pax_global_header00006660000000000000000000000064120723361070014513gustar00rootroot0000000000000052 comment=1d8bb9b490be3a6aed41df228d35de2f8b0f2750 tinyos-2.1.2+dfsg/000077500000000000000000000000001207233610700137615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/README000066400000000000000000000045371207233610700146520ustar00rootroot00000000000000This contains the TinyOS 2.0 source code as of version 2.1.2 on $Date: 2012-08-08 07:18:52 $ This tree includes the TinyOS 2.0 documentation in tinyos-2.x/doc; you can also find the documentation online at: http://www.tinyos.net/tinyos-2.x/doc/ Please note that RPM releases do not include the doc/ or tools/ directories. They do not include the former because of the above URL, where corrections can be applied quickly. They do not include the latter because that compiled versions of its code are installed in the tinyos-tools RPM. The basic directory structure is as follows: apps: Sample TinyOS applications. tests: Sample TinyOS applications which test a part of the system. doc: Documentation index.html: Index file to all documentation txt: Text files (TEPs) html: HTML files (TEPs, installation) tutorial: Tutorials pdf: PDFs of larger documents, such as the TinyOS Programming Manual support: Non-nesC code for using TinyOS nodes make: TinyOS make system sdk: Standard developers kit: serial communication, etc. c: C SDK (fully supported, but not exhaustively tested yet) java: Java SDK (fully supported, heavily tested and used) python: Python SDK (limited, not fully supported) tools: TinyOS-specific tools and scripts platforms: Platform-specific tools release: Scripts and configurations for packaging release RPMs tinyos: TinyOS scripts java: Native support for TinyOS JNI libraries (serial and env) misc: Assorted utility scripts, begininning with tos- ncc: The scripts that invoke the nesC compiler: ncc, mig, ncg tos: TinyOS source code (nesC, C) chips: Chip-specific code interfaces: Core system interfaces lib: Extensions and larger common subsystems byte_radio: General radio stack for byte-level radios net: Network (multihop protocols) ctp: Collection tree protocol le: Link estimator lqi: LQI-based collection for CC2420 platforms power: Power management component library printf: Printing small text messages to serial port serial: Serial communication timer: Timer component library tossim: TOSSIM simulator platforms: Platform-specific code sensorboards: Sensorboard drivers system: Core system components types: Core system data types (header files) You can find documentation for the 2.0.1 release online at: http://www.tinyos.net/tinyos-2.x/doc/ tinyos-2.1.2+dfsg/apps/000077500000000000000000000000001207233610700147245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/AntiTheft/000077500000000000000000000000001207233610700166125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/AntiTheft/Nodes/000077500000000000000000000000001207233610700176625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/AntiTheft/Nodes/AntiTheftAppC.nc000066400000000000000000000046431207233610700226450ustar00rootroot00000000000000// $Id: AntiTheftAppC.nc,v 1.5 2008-04-24 21:15:50 mmaroti Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Top-level configuration for node code for the AntiTheft demo app. * Instantiates the sensors, dissemination and collection services, and * does all the necessary wiring. * * @author David Gay */ #include "antitheft.h" configuration AntiTheftAppC { } implementation { /* First wire the low-level services (booting, serial port, radio). There is no standard name for the actual radio component, so we use #ifdef to get the right one for the current platform. */ components AntiTheftC, ActiveMessageC, MainC, LedsC, new TimerMilliC() as MyTimer; #if defined(PLATFORM_MICA2) components CC1000CsmaRadioC as Radio; #elif defined(PLATFORM_MICAZ) components CC2420ActiveMessageC as Radio; #elif defined(PLATFORM_IRIS) components ActiveMessageC as Radio; #else #error "The AntiTheft application is only supported for mica2, micaz and iris nodes" #endif AntiTheftC.Boot -> MainC.Boot; AntiTheftC.Check -> MyTimer; AntiTheftC.Leds -> LedsC; AntiTheftC.RadioControl -> ActiveMessageC; AntiTheftC.LowPowerListening -> Radio; /* Instaniate, wire MTS300 sensor board components. */ components new PhotoC(), new AccelXStreamC(), SounderC; AntiTheftC.Read -> PhotoC; AntiTheftC.ReadStream -> AccelXStreamC; AntiTheftC.Mts300Sounder -> SounderC; components DisseminationC; AntiTheftC.DisseminationControl -> DisseminationC; /* Instantiate and wire our settings dissemination service */ components new DisseminatorC(settings_t, DIS_SETTINGS); AntiTheftC.SettingsValue -> DisseminatorC; /* Instantiate and wire our collection service for theft alerts */ components CollectionC, new CollectionSenderC(COL_ALERTS) as AlertSender; AntiTheftC.AlertRoot -> AlertSender; AntiTheftC.CollectionControl -> CollectionC; /* Instantiate and wire our local radio-broadcast theft alert and reception services */ components new AMSenderC(AM_THEFT) as SendTheft, new AMReceiverC(AM_THEFT) as ReceiveTheft; AntiTheftC.TheftSend -> SendTheft; AntiTheftC.TheftReceive -> ReceiveTheft; } tinyos-2.1.2+dfsg/apps/AntiTheft/Nodes/AntiTheftC.nc000066400000000000000000000145141207233610700222020ustar00rootroot00000000000000// $Id: AntiTheftC.nc,v 1.7 2009-10-28 19:11:15 razvanm Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Main code for the anti theft demo application. * * @author David Gay */ #include "antitheft.h" module AntiTheftC { uses { interface Timer as Check; interface Read; interface ReadStream; interface Leds; interface Boot; interface Mts300Sounder; interface DisseminationValue as SettingsValue; interface Send as AlertRoot; interface StdControl as CollectionControl; interface StdControl as DisseminationControl; interface SplitControl as RadioControl; interface LowPowerListening; interface AMSend as TheftSend; interface Receive as TheftReceive; } } implementation { enum { /* Threshold for considering mote in a dark place */ DARK_THRESHOLD = 600, /* Amount of time warning leds should stay on (in checkInterval counts) */ WARNING_TIME = 3, /* Number of acceleration samples to collect */ ACCEL_SAMPLES = 10, /* Interval between acceleration samples (us) */ ACCEL_INTERVAL = 10000 }; settings_t settings; message_t alertMsg, theftMsg; uint16_t ledTime; /* Time left until leds switched off */ uint16_t accelSamples[ACCEL_SAMPLES]; /********* LED handling **********/ /* Warn that some error occurred */ void errorLed() { ledTime = WARNING_TIME; call Leds.led2On(); } /* Notify user that settings changed */ void settingsLed() { ledTime = WARNING_TIME; call Leds.led1On(); } /* Turn on bright red light! (LED) */ void theftLed() { ledTime = WARNING_TIME; call Leds.led0On(); } /* Time-out leds. Called every checkInterval */ void updateLeds() { if (ledTime && !--ledTime) { call Leds.led0Off(); call Leds.led1Off(); call Leds.led2Off(); } } /* Check result code and report error if a problem occurred */ void check(error_t ok) { if (ok != SUCCESS) errorLed(); } /* Report theft, based on current settings */ void theft() { if (settings.alert & ALERT_LEDS) theftLed(); if (settings.alert & ALERT_SOUND) call Mts300Sounder.beep(100); if (settings.alert & ALERT_RADIO) /* A local broadcast with no payload */ check(call TheftSend.send(AM_BROADCAST_ADDR, &theftMsg, 0)); if (settings.alert & ALERT_ROOT) { /* Report the identity of this node, using the collection protocol */ /* Get the payload part of alertMsg and fill in our data */ alert_t *newAlert = call AlertRoot.getPayload(&alertMsg, sizeof(alert_t)); if (newAlert != NULL) { newAlert->stolenId = TOS_NODE_ID; /* and send it... */ check(call AlertRoot.send(&alertMsg, sizeof *newAlert)); } } } /* We have nothing to do after messages are sent */ event void AlertRoot.sendDone(message_t *msg, error_t ok) { } event void TheftSend.sendDone(message_t *msg, error_t ok) { } /* We've received a theft alert from a neighbour. Turn on the theft warning light! */ event message_t *TheftReceive.receive(message_t* msg, void* payload, uint8_t len) { theftLed(); /* We don't need to hold on to the message buffer, so just return the received buffer */ return msg; } /* At boot time, start the periodic timer and the radio */ event void Boot.booted() { errorLed(); settings.alert = DEFAULT_ALERT; settings.detect = DEFAULT_DETECT; call Check.startPeriodic(DEFAULT_CHECK_INTERVAL); call RadioControl.start(); } /* Radio started. Now start the collection protocol and set the wakeup interval for low-power-listening wakeup to half a second. */ event void RadioControl.startDone(error_t ok) { if (ok == SUCCESS) { call DisseminationControl.start(); call CollectionControl.start(); call LowPowerListening.setLocalWakeupInterval(512); } else errorLed(); } event void RadioControl.stopDone(error_t ok) { } /* New settings received, update our local copy */ event void SettingsValue.changed() { const settings_t *newSettings = call SettingsValue.get(); settingsLed(); settings = *newSettings; /* Switch to the new check interval */ call Check.startPeriodic(newSettings->checkInterval); } /* Every check interval: update leds, check for theft based on current settings */ event void Check.fired() { updateLeds(); if (settings.detect & DETECT_DARK) call Read.read(); /* Initiate light sensor read */ if (settings.detect & DETECT_ACCEL) { /* To sample acceleration, we first register our buffer (postBuffer). Then we trigger sampling at the desired interval (read) */ call ReadStream.postBuffer(accelSamples, ACCEL_SAMPLES); call ReadStream.read(ACCEL_INTERVAL); } } /* Light sample completed. Check if it indicates theft */ event void Read.readDone(error_t ok, uint16_t val) { if (ok == SUCCESS && val < DARK_THRESHOLD) theft(); /* ALERT! ALERT! */ } /* A deferred task to check the acceleration data and detect theft. */ task void checkAcceleration() { uint8_t i; uint16_t avg; uint32_t var; /* We check for theft by checking whether the variance of the sample (in mysterious acceleration units) is > 4 */ for (avg = 0, i = 0; i < ACCEL_SAMPLES; i++) avg += accelSamples[i]; avg /= ACCEL_SAMPLES; for (var = 0, i = 0; i < ACCEL_SAMPLES; i++) { int16_t diff = accelSamples[i] - avg; var += diff * diff; } if (var > 4 * ACCEL_SAMPLES) theft(); /* ALERT! ALERT! */ } /* The acceleration read completed. Post the task that will check for theft. We defer this somewhat cpu-intensive computation to avoid having the current task run for too long. */ event void ReadStream.readDone(error_t ok, uint32_t usActualPeriod) { if (ok == SUCCESS) post checkAcceleration(); else errorLed(); } /* The current sampling buffer is full. If we were using several buffers, we would switch between them here. */ event void ReadStream.bufferDone(error_t ok, uint16_t *buf, uint16_t count) { } } tinyos-2.1.2+dfsg/apps/AntiTheft/Nodes/Makefile000066400000000000000000000004721207233610700213250ustar00rootroot00000000000000SENSORBOARD = mts300 PFLAGS += -DMTS300CA PFLAGS += -I%T/lib/net/ctp -I%T/lib/net -I%T/lib/net/4bitle -I%T/lib/net/drip COMPONENT=AntiTheftAppC #CFLAGS += -DLOW_POWER_LISTENING #CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512 #CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512 #CFLAGS += -DDELAY_AFTER_RECEIVE=20 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/AntiTheft/Nodes/antitheft.h000066400000000000000000000017071207233610700220260ustar00rootroot00000000000000// $Id: antitheft.h,v 1.3 2007-04-04 22:06:22 idgay Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * @author David Gay */ #ifndef ANTITHEFT_H #define ANTITHEFT_H enum { ALERT_LEDS = 1, ALERT_SOUND = 2, ALERT_RADIO = 4, ALERT_ROOT = 8, DETECT_DARK = 1, DETECT_ACCEL = 2, AM_SETTINGS = 54, AM_THEFT = 99, AM_ALERT = 22, DIS_SETTINGS = 42, COL_ALERTS = 11, DEFAULT_ALERT = ALERT_LEDS, DEFAULT_DETECT = DETECT_DARK, DEFAULT_CHECK_INTERVAL = 1000 }; typedef nx_struct settings { nx_uint8_t alert, detect; nx_uint16_t checkInterval; } settings_t; typedef nx_struct alert { nx_uint16_t stolenId; } alert_t; #endif tinyos-2.1.2+dfsg/apps/AntiTheft/README.txt000066400000000000000000000075511207233610700203200ustar00rootroot00000000000000README for AntiTheft Author/Contact: tinyos-help@millennium.berkeley.edu Description: AntiTheft is a demo "antitheft" application. The accompanying tutorial-slides.ppt Powerpoint file is a tutorial for TinyOS that uses AntiTheft to introduce various aspects of TinyOS and its services. The slides are also available in PDF format in tutorial-slides.pdf (but with animation missing). AntiTheft can detect theft by: - light level (a dark mote is a mote that has been stolen and placed in a concealed dark place, e.g., a pocket!) - acceleration (you have to move a mote to steal it...) It can report theft by: - turning on an alert light (a red LED) - beeping a sounder - reporting the theft to nodes within broadcast radio range (nodes receiving this message turn on their red LED) - reporting the theft to a central node via multihop (collection) routing The antitheft detection and reporting choices are remotely controllable using the java GUI found in the java subdirectory. Nodes blink their yellow LED when turned on or when an internal error occurs, and blink their green LED when new settings are received. This demo is written for mica2, micaz or iris motes using the mts300 sensor board. The code in the Nodes directory should be installed on the motes detecting theft. Each mote should have a separate id, and a mts31n0 or mts300 sensor board. The code in the Root directory should be installed on a mote connected to the PC using a programming board. It talks to the java GUI, forwarding settings from the PC to the sensor network, and forwarding theft alerts from the sensor network to the PC. See below for detailed usage instructions. Tools: The java directory contains a control GUI for the antitheft demo app. Usage: The following instructions will get you started with the AntiTheft demo (the instructions are for mica2 motes, replace mica2 with micaz or iris if using either of those motes) 1. Compile the root and node code for the antitheft application for your platform (mica2, micaz or iris): $ (cd Nodes; make mica2) $ (cd Root; make mica2) 2. Install the root code on a mote with a distinct identifier (e.g., 0): $ (cd Root; make mica2 reinstall.0 ) # For instance: (cd Root; make mica2 reinstall.0 mib510,/dev/ttyUSB0) 3. Install the node code on some number of mica2 motes, giving each mote a distinct id. $ (cd Nodes; make mica2 reinstall.N ) # For instance: (cd Nodes; make mica2 reinstall.22 mib510,/dev/ttyUSB0) 4. Put some mts310 sensor boards on the non-root mica2 motes. You can use mts300 boards instead, but then the acceleration detection will not work. 5. Connect the root mica2 mote to your PC and switch on all motes. 6. Compile and run the java application. The text below assumes your serial port is /dev/ttyS0, replace with the actual port you are using (e.g., COM3 on Windows or /dev/ttyUSB0 on Linux) $ cd java $ make # Unecessary if antitheft.jar exists $ java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyS0:mica2 $ ./run # start the graphical user interface 7. The buttons and text field on the right allow you to change the theft detection and reporting settings. The interval text box changes the interval at which motes check for theft (default is every second). Changes are only sent to the mote network when you press the Update button. Finally, if you've selected the Server theft report option, the message area will report received theft messages. Known bugs/limitations: - A newly turned on mote may not send theft reports (when the "Server" theft report option is chosen), as: o It takes a little while after motes turn on for them to join the multihop collection network. o It can take a little while for motes to receive the current settings. None. $Id: README.txt,v 1.6 2007-11-19 17:21:20 sallai Exp $ tinyos-2.1.2+dfsg/apps/AntiTheft/Root/000077500000000000000000000000001207233610700175355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/AntiTheft/Root/AntiTheftRootAppC.nc000066400000000000000000000045201207233610700233560ustar00rootroot00000000000000// $Id: AntiTheftRootAppC.nc,v 1.6 2008-04-24 21:15:51 mmaroti Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Top-level configuration for root-node code for the AntiTheft demo app. * Instantiates the dissemination and collection services, and does all * the necessary wiring. * * @author David Gay */ #include "../Nodes/antitheft.h" configuration AntiTheftRootAppC { } implementation { /* First wire the low-level services (booting, serial port, radio). There is no standard name for the actual radio component, so we use #ifdef to get the right one for the current platform. */ components AntiTheftRootC, MainC, LedsC, ActiveMessageC, SerialActiveMessageC; #if defined(PLATFORM_MICA2) components CC1000CsmaRadioC as Radio; #elif defined(PLATFORM_MICAZ) components CC2420ActiveMessageC as Radio; #elif defined(PLATFORM_IRIS) components ActiveMessageC as Radio; #else #error "The AntiTheft application is only supported for mica2, micaz and iris nodes" #endif AntiTheftRootC.Boot -> MainC; AntiTheftRootC.SerialControl -> SerialActiveMessageC; AntiTheftRootC.RadioControl -> ActiveMessageC; AntiTheftRootC.LowPowerListening -> Radio; AntiTheftRootC.Leds -> LedsC; components DisseminationC; AntiTheftRootC.DisseminationControl -> DisseminationC; /* Next, instantiate and wire a disseminator (to send settings) and a serial receiver (to receive settings from the PC) */ components new DisseminatorC(settings_t, DIS_SETTINGS), new SerialAMReceiverC(AM_SETTINGS) as SettingsReceiver; AntiTheftRootC.SettingsReceive -> SettingsReceiver; AntiTheftRootC.SettingsUpdate -> DisseminatorC; /* Finally, instantiate and wire a collector (to receive theft alerts) and a serial sender (to send the alerts to the PC) */ components CollectionC, new SerialAMSenderC(AM_ALERT) as AlertsForwarder; AntiTheftRootC.CollectionControl -> CollectionC; AntiTheftRootC.RootControl -> CollectionC; AntiTheftRootC.AlertsReceive -> CollectionC.Receive[COL_ALERTS]; AntiTheftRootC.AlertsForward -> AlertsForwarder; } tinyos-2.1.2+dfsg/apps/AntiTheft/Root/AntiTheftRootC.nc000066400000000000000000000063741207233610700227260ustar00rootroot00000000000000// $Id: AntiTheftRootC.nc,v 1.5 2009-10-28 19:11:15 razvanm Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Root node code for the antitheft demo app, just acts as a bridge with the PC: * - disseminates settings received from the PC * - acts as a root forthe theft alert collection tree * - forwards theft alerts received from the collection tree to the PC * * @author David Gay */ module AntiTheftRootC { uses { interface Boot; interface SplitControl as SerialControl; interface SplitControl as RadioControl; interface LowPowerListening; interface DisseminationUpdate as SettingsUpdate; interface Receive as SettingsReceive; interface StdControl as CollectionControl; interface StdControl as DisseminationControl; interface RootControl; interface Receive as AlertsReceive; interface AMSend as AlertsForward; interface Leds; } } implementation { /* Start the radio and serial ports when booting */ event void Boot.booted() { call SerialControl.start(); call RadioControl.start(); } event void SerialControl.startDone(error_t error) { } event void SerialControl.stopDone(error_t error) { } event void RadioControl.startDone(error_t error) { /* Once the radio has started, we can setup low-power listening, and start the collection and dissemination services. Additionally, we set ourselves as the (sole) root for the theft alert dissemination tree */ if (error == SUCCESS) { call LowPowerListening.setLocalWakeupInterval(512); call DisseminationControl.start(); call CollectionControl.start(); call RootControl.setRoot(); } } event void RadioControl.stopDone(error_t error) { } /* When we receive new settings from the serial port, we disseminate them by calling the change command */ event message_t *SettingsReceive.receive(message_t* msg, void* payload, uint8_t len) { settings_t *newSettings = payload; if (len == sizeof(*newSettings)) { call Leds.led2Toggle(); call SettingsUpdate.change(newSettings); } return msg; } message_t fwdMsg; bool fwdBusy; /* When we (as root of the collection tree) receive a new theft alert, we forward it to the PC via the serial port */ event message_t *AlertsReceive.receive(message_t* msg, void* payload, uint8_t len) { alert_t *newAlert = payload; call Leds.led0Toggle(); if (len == sizeof(*newAlert) && !fwdBusy) { /* Copy payload (newAlert) from collection system to our serial message buffer (fwdAlert), then send our serial message */ alert_t *fwdAlert = call AlertsForward.getPayload(&fwdMsg, sizeof(alert_t)); if (fwdAlert != NULL) { *fwdAlert = *newAlert; if (call AlertsForward.send(AM_BROADCAST_ADDR, &fwdMsg, sizeof *fwdAlert) == SUCCESS) fwdBusy = TRUE; } } return msg; } event void AlertsForward.sendDone(message_t *msg, error_t error) { if (msg == &fwdMsg) fwdBusy = FALSE; } } tinyos-2.1.2+dfsg/apps/AntiTheft/Root/Makefile000066400000000000000000000004241207233610700211750ustar00rootroot00000000000000PFLAGS += -I%T/lib/net/ctp -I%T/lib/net -I%T/lib/net/4bitle -I%T/lib/net/drip COMPONENT=AntiTheftRootAppC #CFLAGS += -DLOW_POWER_LISTENING #CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512 #CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512 #CFLAGS += -DDELAY_AFTER_RECEIVE=20 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/AntiTheft/java/000077500000000000000000000000001207233610700175335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/AntiTheft/java/AntiTheftGui.java000066400000000000000000000200231207233610700227260ustar00rootroot00000000000000// $Id: AntiTheftGui.java,v 1.5 2010-06-29 22:07:13 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Description: * The GUI for the AntiTheft application. * * @author Bret Hull * @author David Gay */ import javax.swing.*; import java.awt.*; import java.awt.event.*; import java.io.*; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class AntiTheftGui implements MessageListener, Messenger { MoteIF mote; // For talking to the antitheft root node /* Various swing components we need to use after initialisation */ JFrame frame; // The whole frame JTextArea mssgArea; // The message area JTextField fieldInterval; // The requested check interval /* The checkboxes for the requested settings */ JCheckBox detDarkCb, detAccelCb, repLedCb, repSirenCb, repServerCb, repNeighboursCb; public AntiTheftGui() { try { guiInit(); /* Setup communication with the mote and request a messageReceived callback when an AlertMsg is received */ mote = new MoteIF(this); mote.registerListener(new AlertMsg(), this); } catch(Exception e) { e.printStackTrace(); System.exit(2); } } /* Build up the GUI using Swing magic. Nothing very exciting here - the BagPanel class makes the code a bit cleaner/easier to read. */ private void guiInit() throws Exception { JPanel mainPanel = new JPanel(new BorderLayout()); mainPanel.setMinimumSize(new Dimension(500, 250)); mainPanel.setPreferredSize(new Dimension(500, 300)); /* The message area */ JScrollPane mssgPanel = new JScrollPane(); mssgPanel.setVerticalScrollBarPolicy(JScrollPane.VERTICAL_SCROLLBAR_ALWAYS); mssgPanel.setAutoscrolls(true); mssgArea = new JTextArea(); mssgArea.setFont(new java.awt.Font("Monospaced", Font.PLAIN, 20)); mainPanel.add(mssgPanel, BorderLayout.CENTER); mssgPanel.getViewport().add(mssgArea, null); /* The button area */ BagPanel buttonPanel = new BagPanel(); GridBagConstraints c = buttonPanel.c; c.fill = GridBagConstraints.HORIZONTAL; c.gridwidth = GridBagConstraints.REMAINDER; buttonPanel.makeLabel("Detection", JLabel.CENTER); c.gridwidth = GridBagConstraints.RELATIVE; detDarkCb = buttonPanel.makeCheckBox("Dark", true); c.gridwidth = GridBagConstraints.REMAINDER; detAccelCb = buttonPanel.makeCheckBox("Movement", false); buttonPanel.makeSeparator(SwingConstants.HORIZONTAL); buttonPanel.makeLabel("Theft Reports", JLabel.CENTER); c.gridwidth = GridBagConstraints.RELATIVE; repLedCb = buttonPanel.makeCheckBox("LED", true); c.gridwidth = GridBagConstraints.REMAINDER; repSirenCb = buttonPanel.makeCheckBox("Siren", false); c.gridwidth = GridBagConstraints.RELATIVE; repServerCb = buttonPanel.makeCheckBox("Server", false); c.gridwidth = GridBagConstraints.REMAINDER; repNeighboursCb = buttonPanel.makeCheckBox("Neighbours", false); buttonPanel.makeSeparator(SwingConstants.HORIZONTAL); buttonPanel.makeLabel("Interval", JLabel.CENTER); fieldInterval = buttonPanel.makeTextField(10, null); fieldInterval.setText(Integer.toString(Constants.DEFAULT_CHECK_INTERVAL)); ActionListener settingsAction = new ActionListener() { public void actionPerformed(ActionEvent e) { updateSettings(); } }; buttonPanel.makeButton("Update", settingsAction); mainPanel.add(buttonPanel, BorderLayout.EAST); /* The frame part */ frame = new JFrame("AntiTheft"); frame.setSize(mainPanel.getPreferredSize()); frame.getContentPane().add(mainPanel); frame.setVisible(true); frame.addWindowListener(new WindowAdapter() { public void windowClosing(WindowEvent e) { System.exit(0); } }); } /* Add a message to the message area, auto-scroll to end */ public synchronized void message(String s) { mssgArea.append(s + "\n"); mssgArea.setCaretPosition(mssgArea.getDocument().getLength()); } /* Popup an error message */ void error(String msg) { JOptionPane.showMessageDialog(frame, msg, "Error", JOptionPane.ERROR_MESSAGE); } /* User pressed the "Update" button. Read the GUI fields and send a SettingsMsg with the requested values. When the requested settings are bad, we silently update them to sane values. */ public void updateSettings() { SettingsMsg smsg = new SettingsMsg(); short alert = 0; short detect = 0; int checkInterval = Constants.DEFAULT_CHECK_INTERVAL; /* Extract current interval value, fixing bad values */ String intervalS = fieldInterval.getText().trim(); try { int newInterval = Integer.parseInt(intervalS); if (newInterval < 10) throw new NumberFormatException(); checkInterval = newInterval; } catch (NumberFormatException e) { /* Reset field when value is bad */ fieldInterval.setText("" + checkInterval); } /* Extract alert settings */ if (repLedCb.isSelected()) alert |= Constants.ALERT_LEDS; if (repSirenCb.isSelected()) alert |= Constants.ALERT_SOUND; if (repNeighboursCb.isSelected()) alert |= Constants.ALERT_RADIO; if (repServerCb.isSelected()) alert |= Constants.ALERT_ROOT; if (alert == 0) { /* If nothing select, force-select LEDs */ alert = Constants.ALERT_LEDS; repLedCb.setSelected(true); } /* Extract detection settings */ if (detDarkCb.isSelected()) detect |= Constants.DETECT_DARK; if (detAccelCb.isSelected()) detect |= Constants.DETECT_ACCEL; if (detect == 0) { /* If no detection selected, force-select dark */ detect = Constants.DETECT_DARK; detDarkCb.setSelected(true); } /* Build and send settings message */ smsg.set_alert(alert); smsg.set_detect(detect); smsg.set_checkInterval(checkInterval); try { mote.send(MoteIF.TOS_BCAST_ADDR, smsg); } catch (IOException e) { error("Cannot send message to mote"); } } /* Message received from mote network. Update message area if it's a theft message. */ public void messageReceived(int dest_addr, Message msg) { if (msg instanceof AlertMsg) { AlertMsg alertMsg = (AlertMsg)msg; message("Theft of " + alertMsg.get_stolenId()); } } /* Just start the app... */ public static void main(String[] args) { AntiTheftGui me = new AntiTheftGui(); } } tinyos-2.1.2+dfsg/apps/AntiTheft/java/BagPanel.java000066400000000000000000000046561207233610700220620ustar00rootroot00000000000000// $Id: BagPanel.java,v 1.2 2007-04-04 22:29:29 idgay Exp $ /* tab:4 * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import java.awt.*; import java.awt.event.*; /** * A GridBagLayout based panel with convenience methods for * making various swing items. These methods also ensure a * consistent appearance. * * @author David Gay */ public class BagPanel extends JPanel { Font boldFont = new Font("Dialog", Font.BOLD, 12); Font normalFont = new Font("Dialog", Font.PLAIN, 12); GridBagLayout bag; GridBagConstraints c; /* Create a panel with a bag layout. Create some constraints are users can modify prior to creating widgets - the current constraints will be applied to all widgets created with makeXXX */ public BagPanel() { bag = new GridBagLayout(); setLayout(bag); c = new GridBagConstraints(); } /* The makeXXX methods create XXX widgets, apply the current constraints to them, and add them to this panel. The widget is returned in case the creator needs to hang on to it. */ public JButton makeButton(String label, ActionListener action) { JButton button = new JButton(); button.setText(label); button.setFont(boldFont); button.addActionListener(action); bag.setConstraints(button, c); add(button); return button; } public JCheckBox makeCheckBox(String label, boolean selected) { JCheckBox box = new JCheckBox(label, selected); box.setFont(normalFont); bag.setConstraints(box, c); add(box); return box; } public JLabel makeLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(boldFont); bag.setConstraints(label, c); add(label); return label; } public JTextField makeTextField(int columns, ActionListener action) { JTextField tf = new JTextField(columns); tf.setFont(normalFont); tf.setMaximumSize(tf.getPreferredSize()); tf.addActionListener(action); bag.setConstraints(tf, c); add(tf); return tf; } public JSeparator makeSeparator(int axis) { JSeparator sep = new JSeparator(axis); bag.setConstraints(sep, c); add(sep); return sep; } } tinyos-2.1.2+dfsg/apps/AntiTheft/java/Makefile000066400000000000000000000011541207233610700211740ustar00rootroot00000000000000GEN=SettingsMsg.java AlertMsg.java Constants.java ANTITHEFT_H=../Nodes/antitheft.h all: antitheft.jar antitheft.jar: AntiTheftGui.class jar cf $@ *.class SettingsMsg.java: $(ANTITHEFT_H) mig -target=null -java-classname=SettingsMsg java $(ANTITHEFT_H) settings -o $@ AlertMsg.java: $(ANTITHEFT_H) mig -target=null -java-classname=AlertMsg java $(ANTITHEFT_H) alert -o $@ Constants.java: $(ANTITHEFT_H) ncg -target=null -java-classname=Constants java $(ANTITHEFT_H) antitheft.h -o $@ AntiTheftGui.class: $(wildcard *.java) $(GEN) javac *.java clean: rm -f *.class $(GEN) veryclean: clean rm antitheft.jar tinyos-2.1.2+dfsg/apps/AntiTheft/java/antitheft.jar000066400000000000000000000200371207233610700222210ustar00rootroot00000000000000PK 6 META-INF/PK 6--META-INF/MANIFEST.MFManifest-Version: 1.0 Created-By: 0.92-gcc PK 6AlertMsg.classKsG#Z-B6 ?$PlGF HJfօvvI\rr*[>@.9$p%UP HBULO_\A*}!PȲ VXS0|DV9B c!y![|@ʆ-z}:3mq 3M1], 25c0U0--Qb"gq`q7։d5)ve2!2&%aZ5:(062uêeei)5W׮s+_8`N0NSvpb(hkϙSkBՋd1}iR| eZZCUᖐB+W)Wu5U*0?=RKcRQ!J+oUxkTsvӪ8z9?vMRAZE eWs%a8*wQcnQa'=[4Äk?ָm0]nrs^Gr{E.g'Vb:b5Kco}4I1դ GH'!4|`3#$Fu"oHV\$xFq)*!겡%MRҔ$ %MQRh>%}@IJnMK?!thv Uɾzz,U80 V'vSF罄-MYuq#Ÿ@I1QIm^¤XO.o1JM"RDifePcy~=ۖ_^Pk}EqtkQ\5%]:M;։+D6f#}5jnI +Wji;O,.֋Ã?>OPK 6KTAntiTheftGui$1.classmQJ@=-mvqAU> >+B)*BP4Sډ$O .Gw`2{a@&(¢%,X1f`!"3,8MDg, TCG#!:f(vR-"tyqc]q=%|yŃLxaܩkS.݌!':m? <~*,WCOZ0Q` k`BeR>0:R1px f_ ^\UjN&vmd`س2JUO`aG U#A!hB e"k}ץנO u( V?~A9fOdO'ߐ&% CE PK 6*:b AntiTheftGui.classW |?vLHVC#l." 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U?szUZϢ?,ӕO%/Ӓ"?JMOy#sKGg?s_+RI$I$_ endstream endobj 13 0 obj 9575 endobj 16 0 obj << /Length 17 0 R /Filter /FlateDecode >> stream HTMS0{Lgo۽)PZ ҋHTƱ!ʖ-Nx۷ow.PFE(A3@ Mw2]! "!mhL{ 7L\} Fj% eתTM1c{?CZGD=N7/U1(\V:SɦtȜ-"1 4ǛouWHߗvy(J(o*rL)NN<ey#+N]UFhIu(G=a ﺛFbfԈk]nhT.ma NbG8%`a7.S \l]|LUȍrY8:qm8cDvP+ g#459Ƨ; ˭B՛%P E},#m ૅ$#N[u KcS7NUta ޥϦ{iz endstream endobj 17 0 obj 701 endobj 4 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 5 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im1 6 0 R /im2 12 0 R >> /ProcSet 2 0 R >> /Contents [ 8 0 R 10 0 R 16 0 R ] >> endobj 23 0 obj << /Length 24 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DhJ24MT8j endstream endobj 24 0 obj 175 endobj 21 0 obj << /Type /XObject /Subtype /Image /Name /im3 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 22 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 22 0 obj 734 endobj 25 0 obj << /Length 26 0 R /Filter /FlateDecode >> stream H]RK1~iP u[ݛăi%-;d t9A3xPi(~Co|/ CJ>RjU ۴^Y%%=i'$> $>ءk$cCN( vѠ{|Rxq S4j˱R꟣G}JE=A UuAd\cXrO::D YrxYL9mA xTF1@WW߿T*Pj(%'xJ%Tc.3\䷹^|DZe~7`8Tga\(W'*'`" VJyV? U;~QokåNv2YҊ&uY_SPxX ߶&dx^_ٽHL=ъf-,Da ù~~ЯWm7-@y endstream endobj 26 0 obj 477 endobj 27 0 obj << /Type /XObject /Subtype /Image /Name /im4 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 28 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 28 0 obj 734 endobj 31 0 obj << /Length 32 0 R /Filter /FlateDecode >> stream HR͎0~wiuI葋7l nKnrXQ4߯ hxW XzVV6#{ATˊkcQf8Kd/x)\c`(XPw! ՝dP0i!hk<?iz v!ڼBRlz:eI4snJMӷYEcB7H)حh-q \qH&aڴr;` )2,{<]pR!p$@sV.fmY3 &{=n $$ٸź *w4>fSI⿖t*;[5~.|LzgpʼFgg(t>\9Ԅ+媻?wE+|Vۮ endstream endobj 32 0 obj 414 endobj 20 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 5 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im3 21 0 R /im4 27 0 R >> /ProcSet 2 0 R >> /Contents [ 23 0 R 25 0 R 31 0 R ] >> endobj 36 0 obj << /Length 37 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DhJ24MT'Ewo8m endstream endobj 37 0 obj 175 endobj 34 0 obj << /Type /XObject /Subtype /Image /Name /im5 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 35 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 35 0 obj 734 endobj 38 0 obj << /Length 39 0 R /Filter /FlateDecode >> stream HeRkA~RE0LF47 Yū\&zt&̼'xA-vwu]mѩc6v6GƐׂE8:prt|<`~31ܤ&C3Bߴh% V+ea@*K[e1Ŧ^>.IA2rk鯖e舘:$ /@l a*^ (?3y(nyYFk&oE>Ϣ8bBdß\cP{2Ot=bYhb.ece7: ԝ!>s:[K7S8[]+6Yc]sjU!A_V~Agr&6 1)Cf#J1AםspzpM'pjǵ|z4'1z endstream endobj 39 0 obj 487 endobj 40 0 obj << /Type /XObject /Subtype /Image /Name /im6 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 41 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! 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I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 60 0 obj 734 endobj 61 0 obj << /Length 62 0 R /Filter /FlateDecode >> stream HUˎ6C7C# c` %6whRqimAi]]]6?757 @ ^W*4O 6_;nvj+F*<_Ӌ W_`uC`W9;|B61M$`iW lJ+1Ƌ4f AAy])Ċ3Rbv륒m*)?Us' c$L㱏i1ODmZd՝ mso܂8@a!>;*^ g=((S<3^>C^ ;u"Ƀv W2߫^7ڎOi T,]Htl@S; mн4P>*K{Rp lyLCAQsjjϬC 7 zN'5H0Ė4moqY+X4laIaq8FUe m=mK?lFYj{ڂbTZb-xٿbTV`S'+IMۻ}IrHCg{KvOx)Ѷ6I2:@UfBٻxY!m2_zm,if^pL]]A> 7w%,I083k{XAp=>;$[.]-dU Ux"I*F䠻ᮞ .cŽńOH>\wG.ўEzm_;x@c !unF˴~̙^mr ZGo;0ᲡYzG}u<6J*V)DNmq i*~{wH[~7^zN endstream endobj 62 0 obj 851 endobj 52 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 5 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im9 53 0 R /im10 59 0 R >> /ProcSet 2 0 R >> /Contents [ 55 0 R 57 0 R 61 0 R ] >> endobj 66 0 obj << /Length 67 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsRn;ӂ$$')CΎD0dZiu D 7zCC"p/#ĺF:^=V>O<;az$D{YTIF} cʓ$>!8 endstream endobj 67 0 obj 175 endobj 64 0 obj << /Type /XObject /Subtype /Image /Name /im11 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 65 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 65 0 obj 734 endobj 68 0 obj << /Length 69 0 R /Filter /FlateDecode >> stream HeAk@_euW zĦ6Kwۮ,"=Yz=,G[?AoMa=xšČfv[/HbE>"."䢭5/T%I`nʘd;UkBAl:pI& Nzy "ATbg2Z\`u6F bOxNDVҺB3sc=tԷ3eԟOJ2~)KSәl!܊g[ͅ~bnh{= endstream endobj 69 0 obj 496 endobj 70 0 obj << /Type /XObject /Subtype /Image /Name /im12 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 71 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 71 0 obj 734 endobj 72 0 obj << /Length 73 0 R /Filter /FlateDecode >> stream HVMo8HpCQlj\D-E~HNZќ,CÙ7ooX]/8 /׋4IiCP aEYC%ą/WS vidXHaɲ')de<\Vpqmԃ҈*^Aݵp{SV9għLC[B+ApV,ĮZ 0X'3ϞPnˢ`H)@Љ9$ XU2e|™EE'ϼ +z`LtYK贅zG+|p .q쿀xlg@WA3aU8v#H "䲴X7A7Q֣)Ĉc|II#1YF9@ZeMPgI #H V>2'8xelsKȿ}7L?/l^,؜rR|4ȵޣ{ O^zz/0YzyRzllWZ%T6 c49KcYcd7( oT/άggPN0.c&ABJi*Yt.Wh #+o[XI_"1V}?;?k7\oz[х;ao! 66c-=BaiFpg۾gJ}9Y?qs c?tT|(ay0&[GMYrjL_h_w‚p*6}؋CX(^oԯLcXŭY#K*gAJ7r^ebd7lEcԼ(W):Ez`)ӞYG)(X+/glϧe<;^cw@Y~^zc% endstream endobj 73 0 obj 910 endobj 63 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 5 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im11 64 0 R /im12 70 0 R >> /ProcSet 2 0 R >> /Contents [ 66 0 R 68 0 R 72 0 R ] >> endobj 77 0 obj << /Length 78 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$Dn gR%MU&ta*Ow"8 endstream endobj 78 0 obj 176 endobj 75 0 obj << /Type /XObject /Subtype /Image /Name /im13 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 76 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 76 0 obj 734 endobj 79 0 obj << /Length 80 0 R /Filter /FlateDecode >> stream H]Ak0ǟu ս]6XtqA&c-e-9F顇RBF "9~kr);y')n X{%0zΛFok X3'4m aWFgONO>^~6F0JY(Z;)j+BG7PeK B횗w͢[tr2$@쀜 hڀC"*dZoo^*q'*ͫ_#c5˕ x&xiN8]IPIhUK{qd_?dsb`T1YfV$D23^Q9;%|?zcgy~1*} +J0xXt֦T4h"u9_rT>t*KB2?=Yr endstream endobj 80 0 obj 478 endobj 81 0 obj << /Type /XObject /Subtype /Image /Name /im14 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 82 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 82 0 obj 734 endobj 83 0 obj << /Length 84 0 R /Filter /FlateDecode >> stream HTr@a;$7˶.ĉc.e*@RHN$3=_ Y PgJoF9))ZCjEe4[d VZM,qGX 7Lqbb"*¥2Tan7PPowdcinOJPzv3"thibk)jSFbȦX{r_EMgӱ'm8gb!h )}и< e+PHA(xP9ɌǮnݟ۹@#$~\f"}|^ xD w~?F!>mq M?DU׃38ϭf*sKU_S3q"!Pd S3sCXiټEh^4]8Z?¹QghTؗDs0 ]][޴KB8'V9>wM=ٍ%ktOdTb endstream endobj 84 0 obj 567 endobj 74 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 5 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im13 75 0 R /im14 81 0 R >> /ProcSet 2 0 R >> /Contents [ 77 0 R 79 0 R 83 0 R ] >> endobj 89 0 obj << /Length 90 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DhJ24MT'Qw"?8 endstream endobj 90 0 obj 176 endobj 87 0 obj << /Type /XObject /Subtype /Image /Name /im15 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 88 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 88 0 obj 734 endobj 91 0 obj << /Length 92 0 R /Filter /FlateDecode >> stream HeRj@E- . c(킩ĥJ%CCQ . rrXʲ!!ӛռ9'v :<aq \W"hsyX4I[>.98z~zo|8Aq$'W8N-zpK޷[Z?֭kZQѧ;[`!]Ve"z\e~9[4,R`4coٍ!ޏ)N"g&7E*uF!S S53ݍXxij3C?JD4Du(XjG`,4&qiU(,ӣ~ا*NM{vgwfۨmznX7TrU1-3WMdњ8y.WGnGA*Ƅ!!. x38&cɝy~nE%?# endstream endobj 92 0 obj 479 endobj 93 0 obj << /Type /XObject /Subtype /Image /Name /im16 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 94 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 94 0 obj 734 endobj 95 0 obj << /Length 96 0 R /Filter /FlateDecode >> stream HUn0V))ǺMEQ}Q$`+QEߗ=,#hR =ـw3;}:D)F8e β G ĕ=G;[m'J[<_/9H5|@~&LCVvBFCoDI L 'a41ƖbYw$s抄҉Ms ۳.B߷c9vNy)b%̥տ@ES#B'#Q1aD0߅Y͕qYٹ4+Pl!!D7c8Zwb5"+:RW-OJQNw,uo.нlU ߤ>K`Ll/!!iQI N/[h 5X8Eg4K|&zdr;et0²hD& WBq:cN;_l ; U[]67d+y?n`jYz (pj? +N*2[(`,jQ%4>G)vU;She*kH#Y9<jyE#94O>P!M)Z+žUYksv-?L-HB -Ko~?.. Z0̀Ъ}IJWDD\iH x?M endstream endobj 96 0 obj 689 endobj 85 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 86 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im15 87 0 R /im16 93 0 R >> /ProcSet 2 0 R >> /Contents [ 89 0 R 91 0 R 95 0 R ] >> endobj 100 0 obj << /Length 101 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=ЦJdt7i3k}|"z8 endstream endobj 101 0 obj 175 endobj 98 0 obj << /Type /XObject /Subtype /Image /Name /im17 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 99 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 99 0 obj 734 endobj 102 0 obj << /Length 103 0 R /Filter /FlateDecode >> stream H]Rk@~1+x/͓M6Iە]< RCqVdEB=xO^r)8q~$.7  ~ Ȇz65dSw? a$bwG:פR"~gx'`7큔E‡rt -rBkM^hѨ00(-Vfxo!Je ڀ a8521e pfSů/7Q,B2+۩"72]->s5B=B,I{ng'\CyvSDi3Y&^^ME4FˁFh "*IiJDu> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 105 0 obj 734 endobj 106 0 obj << /Length 107 0 R /Filter /FlateDecode >> stream HVn6:z6I9q.lc1-$eK|}h&kyޫ^Aʳ.wr&f@\9~yY 83*\)/梇?@0;۪'ߞ2C-C\ r ˢa>Yz0`1}@NSk8NF ƗzD5 1W:;^ll*ke\8Ѩ}]UF"fMeE,[%uVx Tc#ܿocn~R,p$YT}CzQ䒜 ht=-;Fqx 7yYY(sW|btǂY|r%XTrh֪^a)3+dfxKjHЕTUFyLHNDYw_(.V {lUdƛ`=vַt2q4jprFmVoSճLeq#-4EeF~ayD>Ic̞;$ c-R] dHg徸SS>'v2 INXUT=c2> /XObject << /im17 98 0 R /im18 104 0 R >> /ProcSet 2 0 R >> /Contents [ 100 0 R 102 0 R 106 0 R ] >> endobj 111 0 obj << /Length 112 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mN2uao0(8#HB!"Z .j'Ș8:&i]}ǚ.N%R Nѫo*>V9|b$,V{; *ʳklZ-rv{x $!> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 110 0 obj 734 endobj 113 0 obj << /Length 114 0 R /Filter /FlateDecode >> stream HeAkA04Wvm"nF47CՃh/~|oCSz)&P֌of)7?739ΓN[ۖvlc>:lȢ7;,yX4o,:xţїဃZVsd,*1: ~bhӉ3/ u?1@¼@=<,-}Dժ).V*,j}iHT`f2S) īh ~p^\j,ܥJ̊yz)ͻV4ryaJTR7&Bp*^%2ө(9/8Tr}rn[1^vommŪµQ9LP5al3 z߾184k_OR.}Q=n:wlX?3ϏoiMst|nG^; endstream endobj 114 0 obj 476 endobj 115 0 obj << /Type /XObject /Subtype /Image /Name /im20 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 116 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 116 0 obj 734 endobj 117 0 obj << /Length 118 0 R /Filter /FlateDecode >> stream HUr0 L6M6>HV4$_d9w|4"/U e&O_WdCʁlWxf \hio@i`Oi.asE`d"`UE# J4rs(r@ϳdd ھR;xV3 ȎK0#1Xh\T<IiDӠNQ9ixV"D%m@\Hd8, WuZ@ED`tq( Of>Ey,ŋ2JÉGm<~.ʹ4OǺ=\evJ TXG1O~K(2RpkuSo٬-5a/4 C٫EaTK0r jFM7mU2#)_9 t"R+r"g|,̱WЏ Eq>/@y> /XObject << /im19 109 0 R /im20 115 0 R >> /ProcSet 2 0 R >> /Contents [ 111 0 R 113 0 R 117 0 R ] >> endobj 122 0 obj << /Length 123 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsRn;ӂ$$')CΎD0dZiu D 7zCC"p/#ĺF:^=V>O<;az$D. gREMU&ta*_wX8 endstream endobj 123 0 obj 176 endobj 120 0 obj << /Type /XObject /Subtype /Image /Name /im21 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 121 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 121 0 obj 734 endobj 124 0 obj << /Length 125 0 R /Filter /FlateDecode >> stream H]RAk1~QZovtW(ڮԽA۠aap% 'NO>;>G0C{wki9zz J gHmH bmߊA pQ?onR^-J4䙀L. 8:Q̗$W_r*K]ԫ Nj{OUmRJl[?{VSz~X祊SުB25땜}J: ooݾ(,Нrjp;<'pJM]_SP<[\_ &e|P۵XLъv#,EW烥~~|Om7g뿧ď9 endstream endobj 125 0 obj 475 endobj 126 0 obj << /Type /XObject /Subtype /Image /Name /im22 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 127 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 127 0 obj 734 endobj 128 0 obj << /Length 129 0 R /Filter /FlateDecode >> stream HUn@VݻyjKDĦvy{ƻk B*HQfΜ9s "c N3 ^p*Y.׵qtn ^t :F24a*;3m(y,:ڧ֬0TmB9Uu|4F<dP@(ٲ3D2 ^<qE(|$Ӏ̡Hʺ1;/ELffLM/ryMP5jW'h-)@So+`]?лq$'8V,6Mw۵&ķdzJI7ꚇ`/Nd/fq{/)l5Z_~z"׻;v7Qai1[@5Uݘw7 <_2U[U88Pz3E4483> /XObject << /im21 120 0 R /im22 126 0 R >> /ProcSet 2 0 R >> /Contents [ 122 0 R 124 0 R 128 0 R ] >> endobj 133 0 obj << /Length 134 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$D.Pp(UD_iB8Y8 endstream endobj 134 0 obj 176 endobj 131 0 obj << /Type /XObject /Subtype /Image /Name /im23 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 132 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 132 0 obj 734 endobj 135 0 obj << /Length 136 0 R /Filter /FlateDecode >> stream HeRjAv;,l`zdWXk{3xr!8zfE)"^B.>BfC>B94:N[ճ?鮪? xNNV;'|#z/Drr$ފm y'%OH3 iٜVPڋK8K f6//bhT}LsVpDOSrke):/@laՌv B͋BlV^n5~ݤa2TTÿn2ݏX#OiE?gmiILCԄȱ BN;3ȢMVS<ӓ~0ć&gd=ɲ<ٍdeͩBR~,5WZr6[ 75-;\?g\[ËXٸvpgIM<>iw endstream endobj 136 0 obj 483 endobj 137 0 obj << /Type /XObject /Subtype /Image /Name /im24 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 138 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 138 0 obj 734 endobj 139 0 obj << /Length 140 0 R /Filter /FlateDecode >> stream HWnHCو 8 2HL HAQa0>IHu-tL'*p*$\d5Է0|OɄY(Ux=h~tÛl[̷pӻ*VXB?L Jz4oy=ߛDBw)/è_1Gf[!&C~oɚ*wexk&tXaajZ?)%bҎƳ3L1{u5>k׾k^բƔ2;kk~N6#=h۲c):d T4Ћ \&tꐛ!b 3^77&xB"W'bK\rW,Ƀq'yOncS:yǼUdNTJJZEz74EH&-a4;%,}~9zݓ1~ E(ʌS08GQ/>37y,&nRSrr !}]#4O 8_6[~uPf|jsOolNp;-"C N8=8"LZD@uEi7m_q~q ã*+nrWdOX;yq-u;2f6[gEܻ2g,ݞ| KڏTto={',#i$8֒QcqtZV9Ai0ёM endstream endobj 140 0 obj 1373 endobj 130 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 86 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im23 131 0 R /im24 137 0 R >> /ProcSet 2 0 R >> /Contents [ 133 0 R 135 0 R 139 0 R ] >> endobj 144 0 obj << /Length 145 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU-yf&f`hK iI6!쁡 @ݿDfd0btu5B 9~Co> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 143 0 obj 734 endobj 146 0 obj << /Length 147 0 R /Filter /FlateDecode >> stream H]Ak@_L4^Ka<۴kbJ[=)=P=H.z)~zuֽ,"2B ČofVL~f7b'+2Ԏ:lҊCnD,psgp^5Mz`/bWYR؊^Y 6Fճ%Zh[|m.ֺb헡ҽW#> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 149 0 obj 734 endobj 150 0 obj << /Length 151 0 R /Filter /FlateDecode >> stream HWnF<{.u vRh&R#QtIFQ;{E4 ERs=svfy$,U0HL8@bd?2ISo :{Cɘu4E9J/ )?d2ke'011I%:I/V)C{,Nns:[捕RMM S"7hŨiWG#cºrw'`0)! wx3y ! Nn8dQysX.b-CE,> .)r1ChTң}ȳ=>S>:>?= C6eEUlmeG$UÂgj)N /ʉS2?!x(b8@mi89e:.U\L(!dqA}5߄= v:@A{0Pe[a4`UK1kXalhU/&y]Wֵ7:H5-9KG{tU!:rgD8Wꐛ >b ^WWg3x|"b1q6%]fXs`p1$Qyiȿz/T1{mɿ}=ѧ% cl N>50nVvw8)ʶyi èD?)q||D⻺z(Vy}@VzR> "NqsyIN#)M#Ǭ 0Y|oZ`}_Wfi!v@nͪv;L eXLV0p~j%ig'tjmcIK=eBD,Sm[ &JsnD$p_mvs +&Wzkv}WM.&f ל;MPB>eߝk K4|fua I". endstream endobj 151 0 obj 1325 endobj 141 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 86 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F3 152 0 R >> /XObject << /im25 142 0 R /im26 148 0 R >> /ProcSet 2 0 R >> /Contents [ 144 0 R 146 0 R 150 0 R ] >> endobj 158 0 obj << /Length 159 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$D.av=,P(Jӄ1Lq ݽY8 endstream endobj 159 0 obj 177 endobj 156 0 obj << /Type /XObject /Subtype /Image /Name /im27 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 157 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 157 0 obj 734 endobj 160 0 obj << /Length 161 0 R /Filter /FlateDecode >> stream HeRAk@~1^=,d$M6Kwۮ,"DDz(Fa!ԛ&k)8缙n f|7ͺ_z<׎ļ[Xlϵ"1|u"x\DmX <7bH ap٧_/\C] Q9-L滜̅Y`@r"Xd, (i5]EfJqO?[\SɊ0mi)I陿`/ L* $]+T/o]wa+2xj/BAeqF'8*־l8/T'Xiw(*eyZ7Ɖ˅$Vu!9b_אxN=(*ӱ;,(PrHx Y1,_6Ejds21hhXsٰ~M $3#k=Iwh 8bB= i'8Í~:^]?'5[X?S*l endstream endobj 161 0 obj 492 endobj 162 0 obj << /Type /XObject /Subtype /Image /Name /im28 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 163 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 163 0 obj 734 endobj 164 0 obj << /Length 165 0 R /Filter /FlateDecode >> stream HWnF<vQ1]u-4UE@JD"]Rv{goRfR͋D 3g܎Ar>O4By3Lp ,Ze< 8Jјmqy,$3ͯK8_vժcL)1)Zʚ6CDRR9}ne˛mwy>xg3=zV gzٕMgg@@ <}ŀ>wv[Kk݆G>_8lZsC y@b. rOڅ툕*Mɺ3;8FOΫ]ٞ:`E.dMVL82"sXvpq]>9T3F"?"@OB{_.קՇs8XDՃgUm+r_55| e3BcJەwwM 5$O(ΜQK$- ey@_18Q:ru~ߖmլ3=>ރ)|vfd"m6P |VOcO;YQ|TZ҇5.x\>J PtLШ'H\l/t"oYnYm~pVy0HNm>I=LZp.Fuܺe{u),bKy , <{_\'O"2+Ƙ0jH2nh{3Am+}9ODp3M6<3Eܖp @mJLeTp.Z.s$߹ j- CI[H)";0hYxq&CLѬpH`4 o@!U{@1֙h)#}/0޿]Ǧhc.ZrpH {PE$'sI,:F붩lRԨe1t܀y{Am]W47ek2>btF:Acƨ߸}fkBDq Pgjv;Nz@Kf.̌Qg xL\J1 n-tUvtAbPv睒ø)">l h~Py,ċ LPԒ ljJ&̏[C֡qxU8cUo4X] <\-u=NvBJ[ endstream endobj 165 0 obj 1266 endobj 154 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 155 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im27 156 0 R /im28 162 0 R >> /ProcSet 2 0 R >> /Contents [ 158 0 R 160 0 R 164 0 R ] >> endobj 169 0 obj << /Length 170 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$D.qv=,P(Jӄ1Lq{Y8 endstream endobj 170 0 obj 177 endobj 167 0 obj << /Type /XObject /Subtype /Image /Name /im29 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 168 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 168 0 obj 734 endobj 171 0 obj << /Length 172 0 R /Filter /FlateDecode >> stream H]j@2I.uS)x B#؅PK]B[!E. .E yJxm zR(:e7ۙF1ZXM=ZmuY_]mF@,Sw֨bGlM37?2ulb`U&qǪ ">,Zuit"@P&èwJ/xfs)*#QzwVc}P6R4oz^(qU/swx3BJ鈗 Owm2H#-t>t"7ins7 a̍7 <^Q޼+kE(}zGwiv0'du]TO{dc%EY/xTQE]QX@)p􅨣6fD> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 174 0 obj 734 endobj 175 0 obj << /Length 176 0 R /Filter /FlateDecode >> stream HWێHC="vEZj_FB!qf lgF#WCXfę:ut dOϲde^Hg H %Kɲ/(03chGiKg.H0;颯=܅U C4 'uظp*5Lоڱ8Gk0ɉɉEI=ӿNN:R</|ݹ㻍݂ a-3utV~sǩFY 2N3MJ33]74%H:+lhsG9/:FWM@%0i%d_7`ЄS,Q}F2L6p ]s0 l0&%`9)ضYJ n]CFw8l}3 :M"8YmlDN`IhzT OP7msa&!H,h)iژ훦n.UqDFqd,[aYvf|W['q ?I9IvkV`{3@͜dh},&:0U*l.h1Ws1ʍ: ,OFQN0aXʙssmțj$ :a_Ov7d_1WfWprbxqd!0P{XmV&ǫMi51Ȯ|]׾1-37V|k+~- ݕ^ 17Y\DM>@V«;@"]g$X&?]T7%no{a7TL^09}ɋP] Aau-sCV 0Gv*RPN ofg0ks1A2)&)eq vϯM"O|S>kYV_Y,'Wq3 endstream endobj 176 0 obj 1437 endobj 166 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 155 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im29 167 0 R /im30 173 0 R >> /ProcSet 2 0 R >> /Contents [ 169 0 R 171 0 R 175 0 R ] >> endobj 180 0 obj << /Length 181 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsRn;ӂ$$')CΎD0dZiu D 7zCC"p/#ĺF:^=V>O<;az$D.K.Je4Wi1|9NAY8 endstream endobj 181 0 obj 176 endobj 178 0 obj << /Type /XObject /Subtype /Image /Name /im31 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 179 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 179 0 obj 734 endobj 182 0 obj << /Length 183 0 R /Filter /FlateDecode >> stream HeRj@ZnhPoD &vַRz(=Cje֯p_[$t5TMwW OI3sFw[mkmna;V;dG(Ϻ!Yء|ۢ|>-Q~񷓣W_?ѐ upɂCě^`x>50X%\;U}SbmXYd-%FaA PXEyGn| ~}iX߿Ĭ{9 Ԧ}?lyy6=_fי v-{ҮfXD~U 9h ڲs[E\弲ALx`~{2yH/{+]mccs;E#퀪y/yAl +;e)ӟmV1FWrqN'p'/G;l766~- endstream endobj 183 0 obj 479 endobj 184 0 obj << /Type /XObject /Subtype /Image /Name /im32 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 185 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 185 0 obj 734 endobj 186 0 obj << /Length 187 0 R /Filter /FlateDecode >> stream HWn6<:A-&^"@Eh}̋J+cWQɡ$Jpx8s/(NP [ ``%\+Z^AqrARxUqv|^>K,>⺁z.w _ e~oƬa ֟L ?tκͪ}mv;q+ἇsȪJƽSON)8mOޞEsY(Y]v$k(4  vhonMMWp( w JysmkYb˔ڟhS]1&zMtXC] upw7aR$80Lcb}r"L2v~'172eUA8i)ߕ$MV^uKtJ ǰ0IO>l@(6xGIe-eYMw8ߝiwyIzKei^nuw1#(0푚LLc/q9\ wsXֈI**_JGڹ|YC'rFkܦBI1~LnлaA9h-3{nLC;~w/1 -[!7ЂsAs*\h( 5@Gv5 u믛-VDTU*5^"dᷞ.ɹP33eo͎$nXwPR5 !VLګ>X{2>]s(,AWkp4|DgGLEZ}^6y(܎9 A+#L,k$f(OuPf'3Uir&2s**:H.^lnk+A*qnQX4Q 8_p1*TPBz`ʧN4m*6֯eC[3F@r;N&4lFPfvcJ sUdy0_>LfަyڃM`K <@YtyB[TnOP@!EjFc@^.c  $S^H B?TZ`a]ӤVh'e(UoL%a ל endstream endobj 187 0 obj 1201 endobj 177 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 155 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F3 152 0 R >> /XObject << /im31 178 0 R /im32 184 0 R >> /ProcSet 2 0 R >> /Contents [ 180 0 R 182 0 R 186 0 R ] >> endobj 191 0 obj << /Length 192 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$D.Pp(UD_iB8Z8 endstream endobj 192 0 obj 176 endobj 189 0 obj << /Type /XObject /Subtype /Image /Name /im33 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 190 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 190 0 obj 734 endobj 193 0 obj << /Length 194 0 R /Filter /FlateDecode >> stream H]k@ǟu)] SbL$.7J %dz-#VWА!Kx\8jw{߻> ZkFd]?MCQ4k9:%xҊpDM;5["aqCƏPCGR#?PTnhy'$ #?Z|O-CrGXuZ}nyE[x;0k# g_Ī_NRJ?F8cm?&cޖ>o<PZVU XjHRxHWAjpI \T8T@t$YZ6ykO|]K̫zAŽ"%הoʮL\FtwV܍ڋn.ٺtA:?u endstream endobj 194 0 obj 490 endobj 195 0 obj << /Type /XObject /Subtype /Image /Name /im34 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 196 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 196 0 obj 734 endobj 200 0 obj << /Length 201 0 R /Filter /FlateDecode >> stream HK 0 DO;̲Yĵ:$|bI!6^2. TJ0L1'Đ,WR}g }vwlC}0]ꋖJFr,]6[Ro6* endstream endobj 201 0 obj 127 endobj 198 0 obj << /Type /XObject /Subtype /Image /Name /im35 /Filter /FlateDecode /Width 495 /Height 209 /BitsPerComponent 4 /ColorSpace [ /Indexed /DeviceRGB 15 197 0 R ] /Length 199 0 R >> stream HWMsFjF2/?n(D֖o.jȂn|cQ+GG]ȢݛJ:vg,"ׯq&ы]@K8~Y8~Y8~Y8~Y8~Y8~Y8~YPQp dedwSŶw9%M֍la Mu dݸf|oDe}#<Űd |WHqAm0'ETOqZK7Tٻo|g}~A}O[8{烜3]lOߌ.4Q\.fŵl`7T%k~*Q19;ojI4{StFsjeT[! IM7ESS/ OԷůI–'{LHE\@ҷ^ػ(HG7_>֙>km~gǑxWbv=؛MsM[ #QgBUj2+kxye"[Pm]le5>nAE{α|Ք$9$p!ds"/Dډڢf?FbtͫMSp=f=dPo:T-1IpKJ [R%>}[e6X3W(a fl&676X3^|*pІ7qZ1KPx.aOϬbv&g6Sn[߭[vZl,w C|"~d5>γY!X?e /7RHJJPoȼC$1dC6X]_}EG\21SFq-) TflNҁ ׻ȷܯR< ߊlvFn;[{(3Z ?-rHHfCRX=_<=OG+tq^Ksid nRIhwdJ\rPi6)RX9;<bHW\+Hg1^Ksu>fҷH#}G*ʑa:Qڼ. bSIy[bH0LNJK%I#Prf*H`B UMOU rvF`k;S^*8'$#{EDJ]ޛ\PﾄR8}p)"l6gMNR!rdC_nEH֛l3w. .s[j)E *]4LY$V ԸV']X, ԈPlT) YjTSr |#Tk6V+| ܷ}Z?[+AX P ,.^Syll{;d?oŠoE3Ul [QthF7QޥJ~,q%li;27JzU+A;ӌ4mB%\sX=G ja$-OkYtY@m !Tb d uR9` 1yM`T3sF:liq. Xy9ڠ`\dêo3,rH`7 &@+P0mv}K9`2u<v˾ \]7 }.6={T|-Ji[ycna}(vѮo\ml-\.ОVnvy[8-x'P%`|rw=z ^'s[Z>w/<}999Ti ;=S7B!| ^{؍SxYs}7 6ѭ3Hn|_ɹ|O4>~[,7n7\÷`;vԷQteSzoq%<[(`%ƛX@<+).0i:NKkp?w> stream !!!$!s8W)trnlVj5 endstream endobj 202 0 obj 46 endobj 203 0 obj << /Length 204 0 R /Filter /FlateDecode >> stream H TC endstream endobj 204 0 obj 11 endobj 188 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 155 0 R /Resources << /Font << /F1 18 0 R >> /XObject << /im33 189 0 R /im34 195 0 R /im35 198 0 R >> /ProcSet 2 0 R >> /Contents [ 191 0 R 193 0 R 200 0 R 203 0 R ] >> endobj 208 0 obj << /Length 209 0 R /Filter /FlateDecode >> stream H]A1 O;.&&mlet`PQэx{Dy=Dfc`$Lz3֔u =u ^m}PP$X`m0sgԴ#ώN?&I9~KM 7KTrlҴ``LW|ZR8 endstream endobj 209 0 obj 178 endobj 206 0 obj << /Type /XObject /Subtype /Image /Name /im36 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 207 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 207 0 obj 734 endobj 210 0 obj << /Length 211 0 R /Filter /FlateDecode >> stream Hek1!Ski r.J2!CCQpN/;nȚ?A&K褀V$H|${~etgk-:MC;Q̶͈ D4|Ǣ m`1OO~ l4P+G^h=3 Z``=kC{7rmwly6xKSqJ{z[jjxO0"P ]cz罏ެ e/D.L WHo+u1{bŭED/B$u+x ]qV5NoT*Ax%p{9UR Q rܻ.(/rp1ZmV偽G_]q6^ܴbQF(-&26M3z߮8X;l{'E>?7I4 O@^mŬ֧ endstream endobj 211 0 obj 476 endobj 212 0 obj << /Type /XObject /Subtype /Image /Name /im37 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 213 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 213 0 obj 734 endobj 214 0 obj << /Length 215 0 R /Filter /FlateDecode >> stream HTMs0˭]I$[;mҋlbQa)ףI.$N{J2,%X߭HL)<`1seUd(,) \+BR_@$ h67^ޣL9oUI.c ~P1)CG(H?B^gM) U­ U1@Y0-Xo@Uڟq#F$DN{|g|* MgP{Z*Rݵ0l&d~`y;2~J ȃFD"Xv;+3нr#LqtЫގ호\\Lǜ7A2eϘfK2Ŭvwh4ʊ{SA-|F_.F(k _\^=҉^*$$%ݯ SÉ!\8`C[nʪ/U[wÀMĥd;Fd[eGA!(߱c,Lйf~gI%,.>cm7x l1b[\d`^sdΣTLWm/-B?\lp5hw> /XObject << /im36 206 0 R /im37 212 0 R >> /ProcSet 2 0 R >> /Contents [ 208 0 R 210 0 R 214 0 R ] >> endobj 219 0 obj << /Length 220 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7]Lm{YPF} =c/א1Z8 endstream endobj 220 0 obj 176 endobj 217 0 obj << /Type /XObject /Subtype /Image /Name /im38 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 218 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 218 0 obj 734 endobj 221 0 obj << /Length 222 0 R /Filter /FlateDecode >> stream H]RMK1~gcPoB]A:Vؽ)mكx(tCIaKg^fK)BKcg}$*ԨH )ޖ7ŷ0 endstream endobj 222 0 obj 477 endobj 223 0 obj << /Type /XObject /Subtype /Image /Name /im39 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 224 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 224 0 obj 734 endobj 225 0 obj << /Length 226 0 R /Filter /FlateDecode >> stream HWnF<*}hSNE$>TRX]{goRpb3gCv4L%UFr©s$(i }rfm9Ts1|e ge:xˏU<866F#F1+Ɣ[ƴa<*C-~MWw=u):`lD\/.~)c 1CfÜш~Dؘ:`C\TayR)WYUnQwu˗ߜ/N߾{zl5"#@JY8*G>plסPL0qBZnuomvb> EǬV3\5BjhGCj$Hy8{0nf[_#JӺ &'zOk4I+ks㏃J5[GM S"mie_RjLvRFCȯgeR9aݶM{޻ZODo7W'`{؛V#/ߔwumGaJ: ;,L>6Ӊ9 x_X d҉Z=> f>m겮N-!<\Sl#Gpd[9B 9Š=}B'mHsǥaH{Oё9A|i{/Mˢ;"xS%aTZ2 ^ ̾5\op=<(YrcPi,^lwP vie| w›߅/mg694ҭREژh$D,L>ɜh>>Ƞᔻ|\5`4fZn7AF| Morؤ)=M<.tz܁{=guFT>s7dP2a\>R>Pk'w :;ѲA0}̹cPkH(d(C0tk]cGNS\ Pp #`L2> rˤ_}x\1,s=OM >TavewV^_z7GU~DiHy`5|N'm/hOЫ]pWx%\ґPCj0miH7¶8+lm_"Ob)(a?>u}4\8ۥ5^5zF6-wդ]/'ѼBm"^Mf{9m-J$RwqTJʡ i$Lz{ T\py£nZUssG?5<WC; %V_5uFȏ} M"AMGb2SJl/' endstream endobj 226 0 obj 1386 endobj 216 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 155 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im38 217 0 R /im39 223 0 R >> /ProcSet 2 0 R >> /Contents [ 219 0 R 221 0 R 225 0 R ] >> endobj 231 0 obj << /Length 232 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU-y lo0%$G HwBH|&N7qǚRԕ޷ < )Ц [Q0vm ]`xJu,& ⚻V+.?xq ¼y$7]BZ!XQƐc1_}~ Z8 endstream endobj 232 0 obj 180 endobj 229 0 obj << /Type /XObject /Subtype /Image /Name /im40 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 230 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 230 0 obj 734 endobj 233 0 obj << /Length 234 0 R /Filter /FlateDecode >> stream HeRAkA~RvE0l!hnAJ=WBq/Woe&zt&̼{ݐ m{c/x{l,m :pV.-q#bȂ1H ,+{ɮ6 ZԺLe"QzQj<∉S ! wsُY#vRNBez.R4Z}V@dϠ]Dv_ъrzT̗/dnp.<-[lƺԊBRl V747Lm,)|Mf" 1AמspizpO'pjOƵ[f4'6 endstream endobj 234 0 obj 488 endobj 235 0 obj << /Type /XObject /Subtype /Image /Name /im41 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 236 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 236 0 obj 734 endobj 237 0 obj << /Length 238 0 R /Filter /FlateDecode >> stream HWnF<ڱE 8]H$R:ieIeAJrҺEٳ3g\DfQ& :ٛLr,YGh 5D'D k&hysgG8xUagS1 wy+!Rg&2 ?NtʽbSTseu} b}v&<DN.pݣMb1mSkՁiz\WBܻe{o EǂM+pizA|0=:BxL€+kRP+0пL2'L;:?JJz}Ԙ#ߘͬi+MeTrlUcL翺X;E'DעGYwCTD[3ޡW\* vVRj@Soycg"+&egeQ>N˺AEzlvT1/'V_(-4 ;7^lTNG.ͭ$~ӄ+`p/6ׂ+-ӞzVRl٧z~VvP yxu9E\|vt{,%'rGr9W=LmeQ>YARP!>E>ưRZu<>7ZΗv>SXA;RֿCr擇pNzcf7NzyI9KMd컽18S{i +򧨠t>Hr9DJZkX7n*;R,r2JVU tYA1 18B7FG DsR#J\@`22;F-)6Y\2 *.Ӏ ! ѣ' 5"E/?)4w&nUp~s.À=܋/r[yo~1O8a)o+:Zytn!tetλ@e0ZXKZ{Kj9ULw+rS#o$BwS_åY}s#=8Xx|[o*ZD*c9N{m]|/2IXo04VXӪi)-`m n sɂe ebwbuLd{ pIi]8/Z`M ]@aP endstream endobj 238 0 obj 1284 endobj 227 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 228 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F3 152 0 R >> /XObject << /im40 229 0 R /im41 235 0 R >> /ProcSet 2 0 R >> /Contents [ 231 0 R 233 0 R 237 0 R ] >> endobj 242 0 obj << /Length 243 0 R /Filter /FlateDecode >> stream H]AN0 EO;尨Nb'ݢ–AH nJB/ >%2437&N?cM)A? \ahS,CK%f3o\x$,Gyƃox7a>&I9m%*e 9hZ02nN Y8 endstream endobj 243 0 obj 178 endobj 240 0 obj << /Type /XObject /Subtype /Image /Name /im42 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 241 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 241 0 obj 734 endobj 244 0 obj << /Length 245 0 R /Filter /FlateDecode >> stream H]K1t%N/a=cYuݛKJ"> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 247 0 obj 734 endobj 248 0 obj << /Length 249 0 R /Filter /FlateDecode >> stream HWn7>&ǤIo@$gUYJv!I\ݕ+. X<ܙp89|W.ZtqJ6_~OIRFAŮU3&Vu:7b}=W^֟;l_bx," 06KSƀfɣ\7 ۇV4.b:f8ͺ-e9W-awy@+.j`QiĆI!;V@*{*Fε~,.MuF>gqI9l4f ?Z)a،o7wAV#A&#@h"8MČ UsF8"!F(#I*4k wX]<˂zƻdqhΕxr~t.5lQLؐ:es I&"%287[TSg؟MbI6! 9l2E*2 Lît̫'&)t$*&.R:S(l+\.Lr,[9C?b:-M9`jlx4Y}DtY (٨Y#HrK~h'^AQ6Q?~sᛅm1Fl5%8R"22-\? C xD]㘭t-Hk9$ekYfu6Q'+pHēc)YzV#[oLU C.eA3)%\ -œRw7\τȭp>^)B rBcCFx"0B ټYeQ0GL1 G9")Xc)Uk0 Kr5n72pװ^1S=@|* R<цT=.#<*]5۰]:-Tmb>gCy*6|iy{=|zƏB.PB\ sK=Kp`~,_yR3,4Jo!-U^3MghB]\eV?hZ"FVKYdUXjq>G4%';utӚtn./hO4+׺V^KkJ׉M_y|.\09 ޱ`]_*`U2x"gΟh>X)emFYY%a;2wY5s_/>CKcAl(DuL"YGq͇,%c{w0,VL쥟8Fp5ulð?}P͟c#7 endstream endobj 249 0 obj 1364 endobj 239 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 228 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im42 240 0 R /im43 246 0 R >> /ProcSet 2 0 R >> /Contents [ 242 0 R 244 0 R 248 0 R ] >> endobj 253 0 obj << /Length 254 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU%yf&f`hK iI6!큡 H _Q;G)IL)6X7Gx&d~? ơPZ7Hv(aPQiiy:#w ̛IƿQ:u(rC&2&r_^ YZ8 endstream endobj 254 0 obj 179 endobj 251 0 obj << /Type /XObject /Subtype /Image /Name /im44 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 252 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 252 0 obj 734 endobj 255 0 obj << /Length 256 0 R /Filter /FlateDecode >> stream HeAK@_ʈvk <Jڍ⮺RJx M{)TLaF"fΛU/"."碥4.T%I`nʘd;QkBAl:pmq& Nzy "cATbg3> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 258 0 obj 734 endobj 259 0 obj << /Length 260 0 R /Filter /FlateDecode >> stream HWn[7V4mb}VFɵSr}g#/e;Q€;g6 &BYhŋ][kSğK1?@Z]Pιyrn277\_רt6y3G{rbSXܼkvͫoU ?@`{_^j%͡fʬj ,j()89;h,;uø |P>rb^A`xXJКwfu֟ʙ{ݽ%xMs:W,ɳvis)jbgL'|\ln3jҐэ׷T]UKW{GyI %`aS5kn@CKdYbT1Zo6HYG~B0 ic8T΋մ?!KFNAR+mȅ^\Z;r }W4xPgTVݓdނ͇4)O("U6D9Vݼ_bsBBBrXXul(H9y=l[ه=LrWv0sU}D wl4Kv" X/`iuKH ѯq>#r`mK=gz;$/ُ>CQ_9f\EH:1kRj]ߕ]\zc|"9M2İz rveI3t5>pzu:޻N~x:%*4#8KKu涯1WFY#r\A"ŶzhRLã Ŝ<_;aKqA⃛i|jθE}A͢Ov}NV#mjMRN\Bswv?>z8̷\uE4={°cUS[O"Gau3zSTb >ڟ~6C+Ke?v}&{'݉Y,,lա|-xykXCZcZ 5DnI!() <&)&XiU-4 9ҟ|Vdp s̞ /3d 4 }iAjC"Ҭz-7AP5Rz Ysޞw}pKq8xy X_\*<|U-ٳ`,k|?`XOaK[$ hpd6;Kы#L$M;e(LKZib(#6߱Y;/Fp# }SI?8{ڭ n|r-Bȟnv,5?Z÷.˜7@Q&JwD{8Dp'4WT ]ߕo>CW endstream endobj 260 0 obj 1655 endobj 250 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 228 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im44 251 0 R /im45 257 0 R >> /ProcSet 2 0 R >> /Contents [ 253 0 R 255 0 R 259 0 R ] >> endobj 264 0 obj << /Length 265 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DB{YTQF} cʗ ݽY8 endstream endobj 265 0 obj 177 endobj 262 0 obj << /Type /XObject /Subtype /Image /Name /im46 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 263 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 263 0 obj 734 endobj 266 0 obj << /Length 267 0 R /Filter /FlateDecode >> stream H]k0ǟ ս]6XqA&c-e9J顇RmAF Gr,'fCɃ=Iqy_}ߓ,яŧ0Y#']Y3k?;=Ô7\|Db!V[;]ϖU#dkr endstream endobj 267 0 obj 478 endobj 268 0 obj << /Type /XObject /Subtype /Image /Name /im47 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 269 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 269 0 obj 734 endobj 270 0 obj << /Length 271 0 R /Filter /FlateDecode >> stream HWn7ސcҤ7 h質%+PrnܕD}va̙kzv`"!Gc` >~R,4'?:iY]69roL`K1Flid3W.AM²%IýYrM$Zve^=nۏǷDDT ~J@^ՊChάjā f4IqhǼq@eYӈ 豈,l(ekޙ+[1+g~w'qE1,FYHi8ִp|3sqOܜ Q8B24ObDK/.I= 9;BNZB42YWt,mcRt\A $edE拼B$(ghhCF=;/΄B~#ڇJu{ضysj \яpvߏfeU,@N?^Β9OЊiqd `ϓ+D nU `^@\֛z+1Q c:nƊ&CB^B~ay}7ލZb r[/Nh)ϧ:D}:B˙@i1@Zf# a1b1Ku5d:̀ bhtx'\z>=[K q!si z0!1캤tI*tA^ƒ2ӝ(#hDFtOyr >q8#?x Bz;! WM1L3t8&M>hulTy@j) 𪬮Þ`:S=ߕ]:\Q_O䑟P&^i78|kTű%z6+539$k$G^xp9Mxbqy|]g X}P{ܻy|~Rsjjo>Q{K_ Ewq,Wظx|.^>3Ϙ_k87C!f-|h3]G/ؠpfX׊gEZBe{_tݮsN=PJY(eC5{BiU8&dG=$i5q1!TИnC Fo9Y2!G\8ȔLeҧKCihU%:AemVE1'f*$)s͎,\)+/HFQ4E!GZ~0DY5= jqj5{ߛgL/>利7t2ŀ6[&:ЯKw'ǀ9i@fl֯z(vKg^b"Rioqe5ܠ {b?ndj5\ 66n7YO~7ހEܞ>ynH6mJ?#n>~f9t15':J@# >_n~סӨ%_b endstream endobj 271 0 obj 1696 endobj 261 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 228 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im46 262 0 R /im47 268 0 R >> /ProcSet 2 0 R >> /Contents [ 264 0 R 266 0 R 270 0 R ] >> endobj 275 0 obj << /Length 276 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7݇@.&Mzx_1c7Y8 endstream endobj 276 0 obj 176 endobj 273 0 obj << /Type /XObject /Subtype /Image /Name /im48 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 274 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 274 0 obj 734 endobj 277 0 obj << /Length 278 0 R /Filter /FlateDecode >> stream HeRj@E- . c(ԛV쀩ĥJ%CCQ . zrXʲ!!ӛռ9@ܷ hf \"hqyXqm(<~+d٫A_ eHъCے_c`ܣ;=zs ji8Xb]jEEJlm*> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 280 0 obj 734 endobj 281 0 obj << /Length 282 0 R /Filter /FlateDecode >> stream HUKS0[ ɖ 3=9rز+)P}W$3eﱻ `Y*8˂HJ3 9~,`qqC+ö(-]ӌ~庑p)-ׂ XAbl"cb-f8*>[';/i Gpù?ini{ |2LNǴ޺5r@'5f;.j7Uhmddo!fy_8ԑw.sSMf(?.@Q#VUo*N*+WuA[45J?9C+w7,uAF֟l?hｴ.^[;ʍo=q"EtyqEC#lz  endstream endobj 282 0 obj 788 endobj 272 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 228 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im48 273 0 R /im49 279 0 R >> /ProcSet 2 0 R >> /Contents [ 275 0 R 277 0 R 281 0 R ] >> endobj 286 0 obj << /Length 287 0 R /Filter /FlateDecode >> stream H]N0 D 0G8Ԍi• P+zA$]i-{$YOh]"a(LAIŭ-qǺI}A9‹P9#Tcnr',GԯaPk|}}CAɻ)ǿ1s trҭ`"}nF̗ Y8 endstream endobj 287 0 obj 179 endobj 284 0 obj << /Type /XObject /Subtype /Image /Name /im50 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 285 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 285 0 obj 734 endobj 288 0 obj << /Length 289 0 R /Filter /FlateDecode >> stream H]RMk@UI6RrJQ삩%ͦJ %C趔KLG[鯐!^E.Av?2bVOo̊glg{KM[9>#xC m I =T[|>=>9{=2ȕRYD2W4Zq É ?Hc%WmO,DI}7F\X # 8*,kF;^^{c"t%Ӣ(-r39+B!=Dٟ _EY.pStNS>flʺe]EIǰ^+m*ث؛h9b2AD Tם4.,[J rdEw(`Y=] جKUԫX5 ϶uB Tc$ܐґ4Pj+L۵M֤&? 5^{XfӳEz?" endstream endobj 289 0 obj 488 endobj 290 0 obj << /Type /XObject /Subtype /Image /Name /im51 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 291 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 291 0 obj 734 endobj 292 0 obj << /Length 293 0 R /Filter /FlateDecode >> stream HTˎ0.g̮m:VU#u "NDFըRWXp| dw hY(f 9))C3 1/kN)ݏ EBI%S nRZy5ϔi1r,KiS@ w;c P;;TG¥ׇK6͇sW<rFt< 㲎zхH&7db*5)ukl5g`8UtTEjT/HtGJIR.lExȂ0nTXFW ONpxF7>cWʤ)tp vʹ}ĹZCхĀݼ]?TBJ>!]/kwM|d &63QTN:Ruήڂ U&sN5}m7R#޴FUCsTYӷq'{bvY{ڌlˤÍ->_!HTJ nH wJh7 nʹe|$@@ endstream endobj 293 0 obj 556 endobj 294 0 obj << /Type /XObject /Subtype /Image /Name /im52 /Filter /DCTDecode /Width 130 /Height 130 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 295 0 R >> stream AdobedC    !"(($#$% '+++,.3332-3333333333  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_RL i{F RLpӏQ[$X=o=3:<|fd1,Ǝf>32M^7wc]T9ib:Z땼PS[CKh iк]↺e.%|uUUyӒI$I$_ӒI$I$_ӒI$kaqONֹ >;걟MU6ψR}Vψ_ӑq\Y&7"L 7"L  ,ٴu̴w<򎱍GRnc]c#tGMV\9ѣuPzemY s *n ._tp4U[. /ӒI$I$_ӒI$I$_ӒI$I^k} |>;v6&=r }a>}מwMǰnA/0vϲ:ʵunUkmh}V{7F~[]U9ʬ_*אt^ƲiznK˜ h@=JlNCrp]f^-Pd1vUj%xQdda1vUj%x_;m}.q[k~e6^\?̠׌M[*_atj)(=K+$J:E2뤲H*q]+( ]wOGzžNv6A$28% ^A 0RI2I$I/ӒI$I$_]]hsWu뾍\r)adY^$GU}gzuWXY}'M~=ePR^WP~`ԇaחn߿*vX,sˌe{qYcw.2eeUcV E׏mTosX 4tƨ9[^=UQ1e`^@IOңspKSHѹm]:N9T>߯؟^3n uwz7=7k9I*>Q.OQ"ڿF絶v4:zL$J#{gD,B?w^+Y\/}޻m/ƍ Ы_Suٽ{c6\cFLhU+\c8.$/C=ÂB{\k8.$($KӒI$I$_ӒI$Iy׿׾uʪv Xs_#G4Hu{}{\`ѕX}.54sK^8!yׯ׾ʪv Xs_#G4Huﾮu\ѱznvCwq <wW:OXB7`!K jϫW't|^~]CO`r5B_X31к Lt.d?Sj]6zEͧa4%w6D|ޯgZ,vcI^Kѿמ汣FOh}y~cG/ G+ɺ7]qk {Ǝ_!Dj WIfkCIh?V[WvaVOA /6\VS}AsG6}>/6\VS{鮂lѣx. Gͳ3k4hpZ Ah$I$ӒI$I$_,h= {zl5q1b Rp"&kժlhĸI?5VGs .|Lmf;,Ϫ'7pRޫw:vU-Z7^hׁzzӒI%ԞޗǠu^+:uC}GR{z_x+ן i5ԞޙǠuCy^NHoHNYUXCJrq*Uua*vAW(>J]ySso! |rD?rW>vM$y9.YtΫ_&Ӌd it8'<m.u$I$ӒI$I$_ӒKVȭ6 DKt\ugR ]WHNm{ Vu p {2jN#]/t}L=^斛^uҺImiièeӕS:o[~7PUOT5_kNx >ٞc:hnکS(=COgiZVVת^9y5 כYK|5ꗻ^MBn5G  BKg/&7`k#ipy#.n/QƱČѹ)O`ໟihOIl]v~rˬYun3aYen38> ~C PkqVGGI$ӒI$I$_ӕ~=6k}-sOc<Pic)yaag:*weYm,~/,,=:/4~Vϙ1RM7\ %ci-2?0eyOs|ܜ'e jEs?DX BY(7ۅKQM?yh/EY(7ۅK:"mĸ#G|z/FGQ,_in%na=c Z1p'3xy} un8A^^^F5B[W[ɳt_q{O7>Xט[ɳt_qs7>|V>_W2l]/`;WuF\åϟV>nsX95InsX95INsX95I~?X-u_Wഖ"~w?X-u_WഖE,o+>Z꾯i-S:Y>W_V/ÛqY{ݍLL |ORUο{[m [7H#_t)}G_ÅQ- Ȁ$v^w06W4@hWwc `|mW:dl0>|BY6U IK.=2"?It-q$stVu`ƒ9TՅaӒI$I$_ӒI%|UC+oIw翶sunfmwaV0Pcr]+fUn%@0{WzPͪ;][˚ #Wq׻/.UNŧ4B}^w_ӡ~-<9_W^~+YbkshkyQX}⹟f/֪'6ַue>~+:g֯W`ɿ Ai%ۉn>ApX/ '=SZ-{@\&:0}qku`zy.=G^=7Sillq>n&OzGt>;멃 Ը'tZ:LO\OVm$I$ӒI$I$_ӒI$I$_ӒI$IXkXUcO8A0W?wbSu6Zon \pٺ.xNt0Jٙ__rǣI'󬭂|5Ϫ99X].m'޸99Xv;\?z Mbސ.zuw_CCskyUCCI$ӒI$I$_ӒI$I$_ӒI$I$_:v W{\5csk Ok^Ljsk+Kiu5ߊ-]Ơ9irU:W쿭_[oЫ"cE p .cJmb}@#җl1s0%ӮIӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӗ endstream endobj 295 0 obj 6207 endobj 298 0 obj << /Length 299 0 R /Filter /FlateDecode >> stream H T B^C=#SC =sS#CCKS(U!C!\!*#CC=S 54)260J$*g+) endstream endobj 299 0 obj 86 endobj 296 0 obj << /Type /XObject /Subtype /Image /Name /im53 /Filter /DCTDecode /Width 119 /Height 112 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 297 0 R >> stream AdobedC    !"(($#$% '+++,.3332-3333333333pw  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?ӒI$I$_ӒI$IJcX$&1t4IRcmh>4{ zE=G_sh:-tc#^OR7)Ϣ]0ƻG9Z| 9Z| =Z| d)$ӖW[NmnX f875ۃpBwW`C'Fpt8b _[Nd6n D–7^uVn 'JXWqzOS֋jX wx$y)ct ^uVn 'KMi-%ӒI$I$_ӒI%okYY݉o-̐dvSf;c!%溓J.>$>Q?OWo=dݶLL#o,~ؗbgUI$I$ӒI$I$_Ӕ<5 U7aNcL+UQ,cЗ %rVQ]'a{ٸÓE}`镅ԯWA_c79xOcc$ZW>mVUS^Y,1˪G*gаc'ӑh w!C#/\Zl[0A{ |\[1ri lpAB ]cc/q>5w[G<ל}{3 c{wUֶ uѯ7gz^#ّs1轡;utgYFZQe<]UNӑ;c@RsC?{+'ĩ9={P1Ůئ{Gb8;ɔWӒI$I$_l[]sUűL[]q>ɘ.5W[ʹYm%1x'B.scgZ,Ŷ+is^ Х{O=Y;_q2juY7ӭ`eEm-ӖF/+?nJwU~ Y+]kuc Ȣm} 矐'iuu6܋> s8RP.˻&n}.$e[?6˲nvOOl#i]ԌΗ^Mg-2οЯu[G!/}P8y,=BʩοЯu[G!0גWbacĸ^Ӱ+.51۟WDDI$I%ӒI$Id}iS(NG֟2Xt۩d}iS(NӒI$Z(78뵭UZR'&UmeTD et3}22/G1;&c:j?V,~%~$2wDҹ}WUnMwi9NC't@+K}DNP:[[mV=Ccj{ 2羽~ wN n˞.%;',|+ڗ.ۀt|j\ЮӒI$IZI1 % h% _{ƌ7 SrWelS쮸:ӭݙk_N\PcK sH+_}l#h=]ys %1ί@{v!sZ?aӿn/?eR֟2Xt۩kuӕS~ 3koՌXy7_Y[s~d!V,n /8kKis1m5/?aXְotq&'kb; +\kd Ę_ӗ-r:?Ltj%.mNi͂>'o퓑ֱg;cUey,xqsjsH.ly?elS9;>+cËSAs`,G׾uԮWְ-l0[ejN̞p}:|vAkeĞI/Ruwd+㵬 [.$L]WzӒI$|[[ Koh0vD*P}%A?cS]ck0 ̚gt98Q&'> ̚`,sp*LO%mѓXYs ոXYs ոFN>Mb-e&7VG*}nz^wA0Asf; GY>956.%t4H?ZE#wPƮ\J6[cBcaV.%sP-Eh9ĒdI[nsIqy%msdIL2ZV8N^쌻TDҲ10`$Iq=t3Y}3LyxX}Uƪgk6s;d#d}U?U1E6N<G DsKIA斒4!2dӒI%]:Yn+3qܜG͹էȬ"q\Ed}huN[g'nfui(^_m/p6w;g(N_m/p6w;g(N_m/p6w;g+ֳ~uzNٙ[ُcZ>ot{+?sFG\ꍙ5V@'.?q$mϩrӪ6fVc֏[ēF}XlsfJF} jg˝2Wo:67D}7cV?\I/GWϝʚ}Y;1E˭_>w7*jcދBФJ1CGg+y6s1DN ?llQ"SBc\T:n.F^v=^901rraC=vGX~2WgH7'A=+'p9V?4ɒ>Wt/XY=@7&`β!Le^ƍ4?[zzE+]uϬ[zE?!\䓯uOٵݼ[:o-Q;{zo W|EV'.1ەw0[`|Dˮ}_7Llv}6VD$!b}r빟W S_gs ,& H\0,;7>`˶Zqqݓ~NXcX1칯Sg7`[}7n}9mӒI%>tYU.Y .<1%)XXGg.=_9p1NEad]L |ׂiçco:yӳM9n(%n'r|U.UQNqV<0ɀVz~V[EK[&K'ӒI$I$_ӑqZ;Ick p:8naF23:vCPGֹMX9?Vۘ7eV@k̀[:V_ɫ? Y~{srs}7A> ̞K`}Z?oncpUno^H'dײD[\Zʲ}R/jN~f^+Z][(1Z -yy^kǩ4=w51|ez5xn Lv춼zmcCqSӒI$I$_ӒI$I$_ӒI$.dSf];cukݓq~52Tty gu?q|H _XYHzGN]7TCYcήhޓz=O&Ɓe2\h*$I$ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI% endstream endobj 297 0 obj 6102 endobj 300 0 obj << /Length 301 0 R /Filter /FlateDecode >> stream H T #7{ endstream endobj 301 0 obj 13 endobj 283 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 228 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im50 284 0 R /im51 290 0 R /im52 294 0 R /im53 296 0 R >> /ProcSet 2 0 R >> /Contents [ 286 0 R 288 0 R 292 0 R 298 0 R 300 0 R ] >> endobj 306 0 obj << /Length 307 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsRn;ӂ$$')CΎD0dZiu D 7zCC"p/#ĺF:^=V>O<;az$D]v8 *h4c Sr4Z$8 endstream endobj 307 0 obj 176 endobj 304 0 obj << /Type /XObject /Subtype /Image /Name /im54 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 305 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 305 0 obj 734 endobj 308 0 obj << /Length 309 0 R /Filter /FlateDecode >> stream He1k1ǟ抩ⵃ4BsI]09'qi%СRL EùҏOЭwxȚ%tOρ Nxpܰfku#Sv,z1Ţ=΢1=g!z_Oǯ|=.j]XDd̹'3Ŀƌf[ihM'> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 311 0 obj 734 endobj 312 0 obj << /Length 313 0 R /Filter /FlateDecode >> stream HVn0M[o- -S6-HwHS#h=3o޼77X|zX RV$y p TIxE7X0Vc᱂G5n7W}mXm:(m ?4)i^SNKR QCQ-$me:nh#uv AnTgGwHp 9Xffh[){u-E N^sePyL@~?v+ endstream endobj 313 0 obj 801 endobj 302 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 303 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im54 304 0 R /im55 310 0 R >> /ProcSet 2 0 R >> /Contents [ 306 0 R 308 0 R 312 0 R ] >> endobj 317 0 obj << /Length 318 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$Dmv=,P(Jӄ1LqRCwoZ_8 endstream endobj 318 0 obj 176 endobj 315 0 obj << /Type /XObject /Subtype /Image /Name /im56 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 316 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 316 0 obj 734 endobj 319 0 obj << /Length 320 0 R /Filter /FlateDecode >> stream H]RAk1~QZB vPڮԽA=>9{ ^#PKk7ΠMt_8CGjxbUK)Cy A;r @U$<ʭLeveqԱ cf\\|T/uQ2@8R 7UE%X"e9J)"U!RJX?ϻj~X畊SڪB25{JՊ: o̻(gӵj&;,&pi%^Юצ- ݂7,&Nf컽ђvC,H0o / GsnOp@ĺA endstream endobj 320 0 obj 474 endobj 321 0 obj << /Type /XObject /Subtype /Image /Name /im57 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 322 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 322 0 obj 734 endobj 323 0 obj << /Length 324 0 R /Filter /FlateDecode >> stream HWnF %ٽrw{ :NBPARv"Yڕl'F/~lq9s̙?Dsɴ"drB3*$4:W+cHsA&_bVpLH9O)oz;fN/zdxfψsV'h)n7le}AIm=*5yJqnwÇpc皺)2p;n\??RyGBg=AG@2UtyR֋jt!xRGb#be@T]]U]#jalj@3'rI$L(zVF.#Z)32<֓F8 2 AJ"dD.rLfYFkIYCvWq@y0f˲mݺae,)w᱈f\u]ݞwnZtHe%i Tqg,ѸXǘ&9'R*vuדH€g>.;j<8m%8s3m9cCes+0w aM$i-.bI NG!.cr3Ο,|} C|,6uX$.4DJg!( 1Q 6;y ~'@!.\wqEz02I҈˖s S}dB]S5`ܥDY:vQv/6K{еOQa,G3e~=!ôC|E"xi;tYMkr~/O <+ hݾzX,Ǣ^K&ۧ9Af#'N5ykdA1&{@WF)Wd> $tEw vqJL>WLc|E^NOf/<D~0rUA6ߺb5+ųψ H ,z̕z㓓_3s5jv?lW+̧b᪳a&Rp΂Gz~vￜd q8l Y ͧhȸ0OHU82`s5|PO_V~墿و`#I?oȄdbȯ+ьS+|qI&gOaˎMk=O yxP[ɭwI6{3{}jv: +g#L86n -kGߧI.;u tkS3hk-Dž`hg먯7#Xco-*yGijکø X 8; OZjeE3=mc ׉ PЦM}3p_Y(SW/ːr?nΕ; 7}s_0 zaz5ߑa .jG,%#?A{!`+ٿ ;ȉdǢP~FL()G(ẨovfI1O+gI6ye0 utKNt4}2IwWH4\mwl3qF}&б9lxuI-Gټni<zͬ WD_A;M*n7[PEfU o¢!D ls Cf.kdis]YE"Twj[^kX@EW]]Kw 7˚-[$Osjwl[8HMםEHdnֵج |up,Rn;GRMSvY W endstream endobj 324 0 obj 1774 endobj 314 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 303 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im56 315 0 R /im57 321 0 R >> /ProcSet 2 0 R >> /Contents [ 317 0 R 319 0 R 323 0 R ] >> endobj 328 0 obj << /Length 329 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7ݧ@.&Mzx_1Z8 endstream endobj 329 0 obj 176 endobj 326 0 obj << /Type /XObject /Subtype /Image /Name /im58 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 327 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 327 0 obj 734 endobj 330 0 obj << /Length 331 0 R /Filter /FlateDecode >> stream HeRjAv;,L`z3 ,5YѽD< 9= 3x|H.搫a/{@Vj㫯jP<脢k{N۝P ?\>abˡx#61ॐO'G>GCg3Z{[Ci/.m`2/#M! H_`_ch}L3鹚;'9w2tDL YP 60Aj+vDe_!W6/5}o(|tx_7,{2^&mnȟ24Fu! vӇi5Dc0N1%-kUet8/z#]Ma(-av.6YkQsjŬԠ_ y s͕ %BlK"*1A%i W";x:jޙGˁmi'* endstream endobj 331 0 obj 483 endobj 332 0 obj << /Type /XObject /Subtype /Image /Name /im59 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 333 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 333 0 obj 734 endobj 334 0 obj << /Length 335 0 R /Filter /FlateDecode >> stream HWnF %ݝivIB" `TRQ.41!̙3g.|fO3I C)!RpfDEAښ#~|I)<@w3\2Xnʦ2`H8aϔNo w濙vnPp){J8["߄uۚ]ݔ]o hO@ѣgX4`LXM^Lj*&ĈjMWwRH º9!ъ0!{tXt_]o#6(;.xdr*2c3G48c<E[Ӣa]VX 檘r{mF]Mx@8IlMYo.9y݁ Yc1EQգӴ.#$#S5oδW&qNջ[3MYC%yD)psayL "$sc}B'y)M\DAZSF,( ZL=1Yx7m`1qm7`1}!'Қ[j("*UvKH2Ȼ2qrd*`QtN)w1崒lLI>8MqTر[LcɚSn!fCH"M_ƽxd}. Bߦ}/Y"q*$RgSY]y^C_-0S%829U.n ܔ(~ ]8/c>z#O%IY;s(!N[£!;48q5ZӐ_0e='2*[t~8[=?}AG½T)Whg& "ʋ= P) rjh5ޏAԔΒ+zmyYUf{Y p@ǐ@) C/_\ttqM9sȕl9'ɢL,12Er/–oZ{Y N# Vap> /XObject << /im58 326 0 R /im59 332 0 R >> /ProcSet 2 0 R >> /Contents [ 328 0 R 330 0 R 334 0 R ] >> endobj 339 0 obj << /Length 340 0 R /Filter /FlateDecode >> stream H]j1 D0ȶd5l{!-)} R$^]"a=P4[_nc$ڝ޷"%#UQj]`x,C }LZ6|;}]GD昔|x(rFI@)! fb=/Og'pZ8 endstream endobj 340 0 obj 179 endobj 337 0 obj << /Type /XObject /Subtype /Image /Name /im60 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 338 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 338 0 obj 734 endobj 341 0 obj << /Length 342 0 R /Filter /FlateDecode >> stream H]Ak@_L4^KaMz`/bWYR؊^Y 6Fճ%Zh[|m.ֺb헡ҽW#> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 344 0 obj 734 endobj 345 0 obj << /Length 346 0 R /Filter /FlateDecode >> stream HVnF/ SruWɣW<KMj뻋Ac6|6ADaXNMjlS|DwvyzzV~*u)2*Iƾ,*U?cKP5D%G-l X$z"Z$~6uwݵ*{fM3LL׫oȘ(g{5B䲤Ծ)E0R6~ UB$ (t7)xهd۟<+9b"IH$!DNC I='M'XCa|1#!s^z 7x|||,-!B+J<6/,P3):#E,ec3^[;MZ7`:8ֶsaЮ <W9D׌s=]M$?TnҰue4TIv lˁLVβ-Y%f Z7<t3E/̿- z:D8|yIf(WD4َ kcwo\Cl"lDIKax)ARwNX)FwٿG endstream endobj 346 0 obj 951 endobj 336 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 303 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im60 337 0 R /im61 343 0 R >> /ProcSet 2 0 R >> /Contents [ 339 0 R 341 0 R 345 0 R ] >> endobj 350 0 obj << /Length 351 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$De@&*M:0/<{Z8 endstream endobj 351 0 obj 177 endobj 348 0 obj << /Type /XObject /Subtype /Image /Name /im62 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 349 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 349 0 obj 734 endobj 352 0 obj << /Length 353 0 R /Filter /FlateDecode >> stream HeRMkAq -zXƓ f5+,M{3xYr!8z#,b r s5@\BNPl8eWw6Xo^׫.o.͵b1oEB͸%[sn 6+юyL-=_ > stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 355 0 obj 734 endobj 356 0 obj << /Length 357 0 R /Filter /FlateDecode >> stream HUn0\ $%JhҠH=4=02cIE;;@^ҋE۳e ɇU"LENHJ2ʁ(r|yYB+R%I)8k Y^qg9Fzm W¨HR,ؐ5$3V abҌj,͘C'UǴ%/,&_ex5Y9A4 FplV!<ȵ5Famu-QЦ5ƓK1`YA/R4)/K?S&]|𸀭t[Avsvܩǹ`%9Ac<Ȫ]#w aA;;T'<)SAZqn;M[eIkð :C=y`IMU9+65fKx9ɘur MQ1kUq!5J};V7Yh3VJ!s/cUxМM!4PD5;fp3ok |T endstream endobj 357 0 obj 704 endobj 358 0 obj << /Type /XObject /Subtype /Image /Name /im64 /Filter /DCTDecode /Width 130 /Height 130 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 359 0 R >> stream AdobedC    !"(($#$% '+++,.3332-3333333333  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_RL i{F RLpӏQ[$X=o=3:<|fd1,Ǝf>32M^7wc]T9ib:Z땼PS[CKh iк]↺e.%|uUUyӒI$I$_ӒI$I$_ӒI$kaqONֹ >;걟MU6ψR}Vψ_ӑq\Y&7"L 7"L  ,ٴu̴w<򎱍GRnc]c#tGMV\9ѣuPzemY s *n ._tp4U[. /ӒI$I$_ӒI$I$_ӒI$I^k} |>;v6&=r }a>}מwMǰnA/0vϲ:ʵunUkmh}V{7F~[]U9ʬ_*אt^ƲiznK˜ h@=JlNCrp]f^-Pd1vUj%xQdda1vUj%x_;m}.q[k~e6^\?̠׌M[*_atj)(=K+$J:E2뤲H*q]+( ]wOGzžNv6A$28% ^A 0RI2I$I/ӒI$I$_]]hsWu뾍\r)adY^$GU}gzuWXY}'M~=ePR^WP~`ԇaחn߿*vX,sˌe{qYcw.2eeUcV E׏mTosX 4tƨ9[^=UQ1e`^@IOңspKSHѹm]:N9T>߯؟^3n uwz7=7k9I*>Q.OQ"ڿF絶v4:zL$J#{gD,B?w^+Y\/}޻m/ƍ Ы_Suٽ{c6\cFLhU+\c8.$/C=ÂB{\k8.$($KӒI$I$_ӒI$Iy׿׾uʪv Xs_#G4Hu{}{\`ѕX}.54sK^8!yׯ׾ʪv Xs_#G4Huﾮu\ѱznvCwq <wW:OXB7`!K jϫW't|^~]CO`r5B_X31к Lt.d?Sj]6zEͧa4%w6D|ޯgZ,vcI^Kѿמ汣FOh}y~cG/ G+ɺ7]qk {Ǝ_!Dj WIfkCIh?V[WvaVOA /6\VS}AsG6}>/6\VS{鮂lѣx. Gͳ3k4hpZ Ah$I$ӒI$I$_,h= {zl5q1b Rp"&kժlhĸI?5VGs .|Lmf;,Ϫ'7pRޫw:vU-Z7^hׁzzӒI%ԞޗǠu^+:uC}GR{z_x+ן i5ԞޙǠuCy^NHoHNYUXCJrq*Uua*vAW(>J]ySso! |rD?rW>vM$y9.YtΫ_&Ӌd it8'<m.u$I$ӒI$I$_ӒKVȭ6 DKt\ugR ]WHNm{ Vu p {2jN#]/t}L=^斛^uҺImiièeӕS:o[~7PUOT5_kNx >ٞc:hnکS(=COgiZVVת^9y5 כYK|5ꗻ^MBn5G  BKg/&7`k#ipy#.n/QƱČѹ)O`ໟihOIl]v~rˬYun3aYen38> ~C PkqVGGI$ӒI$I$_ӕ~=6k}-sOc<Pic)yaag:*weYm,~/,,=:/4~Vϙ1RM7\ %ci-2?0eyOs|ܜ'e jEs?DX BY(7ۅKQM?yh/EY(7ۅK:"mĸ#G|z/FGQ,_in%na=c Z1p'3xy} un8A^^^F5B[W[ɳt_q{O7>Xט[ɳt_qs7>|V>_W2l]/`;WuF\åϟV>nsX95InsX95INsX95I~?X-u_Wഖ"~w?X-u_WഖE,o+>Z꾯i-S:Y>W_V/ÛqY{ݍLL |ORUο{[m [7H#_t)}G_ÅQ- Ȁ$v^w06W4@hWwc `|mW:dl0>|BY6U IK.=2"?It-q$stVu`ƒ9TՅaӒI$I$_ӒI%|UC+oIw翶sunfmwaV0Pcr]+fUn%@0{WzPͪ;][˚ #Wq׻/.UNŧ4B}^w_ӡ~-<9_W^~+YbkshkyQX}⹟f/֪'6ַue>~+:g֯W`ɿ Ai%ۉn>ApX/ '=SZ-{@\&:0}qku`zy.=G^=7Sillq>n&OzGt>;멃 Ը'tZ:LO\OVm$I$ӒI$I$_ӒI$I$_ӒI$IXkXUcO8A0W?wbSu6Zon \pٺ.xNt0Jٙ__rǣI'󬭂|5Ϫ99X].m'޸99Xv;\?z Mbސ.zuw_CCskyUCCI$ӒI$I$_ӒI$I$_ӒI$I$_:v W{\5csk Ok^Ljsk+Kiu5ߊ-]Ơ9irU:W쿭_[oЫ"cE p .cJmb}@#җl1s0%ӮIӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӒI$I$_ӗ endstream endobj 359 0 obj 6207 endobj 360 0 obj << /Length 361 0 R /Filter /FlateDecode >> stream H T #7{ endstream endobj 361 0 obj 13 endobj 347 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 303 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im62 348 0 R /im63 354 0 R /im64 358 0 R >> /ProcSet 2 0 R >> /Contents [ 350 0 R 352 0 R 356 0 R 360 0 R ] >> endobj 365 0 obj << /Length 366 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU-ٳ no0$!d6!<C)o9#$W ͌S`$Lz3kJQ7ЂpRMAA*1?#I&Wk>08ʫkZmv~~~!Awzo`JGC][^n~~Yl8 endstream endobj 366 0 obj 180 endobj 363 0 obj << /Type /XObject /Subtype /Image /Name /im65 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 364 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 364 0 obj 734 endobj 367 0 obj << /Length 368 0 R /Filter /FlateDecode >> stream H]MKAǟu.K饐o]ntդ-HSe )YɱKtr81i CYq^ Yv?>]lU=ZՂ:ۨѝ6X#. k5gRo}??=xmxӇIDܲ>|:A+ V?dZ:H-;Pĸ Ԯ0]ҋ^X&e='b;Hh[Rbl/2-LF^w֋%Ӽ*8E2qRxGO9BXH)wiNIx$6%QtN& C^sƑ0ƛACEd\ɻsTAB(oޕѕ"Ztv0'du};z4dzJ^*W-)x S QGam:̈9%x>j 0}^]w6k}S endstream endobj 368 0 obj 477 endobj 369 0 obj << /Type /XObject /Subtype /Image /Name /im66 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 370 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 370 0 obj 734 endobj 371 0 obj << /Length 372 0 R /Filter /FlateDecode >> stream HWn6< !)B)P mK{[Ia/J:Ek%+Eۙ4\W˙@ ,Z c;rͮLHŊsqW_2,h?nfm7JbyD\ΝR s,~koK]z`WfTʢ9Vѷ8JQ}m±0ڃZ*NzMc<$Bum{]mB)b [ID\'%5d4,^?Vͽέ= K|fdy0a cBfmý7)n桘)7gghdGK_3T b /uۭ]杯ﶭݦ^^5/5<k-swG1) -JA2& (шG5!2zAc@X9/pzw|i!-J$jEyQ"ZF-/~/`p T ikj;{Wu%Cf;w*u!)"N12.]mkZX])6r'{Ny08(1Nv-[ [X-{͍w ۮn(}}jSr:R p񦶾HKň #^DU:9BX}Cuv Pi޶$!axפP}kTT1G*13O?BYR&GD$BR xA v/LpIIMbUrܒB22|6*SRBUa[u4)w6OW8G[ }wvr0O:"E=o2(@ܿ\O dE')P?q완ZnMGJ# m$_92R|6lfޜAd"-Qa )R˭~*g18kZ;h$lP>!J<+#p' yFRS5  DS)b1-}Y9%PYSʊV47j endstream endobj 372 0 obj 1287 endobj 362 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 303 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im65 363 0 R /im66 369 0 R >> /ProcSet 2 0 R >> /Contents [ 365 0 R 367 0 R 371 0 R ] >> endobj 377 0 obj << /Length 378 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$Ddv=,P(Jӄ1LqY8 endstream endobj 378 0 obj 176 endobj 375 0 obj << /Type /XObject /Subtype /Image /Name /im67 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 376 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 376 0 obj 734 endobj 379 0 obj << /Length 380 0 R /Filter /FlateDecode >> stream HeRAk@~c ٍk{xRz= zWx_ 9ڟ0e/{Č&]/}{I{~b ٶvuuvCvt, )#ؔ׌+ 7f1W 9;3#!@!{mom0T"v >_8^]ѷ%6puK6xp~Xb([AZ$@V"@*BrC 0E9sM0h[_XDv"Kמ\"d/M,BonoRS D±bUO@#пu[&P+$RjC#Vdxͺ[(^5.7(&8e)~e6X~5E l 7|:Ϗ dm3?9Fl] endstream endobj 380 0 obj 478 endobj 381 0 obj << /Type /XObject /Subtype /Image /Name /im68 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 382 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 382 0 obj 734 endobj 383 0 obj << /Length 384 0 R /Filter /FlateDecode >> stream Hݎ00f; ެi!bV7MXEդs_`n MÂeLp ,:W+W53eu(cxQW"V,Fhx[=VT%yy(/!cː;~t; .+ZA+K"}߶v뛾V``7㰈~/=45}crDB\Uc+gj%z`+> /XObject << /im67 375 0 R /im68 381 0 R >> /ProcSet 2 0 R >> /Contents [ 377 0 R 379 0 R 383 0 R ] >> endobj 388 0 obj << /Length 389 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU-yf&f`hK iI6!쁡 @ݿDfd0btu5B 9~Co> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 387 0 obj 734 endobj 390 0 obj << /Length 391 0 R /Filter /FlateDecode >> stream H]k@_L4^ċsdMbvm=)=PE$.Yo_1!x:۽Adw }a&|;37 -ۏ㈴ih;VSw{8< IpG6p%/Ɇp N߽>ý._@JJk@9T3=չ0_|o]C=chC5wnA~浇pxȬM93Bf (fPůO?VTydڋBMDJQc2('t&tOr1<|:*!EmUUʀe֫,ԫLFz)D.ＤY .$PO{sAdyL'0MӕU@gOج+.jPKE]/h:_V=[\DU23MPٵDX8nݝh;97Gˆ~Ҳ-}u endstream endobj 391 0 obj 490 endobj 392 0 obj << /Type /XObject /Subtype /Image /Name /im70 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 393 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 393 0 obj 734 endobj 394 0 obj << /Length 395 0 R /Filter /FlateDecode >> stream HWmo6T8EU$7d@dCYcb l:qH,$Ȇ_$y[/d=^F"AU&B0#\W.B }A4Ϩ5[甲#48"z(&(f8 6'MyDj,pF1iӺAޥXO[l̢YW30E3&LB8RRFD92&Id1X45ۀ6gYUU5TEd&Ry?x+fm,7G>yF2mU42DTKIV'n{=+ePRfYVclZ r3mqc6Ok\T8+)z1YsoWeY$gLuS|U,U`76EݜUM]Wu*Nrʅ wQi~ )x'E;aZVc4|:'aZ%.UfQl6~{"ϊɇ#4ۓx~¹Wм/JЇ*KdskV&t\֮%8D,efk*6s: ;^nI\_ͮ/ kALd-E<"}8Vo!Z\A^]^vHE5!*Jڟ@@MX68"DY;&;S͒<7> /XObject << /im69 386 0 R /im70 392 0 R >> /ProcSet 2 0 R >> /Contents [ 388 0 R 390 0 R 394 0 R ] >> endobj 399 0 obj << /Length 400 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DB{YTQF} cʗݽY8 endstream endobj 400 0 obj 177 endobj 397 0 obj << /Type /XObject /Subtype /Image /Name /im71 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 398 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 398 0 obj 734 endobj 401 0 obj << /Length 402 0 R /Filter /FlateDecode >> stream He1k1!Ski,7s!!PJҡ B s/OЭwܐ5A&KȤV$H?${nj~atFM\C;Q̶NFgiu#fQL7lmaGFÃ,|;} l4zP G^oXЙ=n-e005/޽+qG|ļ~%O}a=-5hl/aKNqTw޼ yϫD.L H+e1{bŵ]ED/B$u+x ]qV5IoT*Ax%1p㽹wUR Q rܻ,8rsriZ1^puD{UsӊeJ˨ܖ6̮lMJ/Z8T`m&nlmt:G<6@ڴ6L֦ endstream endobj 402 0 obj 476 endobj 403 0 obj << /Type /XObject /Subtype /Image /Name /im72 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 404 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 404 0 obj 734 endobj 405 0 obj << /Length 406 0 R /Filter /FlateDecode >> stream HWnF>rP3{.Qc;E'n,}`e+VbECr5$R'ӑDqhE|D*$4:U*c斌^b dK qxsqDGLY)!4aFhOqxyT!MOtL8 pʬG2~WԏӪ%^άaT<'>bY,Vyj.*ٱ0(ƛKc=xT8c*kPxfx8-lezqVZ{/(F4ztbHlH<Nz*8C$I7l/Qύ8zuTZGD={a}{eB1CQZ-B&~)0bUa8mo,fb67&0KU\]1t')-Sf8jIfINNdBzp<zUsR x6aֺHy<.߄/72P*04CEqE]C/&_Aur,egzzsyqF 5J8r\b'* hERJ;y}u5ur7nOL"e4C?{1,*tðiiQaD$3$KQ 䶨ɿ|1?O6Sb;f?5M9׾†;ř;պ(_/DKmTw)4r!sOep8[;Q,byP?K-VꯢZĚ?"i8Anw^u(+l;,O\"4\Xi4K)%F۸Ɉ7dx>hKF%Ɨ'H>]!@Aݨa@Sw^`F>!o[Re0ыk ȥ ~ YYB,LZ>/g2fm+[Gfarj&f|4;ݹ`a7M3DopDBݟuTf,ޯ ucY:4݇x=L2X2hMN[WЋKsKDk}'.Ey[a$+i:{&~,b,4'ܝ{ .DLlkl endstream endobj 406 0 obj 1479 endobj 396 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 374 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F3 152 0 R >> /XObject << /im71 397 0 R /im72 403 0 R >> /ProcSet 2 0 R >> /Contents [ 399 0 R 401 0 R 405 0 R ] >> endobj 410 0 obj << /Length 411 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DB{YTQF} cʗ{Z,8 endstream endobj 411 0 obj 177 endobj 408 0 obj << /Type /XObject /Subtype /Image /Name /im73 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 409 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 409 0 obj 734 endobj 412 0 obj << /Length 413 0 R /Filter /FlateDecode >> stream H]Rk@~QZB mںiPLmWZT C1zV6$ ^LaN؋xBAf f %(ytSmvˆv퐞^Pr'vCaDCE}Ct[J×4}:?=;3(X<#XK)ѵʠE3A ՆuAl\cXqO:&D YÞqx[8탶AxTF1@߾L׸Tz$%xHT.*.B /Ce1|O"3d8RSIpʰQ_8MW'*`"IVZyZ? u̻~wQXOgk˥Nv:yҊM]_SPxX _&dt @ٽXL=ъv#,E`KK' ~лC{Ŷ/ endstream endobj 413 0 obj 477 endobj 414 0 obj << /Type /XObject /Subtype /Image /Name /im74 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 415 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 415 0 obj 734 endobj 416 0 obj << /Length 417 0 R /Filter /FlateDecode >> stream HWmo7 U'֭d[AωۋmF׏").i(ĢDR|yHNwB\4 ٙ;.qоәmXNya&'qp?~n.!> gޝǴ:u:'q? ♸~bMSx% E 'n8x6B =$c:o;Df %2I'p ķ6ݰ&Aݏkp<94 iMSڵ׿ڑ+4cC$6`i ݟtOF*mx8LqLR#}W襭ZϠbL$^3w0~b8qs7PL:2 jpȓ>M5 ޶w#%džVb{iXg?nqKί 39D`_a7@i-(]C(Y iuKa4Ml"=U [.JЊ.f4vF7(ZOU^/rۺ>j ?!h38L4F)*?B3YOb{`W]oEQnv`͚o ?зb{BMgRkrQR"U͓믭%=5Pl-z!!/8oE;`zl<,l8!<>bx(~ƫ/ci9m\ T;foy4Ղ tC| ^iaN JddU>DUwuCyT%dV7QoctLDthB@ bw[XnYr$Vd2vfXb2[S[&MĶZ))%x!];MC lNRX;.s^׵-Q%3` jdfjBk+x1j9Q$ĪitjE3ӛ)M@#akbXHl62]H7N~CM^,/̖T&~C?Em+f6N z6ۯu{QV!ʪzA;%IdZ 6vQ >oF7ST,'qrنgR }y]4NL8; Ω_O`T3ys]`hFvM(> /XObject << /im73 408 0 R /im74 414 0 R >> /ProcSet 2 0 R >> /Contents [ 410 0 R 412 0 R 416 0 R ] >> endobj 421 0 obj << /Length 422 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU-ٳ no0$!d6!<C)Gz#[U"C3c98IS*LkǚRԍ> \ahS=CP;J.gH,/& ꚻV7]_īc$)ǿi}o`JGC]W^n>~/Zg8 endstream endobj 422 0 obj 179 endobj 419 0 obj << /Type /XObject /Subtype /Image /Name /im75 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 420 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 420 0 obj 734 endobj 423 0 obj << /Length 424 0 R /Filter /FlateDecode >> stream HeRAkA~Rv"Mk7!hnAJ=WBq/ū\ rq = LB}||{of{{ǽv~;awNȏN?zSF^o{{s??y7q0`e?\qZK zz3!9oZAH` 2'e3bB'_NJ߄Ѡ%{99nW2tLY 60e%c{/;_J]VZםJ%jR/*ݲq3vb!d_9Ίy! {;(ty%Vת%V  PVB KSUΊ*U4ZQ TOB9mdav9⪐ /U 1 49SlK5|&3Mɘ"k9Gpc=8ay=;fӨGo endstream endobj 424 0 obj 487 endobj 425 0 obj << /Type /XObject /Subtype /Image /Name /im76 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 426 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 426 0 obj 734 endobj 427 0 obj << /Length 428 0 R /Filter /FlateDecode >> stream HWmo7 U'֭t[Aωۋ؇ٯER:](PE|7Uӡd'Bv~ A%tfۮe^ N1LwBܦai:$6iJb qq%Ź7N*\BOy3NjwB)%mA`6hN"1M񆄲E(B~ a6v6?ø3œkF;4-)^<]{{APFX1qKbڜv 4t<{R@wuMAo/dG4w\/mzNq$t?O2|:; 㰞3ǁ+фՑ אysTV~J,^ϻ$vi8n{5?y hWc(4\ ?1Pu F/)6.zuSSZRRj̏X9<άqG-4ߢoђ["Ac썟.=]u264* }s[ѱ7ּ?Vqx2iik!Go>_n>g͗u_eFFQR㐾C#wQ=p!5 @Í> /XObject << /im75 419 0 R /im76 425 0 R >> /ProcSet 2 0 R >> /Contents [ 421 0 R 423 0 R 427 0 R ] >> endobj 432 0 obj << /Length 433 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$Dlv=,P(Jӄ1LqJ ݽZ8 endstream endobj 433 0 obj 177 endobj 430 0 obj << /Type /XObject /Subtype /Image /Name /im77 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 431 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 431 0 obj 734 endobj 434 0 obj << /Length 435 0 R /Filter /FlateDecode >> stream H]Ak@_L@e/E6mmٶ+uo]< RCq )t_)&Ы7e[JffJ' gtReV G1[V#f,hE1 7w 5[+o ^{p`c29v'x`z 9t.{ѥ PmeC;|P_d kSgxȠ(fsϿ!\j :U ]R|M?q~QRʓE'/'~G|&NDBk \WY y!x ʨR1U7y*ȌZi)zVU:IySuy7ؚ\gQ2S+뽺*ו2m.ѥkirm,պb헡ڽ׈`>^ /z [f-iu endstream endobj 435 0 obj 487 endobj 436 0 obj << /Type /XObject /Subtype /Image /Name /im78 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 437 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 437 0 obj 734 endobj 438 0 obj << /Length 439 0 R /Filter /FlateDecode >> stream HWnF>JP1{A Spr+Qt%N;;KJi,Ys=sf-t>9Qd"hD3*$4VG+cb[ 8|)9?bjVЌ{}YϪ eH3Nf2TCWֱ) OZU^YYlj'6gLD !_QŒ Q%r-eVE9ȴܠWZdSR^u{45Q`$7޹'. ocBfۑ!sLaSf彥<9) f=QЫ-}BJPb>n}c)"Q^81g|`NM[ۣ.zݬ}nL&U(P@Q)鎯Qa8BcA.%yL?<̭w)|}k!p2ZV7&]\(zJj$@7Ul2z'gArpr|v~yr|YE HD,r 'FAxhUuRJyvzzne#e#Qb+hvg^!K:0dz82*BtRxSÄ]UoUS/O^n߮=sgj$3q<3i6*98޴ͪ'ܨӣ_:R[3MFT JZDI$I`qz$&DpxlUWdbÅO`ֆyoⷝRK`Y9?f?9 H %~[‘P+~uJY{BU1 endstream endobj 439 0 obj 1620 endobj 429 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 374 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im77 430 0 R /im78 436 0 R >> /ProcSet 2 0 R >> /Contents [ 432 0 R 434 0 R 438 0 R ] >> endobj 444 0 obj << /Length 445 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DB{YTQF} cʗ:wZ8 endstream endobj 445 0 obj 177 endobj 442 0 obj << /Type /XObject /Subtype /Image /Name /im79 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 443 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 443 0 obj 734 endobj 446 0 obj << /Length 447 0 R /Filter /FlateDecode >> stream HeAK@_ʈvk z*j⮺EV)RJYEKwmi]J,\1Bwͅȃt ZL@X:D8 90'fy"9X=l͙Ğ6XG}uY/n5fz,ioΔ1S>+0.M1_O{*NOp'v an6X] endstream endobj 447 0 obj 496 endobj 448 0 obj << /Type /XObject /Subtype /Image /Name /im80 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 449 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 449 0 obj 734 endobj 450 0 obj << /Length 451 0 R /Filter /FlateDecode >> stream HSMo0- 6JUz:@ܬkl(U~ޛ7U .>e 9))G al G3!G51C1lAܙ#DxE=[=%K_?\'zx TgZ Ϯj ' 硱|kG ;Yjv 'ßE%3ڏpi.)I/tς'4I/(y0A'0)%-.䜮܃~ӻ-E =$OR%G0лp9fpd Ŏ;&kkdz1RO#B3k?& Ň(P"4DW\?V$rKL{"r{> /XObject << /im79 442 0 R /im80 448 0 R >> /ProcSet 2 0 R >> /Contents [ 444 0 R 446 0 R 450 0 R ] >> endobj 455 0 obj << /Length 456 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=@.&Mzx_Y0Z8 endstream endobj 456 0 obj 176 endobj 453 0 obj << /Type /XObject /Subtype /Image /Name /im81 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 454 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 454 0 obj 734 endobj 457 0 obj << /Length 458 0 R /Filter /FlateDecode >> stream H]Ak0ǟuս]VXfuA&c-e9F顇RBF "9}kAr);y')n X{%3zz٩i lY 9GmwY#ԩim)_:>;9}톶[ Ll a/:TQJX,!,?4:H=([b\j׬ `͢s)'bDPzblr(yhتiEdd01xbT;Vi^*iO2rR:;JY;t"$AuN^& UUH/ƫrőQ0 "c89H5HetgEcw; ??zSgy~1*} KJXt֦T4h"u+-?bT޵+ B2?;oXr endstream endobj 458 0 obj 478 endobj 459 0 obj << /Type /XObject /Subtype /Image /Name /im82 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 460 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 460 0 obj 734 endobj 461 0 obj << /Length 462 0 R /Filter /FlateDecode >> stream HTˎ@C{=XJ q/gvdOXˎ-"p(/3IUHQT ~W dw(F&Y?2}@&}5:@(&E vLj= ھËksRb#"89SOC[z bsRh fch *"bU|[Gv5]k=w %;zwP9\w8Q*T  X/F!XYą} M]^IA'Rx2?! fEe~pkodd|kHFo*kҸN#~c ɿSJijUl8c}176nSb§iMƌdyKY2BzTy70^Jg)ŞrK\x  V ftA cb4-G]8[-|?YWw90Qﱦ endstream endobj 462 0 obj 581 endobj 452 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 441 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im81 453 0 R /im82 459 0 R >> /ProcSet 2 0 R >> /Contents [ 455 0 R 457 0 R 461 0 R ] >> endobj 466 0 obj << /Length 467 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=3)gRC]M&Z<_spwo['8 endstream endobj 467 0 obj 176 endobj 464 0 obj << /Type /XObject /Subtype /Image /Name /im83 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 465 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 465 0 obj 734 endobj 468 0 obj << /Length 469 0 R /Filter /FlateDecode >> stream HeRA@~C, vvfغ[\D<YA"毨x/ =OKa}4-/${߼LN$V'{t,: :iB!oEpR.^}.ا-ǯ}9?={W>p 8^sx]KLLtgݻGX[}aSVUKS-\G.*?S.A2?-bxXP@l QՌ7ڇ"EO3̋Dvכ@C*∩]㩆?, =b2^ZmEgqӘW % rZ e)jERiժgB1z#Zhxݲ6[+֍~\U~AB̕h !N~\5цQwP wH nEvrkmɞfy~#C endstream endobj 469 0 obj 479 endobj 470 0 obj << /Type /XObject /Subtype /Image /Name /im84 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 471 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 471 0 obj 734 endobj 472 0 obj << /Length 473 0 R /Filter /FlateDecode >> stream HW[oFy:"Qp⽩O9Z%==/Hȅ%i߻7ۻ\*/`ofg @`DfL(C2*83_I ;|=3bVƌ昘 g30(X0,.jp&gE"w;u?ICt>d:~2; 72D\kp-lB YۭIR*զVOpW.*R@4; gbb%W4Q!iIw<1hݑi#z@1;DM92mz!O/txcm'0-JIvVT&M\^ x4cJC:BiAxeˣ1۴CچQ4laԟ,vBEo]m~<2> /XObject << /im83 464 0 R /im84 470 0 R >> /ProcSet 2 0 R >> /Contents [ 466 0 R 468 0 R 472 0 R ] >> endobj 477 0 obj << /Length 478 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(F HB!"Z\0N<8HSHuǚי^'a(oj+ȍCB*Gp/,'ĺD8Vgoxrt0I7=ԦJ et7i3k|͊>Y8 endstream endobj 478 0 obj 175 endobj 475 0 obj << /Type /XObject /Subtype /Image /Name /im85 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 476 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 476 0 obj 734 endobj 479 0 obj << /Length 480 0 R /Filter /FlateDecode >> stream H]Rk@~1+x/͓M[Iە]< RCqVdEB=xO^r)8q~$.7  <]dC=[u.oH`% MkR"~gx'`7큔E‡rt -rBkM^hѨ00(-Vfxo!Je ڀ a8521e pfSů/7Q,B2+۩"72]->s5B=B,I{ng'\CyvSDi3Y&^^ME4FˁFh "*IiJDu> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 482 0 obj 734 endobj 483 0 obj << /Length 484 0 R /Filter /FlateDecode >> stream HWnF} dbfl\'End}`0hqdiE$blM_lRss0Fd&j2Dq(33)ḁψ[1cb0^B`~?jAVLAⲨvK'"x%z*ryDuWncȄS'#,_z@}~c+ؕ>q5sw y.Weq2*-*'U^׍NEZY#*&X$T0kC=ihܡyR! _'@eN$jByb()֥XSokZh%[u8 p!/M4VFmSaĽn 5˺\uUVMVYǐs"Ivpœ1;~0ͦW?,BT:!J~;$Xˬ2.g7ӫ,i3mbxJ]s^F!,*DPpFq/l[$Noȱ,咆']>M_FMmpSiT04Bh>Zc XL?)vj'}U2iV2!X])ylEAOuy¦ k=J@.N>@,!BuoEhyT]G]?K OMsվ#SL!ba.dځ;<7*rG џ0ҜO;#)Pˆ_aFax  8Cj}&<}bq [}ۆ!6ԝ۟yCĞuu1>`1be789n'p33yDpHi$`h'7&$ t!AF.DVS=7f#(Wm'r O9@Oh\ި[`Aq27ͻA'I Y0;Xx3LH =c}N.\6ضty'='ύf{ޘHyItY3T<뻲Q$ ,[yV_T[D 6+wCscF"(k(!c *jj |yyWo"]ԻC@?VY i\PzT`UTlSpX[9dG1R7U aX.WUs²㰞;nM<f[2(¬Q& ?Wqrtzz-nG/)/΢ endstream endobj 484 0 obj 1302 endobj 474 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 441 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im85 475 0 R /im86 481 0 R >> /ProcSet 2 0 R >> /Contents [ 477 0 R 479 0 R 483 0 R ] >> endobj 488 0 obj << /Length 489 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=Lm{YPF} =c/ל0Y8 endstream endobj 489 0 obj 176 endobj 486 0 obj << /Type /XObject /Subtype /Image /Name /im87 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 487 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 487 0 obj 734 endobj 490 0 obj << /Length 491 0 R /Filter /FlateDecode >> stream HeAkA04WvmVݴhn""!^o%^R71g+ \4zȘ3O$7f^;DoCNy\8 熸%@WIgi)@%VpTɷd PtjNTSSV@!^UFkP#A.WRu5`ZJhXT:(zgDP g Y©t*y& gU3Q"&9/(T }|i[1ZvommŲ Q9LQ95el3 zɣ߾18k_OZ.}^?n2wl<3Ϗo醛$Ix#^I endstream endobj 491 0 obj 476 endobj 492 0 obj << /Type /XObject /Subtype /Image /Name /im88 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 493 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 493 0 obj 734 endobj 494 0 obj << /Length 495 0 R /Filter /FlateDecode >> stream HVYoF7 6hc=j%3(d#FOU. |RO8œFHH]2>mD*4?/2C\gS16 0:vzM_D6"{2Lh"!;A@SƢs4˳$ϗ|e&R|=X86gAu f:FgLZfDqԾ]DǮLk&Ja;({`.?¹uԷaCT 1˄&.q~EQgkbZu+XXU{ P4zZD;!O\)-{WVy싦غ5-t;ծJ8Oo;"ttEDM[zM685%rMӃ0A6+=CU$[4t2 M֦.|#Hg?P~7òDa ;߹<ɮ)*i9կDDSvr[r-T5}]wPۣ ^wLQ\E1cԳ8.׽>R\xK yIEk"8C;<&܇td#0nM ߌ:|$6FiW+p)w endstream endobj 495 0 obj 976 endobj 485 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 441 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im87 486 0 R /im88 492 0 R >> /ProcSet 2 0 R >> /Contents [ 488 0 R 490 0 R 494 0 R ] >> endobj 499 0 obj << /Length 500 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=@.&Mzx_pwoZ 8 endstream endobj 500 0 obj 176 endobj 497 0 obj << /Type /XObject /Subtype /Image /Name /im89 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 498 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 498 0 obj 734 endobj 501 0 obj << /Length 502 0 R /Filter /FlateDecode >> stream H]RAk1~QZB vPڮԽActOF4|ɢ  {-wX;|z|r9X^u훁vTg& /1&@a Ch".k ~K)CG9IAz9*x֦268DTF1_\\|T/uQ2@:R 7UE%X"e9J)"U!RJX?ϻVz~X畊SުB25땜}J: ooݽ(gӹ>v:[ YNLzAv8y6?lMk68wݙFX%a / GsnOϐ>į> endstream endobj 502 0 obj 473 endobj 503 0 obj << /Type /XObject /Subtype /Image /Name /im90 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 504 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 504 0 obj 734 endobj 505 0 obj << /Length 506 0 R /Filter /FlateDecode >> stream HWnF<{C&}r&~ P0f"*I0{JR#y%̙3`j!p" \QT|\Jn`q) b1015,?B_ v`eNpNvGDY3Ot#F摔<>o=<ݗf{ާP6hқD1\z"1S ޯ׺j[;ܵ%D*|c1& wF ; >53s™;j$۪3AJFǥIwo 22U+u{k&}zivUdnV̍1l 뽆uzNX}oJ/FIX3_82v+5^{mA 2Uɼ ?'GKGV10sTMRE_@{$M -TݦiNp޳N4Zs^0Vk  XUT6ڲY ePJV+ J2vݺK0uvKts!E?hI؈]W87pӖ>avh6P]{ӆl[n}+fI3"L!KCkATWԓ)ݏT*#V`jDLE|Ѓ+T_.d#p?),}gUayrb t 桕եhy"=IXzN,2q†:7hbl2̈PEZRܩ" `w \~]r] fhA|Iɣ&C t4"G1N{I+.CdOD$= Vpqaw`W7De`j?^TqZkm7E,-_1'g Ci)ks >B%9-q핻 ,u {Ca~beτ,sSy:%Ln5#4ҿc+?l1'쌲!uXd*F#"k5,LB4LU6Xa,Q9\dYFTKVnPQՑr"SZbpy*_P1gv'l#f }A$̍:}ߴ{ڎǍQ /J]\*%)]I#p>CF^]|=ҝz)x[M,#qbFiCLyaьlzʣoMЀop+Wt3""¿E1ZTq޵}uYb*ckgϥ/15o WREڡ$GK -71sC wgFP[UZ9|8.Q( @נ4JM 2P璚r,f˘2d<}C endstream endobj 506 0 obj 1442 endobj 496 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 441 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im89 497 0 R /im90 503 0 R >> /ProcSet 2 0 R >> /Contents [ 499 0 R 501 0 R 505 0 R ] >> endobj 511 0 obj << /Length 512 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DB{YTQF} cʗ {Z/8 endstream endobj 512 0 obj 177 endobj 509 0 obj << /Type /XObject /Subtype /Image /Name /im91 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 510 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 510 0 obj 734 endobj 513 0 obj << /Length 514 0 R /Filter /FlateDecode >> stream HeRjAv;,LE0Y3 ,5YѽD< 9= 3x|G sG谗=v Fizb5W5Uu({wmvCƵ!vvwS\g"r@lq9\rt釷x$lYkoj(MLei3!K,vTu,:)WpnZ:qF;x-ͱ 0EBA3LP1ݬAE9PDv+촲0u/,#"*7ju1z^I2笭L3Q{k rZ  3cL,jiU90=o*r= !>szv0YV?Q9b^HjP/բ_JKK!|%sM˘ [ᬆkxp-k<7o@4˓ݎ endstream endobj 514 0 obj 483 endobj 515 0 obj << /Type /XObject /Subtype /Image /Name /im92 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 516 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 516 0 obj 734 endobj 517 0 obj << /Length 518 0 R /Filter /FlateDecode >> stream HUR@M--!qNI࣫E^^% /d*pULOO7|XMRdIV'(A3@ M7?gw09]b "!6v2G Fa"R _UN`s3&Q܇ȹ;'8 "W퓋sD8]"eϵ,: 9iiNqKCI;30G#Bz^MɛBHL--1Pp=MSlsuC"'#OCYĆYשBZm'Py2TĦ8|@NS`Re!mݖ.U(-^" Z?9(G!}!F&2W^֭#Avn~PQaGfO`z֝ <7NH6`rWqz @,0jUݍ^#k+6JSېAi k…R̞Ʀ" M ZZgHM81Z)B@l5tu,- OW&{XձMtS V;3q2G: KuN]kȎj'. IF{2lMo5$|u>*ۂ0(^Գ`[mṬ3hK` M[b`@ZSpm+[+7^F@!3Cq%2ir}:gy^-7I$Hz4WDdL(WLp4Ft*1vN6fE0ם`qmdtϐp7#JxXONuZwѼӀQX8-1-*cTTZoc) QG1?֋Ki5w endstream endobj 518 0 obj 896 endobj 507 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 508 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im91 509 0 R /im92 515 0 R >> /ProcSet 2 0 R >> /Contents [ 511 0 R 513 0 R 517 0 R ] >> endobj 522 0 obj << /Length 523 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU%y lo0%$Ǟ H _:G)IL)6X7Gx&d~? Ρ.o\HvaP^\sey:#/A7$UP 2]e|m_^%a /Zj8 endstream endobj 523 0 obj 179 endobj 520 0 obj << /Type /XObject /Subtype /Image /Name /im93 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 521 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 521 0 obj 734 endobj 524 0 obj << /Length 525 0 R /Filter /FlateDecode >> stream H]Ak@_L4^Ka<۴ubJ[=)=P=H +])R 9{YDd${o{Fמ-#_kZfjpu"dQ;[l}7[X?x1rU<{|ڡAC CWi0>3~ep,ct+5~|QF KsQ{'3)xH@wwX4Yz`*!:+)zi+>ɿM>q?ϧB)Er(ҮgӉ*_tIcU] M;tBcnx ʨB1U7^YĨV8\ZUb{Л7uޔ|~?]eIb+We/hX/{U6hm žXzů_J^-C7Wn4^ ;vח4G-G endstream endobj 525 0 obj 486 endobj 526 0 obj << /Type /XObject /Subtype /Image /Name /im94 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 527 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 527 0 obj 734 endobj 528 0 obj << /Length 529 0 R /Filter /FlateDecode >> stream H͎ ߡIHR-H xr~,Uwcd]x(]%}2n{۶WzH$n&{o_oclﶇ%oߊto\d>}~_~z?~Ƿly͗z{テ3~2Q*CEC-ܛn2y>=7ˁ6t TH-_[J˱ ͐,[%0 n RףRѿ~ sϏ9CBG}zu}6EpFVف^ϝ MjeQSd1yfǛ5UΌ7+AtnC0f 里n[_xyL̉>;{to߿5sHGmj5DOρZfh[n&#BF>-u V5)M 웇r![FF:~iS>O+#-Naq]V;F00:9l6FH?78K rv1޽4-&ѷkL'Dzjk(DMyT`ƀZuY: 'fVSƐ&tc ttxrRh5i5jLk (v%K&dP< -Zf1嘖wHVh2!+:RD]{ .[S|kׂ6i)EX'K= yZѝ@+#cUaSjJd乳Ex"V#Zш94-ϥE%'a0b+_t 3~KfL,_ TxFwF3OLJXAX#3ZCc.1M'E"oWZ9@}K=/2f2X|ܞK=sS zT`sUp@qPP#$NlUh|xNy9u*OV6 5ep y6RQ <%ZvZޫ\Bt"HCf9QhuxF-Azudf=6ޅPcs} cp6\䑪:KSDDXT$o_S W];Pu1"JA[=Sd4Lon jP.RQ*#5b+SKf}ZPyٟizlFʳ,:f(͕BS i-љ.Oo ]˗z)ј Q|NHMExNeX~.ϱ=T(= P: 8_> Z $; feB,|b?3 aLNU ZʋZ g' k8m+n}.k: w %N:PrH5NeMZ["EIL,⍅j'hN"ƴy:S;2+׽nFvw 58UP=VwWi_+a^J}8*lכ=i6`v ӓo/u?2cS ĞjA~hmKҝ/{|&:&tA8"'Qo Nz~*e_4)LJ̪?;% O>iG=Vud(mxH֨WEcs&{FE{Ckq2 #`ta}P-$J#0fEO^8,H,P_OL?ߏU{vCiyqs=O<"DO;I@Ch9 hDD9:מщ] T!'ɗ$ J'buUUvG7⢥7 .}ɸ ȓ=LI=lby29zPxP5ZOLuRD 4sAj({9u2bVt?N-=A{I.jEqhry?2ӥsU1QSaiJkvLk"l kTBN Cha+.I1OH ºZ Bˎua,b F)^,nȂ¬m)_VOkwO= \Dc=3 .:߶&G';^tZ?1l p_x1TIIhTIQ,O%t߱)1eKR-,KbY*ۗy W<X/1-J,-`?OS wZ+l̛*./]q>wҤ&cyu` *o">rHCb"9\Z\5mxѮL%R⍟zigOdbs8ԋZ=U)*~rl)KmӰJp^OnzhWTɑC$S8,GRvzk@)w(KVtS[V؀Ůr%(~vE--<52ԉaJ/UX#Ӵ_"2Rщ@)ŶW#q(ls, TRQtBHxc`<8ʭE .K\ZZ?GhӤʎ+`/uc4`p%tF&ңF=ܤ'!QEXg6Aś"7 fʌٕA[D3/hdWf?)^ndnї(B66%DH}jPlDxsip0 ǘm*.@yi̠f߉͹PY15.X 932F,.Ћ7/hZK` RjvL+IY"DaD|^qZ|I xŏȤ7mf8d>L5䏜g~HvZD^mެ]`LWun MށpsP2B6}nv@80†80H Ӎ/ƒ@~rQ@6gdqh? Vs 6Eqp.70*ړ H 랠 qö-Lqir{:2f;m`-E-`Gs ڃCq-,7j=O"fͭsϸݕ ľ΀y 1L(k8S12q2OG=) N]C.`a)rVv%!|#6ײ|HH:HzViΌxb"%#gb%#^7> /XObject << /im93 520 0 R /im94 526 0 R >> /ProcSet 2 0 R >> /Contents [ 522 0 R 524 0 R 528 0 R ] >> endobj 533 0 obj << /Length 534 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsRn;ӂ$$')CΎD0dZiu D 7zCC"p/#ĺF:^=V>O<;az$D]v8 *h4c Sr:EwZ8 endstream endobj 534 0 obj 176 endobj 531 0 obj << /Type /XObject /Subtype /Image /Name /im95 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 532 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 532 0 obj 734 endobj 535 0 obj << /Length 536 0 R /Filter /FlateDecode >> stream HeRAk@~1i2xĦ]ѽYD<,=Pj,Gћ&k)8缙n f|7͆o>kb|KqK,c1|mW虈[> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 538 0 obj 734 endobj 539 0 obj << /Length 540 0 R /Filter /FlateDecode >> stream HWێ ~h\VWb@,y+HCbh=ymyX=ÿ/N,lޖS:eIצֶm7黟Rsק}^y旇O^yyzy?>|ܽ;YQ۶"맻SCq;^8|˽rmr0S׷a2 5%O'6L}q(wfe_?g}PkZǴ(]ӺL.քd/W|G\ד-Y]k77Vq3jD.'a{/׿fxfZ-![\ }i}}:8U,_ctItIN.o_=}zW[W^8j~Zӽ?,lj H32GO0G)L\bad .˷Ҍ^ixzk.{ºd wBUm/pRLГgFHh^ 2눃s%γ>:IUX-_Yd'ּ -)G@m-[/QxJ %ES3gjM׺<[ݸ6x-E&\}ү2?Wk$MM4†8!HN005{UtC}~R:#m&CCu̓浯c O䫻*LE ?f#J}N#q.MOTlrRz+H. 4(>=*D.(h6'9 (% 40-F)u9O#5^|2gAuE.]0b)S0Sط>FS_8|X"JzѮЩF[,IR(һɘ8E<CԮO} }ZA^&sR@6`*T'.R9dF#~ԧ>H+ *Z:q5ᙢ ;$b.mr*#HR0=k;ĕ!g#G#7́Ӓ鄵Ecf< WXF'Q$Lу7dž<(]z&*C5ԥ}P4 G5*qvkZ - Գm #?1&]\_1N`xO!x2bv\ ]zHlG$8+ܥ5cQ:QN姇Nq >HQ$BKB9Iu @>H+4H^D#ǜpK M;L5JNM?Fݏ*S͢XM76Qi }囿 :͵'I6i ^>?2tw7X4 endstream endobj 540 0 obj 2166 endobj 530 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 508 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im95 531 0 R /im96 537 0 R >> /ProcSet 2 0 R >> /Contents [ 533 0 R 535 0 R 539 0 R ] >> endobj 544 0 obj << /Length 545 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$Dmv=,P(Jӄ1Lq{Z8 endstream endobj 545 0 obj 177 endobj 542 0 obj << /Type /XObject /Subtype /Image /Name /im97 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 543 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 543 0 obj 734 endobj 546 0 obj << /Length 547 0 R /Filter /FlateDecode >> stream H]MkAǟ z/Bz춵$PmZTz)=P{(+D/cKKt\-Xdy&g3G~ctz-`j'VNmv߲FamR>MQ˳7_NS}*J/G7N'R.-1.k6zWb'VI9wI9':h탲 nbK!DdٿbE;4 | q ICFPt8RJG> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 549 0 obj 734 endobj 550 0 obj << /Length 551 0 R /Filter /FlateDecode >> stream HWێ~ Mx͛HaRVuabyC9y~;%Y YR _ 9/-㰷Wf>G<~^ӧ7my?y~Trvdlq9X֎m `[r˙ce d 5D)X^TW  LĻ/ Ȳ@ &g9Du}?!mQ֣֯Yjp1֢֘ K1ͿVk< +'zz2=Rl߽4zˠ) bv0C&ՑoT0noOC3!JE/TI( Çjk" 7-E(1Si%?q$X,Y-mh\p-Js2xy$az2*V4o@;P 2 l+"y]7#A|aU+mnB$5\rLTEl$2K6٢2RΨP+Pr,zl.]aYyi7ټxUĢSsh7/M8S h=Z)!k\'F UG#d { 1z*Ef\ d`*ieɜrdlڸfU Ri* T-Iۤ Ȥc}zͩ;erGݘop1I* %vf"Q?mWrK0mx!Ÿ<rd1^!i9Oo'`c'UJVsfe*7щXZҊsuRGLDejZ.rLJ^@;-1BƢXڥ9um:LL^fH}EbkrZs +IcXH;"[zwk uf]bj?mKYڶfDq); az/L ,׫k S]ܦ"8AV|[dĦ͏XLf6Q<ޢB Z#S ?VlVȮ0(D + n(0g2\Ql`yTh嚿AInMhe^-whh[wwUKbSک%70ҮŸ\uQ7ހxԶps(qsXВk􍣸Pѹy zYyW70T]u! 6G.&iua4XdoS,fWZm'i%]E0Y\5&Ł2֚MݔdȘI8ZDFlj(=)(^4 \Fvq؄[纹E@sy5E Sny|aFu- m?ޝBzȖPR _y6KZޞ^՜%1 YCG,ꛅu3sIrȷ]lޢ݇ǁU; Fbnq*ܿ<6EfҫKV=7gse ;aszDŽvȌBU lEaBm+6a2s:DŽf{ Anq H ~q ;nfLOqIA7 lEC0l~qA~_qLi@AW<F%#{;_Ä݉ay!N+h'2#msNRT>,f~N[( qlgɋ%K-['YΔ JXBZ8@Cw!3i%xnkk4]NPe+ٔoyt@k+[?t~g&'l:}ԏYvfq\MѳSwFYG&#KtP?GJZnI +E RFnR3=`ۻT8t68J.n&6" jT[+$Z {-osһnST$QX`24dƷ1?4W]xlkdlWWGptz/ y0ܠAGL;IK[]T*q ȉS\),d;D9+@Z4Uċ-1֡_a%u,bwŠpUalOQ0a pcC7ahH{h؎Ϡ>K !?o!ElJ0IQh%n endstream endobj 551 0 obj 3248 endobj 541 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 508 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im97 542 0 R /im98 548 0 R >> /ProcSet 2 0 R >> /Contents [ 544 0 R 546 0 R 550 0 R ] >> endobj 555 0 obj << /Length 556 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mN2uao0(8#HB!"Z .j'Ș8:&i]}ǚ.N%R Nѫo*>V9|b$,V{; *ʳklZ-rv{x $!fjS24MȌZ<_spwo[8 endstream endobj 556 0 obj 176 endobj 553 0 obj << /Type /XObject /Subtype /Image /Name /im99 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 554 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 554 0 obj 734 endobj 557 0 obj << /Length 558 0 R /Filter /FlateDecode >> stream HeRn@ WmJ#B" RԄ6rB‪z0"E~E|~VH=*aw'RKތ9d3O[ݐ͵mne;vȎNSB_K֡|޳I(?x/ upC뚜cx޿10Z%\;T}Sbc XYd-?Ks#HÂ)P\A1/ҰY+rM~I#l.U_{r˿Ȯ2$Y K=Ͱ-t3Ϋ@ +A r^e.yye9= 䙚dl$0Yְ?Y5֪vFU^.G+ƗvhSggmV1F\TjqϦp+/ƍ[dnifO endstream endobj 558 0 obj 479 endobj 559 0 obj << /Type /XObject /Subtype /Image /Name /im100 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 560 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 560 0 obj 734 endobj 561 0 obj << /Length 562 0 R /Filter /FlateDecode >> stream HVێ6m^$Q*ЇmM۸˾peV")𢋝,4Y'Μ9sF0HY) N ;.ei9 ,1VmdG9uK iF{+;y#Ge^Æ6#1;~C_C̗p`l>I[RG]:GЂ%1BpR\  HOuAUc4ߏvAO/d±0c4"|c pX^A^w,رʓcyH`]U$}4,.' 54$Ydn<),~ <[5&+~HDГS,qQMIӏиYUE~'cR9~}D[Y O6ժU/A$gQՄ\jѭ"W#~A8Z ?e@.u!\&qT0mX@Il鍲x4u,l z AFں4`t]jp#w~p=@TJI1O1Mբ+(*?| ND^^}k_o"^ !ШRC2A:tm|?FlȻ .˲lX[>[+y1^uuAWZy\5ihJc!j&xEM]JGRv?O#@}rq\B>wk(Xn5LHįV`㋎1, }q'm6ceޢk%DAv{jl>H$%њY(o}Fjs+H}qlokJboIvjܶѢճ2x6^ {gf"|LeEDv6;;*ɁW}j<ޡ*xSW(Ui:PY5:ud *ynOR;hFyq_b endstream endobj 562 0 obj 1143 endobj 552 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 508 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im99 553 0 R /im100 559 0 R >> /ProcSet 2 0 R >> /Contents [ 555 0 R 557 0 R 561 0 R ] >> endobj 566 0 obj << /Length 567 0 R /Filter /FlateDecode >> stream H]j1 D0ȶd5l{!-)} R$^]"a=P4[_nc$ڝ޷"%#UQj]`x,C }LZ6|;}]GD昔|x(rFI@)! fb=/Ogb79 endstream endobj 567 0 obj 179 endobj 564 0 obj << /Type /XObject /Subtype /Image /Name /im101 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 565 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 565 0 obj 734 endobj 568 0 obj << /Length 569 0 R /Filter /FlateDecode >> stream H]kAߺz/BnMnH-C"EJ=GB#&/޼NK"#Dʚq~[fǛ42V{Sw8< I`4q#/ISoyEp'G^~_{J%|ԵjxBOH'/ [厬 z!b; | ?Cw8> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 571 0 obj 734 endobj 572 0 obj << /Length 573 0 R /Filter /FlateDecode >> stream HU_o0!5c;txYjB|w8ɒKcwO[@P*:X8FB)[N/HĶddϙB{['Ђ8`'%{ rB*F/Ңzs2=d@=fڣE6BCYŘޖ&_Yx ă0 Zƈwn0.G54ަYGN4M^-UQ0yiPidmJ6]6@tH[4rgEF-sE?Co0eNRhƤ9J麮/Š8xRhU'sG=sFE]-[X[U8;bq\OFu954$ )ŽX7(cEU:3yUN#yӷOIǧ%8bvPHaUe;ߙcVlc#~PgQSݻӴCOS\s†xtOT,)w4w~5)gSSY{2-Z핁b?-B֛p|_lLia9/|f냡 >kn 7BH^֞ΆQrdqb#!`N^n\=9phnvy1uj'ϦJM)C0y <Sifvig=++]/!e;7[ endstream endobj 573 0 obj 779 endobj 563 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 508 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im101 564 0 R /im102 570 0 R >> /ProcSet 2 0 R >> /Contents [ 566 0 R 568 0 R 572 0 R ] >> endobj 578 0 obj << /Length 579 0 R /Filter /FlateDecode >> stream H]N0 D 0G8Ԍi• P+zA$]i-{$YOh]"a(LAIŭ-qǺI}A9‹P9#Tcnr',GԯaPk|}}CAɻ)ǿy:> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 577 0 obj 734 endobj 580 0 obj << /Length 581 0 R /Filter /FlateDecode >> stream He1k1!Ski rvzkCPL Eù d';nȚ %tROρ OCF2rζ:ݭ툍OE4|ˢ. 6 #kc'FÃ#| lPsG^j=3 ;``=k^B{WrMwdY6xk}!O%a=-5hl| aKNpRޢ YXT& 7HKe>{b=ED/\&$uKgxs]rR1MoT*Fx% p㽹%$e Q rܻ$2kzY7{miŪµQZQ% eTmnCfW&%ֳ\qJ676н{'D>7MQ_ꇏ@jiONۭ~2 endstream endobj 581 0 obj 477 endobj 582 0 obj << /Type /XObject /Subtype /Image /Name /im104 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 583 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! 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I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 625 0 obj 734 endobj 628 0 obj << /Length 629 0 R /Filter /FlateDecode >> stream HeAk@_euW zĦ6Kwۮ,"=Yz=,G[?AoMa=xšČfv[/HbE>"."䢭5/T%I`nʘd;UkBAl:pI& Nzy "ATbg2Z\`u6F bOxNDVҺB3sc=tԷ3eԟOJ2~)KSәl!܊g[ͅ~bnh4Y= endstream endobj 629 0 obj 497 endobj 630 0 obj << /Type /XObject /Subtype /Image /Name /im112 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 631 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 631 0 obj 734 endobj 632 0 obj << /Length 633 0 R /Filter /FlateDecode >> stream HUr8*Iƃܒ]*}A(HBBZRwS$GOO7V%m)vO+%@*pGX=P`rbxAxxe u`HxxËu]c)iQXڴb2RtVw?^_LaE;ʆl$Oe_*CD)&L˂ vМ@y' tNx {|`TBf=. _0zkL ;9p2=0`,JxGig(ʹkU1됈Hl]C1 Oдp1 4i ~TR6ǫS:F9N3hMDN{;8^ ‡m[vqコmP>H)_"dtUn ߆&#TaeŲ_')$wOy> /XObject << /im111 624 0 R /im112 630 0 R >> /ProcSet 2 0 R >> /Contents [ 626 0 R 628 0 R 632 0 R ] >> endobj 637 0 obj << /Length 638 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$Dqv=,P(Jӄ1Lq Q9 endstream endobj 638 0 obj 177 endobj 635 0 obj << /Type /XObject /Subtype /Image /Name /im113 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 636 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 636 0 obj 734 endobj 639 0 obj << /Length 640 0 R /Filter /FlateDecode >> stream H]Ak0ǟu ջ^6XtqA&c-e9F顇2BJ "9~kAr);y')n X{%2zΛFok )X3G4m+a7F'淏/N?6F0JY(ZSVn&n2N'Rcʖ5/E/xnMʹr*JO/`#169 DlUȴ22^UNTWFj+)A> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 642 0 obj 734 endobj 643 0 obj << /Length 644 0 R /Filter /FlateDecode >> stream HTˎ0C0peXH{eQ >mgJ;prUj y!CFr©BI<,Kp=d; L,\)BMXW704hL0k;5_2;E2 -T!涙M ~M IJlV J&!IeqMadlE+)'tS/{?@;v/{4K֎L8A{j[N0Rm񫚘 c3 Z[*Ud6=p-8GNLO$1I@|ciny<pDŝV)mNO  Lrx3^2/9fJseoys I8"ξB&VA <$ྜ,R¨0A1IT4?_sTa̾V endstream endobj 644 0 obj 483 endobj 645 0 obj << /Type /XObject /Subtype /Image /Name /im115 /Filter /DCTDecode /Width 273 /Height 250 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 646 0 R >> stream AdobedC    !"(($#$% '+++,.3332-3333333333  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$IywM9[>Wom0l I᣺?w?;?s~}b#+3`k Gu~w7l^FWgװ@-'??t?Yu ,_3*\_{#"*gš>j/~n./OUZ5K?Eʷ^ȧʪshl-gY<+_»-gY<%-gY<%-gY<%-gYѾ^E.$3YY/ q$A?Fȷ/"ϴo}K$/+RI$I$_+RI%i/F bi/F bi/F b۽cĵpWn69=]A~}pC$_Ӎ^l>3q??B;6oO3dqӀqn?hGy:ιMY07׶~Eͥ!ƀq>#c}l3o}_{nk\[a h9V:ιMY07׶~Eͥ!ƀq>#r:~-,ewYS_c*qsZHHr:~-,ewYS_c*qsZHHr:~-,ewYS_c*qsZHH>;ˏfWS*yq7ot>;ˏfWS*yq7ot>;ˏfWS*yq7ot­o_tdz8:z`?efptz2ws[]!N7ޘmٴ*̝yeWHvGӍ7[vm7 G3'w>^hw_^6=JqK~ׇo7@lawO̯v8տuxek÷śA 6`B0;W~wRRߺv250A!6/ֿ[߇sGC]bY`6l_Xaٗm؏Um%  uؿZo~ó/'ӱ]museK4Tɲq>0MǺZڋC>ev}Sa}9u൥=}-˻}S&+Gu6.skKj/q{CK[,뺍ֳ=DևxDhffg]mεlǾc&ߦ8#EK33:nuef=3584 Wmuۺkrݑ[S65'"v`ͩ0U3mLA8p-sj` oL;zs ez>lo;;n:Ĭ~aۘ윏M/쀳c1v%eSަdzmd۶α+3Է+1f}mŷnp/0vyQf;1nVcqwn ^a$+ӱtvcRܬљMý8IQCV㑐cvU8,nNh\Z'A3>`ќr2{ʧŞwZI D8Fg uZ3FC}T⸳ҮC=;qh ;Ga7dtkdebI5M2 $g}^u >llW<0[I IA#:Ρߛo i$׷4$~p gUߩ7~EYX\lp!yNeȮ-ȯ*Ǽzc44m Ȉ%h7wM.Ev_nFFEyVf=7W!lhnDA+ލw ݗ]8?&'xlƘ{Z4v^Ѿt+"}kFz7.v^Ev_UC`hj-EI$K+RI$I$_+RI$I$_+RI$I$_+W t/) t/) t/)rܤK+RI$I$_?#E?b?#E?b?#E?bWrI$_+W-Fk3Y{ֲv`o$s}hњ}^sX5[>\Z>f5W1=k!kV G-O8k s2E[ҹdo"uXk s2E[ҹdo"uXk s2E[ҹdo"u].V6^5Y8ֶnh}v0\wXxdZ۩-sObceUknc <W+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_?#E?b?#E?b?#E?bWrI$_+RI$IpKBرpKBرpKBر+RI$Ir_G^=2tNԳrcPYK}}`^KbhTΉrn^jk1sﯴ :kl_{ʙ:N_RYCf0.p'M ֬zyw`M6\+/O_Zrr݁6ysp̭[0>}jwvۓi;2qpn7Y"E¼ 71'PuZ8ۇ8d7,M^v~:oÁ2_HQp;eLt?G V7=Kh[ncp-{nY&\_R?Z)?V?A6f>n ^[ VI4o#c}WԺO֊pOվzY7׻He0^iz+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$IpKBرpKBرpKBر+RI$I$_+RI%i/F bi/F bi/F bܮw++RI$I$_?gFs?gFs?gFsWrI$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI%i/F bi/F bi/F bܮw++RI$I$_+W t/) t/) t/)rܤK+RI$Ipڳ_qpڳ_qpڳ_q+RI$IQd_1Kk= #]5TpzEu l赏uzǸHMUzE]C.4-c^5UzK̢̪(k,i4>>ߚzK̢̪(k,i4>>ߚzK̢̪(k,i4>>ߚGֿ94uh 7̊*0:'T_|l: bfEen QF6NMc1CM"ʃ7qyMfߋ^P{qcN1ĉlo 6Zz&p{Ӎ{w0t$NSc}hY׃13CƜk&@Lq"t2zf?:]8TocX< qUޡoLGP˧ 2,k'. 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I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 652 0 obj 734 endobj 655 0 obj << /Length 656 0 R /Filter /FlateDecode >> stream HeRA@~C, vfSغ[\D<YA"毨x/ =OKa}4-/${߼LN$V=-: Bqqz!ѐ˷pR!GEˁx'ڴ/g/>ʇ.T!k+rrI̢{7 }/,q}`Ӫʽvi}*/U%g%XcEL"O A3*P1]A})b}yhzS\h_eQ1"Pk> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 658 0 obj 734 endobj 659 0 obj << /Length 660 0 R /Filter /FlateDecode >> stream HSn0f;hkf $&e%ePM6@/%y "8͐&3FL n_gO\Q{LVF]D8v {x5wtRkXF~ ŏJ \c /KKꗶ]U[$uhMU~4G# -ފ(rӜKM͌98^gdTTZU0.O"ߣ#' iyuN k=my_txcDe4R2i.1'S3e4[Ҕ9gI~B(Jz)]l4f83; 24C9U<^W5/X/\<dx~dkn^mtSFKDv ~h߻"  endstream endobj 660 0 obj 494 endobj 649 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 650 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im116 651 0 R /im117 657 0 R >> /ProcSet 2 0 R >> /Contents [ 653 0 R 655 0 R 659 0 R ] >> endobj 664 0 obj << /Length 665 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7]m6=,Pj(Iӄ1^Hpwo9 endstream endobj 665 0 obj 176 endobj 662 0 obj << /Type /XObject /Subtype /Image /Name /im118 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 663 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 663 0 obj 734 endobj 666 0 obj << /Length 667 0 R /Filter /FlateDecode >> stream H]RMk@UI\6RzjQ쀩!ͦJ %C趔KLG[鯐!^E.Av?2bVOo̊͗퀬gc]͠M6ګ9>#xC @6wyCZ*-kN>|{=2ȕRYT2W4Zq É ?Hc%WlO-DI}7F\Y 'F&& pT W6Y׌v Խ{c"t)Ӣ(-r39+B!=Dٟ+_AٯY.p3tNS>flʺe]7툢cXY /&EUDcjhf  -PGisN9 ";j`E.lV%*UgB Tc$ܐґ4Pj+LoI{QM͹}k{b[kfӳVkpW endstream endobj 667 0 obj 489 endobj 668 0 obj << /Type /XObject /Subtype /Image /Name /im119 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 669 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 669 0 obj 734 endobj 670 0 obj << /Length 671 0 R /Filter /FlateDecode >> stream HWێ\xN sIHzg~(`O[w̰VmVN?_N{R(=mד;;qsgsjr*e?-sPً6~hF>ކ_^ܞ}nq|:OH{ +%D|I}Hvc(IRlA8eM*5)s$.37$LOW۸-y37m6T'ѩo?olqEJguV\7֢cz{ׂ,TH>멆Zv, cq0qJ;ζ{H)1d7EuY"᥃4mK݅R}Nѯa4' m"Z|~~|~x~}T-u|9dxc7CneTF8a_F;9DKxs`*dun0GGCf(y_EAtx!~` ]h*S0dPs?3Jeۙrqˌr+P'}?~' O͘##$v_ rj9\XgPrB۷]G7_6.L gT0s 56Tybd%$Dg8_ڜ8`a/$dZ{b+; n=Wr85*Vnڅur$v;s;s)5OKֹy4ndǟa(p".s' yO9qUAa|چ#&k<yvW1xtm «J2) MQ3'p;ef않Ԏv W<}p\{*XQ1sd[3 &jcd^l ,|0sg ;5 bs+٠<3mtdaHn4Y=( /u|دWkKv{j}%+h)?(M'I(smKi "{4xPHżqh.$sbIr8f" N`\bڅ]P5Df JɑK5( }YŶQ n)"V9Yidw-az_pрp JzAg"akhXmSxE+%J f].O=Z*~\4<ȻR؝N"\~l_VvsVlL{>. US_#ff{FU#(| hۃ? Ll(%y7tGueu<\m@L$N9 &!tuʎ˕Ա3+\nJM(U j3U7m{`V#Q xfu. MG.&X8*̢ג!ؗor1!،h@e8$ɘȔڑ 9 G.[ xhs{,jq)L#>zAu1 ((q\@X|:5bBjD8 -4qF%njnO@o:$YX`.& ?_,Gjzɝk]6vû endstream endobj 671 0 obj 2073 endobj 661 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 650 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im118 662 0 R /im119 668 0 R >> /ProcSet 2 0 R >> /Contents [ 664 0 R 666 0 R 670 0 R ] >> endobj 675 0 obj << /Length 676 0 R /Filter /FlateDecode >> stream H]Aj0 EO;e*ٖl.MWv ba}I Od*#0q TL?֔VH:9^cP{rH2>~no]Kjz}C$AOks 41ؤiX6r/o9 endstream endobj 676 0 obj 180 endobj 673 0 obj << /Type /XObject /Subtype /Image /Name /im120 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 674 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 674 0 obj 734 endobj 677 0 obj << /Length 678 0 R /Filter /FlateDecode >> stream HeAkA04Wvm"nF47CՃh/~|oCSz)&P֌of)7?739ΓN̷pm-l|tEox7f wXX4oy Sq_pE9D2cǘ sK? m1ęP}Ʌк|n[ӟ [a^ t~JQt| QT jn+|{MEOgL$A03EUiy?8/.s5DYq%UOS fżP]^R@0*u{! A8UNPsQc^tRyTF] j9>9{X_Ŷ\ܶbUZ&R U0مkMIoИjƵEb鯿'D7;Q6ޙǷtMst|j#Cm endstream endobj 678 0 obj 477 endobj 679 0 obj << /Type /XObject /Subtype /Image /Name /im121 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 680 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 680 0 obj 734 endobj 681 0 obj << /Length 682 0 R /Filter /FlateDecode >> stream HVYo@ H}coyߵsЦ%Fm7x~AT"3xI~&59Ҡx#s0<g̡3vFV gR,/6(fru)ֽWxʿO?TE.֠P-\\{\v//ơON pcV5FRG2T҂"2P6Pm9TG.-[cJf:'\&K\NO(q'>$ z춗~kV(rPEJ,bPsV&oFrzVqȱ|~SY,#9q*A{M-fiaJYhM(` 2#ɷ́[j}Mǜy'vwK|moے ^t@7K[qP0 %ȫ)fяhorM0'f{@Q(!gLVI2GbܑSnjO'1/k+PPcxQSb)Gػ!`f@nj,ZFː dLg$S NNOOx7M;t`Fsۡ! mvw\0'X&ijHcngځTbc& b~;:bgZʷ|Hiug;H^8_k,p=pg{ߞzFXIνdY4n*ۉ9ʳ vZP|D%#9|d$`1l> /XObject << /im120 673 0 R /im121 679 0 R >> /ProcSet 2 0 R >> /Contents [ 675 0 R 677 0 R 681 0 R ] >> endobj 686 0 obj << /Length 687 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7]Lm{YPF} =c/Wݽ9 endstream endobj 687 0 obj 177 endobj 684 0 obj << /Type /XObject /Subtype /Image /Name /im122 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 685 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 685 0 obj 734 endobj 688 0 obj << /Length 689 0 R /Filter /FlateDecode >> stream H]RAk1~QZo]8]{kQكxCAFX١97xq9?0^S Ӎ/ ͗%!3ѝ^6qlw ۉzlэ9CX?3ht:4W) ppt8``hOc-?Gׯ_:Wam7  CuAl\m[s4H:M ˁUƓ<p?6 8!R4gJR Z+?k,B)E=,~r̽|ŴVB8UL9޿&Vy┣*$$Lz%je pziE?x7/ K|ng5.V|g%^Юݯ)(N-M[z2oZ ffhEwfV"v XR??iGóNw k endstream endobj 689 0 obj 475 endobj 690 0 obj << /Type /XObject /Subtype /Image /Name /im123 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 691 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 691 0 obj 734 endobj 692 0 obj << /Length 693 0 R /Filter /FlateDecode >> stream HWYo8|.`{@]U޸QsQs ssjlΪ`SjgҭbO )(f[㌃uL&twu?t9xWjAl-|R m\YUBGKu9.KK;ѩqB(Y3S(vF!V VHVHvc6*jb(uí{}SO_ Eߢ kutvǷfn1T&rչI4EˎB܊6PX\{YĈLKD]E`s =l5AjjO|pF ǐ'4}A6݀\A %oX]$Q׳ITI,_)ZUUy/]-=1~Z4W]eDDw(x㊍gFu|63^D$q,v_?8tA0 t*^Zvw]}nbl~OV_a<r62.!-K?ZG'EV$+`E/dَ!PNyYJXJ(`~://:;|4b9{Ph/i,37" >U/ 7htD+] Pm9 3Vؼ;Y3JZw :'gB9$<{= IM/pnB+LymZ^a4Q*)h(c@Q#JA, )U,^62WL0_|ּVh9t6d]ne.q}!QIɉUeYT#о'cw a6#?SfUR' 09a8\3 3t0!|25<').gq@! endstream endobj 693 0 obj 1096 endobj 683 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 650 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im122 684 0 R /im123 690 0 R >> /ProcSet 2 0 R >> /Contents [ 686 0 R 688 0 R 692 0 R ] >> endobj 697 0 obj << /Length 698 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DB{YTQF} cʗT V9 endstream endobj 698 0 obj 177 endobj 695 0 obj << /Type /XObject /Subtype /Image /Name /im124 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 696 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 696 0 obj 734 endobj 699 0 obj << /Length 700 0 R /Filter /FlateDecode >> stream HeRjAv;,LE03욬 "ărdr|G sG谗=v Fizb5W5Uu wmvCƵEh'V(OsZB.ދ}r$ވ\rtwx$lYkoj(MLei3!K,vTu,:)WpnZ:IF;x-ͱ 0EBA3LP1ݬAE9PDv+촲0u/,#v"*7ju1z^I2笭L3Q{k rZ  3cL,jiU90=o*r= !>4=HS,+ݨMZ֜Z1/$5j/H\s%gmc[C@eLspVõ<8O5j4=( endstream endobj 700 0 obj 483 endobj 701 0 obj << /Type /XObject /Subtype /Image /Name /im125 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 702 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 702 0 obj 734 endobj 703 0 obj << /Length 704 0 R /Filter /FlateDecode >> stream HTn0cvDR#( >[SL9 ,*%&.I=6287HoIN ]"Úd8]#(-6p,`sTd N(xD~FI<ԫnPNhqY#B^*g{y)'])dL[$K{ߺ?Wy@~ )X:X(;GZBi'7pTS'"[*;eAhƈ#tͬ.AITG4шPNO:iYd4w'퉅jT ۩EZZŠxu@)GZRp^g :cʑ؟|rF`=S!ctʸfqFh\y+@V.5€CDMCDr2 W%4kL`%:k)?B|ҊӨ>tC^+qyc > /XObject << /im124 695 0 R /im125 701 0 R >> /ProcSet 2 0 R >> /Contents [ 697 0 R 699 0 R 703 0 R ] >> endobj 708 0 obj << /Length 709 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsRn;ӂ$$')CΎD0dZiu D 7zCC"p/#ĺF:^=V>O<;az$Dn gREMU&ta*_xCw9 endstream endobj 709 0 obj 176 endobj 706 0 obj << /Type /XObject /Subtype /Image /Name /im126 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 707 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 707 0 obj 734 endobj 710 0 obj << /Length 711 0 R /Filter /FlateDecode >> stream H]Ak@_L4^KaMz`/bWYR؊^Y 6Fճ%Zh[|m.ֺb헡ҽW#> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 713 0 obj 734 endobj 714 0 obj << /Length 715 0 R /Filter /FlateDecode >> stream HTr0]: Q%y @k a0AlI ^"-MW{Α>Aa )H#H1S੔AtvMrDmmĈ`n%%+uoPv)(vZ~%g]c rsKGUMy0>A-GvږUc_,>$C}/mI,) L3KiJfKvKֳcI|W]w U^9ow2ăabI0Ő.(!4qy <r*Ϲ?9~/ޜm%ɱw=D<4cdp>dC QMUu鳓LQm۴Ul7(x0:ĐG@ Px Q.D!ljd!^Xx %,I;/R4@_ٷ=Y̓ptrOA̻ǒ⩅dp>i"!L{}W;O&fYlFgeS+χWhUS|3=> /XObject << /im126 706 0 R /im127 712 0 R >> /ProcSet 2 0 R >> /Contents [ 708 0 R 710 0 R 714 0 R ] >> endobj 720 0 obj << /Length 721 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7d6=,Pj(Iӄ1^ޓ 9 endstream endobj 721 0 obj 176 endobj 718 0 obj << /Type /XObject /Subtype /Image /Name /im128 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 719 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 719 0 obj 734 endobj 722 0 obj << /Length 723 0 R /Filter /FlateDecode >> stream HeRJAD:hڽ0MN8 dor!Ń$3Y"[3|@BBLU05u^ IŧsH̛oIh1j\3-W<|#_՗kþx+FNpۛÍ?|僾w{pRD`8053B3fiɽ`;0, Vw)qZ6 8t]sM+$ga4,(0vz+SSNՕeLUYy'%\TeE:u=RC9 ڎtm\Hl kX[c.tԃm,SݖxGA |=!+Fuæ_Ϝ`nS  r.֯(dfzl'I5>?_gVL读;!c4o_sh.G7 endstream endobj 723 0 obj 494 endobj 724 0 obj << /Type /XObject /Subtype /Image /Name /im129 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 725 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 725 0 obj 734 endobj 726 0 obj << /Length 727 0 R /Filter /FlateDecode >> stream HSn0僔%)Rhȭ0heaK,%"^l$JݝY~&)pZ9ج#L 0e!xQ@s)C`JP{~~jTWxO8wV_N I`+BHNϔE,{=DR ꠏ]ku]!HMNp0㎎~/X hYx?0CBI0lPdpiG7Ua'زo:Nďݭ#te-+>0H@}6vH\&Щϗ) Pe,A~*^ڪ1v5>XUynb8mO #ö!5p:҅3Uwl)Rʼ+8 ǻLuF*cNqAfʏLKg"WpI'^_P%B7.doTNgI 2ㆼU aokGbًcߍ3.쓿E7_u endstream endobj 727 0 obj 516 endobj 716 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 717 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im128 718 0 R /im129 724 0 R >> /ProcSet 2 0 R >> /Contents [ 720 0 R 722 0 R 726 0 R ] >> endobj 731 0 obj << /Length 732 0 R /Filter /FlateDecode >> stream H]N0 D 0G8Ԍi• P+zA$]i-{$YOh]"a(LAIŭ-qǺI}A9‹P9#Tcnr',GԯaPk|}}CAɻ)ǿ깆oOR:J 9vV0־\7M| 9 endstream endobj 732 0 obj 179 endobj 729 0 obj << /Type /XObject /Subtype /Image /Name /im130 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 730 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 730 0 obj 734 endobj 733 0 obj << /Length 734 0 R /Filter /FlateDecode >> stream H]MKAǟuZREz2Pרk"kMJbRJ"YQ%\NBlq^ Yv?\l]=[ZmuU_m꟰F@w,SjoR>17:q~zb`e&oUYY3Z}X%r&2Djف%vMQ^ J7).ST: !GD&&l!߱i2]XQ1ͫ_"(%Ewx;/eEc!tĊ;HӬÝd HJ0Mb!/܍#C\0ƛACEd\sTAB(oޕэ"Ztv0'f:>QO{dc%EY/xTQE]QX@)pN􅨣67fD> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 736 0 obj 734 endobj 737 0 obj << /Length 738 0 R /Filter /FlateDecode >> stream HWَ\7=&F8Y&@]?`6n;AgxH^ݮ`R%<Wwrjѕϭ8w>9Z诖o9N7RH#PRgٞخϯi j#F=fS~#)Tlu_F>NMn۩2G JAM`Iy憀xhRX!qm٨NtS[)G&0|:w-p@_www9Ya:I\>PL2w?/֘ضM ɱ*Mj,ٴAƔ|z3$*)txCWy''  Oݗpo^WM)G%ha1k$%dP|Ձ#~P|;QǫP o޽Jb by%u:alɕ@ |:Cn!8?=_$$HDQEM!;rm٠X53B-D^kvTgU\(F G>gˢH/ʐ6k;R-G&xFwuC=nS*` N֥ɺgZ xl Jgƴg]3@M?Fgg z)ѝ._Π޳\:x(|9 L/ZVΩ*]@w8QAϓahT#Z8PnMj2 {t0=$쑅96 r6ân>lb E!V(;jZ#posO:* )7{J QD dQ"&F7! _5, S:o::@Ԝ tRc.Yt4+QyB,FGh R=q$=r34otjtp'FKyHvɵaQwl+t!ar7ˇEv,,V8]^`7MѩXLLPerYwZV^DJيWbIY(e",XWą%Y+׶X(vXIQ= pJ#8#pԩ|@eC`--U&ż$)`{vJS)EI)M{ܢKAm#_ :o)4,,W xW '9xuAm);7g14}gsh70,VA)lGLsL=qhMh ѓ.\CdVPakX`mn>,/_& Q5:şL'fcc`ڃ! )Dh3>Y\71݉3Y;:idش̊d.FҦDƤ[ܨySG}7T0S#b5O$/+xRmPc&j+Kn?#ذUbԢ rI|D_sZY5XŷlN{)؏FseUTS %{@z W H|ư<ע}A0Tv@UEҾvf+KƼ#vHQdF+2[EV)+|aFԂg!Fk~0i1_ <6&WğONlrY^'(7-޾wZ endstream endobj 738 0 obj 2223 endobj 728 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 717 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im130 729 0 R /im131 735 0 R >> /ProcSet 2 0 R >> /Contents [ 731 0 R 733 0 R 737 0 R ] >> endobj 742 0 obj << /Length 743 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$Dnav=,P(Jӄ1LqY9 endstream endobj 743 0 obj 177 endobj 740 0 obj << /Type /XObject /Subtype /Image /Name /im132 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 741 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 741 0 obj 734 endobj 744 0 obj << /Length 745 0 R /Filter /FlateDecode >> stream HeRn@ WmJ#B"4u6rB‪z0Vd n|E|~VH=*eg'RKތ9d3{V7dAvnSFǔcW,R)mS>00>:zrt3:1pAntckrvnGC8Exޚa0D@xJ|t0@uǃoKl2< +◬j$ LVgkݬ9bHP5/e=/rb|S6bǹqZ`0\FAYmEXYTjqϦp+/ƍ[dO6vF?9 endstream endobj 745 0 obj 479 endobj 746 0 obj << /Type /XObject /Subtype /Image /Name /im133 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 747 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 747 0 obj 734 endobj 748 0 obj << /Length 749 0 R /Filter /FlateDecode >> stream HWYo7КÛiDnֵkwr٩l#g3ù^5h7^FڂS1x:@"n6 mz8tz<70 z3}nH& S'%_w 9jҵ6yiXd'X5g\$ "Fobgޙ-PAU1xuK[wwǖג$1FĞx7d 5<AѴ4|un!&x"H+X YNR @ƨ\=LU*"HKM9^5 &{/FdvK5166܂ uc3}J3 .e9VqL҆sðe{֦Ȗ9v>FK80M B'l/i.>$AT+`e&a=@[dp)/&(Z - v"8KU7f:`|7&efnRRf%Il\k % سeE<fjy&?F endstream endobj 749 0 obj 1088 endobj 739 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 717 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im132 740 0 R /im133 746 0 R >> /ProcSet 2 0 R >> /Contents [ 742 0 R 744 0 R 748 0 R ] >> endobj 753 0 obj << /Length 754 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU-yf&f`hK iI6!쁡 X ~_S"C3I2R1tu5B 9V~Co> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 752 0 obj 734 endobj 755 0 obj << /Length 756 0 R /Filter /FlateDecode >> stream H]k@ǟu)] S8bL$.7J %dz-#VWHhȐ%[sx .jw{߻> \kFd]?[&jmD.H+K5q# vk["aqCƏPCGR#?PTfhy' #?Z|O-CrGXuZ}eೊz;nA|c0xY1 )pvpA翾C"trYϴX`Qs<©Wr2Bx19^|2fm6*EY˪J KW4(둈z9 D́LTBjs%R^y)T#&Ilh/{%\ JU"pi]WŽ"הoʮL\FtwV܍ڋn.ٺ䴱;l endstream endobj 756 0 obj 491 endobj 757 0 obj << /Type /XObject /Subtype /Image /Name /im135 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 758 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 758 0 obj 734 endobj 759 0 obj << /Length 760 0 R /Filter /FlateDecode >> stream HUr67UARmrC>&!k> ^$*>e3ݍ?`d X~C2i$e!O! 6X1wْrQw8~ßj&S+${yT/uC`[#p@Vb\XU E>*SkidamFe^uF,^`xx(J%[LHy^D$p*;f{g/m9v0h:,tLB/ u<Ή,Ntf oclVBӡ] K ƹ~->@i\"4^`^p'3:GQ9%吲Z3)gH&8&jνߤ $,?ޣWe20U?&w?}#=<6,"fl%-) :Gפw3t̿%쓿އ6=Iv,\S4WeXH (^_3r-ǢʯRYNrem{qUmqv(2  E˓mY,ކ@cd2ƯH|6j-%<wtKu[}n-*yzxHV+KPťαX83s2g8~F:c vo:ds"<7pe9+qb|(M#{R:ue=勂NB_@&d1 ;NPV 7(tvZԼ+H+};)%1|]c?RV*` )'|;z=08C|;|*b%/RIA16784tICqa'Y endstream endobj 760 0 obj 859 endobj 750 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 717 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R /F6 761 0 R >> /XObject << /im134 751 0 R /im135 757 0 R >> /ProcSet 2 0 R >> /Contents [ 753 0 R 755 0 R 759 0 R ] >> endobj 766 0 obj << /Length 767 0 R /Filter /FlateDecode >> stream H]A0 EO;e*ٖl.!in}J) ^%243 L$)So}ƚRԍARAчo*1aI&=O69ʫkjZm:_D $)tr5"XPFccZ|yj9 endstream endobj 767 0 obj 180 endobj 764 0 obj << /Type /XObject /Subtype /Image /Name /im136 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 765 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 765 0 obj 734 endobj 768 0 obj << /Length 769 0 R /Filter /FlateDecode >> stream He1k1!ki,$s!ĥPJҡ B s/OЭwܐ5A&K褀V$H?${nj~atog3mC{Qv툍==F4|͢oXu0#[NN^} l4zPKG^h=3 {Z``=k^@{rmwdy6x+SqJz[jfx_("P =czw޼ E/D.L Io*5r=q@FȮ"]!Sw:ӕsn_ ՚ i7jwRĻ*S(]rȧ9p1|4miŲ QZLP%seTmnKff׶&%Ӎ߮8X[l{'E>?7NQ4_Ǐ@زuvb6LS endstream endobj 769 0 obj 477 endobj 770 0 obj << /Type /XObject /Subtype /Image /Name /im137 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 771 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 771 0 obj 734 endobj 772 0 obj << /Length 773 0 R /Filter /FlateDecode >> stream HWr7 ~Ngkԝ^rJDGv&_ _nss@XV?߬UަuJݼ^^C :Poam+յ^`c&-_yUo?lzw9w/ۻw/^O+7LFRYA' wN.  ~H;k=JH2Z6/{do;~of6js:[h΢ȓ:G=:qw t۾|6/ D6w~2۸X{.:ڦG62plmK:̟_nVƢ>0T!ub01ʋLewB Tp#FUkG>']6=I^=t4&LuV\BsY;a|xSx@l$O=|cI >>!/Ac I&7b4$9eft~Ix$>OCJLWsɓunlJ緗r) buZn9FvYn H#.PRO.ڲ@i!7 ޹ϼp`A1_Hp.=@n!7 ޕ6 r_8sA0iᝁџJ g. zԥό^ H; v!IygJ4qӚt__ib.;րbϙEy ZZWHl{]RPNd85[b9qڋHH~600xb˔6ڰ0ؾ@%EInvjyˌ'ljK *m)ɳ8Ra!'IKhFq ,[QfN<3DG{CP@{ LHDDo!b 74!6emF6 @#Mrh0i@ k`?^L> !RP|^_#Dhw2-ҡxK35"6Uqǵ0Hv2=ӅUB-_py,5^u3lgZy`Alvcͨ%A+ZeD0_@P<+a my3#Jo-K#- ~[hxfeQd-_Z5~Hx2+ ~+׍T,iĬ>G= hC! nY刹Q+ͱ|~FM [)H2I=_&zK$'jᦶ6uY%98&~rc9.xgJ(ͯo!7K~Gގըu\ TOjz8lNP붭No!˔x8~7N>ֲW0sͨw{BLX~ZLM/pouYBX5-^WSUkޠLUtl endstream endobj 773 0 obj 1611 endobj 763 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 717 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im136 764 0 R /im137 770 0 R >> /ProcSet 2 0 R >> /Contents [ 766 0 R 768 0 R 772 0 R ] >> endobj 777 0 obj << /Length 778 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7l6=,Pj(Iӄ1^竄ޔ 9 endstream endobj 778 0 obj 176 endobj 775 0 obj << /Type /XObject /Subtype /Image /Name /im138 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 776 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 776 0 obj 734 endobj 779 0 obj << /Length 780 0 R /Filter /FlateDecode >> stream H]RMk0~m-B V7mݤP~dtl#(=P04Ȉi Ƈ\&IFGB#'|d{summV{m#HЧh&!mKіyOIpݳ/gG?|%.g0Esk(9rU)4naXDPeYD5=F%G੣8C4 ې%=ljfm2p1SA ]^~V.T^pQPJOGY}K(\Je\w^|DZegp1j&b; Fu-$^l̞ 8+Z-+;&WCFa VG:lf1K+f~MAbe*~қ=x}e"e0q6[{ݝZX<^NCCn/Z;a endstream endobj 780 0 obj 479 endobj 781 0 obj << /Type /XObject /Subtype /Image /Name /im139 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 782 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 782 0 obj 734 endobj 783 0 obj << /Length 784 0 R /Filter /FlateDecode >> stream HSN0~D=cw+ҲQ׎^SF3L pیHDãRPCvsOcSV(BCCy3vAZUƴ+ݵ޶{^]oF X{T.E 5#%[Zy}\Pu d NeP@|O/ Y7rFRܣmkg@;Vʃ:3!ț0Ќ3S> /XObject << /im138 775 0 R /im139 781 0 R >> /ProcSet 2 0 R >> /Contents [ 777 0 R 779 0 R 783 0 R ] >> endobj 789 0 obj << /Length 790 0 R /Filter /FlateDecode >> stream H]Aj0 EO;e*ٖl.MWv ba}I Od*#0q TL?֔VH:9^cP{rH2>~no]Kjz}C$AO[s 41ؤiX6r/o9 endstream endobj 790 0 obj 180 endobj 787 0 obj << /Type /XObject /Subtype /Image /Name /im140 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 788 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 788 0 obj 734 endobj 791 0 obj << /Length 792 0 R /Filter /FlateDecode >> stream HeRAkA~RvE0l!hnAJ=WBq/Woe&zt&̼{ݐ m{c/x{l,m :pV.-q#bȂ1H ,+{ɮ6 ZԺLe"QzQj<∉S ! wsُY#vRNBez.R4Z}V@dϠ]Dv_ъrzT̗/dnp.<-[lƺԊBRl V747Lm,)|Mf" 1AמspizpO'pjOƵ[f4'NyF endstream endobj 792 0 obj 489 endobj 793 0 obj << /Type /XObject /Subtype /Image /Name /im141 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 794 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 794 0 obj 734 endobj 795 0 obj << /Length 796 0 R /Filter /FlateDecode >> stream HWn[7I+|?EZnQDɕdr΃:#/ϼx8V?^Uu J]kWzR CA^6ƵޯD`E& tw?m'0Y{=λtKuiUt՜z)Y%j΅Dڝyw7(Q}'*fAU։o!FjYe:dh 1ź).n:}A,팡lλA}iNݩt~B3>~bMn[==!km,.w`B ?R f[SLJڜyK;)-9 \i sIA%d*^l=2ӱ6W0Dr|y-#k@4HY$S?"Xgb*G;u"U<n kj rc&<S$UGz2'{30i bNӶ$Gߪs 4!`Nf&LA,5ˮxE;cҌnOH8Q7(.DƅP$kJYwF1(>KĒ;n:(CC;U?ː@قCFRĘ1p`LvXSۅ "90EpVL䛌(M$Yx.Պ+0&O<6G:2ft'l*0}%y(jõJdhSܤE˰fz ٟ 5 ;8HJӳǗV~GX@SB Z e"1OaQƒVRK,byRye/H.8vQ+UQGILTrV79@N_sj >zȱtro*>h2M"AMNxOB:B09T#). ?Ɥ{=!Jn d6y/w{\ { jgR. t}_[r\eco^^%UW-=Ime$E ; մm_nҝE*NjcZJ=? [ iKG$o583\Qj.|ZkZѱV5TaY2~,$.d9]"Hv9ѷτvŸ豜Y &eԞKE}ʖdyܮK)Xf儔ݤIA^LD>+BJcx,y,44HyFeahxG;?΢×|O;ޟ!vE<44|7n9O7K Cccn5ډAq3 endstream endobj 796 0 obj 1798 endobj 785 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 786 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im140 787 0 R /im141 793 0 R >> /ProcSet 2 0 R >> /Contents [ 789 0 R 791 0 R 795 0 R ] >> endobj 800 0 obj << /Length 801 0 R /Filter /FlateDecode >> stream H]An1 EO;%,Idh- rQ@TgPUJ"? !|Jdhf,_L$)SLkǚRoA )Ц ݧvm-=`$,GyηH0&I9mR- XQƐc#c/Wqu'Y9 endstream endobj 801 0 obj 179 endobj 798 0 obj << /Type /XObject /Subtype /Image /Name /im142 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 799 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 799 0 obj 734 endobj 802 0 obj << /Length 803 0 R /Filter /FlateDecode >> stream H]AKAvq{)^ 蹮ѬQSln<"EL{]v}?zv=Z8\izih~ gxӟXr)k]_V)wMV)ᙰ6u&aGr.+ȍb6z Q%BEMR hs/_l,R|J.?i>H> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 805 0 obj 734 endobj 806 0 obj << /Length 807 0 R /Filter /FlateDecode >> stream HS͎0|wJ9N+bTqڋ71!u/mw%؂8r͌!{j9mF h `uݧB@v@=KVXu@Tpt#>qm4rvLj3i3_3y8{`@E l1^GN:XDž$ڱ [9=4,H)RGr&@ B1Wmh=_a9"hA73 a׽j KJ.9I}D=Ek,e}^IE6dY]> /XObject << /im142 798 0 R /im143 804 0 R >> /ProcSet 2 0 R >> /Contents [ 800 0 R 802 0 R 806 0 R ] >> endobj 811 0 obj << /Length 812 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU%y lo0%$Ǟ H _:G)IL)6X7Gx&d~? Ρ.o\HvaP^\sey:#/A7$ӽ,ԡ'e t(ھ\Eox9 endstream endobj 812 0 obj 180 endobj 809 0 obj << /Type /XObject /Subtype /Image /Name /im144 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 810 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 810 0 obj 734 endobj 813 0 obj << /Length 814 0 R /Filter /FlateDecode >> stream HeAk@_euW zĦ[7Kwۮ,"=Yz=,G[?AoMa=xšČfv[/HbE>"."䢭5/T%I`nʘd;UkBAl:pI& Nzy "ATbg2Z\`u6F bOxNDVҺB3sc=tԷ3eԟOJ2~)KSәl!܊g[ͅ~bnh2 endstream endobj 814 0 obj 497 endobj 815 0 obj << /Type /XObject /Subtype /Image /Name /im145 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 816 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 816 0 obj 734 endobj 817 0 obj << /Length 818 0 R /Filter /FlateDecode >> stream Hܗn0G9ƽOQA %ZzD`XkU_^laɡ[^?^EƭOɵ.K(kh}xV_v|h~Y^rzny[^ئ[).Ґ.Ї< cyB?0"Xcy0ʻr5wchcx\.O.yq>>1i^@o׏ >v:G=9ݿ^k贇ᪧ?_76Q儯'},l`zl^}Nw c4_oԾکٺ)G 6|E+}i˧_.be??/엿/a'->?!:n鷣o0EU*[#.laW~>+ }QBpSmڛ%ޫnW:`0Gܞ F/B簡po7M۩ޡGw)?cmWD[]#lPv؎)JcfEJS/`8`khv hwn:yt}eBҍ+Kl/)uU귡W{5:̗ L3̡C_[۱͵s:L[Y}\w' AhψRf2:.z10 s?fö"{ }CI`l{{6 vQ%m@:Ι; \YbcfN0z |6ћ#C 8h xaq2$vلfD(|QU}nT0I$iv *V4@AE*[oI|uD"EG\$)o9a9!JA鬡PmXfE߱0Œ@\tר>z#HV1Y0&rI^9oTCȘt3ULKd98?|oh7NfDUV T0tnL4!!}G'qEM9"OgCUMbgD"=ٯ0p),2 +Uaea0޾r~C3y,W) X(b8!/BIC(XP4M Ν 5+Qgן]h\QVM3_E/k&@)Ȟ=m;lʬGuՀul%2J^hbS%Q우RAMӯ4.G96U ̡Lu<0WSOM5z$#pc jd<툲:B[B UBX*)WpP=oEBJe](Ghc6 I$[M~"D ,&-9DC t:Q5w{<-q6DTM;VLkM%AKB?°%xs ~'g%a,L8hGѾ@gݕHg8!kE|AH ^$E{.Т.-,s TV5:x.w=!Z e2Q&IQsUZ0Z'jAWoۊ>z]}7]oFuV Gŏ+ D-7ĸ\ګ/#u#Z}( fh% E"$zD7Y{<9gx} vmiz*&4 DvYH,]| } xuu5wlR$c;N-%N:QrO#| ݂lV?a+MA'gܤ'@ё[ŭ9VM'_RǽUqnJ@B$jEͤ=n؅b'v1]܊`E$2!4G4W@*/ll}aR_Z|JG.16w)1}O4i5Hjt_B> j:OPadxK,D Zv:׈=ӎ6SI4^U*W'}4-'1bfqVhW#I : ̙_܁Z@;ן4ДS^wrDmX/Biĸm/.D@kgM<&Je,<} ۡn762mhcV&VQN`eE\öƑ@MB,]k`V]6XˬV0"}Յl)${AD{}Q#^vMRAG,`5ᕢ$Z~/eձ_W8 4.#`58M ۭp[ _Ϥ8(:t{5͑ض97:.S_\7$+-l Nt(t'Cv|'t܏ 4sc._6ZqC9E~Tk JJхkX9Q-[ _oaTUN@Cc12+b$>tkLTJgLEB|8}ռtsuSS*J j>KX?t :amy&h-`D056h%Ep£)I[ۈֈXI77k{#?7 0*fSdhNzD5 [;7 6" bNAǚЎvFxsDb1%=8UH"O\7sqo-EaL)$A1R1W%1"7-|/ޤzI~G ϵ9THVWY 9SmzƲba&--jdeba'f ogaA+aQԸaYG+X=Jl^5'9A%- f*yfN> &&3ZkU5]u[I&(Qgr'a.nRX.ztH-F,1gX(`Լq|Z⣥V~Y>j]OǾ}\m4-8 )d.ˋz+GBC/GN&|HK>|e)GM1GH _U?/]]lq"8^&4R"Xۀfǩur/"6NlfeG` -s^0&OMs& '8ǙHSDгs\p;psQ"Uk=XůMz{yX9|MLT+)}[%uNNQf qEHfg- KD[mt>[3ޢRF?N?{=Jo+yHVRRɣ, ƜEoHZ-]$Z흣(mE -j{VKrY'l+ؤgs&ݤapB$KCh#!lj@K/" pr;}&Q?$~QHv6C DnTd~tnJU?o¬>D푌䂹xHJ,յo%+tY0#ρvt60۱v\ޮ,-$ZOW&[|{ѸkT׸J>㾃~T{/xhf`Mmg#֘[[Oo:cCOo>*M,HgIS/,!~ՙBgS\f"RMT^uN):-nvcwHs;Y#TZkݟ# 2a=#r?6H|?-gd\KP/RlL$J$Xট] x3 |; .?#/N67HtO}oF/| 0Jcnu^>] RC=|K}r/I>ד=]wsٽ߷xu)9W[Pcw\__OGW?hr\uYxv-9{izI=j -;i^GdInsH8EWJh3l _w#IF '#ewcNZ]GVV,KZF8+^GtE}u{k7g#/1?iGx!E /%8H3=,gJˆ JhH;嵯9VmSҲ 4QzrA!}|%FD}]r7j{Cm4J(TMc?Ā ⒤%)% 3$GΕΐzgMdDmBM͞ȩ2B0\9a<fZkZЕa:R:+bmVMµbӤ,0ʂ4e:| ꂒ͌9W޹oxkdA~ϊVedj2=%G ĺqA^(zb.D3{2JB]CƳm? 4a7`Fߝ \۷nIK@t d.‚n y\,B%:dϾgJ _U pE5EP̜DXN HHEEZ䫦G^WV+J 7믘b-@zpa BKU響 s՞z/21U@*VGD,xTjvs3_D5AV ߘ}`SΜ3SLWs 3 unl2xG޲&QP3.x.TmZHip<=__cx%6'b3To˓h| endstream endobj 818 0 obj 6978 endobj 808 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 786 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im144 809 0 R /im145 815 0 R >> /ProcSet 2 0 R >> /Contents [ 811 0 R 813 0 R 817 0 R ] >> endobj 822 0 obj << /Length 823 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsRn;ӂ$$')CΎD0dZiu D 7zCC"p/#ĺF:^=V>O<;az$Dj24MT'>9 endstream endobj 823 0 obj 176 endobj 820 0 obj << /Type /XObject /Subtype /Image /Name /im146 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 821 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 821 0 obj 734 endobj 824 0 obj << /Length 825 0 R /Filter /FlateDecode >> stream H]Ak0ǟu ջ]6hݴqA&c-9J顇2mAF "9}kr;y(')n X{%1ѽݭ0`4w4!k[;;bK>kǂ6kPNXSN\|N8}IPffihUK{Il?epb`T3YV$-26^QF5;|܏z}gy~1*} kJ0Xt֦T4h#씏йXը֎VB6ٿj4CHW endstream endobj 825 0 obj 479 endobj 826 0 obj << /Type /XObject /Subtype /Image /Name /im147 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 827 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 827 0 obj 734 endobj 828 0 obj << /Length 829 0 R /Filter /FlateDecode >> stream HWn~ÿHse9) xNlxtw] ް!W/u_]ewDWN9ǻoxs9'RK'ח}zcN6ܾo"[k_|ۇ7/wn?/Wx|[BG8}{ ǻLx-+J^Eݏ9Ǜ뗻ږR)TJ~ϯh?ǕϹ>@F9yWY A0k»Z Z`и9t'#@}ǿ\ qe~9.3?fauο"~kHkkC6?;%u:rrʹ<&!7U~ .pY]@w%YF,j S-Iw?r<>1C'fPqx[Rߎxx"<]}c6`ۗۉ2[uqgg];8×D91q=_/7.c߽=?=^ZˠEs1(*"Q"#;_a)CNS:p(@Vn{QJE*Q=]H?׋!|+evjȱ=B-1[uw7Nӏt)l?daOH4<>g7DtN5}lhi<'{ePvLŊ:Ӆ SEb~աKζe/[ciY L`#'^YߐF`Q=Y! iR5-P@ :9̧6C±ѦƎ{9>X, @Vٍy,JnI6Icv"Lq,8u Q=3DH}BZth`F}+2]+z*+PkVvX_gD3#z 8Ʊu&H cٟa-!pL=?M|X+{-Cs܆tԴQ\< ͆' Ym|XM@ Ow(&v=J4ZgY2"{F8ܙL$[Z׽ u bAq.Rk=#En eP$DI3bOQe8*ܟi2>pT6čظ(Rʩ?Ӕ;. `%h9I.,@%C2#aY"Q@Z M &(Sʨ~ ,eO/ɬxJ]05]M*k{*M޳;_|M\AX|ѵu_K%/* 9[1ZĤj52<.*MHK2$Q+ЌdTBz^=n"!9P|n} _FA]A]AYA9q'KeGU9xniRp* W%jW8e>.bzfbuUnz]IW+أT%ˌ3 }Pq4]JS" KU'6v$..8M_ bEs#'=eXze >#;p1jj|AJmU V߸u[ܿ0k,(@>QpKuL]U Nrw B&(7C]5HoL=fCj Hs(]`鞤A \sAzT>>l8pR[:2UdZ@^T3 V gn Po@*.Ȫ,MQPfP'ohY_p*01+ nVp"jfvb(eVf@d,3*4aR(Lyd"MK (,PjNV_P]jܲa: $uE0 bo]t#_l X.ejIMc`?$q7`b[2؂!'  )fTf a~dy z"~ݰݹa"v]@^ x7(/v4>v3΀'I4.arM^rúIR3ib_ U!?tOiGLtJQXwpARv-EJ3ՊyE{0بPZBho.qQ^祕fۘ/L s ^ݙu<K)@/,YqNFrӋjDdV[Hp;eI |FT!{V[.%r I"WJCf9Cf",(䃢jT}aqVyKR#e5?^HXjA}4`ո>)NDN{.vzؓhM'Ơu|ФwRFil B*r-*kPTXI+.5Ӗ]' +}0TLX^Nʋ _J+3o |Ψ3=]7 JA"7c֪]@R> ] X^HwYB-̝ N$u\ECu)(n5Vx,}AŅ2 S`zoxc-[&)r5zjRo#EIT? Q5fɍ"WK=`sP5Z4b |?M^O*tvnExAGtDS$e,E}\[Q2?,|V/;]"45T3Wyޮ0HĮFY}oRtj@x*k#|ss_ js Qkک*)tWH7U`v6o*SSe}!ѻ9-dpdnp5ŖHg;~D-A==Z?"W [n|`O΅t7BH9js5u.N~=Q3zd-͔8:]8!tP&IO68ǤٰQ"ƈ}18d>򅑡KˡMcf.Z3/'MDX@V'NIJx۵ ߊ{T{yO ۪MX뮉4ApbuN&d ]^_U+r{qis'CF!RNb%U¨ؖ) ^my@{Yec}d'qwpE諲v/an3I}Lf-Xz,Y>O~n磒bkt< \&,4dgW3 zQ=]Ze  zTRvW/b2OuF>m72G>ByPŰ\\!H+K>f$kgPj: 3 5p(rMq>u]3,=1=OVz<1mD"ijZU|j|FS)ސH+lX 5u%V,Ps\e$<-^T@'jJ`EN>Nwg,'n!lBd(GL d4=b5=C5^YFM^<˜^uJڌyp=Ύ'uE@_G??w;rYㅣT$vQPՖW@I-,befjv`T9D$ީ{ )JHm] ҋNY<4u&A9{SWjn}DtLUpW\.1Lbig$;/Xm;h"Zi9 ZVq ^#\!9pjBZl8_˪Ol~vP'Vg1TC ͻ@2 ZFў vNh)E &ڳ?țV jlj4aٜdq+O 8 :HD+UޡyADjy"k#"e]afaKXf`w3h/ ɠpF/ 67>nr/2q)DÙoE:ߠ'ͱ  't. T3'/^l AdpGKR?~P vg.輫KY}"%%AV̓Az {暉̊dA'G-΃_ߎl}"$Fh.]i WhI8UjXDȠut( :ammnʏT@VCE9 %I^BEjX%ܲs3X&ɆnP_Wk_6KCGhuӜA{ Nw'TۮSΦsS~\10_1Ыe!soC}K8?nYh֋ xC,,r#LSs๻`**䦰ӭ/s_54+c3jT7p#8"9lEnNXZfۭShGe>fC- UQ+"þoZŠzV=nbh+!WR9%gاZ9<)a Ȩ"dԅDH(Jڀ i89c3}&X !ޒƯ??(m endstream endobj 829 0 obj 6324 endobj 819 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 786 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im146 820 0 R /im147 826 0 R >> /ProcSet 2 0 R >> /Contents [ 822 0 R 824 0 R 828 0 R ] >> endobj 833 0 obj << /Length 834 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=Lm{YPF} =c/WݽL9 endstream endobj 834 0 obj 177 endobj 831 0 obj << /Type /XObject /Subtype /Image /Name /im148 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 832 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 832 0 obj 734 endobj 835 0 obj << /Length 836 0 R /Filter /FlateDecode >> stream HeRj@E- . c)V쀩ĥJ%CCQ . zrXʲ!!ӛռ9O@ڷ hV \W"hsyX4I[>.98z~zo|8Aq$'W8N-zpK޷[Z?֭kZQѧ;[`!]Re"z\e~:[4,R`4coٍ!)N"g&7E*uF!S S53ݍXxij3C?JD4Du(XjG`,4MV;> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 838 0 obj 734 endobj 839 0 obj << /Length 840 0 R /Filter /FlateDecode >> stream HMn0O;,kdע iD4/ERM+罙7$'I`s Qe4^!@DFk$E$w]'շCW) 9: LX>ˍ0W1aM>x57ąψHȴU4JJl\XΗ_tvu'Ym%nMC>xg[Ե'Y3h% ;irRrkmʅ8/E645xx~"|E/8ļ!4j>ކYd|nelʂ1X~CaZC|]))_KKdi}S6WoA|f4~l9+ks\nn v endstream endobj 840 0 obj 585 endobj 830 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 786 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im148 831 0 R /im149 837 0 R >> /ProcSet 2 0 R >> /Contents [ 833 0 R 835 0 R 839 0 R ] >> endobj 844 0 obj << /Length 845 0 R /Filter /FlateDecode >> stream H]j1 D0ȶkCK[RHKr HHz3H_ѺD2qg0i%&ў/b@sky', w0ch(Wҵ~8" WǠCєWjWC]Lrn_j\9 endstream endobj 845 0 obj 179 endobj 842 0 obj << /Type /XObject /Subtype /Image /Name /im150 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 843 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 843 0 obj 734 endobj 846 0 obj << /Length 847 0 R /Filter /FlateDecode >> stream H]RMk@UI6RrJQ삩%ͦJ %C趔KLG[鯐!^E.Av?2bVOo̊glg{KM[9>#xC m I =T[|>=>9{=2ȕRYD2W4Zq É ?Hc%WmO,DI}7F\X # 8*,kF;^^{c"t%Ӣ(-r39+B!=Dٟ _EY.pStNS>flʺe]EIǰ^+m*ث؛h9b2AD Tם4.,[J rdEw(`Y=] جKUԫX5 ϶uB Tc$ܐґ4Pj+L۵M֤&? 5^{XfӳV"`S endstream endobj 847 0 obj 489 endobj 848 0 obj << /Type /XObject /Subtype /Image /Name /im151 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 849 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 849 0 obj 734 endobj 850 0 obj << /Length 851 0 R /Filter /FlateDecode >> stream HVnF<:@M}I-FIėN`a"1I{foRۗ Eigg9{Vqi׫S$ZIP( rfSӂq|1Pm_ ݮ l7[ӎpluM?4]?gNݵ7h1u5+svۭwnf+q;1:/{%<9.ɭRJl#m a%Q_n߬ nCc9#6/ٴ*T_wV܎Pos_KJSLN܈-JcJ4v -gL9O%{deP~(YA*# Sk\ڢBܥI\MuEyJGLw"U9%$pm9{|dlYR?~8BLpRDw} uلʹ@ 4|ؙASkȍDT#EGU@{bȅ L]%<.wS uNrv )~<ﱭÃʅ1)SAD(8Vx*",Q2[7U5VFR=MY0Teh`i33ؘj07~\n'CoK@BJ@:3:4mrSڈ ^+L;|cM})tΦs F-Rh J¹$+o(,'qzwF(a# %k;\A G(|wp|;cA@;dW]p$^~V WSgR/ eV÷ֱsfE;0S}5e8^/AUp:> /XObject << /im150 842 0 R /im151 848 0 R >> /ProcSet 2 0 R >> /Contents [ 844 0 R 846 0 R 850 0 R ] >> endobj 856 0 obj << /Length 857 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$DB{YTQF} cʗ$9 endstream endobj 857 0 obj 177 endobj 854 0 obj << /Type /XObject /Subtype /Image /Name /im152 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 855 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 855 0 obj 734 endobj 858 0 obj << /Length 859 0 R /Filter /FlateDecode >> stream He1k1ǟ抩ⵃ4Bsq]09'qi5ҡRL E9ҏOЭwxȚ%tWOρ Nxrv7pmoZډ| g坘E/yfbQ-LyYtGã_>~c>,#2ɌWc3t~-[4Цg^@%C!nMb`yu7)G{yYZ:$'z 9P*(@US\-Urk=MYHT`j2S)5h apQ\j$ܥZLY);V2rYaJTB7ƩBp*F^2ө(;((Tr}|n[1ZvmmŲµQ9LP5al3Kzɓ߾184_OR.}^=n2|P?7Oنo'C!r endstream endobj 859 0 obj 477 endobj 860 0 obj << /Type /XObject /Subtype /Image /Name /im153 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 861 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 861 0 obj 734 endobj 862 0 obj << /Length 863 0 R /Filter /FlateDecode >> stream HUn@<Zm#IӧV--Dc q@߻7L'l={朙/"EAP+00FF8`̔C ^A4&@eLm2cL4e93EH}|4T:a*_U +Ȫ%7EU1BK{ &D7(rje֜@( Ea)?p.] 7_hћqL$=) X(&S$uR, 6irO;N>-dOcv Ͽe@|a~~rz ނQSfn\&Gr+#/InBW\uo&ݜӚKYpi$Ŵڕiu_}aT<'3mGa.#y@B!Z8 e؍Qk!ENٛtF?Aifηy LXڢӞ@,kCU3iiO7@@Vz4+zYoV_gDÈԱԒ؞9,#f}550o&2\@i=T~& hb2D*/`($N/\F֋ :lUQ?u34ؽ$ainnڄ#K9}JNۇMl~8~?qΚ$`n]uIْ {כ$}Wvql;?~jVLډ?&A` endstream endobj 863 0 obj 752 endobj 852 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 853 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im152 854 0 R /im153 860 0 R >> /ProcSet 2 0 R >> /Contents [ 856 0 R 858 0 R 862 0 R ] >> endobj 867 0 obj << /Length 868 0 R /Filter /FlateDecode >> stream H]AN0 EO;%,jveAnP*RgD7hnOJB// sd2w|&N`J٭.qǺQ <3P gӋ`lJU.:#Wpv1Tki|:^o1aozN=rC&2&Ʋ/ML1/9 endstream endobj 868 0 obj 179 endobj 865 0 obj << /Type /XObject /Subtype /Image /Name /im154 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 866 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 866 0 obj 734 endobj 869 0 obj << /Length 870 0 R /Filter /FlateDecode >> stream H]RAk1~QZontW(ڮԽA{:p% 'NO>;>G0C{wki9zz J gHmH bmߊA pQ?onR^-J4䙀L. 8:Q̗$W_r*K]ԫ Nj{OUmRJl[?{VSz~X祊SުB25땜}J: ooݾ(,Нrjp;<'pJM]_SP<[\_ &e|P۵XLъv#,EW烥~~|Om7g(b? p endstream endobj 870 0 obj 475 endobj 871 0 obj << /Type /XObject /Subtype /Image /Name /im155 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 872 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 872 0 obj 734 endobj 873 0 obj << /Length 874 0 R /Filter /FlateDecode >> stream HWn6Ip'['ǹ(mhcߧZ8&0`W\~M']#[i5;x<ݏJhj4{lvUhHŨ*:\? a~-?6Ȣ,tZ-QphZ'$( 戬8bA,@|s!>UZ@LQ 0ćM4?Q'Q|~R{/'Ii8oJ PJ m|$E%2D)+N )d"c~VUk,FP:՞NFl"W,Lg8&8ˆTb|JCp":H*2Im*,t"af%/u X 6 "k-|@7&_r3҉dy.z?ba@<2CT\J ̊+:G$Ұ(Mc$-ZopGqV]a™Eh)1!CeoCy$n4IgIU^y<r1 %8!$&$|O~lI=^y" Ǎ<[2?F|ueT)iЊs#)-leM6=asl=x"9»b㲄7X p\0`W.O+5ryWU-FŦL1`mGh 55tn1X}+$:Uu{*Uufe@lAgy[[f8$0t&t,3h IQdr`S{f'%_ٺODK]~s̞(|MeLjKku6Lnc5I<.`gz],&W<ދqf޸ {2),d$Zn_F昖åTڳ=> /XObject << /im154 865 0 R /im155 871 0 R >> /ProcSet 2 0 R >> /Contents [ 867 0 R 869 0 R 873 0 R ] >> endobj 878 0 obj << /Length 879 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsRn;ӂ$$')CΎD0dZiu D 7zCC"p/#ĺF:^=V>O<;az$D]v8 *h4c SrD }9 endstream endobj 879 0 obj 177 endobj 876 0 obj << /Type /XObject /Subtype /Image /Name /im156 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 877 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 877 0 obj 734 endobj 880 0 obj << /Length 881 0 R /Filter /FlateDecode >> stream HeRjAv;,LE03욬 "ărdr|G sG谗=v Fizb W_tWՁy E-B;aWlw7Bqx"ޘעr\].^#Ft0rOLJG>#,짵gsZ{SCi/l`27#M! I_`_cik}LswpO2rcoe舘):@l aՌWf "/-ʁB/m^&^a5~_gQ1TT˿̯sݏY#OeMܖ?gmeiګ\C@Xfj&`cJdQ[&&Nʁ)SI "FdY]F]lֲԊy!Au@V~A+-9lK,WE4T.co -y t85WYtk6- endstream endobj 881 0 obj 483 endobj 882 0 obj << /Type /XObject /Subtype /Image /Name /im157 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 883 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 883 0 obj 734 endobj 884 0 obj << /Length 885 0 R /Filter /FlateDecode >> stream HW͎6~Ik/m&{EZ޸}rf8%'KO֜hX_Z8 qJV(+dejw!q'VwоZJyW&:t^ū?k7uty-EE:Dg߯0 r(VMHl>M{9 '&u 4G7!-7IOl]ՙ#oiQ,|c6&ҿc^ pt-_@c!`xA(Kfμ^ybѩHm&,e--/_(#`q#P0߳=ȡ/e9߳j|Ʌo"^<7.D=`34]Ro{2wTϊTATڌ!Ki F2g 87-;?wEq{mN\|7$OTrkK=LQiS;KqK{f8Kw/uAۋg,tf:@O]=S4`FD;zo@T3{*?|bO/~d==EJ)Ӈ_Gi5@){gf(ʧC 7sSc{ئ&a,IXJYkG+rLILf&%r4zztoDW7ř0lEtrkyOcdU{ט*v53? hY endstream endobj 885 0 obj 1583 endobj 875 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 853 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im156 876 0 R /im157 882 0 R >> /ProcSet 2 0 R >> /Contents [ 878 0 R 880 0 R 884 0 R ] >> endobj 889 0 obj << /Length 890 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=Lm{YPF} =c/WьޔL9 endstream endobj 890 0 obj 176 endobj 887 0 obj << /Type /XObject /Subtype /Image /Name /im158 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 888 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 888 0 obj 734 endobj 891 0 obj << /Length 892 0 R /Filter /FlateDecode >> stream H]Ak@_L4^Ka3~ep,ct+5~|QF KsQ{'3)xH@wwX4Yz`*!:+)zi+>ɿM>q?ϧB)Er(ҮgӉ*_tIcU] M;tBcnx ʨB1U7^YĨV8\ZUb{Л7uޔ|~?]eIb+We/hX/{U6hm žXzů_J^-C7Wn4^ ;vח4Gh endstream endobj 892 0 obj 486 endobj 893 0 obj << /Type /XObject /Subtype /Image /Name /im159 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 894 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 894 0 obj 734 endobj 895 0 obj << /Length 896 0 R /Filter /FlateDecode >> stream Hۮ^7ǟ`ú$>.K HJ@I[)<3j>f^x񿮧?zʡ5_׫Oc-y+;n?ݾ5?ߍN2󧏯__o^݇?zÓsʿz)}x3|-q}7a ~ކ3L6|fr0FwT@YcѲ,xfwxE߬Klp+#k/W~ =Q}KHNzWӻ6~מVt̢Vsyd˟8ۂ?TVDӌu~ AR\( erޥK*J?޽y?s܊AЇ# 4rКYJߎ,5ԭ=E$r"", g+]"&´ Q1P9&Hy+$/O ƽ3/]Z6)&MMWIk[KqL8?VRJ 5ι=ɴZc[3/n k}D]K4cD*Ջlpl(c( kA`(wE&<ʔhl>UG) 13M{4xPf󆬗WJ]qEҴigvJDs4xxM~y^|dX\ ޓ+}h@}EU)VE+zH=4LfM|}̛1,VY.s3D3de׌>wTijr`=tt՛x&r|nArp#W2t[HR,4~ęSg16TW>#F#:abtdN8ā٨("hҎ`2\#X3f[.~8qO(!5M,MVl$8VfN·jV~AA^#NG ƄPon$p$^oO}ԏ lQE3twT"-1dq_}S?qTV #)tTZ4Vx^bB|tEi_3A?L䐁sO*K)Ak4RwHsjj0szHp8*}cx&jQL REIu;Q- 89b1`P髡'gLFVQz 4\>C nZ0p͝)X? :l[EQJ"C;U;Hz&=SZCWHqR&`< ry` ̷bri:e*C"gc*m+:Spv.*&Xu.EV\F}olAf뷮@/ȃtS^VGNx`+w˻>cfs|@‡upcPSPETYVCs꿠J f)v vW[*]F%!8𓢠50AӖqup a'I .cRŊʑP2GBfwY:P.O@pډ' Y v[ ;K2cedoCI|& >t%*!^ܶփv~~j }ز|AXE\u|ΐÇ qK~02ɱ8 tZ =05 `'"3?ދ!VB,X,柰C#nx]!=xԍα+G/䒽ꯍk,`!NO}WTqv暧7n$kڑh-֫e7$7x#WF'R7۬dP'0X-M1qhM&X9^đş:_2ڹ=}fsQ 7<.Yt@1o!W9B4.\< zx[B鞓ys_5,uS"\lޘs]p#==Vm)l|j3e``E{v~Oy5\ػ:-$16 -#tYVbf=&ƇתjdӛN ikhAA_ho[cRY'#dCl|AGJ4pKF6̵xEGX#۱mΠ3.*yQ& `?>TF_)/8XsG%#k3biB#:鰀#&#\T`{o1V|Te>#]}[l^T@ޜSx $#H$k%-i.x=ۂnLcQmwFț@_//\5)5:+gc&o@+\/]kAapsRAtfɎB͍=lgM5& \)wFZ&~jpRYt#|]<=y Ή4 BA]xQ>q])Fjf6D$urc*Գif.U+~|Bv `]LXǸ +Ec{$ 4. fO6j}XCݱkZ62K.hNh]` Ma̠$ݨF>40wO@rD&h. p8!Zsi5E5]i[.:&h͖Qϟ}(3ڮxf`dדm|idtd fUoxfny|; :-/ב1I m% t|9c) ; e]suNj-mTj Yzh5TԴ*iK eRCuYS + pe[p"V|RB`LjS1yJŶM (q96q"1sX@[Ri)M@F֯[f^M'j⾪]`KFt-&0n'.ѫ76u]?eAY'dRQ,Ҹ;2 q_@#m 4?-EZ}DJp@ NoΔUqʲܠ ޹L&)nC;u># a }fɝO1\VՐJPJd]`fowd15[t\?o1r5_;h1\L0gY9&0ɯ'(cW -{@7(UH0$Fy kȓh:2إ?٬=mn481GXTZ) c[zF.ޕV}>]MEmA#vXb'dO#Myg7nHA/6Oq8.H %Bm 2*(Ht}=qO97|QjЌ*r;a-B!&j7WM,$vhW Vv(h7 l4Y;l}~hjeOtm>_?AS >,ZVt]ؘ 66f^DW||~v %bYpg˥|V#pGU_"pDу5R:E`)pV0,YpǔEGAI0|KzN>'=ѕde7Q=һvTֆwEٶ DnDy|®;$ .Cr\!=n%8_kz?d+Y9Y+Bb)9G3 ZJD& 43_-OIrPe< `LɬAC;F 9)ɒ‘T=d8X%m\hto?EeN yk+g s2F٭%ÉR:5@JtTSA32.-(iiɑ,Iw Mv'ud{=.hn3n?FF]Uv-'e`^gH|5Z/iM|`#eq _giB! g:.Gvo)U{IM6O4E}wpIۃ%ӜֺLZ}2$H 5ӺA-_iy}yRC^glgg8F3e^ q!;G?~ߥr,ʴΟ/14KnRYdIR;WRt ވly||/͏/uʠ&>>/?k֯ώkWnym&_n)r~iT( e!, 4 O-@ (cs#ifl Wt Xc`l$_BPU >T endstream endobj 896 0 obj 6196 endobj 886 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 853 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R >> /XObject << /im158 887 0 R /im159 893 0 R >> /ProcSet 2 0 R >> /Contents [ 889 0 R 891 0 R 895 0 R ] >> endobj 900 0 obj << /Length 901 0 R /Filter /FlateDecode >> stream H]j1 D0ȶkCK[RHKr HHz3H_ѺD2qg0i%&ў/b@sky', w0ch(Wҵ~8" WǠCєRVjWC]Lrn_\9 endstream endobj 901 0 obj 179 endobj 898 0 obj << /Type /XObject /Subtype /Image /Name /im160 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 899 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 899 0 obj 734 endobj 902 0 obj << /Length 903 0 R /Filter /FlateDecode >> stream HeRAk@~1i2xĦ[]ѽYD<,=P4B_[r^JOSPJsL3_yߛfC.ch%B- Km 6KщyTm=[M +4ׂGE45|g>qqq!/CTFx 3&'4wn@ IUkޡ!e9mhL[nsw 5J:ӖK F9Ұ@B}]}駠w4,c%UO%W588_Ru/, MKV]-JYqlIr! !$am]Hǎ=95$Q tGBj;9e{o_V`v q9s s42˹lXZO~|B)N_wOoJZis?N'p-fg7WѢ}vw7 endstream endobj 903 0 obj 493 endobj 904 0 obj << /Type /XObject /Subtype /Image /Name /im161 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 905 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 905 0 obj 734 endobj 906 0 obj << /Length 907 0 R /Filter /FlateDecode >> stream H͎0Fwj*6LU;Jɲ$1&2&i޾D3*E |}w>uT0L$XHBRI"'BBt@ =F1IhQϕ?Dh6<'vmo+=o-6hFGX?E<p@ҁ]@K;`'F5aK+CArrO3,%S@c9A#~3)Z&|Ŏ$KXJ:g|4tby< 39wV#TZy}+0-h3UP1cI ^0Q^!> /XObject << /im160 898 0 R /im161 904 0 R >> /ProcSet 2 0 R >> /Contents [ 900 0 R 902 0 R 906 0 R ] >> endobj 911 0 obj << /Length 912 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=@.&Mzx_bݽ9 endstream endobj 912 0 obj 177 endobj 909 0 obj << /Type /XObject /Subtype /Image /Name /im162 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 910 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 910 0 obj 734 endobj 913 0 obj << /Length 914 0 R /Filter /FlateDecode >> stream H]j@2i.uS xB8lBw m"RBYN(*X%*ᅷyMJt. >B_gngh}k lojUlKF;?f̀oYРaըf'RN[>vqvf` qϪ "[Y},Ztit"BPèwJ/xjs)*cQz^$&Z{l!R4ooXQ0ͫ_!C(%8!#G(:)#Vazf]$;dNbGEG8Fn4 %x1n cnD=0TdL89HM$D=](B;j' rw.:x%+)z\涠:. N݁s/D2#h笖 -Ũt*G ym~_m_\[r endstream endobj 914 0 obj 479 endobj 915 0 obj << /Type /XObject /Subtype /Image /Name /im163 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 916 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 916 0 obj 734 endobj 917 0 obj << /Length 918 0 R /Filter /FlateDecode >> stream HUIr0|0Gʢ /CRY` S@Vb(;$V}dP*+ ՌdHKQ( =.n(0lA2ZP5?2p>͙(V=jU ?t[t1Ya.nsAtY$@*ɸ֍~ 6  tҦ :c`;|U F6:!b,LB\\7bI]|"wl)åexNaZ '_,h³(?rղm# 1 ,)gz[̪VI~mtPQr,7go ?SX,qͽNQ4L)#E6r{etW//W@lyD@"I„Q‹=yVhIjkR[RX}94#nUwPJqcǘ^B63sQLKK~Ϋ1/ʋp{3I}?p bo0%M跘?uSvRzXd_әd֛# `Bѝ݁KZģF=IQYQ%q~Nv L|g~B۶ʺhm-7cA0.(ŏ˴x֭J.xfAS`/탊)/nd(ťI4|_g8LV?f Kx'!radi: Deo| Үڸ/H)S675OY6K{lD+_z= _ endstream endobj 918 0 obj 813 endobj 908 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 853 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im162 909 0 R /im163 915 0 R >> /ProcSet 2 0 R >> /Contents [ 911 0 R 913 0 R 917 0 R ] >> endobj 923 0 obj << /Length 924 0 R /Filter /FlateDecode >> stream H]A @ EO0wK]4&3LօsR݈w$$')5_t c L!eڶ)y[X"r !/c'VܑDb]#_bMAyq Uu>O8az$De@&*M:0/I,79 endstream endobj 924 0 obj 177 endobj 921 0 obj << /Type /XObject /Subtype /Image /Name /im164 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 922 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 922 0 obj 734 endobj 925 0 obj << /Length 926 0 R /Filter /FlateDecode >> stream HeRn@ WmJ#B"۔: RԄ6rB‪z0"E~E|~VH=*eg'RKތ9d3nȶvnSFǔcW,R)mS>00>:zrtot> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 928 0 obj 734 endobj 929 0 obj << /Length 930 0 R /Filter /FlateDecode >> stream HS˒0aX <|O(BIr$>#Xv/Ji})  )N_2RNK W%Ñ a,'eg x&Ux~ͺg@QOΙQ?>gF xl#Z'YZk<3x n}w~@kT? W`n!DY$uUovY8gzL @bWa~\sG.O ObC|3W:ۯs7`Tʍqi?F=%_zݗr /˹ЎaPc`f {%=K1,eYoM z\EMKw7cNV5sTM>K#f|!W9M0:v-{WS?z\x:*E!igsخl\wsb@;t|+3Ȩ2)p@R oalYj3~%y1c s$ۂ`yc)b@ endstream endobj 930 0 obj 532 endobj 919 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 920 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F3 152 0 R >> /XObject << /im164 921 0 R /im165 927 0 R >> /ProcSet 2 0 R >> /Contents [ 923 0 R 925 0 R 929 0 R ] >> endobj 934 0 obj << /Length 935 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(F HB!"Z\0N<8HSHuǚי^'a(oj+ȍCB*Gp/,'ĺD8Vgoxrt0I7=ԦJ et7i3k|3 wO9 endstream endobj 935 0 obj 176 endobj 932 0 obj << /Type /XObject /Subtype /Image /Name /im166 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 933 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 933 0 obj 734 endobj 936 0 obj << /Length 937 0 R /Filter /FlateDecode >> stream H]k@ǟu)]S8,L$.7J !dz-(#VWHhХ[sx( .A~H1;}݉^w7mTfpc+ 'uHZ_ ^o4!ICmyCӏg'/pCķPc)cK?T iy&5F#?@O FCGXxJ}dಊz)vA|a2x18HQ ppAWW?JEZfE=U^rRDB{'N'S!u6 qҶg1k Q(J[Fxexz3ѐ/P8a9P4) ޹(oq)D!+i+U xiYuh/pgd]zJٴ̫zAP2} "פ_ GҬERth> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 939 0 obj 734 endobj 942 0 obj << /Length 943 0 R /Filter /FlateDecode >> stream HVN@e*H3o ]%,Zq&ʱSہ"xf<]Tjǹ{ G!Ndrb(!Phz4fX m%ElRz}!gl F"Dbe浼(@G$IeScѦ oZ|s:5'Xz0%5xa]$ W\K:Η7lԆSf(婲,ʛш[ڪ@ߛ.l'ؤOo8l1:`13>t::ȁ FŜ3O1MGClt S^pxw D!xB^z63tjS /~^ghHP?~2:=f endstream endobj 943 0 obj 885 endobj 931 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 920 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F7 940 0 R >> /XObject << /im166 932 0 R /im167 938 0 R >> /ProcSet 2 0 R >> /Contents [ 934 0 R 936 0 R 942 0 R ] >> endobj 947 0 obj << /Length 948 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=Lm{YPF} =c/Wޓ9 endstream endobj 948 0 obj 176 endobj 945 0 obj << /Type /XObject /Subtype /Image /Name /im168 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 946 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 946 0 obj 734 endobj 949 0 obj << /Length 950 0 R /Filter /FlateDecode >> stream He1k1!Ski,4g;rvxkCPL E9 t';nȚ %dRW+Oρ OCF1~މMCö:27G֍hx  kagF#} lzP G^oXLљf=n e005/ڽ+qG|Ĭz-O%}a=-5hl/aKNpTo^qe,PBe*kץV s2er=KZȮ"].wu:ӥ3n._ ՘$ I7jwĻ2U(]rp5xY7miŲµQZQ%seTmnCfW&%W]qJ676?N\6}^}n:ǁްl>o endstream endobj 950 0 obj 477 endobj 951 0 obj << /Type /XObject /Subtype /Image /Name /im169 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 952 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 952 0 obj 734 endobj 955 0 obj << /Length 956 0 R /Filter /FlateDecode >> stream HTM09fmvV9x gHv%{{ !JJɬeB2i$e!S) y|gMʪse9X*5,׵7KB -x gTF4e9:Nz6T^;w"(Ĉд(vNix2: :2 9>kҶEw<ш%a d2Y^M~Bi$vу68yUGyۙ:4~sE$P}.e(Jy1u2E^3}&bN7Dsb.Ĥ. ~԰, Aצ1M\N5Lȩ,igϱIc$%ɋJʛ\gc2݀+^*g¶`~O)h endstream endobj 956 0 obj 546 endobj 944 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 920 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R /F8 953 0 R >> /XObject << /im168 945 0 R /im169 951 0 R >> /ProcSet 2 0 R >> /Contents [ 947 0 R 949 0 R 955 0 R ] >> endobj 960 0 obj << /Length 961 0 R /Filter /FlateDecode >> stream H]j1 D0ȶd5l{!-)} R$^]"a=P4[_nc$ڝ޷"%#UQj]`x,C }LZ6|;}]GD昔|x(r^FI@)! fb=/Og-n9 endstream endobj 961 0 obj 179 endobj 958 0 obj << /Type /XObject /Subtype /Image /Name /im170 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 959 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 959 0 obj 734 endobj 962 0 obj << /Length 963 0 R /Filter /FlateDecode >> stream H]Rk@~QZB miPLmWZT C1zV6$ ^LaN؋xBAf f %(ytS[ݎ6BzzAA I i=vt[J×4}:?=;3(X<#XK)ѵʠE3A ՆuAl\cXqO:&D YÞqx[8탶AxTF1@߾L׸Tz$%xHT.*.B /Ce1|O"3d8RSIpʰQ_8MW'*`"IVZyZ? u̻~wQXOgk˥Nv:yҊM]_SPxX _&dt @ٽXL=ъv#,E`KK' ~лNԡ?] endstream endobj 963 0 obj 478 endobj 964 0 obj << /Type /XObject /Subtype /Image /Name /im171 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 965 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 965 0 obj 734 endobj 966 0 obj << /Length 967 0 R /Filter /FlateDecode >> stream HTKo@(=ٝm(ڦ*rMdhweǮT%k3=vfn\z!9#>a4PpuEPP@zSS I:iT6{sX~LavCF]`l gڬhLjH|ExoMh̴>6Ly;"ܧP*(C"5b\%FXq1׌lUg`,ɪ*8g9a1ql/\e9 P?_8$4eYW=u;|A*;g/jrf29]㵚hB + дsm`U..ԡz\Lt|K#*N } q8l%1]jHke[BuH^(ƣiwWWŢё?/*wFnxE}2DxɴmYm%7>B6YYj`CSA8f7Ⱥե! fϺC<*sp@-SM4)Է%ry}s8[РKXt+ Ω}g S9ԉF{Z Ezt[@91Xae!I˦668zT endstream endobj 967 0 obj 686 endobj 957 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 920 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im170 958 0 R /im171 964 0 R >> /ProcSet 2 0 R >> /Contents [ 960 0 R 962 0 R 966 0 R ] >> endobj 971 0 obj << /Length 972 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=@.&Mzx_<{9 endstream endobj 972 0 obj 177 endobj 969 0 obj << /Type /XObject /Subtype /Image /Name /im172 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 970 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 970 0 obj 734 endobj 973 0 obj << /Length 974 0 R /Filter /FlateDecode >> stream HeR1k@~WLtc(Բ(rNzk(CPB jBL ,Kn?pO{{w;n7"F|'jn{C/x;l,m :pVFe万R 3 stdA^$bkC|-tQj]w2p =/RLw|ID)]分;g&,;S)'k*efX](ZH|HVAlsP.OU";ͯT%hESo*ry}|ȗx6Z٪<vg7lS+n I Z R@3ŶTSOpk2Q7P)K Vp2;V{:ޙGe989mG|K endstream endobj 974 0 obj 489 endobj 975 0 obj << /Type /XObject /Subtype /Image /Name /im173 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 976 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 976 0 obj 734 endobj 977 0 obj << /Length 978 0 R /Filter /FlateDecode >> stream Hen0E0Vj_qU%Tn"b 6c]ő9wf>,Rs. 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I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 981 0 obj 734 endobj 984 0 obj << /Length 985 0 R /Filter /FlateDecode >> stream H]AK1tK^J/jzihv gx`[r)k]է_V!w]V!aQX:-@9\ ŕ rӢ&KLX)Iv5|,I'E''Z~|"7}NDU* z.@4繊zs1(JT <) 1jU{-Nr[U)mh̚?cmqŞFTVOʪ_P+^˨zD žXjK/C{s=x^wz@ZQ|x endstream endobj 985 0 obj 488 endobj 986 0 obj << /Type /XObject /Subtype /Image /Name /im175 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 987 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 987 0 obj 734 endobj 988 0 obj << /Length 989 0 R /Filter /FlateDecode >> stream HV˲6 LMNLY-}|8wn 6?6"AL v?opgLIR9NhATfԛ7[SEL9<л?ѕ3]C6DH{`sIh'2Ql1*F9*~}YthW|ˆLDLgTr|be8q)lL@*1"s]0)㙧g]]O:Q޺oF6ʗ|e"iPW2R2JQJFY3VKs@{FBt@L)k_dr?,3Lo}+}"+;9IA.Cfw8[ufW+45\7'UQ"ښJ-l<ž|Փ}NIpy10XJҙ3#;_EɽLiOtYƋUx#̛H==&`Φ-ˣ);|R s*[薪0bH܍Ã4*l^PU^,ݿ8+= ?@H" q,17s{xKqf\mRjU !+%}0IjxS|2]mHC$t 99ڥ"6"k^g<[U1!1N_y)3̖2~?%i0Kʸ4NOȫ/X~?WDtK^\k^DHNl2za9SA1\uC c34Ey!vEM㐁cX nt+w#P_.܇ \wڷk1sH-Hw"kJ1Dmׅz=`so҈k  /Fi: endstream endobj 989 0 obj 1074 endobj 979 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 920 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im174 980 0 R /im175 986 0 R >> /ProcSet 2 0 R >> /Contents [ 982 0 R 984 0 R 988 0 R ] >> endobj 994 0 obj << /Length 995 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(F HB!"Z\0N<8HSHuǚי^'a(oj+ȍCB*Gp/,'ĺD8Vgoxrt0I7=Ϲp(5EߤiBUaO9 endstream endobj 995 0 obj 176 endobj 992 0 obj << /Type /XObject /Subtype /Image /Name /im176 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 993 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 993 0 obj 734 endobj 996 0 obj << /Length 997 0 R /Filter /FlateDecode >> stream HeAk@_eJt2xĦ[&ݶ+7Cb(z'քڃ`^YPJ8of_ycF-[*zpy5`}FŢXR6kQ^.yè݃ӏ>~]-9R¢~Lg͑/!=,w*fo̠YKv$żF>nYCśKrJ9\ @CTu6_:? TukRU&bG,WJJwȨ8E8|-1tyŤmݵq|jIs U%$ܩ6bӁhuTLrIjՋHk F^e28C_ъx`K1WgV{s bVe5&7뱤;UxO/¸0H>hφ;9Xx_عq^_+6{0dN endstream endobj 997 0 obj 496 endobj 998 0 obj << /Type /XObject /Subtype /Image /Name /im177 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 999 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 999 0 obj 734 endobj 1000 0 obj << /Length 1001 0 R /Filter /FlateDecode >> stream HUv6,s"O̮m}z! I($ٲEaksosQ $ %v_6 W_*ʂfq J|[z#PYIxIUt'?0V8r >LKUŠpJdF=zM-xH-y|"Pc0X 'k3ht :ތk4pڃ9@7W*12b) &|gh&E *R+z wЏvB gk0XV :d^Df? C%:i|m *31^" F*,+ΓazN[zjLÇ?|2$tKNi`ĮByR`~^wrbb^3/ ^7[c fDlzVo:9̊啑$G >+n\uEZ05&ƾi2Hz5yRz[z\2cN} hhzHzt(jKQ1ӊ̻C(3v/a|ܫlvX.P ~ X> /XObject << /im176 992 0 R /im177 998 0 R >> /ProcSet 2 0 R >> /Contents [ 994 0 R 996 0 R 1000 0 R ] >> endobj 1005 0 obj << /Length 1006 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=Lm{YPF} =c/WIݽ9 endstream endobj 1006 0 obj 177 endobj 1003 0 obj << /Type /XObject /Subtype /Image /Name /im178 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1004 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1004 0 obj 734 endobj 1007 0 obj << /Length 1008 0 R /Filter /FlateDecode >> stream H]Ak0ǟv ջ^6htuB&c-9F顇2mBF "9}kr;y(')n X{%3ѽ[aѴl7 GX3;?Xm50~ӳ>_N#S-ՔRwzʢ/\cӉ؇%vnKXtj*@쀜<569:DbUȵr2T;QYQ:YȝeT3!t3w>wTH$f7MD^ʍWKb!+@<7 !vn12][(,*nv09VRVcUDWnapNOH(MǵhYG)sX{Q{ө/Ņ6?hX endstream endobj 1008 0 obj 479 endobj 1009 0 obj << /Type /XObject /Subtype /Image /Name /im179 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1010 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1010 0 obj 734 endobj 1011 0 obj << /Length 1012 0 R /Filter /FlateDecode >> stream HWnF<@Ds\6:EM#}`M$bE *p&ٳgΜY WYBAP%`,bF8KR(f PQ-0.IS|0Ĕfo&/ i367JRƇR*]MB &&T.1O\63Lnق(f/$s/_@CfFfa ~ 0MY%DfK7ij(b=;XCyE;I3~e)(KtSc@N4o~/ta+` TVռ&>ee1\ȯOECPljE:F,xo ; Ch` rr_ySd "q>Fe_}Zz󟾅ej)uO DNW쭋c" qKDŽ'q P޴^iP~8fӅd)6lޏvUERB̼^'YKyj&~&SۋN=jmd,KێԆ"l4a|WsQN1 endstream endobj 1012 0 obj 1223 endobj 1002 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 991 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im178 1003 0 R /im179 1009 0 R >> /ProcSet 2 0 R >> /Contents [ 1005 0 R 1007 0 R 1011 0 R ] >> endobj 1016 0 obj << /Length 1017 0 R /Filter /FlateDecode >> stream H]j1 D0ȶd5l{!-)} R$^]"a=P4[_nc$ڝ޷"%#UQj]`x,C }LZ6|;}]GD昔|x(r^FI@)! fb=/Ogn9 endstream endobj 1017 0 obj 179 endobj 1014 0 obj << /Type /XObject /Subtype /Image /Name /im180 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1015 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1015 0 obj 734 endobj 1018 0 obj << /Length 1019 0 R /Filter /FlateDecode >> stream HeRA@~C, vfغ[\D<YA"毨x/ =OKa}4-/${߼LN$V'{t[ttA \aKtp 8^sx]KLLtgݻGX[}aSVUKS-\G.*?S.A2?-bxXP@l QՌ7ڇ"EO3̋Dvכ@C*∩]㩆?, =b2^ZmEgqӘW % rZ e)jERiժgB1z#Zhxݲ6[+֍~\U~AB̕h !N~\5цQwP wH nEvrkmɞfy~b endstream endobj 1019 0 obj 480 endobj 1020 0 obj << /Type /XObject /Subtype /Image /Name /im181 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1021 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1021 0 obj 734 endobj 1022 0 obj << /Length 1023 0 R /Filter /FlateDecode >> stream HUr0ÕɌI e9Z_̉:i5cţ5 75W̧tJ'[>Xu{Z8[q \F;kY6`ΆփCKŲ%)7[יx~-pЭ> l!KMB0<\vJdOҍO BE$p0:=Nz#ly@p973Dۺ74XلD%-_gIfʓ%HX?̡v|f$(35v~> /XObject << /im180 1014 0 R /im181 1020 0 R >> /ProcSet 2 0 R >> /Contents [ 1016 0 R 1018 0 R 1022 0 R ] >> endobj 1027 0 obj << /Length 1028 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=@.&Mzx_={9 endstream endobj 1028 0 obj 177 endobj 1025 0 obj << /Type /XObject /Subtype /Image /Name /im182 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1026 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1026 0 obj 734 endobj 1029 0 obj << /Length 1030 0 R /Filter /FlateDecode >> stream H]Rk@~1+x/͓Mm+uoxAH顇("VdEB=xO^r)8q~$.7 ZdC=ۛ]] {0 t7'+Q) _Ox'`7큔E‡rt(-rBkM^h00(-Vfxo!Je ڀ e8521ep pfSů/7Q,B2+۩"72]->s5B=B,I{ng'\CyvSDi3Y&^^ME4FˁFh "*IiJDu> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1032 0 obj 734 endobj 1033 0 obj << /Length 1034 0 R /Filter /FlateDecode >> stream HVr6*Iƃ÷ͮ7Yr ȉ>CH*b f3=lu!_dM8̀y EY=+YvX0*<7D 7}V6^ sAEg&}n $eXXb01c% Aw_ +Z>*!+ZXX3#4f*}mlMVNAifd!:'Ì(8,"j=0U90G$ZrUoQ$˓$ܓ>պ^9W.U*Y~E-tU;:o/X_"'!y6¨]fAt`И3!jz>o>N_eųYr>ųM5=v$ȁTPcs+?.5'U'>=|A>MZPG0L"Iu|,\)z # nhӢ,ϰ%z2J"+FGJqcxIz$卭2eMzu2bYd\&b;LWNbլi=/[v{|\ UXƩ SM >I &-~hsff4.fWmm6Y?!fsR]%Mg&ZYـ]?3rP`yFZ#o.Vk-pWݜʅn=goI^PSu6n˕?[%ȫt)k>I0㘗ca vYg4҈2brB3^BtUh d tXpnkq[AZ{q/1:UjiѬ>y_/?2v/<( endstream endobj 1034 0 obj 916 endobj 1024 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 991 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im182 1025 0 R /im183 1031 0 R >> /ProcSet 2 0 R >> /Contents [ 1027 0 R 1029 0 R 1033 0 R ] >> endobj 1038 0 obj << /Length 1039 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(8#HB!"Z .j'Ș8:&i]9CΰD 7zơ̡c#'ܓDb]\jo]EyvMoxvt0I7=3)gRC]M&Z<_%G w9 endstream endobj 1039 0 obj 177 endobj 1036 0 obj << /Type /XObject /Subtype /Image /Name /im184 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1037 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1037 0 obj 734 endobj 1040 0 obj << /Length 1041 0 R /Filter /FlateDecode >> stream He1k1!Ski 4_ĥBRJ12^; 6K>F ?A!k>BI"\>I>'8IwF_#kkvf[͈ N#aQ{oY=0! {Nǯ~N=6j]XD#/zVY17DPYwm10.t'OWwYK=*փR¢+a5ŅB~yZ$g}V&Uߟd rJx_7rOIq+dG'ŴQotwZ:WQ꼐*@%⹨Sc5qZf*b,{WY~.Vey`;+&˚V,*\+U⚛Jls437)vơM u$hgsxWy~0/74'8bC=w endstream endobj 1041 0 obj 477 endobj 1042 0 obj << /Type /XObject /Subtype /Image /Name /im185 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1043 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1043 0 obj 734 endobj 1044 0 obj << /Length 1045 0 R /Filter /FlateDecode >> stream HUn0.ZSR& CFbl(r}I&h|hы%@lP )Bˈ`hfyGr-+ ` nK "}==6OQA%pܽ4#Ä4O!p"=QFrSWÑsuyA!PyXY cХ|Vebw댍|ꔲS+'Gh7 ]d9JS=jwZLr~j[x-V3U&d$ q*_ ^wQL rdyTs0 /w >v֢D4H^ZѨ5 uK1(݆;s[Aw#Y'h$e;x.tDbU,ڡYr nC'c32:_p/ဍ* 62.gk20FʦH^Ppm.;8~XWP܁eۚb^ƂCbRvj I;s#) _4یxl-PZ.\&E'h-XӺ{F>,OP>;i \:d:;;-ϷUNrوn{i>^/<8Mn3|S3;I`C-\^R+s[5ԯeܴ endstream endobj 1045 0 obj 707 endobj 1035 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 991 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im184 1036 0 R /im185 1042 0 R >> /ProcSet 2 0 R >> /Contents [ 1038 0 R 1040 0 R 1044 0 R ] >> endobj 1049 0 obj << /Length 1050 0 R /Filter /FlateDecode >> stream H]A 1 EO;.&&mv2uao0(F HB!"Z\0N<8HSHuǚי^'a(oj+ȍCB*Gp/,'ĺD8Vgoxrt0I7Mq8 o4g*09 endstream endobj 1050 0 obj 176 endobj 1047 0 obj << /Type /XObject /Subtype /Image /Name /im186 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1048 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1048 0 obj 734 endobj 1051 0 obj << /Length 1052 0 R /Filter /FlateDecode >> stream H]R1k0~>5$(vK!nĹ44ܖЖJ2dU;I,2L*4T'|>$%(|t ƺfaD7Q'vC0"퐠G${MɗIG%LZJ.߽(KU\tMt bnߒ~ R/onRN]o> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1054 0 obj 734 endobj 1055 0 obj << /Length 1056 0 R /Filter /FlateDecode >> stream HUn0 &@S@.mDC#o/)J$@$'pvvvѷu$p"c?"#K ń;pܱc,t"`7"{j=Rp'7Nj}EqgHZ1׍k`_4X|eB{,GH#)aL14PF^$)NLM$$,)uz:sY b,HX̠}nB=4I4A[ؙLݷX~yM1#|2d)c4JKUuʅLm[ۨ-L ;{&z!M&?XӨb_6\ͅ]yo &HLHCEnf ?.Qa{]ŶMچd?Ird UuꝮtm1GӪu~À{#`䢹!}U!2cxs$(5ɥpfyi>/JNi=]8K?U|jԾR1˻.D?<u}5LؘCPkPO(ն԰oZ"1oe4Y2nbj.xljx,‚ endstream endobj 1056 0 obj 676 endobj 1046 0 obj << /CropBox [ 36 36 756 576 ] /Type /Page /Parent 991 0 R /Resources << /Font << /F0 14 0 R /F1 18 0 R /F2 29 0 R >> /XObject << /im186 1047 0 R /im187 1053 0 R >> /ProcSet 2 0 R >> /Contents [ 1049 0 R 1051 0 R 1055 0 R ] >> endobj 1061 0 obj << /Length 1062 0 R /Filter /FlateDecode >> stream H]Aj1 EO;eU-y lo0%$G HwBH|&N7qǚRԕ޷ < )Ц [Q0vm ]`xJu,& ⚻V+.?xq ¼y$7BZ!XQƐc1_}U79 endstream endobj 1062 0 obj 181 endobj 1059 0 obj << /Type /XObject /Subtype /Image /Name /im188 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1060 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1060 0 obj 734 endobj 1063 0 obj << /Length 1064 0 R /Filter /FlateDecode >> stream HeRjAv;,LE03 ,5YѽD< 9= 3x|G sG谗=v Fizb5W5Uu({wmvCƵEh'V(NsJB.r$^\rt釷x$lYkoj(MLei3!K,vTu,:)WpnZ:qF;x-ͱ 0EBA3LP1ݬAE9PDv+촲0u/,#"*7ju1z^I2笭L3Q{k rZ  3cL,jiU90=o*r= !>szv0YV?Q9b^HjP/բ_JKK!|%sM˘ [ᬆkxp-k<7o@4˓NoWR2 endstream endobj 1064 0 obj 483 endobj 1065 0 obj << /Type /XObject /Subtype /Image /Name /im189 /Filter /DCTDecode /Width 85 /Height 57 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1066 0 R >> stream AdobedC    !"(($#$% '+++,.3332-33333333339U  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$ݵMTݵHh!! I$KTN:+RI$I111 NI$K+RI$ɓ$K+RI$ɓ'N ^+%$Ja)I%+SJiM)ӧI$+SL0?$ӦL;/pI$I$ I$I$_A+R.R$_ (I$"~I?$ 9L2t+S&L:tI+RI$I$_^ !$N:I$+R(L2S%> +RI$ɓ$K+RI$I$_+RI$I2d/o JJI$I$ endstream endobj 1066 0 obj 734 endobj 1067 0 obj << /Length 1068 0 R /Filter /FlateDecode >> stream HUn0̧($)Zhȥb&it}IQhR X;3;^| ˋ b(Qf )r Fe8Cc yM>1C0+ _!e(]jҞુnFzqceEλ_,%L26++t4))@/pЧ~,ةu›aN d+GѬm]WZXrzc@*IDM+e" Ϝ#>#yʹQƁRPY>bNDA ^W58k妠 dz Fd]kGf :#[{?XRÏ[9g#Q:b 'O•^5UuZkffJDк> /XObject << /im188 1059 0 R /im189 1065 0 R >> /ProcSet 2 0 R >> /Contents [ 1061 0 R 1063 0 R 1067 0 R ] >> endobj 1072 0 obj << /Length 1073 0 R /Filter /FlateDecode >> stream H3T0¢t^c3 272P051P(JUH-虛*idagd`l%*gZ(e endstream endobj 1073 0 obj 74 endobj 1070 0 obj << /Type /XObject /Subtype /Image /Name /im190 /Filter /DCTDecode /Width 481 /Height 65 /BitsPerComponent 8 /ColorSpace /DeviceRGB /Length 1071 0 R >> stream AdobedC    !"(($#$% '+++,.3332-3333333333A  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$IyWԌ̷J:n$⸟_Q[Ә6V8Ϳ*ed6.*_G̱n[A7PB?+\6 ^8Xu:;:oRe/n5`q "Uz~13/kqp6L/*qMT !"u^U~?//USĻzX.7&4 Sg/2s;I[U2]e0c_5+RI$I$_+RI$I$_?$*?k?-Η&w ә򺿩ɲȽwˢ_+RI$I$_+RI$IxH}L/~EpI25EjH_Wm}KOJOV[e cs%{5q kDxw &Ԓr,ε[Yjװ%`]64,cߑkH?"ѫ{Hk\G/nzgVfgNʫ3YKi!{Vnu _S}d/"e/m<Vʿۇߟ7m hdu^'.̟9GSv4w\'+oVa jJfCI.n=^F3>LaE [$I$+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI%#O-gt.S_ʼupKЧ [Q=G%KѾ)K{դI$+RI$I$_+W3ԯ]AC乭akto5~ QrVn'qhiw@,Ӳ7_V;4_WES[ϩFl:7ʺT>W:6'+Q@VH]+We}>A9s$Hoa5f'Rg%+RI$I$_+RI$I$_ ɛ?WiޟȽGLK$_ _ؿ_Dmk?.oOڿH+&;/Vnm_V3ߊ{I3Guu^ΕHi 1#[[U9Wic t8qt=B{Y]vPfôL#BO=hZht0 |׷h+3#=6FY9$H[%z7vHZ9* ]?Coi{5$ϗhSѺ&RťK"@@ט]Tί쬻kiΒ A+k/!'U^KxX.2a|}-p8ē+άy}yēk%E߱|2ʛ`=su%{N?9 <4qvzG?MƬN +ZI$+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$Ig/:M}`ɥ-Us:OK{_FK!$ ݇먮4@/h$}_'TW 3?ftO6+7@V>Λq0_` {c -U>0\baьqNLJ]M5],h!tO?WgLΫ&w9 0p=:wZ]L<\Z  jf6-9k]W9XoчS-~;/K,}:^9I'V#縹Ĺ2IIIQMMCu1bI09OUOV!$c 5$>%}Sw7%ޮKL7SѤ%{gϫgtMI>K}0=cV_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+euv4=k k^A B sL̼{Iu>GW3\?^ս?+u*ϱu&|K}Sƶ_E߸-??EY~d|1Ì2j/# :@O;a8isy;3oN<-/C՚<ۋYcd'Gk*.E6̏:! u ]~c+&+ u}>n- ˵[沾{ H_ď>r <5u}zz?EWzCu\\-i{im[Äyt:M{w Oa@*o/>$;eml`/E~P@psl͹x56d|\>]ןfv7DcH?#Ϋj ?K,}uq{K$I+s\\I$+s$:1q kZ$x$9 h.$RkKL/'gAe]o7SK?Q~5G;0#m_: lukOUvu+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I /3lkȢѵZ8xt*FEOmo<0T_[,acpW龵hi#Lwԟȏ-" k>m'ZNg#@^[$K~(^INxc^ݧ>@\'Xz?ڨg\sO6!5sbw~uzswuj}~uO&-;KDvi suN}dm$ 7]$hwׯG2[z=˄?W'I3[#7e ,CO/Gv>O,%>*zoי{ŤܚKǧ}.f}UkۈA.l>O֞cI{L~Ieu3_Վk)[.׷xAoa׉{L 3NEv8cUu+RI$I$_+RI$I$_,elu81s$sX95II5$Sm{]֨is[7LvO 7\(*dKd!Pt` W/Fdޟޞ*dkvx;1qusgI lkfHq٭0#̟Ĩ4~דϬ]sgmkã֍<pKu.;X9YYvoXv5NV??X~f~\ɋ2,SVp>i?Wd %+grt̼vR~~%}gDϴs:ّdC]_GoV֣ ȳ*Qik|:Ea14lʞXXzĸs._MYx,{q{ "Vn'Ux-sq2k̸Sc 󂺪32q7OS{&r]k򕩍f5Bh36*_X:LܗV@}\,OI>_sibm/T`t;k!\+4mꕳk;O=gd_o?*/X>.]6_U}]xqn\{}uM7t]|^> o?'}??3Ky?5ŶLfAOpsmIƪw=9U55OߧTrU]=?-o{]~YSisK~>M- sZd}zCw[$k*v­wT}lʧҳ3Pk^lvKd4ޥzU{Գ3X;&MW))% A_gp}cVH,iG%C3eNLj$k`^Zj}G/\y?X/xU-w}V][>hdy.SƪY߸?qq1pŦzkY]M kG@j(UMmkkG v뭁15ESR_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I +3lkȦѵxt*QNEOmo<o?xY9ړ&u6=湄(*Sw ʱ:xv1cIv5G~VngՎ抩,%G~VZۧ4,.9ĆN'O'~q,9vXtG7l7oR[5Ykf"/K/TS_ YDeu/w6%ܽor?/}K"_ zC_OD$s*vw~lʨ[_N&";q]?Wg8ihh퍕* O{ v{+xef֑ԸV~T=? ]Mc:W`ÌI+SQ7k΢Ǵ<;aZvQ.`.?̺SWAvM.o?(ٰe!w'_.gDOYSkI,|^Ӿ^&,s\Γf=7iq~&JZI$I/+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+W endstream endobj 1071 0 obj 8204 endobj 1074 0 obj << /Length 1075 0 R /Filter /FlateDecode >> stream Hݕ=o@}XVb3 %q[m* 5(!" V !#blC㗻9w;=;ß'tV׃^ρG|ɥs{=>+p9ɳo>1cluR[Fmtg,U-,[)f_هhGf?> stream AdobedC    !"(($#$% '+++,.3332-3333333333  a!1AQa"q2B#$Rb34rC%Scs5&DTdE£t6UeuF'Vfv7GWgw(8HXhx )9IYiy *:JZjz ?+RI$I$_+RI$I$_+RI$I$_+RI$I$_+VWSczVĵꮹ?Lg[/uyy=Ye8-"s?r36ӛvsK?7O_T訾2Lʪp?G[2ͱ3\R .]7e0yɵ|E0sH|*\qG WԣԿCcM/}"N>L)l{s>Dmq$z4Vy."gDxsщXH 9Y-axUF ކ~" Opӧe/Wq>·WU\k$DٿV4:_D뗬ă?ٿV4q>·Wv뗭ğ"Up|RC71|_,.md;?z~Jٵޝg, 1͕{{?ګxoƶ5ncK"5?\sj{|-?~GKc0aƵ|Åq0}K@^ג| ?\]c9cW}GKnǕ[ٰ9X>;zvz/c6z?XEsX#xW]ԺwRTRIwȐH[zطבY$o͑7{7cloAI/+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI$I$_+RI%[?tr3äfCK9Yxur@k['̨[u4}mmZt[KK* A{uO{ 9}6AߔrtAvCg ;s:V=&Gh#\6:L Zb zDUzWdPP4>gOqSs.#}W <=0C@9gz'dX~=B GfduN[cK׷P \Yz89Z,ǢǶG"ZYe.Ⱦ`>3nf#-IKHWS kfUBui1s?Ok7qUeo["6R[]k#gVk_Ma [dd}hT}b-߈D{}V@%"U&vD0z?)U6.A*s>= 3k_ZY^=y-wkCm?w~m"x F&=ls+EVcyqUk}nX$=? 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=!6TinyOS 2.0: A wireless sensor network operating system0David Gay, Intel Research Berkeley with Phil Levis, Vlado Handziski, Jonathan Hui, Jan-Hinrich Hauer, Ben Greenstein, Martin Turon, Kevin Klues, Cory Sharp, Robert Szewczyk, Joe Polastre, David Moss, Henri Dubois-Ferrire, Gilman Tolle, Philip Buonadonna, Lama Nachman, Adam Wolisz and David Culler 11N     (;Sensor NetworksSensor network are collections of small, battery operated computers with sensors, and possibly actuators, to sense and control their environment radios, to report data and receive instructions typical expected lifetimes range from a few months to several years PI I <Some Typical DevicesPmica2 (2002) 8MHz ATmega128 4kB RAM, 128kB flash 512kB external flash 20kb/s custom radio many different sensor boards 2 AA batteries: radio+cpu: 75mW sleep mode: 140W: z" z"B   Jtelosb (2004) 1MHz TI MSP430 10kB RAM, 48kB flash 512kB external flash 250kb/s 802.15.4 radio built-in sensors 2 AA batteries: radio+cpu mode: 63mW sleep mode: 30 W:q'q'Fy  =Sensor NetworksSensor network are collections of small, battery operated computers with sensors, and possibly actuators, to sense and control their environment radios, to report data and receive instructions typical expected lifetimes range from a few months to several years Suggested applications include: data collection, environmental or industrial monitoring, object tracking Today: We ll build a simple  anti-theft application using TinyOS 2.0, which detects theft by light level or movement reports theft by blinking, beeping, to neighbours or to a central server is configurable from a central server in less than 200 lines of codeI IF  I IF rP Challenges  Driven by interaction with environment ( Am I being stolen? ) Data collection and control, not general purpose computation Requires event-driven execution Extremely limited resources ( 2 AA s, 4kB of RAM ) Very low cost, size, and power consumption Reliability for long-lived applications ( Don t steal me in a year! ) Apps run for months/years without human intervention Reduce run time errors and complexity Real-time requirements ( What is movement anyway? ) Some time-critical tasks (sensor acquisition and radio timing) Timing constraints through complete control over app and OS Constant hardware evolution>Z^Z3Z+ZFZ[Z4Z{ZZ>^3+F[4 {   f > OutlineTinyOS and nesC overview Building a simple anti-theft application The Basics  Advanced Networking  Basic Networking BREAK Managing Power For experts: implementing device drivers resource and power management low-level code and concurrency Review and Conclusion|B4 8=B48= sRTinyOS and nesCTinyOS is an operating system designed to target limited-resource sensor network nodes TinyOS 0.4, 0.6 (2000-2001) TinyOS 1.0 (2002): first nesC version TinyOS 1.1 (2003): reliability improvements, many new services TinyOS 2.0 (2006): complete rewrite, improved design, portability, reliability and documentation TinyOS and its application are implemented in nesC, a C dialect: nesC 1.0 (2002): Component-based programming nesC 1.1 (2003): Concurrency support nesC 1.2 (2005): Generic components,  external typesLWAWA@TinyOS in a nutshellSystem runs a single application OS services can be tailored to the application s needs These OS services include timers, radio, serial port, A/D conversion, sensing, storage, multihop collection and dissemination, & Application and services are built as a set of interacting components (as opposed to threads) using a strictly non-blocking execution model event-driven execution, most service requests are split-phase Implementation based on a set of OS abstractions tasks, atomic with respect to each other; interrupt handlers resource sharing and virtualisation, power management hardware abstraction architecture!7g&f>1!7g&   ! &  >1(:"vTnesC in a seashell  C dialect Component based all interaction via interfaces connections ( wiring ) specified at compile-time generic components, interfaces for code reuse, simpler programming  External types to simplify interoperable networking Reduced expressivity no dynamic allocation no function pointers Supports TinyOS s concurrency model must declare code that can run in interrupts atomic statements to deal with data accessed by interrupts data race detection to detect (some) concurrency bugsK+$ &+$  9  `    wU The BasicsGoal: write an anti-theft device. Let s start simple. Two parts: Detecting theft. Assume: thieves put the motes in their pockets. So, a  dark mote is a stolen mote. Theft detection algorithm: every N ms check if light sensor is below some threshold Reporting theft. Assume: bright flashing lights deter thieves. Theft reporting algorithm: light the red LED for a little while! What we ll see Basic components, interfaces, wiring Essential system interfaces for startup, timing, sensor sampling AogAS    gxV<The Basics  Let s Get Startedwmodule AntiTheftC { uses interface Boot; uses interface Timer as Check; uses interface Read; } implementation { event void Boot.booted() { call Check.startPeriodic(1000); } event void Check.fired() { call Read.read(); } event void Read.readDone(error_t ok, uint16_t val) { if (ok == SUCCESS && val < 200) theftLed(); } }  x w 1M :   {W.The Basics  Interfaceswmodule AntiTheftC { uses interface Boot; uses interface Timer as Check; uses interface Read; } implementation { event void Boot.booted() { call Check.startPeriodic(1000); } event void Check.fired() { call Read.read(); } event void Read.readDone(error_t ok, uint16_t val) { if (ok == SUCCESS && val < 200) theftLed(); } } x x 1M :   |YVThe Basics  Interfaces and Split-Phase Opswmodule AntiTheftC { uses interface Boot; uses interface Timer as Check; uses interface Read; } implementation { event void Boot.booted() { call Check.startPeriodic(1000); } event void Check.fired() { call Read.read(); } event void Read.readDone(error_t ok, uint16_t val) { if (ok == SUCCESS && val < 200) theftLed(); } } <x Z 1M :   VThe Basics  Interfaces and Split-Phase Opswmodule AntiTheftC { uses interface Boot; uses interface Timer as Check; uses interface Read; } implementation { event void Boot.booted() { call Check.startPeriodic(1000); } event void Check.fired() { call Read.read(); } event void Read.readDone(error_t ok, uint16_t val) { if (ok == SUCCESS && val < 200) theftLed(); } } <x   ( 1M :   \6The Basics  Configurationsconfiguration AntiTheftAppC { } implementation { components AntiTheftC, MainC, LedsC; AntiTheftC.Boot -> MainC.Boot; AntiTheftC.Leds -> LedsC; components new TimerMilliC() as MyTimer; AntiTheftC.Check -> MyTimer; components new PhotoC(); AntiTheftC.Read -> PhotoC; }  #   ] The Basics [ The BasicspLet s improve our anti-theft device. A clever thief could still steal our motes by keeping a light shining on them! But, however clever, the thief still needs to pick up a mote to steal it. Theft Detection Algorithm 2: Every N ms, sample acceleration at 100Hz and check if variance above some threshold What we ll see (Relatively) high frequency sampling support Use of tasks to defer computation-intensive activities TinyOS execution modelLt{t{}XHThe Basics  Advanced Sensing, Tasksuses interface ReadStream; uint16_t accelSamples[ACCEL_SAMPLES]; event void Timer.fired() { call ReadStream.postBuffer(accelSamples, ACCEL_SAMPLES); call ReadStream.read(10000); } event void ReadStream.readDone(error_t ok, uint32_t actualPeriod) { if (ok == SUCCESS) post checkAcceleration(); } task void checkAcceleration() { ... check acceleration and report theft... } \ J&    "? ":~ZHThe Basics  Advanced Sensing, Tasksuint16_t accelSamples[SAMPLES]; event void ReadStream.readDone(error_t ok, uint32_t actualPeriod) { if (ok == SUCCESS) post checkAcceleration(); } task void checkAcceleration() { uint16_t i, avg, var; for (avg = 0, i = 0; i < SAMPLES; i++) avg += accelSamples[i]; avg /= SAMPLES; for (var = 0, i = 0; i < SAMPLES; i++) { int16_t diff = accelSamples[i] - avg; var += diff * diff; } if (var > 4 * SAMPLES) theftLed(); }>0Z}'L  " $<  pM#The Basics - TinyOS Execution Model #The Basics - TinyOS Execution Model #The Basics - TinyOS Execution Model xThe Basics - Summary3Components and Interfaces Programs built by writing and wiring components modules are components implemented in C configurations are components written by assembling other components Components interact via interfaces only Execution model Execution happens in a series of tasks (atomic with respect to each other) and interrupt handlers No threads System services: startup, timing, sensing (so far) (Mostly) represented by instantiatable generic components This instantiation happens at compile-time! (think C++ templates) All slow system requests are split-phase0m(m3:B)0m(m 3 :B)_* Advanced Networking@TinyOS 2.0 contains two useful network protocols: dissemination, that disseminates a value to all nodes in the network use for reconfiguration, program dissemination, i.e., network control collection, that allows all nodes to report values to root nodes the simplest data collection mechanism Dissemination Collection2EFA' d2EF6' `* Advanced Networking.Different anti-theft mechanisms may be appropriate for different times or places. Our perfect anti-theft system must be configurable! We want to send some settings to all motes selecting between dark and acceleration detection. We ll also allow selection of siren-based alerts instead of the  bright flashing light , and of the theft check interval We ll use the dissemination protocol to achieve this What we ll see: How to use the dissemination protocol How to start (and stop) services  External types, and their use in networking ` u ubP Advanced Networking   External Types#include  antitheft.h module AntiTheftC { ... uses interface DisseminationValue<settings_t> as SettingsValue; } implementation { settings_t settings; event void SettingsValue.changed() { const settings_t *newSettings = call SettingsValue.get(); settings.detect = newSettings->detect; settings.alert = newSettings->alert; call Check.startPeriod(newSettings->checkInterval); } event void Timer.fired() { if (settings.detect & DETECT_DARK) call Read.read(); if (settings.detect & DETECT_ACCEL) { call ReadStream.postBuffer(accelSamples, ACCEL_SAMPLES); call ReadStream.read(10000); } }t0Z)*               "AdJ Advanced Networking  Dissemination#include  antitheft.h module AntiTheftC { ... uses interface DisseminationValue<settings_t> as SettingsValue; } implementation { settings_t settings; event void SettingsValue.changed() { const settings_t *newSettings = call SettingsValue.get(); settings.detect = newSettings->detect; settings.alert = newSettings->alert; call Check.startPeriod(newSettings->checkInterval); } event void Timer.fired() { if (settings.detect & DETECT_DARK) call Read.read(); if (settings.detect & DETECT_ACCEL) { call ReadStream.postBuffer(accelSamples, ACCEL_SAMPLES); call ReadStream.read(10000); } }. @+               "AgJ Advanced Networking  Disseminationconfiguration AntiTheftAppC { } implementation { ... components ActiveMessageC, new DisseminatorC(settings_t, DIS_SETTINGS); AntiTheftC.SettingsValue -> DisseminatorC; AntiTheftC.RadioControl -> ActiveMessageC; }< Y-)1 )  eBDissemination  How does it work?Use local broadcasts and packet suppression Scale to a wide range of densities Control transmissions over space 100% eventual reliability Disconnection, repopulation, etc. Continuous process Maintenance: exchange metadata (e.g., version numbers, hashes) at a low rate to ensure network is up to date Propagation: when a node detects an inconsistency, the network quickly broadcasts the new data [Slide Courtesy Phil Levis]j,D5,>5fR Advanced Networking  Starting Servicesuses interface SplitControl as RadioControl; ... event void Boot.booted() { call Check.startPeriodic(1000); call RadioControl.start(); } event void RadioControl.startDone(error_t ok) { } event void RadioControl.stopDone(error_t ok) { }  t   . hD Advanced Networking - Collection@What if thieves aren t deterred by sirens and flashing lights? We need to report the theft! We ll use the tree-based collection to send theft reports to a base station. What we ll see: collection protocol message_t, TinyOS s message buffer type Send, TinyOS s address-less send interface&gg JiD Advanced Networking - Collectioninterface Send as AlertRoot; interface StdControl as CollectionControl; ... message_t alertMsg; event void RadioControl.startDone(error_t ok) { if (ok == SUCCESS) call CollectionControl.start(); } void theft() { if (settings.alert & ALERT_LEDS) theftLed(); if (settings.alert & ALERT_ROOT) { alert_t *newAlert = call AlertRoot.getPayload(&alertMsg); newAlert->stolenId = TOS_NODE_ID; call AlertRoot.send(&alertMsg, sizeof *newAlert); } } event void AlertRoot.sendDone(message_t *msg, error_t ok) { } ` +F S            "   jD Advanced Networking - Collectioninterface Send as AlertRoot; interface StdControl as CollectionControl; ... message_t alertMsg; event void RadioControl.startDone(error_t ok) { if (ok == SUCCESS) call CollectionControl.start(); } void theft() { if (settings.alert & ALERT_LEDS) theftLed(); if (settings.alert & ALERT_ROOT) { alert_t *newAlert = call AlertRoot.getPayload(&alertMsg); newAlert->stolenId = TOS_NODE_ID; call AlertRoot.send(&alertMsg, sizeof *newAlert); } } event void AlertRoot.sendDone(message_t *msg, error_t ok) { } L +hS            "   T1&Networking: packet abstract data type  message_t is a platform-defined type for holding packets a fixed size byte array capable of holding MTU of all data-link layers (platform-selected) accessed only via interfaces: Packet: general payload access, provided at each layer xxPacket: information for layer xx9[Z9[ 7$ kG&Networking: packet abstract data type  message_t is a platform-defined type for holding packets a fixed size byte array capable of holding MTU of all data-link layers (platform-selected) accessed only via interfaces: Packet: general payload access, provided at each layer xxPacket: information for layer xx9[Z9[ 7$ kD Advanced Networking - Collectioninterface Send as AlertRoot; interface StdControl as CollectionControl; ... message_t alertMsg; event void RadioControl.startDone(error_t ok) { if (ok == SUCCESS) call CollectionControl.start(); } void theft() { if (settings.alert & ALERT_LEDS) theftLed(); if (settings.alert & ALERT_ROOT) { alert_t *newAlert = call AlertRoot.getPayload(&alertMsg); newAlert->stolenId = TOS_NODE_ID; call AlertRoot.send(&alertMsg, sizeof *newAlert); } } event void AlertRoot.sendDone(message_t *msg, error_t ok) { } ( 9b            "   l$ Basic NetworkingThe police may not get there in time to catch the mote thief. So, let s alert the mote s neighbours! We ll send a local broadcast message over the radio. What we ll see: active message-based single-hop messaging 2* ,U3> Basic Networking - Interfacesaddress-free interfaces for sending, receiving: Send: send a packet Receive: receive a packet  active messages interfaces: active messages has destination addresses active messages has  message type , used for dispatch on reception AMSend: send a packet to an active message address Receive is reused Message type not specified in interfaces, but in configurationsL0.0.m$ Basic NetworkingKuses interface AMSend as TheftSend; uses interface Receive as TheftReceive; ... message_t theftMsg; void theft() { ... if (settings.alert & ALERT_RADIO) call TheftSend.send(AM_BROADCAST_ADDR, &theftMsg, 0); } event message_t *TheftReceive.receive (message_t* msg, void *payload, uint8_t len) { theftLed(); return msg; }4L $}6uJ                  $ Basic NetworkingKuses interface AMSend as TheftSend; uses interface Receive as TheftReceive; ... message_t theftMsg; void theft() { ... if (settings.alert & ALERT_RADIO) call TheftSend.send(AM_BROADCAST_ADDR, &theftMsg, 0); } event message_t *TheftReceive.receive (message_t* msg, void *payload, uint8_t len) { theftLed(); return msg; }(L &MJ                  n$ Basic Networkingconfiguration AntiTheftAppC { } implementation { ... components new AMSenderC(54) as SendTheft, new AMReceiverC(54) as ReceiveTheft; AntiTheftC.TheftSend -> SendTheft; AntiTheftC.TheftReceive -> ReceiveTheft; }( DGT "         oL Basic Networking  Buffer ManagementSending: Each AMSenderC component has a 1-entry queue for a message_t * Each outstanding send must use a separate message_t buffer up to application to ensure this commonly: associate a variable with each Send/AMSend interface, and don t reuse it until corresponding send completed Receiving: Receive passes you a message_t *, and wants one back: event message_t* receive(message_t* msg, ... Common pattern 1: copy interesting data out of msg, return msg Common pattern 2: return a different message, and access msg later  z 6- z 6-" % - Wb             / :Networking - SummaryGoals A composable (application-selected) network stack Platform-selected link layers Portable, reusable code above the link layer Cross-platform communication (ex: telosb-micaz, PC-any mote) Four-part solution: abstract data type for packets (message_t) composable, link layer independent, portable common networking interfaces (Send, AMSend, Receive) composable, portable  external types (nx_struct, nx_uint16_t, etc) interoperable networking component structuring principles composable, link layer independent" d+-5/-#+ - 5/-#  C  G  P Networking Component Structure )Messaging: networking component structure )Messaging: networking component structure pManaging PowerWe want our anti-theft device to last a while, or the thief will just wait a bit to steal our motes! Luckily, in TinyOS 2, this is fairly straightforward Services and hardware components switch themselves on and off based on whether they are in use ex: light sensor switched on just before a reading, and off just afterwards ex: accelerometer switched on before group reading, warms up for 17ms, does readings, switches off The microcontroller is set to a power mode consistent with the rest of the system Radio reception is not as simple, as program doesn t specify when messages might arrive Applications can switch radio on or off explicitly Or, applications can use TinyOS 2 s  low-power listening support Radio channel is checked every N ms Messages sent with an N ms preamble (or repeatedly for N ms) User must specify N (default is N=0, i.e., always on)_ua6_u  a  6  qUsing Low-power Listeningmodule AntiTheftC ... uses interface RadioControl; uses interface LowPowerListening; ... event void RadioControl.startDone(error_t ok) { if (ok == SUCCESS) { call CollectionControl.start(); call LowPowerListening.setLocalDutyCycle(200); } } < 7 / b  3HrPower Management effectsMAll power management switched off: 11.83mA Checking acceleration every secondNNPower Management effectsRAccelerometer power management enabled: 11.46mA Checking acceleration every secondSSPower Management effectsFLow-power listening enabled: 4.26mA Checking acceleration every secondGGPower Management effectspProcessor power management enabled, all power management switched on: 1.04mA Checking acceleration every secondqqzV For Experts : implementing device drivers VImplementing a service, such as the timer or the light sensor involves one or more of: setting up support for multiple clients (via generic components) managing concurrent requests to the service (resource management) powering any necessary hardware on and off (power management) accessing low-level hardware, dealing with interrupts (concurrency) To see these issues in some detail, we ll look at the example of a simple analog sensor connected to an A/D channel of the microcontroller similar, but simpler than the PhotoC sensor used in AntiTheftC (that sensor shares and A/D channel with a temperature sensor, and needs a warmup period, complicating resource and power management)LWW, {A simple light sensorBasic steps to sample light sensor: Setup voltage on PW1 pin Turn on A/D converter Configure A/D converter for channel 6 Initiate A/D sampling In A/D interrupt handler: read A/D result registers report reading to application Turn off A/D converter Turn off voltage on PW1 pinN$83$83~Services with Multiple Clientsmodule AdcP { provides interface Read; } implementation { command error_t Read.read() { ... } ... task void acquiredData() { signal Read.readDone(SUCCESS, val); } }                        Services with Multiple Clients Services with Multiple Clients Services with Multiple Clients }A Fix: Parameterised Interfaces&     2provide interface Read<uint16_t>[uint8_t id] provides an array of interfaces, each identified by an integer each of these interfaces can be wired differently compiles to a runtime dispatch on the identifier, or an extra argument on function calls Often, components just want any interface, as long as it s not used by someone else: unique( some string ): returns a different number at each use with the same string, from a contiguous sequence starting at 0 uniqueCount( some string ): returns the number of uses of unique( some string )L-U-UZM   q  )     Services with multiple clientsmodule AdcP { provides interface Read[uint8_t client]; } implementation { uint8_t client; command error_t Read.read[uint8_t c]() { client = c; ... } ... task void acquiredData() { signal Read.readDone[client](SUCCESS, val); } } z  1  G    -       2          Services with multiple clients|generic configuration AdcReadClientC() { provides interface Read<uint16_t>; } implementation { components AdcP; enum { ID = unique( adc.resource ) }; Read = AdcP.Read[ID]; } @ bJ  Services with Multiple Clients Services with Multiple Clients L'Resource Management>Single application, but still many services competing for resources, e.g.: timers in application and multihop routing storage in network reprogramming and delay-tolerant networking A/D converter used for sensing and CSMA radio Different requirements from different services: exclusive access: CC2420 radio on micaz physically connected to capture pin for hardware timer 1 must reserve timer 1 for radio latency sensitive: low-jitter multi-kHz A/D sampling best effort: wake me every 5 minutes for sampling, and every 12 for route maintenanceXK0 K0a,eN)Resource Management (continued)UDedicated Resources single client picked at compile-time optional compile-time checks(BBfBResource Management (continued)Dedicated Resources single client picked at compile-time optional compile-time checks Properties: guaranteed availability no latency Examples: most lowest-level hardware abstractions, e.g., hardware timersvB # ?B # ? O,Resource Management (continued)vVirtualised Resources service implementation virtualises resource between N clients all clients known at compile-time Da4,gCResource Management (continued)Virtualised Resources service implementation virtualises resource between N clients all clients known at compile-time Properties guaranteed availability sharing-induced latency run-time overhead Examples scheduler, timers, radio send queue` B %4+ B % Resource Management (continued)VArbitrated Resources a shared resource some number N of clients known at compile-time <B#Resource Management (continued)Arbitrated Resources a shared resource some number N of clients known at compile-time (see unique) resource arbiter manages resource allocationP{8Resource Management (continued)Arbitrated Resources a shared resource some number N of clients known at compile-time resource arbiter manages resource allocation Properties: guaranteed availability unknown latency immediateRequest: get it now, if available Examples: storage, sensing, busesn (+ + (    =&Resource management for A/D conversionmodule AdcP { provides interface Read[uint8_t client]; uses interface Resource[uint8_t client]; } implementation { uint8_t client; command error_t Read.read[uint8_t c]() { return call Resource.request[c](); } event void Resource.granted[c]() { client = c; ... } ... task void acquiredData() { call Resource.release[client](); signal Read.readDone[client](SUCCESS, val); } } 2 E)2r    X                              &Resource management for A/D conversionconfiguration AdcC { provides interface Read<uint16_t>[uint8_t client]; } implementation { components AdcP, new RoundRobinArbiterC( adc.resource ) as Arbiter; Read = AdcP; AdcP.Resource -> Arbiter.Resource; }< t3#tX  iEPower ManagementA/D service is internally managed service has enough information to set hardware state can build on resource management system 8"^^P-Power ManagementCSMA radio is externally managed not enough information to set hardware state management from application, or higher-level service, e.g., neighbourhood message scheduling service (as we saw earlier)4!jFPower Management with Arbiters hD#Resource & Power Management SummaryKThree kinds of resources, all have guaranteed availability: dedicated single client, no latency typically external power management arbitrated multiple clients, unknown latency typically internal power management reusable power managers virtualised multiple clients, no latency, runtime overhead typically internal power management< > F S< > F  SLow-level code and concurrency,Most TinyOS code can live in tasks, and not worry too much about concurrency issues. For instance, in AdcP, the lines call Resource.release[client](); signal Read.readDone[client](SUCCESS, val); do not need to worry about requests coming in between the release and readDone (and changing client), as: tasks do not interrupt each other commands and events that are called from interrupt handlers must be marked async However, some code has to run in interrupts: because it is very timing sensitive because the microcontroller signals events via interruptsv" - js-^j^ -^ f         FnesC support for concurrencyOnesC does three things to simplify dealing with interrupt-related concurrency: requires the use of async on commands and events called from interrupt handlers runs a simple data-race detector to identify variables accessed from interrupt handlers provides an atomic statement to guarantee the atomic execution of one or more statements:OOcConcurrency examplepuint8_t resQ[SIZE]; async command error_t Queue.enqueue(uint8_t id) { if (!(resQ[id / 8] & (1 << (id % 8))) { // concurrent access! resQ[id / 8] |= 1 << (id % 8); // concurrent access! return SUCCESS; } return EBUSY; } If an interrupt occurs during the if, and the interrupt handler also calls Queue.enqueue then: An available slot may be ignored (probably not a problem) The same slot may be given twice (oops!) If an interrupt happens during the 2nd concurrent access (write): The interrupt handler s write of resQ will probably be lostX c B < Z/c$<  $    $  Data Race Detection  Every concurrent state access is a potential race condition Concurrent state access: If object O is accessed in a function reachable from an interrupt entry point, then all accesses to O are potential race conditions All concurrent state accesses must occur in atomic statements Concurrent state access detection is straightforward: Call graph fully specified by configurations Interrupt entry points are known Data model is simple (variables only)`U6tU 6t  Data race fixedpuint8_t resQ[SIZE]; async command error_t Queue.enqueue(uint8_t id) { atomic { if (!(resQ[id / 8] & (1 << (id % 8))) { resQ[id / 8] |= 1 << (id % 8); return SUCCESS; } return EBUSY; } Atomic execution ensured by simply disabling interrupts... Long atomic sections can cause problems! E.g.: limit maximum sampling frequency cause lost packetsl / 4 //4~  1    |Concluding RemarksReflections on TinyOS TinyOS status What we didn t see, and where to find out more Other sensor network operating systems Last wordsDReflection  Components vs ThreadsTinyOS has no thread support Execution examples earlier show execution of tasks, interrupt handlers This execution crosses component boundaries Each component encompasses activities initiated in different places, these could be viewed as independent  threads . In AntiTheftC we see: booted event initiated in system setup timer event initiated in timer subsystem settings-changed event initiated in dissemination subsystem light and acceleration completion events, ultimately caused by the requests from within AntiTheftC the movement-detection task, initiated in AntiTheftC However, it s not always clear exactly what a  thread of control is. E.g.: is the movement-detection task part of the  thread initiated in response to the periodic timer expiration in the timer subsystem?b$L$L >  + DReflection  Components vs ThreadsA more productive view is to consider the system as a set of interacting components A component maintains the information that represents its state A component makes requests for actions from other components A component responds to commands and events from other components, representing: Requests (from other components) for the initiation of a new action Ex: please sample the light sensor Completion of requests the component made of other components Ex: message queued for sending to the root of the collection tree Events representing asynchronous actions from the environment or other components Ex: system booted, timer expired, new dissemination value received Tracking the details of the control flow across components is not necessary within this mindset.TD#>BRCaTD#> B RCa<Reflection  Static AllocationTinyOS/nesC use static rather than dynamic allocation. Why? Ensure that resources are available for the worst case ex: each message source gets one queue slot Simplify debugging (by removing a major source of bugs) But where did that static allocation happen? AntiTheftC allocated some variables for message buffers, acceleration samples Instantiation of generic components implicitly allocates state instantiating a module creates a new set of variables unique/uniqueCount allow compile-time sizing of arrays to match the number of clients<7,8-<7,8- ,  D^9HReflection  TinyOS Goals Revisited $  Operate with limited resources execution model allows single-stack execution Allow high concurrency execution model allows direct reaction to events many execution contexts in limited resources Adapt to hardware evolution component, execution model allow hardware / software substitution Support a wide range of applications tailoring OS services to application needs Be robust limited component interactions, static allocation Support a diverse set of platforms OS services should reflect portable servicesZ.ZZ^ZZBZ%Z,Z Z2Z#Z-Z.^B%  , 2#-- Z5&Reflection  StatusTinyOS 2.0 released in November 2006 25  TinyOS Enhancement Proposals describing TinyOS structure 114k lines of code in TinyOS core (in CVS today) Services: completed: booting, scheduling, timer, A/D conversion, I2C bus, radio, serial port, storage, multihop collection and dissemination, telosb sensors, simple mica sensors in progress: over-the-air reprogramming, more sensors in limbo: security, time synchronisation Platforms: mica family, telos, eyes, tinynode, intel mote 2 2.0.1 release planned for IPSN conference General API cleanup (based on TEP finalisation), bug fixes%o f;%o 8f; bm\7!Other OSes for Mote-class DevicesSOS https://projects.nesl.ucla.edu/public/sos-2x/ C-based, with loadable modules and dynamic memory allocation also event-driven Contiki http://www.sics.se/contiki C-based, with lightweight TCP/IP implementations optional preemptive threading Mantis http://mantis.cs.colorado.edu C-based, with conventional thread-based programming model semaphores+IPC for inter-thread communicationt3O$O&h3O$O&h b ; ; aTWhat we didn t see, Where to find out moreWe didn t see: The build system How to get code onto motes The 3-level hardware abstraction architecture Storage (flash) abstractions Where to find out more http://www.tinyos.net The TinyOS Enhancement Proposals (TEPs) The web tutorials Phil Levis s nesC/TinyOS programming manual, available from http://csl.stanford.edu/~pal/ `wwP#7]8 Last WordsAWork In Progress sensorboards, TEPs community feedback on design and TEPs Remains to be done: finish system services, in particular network reprogramming But, compared to TinyOS 1.1, TinyOS 2.0 is already: better designed better documented more reliable more portable Download it today: http://www.tinyos.net/dist-2.0.0 !9<4 d>6 d9<4t N " <X 0?//T2z   0` .\GV~`L` `\GGV~ .L>?" dd@?" dd<@[% }(% dh" i  ~?" dd@ ! #" $  PT`   i ``p>>    ((  l   0` #" `  H #" `d`  T Click to edit Master title style! !B  Hx #" `  RClick to edit Master text styles Second level Third level Fourth level Fifth level!     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This interaction is just a function call. commands are calls from user to provider events are calls from provider to userH@ {  4 Z#p?"6@`NNN?N ,$@  0 interface Timer { command void startOneShot(uint32_t period); command void startPeriodic(uint32_t period); event void fired(); }H 4 0޽h ? `\GGV~ .L___PPT10.Lg+:lD' = @B D{' = @BA?%,( < +O%,( < +D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*4%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*4W%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*4W%(D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*4%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*4%(D"' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*4%(D' =4@BBBB%(E5' =1B B`BPB,54*3>B ppt_c='`B@BPB<*4D' =,54*3>!Bstyle.color='`B@BPB<*4D{ ' =%(D# ' =%(D' =4@BBBB%(E5' =1B B`BPB,54*3>B ppt_c='`B@BPB<*4D' =,54*3>!Bstyle.color='`B@BPB<*4D' =4@BBBB%(E5' =1B B`BPB,54*3>B ppt_c='`B@BPB<*4D' =,54*3>!Bstyle.color='`B@BPB<*4D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<* 4%(D' =A@BBBB0B%(D' =1:Bhidden*o3>+B#style.visibility<*4%(D' =4@BBBB%(E5' =1B B`BPB,54*3>B ppt_c='`B@BPB<*4D' =,54*3>!Bstyle.color='`B@BPB<*4++0+40 ++0+40 ++0+40 ++0+ 40 +  0  <(  <x < c $<d`   x < c $=oP   < NEp?"6@ NNN?N  xAll long-running operations are split-phase: A command starts the op: read An event signals op completion: readDone  -Lym < TLMp?"6@`NNN?Nu Z ainterface Read { command error_t read(); event void readDone(error_t ok, val_t val); }bbbH < 0޽h ? `\GGV~ .L___PPT10i.Lg+D=' = @B +  0  `H(  `x ` c $Xd`   x ` c $XoP  K ` N`p?"6@ NNN?N   All long-running operations are split-phase: A command starts the op: read An event signals op completion: readDone Errors are signalled using the error_t type, typically Commands only allow one outstanding request Events report any problems occurring in the op6-I7] ,m n ` Tfp?"6@`NNN?Nu Z ainterface Read { command error_t read(); event void readDone(error_t ok, val_t val); }bbbH ` 0޽h ? `\GGV~ .L___PPT10i.Lg+D=' = @B +".  0 0 HJ(  Hr H S xud`   r H S PvgH   H HP~p?"6@`NNN?N T,$ 0 p A configuration is a component built out of other components. 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ZReadStream is an interface for periodic sampling of a sensor into one or more buffers. postBuffer adds one or more buffers for sampling read starts the sampling operation readDone is signalled when the last buffer is full W6 N L+ 8 TPp?"6@`NNN?N 18 interface ReadStream { command error_t postBuffer(val_t* buf, uint16_t count); command error_t read(uint32_t period); event void readDone(error_t ok, uint32_t actualPeriod); }              %      H 8 0޽h ? `\GGV~ .L-%___PPT10.Lg+D' V= @B D\' = @BA?%,( < +O%,( < +D' =%(D;' =%(D' =A@BB@BB0B%()?)?D*' =.7 BBBBB/M 0 0 L 0 -0.33295 E*3>*B ppt_xB ppt_y=0BB<*8+8+0+80 +   0 B: @(  @x @ c $*d`   x @ c $*oP   @ H+p?"6@`NNN?N ~ |In readDone, we need to compute the variance of the sample. We defer this  computationally-intensive operation to a separate task, using post. We then compute the variance and report theft.*~=H @ 0޽h ? `\GGV~ .L|___PPT10\.Lg+D' 3= @B D' = @BA?%,( < +O%,( < +D' =%(D' =%(D:' =A@BB@BB0B%()?)?D' =.I7 BBBBB[M 5.55556E-7 -1.7341E-7 L -0.00156 -0.54474 *3>*B ppt_xB ppt_y=@0BBAApBB9cBt<*@+8+0+@0 +f4  0  8(  x  c $d`   "  ZHp?"6@`NNN?NuH S RealMainP   "  Zp?"6@`NNN?N    V AccelStreamC   "   ZPp?"6@`NNN?N=o  T AntiTheftC   B @ ZDp?"0@NNN?NaT ,$@ 0  T ?"6@ NNN?N+_! U RealMainP     Z p?"6@ NNN?N+ 7StackL  T$?"6@ NNN?NY,$D 0 V AntiTheftC    ! Z p?"6@ NNN?N{'   < Task Queue  " # Zp?"6@`NNN?Na@  5Timer" $ Z p?"6@`NNN?N 2  5Alarm" % Zp?"6@`NNN?N% T SchedulerP   B + ZDp?"0@NNN?N& & ,$@ 0B .@ ZDp?"0@NNN?N W,$@ 0- 0 T\?"6@ NNN?NY,$D 0 7Timer- 1 T?"6@ NNN?N_,$D 0 7Alarm 2 T1?"6@ NNN?N" ,B 3 TD1?"0@NNN?N+ B 4 TD1?"0@NNN?N,  5 Z  p?"6@ NNN?N p @serial receive 6 Z p?"6@ NNN?NS  M ; H/W timer  % 7 ZD p?"6@ NNN?Nh b ] A/D conv.   8 Z p?"6@ NNN?NE CDe ?Interrupt tableH  0޽h ? `\GGV~ .L___PPT10.X+UɻDL' = @B D' = @BA?%,( < +O%,( < +D' =%(Du' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =%(Du' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*.%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*0%(D' =%(Du' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*+%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*1%(DL' =%(D' =%(D' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<*6 D' =%(Dq' =%(D' =A@BBBB0B%(D' =1:Bhidden*o3>+B#style.visibility<*1%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*+%(D' =%(Dq' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*.%(D' =A@BBBB0B%(D' =1:Bhidden*o3>+B#style.visibility<*0%(D' =%(Dq' =%(D' =A@BBBB0B%(D' =1:Bhidden*o3>+B#style.visibility<*%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*%(+P+0+0 ++0+0 ++0+00 ++0+00 ++0+10 ++0+10 +Q5  0 !! % =!(   x   c $Єd`   "   ZXp?"6@`NNN?NuH S RealMainP   "   Z`p?"6@`NNN?N    V AccelStreamC   "   Zp?"6@`NNN?N=o  T AntiTheftC      Z$ p?"6@ NNN?N+ 7Stack   Zؗ p?"6@ NNN?N{'   < Task Queue  "   Z0p?"6@`NNN?Na@  5Timer"   Zp?"6@`NNN?N 2  5Alarm"   Zp?"6@`NNN?N% T SchedulerP   Gl  $  $ $  ,$D 0   T?"6@ NNN?NX$ 7TimerB   ZDp?"0@NNN?N   fl Z % Z,$D 0B   ZDp?"0@NNN?NZ1    T?"6@ NNN?NY V SchedulerP      T1?"6@ NNN?N" ,B   TD1?"0@NNN?N+ B   TD1?"0@NNN?N,    ZԲ p?"6@ NNN?N p @serial receive   Z p?"6@ NNN?NS  M ? H/W timer  %   Z p?"6@ NNN?Nh b ] A/D conv.     Z@ p?"6@ NNN?NE CDe ?Interrupt table6 l    !   ,$D 0   T?"6@ NNN?N   < timer task     c j0e0e    B|CDE(F @  o 8c8c     ?1 d0u0@Ty2 NP'p<'pA)BCD|E|| |E\ $|+ @   s " 0e@        @ABC DEFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `abN 5%  N 5%  N    5%    !"?N@ABC DEFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `ab g Gl +  # + ,$D 0   T?"6@ NNN?N_+! 7AlarmB "  ZDp?"0@NNN?N  H   0޽h ? `\GGV~ .LLD___PPT10$.X+z#D' = @B D' = @BA?%,( < +O%,( < +DL' =%(D' =%(D' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<*  D4' =%(D' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*# %(D4' =%(D' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*$ %(D4' =%(D' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*% %(D4' =%(D' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*! %(D2' =%(D' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*% %(D2' =%(D' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*$ %(D2' =%(D' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*# %(+5  0 "" %$T"(  $x $ c $1d`   " $ ZH3p?"6@`NNN?NuH S RealMainP   " $ Z<p?"6@`NNN?N    V AccelStreamC   " $ Z83p?"6@`NNN?N=o  T AntiTheftC    $ T@?"6@ NNN?N+_! V SchedulerP     $ ZD p?"6@ NNN?N+ 7Stack  $ ZtA p?"6@ NNN?N{'   < Task Queue  " $ Z+B#style.visibility<*$%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*$%(D4' =%(D' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*$%(D4' =%(D' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*$%(DL' =%(D' =%(D' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<*$$ D2' =%(D' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*$%(D2' =%(D' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*$%(D2' =%(D' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*$%(+}  0  $(  r  S X+d`   r  S 0,  H  0޽h ? `\GGV~ .L___PPT10i.N +D=' = @B +   0 $p X(  Xr X S |d`    X S D%  $  X NA p?"6@ NNN?Nsy X NA  p?"6@ NNN?N{ AH X 0޽h ? `\GGV~ .L___PPT10i.M"O+D=' = @B +  0  \0(  \x \ c $ d`   x \ c $h  H \ 0޽h ? `\GGV~ .L___PPT10i.M"O+D=' = @B +a   0 ]U d(  dr d S d`   r d S d2 7  ` d Tp?"6@`NNN?Nm ,$@ 0 j#ifndef ANTITHEFT_H #define ANTITHEFT_H typedef nx_struct { nx_uint8_t alert, detect; nx_uint16_t checkInterval; } settings_t; #endif   !     -         Y d H\p?"6@`NNN?N = ,$D 0 oExternal types (nx_...) provide C-like access, but: platform-independent layout and endianness gives interoperability no alignment restrictions means they can easily be used in network buffers compiled to individual byte read/writes 4@  C    H d 0޽h ? `\GGV~ .L___PPT10.M#+D' = @B D' = @BA?%,( < +O%,( < +D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*d%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*d%(+p+0+d0 ++0+d0 +(  0 E= p(  px p c $d`   x p c $42 7  u p Tlp?"6@`NNN?Nb  Uinterface DisseminationValue { command const t* get(); event void changed(); }VV&   :   p Hp?"6@`NNN?N] k,$ 0 6Dissemination is simple to use: The changed event is signalled when new settings are received The get command is used to obtain the received value We can then simply read the received settings* u.&6    H p 0޽h ? `\GGV~ .L___PPT10c.M#+n )D' = @B D' = @BA?%,( < +O%,( < +DZ' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*p _%(D0' =A@BB@BB0B%()?)?Dw' =.?7 BBBBBQM -0.00156 0.03931 L -0.00156 -0.29364 *3>*B ppt_xB ppt_y=@0BBAApBBB(x*<*pD' =4@BBBB%(E5' =1B B`BPB,54*3>B ppt_c='`B@BPB<*pD' =,54*3>!Bstyle.color='`B@BPB<*pD"' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*p_%(D' =4@BBBB%(E5' =1B B`BPB,54*3>B ppt_c='`B@BPB<*pD' =,54*3>!Bstyle.color='`B@BPB<*pD-' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*p%(D' =4@BBBB%(D' =,54 *3>!Bstyle.color='`B@BPB<*p-D' =4@BBBB%(D' =,54 *3>!Bstyle.color='`B@BPB<*p-VD' =4@BBBB%(D' =,54 *3>!Bstyle.color='`B@BPB<*pV+p+0+p0 ++0+p0 +#  0 :2 |(  |r | S xd`   r | S P   | Hp?"6@`NNN?N]   dFinally, we need to wire in the new functionality: We create a disseminator for the settings_t type We wire ActiveMessageC to start to the radio (we ll see why in a little bit) 3@U     7 H | 0޽h ? `\GGV~ .L___PPT10i.Mx+D=' = @B +9  0 PH t(  tr t S 8d`   r t S    t NA p?"6@ NNN?NGH t 0޽h ? `\GGV~ .L___PPT10i.M<+D=' = @B +  0 7/ x(  xr x S pd`   r x S p  @ x Hup?"6@`NNN?N7 3,$ 0 VWhenever possible, TinyOS 2.0, starts and stops services automatically. This isn t possible for the radio (no knowledge of when messages might arrive), so responsibility passed to the programmer. Must turn on radio for dissemination service to work. SplitControl is one of the interfaces for starting and stopping services Split-phase, used when start/stop may take a while C4w&   q S x TDxp?"6@`NNN?N-  ,$@ 0 ]interface SplitControl { command error_t start(); event void startDone(error_t ok); command error_t stop(); event void stopDone(error_t ok); }              H x 0޽h ? `\GGV~ .L___PPT10.M0{e+ІA D' = @B D' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*xH%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*x%(DT' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*xC%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*xCw%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*x%(D' =4@BBBB%(E5' =1B B`BPB,54*3>B ppt_c='`B@BPB<*x-D' =,54*3>!Bstyle.color='`B@BPB<*x-D ' =%(D' =%(D(' =A@BB@BB0B%()?)?Do' =.77 BBBBBIM 5E-6 -2.54335E-6 L 5E-6 -0.18867 *3>*B ppt_xB ppt_y=@0BBAApBBB2<*xD' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<*xnD' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<*x++0+x0 ++0+x0 ++0+x0 +}  0  $(  r  S cd`   r  S d  H  0޽h ? `\GGV~ .L___PPT10i.M8f+D=' = @B +  0  C(  r  S Jd`   r  S hK(  n  HSp?"6@`NNN?N] k hBefore we can report anything, we need to: Start the radio (already done) Start the collection service +>i i   T$Yp?"6@`NNN?N;   Minterface StdControl { command error_t start(); command error_t stop(); }NNZ           H  0޽h ? `\GGV~ .L___PPT10i.M]C+D=' = @B +   0 ME0 (  x  c $&d`   x  c $'(    Hx,p?"6@`NNN?N +  ]Collection messages are sent By placing data in a message_t buffer Using the Send interface6A3 "&3   "    T9p?"6@`NNN?N ,$@ 0 interface Send { command error_t send(message_t* msg, uint8_t len); event void sendDone(message_t* msg, error_t ok); command uint8_t maxPayloadLength(); command void* getPayload(message_t* msg); }                      H  0޽h ? `\GGV~ .LME___PPT10%.M]C+M{D' 8= @B DD' = @BA?%,( < +O%,( < +D{' =%(D#' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D2' =A@BB@BB0B%()?)?Dy' =.A7 BBBBBSM -0.00173 -0.28601 L -0.00173 -0.61896 *3>*B ppt_xB ppt_y=@0BBAApBBB(x*<*+p+0+0 ++0+0 +\  0 '|-(  |r | S 4d`   r | S     D | Zp?"6@ NNN?N: G ,$@ 0 Hlink-layer header areaI  | Zp?"6@ NNN?N: Z ,$D 0 Mdata, footer, metadata area$  | Zp?"6@ NNN?No  ,$@ 0 (B  | TDp?"0@NNN?Ny QQ ,$@ 0B | TDp?"0@NNN?No 77 ,$@ 0B | TDp?"0@NNN?No  ,$@ 0B | TDp?"0@NNN?Nz ,$@ 0B | TDp?"0@NNN?Nz ZZ ,$@  0> | ZX p?"6@ NNN?Nt #N ,$  0 Bapplication data; | Z p?"6@ NNN?Nt  ,$  0 ? cc1000 header? | Z p?"6@ NNN?Nd 9 ,$  0 Ccollection header; | Z  p?"6@ NNN?N\ U  ,$  0 ? cc1000 footer= | Z p?"6@ NNN?N{  ,$ 0 Acc1000 metadataB | TDp?"0@NNN?N  ,$@ 0B |  `Dp?"0@NNN?Nz QQf ,$@ 0 | Tp?"6@ NNN?Ny k ,$@ 0 | Tp?"6@ NNN?No 6 ,$D 0r | Z p?"6@ NNN?NEC ,$@ 0r | Z p?"6@ NNN?N ff ,$@ 0*r  |  ` p?"6@ NNN?N o ,$@ 0 (X "| Z p?"6@ NNN?N{ ! O,$ 0 \CollectionPacket8 #| Z p?"6@ NNN?Ng ,$ 0 <Packet: $| Z p?"6@ NNN?N{ oO,$ 0 > CC1000Packet  r %| Z p?"6@ NNN?N RO_ ,$@ 0P &| Z p?"6@ NNN?N^ + 2,$ 0 TAMPacket  H | 0޽h ? `\GGV~ .L>>___PPT10n>.0`$+;Dj;' = @B D%;' = @BA?%,( < +O%,( < +D(' =%(D' =%(D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<* |%(D' =-g6B fade*<3<* |D!' =%(D!' =%(D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<* |%(D' =-g6B fade*<3<* |D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* |%(D' =-g6B fade*<3<* |D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D' =%(D ' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<* |%(D' =-g6B fade*<3<* |D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*"|%(D' =-g6B fade*<3<*"|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*$|%(D' =-g6B fade*<3<*$|D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%|%(D' =-g6B fade*<3<*%|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*&|%(D' =-g6B fade*<3<*&|D' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*|%(D' =-g6B fade*<3<*|D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*#|%(D' =-g6B fade*<3<*#|++0+|0 ++0+ |0 ++0+ |0 ++0+|0 ++0+|0 ++0+|0 ++0+|0 ++0+|0 ++0+ |0 ++0+"|0 ++0+#|0 ++0+$|0 ++0+&|0 +~  0 #%(  x  c $(qd`   x  c $r     ZHzp?"6@ NNN?No   (B   TDp?"0@NNN?Ny QQ B   TDp?"0@NNN?No 77 B   TDp?"0@NNN?No  B   TDp?"0@NNN?Nz B   TDp?"0@NNN?Nz ZZ    Z~ p?"6@ NNN?Nt #N  Bapplication data  Z p?"6@ NNN?Nt   ? cc1000 header   Z p?"6@ NNN?Nd 9  Ccollection header  ZЋ p?"6@ NNN?N\ U   ? cc1000 footer   Z p?"6@ NNN?N{   Acc1000 metadataB  TDp?"0@NNN?N  B   `Dp?"0@NNN?Nz QQf   Tp?"6@ NNN?Ny k   Tp?"6@ NNN?No 6 r  Z p?"6@ NNN?NE r  Z p?"6@ NNN?N ff r   ` p?"6@ NNN?N o  ($  Zt p?"6@ NNN?N{ ! O \CollectionPacket  Z$ p?"6@ NNN?N   <Packet  ZP p?"6@ NNN?N{ oO > CC1000Packet  r  Z p?"6@ NNN?N RO_   Z p?"6@ NNN?N^ + 2 TAMPacket   " Zԫp?"6@ NNN?N: G  Hlink-layer header area # Z8p?"6@ NNN?N: Z  Mdata, footer, metadata areaH  0޽h ? `\GGV~ .L___PPT10i.0`$+D=' = @B +  0 @ o(  x  c $Od`   x  c $PR(    HSp?"6@`NNN?NG We use getPayload to get access to the portion of message_t available to the application We use an external type to actually write the data@   !   Q   T`p?"6@`NNN?Nd   interface Send { command error_t send(message_t* msg, uint8_t len); event void sendDone(message_t* msg, error_t ok); command uint8_t maxPayloadLength(); command void* getPayload(message_t* msg); }                        Tgp?"6@`NNN?N: 6typedef nx_struct { nx_uint16_t stolenId; } alert_t;77h         H  0޽h ? `\GGV~ .L___PPT10i.M]C+D=' = @B +}  0 P $(  r  S 4Id`   r  S  J  H  0޽h ? `\GGV~ .L___PPT10i.M+D=' = @B +   0  P(  r  S 6d`     S 7<$ 0  H  0޽h ? `\GGV~ .L  ___PPT10 .1z+FDL ' = @B D ' = @BA?%,( < +O%,( < +D> ' =%(D ' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*_}%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*}%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*0%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*0p%(+8+0+0 +   0 ` (  r  S d`   r  S X  |  H p?"6@`NNN?Ne u tAMSend is just like send, but with a destination The theft message has no data, so no use of the payload functions. uu o k  TX'p?"6@`NNN?N,$D 0 uinterface AMSend { command error_t send(am_addr_t addr, message_t* msg, uint8_t len); event void sendDone(message_t* msg, error_t ok); command uint8_t maxPayloadLength(); command void* getPayload(message_t* msg); } ^                               H  0޽h ? `\GGV~ .L___PPT10.M '+|3DO' = @B D ' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(+8+0+0 +N   0  d(  dx d c $cd`  c x d c $c c  d T\p?"6@`NNN?Nh,$D 0 %interface Receive{ event message_t* receive(message_t* msg, void* payload, uint8_t len); command uint8_t payloadLength(); command void* getPayload(message_t* msg); }B                             P d H\ p?"6@`NNN?Ne u HAMSend is just like send, but with a destination The theft message has no data, so no use of the payload functions. On Receive, we just light the  bright red light   H d 0޽h ? `\GGV~ .L___PPT10.M '+|3DO' = @B D ' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*d%(+8+0+d0 +   0 p 9(  r  S $cd`  c r  S c c   HHcp?"6@`NNN?N + The Active Message ids used for dispatching are specified as parameters to the generic components used for active message sends and receives.  ~  T cp?"6@`NNN?Nk,$D 0 generic configuration AMSenderC(am_id_t id) { provides interface AMSend; provides interface Packet; provides interface AMPacket; provides interface PacketAcknowledgements as Acks; } ...     4        H  0޽h ? `\GGV~ .L___PPT10.M0~K+ DO' = @B D ' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(+8+0+0 +o   0 <4 (  r  S xcd`  c r  S Pc c   Ttcp?"6@`NNN?NR? ,$D 0 Dmessage_t buffer; message_t *lastReceived = &buffer; event message_t* receive(message_t* msg, ...) { /* Return previous message buffer, save current msg */ message_t *toReturn = lastReceived; lastReceived = msg; post processMessage(); return toReturn; } task void processMessage() { ... use lastReceived ... }EE.                                                        H  0޽h ? `\GGV~ .L___PPT10.Mљn+ksDO' = @B D ' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(+8+0+0 +  0 0 n(  x  c $,cd`  c   c $`cW<$ 0 c  X)H  0޽h ? `\GGV~ .L___PPT10_./ V!+D' = @B D' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*8%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*8V%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*V%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*,%(D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*,a%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*av%(D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*v%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(+8+0+0 +  0 $  @   (   x   c $8~c`  c "   Zcp?"6@`NNN?N AE  8AM Radio  5"   Z$cp?"6@`NNN?N ) ,$D 0 9 AM Serial  "   Zcp?"6@`NNN?NR #X ; Application  B  @  `Dp?"0@NNN?NQ B    `Dp?"0@NNN?NP ,$@ 0B  @  `Dp?"0@NNN?NQ B    `Dp?"0@NNN?NQ  ,$@ 0B  @  `Dp?"0@NNN?NZ+ B    `Dp?"0@NNN?NG D ,$@ 0`   Zyc p?"6@ NNN?N a Packet AMPacket AMSend2 ,H   0޽h ? `\GGV~ .L|t___PPT10T.19+[D' = @B Ds' = @BA?%,( < +O%,( < +D' =%(D) ' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* %(D' =-g6B fade*<3<* D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* %(D' =-g6B fade*<3<* D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* %(D' =-g6B fade*<3<* D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<* %(D' =-g6B fade*<3<* D! ' =%(D)' =4@BB BB%(D' =-g6B fade*<3<* D' =1:Bhidden*o3>+B#style.visibility<* %(D)' =4@BB BB%(D' =-g6B fade*<3<* D' =1:Bhidden*o3>+B#style.visibility<* %(D)' =4@BB BB%(D' =-g6B fade*<3<* D' =1:Bhidden*o3>+B#style.visibility<* %(D6' =A@BB BB0B%(D' =-g6B fade*<3<* D' =1:Bhidden*o3>+B#style.visibility<* %(+p+0+ 0 ++0+ 0 +  0 P q(  x  c $`lc`  c "  Zmcp?"6@`NNN?N AE  8AM Radio  "  Zqcp?"6@`NNN?NR #X ; Application  B @  `Dp?"0@NNN?NQ B @  `Dp?"0@NNN?NZ+   Zuc p?"6@ NNN?N  NPacket Receive$H  0޽h ? `\GGV~ .L___PPT10i.19+D=' = @B +>1  0 ZR` (  x  c $'c`  c "  ZT.cp?"6@`NNN?N AE  8AM Radio  "  Z`1cp?"6@`NNN?NR #X ; Application  B @  `Dp?"0@NNN?NQ B @  `Dp?"0@NNN?NZ+   Z5c p?"6@ NNN?N  NPacket Receive$"  Zt;cp?"6@`NNN?N`L : Collection  B    `Dp?"0@NNN?NMw B    `Dp?"0@NNN?NMaa B    `Dp?"0@NNN?NM ,$@ 0B  @  `Dp?"0@NNN?N[O ,$@ 0m   Z|@c p?"6@ NNN?N,$ 0 q Send AMSend( Ez \    Q ,$@ 0  ZlBcp?"6@ NNN?N\   (B  TDp?"0@NNN?N  r  Z p?"6@ NNN?Nf    ZKc p?"6@ NNN?N.B I 8Packet  Z Pc p?"6@ NNN?Ng n  Gcc1000 + coll. header=z \   6 ,$@ 0  Z0Ucp?"6@ NNN?N\   (B  TDp?"0@NNN?N   r  Z p?"6@ NNN?N-y    Z$Xc p?"6@ NNN?N_B z 8Packet  Z[c p?"6@ NNN?N   ? cc1000 headerB  TD1?"0@NNN?N g ,$D 0B  TD1?"0@NNN?N ,$@ 0H  0޽h ? `\GGV~ .L___PPT10d.19+@D' = @B D' = @BA?%,( < +O%,( < +Dt ' =%(D ' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-g6B fade*<3<*D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-g6B fade*<3<*D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-g6B fade*<3<*D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-g6B fade*<3<*Dv ' =%(D ' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* %(D' =-g6B fade*<3<* D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* %(D' =-g6B fade*<3<* D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<* %(D' =-g6B fade*<3<* D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*%(+8+0+ 0 +  0  P(  r  S cd`  c   S lc<$ 0 c H  0޽h ? `\GGV~ .L___PPT10.MpA+DY' = @B D' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*e%(Ds' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*E%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*E%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D> ' =%(D ' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*R%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*R%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*(%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*(^%(+8+0+0 +  0  (  r  S cd`  c r  S c c z  Hcp?"6@`NNN?N d  We request that the radio use a 2% duty-cycle low-power listening strategy We wire the interface to the actual radio (not shown)  H  0޽h ? `\GGV~ .L___PPT10i.M@ Z+D=' = @B +   0 $   (  r  S Kd`  K x  c $K( 2r  K  0 c $0e0eA d    ? A@  Ap 8c8c     ?1 d0u0@Ty2 NP'p<'pA)BCD|E||s " 0e@        @ABC DEEFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `abN E5%  N E5%  N F   5%    !"?N@ABC DEFFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `ab4*  d KH  0޽h ? `\GGV~ .L___PPT10i.MB+D=' = @B +   0 0 ( < (  <x < c $Kd`  K ~ < s *K _^  K  <0 c $0e0eA f    ? A@  Ap 8c8c     ?1 d0u0@Ty2 NP'p<'pA)BCD|E||s " 0e@        @ABC DEEFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `abN E5%  N E5%  N F   5%    !"?N@ABC DEFFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `ab8*  f KH < 0޽h ? `\GGV~ .L___PPT10i.MB+D=' = @B +   0 0 (  @ (  @x @ c $TKd`  K ~ @ s *,K1 T{  K  @0 c $0e0eA g    ? A@  Ap 8c8c     ?1 d0u0@Ty2 NP'p<'pA)BCD|E||s " 0e@        @ABC DEEFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `abN E5%  N E5%  N F   5%    !"?N@ABC DEFFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `abV!a  g KH @ 0޽h ? `\GGV~ .L___PPT10i.MB+D=' = @B +   0 0 ( D (  Dx D c $Kd`  K ~ D s *K1 ' K  D0 c $0e0eA h    ? A@  Ap 8c8c     ?1 d0u0@Ty2 NP'p<'pA)BCD|E||s " 0e@        @ABC DEEFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `abN E5%  N E5%  N F   5%    !"?N@ABC DEFFGHIJK5%LMNOPQRSTUWYZ[ \]^_ `abMr^  h KH D 0޽h ? `\GGV~ .L___PPT10i.MB+D=' = @B +}  0 0 $(  r  S Kd`  K r  S K K H  0޽h ? `\GGV~ .L___PPT10i.Np +D=' = @B +&  0 x@ (  r  S xKd`  K   S xK <$ 0 K 28     NA p?"6@ NNN?N&  ZlK p?"6@ NNN?N ; V"PW1, ADC6 are microcontroller pins##~  HKp?"6@`NNN?N8 \,$@  0 PExposing sensor (maybe) and A/D converter (definitely) to multiple clients Resource management: need to share light sensor and A/D converter with other clients Power management: should leave sensor or A/D on between consecutive clients or for repeated accesses Must avoid data races in interrupt handler and interrupt handler setup codeQQ Q H  0޽h ? `\GGV~ .L___PPT10.N`lAc+mxD' = @B D' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*$=%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*=S%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*Sy%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*y%(Ds' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*K%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*K%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*Q%(+p+0+0 ++0+0 +}  0 p $(  r  S TKd`  K r  S K K H  0޽h ? `\GGV~ .L___PPT10i.NИ+D=' = @B +   0   0  HK (  Hx H c $tKd`  K " H ZKp?"6@`NNN?N  V AccelStreamC   " H Z Kp?"6@`NNN?Nj 8 T AntiTheftC   "  H ZKp?"6@`NNN?N1 5Radio" H ZKp?"6@`NNN?N o t  NAdcPB H@  `Dp?"0@NNN?NHvMlB H  `Dp?"0@NNN?N? B H  `Dp?"0@NNN?NP  B H@  `Dp?"0@NNN?N >   H ZK p?"6@ NNN?N   >Read interfaceH H 0޽h ? `\GGV~ .L___PPT10i.X+D=' = @B +  0 vn@ L(  Lx L c $[Kd`  K " L Z@]Kp?"6@`NNN?N  V AccelStreamC   " L ZPbKp?"6@`NNN?Nj 8 T AntiTheftC    L TfK?"6@ NNN?N+_! 7Radio L Z0kK p?"6@ NNN?N+ 7StackF L ToK?"6@ NNN?NY,$D 0 PAdcP L ZrK p?"6@ NNN?N{'   < Task Queue  "  L ZvKp?"6@`NNN?N1 5Radio  L T1?"6@ NNN?N" ,B  L TD1?"0@NNN?N+ B L TD1?"0@NNN?N,  L ZX{K p?"6@ NNN?N p @serial receive L ZK p?"6@ NNN?NS  M ; H/W timer  % L ZȄK p?"6@ NNN?Nh b ] A/D conv.   L ZK p?"6@ NNN?NE CDe ?Interrupt table" L Z,Kp?"6@`NNN?N o t  NAdcPB L ZDp?"0@NNN?N6 ,$@ 0H L 0޽h ? `\GGV~ .L___PPT10.X+ˠ,D/' = @B D' = @BA?%,( < +O%,( < +D' =%(Du' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*L%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*L%(DL' =%(D' =%(D' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<*L +8+0+L0 +&  0 P P(  Px P c $lKd`  K " P ZKp?"6@`NNN?N  V AccelStreamC   " P ZDKp?"6@`NNN?Nj 8 T AntiTheftC   F P TDK?"6@ NNN?N+_!,$@ 0 PAdcP P Z(#K p?"6@ NNN?N+ 7Stack- P T'K?"6@ NNN?NY,$D 0 7Radio P Z +K p?"6@ NNN?N{'   < Task Queue  "  P Z/Kp?"6@`NNN?N1 5RadioN  P T3K?"6@ NNN?N Y,$@ 0 X AccelStreamC     P T1?"6@ NNN?N" ,B  P TD1?"0@NNN?N+ B  P TD1?"0@NNN?N,  P Z(9K p?"6@ NNN?N p @serial receive P Z>K p?"6@ NNN?NS  M ; H/W timer  ) P ZAK p?"6@ NNN?Nh b a A/D conv.   P ZGK p?"6@ NNN?NE CDe ?Interrupt table" P ZxKKp?"6@`NNN?N o t  NAdcPB P ZDp?"0@NNN?No " ,$D 0B P ZDp?"0@NNN?N3  ,$@ 0B P ZDp?"0@NNN?N   ,$D  0H P 0޽h ? `\GGV~ .L___PPT10b.X+-ߘDV' = @B D' = @BA?%,( < +O%,( < +D' =%(Du' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*P%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*P%(D' =%(Du' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*P%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*P%(D' =%(Dq' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*P%(D' =A@BBBB0B%(D' =1:Bhidden*o3>+B#style.visibility<*P%(D' =%(Du' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<* P%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*P%(++0+P0 ++0+P0 ++0+P0 ++0+ P0 +  0 ` <(  ~  s * Kd`  K ~  s * K K H  0޽h ? 3___PPT10i.oز+D=' = @B +  0  0(  x  c $Kd`  K x  c $pK K H  0޽h ? `\GGV~ .L___PPT10i.NИ+D=' = @B +}  0  $(  r  S Gd`  G r  S G G H  0޽h ? `\GGV~ .L___PPT10i.N`k+D=' = @B +"   0 9 1 `  T (  Tx T c $Gd`  G " T ZLGp?"6@`NNN?N  V AccelStreamC   " T ZGp?"6@`NNN?Nj 8 T AntiTheftC   " T Z8Gp?"6@`NNN?N1 5Radio" T TGp?"6@`NNN?N   NAdcPB T@  `Dp?"0@NNN?NHvMlB T  `Dp?"0@NNN?N? B  T  `Dp?"0@NNN?NX@ 7 B  T@  `Dp?"0@NNN?N %   T ZG p?"6@ NNN?N   >Read interface  T Tp?"6@ NNN?NB    T Tp?"6@ NNN?NB H T 0޽h ? `\GGV~ .L___PPT10i.X+D=' = @B +&  0 " \(  \x \ c $Gd`  G " \ ZGp?"6@`NNN?N  V AccelStreamC   " \ ZGp?"6@`NNN?Nj 8 T AntiTheftC   F \ T|G?"6@ NNN?N+_!,$@ 0 PAdcP \ ZG p?"6@ NNN?N+ 7Stack- \ TG?"6@ NNN?NY,$D 0 7Radio \ ZؤG p?"6@ NNN?N{'   < Task Queue  "  \ ZGp?"6@`NNN?N1 5Radio  \ T1?"6@ NNN?N" ,B  \ TD1?"0@NNN?N+ B  \ TD1?"0@NNN?N,  \ ZG p?"6@ NNN?N p @serial receive \ ZG p?"6@ NNN?NS  M ; H/W timer  ) \ Z@G p?"6@ NNN?Nh b a A/D conv.   \ Z|G p?"6@ NNN?NE CDe ?Interrupt tableB \ ZDp?"0@NNN?N " ,$D 0B \ ZDp?"0@NNN?N3S ,$@ 0" \ TGp?"6@`NNN?NS   NAdcP \ Tp?"6@ NNN?N - 9  \ Tp?"6@ NNN?N 9 H \ 0޽h ? `\GGV~ .L~___PPT10^.X+NDR' = @B D ' = @BA?%,( < +O%,( < +D' =%(Du' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*\%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*\%(D' =%(Du' =%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*\%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*\%(D' =%(Dq' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*\%(D' =A@BBBB0B%(D' =1:Bhidden*o3>+B#style.visibility<*\%(D' =%(Dq' =%(D' =4@BBBB%(D' =1:Bhidden*o3>+B#style.visibility<*\%(D' =A@BBBB0B%(D' =1:Bhidden*o3>+B#style.visibility<*\%(++0+\0 ++0+\0 ++0+\0 ++0+\0 +  0 `Tb(  Tr T S Gd`  G r T S ȆG  G 6 T HG "`E ,$ 0 |83 kinds of resources: arbitrated, dedicated, virtualised(##H T 0޽h ? `\GGV~ .L___PPT10.=K+T^DO' = @B D ' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*T%(+8+0+T0 +  0    \ (  \r \ S ZGd`  G r \ S [GT G 8" \ Z]Gp?"6@`NNN?Nuq ,$@ 0 < CC2420 radio  ;" \ ZdGp?"6@`NNN?N) "N ,$D 0 ?Uninformed user7" \ ZhGp?"6@`NNN?Nl P ,$@ 0 ; H/W Timer 1  B \  `Dp?"0@NNN?Nq PPn ,$D 0B \  `Dp?"0@NNN?N^ R ,$@ 0B  \@  `Dp?"0@NNN?NL I e ,$@ 0B  \ ZD1?"0@NNN?N $ ,$@ 0B  \ ZnG 1?"6@`NNN?N   ,$D  0 Fcompile-time errorH \ 0޽h ? `\GGV~ .L___PPT10.+ġ2D' = @B DZ' = @BA?%,( < +O%,( < +D' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*\%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*\%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*\%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*\%(DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*\%(DN' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* \%(D' =-g6B fade*<3<* \D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* \%(D' =-g6B fade*<3<* \D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<* \%(D' =-g6B fade*<3<* \++0+\0 ++0+\0 ++0+\0 ++0+ \0 +  0 `0(  x  c $hSGd`  G x  c $,TG G H  0޽h ? `\GGV~ .L___PPT10i.+D=' = @B +6  0 }uh (  hr h S  Gd`  G r h S D G G 7" h ZBp?"6@`NNN?NA > ,$@ 0 ; H/W timer 0  <" h ZGp?"6@`NNN?NJE ,$@ 0 @periodic sensingY" h ZGp?"6@`NNN?N^ ,$@ 0 ]multihop networking 9" h ZGp?"6@`NNN?N G ,$@  0 = Timer service7" h  `Gp?"6@`NNN?N3 ] ,$D  0 5timer7"  h  `"Gp?"6@`NNN?N> > ,$@ 0 5timerB  h  `Dp?"0@NNN?N'& ,$@ 0B  h  `Dp?"0@NNN?N& ,$@ 0B h@  `Dp?"0@NNN?N  9 ,$@ 0B h  `Dp?"0@NNN?N m / ,$@ 0B h  `Dp?"0@NNN?N 4 ,$@ 0B h  `Dp?"0@NNN?N   4 ,$@  0< h Z)G p?"6@ NNN?N-(M ,$  0 @virtual resource2 h N-G p?"6@ NNN?N, jL ,$ 0 Bdedicated resourceB h TD1?"0@NNN?Nm 2,$@  0B h TD1?"0@NNN?N S  ,$@ 0H h 0޽h ? `\GGV~ .L""___PPT10".+_#D ' = @B D ' = @BA?%,( < +O%,( < +D< ' =%(D ' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<* h%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<* h%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<* h%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(Dt' =%(D' =%(D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*h++0+h0 ++0+h0 ++0+h0 ++0+h0 ++0+h0 ++0+ h0 ++0+h0 ++0+h0 +  0 p0(  x  c $$Gd`  G x  c $G G H  0޽h ? `\GGV~ .L___PPT10i.+D=' = @B +/  0 t l  h (  hx h c $Bd`  B x h c $B B /" h Z+B#style.visibility<*h%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D>' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD[' =4@BB BB%()))D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hDm' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* h%(D' =-g6B fade*<3<* hD)' =4@BB BB%(D' =-g6B fade*<3<*hD' =1:Bhidden*o3>+B#style.visibility<*h%(DY' =4@BB BB%()))D' =-g6B fade*<3<*hD' =1:Bhidden*o3>+B#style.visibility<*h%(D?' =%(D' =%(D)' =4@BB BB%(D' =-g6B fade*<3<* hD' =1:Bhidden*o3>+B#style.visibility<* h%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* h%(D' =-g6B fade*<3<* hD+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*h%(D' =-g6B fade*<3<*hD' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* h%(D' =-g6B fade*<3<* hD' =%(D' =%(D8' =A@BB BB0B%(D' =1:Bvisible*o3>+B#style.visibility<* h%(D' =-g6B fade*<3<* hD+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* h%(D' =-g6B fade*<3<* h++0+h0 ++0+h0 ++0+h0 ++0+ h0 +g:  0   lp (  lx l c $Bd`  B x l c $B B " l ZdBp?"6@ NNN?N3 u 3ADC" l ZBp?"6@`NNN?N_k  < Light sensor  " l T8Bp?"6@`NNN?N;[  : CSMA radio  " l ZBp?"6@`NNN?N O  7ArbiterB l TDp?"0@NNN?NB  % ,$D 0B  l@ TDp?"0@NNN?NL  ,$D 0B  l ZDp?"0@NNN?Nh  ,$@ 0B  l ZDp?"0@NNN?N^ r ,$@  0B  l TDp?"0@NNN?Nq Q ,$@ 0B  l ZDp?"0@NNN?Nh  4 ,$D  0B l@ TDp?"0@NNN?N^ v ,$@ 0 l C *Aj0234131 h,$D 0B l ZDp?"0@NNN?N^  - ,$D  0H l 0޽h ? `\GGV~ .L/,',___PPT10,.+tLD+' = @B D+' = @BA?%,( < +O%,( < +D' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*l%(D' =-g6B fade*<3<*lD ' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* l%(D' =-g6B fade*<3<* lD)' =4@BB BB%(D' =-g6B fade*<3<*lD' =1:Bhidden*o3>+B#style.visibility<*l%(D' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* l%(D' =-g6B fade*<3<* lD+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*l%(D' =-g6B fade*<3<*lD' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* l%(D' =-g6B fade*<3<* lD=' =%(D' =%(D)' =4@BB BB%(D' =-g6B fade*<3<* lD' =1:Bhidden*o3>+B#style.visibility<* l%(D)' =4@BB BB%(D' =-g6B fade*<3<*lD' =1:Bhidden*o3>+B#style.visibility<*l%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* l%(D' =-g6B fade*<3<* lD ' =%(D' =%(D)' =4@BB BB%(D' =-g6B fade*<3<* lD' =1:Bhidden*o3>+B#style.visibility<* l%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*l%(D' =-g6B fade*<3<*lDn ' =%(D ' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<* l%(D' =-g6B fade*<3<* lD)' =4@BB BB%(D' =-g6B fade*<3<* lD' =1:Bhidden*o3>+B#style.visibility<* l%(D)' =4@BB BB%(D' =-g6B fade*<3<* lD' =1:Bhidden*o3>+B#style.visibility<* l%(D)' =4@BB BB%(D' =-g6B fade*<3<*lD' =1:Bhidden*o3>+B#style.visibility<*l%(D' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*l%(D' =-g6B fade*<3<*lD+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*l%(D' =-g6B fade*<3<*l+  0  p0(  px p c $Bd`  B x p c $ȠBO  B H p 0޽h ? `\GGV~ .L___PPT10i.+D=' = @B +  0  (  r  S \Bd`  B r  S ܇B B \  TBp?"6@`NNN?N  interface Resource { async command error_t request(); async command error_t immediateRequest(); event void granted(); async command error_t release(); }                  H  0޽h ? `\GGV~ .L~ v ___PPT10V .Nݛ+D ' B= @B D ' = @BA?%,( < +O%,( < +D' =%(D' =%(D8' =A@BB@BB0B%()?)?D' =.G7 BBBBBYM 2.77778E-6 4.50867E-6 L 0.00173 -0.53157 *3>*B ppt_xB ppt_y=@0BBAApBB9c:B#<*DL' =%(D' =%(D' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<*DL' =%(D' =%(D' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<* DL' =%(D' =%(D' =4@BBBB%(D' =,54*3>!Bstyle.color='`B@BPB<*Ch+8+0+0 +  0  d(  r  S sBd`  B r  S ltB B 8  TyBp?"6@`NNN?N+,$D 0 Bgeneric configuration RoundRobinArbiterC(char resourceName[]) { provides interface Resource[uint8_t client]; ... } implementation { ... uniqueCount(resourceName) ... } Z     V    H  0޽h ? `\GGV~ .L___PPT10.N%R+ksDO' = @B D ' = @BA?%,( < +O%,( < +DA' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(+8+0+0 +,  0    m (  x  c $RBd`  B "  ZSBp?"6@`NNN?NC  @user application   HWB "`0 LGoal: set hardware to lowest-power state consistent with application needs &LL"  Z[Bp?"6@`NNN?N   < A/D hardware  "  Z_Bp?"6@`NNN?N\ # '  ; A/D service  B  TDp?"0@NNN?N u9 ,$D 0B  ZDp?"0@NNN?N ,$@ 0B   `Dp?"0@NNN?N  B   `Dp?"0@NNN?N  B  ZDp?"0@NNN?N, 'L ,$D 0  Z0eB c"$ ` <$@  0 B H  0޽h ? `\GGV~ .Lo!g!___PPT10G!.*j+J³D ' = @B D ' = @BA?%,( < +O%,( < +D ' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-g6B fade*<3<*D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-g6B fade*<3<*D!' =4@BBBB%(D' =,54*3>Bfillcolor=@BPB<*D' =1:B solid*a3>Bfill.type<*D' =1:B true*]3>Bfill.on<*D' =%(D)' =4@BB BB%(D' =-g6B fade*<3<*D' =1:Bhidden*o3>+B#style.visibility<*%(D ' =%(D' =%(D)' =4@BB BB%(D' =-g6B fade*<3<*D' =1:Bhidden*o3>+B#style.visibility<*%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-g6B fade*<3<*D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-g6B fade*<3<*Dy' =%(D!' =4@BBBB%(D' =,54*3>Bfillcolor=@BPB<*D' =1:B solid*a3>Bfill.type<*D' =1:B true*]3>Bfill.on<*D' =%( D)' =4@BB BB%(D' =-g6B fade*<3<*D' =1:Bhidden*o3>+B#style.visibility<*%(D ' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*"%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*"W%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*W%(+8+0+0 +!  0    l$ (  lr l S ,Bd`  B " l Z-Bp?"6@`NNN?NW >  >radio hardware" l ZL1Bp?"6@`NNN?NR )  = radio service" l Z/Bp?"6@`NNN?NC  @user applicationB l ZDp?"0@NNN?N \ ,$D 0B l@ ZDp?"0@NNN?N<L ,$D 0B  l  `Dp?"0@NNN?N \ B  l  `Dp?"0@NNN?N QQ\ B  l  `Dp?"0@NNN?NC   l Z:B p?"6@ NNN?N\ Gmessage reception l H>B "`0 LGoal: set hardware to lowest-power state consistent with application needs &LL l s *LBBS" |q<$@ 0 B H l 0޽h ? `\GGV~ .L___PPT10.*j+}D' = @B DE' = @BA?%,( < +O%,( < +Dh ' =%(D' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*l%(D' =-g6B fade*<3<*lDy' =%(D!' =4@BBBB%(D' =,54*3>Bfillcolor=@BPB<*lD' =1:B solid*a3>Bfill.type<*lD' =1:B true*]3>Bfill.on<*lD' =%(D+' =4@BB BB%(D' =1:Bvisible*o3>+B#style.visibility<*l%(D' =-g6B fade*<3<*lDy' =%(D!' =4@BBBB%(D' =,54*3>Bfillcolor=@BPB<*lD' =1:B solid*a3>Bfill.type<*lD' =1:B true*]3>Bfill.on<*lD ' =%(D' =%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*l%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*l!%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*l!N%(D' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*lN%(+8+0+l0 +OH  0  {  (  x  c $| Bd`  B "  Z\p?"6@ NNN?Nd c  3ADC"  ZBp?"6@`NNN?N?t < Light sensor  "  TLBp?"6@`NNN?Ngs : CSMA radio  "  Z$Bp?"6@`NNN?N g 7ArbiterB  TDp?"0@NNN?NZ} =,$D 0B   ZDp?"0@NNN?Nh ,$@ 0B   TDp?"0@NNN?N| n ,$@  0B   ZDp?"0@NNN?Nd ,$@  0  C *Aj0234131` { ,$D  0B  ZDp?"0@NNN?Nv{ E,$@ 0"  ZBp?"6@`NNN?N2D  = Power ManagerB  ZDp?"0@NNN?N ] ] e ,$D 0B  ZDp?"0@NNN?Nb ',$D 0H  0޽h ? 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TinyOS Execution Model$The Basics - TinyOS Execution Model$The Basics - TinyOS Execution ModelThe Basics - SummaryAdvanced NetworkingAdvanced Networking)Advanced Networking External Types&Advanced Networking Dissemination&Advanced Networking Dissemination"Dissemination How does it work?*Advanced Networking Starting Services#Advanced Networking - Collection#Advanced Networking - Collection#Advanced Networking - Collection'Networking: packet abstract data type 'Networking: packet abstract data type #Advanced Networking - CollectionBasic Networking Basic Networking - InterfacesBasic NetworkingBasic NetworkingBasic Networking'Basic Networking Buffer ManagementNetworking - SummaryNetworking Component Structure*Messaging: networking component structure*Messaging: networking component structureManaging PowerUsing Low-power ListeningPower Management effectsPower Management effectsPower Management effectsPower Management effects,For Experts: implementing device drivers A simple light sensorServices with Multiple ClientsServices with Multiple ClientsServices with Multiple ClientsServices with Multiple Clients A Fix: Parameterised InterfacesServices with multiple clientsServices with multiple clientsServices with Multiple ClientsServices with Multiple ClientsResource Management Resource Management (continued) Resource Management (continued) Resource Management (continued) Resource Management (continued) Resource Management (continued) Resource Management (continued) Resource Management (continued)'Resource management for A/D conversion'Resource management for A/D conversionPower ManagementPower ManagementPower Management with Arbiters$Resource & Power Management SummaryLow-level code and concurrencynesC support for concurrencyConcurrency exampleData Race DetectionData race fixedConcluding Remarks#Reflection Components vs Threads#Reflection Components vs ThreadsReflection Static Allocation%Reflection TinyOS Goals Revisited Reflection Status"Other OSes for Mote-class Devices+What we didnt see, Where to find out more Last Words Slide 92  Fonts UsedDesign TemplateEmbedded OLE Servers Slide Titles\ 8@ _PID_HLINKSA|!http://www.tinyos.net/dist-2.0.0!_= David GayDavid Gay  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~                           ! 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" # $ % & ' ( ) * + , - . / 0 1 2 3 4 5 6 7 8 9 : ; < = > ? @ A B C D E F G H I J K L M N O P Q R S T U V W X Y Z [ \ ] ^ _ ` a b c d e f g h i j k l m n o p q r s t u v w x y z { | } ~  !!!!!!!!! ! ! ! ! !!!!!!!!!!!!!!!!!!! !!!"!#!$!%!&!'!(!)!*!+!,!-!.!/!0!1!2!3!4!5!6!7!8!9!:!;!!?!@!A!B!C!D!E!F!G!H!I!J!K!L!M!N!O!P!Q!R!S!T!U!V!W!X!Y!Z![!\!]!^!_!`!a!b!c!d!e!f!g!h!i!j!k!l!m!n!o!p!q!r!s!t!u!v!w!x!y!z!{!|!}!~!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!""""""""" " " " " """"""""""""""""""" "!"""#"$"%"&"'"(")"*"+","-"."/"0"1"2"3"4"5"6"7"8"9":";"<"=">"?"@"A"B"C"D"E"F"G"H"I"J"K"L"M"N"O"P"Q"R"S"T"U"V"W"X"Y"Z"["\"]"^"_"`"a"b"c"d"e"f"g"h"i"j"k"l"m"n"o"p"q"r"s"t"u"v"w"x"y"z"{"|"}"~""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""######### # # # # ################### #!#"###$#%#&#'#(#)#*#+#,#-#.#/#0#1#2#3#4#5#6#7#8#9#:#;#<#=#>#?#@#A#B#C#D#E#F#G#H#I#J#K#L#M#N#O#P#Q#R#S#T#U#V#W#X#Y#Z#[#\#]#^#_#`#a#b#c#d#e#f#g#h#i#j#k#l#m#n#o#p#q#r#s#t#u#v#w#x#y#z#{#|#}#~##################################################################################################################################$$$$$$$$$ $ $ $ $ $$$$$$$$$$$$$$$$$$ $!$"$#$$$%$&$'$($)$*$+$,$-$.$/$0$1$2$3$4$5$6$7$8$9$;$<$=$>$?$@$A$C$D$E$F$G$H$I$$Root EntrydO)PicturesgE Current UserB$SummaryInformation($TPowerPoint Document(#=DocumentSummaryInformation8:$tinyos-2.1.2+dfsg/apps/BaseStation/000077500000000000000000000000001207233610700171405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/BaseStation/BaseStationC.nc000066400000000000000000000100551207233610700220020ustar00rootroot00000000000000// $Id: BaseStationC.nc,v 1.7 2010-06-29 22:07:13 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The TinyOS 2.x base station that forwards packets between the UART * and radio.It replaces the GenericBase of TinyOS 1.0 and the * TOSBase of TinyOS 1.1. * *

On the serial link, BaseStation sends and receives simple active * messages (not particular radio packets): on the radio link, it * sends radio active messages, whose format depends on the network * stack being used. BaseStation will copy its compiled-in group ID to * messages moving from the serial link to the radio, and will filter * out incoming radio messages that do not contain that group ID.

* *

BaseStation includes queues in both directions, with a guarantee * that once a message enters a queue, it will eventually leave on the * other interface. The queues allow the BaseStation to handle load * spikes.

* *

BaseStation acknowledges a message arriving over the serial link * only if that message was successfully enqueued for delivery to the * radio link.

* *

The LEDS are programmed to toggle as follows:

*
    *
  • RED Toggle:: Message bridged from serial to radio
    • *
  • GREEN Toggle: Message bridged from radio to serial
    • *
  • YELLOW/BLUE Toggle: Dropped message due to queue overflow in either direction
    • *
* * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay * @author Philip Levis * @date August 10 2005 */ configuration BaseStationC { } implementation { components MainC, BaseStationP, LedsC; components ActiveMessageC as Radio, SerialActiveMessageC as Serial; MainC.Boot <- BaseStationP; BaseStationP.RadioControl -> Radio; BaseStationP.SerialControl -> Serial; BaseStationP.UartSend -> Serial; BaseStationP.UartReceive -> Serial.Receive; BaseStationP.UartPacket -> Serial; BaseStationP.UartAMPacket -> Serial; BaseStationP.RadioSend -> Radio; BaseStationP.RadioReceive -> Radio.Receive; BaseStationP.RadioSnoop -> Radio.Snoop; BaseStationP.RadioPacket -> Radio; BaseStationP.RadioAMPacket -> Radio; BaseStationP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/BaseStation/BaseStationP.nc000066400000000000000000000176331207233610700220300ustar00rootroot00000000000000// $Id: BaseStationP.nc,v 1.12 2010-06-29 22:07:14 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay * Revision: $Id: BaseStationP.nc,v 1.12 2010-06-29 22:07:14 scipio Exp $ */ /* * BaseStationP bridges packets between a serial channel and the radio. * Messages moving from serial to radio will be tagged with the group * ID compiled into the BaseStation, and messages moving from radio to * serial will be filtered by that same group id. */ #include "AM.h" #include "Serial.h" module BaseStationP @safe() { uses { interface Boot; interface SplitControl as SerialControl; interface SplitControl as RadioControl; interface AMSend as UartSend[am_id_t id]; interface Receive as UartReceive[am_id_t id]; interface Packet as UartPacket; interface AMPacket as UartAMPacket; interface AMSend as RadioSend[am_id_t id]; interface Receive as RadioReceive[am_id_t id]; interface Receive as RadioSnoop[am_id_t id]; interface Packet as RadioPacket; interface AMPacket as RadioAMPacket; interface Leds; } } implementation { enum { UART_QUEUE_LEN = 12, RADIO_QUEUE_LEN = 12, }; message_t uartQueueBufs[UART_QUEUE_LEN]; message_t * ONE_NOK uartQueue[UART_QUEUE_LEN]; uint8_t uartIn, uartOut; bool uartBusy, uartFull; message_t radioQueueBufs[RADIO_QUEUE_LEN]; message_t * ONE_NOK radioQueue[RADIO_QUEUE_LEN]; uint8_t radioIn, radioOut; bool radioBusy, radioFull; task void uartSendTask(); task void radioSendTask(); void dropBlink() { call Leds.led2Toggle(); } void failBlink() { call Leds.led2Toggle(); } event void Boot.booted() { uint8_t i; for (i = 0; i < UART_QUEUE_LEN; i++) uartQueue[i] = &uartQueueBufs[i]; uartIn = uartOut = 0; uartBusy = FALSE; uartFull = TRUE; for (i = 0; i < RADIO_QUEUE_LEN; i++) radioQueue[i] = &radioQueueBufs[i]; radioIn = radioOut = 0; radioBusy = FALSE; radioFull = TRUE; if (call RadioControl.start() == EALREADY) radioFull = FALSE; if (call SerialControl.start() == EALREADY) uartFull = FALSE; } event void RadioControl.startDone(error_t error) { if (error == SUCCESS) { radioFull = FALSE; } } event void SerialControl.startDone(error_t error) { if (error == SUCCESS) { uartFull = FALSE; } } event void SerialControl.stopDone(error_t error) {} event void RadioControl.stopDone(error_t error) {} uint8_t count = 0; message_t* ONE receive(message_t* ONE msg, void* payload, uint8_t len); event message_t *RadioSnoop.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { return receive(msg, payload, len); } event message_t *RadioReceive.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { return receive(msg, payload, len); } message_t* receive(message_t *msg, void *payload, uint8_t len) { message_t *ret = msg; atomic { if (!uartFull) { ret = uartQueue[uartIn]; uartQueue[uartIn] = msg; uartIn = (uartIn + 1) % UART_QUEUE_LEN; if (uartIn == uartOut) uartFull = TRUE; if (!uartBusy) { post uartSendTask(); uartBusy = TRUE; } } else dropBlink(); } return ret; } uint8_t tmpLen; task void uartSendTask() { uint8_t len; am_id_t id; am_addr_t addr, src; message_t* msg; am_group_t grp; atomic if (uartIn == uartOut && !uartFull) { uartBusy = FALSE; return; } msg = uartQueue[uartOut]; tmpLen = len = call RadioPacket.payloadLength(msg); id = call RadioAMPacket.type(msg); addr = call RadioAMPacket.destination(msg); src = call RadioAMPacket.source(msg); grp = call RadioAMPacket.group(msg); call UartPacket.clear(msg); call UartAMPacket.setSource(msg, src); call UartAMPacket.setGroup(msg, grp); if (call UartSend.send[id](addr, uartQueue[uartOut], len) == SUCCESS) call Leds.led1Toggle(); else { failBlink(); post uartSendTask(); } } event void UartSend.sendDone[am_id_t id](message_t* msg, error_t error) { if (error != SUCCESS) failBlink(); else atomic if (msg == uartQueue[uartOut]) { if (++uartOut >= UART_QUEUE_LEN) uartOut = 0; if (uartFull) uartFull = FALSE; } post uartSendTask(); } event message_t *UartReceive.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { message_t *ret = msg; bool reflectToken = FALSE; atomic if (!radioFull) { reflectToken = TRUE; ret = radioQueue[radioIn]; radioQueue[radioIn] = msg; if (++radioIn >= RADIO_QUEUE_LEN) radioIn = 0; if (radioIn == radioOut) radioFull = TRUE; if (!radioBusy) { post radioSendTask(); radioBusy = TRUE; } } else dropBlink(); if (reflectToken) { //call UartTokenReceive.ReflectToken(Token); } return ret; } task void radioSendTask() { uint8_t len; am_id_t id; am_addr_t addr,source; message_t* msg; atomic if (radioIn == radioOut && !radioFull) { radioBusy = FALSE; return; } msg = radioQueue[radioOut]; len = call UartPacket.payloadLength(msg); addr = call UartAMPacket.destination(msg); source = call UartAMPacket.source(msg); id = call UartAMPacket.type(msg); call RadioPacket.clear(msg); call RadioAMPacket.setSource(msg, source); if (call RadioSend.send[id](addr, msg, len) == SUCCESS) call Leds.led0Toggle(); else { failBlink(); post radioSendTask(); } } event void RadioSend.sendDone[am_id_t id](message_t* msg, error_t error) { if (error != SUCCESS) failBlink(); else atomic if (msg == radioQueue[radioOut]) { if (++radioOut >= RADIO_QUEUE_LEN) radioOut = 0; if (radioFull) radioFull = FALSE; } post radioSendTask(); } } tinyos-2.1.2+dfsg/apps/BaseStation/Makefile000066400000000000000000000002331207233610700205760ustar00rootroot00000000000000COMPONENT=BaseStationC CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION CFLAGS += -DTASKLET_IS_TASK include $(MAKERULES) tinyos-2.1.2+dfsg/apps/BaseStation/README.txt000066400000000000000000000041771207233610700206470ustar00rootroot00000000000000README for BaseStation Author/Contact: tinyos-help@millennium.berkeley.edu Description: BaseStation is an application that acts as a simple Active Message bridge between the serial and radio links. It replaces the GenericBase of TinyOS 1.0 and the TOSBase of TinyOS 1.1. On the serial link, BaseStation sends and receives simple active messages (not particular radio packets): on the radio link, it sends radio active messages, whose format depends on the network stack being used. BaseStation will copy its compiled-in group ID to messages moving from the serial link to the radio, and will filter out incoming radio messages that do not contain that group ID. BaseStation includes queues in both directions, with a guarantee that once a message enters a queue, it will eventually leave on the other interface. The queues allow the BaseStation to handle load spikes more gracefully. BaseStation acknowledges a message arriving over the serial link only if that message was successfully enqueued for delivery to the radio link. The LEDS are programmed to toggle as follows: RED Toggle - Message bridged from serial to radio GREEN Toggle - Message bridged from radio to serial YELLOW/BLUE Toggle - Dropped message due to queue overflow in either direction When using a CC2420 radio, several default preprocessor configurations are defined in the Makefile: * CC2420_NO_ACKNOWLEDGEMENTS - Prevents the base station from falsly acknowledging packets * CC2420_NO_ADDRESS_RECOGNITION - Allows the base station to sniff packets from any transmitter Other combinations can be defined to meet your application's needs: * CC2420_NO_ADDRESS_RECOGNITION only - Sniff all packets, but acknowledge packets only if they are sent to the base station's address * Removing all preprocessor definitions in the Makefile - Only accept packets destined for the base station's address, and acknowledge those packets Tools: support/sdk/java/net/tinyos/sf/SerialForwarder See the TinyOS Tutorial on Mote-PC serial communication and SerialForwarder on docs.tinyos.net for more details. Known bugs/limitations: tinyos-2.1.2+dfsg/apps/BaseStation15.4/000077500000000000000000000000001207233610700174505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/BaseStation15.4/BaseStationC.nc000066400000000000000000000076301207233610700223170ustar00rootroot00000000000000// $Id: BaseStationC.nc,v 1.2 2010-06-29 22:07:14 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The TinyOS 2.x base station that forwards packets between the UART * and radio.It replaces the GenericBase of TinyOS 1.0 and the * TOSBase of TinyOS 1.1. * *

On the serial link, BaseStation sends and receives simple active * messages (not particular radio packets): on the radio link, it * sends radio active messages, whose format depends on the network * stack being used. BaseStation will copy its compiled-in group ID to * messages moving from the serial link to the radio, and will filter * out incoming radio messages that do not contain that group ID.

* *

BaseStation includes queues in both directions, with a guarantee * that once a message enters a queue, it will eventually leave on the * other interface. The queues allow the BaseStation to handle load * spikes.

* *

BaseStation acknowledges a message arriving over the serial link * only if that message was successfully enqueued for delivery to the * radio link.

* *

The LEDS are programmed to toggle as follows:

*
    *
  • RED Toggle:: Message bridged from serial to radio
    • *
  • GREEN Toggle: Message bridged from radio to serial
    • *
  • YELLOW/BLUE Toggle: Dropped message due to queue overflow in either direction
    • *
* * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay * @author Philip Levis * @date August 10 2005 */ configuration BaseStationC { } implementation { components MainC, BaseStationP, LedsC; components ActiveMessageC as Radio; components Serial802_15_4C as Serial; MainC.Boot <- BaseStationP; BaseStationP.RadioControl -> Radio; BaseStationP.SerialControl -> Serial; BaseStationP.UartSend -> Serial; BaseStationP.RadioReceive -> Radio.Receive; BaseStationP.RadioSnoop -> Radio.Snoop; BaseStationP.RadioPacket -> Radio; BaseStationP.RadioAMPacket -> Radio; BaseStationP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/BaseStation15.4/BaseStationP.nc000066400000000000000000000124711207233610700223330ustar00rootroot00000000000000// $Id: BaseStationP.nc,v 1.2 2010-06-29 22:07:14 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay * Revision: $Id: BaseStationP.nc,v 1.2 2010-06-29 22:07:14 scipio Exp $ */ /* * BaseStationP bridges packets between a serial channel and the radio. * Messages moving from serial to radio will be tagged with the group * ID compiled into the TOSBase, and messages moving from radio to * serial will be filtered by that same group id. */ #include "AM.h" #include "Serial.h" module BaseStationP { uses { interface Boot; interface SplitControl as SerialControl; interface SplitControl as RadioControl; interface Send as UartSend; interface Receive as RadioReceive[am_id_t id]; interface Receive as RadioSnoop[am_id_t id]; interface Packet as RadioPacket; interface AMPacket as RadioAMPacket; interface Leds; } } implementation { enum { UART_QUEUE_LEN = 12, RADIO_QUEUE_LEN = 12, }; message_t uartQueueBufs[UART_QUEUE_LEN]; message_t * ONE_NOK uartQueue[UART_QUEUE_LEN]; uint8_t uartIn, uartOut; bool uartBusy, uartFull; task void uartSendTask(); void dropBlink() { call Leds.led2Toggle(); } void failBlink() { call Leds.led2Toggle(); } event void Boot.booted() { uint8_t i; for (i = 0; i < UART_QUEUE_LEN; i++) uartQueue[i] = &uartQueueBufs[i]; uartIn = uartOut = 0; uartBusy = FALSE; uartFull = TRUE; call RadioControl.start(); call SerialControl.start(); } event void RadioControl.startDone(error_t error) { } event void SerialControl.startDone(error_t error) { if (error == SUCCESS) { uartFull = FALSE; } } event void SerialControl.stopDone(error_t error) {} event void RadioControl.stopDone(error_t error) {} uint8_t count = 0; message_t* ONE receive(message_t* ONE msg, void* payload, uint8_t len); event message_t *RadioSnoop.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { return receive(msg, payload, len); } event message_t *RadioReceive.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { return receive(msg, payload, len); } message_t* receive(message_t *msg, void *payload, uint8_t len) { message_t *ret = msg; atomic { if (!uartFull) { ret = uartQueue[uartIn]; uartQueue[uartIn] = msg; uartIn = (uartIn + 1) % UART_QUEUE_LEN; if (uartIn == uartOut) uartFull = TRUE; if (!uartBusy) { post uartSendTask(); uartBusy = TRUE; } } else dropBlink(); } return ret; } uint8_t tmpLen; task void uartSendTask() { uint8_t len; message_t* msg; atomic { if (uartIn == uartOut && !uartFull) { uartBusy = FALSE; return; } } msg = uartQueue[uartOut]; tmpLen = len = call RadioPacket.payloadLength(msg); if (call UartSend.send(uartQueue[uartOut], len) == SUCCESS) { call Leds.led1Toggle(); } else { failBlink(); post uartSendTask(); } } event void UartSend.sendDone(message_t* msg, error_t error) { if (error != SUCCESS) failBlink(); else atomic if (msg == uartQueue[uartOut]) { if (++uartOut >= UART_QUEUE_LEN) uartOut = 0; if (uartFull) uartFull = FALSE; } post uartSendTask(); } } tinyos-2.1.2+dfsg/apps/BaseStation15.4/Makefile000066400000000000000000000006641207233610700211160ustar00rootroot00000000000000COMPONENT=BaseStationC CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION BUILD_EXTRA_DEPS += seriallisten15-4 CLEAN_EXTRA = seriallisten15-4.o seriallisten15-4 seriallisten15-4: seriallisten15-4.o gcc -o $@ $< $(TOSDIR)/../support/sdk/c/sf/libmote.a seriallisten15-4.o: seriallisten15-4.c gcc -c -o $@ -I$(TOSDIR)/../support/sdk/c/sf -I$(TOSDIR)/lib/serial -I$(TOSDIR)/types $< include $(MAKERULES) tinyos-2.1.2+dfsg/apps/BaseStation15.4/seriallisten15-4.c000066400000000000000000000105041207233610700226210ustar00rootroot00000000000000#include #include #include #include "serialsource.h" static char *msgs[] = { "unknown_packet_type", "ack_timeout" , "sync" , "too_long" , "too_short" , "bad_sync" , "bad_crc" , "closed" , "no_memory" , "unix_error" }; void stderr_msg(serial_source_msg problem) { fprintf(stderr, "Note: %s\n", msgs[problem]); } enum { TOS_SERIAL_802_15_4_ID = 2, }; int main(int argc, char **argv) { serial_source src; int iframes = 0; if (argc != 4) { fprintf(stderr, "Usage: %s - dump packets from a serial port\n", argv[0]); exit(2); } if (strncmp(argv[1], "tframe", strlen("tframe")) == 0) { iframes = 0; } else if (strncmp(argv[1], "iframe", strlen("iframe")) == 0) { iframes = 1; } else { fprintf(stderr, "Usage: %s - dump packets from a serial port\n", argv[0]); exit(3); } src = open_serial_source(argv[2], platform_baud_rate(argv[3]), 0, stderr_msg); if (!src) { fprintf(stderr, "Couldn't open serial port at %s:%s\n", argv[2], argv[3]); exit(1); } for (;;) { int len, i, plen; short fcf; const unsigned char *packet = read_serial_packet(src, &len); int intraPan = 0; if (!packet) exit(0); else if (packet[0] != TOS_SERIAL_802_15_4_ID) { printf("bad packet (serial type is %02x, not %02x)\n", packet[0], TOS_SERIAL_802_15_4_ID); } plen = packet[1]; printf("Received packet of length %i: \n", plen); if (plen != len) { printf("Packet format error: read packet length (%hhx) is different than expected from frame (%hhx).\n", plen, len); } i = 2; // Read in FCF and i+=2 fcf = packet[i+1] << 8 | packet[i]; i += 2; { if ((fcf & 0x7) == 0x01) { printf(" Frame type: data\n"); } else if ((fcf & 0x7) == 0x02) { printf(" Frame type: acknowledgement\n"); } else { printf(" Frame type: other\n"); } printf(" Security: %s\n", (fcf & (1 << 3)) ? "enabled":"disabled"); printf(" Frame pending: %s\n", (fcf & (1 << 4)) ? "yes":"no"); printf(" Ack request: %s\n", (fcf & (1 << 5)) ? "yes":"no"); printf(" Intra-PAN: %s\n", (fcf & (1 << 6)) ? "yes":"no"); intraPan = (fcf & (1 << 6)); } { char seqno = packet[i++]; printf(" Sequence number: 0x%hhx\n", seqno); } { char addrLen = (fcf >> 10) & 0x3; short saddr = 0; long long laddr = 0; // 16- and 64-bit destinations have a PAN ID if (addrLen == 2 || addrLen == 3) { short destPan = packet[i++] << 8 | packet[i++]; printf(" Destination PAN: 0x%02hx\n", destPan); } switch (addrLen) { case 0: printf(" Destination address: none\n"); break; case 1: printf(" Destination address: invalid? (0x01)\n"); break; case 2: saddr = (packet[i] << 8 | packet[i+1]); i += 2; printf(" Destination address: 0x%04hx\n", saddr); break; case 3: { int j; for (j = 0; j < 8; j++) { laddr = laddr << 8; laddr |= packet[i++]; } printf(" Destination address: 0x%016llx\n", laddr); break; } default: printf(" Destination address: parse serror\n"); } } { char addrLen = (fcf >> 14) & 0x3; short saddr = 0; long long laddr = 0; if (!intraPan) { // Intra-PAN packet short srcPan = packet[i] << 8 | packet[i+1]; i += 2; printf(" Source PAN: 0x%02hx\n", srcPan); } switch (addrLen) { case 0: printf(" Source address: none\n"); break; case 1: printf(" Source address: invalid? (0x01)\n"); break; case 2: saddr = (packet[i] << 8 | packet[i + 1]); i += 2; printf(" Source address: 0x%04hx\n", saddr); break; case 3: { int j; for (j = 0; j < 8; j++) { laddr = laddr << 8; laddr |= packet[i++]; } printf(" Source address: 0x%016llx\n", laddr); break; } default: printf(" Source address: parse serror\n"); } } if (iframes) { printf(" I-Frame: %s\n", (packet[i++] == 0x3f)? "yes":"no"); } printf(" AM type: 0x%02hhx\n", packet[i++]); if (i >= plen) { printf("Packet format error: read packet is shorter than expected.\n"); } else { printf(" Payload: "); for (; i < plen; i++) { printf("0x%02hhx ", packet[i]); } printf("\n\n"); putchar('\n'); } free((void *)packet); } } tinyos-2.1.2+dfsg/apps/Blink/000077500000000000000000000000001207233610700157635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/Blink/BlinkAppC.nc000066400000000000000000000051321207233610700201110ustar00rootroot00000000000000// $Id: BlinkAppC.nc,v 1.6 2010-06-29 22:07:14 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Blink is a basic application that toggles a mote's LED periodically. * It does so by starting a Timer that fires every second. It uses the * OSKI TimerMilli service to achieve this goal. * * @author tinyos-help@millennium.berkeley.edu **/ configuration BlinkAppC { } implementation { components MainC, BlinkC, LedsC; components new TimerMilliC() as Timer0; components new TimerMilliC() as Timer1; components new TimerMilliC() as Timer2; BlinkC -> MainC.Boot; BlinkC.Timer0 -> Timer0; BlinkC.Timer1 -> Timer1; BlinkC.Timer2 -> Timer2; BlinkC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/Blink/BlinkC.nc000066400000000000000000000055541207233610700174600ustar00rootroot00000000000000// $Id: BlinkC.nc,v 1.6 2010-06-29 22:07:16 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation for Blink application. Toggle the red LED when a * Timer fires. **/ #include "Timer.h" module BlinkC @safe() { uses interface Timer as Timer0; uses interface Timer as Timer1; uses interface Timer as Timer2; uses interface Leds; uses interface Boot; } implementation { event void Boot.booted() { call Timer0.startPeriodic( 250 ); call Timer1.startPeriodic( 500 ); call Timer2.startPeriodic( 1000 ); } event void Timer0.fired() { dbg("BlinkC", "Timer 0 fired @ %s.\n", sim_time_string()); call Leds.led0Toggle(); } event void Timer1.fired() { dbg("BlinkC", "Timer 1 fired @ %s \n", sim_time_string()); call Leds.led1Toggle(); } event void Timer2.fired() { dbg("BlinkC", "Timer 2 fired @ %s.\n", sim_time_string()); call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/Blink/Makefile000066400000000000000000000000521207233610700174200ustar00rootroot00000000000000COMPONENT=BlinkAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/Blink/README.txt000066400000000000000000000012461207233610700174640ustar00rootroot00000000000000README for Blink Author/Contact: tinyos-help@millennium.berkeley.edu Description: Blink is a simple application that blinks the 3 mote LEDs. It tests that the boot sequence and millisecond timers are working properly. The three LEDs blink at 1Hz, 2Hz, and 4Hz. Because each is driven by an independent timer, visual inspection can determine whether there are bugs in the timer system that are causing drift. Note that this method is different than RadioCountToLeds, which fires a single timer at a steady rate and uses the bottom three bits of a counter to display on the LEDs. Tools: Known bugs/limitations: None. $Id: README.txt,v 1.4 2006-12-12 18:22:48 vlahan Exp $ tinyos-2.1.2+dfsg/apps/CoapBlip/000077500000000000000000000000001207233610700164155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/CoapBlip/CoapBlipC.nc000066400000000000000000000140731207233610700205400ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "StorageVolumes.h" #include #include "tinyos_coap_resources.h" configuration CoapBlipC { } implementation { components MainC; #ifdef SIM components BaseStationC; #endif components LedsC; components CoapBlipP; components LibCoapAdapterC; components IPStackC; CoapBlipP.Boot -> MainC; CoapBlipP.Leds -> LedsC; CoapBlipP.RadioControl -> IPStackC; CoapBlipP.Init <- MainC.SoftwareInit; #ifdef RPL_ROUTING components RPLRoutingC; #endif #ifdef COAP_SERVER_ENABLED components CoapUdpServerC; components new UdpSocketC() as UdpServerSocket; CoapBlipP.CoAPServer -> CoapUdpServerC; CoapUdpServerC.LibCoapServer -> LibCoapAdapterC.LibCoapServer; CoapUdpServerC.Init <- MainC.SoftwareInit; LibCoapAdapterC.UDPServer -> UdpServerSocket; #if defined (COAP_RESOURCE_TEMP) || defined (COAP_RESOURCE_HUM) || defined (COAP_RESOURCE_ALL) components new SensirionSht11C() as HumTempSensor; #endif #ifdef COAP_RESOURCE_TEMP components new CoapReadResourceC(uint16_t, KEY_TEMP) as CoapReadTempResource; components new CoapBufferTempTranslateC() as CoapBufferTempTranslate; CoapReadTempResource.Read -> CoapBufferTempTranslate.ReadTemp; CoapBufferTempTranslate.Read -> HumTempSensor.Temperature; CoapUdpServerC.ReadResource[KEY_TEMP] -> CoapReadTempResource.ReadResource; #endif #ifdef COAP_RESOURCE_HUM components new CoapReadResourceC(uint16_t, KEY_HUM) as CoapReadHumResource; components new CoapBufferHumTranslateC() as CoapBufferHumTranslate; CoapReadHumResource.Read -> CoapBufferHumTranslate.ReadHum; CoapBufferHumTranslate.Read -> HumTempSensor.Humidity; CoapUdpServerC.ReadResource[KEY_HUM] -> CoapReadHumResource.ReadResource; #endif #if defined (COAP_RESOURCE_VOLT) || defined (COAP_RESOURCE_ALL) components new VoltageC() as VoltSensor; #endif #ifdef COAP_RESOURCE_VOLT components new CoapReadResourceC(uint16_t, KEY_VOLT) as CoapReadVoltResource; components new CoapBufferVoltTranslateC() as CoapBufferVoltTranslate; CoapReadVoltResource.Read -> CoapBufferVoltTranslate.ReadVolt; CoapBufferVoltTranslate.Read -> VoltSensor.Read; CoapUdpServerC.ReadResource[KEY_VOLT] -> CoapReadVoltResource.ReadResource; #endif #ifdef COAP_RESOURCE_LED components new CoapLedResourceC(KEY_LED) as CoapLedResource; CoapLedResource.Leds -> LedsC; CoapUdpServerC.ReadResource[KEY_LED] -> CoapLedResource.ReadResource; CoapUdpServerC.WriteResource[KEY_LED] -> CoapLedResource.WriteResource; #endif #ifdef COAP_RESOURCE_ALL components new CoapReadResourceC(val_all_t, KEY_ALL) as CoapReadAllResource; components new SensirionSht11C() as HumTempSensorAll; components CoapResourceCollectorC; CoapReadAllResource.Read -> CoapResourceCollectorC.ReadAll; components new CoapBufferTempTranslateC() as CoapBufferTempTranslateAll; CoapResourceCollectorC.ReadTemp -> CoapBufferTempTranslateAll.ReadTemp; CoapBufferTempTranslateAll.Read -> HumTempSensorAll.Temperature; components new CoapBufferHumTranslateC() as CoapBufferHumTranslateAll; CoapResourceCollectorC.ReadHum -> CoapBufferHumTranslateAll.ReadHum; CoapBufferHumTranslateAll.Read -> HumTempSensorAll.Humidity; components new CoapBufferVoltTranslateC() as CoapBufferVoltTranslateAll; CoapResourceCollectorC.ReadVolt -> CoapBufferVoltTranslateAll.ReadVolt; CoapBufferVoltTranslateAll.Read -> VoltSensor.Read; CoapUdpServerC.ReadResource[KEY_ALL] -> CoapReadAllResource.ReadResource; #endif #ifdef COAP_RESOURCE_KEY components new CoapFlashResourceC(KEY_KEY) as CoapFlashResource; components new ConfigStorageC(VOLUME_CONFIGKEY); CoapFlashResource.ConfigStorage -> ConfigStorageC.ConfigStorage; CoapBlipP.Mount -> ConfigStorageC.Mount; CoapUdpServerC.ReadResource[KEY_KEY] -> CoapFlashResource.ReadResource; CoapUdpServerC.WriteResource[KEY_KEY] -> CoapFlashResource.WriteResource; #endif #ifdef COAP_RESOURCE_ROUTE components new CoapRouteResourceC(uint16_t, KEY_ROUTE) as CoapReadRouteResource; CoapReadRouteResource.ForwardingTable -> IPStackC; CoapUdpServerC.ReadResource[KEY_ROUTE] -> CoapReadRouteResource.ReadResource; #endif #endif #ifdef COAP_CLIENT_ENABLED components CoapUdpClientC; components new UdpSocketC() as UdpClientSocket; CoapBlipP.CoAPClient -> CoapUdpClientC; CoapUdpClientC.LibCoapClient -> LibCoapAdapterC.LibCoapClient; CoapUdpClientC.Init <- MainC.SoftwareInit; LibCoapAdapterC.UDPClient -> UdpClientSocket; CoapBlipP.ForwardingTableEvents -> IPStackC.ForwardingTableEvents; #endif #ifdef PRINTFUART_ENABLED components PrintfC; components SerialStartC; #endif } tinyos-2.1.2+dfsg/apps/CoapBlip/CoapBlipP.nc000066400000000000000000000101131207233610700205440ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include "blip_printf.h" #ifdef COAP_CLIENT_ENABLED #include "tinyos_net.h" #endif module CoapBlipP { uses { interface Boot; interface SplitControl as RadioControl; interface Leds; #ifdef COAP_SERVER_ENABLED interface CoAPServer; #ifdef COAP_RESOURCE_KEY interface Mount; #endif #endif #ifdef COAP_CLIENT_ENABLED interface CoAPClient; interface ForwardingTableEvents; #endif } provides interface Init; } implementation { #ifdef COAP_CLIENT_ENABLED uint8_t node_integrate_done = FALSE; #endif command error_t Init.init() { return SUCCESS; } event void Boot.booted() { #ifdef COAP_SERVER_ENABLED uint8_t i; #endif call RadioControl.start(); printf("booted %i start\n", TOS_NODE_ID); #ifdef COAP_SERVER_ENABLED #ifdef COAP_RESOURCE_KEY if (call Mount.mount() == SUCCESS) { printf("CoapBlipP.Mount successful\n"); } #endif // needs to be before registerResource to setup context: call CoAPServer.bind(COAP_SERVER_PORT); call CoAPServer.registerWellknownCore(); for (i=0; i < NUM_URIS; i++) { call CoAPServer.registerResource(uri_key_map[i].uri, uri_key_map[i].urilen - 1, uri_key_map[i].mediatype, uri_key_map[i].writable, uri_key_map[i].splitphase, uri_key_map[i].immediately); } #endif } #if defined (COAP_SERVER_ENABLED) && defined (COAP_RESOURCE_KEY) event void Mount.mountDone(error_t error) { } #endif event void RadioControl.startDone(error_t e) { printf("radio startDone: %i\n", TOS_NODE_ID); } event void RadioControl.stopDone(error_t e) { } #ifdef COAP_CLIENT_ENABLED event void ForwardingTableEvents.defaultRouteAdded() { struct sockaddr_in6 sa6; coap_list_t *optlist = NULL; if (node_integrate_done == FALSE) { node_integrate_done = TRUE; inet_pton6(COAP_CLIENT_DEST, &sa6.sin6_addr); sa6.sin6_port = htons(COAP_CLIENT_PORT); coap_insert( &optlist, new_option_node(COAP_OPTION_URI_PATH, sizeof("ni") - 1, "ni"), order_opts); call CoAPClient.request(&sa6, COAP_REQUEST_PUT, optlist, 0, NULL); } } event void ForwardingTableEvents.defaultRouteRemoved() { } event error_t CoAPClient.streamed_next_block (uint16_t blockno, uint16_t *len, void **data) { return FAIL; } event void CoAPClient.request_done(uint8_t code, uint8_t mediatype, uint16_t len, void *data, bool more) { //TODO: handle the request_done }; #endif } tinyos-2.1.2+dfsg/apps/CoapBlip/Makefile000066400000000000000000000043771207233610700200700ustar00rootroot00000000000000COMPONENT=CoapBlipC # uncomment this for network programming support # BOOTLOADER=tosboot #CFLAGS += -DCC2420_DEF_CHANNEL=21 #CFLAGS += -DRF230_DEF_CHANNEL=16 #CFLAGS += -DCC2420_DEF_RFPOWER=4 # Enable Low Power Listening #CFLAGS += -DLOW_POWER_LISTENING #CFLAGS += -DLPL_SLEEP_INTERVAL=512 # disables support for the AM stack, which somewhat reduces code size # and compresses packet formats. If you want to use other tinyos # protocols which are AM-based, you should not include this. #CFLAGS += -DIEEE154FRAMES_ENABLED # lib6lowpan contains inet_ntop6 and inet_pton6 to process ascii # representations of IPv6 addresses. You can remove them to save some # code if you don't use them # CFLAGS += -DNO_LIB6LOWPAN_ASCII # you can compile with or without a routing protocol... of course, # without it, you will only be able to use link-local communication. PFLAGS += -DRPL_ROUTING -DRPL_STORING_MODE -I$(LOWPAN_ROOT)/tos/lib/net/rpl #PFLAGS += -DRPL_OF_MRHOF -DRPL_ROOT_ADDR=1 # if you set this, the stack won't use dhcp to assign addresses -- it # will use this prefix combined with TOS_NODE_ID PFLAGS += -DIN6_PREFIX=\"fec0::\" # printf debugs. works only on telosb/tmote sky. # CFLAGS += -DNEW_PRINTF_SEMANTICS -DPRINTFUART_ENABLED # uncomment this line if you are having problems displaying the new printf semantics # CFLAGS += -DPRINTF_BUFFER_SIZE=1024 ################ CoAP Server ############################### CFLAGS += -DCOAP_SERVER_ENABLED # port where server is listening CFLAGS += -DCOAP_SERVER_PORT=61616L #set max uri length CFLAGS += -DMAX_URI_LENGTH=5 # set available resources. # Don't forget to change CFLAG: NUM_URIS!!!!! CFLAGS += -DNUM_URIS=1 #CFLAGS += -DCOAP_RESOURCE_TEMP #CFLAGS += -DCOAP_RESOURCE_HUM #CFLAGS += -DCOAP_RESOURCE_VOLT #CFLAGS += -DCOAP_RESOURCE_ALL #TEMP + HUM + VOLT #CFLAGS += -DCOAP_RESOURCE_KEY CFLAGS += -DCOAP_RESOURCE_LED #CFLAGS += -DCOAP_RESOURCE_ROUTE # timeout in milliseconds for sending PreACK CFLAGS += -DCOAP_PREACK_TIMEOUT=500 #CFLAGS += -DINCLUDE_WELLKNOWN ################ CoAP Client ################################ #CFLAGS += -DCOAP_CLIENT_ENABLED # client destination port CFLAGS += -DCOAP_CLIENT_PORT=61617L # client IPv6 destination address CFLAGS += -DCOAP_CLIENT_DEST=\"fec0::100\" CFLAGS += -I. include $(MAKERULES) tinyos-2.1.2+dfsg/apps/CoapBlip/README000066400000000000000000000004361207233610700173000ustar00rootroot00000000000000A CoAP application based on the TinyOS blip stack and libcoap. Prepare libcoap: $ cd ../../support/sdk/c/coap $ autoconf $ ./configure $ make To build, use the 'blip' make target extra $ make blip coap ... See http://docs.tinyos.net/index.php/CoAP for further steps... tinyos-2.1.2+dfsg/apps/CoapBlip/tinyos_coap_resources.h000066400000000000000000000073421207233610700232150ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _COAP_TINYOS_COAP_RESOURCES_H_ #define _COAP_TINYOS_COAP_RESOURCES_H_ #include #define SENSOR_VALUE_INVALID 0xFFFE #define SENSOR_NOT_AVAILABLE 0xFFFF //uri properties for uri<->key conversion typedef struct key_uri { uint8_t key; char uri[MAX_URI_LENGTH]; uint8_t urilen; uint8_t mediatype; uint8_t writable:1; uint8_t splitphase:1; uint8_t immediately:1; } key_uri_t; //user defined resources enum { #if defined (COAP_RESOURCE_TEMP) || defined (COAP_RESOURCE_ALL) KEY_TEMP, #endif #if defined (COAP_RESOURCE_HUM) || defined (COAP_RESOURCE_ALL) KEY_HUM, #endif #if defined (COAP_RESOURCE_VOLT) || defined (COAP_RESOURCE_ALL) KEY_VOLT, #endif #ifdef COAP_RESOURCE_KEY KEY_KEY, #endif #ifdef COAP_RESOURCE_LED KEY_LED, #endif #ifdef COAP_RESOURCE_ALL KEY_ALL, #endif #ifdef COAP_RESOURCE_ROUTE KEY_ROUTE, #endif COAP_NO_SUCH_RESOURCE = 0xff }; typedef nx_struct val_all { nx_uint8_t id_t:4; nx_uint8_t length_t:4; nx_uint16_t temp; nx_uint8_t id_h:4; nx_uint8_t length_h:4; nx_uint16_t hum; nx_uint8_t id_v:4; nx_uint8_t length_v:4; nx_uint16_t volt; } val_all_t; typedef nx_struct config_t { nx_uint8_t version; nx_uint8_t EUI64[8]; nx_uint8_t KEY128[16]; } config_t; key_uri_t uri_key_map[NUM_URIS] = { #ifdef COAP_RESOURCE_TEMP { KEY_TEMP, "st", sizeof("st"), COAP_MEDIATYPE_APPLICATION_OCTET_STREAM, 0, 1, 0}, #endif #ifdef COAP_RESOURCE_HUM { KEY_HUM, "sh", sizeof("sh") , COAP_MEDIATYPE_APPLICATION_OCTET_STREAM, 0, 1, 0}, #endif #ifdef COAP_RESOURCE_VOLT { KEY_VOLT, "sv", sizeof("sv") , COAP_MEDIATYPE_APPLICATION_OCTET_STREAM, 0, 1, 0}, #endif #ifdef COAP_RESOURCE_KEY { KEY_KEY, "ck", sizeof("ck") , COAP_MEDIATYPE_APPLICATION_OCTET_STREAM, 1, 1, 0}, #endif #ifdef COAP_RESOURCE_LED { KEY_LED, "l", sizeof("l") , COAP_MEDIATYPE_APPLICATION_OCTET_STREAM, 1, 1, 1}, #endif #ifdef COAP_RESOURCE_ALL { KEY_ALL, "r", sizeof("r") , COAP_MEDIATYPE_APPLICATION_OCTET_STREAM, 0, 1, 0}, #endif #ifdef COAP_RESOURCE_ROUTE { KEY_ROUTE, "rt", sizeof("rt") , COAP_MEDIATYPE_APPLICATION_OCTET_STREAM, 0, 1, 0}, #endif }; #endif tinyos-2.1.2+dfsg/apps/CoapBlip/volumes-at45db.xml000066400000000000000000000002351207233610700217120ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/CoapBlip/volumes-stm25p.xml000066400000000000000000000002351207233610700217610ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/MViz/000077500000000000000000000000001207233610700156115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/MViz/MViz.h000066400000000000000000000016751207233610700166600ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * @author David Gay * @author Kyle Jamieson * @author Phil Levis */ #ifndef MVIZ_H #define MVIZ_H #include "AM.h" enum { /* Default sampling period. */ DEFAULT_INTERVAL = 1024, AM_MVIZ_MSG = 0x93 }; typedef nx_struct mviz_msg { nx_uint16_t version; /* Version of the interval. */ nx_uint16_t interval; /* Samping period. */ nx_uint16_t origin; /* Mote id of sending mote. */ nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */ nx_uint16_t reading; nx_uint16_t etx; nx_uint16_t link_route_value; nx_am_addr_t link_route_addr; } mviz_msg_t; #endif tinyos-2.1.2+dfsg/apps/MViz/MVizAppC.nc000066400000000000000000000033131207233610700175640ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * MViz demo application using the collection layer. * See README.txt file in this directory and TEP 119: Collection. * * @author David Gay * @author Kyle Jamieson * @author Philip Levis */ #include configuration MVizAppC { } implementation { components MainC, MVizC, LedsC, new TimerMilliC(), new MVizSensorC() as Sensor, RandomC; //MainC.SoftwareInit -> Sensor; MVizC.Boot -> MainC; MVizC.Timer -> TimerMilliC; MVizC.Read -> Sensor; MVizC.Leds -> LedsC; MVizC.Random -> RandomC; // // Communication components. These are documented in TEP 113: // Serial Communication, and TEP 119: Collection. // components CollectionC as Collector, // Collection layer ActiveMessageC, // AM layer new CollectionSenderC(AM_MVIZ_MSG), // Sends multihop RF SerialActiveMessageC, // Serial messaging new SerialAMSenderC(AM_MVIZ_MSG); // Sends to the serial port components CtpP as Ctp; MVizC.RadioControl -> ActiveMessageC; MVizC.SerialControl -> SerialActiveMessageC; MVizC.RoutingControl -> Collector; MVizC.Send -> CollectionSenderC; MVizC.SerialSend -> SerialAMSenderC.AMSend; MVizC.Snoop -> Collector.Snoop[AM_MVIZ_MSG]; MVizC.Receive -> Collector.Receive[AM_MVIZ_MSG]; MVizC.RootControl -> Collector; MVizC.CtpInfo -> Ctp; MVizC.LinkEstimator -> Ctp; } tinyos-2.1.2+dfsg/apps/MViz/MVizC.nc000066400000000000000000000144101207233610700171230ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * MViz demo application using the collection layer. * See README.txt file in this directory and TEP 119: Collection. * * @author David Gay * @author Kyle Jamieson * @author Philip Levis */ #include "MViz.h" module MVizC @safe(){ uses { // Interfaces for initialization: interface Boot; interface SplitControl as RadioControl; interface SplitControl as SerialControl; interface StdControl as RoutingControl; // Interfaces for communication, multihop and serial: interface Send; interface Receive as Snoop; interface Receive; interface AMSend as SerialSend; interface CollectionPacket; interface RootControl; // Miscalleny: interface Timer; interface Read; interface Leds; interface CtpInfo; interface LinkEstimator; interface Random; } } implementation { task void uartSendTask(); static void startTimer(); static void fatal_problem(); static void report_problem(); static void report_sent(); static void report_received(); uint8_t uartlen; message_t sendbuf; message_t uartbuf; bool sendbusy=FALSE, uartbusy=FALSE; /* Current local state - interval, version and accumulated readings */ mviz_msg_t local; uint8_t reading; /* 0 to NREADINGS */ /* When we head an Oscilloscope message, we check it's sample count. If it's ahead of ours, we "jump" forwards (set our count to the received count). However, we must then suppress our next count increment. This is a very simple form of "time" synchronization (for an abstract notion of time). */ bool suppress_count_change; // // On bootup, initialize radio and serial communications, and our // own state variables. // event void Boot.booted() { local.interval = DEFAULT_INTERVAL; local.origin = TOS_NODE_ID; // Beginning our initialization phases: if (call RadioControl.start() != SUCCESS) fatal_problem(); if (call RoutingControl.start() != SUCCESS) fatal_problem(); } event void RadioControl.startDone(error_t error) { if (error != SUCCESS) fatal_problem(); if (sizeof(local) > call Send.maxPayloadLength()) fatal_problem(); if (call SerialControl.start() != SUCCESS) fatal_problem(); } event void SerialControl.startDone(error_t error) { if (error != SUCCESS) fatal_problem(); // This is how to set yourself as a root to the collection layer: if (local.origin % 500 == 0) call RootControl.setRoot(); startTimer(); } static void startTimer() { call Timer.startPeriodic(local.interval); reading = 0; } event void RadioControl.stopDone(error_t error) { } event void SerialControl.stopDone(error_t error) { } // // Only the root will receive messages from this interface; its job // is to forward them to the serial uart for processing on the pc // connected to the sensor network. // event message_t* Receive.receive(message_t* msg, void *payload, uint8_t len) { if (uartbusy == FALSE) { mviz_msg_t* in = (mviz_msg_t*)payload; mviz_msg_t* out = (mviz_msg_t*)call SerialSend.getPayload(&uartbuf, sizeof(mviz_msg_t)); if (out == NULL) { return msg; } else { memcpy(out, in, sizeof(mviz_msg_t)); } uartbusy = TRUE; uartlen = sizeof(mviz_msg_t); post uartSendTask(); } return msg; } task void uartSendTask() { if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) { uartbusy = FALSE; } } // // Overhearing other traffic in the network. // event message_t* Snoop.receive(message_t* msg, void* payload, uint8_t len) { mviz_msg_t *omsg = payload; report_received(); // If we receive a newer version, update our interval. if (omsg->version > local.version) { local.version = omsg->version; local.interval = omsg->interval; startTimer(); } // If we hear from a future count, jump ahead but suppress our own // change. if (omsg->count > local.count) { local.count = omsg->count; suppress_count_change = TRUE; } return msg; } /* At each sample period: - if local sample buffer is full, send accumulated samples - read next sample */ event void Timer.fired() { if (!sendbusy) { mviz_msg_t *o = (mviz_msg_t *)call Send.getPayload(&sendbuf, sizeof(mviz_msg_t)); if (o == NULL) { fatal_problem(); return; } memcpy(o, &local, sizeof(local)); if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS) sendbusy = TRUE; else report_problem(); } reading = 0; /* Part 2 of cheap "time sync": increment our count if we didn't jump ahead. */ if (!suppress_count_change) local.count++; suppress_count_change = FALSE; call Timer.stop(); call Timer.startPeriodic(local.interval); if (call Read.read() != SUCCESS) fatal_problem(); } event void Send.sendDone(message_t* msg, error_t error) { if (error == SUCCESS) report_sent(); else report_problem(); sendbusy = FALSE; } event void Read.readDone(error_t result, uint16_t data) { uint16_t val; if (result != SUCCESS) { data = 0xffff; report_problem(); } local.reading = data; call CtpInfo.getEtx(&val); local.etx = val; call CtpInfo.getParent(&val); local.link_route_addr = val; local.link_route_value = call LinkEstimator.getLinkQuality(local.link_route_addr); } event void LinkEstimator.evicted(am_addr_t addr){} event void SerialSend.sendDone(message_t *msg, error_t error) { uartbusy = FALSE; } // Use LEDs to report various status issues. static void fatal_problem() { call Leds.led0On(); call Leds.led1On(); call Leds.led2On(); call Timer.stop(); } static void report_problem() { call Leds.led0Toggle(); } static void report_sent() { call Leds.led1Toggle(); } static void report_received() { call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/MViz/MVizSensorC.nc000066400000000000000000000004001207233610700203070ustar00rootroot00000000000000/** * The default sensor for MViz is a simple sine wave. * * @author Philip Levis */ generic configuration MVizSensorC() { provides interface Read; } implementation { components new SineSensorC() as DemoChannel; Read = DemoChannel; } tinyos-2.1.2+dfsg/apps/MViz/Makefile000066400000000000000000000004541207233610700172540ustar00rootroot00000000000000COMPONENT=MVizAppC CFLAGS += -I$(TOSDIR)/lib/net/ -I$(TOSDIR)/lib/net/ctp -I$(TOSDIR)/lib/net/4bitle -I. BUILD_EXTRA_DEPS = MVizMsg.class MVizMsg.java: MViz.h mig -target=null -java-classname=MVizMsg java MViz.h mviz_msg -o $@ MVizMsg.class: MVizMsg.java javac MVizMsg.java include $(MAKERULES) tinyos-2.1.2+dfsg/apps/MViz/README.txt000066400000000000000000000030721207233610700173110ustar00rootroot00000000000000README for MViz Author/Contact: tinyos-help@millennium.berkeley.edu Description: MViz is a sample application for the MViz network visualization tool. The MViz application is a multihop collection network. Nodes whose (ID % 500) == 0 are collection roots. The application samples a platform's DemoSensorC and routes those values to the collection roots. The roots send the packets to the serial port, which the MViz java application then visualizes. To run this application, install the TinyOS application on several nodes, one of whom is a root. Then run the tos-mviz script with MVizMsg as a parameter: tos-mviz [-comm source] MVizMsg This will cause the MViz java tool to parse the fields of MVizMsg and make them displayable. As nodes send readings to the base station, they will be displayed in the GUI. By default, the TinyOS program uses an artificial demonstration sensor that just generates a sine wave (MVizSensorC). To change the sensor that the MViz application uses, change the wiring in MVizAppC to your sensor of choice. Tools: The Java application lives in support/sdk/java/net/tinyos/mviz. It is invoked by the tos-mviz script, which is part of a TinyOS tools distribution. The top-level Java class is net.tinyos.mviz.DDocument. To display a mote image, the tool looks for a mote.gif in either the local directory (default) or a directory specified with the -dir parameter. Known bugs/limitations: Under Ubuntu Linux, the MViz Java visualization can be painfully slow. Notes: MViz configures a mote whose TOS_NODE_ID modulo 500 is zero to be a collection root. tinyos-2.1.2+dfsg/apps/MViz/mote.gif000066400000000000000000000041351207233610700172470ustar00rootroot00000000000000GIF89a('!&).)*/$&*,/.52$./#-8313-'/5 =>(33:7<4$65'4: 98B9J>-4:A2+6AL;,:?);E&?=D;/:E%B:,>=#D63:A"C@/=B3=>2 SC0JH4IC$RHPC6SK=OO_N;QJ8TE+YNCMNAPK%^R*]LIOFASR5[QJSD2\W8ZVHUJ>XW=ZR2aK/aUFXKCYRJUVB[L*gTFYXmYQURQWM?_XUYJQ[Ks^;eUI_XN]W7jXDdUV[XHa_M_^:i^PaOObVS__f[KUbW5r_Hha\`WUd_Red`cRQha\c_\fVBqbfcVNmdRljXlZUldYkkXna_jk,hPrn^mgjj\dkglkXNzcL{i|hT\tmeqfctb[us`sronfmpbjs_kqgdtnhaXzvsnmjspEldxlxs`oekxmb{w_jzrlswhmxxZUtvszwixwom|vtzqj~}f~t~mYZrnv~zsex|}{j_s}gmtywois~|xzwyye|ā{ʿƷȿ!Created with The GIMP! ,(' H*I #&\HK&[Xa @Aq)8LŠ>@"B1x1C "~0‹&Ia`8|PRd "xEH- PK%J(*u`kPT(X ;TC!$2RNjJb4#LDQEd3p`&baHDBR~qH! }UXIX ~`EU,0` !Yub<6 2,7xW"\1c4P42qB,\AU!g .b %!POBH!Nq qLAb8ds0HrU"/E%H E& &x8ArmH@-a 6~# 4h`$A"X %,`b(@L@c7pG!K 1l<8" |#-J-D!X"&A 3" (`G b t A,~PQ±8ڣV<Ì$( (,X 1tDJmA 9~Y 6@}\0!1P#~"ܪJ! $A4" .tqD3T2! 1 o"`ARa{& : Sensor; MultihopOscilloscopeC.Boot -> MainC; MultihopOscilloscopeC.Timer -> TimerMilliC; MultihopOscilloscopeC.Read -> Sensor; MultihopOscilloscopeC.Leds -> LedsC; // // Communication components. These are documented in TEP 113: // Serial Communication, and TEP 119: Collection. // components CollectionC as Collector, // Collection layer ActiveMessageC, // AM layer new CollectionSenderC(AM_OSCILLOSCOPE), // Sends multihop RF SerialActiveMessageC, // Serial messaging new SerialAMSenderC(AM_OSCILLOSCOPE); // Sends to the serial port MultihopOscilloscopeC.RadioControl -> ActiveMessageC; MultihopOscilloscopeC.SerialControl -> SerialActiveMessageC; MultihopOscilloscopeC.RoutingControl -> Collector; MultihopOscilloscopeC.Send -> CollectionSenderC; MultihopOscilloscopeC.SerialSend -> SerialAMSenderC.AMSend; MultihopOscilloscopeC.Snoop -> Collector.Snoop[AM_OSCILLOSCOPE]; MultihopOscilloscopeC.Receive -> Collector.Receive[AM_OSCILLOSCOPE]; MultihopOscilloscopeC.RootControl -> Collector; components new PoolC(message_t, 10) as UARTMessagePoolP, new QueueC(message_t*, 10) as UARTQueueP; MultihopOscilloscopeC.UARTMessagePool -> UARTMessagePoolP; MultihopOscilloscopeC.UARTQueue -> UARTQueueP; components new PoolC(message_t, 20) as DebugMessagePool, new QueueC(message_t*, 20) as DebugSendQueue, new SerialAMSenderC(AM_CTP_DEBUG) as DebugSerialSender, UARTDebugSenderP as DebugSender; DebugSender.Boot -> MainC; DebugSender.UARTSend -> DebugSerialSender; DebugSender.MessagePool -> DebugMessagePool; DebugSender.SendQueue -> DebugSendQueue; Collector.CollectionDebug -> DebugSender; } tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/MultihopOscilloscopeC.nc000066400000000000000000000170451207233610700257200ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * MultihopOscilloscope demo application using the collection layer. * See README.txt file in this directory and TEP 119: Collection. * * @author David Gay * @author Kyle Jamieson */ #include "Timer.h" #include "MultihopOscilloscope.h" module MultihopOscilloscopeC @safe(){ uses { // Interfaces for initialization: interface Boot; interface SplitControl as RadioControl; interface SplitControl as SerialControl; interface StdControl as RoutingControl; // Interfaces for communication, multihop and serial: interface Send; interface Receive as Snoop; interface Receive; interface AMSend as SerialSend; interface CollectionPacket; interface RootControl; interface Queue as UARTQueue; interface Pool as UARTMessagePool; // Miscalleny: interface Timer; interface Read; interface Leds; } } implementation { task void uartSendTask(); static void startTimer(); static void fatal_problem(); static void report_problem(); static void report_sent(); static void report_received(); uint8_t uartlen; message_t sendbuf; message_t uartbuf; bool sendbusy=FALSE, uartbusy=FALSE; /* Current local state - interval, version and accumulated readings */ oscilloscope_t local; uint8_t reading; /* 0 to NREADINGS */ /* When we head an Oscilloscope message, we check it's sample count. If it's ahead of ours, we "jump" forwards (set our count to the received count). However, we must then suppress our next count increment. This is a very simple form of "time" synchronization (for an abstract notion of time). */ bool suppress_count_change; // // On bootup, initialize radio and serial communications, and our // own state variables. // event void Boot.booted() { local.interval = DEFAULT_INTERVAL; local.id = TOS_NODE_ID; local.version = 0; // Beginning our initialization phases: if (call RadioControl.start() != SUCCESS) fatal_problem(); if (call RoutingControl.start() != SUCCESS) fatal_problem(); } event void RadioControl.startDone(error_t error) { if (error != SUCCESS) fatal_problem(); if (sizeof(local) > call Send.maxPayloadLength()) fatal_problem(); if (call SerialControl.start() != SUCCESS) fatal_problem(); } event void SerialControl.startDone(error_t error) { if (error != SUCCESS) fatal_problem(); // This is how to set yourself as a root to the collection layer: if (local.id % 500 == 0) call RootControl.setRoot(); startTimer(); } static void startTimer() { if (call Timer.isRunning()) call Timer.stop(); call Timer.startPeriodic(local.interval); reading = 0; } event void RadioControl.stopDone(error_t error) { } event void SerialControl.stopDone(error_t error) { } // // Only the root will receive messages from this interface; its job // is to forward them to the serial uart for processing on the pc // connected to the sensor network. // event message_t* Receive.receive(message_t* msg, void *payload, uint8_t len) { oscilloscope_t* in = (oscilloscope_t*)payload; oscilloscope_t* out; if (uartbusy == FALSE) { out = (oscilloscope_t*)call SerialSend.getPayload(&uartbuf, sizeof(oscilloscope_t)); if (len != sizeof(oscilloscope_t) || out == NULL) { return msg; } else { memcpy(out, in, sizeof(oscilloscope_t)); } uartlen = sizeof(oscilloscope_t); post uartSendTask(); } else { // The UART is busy; queue up messages and service them when the // UART becomes free. message_t *newmsg = call UARTMessagePool.get(); if (newmsg == NULL) { // drop the message on the floor if we run out of queue space. report_problem(); return msg; } //Serial port busy, so enqueue. out = (oscilloscope_t*)call SerialSend.getPayload(newmsg, sizeof(oscilloscope_t)); if (out == NULL) { return msg; } memcpy(out, in, sizeof(oscilloscope_t)); if (call UARTQueue.enqueue(newmsg) != SUCCESS) { // drop the message on the floor and hang if we run out of // queue space without running out of queue space first (this // should not occur). call UARTMessagePool.put(newmsg); fatal_problem(); return msg; } } return msg; } task void uartSendTask() { if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) { report_problem(); } else { uartbusy = TRUE; } } event void SerialSend.sendDone(message_t *msg, error_t error) { uartbusy = FALSE; if (call UARTQueue.empty() == FALSE) { // We just finished a UART send, and the uart queue is // non-empty. Let's start a new one. message_t *queuemsg = call UARTQueue.dequeue(); if (queuemsg == NULL) { fatal_problem(); return; } memcpy(&uartbuf, queuemsg, sizeof(message_t)); if (call UARTMessagePool.put(queuemsg) != SUCCESS) { fatal_problem(); return; } post uartSendTask(); } } // // Overhearing other traffic in the network. // event message_t* Snoop.receive(message_t* msg, void* payload, uint8_t len) { oscilloscope_t *omsg = payload; report_received(); // If we receive a newer version, update our interval. if (omsg->version > local.version) { local.version = omsg->version; local.interval = omsg->interval; startTimer(); } // If we hear from a future count, jump ahead but suppress our own // change. if (omsg->count > local.count) { local.count = omsg->count; suppress_count_change = TRUE; } return msg; } /* At each sample period: - if local sample buffer is full, send accumulated samples - read next sample */ event void Timer.fired() { if (reading == NREADINGS) { if (!sendbusy) { oscilloscope_t *o = (oscilloscope_t *)call Send.getPayload(&sendbuf, sizeof(oscilloscope_t)); if (o == NULL) { fatal_problem(); return; } memcpy(o, &local, sizeof(local)); if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS) sendbusy = TRUE; else report_problem(); } reading = 0; /* Part 2 of cheap "time sync": increment our count if we didn't jump ahead. */ if (!suppress_count_change) local.count++; suppress_count_change = FALSE; } if (call Read.read() != SUCCESS) fatal_problem(); } event void Send.sendDone(message_t* msg, error_t error) { if (error == SUCCESS) report_sent(); else report_problem(); sendbusy = FALSE; } event void Read.readDone(error_t result, uint16_t data) { if (result != SUCCESS) { data = 0xffff; report_problem(); } if (reading < NREADINGS) local.readings[reading++] = data; } // Use LEDs to report various status issues. static void fatal_problem() { call Leds.led0On(); call Leds.led1On(); call Leds.led2On(); call Timer.stop(); } static void report_problem() { call Leds.led0Toggle(); } static void report_sent() { call Leds.led1Toggle(); } static void report_received() { call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/README.txt000066400000000000000000000027411207233610700226060ustar00rootroot00000000000000README for MultihopOscilloscope Author/Contact: tinyos-help@millennium.berkeley.edu Description: MultihopOscilloscope is a simple data-collection demo. It periodically samples the default sensor and broadcasts a message every few readings. These readings can be displayed by the Java "Oscilloscope" application found in the ./java subdirectory. The sampling rate starts at 1Hz, but can be changed from the Java application. You can compile MultihopOscilloscope with a sensor board's default sensor by compiling as follows: SENSORBOARD= make You can change the sensor used by editing MultihopOscilloscopeAppC.nc. Tools: The Java application displays readings it receives from motes running the MultihopOscilloscope demo via a serial forwarder. To run it, change to the ./java subdirectory and type: make java net.tinyos.sf.SerialForwarder -comm serial@: # e.g., java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2 # or java net.tinyos.sf.SerialForwarder -comm serial@COM2:telosb ./run The controls at the bottom of the screen allow you to zoom in or out the X axis, change the range of the Y axis, and clear all received data. You can change the color used to display a mote by clicking on its color in the mote table. Known bugs/limitations: None. See also: TEP 113: Serial Communications, TEP 119: Collection. Notes: MultihopOscilloscope configures a mote whose TOS_NODE_ID modulo 500 is zero to be a collection root. tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/000077500000000000000000000000001207233610700220255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/ColorCellEditor.java000066400000000000000000000034221207233610700257160ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import java.awt.*; import java.awt.event.*; /* Editor for table cells representing colors. Popup a color chooser. */ public class ColorCellEditor extends AbstractCellEditor implements TableCellEditor { private Color color; private JButton button; public ColorCellEditor(String title) { button = new JButton(); final JColorChooser chooser = new JColorChooser(); final JDialog dialog = JColorChooser.createDialog (button, title, true, chooser, new ActionListener() { public void actionPerformed(ActionEvent e) { color = chooser.getColor(); } }, null); button.setBorderPainted(false); button.addActionListener (new ActionListener () { public void actionPerformed(ActionEvent e) { button.setBackground(color); chooser.setColor(color); dialog.setVisible(true); fireEditingStopped(); } } ); } public Object getCellEditorValue() { return color; } public Component getTableCellEditorComponent(JTable table, Object value, boolean isSelected, int row, int column) { color = (Color)value; return button; } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/Data.java000066400000000000000000000042101207233610700235360ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import java.util.*; /* Hold all data received from motes */ class Data { /* The mote data is stored in a flat array indexed by a mote's identifier. A null value indicates no mote with that identifier. */ private Node[] nodes = new Node[256]; private Oscilloscope parent; Data(Oscilloscope parent) { this.parent = parent; } /* Data received from mote nodeId containing NREADINGS samples from messageId * NREADINGS onwards. Tell parent if this is a new node. */ void update(int nodeId, int messageId, int readings[]) { if (nodeId >= nodes.length) { int newLength = nodes.length * 2; if (nodeId >= newLength) newLength = nodeId + 1; Node newNodes[] = new Node[newLength]; System.arraycopy(nodes, 0, newNodes, 0, nodes.length); nodes = newNodes; } Node node = nodes[nodeId]; if (node == null) { nodes[nodeId] = node = new Node(nodeId); parent.newNode(nodeId); } node.update(messageId, readings); } /* Return value of sample x for mote nodeId, or -1 for missing data */ int getData(int nodeId, int x) { if (nodeId >= nodes.length || nodes[nodeId] == null) return -1; return nodes[nodeId].getData(x); } /* Return number of last known sample on mote nodeId. Returns 0 for unknown motes. */ int maxX(int nodeId) { if (nodeId >= nodes.length || nodes[nodeId] == null) return 0; return nodes[nodeId].maxX(); } /* Return number of largest known sample on all motes (0 if there are no motes) */ int maxX() { int max = 0; for (int i = 0; i < nodes.length; i++) if (nodes[i] != null) { int nmax = nodes[i].maxX(); if (nmax > max) max = nmax; } return max; } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/Graph.java000066400000000000000000000155651207233610700237450ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import java.awt.*; import java.awt.event.*; import java.awt.font.*; import java.awt.geom.*; import java.util.*; /* Panel for drawing mote-data graphs */ class Graph extends JPanel { final static int BORDER_LEFT = 40; final static int BORDER_RIGHT = 0; final static int BORDER_TOP = 10; final static int BORDER_BOTTOM = 10; final static int TICK_SPACING = 40; final static int MAX_TICKS = 16; final static int TICK_WIDTH = 10; final static int MIN_WIDTH = 50; int gx0, gx1, gy0, gy1; // graph bounds int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale Window parent; /* Graph to screen coordinate conversion support */ int height, width; double xscale, yscale; void updateConversion() { height = getHeight() - BORDER_TOP - BORDER_BOTTOM; width = getWidth() - BORDER_LEFT - BORDER_RIGHT; if (height < 1) height = 1; if (width < 1) width = 1; xscale = (double)width / (gx1 - gx0 + 1); yscale = (double)height / (gy1 - gy0 + 1); } Graphics makeClip(Graphics g) { return g.create(BORDER_LEFT, BORDER_TOP, width, height); } // Note that these do not include the border offset! int screenX(int gx) { return (int)(xscale * (gx - gx0) + 0.5); } int screenY(int gy) { return (int)(height - yscale * (gy - gy0)); } int graphX(int sx) { return (int)(sx / xscale + gx0 + 0.5); } Graph(Window parent) { this.parent = parent; gy0 = 0; gy1 = 0xffff; gx0 = 0; gx1 = MIN_WIDTH << scale; } void rightDrawString(Graphics2D g, String s, int x, int y) { TextLayout layout = new TextLayout(s, parent.smallFont, g.getFontRenderContext()); Rectangle2D bounds = layout.getBounds(); layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2); } protected void paintComponent(Graphics g) { Graphics2D g2d = (Graphics2D)g; /* Repaint. Synchronize on Oscilloscope to avoid data changing. Simply clear panel, draw Y axis and all the mote graphs. */ synchronized (parent.parent) { updateConversion(); g2d.setColor(Color.BLACK); g2d.fillRect(0, 0, getWidth(), getHeight()); drawYAxis(g2d); Graphics clipped = makeClip(g2d); int count = parent.moteListModel.size(); for (int i = 0; i < count; i++) { clipped.setColor(parent.moteListModel.getColor(i)); drawGraph(clipped, parent.moteListModel.get(i)); } } } /* Draw the Y-axis */ protected void drawYAxis(Graphics2D g) { int axis_x = BORDER_LEFT - 1; int height = getHeight() - BORDER_BOTTOM - BORDER_TOP; g.setColor(Color.WHITE); g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1); /* Draw a reasonable set of tick marks */ int nTicks = height / TICK_SPACING; if (nTicks > MAX_TICKS) nTicks = MAX_TICKS; int tickInterval = (gy1 - gy0 + 1) / nTicks; if (tickInterval == 0) tickInterval = 1; /* Tick interval should be of the family A * 10^B, where A = 1, 2 * or 5. We tend more to rounding A up, to reduce rather than increase the number of ticks. */ int B = (int)(Math.log(tickInterval) / Math.log(10)); int A = (int)(tickInterval / Math.pow(10, B) + 0.5); if (A > 2) A = 5; else if (A > 5) A = 10; tickInterval = A * (int)Math.pow(10, B); /* Ticks are printed at multiples of tickInterval */ int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval; while (tick <= gy1) { int stick = screenY(tick) + BORDER_TOP; rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick); g.drawLine(axis_x - TICK_WIDTH / 2, stick, axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick); tick += tickInterval; } } /* Draw graph for mote nodeId */ protected void drawGraph(Graphics g, int nodeId) { SingleGraph sg = new SingleGraph(g, nodeId); if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel for (int sx = 0; sx < width; sx++) sg.nextPoint(g, graphX(sx), sx); else // Less points than pixel-iterate by points for (int gx = gx0; gx <= gx1; gx++) sg.nextPoint(g, gx, screenX(gx)); } /* Inner class to simplify drawing a graph. Simplify initialise it, then feed it the X screen and graph coordinates, from left to right. */ private class SingleGraph { int lastsx, lastsy, nodeId; /* Start drawing the graph mote id */ SingleGraph(Graphics g, int id) { nodeId = id; lastsx = -1; lastsy = -1; } /* Next point in mote's graph is at x value gx, screen coordinate sx */ void nextPoint(Graphics g, int gx, int sx) { int gy = parent.parent.data.getData(nodeId, gx); int sy = -1; if (gy >= 0) { // Ignore missing values double rsy = height - yscale * (gy - gy0); // Ignore problem values if (rsy >= -1e6 && rsy <= 1e6) sy = (int)(rsy + 0.5); if (lastsy >= 0 && sy >= 0) g.drawLine(lastsx, lastsy, sx, sy); } lastsx = sx; lastsy = sy; } } /* Update X-axis range in GUI */ void updateXLabel() { parent.xLabel.setText("X: " + gx0 + " - " + gx1); } /* Ensure that graph is nicely positioned on screen. max is the largest sample number received from any mote. */ private void recenter(int max) { // New data will show up at the 3/4 point // The 2nd term ensures that gx1 will be >= max int scrollby = ((gx1 - gx0) >> 2) + (max - gx1); gx0 += scrollby; gx1 += scrollby; if (gx0 < 0) { // don't bother showing negative sample numbers gx1 -= gx0; gx0 = 0; } updateXLabel(); } /* New data received. Redraw graph, scrolling if necessary */ void newData() { int max = parent.parent.data.maxX(); if (max > gx1 || max < gx0) // time to scroll recenter(max); repaint(); } /* User set the X-axis scale to newScale */ void setScale(int newScale) { gx1 = gx0 + (MIN_WIDTH << newScale); scale = newScale; recenter(parent.parent.data.maxX()); repaint(); } /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus values (return false), or accept, redraw and return true. */ boolean setYAxis(int newy0, int newy1) { if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 || newy1 < 0 || newy1 > 65535) return false; gy0 = newy0; gy1 = newy1; repaint(); return true; } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/Makefile000066400000000000000000000010461207233610700234660ustar00rootroot00000000000000GEN=OscilloscopeMsg.java Constants.java all: oscilloscope.jar oscilloscope.jar: Oscilloscope.class jar cf $@ *.class OscilloscopeMsg.java: ../MultihopOscilloscope.h mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@ Constants.java: ../MultihopOscilloscope.h ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@ Oscilloscope.class: $(wildcard *.java) $(GEN) javac *.java clean: rm -f *.class $(GEN) veryclean: clean rm oscilloscope.jar tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/Node.java000066400000000000000000000066021207233610700235610ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Class holding all data received from a mote. */ class Node { /* Data is hold in an array whose size is a multiple of INCREMENT, and INCREMENT itself must be a multiple of Constant.NREADINGS. This simplifies handling the extension and clipping of old data (see setEnd) */ final static int INCREMENT = 100 * Constants.NREADINGS; final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT /* The mote's identifier */ int id; /* Data received from the mote. data[0] is the dataStart'th sample Indexes 0 through dataEnd - dataStart - 1 hold data. Samples are 16-bit unsigned numbers, -1 indicates missing data. */ int[] data; int dataStart, dataEnd; Node(int _id) { id = _id; } /* Update data to hold received samples newDataIndex .. newEnd. If we receive data with a lower index, we discard newer data (we assume the mote rebooted). */ private void setEnd(int newDataIndex, int newEnd) { if (newDataIndex < dataStart || data == null) { /* New data is before the start of what we have. Just throw it all away and start again */ dataStart = newDataIndex; data = new int[INCREMENT]; } if (newEnd > dataStart + data.length) { /* Try extending first */ if (data.length < MAX_SIZE) { int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT; if (newLength >= MAX_SIZE) newLength = MAX_SIZE; int[] newData = new int[newLength]; System.arraycopy(data, 0, newData, 0, data.length); data = newData; } if (newEnd > dataStart + data.length) { /* Still doesn't fit. Squish. We assume INCREMENT >= (newEnd - newDataIndex), and ensure that dataStart + data.length - INCREMENT = newDataIndex */ int newStart = newDataIndex + INCREMENT - data.length; if (dataStart + data.length > newStart) System.arraycopy(data, newStart - dataStart, data, 0, data.length - (newStart - dataStart)); dataStart = newStart; } } /* Mark any missing data as invalid */ for (int i = dataEnd < dataStart ? dataStart : dataEnd; i < newDataIndex; i++) data[i - dataStart] = -1; /* If we receive a count less than the old count, we assume the old data is invalid */ dataEnd = newEnd; } /* Data received containing NREADINGS samples from messageId * NREADINGS onwards */ void update(int messageId, int readings[]) { int start = messageId * Constants.NREADINGS; setEnd(start, start + Constants.NREADINGS); for (int i = 0; i < readings.length; i++) data[start - dataStart + i] = readings[i]; } /* Return value of sample x, or -1 for missing data */ int getData(int x) { if (x < dataStart || x >= dataEnd) return -1; else return data[x - dataStart]; } /* Return number of last known sample */ int maxX() { return dataEnd - 1; } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/Oscilloscope.java000066400000000000000000000100751207233610700253310ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import net.tinyos.message.*; import net.tinyos.util.*; import java.io.*; /* The "Oscilloscope" demo app. Displays graphs showing data received from the Oscilloscope mote application, and allows the user to: - zoom in or out on the X axis - set the scale on the Y axis - change the sampling period - change the color of each mote's graph - clear all data This application is in three parts: - the Node and Data objects store data received from the motes and support simple queries - the Window and Graph and miscellaneous support objects implement the GUI and graph drawing - the Oscilloscope object talks to the motes and coordinates the other objects Synchronization is handled through the Oscilloscope object. Any operation that reads or writes the mote data must be synchronized on Oscilloscope. Note that the messageReceived method below is synchronized, so no further synchronization is needed when updating state based on received messages. */ public class Oscilloscope implements MessageListener { MoteIF mote; Data data; Window window; /* The current sampling period. If we receive a message from a mote with a newer version, we update our interval. If we receive a message with an older version, we broadcast a message with the current interval and version. If the user changes the interval, we increment the version and broadcast the new interval and version. */ int interval = Constants.DEFAULT_INTERVAL; int version = -1; /* Main entry point */ void run() { data = new Data(this); window = new Window(this); window.setup(); mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(new OscilloscopeMsg(), this); } /* The data object has informed us that nodeId is a previously unknown mote. Update the GUI. */ void newNode(int nodeId) { window.newNode(nodeId); } synchronized public void messageReceived(int dest_addr, Message msg) { if (msg instanceof OscilloscopeMsg) { OscilloscopeMsg omsg = (OscilloscopeMsg)msg; /* Update interval and mote data */ periodUpdate(omsg.get_version(), omsg.get_interval()); data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings()); /* Inform the GUI that new data showed up */ window.newData(); } } /* A potentially new version and interval has been received from the mote */ void periodUpdate(int moteVersion, int moteInterval) { if (moteVersion > version) { /* It's new. Update our vision of the interval. */ version = moteVersion; interval = moteInterval; window.updateSamplePeriod(); } else if (moteVersion < version) { /* It's old. Update the mote's vision of the interval. */ sendInterval(); } } /* The user wants to set the interval to newPeriod. Refuse bogus values and return false, or accept the change, broadcast it, and return true */ synchronized boolean setInterval(int newPeriod) { if (newPeriod < 1 || newPeriod > 65535) return false; interval = newPeriod; version++; sendInterval(); return true; } /* Broadcast a version+interval message. */ void sendInterval() { OscilloscopeMsg omsg = new OscilloscopeMsg(); omsg.set_version(version); omsg.set_interval(interval); try { mote.send(MoteIF.TOS_BCAST_ADDR, omsg); } catch (IOException e) { window.error("Cannot send message to mote"); } } /* User wants to clear all data. */ void clear() { data = new Data(this); } public static void main(String[] args) { Oscilloscope me = new Oscilloscope(); me.run(); } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/Window.java000066400000000000000000000222221207233610700241370ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import javax.swing.event.*; import java.awt.*; import java.awt.event.*; import java.util.*; /* The main GUI object. Build the GUI and coordinate all user activities */ class Window { Oscilloscope parent; Graph graph; Font smallFont = new Font("Dialog", Font.PLAIN, 8); Font boldFont = new Font("Dialog", Font.BOLD, 12); Font normalFont = new Font("Dialog", Font.PLAIN, 12); MoteTableModel moteListModel; // GUI view of mote list JLabel xLabel; // Label displaying X axis range JTextField sampleText, yText; // inputs for sample period and Y axis range JFrame frame; Window(Oscilloscope parent) { this.parent = parent; } /* A model for the mote table, and general utility operations on the mote list */ class MoteTableModel extends AbstractTableModel { private ArrayList motes = new ArrayList(); private ArrayList colors = new ArrayList(); /* Initial mote colors cycle through this list. Add more colors if you want. */ private Color[] cycle = { Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA, Color.YELLOW, Color.GRAY, Color.YELLOW }; int cycleIndex; /* TableModel methods for achieving our table appearance */ public String getColumnName(int col) { if (col == 0) { return "Mote"; } else { return "Color"; } } public int getColumnCount() { return 2; } public synchronized int getRowCount() { return motes.size(); } public synchronized Object getValueAt(int row, int col) { if (col == 0) { return motes.get(row); } else { return colors.get(row); } } public Class getColumnClass(int col) { return getValueAt(0, col).getClass(); } public boolean isCellEditable(int row, int col) { return col == 1; } public synchronized void setValueAt(Object value, int row, int col) { colors.set(row, value); fireTableCellUpdated(row, col); graph.repaint(); } /* Return mote id of i'th mote */ int get(int i) { return ((Integer)motes.get(i)).intValue(); } /* Return color of i'th mote */ Color getColor(int i) { return (Color)colors.get(i); } /* Return number of motes */ int size() { return motes.size(); } /* Add a new mote */ synchronized void newNode(int nodeId) { /* Shock, horror. No binary search. */ int i, len = motes.size(); for (i = 0; ; i++) if (i == len || nodeId < get(i)) { motes.add(i, new Integer(nodeId)); // Cycle through a set of initial colors colors.add(i, cycle[cycleIndex++ % cycle.length]); break; } fireTableRowsInserted(i, i); } /* Remove all motes */ void clear() { motes = new ArrayList(); colors = new ArrayList(); fireTableDataChanged(); } } /* A simple full-color cell */ static class MoteColor extends JLabel implements TableCellRenderer { public MoteColor() { setOpaque(true); } public Component getTableCellRendererComponent (JTable table, Object color, boolean isSelected, boolean hasFocus, int row, int column) { setBackground((Color)color); return this; } } /* Convenience methods for making buttons, labels and textfields. Simplifies code and ensures a consistent style. */ JButton makeButton(String label, ActionListener action) { JButton button = new JButton(); button.setText(label); button.setFont(boldFont); button.addActionListener(action); return button; } JLabel makeLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(boldFont); return label; } JLabel makeSmallLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(smallFont); return label; } JTextField makeTextField(int columns, ActionListener action) { JTextField tf = new JTextField(columns); tf.setFont(normalFont); tf.setMaximumSize(tf.getPreferredSize()); tf.addActionListener(action); return tf; } /* Build the GUI */ void setup() { JPanel main = new JPanel(new BorderLayout()); main.setMinimumSize(new Dimension(500, 250)); main.setPreferredSize(new Dimension(800, 400)); // Three panels: mote list, graph, controls moteListModel = new MoteTableModel(); JTable moteList = new JTable(moteListModel); moteList.setDefaultRenderer(Color.class, new MoteColor()); moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color")); moteList.setPreferredScrollableViewportSize(new Dimension(100, 400)); JScrollPane motePanel = new JScrollPane(); motePanel.getViewport().add(moteList, null); main.add(motePanel, BorderLayout.WEST); graph = new Graph(this); main.add(graph, BorderLayout.CENTER); // Controls. Organised using box layouts. // Sample period. JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT); sampleText = makeTextField(6, new ActionListener() { public void actionPerformed(ActionEvent e) { setSamplePeriod(); } } ); updateSamplePeriod(); // Clear data. JButton clearButton = makeButton("Clear data", new ActionListener() { public void actionPerformed(ActionEvent e) { clearData(); } } ); // Adjust X-axis zoom. Box xControl = new Box(BoxLayout.Y_AXIS); xLabel = makeLabel("", JLabel.CENTER); final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale); Hashtable xTable = new Hashtable(); for (int i = 0; i <= 8; i += 2) xTable.put(new Integer(i), makeSmallLabel("" + (Graph.MIN_WIDTH << i), JLabel.CENTER)); xSlider.setLabelTable(xTable); xSlider.setPaintLabels(true); graph.updateXLabel(); graph.setScale(graph.scale); xSlider.addChangeListener(new ChangeListener() { public void stateChanged(ChangeEvent e) { //if (!xSlider.getValueIsAdjusting()) graph.setScale((int)xSlider.getValue()); } }); xControl.add(xLabel); xControl.add(xSlider); // Adjust Y-axis range. JLabel yLabel = makeLabel("Y:", JLabel.RIGHT); yText = makeTextField(12, new ActionListener() { public void actionPerformed(ActionEvent e) { setYAxis(); } } ); yText.setText(graph.gy0 + " - " + graph.gy1); Box controls = new Box(BoxLayout.X_AXIS); controls.add(clearButton); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(sampleLabel); controls.add(sampleText); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(xControl); controls.add(yLabel); controls.add(yText); main.add(controls, BorderLayout.SOUTH); // The frame part frame = new JFrame("Oscilloscope"); frame.setSize(main.getPreferredSize()); frame.getContentPane().add(main); frame.setVisible(true); frame.addWindowListener(new WindowAdapter() { public void windowClosing(WindowEvent e) { System.exit(0); } }); } /* User operation: clear data */ void clearData() { synchronized (parent) { moteListModel.clear(); parent.clear(); graph.newData(); } } /* User operation: set Y-axis range. */ void setYAxis() { String val = yText.getText(); try { int dash = val.indexOf('-'); if (dash >= 0) { String min = val.substring(0, dash).trim(); String max = val.substring(dash + 1).trim(); if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max))) error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)"); return; } } catch (NumberFormatException e) { } error("Invalid range " + val + " (expected NN-MM)"); } /* User operation: set sample period. */ void setSamplePeriod() { String periodS = sampleText.getText().trim(); try { int newPeriod = Integer.parseInt(periodS); if (parent.setInterval(newPeriod)) { return; } } catch (NumberFormatException e) { } error("Invalid sample period " + periodS); } /* Notification: sample period changed. */ void updateSamplePeriod() { sampleText.setText("" + parent.interval); } /* Notification: new node. */ void newNode(int nodeId) { moteListModel.newNode(nodeId); } /* Notification: new data. */ void newData() { graph.newData(); } void error(String msg) { JOptionPane.showMessageDialog(frame, msg, "Error", JOptionPane.ERROR_MESSAGE); } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/build.xml000066400000000000000000000006201207233610700236440ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/MultihopOscilloscope/java/oscilloscope.jar000066400000000000000000000451041207233610700252250ustar00rootroot00000000000000PK 6 META-INF/PK 6--META-INF/MANIFEST.MFManifest-Version: 1.0 Created-By: 0.92-gcc PK 6[yColorCellEditor$1.class}RmOA~=NZ***J8`iו.9v22.FH/y}f !ܩN̅ǽ X aj$V:49a+FkR( BuCiUJء*Z넙y̲%V^*&!Dӡ05I2(*?䀰{DD+tn<dGnF" (B <j=#ZL,u?H&x]ZBTavTc7l&wB#n_}rml4W,Z֟6P,C xIp>5IӨ]gm2 ᨚaYXd?E\`C?D?pEUMnsY6|PK 6´I<ColorCellEditor$2.class}TkOA=CK(@,J؂oAP &FM05۲apIv?D2Rν39_x/p˄ 6n 6J1ʦZ`c;RT"bڞCx*Tq5л%һBˀ6C0r ӻ2)Uk-* a˭HU dtUΐ`d$^7EMT[Th0'DM3N-ՌBBAc+s b"r} 8⑅OL^XSUё_F$"aHu>4xG5h3@Hb q.yɮ7VbpRAA;01'BX5#raiG/N-6NDe"S߳·KF:&t`ȸIߐ>?Qh,̝=B;w;WkQQO8A'oVâQQ6{V>#E7):"frP&ұTMSiu_*PK 6#ColorCellEditor.classUiOQ= T((ȢN(kh!o2% IIQŮ@wϹ˜' VE\UtbBAJEXIS*0+7cOTDTn)x `N #g)X2ғfh =٧wl;7K[Y%)@/ oұMPsew?y:wBa%o 4 cU4r{eb}XqۂaA-ΏL7lŪ[,j&i=_ɕLqRmm˅eVM265_@$D 8 ܴu7-P7C䫖{w]Ą0 Ы=$%CĶ8'EǦ6w3'_jXĒ eȊUbY;*RR]8`uE9O)TGNM$Ǐb6sp A]/u f|2 +h+ ЩESX_[ È~]W['I &%ަZ"/"?GxSΡЯַo$BsmœE;nKg x7~)Z)(crS^ʘf1$(k0hb6ZF_8EPPt POG>lAD'OsD(ybceȕEU p9!%,8u_*] PK 64MP!Constants.class=jP5jݸpv/P Q!ʍ^J$M^]\}@;3s߿ } :&&zu[T]2P$4xBh/s mhA==ĄvZ!,m=E5gtRc*S>CwbHh1 q|E`:Ap5-@j0bZ|BS&p ]=@/&V3Ra+:؂Ú֧HToaև98BG6Q6LCglAh׿`jU4ӟXV+O$A|JVxBǿʤAzbM@yuއHk̓'b#x̸|sPK 6GX,  Graph.classW |[e77֬k6t8؀4i1G>tkn.,MjvPQQn y< (*|36g~;|;;;|>,p8hƕZkpxQ|uaX?/Zp?.`8rD'<7z17yQO ً[pO i ܁ϊ>' KDvy{|A)2W}QV|ɋ{ecW4|Ջz\}2/4"Q!!u7qЋo|؃GcB'4#lMK b4%Z3g#3v`^pV౵5b7<=ӹ9-f-eF;iEP2t`vBmmj?&ۓH&ٞtIӊMd.-kZN;zPԌiBղ3sȜڗΙD6cFj6c=A4nҥ0a'K|ym_!L{5K ?j٢\F?OnNnk,þN &۠\(?2`IB C "3JH+lIBnp|<6ʵTxk0 !<":,U N1>k2þ+fHS/uY,ë^b-69z{';϶Zre]+ހȶcV., gd#=%M.ӇpPh?Q£*2D]!",:fFUX$7mBi:ZÌpoPP,k V"@O݌d ? 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If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * @author David Gay * @author Kyle Jamieson */ #ifndef MULTIHOP_OSCILLOSCOPE_H #define MULTIHOP_OSCILLOSCOPE_H enum { /* Number of readings per message. If you increase this, you may have to increase the message_t size. */ NREADINGS = 5, /* Default sampling period. */ DEFAULT_INTERVAL = 1024, AM_OSCILLOSCOPE = 0x93 }; typedef nx_struct oscilloscope { nx_uint16_t version; /* Version of the interval. */ nx_uint16_t interval; /* Samping period. */ nx_uint16_t id; /* Mote id of sending mote. */ nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */ nx_uint16_t readings[NREADINGS]; } oscilloscope_t; #endif tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/MultihopOscilloscopeAppC.nc000066400000000000000000000046451207233610700270310ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * MultihopOscilloscope demo application using the collection layer. * See README.txt file in this directory and TEP 119: Collection. * * @author David Gay * @author Kyle Jamieson */ configuration MultihopOscilloscopeAppC { } implementation { components MainC, MultihopOscilloscopeC, LedsC, new TimerMilliC(), new DemoSensorC() as Sensor; //MainC.SoftwareInit -> Sensor; MultihopOscilloscopeC.Boot -> MainC; MultihopOscilloscopeC.Timer -> TimerMilliC; MultihopOscilloscopeC.Read -> Sensor; MultihopOscilloscopeC.Leds -> LedsC; // // Communication components. These are documented in TEP 113: // Serial Communication, and TEP 119: Collection. // components CollectionC as Collector, // Collection layer ActiveMessageC, // AM layer new CollectionSenderC(AM_OSCILLOSCOPE), // Sends multihop RF SerialActiveMessageC, // Serial messaging new SerialAMSenderC(AM_OSCILLOSCOPE); // Sends to the serial port MultihopOscilloscopeC.RadioControl -> ActiveMessageC; MultihopOscilloscopeC.SerialControl -> SerialActiveMessageC; MultihopOscilloscopeC.RoutingControl -> Collector; MultihopOscilloscopeC.Send -> CollectionSenderC; MultihopOscilloscopeC.SerialSend -> SerialAMSenderC.AMSend; MultihopOscilloscopeC.Snoop -> Collector.Snoop[AM_OSCILLOSCOPE]; MultihopOscilloscopeC.Receive -> Collector.Receive[AM_OSCILLOSCOPE]; MultihopOscilloscopeC.RootControl -> Collector; components new PoolC(message_t, 10) as UARTMessagePoolP, new QueueC(message_t*, 10) as UARTQueueP; MultihopOscilloscopeC.UARTMessagePool -> UARTMessagePoolP; MultihopOscilloscopeC.UARTQueue -> UARTQueueP; components new PoolC(message_t, 20) as DebugMessagePool, new QueueC(message_t*, 20) as DebugSendQueue, new SerialAMSenderC(AM_LQI_DEBUG) as DebugSerialSender, UARTDebugSenderP as DebugSender; DebugSender.Boot -> MainC; DebugSender.UARTSend -> DebugSerialSender; DebugSender.MessagePool -> DebugMessagePool; DebugSender.SendQueue -> DebugSendQueue; Collector.CollectionDebug -> DebugSender; } tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/MultihopOscilloscopeC.nc000066400000000000000000000170541207233610700263660ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * MultihopOscilloscope demo application using the collection layer. * See README.txt file in this directory and TEP 119: Collection. * * @author David Gay * @author Kyle Jamieson */ #include "Timer.h" #include "MultihopOscilloscope.h" module MultihopOscilloscopeC { uses { // Interfaces for initialization: interface Boot; interface SplitControl as RadioControl; interface SplitControl as SerialControl; interface StdControl as RoutingControl; // Interfaces for communication, multihop and serial: interface Send; interface Receive as Snoop; interface Receive; interface AMSend as SerialSend; interface CollectionPacket; interface RootControl; interface Queue as UARTQueue; interface Pool as UARTMessagePool; // Miscalleny: interface Timer; interface Read; interface Leds; } } implementation { task void uartSendTask(); static void startTimer(); static void fatal_problem(); static void report_problem(); static void report_sent(); static void report_received(); uint8_t uartlen; message_t sendbuf; message_t uartbuf; bool sendbusy=FALSE, uartbusy=FALSE; /* Current local state - interval, version and accumulated readings */ oscilloscope_t local; uint8_t reading; /* 0 to NREADINGS */ /* When we head an Oscilloscope message, we check it's sample count. If it's ahead of ours, we "jump" forwards (set our count to the received count). However, we must then suppress our next count increment. This is a very simple form of "time" synchronization (for an abstract notion of time). */ bool suppress_count_change; // // On bootup, initialize radio and serial communications, and our // own state variables. // event void Boot.booted() { local.interval = DEFAULT_INTERVAL; local.id = TOS_NODE_ID; local.version = 0; // Beginning our initialization phases: if (call RadioControl.start() != SUCCESS) fatal_problem(); if (call RoutingControl.start() != SUCCESS) fatal_problem(); } event void RadioControl.startDone(error_t error) { if (error != SUCCESS) fatal_problem(); if (sizeof(local) > call Send.maxPayloadLength()) fatal_problem(); if (call SerialControl.start() != SUCCESS) fatal_problem(); } event void SerialControl.startDone(error_t error) { if (error != SUCCESS) fatal_problem(); // This is how to set yourself as a root to the collection layer: if (local.id % 500 == 0) call RootControl.setRoot(); startTimer(); } static void startTimer() { if (call Timer.isRunning()) call Timer.stop(); call Timer.startPeriodic(local.interval); reading = 0; } event void RadioControl.stopDone(error_t error) { } event void SerialControl.stopDone(error_t error) { } // // Only the root will receive messages from this interface; its job // is to forward them to the serial uart for processing on the pc // connected to the sensor network. // event message_t* Receive.receive(message_t* msg, void *payload, uint8_t len) { oscilloscope_t* in = (oscilloscope_t*)payload; oscilloscope_t* out; if (uartbusy == FALSE) { out = (oscilloscope_t*)call SerialSend.getPayload(&uartbuf, sizeof(oscilloscope_t)); if (out == NULL) { fatal_problem(); return msg; } else { memcpy(out, in, sizeof(oscilloscope_t)); } uartlen = sizeof(oscilloscope_t); post uartSendTask(); } else { // The UART is busy; queue up messages and service them when the // UART becomes free. message_t *newmsg = call UARTMessagePool.get(); if (newmsg == NULL) { // drop the message on the floor if we run out of queue space. report_problem(); return msg; } //Prepare message to be sent over the uart out = (oscilloscope_t*)call SerialSend.getPayload(newmsg, sizeof(oscilloscope_t)); if (out == NULL) { fatal_problem(); return msg; } memcpy(out, in, sizeof(oscilloscope_t)); if (call UARTQueue.enqueue(newmsg) != SUCCESS) { // drop the message on the floor and hang if we run out of // queue space without running out of queue space first (this // should not occur). call UARTMessagePool.put(newmsg); fatal_problem(); return msg; } } return msg; } task void uartSendTask() { if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) { report_problem(); } else { uartbusy = TRUE; } } event void SerialSend.sendDone(message_t *msg, error_t error) { uartbusy = FALSE; if (call UARTQueue.empty() == FALSE) { // We just finished a UART send, and the uart queue is // non-empty. Let's start a new one. message_t *queuemsg = call UARTQueue.dequeue(); if (queuemsg == NULL) { fatal_problem(); return; } memcpy(&uartbuf, queuemsg, sizeof(message_t)); if (call UARTMessagePool.put(queuemsg) != SUCCESS) { fatal_problem(); return; } post uartSendTask(); } } // // Overhearing other traffic in the network. // event message_t* Snoop.receive(message_t* msg, void* payload, uint8_t len) { oscilloscope_t *omsg = payload; report_received(); // If we receive a newer version, update our interval. if (omsg->version > local.version) { local.version = omsg->version; local.interval = omsg->interval; startTimer(); } // If we hear from a future count, jump ahead but suppress our own // change. if (omsg->count > local.count) { local.count = omsg->count; suppress_count_change = TRUE; } return msg; } /* At each sample period: - if local sample buffer is full, send accumulated samples - read next sample */ event void Timer.fired() { if (reading == NREADINGS) { if (!sendbusy) { oscilloscope_t *o = (oscilloscope_t *)call Send.getPayload(&sendbuf, sizeof(oscilloscope_t)); if (o == NULL) { fatal_problem(); return; } memcpy(o, &local, sizeof(local)); if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS) sendbusy = TRUE; else report_problem(); } reading = 0; /* Part 2 of cheap "time sync": increment our count if we didn't jump ahead. */ if (!suppress_count_change) local.count++; suppress_count_change = FALSE; } if (call Read.read() != SUCCESS) fatal_problem(); } event void Send.sendDone(message_t* msg, error_t error) { if (error == SUCCESS) report_sent(); else report_problem(); sendbusy = FALSE; } event void Read.readDone(error_t result, uint16_t data) { if (result != SUCCESS) { data = 0xffff; report_problem(); } if (reading < NREADINGS) local.readings[reading++] = data; } // Use LEDs to report various status issues. static void fatal_problem() { call Leds.led0On(); call Leds.led1On(); call Leds.led2On(); call Timer.stop(); } static void report_problem() { call Leds.led0Toggle(); } static void report_sent() { call Leds.led1Toggle(); } static void report_received() { call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/README.txt000066400000000000000000000033061207233610700232520ustar00rootroot00000000000000README for MultihopOscilloscopeLqi Author/Contact: tinyos-help@millennium.berkeley.edu Description: MultihopOscilloscope is a simple data-collection demo. This variant, MultihopOscilloscopeLqi, works only on platforms that have the CC2420. Rather than use CTP, it uses MultihopLqi (lib/net/lqi), which is much lighter weight but not quite as efficient or reliable. The application periodically samples the default sensor and broadcasts a message every few readings. These readings can be displayed by the Java "Oscilloscope" application found in the ./java subdirectory. The sampling rate starts at 1Hz, but can be changed from the Java application. You can compile MultihopOscilloscope with a sensor board's default sensor by compiling as follows: SENSORBOARD= make You can change the sensor used by editing MultihopOscilloscopeAppC.nc. Tools: The Java application displays readings it receives from motes running the MultihopOscilloscope demo via a serial forwarder. To run it, change to the ./java subdirectory and type: make java net.tinyos.sf.SerialForwarder -comm serial@: # e.g., java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2 # or java net.tinyos.sf.SerialForwarder -comm serial@COM2:telosb ./run The controls at the bottom of the screen allow you to zoom in or out the X axis, change the range of the Y axis, and clear all received data. You can change the color used to display a mote by clicking on its color in the mote table. Known bugs/limitations: None. See also: TEP 113: Serial Communications, TEP 119: Collection. Notes: MultihopOscilloscope configures a mote whose TOS_NODE_ID modulo 500 is zero to be a collection root. tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/000077500000000000000000000000001207233610700224735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/ColorCellEditor.java000066400000000000000000000032621207233610700263660ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import java.awt.*; import java.awt.event.*; /* Editor for table cells representing colors. Popup a color chooser. */ public class ColorCellEditor extends AbstractCellEditor implements TableCellEditor { private Color color; private JButton button; public ColorCellEditor(String title) { button = new JButton(); final JColorChooser chooser = new JColorChooser(); final JDialog dialog = JColorChooser.createDialog (button, title, true, chooser, new ActionListener() { public void actionPerformed(ActionEvent e) { color = chooser.getColor(); } }, null); button.setBorderPainted(false); button.addActionListener (new ActionListener () { public void actionPerformed(ActionEvent e) { button.setBackground(color); chooser.setColor(color); dialog.setVisible(true); fireEditingStopped(); } } ); } public Object getCellEditorValue() { return color; } public Component getTableCellEditorComponent(JTable table, Object value, boolean isSelected, int row, int column) { color = (Color)value; return button; } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/Data.java000066400000000000000000000040451207233610700242120ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import java.util.*; /* Hold all data received from motes */ class Data { /* The mote data is stored in a flat array indexed by a mote's identifier. A null value indicates no mote with that identifier. */ private Node[] nodes = new Node[256]; private Oscilloscope parent; Data(Oscilloscope parent) { this.parent = parent; } /* Data received from mote nodeId containing NREADINGS samples from messageId * NREADINGS onwards. Tell parent if this is a new node. */ void update(int nodeId, int messageId, int readings[]) { if (nodeId >= nodes.length) { int newLength = nodes.length * 2; if (nodeId >= newLength) newLength = nodeId + 1; Node newNodes[] = new Node[newLength]; System.arraycopy(nodes, 0, newNodes, 0, nodes.length); nodes = newNodes; } Node node = nodes[nodeId]; if (node == null) { nodes[nodeId] = node = new Node(nodeId); parent.newNode(nodeId); } node.update(messageId, readings); } /* Return value of sample x for mote nodeId, or -1 for missing data */ int getData(int nodeId, int x) { if (nodeId >= nodes.length || nodes[nodeId] == null) return -1; return nodes[nodeId].getData(x); } /* Return number of last known sample on mote nodeId. Returns 0 for unknown motes. */ int maxX(int nodeId) { if (nodeId >= nodes.length || nodes[nodeId] == null) return 0; return nodes[nodeId].maxX(); } /* Return number of largest known sample on all motes (0 if there are no motes) */ int maxX() { int max = 0; for (int i = 0; i < nodes.length; i++) if (nodes[i] != null) { int nmax = nodes[i].maxX(); if (nmax > max) max = nmax; } return max; } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/Graph.java000066400000000000000000000147621207233610700244110ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import java.awt.*; import java.awt.event.*; import java.awt.font.*; import java.awt.geom.*; import java.util.*; /* Panel for drawing mote-data graphs */ class Graph extends JPanel { final static int BORDER_LEFT = 40; final static int BORDER_RIGHT = 0; final static int BORDER_TOP = 10; final static int BORDER_BOTTOM = 10; final static int TICK_SPACING = 40; final static int MAX_TICKS = 16; final static int TICK_WIDTH = 10; final static int MIN_WIDTH = 50; int gx0, gx1, gy0, gy1; // graph bounds int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale Window parent; /* Graph to screen coordinate conversion support */ int height, width; double xscale, yscale; void updateConversion() { height = getHeight() - BORDER_TOP - BORDER_BOTTOM; width = getWidth() - BORDER_LEFT - BORDER_RIGHT; if (height < 1) height = 1; if (width < 1) width = 1; xscale = (double)width / (gx1 - gx0 + 1); yscale = (double)height / (gy1 - gy0 + 1); } Graphics makeClip(Graphics g) { return g.create(BORDER_LEFT, BORDER_TOP, width, height); } // Note that these do not include the border offset! int screenX(int gx) { return (int)(xscale * (gx - gx0) + 0.5); } int screenY(int gy) { return (int)(height - yscale * (gy - gy0)); } int graphX(int sx) { return (int)(sx / xscale + gx0 + 0.5); } Graph(Window parent) { this.parent = parent; gy0 = 0; gy1 = 0xffff; gx0 = 0; gx1 = MIN_WIDTH << scale; } void rightDrawString(Graphics2D g, String s, int x, int y) { TextLayout layout = new TextLayout(s, parent.smallFont, g.getFontRenderContext()); Rectangle2D bounds = layout.getBounds(); layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2); } protected void paintComponent(Graphics g) { Graphics2D g2d = (Graphics2D)g; /* Repaint. Synchronize on Oscilloscope to avoid data changing. Simply clear panel, draw Y axis and all the mote graphs. */ synchronized (parent.parent) { updateConversion(); g2d.setColor(Color.BLACK); g2d.fillRect(0, 0, getWidth(), getHeight()); drawYAxis(g2d); Graphics clipped = makeClip(g2d); int count = parent.moteListModel.size(); for (int i = 0; i < count; i++) { clipped.setColor(parent.moteListModel.getColor(i)); drawGraph(clipped, parent.moteListModel.get(i)); } } } /* Draw the Y-axis */ protected void drawYAxis(Graphics2D g) { int axis_x = BORDER_LEFT - 1; int height = getHeight() - BORDER_BOTTOM - BORDER_TOP; g.setColor(Color.WHITE); g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1); /* Draw a reasonable set of tick marks */ int nTicks = height / TICK_SPACING; if (nTicks > MAX_TICKS) nTicks = MAX_TICKS; int tickInterval = (gy1 - gy0 + 1) / nTicks; if (tickInterval == 0) tickInterval = 1; /* Tick interval should be of the family A * 10^B, where A = 1, 2 * or 5. We tend more to rounding A up, to reduce rather than increase the number of ticks. */ int B = (int)(Math.log(tickInterval) / Math.log(10)); int A = (int)(tickInterval / Math.pow(10, B) + 0.5); if (A > 2) A = 5; else if (A > 5) A = 10; tickInterval = A * (int)Math.pow(10, B); /* Ticks are printed at multiples of tickInterval */ int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval; while (tick <= gy1) { int stick = screenY(tick) + BORDER_TOP; rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick); g.drawLine(axis_x - TICK_WIDTH / 2, stick, axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick); tick += tickInterval; } } /* Draw graph for mote nodeId */ protected void drawGraph(Graphics g, int nodeId) { SingleGraph sg = new SingleGraph(g, nodeId); if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel for (int sx = 0; sx < width; sx++) sg.nextPoint(g, graphX(sx), sx); else // Less points than pixel-iterate by points for (int gx = gx0; gx <= gx1; gx++) sg.nextPoint(g, gx, screenX(gx)); } /* Inner class to simplify drawing a graph. Simplify initialise it, then feed it the X screen and graph coordinates, from left to right. */ private class SingleGraph { int lastsx, lastsy, nodeId; /* Start drawing the graph mote id */ SingleGraph(Graphics g, int id) { nodeId = id; lastsx = -1; lastsy = -1; } /* Next point in mote's graph is at x value gx, screen coordinate sx */ void nextPoint(Graphics g, int gx, int sx) { int gy = parent.parent.data.getData(nodeId, gx); int sy = -1; if (gy >= 0) { // Ignore missing values double rsy = height - yscale * (gy - gy0); // Ignore problem values if (rsy >= -1e6 && rsy <= 1e6) sy = (int)(rsy + 0.5); if (lastsy >= 0 && sy >= 0) g.drawLine(lastsx, lastsy, sx, sy); } lastsx = sx; lastsy = sy; } } /* Update X-axis range in GUI */ void updateXLabel() { parent.xLabel.setText("X: " + gx0 + " - " + gx1); } /* Ensure that graph is nicely positioned on screen. max is the largest sample number received from any mote. */ private void recenter(int max) { // New data will show up at the 3/4 point // The 2nd term ensures that gx1 will be >= max int scrollby = ((gx1 - gx0) >> 2) + (max - gx1); gx0 += scrollby; gx1 += scrollby; if (gx0 < 0) { // don't bother showing negative sample numbers gx1 -= gx0; gx0 = 0; } updateXLabel(); } /* New data received. Redraw graph, scrolling if necessary */ void newData() { int max = parent.parent.data.maxX(); if (max > gx1 || max < gx0) // time to scroll recenter(max); repaint(); } /* User set the X-axis scale to newScale */ void setScale(int newScale) { gx1 = gx0 + (MIN_WIDTH << newScale); scale = newScale; recenter(parent.parent.data.maxX()); repaint(); } /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus values (return false), or accept, redraw and return true. */ boolean setYAxis(int newy0, int newy1) { if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 || newy1 < 0 || newy1 > 65535) return false; gy0 = newy0; gy1 = newy1; repaint(); return true; } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/Makefile000066400000000000000000000010461207233610700241340ustar00rootroot00000000000000GEN=OscilloscopeMsg.java Constants.java all: oscilloscope.jar oscilloscope.jar: Oscilloscope.class jar cf $@ *.class OscilloscopeMsg.java: ../MultihopOscilloscope.h mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@ Constants.java: ../MultihopOscilloscope.h ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@ Oscilloscope.class: $(wildcard *.java) $(GEN) javac *.java clean: rm -f *.class $(GEN) veryclean: clean rm oscilloscope.jar tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/Node.java000066400000000000000000000063161207233610700242310ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Class holding all data received from a mote. */ class Node { /* Data is hold in an array whose size is a multiple of INCREMENT, and INCREMENT itself must be a multiple of Constant.NREADINGS. This simplifies handling the extension and clipping of old data (see setEnd) */ final static int INCREMENT = 100 * Constants.NREADINGS; final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT /* The mote's identifier */ int id; /* Data received from the mote. data[0] is the dataStart'th sample Indexes 0 through dataEnd - dataStart - 1 hold data. Samples are 16-bit unsigned numbers, -1 indicates missing data. */ int[] data; int dataStart, dataEnd; Node(int _id) { id = _id; } /* Update data to hold received samples newDataIndex .. newEnd. If we receive data with a lower index, we discard newer data (we assume the mote rebooted). */ private void setEnd(int newDataIndex, int newEnd) { if (newDataIndex < dataStart || data == null) { /* New data is before the start of what we have. Just throw it all away and start again */ dataStart = newDataIndex; data = new int[INCREMENT]; } if (newEnd > dataStart + data.length) { /* Try extending first */ if (data.length < MAX_SIZE) { int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT; if (newLength >= MAX_SIZE) newLength = MAX_SIZE; int[] newData = new int[newLength]; System.arraycopy(data, 0, newData, 0, data.length); data = newData; } if (newEnd > dataStart + data.length) { /* Still doesn't fit. Squish. We assume INCREMENT >= (newEnd - newDataIndex), and ensure that dataStart + data.length - INCREMENT = newDataIndex */ int newStart = newDataIndex + INCREMENT - data.length; if (dataStart + data.length > newStart) System.arraycopy(data, newStart - dataStart, data, 0, data.length - (newStart - dataStart)); dataStart = newStart; } } /* Mark any missing data as invalid */ for (int i = dataEnd < dataStart ? dataStart : dataEnd; i < newDataIndex; i++) data[i - dataStart] = -1; /* If we receive a count less than the old count, we assume the old data is invalid */ dataEnd = newEnd; } /* Data received containing NREADINGS samples from messageId * NREADINGS onwards */ void update(int messageId, int readings[]) { int start = messageId * Constants.NREADINGS; setEnd(start, start + Constants.NREADINGS); for (int i = 0; i < readings.length; i++) data[start - dataStart + i] = readings[i]; } /* Return value of sample x, or -1 for missing data */ int getData(int x) { if (x < dataStart || x >= dataEnd) return -1; else return data[x - dataStart]; } /* Return number of last known sample */ int maxX() { return dataEnd - 1; } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/Oscilloscope.java000066400000000000000000000076771207233610700260150ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import net.tinyos.message.*; import net.tinyos.util.*; import java.io.*; /* The "Oscilloscope" demo app. Displays graphs showing data received from the Oscilloscope mote application, and allows the user to: - zoom in or out on the X axis - set the scale on the Y axis - change the sampling period - change the color of each mote's graph - clear all data This application is in three parts: - the Node and Data objects store data received from the motes and support simple queries - the Window and Graph and miscellaneous support objects implement the GUI and graph drawing - the Oscilloscope object talks to the motes and coordinates the other objects Synchronization is handled through the Oscilloscope object. Any operation that reads or writes the mote data must be synchronized on Oscilloscope. Note that the messageReceived method below is synchronized, so no further synchronization is needed when updating state based on received messages. */ public class Oscilloscope implements MessageListener { MoteIF mote; Data data; Window window; /* The current sampling period. If we receive a message from a mote with a newer version, we update our interval. If we receive a message with an older version, we broadcast a message with the current interval and version. If the user changes the interval, we increment the version and broadcast the new interval and version. */ int interval = Constants.DEFAULT_INTERVAL; int version = -1; /* Main entry point */ void run() { data = new Data(this); window = new Window(this); window.setup(); mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(new OscilloscopeMsg(), this); } /* The data object has informed us that nodeId is a previously unknown mote. Update the GUI. */ void newNode(int nodeId) { window.newNode(nodeId); } synchronized public void messageReceived(int dest_addr, Message msg) { if (msg instanceof OscilloscopeMsg) { OscilloscopeMsg omsg = (OscilloscopeMsg)msg; /* Update interval and mote data */ periodUpdate(omsg.get_version(), omsg.get_interval()); data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings()); /* Inform the GUI that new data showed up */ window.newData(); } } /* A potentially new version and interval has been received from the mote */ void periodUpdate(int moteVersion, int moteInterval) { if (moteVersion > version) { /* It's new. Update our vision of the interval. */ version = moteVersion; interval = moteInterval; window.updateSamplePeriod(); } else if (moteVersion < version) { /* It's old. Update the mote's vision of the interval. */ sendInterval(); } } /* The user wants to set the interval to newPeriod. Refuse bogus values and return false, or accept the change, broadcast it, and return true */ synchronized boolean setInterval(int newPeriod) { if (newPeriod < 1 || newPeriod > 65535) return false; interval = newPeriod; version++; sendInterval(); return true; } /* Broadcast a version+interval message. */ void sendInterval() { OscilloscopeMsg omsg = new OscilloscopeMsg(); omsg.set_version(version); omsg.set_interval(interval); try { mote.send(MoteIF.TOS_BCAST_ADDR, omsg); } catch (IOException e) { window.error("Cannot send message to mote"); } } /* User wants to clear all data. */ void clear() { data = new Data(this); } public static void main(String[] args) { Oscilloscope me = new Oscilloscope(); me.run(); } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/Window.java000066400000000000000000000207401207233610700246100ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import javax.swing.event.*; import java.awt.*; import java.awt.event.*; import java.util.*; /* The main GUI object. Build the GUI and coordinate all user activities */ class Window { Oscilloscope parent; Graph graph; Font smallFont = new Font("Dialog", Font.PLAIN, 8); Font boldFont = new Font("Dialog", Font.BOLD, 12); Font normalFont = new Font("Dialog", Font.PLAIN, 12); MoteTableModel moteListModel; // GUI view of mote list JLabel xLabel; // Label displaying X axis range JTextField sampleText, yText; // inputs for sample period and Y axis range JFrame frame; Window(Oscilloscope parent) { this.parent = parent; } /* A model for the mote table, and general utility operations on the mote list */ class MoteTableModel extends AbstractTableModel { private ArrayList motes = new ArrayList(); private ArrayList colors = new ArrayList(); /* Initial mote colors cycle through this list. Add more colors if you want. */ private Color[] cycle = { Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA, Color.YELLOW, Color.GRAY, Color.YELLOW }; int cycleIndex; /* TableModel methods for achieving our table appearance */ public String getColumnName(int col) { if (col == 0) return "Mote"; else return "Color"; } public int getColumnCount() { return 2; } public synchronized int getRowCount() { return motes.size(); } public synchronized Object getValueAt(int row, int col) { if (col == 0) return motes.get(row); else return colors.get(row); } public Class getColumnClass(int col) { return getValueAt(0, col).getClass(); } public boolean isCellEditable(int row, int col) { return col == 1; } public synchronized void setValueAt(Object value, int row, int col) { colors.set(row, value); fireTableCellUpdated(row, col); graph.repaint(); } /* Return mote id of i'th mote */ int get(int i) { return ((Integer)motes.get(i)).intValue(); } /* Return color of i'th mote */ Color getColor(int i) { return (Color)colors.get(i); } /* Return number of motes */ int size() { return motes.size(); } /* Add a new mote */ synchronized void newNode(int nodeId) { /* Shock, horror. No binary search. */ int i, len = motes.size(); for (i = 0; ; i++) if (i == len || nodeId < get(i)) { motes.add(i, new Integer(nodeId)); // Cycle through a set of initial colors colors.add(i, cycle[cycleIndex++ % cycle.length]); break; } fireTableRowsInserted(i, i); } /* Remove all motes */ void clear() { motes = new ArrayList(); colors = new ArrayList(); fireTableDataChanged(); } } /* A simple full-color cell */ static class MoteColor extends JLabel implements TableCellRenderer { public MoteColor() { setOpaque(true); } public Component getTableCellRendererComponent (JTable table, Object color, boolean isSelected, boolean hasFocus, int row, int column) { setBackground((Color)color); return this; } } /* Convenience methods for making buttons, labels and textfields. Simplifies code and ensures a consistent style. */ JButton makeButton(String label, ActionListener action) { JButton button = new JButton(); button.setText(label); button.setFont(boldFont); button.addActionListener(action); return button; } JLabel makeLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(boldFont); return label; } JLabel makeSmallLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(smallFont); return label; } JTextField makeTextField(int columns, ActionListener action) { JTextField tf = new JTextField(columns); tf.setFont(normalFont); tf.setMaximumSize(tf.getPreferredSize()); tf.addActionListener(action); return tf; } /* Build the GUI */ void setup() { JPanel main = new JPanel(new BorderLayout()); main.setMinimumSize(new Dimension(500, 250)); main.setPreferredSize(new Dimension(800, 400)); // Three panels: mote list, graph, controls moteListModel = new MoteTableModel(); JTable moteList = new JTable(moteListModel); moteList.setDefaultRenderer(Color.class, new MoteColor()); moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color")); moteList.setPreferredScrollableViewportSize(new Dimension(100, 400)); JScrollPane motePanel = new JScrollPane(); motePanel.getViewport().add(moteList, null); main.add(motePanel, BorderLayout.WEST); graph = new Graph(this); main.add(graph, BorderLayout.CENTER); // Controls. Organised using box layouts. // Sample period. JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT); sampleText = makeTextField(6, new ActionListener() { public void actionPerformed(ActionEvent e) { setSamplePeriod(); } } ); updateSamplePeriod(); // Clear data. JButton clearButton = makeButton("Clear data", new ActionListener() { public void actionPerformed(ActionEvent e) { clearData(); } } ); // Adjust X-axis zoom. Box xControl = new Box(BoxLayout.Y_AXIS); xLabel = makeLabel("", JLabel.CENTER); final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale); Hashtable xTable = new Hashtable(); for (int i = 0; i <= 8; i += 2) xTable.put(new Integer(i), makeSmallLabel("" + (Graph.MIN_WIDTH << i), JLabel.CENTER)); xSlider.setLabelTable(xTable); xSlider.setPaintLabels(true); graph.updateXLabel(); graph.setScale(graph.scale); xSlider.addChangeListener(new ChangeListener() { public void stateChanged(ChangeEvent e) { //if (!xSlider.getValueIsAdjusting()) graph.setScale((int)xSlider.getValue()); } }); xControl.add(xLabel); xControl.add(xSlider); // Adjust Y-axis range. JLabel yLabel = makeLabel("Y:", JLabel.RIGHT); yText = makeTextField(12, new ActionListener() { public void actionPerformed(ActionEvent e) { setYAxis(); } } ); yText.setText(graph.gy0 + " - " + graph.gy1); Box controls = new Box(BoxLayout.X_AXIS); controls.add(clearButton); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(sampleLabel); controls.add(sampleText); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(xControl); controls.add(yLabel); controls.add(yText); main.add(controls, BorderLayout.SOUTH); // The frame part frame = new JFrame("Oscilloscope"); frame.setSize(main.getPreferredSize()); frame.getContentPane().add(main); frame.setVisible(true); frame.addWindowListener(new WindowAdapter() { public void windowClosing(WindowEvent e) { System.exit(0); } }); } /* User operation: clear data */ void clearData() { synchronized (parent) { moteListModel.clear(); parent.clear(); graph.newData(); } } /* User operation: set Y-axis range. */ void setYAxis() { String val = yText.getText(); try { int dash = val.indexOf('-'); if (dash >= 0) { String min = val.substring(0, dash).trim(); String max = val.substring(dash + 1).trim(); if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max))) error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)"); return; } } catch (NumberFormatException e) { } error("Invalid range " + val + " (expected NN-MM)"); } /* User operation: set sample period. */ void setSamplePeriod() { String periodS = sampleText.getText().trim(); try { int newPeriod = Integer.parseInt(periodS); if (parent.setInterval(newPeriod)) return; } catch (NumberFormatException e) { } error("Invalid sample period " + periodS); } /* Notification: sample period changed. */ void updateSamplePeriod() { sampleText.setText("" + parent.interval); } /* Notification: new node. */ void newNode(int nodeId) { moteListModel.newNode(nodeId); } /* Notification: new data. */ void newData() { graph.newData(); } void error(String msg) { JOptionPane.showMessageDialog(frame, msg, "Error", JOptionPane.ERROR_MESSAGE); } } tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/build.xml000066400000000000000000000006201207233610700243120ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/MultihopOscilloscopeLqi/java/oscilloscope.jar000066400000000000000000000447251207233610700257030ustar00rootroot00000000000000PK Vq5 META-INF/PK Vq5'Y00META-INF/MANIFEST.MFManifest-Version: 1.0 Created-By: 0.92-gcc-4.0 PK Vq5,ColorCellEditor$1.class}RmOA~=8{\~Ԙ&*&tɱ.ejGgL/ٙyynO;؜DX `)2VBA3j S#^F ˽C>⧙9 {х.; u;0ӻB*i_2d5Pj= TQ_xp[{Q~0ObF)kF ё|F|t2_B6K({Bj.;:.{ F_4Jg1Љاc#;KaZi\3eN: nP 7PK Vq5cѢ/ColorCellEditor.classTiOQ= 㰴QE.Rp-P`*`Hi!e<ߐD?xmi hw.s:?}`/U#.0̨JTHRх9y cyyੂg 2 El; }=H" CGPbbi&_xn X0-S,@e o `6C k8Coδ~;B<].\^+v!9#zMaU!VO-_lCfZy _5ESTaNykemT"0JqEʬL/Ki̋ɣ[S\u 1#y5<Ǣ!coSa]N 5O2A۰,dˆrW/ixe +ȶIJKȪ53\\ 0rQFH6)$tfKkEFeZ$mQvr(Lʙ&#\N;o r怞#m%M(.0_6u&G_$|Rda[t;B'dcbUw*8 ~u}/HTѵKT)3hVM z{):GbjRA1Aʌ6 -)AK994Jct%~~B=E00G3u.իEX<Z#D LK;:{mvx=;iRwH ӯ.>5PK Vq58>1!Constants.class=Ok@5j{ࡷփ"&Z6v)M< zy̾߿) tLtMuo؋hFhSuʄB p >V^lBY{e7SZn"y Dci~e?4ދo|HO&h/wPWttA&s ;[\~ΰ`:s4Y[ZPK Vq5 )sɃ Data.classmR]OQ=ҺE*-lMx/,e%%mQy`L|A)F#1깷ǝ33??d& tp =Bч065$#D€k`X^,mzvִWU٥J._(*Ҿꬂs9XQ=bl/mf'-Jp25W؞g WTTGr頜JHz/<au4hAH蘁q3]4ŢzV,x殟ʖ+ˇ^rCZ9ϑ\RBeW//%SAG^K 6B:ڠ)P܈@uO}โv6h"2B(+oҏRQ5HcaRj}'YQMҢӺ1])1]tgMv[:_XN\Kk<Ьft1YB9eEكbo5Mk/)!l m`n}d@Of}si:ӴYa:` BS`5buIJX9" zn mO|Ihq-MC>?Zp?)d 8|Xǧ707PO ɇqV^܁ωB>//KTv |Q)ݲG}Iv|ه{Wu|͇\}2/!u!'CķDQdzP:ITOZ1(0iJ٬k[lv*P &7Sٜʭ5 w9jkWt |suH|H\]Ѧ:ڗ6EW-Wm[~:DO hs Y*@gpM !ZLZ }fJxbxz-Vg e@"cAG[idșfb[l"`ZjS:X"ede:Mkn>`"b5IMtgkKep0Z- xQD*;WCNR@3@G. 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IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Null is an empty skeleton application. It is useful to test that the * build environment is functional in its most minimal sense, i.e., you * can correctly compile an application. It is also useful to test the * minimum power consumption of a node when it has absolutely no * interrupts or resources active. * * @author Cory Sharp * @date February 4, 2006 */ configuration NullAppC{} implementation { components MainC, NullC; MainC.Boot <- NullC; } tinyos-2.1.2+dfsg/apps/Null/NullC.nc000066400000000000000000000047161207233610700172050ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Null is an empty skeleton application. It is useful to test that the * build environment is functional in its most minimal sense, i.e., you * can correctly compile an application. It is also useful to test the * minimum power consumption of a node when it has absolutely no * interrupts or resources active. * * @author Cory Sharp * @date February 4, 2006 */ module NullC @safe() { uses interface Boot; } implementation { event void Boot.booted() { // Do nothing. } } tinyos-2.1.2+dfsg/apps/Null/README.txt000066400000000000000000000010451207233610700173340ustar00rootroot00000000000000$Id: README.txt,v 1.4 2006-12-12 18:22:48 vlahan Exp $ README for Null Author/Contact: tinyos-help@millennium.berkeley.edu @author Cory Sharp Description: Null is an empty skeleton application. It is useful to test that the build environment is functional in its most minimal sense, i.e., you can correctly compile an application. It is also useful to test the minimum power consumption of a node when it has absolutely no interrupts or resources active. Tools: None. Known bugs/limitations: Hahaha. Seriously. tinyos-2.1.2+dfsg/apps/Oscilloscope/000077500000000000000000000000001207233610700173625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/Oscilloscope/Makefile000066400000000000000000000000611207233610700210170ustar00rootroot00000000000000COMPONENT=OscilloscopeAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/Oscilloscope/Oscilloscope.h000066400000000000000000000017111207233610700221710ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ // @author David Gay #ifndef OSCILLOSCOPE_H #define OSCILLOSCOPE_H enum { /* Number of readings per message. If you increase this, you may have to increase the message_t size. */ NREADINGS = 10, /* Default sampling period. */ DEFAULT_INTERVAL = 256, AM_OSCILLOSCOPE = 0x93 }; typedef nx_struct oscilloscope { nx_uint16_t version; /* Version of the interval. */ nx_uint16_t interval; /* Samping period. */ nx_uint16_t id; /* Mote id of sending mote. */ nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */ nx_uint16_t readings[NREADINGS]; } oscilloscope_t; #endif tinyos-2.1.2+dfsg/apps/Oscilloscope/OscilloscopeAppC.nc000066400000000000000000000020701207233610700231050ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Oscilloscope demo application. Uses the demo sensor - change the * new DemoSensorC() instantiation if you want something else. * * See README.txt file in this directory for usage instructions. * * @author David Gay */ configuration OscilloscopeAppC { } implementation { components OscilloscopeC, MainC, ActiveMessageC, LedsC, new TimerMilliC(), new DemoSensorC() as Sensor, new AMSenderC(AM_OSCILLOSCOPE), new AMReceiverC(AM_OSCILLOSCOPE); OscilloscopeC.Boot -> MainC; OscilloscopeC.RadioControl -> ActiveMessageC; OscilloscopeC.AMSend -> AMSenderC; OscilloscopeC.Receive -> AMReceiverC; OscilloscopeC.Timer -> TimerMilliC; OscilloscopeC.Read -> Sensor; OscilloscopeC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/Oscilloscope/OscilloscopeC.nc000066400000000000000000000070701207233610700224510ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Oscilloscope demo application. See README.txt file in this directory. * * @author David Gay */ #include "Timer.h" #include "Oscilloscope.h" module OscilloscopeC @safe() { uses { interface Boot; interface SplitControl as RadioControl; interface AMSend; interface Receive; interface Timer; interface Read; interface Leds; } } implementation { message_t sendBuf; bool sendBusy; /* Current local state - interval, version and accumulated readings */ oscilloscope_t local; uint8_t reading; /* 0 to NREADINGS */ /* When we head an Oscilloscope message, we check it's sample count. If it's ahead of ours, we "jump" forwards (set our count to the received count). However, we must then suppress our next count increment. This is a very simple form of "time" synchronization (for an abstract notion of time). */ bool suppressCountChange; // Use LEDs to report various status issues. void report_problem() { call Leds.led0Toggle(); } void report_sent() { call Leds.led1Toggle(); } void report_received() { call Leds.led2Toggle(); } event void Boot.booted() { local.interval = DEFAULT_INTERVAL; local.id = TOS_NODE_ID; if (call RadioControl.start() != SUCCESS) report_problem(); } void startTimer() { call Timer.startPeriodic(local.interval); reading = 0; } event void RadioControl.startDone(error_t error) { startTimer(); } event void RadioControl.stopDone(error_t error) { } event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { oscilloscope_t *omsg = payload; report_received(); /* If we receive a newer version, update our interval. If we hear from a future count, jump ahead but suppress our own change */ if (omsg->version > local.version) { local.version = omsg->version; local.interval = omsg->interval; startTimer(); } if (omsg->count > local.count) { local.count = omsg->count; suppressCountChange = TRUE; } return msg; } /* At each sample period: - if local sample buffer is full, send accumulated samples - read next sample */ event void Timer.fired() { if (reading == NREADINGS) { if (!sendBusy && sizeof local <= call AMSend.maxPayloadLength()) { // Don't need to check for null because we've already checked length // above memcpy(call AMSend.getPayload(&sendBuf, sizeof(local)), &local, sizeof local); if (call AMSend.send(AM_BROADCAST_ADDR, &sendBuf, sizeof local) == SUCCESS) sendBusy = TRUE; } if (!sendBusy) report_problem(); reading = 0; /* Part 2 of cheap "time sync": increment our count if we didn't jump ahead. */ if (!suppressCountChange) local.count++; suppressCountChange = FALSE; } if (call Read.read() != SUCCESS) report_problem(); } event void AMSend.sendDone(message_t* msg, error_t error) { if (error == SUCCESS) report_sent(); else report_problem(); sendBusy = FALSE; } event void Read.readDone(error_t result, uint16_t data) { if (result != SUCCESS) { data = 0xffff; report_problem(); } if (reading < NREADINGS) local.readings[reading++] = data; } } tinyos-2.1.2+dfsg/apps/Oscilloscope/README.txt000066400000000000000000000026551207233610700210700ustar00rootroot00000000000000README for Oscilloscope Author/Contact: tinyos-help@millennium.berkeley.edu Description: Oscilloscope is a simple data-collection demo. It periodically samples the default sensor and broadcasts a message over the radio every 10 readings. These readings can be received by a BaseStation mote and displayed by the Java "Oscilloscope" application found in the java subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java application. You can compile Oscilloscope with a sensor board's default sensor by compiling as follows: SENSORBOARD= make You can change the sensor used by editing OscilloscopeAppC.nc. Tools: To display the readings from Oscilloscope motes, install the BaseStation application on a mote connected to your PC's serial port. Then run the Oscilloscope display application found in the java subdirectory, as follows: cd java make java net.tinyos.sf.SerialForwarder -comm serial@: # e.g., java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2 # or java net.tinyos.sf.SerialForwarder -comm serial@COM2:telosb ./run The controls at the bottom of the screen allow you to zoom in or out the X axis, change the range of the Y axis, and clear all received data. You can change the color used to display a mote by clicking on its color in the mote table. Known bugs/limitations: None. $Id: README.txt,v 1.6 2008-07-25 03:01:45 regehr Exp $ tinyos-2.1.2+dfsg/apps/Oscilloscope/java/000077500000000000000000000000001207233610700203035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/Oscilloscope/java/ColorCellEditor.java000066400000000000000000000034221207233610700241740ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import java.awt.*; import java.awt.event.*; /* Editor for table cells representing colors. Popup a color chooser. */ public class ColorCellEditor extends AbstractCellEditor implements TableCellEditor { private Color color; private JButton button; public ColorCellEditor(String title) { button = new JButton(); final JColorChooser chooser = new JColorChooser(); final JDialog dialog = JColorChooser.createDialog (button, title, true, chooser, new ActionListener() { public void actionPerformed(ActionEvent e) { color = chooser.getColor(); } }, null); button.setBorderPainted(false); button.addActionListener (new ActionListener () { public void actionPerformed(ActionEvent e) { button.setBackground(color); chooser.setColor(color); dialog.setVisible(true); fireEditingStopped(); } } ); } public Object getCellEditorValue() { return color; } public Component getTableCellEditorComponent(JTable table, Object value, boolean isSelected, int row, int column) { color = (Color)value; return button; } } tinyos-2.1.2+dfsg/apps/Oscilloscope/java/Data.java000066400000000000000000000042401207233610700220170ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import java.util.*; /* Hold all data received from motes */ class Data { /* The mote data is stored in a flat array indexed by a mote's identifier. A null value indicates no mote with that identifier. */ private Node[] nodes = new Node[256]; private Oscilloscope parent; Data(Oscilloscope parent) { this.parent = parent; } /* Data received from mote nodeId containing NREADINGS samples from messageId * NREADINGS onwards. Tell parent if this is a new node. */ void update(int nodeId, int messageId, int readings[]) { if (nodeId >= nodes.length) { int newLength = nodes.length * 2; if (nodeId >= newLength) { newLength = nodeId + 1; } Node newNodes[] = new Node[newLength]; System.arraycopy(nodes, 0, newNodes, 0, nodes.length); nodes = newNodes; } Node node = nodes[nodeId]; if (node == null) { nodes[nodeId] = node = new Node(nodeId); parent.newNode(nodeId); } node.update(messageId, readings); } /* Return value of sample x for mote nodeId, or -1 for missing data */ int getData(int nodeId, int x) { if (nodeId >= nodes.length || nodes[nodeId] == null) return -1; return nodes[nodeId].getData(x); } /* Return number of last known sample on mote nodeId. Returns 0 for unknown motes. */ int maxX(int nodeId) { if (nodeId >= nodes.length || nodes[nodeId] == null) return 0; return nodes[nodeId].maxX(); } /* Return number of largest known sample on all motes (0 if there are no motes) */ int maxX() { int max = 0; for (int i = 0; i < nodes.length; i++) { if (nodes[i] != null) { int nmax = nodes[i].maxX(); if (nmax > max) max = nmax; } } return max; } } tinyos-2.1.2+dfsg/apps/Oscilloscope/java/Graph.java000066400000000000000000000156561207233610700222240ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import java.awt.*; import java.awt.event.*; import java.awt.font.*; import java.awt.geom.*; import java.util.*; /* Panel for drawing mote-data graphs */ class Graph extends JPanel { final static int BORDER_LEFT = 40; final static int BORDER_RIGHT = 0; final static int BORDER_TOP = 10; final static int BORDER_BOTTOM = 10; final static int TICK_SPACING = 40; final static int MAX_TICKS = 16; final static int TICK_WIDTH = 10; final static int MIN_WIDTH = 50; int gx0, gx1, gy0, gy1; // graph bounds int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale Window parent; /* Graph to screen coordinate conversion support */ int height, width; double xscale, yscale; void updateConversion() { height = getHeight() - BORDER_TOP - BORDER_BOTTOM; width = getWidth() - BORDER_LEFT - BORDER_RIGHT; if (height < 1) { height = 1; } if (width < 1) { width = 1; } xscale = (double)width / (gx1 - gx0 + 1); yscale = (double)height / (gy1 - gy0 + 1); } Graphics makeClip(Graphics g) { return g.create(BORDER_LEFT, BORDER_TOP, width, height); } // Note that these do not include the border offset! int screenX(int gx) { return (int)(xscale * (gx - gx0) + 0.5); } int screenY(int gy) { return (int)(height - yscale * (gy - gy0)); } int graphX(int sx) { return (int)(sx / xscale + gx0 + 0.5); } Graph(Window parent) { this.parent = parent; gy0 = 0; gy1 = 0xffff; gx0 = 0; gx1 = MIN_WIDTH << scale; } void rightDrawString( Graphics2D g, String s, int x, int y) { TextLayout layout = new TextLayout(s, parent.smallFont, g.getFontRenderContext()); Rectangle2D bounds = layout.getBounds(); layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2); } protected void paintComponent(Graphics g) { Graphics2D g2d = (Graphics2D)g; /* Repaint. Synchronize on Oscilloscope to avoid data changing. Simply clear panel, draw Y axis and all the mote graphs. */ synchronized (parent.parent) { updateConversion(); g2d.setColor(Color.BLACK); g2d.fillRect(0, 0, getWidth(), getHeight()); drawYAxis(g2d); Graphics clipped = makeClip(g2d); int count = parent.moteListModel.size(); for (int i = 0; i < count; i++) { clipped.setColor(parent.moteListModel.getColor(i)); drawGraph(clipped, parent.moteListModel.get(i)); } } } /* Draw the Y-axis */ protected void drawYAxis(Graphics2D g) { int axis_x = BORDER_LEFT - 1; int height = getHeight() - BORDER_BOTTOM - BORDER_TOP; g.setColor(Color.WHITE); g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1); /* Draw a reasonable set of tick marks */ int nTicks = height / TICK_SPACING; if (nTicks > MAX_TICKS) { nTicks = MAX_TICKS; } int tickInterval = (gy1 - gy0 + 1) / nTicks; if (tickInterval == 0) { tickInterval = 1; } /* Tick interval should be of the family A * 10^B, where A = 1, 2 * or 5. We tend more to rounding A up, to reduce rather than increase the number of ticks. */ int B = (int)(Math.log(tickInterval) / Math.log(10)); int A = (int)(tickInterval / Math.pow(10, B) + 0.5); if (A > 2) { A = 5; } else if (A > 5) { A = 10; } tickInterval = A * (int)Math.pow(10, B); /* Ticks are printed at multiples of tickInterval */ int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval; while (tick <= gy1) { int stick = screenY(tick) + BORDER_TOP; rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick); g.drawLine(axis_x - TICK_WIDTH / 2, stick, axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick); tick += tickInterval; } } /* Draw graph for mote nodeId */ protected void drawGraph(Graphics g, int nodeId) { SingleGraph sg = new SingleGraph(g, nodeId); if (gx1 - gx0 >= width) { for (int sx = 0; sx < width; sx++) sg.nextPoint(g, graphX(sx), sx); } else { for (int gx = gx0; gx <= gx1; gx++) sg.nextPoint(g, gx, screenX(gx)); } } /* Inner class to simplify drawing a graph. Simplify initialise it, then feed it the X screen and graph coordinates, from left to right. */ private class SingleGraph { int lastsx, lastsy, nodeId; /* Start drawing the graph mote id */ SingleGraph(Graphics g, int id) { nodeId = id; lastsx = -1; lastsy = -1; } /* Next point in mote's graph is at x value gx, screen coordinate sx */ void nextPoint(Graphics g, int gx, int sx) { int gy = parent.parent.data.getData(nodeId, gx); int sy = -1; if (gy >= 0) { // Ignore missing values double rsy = height - yscale * (gy - gy0); // Ignore problem values if (rsy >= -1e6 && rsy <= 1e6) { sy = (int)(rsy + 0.5); } if (lastsy >= 0 && sy >= 0) { g.drawLine(lastsx, lastsy, sx, sy); } } lastsx = sx; lastsy = sy; } } /* Update X-axis range in GUI */ void updateXLabel() { parent.xLabel.setText("X: " + gx0 + " - " + gx1); } /* Ensure that graph is nicely positioned on screen. max is the largest sample number received from any mote. */ private void recenter(int max) { // New data will show up at the 3/4 point // The 2nd term ensures that gx1 will be >= max int scrollby = ((gx1 - gx0) >> 2) + (max - gx1); gx0 += scrollby; gx1 += scrollby; if (gx0 < 0) { // don't bother showing negative sample numbers gx1 -= gx0; gx0 = 0; } updateXLabel(); } /* New data received. Redraw graph, scrolling if necessary */ void newData() { int max = parent.parent.data.maxX(); if (max > gx1 || max < gx0) { recenter(max); } repaint(); } /* User set the X-axis scale to newScale */ void setScale(int newScale) { gx1 = gx0 + (MIN_WIDTH << newScale); scale = newScale; recenter(parent.parent.data.maxX()); repaint(); } /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus values (return false), or accept, redraw and return true. */ boolean setYAxis(int newy0, int newy1) { if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 || newy1 < 0 || newy1 > 65535) { return false; } gy0 = newy0; gy1 = newy1; repaint(); return true; } } tinyos-2.1.2+dfsg/apps/Oscilloscope/java/Makefile000066400000000000000000000010061207233610700217400ustar00rootroot00000000000000GEN=OscilloscopeMsg.java Constants.java all: oscilloscope.jar oscilloscope.jar: Oscilloscope.class jar cf $@ *.class OscilloscopeMsg.java: ../Oscilloscope.h mig -target=null -java-classname=OscilloscopeMsg java ../Oscilloscope.h oscilloscope -o $@ Constants.java: ../Oscilloscope.h ncg -target=null -java-classname=Constants java ../Oscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@ Oscilloscope.class: $(wildcard *.java) $(GEN) javac *.java clean: rm -f *.class $(GEN) veryclean: clean rm oscilloscope.jar tinyos-2.1.2+dfsg/apps/Oscilloscope/java/Node.java000066400000000000000000000066661207233610700220510ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Class holding all data received from a mote. */ class Node { /* Data is hold in an array whose size is a multiple of INCREMENT, and INCREMENT itself must be a multiple of Constant.NREADINGS. This simplifies handling the extension and clipping of old data (see setEnd) */ final static int INCREMENT = 100 * Constants.NREADINGS; final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT /* The mote's identifier */ int id; /* Data received from the mote. data[0] is the dataStart'th sample Indexes 0 through dataEnd - dataStart - 1 hold data. Samples are 16-bit unsigned numbers, -1 indicates missing data. */ int[] data; int dataStart, dataEnd; Node(int _id) { id = _id; } /* Update data to hold received samples newDataIndex .. newEnd. If we receive data with a lower index, we discard newer data (we assume the mote rebooted). */ private void setEnd(int newDataIndex, int newEnd) { if (newDataIndex < dataStart || data == null) { /* New data is before the start of what we have. Just throw it all away and start again */ dataStart = newDataIndex; data = new int[INCREMENT]; } if (newEnd > dataStart + data.length) { /* Try extending first */ if (data.length < MAX_SIZE) { int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT; if (newLength >= MAX_SIZE) { newLength = MAX_SIZE; } int[] newData = new int[newLength]; System.arraycopy(data, 0, newData, 0, data.length); data = newData; } if (newEnd > dataStart + data.length) { /* Still doesn't fit. Squish. We assume INCREMENT >= (newEnd - newDataIndex), and ensure that dataStart + data.length - INCREMENT = newDataIndex */ int newStart = newDataIndex + INCREMENT - data.length; if (dataStart + data.length > newStart) { System.arraycopy(data, newStart - dataStart, data, 0, data.length - (newStart - dataStart)); } dataStart = newStart; } } /* Mark any missing data as invalid */ for (int i = dataEnd < dataStart ? dataStart : dataEnd; i < newDataIndex; i++) { data[i - dataStart] = -1; } /* If we receive a count less than the old count, we assume the old data is invalid */ dataEnd = newEnd; } /* Data received containing NREADINGS samples from messageId * NREADINGS onwards */ void update(int messageId, int[] readings) { int start = messageId * Constants.NREADINGS; setEnd(start, start + Constants.NREADINGS); for (int i = 0; i < readings.length; i++) { data[start - dataStart + i] = readings[i]; } } /* Return value of sample x, or -1 for missing data */ int getData(int x) { if (x < dataStart || x >= dataEnd) { return -1; } else { return data[x - dataStart]; } } /* Return number of last known sample */ int maxX() { return dataEnd - 1; } } tinyos-2.1.2+dfsg/apps/Oscilloscope/java/Oscilloscope.java000066400000000000000000000101221207233610700236000ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import net.tinyos.message.*; import net.tinyos.util.*; import java.io.*; /* The "Oscilloscope" demo app. Displays graphs showing data received from the Oscilloscope mote application, and allows the user to: - zoom in or out on the X axis - set the scale on the Y axis - change the sampling period - change the color of each mote's graph - clear all data This application is in three parts: - the Node and Data objects store data received from the motes and support simple queries - the Window and Graph and miscellaneous support objects implement the GUI and graph drawing - the Oscilloscope object talks to the motes and coordinates the other objects Synchronization is handled through the Oscilloscope object. Any operation that reads or writes the mote data must be synchronized on Oscilloscope. Note that the messageReceived method below is synchronized, so no further synchronization is needed when updating state based on received messages. */ public class Oscilloscope implements MessageListener { MoteIF mote; Data data; Window window; /* The current sampling period. If we receive a message from a mote with a newer version, we update our interval. If we receive a message with an older version, we broadcast a message with the current interval and version. If the user changes the interval, we increment the version and broadcast the new interval and version. */ int interval = Constants.DEFAULT_INTERVAL; int version = -1; /* Main entry point */ void run() { data = new Data(this); window = new Window(this); window.setup(); mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(new OscilloscopeMsg(), this); } /* The data object has informed us that nodeId is a previously unknown mote. Update the GUI. */ void newNode(int nodeId) { window.newNode(nodeId); } public synchronized void messageReceived(int dest_addr, Message msg) { if (msg instanceof OscilloscopeMsg) { OscilloscopeMsg omsg = (OscilloscopeMsg)msg; /* Update interval and mote data */ periodUpdate(omsg.get_version(), omsg.get_interval()); data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings()); /* Inform the GUI that new data showed up */ window.newData(); } } /* A potentially new version and interval has been received from the mote */ void periodUpdate(int moteVersion, int moteInterval) { if (moteVersion > version) { /* It's new. Update our vision of the interval. */ version = moteVersion; interval = moteInterval; window.updateSamplePeriod(); } else if (moteVersion < version) { /* It's old. Update the mote's vision of the interval. */ sendInterval(); } } /* The user wants to set the interval to newPeriod. Refuse bogus values and return false, or accept the change, broadcast it, and return true */ synchronized boolean setInterval(int newPeriod) { if (newPeriod < 1 || newPeriod > 65535) { return false; } interval = newPeriod; version++; sendInterval(); return true; } /* Broadcast a version+interval message. */ void sendInterval() { OscilloscopeMsg omsg = new OscilloscopeMsg(); omsg.set_version(version); omsg.set_interval(interval); try { mote.send(MoteIF.TOS_BCAST_ADDR, omsg); } catch (IOException e) { window.error("Cannot send message to mote"); } } /* User wants to clear all data. */ void clear() { data = new Data(this); } public static void main(String[] args) { Oscilloscope me = new Oscilloscope(); me.run(); } } tinyos-2.1.2+dfsg/apps/Oscilloscope/java/Window.java000066400000000000000000000213101207233610700224120ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import javax.swing.event.*; import java.awt.*; import java.awt.event.*; import java.util.*; /* The main GUI object. Build the GUI and coordinate all user activities */ class Window { Oscilloscope parent; Graph graph; Font smallFont = new Font("Dialog", Font.PLAIN, 8); Font boldFont = new Font("Dialog", Font.BOLD, 12); Font normalFont = new Font("Dialog", Font.PLAIN, 12); MoteTableModel moteListModel; // GUI view of mote list JLabel xLabel; // Label displaying X axis range JTextField sampleText, yText; // inputs for sample period and Y axis range JFrame frame; Window(Oscilloscope parent) { this.parent = parent; } /* A model for the mote table, and general utility operations on the mote list */ class MoteTableModel extends AbstractTableModel { private ArrayList motes = new ArrayList(); private ArrayList colors = new ArrayList(); /* Initial mote colors cycle through this list. Add more colors if you want. */ private Color[] cycle = { Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA, Color.YELLOW, Color.GRAY, Color.YELLOW }; int cycleIndex; /* TableModel methods for achieving our table appearance */ public String getColumnName(int col) { if (col == 0) { return "Mote"; } else { return "Color"; } } public int getColumnCount() { return 2; } public synchronized int getRowCount() { return motes.size(); } public synchronized Object getValueAt(int row, int col) { if (col == 0) { return motes.get(row); } else { return colors.get(row); } } public Class getColumnClass(int col) { return getValueAt(0, col).getClass(); } public boolean isCellEditable(int row, int col) { return col == 1; } public synchronized void setValueAt(Object value, int row, int col) { colors.set(row, (Color)value); fireTableCellUpdated(row, col); graph.repaint(); } /* Return mote id of i'th mote */ int get(int i) { return (motes.get(i)).intValue(); } /* Return color of i'th mote */ Color getColor(int i) { return colors.get(i); } /* Return number of motes */ int size() { return motes.size(); } /* Add a new mote */ synchronized void newNode(int nodeId) { /* Shock, horror. No binary search. */ int i, len = motes.size(); for (i = 0; ; i++) { if (i == len || nodeId < get(i)) { motes.add(i, new Integer(nodeId)); // Cycle through a set of initial colors colors.add(i, cycle[cycleIndex++ % cycle.length]); break; } } fireTableRowsInserted(i, i); } /* Remove all motes */ void clear() { motes = new ArrayList(); colors = new ArrayList(); fireTableDataChanged(); } } /* End of MoteTableModel */ /* A simple full-color cell */ static class MoteColor extends JLabel implements TableCellRenderer { public MoteColor() { setOpaque(true); } public Component getTableCellRendererComponent (JTable table, Object color, boolean isSelected, boolean hasFocus, int row, int column) { setBackground((Color)color); return this; } } /* Convenience methods for making buttons, labels and textfields. Simplifies code and ensures a consistent style. */ JButton makeButton(String label, ActionListener action) { JButton button = new JButton(); button.setText(label); button.setFont(boldFont); button.addActionListener(action); return button; } JLabel makeLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(boldFont); return label; } JLabel makeSmallLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(smallFont); return label; } JTextField makeTextField(int columns, ActionListener action) { JTextField tf = new JTextField(columns); tf.setFont(normalFont); tf.setMaximumSize(tf.getPreferredSize()); tf.addActionListener(action); return tf; } /* Build the GUI */ void setup() { JPanel main = new JPanel(new BorderLayout()); main.setMinimumSize(new Dimension(500, 250)); main.setPreferredSize(new Dimension(800, 400)); // Three panels: mote list, graph, controls moteListModel = new MoteTableModel(); JTable moteList = new JTable(moteListModel); moteList.setDefaultRenderer(Color.class, new MoteColor()); moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color")); moteList.setPreferredScrollableViewportSize(new Dimension(100, 400)); JScrollPane motePanel = new JScrollPane(); motePanel.getViewport().add(moteList, null); main.add(motePanel, BorderLayout.WEST); graph = new Graph(this); main.add(graph, BorderLayout.CENTER); // Controls. Organised using box layouts. // Sample period. JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT); sampleText = makeTextField(6, new ActionListener() { public void actionPerformed(ActionEvent e) { setSamplePeriod(); } } ); updateSamplePeriod(); // Clear data. JButton clearButton = makeButton("Clear data", new ActionListener() { public void actionPerformed(ActionEvent e) { clearData(); } } ); // Adjust X-axis zoom. Box xControl = new Box(BoxLayout.Y_AXIS); xLabel = makeLabel("", JLabel.CENTER); final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale); Hashtable xTable = new Hashtable(); for (int i = 0; i <= 8; i += 2) { xTable.put(new Integer(i), makeSmallLabel("" + (Graph.MIN_WIDTH << i), JLabel.CENTER)); } xSlider.setLabelTable(xTable); xSlider.setPaintLabels(true); graph.updateXLabel(); graph.setScale(graph.scale); xSlider.addChangeListener(new ChangeListener() { public void stateChanged(ChangeEvent e) { //if (!xSlider.getValueIsAdjusting()) graph.setScale((int)xSlider.getValue()); } }); xControl.add(xLabel); xControl.add(xSlider); // Adjust Y-axis range. JLabel yLabel = makeLabel("Y:", JLabel.RIGHT); yText = makeTextField(12, new ActionListener() { public void actionPerformed(ActionEvent e) { setYAxis(); } } ); yText.setText(graph.gy0 + " - " + graph.gy1); Box controls = new Box(BoxLayout.X_AXIS); controls.add(clearButton); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(sampleLabel); controls.add(sampleText); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(xControl); controls.add(yLabel); controls.add(yText); main.add(controls, BorderLayout.SOUTH); // The frame part frame = new JFrame("Oscilloscope"); frame.setSize(main.getPreferredSize()); frame.getContentPane().add(main); frame.setVisible(true); frame.addWindowListener(new WindowAdapter() { public void windowClosing(WindowEvent e) { System.exit(0); } }); } /* User operation: clear data */ void clearData() { synchronized (parent) { moteListModel.clear(); parent.clear(); graph.newData(); } } /* User operation: set Y-axis range. */ void setYAxis() { String val = yText.getText(); try { int dash = val.indexOf('-'); if (dash >= 0) { String min = val.substring(0, dash).trim(); String max = val.substring(dash + 1).trim(); if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max))) { error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)"); } return; } } catch (NumberFormatException e) { } error("Invalid range " + val + " (expected NN-MM)"); } /* User operation: set sample period. */ void setSamplePeriod() { String periodS = sampleText.getText().trim(); try { int newPeriod = Integer.parseInt(periodS); if (parent.setInterval(newPeriod)) { return; } } catch (NumberFormatException e) { } error("Invalid sample period " + periodS); } /* Notification: sample period changed. */ void updateSamplePeriod() { sampleText.setText("" + parent.interval); } /* Notification: new node. */ void newNode(int nodeId) { moteListModel.newNode(nodeId); } /* Notification: new data. */ void newData() { graph.newData(); } void error(String msg) { JOptionPane.showMessageDialog(frame, msg, "Error", JOptionPane.ERROR_MESSAGE); } } tinyos-2.1.2+dfsg/apps/Oscilloscope/java/build.xml000066400000000000000000000006101207233610700221210ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/Oscilloscope/java/oscilloscope.jar000066400000000000000000000455011207233610700235040ustar00rootroot00000000000000PK8 META-INF/PKPK8META-INF/MANIFEST.MFMLK-. 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IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Configuration for the PowerUp application. * * @author Cory Sharp */ configuration PowerupAppC{} implementation { components MainC, PowerupC, LedsC; MainC.Boot <- PowerupC; PowerupC -> LedsC.Leds; } tinyos-2.1.2+dfsg/apps/Powerup/PowerupC.nc000066400000000000000000000044251207233610700204600ustar00rootroot00000000000000// $Id: PowerupC.nc,v 1.6 2010-06-29 22:07:17 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * This module turns on Led0 when the system boots. * * @author Cory Sharp */ module PowerupC @safe() { uses interface Boot; uses interface Leds; } implementation { event void Boot.booted() { call Leds.led0On(); } } tinyos-2.1.2+dfsg/apps/Powerup/README.txt000066400000000000000000000006301207233610700200620ustar00rootroot00000000000000$Id: README.txt,v 1.4 2006-12-12 18:22:48 vlahan Exp $ README for Powerup Author/Contact: tinyos-help@millennium.berkeley.edu @author Cory Sharp Description: Powerup turns on the red LED on powerup. It is useful to test that the build environment is functional and that an application correctly installs on a piece of hardware. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/PppRouter/000077500000000000000000000000001207233610700166645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/PppRouter/Makefile000066400000000000000000000012511207233610700203230ustar00rootroot00000000000000COMPONENT=PppRouterC # PFLAGS += -DENABLE_SPI0_DMA # PFLAGS += -DCC2420_DEF_CHANNEL=21 # use rpl PFLAGS += -DRPL_ROUTING -DRPL_STORING_MODE -I$(LOWPAN_ROOT)/tos/lib/net/rpl # PFLAGS += -DRPL_OF_MRHOF # and ppp PFLAGS += -I$(TOSDIR)/lib/ppp PFLAGS += -I$(TOSDIR)/lib/fragpool # this works around fragmentation in the RX buffer pool PFLAGS += -DPPP_HDLC_RX_FRAME_LIMIT=1 -DPPP_HDLC_TX_FRAME_LIMIT=8 # if you set this, the stack won't use dhcp to assign addresses -- it # will use this prefix combined with TOS_NODE_ID PFLAGS += -DIN6_PREFIX=\"fec0::\" # derive short address from the dhcp address assignment, if possible PFLAGS += -DBLIP_DERIVE_SHORTADDRS include $(MAKERULES) tinyos-2.1.2+dfsg/apps/PppRouter/PppRouterC.nc000066400000000000000000000033741207233610700212600ustar00rootroot00000000000000 #include #include "ppp.h" configuration PppRouterC { } implementation { components PppRouterP; components MainC; PppRouterP.Boot -> MainC; components LedsC as LedsC; PppRouterP.Leds -> LedsC; components PppDaemonC; PppRouterP.PppControl -> PppDaemonC; components PppIpv6C; PppDaemonC.PppProtocol[PppIpv6C.ControlProtocol] -> PppIpv6C.PppControlProtocol; PppDaemonC.PppProtocol[PppIpv6C.Protocol] -> PppIpv6C.PppProtocol; PppIpv6C.Ppp -> PppDaemonC; PppIpv6C.LowerLcpAutomaton -> PppDaemonC; PppRouterP.Ipv6LcpAutomaton -> PppIpv6C; PppRouterP.PppIpv6 -> PppIpv6C; PppRouterP.Ppp -> PppDaemonC; #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) components PlatformHdlcUartC as HdlcUartC; #else components DefaultHdlcUartC as HdlcUartC; #endif PppDaemonC.HdlcUart -> HdlcUartC; PppDaemonC.UartControl -> HdlcUartC; // SDH : don't bother including the PppPrintfC by default // components PppPrintfC, PppC;; // PppPrintfC.Ppp -> PppDaemonC; // PppDaemonC.PppProtocol[PppPrintfC.Protocol] -> PppPrintfC; // PppPrintfC.Ppp -> PppC; components IPStackC, IPForwardingEngineP, IPPacketC; IPForwardingEngineP.IPForward[ROUTE_IFACE_PPP] -> PppRouterP.IPForward; PppRouterP.IPControl -> IPStackC; PppRouterP.ForwardingTable -> IPStackC; PppRouterP.IPPacket -> IPPacketC; #ifdef RPL_ROUTING components RPLRoutingC, RplBorderRouterP; PppRouterP.RootControl -> RPLRoutingC; RplBorderRouterP.ForwardingEvents -> IPStackC.ForwardingEvents[ROUTE_IFACE_PPP]; RplBorderRouterP.IPPacket -> IPPacketC; #endif // UDP shell on port 2000 components UDPShellC; // prints the routing table components RouteCmdC; #ifndef IN6_PREFIX components Dhcp6ClientC; PppRouterP.Dhcp6Info -> Dhcp6ClientC; #endif } tinyos-2.1.2+dfsg/apps/PppRouter/PppRouterP.nc000066400000000000000000000062301207233610700212670ustar00rootroot00000000000000 #include #include #include #include #include #include "pppipv6.h" #include "blip_printf.h" module PppRouterP { provides { interface IPForward; } uses { interface Boot; interface Leds; interface SplitControl as IPControl; interface SplitControl as PppControl; interface LcpAutomaton as Ipv6LcpAutomaton; interface PppIpv6; interface Ppp; interface ForwardingTable; interface RootControl; interface Dhcp6Info; interface IPPacket; } } implementation { event void PppIpv6.linkUp() {} event void PppIpv6.linkDown() {} event void Ipv6LcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } event void Ipv6LcpAutomaton.thisLayerUp () { } event void Ipv6LcpAutomaton.thisLayerDown () { } event void Ipv6LcpAutomaton.thisLayerStarted () { } event void Ipv6LcpAutomaton.thisLayerFinished () { } event void PppControl.startDone (error_t error) { } event void PppControl.stopDone (error_t error) { } event void IPControl.startDone (error_t error) { struct in6_addr dhcp6_group; // add a route to the dhcp group on PPP, not the radio (which is the default) inet_pton6(DH6ADDR_ALLAGENT, &dhcp6_group); call ForwardingTable.addRoute(dhcp6_group.s6_addr, 128, NULL, ROUTE_IFACE_PPP); // add a default route through the PPP link call ForwardingTable.addRoute(NULL, 0, NULL, ROUTE_IFACE_PPP); } event void IPControl.stopDone (error_t error) { } event void Boot.booted() { error_t rc; #ifndef PRINTFUART_ENABLED rc = call Ipv6LcpAutomaton.open(); rc = call PppControl.start(); #endif #ifdef RPL_ROUTING call RootControl.setRoot(); #endif #ifndef IN6_PREFIX call Dhcp6Info.useUnicast(FALSE); #endif call IPControl.start(); } event error_t PppIpv6.receive(const uint8_t* data, unsigned int len) { struct ip6_hdr *iph = (struct ip6_hdr *)data; void *payload = (iph + 1); call Leds.led0Toggle(); signal IPForward.recv(iph, payload, NULL); return SUCCESS; } command error_t IPForward.send(struct in6_addr *next_hop, struct ip6_packet *msg, void *data) { size_t len = iov_len(msg->ip6_data) + sizeof(struct ip6_hdr); error_t rc; frame_key_t key; const uint8_t* fpe; uint8_t* fp; if (!call PppIpv6.linkIsUp()) return EOFF; // get an output frame fp = call Ppp.getOutputFrame(PppProtocol_Ipv6, &fpe, FALSE, &key); if ((! fp) || ((fpe - fp) < len)) { if (fp) { call Ppp.releaseOutputFrame(key); } call Leds.led2Toggle(); return ENOMEM; } // copy the header and body into the frame memcpy(fp, &msg->ip6_hdr, sizeof(struct ip6_hdr)); iov_read(msg->ip6_data, 0, len, fp + sizeof(struct ip6_hdr)); rc = call Ppp.fixOutputFrameLength(key, fp + len); if (SUCCESS == rc) { rc = call Ppp.sendOutputFrame(key); } call Leds.led1Toggle(); return rc; } event void Ppp.outputFrameTransmitted (frame_key_t key, error_t err) { } } tinyos-2.1.2+dfsg/apps/PppRouter/README.blip000066400000000000000000000147541207233610700205040ustar00rootroot00000000000000 blip-2.0 development tree This tree contains support for a stack built on top of: draft-6lowpan-hc-06 for IPv6 header compression draft-roll-rpl-17 for IPv6 routing linux ppp for communicating with external networks - from the peoplepower osian stack - merged in from the osian-squashed-ppp branch dhcpv6 for doing address assignment We track trunk, periodically re-merging. In the future this release will be integrated with trunk. TOSROOT=/home/sdawson/svn/blip-rpl-devel TOSDIR=/home/sdawson/svn/blip-rpl-devel/tos MAKERULES=/home/sdawson/svn/blip-rpl-devel/support/make/Makerules Some of the apps are tight on code space (PppRouter). You should use mspgcc4 (http://mspgcc4.sourceforge.net/) to compile, since it generates 5-10% code size reductions when used with -Os. Address assignment ======================================== The stack either assigns IPv6 addresses statically at compile time, or dynamically using DHCPv6. It is configured to use static addressing out of the box. By default, each mote configures itsself with three addresses: two link-local addresses and one global address on the prefix fec0::/64. == Static Address Mode == Static addressing is selected by defining the IN6_PREFIX macro at compile time; this is set by default for PppRouter and UDPEcho. The 802.15.4 interface is assigned three addresses: Link-local address 1 is configured from the unique EUI-64 obtained from the DS2411 serial chip. If you want to figure out what address a mote has, you can install the apps/tests/TestEui app (make epic msp-hack) and then look at the printf output: "stty -F /dev/ttyUSB0 57600 && tail -f /dev/ttyUSB0" Link-local address 2 is chosen based on the panid and nodeid as specified in RFC4944. The default panid is 0x22, so if you install an image with ID=1, the corresponding link-local address would be fe80::22:ff:fe00:1. Note that the Unique/Local bit in the IPv6 Interface Identifier is not set for addresses derived from the 16-bit id, but is set when using the EUI-64. For instance, if my EUI-64 is 00:17:3B:00:11:0F:FD, the corresponding IPv6 link-local address is fe80::2:173B:11:0FFD. The U/L bit has been toggled. Finally, a global address is configured using the prefix defined at compile time. The default prefix is fec0::/64, so if the node id is 1, the ipv6 address is fec0::1. You can disable all global addresses by defining IN6_NO_GLOBAL in your Makefile. Summary: IN6_NO_GLOBAL : disable global addresses, only link-local IN6_PREFIX : configure a global address using the specified prefix. == DHCPv6 Address Mode == If IN6_PREFIX is not set, blip instead assumes that you wish to assign addresses using DHCP. This requres running a DHCPv6 server somewhere in your network; I use dibbler with a small patch to reduce the size of the messages. In this architecture, motes configure themselves only with link-local address 1 (based on the EUI-64) on boot. They send DHCPv6 solicitations to the link-local dhcpv6 all-agents multicast group to find neighboring servers or relay agents. Each router also runs a DHCPv6 relay agent, which forwards address solications up the routing tree to the edge where the DHCPv6 server is presumed to be located. Once the DHCPv6 server has assigned the mote a global address (based on its configuration), the mote will attempt to assign itsself a 16-bit address based on the assigned address; it then starts running the routing protocol (RPL). The only way to find out what address a mote has received is by looking in the DHCP logs; the allocation request contains the mote's EUI-64, so it is possible to configure the server to maintain a consistent mapping between EUI-64's and short addresses. Compile and install PppRouterC ======================================== PppRouterC is an application which advertises itsself as a RPL DODAG root. It also has a second ppp interface which allows it to route packets between the 6lowpan network and other networks. $ cd $TOSROOT/apps/PppRouter $ make epic blip Then install it on a mote with ID 1 -- static addressing is default. You should then be able to initiate a ppp connection with that mote using: $ pppd debug passive noauth nodetach 115200 /dev/ttyUSB0 nocrtscts nocdtrcts lcp-echo-interval 0 noccp noip ipv6 ::23,::24 $ ifconfig ppp0 add fec0::100/64 as root. A few notes - Once this link is up, you need to assign it a routable address on the prefix; that's what the second command does. The ppp stack has some trouble on the tmote and epic platforms due to timing issues. You may want to try out different baud rates; you can do this by mirroring tos/platforms/telosa/TelosSerialP.nc in your app directory and changing the baud rate defines in there. I've found that 38400 is a pretty good compromise. We may go back to a DMA solution for this in the future to fix this problem at higher baud rates. == More good stuff == Once you have a ppp connection working, you can use the udp shell on the ppp node to look at the routing table: Type the following command, then type "route\n" $ nc6 -u fec0::1 2000 route destination gateway iface ff02::1:2/128 :: ppp fec0::f6/128 fe80::22:ff:fe00:f6 pan fec0::a4/128 fe80::22:ff:fe00:a4 pan ::/0 :: ppp In this example, the other nodes have been assigned dhcpv6 addresses, and RPL provisioned downward routes in the forwarding table using the DAOs. UDPEcho ======================================== The stock image for motes not needing ppp is UDPEcho -- make and install it the same way $ cd $TOSROOT/apps/UDPEcho $ make epic blip install.2 bsl,/dev/ttyUSB1 Since we're not using DHCP here, we give it a new address based on TOS_NODE_ID. You can use the udp shell to inspect his routing table, as well: $ nc6 -u fec0::2 2000 route destination gateway iface ::/0 fe80::22:ff:fe00:2 pan As you can see, RPL has provisioned a default route through the PPP edge router. For more fun, you can ping the link-local all-nodes multicast group to see who your neighbors are: $ nc6 -u fec0::f6 2000 ping6 ff02::1 fe80::22:ff:fe00:e0 icmp_seq=0 ttl=1 time=52 ms fe80::22:ff:fe00:a4 icmp_seq=0 ttl=1 time=83 ms ... fe80::22:ff:fe00:e0 icmp_seq=9 ttl=1 time=46 ms fe80::22:ff:fe00:a4 icmp_seq=9 ttl=1 time=76 ms 10 packets transmitted, 20 received Finally, if you're using DHCP the 'leases' command will show you your lease: leases lease on fec0::f6 iaid: 1 valid: 3265 t1: 3600 t2: 5400 duid: 00:01:00:01:14:7a:bc:51:00:50:8d:ca:5a:06 tinyos-2.1.2+dfsg/apps/PppRouter/RplBorderRouterP.nc000066400000000000000000000024601207233610700224240ustar00rootroot00000000000000 /** * When packets leave a RPL domain, we're need to remove and RPL * headers which have been inserted and/or reencapsulate the packet. * This component hooks into the forwarding path to do this by * converting any RPL TLV options in IPv6 hop-by-hop options header to * PadN options. * * @author Stephen Dawson-Haggerty */ #include #include #include module RplBorderRouterP { uses { interface ForwardingEvents; interface IPPacket; } } implementation { event bool ForwardingEvents.initiate(struct ip6_packet *pkt, struct in6_addr *next_hop) { return TRUE; } event bool ForwardingEvents.approve(struct ip6_packet *pkt, struct in6_addr *next_hop) { int off; uint8_t nxt = IPV6_HOP; if (pkt->ip6_inputif == ROUTE_IFACE_PPP) return FALSE; /* remove any RPL options in the hop-by-hop header by converting them to a PadN option */ off = call IPPacket.findHeader(pkt->ip6_data, pkt->ip6_hdr.ip6_nxt, &nxt); if (off < 0) return TRUE; call IPPacket.delTLV(pkt->ip6_data, off, RPL_HBH_RANK_TYPE); return TRUE; } event void ForwardingEvents.linkResult(struct in6_addr *dest, struct send_info *info) { } } tinyos-2.1.2+dfsg/apps/RadioCountToLeds/000077500000000000000000000000001207233610700201065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/RadioCountToLeds/Makefile000066400000000000000000000010501207233610700215420ustar00rootroot00000000000000COMPONENT=RadioCountToLedsAppC BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class CLEAN_EXTRA = RadioCountMsg.py RadioCountMsg.class RadioCountMsg.java RadioCountMsg.py: RadioCountToLeds.h mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToLeds.h radio_count_msg -o $@ RadioCountMsg.class: RadioCountMsg.java javac RadioCountMsg.java RadioCountMsg.java: RadioCountToLeds.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioCountMsg RadioCountToLeds.h radio_count_msg -o $@ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/RadioCountToLeds/README.txt000066400000000000000000000013471207233610700216110ustar00rootroot00000000000000README for RadioCountToLeds Author/Contact: tinyos-help@millennium.berkeley.edu Description: RadioCountToLeds maintains a 4Hz counter, broadcasting its value in an AM packet every time it gets updated. A RadioCountToLeds node that hears a counter displays the bottom three bits on its LEDs. This application is a useful test to show that basic AM communication and timers work. Tools: After compiling, RadioCountMsg.java and RadioCountMsg.py files will be created. RadioCountMsg.java is a Java class representing the message that this application sends. RadioCountMsg.py is a Python class representing the message that this application sends. Known bugs/limitations: None. $Id: README.txt,v 1.5 2007-07-10 20:01:58 klueska Exp $ tinyos-2.1.2+dfsg/apps/RadioCountToLeds/RadioCountToLeds.h000066400000000000000000000041701207233610700234430ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef RADIO_COUNT_TO_LEDS_H #define RADIO_COUNT_TO_LEDS_H typedef nx_struct radio_count_msg { nx_uint16_t counter; } radio_count_msg_t; enum { AM_RADIO_COUNT_MSG = 6, }; #endif tinyos-2.1.2+dfsg/apps/RadioCountToLeds/RadioCountToLedsAppC.nc000066400000000000000000000056571207233610700243730ustar00rootroot00000000000000// $Id: RadioCountToLedsAppC.nc,v 1.5 2010-06-29 22:07:17 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "RadioCountToLeds.h" /** * Configuration for the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. * * @author Philip Levis * @date June 6 2005 */ configuration RadioCountToLedsAppC {} implementation { components MainC, RadioCountToLedsC as App, LedsC; components new AMSenderC(AM_RADIO_COUNT_MSG); components new AMReceiverC(AM_RADIO_COUNT_MSG); components new TimerMilliC(); components ActiveMessageC; App.Boot -> MainC.Boot; App.Receive -> AMReceiverC; App.AMSend -> AMSenderC; App.AMControl -> ActiveMessageC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> AMSenderC; } tinyos-2.1.2+dfsg/apps/RadioCountToLeds/RadioCountToLedsC.nc000066400000000000000000000106401207233610700237160ustar00rootroot00000000000000// $Id: RadioCountToLedsC.nc,v 1.7 2010-06-29 22:07:17 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Timer.h" #include "RadioCountToLeds.h" /** * Implementation of the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. * * @author Philip Levis * @date June 6 2005 */ module RadioCountToLedsC @safe() { uses { interface Leds; interface Boot; interface Receive; interface AMSend; interface Timer as MilliTimer; interface SplitControl as AMControl; interface Packet; } } implementation { message_t packet; bool locked; uint16_t counter = 0; event void Boot.booted() { call AMControl.start(); } event void AMControl.startDone(error_t err) { if (err == SUCCESS) { call MilliTimer.startPeriodic(250); } else { call AMControl.start(); } } event void AMControl.stopDone(error_t err) { // do nothing } event void MilliTimer.fired() { counter++; dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter); if (locked) { return; } else { radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(&packet, sizeof(radio_count_msg_t)); if (rcm == NULL) { return; } rcm->counter = counter; if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_count_msg_t)) == SUCCESS) { dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter); locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len); if (len != sizeof(radio_count_msg_t)) {return bufPtr;} else { radio_count_msg_t* rcm = (radio_count_msg_t*)payload; if (rcm->counter & 0x1) { call Leds.led0On(); } else { call Leds.led0Off(); } if (rcm->counter & 0x2) { call Leds.led1On(); } else { call Leds.led1Off(); } if (rcm->counter & 0x4) { call Leds.led2On(); } else { call Leds.led2Off(); } return bufPtr; } } event void AMSend.sendDone(message_t* bufPtr, error_t error) { if (&packet == bufPtr) { locked = FALSE; } } } tinyos-2.1.2+dfsg/apps/RadioSenseToLeds/000077500000000000000000000000001207233610700200735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/RadioSenseToLeds/Makefile000066400000000000000000000007421207233610700215360ustar00rootroot00000000000000COMPONENT=RadioSenseToLedsAppC BUILD_EXTRA_DEPS = RadioSenseMsg.py RadioSenseMsg.class RadioSenseMsg.py: RadioSenseToLeds.h mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioSenseMsg RadioSenseToLeds.h radio_sense_msg -o $@ RadioSenseMsg.class: RadioSenseMsg.java javac RadioSenseMsg.java RadioSenseMsg.java: RadioSenseToLeds.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioSenseMsg RadioSenseToLeds.h radio_sense_msg -o $@ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/RadioSenseToLeds/README.txt000066400000000000000000000014101207233610700215650ustar00rootroot00000000000000README for RadioSenseToLeds Author/Contact: tinyos-help@millennium.berkeley.edu Description: RadioSenseToLeds samples a platform's default sensor at 4Hz and broadcasts this value in an AM packet. A RadioSenseToLeds node that hears a broadcast displays the bottom three bits of the value it has received. This application is a useful test to show that basic AM communication, timers, and the default sensor work. Tools: After compiling, RadioSenseMsg.java and RadioSenseMsg.py files will be created. RadioSenseMsg.java is a Java class representing the message that this application sends. RadioSenseMsg.py is a Python class representing the message that this application sends. Known bugs/limitations: None. $Id: README.txt,v 1.5 2007-07-10 20:03:30 klueska Exp $ tinyos-2.1.2+dfsg/apps/RadioSenseToLeds/RadioSenseToLeds.h000066400000000000000000000042121207233610700234120ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef RADIO_SENSE_TO_LEDS_H #define RADIO_SENSE_TO_LEDS_H typedef nx_struct radio_sense_msg { nx_uint16_t error; nx_uint16_t data; } radio_sense_msg_t; enum { AM_RADIO_SENSE_MSG = 7, }; #endif tinyos-2.1.2+dfsg/apps/RadioSenseToLeds/RadioSenseToLedsAppC.nc000066400000000000000000000060021207233610700243260ustar00rootroot00000000000000// $Id: RadioSenseToLedsAppC.nc,v 1.5 2010-06-29 22:07:17 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "RadioSenseToLeds.h" /** * Configuration for the RadioSenseToLeds application. RadioSenseToLeds samples * a platform's default sensor at 4Hz and broadcasts this value in an AM packet. * A RadioSenseToLeds node that hears a broadcast displays the bottom three bits * of the value it has received. This application is a useful test to show that * basic AM communication, timers, and the default sensor work. * * @author Philip Levis * @date June 6 2005 */ configuration RadioSenseToLedsAppC {} implementation { components MainC, RadioSenseToLedsC as App, LedsC, new DemoSensorC(); components ActiveMessageC; components new AMSenderC(AM_RADIO_SENSE_MSG); components new AMReceiverC(AM_RADIO_SENSE_MSG); components new TimerMilliC(); App.Boot -> MainC.Boot; App.Receive -> AMReceiverC; App.AMSend -> AMSenderC; App.RadioControl -> ActiveMessageC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> AMSenderC; App.Read -> DemoSensorC; } tinyos-2.1.2+dfsg/apps/RadioSenseToLeds/RadioSenseToLedsC.nc000066400000000000000000000104451207233610700236730ustar00rootroot00000000000000// $Id: RadioSenseToLedsC.nc,v 1.7 2010-06-29 22:07:17 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Timer.h" #include "RadioSenseToLeds.h" /** * Implementation of the RadioSenseToLeds application. RadioSenseToLeds samples * a platform's default sensor at 4Hz and broadcasts this value in an AM packet. * A RadioSenseToLeds node that hears a broadcast displays the bottom three bits * of the value it has received. This application is a useful test to show that * basic AM communication, timers, and the default sensor work. * * @author Philip Levis * @date June 6 2005 */ module RadioSenseToLedsC @safe(){ uses { interface Leds; interface Boot; interface Receive; interface AMSend; interface Timer as MilliTimer; interface Packet; interface Read; interface SplitControl as RadioControl; } } implementation { message_t packet; bool locked = FALSE; event void Boot.booted() { call RadioControl.start(); } event void RadioControl.startDone(error_t err) { if (err == SUCCESS) { call MilliTimer.startPeriodic(250); } } event void RadioControl.stopDone(error_t err) {} event void MilliTimer.fired() { call Read.read(); } event void Read.readDone(error_t result, uint16_t data) { if (locked) { return; } else { radio_sense_msg_t* rsm; rsm = (radio_sense_msg_t*)call Packet.getPayload(&packet, sizeof(radio_sense_msg_t)); if (rsm == NULL) { return; } rsm->error = result; rsm->data = data; if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_sense_msg_t)) == SUCCESS) { locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { call Leds.led1Toggle(); if (len != sizeof(radio_sense_msg_t)) {return bufPtr;} else { radio_sense_msg_t* rsm = (radio_sense_msg_t*)payload; uint16_t val = rsm->data; if (val & 0x0004) call Leds.led2On(); else call Leds.led2Off(); if (val & 0x0002) call Leds.led1On(); else call Leds.led1Off(); if (val & 0x0001) call Leds.led0On(); else call Leds.led0Off(); return bufPtr; } } event void AMSend.sendDone(message_t* bufPtr, error_t error) { if (&packet == bufPtr) { locked = FALSE; } } } tinyos-2.1.2+dfsg/apps/Sense/000077500000000000000000000000001207233610700160015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/Sense/Makefile000066400000000000000000000000521207233610700174360ustar00rootroot00000000000000COMPONENT=SenseAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/Sense/README.txt000066400000000000000000000007001207233610700174740ustar00rootroot00000000000000README for Sense Author/Contact: tinyos-help@millennium.berkeley.edu Description: Sense is a simple sensing demo application. It periodically samples the default sensor and displays the bottom bits of the readings on the leds of the node. Have a look at tinyos-2.x/doc/html/tutorial/lesson5.html for a general tutorial on sensing in TinyOS. Tools: None. Known bugs/limitations: None. $Id: README.txt,v 1.4 2006-12-12 18:22:49 vlahan Exp $ tinyos-2.1.2+dfsg/apps/Sense/SenseAppC.nc000066400000000000000000000044111207233610700201440ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:22:49 $ * @author: Jan Hauer * ======================================================================== */ /** * * Sensing demo application. See README.txt file in this directory for usage * instructions and have a look at tinyos-2.x/doc/html/tutorial/lesson5.html * for a general tutorial on sensing in TinyOS. * * @author Jan Hauer */ configuration SenseAppC { } implementation { components SenseC, MainC, LedsC, new TimerMilliC(), new DemoSensorC() as Sensor; SenseC.Boot -> MainC; SenseC.Leds -> LedsC; SenseC.Timer -> TimerMilliC; SenseC.Read -> Sensor; } tinyos-2.1.2+dfsg/apps/Sense/SenseC.nc000066400000000000000000000054351207233610700175120ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:22:49 $ * @author: Jan Hauer * ======================================================================== */ /** * * Sensing demo application. See README.txt file in this directory for usage * instructions and have a look at tinyos-2.x/doc/html/tutorial/lesson5.html * for a general tutorial on sensing in TinyOS. * * @author Jan Hauer */ #include "Timer.h" module SenseC { uses { interface Boot; interface Leds; interface Timer; interface Read; } } implementation { // sampling frequency in binary milliseconds #define SAMPLING_FREQUENCY 100 event void Boot.booted() { call Timer.startPeriodic(SAMPLING_FREQUENCY); } event void Timer.fired() { call Read.read(); } event void Read.readDone(error_t result, uint16_t data) { if (result == SUCCESS){ if (data & 0x0004) call Leds.led2On(); else call Leds.led2Off(); if (data & 0x0002) call Leds.led1On(); else call Leds.led1Off(); if (data & 0x0001) call Leds.led0On(); else call Leds.led0Off(); } } } tinyos-2.1.2+dfsg/apps/TCPEcho/000077500000000000000000000000001207233610700161515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/TCPEcho/HttpdP.nc000066400000000000000000000064251207233610700177050ustar00rootroot00000000000000 module HttpdP { uses { interface Leds; interface Boot; interface Tcp; } } implementation { static char *http_okay = "HTTP/1.0 200 OK\r\n\r\n"; static int http_okay_len = 19; enum { S_IDLE, S_CONNECTED, S_REQUEST_PRE, S_REQUEST, S_HEADER, S_BODY, }; enum { HTTP_GET, HTTP_POST, }; void process_request(int verb, char *request, int len) { char reply[24]; memcpy(reply, "led0: 0 led1: 0 led2: 0\n", 24); printfUART("request: '%s'\n", request); if (len >= 10 && request[0] == '/' && request[1] == 'r' && request[2] == 'e' && request[3] == 'a' && request[4] == 'd' && request[5] == '/') { if (request[6] == 'l' && request[7] == 'e' && request[8] == 'd' && request[9] == 's') { uint8_t bitmap = call Leds.get(); call Tcp.send(http_okay, http_okay_len); if (bitmap & 1) reply[6] = '1'; if (bitmap & 2) reply[14] = '1'; if (bitmap & 4) reply[22] = '1'; call Tcp.send(reply, 24); } } call Tcp.close(); } int http_state; int req_verb; char request_buf[150], *request; char tcp_buf[100]; event void Boot.booted() { http_state = S_IDLE; call Tcp.bind(80); } event bool Tcp.accept(struct sockaddr_in6 *from, void **tx_buf, int *tx_buf_len) { if (http_state == S_IDLE) { http_state = S_CONNECTED; *tx_buf = tcp_buf; *tx_buf_len = 100; return TRUE; } printfUART("rejecting connection\n"); return FALSE; } event void Tcp.connectDone(error_t e) { } event void Tcp.recv(void *payload, uint16_t len) { static int crlf_pos; char *msg = payload; switch (http_state) { case S_CONNECTED: crlf_pos = 0; request = request_buf; if (len < 3) { call Tcp.close(); return; } if (msg[0] == 'G') { req_verb = HTTP_GET; msg += 3; len -= 3; } http_state = S_REQUEST_PRE; case S_REQUEST_PRE: while (len > 0 && *msg == ' ') { len--; msg++; } if (len == 0) break; http_state = S_REQUEST; case S_REQUEST: while (len > 0 && *msg != ' ') { *request++ = *msg++; len--; } if (len == 0) break; *request++ = '\0'; http_state = S_HEADER; case S_HEADER: while (len > 0) { switch (crlf_pos) { case 0: case 2: if (*msg == '\r') crlf_pos ++; else if (*msg == '\n') crlf_pos += 2; else crlf_pos = 0; break; case 1: case 3: if (*msg == '\n') crlf_pos ++; else crlf_pos = 0; break; } len--; msg++; // if crlf == 2, we just finished a header line. you know. fyi. if (crlf_pos == 4) { http_state = S_BODY; process_request(req_verb, request_buf, request - request_buf - 1); break; } } if (crlf_pos < 4) break; case S_BODY: // len might be zero here... just a note. default: call Tcp.close(); } } event void Tcp.closed(error_t e) { call Leds.led2Toggle(); call Tcp.bind(80); http_state = S_IDLE; } event void Tcp.acked() { } } tinyos-2.1.2+dfsg/apps/TCPEcho/Makefile000066400000000000000000000010461207233610700176120ustar00rootroot00000000000000COMPONENT=TCPEchoC # uncomment this for network programming support # BOOTLOADER=tosboot # radio opts CFLAGS += -DCC2420_DEF_CHANNEL=15 # CFLAGS += -DCC2420_DEF_RFPOWER=4 # CFLAGS += -DNO_LIB6LOWPAN_ASCII # if this is set, motes will send debugging information to the address # listed. # CFLAGS += -DREPORT_DEST=\"2001:470:1f04:56d::64\" # sim/test harness # CFLAGS += -I../IPBaseStation # CFLAGS += -DDBG_TRACK_FLOWS -DDBG_FLOWS_REPORT # printf debugs. works only on telosb/tmote sky # CFLAGS += -DPRINTFUART_ENABLED include $(MAKERULES) tinyos-2.1.2+dfsg/apps/TCPEcho/README000066400000000000000000000011441207233610700170310ustar00rootroot00000000000000 A simple application which verifies the 6loWPAN stack is functioning correctly. A mote running this will respond to ICMP Echo requests (0x80), and provide a UDP echo service on port 7 (a la rfc862). It also provides a TCP echo service on port 7, and a simple HTTP server on port 80. The only resource supported is '/read/leds'. This functionality can be used to verify that the TCP stack is functional. To build, use the 'blip' make target extra. IE, $ make blip ... For more information on setting up an IPv6 network, please see the tutorial: http://docs.tinyos.net/index.php/BLIP_Tutorial tinyos-2.1.2+dfsg/apps/TCPEcho/TCPEchoC.nc000066400000000000000000000047311207233610700200300ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include <6lowpan.h> configuration TCPEchoC { } implementation { components MainC, LedsC; components TCPEchoP; TCPEchoP.Boot -> MainC; TCPEchoP.Leds -> LedsC; components new TimerMilliC(); components IPDispatchC; TCPEchoP.RadioControl -> IPDispatchC; components new UdpSocketC() as Echo, new UdpSocketC() as Status; TCPEchoP.Echo -> Echo; components new TcpSocketC() as TcpEcho; TCPEchoP.TcpEcho -> TcpEcho; components new TcpSocketC() as TcpWeb, HttpdP; HttpdP.Boot -> MainC; HttpdP.Leds -> LedsC; HttpdP.Tcp -> TcpWeb; TCPEchoP.Status -> Status; TCPEchoP.StatusTimer -> TimerMilliC; components UdpC; TCPEchoP.IPStats -> IPDispatchC.IPStats; TCPEchoP.RouteStats -> IPDispatchC.RouteStats; TCPEchoP.ICMPStats -> IPDispatchC.ICMPStats; TCPEchoP.UDPStats -> UdpC; components RandomC; TCPEchoP.Random -> RandomC; components UDPShellC; } tinyos-2.1.2+dfsg/apps/TCPEcho/TCPEchoP.nc000066400000000000000000000111671207233610700200460ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include #include #include #include #include #include "UDPReport.h" #include "PrintfUART.h" #define REPORT_PERIOD 75L module TCPEchoP { uses { interface Boot; interface SplitControl as RadioControl; interface UDP as Echo; interface UDP as Status; interface Tcp as TcpEcho; interface Leds; interface Timer as StatusTimer; interface Statistics as IPStats; interface Statistics as RouteStats; interface Statistics as ICMPStats; interface Statistics as UDPStats; interface Random; } } implementation { bool timerStarted; nx_struct udp_report stats; struct sockaddr_in6 route_dest; #ifndef SIM #define CHECK_NODE_ID #else #define CHECK_NODE_ID if (TOS_NODE_ID == BASESTATION_ID) return #endif event void Boot.booted() { CHECK_NODE_ID; call RadioControl.start(); timerStarted = FALSE; call IPStats.clear(); call RouteStats.clear(); call ICMPStats.clear(); printfUART_init(); #ifdef REPORT_DEST route_dest.sin6_port = hton16(7000); inet_pton6(REPORT_DEST, &route_dest.sin6_addr); call StatusTimer.startOneShot(call Random.rand16() % (1024 * REPORT_PERIOD)); #endif dbg("Boot", "booted: %i\n", TOS_NODE_ID); call Echo.bind(7); call TcpEcho.bind(7); call Status.bind(7001); } event void RadioControl.startDone(error_t e) { } event void RadioControl.stopDone(error_t e) { } event void Status.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip_metadata *meta) { } event void Echo.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip_metadata *meta) { CHECK_NODE_ID; call Echo.sendto(from, data, len); } enum { STATUS_SIZE = sizeof(ip_statistics_t) + sizeof(route_statistics_t) + sizeof(icmp_statistics_t) + sizeof(udp_statistics_t), }; event void StatusTimer.fired() { if (!timerStarted) { call StatusTimer.startPeriodic(1024 * REPORT_PERIOD); timerStarted = TRUE; } stats.seqno++; stats.sender = TOS_NODE_ID; call IPStats.get(&stats.ip); call RouteStats.get(&stats.route); call ICMPStats.get(&stats.icmp); call UDPStats.get(&stats.udp); call Status.sendto(&route_dest, &stats, sizeof(stats)); } /* * Example code for setting up a TCP echo socket. */ bool sock_connected = FALSE; char tcp_buf[150]; event bool TcpEcho.accept(struct sockaddr_in6 *from, void **tx_buf, int *tx_buf_len) { *tx_buf = tcp_buf; *tx_buf_len = 150; return TRUE; } event void TcpEcho.connectDone(error_t e) { } event void TcpEcho.recv(void *payload, uint16_t len) { if (call TcpEcho.send(payload,len) != SUCCESS) call Leds.led2Toggle(); } event void TcpEcho.closed(error_t e) { call Leds.led0Toggle(); call TcpEcho.bind(7); } event void TcpEcho.acked() {} } tinyos-2.1.2+dfsg/apps/TCPEcho/UDPReport.h000066400000000000000000000035171207233610700201540ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef _UDPREPORT_H #define _UDPREPORT_H #include nx_struct udp_report { nx_uint16_t seqno; nx_uint16_t sender; ip_statistics_t ip; udp_statistics_t udp; icmp_statistics_t icmp; route_statistics_t route; } ; #endif tinyos-2.1.2+dfsg/apps/UDPEcho/000077500000000000000000000000001207233610700161535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/UDPEcho/Makefile000066400000000000000000000027611207233610700176210ustar00rootroot00000000000000COMPONENT=UDPEchoC # uncomment this for network programming support # BOOTLOADER=tosboot # radio options # CFLAGS += -DCC2420_DEF_CHANNEL=26 # CFLAGS += -DRF230_DEF_CHANNEL=26 # CFLAGS += -DCC2420_DEF_RFPOWER=4 -DENABLE_SPI0_DMA # enable dma on the radio # PFLAGS += -DENABLE_SPI0_DMA # you can compile with or without a routing protocol... of course, # without it, you will only be able to use link-local communication. PFLAGS += -DRPL_ROUTING -DRPL_STORING_MODE -I$(TOSDIR)/lib/net/rpl # PFLAGS += -DRPL_OF_MRHOF # tell the 6lowpan layer to not generate hc-compressed headers # PFLAGS += -DLIB6LOWPAN_HC_VERSION=-1 # if this is set, motes will send debugging information to the address # listed. BLIP_STATS causes blip to record statistics. # you can log this information using the util/Listener.py script # PFLAGS += -DREPORT_DEST=\"fec0::100\" -DBLIP_STATS # if you're using DHCP, set this to try and derive a 16-bit address # from the IA received from the server. This will work if the server # gives out addresses from a /112 prefix. If this is not set, blip # will only use EUI64-based link addresses. If not using DHCP, this # causes blip to use TOS_NODE_ID as short address. Otherwise the # EUI will be used in either case. PFLAGS += -DBLIP_DERIVE_SHORTADDRS # this disables dhcp and statically chooses a prefix. the motes form # their ipv6 address by combining this with TOS_NODE_ID PFLAGS += -DIN6_PREFIX=\"fec0::\" # PFLAGS += -DNEW_PRINTF_SEMANTICS -DPRINTFUART_ENABLED include $(MAKERULES) tinyos-2.1.2+dfsg/apps/UDPEcho/README000066400000000000000000000006201207233610700170310ustar00rootroot00000000000000 A simple application which verifies the 6loWPAN stack is functioning correctly. A mote running this will respond to ICMP Echo requests (0x80), and provide a UDP echo service on port 7 (a la rfc862). To build, use the 'blip' make target extra. IE, $ make blip ... For more information on setting up an IPv6 network, please see the tutorial: http://docs.tinyos.net/index.php/BLIP_2.0 tinyos-2.1.2+dfsg/apps/UDPEcho/UDPEchoC.nc000066400000000000000000000060321207233610700200300ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include configuration UDPEchoC { } implementation { components MainC, LedsC; components UDPEchoP; UDPEchoP.Boot -> MainC; UDPEchoP.Leds -> LedsC; components new TimerMilliC(); components IPStackC; UDPEchoP.RadioControl -> IPStackC; components new UdpSocketC() as Echo, new UdpSocketC() as Status; UDPEchoP.Echo -> Echo; UDPEchoP.Status -> Status; UDPEchoP.StatusTimer -> TimerMilliC; components UdpC, IPDispatchC; UDPEchoP.IPStats -> IPDispatchC; UDPEchoP.UDPStats -> UdpC; #ifdef RPL_ROUTING components RPLRoutingC; #endif components RandomC; UDPEchoP.Random -> RandomC; // UDP shell on port 2000 components UDPShellC; // prints the routing table components RouteCmdC; #ifndef IN6_PREFIX components DhcpCmdC; #endif #ifdef PRINTFUART_ENABLED /* This component wires printf directly to the serial port, and does * not use any framing. You can view the output simply by tailing * the serial device. Unlike the old printfUART, this allows us to * use PlatformSerialC to provide the serial driver. * * For instance: * $ stty -F /dev/ttyUSB0 115200 * $ tail -f /dev/ttyUSB0 */ components SerialPrintfC; /* This is the alternative printf implementation which puts the * output in framed tinyos serial messages. This lets you operate * alongside other users of the tinyos serial stack. */ // components PrintfC; // components SerialStartC; #endif } tinyos-2.1.2+dfsg/apps/UDPEcho/UDPEchoP.nc000066400000000000000000000072701207233610700200520ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include #include #include #include #include "UDPReport.h" #include "blip_printf.h" #define REPORT_PERIOD 10L module UDPEchoP { uses { interface Boot; interface SplitControl as RadioControl; interface UDP as Echo; interface UDP as Status; interface Leds; interface Timer as StatusTimer; interface BlipStatistics as IPStats; interface BlipStatistics as UDPStats; interface Random; } } implementation { bool timerStarted; nx_struct udp_report stats; struct sockaddr_in6 route_dest; event void Boot.booted() { call RadioControl.start(); timerStarted = FALSE; call IPStats.clear(); #ifdef REPORT_DEST route_dest.sin6_port = htons(7000); inet_pton6(REPORT_DEST, &route_dest.sin6_addr); call StatusTimer.startOneShot(call Random.rand16() % (1024 * REPORT_PERIOD)); #endif dbg("Boot", "booted: %i\n", TOS_NODE_ID); call Echo.bind(7); call Status.bind(7001); } event void RadioControl.startDone(error_t e) { } event void RadioControl.stopDone(error_t e) { } event void Status.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { } event void Echo.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { #ifdef PRINTFUART_ENABLED int i; uint8_t *cur = data; call Leds.led0Toggle(); printf("Echo recv [%i]: ", len); for (i = 0; i < len; i++) { printf("%02x ", cur[i]); } printf("\n"); #endif call Echo.sendto(from, data, len); } event void StatusTimer.fired() { if (!timerStarted) { call StatusTimer.startPeriodic(1024 * REPORT_PERIOD); timerStarted = TRUE; } stats.seqno++; stats.sender = TOS_NODE_ID; stats.interval = REPORT_PERIOD; call IPStats.get(&stats.ip); call UDPStats.get(&stats.udp); call Leds.led1Toggle(); call Status.sendto(&route_dest, &stats, sizeof(stats)); } } tinyos-2.1.2+dfsg/apps/UDPEcho/UDPReport.h000066400000000000000000000034641207233610700201570ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef _UDPREPORT_H #define _UDPREPORT_H #include nx_struct udp_report { nx_uint16_t seqno; nx_uint16_t sender; nx_uint16_t interval; ip_statistics_t ip; udp_statistics_t udp; } ; #endif tinyos-2.1.2+dfsg/apps/UDPEcho/tests/000077500000000000000000000000001207233610700173155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/UDPEcho/tests/echotest.pl000066400000000000000000000016661207233610700215010ustar00rootroot00000000000000#!/usr/bin/perl use strict; use warnings; use FileHandle; use IPC::Open2; if (@ARGV != 1) { print "Usage: echotest.pl \n"; exit(1); } my $alpha = "abcdefghijklmnopqrstuvwxyz1234567890ABCDEFGHIJKLMNOPQRSTUVWXYZ"; my $testbuf = ""; while (length($testbuf) < 1280 - 40 - 8) { $testbuf .= $alpha; } open2(*READER, *WRITER, "nc6 -u $ARGV[0] 7"); my $trials = 0; while (1) { my $len = int(rand(1000)); print $len . "\n"; print WRITER substr($testbuf, 0, $len) . "\n"; my $rin = ''; vec($rin,fileno(READER),1) = 1; my $found = select($rin, undef, undef, "6"); if ($found == 1) { my $foo; sysread READER, $foo, 1280; if ($foo eq $testbuf) { print "WARNING: payload mismatch\n"; } } else { print "FAILURE: len: $len\n"; } $trials++; print "TRIAL: $trials\n"; sleep(.05); } # need to kill off the nc6 process print WRITER eof; tinyos-2.1.2+dfsg/apps/UDPEcho/tests/seqtest.pl000077500000000000000000000021341207233610700213450ustar00rootroot00000000000000#!/usr/bin/perl # make sure we don't break on any length boundaries use strict; use warnings; use FileHandle; use IPC::Open2; if (@ARGV != 1) { print "Usage: seqtest.pl \n"; exit(1); } my $alpha = "abcdefghijklmnopqrstuvwxyz1234567890ABCDEFGHIJKLMNOPQRSTUVWXYZ"; my $testbuf = ""; while (length($testbuf) < 1280 - 40 - 8) { $testbuf .= $alpha; } open2(*READER, *WRITER, "nc6 -u $ARGV[0] 7"); my $trials = 0; while (1) { my $len; for ($len = 1; $len < 1000; $len++) { print $len . "\n"; print WRITER substr($testbuf, 0, $len) . "\n"; my $rin = ''; vec($rin,fileno(READER),1) = 1; my $found = select($rin, undef, undef, "6"); if ($found == 1) { my $foo; sysread READER, $foo, 1280; if ($foo eq $testbuf) { print "WARNING: payload mismatch\n"; } } else { print "FAILURE: len: $len\n"; } $trials++; print "TRIAL: $trials\n"; sleep(.05); } } # need to kill off the nc6 process print WRITER eof; tinyos-2.1.2+dfsg/apps/UDPEcho/util/000077500000000000000000000000001207233610700171305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/UDPEcho/util/Listener.py000066400000000000000000000027121207233610700212710ustar00rootroot00000000000000 import socket import UdpReport import re import sys import time import threading port = 7000 stats = {} class PrintStats(threading.Thread): def __init__(self): threading.Thread.__init__(self) self.daemon = True def run(self): while True: self.print_stats() time.sleep(3) def print_stats(self): global stats print "-" * 40 for k, v in stats.iteritems(): print "%s: %i/%i (%0.2f ago) (%0.2f%%)" % (k, v[0], v[3] - v[2] + 1, time.time() - v[1], 100 * float(v[0]) / (v[3] - v[2] + 1)) print "%i total" % len(stats) print "-" * 40 if __name__ == '__main__': s = socket.socket(socket.AF_INET6, socket.SOCK_DGRAM) s.bind(('', port)) ps = PrintStats() ps.start() while True: data, addr = s.recvfrom(1024) if (len(data) > 0): rpt = UdpReport.UdpReport(data=data, data_length=len(data)) print addr[0] if not addr[0] in stats: stats[addr[0]] = (0, time.time(), rpt.get_seqno(), rpt.get_seqno()) cur = stats[addr[0]] stats[addr[0]] = (cur[0] + 1, time.time(), cur[2], rpt.get_seqno()) tinyos-2.1.2+dfsg/apps/UDPEcho/util/Makefile000066400000000000000000000003571207233610700205750ustar00rootroot00000000000000# -*- makefile -*- UdpReport.py: ../UDPReport.h mig -DMIG -I$(TOSROOT)/tos/lib/net/blip -I$(TOSROOT)/tos/chips/cc2420 -I$(TOSROOT)/support/sdk/c/blip/include python -python-classname=UdpReport ../UDPReport.h udp_report -o UdpReport.py tinyos-2.1.2+dfsg/apps/UDPEcho/util/UdpReport.py000066400000000000000000000446251207233610700214410ustar00rootroot00000000000000# # This class is automatically generated by mig. DO NOT EDIT THIS FILE. # This class implements a Python interface to the 'UdpReport' # message type. # import tinyos.message.Message # The default size of this message type in bytes. DEFAULT_MESSAGE_SIZE = 21 # The Active Message type associated with this message. AM_TYPE = -1 class UdpReport(tinyos.message.Message.Message): # Create a new UdpReport of size 21. def __init__(self, data="", addr=None, gid=None, base_offset=0, data_length=21): tinyos.message.Message.Message.__init__(self, data, addr, gid, base_offset, data_length) self.amTypeSet(AM_TYPE) # Get AM_TYPE def get_amType(cls): return AM_TYPE get_amType = classmethod(get_amType) # # Return a String representation of this message. Includes the # message type name and the non-indexed field values. # def __str__(self): s = "Message \n" try: s += " [seqno=0x%x]\n" % (self.get_seqno()) except: pass try: s += " [sender=0x%x]\n" % (self.get_sender()) except: pass try: s += " [interval=0x%x]\n" % (self.get_interval()) except: pass try: s += " [ip.sent=0x%x]\n" % (self.get_ip_sent()) except: pass try: s += " [ip.forwarded=0x%x]\n" % (self.get_ip_forwarded()) except: pass try: s += " [ip.rx_drop=0x%x]\n" % (self.get_ip_rx_drop()) except: pass try: s += " [ip.tx_drop=0x%x]\n" % (self.get_ip_tx_drop()) except: pass try: s += " [ip.fw_drop=0x%x]\n" % (self.get_ip_fw_drop()) except: pass try: s += " [ip.rx_total=0x%x]\n" % (self.get_ip_rx_total()) except: pass try: s += " [ip.encfail=0x%x]\n" % (self.get_ip_encfail()) except: pass try: s += " [udp.sent=0x%x]\n" % (self.get_udp_sent()) except: pass try: s += " [udp.rcvd=0x%x]\n" % (self.get_udp_rcvd()) except: pass try: s += " [udp.cksum=0x%x]\n" % (self.get_udp_cksum()) except: pass return s # Message-type-specific access methods appear below. # # Accessor methods for field: seqno # Field type: int # Offset (bits): 0 # Size (bits): 16 # # # Return whether the field 'seqno' is signed (False). # def isSigned_seqno(self): return False # # Return whether the field 'seqno' is an array (False). # def isArray_seqno(self): return False # # Return the offset (in bytes) of the field 'seqno' # def offset_seqno(self): return (0 / 8) # # Return the offset (in bits) of the field 'seqno' # def offsetBits_seqno(self): return 0 # # Return the value (as a int) of the field 'seqno' # def get_seqno(self): return self.getUIntElement(self.offsetBits_seqno(), 16, 1) # # Set the value of the field 'seqno' # def set_seqno(self, value): self.setUIntElement(self.offsetBits_seqno(), 16, value, 1) # # Return the size, in bytes, of the field 'seqno' # def size_seqno(self): return (16 / 8) # # Return the size, in bits, of the field 'seqno' # def sizeBits_seqno(self): return 16 # # Accessor methods for field: sender # Field type: int # Offset (bits): 16 # Size (bits): 16 # # # Return whether the field 'sender' is signed (False). # def isSigned_sender(self): return False # # Return whether the field 'sender' is an array (False). # def isArray_sender(self): return False # # Return the offset (in bytes) of the field 'sender' # def offset_sender(self): return (16 / 8) # # Return the offset (in bits) of the field 'sender' # def offsetBits_sender(self): return 16 # # Return the value (as a int) of the field 'sender' # def get_sender(self): return self.getUIntElement(self.offsetBits_sender(), 16, 1) # # Set the value of the field 'sender' # def set_sender(self, value): self.setUIntElement(self.offsetBits_sender(), 16, value, 1) # # Return the size, in bytes, of the field 'sender' # def size_sender(self): return (16 / 8) # # Return the size, in bits, of the field 'sender' # def sizeBits_sender(self): return 16 # # Accessor methods for field: interval # Field type: int # Offset (bits): 32 # Size (bits): 16 # # # Return whether the field 'interval' is signed (False). # def isSigned_interval(self): return False # # Return whether the field 'interval' is an array (False). # def isArray_interval(self): return False # # Return the offset (in bytes) of the field 'interval' # def offset_interval(self): return (32 / 8) # # Return the offset (in bits) of the field 'interval' # def offsetBits_interval(self): return 32 # # Return the value (as a int) of the field 'interval' # def get_interval(self): return self.getUIntElement(self.offsetBits_interval(), 16, 1) # # Set the value of the field 'interval' # def set_interval(self, value): self.setUIntElement(self.offsetBits_interval(), 16, value, 1) # # Return the size, in bytes, of the field 'interval' # def size_interval(self): return (16 / 8) # # Return the size, in bits, of the field 'interval' # def sizeBits_interval(self): return 16 # # Accessor methods for field: ip.sent # Field type: int # Offset (bits): 48 # Size (bits): 16 # # # Return whether the field 'ip.sent' is signed (False). # def isSigned_ip_sent(self): return False # # Return whether the field 'ip.sent' is an array (False). # def isArray_ip_sent(self): return False # # Return the offset (in bytes) of the field 'ip.sent' # def offset_ip_sent(self): return (48 / 8) # # Return the offset (in bits) of the field 'ip.sent' # def offsetBits_ip_sent(self): return 48 # # Return the value (as a int) of the field 'ip.sent' # def get_ip_sent(self): return self.getUIntElement(self.offsetBits_ip_sent(), 16, 1) # # Set the value of the field 'ip.sent' # def set_ip_sent(self, value): self.setUIntElement(self.offsetBits_ip_sent(), 16, value, 1) # # Return the size, in bytes, of the field 'ip.sent' # def size_ip_sent(self): return (16 / 8) # # Return the size, in bits, of the field 'ip.sent' # def sizeBits_ip_sent(self): return 16 # # Accessor methods for field: ip.forwarded # Field type: int # Offset (bits): 64 # Size (bits): 16 # # # Return whether the field 'ip.forwarded' is signed (False). # def isSigned_ip_forwarded(self): return False # # Return whether the field 'ip.forwarded' is an array (False). # def isArray_ip_forwarded(self): return False # # Return the offset (in bytes) of the field 'ip.forwarded' # def offset_ip_forwarded(self): return (64 / 8) # # Return the offset (in bits) of the field 'ip.forwarded' # def offsetBits_ip_forwarded(self): return 64 # # Return the value (as a int) of the field 'ip.forwarded' # def get_ip_forwarded(self): return self.getUIntElement(self.offsetBits_ip_forwarded(), 16, 1) # # Set the value of the field 'ip.forwarded' # def set_ip_forwarded(self, value): self.setUIntElement(self.offsetBits_ip_forwarded(), 16, value, 1) # # Return the size, in bytes, of the field 'ip.forwarded' # def size_ip_forwarded(self): return (16 / 8) # # Return the size, in bits, of the field 'ip.forwarded' # def sizeBits_ip_forwarded(self): return 16 # # Accessor methods for field: ip.rx_drop # Field type: short # Offset (bits): 80 # Size (bits): 8 # # # Return whether the field 'ip.rx_drop' is signed (False). # def isSigned_ip_rx_drop(self): return False # # Return whether the field 'ip.rx_drop' is an array (False). # def isArray_ip_rx_drop(self): return False # # Return the offset (in bytes) of the field 'ip.rx_drop' # def offset_ip_rx_drop(self): return (80 / 8) # # Return the offset (in bits) of the field 'ip.rx_drop' # def offsetBits_ip_rx_drop(self): return 80 # # Return the value (as a short) of the field 'ip.rx_drop' # def get_ip_rx_drop(self): return self.getUIntElement(self.offsetBits_ip_rx_drop(), 8, 1) # # Set the value of the field 'ip.rx_drop' # def set_ip_rx_drop(self, value): self.setUIntElement(self.offsetBits_ip_rx_drop(), 8, value, 1) # # Return the size, in bytes, of the field 'ip.rx_drop' # def size_ip_rx_drop(self): return (8 / 8) # # Return the size, in bits, of the field 'ip.rx_drop' # def sizeBits_ip_rx_drop(self): return 8 # # Accessor methods for field: ip.tx_drop # Field type: short # Offset (bits): 88 # Size (bits): 8 # # # Return whether the field 'ip.tx_drop' is signed (False). # def isSigned_ip_tx_drop(self): return False # # Return whether the field 'ip.tx_drop' is an array (False). # def isArray_ip_tx_drop(self): return False # # Return the offset (in bytes) of the field 'ip.tx_drop' # def offset_ip_tx_drop(self): return (88 / 8) # # Return the offset (in bits) of the field 'ip.tx_drop' # def offsetBits_ip_tx_drop(self): return 88 # # Return the value (as a short) of the field 'ip.tx_drop' # def get_ip_tx_drop(self): return self.getUIntElement(self.offsetBits_ip_tx_drop(), 8, 1) # # Set the value of the field 'ip.tx_drop' # def set_ip_tx_drop(self, value): self.setUIntElement(self.offsetBits_ip_tx_drop(), 8, value, 1) # # Return the size, in bytes, of the field 'ip.tx_drop' # def size_ip_tx_drop(self): return (8 / 8) # # Return the size, in bits, of the field 'ip.tx_drop' # def sizeBits_ip_tx_drop(self): return 8 # # Accessor methods for field: ip.fw_drop # Field type: short # Offset (bits): 96 # Size (bits): 8 # # # Return whether the field 'ip.fw_drop' is signed (False). # def isSigned_ip_fw_drop(self): return False # # Return whether the field 'ip.fw_drop' is an array (False). # def isArray_ip_fw_drop(self): return False # # Return the offset (in bytes) of the field 'ip.fw_drop' # def offset_ip_fw_drop(self): return (96 / 8) # # Return the offset (in bits) of the field 'ip.fw_drop' # def offsetBits_ip_fw_drop(self): return 96 # # Return the value (as a short) of the field 'ip.fw_drop' # def get_ip_fw_drop(self): return self.getUIntElement(self.offsetBits_ip_fw_drop(), 8, 1) # # Set the value of the field 'ip.fw_drop' # def set_ip_fw_drop(self, value): self.setUIntElement(self.offsetBits_ip_fw_drop(), 8, value, 1) # # Return the size, in bytes, of the field 'ip.fw_drop' # def size_ip_fw_drop(self): return (8 / 8) # # Return the size, in bits, of the field 'ip.fw_drop' # def sizeBits_ip_fw_drop(self): return 8 # # Accessor methods for field: ip.rx_total # Field type: short # Offset (bits): 104 # Size (bits): 8 # # # Return whether the field 'ip.rx_total' is signed (False). # def isSigned_ip_rx_total(self): return False # # Return whether the field 'ip.rx_total' is an array (False). # def isArray_ip_rx_total(self): return False # # Return the offset (in bytes) of the field 'ip.rx_total' # def offset_ip_rx_total(self): return (104 / 8) # # Return the offset (in bits) of the field 'ip.rx_total' # def offsetBits_ip_rx_total(self): return 104 # # Return the value (as a short) of the field 'ip.rx_total' # def get_ip_rx_total(self): return self.getUIntElement(self.offsetBits_ip_rx_total(), 8, 1) # # Set the value of the field 'ip.rx_total' # def set_ip_rx_total(self, value): self.setUIntElement(self.offsetBits_ip_rx_total(), 8, value, 1) # # Return the size, in bytes, of the field 'ip.rx_total' # def size_ip_rx_total(self): return (8 / 8) # # Return the size, in bits, of the field 'ip.rx_total' # def sizeBits_ip_rx_total(self): return 8 # # Accessor methods for field: ip.encfail # Field type: short # Offset (bits): 112 # Size (bits): 8 # # # Return whether the field 'ip.encfail' is signed (False). # def isSigned_ip_encfail(self): return False # # Return whether the field 'ip.encfail' is an array (False). # def isArray_ip_encfail(self): return False # # Return the offset (in bytes) of the field 'ip.encfail' # def offset_ip_encfail(self): return (112 / 8) # # Return the offset (in bits) of the field 'ip.encfail' # def offsetBits_ip_encfail(self): return 112 # # Return the value (as a short) of the field 'ip.encfail' # def get_ip_encfail(self): return self.getUIntElement(self.offsetBits_ip_encfail(), 8, 1) # # Set the value of the field 'ip.encfail' # def set_ip_encfail(self, value): self.setUIntElement(self.offsetBits_ip_encfail(), 8, value, 1) # # Return the size, in bytes, of the field 'ip.encfail' # def size_ip_encfail(self): return (8 / 8) # # Return the size, in bits, of the field 'ip.encfail' # def sizeBits_ip_encfail(self): return 8 # # Accessor methods for field: udp.sent # Field type: int # Offset (bits): 120 # Size (bits): 16 # # # Return whether the field 'udp.sent' is signed (False). # def isSigned_udp_sent(self): return False # # Return whether the field 'udp.sent' is an array (False). # def isArray_udp_sent(self): return False # # Return the offset (in bytes) of the field 'udp.sent' # def offset_udp_sent(self): return (120 / 8) # # Return the offset (in bits) of the field 'udp.sent' # def offsetBits_udp_sent(self): return 120 # # Return the value (as a int) of the field 'udp.sent' # def get_udp_sent(self): return self.getUIntElement(self.offsetBits_udp_sent(), 16, 1) # # Set the value of the field 'udp.sent' # def set_udp_sent(self, value): self.setUIntElement(self.offsetBits_udp_sent(), 16, value, 1) # # Return the size, in bytes, of the field 'udp.sent' # def size_udp_sent(self): return (16 / 8) # # Return the size, in bits, of the field 'udp.sent' # def sizeBits_udp_sent(self): return 16 # # Accessor methods for field: udp.rcvd # Field type: int # Offset (bits): 136 # Size (bits): 16 # # # Return whether the field 'udp.rcvd' is signed (False). # def isSigned_udp_rcvd(self): return False # # Return whether the field 'udp.rcvd' is an array (False). # def isArray_udp_rcvd(self): return False # # Return the offset (in bytes) of the field 'udp.rcvd' # def offset_udp_rcvd(self): return (136 / 8) # # Return the offset (in bits) of the field 'udp.rcvd' # def offsetBits_udp_rcvd(self): return 136 # # Return the value (as a int) of the field 'udp.rcvd' # def get_udp_rcvd(self): return self.getUIntElement(self.offsetBits_udp_rcvd(), 16, 1) # # Set the value of the field 'udp.rcvd' # def set_udp_rcvd(self, value): self.setUIntElement(self.offsetBits_udp_rcvd(), 16, value, 1) # # Return the size, in bytes, of the field 'udp.rcvd' # def size_udp_rcvd(self): return (16 / 8) # # Return the size, in bits, of the field 'udp.rcvd' # def sizeBits_udp_rcvd(self): return 16 # # Accessor methods for field: udp.cksum # Field type: int # Offset (bits): 152 # Size (bits): 16 # # # Return whether the field 'udp.cksum' is signed (False). # def isSigned_udp_cksum(self): return False # # Return whether the field 'udp.cksum' is an array (False). # def isArray_udp_cksum(self): return False # # Return the offset (in bytes) of the field 'udp.cksum' # def offset_udp_cksum(self): return (152 / 8) # # Return the offset (in bits) of the field 'udp.cksum' # def offsetBits_udp_cksum(self): return 152 # # Return the value (as a int) of the field 'udp.cksum' # def get_udp_cksum(self): return self.getUIntElement(self.offsetBits_udp_cksum(), 16, 1) # # Set the value of the field 'udp.cksum' # def set_udp_cksum(self, value): self.setUIntElement(self.offsetBits_udp_cksum(), 16, value, 1) # # Return the size, in bytes, of the field 'udp.cksum' # def size_udp_cksum(self): return (16 / 8) # # Return the size, in bits, of the field 'udp.cksum' # def sizeBits_udp_cksum(self): return 16 tinyos-2.1.2+dfsg/apps/UDPEcho/volumes-at45db.xml000066400000000000000000000003141207233610700214460ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/UDPEcho/volumes-stm25p.xml000066400000000000000000000003211207233610700215130ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/000077500000000000000000000000001207233610700160665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/000077500000000000000000000000001207233610700177235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/BenchmarkAppC.nc000066400000000000000000000052731207233610700227120ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #include "Messages.h" configuration BenchmarkAppC {} implementation { components MainC; Comm.Boot -> MainC.Boot; components BenchmarkCoreC as Core; components BenchmarkAppP as Comm; Comm.BenchmarkCore -> Core; Comm.CoreControl -> Core; Comm.CoreInit -> Core; components LedsC; Comm.Leds -> LedsC; #ifdef TOSSIM components SerialActiveMessageC as Medium; components new SerialAMReceiverC(AM_CTRLMSG_T) as RxCtrl; components new SerialAMReceiverC(AM_SETUPMSG_T) as RxSetup; components new SerialAMSenderC(AM_SYNCMSG_T) as TxSync; components new SerialAMSenderC(AM_DATAMSG_T) as TxData; #else components ActiveMessageC as Medium; components new AMReceiverC(AM_CTRLMSG_T) as RxCtrl; components new AMReceiverC(AM_SETUPMSG_T) as RxSetup; components new DirectAMSenderC(AM_SYNCMSG_T) as TxSync; components new DirectAMSenderC(AM_DATAMSG_T) as TxData; #endif Comm.RxCtrl -> RxCtrl; Comm.RxSetup -> RxSetup; Comm.TxSync -> TxSync; Comm.TxData -> TxData; Comm.Control -> Medium; Comm.Packet -> Medium; } tinyos-2.1.2+dfsg/apps/tests/LinkBench/BenchmarkAppP.nc000066400000000000000000000135461207233610700227310ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ module BenchmarkAppP @safe() { uses { interface Boot; interface Receive as RxCtrl; interface Receive as RxSetup; interface AMSend as TxSync; interface AMSend as TxData; interface SplitControl as Control; interface BenchmarkCore; interface StdControl as CoreControl; interface Init as CoreInit; interface Packet; interface Leds; } } implementation { bool core_configured, core_finished; uint8_t resp_request, resp_idx; message_t bpkt; event void Boot.booted() { call Control.start(); } event void Control.startDone(error_t error) { if (error != SUCCESS) call Control.start(); else { call CoreInit.init(); core_configured = core_finished = FALSE; } } event void Control.stopDone(error_t error) { call Control.start(); } task void sendData() { datamsg_t* msg = (datamsg_t*)(call Packet.getPayload(&bpkt,sizeof(datamsg_t))); call Packet.clear(&bpkt); if ( resp_request == CTRL_STAT_REQ && core_finished ) { msg->type = DATA_STAT_OK; msg->data_idx = resp_idx; msg->payload.stat = *(call BenchmarkCore.getStat(resp_idx)); call TxData.send(AM_BROADCAST_ADDR, &bpkt, sizeof(datamsg_t)); // RESPONSE profile information } else if ( resp_request == CTRL_PROFILE_REQ && core_finished ) { msg->type = DATA_PROFILE_OK; msg->data_idx = resp_idx; msg->payload.profile = *(call BenchmarkCore.getProfile()); call TxData.send(AM_BROADCAST_ADDR, &bpkt, sizeof(datamsg_t)); } } task void sendSync() { syncmsg_t* msg = (syncmsg_t*)(call Packet.getPayload(&bpkt,sizeof(syncmsg_t))); call Packet.clear(&bpkt); // RESPONSE the setup acknowledgement if applicable if ( resp_request == CTRL_SETUP_SYN && core_configured ) { msg->type = SYNC_SETUP_ACK; msg->edgecnt = call BenchmarkCore.getEdgeCount(); msg->maxmoteid = call BenchmarkCore.getMaxMoteId(); dbg("Benchmark","sendSync sending... %d\n",TOS_NODE_ID); call TxSync.send(AM_BROADCAST_ADDR, &bpkt, sizeof(syncmsg_t)); } } event void TxSync.sendDone(message_t* bufPtr, error_t error) { } event void TxData.sendDone(message_t* bufPtr, error_t error) { } event message_t* RxSetup.receive(message_t* bufPtr, void* payload, uint8_t len) { setupmsg_t* msg = (setupmsg_t*)payload; dbg("Benchmark","RxSetup.receive SETUP%d\n",TOS_NODE_ID); call BenchmarkCore.setup(msg->config); return bufPtr; } event message_t* RxCtrl.receive(message_t* bufPtr, void* payload, uint8_t len) { ctrlmsg_t* msg = (ctrlmsg_t*)payload; switch ( msg->type ) { case CTRL_RESET : dbg("Benchmark","RxCtrl.receive RESET %d\n",TOS_NODE_ID); call BenchmarkCore.reset(); call Control.stop(); break; case CTRL_SETUP_SYN : dbg("Benchmark","RxCtrl.receive SETUP_SYN %d\n",TOS_NODE_ID); if( core_configured ) { resp_request = msg->type; post sendSync(); } break; case CTRL_START : dbg("Benchmark","RxCtrl.receive START %d\n",TOS_NODE_ID); if( core_configured ) { dbg("Benchmark"," ---- START CORE%d\n",TOS_NODE_ID); call CoreControl.start(); } break; case CTRL_STAT_REQ: dbg("Benchmark","RxCtrl.receive STAT_REQ %d\n",TOS_NODE_ID); if ( core_finished ) { dbg("Benchmark","------- CORE FINISHED\n"); resp_request = msg->type; resp_idx = msg->data_req_idx; post sendData(); } else dbg("Benchmark","------- CORE NOT FINISHED\n"); break; case CTRL_PROFILE_REQ: dbg("Benchmark","RxCtrl.receive PROFILE_REQ %d\n",TOS_NODE_ID); if ( core_finished ) { resp_request = msg->type; resp_idx = msg->data_req_idx; post sendData(); } break; default: break; } return bufPtr; } event void BenchmarkCore.finished() { core_finished = TRUE; } event void BenchmarkCore.setupDone() { core_configured = TRUE; } event void BenchmarkCore.resetDone() { core_configured = core_finished = FALSE; } } tinyos-2.1.2+dfsg/apps/tests/LinkBench/BenchmarkCore.h000066400000000000000000000131651207233610700226050ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #ifndef BENCHMARK_CORE_H #define BENCHMARK_CORE_H #if MAX_EDGE_COUNT <= 8 typedef uint8_t pending_t; #elif MAX_EDGE_COUNT <= 16 typedef uint16_t pending_t; #elif MAX_EDGE_COUNT <= 32 typedef uint32_t pending_t; #elif MAX_EDGE_COUNT <= 64 typedef uint64_t pending_t; #else #error "MAX_EDGE_COUNT is set too high! The current limit is 64!" #endif typedef pending_t edgeaddr_t; enum { MAX_TIMER_COUNT = 4, // Policy flags GLOBAL_USE_ACK = 1<<0, GLOBAL_USE_BCAST = 1<<1, GLOBAL_USE_MAC_LPL = 1<<2, GLOBAL_USE_MAC_PLINK = 1<<3, // Sending flags SEND_ON_REQ = 0, SEND_ON_INIT = 1, SEND_ON_TIMER = 2, STOP_ON_ACK = 1<<0, STOP_ON_TIMER = 1<<1, NEED_ACK = 1, INFINITE = 0, }; typedef struct flag_t { uint8_t start_trigger : 3; // When to start sending messages uint8_t stop_trigger : 2; // When to stop an infinite sending loop uint8_t need_ack : 1; // ACK is needed? uint8_t inf_loop_on : 1; // Whether an infinite sending loop is active uint8_t reserved : 1; // Reserved for future expansion } flag_t; typedef struct timerset_t { uint8_t start; uint8_t stop; } timerset_t; typedef struct num_t { uint8_t send_num; // How many messages to transmit in general uint8_t left_num; // How many messages are left to transmit } num_t; // Base types for message counting / message sequence values #ifdef USE_32_BITS typedef uint32_t seq_base_t; typedef nx_uint32_t nx_seq_base_t; #else typedef uint16_t seq_base_t; typedef nx_uint16_t nx_seq_base_t; #endif typedef struct edge_t { uint16_t sender; // Sender end of the edge uint16_t receiver; // Receiver end of the edge timerset_t timers; // Timers associated to this edge flag_t policy; // Sending policies, settings, triggers num_t nums; // Message counters edgeaddr_t reply_on; // The edge bitmask used when sending on reception seq_base_t nextmsgid; // The message id to send (on send side)/consecutive to receive (on receive side) } edge_t; // Stats type typedef nx_struct stat_t { nx_seq_base_t triggerCount; nx_seq_base_t backlogCount; nx_seq_base_t resendCount; nx_seq_base_t sendCount; nx_seq_base_t sendSuccessCount; nx_seq_base_t sendFailCount; nx_seq_base_t sendDoneCount; nx_seq_base_t sendDoneSuccessCount; nx_seq_base_t sendDoneFailCount; nx_seq_base_t wasAckedCount; nx_seq_base_t notAckedCount; nx_seq_base_t receiveCount; nx_seq_base_t consecutiveCount; nx_seq_base_t duplicateCount; nx_seq_base_t forwardCount; nx_seq_base_t missedCount; nx_seq_base_t wrongCount; nx_uint8_t remainedCount; } stat_t; typedef nx_struct profile_t { nx_int32_t min_atomic; nx_int32_t min_interrupt; nx_int32_t min_latency; nx_int32_t max_atomic; nx_int32_t max_interrupt; nx_int32_t max_latency; nx_uint32_t rtx_time; nx_uint32_t rstart_count; nx_uint32_t rx_bytes; nx_uint32_t tx_bytes; nx_uint32_t rx_msgs; nx_uint16_t debug; } profile_t; typedef nx_struct timersetup_t { nx_uint8_t isoneshot; nx_uint32_t delay; nx_uint32_t period_msec; } timersetup_t; // Where the MAC settings are located in the mac_setup_t type? enum { // Extend the size of this struct if necessary for new MAC-s. MAC_SETUP_LENGTH = 2, LPL_WAKEUP_OFFSET = 0, PLINK_RETRIES_OFFSET = 0, PLINK_DELAY_OFFSET = 1 }; typedef nx_uint16_t mac_setup_t[MAC_SETUP_LENGTH]; // Basic setup type typedef nx_struct setup_t { nx_uint8_t problem_idx; // The problem we should test nx_uint32_t pre_run_msec; nx_uint32_t runtime_msec; // How long should we run the test? nx_uint32_t post_run_msec; nx_uint8_t flags; // Global flags ( such as BCAST, ACK, LPL, PLINK ) timersetup_t timers[MAX_TIMER_COUNT]; // Mac protocol-specific settings mac_setup_t mac_setup; } setup_t; #endif tinyos-2.1.2+dfsg/apps/tests/LinkBench/BenchmarkCore.nc000066400000000000000000000051041207233610700227500ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #include "BenchmarkCore.h" interface BenchmarkCore { /** * Requests a statistics indexed by 'index' * @return the stat */ command stat_t* getStat(uint16_t idx); /** * Requests the profile information * @return the mote stat structure */ command profile_t* getProfile(); /** * Requests the current edge count * @return the edge count of the current problem */ command uint8_t getEdgeCount(); /** * Requests the maximal mote id present in the current benchmark * @return the maximal mote id */ command uint8_t getMaxMoteId(); /** Configures the benchmark core with 'conf' */ command void setup(setup_t conf); /** Indicates the successfull configuration of the benchmark */ event void setupDone(); /** Resets the benchmarking core component */ command void reset(); /** Indicates the finish of the reset operation */ event void resetDone(); /** Indicates the finish of the benchmark */ event void finished(); } tinyos-2.1.2+dfsg/apps/tests/LinkBench/BenchmarkCoreC.nc000066400000000000000000000071221207233610700230550ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #include "Messages.h" configuration BenchmarkCoreC { provides { interface StdControl; interface BenchmarkCore; interface Init; } } implementation { components BenchmarkCoreP as Core; components new DirectAMSenderC(AM_TESTMSG_T) as TxTest; components new AMReceiverC(AM_TESTMSG_T) as RxTest; Core.RxTest -> RxTest; Core.TxTest -> TxTest; components ActiveMessageC; Core.Packet -> ActiveMessageC; Core.Ack -> ActiveMessageC; #ifdef LOW_POWER_LISTENING #if defined(RADIO_RF230) || defined(RADIO_CC1000) || defined(RADIO_CC2420) || defined(RADIO_CC2520) || defined(RADIO_CC2420X) || defined(RADIO_RFA1) Core.LowPowerListening -> ActiveMessageC; #else #error " * NO PLATFORM SUPPORT FOR LOW POWER LISTENING LAYER *" #endif #endif #ifdef PACKET_LINK #if defined(RADIO_CC2420) components CC2420ActiveMessageC; Core.PacketLink -> CC2420ActiveMessageC; #elif defined(RADIO_RF230) || defined(RADIO_CC2520) || defined(RADIO_CC2420X) Core.PacketLink -> ActiveMessageC; #else #error " * NO PLATFORM SUPPORT FOR PACKET LINK LAYER *" #endif #endif #ifdef TRAFFIC_MONITOR #if defined(RADIO_RF230) components RF230RadioC; Core.TrafficMonitor -> RF230RadioC; #elif defined(RADIO_CC2420X) components CC2420XRadioC; Core.TrafficMonitor -> CC2420XRadioC; #elif defined(RADIO_CC2420) components CC2420ActiveMessageC; Core.TrafficMonitor -> CC2420ActiveMessageC; #endif #endif components new TimerMilliC() as Timer; Core.TestTimer -> Timer; components LedsC; Core.Leds -> LedsC; components new VirtualizeTimerC(TMilli,MAX_TIMER_COUNT) as TTimer; components new TimerMilliC() as TTimerFrom; TTimer.TimerFrom -> TTimerFrom; Core.TriggerTimer -> TTimer; components RandomMlcgC; Core.Random -> RandomMlcgC; Core.RandomInit -> RandomMlcgC; components CodeProfileC; Core.CodeProfile -> CodeProfileC; Core.CodeProfileControl -> CodeProfileC; StdControl = Core; BenchmarkCore = Core; Init = Core; } tinyos-2.1.2+dfsg/apps/tests/LinkBench/BenchmarkCoreP.nc000066400000000000000000000513501207233610700230740ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #define _DEBUG_MODE_ #include "BenchmarkCore.h" #include "Benchmarks.h" #define SET_STATE(s) atomic { call Leds.set(s); state = s; } #if defined(_DEBUG_MODE_) #define _ASSERT_(cond) if(!(cond || profile.debug)){ profile.debug = __LINE__; } #else #define str(s) s #define _ASSERT_(cond) str() #endif module BenchmarkCoreP @safe() { provides { interface Init; interface StdControl as Test; interface BenchmarkCore; } uses { interface Receive as RxTest; interface AMSend as TxTest; interface Timer as TestTimer; interface Timer as TriggerTimer[uint8_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements as Ack; #ifdef LOW_POWER_LISTENING interface LowPowerListening; #endif #ifdef PACKET_LINK interface PacketLink; #endif #ifdef TRAFFIC_MONITOR interface TrafficMonitor; #endif interface CodeProfile; interface StdControl as CodeProfileControl; interface Leds; interface Random; interface Init as RandomInit; } } implementation { enum { // Mote states STATE_INVALID = 0x0, STATE_IDLE = 0x1, STATE_CONFIGURED = 0x2, STATE_PRE_RUN = 0x3, STATE_RUNNING = 0x4, STATE_POST_RUN = 0x5, STATE_FINISHED = 0x6, // Sendlock states UNLOCKED = 0, LOCKED = 1, }; uint8_t state, sendlock; setup_t config; message_t pkt; edge_t* problem; uint8_t c_edge_cnt,c_maxmoteid; stat_t stats[MAX_EDGE_COUNT]; profile_t profile; // pre-computed values for faster operation pending_t tickMask_start[MAX_TIMER_COUNT]; pending_t tickMask_stop [MAX_TIMER_COUNT]; pending_t outgoing_edges; // Bitmask specifying edges with pending send requests pending_t pending; // Last edge index on which we have sent message uint8_t eidx = 0xFF; task void sendPending(); /** CLEAN THE STATE MACHINE VARIABLES **/ void cleanstate() { SET_STATE( STATE_INVALID ) // Disassociate the problem problem = (edge_t*)NULL; c_edge_cnt = c_maxmoteid = 0; outgoing_edges = 0; // Clear configuration values memset(&config,0,sizeof(setup_t)); memset(stats,0,sizeof(stat_t)*MAX_EDGE_COUNT); memset(&profile,0,sizeof(profile_t)); memset(tickMask_start,0,sizeof(pending_t)*MAX_TIMER_COUNT); memset(tickMask_stop,0,sizeof(pending_t)*MAX_TIMER_COUNT); pending = 0x0; eidx = 0xFF; sendlock = UNLOCKED; call Packet.clear(&pkt); call Ack.noAck(&pkt); SET_STATE( STATE_IDLE ) } /** START THE NEEDED TRIGGERING TIMERS **/ void startTimers() { uint8_t i; uint32_t now; for(i = 0; i< MAX_TIMER_COUNT; ++i) { // If the current timer is unused, do not start it if ( tickMask_start[i] == 0 && tickMask_stop[i] == 0 ) continue; now = call TriggerTimer.getNow[0](); if ( config.timers[i].isoneshot ) call TriggerTimer.startOneShotAt[i]( now + config.timers[i].delay, config.timers[i].period_msec); else call TriggerTimer.startPeriodicAt[i]( now + config.timers[i].delay, config.timers[i].period_msec); } } /** STOP THE TRIGGERING TIMERS **/ void stopTimers() { uint8_t i; for(i = 0; i< MAX_TIMER_COUNT; ++i) call TriggerTimer.stop[i](); } /** INITIALIZE THE COMPONENT **/ command error_t Init.init() { cleanstate(); call RandomInit.init(); return SUCCESS; } /** REQUEST BECHMARK RESULTS **/ command stat_t* BenchmarkCore.getStat(uint16_t idx) { _ASSERT_( idx < MAX_EDGE_COUNT ) _ASSERT_( state == STATE_FINISHED ) _ASSERT_(idx < c_edge_cnt ) return stats + idx; } /** REQUEST PROFILE INFORMATION **/ command profile_t* BenchmarkCore.getProfile() { return &profile; } /** REQUEST EDGE COUNT **/ command uint8_t BenchmarkCore.getEdgeCount() { _ASSERT_( state >= STATE_CONFIGURED ) return c_edge_cnt; } /** REQUEST MOTE COUNT **/ command uint8_t BenchmarkCore.getMaxMoteId() { _ASSERT_( state >= STATE_CONFIGURED ) return c_maxmoteid; } /** RESETS THE CORE **/ command void BenchmarkCore.reset() { call Test.stop(); cleanstate(); signal BenchmarkCore.resetDone(); } /** START THE REAL BENCHMARK */ void startBenchmark() { dbg("Benchmark","BenchmarkCore startBenchmark\n"); // If this node sends initial message(s) if ( pending ) post sendPending(); // Start the trigger timers startTimers(); // Start the test timer dbg("Benchmark","BenchmarkCore start TestTimer\n"); call TestTimer.startOneShot(config.runtime_msec); } void postNewTrigger(pending_t sbitmask) { uint8_t i = 0; pending_t blogd; _ASSERT_( sbitmask > 0 ) _ASSERT_( state == STATE_RUNNING || state == STATE_IDLE || state == STATE_POST_RUN ) _ASSERT_( ((~outgoing_edges) & sbitmask) == 0 ) atomic { // Check which edges need to be backlogged blogd = pending & sbitmask; pending |= sbitmask; } // Count backlog values for ( i = 0; blogd; ++i, blogd >>= 1) { if ( blogd & 0x1 ) ++(stats[i].backlogCount); } // Count trigger values for ( i = 0; sbitmask; ++i, sbitmask >>= 1) { if ( sbitmask & 0x1 ) { ++(stats[i].triggerCount); if ( problem[i].nums.send_num == INFINITE ) problem[i].policy.inf_loop_on = 1; } } } /** SETUP THE BENCHMARK **/ command void BenchmarkCore.setup(setup_t conf) { uint8_t idx; dbg("Benchmark","BenchmarkCore.setup\n"); _ASSERT_( state == STATE_IDLE || state == STATE_CONFIGURED ) _ASSERT_( conf.runtime_msec > 0 ); // Do nothing if already configured or running or data is available if ( state == STATE_CONFIGURED ) return; // Save the configuration config = conf; // Setup the problem // WARNING: This is a very dirty hack by intent. Benchmarks are preceded by a // separator edge having sender = INVALID_SENDER and receiver = problem number. // That separator edge we are now looking for! idx = 0; while ( problemSet[idx].receiver != 0 && // do not run past the last edge (PROBLEMSET_END) ! ( problemSet[idx].sender == INVALID_SENDER && problemSet[idx].receiver == config.problem_idx ) ) { ++idx; } // In case we haven't found any benchmark with the requested id, kill the mote. if ( problemSet[idx].receiver == 0 ) { SET_STATE( STATE_INVALID ) return; } else { problem = problemSet + idx + 1; } c_maxmoteid = 1; // Initialize the edges for( idx = 0; problem[idx].sender != INVALID_SENDER; ++idx ) { edge_t* edge = problem + idx; // Clean values that are changed during operation edge->policy.inf_loop_on = 0; edge->nums.left_num = edge->nums.send_num; edge->nextmsgid = START_MSG_ID; // Count the maximal mote id if ( edge->sender > c_maxmoteid ) c_maxmoteid = edge->sender; if ( edge->receiver > c_maxmoteid && edge->receiver != ALL ) c_maxmoteid = edge->receiver; // If the sender is not this node, continue if( edge->sender != TOS_NODE_ID ) continue; // Set this bit because it is an outgoing edge from this mote outgoing_edges |= 1<policy.start_trigger == SEND_ON_INIT ) { postNewTrigger( 1<policy.start_trigger == SEND_ON_TIMER ) { tickMask_start[edge->timers.start] |= 1 << idx; } // Set the timer masks if this node needs to stop on timer ticks if ( edge->policy.stop_trigger & STOP_ON_TIMER ) tickMask_stop[edge->timers.stop] |= 1 << idx; } c_edge_cnt = idx; SET_STATE( STATE_CONFIGURED ) signal BenchmarkCore.setupDone(); } /** START THE CURRENTLY CONFIGURED BENCHMARK */ command error_t Test.start() { _ASSERT_( state == STATE_CONFIGURED ) dbg("Benchmark","BenchmarkCore Test.start\n"); // Start the code profiler call CodeProfileControl.start(); #ifdef TRAFFIC_MONITOR // save the current time. profile.rtx_time = call TrafficMonitor.getActiveTime(); profile.rstart_count = call TrafficMonitor.getStartCount(); profile.rx_bytes = call TrafficMonitor.getRxBytes(); profile.tx_bytes = call TrafficMonitor.getTxBytes(); profile.rx_msgs = call TrafficMonitor.getRxMessages(); #endif // setup the applied MAC protocol #ifdef LOW_POWER_LISTENING if ( config.flags & GLOBAL_USE_MAC_LPL ) call LowPowerListening.setLocalWakeupInterval(config.mac_setup[LPL_WAKEUP_OFFSET]); #endif #ifdef PACKET_LINK if ( config.flags & GLOBAL_USE_MAC_PLINK ) { call PacketLink.setRetries(&pkt,config.mac_setup[PLINK_RETRIES_OFFSET]); call PacketLink.setRetryDelay(&pkt,config.mac_setup[PLINK_DELAY_OFFSET]); } #endif // If a pre-benchmark delay is requested, make a delay if ( config.pre_run_msec > 0 ) { SET_STATE ( STATE_PRE_RUN ) call TestTimer.startOneShot( call Random.rand32() % config.pre_run_msec ); } else { SET_STATE( STATE_RUNNING ) startBenchmark(); } return SUCCESS; } /** STOP A TEST */ command error_t Test.stop() { uint8_t i = 0; dbg("Benchmark","BenchmarkCore Test.stop\n"); _ASSERT_( state == STATE_PRE_RUN || state == STATE_RUNNING || state == STATE_POST_RUN ) call TestTimer.stop(); SET_STATE( STATE_FINISHED ); stopTimers(); // cleanup the MAC #ifdef LOW_POWER_LISTENING if ( config.flags & GLOBAL_USE_MAC_LPL ) call LowPowerListening.setLocalWakeupInterval(0); #endif #ifdef PACKET_LINK if ( config.flags & GLOBAL_USE_MAC_PLINK ) { call PacketLink.setRetries(&pkt,0); call PacketLink.setRetryDelay(&pkt,0); } #endif // compute the remained statistic for ( i = 0; pending; ++i, pending >>= 1) { if ( pending & 0x1 ) ++(stats[i].remainedCount); } // Stop the code profiler call CodeProfileControl.stop(); // Compute the mote-statistics profile.min_atomic = call CodeProfile.getMinAtomicLength(); profile.min_interrupt = call CodeProfile.getMinInterruptLength(); profile.min_latency = call CodeProfile.getMinTaskLatency(); profile.max_atomic = call CodeProfile.getMaxAtomicLength(); profile.max_interrupt = call CodeProfile.getMaxInterruptLength(); profile.max_latency = call CodeProfile.getMaxTaskLatency(); #ifdef TRAFFIC_MONITOR // save the curent time. profile.rtx_time = call TrafficMonitor.getActiveTime() - profile.rtx_time; profile.rstart_count = call TrafficMonitor.getStartCount() - profile.rstart_count; profile.rx_bytes = call TrafficMonitor.getRxBytes() - profile.rx_bytes; profile.tx_bytes = call TrafficMonitor.getTxBytes() - profile.tx_bytes; profile.rx_msgs = call TrafficMonitor.getRxMessages() - profile.rx_msgs; #endif signal BenchmarkCore.finished(); return SUCCESS; } event void TestTimer.fired() { dbg("Benchmark","BenchmarkCore TestTimer.fired\n"); switch(state) { case STATE_PRE_RUN: SET_STATE( STATE_RUNNING ) startBenchmark(); break; case STATE_RUNNING: // Stop the trigger timers stopTimers(); // check if we need a post-run state if ( config.post_run_msec > 0 ) { SET_STATE( STATE_POST_RUN ) call TestTimer.startOneShot(config.post_run_msec); break; } // break; missing: fallback to STATE_POST_RUN ! case STATE_POST_RUN: call Test.stop(); break; default: _ASSERT_( 0 ) } } event void TriggerTimer.fired[uint8_t id]() { // start on timer tick if ( tickMask_start[id] != 0 ) { postNewTrigger(tickMask_start[id]); post sendPending(); } // stop on timer tick if ( tickMask_stop[id] != 0 ) { uint8_t i = 0; pending_t temp = tickMask_stop[id]; for ( i = 0; temp; ++i, temp >>= 1) { if ( (temp & 0x1) && (problem[i].policy.stop_trigger & STOP_ON_TIMER) ) { // This works for INFINITE and also for non-INF edges problem[i].policy.inf_loop_on = 0; problem[i].nums.left_num = problem[i].nums.send_num; } } } } event message_t* RxTest.receive(message_t* bufPtr, void* payload, uint8_t len) { testmsg_t* msg = (testmsg_t*)payload; // helper variables stat_t* stat = stats + msg->edgeid; edge_t* edge = problem + msg->edgeid; dbg("Benchmark","RxTest.receive\n"); // In case the message is sent to this mote (also) if ( state == STATE_RUNNING || state == STATE_POST_RUN ){ ++(stat->receiveCount); // If the message id is ok if ( msg->msgid == edge->nextmsgid ) { ++(stat->consecutiveCount); } else { ++(stat->wrongCount); // If we got a message with a lower id than consecutive -> duplicate if ( msg->msgid < edge->nextmsgid ) ++(stat->duplicateCount); // If we got a message with a higher id than consecutive -> we have missed messages else { ++(stat->forwardCount); stat->missedCount += msg->msgid - edge->nextmsgid; } } // Set the next consecutive message id edge->nextmsgid = msg->msgid + 1; // Check whether we have to reply if ( edge->reply_on & outgoing_edges ) { // in case of "reply-to broadcast message" policy, the reply_on bitmask could // contain edges whose source is not this mote. // that is why, a filter is applied (outgoing_edges). postNewTrigger(edge->reply_on & outgoing_edges ); post sendPending(); } } return bufPtr; } event void TxTest.sendDone(message_t* bufPtr, error_t error) { testmsg_t* msg = (testmsg_t*)(call Packet.getPayload(bufPtr,sizeof(testmsg_t))); bool validSend = TRUE, wasACK = FALSE, sendMore = TRUE; // helper variables stat_t* stat = stats + msg->edgeid; edge_t* edge = problem + msg->edgeid; dbg("Benchmark","TxTest.sendDone\n"); _ASSERT_( sendlock == LOCKED ) _ASSERT_( state == STATE_RUNNING || state == STATE_POST_RUN || state == STATE_FINISHED ) if ( state == STATE_RUNNING || state == STATE_POST_RUN ) { _ASSERT_( edge->sender == TOS_NODE_ID ) _ASSERT_( pending & (1 << msg->edgeid) ) ++(stat->sendDoneCount); if ( error == SUCCESS ) { ++(stat->sendDoneSuccessCount); // If ACK is not requested if ( edge->policy.need_ack == 0 && (config.flags & GLOBAL_USE_ACK) == 0 ) { ++(edge->nextmsgid); // If ACK is requested and received } else if ( call Ack.wasAcked(bufPtr) ) { ++(edge->nextmsgid); ++(stat->wasAckedCount); wasACK = TRUE; // Otherwise ACK requested but not received } else { ++(stat->notAckedCount); validSend = FALSE; } } else { ++(stat->sendDoneFailCount); validSend = FALSE; } // If message is NOT considered to be sent if ( ! validSend ) { ++(stat->resendCount); } else { // Decrement the number of messages that are left to send // and restore the original value if necessary // this works for INFINITE and also for non-INF edges if ( edge->nums.send_num != INFINITE && --(edge->nums.left_num) == 0 ) { // Restore the value edge->nums.left_num = edge->nums.send_num; sendMore = FALSE; } // Check if we need to stop sending on ACK if ( wasACK && (edge->policy.stop_trigger & STOP_ON_ACK) ) { // This works for INFINITE and also for non-INF edges edge->policy.inf_loop_on = 0; edge->nums.left_num = edge->nums.send_num; sendMore = FALSE; } // If the infinite sending loop has been stopped if ( edge->nums.send_num == INFINITE && !edge->policy.inf_loop_on ) { sendMore = FALSE; } } // Remove the pending bit if applicable if ( !sendMore ) { atomic { pending &= ~ (1 << msg->edgeid ); } } else { ++(stat->triggerCount); } sendlock = UNLOCKED; if ( pending ) post sendPending(); } } task void sendPending() { pending_t pidx; am_addr_t address; uint8_t oldlock; testmsg_t* t_msg; // safe locking atomic{ oldlock = sendlock; sendlock = LOCKED; } // In case we have any chance to send if ( oldlock == UNLOCKED && state == STATE_RUNNING && pending ) { dbg("Benchmark","sendPending-1\n"); // find the next edge on which there exist any request do { pidx = 1 << (++eidx); if ( pidx == 0 ) { eidx = 0x0; pidx = 0x1; } } while ( !(pending & pidx) ); _ASSERT_( problem[eidx].sender == TOS_NODE_ID ) // Compose the new message call Packet.clear(&pkt); t_msg = (testmsg_t*)(call Packet.getPayload(&pkt,sizeof(testmsg_t))); t_msg->edgeid = eidx; t_msg->msgid = problem[eidx].nextmsgid; // Find out the required addressing mode address = ( config.flags & GLOBAL_USE_BCAST ) ? AM_BROADCAST_ADDR : problem[eidx].receiver; dbg("Benchmark","sendPending address %d\n",address); // MAC specific settings #ifdef LOW_POWER_LISTENING if ( config.flags & GLOBAL_USE_MAC_LPL ) call LowPowerListening.setRemoteWakeupInterval( &pkt,config.mac_setup[LPL_WAKEUP_OFFSET]); #endif #ifdef PACKET_LINK if ( config.flags & GLOBAL_USE_MAC_PLINK ) { call PacketLink.setRetries(&pkt,config.mac_setup[PLINK_RETRIES_OFFSET]); call PacketLink.setRetryDelay(&pkt,config.mac_setup[PLINK_DELAY_OFFSET]); } #endif dbg("Benchmark","sendPending-2\n"); // Find out whether we need to use ACK if ( (config.flags & GLOBAL_USE_ACK) || problem[eidx].policy.need_ack ) { call Ack.requestAck(&pkt); } else { call Ack.noAck(&pkt); } dbg("Benchmark","sendPending-3\n"); // Send out switch ( call TxTest.send( address, &pkt, sizeof(testmsg_t)) ) { case SUCCESS : dbg("Benchmark","sendPending-4\n"); ++(stats[eidx].sendSuccessCount); break; case FAIL : dbg("Benchmark","sendPending-5\n"); ++(stats[eidx].sendFailCount); ++(stats[eidx].resendCount); sendlock = UNLOCKED; post sendPending(); break; default : dbg("Benchmark","sendPending-6\n"); _ASSERT_( 0 ) break; } ++(stats[eidx].sendCount); } } } tinyos-2.1.2+dfsg/apps/tests/LinkBench/Benchmarks.h000066400000000000000000000046621207233610700221610ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #ifndef BENCHMARKS_H #define BENCHMARKS_H #include "BenchmarkCore.h" #include // Every benchmark can be numbered when defining it // This number is hidden in a separator edge right between the // benchmark's own edges #define _BMARK_START_(id) {INVALID_SENDER,(id),{0,0},{0,0,0,0,0},{0,0},0,0}, #define _BMARK_END_ , #define PROBLEMSET_END {INVALID_SENDER,0,{0,0},{0,0,0,0,0},{0,0},0,0} #define INVALID_SENDER AM_BROADCAST_ADDR #define ALL AM_BROADCAST_ADDR #define REPLY_ON(POS) (1<<(POS)) #define NUM(QTY) {(QTY), (QTY)} #define NO_REPLY 0 #define START_MSG_ID 1 #define NO_TIMER {0,0} #define TIMER(X) ((X)-1) edge_t problemSet[] = { #ifndef EXCLUDE_STANDARD #include "StandardBenchmarks.h" #endif #ifndef EXCLUDE_USERDEFINED #include "UserdefinedBenchmarks.h" #endif PROBLEMSET_END }; // problemSet END #endif tinyos-2.1.2+dfsg/apps/tests/LinkBench/Makefile000066400000000000000000000022051207233610700213620ustar00rootroot00000000000000COMPONENT=BenchmarkAppC # MAC protocol usage CFLAGS += -DLOW_POWER_LISTENING #CFLAGS += -DPACKET_LINK # use 32-bit length statistics ? (default is 16 bits) #CFLAGS += -DUSE_32_BITS # the maximum edge count that is present in all benchmarks CFLAGS += -DMAX_EDGE_COUNT=8 # exclude the standard benchmarks (or a part of it) from the problemset # for low-memory platforms like telosa it might be necessary #CFLAGS += -DEXCLUDE_STANDARD #CFLAGS += -DEXCLUDE_STANDARD_THROUGHPUT #CFLAGS += -DEXCLUDE_STANDARD_COLLISION #CFLAGS += -DEXCLUDE_STANDARD_FORWARDING # exclude the user defined benchmarks from the problemset CFLAGS += -DEXCLUDE_USERDEFINED # codeprofile, tossim support CFLAGS += -Icodeprofile CFLAGS += -Itossim #CFLAGS += -DTRAFFIC_MONITOR #CFLAGS += -I$(SZTETOSDIR)/lib/cc2420traffic # channel settings ifneq (,$(DEF_CHANNEL)) CFLAGS += -DCC2420_DEF_CHANNEL=$(DEF_CHANNEL) CFLAGS += -DRF230_DEF_CHANNEL=$(DEF_CHANNEL) CFLAGS += -DRFA1_DEF_CHANNEL=$(DEF_CHANNEL) endif ifneq (,$(findstring USE_32_BITS,$(CFLAGS))) CFLAGS += -DTOSH_DATA_LENGTH=97 else CFLAGS += -DTOSH_DATA_LENGTH=90 endif include $(MAKERULES) include Makefile.Pdetect tinyos-2.1.2+dfsg/apps/tests/LinkBench/Makefile.Pdetect000066400000000000000000000033121207233610700227510ustar00rootroot00000000000000# microcontroller identification ATM128_PLATFORMS = iris mica mica2 mica2dot micaz btnode3 ucmini ucdual ucmote900 MSP430_PLATFORMS = epic eyesIFX eyesIFXv1 eyesIFXv2 shimmer shimmer2 shimmer2r span telosa telosb tinynode z1 PXA27X_PLATFORMS = intelmote2 M16C62P_PLATFORMS= mulle CORTEX_PLATFORMS = sam3u_ek sam3s_ek ifneq ($(findstring $(PLATFORM),$(ATM128_PLATFORMS)),) MCU ?= ATM128 else ifneq ($(findstring $(PLATFORM),$(MSP430_PLATFORMS)),) MCU ?= MSP430 else ifneq ($(findstring $(PLATFORM),$(PXA27X_PLATFORMS)),) MCU ?= PXA27X else ifneq ($(findstring $(PLATFORM),$(M16C62P_PLATFORMS)),) MCU ?= M16C62P else ifneq ($(findstring $(PLATFORM),$(CORTEX_PLATFORMS)),) MCU ?= CORTEX else MCU ?= UNKNOWN endif CONTROLLER_$(MCU) = $(MCU) CFLAGS += -DCONTROLLER_$(MCU) # radio chip identification RFA1_PLATFORMS = ucmini ucdual ucmote900 RF230_PLATFORMS = iris mulle CC1000_PLATFORMS = mica mica2 mica2dot btnode3 CC2420_PLATFORMS = micaz telosa telosb shimmer shimmer2 shimmer2r epic span intelmote2 z1 sam3u_ek TDA5250_PLATFORMS= eyesIFX eyesIFXv1 eyesIFXv2 XE1205_PLATFORMS = tinynode CC2520_PLATFORMS = sam3s_ek ifneq ($(findstring $(PLATFORM),$(RF230_PLATFORMS)),) RCHIP ?= RF230 else ifneq ($(findstring $(PLATFORM),$(CC1000_PLATFORMS)),) RCHIP ?= CC1000 else ifneq ($(findstring $(PLATFORM),$(CC2420_PLATFORMS)),) RCHIP ?= CC2420 else ifneq ($(findstring $(PLATFORM),$(TDA5250_PLATFORMS)),) RCHIP ?= TDA5250 else ifneq ($(findstring $(PLATFORM),$(XE1205_PLATFORMS)),) RCHIP ?= XE1205 else ifneq ($(findstring $(PLATFORM),$(CC2520_PLATFORMS)),) RCHIP ?= CC2520 else ifneq ($(findstring $(PLATFORM),$(RFA1_PLATFORMS)),) RCHIP ?= RFA1 else RCHIP ?= UNKNOWN endif RADIO_$(RCHIP) = $(RCHIP) CFLAGS += -DRADIO_$(RCHIP) tinyos-2.1.2+dfsg/apps/tests/LinkBench/Messages.h000066400000000000000000000062731207233610700216530ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #ifndef MESSAGES_H #define MESSAGES_H #include "BenchmarkCore.h" enum { // AM Type identifiers AM_TESTMSG_T = 101, AM_CTRLMSG_T = 102, AM_SYNCMSG_T = 103, AM_SETUPMSG_T = 104, AM_DATAMSG_T = 105, // Control / Response message types SETUP_BASE = 0, CTRL_SETUP_SYN = 5, SYNC_SETUP_ACK = 6, CTRL_START = 10, CTRL_RESET = 20, CTRL_STAT_REQ = 30, DATA_STAT_OK = 31, CTRL_PROFILE_REQ = 40, DATA_PROFILE_OK = 41 }; typedef nx_struct testmsg_t { nx_uint8_t edgeid; // On which edge this message is intended to propagate through nx_seq_base_t msgid; // The auto-increment id of the message on the preset edge } testmsg_t; typedef nx_struct ctrlmsg_t { nx_uint8_t type; // Control type nx_uint8_t data_req_idx; // The requested stat-edge pair index in the requesting stage } ctrlmsg_t; typedef nx_struct syncmsg_t { nx_uint8_t type; nx_uint8_t edgecnt; // How many edges are in the current benchmark? nx_uint8_t maxmoteid; // How many motes are in the current benchmark? } syncmsg_t; typedef nx_struct setupmsg_t { nx_uint8_t type; setup_t config; } setupmsg_t; typedef nx_struct datamsg_t { nx_uint8_t type; // Response type nx_uint8_t data_idx; // The requested stat-edge pair index in the requesting stage nx_union { stat_t stat; // The requested stat structure in the requesting stage profile_t profile; // The profile of the mote } payload; } datamsg_t; #endif tinyos-2.1.2+dfsg/apps/tests/LinkBench/README000066400000000000000000000152511207233610700206070ustar00rootroot00000000000000LinkBench application README 1. Authors/Contacts: ----------------- veresskrisztian@gmail.com (Krisztian Veress, SZTE University, Szeged, Hungary ) 2. Description: ------------ This application's main goal is to provide a universal framework that is able to conduct reproducible tests/benchmarks in order to analyze and measure the radio- communication generated by the applied benchmark. The focus is on the radiocommunication, hence benchmarks are given by communica- tion links in a directed graph representation. For specifying benchmarks, see UserdefinedBenchmarks.h. 3. TinyOS network requirements: ---------------------------- To use the framework, one needs - a BaseStation mote with TOS_NODE_ID = 0. WARNING! When programming the BaseStation TOSH_DATA_LENGTH must be set to 110! - multiple 'test motes' with TOS_NODE_IDs 1,2,3, ... based on the required mote count of the benchmark to be run One should take note that mote's channels are set to the same value (based on the DEF_CHANNEL env variable), so when using different radio chips, compile time de- finitions such as -DRF230_DEF_CHANNEL = $(DEF_CHANNEL), and -DCC2420_DEF_CHANNEL = $(DEF_CHANNEL), ... are preset in the Makefile. To change this channel, set the DEF_CHANNEL variable to the required number: - in Unix systems : export DEF_CHANNEL=22 - in Windows : set DEF_CHANNEL=22 4. Quick Install Guide: -------------------- a, Connect one mote the your PC, and program it to be a BaseStation. Check on which port it is connected ( with motelist for example), and remember it. b, Connect as much motes as you would like to program to be benchmark 'test motes'. c, Either program them as you like, or execute the minstall.sh script: ./minstall.sh -i /dev/ttyUSBX where /dev/ttyUSBX is the device on which the BaseStation lives. d, Go to the javasrc directory and type: ant This will compile and assemble the Java sources. e, Got to the javabin directory created by the previous command, and execute: chmod +x *.sh ./linkbench.sh --help 4. Programming the motes: ---------------------- To program the 'test motes', simply execute the make command with appropriate options. Examples: - iris mote connected to MIB510 programmer on the first USB slot, assign TOS_NODE_ID=1 Unix : make iris install,1 mib510,/dev/ttyUSB0 Windows: make iris install,1 mib510,COM1 - telosa/telosb motes, assign TOS_NODE_ID=2 and 3 make telosa install,2 make telosb install,3 - ... 4./a 32-bit statistics support: -------------------------- Statistics are generally 16-bit integers. If overflows are experienced, you should consider setting the USE_32_BITS compile-time flag in the Makefile: CFLAGS += -DUSE_32_BITS 4./b Defining and using benchmarks: ------------------------------ To define your own benchmarks, do it in the UserdefinedBenchmarks.h file where additional information is available on how you can do that. After doing that, count the maximum of edges used in all your benchmarks, and set it in the Makefile: CFLAGS += -DMAX_EDGE_COUNT=8 You can exclude benchmark sets by setting the EXCLUDE_STANDARD or EXCLUDE_USERDEFINED flag in the Makefile. 5. Compiling the PC program: ------------------------- The application comes shipped with a PC-based control program located in the javasrc directory. The program depends on the tinyos.jar (TinyOS Java components) file, which comes with your TinyOS development libraries. In order to successfully compile, the code needs mig-generated classes, so make sure you have made a 'make ' for any target before compiling Java sources. Also you gonna need the ant (at least 1.7) utility which is a make system for Java. If everything is prepared, just type: ant in the javasrc directory. This will create a javabin directory in the root directory of the project. Then, executing either of the followings in the javabin folder: java -jar linkbench.jar --help sh linkbench.sh --help ./linkbench --help (if you have chmod-ed linkbench.sh to be executable) which will give you details on how this application can be used. 6. Using the application: ---------------------- To use the application, power-on all programmed 'test-motes', plug in the BaseStation mote to your PC, and set the MOTECOM variable to point to the BaseStation mote. Examples: - iris BaseStation mote connected to MIB510 programmer on the first USB slot export MOTECOM=serial@/dev/ttyUSB1:iris - telosb BaseStation mote connected on the second USB slot export MOTECOM=serial@/dev/ttyUSB2:telosb Then, execute the following: java -jar linkbench.jar -b 10 ./linkbench -b 10 which will eventually execute the 0th benchmark, and print the results on your screen. For more options, see java -jar linkbench.jar --help ./linkbench --help 7. Status indicators on 'test-motes': ---------------------------------- The code is written in a way so that the status of each 'test mote' can be tracked during the whole process. 0. All LEDs off : motes are in invalid state. This can only occur if you specify a benchmark to be run that is not available in the benchmark database. Do not worry, just reset them (java Benchmark -r), or simply run a benchmark which is available. 1. LED 1 on : mote is reset, standing by, waits for running a benchmark. 2. LED 2 on : mote received configuration, waits for handshake with the PC program 3. LED 1,LED 2 on : mote successfully configured, handshake is done 4. LED 3 on : benchmark is currently running 5. LED 3,LED 1 on : mote is in so-called 'lastchance' state -- being a pre-stop phase of the benchmark 6. LED 3,LED 2 on : mote finished the benchmark, statistics are ready 7. LED 3,LED 2 on : mote is uploading values to PC Motes should not be in states 2,3 and 5 for LONG TIME, if it happens, you can reset them by invoking either of the followings: java -jar linkbench.jar ./linkbench -r ( Note that this will reset ALL motes! ) 8. Known limitations: ---------------- - Configuration and data uploading is done in a one-hop manner, so 'test-motes' must be in the radio reception range of the BaseStation. tinyos-2.1.2+dfsg/apps/tests/LinkBench/StandardBenchmarks.h000066400000000000000000000306671207233610700236460ustar00rootroot00000000000000/** * Standard Benchmark Database file * ------------------------------------------------------------------------ * This is a no-modify file, keep it untouched. */ /* Throughput problems * ---------------------- * * In these problems, edges are present with continous message sending policies * meaning that motes try to send messages as fast as they can. * Such edges next to each other influence each other's behaviour. * * All of these benchmarks can be run with 4 motes (not all requires 4). */ #ifndef EXCLUDE_STANDARD_THROUGHPUT /** One-edge throughput **/ _BMARK_START_(10) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Two-edge throughput **/ _BMARK_START_(11) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 2, 1, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Three-edge, circle-style throughput **/ _BMARK_START_(12) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 2, 3, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, 1, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** One broadcast flooding mote **/ _BMARK_START_(13) { 4, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Two broadcast flooding motes **/ _BMARK_START_(14) { 4, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Three broadcast flooding motes **/ _BMARK_START_(15) { 4, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 2, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Two parallel throughput links **/ _BMARK_START_(16) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, 4, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Two parallel throughput links, one with ACK request**/ _BMARK_START_(17) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, NEED_ACK, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, 4, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** One throughput link next to one broadcast flooding mote **/ _BMARK_START_(18) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Hidden terminal problem (2 motes flooding the same mote) **/ _BMARK_START_(19) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Hidden terminal problem (3 motes flooding the same mote) **/ _BMARK_START_(20) { 1, 4, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 2, 4, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, 4, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ #endif // EXCLUDE_STANDARD_THROUGHPUT /* Collision problems * ---------------------- * * In these problems, communication is based on timers. Since all 4 timers that * are supported can be highly customized, different timer configurations could * result different scenarios. * If the sending windows match, collision occur, thus the name of these benchmarks. * * All of these benchmarks can be run with 4 motes. */ #ifndef EXCLUDE_STANDARD_COLLISION /** Two parallel timer-based links **/ _BMARK_START_(30) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 3, 4, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Two parallel timer-based links, broadcasting **/ _BMARK_START_(31) { 4, ALL, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 3, ALL, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Three parallel timer-based links, broadcasting **/ _BMARK_START_(32) { 4, ALL, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 3, ALL, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 2, ALL, {TIMER(3), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Three parallel timer-based links, direct links **/ _BMARK_START_(33) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 2, 3, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 3, 4, {TIMER(3), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Three timer-based links having a common destination **/ _BMARK_START_(34) { 1, 4, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 2, 4, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 3, 4, {TIMER(3), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** One timer-based link influenced by a parallel flooding link **/ _BMARK_START_(35) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 3, 4, NO_TIMER, { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** One timer-based link influenced by a parallel flooding link (broadcast) **/ _BMARK_START_(36) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 4, ALL, NO_TIMER, { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ #endif // EXCLUDE_STANDARD_COLLISION /* Forwarding problems * ---------------------- * * In these problems, communication initiation is based on timers. Additionally, networks * are created such a way that messages are to be forwarded, so if any mote hears a message, * it should forward it on at least one link. * * All of these benchmarks can be run with 6 motes (not all requires 6). */ #ifndef EXCLUDE_STANDARD_FORWARDING /** M2 forwards to M1 what it hears from M1 **/ _BMARK_START_(50) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(1), START_MSG_ID }, { 2, 1, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** M2 forwards to M1 what it hears from M1. Also, a flooding broadcast disturbance edge is present. **/ _BMARK_START_(51) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(1), START_MSG_ID }, { 2, 1, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 4, ALL, NO_TIMER, { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** A message chain with 4 motes. M1 initiates, M2,M3 forwards to a sink mote, M4. **/ _BMARK_START_(52) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(1), START_MSG_ID }, { 2, 3, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), REPLY_ON(2), START_MSG_ID }, { 3, 4, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** A message chain with 6 motes. M1 initiates, M2,M3,M4,M5 forwards to a sink mote, M6. **/ _BMARK_START_(53) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(1), START_MSG_ID }, { 2, 3, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), REPLY_ON(2), START_MSG_ID }, { 3, 4, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3), START_MSG_ID }, { 4, 5, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), REPLY_ON(4), START_MSG_ID }, { 5, 6, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** Two distinct, parallel forwarding chains: M1->M2->M3 and M4->M5->M6. **/ _BMARK_START_(54) { 1, 2, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(1), START_MSG_ID }, { 2, 3, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 4, 5, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3), START_MSG_ID }, { 5, 6, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** A "message collector" binary tree: M1, M2 transmits to M4, M4 forwards these messages to M5. M3 also transmits to M5. M5 forwards those messages that are heared either from M4 or M3 to M6. **/ _BMARK_START_(55) { 1, 4, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3), START_MSG_ID }, { 2, 4, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3), START_MSG_ID }, { 3, 5, {TIMER(3), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(4), START_MSG_ID }, { 4, 5, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), REPLY_ON(4), START_MSG_ID }, { 5, 6, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** A "noisy message collector" binary tree: M1, M2 transmits to M4, M4 forwards these messages to M5. M3 also transmits to M5. M6 acts as a disturbance mote, continously broadcasting. **/ _BMARK_START_(56) { 1, 4, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3), START_MSG_ID }, { 2, 4, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3), START_MSG_ID }, { 3, 5, {TIMER(3), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 4, 5, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 6, ALL, NO_TIMER, { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** A near complete binary tree message collector network. There are three chains : M1 -> M4 -> M6, M2 -> M5 -> M6, and M3 -> M5 -> M6. **/ _BMARK_START_(57) { 1, 4, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3), START_MSG_ID }, { 2, 5, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(4), START_MSG_ID }, { 3, 5, {TIMER(3), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(4), START_MSG_ID }, { 4, 6, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 5, 6, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** A "message disseminator" binary tree: M6 transmits to M5 which duplicates these messages towards M4 and M3. M3 is a sink, while M4 also forwards the messages to M1 and M2. **/ _BMARK_START_(58) { 6, 5, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(1) | REPLY_ON(2), START_MSG_ID }, { 5, 4, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3) | REPLY_ON(4), START_MSG_ID }, { 5, 3, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 4, 1, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 4, 2, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /** A "noisy message disseminator" binary tree: M5 sends messages to M4 and M3. M3 is a sink, while M4 forwards the messages to M1 and M2. M6 acts as a disturbance mote, continously broadcasting. **/ _BMARK_START_(59) { 5, 4, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(2) | REPLY_ON(3), START_MSG_ID }, { 5, 3, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 4, 1, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 4, 2, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 6, ALL, NO_TIMER, { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** A near complete binary tree message dissemination network. There are three chains : M6 -> M4 -> M1, M6 -> M5 -> M2, and M6 -> M5 -> M3. **/ _BMARK_START_(60) { 6, 4, {TIMER(1), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(2), START_MSG_ID }, { 6, 5, {TIMER(2), 0}, { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3) | REPLY_ON(4), START_MSG_ID }, { 4, 1, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 5, 2, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID }, { 5, 3, NO_TIMER, { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ #endif // EXCLUDE_STANDARD_FORWARDING tinyos-2.1.2+dfsg/apps/tests/LinkBench/UserdefinedBenchmarks.h000066400000000000000000000237201207233610700243330ustar00rootroot00000000000000/** * User Defined Benchmark Database file * ------------------------------------------------------------------------ * * This is a user-modifiable file, keep it clean, and stay to the rules below. * * Instructions for how to define a benchmark: * 1, All benchmarks MUST begin with a _BMARK_START_(X) macro, where X is its unique identifier. * Note that if multiple benchmarks have the same id, only the first is seen by the program, * others are ignored -- thus only eating expensive memory. * Valid ids are from [200,...,255], lower values are reserved for standard benchmarks. * * 2, All benchmarks MUST end with a _BMARK_END_ macro. * 3, Between these macros, the edges (allowed communication links between two) * separate motes) of the modeled network are enlisted. * * Each edge is a 7-element structure : * { SENDER, RECEIVER, TIMER_DESC, POLICY_DESC, MSG_COUNT, REPLY, 'START_MSG_ID' } * * 4, SENDER: - any positive number, denoting the mote id * RECEIVER: - any positive number other than the sender, denoting the mote id, * - 'ALL', denoting all motes. This automatically implies * that on this edge, broadcasting is used * * TIMER_DESC: * - 'NO_TIMER', if timers are not used on this edge * - {START_TIMER_DESC, STOP_TIMER_DESC} otherwise * * START_TIMER_DESC: * STOP_TIMER_DESC: * - '0', if sending/stopping is not initiated by a timer * - 'TIMER(X)', representing the Xth timer, ex: TIMER(2) * * POLICY_DESC: * - { SEND_TRIG, STOP_TRIG, ACK, 0, 0 } * SEND_TRIG: - 'SEND_ON_REQ', to send only if implicitly required (see below) * - 'SEND_ON_INIT', to send message on benchmark start, * - 'SEND_ON_TIMER', to send message on timer event ( * see START_TIMER_DESC) * STOP_TRIG: - '0', if no message sending stopper is required * - 'STOP_ON_ACK', if message sending is required to stop on an ACK * - 'STOP_ON_TIMER', if message sending is req. to stop on a timer event ( * see STOP_TIMER_DESC) * ACK: - '0', if acknowledgements are not requested * - 'NEED_ACK', if acknowledgements are requested * * MSG_COUNT: - NUM(X), denoting X message(s) to send, where X can be from [1,..,255]. * - NUM(INFINITE), denoting continous message sending. * * REPLY: - 'NO_REPLY', if message is not required to send on reception * - 'REPLY_EDGE(X)', if message is to send on reception on edge X. * - 'REPLY_EDGE(X) | REPLY_EDGE(Y) | ...', if message is to send on reception * on edge X AND on edge Y also. * (the edge ids count from zero in the current benchmark) * * By specifying the edges, the required mote count is implicitly determined by the maximal mote id * present either in the sender or receiver sections of the edge descriptions. (This can aslo be * overridden with a command line option (-mc) of the PC program. ) * * In the following example, the implied mote count is 1: * _BMARK_START_(202) * { 1, ALL, NO_TIMER , ... } * _BMARK_END_ * * However, if someone would like to increase this number (ex. to 4), there is a naughty trick: * _BMARK_START_(202) * { 4, ALL, NO_TIMER , ... } * _BMARK_END_ * * You are encouraged to use this motecount-force, rather than depending on the command-line option. * * For complete examples, see the demo benchmarks below. * These benchmarks are only for demo and reference purposes, so do not hesitate to erase them / comment them out to reduce the memory overhead. * */ // Send 10 messages (Mote1 -> Mote 2) when the test starts, and that's it. _BMARK_START_(200) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(10), NO_REPLY, START_MSG_ID } _BMARK_END_ // Send 10 messages (Mote2 -> Mote 1) when the test starts, and that's it. _BMARK_START_(201) { 2, 1, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(10), NO_REPLY, START_MSG_ID } _BMARK_END_ /* Send 10 broadcast messages when the test starts. * Note: try this benchmark with different motecount options on the PC side * - if motecount is set to 1 (default for this benchmark), no reception is seen in receiver side stats, * - if motecount is set to 2 (-mc 2): 10 reception (Mote 2 is now present, hearing Mote 1), * - if motecount is set to 5 (-mc 5): 40 reception (Mote 2,3,4,5 are present, hearing Mote 1), * - ... */ _BMARK_START_(202) { 1, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(10), NO_REPLY, START_MSG_ID } _BMARK_END_ // Send 10 messages when the test starts, and request acks. _BMARK_START_(203) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, NEED_ACK, 0, 0 }, NUM(10), NO_REPLY, START_MSG_ID } _BMARK_END_ // Send a message and request ack for it. If not acked, fallback at most 5 times. _BMARK_START_(204) { 1, 2, NO_TIMER , { SEND_ON_INIT, STOP_ON_ACK, NEED_ACK, 0, 0 }, NUM(5), NO_REPLY, START_MSG_ID } _BMARK_END_ // Mote 1 sends 3 messages to Mote 2. // Mote 2 sends messages to Mote1, stops when ack received and sends at most 7 messages if no ack received. _BMARK_START_(205) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(3), NO_REPLY, START_MSG_ID }, { 2, 1, NO_TIMER , { SEND_ON_INIT, STOP_ON_ACK, NEED_ACK, 0, 0 }, NUM(7), NO_REPLY, START_MSG_ID } _BMARK_END_ // Start sending continously messages when the test starts. Message sending stops when the test stops. _BMARK_START_(206) { 1, 2, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /** * Mote 1 starts contin. sending msgs to Mote 2 when the test starts. (1st edge) * Also Mote 1 is sending cont. broadcast msgs. (2nd edge) * Mote 3 sends at most 100 messages to Mote 1, request acks, and if it receives an ack, stops. (3rd edge) * * Note that this way the broadcast messages (2nd edge) are heared by Mote 2 and Mote 3, so the receiver side * statistics will be the double of the sender side ones on the 2nd edge. (Since every broadcast message sent by Mote 1 is heared by two motes!) */ _BMARK_START_(207) { 1, 2 , NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 1, ALL, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID }, { 3, 1 , NO_TIMER , { SEND_ON_INIT, STOP_ON_ACK, 0, 0, 0 }, NUM(100), NO_REPLY, START_MSG_ID } _BMARK_END_ // Send one message on every timer tick. Timer1 is used. _BMARK_START_(208) { 1, 2, {TIMER(1),0} , { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /* 1st edge: Send at most 10 messages on every timer tick. If ack received, stop sending. Timer1 is used. * 2nd edge: Send one broadcast message to every node when Timer2 tickens. */ _BMARK_START_(209) { 1, 2, {TIMER(1),0} , { SEND_ON_TIMER, STOP_ON_ACK, 0, 0, 0 }, NUM(10), NO_REPLY, START_MSG_ID }, { 1, ALL, {TIMER(2),0} , { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /* Start cont. sending messages on every timer tick of Timer1, and stop sending if Timer2 tickens. * By changing the type (oneshot/periodic) and frequency of the timers, different traffic patterns are * likely to be generated. */ _BMARK_START_(210) { 1, 2, {TIMER(1),TIMER(2)} , { SEND_ON_TIMER, STOP_ON_TIMER, 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /* Mote 1 sends 3 messages on every timer tick of Timer1. * Mote 2 starts cont. sending messages when the test starts and stops it if Timer2 tickens * or receives an ack, whichever comes first. */ _BMARK_START_(211) { 1, 2, {TIMER(1), 0} , { SEND_ON_TIMER, 0, 0, 0, 0 }, NUM(3), NO_REPLY, START_MSG_ID }, { 2, 1, {0,TIMER(2)} , { SEND_ON_INIT, STOP_ON_TIMER | STOP_ON_ACK , 0, 0, 0 }, NUM(INFINITE), NO_REPLY, START_MSG_ID } _BMARK_END_ /* Mote 1 sends 2 messages to Mote 2 on every Timer1 ticks. It stops (only sends one message) if Mote 2 * acknowledges the message. * If Mote 2 hears a message, it replies on edge 1 ( see REPLY_ON(1) of the 1st edge ), which means it * will send one message to Mote 3 (2nd edge). * Since REPLY_ON(2) is present in the 2nd edge, every time Mote 3 hears a message, it should reply on the * 3rd edge: sends one message to Mote 1. */ _BMARK_START_(212) { 1, 2, {TIMER(1),0}, { SEND_ON_TIMER, STOP_ON_ACK, 0, 0, 0 }, NUM(2), REPLY_ON(1), START_MSG_ID }, { 2, 3, NO_TIMER , { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), REPLY_ON(2), START_MSG_ID }, { 3, 1, NO_TIMER , { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), NO_REPLY, START_MSG_ID } _BMARK_END_ /* 1st edge : Mote 1 -> Mote 2: Exactly 2 messages on Timer1 ticks, request acks. * - every time Mote 2 hears a message from this edge, it should reply on the 3rd edge ( see REPLY_ON(2) ) * 2nd edge : Mote 3 -> Mote 2: One message on every Timer2 ticks, stop either on Timer3 ticks or on acks. * - note that in this case the STOP_ON_X policies are useless, since * on this edge only one message is to be sent, so no use to 'stop' it... * - every time Mote 2 hears a message from this edge, it should reply on the 3rd edge ( see REPLY_ON(2) ) * 3rd edge : Mote 2 broadcasts exactly one message. * - if anyone (Mote 1,Mote 3) hears it, it should reply on the 4th edge ( REPLY_ON(3) ). Since the 4th edge's * sender is 3, this only applies for Mote 3. * 4th edge : Mote 3 -> Mote 1: Exactly 4 messages to transmit. * - note that this edge has SEND_ON_INIT, so 4 messages are also transmitted when the test starts, * not just when Mote 3 replies for messages it gets on the 3rd edge! */ _BMARK_START_(213) { 1, 2, {TIMER(1),0}, { SEND_ON_TIMER, 0, NEED_ACK, 0, 0 }, NUM(2), REPLY_ON(2), START_MSG_ID }, { 3, 2, {TIMER(2),TIMER(3)}, { SEND_ON_TIMER, STOP_ON_TIMER | STOP_ON_ACK, 0, 0, 0 }, NUM(1), REPLY_ON(2), START_MSG_ID }, { 2, ALL, NO_TIMER , { SEND_ON_REQ, 0, 0, 0, 0 }, NUM(1), REPLY_ON(3), START_MSG_ID }, { 3, 1, NO_TIMER , { SEND_ON_INIT, 0, 0, 0, 0 }, NUM(4) , NO_REPLY, START_MSG_ID } _BMARK_END_ tinyos-2.1.2+dfsg/apps/tests/LinkBench/codeprofile/000077500000000000000000000000001207233610700222165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/codeprofile/CodeProfile.nc000066400000000000000000000043771207233610700247460ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ interface CodeProfile { /** * Retrieve the longest/shortest interrupt handling time in microseconds * * @return the maximum/minimum value */ command int32_t getMaxInterruptLength(); command int32_t getMinInterruptLength(); /** * Retrieve the longest/shortest atomic section's time in microseconds * * @return the maximum/minimum value */ command int32_t getMaxAtomicLength(); command int32_t getMinAtomicLength(); /** * Retrieve the maximum/minimum elapsed time in microseconds between two task. * * @return the maximum/minimum value */ command int32_t getMaxTaskLatency(); command int32_t getMinTaskLatency(); } tinyos-2.1.2+dfsg/apps/tests/LinkBench/codeprofile/CodeProfileC.nc000066400000000000000000000045711207233610700250450ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #if defined(TOSSIM) && ! defined(MHZ) #define MHZ 8 #endif configuration CodeProfileC { provides { interface StdControl; interface CodeProfile; } } implementation { #if defined(CONTROLLER_ATM128) components new AlarmMicro32C() as Alarm; #elif defined(CONTROLLER_MSP430) components Msp430CounterMicroC as Counter16; components new AlarmMicro16C() as Alarm16; components new TransformCounterC(TMicro,uint32_t,TMicro,uint16_t,0,uint32_t) as TCounter; TCounter.CounterFrom -> Counter16; components new TransformAlarmC(TMicro,uint32_t,TMicro,uint16_t,0) as Alarm; Alarm.AlarmFrom -> Alarm16; Alarm.Counter -> TCounter; #endif components CodeProfileP; CodeProfileP.Alarm -> Alarm; StdControl = CodeProfileP; CodeProfile = CodeProfileP; } tinyos-2.1.2+dfsg/apps/tests/LinkBench/codeprofile/CodeProfileP.nc000066400000000000000000000114701207233610700250560ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ #define ATOMIC_PERIODIC_TIME 4096 #define _MAX_(a,b) (((a) < (b)) ? (b) : (a)) #define _MIN_(a,b) (((a) > (b)) ? (b) : (a)) module CodeProfileP @safe() { provides { interface StdControl; interface CodeProfile; } uses { interface Alarm as Alarm; } } implementation { int32_t max_mil; // Maximum Interrupt Length int32_t max_mal; // Maximum Atomic Length int32_t max_mtl; // Maximum Task Latency int32_t min_mil; // Mininum Interrupt Length int32_t min_mal; // Mininum Atomic Length int32_t min_mtl; // Mininum Task Latency uint32_t mtl_offset; uint32_t mal_offset; norace bool alive; command int32_t CodeProfile.getMaxInterruptLength() { return max_mil; } command int32_t CodeProfile.getMaxAtomicLength() { atomic {return max_mal;} } command int32_t CodeProfile.getMaxTaskLatency() { return max_mtl; } command int32_t CodeProfile.getMinInterruptLength() { return min_mil; } command int32_t CodeProfile.getMinAtomicLength() { atomic {return min_mal;} } command int32_t CodeProfile.getMinTaskLatency() { return min_mtl; } task void measureTask() { uint32_t t1 = call Alarm.getNow(); uint32_t t2 = call Alarm.getNow(); // The difference between two consecutive getNow() call can be // significantly greater than zero, if interrupt(s) occured in between. That // difference is proportional to the running time of the // interrupt handler. max_mil = _MAX_((int32_t)(t2-t1),max_mil); min_mil = _MIN_((int32_t)(t2-t1),min_mil); // The difference between the posting time of this task (mtl_offset) // and the first expression's execution time ( t1 ) is the time // between two measureTask tasks. // This way, interleaving tasks' running time is measured. max_mtl = _MAX_((int32_t)(t1-mtl_offset),max_mtl); min_mtl = _MIN_((int32_t)(t1-mtl_offset),min_mtl); if ( alive ) { mtl_offset = call Alarm.getNow(); post measureTask(); } } command error_t StdControl.start() { alive = TRUE; min_mil = min_mtl = 0x7fffffffL; max_mil = max_mtl = -(0x7fffffffL-1L); // Atomic Length Measurement Init atomic { max_mal = -(0x7fffffffL-1L); min_mal = 0x7fffffffL; call Alarm.stop(); mal_offset = call Alarm.getNow(); call Alarm.startAt(mal_offset, ATOMIC_PERIODIC_TIME); } mtl_offset = call Alarm.getNow(); post measureTask(); return SUCCESS; } command error_t StdControl.stop() { call Alarm.stop(); alive = FALSE; return SUCCESS; } async event void Alarm.fired() { // Get the time int64_t delay = (int64_t)call Alarm.getNow(); atomic { // When the alarm should have been fired? // This is also the base of the next fire target. mal_offset += ATOMIC_PERIODIC_TIME; // Compute the shift between now and the target delay -= mal_offset; max_mal = _MAX_((int32_t)delay,max_mal); min_mal = _MIN_((int32_t)delay,min_mal); } if ( alive ) call Alarm.startAt(mal_offset,ATOMIC_PERIODIC_TIME); } } tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/000077500000000000000000000000001207233610700213545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/000077500000000000000000000000001207233610700233065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/cli/000077500000000000000000000000001207233610700240555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/cli/BenchmarkCli.java000066400000000000000000000412511207233610700272450ustar00rootroot00000000000000/** Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ package benchmark.cli; import benchmark.common.*; import java.io.FileNotFoundException; import java.io.PrintStream; import org.apache.commons.cli.*; public class BenchmarkCli { private BenchmarkController ctrl; public BenchmarkCli() { ctrl = new BenchmarkController(); } /** * Print out the help information */ public static void printHelp(final Options opt) { HelpFormatter f = new HelpFormatter(); System.out.println("Usage scenarios:"); Options opt0 = new Options(); opt0.addOption(opt.getOption("h")); System.out.println(); System.out.println("1. Print help information."); System.out.println("--------------------------------------------------------------------"); f.printHelp(150, "linkbench", "", opt0, "", true); // Batch - usage Options opt1 = new Options(); opt1.addOption(opt.getOption("F")); opt1.addOption(opt.getOption("o")); opt1.addOption(opt.getOption("tossim")); System.out.println(); System.out.println("2. Running benchmarks with pre-defined configurations in batch mode."); System.out.println("--------------------------------------------------------------------"); f.printHelp(150, "linkbench", "", opt1, "", true); // Reset - usage Options opt2 = new Options(); opt2.addOption(opt.getOption("r")); opt2.addOption(opt.getOption("tossim")); System.out.println(); System.out.println("3. Reset all motes."); System.out.println("--------------------------------------------------------------------"); f.printHelp(150, "linkbench", "", opt2, "", true); // Download - usage Options opt3 = new Options(); opt3.addOption(opt.getOption("dload")); opt3.addOption(opt.getOption("mc")); opt3.addOption(opt.getOption("xml")); System.out.println(); System.out.println("4. Only download data from the motes (if data available)."); System.out.println("--------------------------------------------------------------------"); f.printHelp(150, "linkbench", "", opt3, "", true); // Command-line usage Options opt4 = new Options(); opt4.addOption(opt.getOption("b")); opt4.addOption(opt.getOption("t")); opt4.addOption(opt.getOption("rs")); opt4.addOption(opt.getOption("lc")); opt4.addOption(opt.getOption("tr")); opt4.addOption(opt.getOption("ack")); opt4.addOption(opt.getOption("bcast")); opt4.addOption(opt.getOption("xml")); opt4.addOption(opt.getOption("mac")); opt4.addOption(opt.getOption("mc")); opt4.addOption(opt.getOption("tossim")); System.out.println(); System.out.println("5. Running a specific benchmark with command-line arguments"); System.out.println("--------------------------------------------------------------------"); f.printHelp(88, "linkbench", "", opt4, "", true); } /** * Construct the Options opt appropriate for * the Apache CLI command-line interpreter. */ private static void initOptions(Options opt) { // Batch related options Option batchfile = OptionBuilder .withArgName("file") .hasArg() .withDescription("The batch file with configuration parameters for multiple benchmark runs") .create("F"); Option batchoutput = OptionBuilder .withArgName("file") .hasArg() .withDescription("The output XML file name. [default: results.xml]") .create("o"); // Problem id option Option problem = OptionBuilder .withArgName("number") .hasArg() .withDescription("The benchmark to be used") .withLongOpt("benchmark") .create("b"); // Time- related options Option randomstart = OptionBuilder .withArgName("number") .hasArg() .withDescription("Random start delay in millisecs. [default: " + BenchmarkCommons.DEF_RANDSTART + " msec]") .withLongOpt("randomstart") .create("rs"); Option runtime = OptionBuilder .withArgName("normal") .hasArg() .withDescription("The benchmark running time in millisecs. " + "[default: " + BenchmarkCommons.DEF_RUNTIME + " msec]") .withLongOpt("time") .create("t"); Option lastchance = OptionBuilder .withArgName("number") .hasArg() .withDescription("The grace time period after test completion for" + " last-chance reception. [default : " + BenchmarkCommons.DEF_LASTCHANCE + " msec]") .withLongOpt("lastchance") .create("lc"); Option trtimers = OptionBuilder .withArgName("timer config list") .hasArg() .withDescription("Trigger timer configuration " + "index:isoneshot,maxrandomdelay,period. [default : 1:" + TimerParser.DEF_TIMER_ONESHOT + "," + TimerParser.DEF_TIMER_DELAY + "," + TimerParser.DEF_TIMER_PERIOD + " ]") .withLongOpt("triggers") .create("tr"); Option mac = OptionBuilder .withArgName("MAC params") .hasArg() .withDescription("MAC along with parameters: mactype:param1,param2,...,paramN [ mactypes: lpl,plink ]") .create("mac"); Option xml = OptionBuilder .withArgName("file") .hasArg() .withDescription("Produce xml output") .create("xml"); Option mcount = OptionBuilder .withArgName("number") .hasArg() .withDescription("How many motes are in the network.") .withLongOpt("motecount") .create("mc"); Option reset = OptionBuilder .withArgName("moteid") .hasArg() .withDescription("Reset the mote. If moteid set to 0, all motes are reset.") .withLongOpt("reset") .create("r"); opt.addOption(problem); opt.addOption(randomstart); opt.addOption(runtime); opt.addOption(lastchance); opt.addOption(xml); opt.addOption(mac); opt.addOption(mcount); opt.addOption(trtimers); opt.addOption(batchfile); opt.addOption(batchoutput); opt.addOption(reset); opt.addOption("h", "help", false, "Print help for this application"); opt.addOption("ack", false, "Force acknowledgements. [default : false]"); opt.addOption("bcast", "broadcast", false, "Force broadcasting. [default : false]"); opt.addOption("dload", "download", false, "Only download data from motes."); opt.addOption("tossim", false, "MUST be used if TOSSIM is in use."); } public boolean doReset(final boolean is_tossim, final int moteid) { if ( moteid == 0 ) System.out.print("> Reset all motes ... "); else System.out.print(String.format("> Reset mote %2d ... ",moteid)); try { if ( moteid == 0 ) ctrl.reset(!is_tossim); else ctrl.resetMote(moteid); System.out.println("OK"); return true; } catch (BenchmarkController.MessageSendException ex) { System.out.println("FAIL"); return false; } } public boolean doSync() { System.out.print("> Synchronize motes ... "); try { ctrl.syncAll(); System.out.println("OK"); return true; } catch (BenchmarkController.CommunicationException ex) { System.out.println("FAIL"); System.out.println(" " + ex.getMessage() ); return false; } } public boolean doDownloadStat(final int maxMoteId) { System.out.print("> Downloading data ... "); try { ctrl.download_stat(); System.out.println("OK"); return true; } catch (BenchmarkController.CommunicationException ex) { System.out.println("FAIL"); System.out.println(" " + ex.getMessage() ); return false; } } public boolean doDownloadProfile(final int maxMoteId) { System.out.print("> Downloading profile ... "); try { ctrl.download_profile(); System.out.println("OK"); return true; } catch (BenchmarkController.CommunicationException ex) { System.out.println("FAIL"); System.out.println(" " + ex.getMessage() ); return false; } } public boolean doSetup(final SetupT st, final boolean is_tossim) { System.out.print("> Setting up motes ... "); try { ctrl.setup(st,!is_tossim); System.out.println("OK"); return true; } catch (BenchmarkController.MessageSendException ex) { System.out.println("FAIL"); return false; } } public boolean doRun(final boolean is_tossim) { System.out.print("> Running benchmark ... "); try { ctrl.run(!is_tossim); System.out.println("OK"); return true; } catch (BenchmarkController.MessageSendException ex) { System.out.println("FAIL"); return false; } } public void doPrintXml(final String filename) { PrintStream ps; try { ps = new PrintStream(filename); ps.println(BenchmarkCommons.xmlHeader()); this.ctrl.getResults().printXml(ps); ps.println(BenchmarkCommons.xmlFooter()); ps.close(); } catch (FileNotFoundException ex) { System.out.println("Cannot open " + filename + " for writing!"); } } public void doPrint() { this.ctrl.getResults().print(System.out); } public static void main (String[] args) { try { // Make the options and parse it Options opt = new Options(); BenchmarkCli.initOptions(opt); BasicParser parser = new BasicParser(); CommandLine cl = parser.parse(opt, args); // Help request -- if present, do nothing else. // ----------------------------------------------------------------------- if ( cl.hasOption('h') ) { BenchmarkCli.printHelp(opt); System.exit(0); } // Reset request -- if present, do nothing else. // ----------------------------------------------------------------------- else if ( cl. hasOption('r') ) { BenchmarkCli cli = new BenchmarkCli(); if ( cli.doReset( cl.hasOption("tossim"), Integer.parseInt(cl.getOptionValue("r")) ) ) System.exit(0); else System.exit(1); } // Download request // ----------------------------------------------------------------------- else if ( cl.hasOption("dload") ) { int maxmoteid = cl.hasOption("mc") ? Integer.parseInt(cl.getOptionValue("mc")) : 1; if ( maxmoteid < 1 ) throw new MissingOptionException("Invalid number of motes specified!"); // Do what needs to be done BenchmarkCli cli = new BenchmarkCli(); if ( cli.doSync() && cli.doDownloadStat(maxmoteid) && cli.doDownloadProfile(maxmoteid) ) { // Dump results to XML or STDOUT if ( cl.hasOption("xml") ) cli.doPrintXml(cl.getOptionValue("xml")); else cli.doPrint(); System.exit(0); } else System.exit(1); } // Batch request // ----------------------------------------------------------------------- else if ( cl.hasOption('F') ) { String bfile = cl.getOptionValue('F'); String ofile = cl.hasOption('o') ? cl.getOptionValue('o') : "results.xml"; BenchmarkBatch rbb = new BenchmarkBatch(ofile); if ( rbb.parse(bfile) && rbb.run( cl.hasOption("tossim") ) ) { System.exit(0); } else System.exit(1); } // Command line control // ----------------------------------------------------------------------- else if ( cl.hasOption('b') ) { short problemidx = (short)Integer.parseInt(cl.getOptionValue('b')); if ( problemidx < 0 ) throw new MissingOptionException("Invalid problem specified!"); int startdelay = cl.hasOption("rs") ? Integer.parseInt(cl.getOptionValue("rs")) : BenchmarkCommons.DEF_RANDSTART; if ( startdelay < 0 ) throw new MissingOptionException("Invalid random start time specified!"); int runtimemsec = cl.hasOption('t') ? Integer.parseInt(cl.getOptionValue("t")) : BenchmarkCommons.DEF_RUNTIME; if ( runtimemsec <= 0 ) throw new MissingOptionException("Invalid runtime specified!"); int lchance = cl.hasOption("lc") ? Integer.parseInt(cl.getOptionValue("lc")) : BenchmarkCommons.DEF_LASTCHANCE; if ( lchance < 0 ) throw new MissingOptionException("Invalid last chance time specified!"); int maxmoteid = cl.hasOption("mc") ? Integer.parseInt(cl.getOptionValue("mc")) : 1; if ( maxmoteid < 1 ) throw new MissingOptionException("Invalid number of motes specified!"); // Trigger timer parsing TimerParser tp = new TimerParser(BenchmarkStatic.MAX_TIMER_COUNT); if ( cl.hasOption("tr") ) { for ( String s : cl.getOptionValues("tr") ) { tp.parse(s); } } // Trigger timer parsing MacParser mac = new MacParser(); if ( cl.hasOption("mac") ) { for ( String s : cl.getOptionValues("mac") ) { mac.parse(s); } } // Mac protocols may have flags set short flags = mac.getFlags(); if ( cl.hasOption("ack") ) flags |= BenchmarkStatic.GLOBAL_USE_ACK; if ( cl.hasOption("bcast") ) flags |= BenchmarkStatic.GLOBAL_USE_BCAST; // Create the setup structure SetupT st = new SetupT(); st.set_problem_idx(problemidx); st.set_pre_run_msec(startdelay); st.set_runtime_msec(runtimemsec); st.set_post_run_msec(lchance); st.set_flags(flags); st.set_timers_isoneshot(tp.getIos()); st.set_timers_delay(tp.getDelay()); st.set_timers_period_msec(tp.getPeriod()); st.set_mac_setup(mac.getMacParams()); // Do what needs to be done boolean tossim = cl.hasOption("tossim"); BenchmarkCli cli = new BenchmarkCli(); if (cli.doReset(tossim,0) && cli.doSetup(st,tossim) && cli.doSync() && cli.doRun(tossim) && cli.doDownloadStat(maxmoteid) && cli.doDownloadProfile(maxmoteid) ) { // Dump results to XML or STDOUT if ( cl.hasOption("xml") ) cli.doPrintXml(cl.getOptionValue("xml")); else cli.doPrint(); System.exit(0); } else { System.exit(1); } } else { throw new MissingOptionException("Invalid program arguments, use --help for help!"); } } catch (Exception e) { System.err.println(); System.err.println("Error : " + e.getMessage()); System.err.println(); System.exit(1); } } } tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/common/000077500000000000000000000000001207233610700245765ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/common/BenchmarkBatch.java000066400000000000000000000304661207233610700303060ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ package benchmark.common; import java.io.File; import java.io.FileInputStream; import java.io.FileNotFoundException; import java.io.PrintStream; import java.util.ArrayList; import java.util.Arrays; import java.util.HashSet; import java.util.List; import java.util.Map; import java.util.Set; import org.yaml.snakeyaml.Yaml; public class BenchmarkBatch { private List setups; private List motecounts; private String outputfile; private final String S_CONFIG = "config"; private final String S_CONFIG_BMARK = "bmark"; private final String S_CONFIG_MOTEC = "motes"; private final String S_CONFIG_RANDSTART = "randstart"; private final String S_CONFIG_TIME = "time"; private final String S_CONFIG_LC = "lchance"; private final String S_TIMERS = "timers"; private final String S_TIMER_PREFIX = "t"; private final String S_FORCES = "forces"; private final String S_FORCES_ACK = "ack"; private final String S_FORCES_BCAST = "bcast"; private final String S_MAC = "mac"; class WrongFormatException extends Exception { public WrongFormatException(String message) { super(message); } } /** * Construct an object being able to conduct batch benchmark runs. * @param outputfile the file where we should output the results */ public BenchmarkBatch(final String outputfile) { this.outputfile = outputfile; this.setups = new ArrayList(); this.motecounts = new ArrayList(); } private void checkUnknownTags(final Set reference, final Set check) throws WrongFormatException { Set difference = new HashSet(check); difference.removeAll(reference); if ( ! difference.isEmpty() ) { throw new WrongFormatException("Unknown tags found : " + difference.toString()); } } /** * Parse a YAML-formatted configuration file, and save it for further processing. * * @param configfile the file * @return TRUE if no error detected, FALSE otherwise * @throws WrongFormatException */ public boolean parse(final String configfile) throws WrongFormatException { try { System.out.print("> Parsing configuration file ... "); int num = 0; for (Object doc : new Yaml().loadAll(new FileInputStream(new File(configfile)))) { ++num; // whole benchmark section // --------------------------------------------------------------------- Map bmark = (Map) doc; // Format checking if ( bmark == null ) throw new WrongFormatException("Check your configuration file's format, it is incorrect!"); else { String ref[] = { S_CONFIG, S_TIMERS, S_FORCES, S_MAC }; checkUnknownTags(new HashSet(Arrays.asList(ref)), bmark.keySet()); if ( !bmark.containsKey(S_CONFIG) ) throw new WrongFormatException("No '" + S_CONFIG + "' section found in benchmark description : " + num); } // config section - it MUST exist (previously we checked it!) // --------------------------------------------------------------------- Map bconfig = (Map) bmark.get(S_CONFIG); // Format checking { String ref[] = { S_CONFIG_BMARK, S_CONFIG_MOTEC, S_CONFIG_TIME, S_CONFIG_LC, S_CONFIG_RANDSTART }; checkUnknownTags(new HashSet(Arrays.asList(ref)), bconfig.keySet()); if ( !bconfig.containsKey(S_CONFIG_BMARK) || !bconfig.containsKey(S_CONFIG_TIME) ) throw new WrongFormatException("The '" + S_CONFIG_BMARK + "' and '" + S_CONFIG_TIME + "' values are mandatory!"); // Value check if ( bconfig.containsKey(S_CONFIG_BMARK) && bconfig.get(S_CONFIG_BMARK) < 0) throw new WrongFormatException("All '" + S_CONFIG_BMARK + "' values must be non-negative!"); if ( bconfig.containsKey(S_CONFIG_TIME) && bconfig.get(S_CONFIG_TIME) <= 0) throw new WrongFormatException("All '" + S_CONFIG_TIME + "' values must be positive!"); if ( bconfig.containsKey(S_CONFIG_MOTEC) && bconfig.get(S_CONFIG_MOTEC) < 1) throw new WrongFormatException("All '" + S_CONFIG_MOTEC + "' values must be positive!"); if ( bconfig.containsKey(S_CONFIG_LC) && bconfig.get(S_CONFIG_LC) < 0) throw new WrongFormatException("All '" + S_CONFIG_LC + "' values must be non-negative!"); if ( bconfig.containsKey(S_CONFIG_RANDSTART) && bconfig.get(S_CONFIG_RANDSTART) < 0) throw new WrongFormatException("All '" + S_CONFIG_RANDSTART + "' values must be non-negative!"); } // timers section // --------------------------------------------------------------------- List< Map> > btimers = bmark.containsKey(S_TIMERS) ? (List< Map> >) bmark.get(S_TIMERS) : null; TimerParser tp = new TimerParser(BenchmarkStatic.MAX_TIMER_COUNT); // Format checking if (btimers != null) { for (Map> timerspec : btimers) { for (byte i = 1; i <= BenchmarkStatic.MAX_TIMER_COUNT; ++i) { if (timerspec.containsKey(S_TIMER_PREFIX + i)) { List timervalues = (List) timerspec.get(S_TIMER_PREFIX + i); if (timervalues.size() != 3) { throw new WrongFormatException("All timer specification must contain exactly 3 values!"); } tp.setSpec((byte)(i-1), timervalues.get(0).shortValue(), timervalues.get(1).longValue(), timervalues.get(2).longValue()); } } } } // MAC parameter section // --------------------------------------------------------------------- List< Map> > macparams = bmark.containsKey(S_MAC) ? (List< Map> >) bmark.get(S_MAC) : null; MacParser mp = new MacParser(); // Format checking if (macparams != null) { for (Map> macspec : macparams) { for ( String key : macspec.keySet() ) { mp.parseAll(key, toIntArray(macspec.get(key)) ); } } } // forces section // --------------------------------------------------------------------- List forceopts = bmark.containsKey(S_FORCES) ? (List) bmark.get(S_FORCES) : null; // Format + value checking if ( forceopts != null ) { String ref[] = { S_FORCES_ACK, S_FORCES_BCAST}; checkUnknownTags(new HashSet(Arrays.asList(ref)), new HashSet(forceopts)); } short flags = mp.getFlags(); if ( forceopts != null ) { if ( forceopts.contains(S_FORCES_ACK) ) flags |= BenchmarkStatic.GLOBAL_USE_ACK; if ( forceopts.contains(S_FORCES_BCAST) ) flags |= BenchmarkStatic.GLOBAL_USE_BCAST; } // Create a SetupT for the current benchmark SetupT setup = new SetupT(); setup.set_problem_idx(bconfig.get(S_CONFIG_BMARK).shortValue()); setup.set_pre_run_msec( bconfig.containsKey(S_CONFIG_RANDSTART) ? bconfig.get(S_CONFIG_RANDSTART) : BenchmarkCommons.DEF_RANDSTART); setup.set_runtime_msec(bconfig.get(S_CONFIG_TIME).shortValue()); setup.set_post_run_msec( bconfig.containsKey(S_CONFIG_LC) ? bconfig.get(S_CONFIG_LC) : BenchmarkCommons.DEF_LASTCHANCE); setup.set_mac_setup(mp.getMacParams()); setup.set_flags(flags); setup.set_timers_isoneshot(tp.getIos()); setup.set_timers_delay(tp.getDelay()); setup.set_timers_period_msec(tp.getPeriod()); // update our attributes this.setups.add(setup); this.motecounts.add( bconfig.containsKey(S_CONFIG_MOTEC) ? bconfig.get(S_CONFIG_MOTEC) : 1); } System.out.println("OK"); System.out.println(" " + configfile + " : " + this.setups.size() + " benchmark(s) successfully parsed."); return true; } catch (FileNotFoundException ex) { System.out.println("FAIL"); System.out.println(" File named " + configfile + " not found!"); } catch (WrongFormatException ex) { System.out.println("FAIL"); System.out.println(" " + ex.getMessage()); } catch (Exception ex) { System.out.println("FAIL"); System.out.println(" Wrong configuration file format! The file must be YAML-formatted."); System.out.println(" " + ex.getMessage()); } return false; } /** * Run the previously parsed benchmark configurations. */ public boolean run(final boolean is_tossim) { PrintStream ps = null; try { ps = new PrintStream(this.outputfile); ps.println(BenchmarkCommons.xmlHeader()); BenchmarkController ctrl = new BenchmarkController(); ctrl.reset(!is_tossim); int i = 0; int total = this.setups.size(); int progress = 1; // Run each benchmark sequentially for (SetupT s : setups) { ctrl.updateMoteCount(this.motecounts.get(i++)); System.out.print("\r> Progress : " + (progress * 100 / total ) + "% (" + progress + "/" + total + ")" ); try { ctrl.reset(!is_tossim); ctrl.setup(s,!is_tossim); ctrl.syncAll(); ctrl.run(!is_tossim); ctrl.download_stat(); ctrl.download_profile(); } catch (BenchmarkController.MessageSendException ex) { ctrl.getResults().setError(ex.getMessage()); } catch (BenchmarkController.CommunicationException ex) { ctrl.getResults().setError(ex.getMessage()); } ++progress; ctrl.getResults().printXml(ps); } ps.println(BenchmarkCommons.xmlFooter()); ps.close(); System.out.println(); System.out.println("> Batch processing successfully finished!"); return true; } catch (FileNotFoundException ex) { System.out.println(" File named " + outputfile + " cannot be created!"); System.out.println("> Batch processing failed!"); return false; } catch (Exception ex) { System.out.println(" " + ex.getMessage()); System.out.println("> Batch processing failed!"); return false; } } private static int[] toIntArray(List list) { int[] ret = new int[list.size()]; int i = 0; for (Integer e : list) ret[i++] = e.intValue(); return ret; } } tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/common/BenchmarkCommons.java000066400000000000000000000272211207233610700306730ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ package benchmark.common; import java.util.Vector; public class BenchmarkCommons { public static final short DEF_RANDSTART = 0; public static final short DEF_RUNTIME = 1000; public static final short DEF_LASTCHANCE = 20; private static final String nl = System.getProperty("line.separator"); /** * Compute the overall running time of the benchmark defined by the argument * @param config The benchmark configuration * @return the overall running time in msecs */ public static long getRuntime(final SetupT config) { return config.get_pre_run_msec() + config.get_runtime_msec() + config.get_post_run_msec(); } /** * Get the XML header for results generation * @return the XML header as one string */ public static String xmlHeader() { return "" + "" + nl + ""; } /** * Get the XML footer for results generation * @return the XML footer as one string */ public static String xmlFooter() { return ""; } /** * Generates a multi-line String representation of a benchmark * configuration passed as an argument. * * @param config The configuration * @return the string representation */ public static String setupAsString(final SetupT config) { String out = "> Problem: \t" + config.get_problem_idx() + nl; out += " Runtime: \t[max (" + config.get_pre_run_msec() + "ms) + " + config.get_runtime_msec() + "ms + " + config.get_post_run_msec() + " ms]" + nl; out += " F.Ack/Bcast: \t"; out += ( config.get_flags() & 0x1 ) > 0 ? "On/" : "Off/"; out += ( config.get_flags() & 0x2 ) > 0 ? "On" : "Off"; out += nl; out += " Timers: \t["; short ios[] = config.get_timers_isoneshot(); long delay[] = config.get_timers_delay(); long period[] = config.get_timers_period_msec(); for (int i=0; i< BenchmarkStatic.MAX_TIMER_COUNT; ++i) { out += (ios[i] == 1 ) ? "1shot " : "period "; out += delay[i] + "ms/"; out += period[i] + "ms"; if (i != BenchmarkStatic.MAX_TIMER_COUNT-1) out += " | "; } out += "]" + nl; out += MacParser.macAsString(config.get_flags(),config.get_mac_setup()); return out; } /** * Generates an XML representation of a benchmark * configuration passed as an argument. * * @param config The configuration * @return the XML representation */ public static String setupAsXml(final SetupT config) { String out = ""+nl; out +="" + config.get_problem_idx() + ""+nl; out +="" + config.get_pre_run_msec() + ""+nl; out +="" + config.get_runtime_msec() + ""+nl; out +="" + config.get_post_run_msec() + ""+nl; out +="" + (((config.get_flags() & BenchmarkStatic.GLOBAL_USE_ACK ) > 0 )? "On" : "Off") + ""+nl; out +="" + (((config.get_flags() & BenchmarkStatic.GLOBAL_USE_BCAST ) > 0 ) ? "On" : "Off") + ""+nl; out += MacParser.macAsXml(config.get_flags(),config.get_mac_setup()); short ios[] = config.get_timers_isoneshot(); long delay[] = config.get_timers_delay(); long period[] = config.get_timers_period_msec(); for (int i=0; i< BenchmarkStatic.MAX_TIMER_COUNT; ++i) { out += ""+nl; } out += ""; return out; } /** * Generates a multi-line String representation of the results of a benchmark * * @param stats the collection of the results * @return the string representation */ public static String statsAsString(final Vector stats) { String hdr = " -----------------------------------------------------------------------------------------------------------------" + nl + " Statistics :\t[ Tri Blg Res | send Succ Fail | sDone Succ Fail | Ack NAck | Recv Exp Wrng Dupl Frwd Miss | Rem ]"; String ret = ""; for (int i = 0; i < stats.size(); ++i) { StatT s = stats.get(i); String str = String.format(" Edge(%2d) :\t[ %2$3d %3$3d %4$3d | %5$4d %6$4d %7$4d | %8$5d %9$4d %10$4d | %11$3d %12$4d | %13$4d %14$4d %15$4d %16$4d %17$4d %18$4d | %19$3d ]", i, s.get_triggerCount(), s.get_backlogCount(), s.get_resendCount(), s.get_sendCount(), s.get_sendSuccessCount(), s.get_sendFailCount(), s.get_sendDoneCount(), s.get_sendDoneSuccessCount(), s.get_sendDoneFailCount(), s.get_wasAckedCount(), s.get_notAckedCount(), s.get_receiveCount(), s.get_consecutiveCount(), s.get_wrongCount(), s.get_duplicateCount(), s.get_forwardCount(), s.get_missedCount(), s.get_remainedCount()); ret += str + nl; } return hdr + nl + ret; } /** * Generates an XML representation of the results of a benchmark. * * @param stats the collection of the results * @return the XML representation */ public static String statsAsXml(final Vector stats) { String ret = ""+nl; for ( int i = 0; i< stats.size(); ++i ) { StatT s = stats.get(i); ret += ""; ret += "" + s.get_triggerCount() + ""; ret += "" + s.get_backlogCount() + ""; ret += "" + s.get_resendCount() + ""; ret += "" + s.get_sendCount() + ""; ret += "" + s.get_sendSuccessCount() + ""; ret += "" + s.get_sendFailCount() + ""; ret += "" + s.get_sendDoneCount() + ""; ret += "" + s.get_sendDoneSuccessCount() + ""; ret += "" + s.get_sendDoneFailCount() + ""; ret += "" + s.get_wasAckedCount() + ""; ret += "" + s.get_notAckedCount() + ""; ret += "" + s.get_receiveCount() + ""; ret += "" + s.get_consecutiveCount() + ""; ret += "" + s.get_wrongCount() + ""; ret += "" + s.get_forwardCount() + ""; ret += "" + s.get_duplicateCount() + ""; ret += "" + s.get_missedCount() + ""; ret += "" + s.get_remainedCount() + ""; ret += "" + nl; } ret += ""; return ret; } /** * Generates a String representation of the profile information of a benchmark * * @param profiles the computed profiles * @return the string representation */ public static String profilesAsString(final Vector profiles) { String hdr = " Profiles :\t[ Dbg | MaxAtom MaxInt MaxLat | MinAtom MinInt MinLat | RxTxTime RStartCnt RxMsgs Rx_B Tx_B ]"; String ret = ""; for (int i = 0; i < profiles.size(); ++i) { ProfileT p = profiles.get(i); String str = String.format(" Mote(%2d) :\t[ %2$3d | %3$7d %4$6d %5$6d | %6$7d %7$6d %8$6d | %9$10d %10$10d %11$10d %12$10d %13$10d ]", i+1, p.get_debug(), p.get_max_atomic(), p.get_max_interrupt(), p.get_max_latency(), p.get_min_atomic(), p.get_min_interrupt(), p.get_min_latency(), p.get_rtx_time(), p.get_rstart_count(), p.get_rx_msgs(), p.get_rx_bytes(), p.get_tx_bytes()); ret += str + nl; } return hdr + nl + ret; } /** * Generates an XML representation of the profile information of a benchmark * * @param profiles the computed profiles * @return the XML representation */ public static String profilesAsXml(final Vector profiles) { String ret = ""+nl; for ( int i = 0; i< profiles.size(); ++i ) { ProfileT p = profiles.get(i); ret += ""; ret += "" + p.get_max_atomic() + ""; ret += "" + p.get_max_interrupt() + ""; ret += "" + p.get_max_latency() + ""; ret += "" + p.get_min_atomic() + ""; ret += "" + p.get_min_interrupt() + ""; ret += "" + p.get_min_latency() + ""; ret += "" + p.get_rtx_time() + ""; ret += "" + p.get_rstart_count() + ""; ret += "" + p.get_rx_msgs() + ""; ret += "" + p.get_rx_bytes() + ""; ret += "" + p.get_tx_bytes() + ""; ret += "" + p.get_debug() + ""; ret += ""+nl; } ret += ""; return ret; } /** * Generates a String from the error which may have occured during the benchmark * @param s the error * @return the ready-for-output representation */ public static String errorAsString(final String s) { return " Error :\t" + ((s.compareTo("") == 0) ? "No errors." : s); } /** * Generates an XML tag from the error which may have occured during the benchmark * @param s the error * @return the ready-for-output XML representation */ public static String errorAsXml(final String s) { return "" + s + ""; } /** * Parses a parameter from an array based on its offset and length in bytes. * @param a underlying byte array * @param offset where does it start? * @param bytes how long? * @return the parameter * * Generated interfaces force us to use short for parameter 'a' but it is * a byte array in real. */ private static final long parseMacParameter(final short[] a, final byte offset, final byte bytes) { long l = 0; for(int i= offset; i< bytes; ++i) { l |= (byte)(a[i]) & 0xFF; l <<= 8; } return l; } }tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/common/BenchmarkController.java000066400000000000000000000320531207233610700314020ustar00rootroot00000000000000/** Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ package benchmark.common; import java.util.concurrent.locks.*; import java.util.concurrent.TimeUnit; import net.tinyos.message.*; /** * The class that is able to communicate with the LinkBenchmark * TinyOS application. * * This class is responsible for sending and receiving control/data messages * to/from the motes via a BaseStation mote. * * It is designed to be minimal and full, so everything is functional yet user- * friendlyness must be implemented elsewhere. */ public class BenchmarkController implements MessageListener { private MoteIF mif; // Needed for proper downloading final Lock lock = new ReentrantLock(); final Condition answered = lock.newCondition(); private boolean handshake; private static int currentMote = 1; private static short currentData = 0; // Public to be able to set it easily public static final short MAXPROBES = 6; public static final short MAXTIMEOUT = 2000; private BenchmarkResult results; // These values are updated during the synchronization phase private int maxMoteId = 2; private int edgecount = 0; public class MessageSendException extends Exception {}; public class CommunicationException extends Exception { public CommunicationException(String message) { super(message); } }; /** * Contruct a controller. * * @param motecount How many motes are used? */ public BenchmarkController() { mif = new MoteIF(); mif.registerListener(new SyncMsgT(),this); mif.registerListener(new DataMsgT(),this); maxMoteId = 2; results = new BenchmarkResult(); } /** * Set the maximal mote id in the network. * * @param maxMoteId The new value */ public void updateMoteCount(final int maxMoteId) { this.maxMoteId = maxMoteId; this.edgecount = 0; } /** * Get the results * @return an object containing the current results */ public BenchmarkResult getResults() { return this.results; } /** * Send a RESET control message to the network. * It is a broadcast message, so every mote should receive it. * * @param use_bcast Whether send one broadcast message or iterate through the motes * @throws MessageSendException if an error occured (message is failed to send) */ public boolean reset(final boolean use_bcast) throws MessageSendException { CtrlMsgT cmsg = new CtrlMsgT(); cmsg.set_type(BenchmarkStatic.CTRL_RESET); try { if (use_bcast ){ mif.send(MoteIF.TOS_BCAST_ADDR,cmsg); } else { currentMote = 1; while ( currentMote <= maxMoteId ) { mif.send(currentMote++,cmsg); } } Thread.sleep((int)(500)); } catch(Exception e) { throw new MessageSendException(); } return true; } /** * Send a RESET control message to only one mote. * * @param moteId The mote to be resetted * @param use_bcast Whether send one broadcast message or iterate through the motes * @throws MessageSendException if an error occured (message is failed to send) */ public boolean resetMote(final int moteId) throws MessageSendException { CtrlMsgT cmsg = new CtrlMsgT(); cmsg.set_type(BenchmarkStatic.CTRL_RESET); try { mif.send(moteId,cmsg); Thread.sleep((int)(500)); } catch(Exception e) { throw new MessageSendException(); } return true; } /** * Send a SETUP control message to the network. * It is a broadcast message, so every mote should receive it. * * @param config The benchmark configurationT * @throws MessageSendException if an error occured (message is failed to send) */ /** * Send a SETUP control message to the network. * It is a broadcast message, so every mote should receive it. * * @param config The benchmark configurationT * @param use_bcast Whether use one broadcast message or iterate through the motes * @throws MessageSendException if an error occured (message is failed to send) */ public void setup(final SetupT config, final boolean use_bcast) throws MessageSendException { this.results.setConfig(config); // Create an appropriate setup message SetupMsgT smsg = new SetupMsgT(); smsg.set_config_problem_idx(config.get_problem_idx()); smsg.set_config_pre_run_msec(config.get_pre_run_msec()); smsg.set_config_runtime_msec(config.get_runtime_msec()); smsg.set_config_post_run_msec(config.get_post_run_msec()); smsg.set_config_flags(config.get_flags()); smsg.set_config_timers_isoneshot(config.get_timers_isoneshot()); smsg.set_config_timers_delay(config.get_timers_delay()); smsg.set_config_timers_period_msec(config.get_timers_period_msec()); smsg.set_config_mac_setup(config.get_mac_setup()); smsg.set_type(BenchmarkStatic.SETUP_BASE); try { if (use_bcast ){ mif.send(MoteIF.TOS_BCAST_ADDR,smsg); } else { currentMote = 1; while ( currentMote <= maxMoteId ) mif.send(currentMote++,smsg); } Thread.sleep((int)(500)); } catch(Exception e) { throw new MessageSendException(); } } /** * Synchronize all motes in the network having mote id from 1 to * the 'motecount' value specified either in the constructor or set by the * setMoteCount setter method. * * By synchronizing, we can detect failed motes (not answering), improperly * configured motes (wrong answers), and get the real motecount based on the * active benchmark configured in the network. * * @throws CommunicationException if synchronization error happens */ public void syncAll() throws CommunicationException { currentMote = 1; while ( currentMote <= maxMoteId ) { if ( !sync(currentMote) ) { throw new CommunicationException( "Synchronization Error with Mote ID: " + currentMote + "." + " -- Possible reasons: Bad benchmark ID, Mote not operational, not configured (Only LED 1 On), or badly configured (No LEDS On)" ); } else ++currentMote; } } /** * Send a SETUP_SYN control message to the specified mote. * It is a direct addressing message, so only the specified mote should * receive, and answer it. * * The handshake is probed MAXPROBES times using MAXTIMEOUT waiting for each. * * @param moteId The mote's id whom to send the synchronization request. * @return TRUE if the mote answered to our sync request, FALSE otherwise */ public boolean sync(final int moteId) { // Create a SYNC-request control message CtrlMsgT cmsg = new CtrlMsgT(); cmsg.set_type(BenchmarkStatic.CTRL_SETUP_SYN); lock.lock(); handshake = false; for( short probe = 0; !handshake && probe < MAXPROBES; ++probe ) { try { mif.send(moteId,cmsg); answered.await(MAXTIMEOUT,TimeUnit.MILLISECONDS); } catch(Exception e) { break; } } lock.unlock(); return handshake; } /** * Send a START control message to the network. * It is a broadcast message, so every mote should receive it. * * @param use_bcast Whether use one broadcast message or iterate through the motes * @throws MessageSendException if an error occured (message is failed to send) */ public void run(final boolean use_bcast) throws MessageSendException { // Create a START control message CtrlMsgT cmsg = new CtrlMsgT(); cmsg.set_type(BenchmarkStatic.CTRL_START); try { if (use_bcast ){ mif.send(MoteIF.TOS_BCAST_ADDR,cmsg); } else { currentMote = 1; while ( currentMote <= maxMoteId ) mif.send(currentMote++,cmsg); } // Wait for test completion + 100 msecs Thread.sleep( (int)(BenchmarkCommons.getRuntime(this.results.getConfig()) + 100) ); } catch(Exception e) { throw new MessageSendException(); } } /** * Download the statistics from the motes. * * @throws CommunicationException */ public void download_stat() throws CommunicationException { for ( currentMote = 1; currentMote <= maxMoteId ; ++currentMote ) { for ( currentData = 0; currentData < edgecount; ++currentData ) { if ( !requestData(currentMote,currentData,BenchmarkStatic.CTRL_STAT_REQ) ) { throw new CommunicationException( "Download Error with Mote ID: " + currentMote + ", stat index: " + currentData + "." ); } } } } /** * Download the profile information from the motes. * * @throws CommunicationException */ public void download_profile() throws CommunicationException { for (currentMote = 1; currentMote <= maxMoteId; ++currentMote) { if (!requestData(currentMote, currentData, BenchmarkStatic.CTRL_PROFILE_REQ)) { throw new CommunicationException( "Download Debug Error with Mote ID: " + currentMote + "."); } } } /** * Send a data requesting control message to a specific mote with a specified * data index. Data can be either the statistics on a specific edge, or the debug * information on the mote. * * @param moteId The mote we are targeting * @param dataidx The index of the data (only used when statistics are downloaded) * @param type BenchmarkStatic.CTRL_STAT_REQ or BenchmarkStatic.CTRL_DBG_REQ * @return TRUE if data has been received, FALSE otherwise */ private boolean requestData(final int moteId, final short dataidx, final short type) { // Create a download request control message CtrlMsgT cmsg = new CtrlMsgT(); cmsg.set_type(type); cmsg.set_data_req_idx(dataidx); lock.lock(); handshake = false; for( short probe = 0; !handshake && probe < MAXPROBES; ++probe ) { try { mif.send(moteId,cmsg); answered.await(MAXTIMEOUT,TimeUnit.MILLISECONDS); } catch(Exception e) { break; } } lock.unlock(); return handshake; } /** * The event which is triggered on message reception. We can receive messages * in two situations: * - either in the synchronization phase (sync acknowledgements) * - or in the downloading phases (stats or debug info) * * @param dest_addr The source mote id of the message * @param msg The message received */ public void messageReceived(int dest_addr,Message msg) { lock.lock(); // Received a SyncMsgT if ( msg instanceof SyncMsgT ) { SyncMsgT smsg = (SyncMsgT)msg; if ( smsg.get_type() == BenchmarkStatic.SYNC_SETUP_ACK ) { handshake = true; edgecount = smsg.get_edgecnt(); if ( smsg.get_maxmoteid() > maxMoteId ) maxMoteId = smsg.get_maxmoteid(); // update the results structure this.results.cleanResize(maxMoteId, edgecount); answered.signal(); } // Received a DataMsgT } else if ( msg instanceof DataMsgT ) { DataMsgT rmsg = (DataMsgT) msg; switch (rmsg.get_type()) { case BenchmarkStatic.DATA_STAT_OK: // Process the message only if this message is the answer for our query // This prevents us from makeing corrupt statistics. if (currentData == rmsg.get_data_idx()) { this.results.appendStatFromMessage(currentData, rmsg); } break; case BenchmarkStatic.DATA_PROFILE_OK: this.results.appendProfileFromMessage(currentMote, rmsg); break; } handshake = true; answered.signal(); } lock.unlock(); } } tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/common/BenchmarkResult.java000066400000000000000000000235721207233610700305430ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ package benchmark.common; import java.io.PrintStream; import java.util.Calendar; import java.util.Vector; /** * This class holds all the results of a benchmark run along with the computed * statistics and any error which may occur during the test run. * */ public class BenchmarkResult { private SetupT config; private Vector stats; private Vector profiles; private String error; /** * Basic constuctor of a result holder. */ public BenchmarkResult() { this.init(null); } /** * Construct a result holder with a known configuration. * @param config the configuration */ public BenchmarkResult(final SetupT config) { this.init(config); } /** * Helper function for constructors * @param config the configuration */ private void init(final SetupT config) { this.config = config; this.stats = null; this.profiles = null; this.error = ""; } /** * Clean the result holder object and make it ready for a new benchmark. * * @param motecount the new benchmark's motecount * @param edgecount the new benchmark's edgecount */ public void cleanResize(final int motecount, final int edgecount) { if ( this.stats != null ) { this.stats.clear(); this.profiles.clear(); } this.stats = new Vector(edgecount); this.profiles = new Vector(motecount); // Initialize the elements for (int i = 0; i< edgecount; ++i ) { this.stats.add(new StatT()); } // Initialize the elements for (int i = 0; i< motecount; ++i ) { this.profiles.add(new ProfileT()); } this.error = ""; } /** * Set the configuration of the benchmark for the results holder object. * @param config the configuration */ public void setConfig(final SetupT config) { this.config = config; } /** * Get the actual benchmark result's configuration * @return the configuration */ public SetupT getConfig() { return config; } /** * Set an error indicating that an error occured durint the test run. * @param error the string representation of the error */ public void setError(final String error) { this.error = error; } /** * Get the error which may have occured. * @return the string representation of the error */ public String getError() { return this.error; } /** * Append new profile information to existing ones from a message. * Note that the message does not contain the sender's id, that is why * we must explicitly specify it for this function. * * @param idx the mote's id to which this information belongs * @param msg the message holding the information */ public void appendProfileFromMessage(final int idx, final DataMsgT msg) { // Get the new Profile from the message ProfileT p = new ProfileT(); p.set_max_atomic(msg.get_payload_profile_max_atomic()); p.set_max_interrupt(msg.get_payload_profile_max_interrupt()); p.set_max_latency(msg.get_payload_profile_max_latency()); p.set_min_atomic(msg.get_payload_profile_min_atomic()); p.set_min_interrupt(msg.get_payload_profile_min_interrupt()); p.set_min_latency(msg.get_payload_profile_min_latency()); p.set_rtx_time(msg.get_payload_profile_rtx_time()); p.set_rstart_count(msg.get_payload_profile_rstart_count()); p.set_rx_bytes(msg.get_payload_profile_rx_bytes()); p.set_tx_bytes(msg.get_payload_profile_tx_bytes()); p.set_rx_msgs(msg.get_payload_profile_rx_msgs()); p.set_debug(msg.get_payload_profile_debug()); this.profiles.set(idx-1, p); } /** * Append new statistics to existing ones from a message. * Note that the message does not contain the sender's id, that is why * we must explicitly specify it for this function. * * @param idx the mote's id to which this information belongs * @param msg the message holding the information */ public void appendStatFromMessage(final int idx, final DataMsgT msg) { // Get the new Stat from the message StatT s = new StatT(); s.set_triggerCount(msg.get_payload_stat_triggerCount()); s.set_backlogCount(msg.get_payload_stat_backlogCount()); s.set_resendCount(msg.get_payload_stat_resendCount()); s.set_sendCount(msg.get_payload_stat_sendCount()); s.set_sendSuccessCount(msg.get_payload_stat_sendSuccessCount()); s.set_sendFailCount(msg.get_payload_stat_sendFailCount()); s.set_sendDoneCount(msg.get_payload_stat_sendDoneCount()); s.set_sendDoneSuccessCount(msg.get_payload_stat_sendDoneSuccessCount()); s.set_sendDoneFailCount(msg.get_payload_stat_sendDoneFailCount()); s.set_wasAckedCount(msg.get_payload_stat_wasAckedCount()); s.set_notAckedCount(msg.get_payload_stat_notAckedCount()); s.set_receiveCount(msg.get_payload_stat_receiveCount()); s.set_consecutiveCount(msg.get_payload_stat_consecutiveCount()); s.set_wrongCount(msg.get_payload_stat_wrongCount()); s.set_duplicateCount(msg.get_payload_stat_duplicateCount()); s.set_missedCount(msg.get_payload_stat_missedCount()); s.set_forwardCount(msg.get_payload_stat_forwardCount()); s.set_remainedCount(msg.get_payload_stat_remainedCount()); // Get the current stat StatT s1 = this.stats.get(idx); // Make a new stat - this will be the merginf of the current and the new one. StatT news = new StatT(); news.set_triggerCount( s1.get_triggerCount() + s.get_triggerCount()); news.set_backlogCount( s1.get_backlogCount() + s.get_backlogCount()); news.set_resendCount( s1.get_resendCount() + s.get_resendCount()); news.set_sendCount( s1.get_sendCount() + s.get_sendCount()); news.set_sendSuccessCount( s1.get_sendSuccessCount() + s.get_sendSuccessCount()); news.set_sendFailCount( s1.get_sendFailCount() + s.get_sendFailCount()); news.set_sendDoneCount( s1.get_sendDoneCount() + s.get_sendDoneCount()); news.set_sendDoneSuccessCount( s1.get_sendDoneSuccessCount() + s.get_sendDoneSuccessCount()); news.set_sendDoneFailCount( s1.get_sendDoneFailCount() + s.get_sendDoneFailCount()); news.set_wasAckedCount( s1.get_wasAckedCount() + s.get_wasAckedCount()); news.set_notAckedCount( s1.get_notAckedCount() + s.get_notAckedCount()); news.set_receiveCount( s1.get_receiveCount() + s.get_receiveCount()); news.set_consecutiveCount( s1.get_consecutiveCount() + s.get_consecutiveCount()); news.set_wrongCount( s1.get_wrongCount() + s.get_wrongCount()); news.set_duplicateCount( s1.get_duplicateCount() + s.get_duplicateCount()); news.set_missedCount( s1.get_missedCount() + s.get_missedCount()); news.set_forwardCount( s1.get_forwardCount() + s.get_forwardCount()); news.set_remainedCount((short)(s1.get_remainedCount() + s.get_remainedCount())); this.stats.set(idx, news); } /** * Print the current result's configuration into a character stream. * * @param stream the stream */ public void printConfig(PrintStream stream) { stream.println(BenchmarkCommons.setupAsString(this.config)); } /** * Print the current results with debug and error information into a character * stream. * * @param stream the stream */ public void print(PrintStream stream) { stream.println(BenchmarkCommons.setupAsString(this.config)); stream.println(BenchmarkCommons.statsAsString(this.stats)); stream.println(BenchmarkCommons.profilesAsString(this.profiles)); stream.println(BenchmarkCommons.errorAsString(this.error)); } /** * Print the current results with debug and error information into a character * stream with XML formatting. * * @param stream the stream */ public void printXml(PrintStream stream) { Calendar calendar = Calendar.getInstance(); stream.println(""); stream.println(BenchmarkCommons.setupAsXml(this.config)); stream.println(BenchmarkCommons.statsAsXml(this.stats)); stream.println(BenchmarkCommons.profilesAsXml(this.profiles)); stream.println(BenchmarkCommons.errorAsXml(this.error)); stream.println(""); } } tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/common/MacParser.java000066400000000000000000000127761207233610700273330ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ package benchmark.common; import java.util.regex.Pattern; import java.util.regex.Matcher; public class MacParser { private int macparams[]; private short flags; public class MacParserException extends Exception { public MacParserException(String msg) { super(msg); } } public MacParser() { this.macparams = new int[BenchmarkStatic.MAC_SETUP_LENGTH]; this.flags = 0; for (int i = 0; i < BenchmarkStatic.MAC_SETUP_LENGTH; ++i) { this.macparams[i] = 0; } } public void parse(final String spec) throws MacParserException { Pattern pattern = Pattern.compile("^(\\w+):([\\d+,]+)$"); Matcher matcher = pattern.matcher(spec); if (matcher.find()) { this.parseAll(matcher.group(1),matcher.group(2).split(",")); } else { throw new MacParserException("Invalid MAC parameter specification, see help!"); } } public void parseAll(final String type, final String[] params) throws MacParserException { int[] iparams = new int[params.length]; for(byte i=0; i< params.length; ++i) iparams[i] = Integer.parseInt(params[i]); this.parseAll(type, iparams); } public void parseAll(final String type, final int[] params) throws MacParserException { this.parseLPL(type, params); this.parsePacketLink(type, params); if ( (this.flags & (this.flags - 1)) != 0) throw new MacParserException("Only one MAC protocol is allowed!"); } public static String macAsString(final short flags, final int[] params) { String nl = System.getProperty("line.separator"); return LPLasString(flags,params) + nl + PacketLinkasString(flags,params) + nl; } public static String macAsXml(final short flags, final int[] params) { String nl = System.getProperty("line.separator"); return "" + LPLasXml(flags,params) + PacketLinkasXml(flags,params) + "" + nl; } private void parseLPL(final String type, final int[] params) throws MacParserException { if ( type.equals("lpl") ) { if (params.length != 1) { throw new MacParserException( "LPL MAC requires exactly one parameter ( Wakeup interval (ms) )!"); } flags |= BenchmarkStatic.GLOBAL_USE_MAC_LPL; this.macparams[BenchmarkStatic.LPL_WAKEUP_OFFSET] = params[0]; } } private static String LPLasString(final short flags, final int[] params) { String ret=""; if ((flags & BenchmarkStatic.GLOBAL_USE_MAC_LPL) != 0) { ret = " LPL: \t\t" + params[0] + " ms"; } return ret; } private static String LPLasXml(final short flags, final int[] params) { String ret=""; if ((flags & BenchmarkStatic.GLOBAL_USE_MAC_LPL) != 0) { ret = ""; } return ret; } private void parsePacketLink(final String type, final int[] params) throws MacParserException { if ( type.equals("plink") ) { if (params.length != 2) { throw new MacParserException( "Packet Link MAC requires exactly two parameters ( Retries (ms) + Delay (ms) )!"); } flags |= BenchmarkStatic.GLOBAL_USE_MAC_PLINK; this.macparams[BenchmarkStatic.PLINK_RETRIES_OFFSET] = params[0]; this.macparams[BenchmarkStatic.PLINK_DELAY_OFFSET] = params[1]; } } private static String PacketLinkasString(final short flags, final int[] params) { String ret=""; if ((flags & BenchmarkStatic.GLOBAL_USE_MAC_PLINK) != 0) { ret = " Packet Link: Retries: " + params[0] + " ms, Delay: " + params[0] + " ms"; } return ret; } private static String PacketLinkasXml(final short flags, final int[] params) { String ret=""; if ((flags & BenchmarkStatic.GLOBAL_USE_MAC_PLINK) != 0) { ret = ""; } return ret; } public int[] getMacParams() { return macparams; } public short getFlags() { return flags; } }tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/benchmark/common/TimerParser.java000066400000000000000000000077521207233610700277110ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Krisztian Veress * veresskrisztian@gmail.com */ package benchmark.common; import java.util.regex.Pattern; import java.util.regex.Matcher; public class TimerParser { private short ios[]; private long delay[]; private long period[]; private byte maxtimer = 0; public static final short DEF_TIMER_ONESHOT = 1; public static final short DEF_TIMER_DELAY = 0; public static final short DEF_TIMER_PERIOD = 100; public class TimerParserException extends Exception { public TimerParserException(String msg) { super(msg); } } public TimerParser(final byte maxtimercount) { this.maxtimer = maxtimercount; this.ios = new short[maxtimercount]; this.delay = new long[maxtimercount]; this.period = new long[maxtimercount]; for (int i = 0; i < maxtimercount; ++i) { this.ios[i] = DEF_TIMER_ONESHOT; this.delay[i] = DEF_TIMER_DELAY; this.period[i] = DEF_TIMER_PERIOD; } } public void parse(final String spec) throws TimerParserException { Pattern pattern = Pattern.compile("(\\d+):(\\d+),(\\d+),(\\d+)"); Matcher matcher = pattern.matcher(spec); if (matcher.find()) { int trigidx = Integer.parseInt(matcher.group(1)); if (trigidx < 1 || trigidx > this.maxtimer) { throw new TimerParserException("Valid timer indexes are : [1.." + this.maxtimer + "]!"); } --trigidx; this.ios[trigidx] = (byte) Integer.parseInt(matcher.group(2)); this.delay[trigidx] = Integer.parseInt(matcher.group(3)); this.period[trigidx] = Integer.parseInt(matcher.group(4)); if ( this.period[trigidx] < 0 || this.delay[trigidx] < 0 || this.ios[trigidx] < 0 || this.ios[trigidx] > 1) { throw new TimerParserException("Trigger timer " + (trigidx + 1) + " is invalid!"); } // at time 0, only one-shot timers are allowed to fire if ( this.period[trigidx] == 0 && this.ios[trigidx] != 1) { throw new TimerParserException("Only one-shot timers are allowed with 0 ms period!"); } } else { throw new TimerParserException("Invalid spec timer specification!"); } } public void setSpec(final byte idx,final short ios,final long delay, final long period) { this.ios[idx] = ios; this.delay[idx] = delay; this.period[idx] = period; } public short[] getIos() { return ios; } public long[] getDelay() { return delay; } public long[] getPeriod() { return period; } }tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/build.xml000066400000000000000000000147671207233610700232140ustar00rootroot00000000000000 LinkBench ANT script Clean task aborted by user. tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/000077500000000000000000000000001207233610700234025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/README.TXT000066400000000000000000000033501207233610700247410ustar00rootroot00000000000000Howto run the LinkBench application ----------------------------------- I. Windows users: --------------------- 1, You should start a command line tool by clicking on Start->Run and entering cmd.exe . 2, Then, navigate to the directory where this (README.TXT) file is located. 3, Type the following in the command line for more instructions : java -jar linkbench.jar --help II. Unix/Linux users: --------------------- 1, Open a terminal (xterm, gnome-terminal, etc) and navigate to the directory where this (README.TXT) file is located. 2/a, Type the following in the command line for more instructions : java -jar linkbench.jar --help 2/b, First make the bmark.sh file executable, and start the application after : chmod u+x linkbench.sh ./linkbench.sh --help Troubleshooting: ---------------- 1, Problem : The linkbench.jar file does not exist. Solution: Maybe you forgot to compile the sources, or deleted that file. You should re-compile the Java sources (and possibly the TinyOS sources). For instructions, see the README file in the root directory of the application. 2, Problem : There is no such command as 'java'. Solution: You must install the Java SDK 1.6 to be able to compile and run this application. Once you have it, follow the instruction in the README file in the root directory of the application. 3, Problem : I have read all READMEs, instructions, but I cannot overcome my specific problem. Solution: Write me an email (verkri@inf.u-szeged.hu) describing your system ( platform, JDK version, TinyOS version, where you have installed the application, etc). tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/assets/000077500000000000000000000000001207233610700247045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/assets/benchmark.css000066400000000000000000000046231207233610700273550ustar00rootroot00000000000000body { font: 13px sans-serif; background-color: #DDDDDD; margin: 0px 5px 0px 5px; } div.title { font: 15px sans-serif; font-weight: bold; background-color: #798EF9; text-align: center; margin-top: 0; margin-bottom: 0; padding: 1px 1px 1px 1px; color: #000000; } div.title_light { font: 15px sans-serif; font-weight: bold; text-align: center; margin-top: 0; margin-bottom: 0; padding: 1px 1px 1px 1px; color: #000000; } div.debuglist, div.error { margin-top: 5px; text-align: center; } table.testresult { margin-bottom: 10px; border: 0px; border-spacing: 0px; border-padding: 0px; width: 100%; } table.summary, table.data { margin: 2px 0px 0px 0px; border: 1px solid #888888; width: 100%; border-spacing: 1px; border-padding: 0px; } .rt { background-color: white; text-align: right; font: 11px sans-serif; padding-right: 5px; } .rt_data { background-color: white; text-align: center; font: 13px sans-serif; font-weight: bold; } .rcv { color: #770202; } .snd { color: #027702; } .cprofile { color: #33469A; } .rprofile { color: #554666; } .title_send { background-color: #ACF979; font: 13px sans-serif; font-weight: bold; text-align: center; border-style: solid; border-width: 0px 0px 1px 0px; } .title_rcv { background-color: #FFA579; font: 13px sans-serif; font-weight: bold; text-align: center; border-style: solid; border-width: 0px 0px 1px 0px; } .title_cprofile { background-color: #5579BC; font: 13px sans-serif; font-weight: bold; text-align: center; border-style: solid; border-width: 0px 0px 1px 0px; } .title_rprofile { background-color: #887999; font: 13px sans-serif; font-weight: bold; text-align: center; border-style: solid; border-width: 0px 0px 1px 0px; } .sub { background-color: #FFF3A0; font: 11px sans-serif; text-align: center; } div.top { text-align : center; font: 18px sans-serif; font-weight: bold; margin-bottom: 10px; } span.debug_ok { color: #027702; padding-left: 5px; padding-right: 5px; font-weight: bold; } span.debug_fail, div.error { color: #770202; padding-left: 5px; padding-right: 5px; font-weight: bold; } a { font: 11px verdana, arial, helvetica, sans-serif; } a:link { color: #0011BB; text-decoration: none; } a:visited { color: #0011BB; text-decoration: none; } a:hover { color: #605040; text-decoration: underline; } tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/assets/benchmark.xsl000066400000000000000000000253261207233610700273760ustar00rootroot00000000000000 RadioTest result report
Testcase
Statistics ()
  send() sendDone()   receive()
Edge Rem Triggered Backlog Resend Total SUCC FAIL Total SUCC FAIL ACK noACK Total Consecutive Wrong Duplicate Forward Missed
Code Profile Radio Profile
Mote Min/Max Atomic Min/Max Interrupt Min/Max Latency RxTx Time Radio Start cnt Total Msg cnt Rx Bytes Tx Bytes Debug
Problem :
Rand start : ms
Runtime : ms
Lastchance : ms
Forces : ack bcast none
Timer() : 1sh per | /
LPL : ms Packet Link : Retries :
Delay :
/ / / OK FAIL ()
tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/000077500000000000000000000000001207233610700255065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/batch_all.yml000066400000000000000000000020551207233610700301440ustar00rootroot00000000000000config: {bmark: 10, time: 1000 } --- config: {bmark: 11, time: 1000 } --- config: {bmark: 12, time: 1000 } --- config: {bmark: 13, time: 1000 } --- config: {bmark: 14, time: 1000 } --- config: {bmark: 15, time: 1000 } --- config: {bmark: 16, time: 1000 } --- config: {bmark: 17, time: 1000 } --- config: {bmark: 18, time: 1000 } --- config: {bmark: 19, time: 1000 } --- config: {bmark: 20, time: 1000 } --- config: {bmark: 30, time: 1000 } --- config: {bmark: 31, time: 1000 } --- config: {bmark: 32, time: 1000 } --- config: {bmark: 33, time: 1000 } --- config: {bmark: 34, time: 1000 } --- config: {bmark: 35, time: 1000 } --- config: {bmark: 36, time: 1000 } --- config: {bmark: 50, time: 1000 } --- config: {bmark: 51, time: 1000 } --- config: {bmark: 52, time: 1000 } --- config: {bmark: 53, time: 1000 } --- config: {bmark: 54, time: 1000 } --- config: {bmark: 55, time: 1000 } --- config: {bmark: 56, time: 1000 } --- config: {bmark: 57, time: 1000 } --- config: {bmark: 58, time: 1000 } --- config: {bmark: 59, time: 1000 } --- config: {bmark: 60, time: 1000 } tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/batch_collisions.yml000066400000000000000000000026521207233610700315550ustar00rootroot00000000000000config: {bmark: 30, time: 1000} --- config: {bmark: 30, time: 1000} forces: [ack] --- config: {bmark: 30, time: 1000} timers: - t2: [0, 50, 100] --- config: {bmark: 30, time: 1000} timers: - t2: [0, 50, 100] forces: [ack] --- config: {bmark: 31, time: 1000} --- config: {bmark: 31, time: 1000} timers: - t2: [0, 50, 100] --- config: {bmark: 32, time: 1000} --- config: {bmark: 32, time: 1000} timers: - t3: [0, 50, 100] --- config: {bmark: 32, time: 1000} timers: - t2: [0, 33, 100] - t3: [0, 66, 100] --- config: {bmark: 33, time: 1000} --- config: {bmark: 33, time: 1000} forces: [ack] --- config: {bmark: 33, time: 1000} timers: - t3: [0, 50, 100] --- config: {bmark: 33, time: 1000} timers: - t3: [0, 50, 100] forces: [ack] --- config: {bmark: 33, time: 1000} timers: - t2: [0, 33, 100] - t3: [0, 66, 100] --- config: {bmark: 33, time: 1000} timers: - t2: [0, 33, 100] - t3: [0, 66, 100] forces: [ack] --- config: {bmark: 34, time: 1000} --- config: {bmark: 34, time: 1000} forces: [ack] --- config: {bmark: 34, time: 1000} timers: - t3: [0, 50, 100] --- config: {bmark: 34, time: 1000} timers: - t3: [0, 50, 100] forces: [ack] --- config: {bmark: 34, time: 1000} timers: - t2: [0, 33, 100] - t3: [0, 66, 100] --- config: {bmark: 34, time: 1000} timers: - t2: [0, 33, 100] - t3: [0, 66, 100] forces: [ack] --- config: {bmark: 35, time: 1000} --- config: {bmark: 35, time: 1000} forces: [ack] --- config: {bmark: 36, time: 1000} tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/batch_forwarding.yml000066400000000000000000000046021207233610700315360ustar00rootroot00000000000000config: {bmark: 50, time: 1000} timers: - t1: [0, 0, 100] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 0, 100] forces: [ack] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 0, 50] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 0, 50] forces: [ack] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 0, 25] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 0, 25] forces: [ack] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 0, 10] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 0, 10] forces: [ack] --- config: {bmark: 51, time: 1000} timers: - t1: [0, 0, 100] --- config: {bmark: 51, time: 1000} timers: - t1: [0, 0, 50] --- config: {bmark: 51, time: 1000} timers: - t1: [0, 0, 25] --- config: {bmark: 51, time: 1000} timers: - t1: [0, 0, 10] --- config: {bmark: 52, time: 1000} timers: - t1: [0, 0, 100] --- config: {bmark: 52, time: 1000} timers: - t1: [0, 0, 50] --- config: {bmark: 52, time: 1000} timers: - t1: [0, 0, 25] --- config: {bmark: 52, time: 1000} timers: - t1: [0, 0, 10] --- config: {bmark: 53, time: 1000} timers: - t1: [0, 0, 100] --- config: {bmark: 53, time: 1000} timers: - t1: [0, 0, 50] --- config: {bmark: 53, time: 1000} timers: - t1: [0, 0, 25] --- config: {bmark: 53, time: 1000} timers: - t1: [0, 0, 10] --- config: {bmark: 54, time: 1000} --- config: {bmark: 54, time: 1000} forces: [ack] --- config: {bmark: 54, time: 1000} timers: - t2: [0, 50, 100] --- config: {bmark: 54, time: 1000} timers: - t2: [0, 50, 100] forces: [ack] --- config: {bmark: 55, time: 1000} --- config: {bmark: 55, time: 1000} forces: [ack] --- config: {bmark: 55, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] --- config: {bmark: 55, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] forces: [ack] --- config: {bmark: 56, time: 1000} --- config: {bmark: 56, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] --- config: {bmark: 57, time: 1000} --- config: {bmark: 57, time: 1000} forces: [ack] --- config: {bmark: 57, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] --- config: {bmark: 57, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] forces: [ack] --- config: {bmark: 58, time: 1000} --- config: {bmark: 58, time: 1000} forces: [ack] --- config: {bmark: 59, time: 1000} --- config: {bmark: 60, time: 1000} tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/batch_lpl.yml000066400000000000000000000047201207233610700301640ustar00rootroot00000000000000config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 0, 100] wakeup: 0 --- config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 0, 100] wakeup: 30 --- config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 0, 100] wakeup: 70 --- config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 0, 100] wakeup: 130 --- config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 50, 100] wakeup: 0 --- config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 50, 100] wakeup: 30 --- config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 50, 100] wakeup: 70 --- config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 50, 100] wakeup: 130 --- config: {bmark: 35, time: 1000} wakeup: 0 --- config: {bmark: 35, time: 1000} wakeup: 30 --- config: {bmark: 35, time: 1000} wakeup: 70 --- config: {bmark: 35, time: 1000} wakeup: 130 --- config: {bmark: 50, time: 1000} wakeup: 0 --- config: {bmark: 50, time: 1000} wakeup: 30 --- config: {bmark: 50, time: 1000} wakeup: 70 --- config: {bmark: 50, time: 1000} wakeup: 130 --- config: {bmark: 53, time: 1000} wakeup: 0 --- config: {bmark: 53, time: 1000} wakeup: 30 --- config: {bmark: 53, time: 1000} wakeup: 70 --- config: {bmark: 53, time: 1000} wakeup: 130 --- config: {bmark: 53, time: 1000} timers: - t1: [0, 0, 20] wakeup: 0 --- config: {bmark: 53, time: 1000} timers: - t1: [0, 0, 20] wakeup: 30 --- config: {bmark: 53, time: 1000} timers: - t1: [0, 0, 20] wakeup: 70 --- config: {bmark: 53, time: 1000} timers: - t1: [0, 0, 20] wakeup: 130 --- config: {bmark: 55, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] wakeup: 0 --- config: {bmark: 55, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] wakeup: 30 --- config: {bmark: 55, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] wakeup: 70 --- config: {bmark: 55, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] wakeup: 130 --- config: {bmark: 58, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] wakeup: 0 --- config: {bmark: 58, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] wakeup: 30 --- config: {bmark: 58, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] wakeup: 70 --- config: {bmark: 58, time: 1000} timers: - t1: [0, 0, 100] - t2: [0, 33, 100] - t3: [0, 66, 100] wakeup: 130 tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/batch_throughputs.yml000066400000000000000000000015201207233610700317640ustar00rootroot00000000000000config: {bmark: 10, time: 1000} --- config: {bmark: 11, time: 1000} --- config: {bmark: 12, time: 1000} --- config: {bmark: 10, time: 1000} forces: [ack] --- config: {bmark: 11, time: 1000} forces: [ack] --- config: {bmark: 12, time: 1000} forces: [ack] --- config: {bmark: 10, time: 1000} forces: [bcast] --- config: {bmark: 11, time: 1000} forces: [bcast] --- config: {bmark: 12, time: 1000} forces: [bcast] --- config: {bmark: 13, time: 1000} --- config: {bmark: 14, time: 1000} --- config: {bmark: 15, time: 1000} --- config: {bmark: 16, time: 1000} --- config: {bmark: 16, time: 1000} forces: [ack] --- config: {bmark: 17, time: 1000} --- config: {bmark: 18, time: 1000} --- config: {bmark: 19, time: 1000} --- config: {bmark: 19, time: 1000} forces: [ack] --- config: {bmark: 20, time: 1000} --- config: {bmark: 20, time: 1000} forces: [ack] tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/generate_batch.sh000066400000000000000000000040541207233610700310000ustar00rootroot00000000000000#!/bin/bash # This shell script is useful for generating hundreds of benchmarks # based on specific needs without the need of typing 1 billion words. # # Modify the code of main() as you like. # Here is an example how to generate a bunch of descriptions main() { A_BMARK="" TIME=10000 TIMER1=(0 0 100) #TIMER2=(0 33 100) #TIMER3=(0 66 100) #ACK=yes #ACK=yes WAKEUP=400 TIMES="100 500 1000 2000" for t in $TIMES; do for BMARK in `seq 100 105`; do TIMER1[2]=$t #for WAKEUP in $A_WAKEUP; do print_bmark >> $1 done done } # Print a YAML-correct benchmark description based on env vars print_bmark() { # start benchmark echo "---" # config section if [[ -z $TIME || -z $BMARK ]]; then echo "Undefined BMARK or TIME value!" exit 1 fi echo -n "config: {bmark: $BMARK, time: $TIME" echo -n ${MOTES:+", motes: $MOTES"}; echo -n ${RANDSTART:+", randstart: $RANDSTART"}; echo -n ${LCHANCE:+", lchance: $LCHANCE"}; echo "}" #timers section GOTTIMER=0 if [[ -n $TIMER1 && ${#TIMER1[*]} -eq 3 ]]; then GOTTIMER=1 TIMERV[0]="t1: [${TIMER1[0]}, ${TIMER1[1]}, ${TIMER1[2]}]" fi if [[ -n $TIMER2 && ${#TIMER2[*]} -eq 3 ]]; then GOTTIMER=1 TIMERV[1]="t2: [${TIMER2[0]}, ${TIMER2[1]}, ${TIMER2[2]}]" fi if [[ -n $TIMER3 && ${#TIMER3[*]} -eq 3 ]]; then GOTTIMER=1 TIMERV[2]="t3: [${TIMER3[0]}, ${TIMER3[1]}, ${TIMER3[2]}]" fi if [[ -n $TIMER4 && ${#TIMER4[*]} -eq 3 ]]; then GOTTIMER=1 TIMERV[3]="t4: [${TIMER4[0]}, ${TIMER4[1]}, ${TIMER4[2]}]" fi if [[ $GOTTIMER -eq 1 ]]; then echo "timers:" echo ${TIMERV[0]}${TIMERV[1]}${TIMERV[2]}${TIMERV[3]} | sed 's/\]t/\]\nt/g' | sed 's/\(t[0-9]\):/ - \1:/g' fi unset GOTTIMER unset TIMERV # forces section FORCES=${BCAST}${ACK} echo -n ${FORCES:+"forces: "} FORCESV="[${BCAST:+bcast}, ${ACK:+ack}]" echo -n $FORCESV | sed 's:, \]:\]:g' | sed 's:\[, :\[:g' | sed 's:\[\]::g' echo -ne ${FORCES:+'\n'} unset FORCES unset FORCESV # wakeup section echo -en ${WAKEUP:+"wakeup: $WAKEUP\n"}; } main $1 tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/sample_batch_config.yml000066400000000000000000000040221207233610700321760ustar00rootroot00000000000000# Benchmark batch configuration sample file # ----------------------------------------- # # This file describes multiple benchmarks to be run in sequence with the LinkBenchmark # TinyOS application along with its supporting PC-side Java application. # # The content of this file is YAML-formatted with a reduced key set and value sets. # Benchmark definitions must be separated with 3 dashes ('---') in a separate line. # # The example below demonstrates ALL options that can be specified in the correct # format: # --- # config: {bmark: 10, motes: 6, time: 1000, randstart: 30, lchance: 20} # timers: # - t1: [1, 10, 100] # - t2: [0, 20, 200] # - t3: [1, 30, 300] # - t4: [0, 30, 300] # forces: [ack, bcast] # mac: # - lpl: [ 200 ] # - plink: [ 200 100 ] # --- # # All values must be integers. The mandatory options are: config, config.bmark, # and config.time, so the most simple description is: # config: {bmark: X, time: Y} # # If some options are not explicitly specified, but are required for the benchmarks, # the default values are used. Use the command line Java code's help to get these values. # # # See below some dummy examples for your pleasure! config: {bmark: 10, motes: 3, time: 1000, randstart: 30} --- config: {bmark: 10, time: 20, lchance: 100} mac: - lpl: [ 200 ] - plink: [ 200 100 ] --- config: {bmark: 10, time: 200, motes: 5} forces: [ack] --- config: {bmark: 10, motes: 3, time: 3000} forces: [bcast] --- config: {bmark: 15, time: 1000, randstart: 30} --- config: {bmark: 30, time: 322} timers: - t1: [1, 50, 200] - t2: [1, 500, 100] --- config: {bmark: 30, time: 1000} timers: - t1: [0, 0, 200] - t2: [0, 0, 100] forces: [bcast] mac: - plink: [ 200 100 ] --- config: {bmark: 34, time: 1000} timers: - t1: [0, 10, 100] - t2: [0, 20, 200] - t3: [0, 30, 300] forces: [ack] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 10, 100] forces: [ack] --- config: {bmark: 50, time: 1000} timers: - t1: [0, 10, 100] forces: [bcast] --- config: {bmark: 53, time: 1000} forces: [ack] --- config: {bmark: 10, time: 1000} tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/batchfiles/tos_metric.yml000066400000000000000000000002201207233610700303730ustar00rootroot00000000000000config: {bmark: 10, time: 1000 } --- config: {bmark: 11, time: 1000 } --- config: {bmark: 19, time: 1000 } --- config: {bmark: 20, time: 1000 } tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/lib/000077500000000000000000000000001207233610700241505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/lib/commons-cli-1.2.jar000066400000000000000000001046031207233610700273700ustar00rootroot00000000000000PK B^; META-INF/PK B^;0>[fMETA-INF/MANIFEST.MFMLK-. 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=gj0META-INF/maven/org.yaml/snakeyaml/pom.propertiesPKUJtinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/linkbench.sh000066400000000000000000000002511207233610700256710ustar00rootroot00000000000000#!/bin/bash EXEC="linkbench.jar" if [ -f $EXEC ]; then java -jar $EXEC $@ else echo -e "No \033[1m$EXEC\033[0m file found. Have you built the Java application?"; fi tinyos-2.1.2+dfsg/apps/tests/LinkBench/javasrc/dist-addon/tos_metric.sh000066400000000000000000000143031207233610700261070ustar00rootroot00000000000000#!/bin/bash # TinyOS software metric generator script # This script's purpose is to run the LinkBench application with # arbitrary benchmarks, but using always different TinyOS svn revisions. # PROGNAME=`basename $0` PROGVERSION=0.1 # default values MPLATFORM=iris TOSSVNDIR=$TOSROOT LINKBDIR=".." START_DATE=`date +%Y-%m-%d` STOP_DATE=`date +%Y-%m-%d` DATE_STEP='1 month' BENCH_FILE="batchfiles/${PROGNAME%.*}.yml" LOGFILE=${PROGNAME%.*}.log SHORTOPTS="hvF:" LONGOPTS="help,version,svn:,step:,benchfile:,start:,stop:" usage() { echo " Usage: $PROGNAME [options] [LinkBench root dir] Executes a TinyOS metric using different SVN revisions and the LinkBench TinyOS application. Revisions are going from 'start date' until 'stop date'. Date format is YYYY-MM-DD. Stop date is defaulted to the current date. Step size can be configured using the --step option. Options: -h|--help show this output -v|--version show version information -F|--benchfile the benchmark batch file to use [ default : $BENCH_FILE ] --start set the start date in format: YYYY-MM-DD --stop set the stop date in format: YYYY-MM-DD --svn set the TinyOS root directory [ default : $TOSROOT ] --step set the step size in format : [1-9][0-9]* day|month|year examples: 10 day, 2 day, 2 month, 1 year " } check_params() { echo -e " SVN repository : \033[1m$TOSSVNDIR\033[0m" if [[ ! -d $TOSSVNDIR || ! -r $TOSSVNDIR || ! -w $TOSSVNDIR || ! -x $TOSSVNDIR ]]; then echo " '$TOSSVNDIR' is not a good location as SVN root directory!" exit 1 fi echo -e " LinkBench dir. : \033[1m$LINKBDIR\033[0m" if [[ ! -e $LINKBDIR/BenchmarkAppC.nc || ! -d $LINKBDIR/javasrc || ! -e $LINKBDIR/javasrc/build.xml ]]; then echo " '$LINKBDIR' does not seem to be the LinkBench application's root directory!" exit 1 fi echo -e " Benchmark file : \033[1m$BENCH_FILE\033[0m" if [[ ! -e $BENCH_FILE ]]; then echo " '$BENCH_FILE' does not exist!" exit 1 fi check_date $START_DATE if [ $? -gt 0 ]; then echo " '$START_DATE' is not a valid date!" exit 1 fi check_date $STOP_DATE if [ $? -gt 0 ]; then echo " '$STOP_DATE' is not a valid date!" exit 1 fi date1_le_date2 $START_DATE $STOP_DATE if [ $? -gt 0 ]; then echo " '$START_DATE' is in the future compared to '$STOP_DATE'!" exit 1 fi if [ `echo $DATE_STEP | grep -c '[1-9][0-9]* \(day\|month\|year\)'` -eq 0 ]; then echo " '$DATE_STEP' is not a valid time step!" exit 1 else DATE_STEP=`echo $DATE_STEP | grep -o '[1-9][0-9]* \(day\|month\|year\)'`; fi # count how many iterations we will have STEP_TOTAL=0 DATE_TMP=$START_DATE date1_le_date2 $DATE_TMP $STOP_DATE while [ $? -eq 0 ]; do ((STEP_TOTAL++)) DATE_TMP=`date -d "$DATE_TMP +$DATE_STEP" +%Y-%m-%d` date1_le_date2 $DATE_TMP $STOP_DATE done unset DATE_TMP echo -e " Date interval : \033[1m$START_DATE\033[0m -> \033[1m$STOP_DATE\033[0m with \033[1m$DATE_STEP\033[0m increment ( total of $STEP_TOTAL step(s) )" } # check if valid date check_date() { if [ `echo $1 | grep -E -c '[0-9]{4}-[0-9]{1,2}-[0-9]{1,2}'` -eq 0 ]; then return 1; fi declare -i year month day eval $(echo $1 | sed 's:\([0-9]*\)-\([0-9]*\)-\([0-9]*\):year=\1 month=\2 day=\3:') return `cal $month $year | grep -c -w $day >/dev/null` } # check if $1 < $2 chronologically date1_le_date2() { if [[ `echo "$(date -d $1 +%s) <= $(date -d $2 +%s)" | bc` == "1" ]]; then return 0 else return 1 fi } check_last() { RET=$? DOFAIL="no" [ "$1" = "--fail" ] && DOFAIL="yes" && shift cat $3 >> $LOGFILE if [ $RET -eq 0 ]; then echo -ne "[\033[1m $1 \033[0m]" return 0 else echo -ne "[\033[1m $2 \033[0m]" [ $DOFAIL = "yes" ] && return 1 cat $3 rm $3 exit 1 fi } # # PARSE COMMAND LINE # ARGS=$(getopt -s bash --options $SHORTOPTS --longoptions $LONGOPTS --name $PROGNAME -- "$@" ) eval set -- "$ARGS" while true; do case $1 in -h|--help) usage; exit 0;; -v|--version) echo "$PROGNAME version $PROGVERSION"; exit 0;; -F|--benchfile) shift; BENCH_FILE=$1;; --svn) shift; TOSSVNDIR=$1;; --step) shift; DATE_STEP=$1;; --start) shift; START_DATE=$1;; --stop) shift; STOP_DATE=$1;; --) shift ; break ;; *) shift ; break ;; esac shift done # parse mandatory parameters if [[ $# -gt 0 ]]; then LINKBDIR=$1; fi # check for the established parameters if they are valid or not check_params SVNBIN=/usr/bin/svn TMP=`tempfile` trap '{ rm -f "$TMP"; }' EXIT # make executable the linkbench.sh script chmod +x linkbench.sh echo "-------------------------------------------------------------------------------------------" # while we do not run past the stop date STEP_CURRENT=0 NEXT_DATE=$START_DATE rm -f $LOGFILE while [ $STEP_CURRENT -lt $STEP_TOTAL ]; do ((STEP_CURRENT++)) # we can initiate the next svn update, to save as much time as we can. START_DATE=$NEXT_DATE NEXT_DATE=`date -d "$START_DATE +$DATE_STEP" +%Y-%m-%d` printf "(%2d/%2d) - %s : " $STEP_CURRENT $STEP_TOTAL $START_DATE | tee -a $LOGFILE # (1) update the svn repository ( cd $TOSSVNDIR; $SVNBIN update -r {$START_DATE} > $TMP 2>&1 ) check_last "Rev: `tail -1 $TMP | tr -cd '[:digit:]'`" "SVN ERROR" $TMP # (2) re-make the nesc code ( cd $LINKBDIR; ./minstall.sh --compileonly > $TMP 2>&1 ) check_last --fail "COMPILE OK" "COMPILE ERROR" $TMP || { echo ""; continue; } # (3) program the motes ( cd $LINKBDIR ; ./minstall.sh --progonly > $TMP 2>&1 ) check_last --fail "PROGRAM OK" "PROGRAM ERROR" $TMP || { echo ""; continue; } sleep 2 # (4) run the benchmark ./linkbench.sh -F $BENCH_FILE -o result-${START_DATE}.xml > $TMP 2>&1 check_last "RUN OK" "RUN ERROR" $TMP sleep 2 ./linkbench.sh -r > $TMP 2>&1 check_last "RESET OK" "RESET ERROR" $TMP # (5) clean ( cd $LINKBDIR; make clean 2>&1 | tee -a $LOGFILE > $TMP ) check_last "CLEAN OK" "CLEAN ERROR" $TMP echo "" done rm $TMP exit 0 tinyos-2.1.2+dfsg/apps/tests/LinkBench/scripts/000077500000000000000000000000001207233610700214125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/LinkBench/scripts/make-tossim-network.py000066400000000000000000000015201207233610700257020ustar00rootroot00000000000000from TOSSIM import * import sys import time t = Tossim([]) r = t.radio(); t.addChannel("Benchmark", sys.stdout) sf = SerialForwarder(9002) th = Throttle(t,10); start = time.time(); m1 = t.getNode(1) m2 = t.getNode(2) # Set up a hidden terminal problem, where 1 and 3 # are closely synchronized, but cannot hear each other. m1.bootAtTime(345321); m2.bootAtTime(345335); r.add(0, 1, -60.0); r.add(1, 0, -60.0); r.add(0, 2, -60.0); r.add(2, 0, -60.0); r.add(1, 2, -60.0); r.add(2, 1, -80.0); noise = open("meyer-short.txt", "r") lines = noise.readlines() for line in lines: str = line.strip() if (str != ""): val = int(str) m1.addNoiseTraceReading(val) m2.addNoiseTraceReading(val) m1.createNoiseModel() m2.createNoiseModel() th.initialize(); while(1): th.checkThrottle(); t.runNextEvent(); sf.process(); tinyos-2.1.2+dfsg/apps/tests/LinkBench/scripts/meyer-short.txt000066400000000000000000000076331207233610700244420ustar00rootroot00000000000000-41 -41 -41 -41 -41 -41 -41 -91 -41 -41 -41 -41 -41 -48 -41 -41 -41 -83 -98 -80 -80 -79 -79 -79 -79 -98 -79 -80 -79 -80 -80 -80 -83 -83 -83 -83 -82 -82 -41 -82 -82 -82 -82 -82 -82 -41 -94 -93 -93 -87 -89 -90 -45 -92 -85 -98 -80 -80 -79 -78 -79 -79 -79 -97 -94 -83 -81 -80 -82 -81 -81 -84 -84 -86 -98 -89 -79 -79 -79 -79 -79 -79 -57 -79 -79 -79 -79 -79 -79 -79 -41 -84 -96 -97 -79 -90 -98 -79 -79 -79 -79 -79 -79 -92 -83 -83 -82 -81 -83 -80 -85 -82 -81 -82 -82 -82 -82 -41 -82 -82 -82 -82 -82 -82 -83 -82 -82 -82 -82 -82 -98 -98 -79 -79 -79 -79 -79 -78 -97 -91 -96 -91 -82 -82 -82 -82 -82 -82 -77 -82 -82 -82 -82 -82 -82 -98 -79 -79 -79 -79 -79 -79 -94 -98 -96 -81 -82 -82 -82 -82 -82 -91 -91 -93 -91 -91 -91 -91 -93 -91 -91 -91 -91 -91 -92 -91 -91 -87 -84 -79 -79 -79 -79 -79 -78 -94 -79 -79 -79 -79 -80 -79 -94 -98 -82 -83 -82 -82 -83 -83 -82 -41 -81 -98 -98 -98 -86 -82 -99 -82 -82 -82 -82 -82 -82 -82 -82 -82 -81 -82 -82 -90 -79 -79 -79 -78 -78 -79 -79 -79 -78 -79 -79 -79 -98 -82 -81 -82 -82 -82 -82 -82 -82 -82 -82 -81 -81 -81 -90 -82 -81 -82 -82 -81 -81 -82 -82 -82 -80 -82 -81 -81 -81 -42 -61 -96 -82 -82 -82 -82 -82 -82 -82 -82 -82 -82 -82 -82 -82 -98 -98 -98 -98 -98 -41 -41 -98 -99 -84 -98 -41 -98 -98 -98 -85 -98 -96 -96 -91 -87 -98 -96 -99 -98 -90 -88 -86 -88 -96 -91 -82 -82 -82 -82 -82 -82 -82 -82 -82 -82 -82 -84 -93 -79 -79 -79 -79 -79 -79 -79 -79 -79 -79 -79 -79 -80 -80 -80 -79 -80 -80 -80 -80 -79 -79 -80 -80 -73 -80 -80 -80 -79 -78 -80 -80 -80 -80 -80 -79 -80 -74 -40 -40 -91 -40 -40 -79 -79 -79 -79 -79 -79 -79 -79 -79 -79 -91 -91 -90 -97 -40 -40 -91 -91 -40 -40 -82 -82 -82 -82 -82 -82 -82 -82 -82 -83 -82 -96 -79 -80 -80 -80 -80 -80 -80 -80 -80 -79 -80 -80 -80 -41 -40 -40 -40 -98 -80 -79 -79 -79 -79 -80 -80 -80 -80 -79 -80 -79 -40 -40 -40 -79 -79 -79 -79 -79 -79 -79 -79 -80 -80 -80 -79 -92 -83 -82 -83 -82 -82 -82 -83 -82 -81 -82 -82 -82 -90 -92 -82 -82 -83 -83 -83 -83 -83 -82 -82 -83 -83 -82 -42 -40 -40 -70 -82 -68 -80 -79 -80 -79 -80 -78 -80 -80 -80 -96 -80 -79 -80 -80 -80 -80 -79 -80 -80 -80 -80 -80 -60 -79 -80 -80 -80 -80 -80 -80 -80 -80 -79 -80 -80 -99 -80 -80 -80 -80 -80 -79 -80 -80 -80 -79 -80 -80 -99 -84 -83 -83 -83 -84 -83 -83 -83 -84 -84 -84 -84 -84 -48 -79 -80 -80 -80 -80 -79 -80 -79 -80 -80 -79 -80 -91 -91 -91 -92 -91 -92 -94 -79 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -98 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -58 -99 -98 -84 -84 -84 -84 -84 -84 -84 -84 -84 -84 -84 -84 -83 -98 -80 -92 -92 -87 -98 -98 -86 -98 -98 -95 -98 -97 -99 -97 -41 -72 -87 -84 -84 -83 -82 -84 -78 -78 -79 -79 -79 -83 -85 -94 -83 -86 -87 -96 -84 -86 -88 -98 -96 -95 -85 -90 -98 -98 -98 -80 -80 -95 -98 -98 -96 -98 -98 -80 -99 -96 -80 -98 -96 -94 -98 -96 -99 -80 -80 -80 -80 -80 -45 -80 -91 -80 -80 -80 -82 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -41 -40 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -91 -40 -97 -84 -84 -84 -84 -84 -84 -84 -85 -84 -81 -84 -85 -97 -85 -85 -86 -85 -85 -82 -85 -85 -85 -85 -85 -85 -87 -86 -85 -86 -86 -85 -84 -86 -84 -85 -86 -86 -70 -86 -86 -86 -86 -86 -86 -86 -86 -86 -86 -86 -86 -41 -94 -41 -40 -97 -80 -40 -91 -98 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -93 -40 -93 -93 -40 -40 -93 -93 -98 -80 -80 -80 -80 -80 -80 -80 -81 -80 -80 -80 -80 -80 -80 -79 -80 -80 -80 -80 -80 -80 -80 -80 -80 -98 -40 -40 -93 -85 -85 -82 -82 -83 -86 -85 -86 -84 -85 -82 -83 -84 -85 -40 -40 -78 -40 -98 -98 -98 -99 -41 -80 -80 -78 -81 -79 -81 -81 -79 -81 -81 -81 -81 -96 -98 -80 -93 -80 -96 -98 -98 -80 -80 -80 -80 -80 -80 -80 -81 -81 -80 -80 -80 -98 -80 -80 -81 -80 -80 -80 -80 -80 -80 -81 -80 -80 -99 -90 -84 -82 -86 -85 -85 -85 -85 -86 -86 -85 -86 -86 -98 -96 -96 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -79 -81 -80 -48 -90 -89 -79 -93 -91 -95 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -98 -95 -98 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -41 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -96 -98 -98 -99 -71 -98 -98 -99 -98 -98 -98 -98 -98 tinyos-2.1.2+dfsg/apps/tests/LinkBench/scripts/minstall.sh000066400000000000000000000136161207233610700236000ustar00rootroot00000000000000#!/bin/bash # Install the desired nesC code to currently connected motes. Automatic mote # detection works only with telosa,telosb, and iris motes (but can be easily extended). # PROGNAME=${0##*/} # default values START_ID=1 VERBOSE=yes PROGONLY=no COMPILEONLY=no IGNOREUSB=0 LOGFILE=${0%.*}.log SHORTOPTS="hqi:" LONGOPTS="help,quiet,startid:,ignoreusb:,progonly,compileonly" usage() { echo " Usage: $PROGNAME [options] [ platform ] Compiles TinyOS code and programs multiple motes in parallel. Note that by default, mote on /dev/ttyUSB0 is ignored (used to be a BaseStation). Options: -h|--help show this output -q|--quiet stay quiet --startid start the TOS_NODE_ID count from 'num' [ default : $START_ID ] -i|--ignoreusb ignore the mote on port /dev/ttyUSBX [ default : $IGNOREUSB ] --progonly do not compile, only program --compileonly do not program, only compile " } array_find() { key=$1; shift for i; do [ "$i" = $key ] && return 0; done; return 1; } # detect mote USB devices # tested for telosa/telosb/iris motes detect_motes() { TMP=`tempfile` ( for udi in `hal-find-by-capability --capability serial | sort` do parent=`hal-get-property --udi ${udi} --key "info.parent"` grandpa=`hal-get-property --udi ${parent} --key "info.parent"` serial=`hal-get-property --udi ${grandpa} --key "usb_device.serial"` vendor=`hal-get-property --udi ${parent} --key "usb.vendor_id"` product=`hal-get-property --udi ${parent} --key "usb.product_id"` device=`hal-get-property --udi ${udi} --key "linux.device_file"` desc=`hal-get-property --udi ${parent} --key "usb.interface.description"` echo $serial $vendor $product $device $desc >> $TMP; [ $VERBOSE != "no" ] && echo "Detected : $serial $vendor $product $device $desc" done ) if [[ `cat $TMP | wc -l` == "0" ]]; then [ $VERBOSE != "no" ] && echo "No devices found." rm $TMP return 1 fi TELOS_B=`sort $TMP | grep '1027 24577.*Rev.B' | awk '{print $4}'` TELOS_A=`sort $TMP | grep '1027 24577.*Rev A' | awk '{print $4}'` MIB520=`sort $TMP | grep '1027 24592' | awk '{print $4}' | sed -n '1~2p'` for device in `cat $TMP | awk '{print $4}' | sort`; do # fall over if we should ignore the current device echo $device | grep -q "/dev/tt.USB$IGNOREUSB" if [ $? -eq 0 ]; then [ $VERBOSE != "no" ] && echo -e "Skipping device on \033[1m/dev/ttyUSB$IGNOREUSB\033[0m" continue fi # else, go ahead array_find $device $TELOS_B && PRPLAN="$PRPLAN telosb $device " && PLATFORMS="$PLATFORMS telosb" array_find $device $TELOS_A && PRPLAN="$PRPLAN telosa $device " && PLATFORMS="$PLATFORMS telosa" array_find $device $MIB520 && PRPLAN="$PRPLAN $1 $device " && PLATFORMS="$PLATFORMS $1" done rm $TMP return 0 } # compile the application's code compile_code() { QUEUE="" for platform in `echo $@ | tr ' ' '\n' | sort | uniq`; do [ $VERBOSE != "no" ] && echo -e "Compile job for : \033[1m$platform\033[0m" make $platform 1>$LOGFILE-$platform 2>&1 & # push the last make command's PID to the queue QUEUE="$QUEUE $!" done # wait for completion wait $QUEUE; ERROR=$? # assemble logs for platform in `echo $@ | tr ' ' '\n' | sort | uniq`; do cat $LOGFILE-$platform >> $LOGFILE rm $LOGFILE-$platform done if [ $ERROR -ne 0 ]; then echo "Error : Compilation failed !" echo "----------------------------" cat $LOGFILE rm $LOGFILE exit 1 else [ $VERBOSE != "no" ] && echo "Compilation succeeded." rm $LOGFILE fi } # programs motes in parallel defined by the progamming plan # plan is to be given in ... form program_motes() { QUEUE="" PLATFORM_SET="" ERROR=0 tnid=$START_ID while [ $# -ne 0 ]; do platform=$1; device=$2; shift 2 PLATFORM_SET="$PLATFORM_SET $platform " [ $VERBOSE != "no" ] && echo -e "Programming job for : \033[1m$platform\033[0m on \033[1m$device\033[0m with TOS_NODE_ID \033[1m$tnid\033[0m." case "$platform" in iris) make $platform reinstall,$tnid mib520,$device 1>$LOGFILE-$platform-$tnid 2>&1 & ;; telosa|telosb) make $platform reinstall,$tnid bsl,$device 1>$LOGFILE-$platform-$tnid 2>&1 & ;; *) [ $VERBOSE != "no" ] && echo " (UNKNOWN PLATFORM)" > $LOGFILE-$platform-$id; ERROR=1 break; ;; esac ((tnid++)) # push the last make command's PID to the queue QUEUE="$QUEUE $!" done wait $QUEUE; ((ERROR+=$?)) # assemble logs tnid=$START_ID for platform in $PLATFORM_SET; do cat $LOGFILE-$platform-$tnid >> $LOGFILE rm $LOGFILE-$platform-$tnid ((tnid++)) done if [ $ERROR -ne 0 ]; then echo "Error : Programming failed !" echo "----------------------------" cat $LOGFILE rm $LOGFILE exit 1 else [ $VERBOSE != "no" ] && echo "Programming succeeded." rm $LOGFILE fi } # # PARSE COMMAND LINE # ARGS=$(getopt -s bash --options $SHORTOPTS --longoptions $LONGOPTS --name $PROGNAME -- "$@" ) eval set -- "$ARGS" while true; do case $1 in -h|--help) usage; exit 0;; -q|--quiet) VERBOSE=no;; --startid) shift; START_ID=$1;; -i|--ignoreusb) shift IGNOREUSB=$1;; --progonly) PROGONLY='yes';; --compileonly) COMPILEONLY='yes';; --) shift ; break ;; *) shift ; break ;; esac shift done # detect the motes connected detect_motes $1 if [[ $? -ne 0 || $PLATFORMS = "" || $PRPLAN = "" ]]; then [ $VERBOSE != "no" ] && echo "Nothing to do. Quitting." exit 1 fi # compile the application if [ $PROGONLY != 'yes' ]; then compile_code $PLATFORMS fi # program the motes if [ $COMPILEONLY != 'yes' ]; then program_motes $PRPLAN fi exit 0 tinyos-2.1.2+dfsg/apps/tests/LinkBench/scripts/mstats.awk000066400000000000000000000031721207233610700234340ustar00rootroot00000000000000function line_filter() { gsub(/[^0-9]/," "); gsub(/ +/," "); sub(/^ /,""); } BEGIN { FS="[<|>| ]"; skip=1; cnt=0; } // { if ($3 == benchmark) { bidx=$3; statstr=profstr=timerstr=""; skip = 0; } else skip = 1; } // { pre_runtime = $3; } // { runtime = $3; } // { post_runtime = $3; } /On<\/ack>/ { ack=1; } /Off<\/ack>/ { ack=0; } /On<\/bcast>/ { bcast=1; } /Off<\/bcast>/ { bcast=0; } // { if ($3!="") skip=1; } /<\/testresult>/ { if (!skip) { if (svn) { printf "RES.stats(:,:,%d,%d) = [%s];\n",++cnt,svn,statstr; printf "RES.profiles(:,:,%d,%d) = [%s];\n",cnt,svn,profstr; printf "RES.timers(:,:,%d,%d) = [%s];\n",cnt,svn,timerstr; } else { printf "RES.stats(:,:,%d) = [%s];\n",++cnt,statstr; printf "RES.profiles(:,:,%d) = [%s];\n",cnt,profstr; printf "RES.timers(:,:,%d) = [%s];\n",cnt,timerstr; } }} END { printf "RES.config.bidx = %d;\n",bidx; printf "RES.config.pre_runtime = %d;\n",pre_runtime; printf "RES.config.runtime = %d;\n",runtime; printf "RES.config.post_runtime = %d;\n",post_runtime; printf "RES.config.bcast = %d;\n",bcast; printf "RES.config.ack = %d;\n",ack; printf "RES.name = 'RES';\n"; } tinyos-2.1.2+dfsg/apps/tests/LinkBench/scripts/mstats.sh000066400000000000000000000032651207233610700232670ustar00rootroot00000000000000#!/bin/bash PROGNAME=${0##*/} LOGFILE=${0%.*}.log SHORTOPTS="hr:o:" LONGOPTS="help" # default values RESULT_NAME="R" OUTPUT="results.m" usage() { echo " Usage: $PROGNAME [options] < XML file(s) > Creates statistics based on XML files. Output is a MATLAB data script. Options: -h display this help message -r set the output MATLAB variable name -o set the output file name " } # # PARSE COMMAND LINE # ################################################## ARGS=$(getopt -s bash --options $SHORTOPTS --longoptions $LONGOPTS --name $PROGNAME -- "$@" ) eval set -- "$ARGS" while true; do case $1 in -h|--help) usage; exit 0;; -r) shift; RESULT_NAME=$1;; -o) shift; OUTPUT=$1;; *) shift ; break;; esac shift done # # HANDLE ERRORS # ################################################## if [ $# -eq 0 ]; then echo "No XML files specified! See help (-h)!" exit 1 fi rm -f $OUTPUT # Make statistics for all files separately SVN=1; for f in $@; do if [[ ! -e $f || ! -f $f || ! -r $f ]]; then echo "$f does not exist, is not a file, or not readable!" exit 1 fi # get the list of available benchmarks in the file BENCHS=$(grep benchidx $f | tr -cd '[0-9]\n' | sort -n | uniq) echo -n "Processing $f ... " for bidx in $BENCHS; do echo -n "$bidx " if [ $# -gt 1 ]; then gawk -f mstats.awk benchmark=$bidx svn=$SVN $f | sed "s:RES:${RESULT_NAME}_$bidx:g" >> $OUTPUT SVN=$(($SVN+1)) else gawk -f mstats.awk benchmark=$bidx $f | sed "s:RES:${RESULT_NAME}_$bidx:g" >> $OUTPUT fi done echo "done" done tinyos-2.1.2+dfsg/apps/tests/NxFloat/000077500000000000000000000000001207233610700174415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/NxFloat/Makefile000066400000000000000000000005671207233610700211110ustar00rootroot00000000000000COMPONENT=TestSerialAppC BUILD_EXTRA_DEPS += TestSerial.class CLEAN_EXTRA = *.class TestSerialMsg.java CFLAGS += -I$(TOSDIR)/lib/T2Hack TestSerial.class: $(wildcard *.java) TestSerialMsg.java javac -target 1.4 -source 1.4 *.java TestSerialMsg.java: mig java -target=null $(CFLAGS) -java-classname=TestSerialMsg TestSerial.h test_serial_msg -o $@ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/NxFloat/README.txt000066400000000000000000000017451207233610700211460ustar00rootroot00000000000000README for NxFloat Author/Contact: tinyos-help@millennium.berkeley.edu Description: NxFloat is a version of the TestSerial application modified to use floating point numbers. It tests communication over the serial port and nx_float support. The java application sends packets to the serial port at 1Hz: the packet contains an incrementing counter. When the mote application receives a counter packet, it displays the bottom three bits on its LEDs. (This application is similar to RadioCountToLeds, except that it operates over the serial port.) Likewise, the mote also sends packets to the serial port at 1Hz, these packets contain a sequence number multiplied by 3.2. Upon reception of a packet, the java application prints the counter's value to standard out. Java Application Usage: java TestSerial [-comm ] If not specified, the defaults to sf@localhost:9002 or to your MOTECOM environment variable (if defined). Tools: Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/NxFloat/TestSerial.h000066400000000000000000000002531207233610700216710ustar00rootroot00000000000000 #ifndef TEST_SERIAL_H #define TEST_SERIAL_H typedef nx_struct test_serial_msg { nx_float counter; } test_serial_msg_t; enum { AM_TEST_SERIAL_MSG = 0x89, }; #endif tinyos-2.1.2+dfsg/apps/tests/NxFloat/TestSerial.java000066400000000000000000000067231207233610700223730ustar00rootroot00000000000000/* tab:4 * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Java-side application for testing serial port communication. * * * @author Phil Levis * @date August 12 2005 */ import java.io.IOException; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class TestSerial implements MessageListener { private MoteIF moteIF; public TestSerial(MoteIF moteIF) { this.moteIF = moteIF; this.moteIF.registerListener(new TestSerialMsg(), this); } public void sendPackets() { int counter = 0; TestSerialMsg payload = new TestSerialMsg(); try { while (true) { System.out.println("Sending packet " + counter); payload.set_counter(counter); moteIF.send(0, payload); counter++; try {Thread.sleep(1000);} catch (InterruptedException exception) {} } } catch (IOException exception) { System.err.println("Exception thrown when sending packets. Exiting."); System.err.println(exception); } } public void messageReceived(int to, Message message) { TestSerialMsg msg = (TestSerialMsg)message; System.out.println("Received packet sequence number " + msg.get_counter()); } private static void usage() { System.err.println("usage: TestSerial [-comm ]"); } public static void main(String[] args) throws Exception { String source = null; if (args.length == 2) { if (!args[0].equals("-comm")) { usage(); System.exit(1); } source = args[1]; } else if (args.length != 0) { usage(); System.exit(1); } PhoenixSource phoenix; if (source == null) { phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); } else { phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); } MoteIF mif = new MoteIF(phoenix); TestSerial serial = new TestSerial(mif); serial.sendPackets(); } } tinyos-2.1.2+dfsg/apps/tests/NxFloat/TestSerialAppC.nc000066400000000000000000000061001207233610700226030ustar00rootroot00000000000000// $Id: TestSerialAppC.nc,v 1.2 2010-06-29 22:07:20 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Application to test that the TinyOS java toolchain can communicate * with motes over the serial port. The application sends packets to * the serial port at 1Hz: the packet contains an incrementing * counter. When the application receives a counter packet, it * displays the bottom three bits on its LEDs. This application is * very similar to RadioCountToLeds, except that it operates over the * serial port. There is Java application for testing the mote * application: run TestSerial to print out the received packets and * send packets to the mote. * * @author Gilman Tolle * @author Philip Levis * * @date Aug 12 2005 * **/ #include "TestSerial.h" configuration TestSerialAppC {} implementation { components TestSerialC as App, LedsC, MainC; components SerialActiveMessageC as AM; components new TimerMilliC(); App.Boot -> MainC.Boot; App.Control -> AM; App.Receive -> AM.Receive[AM_TEST_SERIAL_MSG]; App.AMSend -> AM.AMSend[AM_TEST_SERIAL_MSG]; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> AM; } tinyos-2.1.2+dfsg/apps/tests/NxFloat/TestSerialC.nc000066400000000000000000000077411207233610700221560ustar00rootroot00000000000000// $Id: TestSerialC.nc,v 1.2 2010-06-29 22:07:20 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Application to test that the TinyOS java toolchain can communicate * with motes over the serial port. * * @author Gilman Tolle * @author Philip Levis * * @date Aug 12 2005 * **/ #include "Timer.h" #include "TestSerial.h" module TestSerialC { uses { interface SplitControl as Control; interface Leds; interface Boot; interface Receive; interface AMSend; interface Timer as MilliTimer; interface Packet; } } implementation { message_t packet; bool locked = FALSE; uint16_t counter = 0; event void Boot.booted() { call Control.start(); } event void MilliTimer.fired() { counter++; if (locked) { return; } else { test_serial_msg_t* rcm = (test_serial_msg_t*)call Packet.getPayload(&packet, sizeof(test_serial_msg_t)); if (rcm == NULL) {return;} if (call Packet.maxPayloadLength() < sizeof(test_serial_msg_t)) { return; } rcm->counter = counter * 3.2; if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(test_serial_msg_t)) == SUCCESS) { locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { if (len != sizeof(test_serial_msg_t)) {return bufPtr;} else { test_serial_msg_t* rcm = (test_serial_msg_t*)payload; if ((int)rcm->counter & 0x1) { call Leds.led0On(); } else { call Leds.led0Off(); } if ((int)rcm->counter & 0x2) { call Leds.led1On(); } else { call Leds.led1Off(); } if ((int)rcm->counter & 0x4) { call Leds.led2On(); } else { call Leds.led2Off(); } return bufPtr; } } event void AMSend.sendDone(message_t* bufPtr, error_t error) { if (&packet == bufPtr) { locked = FALSE; } } event void Control.startDone(error_t err) { if (err == SUCCESS) { call MilliTimer.startPeriodic(1000); } } event void Control.stopDone(error_t err) {} } tinyos-2.1.2+dfsg/apps/tests/TestAdc/000077500000000000000000000000001207233610700174155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestAdc/Makefile000066400000000000000000000000531207233610700210530ustar00rootroot00000000000000COMPONENT=TestAdcAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestAdc/README.txt000066400000000000000000000014061207233610700211140ustar00rootroot00000000000000README for TestAdc Author/Contact: tinyos-help@millennium.berkeley.edu Description: TestAdc is an application for testing the ADC subsystem. It requires a generic platform dependent DemoSensorC, DemoSensorNowC and DemoSensorStreamC components that provide the following interfaces: Read (DemoSensorC), ReadStream (DemoSensorStreamC) and ReadNow and Resource (DemoSensorNowC). It requests data via the three data collection interfaces and switches on leds 0, 1 and 2 when the conversion results are signalled from the ADC subsystem: LED0 denotes a successful Read operation, LED1 denotes a successful ReadNow operation, LED2 denotes a successful ReadStream operation. Please refer to TEP 101 for more information on the ADC abstraction. tinyos-2.1.2+dfsg/apps/tests/TestAdc/TestAdcAppC.nc000066400000000000000000000054401207233610700220350ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:22:49 $ * @author: Jan Hauer * ======================================================================== */ /** * Tests the AdcC subsystem and switches on leds 0, 1 and 2 * if the test is successful: * LED0 denotes a successful Read operation, * LED1 denotes a successful ReadNow operation, * LED2 denotes a successful ReadStream operation. * * Requires a platform-specific DemoSensorC component that provides * Read, a platform-specific DemoSensorStreamC component that provides * ReadStream and a platform-specific DemoSensorNowC component that provides * ReadNow and Resource * * @author Jan Hauer */ configuration TestAdcAppC { } implementation { components MainC, TestAdcC, new DemoSensorC() as Sensor, new DemoSensorNowC() as SensorNow, new DemoSensorStreamC() as SensorStream, LedsC; TestAdcC -> MainC.Boot; TestAdcC.Leds -> LedsC; TestAdcC.Read -> Sensor; TestAdcC.ReadNow -> SensorNow; TestAdcC.ReadNowResource -> SensorNow; TestAdcC.ReadStream -> SensorStream; } tinyos-2.1.2+dfsg/apps/tests/TestAdc/TestAdcC.nc000066400000000000000000000063641207233610700214020ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2008-05-20 18:16:15 $ * @author: Jan Hauer * ======================================================================== */ /** * Tests the AdcC subsystem and switches on leds 0, 1 and 2. * if the test is successful: * LED0 denotes a successful Read operation, * LED1 denotes a successful ReadNow operation, * LED2 denotes a successful ReadStream operation. * * @author Jan Hauer */ module TestAdcC { uses interface Read as Read; uses interface ReadNow as ReadNow; uses interface Resource as ReadNowResource; uses interface ReadStream as ReadStream; uses interface Boot; uses interface Leds; } implementation { #define BUF_SIZE 100 uint16_t buf[BUF_SIZE]; bool streamSuccess; event void Boot.booted() { streamSuccess = FALSE; call Read.read(); call ReadStream.postBuffer(buf, BUF_SIZE); call ReadStream.read(10000); call ReadNowResource.request(); } event void Read.readDone(error_t result, uint16_t data) { if (result == SUCCESS) call Leds.led0On(); } event void ReadNowResource.granted() { call ReadNow.read(); } async event void ReadNow.readDone(error_t result, uint16_t data) { if (result == SUCCESS) call Leds.led1On(); call ReadNowResource.release(); } event void ReadStream.bufferDone( error_t result, uint16_t* buffer, uint16_t count ) { streamSuccess = TRUE; } event void ReadStream.readDone(error_t result, uint32_t actualPeriod) { if (result == SUCCESS && streamSuccess) call Leds.led2On(); } } tinyos-2.1.2+dfsg/apps/tests/TestDhv/000077500000000000000000000000001207233610700174475ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestDhv/DhvInject.java000066400000000000000000000036401207233610700221730ustar00rootroot00000000000000 import java.io.*; import net.tinyos.message.*; import net.tinyos.util.*; public class DhvInject implements MessageListener { MoteIF mote; DhvInject(DhvMsg dhvmsg) { mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(dhvmsg, this); } public synchronized void messageReceived(int dest_addr, Message message) { // do nothing for now } void sendDhvDataMsg(int key, long version, short[] data) { int totalsize = DhvMsg.DEFAULT_MESSAGE_SIZE + DhvDataMsg.DEFAULT_MESSAGE_SIZE + DhvData.DEFAULT_MESSAGE_SIZE; DhvMsg dm = new DhvMsg(totalsize); dm.set_type((short)3); DhvDataMsg ddm = new DhvDataMsg(dm, DhvMsg.DEFAULT_MESSAGE_SIZE); ddm.set_key(key); ddm.set_version(version << 16); ddm.set_size((short)data.length); DhvData dd = new DhvData(ddm, DhvDataMsg.DEFAULT_MESSAGE_SIZE); dd.set_data(data); try { mote.send(MoteIF.TOS_BCAST_ADDR, dd); } catch(IOException e) { System.err.println("Cannot send message"); } } public static void main(String args[]) { int i; System.out.println("Usage: java DhvInject [key] [version] [hex data delimit space in quotes]"); int k = Integer.parseInt(args[0], 16); long v = Long.parseLong(args[1]); String hexdata[] = args[2].split(" "); short d[]; if(hexdata.length > 16) { System.err.println("Data too long, keep it <= 16 bytes please"); } d = new short[hexdata.length]; for(i = 0; i < d.length; i++) d[i] = Short.parseShort(hexdata[i], 16); System.out.println("Key: " + k); System.out.println("Version: " + v); System.out.print("Data: "); for(i = 0; i < d.length; i++) { System.out.print(d[i] + " "); } System.out.println(); DhvInject dhvinject = new DhvInject(new DhvMsg()); dhvinject.sendDhvDataMsg(k, v, d); } } tinyos-2.1.2+dfsg/apps/tests/TestDhv/Makefile000066400000000000000000000036451207233610700211170ustar00rootroot00000000000000COMPONENT=TestDhvC BUILD_EXTRA_DEPS = DhvMsg.py DhvDataMsg.py DhvMsg.class DhvDataMsg.class DhvData.class DhvInject.class DhvTestMsg.class CFLAGS += -I$(TOSDIR)/lib/net #CFLAGS += -DLOW_POWER_LISTENING #CFLAGS += -DLPL_DEF_LOCAL_SLEEP=512 #CFLAGS += -DLPL_DEF_RX_SLEEP=512 #CFLAGS += -DDELAY_AFTER_RECEIVE=20 CFLAGS += -I$(TOSDIR)/lib/net/dhv -I$(TOSDIR)/lib/net/dhv/interfaces #CFLAGS += -I$(TOSDIR)/lib/net/dhv -I$(TOSDIR)/lib/net/dhv/interfaces #CFLAGS += -I$(TOSDIR)/lib/net/drip CONSTANTS += -DTOSH_DATA_LENGTH=32 CFLAGS += $(CONSTANTS) CLEAN_EXTRA += DhvMsg.py DhvDataMsg.py DhvData.py DhvMsg.java DhvDataMsg.java DhvData.java DhvMsg.class DhvDataMsg.class DhvData.class DhvInject.class DhvTestMsg.class DhvTestMsg.java DhvMsg.py: mig python -target=$(PLATFORM) -python-classname=DhvMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_msg -o $@ DhvDataMsg.py: mig python -target=$(PLATFORM) -python-classname=DhvDataMsg -python-extends=DhvMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_data_msg -o $@ DhvData.py: mig python -target=$(PLATFORM) -python-classname=DhvData -python-extends=DhvDataMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_data -o $@ DhvTestMsg.class: DhvTestMsg.java javac DhvTestMsg.java DhvMsg.class: DhvMsg.java javac DhvMsg.java DhvDataMsg.class: DhvDataMsg.java javac DhvDataMsg.java DhvData.class: DhvData.java javac DhvData.java DhvTestMsg.java: mig java -target=null -java-classname=DhvTestMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_test_msg -o $@ DhvMsg.java: mig java -target=null -java-classname=DhvMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_msg -o $@ DhvDataMsg.java: mig java -target=null -java-classname=DhvDataMsg -java-extends=DhvMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_data_msg -o $@ DhvData.java: mig java -target=null -java-classname=DhvData -java-extends=DhvDataMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_data -o $@ DhvInject.class: javac DhvInject.java include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestDhv/README000066400000000000000000000032421207233610700203300ustar00rootroot00000000000000 Title: TestDhv Application Author: Thanh Dang, Sweungweon Park adopted from TestDip 1. SETTING UP THE TEST You need to first generate the code for compilation. The gentest.py script reads in the Master files and creates TestDhvC.nc (the configuration) and TestDhvP.nc (the module). It takes two parameters, the total number of items and the number of new items. The items that are random are chosen randomly. If you want 128 total items in the dissemination set, where 96 of those 128 items are new, you would type: python gentest.py 128 96 After the configuration and module have been generated, you can use the normal compilation method (e.g. make telosb). 2, READING THE LEDS When an node receives a new item, it toggles LED0. When a node completes all items, it turns all LEDs on. 3. SERIAL MESSAGES typedef nx_struct dhv_test_msg_t { nx_am_addr_t id; nx_uint8_t count; nx_uint8_t isOk; } dhv_test_msg_t; When a node receives a new item, it sends a dhv_test_msg_t through the serial interface. id is the node id count is how many new items it has received so far isOk will be true if the data value was as expected 4. PACKET INJECTOR You can also use the injector to send data packets via a basestation. The syntax to do that is: java DhvInject [key] [version] [data in quotes delimited by space] key is the data key in hexadecimal version is the version number in decimal data is the actual data in quotes delimited by space For example, if you want to send key 10, version 2, and data "ab cd ef". You would type: java DipInject 0a 2 "ab cd ef" For this specific test application, your data needs to be "ef be". You will need a SerialForwarder running for this work. tinyos-2.1.2+dfsg/apps/tests/TestDhv/TestDhv.h000066400000000000000000000001341207233610700211770ustar00rootroot00000000000000#ifndef __TESTDHV_H__ #define __TESTDHV_H__ /*enum { AM_DHV_TEST_MSG = 0xAB };*/ #endif tinyos-2.1.2+dfsg/apps/tests/TestDhv/TestDhvC-Master.nc000066400000000000000000000012661207233610700227130ustar00rootroot00000000000000#include "TestDhv.h" configuration TestDhvC { } implementation { components TestDhvP; components LedsC as LedsC; TestDhvP.Leds -> LedsC; components DisseminationC; TestDhvP.StdControl -> DisseminationC; /* components new DisseminatorC(uint32_t, 0x1) as Dissem1; TestDhvP.DisseminationValue1 -> Dissem1; TestDhvP.DisseminationUpdate1 -> Dissem1; */ // ... DISSEMINATORS components MainC; TestDhvP.Boot -> MainC; components SerialActiveMessageC; components new SerialAMSenderC(AM_DHV_TEST_MSG); TestDhvP.SerialSend -> SerialAMSenderC; TestDhvP.SerialControl -> SerialActiveMessageC; components ActiveMessageC; TestDhvP.AMControl -> ActiveMessageC; } tinyos-2.1.2+dfsg/apps/tests/TestDhv/TestDhvC.nc000066400000000000000000000236431207233610700214650ustar00rootroot00000000000000#include "TestDhv.h" configuration TestDhvC { } implementation { components TestDhvP; components LedsC as LedsC; TestDhvP.Leds -> LedsC; components DisseminationC; TestDhvP.StdControl -> DisseminationC; /* components new DisseminatorC(uint32_t, 0x1) as Dissem1; TestDhvP.DisseminationValue1 -> Dissem1; TestDhvP.DisseminationUpdate1 -> Dissem1; */ components new DisseminatorC(uint16_t, 1) as Dissem1; TestDhvP.DisseminationUpdate1 -> Dissem1; TestDhvP.DisseminationValue1 -> Dissem1; components new DisseminatorC(uint16_t, 2) as Dissem2; TestDhvP.DisseminationUpdate2 -> Dissem2; TestDhvP.DisseminationValue2 -> Dissem2; components new DisseminatorC(uint16_t, 3) as Dissem3; TestDhvP.DisseminationUpdate3 -> Dissem3; TestDhvP.DisseminationValue3 -> Dissem3; components new DisseminatorC(uint16_t, 4) as Dissem4; TestDhvP.DisseminationUpdate4 -> Dissem4; TestDhvP.DisseminationValue4 -> Dissem4; components new DisseminatorC(uint16_t, 5) as Dissem5; TestDhvP.DisseminationUpdate5 -> Dissem5; TestDhvP.DisseminationValue5 -> Dissem5; components new DisseminatorC(uint16_t, 6) as Dissem6; TestDhvP.DisseminationUpdate6 -> Dissem6; TestDhvP.DisseminationValue6 -> Dissem6; components new DisseminatorC(uint16_t, 7) as Dissem7; TestDhvP.DisseminationUpdate7 -> Dissem7; TestDhvP.DisseminationValue7 -> Dissem7; components new DisseminatorC(uint16_t, 8) as Dissem8; TestDhvP.DisseminationUpdate8 -> Dissem8; TestDhvP.DisseminationValue8 -> Dissem8; components new DisseminatorC(uint16_t, 9) as Dissem9; TestDhvP.DisseminationUpdate9 -> Dissem9; TestDhvP.DisseminationValue9 -> Dissem9; components new DisseminatorC(uint16_t, 10) as Dissem10; TestDhvP.DisseminationUpdate10 -> Dissem10; TestDhvP.DisseminationValue10 -> Dissem10; components new DisseminatorC(uint16_t, 11) as Dissem11; TestDhvP.DisseminationUpdate11 -> Dissem11; TestDhvP.DisseminationValue11 -> Dissem11; components new DisseminatorC(uint16_t, 12) as Dissem12; TestDhvP.DisseminationUpdate12 -> Dissem12; TestDhvP.DisseminationValue12 -> Dissem12; components new DisseminatorC(uint16_t, 13) as Dissem13; TestDhvP.DisseminationUpdate13 -> Dissem13; TestDhvP.DisseminationValue13 -> Dissem13; components new DisseminatorC(uint16_t, 14) as Dissem14; TestDhvP.DisseminationUpdate14 -> Dissem14; TestDhvP.DisseminationValue14 -> Dissem14; components new DisseminatorC(uint16_t, 15) as Dissem15; TestDhvP.DisseminationUpdate15 -> Dissem15; TestDhvP.DisseminationValue15 -> Dissem15; components new DisseminatorC(uint16_t, 16) as Dissem16; TestDhvP.DisseminationUpdate16 -> Dissem16; TestDhvP.DisseminationValue16 -> Dissem16; components new DisseminatorC(uint16_t, 17) as Dissem17; TestDhvP.DisseminationUpdate17 -> Dissem17; TestDhvP.DisseminationValue17 -> Dissem17; components new DisseminatorC(uint16_t, 18) as Dissem18; TestDhvP.DisseminationUpdate18 -> Dissem18; TestDhvP.DisseminationValue18 -> Dissem18; components new DisseminatorC(uint16_t, 19) as Dissem19; TestDhvP.DisseminationUpdate19 -> Dissem19; TestDhvP.DisseminationValue19 -> Dissem19; components new DisseminatorC(uint16_t, 20) as Dissem20; TestDhvP.DisseminationUpdate20 -> Dissem20; TestDhvP.DisseminationValue20 -> Dissem20; components new DisseminatorC(uint16_t, 21) as Dissem21; TestDhvP.DisseminationUpdate21 -> Dissem21; TestDhvP.DisseminationValue21 -> Dissem21; components new DisseminatorC(uint16_t, 22) as Dissem22; TestDhvP.DisseminationUpdate22 -> Dissem22; TestDhvP.DisseminationValue22 -> Dissem22; components new DisseminatorC(uint16_t, 23) as Dissem23; TestDhvP.DisseminationUpdate23 -> Dissem23; TestDhvP.DisseminationValue23 -> Dissem23; components new DisseminatorC(uint16_t, 24) as Dissem24; TestDhvP.DisseminationUpdate24 -> Dissem24; TestDhvP.DisseminationValue24 -> Dissem24; components new DisseminatorC(uint16_t, 25) as Dissem25; TestDhvP.DisseminationUpdate25 -> Dissem25; TestDhvP.DisseminationValue25 -> Dissem25; components new DisseminatorC(uint16_t, 26) as Dissem26; TestDhvP.DisseminationUpdate26 -> Dissem26; TestDhvP.DisseminationValue26 -> Dissem26; components new DisseminatorC(uint16_t, 27) as Dissem27; TestDhvP.DisseminationUpdate27 -> Dissem27; TestDhvP.DisseminationValue27 -> Dissem27; components new DisseminatorC(uint16_t, 28) as Dissem28; TestDhvP.DisseminationUpdate28 -> Dissem28; TestDhvP.DisseminationValue28 -> Dissem28; components new DisseminatorC(uint16_t, 29) as Dissem29; TestDhvP.DisseminationUpdate29 -> Dissem29; TestDhvP.DisseminationValue29 -> Dissem29; components new DisseminatorC(uint16_t, 30) as Dissem30; TestDhvP.DisseminationUpdate30 -> Dissem30; TestDhvP.DisseminationValue30 -> Dissem30; components new DisseminatorC(uint16_t, 31) as Dissem31; TestDhvP.DisseminationUpdate31 -> Dissem31; TestDhvP.DisseminationValue31 -> Dissem31; components new DisseminatorC(uint16_t, 32) as Dissem32; TestDhvP.DisseminationUpdate32 -> Dissem32; TestDhvP.DisseminationValue32 -> Dissem32; components new DisseminatorC(uint16_t, 33) as Dissem33; TestDhvP.DisseminationUpdate33 -> Dissem33; TestDhvP.DisseminationValue33 -> Dissem33; components new DisseminatorC(uint16_t, 34) as Dissem34; TestDhvP.DisseminationUpdate34 -> Dissem34; TestDhvP.DisseminationValue34 -> Dissem34; components new DisseminatorC(uint16_t, 35) as Dissem35; TestDhvP.DisseminationUpdate35 -> Dissem35; TestDhvP.DisseminationValue35 -> Dissem35; components new DisseminatorC(uint16_t, 36) as Dissem36; TestDhvP.DisseminationUpdate36 -> Dissem36; TestDhvP.DisseminationValue36 -> Dissem36; components new DisseminatorC(uint16_t, 37) as Dissem37; TestDhvP.DisseminationUpdate37 -> Dissem37; TestDhvP.DisseminationValue37 -> Dissem37; components new DisseminatorC(uint16_t, 38) as Dissem38; TestDhvP.DisseminationUpdate38 -> Dissem38; TestDhvP.DisseminationValue38 -> Dissem38; components new DisseminatorC(uint16_t, 39) as Dissem39; TestDhvP.DisseminationUpdate39 -> Dissem39; TestDhvP.DisseminationValue39 -> Dissem39; components new DisseminatorC(uint16_t, 40) as Dissem40; TestDhvP.DisseminationUpdate40 -> Dissem40; TestDhvP.DisseminationValue40 -> Dissem40; components new DisseminatorC(uint16_t, 41) as Dissem41; TestDhvP.DisseminationUpdate41 -> Dissem41; TestDhvP.DisseminationValue41 -> Dissem41; components new DisseminatorC(uint16_t, 42) as Dissem42; TestDhvP.DisseminationUpdate42 -> Dissem42; TestDhvP.DisseminationValue42 -> Dissem42; components new DisseminatorC(uint16_t, 43) as Dissem43; TestDhvP.DisseminationUpdate43 -> Dissem43; TestDhvP.DisseminationValue43 -> Dissem43; components new DisseminatorC(uint16_t, 44) as Dissem44; TestDhvP.DisseminationUpdate44 -> Dissem44; TestDhvP.DisseminationValue44 -> Dissem44; components new DisseminatorC(uint16_t, 45) as Dissem45; TestDhvP.DisseminationUpdate45 -> Dissem45; TestDhvP.DisseminationValue45 -> Dissem45; components new DisseminatorC(uint16_t, 46) as Dissem46; TestDhvP.DisseminationUpdate46 -> Dissem46; TestDhvP.DisseminationValue46 -> Dissem46; components new DisseminatorC(uint16_t, 47) as Dissem47; TestDhvP.DisseminationUpdate47 -> Dissem47; TestDhvP.DisseminationValue47 -> Dissem47; components new DisseminatorC(uint16_t, 48) as Dissem48; TestDhvP.DisseminationUpdate48 -> Dissem48; TestDhvP.DisseminationValue48 -> Dissem48; components new DisseminatorC(uint16_t, 49) as Dissem49; TestDhvP.DisseminationUpdate49 -> Dissem49; TestDhvP.DisseminationValue49 -> Dissem49; components new DisseminatorC(uint16_t, 50) as Dissem50; TestDhvP.DisseminationUpdate50 -> Dissem50; TestDhvP.DisseminationValue50 -> Dissem50; components new DisseminatorC(uint16_t, 51) as Dissem51; TestDhvP.DisseminationUpdate51 -> Dissem51; TestDhvP.DisseminationValue51 -> Dissem51; components new DisseminatorC(uint16_t, 52) as Dissem52; TestDhvP.DisseminationUpdate52 -> Dissem52; TestDhvP.DisseminationValue52 -> Dissem52; components new DisseminatorC(uint16_t, 53) as Dissem53; TestDhvP.DisseminationUpdate53 -> Dissem53; TestDhvP.DisseminationValue53 -> Dissem53; components new DisseminatorC(uint16_t, 54) as Dissem54; TestDhvP.DisseminationUpdate54 -> Dissem54; TestDhvP.DisseminationValue54 -> Dissem54; components new DisseminatorC(uint16_t, 55) as Dissem55; TestDhvP.DisseminationUpdate55 -> Dissem55; TestDhvP.DisseminationValue55 -> Dissem55; components new DisseminatorC(uint16_t, 56) as Dissem56; TestDhvP.DisseminationUpdate56 -> Dissem56; TestDhvP.DisseminationValue56 -> Dissem56; components new DisseminatorC(uint16_t, 57) as Dissem57; TestDhvP.DisseminationUpdate57 -> Dissem57; TestDhvP.DisseminationValue57 -> Dissem57; components new DisseminatorC(uint16_t, 58) as Dissem58; TestDhvP.DisseminationUpdate58 -> Dissem58; TestDhvP.DisseminationValue58 -> Dissem58; components new DisseminatorC(uint16_t, 59) as Dissem59; TestDhvP.DisseminationUpdate59 -> Dissem59; TestDhvP.DisseminationValue59 -> Dissem59; components new DisseminatorC(uint16_t, 60) as Dissem60; TestDhvP.DisseminationUpdate60 -> Dissem60; TestDhvP.DisseminationValue60 -> Dissem60; components new DisseminatorC(uint16_t, 61) as Dissem61; TestDhvP.DisseminationUpdate61 -> Dissem61; TestDhvP.DisseminationValue61 -> Dissem61; components new DisseminatorC(uint16_t, 62) as Dissem62; TestDhvP.DisseminationUpdate62 -> Dissem62; TestDhvP.DisseminationValue62 -> Dissem62; components new DisseminatorC(uint16_t, 63) as Dissem63; TestDhvP.DisseminationUpdate63 -> Dissem63; TestDhvP.DisseminationValue63 -> Dissem63; components new DisseminatorC(uint16_t, 64) as Dissem64; TestDhvP.DisseminationUpdate64 -> Dissem64; TestDhvP.DisseminationValue64 -> Dissem64; components MainC; TestDhvP.Boot -> MainC; components SerialActiveMessageC; components new SerialAMSenderC(AM_DHV_TEST_MSG); TestDhvP.SerialSend -> SerialAMSenderC; TestDhvP.SerialControl -> SerialActiveMessageC; } tinyos-2.1.2+dfsg/apps/tests/TestDhv/TestDhvP-Master.nc000066400000000000000000000043661207233610700227340ustar00rootroot00000000000000 module TestDhvP { uses interface Leds; uses interface StdControl; /* uses interface DisseminationUpdate as DisseminationUpdate1; uses interface DisseminationValue as DisseminationValue1; */ // ... INTERFACES uses interface Boot; uses interface AMSend as SerialSend; uses interface SplitControl as SerialControl; uses interface SplitControl as AMControl; } implementation { typedef nx_struct dhv_test_msg_t { nx_am_addr_t id; nx_uint8_t count; nx_uint8_t isOk; } dhv_test_msg_t; message_t testMsg; uint8_t okBit = 1; uint16_t data; uint8_t count = 0; /* uint8_t newCount = N; */ // ... NEWCOUNT void bookkeep(); event void SerialControl.startDone(error_t err) { if(err != SUCCESS){ call SerialControl.start(); return; } call AMControl.start(); } event void AMControl.startDone(error_t err) { if(err != SUCCESS){ call AMControl.start(); return; } call StdControl.start(); if(TOS_NODE_ID == 1) { data = 0xBEEF; dbg("TestDhvP","Updating data items\n"); /* call DisseminationUpdate1.change(&data); */ // ... CHANGES } } event void SerialControl.stopDone(error_t err) { } event void AMControl.stopDone(error_t err) {} event void Boot.booted() { call SerialControl.start(); dbg("TestDhvP", "Booted at %s\n", sim_time_string()); } /* event void DisseminationValue1.changed() { uint16_t val = *(uint16_t*) call DisseminationValue1.get(); if(val != 0xBEEF) { return; } bookkeep(); } */ // ... EVENTS void bookkeep() { dhv_test_msg_t* dhvTestMsgPtr; if(count < newCount) { count++; } dbg("TestDhvP", "Got an update, %u complete now at %s\n", count, sim_time_string()); call Leds.led0Toggle(); dhvTestMsgPtr = (dhv_test_msg_t*) call SerialSend.getPayload(&testMsg, 0); dhvTestMsgPtr->id = TOS_NODE_ID; dhvTestMsgPtr->count = count; dhvTestMsgPtr->isOk = okBit; call SerialSend.send(0, &testMsg, sizeof(dhv_test_msg_t)); if(newCount == count) { dbg("TestDhvP","Dissemination COMPLETE!\n"); call Leds.set(7); } } event void SerialSend.sendDone(message_t* message, error_t err) { } } tinyos-2.1.2+dfsg/apps/tests/TestDhv/TestDhvP.nc000066400000000000000000000532331207233610700215000ustar00rootroot00000000000000 module TestDhvP { uses interface Leds; uses interface StdControl; /* uses interface DisseminationUpdate as DisseminationUpdate1; uses interface DisseminationValue as DisseminationValue1; */ uses interface DisseminationUpdate as DisseminationUpdate1; uses interface DisseminationValue as DisseminationValue1; uses interface DisseminationUpdate as DisseminationUpdate2; uses interface DisseminationValue as DisseminationValue2; uses interface DisseminationUpdate as DisseminationUpdate3; uses interface DisseminationValue as DisseminationValue3; uses interface DisseminationUpdate as DisseminationUpdate4; uses interface DisseminationValue as DisseminationValue4; uses interface DisseminationUpdate as DisseminationUpdate5; uses interface DisseminationValue as DisseminationValue5; uses interface DisseminationUpdate as DisseminationUpdate6; uses interface DisseminationValue as DisseminationValue6; uses interface DisseminationUpdate as DisseminationUpdate7; uses interface DisseminationValue as DisseminationValue7; uses interface DisseminationUpdate as DisseminationUpdate8; uses interface DisseminationValue as DisseminationValue8; uses interface DisseminationUpdate as DisseminationUpdate9; uses interface DisseminationValue as DisseminationValue9; uses interface DisseminationUpdate as DisseminationUpdate10; uses interface DisseminationValue as DisseminationValue10; uses interface DisseminationUpdate as DisseminationUpdate11; uses interface DisseminationValue as DisseminationValue11; uses interface DisseminationUpdate as DisseminationUpdate12; uses interface DisseminationValue as DisseminationValue12; uses interface DisseminationUpdate as DisseminationUpdate13; uses interface DisseminationValue as DisseminationValue13; uses interface DisseminationUpdate as DisseminationUpdate14; uses interface DisseminationValue as DisseminationValue14; uses interface DisseminationUpdate as DisseminationUpdate15; uses interface DisseminationValue as DisseminationValue15; uses interface DisseminationUpdate as DisseminationUpdate16; uses interface DisseminationValue as DisseminationValue16; uses interface DisseminationUpdate as DisseminationUpdate17; uses interface DisseminationValue as DisseminationValue17; uses interface DisseminationUpdate as DisseminationUpdate18; uses interface DisseminationValue as DisseminationValue18; uses interface DisseminationUpdate as DisseminationUpdate19; uses interface DisseminationValue as DisseminationValue19; uses interface DisseminationUpdate as DisseminationUpdate20; uses interface DisseminationValue as DisseminationValue20; uses interface DisseminationUpdate as DisseminationUpdate21; uses interface DisseminationValue as DisseminationValue21; uses interface DisseminationUpdate as DisseminationUpdate22; uses interface DisseminationValue as DisseminationValue22; uses interface DisseminationUpdate as DisseminationUpdate23; uses interface DisseminationValue as DisseminationValue23; uses interface DisseminationUpdate as DisseminationUpdate24; uses interface DisseminationValue as DisseminationValue24; uses interface DisseminationUpdate as DisseminationUpdate25; uses interface DisseminationValue as DisseminationValue25; uses interface DisseminationUpdate as DisseminationUpdate26; uses interface DisseminationValue as DisseminationValue26; uses interface DisseminationUpdate as DisseminationUpdate27; uses interface DisseminationValue as DisseminationValue27; uses interface DisseminationUpdate as DisseminationUpdate28; uses interface DisseminationValue as DisseminationValue28; uses interface DisseminationUpdate as DisseminationUpdate29; uses interface DisseminationValue as DisseminationValue29; uses interface DisseminationUpdate as DisseminationUpdate30; uses interface DisseminationValue as DisseminationValue30; uses interface DisseminationUpdate as DisseminationUpdate31; uses interface DisseminationValue as DisseminationValue31; uses interface DisseminationUpdate as DisseminationUpdate32; uses interface DisseminationValue as DisseminationValue32; uses interface DisseminationUpdate as DisseminationUpdate33; uses interface DisseminationValue as DisseminationValue33; uses interface DisseminationUpdate as DisseminationUpdate34; uses interface DisseminationValue as DisseminationValue34; uses interface DisseminationUpdate as DisseminationUpdate35; uses interface DisseminationValue as DisseminationValue35; uses interface DisseminationUpdate as DisseminationUpdate36; uses interface DisseminationValue as DisseminationValue36; uses interface DisseminationUpdate as DisseminationUpdate37; uses interface DisseminationValue as DisseminationValue37; uses interface DisseminationUpdate as DisseminationUpdate38; uses interface DisseminationValue as DisseminationValue38; uses interface DisseminationUpdate as DisseminationUpdate39; uses interface DisseminationValue as DisseminationValue39; uses interface DisseminationUpdate as DisseminationUpdate40; uses interface DisseminationValue as DisseminationValue40; uses interface DisseminationUpdate as DisseminationUpdate41; uses interface DisseminationValue as DisseminationValue41; uses interface DisseminationUpdate as DisseminationUpdate42; uses interface DisseminationValue as DisseminationValue42; uses interface DisseminationUpdate as DisseminationUpdate43; uses interface DisseminationValue as DisseminationValue43; uses interface DisseminationUpdate as DisseminationUpdate44; uses interface DisseminationValue as DisseminationValue44; uses interface DisseminationUpdate as DisseminationUpdate45; uses interface DisseminationValue as DisseminationValue45; uses interface DisseminationUpdate as DisseminationUpdate46; uses interface DisseminationValue as DisseminationValue46; uses interface DisseminationUpdate as DisseminationUpdate47; uses interface DisseminationValue as DisseminationValue47; uses interface DisseminationUpdate as DisseminationUpdate48; uses interface DisseminationValue as DisseminationValue48; uses interface DisseminationUpdate as DisseminationUpdate49; uses interface DisseminationValue as DisseminationValue49; uses interface DisseminationUpdate as DisseminationUpdate50; uses interface DisseminationValue as DisseminationValue50; uses interface DisseminationUpdate as DisseminationUpdate51; uses interface DisseminationValue as DisseminationValue51; uses interface DisseminationUpdate as DisseminationUpdate52; uses interface DisseminationValue as DisseminationValue52; uses interface DisseminationUpdate as DisseminationUpdate53; uses interface DisseminationValue as DisseminationValue53; uses interface DisseminationUpdate as DisseminationUpdate54; uses interface DisseminationValue as DisseminationValue54; uses interface DisseminationUpdate as DisseminationUpdate55; uses interface DisseminationValue as DisseminationValue55; uses interface DisseminationUpdate as DisseminationUpdate56; uses interface DisseminationValue as DisseminationValue56; uses interface DisseminationUpdate as DisseminationUpdate57; uses interface DisseminationValue as DisseminationValue57; uses interface DisseminationUpdate as DisseminationUpdate58; uses interface DisseminationValue as DisseminationValue58; uses interface DisseminationUpdate as DisseminationUpdate59; uses interface DisseminationValue as DisseminationValue59; uses interface DisseminationUpdate as DisseminationUpdate60; uses interface DisseminationValue as DisseminationValue60; uses interface DisseminationUpdate as DisseminationUpdate61; uses interface DisseminationValue as DisseminationValue61; uses interface DisseminationUpdate as DisseminationUpdate62; uses interface DisseminationValue as DisseminationValue62; uses interface DisseminationUpdate as DisseminationUpdate63; uses interface DisseminationValue as DisseminationValue63; uses interface DisseminationUpdate as DisseminationUpdate64; uses interface DisseminationValue as DisseminationValue64; uses interface Boot; uses interface AMSend as SerialSend; uses interface SplitControl as SerialControl; } implementation { typedef nx_struct dhv_test_msg_t { nx_am_addr_t id; nx_uint8_t count; nx_uint8_t isOk; } dhv_test_msg_t; message_t testMsg; uint8_t okBit = 1; uint16_t data; uint8_t count = 0; /* uint8_t newCount = N; */ uint8_t newCount = 8; void bookkeep(); event void SerialControl.startDone(error_t err) { call StdControl.start(); if(TOS_NODE_ID == 1) { data = 0xBEEF; dbg("TestDhvP","Updating data items\n"); /* call DisseminationUpdate1.change(&data); */ call DisseminationUpdate18.change(&data); call DisseminationUpdate61.change(&data); call DisseminationUpdate21.change(&data); call DisseminationUpdate53.change(&data); call DisseminationUpdate17.change(&data); call DisseminationUpdate19.change(&data); call DisseminationUpdate11.change(&data); call DisseminationUpdate36.change(&data); } } event void SerialControl.stopDone(error_t err) { } event void Boot.booted() { call SerialControl.start(); dbg("TestDhvP", "Booted at %s\n", sim_time_string()); } /* event void DisseminationValue1.changed() { uint16_t val = *(uint16_t*) call DisseminationValue1.get(); if(val != 0xBEEF) { return; } bookkeep(); } */ event void DisseminationValue1.changed() { uint16_t val = *(uint16_t*) call DisseminationValue1.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue2.changed() { uint16_t val = *(uint16_t*) call DisseminationValue2.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue3.changed() { uint16_t val = *(uint16_t*) call DisseminationValue3.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue4.changed() { uint16_t val = *(uint16_t*) call DisseminationValue4.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue5.changed() { uint16_t val = *(uint16_t*) call DisseminationValue5.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue6.changed() { uint16_t val = *(uint16_t*) call DisseminationValue6.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue7.changed() { uint16_t val = *(uint16_t*) call DisseminationValue7.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue8.changed() { uint16_t val = *(uint16_t*) call DisseminationValue8.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue9.changed() { uint16_t val = *(uint16_t*) call DisseminationValue9.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue10.changed() { uint16_t val = *(uint16_t*) call DisseminationValue10.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue11.changed() { uint16_t val = *(uint16_t*) call DisseminationValue11.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue12.changed() { uint16_t val = *(uint16_t*) call DisseminationValue12.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue13.changed() { uint16_t val = *(uint16_t*) call DisseminationValue13.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue14.changed() { uint16_t val = *(uint16_t*) call DisseminationValue14.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue15.changed() { uint16_t val = *(uint16_t*) call DisseminationValue15.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue16.changed() { uint16_t val = *(uint16_t*) call DisseminationValue16.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue17.changed() { uint16_t val = *(uint16_t*) call DisseminationValue17.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue18.changed() { uint16_t val = *(uint16_t*) call DisseminationValue18.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue19.changed() { uint16_t val = *(uint16_t*) call DisseminationValue19.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue20.changed() { uint16_t val = *(uint16_t*) call DisseminationValue20.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue21.changed() { uint16_t val = *(uint16_t*) call DisseminationValue21.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue22.changed() { uint16_t val = *(uint16_t*) call DisseminationValue22.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue23.changed() { uint16_t val = *(uint16_t*) call DisseminationValue23.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue24.changed() { uint16_t val = *(uint16_t*) call DisseminationValue24.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue25.changed() { uint16_t val = *(uint16_t*) call DisseminationValue25.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue26.changed() { uint16_t val = *(uint16_t*) call DisseminationValue26.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue27.changed() { uint16_t val = *(uint16_t*) call DisseminationValue27.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue28.changed() { uint16_t val = *(uint16_t*) call DisseminationValue28.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue29.changed() { uint16_t val = *(uint16_t*) call DisseminationValue29.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue30.changed() { uint16_t val = *(uint16_t*) call DisseminationValue30.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue31.changed() { uint16_t val = *(uint16_t*) call DisseminationValue31.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue32.changed() { uint16_t val = *(uint16_t*) call DisseminationValue32.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue33.changed() { uint16_t val = *(uint16_t*) call DisseminationValue33.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue34.changed() { uint16_t val = *(uint16_t*) call DisseminationValue34.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue35.changed() { uint16_t val = *(uint16_t*) call DisseminationValue35.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue36.changed() { uint16_t val = *(uint16_t*) call DisseminationValue36.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue37.changed() { uint16_t val = *(uint16_t*) call DisseminationValue37.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue38.changed() { uint16_t val = *(uint16_t*) call DisseminationValue38.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue39.changed() { uint16_t val = *(uint16_t*) call DisseminationValue39.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue40.changed() { uint16_t val = *(uint16_t*) call DisseminationValue40.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue41.changed() { uint16_t val = *(uint16_t*) call DisseminationValue41.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue42.changed() { uint16_t val = *(uint16_t*) call DisseminationValue42.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue43.changed() { uint16_t val = *(uint16_t*) call DisseminationValue43.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue44.changed() { uint16_t val = *(uint16_t*) call DisseminationValue44.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue45.changed() { uint16_t val = *(uint16_t*) call DisseminationValue45.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue46.changed() { uint16_t val = *(uint16_t*) call DisseminationValue46.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue47.changed() { uint16_t val = *(uint16_t*) call DisseminationValue47.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue48.changed() { uint16_t val = *(uint16_t*) call DisseminationValue48.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue49.changed() { uint16_t val = *(uint16_t*) call DisseminationValue49.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue50.changed() { uint16_t val = *(uint16_t*) call DisseminationValue50.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue51.changed() { uint16_t val = *(uint16_t*) call DisseminationValue51.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue52.changed() { uint16_t val = *(uint16_t*) call DisseminationValue52.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue53.changed() { uint16_t val = *(uint16_t*) call DisseminationValue53.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue54.changed() { uint16_t val = *(uint16_t*) call DisseminationValue54.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue55.changed() { uint16_t val = *(uint16_t*) call DisseminationValue55.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue56.changed() { uint16_t val = *(uint16_t*) call DisseminationValue56.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue57.changed() { uint16_t val = *(uint16_t*) call DisseminationValue57.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue58.changed() { uint16_t val = *(uint16_t*) call DisseminationValue58.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue59.changed() { uint16_t val = *(uint16_t*) call DisseminationValue59.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue60.changed() { uint16_t val = *(uint16_t*) call DisseminationValue60.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue61.changed() { uint16_t val = *(uint16_t*) call DisseminationValue61.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue62.changed() { uint16_t val = *(uint16_t*) call DisseminationValue62.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue63.changed() { uint16_t val = *(uint16_t*) call DisseminationValue63.get(); if(val != 0xBEEF) { return; } bookkeep(); } event void DisseminationValue64.changed() { uint16_t val = *(uint16_t*) call DisseminationValue64.get(); if(val != 0xBEEF) { return; } bookkeep(); } void bookkeep() { dhv_test_msg_t* dhvTestMsgPtr; if(count < newCount) { count++; } dbg("TestDhvP", "Got an update, %u complete now at %s\n", count, sim_time_string()); call Leds.led0Toggle(); dhvTestMsgPtr = (dhv_test_msg_t*) call SerialSend.getPayload(&testMsg, 0); dhvTestMsgPtr->id = TOS_NODE_ID; dhvTestMsgPtr->count = count; dhvTestMsgPtr->isOk = okBit; call SerialSend.send(0, &testMsg, sizeof(dhv_test_msg_t)); if(newCount == count) { dbg("TestDhvP","Dissemination COMPLETE!\n"); call Leds.set(7); } } event void SerialSend.sendDone(message_t* message, error_t err) { } } tinyos-2.1.2+dfsg/apps/tests/TestDhv/gentest.py000066400000000000000000000041271207233610700214760ustar00rootroot00000000000000#!/usr/bin/python import sys import re import os import random print "Usage: python gentest.py [numitems] [newitems]" items = sys.argv[1] newitems = sys.argv[2] print "Generating Configurations" fin = open("TestDhvC-Master.nc", "r") fout = open("TestDhvC.nc", "w") lines = fin.readlines() for line in lines: if(line.find("... DISSEMINATORS") != -1): for i in range(1, int(items)+1): fout.write(" components new DisseminatorC(uint16_t, ") fout.write(str(i)) fout.write(") as Dissem" + str(i) + ";\n") fout.write(" TestDhvP.DisseminationUpdate" + str(i)) fout.write(" -> Dissem" + str(i) + ";\n") fout.write(" TestDhvP.DisseminationValue" + str(i)) fout.write(" -> Dissem" + str(i) + ";\n\n") else: fout.write(line) fin.close() fout.close() print "Generating Modules" fin = open("TestDhvP-Master.nc", "r") fout = open("TestDhvP.nc", "w") lines = fin.readlines() for line in lines: if(line.find("... INTERFACES") != -1): for i in range(1, int(items)+1): fout.write(" uses interface DisseminationUpdate as DisseminationUpdate") fout.write(str(i) + ";\n") fout.write(" uses interface DisseminationValue as DisseminationValue") fout.write(str(i) + ";\n\n") elif(line.find("... NEWCOUNT") != -1): fout.write(" uint8_t newCount = " + str(newitems) + ";\n") elif(line.find("... CHANGES") != -1): for i in random.sample(range(1, int(items)+1), int(newitems)): fout.write(" call DisseminationUpdate" + str(i) + ".change(&data);\n") elif(line.find("... EVENTS") != -1): for i in range(1, int(items)+1): fout.write(" event void DisseminationValue" + str(i)) fout.write(".changed() {\n") fout.write(" uint16_t val = *(uint16_t*) call DisseminationValue" + str(i) + ".get();\n") fout.write(" if(val != 0xBEEF) { return; }\n") fout.write(" bookkeep();\n") fout.write(" }\n\n") else: fout.write(line) tinyos-2.1.2+dfsg/apps/tests/TestDip/000077500000000000000000000000001207233610700174425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestDip/DipInject.java000066400000000000000000000036371207233610700221670ustar00rootroot00000000000000 import java.io.*; import net.tinyos.message.*; import net.tinyos.util.*; public class DipInject implements MessageListener { MoteIF mote; DipInject(DipMsg dipmsg) { mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(dipmsg, this); } public synchronized void messageReceived(int dest_addr, Message message) { // do nothing for now } void sendDipDataMsg(int key, long version, short[] data) { int totalsize = DipMsg.DEFAULT_MESSAGE_SIZE + DipDataMsg.DEFAULT_MESSAGE_SIZE + DipData.DEFAULT_MESSAGE_SIZE; DipMsg dm = new DipMsg(totalsize); dm.set_type((short)3); DipDataMsg ddm = new DipDataMsg(dm, DipMsg.DEFAULT_MESSAGE_SIZE); ddm.set_key(key); ddm.set_version(version << 16); ddm.set_size((short)data.length); DipData dd = new DipData(ddm, DipDataMsg.DEFAULT_MESSAGE_SIZE); dd.set_data(data); try { mote.send(MoteIF.TOS_BCAST_ADDR, dd); } catch(IOException e) { System.err.println("Cannot send message"); } } public static void main(String args[]) { int i; System.out.println("Usage: java DipInject [key] [version] [hex data delimit space in quotes]"); int k = Integer.parseInt(args[0], 16); long v = Long.parseLong(args[1]); String hexdata[] = args[2].split(" "); short d[]; if(hexdata.length > 16) { System.err.println("Data too long, keep it <= 16 bytes please"); } d = new short[hexdata.length]; for(i = 0; i < d.length; i++) d[i] = Short.parseShort(hexdata[i], 16); System.out.println("Key: " + k); System.out.println("Version: " + v); System.out.print("Data: "); for(i = 0; i < d.length; i++) { System.out.print(d[i] + " "); } System.out.println(); DipInject dipinject = new DipInject(new DipMsg()); dipinject.sendDipDataMsg(k, v, d); } }tinyos-2.1.2+dfsg/apps/tests/TestDip/Makefile000066400000000000000000000034301207233610700211020ustar00rootroot00000000000000COMPONENT=TestDipC BUILD_EXTRA_DEPS = DipMsg.py DipDataMsg.py DipMsg.class DipDataMsg.class DipData.class DipInject.class CFLAGS += -I$(TOSDIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net/dip -I$(TOSDIR)/lib/net/dip/interfaces #CFLAGS += -I$(TOSDIR)/lib/net/drip CONSTANTS += -DTOSH_DATA_LENGTH=32 #CONSTANTS += -DDIP_JOINTEST CFLAGS += $(CONSTANTS) # LPL FLAGS #CFLAGS += -DLOW_POWER_LISTENING #CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512 #CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512 #CFLAGS += -DDELAY_AFTER_RECEIVE=20 CLEAN_EXTRA += DipMsg.py DipDataMsg.py DipData.py DipMsg.java DipDataMsg.java DipData.java DipMsg.class DipDataMsg.class DipData.class DipInject.class DipMsg.py: mig python -target=$(PLATFORM) -python-classname=DipMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_msg -o $@ DipDataMsg.py: mig python -target=$(PLATFORM) -python-classname=DipDataMsg -python-extends=DipMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_data_msg -o $@ DipData.py: mig python -target=$(PLATFORM) -python-classname=DipData -python-extends=DipDataMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_data -o $@ DipMsg.class: DipMsg.java javac -target 1.4 -source 1.4 DipMsg.java DipDataMsg.class: DipDataMsg.java javac -target 1.4 -source 1.4 DipDataMsg.java DipData.class: DipData.java javac -target 1.4 -source 1.4 DipData.java DipMsg.java: mig java -target=$(PLATFORM) -java-classname=DipMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_msg -o $@ DipDataMsg.java: mig java -target=$(PLATFORM) -java-classname=DipDataMsg -java-extends=DipMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_data_msg -o $@ DipData.java: mig java -target=$(PLATFORM) -java-classname=DipData -java-extends=DipDataMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_data -o $@ DipInject.class: javac -target 1.4 -source 1.4 DipInject.java include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestDip/README000066400000000000000000000045601207233610700203270ustar00rootroot00000000000000 Title: TestDip Application Author: Kaisen Lin (kaisenl@cs.ucsd.edu) 1. SETTING UP THE TEST You need to first generate the code for compilation. The gentest.py script reads in the Master files and creates TestDipC.nc (the configuration) and TestDipP.nc (the module). It takes two parameters, the total number of items and the number of new items. The items that are random are chosen randomly. If you want 128 total items in the dissemination set, where 96 of those 128 items are new, you would type: python gentest.py 128 96 After the configuration and module have been generated, you can use the normal compilation method (e.g. make telosb). 2, READING THE LEDS When an node receives a new item, it toggles LED0. When a node completes all items, it turns all LEDs on. 3. SERIAL MESSAGES typedef nx_struct dip_test_msg_t { nx_am_addr_t id; nx_uint8_t count; nx_uint8_t isOk; } dip_test_msg_t; When a node receives a new item, it sends a dip_test_msg_t through the serial interface. id is the node id count is how many new items it has received so far isOk will be true if the data value was as expected 4. PACKET INJECTOR You can also use the injector to send data packets via a basestation. The syntax to do that is: java DipInject [key] [version] [data in quotes delimited by space] key is the data key in hexadecimal version is the version number in decimal data is the actual data in quotes delimited by space For example, if you want to send key 10, version 2, and data "ab cd ef". You would type: java DipInject 0a 2 "ab cd ef" For this specific test application, your data needs to be "ef be". You will need a SerialForwarder running for this work. 5. TIMING With a single sender and single receiver on a table using TelosB nodes, it takes approximately: 3.5 minutes for a node to receive 128 out of 128 items. 4.0 minutes for a node to receive 240 out of 240 items. With a single sender and two receivers on Mirage MicaZ nodes, it takes approximately: 2 minutes for both nodes to receive 96 out of 96 items. With 128 items or more, MicaZ nodes don't receive anything. Memory limitation? 6. BASESTATION If you are using the Basestation application to sniff what packets are being sent in the air, you will need to adjust the packet size to match the test application. You can add the following to your Makefile: CFLAGS += -DTOSH_DATA_LENGTH=XX where XX is your payload size tinyos-2.1.2+dfsg/apps/tests/TestDip/TestDip.h000066400000000000000000000001231207233610700211630ustar00rootroot00000000000000#ifndef __TESTDIP_H__ #define __TESTDIP_H__ enum { AM_TESTDIP = 0xAB }; #endif tinyos-2.1.2+dfsg/apps/tests/TestDip/TestDipC-Master.nc000066400000000000000000000012611207233610700226740ustar00rootroot00000000000000#include "TestDip.h" configuration TestDipC { } implementation { components TestDipP; components LedsC as LedsC; TestDipP.Leds -> LedsC; components DisseminationC; TestDipP.StdControl -> DisseminationC; /* components new DisseminatorC(uint32_t, 0x1) as Dissem1; TestDipP.DisseminationValue1 -> Dissem1; TestDipP.DisseminationUpdate1 -> Dissem1; */ // ... DISSEMINATORS components MainC; TestDipP.Boot -> MainC; components SerialActiveMessageC; components new SerialAMSenderC(AM_TESTDIP); TestDipP.SerialSend -> SerialAMSenderC; TestDipP.SerialControl -> SerialActiveMessageC; components ActiveMessageC; TestDipP.AMControl -> ActiveMessageC; } tinyos-2.1.2+dfsg/apps/tests/TestDip/TestDipP-Master.nc000066400000000000000000000043641207233610700227200ustar00rootroot00000000000000 module TestDipP { uses interface Leds; uses interface StdControl; /* uses interface DisseminationUpdate as DisseminationUpdate1; uses interface DisseminationValue as DisseminationValue1; */ // ... INTERFACES uses interface Boot; uses interface AMSend as SerialSend; uses interface SplitControl as SerialControl; uses interface SplitControl as AMControl; } implementation { typedef nx_struct dip_test_msg_t { nx_am_addr_t id; nx_uint8_t count; nx_uint8_t isOk; } dip_test_msg_t; message_t testMsg; uint8_t okBit = 1; uint16_t data; uint8_t count = 0; /* uint8_t newCount = N; */ // ... NEWCOUNT void bookkeep(); event void SerialControl.startDone(error_t err) { if(err != SUCCESS) { call SerialControl.start(); return; } call AMControl.start(); } event void AMControl.startDone(error_t err) { if(err != SUCCESS) { call AMControl.start(); return; } call StdControl.start(); if(TOS_NODE_ID == 1) { data = 0xBEEF; dbg("TestDipP","Updating data items\n"); /* call DisseminationUpdate1.change(&data); */ // ... CHANGES } } event void SerialControl.stopDone(error_t err) { } event void AMControl.stopDone(error_t err) { } event void Boot.booted() { call SerialControl.start(); dbg("TestDipP", "Booted at %s\n", sim_time_string()); } /* event void DisseminationValue1.changed() { uint16_t val = *(uint16_t*) call DisseminationValue1.get(); if(val != 0xBEEF) { return; } bookkeep(); } */ // ... EVENTS void bookkeep() { dip_test_msg_t* dipTestMsgPtr; if(count < newCount) { count++; } dbg("TestDipP", "Got an update, %u complete now at %s\n", count, sim_time_string()); call Leds.led0Toggle(); dipTestMsgPtr = (dip_test_msg_t*) call SerialSend.getPayload(&testMsg, 0); dipTestMsgPtr->id = TOS_NODE_ID; dipTestMsgPtr->count = count; dipTestMsgPtr->isOk = okBit; call SerialSend.send(0, &testMsg, sizeof(dip_test_msg_t)); if(newCount == count) { dbg("TestDipP","Dissemination COMPLETE!\n"); call Leds.set(7); } } event void SerialSend.sendDone(message_t* message, error_t err) { } } tinyos-2.1.2+dfsg/apps/tests/TestDip/gentest.py000066400000000000000000000041271207233610700214710ustar00rootroot00000000000000#!/usr/bin/python import sys import re import os import random print "Usage: python gentest.py [numitems] [newitems]" items = sys.argv[1] newitems = sys.argv[2] print "Generating Configurations" fin = open("TestDipC-Master.nc", "r") fout = open("TestDipC.nc", "w") lines = fin.readlines() for line in lines: if(line.find("... DISSEMINATORS") != -1): for i in range(1, int(items)+1): fout.write(" components new DisseminatorC(uint16_t, ") fout.write(str(i)) fout.write(") as Dissem" + str(i) + ";\n") fout.write(" TestDipP.DisseminationUpdate" + str(i)) fout.write(" -> Dissem" + str(i) + ";\n") fout.write(" TestDipP.DisseminationValue" + str(i)) fout.write(" -> Dissem" + str(i) + ";\n\n") else: fout.write(line) fin.close() fout.close() print "Generating Modules" fin = open("TestDipP-Master.nc", "r") fout = open("TestDipP.nc", "w") lines = fin.readlines() for line in lines: if(line.find("... INTERFACES") != -1): for i in range(1, int(items)+1): fout.write(" uses interface DisseminationUpdate as DisseminationUpdate") fout.write(str(i) + ";\n") fout.write(" uses interface DisseminationValue as DisseminationValue") fout.write(str(i) + ";\n\n") elif(line.find("... NEWCOUNT") != -1): fout.write(" uint8_t newCount = " + str(newitems) + ";\n") elif(line.find("... CHANGES") != -1): for i in random.sample(range(1, int(items)+1), int(newitems)): fout.write(" call DisseminationUpdate" + str(i) + ".change(&data);\n") elif(line.find("... EVENTS") != -1): for i in range(1, int(items)+1): fout.write(" event void DisseminationValue" + str(i)) fout.write(".changed() {\n") fout.write(" uint16_t val = *(uint16_t*) call DisseminationValue" + str(i) + ".get();\n") fout.write(" if(val != 0xBEEF) { return; }\n") fout.write(" bookkeep();\n") fout.write(" }\n\n") else: fout.write(line) tinyos-2.1.2+dfsg/apps/tests/TestDissemination/000077500000000000000000000000001207233610700215345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestDissemination/Makefile000066400000000000000000000004511207233610700231740ustar00rootroot00000000000000COMPONENT=TestDisseminationAppC ### For Drip: CFLAGS += -I$(TOSDIR)/lib/net -I%T/lib/net/drip ### For DIP: #CFLAGS += -I$(TOSDIR)/lib/net -I%T/lib/net/dip -I%T/lib/net/dip/interfaces ### For Dhv #CFLAGS += -I$(TOSDIR)/lib/net -I%T/lib/net/dhv -I%T/lib/net/dhv/interfaces include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestDissemination/README.txt000066400000000000000000000013551207233610700232360ustar00rootroot00000000000000README for TestDisseminationAppC This application will disseminate 2 constant data objects to all nodes every 20 seconds. Nodes whose TOS_NODE_ID mod 4 equals 1 will act as disseminators, and all others will act as receivers. Every 20 seconds: * The disseminator toggles its led0 and led1. Sim debugging msg: Timer fired. * The disseminator sends a new 32-bit value and a new 16-bit value. * When a receiver receives the correct 32-bit value, it toggles led0. Sim debugging msg: Received new correct 32-bit value * When a receiver receives the correct 16-bit value, it toggles led1. Sim debugging msg: Received new correct 16-bit value Thus, in a successful test, you should see all nodes toggling both led0 and led1 roughly in unison. tinyos-2.1.2+dfsg/apps/tests/TestDissemination/TestDisseminationAppC.nc000066400000000000000000000056441207233610700263010ustar00rootroot00000000000000/* * Copyright (c) 2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * TestDisseminationAppC exercises the dissemination layer, by causing * the node with ID 1 to inject 2 new values into the network every 4 * seconds. For the 32-bit object with key 0x1234, node 1 toggles LED * 0 when it sends, and every other node toggles LED 0 when it * receives the correct value. For the 16-bit object with key 0x2345, * node 1 toggles LED 1 when it sends, and every other node toggles * LED 1 when it receives the correct value. * * See TEP118 - Dissemination for details. * * @author Gilman Tolle * @version $Revision: 1.6 $ $Date: 2007-04-18 04:02:06 $ */ configuration TestDisseminationAppC {} implementation { components TestDisseminationC; components MainC; TestDisseminationC.Boot -> MainC; components ActiveMessageC; TestDisseminationC.RadioControl -> ActiveMessageC; components DisseminationC; TestDisseminationC.DisseminationControl -> DisseminationC; components new DisseminatorC(uint32_t, 0x1234) as Object32C; TestDisseminationC.Value32 -> Object32C; TestDisseminationC.Update32 -> Object32C; components new DisseminatorC(uint16_t, 0x2345) as Object16C; TestDisseminationC.Value16 -> Object16C; TestDisseminationC.Update16 -> Object16C; components LedsC; TestDisseminationC.Leds -> LedsC; components new TimerMilliC(); TestDisseminationC.Timer -> TimerMilliC; } tinyos-2.1.2+dfsg/apps/tests/TestDissemination/TestDisseminationC.nc000066400000000000000000000106331207233610700256320ustar00rootroot00000000000000#include /* * Copyright (c) 2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * TestDisseminationC exercises the dissemination layer, by causing * the node with ID 1 to inject 2 new values into the network every 4 * seconds. For the 32-bit object with key 0x1234, node 1 toggles LED * 0 when it sends, and every other node toggles LED 0 when it * receives the correct value. For the 16-bit object with key 0x2345, * node 1 toggles LED 1 when it sends, and every other node toggles * LED 1 when it receives the correct value. * * See TEP118 - Dissemination for details. * * @author Gilman Tolle * @version $Revision: 1.6 $ $Date: 2007-04-18 04:02:06 $ */ module TestDisseminationC { uses interface Boot; uses interface SplitControl as RadioControl; uses interface StdControl as DisseminationControl; uses interface DisseminationValue as Value32; uses interface DisseminationUpdate as Update32; uses interface DisseminationValue as Value16; uses interface DisseminationUpdate as Update16; uses interface Leds; uses interface Timer; } implementation { event void Boot.booted() { uint32_t initialVal32 = 123456; uint16_t initialVal16 = 1234; call Value32.set( &initialVal32 ); call Value16.set( &initialVal16 ); call RadioControl.start(); } event void RadioControl.startDone( error_t result ) { if ( result != SUCCESS ) { call RadioControl.start(); } else { call DisseminationControl.start(); if ( TOS_NODE_ID % 4 == 1 ) { call Timer.startPeriodic( 1024 * 20 ); } else { call Timer.startPeriodic( 1024 ); } } } event void RadioControl.stopDone( error_t result ) { } event void Timer.fired() { uint32_t newVal32 = 0xDEADBEEF; uint16_t newVal16 = 0xABCD; if ( TOS_NODE_ID % 4 == 1 ) { call Leds.led0Toggle(); call Leds.led1Toggle(); call Update32.change( &newVal32 ); call Update16.change( &newVal16 ); dbg("TestDisseminationC", "TestDisseminationC: Timer fired.\n"); } else { const uint32_t* newVal = call Value32.get(); if ( *newVal == 123456 ) { call Leds.led2Toggle(); } } } event void Value32.changed() { const uint32_t* newVal = call Value32.get(); if ( *newVal == 0xDEADBEEF ) { call Leds.led0Toggle(); dbg("TestDisseminationC", "Received new correct 32-bit value @ %s.\n", sim_time_string()); } else { dbg("TestDisseminationC", "Received new incorrect 32-bit value.\n"); } } event void Value16.changed() { const uint16_t* newVal = call Value16.get(); if ( *newVal == 0xABCD ) { call Leds.led1Toggle(); dbg("TestDisseminationC", "Received new correct 16-bit value @ %s.\n", sim_time_string()); } else { dbg("TestDisseminationC", "Received new incorrect 16-bit value: 0x%hx\n", *newVal); } } } tinyos-2.1.2+dfsg/apps/tests/TestDissemination/test.py000066400000000000000000000023621207233610700230700ustar00rootroot00000000000000# This script is a simple TOSSIM test of dissemination. # It builds a 15x15 grid of nodes and has nodes start # disseminating two values (based on the TinyOS app). # It prints out when nodes receive new values, including # the dissemination key and sequence number. You should # be able to see how the implementation can resolve # multiple concurrent changes within the network as # well as more than one value being updated at a time. import TOSSIM import sys t = TOSSIM.Tossim([]) m = t.mac(); r = t.radio(); t.init() #t.addChannel("LedsC", sys.stdout); #t.addChannel("AM", sys.stdout); #t.addChannel("TestDisseminationC", sys.stdout); t.addChannel("Dissemination", sys.stdout) t.addChannel("TestDisseminationC", sys.stdout) #t.addChannel("Gain", sys.stdout); #t.addChannel("TossimPacketModelC", sys.stdout); print (dir(TOSSIM.Tossim)) f = open("topo.txt", "r") lines = f.readlines() for line in lines: s = line.split() if (len(s) > 0): if (s[0] == "gain"): r.add(int(s[1]), int(s[2]), float(s[3])) for i in range(0, 225): m = t.getNode(i); for j in range (0, 100): m.addNoiseTraceReading(-105) m.createNoiseModel() m.bootAtTime((t.ticksPerSecond() / 50) * i + 43); while (t.time() / t.ticksPerSecond() < 600): t.runNextEvent() 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tinyos-2.1.2+dfsg/apps/tests/TestEui/000077500000000000000000000000001207233610700174505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestEui/Makefile000066400000000000000000000001151207233610700211050ustar00rootroot00000000000000COMPONENT=TestEuiAppC CFLAGS += -I$(TOSDIR)/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestEui/README.txt000066400000000000000000000007361207233610700211540ustar00rootroot00000000000000$Id: README.txt,v 1.1 2008-10-31 17:01:31 sallai Exp $ README for TestEui Author/Contact: tinyos-help@millennium.berkeley.edu Description: The TestEui application prints out the IEEE EUI64 of the device periodically using printf. Currently supported platforms: iris. Tools: net.tinyos.tools.PrintfClient is a Java application that displays the output on the PC. Usage: java net.tinyos.tools.PrintfClient -comm serial@: Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/TestEui/TestEuiAppC.nc000066400000000000000000000040641207233610700221240ustar00rootroot00000000000000// $Id: TestEuiAppC.nc,v 1.2 2010-06-29 22:07:22 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #include "printf.h" /** * This application reads the 64-bit EUI of the device at initialization time * and then periodically prints it out using printf. * */ configuration TestEuiAppC{} implementation { components MainC, TestEuiC, LedsC, LocalIeeeEui64C, new TimerMilliC(); MainC.Boot <- TestEuiC; TestEuiC.Timer -> TimerMilliC; TestEuiC -> LedsC.Leds; TestEuiC.LocalIeeeEui64 -> LocalIeeeEui64C; } tinyos-2.1.2+dfsg/apps/tests/TestEui/TestEuiC.nc000066400000000000000000000044401207233610700214610ustar00rootroot00000000000000// $Id: TestEuiC.nc,v 1.2 2010-06-29 22:07:23 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * This application reads the 64-bit EUI of the device at initialization time * and then periodically, and prints it out using printf. * */ module TestEuiC { uses interface Boot; uses interface Timer; uses interface Leds; uses interface LocalIeeeEui64; } implementation { void print() { } event void Boot.booted() { call Timer.startPeriodic(1000); } event void Timer.fired() { int i; ieee_eui64_t id; call Leds.led0Toggle(); id = call LocalIeeeEui64.getId(); printf("IEEE 64-bit UID: "); for(i=0;i<8;i++) { printf("%d ", id.data[i]); } printf("\n"); printfflush(); } } tinyos-2.1.2+dfsg/apps/tests/TestFtsp/000077500000000000000000000000001207233610700176425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/000077500000000000000000000000001207233610700205565ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/FtspDataAnalyzer.m000077500000000000000000000034261207233610700241600ustar00rootroot00000000000000%load file written out by FtspDataLogger.java class %arg0 - filename, e.g. '1205543689171.report' function FTSPDataAnalyzer(file, varargin) [c1 c2 c3 c4 c5]= textread(file, '%u %u %u %u %u', 'commentstyle', 'shell'); data = [c2 c3 c4 c5]; %skipping the first column (java time) data1 = sortrows(sortrows(data,1),2); newdata = []; row=1; newrow=1; unsynced=0; while (row<=size(data1,1)) seqnum=data1(row,2); data2=[]; row2=1; tmprow1=row; while (row <= size(data1,1) && data1(row,2)==seqnum) if (data1(row,4)==0) data2(row2,1)=data1(row,3); row2= row2+ 1; else unsynced=unsynced+1; end row = row + 1; end if (row2>1) row2size=row2-1; rcvdsize=row-tmprow1; newdata(newrow,1) = seqnum; newdata(newrow,2) = mad(data2(1:row2size,1)); newdata(newrow,3) = mean(data2(1:row2size,1)); newdata(newrow,4) = row2size/rcvdsize; newrow = newrow + 1; end end if (length(newdata)==0) disp('no data found (at least one data point from a synchronized mote is required)!'); else newsize=newrow-1; subplot(3,1,1); plot(newdata(1:newsize,1),newdata(1:newsize,2)); title(sprintf('TimeSync Errors')); subplot(3,1,2); plot(newdata(1:newsize,1),newdata(1:newsize,3)); title(sprintf('Avg Glob Time')); subplot(3,1,3); plot(newdata(1:newsize,1),newdata(1:newsize,4),'b-'); title(sprintf('%% Synced Motes')); disp(sprintf('total unsycned num %d (all %d)',unsynced,newsize)); disp(sprintf('avg %0.3f',mean(newdata(1:newsize,2)))); disp(sprintf('max %d',max(newdata(1:newsize,2)))); savedata = newdata(1:newsize,:); save data.out savedata -ASCII; end tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/FtspDataLogger.java000077500000000000000000000120771207233610700243010ustar00rootroot00000000000000/* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * @author Brano Kusy */ import java.io.FileOutputStream; import java.io.PrintStream; import net.tinyos.message.*; import net.tinyos.util.*; public class FtspDataLogger implements MessageListener { public class RunWhenShuttingDown extends Thread { public void run() { System.out.println("Control-C caught. Shutting down..."); if (outReport!=null) outReport.close(); } } MoteIF mote; // For talking to the antitheft root node void connect() { try { mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(new TestFtspMsg(), this); System.out.println("Connection ok!"); } catch(Exception e) { e.printStackTrace(); System.exit(2); } } PrintStream outReport = null; public FtspDataLogger() { connect(); Runtime.getRuntime().addShutdownHook(new RunWhenShuttingDown()); String name=""+System.currentTimeMillis(); try { outReport = new PrintStream(new FileOutputStream(name+".report")); outReport.println("#[JAVA_TIME] [NODE_ID] [SEQ_NUM] [GLOB_TIME] [IS_TIME_VALID]"); } catch (Exception e) { System.out.println("FtspDataLogger.FtspDataLogger(): "+e.toString()); } } public void writeReprot(TestFtspMsg tspr) { String foo = (System.currentTimeMillis() +" "+tspr.get_src_addr()+" "+tspr.get_counter() +" "+tspr.get_global_rx_timestamp()+" "+tspr.get_is_synced()); outReport.println(foo); System.out.println(foo); outReport.flush(); } public void writeFullReprot(TestFtspMsg tspr) { String foo = (System.currentTimeMillis() +" "+tspr.get_src_addr() +" "+tspr.get_counter() +" "+tspr.get_local_rx_timestamp() +" "+tspr.get_global_rx_timestamp() +" "+tspr.get_skew_times_1000000() +" "+tspr.get_is_synced() +" "+tspr.get_ftsp_root_addr() +" "+tspr.get_ftsp_seq() +" "+tspr.get_ftsp_table_entries()); outReport.println(foo); System.out.println(foo); outReport.flush(); } public void messageReceived(int dest_addr, Message msg) { if (msg instanceof TestFtspMsg) //writeFullReprot((TestFtspMsg)msg); writeReprot((TestFtspMsg)msg); } /* Just start the app... */ public static void main(String[] args) { new FtspDataLogger(); } }tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/FtspDataLogger.py000077500000000000000000000021411207233610700237770ustar00rootroot00000000000000#!/usr/bin/env python import sys, time import tos AM_TEST_FTSP_MSG = 137 class FtspMsg(tos.Packet): def __init__(self, packet = None): tos.Packet.__init__(self, [('src_addr', 'int', 2), ('counter', 'int', 2), ('local_rx_timestamp', 'int', 4), ('global_rx_timestamp', 'int', 4), ('skew_times_1000000', 'int', 4), ('is_synced', 'int', 1), ('ftsp_root_addr', 'int', 2), ('ftsp_seq', 'int', 1), ('ftsp_table_entries', 'int', 2)], packet) if '-h' in sys.argv: print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600" sys.exit() am = tos.AM() while True: p = am.read() if p and p.type == AM_TEST_FTSP_MSG: msg = FtspMsg(p.data) print int(time.time()), msg.src_addr, msg.counter, msg.global_rx_timestamp, msg.is_synced #print msg tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/Makefile000077500000000000000000000006621207233610700222250ustar00rootroot00000000000000BUILD_EXTRA_DEPS = FtspDataLogger.class CLEAN_EXTRA = *.class TestFtspMsg.java FtspDataLogger.class: TestFtspMsg.java javac *.java TestFtspMsg.java: TestFtsp.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=TestFtspMsg TestFtsp.h test_ftsp_msg -o $@ COMPONENT=TestFtspAppC PFLAGS += -DTIMESYNC_RATE=3 #PFLAGS += -DTIMESYNC_DEBUG PFLAGS += -I$(TOSDIR)/lib/ftsp -I$(TOSDIR)/../apps/RadioCountToLeds include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/README.MATLAB.txt000077500000000000000000000042001207233610700232120ustar00rootroot00000000000000FtspDataAnalyzer.m ------------------------------------------------------------------------------- Author/Contact: --------------- Brano Kusy: branislav.kusy@gmail.com ------------------------------------------------------------------------------- DESCRIPTION: ------------ FtspDataAnalyzer.m works with data logs collected by FtspDataLogger.java and calculates the maximum and average timesync error over time. ------------------------------------------------------------------------------- STEP BY STEP GUIDE TO RUN OUR TEST SCENARIO: -------------------------------------------- 1. program and start motes as described in ./README.txt 2. start SerialForwarder and FtspDataLogger.java as described in ./README.txt 3. 'current_time.report' file (where current_time is a number) is created in ./ this file is updated with data in the real time 4. let the experiment run for some time 5. start matlab and enter (assuming your current_time was 1206126224593) FTSPDataAnalyzer('1206126224593.report') this will plot the mean absolute timesync error, global time, and number of synced motes; this can be done while experiment is running 6. Matlab also creates data.out file which contains data in the following format #seqNum mean_abs_error global_time num_synced_motes mean_abs_error is calculated as mean absolute deviation from the mean (mad) Simulating multi-hop: 1. define TIMESYNC_DEBUG in the Makefile 2. recompile and upload TestFTSP app to n motes with special NODE_IDs: using 'make micaz reinstall.0xAB', nodes 0xAB and 0xCD can communicate iff 2D grid coordinates (A,B) and (C,D) are neighbors in a 2D grid ------------------------------------------------------------------------------- EVALUATION: -------------------------------------------- - deployment setup: 11 nodes in a 5x3 grid using simulated multi-hop (4 points were vacant as we only used 11 nodes). the max number of hops was 5. - parameters: sync period 10sec, polling period 3 sec - experiment length: 100 minutes - results (1 jiffy is ~30.5 us) 1.53 jiffy avg error (~50us) 3.5 jiffy max error (~100us)tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/README.txt000077500000000000000000000073341207233610700222660ustar00rootroot00000000000000TestFtsp ------------------------------------------------------------------------------- Author/Contact: --------------- Brano Kusy: branislav.kusy@gmail.com Janos Sallai: janos.sallai@vanderbilt.edu Miklos Maroti: mmaroti@gmail.com ------------------------------------------------------------------------------- DESCRIPTION: ------------ The TestFtsp application tests the Flooding Time Synchronization Protocol (FTSP) implementation. A network of motes programmed with TestFtsp run the FTSP protocol to time synchronize, and sends to the base station the global reception timestamps of messages broadcast by a dedicated beacon mote programmed with RadioCountToLeds. Ideally, the global reception timestamps of the same RadioCountToLeds message should agree for all TestFtsp motes (with a small synchronization error). ------------------------------------------------------------------------------- SUPPORTED PLATFORMS: -------------------------------------------- The supported platforms are micaz, mulle, telosb, z1 and iris. ------------------------------------------------------------------------------- STEP BY STEP GUIDE TO RUN OUR TEST SCENARIO: -------------------------------------------- - program one mote with apps/RadioCountToLeds - program multiple motes with TestFtsp - program a mote with apps/BaseStation, leave it on the programming board - turn on all the motes - start the FtspDataLogger java application (type "java FtspDataLogger") ------------------------------------------------------------------------------- REPORTED DATA: -------------- The most important reported data is the global time of arrival of the beacons. The beacon msg arrives to all clients at the same time instant, thus reported global times should be the same for all clients for the same sequence number. Each message contains: - the time of message reception by the java app [JAVA_TIME] - the node ID of the mote that is sending this report [NODE_ID] - the sequence number of the RadioCountToLeds message that is increased for each new polling msg [SEQ_NUM] - the global time when the polling message arrived [GLOB_TIME] - a result_t value indicating if the timestamp is valid [IS_TIME_VALID] (a result_t of 0 denotes a valid timestamp) If the application is running correctly, then the output should show reports from the different FTSP nodes with valid timestamps and similar global time values. For example, this is a trace with two FTSP nodes, with IDs 1 and 5: 1214516486569 1 10916 433709 0 1214516486569 5 10916 433709 0 1214516486809 5 10917 433964 0 1214516486809 1 10917 433963 0 1214516487045 5 10918 434210 0 1214516487053 1 10918 434210 0 1214516487285 1 10919 434454 0 1214516487293 5 10919 434455 0 One way to test if FTSP is operating correctly is to turn off one of the FTSP nodes. For a short time, that node's global times will differ significantly and its valid flag will not be 0. For example, this is what it looks like when node 1 in the earlier trace is reset: 1214516490953 5 10934 438208 0 1214516491201 5 10935 438460 0 1214516491441 5 10936 438712 0 1214516491685 5 10937 438964 0 1214516492169 5 10939 439455 0 1214516492417 1 10940 243 1 1214516492421 5 10940 439706 0 1214516492665 5 10941 439960 0 1214516492669 1 10941 497 1 1214516492905 5 10942 440213 0 ... 1214516497541 1 10961 5495 1 1214516497549 5 10961 444958 0 1214516497793 1 10962 5747 1 1214516498025 1 10963 445456 0 1214516498033 5 10963 445455 0 1214516498277 5 10964 445705 0 1214516498285 1 10964 445707 0 1214516498521 1 10965 445964 0 This output is also saved in a file named 'current_timestamp.report'. '.report' files can be used with the FtspDataAnalyzer.m Matlab application. Mean absolute timesync error, global time, and % of synced motes will be plotted. tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/TestFtsp.h000077500000000000000000000041521207233610700225100ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ #ifndef TEST_FTSP_H #define TEST_FTSP_H typedef nx_struct test_ftsp_msg { nx_uint16_t src_addr; nx_uint16_t counter; nx_uint32_t local_rx_timestamp; nx_uint32_t global_rx_timestamp; nx_int32_t skew_times_1000000; nx_uint8_t is_synced; nx_uint16_t ftsp_root_addr; nx_uint8_t ftsp_seq; nx_uint8_t ftsp_table_entries; } test_ftsp_msg_t; enum { AM_TEST_FTSP_MSG = 137 }; #endif tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/TestFtspAppC.nc000077500000000000000000000044511207233610700234270ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ #include "TestFtsp.h" #include "RadioCountToLeds.h" configuration TestFtspAppC { } implementation { components MainC, TimeSyncC; MainC.SoftwareInit -> TimeSyncC; TimeSyncC.Boot -> MainC; components TestFtspC as App; App.Boot -> MainC; components ActiveMessageC; App.RadioControl -> ActiveMessageC; App.Receive -> ActiveMessageC.Receive[AM_RADIO_COUNT_MSG]; App.AMSend -> ActiveMessageC.AMSend[AM_TEST_FTSP_MSG]; App.Packet -> ActiveMessageC; App.PacketTimeStamp -> ActiveMessageC; components LedsC; App.GlobalTime -> TimeSyncC; App.TimeSyncInfo -> TimeSyncC; App.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/TestFtsp/Ftsp/TestFtspC.nc000077500000000000000000000072061207233610700227670ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ #include "TestFtsp.h" #include "RadioCountToLeds.h" module TestFtspC { uses { interface GlobalTime; interface TimeSyncInfo; interface Receive; interface AMSend; interface Packet; interface Leds; interface PacketTimeStamp; interface Boot; interface SplitControl as RadioControl; } } implementation { message_t msg; bool locked = FALSE; event void Boot.booted() { call RadioControl.start(); } event message_t* Receive.receive(message_t* msgPtr, void* payload, uint8_t len) { call Leds.led0Toggle(); if (!locked && call PacketTimeStamp.isValid(msgPtr)) { radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(msgPtr, sizeof(radio_count_msg_t)); test_ftsp_msg_t* report = (test_ftsp_msg_t*)call Packet.getPayload(&msg, sizeof(test_ftsp_msg_t)); uint32_t rxTimestamp = call PacketTimeStamp.timestamp(msgPtr); report->src_addr = TOS_NODE_ID; report->counter = rcm->counter; report->local_rx_timestamp = rxTimestamp; report->is_synced = call GlobalTime.local2Global(&rxTimestamp); report->global_rx_timestamp = rxTimestamp; report->skew_times_1000000 = (uint32_t)call TimeSyncInfo.getSkew()*1000000UL; report->ftsp_root_addr = call TimeSyncInfo.getRootID(); report->ftsp_seq = call TimeSyncInfo.getSeqNum(); report->ftsp_table_entries = call TimeSyncInfo.getNumEntries(); if (call AMSend.send(AM_BROADCAST_ADDR, &msg, sizeof(test_ftsp_msg_t)) == SUCCESS) { locked = TRUE; } } return msgPtr; } event void AMSend.sendDone(message_t* ptr, error_t success) { locked = FALSE; return; } event void RadioControl.startDone(error_t err) {} event void RadioControl.stopDone(error_t error){} } tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLpl/000077500000000000000000000000001207233610700212265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLpl/FtspDataLogger.py000077500000000000000000000021411207233610700244470ustar00rootroot00000000000000#!/usr/bin/env python import sys, time import tos AM_TEST_FTSP_MSG = 137 class FtspMsg(tos.Packet): def __init__(self, packet = None): tos.Packet.__init__(self, [('src_addr', 'int', 2), ('counter', 'int', 2), ('local_rx_timestamp', 'int', 4), ('global_rx_timestamp', 'int', 4), ('skew_times_1000000', 'int', 4), ('is_synced', 'int', 1), ('ftsp_root_addr', 'int', 2), ('ftsp_seq', 'int', 1), ('ftsp_table_entries', 'int', 2)], packet) if '-h' in sys.argv: print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600" sys.exit() am = tos.AM() while True: p = am.read() if p and p.type == AM_TEST_FTSP_MSG: msg = FtspMsg(p.data) print int(time.time()), msg.src_addr, msg.counter, msg.global_rx_timestamp, msg.is_synced #print msg tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLpl/Makefile000077500000000000000000000005571207233610700227000ustar00rootroot00000000000000SENSORBOARD=quantoplus COMPONENT=TestFtspAppC PFLAGS += -DTIMESYNC_RATE=10 #PFLAGS += -DTIMESYNC_DEBUG #PFLAGS += -DCC2420_CHANNEL=26 CFLAGS += -DTOSH_DATA_LENGTH=50 #CFLAGS += -DCOUNT_LOG PFLAGS += -I$(TOSDIR)/lib/ftsp -I$(TOSDIR)/../apps/RadioCountToLeds -I$(TOSDIR)/lib/printf CFLAGS += -DLPL_INTERVAL=200 CFLAGS += -DLOW_POWER_LISTENING include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLpl/README000077500000000000000000000032611207233610700221130ustar00rootroot00000000000000First, program several nodes with this TestFtsp application. In addition, you will need one TinyOS Basestation that listens for messages, and one beacon node. Program the beacon node with the RadioCountToLed application from the TestFtsp32kLplBeaconer directory. This is a special modification of the RadioCountToLed code which allows to evaluate a duty-cycled ftsp network. The regular RadioCountToLed code doesn't work, since a LPL broadcast message gets transmitted more than just once. Thus, there is a disambiguity in which precise broadcast message was actually timestamped by the TestFtsp application. The modifications take care of this by using the TimeSyncAMSend interface and setting an arbitrary event time. Thus, on reception, the TestFtsp code can account for this delayed send. To evaluate the synchronization precision, use the FtspDataLogger.py application. Run the python application like this: python FtspDataLogger.py serial@/dev/ttyUSB:BAUDRATE You should now see messages coming in, one per line. The first value is the current time as a unix timestamp. The last line is a binary value indicating if there was some missed data, and thus the values are not good (indicated by a 1), or if all the nodes are synchronized and we received a value for each and every one of them (indicated by a 0). Note!!!!! - the basestation should also define CFLAGS += -DTOSH_DATA_LENGTH=50 in the makefile. Else, the reports will not fit into 1 tinyos message, and they will get silently dropped. - 32k timesync only works for certain platforms (those that provide 32khz counter), if your platform does not support the counter, LPL still works, but you need to use TMilli timesync tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLpl/TestFtsp.h000077500000000000000000000043001207233610700231530ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ #ifndef TEST_FTSP_H #define TEST_FTSP_H typedef nx_struct test_ftsp_msg { nx_uint16_t src_addr; nx_uint16_t counter; nx_uint32_t local_rx_timestamp; nx_uint32_t global_rx_timestamp; nx_int32_t skew_times_1000000; nx_float skew; nx_uint8_t is_synced; nx_uint16_t ftsp_root_addr; nx_uint8_t ftsp_seq; nx_uint8_t ftsp_table_entries; nx_uint32_t localAverage; nx_int32_t offsetAverage; } test_ftsp_msg_t; enum { AM_TEST_FTSP_MSG = 137 }; #endif tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLpl/TestFtspAppC.nc000077500000000000000000000055431207233610700241020ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) * Adapted for LPL: 6/16/09 by Thomas Schmid (thomas.schmid@ucla.edu) */ #include "TestFtsp.h" #include "RadioCountToLeds.h" configuration TestFtspAppC { } implementation { components MainC, TestFtspC as App; App.Boot -> MainC; components ActiveMessageC; components TimeSyncMessageC; App.RadioControl -> ActiveMessageC; App.Receive -> TimeSyncMessageC.Receive[AM_RADIO_COUNT_MSG]; App.TimeSyncPacket -> TimeSyncMessageC; App.AMSend -> ActiveMessageC.AMSend[AM_TEST_FTSP_MSG]; App.Packet -> ActiveMessageC; App.PacketTimeStamp -> ActiveMessageC; App.LowPowerListening -> ActiveMessageC; components RandomC; App.Random -> RandomC; components new TimerMilliC() as Timer0; App.RandomTimer -> Timer0; components LedsC; #if defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || \ defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_SHIMMER2R) components TimeSync32kC; MainC.SoftwareInit -> TimeSync32kC; TimeSync32kC.Boot -> MainC; App.GlobalTime -> TimeSync32kC; App.TimeSyncInfo -> TimeSync32kC; #else #error "LPL timesync is not available for your platform" #endif App.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLpl/TestFtspC.nc000077500000000000000000000112641207233610700234360ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) * Ported for LPL: Thomas Schmid (thomas.schmid@ucla.edu) */ #include "TestFtsp.h" #include "RadioCountToLeds.h" module TestFtspC { uses { interface GlobalTime; interface TimeSyncInfo; interface Receive; interface AMSend; interface Packet; interface Leds; interface PacketTimeStamp; interface Boot; interface SplitControl as RadioControl; interface Timer as RandomTimer; interface Random; interface TimeSyncPacket; interface LowPowerListening; } } implementation { enum { ACT_TESTFTSP = 0x11, }; message_t msg; bool locked = FALSE; test_ftsp_msg_t* report; event void Boot.booted() { call RadioControl.start(); } event message_t* Receive.receive(message_t* msgPtr, void* payload, uint8_t len) { if (!(call PacketTimeStamp.isValid(msgPtr))){ call Leds.led1Toggle(); } if (!locked && call PacketTimeStamp.isValid(msgPtr)) { radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(msgPtr, sizeof(radio_count_msg_t)); if(call TimeSyncPacket.isValid(msgPtr)) { uint32_t rxTimestamp = call TimeSyncPacket.eventTime(msgPtr); report = (test_ftsp_msg_t*)call Packet.getPayload(&msg, sizeof(test_ftsp_msg_t)); report->src_addr = TOS_NODE_ID; report->counter = rcm->counter; report->local_rx_timestamp = rxTimestamp; report->is_synced = call GlobalTime.local2Global(&rxTimestamp); report->global_rx_timestamp = rxTimestamp; report->skew_times_1000000 = (uint32_t)call TimeSyncInfo.getSkew()*1000000UL; report->skew = call TimeSyncInfo.getSkew(); report->ftsp_root_addr = call TimeSyncInfo.getRootID(); report->ftsp_seq = call TimeSyncInfo.getSeqNum(); report->ftsp_table_entries = call TimeSyncInfo.getNumEntries(); report->localAverage = call TimeSyncInfo.getSyncPoint(); report->offsetAverage = call TimeSyncInfo.getOffset(); locked = TRUE; call RandomTimer.startOneShot(call Random.rand16() % (64)); } } return msgPtr; } event void RandomTimer.fired() { #ifdef LOW_POWER_LISTENING call LowPowerListening.setRemoteWakeupInterval(&msg, LPL_INTERVAL); #endif if(locked && (call AMSend.send(4000, &msg, sizeof(test_ftsp_msg_t)) == SUCCESS)){ call Leds.led2On(); } else { locked = FALSE; } } event void AMSend.sendDone(message_t* ptr, error_t success) { locked = FALSE; call Leds.led2Off(); return; } event void RadioControl.startDone(error_t err) { call LowPowerListening.setLocalWakeupInterval(LPL_INTERVAL); } event void RadioControl.stopDone(error_t error){} } tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLpl/TestFtspMsg.py000077500000000000000000000431121207233610700240270ustar00rootroot00000000000000# # This class is automatically generated by mig. DO NOT EDIT THIS FILE. # This class implements a Python interface to the 'TestFtspMsg' # message type. # import tinyos.message.Message # The default size of this message type in bytes. DEFAULT_MESSAGE_SIZE = 33 # The Active Message type associated with this message. AM_TYPE = 137 class TestFtspMsg(tinyos.message.Message.Message): # Create a new TestFtspMsg of size 33. def __init__(self, data="", addr=None, gid=None, base_offset=0, data_length=33): tinyos.message.Message.Message.__init__(self, data, addr, gid, base_offset, data_length) self.amTypeSet(AM_TYPE) # Get AM_TYPE def get_amType(cls): return AM_TYPE get_amType = classmethod(get_amType) # # Return a String representation of this message. Includes the # message type name and the non-indexed field values. # def __str__(self): s = "Message \n" try: s += " [src_addr=0x%x]\n" % (self.get_src_addr()) except: pass try: s += " [counter=0x%x]\n" % (self.get_counter()) except: pass try: s += " [local_rx_timestamp=0x%x]\n" % (self.get_local_rx_timestamp()) except: pass try: s += " [global_rx_timestamp=0x%x]\n" % (self.get_global_rx_timestamp()) except: pass try: s += " [skew_times_1000000=0x%x]\n" % (self.get_skew_times_1000000()) except: pass try: s += " [skew=0x%x]\n" % (self.get_skew()) except: pass try: s += " [is_synced=0x%x]\n" % (self.get_is_synced()) except: pass try: s += " [ftsp_root_addr=0x%x]\n" % (self.get_ftsp_root_addr()) except: pass try: s += " [ftsp_seq=0x%x]\n" % (self.get_ftsp_seq()) except: pass try: s += " [ftsp_table_entries=0x%x]\n" % (self.get_ftsp_table_entries()) except: pass try: s += " [localAverage=0x%x]\n" % (self.get_localAverage()) except: pass try: s += " [offsetAverage=0x%x]\n" % (self.get_offsetAverage()) except: pass return s # Message-type-specific access methods appear below. # # Accessor methods for field: src_addr # Field type: int # Offset (bits): 0 # Size (bits): 16 # # # Return whether the field 'src_addr' is signed (False). # def isSigned_src_addr(self): return False # # Return whether the field 'src_addr' is an array (False). # def isArray_src_addr(self): return False # # Return the offset (in bytes) of the field 'src_addr' # def offset_src_addr(self): return (0 / 8) # # Return the offset (in bits) of the field 'src_addr' # def offsetBits_src_addr(self): return 0 # # Return the value (as a int) of the field 'src_addr' # def get_src_addr(self): return self.getUIntElement(self.offsetBits_src_addr(), 16, 1) # # Set the value of the field 'src_addr' # def set_src_addr(self, value): self.setUIntElement(self.offsetBits_src_addr(), 16, value, 1) # # Return the size, in bytes, of the field 'src_addr' # def size_src_addr(self): return (16 / 8) # # Return the size, in bits, of the field 'src_addr' # def sizeBits_src_addr(self): return 16 # # Accessor methods for field: counter # Field type: int # Offset (bits): 16 # Size (bits): 16 # # # Return whether the field 'counter' is signed (False). # def isSigned_counter(self): return False # # Return whether the field 'counter' is an array (False). # def isArray_counter(self): return False # # Return the offset (in bytes) of the field 'counter' # def offset_counter(self): return (16 / 8) # # Return the offset (in bits) of the field 'counter' # def offsetBits_counter(self): return 16 # # Return the value (as a int) of the field 'counter' # def get_counter(self): return self.getUIntElement(self.offsetBits_counter(), 16, 1) # # Set the value of the field 'counter' # def set_counter(self, value): self.setUIntElement(self.offsetBits_counter(), 16, value, 1) # # Return the size, in bytes, of the field 'counter' # def size_counter(self): return (16 / 8) # # Return the size, in bits, of the field 'counter' # def sizeBits_counter(self): return 16 # # Accessor methods for field: local_rx_timestamp # Field type: long # Offset (bits): 32 # Size (bits): 32 # # # Return whether the field 'local_rx_timestamp' is signed (False). # def isSigned_local_rx_timestamp(self): return False # # Return whether the field 'local_rx_timestamp' is an array (False). # def isArray_local_rx_timestamp(self): return False # # Return the offset (in bytes) of the field 'local_rx_timestamp' # def offset_local_rx_timestamp(self): return (32 / 8) # # Return the offset (in bits) of the field 'local_rx_timestamp' # def offsetBits_local_rx_timestamp(self): return 32 # # Return the value (as a long) of the field 'local_rx_timestamp' # def get_local_rx_timestamp(self): return self.getUIntElement(self.offsetBits_local_rx_timestamp(), 32, 1) # # Set the value of the field 'local_rx_timestamp' # def set_local_rx_timestamp(self, value): self.setUIntElement(self.offsetBits_local_rx_timestamp(), 32, value, 1) # # Return the size, in bytes, of the field 'local_rx_timestamp' # def size_local_rx_timestamp(self): return (32 / 8) # # Return the size, in bits, of the field 'local_rx_timestamp' # def sizeBits_local_rx_timestamp(self): return 32 # # Accessor methods for field: global_rx_timestamp # Field type: long # Offset (bits): 64 # Size (bits): 32 # # # Return whether the field 'global_rx_timestamp' is signed (False). # def isSigned_global_rx_timestamp(self): return False # # Return whether the field 'global_rx_timestamp' is an array (False). # def isArray_global_rx_timestamp(self): return False # # Return the offset (in bytes) of the field 'global_rx_timestamp' # def offset_global_rx_timestamp(self): return (64 / 8) # # Return the offset (in bits) of the field 'global_rx_timestamp' # def offsetBits_global_rx_timestamp(self): return 64 # # Return the value (as a long) of the field 'global_rx_timestamp' # def get_global_rx_timestamp(self): return self.getUIntElement(self.offsetBits_global_rx_timestamp(), 32, 1) # # Set the value of the field 'global_rx_timestamp' # def set_global_rx_timestamp(self, value): self.setUIntElement(self.offsetBits_global_rx_timestamp(), 32, value, 1) # # Return the size, in bytes, of the field 'global_rx_timestamp' # def size_global_rx_timestamp(self): return (32 / 8) # # Return the size, in bits, of the field 'global_rx_timestamp' # def sizeBits_global_rx_timestamp(self): return 32 # # Accessor methods for field: skew_times_1000000 # Field type: int # Offset (bits): 96 # Size (bits): 32 # # # Return whether the field 'skew_times_1000000' is signed (False). # def isSigned_skew_times_1000000(self): return False # # Return whether the field 'skew_times_1000000' is an array (False). # def isArray_skew_times_1000000(self): return False # # Return the offset (in bytes) of the field 'skew_times_1000000' # def offset_skew_times_1000000(self): return (96 / 8) # # Return the offset (in bits) of the field 'skew_times_1000000' # def offsetBits_skew_times_1000000(self): return 96 # # Return the value (as a int) of the field 'skew_times_1000000' # def get_skew_times_1000000(self): return self.getSIntElement(self.offsetBits_skew_times_1000000(), 32, 1) # # Set the value of the field 'skew_times_1000000' # def set_skew_times_1000000(self, value): self.setSIntElement(self.offsetBits_skew_times_1000000(), 32, value, 1) # # Return the size, in bytes, of the field 'skew_times_1000000' # def size_skew_times_1000000(self): return (32 / 8) # # Return the size, in bits, of the field 'skew_times_1000000' # def sizeBits_skew_times_1000000(self): return 32 # # Accessor methods for field: skew # Field type: int # Offset (bits): 128 # Size (bits): 32 # # # Return whether the field 'skew' is signed (False). # def isSigned_skew(self): return False # # Return whether the field 'skew' is an array (False). # def isArray_skew(self): return False # # Return the offset (in bytes) of the field 'skew' # def offset_skew(self): return (128 / 8) # # Return the offset (in bits) of the field 'skew' # def offsetBits_skew(self): return 128 # # Return the value (as a int) of the field 'skew' # def get_skew(self): return self.getFloatElement(self.offsetBits_skew(), 32, 0) # # Set the value of the field 'skew' # def set_skew(self, value): self.setSIntElement(self.offsetBits_skew(), 32, value, 1) # # Return the size, in bytes, of the field 'skew' # def size_skew(self): return (32 / 8) # # Return the size, in bits, of the field 'skew' # def sizeBits_skew(self): return 32 # # Accessor methods for field: is_synced # Field type: short # Offset (bits): 160 # Size (bits): 8 # # # Return whether the field 'is_synced' is signed (False). # def isSigned_is_synced(self): return False # # Return whether the field 'is_synced' is an array (False). # def isArray_is_synced(self): return False # # Return the offset (in bytes) of the field 'is_synced' # def offset_is_synced(self): return (160 / 8) # # Return the offset (in bits) of the field 'is_synced' # def offsetBits_is_synced(self): return 160 # # Return the value (as a short) of the field 'is_synced' # def get_is_synced(self): return self.getUIntElement(self.offsetBits_is_synced(), 8, 1) # # Set the value of the field 'is_synced' # def set_is_synced(self, value): self.setUIntElement(self.offsetBits_is_synced(), 8, value, 1) # # Return the size, in bytes, of the field 'is_synced' # def size_is_synced(self): return (8 / 8) # # Return the size, in bits, of the field 'is_synced' # def sizeBits_is_synced(self): return 8 # # Accessor methods for field: ftsp_root_addr # Field type: int # Offset (bits): 168 # Size (bits): 16 # # # Return whether the field 'ftsp_root_addr' is signed (False). # def isSigned_ftsp_root_addr(self): return False # # Return whether the field 'ftsp_root_addr' is an array (False). # def isArray_ftsp_root_addr(self): return False # # Return the offset (in bytes) of the field 'ftsp_root_addr' # def offset_ftsp_root_addr(self): return (168 / 8) # # Return the offset (in bits) of the field 'ftsp_root_addr' # def offsetBits_ftsp_root_addr(self): return 168 # # Return the value (as a int) of the field 'ftsp_root_addr' # def get_ftsp_root_addr(self): return self.getUIntElement(self.offsetBits_ftsp_root_addr(), 16, 1) # # Set the value of the field 'ftsp_root_addr' # def set_ftsp_root_addr(self, value): self.setUIntElement(self.offsetBits_ftsp_root_addr(), 16, value, 1) # # Return the size, in bytes, of the field 'ftsp_root_addr' # def size_ftsp_root_addr(self): return (16 / 8) # # Return the size, in bits, of the field 'ftsp_root_addr' # def sizeBits_ftsp_root_addr(self): return 16 # # Accessor methods for field: ftsp_seq # Field type: short # Offset (bits): 184 # Size (bits): 8 # # # Return whether the field 'ftsp_seq' is signed (False). # def isSigned_ftsp_seq(self): return False # # Return whether the field 'ftsp_seq' is an array (False). # def isArray_ftsp_seq(self): return False # # Return the offset (in bytes) of the field 'ftsp_seq' # def offset_ftsp_seq(self): return (184 / 8) # # Return the offset (in bits) of the field 'ftsp_seq' # def offsetBits_ftsp_seq(self): return 184 # # Return the value (as a short) of the field 'ftsp_seq' # def get_ftsp_seq(self): return self.getUIntElement(self.offsetBits_ftsp_seq(), 8, 1) # # Set the value of the field 'ftsp_seq' # def set_ftsp_seq(self, value): self.setUIntElement(self.offsetBits_ftsp_seq(), 8, value, 1) # # Return the size, in bytes, of the field 'ftsp_seq' # def size_ftsp_seq(self): return (8 / 8) # # Return the size, in bits, of the field 'ftsp_seq' # def sizeBits_ftsp_seq(self): return 8 # # Accessor methods for field: ftsp_table_entries # Field type: short # Offset (bits): 192 # Size (bits): 8 # # # Return whether the field 'ftsp_table_entries' is signed (False). # def isSigned_ftsp_table_entries(self): return False # # Return whether the field 'ftsp_table_entries' is an array (False). # def isArray_ftsp_table_entries(self): return False # # Return the offset (in bytes) of the field 'ftsp_table_entries' # def offset_ftsp_table_entries(self): return (192 / 8) # # Return the offset (in bits) of the field 'ftsp_table_entries' # def offsetBits_ftsp_table_entries(self): return 192 # # Return the value (as a short) of the field 'ftsp_table_entries' # def get_ftsp_table_entries(self): return self.getUIntElement(self.offsetBits_ftsp_table_entries(), 8, 1) # # Set the value of the field 'ftsp_table_entries' # def set_ftsp_table_entries(self, value): self.setUIntElement(self.offsetBits_ftsp_table_entries(), 8, value, 1) # # Return the size, in bytes, of the field 'ftsp_table_entries' # def size_ftsp_table_entries(self): return (8 / 8) # # Return the size, in bits, of the field 'ftsp_table_entries' # def sizeBits_ftsp_table_entries(self): return 8 # # Accessor methods for field: localAverage # Field type: long # Offset (bits): 200 # Size (bits): 32 # # # Return whether the field 'localAverage' is signed (False). # def isSigned_localAverage(self): return False # # Return whether the field 'localAverage' is an array (False). # def isArray_localAverage(self): return False # # Return the offset (in bytes) of the field 'localAverage' # def offset_localAverage(self): return (200 / 8) # # Return the offset (in bits) of the field 'localAverage' # def offsetBits_localAverage(self): return 200 # # Return the value (as a long) of the field 'localAverage' # def get_localAverage(self): return self.getUIntElement(self.offsetBits_localAverage(), 32, 1) # # Set the value of the field 'localAverage' # def set_localAverage(self, value): self.setUIntElement(self.offsetBits_localAverage(), 32, value, 1) # # Return the size, in bytes, of the field 'localAverage' # def size_localAverage(self): return (32 / 8) # # Return the size, in bits, of the field 'localAverage' # def sizeBits_localAverage(self): return 32 # # Accessor methods for field: offsetAverage # Field type: int # Offset (bits): 232 # Size (bits): 32 # # # Return whether the field 'offsetAverage' is signed (False). # def isSigned_offsetAverage(self): return False # # Return whether the field 'offsetAverage' is an array (False). # def isArray_offsetAverage(self): return False # # Return the offset (in bytes) of the field 'offsetAverage' # def offset_offsetAverage(self): return (232 / 8) # # Return the offset (in bits) of the field 'offsetAverage' # def offsetBits_offsetAverage(self): return 232 # # Return the value (as a int) of the field 'offsetAverage' # def get_offsetAverage(self): return self.getSIntElement(self.offsetBits_offsetAverage(), 32, 1) # # Set the value of the field 'offsetAverage' # def set_offsetAverage(self, value): self.setSIntElement(self.offsetBits_offsetAverage(), 32, value, 1) # # Return the size, in bytes, of the field 'offsetAverage' # def size_offsetAverage(self): return (32 / 8) # # Return the size, in bits, of the field 'offsetAverage' # def sizeBits_offsetAverage(self): return 32 tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLplBeaconer/000077500000000000000000000000001207233610700226655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLplBeaconer/Makefile000077500000000000000000000001641207233610700243310ustar00rootroot00000000000000COMPONENT=RadioCountToLedsAppC CFLAGS += -DLPL_INTERVAL=200 CFLAGS += -DLOW_POWER_LISTENING include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLeds.h000077500000000000000000000041701207233610700262250ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef RADIO_COUNT_TO_LEDS_H #define RADIO_COUNT_TO_LEDS_H typedef nx_struct radio_count_msg { nx_uint16_t counter; } radio_count_msg_t; enum { AM_RADIO_COUNT_MSG = 6, }; #endif tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLedsAppC.nc000077500000000000000000000064061207233610700271460ustar00rootroot00000000000000// $Id: RadioCountToLedsAppC.nc,v 1.2 2010-06-29 22:07:24 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "RadioCountToLeds.h" #include "Timer.h" /** * Configuration for the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. * * @author Philip Levis * @date June 6 2005 */ configuration RadioCountToLedsAppC {} implementation { components MainC, new RadioCountToLedsC(T32khz) as App, LedsC; components new AMReceiverC(AM_RADIO_COUNT_MSG); components new TimerMilliC(); components TimeSyncMessageC as ActiveMessageC; App.Boot -> MainC.Boot; App.Receive -> AMReceiverC; App.AMSend -> ActiveMessageC.TimeSyncAMSend32khz[AM_RADIO_COUNT_MSG]; App.AMControl -> ActiveMessageC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> ActiveMessageC; components Counter32khz32C, new CounterToLocalTimeC(T32khz) as LocalTime32khzC; LocalTime32khzC.Counter -> Counter32khz32C; App.LocalTime -> LocalTime32khzC; #ifdef LOW_POWER_LISTENING components CC2420ActiveMessageC; App.LowPowerListening -> CC2420ActiveMessageC; #endif } tinyos-2.1.2+dfsg/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLedsC.nc000077500000000000000000000114141207233610700265000ustar00rootroot00000000000000// $Id: RadioCountToLedsC.nc,v 1.3 2010-06-29 22:07:24 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Timer.h" #include "RadioCountToLeds.h" /** * Implementation of the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. * * @author Philip Levis * @date June 6 2005 */ generic module RadioCountToLedsC(typedef precision_tag) @safe() { uses { interface Leds; interface Boot; interface Receive; interface TimeSyncAMSend as AMSend; interface Timer as MilliTimer; interface SplitControl as AMControl; interface Packet; interface LocalTime as LocalTime; #ifdef LOW_POWER_LISTENING interface LowPowerListening; #endif } } implementation { message_t packet; bool locked; uint16_t counter = 0; event void Boot.booted() { call AMControl.start(); } event void AMControl.startDone(error_t err) { if (err == SUCCESS) { call MilliTimer.startPeriodic(2*1024); } else { call AMControl.start(); } } event void AMControl.stopDone(error_t err) { // do nothing } event void MilliTimer.fired() { uint32_t time = call LocalTime.get(); counter++; dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter); if (locked) { return; } else { radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(&packet, sizeof(radio_count_msg_t)); if (rcm == NULL) { return; } rcm->counter = counter; #ifdef LOW_POWER_LISTENING call LowPowerListening.setRemoteWakeupInterval(&packet, LPL_INTERVAL); #endif if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_count_msg_t), time) == SUCCESS) { dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter); locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len); if (len != sizeof(radio_count_msg_t)) {return bufPtr;} else { radio_count_msg_t* rcm = (radio_count_msg_t*)payload; if (rcm->counter & 0x1) { call Leds.led0On(); } else { call Leds.led0Off(); } if (rcm->counter & 0x2) { call Leds.led1On(); } else { call Leds.led1Off(); } if (rcm->counter & 0x4) { call Leds.led2On(); } else { call Leds.led2Off(); } return bufPtr; } } event void AMSend.sendDone(message_t* bufPtr, error_t error) { if (&packet == bufPtr) { locked = FALSE; } } } tinyos-2.1.2+dfsg/apps/tests/TestLed/000077500000000000000000000000001207233610700174325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestLed/BlinkLed/000077500000000000000000000000001207233610700211165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestLed/BlinkLed/Makefile000066400000000000000000000000511207233610700225520ustar00rootroot00000000000000COMPONENT=TestAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestLed/BlinkLed/TestAppC.nc000066400000000000000000000042041207233610700231230ustar00rootroot00000000000000/* * Copyright (c) 2009-2010 People Power Company * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Much like Blink, but uses the Led interface. * * TESTS: Led interface * TESTS: Timer * * @author David Moss * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP, MainC, new TimerMilliC() as Timer1C, new TimerMilliC() as Timer2C, new TimerMilliC() as Timer3C, LedC; TestP.Boot -> MainC; TestP.Led1 -> LedC.Led0; TestP.Led2 -> LedC.Led1; TestP.Led3 -> LedC.Led2; TestP.Timer1 -> Timer1C; TestP.Timer2 -> Timer2C; TestP.Timer3 -> Timer3C; } tinyos-2.1.2+dfsg/apps/tests/TestLed/BlinkLed/TestP.nc000066400000000000000000000045501207233610700225030ustar00rootroot00000000000000/* * Copyright (c) 2009-2010 People Power Company * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Much like Blink, but uses the Led interface. * * TESTS: Led interface * TESTS: Timer * * @author David Moss * @author Peter A. Bigot */ module TestP { uses { interface Boot; interface Timer as Timer1; interface Timer as Timer2; interface Timer as Timer3; interface Led as Led1; interface Led as Led2; interface Led as Led3; } } implementation { event void Boot.booted() { call Led1.on(); call Timer1.startPeriodic(256); call Timer2.startPeriodic(512); call Timer3.startPeriodic(1024); } event void Timer1.fired() { call Led1.toggle(); } event void Timer2.fired() { call Led2.toggle(); } event void Timer3.fired() { call Led3.toggle(); } } tinyos-2.1.2+dfsg/apps/tests/TestLed/LedColor/000077500000000000000000000000001207233610700211355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestLed/LedColor/Makefile000066400000000000000000000001121207233610700225670ustar00rootroot00000000000000COMPONENT=TestAppC PFLAGS += -I$(TOSDIR)/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestLed/LedColor/TestAppC.nc000066400000000000000000000052731207233610700231510ustar00rootroot00000000000000/* * Copyright (c) 2009-2010 People Power Company * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** Colored LED test. * * The LEDs supported by the platform will be lit, one at a time for a * duration of two seconds, in their spectrum order. Verify that the * color of the lit LED matches the color printed to the serial port. * * TESTS: MultiLed interface * TESTS: Led color interfaces * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP, MainC, new TimerMilliC() as TimerC, LedC; TestP.Boot -> MainC; TestP.Timer -> TimerC; // Get access to the definitions that enable specific colors */ #include "PlatformLed.h" #if defined(PLATFORM_LED_GREEN) TestP.Green -> LedC.Green; #endif // GREEN #if defined(PLATFORM_LED_RED) TestP.Red -> LedC.Red; #endif // RED #if defined(PLATFORM_LED_WHITE) TestP.White -> LedC.White; #endif // WHITE #if defined(PLATFORM_LED_YELLOW) TestP.Yellow -> LedC.Yellow; #endif // YELLOW #if defined(PLATFORM_LED_ORANGE) TestP.Orange -> LedC.Orange; #endif // ORANGE #if defined(PLATFORM_LED_BLUE) TestP.Blue -> LedC.Blue; #endif // BLUE TestP.MultiLed -> LedC; components SerialPrintfC; } tinyos-2.1.2+dfsg/apps/tests/TestLed/LedColor/TestP.nc000066400000000000000000000101101207233610700225070ustar00rootroot00000000000000/* * Copyright (c) 2009-2010 People Power Company * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** Colored LED test. * * The LEDs supported by the platform will be lit, one at a time for a * duration of two seconds, in their spectrum order. Verify that the * color of the lit LED matches the color printed to the serial port. * * TESTS: MultiLed interface * TESTS: Led color interfaces * * @author Peter A. Bigot */ #include #include "PlatformLed.h" module TestP { uses { interface Boot; interface Timer as Timer; #if defined(PLATFORM_LED_GREEN) interface Led as Green; #endif // GREEN #if defined(PLATFORM_LED_RED) interface Led as Red; #endif // RED #if defined(PLATFORM_LED_WHITE) interface Led as White; #endif // WHITE #if defined(PLATFORM_LED_YELLOW) interface Led as Yellow; #endif // YELLOW #if defined(PLATFORM_LED_ORANGE) interface Led as Orange; #endif // ORANGE #if defined(PLATFORM_LED_BLUE) interface Led as Blue; #endif // BLUE interface MultiLed; } } implementation { enum { LC_Red, LC_Orange, LC_Yellow, LC_Green, LC_Blue, LC_White, LC_LIMIT }; enum { TIMER_DELAY_BMS = 2048, }; unsigned int color_index; task void showColor_task () { int delay = TIMER_DELAY_BMS; call MultiLed.set(0); switch (color_index) { #if defined(PLATFORM_LED_RED) case LC_Red: call Red.on(); printf("Red\r\n"); break; #endif // RED #if defined(PLATFORM_LED_ORANGE) case LC_Orange: call Orange.on(); printf("Orange\r\n"); break; #endif // ORANGE #if defined(PLATFORM_LED_YELLOW) case LC_Yellow: call Yellow.on(); printf("Yellow\r\n"); break; #endif // YELLOW #if defined(PLATFORM_LED_GREEN) case LC_Green: call Green.on(); printf("Green\r\n"); break; #endif // GREEN #if defined(PLATFORM_LED_BLUE) case LC_Blue: call Blue.on(); printf("Blue\r\n"); break; #endif // BLUE #if defined(PLATFORM_LED_WHITE) case LC_White: call White.on(); printf("White\r\n"); break; #endif // WHITE default: printf("Color index %d not supported on this platform\r\n", color_index); delay = 0; break; } if (++color_index == LC_LIMIT) { color_index = 0; } call Timer.startOneShot(delay); } event void Boot.booted() { color_index = 0; post showColor_task(); } event void Timer.fired() { post showColor_task(); } } tinyos-2.1.2+dfsg/apps/tests/TestLed/MultiLed/000077500000000000000000000000001207233610700211515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestLed/MultiLed/Makefile000066400000000000000000000001121207233610700226030ustar00rootroot00000000000000COMPONENT=TestAppC PFLAGS += -I$(TOSDIR)/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestLed/MultiLed/TestAppC.nc000066400000000000000000000044331207233610700231620ustar00rootroot00000000000000/* * Copyright (c) 2009-2010 People Power Company * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** Multiple-LED test. * * Twice per second, a counter will be incremented, and the counter * value depicted in the LEDs. The value of the counter, and the * value read from the LEDs, will be printed. Verify that the LEDs * light in order to represent the counter value. Watch the serial * output to ensure the counter and led value match in their lower * bits. * * TESTS: MultiLed interface * TESTS: Timer * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP, MainC, new TimerMilliC() as TimerC, LedC; TestP.Boot -> MainC; TestP.MultiLed -> LedC; TestP.Timer -> TimerC; components SerialPrintfC; } tinyos-2.1.2+dfsg/apps/tests/TestLed/MultiLed/TestP.nc000066400000000000000000000050671207233610700225420ustar00rootroot00000000000000/* * Copyright (c) 2009-2010 People Power Company * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** Multiple-LED test. * * Twice per second, a counter will be incremented, and the counter * value depicted in the LEDs. The value of the counter, and the * value read from the LEDs, will be printed. Verify that the LEDs * light in order to represent the counter value. Watch the serial * output to ensure the counter and led value match in their lower * bits. * * TESTS: MultiLed interface * TESTS: Timer * * @author Peter A. Bigot */ #include module TestP { uses { interface Boot; interface Timer as Timer; interface MultiLed; } } implementation { unsigned int last_set; unsigned int counter; task void showState_task () { printf("count=%04x, led=%04x\r\n", last_set, call MultiLed.get()); } event void Boot.booted() { counter = 0; call Timer.startPeriodic(512); } event void Timer.fired() { last_set = ++counter; call MultiLed.set(last_set); post showState_task(); } } tinyos-2.1.2+dfsg/apps/tests/TestLed/MultiLedSingle/000077500000000000000000000000001207233610700223135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestLed/MultiLedSingle/Makefile000066400000000000000000000000511207233610700237470ustar00rootroot00000000000000COMPONENT=TestAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestLed/MultiLedSingle/TestAppC.nc000066400000000000000000000043751207233610700243310ustar00rootroot00000000000000/* * Copyright (c) 2009-2010 People Power Company * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Much like TinyOS Blink test, except uses more LEDs and uses the * MultiLed interface. * * TESTS: MultiLed interface * TESTS: Timer * * @author David Moss * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP, MainC, new TimerMilliC() as Timer1C, new TimerMilliC() as Timer2C, new TimerMilliC() as Timer3C, new TimerMilliC() as Timer4C, new TimerMilliC() as Timer5C, LedC; TestP.Boot -> MainC; TestP.MultiLed -> LedC; TestP.Timer1 -> Timer1C; TestP.Timer2 -> Timer2C; TestP.Timer3 -> Timer3C; TestP.Timer4 -> Timer4C; TestP.Timer5 -> Timer5C; } tinyos-2.1.2+dfsg/apps/tests/TestLed/MultiLedSingle/TestP.nc000066400000000000000000000051741207233610700237030ustar00rootroot00000000000000/* * Copyright (c) 2009-2010 People Power Company * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Much like TinyOS Blink test, except uses more LEDs and uses the * MultiLed interface. * * TESTS: MultiLed interface * TESTS: Timer * * @author David Moss * @author Peter A. Bigot */ module TestP { uses { interface Boot; interface Timer as Timer1; interface Timer as Timer2; interface Timer as Timer3; interface Timer as Timer4; interface Timer as Timer5; interface MultiLed; } } implementation { event void Boot.booted() { call Timer5.startPeriodic(4096); call Timer4.startPeriodic(2048); call Timer3.startPeriodic(1024); call Timer2.startPeriodic(512); call Timer1.startPeriodic(256); } event void Timer1.fired() { call MultiLed.toggle(0); } event void Timer2.fired() { call MultiLed.toggle(1); } event void Timer3.fired() { call MultiLed.toggle(2); } event void Timer4.fired() { call MultiLed.toggle(3); } event void Timer5.fired() { call MultiLed.toggle(4); } } tinyos-2.1.2+dfsg/apps/tests/TestLed/README.TXT000066400000000000000000000001011207233610700207600ustar00rootroot00000000000000Collection of test programs for the Led and MultiLed interfaces. tinyos-2.1.2+dfsg/apps/tests/TestLpl/000077500000000000000000000000001207233610700174555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestLpl/Makefile000066400000000000000000000001151207233610700211120ustar00rootroot00000000000000COMPONENT=TestLplAppC CFLAGS += -DLOW_POWER_LISTENING include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestLpl/README.txt000066400000000000000000000031251207233610700211540ustar00rootroot00000000000000README for TestLPL Author/Contact: tinyos-help@millennium.berkeley.edu Description: A simple low-power-listening test app, which cycles through different low-power-listening settings every ~32s, repeating every ~192s. This application currently runs on motes using the CC1000, CC2420, RF230 and RFA1 radios. This application blinks LED 0 every time it sends a message, and toggles LED 1 every time it receives a message. If this application is working correctly (see caveat about timing below), you should see both nodes toggling LED 1. Its low-power-listening settings are as follows (repeating every 256s): 0-32s: receive: fully on send: every second, to fully on listener 32-64s: receive: fully on send: every second, to low-power-listeners with 100ms interval 64-96s: receive: low-power-listening with 250ms interval send: every second, to low-power-listeners with 250ms interval 96-128s: receive: low-power-listening with 250ms interval send: every second, to fully on listener 128-160s: receive: low-power-listening with 10ms interval send: every second, to low-power-listeners with 10ms interval 160-192s: receive: low-power-listening with 2000ms interval send: every 7 seconds, to low-power-listeners with 2000ms interval Whether two motes running TestLPL can receive each others messages depends on their current send and receive low-power-listening settings. If you reset two such motes at the same time, they will be able to receive each other's messages in the following intervals: 0-96s and 128-192s. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/TestLpl/TestLplAppC.nc000066400000000000000000000053661207233610700221440ustar00rootroot00000000000000// $Id: TestLplAppC.nc,v 1.5 2010-01-14 15:46:26 klueska Exp $ /* tab:4 * "Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Simple test code for low-power-listening. Sends a sequence of packets, * changing the low-power-listening settings every ~32s. See README.txt * for more details. * * @author Philip Levis, David Gay * @date Oct 27 2006 */ configuration TestLplAppC {} implementation { components MainC, TestLplC as App, LedsC; components ActiveMessageC; components new TimerMilliC(); #if defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) components CC1000CsmaRadioC as LplRadio; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) components CC2420ActiveMessageC as LplRadio; #elif defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) || defined(PLATFORM_UCMINI) components ActiveMessageC as LplRadio; #elif defined(PLATFORM_EYESIFXV1) || defined(PLATFORM_EYESIFXV2) components LplC as LplRadio; #else #error "LPL testing not supported on this platform" #endif App.Boot -> MainC.Boot; App.Receive -> ActiveMessageC.Receive[240]; App.AMSend -> ActiveMessageC.AMSend[240]; App.SplitControl -> ActiveMessageC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.LowPowerListening -> LplRadio; } tinyos-2.1.2+dfsg/apps/tests/TestLpl/TestLplC.nc000066400000000000000000000073101207233610700214720ustar00rootroot00000000000000// $Id: TestLplC.nc,v 1.2 2009-10-21 19:11:51 razvanm Exp $ /* tab:4 * "Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Timer.h" /** * Simple test code for low-power-listening. Sends a sequence of packets, * changing the low-power-listening settings every ~32s. See README.txt * for more details. * * @author Philip Levis, David Gay * @date Oct 27 2006 */ module TestLplC { uses { interface Leds; interface Boot; interface Receive; interface AMSend; interface Timer as MilliTimer; interface SplitControl; interface LowPowerListening; } } implementation { message_t packet; bool locked; uint8_t counter = 0, sendSkip; int16_t sendInterval; event void Boot.booted() { call SplitControl.start(); } void nextLplState() { switch (counter >> 5) { case 0: sendSkip = 0; sendInterval = 0; call LowPowerListening.setLocalWakeupInterval(0); break; case 1: sendInterval = 100; /* Send to sleepy listener */ break; case 2: sendInterval = -1; /* Send to listener like us */ call LowPowerListening.setLocalWakeupInterval(250); break; case 3: sendInterval = 0; /* Send to awake listener */ break; case 4: sendInterval = -1; /* Send to listener like us */ call LowPowerListening.setLocalWakeupInterval(10); break; case 5: sendSkip = 7; /* Send every 7s */ call LowPowerListening.setLocalWakeupInterval(2000); break; } } event void MilliTimer.fired() { counter++; if (!(counter & 31)) nextLplState(); if (!locked && ((counter & sendSkip) == sendSkip)) { if (sendInterval >= 0) call LowPowerListening.setRemoteWakeupInterval(&packet, sendInterval); if (call AMSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) { call Leds.led0On(); locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { call Leds.led1Toggle(); return bufPtr; } event void AMSend.sendDone(message_t* bufPtr, error_t error) { if (&packet == bufPtr) { locked = FALSE; call Leds.led0Off(); } } event void SplitControl.startDone(error_t err) { call MilliTimer.startPeriodic(1000); } event void SplitControl.stopDone(error_t err) { } } tinyos-2.1.2+dfsg/apps/tests/TestNetwork/000077500000000000000000000000001207233610700203575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestNetwork/Driver.c000066400000000000000000000015431207233610700217610ustar00rootroot00000000000000#include #include #include #include int main() { Tossim* t = new Tossim(NULL); t-> init(); for (int i = 0; i < 10; i++) { Mote* m = t->getNode(i * 5); m->bootAtTime(rand() % t->ticksPerSecond()); } t->addChannel("TestNetworkC", stdout); t->addChannel("Forwarder", stdout); // t->addChannel("PointerBug", stdout); // t->addChannel("QueueC", stdout); // t->addChannel("PoolP", stdout); //t->addChannel("LITest", stdout); //t->addChannel("AM", stdout); // t->addChannel("Route", stdout); Radio* r = t->radio(); for (int i = 0; i < 10; i++) { r->setNoise(i * 5, -105.0, 1.0); for (int j = 0; j < 10; j++) { r->add(i * 5, j * 5, -96.0 - (double)abs(i - j)); r->add(j * 5, i * 5, -96.0 - (double)abs(i - j)); } } while(t->time() < 600 * t->ticksPerSecond()) { t->runNextEvent(); } } tinyos-2.1.2+dfsg/apps/tests/TestNetwork/Makefile000066400000000000000000000041351207233610700220220ustar00rootroot00000000000000COMPONENT=TestNetworkAppC CFLAGS += -I$(TOSDIR)/lib/net \ -I$(TOSDIR)/lib/net/drip \ -I$(TOSDIR)/lib/net/4bitle \ -I$(TOSDIR)/lib/net/ctp #-DNO_DEBUG TFLAGS += -I$(TOSDIR)/../apps/tests/TestDissemination \ -I$(TOSDIR)/../support/sdk/c \ -I$(TOSDIR)/types \ -I. LIBMOTE = $(TOSDIR)/../support/sdk/c/libmote.a #BUILD_EXTRA_DEPS += tn-injector #tn-listener LISTEN_OBJS = collection_msg.o test_network_msg.o tn-listener.o $(LIBMOTE) INJECT_OBJS = set_rate_msg.o tn-injector.o collection_debug_msg.o $(LIBMOTE) # arguments: output filename stem, input filename, struct name define mig_templ MIGFILES += $(1).c $(1).h $(1).java $(1).o $(1).c: mig -o $(1).h c -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3) $(1).java: mig -o $(1).java java -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3) endef $(eval $(call mig_templ,test_network_msg,TestNetwork.h,TestNetworkMsg)) $(eval $(call mig_templ,set_rate_msg,$(TOSDIR)/lib/net/DisseminationEngine.h,dissemination_message)) $(eval $(call mig_templ,collection_debug_msg,$(TOSDIR)/lib/net/collection/CollectionDebugMsg.h,CollectionDebugMsg)) %.o: %.c gcc -v $(TFLAGS) $(CFLAGS) -c -o $@ $< tn-listener: $(LISTEN_OBJS) gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(LISTEN_OBJS) tn-injector: $(INJECT_OBJS) gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(INJECT_OBJS) #tn-listener.o: tn-listener.c # gcc $(TFLAGS) $(CFLAGS) -c -o $@ $< tn-injector.o: tn-injector.c test_network_msg.c gcc $(TFLAGS) $(CFLAGS) -c -o $@ $< #test_network_msg.c: # mig -o test_network_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) TestNetwork.h TestNetworkMsg #set_rate_msg.c: # mig -o set_rate_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/DisseminationEngine.h dissemination_message #set_rate_msg.o: set_rate_msg.c # gcc $(CFLAGS) $(TFLAGS) -c -o $@ $< #test_network_msg.o: test_network_msg.c # gcc $(CFLAGS) $(TFLAGS) -c -o $@ $< #collection_msg.c: # mig -o collection_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/collection/ForwardingEngine.h collection_header include $(MAKERULES) migclean: rm -rf $(MIGFILES) tinyos-2.1.2+dfsg/apps/tests/TestNetwork/Makefile.Driver000066400000000000000000000003131207233610700232460ustar00rootroot00000000000000 all: make micaz sim g++ -g -c -o Driver.o Driver.c -I../../../tos/lib/tossim/ -I../../../tos/lib/net -I../../../tos/lib/net/collection g++ -o Driver Driver.o build/micaz/sim.o build/micaz/tossim.o tinyos-2.1.2+dfsg/apps/tests/TestNetwork/README.txt000066400000000000000000000024211207233610700220540ustar00rootroot00000000000000README for TestNetwork Author/Contact: tinyos-help@millennium.berkeley.edu Description: TestNetworkC exercises the basic networking layers, collection and dissemination. The application samples DemoSensorC at a basic rate and sends packets up a collection tree. The rate is configurable through dissemination. See TEP118: Dissemination, TEP 119: Collection, and TEP 123: The Collection Tree Protocol for details. There are scripts on net2 website to parse the debug messages sent by the nodes. To test, start with two motes with no program that transmits packets. Example., erase the mote or install Blink. Program a mote with node id 0. The mote will toggle led1 (green on TelosB) approximately every 8s. Then program the second mote with id 1. Once programming is complete, the mote with id 0 will toggle led1 twice every 8s. Each toggle corresponds to the reception of collection message (once from itself, and once from the mote with id 1). Errors indications: Motes 0 and 1 will set led0 (red on TelosB) if there are errors while sending the packet. Mote 0 will set led2 (blue on TelosB) if the gap in sequence number on consecutive packet reception from node 1 is greater than 1. This is expected to be a rare event while doing experiment on a desk. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/TestNetwork/TestNetwork.h000066400000000000000000000005241207233610700230220ustar00rootroot00000000000000#ifndef TEST_NETWORK_H #define TEST_NETWORK_H #include #include "TestNetworkC.h" typedef nx_struct TestNetworkMsg { nx_am_addr_t source; nx_uint16_t seqno; nx_am_addr_t parent; nx_uint16_t metric; nx_uint16_t data; nx_uint8_t hopcount; nx_uint16_t sendCount; nx_uint16_t sendSuccessCount; } TestNetworkMsg; #endif tinyos-2.1.2+dfsg/apps/tests/TestNetwork/TestNetworkAppC.nc000066400000000000000000000046111207233610700237400ustar00rootroot00000000000000/** * TestNetworkC exercises the basic networking layers, collection and * dissemination. The application samples DemoSensorC at a basic rate * and sends packets up a collection tree. The rate is configurable * through dissemination. * * See TEP118: Dissemination, TEP 119: Collection, and TEP 123: The * Collection Tree Protocol for details. * * @author Philip Levis * @version $Revision: 1.7 $ $Date: 2009-09-16 00:51:50 $ */ #include "TestNetwork.h" #include "Ctp.h" configuration TestNetworkAppC {} implementation { components TestNetworkC, MainC, LedsC, ActiveMessageC; components DisseminationC; components new DisseminatorC(uint32_t, SAMPLE_RATE_KEY) as Object32C; components CollectionC as Collector; components new CollectionSenderC(CL_TEST); components new TimerMilliC(); components new DemoSensorC(); components new SerialAMSenderC(CL_TEST); components SerialActiveMessageC; #ifndef NO_DEBUG components new SerialAMSenderC(AM_COLLECTION_DEBUG) as UARTSender; components UARTDebugSenderP as DebugSender; #endif components RandomC; components new QueueC(message_t*, 12); components new PoolC(message_t, 12); TestNetworkC.Boot -> MainC; TestNetworkC.RadioControl -> ActiveMessageC; TestNetworkC.SerialControl -> SerialActiveMessageC; TestNetworkC.RoutingControl -> Collector; TestNetworkC.DisseminationControl -> DisseminationC; TestNetworkC.Leds -> LedsC; TestNetworkC.Timer -> TimerMilliC; TestNetworkC.DisseminationPeriod -> Object32C; TestNetworkC.Send -> CollectionSenderC; TestNetworkC.ReadSensor -> DemoSensorC; TestNetworkC.RootControl -> Collector; TestNetworkC.Receive -> Collector.Receive[CL_TEST]; TestNetworkC.UARTSend -> SerialAMSenderC.AMSend; TestNetworkC.CollectionPacket -> Collector; TestNetworkC.CtpInfo -> Collector; TestNetworkC.CtpCongestion -> Collector; TestNetworkC.Random -> RandomC; TestNetworkC.Pool -> PoolC; TestNetworkC.Queue -> QueueC; TestNetworkC.RadioPacket -> ActiveMessageC; #ifndef NO_DEBUG components new PoolC(message_t, 10) as DebugMessagePool; components new QueueC(message_t*, 10) as DebugSendQueue; DebugSender.Boot -> MainC; DebugSender.UARTSend -> UARTSender; DebugSender.MessagePool -> DebugMessagePool; DebugSender.SendQueue -> DebugSendQueue; Collector.CollectionDebug -> DebugSender; TestNetworkC.CollectionDebug -> DebugSender; #endif TestNetworkC.AMPacket -> ActiveMessageC; } tinyos-2.1.2+dfsg/apps/tests/TestNetwork/TestNetworkC.h000066400000000000000000000002501207233610700231210ustar00rootroot00000000000000#ifndef TEST_NETWORK_C_H #define TEST_NETWORK_C_H enum { AM_TESTNETWORKMSG = 0x05, SAMPLE_RATE_KEY = 0x1, CL_TEST = 0xee, TEST_NETWORK_QUEUE_SIZE = 8, }; #endif tinyos-2.1.2+dfsg/apps/tests/TestNetwork/TestNetworkC.nc000066400000000000000000000142671207233610700233070ustar00rootroot00000000000000/** * TestNetworkC exercises the basic networking layers, collection and * dissemination. The application samples DemoSensorC at a basic rate * and sends packets up a collection tree. The rate is configurable * through dissemination. The default send rate is every 10s. * * See TEP118: Dissemination and TEP 119: Collection for details. * * @author Philip Levis * @version $Revision: 1.11 $ $Date: 2010-01-14 21:53:58 $ */ #include #include "TestNetwork.h" #include "CtpDebugMsg.h" module TestNetworkC { uses interface Boot; uses interface SplitControl as RadioControl; uses interface SplitControl as SerialControl; uses interface StdControl as RoutingControl; uses interface StdControl as DisseminationControl; uses interface DisseminationValue as DisseminationPeriod; uses interface Send; uses interface Leds; uses interface Read as ReadSensor; uses interface Timer; uses interface RootControl; uses interface Receive; uses interface AMSend as UARTSend; uses interface CollectionPacket; uses interface CtpInfo; uses interface CtpCongestion; uses interface Random; uses interface Queue; uses interface Pool; uses interface CollectionDebug; uses interface AMPacket; uses interface Packet as RadioPacket; } implementation { task void uartEchoTask(); message_t packet; message_t uartpacket; message_t* recvPtr = &uartpacket; uint8_t msglen; bool sendBusy = FALSE; bool uartbusy = FALSE; bool firstTimer = TRUE; uint16_t seqno; enum { SEND_INTERVAL = 8192 }; event void ReadSensor.readDone(error_t err, uint16_t val) { } event void Boot.booted() { call SerialControl.start(); } event void SerialControl.startDone(error_t err) { call RadioControl.start(); } event void RadioControl.startDone(error_t err) { if (err != SUCCESS) { call RadioControl.start(); } else { call DisseminationControl.start(); call RoutingControl.start(); if (TOS_NODE_ID % 500 == 0) { call RootControl.setRoot(); } seqno = 0; call Timer.startOneShot(call Random.rand16() & 0x1ff); } } event void RadioControl.stopDone(error_t err) {} event void SerialControl.stopDone(error_t err) {} void failedSend() { dbg("App", "%s: Send failed.\n", __FUNCTION__); call CollectionDebug.logEvent(NET_C_DBG_1); } void sendMessage() { TestNetworkMsg* msg = (TestNetworkMsg*)call Send.getPayload(&packet, sizeof(TestNetworkMsg)); uint16_t metric; am_addr_t parent = 0; call CtpInfo.getParent(&parent); call CtpInfo.getEtx(&metric); msg->source = TOS_NODE_ID; msg->seqno = seqno; msg->data = 0xCAFE; msg->parent = parent; msg->hopcount = 0; msg->metric = metric; if (call Send.send(&packet, sizeof(TestNetworkMsg)) != SUCCESS) { failedSend(); call Leds.led0On(); dbg("TestNetworkC", "%s: Transmission failed.\n", __FUNCTION__); } else { sendBusy = TRUE; seqno++; dbg("TestNetworkC", "%s: Transmission succeeded.\n", __FUNCTION__); } } event void Timer.fired() { uint32_t nextInt; dbg("TestNetworkC", "TestNetworkC: Timer fired.\n"); nextInt = call Random.rand32() % SEND_INTERVAL; nextInt += SEND_INTERVAL >> 1; call Timer.startOneShot(nextInt); if (!sendBusy) sendMessage(); } event void Send.sendDone(message_t* m, error_t err) { if (err != SUCCESS) { call Leds.led0On(); } sendBusy = FALSE; dbg("TestNetworkC", "Send completed.\n"); } event void DisseminationPeriod.changed() { const uint32_t* newVal = call DisseminationPeriod.get(); call Timer.stop(); call Timer.startPeriodic(*newVal); } uint8_t prevSeq = 0; uint8_t firstMsg = 0; event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { dbg("TestNetworkC", "Received packet at %s from node %hhu.\n", sim_time_string(), call CollectionPacket.getOrigin(msg)); call Leds.led1Toggle(); if (call CollectionPacket.getOrigin(msg) == 1) { if (firstMsg == 1) { if (call CollectionPacket.getSequenceNumber(msg) - prevSeq > 1) { call Leds.led2On(); } } else { firstMsg = 1; } prevSeq = call CollectionPacket.getSequenceNumber(msg); } if (!call Pool.empty() && call Queue.size() < call Queue.maxSize()) { message_t* tmp = call Pool.get(); call Queue.enqueue(msg); if (!uartbusy) { post uartEchoTask(); } return tmp; } return msg; } task void uartEchoTask() { dbg("Traffic", "Sending packet to UART.\n"); if (call Queue.empty()) { return; } else if (!uartbusy) { message_t* msg = call Queue.dequeue(); dbg("Traffic", "Sending packet to UART.\n"); if (call UARTSend.send(0xffff, msg, call RadioPacket.payloadLength(msg)) == SUCCESS) { uartbusy = TRUE; } else { call CollectionDebug.logEventMsg(NET_C_DBG_2, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); } } } event void UARTSend.sendDone(message_t *msg, error_t error) { dbg("Traffic", "UART send done.\n"); uartbusy = FALSE; call Pool.put(msg); if (!call Queue.empty()) { post uartEchoTask(); } else { // call CtpCongestion.setClientCongested(FALSE); } } /* Default implementations for CollectionDebug calls. * These allow CollectionDebug not to be wired to anything if debugging * is not desired. */ default command error_t CollectionDebug.logEvent(uint8_t type) { return SUCCESS; } default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) { return SUCCESS; } default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) { return SUCCESS; } default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) { return SUCCESS; } default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) { return SUCCESS; } } tinyos-2.1.2+dfsg/apps/tests/TestNetwork/ctp-dump.py000077500000000000000000000031571207233610700224730ustar00rootroot00000000000000#!/usr/bin/env python import sys, time import tos class Test(tos.Packet): def __init__(self, payload = None): tos.Packet.__init__(self, [('source', 'int', 2), ('seqno', 'int', 2), ('parent', 'int', 2), ('metric', 'int', 2), ('data', 'int', 2), ('hopcount', 'int', 1), ('sendCount','int', 2), ('sendSuccessCount','int', 2)], payload) class CtpData(tos.Packet): def __init__(self, payload = None): tos.Packet.__init__(self, [('options', 'int', 1), ('thl', 'int', 1), ('etx', 'int', 2), ('origin', 'int', 2), ('originSeqNo', 'int', 1), ('collectionId','int', 1), ('data', 'blob', None)], payload) if len(sys.argv) < 2: print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600" sys.exit() #s = tos.Serial(sys.argv[1], int(sys.argv[2]), debug=False) am = tos.AM() while True: p = am.read() if p: if p.type == 238: ts = "%.4f" % time.time() ctp = CtpData(p.data) test = Test(ctp.data) print ts, '\t', ctp print ts, '\t', test else: print p tinyos-2.1.2+dfsg/apps/tests/TestNetwork/meyer-short.txt000066400000000000000000000076331207233610700234070ustar00rootroot00000000000000-41 -41 -41 -41 -41 -41 -41 -91 -41 -41 -41 -41 -41 -48 -41 -41 -41 -83 -98 -80 -80 -79 -79 -79 -79 -98 -79 -80 -79 -80 -80 -80 -83 -83 -83 -83 -82 -82 -41 -82 -82 -82 -82 -82 -82 -41 -94 -93 -93 -87 -89 -90 -45 -92 -85 -98 -80 -80 -79 -78 -79 -79 -79 -97 -94 -83 -81 -80 -82 -81 -81 -84 -84 -86 -98 -89 -79 -79 -79 -79 -79 -79 -57 -79 -79 -79 -79 -79 -79 -79 -41 -84 -96 -97 -79 -90 -98 -79 -79 -79 -79 -79 -79 -92 -83 -83 -82 -81 -83 -80 -85 -82 -81 -82 -82 -82 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-105 5 noise 1 -105 5 noise 2 -105 5 noise 3 -105 5 noise 4 -105 5 noise 5 -105 5 gain 0 1 -80 gain 1 0 -90 gain 0 2 -80 gain 2 0 -83 gain 2 3 -70 gain 3 2 -80 gain 1 3 -90 gain 3 1 -92 gain 4 3 -88 gain 3 4 -85 gain 5 3 -60 gain 3 5 -76 gain 0 3 -110 gain 3 0 -110 gain 0 4 -110 gain 4 0 -110 gain 0 5 -110 gain 5 0 -110 gain 5 1 -110 gain 1 5 -110 gain 4 1 -110 gain 1 4 -110 gain 2 1 -90 gain 1 2 -90 gain 5 2 -110 gain 2 5 -110 gain 4 2 -110 gain 2 4 -110 gain 5 4 -90 gain 4 5 -90 tinyos-2.1.2+dfsg/apps/tests/TestNetwork/test.py000066400000000000000000000025331207233610700217130ustar00rootroot00000000000000from TOSSIM import * from tinyos.tossim.TossimApp import * from random import * import sys #n = NescApp("TestNetwork", "app.xml") #t = Tossim(n.variables.variables()) t = Tossim([]) r = t.radio() f = open("sparse-grid.txt", "r") lines = f.readlines() for line in lines: s = line.split() if (len(s) > 0): if s[0] == "gain": r.add(int(s[1]), int(s[2]), float(s[3])) noise = open("meyer-short.txt", "r") lines = noise.readlines() for line in lines: str = line.strip() if (str != ""): val = int(str) for i in range(0, 10): m = t.getNode(i); m.addNoiseTraceReading(val) for i in range(0, 10): m = t.getNode(i); m.createNoiseModel(); time = randint(t.ticksPerSecond(), 10 * t.ticksPerSecond()) m.bootAtTime(time) print "Booting ", i, " at time ", time print "Starting simulation." #t.addChannel("AM", sys.stdout) #t.addChannel("TreeRouting", sys.stdout) #t.addChannel("TestNetworkC", sys.stdout) #t.addChannel("Route", sys.stdout) #t.addChannel("PointerBug", sys.stdout) #t.addChannel("QueueC", sys.stdout) #t.addChannel("Gain", sys.stdout) t.addChannel("Forwarder", sys.stdout) t.addChannel("TestNetworkC", sys.stdout) #t.addChannel("App", sys.stdout) #t.addChannel("Traffic", sys.stdout) #t.addChannel("Acks", sys.stdout) while (t.time() < 1000 * t.ticksPerSecond()): t.runNextEvent() print "Completed simulation." tinyos-2.1.2+dfsg/apps/tests/TestNetwork/tn-injector.c000066400000000000000000000026461207233610700227670ustar00rootroot00000000000000#include #include #include #include "sfsource.h" #include "serialpacket.h" #include "test_network_msg.h" #include "set_rate_msg.h" #include "TestNetworkC.h" int main(int argc, char **argv) { int fd,i; if (argc != 5) { fprintf(stderr, "Usage: %s - change sample rate (ms/sample)\n", argv[0]); exit(2); } fd = open_sf_source(argv[1], atoi(argv[2])); if (fd < 0) { fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n", argv[1], argv[2]); exit(1); } uint8_t len = DISSEMINATION_MESSAGE_SIZE + SPACKET_SIZE + sizeof(uint16_t); void* storage = malloc(len); tmsg_t* serialMsg = new_tmsg(storage, len); void* payload = storage + (spacket_data_offsetbits(0) / 8); tmsg_t* dataMsg = new_tmsg(payload, DISSEMINATION_MESSAGE_SIZE + sizeof(uint16_t)); void* data = payload + (dissemination_message_data_offsetbits(0) / 8); spacket_header_type_set(serialMsg, DISSEMINATION_MESSAGE_AM_TYPE); spacket_header_length_set(serialMsg, DISSEMINATION_MESSAGE_SIZE + sizeof(uint16_t)); dissemination_message_key_set(dataMsg, SAMPLE_RATE_KEY); dissemination_message_seqno_set(dataMsg, atoi(argv[3])); uint16_t* rate = (uint16_t*)data; *rate = (uint16_t)atoi(argv[4]); printf("Writing packet:\n "); for (i = 0; i < len; i++) { printf("%0.2x ", ((uint8_t*)storage)[i]); } printf("\n"); write_sf_packet(fd,storage,len); } tinyos-2.1.2+dfsg/apps/tests/TestNetwork/tn-listener.c000066400000000000000000000023071207233610700227710ustar00rootroot00000000000000#include #include #include #include "sfsource.h" #include "serialpacket.h" #include "test_network_msg.h" #include "collection_msg.h" #include "set_rate_msg.h" #include "TestNetworkC.h" int main(int argc, char **argv) { int fd,i; if (argc != 3) { fprintf(stderr, "Usage: %s - print received packets\n", argv[0]); exit(2); } fd = open_sf_source(argv[1], atoi(argv[2])); if (fd < 0) { fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n", argv[1], argv[2]); exit(1); } for (;;) { int len, i; const unsigned char *packet = read_sf_packet(fd, &len); char* myPacket = (char*)malloc(len); memcpy(myPacket, packet, len); free((void*)packet); if (!packet) exit(0); else { tmsg_t* serialMsg = new_tmsg(myPacket, len); void* payload = (void*)myPacket + (spacket_data_offsetbits(0) / 8); tmsg_t* dataMsg = new_tmsg(payload, len - SPACKET_SIZE); void* data = payload + (dissemination_message_data_offsetbits(0) / 8); for (i = 0; i < len; i++) printf("%02x ", packet[i]); putchar('\n'); fflush(stdout); free((void *)myPacket); } } } tinyos-2.1.2+dfsg/apps/tests/TestNetwork/topo.txt000066400000000000000000036230511207233610700221130ustar00rootroot00000000000000gain 0 1 -70.06 gain 1 0 -71.36 gain 0 2 -82.89 gain 2 0 -84.00 gain 0 3 -83.00 gain 3 0 -78.45 gain 0 4 -96.02 gain 4 0 -92.74 gain 0 5 -97.77 gain 5 0 -94.42 gain 0 6 -98.31 gain 6 0 -97.76 gain 0 7 -100.26 gain 7 0 -98.81 gain 0 8 -102.08 gain 8 0 -99.28 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tinyos-2.1.2+dfsg/apps/tests/TestNetworkLpl/000077500000000000000000000000001207233610700210275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestNetworkLpl/Makefile000066400000000000000000000044741207233610700225000ustar00rootroot00000000000000COMPONENT=TestNetworkLplAppC CFLAGS += -DLOW_POWER_LISTENING CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512 CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512 CFLAGS += -DDELAY_AFTER_RECEIVE=20 # CFLAGS += -DCC2420_DEF_CHANNEL=12 CFLAGS += -I. CFLAGS += -I../TestNetwork CFLAGS += -I$(TOSDIR)/lib/net \ -I$(TOSDIR)/lib/net/drip \ -I$(TOSDIR)/lib/net/4bitle \ -I$(TOSDIR)/lib/net/ctp -DNO_DEBUG TFLAGS += -I$(TOSDIR)/../apps/tests/TestDissemination \ -I$(TOSDIR)/../support/sdk/c \ -I$(TOSDIR)/types \ -I. LIBMOTE = $(TOSDIR)/../support/sdk/c/libmote.a #BUILD_EXTRA_DEPS += tn-injector #tn-listener LISTEN_OBJS = collection_msg.o test_network_msg.o tn-listener.o $(LIBMOTE) INJECT_OBJS = set_rate_msg.o tn-injector.o collection_debug_msg.o $(LIBMOTE) # arguments: output filename stem, input filename, struct name define mig_templ MIGFILES += $(1).c $(1).h $(1).java $(1).o $(1).c: mig -o $(1).h c -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3) $(1).java: mig -o $(1).java java -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3) endef $(eval $(call mig_templ,test_network_msg,TestNetwork.h,TestNetworkMsg)) $(eval $(call mig_templ,set_rate_msg,$(TOSDIR)/lib/net/DisseminationEngine.h,dissemination_message)) $(eval $(call mig_templ,collection_debug_msg,$(TOSDIR)/lib/net/collection/CollectionDebugMsg.h,CollectionDebugMsg)) %.o: %.c gcc -v $(TFLAGS) $(CFLAGS) -c -o $@ $< tn-listener: $(LISTEN_OBJS) gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(LISTEN_OBJS) tn-injector: $(INJECT_OBJS) gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(INJECT_OBJS) #tn-listener.o: tn-listener.c # gcc $(TFLAGS) $(CFLAGS) -c -o $@ $< tn-injector.o: tn-injector.c test_network_msg.c gcc $(TFLAGS) $(CFLAGS) -c -o $@ $< #test_network_msg.c: # mig -o test_network_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) TestNetwork.h TestNetworkMsg #set_rate_msg.c: # mig -o set_rate_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/DisseminationEngine.h dissemination_message #set_rate_msg.o: set_rate_msg.c # gcc $(CFLAGS) $(TFLAGS) -c -o $@ $< #test_network_msg.o: test_network_msg.c # gcc $(CFLAGS) $(TFLAGS) -c -o $@ $< #collection_msg.c: # mig -o collection_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/collection/ForwardingEngine.h collection_header include $(MAKERULES) migclean: rm -rf $(MIGFILES) tinyos-2.1.2+dfsg/apps/tests/TestNetworkLpl/README.txt000066400000000000000000000007661207233610700225360ustar00rootroot00000000000000README for TestNetworkLpl Author/Contact: tinyos-help@millennium.berkeley.edu Description: This is a version of the TestNetworkLpl application that is using the default LowPowerListening mechanism to reduce the power consumption. The settings for default lpl are controlled by the following lines from the Makefile: CFLAGS += -DLOW_POWER_LISTENING CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512 CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512 CFLAGS += -DDELAY_AFTER_RECEIVE=20 Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/TestNetworkLpl/TestNetworkLplAppC.nc000066400000000000000000000050131207233610700250550ustar00rootroot00000000000000/** * TestNetworkLplC exercises the basic networking layers, collection and * dissemination. The application samples DemoSensorC at a basic rate * and sends packets up a collection tree. The rate is configurable * through dissemination. * * See TEP118: Dissemination, TEP 119: Collection, and TEP 123: The * Collection Tree Protocol for details. * * @author Philip Levis * @version $Revision: 1.1 $ $Date: 2009-09-16 00:53:47 $ */ #include "TestNetwork.h" #include "Ctp.h" configuration TestNetworkLplAppC {} implementation { components TestNetworkLplC, MainC, LedsC, ActiveMessageC; components DisseminationC; components new DisseminatorC(uint32_t, SAMPLE_RATE_KEY) as Object32C; components CollectionC as Collector; components new CollectionSenderC(CL_TEST); components new TimerMilliC(); components new DemoSensorC(); components new SerialAMSenderC(CL_TEST); components SerialActiveMessageC; #ifndef NO_DEBUG components new SerialAMSenderC(AM_COLLECTION_DEBUG) as UARTSender; components UARTDebugSenderP as DebugSender; #endif components RandomC; components new QueueC(message_t*, 12); components new PoolC(message_t, 12); TestNetworkLplC.Boot -> MainC; TestNetworkLplC.RadioControl -> ActiveMessageC; TestNetworkLplC.SerialControl -> SerialActiveMessageC; TestNetworkLplC.RoutingControl -> Collector; TestNetworkLplC.DisseminationControl -> DisseminationC; TestNetworkLplC.Leds -> LedsC; TestNetworkLplC.Timer -> TimerMilliC; TestNetworkLplC.DisseminationPeriod -> Object32C; TestNetworkLplC.Send -> CollectionSenderC; TestNetworkLplC.ReadSensor -> DemoSensorC; TestNetworkLplC.RootControl -> Collector; TestNetworkLplC.Receive -> Collector.Receive[CL_TEST]; TestNetworkLplC.UARTSend -> SerialAMSenderC.AMSend; TestNetworkLplC.CollectionPacket -> Collector; TestNetworkLplC.CtpInfo -> Collector; TestNetworkLplC.CtpCongestion -> Collector; TestNetworkLplC.Random -> RandomC; TestNetworkLplC.Pool -> PoolC; TestNetworkLplC.Queue -> QueueC; TestNetworkLplC.RadioPacket -> ActiveMessageC; TestNetworkLplC.LowPowerListening -> ActiveMessageC; #ifndef NO_DEBUG components new PoolC(message_t, 10) as DebugMessagePool; components new QueueC(message_t*, 10) as DebugSendQueue; DebugSender.Boot -> MainC; DebugSender.UARTSend -> UARTSender; DebugSender.MessagePool -> DebugMessagePool; DebugSender.SendQueue -> DebugSendQueue; Collector.CollectionDebug -> DebugSender; TestNetworkLplC.CollectionDebug -> DebugSender; #endif TestNetworkLplC.AMPacket -> ActiveMessageC; } tinyos-2.1.2+dfsg/apps/tests/TestNetworkLpl/TestNetworkLplC.nc000066400000000000000000000142521207233610700244210ustar00rootroot00000000000000/** * TestNetworkC exercises the basic networking layers, collection and * dissemination. The application samples DemoSensorC at a basic rate * and sends packets up a collection tree. The rate is configurable * through dissemination. The default send rate is every 10s. * * See TEP118: Dissemination and TEP 119: Collection for details. * * @author Philip Levis * @version $Revision: 1.1 $ $Date: 2009-09-16 00:53:47 $ */ #include #include "TestNetwork.h" #include "CtpDebugMsg.h" module TestNetworkLplC { uses interface Boot; uses interface SplitControl as RadioControl; uses interface SplitControl as SerialControl; uses interface StdControl as RoutingControl; uses interface StdControl as DisseminationControl; uses interface DisseminationValue as DisseminationPeriod; uses interface Send; uses interface Leds; uses interface Read as ReadSensor; uses interface Timer; uses interface RootControl; uses interface Receive; uses interface AMSend as UARTSend; uses interface CollectionPacket; uses interface CtpInfo; uses interface CtpCongestion; uses interface Random; uses interface Queue; uses interface Pool; uses interface CollectionDebug; uses interface AMPacket; uses interface Packet as RadioPacket; uses interface LowPowerListening; } implementation { task void uartEchoTask(); message_t packet; message_t uartpacket; message_t* recvPtr = &uartpacket; uint8_t msglen; bool sendBusy = FALSE; bool uartbusy = FALSE; bool firstTimer = TRUE; uint16_t seqno; enum { SEND_INTERVAL = 60*1024U, }; event void ReadSensor.readDone(error_t err, uint16_t val) { } event void Boot.booted() { call SerialControl.start(); } event void SerialControl.startDone(error_t err) { if (TOS_NODE_ID % 500 == 0) { call LowPowerListening.setLocalWakeupInterval(0); } call RadioControl.start(); } event void RadioControl.startDone(error_t err) { if (err != SUCCESS) { call RadioControl.start(); } else { //call DisseminationControl.start(); call RoutingControl.start(); if (TOS_NODE_ID % 500 == 0) { call RootControl.setRoot(); } seqno = 0; call Timer.startOneShot(call Random.rand32() % SEND_INTERVAL); } } event void RadioControl.stopDone(error_t err) {} event void SerialControl.stopDone(error_t err) {} void failedSend() { dbg("App", "%s: Send failed.\n", __FUNCTION__); call CollectionDebug.logEvent(NET_C_DBG_1); } void sendMessage() { TestNetworkMsg* msg = (TestNetworkMsg*)call Send.getPayload(&packet, sizeof(TestNetworkMsg)); uint16_t metric; am_addr_t parent = 0; call CtpInfo.getParent(&parent); call CtpInfo.getEtx(&metric); msg->source = TOS_NODE_ID; msg->seqno = seqno; msg->data = 0xCAFE; msg->parent = parent; msg->hopcount = 0; msg->metric = metric; if (call Send.send(&packet, sizeof(TestNetworkMsg)) != SUCCESS) { failedSend(); call Leds.led0On(); dbg("TestNetworkC", "%s: Transmission failed.\n", __FUNCTION__); } else { sendBusy = TRUE; seqno++; dbg("TestNetworkC", "%s: Transmission succeeded.\n", __FUNCTION__); } } event void Timer.fired() { uint32_t nextInt; call Leds.led0Toggle(); dbg("TestNetworkC", "TestNetworkC: Timer fired.\n"); nextInt = call Random.rand32() % SEND_INTERVAL; nextInt += SEND_INTERVAL >> 1; call Timer.startOneShot(nextInt); if (!sendBusy) sendMessage(); } event void Send.sendDone(message_t* m, error_t err) { if (err != SUCCESS) { // call Leds.led0On(); } sendBusy = FALSE; dbg("TestNetworkC", "Send completed.\n"); } event void DisseminationPeriod.changed() { const uint32_t* newVal = call DisseminationPeriod.get(); call Timer.stop(); call Timer.startPeriodic(*newVal); } event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { dbg("TestNetworkC", "Received packet at %s from node %hhu.\n", sim_time_string(), call CollectionPacket.getOrigin(msg)); call Leds.led1Toggle(); if (!call Pool.size() <= (TEST_NETWORK_QUEUE_SIZE < 4)? 1:3) { // call CtpCongestion.setClientCongested(TRUE); } if (!call Pool.empty() && call Queue.size() < call Queue.maxSize()) { message_t* tmp = call Pool.get(); call Queue.enqueue(msg); if (!uartbusy) { post uartEchoTask(); } return tmp; } return msg; } task void uartEchoTask() { dbg("Traffic", "Sending packet to UART.\n"); if (call Queue.empty()) { return; } else if (!uartbusy) { message_t* msg = call Queue.dequeue(); dbg("Traffic", "Sending packet to UART.\n"); if (call UARTSend.send(0xffff, msg, call RadioPacket.payloadLength(msg)) == SUCCESS) { uartbusy = TRUE; } else { call CollectionDebug.logEventMsg(NET_C_DBG_2, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); } } } event void UARTSend.sendDone(message_t *msg, error_t error) { dbg("Traffic", "UART send done.\n"); uartbusy = FALSE; call Pool.put(msg); if (!call Queue.empty()) { post uartEchoTask(); } else { // call CtpCongestion.setClientCongested(FALSE); } } /* Default implementations for CollectionDebug calls. * These allow CollectionDebug not to be wired to anything if debugging * is not desired. */ default command error_t CollectionDebug.logEvent(uint8_t type) { return SUCCESS; } default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) { return SUCCESS; } default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) { return SUCCESS; } default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) { return SUCCESS; } default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) { return SUCCESS; } } tinyos-2.1.2+dfsg/apps/tests/TestNetworkLpl/ctp-dump.py000077500000000000000000000031571207233610700231430ustar00rootroot00000000000000#!/usr/bin/env python import sys, time import tos class Test(tos.Packet): def __init__(self, payload = None): tos.Packet.__init__(self, [('source', 'int', 2), ('seqno', 'int', 2), ('parent', 'int', 2), ('metric', 'int', 2), ('data', 'int', 2), ('hopcount', 'int', 1), ('sendCount','int', 2), ('sendSuccessCount','int', 2)], payload) class CtpData(tos.Packet): def __init__(self, payload = None): tos.Packet.__init__(self, [('options', 'int', 1), ('thl', 'int', 1), ('etx', 'int', 2), ('origin', 'int', 2), ('originSeqNo', 'int', 1), ('collectionId','int', 1), ('data', 'blob', None)], payload) if len(sys.argv) < 2: print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600" sys.exit() #s = tos.Serial(sys.argv[1], int(sys.argv[2]), debug=False) am = tos.AM() while True: p = am.read() if p: if p.type == 238: ts = "%.4f" % time.time() ctp = CtpData(p.data) test = Test(ctp.data) print ts, '\t', ctp print ts, '\t', test else: print p tinyos-2.1.2+dfsg/apps/tests/TestRPL/000077500000000000000000000000001207233610700173635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestRPL/udp/000077500000000000000000000000001207233610700201535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestRPL/udp/LocalIeeeEui64C.nc000066400000000000000000000013241207233610700232370ustar00rootroot00000000000000#include "PlatformIeeeEui64.h" module LocalIeeeEui64C { provides interface LocalIeeeEui64; } implementation { command ieee_eui64_t LocalIeeeEui64.getId() { ieee_eui64_t eui; eui.data[0] = IEEE_EUI64_COMPANY_ID_0; eui.data[1] = IEEE_EUI64_COMPANY_ID_1; eui.data[2] = IEEE_EUI64_COMPANY_ID_2; // 16 bits of the ID is generated by software // could be used for hardware model id and revision, for example eui.data[3] = IEEE_EUI64_SERIAL_ID_0; eui.data[4] = IEEE_EUI64_SERIAL_ID_1; eui.data[5] = 0; //eui.data[4] = TOS_NODE_ID << 8; //eui.data[5] = TOS_NODE_ID; //eui.data[6] = TOS_NODE_ID << 8; eui.data[6] = 0; eui.data[7] = TOS_NODE_ID; return eui; } } tinyos-2.1.2+dfsg/apps/tests/TestRPL/udp/Makefile000066400000000000000000000016341207233610700216170ustar00rootroot00000000000000COMPONENT=TestRPLAppC # NB : # DEFAULT_LOCAL_GROUP=0xabcd # radio settings CFLAGS+=-DCC2420_DEF_CHANNEL=25 CFLAGS+=-DCC2520_DEF_CHANNEL=25 # enable RPL CFLAGS+=-DRPL_ROUTING -DRPL_STORING_MODE -I$(LOWPAN_ROOT)/tos/lib/net/rpl # but not MRHOF # CFLAGS+=-DRPL_OF_MRHOF # use short addresses so it's easier to debug CFLAGS+=-DBLIP_DERIVE_SHORTADDRS # the sleep interval needs to be set the same for all participating devices # CFLAGS += -DLOW_POWER_LISTENING -DLPL_SLEEP_INTERVAL=200 # also modifiy blip's L2 parameters to reduce media overload CFLAGS +=-DBLIP_L2_RETRIES=3 -DBLIP_L2_DELAY=103 # 5 second packet generation interval CFLAGS+=-DPACKET_INTERVAL=5120UL CFLAGS+=-DRPL_ROOT_ADDR=11 #USE_CPPOPT = -fno-rtti -fno-exceptions #PFLAGS+=-DIN6_PREFIX=\"fec0::\" PFLAGS+=-DIN6_PREFIX=\"aaaa::/64\" # enable printf CFLAGS += -DNEW_PRINTF_SEMANTICS -DPRINTFUART_ENABLED -DPRINTF_BUFFER_SIZE=1024 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestRPL/udp/TestRPL.h000066400000000000000000000002441207233610700216210ustar00rootroot00000000000000#ifndef TEST_RPL_H #define TEST_RPL_H typedef nx_struct radio_count_msg { nx_uint16_t counter; } radio_count_msg_t; enum { AM_RADIO_COUNT_MSG = 6, }; #endif tinyos-2.1.2+dfsg/apps/tests/TestRPL/udp/TestRPLAppC.nc000066400000000000000000000056551207233610700225510ustar00rootroot00000000000000// $Id: RadioCountToLedsAppC.nc,v 1.4 2006/12/12 18:22:48 vlahan Exp $ /* tab:4 * "Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "TestRPL.h" #include "printf.h" /** * Configuration for the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. * * @author Philip Levis * @date June 6 2005 */ configuration TestRPLAppC {} implementation { components MainC, TestRPLC as App, LedsC; components new TimerMilliC(); components new TimerMilliC() as Timer; components RandomC; components RPLRankC; components RPLRoutingEngineC; components IPDispatchC; //components RPLForwardingEngineC; components RPLDAORoutingEngineC; components IPStackC; components IPProtocolsP; App.Boot -> MainC.Boot; App.SplitControl -> IPStackC;//IPDispatchC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.RPLRoute -> RPLRoutingEngineC; App.RootControl -> RPLRoutingEngineC; App.RoutingControl -> RPLRoutingEngineC; components new UdpSocketC() as RPLUDP; App.RPLUDP -> RPLUDP; App.RPLDAO -> RPLDAORoutingEngineC; App.Timer -> Timer; App.Random -> RandomC; #ifdef RPL_ROUTING components RPLRoutingC; #endif #ifdef PRINTFUART_ENABLED components PrintfC; components SerialStartC; #endif //components LcdC; //App.Lcd -> LcdC; //App.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/TestRPL/udp/TestRPLC.nc000066400000000000000000000116641207233610700221050ustar00rootroot00000000000000// $Id: RadioCountToLedsC.nc,v 1.6 2008/06/24 05:32:31 regehr Exp $ /* tab:4 * "Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Timer.h" #include "TestRPL.h" #include "lib6lowpan/ip.h" //#include "color.h" #include "blip_printf.h" /** * Implementation of the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. * * @author Philip Levis * @date June 6 2005 */ module TestRPLC @safe() { uses { interface Leds; interface Boot; interface Timer as MilliTimer; interface Timer as Timer; interface RPLRoutingEngine as RPLRoute; interface RootControl; interface StdControl as RoutingControl; interface SplitControl; //interface IP as RPL; interface UDP as RPLUDP; //interface RPLForwardingEngine; interface RPLDAORoutingEngine as RPLDAO; interface Random; //interface Lcd; //interface Draw; } } implementation { #ifndef RPL_ROOT_ADDR #define RPL_ROOT_ADDR 1 #endif #define UDP_PORT 5678 //uint8_t payload[10]; //struct in6_addr dest; struct in6_addr MULTICAST_ADDR; bool locked; uint16_t counter = 0; event void Boot.booted() { memset(MULTICAST_ADDR.s6_addr, 0, 16); MULTICAST_ADDR.s6_addr[0] = 0xFF; MULTICAST_ADDR.s6_addr[1] = 0x2; MULTICAST_ADDR.s6_addr[15] = 0x1A; //call Lcd.initialize(); if(TOS_NODE_ID == RPL_ROOT_ADDR){ call RootControl.setRoot(); } call RoutingControl.start(); //call RoutingControl.start(); call SplitControl.start(); call RPLUDP.bind(UDP_PORT); } /* event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone() { } */ uint32_t countrx = 0; uint32_t counttx = 0; event void RPLUDP.recvfrom(struct sockaddr_in6 *from, void *payload, uint16_t len, struct ip6_metadata *meta){ nx_uint16_t temp[10]; memcpy(temp, (uint8_t*)payload, len); call Leds.led2Toggle(); printf(">>>> RX %d %d %d %lu \n", TOS_NODE_ID, temp[0], temp[9], ++countrx); printfflush(); } event void SplitControl.startDone(error_t err){ while( call RPLDAO.startDAO() != SUCCESS ); if(TOS_NODE_ID != RPL_ROOT_ADDR){ call Timer.startOneShot((call Random.rand16()%2)*2048U); } } event void Timer.fired(){ call MilliTimer.startOneShot(PACKET_INTERVAL + (call Random.rand16() % 100)); } task void sendTask(){ struct sockaddr_in6 dest; nx_uint16_t temp[10]; uint8_t i; //call Draw.fill(COLOR_BLACK); for(i=0;i<10;i++){ temp[i] = 0xABCD; } temp[0] = TOS_NODE_ID; temp[9] = counttx; memcpy(dest.sin6_addr.s6_addr, call RPLRoute.getDodagId(), sizeof(struct in6_addr)); if(dest.sin6_addr.s6_addr[15] != 0) // destination is set as root! ++counttx; //if(dest.sin6_addr.s6_addr[0] == 0xAA) call Leds.led0Toggle(); dest.sin6_port = htons(UDP_PORT); printf("Generate Packet at %d \n", TOS_NODE_ID); call RPLUDP.sendto(&dest, temp, 20); } event void MilliTimer.fired(){ //call Leds.led1Toggle(); call MilliTimer.startOneShot(PACKET_INTERVAL + (call Random.rand16() % 100)); post sendTask(); } event void SplitControl.stopDone(error_t err){} } tinyos-2.1.2+dfsg/apps/tests/TestSerial/000077500000000000000000000000001207233610700201455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestSerial/Makefile000066400000000000000000000005671207233610700216150ustar00rootroot00000000000000COMPONENT=TestSerialAppC BUILD_EXTRA_DEPS += TestSerial.class CLEAN_EXTRA = *.class TestSerialMsg.java CFLAGS += -I$(TOSDIR)/lib/T2Hack TestSerial.class: $(wildcard *.java) TestSerialMsg.java javac -target 1.4 -source 1.4 *.java TestSerialMsg.java: mig java -target=null $(CFLAGS) -java-classname=TestSerialMsg TestSerial.h test_serial_msg -o $@ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestSerial/README.txt000066400000000000000000000017121207233610700216440ustar00rootroot00000000000000README for TestSerial Author/Contact: tinyos-help@millennium.berkeley.edu Description: TestSerial is a simple application that may be used to test that the TinyOS java toolchain can communicate with a mote over the serial port. The java application sends packets to the serial port at 1Hz: the packet contains an incrementing counter. When the mote application receives a counter packet, it displays the bottom three bits on its LEDs. (This application is similar to RadioCountToLeds, except that it operates over the serial port.) Likewise, the mote also sends packets to the serial port at 1Hz. Upon reception of a packet, the java application prints the counter's value to standard out. Java Application Usage: java TestSerial [-comm ] If not specified, the defaults to sf@localhost:9002 or to your MOTECOM environment variable (if defined). Python Usage: tos-dump /dev/ttyUSB0 57600 Tools: Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/TestSerial/TestSerial.h000066400000000000000000000002561207233610700224000ustar00rootroot00000000000000 #ifndef TEST_SERIAL_H #define TEST_SERIAL_H typedef nx_struct test_serial_msg { nx_uint16_t counter; } test_serial_msg_t; enum { AM_TEST_SERIAL_MSG = 0x89, }; #endif tinyos-2.1.2+dfsg/apps/tests/TestSerial/TestSerial.java000066400000000000000000000067231207233610700230770ustar00rootroot00000000000000/* tab:4 * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Java-side application for testing serial port communication. * * * @author Phil Levis * @date August 12 2005 */ import java.io.IOException; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class TestSerial implements MessageListener { private MoteIF moteIF; public TestSerial(MoteIF moteIF) { this.moteIF = moteIF; this.moteIF.registerListener(new TestSerialMsg(), this); } public void sendPackets() { int counter = 0; TestSerialMsg payload = new TestSerialMsg(); try { while (true) { System.out.println("Sending packet " + counter); payload.set_counter(counter); moteIF.send(0, payload); counter++; try {Thread.sleep(1000);} catch (InterruptedException exception) {} } } catch (IOException exception) { System.err.println("Exception thrown when sending packets. Exiting."); System.err.println(exception); } } public void messageReceived(int to, Message message) { TestSerialMsg msg = (TestSerialMsg)message; System.out.println("Received packet sequence number " + msg.get_counter()); } private static void usage() { System.err.println("usage: TestSerial [-comm ]"); } public static void main(String[] args) throws Exception { String source = null; if (args.length == 2) { if (!args[0].equals("-comm")) { usage(); System.exit(1); } source = args[1]; } else if (args.length != 0) { usage(); System.exit(1); } PhoenixSource phoenix; if (source == null) { phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); } else { phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); } MoteIF mif = new MoteIF(phoenix); TestSerial serial = new TestSerial(mif); serial.sendPackets(); } } tinyos-2.1.2+dfsg/apps/tests/TestSerial/TestSerialAppC.nc000066400000000000000000000061001207233610700233070ustar00rootroot00000000000000// $Id: TestSerialAppC.nc,v 1.6 2010-06-29 22:07:25 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Application to test that the TinyOS java toolchain can communicate * with motes over the serial port. The application sends packets to * the serial port at 1Hz: the packet contains an incrementing * counter. When the application receives a counter packet, it * displays the bottom three bits on its LEDs. This application is * very similar to RadioCountToLeds, except that it operates over the * serial port. There is Java application for testing the mote * application: run TestSerial to print out the received packets and * send packets to the mote. * * @author Gilman Tolle * @author Philip Levis * * @date Aug 12 2005 * **/ #include "TestSerial.h" configuration TestSerialAppC {} implementation { components TestSerialC as App, LedsC, MainC; components SerialActiveMessageC as AM; components new TimerMilliC(); App.Boot -> MainC.Boot; App.Control -> AM; App.Receive -> AM.Receive[AM_TEST_SERIAL_MSG]; App.AMSend -> AM.AMSend[AM_TEST_SERIAL_MSG]; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> AM; } tinyos-2.1.2+dfsg/apps/tests/TestSerial/TestSerialC.nc000066400000000000000000000077141207233610700226620ustar00rootroot00000000000000// $Id: TestSerialC.nc,v 1.7 2010-06-29 22:07:25 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Application to test that the TinyOS java toolchain can communicate * with motes over the serial port. * * @author Gilman Tolle * @author Philip Levis * * @date Aug 12 2005 * **/ #include "Timer.h" #include "TestSerial.h" module TestSerialC { uses { interface SplitControl as Control; interface Leds; interface Boot; interface Receive; interface AMSend; interface Timer as MilliTimer; interface Packet; } } implementation { message_t packet; bool locked = FALSE; uint16_t counter = 0; event void Boot.booted() { call Control.start(); } event void MilliTimer.fired() { counter++; if (locked) { return; } else { test_serial_msg_t* rcm = (test_serial_msg_t*)call Packet.getPayload(&packet, sizeof(test_serial_msg_t)); if (rcm == NULL) {return;} if (call Packet.maxPayloadLength() < sizeof(test_serial_msg_t)) { return; } rcm->counter = counter; if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(test_serial_msg_t)) == SUCCESS) { locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { if (len != sizeof(test_serial_msg_t)) {return bufPtr;} else { test_serial_msg_t* rcm = (test_serial_msg_t*)payload; if (rcm->counter & 0x1) { call Leds.led0On(); } else { call Leds.led0Off(); } if (rcm->counter & 0x2) { call Leds.led1On(); } else { call Leds.led1Off(); } if (rcm->counter & 0x4) { call Leds.led2On(); } else { call Leds.led2Off(); } return bufPtr; } } event void AMSend.sendDone(message_t* bufPtr, error_t error) { if (&packet == bufPtr) { locked = FALSE; } } event void Control.startDone(error_t err) { if (err == SUCCESS) { call MilliTimer.startPeriodic(1000); } } event void Control.stopDone(error_t err) {} } tinyos-2.1.2+dfsg/apps/tests/TestSerialPrintf/000077500000000000000000000000001207233610700213305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestSerialPrintf/Makefile000066400000000000000000000001121207233610700227620ustar00rootroot00000000000000COMPONENT=TestAppC PFLAGS += -I$(TOSDIR)/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestSerialPrintf/TestAppC.nc000066400000000000000000000036631207233610700233450ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Trivial test application for the SerialPrintfC component. * * The application will loop continuously printing a message and a * incrementing serial number to the console. * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP; components MainC; TestP.Boot -> MainC; components SerialPrintfC; } tinyos-2.1.2+dfsg/apps/tests/TestSerialPrintf/TestP.nc000066400000000000000000000037251207233610700227200ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include #include module TestP @safe() { uses interface Boot; } implementation { event void Boot.booted() { int ctr = 0; while (++ctr) { volatile uint16_t idlectr = 0; printf("Hello iteration %d\n", ctr); /* "Portable" arbitrary delay, just to reduce the stream going * to the serial port. */ while (++idlectr) { ; } } } } tinyos-2.1.2+dfsg/apps/tests/TestSimComm/000077500000000000000000000000001207233610700202725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestSimComm/Makefile000066400000000000000000000000561207233610700217330ustar00rootroot00000000000000COMPONENT=TestCommAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestSimComm/README000066400000000000000000000046341207233610700211610ustar00rootroot00000000000000TestSimComm, 5/22/07 This application tests the TOSSIM radio model by setting up a simple hidden terminal case. It checks whether packets collide correctly and whether SNR thresholds work correctly.. The relevant output channel is "TestComm". There are three test cases: test-equal.py: Tests whether two nodes that are hidden terminals cause collisions. The two nodes have equal signal strengths, so a collision should corrupt both packets. If one packet is lost due to a collision, the other should be too. Note that packets can be lost in the absence of collisions due to external interference. test-unequal.py: Tests whether two nodes that are hidden terminals cause collisions. The two nodes have signal strengths that differ by 10dB, and node 1 is stronger. This means that node 2 should hear node 1's packets if they start first, but not second. If a packet from node 1 is lost, the packet from node 3 should be as well. However, a loss from node 3 does not imply a loss from node 1, as it is stronger. test-asym.py: Tests whether asymmetric links can have high delivery rates but low acknowledgement rates. Checks that acknowledgements follow SNR curves properly. In this test, both 1 and 3 have high quality links (-60 dBm) to node 2, but the reverse links (2 to 1 and 2 to 3) are much worse (-80 dBm). You should see packet deliveries like test-equal.py but few acknowledgements. The ./run script runs all the three tests and counts the number of ACKed and non-ACKed send packets. The output will look something like this: test-equal.log ACK NOACK total 1 21197 19666 40863 3 21320 19543 40863 test-asym.log ACK NOACK total 1 4930 35923 40853 3 4983 35870 40853 test-unequal.log ACK NOACK total 1 27619 12966 40585 3 21040 19545 40585 ACK is the number of acknowledged packets from that node to node 2; NOACK is the number of unacknowledged packets. Total is the sum. The output should show three things: 1) In test-equal, both node 1 and node 3 have very similar delivery ratios, losing about half of their packets. 2) In test-asym, the number of ACKs is much less than in test-equal because the reverse links are poor. 3) In test-unequal, node 1 has more acknowledged packets than node 3, because it has a higher SNR link. Philip Levis tinyos-2.1.2+dfsg/apps/tests/TestSimComm/TestCommAppC.nc000066400000000000000000000062411207233610700231160ustar00rootroot00000000000000// $Id: TestCommAppC.nc,v 1.4 2010-06-29 22:07:25 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * This application sends a single active message broadcast if it has * address 0, and then starts a timer at 1Hz. If it has any address * other than 0, it starts a timer at 1 Hz upon receiving a broadcast * message. The idea is to have one base station with address 0 send * out a broadacst message to synchronize itself with all receivers. * All Leds from the base station and any receivers of the broadcast * should blink together. * It uses the radio HIL component * ActiveMessageC, and its packets are AM type 240. * * @author Phil Levis * @author Kevin Klues * @date Nov 7 2005 */ configuration TestCommAppC {} implementation { enum { AM_TEST = 133 }; components MainC, TestCommC as App, RandomC, ActiveMessageC, TossimActiveMessageC; components new TimerMilliC(), new AMSenderC(AM_TEST), new AMReceiverC(AM_TEST); App.Boot -> MainC.Boot; App.SplitControl -> ActiveMessageC; App.Timer -> TimerMilliC; App.AMSend -> AMSenderC; App.Receive -> AMReceiverC; App.Random -> RandomC; App.AMPacket -> AMSenderC; App.PacketAcknowledgements -> AMSenderC; App.TossimPacket -> TossimActiveMessageC; } tinyos-2.1.2+dfsg/apps/tests/TestSimComm/TestCommC.nc000066400000000000000000000072431207233610700224600ustar00rootroot00000000000000// $Id: TestCommC.nc,v 1.4 2010-06-29 22:07:25 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation of the TestTimer application. * * @author Phil Levis * @date April 7 2007 * **/ module TestCommC { uses { interface Boot; interface Timer as Timer; interface Receive; interface AMSend; interface Random; interface SplitControl; interface AMPacket; interface PacketAcknowledgements; interface TossimPacket; } } implementation { message_t packet; uint8_t busy; event void Boot.booted() { dbg("TestComm", "Booted @ %s.\n", sim_time_string()); call SplitControl.start(); } event void SplitControl.startDone(error_t e) { if (TOS_NODE_ID == 1 || TOS_NODE_ID == 3) { call Timer.startPeriodic(128); } } event void SplitControl.stopDone(error_t e) { } event void Timer.fired() { if (!busy) { call PacketAcknowledgements.requestAck(&packet); if (call AMSend.send(2, &packet, call AMSend.maxPayloadLength()) == SUCCESS) { dbg("TestComm", "Send succeeded @ %s\n", sim_time_string()); busy = TRUE; } else { dbg("TestComm", "Send failed at @ %s\n", sim_time_string()); } } else { dbg("TestComm", "Send when busy at @ %s\n", sim_time_string()); } } event void AMSend.sendDone(message_t* m, error_t s) { dbg("TestComm", "Send completed with %s @ %s\n", call PacketAcknowledgements.wasAcked(m)? "ACK":"NOACK", sim_time_string()); busy = FALSE; } event message_t* Receive.receive(message_t* msg, void* p, uint8_t l) { dbg("TestComm", "Received message from %hu @ %s with strength %hhi\n", call AMPacket.source(msg), sim_time_string(), call TossimPacket.strength(msg)); return msg; } } tinyos-2.1.2+dfsg/apps/tests/TestSimComm/meyer-short.txt000066400000000000000000000076331207233610700233220ustar00rootroot00000000000000-41 -41 -41 -41 -41 -41 -41 -91 -41 -41 -41 -41 -41 -48 -41 -41 -41 -83 -98 -80 -80 -79 -79 -79 -79 -98 -79 -80 -79 -80 -80 -80 -83 -83 -83 -83 -82 -82 -41 -82 -82 -82 -82 -82 -82 -41 -94 -93 -93 -87 -89 -90 -45 -92 -85 -98 -80 -80 -79 -78 -79 -79 -79 -97 -94 -83 -81 -80 -82 -81 -81 -84 -84 -86 -98 -89 -79 -79 -79 -79 -79 -79 -57 -79 -79 -79 -79 -79 -79 -79 -41 -84 -96 -97 -79 -90 -98 -79 -79 -79 -79 -79 -79 -92 -83 -83 -82 -81 -83 -80 -85 -82 -81 -82 -82 -82 -82 -41 -82 -82 -82 -82 -82 -82 -83 -82 -82 -82 -82 -82 -98 -98 -79 -79 -79 -79 -79 -78 -97 -91 -96 -91 -82 -82 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-82 -86 -85 -85 -85 -85 -86 -86 -85 -86 -86 -98 -96 -96 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -79 -81 -80 -48 -90 -89 -79 -93 -91 -95 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -98 -95 -98 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -41 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -96 -98 -98 -99 -71 -98 -98 -99 -98 -98 -98 -98 -98 tinyos-2.1.2+dfsg/apps/tests/TestSimComm/run000077500000000000000000000007541207233610700210320ustar00rootroot00000000000000#!/bin/bash make micaz sim for t in test-equal.py test-asym.py test-unequal.py do echo Running $t... python $t > `basename $t .py`.log done make clean for l in test-equal.log test-asym.log test-unequal.log do echo $l echo -e '\t ACK \t\t NOACK \t total' for i in 1 3 do N1=`grep 'Send completed' $l | grep ' ACK' | grep "($i)" | wc -l` N2=`grep 'Send completed' $l | grep 'NOACK' | grep "($i)" | wc -l` echo -e "\t $i $N1 \t $N2 \t" `expr $N1 + $N2` done done tinyos-2.1.2+dfsg/apps/tests/TestSimComm/test-asym.py000066400000000000000000000017331207233610700225760ustar00rootroot00000000000000from TOSSIM import * import sys import time t = Tossim([]) r = t.radio(); t.addChannel("TestComm", sys.stdout) t.addChannel("SNRLoss", sys.stdout) #t.addChannel("Acks", sys.stdout) #t.addChannel("Gain", sys.stdout) #t.addChannel("CpmModelC", sys.stdout) #t.addChannel("AM", sys.stdout) start = time.time(); m1 = t.getNode(1) m2 = t.getNode(2) m3 = t.getNode(3) # Set up a hidden terminal problem, where 1 and 3 # are closely synchronized, but cannot hear each other. m1.bootAtTime(345321); m2.bootAtTime(82123411); m3.bootAtTime(345325); r.add(1, 2, -60.0); r.add(2, 1, -80.0); r.add(3, 2, -60.0); r.add(2, 3, -80.0); noise = open("meyer-short.txt", "r") lines = noise.readlines() for line in lines: str = line.strip() if (str != ""): val = int(str) m1.addNoiseTraceReading(val) m2.addNoiseTraceReading(val) m3.addNoiseTraceReading(val) m1.createNoiseModel() m2.createNoiseModel() m3.createNoiseModel() for i in range(0, 200000): t.runNextEvent(); tinyos-2.1.2+dfsg/apps/tests/TestSimComm/test-equal.py000066400000000000000000000017331207233610700227340ustar00rootroot00000000000000from TOSSIM import * import sys import time t = Tossim([]) r = t.radio(); t.addChannel("TestComm", sys.stdout) t.addChannel("SNRLoss", sys.stdout) #t.addChannel("Acks", sys.stdout) #t.addChannel("Gain", sys.stdout) #t.addChannel("CpmModelC", sys.stdout) #t.addChannel("AM", sys.stdout) start = time.time(); m1 = t.getNode(1) m2 = t.getNode(2) m3 = t.getNode(3) # Set up a hidden terminal problem, where 1 and 3 # are closely synchronized, but cannot hear each other. m1.bootAtTime(345321); m2.bootAtTime(82123411); m3.bootAtTime(345325); r.add(1, 2, -60.0); r.add(2, 1, -60.0); r.add(2, 3, -60.0); r.add(3, 2, -60.0); noise = open("meyer-short.txt", "r") lines = noise.readlines() for line in lines: str = line.strip() if (str != ""): val = int(str) m1.addNoiseTraceReading(val) m2.addNoiseTraceReading(val) m3.addNoiseTraceReading(val) m1.createNoiseModel() m2.createNoiseModel() m3.createNoiseModel() for i in range(0, 200000): t.runNextEvent(); tinyos-2.1.2+dfsg/apps/tests/TestSimComm/test-unequal.py000066400000000000000000000017321207233610700232760ustar00rootroot00000000000000from TOSSIM import * import sys import time t = Tossim([]) r = t.radio(); t.addChannel("TestComm", sys.stdout) t.addChannel("SNRLoss", sys.stdout) #t.addChannel("Acks", sys.stdout) #t.addChannel("Gain", sys.stdout) #t.addChannel("CpmModelC", sys.stdout) #t.addChannel("AM", sys.stdout) start = time.time(); m1 = t.getNode(1) m2 = t.getNode(2) m3 = t.getNode(3) # Set up a hidden terminal problem, where 1 and 3 # are closely synchronized, but cannot hear each other. m1.bootAtTime(345321); m2.bootAtTime(82123411); m3.bootAtTime(345325); r.add(1, 2, -50.0); r.add(2, 1, -50.0); r.add(2, 3, -60.0); r.add(3, 2, -60.0); noise = open("meyer-short.txt", "r") lines = noise.readlines() for line in lines: str = line.strip() if (str != ""): val = int(str) m1.addNoiseTraceReading(val) m2.addNoiseTraceReading(val) m3.addNoiseTraceReading(val) m1.createNoiseModel() m2.createNoiseModel() m3.createNoiseModel() for i in range(0, 200000): t.runNextEvent(); tinyos-2.1.2+dfsg/apps/tests/TestSrp/000077500000000000000000000000001207233610700174725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/TestSrp/Makefile000066400000000000000000000001211207233610700211240ustar00rootroot00000000000000COMPONENT=TestSrpAppC CFLAGS += -I$(TOSDIR)/lib/net/srp include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/TestSrp/TestSrpAppC.nc000066400000000000000000000033301207233610700221630ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ #include configuration TestSrpAppC{ } implementation { components TestSrpC, MainC; TestSrpC.Boot -> MainC; } tinyos-2.1.2+dfsg/apps/tests/TestSrp/TestSrpC.nc000066400000000000000000000043271207233610700215310ustar00rootroot00000000000000/** * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ configuration TestSrpC { uses { interface Boot; } } implementation { components TestSrpP; components new TimerMilliC() as Timer; components RandomC; components ActiveMessageC; components SourceRoutingC; components new SourceRouteSenderC(1); components new SourceRouteReceiverC(1); TestSrpP.Boot = Boot; TestSrpP.RadioSplitControl -> ActiveMessageC.SplitControl; TestSrpP.Timer -> Timer; TestSrpP.Random -> RandomC; TestSrpP.SourceRouteSend -> SourceRouteSenderC.SourceRouteSend; TestSrpP.Receive -> SourceRouteReceiverC; TestSrpP.SourceRoutePacket -> SourceRouteSenderC.SourceRoutePacket; } tinyos-2.1.2+dfsg/apps/tests/TestSrp/TestSrpP.nc000066400000000000000000000075111207233610700215440ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ module TestSrpP { uses { interface Boot; interface Timer; interface SourceRouteSend; interface SourceRoutePacket; interface Receive; interface Random; interface SplitControl as RadioSplitControl; } } implementation { message_t myMsg; uint8_t myCount = 0; #define SEND_INTERVAL 50 #define SEND_COUNT 200 typedef struct { uint8_t len; am_addr_t route[SRP_MAX_PATHLEN]; } test_route_t; test_route_t routes[6] = { {0, {}}, {3, {1,2,3}}, {2, {2,3}}, {0, {}}, {3, {4,2,3}}, {3, {5,2,3}}, }; typedef nx_struct { nx_uint8_t count; } test_payload_t; event void Boot.booted() { dbg("TestSrpP", "booted\n"); call RadioSplitControl.start(); } event void Timer.fired() { test_payload_t* payload; error_t err; myCount++; payload = ((test_payload_t*) call SourceRouteSend.getPayload(&myMsg, sizeof(test_payload_t))); payload -> count = myCount; //NOTE we don't want space allocated for the route outside of the header, so this is kind of awkward. //NOTE it seems bad that the sender needs to specify themselves, and also that the user needs to remember that a 1-hop path has 2 nodes in it. err = call SourceRouteSend.send(routes[TOS_NODE_ID].route, routes[TOS_NODE_ID].len , &myMsg, sizeof(test_payload_t)); dbg("TestSrpP", "Sending %d : %d\n",myCount, err); } event void SourceRouteSend.sendDone(message_t* msg, error_t error) { //dbg("TestSrpP", "SendDone: %d\n", error); if (myCount < SEND_COUNT) { call Timer.startOneShot(call Random.rand16() % SEND_INTERVAL); } } event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { test_payload_t* tPayload; //dbg("TestSrpP", "Receive msg %p payload %p\n", msg, payload); tPayload = (test_payload_t*) payload; dbg("TestSrpP","Receive p->count %d from %d \n", tPayload->count, (call SourceRoutePacket.getRoute(msg))[0]); return msg; } event void RadioSplitControl.startDone(error_t error) { dbg("TestSrpP", "Radio startDone %d\n", error); if (routes[TOS_NODE_ID].len > 0 ) { call Timer.startOneShot(call Random.rand16() % SEND_INTERVAL); } } event void RadioSplitControl.stopDone(error_t error) { } } tinyos-2.1.2+dfsg/apps/tests/TestSrp/sim.py000066400000000000000000000014371207233610700206410ustar00rootroot00000000000000import TOSSIM import sys t = TOSSIM.Tossim([]) m = t.mac() r = t.radio() t.init() t.addChannel("TestSrpP", sys.stdout) #t.addChannel("SourceRouteEngineP", sys.stdout) #t.addChannel("SRPDebug", sys.stdout) #t.addChannel("SRPInfo", sys.stdout) t.addChannel("SRPError", sys.stdout) f = open("topo.txt", "r") lines = f.readlines() edges = {} for [src, dest, gain] in [line.split()[1:] for line in lines if line.startswith("gain")]: src = int(src) dest = int(dest) r.add(src, dest, float(gain)) edges[src] = edges.get(src, [])+[dest] for nodeId in edges: n = t.getNode(nodeId) for i in range(100): n.addNoiseTraceReading(-105) n.createNoiseModel() n.bootAtTime(t.ticksPerSecond()/4 * nodeId ) while t.time() / t.ticksPerSecond() < 300: t.runNextEvent() tinyos-2.1.2+dfsg/apps/tests/TestSrp/topo.txt000066400000000000000000000003001207233610700212050ustar00rootroot00000000000000# 3 # | # 2 # / | \ # 1 4 5 gain 1 2 0 gain 2 1 0 gain 3 2 0 gain 2 3 0 gain 4 2 0 gain 2 4 0 gain 5 2 0 gain 2 5 0 tinyos-2.1.2+dfsg/apps/tests/arbiters/000077500000000000000000000000001207233610700177015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/arbiters/TestFcfsArbiter/000077500000000000000000000000001207233610700227335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/arbiters/TestFcfsArbiter/Makefile000066400000000000000000000001031207233610700243650ustar00rootroot00000000000000COMPONENT=TestFcfsArbiterAppC OPTFLAGS = -O0 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/arbiters/TestFcfsArbiter/README.txt000066400000000000000000000023671207233610700244410ustar00rootroot00000000000000README for TestFcfsArbiter Author/Contact: tinyos-help@millennium.berkeley.edu @author Kevin Klues Description: Please refer to TEP 108 for more information about the components this application is used to test. This application is used to test the functionality of the FcfsArbiter component developed using the Resource interface. Three Resource users are created and all three request control of the resource before any one of them is granted it. Once the first user is granted control of the resource, a timer is set to allow this user to have control of it for a specific amount of time. Once this timer expires, the resource is released and then immediately requested again. Upon releasing the resource control will be granted to the next user that has requested it in FCFS order. Initial requests are made by the three resource users in the following order. -- Resource 0 -- Resource 2 -- Resource 1 It is expected then that using a first-come-first-serve policy, control of the resource will be granted in the order of 0,2,1 and the Leds corresponding to each resource will flash whenever this occurs. -- Led 0 -> Resource 0 -- Led 1 -> Resource 1 -- Led 2 -> Resource 2 Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/arbiters/TestFcfsArbiter/TestFcfsArbiterAppC.nc000066400000000000000000000071321207233610700270560ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Please refer to TEP 108 for more information about the components * this application is used to test.

* * This application is used to test the functionality of the * FcfsArbiter component developed using the Resource * interface. Three Resource users are created and all three request * control of the resource before any one of them is granted it. * Once the first user is granted control of the resource, a timer * is set to allow this user to have control of it for a specific * amount of time. Once this timer expires, the resource is released * and then immediately requested again. Upon releasing the resource * control will be granted to the next user that has * requested it in FCFS order. Initial requests are made * by the three resource users in the following order
*
  • Resource 0 *
  • Resource 2 *
  • Resource 1 *
    * It is expected then that using a first-come-first-serve policy, control of the * resource will be granted in the order of 0,2,1 and the Leds * corresponding to each resource will flash whenever this occurs.
    *
  • Led 0 -> Resource 0 *
  • Led 1 -> Resource 1 *
  • Led 2 -> Resource 2 *
    * * @author Kevin Klues * @version $Revision: 1.2 $ * @date $Date: 2009-12-22 08:34:09 $ */ #define TEST_ARBITER_RESOURCE "Test.Arbiter.Resource" configuration TestFcfsArbiterAppC{ } implementation { components MainC, TestFcfsArbiterC as App,LedsC, new TimerMilliC() as Timer0, new TimerMilliC() as Timer1, new TimerMilliC() as Timer2, new FcfsArbiterC(TEST_ARBITER_RESOURCE) as Arbiter; enum { RESOURCE0_ID = unique(TEST_ARBITER_RESOURCE), RESOURCE1_ID = unique(TEST_ARBITER_RESOURCE), RESOURCE2_ID = unique(TEST_ARBITER_RESOURCE), }; App -> MainC.Boot; App.Resource0 -> Arbiter.Resource[RESOURCE0_ID]; App.Resource1 -> Arbiter.Resource[RESOURCE1_ID]; App.Resource2 -> Arbiter.Resource[RESOURCE2_ID]; App.Timer0 -> Timer0; App.Timer1 -> Timer1; App.Timer2 -> Timer2; App.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/arbiters/TestFcfsArbiter/TestFcfsArbiterC.nc000066400000000000000000000101171207233610700264120ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * Please refer to TEP 108 for more information about the components * this application is used to test * * This application is used to test the functionality of the * FcfsArbiter component developed using the Resource * interface. Three Resource users are created and all three request * control of the resource before any one of them is granted it. * Once the first user is granted control of the resource, a timer * is set to allow this user to have control of it for a specific * amount of time. Once this timer expires, the resource is released * and then immediately requested again. Upon releasing the resource * control will be granted to the next user that has * requested it in FCFS order. Initial requests are made * by the three resource users in the following order
    *
  • Resource 0 *
  • Resource 2 *
  • Resource 1 *
    * It is expected then that using a first-come-first-serve policy, control of the * resource will be granted in the order of 0,2,1 and the Leds * corresponding to each resource will flash whenever this occurs.
    *
  • Led 0 -> Resource 0 *
  • Led 1 -> Resource 1 *
  • Led 2 -> Resource 2 *
    * * @author Kevin Klues * @version $Revision: 1.2 $ * @date $Date: 2009-12-22 08:34:09 $ */ module TestFcfsArbiterC { uses { interface Boot; interface Leds; interface Resource as Resource0; interface Resource as Resource1; interface Resource as Resource2; interface Timer as Timer0; interface Timer as Timer1; interface Timer as Timer2; } } implementation { #define HOLD_PERIOD 250 //All resources try to gain access event void Boot.booted() { call Resource0.request(); call Resource2.request(); call Resource1.request(); } //If granted the resource, turn on an LED event void Resource0.granted() { call Timer0.startOneShot(HOLD_PERIOD); call Leds.led0Toggle(); } event void Resource1.granted() { call Timer1.startOneShot(HOLD_PERIOD); call Leds.led1Toggle(); } event void Resource2.granted() { call Timer2.startOneShot(HOLD_PERIOD); call Leds.led2Toggle(); } //After the hold period release the resource event void Timer0.fired() { call Resource0.release(); call Resource0.request(); } event void Timer1.fired() { call Resource1.release(); call Resource1.request(); } event void Timer2.fired() { call Resource2.release(); call Resource2.request(); } } tinyos-2.1.2+dfsg/apps/tests/arbiters/TestRoundRobinArbiter/000077500000000000000000000000001207233610700241335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/arbiters/TestRoundRobinArbiter/Makefile000066400000000000000000000001111207233610700255640ustar00rootroot00000000000000COMPONENT=TestRoundRobinArbiterAppC OPTFLAGS = -O0 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/arbiters/TestRoundRobinArbiter/README.txt000066400000000000000000000023771207233610700256420ustar00rootroot00000000000000README for TestRoundRobinArbiter Author/Contact: tinyos-help@millennium.berkeley.edu @author Kevin Klues Description: Please refer to TEP 108 for more information about the components this application is used to test. This application is used to test the functionality of the RoundRobinArbiter component developed using the Resource interface. Three Resource users are created and all three request control of the resource before any one of them is granted it. Once the first user is granted control of the resource, a timer is set to allow this user to have control of it for a specific amount of time. Once this timer expires, the resource is released and then immediately requested again. Upon releasing the resource control will be granted to the next user that has requested it in round robin order. Initial requests are made by the three resource users in the following order. -- Resource 0 -- Resource 2 -- Resource 1 It is expected then that using a round robin policy, control of the resource will be granted in the order of 0,1,2 and the Leds corresponding to each resource will flash whenever this occurs. -- Led 0 -> Resource 0 -- Led 1 -> Resource 1 -- Led 2 -> Resource 2 Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/arbiters/TestRoundRobinArbiter/TestRoundRobinArbiterAppC.nc000066400000000000000000000071631207233610700314620ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Please refer to TEP 108 for more information about the components * this application is used to test.

    * * This application is used to test the functionality of the * RoundRobinArbiter component developed using the Resource * interface. Three Resource users are created and all three request * control of the resource before any one of them is granted it. * Once the first user is granted control of the resource, a timer * is set to allow this user to have control of it for a specific * amount of time. Once this timer expires, the resource is released * and then immediately requested again. Upon releasing the resource * control will be granted to the next user that has * requested it in Round Robin order. Initial requests are made * by the three resource users in the following order
    *
  • Resource 0 *
  • Resource 2 *
  • Resource 1 *
    * It is expected then that using a round robin policy, control of the * resource will be granted in the order of 0,1,2, and the Leds * corresponding to each resource will flash whenever this occurs.
    *
  • Led 0 -> Resource 0 *
  • Led 1 -> Resource 1 *
  • Led 2 -> Resource 2 *
    * * @author Kevin Klues * @version $Revision: 1.2 $ * @date $Date: 2009-12-22 08:34:10 $ */ #define TEST_ARBITER_RESOURCE "Test.Arbiter.Resource" configuration TestRoundRobinArbiterAppC{ } implementation { components MainC, TestRoundRobinArbiterC as App,LedsC, new TimerMilliC() as Timer0, new TimerMilliC() as Timer1, new TimerMilliC() as Timer2, new RoundRobinArbiterC(TEST_ARBITER_RESOURCE) as Arbiter; enum { RESOURCE0_ID = unique(TEST_ARBITER_RESOURCE), RESOURCE1_ID = unique(TEST_ARBITER_RESOURCE), RESOURCE2_ID = unique(TEST_ARBITER_RESOURCE), }; App -> MainC.Boot; App.Resource0 -> Arbiter.Resource[RESOURCE0_ID]; App.Resource1 -> Arbiter.Resource[RESOURCE1_ID]; App.Resource2 -> Arbiter.Resource[RESOURCE2_ID]; App.Timer0 -> Timer0; App.Timer1 -> Timer1; App.Timer2 -> Timer2; App.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/arbiters/TestRoundRobinArbiter/TestRoundRobinArbiterC.nc000066400000000000000000000101301207233610700310050ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * Please refer to TEP 108 for more information about the components * this application is used to test * * This application is used to test the functionality of the * RoundRobinArbiter component developed using the Resource * interface. Three Resource users are created and all three request * control of the resource before any one of them is granted it. * Once the first user is granted control of the resource, a timer * is set to allow this user to have control of it for a specific * amount of time. Once this timer expires, the resource is released * and then immediately requested again. Upon releasing the resource * control will be granted to the next user that has * requested it in Round Robin order. Initial requests are made * by the three resource users in the following order
    *
  • Resource 0 *
  • Resource 2 *
  • Resource 1 *
    * It is expected then that using a round robin policy, control of the * resource will be granted in the order of 0,1,2, and the Leds * corresponding to each resource will flash whenever this occurs.
    *
  • Led 0 -> Resource 0 *
  • Led 1 -> Resource 1 *
  • Led 2 -> Resource 2 *
    * * @author Kevin Klues * @version $Revision: 1.2 $ * @date $Date: 2009-12-22 08:34:10 $ */ module TestRoundRobinArbiterC { uses { interface Boot; interface Leds; interface Resource as Resource0; interface Resource as Resource1; interface Resource as Resource2; interface Timer as Timer0; interface Timer as Timer1; interface Timer as Timer2; } } implementation { #define HOLD_PERIOD 250 //All resources try to gain access event void Boot.booted() { call Resource0.request(); call Resource2.request(); call Resource1.request(); } //If granted the resource, turn on an LED event void Resource0.granted() { call Timer0.startOneShot(HOLD_PERIOD); call Leds.led0Toggle(); } event void Resource1.granted() { call Timer1.startOneShot(HOLD_PERIOD); call Leds.led1Toggle(); } event void Resource2.granted() { call Timer2.startOneShot(HOLD_PERIOD); call Leds.led2Toggle(); } //After the hold period release the resource event void Timer0.fired() { call Resource0.release(); call Resource0.request(); } event void Timer1.fired() { call Resource1.release(); call Resource1.request(); } event void Timer2.fired() { call Resource2.release(); call Resource2.request(); } } tinyos-2.1.2+dfsg/apps/tests/blip/000077500000000000000000000000001207233610700170145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/blip/TestLinkLocal/000077500000000000000000000000001207233610700215245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/blip/TestLinkLocal/Makefile000066400000000000000000000002051207233610700231610ustar00rootroot00000000000000COMPONENT=TestLinkLocalAppC include $(MAKERULES) CFLAGS += -DIN6_NO_GLOBAL -DLIB6LOWPAN_HC_VERSION=-1 CFLAGS += -DPRINTFUART_ENABLED tinyos-2.1.2+dfsg/apps/tests/blip/TestLinkLocal/README.txt000066400000000000000000000026311207233610700232240ustar00rootroot00000000000000README for TestLinkLocal Author/Contact: Stephen Dawson-Haggerty Description: TestLinkLocal tests the basic Link-Local communication functionality of blip. It verifies that the radio is working, and address resolution is correct, and that 64-bit addressing mode works correctly. Build with: $ make epic blip Install on at least two motes -- the node ID's don't matter since they will use only 64-bit address mode. 1. Once per second, each mote transmits a packet (an echo request) to the link-local multicast all-nodes group (ff02::1). Led0 is toggled each time this happens. The source address is the node's link-local unicast address derived from an EUI-64. 2. All nodes receiving an echo request toggle Led1. They also reply to the echo request with a unicast packet to the originator. 3. Nodes receiving a unicast reply to one of their echo requests toggle Led2. Therefore, if everything is working, you should see Led0 and Led2 blinking together, and Led1 blinking in sequence with the other mote's transmission. This application can help troubleshoot problems with the header compression layer; to disable header compression, edit the Makefile to uncommment "-DLIB6LOWPAN_HC_VERSION=-1". Additional debugging output is availiable via printf; on Linux, you can examine it with $ stty -F /dev/ttyUSB0 57600 && tail -f /dev/ttyUSB0 Tools: Known bugs/limitations: tinyos-2.1.2+dfsg/apps/tests/blip/TestLinkLocal/TestLinkLocalAppC.nc000066400000000000000000000006721207233610700253270ustar00rootroot00000000000000/** Test the link-local communication in the blip stack */ configuration TestLinkLocalAppC { } implementation { components MainC, LedsC; components TestLinkLocalC; components IPStackC; components new TimerMilliC(); components new UdpSocketC(); TestLinkLocalC.Boot -> MainC; TestLinkLocalC.SplitControl -> IPStackC; TestLinkLocalC.Sock -> UdpSocketC; TestLinkLocalC.Timer -> TimerMilliC; TestLinkLocalC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/blip/TestLinkLocal/TestLinkLocalC.nc000066400000000000000000000030271207233610700246630ustar00rootroot00000000000000 #include #include module TestLinkLocalC { uses { interface Boot; interface SplitControl; interface UDP as Sock; interface Timer; interface Leds; } } implementation { nx_struct echo_state { nx_int8_t cmd; nx_uint32_t seqno; } m_data; enum { SVC_PORT = 10210, CMD_ECHO = 1, CMD_REPLY = 2, }; event void Boot.booted() { printfUART_init(); call SplitControl.start(); m_data.seqno = 0; } event void SplitControl.startDone(error_t e) { call Timer.startPeriodic(2048); call Sock.bind(SVC_PORT); } event void SplitControl.stopDone(error_t e) {} event void Timer.fired() { struct sockaddr_in6 dest; inet_pton6("ff02::1", &dest.sin6_addr); dest.sin6_port = htons(SVC_PORT); m_data.cmd = CMD_ECHO; m_data.seqno ++; call Sock.sendto(&dest, &m_data, sizeof(m_data)); call Leds.led0Toggle(); } event void Sock.recvfrom(struct sockaddr_in6 *src, void *payload, uint16_t len, struct ip6_metadata *meta) { nx_struct echo_state *cmd = payload; printfUART("TestLinkLocalC: recv from: "); printfUART_in6addr(&src->sin6_addr); printfUART("\n"); if (cmd->cmd == CMD_ECHO) { cmd->cmd = CMD_REPLY; call Sock.sendto(src, payload, len); call Leds.led1Toggle(); } else { printfUART("TestLinkLocalC: reply seqno: %li\n", cmd->seqno); call Leds.led2Toggle(); } } } tinyos-2.1.2+dfsg/apps/tests/cc2420/000077500000000000000000000000001207233610700167635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastCountToLeds/000077500000000000000000000000001207233610700234615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastCountToLeds/Makefile000066400000000000000000000011571207233610700251250ustar00rootroot00000000000000COMPONENT=RadioCountToLedsAppC CFLAGS += -DACK_LOW_POWER_LISTENING #CFLAGS += -DNOACK_LOW_POWER_LISTENING BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class CLEAN_EXTRA = *.class *.pyc RadioCountMsg.py RadioCountMsg.java RadioCountMsg.py: RadioCountToLeds.h mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToLeds.h radio_count_msg -o $@ RadioCountMsg.class: RadioCountMsg.java javac RadioCountMsg.java RadioCountMsg.java: RadioCountToLeds.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioCountMsg RadioCountToLeds.h radio_count_msg -o $@ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastCountToLeds/README.txt000066400000000000000000000026651207233610700251700ustar00rootroot00000000000000README for LplBroadcastCountToLeds Author/Contact: tinyos-help@millennium.berkeley.edu Description: This is a low power listening version of RadioCountToLeds, using the broadcast address to delivery packets. That means the delivery will remain on for the full duration of the receiver's LPL check to ensure all listeners get the message. Each node is performing 1 second receive checks, but there is a 1.5 second delay between each transmission. Verification: * Install the application on two motes * Both motes should count up their LED's just like RadioCountToLeds - This indicates they are communicating with each other. * LED's will not toggle in rhythm. - Being a broadcast LPL transmission, you'll sometimes see the LED's count up one at a time, or multiple counts at a time. This is normal. If you see LED's waggling on both motes, the test passed. LplBroadcastCountToLeds maintains a 4Hz counter, broadcasting its value in an AM packet every time it gets updated. A RadioCountToLeds node that hears a counter displays the bottom three bits on its LEDs. This application is a useful test to show that basic AM communication and timers work. Tools: RadioCountMsg.java is a Java class representing the message that this application sends. RadioCountMsg.py is a Python class representing the message that this application sends. Known bugs/limitations: None. $Id: README.txt,v 1.5 2008-07-26 02:32:44 klueska Exp $ tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLeds.h000066400000000000000000000002741207233610700270170ustar00rootroot00000000000000#ifndef RADIO_COUNT_TO_LEDS_H #define RADIO_COUNT_TO_LEDS_H typedef nx_struct radio_count_msg { nx_uint16_t counter; } radio_count_msg_t; enum { AM_RADIO_COUNT_MSG = 134, }; #endif tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLedsAppC.nc000066400000000000000000000066351207233610700277430ustar00rootroot00000000000000// $Id: RadioCountToLedsAppC.nc,v 1.7 2010-06-29 22:07:25 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "RadioCountToLeds.h" /** * Configuration for the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. *

    * This version uses low-power listening. * * @author Philip Levis * @date June 24 2008 */ configuration RadioCountToLedsAppC {} implementation { components MainC, RadioCountToLedsC as App, LedsC; components new AMSenderC(AM_RADIO_COUNT_MSG); components new AMReceiverC(AM_RADIO_COUNT_MSG); components new TimerMilliC(); components ActiveMessageC; App.Boot -> MainC.Boot; App.LowPowerListening -> LplC; App.Receive -> AMReceiverC; App.AMSend -> AMSenderC; App.AMControl -> ActiveMessageC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> AMSenderC; #if defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) components CC1000ActiveMessageC as LplC; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) components CC2420ActiveMessageC as LplC; #else #error "LPL testing not supported on this platform" #endif } tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLedsC.nc000066400000000000000000000111151207233610700272670ustar00rootroot00000000000000// $Id: RadioCountToLedsC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Timer.h" #include "RadioCountToLeds.h" /** * Implementation of the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. *

    * This version uses low-power listening. * * @author Philip Levis * @date June 24 2008 */ module RadioCountToLedsC { uses { interface Leds; interface Boot; interface Receive; interface AMSend; interface Timer as MilliTimer; interface SplitControl as AMControl; interface Packet; interface LowPowerListening; } } implementation { message_t packet; bool locked; uint16_t counter = 0; event void Boot.booted() { call AMControl.start(); } event void AMControl.startDone(error_t err) { if (err == SUCCESS) { // Note we can setup LPL before or after the radio turns on call LowPowerListening.setLocalWakeupInterval(1000); call MilliTimer.startOneShot(1500); } else { call AMControl.start(); } } event void AMControl.stopDone(error_t err) { // do nothing } event void MilliTimer.fired() { counter++; dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter); if (locked) { return; } else { radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(&packet, sizeof(radio_count_msg_t)); if (call Packet.maxPayloadLength() < sizeof(radio_count_msg_t)) { return; } rcm->counter = counter; call LowPowerListening.setRemoteWakeupInterval(&packet, 1000); if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_count_msg_t)) == SUCCESS) { dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter); locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len); if (len != sizeof(radio_count_msg_t)) { return bufPtr; } else { call Leds.set(((radio_count_msg_t*) payload)->counter); return bufPtr; } } event void AMSend.sendDone(message_t* bufPtr, error_t error) { call MilliTimer.startOneShot(1500); if (&packet == bufPtr) { locked = FALSE; } } } tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastPeriodicDelivery/000077500000000000000000000000001207233610700245205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastPeriodicDelivery/Makefile000066400000000000000000000002001207233610700261500ustar00rootroot00000000000000COMPONENT=TestPeriodicAppC CFLAGS += -DACK_LOW_POWER_LISTENING #CFLAGS += -DNOACK_LOW_POWER_LISTENING include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastPeriodicDelivery/README.txt000066400000000000000000000026001207233610700262140ustar00rootroot00000000000000README for LplBroadcastPeriodicDelivery Author/Contact: tinyos-help@millennium.berkeley.edu Description: Install the application to two nodes with the following ID's: Node 0 (Receiver node): id = 0 Node 1 (Transmitter node): id = 1 Do this at compile time by adding the flag NODEID=, thus: make NODEID= ... This app sends a message from Transmitter node to AM_BROADCAST_ADDR and waits 1000 ms between each delivery so the Rx mote's radio shuts back off and has to redetect to receive the next message. EXPECTED OUTPUT Transmitter Node: * Toggles its led0 every second. - led0 ON indicates transmission, which lasts for a full second. Receiver Node: * led1 remains on (except at the beginning) * If led0 lights up after the beginning of the test, without resetting the transmitter node, there is a problem. This means a duplicate message was received * led2 toggles once each for each transmission received. Summary: Receiver node's led2 should be toggling once a second and led0 should never light up (except at the beginning). Tools: RadioCountMsg.java is a Java class representing the message that this application sends. RadioCountMsg.py is a Python class representing the message that this application sends. Known bugs/limitations: None. $Id: README.txt,v 1.7 2010-01-06 18:57:20 ayer1 Exp $ tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodic.h000066400000000000000000000002531207233610700272670ustar00rootroot00000000000000 #ifndef TESTPERIODIC_H #define TESTPERIODIC_H typedef nx_struct TestPeriodicMsg { nx_uint8_t count; } TestPeriodicMsg; enum { AM_TESTPERIODICMSG = 133, }; #endif tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodicAppC.nc000066400000000000000000000056061207233610700302130ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "TestPeriodic.h" /** * This app sends a message from Transmitter node to AM_BROADCAST_ADDR * and waits 1000 ms between each delivery so the Rx mote's radio * shuts back off and has to redetect to receive the next message. * Receiver: TOS_NODE_ID != 1 * Transmitter: TOS_NODE_ID == 1 * * @author David Moss */ configuration TestPeriodicAppC { } implementation { components TestPeriodicC, MainC, ActiveMessageC, new TimerMilliC(), new AMSenderC(AM_TESTPERIODICMSG), new AMReceiverC(AM_TESTPERIODICMSG), LedsC; TestPeriodicC.Boot -> MainC; TestPeriodicC.SplitControl -> ActiveMessageC; TestPeriodicC.LowPowerListening -> Lpl; TestPeriodicC.AMPacket -> ActiveMessageC; TestPeriodicC.AMSend -> AMSenderC; TestPeriodicC.Receive -> AMReceiverC; TestPeriodicC.Packet -> ActiveMessageC; TestPeriodicC.Timer -> TimerMilliC; TestPeriodicC.Leds -> LedsC; #if defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) components CC1000ActiveMessageC as Lpl; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) components CC2420ActiveMessageC as Lpl; #else #error "LPL testing not supported on this platform" #endif } tinyos-2.1.2+dfsg/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodicC.nc000066400000000000000000000077211207233610700275520ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "TestPeriodic.h" /** * This app sends a message from Transmitter node to AM_BROADCAST_ADDR * and waits 1000 ms between each delivery so the Rx mote's radio * shuts back off and has to redetect to receive the next message. * Receiver: TOS_NODE_ID != 1. * Transmitter: TOS_NODE_ID == 1. * * @author David Moss */ module TestPeriodicC { uses { interface Boot; interface SplitControl; interface LowPowerListening; interface AMSend; interface Receive; interface AMPacket; interface Packet; interface Leds; interface Timer; } } implementation { uint8_t count; message_t fullMsg; bool transmitter; uint8_t lastCount; /**************** Prototypes ****************/ task void send(); /**************** Boot Events ****************/ event void Boot.booted() { transmitter = (call AMPacket.address() == 1); count = 0; call LowPowerListening.setLocalWakeupInterval(1000); call SplitControl.start(); } event void SplitControl.startDone(error_t error) { if(transmitter) { post send(); } } event void SplitControl.stopDone(error_t error) { } /**************** Send Receive Events *****************/ event void AMSend.sendDone(message_t *msg, error_t error) { if(transmitter) { count++; call Timer.startOneShot(1000); call Leds.led0Off(); } } event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) { TestPeriodicMsg *periodicMsg = (TestPeriodicMsg *) payload; if(!transmitter) { if(lastCount == periodicMsg->count) { call Leds.led0On(); call Leds.led1Off(); } else { call Leds.led1On(); call Leds.led0Off(); } lastCount = periodicMsg->count; call Leds.led2Toggle(); } return msg; } /**************** Timer Events ****************/ event void Timer.fired() { if(transmitter) { post send(); } } /**************** Tasks ****************/ task void send() { TestPeriodicMsg *periodicMsg = (TestPeriodicMsg *) call Packet.getPayload(&fullMsg, sizeof(TestPeriodicMsg)); periodicMsg->count = count; call LowPowerListening.setRemoteWakeupInterval(&fullMsg, 1000); if(call AMSend.send(AM_BROADCAST_ADDR, &fullMsg, sizeof(TestPeriodicMsg)) != SUCCESS) { post send(); } else { call Leds.led0On(); } } } tinyos-2.1.2+dfsg/apps/tests/cc2420/LplUnicastPeriodicDelivery/000077500000000000000000000000001207233610700242245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/LplUnicastPeriodicDelivery/Makefile000066400000000000000000000002001207233610700256540ustar00rootroot00000000000000COMPONENT=TestPeriodicAppC CFLAGS += -DACK_LOW_POWER_LISTENING #CFLAGS += -DNOACK_LOW_POWER_LISTENING include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/LplUnicastPeriodicDelivery/README.txt000066400000000000000000000016131207233610700257230ustar00rootroot00000000000000README for LplUnicastPeriodicDelivery Author/Contact: tinyos-help@millennium.berkeley.edu Description: Install the application to two nodes with the following ID's: Node 0 (Receiver node): id = 0 Node 1 (Transmitter node): id = 1 (or.. id > 0) This app sends a message from Transmitter node to the recevier node and waits 1000 ms between each delivery so the Rx mote's radio shuts back off and has to redetect to receive the next message. EXPECTED OUTPUT Transmitter Node: * Toggles its led0 every second. - led0 ON indicates transmission, which lasts for much shorter than a second. When the receiver performs its receive check, the transmitter stops delivering the message. Receiver Node: * led1 toggles once a second, indicating reception. Tools: None. Known bugs/limitations: None. $Id: README.txt,v 1.4 2008-07-26 02:32:44 klueska Exp $ tinyos-2.1.2+dfsg/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodic.h000066400000000000000000000002531207233610700267730ustar00rootroot00000000000000 #ifndef TESTPERIODIC_H #define TESTPERIODIC_H typedef nx_struct TestPeriodicMsg { nx_uint8_t count; } TestPeriodicMsg; enum { AM_TESTPERIODICMSG = 133, }; #endif tinyos-2.1.2+dfsg/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodicAppC.nc000066400000000000000000000056071207233610700277200ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "TestPeriodic.h" /** * This app sends a message from Transmitter node to the recevier node * and waits 1000 ms between each delivery so the Rx mote's radio * shuts back off and has to redetect to receive the next message. * Receiver: TOS_NODE_ID != 1. * Transmitter: TOS_NODE_ID == 1. * * @author David Moss */ configuration TestPeriodicAppC { } implementation { components TestPeriodicC, MainC, ActiveMessageC, new TimerMilliC(), new AMSenderC(AM_TESTPERIODICMSG), new AMReceiverC(AM_TESTPERIODICMSG), LedsC; TestPeriodicC.Boot -> MainC; TestPeriodicC.SplitControl -> ActiveMessageC; TestPeriodicC.LowPowerListening -> Lpl; TestPeriodicC.AMPacket -> ActiveMessageC; TestPeriodicC.AMSend -> AMSenderC; TestPeriodicC.Receive -> AMReceiverC; TestPeriodicC.Packet -> ActiveMessageC; TestPeriodicC.Timer -> TimerMilliC; TestPeriodicC.Leds -> LedsC; #if defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) components CC1000ActiveMessageC as Lpl; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) components CC2420ActiveMessageC as Lpl; #else #error "LPL testing not supported on this platform" #endif } tinyos-2.1.2+dfsg/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodicC.nc000066400000000000000000000072141207233610700272530ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "TestPeriodic.h" /** * This app sends a message from Transmitter node to the recevier node * and waits 1000 ms between each delivery so the Rx mote's radio * shuts back off and has to redetect to receive the next message. * Receiver: TOS_NODE_ID != 1. * Transmitter: TOS_NODE_ID == 1. * * @author David Moss */ module TestPeriodicC { uses { interface Boot; interface SplitControl; interface LowPowerListening; interface AMSend; interface Receive; interface AMPacket; interface Packet; interface Leds; interface Timer; } } implementation { uint8_t count; message_t fullMsg; bool transmitter; /**************** Prototypes ****************/ task void send(); /**************** Boot Events ****************/ event void Boot.booted() { transmitter = (call AMPacket.address() != 0); count = 0; call LowPowerListening.setLocalWakeupInterval(1000); call SplitControl.start(); } event void SplitControl.startDone(error_t error) { if(transmitter) { post send(); } } event void SplitControl.stopDone(error_t error) { } /**************** Send Receive Events *****************/ event void AMSend.sendDone(message_t *msg, error_t error) { if(transmitter) { count++; call Timer.startOneShot(1000); call Leds.led0Off(); } } event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) { if(!transmitter) { call Leds.led1Toggle(); } return msg; } /**************** Timer Events ****************/ event void Timer.fired() { if(transmitter) { post send(); } } /**************** Tasks ****************/ task void send() { TestPeriodicMsg *periodicMsg = (TestPeriodicMsg *) call Packet.getPayload(&fullMsg, sizeof(TestPeriodicMsg)); periodicMsg->count = count; call LowPowerListening.setRemoteWakeupInterval(&fullMsg, 1000); if(call AMSend.send(0, &fullMsg, sizeof(TestPeriodicMsg)) != SUCCESS) { post send(); } else { call Leds.led0On(); } } } tinyos-2.1.2+dfsg/apps/tests/cc2420/README.txt000066400000000000000000000005001207233610700204540ustar00rootroot00000000000000README for cc2420 Author/Contact: tinyos-help@millennium.berkeley.edu Description: This directory contains a number of test applications specific to the TI CC2420 radio chip. See the individual test applications for more details. Known bugs/limitations: None. $Id: README.txt,v 1.1 2008-06-24 17:40:30 idgay Exp $ tinyos-2.1.2+dfsg/apps/tests/cc2420/RssiToSerial/000077500000000000000000000000001207233610700213465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/RssiToSerial/Makefile000066400000000000000000000005501207233610700230060ustar00rootroot00000000000000COMPONENT=RssiToSerialC BUILD_EXTRA_DEPS = RssiSerialMsg.java SpecAnalyzer.class CLEAN_EXTRA = *.class RssiSerialMsg.java RssiSerialMsg.java: RssiToSerial.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RssiSerialMsg RssiToSerial.h rssi_serial_msg -o $@ SpecAnalyzer.class: $(wildcard *.java) SpecAnalyzer.java javac *.java include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/RssiToSerial/README.txt000066400000000000000000000016261207233610700230510ustar00rootroot00000000000000README for RssiToSerial Author/Contact: tinyos-help@millennium.berkeley.edu Description: This is more of a general demonstration than a test. Install this application to one node, connected to the computer. The node will measure the environmental RSSI from the CC2420 and sending those readings over the serial port. Use the Java application to display the relative RSSI readings. No activity: [+++++++++++++++ ] Transmitter nearby: [+++++++++++++++++++++++++++++++++++ ] Since the Java side has to convert the readings into a CLI bar graph, it's scaled by some (possibly non-linear) factor. Tools: java SpecAnalyzer [-comm ] If not specified, the defaults to sf@localhost:9002 or to your MOTECOM environment variable (if defined). Known bugs/limitations: None. $Id: README.txt,v 1.3 2008-07-26 02:32:44 klueska Exp $ tinyos-2.1.2+dfsg/apps/tests/cc2420/RssiToSerial/RssiToSerial.h000066400000000000000000000044771207233610700241160ustar00rootroot00000000000000 /* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jared Hill */ #ifndef RSSI_TO_SERIAL_H #define RSSI_TO_SERIAL_H typedef nx_struct rssi_serial_msg { nx_uint16_t rssiAvgValue; nx_uint16_t rssiLargestValue; nx_uint8_t channel; } rssi_serial_msg_t; enum { AM_RSSI_SERIAL_MSG = 134, WAIT_TIME = 256, //* Using log2 samples to avoid a divide. Sending a packet every 1 second will allow //* allow about 5000 samples. A packet every half second allows for 2500 samples, and //* a packet every quarter second allows for 1250 samples. // When to send a packet is based upon how many samples have been taken, not a // predetermined amount of time. Rough estimates of time can be found using the // conversion stated above. LOG2SAMPLES = 7, }; #endif tinyos-2.1.2+dfsg/apps/tests/cc2420/RssiToSerial/RssiToSerialC.nc000066400000000000000000000047411207233610700243640ustar00rootroot00000000000000 /* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "RssiToSerial.h" /** * This is more of a general demonstration than a test. * * Install this application to one node, connected to the computer. * The node will measure the environmental RSSI from the CC2420 and * sending those readings over the serial port. * * Use the Java application to display the relative RSSI readings. * * @author Jared Hill * @date 23 March 2007 */ configuration RssiToSerialC {} implementation { components MainC, RssiToSerialP as App, LedsC; components new TimerMilliC(); components SerialActiveMessageC as AM; components ActiveMessageC; components CC2420ControlC; App.Boot -> MainC.Boot; App.SerialControl -> AM; App.AMSend -> AM.AMSend[AM_RSSI_SERIAL_MSG]; App.AMControl -> ActiveMessageC; App.Leds -> LedsC; App.Packet -> AM; App.ReadRssi -> CC2420ControlC.ReadRssi; App.Config -> CC2420ControlC.CC2420Config; } tinyos-2.1.2+dfsg/apps/tests/cc2420/RssiToSerial/RssiToSerialP.nc000066400000000000000000000114571207233610700244030ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "Timer.h" #include "RssiToSerial.h" /** * This is more of a general demonstration than a test. * * Install this application to one node, connected to the computer. * The node will measure the environmental RSSI from the CC2420 and * sending those readings over the serial port. * * Use the Java application to display the relative RSSI readings. * * @author Jared Hill * @date 23 March 2007 */ module RssiToSerialP { uses { interface Leds; interface Boot; interface AMSend; interface SplitControl as AMControl; interface SplitControl as SerialControl; interface Packet; interface Read as ReadRssi; interface CC2420Config as Config; } } implementation { /******* Global Variables ****************/ message_t packet; bool locked; uint32_t total; uint16_t largest; uint16_t reads; /******** Declare Tasks *******************/ task void readRssi(); task void sendSerialMsg(); /************ Boot Events *****************/ event void Boot.booted() { call AMControl.start(); total = 0; largest = 0; reads = 0; locked = FALSE; } /************ AMControl Events ******************/ event void AMControl.startDone(error_t err) { if (err == SUCCESS) { call SerialControl.start(); } else { call AMControl.start(); } } event void AMControl.stopDone(error_t err) { // do nothing } /***************SerialControl Events*****************/ event void SerialControl.startDone(error_t error){ if (error == SUCCESS) { post readRssi(); } else { call AMControl.start(); } } event void SerialControl.stopDone(error_t error){ //do nothing } /***************** AMSend Events ****************************/ event void AMSend.sendDone(message_t* bufPtr, error_t error) { if (&packet == bufPtr) { locked = FALSE; } //post readRssi(); } /**************** ReadRssi Events *************************/ event void ReadRssi.readDone(error_t result, uint16_t val ){ if(result != SUCCESS){ post readRssi(); return; } atomic{ total += val; reads ++; if(largest < val){ largest = val; } } if(reads == (1<rssiAvgValue = (total >> (LOG2SAMPLES)); rsm->rssiLargestValue = largest; total = 0; largest = 0; reads = 0; } rsm->channel = call Config.getChannel(); if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(rssi_serial_msg_t)) == SUCCESS) { locked = TRUE; } } } } tinyos-2.1.2+dfsg/apps/tests/cc2420/RssiToSerial/SpecAnalyzer.java000066400000000000000000000112621207233610700246130ustar00rootroot00000000000000 /* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Java class to display RSSI readings returned from a mote running the * RssiToSerial application. * * @author Jared Hill */ import net.tinyos.message.Message; import net.tinyos.message.MessageListener; import net.tinyos.message.MoteIF; import net.tinyos.message.SerialPacket; import net.tinyos.packet.BuildSource; import net.tinyos.packet.PhoenixSource; import net.tinyos.util.PrintStreamMessenger; public class SpecAnalyzer implements MessageListener { /** Communication with the mote */ private MoteIF mote; /** Broadcast Address */ public static final short TOS_BCAST_ADDR = (short) 0xffff; /** The message from the mote */ private RssiSerialMsg rssiMsg; /** The total number of characters written last time */ private int lastCharsWritten = 0; /** The maximum size of the bar on the command line, in characters */ private static final int MAX_CHARACTERS = 50; /** * Constructor * * @param argv */ public SpecAnalyzer(MoteIF mif) { try { System.out.println("Connecting to serial forwarder..."); mote = mif; mote.registerListener(new RssiSerialMsg(), this); } catch (Exception e) { System.err.println("Couldn't contact serial forwarder"); } } /** * Received a message from the mote */ synchronized public void messageReceived(int dest, Message m) { rssiMsg = (RssiSerialMsg) m; updateSpectrum(rssiMsg.get_rssiLargestValue(), rssiMsg.get_rssiAvgValue()); } /** * Overwrites the current command line prompt with blank space * */ void clearSpectrum() { for(int i = 0; i < lastCharsWritten; i++) { System.out.print('\b'); } } /** * Prints the magnitude of the spectrum to stdout. Specifically, it prints * (largest - average) "+" signs to stdout. * * @param largest * the largest rssi value taken during the sample period * @param avg * the average rssi value taken during the sample period */ void updateSpectrum(int largest, int avg) { clearSpectrum(); String bar = "["; int size = (int) ((float) largest * (float) ((float) MAX_CHARACTERS / (float) (255))); for(int i = 0; i < size && i < MAX_CHARACTERS; i++) { bar += "+"; } for(int i = 0; i < (MAX_CHARACTERS - size); i++) { bar += " "; } bar += "]"; lastCharsWritten = bar.length(); System.out.print(bar); } private static void usage() { System.err.println("usage: SpecAnalyzer [-comm ]"); } /** * Main Method * * @param argv */ public static void main(String[] args) { String source = null; if (args.length == 2) { if (!args[0].equals("-comm")) { usage(); System.exit(1); } source = args[1]; } else if (args.length != 0) { usage(); System.exit(1); } PhoenixSource phoenix; if (source == null) { phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); } else { phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); } MoteIF mif = new MoteIF(phoenix); new SpecAnalyzer(mif); } } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestAcks/000077500000000000000000000000001207233610700205045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/TestAcks/Makefile000066400000000000000000000000561207233610700221450ustar00rootroot00000000000000COMPONENT=TestAcksC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/TestAcks/README.txt000066400000000000000000000010171207233610700222010ustar00rootroot00000000000000README for TestAcks Author/Contact: tinyos-help@millennium.berkeley.edu Description: Compile and install this application to two motes, both using ID 1 Expectations: Led0 Toggles on a dropped ack Led1 Toggles on a received ack Led2 Toggles when a message is received In short, Leds 1&2 should be toggling the majority of the time, until the other receiver stops receiving packets by turning off or moving out of range. Tools: None. Known bugs/limitations: None. $Id: README.txt,v 1.3 2008-07-26 02:32:44 klueska Exp $ tinyos-2.1.2+dfsg/apps/tests/cc2420/TestAcks/TestAcksC.nc000066400000000000000000000043211207233610700226520ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Test for radio acknowledgements * Program all motes up with ID 1 * Led0 = Received a message * Led1 = Got an ack * Led2 = Missed an ack * @author David Moss */ configuration TestAcksC { } implementation { components TestAcksP, MainC, ActiveMessageC, new AMSenderC(128), new AMReceiverC(128), new TimerMilliC(), LedsC; TestAcksP.Boot -> MainC; TestAcksP.SplitControl -> ActiveMessageC; TestAcksP.Leds -> LedsC; TestAcksP.AMSend -> AMSenderC; TestAcksP.Receive -> AMReceiverC; TestAcksP.PacketAcknowledgements -> ActiveMessageC; TestAcksP.Timer -> TimerMilliC; } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestAcks/TestAcksP.nc000066400000000000000000000065711207233610700227000ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Test for radio acknowledgements * Program all motes up with ID 1 * Led0 = Missed an ack * Led1 = Got an ack * Led2 = Sent a message * @author David Moss */ module TestAcksP { uses { interface Boot; interface SplitControl; interface AMSend; interface Receive; interface Leds; interface PacketAcknowledgements; interface Timer; } } implementation { /** Message to transmit */ message_t myMsg; enum { DELAY_BETWEEN_MESSAGES = 50, }; /***************** Prototypes ****************/ task void send(); /***************** Boot Events ****************/ event void Boot.booted() { call SplitControl.start(); } /***************** SplitControl Events ****************/ event void SplitControl.startDone(error_t error) { post send(); } event void SplitControl.stopDone(error_t error) { } /***************** Receive Events ****************/ event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) { call Leds.led2Toggle(); return msg; } /***************** AMSend Events ****************/ event void AMSend.sendDone(message_t *msg, error_t error) { if(call PacketAcknowledgements.wasAcked(msg)) { call Leds.led1Toggle(); call Leds.led0Off(); } else { call Leds.led0Toggle(); call Leds.led1Off(); } if(DELAY_BETWEEN_MESSAGES > 0) { call Timer.startOneShot(DELAY_BETWEEN_MESSAGES); } else { post send(); } } /***************** Timer Events ****************/ event void Timer.fired() { post send(); } /***************** Tasks ****************/ task void send() { call PacketAcknowledgements.requestAck(&myMsg); if(call AMSend.send(1, &myMsg, 0) != SUCCESS) { post send(); } } } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestPacketLink/000077500000000000000000000000001207233610700216505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/TestPacketLink/Makefile000066400000000000000000000006111207233610700233060ustar00rootroot00000000000000COMPONENT=TestPacketLinkC CFLAGS += -DPACKET_LINK BUILD_EXTRA_DEPS = PacketLinkMsg.java TestPacketLink.class CLEAN_EXTRA = *.class PacketLinkMsg.java PacketLinkMsg.java: TestPacketLink.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=PacketLinkMsg TestPacketLink.h PacketLinkMsg -o $@ TestPacketLink.class: $(wildcard *.java) TestPacketLink.java javac *.java include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/TestPacketLink/README.txt000066400000000000000000000024421207233610700233500ustar00rootroot00000000000000README for TestPacketLink Author/Contact: tinyos-help@millennium.berkeley.edu Description: Test the effectiveness of the PacketLink layer INSTALL Transmitter: id == 1, 2, 3, 4, or 5 (up to MAX_TRANSMITTERS) Receiver: id == 0, plugged into the computer EXPECTATIONS Transmitter (ID not 0) - led1 toggling on every successfully delivered message led0 toggling on every unsuccessfully delivered message (and stay on until the next dropped packet) Receiver (ID 0) - Leds represent the binary count of sets of messages that were dropped. Ideally, if the transmitter and receiver are in range of each other, the receiver's LEDs should never turn on. You can pull the receiver out of range for up to two seconds before the transmission will fail. If you aren't convinced the receiver is doing anything because its leds aren't flashing, just turn it off and watch the transmitter's reaction. Tools: java TestPacketLink [-comm ] If not specified, the defaults to sf@localhost:9002 or to your MOTECOM environment variable (if defined). This application will report dropped and duplicate packets as seen on the receiver. Known bugs/limitations: None. $Id: README.txt,v 1.5 2008-09-22 20:52:39 idgay Exp $ tinyos-2.1.2+dfsg/apps/tests/cc2420/TestPacketLink/TestPacketLink.h000066400000000000000000000036321207233610700247120ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #ifndef TESTPACKETLINK_H #define TESTPACKETLINK_H typedef nx_struct PacketLinkMsg { nx_uint32_t count; nx_uint16_t src; nx_uint8_t cmd; } PacketLinkMsg; enum { AM_PACKETLINKMSG = 128, }; enum { CMD_DROPPED_PACKET = 0, CMD_DUPLICATE_PACKET = 1, }; #ifndef MAX_TRANSMITTERS #define MAX_TRANSMITTERS 5 #endif #endif tinyos-2.1.2+dfsg/apps/tests/cc2420/TestPacketLink/TestPacketLink.java000066400000000000000000000065411207233610700254060ustar00rootroot00000000000000 /* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ import net.tinyos.message.Message; import net.tinyos.message.MessageListener; import net.tinyos.message.MoteIF; import net.tinyos.message.SerialPacket; import net.tinyos.packet.BuildSource; import net.tinyos.packet.PhoenixSource; import net.tinyos.util.PrintStreamMessenger; /** * Feedback on from a TestPacketLink receiver * whether packets have been dropped or duplicated * @author David Moss * */ public class TestPacketLink implements MessageListener { private MoteIF moteIF; private static final short CMD_DROPPED_PACKET = 0; private static final short CMD_DUPLICATE_PACKET = 1; /** * Constructor * @param moteIF */ public TestPacketLink(MoteIF moteIF) { this.moteIF = moteIF; this.moteIF.registerListener(new PacketLinkMsg(), this); } public void messageReceived(int s, Message message) { PacketLinkMsg msg = (PacketLinkMsg) message; if(msg.get_cmd() == CMD_DROPPED_PACKET) { System.out.println("Dropped packet from source " + msg.get_src()); } else { System.out.println("Duplicate packet from source " + msg.get_src()); } } private static void usage() { System.err.println("usage: TestSerial [-comm ]"); } public static void main(String[] args) throws Exception { String source = null; if (args.length == 2) { if (!args[0].equals("-comm")) { usage(); System.exit(1); } source = args[1]; } else if (args.length != 0) { usage(); System.exit(1); } PhoenixSource phoenix; if (source == null) { phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); } else { phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); } MoteIF mif = new MoteIF(phoenix); new TestPacketLink(mif); } } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestPacketLink/TestPacketLinkC.nc000066400000000000000000000064431207233610700251710ustar00rootroot00000000000000 /* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "TestPacketLink.h" /** * Test the effectiveness of the PacketLink layer * * Transmitter == 1, 2, 3, 4, or 5 (up to MAX_TRANSMITTERS) * Receiver == 0 * * Expect: * Transmitter (ID not 0) - * led1 toggling on every successfully delivered message * led0 toggling on every unsuccessfully delivered message (and stay on * until the next dropped packet) * * Receiver (ID 0) - * Leds represent the binary count of sets of messages that were dropped * or duplicated. * * Ideally, if the transmitter and receiver are in range of each other, * the receiver's LEDs should never turn on. You can pull the receiver * out of range for up to two seconds before the transmission will fail. * If you aren't convinced the receiver is doing anything because its * leds aren't flashing, just turn it off and watch the transmitter's * reaction. * * @author David Moss */ configuration TestPacketLinkC { } implementation { components TestPacketLinkP, MainC, ActiveMessageC, CC2420ActiveMessageC, new AMSenderC(AM_PACKETLINKMSG), new AMReceiverC(AM_PACKETLINKMSG), SerialActiveMessageC, new SerialAMSenderC(AM_PACKETLINKMSG), new TimerMilliC(), LedsC; TestPacketLinkP.Boot -> MainC; TestPacketLinkP.RadioSplitControl -> ActiveMessageC; TestPacketLinkP.SerialSplitControl -> SerialActiveMessageC; TestPacketLinkP.SerialAMSend -> SerialAMSenderC; TestPacketLinkP.PacketLink -> CC2420ActiveMessageC; TestPacketLinkP.AMPacket -> ActiveMessageC; TestPacketLinkP.AMSend -> AMSenderC; TestPacketLinkP.Receive -> AMReceiverC; TestPacketLinkP.Timer -> TimerMilliC; TestPacketLinkP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestPacketLink/TestPacketLinkP.nc000066400000000000000000000146501207233610700252050ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "TestPacketLink.h" /** * Test the effectiveness of the PacketLink layer * * Transmitter == 1, 2, 3, 4, or 5 (up to MAX_TRANSMITTERS) * Receiver == 0 * * Expect: * Transmitter (ID not 0) - * led1 toggling on every successfully delivered message * led0 toggling on every unsuccessfully delivered message (and stay on * until the next dropped packet) * * Receiver (ID 0) - * Leds represent the binary count of sets of messages that were dropped * or duplicated. * * Ideally, if the transmitter and receiver are in range of each other, * the receiver's LEDs should never turn on. You can pull the receiver * out of range for up to two seconds before the transmission will fail. * If you aren't convinced the receiver is doing anything because its * leds aren't flashing, just turn it off and watch the transmitter's * reaction. * * @author David Moss */ module TestPacketLinkP { uses { interface Boot; interface SplitControl as RadioSplitControl; interface SplitControl as SerialSplitControl; interface AMSend; interface AMSend as SerialAMSend; interface AMPacket; interface Receive; interface PacketLink; interface Leds; interface Timer; } } implementation { /** The message we'll be sending */ message_t myMsg; /** Serial message for status */ message_t serialMsg; /** The local count we're sending or should receive on each unique message */ uint32_t count[MAX_TRANSMITTERS]; /** The total number of packets missed by the receiver */ uint8_t missedPackets; /** True if this mote is the transmitter mote */ bool transmitter; enum { MSG_DESTINATION = 0, }; /***************** Prototypes ****************/ task void send(); task void sendSerial(); /***************** Boot Events ****************/ event void Boot.booted() { int i; /* * Setup this message in advance to retry up to 50 times with 40 ms of * delay between each message. 50 * 40 ms = 2 seconds before it quits. * It only needs to be setup once to be stored in the msg's metadata. */ call PacketLink.setRetries(&myMsg, 50); call PacketLink.setRetryDelay(&myMsg, 40); missedPackets = 0; for(i = 0; i < MAX_TRANSMITTERS; i++) { count[i] = 0; } transmitter = (call AMPacket.address() != 0); call RadioSplitControl.start(); if(!transmitter) { call SerialSplitControl.start(); } } /***************** SplitControl Events *****************/ event void RadioSplitControl.startDone(error_t error) { if(transmitter) { post send(); } } event void RadioSplitControl.stopDone(error_t error) { } /***************** SerialSplitControl Events ****************/ event void SerialSplitControl.startDone(error_t error) { } event void SerialSplitControl.stopDone(error_t error) { } /***************** AMSend Events ****************/ event void AMSend.sendDone(message_t *msg, error_t error) { if(call PacketLink.wasDelivered(msg)) { count[0]++; call Leds.led1Toggle(); } else { call Leds.led0Toggle(); } ((PacketLinkMsg *) call AMSend.getPayload(&myMsg, sizeof(PacketLinkMsg)))->count = count[0]; call Timer.startOneShot(50); } /***************** SerialAMSend Events ****************/ event void SerialAMSend.sendDone(message_t *msg, error_t error) { } /***************** Receive Events ****************/ event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) { PacketLinkMsg *linkMsg = (PacketLinkMsg *) payload; uint16_t source = call AMPacket.source(msg); if(transmitter || source > MAX_TRANSMITTERS - 1) { return msg; } if(linkMsg->count != count[source]) { ((PacketLinkMsg *) (call SerialAMSend.getPayload(&serialMsg, sizeof(PacketLinkMsg))))->src = source; if(linkMsg->count > count[source]) { ((PacketLinkMsg *) (call SerialAMSend.getPayload(&serialMsg, sizeof(PacketLinkMsg))))->cmd = CMD_DROPPED_PACKET; } else { ((PacketLinkMsg *) (call SerialAMSend.getPayload(&serialMsg, sizeof(PacketLinkMsg))))->cmd = CMD_DUPLICATE_PACKET; } post sendSerial(); if(count[source] != 0) { missedPackets++; call Leds.set(missedPackets); } } count[source] = linkMsg->count; count[source]++; return msg; } /***************** Timer Events ***************/ event void Timer.fired() { post send(); } /***************** Tasks ****************/ task void send() { if(call AMSend.send(MSG_DESTINATION, &myMsg, sizeof(PacketLinkMsg)) != SUCCESS) { post send(); } } task void sendSerial() { if(call SerialAMSend.send(0, &serialMsg, sizeof(PacketLinkMsg)) != SUCCESS) { post sendSerial(); } } } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/000077500000000000000000000000001207233610700214325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/BaseStation/000077500000000000000000000000001207233610700236465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/BaseStation/BaseStationC.nc000066400000000000000000000101611207233610700265060ustar00rootroot00000000000000// $Id: BaseStationC.nc,v 1.3 2010-06-29 22:07:25 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The TinyOS 2.x base station that forwards packets between the UART * and radio.It replaces the GenericBase of TinyOS 1.0 and the * TOSBase of TinyOS 1.1. * *

    On the serial link, BaseStation sends and receives simple active * messages (not particular radio packets): on the radio link, it * sends radio active messages, whose format depends on the network * stack being used. BaseStation will copy its compiled-in group ID to * messages moving from the serial link to the radio, and will filter * out incoming radio messages that do not contain that group ID.

    * *

    BaseStation includes queues in both directions, with a guarantee * that once a message enters a queue, it will eventually leave on the * other interface. The queues allow the BaseStation to handle load * spikes.

    * *

    BaseStation acknowledges a message arriving over the serial link * only if that message was successfully enqueued for delivery to the * radio link.

    * *

    The LEDS are programmed to toggle as follows:

    *
      *
    • RED Toggle:: Message bridged from serial to radio
      • *
    • GREEN Toggle: Message bridged from radio to serial
      • *
    • YELLOW/BLUE Toggle: Dropped message due to queue overflow in either direction
      • *
    * * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay * @author Philip Levis * @date August 10 2005 */ configuration BaseStationC { } implementation { components MainC, BaseStationP, LedsC; components ActiveMessageC as Radio, SerialActiveMessageC as Serial; components CC2420KeysC; MainC.Boot <- BaseStationP; BaseStationP.RadioControl -> Radio; BaseStationP.SerialControl -> Serial; BaseStationP.UartSend -> Serial; BaseStationP.UartReceive -> Serial.Receive; BaseStationP.UartPacket -> Serial; BaseStationP.UartAMPacket -> Serial; BaseStationP.RadioSend -> Radio; BaseStationP.RadioReceive -> Radio.Receive; BaseStationP.RadioSnoop -> Radio.Snoop; BaseStationP.RadioPacket -> Radio; BaseStationP.RadioAMPacket -> Radio; BaseStationP.Leds -> LedsC; BaseStationP.CC2420Keys -> CC2420KeysC; } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/BaseStation/BaseStationP.nc000066400000000000000000000177111207233610700265330ustar00rootroot00000000000000// $Id: BaseStationP.nc,v 1.3 2010-06-29 22:07:27 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay * Revision: $Id: BaseStationP.nc,v 1.3 2010-06-29 22:07:27 scipio Exp $ */ /* * BaseStationP bridges packets between a serial channel and the radio. * Messages moving from serial to radio will be tagged with the group * ID compiled into the TOSBase, and messages moving from radio to * serial will be filtered by that same group id. */ #include "AM.h" #include "Serial.h" module BaseStationP @safe() { uses { interface Boot; interface SplitControl as SerialControl; interface SplitControl as RadioControl; interface AMSend as UartSend[am_id_t id]; interface Receive as UartReceive[am_id_t id]; interface Packet as UartPacket; interface AMPacket as UartAMPacket; interface AMSend as RadioSend[am_id_t id]; interface Receive as RadioReceive[am_id_t id]; interface Receive as RadioSnoop[am_id_t id]; interface Packet as RadioPacket; interface AMPacket as RadioAMPacket; interface CC2420Keys; interface Leds; } } implementation { enum { UART_QUEUE_LEN = 12, RADIO_QUEUE_LEN = 12, }; message_t uartQueueBufs[UART_QUEUE_LEN]; message_t * ONE_NOK uartQueue[UART_QUEUE_LEN]; uint8_t uartIn, uartOut; bool uartBusy, uartFull; message_t radioQueueBufs[RADIO_QUEUE_LEN]; message_t * ONE_NOK radioQueue[RADIO_QUEUE_LEN]; uint8_t radioIn, radioOut; bool radioBusy, radioFull; uint8_t key[16] = {0x98,0x67,0x7F,0xAF,0xD6,0xAD,0xB7,0x0C,0x59,0xE8,0xD9,0x47,0xC9,0x71,0x15,0x0F}; task void uartSendTask(); task void radioSendTask(); void dropBlink() { call Leds.led2Toggle(); } void failBlink() { call Leds.led2Toggle(); } event void Boot.booted() { uint8_t i; for (i = 0; i < UART_QUEUE_LEN; i++) uartQueue[i] = &uartQueueBufs[i]; uartIn = uartOut = 0; uartBusy = FALSE; uartFull = TRUE; for (i = 0; i < RADIO_QUEUE_LEN; i++) radioQueue[i] = &radioQueueBufs[i]; radioIn = radioOut = 0; radioBusy = FALSE; radioFull = TRUE; call RadioControl.start(); call SerialControl.start(); } event void RadioControl.startDone(error_t error) { if (error == SUCCESS) { radioFull = FALSE; call CC2420Keys.setKey(1, key); } } event void SerialControl.startDone(error_t error) { if (error == SUCCESS) { uartFull = FALSE; } } event void SerialControl.stopDone(error_t error) {} event void RadioControl.stopDone(error_t error) {} event void CC2420Keys.setKeyDone(uint8_t keyNo, uint8_t* skey) {} uint8_t count = 0; message_t* ONE receive(message_t* ONE msg, void* payload, uint8_t len); event message_t *RadioSnoop.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { return receive(msg, payload, len); } event message_t *RadioReceive.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { return receive(msg, payload, len); } message_t* receive(message_t *msg, void *payload, uint8_t len) { message_t *ret = msg; atomic { if (!uartFull) { ret = uartQueue[uartIn]; uartQueue[uartIn] = msg; uartIn = (uartIn + 1) % UART_QUEUE_LEN; if (uartIn == uartOut) uartFull = TRUE; if (!uartBusy) { post uartSendTask(); uartBusy = TRUE; } } else dropBlink(); } return ret; } uint8_t tmpLen; task void uartSendTask() { uint8_t len; am_id_t id; am_addr_t addr, src; message_t* msg; atomic if (uartIn == uartOut && !uartFull) { uartBusy = FALSE; return; } msg = uartQueue[uartOut]; tmpLen = len = call RadioPacket.payloadLength(msg); id = call RadioAMPacket.type(msg); addr = call RadioAMPacket.destination(msg); src = call RadioAMPacket.source(msg); call UartPacket.clear(msg); call UartAMPacket.setSource(msg, src); if (call UartSend.send[id](addr, uartQueue[uartOut], len) == SUCCESS) call Leds.led1Toggle(); else { failBlink(); post uartSendTask(); } } event void UartSend.sendDone[am_id_t id](message_t* msg, error_t error) { if (error != SUCCESS) failBlink(); else atomic if (msg == uartQueue[uartOut]) { if (++uartOut >= UART_QUEUE_LEN) uartOut = 0; if (uartFull) uartFull = FALSE; } post uartSendTask(); } event message_t *UartReceive.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { message_t *ret = msg; bool reflectToken = FALSE; atomic if (!radioFull) { reflectToken = TRUE; ret = radioQueue[radioIn]; radioQueue[radioIn] = msg; if (++radioIn >= RADIO_QUEUE_LEN) radioIn = 0; if (radioIn == radioOut) radioFull = TRUE; if (!radioBusy) { post radioSendTask(); radioBusy = TRUE; } } else dropBlink(); if (reflectToken) { //call UartTokenReceive.ReflectToken(Token); } return ret; } task void radioSendTask() { uint8_t len; am_id_t id; am_addr_t addr,source; message_t* msg; atomic if (radioIn == radioOut && !radioFull) { radioBusy = FALSE; return; } msg = radioQueue[radioOut]; len = call UartPacket.payloadLength(msg); addr = call UartAMPacket.destination(msg); source = call UartAMPacket.source(msg); id = call UartAMPacket.type(msg); call RadioPacket.clear(msg); call RadioAMPacket.setSource(msg, source); if (call RadioSend.send[id](addr, msg, len) == SUCCESS) call Leds.led0Toggle(); else { failBlink(); post radioSendTask(); } } event void RadioSend.sendDone[am_id_t id](message_t* msg, error_t error) { if (error != SUCCESS) failBlink(); else atomic if (msg == radioQueue[radioOut]) { if (++radioOut >= RADIO_QUEUE_LEN) radioOut = 0; if (radioFull) radioFull = FALSE; } post radioSendTask(); } } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/BaseStation/Makefile000066400000000000000000000003661207233610700253130ustar00rootroot00000000000000COMPONENT=BaseStationC CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION CFLAGS += -DCC2420_HW_SECURITY CFLAGS += -DTFRAMES_ENABLED CFLAGS += -DTOSH_DATA_LENGTH=115 CFLAGS += -DTASKLET_IS_TASK include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/README.txt000066400000000000000000000017051207233610700231330ustar00rootroot00000000000000README for TestSecurity Author/Contact: JeongGil Ko Razvan Musaloiu-E. Jong Hyun Lim Description: Test the CC2420 hardware security support Applications: 1. RadioCountToLeds1/ This application is a modification to the RadioCountToLeds/ application with CC2420 security features added to outgoing packets. The packets are decrypted at the receiver node. > INSTALL Compile one node with ID 1 as the transmitter and other nodes with any node IDs to receive the decrypted packets >EXPECTATIONS LEDs on the receiver nodes will blink their LEDs sequentially like the original RadioCountToLeds/ application. The LEDs on the transmitter will stay off. 2. Basestation/ The BaseStation application with the security extensions > INSTALL Follow instructions on apps/BaseStation/README.txt > EXPECTATIONS Identical to the expectations in apps/BaseStation/README.txt Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/000077500000000000000000000000001207233610700246755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/Makefile000066400000000000000000000005101207233610700263310ustar00rootroot00000000000000COMPONENT=RadioCountToLedsAppC CFLAGS+=-DCC2420_HW_ACKNOWLEDGEMENTS CFLAGS+=-DCC2420_HW_SECURITY #CFLAGS+=-DCC2420_DEF_CHANNEL=25 CFLAGS+=-DTFRAMES_ENABLED CFLAGS+=-DPACKET_LINK CFLAGS+=-DTOSH_DATA_LENGTH=115 #CFLAGS+=-I%T/lib/printf CFLAGS+=-I$(TOSDIR)/lib/printf CFLAGS+=-DPRINTFUART_ENABLED CFLAGS+=-I./ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLeds.h000066400000000000000000000042051207233610700302310ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef RADIO_COUNT_TO_LEDS_H #define RADIO_COUNT_TO_LEDS_H typedef nx_struct radio_count_msg { nx_uint16_t counter; nx_uint16_t counter2[20]; } radio_count_msg_t; enum { AM_RADIO_COUNT_MSG = 6, }; #endif tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLedsAppC.nc000066400000000000000000000057751207233610700311630ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "RadioCountToLeds.h" /** * Configuration for the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. * * @author Philip Levis * @date June 6 2005 */ configuration RadioCountToLedsAppC {} implementation { components MainC, RadioCountToLedsC as App, LedsC, NoLedsC; components new SecAMSenderC(AM_RADIO_COUNT_MSG) as AMSenderC; components new AMReceiverC(AM_RADIO_COUNT_MSG); components new TimerMilliC(); components CC2420KeysC; components ActiveMessageC; App.Boot -> MainC.Boot; App.Receive -> AMReceiverC; App.AMSend -> AMSenderC; App.AMControl -> ActiveMessageC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> AMSenderC; App.CC2420Security -> AMSenderC; App.CC2420Keys -> CC2420KeysC; components CC2420ActiveMessageC as Radio; App.PacketLink -> Radio; } tinyos-2.1.2+dfsg/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLedsC.nc000066400000000000000000000116521207233610700305110ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Timer.h" #include "RadioCountToLeds.h" /** * Implementation of the RadioCountToLeds application. RadioCountToLeds * maintains a 4Hz counter, broadcasting its value in an AM packet * every time it gets updated. A RadioCountToLeds node that hears a counter * displays the bottom three bits on its LEDs. This application is a useful * test to show that basic AM communication and timers work. * * @author Philip Levis * @date June 6 2005 */ module RadioCountToLedsC { uses { interface Leds; interface Boot; interface Receive; interface AMSend; interface Timer as MilliTimer; interface SplitControl as AMControl; interface Packet; interface CC2420SecurityMode as CC2420Security; interface CC2420Keys; interface PacketLink; } } implementation { message_t packet; uint8_t key[16] = {0x98,0x67,0x7F,0xAF,0xD6,0xAD,0xB7,0x0C,0x59,0xE8,0xD9,0x47,0xC9,0x71,0x15,0x0F}; uint8_t keyReady = 0; // should be set to 1 when key setting is done bool locked; uint16_t counter = 0; event void Boot.booted() { call AMControl.start(); } event void AMControl.startDone(error_t err) { if (err == SUCCESS) { call CC2420Keys.setKey(1, key); if(TOS_NODE_ID == 1) call MilliTimer.startPeriodic(128); } else { call AMControl.start(); } } event void AMControl.stopDone(error_t err) { } event void CC2420Keys.setKeyDone(uint8_t keyNo, uint8_t* skey) { keyReady = 1; } event void MilliTimer.fired() { counter++; dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter); if (locked) { return; } else if(keyReady == 1) { radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(&packet, sizeof(radio_count_msg_t)); if (rcm == NULL) { return; } rcm->counter = counter; call CC2420Security.setCtr(&packet, 0, 0); //call CC2420Security.setCbcMac(&packet, 0, 0, 16); //call CC2420Security.setCcm(&packet, 1, 0, 16); call PacketLink.setRetries(&packet, 1); if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_count_msg_t)) == SUCCESS) { dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter); locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len); if (len != sizeof(radio_count_msg_t)) {return bufPtr;} else { radio_count_msg_t* rcm = (radio_count_msg_t*)payload; if (rcm->counter & 0x1) { call Leds.led0On(); } else { call Leds.led0Off(); } if (rcm->counter & 0x2) { call Leds.led1On(); } else { call Leds.led1Off(); } if (rcm->counter & 0x4) { call Leds.led2On(); } else { call Leds.led2Off(); } return bufPtr; } } event void AMSend.sendDone(message_t* msg, error_t error) { if (&packet == msg) { locked = FALSE; } } } tinyos-2.1.2+dfsg/apps/tests/cc2420/TxThroughput/000077500000000000000000000000001207233610700214505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/cc2420/TxThroughput/Makefile000066400000000000000000000010431207233610700231060ustar00rootroot00000000000000COMPONENT=TxThroughputC BUILD_EXTRA_DEPS = ThroughputMsg.py ThroughputMsg.java ThroughputMsg.class CLEAN_EXTRA = *.class *.pyc ThroughputMsg.py ThroughputMsg.java ThroughputMsg.py: TxThroughput.h mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=ThroughputMsg TxThroughput.h ThroughputMsg -o $@ ThroughputMsg.java: TxThroughput.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=ThroughputMsg TxThroughput.h ThroughputMsg -o $@ ThroughputMsg.class: $(wildcard *.java) ThroughputMsg.java javac *.java include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/cc2420/TxThroughput/README.txt000066400000000000000000000021101207233610700231400ustar00rootroot00000000000000README for TxThroughput Author/Contact: tinyos-help@millennium.berkeley.edu Description: This application is used more for characterization rather than a test. It measures the maximum radio throughput using the largest message payload size, and does not use low power listening. INSTALL Compile and install this application to one mote. Leave the mote connected to the computer. EXPECTATIONS Led1 will toggle as each message is transmitted. Once a second, the mote will send a packet through the serial port to the computer. Tools: Run the TxThroughput java application: Linux: java TxThroughput.class [-comm ] Windows: java TxThroughput [-comm ] The TxThroughput Java application will display the number of packets per second and the number of bytes sent in the payload per second: [Packets/s]: 124; [(Payload Bytes)/s]: 3472 [Packets/s]: 126; [(Payload Bytes)/s]: 3528 [Packets/s]: 115; [(Payload Bytes)/s]: 3220 [Packets/s]: 124; [(Payload Bytes)/s]: 3472 Known bugs/limitations: None. $Id: README.txt,v 1.4 2008-07-26 02:32:44 klueska Exp $ tinyos-2.1.2+dfsg/apps/tests/cc2420/TxThroughput/TxThroughput.h000066400000000000000000000043041207233610700243070ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author David Moss */ #ifndef TXTHROUGHPUT_H #define TXTHROUGHPUT_H /** * Optionally override the default payload length with our own to see how it * affects throughput. Be sure to re-mig your messages. */ #ifndef TOSH_DATA_LENGTH #define TOSH_DATA_LENGTH 28 #endif #include "message.h" typedef nx_struct ThroughputMsg { nx_uint16_t packetsPerSecond; nx_uint8_t fillBytes[TOSH_DATA_LENGTH - 2]; } ThroughputMsg; enum { AM_THROUGHPUTMSG = 133, }; /** * Set this to 1 if you want to see how acknowledgements affects throughput */ #ifndef USE_ACKNOWLEDGEMENTS #define USE_ACKNOWLEDGEMENTS 0 #endif #endif tinyos-2.1.2+dfsg/apps/tests/cc2420/TxThroughput/TxThroughput.java000066400000000000000000000057311207233610700250060ustar00rootroot00000000000000 /* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Java-side application for examining the radio Tx throughput * * @author David Moss */ import java.io.IOException; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class TxThroughput implements MessageListener { private MoteIF moteIF; public TxThroughput(MoteIF moteIF) { this.moteIF = moteIF; this.moteIF.registerListener(new ThroughputMsg(), this); } public void messageReceived(int dest, Message message) { System.out.println("[Packets/s]: " + ((ThroughputMsg) message).get_packetsPerSecond() + "; [(Payload Bytes)/s]: " + ((((ThroughputMsg) message).numElements_fillBytes() + 2) * ((ThroughputMsg) message).get_packetsPerSecond())); } private static void usage() { System.err.println("usage: TxThroughput [-comm ]"); } public static void main(String[] args) throws Exception { String source = null; if (args.length == 2) { if (!args[0].equals("-comm")) { usage(); System.exit(1); } source = args[1]; } else if (args.length != 0) { usage(); System.exit(1); } PhoenixSource phoenix; if (source == null) { phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); } else { phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); } MoteIF mif = new MoteIF(phoenix); new TxThroughput(mif); } }tinyos-2.1.2+dfsg/apps/tests/cc2420/TxThroughput/TxThroughputC.nc000066400000000000000000000047131207233610700245670ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "TxThroughput.h" /** * This application is used more for characterization rather than a * test. It measures the maximum radio throughput using the largest * message payload size, and does not use low power listening. * * @author David Moss */ configuration TxThroughputC { } implementation { components TxThroughputP, MainC, SerialActiveMessageC, new SerialAMSenderC(AM_THROUGHPUTMSG), ActiveMessageC, new AMSenderC(AM_THROUGHPUTMSG), new TimerMilliC(), LedsC; TxThroughputP.Boot -> MainC; TxThroughputP.SerialSplitControl -> SerialActiveMessageC; TxThroughputP.RadioSplitControl -> ActiveMessageC; TxThroughputP.SerialAMSend -> SerialAMSenderC; TxThroughputP.RadioAMSend -> AMSenderC; TxThroughputP.PacketAcknowledgements -> ActiveMessageC; TxThroughputP.Timer -> TimerMilliC; TxThroughputP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/cc2420/TxThroughput/TxThroughputP.nc000066400000000000000000000100611207233610700245750ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "TxThroughput.h" /** * This application is used more for characterization rather than a * test. It measures the maximum radio throughput using the largest * message payload size, and does not use low power listening. * * @author David Moss */ module TxThroughputP { uses { interface Boot; interface SplitControl as SerialSplitControl; interface SplitControl as RadioSplitControl; interface AMSend as SerialAMSend; interface AMSend as RadioAMSend; interface PacketAcknowledgements; interface Timer; interface Leds; } } implementation { message_t radioMsg; message_t serialMsg; uint16_t packetsPerSecond; enum { MSG_DESTINATION = 1, }; /***************** Prototypes ****************/ task void sendRadio(); task void sendSerial(); /***************** Boot Events ****************/ event void Boot.booted() { if(USE_ACKNOWLEDGEMENTS) { call PacketAcknowledgements.requestAck(&radioMsg); } else { call PacketAcknowledgements.noAck(&radioMsg); } call RadioSplitControl.start(); call SerialSplitControl.start(); } /***************** RadioSplitControl Events ****************/ event void RadioSplitControl.startDone(error_t error) { packetsPerSecond = 0; post sendRadio(); } event void RadioSplitControl.stopDone(error_t error) { } /***************** SerialSplitControl Events ****************/ event void SerialSplitControl.startDone(error_t error) { call Timer.startPeriodic(1024); } event void SerialSplitControl.stopDone(error_t error) { } /***************** AMSend Events ****************/ event void RadioAMSend.sendDone(message_t *msg, error_t error) { packetsPerSecond++; call Leds.led1Toggle(); post sendRadio(); } event void SerialAMSend.sendDone(message_t *msg, error_t error) { } /***************** Timer Events ***************/ event void Timer.fired() { ((ThroughputMsg *) call SerialAMSend.getPayload(&serialMsg, sizeof(ThroughputMsg)))->packetsPerSecond = packetsPerSecond; packetsPerSecond = 0; post sendSerial(); } /****************** Tasks ****************/ task void sendRadio() { if(call RadioAMSend.send(MSG_DESTINATION, &radioMsg, sizeof(ThroughputMsg)) != SUCCESS) { post sendRadio(); } } task void sendSerial() { if(call SerialAMSend.send(0, &serialMsg, sizeof(ThroughputMsg)) != SUCCESS) { post sendSerial(); } } } tinyos-2.1.2+dfsg/apps/tests/deluge/000077500000000000000000000000001207233610700173335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/deluge/Basestation/000077500000000000000000000000001207233610700216075ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/deluge/Basestation/BasestationAppC.nc000066400000000000000000000033641207233610700251570ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ configuration BasestationAppC {} implementation { components DelugeC; } tinyos-2.1.2+dfsg/apps/tests/deluge/Basestation/Makefile000066400000000000000000000001431207233610700232450ustar00rootroot00000000000000COMPONENT=BasestationAppC BOOTLOADER=tosboot CFLAGS += -DDELUGE_BASESTATION include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/deluge/Basestation/README.txt000066400000000000000000000010441207233610700233040ustar00rootroot00000000000000README for apps/tests/deluge/Basestation Author/Contact: Chieh-Jan Mike Liang Razvan Musaloiu-E. Description: This is a sample application for Deluge T2. The application is similar with GoldenImage, but it includes the basestation behavior by using the CFLAGS=-DDELUGE_BASESTATION flag. For telosb the command to install the program is like this: make telosb install bsl,/dev/ttyUSB0 Prerequisites: Python 2.4 with pySerial References: The Deluge T2 wiki page from http://docs.tinyos.net/ tinyos-2.1.2+dfsg/apps/tests/deluge/Basestation/volumes-at45db.xml000066400000000000000000000003141207233610700251020ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/deluge/Basestation/volumes-stm25p.xml000066400000000000000000000003211207233610700251470ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/000077500000000000000000000000001207233610700203725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/BlinkAppC.nc000066400000000000000000000050341207233610700225210ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Blink is a basic application that toggles a mote's LED periodically. * It does so by starting a Timer that fires every second. It uses the * OSKI TimerMilli service to achieve this goal. * * @author tinyos-help@millennium.berkeley.edu * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. **/ configuration BlinkAppC { } implementation { components MainC, BlinkC, LedsC; components new TimerMilliC() as Timer0; components DelugeC; DelugeC.Leds -> LedsC; BlinkC -> MainC.Boot; BlinkC.Timer0 -> Timer0; BlinkC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/BlinkC.nc000066400000000000000000000051211207233610700220550ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation for Blink application. Toggle the red LED when a * Timer fires. * * @author tinyos-help@millennium.berkeley.edu * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. **/ #include "Timer.h" module BlinkC { uses interface Timer as Timer0; uses interface Leds; uses interface Boot; } implementation { event void Boot.booted() { call Timer0.startPeriodic( 500 ); } event void Timer0.fired() { dbg("BlinkC", "Timer 0 fired @ %s.\n", sim_time_string()); #ifndef BLINK_REVERSE call Leds.led0Toggle(); #else call Leds.led2Toggle(); #endif } } tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/Makefile000066400000000000000000000002041207233610700220260ustar00rootroot00000000000000COMPONENT=BlinkAppC BOOTLOADER=tosboot #CFLAGS += -DDELUGE_BASESTATION #CFLAGS += -DDELUGE_LIGHT_BASESTATION include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/README.txt000066400000000000000000000032001207233610700220630ustar00rootroot00000000000000README for apps/tests/deluge/Blink Author/Contact: Chieh-Jan Mike Liang Razvan Musaloiu-E. Description: This application serves two purposes. First, it contains two test cases for Deluge T2: testing base station functionality and network-wide reprogramming. Second, it is a sample application referenced in the Deluge T2 wiki page to illustrate some of the basics in reprogramming. These are done with the two burn scripts in the directory. The "burn" script performs the following tasks (on the basestation only): 1) Compile and load the program normally. After this step the mote will blink led 0. 2) Compile another version of blink that blinks led 2. 3) Upload the new blink to flash volume 1. 4) Instruct the mote to reprogram with the new blink. If all the steps are executed properly the mote end up blinking the led 2. The "burn-net" script performs the following tasks: 1) Compile and load the program normally on multiple motes. The last mote is designated to be the basestation. 2) Compile another version of blink that blinks led 2. 3) Upload the new blink to flash volume 1 on the base station. 4) Give the command to base station to disseminate-and-reprogram. To help testing, "burn-net" script describes what the user should expect in each step. At the end of all the steps the base station should blink led 0 and all the rest of the motes should blink led 2. For a more detailed discussion on Deluge T2, please refer to the Deluge T2 wiki page. Prerequisites: Python 2.4 with pySerial References: The Deluge T2 wiki page from http://docs.tinyos.net/ tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/burn000077500000000000000000000064401207233610700212720ustar00rootroot00000000000000#!/bin/bash TOS_DELUGE=`type -p tos-deluge` if [[ ! -x ${TOS_DELUGE} ]] ; then TOS_DELUGE=../../../../tools/tinyos/misc/tos-deluge fi $TOS_DELUGE > /dev/null if [[ $? != 0 ]] then echo "Unable to locate tos-deluge." exit 2 fi if [[ $# -ne 3 ]]; then echo "Usage: $0 " echo " bsl,PORT | mib510,PORT | eprb,HOST | sm16cf,PORT" echo " serial@PORT:SPEED | network@HOST:PORT" echo " micaz | telosb | iris | epic | mulle" echo " Common combinations" echo " " echo " bsl,PORT serial@PORT:SPEED telosb|iris" echo " mib510,PORT serial@PORT:SPEED micaz" echo " eprb,HOST network@HOST:PORT micaz" echo " sm16cf,PORT serial@PORT:SPEED mulle" exit 2 fi PPORT=$1 CPORT=$2 PLATFORM=$3 if [ ${PLATFORM} != 'micaz' -a \ ${PLATFORM} != 'telosb' -a \ ${PLATFORM} != 'iris' -a \ ${PLATFORM} != 'mulle' -a \ ${PLATFORM} != 'tinynode' -a \ ${PLATFORM} != 'epic' ] then echo "\"${PLATFORM}\" is not a supported platform" exit 2 fi echo ========================== Compile tosboot for ${PLATFORM} =========================== ( cd $TOSDIR/lib/tosboot ; make ${PLATFORM} ) make clean echo ============================ Compile and load Blink ============================ CFLAGS=-DDELUGE_BASESTATION make ${PLATFORM} install ${PPORT} echo ' +-------------------------------------------------------+' echo ' | |' echo ' | At this point the first led (red) should be blinking. |' echo ' | |' echo ' | Press ENTER to continue... |' echo ' | |' echo ' +-------------------------------------------------------+' read echo ============================= Compile a new Blink ============================== CFLAGS=-DBLINK_REVERSE\ -DDELUGE_BASESTATION make ${PLATFORM} echo =============================== Upload the image =============================== ${TOS_DELUGE} ${CPORT} -i 1 build/${PLATFORM}/tos_image.xml echo ' +----------------------------------------------------------------+' echo ' | |' echo ' | In the next step the following things will take place: |' echo ' | - the mote will be rebooted |' echo ' | - all the leds will blink for some time as the |' echo ' | reprogramming by tosboot takes place. |' echo ' | - a fading of the leds will indicate the exiting from tosboot. |' echo ' | - the mote should start blinking the 3rd led (blue/yellow). |' echo ' | |' echo ' | Press ENTER to continue... |' echo ' | |' echo ' +----------------------------------------------------------------+' read echo =========================== Reboot the base station ============================ ${TOS_DELUGE} ${CPORT} -r 1 tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/burn-net000077500000000000000000000107411207233610700220550ustar00rootroot00000000000000#!/bin/bash TOS_DELUGE=`type -p tos-deluge` if [[ ! -x ${TOS_DELUGE} ]] ; then TOS_DELUGE=../../../../tools/tinyos/misc/tos-deluge fi $TOS_DELUGE > /dev/null if [[ $? != 0 ]] then echo "Unable to locate tos-deluge." exit 2 fi if [ $# -ne 2 ]; then echo "Usage: $0 " echo " micaz, telosb, iris or mulle" echo " how many motes will be used in the test" exit 2 fi PLATFORM=$1 NO_MOTES=$2 if [ ${PLATFORM} != 'micaz' -a \ ${PLATFORM} != 'telosb' -a \ ${PLATFORM} != 'iris' \ ${PLATFORM} != 'iris' -a \ ${PLATFORM} != 'mulle' -a \ ${PLATFORM} != 'epic' ] then echo "\"${PLAFTORM}\" is not a supported platform" exit 2 fi if ! [ -a ${TOSDIR}/lib/tosboot/build/${PLATFORM}/main.ihex ] then echo ========================== Compile tosboot for ${PLATFORM} =========================== ( cd $TOSDIR/lib/tosboot ; make ${PLATFORM} ) fi echo ================================ Compile Blink ================================= make clean ID=0 function burn_one() { ID=`expr $ID + 1` echo -n ">>> Please plug mote $ID and type the programming sorce (bsl,PORT | mib510,PORT | eprb,HOST): " read PORT CFLAGS=$1 make ${PLATFORM} install,$ID ${PORT} } while [[ ${NO_MOTES} > 1 ]] do burn_one -DDELUGE_LIGHT_BASESTATION NO_MOTES=`expr ${NO_MOTES} - 1` done echo ">>> Note: this last mote will be the basestation! <<<" burn_one -DDELUGE_BASESTATION echo -n ">>> Please plug mote $ID and type the communication sorce (serial@PORT:SPEED | network@HOST:PORT) to continue: " read CPORT echo ' +------------------------------------------------------------------------+' echo ' | |' echo ' | At this point the first led (red) of all the motes should be blinking. |' echo ' | |' echo ' | Press ENTER to continue... |' echo ' | |' echo ' +------------------------------------------------------------------------+' read echo ============================= Compile a new Blink ============================== CFLAGS=-DBLINK_REVERSE\ -DDELUGE_LIGHT_BASESTATION make ${PLATFORM} echo ========= Upload the new image to the external flash of the last mote ========== ${TOS_DELUGE} ${CPORT} -i 1 build/${PLATFORM}/tos_image.xml echo ' +-----------------------------------------------------+' echo ' | |' echo ' | In the next step the dissemination will be started. |' echo ' | When a node receives a page, the second led (green) |' echo ' | will blink. |' echo ' | |' echo ' | Press ENTER to continue... |' echo ' | |' echo ' +-----------------------------------------------------+' read echo ============================= Start dissemination ============================== ${TOS_DELUGE} ${CPORT} -dr 1 echo ' +------------------------------------------------------------+' echo ' | |' echo ' | The dissemination is completed when the second and third |' echo ' | led from all the motes except the last one stops blinking. |' echo ' | |' echo ' | After a mote gets the whole image he will reboot and |' echo ' | reprogram itself. If the new image contains Deluge he will |' echo ' | continue participating in dissemination. |' echo ' | |' echo ' | In the next step all the motes except the basestation will |' echo ' | be rebooted to allow the reprogramming to take place. |' echo ' | |' echo ' | After reboot the motes should start blinking the 3rd led |' echo ' | (blue/yellow). |' echo ' | |' echo ' +------------------------------------------------------------+' tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/volumes-at45db.xml000066400000000000000000000003141207233610700236650ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/deluge/Blink/volumes-stm25p.xml000066400000000000000000000003211207233610700237320ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/deluge/GoldenImage/000077500000000000000000000000001207233610700215065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/deluge/GoldenImage/GoldenImageAppC.nc000066400000000000000000000034421207233610700247520ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ configuration GoldenImageAppC {} implementation { components DelugeC; components LedsC; DelugeC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/deluge/GoldenImage/Makefile000066400000000000000000000001471207233610700231500ustar00rootroot00000000000000COMPONENT=GoldenImageAppC BOOTLOADER=tosboot CFLAGS+=-DDELUGE_LIGHT_BASESTATION include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/deluge/GoldenImage/README.txt000066400000000000000000000007361207233610700232120ustar00rootroot00000000000000README for apps/tests/deluge/GoldenImage Author/Contact: Chieh-Jan Mike Liang Razvan Musaloiu-E. Description: This is a sample application for Deluge T2. The application is similar to Null, but it includes Deluge T2. The Makefile includes the DELUGE_LIGHT_BASESTATION flag to allow the nodes to be pinged using tos-deluge. Prerequisites: Python 2.4 with pySerial References: The Deluge T2 wiki page from http://docs.tinyos.net/ tinyos-2.1.2+dfsg/apps/tests/deluge/GoldenImage/volumes-at45db.xml000066400000000000000000000003141207233610700250010ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/deluge/GoldenImage/volumes-stm25p.xml000066400000000000000000000003211207233610700250460ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/deluge/SerialBlink/000077500000000000000000000000001207233610700215325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/deluge/SerialBlink/BlinkAppC.nc000066400000000000000000000050771207233610700236700ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Blink is a basic application that toggles the a mote LED periodically. * It does so by starting a Timer that fires every second. It uses the * OSKI TimerMilli service to achieve this goal. * * @author tinyos-help@millennium.berkeley.edu * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. **/ configuration BlinkAppC { } implementation { components MainC, BlinkC, LedsC, DelugeC; components new TimerMilliC() as Timer0; components new SerialAMSenderC(0); BlinkC -> MainC.Boot; BlinkC.Timer0 -> Timer0; BlinkC.Leds -> LedsC; BlinkC.AMSend -> SerialAMSenderC; } tinyos-2.1.2+dfsg/apps/tests/deluge/SerialBlink/BlinkC.nc000066400000000000000000000055371207233610700232300ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation for Blink application. Toggle the red LED when a * Timer fires. * * @author tinyos-help@millennium.berkeley.edu * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. **/ #include "Timer.h" module BlinkC { uses interface Timer as Timer0; uses interface Leds; uses interface Boot; uses interface AMSend; } implementation { message_t byte_msg; event void Boot.booted() { call Timer0.startPeriodic( 1024 ); } event void Timer0.fired() { char *payload = call AMSend.getPayload(&byte_msg, 1); dbg("BlinkC", "Timer 0 fired @ %s.\n", sim_time_string()); #ifndef BLINK_REVERSE call Leds.led0Toggle(); payload[0] = 0; #else call Leds.led2Toggle(); payload[0] = 2; #endif call AMSend.send(AM_BROADCAST_ADDR, &byte_msg, 1); } event void AMSend.sendDone(message_t* msg, error_t error) { }; } tinyos-2.1.2+dfsg/apps/tests/deluge/SerialBlink/Makefile000066400000000000000000000002041207233610700231660ustar00rootroot00000000000000COMPONENT=BlinkAppC BOOTLOADER=tosboot #CFLAGS += -DDELUGE_BASESTATION #CFLAGS += -DDELUGE_LIGHT_BASESTATION include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/deluge/SerialBlink/README.txt000066400000000000000000000027611207233610700232360ustar00rootroot00000000000000README for apps/tests/deluge/SerialBlink Author/Contact: Chieh-Jan Mike Liang Razvan Musaloiu-E. Description: This is a sample application for Deluge T2. The program blinks and sends a serial message every second. On a testbed equipped with a serial back-channel the following test can be run: 1) Compile and burn the program on all the motes on the testbed. The serial messages send by the motes is one-byte value of 0. 2) Compile and burn a base station. This can be done by adding CFLAGS=-DDELUGE_BASESTATION to the make command. For telosb this will look like this: CFLAGS=-DDELUGE_BASESTATION make telosb 3) Compile a different version of SerialBlink by adding CFLAGS=-DBLINK_REVERSE to the make command. For telosb this will look like this: CFLAGS=-DBLINK_REVERSE make telosb 4) Upload the new SerialBlink to the base station. For a telosb connected to /dev/ttyUSB0 this can be accomplish using this command: tos-deluge /dev/ttyUSB0 telosb -i 1 build/telosb/tos_image.xml 5) Give the command to disseminate-and-reboot: tos-deluge /dev/ttyUSB0 telosb -dr 1 As the motes get and reprogram with the new image they will start sending on the serial a one-byte value of 2. For a more detailed discussion on Deluge T2, please refer to the Deluge T2 wiki page. Prerequisites: Python 2.4 with pySerial References: The Deluge T2 wiki page from http://docs.tinyos.net/ tinyos-2.1.2+dfsg/apps/tests/deluge/SerialBlink/volumes-at45db.xml000066400000000000000000000003141207233610700250250ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/deluge/SerialBlink/volumes-stm25p.xml000066400000000000000000000003211207233610700250720ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/mts400/000077500000000000000000000000001207233610700171155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/mts400/DataMsg.h000066400000000000000000000035131207233610700206100ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zoltan Kincses */ #ifndef DATAMSG_H #define DATAMSG_H enum{ AM_DATAMSG=1, }; typedef nx_struct datamsg{ nx_uint16_t AccelX_data; nx_uint16_t AccelY_data; nx_int16_t Intersema_data[2]; nx_uint16_t Temp_data; nx_uint16_t Hum_data; nx_uint16_t VisLight_data; nx_uint16_t InfLight_data; }datamsg_t; #endiftinyos-2.1.2+dfsg/apps/tests/mts400/DataMsg.java000066400000000000000000000410361207233610700213040ustar00rootroot00000000000000/** * This class is automatically generated by mig. DO NOT EDIT THIS FILE. * This class implements a Java interface to the 'DataMsg' * message type. */ public class DataMsg extends net.tinyos.message.Message { /** The default size of this message type in bytes. */ public static final int DEFAULT_MESSAGE_SIZE = 16; /** The Active Message type associated with this message. */ public static final int AM_TYPE = 1; /** Create a new DataMsg of size 16. */ public DataMsg() { super(DEFAULT_MESSAGE_SIZE); amTypeSet(AM_TYPE); } /** Create a new DataMsg of the given data_length. */ public DataMsg(int data_length) { super(data_length); amTypeSet(AM_TYPE); } /** * Create a new DataMsg with the given data_length * and base offset. */ public DataMsg(int data_length, int base_offset) { super(data_length, base_offset); amTypeSet(AM_TYPE); } /** * Create a new DataMsg using the given byte array * as backing store. */ public DataMsg(byte[] data) { super(data); amTypeSet(AM_TYPE); } /** * Create a new DataMsg using the given byte array * as backing store, with the given base offset. */ public DataMsg(byte[] data, int base_offset) { super(data, base_offset); amTypeSet(AM_TYPE); } /** * Create a new DataMsg using the given byte array * as backing store, with the given base offset and data length. */ public DataMsg(byte[] data, int base_offset, int data_length) { super(data, base_offset, data_length); amTypeSet(AM_TYPE); } /** * Create a new DataMsg embedded in the given message * at the given base offset. */ public DataMsg(net.tinyos.message.Message msg, int base_offset) { super(msg, base_offset, DEFAULT_MESSAGE_SIZE); amTypeSet(AM_TYPE); } /** * Create a new DataMsg embedded in the given message * at the given base offset and length. */ public DataMsg(net.tinyos.message.Message msg, int base_offset, int data_length) { super(msg, base_offset, data_length); amTypeSet(AM_TYPE); } /** /* Return a String representation of this message. Includes the * message type name and the non-indexed field values. */ public String toString() { String s = "Message \n"; try { s += " [AccelX_data=0x"+Long.toHexString(get_AccelX_data())+"]\n"; } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } try { s += " [AccelY_data=0x"+Long.toHexString(get_AccelY_data())+"]\n"; } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } try { s += " [Intersema_data="; for (int i = 0; i < 2; i++) { s += "0x"+Long.toHexString(getElement_Intersema_data(i) & 0xffff)+" "; } s += "]\n"; } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } try { s += " [Temp_data=0x"+Long.toHexString(get_Temp_data())+"]\n"; } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } try { s += " [Hum_data=0x"+Long.toHexString(get_Hum_data())+"]\n"; } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } try { s += " [VisLight_data=0x"+Long.toHexString(get_VisLight_data())+"]\n"; } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } try { s += " [InfLight_data=0x"+Long.toHexString(get_InfLight_data())+"]\n"; } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } return s; } // Message-type-specific access methods appear below. ///////////////////////////////////////////////////////// // Accessor methods for field: AccelX_data // Field type: int, unsigned // Offset (bits): 0 // Size (bits): 16 ///////////////////////////////////////////////////////// /** * Return whether the field 'AccelX_data' is signed (false). */ public static boolean isSigned_AccelX_data() { return false; } /** * Return whether the field 'AccelX_data' is an array (false). */ public static boolean isArray_AccelX_data() { return false; } /** * Return the offset (in bytes) of the field 'AccelX_data' */ public static int offset_AccelX_data() { return (0 / 8); } /** * Return the offset (in bits) of the field 'AccelX_data' */ public static int offsetBits_AccelX_data() { return 0; } /** * Return the value (as a int) of the field 'AccelX_data' */ public int get_AccelX_data() { return (int)getUIntBEElement(offsetBits_AccelX_data(), 16); } /** * Set the value of the field 'AccelX_data' */ public void set_AccelX_data(int value) { setUIntBEElement(offsetBits_AccelX_data(), 16, value); } /** * Return the size, in bytes, of the field 'AccelX_data' */ public static int size_AccelX_data() { return (16 / 8); } /** * Return the size, in bits, of the field 'AccelX_data' */ public static int sizeBits_AccelX_data() { return 16; } ///////////////////////////////////////////////////////// // Accessor methods for field: AccelY_data // Field type: int, unsigned // Offset (bits): 16 // Size (bits): 16 ///////////////////////////////////////////////////////// /** * Return whether the field 'AccelY_data' is signed (false). */ public static boolean isSigned_AccelY_data() { return false; } /** * Return whether the field 'AccelY_data' is an array (false). */ public static boolean isArray_AccelY_data() { return false; } /** * Return the offset (in bytes) of the field 'AccelY_data' */ public static int offset_AccelY_data() { return (16 / 8); } /** * Return the offset (in bits) of the field 'AccelY_data' */ public static int offsetBits_AccelY_data() { return 16; } /** * Return the value (as a int) of the field 'AccelY_data' */ public int get_AccelY_data() { return (int)getUIntBEElement(offsetBits_AccelY_data(), 16); } /** * Set the value of the field 'AccelY_data' */ public void set_AccelY_data(int value) { setUIntBEElement(offsetBits_AccelY_data(), 16, value); } /** * Return the size, in bytes, of the field 'AccelY_data' */ public static int size_AccelY_data() { return (16 / 8); } /** * Return the size, in bits, of the field 'AccelY_data' */ public static int sizeBits_AccelY_data() { return 16; } ///////////////////////////////////////////////////////// // Accessor methods for field: Intersema_data // Field type: short[], unsigned // Offset (bits): 32 // Size of each element (bits): 16 ///////////////////////////////////////////////////////// /** * Return whether the field 'Intersema_data' is signed (false). */ public static boolean isSigned_Intersema_data() { return false; } /** * Return whether the field 'Intersema_data' is an array (true). */ public static boolean isArray_Intersema_data() { return true; } /** * Return the offset (in bytes) of the field 'Intersema_data' */ public static int offset_Intersema_data(int index1) { int offset = 32; if (index1 < 0 || index1 >= 2) throw new ArrayIndexOutOfBoundsException(); offset += 0 + index1 * 16; return (offset / 8); } /** * Return the offset (in bits) of the field 'Intersema_data' */ public static int offsetBits_Intersema_data(int index1) { int offset = 32; if (index1 < 0 || index1 >= 2) throw new ArrayIndexOutOfBoundsException(); offset += 0 + index1 * 16; return offset; } /** * Return the entire array 'Intersema_data' as a short[] */ public short[] get_Intersema_data() { short[] tmp = new short[2]; for (int index0 = 0; index0 < numElements_Intersema_data(0); index0++) { tmp[index0] = getElement_Intersema_data(index0); } return tmp; } /** * Set the contents of the array 'Intersema_data' from the given short[] */ public void set_Intersema_data(short[] value) { for (int index0 = 0; index0 < value.length; index0++) { setElement_Intersema_data(index0, value[index0]); } } /** * Return an element (as a short) of the array 'Intersema_data' */ public short getElement_Intersema_data(int index1) { return (short)getSIntBEElement(offsetBits_Intersema_data(index1), 16); } /** * Set an element of the array 'Intersema_data' */ public void setElement_Intersema_data(int index1, short value) { setSIntBEElement(offsetBits_Intersema_data(index1), 16, value); } /** * Return the total size, in bytes, of the array 'Intersema_data' */ public static int totalSize_Intersema_data() { return (32 / 8); } /** * Return the total size, in bits, of the array 'Intersema_data' */ public static int totalSizeBits_Intersema_data() { return 32; } /** * Return the size, in bytes, of each element of the array 'Intersema_data' */ public static int elementSize_Intersema_data() { return (16 / 8); } /** * Return the size, in bits, of each element of the array 'Intersema_data' */ public static int elementSizeBits_Intersema_data() { return 16; } /** * Return the number of dimensions in the array 'Intersema_data' */ public static int numDimensions_Intersema_data() { return 1; } /** * Return the number of elements in the array 'Intersema_data' */ public static int numElements_Intersema_data() { return 2; } /** * Return the number of elements in the array 'Intersema_data' * for the given dimension. */ public static int numElements_Intersema_data(int dimension) { int array_dims[] = { 2, }; if (dimension < 0 || dimension >= 1) throw new ArrayIndexOutOfBoundsException(); if (array_dims[dimension] == 0) throw new IllegalArgumentException("Array dimension "+dimension+" has unknown size"); return array_dims[dimension]; } ///////////////////////////////////////////////////////// // Accessor methods for field: Temp_data // Field type: int, unsigned // Offset (bits): 64 // Size (bits): 16 ///////////////////////////////////////////////////////// /** * Return whether the field 'Temp_data' is signed (false). */ public static boolean isSigned_Temp_data() { return false; } /** * Return whether the field 'Temp_data' is an array (false). */ public static boolean isArray_Temp_data() { return false; } /** * Return the offset (in bytes) of the field 'Temp_data' */ public static int offset_Temp_data() { return (64 / 8); } /** * Return the offset (in bits) of the field 'Temp_data' */ public static int offsetBits_Temp_data() { return 64; } /** * Return the value (as a int) of the field 'Temp_data' */ public int get_Temp_data() { return (int)getUIntBEElement(offsetBits_Temp_data(), 16); } /** * Set the value of the field 'Temp_data' */ public void set_Temp_data(int value) { setUIntBEElement(offsetBits_Temp_data(), 16, value); } /** * Return the size, in bytes, of the field 'Temp_data' */ public static int size_Temp_data() { return (16 / 8); } /** * Return the size, in bits, of the field 'Temp_data' */ public static int sizeBits_Temp_data() { return 16; } ///////////////////////////////////////////////////////// // Accessor methods for field: Hum_data // Field type: int, unsigned // Offset (bits): 80 // Size (bits): 16 ///////////////////////////////////////////////////////// /** * Return whether the field 'Hum_data' is signed (false). */ public static boolean isSigned_Hum_data() { return false; } /** * Return whether the field 'Hum_data' is an array (false). */ public static boolean isArray_Hum_data() { return false; } /** * Return the offset (in bytes) of the field 'Hum_data' */ public static int offset_Hum_data() { return (80 / 8); } /** * Return the offset (in bits) of the field 'Hum_data' */ public static int offsetBits_Hum_data() { return 80; } /** * Return the value (as a int) of the field 'Hum_data' */ public int get_Hum_data() { return (int)getUIntBEElement(offsetBits_Hum_data(), 16); } /** * Set the value of the field 'Hum_data' */ public void set_Hum_data(int value) { setUIntBEElement(offsetBits_Hum_data(), 16, value); } /** * Return the size, in bytes, of the field 'Hum_data' */ public static int size_Hum_data() { return (16 / 8); } /** * Return the size, in bits, of the field 'Hum_data' */ public static int sizeBits_Hum_data() { return 16; } ///////////////////////////////////////////////////////// // Accessor methods for field: VisLight_data // Field type: int, unsigned // Offset (bits): 96 // Size (bits): 16 ///////////////////////////////////////////////////////// /** * Return whether the field 'VisLight_data' is signed (false). */ public static boolean isSigned_VisLight_data() { return false; } /** * Return whether the field 'VisLight_data' is an array (false). */ public static boolean isArray_VisLight_data() { return false; } /** * Return the offset (in bytes) of the field 'VisLight_data' */ public static int offset_VisLight_data() { return (96 / 8); } /** * Return the offset (in bits) of the field 'VisLight_data' */ public static int offsetBits_VisLight_data() { return 96; } /** * Return the value (as a int) of the field 'VisLight_data' */ public int get_VisLight_data() { return (int)getUIntBEElement(offsetBits_VisLight_data(), 16); } /** * Set the value of the field 'VisLight_data' */ public void set_VisLight_data(int value) { setUIntBEElement(offsetBits_VisLight_data(), 16, value); } /** * Return the size, in bytes, of the field 'VisLight_data' */ public static int size_VisLight_data() { return (16 / 8); } /** * Return the size, in bits, of the field 'VisLight_data' */ public static int sizeBits_VisLight_data() { return 16; } ///////////////////////////////////////////////////////// // Accessor methods for field: InfLight_data // Field type: int, unsigned // Offset (bits): 112 // Size (bits): 16 ///////////////////////////////////////////////////////// /** * Return whether the field 'InfLight_data' is signed (false). */ public static boolean isSigned_InfLight_data() { return false; } /** * Return whether the field 'InfLight_data' is an array (false). */ public static boolean isArray_InfLight_data() { return false; } /** * Return the offset (in bytes) of the field 'InfLight_data' */ public static int offset_InfLight_data() { return (112 / 8); } /** * Return the offset (in bits) of the field 'InfLight_data' */ public static int offsetBits_InfLight_data() { return 112; } /** * Return the value (as a int) of the field 'InfLight_data' */ public int get_InfLight_data() { return (int)getUIntBEElement(offsetBits_InfLight_data(), 16); } /** * Set the value of the field 'InfLight_data' */ public void set_InfLight_data(int value) { setUIntBEElement(offsetBits_InfLight_data(), 16, value); } /** * Return the size, in bytes, of the field 'InfLight_data' */ public static int size_InfLight_data() { return (16 / 8); } /** * Return the size, in bits, of the field 'InfLight_data' */ public static int sizeBits_InfLight_data() { return 16; } } tinyos-2.1.2+dfsg/apps/tests/mts400/Makefile000066400000000000000000000005131207233610700205540ustar00rootroot00000000000000COMPONENT=Mts400TesterC SENSORBOARD=mts400 BUILD_EXTRA_DEPS = DataMsg.java Mts400Tester.class CLEAN_EXTRA = $(BULID_EXTRA_DEPS) *.class DataMsg.java: DataMsg.h mig -target=null -java-classname=DataMsg java DataMsg.h datamsg -o $@ Mts400Tester.class: Mts400Tester.java DataMsg.java javac Mts400Tester.java include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/mts400/Mts400Tester.java000066400000000000000000000077651207233610700221550ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zoltan Kincses */ import static java.lang.System.out; import net.tinyos.message.*; import net.tinyos.util.*; import net.tinyos.packet.*; class Mts400Tester implements MessageListener{ private PhoenixSource phoenix; private MoteIF mif; public Mts400Tester(final String source){ phoenix=BuildSource.makePhoenix(source, PrintStreamMessenger.err); mif = new MoteIF(phoenix); mif.registerListener(new DataMsg(),this); } public void messageReceived(int dest_addr,Message msg){ if(msg instanceof DataMsg){ DataMsg results = (DataMsg)msg; int[] taosCalcData = null; double[] sensirionCalcData=null; out.println("The measured results are "); out.println(); out.println("Accelerometer X axis: "+results.get_AccelX_data()); out.println("Accelerometer Y axis: "+results.get_AccelY_data()); out.println("Intersema temperature: "+results.getElement_Intersema_data(0)); out.println("Intersema pressure: "+results.getElement_Intersema_data(1)); sensirionCalcData=calculateSensirion(results.get_Temp_data(),results.get_Hum_data()); out.printf("Sensirion temperature: %.2f\n",sensirionCalcData[0]); out.printf("Sensirion humidity: %.2f\n",sensirionCalcData[1]); taosCalcData=calculateTaos(results.get_VisLight_data(),results.get_InfLight_data()); out.println("Taos visible light: "+taosCalcData[0]); out.println("Taos infrared light: "+taosCalcData[1]); } } private int[] calculateTaos(int VisibleLight,int InfraredLight){ final int CHORD_VAL[]={0,16,49,115,247,511,1039,2095}; final int STEP_VAL[]={1,2,4,8,16,32,64,128}; int chordVal,stepVal; int[] lightVal=new int[2]; chordVal=(VisibleLight>>4) & 7; stepVal=VisibleLight & 15; lightVal[0]=CHORD_VAL [chordVal]+stepVal*STEP_VAL[chordVal]; chordVal=(InfraredLight>>4)&7; stepVal=VisibleLight & 15; lightVal[1]=CHORD_VAL[chordVal]+stepVal*STEP_VAL[chordVal]; return lightVal; } private double[] calculateSensirion(int Temperature,int Humidity){ double [] converted = new double[2]; converted[0]=-39.4+(0.01*(double)Temperature); converted[1]=(-2.0468+0.0367*(double)Humidity-0.0000015955*Math.pow((double)Humidity,(double )2))+(converted[0]-25)*(0.01+0.00008*(double)Humidity); return converted; } public static void main (String[] args) { if ( args.length == 2 && args[0].equals("-comm") ) { Mts400Tester hy = new Mts400Tester(args[1]); } else { System.err.println("usage: java Mts400Tester [-comm ]"); System.exit(1); } } }tinyos-2.1.2+dfsg/apps/tests/mts400/Mts400TesterC.nc000066400000000000000000000044071207233610700217250ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zoltan Kincses */ #include "DataMsg.h" configuration Mts400TesterC { } implementation { components MainC; components LedsC; components new Accel202C(); components new Intersema5534C(); components new SensirionSht11C(); components new Taos2550C(); components ActiveMessageC; components new AMSenderC(AM_DATAMSG); components Mts400TesterP as App; App.Boot -> MainC; App.Leds -> LedsC; App.AMSend -> AMSenderC; App.SplitControl -> ActiveMessageC; App.X_Axis -> Accel202C.X_Axis; App.Y_Axis -> Accel202C.Y_Axis; App.Intersema -> Intersema5534C.Intersema; App.Temperature -> SensirionSht11C.Temperature; App.Humidity -> SensirionSht11C.Humidity; App.VisibleLight -> Taos2550C.VisibleLight; App.InfraredLight -> Taos2550C.InfraredLight; } tinyos-2.1.2+dfsg/apps/tests/mts400/Mts400TesterP.nc000066400000000000000000000073051207233610700217420ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zoltan Kincses */ #include "DataMsg.h" module Mts400TesterP { uses interface Boot; uses interface Leds; uses interface SplitControl; uses interface Read as X_Axis; uses interface Read as Y_Axis; uses interface Intersema; uses interface Read as Temperature; uses interface Read as Humidity; uses interface Read as VisibleLight; uses interface Read as InfraredLight; uses interface AMSend; } implementation { uint16_t AccelX_data,AccelY_data,Temp_data,Hum_data,VisLight_data; int16_t Intersema_data[2]; event void Boot.booted() { call SplitControl.start(); } event void SplitControl.startDone(error_t err){ if(err==SUCCESS){ call X_Axis.read(); call Leds.led0On(); }else{ call SplitControl.start(); } } event void X_Axis.readDone(error_t err, uint16_t data){ AccelX_data=data; call Y_Axis.read(); } event void Y_Axis.readDone(error_t err, uint16_t data){ AccelY_data=data; call Intersema.read(); } event void Intersema.readDone(error_t err, int16_t* data){ Intersema_data[0]=data[0]; Intersema_data[1]=data[1]; call Temperature.read(); } event void Temperature.readDone(error_t err, uint16_t data){ Temp_data=data; call Humidity.read(); } event void Humidity.readDone(error_t err, uint16_t data){ Hum_data=data; call VisibleLight.read(); } event void VisibleLight.readDone(error_t err, uint8_t data){ VisLight_data=data; call InfraredLight.read(); } message_t message; event void InfraredLight.readDone(error_t err, uint8_t data){ datamsg_t* packet = (datamsg_t*)(call AMSend.getPayload(&message, sizeof(datamsg_t))); packet-> AccelX_data=AccelX_data; packet-> AccelY_data = AccelY_data; packet-> Intersema_data[0] = Intersema_data[0]; packet-> Intersema_data[1] = Intersema_data[1]; packet-> Temp_data =Temp_data; packet-> Hum_data = Hum_data; packet-> VisLight_data = VisLight_data; packet-> InfLight_data = data; call AMSend.send(AM_BROADCAST_ADDR, &message, sizeof(datamsg_t)); } event void AMSend.sendDone(message_t* bufPtr, error_t error){ call X_Axis.read(); call Leds.led1Toggle(); } event void SplitControl.stopDone(error_t err){} } tinyos-2.1.2+dfsg/apps/tests/mts400/README.txt000066400000000000000000000046501207233610700206200ustar00rootroot00000000000000README for Mts400Tester Author/Contact: Zoltn Kincses, kincsesz@inf.u-szeged.hu Description: This is a demo application for the mts400 sensor board. This board contains a 2-Axis accelerometer (Analog Devices ADXL202JE), a barometric pressure and temperature sensor (Intersema MS5534), a humidity and temperature sensor (Sensirion SHT11), and a light sensor (Taos TSL2550). You can find detailed description about the board at the http://courses.ece.ubc.ca/494/files/MTS-MDA_Series_Users_Manual_7430-0020-04_B.pdf website. In this application, the Accel202C sensor is sampled first in the X and then in the Y direction. In the next step, the Intersema5534C sensor is sampled, and the read values are stored in an array. The first element is the temperature and the second is the pressure. After this, the SensirionSht11C sensor is sampled, where the raw temperature and then humidity data is read. Finally, the Taos255C sensor is sampled, where the raw visible and then infrared light data is read. The read values are sent to the basestation, and the sampling process starts again. The raw data read from the SensirionSht11C and Taos2550C sensors have to be converted, according to the datasheets of the sensors. The required conversions are done in the example java code. To compile the application, two include directories are required, which can be found in the Makefile of the application. The output normally looks like the following: Accelerometer X axis: the measured value (in g) Accelerometer Y axis: the measured value (in g) Intersema temperature: the measured value (in degree centigrade) Intersema pressure: the measured value (in mbar) Sensirion temperature: the converted value (in degree centigrade) Sensirion humidity: the converted value (in %RH) Taos visible light: the converted value (in Lux) Taos infrared light: the converted value (in Lux) The displayed Intersema temperature and pressure values always contain one decimal digit. For example, if the measured temperature value is 262, it means that the temperature is 26.2 degree centigrade. Similarly if the measured pressure value is 9922, it means the pressure is 992.2 mbar. During the operation of the application, the led0 indicates that the mote is on, and the led1 indicates the mote sent the measured data to the basestation. Tools: The Mts400Tester.java is the example java code. Known bugs/limitations: None. $Id: README.txt,v 1.1 2010-06-21 22:56:11 mmaroti Exp $ tinyos-2.1.2+dfsg/apps/tests/rfxlink/000077500000000000000000000000001207233610700175435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/rfxlink/RadioSniffer/000077500000000000000000000000001207233610700221165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/rfxlink/RadioSniffer/Makefile000066400000000000000000000003351207233610700235570ustar00rootroot00000000000000COMPONENT=RadioSnifferC CFLAGS += -I$(TOSDIR)/lib/diagmsg CFLAGS += -DTASKLET_IS_TASK CFLAGS += -DDIAGMSG_RECORDED_MSGS=60 CFLAGS += -DRADIO_DEBUG -DRADIO_DEBUG_MESSAGES CFLAGS += -DRF230_RSSI_ENERGY include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/rfxlink/RadioSniffer/RadioSnifferC.nc000066400000000000000000000073001207233610700251160ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration RadioSnifferC { } implementation { #define UQ_METADATA_FLAGS "UQ_METADATA_FLAGS" #define UQ_RADIO_ALARM "UQ_RADIO_ALARM" components RadioSnifferP, MainC, SerialActiveMessageC, AssertC; RadioSnifferP.Boot -> MainC; RadioSnifferP.SplitControl -> SerialActiveMessageC; RadioSnifferP.RadioState -> RadioDriverLayerC; // just to avoid a timer compilation bug components new TimerMilliC(); // -------- ActiveMessage components new Ieee154PacketLayerC(); Ieee154PacketLayerC.SubPacket -> TimeStampingLayerC; // -------- TimeStamping components new TimeStampingLayerC(); TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC; TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC; TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; // -------- MetadataFlags components new MetadataFlagsLayerC(); MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC; // -------- RadioAlarm components new RadioAlarmC(); RadioAlarmC.Alarm -> RadioDriverLayerC; // -------- RadioDriver #if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) || defined(PLATFORM_MESHBEAN) components RF230DriverLayerC as RadioDriverLayerC; components RF230RadioP as RadioP; #elif defined(PLATFORM_MESHBEAN900) components RF212DriverLayerC as RadioDriverLayerC; components RF212RadioP as RadioP; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSA) || defined(PLATFORM_TELOSB) components CC2420XDriverLayerC as RadioDriverLayerC; components CC2420XRadioP as RadioP; #elif defined(PLATFORM_UCMINI) components RFA1DriverLayerC as RadioDriverLayerC; components RFA1RadioP as RadioP; #endif RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC; RadioDriverLayerC.Config -> RadioP; RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC; RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; } tinyos-2.1.2+dfsg/apps/tests/rfxlink/RadioSniffer/RadioSnifferP.nc000066400000000000000000000042021207233610700251310ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include module RadioSnifferP { uses { interface Boot; interface SplitControl; interface RadioState; } } implementation { task void serialPowerUp() { if( call SplitControl.start() != SUCCESS ) post serialPowerUp(); } event void SplitControl.startDone(error_t error) { if( error != SUCCESS ) post serialPowerUp(); else call RadioState.turnOn(); } event void SplitControl.stopDone(error_t error) { } event void Boot.booted() { post serialPowerUp(); } tasklet_async event void RadioState.done() { } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/000077500000000000000000000000001207233610700232665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/Makefile000066400000000000000000000013371207233610700247320ustar00rootroot00000000000000COMPONENT=TestPacketTimeSyncAppC PFLAGS+=-DTIMESYNC_TMICRO PFLAGS+=-DTASKLET_IS_TASK #PFLAGS+=-DRADIO_DEBUG -DRADIO_DEBUG_MESSAGES BUILD_EXTRA_DEPS = PingMsg.class PongMsg.class TestPacketTimeSync.class CLEAN_EXTRA = *.class PongMsg.java PingMsg.java PingMsg.class: PingMsg.java javac PingMsg.java PongMsg.class: PongMsg.java javac PongMsg.java PingMsg.java: TestPacketTimeSync.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=PingMsg TestPacketTimeSync.h real_ping_msg -o $@ PongMsg.java: TestPacketTimeSync.h mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=PongMsg TestPacketTimeSync.h pong_msg -o $@ TestPacketTimeSync.class: PongMsg.class PingMsg.class javac TestPacketTimeSync.java include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/NoSleepC.nc000066400000000000000000000023211207233610700252560ustar00rootroot00000000000000/* * Copyright (c) 2002-2011, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ configuration NoSleepC { } implementation { components McuSleepC, NoSleepP; McuSleepC.McuPowerOverride -> NoSleepP; }tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/NoSleepP.nc000066400000000000000000000032161207233610700252770ustar00rootroot00000000000000/* * Copyright (c) 2002-2011, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ module NoSleepP { provides interface McuPowerOverride; } implementation { async command mcu_power_t McuPowerOverride.lowestState() { #if defined(PLATFORM_TELOS) || defined(PLATFORM_TELOSA) || defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) return MSP430_POWER_ACTIVE; #elif defined(PLATFORM_MICA2) || defined(PLATFORM_MICAZ) || defined(PLATFORM_XSM) || defined(PLATFORM_IRIS) || defined(PLATFORM_ZIGBIT) return ATM128_POWER_IDLE; #else #warning Assuming 0 is the IDLE power state that prevents MCU from sleep return 0; #endif } }tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/Ping.java000066400000000000000000000061121207233610700250260ustar00rootroot00000000000000import java.util.*; import java.io.*; public class Ping { int pinger; long ping_counter; short ping_tx_timestamp_is_valid; long ping_tx_timestamp; long ping_event_time; PingMsg pingMsg; Set pongs = new TreeSet(); public Ping(PingMsg m) { setPingMsg(m); } public Ping(int pinger, long ping_counter) { this.pinger = pinger; this.ping_counter = ping_counter; } public int get_pinger() { if(pingMsg == null) return pinger; else return pingMsg.get_pinger(); } public long get_ping_counter() { if(pingMsg == null) return ping_counter; else return pingMsg.get_ping_counter(); } public long get_ping_event_time() { if(pingMsg == null) return ping_event_time; else return pingMsg.get_ping_event_time(); } public void set_ping_event_time(long l) { ping_event_time = l; } public short get_ping_tx_timestamp_is_valid() { return ping_tx_timestamp_is_valid; } public void set_ping_tx_timestamp_is_valid(short s) { ping_tx_timestamp_is_valid = s; } public long get_ping_tx_timestamp() { return ping_tx_timestamp; } public void set_ping_tx_timestamp(long l) { ping_tx_timestamp = l; } public void setPingMsg(PingMsg m) { this.pingMsg = m; } public PingMsg getPingMsg() { return this.pingMsg; } public void addPong(Pong p) { pongs.add(p); } public void printHeader(PrintStream out) { out.print("#pinger\t"); out.print("counter\t"); out.print("Te_tx\t"); out.print("Ttx_vld\t"); out.print("Ttx\t"); out.print("ponger\t"); out.print("Trx_vld\t"); out.print("Te_vld\t"); out.print("Trx\t"); out.print("Te_rx\t"); out.print("Trx-Ttx\t"); out.print("Te_rx-Te_tx\n"); } public void print(PrintStream out) { Iterator it = pongs.iterator(); while(it.hasNext()) { printHeader(out); Pong pong = (Pong)it.next(); out.print(get_pinger()+"\t"); out.print(get_ping_counter()+"\t"); out.print(get_ping_event_time()+"\t"); out.print(get_ping_tx_timestamp_is_valid()+"\t"); out.print(get_ping_tx_timestamp()+"\t"); out.print(pong.getPongMsg().get_ponger()+"\t"); out.print(pong.getPongMsg().get_ping_rx_timestamp_is_valid()+"\t"); out.print(pong.getPongMsg().get_ping_event_time_is_valid()+"\t"); out.print(pong.getPongMsg().get_ping_rx_timestamp()+"\t"); out.print(pong.getPongMsg().get_ping_event_time()+"\t"); long tTxOffset = pong.getPongMsg().get_ping_rx_timestamp()-get_ping_tx_timestamp(); // for 16-bit timestamping //if(tTxOffset<0) tTxOffset+=Math.pow(2,16); // for 32-bit timestamping if(tTxOffset<0) tTxOffset+=Math.pow(2,32); out.print(tTxOffset+"\t"); long tEvtOffset = pong.getPongMsg().get_ping_event_time()-get_ping_event_time(); // for 16-bit timestamping //if(tEvtOffset<0) tEvtOffset+=Math.pow(2,16); // for 32-bit timestamping if(tEvtOffset<0) tEvtOffset+=Math.pow(2,32); out.print(tEvtOffset+"\n"); } out.print("\n"); } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/Pong.java000066400000000000000000000007361207233610700250420ustar00rootroot00000000000000public class Pong implements Comparable { PongMsg pongMsg; public Pong(PongMsg m) { setPongMsg(m); } public void setPongMsg(PongMsg m) { this.pongMsg = m; } public PongMsg getPongMsg() { return this.pongMsg; } public int compareTo(Object o) { if(o instanceof Pong) { Pong p = (Pong)o; return new Integer(this.getPongMsg().get_ponger()).compareTo(new Integer(p.getPongMsg().get_ponger())); } else { return 0; } } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/README.txt000066400000000000000000000074151207233610700247730ustar00rootroot00000000000000TestPacketTimeSync Description: The TestPacketTimeSync application is used to test/benchmark the packet-level time synchronization capability (as described in TEP133) of the radio stack. Usage: The test setup consists of a pinger node (programmed with node id 1), one or more ponger nodes, and a base station. The test application operates as follows: The pinger node periodically sends out ping messages using the TimeSyncAMSend interface. All ping messages have event times attached: these are timestamps taken short before the message was sent. Also, a ping message contains the transmission timestamp of the preceding ping message. Ponger nodes respond to the ping messages by sending pong messages, which contain the received event time and the reception timestamp of the ping message. The java application TestPacketTimeSync is used to collects all this information on the PC. 1. Build the TestPacketTimeSync application (e.g. make telosb cc2420x) 2. Install pinger node with node id 1 (e.g. make telosb reinstall,1 bsl,10) 3. Install ponger node(s) (with node id other than 1) 4. Set up a node as base station (use ../BaseStation) 5. Start the java application (change the communications port to match local setup): java TestPacketTimeSync -comm serial@telosb:com15 In order to store the data in a log file, redirect the output to a file: e.g. java TestPacketTimeSync -comm serial@telosb:com15 > tep133.log To load the data in excel, preprocess it first with grep: cat tep133.log | grep -v pinger | grep -v "^$" > tep133_log_for_excel.txt The recorded data (after sorting) will look as follows: #pinger counter Te_tx Ttx_vld Ttx ponger Trx_vld Te_vld Trx Te_rx Trx-Ttx Te_rx-Te_tx 1 1 855200 1 860421 2 1 1 20632897 20627676 19772476 19772476 1 2 1117344 1 1119109 2 1 1 20891589 20889824 19772480 19772480 1 3 1379520 1 1384005 2 1 1 21156488 21152003 19772483 19772483 1 4 1641664 1 1649253 2 1 1 21421754 21414165 19772501 19772501 1 5 1903808 1 1913797 2 1 1 21686285 21676296 19772488 19772488 1 6 2165920 1 2174149 2 1 1 21946630 21938401 19772481 19772481 1 7 2428096 1 2437061 2 1 1 22209575 22200610 19772514 19772514 1 8 2690240 1 2696773 2 1 1 22469271 22462738 19772498 19772498 1 9 2952352 1 2958117 2 1 1 22730612 22724847 19772495 19772495 1 10 3214496 1 3218053 2 1 1 22990568 22987011 19772515 19772515 1 11 3476640 1 3480645 2 1 1 23253145 23249140 19772500 19772500 1 12 3738784 1 3741253 2 1 1 23513760 23511291 19772507 19772507 1 13 4000960 1 4011877 2 1 1 23784386 23773469 19772509 19772509 1 14 4263104 1 4271877 2 1 1 24044393 24035620 19772516 19772516 1 15 4525248 1 4530309 2 1 1 24302792 24297731 19772483 19772483 Ideally, Trx-Ttx values (the clock offset between the transmitter and the receiver) should be constant for the same ponger node (with some clock drift). Also, the difference between the pinger's and a given ponger's event times (Te_rx-Te_tx) should be constant over (with some clock drift). tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/TestPacketTimeSync.h000066400000000000000000000040111207233610700271560ustar00rootroot00000000000000/* * Copyright (c) 2002-2011, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ #ifndef TEST_PACKET_TIMESYNC_H #define TEST_PACKET_TIMESYNC_H typedef nx_struct ping_msg { nx_uint16_t pinger; nx_uint32_t ping_counter; nx_uint32_t ping_event_time; nx_uint32_t prev_ping_counter; nx_uint8_t prev_ping_tx_timestamp_is_valid; nx_uint32_t prev_ping_tx_timestamp; } ping_msg_t; typedef nx_struct real_ping_msg { nx_uint16_t pinger; nx_uint32_t ping_counter; nx_uint32_t ping_event_time; nx_uint32_t prev_ping_counter; nx_uint8_t prev_ping_tx_timestamp_is_valid; nx_uint32_t prev_ping_tx_timestamp; nx_uint32_t am_id; // am-over-am am id } real_ping_msg_t; typedef nx_struct pong_msg { nx_uint16_t ponger; nx_uint16_t pinger; nx_uint32_t ping_counter; nx_uint32_t ping_event_time; nx_uint8_t ping_rx_timestamp_is_valid; nx_uint8_t ping_event_time_is_valid; nx_uint32_t ping_rx_timestamp; } pong_msg_t; enum { AM_PING_MSG = 16, AM_REAL_PING_MSG = 0x3d, // packettimesync am id AM_PONG_MSG = 17, }; #endif tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/TestPacketTimeSync.java000066400000000000000000000077041207233610700276640ustar00rootroot00000000000000/* * Copyright (c) 2002-2011, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ import java.util.*; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class TestPacketTimeSync implements net.tinyos.message.MessageListener { private MoteIF moteIF; private Map pingMap = new HashMap(); public TestPacketTimeSync(String source) throws Exception { if (source != null) { moteIF = new MoteIF(BuildSource.makePhoenix(source, PrintStreamMessenger.err)); } else { moteIF = new MoteIF(BuildSource.makePhoenix(PrintStreamMessenger.err)); } } public void start() { } public void messageReceived(int to, Message message) { long t = System.currentTimeMillis(); System.err.println("INFO: received message type = "+message.amType()+ " length=" + message.dataLength()); if(message instanceof PongMsg) { PongMsg pongMsg = (PongMsg)message; if(pongMsg.get_ping_counter()==0) return; String key= "_"+pongMsg.get_pinger()+"_"+pongMsg.get_ping_counter(); Ping ping = (Ping)pingMap.get(key); if (ping!=null) { ping.addPong(new Pong(pongMsg)); } else { System.err.println("ERROR: cannot find ping msg with counter value "+pongMsg.get_ping_counter()); } } if(message instanceof PingMsg) { PingMsg pingMsg = (PingMsg)message; if(pingMsg.get_ping_counter()==0) return; String key= "_"+pingMsg.get_pinger()+"_"+pingMsg.get_ping_counter(); Ping ping = (Ping)pingMap.get(key); if (ping==null) { ping = new Ping(pingMsg); pingMap.put(key,ping); String prevKey= "_"+pingMsg.get_pinger()+"_"+pingMsg.get_prev_ping_counter(); Ping prevPing = (Ping)pingMap.get(prevKey); if(prevPing==null) { System.err.println("ERROR: cannot find previous ping msg with counter value "+pingMsg.get_prev_ping_counter()); } else { prevPing.set_ping_tx_timestamp_is_valid(pingMsg.get_prev_ping_tx_timestamp_is_valid()); prevPing.set_ping_tx_timestamp(pingMsg.get_prev_ping_tx_timestamp()); prevPing.print(System.out); pingMap.remove(prevPing); } } else { System.err.println("ERROR: received duplicate ping msg "+pingMsg.get_ping_counter()); } } } private static void usage() { System.err.println("usage: TestPacketTimeSync [-comm ]"); } private void addMsgType(Message msg) { moteIF.registerListener(msg, this); } public static void main(String[] args) throws Exception { String source = null; if (args.length > 0) { for (int i = 0; i < args.length; i++) { if (args[i].equals("-comm")) { source = args[++i]; } } } else if (args.length != 0) { usage(); System.exit(1); } TestPacketTimeSync me = new TestPacketTimeSync(source); me.moteIF.registerListener(new PingMsg(),me); me.moteIF.registerListener(new PongMsg(),me); me.start(); } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/TestPacketTimeSyncAppC.nc000066400000000000000000000035161207233610700301040ustar00rootroot00000000000000/* * Copyright (c) 2002-2011, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ #include "TestPacketTimeSync.h" configuration TestPacketTimeSyncAppC {} implementation { components MainC, TestPacketTimeSyncC as App, LedsC; components ActiveMessageC; components TimeSyncMessageC; components new TimerMilliC(); components LocalTimeMicroC; components NoSleepC; App.Boot -> MainC.Boot; App.PingReceive -> TimeSyncMessageC.Receive[AM_PING_MSG]; App.PingAMSend -> TimeSyncMessageC.TimeSyncAMSendRadio[AM_PING_MSG]; App.PongAMSend -> ActiveMessageC.AMSend[AM_PONG_MSG]; App.AMControl -> ActiveMessageC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> ActiveMessageC; App.AMPacket -> ActiveMessageC; App.PacketTimeStamp -> ActiveMessageC; App.TimeSyncPacket -> TimeSyncMessageC; App.LocalTime -> LocalTimeMicroC; } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestPacketTimeSync/TestPacketTimeSyncC.nc000066400000000000000000000131321207233610700274360ustar00rootroot00000000000000/* * Copyright (c) 2002-2011, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ #include "Timer.h" #include "TestPacketTimeSync.h" module TestPacketTimeSyncC { uses { interface Leds; interface Boot; interface Receive as PingReceive; interface AMSend as PongAMSend; interface AMPacket; interface Timer as MilliTimer; interface SplitControl as AMControl; interface Packet; #if defined(TIMESYNC_T32KHZ) interface PacketTimeStamp; interface TimeSyncPacket; interface TimeSyncAMSend as PingAMSend; interface LocalTime; #elif defined(TIMESYNC_TMICRO) interface PacketTimeStamp; interface TimeSyncPacket; interface TimeSyncAMSend as PingAMSend; interface LocalTime; #else interface PacketTimeStamp; interface TimeSyncPacket; interface TimeSyncAMSend as PingAMSend; interface LocalTime; #endif } } implementation { message_t ping_packet; message_t pong_packet; bool locked; uint32_t counter = 0; event void Boot.booted() { memset(&ping_packet, 0, sizeof(ping_packet)); memset(&pong_packet, 0, sizeof(pong_packet)); call AMControl.start(); } task void nullTask() { // just to prevent the MCU from sleeping post nullTask(); } event void AMControl.startDone(error_t err) { if (err == SUCCESS) { if(call AMPacket.address() == 1) { call MilliTimer.startPeriodic(1024/4); } #if defined(PINGER) else { call MilliTimer.startPeriodic(1024/4); } #endif #if !defined(TOSSIM) post nullTask(); #endif } else { call AMControl.start(); } } event void AMControl.stopDone(error_t err) { // do nothing } event void MilliTimer.fired() { call Leds.led1Toggle(); if (locked) { return; } else { ping_msg_t* ping = (ping_msg_t*)call Packet.getPayload(&ping_packet, sizeof(ping_msg_t)); uint32_t eventTime = call LocalTime.get(); if (ping == NULL) { return; } ping->pinger = TOS_NODE_ID; ping->ping_counter = counter++; ping->ping_event_time = eventTime; if (call PingAMSend.send(AM_BROADCAST_ADDR, &ping_packet, sizeof(ping_msg_t), eventTime) == SUCCESS) { dbg("TestPacketTimeSync", "%d: TestPacketTimeSync: Sending ping #%d with event time %d\n", call LocalTime.get(), ping->ping_counter, eventTime); call Leds.led0On(); locked = TRUE; } } } event message_t* PingReceive.receive(message_t* bufPtr, void* payload, uint8_t len) { call Leds.led2Toggle(); dbg("TestPacketTimeSync", "%d: TestPacketTimeSync: Received ping of size %d (%d expected)\n", call LocalTime.get(), len, sizeof(ping_msg_t)+4); if (locked /*|| len != sizeof(ping_msg_t)*/) { return bufPtr; } else { ping_msg_t* ping = (ping_msg_t*)payload; pong_msg_t* pong = (pong_msg_t*)call Packet.getPayload(&pong_packet, sizeof(pong_msg_t)); pong->ponger = TOS_NODE_ID; pong->pinger = ping->pinger; pong->ping_counter = ping->ping_counter; pong->ping_event_time = call TimeSyncPacket.eventTime(bufPtr); pong->ping_rx_timestamp_is_valid = call PacketTimeStamp.isValid(bufPtr); pong->ping_event_time_is_valid = call TimeSyncPacket.isValid(bufPtr); if(pong->ping_rx_timestamp_is_valid > 0) pong->ping_rx_timestamp_is_valid = 1; pong->ping_rx_timestamp = call PacketTimeStamp.timestamp(bufPtr); dbg("TestPacketTimeSync", "%d: TestPacketTimeSync: Received ping #%d with event time %d\n", call LocalTime.get(), ping->ping_counter, pong->ping_event_time); if (call PongAMSend.send(AM_BROADCAST_ADDR, &pong_packet, sizeof(pong_msg_t)) == SUCCESS) { call Leds.led0On(); locked = TRUE; } return bufPtr; } } event void PingAMSend.sendDone(message_t* bufPtr, error_t error) { if (&ping_packet == bufPtr) { ping_msg_t* ping = (ping_msg_t*)call Packet.getPayload(&ping_packet, sizeof(ping_msg_t)); ping->prev_ping_counter = ping->ping_counter; ping->prev_ping_tx_timestamp_is_valid = call PacketTimeStamp.isValid(bufPtr); if(ping->prev_ping_tx_timestamp_is_valid > 0) ping->prev_ping_tx_timestamp_is_valid = 1; ping->prev_ping_tx_timestamp = call PacketTimeStamp.timestamp(bufPtr); call Leds.led0Off(); locked = FALSE; } } event void PongAMSend.sendDone(message_t* bufPtr, error_t error) { if (&pong_packet == bufPtr) { call Leds.led0Off(); locked = FALSE; } } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/000077500000000000000000000000001207233610700230045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/Analize.java000066400000000000000000000156401207233610700252400ustar00rootroot00000000000000/** Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; import java.util.*; public class Analize implements MessageListener { static final int NUMBER_OF_MOTES = TestMsg.numElements_history_times(0); static final int HISTORY_SIZE = TestMsg.numElements_history_times(1); int maxSamples = 100; int samples = 0; public static void main(String[] args) { Analize analize = new Analize(); String comm = null; for(int i = 0; i < args.length; ++i) { if( args[i].equals("-comm") && i < args.length-1 ) comm = args[++i]; else if( args[i].equals("-samples") && i < args.length-1 ) analize.maxSamples = Integer.parseInt(args[++i]); else { System.err.println("usage: Analize [-comm ] [-samples ]"); System.exit(1); } } PhoenixSource phoenix; if( comm == null ) phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); else phoenix = BuildSource.makePhoenix(args[1], PrintStreamMessenger.err); MoteIF mote = new MoteIF(phoenix); System.out.println("Collecting " + analize.maxSamples + " synchronization points from " + NUMBER_OF_MOTES + " motes..."); mote.registerListener(new TestMsg(), analize); } int[] seqnos = new int[NUMBER_OF_MOTES]; int resolveSeqno(int sender, int seqno) { seqno &= 0xFF; while( (seqnos[sender] & 0xFF) != seqno ) seqnos[sender] += 1; return seqnos[sender]; } static class Entry { int sender; int seqno; long[] times = new long[NUMBER_OF_MOTES]; boolean reported = false; boolean isFull() { for(int i = 0; i < times.length; ++i) if( times[i] == 0 ) return false; return true; } public String toString() { String s = "sender " + sender + " :"; for(int i = 0; i < times.length; ++i) s += " " + times[i]; return s; } } ArrayList entries = new ArrayList(); Entry getEntry(int sender, int seqno) { for(Entry entry : entries) { if( entry.sender == sender && entry.seqno == seqno ) return entry; } Entry entry = new Entry(); entry.sender = sender; entry.seqno = seqno; entries.add(entry); return entry; } public synchronized void messageReceived(int dest_addr, Message amsg) { if( !(amsg instanceof TestMsg) ) { System.err.println("Incorrect message format"); return; } TestMsg msg = (TestMsg)amsg; int reporter = msg.getSerialPacket().get_header_src(); if( reporter < 0 || reporter >= NUMBER_OF_MOTES ) { System.err.println("Incorrect nodeid in message"); return; } for(int sender = 0; sender < NUMBER_OF_MOTES; ++sender) { int seqNo = resolveSeqno(sender, msg.getElement_history_seqno(sender)); for(int history = HISTORY_SIZE - 1; history >= 0; --history) { if( seqNo - history < 0 ) continue; Entry entry = getEntry(sender, seqNo - history); long time = msg.getElement_history_times(sender, history); if( entry.times[reporter] != 0 && entry.times[reporter] != time ) System.err.println("Conflicting times received"); entry.times[reporter] = time; if( entry.isFull() && ! entry.reported ) { samples += 1; entry.reported = true; System.out.println(entry); if( samples >= maxSamples ) analize(); } else if( samples == 0 && entries.size() >= 20 ) { System.err.println("Messages are not received form all motes"); System.exit(1); } } } } void analize() { System.out.println("Analizing data..."); LinearEquations equations = new LinearEquations(); for(Entry entry : entries) { if( ! entry.isFull() ) continue; for(int receiver = 0; receiver < NUMBER_OF_MOTES; ++receiver) { if( receiver == entry.sender ) continue; LinearEquations.Equation equation = equations.createEquation(); if( entry.sender != 0 ) { equation.addCoefficient("offset" + entry.sender, 1.0); equation.addCoefficient("skew" + entry.sender, entry.times[entry.sender]); } else equation.addConstant(-entry.times[0]); if( receiver != 0 ) { equation.addCoefficient("offset" + receiver, -1.0); equation.addCoefficient("skew" + receiver, -entry.times[receiver]); } else equation.addConstant(entry.times[0]); equation.addCoefficient("delay", 1.0); equations.addEquation(equation); } } LinearEquations.Solution solution = equations.solveLeastSquares(); for(int i = 0; i < NUMBER_OF_MOTES; ++i) { System.out.println("offset " + i + " = " + (i == 0 ? 0.0 : solution.getValue("offset" + i)) + "\tskew " + i + " = " + (i == 0 ? 1.0 : solution.getValue("skew" + i))); } System.out.println("transmit delay = " + solution.getValue("delay")); System.out.println("maximum error = " + solution.getMaximumError()); System.out.println("average error = " + solution.getAverageError()); System.exit(0); } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/Jama-1.0.2.jar000066400000000000000000001000071207233610700250040ustar00rootroot00000000000000PK}2 META-INF/PKPK}2META-INF/MANIFEST.MFMLK-. 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EPW).y/-tBf)НY d;yǁ >ba GP̂gP"0-Ry0ml3ö8 Cvd o7 e{`{F`{F}0*Ta/e?Cg aL4`0<ͣay0ϼ [ټ'aiXh~?+h13DM  K2XTRXJR&Je g(QX Upru&8WVs- )|e;\쁋WbLy.Q¥ʗA6)Fw"fK7n*K1\ck-p-7i-9mU/:r.b9nl-[.Vò l{,my[ބv>xvX> ;x{2^ XkSMVz|i} > X_ooG|o`~I ࠭;jO[n;(`;l(MdjFMfll[FT:jOKj@˩vun{hN]mB3Ea}K{~}mP/nG٭M.tmGŴ>هR{Wr >OC1/C1:̾Z:~>ioUkX ھAZcxD6`NL'IoOtL;[c^k :@?Wej_._7j=VoՑ~߫ՙ'u.=j#E_7 zSHRzDJ)I}Q}Y2oKf=IV??IV]HNWK_rK{v ܳ.FnHͽR@TB__r! p"Z*v"R&z r3\+ *<'H=3~tX"ғ󬔆zJ%pfijiZiVi]RJKz4d߂r+Ku7r9i%1KUZEJT 9=|K A՟%9Bŝ /aZ` ha,HHt6&CK+1i0](Bovrq;TeŨ1f!#Tݩ'l%Xdtx1 .'$3K,hMyjY@-]'#DQo:[Gu/P]%ΰTvIaݎv99PK%MPK2Jama/util/Maths.classePJ@=N.B0U0, c`Ӧ֟(nܺW~% 83w>?iBm}7l(ڗ *aNF~^H?ֿI2bym%UM>Pv3օ=}DۺݡɱjF&؆}tUNj+_ PKѢ5PK}2 META-INF/PK}2GG=META-INF/MANIFEST.MFPK2/_ Jama/CholeskyDecomposition.classPK2*("sJama/EigenvalueDecomposition.classPK2 { Jama/LUDecomposition.classPK2c,#Jama/Matrix.classPK26|  8Jama/QRDecomposition.classPK2o =%&?Jama/SingularValueDecomposition.classPK2V &rLJama/examples/MagicSquareExample.classPK2%MUJama/test/TestMatrix.classPK2Ѣ5]{Jama/util/Maths.classPK |tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/LinearEquations.java000066400000000000000000000251401207233610700267540ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author:Miklos Maroti */ import java.util.*; import Jama.*; /** * This class solves systems of linear equations. * @author mmaroti */ public class LinearEquations { /** * Holds a map from variable names to variable indices */ protected TreeMap variables = new TreeMap(); /** * Get the index of a variable with this method. */ protected int getVariable(String name) { if( variables.containsKey(name) ) return ((Integer)variables.get(name)).intValue(); int n = variables.size(); variables.put(name, new Integer(n)); return n; } protected String getVariableName(int id){ Set set=variables.keySet(); for(String key:set){ if(getVariable(key)==id) return key; } return "no variable"; } /** * Returns the set of variable names in the system. */ public Set getVariables() { return variables.keySet(); } /** * Represents one equation of the system. * Create the equation, set the coefficient of * specific elements and then set the constant. */ public class Equation { protected Equation() { coefficients = new double[LinearEquations.this.variables.size() + 10]; } protected int getVariableIndex(String name) { int n = LinearEquations.this.getVariable(name); if( coefficients.length <= n ) { double[] c = new double[n + 10]; System.arraycopy(coefficients, 0, c, 0, coefficients.length); coefficients = c; } return n; } public double getCoefficient(String name) { int n = getVariableIndex(name); return coefficients[n]; } public void setCoefficient(String name, double value) { int n = getVariableIndex(name); coefficients[n] = value; } public void addCoefficient(String name, double value) { int n = getVariableIndex(name); coefficients[n] += value; } public void subCoefficient(String name, double value) { int n = getVariableIndex(name); coefficients[n] -= value; } public double getConstant() { return constant; } public void setConstant(double value) { constant = value; } public void addConstant(double value) { constant += value; } public void subConstant(double value) { constant -= value; } /** * Multiplies each coefficient and the constant with this value. * The new equation will hold if and only if the originial does, * but with the multiplied version can count with different strength * in a least square solutions. */ public void multiply(double value) { for(int i = 0; i < coefficients.length; ++i) coefficients[i] *= value; constant *= value; } /** * Returns the difference of the constant and the left hand side * containing the variables. */ public double getSignedError(Solution solution) { double values[] = solution.values; double e = constant; int i = coefficients.length; if( values.length < i ) i = values.length; while( --i >= 0 ) e -= coefficients[i] * values[i]; return e; } public double getAbsoluteError(Solution solution) { return Math.abs(getSignedError(solution)); } /** * Returns the value of the left hand side. This * value does not depend on the constant. */ public double getLeftHandSide(Solution solution) { return constant - getSignedError(solution); } protected double[] coefficients; protected double constant; } /** * Returns a new empty equation */ public Equation createEquation() { return new Equation(); } /** * Holds the list of equations. */ protected List equations = new ArrayList(); /** * Returns the list of equations in the system. */ public List getEquations() { return equations; } public void printEquations(){ for(int i=0;iNaN if the variable does not occur in * the solution. */ public double getValue(String name) { if( variables.containsKey(name) ) return values[((Integer)variables.get(name)).intValue()]; return Double.NaN; } protected Solution(Matrix X) { this.values = new double[variables.size()]; if( X.getColumnDimension() != 1 || X.getRowDimension() != values.length ) throw new IllegalArgumentException(); for(int i = 0; i < values.length; ++i) values[i] = X.get(i,0); } /** * Prints out the solution and some statistics on the errors. */ public void print() { Iterator iter = variables.keySet().iterator(); while( iter.hasNext() ) { String name = (String)iter.next(); int index = ((Integer)variables.get(name)).intValue(); System.out.println(name + " = " + values[index]); } System.out.println("Average Error " + getAverageError()); System.out.println("Maximum Error " + getMaximumError()); } /** * Returns the average error in the system of equations. */ public double getAverageError() { double d = 0.0; Iterator iter = equations.iterator(); while( iter.hasNext() ) { Equation equation = (Equation)iter.next(); d += equation.getAbsoluteError(this); } return d / equations.size(); } /** * Returns the maximum error in the system of equations. */ public double getMaximumError() { double d = 0.0; Iterator iter = equations.iterator(); while( iter.hasNext() ) { Equation equation = (Equation)iter.next(); double e = equation.getAbsoluteError(this); if( e > d ) d = e; } return d; } public Equation getMaximumErrorEquation() { double d = -1.0; Equation a = null; Iterator iter = equations.iterator(); while( iter.hasNext() ) { Equation equation = (Equation)iter.next(); double e = equation.getAbsoluteError(this); if( e > d ) { d = e; a = equation; } } return a; } } /** * Returns the solution where the least squares of errors * of the equations is the smallest. */ public Solution solveLeastSquares() { Matrix A = new Matrix(equations.size(), variables.size()); Matrix B = new Matrix(equations.size(), 1); for(int i = 0; i < equations.size(); ++i) { Equation equation = (Equation)equations.get(i); int j = equation.coefficients.length; if( j > variables.size() ) j = variables.size(); while( --j >= 0 ) A.set(i, j, equation.coefficients[j]); B.set(i, 0, equation.constant); } Matrix X = A.solve(B); return new Solution(X); } /** * Returns a solution of a system of equations where the equations * are (almost) linearly dependent. Normalize singular values * that are larger than alpha. */ public Solution solveWithSVD(double alpha) { int M = equations.size(); int N = variables.size(); Matrix A = new Matrix(M,N); Matrix B = new Matrix(M,1); for(int i = 0; i < M; ++i) { Equation equation = (Equation)equations.get(i); int j = equation.coefficients.length; if( j > N ) j = N; while( --j >= 0 ) A.set(i, j, equation.coefficients[j]); B.set(i, 0, equation.constant); } SingularValueDecomposition svd = A.svd(); Matrix V = svd.getV(); double[] singularValues = svd.getSingularValues(); alpha *= singularValues[0]; Matrix X = new Matrix(N,N); for(int j = 0; j < N && singularValues[j] > alpha; ++j) { double a = 1.0 / singularValues[j]; for(int i = 0; i < N; ++i) X.set(i,j, V.get(i,j) * a); } X = X.times(svd.getU().transpose().times(B)); return new Solution(X); } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/Makefile000066400000000000000000000012201207233610700244370ustar00rootroot00000000000000COMPONENT=TestTimeStampingC CFLAGS += -DTOSH_DATA_LENGTH=39 BUILD_EXTRA_DEPS = Analize.class TestMsg.class LinearEquations.class CLEAN_EXTRA = TestMsg.class TestMsg.java \ Analize.class Analize\$$Entry.class \ LinearEquations.class LinearEquations\$$Solution.class LinearEquations\$$Equation.class %.class : %.java TestMsg.java if cygpath -w / >/dev/null 2>/dev/null; \ then CLASSPATH="$$CLASSPATH;Jama-1.0.2.jar" javac $<; \ else CLASSPATH="$$CLASSPATH:Jama-1.0.2.jar" javac $<; fi TestMsg.java: TestTimeStamping.h Makefile mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=TestMsg TestTimeStamping.h test_msg_t -o $@ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/README000066400000000000000000000045521207233610700236720ustar00rootroot00000000000000TestTimeStamping: Author/Contact: mmaroti@gmail.com (Miklos Maroti) The TestTimeStamping component verifies the time stamping precision of the radio stack. You need to program 3 motes with node ids: 0, 1 and 2. Start them. The yellow (LED1) is toggled if the mote is sending a message, the green (LED2) is toggled if the mote is receiving a message, and the red (LED0) is toggled if there is some error. Connect a BaseStation (with TOSH_DATA_LENGTH at least 39) to your PC, then type ./run.sh -comm serial@com12:57600 where you can specify your connection string (try the -help option for help). This program will connect 100 synchronization data points, i.e. timestamps from a sender node and the other two receiver nodes that correspond to the same message. The output will be something like this: Collecting 100 synchronization points from 3 motes... sender 0 : 27623602 27792046 27871327 sender 0 : 27656411 27824855 27904136 sender 1 : 27618867 27787310 27866591 sender 1 : 27651827 27820270 27899551 sender 2 : 27605316 27773758 27853039 sender 2 : 27638008 27806450 27885731 sender 2 : 27670656 27839098 27918379 sender 1 : 27684407 27852849 27932130 sender 0 : 27689126 27857570 27936851 ... sender 2 : 28686477 28854919 28934197 Analizing data... offset 0 = 0.0 skew 0 = 1.0 offset 1 = -168468.7899618484 skew 1 = 1.000000925316579 offset 2 = -247828.76012311116 skew 2 = 1.0000037553451404 transmit delay = 0.5840716886662126 maximum error = 1.2824957221746445 average error = 0.4213230623113422 The offset of mote 0 is always 0.0, and its skew is 1.0. The offset and skew of the other motes are relative to mote 0. The transmit delay is the amount of time that elapses between the sender timestamp and the receiver timestamp (this should be very close to 0). The maximum and minimum errors are calculated using a system of equations of the form: sender_offset + sender_timestamp * sender_skew + transmit_delay = receiver_offest + receiver_timestamp * receiver_skew The component uses these equations (2 for each time sync point) to get the offsets, skews and transmit delay using the least square method. This program uses ONLY the PacketTimeStamping interface. You can change the type of test_precision_t from TMilli in TestTimeStamping.h if you want to test the precision of another PacketTimeStamping interface. tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/TestTimeStamping.h000066400000000000000000000036361207233610700264260ustar00rootroot00000000000000/** Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __TESTTIMESTAMPING_H__ #define __TESTTIMESTAMPING_H__ #include "Timer.h" typedef TMilli test_precision_t; enum { HISTORY_SIZE = 3, NUMBER_OF_MOTES = 3, AM_TEST_MSG_T = 0x17, }; typedef nx_struct history_t { nx_uint8_t seqno; nx_uint32_t times[HISTORY_SIZE]; } history_t; typedef nx_struct test_msg_t { history_t history[NUMBER_OF_MOTES]; } test_msg_t; #endif tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/TestTimeStampingC.nc000066400000000000000000000042241207233610700266740ustar00rootroot00000000000000/** Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TestTimeStamping.h" configuration TestTimeStampingC { } implementation { components TestTimeStampingP, MainC, LedsC, new TimerMilliC(), ActiveMessageC, new AMSenderC(AM_TEST_MSG_T), new AMReceiverC(AM_TEST_MSG_T); TestTimeStampingP.Boot -> MainC; TestTimeStampingP.Leds -> LedsC; TestTimeStampingP.Timer -> TimerMilliC; TestTimeStampingP.RadioControl -> ActiveMessageC; TestTimeStampingP.AMSend -> AMSenderC; TestTimeStampingP.Receive -> AMReceiverC; TestTimeStampingP.Packet -> ActiveMessageC; TestTimeStampingP.AMPacket -> ActiveMessageC; TestTimeStampingP.PacketTimeStamp -> ActiveMessageC; } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/TestTimeStampingP.nc000066400000000000000000000075741207233610700267240ustar00rootroot00000000000000/** Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Timer.h" #include "TestTimeStamping.h" module TestTimeStampingP { uses { interface Boot; interface Leds; interface Timer; interface SplitControl as RadioControl; interface AMSend; interface Receive; interface Packet; interface AMPacket; interface PacketTimeStamp; } } implementation { message_t test_packet; event void Boot.booted() { call Packet.clear(&test_packet); call RadioControl.start(); call Timer.startPeriodic(512); } event void RadioControl.startDone(error_t error) { } event void RadioControl.stopDone(error_t error) { } event void Timer.fired() { uint8_t i; test_msg_t *test_msg = call Packet.getPayload(&test_packet, sizeof(test_msg_t)); history_t *history = &(test_msg->history[TOS_NODE_ID]); history->seqno += 1; if( call AMSend.send(AM_BROADCAST_ADDR, &test_packet, sizeof(test_msg_t)) != SUCCESS ) call Leds.led0On(); for(i = HISTORY_SIZE-1; i > 0; --i) history->times[i] = history->times[i-1]; history->times[0] = 0; } event void AMSend.sendDone(message_t *msg, error_t error) { if( error == SUCCESS && msg == &test_packet && TOS_NODE_ID < NUMBER_OF_MOTES ) { test_msg_t *test_msg = call Packet.getPayload(&test_packet, sizeof(test_msg_t)); history_t *history = &(test_msg->history[TOS_NODE_ID]); history->times[0] = call PacketTimeStamp.isValid(&test_packet) ? call PacketTimeStamp.timestamp(&test_packet) : 0; call Leds.led2Toggle(); } else call Leds.led0On(); } event message_t* Receive.receive(message_t *msg, void *data, uint8_t length) { uint8_t sender = call AMPacket.source(msg); if( sender < NUMBER_OF_MOTES && sender != TOS_NODE_ID && length == sizeof(test_msg_t) ) { test_msg_t *my_test_msg = call Packet.getPayload(&test_packet, sizeof(test_msg_t)); history_t *my_history = &(my_test_msg->history[sender]); test_msg_t *his_test_msg = data; history_t *his_history = &(his_test_msg->history[sender]); while( my_history->seqno != his_history->seqno ) { uint8_t i; my_history->seqno += 1; for(i = HISTORY_SIZE-1; i > 0; --i) my_history->times[i] = my_history->times[i-1]; my_history->times[0] = 0; } my_history->times[0] = call PacketTimeStamp.isValid(msg) ? call PacketTimeStamp.timestamp(msg) : 0; call Leds.led1Toggle(); } return msg; } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTimeStamping/run.sh000077500000000000000000000002371207233610700241510ustar00rootroot00000000000000#!/bin/sh if cygpath -w / >/dev/null 2>/dev/null; then CLASSPATH="$CLASSPATH;Jama-1.0.2.jar" else CLASSPATH="$CLASSPATH:Jama-1.0.2.jar" fi java Analize $@ tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTransmit/000077500000000000000000000000001207233610700222045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTransmit/Makefile000066400000000000000000000003561207233610700236500ustar00rootroot00000000000000COMPONENT=TestRadioDriverC # send every 2 milliseconds CFLAGS += -DSEND_INTERVAL=2000 CFLAGS += -I$(TOSDIR)/lib/diagmsg CFLAGS += -DDIAGMSG_RECORDED_MSGS=60 CFLAGS += -DRADIO_DEBUG CFLAGS += -DRADIO_DEBUG_PARTNUM include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTransmit/README000066400000000000000000000020361207233610700230650ustar00rootroot00000000000000TestTransmit: This application sends a very short message (2 bytes) every 2 millisec without checking for other traffic. We want to test if the radio driver locks up because we want to transmit while receiving another message. You can change the sending interval in the makefile. It blinks the 0th LED (red) when 256 times RadioSend.send() returns with an error. It blinks the 1st LED (green) when 256 times the RadioSend.send() returns with success. It blinks the 2nd LED (yellow) when 256 times RadioReceiver.receive is called. Program two or more motes with this application, then start them. You should see the 2nd LED (yellow) blink continuously, and the 1st and 0th LED (green and red) blink too. If both the 0th and 1st LED stops blinking the the radio driver locked up. You can also reset one of the motes to verify that the other keeps receiving messages. You can also connect one of your motes to your PC and run there the java.net.tinyos.util.DiagMsg application. This should print out ASSERTS of the radio driver. tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTransmit/RadioDriverConfigP.nc000066400000000000000000000054151207233610700262130ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Tasklet.h" #include "RadioAssert.h" #include "message.h" #include "RadioConfig.h" module RadioDriverConfigP { provides { #if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) || defined(PLATFORM_MESHBEAN) interface RF230DriverConfig as RadioDriverConfig; #elif defined(PLATFORM_MESHBEAN900) interface RF212DriverConfig as RadioDriverConfig; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSA) || defined(PLATFORM_TELOSB) interface CC2420XDriverConfig as RadioDriverConfig; #elif defined(PLATFORM_UCMINI) interface RFA1DriverConfig as RadioDriverConfig; #elif defined(PLATFORM_UCDUAL) interface Si443xDriverConfig as RadioDriverConfig; #endif } } implementation { async command uint8_t RadioDriverConfig.headerLength(message_t* msg) { return 0; } async command uint8_t RadioDriverConfig.maxPayloadLength() { return sizeof(message_header_t) + TOSH_DATA_LENGTH; } async command uint8_t RadioDriverConfig.metadataLength(message_t* msg) { return 0; } #if ! defined(PLATFORM_UCMINI) async command uint8_t RadioDriverConfig.headerPreloadLength() { return 7; } #endif async command bool RadioDriverConfig.requiresRssiCca(message_t* msg) { return FALSE; } } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTransmit/TestRadioDriverC.nc000066400000000000000000000077771207233610700257250ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration TestRadioDriverC { } implementation { #define UQ_METADATA_FLAGS "UQ_METADATA_FLAGS" #define UQ_RADIO_ALARM "UQ_RADIO_ALARM" components TestRadioDriverP, MainC, SerialActiveMessageC, AssertC, LedsC; TestRadioDriverP.Boot -> MainC; TestRadioDriverP.SplitControl -> SerialActiveMessageC; TestRadioDriverP.RadioState -> RadioDriverLayerC; TestRadioDriverP.RadioSend -> RadioDriverLayerC; TestRadioDriverP.RadioReceive -> RadioDriverLayerC; TestRadioDriverP.RadioPacket -> TimeStampingLayerC; TestRadioDriverP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; TestRadioDriverP.Leds -> LedsC; // just to avoid a timer compilation bug components new TimerMilliC(); // -------- TimeStamping components new TimeStampingLayerC(); TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC; TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC; TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; // -------- MetadataFlags components new MetadataFlagsLayerC(); MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC; // -------- RadioAlarm components new RadioAlarmC(); RadioAlarmC.Alarm -> RadioDriverLayerC; // -------- RadioDriver #if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) || defined(PLATFORM_MESHBEAN) components RF230DriverLayerC as RadioDriverLayerC; components RF230RadioP as RadioP; #elif defined(PLATFORM_MESHBEAN900) components RF212DriverLayerC as RadioDriverLayerC; components RF212RadioP as RadioP; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSA) || defined(PLATFORM_TELOSB) components CC2420XDriverLayerC as RadioDriverLayerC; components CC2420XRadioP as RadioP; #elif defined(PLATFORM_UCMINI) components RFA1DriverLayerC as RadioDriverLayerC; components RFA1RadioP as RadioP; #elif defined(PLATFORM_UCDUAL) components Si443xDriverLayerC as RadioDriverLayerC; components Si443xRadioP as RadioP; #endif components RadioDriverConfigP; RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC; RadioDriverLayerC.Config -> RadioDriverConfigP; RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; #if !defined(PLATFORM_UCMINI) RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; #endif } tinyos-2.1.2+dfsg/apps/tests/rfxlink/TestTransmit/TestRadioDriverP.nc000066400000000000000000000072661207233610700257330ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Tasklet.h" #include "RadioAssert.h" #include "message.h" #include "RadioConfig.h" module TestRadioDriverP { uses { interface Boot; interface SplitControl; interface Leds; interface RadioState; interface RadioPacket; interface RadioAlarm; interface RadioSend; interface RadioReceive; } } implementation { tasklet_norace uint8_t failureCount; tasklet_norace uint8_t successCount; tasklet_norace uint8_t receiveCount; tasklet_norace uint8_t timerCount; message_t msgbuffer; event void Boot.booted() { error_t error; error = call SplitControl.start(); RADIO_ASSERT( error == SUCCESS ); } event void SplitControl.startDone(error_t error) { RADIO_ASSERT( error == SUCCESS ); error = call RadioState.turnOn(); RADIO_ASSERT( error == SUCCESS ); } event void SplitControl.stopDone(error_t error) { } tasklet_async event void RadioState.done() { call RadioPacket.clear(&msgbuffer); call RadioPacket.setPayloadLength(&msgbuffer, 2); RADIO_ASSERT( call RadioAlarm.isFree() ); call RadioAlarm.wait(1); } tasklet_norace tradio_size next; tasklet_async event void RadioAlarm.fired() { uint8_t *payload; error_t error; int32_t delay; next += SEND_INTERVAL * RADIO_ALARM_MICROSEC; atomic { delay = next - call RadioAlarm.getNow(); if( delay <= 0 ) delay = 1; call RadioAlarm.wait(delay); } RADIO_ASSERT( delay > 1 ); payload = ((void*)&msgbuffer) + call RadioPacket.headerLength(&msgbuffer); payload[0] = TOS_NODE_ID; payload[1] = ++timerCount; error = call RadioSend.send(&msgbuffer); if( error != SUCCESS ) { if( ++failureCount == 0 ) call Leds.led0Toggle(); } else { if( ++successCount == 0 ) call Leds.led1Toggle(); } } tasklet_async event void RadioSend.sendDone(error_t error) { RADIO_ASSERT( error == SUCCESS ); } tasklet_async event void RadioSend.ready() { } tasklet_async event bool RadioReceive.header(message_t* msg) { return TRUE; } tasklet_async event message_t* RadioReceive.receive(message_t* msg) { if( ++receiveCount == 0 ) call Leds.led2Toggle(); return msg; } } tinyos-2.1.2+dfsg/apps/tests/sam3/000077500000000000000000000000001207233610700167315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/README000066400000000000000000000001621207233610700176100ustar00rootroot00000000000000This directory contains SAM3 specific test applications. For more details, see in the particular sub directories. tinyos-2.1.2+dfsg/apps/tests/sam3/TestADE7753/000077500000000000000000000000001207233610700205105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/TestADE7753/Makefile000066400000000000000000000006561207233610700221570ustar00rootroot00000000000000COMPONENT=TestADE7753AppC BUILD_EXTRA_DEPS = TestADE7753Msg.py CLEAN_EXTRA = TestADE7753Msg.py *.pyc TestADE7753Msg.py: TestADE7753.h mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=TestADE7753Msg TestADE7753.h testade7753_msg -o $@ CFLAGS += -I$(TOSDIR)/chips/ade7753 CFLAGS += -DTOSH_DATA_LENGTH=100 #CFLAGS += -I$(TOSDIR)/lib/diagmsg #CFLAGS += -DDIAGMSG_RADIO #CFLAGS += -DDEBUG_ADE7753 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/TestADE7753/README000066400000000000000000000020411207233610700213650ustar00rootroot00000000000000This is a test application that shows how to use the ADE7753 power metering chip. We assume that you use a Sam3s-ek evaluation development kit. You have to make the following modifications to the kit: - remove resistors: R26, R27, R28, R31, R33, R34, R35, R36, R37 (all on the top side near the serial DB9 USART connector) - remove capacitor C46 (on the bottom side, opposit of the Sam3s Chip footprint). - solder a wire to pin 74 of the Sam3s chip. Note that numbered through holes are provided for this! Connect the ADE775 chip as follows: - DVDD (5V) -> J12.1 - \RESET -> J12.2 - DIN -> PA13 - DOUT -> PA12 - SCLK -> PA14 - \CS -> PA22 - \IRQ -> PA21 - ZX -> PA0 (This is the wire you soldered to pin 74!) - GND -> Any GND pin, e.g. J12.37 Setup: Program one sam3s-ek board with the TestADE7753 application. Program a second node with a BaseStation. Run the logger script like this: python TestADE7753Logger.py sf@localhost:9002 We assume you are running a serial forwarder for the BaseStation mote. tinyos-2.1.2+dfsg/apps/tests/sam3/TestADE7753/SpiConfigC.nc000066400000000000000000000056401207233610700230230ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SPI Configuration for the Sam3s * * @author Thomas Schmid */ module SpiConfigC { provides { interface Init; interface ResourceConfigure; } uses { interface HplSam3SpiChipSelConfig; interface HplSam3SpiConfig; } } implementation { command error_t Init.init() { // configure clock call HplSam3SpiChipSelConfig.setBaud(20); call HplSam3SpiChipSelConfig.setClockPolarity(0); // logic zero is inactive call HplSam3SpiChipSelConfig.setClockPhase(1); // out on rising, in on falling call HplSam3SpiChipSelConfig.disableAutoCS(); // disable automatic rising of CS after each transfer //call HplSam3SpiChipSelConfig.enableAutoCS(); // if the CS line is not risen automatically after the last tx. The lastxfer bit has to be used. call HplSam3SpiChipSelConfig.enableCSActive(); //call HplSam3SpiChipSelConfig.disableCSActive(); call HplSam3SpiChipSelConfig.setBitsPerTransfer(SPI_CSR_BITS_8); call HplSam3SpiChipSelConfig.setTxDelay(0); call HplSam3SpiChipSelConfig.setClkDelay(0); return SUCCESS; } async command void ResourceConfigure.configure() { // Do stuff here } async command void ResourceConfigure.unconfigure() { // Do stuff here... } } tinyos-2.1.2+dfsg/apps/tests/sam3/TestADE7753/TestADE7753.h000066400000000000000000000034771207233610700224530ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #ifndef TESTADE7753_H #define TESTADE7753_H #define BUF_SIZE 10 typedef nx_struct testade7753_msg { nx_uint16_t counter; nx_uint32_t energy[BUF_SIZE]; } testade7753_msg_t; enum { AM_TESTADE7753_MSG = 7, }; #endif tinyos-2.1.2+dfsg/apps/tests/sam3/TestADE7753/TestADE7753AppC.nc000066400000000000000000000053601207233610700233610ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Test application for the ADE7753 chip. It implements a simple power meter * that retrieves the real energy from the ADE7753 chip once a second. * * @author Thomas Schmid * @date March 2011 */ #include "TestADE7753.h" configuration TestADE7753AppC {} implementation { components MainC, TestADE7753C as App, LedsC; components new AMSenderC(AM_TESTADE7753_MSG); components new AMReceiverC(AM_TESTADE7753_MSG); components new TimerMilliC(); components ActiveMessageC; App.Boot -> MainC.Boot; App.Receive -> AMReceiverC; App.AMSend -> AMSenderC; App.AMControl -> ActiveMessageC; App.Leds -> LedsC; App.MilliTimer -> TimerMilliC; App.Packet -> AMSenderC; components new Sam3Spi3C() as SpiC; components ACMeterC as Meter; Meter.SpiPacket -> SpiC; Meter.SpiResource -> SpiC; components SpiConfigC; SpiConfigC.Init <- SpiC; SpiConfigC.ResourceConfigure <- SpiC; SpiConfigC.HplSam3SpiChipSelConfig -> SpiC; components HplSam3sGeneralIOC as IO; Meter.CSN -> IO.PioA22; Meter.RelayIO -> IO.PioA23; App.MeterControl -> Meter; App.ReadEnergy -> Meter; App.RelayConfig -> Meter; App.GainConfig -> Meter; App.GetPeriod32 -> Meter; } tinyos-2.1.2+dfsg/apps/tests/sam3/TestADE7753/TestADE7753C.nc000066400000000000000000000111401207233610700227110ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid * @date March 2011 */ #include "Timer.h" #include "TestADE7753.h" #include "ACMeter.h" module TestADE7753C @safe() { uses { interface Leds; interface Boot; interface Receive; interface AMSend; interface Timer as MilliTimer; interface SplitControl as AMControl; interface Packet; interface SplitControl as MeterControl; interface ReadStream as ReadEnergy; interface GetSet as RelayConfig; interface GetSet as GainConfig; interface Get as GetPeriod32; } } implementation { message_t packet; bool locked; uint16_t counter = 0; uint32_t energyBuffer1[BUF_SIZE]; uint32_t energyBuffer2[BUF_SIZE]; uint32_t *currBuffer; event void Boot.booted() { call AMControl.start(); } event void AMControl.startDone(error_t err) { call MeterControl.start(); } void readEnergy() { // setup the buffers call ReadEnergy.postBuffer(energyBuffer1, BUF_SIZE); call ReadEnergy.postBuffer(energyBuffer2, BUF_SIZE); // setup the current buffer currBuffer = energyBuffer1; // start reading energy in 1s intervals call ReadEnergy.read(1000000); } event void MeterControl.startDone(error_t err) { readEnergy(); } event void AMControl.stopDone(error_t err) { // do nothing } event void MeterControl.stopDone(error_t err) { // do nothing } event void MilliTimer.fired() { } task void sendData() { uint8_t i; counter++; if (locked) { return; } else { testade7753_msg_t* rcm = (testade7753_msg_t*)call Packet.getPayload(&packet, sizeof(testade7753_msg_t)); if (rcm == NULL) { return; } // we can't do a memcopy because it's a newtork type! for(i=0; ienergy[i] = (int32_t)currBuffer[i]; // post the buffer again call ReadEnergy.postBuffer(currBuffer, BUF_SIZE); rcm->counter = counter; if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(testade7753_msg_t)) == SUCCESS) { dbg("TestADE7753C", "TestADE7753C: packet sent.\n", counter); locked = TRUE; } } } event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) { dbg("TestADE7753C", "TestADE7753 packet of length %hhu.\n", len); if (len != sizeof(testade7753_msg_t)) {return bufPtr;} else { //testade7753_msg_t* rcm = (testade7753_msg_t*)payload; return bufPtr; } } event void AMSend.sendDone(message_t* bufPtr, error_t error) { if (&packet == bufPtr) { locked = FALSE; } } event void ReadEnergy.bufferDone(error_t result, uint32_t* buf, uint16_t count) { // do something with the buffer here call Leds.led0Toggle(); currBuffer = buf; post sendData(); } event void ReadEnergy.readDone(error_t result, uint32_t usActualPeriod) { // we should never get here... it would be really bad as we loose samples! // Just in case, start energy reading again. readEnergy(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/TestADE7753/TestADE7753Logger.py000066400000000000000000000017411207233610700240040ustar00rootroot00000000000000import sys import os import time import struct #tos stuff import TestADE7753Msg from tinyos.message import * from tinyos.message.Message import * from tinyos.message.SerialPacket import * from tinyos.packet.Serial import Serial class DataLogger: def __init__(self, motestring): self.mif = MoteIF.MoteIF() self.tos_source = self.mif.addSource(motestring) self.mif.addListener(self, TestADE7753Msg.TestADE7753Msg) def receive(self, src, msg): if msg.get_amType() == TestADE7753Msg.AM_TYPE: m = TestADE7753Msg.TestADE7753Msg(msg.dataGet()) print time.time(), m def main_loop(self): while 1: time.sleep(1) def main(): if '-h' in sys.argv: print "Usage:", sys.argv[0], "sf@localhost:9002" sys.exit() dl = DataLogger(sys.argv[1]) dl.main_loop() # don't expect this to return... if __name__ == "__main__": try: main() except KeyboardInterrupt: pass tinyos-2.1.2+dfsg/apps/tests/sam3/TestMpu/000077500000000000000000000000001207233610700203325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/TestMpu/Makefile000066400000000000000000000000531207233610700217700ustar00rootroot00000000000000COMPONENT=TestMpuAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/TestMpu/TestMpuAppC.nc000066400000000000000000000035641207233610700230310ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application to test the MPU and the corresponding exception. * * @author Wanja Hofer **/ configuration TestMpuAppC { } implementation { components MainC, TestMpuC, LedsC, HplSam3uMpuC; TestMpuC -> MainC.Boot; TestMpuC.Leds -> LedsC; TestMpuC.HplSam3uMpu -> HplSam3uMpuC; } tinyos-2.1.2+dfsg/apps/tests/sam3/TestMpu/TestMpuC.nc000066400000000000000000000112121207233610700223550ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application to test the MPU and the corresponding exception. * * @author Wanja Hofer **/ // choose exactly one of the following #define TEST_WRITE_PROTECTION //#define TEST_EXECUTE_PROTECTION // choose exactly one of the following #define PROTECTED //#define UNPROTECTED /* Running either one of the write/execute tests *with* protection should first light up LED 0 (green), * then LED 2 (red) to indicate an MPU fault. LED 1 (green) should not light up, * since that would indicate a successful write/execution despite MPU protection. * Running either one of the write/execute tests *without* protection should first light up LED 0 (green), * then LED 1 (green) to indicate a successful write/execution. LED 2 (red) should not light up, * since that would indicate an MPU fault. */ /* Caveat: currently, the linker ignores the alignment for the function and spits out * warning: `aligned' attribute directive ignored * When setting up the region, the function address is aligned, and the first instruction of the function * will be protected, triggering the trap if protected. */ typedef struct { uint32_t word1; uint32_t word2; uint32_t word3; uint32_t word4; uint32_t word5; uint32_t word6; uint32_t word7; uint32_t word8; } struct32bytes; volatile struct32bytes __attribute__((aligned(32))) structure; // 32 bytes aligned void __attribute__((noinline)) __attribute__((aligned(32))) protected(); void protected() { volatile int i = 0; for (; i < 50; i++); } module TestMpuC { uses interface Leds; uses interface Boot; uses interface HplSam3uMpu; } implementation { void fatal(); event void Boot.booted() { // setup MPU call HplSam3uMpu.enableDefaultBackgroundRegion(); call HplSam3uMpu.disableMpuDuringHardFaults(); // first iteration should be successful, MPU not yet active #ifdef TEST_WRITE_PROTECTION structure.word1 = 13; #endif #ifdef TEST_EXECUTE_PROTECTION protected(); #endif call Leds.led0On(); // LED 0: successful write/execute (should always happen) #ifdef TEST_WRITE_PROTECTION #ifdef PROTECTED // activate MPU and write-protect structure if ((call HplSam3uMpu.setupRegion(0, TRUE, (void *) &structure, 32, FALSE, TRUE, FALSE, TRUE, FALSE, TRUE, TRUE, 0)) == FAIL) { fatal(); } #endif #endif #ifdef TEST_EXECUTE_PROTECTION #ifdef PROTECTED // activate MPU and execute-protect protected() if ((call HplSam3uMpu.setupRegion(0, TRUE, (void *) (((uint32_t) &protected) & (~ (32 - 1))), 32, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE, TRUE, 0)) == FAIL) { // aligned fatal(); } #endif #endif #ifdef PROTECTED call HplSam3uMpu.enableMpu(); #endif #ifdef TEST_WRITE_PROTECTION structure.word1 = 42; #endif #ifdef TEST_EXECUTE_PROTECTION protected(); #endif call Leds.led1On(); // LED 1: successful protected write/execute (should not happen if protected) while(1); } void fatal() { while(1) { volatile int i; for (i = 0; i < 100000; i++); call Leds.led2Toggle(); // Led 2 (red) blinking: fatal } } async event void HplSam3uMpu.mpuFault() { call Leds.led2On(); // LED 2 (red): MPU fault while(1); } } tinyos-2.1.2+dfsg/apps/tests/sam3/TestSvc/000077500000000000000000000000001207233610700203245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/TestSvc/Makefile000066400000000000000000000000531207233610700217620ustar00rootroot00000000000000COMPONENT=TestSvcAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/TestSvc/TestSvcAppC.nc000066400000000000000000000035311207233610700230070ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Minimal app to test the svc instruction on the SAM3U and the * dispatching of its arguments. * * @author Wanja Hofer */ configuration TestSvcAppC { } implementation { components MainC, TestSvcC, LedsC; TestSvcC -> MainC.Boot; TestSvcC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/sam3/TestSvc/TestSvcC.nc000066400000000000000000000060751207233610700223540ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Minimal app to test the svc instruction on the SAM3U and the * dispatching of its arguments. * * @author Wanja Hofer */ module TestSvcC { uses interface Leds; uses interface Boot; } implementation { error_t syscall(uint8_t id, uint32_t p0, uint32_t p1, uint32_t p2, uint32_t p3) { volatile uint32_t result; //__nesc_disable_interrupt(); // svc cannot be called with IRQs disabled asm volatile("mov r0, %0" : : "r" (p0)); asm volatile("mov r1, %0" : : "r" (p1)); asm volatile("mov r2, %0" : : "r" (p2)); asm volatile("mov r3, %0" : : "r" (p3)); asm volatile("svc %0" : : "i" (id)); // result is in r0 asm volatile("mov %0, r0" : "=r" (result)); return result; } event void Boot.booted() { volatile uint32_t result = syscall(0x42, 0x00, 0x11, 0x22, 0x33); result++; while(1); return; } void ActualSVCallHandler(uint32_t *args) @C() @spontaneous() { volatile uint32_t svc_id; volatile uint32_t svc_r0; volatile uint32_t svc_r1; volatile uint32_t svc_r2; volatile uint32_t svc_r3; svc_id = ((uint8_t *) args[6])[-2]; svc_r0 = ((uint32_t) args[0]); svc_r1 = ((uint32_t) args[1]); svc_r2 = ((uint32_t) args[2]); svc_r3 = ((uint32_t) args[3]); args[0] = 0x23; return; } void SVCallHandler() @C() @spontaneous() __attribute__((naked)) { asm volatile( "tst lr, #4\n" "ite eq\n" "mrseq r0, msp\n" "mrsne r0, psp\n" "b ActualSVCallHandler\n" ); // return from ActualSVCallHandler() returns to svc call site (through lr) } } tinyos-2.1.2+dfsg/apps/tests/sam3/TestUart/000077500000000000000000000000001207233610700205045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/TestUart/Makefile000066400000000000000000000000541207233610700221430ustar00rootroot00000000000000COMPONENT=TestUartAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/TestUart/TestUartAppC.nc000066400000000000000000000041521207233610700233470ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application that tests the SAM3U UART. * * @author Wanja Hofer **/ configuration TestUartAppC { } implementation { components MainC, TestUartC, LedsC; TestUartC -> MainC.Boot; TestUartC.Leds -> LedsC; components HplNVICC; #if defined(PLATFORM_SAM3U_EK) TestUartC.UartIrqControl -> HplNVICC.DBGUInterrupt; #else TestUartC.UartIrqControl -> HplNVICC.UART0Interrupt; #endif components HilSam3UartC; TestUartC.UartControl -> HilSam3UartC; TestUartC.UartByte -> HilSam3UartC; TestUartC.UartStream -> HilSam3UartC; } tinyos-2.1.2+dfsg/apps/tests/sam3/TestUart/TestUartC.nc000066400000000000000000000054301207233610700227060ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application that tests the SAM3U UART. * * @author Wanja Hofer **/ module TestUartC { uses interface Leds; uses interface Boot; uses interface HplNVICInterruptCntl as UartIrqControl; uses interface StdControl as UartControl; uses interface UartByte; uses interface UartStream; } implementation { uint8_t buffer[10]; task void sendTask(); task void receiveTask(); event void Boot.booted() { call UartIrqControl.configure(0xff); call UartIrqControl.enable(); call UartControl.start(); // __nesc_enable_interrupt(); post receiveTask(); } task void receiveTask() { call UartStream.receive(buffer, 10); } async event void UartStream.receiveDone(uint8_t* buf, uint16_t len, error_t error) { call Leds.led0Toggle(); // Led 0 (green) = received something post sendTask(); } task void sendTask() { // send out received buffer call UartStream.send(buffer, 10); } async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t error) { call Leds.led1Toggle(); // Led 1 (green) = sent something post receiveTask(); } async event void UartStream.receivedByte(uint8_t byte) { call Leds.led2Toggle(); // Led 2 (red) = received something w/o a buffer } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/000077500000000000000000000000001207233610700174605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReader/000077500000000000000000000000001207233610700212725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReader/AdcReaderC.nc000066400000000000000000000035771207233610700235450ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration AdcReaderC { provides interface Read; } implementation { components new AdcReadClientC(), AdcReaderP; Read = AdcReadClientC; AdcReadClientC.AdcConfigure -> AdcReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReader/AdcReaderP.nc000066400000000000000000000055751207233610700235620ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3sadchardware.h" module AdcReaderP { provides interface AdcConfigure; } implementation { const sam3s_adc_channel_config_t config = { channel : 5, trgen : 0, // 0: trigger disabled trgsel : 0, // 0: external trigger lowres : 0, // 0: 12-bit sleep : 0, // 0: normal, adc core and vref are kept on between conversions fwup : 0, // 0: normal, sleep mode is defined by sleep bit freerun : 0, // 0: normal mode, wait for trigger prescal : 2, // ADCClock = MCK / ((prescal + 1)*2) startup : 7, // 112 periods of ADCClock settling : 1, // 5 periods of ADCClock anach : 0, // 0: no analog changed on channel switching tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods useq : 0, // 0: normal, converts channel in sequence ibctl : 1, diff : 0, gain : 0, offset : 0, }; async command const sam3s_adc_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReader/Makefile000066400000000000000000000002341207233610700227310ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED #CFLAGS+=-I$(TOSDIR)/lib/printf CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReader/MoteAppC.nc000066400000000000000000000041561207233610700232720ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC Read with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, AdcReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; MoteP.Read -> AdcReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReader/MoteP.nc000066400000000000000000000064611207233610700226470ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC Read with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ #include #include module MoteP { uses { interface Boot; interface Leds; interface Read; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; } } implementation { event void Boot.booted() { while (call SerialSplitControl.start() != SUCCESS); call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone(){ } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); }else{ call Timer.startPeriodic(256); } } event void SerialSplitControl.stopDone(error_t error) {} task void sample() { const char *start = "Start Sampling"; call Leds.led0Toggle(); call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_RED); if(call Read.read() != SUCCESS) { const char *fail = "Read Failed"; call Draw.drawString(10,70, fail, COLOR_RED); } } event void Read.readDone(error_t result, uint16_t value) { const char *fail = "Read done error"; const char *good = "Read done success"; call Draw.fill(COLOR_GREEN); if (result != SUCCESS) { call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ call Draw.drawString(10,70,good,COLOR_BLACK); call Draw.drawInt(100,100,value,1,COLOR_BLACK); } } event void Timer.fired() { post sample(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderNow/000077500000000000000000000000001207233610700217565ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderNow/AdcReaderC.nc000066400000000000000000000037151207233610700242230ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration AdcReaderC { provides interface ReadNow; provides interface Resource; } implementation { components new AdcReadNowClientC(), AdcReaderP; ReadNow = AdcReadNowClientC; Resource = AdcReadNowClientC; AdcReadNowClientC.AdcConfigure -> AdcReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderNow/AdcReaderP.nc000066400000000000000000000055751207233610700242460ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3sadchardware.h" module AdcReaderP { provides interface AdcConfigure; } implementation { const sam3s_adc_channel_config_t config = { channel : 5, trgen : 0, // 0: trigger disabled trgsel : 0, // 0: external trigger lowres : 0, // 0: 12-bit sleep : 0, // 0: normal, adc core and vref are kept on between conversions fwup : 0, // 0: normal, sleep mode is defined by sleep bit freerun : 0, // 0: normal mode, wait for trigger prescal : 2, // ADCClock = MCK / ((prescal + 1)*2) startup : 7, // 112 periods of ADCClock settling : 1, // 5 periods of ADCClock anach : 0, // 0: no analog changed on channel switching tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods useq : 0, // 0: normal, converts channel in sequence ibctl : 1, diff : 0, gain : 0, offset : 0, }; async command const sam3s_adc_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderNow/Makefile000066400000000000000000000001741207233610700234200ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderNow/MoteAppC.nc000066400000000000000000000042251207233610700237530ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadNow with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, AdcReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> NoLedsC; MoteP.ReadNow -> AdcReaderC; MoteP.Resource -> AdcReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderNow/MoteP.nc000066400000000000000000000073021207233610700233260ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadNow with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ //#include "sam3uDmahardware.h" #include #include module MoteP { uses { interface Boot; interface Leds; interface ReadNow; interface Resource; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; } } implementation { norace error_t resultError; norace uint16_t resultValue; event void Boot.booted() { while (call SerialSplitControl.start() != SUCCESS); call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone(){ call Timer.startPeriodic(512); } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); } } event void SerialSplitControl.stopDone(error_t error) {} task void sample() { const char *start = "Start Sampling"; //call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_BLACK); call Resource.request(); } event void Resource.granted(){ /* FOR dma testing ONLY*//* DMAC->saddr0.bits.saddrx = (uint32_t) 0x20180000; call Draw.fill(COLOR_GREEN); call Draw.drawInt(100, 100, DMAC->saddr0.bits.saddrx, 1, COLOR_BLACK); */ call ReadNow.read(); } task void drawResult(){ const char *fail = "Read done error"; const char *good = "Read done success"; call Draw.fill(COLOR_GREEN); if (resultError != SUCCESS) { atomic call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ call Draw.drawString(10,70,good,COLOR_BLACK); call Draw.drawInt(100,100,resultValue,1,COLOR_BLACK); } } async event void ReadNow.readDone(error_t error, uint16_t value) { atomic resultError = error; atomic resultValue = value; post drawResult(); } event void Timer.fired() { post sample(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStream/000077500000000000000000000000001207233610700224465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStream/AdcReaderC.nc000066400000000000000000000036351207233610700247140ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration AdcReaderC { provides interface ReadStream; } implementation { components new AdcReadStreamClientC(), AdcReaderP; ReadStream = AdcReadStreamClientC; AdcReadStreamClientC.AdcConfigure -> AdcReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStream/AdcReaderP.nc000066400000000000000000000055751207233610700247360ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3sadchardware.h" module AdcReaderP { provides interface AdcConfigure; } implementation { const sam3s_adc_channel_config_t config = { channel : 5, trgen : 0, // 0: trigger disabled trgsel : 0, // 0: external trigger lowres : 0, // 0: 12-bit sleep : 0, // 0: normal, adc core and vref are kept on between conversions fwup : 0, // 0: normal, sleep mode is defined by sleep bit freerun : 0, // 0: normal mode, wait for trigger prescal : 2, // ADCClock = MCK / ((prescal + 1)*2) startup : 7, // 112 periods of ADCClock settling : 1, // 5 periods of ADCClock anach : 0, // 0: no analog changed on channel switching tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods useq : 0, // 0: normal, converts channel in sequence ibctl : 1, diff : 0, gain : 0, offset : 0, }; async command const sam3s_adc_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStream/Makefile000066400000000000000000000002331207233610700241040ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED #CFLAGS += -DSAM3U_ADC12B_PDC CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStream/MoteAppC.nc000066400000000000000000000041711207233610700244430ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, AdcReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; MoteP.ReadStream -> AdcReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStream/MoteP.nc000066400000000000000000000101651207233610700240170ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ #include #include #define SAMPLE_BUFFER_SIZE BOARD_LCD_WIDTH #define NUM_SAMPLES_PER_PACKET (TOSH_DATA_LENGTH / sizeof(uint16_t)) module MoteP { uses { interface Boot; interface Leds; interface ReadStream; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; } } implementation { uint16_t buf[SAMPLE_BUFFER_SIZE]; task void clear(){ /* Reset the target buffer for the ReadStream interface */ uint32_t i; for (i = 0; i < SAMPLE_BUFFER_SIZE; i++) { buf[i] = 0xFFFF; } } event void Boot.booted() { post clear(); while (call SerialSplitControl.start() != SUCCESS); call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone(){ } task void sample() { //const char *start = "Start Sampling"; //call Draw.fill(COLOR_BLUE); //call Draw.drawString(10,50,start,COLOR_RED); call ReadStream.postBuffer(buf, SAMPLE_BUFFER_SIZE); call ReadStream.read(10000); } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); }else{ //call Timer.startPeriodic(5*1024U); post sample(); } } event void SerialSplitControl.stopDone(error_t error) {} event void ReadStream.readDone(error_t result, uint32_t usActualPeriod) { if (result != SUCCESS) { }else{ } } event void ReadStream.bufferDone(error_t result, uint16_t* buffer, uint16_t count) { const char *fail = "Read done error"; const char *good = "Read done success"; call Leds.led1Toggle(); call Draw.fill(COLOR_GREEN); if (result != SUCCESS) { call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ uint16_t i; call Draw.drawString(10,70,good,COLOR_BLACK); call Draw.drawInt(100,100,buffer[0],1,COLOR_BLACK); call Draw.drawInt(200,100,count,1,COLOR_BLACK); for(i=0; i; } implementation { components new AdcReadStreamClientC(), AdcReaderP; ReadStream = AdcReadStreamClientC; AdcReadStreamClientC.AdcConfigure -> AdcReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStreamPDC/AdcReaderP.nc000066400000000000000000000055751207233610700252650ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3sadchardware.h" module AdcReaderP { provides interface AdcConfigure; } implementation { const sam3s_adc_channel_config_t config = { channel : 5, trgen : 0, // 0: trigger disabled trgsel : 0, // 0: external trigger lowres : 0, // 0: 12-bit sleep : 0, // 0: normal, adc core and vref are kept on between conversions fwup : 0, // 0: normal, sleep mode is defined by sleep bit freerun : 0, // 0: normal mode, wait for trigger prescal : 2, // ADCClock = MCK / ((prescal + 1)*2) startup : 7, // 112 periods of ADCClock settling : 1, // 5 periods of ADCClock anach : 0, // 0: no analog changed on channel switching tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods useq : 0, // 0: normal, converts channel in sequence ibctl : 1, diff : 0, gain : 0, offset : 0, }; async command const sam3s_adc_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStreamPDC/Makefile000066400000000000000000000002271207233610700244360ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED CFLAGS += -DSAM3S_ADC_PDC CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStreamPDC/MoteAppC.nc000066400000000000000000000041731207233610700247740ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, AdcReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> NoLedsC; MoteP.ReadStream -> AdcReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc/AdcReaderStreamPDC/MoteP.nc000066400000000000000000000101011207233610700243340ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ #include #include #define SAMPLE_BUFFER_SIZE BOARD_LCD_WIDTH #define NUM_SAMPLES_PER_PACKET (TOSH_DATA_LENGTH / sizeof(uint16_t)) module MoteP { uses { interface Boot; interface Leds; interface ReadStream; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; } } implementation { uint16_t buf[SAMPLE_BUFFER_SIZE]; task void clear(){ /* Reset the target buffer for the ReadStream interface */ uint32_t i; for (i = 0; i < SAMPLE_BUFFER_SIZE; i++) { buf[i] = 0xFFFF; } } event void Boot.booted() { post clear(); while (call SerialSplitControl.start() != SUCCESS); call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone(){ } task void sample() { const char *start = "Start Sampling"; call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_RED); call ReadStream.postBuffer(buf, SAMPLE_BUFFER_SIZE); call ReadStream.read(10000); } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); }else{ //call Timer.startPeriodic(5*1024U); post clear(); post sample(); } } event void SerialSplitControl.stopDone(error_t error) {} event void ReadStream.readDone(error_t result, uint32_t usActualPeriod) { if (result != SUCCESS) { }else{ } } event void ReadStream.bufferDone(error_t result, uint16_t* buffer, uint16_t count) { const char *fail = "Read done error"; const char *good = "Read done success"; call Leds.led1Toggle(); call Draw.fill(COLOR_GREEN); if (result != SUCCESS) { call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ uint16_t i; call Draw.drawString(10,70,good,COLOR_BLACK); call Draw.drawInt(100,100,buffer[0],1,COLOR_BLACK); call Draw.drawInt(200,100,count,1,COLOR_BLACK); for(i=0; i @author Thomas Schmid To use PDC with ADC, the sampling rate MUST be controlled by properly setting the startup, prescal and lowres registers. Setting the sam3s_adc_channel_config_t config can properly set these registers. tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/000077500000000000000000000000001207233610700177655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReader/000077500000000000000000000000001207233610700215775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReader/AdcReaderC.nc000066400000000000000000000035771207233610700240520ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration AdcReaderC { provides interface Read; } implementation { components new AdcReadClientC(), AdcReaderP; Read = AdcReadClientC; AdcReadClientC.AdcConfigure -> AdcReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReader/AdcReaderP.nc000066400000000000000000000041541207233610700240570ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" module AdcReaderP { provides interface AdcConfigure; } implementation { const sam3u_adc12_channel_config_t config = { channel: 0, diff: 0, prescal: 2, lowres: 0, shtim: 15, ibctl: 1, sleep: 0, startup: 104, trgen: 0, trgsel: 0 }; async command const sam3u_adc12_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReader/Makefile000066400000000000000000000002341207233610700232360ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED #CFLAGS+=-I$(TOSDIR)/lib/printf CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReader/MoteAppC.nc000066400000000000000000000041601207233610700235720ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC Read with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, AdcReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> NoLedsC; MoteP.Read -> AdcReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReader/MoteP.nc000066400000000000000000000063021207233610700231460ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC Read with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ #include #include module MoteP { uses { interface Boot; interface Leds; interface Read; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; } } implementation { event void Boot.booted() { while (call SerialSplitControl.start() != SUCCESS); call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone(){ } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); }else{ call Timer.startPeriodic(512); } } event void SerialSplitControl.stopDone(error_t error) {} task void sample() { const char *start = "Start Sampling"; call Leds.led0Toggle(); call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_RED); call Read.read(); } event void Read.readDone(error_t result, uint16_t value) { const char *fail = "Read done error"; const char *good = "Read done success"; call Draw.fill(COLOR_GREEN); if (result != SUCCESS) { call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ call Draw.drawString(10,70,good,COLOR_BLACK); call Draw.drawInt(100,100,value,1,COLOR_BLACK); } } event void Timer.fired() { post sample(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderNow/000077500000000000000000000000001207233610700222635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderNow/AdcReaderC.nc000066400000000000000000000037151207233610700245300ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration AdcReaderC { provides interface ReadNow; provides interface Resource; } implementation { components new AdcReadNowClientC(), AdcReaderP; ReadNow = AdcReadNowClientC; Resource = AdcReadNowClientC; AdcReadNowClientC.AdcConfigure -> AdcReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderNow/AdcReaderP.nc000066400000000000000000000041551207233610700245440ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" module AdcReaderP { provides interface AdcConfigure; } implementation { const sam3u_adc12_channel_config_t config = { channel: 0, diff: 0, prescal: 2, lowres: 0, shtim: 15, ibctl: 1, sleep: 0, startup: 104, trgen: 0, trgsel: 0 }; async command const sam3u_adc12_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderNow/Makefile000066400000000000000000000001741207233610700237250ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderNow/MoteAppC.nc000066400000000000000000000042251207233610700242600ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadNow with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, AdcReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> NoLedsC; MoteP.ReadNow -> AdcReaderC; MoteP.Resource -> AdcReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderNow/MoteP.nc000066400000000000000000000073001207233610700236310ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadNow with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ #include "sam3uDmahardware.h" #include #include module MoteP { uses { interface Boot; interface Leds; interface ReadNow; interface Resource; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; } } implementation { norace error_t resultError; norace uint16_t resultValue; event void Boot.booted() { while (call SerialSplitControl.start() != SUCCESS); call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone(){ call Timer.startPeriodic(512); } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); } } event void SerialSplitControl.stopDone(error_t error) {} task void sample() { const char *start = "Start Sampling"; //call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_BLACK); call Resource.request(); } event void Resource.granted(){ /* FOR dma testing ONLY*//* DMAC->saddr0.bits.saddrx = (uint32_t) 0x20180000; call Draw.fill(COLOR_GREEN); call Draw.drawInt(100, 100, DMAC->saddr0.bits.saddrx, 1, COLOR_BLACK); */ call ReadNow.read(); } task void drawResult(){ const char *fail = "Read done error"; const char *good = "Read done success"; call Draw.fill(COLOR_GREEN); if (resultError != SUCCESS) { atomic call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ call Draw.drawString(10,70,good,COLOR_BLACK); call Draw.drawInt(100,100,resultValue,1,COLOR_BLACK); } } async event void ReadNow.readDone(error_t error, uint16_t value) { atomic resultError = error; atomic resultValue = value; post drawResult(); } event void Timer.fired() { post sample(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStream/000077500000000000000000000000001207233610700227535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStream/AdcReaderC.nc000066400000000000000000000036351207233610700252210ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration AdcReaderC { provides interface ReadStream; } implementation { components new AdcReadStreamClientC(), AdcReaderP; ReadStream = AdcReadStreamClientC; AdcReadStreamClientC.AdcConfigure -> AdcReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStream/AdcReaderP.nc000066400000000000000000000041541207233610700252330ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" module AdcReaderP { provides interface AdcConfigure; } implementation { const sam3u_adc12_channel_config_t config = { channel: 0, diff: 0, prescal: 2, lowres: 0, shtim: 15, ibctl: 1, sleep: 0, startup: 104, trgen: 0, trgsel: 0 }; async command const sam3u_adc12_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStream/Makefile000066400000000000000000000002331207233610700244110ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED #CFLAGS += -DSAM3U_ADC12B_PDC CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStream/MoteAppC.nc000066400000000000000000000041711207233610700247500ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, AdcReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; MoteP.ReadStream -> AdcReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStream/MoteP.nc000066400000000000000000000075571207233610700243370ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ #include #include #define SAMPLE_BUFFER_SIZE 10000 #define NUM_SAMPLES_PER_PACKET (TOSH_DATA_LENGTH / sizeof(uint16_t)) module MoteP { uses { interface Boot; interface Leds; interface ReadStream; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; } } implementation { uint16_t buf[SAMPLE_BUFFER_SIZE]; task void clear(){ /* Reset the target buffer for the ReadStream interface */ uint32_t i; for (i = 0; i < SAMPLE_BUFFER_SIZE; i++) { buf[i] = 0xFFFF; } } event void Boot.booted() { post clear(); while (call SerialSplitControl.start() != SUCCESS); call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone(){ } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); }else{ call Timer.startPeriodic(5*1024U); } } event void SerialSplitControl.stopDone(error_t error) {} task void sample() { const char *start = "Start Sampling"; call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_RED); call ReadStream.postBuffer(buf, SAMPLE_BUFFER_SIZE); call ReadStream.read(100); } event void ReadStream.readDone(error_t result, uint32_t usActualPeriod) { if (result != SUCCESS) { }else{ } } event void ReadStream.bufferDone(error_t result, uint16_t* buffer, uint16_t count) { const char *fail = "Read done error"; const char *good = "Read done success"; call Leds.led1Toggle(); call Draw.fill(COLOR_GREEN); if (result != SUCCESS) { call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ call Draw.drawString(10,70,good,COLOR_BLACK); call Draw.drawInt(100,100,buffer[0],1,COLOR_BLACK); call Draw.drawInt(100,160,count,1,COLOR_BLACK); } } event void Timer.fired() { call Leds.led0Toggle(); post clear(); post sample(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStreamPDC/000077500000000000000000000000001207233610700233025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStreamPDC/AdcReaderC.nc000066400000000000000000000036351207233610700255500ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration AdcReaderC { provides interface ReadStream; } implementation { components new AdcReadStreamClientC(), AdcReaderP; ReadStream = AdcReadStreamClientC; AdcReadStreamClientC.AdcConfigure -> AdcReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStreamPDC/AdcReaderP.nc000066400000000000000000000041541207233610700255620ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" module AdcReaderP { provides interface AdcConfigure; } implementation { const sam3u_adc12_channel_config_t config = { channel: 0, diff: 0, prescal: 4, lowres: 0, shtim: 15, ibctl: 1, sleep: 0, startup: 104, trgen: 0, trgsel: 0 }; async command const sam3u_adc12_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStreamPDC/Makefile000066400000000000000000000002321207233610700247370ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED CFLAGS += -DSAM3U_ADC12B_PDC CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStreamPDC/MoteAppC.nc000066400000000000000000000041711207233610700252770ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, AdcReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; MoteP.ReadStream -> AdcReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStreamPDC/MoteP.nc000066400000000000000000000076171207233610700246630ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ #include #include #define SAMPLE_BUFFER_SIZE 10000 #define NUM_SAMPLES_PER_PACKET (TOSH_DATA_LENGTH / sizeof(uint16_t)) module MoteP { uses { interface Boot; interface Leds; interface ReadStream; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; } } implementation { uint16_t buf[SAMPLE_BUFFER_SIZE]; task void clear(){ /* Reset the target buffer for the ReadStream interface */ uint32_t i; for (i = 0; i < SAMPLE_BUFFER_SIZE; i++) { buf[i] = 0xFFFF; } } event void Boot.booted() { post clear(); while (call SerialSplitControl.start() != SUCCESS); call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone(){ } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); }else{ call Timer.startPeriodic(3*1024); } } event void SerialSplitControl.stopDone(error_t error) {} task void sample() { const char *start = "Start Sampling"; call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_RED); //call Leds.led1Toggle(); call ReadStream.postBuffer(buf, SAMPLE_BUFFER_SIZE); call ReadStream.read(100); } event void ReadStream.readDone(error_t result, uint32_t usActualPeriod) { if (result != SUCCESS) { }else{ } } event void ReadStream.bufferDone(error_t result, uint16_t* buffer, uint16_t count) { const char *fail = "Read done error"; const char *good = "Read done success"; call Draw.fill(COLOR_GREEN); if (result != SUCCESS) { call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ call Draw.drawString(10,70,good,COLOR_BLACK); call Draw.drawInt(100,100,buffer[0],1,COLOR_BLACK); call Draw.drawInt(100,120,buffer[9],1,COLOR_BLACK); call Draw.drawInt(100,160,count,1,COLOR_BLACK); } } event void Timer.fired() { post clear(); post sample(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/adc12b/AdcReaderStreamPDC/README000066400000000000000000000004361207233610700241650ustar00rootroot0000000000000012 bit ADC test program for SAM3U with PDC @author JeongGil Ko To use PDC with ADC, the sampling rate MUST be controlled by properly setting the startup, prescal and lowres registers. Setting the sam3u_adc12_channel_config_t config can properly set these registers.tinyos-2.1.2+dfsg/apps/tests/sam3/clock/000077500000000000000000000000001207233610700200245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/clock/showSpeed/000077500000000000000000000000001207233610700217655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/clock/showSpeed/ClockSpeedAppC.nc000066400000000000000000000042471207233610700250760ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application that displays the current clock speed on the LCD. * * @author Thomas Schmid **/ configuration ClockSpeedAppC { } implementation { components MainC, ClockSpeedC, LedsC; ClockSpeedC -> MainC.Boot; ClockSpeedC.Leds -> LedsC; components LcdC; ClockSpeedC.Lcd -> LcdC; ClockSpeedC.Draw -> LcdC; components HplSam3uClockC; ClockSpeedC.HplSam3uClock -> HplSam3uClockC; components HplSam3uGeneralIOC; ClockSpeedC.Pck0Pin -> HplSam3uGeneralIOC.HplPioA21; components new TimerMilliC() as T1; ClockSpeedC.ChangeTimer -> T1; } tinyos-2.1.2+dfsg/apps/tests/sam3/clock/showSpeed/ClockSpeedC.nc000066400000000000000000000123461207233610700244340ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid **/ #include #include #include module ClockSpeedC { uses { interface Leds; interface Boot; interface HplSam3uClock; interface HplSam3uGeneralIOPin as Pck0Pin; interface Timer as ChangeTimer; interface Lcd; interface Draw; } } implementation { uint8_t state; uint8_t speed; enum { SLOW = 0, MAIN = 1, PLLA = 2, MASTER = 4, }; enum { RC12, MC48, MC84, }; event void Boot.booted() { pmc_pck_t pck0 = PMC->pck0; pmc_scer_t scer = PMC->scer; state = SLOW; speed = RC12; // output slow clock on PCK0 pck0.bits.css = SLOW; PMC->pck0 = pck0; scer.bits.pck0 = 1; PMC->scer = scer; call Lcd.initialize(); call Pck0Pin.disablePioControl(); call Pck0Pin.selectPeripheralB(); // output programmable clock 0 on pin } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { call Leds.led1On(); } else { call Draw.fill(COLOR_WHITE); call Lcd.start(); } } event void Lcd.startDone() { call Leds.led0On(); call Draw.drawString(10, 10, "Init Clock:", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 30, call HplSam3uClock.getMainClockSpeed(), 1, COLOR_BLACK); call HplSam3uClock.mckInit84(); call ChangeTimer.startPeriodic(10000); } event void ChangeTimer.fired() { pmc_pck_t pck0 = PMC->pck0; call Draw.fill(COLOR_WHITE); call Draw.drawString(10, 50, "MCK Speed:", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, call HplSam3uClock.getMainClockSpeed(), 1, COLOR_BLACK); switch(state) { case SLOW: pck0.bits.css = state; PMC->pck0 = pck0; call Draw.drawString(10, 90, "Slow Clock on PA21", COLOR_BLACK); state = MAIN; break; case MAIN: pck0.bits.css = state; PMC->pck0 = pck0; call Draw.drawString(10, 90, "Main Clock on PA21", COLOR_BLACK); state = PLLA; break; case PLLA: pck0.bits.css = state; PMC->pck0 = pck0; call Draw.drawString(10, 90, "PLLA Clock on PA21", COLOR_BLACK); state = MASTER; break; case MASTER: pck0.bits.css = state; PMC->pck0 = pck0; call Draw.drawString(10, 90, "Master Clock on PA21", COLOR_BLACK); state = SLOW; switch(speed) { case RC12: call Draw.drawString(10, 10, "RC12 Clock:", COLOR_BLACK); call HplSam3uClock.mckInit12RC(); speed = MC48; break; case MC48: call Draw.drawString(10, 10, "MC48 Clock:", COLOR_BLACK); call HplSam3uClock.mckInit84(); speed = MC84; break; case MC84: call Draw.drawString(10, 10, "MC84 Clock:", COLOR_BLACK); call HplSam3uClock.mckInit48(); speed = RC12; break; } break; } } async event void HplSam3uClock.mainClockChanged() { } } tinyos-2.1.2+dfsg/apps/tests/sam3/clock/showSpeed/Makefile000066400000000000000000000000561207233610700234260ustar00rootroot00000000000000COMPONENT=ClockSpeedAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/dac/000077500000000000000000000000001207233610700174605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/dac/README000066400000000000000000000010041207233610700203330ustar00rootroot00000000000000These test applications generate a tone on the two DAC outputs. The tone can be observed on PB13 and PB14, or on the headset output with a loudspeaker/headphones. Carefull, some of the tones are LOUD! timer: This application uses a timer to trigger the samples being sent to the DAC. fast: This application writes as fast as it can to the DAC in a busy loop. pdc: This application uses the PDC controller to transfer the samples from memory to the DAC. It uses the PWM controller to generate the sampling signal. tinyos-2.1.2+dfsg/apps/tests/sam3/dac/fast/000077500000000000000000000000001207233610700204155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/dac/fast/DacAppC.nc000066400000000000000000000036701207233610700222000ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * DACC Demo application for the Sam3s. We generate a sine wave that can be * observed on both DAC0 (PB13) and DAC1 (PB14). * * @author Thomas Schmid */ configuration DacAppC { } implementation { components MainC, DacC, LedsC, NoLedsC; DacC -> MainC.Boot; DacC.Leds -> LedsC; components Sam3sDacC; DacC.DacControl -> Sam3sDacC; DacC.Dac -> Sam3sDacC; } tinyos-2.1.2+dfsg/apps/tests/sam3/dac/fast/DacC.nc000066400000000000000000000073761207233610700215460ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ #include "Timer.h" module DacC @safe() { uses { interface Leds; interface Boot; interface StdControl as DacControl; interface Sam3sDac as Dac; } } implementation { #define SAMPLES 100 const int16_t sine_data[SAMPLES]= { 0x0, 0x080, 0x100, 0x17f, 0x1fd, 0x278, 0x2f1, 0x367, 0x3da, 0x449, 0x4b3, 0x519, 0x579, 0x5d4, 0x629, 0x678, 0x6c0, 0x702, 0x73c, 0x76f, 0x79b, 0x7bf, 0x7db, 0x7ef, 0x7fb, 0x7ff, 0x7fb, 0x7ef, 0x7db, 0x7bf, 0x79b, 0x76f, 0x73c, 0x702, 0x6c0, 0x678, 0x629, 0x5d4, 0x579, 0x519, 0x4b3, 0x449, 0x3da, 0x367, 0x2f1, 0x278, 0x1fd, 0x17f, 0x100, 0x080, -0x0, -0x080, -0x100, -0x17f, -0x1fd, -0x278, -0x2f1, -0x367, -0x3da, -0x449, -0x4b3, -0x519, -0x579, -0x5d4, -0x629, -0x678, -0x6c0, -0x702, -0x73c, -0x76f, -0x79b, -0x7bf, -0x7db, -0x7ef, -0x7fb, -0x7ff, -0x7fb, -0x7ef, -0x7db, -0x7bf, -0x79b, -0x76f, -0x73c, -0x702, -0x6c0, -0x678, -0x629, -0x5d4, -0x579, -0x519, -0x4b3, -0x449, -0x3da, -0x367, -0x2f1, -0x278, -0x1fd, -0x17f, -0x100, -0x080 }; uint8_t index = 0; event void Boot.booted() { uint32_t data; uint32_t d0; uint32_t d1; call DacControl.start(); call Dac.configure( 0, // enable external trigger mode 0, // select trigger source 1, // 1: word transfer, 0: half-word 0, // 1: sleep mode, 0: normal mode 0, // fast wakeup 1, // refresh period = 1024 * REFRESH/DACC Clock 0, // select channel 1, // 1: bits 13-12 in data select channel 0, // 1: max speed mode enabled 8); call Dac.enable(0); call Dac.enable(1); while(1) { d0 = sine_data[index] * 1024 / (1<<11) + (1 << 11); d1 = sine_data[(index+SAMPLES/4)%SAMPLES] * 1024 / (1<<11) + (1 << 11); // format: data = (((0 << 12) + d0) << 16) + ((1 << 12) + d1); call Leds.led0Toggle(); if(call Dac.set(data) == SUCCESS) { call Leds.led1Toggle(); index++; if(index >= SAMPLES) { index = 0; } } } } async event void Dac.bufferDone(error_t error, uint32_t* buffer, uint16_t length) {} } tinyos-2.1.2+dfsg/apps/tests/sam3/dac/fast/Makefile000066400000000000000000000000501207233610700220500ustar00rootroot00000000000000COMPONENT=DacAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/dac/pdc/000077500000000000000000000000001207233610700202265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/dac/pdc/DacAppC.nc000066400000000000000000000036701207233610700220110ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * DACC Demo application for the Sam3s. We generate a sine wave that can be * observed on both DAC0 (PB13) and DAC1 (PB14). * * @author Thomas Schmid */ configuration DacAppC { } implementation { components MainC, DacC, LedsC, NoLedsC; DacC -> MainC.Boot; DacC.Leds -> LedsC; components Sam3sDacC; DacC.DacControl -> Sam3sDacC; DacC.Dac -> Sam3sDacC; } tinyos-2.1.2+dfsg/apps/tests/sam3/dac/pdc/DacC.nc000066400000000000000000000076231207233610700213520ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ #include "Timer.h" module DacC @safe() { uses { interface Leds; interface Boot; interface StdControl as DacControl; interface Sam3sDac as Dac; } } implementation { #define SAMPLES 100 const int16_t sine_data[SAMPLES]= { 0x0, 0x080, 0x100, 0x17f, 0x1fd, 0x278, 0x2f1, 0x367, 0x3da, 0x449, 0x4b3, 0x519, 0x579, 0x5d4, 0x629, 0x678, 0x6c0, 0x702, 0x73c, 0x76f, 0x79b, 0x7bf, 0x7db, 0x7ef, 0x7fb, 0x7ff, 0x7fb, 0x7ef, 0x7db, 0x7bf, 0x79b, 0x76f, 0x73c, 0x702, 0x6c0, 0x678, 0x629, 0x5d4, 0x579, 0x519, 0x4b3, 0x449, 0x3da, 0x367, 0x2f1, 0x278, 0x1fd, 0x17f, 0x100, 0x080, -0x0, -0x080, -0x100, -0x17f, -0x1fd, -0x278, -0x2f1, -0x367, -0x3da, -0x449, -0x4b3, -0x519, -0x579, -0x5d4, -0x629, -0x678, -0x6c0, -0x702, -0x73c, -0x76f, -0x79b, -0x7bf, -0x7db, -0x7ef, -0x7fb, -0x7ff, -0x7fb, -0x7ef, -0x7db, -0x7bf, -0x79b, -0x76f, -0x73c, -0x702, -0x6c0, -0x678, -0x629, -0x5d4, -0x579, -0x519, -0x4b3, -0x449, -0x3da, -0x367, -0x2f1, -0x278, -0x1fd, -0x17f, -0x100, -0x080 }; uint32_t sine[SAMPLES] = {0}; event void Boot.booted() { uint32_t d0; uint32_t d1; uint16_t i; for(i=0; i sine[i] = (((0 << 12) + d0) << 16) + ((1 << 12) + d1); } call DacControl.start(); call Dac.configure( 0, // enable external trigger mode 0, // select trigger source 1, // 1: word transfer, 0: half-word 0, // 1: sleep mode, 0: normal mode 0, // fast wakeup 1, // refresh period = 1024 * REFRESH/DACC Clock 0, // select channel 1, // 1: bits 13-12 in data select channel 0, // 1: max speed mode enabled 8); call Dac.enable(0); call Dac.enable(1); call Dac.setFrequency(12000); // for some reason, we currently have to double the DAC frequency call Dac.setBuffer(sine, SAMPLES); call Dac.startPdc(); while(call Dac.setBuffer(sine, SAMPLES) == SUCCESS) { } } async event void Dac.bufferDone(error_t error, uint32_t *buffer, uint16_t length) { call Leds.led2Toggle(); while(call Dac.setBuffer(sine, SAMPLES) == SUCCESS) { } } } tinyos-2.1.2+dfsg/apps/tests/sam3/dac/pdc/Makefile000066400000000000000000000000501207233610700216610ustar00rootroot00000000000000COMPONENT=DacAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/dac/timer/000077500000000000000000000000001207233610700206005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/dac/timer/DacAppC.nc000066400000000000000000000037731207233610700223670ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * DACC Demo application for the Sam3s. We generate a sine wave that can be * observed on both DAC0 (PB13) and DAC1 (PB14). * * @author Thomas Schmid */ configuration DacAppC { } implementation { components MainC, DacC, LedsC, NoLedsC; components new AlarmTMicro16C() as Alarm; DacC -> MainC.Boot; DacC.Alarm -> Alarm; DacC.Leds -> LedsC; components Sam3sDacC; DacC.DacControl -> Sam3sDacC; DacC.Dac -> Sam3sDacC; } tinyos-2.1.2+dfsg/apps/tests/sam3/dac/timer/DacC.nc000066400000000000000000000074001207233610700217150ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ #include "Timer.h" module DacC @safe() { uses { interface Alarm as Alarm; interface Leds; interface Boot; interface StdControl as DacControl; interface Sam3sDac as Dac; } } implementation { #define SAMPLES 100 const int16_t sine_data[SAMPLES]= { 0x0, 0x080, 0x100, 0x17f, 0x1fd, 0x278, 0x2f1, 0x367, 0x3da, 0x449, 0x4b3, 0x519, 0x579, 0x5d4, 0x629, 0x678, 0x6c0, 0x702, 0x73c, 0x76f, 0x79b, 0x7bf, 0x7db, 0x7ef, 0x7fb, 0x7ff, 0x7fb, 0x7ef, 0x7db, 0x7bf, 0x79b, 0x76f, 0x73c, 0x702, 0x6c0, 0x678, 0x629, 0x5d4, 0x579, 0x519, 0x4b3, 0x449, 0x3da, 0x367, 0x2f1, 0x278, 0x1fd, 0x17f, 0x100, 0x080, -0x0, -0x080, -0x100, -0x17f, -0x1fd, -0x278, -0x2f1, -0x367, -0x3da, -0x449, -0x4b3, -0x519, -0x579, -0x5d4, -0x629, -0x678, -0x6c0, -0x702, -0x73c, -0x76f, -0x79b, -0x7bf, -0x7db, -0x7ef, -0x7fb, -0x7ff, -0x7fb, -0x7ef, -0x7db, -0x7bf, -0x79b, -0x76f, -0x73c, -0x702, -0x6c0, -0x678, -0x629, -0x5d4, -0x579, -0x519, -0x4b3, -0x449, -0x3da, -0x367, -0x2f1, -0x278, -0x1fd, -0x17f, -0x100, -0x080 }; uint8_t index = 0; event void Boot.booted() { call DacControl.start(); call Dac.configure( 0, // enable external trigger mode 0, // select trigger source 1, // 1: word transfer, 0: half-word 0, // 1: sleep mode, 0: normal mode 0, // fast wakeup 1, // refresh period = 1024 * REFRESH/DACC Clock 0, // select channel 1, // 1: bits 15-13 in data select channel 0, // 1: max speed mode enabled 8); call Dac.enable(0); call Dac.enable(1); call Alarm.start(100); } async event void Alarm.fired() { uint32_t data; uint32_t d0 = sine_data[index] * 1024 / (1<<11) + (1 << 11); uint32_t d1 = sine_data[(index+SAMPLES/4)%SAMPLES] * 1024 / (1<<11) + (1 << 11); call Leds.led0Toggle(); // format: data = (((0 << 12) + d0) << 16) + ((1 << 12) + d1); call Dac.set(data); index++; if(index >= SAMPLES) { index = 0; } call Alarm.start(100); } async event void Dac.bufferDone(error_t error, uint32_t* buffer, uint16_t length) {} } tinyos-2.1.2+dfsg/apps/tests/sam3/dac/timer/Makefile000066400000000000000000000000501207233610700222330ustar00rootroot00000000000000COMPONENT=DacAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/dma/000077500000000000000000000000001207233610700174725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/dma/Makefile000066400000000000000000000002341207233610700211310ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED #CFLAGS+=-I$(TOSDIR)/lib/printf CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/dma/MoteAppC.nc000066400000000000000000000042701207233610700214670ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC Read with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, LcdC, Sam3uDmaC, HplNVICC, HplSam3uClockC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Dma -> Sam3uDmaC.Channel0; MoteP.DMAControl -> Sam3uDmaC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/dma/MoteP.nc000066400000000000000000000073261207233610700210500ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uDmahardware.h" #include "sam3updchardware.h" #include "sam3uadc12bhardware.h" #include "sam3umatrixhardware.h" #include #include module MoteP { uses { interface Boot; interface Leds; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; interface Sam3uDmaControl as DMAControl; interface Sam3uDmaChannel as Dma; } } implementation{ uint16_t msg = 48; uint16_t msg2 = 0; uint8_t channel = 0; task void setup(); task void tx(); event void Boot.booted(){ call Lcd.initialize(); call DMAControl.init(); call DMAControl.setArbitor(TRUE); post setup(); post tx(); call Timer.startPeriodic(1024); } event void Lcd.initializeDone(error_t err){ if(err != SUCCESS){ }else{ call Draw.fill(COLOR_GREEN); call Lcd.start(); } } uint8_t tmp_s = 88; uint8_t tmp_d = 0; task void setup(){ call Dma.setupTransfer(0, (uint32_t*)&tmp_s, (uint32_t*)&tmp_d, 1 , 0, 0, 0, 0, 1, 1, 0, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); //post tx(); } task void tx(){ call Draw.fill(COLOR_WHITE); call Draw.drawInt(100,80,tmp_s,1,COLOR_RED); call Draw.drawInt(150,80,tmp_d,1,COLOR_RED); tmp_d = 0; call Leds.led1Toggle(); call Dma.startTransfer(0); call Draw.drawInt(100,100,tmp_s,1,COLOR_RED); call Draw.drawInt(150,100,tmp_d,1,COLOR_RED); } task void repeat(){ call Draw.fill(COLOR_WHITE); call Draw.drawInt(100,80,tmp_s,1,COLOR_RED); call Draw.drawInt(150,80,tmp_d,1,COLOR_RED); tmp_s++; tmp_d = 0; call Draw.drawInt(100,100,tmp_s,1,COLOR_RED); call Draw.drawInt(150,100,tmp_d,1,COLOR_RED); call Leds.led1Toggle(); call Dma.repeatTransfer((uint32_t*)&tmp_s, (uint32_t*)&tmp_d, 1, 0); } async event void Dma.transferDone(error_t success){ call Leds.led0Toggle(); } event void Timer.fired() { post repeat(); } event void Lcd.startDone(){} event void SerialSplitControl.startDone(error_t error){} event void SerialSplitControl.stopDone(error_t error) {} } tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/000077500000000000000000000000001207233610700176335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/erase/000077500000000000000000000000001207233610700207325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/erase/Makefile000066400000000000000000000000501207233610700223650ustar00rootroot00000000000000COMPONENT=MoteAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/erase/MoteAppC.nc000066400000000000000000000040001207233610700227160ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "AT91SAM3U4.h" configuration MoteAppC {} implementation { components MainC; components MoteP; components LedsC; components new HplSam3uEefcC((uint32_t)AT91C_BASE_EFC1, AT91C_IFLASH1, AT91C_IFLASH1_PAGE_SIZE, AT91C_IFLASH1_SIZE) as IFlash; MainC.SoftwareInit -> IFlash; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; MoteP.IFlash -> IFlash; } tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/erase/MoteP.nc000066400000000000000000000035031207233610700223010ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module MoteP { uses { interface Boot; interface HplSam3uEefc as IFlash; interface Leds; } } implementation { event void Boot.booted() { call IFlash.erase(); call Leds.led1On(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/read_write/000077500000000000000000000000001207233610700217605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/read_write/Makefile000066400000000000000000000000741207233610700234210ustar00rootroot00000000000000COMPONENT=MoteAppC #BOOTLOADER=tosboot include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/read_write/MoteAppC.nc000066400000000000000000000036071207233610700237600ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "AT91SAM3U4.h" configuration MoteAppC {} implementation { components MainC; components Sam3uEefcC; components LedsC; components new MoteP((uint32_t)AT91C_IFLASH0); MoteP.IFlash -> Sam3uEefcC.InternalFlash0; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/sam3/eefc/read_write/MoteP.nc000066400000000000000000000076621207233610700233410ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ generic module MoteP(uint32_t base_addr) { uses { interface Boot; interface InternalFlash as IFlash; interface Leds; } } implementation { __attribute__((noinline)) void verySimpleTest() { #define BUFFER0_SIZE 256 uint8_t buf[BUFFER0_SIZE]; uint8_t *addr; uint16_t size; int i; for(i=0; iimageAddr); e = ecombine(e, bootArgs.gestureCount != iflashArgs->gestureCount); e = ecombine(e, bootArgs.address != iflashArgs->address); e = ecombine(e, bootArgs.noReprogram != iflashArgs->noReprogram); if(e) { call Leds.led0On(); while(1); } } } event void Boot.booted() { verySimpleTest(); // simpleTest(); // testBootArgs(); call Leds.led1On(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/hsmci/000077500000000000000000000000001207233610700200345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/hsmci/fatfs/000077500000000000000000000000001207233610700211375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/hsmci/fatfs/Makefile000066400000000000000000000002351207233610700225770ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED CFLAGS += -I$(TOSDIR)/lib/printf CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/hsmci/fatfs/MoteAppC.nc000066400000000000000000000035741207233610700231420ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's SD Card Implementation with FatFS * @author Kevin Klues */ configuration MoteAppC {} implementation { components MainC; components MoteP; components FatFsC; components LedsC; MoteP.Boot -> MainC; MoteP.FatFs ->FatFsC; MoteP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/sam3/hsmci/fatfs/MoteP.nc000066400000000000000000000046161207233610700225140ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's HSMCI HPL interface * @author Kevin Klues */ #include "sam3uhsmcihardware.h" #include "FatFs.h" module MoteP { uses { interface Boot; interface FatFs; interface Leds; } } implementation { FATFS fs; DIR dp; FIL fp; #define BUF_SIZE 1024 uint8_t buf[BUF_SIZE]; uint bytes_written; event void Boot.booted() { int i; for(i=0; i */ #include configuration MoteAppC {} implementation { components MainC; components MoteP; components Sam3uHsmciC; components LedsC; enum { RESOURCE_ID = unique(SAM3U_HSMCI_RESOURCE) }; MoteP.Boot -> MainC; MoteP.Resource -> Sam3uHsmciC.Resource[RESOURCE_ID]; MoteP.Sam3uHsmciInit -> Sam3uHsmciC.Sam3uHsmciInit; MoteP.Sam3uHsmci -> Sam3uHsmciC.Sam3uHsmci[RESOURCE_ID]; MoteP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/sam3/hsmci/hil/MoteP.nc000066400000000000000000000062471207233610700221670ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's HSMCI HPL interface * @author Kevin Klues */ #include "sam3uhsmcihardware.h" module MoteP { uses { interface Boot; interface Resource; interface Sam3uHsmciInit; interface Sam3uHsmci; interface Leds; } } implementation { #define NUM_BLOCKS 1000 #define WORDS_PER_BLOCK 128 norace int next_block = 0; norace uint32_t tx_buf[WORDS_PER_BLOCK]; norace uint32_t rx_buf[WORDS_PER_BLOCK]; event void Boot.booted() { int i; for(i=0; i */ configuration MoteAppC {} implementation { components MainC; components MoteP; components HplSam3uHsmciC; components LedsC; components BusyWaitMicroC; MoteP.Boot -> MainC; MoteP.AsyncStdControl -> HplSam3uHsmciC; MoteP.HplSam3uHsmci -> HplSam3uHsmciC; MoteP.Leds -> LedsC; MoteP.BusyWait -> BusyWaitMicroC; } tinyos-2.1.2+dfsg/apps/tests/sam3/hsmci/hpl/MoteP.nc000066400000000000000000000102511207233610700221640ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's HSMCI HPL interface * @author Kevin Klues */ #include "sam3uhsmcihardware.h" module MoteP { uses { interface Boot; interface AsyncStdControl; interface HplSam3uHsmci; interface Leds; interface BusyWait; } } implementation { #define NUM_BLOCKS 1000 #define WORDS_PER_BLOCK 128 enum { SD_STANDARD_CAP, SD_HIGHEXT_CAP, }; norace int next_block = 0; norace int block_multiplier = 512; norace int card_type = SD_STANDARD_CAP; uint16_t card_size = 0; norace uint32_t rca_addr; norace uint32_t trans_buf[WORDS_PER_BLOCK]; uint32_t *trans_buf_ptr; event void Boot.booted() { int i; call AsyncStdControl.start(); trans_buf_ptr = trans_buf; call HplSam3uHsmci.init(&trans_buf_ptr); for(i=0; irca << 16; call HplSam3uHsmci.sendCommand(CMD9, rca_addr); } } async event void* HplSam3uHsmci.sendCommandDone(uint8_t cmd, void* rsp, error_t error) { if(error == SUCCESS) { switch(cmd) { case CMD9: { hsmci_sd_r2_t *r2 = (hsmci_sd_r2_t*)rsp; card_type = r2->csd.csd_structure; block_multiplier = card_type ? 1 : 512; //TODO: compute the card size so one can query it call HplSam3uHsmci.sendCommand(CMD7, rca_addr); break; } case CMD7: call HplSam3uHsmci.sendCommand(ACMD6, 2); break; case ACMD6: call Leds.led2Toggle(); call HplSam3uHsmci.sendCommand(CMD16, 512); break; case CMD16: call HplSam3uHsmci.sendCommand(CMD24, next_block*block_multiplier); break; case CMD24: break; case CMD17: break; default: } } return rsp; } async event void HplSam3uHsmci.txDone(error_t error) { int i; if(error != SUCCESS) call Leds.led0On(); for(i=0; i */ #include configuration MoteAppC {} implementation { components MainC; components MoteP; components SDC; components LedsC; MoteP.Boot -> MainC; MoteP.StdControl -> SDC; MoteP.SD -> SDC.SD; MoteP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/sam3/hsmci/sd/MoteP.nc000066400000000000000000000057711207233610700220220ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's HSMCI HPL interface * @author Kevin Klues */ #include "sam3uhsmcihardware.h" #include "printf.h" module MoteP { uses { interface Boot; interface StdControl; interface SD; interface Leds; } } implementation { #define NUM_BLOCKS 1000 #define BYTES_PER_BLOCK 512 int next_block = 0; uint8_t tx_buf[BYTES_PER_BLOCK]; uint8_t rx_buf[BYTES_PER_BLOCK]; task void writeTask(); task void readTask(); event void Boot.booted() { int i; uint32_t size; for(i=0; i MainC.Boot; TestLcdC.Leds -> LedsC; components LcdC; TestLcdC.Lcd -> LcdC; TestLcdC.Draw -> LcdC; components new TimerMilliC() as T0; TestLcdC.ChangeTimer -> T0; components RandomC; TestLcdC.Random -> RandomC; } tinyos-2.1.2+dfsg/apps/tests/sam3/lcd/TestLcdC.nc000066400000000000000000000113621207233610700214650ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid **/ #include #include module TestLcdC { uses { interface Timer as ChangeTimer; interface Leds; interface Boot; interface Random; interface Lcd; interface Draw; } } implementation { enum { RED, GREEN, BLUE, WHITE, STRING, RAND, }; uint8_t state; uint8_t backgrnd; event void Boot.booted() { state = RED; backgrnd = 0; call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { call Leds.led1On(); } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } event void Lcd.startDone() { call Leds.led0On(); call ChangeTimer.startPeriodic(1024); } event void ChangeTimer.fired() { switch(state) { case RED: call Draw.fill(COLOR_RED); state = GREEN; break; case GREEN: call Draw.fill(COLOR_GREEN); state = BLUE; break; case BLUE: call Draw.fill(COLOR_BLUE); state = WHITE; break; case WHITE: call Draw.fill(COLOR_WHITE); state = STRING; break; case STRING: { const char *hi = "Hello World"; const char *l1 = "I am running"; const char *l2 = "the SAM3U port"; const char *l3 = "of TinyOS!"; const char *l4 = "wiki.github.com/"; const char *l5 = "tschmid/tinyos-2.x"; call ChangeTimer.stop(); call Draw.fill(COLOR_WHITE); call Draw.drawString(10, 50, hi, COLOR_RED); call Draw.drawString(10, 70, l1, COLOR_ORANGE); call Draw.drawString(10, 90, l2, COLOR_BLUE); call Draw.drawString(10, 110, l3, COLOR_NAVY); call Draw.drawString(10, 170, l4, COLOR_BLACK); call Draw.drawString(10, 190, l5, COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 210, 123456789L, 1, COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 230, 987654321L, -1, COLOR_BLACK); call ChangeTimer.startOneShot(10000); state = RAND; break; } case RAND: { uint32_t x; for (x=0; x<10*BOARD_LCD_WIDTH*BOARD_LCD_HEIGHT; x++) { uint32_t r = call Random.rand32(); call Draw.drawPixel((r & 0x0000FFFF)%BOARD_LCD_WIDTH, ((r >> 16) & 0x0000FFFF)%BOARD_LCD_HEIGHT, r%COLOR_WHITE); } call ChangeTimer.startPeriodic(1024); state = RED; break; } } } } tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/000077500000000000000000000000001207233610700175325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/TestMpuProtection/000077500000000000000000000000001207233610700232025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/TestMpuProtection/Makefile000066400000000000000000000000651207233610700246430ustar00rootroot00000000000000COMPONENT=TestMpuProtectionAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/TestMpuProtection/TestMpuProtectionAppC.nc000066400000000000000000000037661207233610700277540ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application to test thread isolation. * * @author Wanja Hofer **/ configuration TestMpuProtectionAppC { } implementation { components MainC, TestMpuProtectionC, LedsC; components new ThreadC(0x200) as Thread0; components new ThreadC(0x200) as Thread1; TestMpuProtectionC -> MainC.Boot; TestMpuProtectionC.Leds -> LedsC; TestMpuProtectionC.Thread0 -> Thread0; TestMpuProtectionC.Thread1 -> Thread1; } tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/TestMpuProtection/TestMpuProtectionC.nc000066400000000000000000000070631207233610700273050ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application to test thread isolation. * * @author Wanja Hofer **/ // Depending on if MPU protection is enabled or not, thread 1 will be able to // write to thread 0's data or not, and, therefore, after LED 0 lights up, either // LED 1 should light up (not protected) or LED 2 (red) should light up (protected) typedef struct { uint32_t word1; uint32_t word2; uint32_t word3; uint32_t word4; uint32_t word5; uint32_t word6; uint32_t word7; uint32_t word8; } struct32bytes; module TestMpuProtectionC { uses interface Leds; uses interface Boot; uses interface Thread as Thread0; uses interface Thread as Thread1; } implementation { // does not normally have to be volatile, but here it does // so that the compiler does not optimize the artificial check // for manipulation in the test case volatile struct32bytes data0 __attribute__((section(".bssthread0"))); // belongs to thread 0 volatile struct32bytes data1 __attribute__((section(".bssthread1"))); // belongs to thread 1 void fatal(); void wait() { volatile unsigned int i; for (i = 0; i < 1000000; i++); } event void Boot.booted() { call Thread0.start(NULL); call Thread1.start(NULL); } event void Thread0.run(void* arg) { // initialize own data data0.word1 = 1; data0.word2 = 1; data0.word3 = 1; data0.word4 = 1; data0.word5 = 1; data0.word6 = 1; data0.word7 = 1; data0.word8 = 1; // check if data has been manipulated while (1) { if (data0.word1 != 1) { call Leds.led1On(); // LED 1 (green): data has been manipulated } } } event void Thread1.run(void* arg) { volatile uint32_t i; for (i = 0; i < 4; i++) { // wait for some time wait(); } // then manipulate foreign data call Leds.led0On(); // LED 0 (green): manipulation attempt about to happen data0.word1 = 2; while (1); // wait forever } void fatal() { while (1) { volatile int i; for (i = 0; i < 100000; i++); call Leds.led2Toggle(); // Led 2 (red) blinking: fatal } } } tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/TestMpuProtectionSyscall/000077500000000000000000000000001207233610700245355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/TestMpuProtectionSyscall/Makefile000066400000000000000000000001711207233610700261740ustar00rootroot00000000000000COMPONENT=TestMpuProtectionSyscallAppC CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/TestMpuProtectionSyscall/TestMpuProtectionSyscallAppC.nc000066400000000000000000000046741207233610700326410ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic app to test thread isolation with system calls. * Based on Kevin's TestSineSensorAppC. * * @author Wanja Hofer */ configuration TestMpuProtectionSyscallAppC { } implementation { components MainC, TestMpuProtectionSyscallC; components new ThreadC(0x200) as Thread0; components new BlockingSineSensorC(); components BlockingSerialActiveMessageC; components new BlockingSerialAMSenderC(228); MainC.Boot <- TestMpuProtectionSyscallC; MainC.SoftwareInit -> BlockingSineSensorC; TestMpuProtectionSyscallC.Thread0 -> Thread0; TestMpuProtectionSyscallC.BlockingRead -> BlockingSineSensorC; TestMpuProtectionSyscallC.AMControl -> BlockingSerialActiveMessageC; TestMpuProtectionSyscallC.BlockingAMSend -> BlockingSerialAMSenderC; //TestMpuProtectionSyscallC.Packet -> BlockingSerialAMSenderC; components LedsC; TestMpuProtectionSyscallC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/sam3/mpu/TestMpuProtectionSyscall/TestMpuProtectionSyscallC.nc000066400000000000000000000047601207233610700321740ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic app to test thread isolation with system calls. * Based on Kevin's TestSineSensorAppC. * * @author Wanja Hofer */ module TestMpuProtectionSyscallC { uses { interface Boot; interface Thread as Thread0; interface BlockingRead; interface BlockingStdControl as AMControl; interface BlockingAMSend; //interface Packet; interface Leds; } } implementation { void wait() { volatile unsigned int i; for (i = 0; i < 1000000; i++); } event void Boot.booted() { call Thread0.start(NULL); } event void Thread0.run(void* arg) { uint16_t* var = NULL; message_t msg; //var = call Packet.getPayload(&msg, sizeof(uint16_t)); while( call AMControl.start() != SUCCESS ); for(;;){ while( call BlockingRead.read(var) != SUCCESS ); while( call BlockingAMSend.send(AM_BROADCAST_ADDR, &msg, sizeof(uint16_t)) != SUCCESS ); call Leds.led0Toggle(); wait(); } } } tinyos-2.1.2+dfsg/apps/tests/sam3/pdc/000077500000000000000000000000001207233610700174775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/pdc/Makefile000066400000000000000000000002341207233610700211360ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED #CFLAGS+=-I$(TOSDIR)/lib/printf CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/pdc/MoteAppC.nc000066400000000000000000000044741207233610700215020ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's 12 bit ADC Read with LCD * @author Chieh-Jan Mike Liang * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, LcdC, Sam3uDmaC, HplNVICC, HplSam3uClockC, HplSam3uPdcC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; //MoteP.ClockControl -> HplSam3uClockC.DBGUPPCntl; //MoteP.PDC -> HplSam3uPdcC.UartPdcControl; MoteP.ClockControl -> HplSam3uClockC.TWI0PPCntl; MoteP.PDC -> HplSam3uPdcC.Twi0PdcControl; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; } tinyos-2.1.2+dfsg/apps/tests/sam3/pdc/MoteP.nc000066400000000000000000000111331207233610700210440ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This example validates that the values for the PDC registers are correctly written * * @author JeongGil Ko */ #include "sam3uDmahardware.h" #include "sam3updchardware.h" #include "sam3uadc12bhardware.h" #include "sam3umatrixhardware.h" #include #include module MoteP { uses { interface Boot; interface Leds; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; interface HplSam3uPdc as PDC; interface HplSam3uPeripheralClockCntl as ClockControl; } } implementation{ uint16_t msg = 48; uint16_t msg2 = 0; uint8_t channel = 0; uint32_t addr = 0; task void setup(); task void tx(); event void Boot.booted() { call Lcd.initialize(); call ClockControl.enable(); call Timer.startPeriodic(1024); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_GREEN); call Lcd.start(); } } event void Lcd.startDone(){ } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); }else{ } } event void SerialSplitControl.stopDone(error_t error) {} uint8_t tmp_s = 88; uint8_t tmp_d = 0; task void setup(){ post tx(); } uint8_t temp = 99; uint8_t temp_d = 0; bool status; enum { UART_BASE = 0x400E0600, USART0_BASE = 0x40090000, USART1_BASE = 0x40094000, USART2_BASE = 0x40098000, USART3_BASE = 0x4009C000, TWI0_BASE = 0x40084000, TWI1_BASE = 0x40088000, PWM_BASE = 0x4008C000 }; task void tx() { volatile periph_rpr_t* RPR = (volatile periph_rpr_t*) (TWI0_BASE + 0x100); volatile periph_rcr_t* RCR = (volatile periph_rcr_t*) (TWI0_BASE + 0x104); volatile periph_tpr_t* TPR = (volatile periph_tpr_t*) (TWI0_BASE + 0x108); volatile periph_tcr_t* TCR = (volatile periph_tcr_t*) (TWI0_BASE + 0x10C); volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (TWI0_BASE + 0x120); volatile periph_ptsr_t* PTSR = (volatile periph_ptsr_t*) (TWI0_BASE + 0x124); call PDC.setRxPtr((uint32_t*)&temp); call PDC.setTxPtr((uint32_t*)&temp_d); call PDC.setTxCounter(10); call PDC.setRxCounter(10); call PDC.enablePdcRx(); call Draw.fill(COLOR_WHITE); call Leds.led1Toggle(); call Draw.drawInt(180,10,RPR->bits.rxptr,1,COLOR_BLUE); call Draw.drawInt(180,30,(uint32_t)&temp,1,COLOR_RED); call Draw.drawInt(180,50,TPR->bits.txptr,1,COLOR_BLUE); call Draw.drawInt(180,70,(uint32_t)&temp_d,1,COLOR_GREEN); call Draw.drawInt(100,90,RCR->bits.rxctr,1,COLOR_RED); call Draw.drawInt(100,110,TCR->bits.txctr,1,COLOR_RED); call Draw.drawInt(100,130,PTCR->bits.rxten,1,COLOR_RED); call Draw.drawInt(100,150,PTSR->bits.rxten,1,COLOR_RED); /*For testing*/ ADC12B->mr.bits.startup = 104; call Draw.drawInt(100,210,ADC12B->mr.bits.startup,1,COLOR_BLUE); } event void Timer.fired() { post tx(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/pin/000077500000000000000000000000001207233610700175175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/pin/capture/000077500000000000000000000000001207233610700211625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/pin/capture/Makefile000066400000000000000000000001221207233610700226150ustar00rootroot00000000000000COMPONENT=TestCaptureAppC CFLAGS += -I$(TOSDIR)/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/pin/capture/TestCaptureAppC.nc000066400000000000000000000046361207233610700245240ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application that tests the SAM3U Captures. Connect a switch to PA1 * and watch the LCD for rising/falling time measurements. * * @author Thomas Schmid **/ configuration TestCaptureAppC { } implementation { components MainC, TestCaptureC, LedsC, LcdC; TestCaptureC -> MainC.Boot; TestCaptureC.Leds -> LedsC; TestCaptureC.Lcd -> LcdC; TestCaptureC.Draw -> LcdC; components HplSam3uGeneralIOC as GeneralIOC; components HplSam3uTCC; components new GpioCaptureC() as CaptureSFDC; CaptureSFDC.TCCapture -> HplSam3uTCC.TC0Capture; CaptureSFDC.GeneralIO -> GeneralIOC.HplPioA1; TestCaptureC.Capture -> CaptureSFDC; TestCaptureC.SFD -> GeneralIOC.PioA1; components new Alarm32khz32C(); TestCaptureC.InitAlarm -> Alarm32khz32C; TestCaptureC.Alarm32 -> Alarm32khz32C; } tinyos-2.1.2+dfsg/apps/tests/sam3/pin/capture/TestCaptureC.nc000066400000000000000000000073701207233610700240610ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid **/ #include #include module TestCaptureC { uses { interface Leds; interface Boot; interface Lcd; interface Draw; interface GpioCapture as Capture; interface GeneralIO as SFD; interface Init as InitAlarm; interface Alarm as Alarm32; } } implementation { bool falling; uint32_t lastTime; event void Boot.booted() { atomic lastTime = 0; call InitAlarm.init(); call Lcd.initialize(); } event void Lcd.initializeDone(error_t result) { if(result != SUCCESS) { call Leds.led0On(); } else { call Draw.fill(COLOR_WHITE); call Lcd.start(); } } event void Lcd.startDone() { atomic falling = TRUE; call SFD.makeInput(); call Capture.captureRisingEdge(); call Draw.drawString(10, 10, "Rising on PA0", COLOR_BLACK); } async event void Capture.captured(uint16_t time) { uint32_t now = (call Alarm32.getNow() & 0xFFFF0000L) + time; call Draw.fill(COLOR_WHITE); call Leds.led0Toggle(); atomic { if(falling) { call Draw.drawString(10, 10, "Rising at:", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH - 10, 30, now, 1, COLOR_BLACK); call Draw.drawString(10, 50, "Since last:", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH - 10, 70, now-lastTime, 1, COLOR_BLACK); falling = FALSE; call Capture.captureFallingEdge(); } else { call Draw.drawString(10, 10, "Falling at:", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH - 10, 30, now, 1, COLOR_BLACK); call Draw.drawString(10, 50, "Since last:", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH - 10, 70, now-lastTime, 1, COLOR_BLACK); falling = TRUE; call Capture.captureRisingEdge(); } lastTime = now; } } async event void Alarm32.fired() {} } tinyos-2.1.2+dfsg/apps/tests/sam3/pin/interrupt/000077500000000000000000000000001207233610700215535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/pin/interrupt/Makefile000066400000000000000000000000611207233610700232100ustar00rootroot00000000000000COMPONENT=TestInterruptAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/pin/interrupt/TestInterruptAppC.nc000066400000000000000000000043571207233610700255060ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application that tests the SAM3U Interrupts. It toggles LED0 and LED1 * by pushing the "left" and "right" button on the SAM3U EK devkit. * * @author Thomas Schmid **/ configuration TestInterruptAppC { } implementation { components MainC, TestInterruptC, LedsC; TestInterruptC -> MainC.Boot; TestInterruptC.Leds -> LedsC; components HplSam3uGeneralIOC; TestInterruptC.GpioInterruptLeft -> HplSam3uGeneralIOC.InterruptPioA18; TestInterruptC.ButtonLeft -> HplSam3uGeneralIOC.HplPioA18; TestInterruptC.GpioInterruptRight -> HplSam3uGeneralIOC.InterruptPioA19; TestInterruptC.ButtonRight -> HplSam3uGeneralIOC.HplPioA19; } tinyos-2.1.2+dfsg/apps/tests/sam3/pin/interrupt/TestInterruptC.nc000066400000000000000000000047571207233610700250510ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid **/ module TestInterruptC { uses interface Leds; uses interface Boot; uses interface GpioInterrupt as GpioInterruptLeft; uses interface HplSam3uGeneralIOPin as ButtonLeft; uses interface GpioInterrupt as GpioInterruptRight; uses interface HplSam3uGeneralIOPin as ButtonRight; } implementation { event void Boot.booted() { //call ButtonLeft.enablePioControl(); //call ButtonRight.enablePioControl(); // schematic demands that we pull up the pins! call ButtonLeft.enablePullUpResistor(); call ButtonRight.enablePullUpResistor(); call GpioInterruptLeft.enableFallingEdge(); call GpioInterruptRight.enableFallingEdge(); } async event void GpioInterruptLeft.fired() { call Leds.led0Toggle(); } async event void GpioInterruptRight.fired() { call Leds.led1Toggle(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/spi/000077500000000000000000000000001207233610700175245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/spi/Makefile000066400000000000000000000000531207233610700211620ustar00rootroot00000000000000COMPONENT=TestSpiAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/spi/SpiConfigC.nc000066400000000000000000000024361207233610700220370ustar00rootroot00000000000000 module SpiConfigC { provides { interface Init; interface ResourceConfigure; } uses { interface HplSam3SpiChipSelConfig; interface HplSam3SpiConfig; } } implementation { command error_t Init.init() { // configure clock call HplSam3SpiChipSelConfig.setBaud(20); call HplSam3SpiChipSelConfig.setClockPolarity(0); // logic zero is inactive call HplSam3SpiChipSelConfig.setClockPhase(1); // out on rising, in on falling call HplSam3SpiChipSelConfig.disableAutoCS(); // disable automatic rising of CS after each transfer //call HplSam3uSpiChipSelConfig.enableAutoCS(); // if the CS line is not risen automatically after the last tx. The lastxfer bit has to be used. call HplSam3SpiChipSelConfig.enableCSActive(); //call HplSam3uSpiChipSelConfig.disableCSActive(); call HplSam3SpiChipSelConfig.setBitsPerTransfer(SPI_CSR_BITS_8); call HplSam3SpiChipSelConfig.setTxDelay(0); call HplSam3SpiChipSelConfig.setClkDelay(0); return SUCCESS; } async command void ResourceConfigure.configure() { // Do stuff here } async command void ResourceConfigure.unconfigure() { // Do stuff here... } } tinyos-2.1.2+dfsg/apps/tests/sam3/spi/TestSpiAppC.nc000066400000000000000000000043311207233610700222060ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application that tests the SAM3U SPI. * * @author Thomas Schmid **/ configuration TestSpiAppC { } implementation { components MainC, TestSpiC, LedsC; TestSpiC -> MainC.Boot; TestSpiC.Leds -> LedsC; components new Sam3Spi0C() as SpiC; TestSpiC.SpiByte -> SpiC; TestSpiC.SpiPacket -> SpiC; TestSpiC.SpiResource -> SpiC; //components HplSam3uGeneralIOC; //TestSpiC.CSN -> HplSam3uGeneralIOC.PioA16; components SpiConfigC; SpiConfigC.Init <- SpiC; SpiConfigC.ResourceConfigure <- SpiC; SpiConfigC.HplSam3SpiChipSelConfig -> SpiC; components HilSam3SpiC; TestSpiC.SpiConfig -> HilSam3SpiC; } tinyos-2.1.2+dfsg/apps/tests/sam3/spi/TestSpiC.nc000066400000000000000000000061551207233610700215530ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid **/ module TestSpiC { uses interface Leds; uses interface Boot; uses interface SpiByte; uses interface SpiPacket; uses interface HplSam3SpiConfig as SpiConfig; uses interface Resource as SpiResource; } implementation { task void transferPacketTask() { uint8_t tx_buf[10]; uint8_t rx_buf[10]; uint8_t i; for(i=0; i<10; i++) { tx_buf[i] = 0xA0 + i; rx_buf[i] = 0; } call SpiPacket.send(tx_buf, rx_buf, 10); } task void transferTask() { uint8_t byte; byte = call SpiByte.write(0xCD); if(byte == 0xCD) { call Leds.led0Toggle(); } else { call Leds.led1Toggle(); } byte = call SpiByte.write(0xAB); if(byte == 0xAB) { call Leds.led0Toggle(); } else { call Leds.led1Toggle(); } post transferPacketTask(); //post transferTask(); } event void Boot.booted() { call SpiResource.request(); } event void SpiResource.granted() { call SpiConfig.enableLoopBack(); post transferTask(); //post transferPacketTask(); } async event void SpiPacket.sendDone(uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error) { uint8_t i; if(error == SUCCESS) { if(len == 10) { for(i=0; i<10; i++){ if(rx_buf[i] != 0xCD) { call Leds.led1Toggle(); } else { call Leds.led2Toggle(); } } call Leds.led0Toggle(); } } call Leds.led1Toggle(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/timer/000077500000000000000000000000001207233610700200515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/timer/Alarm32khz/000077500000000000000000000000001207233610700217675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/timer/Alarm32khz/Makefile000066400000000000000000000000621207233610700234250ustar00rootroot00000000000000COMPONENT=TestAlarm32khzAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/timer/Alarm32khz/TestAlarm32khzAppC.nc000066400000000000000000000040741207233610700256400ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application that generates an alarm, blinks LEDs, and displays the * current alarm on the LCD. * * @author Thomas Schmid **/ configuration TestAlarm32khzAppC { } implementation { components MainC, TestAlarm32khzP, LedsC; TestAlarm32khzP -> MainC.Boot; TestAlarm32khzP.Leds -> LedsC; components LcdC; TestAlarm32khzP.Lcd -> LcdC; TestAlarm32khzP.Draw -> LcdC; components new Alarm32khz32C() as Alarm32; TestAlarm32khzP.Alarm -> Alarm32; } tinyos-2.1.2+dfsg/apps/tests/sam3/timer/Alarm32khz/TestAlarm32khzP.nc000066400000000000000000000067511207233610700252200ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid **/ #include #include module TestAlarm32khzP { uses { interface Leds; interface Boot; interface Lcd; interface Draw; interface Alarm; } } implementation { uint32_t delta = 32768; event void Boot.booted() { call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { call Leds.led0On(); call Leds.led1On(); call Leds.led2On(); } else { call Draw.fill(COLOR_WHITE); call Lcd.start(); } } event void Lcd.startDone() { uint32_t now = call Alarm.getNow(); call Leds.led0Off(); call Leds.led1Off(); call Leds.led2Off(); call Draw.fill(COLOR_WHITE); call Draw.drawString(10, 10, "AlarmTest:", COLOR_BLACK); call Draw.drawString(10, 50, "Now: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 50, now, 1, COLOR_BLACK); call Draw.drawString(10, 70, "Alarm: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, now+delta, 1, COLOR_BLACK); call Alarm.startAt(now, delta); } async event void Alarm.fired() { uint32_t now = call Alarm.getNow(); call Draw.fill(COLOR_WHITE); call Draw.drawString(10, 10, "AlarmTest:", COLOR_BLACK); call Draw.drawString(10, 50, "Now: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 50, now, 1, COLOR_BLACK); call Draw.drawString(10, 70, "Err: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, now - call Alarm.getAlarm(), 1, COLOR_BLACK); call Draw.drawString(10, 90, "Next: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 90, now+delta, 1, COLOR_BLACK); call Alarm.startAt(now, delta); } } tinyos-2.1.2+dfsg/apps/tests/sam3/timer/AlarmTMicro/000077500000000000000000000000001207233610700222235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/timer/AlarmTMicro/Makefile000066400000000000000000000000631207233610700236620ustar00rootroot00000000000000COMPONENT=TestAlarmTMicroAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/timer/AlarmTMicro/TestAlarmTMicroAppC.nc000066400000000000000000000042531207233610700263270ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic application that generates an alarm, blinks LEDs, and displays the * current alarm on the LCD. * * @author Thomas Schmid **/ configuration TestAlarmTMicroAppC { } implementation { components MainC, TestAlarmTMicroP, LedsC; TestAlarmTMicroP -> MainC.Boot; TestAlarmTMicroP.Leds -> LedsC; components LcdC; TestAlarmTMicroP.Lcd -> LcdC; TestAlarmTMicroP.Draw -> LcdC; components new AlarmTMicro32C() as Alarm32; TestAlarmTMicroP.Alarm -> Alarm32; components HilSam3uTCCounterTMicroC as HilCounter; TestAlarmTMicroP.HilCounter -> HilCounter; } tinyos-2.1.2+dfsg/apps/tests/sam3/timer/AlarmTMicro/TestAlarmTMicroP.nc000066400000000000000000000076531207233610700257120ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid **/ #include #include module TestAlarmTMicroP { uses { interface Leds; interface Boot; interface Lcd; interface Draw; interface Alarm; interface HplSam3uTCChannel as HilCounter; } } implementation { uint32_t delta = 1e6; event void Boot.booted() { call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { call Leds.led0On(); call Leds.led1On(); call Leds.led2On(); } else { call Draw.fill(COLOR_WHITE); call Lcd.start(); } } event void Lcd.startDone() { uint32_t now = call Alarm.getNow(); call Leds.led0Off(); call Leds.led1Off(); call Leds.led2Off(); call Draw.fill(COLOR_WHITE); call Draw.drawString(10, 10, "AlarmTest:", COLOR_BLACK); call Draw.drawString(10, 50, "Now: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 50, now, 1, COLOR_BLACK); call Draw.drawString(10, 70, "Alarm: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, now+delta, 1, COLOR_BLACK); call Draw.drawString(10, 110, "Frequency kHz:", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 130, call HilCounter.getTimerFrequency(), 1, COLOR_BLACK); call Alarm.startAt(now, delta); } async event void Alarm.fired() { uint32_t now = call Alarm.getNow(); call Draw.fill(COLOR_WHITE); call Draw.drawString(10, 10, "AlarmTest:", COLOR_BLACK); call Draw.drawString(10, 50, "Now: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 50, now, 1, COLOR_BLACK); call Draw.drawString(10, 70, "Err: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, now - call Alarm.getAlarm(), 1, COLOR_BLACK); call Draw.drawString(10, 90, "Next: ", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 90, now+delta, 1, COLOR_BLACK); call Draw.drawString(10, 110, "Frequency kHz:", COLOR_BLACK); call Draw.drawInt(BOARD_LCD_WIDTH-20, 130, call HilCounter.getTimerFrequency(), 1, COLOR_BLACK); call Alarm.startAt(now, delta); } async event void HilCounter.overflow() {} } tinyos-2.1.2+dfsg/apps/tests/sam3/twi/000077500000000000000000000000001207233610700175345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/twi/Makefile000066400000000000000000000001751207233610700211770ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/twi/MoteAppC.nc000066400000000000000000000042671207233610700215370ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's TWI with LCD * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, TwiReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> NoLedsC; MoteP.TWI -> TwiReaderC; MoteP.Resource -> TwiReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; MoteP.ResourceConfigure -> TwiReaderC.ResourceConfigure[0]; MoteP.InternalAddr -> TwiReaderC; } tinyos-2.1.2+dfsg/apps/tests/sam3/twi/MoteP.nc000066400000000000000000000121741207233610700211070ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3utwihardware.h" #include #include module MoteP { uses { interface Boot; interface Leds; interface I2CPacket as TWI; interface Resource; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; interface ResourceConfigure; interface Sam3uTwiInternalAddress as InternalAddr; } } implementation { norace error_t resultError; norace uint32_t resultValue; uint8_t temp[4]; uint8_t tempWrite[2];// = 0x60606060; // for 12bit resolution on temp sensor uint16_t tempWriteLimit = 0x4680; event void Boot.booted() { while (call SerialSplitControl.start() != SUCCESS); tempWrite[0] = 0x60;//70; tempWrite[1] = 0x60;//128; call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } task void sample() { const char *start = "Resource Request!"; call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_BLACK); call Resource.request(); } event void Lcd.startDone(){ post sample(); call Timer.startPeriodic(4*1024U); } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); } } event void SerialSplitControl.stopDone(error_t error) {} volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4); volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10); task void read(){ const char *start = "TWI!!"; call Draw.fill(COLOR_GREEN); call Draw.fill(COLOR_WHITE); call Draw.drawString(10,30,start,COLOR_BLACK); call ResourceConfigure.configure(); call InternalAddr.setInternalAddrSize(1); //call InternalAddr.setInternalAddr(1); // 1 byte configuration register call InternalAddr.setInternalAddr(1); // temp Limit register call TWI.write(1, 0x48, 1, (uint8_t*)&tempWrite); call Draw.drawInt(180,50,MMR->bits.dadr,1,COLOR_BLUE); call Draw.drawInt(180,70,MMR->bits.mread,1,COLOR_BLUE); call Draw.drawInt(180,90,CWGR->bits.cldiv,1,COLOR_BLUE); } event void Resource.granted(){ post read(); } task void drawResult(){ const char *fail = "Done error"; const char *good = "Done success"; //call Draw.fill(COLOR_GREEN); if (resultError != SUCCESS) { atomic call Draw.drawString(10,150,fail,COLOR_BLACK); }else{ call Draw.drawString(10,150,good,COLOR_BLACK); call Draw.drawInt(100,170,temp[0],1,COLOR_BLACK); call Draw.drawInt(100,190,temp[1],1,COLOR_BLACK); call Draw.drawInt(100,210,temp[2],1,COLOR_BLACK); call Draw.drawInt(100,230,temp[3],1,COLOR_BLACK); call Draw.drawInt(100,250,resultValue,1,COLOR_BLACK); } } task void callRead(){ call ResourceConfigure.configure(); call InternalAddr.setInternalAddrSize(1); call InternalAddr.setInternalAddr(0); // 2 byte temperature register call TWI.read(1, 0x48, 2, (uint8_t*)temp); } async event void TWI.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){ resultError = error; resultValue = length; post drawResult(); post callRead(); } async event void TWI.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { resultError = error; resultValue = *data; post drawResult(); } event void Timer.fired() { post read(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/twi/TwiReaderC.nc000066400000000000000000000041771207233610700220600ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration TwiReaderC { provides interface I2CPacket; provides interface Resource; provides interface ResourceConfigure[uint8_t id]; provides interface Sam3uTwiInternalAddress; } implementation { components Sam3uTwiC as TwiC; components TwiReaderP; I2CPacket = TwiC.TwiBasicAddr0; Resource = TwiC; ResourceConfigure = TwiC.Configure0; Sam3uTwiInternalAddress = TwiC.InternalAddress0; TwiC.TwiConfig0 -> TwiReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/twi/TwiReaderP.nc000066400000000000000000000037441207233610700220740ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3utwihardware.h" module TwiReaderP { provides interface Sam3uTwiConfigure; } implementation { const sam3u_twi_union_config_t config = { cldiv: 59, chdiv: 59, ckdiv: 3 }; async command const sam3u_twi_union_config_t* Sam3uTwiConfigure.getConfig(){ return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/twi_pdc/000077500000000000000000000000001207233610700203625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/twi_pdc/Makefile000066400000000000000000000002271207233610700220230ustar00rootroot00000000000000COMPONENT=MoteAppC CFLAGS += -DTOSH_DATA_LENGTH=114 CFLAGS += -DTFRAME_ENABLED CFLAGS += -DSAM3U_TWI_PDC CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/twi_pdc/MoteAppC.nc000066400000000000000000000042651207233610700223630ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's TWI with LCD * @author JeongGil Ko */ configuration MoteAppC {} implementation { components MainC, LedsC, NoLedsC, new TimerMilliC() as TimerC, SerialActiveMessageC, TwiReaderC, LcdC, MoteP; MoteP.Boot -> MainC; MoteP.Leds -> LedsC; MoteP.TWI -> TwiReaderC; MoteP.Resource -> TwiReaderC; MoteP.SerialSplitControl -> SerialActiveMessageC; MoteP.Packet -> SerialActiveMessageC; MoteP.Timer -> TimerC; MoteP.Lcd -> LcdC; MoteP.Draw -> LcdC; MoteP.ResourceConfigure -> TwiReaderC.ResourceConfigure[0]; MoteP.InternalAddr -> TwiReaderC; } tinyos-2.1.2+dfsg/apps/tests/sam3/twi_pdc/MoteP.nc000066400000000000000000000200551207233610700217320ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3utwihardware.h" #include #include module MoteP { uses { interface Boot; interface Leds; interface I2CPacket as TWI; interface Resource; interface SplitControl as SerialSplitControl; interface Packet; interface Timer; interface Lcd; interface Draw; interface ResourceConfigure; interface Sam3uTwiInternalAddress as InternalAddr; } } implementation { norace uint8_t resultError; norace uint32_t resultValue; uint8_t rx_len,tx_len; uint8_t temp[4]; uint8_t tempWrite[2];// = 0x60606060; // for 12bit resolution on temp sensor uint16_t tempWriteLimit = 0x4680; event void Boot.booted() { while (call SerialSplitControl.start() != SUCCESS); tempWrite[0] = 0x60;//70; tempWrite[1] = 0x60;//128; call Lcd.initialize(); } event void Lcd.initializeDone(error_t err) { if(err != SUCCESS) { } else { call Draw.fill(COLOR_RED); call Lcd.start(); } } task void sample() { const char *start = "Resource Request!"; call Draw.fill(COLOR_BLUE); call Draw.drawString(10,50,start,COLOR_BLACK); call Resource.request(); } event void Lcd.startDone(){ post sample(); call Timer.startPeriodic(2*1024U); } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); } } event void SerialSplitControl.stopDone(error_t error) {} volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4); volatile twi_sr_t* SR = (volatile twi_sr_t *) (TWI0_BASE_ADDR + 0x20); volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10); volatile periph_ptsr_t* PTSR = (volatile periph_ptsr_t *) (0x40084000 + 0x124); volatile periph_rpr_t* RPR = (volatile periph_rpr_t *) (0x40084000 + 0x100); volatile periph_rcr_t* RCR = (volatile periph_rcr_t *) (0x40084000 + 0x104); volatile periph_tcr_t* TCR = (volatile periph_tcr_t *) (0x40084000 + 0x10C); uint8_t count = 0; task void read(){ call Draw.fill(COLOR_WHITE); call Draw.drawInt(100,10,SR->bits.txcomp,1,COLOR_BLUE); call Draw.drawInt(100,30,SR->bits.rxrdy,1,COLOR_RED); call Draw.drawInt(100,50,SR->bits.txrdy,1,COLOR_BLUE); call Draw.drawInt(100,70,SR->bits.svread,1,COLOR_BLUE); call Draw.drawInt(100,90,SR->bits.svacc,1,COLOR_BLUE); call Draw.drawInt(100,110,SR->bits.gacc,1,COLOR_BLUE); call Draw.drawInt(100,130,SR->bits.ovre,1,COLOR_BLUE); call Draw.drawInt(100,150,SR->bits.nack,1,COLOR_BLUE); call Draw.drawInt(100,170,SR->bits.arblst,1,COLOR_BLUE); call Draw.drawInt(100,190,SR->bits.sclws,1,COLOR_BLUE); call Draw.drawInt(100,210,SR->bits.eosacc,1,COLOR_BLUE); call Draw.drawInt(100,230,SR->bits.endrx,1,COLOR_BLACK); call Draw.drawInt(100,250,SR->bits.endtx,1,COLOR_BLUE); call Draw.drawInt(100,270,SR->bits.rxbuff,1,COLOR_BLUE); call Draw.drawInt(100,290,SR->bits.txbufe,1,COLOR_BLUE); count++; call ResourceConfigure.configure(); call InternalAddr.setInternalAddrSize(1); call InternalAddr.setInternalAddr(1); // sensor config register call TWI.write(1, 0x48, 1, (uint8_t*)&tempWrite); call Draw.drawInt(140,230,TCR->bits.txctr,1,COLOR_BLUE); call Draw.drawInt(140,250,SR->bits.endtx,1,COLOR_BLUE); call Draw.drawInt(140,270,SR->bits.txbufe,1,COLOR_BLUE); /* call Draw.drawInt(180,70,MMR->bits.dadr,1,COLOR_BLUE); call Draw.drawInt(180,90,MMR->bits.mread,1,COLOR_BLUE); call Draw.drawInt(180,110,CWGR->bits.cldiv,1,COLOR_BLUE); call Draw.drawInt(180,130,PTSR->bits.rxten,1,COLOR_BLUE); call Draw.drawInt(180,150,RPR->bits.rxptr,1,COLOR_BLUE); call Draw.drawInt(180,170,RCR->bits.rxctr,1,COLOR_BLUE); call Draw.drawInt(180,230,SR->bits.endrx,1,COLOR_BLUE); call Draw.drawInt(100,250,temp[0],1,COLOR_BLACK); call Draw.drawInt(100,270,temp[1],1,COLOR_BLACK); */ } event void Resource.granted(){ post read(); } task void drawResult(){ const char *fail = "Done error"; //call Draw.fill(COLOR_GREEN); if (0/*resultError != SUCCESS*/) { atomic call Draw.drawString(10,70,fail,COLOR_BLACK); }else{ call Draw.drawInt(180,10,SR->bits.txcomp,1,COLOR_BLUE); call Draw.drawInt(180,30,SR->bits.rxrdy,1,COLOR_RED); call Draw.drawInt(180,50,SR->bits.txrdy,1,COLOR_BLUE); call Draw.drawInt(180,70,SR->bits.svread,1,COLOR_BLUE); call Draw.drawInt(180,90,SR->bits.svacc,1,COLOR_BLUE); call Draw.drawInt(180,110,SR->bits.gacc,1,COLOR_BLUE); call Draw.drawInt(180,130,SR->bits.ovre,1,COLOR_BLUE); call Draw.drawInt(180,150,SR->bits.nack,1,COLOR_BLUE); call Draw.drawInt(180,170,SR->bits.arblst,1,COLOR_BLUE); call Draw.drawInt(180,190,SR->bits.sclws,1,COLOR_BLUE); call Draw.drawInt(180,210,SR->bits.eosacc,1,COLOR_BLUE); call Draw.drawInt(180,230,SR->bits.endrx,1,COLOR_BLACK); call Draw.drawInt(180,250,SR->bits.endtx,1,COLOR_BLUE); call Draw.drawInt(180,270,SR->bits.rxbuff,1,COLOR_BLUE); call Draw.drawInt(180,290,SR->bits.txbufe,1,COLOR_BLUE); call Draw.drawInt(140,170,TCR->bits.txctr,1,COLOR_RED); call Draw.drawInt(140,190,PTSR->bits.txten,1,COLOR_BLACK); call Draw.drawInt(30,180,resultValue,1,COLOR_DARKCYAN); call Draw.drawInt(30,200,resultError,1,COLOR_DARKCYAN); //call Draw.drawInt(30,100,temp[0],1,COLOR_BLACK); //call Draw.drawInt(30,120,temp[1],1,COLOR_BLACK); } } task void readread(){ call Draw.drawInt(30,80,rx_len,1,COLOR_DARKGREEN); call Draw.drawInt(30,100,temp[0],1,COLOR_DARKGREEN); call Draw.drawInt(30,120,temp[1],1,COLOR_DARKGREEN); call Draw.drawInt(30,140,temp[2],1,COLOR_DARKGREEN); call Draw.drawInt(30,160,temp[3],1,COLOR_DARKGREEN); } task void callRead(){ call ResourceConfigure.configure(); call InternalAddr.setInternalAddrSize(1); call InternalAddr.setInternalAddr(0); // 2 byte temperature register call TWI.read(1, 0x48, 2, (uint8_t*)temp); } async event void TWI.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){ resultError = error; resultValue = length; post drawResult(); post callRead(); } async event void TWI.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { //resultError = error; //resultValue = *data; //post drawResult(); rx_len=length; post readread(); } event void Timer.fired() { post read(); } } tinyos-2.1.2+dfsg/apps/tests/sam3/twi_pdc/TwiReaderC.nc000066400000000000000000000041771207233610700227060ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ configuration TwiReaderC { provides interface I2CPacket; provides interface Resource; provides interface ResourceConfigure[uint8_t id]; provides interface Sam3uTwiInternalAddress; } implementation { components Sam3uTwiC as TwiC; components TwiReaderP; I2CPacket = TwiC.TwiBasicAddr0; Resource = TwiC; ResourceConfigure = TwiC.Configure0; Sam3uTwiInternalAddress = TwiC.InternalAddress0; TwiC.TwiConfig0 -> TwiReaderP; } tinyos-2.1.2+dfsg/apps/tests/sam3/twi_pdc/TwiReaderP.nc000066400000000000000000000037441207233610700227220ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC * @author JeongGil Ko */ #include "sam3utwihardware.h" module TwiReaderP { provides interface Sam3uTwiConfigure; } implementation { const sam3u_twi_union_config_t config = { cldiv: 59, chdiv: 59, ckdiv: 3 }; async command const sam3u_twi_union_config_t* Sam3uTwiConfigure.getConfig(){ return &config; } } tinyos-2.1.2+dfsg/apps/tests/sam3/usb/000077500000000000000000000000001207233610700175225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/sam3/usb/Makefile000066400000000000000000000000511207233610700211560ustar00rootroot00000000000000COMPONENT=MoteAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/sam3/usb/MoteAppC.nc000066400000000000000000000043161207233610700215200ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's UDPHS HPL interface * @author Kevin Klues */ configuration MoteAppC {} implementation { components MainC; components MoteP; components Sam3uUsbSerialP; components HplNVICC; components HplSam3uClockC; components LedsC; MainC.SoftwareInit -> Sam3uUsbSerialP; Sam3uUsbSerialP.UDPHSInterrupt -> HplNVICC.MCI0Interrupt; Sam3uUsbSerialP.UDPHSClockControl -> HplSam3uClockC.UDPHSPPCntl; MoteP.Boot -> MainC; MoteP.StdControl -> Sam3uUsbSerialP; MoteP.UartStream -> Sam3uUsbSerialP; MoteP.Leds -> LedsC; components McuSleepC; Sam3uUsbSerialP.UdphsInterruptWrapper -> McuSleepC; } tinyos-2.1.2+dfsg/apps/tests/sam3/usb/MoteP.nc000066400000000000000000000052651207233610700211000ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple test program for SAM3U's UDPHS HPL interface * @author Kevin Klues */ //#include //#include module MoteP { uses { interface Boot; interface StdControl; interface UartStream; interface Leds; } } implementation { #define READBUFFERSIZE 64 #define WRITEBUFFERSIZE 100 int i=0; uint8_t readBuffer[READBUFFERSIZE]; uint8_t writeBuffer[WRITEBUFFERSIZE]; event void Boot.booted() { // Start it up! call StdControl.start(); for(i=0; i.xml file in this directory describing the a 256kB volume named BLOCKTEST for your flash chip. The mote id is of the form T*100 + k, where k is a random seed and T specifies the test to be performed: T = 0: perform a full test T = 2: read a previously written block with the same seed T = 3: write a block with the given seed For example, install with an id of 310 to write some data to the flash, then with an id of 210 to check that the data is correct. Or install with an id of 10 to do a combined write+read test. A successful test will blink LED 2 a few times, then turn on LED 1. A failed test will turn on LED 0. A serial message whose last byte is 0x80 for success and all other values indicate failure is also sent at the end of the test. Tools: Known bugs/limitations: None. $Id: README.txt,v 1.5 2007-02-09 21:30:29 idgay Exp $ tinyos-2.1.2+dfsg/apps/tests/storage/Block/RandRWAppC.nc000066400000000000000000000017751207233610700230210ustar00rootroot00000000000000/* $Id: RandRWAppC.nc,v 1.5 2008-06-25 01:29:44 konradlorincz Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Block storage test application. Does a pattern of random reads and * writes, based on mote id. See README.txt for more details. * * @author David Gay */ #include "StorageVolumes.h" configuration RandRWAppC { } implementation { components RandRWC, new BlockStorageC(VOLUME_BLOCKTEST), MainC, LedsC, PlatformC, SerialActiveMessageC; MainC.Boot <- RandRWC; RandRWC.SerialControl -> SerialActiveMessageC; RandRWC.AMSend -> SerialActiveMessageC.AMSend[139]; RandRWC.BlockRead -> BlockStorageC.BlockRead; RandRWC.BlockWrite -> BlockStorageC.BlockWrite; RandRWC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/storage/Block/RandRWC.nc000066400000000000000000000110411207233610700223430ustar00rootroot00000000000000/* $Id: RandRWC.nc,v 1.6 2008-06-25 01:29:44 konradlorincz Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Block storage test application. Does a pattern of random reads and * writes, based on mote id. See README.txt for more details. * * @author David Gay */ module RandRWC { uses { interface Boot; interface Leds; interface BlockRead; interface BlockWrite; interface AMSend; interface SplitControl as SerialControl; } } implementation { enum { SIZE = 1024L * 256, NWRITES = SIZE / 4096, }; uint16_t shiftReg; uint16_t initSeed; uint16_t mask; /* Return the next 16 bit random number */ uint16_t rand() { bool endbit; uint16_t tmpShiftReg; tmpShiftReg = shiftReg; endbit = ((tmpShiftReg & 0x8000) != 0); tmpShiftReg <<= 1; if (endbit) tmpShiftReg ^= 0x100b; tmpShiftReg++; shiftReg = tmpShiftReg; tmpShiftReg = tmpShiftReg ^ mask; return tmpShiftReg; } void resetSeed() { shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1); initSeed = shiftReg; mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1); } uint8_t data[512], rdata[512]; int count, testCount; uint32_t addr, len; uint16_t offset; message_t reportMsg; void done(); void report(error_t e) { uint8_t *msg = call AMSend.getPayload(&reportMsg, 1); msg[0] = e; if (call AMSend.send(AM_BROADCAST_ADDR, &reportMsg, 1) != SUCCESS) call Leds.led0On(); } event void AMSend.sendDone(message_t* msg, error_t error) { if (error != SUCCESS) call Leds.led0On(); } void fail(error_t e) { call Leds.led0On(); report(e); } void success() { call Leds.led1On(); report(0x80); } bool scheck(error_t r) __attribute__((noinline)) { if (r != SUCCESS) fail(r); return r == SUCCESS; } bool bcheck(bool b) { if (!b) fail(FAIL); return b; } void setParameters() { addr = (uint32_t)count << 12 | (rand() >> 6); len = rand() >> 7; if (addr + len > SIZE) addr = SIZE - len; offset = rand() >> 8; if (offset + len > sizeof data) offset = sizeof data - len; } event void Boot.booted() { call SerialControl.start(); } event void SerialControl.stopDone(error_t e) { } event void SerialControl.startDone(error_t e) { int i; if (e != SUCCESS) { call Leds.led0On(); return; } resetSeed(); for (i = 0; i < sizeof data; i++) data[i++] = rand() >> 8; done(); } void nextRead() { if (++count == NWRITES) done(); else { setParameters(); scheck(call BlockRead.read(addr, rdata, len)); } } void nextWrite() { if (++count == NWRITES) { call Leds.led2Toggle(); scheck(call BlockWrite.sync()); } else { setParameters(); scheck(call BlockWrite.write(addr, data + offset, len)); } } event void BlockWrite.writeDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { if (scheck(result)) nextWrite(); } event void BlockWrite.eraseDone(error_t result) { if (scheck(result)) { call Leds.led2Toggle(); nextWrite(); } } event void BlockWrite.syncDone(error_t result) { if (scheck(result)) done(); } event void BlockRead.readDone(storage_addr_t x, void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) { if (scheck(result) && bcheck(x == addr && rlen == len && buf == rdata && memcmp(data + offset, rdata, rlen) == 0)) nextRead(); } event void BlockRead.computeCrcDone(storage_addr_t x, storage_len_t y, uint16_t z, error_t result) { } enum { A_READ = 2, A_WRITE }; void doAction(int act) { count = 0; resetSeed(); switch (act) { case A_WRITE: scheck(call BlockWrite.erase()); break; case A_READ: nextRead(); break; } } const uint8_t actions[] = { A_WRITE, A_READ }; void done() { uint8_t act = TOS_NODE_ID / 100; call Leds.led2Toggle(); switch (act) { case 0: if (testCount < sizeof actions) doAction(actions[testCount]); else success(); break; case A_READ: case A_WRITE: if (testCount) success(); else doAction(act); break; default: fail(FAIL); break; } testCount++; } } tinyos-2.1.2+dfsg/apps/tests/storage/Block/volumes-at45db.xml000066400000000000000000000001121207233610700240530ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/Block/volumes-pxa27xp30.xml000066400000000000000000000001131207233610700244450ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/Block/volumes-stm25p.xml000066400000000000000000000001121207233610700241220ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/CircularLog/000077500000000000000000000000001207233610700217405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/storage/CircularLog/Makefile000066400000000000000000000000521207233610700233750ustar00rootroot00000000000000COMPONENT=RandRWAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/storage/CircularLog/README.txt000066400000000000000000000025511207233610700234410ustar00rootroot00000000000000README for CircularLog Author/Contact: tinyos-help@millennium.berkeley.edu Description: Application to test the LogStorageC abstraction, using the log in circular mode. There must be a volumes-.xml file in this directory describing the a 256kB volume named LOGTEST for your flash chip. The mote id is of the form T*100 + k, where k is a random seed and T specifies the test to be performed: T = 0: perform a full test T = 1: erase the log T = 2: read the log T = 3: write some data to the log The write test writes a random sequence of 4095 32-byte records chosen from a set of 16 possible records. The read test checks that the log contains that all records in the log are one of the 16 possible records. The valid records depend on the seed. Running 2 write tests will fill the log, and the third one will wrap around. So for instance, you could run the test with id = 117 (erase), then 317 three times (fill the log and wrap around), then 217 to check that the log is valid. Or just run it with id = 17 to perform a full test. A successful test will turn on LED 1. A failed test will turn on the LED 0. LED 1 is turned on after erase is complete. A serial message whose last byte is 0x80 for success and all other values indicate failure is also sent at the end of the test. Tools: Known bugs/limitations: None. $Id: README.txt,v 1.5 2007-07-09 20:45:54 idgay Exp $ tinyos-2.1.2+dfsg/apps/tests/storage/CircularLog/RandRWAppC.nc000066400000000000000000000017631207233610700241720ustar00rootroot00000000000000/* $Id: RandRWAppC.nc,v 1.5 2008-06-25 01:29:44 konradlorincz Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Block storage test application. Does a pattern of random reads and * writes, based on mote id. See README.txt for more details. * * @author David Gay */ #include "StorageVolumes.h" configuration RandRWAppC { } implementation { components RandRWC, new LogStorageC(VOLUME_LOGTEST, TRUE), MainC, LedsC, PlatformC, SerialActiveMessageC; MainC.Boot <- RandRWC; RandRWC.SerialControl -> SerialActiveMessageC; RandRWC.AMSend -> SerialActiveMessageC.AMSend[139]; RandRWC.LogRead -> LogStorageC.LogRead; RandRWC.LogWrite -> LogStorageC.LogWrite; RandRWC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/storage/CircularLog/RandRWC.nc000066400000000000000000000107051207233610700235250ustar00rootroot00000000000000/* $Id: RandRWC.nc,v 1.6 2008-06-25 01:29:44 konradlorincz Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Log storage test application. Does a pattern of random reads and * writes, based on mote id. See README.txt for more details. * * @author David Gay */ module RandRWC { uses { interface Boot; interface Leds; interface LogRead; interface LogWrite; interface AMSend; interface SplitControl as SerialControl; } } implementation { enum { SIZE = 1024L * 256, RECSIZE = 32, NRECS = 16, NWRITES = SIZE / (2 * RECSIZE), }; uint16_t shiftReg; uint16_t initSeed; uint16_t mask; void done(); /* Return the next 16 bit random number */ uint16_t rand() { bool endbit; uint16_t tmpShiftReg; tmpShiftReg = shiftReg; endbit = ((tmpShiftReg & 0x8000) != 0); tmpShiftReg <<= 1; if (endbit) tmpShiftReg ^= 0x100b; tmpShiftReg++; shiftReg = tmpShiftReg; tmpShiftReg = tmpShiftReg ^ mask; return tmpShiftReg; } void resetSeed() { shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1); initSeed = shiftReg; mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1); } uint8_t data[NRECS * RECSIZE], rdata[RECSIZE]; int count, testCount; message_t reportMsg; void report(error_t e) { uint8_t *msg = call AMSend.getPayload(&reportMsg, 1); msg[0] = e; if (call AMSend.send(AM_BROADCAST_ADDR, &reportMsg, 1) != SUCCESS) call Leds.led0On(); } event void AMSend.sendDone(message_t* msg, error_t error) { if (error != SUCCESS) call Leds.led0On(); } void fail(error_t e) { call Leds.led0On(); report(e); } void success() { call Leds.led1On(); report(0x80); } bool scheck(error_t r) __attribute__((noinline)) { if (r != SUCCESS) fail(r); return r == SUCCESS; } bool bcheck(bool b) { if (!b) fail(FAIL); return b; } void nextRead() { scheck(call LogRead.read(rdata, RECSIZE)); } event void LogRead.readDone(void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) { if (rlen == 0) done(); else if (scheck(result) && bcheck(rlen == RECSIZE && buf == rdata)) { int i; /* It must be one of our possible records */ for (i = 0; i < sizeof data; i += RECSIZE) if (memcmp(buf, data + i, RECSIZE) == 0) { nextRead(); return; } bcheck(FALSE); } } event void LogRead.seekDone(error_t error) { } void nextWrite() { if (count++ == NWRITES) scheck(call LogWrite.sync()); else { int offset = ((rand() >> 8) % NRECS) * RECSIZE; scheck(call LogWrite.append(data + offset, RECSIZE)); } } event void LogWrite.appendDone(void *buf, storage_len_t y, bool recordsLost, error_t result) { if (scheck(result)) nextWrite(); } event void LogWrite.eraseDone(error_t result) { if (scheck(result)) done(); } event void LogWrite.syncDone(error_t result) { if (scheck(result)) done(); } event void Boot.booted() { int i; resetSeed(); for (i = 0; i < sizeof data; i++) data[i++] = rand() >> 8; call SerialControl.start(); } event void SerialControl.stopDone(error_t e) { } event void SerialControl.startDone(error_t e) { if (e != SUCCESS) { call Leds.led0On(); return; } testCount = 0; done(); } enum { A_ERASE = 1, A_READ, A_WRITE }; void doAction(int act) { switch (act) { case A_ERASE: scheck(call LogWrite.erase()); break; case A_WRITE: resetSeed(); count = 0; nextWrite(); break; case A_READ: resetSeed(); count = 0; nextRead(); break; } } const uint8_t actions[] = { A_ERASE, A_READ, A_WRITE, A_READ, A_WRITE, A_WRITE, A_WRITE, A_READ, }; void done() { uint8_t act = TOS_NODE_ID / 100; call Leds.led2Toggle(); switch (act) { case 0: if (testCount < sizeof actions) doAction(actions[testCount]); else success(); break; case A_ERASE: case A_READ: case A_WRITE: if (testCount) success(); else doAction(act); break; default: fail(FAIL); break; } testCount++; } } tinyos-2.1.2+dfsg/apps/tests/storage/CircularLog/volumes-at45db.xml000066400000000000000000000001101207233610700252250ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/CircularLog/volumes-pxa27xp30.xml000066400000000000000000000001111207233610700256170ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/CircularLog/volumes-stm25p.xml000066400000000000000000000001111207233610700252750ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/Config/000077500000000000000000000000001207233610700207375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/storage/Config/Makefile000066400000000000000000000000521207233610700223740ustar00rootroot00000000000000COMPONENT=RandRWAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/storage/Config/README.txt000066400000000000000000000015751207233610700224450ustar00rootroot00000000000000README for Config Author/Contact: tinyos-help@millennium.berkeley.edu Description: Application to test the ConfigStorageC abstraction. There must be a volumes-.xml file in this directory describing the a volume named CONFIGTEST capable of storing 2kB of config data. The mote id is of the form T*100 + k, where k is a random seed and T specifies the test to be performed: T = 0: do a bunch of writes, reads and commits T != 0: check if the contents of the volume are consistent with a previous run with T = 0 and the same random seed A successful test will turn on LED 1. A failed test will turn on the LED 0. LED 2 blinks to indicate test progress. A serial message whose last byte is 0x80 for success and all other values indicate failure is also sent at the end of the test. Tools: Known bugs/limitations: None. $Id: README.txt,v 1.5 2007-07-09 20:45:54 idgay Exp $ tinyos-2.1.2+dfsg/apps/tests/storage/Config/RandRWAppC.nc000066400000000000000000000020051207233610700231570ustar00rootroot00000000000000/* $Id: RandRWAppC.nc,v 1.5 2008-06-25 01:29:44 konradlorincz Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Block storage test application. Does a pattern of random reads and * writes, based on mote id. See README.txt for more details. * * @author David Gay */ #include "StorageVolumes.h" configuration RandRWAppC { } implementation { components RandRWC, new ConfigStorageC(VOLUME_CONFIGTEST), MainC, LedsC, PlatformC, SerialActiveMessageC; MainC.Boot <- RandRWC; RandRWC.SerialControl -> SerialActiveMessageC; RandRWC.AMSend -> SerialActiveMessageC.AMSend[139]; RandRWC.ConfigStorage -> ConfigStorageC.ConfigStorage; RandRWC.ConfigMount -> ConfigStorageC.Mount; RandRWC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/storage/Config/RandRWC.nc000066400000000000000000000131501207233610700225210ustar00rootroot00000000000000/* $Id: RandRWC.nc,v 1.8 2008-06-25 01:29:44 konradlorincz Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Config storage test application. Does a pattern of random reads and * writes, based on mote id. See README.txt for more details. * * @author David Gay */ module RandRWC @safe() { uses { interface Boot; interface Leds; interface ConfigStorage; interface AMSend; interface SplitControl as SerialControl; interface Mount as ConfigMount; } } implementation { enum { SIZE = 2048, NWRITES = 100, }; uint16_t shiftReg; uint16_t initSeed; uint16_t mask; uint8_t data[512], rdata[512]; int count, testCount, writeCount, countAtCommit; struct { uint32_t addr; void *COUNT_NOK(len) data; uint16_t len; } ops[NWRITES]; message_t reportMsg; void done(); /* Return the next 16 bit random number */ uint16_t rand() { bool endbit; uint16_t tmpShiftReg; tmpShiftReg = shiftReg; endbit = ((tmpShiftReg & 0x8000) != 0); tmpShiftReg <<= 1; if (endbit) tmpShiftReg ^= 0x100b; tmpShiftReg++; shiftReg = tmpShiftReg; tmpShiftReg = tmpShiftReg ^ mask; return tmpShiftReg; } void resetSeed(int offset) { shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1 + offset); initSeed = shiftReg; mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1 + offset); } void report(error_t e) { uint8_t *msg = call AMSend.getPayload(&reportMsg, 1); msg[0] = e; if (call AMSend.send(AM_BROADCAST_ADDR, &reportMsg, 1) != SUCCESS) call Leds.led0On(); } event void AMSend.sendDone(message_t* msg, error_t error) { if (error != SUCCESS) call Leds.led0On(); } void fail(error_t e) { call Leds.led0On(); report(e); } void success() { call Leds.led1On(); report(0x80); } bool scheck(error_t r) __attribute__((noinline)) { if (r != SUCCESS) fail(r); return r == SUCCESS; } bool bcheck(bool b) { if (!b) fail(FAIL); return b; } void setupOps(int wcount) { int i; uint16_t offset; count = 0; resetSeed(wcount); for (i = 0; i < NWRITES; i++) { uint16_t addr = rand() & (SIZE - 1); uint16_t len = rand() >> 7; if (addr + len > SIZE) addr = SIZE - len; ops[i].addr = addr; ops[i].data = NULL; ops[i].len = len; offset = rand() >> 8; if (offset + ops[i].len > sizeof data) offset = sizeof data - ops[i].len; ops[i].data = data + offset; } } int overlap(int a, int b) { return ops[a].addr >= ops[b].addr && ops[a].addr < ops[b].addr + ops[b].len; } int overwritten(int c) { int i; /* True if write c is overwritten by a later write */ for (i = c + 1; i < NWRITES; i++) if (overlap(i, c) || overlap(c, i)) return TRUE; return FALSE; } void nextRead() { int c = count++; if (c == NWRITES) done(); else scheck(call ConfigStorage.read(ops[c].addr, rdata, ops[c].len)); } event void ConfigStorage.readDone(storage_addr_t x, void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) { int c = count - 1; if (scheck(result) && bcheck(x == ops[c].addr && rlen == ops[c].len && buf == rdata) && bcheck(overwritten(c) || memcmp(ops[c].data, rdata, rlen) == 0)) nextRead(); } void nextWrite() { int c = count++; if (c == NWRITES) done(); else scheck(call ConfigStorage.write(ops[c].addr, ops[c].data, ops[c].len)); } event void ConfigStorage.writeDone(storage_addr_t x, void *buf, storage_len_t y, error_t result) { int c = count - 1; if (scheck(result) && bcheck(x == ops[c].addr && y == ops[c].len && buf == ops[c].data)) nextWrite(); } event void ConfigStorage.commitDone(error_t result) { if (scheck(result)) done(); } event void Boot.booted() { int i; resetSeed(0); for (i = 0; i < sizeof data; i++) data[i++] = rand() >> 8; call SerialControl.start(); } event void SerialControl.startDone(error_t e) { if (e != SUCCESS) { call Leds.led0On(); return; } scheck(call ConfigMount.mount()); } event void ConfigMount.mountDone(error_t e) { if (e != SUCCESS) fail(e); else done(); } enum { A_COMMIT, A_READ, A_WRITE }; void doAction(int act) { switch (act) { case A_COMMIT: countAtCommit = writeCount; scheck(call ConfigStorage.commit()); break; case A_WRITE: setupOps(++writeCount); nextWrite(); break; case A_READ: setupOps(countAtCommit); nextRead(); break; } } const uint8_t actions[] = { A_WRITE, A_COMMIT, A_READ, A_WRITE, A_COMMIT, A_READ, A_WRITE, A_READ }; void done() { uint8_t act = TOS_NODE_ID / 100; call Leds.led2Toggle(); switch (act) { case 0: if (testCount < sizeof actions) doAction(actions[testCount]); else success(); break; default: if (testCount) success(); else { uint8_t i, nwrites = 0; /* Figure out countAtCommit */ for (i = 0; i < sizeof actions; i++) switch (actions[i]) { case A_WRITE: nwrites++; break; case A_COMMIT: countAtCommit = nwrites; break; } /* And check we have the right data */ doAction(A_READ); } break; } testCount++; } event void SerialControl.stopDone(error_t e) { } } tinyos-2.1.2+dfsg/apps/tests/storage/Config/volumes-at45db.xml000066400000000000000000000001621207233610700242330ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/Config/volumes-pxa27xp30.xml000066400000000000000000000001141207233610700246210ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/Config/volumes-stm25p.xml000066400000000000000000000001641207233610700243040ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/Log/000077500000000000000000000000001207233610700202535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/storage/Log/Makefile000066400000000000000000000000521207233610700217100ustar00rootroot00000000000000COMPONENT=RandRWAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/storage/Log/README.txt000066400000000000000000000025571207233610700217620ustar00rootroot00000000000000README for Log Author/Contact: tinyos-help@millennium.berkeley.edu Description: Application to test the LogStorageC abstraction, using the log in linear mode. There must be a volumes-.xml file in this directory describing a 256kB volume named LOGTEST for your flash chip. The mote id is of the form T*100 + k, where k is a random seed and T specifies the test to be performed: T = 0: perform a full test T = 1: erase the log T = 2: read the log T = 3: write some data to the log The read test expects to see one or more consecutive results of the data written by the write test (with the same seed). The last write data can be partial. So, for instance, you could run the test with mote id = 104, then 304 twice to erase the log and write 2 copies of the data sequence for k = 4, then run with mote id = 204 to test all these writes. Or you can just run the test with mote id = 4 to do a complete test. If the log fills up (which should take 4 or 5 write operations), the write will fail, but a subsequent read will succeed. A successful test will turn on the LED 1. A failed test will turn on the LED 0. LED 1 blinks during the steps of the full test. A serial message whose last byte is 0x80 for success and all other values indicate failure is also sent at the end of the test. Tools: Known bugs/limitations: None. $Id: README.txt,v 1.5 2007-07-09 20:45:54 idgay Exp $ tinyos-2.1.2+dfsg/apps/tests/storage/Log/RandRWAppC.nc000066400000000000000000000017641207233610700225060ustar00rootroot00000000000000/* $Id: RandRWAppC.nc,v 1.5 2008-06-25 01:29:44 konradlorincz Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Block storage test application. Does a pattern of random reads and * writes, based on mote id. See README.txt for more details. * * @author David Gay */ #include "StorageVolumes.h" configuration RandRWAppC { } implementation { components RandRWC, new LogStorageC(VOLUME_LOGTEST, FALSE), MainC, LedsC, PlatformC, SerialActiveMessageC; MainC.Boot <- RandRWC; RandRWC.SerialControl -> SerialActiveMessageC; RandRWC.AMSend -> SerialActiveMessageC.AMSend[139]; RandRWC.LogRead -> LogStorageC.LogRead; RandRWC.LogWrite -> LogStorageC.LogWrite; RandRWC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/storage/Log/RandRWC.nc000066400000000000000000000115141207233610700220370ustar00rootroot00000000000000/* $Id: RandRWC.nc,v 1.8 2010-02-10 19:13:06 scipio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Log storage test application. Does a pattern of random reads and * writes, based on mote id. See README.txt for more details. * * @author David Gay */ module RandRWC { uses { interface Boot; interface Leds; interface LogRead; interface LogWrite; interface AMSend; interface SplitControl as SerialControl; } } implementation { enum { SIZE = 1024L * 256, NWRITES = SIZE / 512, }; uint16_t shiftReg; uint16_t initSeed; uint16_t mask; void done(); /* Return the next 16 bit random number */ uint16_t rand() { bool endbit; uint16_t tmpShiftReg; tmpShiftReg = shiftReg; endbit = ((tmpShiftReg & 0x8000) != 0); tmpShiftReg <<= 1; if (endbit) tmpShiftReg ^= 0x100b; tmpShiftReg++; shiftReg = tmpShiftReg; tmpShiftReg = tmpShiftReg ^ mask; return tmpShiftReg; } void resetSeed() { shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1); initSeed = shiftReg; mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1); } uint8_t data[512], rdata[512]; int count, testCount; uint32_t len; uint16_t offset; message_t reportMsg; void report(error_t e) { uint8_t *msg = call AMSend.getPayload(&reportMsg, 1); if (msg) { msg[0] = e; if (call AMSend.send(AM_BROADCAST_ADDR, &reportMsg, 1) == SUCCESS) return; } call Leds.led0On(); } event void AMSend.sendDone(message_t* msg, error_t error) { if (error != SUCCESS) call Leds.led0On(); } void fail(error_t e) { call Leds.led0On(); report(e); } void success() { call Leds.led1On(); report(0x80); } bool scheck(error_t r) __attribute__((noinline)) { if (r != SUCCESS) fail(r); return r == SUCCESS; } bool bcheck(bool b) { if (!b) fail(FAIL); return b; } volatile int x; void setParameters() { len = rand() >> 8; offset = rand() >> 9; if ( len > 254 ) len = 254; if (offset + len > sizeof data) offset = sizeof data - len; } void nextRead() { if (count == NWRITES) count = 0; if (count++ == 0) resetSeed(); setParameters(); scheck(call LogRead.read(rdata, len)); } event void LogRead.readDone(void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) { if (len != 0 && rlen == 0) done(); else if (scheck(result) && bcheck(rlen == len && buf == rdata && memcmp(data + offset, rdata, rlen) == 0)) nextRead(); } event void LogRead.seekDone(error_t error) { } void nextWrite() { if (count++ == NWRITES) scheck(call LogWrite.sync()); else { error_t result; setParameters(); result = call LogWrite.append(data + offset, len); if (result == ESIZE) { // We have reached the end of the log, sync it scheck(call LogWrite.sync()); } else { scheck(result); } } } event void LogWrite.appendDone(void *buf, storage_len_t y, bool recordsLost, error_t result) { if (result == ESIZE) scheck(call LogWrite.sync()); else if (scheck(result)) nextWrite(); } event void LogWrite.eraseDone(error_t result) { if (scheck(result)) done(); } event void LogWrite.syncDone(error_t result) { if (scheck(result)) done(); } event void Boot.booted() { int i; resetSeed(); for (i = 0; i < sizeof data; i++) data[i++] = rand() >> 8; call SerialControl.start(); } event void SerialControl.stopDone(error_t e) { } event void SerialControl.startDone(error_t e) { if (e != SUCCESS) { call Leds.led0On(); return; } testCount = 0; done(); } enum { A_ERASE = 1, A_READ, A_WRITE }; void doAction(int act) { switch (act) { case A_ERASE: scheck(call LogWrite.erase()); break; case A_WRITE: resetSeed(); count = 0; nextWrite(); break; case A_READ: resetSeed(); count = 0; nextRead(); break; } } const uint8_t actions[] = { A_ERASE, A_READ, A_WRITE, A_READ, A_WRITE, A_WRITE, A_WRITE, A_READ, A_ERASE, A_READ, A_WRITE, A_WRITE }; void done() { uint8_t act = TOS_NODE_ID / 100; call Leds.led2Toggle(); switch (act) { case 0: if (testCount < sizeof actions) doAction(actions[testCount]); else success(); break; case A_ERASE: case A_READ: case A_WRITE: if (testCount) success(); else doAction(act); break; default: fail(FAIL); break; } testCount++; } } tinyos-2.1.2+dfsg/apps/tests/storage/Log/volumes-at45db.xml000066400000000000000000000001101207233610700235400ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/Log/volumes-pxa27xp30.xml000066400000000000000000000001111207233610700241320ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/Log/volumes-stm25p.xml000066400000000000000000000001111207233610700236100ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/SyncLog/000077500000000000000000000000001207233610700211105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/storage/SyncLog/Makefile000066400000000000000000000000531207233610700225460ustar00rootroot00000000000000COMPONENT=SyncLogAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/storage/SyncLog/README.txt000066400000000000000000000014751207233610700226150ustar00rootroot00000000000000README for SyncLog Author/Contact: tinyos-help@millennium.berkeley.edu Description: Application to test 'sync' functionality in the LogStorageC abstraction, using the log in linear mode. There must be a volumes-.xml file in this directory describing a 64kB volume named SYNCLOG for your flash chip. A successful test will send serial messages (id 139) with increasing sequence numbers (approximately 2 messages every 5 seconds) - the easiest way to see these messages is to connect the mote with the SyncLog code to your PC and run the java Listen tool: MOTECOM=serial@ java net.tinyos.tools.Listen This test is based on code and a bug report from Mayur Maheshwari (mayur.maheshwari@gmail.com). Tools: Known bugs/limitations: None. $Id: README.txt,v 1.3 2008-06-25 01:29:44 konradlorincz Exp $ tinyos-2.1.2+dfsg/apps/tests/storage/SyncLog/SyncLogAppC.nc000066400000000000000000000013111207233610700235500ustar00rootroot00000000000000/** * Test reading and writing to a log with lots of syncs. See README.txt for * more details. * * @author Mayur Maheshwari (mayur.maheshwari@gmail.com) * @author David Gay */ #include "StorageVolumes.h" configuration SyncLogAppC { } implementation { components SyncLogC, new TimerMilliC() as Timer0, new TimerMilliC() as Timer1, new LogStorageC(VOLUME_SYNCLOG, FALSE), SerialActiveMessageC, MainC, LedsC; SyncLogC.Leds -> LedsC; SyncLogC.Boot -> MainC; SyncLogC.Timer0 -> Timer0; SyncLogC.Timer1 -> Timer1; SyncLogC.LogWrite -> LogStorageC; SyncLogC.LogRead -> LogStorageC; SyncLogC.AMSend -> SerialActiveMessageC.AMSend[139]; SyncLogC.AMControl -> SerialActiveMessageC; } tinyos-2.1.2+dfsg/apps/tests/storage/SyncLog/SyncLogC.nc000066400000000000000000000050761207233610700231230ustar00rootroot00000000000000/** * Test reading and writing to a log with lots of syncs. See README.txt for * more details. * * @author Mayur Maheshwari (mayur.maheshwari@gmail.com) * @author David Gay */ module SyncLogC { uses { interface Leds; interface Boot; interface SplitControl as AMControl; interface LogWrite; interface LogRead; interface Timer as Timer0; interface Timer as Timer1; interface AMSend; } } implementation { uint16_t data = 0; uint16_t readings = 0; message_t pkt; bool busy = FALSE; bool logBusy = FALSE; task void sendTask(); storage_cookie_t readCookie; storage_cookie_t writeCookie; #define SAMPLING_FREQUENCY 2333 #define TIMER_PERIOD_MILLI 5120 event void Boot.booted() { call AMControl.start(); } event void AMControl.startDone(error_t err) { if (err == SUCCESS) call LogWrite.erase(); else call AMControl.start(); } event void LogWrite.eraseDone(error_t result) { call Timer1.startPeriodic(SAMPLING_FREQUENCY); call Timer0.startPeriodic(TIMER_PERIOD_MILLI); } event void Timer1.fired() { readings++; if (!logBusy) { logBusy = TRUE; call LogWrite.append(&readings, sizeof(readings)); } } event void LogWrite.appendDone(void *buf, storage_len_t len, bool recordsLost, error_t result) { if (result == SUCCESS) call LogWrite.sync(); } event void LogWrite.syncDone(error_t result) { logBusy = FALSE; call Leds.led2Toggle(); } event void Timer0.fired() { call Timer1.stop(); if (!logBusy) { call Leds.led0Toggle(); logBusy = TRUE; call LogRead.read(&data, sizeof data); } } event void LogRead.readDone(void* buf, storage_len_t len, error_t error) { if (error == SUCCESS) if (len == sizeof data) post sendTask(); else { logBusy = FALSE; call Timer1.startPeriodic(SAMPLING_FREQUENCY); } } typedef nx_struct { nx_uint16_t nodeid; nx_uint16_t payloadData; } SenseStoreRadioMsg; task void sendTask() { if (!busy) { SenseStoreRadioMsg* ssrpkt = (SenseStoreRadioMsg*)(call AMSend.getPayload(&pkt, sizeof(SenseStoreRadioMsg))); ssrpkt->nodeid = TOS_NODE_ID; ssrpkt->payloadData = data; if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(SenseStoreRadioMsg)) == SUCCESS) busy = TRUE; } } event void AMSend.sendDone(message_t* msg, error_t err) { if (&pkt == msg) { busy = FALSE; call LogRead.read(&data, sizeof data); } } event void LogRead.seekDone(error_t error) { } event void AMControl.stopDone(error_t err) { } } tinyos-2.1.2+dfsg/apps/tests/storage/SyncLog/volumes-at45db.xml000066400000000000000000000001071207233610700244030ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/SyncLog/volumes-pxa27xp30.xml000066400000000000000000000001111207233610700247670ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/storage/SyncLog/volumes-stm25p.xml000066400000000000000000000001071207233610700244520ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/tkn154/000077500000000000000000000000001207233610700171145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/Makefile000066400000000000000000000027751207233610700205670ustar00rootroot00000000000000#-*-makefile-*- ###################################################################### # # Makes the entire suite of TinyOS applications for a given platform. # # Author: Martin Turon # Date: August 18, 2005 # ###################################################################### # $Id: Makefile,v 1.4 2006-12-12 18:22:48 vlahan Exp $ # MAKECMDGOALS is the way to get the arguments passed into a Makefile ... TARGET=$(MAKECMDGOALS) NESDOC_TARGET=$(filter-out nesdoc,$(TARGET)) # Here is a way to get the list of subdirectories in a Makefile ... ROOT=. SUBDIRS := $(shell find * -type d) # Okay, match any target, and recurse the subdirectories %: @for i in $(SUBDIRS); do \ HERE=$$PWD; \ if [ -f $$i/Makefile ]; then \ echo Building ... $(PWD)/$$i; \ echo make $(TARGET); \ cd $$i; \ $(MAKE) $(TARGET); \ cd $$HERE; \ fi; \ done BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' ) # The output directory for generated documentation DOCDIR = $(BASEDIR)/doc/nesdoc nesdoc: @echo This target rebuilds documentation for all known platforms. @echo It DOES NOT overwrite any existing documentation, thus, it @echo is best run after deleting all old documentation. @echo @echo To delete all old documentation, delete the contents of the @echo $(DOCDIR) directory. @echo @echo Press Enter to continue, or ^C to abort. @read for platform in `ncc -print-platforms`; do \ $(MAKE) $$platform docs.nohtml.preserve; \ nesdoc -o $(DOCDIR) -html -target=$$platform; \ done tinyos-2.1.2+dfsg/apps/tests/tkn154/README.txt000066400000000000000000000041621207233610700206150ustar00rootroot00000000000000README for tkn154 test applications Author/Contact: Jan Hauer Description: This folder contains test applications for "TKN15.4", a platform-independent IEEE 802.15.4-2006 MAC implementation. Applications that use the beacon-enabled mode are located in the "beacon-enabled" folder, applications that use the nonbeacon-enabled mode are in the "nonbeacon-enabled" folder. Every test application resides in a separate subdirectory which includes a README.txt describing what it does and how it can be installed. The TKN15.4 implementation can be found in tinyos-2.x/tos/lib/mac/tkn154 (start with the README.txt in that directory). If you want to use the TKN15.4 MAC instead of your platform's default MAC protocol in your own application, all you need to do is add the line include $(TOSDIR)/lib/mac/tkn154/Makefile.include in your application's Makefile after the "include $(MAKERULES)" line as shown in the example applications. This is also true, if your application uses the Active Message abstraction and you want to use the TKN15.4 MAC underneath AM. The full-blown MAC consumes quite a lot of program memory, but you can remove some functionality at compile time by setting IEEE154_X_DISABLED flags defined in $(TOSDIR)/lib/mac/tkn154/TKN154.h (e.g. adding them to the CFLAGS in your Makefile). The MAC interfaces are located in tos/lib/mac/tkn154/interfaces and TKN154.h is typically the only MAC header file that your application needs to include. If you pass "tkn154debug" to the make system, then a debug mode is enabled, where useful information is sent over the serial line and can be displayed with the java PrintfClient (see TinyOS tutorial "The TinyOS printf Library"). Example: "make telosb install tkn154debug" To display debug messages run (replace XXX): "java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSBXXX:telosb" Note: TEP3 recommends that interface names "should be mixed case, starting upper case". To match the syntax used in the IEEE 802.15.4 standard the interfaces provided by the MAC to the next higher layer deviate from this convention (they are all caps, e.g. MLME_START). tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/000077500000000000000000000000001207233610700217335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/000077500000000000000000000000001207233610700245065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/README.txt000066400000000000000000000026671207233610700262170ustar00rootroot00000000000000README for TestAssociate Author/Contact: Jan Hauer Description: In this application one node takes the role of a PAN coordinator in a beacon-enabled 802.15.4 PAN, it transmits periodic beacons and waits for devices to request association to its PAN. Whenever a device tries to associate, the PAN coordinator accepts the association and assigns to the device a unique short address (starting from zero, incremented for every new association request). A second node acts as a device, it first scans the pre-defined channel for beacons from the coordinator and once it finds a beacon it tries to associate to the PAN. A short time after association the device then disassociates from the PAN. Criteria for a successful test: Both, coordinator and device, should toggle LED1 in unison about once every 5 seconds. The coordinator should also toggle LED2 every second. Tools: NONE Usage: 1. Install the coordinator: $ cd coordinator; make install 2. Install one (or more) devices: $ cd device; make install You can change some of the configuration parameters in app_profile.h Known bugs/limitations: - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant $Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/app_profile.h000066400000000000000000000037711207233610700271670ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:54 $ * @author: Jan Hauer * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { RADIO_CHANNEL = 26, PAN_ID = 0x1238, COORDINATOR_ADDRESS = 0x9182, BEACON_ORDER = 6, SUPERFRAME_ORDER = 6, }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/000077500000000000000000000000001207233610700270315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/Makefile000066400000000000000000000006721207233610700304760ustar00rootroot00000000000000COMPONENT=TestAssociateAppC CFLAGS += -DIEEE154_BEACON_SYNC_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/TestAssociateAppC.nc000066400000000000000000000043651207233610700327020ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ configuration TestAssociateAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestCoordC as App; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MLME_START -> MAC; App.MLME_ASSOCIATE -> MAC; App.MLME_DISASSOCIATE -> MAC; App.MLME_COMM_STATUS -> MAC; App.Frame -> MAC; App.IEEE154TxBeaconPayload -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/TestCoordC.nc000066400000000000000000000130131207233610700313620ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-01-05 17:12:56 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestCoordC { uses { interface Boot; interface MLME_RESET; interface MLME_START; interface MLME_ASSOCIATE; interface MLME_DISASSOCIATE; interface MLME_COMM_STATUS; interface MLME_SET; interface MLME_GET; interface IEEE154Frame as Frame; interface IEEE154TxBeaconPayload; interface Leds; } } implementation { uint16_t m_assignedShortAddress; event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; call MLME_SET.macShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macAssociationPermit(TRUE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, BEACON_ORDER, // BeaconOrder SUPERFRAME_ORDER, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // no realignment security 0 // no beacon security ); } event void MLME_START.confirm(ieee154_status_t status) { } event void MLME_ASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ) { call MLME_ASSOCIATE.response(DeviceAddress, m_assignedShortAddress++, IEEE154_ASSOCIATION_SUCCESSFUL, 0); } event void MLME_DISASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, ieee154_security_t *security ) { call Leds.led1Off(); } event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security ) { if (status == IEEE154_SUCCESS){ // association was successful call Leds.led1On(); } else { call Leds.led1Off(); } } event void MLME_DISASSOCIATE.confirm ( ieee154_status_t status, uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress ){} event void MLME_ASSOCIATE.confirm ( uint16_t AssocShortAddress, uint8_t status, ieee154_security_t *security ){} event void IEEE154TxBeaconPayload.aboutToTransmit() { } event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { } event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { } event void IEEE154TxBeaconPayload.beaconTransmitted() { ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN(); if (beaconSequenceNumber & 1) call Leds.led2On(); else call Leds.led2Off(); } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/device/000077500000000000000000000000001207233610700257455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/device/Makefile000066400000000000000000000006701207233610700274100ustar00rootroot00000000000000COMPONENT=TestAssociateAppC CFLAGS += -DIEEE154_BEACON_TX_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/device/TestAssociateAppC.nc000066400000000000000000000045711207233610700316150ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ configuration TestAssociateAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC, new Timer62500C() as Timer; components TestDeviceC as App; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.DisassociateTimer -> Timer; App.MLME_SCAN -> MAC; App.MLME_SYNC -> MAC; App.MLME_BEACON_NOTIFY -> MAC; App.MLME_SYNC_LOSS -> MAC; App.MLME_ASSOCIATE -> MAC; App.MLME_DISASSOCIATE -> MAC; App.MLME_COMM_STATUS -> MAC; App.BeaconFrame -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestAssociate/device/TestDeviceC.nc000066400000000000000000000212111207233610700304260ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-01-05 17:12:56 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestDeviceC { uses { interface Boot; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MLME_SCAN; interface MLME_SYNC; interface MLME_ASSOCIATE; interface MLME_DISASSOCIATE; interface MLME_COMM_STATUS; interface MLME_BEACON_NOTIFY; interface MLME_SYNC_LOSS; interface Leds; interface IEEE154BeaconFrame as BeaconFrame; interface Timer as DisassociateTimer; } } implementation { ieee154_CapabilityInformation_t m_capabilityInformation; ieee154_PANDescriptor_t m_PANDescriptor; bool m_wasScanSuccessful; void startApp(); event void Boot.booted() { m_capabilityInformation.AlternatePANCoordinator = 0; m_capabilityInformation.DeviceType = 0; m_capabilityInformation.PowerSource = 0; m_capabilityInformation.ReceiverOnWhenIdle = 0; m_capabilityInformation.Reserved = 0; m_capabilityInformation.SecurityCapability = 0; m_capabilityInformation.AllocateAddress = 1; call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS) startApp(); } void startApp() { ieee154_phyChannelsSupported_t channel; uint8_t scanDuration = BEACON_ORDER; // scan only one channel (to save time) channel = ((uint32_t) 1) << RADIO_CHANNEL; // we want all received beacons to be signalled // through the MLME_BEACON_NOTIFY interface, i.e. // we set the macAutoRequest attribute to FALSE call MLME_SET.macAutoRequest(FALSE); m_wasScanSuccessful = FALSE; call MLME_SCAN.request ( PASSIVE_SCAN, // ScanType channel, // ScanChannels scanDuration, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList 0, // PANDescriptorListNumEntries NULL, // PANDescriptorList NULL // security ); } event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame) { // received a beacon frame ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage(); if (!m_wasScanSuccessful) { if (call BeaconFrame.parsePANDescriptor( frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS){ // let's see if the beacon is from the coordinator we expect... if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS && m_PANDescriptor.CoordPANId == PAN_ID && m_PANDescriptor.CoordAddress.shortAddress == COORDINATOR_ADDRESS){ // yes - wait until SCAN is finished, then syncronize to beacons m_wasScanSuccessful = TRUE; } } } return frame; } event void MLME_SCAN.confirm ( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ) { if (m_wasScanSuccessful) { call MLME_SET.macPANId(m_PANDescriptor.CoordPANId); call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress); call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE); call MLME_ASSOCIATE.request( m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, m_PANDescriptor.CoordAddrMode, m_PANDescriptor.CoordPANId, m_PANDescriptor.CoordAddress, m_capabilityInformation, NULL // security ); } else startApp(); } event void MLME_ASSOCIATE.confirm ( uint16_t AssocShortAddress, uint8_t status, ieee154_security_t *security ) { if ( status == IEEE154_SUCCESS ) { // we are now associated - set a timer for disassociation call Leds.led1On(); call DisassociateTimer.startOneShot(312500U); } else { call MLME_ASSOCIATE.request( m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, m_PANDescriptor.CoordAddrMode, m_PANDescriptor.CoordPANId, m_PANDescriptor.CoordAddress, m_capabilityInformation, NULL // security ); } } event void DisassociateTimer.fired() { if (call MLME_DISASSOCIATE.request ( m_PANDescriptor.CoordAddrMode, m_PANDescriptor.CoordPANId, m_PANDescriptor.CoordAddress, IEEE154_DEVICE_WISHES_TO_LEAVE, FALSE, NULL ) != IEEE154_SUCCESS) call DisassociateTimer.startOneShot(312500U); } event void MLME_DISASSOCIATE.confirm ( ieee154_status_t status, uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress ) { if (status == IEEE154_SUCCESS){ call Leds.led1Off(); } else { call DisassociateTimer.startOneShot(312500U); } } event void MLME_ASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ){} event void MLME_SYNC_LOSS.indication( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security) { startApp(); } event void MLME_DISASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, ieee154_security_t *security ){} event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security ) { } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/000077500000000000000000000000001207233610700234445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/README.txt000066400000000000000000000030121207233610700251360ustar00rootroot00000000000000README for TestData Author/Contact: Jan Hauer Description: In this application one node takes the role of a PAN coordinator in a beacon-enabled 802.15.4 PAN, it transmits periodic beacons and waits for incoming DATA frames. A second node acts as a device, it first scans the pre-defined channel for beacons from the coordinator and once it finds a beacon it tries to synchronize to and track all future beacons. It then starts to transmit DATA frames to the coordinator as fast as possible (direct transmission in the contention access period, CAP). Criteria for a successful test: Coordinator and device should both toggle LED2 about twice per second in unison. They should also each toggle LED1 about 5 times per second (but not necessarily in unison). Note: the nodes should be close to each other, because the transmission power is reduced to -20 dBm. Tools: NONE Usage: 1. Install the coordinator: $ cd coordinator; make install 2. Install one or more devices $ cd device; make install,X where X is a pre-assigned short address and should be different for every device. You can change some of the configuration parameters in app_profile.h Known bugs/limitations: - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant $Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/app_profile.h000066400000000000000000000040251207233610700261160ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-01-05 17:12:56 $ * @author: Jan Hauer * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { RADIO_CHANNEL = 26, PAN_ID = 0x8172, COORDINATOR_ADDRESS = 0x4331, BEACON_ORDER = 5, SUPERFRAME_ORDER = 5, TX_POWER = -20, // in dBm }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/coordinator/000077500000000000000000000000001207233610700257675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/coordinator/Makefile000066400000000000000000000007401207233610700274300ustar00rootroot00000000000000COMPONENT=TestDataAppC CFLAGS += -DIEEE154_BEACON_SYNC_DISABLED -DTKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/coordinator/TestCoordReceiverC.nc000066400000000000000000000103441207233610700320110ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-01-05 17:12:56 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestCoordReceiverC { uses { interface Boot; interface MCPS_DATA; interface MLME_RESET; interface MLME_START; interface MLME_SET; interface MLME_GET; interface IEEE154Frame as Frame; interface IEEE154TxBeaconPayload; interface Leds; } } implementation { bool m_ledCount; event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; call MLME_SET.phyTransmitPower(TX_POWER); call MLME_SET.macShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macAssociationPermit(FALSE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, BEACON_ORDER, // BeaconOrder SUPERFRAME_ORDER, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity, 0 // BeaconSecurity ); } event message_t* MCPS_DATA.indication ( message_t* frame ) { if (m_ledCount++ == 20){ m_ledCount = 0; call Leds.led1Toggle(); } return frame; } event void MLME_START.confirm(ieee154_status_t status) {} event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ){} event void IEEE154TxBeaconPayload.aboutToTransmit() { } event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { } event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { } event void IEEE154TxBeaconPayload.beaconTransmitted() { ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN(); if (beaconSequenceNumber & 1) call Leds.led2On(); else call Leds.led2Off(); } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/coordinator/TestDataAppC.nc000066400000000000000000000043131207233610700305670ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ #include "app_profile.h" configuration TestDataAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestCoordReceiverC as App; App.MLME_START -> MAC; App.MCPS_DATA -> MAC; App.Frame -> MAC; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.IEEE154TxBeaconPayload -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/device/000077500000000000000000000000001207233610700247035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/device/Makefile000066400000000000000000000006641207233610700263510ustar00rootroot00000000000000COMPONENT=TestDataAppC CFLAGS += -DIEEE154_BEACON_TX_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/device/TestDataAppC.nc000066400000000000000000000044521207233610700275070ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ #include "app_profile.h" configuration TestDataAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestDeviceSenderC as App; App.MLME_SCAN -> MAC; App.MLME_SYNC -> MAC; App.MLME_BEACON_NOTIFY -> MAC; App.MLME_SYNC_LOSS -> MAC; App.MCPS_DATA -> MAC; App.Frame -> MAC; App.BeaconFrame -> MAC; App.Packet -> MAC; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestData/device/TestDeviceSenderC.nc000066400000000000000000000172631207233610700305410ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-01-05 17:12:56 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestDeviceSenderC { uses { interface Boot; interface MCPS_DATA; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MLME_SCAN; interface MLME_SYNC; interface MLME_BEACON_NOTIFY; interface MLME_SYNC_LOSS; interface IEEE154Frame as Frame; interface IEEE154BeaconFrame as BeaconFrame; interface Leds; interface Packet; } } implementation { message_t m_frame; uint8_t m_payloadLen; ieee154_PANDescriptor_t m_PANDescriptor; bool m_ledCount; bool m_wasScanSuccessful; void startApp(); task void packetSendTask(); event void Boot.booted() { char payload[] = "Hello Coordinator!"; uint8_t *payloadRegion; m_payloadLen = strlen(payload); payloadRegion = call Packet.getPayload(&m_frame, m_payloadLen); if (m_payloadLen <= call Packet.maxPayloadLength()){ memcpy(payloadRegion, payload, m_payloadLen); call MLME_RESET.request(TRUE); } } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS) startApp(); } void startApp() { ieee154_phyChannelsSupported_t channelMask; uint8_t scanDuration = BEACON_ORDER; call MLME_SET.phyTransmitPower(TX_POWER); call MLME_SET.macShortAddress(TOS_NODE_ID); // scan only the channel where we expect the coordinator channelMask = ((uint32_t) 1) << RADIO_CHANNEL; // we want all received beacons to be signalled // through the MLME_BEACON_NOTIFY interface, i.e. // we set the macAutoRequest attribute to FALSE call MLME_SET.macAutoRequest(FALSE); m_wasScanSuccessful = FALSE; call MLME_SCAN.request ( PASSIVE_SCAN, // ScanType channelMask, // ScanChannels scanDuration, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList 0, // PANDescriptorListNumEntries NULL, // PANDescriptorList 0 // security ); } event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame) { // received a beacon frame ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage(); ieee154_macBSN_t beaconSequenceNumber = call BeaconFrame.getBSN(frame); if (!m_wasScanSuccessful) { // received a beacon during channel scanning if (call BeaconFrame.parsePANDescriptor( frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS) { // let's see if the beacon is from our coordinator... if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS && m_PANDescriptor.CoordPANId == PAN_ID && m_PANDescriptor.CoordAddress.shortAddress == COORDINATOR_ADDRESS){ // yes! wait until SCAN is finished, then syncronize to the beacons m_wasScanSuccessful = TRUE; } } } else { // received a beacon during synchronization, toggle LED2 if (beaconSequenceNumber & 1) call Leds.led2On(); else call Leds.led2Off(); } return frame; } event void MLME_SCAN.confirm ( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ) { if (m_wasScanSuccessful) { // we received a beacon from the coordinator before call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress); call MLME_SET.macPANId(m_PANDescriptor.CoordPANId); call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE); call Frame.setAddressingFields( &m_frame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, m_PANDescriptor.CoordPANId, // DstPANId, &m_PANDescriptor.CoordAddress, // DstAddr, NULL // security ); post packetSendTask(); } else startApp(); } task void packetSendTask() { if (!m_wasScanSuccessful) return; else if (call MCPS_DATA.request ( &m_frame, // frame, m_payloadLen, // payloadLength, 0, // msduHandle, TX_OPTIONS_ACK // TxOptions, ) != IEEE154_SUCCESS) call Leds.led0On(); } event void MCPS_DATA.confirm ( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t timestamp ) { if (status == IEEE154_SUCCESS && m_ledCount++ >= 20) { m_ledCount = 0; call Leds.led1Toggle(); } post packetSendTask(); } event void MLME_SYNC_LOSS.indication( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security) { m_wasScanSuccessful = FALSE; call Leds.led1Off(); call Leds.led2Off(); } event message_t* MCPS_DATA.indication (message_t* frame) { // we don't expect data return frame; } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/000077500000000000000000000000001207233610700232305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/README.txt000066400000000000000000000047401207233610700247330ustar00rootroot00000000000000README for TestGts Author/Contact: Ricardo Severino Stefano Tennina Description: In this application one node takes the role of a PAN coordinator in a beacon-enabled 802.15.4 PAN, it transmits periodic beacons and waits for an incoming GTS request. A second node acts as a device, it first scans the pre-defined channel for beacons from the coordinator and once it finds a beacon it tries to synchronize to and track all future beacons. It then requests a (transmit) GTS slot from the coordinator via the MLME-GTS.request() primitive. As soon as the slot is granted and signalled in the beacon frame, the device starts to send its data within that slot. A second GTS slot is then requested for reception. If the request is successfull, the PAN Coordinator will begin to transmit to the device in that slot. In the meanwhile, the first GTS is deallocated by the device which stops transmitting. This causes a reallocation of the GTS slots. Later, the PAN Coordinator stops transmitting, but the second GTS remains in beacon, although unused. When it finally expires, the PAN Coordinator removes it. To use the GTS services in your own application make sure you define the IEEE154_GTS_DEVICE_ENABLED (device) or IEEE154_GTS_COORD_ENABLE (PAN coordinator) preprocessor macro, for example, by adding the line "CFLAGS += -DIEEE154_GTS_DEVICE_ENABLED" in your application's Makefile. Criteria for a successful test: Coordinator and device should both toggle LED2 once per two per second in unison. After a few seconds the device will turn LED1 for about a second (and then turn it off). Afterwards the coordinator will turn its LED1 on (it will remain on). This assumes a setup of: 1 device + 1 coordinator. Tools: NONE Usage: 1. Install the coordinator: $ cd coordinator; make install 2. Install one or more devices $ cd device; make install,X where X is a pre-assigned short address and should be different for every device. You can change some of the configuration parameters in app_profile.h Known bugs/limitations: - The coordinator will transmit data only to a single device, even if more devices are in use - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/app_profile.h000066400000000000000000000037011207233610700257020ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { RADIO_CHANNEL = 26, PAN_ID = 0x1FF1, COORDINATOR_ADDRESS = 0x4891, BEACON_ORDER = 7, SUPERFRAME_ORDER = 7, }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/coordinator/000077500000000000000000000000001207233610700255535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/coordinator/Makefile000066400000000000000000000010131207233610700272060ustar00rootroot00000000000000COMPONENT=TestGTSAppC CFLAGS += -DIEEE154_GTS_COORD_ENABLED CFLAGS += -I$(shell pwd)/.. CFLAGS += -DIEEE154_PROMISCUOUS_MODE_DISABLED -DTKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/coordinator/TestCoordC.nc000066400000000000000000000142471207233610700301160ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestCoordC { uses { interface Boot; interface MCPS_DATA; interface MLME_RESET; interface MLME_START; interface MLME_SET; interface MLME_GET; interface IEEE154Frame as Frame; interface IEEE154TxBeaconPayload; interface Leds; interface MLME_GTS; interface Packet; } } implementation { bool m_ledCount; uint8_t m_payloadLen; uint8_t m_gotSlot; uint8_t m_messageCount; message_t m_frame; ieee154_address_t m_destAddr; message_t m_frame; ieee154_address_t m_dstAddr; uint8_t *payloadRegion; bool GtsGetDirection(uint8_t gtsCharacteristics) { if ( (gtsCharacteristics & 0x10) == 0x10) return GTS_RX_DIRECTION; else return GTS_TX_DIRECTION; } event void Boot.booted() { char payload[]="GTS TEST!"; m_messageCount=0; m_payloadLen=strlen(payload); payloadRegion=call Packet.getPayload(&m_frame, m_payloadLen); if (m_payloadLen <= call Packet.maxPayloadLength()){ memcpy(payloadRegion, payload, m_payloadLen); m_gotSlot=0; call MLME_RESET.request(TRUE); } } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; call MLME_SET.macShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macAssociationPermit(FALSE); call MLME_SET.macGTSPermit(TRUE); //RARS GTS call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, BEACON_ORDER, // BeaconOrder SUPERFRAME_ORDER, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity, 0 // BeaconSecurity ); } task void packetSendTask() { call Frame.setAddressingFields( &m_frame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, call MLME_GET.macPANId(), // DstPANId, &m_dstAddr, // DstAddr, NULL // security ); m_messageCount++; if (m_messageCount < 10) { call MCPS_DATA.request ( &m_frame, // frame, m_payloadLen, // payloadLength, 0, // msduHandle, TX_OPTIONS_ACK | TX_OPTIONS_GTS // TxOptions, ); } } event message_t* MCPS_DATA.indication ( message_t* frame ) { call Leds.led1Toggle(); return frame; } event void MLME_START.confirm(ieee154_status_t status) {} event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ) { } event void IEEE154TxBeaconPayload.aboutToTransmit() { } event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { } event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { } event void IEEE154TxBeaconPayload.beaconTransmitted() { ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN(); if (beaconSequenceNumber & 1) call Leds.led2On(); else call Leds.led2Off(); if (m_gotSlot) post packetSendTask(); } event void MLME_GTS.indication ( uint16_t DeviceAddress, uint8_t GtsCharacteristics, ieee154_security_t *security ) { if (GtsGetDirection(GtsCharacteristics) == GTS_RX_DIRECTION && m_gotSlot == 0) { m_dstAddr.shortAddress=DeviceAddress; m_gotSlot=1; m_messageCount=0; post packetSendTask(); } } event void MLME_GTS.confirm ( uint8_t GtsCharacteristics, ieee154_status_t status ){} } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/coordinator/TestGTSAppC.nc000066400000000000000000000042671207233610700301470ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ #include "app_profile.h" configuration TestGTSAppC {} implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestCoordC as App; App.MLME_GTS -> MAC; App.MLME_START -> MAC; App.MCPS_DATA -> MAC; App.Frame -> MAC; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.Packet -> MAC; App.IEEE154TxBeaconPayload -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/device/000077500000000000000000000000001207233610700244675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/device/Makefile000066400000000000000000000010641207233610700261300ustar00rootroot00000000000000COMPONENT=TestGTSAppC CFLAGS += -DIEEE154_GTS_DEVICE_ENABLED CFLAGS += -DIEEE154_BEACON_TX_DISABLED CFLAGS += -I$(shell pwd)/.. CFLAGS += -DIEEE154_PROMISCUOUS_MODE_DISABLED -DTKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/device/TestDeviceC.nc000066400000000000000000000224601207233610700271570ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" #include "GTS.h" module TestDeviceC { uses { interface Boot; interface MCPS_DATA; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MLME_SCAN; interface MLME_SYNC; interface MLME_BEACON_NOTIFY; interface MLME_SYNC_LOSS; interface IEEE154Frame as Frame; interface IEEE154BeaconFrame as BeaconFrame; interface Leds; interface Packet; interface MLME_GTS; } } implementation { message_t m_frame; uint8_t m_payloadLen; ieee154_PANDescriptor_t m_PANDescriptor; bool m_ledCount; bool m_wasScanSuccessful; void startApp(); uint8_t m_messageCount; task void packetSendTask(); norace uint8_t m_step; uint8_t m_gtsCharacteristics; uint8_t GtsSetCharacteristics(uint8_t gtsLength, uint8_t gtsDirection, uint8_t characteristicType) { return ( (gtsLength << 0) | (gtsDirection << 4) | (characteristicType << 5)); } event void Boot.booted() { char payload[]="GTS TEST!"; uint8_t *payloadRegion; m_payloadLen=strlen(payload); payloadRegion=call Packet.getPayload(&m_frame, m_payloadLen); if (m_payloadLen <= call Packet.maxPayloadLength()){ memcpy(payloadRegion, payload, m_payloadLen); call MLME_RESET.request(TRUE); } } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS) startApp(); } void startApp() { ieee154_phyChannelsSupported_t channelMask; uint8_t scanDuration = BEACON_ORDER; call MLME_SET.macShortAddress(TOS_NODE_ID); // scan only the channel where we expect the coordinator channelMask = ((uint32_t) 1) << RADIO_CHANNEL; // we want all received beacons to be signalled // through the MLME_BEACON_NOTIFY interface, i.e. // we set the macAutoRequest attribute to FALSE call MLME_SET.macAutoRequest(FALSE); m_wasScanSuccessful = FALSE; call MLME_SCAN.request ( PASSIVE_SCAN, // ScanType channelMask, // ScanChannels scanDuration, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList 0, // PANDescriptorListNumEntries NULL, // PANDescriptorListGtsSetCharacteristics 0 // security ); } event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame) { // received a beacon frame ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage(); ieee154_macBSN_t beaconSequenceNumber = call BeaconFrame.getBSN(frame); if (!m_wasScanSuccessful) { // received a beacon during channel scanning if (call BeaconFrame.parsePANDescriptor( frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS) { // let's see if the beacon is from our coordinator... if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS && m_PANDescriptor.CoordPANId == PAN_ID && m_PANDescriptor.CoordAddress.shortAddress == COORDINATOR_ADDRESS){ // yes! wait until SCAN is finished, then syncronize to the beacons m_wasScanSuccessful = TRUE; } } } else { // received a beacon during synchronization, toggle LED2 if (beaconSequenceNumber & 1) call Leds.led2On(); else call Leds.led2Off(); } if (m_step == 1) post packetSendTask(); return frame; } event void MLME_SCAN.confirm ( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ) { if (m_wasScanSuccessful) { // we received a beacon from the coordinator before call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress); call MLME_SET.macPANId(m_PANDescriptor.CoordPANId); call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE); call Frame.setAddressingFields( &m_frame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, m_PANDescriptor.CoordPANId, // DstPANId, &m_PANDescriptor.CoordAddress, // DstAddr, NULL // security ); // allocate a gts for TX - GTS 1 m_gtsCharacteristics=GtsSetCharacteristics(2,GTS_TX_DIRECTION,1); //setup gts characteristics //1st argument: number of slots //2nd argument: Gts direction (tx or rx) //3rd argument: characteristicType (Allocation or Deallocation) call MLME_GTS.request(m_gtsCharacteristics,0); //send the gts slot request call Leds.led1On(); } else startApp(); } task void packetSendTask() { if (!m_wasScanSuccessful) return; m_messageCount++; if (m_messageCount == 3 && m_step == 1) { // allocate a second gts for RX - GTS 2 m_gtsCharacteristics=GtsSetCharacteristics(2,GTS_RX_DIRECTION,1); //setup gts characteristics call MLME_GTS.request(m_gtsCharacteristics,0); //send the gts slot request return; } if (m_messageCount < 7 && m_step == 1) { call MCPS_DATA.request ( &m_frame, // frame, m_payloadLen, // payloadLength, 0, // msduHandle, TX_OPTIONS_ACK | TX_OPTIONS_GTS // TxOptions, ); } else { m_step=2; //deallocate GTS 1 m_gtsCharacteristics=GtsSetCharacteristics(2,GTS_TX_DIRECTION,0); //setup gts characteristics call MLME_GTS.request(m_gtsCharacteristics,0); //send the gts slot request } } event void MCPS_DATA.confirm ( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t timestamp ) {} event void MLME_SYNC_LOSS.indication( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security) { m_wasScanSuccessful = FALSE; call Leds.led1Off(); call Leds.led2Off(); call Leds.led0On(); m_messageCount=0; m_step=0; startApp(); } event message_t* MCPS_DATA.indication (message_t* frame) { // we don't expect data return frame; } event void MLME_GTS.indication ( uint16_t DeviceAddress, uint8_t GtsCharacteristics, ieee154_security_t *security ){} event void MLME_GTS.confirm ( uint8_t GtsCharacteristics, ieee154_status_t status ) { if (status == IEEE154_SUCCESS && m_step==0) { m_step=1; call Leds.led1Off(); call Leds.led0Off(); } } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestGTS/device/TestGTSAppC.nc000066400000000000000000000044011207233610700270510ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ #include "app_profile.h" configuration TestGTSAppC {} implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestDeviceC as App; App.MLME_SCAN -> MAC; App.MLME_GTS -> MAC; App.MLME_SYNC -> MAC; App.MLME_BEACON_NOTIFY -> MAC; App.MLME_SYNC_LOSS -> MAC; App.MCPS_DATA -> MAC; App.Frame -> MAC; App.BeaconFrame -> MAC; App.Packet -> MAC; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/000077500000000000000000000000001207233610700243345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/README.txt000066400000000000000000000025611207233610700260360ustar00rootroot00000000000000README for TestIndirect Author/Contact: Jan Hauer Description: In this application one node takes the role of a PAN coordinator in a beacon-enabled 802.15.4 PAN, it transmits periodic beacons and additionally in every beacon interval it tries to transmit one DATA frame to a device using indirect tranmission. A second node that takes the role of a device first scans the pre-defined channel for beacons from the coordinator and once it finds a beacon it tries to synchronize to and track all future beacons. Whenever the coordinator has data to send (indicated in the beacon), the device extracts the DATA frame from the coordinator. Criteria for a successful test: Both nodes should toggle the LED1 in unison, about once every half second. The coordinator should also toggle LED2 with the same frequency. Tools: NONE Usage: 1. Install the coordinator: $ cd coordinator; make install 2. Install one device $ cd device; make install You can change some of the configuration parameters in app_profile.h Known bugs/limitations: - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant $Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $ tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/app_profile.h000066400000000000000000000040241207233610700270050ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { RADIO_CHANNEL = 26, PAN_ID = 0x1152, DEVICE_ADDRESS = 0x4342, COORDINATOR_ADDRESS = 0x5341, BEACON_ORDER = 5, SUPERFRAME_ORDER = 5, }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/000077500000000000000000000000001207233610700266575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/Makefile000066400000000000000000000007211207233610700303170ustar00rootroot00000000000000COMPONENT=TestIndirectAppC CFLAGS += -DIEEE154_BEACON_SYNC_DISABLED -DIEEE154_SCAN_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/TestCoordSenderC.nc000066400000000000000000000124751207233610700323640ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-01-05 17:12:56 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestCoordSenderC { uses { interface Boot; interface MCPS_DATA; interface MLME_RESET; interface MLME_START; interface MLME_SET; interface MLME_GET; interface Leds; interface IEEE154Frame as Frame; interface IEEE154TxBeaconPayload; interface Packet; } } implementation { message_t m_frame; uint8_t m_payloadLen; event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; call MLME_SET.macShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macAssociationPermit(FALSE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, BEACON_ORDER, // BeaconOrder SUPERFRAME_ORDER, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity ); } void dataRequest() { call MCPS_DATA.request ( &m_frame, // msdu, m_payloadLen, // payloadLength, 0, // msduHandle, TX_OPTIONS_ACK | TX_OPTIONS_INDIRECT // TxOptions, ); } event void MLME_START.confirm(ieee154_status_t status) { char payload[] = "Hello Device!"; uint8_t *payloadRegion; ieee154_address_t deviceShortAddress; // construct the frame m_payloadLen = strlen(payload); payloadRegion = call Packet.getPayload(&m_frame, m_payloadLen); deviceShortAddress.shortAddress = DEVICE_ADDRESS; // destination if (status == IEEE154_SUCCESS && m_payloadLen <= call Packet.maxPayloadLength()) { memcpy(payloadRegion, payload, m_payloadLen); call Frame.setAddressingFields( &m_frame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, PAN_ID, // DstPANId, &deviceShortAddress, // DstAddr, NULL // security ); dataRequest(); } } event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ) { if (status == IEEE154_SUCCESS) call Leds.led1Toggle(); dataRequest(); } event message_t* MCPS_DATA.indication ( message_t* frame) { return frame; } event void IEEE154TxBeaconPayload.aboutToTransmit() { } event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { } event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { } event void IEEE154TxBeaconPayload.beaconTransmitted() { ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN(); if (beaconSequenceNumber & 1) call Leds.led2On(); else call Leds.led2Off(); } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/TestIndirectAppC.nc000066400000000000000000000043121207233610700323460ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ configuration TestIndirectAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestCoordSenderC as App; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MLME_START -> MAC; App.MCPS_DATA -> MAC; App.Frame -> MAC; App.IEEE154TxBeaconPayload -> MAC; App.Packet -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/device/000077500000000000000000000000001207233610700255735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/device/Makefile000066400000000000000000000006671207233610700272440ustar00rootroot00000000000000COMPONENT=TestIndirectAppC CFLAGS += -DIEEE154_BEACON_TX_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/device/TestDeviceReceiverC.nc000066400000000000000000000141771207233610700317560ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-01-05 17:12:56 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestDeviceReceiverC { uses { interface Boot; interface MCPS_DATA; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MLME_SCAN; interface MLME_SYNC; interface MLME_BEACON_NOTIFY; interface MLME_SYNC_LOSS; interface IEEE154BeaconFrame as BeaconFrame; interface Leds; } } implementation { ieee154_address_t m_coordAddress; uint8_t m_coordAddressMode; ieee154_macPANId_t m_coordPANID; ieee154_PANDescriptor_t m_PANDescriptor; bool m_wasScanSuccessful; void startApp(); event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS) startApp(); } void startApp() { ieee154_phyChannelsSupported_t channel; uint8_t scanDuration = BEACON_ORDER; // in this application the coordinator assumes that // the device has a certain short address call MLME_SET.macShortAddress(DEVICE_ADDRESS); channel = ((uint32_t) 1) << RADIO_CHANNEL; // we want all received beacons to be signalled // through the MLME_BEACON_NOTIFY interface, i.e. // we set the macAutoRequest attribute to FALSE call MLME_SET.macAutoRequest(FALSE); m_wasScanSuccessful = FALSE; call MLME_SCAN.request ( PASSIVE_SCAN, // ScanType channel, // ScanChannels scanDuration, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList 0, // PANDescriptorListNumEntries NULL, // PANDescriptorList 0 // security ); } event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame) { // received a beacon frame during SCAN ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage(); if (!m_wasScanSuccessful && call BeaconFrame.parsePANDescriptor( frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS){ // let's see if the beacon is from our coordinator... if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS && m_PANDescriptor.CoordPANId == PAN_ID && m_PANDescriptor.CoordAddress.shortAddress == COORDINATOR_ADDRESS){ // wait until SCAN is finished, then syncronize to beacons m_wasScanSuccessful = TRUE; } } return frame; } event void MLME_SCAN.confirm ( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ) { if (m_wasScanSuccessful){ // set the macAutoRequest attribute to TRUE, so indirect // transmissions are automatically carried through call MLME_SET.macAutoRequest(TRUE); call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress); call MLME_SET.macPANId(m_PANDescriptor.CoordPANId); call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE); } else startApp(); } event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ) { } event void MLME_SYNC_LOSS.indication( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security) { call Leds.led1Off(); } event message_t* MCPS_DATA.indication (message_t* frame) { call Leds.led1Toggle(); return frame; } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestIndirect/device/TestIndirectAppC.nc000066400000000000000000000043561207233610700312720ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ configuration TestIndirectAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestDeviceReceiverC as App; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MLME_SCAN -> MAC; App.MLME_SYNC -> MAC; App.MLME_BEACON_NOTIFY -> MAC; App.MLME_SYNC_LOSS -> MAC; App.MCPS_DATA -> MAC; App.BeaconFrame -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/000077500000000000000000000000001207233610700243745ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/README.txt000066400000000000000000000116101207233610700260710ustar00rootroot00000000000000README for TestClusterTree Author/Contact: Jasper Buesch ------------------------------------------------------------------------------- Description: This application creates a multihop topology out of three nodes: a PAN Coordinator, a "Router" (Coordinator and Device role) and a Device. The Router associates to the PAN Coordinator and the Device associates to the Router, so the topology is: PAN Coordinator <-> Router <-> Device PAN Coordinator and Router send periodic beacons, but their active portions are shifted in time (so they don't overlap, see detailed explanation below). The Device can send packets only to the Router. And that's what is happening: after the Router has associated and synchronized with the PAN Coordinator it starts transmitting periodic beacons itself. Once the Device receives these beacon it associates and synchronizes to the Router. Then the device starts sending periodic DATA packets to the Router (1 packet/s). Whenever the Router receives a DATA packet from the device it forwards the packet to the PAN Coordinator. A node toggles its LED2 (Telos: blue) every time a beacon is sent or received and it toggles LED1 (Telos: green) every time a DATA frame is sent or received. Therefore, the Router's LEDs should to toggle twice as fast as the LEDs of the other nodes. LEDs are toggling in unison / at the same time. Criteria for a successful test: Device and PAN Coordinator should toggle LED1 and LED2 with the same frequency. The Router should toggle LED1 and LED2 with twice that frequency. LEDs are not toggled in unison. ------------------------------------------------------------------------------- Superframe structure: PAN Coordinator and Router send beacons with the same frequency. Each beacon is followed by an active period (see IEEE 802.15.4-2006 Sect. 5.5.1). It is important that the active periods of the PAN Coordinator and Router do not overlap, i.e. we want a configuation like this: Superframe structure PAN coordinator: ||---------------------------|--------------------------------------------| || Active period | Inactive period | ||---------------------------|--------------------------------------------| |<----- defined by SO ------>| Superframe structure Router: |----------------------------------------||---------------------------|---| | Inactive period || Active period | | |----------------------------------------||---------------------------|---| |<----- defined by SO ------>| |<- "StartTime" in MLME_START.request()->| |<---------------------------- defined by BO ----------------------------->| So the parameters that influence a superframe structure are Beacon Order(BO) and Superframe Order(SO) and the parameter that influences the time offset between the active periods of the PAN Coordinator and Router is "StartTime" in the MLME_START.request() interface (used only on the Router). => Formula to transform Beacon Order(BO) and Superframe Order(SO) values into symbols and seconds (refer to section "7.5.1.1 Superframe structure"): - 0 ≤ BO ≤ 14; 0 ≤ SO ≤ 14 - symbol-time in seconds = 16 us (microseconds) - aBaseSlotDuration = 60 - aNumSuperframeSlots = 16 - aBaseSuperframeDuration = aBaseSlotDuration * aNumSuperframeSlots = 960 - Beaconintervall BI in symbols = aBaseSuperframeDuration * 2^BO = 960 * 2^BO - Beaconintervall BI in seconds = BI (in symbols) * 16 us Example: BO = 4 BI in symbols = 960 symbols * 2^4 = 15360 symbols BI in seconds = 15360 symbols * 16us = 0.24576 seconds => The "StartTime" parameter in MLME_START.request() The "StartTime" time offset in the router is defined in symbols. The value has to be chosen so that the active portions of router and PAN coordinator are not overlapping (refer to the figure above). One can, for example, use the duration of the active portion of PAN coordinator as "StartTime" on the Router. ------------------------------------------------------------------------------- Tools: NONE Usage: 1. Install the PAN coordinator: $ cd pancoord; make install 2. Install the router node: $ cd router; make install 3. Install the device node: $ cd device; make install You can change some of the configuration parameters in app_profile.h ------------------------------------------------------------------------------- Known bugs/limitations: - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/app_profile.h000066400000000000000000000043211207233610700270450ustar00rootroot00000000000000/* * Copyright (c) 2010, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.0 $ * $Date: 2010/08/26 16:07:34 $ * @author: Jasper Buesch * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum{ PAN_ID = 0x3901, PAN_COORDINATOR_SHORT_ADDRESS = 0xEF01, ROUTER_SHORT_ADDRESS = 0xEF02, DEVICE_SHORT_ADDRESS = 0xEF03, BEACON_ORDER = 6, SUPERFRAME_ORDER = 4, RADIO_CHANNEL = 26, DATA_TRANSFER_PERIOD = 62500U, // timebase 62500U = 1 second ROUTER_BEACON_START_OFFSET = 30720U, ROUTER_FRAME_POOL_SIZE = 5, }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/device/000077500000000000000000000000001207233610700256335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/device/Makefile000066400000000000000000000006651207233610700273020ustar00rootroot00000000000000COMPONENT=TestDeviceAppC CFLAGS += -DIEEE154_BEACON_TX_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/device/TestDeviceAppC.nc000066400000000000000000000046041207233610700307640ustar00rootroot00000000000000/* * Copyright (c) 2010, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.0 $ * $Date: 2010/08/26 16:07:34 $ * @author: Jasper Buesch * ======================================================================== */ configuration TestDeviceAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestDeviceC as App; components new Timer62500C() as DataTimer; MainC.Boot <- App; App.MLME_RESET -> MAC; App.MLME_SCAN -> MAC; App.MLME_BEACON_NOTIFY -> MAC; App.MLME_SYNC -> MAC; App.MLME_SYNC_LOSS -> MAC; App.MLME_ASSOCIATE -> MAC; App.MCPS_DATA -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.BeaconFrame -> MAC; App.Frame -> MAC; App.Packet -> MAC; App.Leds -> LedsC; App.DataTimer -> DataTimer; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/device/TestDeviceC.nc000066400000000000000000000206221207233610700303210ustar00rootroot00000000000000/* * Copyright (c) 2010, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.0 $ * $Date: 2010/08/26 16:07:34 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestDeviceC { uses { interface Boot; interface MLME_RESET; interface MLME_SCAN; interface MLME_SYNC; interface MLME_SYNC_LOSS; interface MLME_BEACON_NOTIFY; interface MLME_ASSOCIATE; interface MCPS_DATA; interface MLME_SET; interface MLME_GET; interface IEEE154Frame as Frame; interface IEEE154BeaconFrame as BeaconFrame; interface Packet; interface Leds; interface Timer as DataTimer; } } implementation { ieee154_CapabilityInformation_t m_capabilityInformation; ieee154_PANDescriptor_t m_panDescriptor; message_t m_frame; bool m_routerWasFound; bool m_associatedToRouter; bool m_dataConfirmPending; uint8_t m_payloadLen; void scanForRouter(); event void Boot.booted() { m_capabilityInformation.AlternatePANCoordinator = 0; m_capabilityInformation.DeviceType = 0; m_capabilityInformation.PowerSource = 0; m_capabilityInformation.ReceiverOnWhenIdle = 0; m_capabilityInformation.Reserved = 0; m_capabilityInformation.SecurityCapability = 0; m_capabilityInformation.AllocateAddress = 1; call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { char myPayload[] = "This is a packet for the PAN Coordinator!"; uint8_t *p; m_payloadLen = strlen(myPayload); p = call Packet.getPayload(&m_frame, m_payloadLen); if (status == IEEE154_SUCCESS && p != NULL) { memcpy(p, myPayload, m_payloadLen); scanForRouter(); } } void scanForRouter() { ieee154_phyChannelsSupported_t channel; // we only scan the single channel on which we expect the Router uint8_t scanDuration = BEACON_ORDER; channel = ((uint32_t) 1) << RADIO_CHANNEL; // we want to be signalled every single beacon that is received during the // channel SCAN-phase, that's why we set "macAutoRequest" to FALSE call MLME_SET.macAutoRequest(FALSE); m_routerWasFound = FALSE; m_associatedToRouter = FALSE; call MLME_SCAN.request( PASSIVE_SCAN, // ScanType channel, // ScanChannels scanDuration, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList 0, // PANDescriptorListNumEntries NULL, // PANDescriptorList 0 // security ); } event message_t* MLME_BEACON_NOTIFY.indication(message_t* frame) { ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage(); if (m_associatedToRouter) { // we are already associated to the Router // and just received one of its periodic beacons call Leds.led2Toggle(); return frame; } else { // we have received "some" beacon during the SCAN-phase, let's // check if it is the beacon from our Router if (!m_routerWasFound && call BeaconFrame.parsePANDescriptor( frame, RADIO_CHANNEL, page, &m_panDescriptor) == SUCCESS) { if (m_panDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS && m_panDescriptor.CoordPANId == PAN_ID && m_panDescriptor.CoordAddress.shortAddress == ROUTER_SHORT_ADDRESS) { m_routerWasFound = TRUE; // yes! } } } return frame; } event void MLME_SCAN.confirm( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ) { if (m_routerWasFound) { // our Router is out there sending beacons, // let's try to associate with it call MLME_SET.macCoordShortAddress(m_panDescriptor.CoordAddress.shortAddress); call MLME_SET.macPANId(m_panDescriptor.CoordPANId); call MLME_SYNC.request(m_panDescriptor.LogicalChannel, m_panDescriptor.ChannelPage, TRUE); call MLME_ASSOCIATE.request( m_panDescriptor.LogicalChannel, // LogicalChannel m_panDescriptor.ChannelPage, // ChannelPage ADDR_MODE_SHORT_ADDRESS, // CoordAddrMode PAN_ID, // CoordPANID m_panDescriptor.CoordAddress, // CoordAddress m_capabilityInformation, // CapabilityInformation 0 // Security ); } else { scanForRouter(); } } event void MLME_ASSOCIATE.confirm( uint16_t AssocShortAddress, uint8_t status, ieee154_security_t *security ) { if (status == IEEE154_ASSOCIATION_SUCCESSFUL) { m_associatedToRouter = TRUE; call MLME_SET.macShortAddress(AssocShortAddress); call Leds.led1Off(); call DataTimer.startPeriodic(DATA_TRANSFER_PERIOD); } else { scanForRouter(); } } event void DataTimer.fired() { ieee154_address_t deviceShortAddress; deviceShortAddress.shortAddress = ROUTER_SHORT_ADDRESS; // destination if (!m_associatedToRouter || m_dataConfirmPending) return; call Frame.setAddressingFields( &m_frame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, PAN_ID, // DstPANId, &deviceShortAddress, // DstAddr, NULL // security ); if (call MCPS_DATA.request( &m_frame, // msdu, m_payloadLen, // payloadLength, 0, // msduHandle, TX_OPTIONS_ACK // TxOptions, ) == IEEE154_SUCCESS) m_dataConfirmPending = TRUE; call Leds.led1Toggle(); } event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ) { m_dataConfirmPending = FALSE; } event void MLME_SYNC_LOSS.indication( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security ) { call DataTimer.stop(); scanForRouter(); } event message_t* MCPS_DATA.indication(message_t* frame) { return frame; } event void MLME_ASSOCIATE.indication( uint64_t DeviceAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ) { } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/000077500000000000000000000000001207233610700262015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/Makefile000066400000000000000000000011421207233610700276370ustar00rootroot00000000000000COMPONENT=TestPanCoordinatorAppC CFLAGS += -DIEEE154_PROMISCUOUS_MODE_DISABLED -DIEEE154_RXENABLE_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED -DIEEE154_COORD_BROADCAST_DISABLED -DIEEE154_SCAN_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/TestPanCoordinatorAppC.nc000066400000000000000000000043751207233610700330620ustar00rootroot00000000000000/* * Copyright (c) 2010, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.0 $ * $Date: 2010/08/26 16:07:34 $ * @author: Jasper Buesch * ======================================================================== */ configuration TestPanCoordinatorAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestPanCoordinatorC as App; MainC.Boot <- App; App.MLME_RESET -> MAC; App.MLME_START -> MAC; App.MLME_ASSOCIATE -> MAC; App.MCPS_DATA -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.IEEE154TxBeaconPayload -> MAC; App.Frame -> MAC; App.Packet -> MAC; App.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/TestPanCoordinatorC.nc000066400000000000000000000120561207233610700324140ustar00rootroot00000000000000/* * Copyright (c) 2010, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.0 $ * $Date: 2010/08/26 16:07:34 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestPanCoordinatorC { uses { interface Boot; interface MLME_RESET; interface MLME_START; interface MLME_ASSOCIATE; interface MCPS_DATA; interface MLME_SET; interface MLME_GET; interface IEEE154TxBeaconPayload; interface IEEE154Frame as Frame; interface Packet; interface Leds; } } implementation { event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; call MLME_SET.macShortAddress(PAN_COORDINATOR_SHORT_ADDRESS); call MLME_SET.macAssociationPermit(TRUE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, BEACON_ORDER, // BeaconOrder SUPERFRAME_ORDER, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity ); } event void MLME_START.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) call MLME_RESET.request(TRUE); } event message_t* MCPS_DATA.indication(message_t* frame) { // we received a packet from the "router" -> toggle LED1 call Leds.led1Toggle(); return frame; } event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t timestamp ) { } /* ------------------------------------------------------------------------------ */ event void MLME_ASSOCIATE.confirm( uint16_t assocShortAddress, uint8_t status, ieee154_security_t *security ) { } event void MLME_ASSOCIATE.indication( uint64_t deviceAddress, ieee154_CapabilityInformation_t capabilityInformation, ieee154_security_t *security ) { call MLME_ASSOCIATE.response( deviceAddress, ROUTER_SHORT_ADDRESS, IEEE154_ASSOCIATION_SUCCESSFUL, 0 ); } /* ------------------------------------------------------------------------------ */ event void IEEE154TxBeaconPayload.aboutToTransmit() { } event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { } event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { } event void IEEE154TxBeaconPayload.beaconTransmitted() { call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/router/000077500000000000000000000000001207233610700257145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/router/Makefile000066400000000000000000000011021207233610700273460ustar00rootroot00000000000000COMPONENT=TestRouterAppC CFLAGS += -DIEEE154_PROMISCUOUS_MODE_DISABLED -DIEEE154_RXENABLE_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED -DIEEE154_COORD_BROADCAST_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/router/TestRouterAppC.nc000066400000000000000000000050121207233610700311200ustar00rootroot00000000000000/* * Copyright (c) 2010, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.0 $ * $Date: 2010/08/26 16:07:34 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" configuration TestRouterAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestRouterC as App; components new PoolC(message_t, ROUTER_FRAME_POOL_SIZE) as FramePool; MainC.Boot <- App; App.MLME_RESET -> MAC; App.MLME_SCAN -> MAC; App.MLME_BEACON_NOTIFY -> MAC; App.MLME_SYNC -> MAC; App.MLME_SYNC_LOSS -> MAC; App.MLME_ASSOCIATE -> MAC; App.MLME_START -> MAC; App.MCPS_DATA -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.IEEE154TxBeaconPayload -> MAC; App.BeaconFrame -> MAC; App.Frame -> MAC; App.Packet -> MAC; App.FramePool -> FramePool; App.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestMultihop/router/TestRouterC.nc000066400000000000000000000277111207233610700304710ustar00rootroot00000000000000/* * Copyright (c) 2010, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.0 $ * $Date: 2010/08/26 16:07:34 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestRouterC { uses { interface Boot; interface MLME_RESET; interface MLME_SCAN; interface MLME_SYNC; interface MLME_SYNC_LOSS; interface MLME_BEACON_NOTIFY; interface MLME_ASSOCIATE; interface MLME_START; interface MCPS_DATA; interface MLME_GET; interface MLME_SET; interface IEEE154TxBeaconPayload; interface IEEE154BeaconFrame as BeaconFrame; interface IEEE154Frame as Frame; interface Packet; interface Pool as FramePool; interface Leds; } } implementation { ieee154_CapabilityInformation_t m_capabilityInformation; ieee154_PANDescriptor_t m_PANDescriptor; uint8_t m_panCoordinatorWasFound = FALSE; uint8_t m_associatedToPanCoord = FALSE; void scanForPanCoord(); /* ------------------------------------------------------------------------------ */ event void Boot.booted() { m_capabilityInformation.AlternatePANCoordinator = 0; m_capabilityInformation.DeviceType = 1; m_capabilityInformation.PowerSource = 0; m_capabilityInformation.ReceiverOnWhenIdle = 0; m_capabilityInformation.Reserved = 0; m_capabilityInformation.SecurityCapability = 0; m_capabilityInformation.AllocateAddress = 1; m_panCoordinatorWasFound = FALSE; m_associatedToPanCoord = FALSE; call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; else scanForPanCoord(); } void scanForPanCoord() { uint8_t scanDuration = BEACON_ORDER; // we only scan the single channel on which we expect the PAN coordinator ieee154_phyChannelsSupported_t channel = ((uint32_t) 1) << RADIO_CHANNEL; // we want to be signalled every single beacon that is received during the // channel SCAN-phase, that's why we set "macAutoRequest" to FALSE call MLME_SET.macAutoRequest(FALSE); m_panCoordinatorWasFound = FALSE; m_associatedToPanCoord = FALSE; call MLME_SCAN.request( PASSIVE_SCAN, // ScanType channel, // ScanChannels scanDuration, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList 0, // PANDescriptorListNumEntries NULL, // PANDescriptorList 0 // security ); } event message_t* MLME_BEACON_NOTIFY.indication(message_t* frame) { ieee154_phyCurrentPage_t page; if (m_associatedToPanCoord == TRUE) { // we are already associated with the PAN Coordinator // and just received one of its periodic beacons call Leds.led2Toggle(); } else { // we have received "some" beacon during the SCAN-phase, let's // check if it is the beacon from our PAN Coordinator page = call MLME_GET.phyCurrentPage(); if ((m_panCoordinatorWasFound == FALSE) && call BeaconFrame.parsePANDescriptor( frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS) { if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS && m_PANDescriptor.CoordPANId == PAN_ID && m_PANDescriptor.CoordAddress.shortAddress == PAN_COORDINATOR_SHORT_ADDRESS) { m_panCoordinatorWasFound = TRUE; // yes! } } } return frame; } event void MLME_SCAN.confirm( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ) { if (m_panCoordinatorWasFound) { // our PAN Coordinator is out there sending beacons, // let's try to associate with it call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress); call MLME_SET.macPANId(m_PANDescriptor.CoordPANId); call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE); call MLME_ASSOCIATE.request( m_PANDescriptor.LogicalChannel, // LogicalChannel m_PANDescriptor.ChannelPage, // ChannelPage ADDR_MODE_SHORT_ADDRESS, // CoordAddrMode PAN_ID, // CoordPANID m_PANDescriptor.CoordAddress, // CoordAddress m_capabilityInformation, // CapabilityInformation 0 // Security ); } else { scanForPanCoord(); } } event void MLME_ASSOCIATE.confirm( uint16_t assocShortAddress, uint8_t status, ieee154_security_t *security ) { if (status == IEEE154_ASSOCIATION_SUCCESSFUL) { // we have successfully associated with the PAN Coordinator. // now we should start sending our own beacons, so the device // can associate with us; but we must make sure that our active // period does not overlap with PAN Coordinator's active period // (via the "StartTime" parameter to "MLME_START.request") call Leds.led1Off(); m_associatedToPanCoord = TRUE; call MLME_SET.macShortAddress(assocShortAddress); call MLME_SET.macAssociationPermit(TRUE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, (uint32_t) ROUTER_BEACON_START_OFFSET, // StartTime, BEACON_ORDER, // BeaconOrder SUPERFRAME_ORDER, // SuperframeOrder FALSE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity ); } else { scanForPanCoord(); } } event void MLME_START.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) scanForPanCoord(); } event void MLME_SYNC_LOSS.indication( ieee154_status_t lossReason, uint16_t panId, uint8_t logicalChannel, uint8_t channelPage, ieee154_security_t *security ) { // We have lost track of our PAN Coordinator's beacons :( // We stop sending our own beacons, until we have synchronized with // the PAN Coordinator again. if (lossReason == IEEE154_BEACON_LOSS) { call Leds.led2Off(); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, 15, // BeaconOrder 15, // SuperframeOrder FALSE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity ); scanForPanCoord(); } } /* ------------------------------------------------------------------------------ */ /* Everything above was about finding and associating with the PAN Coordinator and * then starting to send our own beacons. The code below is about allowing the device * to associate, receiving data from it and forwarding it to the PAN Coordinator.*/ event void MLME_ASSOCIATE.indication( uint64_t deviceAddress, ieee154_CapabilityInformation_t capabilityInformation, ieee154_security_t *security ) { // The device wants to associate ... call MLME_ASSOCIATE.response( deviceAddress, DEVICE_SHORT_ADDRESS, IEEE154_ASSOCIATION_SUCCESSFUL, 0 ); } event message_t* MCPS_DATA.indication(message_t* receivedFrame) { message_t* returnFrame; ieee154_address_t panCoordAddr; uint8_t payloadLen = call Frame.getPayloadLength(receivedFrame); panCoordAddr.shortAddress = PAN_COORDINATOR_SHORT_ADDRESS; call Leds.led1Toggle(); // if we are no more associated with the PAN coordinator, we drop the frame if (m_associatedToPanCoord == FALSE) { return receivedFrame; } // This event handler has to return a frame buffer to the MAC. // We don't want to return "receivedFrame", because we will try // to forward that to the PAN Coordinator. Instead we get an "empty" // frame through the PoolC component and return that to the MAC. returnFrame = call FramePool.get(); if (returnFrame == NULL) return receivedFrame; // no empty frame left! // to forward the frame to the PAN Coordinator we update // the addressing part (the payload part remains unchanged!) call Frame.setAddressingFields( receivedFrame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, PAN_ID, // DstPANId, &panCoordAddr, // DstAddr, NULL // security ); call MCPS_DATA.request( receivedFrame, // msdu, payloadLen, // payloadLength, 0, // msduHandle, TX_OPTIONS_ACK // TxOptions, ); return returnFrame; } event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ) { call Leds.led1Toggle(); call FramePool.put(msg); } /* ------------------------------------------------------------------------------ */ event void IEEE154TxBeaconPayload.aboutToTransmit() { } event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { } event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { } event void IEEE154TxBeaconPayload.beaconTransmitted() { call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/000077500000000000000000000000001207233610700245255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/README.txt000066400000000000000000000022151207233610700262230ustar00rootroot00000000000000README for TestStartSync Author/Contact: Jan Hauer Description: In this application one node takes the role of a PAN coordinator in a beacon-enabled 802.15.4 PAN, it transmits periodic beacons with a frequency defined in the app_profile.h file. A second node acts as a device, it first scans all available channels for beacons from the coordinator and once it finds a beacon it tries to synchronize to and track all future beacons. Criteria for a successful test: After a few seconds all nodes should have the LED1 turned on and LED2 toggling in unison every second. Tools: NONE Usage: 1. Install the coordinator: $ cd coordinator; make install 2. Install one (or more) devices: $ cd device; make install You can change some of the configuration parameters in app_profile.h Known bugs/limitations: - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant $Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $ tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/app_profile.h000066400000000000000000000037711207233610700272060ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { RADIO_CHANNEL = 26, PAN_ID = 0x7761, COORDINATOR_ADDRESS = 0x1832, BEACON_ORDER = 5, SUPERFRAME_ORDER = 5, }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/000077500000000000000000000000001207233610700270505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/Makefile000066400000000000000000000007221207233610700305110ustar00rootroot00000000000000COMPONENT=TestStartSyncAppC CFLAGS += -I$(shell pwd)/.. CFLAGS += -DIEEE154_SCAN_DISABLED -DIEEE154_BEACON_SYNC_DISABLED # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/TestCoordC.nc000066400000000000000000000073331207233610700314110ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestCoordC { uses { interface Boot; interface MLME_RESET; interface MLME_START; interface MLME_SET; interface MLME_GET; interface Leds; interface IEEE154TxBeaconPayload; } } implementation { uint8_t m_beaconPayload[] = {0x01, 0x02, 0x03, 0x04, 0x05}; event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS){ call MLME_SET.macShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macAssociationPermit(FALSE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, BEACON_ORDER, // BeaconOrder SUPERFRAME_ORDER, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // no realignment security 0 // no beacon security ); } } event void MLME_START.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS){ call IEEE154TxBeaconPayload.setBeaconPayload(m_beaconPayload, sizeof(m_beaconPayload)); call Leds.led1On(); } } event void IEEE154TxBeaconPayload.aboutToTransmit() { } event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { } event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { } event void IEEE154TxBeaconPayload.beaconTransmitted() { ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN(); if (beaconSequenceNumber & 1) call Leds.led2On(); else call Leds.led2Off(); } } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/TestStartSyncAppC.nc000066400000000000000000000042221207233610700327300ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ configuration TestStartSyncAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestCoordC as App; MainC.Boot <- App; App.MLME_START -> MAC; App.IEEE154TxBeaconPayload -> MAC; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/device/000077500000000000000000000000001207233610700257645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/device/Makefile000066400000000000000000000012401207233610700274210ustar00rootroot00000000000000COMPONENT=TestStartSyncAppC CFLAGS += -DIEEE154_BEACON_TX_DISABLED -DIEEE154_PROMISCUOUS_MODE_DISABLED -DIEEE154_RXENABLE_DISABLED -DIEEE154_ASSOCIATION_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED -DIEEE154_COORD_BROADCAST_DISABLED -DIEEE154_INDIRECT_TX_DISABLED CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/beacon-enabled/TestStartSync/device/TestDeviceC.nc000066400000000000000000000133411207233610700304520ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 16:21:55 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestDeviceC { uses { interface Boot; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MLME_SCAN; interface MLME_SYNC; interface MLME_BEACON_NOTIFY; interface MLME_SYNC_LOSS; interface Leds; interface IEEE154BeaconFrame as BeaconFrame; } } implementation { enum { NUM_PAN_DESCRIPTORS = 10, }; ieee154_PANDescriptor_t m_PANDescriptor[NUM_PAN_DESCRIPTORS]; void startApp(); event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS) startApp(); } void startApp() { ieee154_phyChannelsSupported_t scanChannels; uint8_t scanDuration = BEACON_ORDER; // set the short address to whatever was passed // as a parameter to make system ("make install,X") call MLME_SET.macShortAddress(TOS_NODE_ID); scanChannels = call MLME_GET.phyChannelsSupported(); //scanChannels = (uint32_t) 1 << RADIO_CHANNEL; // setting the macAutoRequest attribute to TRUE means // that during the scan beacons will not be signalled // through MLME_BEACON_NOTIFY call MLME_SET.macAutoRequest(TRUE); call MLME_SCAN.request ( PASSIVE_SCAN, // ScanType scanChannels, // ScanChannels scanDuration, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList NUM_PAN_DESCRIPTORS, // PANDescriptorListNumEntries m_PANDescriptor, // PANDescriptorList 0 // security ); } event void MLME_SCAN.confirm ( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ) { uint8_t i; switch (status){ case IEEE154_NO_BEACON: startApp(); break; case IEEE154_SUCCESS: if (PANDescriptorListNumEntries > 0){ for (i=0; i * ======================================================================== */ configuration TestStartSyncAppC { } implementation { components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components TestDeviceC as App; App.MLME_SCAN -> MAC; App.MLME_SYNC -> MAC; App.MLME_BEACON_NOTIFY -> MAC; App.MLME_SYNC_LOSS -> MAC; App.BeaconFrame -> MAC; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; #ifdef PRINTF_ENABLED components PrintfC; App.PrintfControl -> PrintfC; App.PrintfFlush -> PrintfC; #endif } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/000077500000000000000000000000001207233610700224465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/000077500000000000000000000000001207233610700253265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/README.txt000066400000000000000000000022541207233610700270270ustar00rootroot00000000000000README for TestActiveScan Author/Contact: Jan Hauer Description: In this application one node takes the role of a PAN coordinator in a nonbeacon-enabled 802.15.4 PAN, it switches its radio to receive mode. A second node acts as a device, it switches to the pre-defined channel and periodically performs active-scans (i.e. sends out beacon request frames) on the predefined channel and expects beacon frames in return. Criteria for a successful test: The coordinator should toggle LED1 once every 2 seconds. The device should toggle LED1 and LED2 every 2 seconds (not necessarily simultaneously). Tools: NONE Usage: 1. Install the coordinator: $ cd coordinator; make install 2. Install one (or more) devices: $ cd device; make install You can change some of the configuration parameters in app_profile.h Known bugs/limitations: - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant $Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/app_profile.h000066400000000000000000000037731207233610700300110ustar00rootroot00000000000000/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-06-10 09:38:41 $ * @author: Jasper Buesch * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { RADIO_CHANNEL = 26, PAN_ID = 0x1234, COORDINATOR_ADDRESS = 0x2345, DEVICE_ADDRESS = 0x2346 }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/000077500000000000000000000000001207233610700276515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/Makefile000066400000000000000000000006271207233610700313160ustar00rootroot00000000000000COMPONENT=TestActiveScanCoordAppC CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include TestActiveScanCoordAppC.nc000066400000000000000000000043571207233610700345400ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-06-10 09:38:41 $ * @author: Jasper Buesch * ======================================================================== */ configuration TestActiveScanCoordAppC { } implementation { components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC; components new Timer62500C() as Timer1; components TestActiveScanCoordC as App; MainC.Boot <- App; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MLME_START -> MAC; App.IEEE154TxBeaconPayload -> MAC; App.Led1Timer -> Timer1; App.Leds -> LedsC; } TestActiveScanCoordC.nc000066400000000000000000000073261207233610700340760ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-06-10 09:38:41 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestActiveScanCoordC { uses { interface Boot; interface MLME_RESET; interface MLME_START; interface MLME_SET; interface MLME_GET; interface IEEE154TxBeaconPayload; interface Leds; interface Timer as Led1Timer; } } implementation { event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; call MLME_SET.macShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macAssociationPermit(FALSE); call MLME_SET.macRxOnWhenIdle(TRUE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, 15, // BeaconOrder 15, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment NULL, // no realignment security NULL // no beacon security ); } event void MLME_START.confirm(ieee154_status_t status) {} event void IEEE154TxBeaconPayload.aboutToTransmit() { call Leds.led1On(); call Led1Timer.startOneShot(62500U); } event void Led1Timer.fired(){ call Leds.led1Off(); } event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length){} event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength){} event void IEEE154TxBeaconPayload.beaconTransmitted(){} } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/000077500000000000000000000000001207233610700265655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/Makefile000066400000000000000000000006301207233610700302240ustar00rootroot00000000000000COMPONENT=TestActiveScanDeviceAppC CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include TestActiveScanDeviceAppC.nc000066400000000000000000000046371207233610700336060ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-06-10 09:38:41 $ * @author: Jasper Buesch * ======================================================================== */ configuration TestActiveScanDeviceAppC { } implementation { components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC, new Timer62500C() as Timer1, new Timer62500C() as Timer2, new Timer62500C() as Timer3, new Timer62500C() as Timer4; components TestActiveScanDeviceC as App; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MLME_SCAN -> MAC; App.ScanTimer -> Timer1; App.Led0Timer -> Timer2; App.Led1Timer -> Timer3; App.Led2Timer -> Timer4; } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/TestActiveScanDeviceC.nc000066400000000000000000000112651207233610700332170ustar00rootroot00000000000000/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-01-05 17:12:56 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestActiveScanDeviceC { uses { interface Boot; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MLME_SCAN; interface Leds; interface Timer as ScanTimer; interface Timer as Led1Timer; interface Timer as Led0Timer; interface Timer as Led2Timer; } } implementation { ieee154_PANDescriptor_t m_PANDescriptor[5]; event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS){ call ScanTimer.startPeriodic(125000U); } } event void ScanTimer.fired() { ieee154_phyChannelsSupported_t channelMask; channelMask = ((uint32_t) 1) << RADIO_CHANNEL; call Leds.led2On(); call Led2Timer.startOneShot(62500U); call MLME_SCAN.request ( ACTIVE_SCAN, // ScanType channelMask, // ScanChannels 5, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList 5, // PANDescriptorListNumEntries m_PANDescriptor, // PANDescriptorList 0 // security ); } event void MLME_SCAN.confirm ( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ){ uint8_t scanIndex; uint8_t rightCoordFound = FALSE; for(scanIndex = 0; scanIndex < PANDescriptorListNumEntries; scanIndex++){ if( (PANDescriptorList[scanIndex].CoordAddrMode == ADDR_MODE_SHORT_ADDRESS) && (PANDescriptorList[scanIndex].CoordAddress.shortAddress == COORDINATOR_ADDRESS) && (PANDescriptorList[scanIndex].CoordPANId == PAN_ID) ) { call Leds.led1On(); call Led1Timer.startOneShot(62500U); rightCoordFound = TRUE; break; } } if(rightCoordFound == FALSE) { // call Leds.led0On(); // call Led0Timer.startOneShot(62500U); } } event void Led0Timer.fired(){ call Leds.led0Off(); } event void Led1Timer.fired(){ call Leds.led1Off(); } event void Led2Timer.fired(){ call Leds.led2Off(); } } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/000077500000000000000000000000001207233610700252215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/README.txt000066400000000000000000000026411207233610700267220ustar00rootroot00000000000000README for TestAssociate Author/Contact: Jan Hauer Description: In this application one node takes the role of a PAN coordinator in a nonbeacon-enabled 802.15.4 PAN, it switches its radio to receive mode and waits for devices to request association to its PAN. Whenever a device tries to associate, the PAN coordinator allows association and assigns to the device a unique short address (starting from zero, incremented for every device requesting association). A second node acts as a device, it switches to the pre-defined channel and tries to associate to the PAN. A short time after association the device then disassociates from the PAN. Criteria for a successful test: Assuming one coordinator and one device has been installed, both should simultaneously switch on LED1. About 5 seconds later both should switch LED1 off. That's all. Tools: NONE Usage: 1. Install the coordinator: $ cd coordinator; make install 2. Install one (or more) devices: $ cd device; make install You can change some of the configuration parameters in app_profile.h Known bugs/limitations: - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant $Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/app_profile.h000066400000000000000000000037151207233610700277000ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 17:13:02 $ * @author: Jan Hauer * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { RADIO_CHANNEL = 26, PAN_ID = 0x9678, COORDINATOR_ADDRESS = 0x7722, }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/000077500000000000000000000000001207233610700275445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/Makefile000066400000000000000000000006211207233610700312030ustar00rootroot00000000000000COMPONENT=TestAssociateAppC CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/TestAssociateAppC.nc000066400000000000000000000042771207233610700334170ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 17:13:02 $ * @author: Jan Hauer * ======================================================================== */ configuration TestAssociateAppC { } implementation { components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC; components TestCoordC as App; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MLME_START -> MAC; App.MLME_ASSOCIATE -> MAC; App.MLME_DISASSOCIATE -> MAC; App.MLME_COMM_STATUS -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/TestCoordC.nc000066400000000000000000000121711207233610700321010ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 17:13:02 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestCoordC { uses { interface Boot; interface MLME_RESET; interface MLME_START; interface MLME_ASSOCIATE; interface MLME_DISASSOCIATE; interface MLME_COMM_STATUS; interface MLME_SET; interface MLME_GET; interface Leds; } } implementation { ieee154_address_t m_lastDevice; uint16_t m_shortAddress; event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; call MLME_SET.macShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macAssociationPermit(TRUE); call MLME_SET.macRxOnWhenIdle(TRUE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, 15, // BeaconOrder 15, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment NULL, // no realignment security NULL // no beacon security ); } event void MLME_START.confirm(ieee154_status_t status) { // good, let's wait for association requests ... } event void MLME_ASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ) { call MLME_ASSOCIATE.response(DeviceAddress, m_shortAddress++, IEEE154_ASSOCIATION_SUCCESSFUL, 0); } event void MLME_DISASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, ieee154_security_t *security ) { call Leds.led1Off(); } event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security ) { if (status == IEEE154_SUCCESS){ // association was successful call Leds.led1On(); m_lastDevice.extendedAddress = DstAddr.extendedAddress; } else { call Leds.led1Off(); } } event void MLME_DISASSOCIATE.confirm ( ieee154_status_t status, uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress ){} event void MLME_ASSOCIATE.confirm ( uint16_t AssocShortAddress, uint8_t status, ieee154_security_t *security ){} } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/000077500000000000000000000000001207233610700264605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/Makefile000066400000000000000000000006211207233610700301170ustar00rootroot00000000000000COMPONENT=TestAssociateAppC CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/TestAssociateAppC.nc000066400000000000000000000043641207233610700323300ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-05-18 17:13:02 $ * @author: Jan Hauer * ======================================================================== */ configuration TestAssociateAppC { } implementation { components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC, new Timer62500C() as Timer; components TestDeviceC as App; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.DisassociateTimer -> Timer; App.MLME_ASSOCIATE -> MAC; App.MLME_DISASSOCIATE -> MAC; App.MLME_COMM_STATUS -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/TestDeviceC.nc000066400000000000000000000127311207233610700311500ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-09-10 12:00:49 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestDeviceC { uses { interface Boot; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MLME_ASSOCIATE; interface MLME_DISASSOCIATE; interface MLME_COMM_STATUS; interface Leds; interface Timer as DisassociateTimer; } } implementation { ieee154_CapabilityInformation_t m_capabilityInformation; void startApp(); event void Boot.booted() { m_capabilityInformation.AlternatePANCoordinator = 0; m_capabilityInformation.DeviceType = 0; m_capabilityInformation.PowerSource = 0; m_capabilityInformation.ReceiverOnWhenIdle = 0; m_capabilityInformation.Reserved = 0; m_capabilityInformation.SecurityCapability = 0; m_capabilityInformation.AllocateAddress = 1; call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS) startApp(); } void startApp() { ieee154_address_t coordAdr; coordAdr.shortAddress = COORDINATOR_ADDRESS; call MLME_SET.phyCurrentChannel(RADIO_CHANNEL); call MLME_SET.macAutoRequest(FALSE); call MLME_SET.macPANId(PAN_ID); call MLME_SET.macCoordShortAddress(COORDINATOR_ADDRESS); call MLME_ASSOCIATE.request( RADIO_CHANNEL, call MLME_GET.phyCurrentPage(), ADDR_MODE_SHORT_ADDRESS, PAN_ID, coordAdr, m_capabilityInformation, NULL // security ); } event void MLME_ASSOCIATE.confirm ( uint16_t AssocShortAddress, uint8_t status, ieee154_security_t *security ) { if ( status == IEEE154_SUCCESS ){ // we are now associated - set a timer for disassociation call Leds.led1On(); call DisassociateTimer.startOneShot(312500U); } else { startApp(); // retry } } event void DisassociateTimer.fired() { ieee154_address_t coordAdr; coordAdr.shortAddress = COORDINATOR_ADDRESS; if (call MLME_DISASSOCIATE.request ( ADDR_MODE_SHORT_ADDRESS, PAN_ID, coordAdr, IEEE154_DEVICE_WISHES_TO_LEAVE, FALSE, NULL ) != IEEE154_SUCCESS) call DisassociateTimer.startOneShot(312500U); } event void MLME_DISASSOCIATE.confirm ( ieee154_status_t status, uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress ) { if (status == IEEE154_SUCCESS){ call Leds.led1Off(); } else { call DisassociateTimer.startOneShot(312500U); } } event void MLME_ASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ){} event void MLME_DISASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, ieee154_security_t *security ){} event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security ) {} } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/000077500000000000000000000000001207233610700256415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/README.txt000066400000000000000000000023611207233610700273410ustar00rootroot00000000000000README for TestIndirectData Author/Contact: Jan Hauer Description: In this application one node takes the role of a PAN coordinator in a nonbeacon-enabled 802.15.4 PAN, every 3 seconds it sends a packet to a device using indirect transmission (i.e. the packet is buffered until it is polled by the device). A second node acts as the device, it switches to the pre-defined channel and polls the coordinator every 1 second for outstanding indirect transmissions. Criteria for a successful test: Assuming one coordinator and one device has been installed, the coordinator should briefly flash LED1 every 3 seconds. The device should briefly flash LED2 every 1 second. Tools: NONE Usage: 1. Install the coordinator: $ cd coordinator; make install 2. Install one (or more) devices: $ cd device; make install You can change some of the configuration parameters in app_profile.h Known bugs/limitations: - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant $Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/app_profile.h000066400000000000000000000037711207233610700303220ustar00rootroot00000000000000/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-06-10 09:23:45 $ * @author: Jasper Buesch * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { RADIO_CHANNEL = 26, PAN_ID = 0x4927, COORDINATOR_ADDRESS = 0x6287, DEVICE_ADDRESS = 0x6288 }; #endif tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/000077500000000000000000000000001207233610700301645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/Makefile000066400000000000000000000006311207233610700316240ustar00rootroot00000000000000COMPONENT=TestIndirectDataCoordAppC CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include TestIndirectDataCoordAppC.nc000066400000000000000000000046311207233610700353610ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-06-10 09:23:45 $ * @author: Jasper Buesch * ======================================================================== */ configuration TestIndirectDataCoordAppC { } implementation { components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC; components TestIndirectDataCoordC as App; components new Timer62500C() as Timer1; components new Timer62500C() as Timer2; components new Timer62500C() as Timer3; MainC.Boot <- App; App.MCPS_DATA -> MAC; App.Frame -> MAC; App.Packet -> MAC; App.DataTimer -> Timer1; App.Led1Timer -> Timer2; App.Led0Timer -> Timer3; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MLME_START -> MAC; } TestIndirectDataCoordC.nc000066400000000000000000000130241207233610700347140ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-06-10 09:23:45 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestIndirectDataCoordC { uses { interface Boot; interface MLME_RESET; interface MLME_START; interface MLME_SET; interface MLME_GET; interface MCPS_DATA; interface IEEE154Frame as Frame; interface Leds; interface Packet; interface Timer as DataTimer; interface Timer as Led1Timer; interface Timer as Led0Timer; } } implementation { message_t frame; uint8_t *payloadRegion; uint8_t m_payloadLen; char payload[] = "TestIndirect, Coordinator talking now!"; void sendIndirectData(); event void Boot.booted() { m_payloadLen = strlen(payload); payloadRegion = call Packet.getPayload(&frame, m_payloadLen); if (m_payloadLen <= call Packet.maxPayloadLength()){ memcpy(payloadRegion, payload, m_payloadLen); call MLME_RESET.request(TRUE); } } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) return; call MLME_SET.macShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macAssociationPermit(FALSE); call MLME_SET.macRxOnWhenIdle(TRUE); call MLME_START.request( PAN_ID, // PANId RADIO_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, 15, // BeaconOrder 15, // SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment NULL, // no realignment security NULL // no beacon security ); } void sendIndirectData(){ ieee154_address_t deviceAddress; deviceAddress.shortAddress = DEVICE_ADDRESS; call Frame.setAddressingFields( &frame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, PAN_ID, // DstPANId, &deviceAddress, // DstAddr, NULL // security ); call MCPS_DATA.request( &frame, // frame, strlen(payload), // payloadLength, 0, // msduHandle, TX_OPTIONS_INDIRECT | TX_OPTIONS_ACK // TxOptions, ); call Leds.led1On(); call Led1Timer.startOneShot(12500U); } event void MLME_START.confirm(ieee154_status_t status) { sendIndirectData(); } event void DataTimer.fired(){ sendIndirectData(); } event void Led1Timer.fired(){ call Leds.led1Off(); } event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ) { if(status == IEEE154_TRANSACTION_EXPIRED){ call Leds.led0On(); call Led0Timer.startOneShot(125000U); sendIndirectData(); }else if (status == IEEE154_SUCCESS){ call DataTimer.startOneShot(125000U); } } event void Led0Timer.fired(){ call Leds.led0Off(); } event message_t* MCPS_DATA.indication ( message_t* frame__ ){ return frame__; } } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/000077500000000000000000000000001207233610700271005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/Makefile000066400000000000000000000006321207233610700305410ustar00rootroot00000000000000COMPONENT=TestIndirectDataDeviceAppC CFLAGS += -I$(shell pwd)/.. # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include TestIndirectDataDeviceAppC.nc000066400000000000000000000044551207233610700344320ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-06-10 09:23:45 $ * @author: Jasper Buesch * ======================================================================== */ configuration TestIndirectDataDeviceAppC { } implementation { components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC, new Timer62500C() as Timer1, new Timer62500C() as Timer2; components TestIndirectDataDeviceC as App; MainC.Boot <- App; App.MCPS_DATA -> MAC; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.PollTimer -> Timer1; App.Led2Timer -> Timer2; App.MLME_POLL -> MAC; } TestIndirectDataDeviceC.nc000066400000000000000000000072131207233610700337640ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-09-10 12:00:50 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module TestIndirectDataDeviceC { uses { interface Boot; interface MCPS_DATA; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MLME_POLL; interface Leds; interface Timer as PollTimer; interface Timer as Led2Timer; } } implementation { void startApp(); event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status == IEEE154_SUCCESS) startApp(); } void startApp() { call MLME_SET.phyCurrentChannel(RADIO_CHANNEL); call MLME_SET.macAutoRequest(FALSE); call MLME_SET.macPANId(PAN_ID); call MLME_SET.macCoordShortAddress(COORDINATOR_ADDRESS); call MLME_SET.macShortAddress(DEVICE_ADDRESS); call PollTimer.startPeriodic(62500U); } event void PollTimer.fired(){ // check the coordinator for outstanding transmissions ieee154_address_t coordAdr; coordAdr.shortAddress = COORDINATOR_ADDRESS; call MLME_POLL.request ( ADDR_MODE_SHORT_ADDRESS, PAN_ID, coordAdr, NULL ); } event void MLME_POLL.confirm ( ieee154_status_t status ){} event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ){} event message_t* MCPS_DATA.indication ( message_t* frame__ ){ call Leds.led2On(); call Led2Timer.startOneShot(12500U); return frame__; } event void Led2Timer.fired(){ call Leds.led2Off(); } } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/000077500000000000000000000000001207233610700256365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/Makefile000066400000000000000000000012661207233610700273030ustar00rootroot00000000000000COMPONENT=TestPromiscuousAppC CFLAGS += -I$(TOSDIR)/lib/printf -DPRINTF_BUFFER_SIZE=1000 CFLAGS += -DIEEE154_SCAN_DISABLED -DIEEE154_BEACON_SYNC_DISABLED -DIEEE154_BEACON_TX_DISABLED -DIEEE154_RXENABLE_DISABLED -DIEEE154_ASSOCIATION_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED -DIEEE154_COORD_BROADCAST_DISABLED # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/README.txt000066400000000000000000000026111207233610700273340ustar00rootroot00000000000000README for TestPromiscuous Author/Contact: Jan Hauer Description: In this application the node enables promiscuous mode, i.e. its radio is switched to receive mode and all incoming frames that pass the CRC check are signalled to the upper layer. The application uses the TinyOS printf library (tos/lib/printf) to output information on the MAC header fields and payload for every received frame over the serial port. The second (TelosB: green) LED is toggled whenever a frame is received. Criteria for a successful test: A successful test means that for every received frame LED1 is toggled and the java application outputs some text. To see this effect you need a second node sending a packet, for example, use the ../../beacon-enabled/TestStartSync/coordinator application to send periodic beacon packets. In this case LED1 should toggle every half second and printf java client should output some text on the frame content. Tools: The printf java client in $TOSDIR/../apps/tests/TestPrintf Usage: Install the application on a node $ make install Start the printf client, e.g. $ java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSBXXX: (http://docs.tinyos.net/ has a section on how to use the TinyOS printf library) Known bugs/limitations: - The timestamps for ACKs are incorrect $Id: README.txt,v 1.2 2010-01-05 17:12:56 janhauer Exp $ tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/TestPromiscuousAppC.nc000066400000000000000000000044301207233610700321150ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-10-29 17:42:56 $ * @author: Jan Hauer * ======================================================================== */ #define NEW_PRINTF_SEMANTICS #include "printf.h" configuration TestPromiscuousAppC { } implementation { components MainC, TestPromiscuousC as App, LedsC, Ieee802154NonBeaconEnabledC as MAC; components PrintfC; components SerialStartC; MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MCPS_DATA -> MAC; App.Frame -> MAC; App.BeaconFrame -> MAC; App.PromiscuousMode -> MAC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/TestPromiscuousC.nc000066400000000000000000000137741207233610700314670ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-10-29 17:42:56 $ * @author: Jan Hauer * ======================================================================== */ #include "printf.h" #include "TKN154.h" module TestPromiscuousC { uses { interface Boot; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MCPS_DATA; interface Leds; interface IEEE154Frame as Frame; interface IEEE154BeaconFrame as BeaconFrame; interface SplitControl as PromiscuousMode; } } implementation { const char *m_frametype[] = {"Beacon", "Data","Acknowledgement","MAC command", "Unknown"}; const char *m_cmdframetype[] = {"unknown command", "Association request","Association response", "Disassociation notification","Data request","PAN ID conflict notification", "Orphan notification", "Beacon request", "Coordinator realignment", "GTS request"}; enum { RADIO_CHANNEL = 26, }; event void Boot.booted() { call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { call MLME_SET.phyCurrentChannel(RADIO_CHANNEL); call PromiscuousMode.start(); } event message_t* MCPS_DATA.indication (message_t* frame) { uint8_t i; uint8_t *payload = call Frame.getPayload(frame); uint8_t payloadLen = call Frame.getPayloadLength(frame); uint8_t *header = call Frame.getHeader(frame); uint8_t headerLen = call Frame.getHeaderLength(frame); uint8_t SrcAddrMode, DstAddrMode; uint8_t frameType, cmdFrameType; ieee154_address_t SrcAddress, DstAddress; uint16_t SrcPANId=0, DstPANId=0; if (call Frame.hasStandardCompliantHeader(frame)){ frameType = call Frame.getFrameType(frame); if (frameType > FRAMETYPE_CMD) frameType = 4; call Frame.getSrcPANId(frame, &SrcPANId); call Frame.getDstPANId(frame, &DstPANId); call Frame.getSrcAddr(frame, &SrcAddress); call Frame.getDstAddr(frame, &DstAddress); SrcAddrMode = call Frame.getSrcAddrMode(frame); DstAddrMode = call Frame.getDstAddrMode(frame); printf("\n"); printf("Frametype: %s", m_frametype[frameType]); if (frameType == FRAMETYPE_CMD){ cmdFrameType = payload[0]; if (cmdFrameType > 9) cmdFrameType = 0; printf(" (%s)", m_cmdframetype[cmdFrameType]); } printf("\n"); printf("SrcAddrMode: %d\n", SrcAddrMode); printf("SrcAddr: "); if (SrcAddrMode == ADDR_MODE_SHORT_ADDRESS){ printf("0x%02X\n", SrcAddress.shortAddress); printf("SrcPANId: 0x%02X\n", SrcPANId); } else if (SrcAddrMode == ADDR_MODE_EXTENDED_ADDRESS){ for (i=0; i<8; i++) printf("0x%02X ", ((uint8_t*) &(SrcAddress.extendedAddress))[i]); printf("\n"); printf("SrcPANId: 0x%02X\n", SrcPANId); } else printf("\n"); printf("DstAddrMode: %d\n", DstAddrMode); printf("DstAddr: "); if ( DstAddrMode == ADDR_MODE_SHORT_ADDRESS){ printf("0x%02X\n", DstAddress.shortAddress); printf("DestPANId: 0x%02X\n", DstPANId); } else if ( DstAddrMode == ADDR_MODE_EXTENDED_ADDRESS) { for (i=0; i<8; i++) printf("0x%02X ", ((uint8_t*) &(DstAddress.extendedAddress))[i]); printf("\n"); printf("DestPANId: 0x%02X\n", DstPANId); } else printf("\n"); printf("DSN: %d\n", call Frame.getDSN(frame)); printf("MHRLen: %d\n", headerLen); printf("MHR: "); for (i=0; i verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/apps/tests/tkn154/packetsniffer/README.txt000066400000000000000000000050751207233610700234450ustar00rootroot00000000000000README for Sniffer Author/Contact: tinyos-help@millennium.berkeley.edu Description: This application uses a single node to passively monitor all traffic on a given wireless channel and forward the content of any received IEEE 802.15.4 frame over the serial line. The information that is forwarded per received frame is the following: 1. the length of the MAC header + MAC payload portion 2. the entire MAC header 3. the entire MAC payload 4. some frame-specific metadata (RSSI, LQI, timestamp, etc.) On the PC-side (a) with a few changes "$TOSROOT/apps/BaseStation15.4/seriallisten15-4.c" can be adapted to display textual information on the frame content (if this is sufficient for you, also take a look at ../nonbeacon-enabled/TestPromiscuous app); (b) there exists a tool that visualizes the frame fields in a JAVA GUI, it's available here: http://www.z-monitor.org (c) another option might be to update wireshark to display frames received by this application (but I have not started to look into this). The exact format of the data exchanged over the serial line is best explained on an example: assuming a MAC DATA frame of MPDU size 15 byte (= PHY length field) with a 9 byte MAC header (including destination PAN, destination address and source address) and a 4 byte MAC payload the data sent by the mote to the PC over serial would be as follows: 0x02 0x0d 0x41 0x88 0x44 0x22 0x00 0xff 0xff 0x01 0x00 0x3f 0x06 0x01 0x45 0x6a 0xee 0x01 0x09 0x1a 0x56 0x20 0xcc 0x00 The first byte is always "0x02". This is a dispatch ID which tells that the serial packet is not an active message (AM), but an 802.15.4 frame. In particular, this means that a SerialForwarder will not accept the packet (because it would expect a "0x00" there, see Serial.h). The next byte ("0x0d" = 13) is the size of the MAC header + payload portion. Note that the MAC footer (CRC) is *not* taken into consideration, i.e. the second byte is identical to the PHY length field minus 2. What follows is the MAC header ("0x41 0x88 0x44 0x22 0x00 0xff 0xff 0x01 0x00") and MAC payload ("0x3f 0x06 0x01 0x45"). The remaining 9 byte are the matadata contained in the nx_struct "sniffer_metadata" defined in the "./app_profile.h" file. Note that, like the 802.15.4 formatting convention, the metadata is little-endian encoded. Criteria for a successful test: LED2 should always be on; LED1 should toggle every time a packet is received (and forwarded over serial line); LED0 denotes an error and should never be on. Known bugs/limitations: - The timestamps for ACKs are incorrect $Id: README.txt,v 1.1 2009/10/29 17:42:56 janhauer Exp $ tinyos-2.1.2+dfsg/apps/tests/tkn154/packetsniffer/SerialPacketInfo802_15_4P.nc000066400000000000000000000041461207233610700265540ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009/10/29 17:42:56 $ * @author: Jan Hauer * ======================================================================== */ /** * This component is shadowing tos/lib/serial/SerialPacketInfo802_15_4P * to forward the SerialPacketInfo interface to our sniffer */ configuration SerialPacketInfo802_15_4P { provides interface SerialPacketInfo as Info; } implementation { components SnifferC; Info = SnifferC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/packetsniffer/SnifferAppC.nc000066400000000000000000000047461207233610700244350ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009/10/29 17:42:56 $ * @author: Jan Hauer * ======================================================================== */ #include "app_profile.h" #include "platform_message.h" #include "message.h" configuration SnifferAppC { } implementation { components MainC, SnifferC as App, LedsC, Ieee802154NonBeaconEnabledC as MAC, Serial802_15_4C as Serial, new QueueC(message_t*, RX_QUEUE_SIZE), new PoolC(message_t, RX_QUEUE_SIZE); MainC.Boot <- App; App.Leds -> LedsC; App.MLME_RESET -> MAC; App.MLME_SET -> MAC; App.MLME_GET -> MAC; App.MCPS_DATA -> MAC; App.Frame -> MAC; App.BeaconFrame -> MAC; App.PromiscuousMode -> MAC; App.SerialControl -> Serial; App.SerialSend -> Serial; App.Pool -> PoolC; App.Queue -> QueueC; } tinyos-2.1.2+dfsg/apps/tests/tkn154/packetsniffer/SnifferC.nc000066400000000000000000000163451207233610700237720ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009/10/29 17:42:56 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154.h" #include "app_profile.h" module SnifferC { provides interface SerialPacketInfo; uses { interface Boot; interface MLME_RESET; interface MLME_SET; interface MLME_GET; interface MCPS_DATA; interface Leds; interface Queue as Queue; interface Pool as Pool; interface IEEE154Frame as Frame; interface IEEE154BeaconFrame as BeaconFrame; interface SplitControl as PromiscuousMode; interface SplitControl as SerialControl; interface Send as SerialSend; } } implementation { bool m_serialSendBusy; task void serialSendTask(); event void Boot.booted() { m_serialSendBusy = FALSE; if (call Pool.maxSize() != call Queue.maxSize() || call SerialControl.start() != SUCCESS) call Leds.led0On(); // error } event void SerialControl.startDone(error_t error) { if (error != SUCCESS) call Leds.led0On(); // error else call MLME_RESET.request(TRUE); } event void MLME_RESET.confirm(ieee154_status_t status) { if (status != IEEE154_SUCCESS) call Leds.led0On(); // error else { call MLME_SET.phyCurrentChannel(INITAL_RADIO_CHANNEL); if (call PromiscuousMode.start() != SUCCESS) call Leds.led0On(); // error } } event void PromiscuousMode.startDone(error_t error) { // ready - we're now in "sniffing mode" ... call Leds.led2On(); } event message_t* MCPS_DATA.indication (message_t* frame) { // -> received a frame: queue it and post a task to // forward it over serial call Leds.led1Toggle(); if (call Queue.enqueue(frame) != SUCCESS) { call Leds.led0On(); // overflow return frame; } else { post serialSendTask(); return call Pool.get(); } } task void serialSendTask() { message_t* frame; sniffer_metadata_t *snifferMetadata; uint8_t headerLen; uint8_t payloadLen; uint8_t serialLen; ieee154_metadata_t *radioMetadata; uint8_t rssi, lqi; uint8_t *header; uint32_t timestamp; uint8_t *phyLenField; if (call Queue.empty() || m_serialSendBusy) return; frame = call Queue.head(); radioMetadata = (ieee154_metadata_t*) &frame->metadata; rssi = radioMetadata->rssi; lqi = radioMetadata->linkQuality; timestamp = radioMetadata->timestamp; headerLen = call Frame.getHeaderLength(frame); payloadLen = call Frame.getPayloadLength(frame); header = call Frame.getHeader(frame); // update PHY length field: set it to the length of // MHR + payload (ignoring CRC footer) phyLenField = (uint8_t*) frame + call SerialPacketInfo.offset(); *phyLenField = headerLen + payloadLen; // need to move the payload to the front, because there can be a // gap between the end of the header and the start of the payload // section (-> do not touch the frame via Frame interface afterwards) memmove(header + headerLen, call Frame.getPayload(frame), payloadLen); snifferMetadata = (sniffer_metadata_t *) (header + headerLen + payloadLen); if ((uint8_t*) snifferMetadata + sizeof(sniffer_metadata_t) > (uint8_t*) frame + sizeof(message_t)) { // message_t is too small to hold frame content + sniffer_metadata_t // (this cannot happen, unless someone messes with the header files) call Leds.led0On(); return; } snifferMetadata->lqi = lqi; snifferMetadata->rssi = rssi - 45; // substract offset (see CC2420 datasheet) // IEEE 802.15.4 Std: incoming packets with incorrect CRC // are discarded even in promiscuous mode (so all frames // we get here must have passed the CRC check already) snifferMetadata->crc = 1; snifferMetadata->mhrLen = headerLen; snifferMetadata->channel = call MLME_GET.phyCurrentChannel(); snifferMetadata->timestamp = timestamp; serialLen = 1 + // for the PHY length field headerLen + payloadLen + sizeof(sniffer_metadata_t); m_serialSendBusy = TRUE; if (call SerialSend.send(frame, serialLen) != SUCCESS) call Leds.led0On(); } event void SerialSend.sendDone(message_t* frame, error_t error) { if (error != SUCCESS) call Leds.led0On(); else { call Pool.put(call Queue.dequeue()); m_serialSendBusy = FALSE; if (!call Queue.empty()) post serialSendTask(); } } async command uint8_t SerialPacketInfo.offset() { return offsetof(message_t, header) + offsetof(message_header_t, ieee154) + offsetof(ieee154_header_t, length); } async command uint8_t SerialPacketInfo.dataLinkLength(message_t* frame, uint8_t upperLen) { // returns size of the serial PDU uint8_t length = *((uint8_t*) frame + call SerialPacketInfo.offset()); return 1 + length + sizeof(sniffer_metadata_t); // 1 for the length-field itself } async command uint8_t SerialPacketInfo.upperLength(message_t* msg, uint8_t dataLinkLen) { // returns size of the serial PDU minus the MAC header length uint8_t *phyLenField = (uint8_t*) msg + call SerialPacketInfo.offset(); sniffer_metadata_t *snifferMetadata = (sniffer_metadata_t *) (phyLenField + *phyLenField); return *phyLenField + sizeof(sniffer_metadata_t) - snifferMetadata->mhrLen; } event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp){} event void PromiscuousMode.stopDone(error_t error) {} event void SerialControl.stopDone(error_t error) {} } tinyos-2.1.2+dfsg/apps/tests/tkn154/packetsniffer/app_profile.h000066400000000000000000000050441207233610700244140ustar00rootroot00000000000000/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009/06/10 09:23:45 $ * @author: Jasper Buesch * ======================================================================== */ #ifndef __APP_PROFILE_H #define __APP_PROFILE_H enum { INITAL_RADIO_CHANNEL = 26, // may be changed later via command over serial line RX_QUEUE_SIZE = 10, // max. packets queued after received over radio }; typedef nx_struct sniffer_metadata { nxle_uint8_t lqi; // LQI (see CC2420 datasheet for definition) nxle_int8_t rssi; // RSSI in dBm nxle_uint8_t crc; // 0: CRC check failed, 1: CRC check passed nxle_uint8_t mhrLen; // length of the MAC header (for convenience) nxle_uint8_t channel; // 802.15.4 channel on which the frame was received (11..26) nxle_uint32_t timestamp; // elapsed time since booting in symbols (1 tick = 16 us) } sniffer_metadata_t; #endif tinyos-2.1.2+dfsg/apps/tests/ucmini/000077500000000000000000000000001207233610700173525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/ucmini/SensorTest/000077500000000000000000000000001207233610700214635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/ucmini/SensorTest/Makefile000066400000000000000000000010061207233610700231200ustar00rootroot00000000000000COMPONENT=UcminiSensorC BUILD_EXTRA_DEPS += UcminiSensor.class CLEAN_EXTRA = *.class UcminiSensorMeas.java UcminiSensorCalib.java UcminiSensor.class: UcminiSensor.java UcminiSensorCalib.java UcminiSensorMeas.java javac UcminiSensor.java UcminiSensorMeas.java: mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=UcminiSensorMeas UcminiSensor.h measurement -o $@ UcminiSensorCalib.java: mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=UcminiSensorCalib UcminiSensor.h calib -o $@ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/ucmini/SensorTest/TODO000066400000000000000000000000241207233610700221470ustar00rootroot00000000000000Voltage meter BMA180tinyos-2.1.2+dfsg/apps/tests/ucmini/SensorTest/UcminiSensor.h000066400000000000000000000036241207233610700242570ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #ifndef UCMINISENSOR_H #define UCMINISENSOR_H typedef nx_struct measurement { nx_uint32_t press; nx_int16_t temp2; nx_uint16_t temp; nx_uint16_t humi; nx_uint16_t light; nx_uint16_t temp3; nx_uint16_t voltage; } measurement_t; typedef nx_struct calib { nx_uint16_t coefficient[6]; } calib_t; enum{ AM_MEASUREMENT = 10, AM_CALIB = 11, }; #endif tinyos-2.1.2+dfsg/apps/tests/ucmini/SensorTest/UcminiSensor.java000066400000000000000000000111361207233610700247460ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ import java.io.IOException; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class UcminiSensor implements MessageListener { private MoteIF moteIF; private long calibration[]=new long[6]; public UcminiSensor(MoteIF moteIF) { this.moteIF = moteIF; this.moteIF.registerListener(new UcminiSensorCalib(), this); this.moteIF.registerListener(new UcminiSensorMeas(), this); UcminiSensorCalib payload=new UcminiSensorCalib(); try{ this.moteIF.send(0xffff, payload); } catch (IOException exception) { System.err.println("Exception thrown when sending packets. Exiting."); System.err.println(exception); System.exit(1); } } public void messageReceived(int to, Message message) { if(message instanceof UcminiSensorCalib){ UcminiSensorCalib msg = (UcminiSensorCalib)message; calibration[0]=msg.getElement_coefficient(0); calibration[1]=msg.getElement_coefficient(1); calibration[2]=msg.getElement_coefficient(2); calibration[3]=msg.getElement_coefficient(3); calibration[4]=msg.getElement_coefficient(4); calibration[5]=msg.getElement_coefficient(5); System.out.println("Ms5607 calibration:"); System.out.println("c1="+calibration[0]+"; c2="+calibration[1]+"; c3="+calibration[2]+"; c4="+calibration[3]+ "; c5="+calibration[4]+"; c6="+calibration[5]); } else if(message instanceof UcminiSensorMeas){ UcminiSensorMeas msg = (UcminiSensorMeas)message; double rh=-6+125*((double)msg.get_humi()/65536); System.out.format("Humidity (sht21):\t\t%8.3f %% \t(%d)\n",rh, msg.get_humi()); double temp=-46.85+175.72*((double)msg.get_temp()/65536); System.out.format("Temperature (sht21):\t\t%8.3f \u00B0C \t(%d)\n",temp,msg.get_temp()); double temp3=1.13*msg.get_temp3()-272.8; System.out.format("Temperature (atmega128rfa1):\t%8.3f \u00B0C \t(%d)\n", temp3, msg.get_temp3()); System.out.format("Temperature (ms5607):\t\t%8.3f \u00B0C \t(%d)\n",(double)msg.get_temp2()/100,msg.get_temp2()); System.out.format("Pressure (ms5607):\t\t%8.3f mbar \t(%d)\n",(double)msg.get_press()/100,msg.get_press()); System.out.format("Light (bh1750fvi):\t\t%8d lx\n",msg.get_light()); // System.out.println("Voltage (atmega128rfa1):\t"+msg.get_voltage()); System.out.println(); } } private static void usage() { System.err.println("usage: UcminiSensor [-comm ]. Default source: serial@/dev/ttyUSB0:ucmini"); } public static void main(String[] args) throws Exception { String source = null; if (args.length == 2) { if (!args[0].equals("-comm")) { usage(); System.exit(1); } source = args[1]; } else if (args.length != 0) { usage(); System.exit(1); } PhoenixSource phoenix; if (source == null) { source = "serial@/dev/ttyUSB0:ucmini"; } phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); MoteIF mif = new MoteIF(phoenix); UcminiSensor serial = new UcminiSensor(mif); } } tinyos-2.1.2+dfsg/apps/tests/ucmini/SensorTest/UcminiSensorC.nc000066400000000000000000000052121207233610700245260ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "UcminiSensor.h" configuration UcminiSensorC { } implementation { components UcminiSensorP, MainC, LedsC, new TimerMilliC(); components new AtmegaTemperatureC(), new AtmegaVoltageC(), new LightC(), new PressureC(), new Ms5607TemperatureC() as Temperature1C, new Ms5607CalibrationC(), new TemperatureC(), new HumidityC(); components SerialStartC, new SerialAMSenderC(AM_MEASUREMENT) as MeasSend, new SerialAMSenderC(AM_CALIB) as CalibSend, new SerialAMReceiverC(AM_CALIB); UcminiSensorP.Boot -> MainC; UcminiSensorP.TempRead -> TemperatureC; UcminiSensorP.HumiRead -> HumidityC; UcminiSensorP.LightRead -> LightC; UcminiSensorP.PressRead -> PressureC; UcminiSensorP.Temp2Read -> Temperature1C; UcminiSensorP.ReadRef -> Ms5607CalibrationC; UcminiSensorP.Temp3Read -> AtmegaTemperatureC; UcminiSensorP.VoltageRead -> AtmegaVoltageC; UcminiSensorP.Timer->TimerMilliC; UcminiSensorP.MeasSend->MeasSend; UcminiSensorP.CalibSend->CalibSend; UcminiSensorP.Receive->SerialAMReceiverC; UcminiSensorP.Packet->MeasSend; UcminiSensorP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tests/ucmini/SensorTest/UcminiSensorP.nc000066400000000000000000000107471207233610700245540ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Ms5607.h" module UcminiSensorP { uses { interface Boot; interface Read as TempRead; interface Read as HumiRead; interface Read as LightRead; interface Read as PressRead; interface Read as Temp2Read; interface Read as Temp3Read; interface Read as VoltageRead; interface ReadRef; interface DiagMsg; interface AMSend as CalibSend; interface AMSend as MeasSend; interface Receive; interface Packet; interface Timer; interface Leds; } } implementation { measurement_t *meas; message_t message, calibmessage; calibration_t *calib; bool starting=TRUE; event void Boot.booted() { calib = (calibration_t*)call Packet.getPayload(&calibmessage, sizeof(calibration_t)); meas = (measurement_t*)call Packet.getPayload(&message, sizeof(measurement_t)); call ReadRef.read(calib); } event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ if(!starting) call CalibSend.send(AM_BROADCAST_ADDR, &calibmessage, sizeof(calibration_t)); return msg; } event void ReadRef.readDone(error_t error, calibration_t *data){ call CalibSend.send(AM_BROADCAST_ADDR, &calibmessage, sizeof(calibration_t)); } event void CalibSend.sendDone(message_t* msg, error_t error){ if(starting) call Timer.startPeriodic(512); } event void Timer.fired(){ if(!starting) call MeasSend.send(AM_BROADCAST_ADDR, &message, sizeof(measurement_t)); else starting=FALSE; call TempRead.read(); call HumiRead.read(); call LightRead.read(); call PressRead.read(); call Temp2Read.read(); call Temp3Read.read(); call VoltageRead.read(); } event void TempRead.readDone(error_t error, uint16_t data){ if(error==SUCCESS){ meas->temp=data; } else call Leds.led3Toggle(); } event void HumiRead.readDone(error_t error, uint16_t data) { if(error==SUCCESS){ meas->humi=data; } else call Leds.led3Toggle(); } event void LightRead.readDone(error_t error, uint16_t data) { if(error==SUCCESS){ meas->light=data; } else call Leds.led3Toggle(); } event void PressRead.readDone(error_t error, uint32_t data) { if(error==SUCCESS){ meas->press=data; } else call Leds.led3Toggle(); } event void Temp2Read.readDone(error_t error, int16_t data) { if(error==SUCCESS){ meas->temp2=data; } else call Leds.led3Toggle(); } event void VoltageRead.readDone(error_t error, uint16_t data) { if(error==SUCCESS){ meas->voltage=data; } else call Leds.led3Toggle(); } event void Temp3Read.readDone(error_t error, uint16_t data) { if(error==SUCCESS){ meas->temp3=data; } else call Leds.led3Toggle(); } event void MeasSend.sendDone(message_t* msg, error_t error){} } tinyos-2.1.2+dfsg/apps/tests/z1/000077500000000000000000000000001207233610700164205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/000077500000000000000000000000001207233610700211725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345-XYZ/000077500000000000000000000000001207233610700235065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345-XYZ/Makefile000066400000000000000000000001521207233610700251440ustar00rootroot00000000000000COMPONENT=TestADXL345AppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345-XYZ/README000066400000000000000000000010751207233610700243710ustar00rootroot00000000000000README for ADXL35 sensor test app Author/Contact: Antonio Linan Description: This application simple polls periodically the ADXL345 sensor for data and toggles the red led when all axis are read The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none The ADXL345 sensor is a temperature sensor and its already integrated as part of the Zolertia Z1 mote. Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345AppC.nc000066400000000000000000000041211207233610700264160ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to read at the same time all axis of the * ADXL345 sssAccelerometer built-in Zolertia Z1 motes * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TestADXL345AppC {} implementation { components MainC, TestADXL345C as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; components new TimerMilliC() as TestTimer; App.TestTimer -> TestTimer; components new ADXL345C(); App.axis -> ADXL345C.XYZ; App.AccelControl -> ADXL345C.SplitControl; } tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345-XYZ/TestADXL345C.nc000066400000000000000000000060221207233610700257570ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to read at the same time all axis of the * ADXL345 Accelerometer built-in Zolertia Z1 motes * * @author: Antonio Linan */ #include "PrintfUART.h" #include "ADXL345.h" module TestADXL345C { uses { interface Leds; interface Boot; interface Timer as TestTimer; interface Read as axis; interface HplMsp430GeneralIO as PinTest1; interface HplMsp430GeneralIO as PinTest2; interface SplitControl as AccelControl; } } implementation { void printTitles(){ printfUART("\n\n"); printfUART(" ###############################\n"); printfUART(" # Z1 ADXL345 Test #\n"); printfUART(" ###############################\n"); printfUART("\n"); } event void Boot.booted() { uint8_t state = 0; printfUART_init(); printTitles(); call TestTimer.startPeriodic(1024); } event void TestTimer.fired(){ call AccelControl.start(); } event void AccelControl.startDone(error_t err) { if (err == SUCCESS){ call axis.read(); } else { printfUART("Bad start\n"); } } event void AccelControl.stopDone(error_t err) {} event void axis.readDone(error_t result, adxl345_readxyt_t data){ if (result == SUCCESS){ call Leds.led0Toggle(); printfUART("X [%d] Y [%d] Z [%d]\n", data.x_axis, data.y_axis, data.z_axis); } else { printfUART("Error reading axis\n"); } } } tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345/000077500000000000000000000000001207233610700230165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345/Makefile000066400000000000000000000001521207233610700244540ustar00rootroot00000000000000COMPONENT=TestADXL345AppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345/README000066400000000000000000000011761207233610700237030ustar00rootroot00000000000000README for ADXL35 sensor test app Author/Contact: Antonio Linan Description: This application simple polls periodically the ADXL345 sensor for data and toggles a led when a specific axis is read: * X axis: red led. * Y axis: green led. * Z axis: blue led. The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none The ADXL345 sensor is a temperature sensor and its already integrated as part of the Zolertia Z1 mote. Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345/TestADXL345AppC.nc000066400000000000000000000041771207233610700257410ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to read individually the axis of the ADLX345 * Accelerometer built-in Zolertia Z1 motes * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TestADXL345AppC {} implementation { components MainC, TestADXL345C as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; components new TimerMilliC() as TestTimer; App.TestTimer -> TestTimer; components new ADXL345C(); App.Xaxis -> ADXL345C.X; App.Yaxis -> ADXL345C.Y; App.Zaxis -> ADXL345C.Z; App.AccelControl -> ADXL345C.SplitControl; } tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestADXL345/TestADXL345C.nc000066400000000000000000000066051207233610700252760ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to read individually the axis of the ADLX345 * Accelerometer built-in Zolertia Z1 motes * * @author: Antonio Linan */ #include "PrintfUART.h" module TestADXL345C { uses { interface Leds; interface Boot; interface Timer as TestTimer; interface Read as Xaxis; interface Read as Yaxis; interface Read as Zaxis; interface SplitControl as AccelControl; } } implementation { void printTitles(){ printfUART("\n\n"); printfUART(" ###############################\n"); printfUART(" # Z1 ADXL345 Test #\n"); printfUART(" ###############################\n"); printfUART("\n"); } event void Boot.booted() { uint8_t state = 0; printfUART_init(); printTitles(); call TestTimer.startPeriodic(1024); } event void TestTimer.fired(){ call AccelControl.start(); } event void AccelControl.startDone(error_t err) { if (err == SUCCESS){ call Xaxis.read(); } else { printfUART("Bad Start\n"); } } event void AccelControl.stopDone(error_t err) {} event void Xaxis.readDone(error_t result, uint16_t data){ if (result == SUCCESS){ call Leds.led0Toggle(); printfUART("Xaxis: %d\n", data); call Yaxis.read(); } else { printfUART("Bad X\n"); } } event void Yaxis.readDone(error_t result, uint16_t data){ if (result == SUCCESS){ call Leds.led1Toggle(); printfUART("Yaxis: %d\n", data); call Zaxis.read(); } else { printfUART("Bad Y\n"); } } event void Zaxis.readDone(error_t result, uint16_t data){ if (result == SUCCESS){ call Leds.led2Toggle(); printfUART("Zaxis: %d\n", data); } else { printfUART("Bad Z\n"); } } } tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestIntADXL345/000077500000000000000000000000001207233610700234715ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestIntADXL345/Makefile000066400000000000000000000000571207233610700251330ustar00rootroot00000000000000COMPONENT=TestIntADXLAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestIntADXL345/README000066400000000000000000000006561207233610700243600ustar00rootroot00000000000000README for ADXL35 interruptions test app Author/Contact: Antonio Linan Description: This application test the Accelerometer interruptions in the following manner: * Single tap: toggle led red * Double tap: toggle green led * Free fall: toggle blue led The ADXL345 sensor is a temperature sensor and its already integrated as part of the Zolertia Z1 mote. Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLAppC.nc000066400000000000000000000042201207233610700266200ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test the interruptions (single and * double tap, free fall) of the ADLX345 Accelerometer built-in * Zolertia Z1 motes * * @author: Antonio Linan */ configuration TestIntADXLAppC { } implementation{ components MainC, TestIntADXLC as App; App -> MainC.Boot; components LedsC; App.Leds -> LedsC; components new ADXL345C(); App.IntSource -> ADXL345C.IntSource; App.AccelControl -> ADXL345C.SplitControl; App.IntAccel1 -> ADXL345C.Int1; App.IntAccel2 -> ADXL345C.Int2; App.ADXLControl -> ADXL345C.ADXL345Control; } tinyos-2.1.2+dfsg/apps/tests/z1/Accelerometer/TestIntADXL345/TestIntADXLC.nc000066400000000000000000000072171207233610700261700ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test the interruptions (single and * double tap, free fall) of the ADLX345 Accelerometer built-in * Zolertia Z1 motes * * @author: Antonio Linan */ #include "ADXL345.h" module TestIntADXLC{ uses interface Boot; uses interface Leds; uses interface Read as IntSource; uses interface SplitControl as AccelControl; uses interface Notify as IntAccel1; uses interface Notify as IntAccel2; uses interface ADXL345Control as ADXLControl; } implementation{ bool source_int2=FALSE; event void Boot.booted(){ call AccelControl.start(); } event void IntAccel1.notify(adxlint_state_t val) { source_int2=FALSE; call Leds.led0Toggle(); call IntSource.read(); //this will clear the interruption } event void IntAccel2.notify(adxlint_state_t val) { source_int2=TRUE; call IntSource.read(); //this will clear the interruption; } event void AccelControl.startDone(error_t err) { call ADXLControl.setInterrups( ADXLINT_DOUBLE_TAP | ADXLINT_SINGLE_TAP | ADXLINT_FREE_FALL ); } event void AccelControl.stopDone(error_t err) { } event void IntSource.readDone(error_t result, uint8_t data){ if(source_int2) { if(data & ADXLINT_FREE_FALL) call Leds.led2Toggle(); else call Leds.led1Toggle(); } } event void ADXLControl.setInterruptsDone(error_t error){ call ADXLControl.setIntMap(ADXLINT_DOUBLE_TAP | ADXLINT_FREE_FALL); } event void ADXLControl.setIntMapDone(error_t error){ call IntAccel1.enable(); call IntAccel2.enable(); call IntSource.read(); //this will clear the interruption } event void ADXLControl.setDurationDone(error_t error) { } //not used event void ADXLControl.setWindowDone(error_t error) { } //not used event void ADXLControl.setLatentDone(error_t error) { } //not used event void ADXLControl.setRegisterDone(error_t error) { } //not used event void ADXLControl.setRangeDone(error_t error) { } //not used event void ADXLControl.setReadAddressDone(error_t error) { } //not used } tinyos-2.1.2+dfsg/apps/tests/z1/FastADC/000077500000000000000000000000001207233610700176255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/FastADC/FastADCAppC.nc000066400000000000000000000045501207233610700221240ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 DEXMA SENSORS SL * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test ADC + DMA bundle * * @author: Xavier Orduna * @author: Antonio Linan */ #include "StorageVolumes.h" configuration FastADCAppC { } implementation { components MainC, FastADCC as App; App -> MainC.Boot; components LedsC; App.Leds -> LedsC; components new TimerMilliC() as TimerBlink; App.TimerBlink -> TimerBlink; components new TimerMilliC() as TimerSample; App.TimerSample -> TimerSample; components new Msp430Adc12ClientAutoDMAC() as Fadc; App.overflow -> Fadc; App.adc -> Fadc; App.Resource -> Fadc; components new BlockStorageC(VOLUME_BLOCKTEST); App.BlockWrite -> BlockStorageC.BlockWrite; App.BlockRead -> BlockStorageC.BlockRead; } tinyos-2.1.2+dfsg/apps/tests/z1/FastADC/FastADCC.nc000066400000000000000000000117521207233610700214650ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 DEXMA SENSORS SL * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test ADC + DMA bundle * * @author: Xavier Orduna * @author: Antonio Linan */ #include "Timer.h" #include "printfZ1.h" #define FADSAMPLES 2000 #define PRINTBUF 20 module FastADCC{ uses interface Boot; uses interface Leds; uses interface Timer as TimerBlink; uses interface Timer as TimerSample; uses interface Msp430Adc12Overflow as overflow; uses interface Msp430Adc12SingleChannel as adc; uses interface Resource; uses interface BlockWrite; uses interface BlockRead; } implementation{ uint16_t adb[FADSAMPLES]; uint16_t pb[PRINTBUF]; uint16_t pos; msp430adc12_channel_config_t adcconfig = { // inch: INPUT_CHANNEL_A7, inch: TEMPERATURE_DIODE_CHANNEL, sref: REFERENCE_AVcc_AVss, /* For battery readings */ // inch: SUPPLY_VOLTAGE_HALF_CHANNEL, // sref: REFERENCE_VREFplus_AVss, ref2_5v: REFVOLT_LEVEL_1_5, adc12ssel: SHT_SOURCE_ACLK, adc12div: SHT_CLOCK_DIV_1, sht: SAMPLE_HOLD_4_CYCLES, sampcon_ssel: SAMPCON_SOURCE_SMCLK, sampcon_id: SAMPCON_CLOCK_DIV_1 }; void showerror(){ call Leds.led0On(); } void configureSingle(){ error_t e; printfz1("configuring single\n"); e = call adc.configureSingle(&adcconfig); if(e != SUCCESS) showerror(); printfz1("error %d\n", e); } void configureMultiple(){ error_t e; printfz1("configuring multiple\n"); e = call adc.configureMultiple(&adcconfig, adb, FADSAMPLES, 0); if(e != SUCCESS) showerror(); printfz1("error %d\n", e); } void printadb(){ uint16_t i; printfz1("printing buffer\n"); for(i = 0; i < FADSAMPLES; i++){ printfz1("adb[%d] = %d\n", i, adb[i]); } } void writeadb(){ printfz1("writing adb\n"); call BlockWrite.write(0, adb, FADSAMPLES); } void readadb(){ } event void Boot.booted(){ printfz1_init(); printfz1("Booting\n"); call Resource.request(); } event void TimerBlink.fired(){ call Leds.led0Toggle(); call Leds.led1Toggle(); call Leds.led2Toggle(); } event void TimerSample.fired(){ error_t e; printfz1("starting conversion\n"); e = call adc.getData(); printfz1("error %d\n", e); } async event void overflow.conversionTimeOverflow(){ } async event void overflow.memOverflow(){ } async event uint16_t *adc.multipleDataReady(uint16_t *buffer, uint16_t numSamples){ printfz1("samples ready\n"); writeadb(); printadb(); return buffer; } async event error_t adc.singleDataReady(uint16_t data){ // printfz1("sample: %d\n", data); return SUCCESS; } event void Resource.granted(){ printfz1("Resource granted\n"); configureMultiple(); call TimerSample.startOneShot(1000); } event void BlockRead.readDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { } event void BlockWrite.eraseDone(error_t result) { } event void BlockWrite.writeDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { printfz1("write done -> %d\n", result); if (result == SUCCESS){ printfz1("syncing\n"); call BlockWrite.sync(); } } event void BlockWrite.syncDone(error_t result) { printfz1("sync done -> %d\n", result); } event void BlockRead.computeCrcDone(storage_addr_t x, storage_len_t y, uint16_t z, error_t result) { } } tinyos-2.1.2+dfsg/apps/tests/z1/FastADC/Makefile000066400000000000000000000002751207233610700212710ustar00rootroot00000000000000COMPONENT=FastADCAppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DADC12_ONLY_WITH_DMA # already defined in msp430/adc12/Msp430Adc12.h #CFLAGS += -DADC12_TIMERA_ENABLED include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/FastADC/README000066400000000000000000000011601207233610700205030ustar00rootroot00000000000000README for FastADC test application Author/Contact: Antonio Linan Description: Thanks to the DMA implemented in the msp430, it is possible to use in conjunction with TimerA to perform High Speed sampling. Data is read and stored in flash. When using DMA and TimerA for ADC sampling be sure to include in makefile: CFLAGS += -DADC12_ONLY_WITH_DMA The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/FastADC/volumes-stm25p.xml000066400000000000000000000001111207233610700231620ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tests/z1/Print/000077500000000000000000000000001207233610700175145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Print/Makefile000066400000000000000000000001071207233610700211520ustar00rootroot00000000000000COMPONENT=PrintAppC CFLAGS += -DPRINTFUART_ENABLED include $(MAKERULES)tinyos-2.1.2+dfsg/apps/tests/z1/Print/PrintAppC.nc000066400000000000000000000037721207233610700217070ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * Copyright (c) 2011 Eric B. Decker * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test printf adaptation made for Zolertia * Z1 motes * * @author: Antonio Linan * @author Eric B. Decker */ configuration PrintAppC { } implementation{ components MainC, PrintC as App; App -> MainC.Boot; components LedsC; App.Leds -> LedsC; components new TimerMilliC() as TimerPrint; App.TimerPrint -> TimerPrint; } tinyos-2.1.2+dfsg/apps/tests/z1/Print/PrintC.nc000066400000000000000000000077141207233610700212460ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * Copyright (c) 2011 Eric B. Decker * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test printf adaptation made for Zolertia * Z1 motes * * @author: Antonio Linan * @author Eric B. Decker *//* * Copyright (c) 20011 ZOLERTIA LABS * Copyright (c) 2011 Eric B. Decker * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test printf adaptation made for Zolertia * Z1 motes * * @author: Antonio Linan * @author Eric B. Decker */ #include "printfZ1.h" module PrintC{ uses interface Boot; uses interface Leds; uses interface Timer as TimerPrint; } implementation{ uint8_t counter; event void Boot.booted(){ printfz1_init(); counter = 0; call TimerPrint.startPeriodic( 1024 ); } event void TimerPrint.fired(){ call Leds.led0Toggle(); printfz1("Print num: %d\n", counter); counter++; } } tinyos-2.1.2+dfsg/apps/tests/z1/Print/README000066400000000000000000000007321207233610700203760ustar00rootroot00000000000000README for Printf Z1 app Author/Contact: Antonio Linan Description: This application simple increments a timer and prints its value over the serial port using a printf implementation for the Z1 mote. The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/Temperature/000077500000000000000000000000001207233610700207155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Temperature/Makefile000066400000000000000000000001511207233610700223520ustar00rootroot00000000000000COMPONENT=TestTmp102AppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/Temperature/README000066400000000000000000000010141207233610700215710ustar00rootroot00000000000000README for Tmp102 sensor test app Author/Contact: Antonio Linan Description: This application simple polls periodically the Tmp102 sensor for data. The Tmp102 sensor is a temperature sensor and its already integrated as part of the Zolertia Z1 mote. The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/Temperature/TestTmp102AppC.nc000066400000000000000000000040411207233610700236250ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test the TMP102 temperature sensor * built-in Zolertia Z1 motes * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TestTmp102AppC {} implementation { components MainC, TestTmp102C as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; components new TimerMilliC() as TestTimer; App.TestTimer -> TestTimer; components new SimpleTMP102C() as Temperature; App.TempSensor -> Temperature; } tinyos-2.1.2+dfsg/apps/tests/z1/Temperature/TestTmp102C.nc000066400000000000000000000053251207233610700231720ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to test the TMP102 temperature sensor * built-in Zolertia Z1 motes * * @author: Antonio Linan */ #include "Timer.h" #include "PrintfUART.h" module TestTmp102C { uses { interface Leds; interface Boot; interface Timer as TestTimer; interface Read as TempSensor; } } implementation { void printTitles(){ printfUART("\n\n"); printfUART(" ###############################\n"); printfUART(" # #\n"); printfUART(" # TMP102 TEST #\n"); printfUART(" # #\n"); printfUART(" ###############################\n"); printfUART("\n"); } event void Boot.booted() { printfUART_init(); printTitles(); call TestTimer.startPeriodic(1024); } event void TestTimer.fired(){ call TempSensor.read(); } event void TempSensor.readDone(error_t error, uint16_t data){ if (error == SUCCESS){ call Leds.led2Toggle(); if (data > 2047) data -= (1<<12); data *=0.625; printfUART("Temp: %2d.%1.2d\n", data/10, data>>2); } } } tinyos-2.1.2+dfsg/apps/tests/z1/TestBatt/000077500000000000000000000000001207233610700201525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/TestBatt/Makefile000066400000000000000000000001511207233610700216070ustar00rootroot00000000000000COMPONENT=TestBattAppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/TestBatt/README000066400000000000000000000006261207233610700210360ustar00rootroot00000000000000README for Z1 Battery test Author/Contact: Antonio Linan Description: This application simple read the battery level of the Z1 mote The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/TestBatt/TestBattAppC.nc000066400000000000000000000037321207233610700227770ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * App to read the Battery level of Zolertia Z1 motes * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TestBattAppC {} implementation { components MainC, TestBattC as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; components new TimerMilliC() as TestTimer; App.TestTimer -> TestTimer; components new BatteryC(); App.Battery -> BatteryC.Read; } tinyos-2.1.2+dfsg/apps/tests/z1/TestBatt/TestBattC.nc000066400000000000000000000050731207233610700223360ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * App to read the Battery level of Zolertia Z1 motes * * @author: Antonio Linan */ #include "Timer.h" #include "PrintfUART.h" module TestBattC { uses { interface Leds; interface Boot; interface Timer as TestTimer; interface Read as Battery; } } implementation { uint32_t aux = 0; uint16_t battery = 0; void printTitles(){ printfUART("\n\n"); printfUART(" ###############################\n"); printfUART(" # Test Battery #\n"); printfUART(" ###############################\n"); printfUART("\n"); } event void Boot.booted() { printfUART_init(); printTitles(); call TestTimer.startPeriodic(512); } event void TestTimer.fired(){ call Battery.read(); } event void Battery.readDone(error_t error, uint16_t batt){ if(error==SUCCESS) { aux = batt; aux *= 300; aux /= 4096; battery = aux; printfUART("Battery [%d]\n", battery); } } } tinyos-2.1.2+dfsg/apps/tests/z1/TestEui/000077500000000000000000000000001207233610700200025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/TestEui/Makefile000066400000000000000000000001131207233610700214350ustar00rootroot00000000000000COMPONENT=TestEuiAppC CFLAGS += -DPRINTFUART_ENABLED include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/TestEui/README.txt000066400000000000000000000006111207233610700214760ustar00rootroot00000000000000$Id: README.txt,v 1.1 2008-10-31 17:01:31 sallai Exp $ README for TestEui Author/Contact: tinyos-help@millennium.berkeley.edu Description: The TestEui application prints out the IEEE EUI64 of the device periodically using printfUART, ported to Zolertia Z1 mote. Tools: Any serial reader, like putty or picocom Usage: bauds: 115200 bits: 8 parity: none Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/TestEui/TestEuiAppC.nc000066400000000000000000000040371207233610700224560ustar00rootroot00000000000000// $Id: TestEuiAppC.nc,v 1.2 2010-06-29 22:07:22 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * This application reads the 64-bit EUI of the device at initialization time * and then periodically prints it out using printf. * */ configuration TestEuiAppC{} implementation { components MainC, TestEuiC, LedsC, LocalIeeeEui64C, new TimerMilliC(); MainC.Boot <- TestEuiC; TestEuiC.Timer -> TimerMilliC; TestEuiC -> LedsC.Leds; TestEuiC.LocalIeeeEui64 -> LocalIeeeEui64C; } tinyos-2.1.2+dfsg/apps/tests/z1/TestEui/TestEuiC.nc000066400000000000000000000044641207233610700220210ustar00rootroot00000000000000// $Id: TestEuiC.nc,v 1.2 2010-06-29 22:07:23 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * This application reads the 64-bit EUI of the device at initialization time * and then periodically, and prints it out using printf. * */ #include "PrintfUART.h" module TestEuiC{ uses interface Boot; uses interface Timer; uses interface Leds; uses interface LocalIeeeEui64; } implementation{ event void Boot.booted() { printfUART_init(); call Timer.startPeriodic(1000); } event void Timer.fired() { int i; ieee_eui64_t id; call Leds.led0Toggle(); id = call LocalIeeeEui64.getId(); printfUART("IEEE 64-bit UID: "); for(i=0;i<8;i++) { printfUART("%d ", id.data[i]); } printfUART("\n"); } } tinyos-2.1.2+dfsg/apps/tests/z1/TestGPIO/000077500000000000000000000000001207233610700200165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/TestGPIO/Makefile000066400000000000000000000001471207233610700214600ustar00rootroot00000000000000COMPONENT=TestGPIOAppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/TestGPIO/README000066400000000000000000000007221207233610700206770ustar00rootroot00000000000000README for the GPIO pin test of Zolertia Z1 mote Author/Contact: Antonio Linan Description: This application test configuring the pull-up resistors and the GPIO pins by starting a PWM signal. The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/TestGPIO/TestGPIOAppC.nc000066400000000000000000000041771207233610700225130ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple application to test the GPIO pins of the Z1 mote, by configuring * the pull-up resistors and starting a PWM signal. * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TestGPIOAppC {} implementation { components MainC, TestGPIOC as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; components new TimerMilliC() as TestTimer; App.TestTimer -> TestTimer; components new TimerMilliC() as OffTimer; App.OffTimer -> OffTimer; components HplMsp430GeneralIOC as PinMap; App.PinTest1 -> PinMap.Port52; } tinyos-2.1.2+dfsg/apps/tests/z1/TestGPIO/TestGPIOC.nc000066400000000000000000000067551207233610700220560ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple application to test the GPIO pins of the Z1 mote, by configuring * the pull-up resistors and starting a PWM signal. * * @author: Antonio Linan */ #include "Timer.h" #include "PrintfUART.h" module TestGPIOC { uses { interface Leds; interface Boot; interface Timer as TestTimer; interface Timer as OffTimer; interface HplMsp430GeneralIO as PinTest1; } } implementation { void printTitles(){ printfUART("\n\n"); printfUART(" ###############################\n"); printfUART(" # GPIO TEST #\n"); printfUART(" ###############################\n"); printfUART("\n"); } event void Boot.booted() { uint8_t state = 0xFF; printfUART_init(); printTitles(); /* Prints the available states of resistors */ printfUART("INVALID [%d] OFF [%d] PULLDOWN [%d] PULLUP [%d]\n\n", MSP430_PORT_RESISTOR_INVALID,MSP430_PORT_RESISTOR_OFF, MSP430_PORT_RESISTOR_PULLDOWN, MSP430_PORT_RESISTOR_PULLUP); /* Disable resistor */ call PinTest1.setResistor(MSP430_PORT_RESISTOR_OFF); state = call PinTest1.getResistor(); if (state == MSP430_PORT_RESISTOR_OFF){ printfUART("Resistor disabled -> %d\n", state); } else { printfUART("Failed -> %d\n", state); } /* Enable pullup resistor */ call PinTest1.setResistor(MSP430_PORT_RESISTOR_PULLUP); state = call PinTest1.getResistor(); if (state == MSP430_PORT_RESISTOR_PULLUP){ printfUART("Pullup resistor -> %d\n", state); } else { printfUART("Failed -> %d\n", state); } /* slow PWM */ call PinTest1.makeOutput(); call PinTest1.clr(); call TestTimer.startPeriodic(2048); } event void TestTimer.fired(){ call Leds.led2Toggle(); call PinTest1.set(); call OffTimer.startOneShot(1024); } event void OffTimer.fired(){ call PinTest1.clr(); } } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/000077500000000000000000000000001207233610700200415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/SimpleTSL2563/000077500000000000000000000000001207233610700221755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/SimpleTSL2563/Makefile000066400000000000000000000001461207233610700236360ustar00rootroot00000000000000COMPONENT=TestTSLAppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/SimpleTSL2563/README000066400000000000000000000007511207233610700230600ustar00rootroot00000000000000README for the ZIG-LIGHT ziglet test application Author/Contact: Antonio Linan Description: This application test the light ziglet based in TAOS TSL-2563 light sensor, light readings are periodically taken at 1Hz. The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/SimpleTSL2563/TSLC.nc000066400000000000000000000042701207233610700232670ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple driver for the ZIG-LIGHT Ziglet, based on the TAOS TSL2563 * digital light sensor, features only a read light command. * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TSLC { provides { interface Read as Light; } } implementation { components TSLP; Light = TSLP; components new Msp430I2C1C() as I2C; TSLP.Resource -> I2C; TSLP.ResourceRequested -> I2C; TSLP.I2CBasicAddr -> I2C; components new TimerMilliC() as TimeoutTimer; TSLP.TimeoutTimer -> TimeoutTimer; components new TimerMilliC() as TimerUp; TSLP.TimerUp -> TimerUp; } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/SimpleTSL2563/TSLP.nc000066400000000000000000000125151207233610700233050ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple driver for the ZIG-LIGHT Ziglet, based on the TAOS TSL2563 * digital light sensor, features only a read light command. * * @author: Antonio Linan */ #include "tsl2563.h" #include "PrintfUART.h" module TSLP { provides{ interface Read as Light; } uses { interface I2CPacket as I2CBasicAddr; interface Resource; interface ResourceRequested; interface Timer as TimerUp; interface Timer as TimeoutTimer; interface Leds; } } implementation { norace uint8_t state = TSLCMD_IDLE; norace uint8_t pointer; norace uint8_t setreg; norace uint8_t lightBuff[4]; norace uint16_t reading[2]; norace uint16_t lux; uint16_t calculatelux(){ uint32_t ch0, ch1 = 0; uint32_t aux = (1<<14); uint32_t ratio; uint32_t lratio; uint32_t tmp=0; ch0 = (reading[0]*aux) >> 10; ch1 = (reading[1]*aux) >> 10; ratio = (ch1 << 10)/ch0; lratio = (ratio+1) >> 1; if ((lratio >= 0) && (lratio <= K1T)) tmp = (ch0*B1T) - (ch1*M1T); else if (lratio <= K2T) tmp = (ch0*B2T) - (ch1*M2T); else if (lratio <= K3T) tmp = (ch0*B3T) - (ch1*M3T); else if (lratio <= K4T) tmp = (ch0*B4T) - (ch1*M4T); else if (lratio <= K5T) tmp = (ch0*B5T) - (ch1*M5T); else if (lratio <= K6T) tmp = (ch0*B6T) - (ch1*M6T); else if (lratio <= K7T) tmp = (ch0*B7T) - (ch1*M7T); else if (lratio > K8T) tmp = (ch0*B8T) - (ch1*M8T); if (tmp < 0) tmp = 0; tmp += (1<<13); return (tmp >> 14); } task void signalEvent(){ signal Light.readDone(SUCCESS, lux); } command error_t Light.read(){ state = TSLCMD_START; call TimeoutTimer.startOneShot(1024); call TimerUp.startOneShot(100); return SUCCESS; } event void TimerUp.fired(){ call Resource.request(); } event void Resource.granted(){ error_t error; setreg = TSL256X_CONTROL_POWER_ON; pointer = TSL256X_PTR_DATA0LOW | TSL256X_COMMAND_CMD | TSL256X_COMMAND_WORD; error = call I2CBasicAddr.write((I2C_START | I2C_STOP), TSL2563_ADDRESS, 1, &setreg); if (error){ call Resource.release(); signal Light.readDone(error, 0xFFFF); } } async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ error_t e = FAIL; if(call Resource.isOwner()){ if(state == TSLCMD_START){ state = TSLCMD_READ; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), TSL2563_ADDRESS, 1, &pointer); } else if (state == TSLCMD_READ){ e = call I2CBasicAddr.read((I2C_START | I2C_STOP), TSL2563_ADDRESS, 4, lightBuff); } if (e){ call Resource.release(); signal Light.readDone(error, 0xFFFF); } } } async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ if (call Resource.isOwner()){ uint16_t tmp; state = TSLCMD_IDLE; /* The new msp430-gcc 4.6.3 toolchain eliminates the delay, the intrinsic * __delay_cycles() function is an elegant solution to an ugly hack but * breaks the compatibility with 3.2.3 toolchain */ //__delay_cycles(8000); for(tmp=0;tmp<0xffee;tmp++) asm("nop"); //delay call Resource.release(); call TimeoutTimer.stop(); reading[0] = (data[1] << 8) + data[0]; reading[1] = (data[3] << 8) + data[2]; lux = calculatelux(); post signalEvent(); } } event void TimeoutTimer.fired(){ call Resource.release(); signal Light.readDone(FAIL, 0); } default event void Light.readDone(error_t error, uint16_t data){ return; } async event void ResourceRequested.requested(){} async event void ResourceRequested.immediateRequested(){} } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLAppC.nc000066400000000000000000000040141207233610700245640ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to poll data from the ZIG-LIGHT Ziglet, based * on the TAOS TSL2563 digital light sensor. * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TestTSLAppC {} implementation { components MainC, TestTSLC as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; components new TimerMilliC() as TestTimer; App.TestTimer -> TestTimer; components TSLC; App.Light -> TSLC.Light; } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/SimpleTSL2563/TestTSLC.nc000066400000000000000000000050251207233610700241260ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to poll data from the ZIG-LIGHT Ziglet, based * on the TAOS TSL2563 digital light sensor. * * @author: Antonio Linan */ #include "Timer.h" #include "PrintfUART.h" module TestTSLC { uses { interface Leds; interface Boot; interface Timer as TestTimer; interface Read as Light; } } implementation { void printTitles(){ printfUART("\n\n"); printfUART(" ###############################\n"); printfUART(" # Light TEST #\n"); printfUART(" ###############################\n"); printfUART("\n"); } event void Boot.booted() { printfUART_init(); printTitles(); call TestTimer.startPeriodic(1024); } event void TestTimer.fired(){ call Light.read(); } event void Light.readDone(error_t error, uint16_t data){ if (error == SUCCESS){ printfUART("Light: %d\n", data); call Leds.led2Toggle(); } } } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/SimpleTSL2563/tsl2563.h000066400000000000000000000020621207233610700234700ustar00rootroot00000000000000 #ifndef TESTSENSOR_H #define TESTSENSOR_H #define TSL2563_ADDRESS 0x39 #define TSL256X_CONTROL_POWER_ON (0x3) #define TSL256X_CONTROL_POWER_OFF (0x0) #define TSL256X_PTR_CONTROL (0x0) #define TSL256X_COMMAND_CMD (1<<7) #define TSL256X_COMMAND_CLEAR (1<<6) #define TSL256X_COMMAND_WORD (1<<5) #define TSL256X_COMMAND_BLOCK (1<<4) #define TSL256X_COMMAND_ADDRESS(_x) ((_x) & 0xF) #define TSL256X_PTR_DATA0LOW (0xC) #define TSL256X_PTR_DATA0HIGH (0xD) #define TSL256X_PTR_DATA1LOW (0xE) #define TSL256X_PTR_DATA1HIGH (0xF) #define K1T 0X0040 #define B1T 0x01f2 #define M1T 0x01b2 #define K2T 0x0080 #define B2T 0x0214 #define M2T 0x02d1 #define K3T 0x00c0 #define B3T 0x023f #define M3T 0x037b #define K4T 0x0100 #define B4T 0x0270 #define M4T 0x03fe #define K5T 0x0138 #define B5T 0x016f #define M5T 0x01fc #define K6T 0x019a #define B6T 0x00d2 #define M6T 0x00fb #define K7T 0x029a #define B7T 0x0018 #define M7T 0x0012 #define K8T 0x029a #define B8T 0x0000 #define M8T 0x0000 enum { TSLCMD_IDLE = 0, TSLCMD_START, TSLCMD_READ, TSLCMD_STOP, } CMD; #endif tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestBMP085/000077500000000000000000000000001207233610700215545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestBMP085/BMP085C.nc000066400000000000000000000045041207233610700230570ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple driver for the BMP085 sensor, only reads the calibration values and * returns the atmospheric pressure level * * @author: Antonio Linan */ configuration BMP085C { provides { interface Read as Pressure; interface SplitControl as BMPSwitch; } } implementation { components BMP085P; Pressure = BMP085P.Pressure; BMPSwitch = BMP085P.BMPSwitch; components new Msp430I2C1C() as I2C; BMP085P.Resource -> I2C; BMP085P.ResourceRequested -> I2C; BMP085P.I2CBasicAddr -> I2C; components HplMsp430GeneralIOC as GeneralIOC; components new Msp430GpioC() as XCLR; XCLR -> GeneralIOC.Port42; BMP085P.Reset -> XCLR; components new TimerMilliC() as TimeoutTimer; BMP085P.TimeoutTimer -> TimeoutTimer; } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestBMP085/BMP085P.nc000066400000000000000000000215621207233610700230770ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple driver for the BMP085 sensor, only reads the calibration values and * returns the atmospheric pressure level * * @author: Antonio Linan */ #include "PrintfUART.h" #include "bmp085.h" module BMP085P{ provides{ interface Read as Pressure; interface SplitControl as BMPSwitch; } uses { interface Resource; interface ResourceRequested; interface I2CPacket as I2CBasicAddr; interface GeneralIO as Reset; interface Timer as TimeoutTimer; } } implementation{ enum { S_STARTED, S_STOPPED, S_IDLE, }; norace uint8_t state = S_IDLE; norace uint8_t bmp085cmd; norace uint8_t databuf[22]; norace error_t error_return= FAIL; norace int32_t b5 = 0; norace int16_t temp; norace int32_t press = 0; norace int16_t pressure = 0; norace bool readPres = FALSE; norace bool readAlt = FALSE; // Calibration registers int16_t ac1, ac2, ac3, b1, b2, mb, mc, md = 0; uint16_t ac4, ac5, ac6 = 0; task void stopTimeout(){ call TimeoutTimer.stop(); } task void signalEvent(){ if (error_return == SUCCESS){ if (call TimeoutTimer.isRunning()) call TimeoutTimer.stop(); } if (call Resource.isOwner()) call Resource.release(); switch(bmp085cmd){ case BMPCMD_READ_CALIB: if (error_return == SUCCESS) state = S_STARTED; signal BMPSwitch.startDone(error_return); break; case BMPCMD_READ_PRES: signal Pressure.readDone(error_return, pressure); break; } } void calcTemp(uint32_t tmp){ int32_t x1, x2 = 0; atomic{ x1 = (((int32_t)tmp - (int32_t)ac6) * (int32_t)ac5) >> 15; x2 = ((int32_t)mc << 11) / (x1 + md); b5 = x1 + x2; temp = (b5 + 8) >> 4; } #ifdef DEBUG_ZIGLET printfUART("[BMP085] Temp [%d.%d C]\n", temp/10, temp<<2); #endif } void calcPres(int32_t tmp){ uint32_t b4, b7 = 0; int32_t x1, x2, x3, b3, b6, p = 0; atomic{ b6 = b5 - 4000; x1 = (b2 * (b6 * b6 >> 12)) >> 11; x2 = ac2 * b6 >> 11; x3 = x1 + x2; b3 = ((((int32_t)ac1) * 4 + x3) + 2) >> 2; // printfUART("b6[%ld] x1[%ld] x2[%ld] x3[%ld] b3[%ld]\n", b6, x1, x2, x3, b3); x1 = (ac3 * b6) >> 13; x2 = (b1 * ((b6 * b6) >> 12)) >> 16; x3 = ((x1 + x2) + 2) >> 2; b4 = (ac4 * ((uint32_t)(x3 + 32768))) >> 15; b7 = ((uint32_t) tmp - b3) * 50000; // printfUART("b7[%lu] x1[%ld] x2[%ld] x3[%ld] b4[%lu]\n", b7, x1, x2, x3, b4); if (b7 < 0x80000000){ p = (b7 << 1) / b4; } else { p = (b7 / b4) << 1; } x1 = (p >> 8) * (p >> 8); x1 = (x1 * 3038) >> 16; x2 = (-7357 * p) >> 16; press = (p + ((x1 + x2 + 3791) >> 4)); press /= 10; pressure = press; } #ifdef DEBUG_ZIGLET printfUART("[BMP085] Pressure [%u mbar]\n", pressure); #endif readPres = FALSE; error_return = SUCCESS; post signalEvent(); } command error_t BMPSwitch.start(){ error_t e; uint8_t i; error_return = FAIL; atomic P5DIR |= 0x06; call TimeoutTimer.startOneShot(1024); if(state != S_STARTED){ bmp085cmd = BMPCMD_START; for (i=0;i<22;i++) databuf[i] = 0; e = call Resource.request(); if (e == SUCCESS) return SUCCESS; } return e; } command error_t BMPSwitch.stop(){ error_t e = FAIL; if(state != S_STARTED){ state = S_STOPPED; e = SUCCESS; } signal BMPSwitch.stopDone(e); return e; } command error_t Pressure.read(){ error_t e; error_return = FAIL; atomic P5DIR |= 0x06; call TimeoutTimer.startOneShot(1024); if (state == S_STARTED){ bmp085cmd = BMPCMD_READ_UT; readPres = TRUE; e = call Resource.request(); if (e == SUCCESS) return SUCCESS; } return e; } event void Resource.granted(){ error_t e; switch(bmp085cmd){ case BMPCMD_START: bmp085cmd = BMPCMD_READ_CALIB; databuf[0] = BMP085_AC1_MSB; // 0xAA e = call I2CBasicAddr.write((I2C_START | I2C_STOP), BMP085_ADDR, 1, databuf); #ifdef DEBUG_ZIGLET if(e != SUCCESS) printfUART("[BMP085] Error at start (%d)\n", e); #endif break; case BMPCMD_READ_UT: databuf[0] = BMP085_CTLREG; // 0xF4 databuf[1] = BMP085_UT_NOSRX; // 0x2E e = call I2CBasicAddr.write((I2C_START | I2C_STOP), BMP085_ADDR, 2, databuf); #ifdef DEBUG_ZIGLET if (e != SUCCESS) printfUART("[BMP085] Error at UT (%d)\n", e); #endif break; case BMPCMD_READ_UP: databuf[0] = BMP085_CTLREG; // 0xF4 databuf[1] = BMP085_UP_OSRS0; // 0x34 e = call I2CBasicAddr.write((I2C_START | I2C_STOP), BMP085_ADDR, 2, databuf); #ifdef DEBUG_ZIGLET if (e != SUCCESS) printfUART("[BMP085] Error at UP (%d)\n", e); #endif break; } } async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ error_t e; if(call Resource.isOwner()){ switch(bmp085cmd){ case BMPCMD_READ_UT: case BMPCMD_READ_UP: if (bmp085cmd == BMPCMD_READ_UT){ bmp085cmd = BMPCMD_READ_TEMP; } else { bmp085cmd = BMPCMD_READ_PRES; } databuf[0] = BMP085_DATA_MSB; // 0xF6 e = call I2CBasicAddr.write((I2C_START | I2C_STOP), BMP085_ADDR, 1, databuf); break; case BMPCMD_READ_CALIB: e = call I2CBasicAddr.read((I2C_START | I2C_STOP), BMP085_ADDR, 22, databuf); break; case BMPCMD_READ_TEMP: case BMPCMD_READ_PRES: e = call I2CBasicAddr.read((I2C_START | I2C_STOP), BMP085_ADDR, 2, databuf); break; } } } async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ int16_t utemp = 0; int32_t upres = 0; if (call Resource.isOwner()){ switch(bmp085cmd){ case BMPCMD_READ_CALIB: if (error == SUCCESS){ post stopTimeout(); atomic { ac1 = (data[0]<<8) + data[1]; ac2 = (data[2]<<8) + data[3]; ac3 = (data[4]<<8) + data[5]; ac4 = (data[6]<<8) + data[7]; ac5 = (data[8]<<8) + data[9]; ac6 = (data[10]<<8) + data[11]; b1 = (data[12]<<8) + data[13]; b2 = (data[14]<<8) + data[15]; mb = (data[16]<<8) + data[17]; mc = (data[18]<<8) + data[19]; md = (data[20]<<8) + data[21]; error_return = SUCCESS; } } post signalEvent(); break; case BMPCMD_READ_TEMP: utemp = (data[0]<<8) + data[1]; calcTemp(utemp); break; case BMPCMD_READ_PRES: upres = ((int32_t)data[0] << 8) + (int32_t)data[1]; calcPres(upres); break; } call Resource.release(); if (readPres){ bmp085cmd = BMPCMD_READ_UP; call Resource.request(); } } } event void TimeoutTimer.fired(){ post signalEvent(); } async event void ResourceRequested.requested(){} async event void ResourceRequested.immediateRequested(){} default event void Pressure.readDone(error_t error, uint16_t data){ return; } } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestBMP085/Makefile000066400000000000000000000002021207233610700232060ustar00rootroot00000000000000COMPONENT=TestBMPAppC CFLAGS += -DPRINTFUART_ENABLED # CFLAGS += -DDEBUG_ZIGLET CFLAGS += -DUSCI_X2XXX_DELAY include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestBMP085/README000066400000000000000000000007721207233610700224420ustar00rootroot00000000000000README for BMP085 sensor test application Author/Contact: Antonio Linan Description: This application periodically polls the BMP085 sensor for data. To get more output from the sensor, uncomment the ZIGLET_DEBUG flag in Makefile The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestBMP085/TestBMPAppC.nc000066400000000000000000000042201207233610700241160ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to read atmospheric pressure values from the ZIG-BAR * Ziglet, based on the BMP085 sensor. * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TestBMPAppC {} implementation { components MainC, TestBMPC as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; components new TimerMilliC() as TestTimer; App.TestTimer -> TestTimer; components new TimerMilliC() as StartTimer; App.StartTimer -> StartTimer; components BMP085C; App.BMPSwitch -> BMP085C.BMPSwitch; App.Pressure -> BMP085C.Pressure; } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestBMP085/TestBMPC.nc000066400000000000000000000056511207233610700234660ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to read atmospheric pressure values from the ZIG-BAR * Ziglet, based on the BMP085 sensor. * * @author: Antonio Linan */ #include "Timer.h" #include "PrintfUART.h" module TestBMPC { uses { interface Leds; interface Boot; interface SplitControl as BMPSwitch; interface Timer as TestTimer; interface Timer as StartTimer; interface Read as Pressure; } } implementation { void printTitles(){ printfUART("\n\n"); printfUART(" ###############################\n"); printfUART(" # BMP085 TEST #\n"); printfUART(" ###############################\n"); printfUART("\n"); } event void Boot.booted() { printfUART_init(); printTitles(); call StartTimer.startOneShot(1024); } event void StartTimer.fired(){ call BMPSwitch.start(); } event void BMPSwitch.startDone(error_t err){ if (err == SUCCESS){ call TestTimer.startPeriodic(1024); } } event void TestTimer.fired(){ call Pressure.read(); } event void BMPSwitch.stopDone(error_t err){ call StartTimer.startOneShot(1024); } event void Pressure.readDone(error_t error, uint16_t data){ if (error == SUCCESS){ int16_t buff = (int16_t) data; printfUART("Pressure: %d.%2d\n", buff/10, buff>>2); } } } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestBMP085/bmp085.h000066400000000000000000000032251207233610700227420ustar00rootroot00000000000000#ifndef BMP085_H #define BMP085_H // Address, R/W, CTL #define BMP085_ADDR 0x77 #define BMP085_ADDR_READ 0xEF #define BMP085_ADDR_WRITE 0xEE #define BMP085_CTLREG 0xF4 // Read commands #define BMP085_UT_NOSRX 0x2E // 4.5ms #define BMP085_UP_OSRS0 0x34 // 4.5ms #define BMP085_UP_OSRS1 0x74 // 4.5ms #define BMP085_UP_OSRS2 0xB4 // 13.5ms #define BMP085_UP_OSRS3 0xF4 // 25.5ms // Data Registers (read from) #define BMP085_DATA_MSB 0xF6 #define BMP085_DATA_LSB 0xF7 #define BMP085_DATA_XLSB 0xF8 // EEPROM Calibration registers #define BMP085_AC1_MSB 0xAA #define BMP085_AC1_LSB 0xAB #define BMP085_AC2_MSB 0xAC #define BMP085_AC2_LSB 0xAD #define BMP085_AC3_MSB 0xAE #define BMP085_AC3_LSB 0xAF #define BMP085_AC4_MSB 0xB0 #define BMP085_AC4_LSB 0xB1 #define BMP085_AC5_MSB 0xB2 #define BMP085_AC5_LSB 0xB3 #define BMP085_AC6_MSB 0xB4 #define BMP085_AC6_LSB 0xB5 #define BMP085_B1_MSB 0xB6 #define BMP085_B1_LSB 0xB7 #define BMP085_B2_MSB 0xB8 #define BMP085_B2_LSB 0xB9 #define BMP085_MB_MSB 0xBA #define BMP085_MB_LSB 0xBB #define BMP085_MC_MSB 0xBC #define BMP085_MC_LSB 0xBD #define BMP085_MD_MSB 0xBE #define BMP085_MD_LSB 0xBF // Ultra low power mode // Oversampling = 0, internal samples = 1, conversion press = 4.5ms // Current = 3uA/sample, RMS noise = 0.06hPa // Reading // UP = pressure data (16 or 19 bits) // UT = Temp (16 bit) // EOC = end of conversion // XCLR = reset (1 pulso 1us) // Start -> Meas UT -> 4.5ms -> Read UT -> Meas UP -> 4.5ms -> Read UP enum { BMPCMD_IDLE = 0, BMPCMD_START, BMPCMD_READ_CALIB, BMPCMD_READ_UT, BMPCMD_READ_UP, BMPCMD_READ_TEMP, BMPCMD_READ_PRES, } BMP085_CMD; #endif tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestSht11/000077500000000000000000000000001207233610700216015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestSht11/Makefile000066400000000000000000000001761207233610700232450ustar00rootroot00000000000000COMPONENT=TestSht11AppC CFLAGS += -DPRINTFUART_ENABLED CFLAGS += -DMSP430XSPEED8 CFLAGS += -DIS_ZIGLET include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestSht11/README000066400000000000000000000013001207233610700224530ustar00rootroot00000000000000README for SHT1X sensor test app Author/Contact: Antonio Linan Description: This application simple polls periodically the SHT1X sensor for data (temperature and humidity). The data is printed over the serial port, using a client like putty or picocom you can see the readings of the sensor adjusting the serial port to this configuration: bauds: 115200 bits: 8 parity: none The SHT1X sensor is a part of the ZIGTH11 board, which can be connected to a Ziglet port (an I2C digital port of the Z1 mote), or to regular GPIO port (depending on how you connect it), if using as a Ziglet make sure IS_ZIGLET is uncommented in Makefile. Tools: None Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestSht11/TestSht11AppC.nc000066400000000000000000000042311207233610700244270ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to read Temp & Humidity values from the ZIGTH11 * Ziglet, based on the SHT1X sensor. * * @author: Antonio Linan */ #include "PrintfUART.h" configuration TestSht11AppC {} implementation { components MainC, TestSht11C as App, LedsC; App.Leds -> LedsC; App.Boot -> MainC.Boot; components new TimerMilliC() as TestTimer; App.TestTimer -> TestTimer; components new SensirionSht11C() as Temperature; App.Temperature -> Temperature.Temperature; components new SensirionSht11C() as Humidity; App.Humidity -> Humidity.Humidity; } tinyos-2.1.2+dfsg/apps/tests/z1/Ziglets/TestSht11/TestSht11C.nc000066400000000000000000000057601207233610700237760ustar00rootroot00000000000000/* * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Simple test application to read Temp & Humidity values from the ZIGTH11 * Ziglet, based on the SHT1X sensor. * * @author: Antonio Linan */ #include "Timer.h" #include "PrintfUART.h" module TestSht11C { uses { interface Leds; interface Boot; interface Timer as TestTimer; interface Read as Temperature; interface Read as Humidity; } } implementation { uint8_t pass; void printTitles(){ printfUART("\n\n"); printfUART(" ###############################\n"); printfUART(" # TEST SHT1X #\n"); printfUART(" ###############################\n"); printfUART("\n"); } event void Boot.booted() { printfUART_init(); printTitles(); call TestTimer.startPeriodic(1024); } event void TestTimer.fired(){ pass++; if (pass % 2 == 0){ call Temperature.read(); } else { call Humidity.read(); } } event void Temperature.readDone(error_t error, uint16_t data){ uint16_t temp; if (error == SUCCESS){ call Leds.led2Toggle(); temp = (data/10) -400; printfUART("Temp: %d.%d\n", temp/10, temp>>2); } } event void Humidity.readDone(error_t error, uint16_t data){ uint16_t hum; if (error == SUCCESS){ hum = data*0.0367; hum -= 2.0468; if (hum>100) hum = 100; call Leds.led2Toggle(); printfUART("Hum: %d\n", hum); } } } tinyos-2.1.2+dfsg/apps/tosthreads/000077500000000000000000000000001207233610700171045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/README000066400000000000000000000022321207233610700177630ustar00rootroot00000000000000Author: Kevin Klues The applications contained in this directory are both 'example' and 'test' applications for running TOSThreads based applications in TinyOS. All applications in the 'apps' directory can be compiled by running the command: make threads and all applications in the 'capps' directory can be compiled by running: make cthreads Some applications may be platform specific, but in general TOSThreads currently supports the following platforms: tmote, telosb, iris, mica2, and micaz To compile all applications under 'apps' for a given platform, simpley 'cd' into the 'apps' directory and run the 'make' command specified above. Similarly, 'cd' into the 'capps' directory and run the 'cthreads' version of the make command to compile all of those applications too. There are READMEs contained in each application subdirectory that explain how the application works, and hwo one can verify that it is operating correctly. I hope everyone finds these applications and their descriptions useful. And I hope everyone finds TOSThreads both intuitive and easy to use. Enjoy. ~Kevin Klues tinyos-2.1.2+dfsg/apps/tosthreads/apps/000077500000000000000000000000001207233610700200475ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/BaseStation/000077500000000000000000000000001207233610700222635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/BaseStation/BaseSendReceiveP.nc000066400000000000000000000156121207233610700257210ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * BaseStation is a reimplementation of the standard BaseStation application using * the TOSThreads thread library. It transparently forwards any AM messages it * receives from its radio interface to its serial interface and vice versa. * *

    On the serial link, BaseStation sends and receives simple active * messages (not particular radio packets): on the radio link, it * sends radio active messages, whose format depends on the network * stack being used. BaseStation will copy its compiled-in group ID to * messages moving from the serial link to the radio, and will filter * out incoming radio messages that do not contain that group ID.

    * *

    BaseStation includes queues in both directions, with a guarantee * that once a message enters a queue, it will eventually leave on the * other interface. The queues allow the BaseStation to handle load * spikes.

    * *

    BaseStation acknowledges a message arriving over the serial link * only if that message was successfully enqueued for delivery to the * radio link.

    * *

    The LEDS are programmed to toggle as follows:

    *
      *
    • LED0: Message bridged from serial to radio
      • *
    • LED1: Message bridged from radio to serial
      • *
    • LED2: Dropped message due to queue overflow in either direction
      • *
    * * @author Kevin Klues * @author Chieh-Jan Mike Liang */ generic module BaseSendReceiveP() { uses { interface Boot; interface Thread as ReceiveThread; interface Thread as SnoopThread; interface Thread as SendThread; interface ConditionVariable; interface Mutex; interface Pool; interface Queue; interface Leds; interface BlockingReceive as BlockingReceiveAny; interface BlockingReceive as BlockingSnoopAny; interface BlockingAMSend as BlockingAMSend[uint8_t id]; interface Packet as ReceivePacket; interface Packet as SendPacket; interface AMPacket as ReceiveAMPacket; interface AMPacket as SendAMPacket; } } implementation { condvar_t c_queue, c_pool; mutex_t m_queue, m_pool; event void Boot.booted() { call ConditionVariable.init(&c_queue); call ConditionVariable.init(&c_pool); call Mutex.init(&m_queue); call Mutex.init(&m_pool); call ReceiveThread.start(NULL); call SnoopThread.start(NULL); call SendThread.start(NULL); } event void ReceiveThread.run(void* arg) { message_t* msg; call Mutex.lock(&m_pool); msg = call Pool.get(); call Mutex.unlock(&m_pool); for(;;) { if(call BlockingReceiveAny.receive(msg, 0) == SUCCESS) { call Leds.led0Toggle(); call Mutex.lock(&m_queue); call Queue.enqueue(msg); call Mutex.unlock(&m_queue); if( call Queue.size() == 1 ) { call ConditionVariable.signalAll(&c_queue); } call Mutex.lock(&m_pool); while( call Pool.empty() ) call ConditionVariable.wait(&c_pool, &m_pool); msg = call Pool.get(); call Mutex.unlock(&m_pool); } else call Leds.led2Toggle(); } } event void SnoopThread.run(void* arg) { message_t* msg; call Mutex.lock(&m_pool); msg = call Pool.get(); call Mutex.unlock(&m_pool); for(;;) { if(call BlockingSnoopAny.receive(msg, 0) == SUCCESS) { call Leds.led0Toggle(); call Mutex.lock(&m_queue); call Queue.enqueue(msg); call Mutex.unlock(&m_queue); if( call Queue.size() == 1 ) { call ConditionVariable.signalAll(&c_queue); } call Mutex.lock(&m_pool); while( call Pool.empty() ) call ConditionVariable.wait(&c_pool, &m_pool); msg = call Pool.get(); call Mutex.unlock(&m_pool); } else call Leds.led2Toggle(); } } event void SendThread.run(void* arg) { message_t* msg; am_id_t id; am_addr_t source; am_addr_t dest; uint8_t len; for(;;) { call Mutex.lock(&m_queue); while( call Queue.empty() ) call ConditionVariable.wait(&c_queue, &m_queue); msg = call Queue.dequeue(); call Mutex.unlock(&m_queue); id = call ReceiveAMPacket.type(msg); source = call ReceiveAMPacket.source(msg); dest = call ReceiveAMPacket.destination(msg); len = call ReceivePacket.payloadLength(msg); call SendPacket.clear(msg); call SendAMPacket.setSource(msg, source); call BlockingAMSend.send[id](dest, msg, len); call Leds.led1Toggle(); call Mutex.lock(&m_pool); call Pool.put(msg); call Mutex.unlock(&m_pool); if( call Pool.size() == 1 ) { call ConditionVariable.signalAll(&c_pool); } } } default command error_t BlockingSnoopAny.receive(message_t* m, uint32_t timeout) { return FAIL; } default command void* BlockingSnoopAny.getPayload(message_t* msg, uint8_t len) { return NULL; } default command error_t SnoopThread.start(void* arg) { return FAIL; } default command error_t SnoopThread.stop() { return FAIL; } default command error_t SnoopThread.pause() { return FAIL; } default command error_t SnoopThread.resume() { return FAIL; } default command error_t SnoopThread.sleep(uint32_t milli) { return FAIL; } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/BaseStation/BaseStationAppC.nc000066400000000000000000000147241207233610700255750ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * BaseStation is a reimplementation of the standard BaseStation application using * the TOSThreads thread library. It transparently forwards any AM messages it * receives from its radio interface to its serial interface and vice versa. * *

    On the serial link, BaseStation sends and receives simple active * messages (not particular radio packets): on the radio link, it * sends radio active messages, whose format depends on the network * stack being used. BaseStation will copy its compiled-in group ID to * messages moving from the serial link to the radio, and will filter * out incoming radio messages that do not contain that group ID.

    * *

    BaseStation includes queues in both directions, with a guarantee * that once a message enters a queue, it will eventually leave on the * other interface. The queues allow the BaseStation to handle load * spikes.

    * *

    BaseStation acknowledges a message arriving over the serial link * only if that message was successfully enqueued for delivery to the * radio link.

    * *

    The LEDS are programmed to toggle as follows:

    *
      *
    • LED0: Message bridged from serial to radio
      • *
    • LED1: Message bridged from radio to serial
      • *
    • LED2: Dropped message due to queue overflow in either direction
      • *
    * * @author Kevin Klues * @author Chieh-Jan Mike Liang */ #include "base_station.h" #include "stack.h" #include "message.h" configuration BaseStationAppC {} implementation { components MainC, BaseStationC, new BaseSendReceiveP() as RadioReceiveSerialSendP, new BaseSendReceiveP() as SerialReceiveRadioSendP, new ThreadC(BOOT_THREAD_STACK_SIZE) as BootThread, new ThreadC(RADIO_RECEIVE_THREAD_STACK_SIZE) as RadioReceiveThread, new ThreadC(RADIO_SNOOP_THREAD_STACK_SIZE) as RadioSnoopThread, new ThreadC(SERIAL_SEND_THREAD_STACK_SIZE) as SerialSendThread, new ThreadC(SERIAL_RECEIVE_THREAD_STACK_SIZE) as SerialReceiveThread, new ThreadC(RADIO_SEND_THREAD_STACK_SIZE) as RadioSendThread, new PoolC(message_t, BASE_STATION_MSG_QUEUE_SIZE) as RadioReceivePool, new QueueC(message_t*, BASE_STATION_MSG_QUEUE_SIZE) as RadioReceiveQueue, new PoolC(message_t, BASE_STATION_MSG_QUEUE_SIZE) as SerialReceivePool, new QueueC(message_t*, BASE_STATION_MSG_QUEUE_SIZE) as SerialReceiveQueue, ThreadSynchronizationC, LedsC; BaseStationC.Boot -> MainC; RadioReceiveSerialSendP.Boot -> BaseStationC; SerialReceiveRadioSendP.Boot -> BaseStationC; BaseStationC.BootThread -> BootThread; RadioReceiveSerialSendP.ReceiveThread -> RadioReceiveThread; RadioReceiveSerialSendP.SnoopThread -> RadioSnoopThread; RadioReceiveSerialSendP.SendThread -> SerialSendThread; SerialReceiveRadioSendP.ReceiveThread -> SerialReceiveThread; SerialReceiveRadioSendP.SendThread -> RadioSendThread; RadioReceiveSerialSendP.Pool -> RadioReceivePool; RadioReceiveSerialSendP.Queue -> RadioReceiveQueue; SerialReceiveRadioSendP.Pool -> SerialReceivePool; SerialReceiveRadioSendP.Queue -> SerialReceiveQueue; RadioReceiveSerialSendP.ConditionVariable -> ThreadSynchronizationC; RadioReceiveSerialSendP.Mutex -> ThreadSynchronizationC; RadioReceiveSerialSendP.Leds -> LedsC; SerialReceiveRadioSendP.ConditionVariable -> ThreadSynchronizationC; SerialReceiveRadioSendP.Mutex -> ThreadSynchronizationC; SerialReceiveRadioSendP.Leds -> LedsC; components BlockingActiveMessageC as BlockingRadioActiveMessageC, BlockingSerialActiveMessageC; BaseStationC.BlockingRadioAMControl -> BlockingRadioActiveMessageC; BaseStationC.BlockingSerialAMControl -> BlockingSerialActiveMessageC; RadioReceiveSerialSendP.ReceivePacket -> BlockingRadioActiveMessageC; RadioReceiveSerialSendP.SendPacket -> BlockingSerialActiveMessageC; RadioReceiveSerialSendP.ReceiveAMPacket -> BlockingRadioActiveMessageC; RadioReceiveSerialSendP.SendAMPacket -> BlockingSerialActiveMessageC; RadioReceiveSerialSendP.BlockingReceiveAny -> BlockingRadioActiveMessageC.BlockingReceiveAny; RadioReceiveSerialSendP.BlockingSnoopAny -> BlockingRadioActiveMessageC.BlockingSnoopAny; RadioReceiveSerialSendP.BlockingAMSend -> BlockingSerialActiveMessageC; SerialReceiveRadioSendP.ReceivePacket -> BlockingSerialActiveMessageC; SerialReceiveRadioSendP.SendPacket -> BlockingRadioActiveMessageC; SerialReceiveRadioSendP.ReceiveAMPacket -> BlockingSerialActiveMessageC; SerialReceiveRadioSendP.SendAMPacket -> BlockingRadioActiveMessageC; SerialReceiveRadioSendP.BlockingReceiveAny -> BlockingSerialActiveMessageC.BlockingReceiveAny; SerialReceiveRadioSendP.BlockingAMSend -> BlockingRadioActiveMessageC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/BaseStation/BaseStationC.nc000066400000000000000000000067001207233610700251270ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * BaseStation is a reimplementation of the standard BaseStation application using * the TOSThreads thread library. It transparently forwards any AM messages it * receives from its radio interface to its serial interface and vice versa. * *

    On the serial link, BaseStation sends and receives simple active * messages (not particular radio packets): on the radio link, it * sends radio active messages, whose format depends on the network * stack being used. BaseStation will copy its compiled-in group ID to * messages moving from the serial link to the radio, and will filter * out incoming radio messages that do not contain that group ID.

    * *

    BaseStation includes queues in both directions, with a guarantee * that once a message enters a queue, it will eventually leave on the * other interface. The queues allow the BaseStation to handle load * spikes.

    * *

    BaseStation acknowledges a message arriving over the serial link * only if that message was successfully enqueued for delivery to the * radio link.

    * *

    The LEDS are programmed to toggle as follows:

    *
      *
    • LED0: Message bridged from serial to radio
      • *
    • LED1: Message bridged from radio to serial
      • *
    • LED2: Dropped message due to queue overflow in either direction
      • *
    * * @author Kevin Klues */ module BaseStationC { provides { interface Boot as BaseStationBoot; } uses { interface Boot; interface Thread as BootThread; interface BlockingStdControl as BlockingRadioAMControl; interface BlockingStdControl as BlockingSerialAMControl; } } implementation { event void Boot.booted() { call BootThread.start(NULL); } event void BootThread.run(void* arg) { call BlockingRadioAMControl.start(); call BlockingSerialAMControl.start(); signal BaseStationBoot.booted(); } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/BaseStation/Makefile000066400000000000000000000002351207233610700237230ustar00rootroot00000000000000COMPONENT=BaseStationAppC CFLAGS+=-DCC2420_NO_ACKNOWLEDGEMENTS CFLAGS+=-DCC2420_NO_ADDRESS_RECOGNITION CFLAGS+=-DTOSH_DATA_LENGTH=115 include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/apps/BaseStation/README000066400000000000000000000047271207233610700231550ustar00rootroot00000000000000README for TOSThreads BaseStation Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: BaseStation is a reimplementation of the standard BaseStation application using the TOSThreads thread library. It transparently forwards any AM messages it receives from its radio interface to its serial interface and vice versa. Upon successful reception of a packet, LED0 is toggled, and upon successful forwarding, LED1 is toggled. If there are any errors, LED2 is toggled. To run this application install it on a mote via the command: make threads install.45 Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Installing with NODE_ID 45 (i.e. AM_ADDRESS 45) is just to verify that the application forwards packets with an arbitrarily chosen id, which it should. To test the correct operation of this application, you need two motes: one with this BaseStation application installed on it, and one with an application that is sending messages installed, (let's use the RadioStress application from the current directory). On one mote install the Base station via the command above, and on the other install RadioStress via the command: make threads install.1 Don't forget the '.1' when you install, or RadioStress will be configured to receive rather than send messages. Messages are sent to AM_ADDRESS 0. A successful test will result in the RadioStress mote constantly flickering all of its leds very rapidly, and the BaseStation mote flickering its LED0 and LED1 leds rapidly. Additionally, messages should be forwarded over the serial interface as verified by running the following for the platform of interest: java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX: NOTE:: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. Once this java application is running, you should see output of the sort constantly being streamed to your terminal: 00 00 00 00 01 00 00 14 00 00 00 00 01 00 00 16 00 00 00 00 01 00 00 15 00 00 00 00 01 00 00 14 00 00 00 00 01 00 00 16 00 00 00 00 01 00 00 15 00 00 00 00 01 00 00 14 00 00 00 00 01 00 00 16 00 00 00 00 01 00 00 15 00 00 00 00 01 00 00 14 Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/BaseStation/base_station.h000066400000000000000000000035631207233610700251160ustar00rootroot00000000000000 /* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Header file for declaring constants and AM types for use by the * BaseStation application * * @author Kevin Klues */ #ifndef BASE_STATION_H #define BASE_STATION_H enum { BASE_STATION_MSG_QUEUE_SIZE = 3, }; enum { AM_SERIAL_BASE_MSG = 0, }; #endif //BASE_STATION_H tinyos-2.1.2+dfsg/apps/tosthreads/apps/BaseStation/stack.h000066400000000000000000000037501207233610700235460ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef BASE_STATION_APP_STACK_H #define BASE_STATION_APP_STACK_H enum { BOOT_THREAD_STACK_SIZE = 200, RADIO_RECEIVE_THREAD_STACK_SIZE = 200, RADIO_SNOOP_THREAD_STACK_SIZE = 200, SERIAL_SEND_THREAD_STACK_SIZE = 200, SERIAL_RECEIVE_THREAD_STACK_SIZE = 200, RADIO_SEND_THREAD_STACK_SIZE = 200, }; #endif //BASE_STATION_APP_STACK_H tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink/000077500000000000000000000000001207233610700211065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink/BlinkAppC.nc000066400000000000000000000044731207233610700232430ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Blink is a simple application used to test the basic functionality of * TOSThreads. * * Upon a successful burn, you should see LED0 flashing with a period of every * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms. * * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration BlinkAppC { } implementation { components MainC, BlinkC, LedsC; components new ThreadC(100) as NullThread; components new ThreadC(100) as TinyThread0; components new ThreadC(100) as TinyThread1; components new ThreadC(100) as TinyThread2; MainC.Boot <- BlinkC; BlinkC.NullThread -> NullThread; BlinkC.TinyThread0 -> TinyThread0; BlinkC.TinyThread1 -> TinyThread1; BlinkC.TinyThread2 -> TinyThread2; BlinkC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink/BlinkC.nc000066400000000000000000000053161207233610700225770ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Blink is a simple application used to test the basic functionality of * TOSThreads. * * Upon a successful burn, you should see LED0 flashing with a period of every * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms. * * @author Kevin Klues (klueska@cs.stanford.edu) */ module BlinkC { uses { interface Boot; interface Thread as NullThread; interface Thread as TinyThread0; interface Thread as TinyThread1; interface Thread as TinyThread2; interface Leds; } } implementation { event void Boot.booted() { //call NullThread.start(NULL); call TinyThread0.start(NULL); call TinyThread1.start(NULL); call TinyThread2.start(NULL); } event void NullThread.run(void* arg) { for(;;){ } } event void TinyThread0.run(void* arg) { for(;;){ call Leds.led0Toggle(); call TinyThread0.sleep(200); } } event void TinyThread1.run(void* arg) { for(;;){ call Leds.led1Toggle(); call TinyThread1.sleep(1000); } } event void TinyThread2.run(void* arg) { for(;;){ call Leds.led2Toggle(); call TinyThread2.sleep(1000); } } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink/Makefile000066400000000000000000000000521207233610700225430ustar00rootroot00000000000000COMPONENT=BlinkAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink/README000066400000000000000000000011371207233610700217700ustar00rootroot00000000000000README for TOSThreads Blink Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: Blink is a simple application used to test the basic functionality of TOSThreads. You can install Blink on a mote via the following command: make threads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Upon a successful burn, you should see LED0 flashing with a period of every 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink_DynamicThreads/000077500000000000000000000000001207233610700240655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink_DynamicThreads/BlinkAppC.nc000066400000000000000000000042061207233610700262140ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Blink is a simple application used to test the basic functionality of * TOSThreads using dynamic threads rather than static threads. * * Upon a successful burn, you should see LED0 flashing with a period of every * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms. * * @author Chieh-Jan Mike Liang */ configuration BlinkAppC {} implementation { components MainC, BlinkC, LedsC, DynamicThreadC; BlinkC.Boot -> MainC; BlinkC.Leds -> LedsC; BlinkC.DynamicThread -> DynamicThreadC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink_DynamicThreads/BlinkC.nc000066400000000000000000000054131207233610700255540ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Blink is a simple application used to test the basic functionality of * TOSThreads using dynamic threads rather than static threads. * * Upon a successful burn, you should see LED0 flashing with a period of every * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms. * * @author Chieh-Jan Mike Liang */ module BlinkC { uses { interface Boot; interface Leds; interface DynamicThread; } } implementation { tosthread_t blink1; tosthread_t blink2; tosthread_t blink3; uint16_t a1 = 1; uint16_t a2 = 2; uint16_t a3 = 3; void blink_thread(void* arg) { uint16_t *a = (uint16_t *)arg; for (;;) { if (*a == 1) { call Leds.led0Toggle(); call DynamicThread.sleep(200); } else if (*a == 2) { call Leds.led1Toggle(); call DynamicThread.sleep(1000); } else if (*a == 3) { call Leds.led2Toggle(); call DynamicThread.sleep(1000); } } } event void Boot.booted() { call DynamicThread.create(&blink1, blink_thread, &a1, 500); call DynamicThread.create(&blink2, blink_thread, &a2, 500); call DynamicThread.create(&blink3, blink_thread, &a3, 500); } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink_DynamicThreads/Makefile000066400000000000000000000000521207233610700255220ustar00rootroot00000000000000COMPONENT=BlinkAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/apps/Blink_DynamicThreads/README000066400000000000000000000011521207233610700247440ustar00rootroot00000000000000README for TOSThreads Blink_DynamicThreads Author/Contact: tinyos-help@millennium.berkeley.edu Author: Chieh-Jan Mike Liang Description: Blink_DynamicThreads is the dynamic-thread version of Blink. You can install Blink_DynamicThread on a mote via the following command: make threads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Upon a successful burn, you should see LED0 flashing with a period of every 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/Bounce/000077500000000000000000000000001207233610700212625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/Bounce/BarrierBounceAppC.nc000066400000000000000000000117361207233610700251020ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is derived from a similar application in the TinyThread * implementation by William P. McCartney from Cleveland State University (2006) * * This application implements a threaded approach to bouncing messages back and forth * between two motes. To run it you will need to burn one mote with node ID 0, and a * second mote with node ID 1. Three different threads run that each send a * message and then wait to receive a message before sending their next one. After * each message reception, an LED is toggled to indicate that it was received. Thread * 0 blinks led0, thread 1 blinks led1, and thread 2 blinks led2. The three * threads run independently, and three different messages are bounced back and * forth between the two motes in an unsynchronized fashion. In contrast to the simple * Bounce application also found in this directory, once a thread receives a message * it waits on a Barrier before continuing on and turning on its led. A synchronization * thread is used to wait until all three messages have been received before unblocking * the barrier. In this way, messages are still bounced back and forth between the * two motes in an asynchronous fashion, but all leds come on at the same time * because of the Barrier and the synchronization thread. The effect is that all three * leds on one mote flash in unison, followed by all three on the other mote back * and forth forever. * * @author Kevin Klues */ #include "barrier_bounce.h" #include "stack.h" configuration BarrierBounceAppC { } implementation { components MainC, BarrierBounceC as BounceC, LedsC; components BlockingActiveMessageC; MainC.Boot <- BounceC; BounceC.BlockingAMControl -> BlockingActiveMessageC; BounceC.Leds -> LedsC; // Included to allow the use of barriers in our application components ThreadSynchronizationC; BounceC.Barrier -> ThreadSynchronizationC; // Thread and Bounce Message handlers for thread 0 components new ThreadC(BOUNCE_THREAD0_STACK_SIZE) as BounceThread0; components new BlockingAMSenderC(AM_BOUNCE0_MSG) as BlockingAMSender0; components new BlockingAMReceiverC(AM_BOUNCE0_MSG) as BlockingAMReceiver0; BounceC.BounceThread0 -> BounceThread0; BounceC.BlockingAMSend0 -> BlockingAMSender0; BounceC.BlockingReceive0 -> BlockingAMReceiver0; // Thread and Bounce Message handlers for thread 1 components new ThreadC(BOUNCE_THREAD1_STACK_SIZE) as BounceThread1; components new BlockingAMSenderC(AM_BOUNCE1_MSG) as BlockingAMSender1; components new BlockingAMReceiverC(AM_BOUNCE1_MSG) as BlockingAMReceiver1; BounceC.BounceThread1 -> BounceThread1; BounceC.BlockingAMSend1 -> BlockingAMSender1; BounceC.BlockingReceive1 -> BlockingAMReceiver1; // Thread and Bounce Message handlers for thread 2 components new ThreadC(BOUNCE_THREAD2_STACK_SIZE) as BounceThread2; components new BlockingAMSenderC(AM_BOUNCE2_MSG) as BlockingAMSender2; components new BlockingAMReceiverC(AM_BOUNCE2_MSG) as BlockingAMReceiver2; BounceC.BounceThread2 -> BounceThread2; BounceC.BlockingAMSend2 -> BlockingAMSender2; BounceC.BlockingReceive2 -> BlockingAMReceiver2; // Synchronization thread to keep all threads in sync so that // none of them are able to continue execution until all of them // have both sent and received a message components new ThreadC(SYNC_THREAD_STACK_SIZE) as SyncThread; BounceC.SyncThread -> SyncThread; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/Bounce/BarrierBounceC.nc000066400000000000000000000123421207233610700244330ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is derived from a similar application in the TinyThread * implementation by William P. McCartney from Cleveland State University (2006) * * This application implements a threaded approach to bouncing messages back and forth * between two motes. To run it you will need to burn one mote with node ID 0, and a * second mote with node ID 1. Three different threads run that each send a * message and then wait to receive a message before sending their next one. After * each message reception, an LED is toggled to indicate that it was received. Thread * 0 blinks led0, thread 1 blinks led1, and thread 2 blinks led2. The three * threads run independently, and three different messages are bounced back and * forth between the two motes in an unsynchronized fashion. In contrast to the simple * Bounce application also found in this directory, once a thread receives a message * it waits on a Barrier before continuing on and turning on its led. A synchronization * thread is used to wait until all three messages have been received before unblocking * the barrier. In this way, messages are still bounced back and forth between the * two motes in an asynchronous fashion, but all leds come on at the same time * because of the Barrier and the synchronization thread. The effect is that all three * leds on one mote flash in unison, followed by all three on the other mote back * and forth forever. * * @author Kevin Klues */ module BarrierBounceC { uses { interface Boot; interface BlockingStdControl as BlockingAMControl; interface Barrier; interface Thread as BounceThread0; interface BlockingAMSend as BlockingAMSend0; interface BlockingReceive as BlockingReceive0; interface Thread as BounceThread1; interface BlockingAMSend as BlockingAMSend1; interface BlockingReceive as BlockingReceive1; interface Thread as BounceThread2; interface BlockingAMSend as BlockingAMSend2; interface BlockingReceive as BlockingReceive2; interface Thread as SyncThread; interface Leds; } } implementation { message_t m0,m1,m2; barrier_t b0; event void Boot.booted() { //Reset all barriers used in this program at initialization call Barrier.reset(&b0, 4); //Start the sync thread to power up the AM layer call SyncThread.start(NULL); } event void BounceThread0.run(void* arg) { for(;;) { call Leds.led0Off(); call BlockingAMSend0.send(!TOS_NODE_ID, &m0, 0); if(call BlockingReceive0.receive(&m0, 5000) == SUCCESS) { call Barrier.block(&b0); call Leds.led0On(); call BounceThread0.sleep(500); } } } event void BounceThread1.run(void* arg) { for(;;) { call Leds.led1Off(); call BlockingAMSend1.send(!TOS_NODE_ID, &m1, 0); if(call BlockingReceive1.receive(&m1, 5000) == SUCCESS) { call Barrier.block(&b0); call Leds.led1On(); call BounceThread1.sleep(500); } } } event void BounceThread2.run(void* arg) { for(;;) { call Leds.led2Off(); call BlockingAMSend2.send(!TOS_NODE_ID, &m2, 0); if(call BlockingReceive2.receive(&m2, 5000) == SUCCESS) { call Barrier.block(&b0); call Leds.led2On(); call BounceThread2.sleep(500); } } } event void SyncThread.run(void* arg) { //Once the am layer is powered on, start the rest of // the threads call BlockingAMControl.start(); call BounceThread0.start(NULL); call BounceThread1.start(NULL); call BounceThread2.start(NULL); for(;;) { call Barrier.block(&b0); call Barrier.reset(&b0, 4); } } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/Bounce/Makefile000066400000000000000000000001301207233610700227140ustar00rootroot00000000000000COMPONENT=BarrierBounceAppC PFLAGS += -DCC2420_HW_ACKNOWLEDGEMENTS include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/apps/Bounce/README000066400000000000000000000036741207233610700221540ustar00rootroot00000000000000README for TOSThreads Bounce Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application is derived from a similar application in the TinyThread implementation by William P. McCartney from Cleveland State University (2006) This application stresses the operation of the thread based AM commands for packet transmission and reception. To run this application you will need to burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1. You can install Bounce on a mote via the following command: make threads install.0 make threads install.1 Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Three different threads run, and each contains an infinite loop that first sends a message and then waits to receive a message before returning to the top of the loop. After each message reception, one of the onboard LEDs is toggled to indicate that it was received. Thread 0 blinks LED0, thread 1 blinks LED1, and thread 2 blinks LED2. The three threads run independently, and three different messages are bounced back and forth between the two motes in an unsynchronized fashion. In contrast to the simple Bounce application found in the cthreads version of this application, once a thread receives a message it waits on a Barrier before continuing on and turning on its led. A synchronization thread is used to wait until all three messages have been received by each thread before unblocking the barrier. In this way, messages are still bounced back and forth between the two motes in an asynchronous fashion, but all leds come on at the same time because of the Barrier and the synchronization thread. Successful running of this application results in all three leds coming on in unison on one mote and then coming on in unison on the other mote, back and forth forever. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/Bounce/barrier_bounce.h000066400000000000000000000035761207233610700244270ustar00rootroot00000000000000 /* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Header file for declaring AM types for Bounce messages * in the BarrierBounce application * * @author Kevin Klues */ #ifndef BARRIER_BOUNCE_H #define BARRIER_BOUNCE_H enum { AM_BOUNCE0_MSG = 0x90, AM_BOUNCE1_MSG = 0x91, AM_BOUNCE2_MSG = 0x92, }; #endif //BARRIER_BOUNCE_H tinyos-2.1.2+dfsg/apps/tosthreads/apps/Bounce/stack.h000066400000000000000000000035711207233610700225460ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef BARRIER_BOUNCE_APP_STACK_H #define BARRIER_BOUNCE_APP_STACK_H enum { BOUNCE_THREAD0_STACK_SIZE = 600, BOUNCE_THREAD1_STACK_SIZE = 600, BOUNCE_THREAD2_STACK_SIZE = 600, SYNC_THREAD_STACK_SIZE = 600, }; #endif //BARRIER_BOUNCE_APP_STACK_H tinyos-2.1.2+dfsg/apps/tosthreads/apps/Makefile000066400000000000000000000030521207233610700215070ustar00rootroot00000000000000#-*-makefile-*- ###################################################################### # # Makes the entire suite of TinyOS applications for a given platform. # # Author: Martin Turon # Date: August 18, 2005 # ###################################################################### # $Id: Makefile,v 1.1 2008-06-12 15:11:38 klueska Exp $ # MAKECMDGOALS is the way to get the arguments passed into a Makefile ... TARGET=$(MAKECMDGOALS) NESDOC_TARGET=$(filter-out nesdoc,$(TARGET)) # Here is a way to get the list of subdirectories in a Makefile ... ROOT=. SUBDIRS := $(shell find * -type d) # Okay, match any target, and recurse the subdirectories %: @for i in $(SUBDIRS); do \ HERE=$$PWD; \ if [ -f $$i/Makefile ]; then \ echo Building ... $(PWD)/$$i; \ echo make $(TARGET); \ cd $$i; \ $(MAKE) $(TARGET); \ cd $$HERE; \ fi; \ done threads: @: cthreads: @: dynthreads: @: BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' ) # The output directory for generated documentation DOCDIR = $(BASEDIR)/doc/nesdoc nesdoc: @echo This target rebuilds documentation for all known platforms. @echo It DOES NOT overwrite any existing documentation, thus, it @echo is best run after deleting all old documentation. @echo @echo To delete all old documentation, delete the contents of the @echo $(DOCDIR) directory. @echo @echo Press Enter to continue, or ^C to abort. @read for platform in `ncc -print-platforms`; do \ $(MAKE) $$platform docs.nohtml.preserve; \ nesdoc -o $(DOCDIR) -html -target=$$platform; \ done tinyos-2.1.2+dfsg/apps/tosthreads/apps/RadioStress/000077500000000000000000000000001207233610700223115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/RadioStress/Makefile000066400000000000000000000000601207233610700237450ustar00rootroot00000000000000COMPONENT=RadioStressAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/apps/RadioStress/README000066400000000000000000000030161207233610700231710ustar00rootroot00000000000000README for TOSThreads RadioStress Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application stresses the operation of the thread based AM commands for packet transmission and reception. To run this application you will need to burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1. You can install RadioStress on a mote via the following command: make threads install.0 make threads install.1 Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic The application burned with NODE_ID 0 will be programmed as a receiver and will wait for messages from the sender programmed with NODE_ID 1. In the case of the sender, messages with three different AM ids are sent from three different threads in an infinite loop, and one of LED0, LED1, and LED2 is toggled upon successful transmission. In the case of the receiver, three different threads are used to wait for messages in an infinite loop from the three sending threads on the sender mote. Upon successful reception, one of LED0, LED1, or LED2 is toggled depending on the AM id received. Successful running of this application will result in all three leds flashing very rapidly on both motes, with the receiver mote flashing less rapidly if the sender mote is turned off (i.e. once every 5000ms because there is a timeout on how long it waits for messages to be received before retrying). Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/RadioStress/RadioStressAppC.nc000066400000000000000000000066431207233610700256520ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application stresses the blocking send and receive commands for the TinyOS * thread implementation. Three threads are run, each thread toggling a different * colored LED. If a node has TOS_NODE_ID == 0 it will try and receive in * an infinite loop, toggling one of the three Leds upon reception. If it has * TOS_NODE_ID == 1, it will try to send in an infinite loop, toggling one of the three * Leds upon the completion of a send. Thread 0 toggles the Led0, Thread 1 toggles * Led1, and Thread 2 toggles Led2. * * @author Kevin Klues */ configuration RadioStressAppC { } implementation { components MainC, RadioStressC, LedsC; components BlockingActiveMessageC; MainC.Boot <- RadioStressC; RadioStressC.BlockingAMControl -> BlockingActiveMessageC; RadioStressC.Leds -> LedsC; components new ThreadC(300) as RadioStressThread0; components new BlockingAMSenderC(220) as BlockingAMSender0; components new BlockingAMReceiverC(220) as BlockingAMReceiver0; RadioStressC.RadioStressThread0 -> RadioStressThread0; RadioStressC.BlockingAMSend0 -> BlockingAMSender0; RadioStressC.BlockingReceive0 -> BlockingAMReceiver0; components new ThreadC(300) as RadioStressThread1; components new BlockingAMSenderC(221) as BlockingAMSender1; components new BlockingAMReceiverC(221) as BlockingAMReceiver1; RadioStressC.RadioStressThread1 -> RadioStressThread1; RadioStressC.BlockingAMSend1 -> BlockingAMSender1; RadioStressC.BlockingReceive1 -> BlockingAMReceiver1; components new ThreadC(300) as RadioStressThread2; components new BlockingAMSenderC(222) as BlockingAMSender2; components new BlockingAMReceiverC(222) as BlockingAMReceiver2; RadioStressC.RadioStressThread2 -> RadioStressThread2; RadioStressC.BlockingAMSend2 -> BlockingAMSender2; RadioStressC.BlockingReceive2 -> BlockingAMReceiver2; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/RadioStress/RadioStressC.nc000066400000000000000000000101071207233610700251770ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application stresses the blocking send and receive commands for the TinyOS * thread implementation. Three threads are run, each thread toggling a different * colored LED. If a node has TOS_NODE_ID == 0 it will try and receive in * an infinite loop, toggling one of the three Leds upon reception. If it has * TOS_NODE_ID == 1, it will try to send in an infinite loop, toggling one of the three * Leds upon the completion of a send. Thread 0 toggles the Led0, Thread 1 toggles * Led1, and Thread 2 toggles Led2. * * @author Kevin Klues */ #include "AM.h" module RadioStressC { uses { interface Boot; interface BlockingStdControl as BlockingAMControl; interface Thread as RadioStressThread0; interface BlockingAMSend as BlockingAMSend0; interface BlockingReceive as BlockingReceive0; interface Thread as RadioStressThread1; interface BlockingAMSend as BlockingAMSend1; interface BlockingReceive as BlockingReceive1; interface Thread as RadioStressThread2; interface BlockingAMSend as BlockingAMSend2; interface BlockingReceive as BlockingReceive2; interface Leds; } } implementation { message_t m0; message_t m1; message_t m2; event void Boot.booted() { call RadioStressThread0.start(NULL); call RadioStressThread1.start(NULL); call RadioStressThread2.start(NULL); } event void RadioStressThread0.run(void* arg) { call BlockingAMControl.start(); for(;;) { if(TOS_NODE_ID == 0) { call BlockingReceive0.receive(&m0, 5000); call Leds.led0Toggle(); } else { call BlockingAMSend0.send(!TOS_NODE_ID, &m0, 0); call Leds.led0Toggle(); //call RadioStressThread0.sleep(500); } } } event void RadioStressThread1.run(void* arg) { call BlockingAMControl.start(); for(;;) { if(TOS_NODE_ID == 0) { call BlockingReceive1.receive(&m1, 5000); call Leds.led1Toggle(); } else { call BlockingAMSend1.send(!TOS_NODE_ID, &m1, 0); call Leds.led1Toggle(); //call RadioStressThread1.sleep(500); } } } event void RadioStressThread2.run(void* arg) { call BlockingAMControl.start(); for(;;) { if(TOS_NODE_ID == 0) { call BlockingReceive2.receive(&m2, 5000); call Leds.led2Toggle(); } else { call BlockingAMSend2.send(!TOS_NODE_ID, &m2, 0); call Leds.led2Toggle(); //call RadioStressThread2.sleep(500); } } } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBasicsbSensors/000077500000000000000000000000001207233610700236325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBasicsbSensors/Makefile000066400000000000000000000005571207233610700253010ustar00rootroot00000000000000COMPONENT=TestBasicsbSensorsAppC CFLAGS += -I$(TOSDIR)/sensorboards/basicsb CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/basicsb ifneq ($(filter mica2 mica2dot micaz iris clean,$(MAKECMDGOALS)),) include $(MAKERULES) else %: @echo " Sorry, this application is only written to work with mica based motes and the basicsb sensorboards.." threads: @: endif tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBasicsbSensors/README000066400000000000000000000022111207233610700245060ustar00rootroot00000000000000README for TOSThreads TestBasicsbSensors Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application is used to test the threaded version of the API for accessing sensors on the basicsb sensor board. You can install TestBasicsbSensors on a mote via the following command: make threads install Valid platforms are currently: mica2, micaz and iris This application simply takes sensor readings in an infinite loop from the Photo and Temperature sensors on the basicsb sensor board and forwards them over the serial interface. Upon successful transmission, LED0 is toggled. A successful test will result in the TestBasicsbSensors mote constantly flickering LED0. Additionally, messages containing the sensor readings should be forwarded over the serial interface as verified by running the following for the platform of interest: java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX: Once this java application is running, you should see output containing the sensor readings being streamed to your terminal. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBasicsbSensors/TestBasicsbSensorsAppC.nc000066400000000000000000000062411207233610700305060ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is used to test the threaded version of the API for accessing * sensors on the basicsb sensor board. * * This application simply takes sensor readings in an infinite loop from the * Photo and Temperature sensors on the basicsb sensor board and forwards them * over the serial interface. Upon successful transmission, LED0 is toggled. * * A successful test will result in the TestBasicsbSensors mote constantly * flickering LED0. Additionally, messages containing the sensor readings should * be forwarded over the serial interface as verified by running the following * for the platform of interest: * java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX: * * Once this java application is running, you should see output containing the * sensor readings being streamed to your terminal. * * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration TestBasicsbSensorsAppC { } implementation { components MainC, TestBasicsbSensorsC; components new ThreadC(125) as MainThread; components new BlockingPhotoC(); components new BlockingTempC(); components BlockingSerialActiveMessageC; components new BlockingSerialAMSenderC(128); MainC.Boot <- TestBasicsbSensorsC; TestBasicsbSensorsC.MainThread -> MainThread; TestBasicsbSensorsC.Photo -> BlockingPhotoC; TestBasicsbSensorsC.Temp -> BlockingTempC; TestBasicsbSensorsC.AMControl -> BlockingSerialActiveMessageC; TestBasicsbSensorsC.BlockingAMSend -> BlockingSerialAMSenderC; TestBasicsbSensorsC.Packet -> BlockingSerialAMSenderC; components LedsC; TestBasicsbSensorsC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBasicsbSensors/TestBasicsbSensorsC.nc000066400000000000000000000051751207233610700300520ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ module TestBasicsbSensorsC { uses { interface Boot; interface Thread as MainThread; interface BlockingRead as Photo; interface BlockingRead as Temp; interface BlockingStdControl as AMControl; interface BlockingAMSend; interface Packet; interface Leds; } } implementation { typedef struct sensor_readings { uint16_t photo; uint16_t temp; } sensor_readings_t; event void Boot.booted() { call MainThread.start(NULL); } event void MainThread.run(void* arg) { sensor_readings_t* readings; message_t msg; readings = call Packet.getPayload(&msg, sizeof(sensor_readings_t)); while( call AMControl.start() != SUCCESS ); for(;;){ while( call Photo.read(&(readings->photo)) != SUCCESS ); while( call Temp.read(&(readings->temp)) != SUCCESS ); while( call BlockingAMSend.send(AM_BROADCAST_ADDR, &msg, sizeof(sensor_readings_t)) != SUCCESS ); call Leds.led0Toggle(); call MainThread.sleep(512); } } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBlockStorage/000077500000000000000000000000001207233610700232665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBlockStorage/Makefile000066400000000000000000000011731207233610700247300ustar00rootroot00000000000000COMPONENT=TestBlockStorageAppC THIS_SUPPORTED_PLATFORMS=tmote telos telosb eyesIFXv1 eyesIFXv2 mica2 mica2dot telosa eyesIFX micaz iris tinynode mulle ifneq ($(filter $(THIS_SUPPORTED_PLATFORMS) clean,$(MAKECMDGOALS)),) ifneq ($(filter tmote telos telosb eyesIFXv1,$(MAKECMDGOALS)),) CFLAGS+=-DUSE_STM25P endif ifneq ($(filter mica2 telosa mica2dot eyesIFX eyesIFXv2 micaz iris tinynode mulle,$(MAKECMDGOALS)),) CFLAGS+=-DUSE_AT45DB endif include $(MAKERULES) else %: @echo " Sorry, this application is only written to work with the following platforms:" @echo " $(THIS_SUPPORTED_PLATFORMS)" threads: @: endif tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBlockStorage/README000066400000000000000000000015471207233610700241550ustar00rootroot00000000000000README for TOSThreads TestBlockStorage Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application is used to test the threaded version of the API for performing block storage. You can install TestBlockStorage on a mote via the following command: make threads install Valid platforms are currently: tmote, telosb, mica2, micaz, iris and mulle This application first checks the size of the block storage volume, and erases it. Then, it randomly writes records, followed by a verification with read. Successful running of this application results in LED0 being ON throughout the duration of the erase, write, and read sequence. Finally, if all tests pass, LED1 is turned ON. Otherwise, all three LEDs are turned ON to indicate problems. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBlockStorage/TestBlockStorageAppC.nc000066400000000000000000000052541207233610700276010ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is used to test the threaded version of the API for performing * block storage. * * This application first checks the size of the block storage volume, and * erases it. Then, it randomly writes records, followed by a verification * with read. * * Successful running of this application results in LED0 being ON * throughout the duration of the erase, write, and read sequence. Finally, * if all tests pass, LED1 is turned ON. Otherwise, all three LEDs are * turned ON to indicate problems. * * @author Chieh-Jan Mike Liang */ #include "StorageVolumes.h" configuration TestBlockStorageAppC {} implementation { components MainC, TestBlockStorageP, LedsC, new ThreadC(500) as TinyThread1, new BlockingBlockStorageC(VOLUME_TESTBLOCKSTORAGE1) as BlockingBlockStorage1, RandomC; TestBlockStorageP.Boot -> MainC; TestBlockStorageP.Leds -> LedsC; TestBlockStorageP.BlockingBlock1 -> BlockingBlockStorage1; TestBlockStorageP.TinyThread1 -> TinyThread1; TestBlockStorageP.Random -> RandomC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBlockStorage/TestBlockStorageP.nc000066400000000000000000000067771207233610700271700ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is used to test the threaded version of the API for performing * block storage. * * This application first checks the size of the block storage volume, and * erases it. Then, it randomly writes records, followed by a verification * with read. * * Successful running of this application results in LED0 being ON * throughout the duration of the erase, write, and read sequence. Finally, * if all tests pass, LED1 is turned ON. Otherwise, all three LEDs are * turned ON to indicate problems. * * @author Chieh-Jan Mike Liang */ #include "Storage.h" module TestBlockStorageP { uses { interface Boot; interface Leds; interface Thread as TinyThread1; interface BlockingBlock as BlockingBlock1; interface Random; } } implementation { event void Boot.booted() { call TinyThread1.start(NULL); } event void TinyThread1.run(void* arg) { int i; error_t error; #if defined USE_AT45DB storage_len_t expectedVolumeSize = 262144; #elif defined USE_STM25P storage_len_t expectedVolumeSize = 1048576; #endif call Leds.set(1); if (call BlockingBlock1.getSize() != expectedVolumeSize) { call Leds.set(7); return; } error = call BlockingBlock1.erase(); if (error != SUCCESS) { call Leds.set(7); return; } for (i = 0; i < 50; i++) { storage_addr_t writeAddr = call Random.rand32() % (call BlockingBlock1.getSize() - sizeof(storage_addr_t)); storage_len_t len = sizeof(storage_addr_t); storage_addr_t readBuf; error = call BlockingBlock1.write(writeAddr, &writeAddr, &len); if (error == SUCCESS) { len = sizeof(storage_addr_t); call BlockingBlock1.read(writeAddr, &readBuf, &len); if (readBuf != writeAddr) { call Leds.set(7); return; } } else { call Leds.set(7); return; } } call Leds.set(2); } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBlockStorage/volumes-at45db.xml000066400000000000000000000001371207233610700265640ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestBlockStorage/volumes-stm25p.xml000066400000000000000000000001401207233610700266250ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/000077500000000000000000000000001207233610700230025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/Makefile000066400000000000000000000004561207233610700244470ustar00rootroot00000000000000COMPONENT=TestCollectionAppC CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/net/ CFLAGS += -I$(TOSDIR)/lib/net/ CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/net/ctp CFLAGS += -I$(TOSDIR)/lib/net/ctp -I$(TOSDIR)/lib/net/4bitle include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/MultihopOscilloscope.h000066400000000000000000000017721207233610700273420ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * @author David Gay * @author Kyle Jamieson */ #ifndef MULTIHOP_OSCILLOSCOPE_H #define MULTIHOP_OSCILLOSCOPE_H enum { /* Number of readings per message. If you increase this, you may have to increase the message_t size. */ NREADINGS = 5, /* Default sampling period. */ DEFAULT_INTERVAL = 1024, AM_OSCILLOSCOPE = 0x93 }; typedef nx_struct oscilloscope { nx_uint16_t version; /* Version of the interval. */ nx_uint16_t interval; /* Samping period. */ nx_uint16_t id; /* Mote id of sending mote. */ nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */ nx_uint16_t readings[NREADINGS]; } oscilloscope_t; #endif tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/README000066400000000000000000000051431207233610700236650ustar00rootroot00000000000000README for TOSThreads TestCollection Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: TestCollection is a reimplementation of the Multihop Oscilloscope application using TOSThreads. It periodically samples a universal software-based SineSensor and broadcasts a message every few readings. These readings can be displayed by the Java "Oscilloscope" application found in the the TestCollection/java subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java application. You can install TestCollection on a mote via the following command: make threads install Valid platforms are currently: tmote, telosb, shimmer*, span, mica2, micaz, iris, and epic At least two motes must be used by this application, with one of them installed as a base station. Base station motes can be created by installing them with NODE_ID % 500 == 0. i.e. make threads install.0 make threads install.500 make threads install.1000 All other nodes can be installed with arbitrary NODE_IDs. make threads install.123 Successful running of this application is verified by all NON-base station motes periodically flashing LED1 upon sending a message, and the base station mote, flashing LED2 upon successful reception of a message. Additionally, correct operation should be verified by running the java tool described in the following section. Tools: The Java application displays readings it receives from motes running the MultihopOscilloscope demo via a serial forwarder. To run it, change to the TestCollection/java subdirectory and type: make java net.tinyos.sf.SerialForwarder -comm serial@: # e.g., java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2 # or java net.tinyos.sf.SerialForwarder -comm serial@COM2:telosb ./run NOTE:: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for TOSThreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. The controls at the bottom of the screen allow you to zoom in or out the X axis, change the range of the Y axis, and clear all received data. You can change the color used to display a mote by clicking on its color in the mote table. Notes: By default, the Makefile for TestCollection is setup to run CTP as the underlying collection protocol. The makefile can be modified to work with MultihopLQI by changing the appropriate include directories. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/TestCollectionAppC.nc000066400000000000000000000100761207233610700270270ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TestCollection is a reimplementation of the Multihop Oscilloscope application * using TOSThreads. It periodically samples a universal software-based SineSensor * and broadcasts a message every few readings. These readings can be displayed by * the Java "Oscilloscope" application found in the the TestCollection/java * subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java * application. * * At least two motes must be used by this application, with one of them installed * as a base station. Base station motes can be created by installing them with * NODE_ID % 500 == 0. * i.e. make threads install.0 * make threads install.500 * make threads install.1000 * * All other nodes can be installed with arbitrary NODE_IDs. * make threads install.123 * * Successful running of this application is verified by all NON-base station motes * periodically flashing LED1 upon sending a message, and the base station mote, * flashing LED2 upon successful reception of a message. Additionally, correct * operation should be verified by running the java tool described in the following * section. * * @author Chieh-Jan Mike Liang */ #include "MultihopOscilloscope.h" configuration TestCollectionAppC {} implementation { components TestCollectionC, new BlockingSineSensorC(), LedsC, BlockingActiveMessageC, BlockingCollectionControlC, new BlockingCollectionSenderC(AM_OSCILLOSCOPE), new BlockingCollectionReceiverC(AM_OSCILLOSCOPE), new ThreadC(800) as MainThread, MainC, BlockingSerialActiveMessageC, new BlockingSerialAMSenderC(AM_OSCILLOSCOPE); TestCollectionC.MainThread -> MainThread; TestCollectionC.Boot -> MainC; TestCollectionC.BlockingRead -> BlockingSineSensorC; TestCollectionC.Leds -> LedsC; TestCollectionC.BlockingRead -> BlockingSineSensorC; TestCollectionC.RadioStdControl -> BlockingActiveMessageC; TestCollectionC.RoutingControl -> BlockingCollectionControlC; TestCollectionC.RootControl -> BlockingCollectionControlC; TestCollectionC.Packet -> BlockingCollectionSenderC; TestCollectionC.BlockingSend -> BlockingCollectionSenderC; TestCollectionC.BlockingReceive -> BlockingCollectionReceiverC; TestCollectionC.SerialStdControl -> BlockingSerialActiveMessageC; TestCollectionC.SerialBlockingSend -> BlockingSerialAMSenderC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/TestCollectionC.nc000066400000000000000000000130651207233610700263670ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TestCollection is a reimplementation of the Multihop Oscilloscope application * using TOSThreads. It periodically samples a universal software-based SineSensor * and broadcasts a message every few readings. These readings can be displayed by * the Java "Oscilloscope" application found in the the TestCollection/java * subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java * application. * * At least two motes must be used by this application, with one of them installed * as a base station. Base station motes can be created by installing them with * NODE_ID % 500 == 0. * i.e. make threads install.0 * make threads install.500 * make threads install.1000 * * All other nodes can be installed with arbitrary NODE_IDs. * make threads install.123 * * Successful running of this application is verified by all NON-base station motes * periodically flashing LED1 upon sending a message, and the base station mote, * flashing LED2 upon successful reception of a message. Additionally, correct * operation should be verified by running the java tool described in the following * section. * * @author Chieh-Jan Mike Liang */ #include "MultihopOscilloscope.h" module TestCollectionC { uses { interface Boot; interface Thread as MainThread; interface BlockingRead; interface BlockingStdControl as RadioStdControl; interface Packet; interface BlockingSend; interface BlockingReceive; interface BlockingStdControl as RoutingControl; interface RootControl; interface Leds; interface BlockingStdControl as SerialStdControl; interface BlockingAMSend as SerialBlockingSend; } } implementation { static void fatal_problem(); oscilloscope_t local; uint8_t reading = 0; /* 0 to NREADINGS */ message_t sendbuf; message_t recvbuf; void fatal_problem(); void report_problem(); void report_sent(); void report_received(); event void Boot.booted() { local.interval = DEFAULT_INTERVAL; local.id = TOS_NODE_ID; local.version = 0; call MainThread.start(NULL); } event void MainThread.run(void* arg) { while (call RadioStdControl.start() != SUCCESS); while (call RoutingControl.start() != SUCCESS); if (local.id % 500 == 0) { while (call SerialStdControl.start() != SUCCESS); call RootControl.setRoot(); for (;;) { if (call BlockingReceive.receive(&recvbuf, 0) == SUCCESS) { oscilloscope_t *recv_o = (oscilloscope_t *) call BlockingReceive.getPayload(&recvbuf, sizeof(oscilloscope_t)); oscilloscope_t *send_o = (oscilloscope_t *) call SerialBlockingSend.getPayload(&sendbuf, sizeof(oscilloscope_t)); memcpy(send_o, recv_o, sizeof(oscilloscope_t)); call SerialBlockingSend.send(AM_BROADCAST_ADDR, &sendbuf, sizeof(oscilloscope_t)); report_received(); } } } else { uint16_t var; for (;;) { if (reading == NREADINGS) { oscilloscope_t *o = (oscilloscope_t *) call BlockingSend.getPayload(&sendbuf, sizeof(oscilloscope_t)); if (o == NULL) { fatal_problem(); return; } memcpy(o, &local, sizeof(oscilloscope_t)); if (call BlockingSend.send(&sendbuf, sizeof(oscilloscope_t)) == SUCCESS) { local.count++; report_sent(); } else { report_problem(); } reading = 0; } if (call BlockingRead.read(&var) == SUCCESS) { local.readings[reading++] = var; } call MainThread.sleep(local.interval); } } } // Use LEDs to report various status issues. void fatal_problem() { call Leds.led0On(); call Leds.led1On(); call Leds.led2On(); } void report_problem() { call Leds.led0Toggle(); } void report_sent() { call Leds.led1Toggle(); } void report_received() { call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/000077500000000000000000000000001207233610700237235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/ColorCellEditor.java000066400000000000000000000032621207233610700276160ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import java.awt.*; import java.awt.event.*; /* Editor for table cells representing colors. Popup a color chooser. */ public class ColorCellEditor extends AbstractCellEditor implements TableCellEditor { private Color color; private JButton button; public ColorCellEditor(String title) { button = new JButton(); final JColorChooser chooser = new JColorChooser(); final JDialog dialog = JColorChooser.createDialog (button, title, true, chooser, new ActionListener() { public void actionPerformed(ActionEvent e) { color = chooser.getColor(); } }, null); button.setBorderPainted(false); button.addActionListener (new ActionListener () { public void actionPerformed(ActionEvent e) { button.setBackground(color); chooser.setColor(color); dialog.setVisible(true); fireEditingStopped(); } } ); } public Object getCellEditorValue() { return color; } public Component getTableCellEditorComponent(JTable table, Object value, boolean isSelected, int row, int column) { color = (Color)value; return button; } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/Data.java000066400000000000000000000040451207233610700254420ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import java.util.*; /* Hold all data received from motes */ class Data { /* The mote data is stored in a flat array indexed by a mote's identifier. A null value indicates no mote with that identifier. */ private Node[] nodes = new Node[256]; private Oscilloscope parent; Data(Oscilloscope parent) { this.parent = parent; } /* Data received from mote nodeId containing NREADINGS samples from messageId * NREADINGS onwards. Tell parent if this is a new node. */ void update(int nodeId, int messageId, int readings[]) { if (nodeId >= nodes.length) { int newLength = nodes.length * 2; if (nodeId >= newLength) newLength = nodeId + 1; Node newNodes[] = new Node[newLength]; System.arraycopy(nodes, 0, newNodes, 0, nodes.length); nodes = newNodes; } Node node = nodes[nodeId]; if (node == null) { nodes[nodeId] = node = new Node(nodeId); parent.newNode(nodeId); } node.update(messageId, readings); } /* Return value of sample x for mote nodeId, or -1 for missing data */ int getData(int nodeId, int x) { if (nodeId >= nodes.length || nodes[nodeId] == null) return -1; return nodes[nodeId].getData(x); } /* Return number of last known sample on mote nodeId. Returns 0 for unknown motes. */ int maxX(int nodeId) { if (nodeId >= nodes.length || nodes[nodeId] == null) return 0; return nodes[nodeId].maxX(); } /* Return number of largest known sample on all motes (0 if there are no motes) */ int maxX() { int max = 0; for (int i = 0; i < nodes.length; i++) if (nodes[i] != null) { int nmax = nodes[i].maxX(); if (nmax > max) max = nmax; } return max; } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/Graph.java000066400000000000000000000147621207233610700256410ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import java.awt.*; import java.awt.event.*; import java.awt.font.*; import java.awt.geom.*; import java.util.*; /* Panel for drawing mote-data graphs */ class Graph extends JPanel { final static int BORDER_LEFT = 40; final static int BORDER_RIGHT = 0; final static int BORDER_TOP = 10; final static int BORDER_BOTTOM = 10; final static int TICK_SPACING = 40; final static int MAX_TICKS = 16; final static int TICK_WIDTH = 10; final static int MIN_WIDTH = 50; int gx0, gx1, gy0, gy1; // graph bounds int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale Window parent; /* Graph to screen coordinate conversion support */ int height, width; double xscale, yscale; void updateConversion() { height = getHeight() - BORDER_TOP - BORDER_BOTTOM; width = getWidth() - BORDER_LEFT - BORDER_RIGHT; if (height < 1) height = 1; if (width < 1) width = 1; xscale = (double)width / (gx1 - gx0 + 1); yscale = (double)height / (gy1 - gy0 + 1); } Graphics makeClip(Graphics g) { return g.create(BORDER_LEFT, BORDER_TOP, width, height); } // Note that these do not include the border offset! int screenX(int gx) { return (int)(xscale * (gx - gx0) + 0.5); } int screenY(int gy) { return (int)(height - yscale * (gy - gy0)); } int graphX(int sx) { return (int)(sx / xscale + gx0 + 0.5); } Graph(Window parent) { this.parent = parent; gy0 = 0; gy1 = 0xffff; gx0 = 0; gx1 = MIN_WIDTH << scale; } void rightDrawString(Graphics2D g, String s, int x, int y) { TextLayout layout = new TextLayout(s, parent.smallFont, g.getFontRenderContext()); Rectangle2D bounds = layout.getBounds(); layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2); } protected void paintComponent(Graphics g) { Graphics2D g2d = (Graphics2D)g; /* Repaint. Synchronize on Oscilloscope to avoid data changing. Simply clear panel, draw Y axis and all the mote graphs. */ synchronized (parent.parent) { updateConversion(); g2d.setColor(Color.BLACK); g2d.fillRect(0, 0, getWidth(), getHeight()); drawYAxis(g2d); Graphics clipped = makeClip(g2d); int count = parent.moteListModel.size(); for (int i = 0; i < count; i++) { clipped.setColor(parent.moteListModel.getColor(i)); drawGraph(clipped, parent.moteListModel.get(i)); } } } /* Draw the Y-axis */ protected void drawYAxis(Graphics2D g) { int axis_x = BORDER_LEFT - 1; int height = getHeight() - BORDER_BOTTOM - BORDER_TOP; g.setColor(Color.WHITE); g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1); /* Draw a reasonable set of tick marks */ int nTicks = height / TICK_SPACING; if (nTicks > MAX_TICKS) nTicks = MAX_TICKS; int tickInterval = (gy1 - gy0 + 1) / nTicks; if (tickInterval == 0) tickInterval = 1; /* Tick interval should be of the family A * 10^B, where A = 1, 2 * or 5. We tend more to rounding A up, to reduce rather than increase the number of ticks. */ int B = (int)(Math.log(tickInterval) / Math.log(10)); int A = (int)(tickInterval / Math.pow(10, B) + 0.5); if (A > 2) A = 5; else if (A > 5) A = 10; tickInterval = A * (int)Math.pow(10, B); /* Ticks are printed at multiples of tickInterval */ int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval; while (tick <= gy1) { int stick = screenY(tick) + BORDER_TOP; rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick); g.drawLine(axis_x - TICK_WIDTH / 2, stick, axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick); tick += tickInterval; } } /* Draw graph for mote nodeId */ protected void drawGraph(Graphics g, int nodeId) { SingleGraph sg = new SingleGraph(g, nodeId); if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel for (int sx = 0; sx < width; sx++) sg.nextPoint(g, graphX(sx), sx); else // Less points than pixel-iterate by points for (int gx = gx0; gx <= gx1; gx++) sg.nextPoint(g, gx, screenX(gx)); } /* Inner class to simplify drawing a graph. Simplify initialise it, then feed it the X screen and graph coordinates, from left to right. */ private class SingleGraph { int lastsx, lastsy, nodeId; /* Start drawing the graph mote id */ SingleGraph(Graphics g, int id) { nodeId = id; lastsx = -1; lastsy = -1; } /* Next point in mote's graph is at x value gx, screen coordinate sx */ void nextPoint(Graphics g, int gx, int sx) { int gy = parent.parent.data.getData(nodeId, gx); int sy = -1; if (gy >= 0) { // Ignore missing values double rsy = height - yscale * (gy - gy0); // Ignore problem values if (rsy >= -1e6 && rsy <= 1e6) sy = (int)(rsy + 0.5); if (lastsy >= 0 && sy >= 0) g.drawLine(lastsx, lastsy, sx, sy); } lastsx = sx; lastsy = sy; } } /* Update X-axis range in GUI */ void updateXLabel() { parent.xLabel.setText("X: " + gx0 + " - " + gx1); } /* Ensure that graph is nicely positioned on screen. max is the largest sample number received from any mote. */ private void recenter(int max) { // New data will show up at the 3/4 point // The 2nd term ensures that gx1 will be >= max int scrollby = ((gx1 - gx0) >> 2) + (max - gx1); gx0 += scrollby; gx1 += scrollby; if (gx0 < 0) { // don't bother showing negative sample numbers gx1 -= gx0; gx0 = 0; } updateXLabel(); } /* New data received. Redraw graph, scrolling if necessary */ void newData() { int max = parent.parent.data.maxX(); if (max > gx1 || max < gx0) // time to scroll recenter(max); repaint(); } /* User set the X-axis scale to newScale */ void setScale(int newScale) { gx1 = gx0 + (MIN_WIDTH << newScale); scale = newScale; recenter(parent.parent.data.maxX()); repaint(); } /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus values (return false), or accept, redraw and return true. */ boolean setYAxis(int newy0, int newy1) { if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 || newy1 < 0 || newy1 > 65535) return false; gy0 = newy0; gy1 = newy1; repaint(); return true; } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/Makefile000066400000000000000000000010461207233610700253640ustar00rootroot00000000000000GEN=OscilloscopeMsg.java Constants.java all: oscilloscope.jar oscilloscope.jar: Oscilloscope.class jar cf $@ *.class OscilloscopeMsg.java: ../MultihopOscilloscope.h mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@ Constants.java: ../MultihopOscilloscope.h ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@ Oscilloscope.class: $(wildcard *.java) $(GEN) javac *.java clean: rm -f *.class $(GEN) veryclean: clean rm oscilloscope.jar tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/Node.java000066400000000000000000000063161207233610700254610ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Class holding all data received from a mote. */ class Node { /* Data is hold in an array whose size is a multiple of INCREMENT, and INCREMENT itself must be a multiple of Constant.NREADINGS. This simplifies handling the extension and clipping of old data (see setEnd) */ final static int INCREMENT = 100 * Constants.NREADINGS; final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT /* The mote's identifier */ int id; /* Data received from the mote. data[0] is the dataStart'th sample Indexes 0 through dataEnd - dataStart - 1 hold data. Samples are 16-bit unsigned numbers, -1 indicates missing data. */ int[] data; int dataStart, dataEnd; Node(int _id) { id = _id; } /* Update data to hold received samples newDataIndex .. newEnd. If we receive data with a lower index, we discard newer data (we assume the mote rebooted). */ private void setEnd(int newDataIndex, int newEnd) { if (newDataIndex < dataStart || data == null) { /* New data is before the start of what we have. Just throw it all away and start again */ dataStart = newDataIndex; data = new int[INCREMENT]; } if (newEnd > dataStart + data.length) { /* Try extending first */ if (data.length < MAX_SIZE) { int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT; if (newLength >= MAX_SIZE) newLength = MAX_SIZE; int[] newData = new int[newLength]; System.arraycopy(data, 0, newData, 0, data.length); data = newData; } if (newEnd > dataStart + data.length) { /* Still doesn't fit. Squish. We assume INCREMENT >= (newEnd - newDataIndex), and ensure that dataStart + data.length - INCREMENT = newDataIndex */ int newStart = newDataIndex + INCREMENT - data.length; if (dataStart + data.length > newStart) System.arraycopy(data, newStart - dataStart, data, 0, data.length - (newStart - dataStart)); dataStart = newStart; } } /* Mark any missing data as invalid */ for (int i = dataEnd < dataStart ? dataStart : dataEnd; i < newDataIndex; i++) data[i - dataStart] = -1; /* If we receive a count less than the old count, we assume the old data is invalid */ dataEnd = newEnd; } /* Data received containing NREADINGS samples from messageId * NREADINGS onwards */ void update(int messageId, int readings[]) { int start = messageId * Constants.NREADINGS; setEnd(start, start + Constants.NREADINGS); for (int i = 0; i < readings.length; i++) data[start - dataStart + i] = readings[i]; } /* Return value of sample x, or -1 for missing data */ int getData(int x) { if (x < dataStart || x >= dataEnd) return -1; else return data[x - dataStart]; } /* Return number of last known sample */ int maxX() { return dataEnd - 1; } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/Oscilloscope.java000066400000000000000000000076771207233610700272450ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import net.tinyos.message.*; import net.tinyos.util.*; import java.io.*; /* The "Oscilloscope" demo app. Displays graphs showing data received from the Oscilloscope mote application, and allows the user to: - zoom in or out on the X axis - set the scale on the Y axis - change the sampling period - change the color of each mote's graph - clear all data This application is in three parts: - the Node and Data objects store data received from the motes and support simple queries - the Window and Graph and miscellaneous support objects implement the GUI and graph drawing - the Oscilloscope object talks to the motes and coordinates the other objects Synchronization is handled through the Oscilloscope object. Any operation that reads or writes the mote data must be synchronized on Oscilloscope. Note that the messageReceived method below is synchronized, so no further synchronization is needed when updating state based on received messages. */ public class Oscilloscope implements MessageListener { MoteIF mote; Data data; Window window; /* The current sampling period. If we receive a message from a mote with a newer version, we update our interval. If we receive a message with an older version, we broadcast a message with the current interval and version. If the user changes the interval, we increment the version and broadcast the new interval and version. */ int interval = Constants.DEFAULT_INTERVAL; int version = -1; /* Main entry point */ void run() { data = new Data(this); window = new Window(this); window.setup(); mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(new OscilloscopeMsg(), this); } /* The data object has informed us that nodeId is a previously unknown mote. Update the GUI. */ void newNode(int nodeId) { window.newNode(nodeId); } synchronized public void messageReceived(int dest_addr, Message msg) { if (msg instanceof OscilloscopeMsg) { OscilloscopeMsg omsg = (OscilloscopeMsg)msg; /* Update interval and mote data */ periodUpdate(omsg.get_version(), omsg.get_interval()); data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings()); /* Inform the GUI that new data showed up */ window.newData(); } } /* A potentially new version and interval has been received from the mote */ void periodUpdate(int moteVersion, int moteInterval) { if (moteVersion > version) { /* It's new. Update our vision of the interval. */ version = moteVersion; interval = moteInterval; window.updateSamplePeriod(); } else if (moteVersion < version) { /* It's old. Update the mote's vision of the interval. */ sendInterval(); } } /* The user wants to set the interval to newPeriod. Refuse bogus values and return false, or accept the change, broadcast it, and return true */ synchronized boolean setInterval(int newPeriod) { if (newPeriod < 1 || newPeriod > 65535) return false; interval = newPeriod; version++; sendInterval(); return true; } /* Broadcast a version+interval message. */ void sendInterval() { OscilloscopeMsg omsg = new OscilloscopeMsg(); omsg.set_version(version); omsg.set_interval(interval); try { mote.send(MoteIF.TOS_BCAST_ADDR, omsg); } catch (IOException e) { window.error("Cannot send message to mote"); } } /* User wants to clear all data. */ void clear() { data = new Data(this); } public static void main(String[] args) { Oscilloscope me = new Oscilloscope(); me.run(); } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/Window.java000066400000000000000000000207401207233610700260400ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import javax.swing.event.*; import java.awt.*; import java.awt.event.*; import java.util.*; /* The main GUI object. Build the GUI and coordinate all user activities */ class Window { Oscilloscope parent; Graph graph; Font smallFont = new Font("Dialog", Font.PLAIN, 8); Font boldFont = new Font("Dialog", Font.BOLD, 12); Font normalFont = new Font("Dialog", Font.PLAIN, 12); MoteTableModel moteListModel; // GUI view of mote list JLabel xLabel; // Label displaying X axis range JTextField sampleText, yText; // inputs for sample period and Y axis range JFrame frame; Window(Oscilloscope parent) { this.parent = parent; } /* A model for the mote table, and general utility operations on the mote list */ class MoteTableModel extends AbstractTableModel { private ArrayList motes = new ArrayList(); private ArrayList colors = new ArrayList(); /* Initial mote colors cycle through this list. Add more colors if you want. */ private Color[] cycle = { Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA, Color.YELLOW, Color.GRAY, Color.YELLOW }; int cycleIndex; /* TableModel methods for achieving our table appearance */ public String getColumnName(int col) { if (col == 0) return "Mote"; else return "Color"; } public int getColumnCount() { return 2; } public synchronized int getRowCount() { return motes.size(); } public synchronized Object getValueAt(int row, int col) { if (col == 0) return motes.get(row); else return colors.get(row); } public Class getColumnClass(int col) { return getValueAt(0, col).getClass(); } public boolean isCellEditable(int row, int col) { return col == 1; } public synchronized void setValueAt(Object value, int row, int col) { colors.set(row, value); fireTableCellUpdated(row, col); graph.repaint(); } /* Return mote id of i'th mote */ int get(int i) { return ((Integer)motes.get(i)).intValue(); } /* Return color of i'th mote */ Color getColor(int i) { return (Color)colors.get(i); } /* Return number of motes */ int size() { return motes.size(); } /* Add a new mote */ synchronized void newNode(int nodeId) { /* Shock, horror. No binary search. */ int i, len = motes.size(); for (i = 0; ; i++) if (i == len || nodeId < get(i)) { motes.add(i, new Integer(nodeId)); // Cycle through a set of initial colors colors.add(i, cycle[cycleIndex++ % cycle.length]); break; } fireTableRowsInserted(i, i); } /* Remove all motes */ void clear() { motes = new ArrayList(); colors = new ArrayList(); fireTableDataChanged(); } } /* A simple full-color cell */ static class MoteColor extends JLabel implements TableCellRenderer { public MoteColor() { setOpaque(true); } public Component getTableCellRendererComponent (JTable table, Object color, boolean isSelected, boolean hasFocus, int row, int column) { setBackground((Color)color); return this; } } /* Convenience methods for making buttons, labels and textfields. Simplifies code and ensures a consistent style. */ JButton makeButton(String label, ActionListener action) { JButton button = new JButton(); button.setText(label); button.setFont(boldFont); button.addActionListener(action); return button; } JLabel makeLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(boldFont); return label; } JLabel makeSmallLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(smallFont); return label; } JTextField makeTextField(int columns, ActionListener action) { JTextField tf = new JTextField(columns); tf.setFont(normalFont); tf.setMaximumSize(tf.getPreferredSize()); tf.addActionListener(action); return tf; } /* Build the GUI */ void setup() { JPanel main = new JPanel(new BorderLayout()); main.setMinimumSize(new Dimension(500, 250)); main.setPreferredSize(new Dimension(800, 400)); // Three panels: mote list, graph, controls moteListModel = new MoteTableModel(); JTable moteList = new JTable(moteListModel); moteList.setDefaultRenderer(Color.class, new MoteColor()); moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color")); moteList.setPreferredScrollableViewportSize(new Dimension(100, 400)); JScrollPane motePanel = new JScrollPane(); motePanel.getViewport().add(moteList, null); main.add(motePanel, BorderLayout.WEST); graph = new Graph(this); main.add(graph, BorderLayout.CENTER); // Controls. Organised using box layouts. // Sample period. JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT); sampleText = makeTextField(6, new ActionListener() { public void actionPerformed(ActionEvent e) { setSamplePeriod(); } } ); updateSamplePeriod(); // Clear data. JButton clearButton = makeButton("Clear data", new ActionListener() { public void actionPerformed(ActionEvent e) { clearData(); } } ); // Adjust X-axis zoom. Box xControl = new Box(BoxLayout.Y_AXIS); xLabel = makeLabel("", JLabel.CENTER); final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale); Hashtable xTable = new Hashtable(); for (int i = 0; i <= 8; i += 2) xTable.put(new Integer(i), makeSmallLabel("" + (Graph.MIN_WIDTH << i), JLabel.CENTER)); xSlider.setLabelTable(xTable); xSlider.setPaintLabels(true); graph.updateXLabel(); graph.setScale(graph.scale); xSlider.addChangeListener(new ChangeListener() { public void stateChanged(ChangeEvent e) { //if (!xSlider.getValueIsAdjusting()) graph.setScale((int)xSlider.getValue()); } }); xControl.add(xLabel); xControl.add(xSlider); // Adjust Y-axis range. JLabel yLabel = makeLabel("Y:", JLabel.RIGHT); yText = makeTextField(12, new ActionListener() { public void actionPerformed(ActionEvent e) { setYAxis(); } } ); yText.setText(graph.gy0 + " - " + graph.gy1); Box controls = new Box(BoxLayout.X_AXIS); controls.add(clearButton); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(sampleLabel); controls.add(sampleText); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(xControl); controls.add(yLabel); controls.add(yText); main.add(controls, BorderLayout.SOUTH); // The frame part frame = new JFrame("Oscilloscope"); frame.setSize(main.getPreferredSize()); frame.getContentPane().add(main); frame.setVisible(true); frame.addWindowListener(new WindowAdapter() { public void windowClosing(WindowEvent e) { System.exit(0); } }); } /* User operation: clear data */ void clearData() { synchronized (parent) { moteListModel.clear(); parent.clear(); graph.newData(); } } /* User operation: set Y-axis range. */ void setYAxis() { String val = yText.getText(); try { int dash = val.indexOf('-'); if (dash >= 0) { String min = val.substring(0, dash).trim(); String max = val.substring(dash + 1).trim(); if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max))) error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)"); return; } } catch (NumberFormatException e) { } error("Invalid range " + val + " (expected NN-MM)"); } /* User operation: set sample period. */ void setSamplePeriod() { String periodS = sampleText.getText().trim(); try { int newPeriod = Integer.parseInt(periodS); if (parent.setInterval(newPeriod)) return; } catch (NumberFormatException e) { } error("Invalid sample period " + periodS); } /* Notification: sample period changed. */ void updateSamplePeriod() { sampleText.setText("" + parent.interval); } /* Notification: new node. */ void newNode(int nodeId) { moteListModel.newNode(nodeId); } /* Notification: new data. */ void newData() { graph.newData(); } void error(String msg) { JOptionPane.showMessageDialog(frame, msg, "Error", JOptionPane.ERROR_MESSAGE); } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/build.xml000066400000000000000000000006201207233610700255420ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestCollection/java/oscilloscope.jar000066400000000000000000000454701207233610700271310ustar00rootroot00000000000000PKd8 META-INF/PKPKd8META-INF/MANIFEST.MFMLK-. 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You can install TestJoin on a mote via the following command: make threads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Upon a successful burn, you should see all LEDs toggle in the following pattern, repeating every 8 seconds: 0s: (110) LED0 ON, LED1 ON, LED2 OFF 1s: (000) LED0 OFF, LED1 OFF, LED2 OFF 2s: (010) LED0 OFF, LED1 ON, LED2 OFF 3s: (000) LED0 OFF, LED1 OFF, LED2 OFF 4s: (111) LED0 ON, LED1 ON, LED2 ON 5s: (001) LED0 OFF, LED1 OFF, LED2 ON 6s: (011) LED0 OFF, LED1 ON, LED2 ON 7s: (001) LED0 OFF, LED1 OFF, LED2 ON Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestJoin/TestJoinAppC.nc000066400000000000000000000052621207233610700244400ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TestJoin is a simple application used to test the basic functionality of * the join() system call for waiting on a set of threads in a TOSThreads * based application. * * Upon a successful burn, you should see all LEDs toggle in the following pattern, * repeating every 8 seconds: * * 0s: (110) LED0 ON, LED1 ON, LED2 OFF
    * 1s: (000) LED0 OFF, LED1 OFF, LED2 OFF
    * 2s: (010) LED0 OFF, LED1 ON, LED2 OFF
    * 3s: (000) LED0 OFF, LED1 OFF, LED2 OFF
    * 4s: (111) LED0 ON, LED1 ON, LED2 ON
    * 5s: (001) LED0 OFF, LED1 OFF, LED2 ON
    * 6s: (011) LED0 OFF, LED1 ON, LED2 ON
    * 7s: (001) LED0 OFF, LED1 OFF, LED2 ON
    * * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration TestJoinAppC { } implementation { components MainC, TestJoinC, LedsC; components new ThreadC(100) as NullThread; components new ThreadC(100) as TinyThread0; components new ThreadC(100) as TinyThread1; MainC.Boot <- TestJoinC; TestJoinC.NullThread -> NullThread; TestJoinC.TinyThread0 -> TinyThread0; TestJoinC.TinyThread1 -> TinyThread1; TestJoinC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestJoin/TestJoinC.nc000066400000000000000000000061101207233610700237700ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TestJoin is a simple application used to test the basic functionality of * the join() system call for waiting on a set of threads in a TOSThreads * based application. * * Upon a successful burn, you should see all LEDs toggle in the following pattern, * repeating every 8 seconds: * * 0s: (110) LED0 ON, LED1 ON, LED2 OFF
    * 1s: (000) LED0 OFF, LED1 OFF, LED2 OFF
    * 2s: (010) LED0 OFF, LED1 ON, LED2 OFF
    * 3s: (000) LED0 OFF, LED1 OFF, LED2 OFF
    * 4s: (111) LED0 ON, LED1 ON, LED2 ON
    * 5s: (001) LED0 OFF, LED1 OFF, LED2 ON
    * 6s: (011) LED0 OFF, LED1 ON, LED2 ON
    * 7s: (001) LED0 OFF, LED1 OFF, LED2 ON
    * * @author Kevin Klues (klueska@cs.stanford.edu) */ module TestJoinC { uses { interface Boot; interface Thread as NullThread; interface Thread as TinyThread0; interface Thread as TinyThread1; interface Leds; } } implementation { event void Boot.booted() { call NullThread.start(NULL); } event void NullThread.run(void* arg) { for(;;){ call TinyThread0.start(NULL); call TinyThread1.start(NULL); call TinyThread0.join(); call TinyThread1.join(); call Leds.led2Toggle(); } } event void TinyThread0.run(void* arg) { int i; for(i=0; i<2; i++){ call Leds.led0Toggle(); call TinyThread0.sleep(1000); } } event void TinyThread1.run(void* arg) { int i; for(i=0; i<4; i++){ call Leds.led1Toggle(); call TinyThread1.sleep(1000); } } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestPrintf/000077500000000000000000000000001207233610700221515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestPrintf/Makefile000066400000000000000000000001371207233610700236120ustar00rootroot00000000000000COMPONENT=TestPrintfAppC PFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestPrintf/README000066400000000000000000000025151207233610700230340ustar00rootroot00000000000000README for TOSThreads TestPrintf Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application tests the operation of the Printf client in TOSThreads. It continuously prints the value of a counter starting at 0, increasing as it prints. You can install TestPrintf on a mote via the following command: make threads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Once burned on a mote, the java based PrintfClient must be ran to verify proper operation of the application. For example, to connect PrintfClient to a mote over a USB serial port: java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSBXXX: NOTE:: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. Once this java application is running, you should see output of the sort continuously being streamed to your terminal: ... ... Counter: 4549 Counter: 4550 Counter: 4551 Counter: 4552 Counter: 4553 Counter: 4554 Counter: 4555 Counter: 4556 Counter: 4557 Counter: 4558 Counter: 4559 ... ... Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestPrintf/TestPrintfAppC.nc000066400000000000000000000040661207233610700253470ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application tests the operation of the Printf client in TOSThreads. It * continuously prints the value of a counter starting at 0, increasing as it * prints. * * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "printf.h" configuration TestPrintfAppC { } implementation { components MainC, TestPrintfC; components PrintfC; components new ThreadC(200); MainC.Boot <- TestPrintfC; TestPrintfC.Thread -> ThreadC; components LedsC; TestPrintfC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestPrintf/TestPrintfC.nc000066400000000000000000000041311207233610700246770ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application tests the operation of the Printf client in TOSThreads. It * continuously prints the value of a counter starting at 0, increasing as it * prints. * * @author Kevin Klues (klueska@cs.stanford.edu) */ module TestPrintfC { uses { interface Boot; interface Thread; interface Leds; } } implementation { event void Boot.booted() { call Thread.start(NULL); } event void Thread.run(void* arg) { uint32_t counter = 0; for(;;){ printf("Counter: %lu\n", counter++); } } } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestSineSensor/000077500000000000000000000000001207233610700227775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestSineSensor/Makefile000066400000000000000000000001571207233610700244420ustar00rootroot00000000000000COMPONENT=TestSineSensorAppC CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestSineSensor/README000066400000000000000000000026451207233610700236660ustar00rootroot00000000000000README for TOSThreads TestSineSensor Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application is used to test the threaded version of the API for accessing the software based SineSensor usable by any platform for demonstration purposes. You can install TestSineSensor on a mote via the following command: make threads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic This application simply takes sensor readings in an infinite loop from the SineSensor and forwards them over the serial interface. Upon successful transmission, LED0 is toggled. A successful test will result in the TestSineSensor mote constantly flickering LED0. Additionally, messages containing the sensor readings should be forwarded over the serial interface as verified by running the following for the platform of interest: java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX: NOTE:: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. Once this java application is running, you should see output containing the sensor readings being streamed to your terminal. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestSineSensor/TestSineSensorAppC.nc000066400000000000000000000052101207233610700270130ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is used to test the threaded version of the API for accessing * the software based SineSensor usable by any platform for demonstration purposes. * * This application simply takes sensor readings in an infinite loop from the * SineSensor and forwards them over the serial interface. Upon successful * transmission, LED0 is toggled. * * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration TestSineSensorAppC { } implementation { components MainC, TestSineSensorC; components new ThreadC(150) as MainThread; components new BlockingSineSensorC(); components BlockingSerialActiveMessageC; components new BlockingSerialAMSenderC(228); MainC.Boot <- TestSineSensorC; MainC.SoftwareInit -> BlockingSineSensorC; TestSineSensorC.MainThread -> MainThread; TestSineSensorC.BlockingRead -> BlockingSineSensorC; TestSineSensorC.AMControl -> BlockingSerialActiveMessageC; TestSineSensorC.BlockingAMSend -> BlockingSerialAMSenderC; TestSineSensorC.Packet -> BlockingSerialAMSenderC; components LedsC; TestSineSensorC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tosthreads/apps/TestSineSensor/TestSineSensorC.nc000066400000000000000000000052751207233610700263650ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is used to test the threaded version of the API for accessing * the software based SineSensor usable by any platform for demonstration purposes. * * This application simply takes sensor readings in an infinite loop from the * SineSensor and forwards them over the serial interface. Upon successful * transmission, LED0 is toggled. * * @author Kevin Klues (klueska@cs.stanford.edu) */ module TestSineSensorC { uses { interface Boot; interface Thread as MainThread; interface BlockingRead; interface BlockingStdControl as AMControl; interface BlockingAMSend; interface Packet; interface Leds; } } implementation { event void Boot.booted() { call MainThread.start(NULL); } event void MainThread.run(void* arg) { uint16_t* var; message_t msg; var = call Packet.getPayload(&msg, sizeof(uint16_t)); while( call AMControl.start() != SUCCESS ); for(;;){ while( call BlockingRead.read(var) != SUCCESS ); while( call BlockingAMSend.send(AM_BROADCAST_ADDR, &msg, sizeof(uint16_t)) != SUCCESS ); call Leds.led0Toggle(); } } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/000077500000000000000000000000001207233610700202125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/BaseStation/000077500000000000000000000000001207233610700224265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/BaseStation/BaseStation.c000066400000000000000000000170721207233610700250150ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * BaseStation is a reimplementation of the standard BaseStation application using * the TOSThreads thread library. It transparently forwards any AM messages it * receives from its radio interface to its serial interface and vice versa. * *

    On the serial link, BaseStation sends and receives simple active * messages (not particular radio packets): on the radio link, it * sends radio active messages, whose format depends on the network * stack being used. BaseStation will copy its compiled-in group ID to * messages moving from the serial link to the radio, and will filter * out incoming radio messages that do not contain that group ID.

    * *

    BaseStation includes queues in both directions, with a guarantee * that once a message enters a queue, it will eventually leave on the * other interface. The queues allow the BaseStation to handle load * spikes.

    * *

    BaseStation acknowledges a message arriving over the serial link * only if that message was successfully enqueued for delivery to the * radio link.

    * *

    The LEDS are programmed to toggle as follows:

    *
      *
    • LED0: Message bridged from serial to radio
      • *
    • LED1: Message bridged from radio to serial
      • *
    • LED2: Dropped message due to queue overflow in either direction
      • *
    * * @author Kevin Klues */ //#include "stack.h" #include "tosthread.h" #include "tosthread_amradio.h" #include "tosthread_amserial.h" #include "tosthread_leds.h" #include "tosthread_threadsync.h" #define MSG_QUEUE_SIZE 3 //Parameters associated with each of the two base station paths // radio -> serial // serial -> radio typedef struct bs_params { tosthread_t receive_handle; tosthread_t snoop_handle; tosthread_t send_handle; mutex_t mutex; condvar_t condvar; message_t shared_msgs[MSG_QUEUE_SIZE]; uint8_t shared_msg_queue_size; uint8_t shared_msg_queue_index; } bs_params_t; //Declare parameters associated with radio RX thread bs_params_t radioRx_params; void radioReceive_thread(void* arg); void radioSnoop_thread(void* arg); void serialSend_thread(void* arg); //Declare parameters associated with serial RX thread bs_params_t serialRx_params; void serialReceive_thread(void* arg); void radioSend_thread(void* arg); /********* Initialize base station parameters ********/ void bs_params_init(bs_params_t* p) { mutex_init( &(p->mutex) ); condvar_init( &(p->condvar) ); p->shared_msg_queue_size = 0; p->shared_msg_queue_index = 0; } /*********** Main function thread ************/ void tosthread_main(void* arg) { bs_params_init( &radioRx_params ); bs_params_init( &serialRx_params ); amRadioStart(); amSerialStart(); tosthread_create(&(radioRx_params.receive_handle), radioReceive_thread, NULL, 200); tosthread_create(&(radioRx_params.snoop_handle), radioSnoop_thread, NULL, 200); tosthread_create(&(radioRx_params.send_handle), serialSend_thread, NULL, 200); tosthread_create(&(serialRx_params.receive_handle), serialReceive_thread, NULL, 200); tosthread_create(&(serialRx_params.send_handle), radioSend_thread, NULL, 200); } /******************** Enqueue and dequeue Messages ****************/ error_t enqueueMsg(bs_params_t* p, message_t* m) { if(p->shared_msg_queue_size < MSG_QUEUE_SIZE) { (p->shared_msgs)[p->shared_msg_queue_index] = *m; (p->shared_msg_queue_index) = (p->shared_msg_queue_index + 1) % MSG_QUEUE_SIZE; (p->shared_msg_queue_size)++; return SUCCESS; } return FAIL; } message_t* dequeueMsg(bs_params_t* p) { if(p->shared_msg_queue_size > 0) { message_t* m; m = &((p->shared_msgs)[(p->shared_msg_queue_index + (MSG_QUEUE_SIZE - p->shared_msg_queue_size)) % MSG_QUEUE_SIZE]); (p->shared_msg_queue_size)--; return m; } return NULL; } /******************** Send Serial vs. Radio Messages ****************/ error_t sendSerialMsg(message_t* msg) { am_id_t id = amRadioGetType(msg); am_addr_t source = amRadioGetSource(msg); am_addr_t dest = amRadioGetDestination(msg); uint8_t len = radioGetPayloadLength(msg); serialClear(msg); amSerialSetSource(msg, source); return amSerialSend(dest, msg, len, id); } error_t sendRadioMsg(message_t* msg) { am_id_t id = amSerialGetType(msg); am_addr_t source = amSerialGetSource(msg); am_addr_t dest = amSerialGetDestination(msg); uint8_t len = serialGetPayloadLength(msg); radioClear(msg); amRadioSetSource(msg, source); return amRadioSend(dest, msg, len, id); } /***********************************************************/ /** Generic implementations of send/receive functionality **/ /***********************************************************/ void bs_receive(error_t (*recv_func)(message_t*, uint32_t, am_id_t), bs_params_t* p) { message_t m; for(;;) { if( (*(recv_func))(&m, 0, AM_RECEIVE_FROM_ANY) == SUCCESS ) { led0Toggle(); mutex_lock( &(p->mutex) ); while( enqueueMsg(p, &m) == FAIL ) condvar_wait( &(p->condvar), &(p->mutex) ); mutex_unlock( &(p->mutex) ); condvar_signalAll( &(p->condvar) ); } else led2Toggle(); } } void bs_send(void* send_func, bs_params_t* p) { message_t m; message_t* m_ptr; for(;;) { mutex_lock( &(p->mutex) ); while( (m_ptr = dequeueMsg(p)) == NULL ) condvar_wait( &(p->condvar), &(p->mutex) ); m = *m_ptr; mutex_unlock( &(p->mutex) ); condvar_signalAll( &(p->condvar) ); if(send_func == amSerialSend) sendSerialMsg(&m); else sendRadioMsg(&m); led1Toggle(); } } /******************** Actual thread implementations ******************/ void radioReceive_thread(void* arg) { bs_receive(amRadioReceive, &radioRx_params); } void radioSnoop_thread(void* arg) { bs_receive(amRadioSnoop, &radioRx_params); } void serialSend_thread(void* arg) { bs_send(amSerialSend, &radioRx_params); } void serialReceive_thread(void* arg) { bs_receive(amSerialReceive, &serialRx_params); } void radioSend_thread(void* arg) { bs_send(amRadioSend, &serialRx_params); } tinyos-2.1.2+dfsg/apps/tosthreads/capps/BaseStation/Makefile000066400000000000000000000002041207233610700240620ustar00rootroot00000000000000TOSTHREAD_MAIN=BaseStation.c CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/capps/BaseStation/README000066400000000000000000000047231207233610700233140ustar00rootroot00000000000000README for TOSThreads BaseStation Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: BaseStation is a reimplementation of the standard BaseStation application using the TOSThreads thread library. It transparently forwards any AM messages it receives from its radio interface to its serial interface and vice versa. Upon successful reception of a packet, LED0 is toggled, and upon successful forwarding, LED1 is toggled. If there are any errors, LED2 is toggled. To run this application install it on a mote via the command: make cthreads install.45 Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, and micaz Installing with NODE_ID 45 (i.e. AM_ADDRESS 45) is just to verify that the application forwards packets with an arbitrarily chosen id, which it should. To test the correct operation of this application, you need two motes: one with this BaseStation application installed on it, and one with an application that is sending messages installed, (let's use the RadioStress application from the current directory). On one mote install the Base station via the command above, and on the other install RadioStress via the command: make cthreads install.1 Don't forget the '.1' when you install, or RadioStress will be configured to receive rather than send messages. Messages are sent to AM_ADDRESS 0. A successful test will result in the RadioStress mote constantly flickering all of its leds very rapidly, and the BaseStation mote flickering its LED0 and LED1 leds rapidly. Additionally, messages should be forwarded over the serial interface as verified by running the following for the platform of interest: java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX: NOTE: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. Once this java application is running, you should see output of the sort constantly being streamed to your terminal: 00 00 00 00 01 00 00 14 00 00 00 00 01 00 00 16 00 00 00 00 01 00 00 15 00 00 00 00 01 00 00 14 00 00 00 00 01 00 00 16 00 00 00 00 01 00 00 15 00 00 00 00 01 00 00 14 00 00 00 00 01 00 00 16 00 00 00 00 01 00 00 15 00 00 00 00 01 00 00 14 Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/Blink/000077500000000000000000000000001207233610700212515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/Blink/Blink.c000066400000000000000000000053531207233610700224620ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Blink is a simple application used to test the basic functionality of * TOSThreads. * * Upon a successful burn, you should see LED0 flashing with a period of every * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms. * * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "stack.h" #include "tosthread.h" #include "tosthread_leds.h" //Initialize variables associated with each thread tosthread_t blink0; tosthread_t blink1; tosthread_t blink2; void blink0_thread(void* arg); void blink1_thread(void* arg); void blink2_thread(void* arg); void tosthread_main(void* arg) { //Use stack estimator to calculate maximum stack size // on a thread by thread basis tosthread_create(&blink0, blink0_thread, NULL, BLINK0_STACK_SIZE); tosthread_create(&blink1, blink1_thread, NULL, BLINK1_STACK_SIZE); tosthread_create(&blink2, blink2_thread, NULL, BLINK2_STACK_SIZE); } void blink0_thread(void* arg) { for(;;) { led0Toggle(); tosthread_sleep(200); } } void blink1_thread(void* arg) { for(;;) { led1Toggle(); tosthread_sleep(1000); } } void blink2_thread(void* arg) { for(;;) { led2Toggle(); tosthread_sleep(1000); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/Blink/Makefile000066400000000000000000000000551207233610700227110ustar00rootroot00000000000000TOSTHREAD_MAIN=Blink.c include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/capps/Blink/README000066400000000000000000000011401207233610700221250ustar00rootroot00000000000000README for TOSThreads Blink Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: Blink is a simple application used to test the basic functionality of TOSThreads. You can install Blink on a mote via the following command: make cthreads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Upon a successful burn, you should see LED0 flashing with a period of every 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/Blink/stack.h000066400000000000000000000033211207233610700225260ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ enum { BLINK0_STACK_SIZE = 200, BLINK1_STACK_SIZE = 200, BLINK2_STACK_SIZE = 200, }; tinyos-2.1.2+dfsg/apps/tosthreads/capps/Bounce/000077500000000000000000000000001207233610700214255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/Bounce/Bounce.c000066400000000000000000000110521207233610700230030ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is derived from a similar application in the TinyThread * implementation by William P. McCartney from Cleveland State University (2006) * * This application stresses the operation of the thread based AM commands for * packet transmission and reception. To run this application you will need to * burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1. * * Three different threads run that each contain an infinite loop that first sends * a message and then waits to receive a message before returning to the top of the * loop. After each message reception, one of the onboard LEDs is toggled to * indicate that it was received. Thread 0 blinks LED0, thread 1 blinks LED1, and * thread 2 blinks LED2. The three threads run independently, and three different * messages are bounced back and forth between the two motes in an unsynchronized * fashion. In contrast to the more complicated Bounce application found in the * normal nesC threads version of this application, once a thread receives a * message it will immediately flip on its LED instead of waiting on a Barrier and * synchronizing the LEDs to come on only once messages have been received from all * threads. In this way, messages are bounced back and forth between the two motes * in an asynchronous fashion, and LEDS are toggled immediately upon message * reception.. * * Successful running of this application results in each LED bouncing back and * forth between each mote independent of one another. This will continue in an * finite loop forever. * * @author Chieh-Jan Mike Liang */ #include "tosthread.h" #include "tosthread_leds.h" #include "tosthread_amradio.h" //Initialize variables associated with each thread tosthread_t bounceThread0; tosthread_t bounceThread1; tosthread_t bounceThread2; void bounceThread0_start(void* arg); void bounceThread1_start(void* arg); void bounceThread2_start(void* arg); void tosthread_main(void* arg) { amRadioStart(); tosthread_create(&bounceThread0, bounceThread0_start, NULL, 300); tosthread_create(&bounceThread1, bounceThread1_start, NULL, 300); tosthread_create(&bounceThread2, bounceThread2_start, NULL, 300); } void bounceThread0_start(void *arg) { message_t msg0; for(;;) { while (amRadioSend(AM_BROADCAST_ADDR, &msg0, 0, 20) == EBUSY) {} led0Off(); if(amRadioReceive(&msg0, 5000, 20) == SUCCESS) { led0On(); } tosthread_sleep(500); } } void bounceThread1_start(void *arg) { message_t msg1; for(;;) { while (amRadioSend(AM_BROADCAST_ADDR, &msg1, 0, 21) == EBUSY) {} led1Off(); if(amRadioReceive(&msg1, 5000, 21) == SUCCESS) { led1On(); } tosthread_sleep(500); } } void bounceThread2_start(void *arg) { message_t msg2; for(;;) { while (amRadioSend(AM_BROADCAST_ADDR, &msg2, 0, 22) == EBUSY) {} led2Off(); if(amRadioReceive(&msg2, 5000, 22) == SUCCESS) { led2On(); } tosthread_sleep(500); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/Bounce/Makefile000066400000000000000000000000561207233610700230660ustar00rootroot00000000000000TOSTHREAD_MAIN=Bounce.c include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/capps/Bounce/README000066400000000000000000000036121207233610700223070ustar00rootroot00000000000000README for TOSThreads Bounce Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application is derived from a similar application in the TinyThread implementation by William P. McCartney from Cleveland State University (2006) This application stresses the operation of the thread based AM commands for packet transmission and reception. To run this application you will need to burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1. You can install Bounce on a mote via the following command: make cthreads install.0 make cthreads install.1 Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Three different threads run that each contain an infinite loop that first sends a message and then waits to receive a message before returning to the top of the loop. After each message reception, one of the onboard LEDs is toggled to indicate that it was received. Thread 0 blinks LED0, thread 1 blinks LED1, and thread 2 blinks LED2. The three threads run independently, and three different messages are bounced back and forth between the two motes in an unsynchronized fashion. In contrast to the more complicated Bounce application found in the normal nesC threads version of this application, once a thread receives a message it will immediately flip on its LED instead of waiting on a Barrier and synchronizing the LEDs to come on only once messages have been received from all threads. In this way, messages are bounced back and forth between the two motes in an asynchronous fashion, and LEDS are toggled immediately upon message reception.. Successful running of this application results in each LED bouncing back and forth between each mote independent of one another. This will continue in an finite loop forever. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/Makefile000066400000000000000000000030521207233610700216520ustar00rootroot00000000000000#-*-makefile-*- ###################################################################### # # Makes the entire suite of TinyOS applications for a given platform. # # Author: Martin Turon # Date: August 18, 2005 # ###################################################################### # $Id: Makefile,v 1.1 2008-06-12 15:11:39 klueska Exp $ # MAKECMDGOALS is the way to get the arguments passed into a Makefile ... TARGET=$(MAKECMDGOALS) NESDOC_TARGET=$(filter-out nesdoc,$(TARGET)) # Here is a way to get the list of subdirectories in a Makefile ... ROOT=. SUBDIRS := $(shell find * -type d) # Okay, match any target, and recurse the subdirectories %: @for i in $(SUBDIRS); do \ HERE=$$PWD; \ if [ -f $$i/Makefile ]; then \ echo Building ... $(PWD)/$$i; \ echo make $(TARGET); \ cd $$i; \ $(MAKE) $(TARGET); \ cd $$HERE; \ fi; \ done threads: @: cthreads: @: dynthreads: @: BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' ) # The output directory for generated documentation DOCDIR = $(BASEDIR)/doc/nesdoc nesdoc: @echo This target rebuilds documentation for all known platforms. @echo It DOES NOT overwrite any existing documentation, thus, it @echo is best run after deleting all old documentation. @echo @echo To delete all old documentation, delete the contents of the @echo $(DOCDIR) directory. @echo @echo Press Enter to continue, or ^C to abort. @read for platform in `ncc -print-platforms`; do \ $(MAKE) $$platform docs.nohtml.preserve; \ nesdoc -o $(DOCDIR) -html -target=$$platform; \ done tinyos-2.1.2+dfsg/apps/tosthreads/capps/Null/000077500000000000000000000000001207233610700211245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/Null/Makefile000066400000000000000000000000541207233610700225630ustar00rootroot00000000000000TOSTHREAD_MAIN=Null.c include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/capps/Null/Null.c000066400000000000000000000041041207233610700222010ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Null is an empty skeleton application for testing the basic compilation and * runtime of a c-based tosthreads application. It is useful to test that the build * environment is functional in its most minimal sense, i.e., you can correctly * compile an application. It is also useful to test the minimum power consumption * of a node when it has absolutely no interrupts or resources active. * * @author Chieh-Jan Mike Liang */ #include "tosthread.h" void tosthread_main(void* arg) {} tinyos-2.1.2+dfsg/apps/tosthreads/capps/Null/README000066400000000000000000000012511207233610700220030ustar00rootroot00000000000000README for TOSTHREADS Null Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: Null is an empty skeleton application for testing the basic compilation and runtime of a c-based tosthreads application. It is useful to test that the build environment is functional in its most minimal sense, i.e., you can correctly compile an application. It is also useful to test the minimum power consumption of a node when it has absolutely no interrupts or resources active. Successful running of this application is that it simply compiles and installs. No LEDs should be flashed. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/RadioStress/000077500000000000000000000000001207233610700224545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/RadioStress/Makefile000066400000000000000000000000631207233610700241130ustar00rootroot00000000000000TOSTHREAD_MAIN=RadioStress.c include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/capps/RadioStress/README000066400000000000000000000030211207233610700233300ustar00rootroot00000000000000README for TOSThreads RadioStress Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application stresses the operation of the thread based AM commands for packet transmission and reception. To run this application you will need to burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1. You can install RadioStress on a mote via the following command: make cthreads install.0 make cthreads install.1 Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic The application burned with NODE_ID 0 will be programmed as a Receiver and will wait for messages from the sender programmed with NODE_ID 1. In the case of the sender, messages with three different AM ids are sent from three different threads in an infinite loop, and one of LED0, LED1, and LED2 are toggled upon successful transmission. In the case of the receiver, three different threads are used to wait for messages in an infinite loop from the three sending threads on the sender mote. Upon successful reception, one of LED0, LED1, or LED2 is toggled depending on the AM id received. Successful running of this application will result in all three leds flashing very rapidly on both motes, with the receiver mote flashing less rapidly if the sender mote is turned off (i.e. once every 5000ms because there is a timeout on how long it waits for messages to be received before retrying). Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/RadioStress/RadioStress.c000066400000000000000000000072301207233610700250640ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application stresses the blocking send and receive commands for the c based * API of tosthreads. Three threads are run, each thread toggling a different * colored LED. If a node has TOS_NODE_ID == 0 it will try and receive in * an infinite loop, toggling one of the three Leds upon reception. If it has * TOS_NODE_ID == 1, it will try to send in an infinite loop, toggling one of the three * Leds upon the completion of a send. Thread 0 toggles the Led0, Thread 1 toggles * Led1, and Thread 2 toggles Led2. * * @author Kevin Klues */ //#include "stack.h" #include "tosthread.h" #include "tosthread_amradio.h" #include "tosthread_leds.h" //Initialize variables associated with each thread tosthread_t radioStress0; tosthread_t radioStress1; tosthread_t radioStress2; void radioStress0_thread(void* arg); void radioStress1_thread(void* arg); void radioStress2_thread(void* arg); //Initialize messages for sending out over the radio message_t msg0; message_t msg1; message_t msg2; void tosthread_main(void* arg) { while( amRadioStart() != SUCCESS ); tosthread_create(&radioStress0, radioStress0_thread, &msg0, 200); tosthread_create(&radioStress1, radioStress1_thread, &msg1, 200); tosthread_create(&radioStress2, radioStress2_thread, &msg2, 200); } void radioStress0_thread(void* arg) { message_t* m = (message_t*)arg; for(;;) { if(TOS_NODE_ID == 0) { amRadioReceive(m, 2000, 20); led0Toggle(); } else { if(amRadioSend(!TOS_NODE_ID, m, 0, 20) == SUCCESS) led0Toggle(); } } } void radioStress1_thread(void* arg) { message_t* m = (message_t*)arg; for(;;) { if(TOS_NODE_ID == 0) { amRadioReceive(m, 2000, 21); led1Toggle(); } else { if(amRadioSend(!TOS_NODE_ID, m, 0, 21) == SUCCESS) led1Toggle(); } } } void radioStress2_thread(void* arg) { message_t* m = (message_t*)arg; for(;;) { if(TOS_NODE_ID == 0) { amRadioReceive(m, 2000, 22); led2Toggle(); } else { if(amRadioSend(!TOS_NODE_ID, m, 0, 22) == SUCCESS) led2Toggle(); } } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseAndSend/000077500000000000000000000000001207233610700225245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseAndSend/Makefile000066400000000000000000000005221207233610700241630ustar00rootroot00000000000000TOSTHREAD_MAIN=SenseAndSend.c CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/tmote_onboard ifneq ($(filter telosb tmote epic clean,$(MAKECMDGOALS)),) include $(MAKERULES) else %: @echo " Sorry, this application is only written to work with telos based motes equipped with onboard sensors.." cthreads: @: dynthreads: @: endif tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseAndSend/README000066400000000000000000000024101207233610700234010ustar00rootroot00000000000000README for TOSThreads SenseAndSend Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: SenseAndSend is a threaded implementation of an application that takes various sensor readings in parallel (by dedicating one thread to each reading), and assembling them into a packet to be sent out over the radio. It is written specifically for use with the tmote onboard sensor package, and will not compile for any other platforms. To run this application install it on a mote via the command: make cthreads install Valid platforms are currently: tmote, telosb with onboard sensors Readings are taken from each of the 4 oboard sensors and sent out over the radio interface in an infinite loop. Upon successful transmission, LED0 is toggled, and the process starts over again. A successful test will result in LED0 toggling periodically at a rate of approximately 220ms (the time it takes to take a humidity + temperature sensor reading since they share the same hardware and cannot be taken in parallel). Additionally, a base station application should be run to verify the reception of packets sent from a SenseAndSend mote, with reasonable looking sensor data. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseAndSend/SenseAndSend.c000066400000000000000000000123431207233610700252050ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SenseAndSend is a threaded implementation of an application that takes various * sensor readings in parallel (by dedicating one thread to each reading), and * assembling them into a packet to be sent out over the radio. It is written * specifically for use with the tmote onboard sensor package, and will not compile * for any other platforms. * * Readings are taken from each of the 4 oboard sensors and sent out over the radio * interface in an infinite loop. Upon successful transmission, LED0 is toggled, * and the process starts over again. * * A successful test will result in LED0 toggling periodically at a rate of * approximately 220ms (the time it takes to take a humidity + temperature sensor * reading since they share the same hardware and cannot be taken in parallel). * * Additionally, a base station application should be run to verify the reception * of packets sent from a SenseAndSend mote, with reasonable looking sensor data. * * @author Kevin Klues */ #include "tosthread.h" #include "tosthread_amradio.h" #include "tosthread_leds.h" #include "tosthread_threadsync.h" #include "tosthread_hamamatsuS1087.h" #include "tosthread_hamamatsuS10871.h" #include "tosthread_sensirionSht11.h" #define NUM_SENSORS 4 #define SAMPLING_PERIOD 3000 #define AM_SENSOR_DATA_MSG 0x25 //Data structure for storing sensor data typedef struct sensor_data { nx_uint32_t seq_no; nx_uint16_t hum; nx_uint16_t temp; nx_uint16_t tsr; nx_uint16_t par; } sensor_data_t; //Initialize variables associated with each thread tosthread_t humidity; tosthread_t temperature; tosthread_t total_solar; tosthread_t photo_active; tosthread_t send_handler; message_t send_msg; sensor_data_t* sensor_data; //pointer into message structure mutex_t data_mutex; barrier_t send_barrier; barrier_t sense_barrier; void humidity_thread(void* arg); void temperature_thread(void* arg); void total_solar_thread(void* arg); void photo_active_thread(void* arg); void send_thread(void* arg); void tosthread_main(void* arg) { mutex_init(&data_mutex); barrier_reset(&send_barrier, NUM_SENSORS+1); barrier_reset(&sense_barrier, NUM_SENSORS+1); sensor_data = radioGetPayload(&send_msg, sizeof(sensor_data_t)); sensor_data->seq_no = 0; amRadioStart(); tosthread_create(&humidity, humidity_thread, NULL, 200); tosthread_create(&temperature, temperature_thread, NULL, 200); tosthread_create(&total_solar, total_solar_thread, NULL, 200); tosthread_create(&photo_active, photo_active_thread, NULL, 200); tosthread_create(&send_handler, send_thread, NULL, 200); } void read_sensor(error_t (*read)(uint16_t*), nx_uint16_t* nx_val) { uint16_t val; for(;;) { (*read)(&val); mutex_lock(&data_mutex); *nx_val = val; mutex_unlock(&data_mutex); barrier_block(&send_barrier); barrier_block(&sense_barrier); } } void humidity_thread(void* arg) { read_sensor(sensirionSht11_humidity_read, &(sensor_data->hum)); } void temperature_thread(void* arg) { read_sensor(sensirionSht11_temperature_read, &(sensor_data->temp)); } void total_solar_thread(void* arg) { read_sensor(hamamatsuS10871_tsr_read, &(sensor_data->tsr)); } void photo_active_thread(void* arg) { read_sensor(hamamatsuS1087_par_read, &(sensor_data->par)); } void send_thread(void* arg) { for(;;) { barrier_block(&send_barrier); barrier_reset(&send_barrier, NUM_SENSORS + 1); if(amRadioSend(AM_BROADCAST_ADDR, &send_msg, sizeof(sensor_data_t), AM_SENSOR_DATA_MSG) == SUCCESS) { sensor_data->seq_no++; led0Toggle(); } //tosthread_sleep(SAMPLING_PERIOD); barrier_block(&sense_barrier); barrier_reset(&sense_barrier, NUM_SENSORS + 1); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseStoreAndForward/000077500000000000000000000000001207233610700242545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseStoreAndForward/Makefile000066400000000000000000000005241207233610700257150ustar00rootroot00000000000000TOSTHREAD_MAIN=SenseStoreAndForward.c CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/tmote_onboard ifneq ($(filter telosb tmote clean,$(MAKECMDGOALS)),) include $(MAKERULES) else %: @echo " Sorry, this application is only written to work with telos based motes equipped with onboard sensors.." cthreads: @: dynthreads: @: endif tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseStoreAndForward/README000066400000000000000000000040701207233610700251350ustar00rootroot00000000000000README for TOSThreads SenseStoreAndForward Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: SenseStoreAndForward is a threaded implementation of an application that takes various sensor readings in parallel (by dedicating one thread to each reading), logs them to flash, and then sends them out over the radio at some later time. In the current implementation, sensor readings are taken as quickly as possible, and records containing a set of readings from each iteration are batched out over the radio every 10000ms. This application is written specifically for use with the tmote onboard sensor package, and will not compile for any other platforms. To run this application install it on a mote via the command: make cthreads install Valid platforms are currently: tmote, telosb with onboard sensors Readings are taken from three oboard sensors and logged to flash as one record in an infinite loop. Records are then read out of flash and and sent out over the radio interface in separate infinite loop. Before the application starts running, the entire contents of the flash drive are erased. A successful test will result in LED0 remaining solid for approximately 6s while the flash is being erased. After that LED0 will toggle with each successful set of sensor readings logged to flash, at a rate of approximately 220ms (the time it takes to take a humidity + temperature sensor reading since they share the same hardware and cannot be taken in parallel). Also, LED1 will begin toggling in rapid succession once every 10000ms as records are successfully read from flash and sent out over the radio. Once all of the records currently recorded to flash since the last batch of sends have been sent out, LED2 Toggles to indicate completion. This process continues in an infinite loop forever. Additionally, a base station application should be run to verify the reception of packets sent from a SenseStoreAndForward mote, with reasonable looking sensor data. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseStoreAndForward/SenseStoreAndForward.c000066400000000000000000000163141207233610700304670ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SenseStoreAndForward is a threaded implementation of an application that takes * various sensor readings in parallel (by dedicating one thread to each reading), * logs them to flash, and then sends them out over the radio at some later time. * In the current implementation, sensor readings are taken as quickly as possible, * and records containing a set of readings from each iteration are batched out * over the radio every 10000ms. This application is written specifically for use * with the tmote onboard sensor package, and will not compile for any other * platforms. * * Readings are taken from each of the 4 oboard sensors and logged to flash as one * record in an infinite loop. Records are then read out of flash and and sent out * over the radio interface in separate infinite loop. Before the application * starts running, the entire contents of the flash drive are erased. * * A successful test will result in LED0 remaining solid for approximately 6s while * the flash is being erased. After that LED0 will toggle with each successful set * of sensor readings logged to flash, at a rate of approximately 220ms (the time * it takes to take a humidity + temperature sensor reading since they share the * same hardware and cannot be taken in parallel). Also, LED1 will begin toggling * in rapid succession once every 10000ms as records are successfully read from * flash and sent out over the radio. Once all of the records currently recorded * to flash since the last batch of sends have been sent out, LED2 Toggles to * indicate completion. This process continues in an infinite loop forever. * * Additionally, a base station application should be run to verify the reception * of packets sent from a SenseStoreAndForward mote, with reasonable looking sensor * data. * * @author Kevin Klues */ #include "tosthread.h" #include "tosthread_amradio.h" #include "tosthread_leds.h" #include "tosthread_threadsync.h" #include "tosthread_logstorage.h" #include "tmote_onboard_sensors.h" #include "StorageVolumes.h" #define NUM_SENSORS 3 #define SAMPLING_PERIOD 3000 #define SENDING_PERIOD 10000 #define AM_SENSOR_DATA_MSG 0x25 //Data structure for storing sensor data typedef struct sensor_data { nx_uint32_t seq_no; nx_uint16_t hum; nx_uint16_t temp; nx_uint16_t tsr; // nx_uint16_t par; } sensor_data_t; //Initialize variables associated with each thread tosthread_t humidity; tosthread_t temperature; tosthread_t total_solar; //tosthread_t photo_active; tosthread_t store_handler; tosthread_t send_handler; message_t send_msg; sensor_data_t storing_sensor_data; sensor_data_t* sending_sensor_data; //pointer into message structure mutex_t data_mutex; mutex_t log_mutex; barrier_t send_barrier; barrier_t sense_barrier; void humidity_thread(void* arg); void temperature_thread(void* arg); void total_solar_thread(void* arg); //void photo_active_thread(void* arg); void store_thread(void* arg); void send_thread(void* arg); void tosthread_main(void* arg) { mutex_init(&data_mutex); mutex_init(&log_mutex); barrier_reset(&send_barrier, NUM_SENSORS+1); barrier_reset(&sense_barrier, NUM_SENSORS+1); sending_sensor_data = radioGetPayload(&send_msg, sizeof(sensor_data_t)); storing_sensor_data.seq_no = 0; amRadioStart(); led0Toggle(); volumeLogErase(VOLUME_SENSORLOG); volumeLogSeek(VOLUME_SENSORLOG, SEEK_BEGINNING); tosthread_create(&humidity, humidity_thread, NULL, 200); tosthread_create(&temperature, temperature_thread, NULL, 200); tosthread_create(&total_solar, total_solar_thread, NULL, 200); // tosthread_create(&photo_active, photo_active_thread, NULL, 200); tosthread_create(&store_handler, store_thread, NULL, 200); tosthread_create(&send_handler, send_thread, NULL, 200); } void read_sensor(error_t (*read)(uint16_t*), nx_uint16_t* nx_val) { uint16_t val; for(;;) { (*read)(&val); mutex_lock(&data_mutex); *nx_val = val; mutex_unlock(&data_mutex); barrier_block(&send_barrier); barrier_block(&sense_barrier); } } void humidity_thread(void* arg) { read_sensor(sensirionSht11_humidity_read, &(storing_sensor_data.hum)); } void temperature_thread(void* arg) { read_sensor(sensirionSht11_temperature_read, &(storing_sensor_data.temp)); } void total_solar_thread(void* arg) { read_sensor(hamamatsuS10871_tsr_read, &(storing_sensor_data.tsr)); } //void photo_active_thread(void* arg) { // read_sensor(hamamatsuS1087_par_read, &(storing_sensor_data.par)); //} void store_thread(void* arg) { storage_len_t sensor_data_len; bool sensor_records_lost; for(;;) { barrier_block(&send_barrier); barrier_reset(&send_barrier, NUM_SENSORS + 1); mutex_lock(&log_mutex); sensor_data_len = sizeof(sensor_data_t); while( volumeLogAppend(VOLUME_SENSORLOG, &storing_sensor_data, &sensor_data_len, &sensor_records_lost) != SUCCESS ); mutex_unlock(&log_mutex); storing_sensor_data.seq_no++; led0Toggle(); //tosthread_sleep(SAMPLING_PERIOD); barrier_block(&sense_barrier); barrier_reset(&sense_barrier, NUM_SENSORS + 1); } } void send_thread(void* arg) { storage_len_t sensor_data_len; for(;;) { tosthread_sleep(SENDING_PERIOD); while( volumeLogCurrentReadOffset(VOLUME_SENSORLOG) != volumeLogCurrentWriteOffset(VOLUME_SENSORLOG) ) { sensor_data_len = sizeof(sensor_data_t); mutex_lock(&log_mutex); while( volumeLogRead(VOLUME_SENSORLOG, sending_sensor_data, &sensor_data_len) != SUCCESS ); mutex_unlock(&log_mutex); while( amRadioSend(AM_BROADCAST_ADDR, &send_msg, sizeof(sensor_data_t), AM_SENSOR_DATA_MSG) != SUCCESS ); led1Toggle(); } led2Toggle(); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseStoreAndForward/volumes-at45db.xml000066400000000000000000000001451207233610700275510ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/capps/SenseStoreAndForward/volumes-stm25p.xml000066400000000000000000000001461207233610700276210ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/000077500000000000000000000000001207233610700231455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/Makefile000066400000000000000000000010541207233610700246050ustar00rootroot00000000000000TOSTHREAD_MAIN=TestCollection.c CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/net/ CFLAGS += -I$(TOSDIR)/lib/net/ CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/net/ctp CFLAGS += -I$(TOSDIR)/lib/net/ctp -I$(TOSDIR)/lib/net/4bitle ifneq ($(filter telosb tmote tinynode shimmer shimmer2 shimmer2r span iris epic clean,$(MAKECMDGOALS)),) include $(MAKERULES) else %: @echo " Sorry, this application only works on platforms with >8kB of RAM (telos, iris, etc.)" cthreads: @: dynthreads: @: endif tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/MultihopOscilloscope.h000066400000000000000000000017721207233610700275050ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * @author David Gay * @author Kyle Jamieson */ #ifndef MULTIHOP_OSCILLOSCOPE_H #define MULTIHOP_OSCILLOSCOPE_H enum { /* Number of readings per message. If you increase this, you may have to increase the message_t size. */ NREADINGS = 5, /* Default sampling period. */ DEFAULT_INTERVAL = 1024, AM_OSCILLOSCOPE = 0x93 }; typedef nx_struct oscilloscope { nx_uint16_t version; /* Version of the interval. */ nx_uint16_t interval; /* Samping period. */ nx_uint16_t id; /* Mote id of sending mote. */ nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */ nx_uint16_t readings[NREADINGS]; } oscilloscope_t; #endif tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/README000066400000000000000000000054661207233610700240400ustar00rootroot00000000000000README for TOSThreads TestCollection Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: TestCollection is a reimplementation of the Multihop Oscilloscope application using TOSThreads. It periodically samples a universal software-based SineSensor and broadcasts a message every few readings. These readings can be displayed by the Java "Oscilloscope" application found in the the TestCollection/java subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java application. You can install TestCollection on a mote via the following command: make cthreads install Valid platforms are currently: tmote, telosb, shimmer*, span, mica2, micaz, iris, and epic At least two motes must be used by this application, with one of them installed as a base station. Base station motes can be created by installing them with NODE_ID % 500 == 0. i.e. make cthreads install.0 make cthreads install.500 make cthreads install.1000 All other nodes can be installed with arbitrary NODE_IDs. make cthreads install.123 Successful running of this application is verified by all NON-base station motes periodically flashing LED0 upon sending a message, and the base station mote, flashing LED2 upon successful reception of a message. Additionally, correct operation should be verified by running the java tool described in the following section. Tools: The Java application displays readings it receives from motes via a serial forwarder. To run it, change to the java subdirectory and type: make java net.tinyos.sf.SerialForwarder -comm serial@: # e.g., java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2 # or java net.tinyos.sf.SerialForwarder -comm serial@COM2:57600 ./run NOTE:: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. The controls at the bottom of the screen allow you to zoom in or out the X axis, change the range of the Y axis, and clear all received data. You can change the color used to display a mote by clicking on its color in the mote table. Notes: By default, the Makefile for TestCollection is setup to run CTP as the underlying collection protocol. The makefile can be modified to work with MultihopLQI by changing the appropriate include directories. The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. Known bugs/limitations: None tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/TestCollection.c000066400000000000000000000124461207233610700262530ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TestCollection is a reimplementation of the Multihop Oscilloscope application * using TOSThreads. It periodically samples a universal software-based SineSensor * and broadcasts a message every few readings. These readings can be displayed by * the Java "Oscilloscope" application found in the the TestCollection/java * subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java * application. * * At least two motes must be used by this application, with one of them installed * as a base station. Base station motes can be created by installing them with * NODE_ID % 500 == 0. * i.e. make cthreads install.0 * make cthreads install.500 * make cthreads install.1000 * * All other nodes can be installed with arbitrary NODE_IDs. * make cthreads install.123 * * Successful running of this application is verified by all NON-base station motes * periodically flashing LED1 upon sending a message, and the base station mote, * flashing LED2 upon successful reception of a message. Additionally, correct * operation should be verified by running the java tool described in the following * section. * * @author Kevin Klues * @author Chieh-Jan Mike Liang */ #include "tosthread.h" #include "tosthread_amradio.h" #include "tosthread_amserial.h" #include "tosthread_leds.h" #include "tosthread_collection.h" #include "tosthread_sinesensor.h" #include "MultihopOscilloscope.h" void fatal_problem(); void report_problem(); void report_sent(); void report_received(); oscilloscope_t local; uint8_t reading = 0; /* 0 to NREADINGS */ message_t sendbuf; message_t recvbuf; enum { MY_COLLECTION_ID = NEW_COLLECTION_CLIENT_ID(), // Gets a collection sender instance }; void tosthread_main(void* arg) { local.interval = DEFAULT_INTERVAL; local.id = TOS_NODE_ID; local.version = 0; while ( amRadioStart() != SUCCESS ); while ( collectionRoutingStart() != SUCCESS ); collectionSetCollectionId(MY_COLLECTION_ID, AM_OSCILLOSCOPE); // Associates the collection sender // with AM_OSCILLOSCOPE collection ID if (local.id % 500 == 0) { while ( amSerialStart() != SUCCESS ); collectionSetRoot(); for (;;) { // Waits for incoming packets with AM_OSCILLOSCOPE collection ID if (collectionReceive(&recvbuf, 0, AM_OSCILLOSCOPE) == SUCCESS) { oscilloscope_t *recv_o = (oscilloscope_t *) collectionGetPayload(&recvbuf, sizeof(oscilloscope_t)); oscilloscope_t *send_o = (oscilloscope_t *) serialGetPayload(&sendbuf, sizeof(oscilloscope_t)); memcpy(send_o, recv_o, sizeof(oscilloscope_t)); amSerialSend(AM_BROADCAST_ADDR, &sendbuf, sizeof(local), AM_OSCILLOSCOPE); report_received(); } } } else { uint16_t var; for (;;) { if (reading == NREADINGS) { oscilloscope_t *o = (oscilloscope_t *) collectionGetPayload(&sendbuf, sizeof(oscilloscope_t)); if (o == NULL) { fatal_problem(); return; } memcpy(o, &local, sizeof(local)); if (collectionSend(&sendbuf, sizeof(local), MY_COLLECTION_ID) == SUCCESS) { local.count++; report_sent(); } else { report_problem(); } reading = 0; } if (sinesensor_read(&var) == SUCCESS) { local.readings[reading++] = var; } tosthread_sleep(local.interval); } } } // Use LEDs to report various status issues. void fatal_problem() { led0On(); led1On(); led2On(); } void report_problem() { led0Toggle(); } void report_sent() { led1Toggle(); } void report_received() { led2Toggle(); } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/000077500000000000000000000000001207233610700240665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/ColorCellEditor.java000066400000000000000000000032621207233610700277610ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import java.awt.*; import java.awt.event.*; /* Editor for table cells representing colors. Popup a color chooser. */ public class ColorCellEditor extends AbstractCellEditor implements TableCellEditor { private Color color; private JButton button; public ColorCellEditor(String title) { button = new JButton(); final JColorChooser chooser = new JColorChooser(); final JDialog dialog = JColorChooser.createDialog (button, title, true, chooser, new ActionListener() { public void actionPerformed(ActionEvent e) { color = chooser.getColor(); } }, null); button.setBorderPainted(false); button.addActionListener (new ActionListener () { public void actionPerformed(ActionEvent e) { button.setBackground(color); chooser.setColor(color); dialog.setVisible(true); fireEditingStopped(); } } ); } public Object getCellEditorValue() { return color; } public Component getTableCellEditorComponent(JTable table, Object value, boolean isSelected, int row, int column) { color = (Color)value; return button; } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/Data.java000066400000000000000000000040451207233610700256050ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import java.util.*; /* Hold all data received from motes */ class Data { /* The mote data is stored in a flat array indexed by a mote's identifier. A null value indicates no mote with that identifier. */ private Node[] nodes = new Node[256]; private Oscilloscope parent; Data(Oscilloscope parent) { this.parent = parent; } /* Data received from mote nodeId containing NREADINGS samples from messageId * NREADINGS onwards. Tell parent if this is a new node. */ void update(int nodeId, int messageId, int readings[]) { if (nodeId >= nodes.length) { int newLength = nodes.length * 2; if (nodeId >= newLength) newLength = nodeId + 1; Node newNodes[] = new Node[newLength]; System.arraycopy(nodes, 0, newNodes, 0, nodes.length); nodes = newNodes; } Node node = nodes[nodeId]; if (node == null) { nodes[nodeId] = node = new Node(nodeId); parent.newNode(nodeId); } node.update(messageId, readings); } /* Return value of sample x for mote nodeId, or -1 for missing data */ int getData(int nodeId, int x) { if (nodeId >= nodes.length || nodes[nodeId] == null) return -1; return nodes[nodeId].getData(x); } /* Return number of last known sample on mote nodeId. Returns 0 for unknown motes. */ int maxX(int nodeId) { if (nodeId >= nodes.length || nodes[nodeId] == null) return 0; return nodes[nodeId].maxX(); } /* Return number of largest known sample on all motes (0 if there are no motes) */ int maxX() { int max = 0; for (int i = 0; i < nodes.length; i++) if (nodes[i] != null) { int nmax = nodes[i].maxX(); if (nmax > max) max = nmax; } return max; } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/Graph.java000066400000000000000000000147621207233610700260040ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import java.awt.*; import java.awt.event.*; import java.awt.font.*; import java.awt.geom.*; import java.util.*; /* Panel for drawing mote-data graphs */ class Graph extends JPanel { final static int BORDER_LEFT = 40; final static int BORDER_RIGHT = 0; final static int BORDER_TOP = 10; final static int BORDER_BOTTOM = 10; final static int TICK_SPACING = 40; final static int MAX_TICKS = 16; final static int TICK_WIDTH = 10; final static int MIN_WIDTH = 50; int gx0, gx1, gy0, gy1; // graph bounds int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale Window parent; /* Graph to screen coordinate conversion support */ int height, width; double xscale, yscale; void updateConversion() { height = getHeight() - BORDER_TOP - BORDER_BOTTOM; width = getWidth() - BORDER_LEFT - BORDER_RIGHT; if (height < 1) height = 1; if (width < 1) width = 1; xscale = (double)width / (gx1 - gx0 + 1); yscale = (double)height / (gy1 - gy0 + 1); } Graphics makeClip(Graphics g) { return g.create(BORDER_LEFT, BORDER_TOP, width, height); } // Note that these do not include the border offset! int screenX(int gx) { return (int)(xscale * (gx - gx0) + 0.5); } int screenY(int gy) { return (int)(height - yscale * (gy - gy0)); } int graphX(int sx) { return (int)(sx / xscale + gx0 + 0.5); } Graph(Window parent) { this.parent = parent; gy0 = 0; gy1 = 0xffff; gx0 = 0; gx1 = MIN_WIDTH << scale; } void rightDrawString(Graphics2D g, String s, int x, int y) { TextLayout layout = new TextLayout(s, parent.smallFont, g.getFontRenderContext()); Rectangle2D bounds = layout.getBounds(); layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2); } protected void paintComponent(Graphics g) { Graphics2D g2d = (Graphics2D)g; /* Repaint. Synchronize on Oscilloscope to avoid data changing. Simply clear panel, draw Y axis and all the mote graphs. */ synchronized (parent.parent) { updateConversion(); g2d.setColor(Color.BLACK); g2d.fillRect(0, 0, getWidth(), getHeight()); drawYAxis(g2d); Graphics clipped = makeClip(g2d); int count = parent.moteListModel.size(); for (int i = 0; i < count; i++) { clipped.setColor(parent.moteListModel.getColor(i)); drawGraph(clipped, parent.moteListModel.get(i)); } } } /* Draw the Y-axis */ protected void drawYAxis(Graphics2D g) { int axis_x = BORDER_LEFT - 1; int height = getHeight() - BORDER_BOTTOM - BORDER_TOP; g.setColor(Color.WHITE); g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1); /* Draw a reasonable set of tick marks */ int nTicks = height / TICK_SPACING; if (nTicks > MAX_TICKS) nTicks = MAX_TICKS; int tickInterval = (gy1 - gy0 + 1) / nTicks; if (tickInterval == 0) tickInterval = 1; /* Tick interval should be of the family A * 10^B, where A = 1, 2 * or 5. We tend more to rounding A up, to reduce rather than increase the number of ticks. */ int B = (int)(Math.log(tickInterval) / Math.log(10)); int A = (int)(tickInterval / Math.pow(10, B) + 0.5); if (A > 2) A = 5; else if (A > 5) A = 10; tickInterval = A * (int)Math.pow(10, B); /* Ticks are printed at multiples of tickInterval */ int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval; while (tick <= gy1) { int stick = screenY(tick) + BORDER_TOP; rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick); g.drawLine(axis_x - TICK_WIDTH / 2, stick, axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick); tick += tickInterval; } } /* Draw graph for mote nodeId */ protected void drawGraph(Graphics g, int nodeId) { SingleGraph sg = new SingleGraph(g, nodeId); if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel for (int sx = 0; sx < width; sx++) sg.nextPoint(g, graphX(sx), sx); else // Less points than pixel-iterate by points for (int gx = gx0; gx <= gx1; gx++) sg.nextPoint(g, gx, screenX(gx)); } /* Inner class to simplify drawing a graph. Simplify initialise it, then feed it the X screen and graph coordinates, from left to right. */ private class SingleGraph { int lastsx, lastsy, nodeId; /* Start drawing the graph mote id */ SingleGraph(Graphics g, int id) { nodeId = id; lastsx = -1; lastsy = -1; } /* Next point in mote's graph is at x value gx, screen coordinate sx */ void nextPoint(Graphics g, int gx, int sx) { int gy = parent.parent.data.getData(nodeId, gx); int sy = -1; if (gy >= 0) { // Ignore missing values double rsy = height - yscale * (gy - gy0); // Ignore problem values if (rsy >= -1e6 && rsy <= 1e6) sy = (int)(rsy + 0.5); if (lastsy >= 0 && sy >= 0) g.drawLine(lastsx, lastsy, sx, sy); } lastsx = sx; lastsy = sy; } } /* Update X-axis range in GUI */ void updateXLabel() { parent.xLabel.setText("X: " + gx0 + " - " + gx1); } /* Ensure that graph is nicely positioned on screen. max is the largest sample number received from any mote. */ private void recenter(int max) { // New data will show up at the 3/4 point // The 2nd term ensures that gx1 will be >= max int scrollby = ((gx1 - gx0) >> 2) + (max - gx1); gx0 += scrollby; gx1 += scrollby; if (gx0 < 0) { // don't bother showing negative sample numbers gx1 -= gx0; gx0 = 0; } updateXLabel(); } /* New data received. Redraw graph, scrolling if necessary */ void newData() { int max = parent.parent.data.maxX(); if (max > gx1 || max < gx0) // time to scroll recenter(max); repaint(); } /* User set the X-axis scale to newScale */ void setScale(int newScale) { gx1 = gx0 + (MIN_WIDTH << newScale); scale = newScale; recenter(parent.parent.data.maxX()); repaint(); } /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus values (return false), or accept, redraw and return true. */ boolean setYAxis(int newy0, int newy1) { if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 || newy1 < 0 || newy1 > 65535) return false; gy0 = newy0; gy1 = newy1; repaint(); return true; } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/Makefile000066400000000000000000000010461207233610700255270ustar00rootroot00000000000000GEN=OscilloscopeMsg.java Constants.java all: oscilloscope.jar oscilloscope.jar: Oscilloscope.class jar cf $@ *.class OscilloscopeMsg.java: ../MultihopOscilloscope.h mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@ Constants.java: ../MultihopOscilloscope.h ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@ Oscilloscope.class: $(wildcard *.java) $(GEN) javac *.java clean: rm -f *.class $(GEN) veryclean: clean rm oscilloscope.jar tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/Node.java000066400000000000000000000063161207233610700256240ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Class holding all data received from a mote. */ class Node { /* Data is hold in an array whose size is a multiple of INCREMENT, and INCREMENT itself must be a multiple of Constant.NREADINGS. This simplifies handling the extension and clipping of old data (see setEnd) */ final static int INCREMENT = 100 * Constants.NREADINGS; final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT /* The mote's identifier */ int id; /* Data received from the mote. data[0] is the dataStart'th sample Indexes 0 through dataEnd - dataStart - 1 hold data. Samples are 16-bit unsigned numbers, -1 indicates missing data. */ int[] data; int dataStart, dataEnd; Node(int _id) { id = _id; } /* Update data to hold received samples newDataIndex .. newEnd. If we receive data with a lower index, we discard newer data (we assume the mote rebooted). */ private void setEnd(int newDataIndex, int newEnd) { if (newDataIndex < dataStart || data == null) { /* New data is before the start of what we have. Just throw it all away and start again */ dataStart = newDataIndex; data = new int[INCREMENT]; } if (newEnd > dataStart + data.length) { /* Try extending first */ if (data.length < MAX_SIZE) { int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT; if (newLength >= MAX_SIZE) newLength = MAX_SIZE; int[] newData = new int[newLength]; System.arraycopy(data, 0, newData, 0, data.length); data = newData; } if (newEnd > dataStart + data.length) { /* Still doesn't fit. Squish. We assume INCREMENT >= (newEnd - newDataIndex), and ensure that dataStart + data.length - INCREMENT = newDataIndex */ int newStart = newDataIndex + INCREMENT - data.length; if (dataStart + data.length > newStart) System.arraycopy(data, newStart - dataStart, data, 0, data.length - (newStart - dataStart)); dataStart = newStart; } } /* Mark any missing data as invalid */ for (int i = dataEnd < dataStart ? dataStart : dataEnd; i < newDataIndex; i++) data[i - dataStart] = -1; /* If we receive a count less than the old count, we assume the old data is invalid */ dataEnd = newEnd; } /* Data received containing NREADINGS samples from messageId * NREADINGS onwards */ void update(int messageId, int readings[]) { int start = messageId * Constants.NREADINGS; setEnd(start, start + Constants.NREADINGS); for (int i = 0; i < readings.length; i++) data[start - dataStart + i] = readings[i]; } /* Return value of sample x, or -1 for missing data */ int getData(int x) { if (x < dataStart || x >= dataEnd) return -1; else return data[x - dataStart]; } /* Return number of last known sample */ int maxX() { return dataEnd - 1; } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/Oscilloscope.java000066400000000000000000000076771207233610700274100ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import net.tinyos.message.*; import net.tinyos.util.*; import java.io.*; /* The "Oscilloscope" demo app. Displays graphs showing data received from the Oscilloscope mote application, and allows the user to: - zoom in or out on the X axis - set the scale on the Y axis - change the sampling period - change the color of each mote's graph - clear all data This application is in three parts: - the Node and Data objects store data received from the motes and support simple queries - the Window and Graph and miscellaneous support objects implement the GUI and graph drawing - the Oscilloscope object talks to the motes and coordinates the other objects Synchronization is handled through the Oscilloscope object. Any operation that reads or writes the mote data must be synchronized on Oscilloscope. Note that the messageReceived method below is synchronized, so no further synchronization is needed when updating state based on received messages. */ public class Oscilloscope implements MessageListener { MoteIF mote; Data data; Window window; /* The current sampling period. If we receive a message from a mote with a newer version, we update our interval. If we receive a message with an older version, we broadcast a message with the current interval and version. If the user changes the interval, we increment the version and broadcast the new interval and version. */ int interval = Constants.DEFAULT_INTERVAL; int version = -1; /* Main entry point */ void run() { data = new Data(this); window = new Window(this); window.setup(); mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(new OscilloscopeMsg(), this); } /* The data object has informed us that nodeId is a previously unknown mote. Update the GUI. */ void newNode(int nodeId) { window.newNode(nodeId); } synchronized public void messageReceived(int dest_addr, Message msg) { if (msg instanceof OscilloscopeMsg) { OscilloscopeMsg omsg = (OscilloscopeMsg)msg; /* Update interval and mote data */ periodUpdate(omsg.get_version(), omsg.get_interval()); data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings()); /* Inform the GUI that new data showed up */ window.newData(); } } /* A potentially new version and interval has been received from the mote */ void periodUpdate(int moteVersion, int moteInterval) { if (moteVersion > version) { /* It's new. Update our vision of the interval. */ version = moteVersion; interval = moteInterval; window.updateSamplePeriod(); } else if (moteVersion < version) { /* It's old. Update the mote's vision of the interval. */ sendInterval(); } } /* The user wants to set the interval to newPeriod. Refuse bogus values and return false, or accept the change, broadcast it, and return true */ synchronized boolean setInterval(int newPeriod) { if (newPeriod < 1 || newPeriod > 65535) return false; interval = newPeriod; version++; sendInterval(); return true; } /* Broadcast a version+interval message. */ void sendInterval() { OscilloscopeMsg omsg = new OscilloscopeMsg(); omsg.set_version(version); omsg.set_interval(interval); try { mote.send(MoteIF.TOS_BCAST_ADDR, omsg); } catch (IOException e) { window.error("Cannot send message to mote"); } } /* User wants to clear all data. */ void clear() { data = new Data(this); } public static void main(String[] args) { Oscilloscope me = new Oscilloscope(); me.run(); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/Window.java000066400000000000000000000207401207233610700262030ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import javax.swing.*; import javax.swing.table.*; import javax.swing.event.*; import java.awt.*; import java.awt.event.*; import java.util.*; /* The main GUI object. Build the GUI and coordinate all user activities */ class Window { Oscilloscope parent; Graph graph; Font smallFont = new Font("Dialog", Font.PLAIN, 8); Font boldFont = new Font("Dialog", Font.BOLD, 12); Font normalFont = new Font("Dialog", Font.PLAIN, 12); MoteTableModel moteListModel; // GUI view of mote list JLabel xLabel; // Label displaying X axis range JTextField sampleText, yText; // inputs for sample period and Y axis range JFrame frame; Window(Oscilloscope parent) { this.parent = parent; } /* A model for the mote table, and general utility operations on the mote list */ class MoteTableModel extends AbstractTableModel { private ArrayList motes = new ArrayList(); private ArrayList colors = new ArrayList(); /* Initial mote colors cycle through this list. Add more colors if you want. */ private Color[] cycle = { Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA, Color.YELLOW, Color.GRAY, Color.YELLOW }; int cycleIndex; /* TableModel methods for achieving our table appearance */ public String getColumnName(int col) { if (col == 0) return "Mote"; else return "Color"; } public int getColumnCount() { return 2; } public synchronized int getRowCount() { return motes.size(); } public synchronized Object getValueAt(int row, int col) { if (col == 0) return motes.get(row); else return colors.get(row); } public Class getColumnClass(int col) { return getValueAt(0, col).getClass(); } public boolean isCellEditable(int row, int col) { return col == 1; } public synchronized void setValueAt(Object value, int row, int col) { colors.set(row, value); fireTableCellUpdated(row, col); graph.repaint(); } /* Return mote id of i'th mote */ int get(int i) { return ((Integer)motes.get(i)).intValue(); } /* Return color of i'th mote */ Color getColor(int i) { return (Color)colors.get(i); } /* Return number of motes */ int size() { return motes.size(); } /* Add a new mote */ synchronized void newNode(int nodeId) { /* Shock, horror. No binary search. */ int i, len = motes.size(); for (i = 0; ; i++) if (i == len || nodeId < get(i)) { motes.add(i, new Integer(nodeId)); // Cycle through a set of initial colors colors.add(i, cycle[cycleIndex++ % cycle.length]); break; } fireTableRowsInserted(i, i); } /* Remove all motes */ void clear() { motes = new ArrayList(); colors = new ArrayList(); fireTableDataChanged(); } } /* A simple full-color cell */ static class MoteColor extends JLabel implements TableCellRenderer { public MoteColor() { setOpaque(true); } public Component getTableCellRendererComponent (JTable table, Object color, boolean isSelected, boolean hasFocus, int row, int column) { setBackground((Color)color); return this; } } /* Convenience methods for making buttons, labels and textfields. Simplifies code and ensures a consistent style. */ JButton makeButton(String label, ActionListener action) { JButton button = new JButton(); button.setText(label); button.setFont(boldFont); button.addActionListener(action); return button; } JLabel makeLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(boldFont); return label; } JLabel makeSmallLabel(String txt, int alignment) { JLabel label = new JLabel(txt, alignment); label.setFont(smallFont); return label; } JTextField makeTextField(int columns, ActionListener action) { JTextField tf = new JTextField(columns); tf.setFont(normalFont); tf.setMaximumSize(tf.getPreferredSize()); tf.addActionListener(action); return tf; } /* Build the GUI */ void setup() { JPanel main = new JPanel(new BorderLayout()); main.setMinimumSize(new Dimension(500, 250)); main.setPreferredSize(new Dimension(800, 400)); // Three panels: mote list, graph, controls moteListModel = new MoteTableModel(); JTable moteList = new JTable(moteListModel); moteList.setDefaultRenderer(Color.class, new MoteColor()); moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color")); moteList.setPreferredScrollableViewportSize(new Dimension(100, 400)); JScrollPane motePanel = new JScrollPane(); motePanel.getViewport().add(moteList, null); main.add(motePanel, BorderLayout.WEST); graph = new Graph(this); main.add(graph, BorderLayout.CENTER); // Controls. Organised using box layouts. // Sample period. JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT); sampleText = makeTextField(6, new ActionListener() { public void actionPerformed(ActionEvent e) { setSamplePeriod(); } } ); updateSamplePeriod(); // Clear data. JButton clearButton = makeButton("Clear data", new ActionListener() { public void actionPerformed(ActionEvent e) { clearData(); } } ); // Adjust X-axis zoom. Box xControl = new Box(BoxLayout.Y_AXIS); xLabel = makeLabel("", JLabel.CENTER); final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale); Hashtable xTable = new Hashtable(); for (int i = 0; i <= 8; i += 2) xTable.put(new Integer(i), makeSmallLabel("" + (Graph.MIN_WIDTH << i), JLabel.CENTER)); xSlider.setLabelTable(xTable); xSlider.setPaintLabels(true); graph.updateXLabel(); graph.setScale(graph.scale); xSlider.addChangeListener(new ChangeListener() { public void stateChanged(ChangeEvent e) { //if (!xSlider.getValueIsAdjusting()) graph.setScale((int)xSlider.getValue()); } }); xControl.add(xLabel); xControl.add(xSlider); // Adjust Y-axis range. JLabel yLabel = makeLabel("Y:", JLabel.RIGHT); yText = makeTextField(12, new ActionListener() { public void actionPerformed(ActionEvent e) { setYAxis(); } } ); yText.setText(graph.gy0 + " - " + graph.gy1); Box controls = new Box(BoxLayout.X_AXIS); controls.add(clearButton); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(sampleLabel); controls.add(sampleText); controls.add(Box.createHorizontalGlue()); controls.add(Box.createRigidArea(new Dimension(20, 0))); controls.add(xControl); controls.add(yLabel); controls.add(yText); main.add(controls, BorderLayout.SOUTH); // The frame part frame = new JFrame("Oscilloscope"); frame.setSize(main.getPreferredSize()); frame.getContentPane().add(main); frame.setVisible(true); frame.addWindowListener(new WindowAdapter() { public void windowClosing(WindowEvent e) { System.exit(0); } }); } /* User operation: clear data */ void clearData() { synchronized (parent) { moteListModel.clear(); parent.clear(); graph.newData(); } } /* User operation: set Y-axis range. */ void setYAxis() { String val = yText.getText(); try { int dash = val.indexOf('-'); if (dash >= 0) { String min = val.substring(0, dash).trim(); String max = val.substring(dash + 1).trim(); if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max))) error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)"); return; } } catch (NumberFormatException e) { } error("Invalid range " + val + " (expected NN-MM)"); } /* User operation: set sample period. */ void setSamplePeriod() { String periodS = sampleText.getText().trim(); try { int newPeriod = Integer.parseInt(periodS); if (parent.setInterval(newPeriod)) return; } catch (NumberFormatException e) { } error("Invalid sample period " + periodS); } /* Notification: sample period changed. */ void updateSamplePeriod() { sampleText.setText("" + parent.interval); } /* Notification: new node. */ void newNode(int nodeId) { moteListModel.newNode(nodeId); } /* Notification: new data. */ void newData() { graph.newData(); } void error(String msg) { JOptionPane.showMessageDialog(frame, msg, "Error", JOptionPane.ERROR_MESSAGE); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/build.xml000066400000000000000000000006201207233610700257050ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestCollection/java/oscilloscope.jar000066400000000000000000000454701207233610700272740ustar00rootroot00000000000000PKd8 META-INF/PKPKd8META-INF/MANIFEST.MFMLK-. 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You can install TestJoin on a mote via the following command: make threads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Upon a successful burn, you should see all LEDs toggle in the following pattern, repeating every 8 seconds: 0s: (110) LED0 ON, LED1 ON, LED2 OFF 1s: (000) LED0 OFF, LED1 OFF, LED2 OFF 2s: (010) LED0 OFF, LED1 ON, LED2 OFF 3s: (000) LED0 OFF, LED1 OFF, LED2 OFF 4s: (111) LED0 ON, LED1 ON, LED2 ON 5s: (001) LED0 OFF, LED1 OFF, LED2 ON 6s: (011) LED0 OFF, LED1 ON, LED2 ON 7s: (001) LED0 OFF, LED1 OFF, LED2 ON Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestJoin/TestJoin.c000066400000000000000000000063411207233610700236600ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TestJoin is a simple application used to test the basic functionality of * the join() system call for waiting on a set of threads in a TOSThreads * based application. * * Upon a successful burn, you should see all LEDs toggle in the following pattern, * repeating every 8 seconds: * * 0s: (110) LED0 ON, LED1 ON, LED2 OFF
    * 1s: (000) LED0 OFF, LED1 OFF, LED2 OFF
    * 2s: (010) LED0 OFF, LED1 ON, LED2 OFF
    * 3s: (000) LED0 OFF, LED1 OFF, LED2 OFF
    * 4s: (111) LED0 ON, LED1 ON, LED2 ON
    * 5s: (001) LED0 OFF, LED1 OFF, LED2 ON
    * 6s: (011) LED0 OFF, LED1 ON, LED2 ON
    * 7s: (001) LED0 OFF, LED1 OFF, LED2 ON
    * * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "stack.h" #include "tosthread.h" #include "tosthread_leds.h" //Initialize variables associated with each thread tosthread_t init; tosthread_t blink0; tosthread_t blink1; void init_thread(void* arg); void blink0_thread(void* arg); void blink1_thread(void* arg); void tosthread_main(void* arg) { //Use stack estimator to calculate maximum stack size // on a thread by thread basis tosthread_create(&init, init_thread, NULL, INIT_STACK_SIZE); } void init_thread(void* arg) { for(;;) { tosthread_create(&blink0, blink0_thread, NULL, BLINK0_STACK_SIZE); tosthread_create(&blink1, blink1_thread, NULL, BLINK1_STACK_SIZE); tosthread_join(&blink0); tosthread_join(&blink1); led2Toggle(); } } void blink0_thread(void* arg) { int i; for(i=0; i<2; i++) { led0Toggle(); tosthread_sleep(1000); } } void blink1_thread(void* arg) { int i; for(i=0; i<4; i++) { led1Toggle(); tosthread_sleep(1000); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestJoin/stack.h000066400000000000000000000033511207233610700232310ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ enum { INIT_STACK_SIZE = 50, BLINK0_STACK_SIZE = 200, BLINK1_STACK_SIZE = 200, BLINK2_STACK_SIZE = 200, }; tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestLogStorage/000077500000000000000000000000001207233610700231205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestLogStorage/Makefile000066400000000000000000000012711207233610700245610ustar00rootroot00000000000000TOSTHREAD_MAIN=TestLogStorage.c THIS_SUPPORTED_PLATFORMS=tmote telos telosb eyesIFXv1 eyesIFXv2 mica2 mica2dot telosa eyesIFX micaz iris tinynode epic ifneq ($(filter $(THIS_SUPPORTED_PLATFORMS) clean,$(MAKECMDGOALS)),) ifneq ($(filter tmote telos telosb eyesIFXv1,$(MAKECMDGOALS)),) CFLAGS+=-DUSE_STM25P endif ifneq ($(filter mica2 telosa mica2dot eyesIFX eyesIFXv2 micaz iris tinynode epic,$(MAKECMDGOALS)),) CFLAGS+=-DUSE_AT45DB endif include $(MAKERULES) else %: @echo " Sorry, this application is only written to work with the following platforms:" @echo " $(THIS_SUPPORTED_PLATFORMS)" cthreads: @: endif tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestLogStorage/README000066400000000000000000000054331207233610700240050ustar00rootroot00000000000000README for TOSThreads TestLogStorage Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: TestLogStorage is a threaded application that takes dummy sensor readings of a counter, logs them to flash, and then sends out over the serial port at some later time. In the current implementation, each sensor reading is taken once every 3000ms, and records containing a set of readings from each iteration are batched out over the radio every 10000ms. This application is very similar to the SenseStoreAndForward application contained in this same directory, except that it uses a dummy sensor instead of sensors specific to the tmote onboard suite. In this way, the LogStorage functionality can be tested in conjunction with the sending facility in a platform independent way. To run this application install it on a mote via the command: make cthreads install Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic Readings are taken from the dummy sensor and logged to flash as one record in an infinite loop. Records are then read out of flash and and sent out over the serial interface in separate infinite loop. Before the application starts running, the entire contents of the flash drive are erased. A successful test will result in LED0 remaining solid for approximately 6s while the flash is being erased. After that LED0 will toggle with each successful sensor readings logged to flash, at a rate of 3000ms. Also, LED1 will begin toggling in rapid succession once every 10000ms as records are successfully read from flash and sent out over the serial port. Once all of the records currently recorded to flash since the last batch of sends have been sent out, LED2 Toggles to indicate completion. This process continues in an infinite loop forever. Since the TestLogStorage mote writes its records out to the serial port, you can test that the application is working properly by reading these packets (e.g., through seriallisten): java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX: Once this java application is running, you should see output containing the sensor readings being streamed to your terminal. Check that the output has reasonable values, counting up from 0. E.g.: 00 ff ff 00 00 06 00 25 00 00 00 9f 00 9f 00 ff ff 00 00 06 00 25 00 00 00 a0 00 a0 00 ff ff 00 00 06 00 25 00 00 00 a1 00 a1 00 ff ff 00 00 06 00 25 00 00 00 a2 00 a2 00 ff ff 00 00 06 00 25 00 00 00 a3 00 a3 NOTE: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestLogStorage/TestLogStorage.c000066400000000000000000000144031207233610700261740ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TestLogStorage is a threaded implementation of an application that takes a dummy * sensor readings of a counter, logs it flash, and then sends it out over the * serial port at some later time. In the current implementation, each sensor reading is * taken once every 3000ms, and records containing a set of readings from each * iteration are batched out over the radio every 10000ms. This application is * very similar to the SenseStoreAndForward application contained in this same * directory, except that it is written using a dummy sensor value instead of * sensors specific to the tmote onboard suite. In this way, the LogStorage * functionality can be tested in conjunction with the sending facility in a * platform independent way. * * Readings are taken from the dummy sensor and logged to flash as one record in an * infinite loop. Records are then read out of flash and and sent out over the * serial interface in separate infinite loop. Before the application starts * running, the entire contents of the flash drive are erased. * * A successful test will result in LED0 remaining solid for approximately 6s while * the flash is being erased. After that LED0 will toggle with each successful * sensor readings logged to flash, at a rate of 3000ms. Also, LED1 will begin * toggling in rapid succession once every 10000ms as records are successfully read * from flash and sent out over the serial port. Once all of the records currently * recorded to flash since the last batch of sends have been sent out, LED2 Toggles * to indicate completion. This process continues in an infinite loop forever. * * @author Kevin Klues */ #include "tosthread.h" #include "tosthread_amserial.h" #include "tosthread_leds.h" #include "tosthread_threadsync.h" #include "tosthread_logstorage.h" #include "StorageVolumes.h" #define NUM_SENSORS 1 #define SAMPLING_PERIOD 3000 #define SENDING_PERIOD 10000 #define AM_SENSOR_DATA_MSG 0x25 //Data structure for storing sensor data typedef struct sensor_data { nx_uint32_t seq_no; nx_uint16_t sample; } sensor_data_t; //Initialize variables associated with each thread tosthread_t dummy_sensor; tosthread_t store_handler; tosthread_t send_handler; message_t send_msg; sensor_data_t storing_sensor_data; sensor_data_t* sending_sensor_data; //pointer into message structure mutex_t data_mutex; mutex_t log_mutex; barrier_t send_barrier; barrier_t sense_barrier; void sensor_thread(void* arg); void store_thread(void* arg); void send_thread(void* arg); void tosthread_main(void* arg) { mutex_init(&data_mutex); mutex_init(&log_mutex); barrier_reset(&send_barrier, NUM_SENSORS+1); barrier_reset(&sense_barrier, NUM_SENSORS+1); sending_sensor_data = serialGetPayload(&send_msg, sizeof(sensor_data_t)); storing_sensor_data.seq_no = 0; amSerialStart(); led0Toggle(); volumeLogErase(VOLUME_TESTLOGSTORAGE); volumeLogSeek(VOLUME_TESTLOGSTORAGE, SEEK_BEGINNING); tosthread_create(&dummy_sensor, sensor_thread, NULL, 200); tosthread_create(&store_handler, store_thread, NULL, 200); tosthread_create(&send_handler, send_thread, NULL, 200); } void read_sensor(error_t (*read)(uint16_t*), nx_uint16_t* nx_val) { } void sensor_thread(void* arg) { //Dummy sensor just counts up on each iteration uint16_t val = -1; for(;;) { val++; mutex_lock(&data_mutex); storing_sensor_data.sample = val; mutex_unlock(&data_mutex); barrier_block(&send_barrier); barrier_block(&sense_barrier); } } void store_thread(void* arg) { storage_len_t sensor_data_len; bool sensor_records_lost; for(;;) { barrier_block(&send_barrier); barrier_reset(&send_barrier, NUM_SENSORS + 1); mutex_lock(&log_mutex); sensor_data_len = sizeof(sensor_data_t); while( volumeLogAppend(VOLUME_TESTLOGSTORAGE, &storing_sensor_data, &sensor_data_len, &sensor_records_lost) != SUCCESS ); mutex_unlock(&log_mutex); storing_sensor_data.seq_no++; led0Toggle(); tosthread_sleep(SAMPLING_PERIOD); barrier_block(&sense_barrier); barrier_reset(&sense_barrier, NUM_SENSORS + 1); } } void send_thread(void* arg) { storage_len_t sensor_data_len; for(;;) { tosthread_sleep(SENDING_PERIOD); while( volumeLogCurrentReadOffset(VOLUME_TESTLOGSTORAGE) != volumeLogCurrentWriteOffset(VOLUME_TESTLOGSTORAGE) ) { sensor_data_len = sizeof(sensor_data_t); mutex_lock(&log_mutex); while( volumeLogRead(VOLUME_TESTLOGSTORAGE, sending_sensor_data, &sensor_data_len) != SUCCESS ); mutex_unlock(&log_mutex); while( amSerialSend(AM_BROADCAST_ADDR, &send_msg, sizeof(sensor_data_t), AM_SENSOR_DATA_MSG) != SUCCESS ); led1Toggle(); } led2Toggle(); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestLogStorage/volumes-at45db.xml000066400000000000000000000001521207233610700264130ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestLogStorage/volumes-pxa27xp30.xml000066400000000000000000000001531207233610700270050ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestLogStorage/volumes-stm25p.xml000066400000000000000000000001531207233610700264630ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestPrintf/000077500000000000000000000000001207233610700223145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestPrintf/Makefile000066400000000000000000000001421207233610700237510ustar00rootroot00000000000000TOSTHREAD_MAIN=TestPrintf.c CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestPrintf/README000066400000000000000000000024061207233610700231760ustar00rootroot00000000000000README for TOSThreads TestPrintf Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application tests the operation of the Printf client in TOSThreads. It continuously prints the value of a counter starting at 0, increasing as it prints. You can install TestPrintf on a mote via the following command: make cthreads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Once burned on a mote, the java based PrintfClient must be ran to verify proper operation of the application. java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSBXXX: NOTE: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. Once this java application is running, you should see output of the sort continuously being streamed to your terminal: ... ... Counter: 4549 Counter: 4550 Counter: 4551 Counter: 4552 Counter: 4553 Counter: 4554 Counter: 4555 Counter: 4556 Counter: 4557 Counter: 4558 Counter: 4559 ... ... Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestPrintf/TestPrintf.c000066400000000000000000000042111207233610700245600ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application tests the operation of the Printf client in TOSThreads. It * continuously prints the value of a counter starting at 0, increasing as it * prints. * * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "tosthread.h" #include "printf.h" //Initialize variables associated with each thread tosthread_t printf_thread; void thread_run(void* arg); void tosthread_main(void* arg) { tosthread_create(&printf_thread, thread_run, NULL, 200); } void thread_run(void* arg) { uint32_t counter = 0; for(;;) { printf("Counter: %lu\n", counter++); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestSineSensor/000077500000000000000000000000001207233610700231425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestSineSensor/Makefile000066400000000000000000000001621207233610700246010ustar00rootroot00000000000000TOSTHREAD_MAIN=TestSineSensor.c CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestSineSensor/README000066400000000000000000000026441207233610700240300ustar00rootroot00000000000000README for TOSThreads TestSineSensor Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application is used to test the threaded version of the API for accessing the software based SineSensor usable by any platform for demonstration purposes. You can install TestSineSensor on a mote via the following comand: make cthreads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic This application simply takes sensor readings in an infinite loop from the SineSensor and forwards them over the serial interface. Upon successful transmission, LED0 is toggled. A successful test will result in the TestSineSensor mote constantly flickering LED0. Additionally, messages containing the sensor readings should be forwarded over the serial interface as verified by running the following for the platform of interest: java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX: NOTE: The baud rate 57600 must be used telos based motes, as its configuration has been changed to work with this baud rate when compiled for tosthreads. I.e. DO NOT just substitute 'telosb' or 'tmote' for above. Explicitly set it to 57600. Once this java application is running, you should see output containing the sensor readings being streamed to your terminal. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/TestSineSensor/TestSineSensor.c000066400000000000000000000046321207233610700262430ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is used to test the threaded version of the API for accessing * the software based SineSensor usable by any platform for demonstration purposes. * * This application simply takes sensor readings in an infinite loop from the * SineSensor and forwards them over the serial interface. Upon successful * transmission, LED0 is toggled. * * @author Kevin Klues */ #include "tosthread.h" #include "tosthread_amserial.h" #include "tosthread_leds.h" #include "tosthread_sinesensor.h" void tosthread_main(void* arg) { uint16_t* var; message_t msg; var = serialGetPayload(&msg, sizeof(uint16_t)); while( amSerialStart() != SUCCESS ); for(;;) { while( sinesensor_read(var) != SUCCESS ); while( amSerialSend(AM_BROADCAST_ADDR, &msg, sizeof(uint16_t), 228) != SUCCESS ); led0Toggle(); } } tinyos-2.1.2+dfsg/apps/tosthreads/capps/ThreadStress/000077500000000000000000000000001207233610700226255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/capps/ThreadStress/Makefile000066400000000000000000000001461207233610700242660ustar00rootroot00000000000000TOSTHREAD_MAIN=ThreadStress.c PFLAGS += -I$(TOS_THREADS_DIR)/tos/csystem/Loader include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/capps/ThreadStress/README000066400000000000000000000022111207233610700235010ustar00rootroot00000000000000README for TOSThreads ThreadStress Author/Contact: tinyos-help@millennium.berkeley.edu Author: Kevin Klues Description: This application stresses the creation and destruction of dynamic threads by spawning lots and lots of threads over and over again and letting them run to completion. Three different thread start functions are used, each toggling one of LED0, LED1, and LED2 every 256 spawnings. The time at which each LED is toggled is offset so that the three LEDS do not come on in unison. You can install ThreadStress on a mote via the following command: make cthreads install Valid platforms are currently: tmote, telosb, iris, shimmer*, span, mica2, micaz, and epic Successful running of this application will result in all three leds flashing at a rate determined by how long it takes to spawn a thread on a given platform. All three LEDs should flash at this rate in an infinite loop forever. Given the dynamics on the mote the rate may vary over time, but the important thing is that all three LEDs continue to toggle at a reasonably visible rate. Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/capps/ThreadStress/ThreadStress.c000066400000000000000000000073461207233610700254160ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application stresses the creation and destruction of dynamic threads by * spawning lots and lots of threads over and over again and letting them run to * completion. Three different thread start functions are used, each toggling one * of LED0, LED1, and LED2 every 256 spawnings. The time at which each LED is * toggled is offset so that the three LEDS do not come on in unison. * * Successful running of this application will result in all three leds flashing at * a rate determined by how long it takes to spawn a thread on a given platform. * All three LEDs should flash at this rate in an infinite loop forever. Given the * dynamics on the mote the rate may vary over time, but the important thing is * that all three LEDs continue to toggle at a reasonably visible rate. * * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "tosthread.h" #include "tosthread_leds.h" //Initialize variables associated with each thread tosthread_t thread_handler; void blink0_thread(void* arg); void blink1_thread(void* arg); void blink2_thread(void* arg); void tosthread_main(void* arg) { while(1) { tosthread_create(&thread_handler, blink0_thread, NULL, 100); tosthread_create(&thread_handler, blink1_thread, NULL, 100); tosthread_create(&thread_handler, blink2_thread, NULL, 100); } } uint8_t blink0_count = 0; void blink0_thread(void* arg) { if(blink0_count++ == 0) led0Toggle(); tosthread_create(&thread_handler, blink1_thread, NULL, 100); tosthread_create(&thread_handler, blink2_thread, NULL, 100); tosthread_create(&thread_handler, blink0_thread, NULL, 100); } uint8_t blink1_count = 0; void blink1_thread(void* arg) { if(blink1_count++ == 85) led1Toggle(); tosthread_create(&thread_handler, blink2_thread, NULL, 100); tosthread_create(&thread_handler, blink0_thread, NULL, 100); tosthread_create(&thread_handler, blink1_thread, NULL, 100); } uint8_t blink2_count = 0; void blink2_thread(void* arg) { if(blink2_count++ == 170) led2Toggle(); tosthread_create(&thread_handler, blink0_thread, NULL, 100); tosthread_create(&thread_handler, blink1_thread, NULL, 100); tosthread_create(&thread_handler, blink2_thread, NULL, 100); } tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/000077500000000000000000000000001207233610700204075ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/LoadFromRAM/000077500000000000000000000000001207233610700224525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/LoadFromRAM/LoadFromRAMAppC.nc000066400000000000000000000040671207233610700256120ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * LoadFromRAM is a simple program that dynamically loads two loadable * programs hardcoded in the byte arrays; One program is Blink, and the * other one is Basestation. * * @author Chieh-Jan Mike Liang */ configuration LoadFromRAMAppC {} implementation { components MainC, LoadFromRAMP, DynamicLoaderC, LedsC; LoadFromRAMP.Boot -> MainC; LoadFromRAMP.DynamicLoader -> DynamicLoaderC; LoadFromRAMP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/LoadFromRAM/LoadFromRAMP.nc000066400000000000000000000230551207233610700251640ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * LoadFromRAM is a simple program that dynamically loads two loadable * programs hardcoded in the byte arrays; One program is Blink, and the * other one is Basestation. * * @author Chieh-Jan Mike Liang */ module LoadFromRAMP { uses { interface Boot; interface DynamicLoader; interface Leds; } } implementation { // The following blinks led 2 uint8_t code1[] = { 0x1c, 0x00, 0x01, 0x00, 0x03, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x01, 0x00, 0x2c, 0x00, 0x08, 0x00, 0x44, 0x00, 0x09, 0x00, 0x56, 0x00, 0x0a, 0x00, 0x32, 0x00, 0x30, 0x00, 0x24, 0x00, 0x0f, 0x42, 0x12, 0xc3, 0x0f, 0x10, 0x0f, 0x11, 0x0f, 0x11, 0x5f, 0xf3, 0x32, 0xc2, 0x03, 0x43, 0x7f, 0xf3, 0x30, 0x41, 0x4f, 0x93, 0x01, 0x24, 0x32, 0xd2, 0x30, 0x41, 0x3c, 0x40, 0xf4, 0x01, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x30, 0x41, 0xb0, 0x12, 0x00, 0x00, 0x3e, 0x40, 0xe8, 0x03, 0x0f, 0x43, 0xb0, 0x12, 0x4e, 0x00, 0xf8, 0x3f, 0x30, 0x41, 0xb0, 0x12, 0x00, 0x00, 0x3e, 0x40, 0xe8, 0x03, 0x0f, 0x43, 0xb0, 0x12, 0x60, 0x00, 0xf8, 0x3f, 0x30, 0x41, 0xb0, 0x12, 0x00, 0x00, 0x3e, 0x40, 0xe8, 0x03, 0x0f, 0x43, 0xb0, 0x12, 0x00, 0x00, 0xf8, 0x3f, 0x30, 0x41 }; // The following is BaseStationForC uint8_t code2[] = { 0x1c, 0x00, 0x05, 0x00, 0x58, 0x01, 0x1e, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x26, 0x03, 0xac, 0x00, 0x26, 0x00, 0xae, 0x00, 0x88, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x01, 0x00, 0x52, 0x00, 0x02, 0x00, 0x64, 0x00, 0x01, 0x00, 0x44, 0x00, 0x08, 0x00, 0xe2, 0x00, 0x09, 0x00, 0x00, 0x02, 0x0a, 0x00, 0xdc, 0x00, 0x0b, 0x00, 0x32, 0x00, 0x0d, 0x00, 0x10, 0x03, 0x0e, 0x00, 0x98, 0x01, 0x11, 0x00, 0xd6, 0x02, 0x12, 0x00, 0xce, 0x02, 0x14, 0x00, 0x9c, 0x02, 0x16, 0x00, 0xc6, 0x02, 0x1a, 0x00, 0x94, 0x02, 0x1b, 0x00, 0xde, 0x02, 0x22, 0x00, 0x2e, 0x00, 0x24, 0x00, 0xb6, 0x00, 0x25, 0x00, 0xfa, 0x02, 0x28, 0x00, 0x84, 0x02, 0x29, 0x00, 0x7c, 0x02, 0x2b, 0x00, 0xee, 0x02, 0x2d, 0x00, 0x74, 0x02, 0x31, 0x00, 0xe6, 0x02, 0x32, 0x00, 0x8c, 0x02, 0x3f, 0x00, 0xa2, 0x00, 0x40, 0x00, 0x04, 0x01, 0x42, 0x00, 0x18, 0x01, 0x44, 0x00, 0x98, 0x00, 0x45, 0x00, 0xec, 0x00, 0x46, 0x00, 0x0e, 0x01, 0x51, 0x00, 0x8a, 0x01, 0x6d, 0x00, 0x6c, 0x01, 0x90, 0x00, 0x22, 0x00, 0xb0, 0x00, 0x3c, 0x00, 0x84, 0x01, 0x4e, 0x00, 0x92, 0x01, 0x60, 0x00, 0x0a, 0x03, 0x72, 0x00, 0x18, 0x03, 0x84, 0x00, 0xbe, 0x00, 0xba, 0x00, 0x28, 0x01, 0xf4, 0x00, 0x00, 0x00, 0x46, 0x01, 0xa0, 0x01, 0x9c, 0x01, 0x18, 0x02, 0xbc, 0x01, 0xb8, 0x02, 0xfc, 0x01, 0x66, 0x02, 0x08, 0x02, 0x0f, 0x42, 0x12, 0xc3, 0x0f, 0x10, 0x0f, 0x11, 0x0f, 0x11, 0x5f, 0xf3, 0x32, 0xc2, 0x03, 0x43, 0x7f, 0xf3, 0x30, 0x41, 0x4f, 0x93, 0x01, 0x24, 0x32, 0xd2, 0x30, 0x41, 0x3f, 0x40, 0x40, 0x00, 0xb0, 0x12, 0x2a, 0x00, 0x3f, 0x40, 0x76, 0x00, 0xb0, 0x12, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0xb2, 0x00, 0xb0, 0x12, 0x56, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x68, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x7a, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0x0c, 0x03, 0xb0, 0x12, 0x8c, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x30, 0x41, 0x0b, 0x12, 0x0b, 0x4f, 0x2f, 0x52, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12, 0x00, 0x00, 0xcb, 0x43, 0xaa, 0x00, 0xcb, 0x43, 0xab, 0x00, 0x3b, 0x41, 0x30, 0x41, 0x3e, 0x40, 0x86, 0x01, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x8e, 0x01, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x31, 0x80, 0x34, 0x00, 0x09, 0x4f, 0x0b, 0x4e, 0x7c, 0x43, 0x0d, 0x43, 0x0e, 0x43, 0x0f, 0x41, 0x89, 0x12, 0x4f, 0x93, 0x03, 0x24, 0xb0, 0x12, 0x00, 0x00, 0xf6, 0x3f, 0xb0, 0x12, 0x00, 0x00, 0x0a, 0x4b, 0x2a, 0x52, 0x0f, 0x4a, 0xb0, 0x12, 0xb6, 0x01, 0x0e, 0x41, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x5f, 0x93, 0x07, 0x20, 0x0e, 0x4a, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12, 0xcc, 0x01, 0xf3, 0x3f, 0x0f, 0x4b, 0x2f, 0x52, 0xb0, 0x12, 0xe6, 0x01, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12, 0xf0, 0x01, 0xd8, 0x3f, 0x31, 0x50, 0x34, 0x00, 0x39, 0x41, 0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x09, 0x4f, 0x0d, 0x4e, 0xff, 0x90, 0x03, 0x00, 0xaa, 0x00, 0x20, 0x2c, 0x5f, 0x4f, 0xab, 0x00, 0x0a, 0x4f, 0x3c, 0x40, 0x34, 0x00, 0xb0, 0x12, 0x48, 0x02, 0x0e, 0x59, 0x3e, 0x50, 0x0e, 0x00, 0x0f, 0x4d, 0x3d, 0x40, 0x34, 0x00, 0xfe, 0x4f, 0x00, 0x00, 0x1e, 0x53, 0x1d, 0x83, 0xfb, 0x23, 0x5f, 0x49, 0xab, 0x00, 0x1f, 0x53, 0x0c, 0x4f, 0x3a, 0x40, 0x03, 0x00, 0xb0, 0x12, 0x3e, 0x02, 0xc9, 0x4e, 0xab, 0x00, 0xd9, 0x53, 0xaa, 0x00, 0x0f, 0x43, 0x01, 0x3c, 0x1f, 0x43, 0x39, 0x41, 0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x3e, 0x40, 0x94, 0x01, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x14, 0x03, 0x30, 0x41, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0xf4, 0x01, 0xb0, 0x12, 0x22, 0x03, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x31, 0x80, 0x34, 0x00, 0x09, 0x4f, 0x0b, 0x4e, 0x0a, 0x4b, 0x2a, 0x52, 0x0f, 0x4a, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x93, 0x07, 0x20, 0x0e, 0x4a, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12, 0x00, 0x00, 0xf4, 0x3f, 0x0d, 0x41, 0x3e, 0x40, 0x34, 0x00, 0xfd, 0x4f, 0x00, 0x00, 0x1d, 0x53, 0x1e, 0x83, 0xfb, 0x23, 0x0f, 0x4b, 0x2f, 0x52, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x39, 0x90, 0xa8, 0x02, 0x06, 0x24, 0x0f, 0x41, 0xb0, 0x12, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0xd5, 0x3f, 0x0f, 0x41, 0xb0, 0x12, 0x00, 0x00, 0xf9, 0x3f, 0x31, 0x50, 0x34, 0x00, 0x39, 0x41, 0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x08, 0x12, 0x09, 0x4f, 0x58, 0x4f, 0xaa, 0x00, 0x48, 0x93, 0x18, 0x24, 0x5f, 0x4f, 0xab, 0x00, 0x4e, 0x48, 0x0f, 0x8e, 0x3f, 0x50, 0x03, 0x00, 0x0c, 0x4f, 0x3a, 0x40, 0x03, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x0a, 0x4e, 0x3c, 0x40, 0x34, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x4e, 0x0f, 0x59, 0x78, 0x53, 0xc9, 0x48, 0xaa, 0x00, 0x3f, 0x50, 0x0e, 0x00, 0x01, 0x3c, 0x0f, 0x43, 0x38, 0x41, 0x39, 0x41, 0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x08, 0x12, 0x07, 0x12, 0x0b, 0x4f, 0xb0, 0x12, 0x00, 0x00, 0x47, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x09, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x08, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x4a, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x0e, 0x49, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x4c, 0x47, 0x4d, 0x4a, 0x0e, 0x4b, 0x0f, 0x48, 0xb0, 0x12, 0x00, 0x00, 0x7f, 0xf3, 0x37, 0x41, 0x38, 0x41, 0x39, 0x41, 0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x08, 0x12, 0x07, 0x12, 0x0b, 0x4f, 0xb0, 0x12, 0x00, 0x00, 0x47, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x09, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x08, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x4a, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x0e, 0x49, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x4c, 0x47, 0x4d, 0x4a, 0x0e, 0x4b, 0x0f, 0x48, 0xb0, 0x12, 0x1e, 0x03, 0x7f, 0xf3, 0x37, 0x41, 0x38, 0x41, 0x39, 0x41, 0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x3e, 0x40, 0x1a, 0x03, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x30, 0x41, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x30, 0x41 }; task void loadCode1() { call DynamicLoader.loadFromMemory(code1); } task void loadCode2() { call DynamicLoader.loadFromMemory(code2); } event void DynamicLoader.loadFromMemoryDone(void *addr, tosthread_t id, error_t error) { if (addr == code1) { post loadCode2(); } } event void Boot.booted() { post loadCode1(); } event void DynamicLoader.loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error) {} } tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/LoadFromRAM/Makefile000066400000000000000000000007611207233610700241160ustar00rootroot00000000000000COMPONENT=LoadFromRAMAppC GOALS += threads THREADS_DIR ?= $(TOSDIR)/lib/tosthreads CFLAGS += -I$(THREADS_DIR)/lib/tinyld CFLAGS += -I$(THREADS_DIR)/csystem CFLAGS += -I$(THREADS_DIR)/sensorboards/tmote_onboard CFLAGS += -I$(THREADS_DIR)/sensorboards/universal CFLAGS += -I$(THREADS_DIR)/lib/net/ctp CFLAGS += -I$(THREADS_DIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net/ctp CFLAGS += -I$(TOSDIR)/lib/net/4bitle CFLAGS += -I$(THREADS_DIR)/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/LoadFromRAM/README000066400000000000000000000011371207233610700233340ustar00rootroot00000000000000README for LoadFromRAM Author/Contact: Chieh-Jan Mike Liang Description: LoadFromRAM is a simple program that dynamically loads two loadable programs hardcoded in the byte arrays; One program is Blink, and the other one is Basestation. You can install LoadFromRAM on a mote via the following command: make install If you would like to generate your own loadable program run, for example: cd ../../capps/Blink make telosb dynthreads (the output file needed is ../../capps/Blink/build/telosb/dynthreads/main.tos) Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/LoadFromRAM/volumes-at45db.xml000066400000000000000000000001451207233610700257470ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/LoadFromRAM/volumes-stm25p.xml000077500000000000000000000001321207233610700260150ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/Makefile000066400000000000000000000030521207233610700220470ustar00rootroot00000000000000#-*-makefile-*- ###################################################################### # # Makes the entire suite of TinyOS applications for a given platform. # # Author: Martin Turon # Date: August 18, 2005 # ###################################################################### # $Id: Makefile,v 1.1 2009-12-23 18:08:47 klueska Exp $ # MAKECMDGOALS is the way to get the arguments passed into a Makefile ... TARGET=$(MAKECMDGOALS) NESDOC_TARGET=$(filter-out nesdoc,$(TARGET)) # Here is a way to get the list of subdirectories in a Makefile ... ROOT=. SUBDIRS := $(shell find * -type d) # Okay, match any target, and recurse the subdirectories %: @for i in $(SUBDIRS); do \ HERE=$$PWD; \ if [ -f $$i/Makefile ]; then \ echo Building ... $(PWD)/$$i; \ echo make $(TARGET); \ cd $$i; \ $(MAKE) $(TARGET); \ cd $$HERE; \ fi; \ done threads: @: cthreads: @: dynthreads: @: BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' ) # The output directory for generated documentation DOCDIR = $(BASEDIR)/doc/nesdoc nesdoc: @echo This target rebuilds documentation for all known platforms. @echo It DOES NOT overwrite any existing documentation, thus, it @echo is best run after deleting all old documentation. @echo @echo To delete all old documentation, delete the contents of the @echo $(DOCDIR) directory. @echo @echo Press Enter to continue, or ^C to abort. @read for platform in `ncc -print-platforms`; do \ $(MAKE) $$platform docs.nohtml.preserve; \ nesdoc -o $(DOCDIR) -html -target=$$platform; \ done tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoader/000077500000000000000000000000001207233610700227555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoader/Makefile000077500000000000000000000012101207233610700244120ustar00rootroot00000000000000COMPONENT=SerialLoaderAppC GOALS += threads THREADS_DIR ?= $(TOSDIR)/lib/tosthreads CFLAGS += -I$(THREADS_DIR)/lib/tinyld CFLAGS += -I$(THREADS_DIR)/csystem CFLAGS += -I$(THREADS_DIR)/sensorboards/tmote_onboard CFLAGS += -I$(THREADS_DIR)/sensorboards/universal CFLAGS += -I$(THREADS_DIR)/lib/net/ctp CFLAGS += -I$(THREADS_DIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net/ctp CFLAGS += -I$(TOSDIR)/lib/net/4bitle CFLAGS += -I$(THREADS_DIR)/lib/printf ifdef TENET CFLAGS += -DTOSTHREAD_TENET=1 endif CFLAGS += -DDISABLE_LOADER_FLASH=1 CFLAGS += -DDISABLE_LOADER_USERBUTTON=1 CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoader/README000066400000000000000000000014551207233610700236420ustar00rootroot00000000000000README for SerialLoader Author/Contact: Chieh-Jan Mike Liang Description: SerialLoader receives loadable programs from the serial port and stores it in a byte array. Then, when it receives the command to load the code, it makes the call to the dynamic loader. Here are the steps: 1.) Load SerialLoader: make telosb install bsl, 2.) Create the loadable code, main.tos: cd ../../capps/Blink make telosb dynthreads (the output file needed is ../../capps/Blink/build/telosb/dynthreads/main.tos) 3.) Clear the byte array in the mote RAM buffer: ./serialloader.py 0 4.) Upload the binary: ./serialloader.py 1 main.tos 5.) Run the binary: ./serialloader.py 7 Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoader/SerialLoader.h000077500000000000000000000042701207233610700255020ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #ifndef SERIALLOADER_H #define SERIALLOADER_H #define MAX_BIN_SIZE 2000 #define SERIALMSG_ERASE 0 #define SERIALMSG_WRITE 1 #define SERIALMSG_READ 2 #define SERIALMSG_CRC 3 #define SERIALMSG_LEDS 5 #define SERIALMSG_RUN 7 typedef nx_struct SerialReqPacket { nx_uint8_t msg_type; nx_uint8_t pad; nx_uint16_t offset; nx_uint16_t len; nx_uint8_t data[0]; } SerialReqPacket; #define SERIALMSG_SUCCESS 0 #define SERIALMSG_FAIL 1 typedef nx_struct SerialReplyPacket { nx_uint8_t error; nx_uint8_t pad; nx_uint8_t data[0]; } SerialReplyPacket; #endif tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoader/SerialLoaderAppC.nc000077500000000000000000000047671207233610700264320ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SerialLoader receives loadable programs from the serial port and stores * it in a byte array. Then, when it receives the command to load the code, * it makes the call to the dynamic loader. * * @author Chieh-Jan Mike Liang * @author Jeongyeup Paek */ #include "AM.h" #include "SerialLoader.h" configuration SerialLoaderAppC {} implementation { components MainC, SerialActiveMessageC, new SerialAMSenderC(0xAB), new SerialAMReceiverC(0xAB), SerialLoaderP, BigCrcC, LedsC; SerialLoaderP.Boot -> MainC; SerialLoaderP.SerialSplitControl -> SerialActiveMessageC; SerialLoaderP.SerialAMSender -> SerialAMSenderC; SerialLoaderP.SerialAMReceiver -> SerialAMReceiverC; SerialLoaderP.Leds -> LedsC; SerialLoaderP.BigCrc -> BigCrcC; components DynamicLoaderC; SerialLoaderP.DynamicLoader -> DynamicLoaderC; } tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoader/SerialLoaderP.nc000077500000000000000000000131201207233610700257650ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SerialLoader receives loadable programs from the serial port and stores * it in a byte array. Then, when it receives the command to load the code, * it makes the call to the dynamic loader. * * @author Chieh-Jan Mike Liang * @author Jeongyeup Paek **/ #include "SerialLoader.h" module SerialLoaderP { uses { interface Boot; interface SplitControl as SerialSplitControl; interface AMSend as SerialAMSender; interface Receive as SerialAMReceiver; interface Leds; interface DynamicLoader; interface BigCrc; } } implementation { message_t serialMsg; uint32_t dumpAddr = 0; uint8_t image[MAX_BIN_SIZE]; event void Boot.booted() { call SerialSplitControl.start(); } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { call SerialSplitControl.start(); } } event void SerialSplitControl.stopDone(error_t error) {} void sendReply(error_t error, uint8_t len) { SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); if (error == SUCCESS) { srpkt->error = SERIALMSG_SUCCESS; } else { srpkt->error = SERIALMSG_FAIL; } call SerialAMSender.send(AM_BROADCAST_ADDR, &serialMsg, len); } event void SerialAMSender.sendDone(message_t* msg, error_t error) {} error_t write_image(uint16_t offset, void *data, uint16_t len) { if ((offset + len > MAX_BIN_SIZE) || (data == NULL)) return FAIL; memcpy(&image[offset], data, len); return SUCCESS; } error_t read_image(uint16_t offset, void *readbuf, uint16_t len) { if ((offset + len > MAX_BIN_SIZE) || (readbuf == NULL)) return FAIL; memcpy(readbuf, &image[offset], len); return SUCCESS; } event void DynamicLoader.loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error) {} event void DynamicLoader.loadFromMemoryDone(void *addr, tosthread_t id, error_t error) { sendReply(error, sizeof(SerialReplyPacket)); } event void BigCrc.computeCrcDone(void* buf, uint16_t len, uint16_t crc, error_t error) { SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); srpkt->data[1] = crc & 0xFF; srpkt->data[0] = (crc >> 8) & 0xFF; sendReply(SUCCESS, 2 + sizeof(SerialReplyPacket)); } void sendCrcReply(uint16_t offset, uint16_t len) { call BigCrc.computeCrc(&(image[offset]), len); } event message_t* SerialAMReceiver.receive(message_t* msg, void* payload, uint8_t len) { uint16_t i; error_t error = FAIL; SerialReqPacket *srpkt = (SerialReqPacket *)payload; SerialReplyPacket *serialMsg_payload = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); switch (srpkt->msg_type) { case SERIALMSG_ERASE : for (i = 0; i < MAX_BIN_SIZE; i++) { image[i] = 0; } call Leds.set(7); for (i = 0; i < 2000; i++) {} call Leds.set(0); sendReply(SUCCESS, sizeof(SerialReplyPacket)); break; case SERIALMSG_RUN : error = call DynamicLoader.loadFromMemory(image); if (error != SUCCESS) sendReply(error, sizeof(SerialReplyPacket)); break; case SERIALMSG_WRITE : error = write_image(srpkt->offset, srpkt->data, srpkt->len); if (error != SUCCESS) call Leds.led0On(); sendReply(error, sizeof(SerialReplyPacket)); break; case SERIALMSG_READ : error = read_image(srpkt->offset, serialMsg_payload->data, srpkt->len); if (error != SUCCESS) sendReply(error, sizeof(SerialReplyPacket)); else sendReply(error, len + sizeof(SerialReplyPacket)); break; case SERIALMSG_LEDS: call Leds.set(7); for (i = 0; i < 2000; i++) {} call Leds.set(0); break; case SERIALMSG_CRC : sendCrcReply(srpkt->offset, srpkt->len); break; } return msg; } } tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoader/serialloader.py000077500000000000000000000206431207233610700260050ustar00rootroot00000000000000#!/usr/bin/env python # Copyright (c) 2008 Johns Hopkins University. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # @author Chieh-Jan Mike Liang import sys, os, stat, struct import tinyos SERIAL_BAUDRATE = 57600 SERIALMSG_AMGROUP = 0 SERIALMSG_AMID = 0xAB SERIALMSG_ERASE = 0 SERIALMSG_WRITE = 1 SERIALMSG_READ = 2 SERIALMSG_CRC = 3 SERIALMSG_LEDS = 5 SERIALMSG_RUN = 7 SERIALMSG_SUCCESS = 0 SERIALMSG_FAIL = 1 SERIALMSG_DATA_PAYLOAD_SIZE = 20 MAX_BIN_SIZE = 2000 HEX_OUTPUT_LINE_SIZE = 16 class SerialReqPacket(tinyos.GenericPacket): def __init__(self, packet = None): tinyos.GenericPacket.__init__(self, [('msg_type', 'int', 1), ('pad', 'int', 1), ('offset', 'int', 2), ('len', 'int', 2), ('data', 'blob', None)], packet) class SerialReplyPacket(tinyos.GenericPacket): def __init__(self, packet = None): tinyos.GenericPacket.__init__(self, [('error', 'int', 1), ('pad', 'int', 1), ('data', 'blob', None)], packet) # Display an integer representation of byte stream to hex representation def print_hex(start_addr, byte_stream): byte_stream = ["%02x" % one_byte for one_byte in byte_stream] # Converts to each byte to hex num_iterations = int( (len(byte_stream) - 1) / HEX_OUTPUT_LINE_SIZE ) num_iterations += 1 for i in range(num_iterations): line = "%07x" % start_addr + " " # Prints memory address for j in range(HEX_OUTPUT_LINE_SIZE): if (i * HEX_OUTPUT_LINE_SIZE + j) < len(byte_stream): line += byte_stream[i * HEX_OUTPUT_LINE_SIZE + j] + " " print line start_addr += HEX_OUTPUT_LINE_SIZE def op_run(s, sreqpkt): success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) if success == True: packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) return (sreplypkt.error == SERIALMSG_SUCCESS) def op_erase(s, sreqpkt): success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) if success == True: packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) return (sreplypkt.error == SERIALMSG_SUCCESS) def op_print(s, sreqpkt, offset, length): if (offset + length) <= DELUGE_VOLUME_SIZE: while length > 0: sreqpkt.offset = offset # Calculates the payload size for the reply packet if length >= HEX_OUTPUT_LINE_SIZE: sreqpkt.len = HEX_OUTPUT_LINE_SIZE else: sreqpkt.len = length success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) if success == True: packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) if sreplypkt.error != SERIALMSG_SUCCESS: return False print_hex(offset, sreplypkt.data) length -= sreqpkt.len offset += sreqpkt.len else: print "ERROR: Specified offset and length are too large for the flash volume" return False return True def op_write(s, sreqpkt, input_file, length): local_crc = 0 input_file_size = length sreqpkt.offset = 0 while length > 0: # Calculates the payload size for the current packet if length >= SERIALMSG_DATA_PAYLOAD_SIZE: sreqpkt.len = SERIALMSG_DATA_PAYLOAD_SIZE else: sreqpkt.len = length sreqpkt.data = [] # Reads in the file we want to transmit for i in range(sreqpkt.len): sreqpkt.data.append(struct.unpack("B", input_file.read(1))[0]) # Sends over serial to the mote if s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) == True: # Waiting for confirmation packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) if sreplypkt.error != SERIALMSG_SUCCESS: print "ERROR: !SUCCESS" return False local_crc = s.crc16(local_crc, sreqpkt.data) # Computes running CRC else: print "ERROR: Unable to write to flash" return False length -= sreqpkt.len sreqpkt.offset += sreqpkt.len # Check local and remote CRC sreqpkt.msg_type = SERIALMSG_CRC remote_crc = op_crc(s, sreqpkt, 0, input_file_size) if remote_crc != None: local_crc = [(local_crc >> 8) & 0xFF, local_crc & 0xFF] print "Local CRC: " + ("%02x" % local_crc[0]) + " " + ("%02x" % local_crc[1]) print "Remote CRC: " + ("%02x" % remote_crc[0]) + " " + ("%02x" % remote_crc[1]) if remote_crc != local_crc: print "ERROR: Remote CRC doesn't match local CRC" return False else: print "ERROR: Unable to verify CRC" return False return True def op_crc(s, sreqpkt, offset, length): sreqpkt.offset = offset sreqpkt.len = length success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) if success == True: packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) if sreplypkt.error == SERIALMSG_SUCCESS: return sreplypkt.data else: return None def op_leds(s, sreqpkt): success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) # ======== MAIN ======== # if len(sys.argv) >= 3: sys.argv[2] = int(sys.argv[2]) s = tinyos.Serial(sys.argv[1], SERIAL_BAUDRATE) s.set_debug(False) # Disables debug msg sreqpkt = SerialReqPacket((sys.argv[2], 0, 0, 0, [])) # msg_type, pad, offset, length, data if sys.argv[2] == SERIALMSG_RUN: if op_run(s, sreqpkt) == True: print "Loaded image should be running now!" else: print "ERROR: Unable to run loaded image" elif sys.argv[2] == SERIALMSG_ERASE: if op_erase(s, sreqpkt) == True: print "Flash volume has been erased" else: print "ERROR: Unable to erase flash volume" elif sys.argv[2] == SERIALMSG_WRITE: input_file = file(sys.argv[3], 'rb') fileStats = os.stat(sys.argv[3]) if fileStats[stat.ST_SIZE] <= MAX_BIN_SIZE: #sreqpkt = SerialReqPacket((SERIALMSG_LEDS, 0, 0, 0, [])) #op_leds(s, sreqpkt) sreqpkt = SerialReqPacket((sys.argv[2], 0, 0, 0, [])) if op_write(s, sreqpkt, input_file, fileStats[stat.ST_SIZE]) == True: print "File has been successfully transmitted (" + str(fileStats[stat.ST_SIZE]) + " bytes)" else: print "ERROR: Unable to transmit file" sreqpkt = SerialReqPacket((SERIALMSG_LEDS, 0, 0, 0, [])) op_leds(s, sreqpkt) else: print "ERROR: File is larger than max buffer size (" + str(MAX_BIN_SIZE) + ")" elif sys.argv[2] == SERIALMSG_READ: data = op_print(s, sreqpkt, int(sys.argv[3]), int(sys.argv[4])) if data != True: print "ERROR: Unable to read the specified range" elif sys.argv[2] == SERIALMSG_CRC: remote_crc = op_crc(s, sreqpkt, int(sys.argv[3]), int(sys.argv[4])) if remote_crc != None: print_hex(0, remote_crc) else: print "ERROR: Unable to compute remote CRC" tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoader/tinyos.py000077500000000000000000000142411207233610700246610ustar00rootroot00000000000000import struct, time, serial class Serial: HDLC_FLAG_BYTE = 0x7e HDLC_CTLESC_BYTE = 0x7d TOS_SERIAL_ACTIVE_MESSAGE_ID = 0 TOS_SERIAL_CC1000_ID = 1 TOS_SERIAL_802_15_4_ID = 2 TOS_SERIAL_UNKNOWN_ID = 255 SERIAL_PROTO_ACK = 67 SERIAL_PROTO_PACKET_ACK = 68 SERIAL_PROTO_PACKET_NOACK = 69 SERIAL_PROTO_PACKET_UNKNOWN = 255 __s = None; # An instance of serial.Serial object __debug = True # Debug mode def __init__(self, port, baudrate): self.__s = serial.Serial(port, baudrate, rtscts=0) def __format_packet(self, packet): return " ".join(["%02x" % p for p in packet]) + " | " + \ " ".join(["%d" % p for p in packet]) def crc16(self, base_crc, frame_data): crc = base_crc for b in frame_data: crc = crc ^ (b << 8) for i in range(0, 8): if crc & 0x8000 == 0x8000: crc = (crc << 1) ^ 0x1021 else: crc = crc << 1 crc = crc & 0xffff return crc def __encode(self, val, dim): output = [] for i in range(dim): output.append(val & 0xFF) val = val >> 8 return output def __decode(self, v): r = long(0) for i in v[::-1]: r = (r << 8) + i return r def __get_byte(self): r = struct.unpack("B", self.__s.read())[0] return r def __put_bytes(self, data): for b in data: self.__s.write(struct.pack('B', b)) def __unescape(self, packet): r = [] esc = False for b in packet: if esc: r.append(b ^ 0x20) esc = False elif b == self.HDLC_CTLESC_BYTE: esc = True else: r.append(b) return r def __escape(self, packet): r = [] for b in packet: if b == self.HDLC_FLAG_BYTE or b == self.HDLC_CTLESC_BYTE: r.append(self.HDLC_CTLESC_BYTE) r.append(b ^ 0x20) else: r.append(b) return r def read_packet(self): d = self.__get_byte() ts = time.time() while d != self.HDLC_FLAG_BYTE: d = self.__get_byte() ts = time.time() packet = [d] d = self.__get_byte() if d == self.HDLC_FLAG_BYTE: d = self.__get_byte() ts = time.time() else: packet.append(d) while d != self.HDLC_FLAG_BYTE: d = self.__get_byte() packet.append(d) un_packet = self.__unescape(packet) crc = self.crc16(0, un_packet[1:-3]) packet_crc = self.__decode(un_packet[-3:-1]) if crc != packet_crc: print "Warning: wrong CRC!" if self.__debug == True: print "Recv:", self.__format_packet(un_packet) return (ts, un_packet) def write_packet(self, am_group, am_id, data): # The first byte after SERIAL_PROTO_PACKET_ACK is a sequence # number that will be send back by the mote to ack the receive of # the data. packet = [self.SERIAL_PROTO_PACKET_ACK, 0, self.TOS_SERIAL_ACTIVE_MESSAGE_ID, 0xff, 0xff, 0, 0, len(data), am_group, am_id] + data; crc = self.crc16(0, packet) packet.append(crc & 0xff) packet.append((crc >> 8) & 0xff) packet = [self.HDLC_FLAG_BYTE] + self.__escape(packet) + [self.HDLC_FLAG_BYTE] if self.__debug == True: print "Send:", self.__format_packet(packet) self.__put_bytes(packet) # Waiting for ACK packet = self.read_packet() if len(packet) > 1 and len(packet[1]) > 1: return ((packet[1])[1] == self.SERIAL_PROTO_ACK) return False def set_debug(self, debug): self.__debug = debug class GenericPacket: """ GenericPacket """ def __decode(self, v): r = long(0) for i in v: r = (r << 8) + i return r def __encode(self, val, dim): output = [] for i in range(dim): output.append(int(val & 0xFF)) val = val >> 8 output.reverse() return output def __init__(self, desc, packet = None): self.__dict__['_schema'] = [(t, s) for (n, t, s) in desc] self.__dict__['_names'] = [n for (n, t, s) in desc] self.__dict__['_values'] = [] offset = 10 if type(packet) == type([]): for (t, s) in self._schema: if t == 'int': self._values.append(self.__decode(packet[offset:offset + s])) offset += s elif t == 'blob': if s: self._values.append(packet[offset:offset + s]) offset += s else: self._values.append(packet[offset:-3]) elif type(packet) == type(()): for i in packet: self._values.append(i) else: for v in self._schema: self._values.append(None) def __repr__(self): return self._values.__repr__() def __str__(self): return self._values.__str__() # Implement the map behavior def __getitem__(self, key): return self.__getattr__(key) def __setitem__(self, key, value): self.__setattr__(key, value) def __len__(self): return len(self._values) def keys(self): return self._names def values(self): return self._names # Implement the struct behavior def __getattr__(self, name): if type(name) == type(0): return self._names[name] else: return self._values[self._names.index(name)] def __setattr__(self, name, value): if type(name) == type(0): self._values[name] = value else: self._values[self._names.index(name)] = value # Custom def names(self): return self._names def sizes(self): return self._schema def payload(self): r = [] for i in range(len(self._schema)): (t, s) = self._schema[i] if t == 'int': r += self.__encode(self._values[i], s) else: r += self._values[i] return r tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/000077500000000000000000000000001207233610700237335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManager.h000077500000000000000000000043031207233610700276270ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #ifndef FLASHVOLUMEMANAGER_H #define FLASHVOLUMEMANAGER_H #define SERIALMSG_ERASE 0 #define SERIALMSG_WRITE 1 #define SERIALMSG_READ 2 #define SERIALMSG_CRC 3 //#define SERIALMSG_ADDR 4 #define SERIALMSG_LEDS 5 #define SERIALMSG_RUN 7 typedef nx_struct SerialReqPacket { nx_uint8_t msg_type; nx_uint8_t pad; nx_uint16_t offset; nx_uint16_t len; nx_uint8_t data[0]; } SerialReqPacket; #define SERIALMSG_SUCCESS 0 #define SERIALMSG_FAIL 1 typedef nx_struct SerialReplyPacket { nx_uint8_t error; nx_uint8_t pad; nx_uint8_t data[0]; } SerialReplyPacket; #endif tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManagerC.nc000077500000000000000000000052211207233610700301030ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SerialLoaderFlash is similar to SerialLoader in that it receives * loadable programs from the serial port. However, SerialLoaderFlash * stores them on the external flash. Then, when it receives the command to * load the code, it makes the call to the dynamic loader. * * @author Chieh-Jan Mike Liang */ #include "AM.h" generic configuration FlashVolumeManagerC(am_id_t AMId) { uses { interface BlockRead; interface BlockWrite; interface DynamicLoader; } } implementation { components MainC, SerialActiveMessageC, new SerialAMSenderC(AMId), new SerialAMReceiverC(AMId), new FlashVolumeManagerP(), NoLedsC, LedsC; DynamicLoader = FlashVolumeManagerP; BlockRead = FlashVolumeManagerP; BlockWrite = FlashVolumeManagerP; FlashVolumeManagerP.Boot -> MainC; FlashVolumeManagerP.SerialSplitControl -> SerialActiveMessageC; FlashVolumeManagerP.SerialAMSender -> SerialAMSenderC; FlashVolumeManagerP.SerialAMReceiver -> SerialAMReceiverC; FlashVolumeManagerP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManagerP.nc000077500000000000000000000135131207233610700301230ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SerialLoaderFlash is similar to SerialLoader in that it receives * loadable programs from the serial port. However, SerialLoaderFlash * stores them on the external flash. Then, when it receives the command to * load the code, it makes the call to the dynamic loader. * * @author Chieh-Jan Mike Liang */ #include "FlashVolumeManager.h" #include "StorageVolumes.h" generic module FlashVolumeManagerP() { uses { interface Boot; interface SplitControl as SerialSplitControl; interface BlockRead; interface BlockWrite; interface AMSend as SerialAMSender; interface Receive as SerialAMReceiver; interface Leds; interface DynamicLoader; } } implementation { message_t serialMsg; storage_addr_t dumpAddr = 0; event void Boot.booted() { while (call SerialSplitControl.start() != SUCCESS); } event void SerialSplitControl.startDone(error_t error) { if (error != SUCCESS) { while (call SerialSplitControl.start() != SUCCESS); } } void sendReply(error_t error, storage_len_t len) { SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); if (error == SUCCESS) { srpkt->error = SERIALMSG_SUCCESS; } else { srpkt->error = SERIALMSG_FAIL; } call SerialAMSender.send(AM_BROADCAST_ADDR, &serialMsg, len); } event void BlockRead.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error) { sendReply(error, len + sizeof(SerialReplyPacket)); } event void BlockRead.computeCrcDone(storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { if (error == SUCCESS) { SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); srpkt->data[1] = crc & 0xFF; srpkt->data[0] = (crc >> 8) & 0xFF; } sendReply(error, 2 + sizeof(SerialReplyPacket)); } event void BlockWrite.writeDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error) { if (error != SUCCESS) { call Leds.led1On(); } sendReply(error, sizeof(SerialReplyPacket)); } event void BlockWrite.eraseDone(error_t error) { sendReply(error, sizeof(SerialReplyPacket)); } event message_t* SerialAMReceiver.receive(message_t* msg, void* payload, uint8_t len) { uint16_t i; error_t error = SUCCESS; SerialReqPacket *srpkt = (SerialReqPacket *)payload; SerialReplyPacket *serialMsg_payload = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); switch (srpkt->msg_type) { case SERIALMSG_ERASE : error = call BlockWrite.erase(); if (error != SUCCESS) { sendReply(error, sizeof(SerialReplyPacket)); } break; case SERIALMSG_WRITE : call Leds.led2On(); error = call BlockWrite.write(srpkt->offset, srpkt->data, srpkt->len); if (error != SUCCESS) { sendReply(error, sizeof(SerialReplyPacket)); call Leds.led0On(); } break; case SERIALMSG_READ : error = call BlockRead.read(srpkt->offset, serialMsg_payload->data, srpkt->len); if (error != SUCCESS) { sendReply(error, sizeof(SerialReplyPacket)); } break; case SERIALMSG_CRC : error = call BlockRead.computeCrc(srpkt->offset, srpkt->len, 0); if (error != SUCCESS) { sendReply(error, sizeof(SerialReplyPacket)); } break; case SERIALMSG_LEDS: call Leds.set(7); for (i = 0; i < 2000; i++) {} call Leds.set(0); break; case SERIALMSG_RUN : error = call DynamicLoader.loadFromFlash(VOLUME_MICROEXEIMAGE); if (error != SUCCESS) sendReply(error, sizeof(SerialReplyPacket)); break; } return msg; } event void DynamicLoader.loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error) { sendReply(error, sizeof(SerialReplyPacket)); } event void DynamicLoader.loadFromMemoryDone(void *addr, tosthread_t id, error_t error) {} event void BlockWrite.syncDone(error_t error) {} event void SerialAMSender.sendDone(message_t* msg, error_t error) {} event void SerialSplitControl.stopDone(error_t error) {} } tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/Makefile000077500000000000000000000011031207233610700253710ustar00rootroot00000000000000COMPONENT=SerialLoaderFlashAppC GOALS += threads THREADS_DIR ?= $(TOSDIR)/lib/tosthreads CFLAGS += -I$(THREADS_DIR)/lib/tinyld CFLAGS += -I$(THREADS_DIR)/csystem CFLAGS += -I$(THREADS_DIR)/sensorboards/tmote_onboard CFLAGS += -I$(THREADS_DIR)/sensorboards/universal CFLAGS += -I$(THREADS_DIR)/lib/net/ctp CFLAGS += -I$(THREADS_DIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net/ctp CFLAGS += -I$(TOSDIR)/lib/net/4bitle CFLAGS += -I$(THREADS_DIR)/lib/printf # Creates VolumeMapC.nc VOLUME_ALLOCATOR_FLAGS += -t CLEAN_EXTRA += *.pyc include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/README000077500000000000000000000015521207233610700246210ustar00rootroot00000000000000README for SerialLoaderFlash Author/Contact: Chieh-Jan Mike Liang Description: SerialLoaderFlash is similar to SerialLoader in that it receives loadable programs from the serial port. However, SerialLoaderFlash stores them on the external flash. Then, when it receives the command to load the code, it makes the call to the dynamic loader. Here are the steps: 1.) Load SerialLoader: make telosb install bsl, 2.) Create the loadable code, main.tos: cd ../../capps/Blink make telosb dynthreads (the output file needed is ../../capps/Blink/build/telosb/dynthreads/main.tos) 3.) Erase the external flash: ./serialloader.py 0 4.) Upload the binary: ./serialloader.py 1 main.tos 5.) Run the binary: ./serialloader.py 7 Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/SerialLoaderFlashAppC.nc000077500000000000000000000045031207233610700303520ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SerialLoaderFlash is similar to SerialLoader in that it receives * loadable programs from the serial port. However, SerialLoaderFlash * stores them on the external flash. Then, when it receives the command to * load the code, it makes the call to the dynamic loader. * * @author Kevin Klues (klueska@cs.stanford.edu) * @author Chieh-Jan Mike Liang */ #include "StorageVolumes.h" configuration SerialLoaderFlashAppC {} implementation { components DynamicLoaderC, new FlashVolumeManagerC(0xAB), new BlockStorageC(VOLUME_MICROEXEIMAGE) as ImageVolume; FlashVolumeManagerC.BlockRead -> ImageVolume; FlashVolumeManagerC.BlockWrite -> ImageVolume; FlashVolumeManagerC.DynamicLoader -> DynamicLoaderC; } tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/serialloader.py000077500000000000000000000205551207233610700267650ustar00rootroot00000000000000#!/usr/bin/env python # Copyright (c) 2008 Johns Hopkins University. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # @author Chieh-Jan Mike Liang import sys, os, stat, struct import tinyos SERIALMSG_AMGROUP = 0 SERIALMSG_AMID = 0xAB SERIALMSG_ERASE = 0 SERIALMSG_WRITE = 1 SERIALMSG_READ = 2 SERIALMSG_CRC = 3 SERIALMSG_LEDS = 5 SERIALMSG_RUN = 7 SERIALMSG_SUCCESS = 0 SERIALMSG_FAIL = 1 SERIALMSG_DATA_PAYLOAD_SIZE = 20 DELUGE_VOLUME_SIZE = 262144 HEX_OUTPUT_LINE_SIZE = 16 class SerialReqPacket(tinyos.GenericPacket): def __init__(self, packet = None): tinyos.GenericPacket.__init__(self, [('msg_type', 'int', 1), ('pad', 'int', 1), ('offset', 'int', 2), ('len', 'int', 2), ('data', 'blob', None)], packet) class SerialReplyPacket(tinyos.GenericPacket): def __init__(self, packet = None): tinyos.GenericPacket.__init__(self, [('error', 'int', 1), ('pad', 'int', 1), ('data', 'blob', None)], packet) # Display an integer representation of byte stream to hex representation def print_hex(start_addr, byte_stream): byte_stream = ["%02x" % one_byte for one_byte in byte_stream] # Converts to each byte to hex num_iterations = int( (len(byte_stream) - 1) / HEX_OUTPUT_LINE_SIZE ) num_iterations += 1 for i in range(num_iterations): line = "%07x" % start_addr + " " # Prints memory address for j in range(HEX_OUTPUT_LINE_SIZE): if (i * HEX_OUTPUT_LINE_SIZE + j) < len(byte_stream): line += byte_stream[i * HEX_OUTPUT_LINE_SIZE + j] + " " print line start_addr += HEX_OUTPUT_LINE_SIZE def op_run(s, sreqpkt): success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) if success == True: packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) return (sreplypkt.error == SERIALMSG_SUCCESS) def op_erase(s, sreqpkt): success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) if success == True: packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) return (sreplypkt.error == SERIALMSG_SUCCESS) def op_print(s, sreqpkt, offset, length): if (offset + length) <= DELUGE_VOLUME_SIZE: while length > 0: sreqpkt.offset = offset # Calculates the payload size for the reply packet if length >= HEX_OUTPUT_LINE_SIZE: sreqpkt.len = HEX_OUTPUT_LINE_SIZE else: sreqpkt.len = length success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) if success == True: packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) if sreplypkt.error != SERIALMSG_SUCCESS: return False print_hex(offset, sreplypkt.data) length -= sreqpkt.len offset += sreqpkt.len else: print "ERROR: Specified offset and length are too large for the flash volume" return False return True def op_write(s, sreqpkt, input_file, length): local_crc = 0 input_file_size = length sreqpkt.offset = 0 while length > 0: # Calculates the payload size for the current packet if length >= SERIALMSG_DATA_PAYLOAD_SIZE: sreqpkt.len = SERIALMSG_DATA_PAYLOAD_SIZE else: sreqpkt.len = length sreqpkt.data = [] # Reads in the file we want to transmit for i in range(sreqpkt.len): sreqpkt.data.append(struct.unpack("B", input_file.read(1))[0]) # Sends over serial to the mote if s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) == True: # Waiting for confirmation packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) if sreplypkt.error != SERIALMSG_SUCCESS: return False local_crc = s.crc16(local_crc, sreqpkt.data) # Computes running CRC else: print "ERROR: Unable to write to flash" return False length -= sreqpkt.len sreqpkt.offset += sreqpkt.len # Check local and remote CRC sreqpkt.msg_type = SERIALMSG_CRC remote_crc = op_crc(s, sreqpkt, 0, input_file_size) if remote_crc != None: local_crc = [(local_crc >> 8) & 0xFF, local_crc & 0xFF] print "Local CRC: " + ("%02x" % local_crc[0]) + " " + ("%02x" % local_crc[1]) print "Remote CRC: " + ("%02x" % remote_crc[0]) + " " + ("%02x" % remote_crc[1]) if remote_crc != local_crc: print "ERROR: Remote CRC doesn't match local CRC" return False else: print "ERROR: Unable to verify CRC" return False return True def op_crc(s, sreqpkt, offset, length): sreqpkt.offset = offset sreqpkt.len = length success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) if success == True: packet = s.read_packet() sreplypkt = SerialReplyPacket(packet[1]) if sreplypkt.error == SERIALMSG_SUCCESS: return sreplypkt.data else: return None def op_leds(s, sreqpkt): success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) # ======== MAIN ======== # if len(sys.argv) >= 3: sys.argv[2] = int(sys.argv[2]) s = tinyos.Serial(sys.argv[1], 57600) s.set_debug(False) # Disables debug msg sreqpkt = SerialReqPacket((sys.argv[2], 0, 0, 0, [])) # msg_type, pad, offset, length, data if sys.argv[2] == SERIALMSG_RUN: if op_run(s, sreqpkt) == True: print "Loaded image should be running now!" else: print "ERROR: Unable to run loaded image" elif sys.argv[2] == SERIALMSG_ERASE: if op_erase(s, sreqpkt) == True: print "Flash volume has been erased" else: print "ERROR: Unable to erase flash volume" elif sys.argv[2] == SERIALMSG_WRITE: input_file = file(sys.argv[3], 'rb') fileStats = os.stat(sys.argv[3]) if fileStats[stat.ST_SIZE] <= DELUGE_VOLUME_SIZE: #sreqpkt = SerialReqPacket((SERIALMSG_LEDS, 0, 0, 0, [])) #op_leds(s, sreqpkt) sreqpkt = SerialReqPacket((sys.argv[2], 0, 0, 0, [])) if op_write(s, sreqpkt, input_file, fileStats[stat.ST_SIZE]) == True: print "File has been successfully transmitted (" + str(fileStats[stat.ST_SIZE]) + " bytes)" else: print "ERROR: Unable to transmit file" sreqpkt = SerialReqPacket((SERIALMSG_LEDS, 0, 0, 0, [])) op_leds(s, sreqpkt) else: print "ERROR: File is larger than flash volume (" + DELUGE_VOLUME_SIZE + ")" elif sys.argv[2] == SERIALMSG_READ: data = op_print(s, sreqpkt, int(sys.argv[3]), int(sys.argv[4])) if data != True: print "ERROR: Unable to read the specified range" elif sys.argv[2] == SERIALMSG_CRC: remote_crc = op_crc(s, sreqpkt, int(sys.argv[3]), int(sys.argv[4])) if remote_crc != None: print_hex(0, remote_crc) else: print "ERROR: Unable to compute remote CRC" tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/tinyos.py000077500000000000000000000142411207233610700256370ustar00rootroot00000000000000import struct, time, serial class Serial: HDLC_FLAG_BYTE = 0x7e HDLC_CTLESC_BYTE = 0x7d TOS_SERIAL_ACTIVE_MESSAGE_ID = 0 TOS_SERIAL_CC1000_ID = 1 TOS_SERIAL_802_15_4_ID = 2 TOS_SERIAL_UNKNOWN_ID = 255 SERIAL_PROTO_ACK = 67 SERIAL_PROTO_PACKET_ACK = 68 SERIAL_PROTO_PACKET_NOACK = 69 SERIAL_PROTO_PACKET_UNKNOWN = 255 __s = None; # An instance of serial.Serial object __debug = True # Debug mode def __init__(self, port, baudrate): self.__s = serial.Serial(port, baudrate, rtscts=0) def __format_packet(self, packet): return " ".join(["%02x" % p for p in packet]) + " | " + \ " ".join(["%d" % p for p in packet]) def crc16(self, base_crc, frame_data): crc = base_crc for b in frame_data: crc = crc ^ (b << 8) for i in range(0, 8): if crc & 0x8000 == 0x8000: crc = (crc << 1) ^ 0x1021 else: crc = crc << 1 crc = crc & 0xffff return crc def __encode(self, val, dim): output = [] for i in range(dim): output.append(val & 0xFF) val = val >> 8 return output def __decode(self, v): r = long(0) for i in v[::-1]: r = (r << 8) + i return r def __get_byte(self): r = struct.unpack("B", self.__s.read())[0] return r def __put_bytes(self, data): for b in data: self.__s.write(struct.pack('B', b)) def __unescape(self, packet): r = [] esc = False for b in packet: if esc: r.append(b ^ 0x20) esc = False elif b == self.HDLC_CTLESC_BYTE: esc = True else: r.append(b) return r def __escape(self, packet): r = [] for b in packet: if b == self.HDLC_FLAG_BYTE or b == self.HDLC_CTLESC_BYTE: r.append(self.HDLC_CTLESC_BYTE) r.append(b ^ 0x20) else: r.append(b) return r def read_packet(self): d = self.__get_byte() ts = time.time() while d != self.HDLC_FLAG_BYTE: d = self.__get_byte() ts = time.time() packet = [d] d = self.__get_byte() if d == self.HDLC_FLAG_BYTE: d = self.__get_byte() ts = time.time() else: packet.append(d) while d != self.HDLC_FLAG_BYTE: d = self.__get_byte() packet.append(d) un_packet = self.__unescape(packet) crc = self.crc16(0, un_packet[1:-3]) packet_crc = self.__decode(un_packet[-3:-1]) if crc != packet_crc: print "Warning: wrong CRC!" if self.__debug == True: print "Recv:", self.__format_packet(un_packet) return (ts, un_packet) def write_packet(self, am_group, am_id, data): # The first byte after SERIAL_PROTO_PACKET_ACK is a sequence # number that will be send back by the mote to ack the receive of # the data. packet = [self.SERIAL_PROTO_PACKET_ACK, 0, self.TOS_SERIAL_ACTIVE_MESSAGE_ID, 0xff, 0xff, 0, 0, len(data), am_group, am_id] + data; crc = self.crc16(0, packet) packet.append(crc & 0xff) packet.append((crc >> 8) & 0xff) packet = [self.HDLC_FLAG_BYTE] + self.__escape(packet) + [self.HDLC_FLAG_BYTE] if self.__debug == True: print "Send:", self.__format_packet(packet) self.__put_bytes(packet) # Waiting for ACK packet = self.read_packet() if len(packet) > 1 and len(packet[1]) > 1: return ((packet[1])[1] == self.SERIAL_PROTO_ACK) return False def set_debug(self, debug): self.__debug = debug class GenericPacket: """ GenericPacket """ def __decode(self, v): r = long(0) for i in v: r = (r << 8) + i return r def __encode(self, val, dim): output = [] for i in range(dim): output.append(int(val & 0xFF)) val = val >> 8 output.reverse() return output def __init__(self, desc, packet = None): self.__dict__['_schema'] = [(t, s) for (n, t, s) in desc] self.__dict__['_names'] = [n for (n, t, s) in desc] self.__dict__['_values'] = [] offset = 10 if type(packet) == type([]): for (t, s) in self._schema: if t == 'int': self._values.append(self.__decode(packet[offset:offset + s])) offset += s elif t == 'blob': if s: self._values.append(packet[offset:offset + s]) offset += s else: self._values.append(packet[offset:-3]) elif type(packet) == type(()): for i in packet: self._values.append(i) else: for v in self._schema: self._values.append(None) def __repr__(self): return self._values.__repr__() def __str__(self): return self._values.__str__() # Implement the map behavior def __getitem__(self, key): return self.__getattr__(key) def __setitem__(self, key, value): self.__setattr__(key, value) def __len__(self): return len(self._values) def keys(self): return self._names def values(self): return self._names # Implement the struct behavior def __getattr__(self, name): if type(name) == type(0): return self._names[name] else: return self._values[self._names.index(name)] def __setattr__(self, name, value): if type(name) == type(0): self._values[name] = value else: self._values[self._names.index(name)] = value # Custom def names(self): return self._names def sizes(self): return self._schema def payload(self): r = [] for i in range(len(self._schema)): (t, s) = self._schema[i] if t == 'int': r += self.__encode(self._values[i], s) else: r += self._values[i] return r tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/volumes-at45db.xml000066400000000000000000000001451207233610700272300ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tosthreads/tinyld/SerialLoaderFlash/volumes-stm25p.xml000077500000000000000000000001331207233610700272770ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/000077500000000000000000000000001207233610700167525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/BlinkConfig/000077500000000000000000000000001207233610700211375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/BlinkConfig/BlinkConfigAppC.nc000066400000000000000000000045251207233610700244200ustar00rootroot00000000000000// $Id: BlinkConfigAppC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ /* * Copyright (c) 2000-2006 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "StorageVolumes.h" #include "Timer.h" /** * Application to demonstrate the ConfigStorageC abstraction. A timer * period is read from flash, divided by two, and written back to * flash. An LED is toggled each time the timer fires. * * @author Prabal Dutta */ configuration BlinkConfigAppC { } implementation { components BlinkConfigC as App; components new ConfigStorageC(VOLUME_CONFIGTEST); components MainC, LedsC, PlatformC, SerialActiveMessageC; components new TimerMilliC() as Timer0; App.Boot -> MainC.Boot; App.Config -> ConfigStorageC.ConfigStorage; App.Mount -> ConfigStorageC.Mount; App.Leds -> LedsC; App.Timer0 -> Timer0; } tinyos-2.1.2+dfsg/apps/tutorials/BlinkConfig/BlinkConfigC.nc000066400000000000000000000102571207233610700237560ustar00rootroot00000000000000// $Id: BlinkConfigC.nc,v 1.7 2010-06-29 22:07:40 scipio Exp $ /* * Copyright (c) 2000-2006 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Application to demonstrate the ConfigStorageC abstraction. A timer * period is read from flash, divided by two, and written back to * flash. An LED is toggled each time the timer fires. * * @author Prabal Dutta */ #include module BlinkConfigC { uses { interface Boot; interface Leds; interface ConfigStorage as Config; interface Mount as Mount; interface Timer as Timer0; } } implementation { typedef struct config_t { uint16_t version; uint16_t period; } config_t; enum { CONFIG_ADDR = 0, CONFIG_VERSION = 1, DEFAULT_PERIOD = 1024, MIN_PERIOD = 128, MAX_PERIOD = 1024 }; uint8_t state; config_t conf; event void Boot.booted() { conf.period = DEFAULT_PERIOD; if (call Mount.mount() != SUCCESS) { // Handle failure } } event void Mount.mountDone(error_t error) { if (error == SUCCESS) { if (call Config.valid() == TRUE) { if (call Config.read(CONFIG_ADDR, &conf, sizeof(conf)) != SUCCESS) { // Handle failure } } else { // Invalid volume. Commit to make valid. call Leds.led1On(); if (call Config.commit() == SUCCESS) { call Leds.led0On(); } else { // Handle failure } } } else{ // Handle failure } } event void Config.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t err) __attribute__((noinline)) { if (err == SUCCESS) { memcpy(&conf, buf, len); if (conf.version == CONFIG_VERSION) { conf.period = conf.period/2; conf.period = conf.period > MAX_PERIOD ? MAX_PERIOD : conf.period; conf.period = conf.period < MIN_PERIOD ? MAX_PERIOD : conf.period; } else { // Version mismatch. Restore default. call Leds.led1On(); conf.version = CONFIG_VERSION; conf.period = DEFAULT_PERIOD; } call Leds.led0On(); call Config.write(CONFIG_ADDR, &conf, sizeof(conf)); } else { // Handle failure. } } event void Config.writeDone(storage_addr_t addr, void *buf, storage_len_t len, error_t err) { // Verify addr and len if (err == SUCCESS) { if (call Config.commit() != SUCCESS) { // Handle failure } } else { // Handle failure } } event void Config.commitDone(error_t err) { call Leds.led0Off(); call Timer0.startPeriodic(conf.period); if (err == SUCCESS) { // Handle failure } } event void Timer0.fired() { call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/tutorials/BlinkConfig/Makefile000066400000000000000000000000571207233610700226010ustar00rootroot00000000000000COMPONENT=BlinkConfigAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/BlinkConfig/README.txt000066400000000000000000000023671207233610700226450ustar00rootroot00000000000000$Id: README.txt,v 1.7 2007-04-06 02:48:44 prabal Exp $ README for Config Author/Contact: tinyos-help@millennium.berkeley.edu Description: Application to demonstrate the ConfigStorageC abstraction. A timer period is read from flash, divided by two, and written back to flash. An LED is toggled each time the timer fires. To use this application: (i) Program a mote with this application (e.g. make telos install) (ii) Wait until the red LED turns off (writing to flash is done) (iii) Power cycle the mote and wait until the red LED turns off. (iv) Repeat step (iii) and notice that the blink rate of the blue (yellow) LED doubles each time the mote is power cycled. The blink rate cycles through the following values: 1Hz, 2Hz, 4Hz, and 8Hz. The first two times this application is installed, the green LED will light up and remain on (the first time indicating that the storage volume is not valid and second time that the volume does not have the expected version number). The red LED will remain lit during the flash write/commit operation. The blue (yellow) LED blinks with the period stored and read from flash. See Lesson 7 for details. Tools: Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tutorials/BlinkConfig/volumes-at45db.xml000066400000000000000000000001621207233610700244330ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/BlinkConfig/volumes-stm25p.xml000066400000000000000000000001641207233610700245040ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/BlinkFail/000077500000000000000000000000001207233610700206055ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/BlinkFail/BlinkFailAppC.nc000066400000000000000000000051521207233610700235310ustar00rootroot00000000000000// $Id: BlinkFailAppC.nc,v 1.3 2010-06-29 22:07:40 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * BlinkFail is a basic application that toggles the a mote LED periodically and * then accesses out of bounds storage as a demonstration and sanity check for * Safe TinyOS. * * @author tinyos-help@millennium.berkeley.edu **/ configuration BlinkFailAppC { } implementation { components MainC, BlinkFailC, LedsC; components new TimerMilliC() as Timer0; components new TimerMilliC() as Timer1; components new TimerMilliC() as Timer2; BlinkFailC -> MainC.Boot; BlinkFailC.Timer0 -> Timer0; BlinkFailC.Timer1 -> Timer1; BlinkFailC.Timer2 -> Timer2; BlinkFailC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tutorials/BlinkFail/BlinkFailC.nc000066400000000000000000000060411207233610700230660ustar00rootroot00000000000000// $Id: BlinkFailC.nc,v 1.3 2010-06-29 22:07:40 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation for BlinkFail application. Toggle the LEDs when a * Timer fires. Access out of bounds storage after a few seconds. **/ #include "Timer.h" module BlinkFailC @safe() { uses interface Timer as Timer0; uses interface Timer as Timer1; uses interface Timer as Timer2; uses interface Leds; uses interface Boot; } implementation { event void Boot.booted() { call Timer0.startPeriodic( 250 ); call Timer1.startPeriodic( 500 ); call Timer2.startPeriodic( 1000 ); } event void Timer0.fired() { dbg("BlinkFailC", "Timer 0 fired @ %s.\n", sim_time_string()); call Leds.led0Toggle(); } int a[10]; int i; event void Timer1.fired() { dbg("BlinkFailC", "Timer 1 fired @ %s \n", sim_time_string()); call Leds.led1Toggle(); // here we violate memory safety on the 11th signal of this event a[i++] = 1; } event void Timer2.fired() { dbg("BlinkFailC", "Timer 2 fired @ %s.\n", sim_time_string()); call Leds.led2Toggle(); } } tinyos-2.1.2+dfsg/apps/tutorials/BlinkFail/Makefile000066400000000000000000000000561207233610700222460ustar00rootroot00000000000000COMPONENT=BlinkFailAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/BlinkFail/README.txt000066400000000000000000000016611207233610700223070ustar00rootroot00000000000000README for Blink Author/Contact: tinyos-help@millennium.berkeley.edu Description: BlinkFail is based on Blink (described below). It is designed to violate memory safety after a few seconds and is used as a demonstration and sanity check for Safe TinyOS. For more information about Safe TinyOS see here: http://www.cs.utah.edu/~coop/safetinyos/ Blink is a simple application that blinks the 3 mote LEDs. It tests that the boot sequence and millisecond timers are working properly. The three LEDs blink at 1Hz, 2Hz, and 4Hz. Because each is driven by an independent timer, visual inspection can determine whether there are bugs in the timer system that are causing drift. Note that this method is different than RadioCountToLeds, which fires a single timer at a steady rate and uses the bottom three bits of a counter to display on the LEDs. Tools: Known bugs/limitations: None. $Id: README.txt,v 1.2 2008-07-03 18:41:36 regehr Exp $ tinyos-2.1.2+dfsg/apps/tutorials/BlinkTask/000077500000000000000000000000001207233610700206345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/BlinkTask/BlinkTaskAppC.nc000066400000000000000000000044471207233610700236150ustar00rootroot00000000000000// $Id: BlinkTaskAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * @author tinyos-help@millennium.berkeley.edu **/ configuration BlinkTaskAppC { } implementation { components MainC, BlinkTaskC, LedsC; components new TimerMilliC() as Timer0; BlinkTaskC -> MainC.Boot; BlinkTaskC.Timer0 -> Timer0; BlinkTaskC.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tutorials/BlinkTask/BlinkTaskC.nc000066400000000000000000000050671207233610700231530ustar00rootroot00000000000000// $Id: BlinkTaskC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ /* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * */ /** * BlinkTask demo application: simple example of posting a task in TinyOS. * * @author Kristin Wright * */ /** * Blink Led0 every second. For expository purposes, use a task to * toggle the LED. **/ #include "Timer.h" module BlinkTaskC { uses interface Timer as Timer0; uses interface Leds; uses interface Boot; } implementation { task void toggle() { call Leds.led0Toggle(); } event void Boot.booted() { call Timer0.startPeriodic( 1000 ); } event void Timer0.fired() { post toggle(); } } tinyos-2.1.2+dfsg/apps/tutorials/BlinkTask/Makefile000066400000000000000000000000571207233610700222760ustar00rootroot00000000000000COMPONENT=BlinkTaskAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/BlinkTask/README.txt000066400000000000000000000006521207233610700223350ustar00rootroot00000000000000$Id: README.txt,v 1.4 2006-12-12 18:22:52 vlahan Exp $ README for BlinkTask Author/Contact: tinyos-help@millennium.berkeley.edu Description: The BlinkTask application: a simple example of how to post a task in TinyOS. A periodic timer is set to fire every second. The Timer.fired() event posts a task to toggle the LEDs rather than toggling the LEDs directly. Tools: None Known bugs/limitations: None.tinyos-2.1.2+dfsg/apps/tutorials/BlinkToRadio/000077500000000000000000000000001207233610700212735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/BlinkToRadio/BlinkToRadio.h000066400000000000000000000004271207233610700237700ustar00rootroot00000000000000// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $ #ifndef BLINKTORADIO_H #define BLINKTORADIO_H enum { AM_BLINKTORADIO = 6, TIMER_PERIOD_MILLI = 250 }; typedef nx_struct BlinkToRadioMsg { nx_uint16_t nodeid; nx_uint16_t counter; } BlinkToRadioMsg; #endif tinyos-2.1.2+dfsg/apps/tutorials/BlinkToRadio/BlinkToRadioAppC.nc000066400000000000000000000055041207233610700247060ustar00rootroot00000000000000// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $ /* * Copyright (c) 2000-2006 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Application file for the BlinkToRadio application. A counter is * incremented and a radio message is sent whenever a timer fires. * Whenever a radio message is received, the three least significant * bits of the counter in the message payload are displayed on the * LEDs. Program two motes with this application. As long as they * are both within range of each other, the LEDs on both will keep * changing. If the LEDs on one (or both) of the nodes stops changing * and hold steady, then that node is no longer receiving any messages * from the other node. * * @author Prabal Dutta * @date Feb 1, 2006 */ #include #include "BlinkToRadio.h" configuration BlinkToRadioAppC { } implementation { components MainC; components LedsC; components BlinkToRadioC as App; components new TimerMilliC() as Timer0; components ActiveMessageC; components new AMSenderC(AM_BLINKTORADIO); components new AMReceiverC(AM_BLINKTORADIO); App.Boot -> MainC; App.Leds -> LedsC; App.Timer0 -> Timer0; App.Packet -> AMSenderC; App.AMPacket -> AMSenderC; App.AMControl -> ActiveMessageC; App.AMSend -> AMSenderC; App.Receive -> AMReceiverC; } tinyos-2.1.2+dfsg/apps/tutorials/BlinkToRadio/BlinkToRadioC.nc000066400000000000000000000077501207233610700242520ustar00rootroot00000000000000// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $ /* * Copyright (c) 2000-2006 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Implementation of the BlinkToRadio application. A counter is * incremented and a radio message is sent whenever a timer fires. * Whenever a radio message is received, the three least significant * bits of the counter in the message payload are displayed on the * LEDs. Program two motes with this application. As long as they * are both within range of each other, the LEDs on both will keep * changing. If the LEDs on one (or both) of the nodes stops changing * and hold steady, then that node is no longer receiving any messages * from the other node. * * @author Prabal Dutta * @date Feb 1, 2006 */ #include #include "BlinkToRadio.h" module BlinkToRadioC { uses interface Boot; uses interface Leds; uses interface Timer as Timer0; uses interface Packet; uses interface AMPacket; uses interface AMSend; uses interface Receive; uses interface SplitControl as AMControl; } implementation { uint16_t counter; message_t pkt; bool busy = FALSE; void setLeds(uint16_t val) { if (val & 0x01) call Leds.led0On(); else call Leds.led0Off(); if (val & 0x02) call Leds.led1On(); else call Leds.led1Off(); if (val & 0x04) call Leds.led2On(); else call Leds.led2Off(); } event void Boot.booted() { call AMControl.start(); } event void AMControl.startDone(error_t err) { if (err == SUCCESS) { call Timer0.startPeriodic(TIMER_PERIOD_MILLI); } else { call AMControl.start(); } } event void AMControl.stopDone(error_t err) { } event void Timer0.fired() { counter++; if (!busy) { BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg))); if (btrpkt == NULL) { return; } btrpkt->nodeid = TOS_NODE_ID; btrpkt->counter = counter; if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { busy = TRUE; } } } event void AMSend.sendDone(message_t* msg, error_t err) { if (&pkt == msg) { busy = FALSE; } } event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ if (len == sizeof(BlinkToRadioMsg)) { BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; setLeds(btrpkt->counter); } return msg; } } tinyos-2.1.2+dfsg/apps/tutorials/BlinkToRadio/Makefile000066400000000000000000000000611207233610700227300ustar00rootroot00000000000000COMPONENT=BlinkToRadioAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/BlinkToRadio/README.txt000066400000000000000000000013371207233610700227750ustar00rootroot00000000000000$Id: README.txt,v 1.4 2006-12-12 18:22:52 vlahan Exp $ README for Blink Author/Contact: tinyos-help@millennium.berkeley.edu Description: The BlinkToRadio application. A counter is incremented and a radio message is sent whenever a timer fires. Whenever a radio message is received, the three least significant bits of the counter in the message payload are displayed on the LEDs. Program two motes with this application. As long as they are both within range of each other, the LEDs on both will keep changing. If the LEDs on one (or both) of the nodes stops changing and hold steady, then that node is no longer receiving any messages from the other node. Tools: None Known bugs/limitations: None.tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/000077500000000000000000000000001207233610700220575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Base/000077500000000000000000000000001207233610700227315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Base/LowPowerSensingBaseAppC.nc000066400000000000000000000063771207233610700277340ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "LowPowerSensingConstants.h" configuration LowPowerSensingBaseAppC{} implementation { components MainC, LowPowerSensingBaseC as App; components new QueueC(message_t, MSG_QUEUE_SIZE) as Queue; components LedsC; MainC.Boot <- App; App.MsgQueue -> Queue; App.Leds -> LedsC; components SerialActiveMessageC as Serial; App.SerialAMControl -> Serial; App.SerialAMPacket -> Serial; App.SerialPacket -> Serial; components ActiveMessageC as Radio; App.RadioAMControl -> Radio; App.RadioAMPacket -> Radio; App.RadioPacket -> Radio; components new SerialAMReceiverC(AM_SERIAL_REQUEST_SAMPLES_MSG) as SerialRequestSampleMsgsReceiver; components new AMSenderC(AM_REQUEST_SAMPLES_MSG) as RadioRequestSampleMsgsSender; App.SerialRequestSampleMsgsReceive -> SerialRequestSampleMsgsReceiver; App.RadioRequestSampleMsgsSend -> RadioRequestSampleMsgsSender; components new AMReceiverC(AM_SAMPLE_MSG) as RadioSampleMsgReceiver; components new SerialAMSenderC(AM_SERIAL_SAMPLE_MSG) as SerialSampleMsgSender; App.RadioSampleMsgReceive -> RadioSampleMsgReceiver; App.SerialSampleMsgSend -> SerialSampleMsgSender; //Nasty hack since no uniform way of prividing LPL support as of yet #if defined(PLATFORM_TELOSB) || defined(PLATFORM_TMOTE) || defined(PLATFORM_MICAZ) || defined(PLATFORM_Z1) components CC2420ActiveMessageC as LPLProvider; App.LPL -> LPLProvider; #endif #if defined(PLATFORM_MICA2) components CC1000CsmaRadioC as LPLProvider; App.LPL -> LPLProvider; #endif #if defined(PLATFORM_IRIS) || defined(PLATFORM_UCMINI) components ActiveMessageC as LPLProvider; App.LPL -> LPLProvider; #endif } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Base/LowPowerSensingBaseC.nc000066400000000000000000000105441207233610700272620ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "LowPowerSensingConstants.h" module LowPowerSensingBaseC { uses { interface Boot; interface Queue as MsgQueue; interface Leds; interface LowPowerListening as LPL; interface SplitControl as SerialAMControl; interface AMPacket as SerialAMPacket; interface Packet as SerialPacket; interface SplitControl as RadioAMControl; interface AMPacket as RadioAMPacket; interface Packet as RadioPacket; interface Receive as SerialRequestSampleMsgsReceive; interface AMSend as RadioRequestSampleMsgsSend; interface Receive as RadioSampleMsgReceive; interface AMSend as SerialSampleMsgSend; } } implementation { bool serialSending; am_addr_t dest_addr; message_t request_samples_msg; message_t sample_msg; serial_sample_msg_t* sample_msg_payload; event void Boot.booted() { serialSending = FALSE; sample_msg_payload = (serial_sample_msg_t*)call SerialPacket.getPayload(&sample_msg, sizeof(serial_sample_msg_t)); call RadioAMControl.start(); } event void RadioAMControl.startDone(error_t error) { call SerialAMControl.start(); } event void SerialAMControl.startDone(error_t error) { } event void RadioAMControl.stopDone(error_t error) { } event void SerialAMControl.stopDone(error_t error) { } event message_t* SerialRequestSampleMsgsReceive.receive(message_t* msg, void* payload, uint8_t len) { serial_request_samples_msg_t* request_msg = payload; call Leds.led0On(); call LPL.setRemoteWakeupInterval(&request_samples_msg, LPL_INTERVAL+100); call RadioRequestSampleMsgsSend.send(request_msg->addr, &request_samples_msg, sizeof(request_samples_msg_t)); return msg; } event void RadioRequestSampleMsgsSend.sendDone(message_t* msg, error_t error) { if(error == SUCCESS) call Leds.led0Off(); } event message_t* RadioSampleMsgReceive.receive(message_t* msg, void* payload, uint8_t len) { call Leds.led2Toggle(); if(call MsgQueue.empty() == FALSE || serialSending == TRUE) call MsgQueue.enqueue(*msg); else { sample_msg_payload->src_addr = call RadioAMPacket.source(msg); sample_msg_payload->sample = *((nx_sensor_sample_t*)payload); dest_addr = call SerialAMPacket.destination(msg); serialSending = TRUE; call SerialSampleMsgSend.send(dest_addr, &sample_msg, sizeof(*sample_msg_payload)); } return msg; } event void SerialSampleMsgSend.sendDone(message_t* msg, error_t error) { if(call MsgQueue.empty() == FALSE) { sample_msg = call MsgQueue.dequeue(); dest_addr = call SerialAMPacket.destination(msg); call SerialSampleMsgSend.send(dest_addr, &sample_msg, sizeof(serial_sample_msg_t)); } else serialSending = FALSE; } } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Base/Makefile000066400000000000000000000003311207233610700243660ustar00rootroot00000000000000COMPONENT=LowPowerSensingBaseAppC CFLAGS += -I.. -I../universal_sensors CFLAGS += -DLOW_POWER_LISTENING #CFLAGS += -I.. -I../tmote_onboard_sensors #CFLAGS += -DCC1K_DEFAULT_FREQ=CC1K_914_077_MHZ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Base/volumes-at45db.xml000066400000000000000000000001171207233610700262250ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Base/volumes-stm25p.xml000066400000000000000000000001101207233610700262650ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/LowPowerSensingConstants.h000066400000000000000000000037341207233610700272410ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #ifndef LOWPOWERSENSINGCONSTANTS_H #define LOWPOWERSENSINGCONSTANTS_H #ifndef LOWPOWERSENSING_JAVA_MAKEFILE #include "StorageVolumes.h" #endif #include "LowPowerSensingMsgs.h" enum { LPL_INTERVAL = 2000, SAMPLING_INTERVAL = 3000, MSG_QUEUE_SIZE = 50, BASE_STATION_ADDR = 0, }; #endif //LOWPOWERSENSINGCONSTANTS_H tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/LowPowerSensingMsgs.h000066400000000000000000000045521207233610700261750ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #ifndef LOWPOWERSENSINGMSGS_H #define LOWPOWERSENSINGMSGS_H #include "message.h" #include "SensorSample.h" enum { AM_SERIAL_REQUEST_SAMPLES_MSG = 0x92, AM_REQUEST_SAMPLES_MSG = 0x93, AM_SAMPLE_MSG = 0x98, AM_SERIAL_SAMPLE_MSG = 0x99, }; typedef nx_struct serial_request_samples_msg { nx_am_addr_t addr; nx_uint32_t sample_num; } serial_request_samples_msg_t; typedef nx_struct request_samples_msg { } request_samples_msg_t; typedef nx_struct sample_msg { nx_sensor_sample_t sample; } sample_msg_t; typedef nx_struct serial_sample_msg { nx_am_addr_t src_addr; nx_sensor_sample_t sample; } serial_sample_msg_t; #endif //LOWPOWERSENSINGMSGS_H tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/README000066400000000000000000000212031207233610700227350ustar00rootroot00000000000000======================================================================== README: LowPowerSensing Application Created: 2-March-2008 Author: Kevin Klues (klueska@cs.stanford.edu) ======================================================================== This README is intended to give an overview of the organizational structure of the LowPowerSensing Application application as well as how to best utilize and customize some of the features it contains. This document is divided into three sections. The first section contains an overview of how the application is organized and what it is capable of doing. The second section gives instructions on how to install the application and interact with it from your PC. The third section demonstrates how to customize the application to meet your particualr needs. ------------------------------------------------------------------------ Organizational Structure and Overview ------------------------------------------------------------------------ The LowPowerSensing application is actually made up of three separate mini-applications: one mote base station application, one mote sampling application, and one java based application used to interact with the mote applications. The code for all three applications is divided up among several directories: LowPowerSensing ./Base ./java ./sampleLog ./Sampler ./tmote_onboard_sensors ./universal_sensors The code specific to the base station aplication is contained under the 'Base' directory, and code for the sampling application is found under 'Sampler'. Code shared between them is found either in the top level directory (LowPowerSensing) or in the subdirectories 'sampleLog', 'tmote_onboard_sensors', and 'universal_sensors'. Code for the java application is found in the 'java' directory. Now the application itself is fairly straightforward. The sampler application periodically takes some sensor readings, logs them to flash, and waits for requests from the base station to stream out the contents or its flash over the radio. Requests originate from end users of the java application and simply get forwarded on to a mote running the sampler application through the base station application. Conversely, whenever the base station receives any packets from the sampler application, it forwards these packets back to the java application for further processing. Any number of motes running the sampler application can exist simultaneously, and data can be requested from them using a unique address assigned to each of them. What sensors are sampled, the periodicity of sampling, and the check interval for performing LowPowerListening the are all configurable options that can easily be set by the user at compile time. This application is admittedly *not* robust in the sense that no reliable transfer protocol is implemented for the exchange of data, data can only be retreived from one mote at a time, and there is no code anywhere to recover from node failures at any point in time. This application is intended more for demonstration purposes, and as a starting point for developers learning how to write low power sensornet applications. Enjoy! ------------------------------------------------------------------------ Installation Instructions and Running the Applications ------------------------------------------------------------------------ The default configuration of the LowPowerSensing applcation has been designed to compile and run on any platform that supports LowPowerListening and has a LogStorage component defined for its external flash (i.e. telos, mica2, micaz, eyesIFX, etc.). For purposes of illustration the instructions below are given for installation on the telosb platform, but should be applicable to other platforms as well. To run the LowPowerSensing application with its default configuration do the following: 1) Install the base station application on a mote and connect it to your PC via whatever serial interface you normally use to communicate with it. IMPORTANT: the base station mote must be installed with address 0 cd Base make telosb install.0 2) Install the sampler application on a mote. You can install this application on any number of motes, remembering to change the TOS_NODE_ID of each installation instance (in the example below I use 5, 10, and 20, but any number is acceptable as long as its not 0). cd Sampler make telosb install.5 make telosb install.10 make telosb install.20 3) Compile and run the java application. You first need to start up an instance of serial forwarder to do so. cd java make java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:telosb & java LowePowerSensingApp After starting the java application you will be presented with a user prompt that looks like: Enter 's' to request samples >> Just type 's' and hit enter in order to request samples from one of your sampler motes. After doing so, you will be presented with a prompt for the address of the mote from which you are requesting data. You should enter the TOS_NODE_ID of one of the motes you installed the sampler application on before. Enter Address: Once the address has been entered, a request message will be sent from the java application through the base station mote and out to the mote running the sampling application. Once the sampler mote receives this request, it will start streaming back any data it has logged to flash since the last time a request was received. If this is the first request message it is receiving, it will send all of the samples back that it has logged since the time it was booted up. ------------------------------------------------------------------------ Changing the default Configuration ------------------------------------------------------------------------ The LowPowerSensing Application is set up by default to use a software based Sinusoidal generator sensor with a sampling period of 3s, and an LPL check interval of 2s. The code for using this sensor can be found in the 'universal_sensors' directory. The pattern followed by the set of files found in this directory can be used to setup other types of sensors for sampling by the LowPowerSensing application. If you take a look in the 'tmote_onboard_sensors' directory you will see the exact same set of files as you do in the 'universal_sensors' directory. Of course, these files are set up to use the set of sensors found onboard the tmote sky motes: namely a temperature sensor, a humidity sensor, a photo active sensor, and a total solar sensor. Because the files in each directory are named identically, we can tell the LowPowerSensing application which set of sensors to expect completely at compile time by simply setting a few compiler flags. So if you happen to have a tmote laying around and you want to sample its onboard sensors instead of using the default sinusoidal sensor you need to do the following: Open up the makefiles for both the the Sampler and Base station applications and change this line: CFLAGS += -I.. -I../sampleLog -I../universal_sensors to CFLAGS += -I.. -I../sampleLog -I../tmote_onboard_sensors Additionally, to allow the java application to recognize the new types of sensors being sampled you need to change this line in the makefile of the java directory: SENSOR_DIR = universal_sensors to SENSOR_DIR = tmote_onboard_sensors And thats it. You should now be sampling the oboard tmote sensors instead of the sinusoaidal one. If you wish to create a custom set of sensors to sample using the LowPowerSensing application (such as those from one of the mica sensorboards), just follow the pattern found in the 'universal_sensors' and 'tmote_onboard_sensors' and then change the compiler flags appropriately. Additionally, if you wish to change the LowPowerListening check interval or the sampling period of the Sampler application you can eitheropen up the 'LowPowerSensingConsants.h' file and directly change them there, or pass new values for them at compile time through the makefile (all values are in binary milliseconds i.e. 1s is specified as 1024 not 1000). To change them via the makefile add lines such as the following to your makefile in both the Base and Sampler application directories (its important that its in both makefiles for the LPL check interval, but only necessary in the Sampler application if you are only changing the sampling period): PFLAGS += -DSAMPLING_INTERVAL=10000 PFLAGS += -DLPL_INTERVAL=3000 PFLAGS += -DSAMPLING_INTERVAL=10000 -DLPL_INTERVAL=3000 And that should be it. The rest of it involves sifting through the code and figuring out how the application does what it does. If you have any questions feel free to email me (Kevin) at klueska@cs.stanford.edu . tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Sampler/000077500000000000000000000000001207233610700234625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Sampler/LowPowerSensingPeriodicSamplerAppC.nc000066400000000000000000000057071207233610700326710ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "LowPowerSensingConstants.h" #include "SensorSample.h" configuration LowPowerSensingPeriodicSamplerAppC {} implementation { components new SamplePeriodicLogC(SAMPLING_INTERVAL, VOLUME_SENSOR_SAMPLES); components MainC, LowPowerSensingPeriodicSamplerC as App; components SampleNxConverterC; MainC.Boot <- App; App.SampleLogRead -> SamplePeriodicLogC; App.SampleNxConverter -> SampleNxConverterC; components ActiveMessageC; App.AMControl -> ActiveMessageC; App.AMPacket -> ActiveMessageC; App.Packet -> ActiveMessageC; components new AMSenderC(AM_SAMPLE_MSG) as SampleSender; App.SampleSend -> SampleSender; components new AMReceiverC(AM_REQUEST_SAMPLES_MSG) as RequestSamplesReceiver; App.RequestSamplesReceive -> RequestSamplesReceiver; components LedsC as LedsC; App.Leds -> LedsC; //Nasty hack since no uniform way of prividing LPL support as of yet #if defined(PLATFORM_TELOSB) || defined(PLATFORM_TMOTE) || defined(PLATFORM_MICAZ) || \ defined(PLATFORM_Z1) components CC2420ActiveMessageC as LPLProvider; App.LPL -> LPLProvider; #endif #if defined(PLATFORM_MICA2) components CC1000CsmaRadioC as LPLProvider; App.LPL -> LPLProvider; #endif #if defined(PLATFORM_IRIS) || defined(PLATFORM_UCMINI) components ActiveMessageC as LPLProvider; App.LPL -> LPLProvider; #endif } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Sampler/LowPowerSensingPeriodicSamplerC.nc000066400000000000000000000073561207233610700322320ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "LowPowerSensingConstants.h" #include "SensorSample.h" module LowPowerSensingPeriodicSamplerC { uses { interface Boot; interface SampleLogRead; interface SampleNxConverter; interface Leds; interface SplitControl as AMControl; interface AMPacket; interface Packet; interface AMSend as SampleSend; interface Receive as RequestSamplesReceive; interface LowPowerListening as LPL; } } implementation { message_t sample_msg; bool sendBusy = FALSE; task void readNextTask(); task void sendSampleMsgTask(); void readNext() { error_t error = call SampleLogRead.readNext(); if(error == FAIL) post readNextTask(); else if(error == ECANCEL) { sendBusy = FALSE; call Leds.led1Toggle(); } } void sendSampleMsg() { call LPL.setRemoteWakeupInterval(&sample_msg, 0); if(call SampleSend.send(BASE_STATION_ADDR, &sample_msg, sizeof(nx_sensor_sample_t)) != SUCCESS) post sendSampleMsgTask(); else call Leds.led2On(); } task void readNextTask() { readNext(); } task void sendSampleMsgTask() { sendSampleMsg(); } event void Boot.booted() { call LPL.setLocalWakeupInterval(LPL_INTERVAL); call AMControl.start(); } event void AMControl.startDone(error_t e) { if(e != SUCCESS) call AMControl.start(); } event void AMControl.stopDone(error_t e) { } event void SampleLogRead.readDone(sensor_sample_t* sample, error_t error) { if(error == SUCCESS) { nx_sensor_sample_t* nx_sample = call SampleSend.getPayload(&sample_msg, sizeof(nx_sample)); call SampleNxConverter.copyToNx(nx_sample, sample); sendSampleMsg(); } else post readNextTask(); } event message_t* RequestSamplesReceive.receive(message_t* msg, void* payload, uint8_t len) { call Leds.led0Toggle(); if(sendBusy == FALSE) { sendBusy = TRUE; readNext(); } return msg; } event void SampleSend.sendDone(message_t* msg, error_t error) { if(error != SUCCESS) post sendSampleMsgTask(); else { call Leds.led2Off(); readNext(); } } } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Sampler/Makefile000066400000000000000000000004021207233610700251160ustar00rootroot00000000000000COMPONENT=LowPowerSensingPeriodicSamplerAppC CFLAGS += -I.. -I../sampleLog CFLAGS += -I.. -I../universal_sensors CFLAGS += -DLOW_POWER_LISTENING #CFLAGS += -I.. -I../tmote_onboard_sensors #CFLAGS += -DCC1K_DEFAULT_FREQ=CC1K_914_077_MHZ include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Sampler/volumes-at45db.xml000066400000000000000000000001171207233610700267560ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/Sampler/volumes-stm25p.xml000066400000000000000000000001171207233610700270250ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/java/000077500000000000000000000000001207233610700230005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/java/LowPowerSensingApp.java000066400000000000000000000062101207233610700274100ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ import net.tinyos.message.*; import net.tinyos.util.*; import java.io.*; /** */ public class LowPowerSensingApp implements MessageListener { MoteIF mote; /* Main entry point */ void run() { mote = new MoteIF(PrintStreamMessenger.err); mote.registerListener(new SerialSampleMsg(), this); } synchronized public void messageReceived(int dest_addr, Message msg) { if (msg instanceof SerialSampleMsg) { System.out.print(msg.toString()); } } synchronized public void requestSamples(int addr) { SerialRequestSamplesMsg msg = new SerialRequestSamplesMsg(); msg.set_addr(addr); try { mote.send(MoteIF.TOS_BCAST_ADDR, msg); } catch (IOException e) { System.err.println("Cannot send message to mote"); } } public static void main(String[] args) { LowPowerSensingApp me = new LowPowerSensingApp(); me.run(); InputStreamReader cin = new InputStreamReader(System.in); BufferedReader in = new BufferedReader(cin); String input = ""; System.out.print("Enter 's' to request samples\n"); System.out.print(">> "); for(;;) { try { input = in.readLine(); if(input.equals("s")) { System.out.print("Enter Address: "); input = in.readLine(); me.requestSamples(Integer.parseInt(input)); } else System.out.println("Invalid Input!!!!: "); System.out.print(">> "); } catch (IOException e) { System.out.print("Error On Input!!"); } } } } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/java/Makefile000066400000000000000000000020671207233610700244450ustar00rootroot00000000000000GEN=SerialRequestSamplesMsg.java SerialSampleMsg.java Constants.java SENSOR_DIR = universal_sensors #SENSOR_DIR = tmote_onboard_sensors SENSOR_DEPS = ../$(SENSOR_DIR)/SensorSample.h all: LowPowerSensingApp.jar LowPowerSensingApp.jar: LowPowerSensingApp.class jar cf $@ *.class SerialRequestSamplesMsg.java: ../LowPowerSensingMsgs.h $(SENSOR_DEPS) mig -I../$(SENSOR_DIR) -target=null \ -java-classname=SerialRequestSamplesMsg java ../LowPowerSensingMsgs.h serial_request_samples_msg -o $@ SerialSampleMsg.java: ../LowPowerSensingMsgs.h $(SENSOR_DEPS) mig -I../$(SENSOR_DIR) -target=null \ -java-classname=SerialSampleMsg java ../LowPowerSensingMsgs.h serial_sample_msg -o $@ Constants.java: ../LowPowerSensingConstants.h ncg -I../$(SENSOR_DIR) -DLOWPOWERSENSING_JAVA_MAKEFILE -target=null \ -java-classname=Constants java ../LowPowerSensingConstants.h BASE_STATION_ADDR SAMPLING_INTERVAL \ MSG_QUEUE_SIZE LPL_INTERVAL -o $@ LowPowerSensingApp.class: $(wildcard *.java) $(GEN) javac *.java clean: rm -f *.class $(GEN) veryclean: clean rm -f LowPowerSensingApp.jar tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/sampleLog/000077500000000000000000000000001207233610700240025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/sampleLog/GenericSensorSample.h000066400000000000000000000040031207233610700300600ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #ifndef GENERICSENSORSAMPLE_H #define GENERICSENSORSAMPLE_H typedef struct generic_sensor_sample { uint32_t sample_num; sensor_type_t values[num_sensors]; } generic_sensor_sample_t; typedef union generic_sensor_sample_type_union { uint8_t u8; uint16_t u16; uint32_t u32; sensor_type_t st; } generic_sensor_sample_type_union_t; #endif //GENERICSENSORSAMPLE_H tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/sampleLog/PeriodicSampleLogger16C.nc000066400000000000000000000041611207233610700306400ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ generic configuration PeriodicSampleLogger16C(uint32_t period, uint8_t num_sensors){ uses { interface Boot; interface LogWrite; interface Read as Sensor[uint8_t]; } } implementation { Boot = Logger.Boot; Sensor = Logger; components new PeriodicSampleLoggerP(period, num_sensors, uint16_t) as Logger; components new TimerMilliC(); Logger.LogWrite = LogWrite; Logger.Timer -> TimerMilliC; components NoLedsC as LedsC; Logger.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/sampleLog/PeriodicSampleLoggerP.nc000066400000000000000000000075561207233610700305210ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ generic module PeriodicSampleLoggerP(uint32_t period_ms, uint8_t num_sensors, typedef sensor_type_t) { uses { interface Boot; interface Read as Sensor[uint8_t]; interface Timer as Timer; interface LogWrite; interface Leds; } } implementation { #include "GenericSensorSample.h" generic_sensor_sample_t sample[2]; generic_sensor_sample_t* current_sample; uint8_t current_sample_id; task void eraseTask(); task void appendTask(); void readSensors() { int i; for(i=0; ivalues[i] = val; call Leds.led1Toggle(); } else { current_sample->values[i] = ((generic_sensor_sample_type_union_t)(0xFFFFFFFF)).st; call Leds.led2Toggle(); } } event void LogWrite.appendDone(void* buf, storage_len_t len, bool recordsLost, error_t error){ if(error != SUCCESS) post appendTask(); else ((generic_sensor_sample_t*)buf)->sample_num+=2; } event void LogWrite.syncDone(error_t error) {} default command error_t Sensor.read[uint8_t i]() {return SUCCESS;} } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/sampleLog/SampleLogRead.nc000066400000000000000000000034611207233610700270070ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ interface SampleLogRead { command error_t readFirst(); command error_t readNext(); event void readDone(sample_type_t* entry, error_t error); } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/sampleLog/SampleLogReaderC.nc000066400000000000000000000037671207233610700274520ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ generic configuration SampleLogReaderC(typedef sample_type_t) { provides { interface SampleLogRead; } uses { interface LogRead; interface LogWrite; } } implementation { components new SampleLogReaderP(sample_type_t) as LogReader; SampleLogRead = LogReader; LogReader.LogRead = LogRead; LogReader.LogWrite = LogWrite; } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/sampleLog/SampleLogReaderP.nc000066400000000000000000000056261207233610700274630ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ generic module SampleLogReaderP(typedef sample_type_t) { provides { interface SampleLogRead; } uses { interface LogRead; interface LogWrite; } } implementation { sample_type_t sample; storage_cookie_t writeLocation; command error_t SampleLogRead.readFirst() { return call LogRead.seek(SEEK_BEGINNING); } command error_t SampleLogRead.readNext() { atomic writeLocation = call LogWrite.currentOffset(); if(call LogRead.currentOffset() == writeLocation) return ECANCEL; else return call LogRead.read(&sample, sizeof(sample)); } event void LogRead.readDone(void* buf, storage_len_t len, error_t error) { signal SampleLogRead.readDone((sample_type_t*)buf, error); } event void LogRead.seekDone(error_t error) { if(error == SUCCESS) { error = call SampleLogRead.readNext(); if(error != SUCCESS) signal SampleLogRead.readDone(&sample, error); } else signal SampleLogRead.readDone(&sample, error); } event void LogWrite.appendDone(void* buf, storage_len_t len, bool recordsLost, error_t error) {} event void LogWrite.eraseDone(error_t error) {} event void LogWrite.syncDone(error_t error) {} default event void SampleLogRead.readDone(sample_type_t* s, error_t error) {} } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/sampleLog/SampleNxConverter.nc000066400000000000000000000035331207233610700277470ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "SensorSample.h" interface SampleNxConverter { command void copyToNx(nx_sensor_sample_t* dest, sensor_sample_t* src); command void copyFromNx(sensor_sample_t* dest, nx_sensor_sample_t* src); } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/000077500000000000000000000000001207233610700264675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SampleNxConverterC.nc000066400000000000000000000045321207233610700325370ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "SensorSample.h" module SampleNxConverterC { provides interface SampleNxConverter; } implementation { command void SampleNxConverter.copyToNx(nx_sensor_sample_t* dest, sensor_sample_t* src) { dest->sample_num = src->sample_num; dest->humidity = src->humidity; dest->temperature = src->temperature; dest->photo_active = src->photo_active; dest->total_solar = src->total_solar; } command void SampleNxConverter.copyFromNx(sensor_sample_t* dest, nx_sensor_sample_t* src) { dest->sample_num = src->sample_num; dest->humidity = src->humidity; dest->temperature = src->temperature; dest->photo_active = src->photo_active; dest->total_solar = src->total_solar; } } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SamplePeriodicLogC.nc000066400000000000000000000053431207233610700324630ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "SensorSample.h" #include "Storage.h" generic configuration SamplePeriodicLogC(uint32_t sampling_period, volume_id_t volume) { provides{ interface SampleLogRead; } } implementation { //Change sensors based on sensorboard........ components new PeriodicSampleLogger16C(sampling_period, 4) as PeriodicLogger; components new SensirionSht11C() as HumidityTempC; components new HamamatsuS10871TsrC() as PhotoActiveC; components new HamamatsuS1087ParC() as TotalSolarC; PeriodicLogger.Sensor[0] -> HumidityTempC.Humidity; PeriodicLogger.Sensor[1] -> HumidityTempC.Temperature; PeriodicLogger.Sensor[2] -> PhotoActiveC; PeriodicLogger.Sensor[3] -> TotalSolarC; //Don't change........ just copy components MainC; components new LogStorageC(volume, TRUE); components new SampleLogReaderC(sensor_sample_t) as LogReader; SampleLogRead = LogReader; MainC.Boot <- PeriodicLogger; PeriodicLogger.LogWrite -> LogStorageC; LogReader.LogRead -> LogStorageC; LogReader.LogWrite -> LogStorageC; } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SensorSample.h000066400000000000000000000040741207233610700312600ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #ifndef SENSORSAMPLE_H #define SENSORSAMPLE_H typedef struct sensor_sample { uint32_t sample_num; uint16_t humidity; uint16_t temperature; uint16_t photo_active; uint16_t total_solar; } sensor_sample_t; typedef nx_struct nx_sensor_sample { nx_uint32_t sample_num; nx_uint16_t humidity; nx_uint16_t temperature; nx_uint16_t photo_active; nx_uint16_t total_solar; } nx_sensor_sample_t; #endif //SENSORSAMPLE_H tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/universal_sensors/000077500000000000000000000000001207233610700256435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/universal_sensors/SampleNxConverterC.nc000066400000000000000000000041361207233610700317130ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "SensorSample.h" module SampleNxConverterC { provides interface SampleNxConverter; } implementation { command void SampleNxConverter.copyToNx(nx_sensor_sample_t* dest, sensor_sample_t* src) { dest->sample_num = src->sample_num; dest->sin_value = src->sin_value; } command void SampleNxConverter.copyFromNx(sensor_sample_t* dest, nx_sensor_sample_t* src) { dest->sample_num = src->sample_num; dest->sin_value = src->sin_value; } } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/universal_sensors/SamplePeriodicLogC.nc000066400000000000000000000046621207233610700316420ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #include "SensorSample.h" #include "Storage.h" generic configuration SamplePeriodicLogC(uint32_t sampling_period, volume_id_t volume) { provides{ interface SampleLogRead; } } implementation { //Change sensors based on sensorboard........ components new PeriodicSampleLogger16C(sampling_period, 1) as PeriodicLogger; components new SineSensorC(); PeriodicLogger.Sensor[0] -> SineSensorC; //Don't change..... just copy for different sensorboard implementations components MainC; components new LogStorageC(volume, TRUE); components new SampleLogReaderC(sensor_sample_t) as LogReader; MainC.Boot <- PeriodicLogger; PeriodicLogger.LogWrite -> LogStorageC; SampleLogRead = LogReader; LogReader.LogRead -> LogStorageC; LogReader.LogWrite -> LogStorageC; } tinyos-2.1.2+dfsg/apps/tutorials/LowPowerSensing/universal_sensors/SensorSample.h000066400000000000000000000036431207233610700304350ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @date July 24, 2007 */ #ifndef SENSORSAMPLE_H #define SENSORSAMPLE_H typedef struct sensor_sample { uint32_t sample_num; uint16_t sin_value; } sensor_sample_t; typedef nx_struct nx_sensor_sample { nx_uint32_t sample_num; nx_uint16_t sin_value; } nx_sensor_sample_t; #endif //SENSORSAMPLE_H tinyos-2.1.2+dfsg/apps/tutorials/PacketParrot/000077500000000000000000000000001207233610700213515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/PacketParrot/Makefile000066400000000000000000000000551207233610700230110ustar00rootroot00000000000000COMPONENT=PacketParrotC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/PacketParrot/PacketParrotC.nc000066400000000000000000000057571207233610700244130ustar00rootroot00000000000000/* tab:2 * * Copyright (c) 2000-2007 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Demonstrates the LogRead and LogWrite * abstractions. The application logs packets it receives from the * radio to flash. On a subsequent power cycle, the application * transmits logged packets, erases the log, and then continues to log * packets again. The red LED is on when the log is being erased. * The blue (yellow) LED blinks when packets are being received and * logged, and remains on when packets are being received but are not * logged (because the log is being erased). The green LED blinks * rapidly after a power cycle when logged packets are transmitted. * * @author Prabal Dutta * @date Apr 6, 2007 * @author Janos Sallai * @date Jan 25, 2012 */ #include #include "StorageVolumes.h" configuration PacketParrotC { } implementation { components MainC; components LedsC; components PacketParrotP as App; components ActiveMessageC; components new LogStorageC(VOLUME_LOGTEST, TRUE); components new TimerMilliC() as Timer0; App.Boot -> MainC; App.Leds -> LedsC; App.Packet -> ActiveMessageC; App.AMPacket -> ActiveMessageC; App.AMControl -> ActiveMessageC; App.AMSend -> ActiveMessageC; App.Receive -> ActiveMessageC.Receive; App.Snoop -> ActiveMessageC.Snoop; App.LogRead -> LogStorageC; App.LogWrite -> LogStorageC; App.Timer0 -> Timer0; } tinyos-2.1.2+dfsg/apps/tutorials/PacketParrot/PacketParrotP.nc000066400000000000000000000111021207233610700244050ustar00rootroot00000000000000/* tab:2 * * Copyright (c) 2000-2007 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Implementation of the PacketParrot application. * * @author Prabal Dutta * @date Apr 6, 2007 * @author Janos Sallai * @date Jan 25, 2012 */ module PacketParrotP { uses { interface Boot; interface Leds; interface Packet; interface AMPacket; interface AMSend[uint8_t id]; interface Receive[uint8_t id]; interface Receive as Snoop[uint8_t id]; interface SplitControl as AMControl; interface LogRead; interface LogWrite; interface Timer as Timer0; } } implementation { enum { INTER_PACKET_INTERVAL = 25 }; typedef nx_struct logentry_t { nx_uint8_t len; message_t msg; } logentry_t; bool m_busy = TRUE; logentry_t m_entry; event void Boot.booted() { call AMControl.start(); } event void AMControl.startDone(error_t err) { if (err == SUCCESS) { if (call LogRead.read(&m_entry, sizeof(logentry_t)) != SUCCESS) { // Handle error. } } else { call AMControl.start(); } } event void AMControl.stopDone(error_t err) { } event void LogRead.readDone(void* buf, storage_len_t len, error_t err) { if ( (len == sizeof(logentry_t)) && (buf == &m_entry) ) { call AMSend.send[call AMPacket.type(&m_entry.msg)](call AMPacket.destination(&m_entry.msg), &m_entry.msg, m_entry.len); call Leds.led1On(); } else { if (call LogWrite.erase() != SUCCESS) { // Handle error. } call Leds.led0On(); } } event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { call Leds.led1Off(); if ( (err == SUCCESS) && (msg == &m_entry.msg) ) { call Packet.clear(&m_entry.msg); if (call LogRead.read(&m_entry, sizeof(logentry_t)) != SUCCESS) { // Handle error. } } else { call Timer0.startOneShot(INTER_PACKET_INTERVAL); } } event void Timer0.fired() { call AMSend.send[call AMPacket.type(&m_entry.msg)](call AMPacket.destination(&m_entry.msg), &m_entry.msg, m_entry.len); } event void LogWrite.eraseDone(error_t err) { if (err == SUCCESS) { m_busy = FALSE; } else { // Handle error. } call Leds.led0Off(); } event message_t* Receive.receive[uint8_t id](message_t* msg, void* payload, uint8_t len) { call Leds.led2On(); if (!m_busy) { m_busy = TRUE; m_entry.len = len; m_entry.msg = *msg; if (call LogWrite.append(&m_entry, sizeof(logentry_t)) != SUCCESS) { m_busy = FALSE; } } return msg; } event message_t* Snoop.receive[uint8_t id](message_t* msg, void* payload, uint8_t len) { return signal Receive.receive[id](msg, payload, len); } event void LogWrite.appendDone(void* buf, storage_len_t len, bool recordsLost, error_t err) { m_busy = FALSE; call Leds.led2Off(); } event void LogRead.seekDone(error_t err) { } event void LogWrite.syncDone(error_t err) { } } tinyos-2.1.2+dfsg/apps/tutorials/PacketParrot/README.txt000066400000000000000000000045721207233610700230570ustar00rootroot00000000000000$Id: README.txt,v 1.3 2007-04-19 07:39:18 prabal Exp $ README for PacketParrot Author/Contact: tinyos-help@millennium.berkeley.edu Description: PacketParrot demonstrates use of LogWrite and LogRead abstractions. A node writes received packets to a circular log and retransmits the logged packets (or at least the parts of the packets above the AM layer) when power cycled. The application logs packets it receives from the radio to flash. On a subsequent power cycle, the application transmits any logged packets, erases the log, and then continues to log packets again. The red LED is on when the log is being erased. The blue (yellow) LED turns on when a packet is received and turns off when a packet has been logged successfully. The blue (yellow) LED remains on when packets are being received but are not logged (because the log is being erased). The green LED flickers rapidly after a power cycle when logged packets are transmitted. To use this application: (i) Program one node (the "parrot") with this application using the typical command (e.g. make telosb install) (ii) Program a second node with the BlinkToRadio application. (iii) Turn the parrot node on. The red LED will turn on briefly, indicating that the flash volume is being erased. (iv) Turn the second node on. Nothing should happen on the second node but the blue (yellow) LED on the parrot node should start to blink, indicating it is receiving packets and logging them to flash. (v) After a few tens of seconds, focus you attention on the second node's LEDs and then power cycle the parrot node. The LEDs on the second node should rapidly flash as if they were displaying the three low-order bits of a counter. At the same time, the green LED on the parrot node should flicker rapidly, in unison with the LEDs on the second node, indicating that packets are being transmitted. (vi) Repeat step (v) a few times and notice that the parrot's blue (yellow) LED turns on and doesn't turn off until just a bit after the red LED, indicating that one or more packets were received (the LED turned on) but these packets were not logged (since the LED does not turn off) because the log is being erased. Tools: None Known bugs/limitations: None tinyos-2.1.2+dfsg/apps/tutorials/PacketParrot/volumes-at45db.xml000066400000000000000000000001621207233610700246450ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/PacketParrot/volumes-stm25p.xml000066400000000000000000000001641207233610700247160ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/apps/tutorials/Printf/000077500000000000000000000000001207233610700202145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/Printf/Makefile000066400000000000000000000001621207233610700216530ustar00rootroot00000000000000COMPONENT=TestPrintfAppC CFLAGS += -I$(TOSDIR)/lib/printf #CFLAGS += -DNEW_PRINTF_SEMANTICS include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/Printf/README.txt000066400000000000000000000015641207233610700217200ustar00rootroot00000000000000$Id: README.txt,v 1.4 2006-12-12 18:22:52 vlahan Exp $ README for Printf Author/Contact: tinyos-help@millennium.berkeley.edu Description: This application is used to test the basic functionality of the printf service. After starting the service, calls to the standard c-style printf command are made to print various strings of text over the serial line. The output can be displayed using the PrintfClient, for example using the following command line: java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSB0:115200 Successful execution of the application is indicated by repeated output of the following string sequence: Hi I am writing to you from my TinyOS application!! Here is a uint8: 123 Here is a uint16: 12345 Here is a uint32: 1234567890 ... Tools: net.tinyos.tools.PrintfClient Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tutorials/Printf/TestPrintfAppC.nc000066400000000000000000000051501207233610700234050ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This application is used to test the basic functionality of the printf service. * It is initiated by calling the start() command of the SplitControl interface * provided by the PrintfC component. After starting the printf service, calls to * the standard c-style printf command are made to print various strings of text * over the serial line. Only upon calling PrintfFlush.flush() does the data * actually get sent out over the serial line. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.3 $ * @date $Date: 2010-06-29 22:07:40 $ */ // Note: You can also add this define in your makefile to supress the // warning about the new printf semanics. Just all the following line: // CFLAGS += -DNEW_PRINTF_SEMANTICS #define NEW_PRINTF_SEMANTICS #include "printf.h" configuration TestPrintfAppC{ } implementation { components MainC, TestPrintfC; components new TimerMilliC(); components PrintfC; components SerialStartC; TestPrintfC.Boot -> MainC; TestPrintfC.Timer -> TimerMilliC; } tinyos-2.1.2+dfsg/apps/tutorials/Printf/TestPrintfC.nc000066400000000000000000000052731207233610700227520ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * This application is used to test the basic functionality of the printf service. * It is initiated by calling the start() command of the SplitControl interface * provided by the PrintfC component. After starting the printf service, calls to * the standard c-style printf command are made to print various strings of text * over the serial line. Only upon calling PrintfFlush.flush() does the data * actually get sent out over the serial line. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.3 $ * @date $Date: 2010-06-29 22:07:40 $ */ #include "printf.h" module TestPrintfC { uses { interface Boot; interface Timer; } } implementation { uint8_t dummyVar1 = 123; uint16_t dummyVar2 = 12345; uint32_t dummyVar3 = 1234567890; event void Boot.booted() { call Timer.startPeriodic(1000); } event void Timer.fired() { printf("Hi I am writing to you from my TinyOS application!!\n"); printf("Here is a uint8: %u\n", dummyVar1); printf("Here is a uint16: %u\n", dummyVar2); printf("Here is a uint32: %ld\n", dummyVar3); printfflush(); } } tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/000077500000000000000000000000001207233610700204775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/InterceptBase/000077500000000000000000000000001207233610700232275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/InterceptBase/BaseStationC.nc000066400000000000000000000103311207233610700260660ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The TinyOS 2.x base station that forwards packets between the UART * and radio.It replaces the GenericBase of TinyOS 1.0 and the * TOSBase of TinyOS 1.1. * *

    On the serial link, BaseStation sends and receives simple active * messages (not particular radio packets): on the radio link, it * sends radio active messages, whose format depends on the network * stack being used. BaseStation will copy its compiled-in group ID to * messages moving from the serial link to the radio, and will filter * out incoming radio messages that do not contain that group ID.

    * *

    BaseStation includes queues in both directions, with a guarantee * that once a message enters a queue, it will eventually leave on the * other interface. The queues allow the BaseStation to handle load * spikes.

    * *

    BaseStation acknowledges a message arriving over the serial link * only if that message was successfully enqueued for delivery to the * radio link.

    * *

    The LEDS are programmed to toggle as follows:

    *
      *
    • RED Toggle:: Message bridged from serial to radio
      • *
    • GREEN Toggle: Message bridged from radio to serial
      • *
    • YELLOW/BLUE Toggle: Dropped message due to queue overflow in either direction
      • *
    * * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay * @author Philip Levis * @author Dimas Abreu Dutra * @date January 29 2008 */ configuration BaseStationC { provides interface Intercept as RadioIntercept[am_id_t amid]; provides interface Intercept as SerialIntercept[am_id_t amid]; } implementation { components MainC, BaseStationP, LedsC; components ActiveMessageC as Radio, SerialActiveMessageC as Serial; RadioIntercept = BaseStationP.RadioIntercept; SerialIntercept = BaseStationP.SerialIntercept; MainC.Boot <- BaseStationP; BaseStationP.RadioControl -> Radio; BaseStationP.SerialControl -> Serial; BaseStationP.UartSend -> Serial; BaseStationP.UartReceive -> Serial; BaseStationP.UartPacket -> Serial; BaseStationP.UartAMPacket -> Serial; BaseStationP.RadioSend -> Radio; BaseStationP.RadioReceive -> Radio.Receive; BaseStationP.RadioSnoop -> Radio.Snoop; BaseStationP.RadioPacket -> Radio; BaseStationP.RadioAMPacket -> Radio; BaseStationP.Leds -> LedsC; } tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/InterceptBase/BaseStationP.nc000066400000000000000000000200301207233610700261000ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * @author Phil Buonadonna * @author Gilman Tolle * @author David Gay * @author Dimas Abreu Dutra */ /* * BaseStationP bridges packets between a serial channel and the radio. * Messages moving from serial to radio will be tagged with the group * ID compiled into the TOSBase, and messages moving from radio to * serial will be filtered by that same group id. */ #include "AM.h" #include "Serial.h" module BaseStationP @safe() { uses { interface Boot; interface SplitControl as SerialControl; interface SplitControl as RadioControl; interface AMSend as UartSend[am_id_t id]; interface Receive as UartReceive[am_id_t id]; interface Packet as UartPacket; interface AMPacket as UartAMPacket; interface AMSend as RadioSend[am_id_t id]; interface Receive as RadioReceive[am_id_t id]; interface Receive as RadioSnoop[am_id_t id]; interface Packet as RadioPacket; interface AMPacket as RadioAMPacket; interface Leds; } provides interface Intercept as RadioIntercept[am_id_t amid]; provides interface Intercept as SerialIntercept[am_id_t amid]; } implementation { enum { UART_QUEUE_LEN = 12, RADIO_QUEUE_LEN = 12, }; message_t uartQueueBufs[UART_QUEUE_LEN]; message_t *uartQueue[UART_QUEUE_LEN]; uint8_t uartIn, uartOut; bool uartBusy, uartFull; message_t radioQueueBufs[RADIO_QUEUE_LEN]; message_t *radioQueue[RADIO_QUEUE_LEN]; uint8_t radioIn, radioOut; bool radioBusy, radioFull; task void uartSendTask(); task void radioSendTask(); void dropBlink() { call Leds.led2Toggle(); } void failBlink() { call Leds.led2Toggle(); } event void Boot.booted() { uint8_t i; for (i = 0; i < UART_QUEUE_LEN; i++) uartQueue[i] = &uartQueueBufs[i]; uartIn = uartOut = 0; uartBusy = FALSE; uartFull = TRUE; for (i = 0; i < RADIO_QUEUE_LEN; i++) radioQueue[i] = &radioQueueBufs[i]; radioIn = radioOut = 0; radioBusy = FALSE; radioFull = TRUE; call RadioControl.start(); call SerialControl.start(); } event void RadioControl.startDone(error_t error) { if (error == SUCCESS) { radioFull = FALSE; } } event void SerialControl.startDone(error_t error) { if (error == SUCCESS) { uartFull = FALSE; } } event void SerialControl.stopDone(error_t error) {} event void RadioControl.stopDone(error_t error) {} uint8_t count = 0; message_t* receive(message_t* msg, void* payload, uint8_t len, am_id_t id); event message_t *RadioSnoop.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { return receive(msg, payload, len, id); } event message_t *RadioReceive.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { return receive(msg, payload, len, id); } message_t* receive(message_t *msg, void *payload, uint8_t len, am_id_t id) { message_t *ret = msg; if (!signal RadioIntercept.forward[id](msg,payload,len)) return ret; atomic { if (!uartFull) { ret = uartQueue[uartIn]; uartQueue[uartIn] = msg; uartIn = (uartIn + 1) % UART_QUEUE_LEN; if (uartIn == uartOut) uartFull = TRUE; if (!uartBusy) { post uartSendTask(); uartBusy = TRUE; } } else dropBlink(); } return ret; } uint8_t tmpLen; task void uartSendTask() { uint8_t len; am_id_t id; am_addr_t addr, src; message_t* msg; atomic if (uartIn == uartOut && !uartFull) { uartBusy = FALSE; return; } msg = uartQueue[uartOut]; tmpLen = len = call RadioPacket.payloadLength(msg); id = call RadioAMPacket.type(msg); addr = call RadioAMPacket.destination(msg); src = call RadioAMPacket.source(msg); call UartAMPacket.setSource(msg, src); if (call UartSend.send[id](addr, uartQueue[uartOut], len) == SUCCESS) call Leds.led1Toggle(); else { failBlink(); post uartSendTask(); } } event void UartSend.sendDone[am_id_t id](message_t* msg, error_t error) { if (error != SUCCESS) failBlink(); else atomic if (msg == uartQueue[uartOut]) { if (++uartOut >= UART_QUEUE_LEN) uartOut = 0; if (uartFull) uartFull = FALSE; } post uartSendTask(); } event message_t *UartReceive.receive[am_id_t id](message_t *msg, void *payload, uint8_t len) { message_t *ret = msg; bool reflectToken = FALSE; if (!signal SerialIntercept.forward[id](msg,payload,len)) return ret; atomic if (!radioFull) { reflectToken = TRUE; ret = radioQueue[radioIn]; radioQueue[radioIn] = msg; if (++radioIn >= RADIO_QUEUE_LEN) radioIn = 0; if (radioIn == radioOut) radioFull = TRUE; if (!radioBusy) { post radioSendTask(); radioBusy = TRUE; } } else dropBlink(); if (reflectToken) { //call UartTokenReceive.ReflectToken(Token); } return ret; } task void radioSendTask() { uint8_t len; am_id_t id; am_addr_t addr; message_t* msg; atomic if (radioIn == radioOut && !radioFull) { radioBusy = FALSE; return; } msg = radioQueue[radioOut]; len = call UartPacket.payloadLength(msg); addr = call UartAMPacket.destination(msg); id = call UartAMPacket.type(msg); if (call RadioSend.send[id](addr, msg, len) == SUCCESS) call Leds.led0Toggle(); else { failBlink(); post radioSendTask(); } } event void RadioSend.sendDone[am_id_t id](message_t* msg, error_t error) { if (error != SUCCESS) failBlink(); else atomic if (msg == radioQueue[radioOut]) { if (++radioOut >= RADIO_QUEUE_LEN) radioOut = 0; if (radioFull) radioFull = FALSE; } post radioSendTask(); } default event bool RadioIntercept.forward[am_id_t amid](message_t* msg, void* payload, uint8_t len) { return TRUE; } default event bool SerialIntercept.forward[am_id_t amid](message_t* msg, void* payload, uint8_t len) { return TRUE; } } tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/InterceptBase/Makefile000066400000000000000000000001771207233610700246740ustar00rootroot00000000000000COMPONENT=BaseStationC CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/RssiBase/000077500000000000000000000000001207233610700222125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/RssiBase/ApplicationDefinitions.h000066400000000000000000000033521207233610700270250ustar00rootroot00000000000000/* * Copyright (c) 2008 Dimas Abreu Dutra * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DIMAS ABREU * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Dimas Abreu Dutra */ #ifndef APPLICATIONDEFINITIONS_H__ #define APPLICATIONDEFINITIONS_H__ enum { SEND_INTERVAL_MS = 250 }; #endif //APPLICATIONDEFINITIONS_H__ tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/RssiBase/Makefile000066400000000000000000000003201207233610700236450ustar00rootroot00000000000000COMPONENT=RssiBaseAppC INCLUDES= -I.. \ -I../InterceptBase CFLAGS += $(INCLUDES) ifneq ($(filter iris,$(MAKECMDGOALS)),) CFLAGS += -DRF230_RSSI_ENERGY endif include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/RssiBase/RssiBaseAppC.nc000066400000000000000000000043401207233610700250140ustar00rootroot00000000000000/* * Copyright (c) 2008 Dimas Abreu Dutra * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DIMAS ABREU * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Dimas Abreu Dutra */ #include "RssiDemoMessages.h" #include "message.h" configuration RssiBaseAppC { } implementation { components BaseStationC; components RssiBaseC as App; #ifdef __CC2420_H__ components CC2420ActiveMessageC; App -> CC2420ActiveMessageC.CC2420Packet; #elif defined(PLATFORM_IRIS) components RF230ActiveMessageC; App -> RF230ActiveMessageC.PacketRSSI; #elif defined(PLATFORM_UCMINI) components RFA1ActiveMessageC; App -> RFA1ActiveMessageC.PacketRSSI; #elif defined(TDA5250_MESSAGE_H) components Tda5250ActiveMessageC; App -> Tda5250ActiveMessageC.Tda5250Packet; #endif App-> BaseStationC.RadioIntercept[AM_RSSIMSG]; } tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/RssiBase/RssiBaseC.nc000066400000000000000000000056651207233610700243660ustar00rootroot00000000000000/* * Copyright (c) 2008 Dimas Abreu Dutra * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DIMAS ABREU * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Dimas Abreu Dutra */ #include "ApplicationDefinitions.h" #include "RssiDemoMessages.h" module RssiBaseC { uses interface Intercept as RssiMsgIntercept; #ifdef __CC2420_H__ uses interface CC2420Packet; #elif defined(TDA5250_MESSAGE_H) uses interface Tda5250Packet; #else uses interface PacketField as PacketRSSI; #endif } implementation { uint16_t getRssi(message_t *msg); event bool RssiMsgIntercept.forward(message_t *msg, void *payload, uint8_t len) { RssiMsg *rssiMsg = (RssiMsg*) payload; rssiMsg->rssi = getRssi(msg); return TRUE; } #ifdef __CC2420_H__ uint16_t getRssi(message_t *msg){ return (uint16_t) call CC2420Packet.getRssi(msg); } #elif defined(CC1K_RADIO_MSG_H) uint16_t getRssi(message_t *msg){ cc1000_metadata_t *md =(cc1000_metadata_t*) msg->metadata; return md->strength_or_preamble; } #elif defined(PLATFORM_IRIS) || defined(PLATFORM_UCMINI) uint16_t getRssi(message_t *msg){ if(call PacketRSSI.isSet(msg)) return (uint16_t) call PacketRSSI.get(msg); else return 0xFFFF; } #elif defined(TDA5250_MESSAGE_H) uint16_t getRssi(message_t *msg){ return call Tda5250Packet.getSnr(msg); } #else #error Radio chip not supported! This demo currently works only \ for motes with CC1000, CC2420, RF230, RFA1 or TDA5250 radios. #endif } tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/RssiDemoMessages.h000066400000000000000000000034131207233610700240660ustar00rootroot00000000000000/* * Copyright (c) 2008 Dimas Abreu Dutra * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DIMAS ABREU * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Dimas Abreu Dutra */ #ifndef RSSIDEMOMESSAGES_H__ #define RSSIDEMOMESSAGES_H__ enum { AM_RSSIMSG = 10 }; typedef nx_struct RssiMsg{ nx_int16_t rssi; } RssiMsg; #endif //RSSIDEMOMESSAGES_H__ tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/SendingMote/000077500000000000000000000000001207233610700227135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/SendingMote/ApplicationDefinitions.h000066400000000000000000000033521207233610700275260ustar00rootroot00000000000000/* * Copyright (c) 2008 Dimas Abreu Dutra * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DIMAS ABREU * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Dimas Abreu Dutra */ #ifndef APPLICATIONDEFINITIONS_H__ #define APPLICATIONDEFINITIONS_H__ enum { SEND_INTERVAL_MS = 250 }; #endif //APPLICATIONDEFINITIONS_H__ tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/SendingMote/Makefile000066400000000000000000000001271207233610700243530ustar00rootroot00000000000000COMPONENT=SendingMoteAppC INCLUDES= -I.. CFLAGS += $(INCLUDES) include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/SendingMote/SendingMoteAppC.nc000066400000000000000000000037371207233610700262270ustar00rootroot00000000000000/* * Copyright (c) 2008 Dimas Abreu Dutra * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DIMAS ABREU * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Dimas Abreu Dutra */ #include "RssiDemoMessages.h" configuration SendingMoteAppC { } implementation { components ActiveMessageC, MainC; components new AMSenderC(AM_RSSIMSG) as RssiMsgSender; components new TimerMilliC() as SendTimer; components SendingMoteC as App; App.Boot -> MainC; App.SendTimer -> SendTimer; App.RssiMsgSend -> RssiMsgSender; App.RadioControl -> ActiveMessageC; } tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/SendingMote/SendingMoteC.nc000066400000000000000000000044171207233610700255620ustar00rootroot00000000000000/* * Copyright (c) 2008 Dimas Abreu Dutra * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DIMAS ABREU * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Dimas Abreu Dutra */ #include "ApplicationDefinitions.h" #include "RssiDemoMessages.h" module SendingMoteC { uses interface Boot; uses interface Timer as SendTimer; uses interface AMSend as RssiMsgSend; uses interface SplitControl as RadioControl; } implementation { message_t msg; event void Boot.booted(){ call RadioControl.start(); } event void RadioControl.startDone(error_t result){ call SendTimer.startPeriodic(SEND_INTERVAL_MS); } event void RadioControl.stopDone(error_t result){} event void SendTimer.fired(){ call RssiMsgSend.send(AM_BROADCAST_ADDR, &msg, sizeof(RssiMsg)); } event void RssiMsgSend.sendDone(message_t *m, error_t error){} } tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/java/000077500000000000000000000000001207233610700214205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/java/Makefile000066400000000000000000000003261207233610700230610ustar00rootroot00000000000000all: RssiDemo.class RssiMsg.class: RssiMsg.java javac $< RssiDemo.class: RssiDemo.java RssiMsg.java javac $^ RssiMsg.java: ../RssiDemoMessages.h mig java -target=null -java-classname=RssiMsg $< RssiMsg -o $@ tinyos-2.1.2+dfsg/apps/tutorials/RssiDemo/java/RssiDemo.java000066400000000000000000000062241207233610700240140ustar00rootroot00000000000000/* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * This is a modified version of TestSerial.java, from apps/tests/TestSerial * from TinyOS 2.x (www.tinyos.net) */ /** * Java-side application for testing the RSSI demo * * @author Phil Levis * @author Dimas Abreu Dutra * @date April 11 2008 */ import java.io.IOException; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class RssiDemo implements MessageListener { private MoteIF moteIF; public RssiDemo(MoteIF moteIF) { this.moteIF = moteIF; this.moteIF.registerListener(new RssiMsg(), this); } public void messageReceived(int to, Message message) { RssiMsg msg = (RssiMsg) message; int source = message.getSerialPacket().get_header_src(); System.out.println("Rssi Message received from node " + source + ": Rssi = " + msg.get_rssi()); } private static void usage() { System.err.println("usage: RssiDemo [-comm ]"); } public static void main(String[] args) throws Exception { String source = null; if (args.length == 2) { if (!args[0].equals("-comm")) { usage(); System.exit(1); } source = args[1]; } else if (args.length != 0) { usage(); System.exit(1); } PhoenixSource phoenix; if (source == null) { phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); } else { phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); } MoteIF mif = new MoteIF(phoenix); RssiDemo serial = new RssiDemo(mif); } } tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/000077500000000000000000000000001207233610700224755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/Makefile000066400000000000000000000000671207233610700241400ustar00rootroot00000000000000COMPONENT=SharedResourceDemoAppC include $(MAKERULES) tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/README.txt000066400000000000000000000022371207233610700241770ustar00rootroot00000000000000README for SharedResourceDemo Author/Contact: tinyos-help@millennium.berkeley.edu @author Kevin Klues Description: This application is used to test the use of Shared Resources. Three Resource users are created and all three request control of the resource before any one of them is granted it. Once the first user is granted control of the resource, it performs some operation on it. Once this operation has completed, a timer is set to allow this user to have control of it for a specific amount of time. Once this timer expires, the resource is released and then immediately requested again. Upon releasing the resource control will be granted to the next user that has requested it in round robin order. Initial requests are made by the three resource users in the following order. -- Resource 0 -- Resource 2 -- Resource 1 It is expected then that using a round robin policy, control of the resource will be granted in the order of 0,1,2 and the Leds corresponding to each resource will flash whenever this occurs. -- Led 0 -> Resource 0 -- Led 1 -> Resource 1 -- Led 2 -> Resource 2 Tools: None. Known bugs/limitations: None. tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/ResourceOperations.nc000066400000000000000000000040741207233610700266570ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An EXAMPLE of an interface for performing operations on a resource. * In this test application it is provided by the dedicated ResourceP component * and passed through all of the proper components before being exposed by the * shared resource at the topmost level. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:40 $ */ interface ResourceOperations { command error_t operation(); event void operationDone(error_t error); } tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/ResourceP.nc000066400000000000000000000052461207233610700247350ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is an example implementation of a dedicated resource. * It provides the SplitControl interface for power management * of the resource and an EXAMPLE ResourceOperations interface * for performing operations on it. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:40 $ */ module ResourceP { provides { interface SplitControl; interface ResourceOperations; } } implementation { bool lock; task void startDone() { lock = FALSE; signal SplitControl.startDone(SUCCESS); } task void stopDone() { signal SplitControl.stopDone(SUCCESS); } task void operationDone() { lock = FALSE; signal ResourceOperations.operationDone(SUCCESS); } command error_t SplitControl.start() { post startDone(); return SUCCESS; } command error_t SplitControl.stop() { lock = TRUE; post stopDone(); return SUCCESS; } command error_t ResourceOperations.operation() { if(lock == FALSE) { lock = TRUE; post operationDone(); return SUCCESS; } return FAIL; } } tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/SharedResourceC.nc000066400000000000000000000051511207233610700260420ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SharedResourceC is used to provide a generic configuration around * the SharedResourceP component so that new instantiations of * it provide a single set of interfaces that are all properly associated * with one another rather than requiring the user to deal with the complexity * of doing this themselves. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:40 $ */ #define UQ_SHARED_RESOURCE "Shared.Resource" generic configuration SharedResourceC() { provides interface Resource; provides interface ResourceRequested; provides interface ResourceOperations; uses interface ResourceConfigure; } implementation { components SharedResourceP; enum { RESOURCE_ID = unique(UQ_SHARED_RESOURCE) }; Resource = SharedResourceP.Resource[RESOURCE_ID]; ResourceRequested = SharedResourceP.ResourceRequested[RESOURCE_ID]; ResourceOperations = SharedResourceP.ResourceOperations[RESOURCE_ID]; ResourceConfigure = SharedResourceP.ResourceConfigure[RESOURCE_ID]; } tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/SharedResourceDemoAppC.nc000066400000000000000000000066231207233610700273150ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * This application is used to test the use of Shared Resources. * Three Resource users are created and all three request * control of the resource before any one of them is granted it. * Once the first user is granted control of the resource, it performs * some operation on it. Once this operation has completed, a timer * is set to allow this user to have control of it for a specific * amount of time. Once this timer expires, the resource is released * and then immediately requested again. Upon releasing the resource * control will be granted to the next user that has requested it in * round robin order. Initial requests are made by the three resource * users in the following order.
    *
  • Resource 0 *
  • Resource 2 *
  • Resource 1 *
    * It is expected then that using a round robin policy, control of the * resource will be granted in the order of 0,1,2 and the Leds * corresponding to each resource will flash whenever this occurs.
    *
  • Led 0 -> Resource 0 *
  • Led 1 -> Resource 1 *
  • Led 2 -> Resource 2 *
    * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:40 $ */ configuration SharedResourceDemoAppC{ } implementation { components MainC,LedsC, SharedResourceDemoC as App, new TimerMilliC() as Timer0, new TimerMilliC() as Timer1, new TimerMilliC() as Timer2; App -> MainC.Boot; App.Leds -> LedsC; App.Timer0 -> Timer0; App.Timer1 -> Timer1; App.Timer2 -> Timer2; components new SharedResourceC() as Resource0, new SharedResourceC() as Resource1, new SharedResourceC() as Resource2; App.Resource0 -> Resource0; App.Resource1 -> Resource1; App.Resource2 -> Resource2; App.ResourceOperations0 -> Resource0; App.ResourceOperations1 -> Resource1; App.ResourceOperations2 -> Resource2; } tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/SharedResourceDemoC.nc000066400000000000000000000111421207233610700266440ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * * This application is used to test the use of Shared Resources. * Three Resource users are created and all three request * control of the resource before any one of them is granted it. * Once the first user is granted control of the resource, it performs * some operation on it. Once this operation has completed, a timer * is set to allow this user to have control of it for a specific * amount of time. Once this timer expires, the resource is released * and then immediately requested again. Upon releasing the resource * control will be granted to the next user that has requested it in * round robin order. Initial requests are made by the three resource * users in the following order.
    *
  • Resource 0 *
  • Resource 2 *
  • Resource 1 *
    * It is expected then that using a round robin policy, control of the * resource will be granted in the order of 0,1,2 and the Leds * corresponding to each resource will flash whenever this occurs.
    *
  • Led 0 -> Resource 0 *
  • Led 1 -> Resource 1 *
  • Led 2 -> Resource 2 *
    * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:40 $ */ module SharedResourceDemoC { uses { interface Boot; interface Leds; interface Timer as Timer0; interface Timer as Timer1; interface Timer as Timer2; interface Resource as Resource0; interface ResourceOperations as ResourceOperations0; interface Resource as Resource1; interface ResourceOperations as ResourceOperations1; interface Resource as Resource2; interface ResourceOperations as ResourceOperations2; } } implementation { #define HOLD_PERIOD 250 //All resources try to gain access event void Boot.booted() { call Resource0.request(); call Resource2.request(); call Resource1.request(); } //If granted the resource, run some operation event void Resource0.granted() { call ResourceOperations0.operation(); } event void Resource1.granted() { call ResourceOperations1.operation(); } event void Resource2.granted() { call ResourceOperations2.operation(); } //When the operation completes, flash the LED and hold the resource for a while event void ResourceOperations0.operationDone(error_t error) { call Timer0.startOneShot(HOLD_PERIOD); call Leds.led0Toggle(); } event void ResourceOperations1.operationDone(error_t error) { call Timer1.startOneShot(HOLD_PERIOD); call Leds.led1Toggle(); } event void ResourceOperations2.operationDone(error_t error) { call Timer2.startOneShot(HOLD_PERIOD); call Leds.led2Toggle(); } //After the hold period release the resource and request it again event void Timer0.fired() { call Resource0.release(); call Resource0.request(); } event void Timer1.fired() { call Resource1.release(); call Resource1.request(); } event void Timer2.fired() { call Resource2.release(); call Resource2.request(); } } tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/SharedResourceImplP.nc000066400000000000000000000052171207233610700267040ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The SharedResourceImplP component is used to wrap all of the operations * from a dedicated resource so that access to them is protected when * it is used as a shared resource. It uses the ArbiterInfo interface * provided by an Arbiter to accomplish this. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:40 $ */ module SharedResourceImplP { provides { interface ResourceOperations as SharedResourceOperations[uint8_t id]; } uses { interface ArbiterInfo; interface ResourceOperations; } } implementation { uint8_t current_id = 0xFF; event void ResourceOperations.operationDone(error_t error) { signal SharedResourceOperations.operationDone[current_id](error); } command error_t SharedResourceOperations.operation[uint8_t id]() { if(call ArbiterInfo.userId() == id && call ResourceOperations.operation() == SUCCESS) { current_id = id; return SUCCESS; } return FAIL; } default event void SharedResourceOperations.operationDone[uint8_t id](error_t error) {} } tinyos-2.1.2+dfsg/apps/tutorials/SharedResourceDemo/SharedResourceP.nc000066400000000000000000000051111207233610700260530ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The SharedResourceP component is used to create a shared resource * out of a dedicated one. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:40 $ */ #define UQ_SHARED_RESOURCE "Shared.Resource" configuration SharedResourceP { provides interface Resource[uint8_t id]; provides interface ResourceRequested[uint8_t id]; provides interface ResourceOperations[uint8_t id]; uses interface ResourceConfigure[uint8_t id]; } implementation { components new RoundRobinArbiterC(UQ_SHARED_RESOURCE) as Arbiter; components new SplitControlPowerManagerC() as PowerManager; components ResourceP; components SharedResourceImplP; ResourceOperations = SharedResourceImplP; Resource = Arbiter; ResourceRequested = Arbiter; ResourceConfigure = Arbiter; SharedResourceImplP.ArbiterInfo -> Arbiter; PowerManager.ResourceDefaultOwner -> Arbiter; PowerManager.SplitControl -> ResourceP; SharedResourceImplP.ResourceOperations -> ResourceP; } tinyos-2.1.2+dfsg/licenses/000077500000000000000000000000001207233610700155665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/licenses/bsd.txt000066400000000000000000000030621207233610700171000ustar00rootroot00000000000000/* * Copyright (c) 2011 * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ tinyos-2.1.2+dfsg/release-notes.txt000066400000000000000000000066351207233610700173020ustar00rootroot00000000000000These release notes are as of: $Date: 2010-01-20 20:00:48 $ 2.1.2: Suports updated msp430 and avr compilers Added RPL stack Fixed bugs in RFX2xx radio stack 2.1.1: Added support for automatic default LPL interval Added platform-indepdent TOS_SLEEP_NONE for McuPowerOverride Added support for mulle platform Added support for epic platform Added support for shimmer2 platform Added DHV dissemination protocol in lib/net/dhv Added 6lowpan/IP support in lib/net/blip Improved CTP forwarder code to save code and RAM Improved MSP430 sleep code to default to LPM4 Improved TOSSIM PRR curve to prevent very low SNR packets Improved Queue performance by changing % to inequality test Improved TOSThreads tutorials and documentation Improved python sdk Refactored AM layer to better support 6lowpan Fixed TOSSIM bug where nodes could receive while transmitting Fixed TOSSIM ack bug for nodes that change their AM id at runtime Fixed Trickle bugs that could cause timers to fire slightly off Fixed Pool bug that did not allow large (> 127 element) pools 2.1: Added support for iris platform Added support for shimmer platform Added 4-bit link estimator to CTP in lib/net/4bitle Added DIP dissemination protocol in lib/net/dip Added FTSP time synchronization service in lib/ftsp Added TOSThreads library in lib/tosthreads Added SafeTinyOS support with 'safe' make option Added support for 802.15.4 T-Frames through 'tframe' make option Added TKN15.4, a platform-independent 802.15.4-2006 MAC implementation Added low-power application tutorial Added printf tutorial Added TEPs Changed 802.15.4 stacks to use I-Frames by default (TEP 125) Changed Packet interface to better support type checking Changed Receive interface to support fan-in Changed atm128 I2C bus to obey same addressing as MSP430 Changed printf implementation to no longer require explicit wiring of PrintfC component Fixed memory leak in CTP on duplicate suppression 2.0.2: Added reimplementation of low-power CC2420 stack to support AUTOACK and SACK Added Deluge and related tools (support for micaZ and telosb only) Added TEPs Added 64-bit support for Java support code Fixed oscillator calibration bug in MSP430 USART Fixed clear channel detection bug in TOSSIM Fixed errors in tutorial text Fixed deadlock in C-based serial forwarder Fixed bugs in at45db and stm25p storage stacks 2.0.1: Added low-power cc2420 stack as default on relevant platforms Added lib/printf (simple serial messages) Added lib/net/lqi (LQI-based collection layer for CC2420 platforms) Added sensorboards/mts300 (mica sensor board) Added noise modeling to TOSSIM (captures temporal correlation) Added TEPs Added tutorials Changes to Resource management interfaces and components Change to atmega128 ADC: output is no longer left-justified Fixed cancellation bug in active message layers (no sendDone) Fixed errors in tutorial text Fixed interface errors in dissemination Fixed lockup bug in atmega128 streaming reads Fixed lockup bug in atmega128 SPI stack (0-length writes) Fixed lockup bug in atmega128 I2C stack (power management) Fixed memory access bugs in serial stack and AM queue (from John Regehr) Fixed TMote sleep power consumption for newest RHoS nodes New atmega128 timer stack fixes mica-family timer problems Numerous optimizations and performance improvements Numerous additional bug fixes tinyos-2.1.2+dfsg/support/000077500000000000000000000000001207233610700154755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/000077500000000000000000000000001207233610700164125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/Makedefaults000066400000000000000000000012061207233610700207410ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: Makedefaults,v 1.8 2008-06-18 20:22:51 razvanm Exp $ DEFAULT_LOCAL_GROUP ?= 0x22 OPTFLAGS ?= -Os NESC_FLAGS ?= -Wnesc-all GOALS += ident_flags tos_image tosboot define DEFAULT_HELP Welcome to the TinyOS make system! You must specify one of the valid targets and possibly some combination of the extra options. Many targets have custom extras and extended help, so be sure to try "make help" to learn of all the available features. Global extras: docs : compile additional nescdoc documentation tinysec : compile with TinySec secure communication endef HELP += $(DEFAULT_HELP) tinyos-2.1.2+dfsg/support/make/Makefile000066400000000000000000000000231207233610700200450ustar00rootroot00000000000000include Makerules tinyos-2.1.2+dfsg/support/make/Makerules000066400000000000000000000156551207233610700203010ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: Makerules,v 1.6 2008/09/26 20:13:58 klueska Exp $ # @author Cory Sharp ### --- This makefile requires GNU Make version 3.80 or newer. ### --- ### --- Prepare variables ### --- # Get TOSDIR from ncc if it isn't set already. ifndef TOSDIR TOSDIR := $(shell ncc -print-tosdir) endif # Mung MAKERULES for Cygwin; see the warning below for more details. ifneq ($(findstring \,$(MAKERULES)),) MAKERULES := $(subst \,/,$(MAKERULES)) define BACKSLASH_WARNING warning, MAKERULES contains backslashes. The environment variable MAKERULES contains backslashes \'s. This can cause shell scripts including ones in this make system to fail in strange ways. I've changed those to forward slashes for you for this build. However, you are strongly encouraged to respecify MAKERULES as either a standard unix-style path or as a mixed-style path where the backslashes are replaced with forward slashes /'s. endef $(warning $(BACKSLASH_WARNING)) endif # Deduce TINYOS_MAKE_PATH, the path to this file, if it's not defined already. ifndef TINYOS_MAKE_PATH ifdef MAKERULES TINYOS_MAKE_PATH := $(dir $(MAKERULES)) TINYOS_MAKE_PATH := $(TINYOS_MAKE_PATH:%/=%) else TINYOS_MAKE_PATH := $(TOSDIR)/../support/make endif endif # Use a default Makelocal if it's not defined already. TINYOS_MAKELOCAL ?= $(TINYOS_MAKE_PATH)/Makelocal # Use a default Makedefaults if it's not defined already. TINYOS_MAKEDEFAULTS ?= $(TINYOS_MAKE_PATH)/Makedefaults # Allow users to specify additional directories to find TOSMake files. TOSMAKE_PATH += $(TINYOS_MAKE_PATH) # Save makecmdgoals (a read only var) to goals so that we can modify it. GOALS += $(MAKECMDGOALS) # Extract user options from goals of the form opt,arg, transform to opt=arg, # and evaluate. Then, reduce GOALS to have the args removed. OptRE := [,.] GoalOpts := $(shell perl -e 'print join " ", map {s{^(.*?)$(OptRE)}{\U$$1=};$$_} grep /$(OptRE)/, split /\s+/, "$(GOALS)";') GOALS := $(shell perl -e '$$_="$(GOALS)"; s{$(OptRE)\S*}{}g; print;') $(foreach opt,$(GoalOpts),$(eval $(opt))) ### --- ### --- Define make functions. ### --- (Lord, this is ugly. I want a real scripting language so bad.) ### --- ### --- The functions a user will generally be interested in are ### --- TOSMake_include(file) ### --- TOSMake_include_platform(dir) ### --- # names(words) # Produce option names, like junk from /path/to/junk.target. names = $(sort $(basename $(notdir $(1)))) # TOSMake_find(file_or_dir) # Search for file_or_dir within TOSMAKE_PATH. For the special case of # initializing TOSMAKE_PATH itself, this function does not search # TOSMAKE_PATH if file_or_dir begins with +. sh_search = for a in $(TOSMAKE_PATH); do [ -e "$$a/$$n" ] && echo "$$a/$$n" && break; done TOSMake_find = $(if $(filter +%,$(1)),$(1:+%=%),$(shell n="$(1)"; $(sh_search))) # TOSMake_makelist(dir,extension) # Get a list of files with the given extension from a directory which MUST # be a subdir under TOSMAKE_PATH. TOSMake_makelist = $(wildcard $(call TOSMake_find,$(1))/*.$(2)) # TOSMake_include(file) # Include a makefile which MUST be in a dir or subdir under TOSMAKE_PATH. TOSMake_include = $(eval include $(call TOSMake_find,$(1))) # TOSMake_extra_targets(name) # Create a default make targets for a TOSMake extra full with its possible # options afterward. define TOSMake_extra_targets $(subst :,%,$(1)): FORCE @: endef # TOSMake_include_dir(dir) # Pull in .extras and .targets from a directory which MUST be a subdir # under TOSMAKE_PATH. Create default extra rules as necessary, etc. TOSMake_include_dir = $(eval $(call TOSMake_include_dir_define,$(1))) define TOSMake_include_dir_define $(eval NEW_EXTRAS := $(call TOSMake_makelist,$(1),extra)) $(eval NEW_TARGETS := $(call TOSMake_makelist,$(1),target)) $(eval VALID_EXTRAS += $(NEW_EXTRAS)) $(eval VALID_TARGETS += $(NEW_TARGETS)) $(eval EXTRAS = $(filter $(call names,$(VALID_EXTRAS)),$(GOALS))) $(eval TARGETS = $(filter $(call names,$(VALID_TARGETS)),$(GOALS))) $(eval OTHERS = $(filter-out $(EXTRAS) $(TARGETS),$(GOALS))) $(foreach file,$(NEW_EXTRAS) $(NEW_TARGETS),$(if $(filter $(call names,$(file)),$(GOALS)),$(eval include $(file)))) endef TOSMake_accum_dir = $(eval $(call TOSMake_accum_dir_define,$(1))) define TOSMake_accum_dir_define $(eval NEW_EXTRAS := $(call TOSMake_makelist,$(1),extra)) $(eval NEW_TARGETS := $(call TOSMake_makelist,$(1),target)) $(eval VALID_EXTRAS += $(NEW_EXTRAS)) $(eval VALID_TARGETS += $(NEW_TARGETS)) $(eval TARGETS = $(filter $(call names,$(VALID_TARGETS)),$(GOALS))) endef # TOSMake_include_platform(dir) # Pull in a directory as a new TOSMake platform, which MUST be a subdir of # TOSMAKE_PATH. A platform directory must also have a .rules file, which # is automatically evaluated. TOSMake_include_platform=$(eval $(call TOSMake_include_platform_define,$(1))) define TOSMake_include_platform_define $(call TOSMake_include_dir,$(1)) $(call TOSMake_include,$(1)/$(1).rules) endef ### --- ### --- Include Makelocal and Makedefaults ### --- # Makelocal comes first to allow overriding Makedefaults. -include $(TINYOS_MAKELOCAL) -include $(TINYOS_MAKEDEFAULTS) PLATFORMDIR ?= $(TOSDIR)/platforms/$(PLATFORM) # Mark TOSMAKE_PATH with a + so that they're not searched for by TOSMake_find. $(foreach incdir,$(addprefix +,$(TOSMAKE_PATH)),$(call TOSMake_accum_dir,$(incdir))) $(foreach file,$(VALID_EXTRAS),$(if $(filter $(call names,$(file)),$(GOALS)),$(eval include $(file)))) $(foreach file,$(VALID_TARGETS),$(if $(filter $(call names,$(file)),$(GOALS)),$(eval include $(file)))) # Make default rules for each extra with full argument $(foreach goal,$(MAKECMDGOALS),$(if $(filter-out $(TARGETS) help,$(goal)),$(eval $(call TOSMake_extra_targets,$(goal))))) ### --- ### --- Define USAGE, print help if necessary or requested, etc. ### --- # USAGE is printed out when help is requested. Files other than this should # add text to HELP, not USAGE. define USAGE Usage: make make help Valid targets: $(call names,$(VALID_TARGETS)) Valid extras: $(call names,$(VALID_EXTRAS)) $(HELP) endef # If no target or an invalid target is specified, print usage. ifeq ($(TARGETS),) ifeq ($(GOALS),) $(error $(USAGE)Please specify a valid target) else $(error $(USAGE)ERROR, "$(GOALS)" does not specify a valid target) endif endif # If the user specifically had help on the command line, don't build any # targets, instead display help information and exit with a nice error. ifeq ($(filter help,$(GOALS)),help) define USAGE Usage: make $(TARGETS) Valid targets: $(call names,$(VALID_TARGETS)) Valid extras: $(call names,$(VALID_EXTRAS)) $(HELP) endef $(error $(USAGE)Thank you) endif $(COMPONENT).nc: @echo "ERROR: You need to create a top level file called $(COMPONENT).nc, or modify your local Makefile to point to the real name of your top level component." @false .PHONY: FORCE tinyos-2.1.2+dfsg/support/make/README000066400000000000000000000120601207233610700172710ustar00rootroot00000000000000README for the TinyOS Make System created on 7 Jan 2004 written by Cory Sharp updated on 16 Apr 2004 by Cory Sharp To describe new TOSMAKE_INCLUDE variable for user make subdirectories. $Id: README,v 1.4 2006-12-12 18:22:55 vlahan Exp $ ---------------------------------------------------------------------------- Introduction ---------------------------------------------------------------------------- This is a new make system. It's nicer than the old apps/Makerules, especially for adding new targets and platforms. Basically, new features can be added without getting in the way of existing make platforms and rules. ---------------------------------------------------------------------------- Quick Start ---------------------------------------------------------------------------- To use this build system, GNU Make 3.80 or greater is required; check with "make --version". Then, set MAKERULES, find an application, and try make export MAKERULES=`ncc -print-tosdir`/../tools/make/Makerules cd `ncc -print-tosdir`/../apps/Blink #or any app dir make telos help The end of this document has a few notes on some issues that can arise with GNU Make 3.80. ---------------------------------------------------------------------------- Directory Structure and Naming Conventions ---------------------------------------------------------------------------- The root of the make system is the make/ directory in which this README is located. You'll find two main types of files with the extensions .target and .extra. Both types of files define valid make goals. A target file must define a valid make target of the same name. An extra file automatically has a dummy target created for it, making it useful for defining extra make variables given a particular goal on the command line. There are also subdirectories in make/, such as make/avr/ and make/hc08/. Files in these directories are not exposed to the current build unless imported from another goal. For instance, the mica2 target imports the avr/ directory with the command "$(call TOSMake_include_platform,avr)", which further exposes the target and extra files in the avr subdirectory as valid goals for the current build. The TOSMake_include_platform function expects to find a .rules file of the same name as the directory, such as avr/avr.rules. It is expected that the primary build behavior occurs in a platform/platform.rules file (such as avr/avr.rules). Further target and extra goals in that platform make directory should augment the behavior of the rules file. Then, platform build targets are globally exposed by creating a simple .target file in the make/ root. Overall, this structure gives a lot of opportunity to change the behavior of a build given goals on the command line with few or no ifdef's in the makefiles. And, each make behavior is localized to a single file, which I think should be pretty nice. There's also a make/Makerules file. Do not edit make/Makerules. No new build features should ever be exposed via make/Makerules, but rather though the .rules, .target, and .extra files. Let me repeat, do not edit make/Makerules, add new features elsewhere. make/Makerules is the frontend that defines the structure and behavior on those special file extensions. ---------------------------------------------------------------------------- User make/ directories ---------------------------------------------------------------------------- I've added a new variable TOSMAKE_PATH that allows you to define additional root directories for the TinyOS Make System that behave just like the primary make/ directory. In one of your own make files, just add one or more directories to TOSMAKE_PATH sometime before make/Makerules is included: TOSMAKE_PATH += $(TOSDIR)/../contrib/eyes/make That's all you need, and you're in business. Enjoy. ---------------------------------------------------------------------------- make 3.80 ---------------------------------------------------------------------------- The standard version of GNU Make 3.80 (based on October 2002 source) has a bug which this make system can trigger. If a make variable is longer than 200 bytes (characters), then make will report that it has run out of virtual memory and exit. This can happen if, for example, your application depends on a lot of Java/mig message classes, which are BUILD_EXTRA_DEPS. The only way to fix this problem is to use a newer, patched version of make 3.80. All TinyOS releases after 1.1.8 should have a patched version, and will work properly. Pre-1.1.7 versions, however, may run into this problem; you can either upgrade to >= 1.1.8, or download the make source, apply the patch 'eval-crash.diff' in this directory, and compile then install the patched version. ---------------------------------------------------------------------------- Go go go ---------------------------------------------------------------------------- ... okay, hopefully that's enough head's up that you can poke around this directory tree and add new targets, extras, and platforms. Good luck, and holler if you want more documentation. tinyos-2.1.2+dfsg/support/make/all.target000066400000000000000000000004151207233610700203720ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: all.target,v 1.4 2006-12-12 18:22:55 vlahan Exp $ PLATFORMS ?= mica mica2 mica2dot telos micaz pc all: FORCE for target in $(filter-out $(INVALID_PLATFORMS),$(PLATFORMS)); do cmd="make $$target"; echo ".... $$cmd"; $$cmd; done tinyos-2.1.2+dfsg/support/make/appdoc.extra000066400000000000000000000012541207233610700207270ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: appdoc.extra,v 1.2 2008-05-02 20:49:44 idgay Exp $ # configure the base for the app dirs. This is used to generate more # useful package names in the documentation. ifeq ($(BASEDIR)_x, _x) BASEDIR := $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' ) endif BUILD_DEPS = appdoc_ ifeq ($(filter quiet,$(APPDOC)),quiet) QUIET = -quiet endif appdoc_: FORCE @echo " Making application documentation for $(COMPONENT) on $(PLATFORM)" # first generate the xml files nesdoc -o build $(NESDOC_FLAGS) $(PFLAGS) $(CFLAGS) $(COMPONENT).nc -app $(QUIET) # generate html from the xml files nesdoc -o build -html -target=$(PLATFORM) $(QUIET) tinyos-2.1.2+dfsg/support/make/avr/000077500000000000000000000000001207233610700172025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/avr/avr-studio-debug.extra000066400000000000000000000015701207233610700234330ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: avr-studio-debug.extra,v 1.2 2009-01-21 16:26:55 sallai Exp $ BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS) buildelf APPC_WINPATH = $(BUILDDIR)/app-winpath.c MAIN_ELF = $(BUILDDIR)/main.elf # no inlining or optimizations OPTFLAGS += -O0 -fnesc-no-inline # produce dwarf-2 debug information for AVR Studio OPTFLAGS += -gdwarf-2 # we use ncc to invoke gcc thus need to allow dollars in identifiers #OPTFLAGS += -fdollars-in-identifiers # alternatively, we can use a different separator PFLAGS += -fnesc-separator=__ buildelf: FORCE @echo " building ELF output $(MAIN_ELF) for debugging in AVR Studio" @perl -pe 's/#(.*)\"(.*)\"/ "#$$1\"".`cygpath -ma $$2`."\""/e; s/\n\"/\"/;' $(BUILDDIR)/app.c > $(APPC_WINPATH) @$(NCC) -o $(MAIN_ELF) $(NCC_SAFE_TINYOS_FLAGS) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(APPC_WINPATH) $(LIBS) $(LDFLAGS) tinyos-2.1.2+dfsg/support/make/avr/avr.rules000066400000000000000000000113261207233610700210510ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: avr.rules,v 1.29 2010-03-17 00:38:04 klueska Exp $ define AVR_HELP AVR extras: debug : compile with minimal optimization and debug symbols debugopt : compile with debug symbols Programmer options: dapa : (default) use parallel port programmer mib510, : use MIB510/MIB520 serial port programming board at port eprb, : use EPRB (MIB600) at hostname avrisp, : use AVRISP serial programmer at port The dev or host parameter for the programmer option need not be specified, in which case it is expected to be defined as in an environment variable of the same name in all caps (such as MIB510, EPRB, or AVRISP). endef HELP += $(AVR_HELP) ifdef MAKE_DEPUTY_FLAG NCC_SAFE_TINYOS_FLAGS = -DSAFE_TINYOS -I$(TOSDIR)/lib/safe -fnesc-deputy -fnesc-deputy-args='-I$(TOSDIR)/lib/safe/include --FLIDs=build/$(PLATFORM)/flids.txt --envmachine -DSAFE_TINYOS --nolib ' else NCC_SAFE_TINYOS_FLAGS = endif OBJCOPY = avr-objcopy OBJDUMP = avr-objdump SET_ID = tos-set-symbols PROGRAMMER ?= uisp NCC = ncc LIBS = -lm # Use __ as the separator - requires nesC 1.2.9 or later ifneq ($(filter sim,$(GOALS)),sim) ifneq ($(filter sim-sf,$(GOALS)),sim-sf) PFLAGS += -fnesc-separator=__ endif endif AMADDR = ActiveMessageAddressC__addr BUILDDIR ?= build/$(PLATFORM) MAIN_EXE = $(BUILDDIR)/main.exe MAIN_SREC = $(BUILDDIR)/main.srec MAIN_IHEX = $(BUILDDIR)/main.ihex INSTALL_SREC = $(MAIN_SREC).out$(if $(NODEID),-$(NODEID),) VOLUMEFILE ?= volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db VOLUME_ALLOCATOR_FLAGS ?= PFLAGS += -Wall -Wshadow $(NESC_FLAGS) PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD) ifdef MSG_SIZE PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE) endif ifdef DEFAULT_LOCAL_GROUP PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) endif AVRGCCMAJOR = $(shell avr-gcc -v 2>&1 | grep "gcc version" | sed -n 's/gcc version \([2-5]\)\.\([0-9]\)\.\([0-9]\).*/\1/p') ifeq ($(AVRGCCMAJOR),4) PFLAGS += --param max-inline-insns-single=100000 else PFLAGS += -finline-limit=100000 endif ifeq ($(PROGRAMMER),avrdude) ifeq ($(findstring Darwin, $(shell uname)), Darwin) AVRDUDE_CONF ?= /opt/local/etc/avrdude.conf endif ifeq ($(shell [ -f /etc/avrdude/avrdude.conf ] && echo subdir),subdir) AVRDUDE_CONF ?= /etc/avrdude/avrdude.conf else AVRDUDE_CONF ?= /etc/avrdude.conf endif ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) AVRDUDE_CONF := $(shell cygpath -ms $(AVRDUDE_CONF)) endif PROGRAMMER_EXTRA_FLAGS += -C$(AVRDUDE_CONF) # PROGRAMMER_EXTRA_FLAGS += -v -v endif ifdef DEFAULT_PROGRAM_AVR DEFAULT_PROGRAM = $(DEFAULT_PROGRAM_AVR) endif DEFAULT_PROGRAM ?= dapa BUILDLESS_DEPS += bytes ifndef NOWIRING include $(TINYOS_MAKE_PATH)/wiring.extra endif # Use the 'if' function instead of the 'ifdef' construct because ifdef freaks # out with call in there. I don't know why. $(if $(PROGRAM),,$(call TOSMake_include,avr/$(DEFAULT_PROGRAM).extra)) # Build storage file if volumes.xml present ifneq ($(wildcard $(VOLUMEFILE)), ) build_storage: $(BUILDDIR)/StorageVolumes.h exe0: build_storage VOLUME_ALLOCATOR_FLAGS ?= $(BUILDDIR)/StorageVolumes.h: $(VOLUMEFILE) $(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUMEFILE) >$@ || rm -f $@ PFLAGS += -I$(BUILDDIR) else build_storage: endif ifndef BUILD_DEPS ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),) BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS) endif endif setid: FORCE @cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd cp $(MAIN_SREC) $(INSTALL_SREC); else cmd $(SET_ID) $(MAIN_SREC) $(INSTALL_SREC) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID) ; fi delsetid: FORCE rm -f $(subst .srec.,.exe.,$(INSTALL_SREC)) $(INSTALL_SREC) srec: exe FORCE $(OBJCOPY) --output-target=srec $(MAIN_EXE) $(MAIN_SREC) tos_buildinfo: ihex build_buildinfo FORCE @: tosimage: ihex build_tosimage FORCE @: ihex: exe FORCE $(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX) exe: exe0 bytes FORCE @: exe0: builddir $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE @echo " compiling $(COMPONENT) to a $(PLATFORM) binary" $(NCC) -o $(MAIN_EXE) $(NCC_SAFE_TINYOS_FLAGS) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) ifdef WIRING_CHECK_FILE @nescc-wiring $(WIRING_CHECK_FILE) endif ifdef STACK_CHECK @echo @-tos-ramsize $(PLATFORM) $(MAIN_EXE) @echo endif @echo " compiled $(COMPONENT) to $(MAIN_EXE)" builddir: FORCE mkdir -p $(BUILDDIR) bytes: FORCE @$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }' tinyos-2.1.2+dfsg/support/make/avr/avr109.extra000066400000000000000000000020441207233610700212710ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make ifeq ($(AVR109),) $(error AVR109 must be defined, try "make $(TARGETS) help") endif PROGRAM = avr109 AVR109_BAUDRATE ?= 57600 ifeq ($(PROGRAMMER),avrdude) ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) AVR109 := '\\.\$(AVR109)' endif ifdef BOOTLOADER_IMG ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif PROGRAMMER_FLAGS = -cavr109 -P$(AVR109) -b$(AVR109_BAUDRATE) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a endif program: FORCE $(RESET_LINE) $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS) program_bl: FORCE java org.szte.wsn.zigbit.Programmer -port $(AVR109) -baudrate $(BOOTLOADER_BAUDRATE) -reset -askforreset -sleep $(AVR109_SLEEP) $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS) tinyos-2.1.2+dfsg/support/make/avr/avrisp.extra000066400000000000000000000025051207233610700215550ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: avrisp.extra,v 1.8 2008-09-22 15:41:35 sallai Exp $ ifeq ($(AVRISP),) $(error AVRISP must be defined, try "make $(TARGETS) help") endif PROGRAM = avrisp ifeq ($(PROGRAMMER),avrdude) ifdef BOOTLOADER_IMG ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif PROGRAMMER_FLAGS = -cstk500 -P$(AVRISP) -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_AVRISP) PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a endif ifeq ($(PROGRAMMER),uisp) PROGRAMMER_FLAGS = -dprog=stk500 -dserial=$(AVRISP) --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_AVRISP) PROGRAMMER_INSTALL_SREC_FLAGS = --erase --upload if=$(INSTALL_SREC) --verify PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = --upload if=$(BOOTLOADER_IMG) --verify endif program: FORCE @echo " installing $(PLATFORM) binary using avrisp" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS) program_bl: FORCE @echo " installing $(PLATFORM) bootloader using avrisp" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS) tinyos-2.1.2+dfsg/support/make/avr/avrispmkii.extra000066400000000000000000000021371207233610700224300ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: avrispmkii.extra,v 1.1 2008-09-23 15:47:56 sallai Exp $ ifeq ($(AVRISPMKII),) $(error AVRISPMKII must be defined, try "make $(TARGETS) help") endif PROGRAM = avrispmkii ifeq ($(PROGRAMMER),avrdude) ifdef BOOTLOADER_IMG ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif PROGRAMMER_FLAGS = -cavrispmkII -P$(AVRISPMKII) -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_AVRISPMKII) PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a endif ifeq ($(PROGRAMMER),uisp) $(error uisp is not supported, please use avrdude") endif program: FORCE @echo " installing $(PLATFORM) binary using avrispmkii" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS) program_bl: FORCE @echo " installing $(PLATFORM) bootloader using avrispmkii" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS) tinyos-2.1.2+dfsg/support/make/avr/dapa.extra000066400000000000000000000023471207233610700211620ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: dapa.extra,v 1.7 2008-06-18 20:22:51 razvanm Exp $ PROGRAM = dapa ifeq ($(PROGRAMMER),avrdude) ifdef BOOTLOADER_IMG ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif PROGRAMMER_FLAGS = -cdapa -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_MIB) PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a endif ifeq ($(PROGRAMMER),uisp) PROGRAMMER_FLAGS = -dprog=dapa --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_MIB) PROGRAMMER_INSTALL_SREC_FLAGS = --erase --upload if=$(INSTALL_SREC) --verify PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = --upload if=$(BOOTLOADER_IMG) --verify endif program: FORCE @echo " installing $(PLATFORM) binary using dapa" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS) program_bl: FORCE @echo " installing $(PLATFORM) bootloader using dapa" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS) tinyos-2.1.2+dfsg/support/make/avr/debug.extra000066400000000000000000000002351207233610700213350ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ CFLAGS += -DENABLE_JTAG_DEBUG OPTFLAGS += -O1 -g -fnesc-no-inline tinyos-2.1.2+dfsg/support/make/avr/debugopt.extra000066400000000000000000000001551207233610700220610ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: debugopt.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ OPTFLAGS += -g tinyos-2.1.2+dfsg/support/make/avr/dragonjtag.extra000066400000000000000000000014251207233610700223710ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make DRAGONJTAG?=usb PROGRAM = dragonjtag ifeq ($(PROGRAMMER),avrdude) ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) DRAGONJTAG := '\\.\$(DRAGONJTAG)' endif ifdef BOOTLOADER_IMG ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif PROGRAMMER_FLAGS = -cdragon_jtag -P$(DRAGONJTAG) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a endif program: FORCE @echo " installing $(PLATFORM) binary using dragonjtag" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS) tinyos-2.1.2+dfsg/support/make/avr/eprb.extra000066400000000000000000000024761207233610700212100ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: eprb.extra,v 1.10 2008-09-22 20:56:36 idgay Exp $ ifeq ($(EPRB),) $(error EPRB must be defined, try "make $(TARGETS) help") endif PROGRAM = eprb ifeq ($(PROGRAMMER),avrdude) ifdef BOOTLOADER_IMG ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif PROGRAMMER_FLAGS = -cmib510 -Pnet:$(EPRB):10001 -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_STK) PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a endif ifeq ($(PROGRAMMER),uisp) PROGRAMMER_FLAGS = -dprog=stk500 -dhost=$(EPRB) --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_STK) PROGRAMMER_INSTALL_SREC_FLAGS = --erase --upload if=$(INSTALL_SREC) --verify PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = --upload if=$(BOOTLOADER_IMG) --verify endif program: FORCE @echo " installing $(PLATFORM) binary using eprb" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS) program_bl: FORCE @echo " installing $(PLATFORM) bootloader using eprb" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS) tinyos-2.1.2+dfsg/support/make/avr/install.extra000066400000000000000000000004361207233610700217200ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: install.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $ NODEID = $(INSTALL) BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS) setid program delsetid ifdef BOOTLOADER ifeq ($(BOOTLOADER),tosboot) BUILD_DEPS += program_bl endif endif tinyos-2.1.2+dfsg/support/make/avr/jtagicemkii.extra000066400000000000000000000017521207233610700225340ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make ifeq ($(JTAGICEMKII),) $(error JTAGICEMKII must be defined, try "make $(TARGETS) help") endif PROGRAM = jtagicemkii ifeq ($(PROGRAMMER),avrdude) ifdef BOOTLOADER_IMG ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif PROGRAMMER_FLAGS = -c jtag2fast -P $(JTAGICEMKII) -U hfuse:w:$(AVR_FUSE_H):m -U lfuse:w:$(AVR_FUSE_L):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -D -U flash:w:$(BOOTLOADER_IMG):a endif program: FORCE @echo " installing $(PLATFORM) binary using AVR JTAGICE mkII" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS) program_bl: FORCE @echo " installing $(PLATFORM) bootloader using AVR JTAGICE mkII" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS) tinyos-2.1.2+dfsg/support/make/avr/mib510.extra000066400000000000000000000026531207233610700212520ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: mib510.extra,v 1.9 2009-02-04 19:38:30 sallai Exp $ ifeq ($(MIB510),) $(error MIB510 must be defined, try "make $(TARGETS) help") endif PROGRAM = mib510 ifeq ($(PROGRAMMER),avrdude) ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) MIB510 := '\\.\$(MIB510)' endif ifdef BOOTLOADER_IMG ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif PROGRAMMER_FLAGS = -cmib510 -P$(MIB510) -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_MIB) PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a endif ifeq ($(PROGRAMMER),uisp) PROGRAMMER_FLAGS = -dprog=mib510 -dserial=$(MIB510) --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_MIB) PROGRAMMER_INSTALL_SREC_FLAGS = --erase --upload if=$(INSTALL_SREC) --verify PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = --upload if=$(BOOTLOADER_IMG) --verify endif program: FORCE @echo " installing $(PLATFORM) binary using mib510" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS) program_bl: FORCE @echo " installing $(PLATFORM) bootloader using mib510" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS) tinyos-2.1.2+dfsg/support/make/avr/mib520.extra000066400000000000000000000003611207233610700212450ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: mib520.extra,v 1.1 2008-04-23 20:31:58 sallai Exp $ # The MIB520 uses the same protocol as the MIB510, so we # just include mib510.extra MIB510 = $(MIB520) include $(TINYOS_MAKE_PATH)/avr/mib510.extra tinyos-2.1.2+dfsg/support/make/avr/reinstall.extra000066400000000000000000000003651207233610700222500ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: reinstall.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $ NODEID = $(REINSTALL) BUILD_DEPS = setid program delsetid ifdef BOOTLOADER ifeq ($(BOOTLOADER),tosboot) BUILD_DEPS += program_bl endif endif tinyos-2.1.2+dfsg/support/make/avr/reset.target000066400000000000000000000003201207233610700215270ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: reset.target,v 1.4 2006-12-12 18:22:59 vlahan Exp $ BUILD_DEPS = harmless reset: FORCE @echo " resetting $(PLATFORM)" $(PROGRAMMER) $(PROGRAMMER_FLAGS) harmless: tinyos-2.1.2+dfsg/support/make/avr/zbp.extra000066400000000000000000000006261207233610700210460ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: zbp.extra,v 1.2 2010-07-19 08:00:44 mmaroti Exp $ PROGRAM = zbp ifneq ($(ZBP),) ZBP_PORT = $(ZBP) endif ifneq ($(ZBP_BAUDRATE),) ZBP_BAUDRATE = " -baudrate $(ZBP_BAUDRATE)" endif program: FORCE @echo " installing $(PLATFORM) binary using zigbit bootloader" java net.tinyos.util.ZigbitProgrammer -port $(ZBP_PORT)$(ZBP_BAUDRATE) -reset -upload $(INSTALL_SREC) tinyos-2.1.2+dfsg/support/make/blip.extra000066400000000000000000000021031207233610700204010ustar00rootroot00000000000000# -*- makefile -*- PFLAGS += -DCC2420_HW_ACKNOWLEDGEMENTS PFLAGS += -DCC2420_HW_ADDRESS_RECOGNITION PFLAGS += -DPACKET_LINK ifdef BLIP_L2_MTU PFLAGS += -DTOSH_DATA_LENGTH=$(BLIP_L2_MTU) else PFLAGS += -DTOSH_DATA_LENGTH=112 endif ifndef LOWPAN_ROOT LOWPAN_ROOT=$(TOSROOT) endif PFLAGS+=-I$(TOSDIR)/lib/net/ PFLAGS+=-I$(TOSDIR)/lib/printf/ PFLAGS+=-I$(LOWPAN_ROOT)/support/sdk/c/blip/ PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/ PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/interfaces/ PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/nwprog/ PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/shell/ PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/serial/ PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/platform/ PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/icmp/ PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/dhcp/ PFLAGS+=$(LOWPAN_ROOT)/support/sdk/c/blip/lib6lowpan/iovec.c PFLAGS+=$(LOWPAN_ROOT)/support/sdk/c/blip/lib6lowpan/in_cksum.c PFLAGS+=$(LOWPAN_ROOT)/support/sdk/c/blip/lib6lowpan/ip_malloc.c PFLAGS+=$(LOWPAN_ROOT)/support/sdk/c/blip/lib6lowpan/utility.c PFLAGS+=$(LOWPAN_ROOT)/tos/lib/net/blip/table.c tinyos-2.1.2+dfsg/support/make/cc2420x.extra000066400000000000000000000047561207233610700205600ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: cc2420x.extra,v 1.4 2009-11-10 07:03:34 rflury Exp $ CFLAGS += -DCC2420X ifeq ($(TARGETS),micaz) PFLAGS+=-I$(TOSDIR)/platforms/micaz/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif ifeq ($(TARGETS),telosb) PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x/tmicro/am PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif ifeq ($(TARGETS),epic) PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x/tmicro/am PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif ifeq ($(TARGETS),shimmer) PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/tmicro/am PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif ifeq ($(TARGETS),shimmer2) PFLAGS+=-I$(TOSDIR)/platforms/shimmer2/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/shimmer2/chips/cc2420x PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/tmicro/am PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util PFLAGS+=-I$(TOSDIR)/lib/diagmsg endif ifeq ($(TARGETS),shimmer2r) PFLAGS+=-I$(TOSDIR)/platforms/shimmer2r/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/tmicro/am PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif ifeq ($(TARGETS),span) PFLAGS+=-I$(TOSDIR)/platforms/span/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/tmicro PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/tmicro/am PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif tinyos-2.1.2+dfsg/support/make/cc2420x_32khz.extra000066400000000000000000000040361207233610700215700ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: cc2420x_32khz.extra,v 1.4 2009-11-10 07:03:34 rflury Exp $ CFLAGS += -DCC2420X ifeq ($(TARGETS),telosb) PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x/t32khz PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x/t32khz/am PFLAGS+=-I$(TOSDIR)/platforms/telosa/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif ifeq ($(TARGETS),shimmer) PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/t32khz PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/t32khz/am PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif ifeq ($(TARGETS),shimmer2) PFLAGS+=-I$(TOSDIR)/platforms/shimmer2/chips/cc2420x/t32khz PFLAGS+=-I$(TOSDIR)/platforms/shimmer2/chips/cc2420x PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/t32khz PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/t32khz/am PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util PFLAGS+=-I$(TOSDIR)/lib/diagmsg endif ifeq ($(TARGETS),shimmer2r) PFLAGS+=-I$(TOSDIR)/platforms/shimmer2r/chips/cc2420x/t32khz PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/t32khz PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/t32khz/am PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif ifeq ($(TARGETS),span) PFLAGS+=-I$(TOSDIR)/platforms/span/chips/cc2420x/t32khz PFLAGS+=-I$(TOSDIR)/platforms/span/chips/cc2420x PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/t32khz PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x/t32khz/am PFLAGS+=-I$(TOSDIR)/platforms/shimmer/chips/cc2420x PFLAGS+=-I$(TOSDIR)/chips/cc2420x PFLAGS+=-I$(TOSDIR)/lib/rfxlink/layers PFLAGS+=-I$(TOSDIR)/lib/rfxlink/util endif tinyos-2.1.2+dfsg/support/make/clean.target000066400000000000000000000004511207233610700207040ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: clean.target,v 1.7 2008-09-22 20:54:11 idgay Exp $ clean: FORCE rm -rf build $(CLEAN_EXTRA) pp rm -rf _TOSSIMmodule.so TOSSIM.pyc TOSSIM.py app.xml simbuild rm -rf VolumeMapC.nc rm -f $(COMPONENT).cmap $(COMPONENT).dot $(COMPONENT).html $(COMPONENT).png tinyos-2.1.2+dfsg/support/make/coap.extra000066400000000000000000000012401207233610700203760ustar00rootroot00000000000000# -*- makefile -*- PFLAGS += -DBIG_ENDIAN=4321 PFLAGS += -DLITTLE_ENDIAN=1234 PFLAGS += -DBYTE_ORDER=LITTLE_ENDIAN #PFLAGS += -DBYTE_ORDER=BIG_ENDIAN PFLAGS += -DNDEBUG=1 PFLAGS+=-I$(TOSROOT)/tos/lib/net/coap/ PFLAGS+=-I$(TOSROOT)/tos/lib/app/coap/interfaces/ PFLAGS+=-I$(TOSROOT)/support/sdk/c/coap PFLAGS+=$(TOSROOT)/tos/lib/net/coap/tinyos_net.c PFLAGS+=$(TOSROOT)/support/sdk/c/coap/encode.c PFLAGS+=$(TOSROOT)/support/sdk/c/coap/list.c PFLAGS+=$(TOSROOT)/support/sdk/c/coap/net.c PFLAGS+=$(TOSROOT)/support/sdk/c/coap/pdu.c PFLAGS+=$(TOSROOT)/support/sdk/c/coap/str.c PFLAGS+=$(TOSROOT)/support/sdk/c/coap/subscribe.c PFLAGS+=$(TOSROOT)/support/sdk/c/coap/uri.c tinyos-2.1.2+dfsg/support/make/cthreads.extra000066400000000000000000000015671207233610700212650ustar00rootroot00000000000000# Extra threads Makefile target to enable thread support for tinyos # Kevin Klues May 16th, 2008 #Get all the normal include directories for a threads build $(call TOSMake_include,threads.extra) PFLAGS += -DCTHREADS #Include directories required specifically for cthreads builds THREADS_CSYSTEM_DIR = $(TOS_THREADS_DIR)/csystem CFLAGS += -I$(THREADS_CSYSTEM_DIR) #Setup flag to pass to storage volume allocator to indicate threads are being used VOLUME_ALLOCATOR_FLAGS = -t #Set up extra c file to compile functions for thread manipulation #Also define the top level nesC component as the TinyOSEntryPointC component COMPONENT=$(THREADS_CSYSTEM_DIR)/TinyOSEntryPointC TOSTHREAD_MAIN_PATH=$(shell pwd)/$(TOSTHREAD_MAIN) ifdef TOSTHREAD_MAIN ifndef MAKE_DYNTHREADS ifneq ($(wildcard $(TOSTHREAD_MAIN_PATH)), ) CFLAGS += -DMAIN_APP=\"$(TOSTHREAD_MAIN_PATH)\" endif endif endif tinyos-2.1.2+dfsg/support/make/docs.extra000066400000000000000000000017611207233610700204140ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: docs.extra,v 1.5 2008-05-02 20:49:44 idgay Exp $ # configure the base for the app dirs. This is used to generate more # useful package names in the documentation. ifeq ($(BASEDIR)_x, _x) BASEDIR := $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' ) endif # The output directory for generated documentation ifeq ($(DOCDIR)_x, _x) DOCDIR := $(BASEDIR)/doc/nesdoc endif COMMA=, DOCS := $(subst $(COMMA), ,$(subst ., ,$(DOCS))) ifeq ($(filter here,$(DOCS)),here) DOCDIR = doc endif ifeq ($(filter preserve,$(DOCS)),preserve) PFLAGS += -preserve endif ifeq ($(filter quiet,$(DOCS)),quiet) QUIET = -quiet endif BUILD_DEPS = docs_ docs_: FORCE @echo " Making documentation for $(COMPONENT) on $(PLATFORM)" # first generate the xml files nesdoc -o $(DOCDIR) $(NESDOC_FLAGS) $(PFLAGS) $(CFLAGS) $(QUIET) $(COMPONENT).nc ifneq ($(filter nohtml,$(DOCS)),nohtml) # generate html from the xml files nesdoc -o $(DOCDIR) -html $(QUIET) -target=$(PLATFORM) endif tinyos-2.1.2+dfsg/support/make/dynthreads.extra000066400000000000000000000031071207233610700216250ustar00rootroot00000000000000# Extra threads Makefile target to enable thread support for tinyos # Kevin Klues May 16th, 2008 MAKE_DYNTHREADS = BUILD_DEPS = dynthreads_all #Get all the normal include directories for a cthreads build $(call TOSMake_include,cthreads.extra) PFLAGS += -DDYNTHREADS #Stuff to build dynamically loadable binary DYNLOAD_CFILE = $(TOSTHREAD_MAIN_PATH) CFLAGS += -c PFLAGS += -x nesc BUILDDIR = build/$(PLATFORM)/dynthreads #DYNLOAD_BASENAME = $(shell basename $(DYNLOAD_CFILE) .c) DYNLOAD_BASENAME = main DYNLOAD_OBJFILE = $(BUILDDIR)/$(DYNLOAD_BASENAME).o DYNLOAD_BINFILE = $(BUILDDIR)/$(DYNLOAD_BASENAME).bin DYNLOAD_TOSFILE = $(BUILDDIR)/$(DYNLOAD_BASENAME).tos DYNLOAD_NCC_COMMAND = $(NCC) -o $(DYNLOAD_OBJFILE) $(PFLAGS) $(OPTFLAGS) $(CFLAGS) $(DYNLOAD_CFILE) DYNLOAD_OBJCOPY_COMMAND = $(OBJCOPY) --output-target=binary $(DYNLOAD_OBJFILE) $(DYNLOAD_BINFILE) DYNLOAD_GENTOS_COMMAND = tosthreads-dynamic-app $(DYNLOAD_OBJFILE) $(DYNLOAD_BINFILE) $(DYNLOAD_TOSFILE) dynthreads_build: dynthreads_builddir build_storage @echo " compiling $(DYNLOAD_CFILE) to a $(PLATFORM) dynamically loadable binary" $(DYNLOAD_NCC_COMMAND) $(DYNLOAD_OBJCOPY_COMMAND) $(DYNLOAD_GENTOS_COMMAND) ifneq ($(shell uname),Darwin) dynthreads_all: dynthreads_build @echo " $(shell stat -t $(DYNLOAD_TOSFILE) | perl -lane 'print $$F[1];') bytes in BINARY" @echo " writing TOS image" else dynthreads_all: dynthreads_build @echo " $(shell stat -F $(DYNLOAD_TOSFILE) | perl -lane 'print $$F[4];') bytes in BINARY" @echo " writing TOS image" endif dynthreads_builddir: mkdir -p $(BUILDDIR) tinyos-2.1.2+dfsg/support/make/epic.target000066400000000000000000000007771207233610700205550ustar00rootroot00000000000000#-*-Makefile-*- #$Id: epic.target,v 1.5 2010-02-26 23:36:34 sdhsdh Exp $ PLATFORM ?= epic # Default BSL assumes telosb-like programming interface MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --telosb VOLUME_FILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif # Include the epic-specific targets $(call TOSMake_include_platform,epic) # Include the msp extra targets $(call TOSMake_include_platform,msp) epic: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/epic/000077500000000000000000000000001207233610700173325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/epic/digi.extra000066400000000000000000000001051207233610700213070ustar00rootroot00000000000000MSP_BSL_FLAGS = --slow --swap-reset-test --invert-reset --invert-testtinyos-2.1.2+dfsg/support/make/epic/epic.rules000066400000000000000000000000001207233610700213140ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/epic/miniprog.extra000066400000000000000000000002711207233610700222230ustar00rootroot00000000000000#-*-Makefile-*- #$Id: miniprog.extra,v 1.1 2008-08-07 06:38:02 prabal Exp $ # Special flags for Epic USB Mini Programmer MSP_BSL_FLAGS = --swap-reset-test --invert-reset --invert-test tinyos-2.1.2+dfsg/support/make/eval-crash.diff000066400000000000000000000043111207233610700212700ustar00rootroot00000000000000Index: variable.h =================================================================== RCS file: /cvsroot/make/make/variable.h,v retrieving revision 1.24 diff -u -B -b -r1.24 variable.h --- variable.h 8 Aug 2002 00:11:19 -0000 1.24 +++ variable.h 25 Oct 2002 21:37:32 -0000 @@ -107,6 +107,8 @@ extern char *expand_argument PARAMS ((char *str, char *end)); extern char *variable_expand_string PARAMS ((char *line, char *string, long length)); +extern void install_variable_buffer PARAMS ((char **bufp, unsigned int *lenp)); +extern void restore_variable_buffer PARAMS ((char *buf, unsigned int len)); /* function.c */ extern int handle_function PARAMS ((char **op, char **stringp)); Index: expand.c =================================================================== RCS file: /cvsroot/make/make/expand.c,v retrieving revision 1.33 diff -u -B -b -r1.33 expand.c --- expand.c 14 Oct 2002 21:54:04 -0000 1.33 +++ expand.c 25 Oct 2002 21:37:32 -0000 @@ -545,3 +545,28 @@ return value; } + +/* Install a new variable_buffer context, returning the current one for + safe-keeping. */ + +void +install_variable_buffer (char **bufp, unsigned int *lenp) +{ + *bufp = variable_buffer; + *lenp = variable_buffer_length; + + variable_buffer = 0; + initialize_variable_output (); +} + +/* Restore a previously-saved variable_buffer setting (free the current one). + */ + +void +restore_variable_buffer (char *buf, unsigned int len) +{ + free (variable_buffer); + + variable_buffer = buf; + variable_buffer_length = len; +} Index: function.c =================================================================== RCS file: /cvsroot/make/make/function.c,v retrieving revision 1.71 diff -u -B -b -r1.71 function.c --- function.c 14 Oct 2002 21:54:04 -0000 1.71 +++ function.c 25 Oct 2002 21:37:32 -0000 @@ -1196,7 +1196,17 @@ static char * func_eval (char *o, char **argv, const char *funcname) { + char *buf; + unsigned int len; + + /* Eval the buffer. Pop the current variable buffer setting so that the + eval'd code can use its own without conflicting. */ + + install_variable_buffer (&buf, &len); + eval_buffer (argv[0]); + + restore_variable_buffer (buf, len); return o; } tinyos-2.1.2+dfsg/support/make/eyesIFX.target000066400000000000000000000003161207233610700211360ustar00rootroot00000000000000EYES_IFX_VER ?= v2 ifeq ($(EYES_IFX_VER),v2) EYES_IFX_TARGET = eyesIFXv2.target else EYES_IFX_TARGET = eyesIFXv1.target endif $(call TOSMake_include,$(EYES_IFX_TARGET)) eyesIFX: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/eyesIFXv1.target000066400000000000000000000005201207233610700214020ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: eyesIFXv1.target,v 1.5 2008-03-11 09:34:13 klueska Exp $ PLATFORM = eyesIFXv1 MSP_MCU = msp430f149 ifndef DEFAULT_PROGRAM DEFAULT_PROGRAM = jtag endif VOLUME_FILE = volumes-stm25p.xml VOLUME_ALLOCATOR ?= tos-storage-stm25p $(call TOSMake_include_platform,msp) eyesIFXv1: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/eyesIFXv2.target000066400000000000000000000010301207233610700214000ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: eyesIFXv2.target,v 1.5 2008-03-11 09:34:13 klueska Exp $ PLATFORM = eyesIFXv2 MSP_MCU = msp430f1611 #Flash Config VOLUME_FILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db ifndef DEFAULT_PROGRAM DEFAULT_PROGRAM = bsl endif MSP_BSL_FLAGS ?= --invert-test --invert-reset --f1x BSL?=/dev/ttyUSB1 ifeq (,$(findstring /dev/ttyUSB,$(BSL))) ifneq (,$(findstring USB,$(BSL))) BSL:=/dev/tty$(BSL) endif endif $(call TOSMake_include_platform,msp) eyesIFXv2: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/ident_flags.extra000066400000000000000000000005411207233610700217360ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: ident_flags.extra,v 1.4 2006-12-12 18:22:55 vlahan Exp $ IDENT_PL ?= tos-ident-flags IDENT_PROGRAM_NAME ?= $(COMPONENT) IDENT_FLAGS := $(shell $(IDENT_PL) "$(IDENT_PROGRAM_NAME)") CFLAGS += $(IDENT_FLAGS) BUILD_EXTRA_DEPS += ident_cache ident_cache: FORCE @echo '$(IDENT_FLAGS)' > $(BUILDDIR)/ident_flags.txt tinyos-2.1.2+dfsg/support/make/intelmote2.target000066400000000000000000000010321207233610700217000ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make PLATFORM = intelmote2 ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif VOLUME_FILE = volumes-pxa27xp30.xml VOLUME_ALLOCATOR ?= tos-storage-pxa27xp30 #ASSEMBLY_FILES += $(PLATFORM_DIR)/../imote2/flash.s $(PLATFORM_DIR)/../imote2/binarymover.s ASSEMBLY_FILES += $(TOSDIR)/platforms/intelmote2/toscrt0.s $(TOSDIR)/chips/pxa27x/pxa27x_util.s CFLAGS += -DPXA27X_13M -T$(TOSDIR)/platforms/intelmote2/tos.x $(call TOSMake_include_platform,pxa27x) intelmote2: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/iris.target000066400000000000000000000007571207233610700206010ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: iris.target,v 1.5 2009-03-10 15:09:55 sallai Exp $ PLATFORM = iris SENSORBOARD ?= micasb PROGRAMMER ?= avrdude ifeq ($(PROGRAMMER),avrdude) PROGRAMMER_PART ?= -pm1281 -U efuse:w:0xff:m endif ifeq ($(PROGRAMMER),uisp) PROGRAMMER_PART ?= -dpart=ATmega1281 --wr_fuse_e=ff endif AVR_FUSE_H ?= 0xd9 AVR_FUSE_L ?= 0xff ifdef RF230_CHANNEL PFLAGS += -DRF230_DEF_CHANNEL=$(RF230_CHANNEL) endif $(call TOSMake_include_platform,avr) iris: $(BUILD_DEPS) @:tinyos-2.1.2+dfsg/support/make/m16c60/000077500000000000000000000000001207233610700173265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/m16c60/crt_62p.S000077500000000000000000000124721207233610700207420ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Henrik Makitaavola * @author Per Lindgren * @author Johan Eriksson * @author Johan Nordlander * @author Simon Aittamaa */ .set PM0, 0x04 .set PRCR, 0x0a .text .global __vector_default .global m32c_jsri16 .extern _main .section .init0,"ax",@progbits .global _start _start: /* Setup processor mode, single chip mode, and stack pointers */ ldc #_istack, isp mov.b #0x02, PRCR mov.b #0x00, PM0 mov.b #0x00, PRCR /* Setup the FLG register to some sane defaults. */ ldc #0, flg /* Clear the U flag. This sets the stack pointer to the interrupt stack. This is done so that only one stack is used by both interrupt routines and other code. There would else be a problem when threads are changed in interrupt routines in the tosthread library. */ fclr u /* Setup interrupt vector. */ ldc #%hi16(_vectors_variable), intbh ldc #%lo16(_vectors_variable), intbl /* Copy .data. */ mov.b #%hi8(__data_start), r1h mov.w #%lo16(__data_start), a0 mov.w #__ram_start, a1 mov.w #__data_size, r3 smovf.b /* Zero out .bss. */ mov.b #0x00, R0L mov.w #__bss_size, r3 mov.w #__bss_start, a1 sstr.b /* Enter main(). */ jsr.a _main /* In case we return, should realy generate a reset :/ */ jmp.b 0 m32c_jsri16: add.w #-1, sp /* Read the address (16 bits) and return address (24 bits) off the stack. */ mov.w 4[sp], r0 mov.w 1[sp], r3 mov.b 3[sp], a0 /* This zero-extends, so the high byte has zero in it. */ /* Write the return address, then new address, to the stack. */ mov.w a0, 1[sp] /* Just to get the zero in 2[sp]. */ mov.w r0, 0[sp] mov.w r3, 3[sp] mov.b a0, 5[sp] /* This "returns" to the target address, leaving the pending return address on the stack. */ rts /* We should probably not get here. */ __vector_default: jmp.a __vector_default /* Fixed hardware vector table. */ .section .vectors_fixed, "a",@progbits .size _vectors_fixed, 36 .type _vectors_fixed, @object _vectors_fixed: .long 0 /* Undefined Instruction. */ .long 0 /* Overflow INTO Instruction. */ .long 0 /* BRK Instruction.*/ .long 0 /* Address Match Interupt. */ .long 0 /* Single Step Interrupt. */ .long 0 /* Watchdog, Oscillation, Voltage Interrupt. */ .long 0 /* DBC. */ .long 0 /* NMI. */ .long _start /* Reset. */ /* Variable vector table. */ .section .vectors_variable .size _vectors_variable, 256 .type _vectors_variable, @object _vectors_variable: .long __vector_0 .long __vector_1 .long __vector_2 .long __vector_3 .long __vector_4 .long __vector_5 .long __vector_6 .long __vector_7 .long __vector_8 .long __vector_9 .long __vector_10 .long __vector_11 .long __vector_12 .long __vector_13 .long __vector_14 .long __vector_15 .long __vector_16 .long __vector_17 .long __vector_18 .long __vector_19 .long __vector_20 .long __vector_21 .long __vector_22 .long __vector_23 .long __vector_24 .long __vector_25 .long __vector_26 .long __vector_27 .long __vector_28 .long __vector_29 .long __vector_30 .long __vector_31 .long __vector_32 .long __vector_33 .long __vector_34 .long __vector_35 .long __vector_36 .long __vector_37 .long __vector_38 .long __vector_39 .long __vector_40 .long __vector_41 .long __vector_42 .long __vector_43 .long __vector_44 .long __vector_45 .long __vector_46 .long __vector_47 .long __vector_48 .long __vector_49 .long __vector_50 .long __vector_51 .long __vector_52 .long __vector_53 .long __vector_54 .long __vector_55 .long __vector_56 .long __vector_57 .long __vector_58 .long __vector_59 .long __vector_60 .long __vector_61 .long __vector_62 .long __vector_63 tinyos-2.1.2+dfsg/support/make/m16c60/crt_65.S000066400000000000000000000145131207233610700205600ustar00rootroot00000000000000/*--------------------------------------------------------------------------------*/ /* * Copyright (c) 2010 Eistec AB. * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * *--------------------------------------------------------------------------------*/ .section .init0,"ax",@progbits .global __vector_72 .global __init_watchdog __init_watchdog: ldc #__istack, isp /* Load stack pointer address. */ fset u ldc #__ustack, sp /* Load stack pointer address. */ ldc #%hi16(__rvectors), intbh /* Load relocatable vector table address. */ ldc #%lo16(__rvectors), intbl mov.b #%hi8 (__data_rom_start), r1h /* Copy initialized data from ROM to RAM */ mov.w #%lo16(__data_rom_start), a0 mov.w #__data_start, a1 mov.w #__data_count, r3 smovf.b mov.b #0x00,r0l /* Fill uninitialized data in RAM with 0s */ mov.w #__bss_start, a1 mov.w #__bss_count, r3 sstr.b jsr.a _watchdog __vector_72: ldc #__istack, isp /* Load stack pointer address. */ fset u ldc #__ustack, sp /* Load stack pointer address. */ ldc #%hi16(__rvectors), intbh /* Load relocatable vector table address. */ ldc #%lo16(__rvectors), intbl mov.b #0x01, 0x000A /* Setup main clock and sub clock */ mov.b #0x00, 0x0006 mov.b #0x00, 0x0007 mov.b #0x00, 0x000C mov.b #0x00, 0x000A mov.b #%hi8 (__data_rom_start), r1h /* Copy initialized data from ROM to RAM */ mov.w #%lo16(__data_rom_start), a0 mov.w #__data_start, a1 mov.w #__data_count, r3 smovf.b mov.b #0x00,r0l /* Fill uninitialized data in RAM with 0s */ mov.w #__bss_start, a1 mov.w #__bss_count, r3 sstr.b jsr.a _main /* Jump to main function. */ jsr.a __vector_72 /* Restart if main function returns. */ /*--------------------------------------------------------------------------------*/ /* */ .text .global m32c_jsri16 m32c_jsri16: add.w #-1, sp /* Read the address (16 bits) and return address (24 bits) off the stack. */ mov.w 4[sp], r0 mov.w 1[sp], r3 mov.b 3[sp], a0 /* This zero-extends, so the high byte has zero in it. */ /* Write the return address, then new address, to the stack. */ mov.w a0, 1[sp] /* Just to get the zero in 2[sp]. */ mov.w r0, 0[sp] mov.w r3, 3[sp] mov.b a0, 5[sp] /* This "returns" to the target address, leaving the pending return address on the stack. */ rts /*--------------------------------------------------------------------------------*/ /* Relocatable vector table */ .section .rvectors, "a", @progbits .long __vector_0 .long __vector_1 .long __vector_2 .long __vector_3 .long __vector_4 .long __vector_5 .long __vector_6 .long __vector_7 .long __vector_8 .long __vector_9 .long __vector_10 .long __vector_11 .long __vector_12 .long __vector_13 .long __vector_14 .long __vector_15 .long __vector_16 .long __vector_17 .long __vector_18 .long __vector_19 .long __vector_20 .long __vector_21 .long __vector_22 .long __vector_23 .long __vector_24 .long __vector_25 .long __vector_26 .long __vector_27 .long __vector_28 .long __vector_29 .long __vector_30 .long __vector_31 .long __vector_32 .long __vector_33 .long __vector_34 .long __vector_35 .long __vector_36 .long __vector_37 .long __vector_38 .long __vector_39 .long __vector_40 .long __vector_41 .long __vector_42 .long __vector_43 .long __vector_44 .long __vector_45 .long __vector_46 .long __vector_47 .long __vector_48 .long __vector_49 .long __vector_50 .long __vector_51 .long __vector_52 .long __vector_53 .long __vector_54 .long __vector_55 .long __vector_56 .long __vector_57 .long __vector_58 .long __vector_59 .long __vector_60 .long __vector_61 .long __vector_62 .long __vector_63 /*--------------------------------------------------------------------------------*/ /* Fixed vector table */ .section .fvectors, "a", @progbits .long __vector_64 + 0x00000000 /* Set all ID bytes to 0x00. */ .long __vector_65 + 0x00000000 .long __vector_66 + 0x00000000 .long __vector_67 + 0x00000000 .long __vector_68 + 0x00000000 .long __vector_69 + 0x00000000 .long __vector_70 + 0x00000000 .long __vector_71 + 0x00000000 .long __vector_72 + 0x9F000000 /* Enable power-on reset in OFS register. */ tinyos-2.1.2+dfsg/support/make/m16c60/debug.extra000077500000000000000000000001051207233610700214600ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make OPTFLAGS = -O1 -g -fnesc-no-inline tinyos-2.1.2+dfsg/support/make/m16c60/debugopt.extra000077500000000000000000000000611207233610700222040ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make OPTFLAGS += -g tinyos-2.1.2+dfsg/support/make/m16c60/install.extra000077500000000000000000000003421207233610700220430ustar00rootroot00000000000000#-#-Makefile-#- vim:syntax=make NODEID = $(INSTALL) BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS) setid program delsetid ifdef BOOTLOADER ifeq ($(BOOTLOADER),tosboot) BUILD_DEPS += program_bl endif endif tinyos-2.1.2+dfsg/support/make/m16c60/linker_62p.x000077500000000000000000000131151207233610700214760ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Henrik Makitaavola * @author Per Lindgren * @author Johan Eriksson * @author Johan Nordlander * @author Simon Aittamaa */ ENTRY(_start) MEMORY { ram (rw) : o = 0x0000400, l = 31k flash (rx) : o = 0x00a0000, l = 384k } /* Provide any vector symbols not defined. */ PROVIDE(__vector_0 = __vector_default); PROVIDE(__vector_1 = __vector_default); PROVIDE(__vector_2 = __vector_default); PROVIDE(__vector_3 = __vector_default); PROVIDE(__vector_4 = __vector_default); PROVIDE(__vector_5 = __vector_default); PROVIDE(__vector_6 = __vector_default); PROVIDE(__vector_7 = __vector_default); PROVIDE(__vector_8 = __vector_default); PROVIDE(__vector_9 = __vector_default); PROVIDE(__vector_10 = __vector_default); PROVIDE(__vector_11 = __vector_default); PROVIDE(__vector_12 = __vector_default); PROVIDE(__vector_13 = __vector_default); PROVIDE(__vector_14 = __vector_default); PROVIDE(__vector_15 = __vector_default); PROVIDE(__vector_16 = __vector_default); PROVIDE(__vector_17 = __vector_default); PROVIDE(__vector_18 = __vector_default); PROVIDE(__vector_19 = __vector_default); PROVIDE(__vector_20 = __vector_default); PROVIDE(__vector_21 = __vector_default); PROVIDE(__vector_22 = __vector_default); PROVIDE(__vector_23 = __vector_default); PROVIDE(__vector_24 = __vector_default); PROVIDE(__vector_25 = __vector_default); PROVIDE(__vector_26 = __vector_default); PROVIDE(__vector_27 = __vector_default); PROVIDE(__vector_28 = __vector_default); PROVIDE(__vector_29 = __vector_default); PROVIDE(__vector_30 = __vector_default); PROVIDE(__vector_31 = __vector_default); PROVIDE(__vector_32 = __vector_default); PROVIDE(__vector_33 = __vector_default); PROVIDE(__vector_34 = __vector_default); PROVIDE(__vector_35 = __vector_default); PROVIDE(__vector_36 = __vector_default); PROVIDE(__vector_37 = __vector_default); PROVIDE(__vector_38 = __vector_default); PROVIDE(__vector_39 = __vector_default); PROVIDE(__vector_40 = __vector_default); PROVIDE(__vector_41 = __vector_default); PROVIDE(__vector_42 = __vector_default); PROVIDE(__vector_43 = __vector_default); PROVIDE(__vector_44 = __vector_default); PROVIDE(__vector_45 = __vector_default); PROVIDE(__vector_46 = __vector_default); PROVIDE(__vector_47 = __vector_default); PROVIDE(__vector_48 = __vector_default); PROVIDE(__vector_49 = __vector_default); PROVIDE(__vector_50 = __vector_default); PROVIDE(__vector_51 = __vector_default); PROVIDE(__vector_52 = __vector_default); PROVIDE(__vector_53 = __vector_default); PROVIDE(__vector_54 = __vector_default); PROVIDE(__vector_55 = __vector_default); PROVIDE(__vector_56 = __vector_default); PROVIDE(__vector_57 = __vector_default); PROVIDE(__vector_58 = __vector_default); PROVIDE(__vector_59 = __vector_default); PROVIDE(__vector_60 = __vector_default); PROVIDE(__vector_61 = __vector_default); PROVIDE(__vector_62 = __vector_default); PROVIDE(__vector_63 = __vector_default); SECTIONS { /* * Ram starts at 0x400 but for some reason it does not allow med to * start placing data at 0x400 since it's not into the ram... Life * is great. */ __ram_start = 0x500; __ram_end = 0x400 + 31k - 1; .start : { *(.init0); } > flash .data __ram_start : { *(.data); *(.rodata); /* Do NOT place in '.text'. */ *(.rodata.*); /* Do NOT place in '.text'. */ *(.plt); /* Do NOT place in '.text'. */ } > ram AT > flash __data_start = LOADADDR(.data); __data_size = SIZEOF(.data); .bss : { *(.bss); *(COMMON); } > ram __bss_start = ADDR(.bss); __bss_size = SIZEOF(.bss); .text /*0xc0000*/: { *(.text); *(.vectors_variable); } > flash PROVIDE(_end = __bss_start + __bss_size); /* User Stack Pointer */ .ustack 0x00007000 : { _ustack = .; } > ram /* Interrupt Stack Pointer */ .istack 0x00008000 : { _istack = .; } > ram /* Vector offset is fixed. */ .vectors 0x000FFFDC : { *(.vectors_fixed); } > flash } tinyos-2.1.2+dfsg/support/make/m16c60/linker_65.x000066400000000000000000000131351207233610700213200ustar00rootroot00000000000000/*--------------------------------------------------------------------------------*/ /* * Copyright (c) 2010 Eistec AB. * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * *--------------------------------------------------------------------------------*/ MEMORY { RAM (wx) : ORIGIN = 0x00400, LENGTH = 47K DBG (rx) : ORIGIN = 0x13000, LENGTH = 4K ROM (rx) : ORIGIN = 0x80000, LENGTH = 512K } __ram = 0x00400; __ram_size = 47K; __ram_end = __ram + __ram_size; __rom = 0x80000; __rom_size = 512K; __rom_end = __rom + __rom_size; __ustack = __ram_end - 0x00200; /* Size of interrupt stack. */ __istack = __ram_end; PROVIDE(__vector_0 = __vector_72); PROVIDE(__vector_1 = __vector_72); PROVIDE(__vector_2 = __vector_72); PROVIDE(__vector_3 = __vector_72); PROVIDE(__vector_4 = __vector_72); PROVIDE(__vector_5 = __vector_72); PROVIDE(__vector_6 = __vector_72); PROVIDE(__vector_7 = __vector_72); PROVIDE(__vector_8 = __vector_72); PROVIDE(__vector_9 = __vector_72); PROVIDE(__vector_10 = __vector_72); PROVIDE(__vector_11 = __vector_72); PROVIDE(__vector_12 = __vector_72); PROVIDE(__vector_13 = __vector_72); PROVIDE(__vector_14 = __vector_72); PROVIDE(__vector_15 = __vector_72); PROVIDE(__vector_16 = __vector_72); PROVIDE(__vector_17 = __vector_72); PROVIDE(__vector_18 = __vector_72); PROVIDE(__vector_19 = __vector_72); PROVIDE(__vector_20 = __vector_72); PROVIDE(__vector_21 = __vector_72); PROVIDE(__vector_22 = __vector_72); PROVIDE(__vector_23 = __vector_72); PROVIDE(__vector_24 = __vector_72); PROVIDE(__vector_25 = __vector_72); PROVIDE(__vector_26 = __vector_72); PROVIDE(__vector_27 = __vector_72); PROVIDE(__vector_28 = __vector_72); PROVIDE(__vector_29 = __vector_72); PROVIDE(__vector_30 = __vector_72); PROVIDE(__vector_31 = __vector_72); PROVIDE(__vector_32 = __vector_72); PROVIDE(__vector_33 = __vector_72); PROVIDE(__vector_34 = __vector_72); PROVIDE(__vector_35 = __vector_72); PROVIDE(__vector_36 = __vector_72); PROVIDE(__vector_37 = __vector_72); PROVIDE(__vector_38 = __vector_72); PROVIDE(__vector_39 = __vector_72); PROVIDE(__vector_40 = __vector_72); PROVIDE(__vector_41 = __vector_72); PROVIDE(__vector_42 = __vector_72); PROVIDE(__vector_43 = __vector_72); PROVIDE(__vector_44 = __vector_72); PROVIDE(__vector_45 = __vector_72); PROVIDE(__vector_46 = __vector_72); PROVIDE(__vector_47 = __vector_72); PROVIDE(__vector_48 = __vector_72); PROVIDE(__vector_49 = __vector_72); PROVIDE(__vector_50 = __vector_72); PROVIDE(__vector_51 = __vector_72); PROVIDE(__vector_52 = __vector_72); PROVIDE(__vector_53 = __vector_72); PROVIDE(__vector_54 = __vector_72); PROVIDE(__vector_55 = __vector_72); PROVIDE(__vector_56 = __vector_72); PROVIDE(__vector_57 = __vector_72); PROVIDE(__vector_58 = __vector_72); PROVIDE(__vector_59 = __vector_72); PROVIDE(__vector_60 = __vector_72); PROVIDE(__vector_61 = __vector_72); PROVIDE(__vector_62 = __vector_72); PROVIDE(__vector_63 = __vector_72); PROVIDE(__vector_64 = __vector_72); PROVIDE(__vector_65 = __vector_72); PROVIDE(__vector_66 = __vector_72); PROVIDE(__vector_67 = __vector_72); PROVIDE(__vector_68 = __vector_72); PROVIDE(__vector_69 = __vector_72); PROVIDE(__vector_70 = __vector_72); PROVIDE(__vector_71 = __vector_72); PROVIDE(_watchdog = __vector_72); SECTIONS { .start : { *(.init0); } > ROM AT > ROM .data : { *(.data) *(.data.*) *(.rodata) *(.rodata.*) *(.plt) *(.eh_frame_hdr) *(.eh_frame) } > RAM AT > ROM __data_rom_start = LOADADDR(.data); __data_start = ADDR(.data); __data_count = SIZEOF(.data); .bss : { *(.bss) *(COMMON) } > RAM AT > RAM __bss_start = ADDR(.bss); __bss_count = SIZEOF(.bss); PROVIDE(_end = .); /* Provide heap pointer for sbrk(). */ .text : { *(.init) *(.fini) *(.text) *(.text.*) __rvectors = .; /* ensure faster interrupt execution. */ *(.rvectors) } > ROM AT > ROM .debugger 0x13000 : AT(0x13000) /* On-chip debugger monitor area. */ { __debugger = .; *(.debugger) } .fvectors 0xFFFDC : AT(0xFFFDC) /* Fixed vector table. */ { /* Must be placed on address 0xFFFDC. */ __fvectors = .; *(.fvectors) } } tinyos-2.1.2+dfsg/support/make/m16c60/m16c60.rules000077500000000000000000000116161207233610700213260ustar00rootroot00000000000000#-#-Makefile-#- vim:syntax=make ifeq ($(M16C60_MCU),62p) define M16C60_HELP Programmer options: sm16cf : use SM16CF programmer on port '/dev/ttyUSB0'. sm16cf, : use SM16CF programmer on port . endef DEFAULT_PROGRAM ?= sm16cf endif ifeq ($(M16C60_MCU),65) define M16C60_HELP Programmer options: sflash : use SFLASH programmer on port '/dev/ttyUSB0'. sflash, : use SFLASH programmer on port . endef DEFAULT_PROGRAM ?= sflash endif HELP += $(M16C60_HELP) THIS_FOLDER = m16c60 #ifdef MAKE_DEPUTY_FLAG # NCC_SAFE_TINYOS_FLAGS = -DSAFE_TINYOS -fnesc-deputy -fnesc-deputy-args='-I$(TOSDIR)/lib/safe/include --FLIDs=build/$(PLATFORM)/flids.txt --envmachine -DSAFE_TINYOS --nolib ' $(TOSDIR)/lib/safe/avr/fail.c #else # NCC_SAFE_TINYOS_FLAGS = #endif OBJCOPY = m32c-elf-objcopy OBJDUMP = m32c-elf-objdump SET_ID = tos-set-symbols --objcopy $(OBJCOPY) --objdump $(OBJDUMP) NCC = ncc LIBS = #-lm -lc -lgcc AMADDR = _ActiveMessageAddressC\$$addr # Uncomment the next two lines if you have a toolchain without the dollar sign # patch. This needs nesc 1.2.8 or newer (1.2.9 is recommended). #PFLAGS += -fnesc-separator=__ #AMADDR = ActiveMessageAddressC__addr BUILDDIR ?= build/$(PLATFORM) MAIN_EXE = $(BUILDDIR)/main.exe MAIN_SREC = $(BUILDDIR)/main.srec MAIN_IHEX = $(BUILDDIR)/main.ihex INSTALL_SREC = $(MAIN_SREC).out$(if $(NODEID),-$(NODEID),) PFLAGS += -Wshadow $(NESC_FLAGS) PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD) ifdef MSG_SIZE PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE) endif ifdef DEFAULT_LOCAL_GROUP PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) endif # We need a different start address for the flash in the linker script when building TOSBoot. ifeq ($(M16C60_MCU),62p) ifeq ($(COMPONENT),TosBootC) $(shell sed -e "s/0x00a0000/0x00f8000/ig" $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/linker_62p.x > $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/linker_62p_bootloader.x) LDFLAGS += -nostartfiles -T$(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/linker_62p_bootloader.x $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/crt_62p.S else LDFLAGS += -nostartfiles -T$(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/linker_62p.x $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/crt_62p.S endif endif ifeq ($(M16C60_MCU),65) ifeq ($(COMPONENT),TosBootC) $(shell sed -e "s/0x80000/0xC0000/ig" $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/linker_65.x > $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/linker_65_bootloader.x) LDFLAGS += -nostartfiles -T$(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/linker_65_bootloader.x $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/crt_65.S else LDFLAGS += -nostartfiles -T$(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/linker_65.x $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/crt_65.S endif endif # This is needed so that we know that the BusyWaitMicroC.BusyWait.wait() # function always gets aligned. CFLAGS += -falign-functions=2 # Use the 'if' function instead of the 'ifdef' construct because ifdef freaks # out with call in there. I don't know why. $(if $(PROGRAM),,$(call TOSMake_include,$(THIS_FOLDER)/$(DEFAULT_PROGRAM).extra)) # Build storage file if volumes.xml present ifneq ($(wildcard $(VOLUMEFILE)), ) build_storage: $(BUILDDIR)/StorageVolumes.h exe0: build_storage VOLUME_ALLOCATOR_FLAGS ?= $(BUILDDIR)/StorageVolumes.h: $(VOLUMEFILE) $(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUMEFILE) >$@ || rm -f $@ PFLAGS += -I$(BUILDDIR) else build_storage: endif ifndef BUILD_DEPS ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),) BUILD_DEPS = srec bytes tosimage $(POST_BUILD_EXTRA_DEPS) endif endif setid: FORCE @cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd cp $(MAIN_SREC) $(INSTALL_SREC); else cmd $(SET_ID) $(MAIN_SREC) $(INSTALL_SREC) _TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID) ; fi delsetid: FORCE rm -f $(subst .srec.,.exe.,$(INSTALL_SREC)) $(INSTALL_SREC) srec: exe FORCE $(OBJCOPY) --output-target=srec $(MAIN_EXE) $(MAIN_SREC) tos_buildinfo: ihex build_buildinfo FORCE @: # TODO(henrik) Remove interrupt vector table from the image. tosimage: ihex build_tosimage FORCE @: ihex: exe FORCE $(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX) exe: exe0 FORCE bytes @: exe0: builddir check_mcu $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE @echo " compiling $(COMPONENT) to a $(PLATFORM) binary" $(NCC) -o $(MAIN_EXE) $(NCC_SAFE_TINYOS_FLAGS) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) ifdef WIRING_CHECK_FILE @nescc-wiring $(WIRING_CHECK_FILE) endif @echo " compiled $(COMPONENT) to $(MAIN_EXE)" builddir: FORCE mkdir -p $(BUILDDIR) # bug fix 2009-3-11 by ZHF, here display the ROM and RAM consumption information. bytes: FORCE @$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }' check_mcu: FORCE ifndef M16C60_MCU @echo "---Error, MCU not defined.---" @exit 1 endif tinyos-2.1.2+dfsg/support/make/m16c60/reinstall.extra000066400000000000000000000001241207233610700223650ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make NODEID = $(REINSTALL) BUILD_DEPS = setid program tinyos-2.1.2+dfsg/support/make/m16c60/sflash.extra000077500000000000000000000012641207233610700216610ustar00rootroot00000000000000### # @author Henrik Makitaavola ## ifeq ($(SFLASH), ) SFLASH = /dev/ttyUSB0 endif PROGRAM = sflash PROGRAMMER = sflash ifdef BOOTLOADER program: FORCE @echo " installing $(PLATFORM) with bootloader using sflash" srec_cat $(BOOTLOADER_IMG) $(INSTALL_SREC) -exclude 0x000FFFDC 0x00100000 -o $(BUILDDIR)/main_boot.srec -CRLF sed '/S5/d' $(BUILDDIR)/main_boot.srec > $(BUILDDIR)/main_boot2.srec $(PROGRAMMER) -p $(SFLASH) $(BUILDDIR)/main_boot2.srec rm $(BUILDDIR)/main_boot.srec rm $(BUILDDIR)/main_boot2.srec else program: FORCE @echo " installing $(PLATFORM) using slash" $(PROGRAMMER) -p $(SFLASH) $(INSTALL_SREC) endif program_bl: FORCE tinyos-2.1.2+dfsg/support/make/m16c60/sm16cf.extra000077500000000000000000000014371207233610700215020ustar00rootroot00000000000000### # @author Henrik Makitaavola ## ifeq ($(SM16CF), ) SM16CF = /dev/ttyUSB0 endif PROGRAM = sm16cf PROGRAMMER = sm16cf ifdef BOOTLOADER program: FORCE @echo " installing $(PLATFORM) with bootloader using sm16cf" srec_cat $(BOOTLOADER_IMG) $(INSTALL_SREC) -exclude 0x000FFFDC 0x00100000 -o $(BUILDDIR)/main_boot.srec -CRLF sed '/S5/d' $(BUILDDIR)/main_boot.srec > $(BUILDDIR)/main_boot2.srec $(PROGRAMMER) --baud-rate=57600 --device=$(SM16CF) --input-file=$(BUILDDIR)/main_boot2.srec --flash-program rm $(BUILDDIR)/main_boot.srec rm $(BUILDDIR)/main_boot2.srec else program: FORCE @echo " installing $(PLATFORM) using sm16cf" $(PROGRAMMER) --baud-rate=57600 --device=$(SM16CF) --input-file=$(INSTALL_SREC) --flash-program endif program_bl: FORCE tinyos-2.1.2+dfsg/support/make/mica2.target000066400000000000000000000006231207233610700206160ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: mica2.target,v 1.5 2007-11-06 19:32:56 sallai Exp $ PLATFORM = mica2 SENSORBOARD ?= micasb PROGRAMMER ?= uisp ifeq ($(PROGRAMMER),avrdude) PROGRAMMER_PART ?= -pm128 -U efuse:w:0xff:m endif ifeq ($(PROGRAMMER),uisp) PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff endif AVR_FUSE_H ?= 0xd9 $(call TOSMake_include_platform,avr) mica2: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/mica2dot.target000066400000000000000000000006071207233610700213270ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: mica2dot.target,v 1.5 2007-11-06 19:32:56 sallai Exp $ PLATFORM = mica2dot PROGRAMMER ?= uisp ifeq ($(PROGRAMMER),avrdude) PROGRAMMER_PART ?= -pm128 -U efuse:w:0xff:m endif ifeq ($(PROGRAMMER),uisp) PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff endif AVR_FUSE_H ?= 0xd9 $(call TOSMake_include_platform,avr) mica2dot: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/micaz.target000066400000000000000000000007401207233610700207260ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: micaz.target,v 1.6 2008-07-09 15:36:50 sallai Exp $ PLATFORM = micaz SENSORBOARD ?= micasb PROGRAMMER ?= uisp ifeq ($(PROGRAMMER),avrdude) PROGRAMMER_PART ?= -pm128 -U efuse:w:0xff:m endif ifeq ($(PROGRAMMER),uisp) PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff endif AVR_FUSE_H ?= 0xd9 ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif $(call TOSMake_include_platform,avr) micaz: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/msp/000077500000000000000000000000001207233610700172115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/msp/bsl.extra000066400000000000000000000041521207233610700210400ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: bsl.extra,v 1.7 2008-06-18 20:22:51 razvanm Exp $ # BSL arguments: # # bsl, # install onto the given port name # # bsl,auto # uses motelist to install onto the first listed mote # # bsl,ref, # uses motelist to install onto the mote with the given reference number PROGRAM = bsl MSP_BSL ?= msp430-bsl # BSL is the comm port, can be specified as "bsl,2" when making BSL ?= auto MSP_BSL_FLAGS ?= --telos MOTELIST ?= motelist ifeq ($(BSL),auto) BSLTEST = $(shell $(MOTELIST) -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+)[^,]*)/; print $$1;' ) BSLTEST_COMMENT = "using bsl,auto" BSL = $(shell $(MOTELIST) -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+)[^,]*)/; ($$s,$$n)=($$1,$$2); if($$s=~/^com/i) { print $$n-1 } else { print $$s; };' ) BSL_TARGETS += bsltest else ifeq ($(BSL:ref,%=ref),ref) BSLREF := $(BSL:ref,%=%) BSLTEST_COMMENT = "using bsl,ref,$(BSLREF)" BSLTEST := $(shell $(MOTELIST) -c | perl -e '$$r=shift; while(<>) { if(/^$$r,([^,]+)/) { print $$1; exit; } }' $(BSLREF)) BSL = $(BSLTEST) BSL_TARGETS += bsltest endif endif # bsltest is a separate rule so that make doesn't resolve BSL along with # BSLTEST, which saves an invocation of motelist. It also avoids the test # all together if bsl,auto was not specified (whew). bsltest: FORCE @N=$(BSLTEST); [ x$$N = x ] && echo " found no motes ($(BSLTEST_COMMENT))" && exit 1 || echo " found mote on $$N ($(BSLTEST_COMMENT))" program: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE @echo " installing $(PLATFORM) binary using bsl" $(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -e -I -p $(INSTALL_IHEX) rm -f $(subst .ihex.,.exe.,$(INSTALL_IHEX)) $(INSTALL_IHEX) program_no_e: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE @echo " installing $(PLATFORM) binary using bsl (without mass erase)" $(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -I -p $(INSTALL_IHEX) rm -f $(subst .ihex.,.exe.,$(INSTALL_IHEX)) $(INSTALL_IHEX) program_bl: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE @echo " installing $(PLATFORM) bootloader using bsl" $(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -e -I -p $(BOOTLOADER_IMG) program_input: ihex @: tinyos-2.1.2+dfsg/support/make/msp/debug.extra000066400000000000000000000001761207233610700213500ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ OPTFLAGS = -O1 -g -fnesc-no-inline tinyos-2.1.2+dfsg/support/make/msp/debugopt.extra000066400000000000000000000001551207233610700220700ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: debugopt.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ OPTFLAGS += -g tinyos-2.1.2+dfsg/support/make/msp/id.extra000066400000000000000000000004061207233610700206520ustar00rootroot00000000000000# The id.extra will simply output the binary with altered node id's and # will not install the application to the node. You can install it manually. # Usage: make telosb id.3 # ==> Outputs main.ihex.out-3 NODEID = $(ID) BUILD_DEPS = setid tinyos-2.1.2+dfsg/support/make/msp/install.extra000066400000000000000000000005061207233610700217250ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: install.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $ NODEID = $(INSTALL) BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS) bytes setid program ifdef BOOTLOADER ifeq ($(BOOTLOADER),tosboot) BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS) setid program_bl program_no_e endif endif tinyos-2.1.2+dfsg/support/make/msp/jtag.extra000066400000000000000000000011501207233610700212000ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: jtag.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $ PROGRAM = jtag ifndef MSP_JTAG MSP_JTAG = msp430-jtag endif program: FORCE @echo " installing $(PLATFORM) binary using the parallel port jtag adapter" $(MSP_JTAG) $(MSP_JTAG_FLAGS) -Iepr $(INSTALL_IHEX) program_no_e: FORCE @echo " installing $(PLATFORM) binary using jtag (without mass erase)" $(MSP_JTAG) $(MSP_JTAG_FLAGS) -r -I -p $(INSTALL_IHEX) program_bl: FORCE @echo " installing $(PLATFORM) bootloader using jtag" $(MSP_JTAG) $(MSP_JTAG_FLAGS) -r -e -I -p $(BOOTLOADER_IMG) program_input: ihex @: tinyos-2.1.2+dfsg/support/make/msp/msp.rules000066400000000000000000000072301207233610700210660ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: msp.rules,v 1.20 2010-03-17 00:38:05 klueska Exp $ define MSP_HELP MSP extras: debug : compile with minimal optimization and debug symbols debugopt : compile with debug symbols Programmer options: bsl,auto : (default) use BSL programmer on the first mote found bsl, : use BSL programmer on serial port bsl,ref, : use BSL programmer on the mote with reference The dev or host parameter for the programmer option need not be specified, in which case it is expected to be defined as in an environment variable of the same name in all caps (such as BSL). endef HELP += $(MSP_HELP) ifdef MAKE_DEPUTY_FLAG NCC_SAFE_TINYOS_FLAGS = -DSAFE_TINYOS -I$(TOSDIR)/lib/safe -fnesc-deputy -fnesc-deputy-args='-I$(TOSDIR)/lib/safe/include --FLIDs=build/$(PLATFORM)/flids.txt --envmachine -DSAFE_TINYOS --nolib ' else NCC_SAFE_TINYOS_FLAGS = endif MSPGCC_MIN_VER := 4.6.3 MSPGCC_VER_OK := $(shell expr `msp430-gcc -dumpversion` \>= '$(MSPGCC_MIN_VER)') OBJCOPY = msp430-objcopy OBJDUMP = msp430-objdump SET_ID = tos-set-symbols NCC = ncc LIBS = -lm # Use __ as the separator - requires nesC 1.2.9 or later ifneq ($(filter sim,$(GOALS)),sim) PFLAGS += -fnesc-separator=__ endif AMADDR = ActiveMessageAddressC__addr BUILDDIR ?= build/$(PLATFORM) MAIN_EXE = $(BUILDDIR)/main.exe MAIN_IHEX = $(BUILDDIR)/main.ihex INSTALL_IHEX = $(MAIN_IHEX).out$(if $(NODEID),-$(NODEID),) PFLAGS += -Wall -Wshadow $(NESC_FLAGS) PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD) ifdef MSG_SIZE PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE) endif ifdef DEFAULT_LOCAL_GROUP PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) endif DEFAULT_PROGRAM ?= bsl BUILDLESS_DEPS += bytes # Use the 'if' function instead of the 'ifdef' construct because ifdef freaks # out with call in there. I don't know why. $(if $(PROGRAM),,$(call TOSMake_include,msp/$(DEFAULT_PROGRAM).extra)) # Build storage file if volumes.xml present ifneq ($(wildcard $(VOLUME_FILE)), ) build_storage: $(BUILDDIR)/StorageVolumes.h exe0: build_storage VOLUME_ALLOCATOR_FLAGS ?= $(BUILDDIR)/StorageVolumes.h: $(VOLUME_FILE) $(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUME_FILE) >$@ || rm -f $@ PFLAGS += -I$(BUILDDIR) else build_storage: endif ifndef BUILD_DEPS ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),) BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS) endif endif setid: FORCE @cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd cp $(MAIN_IHEX) $(INSTALL_IHEX); else cmd $(SET_ID) --objcopy $(OBJCOPY) --objdump $(OBJDUMP) --target ihex $(MAIN_IHEX) $(INSTALL_IHEX) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID); fi tos_buildinfo: ihex build_buildinfo FORCE @: tosimage: ihex build_tosimage FORCE @: ihex: exe FORCE $(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX) exe: exe0 bytes FORCE @: exe0: builddir $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE @echo " compiling $(COMPONENT) to a $(PLATFORM) binary" ifeq ("$(MSPGCC_VER_OK)","0") @echo @echo " WARNING: Minimum recommended msp430-gcc version for this TinyOS release is $(MSPGCC_MIN_VER)!!!" @echo endif $(NCC) -o $(MAIN_EXE) $(NCC_SAFE_TINYOS_FLAGS) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) ifdef WIRING_CHECK_FILE @nescc-wiring $(WIRING_CHECK_FILE) endif @echo " compiled $(COMPONENT) to $(MAIN_EXE)" builddir: FORCE mkdir -p $(BUILDDIR) bytes: FORCE @$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }' tinyos-2.1.2+dfsg/support/make/msp/reinstall.extra000066400000000000000000000007211207233610700222530ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: reinstall.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $ NODEID = $(REINSTALL) BUILD_DEPS = setid program ifdef BOOTLOADER ifeq ($(BOOTLOADER),tosboot) BUILD_DEPS = setid program_bl program_no_e endif endif check_tosboot: FORCE @perl -e 'exit 0 if (<> =~ /^\:103000/); print "\nERROR: Trying to install with tosboot support.\n main.ihex was not built properly, please recompile.\n\n"; exit 1;' $(INSTALL_IHEX) tinyos-2.1.2+dfsg/support/make/mulle.target000077500000000000000000000040441207233610700207450ustar00rootroot00000000000000#-#-Makefile-#- vim:syntax=make ## # Copyright (c) 2009 Communication Group and Eislab at # Lulea University of Technology # # Contact: Laurynas Riliskis, LTU # Mail: laurynas.riliskis@ltu.se # All rights reserved. # # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of Communication Group at Lulea University of Technology # nor the names of its contributors may be used to endorse or promote # products derived from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD # UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. ## # @author Henrik Makitaavola PLATFORM = mulle # Flash settings VOLUMEFILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db VOLUME_ALLOCATOR_FLAGS ?= -s 512 -f 4096 #MCU settings M16C60_MCU=62p $(call TOSMake_include_platform,m16c60) mulle: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/nowiring.extra000066400000000000000000000000541207233610700213120ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make NOWIRING=1 tinyos-2.1.2+dfsg/support/make/null.target000066400000000000000000000003131207233610700205710ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: null.target,v 1.4 2006-12-12 18:22:55 vlahan Exp $ PLATFORM = null PFLAGS += -finline-limit=100000 $(call TOSMake_include_platform,null) null: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/null/000077500000000000000000000000001207233610700173645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/null/debug.extra000066400000000000000000000001761207233610700215230ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ OPTFLAGS += -O1 -g -fnesc-no-inline tinyos-2.1.2+dfsg/support/make/null/null.rules000066400000000000000000000037251207233610700214210ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: null.rules,v 1.10 2010-03-17 00:38:05 klueska Exp $ define NULL_HELP NULL extras: debug : compile with minimal optimization and debug symbols endef HELP += $(NULL_HELP) export GCC=gcc OBJCOPY = objcopy OBJDUMP = objdump NCC = ncc LIBS = -lm BUILDDIR ?= build/$(PLATFORM) MAIN_EXE = $(BUILDDIR)/main.exe MAIN_SREC = $(BUILDDIR)/main.srec MAIN_IHEX = $(BUILDDIR)/main.ihex INSTALL_SREC = $(MAIN_SREC).out$(if $(NODEID),-$(NODEID),) VOLUMEFILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db PFLAGS += -Wall -Wshadow -fnesc-gcc=$(GCC) $(NESC_FLAGS) PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c ifdef MSG_SIZE PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE) endif ifdef DEFAULT_LOCAL_GROUP PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) endif ifeq ($(findstring Darwin, $(shell uname)), Darwin) CFLAGS += -D_FORTIFY_SOURCE=0 OBJCOPY = /usr/bin/true OBJDUMP = /usr/bin/true endif BUILDLESS_DEPS += bytes # Build storage file if volumes.xml present # We "steal" the at45db storage spec ifneq ($(wildcard $(VOLUMEFILE)), ) build_storage: $(BUILDDIR)/StorageVolumes.h exe0: build_storage $(BUILDDIR)/StorageVolumes.h: $(VOLUMEFILE) $(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) <$(VOLUMEFILE) >$@ PFLAGS += -I$(BUILDDIR) else build_storage: endif ifndef BUILD_DEPS ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),) BUILD_DEPS = exe bytes $(POST_BUILD_EXTRA_DEPS) endif endif exe: exe0 bytes FORCE @: exe0: builddir $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE @echo " compiling $(COMPONENT) to a $(PLATFORM) binary" $(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) @echo " compiled $(COMPONENT) to $(MAIN_EXE)" builddir: FORCE mkdir -p $(BUILDDIR) bytes: FORCE @$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }' tinyos-2.1.2+dfsg/support/make/pxa27x/000077500000000000000000000000001207233610700175435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/pxa27x/debug.extra000066400000000000000000000002361207233610700216770ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ #OPTFLAGS = -O1 -g -fnesc-no-inline OPTFLAGS = -g -fnesc-no-inline tinyos-2.1.2+dfsg/support/make/pxa27x/debugopt.extra000066400000000000000000000001611207233610700224170ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: debugopt.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ OPTFLAGS += -O3 -g tinyos-2.1.2+dfsg/support/make/pxa27x/install.extra000066400000000000000000000002261207233610700222560ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: install.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ NODEID = $(INSTALL) BUILD_DEPS = bin bytes setid program tinyos-2.1.2+dfsg/support/make/pxa27x/jflashmm.extra000066400000000000000000000007001207233610700224060ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: jflashmm.extra,v 1.5 2008-05-27 18:21:43 kusy Exp $ PROGRAM = jflashmm PROGRAMMER ?= jflashmm.exe PROGRAMMER_FLAGS = bulbcx16 POST_INSTALL_BIN_FLAGS = P 0x0 PXA27X_JTAG_DEV ?= "JTAG CPU" #PXA27X_JTAG_DEV ?= "INTEL(R) JTAG CABLE" program: FORCE @echo " installing $(PLATFORM) binary using $(PROGRAM)" $(PROGRAMMER) $(PROGRAMMER_FLAGS) $(INSTALL_BIN) $(POST_INSTALL_BIN_FLAGS) program_input: bin @: tinyos-2.1.2+dfsg/support/make/pxa27x/openocd.extra000066400000000000000000000006051207233610700222400ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make # # To install OpenOCD, see the following wiki page: # http://docs.tinyos.net/index.php/OpenOCD_for_IMote2 # PROGRAM = imote2-ocd-program.py PROGRAMMER ?= $(TOSROOT)/tools/platforms/intelmote2/openocd/imote2-ocd-program.py program: FORCE @echo " installing $(PLATFORM) binary using $(PROGRAM)" $(PROGRAMMER) $(INSTALL_BIN) program_input: bin @: tinyos-2.1.2+dfsg/support/make/pxa27x/pxa27x.rules000066400000000000000000000063251207233610700217560ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: pxa27x.rules,v 1.12 2010-03-17 00:38:05 klueska Exp $ define PXA27X_HELP PXA27x extras: debug : compile with minimal optimization and debug symbols debugopt : compile with debug symbols Programmer extras: jflashmm : (default) use the Intel JFLASHMM tool to install xflash : Use the Intel XFLASH tool to install openocd : Use openocd to install endef HELP += $(PXA27X_HELP) GAS = xscale-elf-gcc -c # This ensures .c and .s compiled object are compatible OBJCOPY = xscale-elf-objcopy OBJDUMP = xscale-elf-objdump SET_ID = tos-set-symbols XDB_SYMBOL_EXTRACT = dwarf2bd NCC = ncc LIBS = -lm AMADDR = ActiveMessageAddressC\$$addr BUILDDIR ?= build/$(PLATFORM) MAIN_EXE = $(BUILDDIR)/main.exe MAIN_BIN = $(BUILDDIR)/main.bin INSTALL_BIN = $(MAIN_BIN).out$(if $(NODEID),-$(NODEID),) #PLATFORM_DIR = $(TOSDIR)/chips/pxa27x #ASSEMBLY_FILES += $(PLATFORM_DIR)/mmu_table.s $(PLATFORM_DIR)/util.s ASSEMBLY_OBJS = $(BUILDDIR)/asms.o #LIBRARY_OBJS = $(PLATFORM_DIR)/lib/profile.o $(PLATFORM_DIR)/lib/queue.o OPTFLAGS ?= -O3 -g PFLAGS += -Wall -Wshadow $(NESC_FLAGS) PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD) ifdef MSG_SIZE PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE) endif ifdef DEFAULT_LOCAL_GROUP PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) endif DEFAULT_PROGRAM ?= jflashmm BUILDLESS_DEPS += bytes # Use the 'if' function instead of the 'ifdef' construct because ifdef freaks # out with call in there. I don't know why. $(if $(PROGRAM),,$(call TOSMake_include,pxa27x/$(DEFAULT_PROGRAM).extra)) # Build storage file if volumes.xml present ifneq ($(wildcard $(VOLUME_FILE)), ) build_storage: $(BUILDDIR)/StorageVolumes.h exe0: build_storage VOLUME_ALLOCATOR_FLAGS ?= $(BUILDDIR)/StorageVolumes.h: $(VOLUME_FILE) $(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUME_FILE) >$@ || rm -f $@ PFLAGS += -I$(BUILDDIR) else build_storage: endif ifndef BUILD_DEPS ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),) BUILD_DEPS = bin bytes $(POST_BUILD_EXTRA_DEPS) endif endif setid: FORCE @cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd $(OBJCOPY) --output-target=binary $(MAIN_EXE) $(INSTALL_BIN); else cmd $(SET_ID) --objcopy $(OBJCOPY) --objdump $(OBJDUMP) --target binary $(MAIN_EXE) $(INSTALL_BIN) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID); fi bin: exe FORCE @cmd () { echo "$$@"; $$@; }; if [ "${PROGRAM}" = "xflash" ]; then $(XDB_SYMBOL_EXTRACT) $(MAIN_EXE); fi exe: exe0 bytes FORCE @: exe0: builddir asms $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE @echo " compiling $(COMPONENT) to a $(PLATFORM) binary" $(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) $(ASSEMBLY_OBJS) $(LIBRARY_OBJS) ifdef WIRING_CHECK_FILE @nescc-wiring $(WIRING_CHECK_FILE) endif @echo " compiled $(COMPONENT) to $(MAIN_EXE)" builddir: FORCE mkdir -p $(BUILDDIR) bytes: FORCE @$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }' asms: $(GAS) $(ASSEMBLY_FILES) -o $(BUILDDIR)/asms.o library: cd $(PLATFORM_DIR)/lib; make; tinyos-2.1.2+dfsg/support/make/pxa27x/reinstall.extra000066400000000000000000000002211207233610700226000ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: reinstall.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ NODEID = $(REINSTALL) BUILD_DEPS = setid program tinyos-2.1.2+dfsg/support/make/pxa27x/xflash.extra000066400000000000000000000005561207233610700221030ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: xflash.extra,v 1.5 2008-05-29 20:16:43 kusy Exp $ PROGRAM = xflash PROGRAMMER ?= xflash.exe PROGRAMMER_FLAGS = -p imote2 PXA27X_JTAG_DEV ?= "JTAG CPU" program: FORCE @echo " installing $(PLATFORM) binary using $(PROGRAM)" $(PROGRAMMER) $(PROGRAMMER_FLAGS) -tt $(PXA27X_JTAG_DEV) $(INSTALL_BIN) program_input: bin @: tinyos-2.1.2+dfsg/support/make/rst.extra000066400000000000000000000000621207233610700202650ustar00rootroot00000000000000BUILD_DEPS = res AVR109=$(RST) res: $(RESET_LINE)tinyos-2.1.2+dfsg/support/make/safe.extra000066400000000000000000000001011207233610700203650ustar00rootroot00000000000000#-*-Makefile-*- MAKE_DEPUTY_FLAG := 1 #export MAKE_DEPUTY_FLAG tinyos-2.1.2+dfsg/support/make/sam3/000077500000000000000000000000001207233610700172555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/sam3/debug.extra000066400000000000000000000001301207233610700214020ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make OPTFLAGS = -g -fnesc-no-inline CFLAGS += -DDEBUG_CORE tinyos-2.1.2+dfsg/support/make/sam3/debugopt.extra000066400000000000000000000000611207233610700221300ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make OPTFLAGS += -g tinyos-2.1.2+dfsg/support/make/sam3/install.extra000066400000000000000000000005421207233610700217710ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: install.extra,v 1.4 2006/12/12 18:22:59 vlahan Exp $ NODEID = $(INSTALL) BUILD_DEPS = bin tosimage bytes setid ifdef BOOTLOADER ifeq ($(BOOTLOADER),tosboot) ifdef INSTALL_GOLDENIMAGE BUILD_DEPS += program_gi else BUILD_DEPS += program_ngi endif endif else BUILD_DEPS += program endif tinyos-2.1.2+dfsg/support/make/sam3/mpu.extra000066400000000000000000000002361207233610700211240ustar00rootroot00000000000000# use special linker file to provide symbols and alignment for memory protection LINKERFILE_PREFIX ?= sam3u-ek-flash LINKERFILE ?= $(LINKERFILE_PREFIX)-mp.x tinyos-2.1.2+dfsg/support/make/sam3/sam-ba-3s.extra000066400000000000000000000030761207233610700220130ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make PROGRAM = samba-program.py SAM-BA ?= /dev/ttyUSB10 START_ADDR ?= 0x400000 PROGRAMMER ?= $(PROGRAM) DELUGE_BASE_EXE=$(BUILDDIR)/deluge-base.exe DELUGE_BASE_BIN=$(BUILDDIR)/deluge-base.bin program: FORCE @echo " installing $(PLATFORM) binary using $(PROGRAM)" $(PROGRAMMER) -b $(INSTALL_BIN) -s $(START_ADDR) -t at91sam3s4-ek -p $(SAM-BA) -r -c deluge_base_bin: FORCE @echo "Compiling $(PLATFORM) deluge base station" @$(NCC) -o $(DELUGE_BASE_EXE) $(OPTFLAGS) $(PFLAGS) -DDELUGE_BASESTATION $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) @$(OBJCOPY) --output-target=binary $(DELUGE_BASE_EXE) $(DELUGE_BASE_BIN) program_gi: deluge_base_bin FORCE @echo "Installing $(PLATFORM) deluge base station using $(PROGRAM)" $(PROGRAMMER) -b $(DELUGE_BASE_BIN) -s $(TOSBOOT_REALPROG_START) -t at91sam3s4-ek -p $(SAM-BA) -c @echo "Installing $(PLATFORM) bootloader using $(PROGRAM)" $(PROGRAMMER) -b $(BOOTLOADER_IMG) -s $(TOSBOOT_START) -t at91sam3s4-ek -p $(SAM-BA) -r -c @echo "Injecting $(PLATFORM) golden image" @sleep 5 tos-deluge $(INSTALL_GOLDENIMAGE) -i 0 $(BUILDDIR)/tos_image.xml @echo "Rebooting into $(PLATFORM) golden image" @sleep 1 tos-deluge $(INSTALL_GOLDENIMAGE) -r 0 program_ngi: FORCE @echo "Installing $(PLATFORM) binary using $(PROGRAM)" $(PROGRAMMER) -b $(INSTALL_BIN) -s $(TOSBOOT_REALPROG_START) -t at91sam3s4-ek -p $(SAM-BA) -c @echo "Installing $(PLATFORM) bootloader using $(PROGRAM)" $(PROGRAMMER) -b $(BOOTLOADER_IMG) -s $(TOSBOOT_START) -t at91sam3s4-ek -p $(SAM-BA) -r -c program_input: bin @: tinyos-2.1.2+dfsg/support/make/sam3/sam-ba.extra000066400000000000000000000030671207233610700214700ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make PROGRAM = samba-program.py SAM-BA ?= /dev/ttyUSB0 START_ADDR ?= 0x80000 BOARD ?= at91sam3u4-ek PROGRAMMER ?= $(PROGRAM) DELUGE_BASE_EXE=$(BUILDDIR)/deluge-base.exe DELUGE_BASE_BIN=$(BUILDDIR)/deluge-base.bin program: FORCE @echo " installing $(PLATFORM) binary using $(PROGRAM)" $(PROGRAMMER) -b $(INSTALL_BIN) -s $(START_ADDR) -t $(BOARD) -p $(SAM-BA) -r deluge_base_bin: FORCE @echo "Compiling $(PLATFORM) deluge base station" @$(NCC) -o $(DELUGE_BASE_EXE) $(OPTFLAGS) $(PFLAGS) -DDELUGE_BASESTATION $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) @$(OBJCOPY) --output-target=binary $(DELUGE_BASE_EXE) $(DELUGE_BASE_BIN) program_gi: deluge_base_bin FORCE @echo "Installing $(PLATFORM) deluge base station using $(PROGRAM)" $(PROGRAMMER) -b $(DELUGE_BASE_BIN) -s $(TOSBOOT_REALPROG_START) -t $(BOARD) -p $(SAM-BA) -c @echo "Installing $(PLATFORM) bootloader using $(PROGRAM)" $(PROGRAMMER) -b $(BOOTLOADER_IMG) -s $(TOSBOOT_START) -t $(BOARD) -p $(SAM-BA) -r -c @echo "Injecting $(PLATFORM) golden image" @sleep 5 tos-deluge $(INSTALL_GOLDENIMAGE) -i 0 $(BUILDDIR)/tos_image.xml @echo "Rebooting into $(PLATFORM) golden image" @sleep 1 tos-deluge $(INSTALL_GOLDENIMAGE) -r 0 program_ngi: FORCE @echo "Installing $(PLATFORM) binary using $(PROGRAM)" $(PROGRAMMER) -b $(INSTALL_BIN) -s $(TOSBOOT_REALPROG_START) -t $(BOARD) -p $(SAM-BA) -c @echo "Installing $(PLATFORM) bootloader using $(PROGRAM)" $(PROGRAMMER) -b $(BOOTLOADER_IMG) -s $(TOSBOOT_START) -t $(BOARD) -p $(SAM-BA) -r -c program_input: bin @: tinyos-2.1.2+dfsg/support/make/sam3/sam3.rules000066400000000000000000000057361207233610700212070ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make define SAM3_HELP SAM3 extras: None available at the moment. endef HELP += $(SAM3_HELP) OBJCOPY = arm-none-eabi-objcopy OBJDUMP = arm-none-eabi-objdump SET_ID = tos-set-symbols NCC = ncc LIBS = -lm AMADDR = ActiveMessageAddressC\$$addr BUILDDIR ?= build/$(PLATFORM) MAIN_EXE = $(BUILDDIR)/main.exe MAIN_BIN = $(BUILDDIR)/main.bin MAIN_IHEX = $(BUILDDIR)/main.ihex INSTALL_BIN = $(MAIN_BIN).out$(if $(NODEID),-$(NODEID),) INCLUDE_DIRS ?= $(TOSDIR)/platforms/$(PLATFORM) EXTRA_MODULES ?= $(TOSDIR)/platforms/$(PLATFORM)/vectors.c OPTFLAGS ?= -O3 -g CFLAGS += -mcpu=cortex-m3 -mthumb -fno-strict-aliasing PFLAGS += $(EXTRA_MODULES) PFLAGS += -I$(INCLUDE_DIRS) PFLAGS += -Wall -Wshadow $(NESC_FLAGS) PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c PFLAGS += -finline-limit=100000 PFLAGS += -board=$(SENSORBOARD) # can be overridden by MP-enabled linker file (see mpu.extra) LINKERFILE_PREFIX ?= sam3u-ek-flash LINKERFILE ?= $(LINKERFILE_PREFIX).x LDFLAGS += -L$(INCLUDE_DIRS) -T $(LINKERFILE) BUILDLESS_DEPS += bytes # Build storage file if volumes.xml present ifneq ($(wildcard $(VOLUME_FILE)), ) build_storage: $(BUILDDIR)/StorageVolumes.h exe0: build_storage VOLUME_ALLOCATOR_FLAGS ?= $(BUILDDIR)/StorageVolumes.h: $(VOLUME_FILE) $(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUME_FILE) >$@ || rm -f $@ PFLAGS += -I$(BUILDDIR) else build_storage: endif ifndef BUILD_DEPS ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),) BUILD_DEPS = bin tosimage bytes $(POST_BUILD_EXTRA_DEPS) endif endif ifdef MSG_SIZE PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE) endif ifdef DEFAULT_LOCAL_GROUP PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) endif DEFAULT_PROGRAM ?= sam-ba # Use the 'if' function instead of the 'ifdef' construct because ifdef freaks # out with call in there. I don't know why. $(if $(PROGRAM),,$(call TOSMake_include,sam3/$(DEFAULT_PROGRAM).extra)) exe: exe0 bytes FORCE @: exe0: builddir $(BUILD_EXTRA_DEPS) FORCE @echo " compiling $(COMPONENT) to a $(PLATFORM) binary" $(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) ifdef WIRING_CHECK_FILE @nescc-wiring $(WIRING_CHECK_FILE) endif @echo " compiled $(COMPONENT) to $(MAIN_EXE)" builddir: FORCE mkdir -p $(BUILDDIR) setid: FORCE @cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd $(OBJCOPY) --output-target=binary $(MAIN_EXE) $(INSTALL_BIN); else cmd $(SET_ID) --objcopy $(OBJCOPY) --objdump $(OBJDUMP) --target binary $(MAIN_EXE) $(INSTALL_BIN) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID); fi tosimage: ihex build_tosimage FORCE @: bin: exe FORCE $(OBJCOPY) --output-target=binary $(MAIN_EXE) $(MAIN_BIN) ihex: exe FORCE $(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX) bytes: FORCE @$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }' tinyos-2.1.2+dfsg/support/make/sam3s_ek.target000066400000000000000000000004501207233610700213260ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make PLATFORM = sam3s_ek LINKERFILE_PREFIX?=sam3s-ek-flash SAM-BA?=/dev/ttyUSB10 START_ADDR?=0x400000 BOARD?=at91sam3s4-ek ifdef CC2520_CHANNEL PFLAGS += -DCC2520_DEF_CHANNEL=$(CC2520_CHANNEL) endif $(call TOSMake_include_platform,sam3) sam3s_ek: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/sam3u_ek.target000066400000000000000000000003051207233610700213270ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make PLATFORM = sam3u_ek ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif $(call TOSMake_include_platform,sam3) sam3u_ek: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/savepp.extra000066400000000000000000000001561207233610700207570ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make PFLAGS += -fnesc-cppdir=pp BUILD_EXTRA_DEPS += rmpp rmpp: FORCE rm -rf pp tinyos-2.1.2+dfsg/support/make/shimmer.target000066400000000000000000000005221207233610700212650ustar00rootroot00000000000000PLATFORM = shimmer # Remove MSP430 hardware multiply disable: new msp430-gcc fixes # PFLAGS += -mdisable-hwmul #OPTFLAGS += -O MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --invert-test --invert-reset ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif $(call TOSMake_include_platform,msp) shimmer: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/shimmer2.target000066400000000000000000000005241207233610700213510ustar00rootroot00000000000000PLATFORM = shimmer2 # Remove MSP430 hardware multiply disable: new msp430-gcc fixes # PFLAGS += -mdisable-hwmul #OPTFLAGS += -O MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --invert-test --invert-reset ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif $(call TOSMake_include_platform,msp) shimmer2: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/shimmer2r.target000066400000000000000000000005251207233610700215340ustar00rootroot00000000000000PLATFORM = shimmer2r # Remove MSP430 hardware multiply disable: new msp430-gcc fixes #PFLAGS += -mdisable-hwmul #OPTFLAGS += -O MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --invert-test --invert-reset ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif $(call TOSMake_include_platform,msp) shimmer2r: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/sim-fast.extra000066400000000000000000000064501207233610700212070ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: sim-fast.extra,v 1.8 2010-04-08 04:27:24 regehr Exp $ GCC=gcc GPP=g++ OPTFLAGS = -g -O3 LIBS = -lm -lstdc++ PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\) -DTOSSIM_NO_DEBUG WFLAGS = -Wno-nesc-data-race PYTHON_VERSION ?= $(shell python --version 2>&1 | sed 's/Python 2\.\([0-9]\)\.[0-9]+\{0,1\}/2.\1/') BUILDDIR = simbuild/$(PLATFORM) CFILE = $(BUILDDIR)/sim.c OBJFILE = $(BUILDDIR)/sim.o CXXFILE = $(TOSDIR)/lib/tossim/tossim.c CXXOBJFILE = $(BUILDDIR)/tossim.o HASHFILE = $(TOSDIR)/lib/tossim/hashtable.c HASHOBJFILE = $(BUILDDIR)/c-support.o PYFILE = $(TOSDIR)/lib/tossim/tossim_wrap.cxx PYOBJFILE = $(BUILDDIR)/pytossim.o PYDIR =/usr/include/python$(PYTHON_VERSION) SIMDIR =$(TOSDIR)/lib/tossim XML = app.xml DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags ifeq ($(findstring cygwin, $(OSTYPE)),cygwin) PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic SHARED_OBJECT=_TOSSIM.dll PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base PLATFORM_LIB_FLAGS = -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION) else ifeq ($(OS),Windows_NT) # Some TinyOS installs are like this PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic SHARED_OBJECT=_TOSSIM.dll PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base PLATFORM_LIB_FLAGS = -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION) else ifeq ($(findstring darwin, $(OSTYPE)), darwin) PLATFORM_FLAGS=-fPIC PLATFORM_CC_FLAGS=-bundle SHARED_OBJECT=_TOSSIMmodule.so PLATFORM_BUILD_FLAGS=-flat_namespace -undefined suppress PLATFORM_LIB_FLAGS = -lstdc++ else # linux PLATFORM_FLAGS=-shared -fPIC SHARED_OBJECT=_TOSSIMmodule.so PLATFORM_LIB_FLAGS = -lstdc++ PLATFORM_BUILD_FLAGS= -shared -fPIC endif endif endif BUILD_DEPS = sim-exe # lib/tossim has to come at the end in order to ensure basic TOSSIM # implementations are the last resort, so put it directly in the call sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE @echo " placing object files in $(BUILDDIR)" @echo " writing XML schema to $(XML)" @echo " compiling $(COMPONENT) to object file sim.o" $(NCC) -c $(PLATFORM_FLAGS) -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS) $(DUMPTYPES) -fnesc-dumpfile=$(XML) @echo " compiling Python support and C libraries into pytossim.o, tossim.o, and c-support.o" $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR) $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(HASHOBJFILE) $(OPTFLAGS) $(CFLAGS) $(HASHFILE) -I$(PYDIR) -I$(SIMDIR) @echo " linking into shared object ./$(SHARED_OBJECT)" $(GPP) $(PLATFORM_BUILD_FLAGS) $(PLATFORM_CC_FLAGS) $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) $(HASHOBJFILE) $(PLATFORM_LIB_FLAGS) -o $(SHARED_OBJECT) @echo " copying Python script interface TOSSIM.py from lib/tossim to local directory" @cp $(TOSDIR)/lib/tossim/TOSSIM.py . @echo " " @echo "*** Successfully built $(PLATFORM) TOSSIM library. " tinyos-2.1.2+dfsg/support/make/sim-sf.extra000066400000000000000000000135621207233610700206640ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: sim-sf.extra,v 1.1 2007-10-03 02:09:59 hiro Exp $ # Copyright (c) 2007 Toilers Research Group - Colorado School of Mines # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of Toilers Research Group - Colorado School of # Mines nor the names of its contributors may be used to endorse # or promote products derived from this software without specific # prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD # UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # # Author: Chad Metcalf SF_DIR=$(TOSDIR)/lib/tossim/sf SF_FLAGS=-I$(SF_DIR) GCC=gcc GPP=g++ OPTFLAGS = -g -O0 LIBS = -lm -lstdc++ PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\) $(SF_FLAGS) WFLAGS = -Wno-nesc-data-race PYTHON_VERSION ?= $(shell python --version 2>&1 | sed 's/Python 2\.\([0-9]\)\.[0-9]+\{0,1\}/2.\1/') BUILDDIR = simbuild/$(PLATFORM) CFILE = $(BUILDDIR)/sim.c OBJFILE = $(BUILDDIR)/sim.o CSFFILE = $(SF_DIR)/sim_serial_forwarder.c CSFOBJFILE = $(BUILDDIR)/c-sf.o SFFILE = $(SF_DIR)/SerialForwarder.c SFOBJFILE = $(BUILDDIR)/sf.o THROTTLEFILE = $(SF_DIR)/Throttle.cpp THROTTLEOBJFILE = $(BUILDDIR)/throttle.o PYFILE = $(SF_DIR)/tossim_wrap.cxx PYOBJFILE = $(BUILDDIR)/pytossim.o CXXFILE = $(SF_DIR)/tossim.c CXXOBJFILE = $(BUILDDIR)/tossim.o HASHFILE = $(TOSDIR)/lib/tossim/hashtable.c HASHOBJFILE = $(BUILDDIR)/c-support.o PYDIR = /usr/include/python$(PYTHON_VERSION) SIMDIR = $(TOSDIR)/lib/tossim XML = app.xml DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags ifeq ($(findstring cygwin, $(OSTYPE)),cygwin) PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic SHARED_OBJECT=_TOSSIM.dll PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base PLATFORM_LIB_FLAGS = -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION) else ifeq ($(OS), Windows_NT) # Some TinyOS installs are like this PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic SHARED_OBJECT=_TOSSIM.dll PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base PLATFORM_LIB_FLAGS =-shared -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION) else ifeq ($(findstring darwin, $(OSTYPE)), darwin) PLATFORM_FLAGS=-fPIC PLATFORM_CC_FLAGS=-bundle SHARED_OBJECT=_TOSSIMmodule.so PLATFORM_BUILD_FLAGS=-flat_namespace -undefined suppress PLATFORM_LIB_FLAGS = -lstdc++ else # linux PLATFORM_FLAGS=-shared -fPIC SHARED_OBJECT=_TOSSIMmodule.so PLATFORM_LIB_FLAGS = -lstdc++ PLATFORM_BUILD_FLAGS= -shared -fPIC endif endif endif BUILD_DEPS = sim-exe # lib/tossim has to come at the end in order to ensure basic TOSSIM # implementations are the last resort, so put it directly in the call sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE @echo " placing object files in $(BUILDDIR)" @echo " writing XML schema to $(XML)" @echo " compiling $(COMPONENT) to object file sim.o" $(NCC) -c $(PLATFORM_FLAGS) -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS) $(DUMPTYPES) -fnesc-dumpfile=$(XML) @echo " compiling Python support and C libraries into pytossim.o, tossim.o, and c-support.o" $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR) $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(HASHOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(HASHFILE) -I$(PYDIR) -I$(SIMDIR) @echo " compiling sf support and C libraries into sf.o, c-sf.o, and throttle.o" $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CSFOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(CSFFILE) -I$(PYDIR) -I$(SIMDIR) $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(SFOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(SFFILE) -I$(PYDIR) -I$(SIMDIR) $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(THROTTLEOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(THROTTLEFILE) -I$(PYDIR) -I$(SIMDIR) @echo " linking into shared object ./$(SHARED_OBJECT)" $(GPP) $(PLATFORM_BUILD_FLAGS) $(PLATFORM_CC_FLAGS) $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) $(HASHOBJFILE) $(CSFOBJFILE) $(SFOBJFILE) $(THROTTLEOBJFILE) $(PLATFORM_LIB_FLAGS) $(LIBS) -o $(SHARED_OBJECT) @echo " copying Python script interface TOSSIM.py from lib/tossim to local directory" @cp $(SF_DIR)/TOSSIM.py . @echo " " @echo "*** Successfully built $(PLATFORM) TOSSIM library with TOSSIM Live extensions. " tinyos-2.1.2+dfsg/support/make/sim.extra000066400000000000000000000067661207233610700202660ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: sim.extra,v 1.14 2009-11-14 02:14:18 razvanm Exp $ export GCC=gcc GPP=g++ OPTFLAGS = -g -O0 LIBS = -lm -lstdc++ PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\) -fnesc-gcc=$(GCC) WFLAGS = -Wno-nesc-data-race PYTHON_VERSION ?= $(shell python --version 2>&1 | sed 's/Python 2\.\([0-9]\)\.[0-9]+\{0,1\}/2.\1/') BUILDDIR = simbuild/$(PLATFORM) CFILE = $(BUILDDIR)/sim.c OBJFILE = $(BUILDDIR)/sim.o CXXFILE = $(TOSDIR)/lib/tossim/tossim.c CXXOBJFILE = $(BUILDDIR)/tossim.o HASHFILE = $(TOSDIR)/lib/tossim/hashtable.c HASHOBJFILE = $(BUILDDIR)/c-support.o PYFILE = $(TOSDIR)/lib/tossim/tossim_wrap.cxx PYOBJFILE = $(BUILDDIR)/pytossim.o PYDIR = $(shell python$(PYTHON_VERSION)-config --prefix)/include/python$(PYTHON_VERSION) SIMDIR =$(TOSDIR)/lib/tossim XML = app.xml DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags ifeq ($(findstring cygwin, $(OSTYPE)),cygwin) PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic SHARED_OBJECT=_TOSSIM.dll PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base PLATFORM_LIB_FLAGS = -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION) else ifeq ($(OS), Windows_NT) # Some TinyOS installs are like this PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic SHARED_OBJECT=_TOSSIM.dll PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base PLATFORM_LIB_FLAGS =-shared -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION) else ifeq ($(findstring darwin, $(OSTYPE)), darwin) SIM_DARWIN=TRUE else ifeq ($(findstring Darwin, $(shell uname)), Darwin) SIM_DARWIN = TRUE else # linux PLATFORM_FLAGS=-shared -fPIC SHARED_OBJECT=_TOSSIMmodule.so PLATFORM_LIB_FLAGS = -lstdc++ PLATFORM_BUILD_FLAGS= -shared -fPIC endif endif endif endif ifdef SIM_DARWIN PLATFORM_FLAGS=-fPIC -D_FORTIFY_SOURCE=0 PLATFORM_CC_FLAGS=-bundle SHARED_OBJECT=_TOSSIMmodule.so PLATFORM_BUILD_FLAGS=-flat_namespace -undefined suppress PLATFORM_LIB_FLAGS = -lstdc++ endif BUILD_DEPS = sim-exe # lib/tossim has to come at the end in order to ensure basic TOSSIM # implementations are the last resort, so put it directly in the call sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE @echo " placing object files in $(BUILDDIR)" @echo " writing XML schema to $(XML)" @echo " compiling $(COMPONENT) to object file sim.o" $(NCC) -c $(PLATFORM_FLAGS) -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS) $(DUMPTYPES) -fnesc-dumpfile=$(XML) @echo " compiling Python support and C libraries into pytossim.o, tossim.o, and c-support.o" $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR) $(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(HASHOBJFILE) $(OPTFLAGS) $(CFLAGS) $(HASHFILE) -I$(PYDIR) -I$(SIMDIR) @echo " linking into shared object ./$(SHARED_OBJECT)" $(GPP) $(PLATFORM_BUILD_FLAGS) $(PLATFORM_CC_FLAGS) $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) $(HASHOBJFILE) $(PLATFORM_LIB_FLAGS) -o $(SHARED_OBJECT) @echo " copying Python script interface TOSSIM.py from lib/tossim to local directory" @cp $(TOSDIR)/lib/tossim/TOSSIM.py . @echo " " @echo "*** Successfully built $(PLATFORM) TOSSIM library. " tinyos-2.1.2+dfsg/support/make/span.target000066400000000000000000000005361207233610700205670ustar00rootroot00000000000000PLATFORM = span # Remove MSP430 hardware multiply disable: new msp430-gcc fixes # PFLAGS += -mdisable-hwmul #OPTFLAGS += -O MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --invert-test --invert-reset ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif $(call TOSMake_include_platform,msp) span: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/stack-check.extra000066400000000000000000000000611207233610700216340ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make STACK_CHECK = 1 tinyos-2.1.2+dfsg/support/make/telos.target000066400000000000000000000003641207233610700207530ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: telos.target,v 1.4 2006-12-12 18:22:55 vlahan Exp $ TELOS_REV ?= A ifeq ($(TELOS_REV),A) TELOS_TARGET = telosa.target else TELOS_TARGET = telosb.target endif $(call TOSMake_include,$(TELOS_TARGET)) tinyos-2.1.2+dfsg/support/make/telosa.target000066400000000000000000000006141207233610700211120ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: telosa.target,v 1.6 2008-03-11 09:34:13 klueska Exp $ PLATFORM ?= telosa MSP_MCU = msp430f149 MSP_BSL ?= tos-bsl ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif VOLUME_FILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db $(call TOSMake_include_platform,msp) telos: $(BUILD_DEPS) @: telosa: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/telosb.target000066400000000000000000000006161207233610700211150ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: telosb.target,v 1.5 2008-03-11 09:34:13 klueska Exp $ PLATFORM ?= telosb MSP_BSL ?= tos-bsl MSP_BSL_FLAGS = --telosb VOLUME_FILE = volumes-stm25p.xml VOLUME_ALLOCATOR ?= tos-storage-stm25p ifdef CC2420_CHANNEL PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL) endif $(call TOSMake_include_platform,msp) telos: $(BUILD_DEPS) @: telosb: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/tframe.extra000066400000000000000000000004201207233610700207310ustar00rootroot00000000000000# Makefile extra for compiling 802.15.4 TinyOS apps with t-frames. # T-frames are not interoperable with 6lowpan networks. # Please see TEP 125 for details. # Philip Levis, June 15 2008. #Include directory where T-Frame implementation lies. CFLAGS += -DTFRAMES_ENABLED tinyos-2.1.2+dfsg/support/make/threads.extra000066400000000000000000000141241207233610700211130ustar00rootroot00000000000000# Extra threads Makefile target to enable thread support for tinyos # Kevin Klues May 16th, 2008 # Chieh-Jan Mike Liang July 11th, 2008 #Set up flag signifying threads are enabled THREADS = THREADS PFLAGS += -D$(THREADS) TOS_THREADS_DIR ?= $(TOSDIR)/lib/tosthreads #Include directories required by all platforms and mcus CFLAGS += -I$(TOS_THREADS_DIR)/system CFLAGS += -I$(TOS_THREADS_DIR)/interfaces CFLAGS += -I$(TOS_THREADS_DIR)/types CFLAGS += -I$(TOS_THREADS_DIR)/lib/serial #Setup the thread scheduler for use by redefining the name of the task scheduler to use PFLAGS += -tosscheduler=SchedulerBasicP,TinyTaskSchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask #Msp430 specific include directories on tested platforms THREADS_MSP430_DIR = $(TOS_THREADS_DIR)/chips/msp430 THREADS_MSP430_INCLUDE_DIRS = -I$(THREADS_MSP430_DIR) THREADS_MSP430_INCLUDE_DIRS += -I$(THREADS_MSP430_DIR)/adc12 THREADS_MSP430_INCLUDE_DIRS += -I$(THREADS_MSP430_DIR)/sensors #Atm128 specific include directories on tested platforms THREADS_ATM128_DIR = $(TOS_THREADS_DIR)/chips/atm128 THREADS_ATM128_INCLUDE_DIRS = -I$(THREADS_ATM128_DIR) THREADS_ATM128_INCLUDE_DIRS += -I$(THREADS_ATM128_DIR)/adc #Atm1281 specific include directories on tested platforms THREADS_ATM1281_DIR = $(TOS_THREADS_DIR)/chips/atm1281 THREADS_ATM1281_INCLUDE_DIRS = -I$(THREADS_ATM1281_DIR) #CC1000 specific include directories on tested platforms THREADS_CC1000_DIR = $(TOS_THREADS_DIR)/chips/cc1000 THREADS_CC1000_INCLUDE_DIRS = -I$(THREADS_CC1000_DIR) #CC2420 specific include directories on tested platforms THREADS_CC2420_DIR = $(TOS_THREADS_DIR)/chips/cc2420 THREADS_CC2420_INCLUDE_DIRS = -I$(THREADS_CC2420_DIR) #RF230 specific include directories on tested platforms THREADS_RF230_DIR = $(TOS_THREADS_DIR)/chips/rf230 THREADS_RF230_INCLUDE_DIRS = -I$(THREADS_RF230_DIR) #TDA5250 specific include directories on tested platforms THREADS_TDA5250_DIR = $(TOS_THREADS_DIR)/chips/tda5250 THREADS_TDA5250_INCLUDE_DIRS = -I$(THREADS_TDA5250_DIR) #XE1205 specific include directories on tested platforms THREADS_XE1205_DIR = $(TOS_THREADS_DIR)/chips/xe1205 THREADS_XE1205_INCLUDE_DIRS = -I$(THREADS_XE1205_DIR) #Telos specific include directories THREADS_TELOS_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/telosa #Mica2 specific include directories THREADS_MICA2_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/mica2 THREADS_MICA2_INCLUDE_DIRS += -I$(TOS_THREADS_DIR)/platforms/mica2/chips/cc1000 #Mica2dot specific include directories THREADS_MICA2DOT_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/mica2dot THREADS_MICA2DOT_INCLUDE_DIRS += -I$(TOS_THREADS_DIR)/platforms/mica2dot/chips/cc1000 #MicaZ specific include directories THREADS_MICAZ_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/micaz #IRIS specific include directories THREADS_IRIS_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/iris #TinyNode specific include directories THREADS_TINYNODE_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/tinynode #eyesIFX specific include directories THREADS_EYES_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/eyesIFX #Shimmer specific include directories THREADS_SHIMMER_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/shimmer #Epic specific include directories THREADS_EPIC_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/epic #M16c60 specific include directories on tested platforms THREADS_M16C60_DIR = $(TOS_THREADS_DIR)/chips/m16c60 THREADS_M16C60_INCLUDE_DIRS = -I$(THREADS_M16C60_DIR) #Mulle specific include directories THREADS_MULLE_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/mulle #Add CFLAGS for supported platforms ifneq ($(filter telos telosa telosb tmote,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS) CFLAGS += $(THREADS_TELOS_INCLUDE_DIRS) #Since Telosb has some sensors not on other platforms, this helps us figure out #what components should be included ifneq ($(filter telosb,$(MAKECMDGOALS)),) CFLAGS += -DPLATFORM_TELOSB endif endif ifneq ($(filter epic,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS) CFLAGS += $(THREADS_EPIC_INCLUDE_DIRS) endif ifneq ($(filter mica2,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_ATM128_INCLUDE_DIRS) CFLAGS += $(THREADS_CC1000_INCLUDE_DIRS) CFLAGS += $(THREADS_MICA2_INCLUDE_DIRS) endif ifneq ($(filter mica2dot,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_ATM128_INCLUDE_DIRS) CFLAGS += $(THREADS_CC1000_INCLUDE_DIRS) CFLAGS += $(THREADS_MICA2DOT_INCLUDE_DIRS) CFLAGS += $(THREADS_MICA2_INCLUDE_DIRS) endif ifneq ($(filter micaz,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_ATM128_INCLUDE_DIRS) CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS) CFLAGS += $(THREADS_MICAZ_INCLUDE_DIRS) endif ifneq ($(filter iris,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_ATM1281_INCLUDE_DIRS) CFLAGS += $(THREADS_ATM128_INCLUDE_DIRS) CFLAGS += $(THREADS_RF230_INCLUDE_DIRS) CFLAGS += $(THREADS_IRIS_INCLUDE_DIRS) endif ifneq ($(filter tinynode,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) CFLAGS += $(THREADS_XE1205_INCLUDE_DIRS) CFLAGS += $(THREADS_TINYNODE_INCLUDE_DIRS) endif ifneq ($(filter eyesIFX eyesIFXv2,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) CFLAGS += $(THREADS_TDA5250_INCLUDE_DIRS) CFLAGS += $(THREADS_EYES_INCLUDE_DIRS) endif ifneq ($(filter shimmer,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS) CFLAGS += $(THREADS_SHIMMER_INCLUDE_DIRS) endif ifneq ($(filter shimmer2,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS) CFLAGS += $(THREADS_SHIMMER_INCLUDE_DIRS) endif ifneq ($(filter shimmer2r,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS) CFLAGS += $(THREADS_SHIMMER_INCLUDE_DIRS) endif ifneq ($(filter span,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS) CFLAGS += $(THREADS_SHIMMER_INCLUDE_DIRS) endif ifneq ($(filter mulle,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_M16C60_INCLUDE_DIRS) CFLAGS += $(THREADS_RF230_INCLUDE_DIRS) CFLAGS += $(THREADS_MULLE_INCLUDE_DIRS) endif tinyos-2.1.2+dfsg/support/make/tinynode.target000066400000000000000000000006251207233610700214560ustar00rootroot00000000000000#-*-Makefile-*- #$Id: tinynode.target,v 1.5 2008-03-11 09:34:13 klueska Exp $ PLATFORM = tinynode ifndef TOSDIR TOSDIR := $(shell ncc -print-tosdir) endif MSP_BSL ?= tos-bsl #Flash Config VOLUME_FILE = volumes-at45db.xml VOLUME_ALLOCATOR ?= tos-storage-at45db OPTFLAGS += -Os #OPTFLAGS = $(call TOSMake_include_platform,tinynode) $(call TOSMake_include_platform,msp) tinynode: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/tinynode/000077500000000000000000000000001207233610700202435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/make/tinynode/bsl.extra000066400000000000000000000001711207233610700220670ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: bsl.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ MSP_BSL_FLAGS += --invert-reset tinyos-2.1.2+dfsg/support/make/tinynode/digi.extra000066400000000000000000000001771207233610700222310ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: digi.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $ MSP_BSL_FLAGS = --slow --invert-test tinyos-2.1.2+dfsg/support/make/tinynode/flash.gdb.in000066400000000000000000000001731207233610700224240ustar00rootroot00000000000000# Erase and program flash. monitor erase all load @EXE@ # Reset the chip to get to a known state. monitor reset flushregs tinyos-2.1.2+dfsg/support/make/tinynode/gdb.extra000066400000000000000000000017521207233610700220510ustar00rootroot00000000000000#-*-Makefile-*- PROGRAM = gdb INIT_GDB = $(call TOSMake_find,tinynode/init.gdb.in) FLASH_GDB ?= $(call TOSMake_find,tinynode/flash.gdb.in) FLASH_GDB_NO_E ?= $(call TOSMake_find,tinynode/flashnoerase.gdb.in) PROXY_HOST ?= localhost ifdef BATCH GDB_ARGS = -batch endif program: FORCE cat $(INIT_GDB) $(FLASH_GDB) $(GDB_SCRIPT) | sed -e "s/@HOST@/$(PROXY_HOST)/g" -e "s#@EXE@#$(MAIN_EXE)#g" -e "s#@PROMPT@#msp-gdb $(COMPONENT)#g"> build/init.gdb; \ msp430-gdb $(GDB_ARGS) -silent -x build/init.gdb -se $(MAIN_EXE); \ program_no_e: FORCE @echo " ...done" program_bl: FORCE @echo " installing $(PLATFORM) bootloader using gdb" @echo " installing $(PLATFORM) binary using gdb (without mass erase)" cat $(INIT_GDB) $(FLASH_GDB) $(FLASH_GDB_NO_E) $(GDB_SCRIPT) | sed -e "s/@HOST@/$(PROXY_HOST)/g" -e "s#@EXE@#$(BOOTLOADER_IMG)#g" -e "s#@MAIN@#$(MAIN_EXE)#g" -e "s#@PROMPT@#msp-gdb $(COMPONENT)#g"> build/init.gdb; \ msp430-gdb $(GDB_ARGS) -silent -x build/init.gdb -se $(MAIN_EXE);tinyos-2.1.2+dfsg/support/make/tinynode/init.gdb.in000066400000000000000000000012111207233610700222640ustar00rootroot00000000000000set complaints 1 #set output-radix 16 #set input-radix 16 dir . set prompt (@PROMPT@) # Various personal settings display/i $pc # Connect to msp430-gdbproxy. set remoteaddresssize 16 set remotetimeout 999999 target remote @HOST@:3333 # Increase the packet size to improve upload speed. set remote memory-read-packet-size 1024 set remote memory-read-packet-size fixed set remote memory-write-packet-size 1024 set remote memory-write-packet-size fixed b 'XE1205PhyP$xe1205error' b 'XE1205SpiImplP$xe1205error' b 'XE1205SendReceiveP$xe1205error' b 'XE1205IrqConfP$xe1205error' b 'XE1205PhyRssiConfP$xe1205error' #b 'TestXE1205C$xe1205error' tinyos-2.1.2+dfsg/support/make/tinynode/noflash.extra000066400000000000000000000000711207233610700227400ustar00rootroot00000000000000FLASH_GDB = $(call TOSMake_find,tinynode/noflash.gdb.in) tinyos-2.1.2+dfsg/support/make/tinynode/noflash.gdb.in000066400000000000000000000001021207233610700227510ustar00rootroot00000000000000# Reset the chip to get to a known state. monitor reset flushregs tinyos-2.1.2+dfsg/support/make/tinynode/tinynode.rules000066400000000000000000000000771207233610700231540ustar00rootroot00000000000000ifndef NOWIRING include $(TINYOS_MAKE_PATH)/wiring.extra endif tinyos-2.1.2+dfsg/support/make/tinynode/xedebug.in000066400000000000000000000001341207233610700222140ustar00rootroot00000000000000b 'XE1205PhyP$xe1205error' b 'XE1205SpiImplP$xe1205error' b 'XE1205IrqConfP$xe1205error' tinyos-2.1.2+dfsg/support/make/tmote.target000066400000000000000000000005071207233610700207540ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: tmote.target,v 1.4 2006-12-12 18:22:55 vlahan Exp $ TMOTE_REV ?= SKY # tmote sky == telosb ifeq ($(TMOTE_REV),SKY) TMOTE_TARGET = telosb.target endif # if tmote rev is unknown, use telosb TMOTE_TARGET ?= telosb.target $(call TOSMake_include,$(TMOTE_TARGET)) tmote: $(BUILD_DEPS) @:tinyos-2.1.2+dfsg/support/make/tos_buildinfo.extra000066400000000000000000000005531207233610700223220ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: tos_buildinfo.extra,v 1.1 2007-08-17 15:47:30 beutel Exp $ TOS_BUILDINFO_PL ?= tos-write-buildinfo IDENT_PROGRAM_NAME ?= $(COMPONENT) build_buildinfo: FORCE @echo " writing TOS buildinfo" @$(TOS_BUILDINFO_PL) $(IDENT_FLAGS) --exe="$(MAIN_EXE)" --size="$(SIZE)" --platform="$(PLATFORM)" > $(BUILDDIR)/tos_buildinfo.xml tinyos-2.1.2+dfsg/support/make/tos_image.extra000066400000000000000000000005561207233610700214340ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: tos_image.extra,v 1.5 2007-04-27 05:01:25 prabal Exp $ TOS_IMAGE_PL ?= tos-write-image IDENT_PROGRAM_NAME ?= $(COMPONENT) build_tosimage: FORCE @echo " writing TOS image" @$(TOS_IMAGE_PL) $(IDENT_FLAGS) --ihex="$(MAIN_IHEX)" --exe="$(MAIN_EXE)" --objdump="$(OBJDUMP)" --platform="$(PLATFORM)" > $(BUILDDIR)/tos_image.xml tinyos-2.1.2+dfsg/support/make/tosboot.extra000066400000000000000000000050141207233610700211500ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: tosboot.extra,v 1.4 2009-11-10 07:03:34 rflury Exp $ DELUGE_DIR ?= $(TOSDIR)/lib/net/Deluge DELUGE_EXTRA ?= $(DELUGE_DIR)/extra TOSBOOT_DIR ?= $(TOSDIR)/lib/tosboot/build ifeq ($(BOOTLOADER),tosboot) CFLAGS += -DDELUGE CFLAGS += -I$(TOSDIR)/lib/net -I$(TOSDIR)/lib/net/drip -I$(DELUGE_DIR) -I$(DELUGE_DIR)/FlashVolumeManager -I$(DELUGE_DIR)/BlockStorageManager ifneq ($(filter telosb tmote epic,$(TARGETS)),) CFLAGS += -I$(DELUGE_EXTRA) -I$(DELUGE_EXTRA)/msp430 -I$(DELUGE_EXTRA)/telos ifeq ($(filter docs,$(GOALS)),) CFLAGS += -Wl,--section-start=.text=0x4a00,--defsym=_reset_vector__=0x4000 # Pull back in mspgcc CRT code discarded by the redefinition of # _reset_vector__. CFLAGS += -Wl,--undefined=__init_stack CFLAGS += -Wl,--undefined=__low_level_init CFLAGS += -Wl,--undefined=__do_copy_data CFLAGS += -Wl,--undefined=__do_clear_bss CFLAGS += -Wl,--undefined=__stop_progExec__ CFLAGS += -Wl,--undefined=_endless_loop__ ifeq ("$(shell expr `msp430-gcc -dumpversion` \>= '4.6.3')","1") CFLAGS += -Wl,--undefined=__watchdog_support endif endif ifeq ($(TARGETS),telosb) CFLAGS += -I$(DELUGE_EXTRA)/telosb BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/telosb/main.ihex endif ifeq ($(TARGETS),epic) CFLAGS += -I$(DELUGE_EXTRA)/epic BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/epic/main.ihex endif ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin) BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG)) endif endif ifeq ($(TARGETS),micaz) CFLAGS += -I$(DELUGE_EXTRA) -I$(DELUGE_EXTRA)/avr -I$(DELUGE_EXTRA)/micaz -I$(DELUGE_EXTRA)/mica2 BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/micaz/main.ihex AVR_FUSE_H ?= 0xda endif ifeq ($(TARGETS),mulle) CFLAGS += -I$(DELUGE_EXTRA) -I$(DELUGE_EXTRA)/mulle -I$(DELUGE_EXTRA)/m16c60 -I$(DELUGE_EXTRA)/m16c60/62p BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/mulle/main.srec endif ifeq ($(TARGETS),iris) CFLAGS += -I$(DELUGE_EXTRA)/iris -I$(DELUGE_EXTRA)/micaz -I$(DELUGE_EXTRA)/mica2 -I$(DELUGE_EXTRA)/avr -I$(DELUGE_EXTRA) BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/iris/main.ihex AVR_FUSE_H ?= 0xda endif ifeq ($(TARGETS),tinynode) CFLAGS += -I$(DELUGE_EXTRA)/tinynode CFLAGS += -I$(DELUGE_EXTRA) -I$(DELUGE_EXTRA)/msp430 -I$(DELUGE_EXTRA)/msp430f1611 ifeq ($(filter docs,$(GOALS)),) CFLAGS += -Wl,--section-start=.text=0x4a00,--defsym=_reset_vector__=0x4000 endif BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/tinynode/main.ihex endif endif tinyos-2.1.2+dfsg/support/make/tunit.extra000066400000000000000000000006571207233610700206320ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make #$Id: tunit.extra,v 1.1 2008-03-10 21:55:20 rincon Exp $ # @author Miklos Maroti CFLAGS += -I$(TOSCONTRIB)/tunit/tos/lib/tunit CFLAGS += -I$(TOSCONTRIB)/tunit/tos/lib/tunitstats CFLAGS += -I$(TOSCONTRIB)/tunit/tos/system/ CFLAGS += -I$(TOSCONTRIB)/tunit/tos/interfaces CFLAGS += -I$(TOSCONTRIB)/tunit/tos/lib/directserial CFLAGS += -I$(TOSCONTRIB)/tunit/tos/lib/fifoqueue CFLAGS += $(TUNITCFLAGS) tinyos-2.1.2+dfsg/support/make/ucmini.target000066400000000000000000000005351207233610700211110ustar00rootroot00000000000000#$Id: PLATFORM = ucmini PROGRAMMER ?= avrdude PROGRAMMER_PART ?= -pm128rfa1 VOLUMEFILE = volumes-stm25p.xml VOLUME_ALLOCATOR ?= tos-storage-stm25p -s32 AVR109_SLEEP ?= 0 RESET_LINE = java net.tinyos.util.ZigbitProgrammer -port $(AVR109) -reset -askforreset -sleep $(AVR109_SLEEP) $(call TOSMake_include_platform,avr) ucmini: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/make/verbose.extra000066400000000000000000000002271207233610700211250ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make # @file verbose.extra # @author Martin Turon # $Id: verbose.extra,v 1.4 2006-12-12 18:22:55 vlahan Exp $ PFLAGS += -v tinyos-2.1.2+dfsg/support/make/wiring.extra000066400000000000000000000003711207233610700207570ustar00rootroot00000000000000#-*-Makefile-*- vim:syntax=make WIRING_CHECK_FLAGS = -fnesc-dump=wiring -fnesc-dump='interfaces(!abstract())' -fnesc-dump='referenced(interfacedefs, components)' -fnesc-dumpfile=$(WIRING_CHECK_FILE) WIRING_CHECK_FILE = $(BUILDDIR)/wiring-check.xml tinyos-2.1.2+dfsg/support/make/z1.target000066400000000000000000000010071207233610700201520ustar00rootroot00000000000000PLATFORM = z1 MSP_BSL ?= tos-bsl MOTELIST ?= motelist MSP_BSL_FLAGS = --z1 MSP_MCU ?= msp430f2617 MSP_GCC ?= msp430-gcc MSP_NESC_TARGET ?= msp430 # test the compiler to see if -mdata-64k is supported and if so tell it # to put data into lower 64k. HAS_MDATA = $(shell msp430-gcc --target-help | grep mdata-64k | awk '{print $1}') ifneq "$(HAS_MDATA)" "" PFLAGS += -mdata-64k endif VOLUME_FILE = volumes-stm25p.xml VOLUME_ALLOCATOR ?= tos-storage-stm25p $(call TOSMake_include_platform,msp) z1: $(BUILD_DEPS) @: tinyos-2.1.2+dfsg/support/sdk/000077500000000000000000000000001207233610700162565ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/000077500000000000000000000000001207233610700165005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/000077500000000000000000000000001207233610700200665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/serial_tun/000077500000000000000000000000001207233610700222335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/serial_tun/6lowpan.h000066400000000000000000000301001207233610700237640ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * The structures are based on the ones from FreeBSD header files * in /usr/include/netinet6/, which are distributed unred the following * copyright: * * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the project nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * Copyright (c) 1982, 1986, 1990, 1993 * The Regents of the University of California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #ifndef __6LOWPAN_H__ #define __6LOWPAN_H__ #include typedef uint8_t u_int8_t; typedef uint16_t u_int16_t; typedef uint32_t u_int32_t; #define LOWPAN_MTU 1280 #define LOWPAN_OVERHEAD 17 // 16 bytes opt. headers and 1 byte dispatch #define LINK_DATA_MTU 100 // 802.15.4 space left after the 802.15.4 header: 128 - xx = 102 bytes max /* Active Message */ typedef struct __attribute__ ((__packed__))_AMPacket_t { uint8_t pkt_type; uint16_t dst; uint16_t src; uint8_t length; uint8_t group; uint8_t type; uint8_t data[LINK_DATA_MTU]; } am_packet_t; /* 802.15.4 address */ enum { HW_ADDR_SHORT, HW_ADDR_LONG }; typedef struct hw_addr { uint8_t type; // HW_ADDR_SHORT | HW_ADDR_LONG union { uint8_t addr_short[2]; uint8_t addr_long[8]; }; } hw_addr_t; /* IPv6 address */ typedef struct __attribute__ ((__packed__)) _ip_6_addr_t { uint8_t addr[16]; } ip6_addr_t; #define FRAG_BUFS 1 #define FRAG_BUF_SIZE 1280 #define FRAG_TIMEOUT 60 // 60 seconds #define FRAG_FREE -1 #define LOWPAN_APP_DATA_LEN 1517 //#define LOWPAN_HEADER_LEN 49 #define LOWPAN_HEADER_LEN 102 #define DISPATCH_UNCOMPRESSED_IPV6 0x41 #define DISPATCH_COMPRESSED_IPV6 0x42 #define DISPATCH_FIRST_FRAG 0xC0 #define DISPATCH_SUBSEQ_FRAG 0xE0 #define DISPATCH_FRAG_MASK 0xF8 #define DISPATCH_BC0 0x50 #define DISPATCH_MESH 0x80 #define DISPATCH_MESH_MASK 0xC0 #define DISPATCH_MESH_O_FLAG 0x20 #define DISPATCH_MESH_F_FLAG 0x10 #define DISPATCH_MESH_HOPSLEFT_MASK 0x0F enum { HC1_SRC_PREFIX_MASK = 0x80, HC1_SRC_PREFIX_LINKLOCAL = 0x80, HC1_SRC_PREFIX_INLINE = 0, HC1_SRC_IFACEID_MASK = 0x40, HC1_SRC_IFACEID_COMRP = 0x40, HC1_SRC_IFACEID_INLINE = 0, HC1_DST_PREFIX_MASK = 0x20, HC1_DST_PREFIX_LINKLOCAL = 0x20, HC1_DST_PREFIX_INLINE = 0, HC1_DST_IFACEID_MASK = 0x10, HC1_DST_IFACEID_COMRP = 0x10, HC1_DST_IFACEID_INLINE = 0, HC1_TCFL_MASK = 0x08, HC1_TCFL_ZERO = 0x08, HC1_TCFL_INLINE = 0, HC1_NEXTHDR_MASK = 0x06, HC1_NEXTHDR_INLINE = 0, HC1_NEXTHDR_UDP = 0x02, HC1_NEXTHDR_ICMP = 0x04, HC1_NEXTHDR_TCP = 0x06, HC1_HC2_MASK = 0x01, HC1_HC2_PRESENT = 0x01, HC1_HC2_NONE = 0, HC2_UDP_P_VALUE = 0x61616, HC2_UDP_SRC_PORT_MASK = 0x80, HC2_UDP_SRC_PORT_COMPR = 0x80, HC2_UDP_SRC_PORT_INLINE = 0, HC2_UDP_DST_PORT_MASK = 0x40, HC2_UDP_DST_PORT_COMPR = 0x40, HC2_UDP_DST_PORT_INLINE = 0, HC2_UDP_LEN_MASK = 0x20, HC2_UDP_LEN_COMPR = 0x20, HC2_UDP_LEN_INLINE = 0 }; typedef struct _frag_info_t { uint8_t offset; uint8_t len; struct _frag_info_t *next; } frag_info_t; /* * sending - application provides app_data and clears app_data_dealloc * - a pointer to app_data is returned in sendDone to do deallocation * receiving and fragment reassembly * - IP_M provides app_data and sets app_data_dealloc * - header_begin/end is set to point into app_data * and the received packet is put into app_data * - header_len should probably be set to a sane value (0) * and header to NULL or leave as is? * receiving without fragment reassembly * - the complete 802.15.4 frame is put into header * (802.15.4 header is left out) */ typedef struct _lowpan_pkt_t { /* buffers */ uint8_t buf[LOWPAN_MTU + LOWPAN_OVERHEAD]; uint8_t *buf_begin; // start of data in the buffer uint16_t len; // length of data in the buffer /* fragmentation */ uint8_t frag_state; uint16_t dgram_tag; // network byte order uint16_t dgram_size; // host byte order time_t frag_timeout; // fragment reassembly times out at tv_sec */ union { uint8_t frag_offset; // sending - offset where next fragment starts frag_info_t *frag_list; // sorted by offset in decreasing order }; /* IP addresses */ ip6_addr_t ip_src_addr; /* needed for ND and usefull elsewhere */ ip6_addr_t ip_dst_addr; /* both IP addresses filled in by ipv6*_input */ /* 802.15.4 addresses */ hw_addr_t hw_src_addr; hw_addr_t hw_dst_addr; /* 802.15.4 MAC addresses * needed for fragment identification * possibly needed for 6lowpan IPv6 header * decompression * contains mesh header entries if available */ uint8_t nd_state; struct _lowpan_pkt_t *next; } lowpan_pkt_t; /* /\* fragment reassembly buffer *\/ */ /* struct frag_buf { */ /* hw_addr_t hw_src_addr; */ /* hw_addr_t hw_dst_addr; */ /* time_t frag_timeout; */ /* uint8_t buf[FRAG_BUF_SIZE]; */ /* lowpan_pkt_t pkt; */ /* }; */ enum { FRAG_NONE = 0, FRAG_6LOWPAN = 1, FRAG_IPV6 = 2, ND_DONE = 0, ND_TODO = 1, ND_SENT = 2, APP_DATA_DEALLOC_FALSE = 0, APP_DATA_DEALLOC_TRUE = 1 }; struct __attribute__ ((__packed__)) lowpan_mesh_hdr { uint8_t dispatch; // dispatch, flags and hops left // address length depends on flags in dispatch }; struct __attribute__ ((__packed__)) lowpan_broadcast_hdr { uint8_t dispatch; uint8_t seq_no; // sequence number }; struct __attribute__ ((__packed__)) lowpan_frag_hdr { union __attribute__ ((__packed__)) { uint8_t dispatch; uint16_t dgram_size; uint8_t dgram_size8[2]; }; uint16_t dgram_tag; }; /* * Definition for internet protocol version 6. * RFC 2460 */ struct __attribute__ ((__packed__)) ip6_hdr { union { uint8_t vtc; /* 4 bits version, top 4 bits class label*/ uint32_t flow; /* 20 bits flow label at the end */ }; uint16_t plen; /* payload length */ uint8_t nxt_hdr; /* next header */ uint8_t hlim; /* hop limit */ ip6_addr_t src_addr; /* source address */ ip6_addr_t dst_addr; /* destination address */ }; #define IPV6_VERSION 0x60 #define IPV6_VERSION_MASK 0xf0 /* * Extension Headers */ struct ip6_ext { uint8_t ip6e_nxt; uint8_t ip6e_len; }; struct icmp6_hdr { uint8_t type; /* type field */ uint8_t code; /* code field */ uint16_t cksum; /* checksum field */ union { uint32_t icmp6_un_data32[1]; /* type-specific field */ uint16_t icmp6_un_data16[2]; /* type-specific field */ uint8_t icmp6_un_data8[4]; /* type-specific field */ } icmp6_dataun; }; enum { ICMP_TYPE_ECHO_DEST_UNREACH = 1, ICMP_TYPE_ECHO_PKT_TOO_BIG = 129, ICMP_TYPE_ECHO_TIME_EXCEEDED = 129, ICMP_TYPE_ECHO_PARAM_PROBLEM = 129, ICMP_TYPE_ECHO_REQUEST = 128, ICMP_TYPE_ECHO_REPLY = 129 }; /* * UDP protocol header. * Per RFC 768, September, 1981. */ struct __attribute__ ((__packed__)) udp_hdr { uint16_t src_port; /* source port */ uint16_t dst_port; /* destination port */ uint16_t len; /* udp length */ uint16_t chksum; /* udp checksum */ }; enum { //NEXT_HEADER_ICMP = 1, NEXT_HEADER_TCP = 6, NEXT_HEADER_UDP = 17, NEXT_HEADER_ICMP6 = 58 }; // from uip-1.0/uip/uip-neighbor.c #define NEIGHBOR_MAX_TIME 128 #ifndef NEIGHBOR_ENTRIES #define NEIGHBOR_ENTRIES 8 #endif struct neighbor_entry { ip6_addr_t ip_addr; struct hw_addr hw_addr; uint8_t time; }; struct neighbor_entry neighbor_entries[NEIGHBOR_ENTRIES]; #endif /* __6LOWPAN_H__ */ tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/serial_tun/Makefile000066400000000000000000000004641207233610700236770ustar00rootroot00000000000000#CPPFLAGS = #LDFLAGS = FLAGS= FLAGS+=-Wall FLAGS+=-g FLAGS+=-I${TOSROOT}/support/sdk/c/sf all: serial_tun serial_tun: serial_tun.c tun_dev.c 6lowpan.h gcc $(FLAGS) -o serial_tun serial_tun.c tun_dev.c ${TOSROOT}/support/sdk/c/sf/libmote.a clean: rm -f serial_tun TAGS TAGS: rm -f TAGS etags *.c *.h tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/serial_tun/README000066400000000000000000000011021207233610700231050ustar00rootroot00000000000000A daemon reading 6lowpan packets from the mote running the BaseStation application via a USB interface, translating them to Ipv6 packets, writing them to a tun interface and the other way round, i.e., reading IPv6 packets from a tun interface, encapsulating them as 6lowpan packets and sedning them to the mote. To build the daemon you also need to build the libmote.a library in $TOSROOT/support/sdk/c/. Usage with a TelosB mote: sudo ./serial_tun /dev/ttyUSB0 115200 The Active Message address 12 and the corresponding IPv6 addresses are are hardcoded in the source code. tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/serial_tun/build.xml000066400000000000000000000004101207233610700240470ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/serial_tun/serial_tun.c000066400000000000000000001025551207233610700245540ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "tun_dev.h" #include "serialsource.h" #include "serialpacket.h" #include "6lowpan.h" #define min(a,b) ( (a>b) ? b : a ) #define max(a,b) ( (a>b) ? a : b ) static char *msgs[] = { "unknown_packet_type", "ack_timeout" , "sync" , "too_long" , "too_short" , "bad_sync" , "bad_crc" , "closed" , "no_memory" , "unix_error" }; /* global variables */ lowpan_pkt_t *fragments = NULL; /* fragment reassembly of received frames */ //lowpan_pkt_t *send_queue = NULL; int g_send_pending = 0; hw_addr_t hw_addr; serial_source ser_src; int tun_fd = 0; /* tunnel device */ //int ser_fd = 0; /* serial device */ uint16_t g_dgram_tag = 0; /* datagram_tag for sending fragmented packets */ /* ------------------------------------------------------------------------- */ /* function pre-declarations */ int serial_output_am_payload(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr); int serial_input_layer3(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr); int serial_input_ipv6_uncompressed(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr); int serial_input_ipv6_compressed(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr); /* ------------------------------------------------------------------------- */ /* utility functions */ int get_ser_fd() { return serial_source_fd(ser_src); } void increment_g_dgram_tag() { uint16_t tmp = ntohs(g_dgram_tag); if (tmp == 0xFFFF) { tmp = 0; } else { tmp++; } g_dgram_tag = htons(tmp); } void stderr_msg(serial_source_msg problem) { fprintf(stderr, "Note: %s\n", msgs[problem]); } int debug(const char *fmt, ...) { int result; va_list ap; va_start(ap, fmt); result = vfprintf(stderr, fmt, ap); va_end(ap); return result; } /* from contiki-2.x/tools/tunslip.c */ int ssystem(const char *fmt, ...) { char cmd[128]; va_list ap; va_start(ap, fmt); vsnprintf(cmd, sizeof(cmd), fmt, ap); va_end(ap); printf("%s\n", cmd); fflush(stdout); return system(cmd); } /* print char* in hex format */ void dump_serial_packet(const unsigned char *packet, const int len) { int i; printf("len: %d\n", len); if (!packet) return; for (i = 0; i < len; i++) { printf("%02x ", packet[i]); //printf("%02x(%c) ", packet[i], packet[i]); //printf("%c", packet[i]); } putchar('\n'); /* printf("---\n"); */ /* for (i = 0; i < len; i++) { */ /* printf("%c", packet[i]); */ /* } */ /* putchar('\n'); */ /* printf("---\n"); */ } /* ------------------------------------------------------------------------- */ /* ip6_addr_t and hw_addr_t utility functions */ int ipv6_addr_is_zero(const ip6_addr_t *addr) { int i; for (i=0;i<16;i++) { if (addr->addr[i]) { return 0; } } return 1; } int ipv6_addr_is_linklocal_unicast(const ip6_addr_t *addr) { if ( addr->addr[0] == 0xFE && addr->addr[1] == 0x80 && addr->addr[2] == 0 && addr->addr[3] == 0 && addr->addr[4] == 0 && addr->addr[5] == 0 && addr->addr[6] == 0 && addr->addr[7] == 0 ) return 1; else return 0; } int cmp_ipv6_addr(const ip6_addr_t *addr1, const ip6_addr_t *addr2) { return memcmp(addr1, addr2, sizeof(ip6_addr_t)); } int cmp_hw_addr(const hw_addr_t *addr1, const hw_addr_t *addr2) { // for short addresses compare only the first two bytes if (addr1->type == HW_ADDR_SHORT && addr2->type == HW_ADDR_SHORT) { return memcmp(addr1->addr_short, addr2->addr_short, sizeof(addr1->addr_short)); } else { return memcmp(addr1, addr2, sizeof(hw_addr_t)); } } int hw_addr_is_broadcat(const hw_addr_t *hw_addr) { if (hw_addr->type == HW_ADDR_SHORT && hw_addr->addr_short[0] == 0xFF && hw_addr->addr_short[1] == 0xFF) return 1; // TODO: long address else return 0; } /* ------------------------------------------------------------------------- */ /* more utility functions */ void clear_pkt(lowpan_pkt_t *pkt) { memset(pkt, 0, sizeof(*pkt)); pkt->buf_begin = pkt->buf + LOWPAN_OVERHEAD; } void free_frag_list(frag_info_t *p) { frag_info_t *q; while (p) { q = p->next; free(p); p = q; } } void free_lowpan_pkt(lowpan_pkt_t *pkt) { lowpan_pkt_t *p; lowpan_pkt_t **q; if (!fragments) return; for(q=&fragments; *q; q=&(*q)->next) { if (*q == pkt) { p = *q; *q = p->next; free_frag_list(p->frag_list); free(p); return; } } } lowpan_pkt_t * find_fragment(hw_addr_t *hw_src_addr, hw_addr_t *hw_dst_addr, uint16_t dgram_size, uint16_t dgram_tag) { lowpan_pkt_t *p; for(p=fragments; p; p=p->next) { if ((p->dgram_tag == dgram_tag) && (p->dgram_size == dgram_size) && cmp_hw_addr(&p->hw_src_addr, hw_src_addr) == 0 && cmp_hw_addr(&p->hw_dst_addr, hw_dst_addr) == 0 ) { return p; } } return NULL; } /* ------------------------------------------------------------------------- */ /* HC1 and HC2 compression and decompresstion functions */ /* the caller has to free() new_buf */ int lowpan_decompress(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr, uint8_t **new_buf, int *new_len) { uint8_t hc1_enc; uint8_t hc2_enc; struct ip6_hdr *ip_hdr = NULL; struct udp_hdr *udp_hdr = NULL; *new_buf = malloc(len + sizeof(*ip_hdr) + sizeof(*udp_hdr)); if (!*new_buf) { fprintf(stderr, "%s: out of memory\n", __func__); *new_len = 0; return 1; } hc1_enc = *buf; buf += sizeof(hc1_enc); len -= sizeof(hc1_enc); /* HC2 encoding follows HC1 encoding */ if ((hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT) { hc2_enc = *buf; buf += sizeof(hc2_enc); len -= sizeof(hc2_enc); } /* IP header fields */ ip_hdr = (struct ip6_hdr *) *new_buf; memset(ip_hdr, 0, sizeof(struct ip6_hdr)); ip_hdr->vtc |= IPV6_VERSION; ip_hdr->hlim = *buf; buf += sizeof(ip_hdr->hlim); len -= sizeof(ip_hdr->hlim); /* source IP address */ if ((hc1_enc & HC1_SRC_PREFIX_MASK) == HC1_SRC_PREFIX_INLINE) { memcpy(&ip_hdr->src_addr, buf, sizeof(ip_hdr->src_addr)/2); buf += sizeof(ip_hdr->src_addr)/2; len -= sizeof(ip_hdr->src_addr)/2; } else { ip_hdr->src_addr.addr[0] = 0xFE; ip_hdr->src_addr.addr[1] = 0x80; } if ((hc1_enc & HC1_SRC_IFACEID_MASK) == HC1_SRC_IFACEID_INLINE) { memcpy(((void*)&ip_hdr->src_addr) + sizeof(ip_hdr->src_addr)/2, buf, sizeof(ip_hdr->src_addr)/2); buf += sizeof(ip_hdr->src_addr)/2; len -= sizeof(ip_hdr->src_addr)/2; } /* destination IP address */ if ((hc1_enc & HC1_DST_PREFIX_MASK) == HC1_DST_PREFIX_INLINE) { memcpy(&ip_hdr->dst_addr, buf, sizeof(ip_hdr->dst_addr)/2); buf += sizeof(ip_hdr->dst_addr)/2; len -= sizeof(ip_hdr->dst_addr)/2; } else { ip_hdr->dst_addr.addr[0] = 0xFE; ip_hdr->dst_addr.addr[1] = 0x80; } if ((hc1_enc & HC1_DST_IFACEID_MASK) == HC1_DST_IFACEID_INLINE) { memcpy(((void*)&ip_hdr->dst_addr) + sizeof(ip_hdr->dst_addr)/2, buf, sizeof(ip_hdr->dst_addr)/2); buf += sizeof(ip_hdr->dst_addr)/2; len -= sizeof(ip_hdr->dst_addr)/2; } /* Traffic Class and Flow Label */ if ((hc1_enc & HC1_TCFL_MASK) == HC1_TCFL_INLINE) { //TODO } /* Next Header */ switch (hc1_enc & HC1_NEXTHDR_MASK) { case HC1_NEXTHDR_INLINE: ip_hdr->nxt_hdr = *buf; buf += sizeof(ip_hdr->nxt_hdr); len -= sizeof(ip_hdr->nxt_hdr); break; case HC1_NEXTHDR_UDP: ip_hdr->nxt_hdr = NEXT_HEADER_UDP; break; case HC1_NEXTHDR_ICMP: ip_hdr->nxt_hdr = NEXT_HEADER_ICMP6; break; case HC1_NEXTHDR_TCP: ip_hdr->nxt_hdr = NEXT_HEADER_TCP; break; default: fprintf(stderr, "unknown next header HC1 encoding\n"); break; } /* HC_UDP compression */ if ((hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT && (hc1_enc & HC1_NEXTHDR_MASK) == HC1_NEXTHDR_UDP) { udp_hdr = (struct udp_hdr *) ((*new_buf) + sizeof(struct ip6_hdr)); //udp_hdr = (struct udp_hdr *) (ip_hdr + 1); memset(udp_hdr, 0, sizeof(struct udp_hdr)); /* UDP Source Port */ if ((hc2_enc & HC2_UDP_SRC_PORT_MASK) == HC2_UDP_SRC_PORT_INLINE) { memcpy(&udp_hdr->src_port, buf, sizeof(udp_hdr->src_port)); buf += sizeof(udp_hdr->src_port); len -= sizeof(udp_hdr->src_port); } else { //TODO } /* UDP Destination Port */ if ((hc2_enc & HC2_UDP_DST_PORT_MASK) == HC2_UDP_DST_PORT_INLINE) { memcpy(&udp_hdr->dst_port, buf, sizeof(udp_hdr->dst_port)); buf += sizeof(udp_hdr->dst_port); len -= sizeof(udp_hdr->dst_port); } else { //TODO } /* UDP Length */ if ((hc2_enc & HC2_UDP_LEN_MASK) == HC2_UDP_LEN_INLINE) { memcpy(&udp_hdr->len, buf, sizeof(udp_hdr->len)); buf += sizeof(udp_hdr->len); len -= sizeof(udp_hdr->len); } else { udp_hdr->len = len - sizeof(udp_hdr->chksum) + sizeof(struct udp_hdr); } /* Checksum */ memcpy(&udp_hdr->chksum, buf, sizeof(udp_hdr->chksum)); buf += sizeof(udp_hdr->chksum); len -= sizeof(udp_hdr->chksum); /* IPv6 Payload Length */ ip_hdr->plen = htons(len + sizeof(struct udp_hdr)); memcpy((*new_buf) + sizeof(struct ip6_hdr) + sizeof(struct udp_hdr), buf, len); *new_len = len + sizeof(struct ip6_hdr) + sizeof(struct udp_hdr); } else { /* IPv6 Payload Length */ ip_hdr->plen = htons(len); memcpy((*new_buf) + sizeof(struct ip6_hdr), buf, len); *new_len = len + sizeof(struct ip6_hdr); } return 0; } /* assuming there is space available in from of buf_begin */ int lowpan_compress(uint8_t **buf_begin, int *len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr) { uint8_t *hc1_enc; uint8_t *hc2_enc; struct ip6_hdr *ip_hdr = NULL; struct udp_hdr *udp_hdr = NULL; uint8_t new_buf[sizeof(struct ip6_hdr) + sizeof(struct udp_hdr) + 5]; uint8_t *new_buf_p = new_buf; int new_len = 0; debug("%s\n", __func__); ip_hdr = (struct ip6_hdr *) *buf_begin; udp_hdr = (struct udp_hdr *) ((*buf_begin) + sizeof(struct ip6_hdr)); /* check if this is an IPv6 packet */ if ((ip_hdr->vtc & IPV6_VERSION_MASK) != IPV6_VERSION) { debug("IP version check failed - not an IPv6 packet\n"); return 0; } /* set 6lowpan dispatch value */ *new_buf_p = DISPATCH_COMPRESSED_IPV6; new_buf_p += sizeof(uint8_t); new_len += sizeof(uint8_t); /* HC1 encoding field */ hc1_enc = new_buf_p; new_buf_p += sizeof(uint8_t); new_len += sizeof(uint8_t); *hc1_enc = 0; /* does HC2 follow after HC1? */ if (ip_hdr->nxt_hdr == NEXT_HEADER_UDP) { *hc1_enc |= HC1_HC2_PRESENT; /* HC2 encoding field */ hc2_enc = new_buf_p; new_buf_p += sizeof(uint8_t); new_len += sizeof(uint8_t); *hc2_enc = 0; } else { *hc1_enc |= HC1_HC2_NONE; } /* Hop Limit */ *new_buf_p = ip_hdr->hlim; new_buf_p += sizeof(uint8_t); new_len += sizeof(uint8_t); /* source address prefix */ //TODO: fails checksum on the mote !!! if (ipv6_addr_is_linklocal_unicast(&ip_hdr->src_addr)) { *hc1_enc |= HC1_SRC_PREFIX_LINKLOCAL; } else { *hc1_enc |= HC1_SRC_PREFIX_INLINE; memcpy(new_buf_p, &(ip_hdr->src_addr), 8); new_buf_p += 8; new_len += 8; } /* source address interface identifier */ *hc1_enc |= HC1_SRC_IFACEID_INLINE; memcpy(new_buf_p, ((void*)&(ip_hdr->src_addr)) + 8, 8); new_buf_p += 8; new_len += 8; /* destination address prefix */ if (ipv6_addr_is_linklocal_unicast(&ip_hdr->dst_addr)) { *hc1_enc |= HC1_DST_PREFIX_LINKLOCAL; } else { *hc1_enc |= HC1_DST_PREFIX_INLINE; memcpy(new_buf_p, &(ip_hdr->dst_addr), 8); new_buf_p += 8; new_len += 8; } /* destination address interface identifier */ *hc1_enc |= HC1_DST_IFACEID_INLINE; memcpy(new_buf_p, ((void*)&(ip_hdr->dst_addr)) + 8, 8); new_buf_p += 8; new_len += 8; /* we're always sending packets with TC anf FL zero */ *hc1_enc |= HC1_TCFL_ZERO; /* next header */ switch (ip_hdr->nxt_hdr) { case NEXT_HEADER_UDP: *hc1_enc |= HC1_NEXTHDR_UDP; break; case NEXT_HEADER_ICMP6: *hc1_enc |= HC1_NEXTHDR_ICMP; break; case NEXT_HEADER_TCP: *hc1_enc |= HC1_NEXTHDR_TCP; break; default: *hc1_enc |= HC1_NEXTHDR_INLINE; *new_buf_p = ip_hdr->nxt_hdr; new_buf_p += sizeof(ip_hdr->nxt_hdr); new_len += sizeof(ip_hdr->nxt_hdr); break; } /* HC_UDP encoding */ if ((*hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT && (*hc1_enc & HC1_NEXTHDR_MASK) == HC1_NEXTHDR_UDP) { /* Source Port */ *hc2_enc |= HC2_UDP_SRC_PORT_INLINE; memcpy(new_buf_p, &udp_hdr->src_port, sizeof(udp_hdr->src_port)); new_buf_p += sizeof(udp_hdr->src_port); new_len += sizeof(udp_hdr->src_port); /* Destination Port */ *hc2_enc |= HC2_UDP_DST_PORT_INLINE; memcpy(new_buf_p, &udp_hdr->dst_port, sizeof(udp_hdr->dst_port)); new_buf_p += sizeof(udp_hdr->dst_port); new_len += sizeof(udp_hdr->dst_port); /* Length */ //*hc2_enc |= HC2_UDP_LEN_COMPR; *hc2_enc |= HC2_UDP_LEN_INLINE; memcpy(new_buf_p, &udp_hdr->len, sizeof(udp_hdr->len)); new_buf_p += sizeof(udp_hdr->len); new_len += sizeof(udp_hdr->len); /* Checksum */ memcpy(new_buf_p, &udp_hdr->chksum, sizeof(udp_hdr->chksum)); new_buf_p += sizeof(udp_hdr->chksum); new_len += sizeof(udp_hdr->chksum); /* replace the IP and UDP headers with the compressed ones */ *len += new_len; *len -= sizeof(struct ip6_hdr); *len -= sizeof(struct udp_hdr); *buf_begin += sizeof(struct ip6_hdr); *buf_begin += sizeof(struct udp_hdr); *buf_begin -= new_len; memcpy(*buf_begin, new_buf, new_len); } else { /* replace the IP header with the compressed one */ *len += new_len; *len -= sizeof(struct ip6_hdr); *buf_begin += sizeof(struct ip6_hdr); *buf_begin -= new_len; memcpy(*buf_begin, new_buf, new_len); } return 0; } /* ------------------------------------------------------------------------- */ /* handling of data arriving on the tun interface */ /* * encapsulate buf as an Active Message payload * fragments packets if needed */ int serial_output_am_payload(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr) { am_packet_t AMpacket; int result; //debug("%s: dumping buf (len: %d)...\n", __func__, len); //dump_serial_packet(buf, len); if (len > LINK_DATA_MTU) { fprintf(stderr, "%s: requested to send more than LINK_DATA_MTU"\ "(%d bytes)\n", __func__, len); // TODO: maybe we should send the fisr LINK_DATA_MTU bytes // and only print a warning return -1; } memset(&AMpacket, 0, sizeof(AMpacket)); AMpacket.pkt_type = 0; // TODO: make the dst addr handling more general //AMpacket.dst = htons(0x14); AMpacket.dst = htons(0xFFFF); //AMpacket.src = htons(0x12); // TODO: make the src addr handling more general memcpy(&AMpacket.src, hw_addr.addr_short, 2); AMpacket.group = 0; AMpacket.type = 0x41; AMpacket.length = min(len,LINK_DATA_MTU); //AMpacket.data = buf; memcpy(AMpacket.data, buf, AMpacket.length); len = AMpacket.length + 8; // data + header debug("sending to serial port...\n"); dump_serial_packet((unsigned char *)&AMpacket, len); result = write_serial_packet(ser_src, &AMpacket, len); /* * Returns: 0 if packet successfully written, 1 if successfully * written but not acknowledged, -1 otherwise */ debug("write_serial_packet returned %d\n", result); if (result < 0) { perror ("sendto"); return -1; } return len; } /* * read data from the tun device and send it to the serial port * does also fragmentation */ int tun_input() { uint8_t buf[LOWPAN_MTU + LOWPAN_OVERHEAD]; uint8_t *buf_begin = buf + LOWPAN_OVERHEAD; int len; int result; struct lowpan_frag_hdr *frag_hdr; uint8_t dgram_offset = 0; uint16_t dgram_size; hw_addr_t hw_dst_addr; uint8_t frag_len; /* length of the fragment just being sent */ uint8_t *frame_begin; /* begin of the frame payload */ uint8_t frame_len; /* length of the frame payload */ len = tun_read (tun_fd, (char*) buf_begin, LOWPAN_MTU); if (len <= 0) { perror ("read"); return 0; } printf("data on tun interface\n"); /* set 802.15.4 destination address */ hw_dst_addr.type = HW_ADDR_SHORT; hw_dst_addr.addr_short[0] =0xFF; hw_dst_addr.addr_short[1] =0xFF; /* HC compression */ lowpan_compress(&buf_begin, &len, &hw_addr, &hw_dst_addr); /* prepend dispatch */ /* buf_begin--; */ /* *buf_begin = DISPATCH_UNCOMPRESSED_IPV6; */ /* len++; */ /* determine if fragmentation is needed */ if (len > LINK_DATA_MTU) { /* fragmentation needed */ increment_g_dgram_tag(); dgram_size = htons(len); /* first fragment */ debug("first fragment... (len: %d, offset: %d)\n", len, dgram_offset); /* fragment heder */ frame_begin = buf_begin - sizeof(struct lowpan_frag_hdr); frag_hdr = (struct lowpan_frag_hdr *) frame_begin; frag_hdr->dgram_size = dgram_size; frag_hdr->dispatch |= DISPATCH_FIRST_FRAG; frag_hdr->dgram_tag = g_dgram_tag; /* align fragment length at an 8-byte multiple */ frag_len = LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr); frag_len -= frag_len%8; frame_len = frag_len + sizeof(struct lowpan_frag_hdr); result = serial_output_am_payload(frame_begin, frame_len, &hw_addr, &hw_dst_addr); if (result < 0) { perror("serial_output_am_payload() failed\n"); return -1; } buf_begin += frag_len; len -= frag_len; dgram_offset += frag_len/8; /* in 8-byte multiples */ /* subseq fragment */ while (len > 0) { usleep(10000); /* workaround to prevent loosing fragments */ debug("subsequent fragment... (len: %d, offset: %d)\n", len, dgram_offset); /* dgram_offset */ frame_begin = buf_begin - sizeof(uint8_t); *(frame_begin) = dgram_offset; /* fragment heder */ frame_begin -= sizeof(struct lowpan_frag_hdr); frag_hdr = (struct lowpan_frag_hdr *) frame_begin; frag_hdr->dgram_size = dgram_size; frag_hdr->dispatch |= DISPATCH_SUBSEQ_FRAG; frag_hdr->dgram_tag = g_dgram_tag; if (len <= LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr) - sizeof(uint8_t)) { /* * last fragment does not have to be aligned * at an 8-byte multiple */ frag_len = len; } else { /* align fragment length at an 8-byte multiple */ frag_len = LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr) - sizeof(uint8_t); frag_len -= frag_len%8; } frame_len = frag_len + sizeof(struct lowpan_frag_hdr) + sizeof(uint8_t); result = serial_output_am_payload(frame_begin, frame_len, &hw_addr, &hw_dst_addr); if (result < 0) { perror("serial_output_am_payload() failed\n"); //return -1; } buf_begin += frag_len; len -= frag_len; dgram_offset += frag_len/8; /* in 8-byte multiples */ } return 1; } else { /* no need for fragmentation */ serial_output_am_payload(buf_begin, len, &hw_addr, &hw_dst_addr); return 1; } } /* ------------------------------------------------------------------------- */ /* handling of data arriving on the serial port */ /* * read data on serial port and send it to the tun interface * does fragment reassembly */ int serial_input() { int result = 0; void *ser_data; /* data read from serial port */ int ser_len; /* length of data read from serial port */ uint8_t *buf; int len; am_packet_t *AMpacket; struct hw_addr hw_src_addr; struct hw_addr hw_dst_addr; uint8_t *dispatch; struct lowpan_broadcast_hdr *bc_hdr; struct lowpan_frag_hdr *frag_hdr; uint16_t dgram_tag; uint16_t dgram_size; uint8_t dgram_offset; struct timeval tv; frag_info_t *p; frag_info_t **q; int last_frag; lowpan_pkt_t *pkt; printf("serial_input()\n"); /* read data from serial port */ ser_data = read_serial_packet(ser_src, &ser_len); /* process the packet we have received */ if (ser_len && ser_data) { printf("dumping data on serial port...\n"); dump_serial_packet(ser_data, ser_len); AMpacket = ser_data; /* copy 802.15.4 addresses */ // TODO: check if I got the byte ordering right hw_src_addr.type = HW_ADDR_SHORT; memcpy(hw_src_addr.addr_short, &AMpacket->src, sizeof(hw_src_addr.addr_short)); hw_dst_addr.type = HW_ADDR_SHORT; memcpy(hw_dst_addr.addr_short, &AMpacket->dst, sizeof(hw_dst_addr.addr_short)); /* --- 6lowpan optional headers --- */ buf = AMpacket->data; len = AMpacket->length; if (len != ser_len - 8) { fprintf(stderr, "warning: mismatch between AMpacket->length(%d)"\ " and ser_len - 8(%d)", AMpacket->length, ser_len - 8); } // TODO: check if length has a sensible value dispatch = AMpacket->data; /* Mesh Addressing header */ if ( (*dispatch & DISPATCH_MESH_MASK) == DISPATCH_MESH) { /* move over the dispatch field */ buf += sizeof(*dispatch); len -= sizeof(*dispatch); /* Hops Left */ if ((*dispatch & 0x0F) == 0) { goto discard_packet; } /* Final Destination Address */ if (*dispatch & DISPATCH_MESH_F_FLAG) { hw_dst_addr.type = HW_ADDR_LONG; memcpy(&hw_dst_addr.addr_long, buf, sizeof(hw_dst_addr.addr_long)); buf += sizeof(hw_dst_addr.addr_long); len -= sizeof(hw_dst_addr.addr_long); } else { hw_dst_addr.type = HW_ADDR_SHORT; memcpy(&hw_dst_addr.addr_short, buf, sizeof(hw_dst_addr.addr_short)); buf += sizeof(hw_dst_addr.addr_short); len -= sizeof(hw_dst_addr.addr_short); } /* check if we're the recipient */ if (cmp_hw_addr(&hw_dst_addr, &hw_addr) != 0 && !hw_addr_is_broadcat(&hw_dst_addr)) { // TODO: if mesh forwarding enabled, then forward goto discard_packet; } /* Originator Address */ if (*dispatch & DISPATCH_MESH_O_FLAG) { hw_src_addr.type = HW_ADDR_LONG; memcpy(&hw_src_addr.addr_long, buf, sizeof(hw_src_addr.addr_long)); buf += sizeof(hw_src_addr.addr_long); len -= sizeof(hw_src_addr.addr_long); } else { hw_src_addr.type = HW_ADDR_SHORT; memcpy(&hw_src_addr.addr_short, buf, sizeof(hw_src_addr.addr_short)); buf += sizeof(hw_src_addr.addr_short); len -= sizeof(hw_src_addr.addr_short); } dispatch = buf; } /* Broadcast header */ if (*dispatch == DISPATCH_BC0) { bc_hdr = (struct lowpan_broadcast_hdr *) buf; // do something usefull with bc_hdr->seq_no... buf += (sizeof(struct lowpan_broadcast_hdr)); len -= (sizeof(struct lowpan_broadcast_hdr)); dispatch = buf; } /* fragment header */ if ((*dispatch & DISPATCH_FRAG_MASK) == DISPATCH_FIRST_FRAG || (*dispatch & DISPATCH_FRAG_MASK) == DISPATCH_SUBSEQ_FRAG ) { frag_hdr = (struct lowpan_frag_hdr *) buf; buf += sizeof(struct lowpan_frag_hdr); len -= sizeof(struct lowpan_frag_hdr); /* collect information about the fragment */ dgram_tag = frag_hdr->dgram_tag; dgram_size = frag_hdr->dgram_size & htons(0x07FF); //dgram_size = frag_hdr->dgram_size8[1]; //dgram_size += ((uint16_t) (frag_hdr->dgram_size8[0] & 0x07)) << 8; if ((*dispatch & DISPATCH_FRAG_MASK) == DISPATCH_SUBSEQ_FRAG) { dgram_offset = *buf; buf += 1; len -= 1; } else { dgram_offset = 0; } debug("fragment reassembly: tag: 0x%04X, size: %d, offset: %d"\ "(*8=%d)\n", ntohs(dgram_tag), ntohs(dgram_size), dgram_offset, dgram_offset*8); pkt = find_fragment(&hw_src_addr, &hw_dst_addr, dgram_size, dgram_tag); if (pkt) { debug("found an existing reassembly buffer\n"); /* fragment reassembly buffer found */ /* check for overlap */ for (p = pkt->frag_list; p; p=p->next) { if (dgram_offset == p->offset && len == p->len) { /* duplicate - discard it */ result = 0; goto discard_packet; } else if ((dgram_offset == p->offset && len < p->len) || (dgram_offset > p->offset && dgram_offset < p->offset + p->len/8) ) { goto frag_overlap; } } /* no overlap found */ goto frag_reassemble; } else { debug("starting a new reassembly buffer\n"); /* fragment reassembly buffer not found - set up a new one */ pkt = malloc(sizeof(lowpan_pkt_t)); if (!pkt) { // no free slot for reassembling fragments fprintf(stderr, "out of memory - dropping a fragment\n"); result = -1; goto discard_packet; } pkt->next = fragments; fragments = pkt; clear_pkt(pkt); memcpy(&pkt->hw_src_addr, &hw_src_addr, sizeof(hw_src_addr)); memcpy(&pkt->hw_dst_addr, &hw_dst_addr, sizeof(hw_dst_addr)); pkt->dgram_tag = dgram_tag; pkt->dgram_size = dgram_size; gettimeofday(&tv, NULL); pkt->frag_timeout = tv.tv_sec + FRAG_TIMEOUT; goto frag_reassemble; } frag_overlap: /* overlap - discard previous frags * and restart freagment reassembly */ free_frag_list(pkt->frag_list); pkt->frag_list = NULL; /* not sure if we want to clear the whole buf */ //memset(&pkt->buf, 0, sizeof(pkt->buf)); gettimeofday(&tv, NULL); pkt->frag_timeout = tv.tv_sec + FRAG_TIMEOUT; goto frag_reassemble; frag_reassemble: /* copy buf data */ debug("dgram_offset: %d\n", dgram_offset); memcpy(pkt->buf_begin + dgram_offset*8, buf, len); //TODO: make sure a large len does not cause a buffer overflow /* update frag_info */ p = malloc(sizeof(frag_info_t)); if (!p) { fprintf(stderr, "out of memory - fragment "\ "reassembly failing\n"); } else { p->offset = dgram_offset; p->len = len; /* insert frag_info into the orderer list */ if (pkt->frag_list) { for(q = &(pkt->frag_list); (*q)->next; q=&((*q)->next)) { if (p->offset > (*q)->offset) { break; } } if ((*q)) { debug("inserting frag_info before offset %d\n", (*q)->offset); } else { debug("inserting frag_info at the beginning/end\n"); } p->next = *q; *q = p; } else { debug("inserting frag_info to the beginning " "of the list\n"); p->next = pkt->frag_list; pkt->frag_list = p; } } /* check if this is not the last fragment */ if (!dgram_offset) { /* the first fragment cannot be the last one */ last_frag = 0; } else { debug("checking last_frag...\n"); last_frag=1; dgram_offset = ntohs(dgram_size)/8; for(p=pkt->frag_list; p && dgram_offset; p=p->next) { debug("dgram_offset: %d, p->offset: %d, p->len: %d\n", dgram_offset, p->offset, p->len); if (p->offset + p->len/8 != dgram_offset) { debug("offset mismatch - not the last fragment\n"); last_frag = 0; break; } dgram_offset = p->offset; } } if (last_frag) { debug("last fragment, reassembly done\n"); pkt->len = ntohs(dgram_size); debug("dumping reassembled datagram...\n"); dump_serial_packet(pkt->buf_begin, pkt->len); /* pass up the complete packet */ result = serial_input_layer3(pkt->buf_begin, pkt->len, &hw_src_addr, &hw_dst_addr); /* deallocate pkt and all fragment info */ free_lowpan_pkt(pkt); } else { result = 0; } } else { /* no fragment header present */ result = serial_input_layer3(buf, len, &hw_src_addr, &hw_dst_addr); } } else { //printf("no data on serial port, but FD trigerred select\n"); } discard_packet: if (ser_data) { free(ser_data); } if (ser_data && ser_len > 0) { return 1; } else { return 0; } //return result; } int serial_input_layer3(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr) { uint8_t *dispatch = buf; //debug("%s()\n", __func__); //dump_serial_packet(buf, len); if (len <= 0) return 1; /* uncompressed IPv6 */ if (*dispatch == 0x41) { return serial_input_ipv6_uncompressed(buf+1, len-1, hw_src_addr, hw_dst_addr); } /* LOWPAN_HC1 compressed IPv6 */ else if (*dispatch == 0x42) { return serial_input_ipv6_compressed(buf+1, len-1, hw_src_addr, hw_dst_addr); } /* unknown dispatch value if we got here */ else { debug("unknown dispatch value: %X\n", *dispatch); return tun_write(tun_fd, (char*) buf+1, len-1); } } int serial_input_ipv6_uncompressed(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr) { debug("%s()\n", __func__); //dump_serial_packet(buf, len); // TODO: update neighbor table return tun_write(tun_fd, (char*) buf, len); } int serial_input_ipv6_compressed(uint8_t *buf, int len, const hw_addr_t *hw_src_addr, const hw_addr_t *hw_dst_addr) { int ret=0; int new_len; uint8_t *new_buf; debug("%s()\n", __func__); if (0 == lowpan_decompress(buf, len, hw_src_addr, hw_dst_addr, &new_buf, &new_len) ) { // TODO: update neighbor table buf = new_buf; len = new_len; ret = tun_write(tun_fd, (char*) buf, len); if (new_buf && new_len) { free(new_buf); } } return ret; } /* ------------------------------------------------------------------------- */ void timer_fired() { struct timeval tv; lowpan_pkt_t *p; lowpan_pkt_t **q; /* time out old fragments */ (void) gettimeofday(&tv, NULL); for(q = &fragments; *q; ) { if ((*q)->frag_timeout > tv.tv_sec) { p = (*q)->next; free(*q); *q = p; } else { q = &((*q)->next); } } // TODO: ND retransmission // TODO: neighbor table timeouts } /* shifts data between the serial port and the tun interface */ int serial_tunnel(serial_source ser_src, int tun_fd) { //int result; fd_set fs; while (1) { FD_ZERO (&fs); FD_SET (tun_fd, &fs); FD_SET (serial_source_fd(ser_src), &fs); select (tun_fd>serial_source_fd(ser_src)? tun_fd+1 : serial_source_fd(ser_src)+1, &fs, NULL, NULL, NULL); debug("--- select() fired ---\n"); /* data available on tunnel device */ if (FD_ISSET (tun_fd, &fs)) { //result = tun_input(); while( tun_input() ); } /* data available on serial port */ if (FD_ISSET (serial_source_fd(ser_src), &fs)) { /* more packets may be queued so process them all */ while (serial_input()); /* using serial_source_empty() seems to make select() * fire way too often, so the above solution is better */ //while(! serial_source_empty(ser_src)) { //result = serial_input(); //} } /* end of data available */ } /* end of while(1) */ return 0; } int main(int argc, char **argv) { char dev[16]; if (argc != 3) { fprintf(stderr, "Usage: %s \n", argv[0]); exit(2); } hw_addr.type = HW_ADDR_SHORT; hw_addr.addr_short[0] = 0x00; // network byte order hw_addr.addr_short[1] = 0x12; /* create the tunnel device */ dev[0] = 0; tun_fd = tun_open(dev); if (tun_fd < 1) { printf("Could not create tunnel device. Fatal.\n"); return 1; } else { printf("Created tunnel device: %s\n", dev); } /* open the serial port */ ser_src = open_serial_source(argv[1], platform_baud_rate(argv[2]), 1, stderr_msg); /* 0 - blocking reads * 1 - non-blocking reads */ if (!ser_src) { debug("Couldn't open serial port at %s:%s\n", argv[1], argv[2]); exit(1); } /* set up the tun interface */ printf("\n"); ssystem("ifconfig tun0 up"); ssystem("ifconfig tun0 mtu 1280"); ssystem("ifconfig tun0 inet6 add 2001:0638:0709:1234::fffe:12/64"); ssystem("ifconfig tun0 inet6 add fe80::fffe:12/64"); printf("\n"); printf("try:\n\tsudo ping6 -s 0 2001:0638:0709:1234::fffe:14\n" "\tnc6 -u 2001:0638:0709:1234::fffe:14 1234\n\n"); /* start tunneling */ serial_tunnel(ser_src, tun_fd); /* clean up */ close_serial_source(ser_src); //close(ser_fd); tun_close(tun_fd, dev); return 0; } tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/serial_tun/tun_dev.c000066400000000000000000000067731207233610700240600ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "tun_dev.h" int tun_open(char *dev) { struct ifreq ifr; int fd; if ((fd = open("/dev/net/tun", O_RDWR | O_NONBLOCK)) < 0) return -1; memset(&ifr, 0, sizeof(ifr)); /* By default packets are tagged as IPv4. To tag them as IPv6, * thy need to be prefixed by struct tun_pi. */ //ifr.ifr_flags = IFF_TUN | IFF_NO_PI; ifr.ifr_flags = IFF_TUN; if (*dev) strncpy(ifr.ifr_name, dev, IFNAMSIZ); if (ioctl(fd, TUNSETIFF, (void *) &ifr) < 0) goto failed; strcpy(dev, ifr.ifr_name); return fd; failed: close(fd); return -1; } int tun_close(int fd, char *dev) { return close(fd); } /* Read/write frames from TUN device */ /* int tun_write(int fd, char *buf, int len) { return write(fd, buf, len); } int tun_read(int fd, char *buf, int len) { return read(fd, buf, len); } */ int tun_write(int fd, char *buf, int len) { int out; struct tun_pi pi = {0, htons(ETH_P_IPV6)}; char *nbuf = malloc(len+sizeof(struct tun_pi)); if (!nbuf) { fprintf(stderr, "tun_write: out of memory!"); return -1; } memcpy(nbuf, &pi, sizeof(struct tun_pi)); memcpy(nbuf+sizeof(struct tun_pi), buf, len); out = write(fd, nbuf, len+sizeof(struct tun_pi)); free(nbuf); return out; } int tun_read(int fd, char *buf, int len) { int out; char *nbuf = malloc(len+sizeof(struct tun_pi)); if (!nbuf) { fprintf(stderr, "tun_read: out of memory!"); return -1; } out=read(fd, nbuf, len+sizeof(struct tun_pi)); if (out > 0 && out >= sizeof(struct tun_pi)) { out-=sizeof(struct tun_pi); memcpy(buf, nbuf+sizeof(struct tun_pi), out); free(nbuf); return out; } else { free(nbuf); return -1; } } tinyos-2.1.2+dfsg/support/sdk/c/6lowpan/serial_tun/tun_dev.h000066400000000000000000000033331207233610700240520ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _TUN_DEV_H #define _TUN_DEV_H int tun_open(char *dev); int tun_close(int fd, char *dev); int tun_write(int fd, char *buf, int len); int tun_read(int fd, char *buf, int len); #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/000077500000000000000000000000001207233610700174265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/blip/Makefile.am000066400000000000000000000000301207233610700214530ustar00rootroot00000000000000 SUBDIRS = lib6lowpan tinyos-2.1.2+dfsg/support/sdk/c/blip/bootstrap.sh000077500000000000000000000000401207233610700217740ustar00rootroot00000000000000#!/bin/sh autoreconf --install tinyos-2.1.2+dfsg/support/sdk/c/blip/configure.ac000066400000000000000000000067451207233610700217300ustar00rootroot00000000000000AC_INIT([blip], [2.1], [stevedh@eecs.berkeley.edu]) AC_CANONICAL_SYSTEM echo $ac_n "building for architecture""... $ac_c" 1>&6 case "$target" in *linux*) AC_MSG_RESULT(linux) arch=linux ;; *darwin*) AC_MSG_RESULT(darwin) arch=darwin dnl exit if tun isn't installed AC_MSG_CHECKING(for tun device) if test -c /dev/tun0; then AC_MSG_RESULT(yes) else AC_MSG_ERROR([ERROR: /dev/tun0 not found. You probably need to install the tuntap kernel extension from http://tuntaposx.sourceforge.net/]) fi ;; *) AC_MSG_RESULT(unknown) AC_MSG_ERROR([currently only Linux and OSX are supported]) ;; esac dnl AC_DEFINE([PLATFORM], [${arch}]) dnl check programs AM_INIT_AUTOMAKE([-Wall -Werror foreign]) AC_PROG_RANLIB AC_PROG_CC AC_CONFIG_MACRO_DIR([m4]) AC_CONFIG_HEADERS([config.h]) AC_CONFIG_FILES([ Makefile lib6lowpan/Makefile lib6lowpan/trace/Makefile ]) dnl driver/Makefile dnl check various platform include files AC_CHECK_HEADERS([stdint.h inttypes.h]) AC_CHECK_HEADERS([netinet/in.h ]) AC_CHECK_HEADERS([linux/if_tun.h]) AC_CHECK_HEADERS([arpa/inet.h]) AC_CHECK_HEADERS([sys/socket.h net/route.h net/if.h], [], [], [[#if HAVE_SYS_SOCKET_H #include #endif #if HAVE_NET_ROUTE_H #include #endif]]) AC_MSG_CHECKING(whether struct in6_addr has u6_addrXX and defines s6_addrXX) AC_TRY_COMPILE([#include ], [static struct in6_addr in6_u; int u = in6_u.s6_addr16;], [AC_MSG_RESULT(yes); AC_DEFINE([HAVE_IN6_ADDR_S6_ADDR], 1, [whether struct in6_addr has u6_addrXX and defines s6_addrXX])], AC_MSG_RESULT(no)) AC_MSG_CHECKING(for SIOCADDRT) AC_TRY_COMPILE([#include ], [int x = SIOCADDRT;], [AC_MSG_RESULT(yes); AC_DEFINE([HAVE_SIOCADDRT], 1, [weather the SIOCADDRT ioctl is defined])], AC_MSG_RESULT(no)) dnl sockoption for joining an ipv6 group AC_MSG_CHECKING(if IPV6_JOIN_GROUP is defined) AC_TRY_COMPILE([#include ], [int x = IPV6_JOIN_GROUP;], [AC_MSG_RESULT(yes); AC_DEFINE([HAVE_IPV6_JOIN_GROUP], 1, [weather IPV6_JOIN_GROUP is defined])], AC_MSG_RESULT(no)) AC_MSG_CHECKING(if IPV6_ADD_MEMBERSHIP is defined) AC_TRY_COMPILE([#include ], [int x = IPV6_ADD_MEMBERSHIP;], [AC_MSG_RESULT(yes); AC_DEFINE([HAVE_IPV6_ADD_MEMBERSHIP], 1, [weather IPV6_ADD_MEMBERSHIP is defined])], AC_MSG_RESULT(no)) dnl if htons requires -lc dnl AC_MSG_CHECKING(if htons requires -lc) dnl AC_TRY_COMPILE([#include ], [int x = htons(10);], dnl [AC_MSG_RESULT(no)], dnl [AC_MSG_RESULT(yes); LDFLAGS+=-lc]) dnl Check where to put the pidfile AC_MSG_CHECKING(where to put seqno file) AC_ARG_WITH(seqfile, [AC_HELP_STRING([--with-seqfile], [Path to the radvd pidfile (/var/run/ip-driver.seq)])], PATH_BLIP_SEQFILE=$withval, PATH_BLIP_SEQFILE=/var/run/ip-driver.seq) AC_MSG_RESULT($PATH_BLIP_SEQFILE) AC_SUBST(PATH_BLIP_SEQFILE) AC_ARG_ENABLE([lpl], [AS_HELP_STRING([--enable-lpl], [assume LPL is in use])], AC_DEFINE([BLIP_L2_RETRIES], [1], [Number of link-layer retransmissions]) []) AC_LINK_FILES(linux/tun_dev_${arch}.c, linux/tun_dev.c) dnl AC_LINK_FILES(driver/routing-${arch}.c, driver/routing-platform.c) dnl AC_LINK_FILES(driver/netlink-${arch}.c, driver/netlink.c) dnl AC_CONFIG_SUBDIRS([driver/radvd-1.0]) AC_OUTPUT tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/000077500000000000000000000000001207233610700215035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/6lowpan.h000066400000000000000000000074451207233610700232540ustar00rootroot00000000000000/* * "Copyright (c) 2008,2010 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ /* * Header file for the 6lowpan/IPv6 stack. * * @author Stephen Dawson-Haggerty * */ #ifndef __6LOWPAN_H__ #define __6LOWPAN_H__ /* * lengths of different lowpan headers */ enum { LOWMSG_MESH_LEN = 5, LOWMSG_BCAST_LEN = 2, LOWMSG_FRAG1_LEN = 4, LOWMSG_FRAGN_LEN = 5, }; enum { INET_MTU = 1280, LIB6LOWPAN_MAX_LEN = 100, LOWPAN_LINK_MTU = 109, /* * The time, in binary milliseconds, after which we stop waiting for * fragments and report a failed receive. We */ FRAG_EXPIRE_TIME = 4096, }; /* * magic numbers from rfc4944; some of them shifted: mostly dispatch values. */ enum { LOWPAN_NALP_PATTERN = 0x0, LOWPAN_MESH_PATTERN = 0x2, LOWPAN_FRAG1_PATTERN = 0x18, LOWPAN_FRAGN_PATTERN = 0x1c, LOWPAN_BCAST_PATTERN = 0x50, LOWPAN_IPV6_PATTERN = 0x41, }; enum { LOWPAN_MESH_V_MASK = 0x20, LOWPAN_MESH_F_MASK = 0x10, LOWPAN_MESH_HOPS_MASK = 0x0f, }; /* * values for LOWPAN_IPHC from draft-ietf-6lowpan-hc-06 */ enum { LOWPAN_DISPATCH_BYTE_MASK = 0xe0, LOWPAN_DISPATCH_BYTE_VAL = 0x60, LOWPAN_IPHC_TF_MASK = 0x18, LOWPAN_IPHC_TF_NONE = 0x18, LOWPAN_IPHC_TF_ECN_DSCP = 0x10, LOWPAN_IPHC_TF_ECN_FL = 0x08, LOWPAN_IPHC_TF_ECN_DSCP_FL = 0x00, LOWPAN_IPHC_NH_MASK = 0x04, LOWPAN_IPHC_NH_INLINE = 0, LOWPAN_IPHC_HLIM_MASK = 0x03, LOWPAN_IPHC_HLIM_NONE = 0x00, LOWPAN_IPHC_HLIM_1 = 0x01, LOWPAN_IPHC_HLIM_64 = 0x02, LOWPAN_IPHC_HLIM_255 = 0x03, LOWPAN_IPHC_CID_MASK = 0x80, LOWPAN_IPHC_CID_PRESENT = 0x80, LOWPAN_IPHC_SAM_SHIFT = 4, LOWPAN_IPHC_M = 0x08, LOWPAN_IPHC_DAM_SHIFT = 0, LOWPAN_IPHC_AC_CONTEXT = 0x04, LOWPAN_IPHC_AM_MASK = 0x3, LOWPAN_IPHC_AM_128 = 0x0, LOWPAN_IPHC_AM_64 = 0x1, LOWPAN_IPHC_AM_16 = 0x2, LOWPAN_IPHC_AM_0 = 0x3, LOWPAN_IPHC_AM_M = 0x08, LOWPAN_IPHC_AM_M_128 = 0x0, LOWPAN_IPHC_AM_M_48 = 0x1, LOWPAN_IPHC_AM_M_32 = 0x2, LOWPAN_IPHC_AM_M_8 = 0x3, }; /* * values for LOWPAN_IPNH from draft-ietf-6lowpan-hc-06 */ enum { LOWPAN_NHC_IPV6_MASK = 0xf0, LOWPAN_NHC_IPV6_PATTERN = 0xe0, LOWPAN_NHC_EID_SHIFT = 0x1, LOWPAN_NHC_EID_MASK = 0xe, LOWPAN_NHC_EID_HOP = 0x0 << LOWPAN_NHC_EID_SHIFT, LOWPAN_NHC_EID_ROUTING = 0x1 << LOWPAN_NHC_EID_SHIFT, LOWPAN_NHC_EID_FRAG = 0x2 << LOWPAN_NHC_EID_SHIFT, LOWPAN_NHC_EID_DEST = 0x3 << LOWPAN_NHC_EID_SHIFT, LOWPAN_NHC_EID_MOBILE = 0x4 << LOWPAN_NHC_EID_SHIFT, LOWPAN_NHC_EID_IPV6 = 0x7 << LOWPAN_NHC_EID_SHIFT, LOWPAN_NHC_NH = 0x1, LOWPAN_NHC_UDP_MASK = 0xf8, LOWPAN_NHC_UDP_PATTERN = 0xf0, LOWPAN_NHC_UDP_CKSUM = 0x4, LOWPAN_NHC_UDP_PORT_MASK = 0x3, LOWPAN_NHC_UDP_PORT_FULL = 0x0, LOWPAN_NHC_UDP_PORT_SRC_FULL = 0x1, LOWPAN_NHC_UDP_PORT_DST_FULL = 0x2, LOWPAN_NHC_UDP_PORT_SHORT = 0x3, }; #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/Makefile.am000066400000000000000000000006711207233610700235430ustar00rootroot00000000000000 SUBDIRS = . trace tests AM_CFLAGS = -DPC -I../../../../../tos/types -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT noinst_LIBRARIES = lib6lowpan.a noinst_lib6lowpandir = $(includedir)/lib6lowpan-2.2.0 noinst_lib6lowpan_HEADERS = 6lowpan.h in_cksum.h \ ip.h ip_malloc.h lib6lowpan.h nwbyte.h lib6lowpan_a_SOURCES = lib6lowpan.c lib6lowpan_4944.c lib6lowpan_frag.c \ iovec.c utility.c in_cksum.c ieee154_header.c ip_malloc.c $(lib6lowpan_HEADERS) tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/blip-pc-includes.h000066400000000000000000000017541207233610700250150ustar00rootroot00000000000000#ifndef _BLIP_PC_INCLUDES_H_ #define _BLIP_PC_INCLUDES_H_ #include #include #include #if HAVE_CONFIG_H #include "config.h" #endif #if HAVE_STDINT_H # include #else # if HAVE_INTTYPES_H # include # else # error "no int types found!" #endif #endif // int types #if HAVE_LINUX_IF_TUN_H # include #else // # error "TUN device not supported on this platform" struct tun_pi { uint32_t af; }; #endif #if HAVE_NET_IF_H // OSX prerequisites #if HAVE_SYS_SOCKET_H #include #endif #if HAVE_NET_ROUTE_H #include #endif # include // for IFNAMSIZ #else # error "no IFNAMSIZE defined" #endif #if HAVE_NETINET_IN_H # include #if ! HAVE_IN6_ADDR_S6_ADDR # define s6_addr16 __u6_addr.__u6_addr16 # endif #else # error "no netinet/in.h" #endif #if HAVE_ARPA_INET_H # include # include "nwbyte.h" #else # error "no htons routines!" #endif #include #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/blip-tinyos-includes.h000066400000000000000000000002061207233610700257270ustar00rootroot00000000000000#ifndef _BLIP_TINYOS_INCLUDES_H #define _BLIP_TINYOS_INCLUDES_H #include #include #include "nwbyte.h" #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/ieee154_header.c000066400000000000000000000045661207233610700243330ustar00rootroot00000000000000 #include "lib6lowpan-includes.h" #include "internal.h" #define COPY_IEEE154_ADDR(FIELD) \ if (frame-> FIELD .ieee_mode == IEEE154_ADDR_SHORT) { \ uint16_t tmpval = (frame-> FIELD . i_saddr); \ memcpy(buf, &tmpval, 2); \ buf += 2; \ } else { \ memcpy(buf, &(frame-> FIELD .i_laddr), 8); \ buf += 8; \ } uint8_t *pack_ieee154_header(uint8_t *buf, size_t cnt, struct ieee154_frame_addr *frame) { uint8_t *ieee_hdr = buf; uint16_t fcf; // struct ieee154_header_base *ieee_hdr = (struct ieee154_header_base *)buf; /* fill in the following 802.15.4 fields: */ /* length: will be set once we know how long the data is */ /* fcf: (set frame time, addressing modes) */ /* destpan: set to address in frame */ /* source and destination addresses */ buf = buf + IEEE154_MIN_HDR_SZ; COPY_IEEE154_ADDR(ieee_dst); COPY_IEEE154_ADDR(ieee_src); fcf = (IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE); fcf |= (frame->ieee_src.ieee_mode << IEEE154_FCF_SRC_ADDR_MODE); fcf |= (frame->ieee_dst.ieee_mode << IEEE154_FCF_DEST_ADDR_MODE); fcf |= (1 << IEEE154_FCF_INTRAPAN); ieee_hdr[1] = (fcf & 0xff); ieee_hdr[2] = (fcf >> 8); ieee_hdr[4] = frame->ieee_dstpan & 0xff; ieee_hdr[5] = frame->ieee_dstpan >> 8; return buf; } uint8_t *unpack_ieee154_hdr(uint8_t *buf, struct ieee154_frame_addr *frame) { uint16_t fcf = ((uint16_t)buf[2] << 8) | buf[1]; frame->ieee_dstpan = htole16(((uint16_t)buf[5] << 8) | buf[4]); frame->ieee_src.ieee_mode = (fcf >> IEEE154_FCF_SRC_ADDR_MODE) & 0x3; frame->ieee_dst.ieee_mode = (fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 0x3; buf += IEEE154_MIN_HDR_SZ; if (frame->ieee_dst.ieee_mode == IEEE154_ADDR_SHORT) { memcpy(&frame->ieee_dst.i_saddr, buf, 2); buf += 2; } else if (frame->ieee_dst.ieee_mode == IEEE154_ADDR_EXT) { memcpy(&frame->ieee_dst.i_laddr, buf, 8); buf += 8; } if (frame->ieee_src.ieee_mode == IEEE154_ADDR_SHORT) { memcpy(&frame->ieee_src.i_saddr, buf, 2); buf += 2; } else if (frame->ieee_src.ieee_mode == IEEE154_ADDR_EXT) { memcpy(&frame->ieee_src.i_laddr, buf, 8); buf += 8; } return buf; } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/ieee154_header.h000066400000000000000000000003451207233610700243270ustar00rootroot00000000000000#ifndef _IEEE154_HEADER_H #define _IEEE154_HEADER_H uint8_t *pack_ieee154_header(uint8_t *buf, size_t cnt, struct ieee154_frame_addr *frame) ; uint8_t *unpack_ieee154_hdr(uint8_t *buf, struct ieee154_frame_addr *frame); #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/in_cksum.c000066400000000000000000000147651207233610700234740ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ /* in_cksum.c * 4.4-Lite-2 Internet checksum routine, modified to take a vector of * pointers/lengths giving the pieces to be checksummed. * * $Id: in_cksum.c,v 1.3 2009/08/20 17:03:05 sdhsdh Exp $ */ /* * Copyright (c) 1988, 1992, 1993 * The Regents of the University of California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * @(#)in_cksum.c 8.1 (Berkeley) 6/10/93 */ #include #include "in_cksum.h" #include "lib6lowpan.h" #include "nwbyte.h" #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x) #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);} int in_cksum(const struct ip_iovec *vec) { #if 1 /* This will break horribly if the length of any but the last ip_iovec is odd! */ uint32_t sum = 0; uint16_t cur = 0; int i; uint8_t *w; for (; vec != NULL; vec = vec->iov_next) { if (vec->iov_len == 0) continue; w = vec->iov_base; for (i = 0; i < vec->iov_len; i++) { if (i % 2 == 0) { cur |= ((uint16_t)w[i]) << 8; if (i + 1 == vec->iov_len) { goto finish; } } else { cur |= w[i]; finish: sum += cur; cur = 0; } } } while (sum > 0xffff) { sum = (sum & 0xffff) + (sum >> 16); } return ~((uint16_t)sum); #else register const uint16_t *w; register uint32_t sum = 0; register uint32_t mlen = 0; int byte_swapped = 0; union { uint8_t c[2]; uint16_t s; } s_util; union { uint16_t s[2]; uint32_t l; } l_util; for (; vec != NULL; vec = vec->iov_next) { if (vec->iov_len == 0) continue; w = (const uint16_t *)vec->iov_base; if (mlen == -1) { /* * The first byte of this chunk is the continuation * of a word spanning between this chunk and the * last chunk. * * s_util.c[0] is already saved when scanning previous * chunk. */ s_util.c[1] = *(const uint8_t *)w; sum += s_util.s; w = (const uint16_t *)((const uint8_t *)w + 1); mlen = vec->iov_len - 1; } else mlen = vec->iov_len; /* * Force to even boundary. */ if ((1 & (int) w) && (mlen > 0)) { REDUCE; sum <<= 8; s_util.c[0] = *(const uint8_t *)w; w = (const uint16_t *)((const uint8_t *)w + 1); mlen--; byte_swapped = 1; } /* * Unroll the loop to make overhead from * branches &c small. */ while ((mlen -= 32) >= 0) { sum += w[0]; sum += w[1]; sum += w[2]; sum += w[3]; sum += w[4]; sum += w[5]; sum += w[6]; sum += w[7]; sum += w[8]; sum += w[9]; sum += w[10]; sum += w[11]; sum += w[12]; sum += w[13]; sum += w[14]; sum += w[15]; w += 16; } mlen += 32; while ((mlen -= 8) >= 0) { sum += w[0]; sum += w[1]; sum += w[2]; sum += w[3]; w += 4; } mlen += 8; if (mlen == 0 && byte_swapped == 0) continue; REDUCE; while ((mlen -= 2) >= 0) { sum += *w++; } if (byte_swapped) { REDUCE; sum <<= 8; byte_swapped = 0; if (mlen == -1) { s_util.c[1] = *(const uint8_t *)w; sum += s_util.s; mlen = 0; } else mlen = -1; } else if (mlen == -1) s_util.c[0] = *(const uint8_t *)w; } if (mlen == -1) { /* The last mbuf has odd # of bytes. Follow the standard (the odd byte may be shifted left by 8 bits or not as determined by endian-ness of the machine) */ s_util.c[1] = 0; sum += s_util.s; } REDUCE; return (~sum & 0xffff); #endif } /* SDH : Added to allow for friendly message checksumming */ uint16_t msg_cksum(const struct ip6_hdr *iph, struct ip_iovec *data, uint8_t nxt_hdr) { struct ip_iovec cksum_vec[3]; uint32_t hdr[2]; cksum_vec[0].iov_base = (uint8_t *)(iph->ip6_src.s6_addr); cksum_vec[0].iov_len = 16; cksum_vec[0].iov_next = &cksum_vec[1]; cksum_vec[1].iov_base = (uint8_t *)(iph->ip6_dst.s6_addr); cksum_vec[1].iov_len = 16; cksum_vec[1].iov_next = &cksum_vec[2]; cksum_vec[2].iov_base = (uint8_t *)hdr; cksum_vec[2].iov_len = 8; cksum_vec[2].iov_next = data; hdr[0] = htonl(iov_len(data)); hdr[1] = htonl(nxt_hdr); return in_cksum(cksum_vec); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/in_cksum.h000066400000000000000000000027251207233610700234720ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef _IN_CKSUM_H_ #define _IN_CKSUM_H_ /* in_cksum.h * Declaration of Internet checksum routine. * * $Id: in_cksum.h,v 1.1 2009/08/20 17:03:05 sdhsdh Exp $ */ #include #include "iovec.h" #include "ip.h" int in_cksum(const struct ip_iovec *vec); uint16_t msg_cksum(const struct ip6_hdr *iph, struct ip_iovec *data, uint8_t nxt_hdr); #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/internal.h000066400000000000000000000044231207233610700234730ustar00rootroot00000000000000#ifndef _INTERNAL_H #define _INTERNAL_H #include #include "lib6lowpan-includes.h" #include "lib6lowpan.h" #include "ip.h" #include "Ieee154.h" /* Internal function prototypes for unit testing * this way gcc can check against the right prototype. */ /* packing */ int bit_range_zero_p(uint8_t *buf, int start, int end); inline uint8_t *pack_tcfl(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch); inline uint8_t *pack_nh(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch); inline uint8_t *pack_hlim(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch); uint8_t *pack_address(uint8_t *buf, struct in6_addr *addr, int context_match_len, ieee154_addr_t *l2addr, ieee154_panid_t pan, uint8_t *flags); uint8_t *pack_multicast(uint8_t *buf, struct in6_addr *addr, uint8_t *flags); int pack_udp(uint8_t *buf, size_t cnt, struct ip6_packet *packet, int offset); int pack_ipnh(uint8_t *dest, size_t cnt, uint8_t *type, struct ip6_packet *packet, int offset); int pack_nhc_chain(uint8_t **dest, size_t cnt, struct ip6_packet *packet); uint8_t *pack_ieee154_header(uint8_t *buf, size_t cnt, struct ieee154_frame_addr *frame); uint8_t * lowpan_pack_headers(struct ip6_packet *packet, struct ieee154_frame_addr *frame, uint8_t *buf, size_t cnt); /* unpacking */ uint8_t *unpack_ieee154_hdr(uint8_t *buf, struct ieee154_frame_addr *frame); uint8_t *unpack_tcfl(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf); uint8_t *unpack_nh(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf); uint8_t *unpack_hlim(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf); uint8_t *unpack_address(struct in6_addr *addr, uint8_t dispatch, int context, uint8_t *buf, ieee154_addr_t *frame, ieee154_panid_t pan); uint8_t *unpack_multicast(struct in6_addr *addr, uint8_t dispatch, int context, uint8_t *buf); uint8_t *unpack_udp(uint8_t *dest, uint8_t *nxt_hdr, uint8_t *buf); uint8_t *unpack_ipnh(uint8_t *dest, size_t cnt, uint8_t *nxt_hdr, uint8_t *buf); uint8_t *unpack_nhc_chain(struct lowpan_reconstruct *recon, uint8_t **dest, size_t cnt, uint8_t *nxt_hdr, uint8_t *buf); #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/iovec.c000066400000000000000000000034611207233610700227600ustar00rootroot00000000000000#include #include #include "lib6lowpan.h" #include "iovec.h" #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) /** * read len bytes starting at offset into the buffer pointed to by buf * * */ int iov_read(struct ip_iovec *iov, int offset, int len, uint8_t *buf) { int cur_offset = 0, written = 0; // printf("iov_read iov: %p offset: %i len: %i buf: %p\n", iov, offset, len, buf); while (iov != NULL && cur_offset + iov->iov_len <= offset) { cur_offset += iov->iov_len; iov = iov->iov_next; } if (!iov) goto done; while (len > 0) { int start, len_here; start = offset - cur_offset; len_here = MIN(iov->iov_len - start, len); // copy memcpy(buf, iov->iov_base + start, len_here); // printf("iov_read: %i/%i\n", len_here, len); cur_offset += start + len_here; offset += len_here; written += len_here; len -= len_here; buf += len_here; iov = iov->iov_next; if (!iov) { goto done; } } done: return written; } int iov_len(struct ip_iovec *iov) { int rv = 0; while (iov) { rv += iov->iov_len; iov = iov->iov_next; } return rv; } void iov_prefix(struct ip_iovec *iov, struct ip_iovec *new, uint8_t *buf, size_t len) { new->iov_base = buf; new->iov_len = len; new->iov_next = iov; } int iov_update(struct ip_iovec *iov, int offset, int len, uint8_t *buf) { int written = 0; /* advance to the first block where we could write */ while (offset >= iov->iov_len) { offset -= iov->iov_len; iov = iov->iov_next; } while (iov != NULL && written < len) { int writelen = MIN(iov->iov_len - offset, len); memcpy(iov->iov_base + offset, buf, writelen); buf += writelen; len -= writelen; offset = 0; iov = iov->iov_next; } return written; } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/iovec.h000066400000000000000000000007641207233610700227700ustar00rootroot00000000000000#ifndef IOVEC_H_ #define IOVEC_H_ #include #include struct ip_iovec { uint8_t *iov_base; size_t iov_len; struct ip_iovec *iov_next; }; int iov_read(struct ip_iovec *iov, int offset, int len, uint8_t *buf); int iov_len(struct ip_iovec *iov); void iov_prefix(struct ip_iovec *iov, struct ip_iovec *new_iov, uint8_t *buf, size_t len); int iov_update(struct ip_iovec *iov, int offset, int len, uint8_t *buf); void iov_print(struct ip_iovec *iov); #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/ip.h000066400000000000000000000160121207233610700222640ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef _IP_H_ #define _IP_H_ #include #include "lib6lowpan-includes.h" /* * define message structures for internet communication * */ // HAVE_NETINET_IN_H ifdef removed since it is getting defined in libcoap // and breaks CoAPBlip // only needed for blip1.0 and ip-driver, because those were run on the // host computer #if ! PC // update to use netinet/in definition of an IPv6 address; this is a // lot more elegent. struct in6_addr { union { uint8_t u6_addr8[16]; uint16_t u6_addr16[8]; uint32_t u6_addr32[4]; } in6_u; #define s6_addr in6_u.u6_addr8 #define s6_addr16 in6_u.u6_addr16 #define s6_addr32 in6_u.u6_addr32 }; struct sockaddr_in6 { uint16_t sin6_port; struct in6_addr sin6_addr; }; #else #include #endif /* * Definition for internet protocol version 6. * RFC 2460 * @(#)ip.h 8.1 (Berkeley) 6/10/93 */ struct ip6_hdr { union { struct ip6_hdrctl { uint32_t ip6_un1_flow; /* 20 bits of flow-ID */ uint16_t ip6_un1_plen; /* payload length */ uint8_t ip6_un1_nxt; /* next header */ uint8_t ip6_un1_hlim; /* hop limit */ } ip6_un1; uint8_t ip6_un2_vfc; /* 4 bits version, top 4 bits class */ } ip6_ctlun; struct in6_addr ip6_src; /* source address */ struct in6_addr ip6_dst; /* destination address */ } __attribute__((packed)); #define ip6_vfc ip6_ctlun.ip6_un2_vfc #define ip6_flow ip6_ctlun.ip6_un1.ip6_un1_flow #define ip6_plen ip6_ctlun.ip6_un1.ip6_un1_plen #define ip6_nxt ip6_ctlun.ip6_un1.ip6_un1_nxt #define ip6_hlim ip6_ctlun.ip6_un1.ip6_un1_hlim #define ip6_hops ip6_ctlun.ip6_un1.ip6_un1_hlim #define IPV6_VERSION 0x60 #define IPV6_VERSION_MASK 0xf0 #if BYTE_ORDER == BIG_ENDIAN #define IPV6_FLOWINFO_MASK 0x0fffffff /* flow info (28 bits) */ #define IPV6_FLOWLABEL_MASK 0x000fffff /* flow label (20 bits) */ #else #if BYTE_ORDER == LITTLE_ENDIAN #define IPV6_FLOWINFO_MASK 0xffffff0f /* flow info (28 bits) */ #define IPV6_FLOWLABEL_MASK 0xffff0f00 /* flow label (20 bits) */ #endif /* LITTLE_ENDIAN */ #endif #if 1 /* ECN bits proposed by Sally Floyd */ #define IP6TOS_CE 0x01 /* congestion experienced */ #define IP6TOS_ECT 0x02 /* ECN-capable transport */ #endif /* * Extension Headers */ struct ip6_ext { uint8_t ip6e_nxt; uint8_t ip6e_len; }; struct tlv_hdr { uint8_t type; uint8_t len; }; /* * IP protocol numbers */ enum { IANA_ICMP = 58, IANA_UDP = 17, IANA_TCP = 6, // IPV6 defined extention header types. All other next header // values are supposed to be transport protocols, with TLVs used IPV6_HOP = 0, IPV6_IPV6 = 41, IPV6_ROUTING = 43, IPV6_FRAG = 44, IPV6_AUTH = 51, IPV6_SEC = 50, IPV6_NONEXT = 59, IPV6_DEST = 60, IPV6_MOBILITY = 135, IPV6_TLV_PAD1 = 0, IPV6_TLV_PADN = 1, }; #define EXTENSION_HEADER(X) ((X) == IPV6_HOP || (X) == IPV6_ROUTING || (X) == IPV6_DEST) #define COMPRESSIBLE_TRANSPORT(X) ((X) == IANA_UDP) /* interface id */ struct in6_iid { uint8_t data[8]; }; /* * icmp */ struct icmp6_hdr { uint8_t type; /* type field */ uint8_t code; /* code field */ uint16_t cksum; /* checksum field */ }; enum { ICMP_TYPE_ECHO_DEST_UNREACH = 1, ICMP_TYPE_ECHO_PKT_TOO_BIG = 2, ICMP_TYPE_ECHO_TIME_EXCEEDED = 3, ICMP_TYPE_ECHO_PARAM_PROBLEM = 4, ICMP_TYPE_ECHO_REQUEST = 128, ICMP_TYPE_ECHO_REPLY = 129, ICMP_TYPE_ROUTER_SOL = 133, ICMP_TYPE_ROUTER_ADV = 134, ICMP_TYPE_NEIGHBOR_SOL = 135, ICMP_TYPE_NEIGHBOR_ADV = 136, ICMP_TYPE_RPL_CONTROL = 155, ICMP_NEIGHBOR_HOPLIMIT = 255, ICMP_CODE_HOPLIMIT_EXCEEDED = 0, ICMP_CODE_ASSEMBLY_EXCEEDED = 1, }; /* * UDP protocol header. */ struct udp_hdr { uint16_t srcport; /* source port */ uint16_t dstport; /* destination port */ uint16_t len; /* udp length */ uint16_t chksum; /* udp checksum */ }; /* * TCP transport headers and flags */ enum { TCP_FLAG_FIN = 0x1, TCP_FLAG_SYN = 0x2, TCP_FLAG_RST = 0x4, TCP_FLAG_PSH = 0x8, TCP_FLAG_ACK = 0x10, TCP_FLAG_URG = 0x20, TCP_FLAG_ECE = 0x40, TCP_FLAG_CWR = 0x80, }; struct tcp_hdr { uint16_t srcport; uint16_t dstport; uint32_t seqno; uint32_t ackno; uint8_t offset; uint8_t flags; uint16_t window; uint16_t chksum; uint16_t urgent; }; /* * IP metadata and routing structures * * The metadata contains L2 information that upper layers may be * interested in for one reason or another. */ struct ip6_metadata { ieee154_addr_t sender; // platforms commonly provide one or both of these indicators uint8_t lqi; uint8_t rssi; }; /* * These are data structures to hold IP messages. We used a linked * list of headers so that we can easily add extra headers with no * copy; similar to the linux iovec's or BSD mbuf structs. * Every split_ip_msg contains a full IPv6 header (40 bytes), but it * is placed at the end of the struct so that we can read() a message * straight into one of these structs, and then just set up the header * chain. * * Due to the way fragmentation is currently implemented, the total * length of the data referenced from this chain must not be longer * then what can fit into a single fragment. This is a limitation of * the current fragmentation code, but is perfectly usable in most * cases. */ struct ip6_packet { int ip6_inputif; struct ip_iovec *ip6_data; struct ip6_hdr ip6_hdr; }; #define IP6PKT_TRANSPORT 0xff #ifndef NO_LIB6LOWPAN_ASCII /* * parse a string representation of an IPv6 address */ void inet_pton6(char *addr, struct in6_addr *dest); int inet_ntop6(struct in6_addr *addr, char *buf, int cnt); #endif #define POINTER_DIFF(AP, BP) (((char *)AP) - ((char *)BP)) #define POINTER_SUM(AP, B) (((char *)AP) + (B)) #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/ip_malloc.c000066400000000000000000000071751207233610700236200ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef NO_IP_MALLOC #include #include #include "ip_malloc.h" uint8_t heap[IP_MALLOC_HEAP_SIZE]; void ip_malloc_init() { bndrt_t *b = (bndrt_t *)heap; *b = IP_MALLOC_HEAP_SIZE & IP_MALLOC_LEN; } void *ip_malloc(uint16_t sz) { bndrt_t *cur = (bndrt_t *)heap; sz += sizeof(bndrt_t) * 2; sz += (sz % IP_MALLOC_ALIGN); while (((*cur & IP_MALLOC_LEN) < sz || (*cur & IP_MALLOC_INUSE) != 0) && (uint8_t *)cur - heap < IP_MALLOC_HEAP_SIZE) { cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN)); } if ((uint8_t *)cur < heap + IP_MALLOC_HEAP_SIZE) { uint16_t oldsize = *cur & IP_MALLOC_LEN; bndrt_t *next; sz -= sizeof(bndrt_t); next = ((bndrt_t *)(((uint8_t *)cur) + sz)); *cur = (sz & IP_MALLOC_LEN) | IP_MALLOC_INUSE; *next = (oldsize - sz) & IP_MALLOC_LEN; return cur + 1; } else return NULL; } void ip_free(void *ptr) { bndrt_t *prev = NULL, *cur, *next = NULL; cur = (bndrt_t *)heap; while (cur + 1 != ptr && (uint8_t *)cur - heap < IP_MALLOC_HEAP_SIZE) { prev = cur; cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN)); } if (cur + 1 == ptr) { next = (bndrt_t *)((*cur & IP_MALLOC_LEN) + ((uint8_t *)cur)); *cur &= ~IP_MALLOC_INUSE; if ((((uint8_t *)next) - heap) < IP_MALLOC_HEAP_SIZE && (*next & IP_MALLOC_INUSE) == 0) { *cur = (*cur & IP_MALLOC_LEN) + (*next & IP_MALLOC_LEN); } if (prev != NULL && (*prev & IP_MALLOC_INUSE) == 0) { *prev = (*prev & IP_MALLOC_LEN) + (*cur & IP_MALLOC_LEN); } } } uint16_t ip_malloc_freespace() { uint16_t ret = 0; bndrt_t *cur = (bndrt_t *)heap; while ((uint8_t *)cur - heap < IP_MALLOC_HEAP_SIZE) { if ((*cur & IP_MALLOC_INUSE) == 0) ret += *cur & IP_MALLOC_LEN; cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN)); } return ret; } #ifdef PC #include void dump_heap() { int i; for (i = 0; i < IP_MALLOC_HEAP_SIZE; i++) { printf("0x%hx ", heap[i]); if (i % 8 == 7) printf(" "); if (i % 16 == 15) printf ("\n"); if (i > 64) break; } printf("\n"); } void ip_print_heap() { bndrt_t *cur = (bndrt_t *)heap; while (((uint8_t *)cur) - heap < IP_MALLOC_HEAP_SIZE) { printf ("heap region start: 0x%x length: %i used: %i\n", cur, (*cur & IP_MALLOC_LEN), (*cur & IP_MALLOC_INUSE) >> 15); if ((*cur & IP_MALLOC_LEN) == 0) { printf("ERROR: zero length cell detected!\n"); dump_heap(); exit(1); } cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN)); } } #endif #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/ip_malloc.h000066400000000000000000000031261207233610700236150ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef NO_IP_MALLOC #ifndef IP_MALLOC_H_ #define IP_MALLOC_H_ #include // align on this number of byte boundarie#s #define IP_MALLOC_ALIGN 2 #define IP_MALLOC_LEN 0x0fff #define IP_MALLOC_FLAGS 0x7000 #define IP_MALLOC_INUSE 0x8000 #define IP_MALLOC_HEAP_SIZE 1500 extern uint8_t heap[IP_MALLOC_HEAP_SIZE]; typedef uint16_t bndrt_t; void ip_malloc_init(); void *ip_malloc(uint16_t sz); void ip_free(void *ptr); uint16_t ip_malloc_freespace(); #ifdef PC void ip_print_heap(); #endif #endif #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/lib6lowpan-includes.h000066400000000000000000000006121207233610700255340ustar00rootroot00000000000000#ifndef _LIB6LOWPAN_INCLUDES_H #define _LIB6LOWPAN_INCLUDES_H #ifdef HAVE_CONFIG_H #include "config.h" #endif #ifdef PC #include "blip-pc-includes.h" // typedef uint16_t ieee154_saddr_t; typedef uint16_t hw_pan_t; enum { HW_BROADCAST_ADDR = 0xffff, }; #else #include "blip-tinyos-includes.h" #endif #include #include "nwbyte.h" #include "iovec.h" #include "6lowpan.h" #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/lib6lowpan.c000066400000000000000000000643711207233610700237370ustar00rootroot00000000000000/* Implementation of draft-ietf-6lowpan-hc-06 */ /* @author Stephen Dawson-Haggerty */ /* Each function in this file should have an associated set of test * cases in tests/ * * The library is built up from small functions which take care of one * element of compressor or decompression. This way, we can unit-test * all the little pieces separately and then have one big function * which merely applies them in the right order. In general, HC * allows you to do this pretty well -- the only real state you need * to hang onto is the dispatch block at the beginning of the * encoding. */ #include #include #include #ifdef UNIT_TESTING #include #else // #define printf(fmt, args ...) ; #endif #include "lib6lowpan-includes.h" #include "lib6lowpan.h" #include "ip.h" #include "Ieee154.h" #include "ieee154_header.h" #include "internal.h" /* UTILITY MACROS AND FUNCTIONS */ /* test if the first 64-bits are fe80::/64 */ #define IS_LINKLOCAL(ADDR) \ ((ADDR)->s6_addr16[0] == htons(0xfe80) && \ (ADDR)->s6_addr16[1] == 0 && \ (ADDR)->s6_addr16[2] == 0 && \ (ADDR)->s6_addr16[3] == 0) /* test if the address is all zeroes */ #define IS_UNSPECIFIED(ADDR) \ ((ADDR)->s6_addr16[0] == 0 && \ (ADDR)->s6_addr16[1] == 0 && \ (ADDR)->s6_addr16[2] == 0 && \ (ADDR)->s6_addr16[3] == 0 && \ (ADDR)->s6_addr16[4] == 0 && \ (ADDR)->s6_addr16[5] == 0 && \ (ADDR)->s6_addr16[6] == 0 && \ (ADDR)->s6_addr16[7] == 0) #if ! defined(HAVE_LOWPAN_EXTERN_MATCH_CONTEXT) int lowpan_extern_read_context(struct in6_addr *addr, int context) { return -1; } int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) { return 0; } #endif int iid_eui_cmp(uint8_t *iid, uint8_t *eui) { return (iid[0] == (eui[7] ^ 0x2) && iid[1] == eui[6] && iid[2] == eui[5] && iid[3] == eui[4] && iid[4] == eui[3] && iid[5] == eui[2] && iid[6] == eui[1] && iid[7] == eui[0]); } /* @return 0 if all bits in the range [start,end) are zero */ /* -1 otherwise */ int bit_range_zero_p(uint8_t *buf, int start, int end) { int start_byte = start / 8; int end_byte = end / 8; int i; uint8_t start_mask = 0xff << (8 - (start % 8)); uint8_t end_mask = 0xff << (8 - (end % 8)); // printf("start: %i end: %i, (%i, %i)\n", start, end, start_byte, end_byte); // printf("start mask: 0x%x end mask: 0x%x\n", start_mask, end_mask); if ((buf[start_byte] & start_mask) != 0) { return -1; } if ((buf[end_byte] & end_mask) != 0) { return -1; } for (i = start_byte; i < end_byte; i++) { if (buf[i] != 0) return -1; } return 0; } /* HEADER PACKING */ /* functions for creating a compressed representation of an IPv6 header */ /* packs the Traffic Class and Flow Label fields as described in the internet draft */ /* @buf the buffer to write any anyline fields to */ /* @hdr the IPv6 header being compressed; this function only examines the first four octets */ /* @dispatch the octet corresponding to the first octet of the IPHC dispatch value */ /* modified to reflect the packing of the fields */ inline uint8_t *pack_tcfl(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch) { uint32_t flow = (ntohl(hdr->ip6_flow) & 0x000fffff); uint8_t tc = (ntohl(hdr->ip6_flow) >> 20) & 0xff; if (flow == 0 && tc == 0) { // lucky us *dispatch |= LOWPAN_IPHC_TF_NONE; } else if (flow == 0) { *dispatch |= LOWPAN_IPHC_TF_ECN_DSCP; *buf = (tc >> 2) & 0xff; *buf |= (tc << 6) & 0xff; buf++; } else if ((tc & 0x3) == tc) { *dispatch |= LOWPAN_IPHC_TF_ECN_FL; *buf = (tc << 6) & 0xff; *buf |= (flow >> 16) & 0x0f; *(buf + 1) = (flow >> 8) & 0xff; *(buf + 2) = (flow) & 0xff; buf += 3; } else { *dispatch |= LOWPAN_IPHC_TF_ECN_DSCP_FL; *buf = (tc >> 2) & 0xff; *buf |= (tc << 6) & 0xff; *(buf + 1) = (flow >> 16) & 0x0f; *(buf + 2) = (flow >> 8) & 0xff; *(buf + 3) = (flow) & 0xff; buf += 4; } return buf; } inline uint8_t *pack_nh(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch) { uint8_t nxt = hdr->ip6_nxt; if (nxt == IPV6_HOP || nxt == IPV6_ROUTING || nxt == IPV6_FRAG || nxt == IPV6_DEST || nxt == IPV6_MOBILITY || nxt == IPV6_IPV6 || nxt == IANA_UDP) { *dispatch |= LOWPAN_IPHC_NH_MASK; } else { *buf++ = hdr->ip6_nxt; } return buf; } inline uint8_t *pack_hlim(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch) { if (hdr->ip6_hlim == 1) { *dispatch |= LOWPAN_IPHC_HLIM_1; } else if (hdr->ip6_hlim == 64) { *dispatch |= LOWPAN_IPHC_HLIM_64; } else if (hdr->ip6_hlim == 255) { *dispatch |= LOWPAN_IPHC_HLIM_255; } else { *dispatch |= LOWPAN_IPHC_HLIM_NONE; *buf++ = hdr->ip6_hlim; } return buf; } /* packs all non-multicast addresses */ /* @buf output buffer */ /* @addr the ipv6 address to be compressed */ /* @context_match_len if a context matches, how long the match is. must be multiple of 8 */ /* @l2addr the link-layer address correspoinding to the address (source or destination) */ /* @pan the destination pan ID */ /* @flags return argument; which address mode was selected */ uint8_t *pack_address(uint8_t *buf, struct in6_addr *addr, int context_match_len, ieee154_addr_t *l2addr, ieee154_panid_t pan, uint8_t *flags) { *flags = 0; if (IS_LINKLOCAL(addr)) { /* then we use stateless compression */ /* no bits to set, just pack the IID */ if (addr->s6_addr16[4] == 0 && addr->s6_addr16[5] == 0 && addr->s6_addr16[6] == 0) { // then we use 16-bit mode. This isn't going to be popular... *flags |= LOWPAN_IPHC_AM_16; memcpy(buf, &addr->s6_addr[14], 2); return buf += 2; } else if (/* maybe it's a 16-bit address with the IID derived from the PANID + address */ (addr->s6_addr16[4] == htons(letohs(pan) & ~0x0200) && addr->s6_addr16[5] == htons(0x00ff) && addr->s6_addr16[6] == htons(0xfe00) && (((l2addr->ieee_mode == IEEE154_ADDR_SHORT) && addr->s6_addr16[7] == htons(letohs(l2addr->i_saddr))))) || /* no? Maybe it's just a straight-up 64-bit EUI64 */ ((l2addr->ieee_mode == IEEE154_ADDR_EXT) && (iid_eui_cmp(&addr->s6_addr[8], l2addr->i_laddr.data)))) { /* in either case we can elide the addressing from the packet. */ *flags |= LOWPAN_IPHC_AM_0; return buf; } else { *flags |= LOWPAN_IPHC_AM_64; memcpy(buf, &addr->s6_addr[8], 8); return buf + 8; } } else if (context_match_len > 0) { int extra = 0; // then we're using the context *flags |= LOWPAN_IPHC_AC_CONTEXT; if (context_match_len == 128) { *flags |= LOWPAN_IPHC_AM_0; } else if (bit_range_zero_p(&addr->s6_addr[0], context_match_len, 112) == 0) { *flags |= LOWPAN_IPHC_AM_16; memcpy(buf, &addr->s6_addr[14], 2); extra = 2; } else if (bit_range_zero_p(&addr->s6_addr[0], context_match_len, 64) == 0) { *flags |= LOWPAN_IPHC_AM_64; memcpy(buf, &addr->s6_addr[8], 8); extra = 8; } else { *flags |= LOWPAN_IPHC_AM_128; *flags &= ~LOWPAN_IPHC_AC_CONTEXT; memcpy(buf, &addr->s6_addr[0], 16); extra = 16; } return buf + extra; } else if (IS_UNSPECIFIED(addr)) { /* this case doesn't involve any compression */ *flags |= LOWPAN_IPHC_AC_CONTEXT | LOWPAN_IPHC_AM_128; return buf; } else { /* otherwise we have to send the whole thing. */ *flags |= LOWPAN_IPHC_AM_128; memcpy(buf, addr->s6_addr, 16); return buf + 16; } } /* Packs a multicast address into the smallest address possible. */ /* does not currently implement stateful multicast address compression */ /* also does not check to make sure it is a multicast address */ uint8_t *pack_multicast(uint8_t *buf, struct in6_addr *addr, uint8_t *flags) { /* no need to set AC since it's zero */ *flags = 0; if ((addr->s6_addr16[0] == htons(0xff02)) && (bit_range_zero_p(addr->s6_addr, 16, 120) == 0)) { *flags |= LOWPAN_IPHC_AM_M_8; *buf = addr->s6_addr[15]; return buf + 1; } else if (bit_range_zero_p(addr->s6_addr, 16, 104) == 0) { *flags |= LOWPAN_IPHC_AM_M_32; *buf = addr->s6_addr[1]; memcpy(buf + 1, &addr->s6_addr[13], 3); return buf + 4; } else if (bit_range_zero_p(addr->s6_addr, 16, 88) == 0) { *flags |= LOWPAN_IPHC_AM_M_48; *buf = addr->s6_addr[1]; memcpy(buf + 1, &addr->s6_addr[11], 5); return buf + 6; } else { *flags += LOWPAN_IPHC_AM_M_128; memcpy(buf, addr->s6_addr, 16); return buf + 16; } } /* never pack the ports */ int pack_udp(uint8_t *buf, size_t cnt, struct ip6_packet *packet, int offset) { struct udp_hdr udp; if (cnt < 7) { return -1; } if (iov_read(packet->ip6_data, offset, sizeof(struct udp_hdr), (void *)&udp) != sizeof(struct udp_hdr)) { return -1; } *buf = LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_PORT_FULL; memcpy(buf + 1, &udp.srcport, 4); memcpy(buf + 5, &udp.chksum, 2); return 7; } /* @type the next header value of the header we are inspecting * @pkt an iovec storing the packet being compressed * @offset the offset to the start of the extension header we are interested in * * @return the length of the header, in octets, eliding any trailing * padding options. on error, 0, since the shortest possible extension * header is of length 2 and that would be in the case where it * contains only padding. */ uint8_t __ipnh_real_length(uint8_t type, struct ip_iovec *pkt, int offset) { int start_offset = offset, end_offset = offset + 2; struct ip6_ext ext; struct tlv_hdr tlv; if (iov_read(pkt, offset, 2, (void *)&ext) != 2) return -1; /* if it's neither of these two types, the header length is contained in the header. */ if (type != IPV6_HOP && type != IPV6_DEST) return (ext.ip6e_len + 1) * 8; offset += 2; for (;;) { if (offset >= (ext.ip6e_len + 1) * 8) break; if (iov_read(pkt, offset, 2, (void *)&tlv) != 2) return -1; if (tlv.type == IPV6_TLV_PAD1) { offset += 1; } else { offset += 2 + tlv.len; if (tlv.type != IPV6_TLV_PADN) { end_offset = offset; } } } /* the length of the TLVs didn't match the length in the enclosing header */ if (offset - start_offset != (ext.ip6e_len + 1) * 8) return 0; /* length up to the first padding option encountered which was not followed by a non-padding option. */ return end_offset - start_offset; } int pack_ipnh(uint8_t *dest, size_t cnt, uint8_t *type, struct ip6_packet *packet, int offset) { struct ip6_ext ext; uint8_t real_len; /* read the ipv6 extension header out for processing */ if (iov_read(packet->ip6_data, offset, 2, (void *)&ext) != 2) return -1; if (ext.ip6e_len > cnt) return -1; *dest = LOWPAN_NHC_IPV6_PATTERN; switch (*type) { case IPV6_HOP: *dest |= LOWPAN_NHC_EID_HOP; break; case IPV6_ROUTING: *dest |= LOWPAN_NHC_EID_ROUTING; break; case IPV6_FRAG: *dest |= LOWPAN_NHC_EID_FRAG; break; case IPV6_DEST: *dest |= LOWPAN_NHC_EID_DEST; break; case IPV6_MOBILITY: *dest |= LOWPAN_NHC_EID_MOBILE; break; default: return -1; } real_len = __ipnh_real_length(*type, packet->ip6_data, offset); if (real_len == 0) return -1; /* store the next header type */ /* if it's compressable, we will compress it */ *type = ext.ip6e_nxt; if (ext.ip6e_nxt == IPV6_HOP || ext.ip6e_nxt == IPV6_ROUTING || ext.ip6e_nxt == IPV6_FRAG || ext.ip6e_nxt == IPV6_DEST || ext.ip6e_nxt == IPV6_MOBILITY || ext.ip6e_nxt == IPV6_IPV6 || ext.ip6e_nxt == IANA_UDP) { *dest |= LOWPAN_NHC_NH; } else { /* include the next header value if it's not compressible */ dest++; *dest = ext.ip6e_nxt; } dest ++; *dest++ = real_len; /* copy the payload */ if (iov_read(packet->ip6_data, offset + 2, real_len - 2, dest) != real_len - 2) return -1; /* continue processing at the next header; which will ignore any padding options */ return (ext.ip6e_len + 1) * 8; } int pack_nhc_chain(uint8_t **dest, size_t cnt, struct ip6_packet *packet) { uint8_t nxt = packet->ip6_hdr.ip6_nxt; int offset = 0, rv; /* @return offset is the offset into the unpacked ipv6 datagram */ /* dest is updated to show how far we have gotten in the packed data */ while (nxt == IPV6_HOP || nxt == IPV6_ROUTING || nxt == IPV6_FRAG || nxt == IPV6_DEST || nxt == IPV6_MOBILITY || nxt == IPV6_IPV6) { int extra; rv = pack_ipnh(*dest, cnt, &nxt, packet, offset); if (rv < 0) return -1; /* it just so happens that LOWPAN_IPNH doesn't change the length of the headers */ /* SDH : right... it actually can change the length depending on whether the next header value is elided or not.*/ extra = (**dest & LOWPAN_NHC_NH) ? 0 : 1; *dest += rv + extra; offset += rv; cnt -= rv; } if (nxt == IANA_UDP) { rv = pack_udp(*dest, cnt, packet, offset); if (rv < 0) return -1; offset += sizeof(struct udp_hdr); *dest += rv; } return offset; } uint8_t * lowpan_pack_headers(struct ip6_packet *packet, struct ieee154_frame_addr *frame, uint8_t *buf, size_t cnt) { uint8_t *dispatch, temp_dispatch, ctx_match_length; if ((packet->ip6_hdr.ip6_vfc & IPV6_VERSION_MASK) != IPV6_VERSION) { return NULL; } /* Packing strategy: */ /* 1. we never create 6lowpan broadcast or mesh frames */ /* 2. first, pack the IP headers and any other compressible header into the frame */ /* 3. if the data will fit into the frame, copy it in too */ /* 4. otherwise, do a memmove(3) and insert a fragmentation header */ /* We'll then test the whole thing as a unit. */ /* There is no support for using more then a single context, and no support for stateful packing of multicast addresses. These things are only supported in decompression, for compatibility. */ dispatch = buf; *dispatch = LOWPAN_DISPATCH_BYTE_VAL; *(dispatch+1) = 0; buf += 2; buf = pack_tcfl(buf, &packet->ip6_hdr, dispatch); buf = pack_nh(buf, &packet->ip6_hdr, dispatch); buf = pack_hlim(buf, &packet->ip6_hdr, dispatch); /* back the source and destination addresses */ ctx_match_length = lowpan_extern_match_context(&packet->ip6_hdr.ip6_src, &temp_dispatch); temp_dispatch = 0; buf = pack_address(buf, &packet->ip6_hdr.ip6_src, ctx_match_length, &frame->ieee_src, frame->ieee_dstpan, &temp_dispatch); *(dispatch+1) |= temp_dispatch << LOWPAN_IPHC_SAM_SHIFT; if (packet->ip6_hdr.ip6_dst.s6_addr[0] != 0xff) { /* not multicast */ ctx_match_length = lowpan_extern_match_context(&packet->ip6_hdr.ip6_dst, &temp_dispatch); temp_dispatch = 0; buf = pack_address(buf, &packet->ip6_hdr.ip6_dst, ctx_match_length, &frame->ieee_dst, frame->ieee_dstpan, &temp_dispatch); *(dispatch+1) |= temp_dispatch << LOWPAN_IPHC_DAM_SHIFT; } else { /* multicast */ buf = pack_multicast(buf, &packet->ip6_hdr.ip6_dst, &temp_dispatch); *(dispatch + 1) |= (temp_dispatch << LOWPAN_IPHC_DAM_SHIFT) | LOWPAN_IPHC_AM_M; } return buf; } uint8_t *unpack_tcfl(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf) { uint8_t fl[3] = {0,0,0}; uint8_t tc = 0; switch (dispatch & LOWPAN_IPHC_TF_MASK) { case LOWPAN_IPHC_TF_ECN_DSCP: tc = ((*buf) >> 6) & 0xff; tc |= ((*buf) << 2) & 0xff; buf += 1; break; case LOWPAN_IPHC_TF_ECN_FL: tc = ((*buf) >> 6) & 0xff; fl[2] = buf[0] & 0x0f; fl[1] = buf[1]; fl[0] = buf[2]; buf += 3; break; case LOWPAN_IPHC_TF_ECN_DSCP_FL: tc = ((*buf) >> 6) & 0xff; tc |= ((*buf) << 2) & 0xff; fl[2] = buf[1] & 0x0f; fl[1] = buf[2]; fl[0] = buf[3]; buf += 4; break; } hdr->ip6_flow = htonl(((uint32_t)0x6 << 28) | ((uint32_t)tc << 20) | ((uint32_t)fl[2] << 16) | ((uint32_t)fl[1] << 8) | fl[0]); return buf; } uint8_t *unpack_nh(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf) { if ((dispatch & LOWPAN_IPHC_NH_MASK) == LOWPAN_IPHC_NH_INLINE) { hdr->ip6_nxt = *buf; return buf + 1; } else { return buf; } } uint8_t *unpack_hlim(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf) { switch (dispatch & LOWPAN_IPHC_HLIM_MASK) { case LOWPAN_IPHC_HLIM_1: hdr->ip6_hlim = 1; break; case LOWPAN_IPHC_HLIM_64: hdr->ip6_hlim = 64; break; case LOWPAN_IPHC_HLIM_255: hdr->ip6_hlim = 255; break; default: hdr->ip6_hlim = *buf; return buf + 1; } return buf; } uint8_t *unpack_address(struct in6_addr *addr, uint8_t dispatch, int context, uint8_t *buf, ieee154_addr_t *frame, ieee154_panid_t pan) { memset(addr, 0, 16); if(!((dispatch & LOWPAN_IPHC_AC_CONTEXT))) { /* stateless compression */ switch (dispatch & LOWPAN_IPHC_AM_MASK) { case LOWPAN_IPHC_AM_128: memcpy(addr, buf, 16); return buf + 16; case LOWPAN_IPHC_AM_64: addr->s6_addr16[0] = htons(0xfe80); memcpy(&addr->s6_addr[8], buf, 8); return buf + 8; case LOWPAN_IPHC_AM_16: addr->s6_addr16[0] = htons(0xfe80); memcpy(&addr->s6_addr[14], buf, 2); return buf + 2; default: addr->s6_addr16[0] = htons(0xfe80); if (frame->ieee_mode == IEEE154_ADDR_EXT) { int i; for (i = 0; i < 8; i++) addr->s6_addr[i+8] = frame->i_laddr.data[7-i]; addr->s6_addr[8] ^= 0x2; } else { addr->s6_addr16[4] = htons(letohs(pan) & ~0x0200); addr->s6_addr[11] = 0xff; addr->s6_addr[12] = 0xfe; addr->s6_addr16[7] = leton16(frame->i_saddr); } return buf; } } else { /* context-based compression */ if ((dispatch & LOWPAN_IPHC_AM_MASK) == LOWPAN_IPHC_AM_128) { // unspecified address :: return buf; } else { int ctxlen = lowpan_extern_read_context(addr, context); switch (dispatch & LOWPAN_IPHC_AM_MASK) { case LOWPAN_IPHC_AM_64: memcpy(&addr->s6_addr[8], buf, 8); return buf + 8; case LOWPAN_IPHC_AM_16: memcpy(&addr->s6_addr[14], buf, 2); return buf + 2; case LOWPAN_IPHC_AM_0: // not clear how to use this: // "and 'possibly' link-layer addresses" if (ctxlen <= 64 && frame->ieee_mode == IEEE154_ADDR_EXT) { int i; for (i = 0; i < 8; i++) addr->s6_addr[i+8] = frame->i_laddr.data[7-i]; addr->s6_addr[8] ^= 0x2; } else if (ctxlen <= 112) { memset(&addr->s6_addr[8], 0, 8); addr->s6_addr16[7] = leton16(frame->i_saddr); } return buf; } } } return NULL; } uint8_t *unpack_multicast(struct in6_addr *addr, uint8_t dispatch, int context, uint8_t *buf) { memset(addr->s6_addr, 0, 16); if (!(dispatch & LOWPAN_IPHC_AC_CONTEXT)) { int amount; switch (dispatch & LOWPAN_IPHC_AM_MASK) { case LOWPAN_IPHC_AM_M_128: memcpy(addr->s6_addr, buf, 16); return buf+ 16; case LOWPAN_IPHC_AM_M_48: amount = 5; goto copy; case LOWPAN_IPHC_AM_M_32: amount = 3; copy: addr->s6_addr[0] = 0xff; addr->s6_addr[1] = buf[0]; memcpy(&addr->s6_addr[16-amount], buf + 1, amount); return buf + 1 + amount; case LOWPAN_IPHC_AM_M_8: addr->s6_addr16[0] = htons(0xff02); addr->s6_addr[15] = buf[0]; return buf + 1; } } else { // stateful multicast compression // all you need to do is read in the context here... } return NULL; } uint8_t *unpack_udp(uint8_t *dest, uint8_t *nxt_hdr, uint8_t *buf) { struct udp_hdr *udp = (struct udp_hdr *)dest; uint8_t dispatch = *buf++; *nxt_hdr = IANA_UDP; // MUST be elided udp->len = 0; // MAY be elided if sufficient conditions are met udp->chksum = 0; /* decompress the ports */ switch (dispatch & LOWPAN_NHC_UDP_PORT_MASK) { case LOWPAN_NHC_UDP_PORT_FULL: udp->srcport = htons((buf[0] << 8) | buf[1]); udp->dstport = htons((buf[2] << 8) | buf[3]); buf += 4; break; case LOWPAN_NHC_UDP_PORT_SRC_FULL: udp->srcport = htons((buf[0] << 8) | buf[1]); udp->dstport = htons((0xF0 << 8) | buf[2]); buf += 3; break; case LOWPAN_NHC_UDP_PORT_DST_FULL: udp->srcport = htons((0xF0 << 8) | buf[0]); udp->dstport = htons((buf[1] << 8) | buf[2]); buf += 3; break; case LOWPAN_NHC_UDP_PORT_SHORT: udp->srcport = htons((0xF0B0) | (buf[0] >> 4)); udp->dstport = 0xF0B0 | (buf[0] & 0xf); udp->dstport = htons(udp->dstport); buf += 1; break; } if (!(dispatch & LOWPAN_NHC_UDP_CKSUM)) { udp->chksum = htons((buf[0] << 8) | buf[1]); buf += 2; } return buf; } /** * Unpack a single header that has been encoded using LOWPAN_NHC * compression * */ uint8_t *unpack_ipnh(uint8_t *dest, size_t cnt, uint8_t *nxt_hdr, uint8_t *buf) { if (((*buf) & LOWPAN_NHC_IPV6_MASK) == LOWPAN_NHC_IPV6_PATTERN) { struct ip6_ext *ext = (struct ip6_ext *)dest; uint8_t length, extra; // decompress an ipv6 extension header // fill in the next header field of the previous header switch ((*buf) & LOWPAN_NHC_EID_MASK) { case LOWPAN_NHC_EID_HOP: *nxt_hdr = IPV6_HOP; break; case LOWPAN_NHC_EID_ROUTING: *nxt_hdr = IPV6_ROUTING; break; case LOWPAN_NHC_EID_FRAG: *nxt_hdr = IPV6_FRAG; break; case LOWPAN_NHC_EID_DEST: *nxt_hdr = IPV6_DEST; break; case LOWPAN_NHC_EID_MOBILE: *nxt_hdr = IPV6_MOBILITY; break; case LOWPAN_NHC_EID_IPV6: /* ja if this happens we need to restart compression at the next byte... */ *nxt_hdr = IPV6_IPV6; break; default: return NULL; } // if the next header value is inline, copy that in. if (!((*buf) & LOWPAN_NHC_NH)) { buf ++; ext->ip6e_nxt = *buf; } buf += 1; length = *buf++; extra = (8 - (length % 8)) % 8; if (cnt < length + extra - 2) return NULL; // buf now points at the start of the extension header data memcpy(dest + 2, buf, length - 2); /* pad out to units of 8 octets if necessary */ if (*nxt_hdr == IPV6_HOP || *nxt_hdr == IPV6_DEST) { if (extra == 1) { /* insert a Pad1 */ dest[length] = IPV6_TLV_PAD1; } else if (extra > 1) { dest[length] = IPV6_TLV_PADN; dest[length+1] = extra - 2; } } ext->ip6e_len = ((length + extra) / 8) - 1; return buf + length + extra - 2; } else if (((*buf) & LOWPAN_NHC_UDP_MASK) == LOWPAN_NHC_UDP_PATTERN) { // packed UDP header return unpack_udp(dest, nxt_hdr, buf); } return NULL; } uint8_t *unpack_nhc_chain(struct lowpan_reconstruct *recon, uint8_t **dest, size_t cnt, uint8_t *nxt_hdr, uint8_t *buf) { uint8_t *dispatch; int has_nhc = 1; do { recon->r_transport_header = *dest; dispatch = buf; buf = unpack_ipnh(*dest, cnt, nxt_hdr, buf); if (!buf) return NULL; if (((*dispatch & LOWPAN_NHC_IPV6_MASK) == LOWPAN_NHC_IPV6_PATTERN)) { struct ip6_ext *ext = (struct ip6_ext *)*dest; /* need to update dest */ *dest += (ext->ip6e_len+1)*8; cnt -= (ext->ip6e_len+1)*8; if ((*dispatch & LOWPAN_NHC_NH)) { nxt_hdr = &ext->ip6e_nxt; } else { has_nhc = 0; } } else if (((*dispatch) & LOWPAN_NHC_UDP_MASK) == LOWPAN_NHC_UDP_PATTERN) { struct udp_hdr *udp = (struct udp_hdr *)*dest; recon->r_app_len = &udp->len; has_nhc = 0; *dest += sizeof(struct udp_hdr); } else { has_nhc = 0; } } while (has_nhc); return buf; } uint8_t *lowpan_unpack_headers(struct lowpan_reconstruct *recon, struct ieee154_frame_addr *frame, uint8_t *buf, size_t cnt) { uint8_t *dispatch, *unpack_start = buf, *unpack_end; int contexts[2] = {0, 0}; uint8_t *dest = recon->r_buf; size_t dst_cnt = recon->r_size; struct ip6_hdr *hdr = (struct ip6_hdr *)dest; dispatch = buf; buf += 2; if (((*dispatch) & LOWPAN_DISPATCH_BYTE_MASK) != LOWPAN_DISPATCH_BYTE_VAL) { return NULL; } /* extend the dispatch block if the context extension is present */ if ((*(dispatch + 1) & LOWPAN_IPHC_CID_MASK) == LOWPAN_IPHC_CID_PRESENT) { contexts[0] = (*buf >> 4) & 0xf; contexts[1] = (*buf) & 0xf; buf += 1; } /* pull out the IP header fields */ buf = unpack_tcfl(hdr, *dispatch, buf); buf = unpack_nh(hdr, *dispatch, buf); buf = unpack_hlim(hdr, *dispatch, buf); /* source address is always unicast compressed */ // printf("unpack source: %p (%x)\n", buf, *buf); buf = unpack_address(&hdr->ip6_src, ((*(dispatch + 1) >> LOWPAN_IPHC_SAM_SHIFT)), contexts[0], buf, &frame->ieee_src, frame->ieee_dstpan); if (!buf) { return NULL; } /* destination address may use multicast address compression */ if (*(dispatch + 1) & LOWPAN_IPHC_M) { // printf("unpack multicast: %p\n", buf); buf = unpack_multicast(&hdr->ip6_dst, ((*(dispatch + 1) >> LOWPAN_IPHC_DAM_SHIFT)), contexts[1], buf); // printf("unpack multicast: %p (%x)\n", buf, *buf); } else { buf = unpack_address(&hdr->ip6_dst, ((*(dispatch + 1) >> LOWPAN_IPHC_DAM_SHIFT)), contexts[1], buf, &frame->ieee_dst, frame->ieee_dstpan); } if (!buf) { return NULL; } /* IPv6 header is complete */ /* at this point, (might) need to decompress a chain of headers compressed with LOWPAN_NHC */ unpack_end = (uint8_t *)(hdr + 1); if ((*dispatch) & LOWPAN_IPHC_NH_MASK) { buf = unpack_nhc_chain(recon, &unpack_end, dst_cnt - sizeof(struct ip6_hdr), &hdr->ip6_nxt, buf); if (!buf) { return NULL; } } /* copy any remaining payload into the unpack region */ memcpy(unpack_end, buf, cnt - (buf - unpack_start)); /* return a pointer to the end of the unpacked data */ return unpack_end + (cnt - (buf - unpack_start)); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/lib6lowpan.h000066400000000000000000000144571207233610700237440ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef _LIB6LOWPAN_H_ #define _LIB6LOWPAN_H_ #define UNUSED #include #include "lib6lowpan-includes.h" #include "ip.h" /* utility macros */ #ifndef PC #define memclr(ptr, len) memset((ptr), 0, (len)) // #define memcpy(dst, src, len) ip_memcpy((uint8_t *)dst, (uint8_t *)src, len) // #define memmove(dst, src, len) ip_memcpy(dst, src, len) uint8_t *ip_memcpy(uint8_t *dst0, const uint8_t *src0, uint16_t len) ; #endif uint16_t ieee154_hashaddr(ieee154_addr_t *addr); /* * Fragmentation routines. */ struct packed_lowmsg { uint8_t headers; uint8_t len; uint8_t *data; }; struct lowpan_reconstruct { uint16_t r_tag; /* datagram label */ uint16_t r_source_key; /* */ uint16_t r_size; /* the size of the packet we are reconstructing */ uint8_t *r_buf; /* the reconstruction location */ uint16_t r_bytes_rcvd; /* how many bytes from the packet we have received so far */ uint8_t r_timeout; uint16_t *r_app_len; uint8_t *r_transport_header; struct ip6_metadata r_meta; }; struct lowpan_ctx { uint16_t tag; /* the label of the datagram */ uint16_t offset; /* how far into the packet we have sent, in bytes */ }; enum { LOWMSG_MESH_HDR = (1 << 0), LOWMSG_BCAST_HDR = (1 << 1), LOWMSG_FRAG1_HDR = (1 << 2), LOWMSG_FRAGN_HDR = (1 << 3), LOWMSG_NALP = (1 << 4), LOWMSG_IPNH_HDR = (1 << 5), LOWMSG_IPV6 = (1 << 6), }; uint16_t getHeaderBitmap(struct packed_lowmsg *lowmsg); /* * Return the length of the buffer required to pack lowmsg * into a buffer. */ uint8_t *getLowpanPayload(struct packed_lowmsg *lowmsg); uint8_t setupHeaders(struct packed_lowmsg *packed, uint16_t headers); /* * Test if various protocol features are enabled */ inline uint8_t hasMeshHeader(struct packed_lowmsg *msg); inline uint8_t hasBcastHeader(struct packed_lowmsg *msg); inline uint8_t hasFrag1Header(struct packed_lowmsg *msg); inline uint8_t hasFragNHeader(struct packed_lowmsg *msg); /* * Mesh header fields * * return FAIL if the message doesn't have a mesh header */ uint8_t getMeshHopsLeft(struct packed_lowmsg *msg, uint8_t *hops); uint8_t getMeshOriginAddr(struct packed_lowmsg *msg, ieee154_saddr_t *origin); uint8_t getMeshFinalAddr(struct packed_lowmsg *msg, ieee154_saddr_t *final); uint8_t setMeshHopsLeft(struct packed_lowmsg *msg, uint8_t hops); uint8_t setMeshOriginAddr(struct packed_lowmsg *msg, ieee154_saddr_t origin); uint8_t setMeshFinalAddr(struct packed_lowmsg *msg, ieee154_saddr_t final); /* * Broadcast header fields */ uint8_t getBcastSeqno(struct packed_lowmsg *msg, uint8_t *seqno); uint8_t setBcastSeqno(struct packed_lowmsg *msg, uint8_t seqno); /* * Fragmentation header fields */ inline uint8_t getFragDgramSize(struct packed_lowmsg *msg, uint16_t *size); inline uint8_t getFragDgramTag(struct packed_lowmsg *msg, uint16_t *tag); inline uint8_t getFragDgramOffset(struct packed_lowmsg *msg, uint8_t *size); inline uint8_t setFragDgramSize(struct packed_lowmsg *msg, uint16_t size); inline uint8_t setFragDgramTag(struct packed_lowmsg *msg, uint16_t tag); inline uint8_t setFragDgramOffset(struct packed_lowmsg *msg, uint8_t size); /* * extern functions -- must be declared by app somewhere else */ int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id); int lowpan_extern_read_context(struct in6_addr *addr, int context); int pack_nhc_chain(uint8_t **dest, size_t cnt, struct ip6_packet *packet); /* * Pack the header fields of msg into buffer 'buf'. * it returns the number of bytes written to 'buf', or zero if it encountered a problem. * * it will pack the IP header and all headers in the header chain of * msg into the buffer; the only thing it will not pack is the * payload. * * @packet the message to be packet * @frame link-layer address information about the packet * @buf a buffer to write the headers into * @cnt length of the buffer * @return the number of */ uint8_t *lowpan_pack_headers(struct ip6_packet *packet, struct ieee154_frame_addr *frame, uint8_t *buf, size_t cnt); uint8_t *lowpan_unpack_headers(struct lowpan_reconstruct *recon, struct ieee154_frame_addr *frame, uint8_t *buf, size_t cnt); /* * this function writes the next fragment which needs to be sent into * the buffer passed in. It updates the structures in process to * reflect how much of the packet has been sent so far. * * if the packet does not require fragmentation, this function will * not insert a fragmentation header and will merely compress the * headers into the packet. * */ int lowpan_frag_get(uint8_t *frag, size_t len, struct ip6_packet *packet, struct ieee154_frame_addr *frame, struct lowpan_ctx *ctx); int lowpan_recon_start(struct ieee154_frame_addr *frame_addr, struct lowpan_reconstruct *recon, uint8_t *pkt, size_t len); int lowpan_recon_add(struct lowpan_reconstruct *recon, uint8_t *pkt, size_t len); enum { T_FAILED1 = 0, T_FAILED2 = 1, T_UNUSED = 2, T_ACTIVE = 3, T_ZOMBIE = 4, }; /* uint8_t* getLinkLocalPrefix(); */ #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/lib6lowpan_4944.c000066400000000000000000000243731207233610700244210ustar00rootroot00000000000000/* * "Copyright (c) 2008,2010 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include "lib6lowpan.h" #include "6lowpan.h" #include "nwbyte.h" /* * Library implementation of packing of 6lowpan packets. * * This should allow uniform code treatment between pc and mote code; * the goal is to write ANSI C here... This means no nx_ types, * unfortunately. * * Accessing fields programtically is probably a little less * efficient, but that can be improved. By precomputing the packet * headers present, we can make the overhead not too bad. The #1 * goal of this library is portability and readability. * * The broadcast and mesh headers may or may not be useful, and are * off by default to reduce code size. Removing them reduces the * library size by about 600 bytes. */ /* * Return the length (in bytes) of the buffer required to pack lowmsg * into a buffer. */ inline uint8_t *getLowpanPayload(struct packed_lowmsg *lowmsg) { uint8_t len = 0; #if LIB6LOWPAN_FULL if (lowmsg->headers & LOWMSG_MESH_HDR) len += LOWMSG_MESH_LEN; if (lowmsg->headers & LOWMSG_BCAST_HDR) len += LOWMSG_BCAST_LEN; #endif if (lowmsg->headers & LOWMSG_FRAG1_HDR) len += LOWMSG_FRAG1_LEN; if (lowmsg->headers & LOWMSG_FRAGN_HDR) len += LOWMSG_FRAGN_LEN; return lowmsg->data + len; } /* * Return a bitmap indicating which lowpan headers are * present in the message pointed to by lowmsg. * */ inline uint16_t getHeaderBitmap(struct packed_lowmsg *lowmsg) { uint16_t headers = 0; uint8_t *buf = lowmsg->data; int16_t len = lowmsg->len; if (buf == NULL) return headers; if (len > 0 && ((*buf) >> 6) == LOWPAN_NALP_PATTERN) { return LOWMSG_NALP; } #if LIB6LOWPAN_FULL if (len > 0 && ((*buf) >> 6) == LOWPAN_MESH_PATTERN) { if (!(*buf & LOWPAN_MESH_V_MASK) || !(*buf & LOWPAN_MESH_F_MASK)) { // we will not parse a packet with 64-bit addressing. return LOWMSG_NALP; } headers |= LOWMSG_MESH_HDR; buf += LOWMSG_MESH_LEN; len -= LOWMSG_MESH_LEN; } if (len > 0 && (*buf) == LOWPAN_BCAST_PATTERN) { headers |= LOWMSG_BCAST_HDR; buf += LOWMSG_BCAST_LEN; len -= LOWMSG_BCAST_LEN; } #endif // printf("dispatch: 0x%02x\n", *buf); if (len > 0 && ((*buf) >> 3) == LOWPAN_FRAG1_PATTERN) { headers |= LOWMSG_FRAG1_HDR; buf += LOWMSG_FRAG1_LEN; len -= LOWMSG_FRAG1_LEN; } if (len > 0 && ((*buf) >> 3) == LOWPAN_FRAGN_PATTERN) { headers |= LOWMSG_FRAGN_HDR; buf += LOWMSG_FRAGN_LEN; len -= LOWMSG_FRAGN_LEN; } return headers; } /* * Fill in dispatch values */ inline uint8_t setupHeaders(struct packed_lowmsg *packed, uint16_t headers) { uint8_t *buf = packed->data; uint16_t len = packed->len; if (packed == NULL) return 1; if (buf == NULL) return 1; packed->headers = 0; #if LIB6LOWPAN_FULL if (headers & LOWMSG_MESH_HDR) { if (len < LOWMSG_MESH_LEN) return 1; packed->headers |= LOWMSG_MESH_HDR; *buf = LOWPAN_MESH_PATTERN << 6 | LOWPAN_MESH_V_MASK | LOWPAN_MESH_F_MASK; buf += LOWMSG_MESH_LEN; len -= LOWMSG_MESH_LEN; } if (headers & LOWMSG_BCAST_HDR) { if (len < LOWMSG_BCAST_LEN) return 1; packed->headers |= LOWMSG_BCAST_HDR; *buf = LOWPAN_BCAST_PATTERN; buf += LOWMSG_BCAST_LEN; len -= LOWMSG_BCAST_LEN; } #endif if (headers & LOWMSG_FRAG1_HDR) { if (len < LOWMSG_FRAG1_LEN) return 1; packed->headers |= LOWMSG_FRAG1_HDR; *buf = LOWPAN_FRAG1_PATTERN << 3; buf += LOWMSG_FRAG1_LEN; len -= LOWMSG_FRAG1_LEN; } if (headers & LOWMSG_FRAGN_HDR) { if (len < LOWMSG_FRAGN_LEN) return 1; packed->headers |= LOWMSG_FRAGN_HDR; *buf = LOWPAN_FRAGN_PATTERN << 3; } return 0; } /* * Test if various headers are present are enabled */ #ifdef LIB6LOWPAN_FULL inline uint8_t hasMeshHeader(struct packed_lowmsg *msg) { return (msg->headers & LOWMSG_MESH_HDR); } inline uint8_t hasBcastHeader(struct packed_lowmsg *msg) { return (msg->headers & LOWMSG_BCAST_HDR); } #endif inline uint8_t hasFrag1Header(struct packed_lowmsg *msg) { return (msg->headers & LOWMSG_FRAG1_HDR); } inline uint8_t hasFragNHeader(struct packed_lowmsg *msg) { return (msg->headers & LOWMSG_FRAGN_HDR); } #ifdef LIB6LOWPAN_FULL /* * Mesh header fields * * return FAIL if the message doesn't have a mesh header */ inline uint8_t getMeshHopsLeft(struct packed_lowmsg *msg, uint8_t *hops) { uint8_t *buf = msg->data; if (!hasMeshHeader(msg) || msg->data == NULL || hops == NULL) return 1; *hops = (*buf) & LOWPAN_MESH_HOPS_MASK; return 0; } inline uint8_t getMeshOriginAddr(struct packed_lowmsg *msg, ieee154_saddr_t *origin) { uint8_t *buf = msg->data; if (!hasMeshHeader(msg) || msg->data == NULL || origin == NULL) return 1; // skip 64-bit addresses if (!(*buf & LOWPAN_MESH_V_MASK)) return 1; buf += 1; *origin = ntohs(*((uint16_t *)buf)); return 0; } inline uint8_t getMeshFinalAddr(struct packed_lowmsg *msg, ieee154_saddr_t *final) { uint8_t *buf = msg->data; if (!hasMeshHeader(msg) || msg->data == NULL || final == NULL) return 1; // skip 64-bit addresses if (!(*buf & LOWPAN_MESH_F_MASK)) return 1; buf += 3; *final = ntohs(*((uint16_t *)buf)); return 0; } inline uint8_t setMeshHopsLeft(struct packed_lowmsg *msg, uint8_t hops) { uint8_t *buf = msg->data; if (!hasMeshHeader(msg) || msg->data == NULL) return 1; *buf = 0xb0; *buf |= hops & LOWPAN_MESH_HOPS_MASK; return 0; } inline uint8_t setMeshOriginAddr(struct packed_lowmsg *msg, ieee154_saddr_t origin) { uint8_t *buf = msg->data; if (!hasMeshHeader(msg) || msg->data == NULL) return 1; // skip 64-bit addresses if (!(*buf & LOWPAN_MESH_V_MASK)) return 1; buf += 1; *((uint16_t *)buf) = htons(origin); return 0; } inline uint8_t setMeshFinalAddr(struct packed_lowmsg *msg, ieee154_saddr_t final) { uint8_t *buf = msg->data; if (!hasMeshHeader(msg) || msg->data == NULL) return 1; // skip 64-bit addresses if (!(*buf & LOWPAN_MESH_F_MASK)) return 1; buf += 3; *((uint16_t *)buf) = htons(final); return 0; } /* * Broadcast header fields */ inline uint8_t getBcastSeqno(struct packed_lowmsg *msg, uint8_t *seqno) { uint8_t *buf = msg->data; if (buf == NULL || seqno == NULL || !hasBcastHeader(msg)) return 1; if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN; if (*buf != LOWPAN_BCAST_PATTERN) return 2; buf += 1; *seqno = *buf; return 0; } inline uint8_t setBcastSeqno(struct packed_lowmsg *msg, uint8_t seqno) { uint8_t *buf = msg->data; if (buf == NULL || !hasBcastHeader(msg)) return 1; if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN; if (*buf != LOWPAN_BCAST_PATTERN) return 2; buf += 1; *buf = seqno; return 0; } #endif /* * Fragmentation header fields */ inline uint8_t getFragDgramSize(struct packed_lowmsg *msg, uint16_t *size) { uint8_t *buf = msg->data; uint8_t s[2]; if (buf == NULL || size == NULL) return 1; #ifdef LIB6LOWPAN_FULL if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN; if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN; #endif if ((*buf >> 3) != LOWPAN_FRAG1_PATTERN && (*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1; s[0] = *buf & 0x7; buf++; s[1] = *buf; *size = ((uint16_t)s[0]) << 8 | s[1]; return 0; } inline uint8_t getFragDgramTag(struct packed_lowmsg *msg, uint16_t *tag) { uint8_t *buf = msg->data; if (buf == NULL || tag == NULL) return 1; #ifdef LIB6LOWPAN_FULL if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN; if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN; #endif if ((*buf >> 3) != LOWPAN_FRAG1_PATTERN && (*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1; buf += 2; //*tag = (*buf << 8) | *(buf + 1); ; *tag = ntohs( *(uint16_t *)buf); return 0; } inline uint8_t getFragDgramOffset(struct packed_lowmsg *msg, uint8_t *size) { uint8_t *buf = msg->data; if (buf == NULL || size == NULL) return 1; #ifdef LIB6LOWPAN_FULL if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN; if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN; #endif if ((*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1; buf += 4; *size = *buf; return 0; } inline uint8_t setFragDgramSize(struct packed_lowmsg *msg, uint16_t size) { uint8_t *buf = msg->data; if (buf == NULL) return 1; #ifdef LIB6LOWPAN_FULL if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN; if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN; #endif if ((*buf >> 3) != LOWPAN_FRAG1_PATTERN && (*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1; size = size & 0x7ff; // zero out the dgram size first. *buf &= 0xf8; *buf |= (size >> 8); buf[1] = size & 0xff; // *((uint16_t *)buf) |= htons(size & 0x7ff); return 0; } inline uint8_t setFragDgramTag(struct packed_lowmsg *msg, uint16_t tag) { uint8_t *buf = msg->data; if (buf == NULL) return 1; #ifdef LIB6LOWPAN_FULL if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN; if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN; #endif if ((*buf >> 3) != LOWPAN_FRAG1_PATTERN && (*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1; buf += 2; buf[0] = tag >> 8; buf[1] = tag & 0xff; return 0; } inline uint8_t setFragDgramOffset(struct packed_lowmsg *msg, uint8_t size) { uint8_t *buf = msg->data; if (buf == NULL) return 1; #ifdef LIB6LOWPAN_FULL if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN; if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN; #endif if ((*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1; buf += 4; *buf = size; return 0; } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/lib6lowpan_frag.c000066400000000000000000000132321207233610700247240ustar00rootroot00000000000000 #include #include #include #include "6lowpan.h" #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "ip_malloc.h" #include "iovec.h" #include "ieee154_header.h" int lowpan_recon_start(struct ieee154_frame_addr *frame_addr, struct lowpan_reconstruct *recon, uint8_t *pkt, size_t len) { uint8_t *unpack_point, *unpack_end; struct packed_lowmsg msg; msg.data = pkt; msg.len = len; msg.headers = getHeaderBitmap(&msg); if (msg.headers == LOWMSG_NALP) return -1; /* remove the 6lowpan headers from the payload */ unpack_point = getLowpanPayload(&msg); len -= (unpack_point - pkt); /* set up the reconstruction, or just fill in the packet length */ if (hasFrag1Header(&msg)) { getFragDgramTag(&msg, &recon->r_tag); getFragDgramSize(&msg, &recon->r_size); } else { recon->r_size = LIB6LOWPAN_MAX_LEN + LOWPAN_LINK_MTU; } recon->r_buf = ip_malloc(recon->r_size); if (!recon->r_buf) return -2; memset(recon->r_buf, 0, recon->r_size); recon->r_app_len = NULL; if (*unpack_point == LOWPAN_IPV6_PATTERN) { /* uncompressed header... no need to un-hc */ unpack_point++; len --; memcpy(recon->r_buf, unpack_point, len); unpack_end = recon->r_buf + len; } else { /* unpack the first fragment */ unpack_end = lowpan_unpack_headers(recon, frame_addr, unpack_point, len); } if (!unpack_end) { ip_free(recon->r_buf); return -3; } if (!hasFrag1Header(&msg)) { recon->r_size = (unpack_end - recon->r_buf); } recon->r_bytes_rcvd = unpack_end - recon->r_buf; ((struct ip6_hdr *)(recon->r_buf))->ip6_plen = htons(recon->r_size - sizeof(struct ip6_hdr)); /* fill in any elided app data length fields */ if (recon->r_app_len) { *recon->r_app_len = htons(recon->r_size - (recon->r_transport_header - recon->r_buf)); } /* done, updated all the fields */ /* reconstruction is complete if r_bytes_rcvd == r_size */ return 0; } int lowpan_recon_add(struct lowpan_reconstruct *recon, uint8_t *pkt, size_t len) { struct packed_lowmsg msg; uint8_t *buf; msg.data = pkt; msg.len = len; msg.headers = getHeaderBitmap(&msg); if (msg.headers == LOWMSG_NALP) return -1; if (!hasFragNHeader(&msg)) { return -2; } buf = getLowpanPayload(&msg); len -= (buf - pkt); if (recon->r_size < recon->r_bytes_rcvd + len) return -3; /* just need to copy the new payload in and return */ memcpy(recon->r_buf + recon->r_bytes_rcvd, buf, len); recon->r_bytes_rcvd += len; return 0; } int lowpan_frag_get(uint8_t *frag, size_t len, struct ip6_packet *packet, struct ieee154_frame_addr *frame, struct lowpan_ctx *ctx) { uint8_t *buf, *lowpan_buf, *ieee_buf = frag; uint16_t extra_payload; /* pack 802.15.4 */ buf = lowpan_buf = pack_ieee154_header(frag, len, frame); if (ctx->offset == 0) { int offset = 0; #if LIB6LOWPAN_HC_VERSION == -1 /* just copy the ipv6 header around... */ *buf++ = LOWPAN_IPV6_PATTERN; memcpy(buf, &packet->ip6_hdr, sizeof(struct ip6_hdr)); buf += sizeof(struct ip6_hdr); #elif !defined(LIB6LOWPAN_HC_VERSION) || LIB6LOWPAN_HC_VERSION == 6 /* pack the IPv6 header */ buf = lowpan_pack_headers(packet, frame, buf, len - (buf - frag)); if (!buf) return -1; /* pack the next headers */ offset = pack_nhc_chain(&buf, len - (buf - ieee_buf), packet); if (offset < 0) return -2; #endif /* copy the rest of the payload into this fragment */ extra_payload = ntohs(packet->ip6_hdr.ip6_plen) - offset; /* may need to fragment -- insert a FRAG1 header if so */ if (extra_payload > len - (buf - ieee_buf)) { struct packed_lowmsg lowmsg; memmove(lowpan_buf + LOWMSG_FRAG1_LEN, lowpan_buf, buf - lowpan_buf); lowmsg.data = lowpan_buf; lowmsg.len = LOWMSG_FRAG1_LEN; lowmsg.headers = 0; setupHeaders(&lowmsg, LOWMSG_FRAG1_HDR); setFragDgramSize(&lowmsg, ntohs(packet->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr)); setFragDgramTag(&lowmsg, ctx->tag); lowpan_buf += LOWMSG_FRAG1_LEN; buf += LOWMSG_FRAG1_LEN; extra_payload = len - (buf - ieee_buf); extra_payload -= (extra_payload % 8); } if (iov_read(packet->ip6_data, offset, extra_payload, buf) != extra_payload) { return -3; } ctx->offset = offset + extra_payload + sizeof(struct ip6_hdr); return (buf - frag) + extra_payload; } else { struct packed_lowmsg lowmsg; buf = lowpan_buf = pack_ieee154_header(frag, len, frame); /* setup the FRAGN header */ lowmsg.data = lowpan_buf; lowmsg.len = LOWMSG_FRAGN_LEN; lowmsg.headers = 0; setupHeaders(&lowmsg, LOWMSG_FRAGN_HDR); if (setFragDgramSize(&lowmsg, ntohs(packet->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr))) return -5; if (setFragDgramTag(&lowmsg, ctx->tag)) return -6; if (setFragDgramOffset(&lowmsg, ctx->offset / 8)) return -7; buf += LOWMSG_FRAGN_LEN; extra_payload = ntohs(packet->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr) - ctx->offset; if (extra_payload > len - (buf - ieee_buf)) { extra_payload = len - (buf - ieee_buf); extra_payload -= (extra_payload % 8); } if (iov_read(packet->ip6_data, ctx->offset - sizeof(struct ip6_hdr), extra_payload, buf) != extra_payload) { return -4; } ctx->offset += extra_payload; if (extra_payload == 0) return 0; else return (lowpan_buf - ieee_buf) + LOWMSG_FRAGN_LEN + extra_payload; } } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/nwbyte.h000066400000000000000000000022601207233610700231640ustar00rootroot00000000000000#ifndef _NWBYTE_H #define _NWBYTE_H_ #if !defined(PC) // if we're not on a pc, assume little endian for now #define __LITTLE_ENDIAN 1234 #define __BYTE_ORDER __LITTLE_ENDIAN #endif /* define normal network byte-orders routines */ #if defined(PC) // use library versions if on linux #include #else #if __BYTE_ORDER == __LITTLE_ENDIAN // otherwise have to provide our own #ifndef WITH_OSHAN #define ntohs(X) (((((uint16_t)(X)) >> 8) | ((uint16_t)(X) << 8)) & 0xffff) #define htons(X) (((((uint16_t)(X)) << 8) | ((uint16_t)(X) >> 8)) & 0xffff) /* this is much more efficient since gcc can insert swpb now. */ /* moved to utility.c */ uint32_t ntohl(uint32_t i); #define htonl(X) ntohl(X) #else #include #endif #else #error "No byte-order conversions defined!" #endif #endif /* little-endian conversion routines */ #if __BYTE_ORDER == __LITTLE_ENDIAN #define leton16(X) htons(X) #ifndef htole16 #define htole16(X) (X) #endif #define letohs(X) (X) #else // assume big-endian byte-order #define leton16(X) (((((uint16_t)(X)) << 8) | ((uint16_t)(X) >> 8)) & 0xffff) #define htole16(X) (((((uint16_t)(X)) << 8) | ((uint16_t)(X) >> 8)) & 0xffff) #endif #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/000077500000000000000000000000001207233610700226455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/Makefile000066400000000000000000000047341207233610700243150ustar00rootroot00000000000000 CFLAGS=-U__BLOCKS__ -DPC -DUNIT_TESTING -g -I../../../../../../tos/types -I.. -I../../ -DHAVE_CONFIG_H LIBSOURCE=../lib6lowpan.c ../lib6lowpan_4944.c ../lib6lowpan_frag.c \ ../iovec.c ../utility.c ../in_cksum.c LIB=../lib6lowpan.a LIB_CONTEXT=../lib6lowpan.a context.o TARGETS=test_bit_range_zero_p test_pack_tcfl test_pack_multicast test_pack_address \ test_unpack_tcfl test_unpack_address \ test_unpack_multicast test_unpack_ipnh test_unpack_udp test_pack_nhc_chain \ test_lowpan_frag_get test_inet_ntop6 test_ipnh_real_length test_iovec # test_lowpan_pack_headers all: $(TARGETS) check: ./run.sh clean: rm -f $(TARGETS) *.o distclean: clean test_bit_range_zero_p: test_bit_range_zero_p.c $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_pack_tcfl: test_pack_tcfl.c $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_pack_multicast: test_pack_multicast.c $(LIB_CONTEXT) test_pack_address: test_pack_address.c $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_lowpan_pack_headers: test_lowpan_pack_headers.c $(LIB) $(CC) -o $@ $(CFLAGS) $< $(LIB) -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT test_unpack_tcfl: test_unpack_tcfl.c $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_unpack_address: test_unpack_address.c $(LIB) $(CC) -o $@ $(CFLAGS) $< $(LIB) -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT test_unpack_multicast: test_unpack_multicast.c $(LIB) $(CC) -o $@ $(CFLAGS) $< $(LIB) -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT test_unpack_ipnh: test_unpack_ipnh.c $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_unpack_udp: test_unpack_udp.c $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_pack_nhc_chain: test_pack_nhc_chain.c $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_lowpan_frag_get: test_lowpan_frag_get.o $(LIB) $(CC) -o $@ $(CFLAGS) $< $(LIB) -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT test_in_cksum: test_in_cksum.o $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_lowpan_recon_start: test_lowpan_recon_start.o $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_lowpan_unpack_headers: test_lowpan_unpack_headers.o $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_inet_ntop6: test_inet_ntop6.o $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_ipnh_real_length: test_ipnh_real_length.o $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) test_iovec: test_iovec.o $(LIB_CONTEXT) $(CC) -o $@ $(CFLAGS) $< $(LIB_CONTEXT) .c.o: $(CC) -c -o $@ $< $(CFLAGS) tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/context.c000066400000000000000000000002761207233610700245020ustar00rootroot00000000000000 #include "ip.h" int lowpan_extern_read_context(struct in6_addr *addr, int context) { return 0; } int lowpan_extern_match_context(struct in6_addr *addr, uint8_t *ctx_id) { return 0; } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/run.sh000077500000000000000000000006251207233610700240130ustar00rootroot00000000000000#!/bin/sh TESTS="test_bit_range_zero_p test_pack_tcfl test_pack_multicast test_pack_address \ test_unpack_tcfl test_unpack_address \ test_unpack_multicast test_unpack_ipnh test_unpack_udp test_pack_nhc_chain \ test_inet_ntop6 test_ipnh_real_length test_iovec " # test_lowpan_frag_get" test_lowpan_pack_headers for T in $(echo $TESTS); do ./$T | grep -a tests done exit 0tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_bit_range_zero_p.c000066400000000000000000000024341207233610700273630ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" int bit_range_zero_p(uint8_t *buf, int start, int end); struct { int start; int end; int len; uint8_t data[32]; int result; } test_cases[] = { {0, 1, 1, {0x0}, 0}, {0, 8, 1, {0x0}, 0}, {0, 8, 1, {0x1}, -1}, {0, 1, 1, {0x1}, 0}, {0, 1, 1, {0xff}, -1}, {7, 8, 2, {0x1, 0x0}, -1}, {7, 15, 2, {0x1, 0x0}, -1}, {7, 15, 2, {0x0, 0x1}, 0}, {7, 15, 2, {0x1, 0x1}, -1}, {8, 24, 4, {0x1, 0x0, 0, 0x8}, 0}, {8, 25, 4, {0x1, 0x0, 1, 0x8}, -1}, {7, 25, 4, {0x1, 0x0, 0, 0x8}, -1}, {8, 24, 4, {0xff, 0, 0, 0xff}, 0}, {16, 120, 16, {0xff, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01}, 0} }; int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { int rc; rc = bit_range_zero_p(test_cases[i].data, test_cases[i].start, test_cases[i].end); printf("result: %i(%i)\n", rc, test_cases[i].result); if (rc == test_cases[i].result) success++; total++; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_inet_ntop6.c000066400000000000000000000023451207233610700261410ustar00rootroot00000000000000 #include "ip.h" uint8_t buf[128]; struct { char * astr; struct in6_addr addr; } cases[] = { {"fe80::1", {{0xfe, 0x80, 0,0,0,0,0,0,0,0,0,0,0,0,0,1}}}, {"fe80:102:304:506:708:90a:b0c:d0e", {{0xfe, 0x80, 1,2,3,4,5,6,7,8,9,10,11,12,13,14}}}, }; struct in6_addr unpack_addr; int main() { int tests = 0, failures = 0; int i; int write_len; struct in6_addr backwards; for (i = 0; i < sizeof(cases) / sizeof(cases[0]); i++) { write_len = inet_ntop6(&cases[i].addr, buf, sizeof(buf)); printf("%i %s\n", write_len, buf); tests++; if (strcmp(buf, cases[i].astr) != 0) { failures++; } /* round-trip test */ tests++; inet_pton6(buf, &unpack_addr); if (memcmp(unpack_addr.s6_addr, cases[i].addr.s6_addr, 16)) { print_buffer(unpack_addr.s6_addr, 16); print_buffer(cases[i].addr.s6_addr, 16); failures++; } buf[5] = 0xde; buf[6] = 0xad; tests++; write_len = inet_ntop6(&cases[i].addr, buf, 5); if (write_len >= 5 || buf[5] != 0xde || buf[6] != 0xad) { printf("write len: %i %i\n", write_len, (write_len >= 5)); print_buffer(buf, 10); failures ++; } } printf("%s: %i/%i tests succeeded\n", __FILE__, (tests - failures), tests); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_iovec.c000066400000000000000000000033041207233610700251550ustar00rootroot00000000000000#include #include #ifdef UNIT_TESTING #include #endif #include "lib6lowpan.h" #include "iovec.h" /* test some different write patters testing overlap and boundary conditions */ struct test_case { int offset, len; } test_cases[] = { {5, 5}, {5, 10}, {9, 1}, {10, 1}, {25, 10}, {25, 25}, }; int main() { int total = 0, successes = 0; /* test 1: */ struct ip_iovec v[10]; uint8_t buf[1500], orig[1500], zeroes[1500]; int i; printf("starting spread write test\n"); scribble(buf, sizeof(buf)); memcpy(orig, buf, sizeof(buf)); memset(zeroes, 0, sizeof(zeroes)); for(i = 0; i < 10; i++) { v[i].iov_len = 10; v[i].iov_base = &buf[i*10]; if (i < 9) v[i].iov_next = &v[i+1]; else v[i].iov_next = NULL; } iov_print(v); for (i = 0; i < sizeof(test_cases) / sizeof(test_cases[0]); i++) { int rv; printf("iov_write: test %i offset: %i length: %i\n", i + 1, test_cases[i].offset, test_cases[i].len); total++; rv = iov_update(v, test_cases[i].offset, test_cases[i].len, zeroes); if (rv = test_cases[i].len && memcmp(buf, orig, test_cases[i].offset) == 0 && memcmp(buf+test_cases[i].offset, zeroes+test_cases[i].offset, test_cases[i].len) == 0 && memcmp(buf+test_cases[i].offset+test_cases[i].len, orig+test_cases[i].offset+test_cases[i].len, 100 - test_cases[i].offset -test_cases[i].len) == 0) { printf("test: success\n"); successes ++; } iov_print(v); memcpy(buf, orig, sizeof(buf)); printf("\n\n"); } printf("%s: %i/%i tests succeeded\n", __FILE__, successes, total); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_ipnh_real_length.c000066400000000000000000000052051207233610700273540ustar00rootroot00000000000000#include #include #ifdef UNIT_TESTING #include #endif #include "6lowpan.h" #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" struct { uint8_t hdr[128]; } ip_hdrs[] = { {IPV6_DEST, 8, 0,1,2,3,4,5}, {IANA_UDP, 10, 0,1,2,3,4,5,6,7}, }; struct udp_hdr udp = {0xabcd, 0x1234, 512, 0xdead}; uint8_t buf[512]; struct ip_iovec vec[1]; struct ip6_ext *ext; struct tlv_hdr *tlv; int main() { int success = 0, total = 0; uint8_t rv; ext = (struct ip6_ext *)buf; vec->iov_base = buf; vec->iov_len = 512; /* test 1 */ { total ++; printf("starting test 1\n"); ext->ip6e_len = 0; ext->ip6e_nxt = 0; rv = __ipnh_real_length(IPV6_ROUTING, vec, 0); if (rv == 8) success ++; else fprintf(stderr,"FAIL: test 1: %i\n", rv); } /* test 2 */ { /* HBH header with all pad 1 options */ total ++; printf("starting test 2\n"); memset(buf, 0, 8); /* len = 0 nxt = 0 6x pad1 options */ rv = __ipnh_real_length(IPV6_HOP, vec, 0); if (rv == 2) { success ++; } else { printf("FAIL: test 2: %i\n", rv); } } /* test 3 */ { total++; printf("starting test 3\n"); memset(buf, 0, 8); tlv = ext + 1; tlv->type = IPV6_TLV_PADN; tlv->len = 4; rv = __ipnh_real_length(IPV6_HOP, vec, 0); if (rv == 2) success ++; else fprintf(stderr, "FAIL: test 3: %i\n", rv); } /* test 4 */ { /* one TLV encoded payload with length 4 */ total++; printf("starting test 4\n"); memset(buf, 0, 8); tlv = ext + 1; tlv->type = 47; tlv->len = 4; rv = __ipnh_real_length(IPV6_HOP, vec, 0); if (rv == 8) success ++; else { fprintf(stderr, "FAIL: test 4: %i\n", rv); } } { /* one TLV encoded payload with length 11 + Pad1 */ total++; printf("starting test 5\n"); memset(buf, 0, 16); ext->ip6e_len = 1; tlv = ext + 1; tlv->type = 47; tlv->len = 11; rv = __ipnh_real_length(IPV6_HOP, vec, 0); if (rv == 15) success ++; else { fprintf(stderr, "FAIL: test 5: %i\n", rv); } } { /* one TLV encoded payload with length 11 + Pad1 + tlv length 8*/ total++; printf("starting test 6\n"); memset(buf, 0, 24); ext->ip6e_len = 2; tlv = ext + 1; tlv->type = 47; tlv->len = 11; tlv = &buf[16]; tlv->type = 48; tlv->len = 6; rv = __ipnh_real_length(IPV6_HOP, vec, 0); if (rv == 24) success ++; else { fprintf(stderr, "FAIL: test 5: %i\n", rv); } } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_frag_get.c000066400000000000000000000111601207233610700272050ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" #include "iovec.h" uint8_t ctx[8] = {0x20, 0x02,1,2,3,4,5,6}; int lowpan_extern_read_context(struct in6_addr *addr, int context) { memcpy(addr, ctx, 8); return 64; } int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) { if (memcmp(addr, ctx, 8) == 0) { printf("CONTEXT MATCH!\n"); return 64; } else { return 0; } } struct test_case { uint8_t tc; uint32_t fl; uint8_t nxt; uint8_t hlim; char *ip6_src; char *ip6_dst; char *l2src, *l2dst; ieee154_panid_t panid; /* the result of executing the test case */ int result_len; uint8_t result[64]; }; struct test_case cases[] = { {0, 0, IANA_UDP, 66, "fe80::1", "ff02::1", "1", "aa:00:11:22:33:44:55:66:", 0xabcd, 0, {}}, {1, 0, IANA_UDP, 100, "fe80::1", "fe80::2", "1", "65535", 10, 0, {}}, {0, 0, IANA_UDP, 100, "fe80::aa00:1122:3344:5566", "ff02::ab", "aa:00:11:22:33:44:55:66:", "0xab", 10, 0, {}}, {0, 0, IANA_UDP, 100, "2002:102:304:506:aa00:1122:3344:5566", "ff02::12:4567:abcd", "aa:00:11:22:33:44:55:66:", "0xab", 10, 0, {}}, }; uint8_t data[12] = {1,2,3,4,5,6,7,8,9,10,11,12}; int check_test(struct ip6_packet *pkt, struct lowpan_reconstruct *recon) { char buf[2048]; memset(buf, 0, 2048); memcpy(buf, &pkt->ip6_hdr, sizeof(struct ip6_hdr)); iov_read(pkt->ip6_data, 0, iov_len(pkt->ip6_data), &buf[sizeof(struct ip6_hdr)]); // printf("CMP: %i", memcmp(buf, recon->r_buf, recon->r_bytes_rcvd)); print_buffer(buf, 50); print_buffer(recon->r_buf, 50); printf("CMP: %i\n", memcmp(buf, recon->r_buf, 50)); } void setup_test(struct test_case *cse, struct ip6_hdr *hdr, struct ieee154_frame_addr *frame, struct ip_iovec *v) { uint32_t val; printf("packet length: %i, %p\n", iov_len(v), v); val = htonl(0x6 << 28 | ((cse->tc & 0xff) << 20) | (cse->fl & 0x000fffff)); hdr->ip6_flow = val; hdr->ip6_nxt = cse->nxt; hdr->ip6_plen = htons(iov_len(v)); hdr->ip6_hlim = cse->hlim; inet_pton6(cse->ip6_src, &hdr->ip6_src); inet_pton6(cse->ip6_dst, &hdr->ip6_dst); memset(frame, 0, sizeof(frame)); ieee154_parse(cse->l2src, &frame->ieee_src); ieee154_parse(cse->l2dst, &frame->ieee_dst); frame->ieee_dstpan = htole16(cse->panid); } int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(cases) / sizeof(cases[0])); i++) { uint8_t buf[128], *rp, unpack[512], more_data[1500]; struct ip6_packet packet; struct ieee154_frame_addr fr, result_fr; struct lowpan_reconstruct recon; struct lowpan_ctx ctx; struct ip_iovec v[2]; int rv; memset(buf, 0, sizeof(buf)); total++; printf("\n\n----- Test case %i ----\n", i+1); packet.ip6_data = &v[0]; v[0].iov_next = &v[1]; v[0].iov_base= data; v[0].iov_len = 12; for (rv = 0; rv < sizeof(more_data); rv++) more_data[rv] = rv; v[1].iov_next = NULL; v[1].iov_base= more_data; v[1].iov_len = 1500; // print_buffer(more_data, 1500); setup_test(&cases[i], &packet.ip6_hdr, &fr, &v[0]); printf("IEEE 802.15.4 frame: "); print_buffer(&fr, sizeof(struct ieee154_frame_addr)); printf("\n"); printf("IPv6 Header:\n"); print_buffer(&packet.ip6_hdr, sizeof(struct ip6_hdr)); printf("\n"); printf("Data:\n"); print_buffer(data, 12); printf("\n"); printf("plen: %i\n", ntohs(packet.ip6_hdr.ip6_plen)); ctx.offset = 0; ctx.tag = 25; recon.r_buf = NULL; /* how you fragment a packet */ while ((rv = lowpan_frag_get(buf, sizeof(buf), &packet, &fr, &ctx)) > 0) { // print_buffer(buf, rv); /* how you unfragment a packet */ rp = unpack_ieee154_hdr(buf, &result_fr); printf("unpacked ieee154_header: %p-%p\n", buf, rp); // print_buffer(&result_fr, sizeof(result_fr)); if (recon.r_buf == NULL) { lowpan_recon_start(&result_fr, &recon, rp, rv - (rp - buf)); } else { lowpan_recon_add(&recon, rp, rv - (rp - buf)); } memset(buf, 0, sizeof(buf)); } printf("recon progress: %i %i\n", recon.r_bytes_rcvd, recon.r_size); print_buffer(recon.r_buf, recon.r_bytes_rcvd); if (recon.r_bytes_rcvd == recon.r_size) { if (check_test(&packet, &recon) == 0) { success++; } } free(recon.r_buf); recon.r_buf = NULL; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_pack_headers.c000066400000000000000000000054131207233610700300440ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" uint8_t ctx[8] = {0x20, 0x02,1,2,3,4,5,6}; int lowpan_extern_read_context(struct in6_addr *addr, int context) { memcpy(addr, ctx, 8); return 64; } int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) { if (memcmp(addr, ctx, 8) == 0) { printf("CONTEXT MATCH!\n"); return 64; } else { return 0; } } struct test_case { uint8_t tc; uint32_t fl; uint8_t nxt; uint8_t hlim; char *ip6_src; char *ip6_dst; char *l2src, *l2dst; ieee154_panid_t panid; /* the result of executing the test case */ int result_len; uint8_t result[64]; }; struct test_case cases[] = { {0, 0, 12, 100, "fe80::1", "ff02::1", "1", "65535", 10, 0, {}}, {1, 0, 12, 100, "fe80::1", "fe80::2", "1", "65535", 10, 0, {}}, {0, 0, 12, 100, "fe80::aa00:1122:3344:5566", "ff02::ab", "aa:00:11:22:33:44:55:66:", "0xab", 10, 0, {}}, {0, 0, 12, 100, "2002:102:304:506:aa00:1122:3344:5566", "ff02::12:4567:abcd", "aa:00:11:22:33:44:55:66:", "0xab", 10, 0, {}}, }; void setup_test(struct test_case *cse, struct ip6_hdr *hdr, struct ieee154_frame_addr *frame) { uint32_t val; val = htonl(0x6 << 28 | ((cse->tc & 0xff) << 20) | (cse->fl & 0x000fffff)); hdr->ip6_flow = val; hdr->ip6_nxt = cse->nxt; hdr->ip6_plen = 0; hdr->ip6_hlim = cse->hlim; inet_pton6(cse->ip6_src, &hdr->ip6_src); inet_pton6(cse->ip6_dst, &hdr->ip6_dst); memset(frame, 0, sizeof(frame)); ieee154_parse(cse->l2src, &frame->ieee_src); ieee154_parse(cse->l2dst, &frame->ieee_dst); frame->ieee_dstpan = htole16(cse->panid); } int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(cases) / sizeof(cases[0])); i++) { uint8_t buf[512], *rp, unpack[512]; struct ip6_packet packet; struct ieee154_frame_addr fr; memset(buf, 0, 512); total++; printf("\n\n----- Test case %i ----\n", i+1); setup_test(&cases[i], &packet.ip6_hdr, &fr); printf("IEEE 802.15.4 frame: "); print_buffer(&fr, sizeof(struct ieee154_frame_addr)); printf("\n"); printf("IPv6 Header:\n"); print_buffer(&packet.ip6_hdr, sizeof(struct ip6_hdr)); printf("\n"); rp = lowpan_pack_headers(&packet, &fr, buf, 512); printf("Packed result:\n"); print_buffer(buf, rp - buf); rp = lowpan_unpack_headers(unpack, sizeof(unpack), &fr, buf, rp - buf); printf("Unpacked result:\n"); print_buffer(unpack, 40); if (memcmp(unpack, &packet.ip6_hdr, 40) == 0) success++; else printf("FAIL\n"); } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_unpack_headers.c000066400000000000000000000036011207233610700304040ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" #include "iovec.h" int packet_len; uint8_t packet[1280]; struct { char *file; } cases[] = { {"packet4.test"}, }; int parse_packet(char *file) { char buf[127], *pos = buf; uint8_t *packet_cur = packet; FILE *fp = fopen(file, "r"); if (!fp) return -1; while (!feof(fp)) { while (!feof(fp) && isspace(*pos = fgetc(fp))); pos++; while (!feof(fp) && !isspace((*pos++ = fgetc(fp)))); *(pos-1) = '\0'; if (pos > buf + 1) *packet_cur++ = (uint8_t) strtol(buf, NULL, 16); pos = buf; } packet_len = (packet_cur - packet); return 0; } int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(cases) / sizeof(cases[0])); i++) { struct packed_lowmsg lowmsg; struct lowpan_reconstruct recon; struct ieee154_frame_addr frame_address; uint8_t *buf = packet, *frame = packet; int length; int rv; parse_packet(cases[i].file); length = packet_len; print_buffer(packet, packet_len); buf = unpack_ieee154_hdr(buf, &frame_address); length -= buf - frame; lowmsg.data = buf; lowmsg.len = length; lowmsg.headers = getHeaderBitmap(&lowmsg); if (lowmsg.headers == LOWMSG_NALP) { warn("lowmsg NALP!\n"); continue; } buf = getLowpanPayload(&lowmsg); if ((rv = lowpan_recon_start(&frame_address, &recon, buf, length)) < 0) { warn("reconstruction failed!\n"); continue; } if (recon.r_size == recon.r_bytes_rcvd) { printf("recon successful\n"); print_buffer(recon.r_buf, recon.r_size); } else { free(recon.r_buf); } } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 0; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_pack_address.c000066400000000000000000000103741207233610700265000ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" char *pack_address(uint8_t *buf, struct in6_addr *addr, int context_match_len, ieee154_addr_t *l2addr, ieee154_panid_t pan, uint8_t *flags); struct { char *in6_addr; int context_match_len; char *l2addr; ieee154_panid_t panid; /* the result of executing the test case */ int result_len; uint8_t result[32]; uint8_t result_rv; } test_cases[] = { // test the link-local address packing // non-RFC4944 address, never packed to less then 16 bits {"fe80::1", 0, "25", 0, 2, {0, 1}, LOWPAN_IPHC_AM_16}, // LL address padded with zeroes, matching L2 address. Not // compressed to zero because not RFC4944 style address {"fe80::1", 0, "1", 0, 2, {0, 1}, LOWPAN_IPHC_AM_16}, // RFC4944 address, matching 16-bit id {"fe80::1:00ff:fe00:1", 0, "1", 1, 0, {0, 0}, LOWPAN_IPHC_AM_0}, // RFC4944 address, matching 16-bit id {"fe80::fdff:00ff:fe00:1", 0, "1", 0xffff, 0, {0, 0}, LOWPAN_IPHC_AM_0}, // RFC4944 address, different 16-bit ID {"fe80::1:00ff:fe00:2", 0, "1", 8, 8, {0, 1, 0, 0xff, 0xfe, 0x0, 0, 02}, LOWPAN_IPHC_AM_64}, // matching with the L2 addr {"fe80::aabb:ccdd:eeff:0011", 0, "a8:bb:cc:dd:ee:ff:00:11", 8, 0, {}, LOWPAN_IPHC_AM_0}, // matching 64-bit L2 addr, but prefix isn't all zero {"fe80::1:aabb:ccdd:eeff:0011", 0, "aa:bb:cc:dd:ee:ff:00:11", 8, 16, {0xfe, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff, 0x00, 0x11} , LOWPAN_IPHC_AM_128}, {"fe80::226:bbff:fe11:478b", 0, "00:26:bb:ff:fe:11:47:8c", 0, 8, {0x2, 0x26, 0xbb, 0xff, 0xfe, 0x11, 0x47, 0x8b}, LOWPAN_IPHC_AM_64}, // unspecified address {"::", 0, "12", 0, 0, {}, LOWPAN_IPHC_AM_128 | LOWPAN_IPHC_AC_CONTEXT}, // context-based address compression // 64-bit prefix, short id {"2002::1", 64, "12", 1, 2, {0, 1}, LOWPAN_IPHC_AM_16 | LOWPAN_IPHC_AC_CONTEXT}, {"2002::1:1", 64, "12", 1, 8, {0, 0,0,0,0,1,0,1}, LOWPAN_IPHC_AM_64 | LOWPAN_IPHC_AC_CONTEXT}, {"2002::1:1", 112, "12", 1, 2, {0,1}, LOWPAN_IPHC_AM_16 | LOWPAN_IPHC_AC_CONTEXT}, {"2002:1::1:1", 8, "12", 1, 16, {0x20, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01}, LOWPAN_IPHC_AM_128}, {"2002::1:1", 128, "12", 1, 0, {0}, LOWPAN_IPHC_AM_0 | LOWPAN_IPHC_AC_CONTEXT}, // global addresses, derived from L2. // contiki packs this to zero bytes using the L2 info; however hc-06 // is a little vague on this point so I don't do this. We will win fact // decompress that right now. {"2002::226:bbff:fe11:478b", 64, "00:26:bb:ff:fe:11:47:8b", 1, 8, {0x2, 0x26, 0xbb, 0xff, 0xfe, 0x11, 0x47, 0x8b}, LOWPAN_IPHC_AM_64 | LOWPAN_IPHC_AC_CONTEXT}, }; int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { uint8_t flags; struct in6_addr addr; uint8_t buf[512], *rv; ieee154_addr_t l2addr; total++; inet_pton6(test_cases[i].in6_addr, &addr); ieee154_parse(test_cases[i].l2addr, &l2addr); ieee154_print(&l2addr, buf, 512); printf("%s\n", buf); printf("in6_addr: %s\n", test_cases[i].in6_addr); rv = pack_address(buf, &addr, test_cases[i].context_match_len, &l2addr, test_cases[i].panid, &flags); printf("flags: 0x%x(0x%x) len: %li\n", flags, test_cases[i].result_rv, rv - buf ); print_buffer(buf, rv - buf); if (test_cases[i].result_len != (rv - buf)) { printf("case %u: result len failed expected: %i got: %li\n", i, test_cases[i].result_len, (rv - buf)); continue; } if (test_cases[i].result_rv != flags) { printf("case %u: desired rv: 0x%x flags: %x\n", i, test_cases[i].result_rv, flags); continue; } if (memcmp(test_cases[i].result, buf, test_cases[i].result_len) != 0) { printf("case %u: buffers did not match\n", i); print_buffer(test_cases[i].result, test_cases[i].result_len); print_buffer(buf, test_cases[i].result_len); continue; } success++; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_pack_multicast.c000066400000000000000000000032441207233610700270560ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" char *pack_multicast(char *buf, struct in6_addr *addr, uint8_t *flags); struct { char *addr; /* the result of executing the test case */ int result_len; uint8_t result[16]; int result_dispatch; } test_cases[] = { {"ff02::1", 1, {1}, LOWPAN_IPHC_AM_M_8}, {"ff02::1:1111", 4, {0x02, 0x1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_32}, {"fff2::1:1111", 4, {0xf2, 0x1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_32}, {"fff2::1:fff1:1111", 6, {0xf2, 0x1, 0xff, 0xf1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_48}, {"fff2::1:fff1:1111", 6, {0xf2, 0x1, 0xff, 0xf1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_48}, {"fff2::f001:fff1:1111", 16, {0xff, 0xf2, 0,0,0,0,0,0,0,0, 0xf0, 0x1, 0xff, 0xf1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_128}, }; int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { uint8_t buf[512], *rb; struct in6_addr addr; uint8_t dispatch = 0; total ++; scribble(buf, 512); inet_pton6(test_cases[i].addr, &addr); printf("addr: %s\n", test_cases[i].addr); rb = pack_multicast(buf, &addr, &dispatch); print_buffer(buf, rb - buf); if (test_cases[i].result_len != (rb - buf)) continue; if (memcmp(test_cases[i].result, buf, rb - buf) != 0) continue; if (test_cases[i].result_dispatch != dispatch) continue; printf("SUCCESS!\n"); success++; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_pack_nhc_chain.c000066400000000000000000000020011207233610700267510ustar00rootroot00000000000000#include #include #ifdef UNIT_TESTING #include #endif #include "6lowpan.h" #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" struct { uint8_t hdr[128]; } ip_hdrs[] = { {IPV6_DEST, 8, 0,1,2,3,4,5}, {IANA_UDP, 10, 0,1,2,3,4,5,6,7}, }; struct udp_hdr udp = {0xabcd, 0x1234, 512, 0xdead}; struct ip6_packet packet; struct ip_iovec vec[3]; int main() { uint8_t nxt; uint8_t buf[512], result[512], *bufp; int i, len; bufp = buf; packet.ip6_hdr.ip6_nxt = IPV6_HOP; iov_prefix(NULL, &vec[2], (uint8_t *)&udp, 8); iov_prefix(&vec[2], &vec[1], ip_hdrs[1].hdr, 10); iov_prefix(&vec[1], &vec[0], ip_hdrs[0].hdr, 8); packet.ip6_data = vec; len = pack_nhc_chain(&bufp, 512, &packet); printf("[%i] ", len); for (i = 0; i < len; i++) { printf("0x%hhx ", buf[i]); } printf("\n\n"); unpack_nhc_chain(result, 512, &nxt, buf); for (i = 0; i < 26; i++) printf("0x%hhx ", result[i]); printf("\n"); printf("Done!\n"); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_pack_tcfl.c000066400000000000000000000041461207233610700260030ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" char *pack_tcfl(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch) ; struct { uint8_t tc; uint32_t fl; /* the result of executing the test case */ int result_len; uint8_t result[4]; int result_dispatch; } test_cases[] = { // no nothing {0, 0, 0, {}, LOWPAN_IPHC_TF_NONE}, // one ecn bit {0x1, 0, 1, {0x40}, LOWPAN_IPHC_TF_ECN_DSCP}, // both ecn bits {0x3, 0, 1, {0xc0}, LOWPAN_IPHC_TF_ECN_DSCP}, // just DSCP {0xfc, 0, 1, {0x3f}, LOWPAN_IPHC_TF_ECN_DSCP}, // flow label of one {0, 1, 3, {0, 0, 1}, LOWPAN_IPHC_TF_ECN_FL}, // flow label + ECN tests {0, 0xfffff, 3, {0xf, 0xff, 0xff}, LOWPAN_IPHC_TF_ECN_FL}, {3, 0xfffff, 3, {0xcf, 0xff, 0xff}, LOWPAN_IPHC_TF_ECN_FL}, {1, 0xabcde, 3, {0x4a, 0xbc, 0xde}, LOWPAN_IPHC_TF_ECN_FL}, // full thingie {0x4, 0x1, 4, {0x01, 0, 0, 1}, LOWPAN_IPHC_TF_ECN_DSCP_FL}, {0x5, 0x1, 4, {0x41, 0, 0, 1}, LOWPAN_IPHC_TF_ECN_DSCP_FL}, {0xab, 0xcdef6, 4, {0xea, 0xc, 0xde, 0xf6}, LOWPAN_IPHC_TF_ECN_DSCP_FL}, }; int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { uint8_t buf[512], *rb; struct ip6_hdr hdr; uint8_t dispatch = 0; uint32_t val; total ++; scribble(buf, 512); val = htonl(0x6 << 28 | ((test_cases[i].tc & 0xff) << 20) | (test_cases[i].fl & 0x000fffff)); hdr.ip6_flow = val; printf("input: 0x%x\n", ntohl(val)); rb = pack_tcfl(buf, &hdr, &dispatch); printf("output length: %li dispatch: 0x%x\n", (rb -buf), dispatch); print_buffer(buf, rb - buf); if (test_cases[i].result_len != (rb - buf)) continue; if (memcmp(test_cases[i].result, buf, rb - buf) != 0) continue; if (test_cases[i].result_dispatch != dispatch) continue; printf("SUCCESS!\n"); success++; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_unpack_address.c000066400000000000000000000070721207233610700270440ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" uint8_t *unpack_address(struct in6_addr *addr, uint8_t dispatch, int context, uint8_t *buf, ieee154_addr_t *frame, ieee154_panid_t pan); struct { char *prefix; uint8_t pfx_len; } prefix_options[] = { {"2002::", 64}, {"2002:1:2:3:4:5:6:7", 128}, }; int lowpan_extern_read_context(struct in6_addr *addr, int context) { struct in6_addr ctx; printf("read context: %i (%i)\n", context, prefix_options[context].pfx_len); inet_pton6(prefix_options[context].prefix, &ctx); print_buffer(ctx.s6_addr, 16); memcpy(addr->s6_addr, ctx.s6_addr, prefix_options[context].pfx_len / 8); return prefix_options[context].pfx_len; } int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) { } struct { char *address; int dispatch; int context; int len; char buf[32]; char *l2addr; ieee154_panid_t panid; } test_cases[] = { // context-free tests {"fe80::1", LOWPAN_IPHC_AM_16, 0, 2, {0, 1}, "1", 1}, {"fe80::ffff", LOWPAN_IPHC_AM_16, 0, 2, {0xff, 0xff}, "1", 1}, {"fe80::abde:f012", LOWPAN_IPHC_AM_64, 0, 8, {0, 0, 0, 0, 0xab, 0xde, 0xf0, 0x12}, "1", 1}, {"fe80::1234:8765:abde:f012", LOWPAN_IPHC_AM_64, 0, 8, {0x12, 0x34, 0x87, 0x65, 0xab, 0xde, 0xf0, 0x12}, "1", 1}, {"fe80:1234:8765:abde:1234:8765:abde:f012", LOWPAN_IPHC_AM_128, 0, 16, {0xfe, 0x80, 0x12, 0x34, 0x87, 0x65, 0xab, 0xde, 0x12, 0x34, 0x87, 0x65, 0xab, 0xde, 0xf0, 0x12}, "1", 1}, // derived from the MAC address {"fe80::1234:8765:abde:f012", LOWPAN_IPHC_AM_0, 0, 0, {}, "10:34:87:65:ab:de:f0:12", 1}, // RFC4944-style addresses {"fe80::1:00ff:fe00:25", LOWPAN_IPHC_AM_0, 0, 0, {}, "25", 1}, {"fe80::fdff:00ff:fe00:25", LOWPAN_IPHC_AM_0, 0, 0, {}, "25", 0xffff}, {"fe80::fdff:00ff:fe00:abcd", LOWPAN_IPHC_AM_0, 0, 0, {}, "abcd", 0xffff}, // tests using context {"2002::12", LOWPAN_IPHC_AC_CONTEXT | LOWPAN_IPHC_AM_16, 0, 2, {0, 0x12}, "1", 1}, {"2002:1:2:3:4:5:6:7", LOWPAN_IPHC_AC_CONTEXT | LOWPAN_IPHC_AM_0, 1, 0, {}, "1", 1}, {"2002::4:5:6:7", LOWPAN_IPHC_AC_CONTEXT | LOWPAN_IPHC_AM_64, 0, 8, {0,4,0,5,0,6,0,7}, "1", 1}, {"::", LOWPAN_IPHC_AC_CONTEXT | LOWPAN_IPHC_AM_128, 0, 0, {}, "1", 1}, }; int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { struct in6_addr addr, correct; uint8_t buf[512]; char *rv; ieee154_addr_t l2addr; total++; inet_pton6(test_cases[i].address, &correct); ieee154_parse(test_cases[i].l2addr, &l2addr); ieee154_print(&l2addr, buf, 512); printf("%s\n", buf); printf("in6_addr: %s\n", test_cases[i].address); rv = unpack_address(&addr, test_cases[i].dispatch, test_cases[i].context, test_cases[i].buf, &l2addr, test_cases[i].panid); inet_ntop6(&addr, buf, 512); printf("result: %s length: %li\n", buf, rv - test_cases[i].buf); if (test_cases[i].len != rv - test_cases[i].buf) { printf("case %u: result len: %li expected: %i\n", i, rv - test_cases[i].buf, test_cases[i].len); continue; } if (memcmp(&addr, &correct, 16) != 0) { printf("case %u: unexpected result\n", i); print_buffer(correct.s6_addr, 16); print_buffer(addr.s6_addr, 16); continue; } success++; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_unpack_ipnh.c000066400000000000000000000045721207233610700263570ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" #include "internal.h" struct { uint8_t nxt_hdr; uint16_t unpacked_length; int pack_len; uint8_t pack[2]; int data_length; } test_cases[] = { {IPV6_HOP, 0, 1, {LOWPAN_NHC_IPV6_PATTERN | LOWPAN_NHC_EID_HOP | LOWPAN_NHC_NH}, 8}, {IPV6_MOBILITY, 1, 1, {LOWPAN_NHC_IPV6_PATTERN | LOWPAN_NHC_EID_MOBILE | LOWPAN_NHC_NH}, 13}, {IPV6_IPV6, 14, 1, {LOWPAN_NHC_IPV6_PATTERN | LOWPAN_NHC_EID_IPV6 | LOWPAN_NHC_NH}, 120}, {IPV6_IPV6, 1, 2, {LOWPAN_NHC_IPV6_PATTERN | LOWPAN_NHC_EID_IPV6, IANA_UDP}, 12}, }; int run_tests() { int i, j; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { uint8_t nxt_hdr; uint8_t buf[512], result[512]; uint8_t *rv, *pack; total++; memset(buf, 0, 512); /* this fills in pad1 options for any weird sized options */ memcpy(buf, test_cases[i].pack, test_cases[i].pack_len); pack = buf + test_cases[i].pack_len; *pack++ = test_cases[i].data_length; for (j = 12; j < 12 + test_cases[i].data_length - 2; j++) *pack++ = j; printf("INPUT: "); for (j = 0; j < test_cases[i].data_length; j++) printf("0x%x ", buf[j]); printf("\n"); rv = unpack_ipnh(result, sizeof(result), &nxt_hdr, buf); printf("ip6_ext nxt: %i length: %i\n", nxt_hdr, result[1]); for (j = 0; j < (result[1] +1)*8; j++) { printf("0x%x ", result[j]); } printf("\n"); // printf("%i:\n", test_cases[i].unpacked_length); if (test_cases[i].unpacked_length != result[1]) { printf("ERROR: wrong length: %i %i\n", test_cases[i].unpacked_length, result[1]); continue; } if (test_cases[i].nxt_hdr != nxt_hdr) { printf("ERROR: wrong next header: %i %i\n", test_cases[i].nxt_hdr, nxt_hdr); continue; } if (test_cases[i].pack_len == 2 && result[0] != test_cases[i].pack[1]) { printf("ERROR: wrong inline NH\n"); continue; } for (j = 2; j < test_cases[i].data_length; j++) { if (result[j] != j + 10) { printf("ERROR: wrong payload\n"); break; } } success++; printf("\n\n\n"); } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_unpack_multicast.c000066400000000000000000000037451207233610700274270ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" uint8_t *unpack_multicast(struct in6_addr *addr, uint8_t dispatch, int context, uint8_t *buf); struct { char *prefix; uint8_t pfx_len; } prefix_options[] = { {"2002::", 64}, {"2002:1:2:3:4:5:6:7", 128}, }; int lowpan_extern_read_context(struct in6_addr *addr, int context) { struct in6_addr ctx; inet_pton6(prefix_options[context].prefix, &ctx); memcpy(addr->s6_addr, ctx.s6_addr, prefix_options[context].pfx_len / 8); } int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) { } struct { char *address; int dispatch; int context; int len; uint8_t buf[32]; } test_cases[] = { {"ff02::1", LOWPAN_IPHC_AM_M | LOWPAN_IPHC_AM_M_8, 0, 1, {1}}, {"ff18::ab:cdef:1234", LOWPAN_IPHC_AM_M | LOWPAN_IPHC_AM_M_48, 0, 6, {0x18, 0xab, 0xcd, 0xef, 0x12, 0x34}}, {"ffff::ef:1234", LOWPAN_IPHC_AM_M | LOWPAN_IPHC_AM_M_32, 0, 4, {0xff, 0xef, 0x12, 0x34}}, {"2002:1:2:3:4:5:6:7", LOWPAN_IPHC_AM_M | LOWPAN_IPHC_AM_M_128, 0, 16, {0x20, 0x02, 0,1,0,2,0,3,0,4,0,5,0,6,0,7}}, }; int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { struct in6_addr addr, correct; uint8_t buf[512]; uint8_t *rv; total++; inet_pton6(test_cases[i].address, &correct); printf("in6_addr: %s\n", test_cases[i].address); rv = unpack_multicast(&addr, test_cases[i].dispatch, test_cases[i].context, test_cases[i].buf); inet_ntop6(&addr, buf, 512); printf("result: %s length: %li\n", buf, rv - test_cases[i].buf); if (test_cases[i].len != rv - test_cases[i].buf) continue; if (memcmp(&addr, &correct, 16) != 0) continue; success++; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_unpack_tcfl.c000066400000000000000000000027561207233610700263530ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" uint8_t *unpack_tcfl(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf); struct { uint32_t result; /* the result of executing the test case */ uint8_t test_dispatch; int test_len; uint8_t test[4]; } test_cases[] = { {0x60000000, LOWPAN_IPHC_TF_NONE, 0, {}}, {0x60000000, LOWPAN_IPHC_TF_NONE | ~LOWPAN_IPHC_TF_MASK, 0, {}}, // ECN bit {0x60100000, LOWPAN_IPHC_TF_ECN_DSCP, 1, {0x40}}, // ecn and DSCP {0x6ab00000, LOWPAN_IPHC_TF_ECN_DSCP, 1, {0xea}}, // ECN + FL {0x60301234, LOWPAN_IPHC_TF_ECN_FL, 3, {0xc0, 0x12, 0x34}}, // full {0x6f012345, LOWPAN_IPHC_TF_ECN_DSCP_FL, 4, {0x3c, 0x01, 0x23, 0x45}}, }; int run_tests() { int i; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { struct ip6_hdr hdr; uint8_t *rb; total ++; rb = unpack_tcfl(&hdr, test_cases[i].test_dispatch, test_cases[i].test); printf("result: 0x%x correct: 0x%x\n", ntohl(hdr.ip6_flow), test_cases[i].result); printf("length: %li\n", rb - test_cases[i].test); if (test_cases[i].test_len != rb - test_cases[i].test) continue; if (test_cases[i].result != ntohl(hdr.ip6_flow)) continue; success ++; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/tests/test_unpack_udp.c000066400000000000000000000047731207233610700262140ustar00rootroot00000000000000 #include #include #include "Ieee154.h" #include "ip.h" #include "lib6lowpan.h" #include "nwbyte.h" #include "6lowpan.h" uint8_t *unpack_udp(uint8_t *dest, uint8_t *nxt_hdr, uint8_t *buf); struct { struct udp_hdr result; uint8_t pack_len; uint8_t pack[10]; } test_cases[] = { { {0xcdab, 0x3412, 0, 0}, 5, {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_CKSUM | LOWPAN_NHC_UDP_PORT_FULL, 0xab, 0xcd, 0x12, 0x34}}, { {0xcdab, 0x3412, 0, 0xdead}, 7, {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_PORT_FULL, 0xab, 0xcd, 0x12, 0x34, 0xad, 0xde}}, { {0xabcd, 0x12f0, 0, 0}, 4, {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_CKSUM | LOWPAN_NHC_UDP_PORT_SRC_FULL, 0xcd, 0xab, 0x12}}, { {0xabf0, 0x3412, 0, 0}, 4, {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_CKSUM | LOWPAN_NHC_UDP_PORT_DST_FULL, 0xab, 0x12, 0x34}}, { {0xbff0, 0xbaf0, 0, 0}, 2, {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_CKSUM | LOWPAN_NHC_UDP_PORT_SHORT, 0xfa}}, { {0xbff0, 0xbaf0, 0, 0xdead}, 4, {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_PORT_SHORT, 0xfa, 0xad, 0xde}}, { {0xabcd, 0x12f0, 0, 0xdead}, 6, {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_PORT_SRC_FULL, 0xcd, 0xab, 0x12, 0xad, 0xde}}, }; int run_tests() { int i, j; int success = 0, total = 0; for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) { uint8_t nxt_hdr = 0; uint8_t result[512]; uint8_t *rv; struct udp_hdr *udp = (struct udp_hdr *)result; total++; rv = unpack_udp(result, &nxt_hdr, test_cases[i].pack); if (test_cases[i].pack_len != rv - test_cases[i].pack) { printf("ERROR: wrong unpack length: %li %p %p\n", (rv - test_cases[i].pack), test_cases[i].pack, rv); continue; } if (test_cases[i].result.srcport != udp->srcport) { printf("ERROR: wrong srcport\n"); continue; } if (test_cases[i].result.dstport != udp->dstport) { printf("ERROR: wrong dstport\n"); continue; } if (test_cases[i].result.len != udp->len) { printf("ERROR: wrong length\n"); continue; } if (test_cases[i].result.chksum != udp->chksum) { printf("ERROR: wrong chksum: 0x%x 0x%x\n", test_cases[i].result.chksum, udp->chksum); continue; } if (nxt_hdr != IANA_UDP) { printf("ERROR: nxt_hdr should be UDP! was 0x%02x\n", nxt_hdr); continue; } success++; } printf("%s: %i/%i tests succeeded\n", __FILE__, success, total); if (success == total) return 0; return 1; } int main() { return run_tests(); } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/trace/000077500000000000000000000000001207233610700226015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/trace/Makefile.am000066400000000000000000000003161207233610700246350ustar00rootroot00000000000000 noinst_PROGRAMS=compress decompress CFLAGS += -I.. -I../.. -I../../../../../../tos/types -DPC compress_SOURCES=compress.c ../utility.c decompress_SOURCES=decompress.c ../utility.c LDADD=../lib6lowpan.a tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/trace/compress.c000066400000000000000000000065211207233610700246040ustar00rootroot00000000000000 #include #include #include #include "../lib6lowpan-includes.h" #include "../ieee154_header.h" #include "../lib6lowpan.h" #include "../ip_malloc.h" uint8_t *cur; uint8_t fragment[100]; int lowpan_extern_read_context(struct in6_addr *addr, int context) { memset(addr->s6_addr, 0, 0); addr->s6_addr16[0] = 0xaaaa; return 64; } int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) { return 0; } struct ip_iovec *iov_shorten(struct ip_iovec *v, int off) { int cur_off = 0; struct ip_iovec *rv = malloc(sizeof(struct ip_iovec)); while (v != NULL && cur_off + v->iov_len <= off) { cur_off += v->iov_len; v = v->iov_next; } if (v == NULL) return NULL; if (off == cur_off) return v; rv->iov_base = &((uint8_t *)v->iov_base)[off - cur_off]; rv->iov_len = v->iov_len - (off - cur_off); rv->iov_next = v->iov_next; return rv; } int main(int argc, char **argv) { struct ieee154_frame_addr frame_address; struct lowpan_reconstruct recon; struct lowpan_ctx ctx; struct ip6_packet pkt; char print_buf[256]; int idx = 0, rv; char c, val; struct ip_iovec *v, *tail; //memset(frame, 0, sizeof(frame)); ip_malloc_init(); /* read destination */ cur = print_buf; while ((c = getc(stdin)) != '\n') *cur++ = c; *cur++ = '\0'; ieee154_parse(print_buf, &frame_address.ieee_src); /* read source */ cur = print_buf; while ((c = getc(stdin)) != '\n') *cur++ = c; *cur++ = '\0'; ieee154_parse(print_buf, &frame_address.ieee_dst); frame_address.ieee_dstpan = 0x22; v = malloc(sizeof(struct ip_iovec)); v->iov_base = malloc(1500); v->iov_len = 0; v->iov_next = NULL; tail = v; cur = v->iov_base; while ((c = getc(stdin)) != EOF) { c = tolower(c); if (c >= 'a' && c <= 'f'){ c = c - 'a' + 10; } else if (c >= '0' && c <= '9') { c = c - '0'; } else if (c == '\n' || c == '\r') { if (v->iov_len > 0) { fprintf(stderr, "Making new (%i)\n", v->iov_len); struct ip_iovec *v2 = malloc(sizeof(struct ip_iovec)); v2->iov_next = NULL; v2->iov_len = 0; v2->iov_base = malloc(1500); tail->iov_next = v2; tail = tail->iov_next; cur = tail->iov_base; } continue; } else continue; if (idx++ % 2 == 0) { *cur |= c << 4; } else { *cur++ |= c; tail->iov_len ++; } } ieee154_print(&frame_address.ieee_src, print_buf, sizeof(print_buf)); fprintf(stderr, "src: %s", print_buf); ieee154_print(&frame_address.ieee_dst, print_buf, sizeof(print_buf)); fprintf(stderr, " dest: %s\n", print_buf); //fprintf(stderr, "packet [%li]\n", cur - frame); //fprint_buffer(stderr, frame, cur - frame); fprintf(stderr, "\n"); if (iov_len(v) < sizeof(struct ip6_hdr)) return 1; memset(&ctx, 0, sizeof(ctx)); iov_read(v, 0, sizeof(struct ip6_hdr), &pkt.ip6_hdr); pkt.ip6_data = iov_shorten(v, sizeof(struct ip6_hdr)); pkt.ip6_hdr.ip6_plen = htons(iov_len(pkt.ip6_data)); // iov_print(v); while ((rv = lowpan_frag_get(fragment, sizeof(fragment), &pkt, &frame_address, &ctx)) > 0) { fragment[0] = rv - 1; /* set the 802.15.4 length */ print_buffer_bare(fragment, rv); fprintf(stderr, "fragment [%i]\n", rv); fprint_buffer(stderr, fragment, rv); printf("\n"); } } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/trace/decompress.c000066400000000000000000000042651207233610700251200ustar00rootroot00000000000000 #include #include #include #include "../lib6lowpan-includes.h" #include "../ieee154_header.h" #include "../lib6lowpan.h" #include "../ip_malloc.h" uint8_t frame[1500]; int lowpan_extern_read_context(struct in6_addr *addr, int context) { memset(addr->s6_addr, 0, 0); addr->s6_addr16[0] = 0xaaaa; return 64; } int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) { return 0; } int read_packet(char *buf, int len) { char c; char *start = buf; int idx = 0; memset(buf, 0, len); while (len > 0 && (c = getc(stdin)) != EOF) { c = tolower(c); if (c >= 'a' && c <= 'f') c = c - 'a' + 10; else if (c >= '0' && c <= '9') c = c - '0'; else if (c == '\n' || c == '\r') break; else continue; if (idx++ % 2 == 0) { *buf |= c << 4; } else { *buf++ |= c; len --; } } if (c == EOF) return -1; else return buf - start ; } int main(int argc, char **argv) { struct ieee154_frame_addr frame_address; struct lowpan_reconstruct recon; char print_buf[256]; uint8_t *cur; int idx = 0, rv; ip_malloc_init(); memset(&recon, 0, sizeof(recon)); while ((rv = read_packet(frame, sizeof(frame))) > 0) { printf("packet [%i]\n", rv); print_buffer(frame, rv); printf("\n"); cur = unpack_ieee154_hdr(frame, &frame_address); ieee154_print(&frame_address.ieee_src, print_buf, sizeof(print_buf)); printf("802.15.4 source: %s\n", print_buf); ieee154_print(&frame_address.ieee_dst, print_buf, sizeof(print_buf)); printf("802.15.4 dest: %s\n", print_buf); printf("802.15.4 destpan: 0x%x\n", letohs(frame_address.ieee_dstpan)); printf("\n"); if (recon.r_bytes_rcvd == 0) { rv = lowpan_recon_start(&frame_address, &recon, cur, rv - (cur - frame) ); } else { rv = lowpan_recon_add(&recon, cur, rv - (cur - frame)); } printf("[%i] %i %i\n", rv, recon.r_size, recon.r_bytes_rcvd); if (recon.r_size == recon.r_bytes_rcvd) { printf("reconstruction complete [%i]\n", recon.r_bytes_rcvd); print_buffer(recon.r_buf, recon.r_size); ip_free(recon.r_buf); } } return 0; } tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/trace/packet.trace000066400000000000000000000003411207233610700250660ustar00rootroot0000000000000061 41C8 83 CDAB FFFF 01 01010001 7412007A 3B3A029B 012C0600 00010010 020000AA AA000000 00000000 00000000 00000104 0E00080C 0A030001 00000100 FFFFFF08 1E404000 00000000 00000000 000000AA AA000000 00000000 00000000 00000037 02 tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/trace/uncompressed.trace000066400000000000000000000005731207233610700263350ustar00rootroot0000000000000001:01:01:00:01:74:12:00 0xffff 60 00 00 00 00 4c 3a 40 fe 80 00 00 00 00 00 00 03 01 01 00 01 74 12 00 ff 02 00 00 00 00 00 00 00 00 00 00 00 00 00 02 9b 01 2c 05 00 00 01 00 10 03 00 00 aa aa 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 0e 00 08 0c 0a 03 00 01 00 00 01 00 ff ff ff 08 1e 40 40 00 00 00 00 00 00 00 00 00 00 00 00 aa aa 00 00 00 00 00 00 00 00 00 00 00 00 00 00 tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/trace/uncompressed2.trace000066400000000000000000000006231207233610700264130ustar00rootroot0000000000000001:01:01:00:01:74:12:00 0xffff 60 00 00 00 00 54 00 40 fe 80 00 00 00 00 00 00 01 01 01 00 01 74 12 00 ff 02 00 00 00 00 00 00 00 00 00 00 00 00 00 02 3a 08 f3 06 00 01 ff ff 9b 01 2c 05 00 00 01 00 10 03 00 00 aa aa 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 0e 00 08 0c 0a 03 00 01 00 00 01 00 ff ff ff 08 1e 40 40 00 00 00 00 00 00 00 00 00 00 00 00 aa aa 00 00 00 00 00 00 00 00 00 00 00 00 00 00 tinyos-2.1.2+dfsg/support/sdk/c/blip/lib6lowpan/utility.c000066400000000000000000000115511207233610700233550ustar00rootroot00000000000000 #include #include #include #include #include "lib6lowpan-includes.h" #include "ip.h" #define TO_CHAR(X) (((X) < 10) ? ('0' + (X)) : ('a' + ((X) - 10))) #define CHAR_VAL(X) (((X) >= '0' && (X) <= '9') ? ((X) - '0') : \ (((X) >= 'A' && (X) <= 'F') ? ((X) - 'A' + 10) : ((X) - 'a' + 10))) void inet_pton6(char *addr, struct in6_addr *dest) { uint16_t cur = 0; char *p = addr; uint8_t block = 0, shift = 0; if (addr == NULL || dest == NULL) return; memset(dest->s6_addr, 0, 16); // first fill in from the front while (*p != '\0') { if (*p != ':') { cur <<= 4; cur |= CHAR_VAL(*p); } else { dest->s6_addr16[block++] = htons(cur); cur = 0; } p++; if (*p == '\0') { dest->s6_addr16[block++] = htons(cur); return; } if (*(p - 1) == ':' && *p == ':') { break; } } // we must have hit a "::" which means we need to start filling in from the end. block = 7; cur = 0; while (*p != '\0') p++; p--; // now pointing at the end of the address string while (p > addr) { if (*p != ':') { cur |= (CHAR_VAL(*p) << shift); shift += 4; } else { dest->s6_addr16[block--] = htons(cur); cur = 0; shift = 0; } p --; if (*(p + 1) == ':' && *p == ':') break; } } int inet_ntop6(struct in6_addr *addr, char *buf, int cnt) { uint16_t block; char *end = buf + cnt; int i, j, compressed = 0; for (j = 0; j < 8; j++) { if (buf > end - 8) goto done; block = ntohs(addr->s6_addr16[j]); for (i = 4; i <= 16; i+=4) { if (block > (0xffff >> i) || (compressed == 2 && i == 16)) { *buf++ = TO_CHAR((block >> (16 - i)) & 0xf); } } if (addr->s6_addr16[j] == 0 && compressed == 0) { *buf++ = ':'; compressed++; } if (addr->s6_addr16[j] != 0 && compressed == 1) compressed++; if (j < 7 && compressed != 1) *buf++ = ':'; } if (compressed == 1) *buf++ = ':'; done: *buf++ = '\0'; return buf - (end - cnt); } uint16_t ieee154_hashaddr(ieee154_addr_t *addr) { if (addr->ieee_mode == IEEE154_ADDR_SHORT) { return addr->i_saddr; } else if (addr->ieee_mode == IEEE154_ADDR_EXT) { uint16_t i, hash = 0, *current = (uint16_t *)addr->i_laddr.data; for (i = 0; i < 4; i++) hash += *current ++; return hash; } else { return 0; } } #ifndef PC uint32_t ntohl(uint32_t i) { uint16_t lo = (uint16_t)i; uint16_t hi = (uint16_t)(i >> 16); lo = (lo << 8) | (lo >> 8); hi = (hi << 8) | (hi >> 8); return (((uint32_t)lo) << 16) | ((uint32_t)hi); } uint8_t *ip_memcpy(uint8_t *dst0, const uint8_t *src0, uint16_t len) { uint8_t *dst = (uint8_t *) dst0; uint8_t *src = (uint8_t *) src0; uint8_t *ret = dst0; for (; len > 0; len--) *dst++ = *src++; return ret; } #endif #ifdef PC char *strip(char *buf) { char *rv; while (isspace(*buf)) buf++; rv = buf; buf += strlen(buf) - 1; while (isspace(*buf)) { *buf = '\0'; buf--; } return rv; } int ieee154_parse(char *in, ieee154_addr_t *out) { int i; long val; char *endp = in; long saddr = strtol(in, &endp, 16); // fprintf(stderr, "ieee154_parse: %s, %c\n", in, *endp); if (*endp == ':') { endp = in; // must be a long address for (i = 0; i < 8; i++) { val = strtol(endp, &endp, 16); out->i_laddr.data[7-i] = val; endp++; } out->ieee_mode = IEEE154_ADDR_EXT; } else { out->i_saddr = htole16(saddr); out->ieee_mode = IEEE154_ADDR_SHORT; } return 0; } int ieee154_print(ieee154_addr_t *in, char *out, size_t cnt) { int i; char *cur = out; switch (in->ieee_mode) { case IEEE154_ADDR_SHORT: snprintf(out, cnt, "IEEE154_ADDR_SHORT: 0x%x", in->i_saddr); break; case IEEE154_ADDR_EXT: cur += snprintf(out, cnt, "IEEE154_ADDR_EXT: "); for (i = 0; i < 8; i++) { cur += snprintf(cur, cnt - (cur - out), "%02x", in->i_laddr.data[i]); if (i < 7) *cur++ = ':'; } break; } return 0; } void fprint_buffer(FILE *fp, uint8_t *buf, int len) { int i; for (i = 0; i < len; i++) { if ((i % 16) == 0 && i > 0) fprintf(fp, "\n"); if (i % 16 == 0) { fprintf(fp, "%i:\t", i); } fprintf(fp, "%02x ", buf[i]); } fprintf(fp, "\n"); } void print_buffer(uint8_t *buf, int len) { fprint_buffer(stdout, buf, len); } void print_buffer_bare(uint8_t *buf, int len) { while (len--) { printf("%02x ", *buf++); } } void scribble(uint8_t *buf, int len) { int i; for (i = 0; i < len; i++) { buf[i] = rand(); } } void iov_print(struct ip_iovec *iov) { struct ip_iovec *cur = iov; while (cur != NULL) { int i; printf("iovec (%p, %i) ", cur, (int)cur->iov_len); for (i = 0; i < cur->iov_len; i++) { printf("%02hhx ", cur->iov_base[i]); } printf("\n"); cur = cur->iov_next; } } #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/libtcp/000077500000000000000000000000001207233610700207035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/blip/libtcp/Makefile000066400000000000000000000010561207233610700223450ustar00rootroot00000000000000 GCC=gcc CFLAGS=-I../include -I../driver/ -DPC -g -Wall all: test_client test_server test_circ: test_circ.c circ.c circ.h $(GCC) -o $@ $^ $(CFLAGS) test_client: test_client.c # tcplib.h tcplib.c circ.c $(GCC) -o $@ $< $(CFLAGS) # $(GCC) -o $@ $< tcplib.c circ.c ../driver/tun_dev.c ../lib6lowpan/ip_malloc.c ../lib6lowpan/in_cksum.c $(CFLAGS) test_server: test_server.c tcplib.h tcplib.c circ.c $(GCC) -o $@ $< tcplib.c circ.c ../driver/tun_dev.c ../lib6lowpan/ip_malloc.c ../lib6lowpan/in_cksum.c $(CFLAGS) clean: rm -rf test_server test_circ tinyos-2.1.2+dfsg/support/sdk/c/blip/libtcp/circ.c000066400000000000000000000103551207233610700217730ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include #include #include #include "tcplib.h" struct circ_buf { uint8_t *data_start; uint8_t *data_head; uint16_t data_len; uint32_t head_seqno; }; int circ_buf_init(void *data, int len, uint32_t seqno) { struct circ_buf *b = (struct circ_buf *)data; if (len < sizeof(struct circ_buf)) return -1; b->data_head = b->data_start = (uint8_t *)(b + 1); b->data_len = len - sizeof(struct circ_buf); b->head_seqno = seqno; return 0; } uint32_t circ_get_seqno(void *buf) { struct circ_buf *b = (struct circ_buf *)buf; return b->head_seqno; } void circ_set_seqno(void *buf, uint32_t seqno) { struct circ_buf *b = (struct circ_buf *)buf; b->head_seqno = seqno; } static void get_ptr_off_1(struct circ_buf *b, uint32_t sseqno, int len, uint8_t **writeptr, int *w_len) { uint8_t *endptr = b->data_start + b->data_len; int offset; *writeptr = NULL; *w_len = len; /* write up to either the end of the buffer */ offset = sseqno - b->head_seqno; if (b->data_head + offset < endptr) { *writeptr = b->data_head + offset; } else { offset -= (endptr - b->data_head); *writeptr = b->data_start + offset; } if (*writeptr + *w_len > endptr) { *w_len = endptr - *writeptr; } } int circ_shorten_head(void *buf, uint32_t seqno) { struct circ_buf *b = (struct circ_buf *)buf; int offset = seqno - b->head_seqno; b->head_seqno = seqno; b->data_head += offset; while (b->data_head > b->data_start + b->data_len) b->data_head -= b->data_len; return 0; } int circ_buf_read(void *buf, uint32_t sseqno, uint8_t *data, int len) { struct circ_buf *b = (struct circ_buf *)buf; uint8_t *readptr; int r_len, rc = 0; get_ptr_off_1(b, sseqno, len, &readptr, &r_len); memcpy(data, readptr, r_len); data += r_len; rc += r_len; if (r_len != len) { readptr = b->data_start; r_len = min(len - r_len, b->data_head - b->data_start); memcpy(data, readptr, r_len); rc += r_len; } return rc; } int circ_buf_write(char *buf, uint32_t sseqno, uint8_t *data, int len) { struct circ_buf *b = (struct circ_buf *)buf; uint8_t *writeptr; int w_len; /* we can't write any bytes since we're trying to write too far ahead */ if (sseqno > b->head_seqno + b->data_len) return -1; if (len == 0) return 0; get_ptr_off_1(b, sseqno, len, &writeptr, &w_len); memcpy(writeptr, data, w_len); data += w_len; if (w_len != len) { writeptr = b->data_start; w_len = min(len - w_len, b->data_head - b->data_start); memcpy(writeptr, data, w_len); } return 0; } #ifdef PC void circ_buf_dump(void *buf) { struct circ_buf *b = (struct circ_buf *)buf; uint8_t *d; int i; /* printf("circ buf: %p\n\tmap: %p\n\tmap_len: %i\n\tdata_start: %p\n\t" */ /* "data_head: %p\n\tdata_len: %i\n\thead_seqno: %i\n", */ /* b, b->map, */ /* b->map_len, b->data_start, b->data_head, b->data_len, b->head_seqno); */ for (d = b->data_start; d < b->data_start + b->data_len; d++) { if (d == b->data_head) putc('|', stdout); printf("%2.x ", *d); } putc('\n', stdout); } #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/libtcp/circ.h000066400000000000000000000032411207233610700217740ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef __CIRC_H_ #define __CIRC_H_ #include int circ_buf_init(void *data, int len, uint32_t seqno); int circ_buf_write(char *buf, uint32_t sseqno, uint8_t *data, int len); int circ_buf_read(void *buf, uint32_t sseqno, uint8_t *data, int len); int circ_shorten_head(void *buf, uint32_t seqno); /* read from the head of the buffer, moving the data pointer forward */ // int circ_buf_read_head(char *buf, char **data); void circ_buf_dump(void *buf); uint32_t circ_get_seqno(void *buf); void circ_set_seqno(void *buf, uint32_t seqno); #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/libtcp/tcplib.c000066400000000000000000000565501207233610700223370ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ /* A nonblocking library-based implementation of TCP * * There are some things like timers which need to be handled * externally with callbacks. * * @author Stephen Dawson-Haggerty */ #include #include #include "lib6lowpan/ip_malloc.h" #include "lib6lowpan/in_cksum.h" #include "lib6lowpan/6lowpan.h" #include "lib6lowpan/ip.h" #include "libtcp/tcplib.h" #include "libtcp/circ.h" static struct tcplib_sock *conns = NULL; #define ONE_SEGMENT(X) ((X)->mss) #ifdef PC uint16_t alloc_local_port() { return (time(NULL) & 0xffff) | 0x8000; } #else uint16_t alloc_local_port() { return 21310; } #endif static inline void conn_add_once(struct tcplib_sock *sock) { struct tcplib_sock *iter; for (iter = conns; iter != NULL; iter = iter->next) { if (iter == sock) break; } if (iter == NULL) { sock->next = conns; conns = sock; } } static int isInaddrAny(struct in6_addr *addr) { int i; for (i = 0; i < 8; i++) if (addr->s6_addr16[i] != 0) break; if (i != 8) return 0; return 1; } #ifdef PC #include void print_conn(struct tcplib_sock *sock) { char addr_buf[32]; printf("tcplib socket state: %i:\n", sock->state); inet_ntop(AF_INET6, sock->l_ep.sin6_addr.s6_addr, addr_buf, 32); printf(" local ep: %s port: %u\n", addr_buf, ntohs(sock->l_ep.sin6_port)); inet_ntop(AF_INET6, sock->r_ep.sin6_addr.s6_addr, addr_buf, 32); printf(" remote ep: %s port: %u\n", addr_buf, ntohs(sock->r_ep.sin6_port)); printf(" tx buf length: %i\n", sock->tx_buf_len); } void print_headers(struct ip6_hdr *iph, struct tcp_hdr *tcph) { char addr_buf[32]; printf("headers ip length: %i:\n", ntohs(iph->ip6_plen)); inet_ntop(AF_INET6, iph->ip6_src.s6_addr, addr_buf, 32); printf(" source: %s port: %u\n", addr_buf, ntohs(tcph->srcport)); inet_ntop(AF_INET6, iph->ip6_dst.s6_addr, addr_buf, 32); printf(" remote ep: %s port: %u\n", addr_buf, ntohs(tcph->dstport)); printf(" tcp seqno: %u ackno: %u\n", ntohl(tcph->seqno), ntohl(tcph->ackno)); } #else #undef printf #define printf(FMT, args ...) ; #endif static struct tcplib_sock *conn_lookup(struct ip6_hdr *iph, struct tcp_hdr *tcph) { struct tcplib_sock *iter; //printf("looking up conns: %p %p\n", iph, tcph); // print_headers(iph, tcph); for (iter = conns; iter != NULL; iter = iter->next) { // print_conn(iter); printf("conn lport: %i\n", ntohs(iter->l_ep.sin6_port)); if (((memcmp(iph->ip6_dst.s6_addr, iter->l_ep.sin6_addr.s6_addr, 16) == 0) || isInaddrAny(&iter->l_ep.sin6_addr)) && tcph->dstport == iter->l_ep.sin6_port && (iter->r_ep.sin6_port == 0 || (memcmp(&iph->ip6_src, &iter->r_ep.sin6_addr, 16) == 0 && tcph->srcport == iter->r_ep.sin6_port))) return iter; } return NULL; } static int conn_checkport(uint16_t port) { struct tcplib_sock *iter; for (iter = conns; iter != NULL; iter = iter->next) { if (iter->l_ep.sin6_port == port) return -1; } return 0; } struct tcp_hdr *find_tcp_hdr(struct ip6_packet *msg) { if (msg->ip6_hdr.ip6_nxt == IANA_TCP) { return (struct tcp_hdr *)msg->ip6_data->iov_base; } return NULL; } static struct ip6_packet *get_ipmsg(int plen) { int alen = sizeof(struct ip6_packet) + sizeof(struct tcp_hdr) + sizeof(struct ip_iovec) + plen; char *buf = ip_malloc(alen); struct ip6_packet *msg = (struct ip6_packet *)buf; struct ip_iovec *iov = (struct ip_iovec *)(buf + alen - sizeof(struct ip_iovec)); if (buf == NULL) return NULL; memset(msg, 0, sizeof(struct ip6_packet) + sizeof(struct tcp_hdr)); msg->ip6_hdr.ip6_nxt = IANA_TCP; msg->ip6_hdr.ip6_plen = htons(sizeof(struct tcp_hdr) + plen); msg->ip6_data = iov; iov->iov_next = NULL; iov->iov_len = plen + sizeof(struct tcp_hdr); iov->iov_base = (void *)(msg + 1); return msg; } static void __tcplib_send(struct tcplib_sock *sock, struct ip6_packet *msg) { struct tcp_hdr *tcph = find_tcp_hdr(msg); if (tcph == NULL) return; memcpy(&msg->ip6_hdr.ip6_dst, &sock->r_ep.sin6_addr, 16); sock->flags &= ~TCP_ACKPENDING; // sock->ackno = ntohl(tcph->ackno); printf("srcprt: %hu dstprt: %hu\n", ntohs(sock->l_ep.sin6_port), ntohs(sock->r_ep.sin6_port)); tcph->srcport = sock->l_ep.sin6_port; tcph->dstport = sock->r_ep.sin6_port; tcph->offset = sizeof(struct tcp_hdr) * 4; tcph->window = htons(sock->my_wind); tcph->chksum = 0; tcph->urgent = 0; tcplib_send_out(msg, tcph); } static void tcplib_send_ack(struct tcplib_sock *sock, int fin_seqno, uint8_t flags) { struct ip6_packet *msg = get_ipmsg(0); printf("sending ACK\n"); if (msg != NULL) { struct tcp_hdr *tcp_rep = (struct tcp_hdr *)(msg + 1); tcp_rep->flags = flags; tcp_rep->seqno = htonl(sock->seqno); tcp_rep->ackno = htonl(sock->ackno + (fin_seqno ? 1 : 0)); printf("sending ACK seqno: %u ackno: %u\n", ntohl(tcp_rep->seqno), ntohl(tcp_rep->ackno)); __tcplib_send(sock, msg); ip_free(msg); } else { printf("Could not send ack-- no memory!\n"); } } static void tcplib_send_rst(struct ip6_hdr *iph, struct tcp_hdr *tcph) { struct ip6_packet *msg = get_ipmsg(0); if (msg != NULL) { struct tcp_hdr *tcp_rep = (struct tcp_hdr *)(msg + 1); memcpy(&msg->ip6_hdr.ip6_dst, &iph->ip6_src, 16); tcp_rep->flags = TCP_FLAG_RST | TCP_FLAG_ACK; tcp_rep->ackno = htonl(ntohl(tcph->seqno) + 1); tcp_rep->seqno = tcph->ackno;; tcp_rep->srcport = tcph->dstport; tcp_rep->dstport = tcph->srcport; tcp_rep->offset = sizeof(struct tcp_hdr) * 4; tcp_rep->window = 0; tcp_rep->chksum = 0; tcp_rep->urgent = 0; tcplib_send_out(msg, tcp_rep); ip_free(msg); } } /* send all the data in the tx buffer, starting at sseqno */ static int tcplib_output(struct tcplib_sock *sock, uint32_t sseqno) { // the output size is the minimum of the advertised window and the // conjestion window. of course, if we have less data we send even // less. int seg_size = min(sock->seqno - sseqno, sock->r_wind); printf("r_wind: %i\n", sock->r_wind); seg_size = min(seg_size, sock->cwnd); while (seg_size > 0 && sock->seqno > sseqno) { // printf("sending seg_size: %i\n", seg_size); struct ip6_packet *msg = get_ipmsg(seg_size); struct tcp_hdr *tcph; uint8_t *data; if (msg == NULL) return -1; tcph = (struct tcp_hdr *)(msg + 1); data = (uint8_t *)(tcph + 1); tcph->flags = TCP_FLAG_ACK; tcph->seqno = htonl(sseqno); tcph->ackno = htonl(sock->ackno); printf("tcplib_output: seqno: %u ackno: %u len: %i headno: %u\n", ntohl(tcph->seqno), ntohl(tcph->ackno), seg_size, circ_get_seqno(sock->tx_buf)); if (seg_size != circ_buf_read(sock->tx_buf, sseqno, data, seg_size)) { printf("WARN: circ could not read!\n"); } __tcplib_send(sock, msg); ip_free(msg); sseqno += seg_size; seg_size = min(sock->seqno - sseqno, sock->mss); } return 0; } int tcplib_init_sock(struct tcplib_sock *sock) { memset(sock, 0, sizeof(struct tcplib_sock) - sizeof(struct tcplib_sock *)); sock->mss = 200; sock->my_wind = 200; sock->cwnd = ONE_SEGMENT(sock); sock->ssthresh = 0xffff; conn_add_once(sock); return 0; } /* called when a new segment arrives. */ /* deliver as much data to the app as possible, and update the ack * number of the socket to reflect how much was delivered */ static int receive_data(struct tcplib_sock *sock, struct tcp_hdr *tcph, int len) { uint8_t *ptr; int payload_len; ptr = ((uint8_t *)tcph) + (tcph->offset / 4); payload_len = len - (tcph->offset / 4); sock->ackno = ntohl(tcph->seqno) + payload_len; if (payload_len > 0) { tcplib_extern_recv(sock, ptr, payload_len); } return payload_len; } static void reset_ssthresh(struct tcplib_sock *conn) { uint16_t new_ssthresh = min(conn->cwnd, conn->r_wind) / 2; if (new_ssthresh < 2 * ONE_SEGMENT(conn)) new_ssthresh = 2 * ONE_SEGMENT(conn); conn->ssthresh = new_ssthresh; } int tcplib_process(struct ip6_hdr *iph, void *payload) { int rc = 0; struct tcp_hdr *tcph; struct tcplib_sock *this_conn; // uint8_t *ptr; int len = ntohs(iph->ip6_plen) + sizeof(struct ip6_hdr); int payload_len; uint32_t hdr_seqno, hdr_ackno; int connect_done = 0; tcph = (struct tcp_hdr *)payload; payload_len = len - sizeof(struct ip6_hdr) - (tcph->offset / 4); /* if there's no local */ this_conn = conn_lookup(iph, tcph); // printf("conn: %p\n", this_conn); if (this_conn != NULL) { hdr_seqno = ntohl(tcph->seqno); hdr_ackno = ntohl(tcph->ackno); if (tcph->flags & TCP_FLAG_RST) { /* Really hose this connection if we get a RST packet. * still TODO: RST generation for unbound ports */ printf("connection reset by peer\n"); tcplib_extern_closedone(this_conn); // tcplib_init_sock(this_conn); return 0; } // always get window updates from new segments // TODO : this should be after we detect out-of-sequence ACK // numbers! this_conn->r_wind = ntohs(tcph->window); printf("State: %i\n", this_conn->state); switch (this_conn->state) { case TCP_LAST_ACK: if (tcph->flags & TCP_FLAG_ACK && hdr_ackno == this_conn->seqno + 1) { this_conn->state = TCP_CLOSED; tcplib_extern_closedone(this_conn); break; } case TCP_FIN_WAIT_1: printf("IN FIN_WAIT_1, %i\n", (tcph->flags & TCP_FLAG_FIN)); if (tcph->flags & TCP_FLAG_ACK && hdr_ackno == this_conn->seqno + 1) { if (tcph->flags & TCP_FLAG_FIN) { this_conn->seqno++; this_conn->state = TCP_TIME_WAIT; // the TIME_WAIT state is problematic, since it holds up the // resources while we're in it... this_conn->timer.retx = TCPLIB_TIMEWAIT_LEN; } else { this_conn->timer.retx = TCPLIB_2MSL; this_conn->state = TCP_FIN_WAIT_2; } } // this generate the ACK we need here goto ESTABLISHED; case TCP_FIN_WAIT_2: if (tcph->flags & TCP_FLAG_FIN) { this_conn->seqno++; this_conn->state = TCP_TIME_WAIT; this_conn->timer.retx = TCPLIB_TIMEWAIT_LEN; tcplib_send_ack(this_conn, 0, TCP_FLAG_ACK); } break; case TCP_SYN_SENT: if (tcph->flags & (TCP_FLAG_SYN | TCP_FLAG_ACK)) { // got a syn-ack // send the ACK this_conn this_conn->state = TCP_ESTABLISHED; this_conn->ackno = hdr_seqno + 1; connect_done = 1; // skip the LISTEN processing // this will also generate an ACK goto ESTABLISHED; } else if (tcph->flags & TCP_FLAG_SYN) { // otherwise the state machine says we're in a simultaneous open, so continue doen this_conn->state = TCP_SYN_RCVD; connect_done = 1; } else { printf("sending RST on bad data in state SYN_SENT\n"); // we'll just let the timeout eventually close the socket, though tcplib_send_rst(iph, tcph); break; } case TCP_SYN_RCVD: case TCP_LISTEN: /* not connected. */ if (tcph->flags & TCP_FLAG_SYN) { struct tcplib_sock *new_sock; if (this_conn->state == TCP_LISTEN) { memcpy(&this_conn->r_ep.sin6_addr, &iph->ip6_src, 16); this_conn->r_ep.sin6_port = tcph->srcport; new_sock = tcplib_accept(this_conn, &this_conn->r_ep); if (new_sock != this_conn) { memset(this_conn->r_ep.sin6_addr.s6_addr, 0, 16); this_conn->r_ep.sin6_port = 0; if (new_sock != NULL) { memcpy(&new_sock->r_ep.sin6_addr, &iph->ip6_src, 16); new_sock->r_ep.sin6_port = tcph->srcport; conn_add_once(new_sock); } } if (new_sock == NULL) { tcplib_send_rst(iph, tcph); break; } memcpy(&new_sock->l_ep.sin6_addr, &iph->ip6_dst, 16); new_sock->l_ep.sin6_port = tcph->dstport; new_sock->ackno = hdr_seqno + 1; circ_buf_init(new_sock->tx_buf, new_sock->tx_buf_len, 0xcafebabe + 1); } else { /* recieved a SYN retransmission. */ new_sock = this_conn; } if (new_sock != NULL) { new_sock->seqno = 0xcafebabe + 1; new_sock->state = TCP_SYN_RCVD; tcplib_send_ack(new_sock, 0, TCP_FLAG_ACK | TCP_FLAG_SYN); new_sock->seqno++; } else { memset(&this_conn->r_ep, 0, sizeof(struct sockaddr_in6)); } } else if (this_conn->state == TCP_LISTEN) { tcplib_send_rst(iph, tcph); break; } /* this is SYN_RECVd */ if (tcph->flags & TCP_FLAG_ACK) { this_conn->state = TCP_ESTABLISHED; } /* fall through to handle any data. */ case TCP_CLOSE_WAIT: case TCP_ESTABLISHED: ESTABLISHED: /* ack any data in this packet */ if (this_conn->state == TCP_ESTABLISHED || this_conn->state == TCP_FIN_WAIT_1) { if (payload_len > 0) { if ((this_conn->flags & TCP_ACKPENDING) == TCP_ACKPENDING) { // printf("Incr would overflow\n"); } this_conn->flags ++; } // receive side sequence check and add data printf("seqno: %u ackno: %u\n", hdr_seqno, hdr_ackno); printf("conn seqno: %u ackno: %u\n", this_conn->seqno, this_conn->ackno); // send side recieve sequence check and congestion window updates. if (hdr_ackno > circ_get_seqno(this_conn->tx_buf)) { // new data is being ACKed // or we haven't sent anything new if (this_conn->cwnd <= this_conn->ssthresh) { // in slow start; increase the cwnd by one segment this_conn->cwnd += ONE_SEGMENT(this_conn); // printf("in slow start\n"); } else { // in congestion avoidance this_conn->cwnd += (ONE_SEGMENT(this_conn) * ONE_SEGMENT(this_conn)) / this_conn->cwnd; // printf("in congestion avoidence\n"); } // printf("ACK new data: cwnd: %i ssthresh: %i\n", this_conn->cwnd, this_conn->ssthresh); // reset the duplicate ack counter UNSET_ACK_COUNT(this_conn->flags); // truncates the ack buffer circ_shorten_head(this_conn->tx_buf, hdr_ackno); // printf("ack_count: %i\n", GET_ACK_COUNT(this_conn->flags)); if (this_conn->seqno == hdr_ackno) { tcplib_extern_acked(this_conn); } } else if (this_conn->seqno > circ_get_seqno(this_conn->tx_buf)) { // this is a duplicate ACK // - increase the counter of the number of duplicate ACKs // - if we get to three duplicate ACK's, start resending at // the ACK number because this probably means we lost a segment INCR_ACK_COUNT(this_conn->flags); // printf("ack_count: %i\n", GET_ACK_COUNT(this_conn->flags)); // printf("dup ack count: %i\n", GET_ACK_COUNT(this_conn->flags)); // a "dup ack count" of 2 is really 3 total acks because we start with zero if (GET_ACK_COUNT(this_conn->flags) == 2) { UNSET_ACK_COUNT(this_conn->flags); printf("detected multiple duplicate ACKs-- doing fast retransmit [%u, %u]\n", circ_get_seqno(this_conn->tx_buf), this_conn->seqno); // this is our detection of a "duplicate ack" event. // we are going to reset ssthresh and retransmit the data. reset_ssthresh(this_conn); tcplib_output(this_conn, circ_get_seqno(this_conn->tx_buf)); this_conn->timer.retx = 6; } } if (hdr_seqno != this_conn->ackno) { printf("==> received forward segment\n"); if ((hdr_seqno > this_conn->ackno + this_conn->my_wind) || (hdr_seqno < this_conn->ackno - this_conn->my_wind)) { // send a RST on really wild data tcplib_send_rst(iph, tcph); } else { tcplib_send_ack(this_conn, 0, TCP_FLAG_ACK); this_conn->flags |= TCP_ACKSENT; } } else { // (hdr_seqno == this_conn->ackno) { printf("receive data [%li]\n", len - sizeof(struct ip6_hdr)); if (receive_data(this_conn, tcph, len - sizeof(struct ip6_hdr)) > 0 && this_conn->flags & TCP_ACKSENT) { this_conn->flags &= ~TCP_ACKSENT; tcplib_send_ack(this_conn, 0, TCP_FLAG_ACK); } } // reset the retransmission timer if (this_conn->timer.retx == 0) this_conn->timer.retx = 6; } if (connect_done && !(this_conn->flags & TCP_CONNECTDONE)) { this_conn->flags |= TCP_CONNECTDONE; tcplib_extern_connectdone(this_conn, 0); } case TCP_TIME_WAIT: if ((payload_len > 0 && (this_conn->flags & TCP_ACKPENDING) >= 1) || tcph->flags & TCP_FLAG_FIN) { tcplib_send_ack(this_conn, (payload_len == 0 && (tcph->flags & TCP_FLAG_FIN)), TCP_FLAG_ACK); /* only close the connection if we've gotten all the data */ if (this_conn->state == TCP_ESTABLISHED && (tcph->flags & TCP_FLAG_FIN) && hdr_seqno == this_conn->ackno) { this_conn->state = TCP_CLOSE_WAIT; tcplib_extern_closed(this_conn); } } break; case TCP_CLOSED: default: rc = -1; // printf("sending RST\n"); // tcplib_send_ack(this_conn, 0, TCP_FLAG_ACK | TCP_FLAG_RST); } } else { /* this_conn was NULL */ /* interestingly, TCP sends a RST on this condition, not an ICMP error. go figure. */ printf("sending rst on missing connection\n"); tcplib_send_rst(iph, tcph); } return rc; } /* bind the socket to a local address */ int tcplib_bind(struct tcplib_sock *sock, struct sockaddr_in6 *addr) { /* not using an already-bound port */ /* TODO : SDH : check local address */ if (conn_checkport(addr->sin6_port)) return -1; memcpy(&sock->l_ep, addr, sizeof(struct sockaddr_in6)); /* passive open */ sock->state = TCP_LISTEN; return 0; } /* connect the socket to a remote endpoint */ int tcplib_connect(struct tcplib_sock *sock, struct sockaddr_in6 *serv_addr) { if (sock->tx_buf == NULL) return -1; switch (sock->state) { case TCP_CLOSED: // passive open; need to set up the local endpoint. memset(&sock->l_ep, 0, sizeof(struct sockaddr_in6)); sock->l_ep.sin6_port = htons(alloc_local_port()); break; case TCP_LISTEN: // we got here by calling bind, so we're cool. break; default: return -1; } circ_buf_init(sock->tx_buf, sock->tx_buf_len, 0xcafebabe + 1); sock->ackno = 0; sock->seqno = 0xcafebabe; memcpy(&sock->r_ep, serv_addr, sizeof(struct sockaddr_in6)); tcplib_send_ack(sock, 0, TCP_FLAG_SYN); sock->state = TCP_SYN_SENT; sock->seqno++; sock->timer.retx = 6; return 0; } int tcplib_send(struct tcplib_sock *sock, void *data, int len) { /* have enough tx buffer left? */ if (sock->state != TCP_ESTABLISHED) return -1; if (sock->seqno - circ_get_seqno(sock->tx_buf) + len > sock->tx_buf_len) // circ_get_window(sock->tx_buf)) return -1; if (circ_buf_write(sock->tx_buf, sock->seqno, data, len) < 0) return -1; sock->seqno += len; // printf("tcplib_output from send\n"); // tcplib_output(sock, sock->seqno - len); // this will let multiple calls to send() get combined into a single packet // the data will be sent out next time the timer fires sock->timer.retx = 1; // 3 seconds //if (sock->timer.retx == 0) //sock->timer.retx = 6; return 0; } void tcplib_retx_expire(struct tcplib_sock *sock) { // printf("retransmission timer expired!\n"); sock->retxcnt++; switch (sock->state) { case TCP_ESTABLISHED: if (circ_get_seqno(sock->tx_buf) != sock->seqno) { printf("retransmitting [%u, %u]\n", circ_get_seqno(sock->tx_buf), sock->seqno); reset_ssthresh(sock); // restart slow start sock->cwnd = ONE_SEGMENT(sock); // printf("tcplib_output from timer\n"); tcplib_output(sock, circ_get_seqno(sock->tx_buf)); sock->timer.retx = 6; } else { sock->retxcnt--; } break; case TCP_SYN_SENT: tcplib_send_ack(sock, 0, TCP_FLAG_SYN); sock->timer.retx = 6; break; case TCP_LAST_ACK: case TCP_FIN_WAIT_1: tcplib_send_ack(sock, 1, TCP_FLAG_ACK | TCP_FLAG_FIN); sock->timer.retx = TCPLIB_2MSL; break; case TCP_FIN_WAIT_2: case TCP_TIME_WAIT: sock->state = TCP_CLOSED; // exit TIME_WAIT tcplib_extern_closedone(sock); break; default: break; } /* if we've hit this timer a lot, give up * * do this by going into * TIME_WAIT, which will generate a FIN if anyone sends to us but * otherwise just do nothing. * * we don't do something like try to close it here, since we might * have gotten here from doing that. */ if (sock->retxcnt > TCPLIB_GIVEUP) { sock->state = TCP_TIME_WAIT; sock->timer.retx = TCPLIB_TIMEWAIT_LEN; } } int tcplib_abort(struct tcplib_sock *sock) { switch (sock->state) { // nothing to abort case TCP_CLOSED: case TCP_LISTEN: break; default: tcplib_send_ack(sock, 0, TCP_FLAG_RST); memset(&sock->l_ep, 0, sizeof(struct sockaddr_in6)); memset(&sock->r_ep, 0, sizeof(struct sockaddr_in6)); sock->state = TCP_CLOSED; } return 0; } int tcplib_close(struct tcplib_sock *sock) { int rc = 0; switch (sock->state) { /* passive close */ case TCP_CLOSE_WAIT: tcplib_send_ack(sock, 1, TCP_FLAG_ACK | TCP_FLAG_FIN); sock->timer.retx = 6; sock->state = TCP_LAST_ACK; break; /* active close */ case TCP_ESTABLISHED: // kick off the close tcplib_send_ack(sock, 0, TCP_FLAG_ACK | TCP_FLAG_FIN); sock->timer.retx = TCPLIB_2MSL; sock->state = TCP_FIN_WAIT_1; break; case TCP_SYN_SENT: sock->state = TCP_CLOSED; break; default: /* this is meaningless in other states */ rc = -1; } return rc; } int tcplib_timer_process() { struct tcplib_sock *iter; for (iter = conns; iter != NULL; iter = iter->next) { if (iter->timer.retx > 0 && (--iter->timer.retx) == 0) tcplib_retx_expire(iter); if ((iter->flags & TCP_ACKPENDING) >= 2) { tcplib_send_ack(iter, 0, TCP_FLAG_ACK); } } return 0; } tinyos-2.1.2+dfsg/support/sdk/c/blip/libtcp/tcplib.h000066400000000000000000000120061207233610700223300ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef TCPLIB_H_ #define TCPLIB_H_ /* * tcplib: a simple tcp implemented in a library * @author Stephen Dawson-Haggerty * * */ // #include #include #define min(X,Y) (((X) > (Y)) ? (Y) : (X)) #ifndef PC #define printf(X, args ...) dbg("stdout", X, ## args) #define fprintf(X, Y, args ...) dbg("fprintf", Y, ## args) #endif typedef enum { TCP_CLOSED = 0, TCP_LISTEN, TCP_SYN_RCVD, TCP_SYN_SENT, TCP_ESTABLISHED, TCP_CLOSE_WAIT, TCP_LAST_ACK, TCP_FIN_WAIT_1, TCP_FIN_WAIT_2, TCP_CLOSING, TCP_TIME_WAIT, } tcplib_sock_state_t; enum { TCP_ACKPENDING = 0x3, TCP_DUPACKS = 0x3c, TCP_DUPACKS_OFF = 2, TCP_CONNECTDONE = 0x40, TCP_ACKSENT = 0x80, }; enum { /* how many timer tics to stay in TIME_WAIT */ TCPLIB_TIMEWAIT_LEN = 1, TCPLIB_2MSL = 4, /* how many un-acked retransmissions before we give up the connection */ TCPLIB_GIVEUP = 6, }; #define GET_ACK_COUNT(X) (((X) & TCP_DUPACKS) >> TCP_DUPACKS_OFF) #define UNSET_ACK_COUNT(X) ((X) &= ~TCP_DUPACKS) #define INCR_ACK_COUNT(X) ((X) += 1 << TCP_DUPACKS_OFF) struct tcplib_sock { uint8_t flags; /* local and remote endpoints */ struct sockaddr_in6 l_ep; struct sockaddr_in6 r_ep; /* current connection state */ tcplib_sock_state_t state; void *tx_buf; int tx_buf_len; /* max segment size, or default if we didn't bother to pull it out of the options field */ uint16_t mss; uint16_t my_wind; /* the window the other end is reporting */ uint16_t r_wind; uint16_t cwnd; uint16_t ssthresh; // the current next sequence number for ourgoing data. uint32_t seqno; // and the index of the last byte we've ACKed uint32_t ackno; struct { int8_t retx; } timer; /* retransmission counter */ uint16_t retxcnt; /* this needs to be at the end so we can call init() on a socket without blowing away the linked list */ struct tcplib_sock *next; }; /* EVENTS * ------------------------------------------------------------ * * calls generated by tcplib that must be dealt with elsewhere in the * program. */ /* called when a new connection request is recieved on a socket which * is LISTENing. * * * return 0 if it wants to accept the connection and allocated a * buffer for it; -1 otherwise. */ struct tcplib_sock *tcplib_accept(struct tcplib_sock *conn, struct sockaddr_in6 *from); /* a call-out point for tcplib to send a message */ void tcplib_send_out(struct ip6_packet *pkt, struct tcp_hdr *tcph); /* upcall for new data; may be dispatched all the way out to a * handler. * * Returns: 0 on success, * -1 otherwise. The error may be safely ignored. */ int tcplib_process(struct ip6_hdr *ip_packet, void *payload); /* * should be called every 500ms to increment all the tcp timers */ int tcplib_timer_process(); /* Just fill in the fields of the socket. * * If you perform a send on a socket in this state, an ephemeral port * will be allocated to it. * * This must be called once on any socket that might be sent on, or * might have bind() called. */ int tcplib_init_sock(struct tcplib_sock *sock); /* bind the socket to a local address */ int tcplib_bind(struct tcplib_sock *sock, struct sockaddr_in6 *addr); /* connect the socket to a remote endpoint */ int tcplib_connect(struct tcplib_sock *sock, struct sockaddr_in6 *serv_addr); /* send data on an open socket. * * returns: 0 on success * other errors * - no local buffer is available, * */ int tcplib_send(struct tcplib_sock *sock, void *data, int len); int tcplib_close(struct tcplib_sock *sock); /* abort a connection * * This will send a RST segment if the connection has been opened and * immediately return the socket to the CLOSED, uninitialized state, * although buffer pointers are maintained. * */ int tcplib_abort(struct tcplib_sock *sock); #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/libtcp/test_circ.c000066400000000000000000000066341207233610700230370ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include #include #include "circ.h" /* void do_head_read(void *buf) { */ /* char *read_data; */ /* int i, data_len; */ /* data_len = circ_buf_read_head(buf, (void **)&read_data); */ /* printf("buf_read_head: %i\n", data_len); */ /* for (i = 0; i < data_len; i++) */ /* putc(((char *)read_data)[i], stdout); */ /* putc('\n', stdout); */ /* } */ void do_read(void *buf, uint32_t sseqno) { char data[20]; int data_len, i; data_len = circ_buf_read(buf, sseqno, data, 20); printf("buf_read: %i\n", data_len); for (i = 0; i < data_len; i++) putc(((char *)data)[i], stdout); putc('\n', stdout); } int main(int argc, char **argv) { char buf[200]; char data[20], readbuf[30]; int i = 20, data_len; char *read_data; memset(buf, 0, sizeof(buf)); if (circ_buf_init(buf, 200, 0) < 0) printf("cir_buf_init: error\n"); for (i=0;i<20;i++) data[i] = 'a' + i; if (circ_buf_write(buf, 0, data, 20) < 0) printf("circ_buf_write: error\n"); circ_buf_dump(buf); if (circ_buf_write(buf, 10, data, 20) < 0) printf("circ_buf_write: error\n"); circ_buf_dump(buf); if (circ_buf_write(buf, 50, data, 20) < 0) printf("circ_buf_write: error\n"); // circ_buf_dump(buf); // do_head_read(buf); // circ_buf_dump(buf); if (circ_buf_write(buf, 30, data, 20) < 0) printf("circ_buf_write: error\n"); // circ_buf_dump(buf); if (circ_buf_write(buf, 70, data, 20) < 0) printf("circ_buf_write: error\n"); circ_buf_dump(buf); circ_shorten_head(buf, 10); circ_buf_dump(buf); memset(buf, 0, sizeof(buf)); if (circ_buf_init(buf, 200, 0) < 0) printf("cir_buf_init: error\n"); printf("\n\nRESTART\n\n"); for (i = 0; i < 25; i++) { circ_buf_write(buf, i * 20, data, 20); do_read(buf, i * 20); circ_shorten_head(buf, (i > 0) ? (i - 1) * 20 : 0 * 10); circ_buf_dump(buf); } // do_read(buf, 50); /* do_head_read(buf); */ /* circ_buf_dump(buf); */ /* if (circ_buf_write(buf, 90, data, 20) < 0) */ /* printf("circ_buf_write: error\n"); */ /* if (circ_buf_write(buf, 110, data, 20) < 0) */ /* printf("circ_buf_write: error\n"); */ /* if (circ_buf_write(buf, 130, data, 20) < 0) */ /* printf("circ_buf_write: error\n"); */ /* circ_buf_dump(buf); */ /* do_head_read(buf); */ /* do_head_read(buf); */ /* circ_buf_dump(buf); */ } tinyos-2.1.2+dfsg/support/sdk/c/blip/libtcp/test_server.c000066400000000000000000000140501207233610700234140ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include #include #include #include #include #include #include #include #include #include #include #include "ip.h" #include "tcplib.h" #include "tun_dev.h" #include "ip_malloc.h" #define BUFSZ 1000 #define LOSS_RATE_RECPR 200 #define LOSS_RATE_TRANS 200 int sock = 0; struct in6_addr iface_addr[16] = {{{0x20, 0x05, 0x00, 0x00, 0x00, 0x0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01}}}; struct sockaddr_in6 laddr; void printBuf(uint8_t *buf, uint16_t len) { int i; // print("len: %i: ", len); for (i = 1; i <= len; i++) { printf(" 0x%02x", buf[i-1]); // if (i % 16 == 0) printf("\n"); } printf("\n"); } void print_split_msg(struct split_ip_msg *msg) { int i; printf("src_addr: "); for (i = 0; i < 16; i++) printf("0x%x ", msg->hdr.ip6_src.s6_addr[i]); printf("\ndst_addr: "); for (i = 0; i < 16; i++) printf("0x%x ", msg->hdr.ip6_dst.s6_addr[i]); printf("\nplen: %i hlim: %i\n", ntohs(msg->hdr.plen), msg->hdr.hlim); printBuf(msg->data, msg->data_len); } void tcplib_extern_recv(struct tcplib_sock *sock, void *data, int len) { // printBuf(data, len); if (tcplib_send(sock, data, len) < 0) printf("tcplib_send: fail\n"); if (strncmp((char *)data, "close", 5) == 0) { printf("Server closing sock\n"); tcplib_close(sock); } } void tcplib_extern_closed(struct tcplib_sock *sock) { printf("remote conn closed\n"); tcplib_close(sock); } void tcplib_extern_closedone(struct tcplib_sock *sock) { printf("close done\n"); free(sock->tx_buf); tcplib_init_sock(sock); /* printf("rebinding...\n"); */ } /* called when a new connection request is received: not * * return: a tcplib_struc, with the ops table filled in and send and * receive buffers allocated. */ struct tcplib_sock *tcplib_accept(struct tcplib_sock *conn, struct sockaddr_in6 *from) { printf("tcplib_accept\n"); conn->tx_buf = malloc(BUFSZ); conn->tx_buf_len = BUFSZ; return conn; } void tcplib_send_out(struct split_ip_msg *msg, struct tcp_hdr *tcph) { uint8_t buf[8192]; struct timespec tv; if (sock <= 0) return; // printf("sending message\n"); memcpy(msg->hdr.ip6_src.s6_addr, iface_addr, 16); msg->hdr.ip6_src.s6_addr[15] = 2; msg->hdr.hlim = 64; memset(msg->hdr.vlfc, 0, 4); msg->hdr.vlfc[0] = 6 << 4; tcph->chksum = htons(msg_cksum(msg, IANA_TCP)); tv.tv_sec = 0; // sleep for a ms to give up the cpu... tv.tv_nsec = 1000000; nanosleep(&tv); // print_split_msg(msg); if (rand() % LOSS_RATE_TRANS == 0) { printf("dropping packet on write\n"); } else { printf("tun_write\n"); tun_write(sock, msg); } } /* practice accepting connections and transfering data */ int main(int argg, char **argv) { char buf[8192], dev[IFNAMSIZ]; uint8_t *payload; int len, i, flags; ip_malloc_init(); payload = buf + sizeof(struct tun_pi); dev[0] = 0; if ((sock = tun_open(dev)) < 0) exit(1); if (tun_setup(dev, iface_addr) < 0) exit(1); /* tun_setup turns on non-blocking IO. Turn it off. */ flags = fcntl(sock, F_GETFL); flags &= ~O_NONBLOCK; fcntl(sock,F_SETFL, flags); struct tcplib_sock srv_sock; tcplib_init_sock(&srv_sock); memcpy(laddr.sin6_addr.s6_addr, iface_addr, 16); laddr.sin6_addr.s6_addr[15] = 2; laddr.sin6_port = htons(atoi(argv[1])); tcplib_bind(&srv_sock, &laddr); fd_set fds; struct timeval timeout; FD_ZERO(&fds); FD_SET(sock, &fds); FD_SET(fileno(stdin), &fds); timeout.tv_sec = 0; timeout.tv_usec = 500000; while (select(sock + 1, &fds, NULL, NULL, &timeout) >= 0) { if (FD_ISSET(sock, &fds)) { if ((len = read(sock, buf, 8192)) <= 0) break; // printf("read %i bytes\n", len); struct ip6_hdr *iph = (struct ip6_hdr *)payload; if (iph->nxt_hdr == IANA_TCP) { if (rand() % LOSS_RATE_RECPR == 0) { printf("dropping packet on rx\n"); } else { void *p = buf + sizeof(struct tun_pi) + sizeof(struct ip6_hdr); // printBuf(p, len - sizeof(struct tun_pi) - sizeof(struct tcp_hdr)); if (tcplib_process(iph, p)) // len - sizeof(struct tun_pi))) printf("TCPLIB_PROCESS: ERROR!\n"); } } } else if (FD_ISSET(fileno(stdin), &fds)) { char c = getchar(); switch (c) { case 'a': printf("ABORTING CONNETION\n"); tcplib_abort(&srv_sock); break; case 'c': printf("CLOSING CONNETION\n"); tcplib_close(&srv_sock); break; case 's': printf("connection state: %i\n", srv_sock.state); break; } } else { timeout.tv_sec = 0; timeout.tv_usec = 500000; tcplib_timer_process(); } if (srv_sock.state == TCP_CLOSED) { tcplib_bind(&srv_sock, &laddr); } FD_ZERO(&fds); FD_SET(sock, &fds); FD_SET(fileno(stdin), &fds); } tun_close(sock, dev); } tinyos-2.1.2+dfsg/support/sdk/c/blip/linux/000077500000000000000000000000001207233610700205655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/blip/linux/dbg.c000066400000000000000000000044441207233610700214730ustar00rootroot00000000000000 #include #include #include #include #include #include #include #include #include extern struct timeval boot_time; struct dbg_endpoint { char channel[128]; FILE *fp; struct dbg_endpoint *next; }; struct dbg_endpoint *endpoints = NULL; #define LOGBASE "logs" char logdir[32]; /* find the channel endpoint in the list of logging destinations */ struct dbg_endpoint *get_endpoint(struct dbg_endpoint *cur, char *channel) { char filename_buf[1024]; struct dbg_endpoint *ep; for (ep = cur ? cur->next : endpoints; ep != NULL; ep = ep->next) { if (strcmp(ep->channel, channel) == 0) return ep; } if (cur == NULL && logdir[0] != '\0') { ep = malloc(sizeof(struct dbg_endpoint)); strcpy(ep->channel, channel); snprintf(filename_buf, sizeof(filename_buf), "%s/%s", logdir, channel); ep->fp = fopen(filename_buf, "a"); if (!ep->fp) return NULL; ep->next = endpoints; endpoints = ep; } return ep; } static int timestamp(FILE *fp){ struct timeval now, diff; uint32_t tics_now; gettimeofday(&now, NULL); timersub(&now, &boot_time, &diff); tics_now = (diff.tv_usec * 1024) / 1e6; tics_now += diff.tv_sec * 1024; fprintf(fp, "%u [%lu.%.06lu]: ", tics_now, diff.tv_sec, diff.tv_usec); return 0; } void linux_dbg(char *channel, const char *fmt, ...) { struct dbg_endpoint *ep = NULL; va_list ap; va_start(ap, fmt); while ((ep = get_endpoint(ep, channel))) { timestamp(ep->fp); vfprintf(ep->fp, fmt, ap); fflush(ep->fp); } va_end(ap); } void linux_dbg_init() { int rv = -1, idx = 0; do { snprintf(logdir, 32, LOGBASE ".%i", idx); rv = mkdir(logdir, 0755); idx++; } while (rv < 0 && errno == EEXIST); if (rv < 0) { fprintf(stderr, "WARN: could not open log dir\n"); logdir[0] = '\0'; } else { fprintf(stderr, "INFO: Sending logs to %s\n", logdir); } } char *sim_time_string() { return ""; } void printfUART_buf(char *buf, int len) { int i; for (i = 0; i < len; i++) { printf("%02hhx ", buf[i]); } printf("\n"); } #include #include void printfUART_in6addr(struct in6_addr *a) { static char print_buf[64]; inet_ntop6(a, print_buf, 64); printf(print_buf); } tinyos-2.1.2+dfsg/support/sdk/c/blip/linux/tun_dev.h000066400000000000000000000055741207233610700224150ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ /* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _TUN_DEV_H #define _TUN_DEV_H #include int tun_open(char *dev); int tun_close(int fd, char *dev); int tun_setup(char *dev, struct in6_addr *addr, int pfxlen); int tun_write(int fd, struct ip6_packet *msg); int tun_read(int fd, char *buf, int len); #endif tinyos-2.1.2+dfsg/support/sdk/c/blip/linux/tun_dev_darwin.c000066400000000000000000000117061207233610700237460ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * * * @author Stephen Dawson-Haggerty */ /* We're in macland here so we can do all the OSX-specific includes here */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "tun_ioctls_darwin.h" #include "tun_dev.h" #include "logging.h" #if 0 int main(int argc, char **argv) { char devname[IFNAMSIZ]; struct in6_addr addr; inet_pton(AF_INET6, "fec0::1", &addr); if (tun_open(devname) < 0) { exit(1); } if (tun_setup(devname, &addr, 128) < 0) { exit(1); } sleep(10); } #endif int tun_open(char *dev) { int fd; int yes = 1; if ((fd = open("/dev/tun0", O_RDWR | O_NONBLOCK)) < 0) return -1; strncpy(dev, "tun0", IFNAMSIZ); /* this makes it so we have to prepend the address family to packets we write. */ if (ioctl(fd, TUNSIFHEAD, &yes) < 0) goto failed; if (fcntl(fd, F_SETFL, O_NONBLOCK) < 0) goto failed; return fd; failed: log_fatal_perror("tun_open"); close(fd); return -1; } int tun_setup(char *dev, struct in6_addr *addr, int pfxlen) { char addr_buf[256], cmd_buf[1024]; struct in6_addr my_addr; struct ifreq ifr; int fd; pfxlen = 64; if ((fd = socket(PF_INET6, SOCK_DGRAM, 0)) < 0) return -1; memset(&ifr, 0, sizeof(struct ifreq)); strncpy(ifr.ifr_name, dev, IFNAMSIZ); /* set the interface up */ if (ioctl(fd, SIOCGIFFLAGS, &ifr) < 0) { log_fatal_perror("SIOCGIFFLAGS"); return -1; } ifr.ifr_flags |= IFF_UP; if (ioctl(fd, SIOCSIFFLAGS, &ifr) < 0) { log_fatal_perror("SIOCSIFFLAGS"); return -1; } /* MTU */ ifr.ifr_mtu = 1280; if (ioctl(fd, SIOCSIFMTU, &ifr) < 0) { log_fatal_perror("SIOCSIFMTU"); return -1; } /* Global address */ memcpy(&my_addr, addr, sizeof(struct in6_addr)); inet_ntop(AF_INET6, &my_addr, addr_buf, 256); snprintf(cmd_buf, 1024, "ifconfig %s inet6 %s/%i", dev, addr_buf, pfxlen); if (system(cmd_buf) != 0) { fatal("could not set global address!\n"); return -1; } snprintf(cmd_buf, 1024, "route -q add -inet6 %s -prefixlen %i -interface %s > /dev/null", addr_buf, pfxlen, dev); if (system(cmd_buf) != 0) { fatal("could not add route!\n"); return -1; } snprintf(cmd_buf, 1024, "route -q add -inet6 fe80::%%%s -prefixlen %i -interface %s > /dev/null", dev, 64, dev); if (system(cmd_buf) != 0) { fatal("could not LL add route!\n"); return -1; } my_addr.__u6_addr.__u6_addr16[0] = htons(0xfe80); inet_ntop(AF_INET6, &my_addr, addr_buf, 256); snprintf(cmd_buf, 1024, "ifconfig %s inet6 %s/64", dev, addr_buf); if (system(cmd_buf) != 0) { fatal("could not set local address!\n"); return -1; } return 0; } int tun_close(int fd, char *dev) { return close(fd); } /* Read/write frames from TUN device */ int tun_write(int fd, struct split_ip_msg *msg) { uint8_t buf[INET_MTU + sizeof(struct tun_pi)], *packet; struct tun_pi *pi = (struct tun_pi *)buf; struct generic_header *cur; packet = (uint8_t *)(pi + 1); if (ntohs(msg->hdr.plen) + sizeof(struct ip6_hdr) >= INET_MTU) return 1; pi->af = htonl(AF_INET6); memcpy(packet, &msg->hdr, sizeof(struct ip6_hdr)); packet += sizeof(struct ip6_hdr); cur = msg->headers; while (cur != NULL) { memcpy(packet, cur->hdr.data, cur->len); packet += cur->len; cur = cur->next; } memcpy(packet, msg->data, msg->data_len); return write(fd, buf, sizeof(struct tun_pi) + sizeof(struct ip6_hdr) + ntohs(msg->hdr.plen)); } int tun_read(int fd, char *buf, int len) { int out; out = read(fd, buf, sizeof(struct tun_pi) + len); return out - sizeof(struct tun_pi); } tinyos-2.1.2+dfsg/support/sdk/c/blip/linux/tun_dev_linux.c000066400000000000000000000134001207233610700236120ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ /* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "tun_dev.h" /* * This is in linux/include/net/ipv6.h. * Thanks, net-tools! */ struct in6_ifreq { struct in6_addr ifr6_addr; __u32 ifr6_prefixlen; unsigned int ifr6_ifindex; }; int tun_open(char *dev) { struct ifreq ifr; int fd; if ((fd = open("/dev/net/tun", O_RDWR | O_NONBLOCK)) < 0) return -1; memset(&ifr, 0, sizeof(ifr)); /* By default packets are tagged as IPv4. To tag them as IPv6, * they need to be prefixed by struct tun_pi. */ //ifr.ifr_flags = IFF_TUN | IFF_NO_PI; ifr.ifr_flags = IFF_TUN; if (*dev) strncpy(ifr.ifr_name, dev, IFNAMSIZ); if (ioctl(fd, TUNSETIFF, (void *) &ifr) < 0) goto failed; strcpy(dev, ifr.ifr_name); return fd; failed: perror("tun_open"); close(fd); return -1; } int tun_setup(char *dev, struct in6_addr *addr, int pfxlen) { struct in6_ifreq ifr6; struct ifreq ifr; int fd; if ((fd = socket(PF_INET6, SOCK_DGRAM, 0)) < 0) return -1; memset(&ifr, 0, sizeof(struct ifreq)); strncpy(ifr.ifr_name, dev, IFNAMSIZ); /* set the interface up */ if (ioctl(fd, SIOCGIFFLAGS, &ifr) < 0) { perror("SIOCGIFFLAGS"); return -1; } ifr.ifr_flags |= IFF_UP; if (ioctl(fd, SIOCSIFFLAGS, &ifr) < 0) { perror("SIOCSIFFLAGS"); return -1; } /* MTU */ ifr.ifr_mtu = 1280; if (ioctl(fd, SIOCSIFMTU, &ifr) < 0) { perror("SIOCSIFMTU"); return -1; } /* Global address */ memset(&ifr6, 0, sizeof(struct in6_ifreq)); memcpy(&ifr6.ifr6_addr, addr, 16); if (ioctl(fd, SIOGIFINDEX, &ifr) < 0) { perror("SIOGIFINDEX"); return -1; } ifr6.ifr6_ifindex = ifr.ifr_ifindex; ifr6.ifr6_prefixlen = pfxlen; if (ioctl(fd, SIOCSIFADDR, &ifr6) < 0) { perror("SIOCSIFADDR (global)"); return -1; } #if 0 memset(&ifr6.ifr6_addr.s6_addr[0], 0, 16); ifr6.ifr6_addr.s6_addr16[0] = htons(0xfe80); ifr6.ifr6_addr.s6_addr16[7] = addr->s6_addr16[7]; if (ioctl(fd, SIOCSIFADDR, &ifr6) < 0) { perror("SIOCSIFADDR (local)"); return -1; } #endif close(fd); return 0; } int tun_close(int fd, char *dev) { return close(fd); } /* Read/write frames from TUN device */ int tun_write(int fd, struct ip6_packet *msg) { uint8_t buf[INET_MTU + sizeof(struct tun_pi)], *packet; struct tun_pi *pi = (struct tun_pi *)buf; packet = (uint8_t *)(pi + 1); if (ntohs(msg->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr) >= INET_MTU) return 1; pi->flags = 0; pi->proto = htons(ETH_P_IPV6); memcpy(packet, &msg->ip6_hdr, sizeof(struct ip6_hdr)); packet += sizeof(struct ip6_hdr); iov_read(msg->ip6_data, 0, iov_len(msg->ip6_data), packet); return write(fd, buf, sizeof(struct tun_pi) + sizeof(struct ip6_hdr) + ntohs(msg->ip6_hdr.ip6_plen)); } int tun_read(int fd, char *buf, int len) { int out; out = read(fd, buf, sizeof(struct tun_pi) + len); return out - sizeof(struct tun_pi); } tinyos-2.1.2+dfsg/support/sdk/c/blip/linux/tun_ioctls_darwin.h000066400000000000000000000035431207233610700244720ustar00rootroot00000000000000/* * ip tunnel device for MacOSX. */ /* * Copyright (c) 2004, 2005, 2006, 2007, 2008, 2009 Mattias Nissler * * Redistribution and use in source and binary forms, with or without modification, are permitted * provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this list of * conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other materials provided * with the distribution. * 3. The name of the author may not be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef __TUN_IOCTLS_H__ #define __TUN_IOCTLS_H__ /* Tun supports prepending a four byte address family field to each packet. These ioctls allow you * to switch it on/off. Pass 1 as parameter to switch it on, pass 0 for off. */ #define TUNSIFHEAD _IOW('t', 96, int) #define TUNGIFHEAD _IOR('t', 97, int) #endif /* __TUN_IOCTLS_H__ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/000077500000000000000000000000001207233610700174225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/coap/AUTHORS000066400000000000000000000001061207233610700204670ustar00rootroot00000000000000libcoap authors Olaf Bergmann, Universitt Bremen tinyos-2.1.2+dfsg/support/sdk/c/coap/LICENSE000066400000000000000000000355641207233610700204440ustar00rootroot00000000000000 GNU GENERAL PUBLIC LICENSE Version 2, June 1991 Copyright (C) 1989, 1991 Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed. Preamble The licenses for most software are designed to take away your freedom to share and change it. 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END OF TERMS AND CONDITIONS tinyos-2.1.2+dfsg/support/sdk/c/coap/Makefile.in000066400000000000000000000044111207233610700214670ustar00rootroot00000000000000# Makefile for libcoap # # Copyright (C) 2010 Olaf Bergmann # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License # as published by the Free Software Foundation; either version 2 # of the License, or (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. # the library's version VERSION:=@PACKAGE_VERSION@ # tools @SET_MAKE@ SHELL = /bin/sh MKDIR = mkdir abs_builddir = @abs_builddir@ top_builddir = @top_builddir@ package = @PACKAGE_TARNAME@-@PACKAGE_VERSION@ # files and flags SOURCES:= pdu.c net.c debug.c encode.c uri.c list.c subscribe.c str.c OBJECTS:= $(patsubst %.c, %.o, $(SOURCES)) HEADERS:=coap.h config.h debug.h pdu.h net.h encode.h uri.h list.h mem.h subscribe.h str.h #CFLAGS:=-g -Wall -ansi -pedantic CFLAGS:=-Wall -ansi -pedantic @CFLAGS@ DISTDIR=$(top_builddir)/$(package) SUBDIRS:=examples doc FILES:=Makefile.in configure configure.in config.h.in $(SOURCES) $(HEADERS) LIB:=libcoap.a LDFLAGS:=@LIBS@ ARFLAGS:=cru examples:=examples doc:=doc .PHONY: all dirs clean distclean .gitignore doc .SUFFIXES: .SUFFIXES: .c .o all: $(LIB) dirs check: echo DISTDIR: $(DISTDIR) echo top_builddir: $(top_builddir) $(MAKE) -C examples check dirs: $(SUBDIRS) for dir in $^; do \ $(MAKE) -C $$dir ; \ done $(LIB): $(OBJECTS) $(AR) $(ARFLAGS) $@ $^ ranlib $@ clean: @rm -f $(PROGRAM) main.o $(LIB) $(OBJECTS) for dir in $(SUBDIRS); do \ $(MAKE) -C $$dir clean ; \ done doc: $(MAKE) -C doc distclean: clean @rm -rf $(DISTDIR) @rm -f *~ $(DISTDIR).tar.gz dist: $(FILES) $(SUBDIRS) test -d $(DISTDIR) || mkdir $(DISTDIR) cp $(FILES) $(DISTDIR) for dir in $(SUBDIRS); do \ $(MAKE) -C $$dir dist; \ done tar czf $(package).tar.gz $(DISTDIR) .gitignore: echo "core\n*~\n*.[oa]\n*.gz\n*.cap\n$(PROGRAM)\n$(DISTDIR)\n.gitignore" >$@ tinyos-2.1.2+dfsg/support/sdk/c/coap/README000066400000000000000000000014451207233610700203060ustar00rootroot00000000000000libcoap: A C implementation of IETF Core Application protocol Copyright (C) 2010 by Olaf Bergmann libcoap is a C implementation of a lightweight application-protocol for devices that are constrained their resources such as computing power, RF range, memory, bandwith, or network packet sizes. This protocol, CoAP, is developed in the IETF working group "Constrained RESTful Environments (core)", see . This directory contains a protocol parser and basic networking functions for platform with support for malloc() and BSD-style sockets. The examples directory contains a client and a server to demonstrate the use of this library. Ports to other IP stacks such as Contiki/uIP/RIME or TinyOS/BLIP exist as well but are (currently) not part of this distribution. tinyos-2.1.2+dfsg/support/sdk/c/coap/README.COAPBLIP000066400000000000000000000027441207233610700215010ustar00rootroot00000000000000========================== README.COAPBLIP ========================== Please read the entire documentation how to set up CoAP on TinyOS first: http://docs.tinyos.net/tinywiki/index.php/CoAP ========================== Example Client Usage ========================== Starting the example client: GET: Request for temperature (/st) with token (3a) and binary representation ./coap-client -m get coap://[fec0::3]:61616/st -T 3a -t binary PUT: Set the LED's to state 2: echo -e -n \\x02 | ./coap-client -m put coap://[fec0::3]:61616/l -T 3a -t binary -f - Set AES Key: echo -e -n \\xFF\\x01\\x02\\x03\\x04\\x05\\x06\\x07\\x08\\x01\\x02\\x03\\x04\\x05\\x06\\x07\\x08\\x09\\x10\\x11\\x12\\x13\\x14\\x15\\x16 | ./coap-client -m put coap://[fec0::3]:61616/ck -T 3a -t binary -f - OR by creating HEX file: echo -e -n \\xFF\\x01\\x02\\x03\\x04\\x05\\x06\\x07\\x08\\x01\\x02\\x03\\x04\\x05\\x06\\x07\\x08\\x09\\x10\\x11\\x12\\x13\\x14\\x15\\x16 >> file PUT key into storage: ./coap-client -m put coap://[fec0::3]:61616/ck -T 3a -t binary -f file GET key for testing purpose: ./coap-client -m get coap://[fec0::3]:61616/ck -T 3a -t binary ========================== Troubleshooting ========================== In case of having this problem: ./coap-client: error while loading shared libraries: libcoap.so: cannot open shared object file: No such file or directory export LD_LIBRARY_PATH=..:$LD_LIBRARY_PATH OR add this line export LD_LIBRARY_PATH=$TOSROOT/support/sdk/c/coap/:$LD_LIBRARY_PATH to ~/.bashrc tinyos-2.1.2+dfsg/support/sdk/c/coap/coap.h000066400000000000000000000020141207233610700205120ustar00rootroot00000000000000/* coap.h -- main header file for CoAP stack * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_H_ #define _COAP_H_ #include "config.h" #include "debug.h" #include "mem.h" #include "list.h" #include "pdu.h" #include "net.h" #include "encode.h" #include "uri.h" #endif /* _COAP_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/config.h.in000066400000000000000000000062421207233610700214510ustar00rootroot00000000000000/* config.h.in. Generated from configure.in by autoheader. */ /* Define if building universal (internal helper macro) */ #undef AC_APPLE_UNIVERSAL_BUILD /* Define to 1 if you have the header file. */ #undef HAVE_ARPA_INET_H /* Define to 1 if you have the header file. */ #undef HAVE_ASSERT_H /* Define to 1 if you have the `getaddrinfo' function. */ #undef HAVE_GETADDRINFO /* Define to 1 if you have the header file. */ #undef HAVE_INTTYPES_H /* Define to 1 if you have the `coap' library (-lcoap). */ #undef HAVE_LIBCOAP /* Define to 1 if you have the header file. */ #undef HAVE_LIMITS_H /* Define to 1 if your system has a GNU libc compatible `malloc' function, and to 0 otherwise. */ #undef HAVE_MALLOC /* Define to 1 if you have the header file. */ #undef HAVE_MEMORY_H /* Define to 1 if you have the `memset' function. */ #undef HAVE_MEMSET /* Define to 1 if you have the header file. */ #undef HAVE_NETDB_H /* Define to 1 if you have the header file. */ #undef HAVE_NETINET_IN_H /* Define to 1 if you have the `select' function. */ #undef HAVE_SELECT /* Define to 1 if you have the `socket' function. */ #undef HAVE_SOCKET /* Define to 1 if you have the header file. */ #undef HAVE_STDINT_H /* Define to 1 if you have the header file. */ #undef HAVE_STDLIB_H /* Define to 1 if you have the `strcasecmp' function. */ #undef HAVE_STRCASECMP /* Define to 1 if you have the header file. */ #undef HAVE_STRINGS_H /* Define to 1 if you have the header file. */ #undef HAVE_STRING_H /* Define to 1 if you have the `strnlen' function. */ #undef HAVE_STRNLEN /* Define to 1 if you have the `strrchr' function. */ #undef HAVE_STRRCHR /* Define to 1 if you have the header file. */ #undef HAVE_SYS_SOCKET_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_STAT_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_TYPES_H /* Define to 1 if you have the header file. */ #undef HAVE_UNISTD_H /* Define to the address where bug reports for this package should be sent. */ #undef PACKAGE_BUGREPORT /* Define to the full name of this package. */ #undef PACKAGE_NAME /* Define to the full name and version of this package. */ #undef PACKAGE_STRING /* Define to the one symbol short name of this package. */ #undef PACKAGE_TARNAME /* Define to the home page for this package. */ #undef PACKAGE_URL /* Define to the version of this package. */ #undef PACKAGE_VERSION /* Define to 1 if you have the ANSI C header files. */ #undef STDC_HEADERS /* Define WORDS_BIGENDIAN to 1 if your processor stores words with the most significant byte first (like Motorola and SPARC, unlike Intel). */ #if defined AC_APPLE_UNIVERSAL_BUILD # if defined __BIG_ENDIAN__ # define WORDS_BIGENDIAN 1 # endif #else # ifndef WORDS_BIGENDIAN # undef WORDS_BIGENDIAN # endif #endif /* Define to rpl_malloc if the replacement function should be used. */ #undef malloc /* Define to `unsigned int' if does not define. */ #undef size_t /* Define to `int' if does not define. */ #undef ssize_t tinyos-2.1.2+dfsg/support/sdk/c/coap/configure.in000066400000000000000000000033431207233610700217360ustar00rootroot00000000000000# -*- Autoconf -*- # Process this file with autoconf to produce a configure script. # # Copyright (C) 2010 Olaf Bergmann # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License # as published by the Free Software Foundation; either version 2 # of the License, or (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. AC_PREREQ([2.65]) AC_INIT([libcoap], [0.07]) AC_CONFIG_SRCDIR([coap.h]) # Checks for programs. AC_PROG_MAKE_SET AC_PROG_CC AC_PROG_RANLIB AC_PATH_PROG(DOXYGEN, doxygen, [:]) AC_C_BIGENDIAN # Checks for libraries. AC_CHECK_LIB([coap], [coap_new_pdu]) AC_SEARCH_LIBS([gethostbyname], [nsl]) AC_SEARCH_LIBS([socket], [socket]) # Checks for header files. AC_CHECK_HEADERS([assert.h arpa/inet.h limits.h netdb.h netinet/in.h stdlib.h string.h strings.h sys/socket.h unistd.h]) # Checks for typedefs, structures, and compiler characteristics. AC_TYPE_SIZE_T AC_TYPE_SSIZE_T # Checks for library functions. AC_FUNC_MALLOC AC_CHECK_FUNCS([memset select socket strcasecmp strrchr getaddrinfo strnlen]) AC_CONFIG_HEADERS([config.h]) AC_CONFIG_FILES([Makefile doc/Makefile doc/Doxyfile examples/Makefile]) AC_OUTPUT tinyos-2.1.2+dfsg/support/sdk/c/coap/debug.c000066400000000000000000000024261207233610700206600ustar00rootroot00000000000000/* debug.c -- debug utilities * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #include #include "debug.h" #ifndef IDENT_APPNAME void debug(char *format, ...) { static char timebuf[32]; struct tm *tmp; time_t now; va_list ap; time(&now); tmp = localtime(&now); if ( strftime(timebuf,sizeof(timebuf), "%b %d %H:%M:%S", tmp) ) printf("%s ", timebuf); va_start(ap, format); vprintf(format, ap); va_end(ap); fflush(stdout); } #else #define debug(fmt, args ...) dbg(fmt, ## args) #endif tinyos-2.1.2+dfsg/support/sdk/c/coap/debug.h000066400000000000000000000017511207233610700206650ustar00rootroot00000000000000/* debug.h -- debug utilities * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_DEBUG_H_ #define _COAP_DEBUG_H_ #ifndef NDEBUG void debug(char *,...); #include "pdu.h" extern void coap_show_pdu(coap_pdu_t *); #endif #endif /* _COAP_DEBUG_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/doc/000077500000000000000000000000001207233610700201675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/coap/doc/Doxyfile.in000066400000000000000000001776371207233610700223270ustar00rootroot00000000000000# Doxyfile 1.6.3 # This file describes the settings to be used by the documentation system # doxygen (www.doxygen.org) for a project # # All text after a hash (#) is considered a comment and will be ignored # The format is: # TAG = value [value, ...] # For lists items can also be appended using: # TAG += value [value, ...] # Values that contain spaces should be placed between quotes (" ") #--------------------------------------------------------------------------- # Project related configuration options #--------------------------------------------------------------------------- # This tag specifies the encoding used for all characters in the config file # that follow. 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Doxygen will use this # information to generate all constant output in the proper language. # The default language is English, other supported languages are: # Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional, # Croatian, Czech, Danish, Dutch, Esperanto, Farsi, Finnish, French, German, # Greek, Hungarian, Italian, Japanese, Japanese-en (Japanese with English # messages), Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian, # Polish, Portuguese, Romanian, Russian, Serbian, Serbian-Cyrilic, Slovak, # Slovene, Spanish, Swedish, Ukrainian, and Vietnamese. OUTPUT_LANGUAGE = English # If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will # include brief member descriptions after the members that are listed in # the file and class documentation (similar to JavaDoc). # Set to NO to disable this. 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EXTRACT_STATIC = NO # If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) # defined locally in source files will be included in the documentation. # If set to NO only classes defined in header files are included. EXTRACT_LOCAL_CLASSES = YES # This flag is only useful for Objective-C code. When set to YES local # methods, which are defined in the implementation section but not in # the interface are included in the documentation. # If set to NO (the default) only methods in the interface are included. EXTRACT_LOCAL_METHODS = NO # If this flag is set to YES, the members of anonymous namespaces will be # extracted and appear in the documentation as a namespace called # 'anonymous_namespace{file}', where file will be replaced with the base # name of the file that contains the anonymous namespace. By default # anonymous namespace are hidden. EXTRACT_ANON_NSPACES = NO # If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all # undocumented members of documented classes, files or namespaces. # If set to NO (the default) these members will be included in the # various overviews, but no documentation section is generated. # This option has no effect if EXTRACT_ALL is enabled. HIDE_UNDOC_MEMBERS = NO # If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all # undocumented classes that are normally visible in the class hierarchy. # If set to NO (the default) these classes will be included in the various # overviews. This option has no effect if EXTRACT_ALL is enabled. HIDE_UNDOC_CLASSES = NO # If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all # friend (class|struct|union) declarations. # If set to NO (the default) these declarations will be included in the # documentation. HIDE_FRIEND_COMPOUNDS = NO # If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any # documentation blocks found inside the body of a function. # If set to NO (the default) these blocks will be appended to the # function's detailed documentation block. HIDE_IN_BODY_DOCS = NO # The INTERNAL_DOCS tag determines if documentation # that is typed after a \internal command is included. If the tag is set # to NO (the default) then the documentation will be excluded. # Set it to YES to include the internal documentation. INTERNAL_DOCS = NO # If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate # file names in lower-case letters. If set to YES upper-case letters are also # allowed. This is useful if you have classes or files whose names only differ # in case and if your file system supports case sensitive file names. Windows # and Mac users are advised to set this option to NO. CASE_SENSE_NAMES = YES # If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen # will show members with their full class and namespace scopes in the # documentation. If set to YES the scope will be hidden. HIDE_SCOPE_NAMES = NO # If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen # will put a list of the files that are included by a file in the documentation # of that file. SHOW_INCLUDE_FILES = YES # If the FORCE_LOCAL_INCLUDES tag is set to YES then Doxygen # will list include files with double quotes in the documentation # rather than with sharp brackets. FORCE_LOCAL_INCLUDES = NO # If the INLINE_INFO tag is set to YES (the default) then a tag [inline] # is inserted in the documentation for inline members. INLINE_INFO = YES # If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen # will sort the (detailed) documentation of file and class members # alphabetically by member name. If set to NO the members will appear in # declaration order. SORT_MEMBER_DOCS = YES # If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the # brief documentation of file, namespace and class members alphabetically # by member name. If set to NO (the default) the members will appear in # declaration order. SORT_BRIEF_DOCS = NO # If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the (brief and detailed) documentation of class members so that constructors and destructors are listed first. If set to NO (the default) the constructors will appear in the respective orders defined by SORT_MEMBER_DOCS and SORT_BRIEF_DOCS. This tag will be ignored for brief docs if SORT_BRIEF_DOCS is set to NO and ignored for detailed docs if SORT_MEMBER_DOCS is set to NO. SORT_MEMBERS_CTORS_1ST = NO # If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the # hierarchy of group names into alphabetical order. If set to NO (the default) # the group names will appear in their defined order. SORT_GROUP_NAMES = NO # If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be # sorted by fully-qualified names, including namespaces. If set to # NO (the default), the class list will be sorted only by class name, # not including the namespace part. # Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. # Note: This option applies only to the class list, not to the # alphabetical list. SORT_BY_SCOPE_NAME = NO # The GENERATE_TODOLIST tag can be used to enable (YES) or # disable (NO) the todo list. This list is created by putting \todo # commands in the documentation. GENERATE_TODOLIST = YES # The GENERATE_TESTLIST tag can be used to enable (YES) or # disable (NO) the test list. This list is created by putting \test # commands in the documentation. GENERATE_TESTLIST = YES # The GENERATE_BUGLIST tag can be used to enable (YES) or # disable (NO) the bug list. This list is created by putting \bug # commands in the documentation. GENERATE_BUGLIST = YES # The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or # disable (NO) the deprecated list. This list is created by putting # \deprecated commands in the documentation. GENERATE_DEPRECATEDLIST= YES # The ENABLED_SECTIONS tag can be used to enable conditional # documentation sections, marked by \if sectionname ... \endif. ENABLED_SECTIONS = # The MAX_INITIALIZER_LINES tag determines the maximum number of lines # the initial value of a variable or define consists of for it to appear in # the documentation. If the initializer consists of more lines than specified # here it will be hidden. Use a value of 0 to hide initializers completely. # The appearance of the initializer of individual variables and defines in the # documentation can be controlled using \showinitializer or \hideinitializer # command in the documentation regardless of this setting. MAX_INITIALIZER_LINES = 30 # Set the SHOW_USED_FILES tag to NO to disable the list of files generated # at the bottom of the documentation of classes and structs. If set to YES the # list will mention the files that were used to generate the documentation. SHOW_USED_FILES = YES # If the sources in your project are distributed over multiple directories # then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy # in the documentation. The default is NO. SHOW_DIRECTORIES = NO # Set the SHOW_FILES tag to NO to disable the generation of the Files page. # This will remove the Files entry from the Quick Index and from the # Folder Tree View (if specified). The default is YES. SHOW_FILES = YES # Set the SHOW_NAMESPACES tag to NO to disable the generation of the # Namespaces page. # This will remove the Namespaces entry from the Quick Index # and from the Folder Tree View (if specified). The default is YES. SHOW_NAMESPACES = YES # The FILE_VERSION_FILTER tag can be used to specify a program or script that # doxygen should invoke to get the current version for each file (typically from # the version control system). Doxygen will invoke the program by executing (via # popen()) the command , where is the value of # the FILE_VERSION_FILTER tag, and is the name of an input file # provided by doxygen. Whatever the program writes to standard output # is used as the file version. See the manual for examples. FILE_VERSION_FILTER = # The LAYOUT_FILE tag can be used to specify a layout file which will be parsed by # doxygen. The layout file controls the global structure of the generated output files # in an output format independent way. The create the layout file that represents # doxygen's defaults, run doxygen with the -l option. You can optionally specify a # file name after the option, if omitted DoxygenLayout.xml will be used as the name # of the layout file. LAYOUT_FILE = #--------------------------------------------------------------------------- # configuration options related to warning and progress messages #--------------------------------------------------------------------------- # The QUIET tag can be used to turn on/off the messages that are generated # by doxygen. Possible values are YES and NO. If left blank NO is used. QUIET = NO # The WARNINGS tag can be used to turn on/off the warning messages that are # generated by doxygen. Possible values are YES and NO. If left blank # NO is used. WARNINGS = YES # If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings # for undocumented members. If EXTRACT_ALL is set to YES then this flag will # automatically be disabled. WARN_IF_UNDOCUMENTED = YES # If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for # potential errors in the documentation, such as not documenting some # parameters in a documented function, or documenting parameters that # don't exist or using markup commands wrongly. WARN_IF_DOC_ERROR = YES # This WARN_NO_PARAMDOC option can be abled to get warnings for # functions that are documented, but have no documentation for their parameters # or return value. If set to NO (the default) doxygen will only warn about # wrong or incomplete parameter documentation, but not about the absence of # documentation. WARN_NO_PARAMDOC = NO # The WARN_FORMAT tag determines the format of the warning messages that # doxygen can produce. The string should contain the $file, $line, and $text # tags, which will be replaced by the file and line number from which the # warning originated and the warning text. Optionally the format may contain # $version, which will be replaced by the version of the file (if it could # be obtained via FILE_VERSION_FILTER) WARN_FORMAT = "$file:$line: $text" # The WARN_LOGFILE tag can be used to specify a file to which warning # and error messages should be written. If left blank the output is written # to stderr. WARN_LOGFILE = #--------------------------------------------------------------------------- # configuration options related to the input files #--------------------------------------------------------------------------- # The INPUT tag can be used to specify the files and/or directories that contain # documented source files. You may enter file names like "myfile.cpp" or # directories like "/usr/src/myproject". Separate the files or directories # with spaces. INPUT = .. ../examples # This tag can be used to specify the character encoding of the source files # that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is # also the default input encoding. Doxygen uses libiconv (or the iconv built # into libc) for the transcoding. See http://www.gnu.org/software/libiconv for # the list of possible encodings. INPUT_ENCODING = UTF-8 # If the value of the INPUT tag contains directories, you can use the # FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp # and *.h) to filter out the source-files in the directories. If left # blank the following patterns are tested: # *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx # *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90 FILE_PATTERNS = # The RECURSIVE tag can be used to turn specify whether or not subdirectories # should be searched for input files as well. Possible values are YES and NO. # If left blank NO is used. RECURSIVE = NO # The EXCLUDE tag can be used to specify files and/or directories that should # excluded from the INPUT source files. This way you can easily exclude a # subdirectory from a directory tree whose root is specified with the INPUT tag. EXCLUDE = # The EXCLUDE_SYMLINKS tag can be used select whether or not files or # directories that are symbolic links (a Unix filesystem feature) are excluded # from the input. EXCLUDE_SYMLINKS = NO # If the value of the INPUT tag contains directories, you can use the # EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude # certain files from those directories. Note that the wildcards are matched # against the file with absolute path, so to exclude all test directories # for example use the pattern */test/* EXCLUDE_PATTERNS = # The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names # (namespaces, classes, functions, etc.) that should be excluded from the # output. The symbol name can be a fully qualified name, a word, or if the # wildcard * is used, a substring. Examples: ANamespace, AClass, # AClass::ANamespace, ANamespace::*Test EXCLUDE_SYMBOLS = # The EXAMPLE_PATH tag can be used to specify one or more files or # directories that contain example code fragments that are included (see # the \include command). EXAMPLE_PATH = # If the value of the EXAMPLE_PATH tag contains directories, you can use the # EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp # and *.h) to filter out the source-files in the directories. If left # blank all files are included. EXAMPLE_PATTERNS = # If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be # searched for input files to be used with the \include or \dontinclude # commands irrespective of the value of the RECURSIVE tag. # Possible values are YES and NO. If left blank NO is used. EXAMPLE_RECURSIVE = NO # The IMAGE_PATH tag can be used to specify one or more files or # directories that contain image that are included in the documentation (see # the \image command). IMAGE_PATH = # The INPUT_FILTER tag can be used to specify a program that doxygen should # invoke to filter for each input file. Doxygen will invoke the filter program # by executing (via popen()) the command , where # is the value of the INPUT_FILTER tag, and is the name of an # input file. Doxygen will then use the output that the filter program writes # to standard output. # If FILTER_PATTERNS is specified, this tag will be # ignored. INPUT_FILTER = # The FILTER_PATTERNS tag can be used to specify filters on a per file pattern # basis. # Doxygen will compare the file name with each pattern and apply the # filter if there is a match. # The filters are a list of the form: # pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further # info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER # is applied to all files. FILTER_PATTERNS = # If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using # INPUT_FILTER) will be used to filter the input files when producing source # files to browse (i.e. when SOURCE_BROWSER is set to YES). FILTER_SOURCE_FILES = NO #--------------------------------------------------------------------------- # configuration options related to source browsing #--------------------------------------------------------------------------- # If the SOURCE_BROWSER tag is set to YES then a list of source files will # be generated. Documented entities will be cross-referenced with these sources. # Note: To get rid of all source code in the generated output, make sure also # VERBATIM_HEADERS is set to NO. SOURCE_BROWSER = YES # Setting the INLINE_SOURCES tag to YES will include the body # of functions and classes directly in the documentation. INLINE_SOURCES = NO # Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct # doxygen to hide any special comment blocks from generated source code # fragments. Normal C and C++ comments will always remain visible. STRIP_CODE_COMMENTS = YES # If the REFERENCED_BY_RELATION tag is set to YES # then for each documented function all documented # functions referencing it will be listed. REFERENCED_BY_RELATION = NO # If the REFERENCES_RELATION tag is set to YES # then for each documented function all documented entities # called/used by that function will be listed. REFERENCES_RELATION = NO # If the REFERENCES_LINK_SOURCE tag is set to YES (the default) # and SOURCE_BROWSER tag is set to YES, then the hyperlinks from # functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will # link to the source code. # Otherwise they will link to the documentation. REFERENCES_LINK_SOURCE = YES # If the USE_HTAGS tag is set to YES then the references to source code # will point to the HTML generated by the htags(1) tool instead of doxygen # built-in source browser. The htags tool is part of GNU's global source # tagging system (see http://www.gnu.org/software/global/global.html). You # will need version 4.8.6 or higher. USE_HTAGS = NO # If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen # will generate a verbatim copy of the header file for each class for # which an include is specified. Set to NO to disable this. VERBATIM_HEADERS = YES #--------------------------------------------------------------------------- # configuration options related to the alphabetical class index #--------------------------------------------------------------------------- # If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index # of all compounds will be generated. Enable this if the project # contains a lot of classes, structs, unions or interfaces. ALPHABETICAL_INDEX = NO # If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then # the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns # in which this list will be split (can be a number in the range [1..20]) COLS_IN_ALPHA_INDEX = 5 # In case all classes in a project start with a common prefix, all # classes will be put under the same header in the alphabetical index. # The IGNORE_PREFIX tag can be used to specify one or more prefixes that # should be ignored while generating the index headers. IGNORE_PREFIX = #--------------------------------------------------------------------------- # configuration options related to the HTML output #--------------------------------------------------------------------------- # If the GENERATE_HTML tag is set to YES (the default) Doxygen will # generate HTML output. GENERATE_HTML = YES # The HTML_OUTPUT tag is used to specify where the HTML docs will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `html' will be used as the default path. HTML_OUTPUT = html # The HTML_FILE_EXTENSION tag can be used to specify the file extension for # each generated HTML page (for example: .htm,.php,.asp). If it is left blank # doxygen will generate files with .html extension. HTML_FILE_EXTENSION = .html # The HTML_HEADER tag can be used to specify a personal HTML header for # each generated HTML page. If it is left blank doxygen will generate a # standard header. HTML_HEADER = # The HTML_FOOTER tag can be used to specify a personal HTML footer for # each generated HTML page. If it is left blank doxygen will generate a # standard footer. HTML_FOOTER = # The HTML_STYLESHEET tag can be used to specify a user-defined cascading # style sheet that is used by each HTML page. It can be used to # fine-tune the look of the HTML output. If the tag is left blank doxygen # will generate a default style sheet. Note that doxygen will try to copy # the style sheet file to the HTML output directory, so don't put your own # stylesheet in the HTML output directory as well, or it will be erased! HTML_STYLESHEET = # If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML # page will contain the date and time when the page was generated. Setting # this to NO can help when comparing the output of multiple runs. HTML_TIMESTAMP = YES # If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, # files or namespaces will be aligned in HTML using tables. If set to # NO a bullet list will be used. HTML_ALIGN_MEMBERS = YES # If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML # documentation will contain sections that can be hidden and shown after the # page has loaded. For this to work a browser that supports # JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox # Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari). HTML_DYNAMIC_SECTIONS = NO # If the GENERATE_DOCSET tag is set to YES, additional index files # will be generated that can be used as input for Apple's Xcode 3 # integrated development environment, introduced with OSX 10.5 (Leopard). # To create a documentation set, doxygen will generate a Makefile in the # HTML output directory. Running make will produce the docset in that # directory and running "make install" will install the docset in # ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find # it at startup. # See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html for more information. GENERATE_DOCSET = NO # When GENERATE_DOCSET tag is set to YES, this tag determines the name of the # feed. A documentation feed provides an umbrella under which multiple # documentation sets from a single provider (such as a company or product suite) # can be grouped. DOCSET_FEEDNAME = "Doxygen generated docs" # When GENERATE_DOCSET tag is set to YES, this tag specifies a string that # should uniquely identify the documentation set bundle. This should be a # reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen # will append .docset to the name. DOCSET_BUNDLE_ID = org.doxygen.Project # If the GENERATE_HTMLHELP tag is set to YES, additional index files # will be generated that can be used as input for tools like the # Microsoft HTML help workshop to generate a compiled HTML help file (.chm) # of the generated HTML documentation. GENERATE_HTMLHELP = NO # If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can # be used to specify the file name of the resulting .chm file. You # can add a path in front of the file if the result should not be # written to the html output directory. CHM_FILE = # If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can # be used to specify the location (absolute path including file name) of # the HTML help compiler (hhc.exe). If non-empty doxygen will try to run # the HTML help compiler on the generated index.hhp. HHC_LOCATION = # If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag # controls if a separate .chi index file is generated (YES) or that # it should be included in the master .chm file (NO). GENERATE_CHI = NO # If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING # is used to encode HtmlHelp index (hhk), content (hhc) and project file # content. CHM_INDEX_ENCODING = # If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag # controls whether a binary table of contents is generated (YES) or a # normal table of contents (NO) in the .chm file. BINARY_TOC = NO # The TOC_EXPAND flag can be set to YES to add extra items for group members # to the contents of the HTML help documentation and to the tree view. TOC_EXPAND = NO # If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and QHP_VIRTUAL_FOLDER # are set, an additional index file will be generated that can be used as input for # Qt's qhelpgenerator to generate a Qt Compressed Help (.qch) of the generated # HTML documentation. GENERATE_QHP = NO # If the QHG_LOCATION tag is specified, the QCH_FILE tag can # be used to specify the file name of the resulting .qch file. # The path specified is relative to the HTML output folder. QCH_FILE = # The QHP_NAMESPACE tag specifies the namespace to use when generating # Qt Help Project output. For more information please see # http://doc.trolltech.com/qthelpproject.html#namespace QHP_NAMESPACE = org.doxygen.Project # The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating # Qt Help Project output. For more information please see # http://doc.trolltech.com/qthelpproject.html#virtual-folders QHP_VIRTUAL_FOLDER = doc # If QHP_CUST_FILTER_NAME is set, it specifies the name of a custom filter to add. # For more information please see # http://doc.trolltech.com/qthelpproject.html#custom-filters QHP_CUST_FILTER_NAME = # The QHP_CUST_FILT_ATTRS tag specifies the list of the attributes of the custom filter to add.For more information please see #     Qt Help Project / Custom Filters. QHP_CUST_FILTER_ATTRS = # The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this project's # filter section matches. # Qt Help Project / Filter Attributes. QHP_SECT_FILTER_ATTRS = # If the GENERATE_QHP tag is set to YES, the QHG_LOCATION tag can # be used to specify the location of Qt's qhelpgenerator. # If non-empty doxygen will try to run qhelpgenerator on the generated # .qhp file. QHG_LOCATION = # If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files # will be generated, which together with the HTML files, form an Eclipse help # plugin. To install this plugin and make it available under the help contents # menu in Eclipse, the contents of the directory containing the HTML and XML # files needs to be copied into the plugins directory of eclipse. The name of # the directory within the plugins directory should be the same as # the ECLIPSE_DOC_ID value. After copying Eclipse needs to be restarted before the help appears. GENERATE_ECLIPSEHELP = NO # A unique identifier for the eclipse help plugin. When installing the plugin # the directory name containing the HTML and XML files should also have # this name. ECLIPSE_DOC_ID = org.doxygen.Project # The DISABLE_INDEX tag can be used to turn on/off the condensed index at # top of each HTML page. The value NO (the default) enables the index and # the value YES disables it. DISABLE_INDEX = NO # This tag can be used to set the number of enum values (range [1..20]) # that doxygen will group on one line in the generated HTML documentation. ENUM_VALUES_PER_LINE = 4 # The GENERATE_TREEVIEW tag is used to specify whether a tree-like index # structure should be generated to display hierarchical information. # If the tag value is set to YES, a side panel will be generated # containing a tree-like index structure (just like the one that # is generated for HTML Help). For this to work a browser that supports # JavaScript, DHTML, CSS and frames is required (i.e. any modern browser). # Windows users are probably better off using the HTML help feature. GENERATE_TREEVIEW = NO # By enabling USE_INLINE_TREES, doxygen will generate the Groups, Directories, # and Class Hierarchy pages using a tree view instead of an ordered list. USE_INLINE_TREES = NO # If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be # used to set the initial width (in pixels) of the frame in which the tree # is shown. TREEVIEW_WIDTH = 250 # Use this tag to change the font size of Latex formulas included # as images in the HTML documentation. The default is 10. Note that # when you change the font size after a successful doxygen run you need # to manually remove any form_*.png images from the HTML output directory # to force them to be regenerated. FORMULA_FONTSIZE = 10 # When the SEARCHENGINE tag is enabled doxygen will generate a search box for the HTML output. The underlying search engine uses javascript # and DHTML and should work on any modern browser. Note that when using HTML help (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET) there is already a search function so this one should # typically be disabled. For large projects the javascript based search engine # can be slow, then enabling SERVER_BASED_SEARCH may provide a better solution. SEARCHENGINE = YES # When the SERVER_BASED_SEARCH tag is enabled the search engine will be implemented using a PHP enabled web server instead of at the web client using Javascript. Doxygen will generate the search PHP script and index # file to put on the web server. The advantage of the server based approach is that it scales better to large projects and allows full text search. The disadvances is that it is more difficult to setup # and does not have live searching capabilities. SERVER_BASED_SEARCH = NO #--------------------------------------------------------------------------- # configuration options related to the LaTeX output #--------------------------------------------------------------------------- # If the GENERATE_LATEX tag is set to YES (the default) Doxygen will # generate Latex output. GENERATE_LATEX = NO # The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `latex' will be used as the default path. LATEX_OUTPUT = latex # The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be # invoked. If left blank `latex' will be used as the default command name. # Note that when enabling USE_PDFLATEX this option is only used for # generating bitmaps for formulas in the HTML output, but not in the # Makefile that is written to the output directory. LATEX_CMD_NAME = latex # The MAKEINDEX_CMD_NAME tag can be used to specify the command name to # generate index for LaTeX. If left blank `makeindex' will be used as the # default command name. MAKEINDEX_CMD_NAME = makeindex # If the COMPACT_LATEX tag is set to YES Doxygen generates more compact # LaTeX documents. This may be useful for small projects and may help to # save some trees in general. COMPACT_LATEX = NO # The PAPER_TYPE tag can be used to set the paper type that is used # by the printer. Possible values are: a4, a4wide, letter, legal and # executive. If left blank a4wide will be used. PAPER_TYPE = a4wide # The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX # packages that should be included in the LaTeX output. EXTRA_PACKAGES = # The LATEX_HEADER tag can be used to specify a personal LaTeX header for # the generated latex document. The header should contain everything until # the first chapter. If it is left blank doxygen will generate a # standard header. Notice: only use this tag if you know what you are doing! LATEX_HEADER = # If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated # is prepared for conversion to pdf (using ps2pdf). The pdf file will # contain links (just like the HTML output) instead of page references # This makes the output suitable for online browsing using a pdf viewer. PDF_HYPERLINKS = YES # If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of # plain latex in the generated Makefile. Set this option to YES to get a # higher quality PDF documentation. USE_PDFLATEX = YES # If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. # command to the generated LaTeX files. This will instruct LaTeX to keep # running if errors occur, instead of asking the user for help. # This option is also used when generating formulas in HTML. LATEX_BATCHMODE = NO # If LATEX_HIDE_INDICES is set to YES then doxygen will not # include the index chapters (such as File Index, Compound Index, etc.) # in the output. LATEX_HIDE_INDICES = NO # If LATEX_SOURCE_CODE is set to YES then doxygen will include source code with syntax highlighting in the LaTeX output. Note that which sources are shown also depends on other settings such as SOURCE_BROWSER. LATEX_SOURCE_CODE = NO #--------------------------------------------------------------------------- # configuration options related to the RTF output #--------------------------------------------------------------------------- # If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output # The RTF output is optimized for Word 97 and may not look very pretty with # other RTF readers or editors. GENERATE_RTF = NO # The RTF_OUTPUT tag is used to specify where the RTF docs will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `rtf' will be used as the default path. RTF_OUTPUT = rtf # If the COMPACT_RTF tag is set to YES Doxygen generates more compact # RTF documents. This may be useful for small projects and may help to # save some trees in general. COMPACT_RTF = NO # If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated # will contain hyperlink fields. The RTF file will # contain links (just like the HTML output) instead of page references. # This makes the output suitable for online browsing using WORD or other # programs which support those fields. # Note: wordpad (write) and others do not support links. RTF_HYPERLINKS = NO # Load stylesheet definitions from file. Syntax is similar to doxygen's # config file, i.e. a series of assignments. You only have to provide # replacements, missing definitions are set to their default value. RTF_STYLESHEET_FILE = # Set optional variables used in the generation of an rtf document. # Syntax is similar to doxygen's config file. RTF_EXTENSIONS_FILE = #--------------------------------------------------------------------------- # configuration options related to the man page output #--------------------------------------------------------------------------- # If the GENERATE_MAN tag is set to YES (the default) Doxygen will # generate man pages GENERATE_MAN = NO # The MAN_OUTPUT tag is used to specify where the man pages will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `man' will be used as the default path. MAN_OUTPUT = man # The MAN_EXTENSION tag determines the extension that is added to # the generated man pages (default is the subroutine's section .3) MAN_EXTENSION = .3 # If the MAN_LINKS tag is set to YES and Doxygen generates man output, # then it will generate one additional man file for each entity # documented in the real man page(s). These additional files # only source the real man page, but without them the man command # would be unable to find the correct page. The default is NO. MAN_LINKS = NO #--------------------------------------------------------------------------- # configuration options related to the XML output #--------------------------------------------------------------------------- # If the GENERATE_XML tag is set to YES Doxygen will # generate an XML file that captures the structure of # the code including all documentation. GENERATE_XML = NO # The XML_OUTPUT tag is used to specify where the XML pages will be put. # If a relative path is entered the value of OUTPUT_DIRECTORY will be # put in front of it. If left blank `xml' will be used as the default path. XML_OUTPUT = xml # The XML_SCHEMA tag can be used to specify an XML schema, # which can be used by a validating XML parser to check the # syntax of the XML files. XML_SCHEMA = # The XML_DTD tag can be used to specify an XML DTD, # which can be used by a validating XML parser to check the # syntax of the XML files. XML_DTD = # If the XML_PROGRAMLISTING tag is set to YES Doxygen will # dump the program listings (including syntax highlighting # and cross-referencing information) to the XML output. Note that # enabling this will significantly increase the size of the XML output. XML_PROGRAMLISTING = YES #--------------------------------------------------------------------------- # configuration options for the AutoGen Definitions output #--------------------------------------------------------------------------- # If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will # generate an AutoGen Definitions (see autogen.sf.net) file # that captures the structure of the code including all # documentation. Note that this feature is still experimental # and incomplete at the moment. GENERATE_AUTOGEN_DEF = NO #--------------------------------------------------------------------------- # configuration options related to the Perl module output #--------------------------------------------------------------------------- # If the GENERATE_PERLMOD tag is set to YES Doxygen will # generate a Perl module file that captures the structure of # the code including all documentation. Note that this # feature is still experimental and incomplete at the # moment. GENERATE_PERLMOD = NO # If the PERLMOD_LATEX tag is set to YES Doxygen will generate # the necessary Makefile rules, Perl scripts and LaTeX code to be able # to generate PDF and DVI output from the Perl module output. PERLMOD_LATEX = NO # If the PERLMOD_PRETTY tag is set to YES the Perl module output will be # nicely formatted so it can be parsed by a human reader. # This is useful # if you want to understand what is going on. # On the other hand, if this # tag is set to NO the size of the Perl module output will be much smaller # and Perl will parse it just the same. PERLMOD_PRETTY = YES # The names of the make variables in the generated doxyrules.make file # are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. # This is useful so different doxyrules.make files included by the same # Makefile don't overwrite each other's variables. PERLMOD_MAKEVAR_PREFIX = #--------------------------------------------------------------------------- # Configuration options related to the preprocessor #--------------------------------------------------------------------------- # If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will # evaluate all C-preprocessor directives found in the sources and include # files. ENABLE_PREPROCESSING = YES # If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro # names in the source code. If set to NO (the default) only conditional # compilation will be performed. Macro expansion can be done in a controlled # way by setting EXPAND_ONLY_PREDEF to YES. MACRO_EXPANSION = NO # If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES # then the macro expansion is limited to the macros specified with the # PREDEFINED and EXPAND_AS_DEFINED tags. EXPAND_ONLY_PREDEF = NO # If the SEARCH_INCLUDES tag is set to YES (the default) the includes files # in the INCLUDE_PATH (see below) will be search if a #include is found. SEARCH_INCLUDES = YES # The INCLUDE_PATH tag can be used to specify one or more directories that # contain include files that are not input files but should be processed by # the preprocessor. INCLUDE_PATH = # You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard # patterns (like *.h and *.hpp) to filter out the header-files in the # directories. If left blank, the patterns specified with FILE_PATTERNS will # be used. INCLUDE_FILE_PATTERNS = # The PREDEFINED tag can be used to specify one or more macro names that # are defined before the preprocessor is started (similar to the -D option of # gcc). The argument of the tag is a list of macros of the form: name # or name=definition (no spaces). If the definition and the = are # omitted =1 is assumed. To prevent a macro definition from being # undefined via #undef or recursively expanded use the := operator # instead of the = operator. PREDEFINED = # If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then # this tag can be used to specify a list of macro names that should be expanded. # The macro definition that is found in the sources will be used. # Use the PREDEFINED tag if you want to use a different macro definition. EXPAND_AS_DEFINED = # If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then # doxygen's preprocessor will remove all function-like macros that are alone # on a line, have an all uppercase name, and do not end with a semicolon. Such # function macros are typically used for boiler-plate code, and will confuse # the parser if not removed. SKIP_FUNCTION_MACROS = YES #--------------------------------------------------------------------------- # Configuration::additions related to external references #--------------------------------------------------------------------------- # The TAGFILES option can be used to specify one or more tagfiles. # Optionally an initial location of the external documentation # can be added for each tagfile. The format of a tag file without # this location is as follows: # # TAGFILES = file1 file2 ... # Adding location for the tag files is done as follows: # # TAGFILES = file1=loc1 "file2 = loc2" ... # where "loc1" and "loc2" can be relative or absolute paths or # URLs. If a location is present for each tag, the installdox tool # does not have to be run to correct the links. # Note that each tag file must have a unique name # (where the name does NOT include the path) # If a tag file is not located in the directory in which doxygen # is run, you must also specify the path to the tagfile here. TAGFILES = # When a file name is specified after GENERATE_TAGFILE, doxygen will create # a tag file that is based on the input files it reads. GENERATE_TAGFILE = # If the ALLEXTERNALS tag is set to YES all external classes will be listed # in the class index. If set to NO only the inherited external classes # will be listed. ALLEXTERNALS = NO # If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed # in the modules index. If set to NO, only the current project's groups will # be listed. EXTERNAL_GROUPS = YES # The PERL_PATH should be the absolute path and name of the perl script # interpreter (i.e. the result of `which perl'). PERL_PATH = /usr/bin/perl #--------------------------------------------------------------------------- # Configuration options related to the dot tool #--------------------------------------------------------------------------- # If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will # generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base # or super classes. Setting the tag to NO turns the diagrams off. Note that # this option is superseded by the HAVE_DOT option below. This is only a # fallback. It is recommended to install and use dot, since it yields more # powerful graphs. CLASS_DIAGRAMS = NO # You can define message sequence charts within doxygen comments using the \msc # command. Doxygen will then run the mscgen tool (see # http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the # documentation. The MSCGEN_PATH tag allows you to specify the directory where # the mscgen tool resides. If left empty the tool is assumed to be found in the # default search path. MSCGEN_PATH = # If set to YES, the inheritance and collaboration graphs will hide # inheritance and usage relations if the target is undocumented # or is not a class. HIDE_UNDOC_RELATIONS = YES # If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is # available from the path. This tool is part of Graphviz, a graph visualization # toolkit from AT&T and Lucent Bell Labs. The other options in this section # have no effect if this option is set to NO (the default) HAVE_DOT = NO # By default doxygen will write a font called FreeSans.ttf to the output # directory and reference it in all dot files that doxygen generates. This # font does not include all possible unicode characters however, so when you need # these (or just want a differently looking font) you can specify the font name # using DOT_FONTNAME. You need need to make sure dot is able to find the font, # which can be done by putting it in a standard location or by setting the # DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory # containing the font. DOT_FONTNAME = FreeSans # The DOT_FONTSIZE tag can be used to set the size of the font of dot graphs. # The default size is 10pt. DOT_FONTSIZE = 10 # By default doxygen will tell dot to use the output directory to look for the # FreeSans.ttf font (which doxygen will put there itself). If you specify a # different font using DOT_FONTNAME you can set the path where dot # can find it using this tag. DOT_FONTPATH = # If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen # will generate a graph for each documented class showing the direct and # indirect inheritance relations. Setting this tag to YES will force the # the CLASS_DIAGRAMS tag to NO. CLASS_GRAPH = YES # If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen # will generate a graph for each documented class showing the direct and # indirect implementation dependencies (inheritance, containment, and # class references variables) of the class with other documented classes. COLLABORATION_GRAPH = YES # If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen # will generate a graph for groups, showing the direct groups dependencies GROUP_GRAPHS = YES # If the UML_LOOK tag is set to YES doxygen will generate inheritance and # collaboration diagrams in a style similar to the OMG's Unified Modeling # Language. UML_LOOK = NO # If set to YES, the inheritance and collaboration graphs will show the # relations between templates and their instances. TEMPLATE_RELATIONS = NO # If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT # tags are set to YES then doxygen will generate a graph for each documented # file showing the direct and indirect include dependencies of the file with # other documented files. INCLUDE_GRAPH = YES # If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and # HAVE_DOT tags are set to YES then doxygen will generate a graph for each # documented header file showing the documented files that directly or # indirectly include this file. INCLUDED_BY_GRAPH = YES # If the CALL_GRAPH and HAVE_DOT options are set to YES then # doxygen will generate a call dependency graph for every global function # or class method. Note that enabling this option will significantly increase # the time of a run. So in most cases it will be better to enable call graphs # for selected functions only using the \callgraph command. CALL_GRAPH = NO # If the CALLER_GRAPH and HAVE_DOT tags are set to YES then # doxygen will generate a caller dependency graph for every global function # or class method. Note that enabling this option will significantly increase # the time of a run. So in most cases it will be better to enable caller # graphs for selected functions only using the \callergraph command. CALLER_GRAPH = NO # If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen # will graphical hierarchy of all classes instead of a textual one. GRAPHICAL_HIERARCHY = YES # If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES # then doxygen will show the dependencies a directory has on other directories # in a graphical way. The dependency relations are determined by the #include # relations between the files in the directories. DIRECTORY_GRAPH = YES # The DOT_IMAGE_FORMAT tag can be used to set the image format of the images # generated by dot. Possible values are png, jpg, or gif # If left blank png will be used. DOT_IMAGE_FORMAT = png # The tag DOT_PATH can be used to specify the path where the dot tool can be # found. If left blank, it is assumed the dot tool can be found in the path. DOT_PATH = # The DOTFILE_DIRS tag can be used to specify one or more directories that # contain dot files that are included in the documentation (see the # \dotfile command). DOTFILE_DIRS = # The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of # nodes that will be shown in the graph. If the number of nodes in a graph # becomes larger than this value, doxygen will truncate the graph, which is # visualized by representing a node as a red box. Note that doxygen if the # number of direct children of the root node in a graph is already larger than # DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note # that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH. DOT_GRAPH_MAX_NODES = 50 # The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the # graphs generated by dot. A depth value of 3 means that only nodes reachable # from the root by following a path via at most 3 edges will be shown. Nodes # that lay further from the root node will be omitted. Note that setting this # option to 1 or 2 may greatly reduce the computation time needed for large # code bases. Also note that the size of a graph can be further restricted by # DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction. MAX_DOT_GRAPH_DEPTH = 0 # Set the DOT_TRANSPARENT tag to YES to generate images with a transparent # background. This is disabled by default, because dot on Windows does not # seem to support this out of the box. Warning: Depending on the platform used, # enabling this option may lead to badly anti-aliased labels on the edges of # a graph (i.e. they become hard to read). DOT_TRANSPARENT = NO # Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output # files in one run (i.e. multiple -o and -T options on the command line). This # makes dot run faster, but since only newer versions of dot (>1.8.10) # support this, this feature is disabled by default. DOT_MULTI_TARGETS = YES # If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will # generate a legend page explaining the meaning of the various boxes and # arrows in the dot generated graphs. GENERATE_LEGEND = YES # If the DOT_CLEANUP tag is set to YES (the default) Doxygen will # remove the intermediate dot files that are used to generate # the various graphs. DOT_CLEANUP = YES tinyos-2.1.2+dfsg/support/sdk/c/coap/doc/Makefile.in000066400000000000000000000023421207233610700222350ustar00rootroot00000000000000# Makefile for libcoap # # Copyright (C) 2010 Olaf Bergmann # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License # as published by the Free Software Foundation; either version 2 # of the License, or (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. # the library's version VERSION:=@PACKAGE_VERSION@ # tools @SET_MAKE@ SHELL = /bin/sh MKDIR = mkdir DOXYGEN= @DOXYGEN@ top_builddir = @top_builddir@ DISTDIR?=$(top_builddir)/@PACKAGE_TARNAME@-@PACKAGE_VERSION@ FILES:=Makefile.in Doxyfile.in html doc: Doxyfile $(DOXYGEN) >./doxygen.out 2>&1 clean: @rm -rf html distclean: clean @rm -rf $(DISTDIR) @rm -f *~ dist: doc test -d $(DISTDIR)/doc || mkdir $(DISTDIR)/doc cp -r $(FILES) $(DISTDIR)/doc tinyos-2.1.2+dfsg/support/sdk/c/coap/encode.c000066400000000000000000000027431207233610700210310ustar00rootroot00000000000000/* encode.c -- encoding and decoding of CoAP data types * * Copyright (C) 2010 Olaf Bergmann , Carsten Bormann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef NDEBUG # include #endif #include "encode.h" /* Carsten suggested this when fls() is not available: */ int coap_fls(unsigned int i) { int n; for (n = 0; i; n++) i >>= 1; return n; } unsigned int coap_decode_var_bytes(unsigned char *buf,unsigned int len) { unsigned int i, n = 0; for (i = 0; i < len; ++i) n = (n << 8) + buf[i]; return n; } unsigned int coap_encode_var_bytes(unsigned char *buf, unsigned int val) { int n, i = val >> 1; for (n = 0; i; n++) /* FIXME: coap_fls() */ i >>= 1; for (i = n / 8 + 1; i; --i) { buf[i-1] = val & 0xff; val >>= 8; } return n / 8 + 1; } tinyos-2.1.2+dfsg/support/sdk/c/coap/encode.h000066400000000000000000000043601207233610700210330ustar00rootroot00000000000000/* encode.h -- encoding and decoding of CoAP data types * * Copyright (C) 2010 Olaf Bergmann , Carsten Bormann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_ENCODE_H_ #define _COAP_ENCODE_H_ #ifndef IDENT_APPNAME #if (BSD >= 199103) # include #else # include #endif #endif #define N 8 #define E 4 #define HIBIT (1 << (N - 1)) #define EMASK ((1 << E) - 1) #define MMASK ((1 << N) - 1 - EMASK) #define MAX_VALUE ( (1 << N) - (1 << E) ) * (1 << ((1 << E) - 1)) #define COAP_PSEUDOFP_DECODE_8_4(r) (r < HIBIT ? r : (r & MMASK) << (r & EMASK)) #ifndef HAVE_FLS /* include this only if fls() is not available */ extern int coap_fls(unsigned int i); #else #define coap_fls(i) fls(i) #endif /* ls and s must be integer variables */ #define COAP_PSEUDOFP_ENCODE_8_4_DOWN(v,ls) (v < HIBIT ? v : (ls = coap_fls(v) - N, (v >> ls) & MMASK) + ls) #define COAP_PSEUDOFP_ENCODE_8_4_UP(v,ls,s) (v < HIBIT ? v : (ls = coap_fls(v) - N, (s = (((v + ((1<> ls) & MMASK)), s == 0 ? HIBIT + ls + 1 : s + ls)) /** * Decodes multiple-length byte sequences. buf points to an input byte * sequence of length len. Returns the decoded value. */ unsigned int coap_decode_var_bytes(unsigned char *buf,unsigned int len); /** * Encodes multiple-length byte sequences. buf points to an output * buffer of sufficient length to store the encoded bytes. val is * the value to encode. Returns the number of bytes used to encode * val or 0 on error. */ unsigned int coap_encode_var_bytes(unsigned char *buf, unsigned int val); #endif /* _COAP_ENCODE_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/examples/000077500000000000000000000000001207233610700212405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/coap/examples/Makefile.in000066400000000000000000000035631207233610700233140ustar00rootroot00000000000000# Makefile for libcoap # # Copyright (C) 2010 Olaf Bergmann # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License # as published by the Free Software Foundation; either version 2 # of the License, or (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. # the library's version VERSION:=@PACKAGE_VERSION@ # tools @SET_MAKE@ SHELL = /bin/sh MKDIR = mkdir abs_builddir = @abs_builddir@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ # files and flags PROGRAMS:=tiny coap-server coap-client SOURCES:= tiny.c client.c server.c OBJECTS:= $(patsubst %.c, %.o, $(SOURCES)) #CFLAGS:=-g -Wall -ansi -pedantic -I.. CFLAGS:=-g -Wall -I$(top_srcdir) @CFLAGS@ DISTDIR?=$(top_builddir)/@PACKAGE_TARNAME@-@PACKAGE_VERSION@ FILES:=Makefile.in $(SOURCES) LDFLAGS:=-L$(top_builddir) -lcoap @LIBS@ libcoap =$(top_builddir)/libcoap.a CFLAGS += -DSHOWREALVALUES .PHONY: clean distclean .SUFFIXES: .SUFFIXES: .c .o all: $(PROGRAMS) check: echo DISTDIR: $(DISTDIR) echo top_builddir: $(top_builddir) tiny: tiny.o $(libcoap) $(CC) -o $@ $< $(LDFLAGS) coap-client: client.o $(libcoap) $(CC) -o $@ $< $(LDFLAGS) coap-server: server.o $(libcoap) $(CC) -o $@ $< $(LDFLAGS) clean: @rm -f $(PROGRAMS) $(OBJECTS) distclean: clean @rm -rf $(DISTDIR) @rm -f *~ dist: $(FILES) test -d $(DISTDIR)/examples || mkdir $(DISTDIR)/examples cp $(FILES) $(DISTDIR)/examples tinyos-2.1.2+dfsg/support/sdk/c/coap/examples/client.c000066400000000000000000000536351207233610700226760ustar00rootroot00000000000000/* coap-client -- simple CoAP client * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #include #include #include #include #include #include #include #include #include #include #include "coap.h" static coap_list_t *optlist = NULL; /* Request URI. * TODO: associate the resources with transaction id and make it expireable */ static coap_uri_t uri; /* reading is done when this flag is set */ static int ready = 0; static FILE *file = NULL; /* output file name */ static str payload = { 0, NULL }; /* optional payload to send */ typedef unsigned char method_t; method_t method = 1; /* the method we are using in our requests */ extern unsigned int print_readable( const unsigned char *data, unsigned int len, unsigned char *result, unsigned int buflen ); int append_to_file(const char *filename, const unsigned char *data, size_t len) { size_t written; if ( !file && !(file = fopen(filename, "w")) ) { perror("append_to_file: fopen"); return -1; } do { written = fwrite(data, 1, len, file); len -= written; data += written; } while ( written && len ); return 0; } coap_pdu_t * new_ack( coap_context_t *ctx, coap_queue_t *node ) { coap_pdu_t *pdu = coap_new_pdu(); if (pdu) { pdu->hdr->type = COAP_MESSAGE_ACK; pdu->hdr->code = 0; pdu->hdr->id = node->pdu->hdr->id; } return pdu; } coap_pdu_t * new_response( coap_context_t *ctx, coap_queue_t *node, unsigned int code ) { coap_pdu_t *pdu = new_ack(ctx, node); if (pdu) pdu->hdr->code = code; return pdu; } coap_pdu_t * coap_new_request( method_t m, coap_list_t *options ) { coap_pdu_t *pdu; coap_list_t *opt; if ( ! ( pdu = coap_new_pdu() ) ) return NULL; pdu->hdr->type = COAP_MESSAGE_CON; pdu->hdr->id = rand(); /* use a random transaction id */ pdu->hdr->code = m; for (opt = options; opt; opt = opt->next) { coap_add_option( pdu, COAP_OPTION_KEY(*(coap_option *)opt->data), COAP_OPTION_LENGTH(*(coap_option *)opt->data), COAP_OPTION_DATA(*(coap_option *)opt->data) ); } if (payload.length) { /* TODO: must handle block */ coap_add_data(pdu, payload.length, payload.s); } return pdu; } void send_request( coap_context_t *ctx, coap_pdu_t *pdu, const char *server, unsigned short port ) { struct addrinfo *res, *ainfo; struct addrinfo hints; int error; struct sockaddr_in6 dst; static unsigned char buf[COAP_MAX_PDU_SIZE]; memset ((char *)&hints, 0, sizeof(hints)); hints.ai_socktype = SOCK_DGRAM; hints.ai_family = AF_INET6; error = getaddrinfo(server, "", &hints, &res); if (error != 0) { perror("getaddrinfo"); exit(1); } for (ainfo = res; ainfo != NULL; ainfo = ainfo->ai_next) { if ( ainfo->ai_family == AF_INET6 ) { memset(&dst, 0, sizeof dst ); dst.sin6_family = AF_INET6; dst.sin6_port = htons( port ); memcpy( &dst.sin6_addr, &((struct sockaddr_in6 *)ainfo->ai_addr)->sin6_addr, sizeof(dst.sin6_addr) ); print_readable( (unsigned char *)pdu->hdr, pdu->length, buf, COAP_MAX_PDU_SIZE); printf("%s\n",buf); coap_send_confirmed( ctx, &dst, pdu ); goto leave; } } leave: freeaddrinfo(res); } #define COAP_OPT_BLOCK_LAST(opt) ( COAP_OPT_VALUE(*block) + (COAP_OPT_LENGTH(*block) - 1) ) #define COAP_OPT_BLOCK_MORE(opt) ( *COAP_OPT_LAST(*block) & 0x08 ) #define COAP_OPT_BLOCK_SIZE(opt) ( *COAP_OPT_LAST(*block) & 0x07 ) unsigned int _read_blk_nr(coap_opt_t *opt) { unsigned int i, nr=0; for ( i = COAP_OPT_LENGTH(*opt); i; --i) { nr = (nr << 8) + COAP_OPT_VALUE(*opt)[i-1]; } return nr >> 4; } #define COAP_OPT_BLOCK_NR(opt) _read_blk_nr(&opt) #ifdef SHOWREALVALUES typedef struct val { uint8_t id_t:4; uint8_t length_t:4; uint16_t temp; uint8_t id_h:4; uint8_t length_h:4; uint16_t hum; uint8_t id_v:4; uint8_t length_v:4; uint16_t volt; }__attribute__((__packed__)) val_all ; val_all char_to_val_all(unsigned char *data) { val_all result; memcpy(&result, data, sizeof(val_all)); return result; } uint16_t char_to_uint16(unsigned char *data) { uint16_t result; memcpy(&result, data, sizeof(uint16_t)); return result; } #endif void message_handler( coap_context_t *ctx, coap_queue_t *node, void *data) { coap_pdu_t *pdu = NULL; coap_opt_t *block, *ct, *sub; unsigned int blocknr; unsigned char buf[4]; coap_list_t *option; unsigned int len; unsigned char *databuf; #ifndef NDEBUG printf("** process pdu: "); coap_show_pdu( node->pdu ); #endif if ( node->pdu->hdr->version != COAP_DEFAULT_VERSION ) { debug("dropped packet with unknown version %u\n", node->pdu->hdr->version); return; } if ( node->pdu->hdr->code < COAP_RESPONSE_100 && node->pdu->hdr->type == COAP_MESSAGE_CON ) { /* send 500 response */ pdu = new_response( ctx, node, COAP_RESPONSE_500 ); goto finish; } switch (node->pdu->hdr->code) { case COAP_RESPONSE_200: /* got some data, check if block option is set */ block = coap_check_option( node->pdu, COAP_OPTION_BLOCK ); if ( !block ) { /* There is no block option set, just read the data and we are done. */ if ( coap_get_data( node->pdu, &len, &databuf ) ) { /*path = coap_check_option( node->pdu, COAP_OPTION_URI_PATH );*/ append_to_file( "coap.out", databuf, len ); } } else { blocknr = coap_decode_var_bytes( COAP_OPT_VALUE(*block), COAP_OPT_LENGTH(*block) ); /* TODO: check if we are looking at the correct block number */ if ( coap_get_data( node->pdu, &len, &databuf ) ) { /*path = coap_check_option( node->pdu, COAP_OPTION_URI_PATH );*/ append_to_file( "coap.out", databuf, len ); } if ( (blocknr & 0x08) ) { /* more bit is set */ printf("found the M bit, block size is %u, block nr. %u\n", blocknr & 0x07, (blocknr & 0xf0) << blocknr & 0x07); /* need to acknowledge if message was asyncronous */ if ( node->pdu->hdr->type == COAP_MESSAGE_CON ) { pdu = new_ack( ctx, node ); if ( pdu && coap_send( ctx, &node->remote, pdu ) == COAP_INVALID_TID ) { debug("message_handler: error sending reponse"); coap_delete_pdu(pdu); return; } } /* create pdu with request for next block */ pdu = coap_new_request( method, NULL ); /* first, create bare PDU w/o any option */ if ( pdu ) { pdu->hdr->id = node->pdu->hdr->id; /* copy transaction id from response */ /* get content type from response */ ct = coap_check_option( node->pdu, COAP_OPTION_CONTENT_TYPE ); if ( ct ) { coap_add_option( pdu, COAP_OPTION_CONTENT_TYPE, COAP_OPT_LENGTH(*ct),COAP_OPT_VALUE(*ct) ); } /* add URI components from optlist */ for (option = optlist; option; option = option->next ) { switch (COAP_OPTION_KEY(*(coap_option *)option->data)) { case COAP_OPTION_URI_AUTHORITY : case COAP_OPTION_URI_PATH : case COAP_OPTION_URI_QUERY : coap_add_option ( pdu, COAP_OPTION_KEY(*(coap_option *)option->data), COAP_OPTION_LENGTH(*(coap_option *)option->data), COAP_OPTION_DATA(*(coap_option *)option->data) ); break; default: ; /* skip other options */ } } /* finally add updated block option from response */ coap_add_option ( pdu, COAP_OPTION_BLOCK, coap_encode_var_bytes(buf, blocknr + ( 1 << 4) ), buf); if ( coap_send_confirmed( ctx, &node->remote, pdu ) == COAP_INVALID_TID ) { debug("message_handler: error sending reponse"); coap_delete_pdu(pdu); } return; } } } #ifdef SHOWREALVALUES if (strcmp((const char *)uri.path.s, "st") == 0 ) { printf("\n** Temperatur: %4.2f K\n\n", ((float)char_to_uint16(node->pdu->data))/100); } else if (strcmp((const char *)uri.path.s, "sh") == 0) { printf("\n** Humidity: %4.2f %% \n\n", ((float)char_to_uint16(node->pdu->data))/100); } else if (strcmp((const char *)uri.path.s, "sv") == 0) { printf("** Voltage: %4.2f V\n\n", ((float)char_to_uint16(node->pdu->data))/100); } else if (strcmp((const char *)uri.path.s, "ck") == 0) { if (len != 0) { printf("** AES Key received \n"); } else { printf("** AES Key set\n"); } } else if (strcmp((const char *)uri.path.s, "tsr") == 0) { printf("** tsr\n"); } else if (strcmp((const char *)uri.path.s, "par") == 0) { printf("** par\n"); } else if (strcmp((const char *)uri.path.s, "l") == 0) { if (len != 0) { printf("\n** led 0 (red) %s\n** led 1 (green) %s\n** led 2 (blue) %s\n\n", ( (char_to_uint16(node->pdu->data) %2) == 0) ? "OFF": "ON", (((char_to_uint16(node->pdu->data)>>1)%2) == 0) ? "OFF": "ON", (((char_to_uint16(node->pdu->data)>>2)%2) == 0) ? "OFF": "ON"); } else { printf("** LEDs set\n"); } } else if (strcmp((const char *)uri.path.s, "rt") == 0) { printf("** Route:\ndestination\t\tgateway\t\tiface\n %s\n", node->pdu->data); } else if (strcmp((const char *)uri.path.s, "r") == 0) { val_all val = char_to_val_all(node->pdu->data); printf("\n** All values: \n"); if (val.temp != (0xFFFF | 0xFFFE)) printf("** Temperature: %4.2f K\n", ((float) val.temp)/100); else printf("** Temperature: NaN\n\n"); if (val.hum != (0xFFFF | 0xFFFE)) printf("** Humidity: %4.2f %%\n", ((float) val.hum)/100); else printf("** Humidity: NaN\n\n"); if (val.volt != (0xFFFF | 0xFFFE)) printf("** Voltage: %4.2f V\n\n", ((float) val.volt)/100); else printf("** Voltage: NaN\n\n"); } else if (strcmp((const char *)uri.path.s, "lipsum") == 0) { } else if (strcmp((const char *)uri.path.s, "time") == 0) { } else if (strcmp((const char *)uri.path.s, COAP_DEFAULT_URI_WELLKNOWN) == 0) { printf("** .well-known/core:\n"); } else { printf("** unknown URI\n"); } #endif break; case COAP_RESPONSE_X_240: printf("\n** Token required\n\n"); break; case 0: printf("** PreAck received\n"); break; default: ; } /* acknowledge if requested */ if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ) { pdu = new_ack( ctx, node ); } finish: if ( pdu && coap_send( ctx, &node->remote, pdu ) == COAP_INVALID_TID ) { debug("message_handler: error sending reponse"); coap_delete_pdu(pdu); } /* our job is done, we can exit at any time */ sub = coap_check_option( node->pdu, COAP_OPTION_SUBSCRIPTION ); if ( sub ) { debug("message_handler: Subscription-Lifetime is %d\n", COAP_PSEUDOFP_DECODE_8_4(*COAP_OPT_VALUE(*sub))); } ready = !sub || COAP_PSEUDOFP_DECODE_8_4(*COAP_OPT_VALUE(*sub)) == 0; } void usage( const char *program, const char *version) { const char *p; p = strrchr( program, '/' ); if ( p ) program = ++p; fprintf( stderr, "%s v%s -- a small CoAP implementation\n" "(c) 2010 Olaf Bergmann \n\n" "usage: %s [-b num] [-g group] [-m method] [-p port] [-s num] [-t type...] [-T string] URI\n\n" "\tURI can be an absolute or relative coap URI,\n" "\t-b size\t\tblock size to be used in GET/PUT/POST requests\n" "\t \t\t(value must be a multiple of 16 not larger than 2048)\n" "\t-f file\t\tfile to send with PUT/POST (use '-' for STDIN)\n" "\t-g group\tjoin the given multicast group\n" "\t-m method\trequest method (get|put|post|delete)\n" "\t-p port\t\tlisten on specified port\n" "\t-s duration\tsubscribe for given duration [s]\n" "\t-A types\taccepted content for GET (comma-separated list)\n" "\t-t type\t\tcontent type for given resource for PUT/POST\n" "\t-T token\tinclude specified token\n", program, version, program ); } int join( coap_context_t *ctx, char *group_name ){ struct ipv6_mreq mreq; struct addrinfo *reslocal = NULL, *resmulti = NULL, hints, *ainfo; int result = -1; /* we have to resolve the link-local interface to get the interface id */ memset(&hints, 0, sizeof(hints)); hints.ai_family = AF_INET6; hints.ai_socktype = SOCK_DGRAM; result = getaddrinfo("::", NULL, &hints, &reslocal); if ( result < 0 ) { perror("join: cannot resolve link-local interface"); goto finish; } /* get the first suitable interface identifier */ for (ainfo = reslocal; ainfo != NULL; ainfo = ainfo->ai_next) { if ( ainfo->ai_family == AF_INET6 ) { mreq.ipv6mr_interface = ((struct sockaddr_in6 *)ainfo->ai_addr)->sin6_scope_id; break; } } memset(&hints, 0, sizeof(hints)); hints.ai_family = AF_INET6; hints.ai_socktype = SOCK_DGRAM; /* resolve the multicast group address */ result = getaddrinfo(group_name, NULL, &hints, &resmulti); if ( result < 0 ) { perror("join: cannot resolve multicast address"); goto finish; } for (ainfo = resmulti; ainfo != NULL; ainfo = ainfo->ai_next) { if ( ainfo->ai_family == AF_INET6 ) { mreq.ipv6mr_multiaddr = ((struct sockaddr_in6 *)ainfo->ai_addr)->sin6_addr; break; } } result = setsockopt( ctx->sockfd, IPPROTO_IPV6, IPV6_JOIN_GROUP, (char *)&mreq, sizeof(mreq) ); if ( result < 0 ) perror("join: setsockopt"); finish: freeaddrinfo(resmulti); freeaddrinfo(reslocal); return result; } int order_opts(void *a, void *b) { if (!a || !b) return a < b ? -1 : 1; if (COAP_OPTION_KEY(*(coap_option *)a) < COAP_OPTION_KEY(*(coap_option *)b)) return -1; return COAP_OPTION_KEY(*(coap_option *)a) == COAP_OPTION_KEY(*(coap_option *)b); } coap_list_t * new_option_node(unsigned short key, unsigned int length, unsigned char *data) { coap_option *option; coap_list_t *node; option = coap_malloc(sizeof(coap_option) + length); if ( !option ) goto error; COAP_OPTION_KEY(*option) = key; COAP_OPTION_LENGTH(*option) = length; memcpy(COAP_OPTION_DATA(*option), data, length); /* we can pass NULL here as delete function since option is released automatically */ node = coap_new_listnode(option, NULL); if ( node ) return node; error: perror("new_option_node: malloc"); coap_free( option ); return NULL; } void cmdline_content_type(char *arg, unsigned short key) { static char *content_types[] = { "plain", "xml", "csv", "html", "","","","","","","","","","","","","","","","","", "gif", "jpeg", "png", "tiff", "audio", "video", "","","","","","","","","","","","","", "link", "axml", "binary", "rdf", "soap", "atom", "xmpp", "exi", "bxml", "infoset", "json", 0}; coap_list_t *node; unsigned char i, value[10]; int valcnt = 0; char *p, *q = arg; while (q && *q) { p = strchr(q, ','); for (i=0; content_types[i] && strncmp(q,content_types[i], p ? p-q : strlen(q)) != 0 ; ++i) ; if (content_types[i]) { value[valcnt] = i; valcnt++; } else { fprintf(stderr, "W: unknown content-type '%s'\n",arg); } if (!p || key == COAP_OPTION_CONTENT_TYPE) break; q = p+1; } if (valcnt) { node = new_option_node(key, valcnt, value); if (node) coap_insert( &optlist, node, order_opts ); } } void cmdline_uri(char *arg) { coap_split_uri((unsigned char *)arg, &uri ); #if 0 /* need authority only for proxy requests */ if (uri.na.length) coap_insert( &optlist, new_option_node(COAP_OPTION_URI_AUTHORITY, uri.na.length, uri.na.s), order_opts); #endif if (uri.path.length) coap_insert( &optlist, new_option_node(COAP_OPTION_URI_PATH, uri.path.length, uri.path.s), order_opts); if (uri.query.length) coap_insert( &optlist, new_option_node(COAP_OPTION_URI_QUERY, uri.query.length, uri.query.s), order_opts); } void cmdline_blocksize(char *arg) { static unsigned char buf[4]; /* hack: temporarily take encoded bytes */ unsigned int blocksize = atoi(arg); if ( COAP_MAX_PDU_SIZE < blocksize + sizeof(coap_hdr_t) ) { fprintf(stderr, "W: skipped invalid blocksize\n"); return; } /* use only last three bits and clear M-bit */ blocksize = (coap_fls(blocksize >> 4) - 1) & 0x07; coap_insert( &optlist, new_option_node(COAP_OPTION_BLOCK, coap_encode_var_bytes(buf, blocksize), buf), order_opts); } void cmdline_subscribe(char *arg) { unsigned int ls, s; unsigned char duration = COAP_PSEUDOFP_ENCODE_8_4_UP(atoi(arg), ls, s); coap_insert( &optlist, new_option_node(COAP_OPTION_SUBSCRIPTION, 1, &duration), order_opts ); } void cmdline_token(char *arg) { coap_insert( &optlist, new_option_node(COAP_OPTION_TOKEN, strlen(arg), (unsigned char *)arg), order_opts); } int cmdline_input_from_file(char *filename, str *buf) { FILE *inputfile = NULL; ssize_t len; int result = 1; struct stat statbuf; if (!filename || !buf) return 0; if (filename[0] == '-' && !filename[1]) { /* read from stdin */ buf->length = 20000; buf->s = (unsigned char *)coap_malloc(buf->length); if (!buf->s) return 0; inputfile = stdin; } else { /* read from specified input file */ if (stat(filename, &statbuf) < 0) { perror("cmdline_input_from_file: stat"); return 0; } buf->length = statbuf.st_size; buf->s = (unsigned char *)coap_malloc(buf->length); if (!buf->s) return 0; inputfile = fopen(filename, "r"); if ( !inputfile ) { perror("cmdline_input_from_file: fopen"); coap_free(buf->s); return 0; } } len = fread(buf->s, 1, buf->length, inputfile); if (len < buf->length) { if (ferror(inputfile) != 0) { perror("cmdline_input_from_file: fread"); coap_free(buf->s); buf->length = 0; buf->s = NULL; result = 0; } else { buf->length = len; } } if (inputfile != stdin) fclose(inputfile); return result; } method_t cmdline_method(char *arg) { static char *methods[] = { 0, "get", "post", "put", "delete", 0}; unsigned char i; for (i=1; methods[i] && strcasecmp(arg,methods[i]) != 0 ; ++i) ; return i; /* note that we do not prevent illegal methods */ } int main(int argc, char **argv) { coap_context_t *ctx; fd_set readfds; struct timeval tv, *timeout; int result; time_t now; coap_queue_t *nextpdu; coap_pdu_t *pdu; static unsigned char *p; static str server; unsigned short localport = COAP_DEFAULT_PORT, port = COAP_DEFAULT_PORT; int opt; char *group = NULL; while ((opt = getopt(argc, argv, "b:f:g:m:p:s:t:A:T:")) != -1) { switch (opt) { case 'b' : cmdline_blocksize(optarg); break; case 'f' : cmdline_input_from_file(optarg,&payload); break; case 'g' : group = optarg; break; case 'p' : localport = atoi(optarg); break; case 'm' : method = cmdline_method(optarg); break; case 's' : cmdline_subscribe(optarg); break; case 'A' : cmdline_content_type(optarg,COAP_OPTION_ACCEPT); break; case 't' : cmdline_content_type(optarg,COAP_OPTION_CONTENT_TYPE); break; case 'T' : cmdline_token(optarg); break; default: usage( argv[0], PACKAGE_VERSION ); exit( 1 ); } } ctx = coap_new_context( localport ); if ( !ctx ) return -1; coap_register_message_handler( ctx, message_handler ); if ( optind < argc ) cmdline_uri( argv[optind] ); else { usage( argv[0], PACKAGE_VERSION ); exit( 1 ); } if ( group ) join( ctx, group ); if (! (pdu = coap_new_request( method, optlist ) ) ) return -1; /* split server address and port */ /* FIXME: get rid of the global URI object somehow */ server = uri.na; if (server.length) { if (*server.s == '[') { /* IPv6 address reference */ p = ++server.s; --server.length; while ( p - server.s < server.length && *p != ']' ) ++p; if (*p == ']') *p++ = '\0'; /* port starts here */ } else { /* IPv4 address or hostname */ p = server.s; while ( p - server.s < server.length && *p != ':' ) ++p; } if (*p == ':') { /* port starts here */ *p++ = '\0'; port = 0; /* set port */ while( p - server.s < server.length && isdigit(*p) ) { port = port * 10 + ( *p - '0' ); ++p; } } } /* send request */ send_request( ctx, pdu, server.length ? (char *)server.s : "::1", port ); while ( !(ready && coap_can_exit(ctx)) ) { FD_ZERO(&readfds); FD_SET( ctx->sockfd, &readfds ); nextpdu = coap_peek_next( ctx ); time(&now); while ( nextpdu && nextpdu->t <= now ) { coap_retransmit( ctx, coap_pop_next( ctx ) ); nextpdu = coap_peek_next( ctx ); } if ( nextpdu ) { /* set timeout if there is a pdu to send */ tv.tv_usec = 0; tv.tv_sec = nextpdu->t - now; timeout = &tv; } else timeout = NULL; /* no timeout otherwise */ result = select( ctx->sockfd + 1, &readfds, 0, 0, timeout ); if ( result < 0 ) { /* error */ perror("select"); } else if ( result > 0 ) { /* read from socket */ if ( FD_ISSET( ctx->sockfd, &readfds ) ) { coap_read( ctx ); /* read received data */ coap_dispatch( ctx ); /* and dispatch PDUs from receivequeue */ // koo second read is done to process the asyn response. TODO this has to be done properly by checking the type of message //coap_read( ctx ); /* read received data */ //coap_dispatch( ctx ); /* and dispatch PDUs from receivequeue */ // koo } } } if ( file ) { fflush( file ); fclose( file ); } coap_free_context( ctx ); return 0; } tinyos-2.1.2+dfsg/support/sdk/c/coap/examples/server.c000066400000000000000000001032731207233610700227200ustar00rootroot00000000000000/* coap -- simple implementation of the Constrained Application Protocol (CoAP) * as defined in draft-ietf-core-coap-01 * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef HAVE_ASSERT_H # include #else # define assert(x) #endif /* HAVE_ASSERT_H */ #include "subscribe.h" #include "coap.h" #define COAP_RESOURCE_CHECK_TIME 2 /* where accessible files are stored */ #define FILE_PREFIX "filestorage" #define DATASINK_PREFIX "data-sink/" #define GENERATE_PDU(var,t,c,i) { \ var = coap_new_pdu(); \ if (var) { \ var->hdr->type = (t); \ var->hdr->code = (c); \ var->hdr->id = (i); \ } \ } /* temporary storage for dynamic resource representations */ static char resource_buf[20000]; static int quit = 0; /* SIGINT handler: set quit to 1 for graceful termination */ void handle_sigint(int signum) { quit = 1; } coap_pdu_t * new_ack( coap_context_t *ctx, coap_queue_t *node ) { coap_pdu_t *pdu; GENERATE_PDU(pdu,COAP_MESSAGE_ACK,0,node->pdu->hdr->id); return pdu; } coap_pdu_t * new_rst( coap_context_t *ctx, coap_queue_t *node, unsigned int code ) { coap_pdu_t *pdu; GENERATE_PDU(pdu,COAP_MESSAGE_RST,code,node->pdu->hdr->id); return pdu; } coap_pdu_t * new_response( coap_context_t *ctx, coap_queue_t *node, unsigned int code ) { coap_pdu_t *pdu; GENERATE_PDU(pdu,COAP_MESSAGE_ACK,code,node->pdu->hdr->id); return pdu; } void add_contents( coap_pdu_t *pdu, unsigned int mediatype, unsigned int len, unsigned char *data ) { unsigned char ct = COAP_MEDIATYPE_APPLICATION_LINK_FORMAT; if (!pdu) return; /* add content-encoding */ coap_add_option(pdu, COAP_OPTION_CONTENT_TYPE, 1, &ct); /* TODO: handle fragmentation (check result code) */ coap_add_data(pdu, len, data); } #define INDEX "This is a test server made with libcoap (see http://libcoap.sf.net)\n" \ "Copyright (C) 2010 Olaf Bergmann \n\n" \ "Try to get .well-known/core or POST/PUT data if you like." coap_opt_t * coap_next_option(coap_pdu_t *pdu, coap_opt_t *opt) { coap_opt_t *next; if ( !pdu || !opt ) return NULL; next = (coap_opt_t *)( (unsigned char *)opt + COAP_OPT_SIZE(*opt) ); return (unsigned char *)next < pdu->data && COAP_OPT_DELTA(*next) == 0 ? next : NULL; } int mediatype_matches(coap_pdu_t *pdu, unsigned char mediatype) { coap_opt_t *accept; int t; if ( mediatype == COAP_MEDIATYPE_ANY || (accept = coap_check_option(pdu, COAP_OPTION_ACCEPT)) == NULL) return 1; /* Check the byte sequence in the option value for any occurence of * mediatype. */ for (t = 0; t < COAP_OPT_LENGTH(*accept); ++t) { if ( COAP_OPT_VALUE(*accept)[t] == mediatype ) return 1; } return 0; } /* Check if provided path name is a valid CoAP URI path. */ int is_valid(char *prefix, unsigned char *path, unsigned int length) { enum { START, PATH, DOT, DOTDOT } state; if (!path || length < strlen(prefix) || strncmp((char *)path, prefix, strlen(prefix)) != 0) return 0; path += strlen(prefix); length -= strlen(prefix); if ( length && *path == '/' ) { state = START; ++path; --length; } else state = PATH; while (length) { switch (state) { case START: switch (path[0]) { case '.': state = DOT; break; case '/': return 0; default: state = PATH; } break; case PATH: if (path[0] == '/') state = START; break; case DOT: switch (path[0]) { case '.': state = DOTDOT; break; case '/': return 0; default: state = PATH; } break; case DOTDOT: if (path[0] == '/') return 0; state = PATH; break; } ++path; --length; } return state != DOT && state != DOTDOT; } #ifndef HAVE_STRNLEN size_t strnlen(const char *p, size_t maxlen) { size_t n; for (n = 0; n < maxlen && p[n]; n++) ; return n; } #endif int resource_wellknown(coap_context_t *ctx, coap_resource_t *resource, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished); #define MIN(x,y) (x) < (y) ? (x) : (y) coap_pdu_t * handle_get(coap_context_t *ctx, coap_queue_t *node, void *data) { coap_pdu_t *pdu; coap_uri_t uri; coap_resource_t *resource; coap_opt_t *block, *tok, *sub; str token; unsigned int blklen, blk; int code, finished = 1; unsigned int ls; unsigned int duration; unsigned char enc; unsigned char mediatype = COAP_MEDIATYPE_ANY; coap_subscription_t *subscription; static unsigned char buf[COAP_MAX_PDU_SIZE]; static unsigned char optbuf[4]; if ( !coap_get_request_uri( node->pdu, &uri ) ) return NULL; if ( !uri.path.length ) { pdu = new_response(ctx, node, COAP_RESPONSE_200); if ( !pdu ) return NULL; add_contents( pdu, COAP_MEDIATYPE_TEXT_PLAIN, sizeof(INDEX) - 1, (unsigned char *)INDEX ); goto ok; } /* any other resource */ resource = coap_get_resource(ctx, &uri); if ( !resource ) return new_response(ctx, node, COAP_RESPONSE_404); /* check if requested mediatypes match */ if ( coap_check_option(node->pdu, COAP_OPTION_ACCEPT) && !mediatype_matches(node->pdu, resource->mediatype) ) { debug("media type mismatch\n"); return new_response(ctx, node, COAP_RESPONSE_415); } block = coap_check_option(node->pdu, COAP_OPTION_BLOCK); if ( block ) { blk = coap_decode_var_bytes(COAP_OPT_VALUE(*block), COAP_OPT_LENGTH(*block)); blklen = 16 << (blk & 0x07); } else { blklen = 512; /* default block size is set to 512 Bytes locally */ blk = coap_fls(blklen >> 4) - 1; } /* invoke callback function to get data representation of requested resource */ if ( resource->data ) { mediatype = resource->mediatype; code = resource->data(&uri, &(node->pdu->hdr->id), &mediatype, (blk & ~0x0f) << (blk & 0x07), buf, &blklen, &finished, COAP_REQUEST_GET); } else { /* check if the well-known URI was requested */ if (memcmp(uri.path.s, COAP_DEFAULT_URI_WELLKNOWN, MIN(uri.path.length, sizeof(COAP_DEFAULT_URI_WELLKNOWN) - 1)) == 0) { mediatype = resource->mediatype; code = resource_wellknown(ctx, resource, &mediatype, (blk & ~0x0f) << (blk & 0x07), buf, &blklen, &finished); } else { /* no callback available, set code, blklen and finished manually (-> empty payload) */ code = COAP_RESPONSE_200; blklen = 0; finished = 1; } } if ( !(pdu = new_response(ctx, node, code)) ) return NULL; if ( blklen > 0 ) { /* add content-type */ if ( mediatype != COAP_MEDIATYPE_ANY ) coap_add_option(pdu, COAP_OPTION_CONTENT_TYPE, 1, &mediatype); /* set Max-age option unless resource->maxage is zero */ if (resource->maxage) { coap_add_option(pdu, COAP_OPTION_MAXAGE, coap_encode_var_bytes(optbuf, resource->maxage), optbuf); } /* set Etag option unless resource->etag is zero */ if (*resource->etag) { coap_add_option(pdu, COAP_OPTION_ETAG, strnlen((char *)resource->etag,4), resource->etag); } /* handle subscription if requested */ sub = coap_check_option( node->pdu, COAP_OPTION_SUBSCRIPTION ); if ( sub ) { duration = COAP_PSEUDOFP_DECODE_8_4(*COAP_OPT_VALUE(*sub)); debug("*** add subscription for %d seconds\n", duration); enc = COAP_PSEUDOFP_ENCODE_8_4_DOWN(duration, ls); coap_add_option(pdu, COAP_OPTION_SUBSCRIPTION, 1, &enc); /* refresh only if already subscribed */ token.length = 0; tok = coap_check_option(node->pdu, COAP_OPTION_TOKEN); if (tok) { COAP_SET_STR(&token, COAP_OPT_LENGTH(*tok), COAP_OPT_VALUE(*tok)); coap_add_option(pdu, COAP_OPTION_TOKEN, COAP_OPT_LENGTH(*tok), COAP_OPT_VALUE(*tok)); } subscription = coap_find_subscription(ctx, coap_uri_hash(&uri), &(node->remote), tok ? &token : NULL); if (subscription) { /* refresh existing subscription */ subscription->expires = time(NULL)+duration; } else { /* add new subscription */ subscription = coap_new_subscription(ctx, &uri, &(node->remote), time(NULL)+duration); if (subscription) { if (token.length) { /* TODO: copy token into subscription->token */ subscription->token.s = (unsigned char *)coap_malloc(token.length); if (subscription->token.s) { subscription->token.length = token.length; memcpy(subscription->token.s, token.s, token.length); } /* FIXME: else error? */ } coap_add_subscription(ctx, subscription); } } } /* add a block option when it has been requested explicitly or * there is more data available */ if ( block || !finished ) { blk = (blk & ~0x08) | (!finished << 3); /* add block option to PDU */ coap_add_option(pdu, COAP_OPTION_BLOCK, coap_encode_var_bytes(optbuf, blk), optbuf); } /* We will add contents only when it is not empty. This might lead * to problems when this is the last block of a sequence of more * than one block. For now, we ignore this problem as it can * happen only when the block sizes have changed. */ if (!coap_add_data(pdu, blklen, buf)) { /* FIXME: handle this case -- must send 500 or something */ } } ok: return pdu; } int write_file(char *filename, unsigned char *text, int length) { FILE *file; ssize_t written; file = fopen(filename, "w"); if ( !file ) { perror("write_file: fopen"); return 0; } written = fwrite(text, 1, length, file); fclose(file); return written; } coap_pdu_t * handle_put(coap_context_t *ctx, coap_queue_t *node, void *data) { coap_uri_t uri; coap_opt_t *tok; coap_pdu_t *pdu; coap_resource_t *resource; ssize_t written, length; struct stat statbuf; static char filename[FILENAME_MAX+1]; if ( !coap_get_request_uri( node->pdu, &uri ) ) return NULL; /* we do not want to create the resource if not available */ if ( !(resource = coap_get_resource(ctx, &uri)) ) return new_response(ctx, node, COAP_RESPONSE_404); if (!resource->writable) return new_response(ctx, node, COAP_RESPONSE_400); if ( !(pdu = new_response(ctx, node, COAP_RESPONSE_200)) ) return NULL; /* create a zero-terminated string */ memcpy(filename, uri.path.s, uri.path.length); filename[uri.path.length] = '\0'; length = (unsigned char *)node->pdu->hdr + node->pdu->length - node->pdu->data; written = write_file(filename, node->pdu->data, length); /* set etag from file's modification time (byte-order does not care) */ if ( (stat(filename, &statbuf) == 0) && S_ISREG(statbuf.st_mode) ) { memcpy(resource->etag, &statbuf.st_mtime, sizeof(resource->etag)); } else { /* clear etag */ *resource->etag = 0; } if (written < length) return new_response(ctx, node, COAP_RESPONSE_500); tok = coap_check_option(node->pdu, COAP_OPTION_CONTENT_TYPE); resource->mediatype = tok ? *COAP_OPT_VALUE(*tok) : COAP_MEDIATYPE_ANY; resource->dirty = 1; /* mark for notification of observers */ return pdu; } int resource_from_file(coap_uri_t *uri, coap_tid_t *id, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method); coap_pdu_t * handle_post(coap_context_t *ctx, coap_queue_t *node, void *data) { coap_uri_t uri; coap_pdu_t *pdu; coap_resource_t *r; coap_opt_t *tok; ssize_t written, length; int namelen; char name[60]; struct stat statbuf; if ( !coap_get_request_uri( node->pdu, &uri ) ) return NULL; /* existing stuff can be handled using put for now */ if (coap_get_resource(ctx, &uri)) return handle_put(ctx, node, data); /* create new resource */ if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) return new_response(ctx, node, COAP_RESPONSE_500); tok = coap_check_option(node->pdu, COAP_OPTION_CONTENT_TYPE); /* Create a new resource to store the given contents in the local * file system. We restrict the storage area to DATASINK_PREFIX. */ memset(name, 0, sizeof(name)); namelen = snprintf(name, sizeof(name)-1, DATASINK_PREFIX "%lX", coap_uri_hash(&uri)); r->uri = coap_new_uri((unsigned char *)name, namelen); r->name = coap_new_string(uri.path.length); if (r->name) { r->name->length = uri.path.length; memcpy(r->name->s, uri.path.s, r->name->length); } r->mediatype = tok ? *COAP_OPT_VALUE(*tok) : COAP_MEDIATYPE_ANY; r->dirty = 1; r->writable = 1; r->data = resource_from_file; /* we know that r->uri.s is zero-terminated */ length = (unsigned char *)node->pdu->hdr + node->pdu->length - node->pdu->data; written = write_file((char *)r->uri->path.s, node->pdu->data, length); /* set etag from file's modification time (byte-order does not care) */ if ( (stat((char *)r->uri->path.s, &statbuf) == 0) && S_ISREG(statbuf.st_mode) ) { memcpy(r->etag, &statbuf.st_mtime, sizeof(r->etag)); } else { /* clear etag */ *r->etag = 0; } if (written < length) { coap_free(r); return new_response(ctx, node, COAP_RESPONSE_500); } else coap_add_resource(ctx, r); /* create the response */ pdu = new_response(ctx, node, COAP_RESPONSE_201); /* add location header */ coap_add_option(pdu, COAP_OPTION_LOCATION, namelen, (unsigned char *)name); /* we do not need the request URI, only a token, if specified */ tok = coap_check_option(node->pdu, COAP_OPTION_TOKEN); if (tok) coap_add_option(pdu, COAP_OPTION_TOKEN, COAP_OPT_LENGTH(*tok), COAP_OPT_VALUE(*tok)); return pdu; } coap_pdu_t * handle_delete(coap_context_t *ctx, coap_queue_t *node, void *data) { coap_uri_t uri; coap_pdu_t *pdu; coap_resource_t *r; coap_opt_t *tok; static char filename[FILENAME_MAX+1]; if ( !coap_get_request_uri( node->pdu, &uri ) ) return NULL; r = coap_get_resource(ctx, &uri); if (!r) return new_response(ctx, node, COAP_RESPONSE_404); if (!r->writable) { debug("tried to remove resource that is read-only\n"); pdu = new_response(ctx, node, COAP_RESPONSE_400); coap_add_data(pdu, 9, (unsigned char *)"forbidden"); return pdu; } if (FILENAME_MAX < uri.path.length) return new_response(ctx, node, COAP_RESPONSE_500); memcpy(filename, uri.path.s, uri.path.length); filename[uri.path.length] = '\0'; debug("unlink %s\n", filename); unlink(filename); /* create the response */ pdu = new_response(ctx, node, COAP_RESPONSE_200); if (uri.na.length) coap_add_option(pdu, COAP_OPTION_URI_AUTHORITY, uri.na.length, uri.na.s); if (uri.path.length) coap_add_option(pdu, COAP_OPTION_URI_PATH, uri.path.length, uri.path.s); tok = coap_check_option(node->pdu, COAP_OPTION_TOKEN); if (tok) coap_add_option(pdu, COAP_OPTION_TOKEN, COAP_OPT_LENGTH(*tok), COAP_OPT_VALUE(*tok)); if (uri.query.length) coap_add_option(pdu, COAP_OPTION_URI_QUERY, uri.query.length, uri.query.s); coap_delete_resource(ctx, coap_uri_hash(&uri)); return pdu; } void message_handler(coap_context_t *ctx, coap_queue_t *node, void *data) { coap_pdu_t *pdu = NULL; #ifndef NDEBUG debug("** process pdu: "); coap_show_pdu( node->pdu ); #endif if ( node->pdu->hdr->version != COAP_DEFAULT_VERSION ) { debug("dropped packet with unknown version %u\n", node->pdu->hdr->version); return; } switch (node->pdu->hdr->code) { case COAP_REQUEST_GET : pdu = handle_get(ctx, node, data); if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ) pdu = new_rst( ctx, node, COAP_RESPONSE_500 ); break; case COAP_REQUEST_PUT: pdu = handle_put(ctx, node, data); if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ) pdu = new_response( ctx, node, COAP_RESPONSE_400 ); break; case COAP_REQUEST_POST: pdu = handle_post(ctx, node, data); if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ) pdu = new_response( ctx, node, COAP_RESPONSE_400 ); break; case COAP_REQUEST_DELETE: pdu = handle_delete(ctx, node, data); if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ) pdu = new_response( ctx, node, COAP_RESPONSE_400 ); break; default: if ( node->pdu->hdr->type == COAP_MESSAGE_CON ) { if ( node->pdu->hdr->code >= COAP_RESPONSE_100 ) pdu = new_rst( ctx, node, COAP_RESPONSE_500 ); else { debug("request method not implemented: %u\n", node->pdu->hdr->code); pdu = new_rst( ctx, node, COAP_RESPONSE_405 ); } } } if ( pdu && coap_send( ctx, &node->remote, pdu ) == COAP_INVALID_TID ) { debug("message_handler: error sending reponse"); coap_delete_pdu(pdu); } } void usage( const char *program, const char *version) { const char *p; p = strrchr( program, '/' ); if ( p ) program = ++p; fprintf( stderr, "%s v%s -- a small CoAP implementation\n" "(c) 2010 Olaf Bergmann \n\n" "usage: %s [-g group] [-p port] URI\n\n" "\tURI can be an absolute or relative coap URI,\n" "\t-g group\tjoin the given multicast group\n" "\t-p port\t\tlisten on specified port\n", program, version, program ); } int join( coap_context_t *ctx, char *group_name ){ struct ipv6_mreq mreq; struct addrinfo *reslocal = NULL, *resmulti = NULL, hints, *ainfo; int result = -1; /* we have to resolve the link-local interface to get the interface id */ memset(&hints, 0, sizeof(hints)); hints.ai_family = AF_INET6; hints.ai_socktype = SOCK_DGRAM; result = getaddrinfo("::", NULL, &hints, &reslocal); if ( result < 0 ) { perror("join: cannot resolve link-local interface"); goto finish; } /* get the first suitable interface identifier */ for (ainfo = reslocal; ainfo != NULL; ainfo = ainfo->ai_next) { if ( ainfo->ai_family == AF_INET6 ) { mreq.ipv6mr_interface = ((struct sockaddr_in6 *)ainfo->ai_addr)->sin6_scope_id; break; } } memset(&hints, 0, sizeof(hints)); hints.ai_family = AF_INET6; hints.ai_socktype = SOCK_DGRAM; /* resolve the multicast group address */ result = getaddrinfo(group_name, NULL, &hints, &resmulti); if ( result < 0 ) { perror("join: cannot resolve multicast address"); goto finish; } for (ainfo = resmulti; ainfo != NULL; ainfo = ainfo->ai_next) { if ( ainfo->ai_family == AF_INET6 ) { mreq.ipv6mr_multiaddr = ((struct sockaddr_in6 *)ainfo->ai_addr)->sin6_addr; break; } } result = setsockopt( ctx->sockfd, IPPROTO_IPV6, IPV6_JOIN_GROUP, (char *)&mreq, sizeof(mreq) ); if ( result < 0 ) perror("join: setsockopt"); finish: freeaddrinfo(resmulti); freeaddrinfo(reslocal); return result; } int print_link(coap_resource_t *resource, unsigned char *buf, size_t buflen) { size_t n = 0; assert(resource); assert(buf); if (buflen < resource->uri->path.length + 3) return -1; /* FIXME: calculate maximum length and return if longer than buflen */ buf[n++] = '<'; buf[n++] = '/'; memcpy(buf + n, resource->uri->path.s, resource->uri->path.length); n += resource->uri->path.length; buf[n++] = '>'; if (resource->mediatype != COAP_MEDIATYPE_ANY) { if (buflen - n < 7) /* mediatype is at most 3 digits */ return -1; n += snprintf((char *)(buf + n), buflen - n, ";ct=%d", resource->mediatype); } if (resource->name) { if (buflen - n < resource->name->length + 5) /* include trailing quote */ return -1; memcpy(buf + n, ";n=\"", 4); n += 4; memcpy(buf + n, resource->name->s, resource->name->length); n += resource->name->length; if (!resource->writable) { if (buflen - n < 12) return -1; n += snprintf((char *)(buf + n), buflen - n, " (read-only)"); } buf[n++] = '"'; } return n; } int resource_wellknown(coap_context_t *ctx, coap_resource_t *resource, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished) { #define RESOURCE_BUFLEN 4000 static unsigned char resources[RESOURCE_BUFLEN]; size_t maxlen = 0; int n; coap_list_t *node; assert(ctx); assert(resource); /* first, update the link-set */ for (node = ctx->resources; node; node = node->next) { n = print_link(COAP_RESOURCE(node), resources + maxlen, RESOURCE_BUFLEN - maxlen); if (n <= 0) { /* error */ debug("resource description too long, truncating\n"); resources[maxlen] = '\0'; break; } maxlen += n; if (node->next) /* check if another entry follows */ resources[maxlen++] = ','; else /* no next, terminate string */ resources[maxlen] = '\0'; } *finished = 1; switch (*mediatype) { case COAP_MEDIATYPE_ANY : case COAP_MEDIATYPE_APPLICATION_LINK_FORMAT : *mediatype = COAP_MEDIATYPE_APPLICATION_LINK_FORMAT; break; default : *buflen = 0; return COAP_RESPONSE_415; } if ( offset > maxlen ) { *buflen = 0; return COAP_RESPONSE_400; } else if ( offset + *buflen > maxlen ) *buflen = maxlen - offset; memcpy(buf, resources + offset, *buflen); *finished = offset + *buflen == maxlen; return COAP_RESPONSE_200; } int resource_time(coap_uri_t *uri, coap_tid_t *id, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method) { static unsigned char b[400]; size_t maxlen; time_t now; struct tm *tlocal; time(&now); tlocal = localtime(&now); *finished = 1; if ( !tlocal ) { *buflen = 0; return COAP_RESPONSE_500; } switch (*mediatype) { case COAP_MEDIATYPE_ANY : case COAP_MEDIATYPE_TEXT_PLAIN : *mediatype = COAP_MEDIATYPE_TEXT_PLAIN; maxlen = strftime(resource_buf, sizeof(b), "%b %d %H:%M:%S", tlocal); break; case COAP_MEDIATYPE_TEXT_XML : case COAP_MEDIATYPE_APPLICATION_XML : maxlen = strftime(resource_buf, sizeof(b), "\n %Y-%m-%d\n \n %S\n", tlocal); break; default : *buflen = 0; return COAP_RESPONSE_415; } if ( offset > maxlen ) { *buflen = 0; return COAP_RESPONSE_400; } else if ( offset + *buflen > maxlen ) *buflen = maxlen - offset; memcpy(buf, resource_buf + offset, *buflen); *finished =offset + *buflen == maxlen; return COAP_RESPONSE_200; } int resource_lipsum(coap_uri_t *uri, coap_tid_t *id, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method) { static unsigned char verylargebuf[] = "Lorem ipsum dolor sit amet, consectetur adipiscing elit. Mauris fermentum, lacus elementum venenatis aliquet, tortor risus laoreet sapien, a vulputate libero dolor ut odio. Vivamus congue elementum fringilla. Suspendisse porttitor, lectus sed gravida volutpat, dolor magna gravida massa, id fermentum lectus mi quis erat. Suspendisse lacinia, libero in euismod bibendum, magna nisi tempus lacus, eu suscipit augue nisi vel nulla. Praesent gravida lacus nec elit vestibulum sit amet rhoncus dui fringilla. Quisque diam lacus, ullamcorper non consectetur vitae, pellentesque eget lectus. Vestibulum velit nulla, venenatis vel mattis at, scelerisque nec mauris. Nulla facilisi. Mauris vel erat mi. Morbi et nulla nibh, vitae cursus eros. In convallis, magna egestas dictum porttitor, diam magna sagittis nisi, rhoncus tincidunt ligula felis sed mauris. Pellentesque pulvinar ante id velit convallis in porttitor justo imperdiet. Curabitur viverra placerat tincidunt. Vestibulum justo lacus, sollicitudin in facilisis vel, tempus nec erat. Duis varius viverra aliquet. In tempor varius elit vel pharetra. Sed mattis, quam in pulvinar ullamcorper, est ipsum tempor dui, at fringilla magna sem in sapien. Phasellus sollicitudin ornare sem, nec porta libero tempus vitae. Maecenas posuere pulvinar dictum. Vestibulum ante ipsum primis in faucibus orci luctus et ultrices posuere cubilia Curae; Cras eros mauris, pulvinar tempor facilisis ut, condimentum in magna. Nullam eget ipsum sit amet lacus massa nunc."; unsigned int maxlen = sizeof(verylargebuf) - 1; switch (*mediatype) { case COAP_MEDIATYPE_ANY : case COAP_MEDIATYPE_TEXT_PLAIN : *mediatype = COAP_MEDIATYPE_TEXT_PLAIN; break; default : *buflen = 0; *finished = 1; return COAP_RESPONSE_415; } if ( offset > maxlen ) { *buflen = 0; return COAP_RESPONSE_400; } else if ( offset + *buflen > maxlen ) *buflen = maxlen - offset; memcpy(buf, verylargebuf + offset, *buflen); *finished = offset + *buflen == maxlen; return COAP_RESPONSE_200; } int _resource_from_dir(char *filename, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished) { DIR *dir; struct dirent *dirent; size_t namelen, overhead; int pos = 0; *finished = 1; switch (*mediatype) { case COAP_MEDIATYPE_ANY : case COAP_MEDIATYPE_APPLICATION_LINK_FORMAT: *mediatype = COAP_MEDIATYPE_APPLICATION_LINK_FORMAT; break; /* case COAP_MEDIATYPE_TEXT_PLAIN: */ /* break; */ default: *buflen = 0; return COAP_RESPONSE_415; } if ( (dir = opendir(filename)) == NULL ) { perror("_resource_from_dir: opendir"); *buflen = 0; return COAP_RESPONSE_404; } overhead = strlen(filename) + 10; errno = 0; while ( (dirent = readdir(dir)) ) { namelen = strlen(dirent->d_name); /* skip '.' and '..' as they are not allowed in CoAP URIs */ if ( dirent->d_name[0] == '.' ) { if ( namelen == 1 || (namelen == 2 && dirent->d_name[1] == '.') ) continue; } if (pos + overhead + namelen * 2 > sizeof(resource_buf) - 1) break; /* broken */ if ( pos + overhead + namelen * 2 < offset) { offset -= overhead + namelen * 2; } else { pos += sprintf(resource_buf + pos, ";n=\"%s\",", filename, dirent->d_name, dirent->d_name); } if ( pos > offset + *buflen ) break; } if (errno != 0) goto error; closedir(dir); if ( pos <= offset ) { *buflen = 0; return COAP_RESPONSE_400; } if ( (offset < pos) && (pos <= offset + *buflen) ) { *buflen = pos - offset - 1; *finished = 1; } else *finished = 0; memcpy(buf, resource_buf + offset, *buflen); return COAP_RESPONSE_200; error: perror("_resource_from_dir: readdir"); closedir(dir); return COAP_RESPONSE_500; } int resource_from_file(coap_uri_t *uri, coap_tid_t *id, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method) { static char filename[FILENAME_MAX+1]; struct stat statbuf; FILE *file; int code = COAP_RESPONSE_500; /* result code */ if (uri) { memcpy(filename, uri->path.s, uri->path.length); filename[uri->path.length] = '\0'; if (!is_valid("", (unsigned char *)filename, uri->path.length) ) { fprintf(stderr, "dropped invalid URI '%s'\n", filename); code = COAP_RESPONSE_404; goto error; } } else { fprintf(stderr, "dropped NULL URI\n"); code = COAP_RESPONSE_404; goto error; } if (stat(filename, &statbuf) < 0) { perror("resource_from_file: stat"); code = COAP_RESPONSE_404; goto error; } if ( S_ISDIR(statbuf.st_mode) ) { /* handle directory if mediatype allows */ return _resource_from_dir(filename, mediatype, offset, buf, buflen, finished); } if ( !S_ISREG(statbuf.st_mode) ) { fprintf(stderr,"%s not a regular file, skipped\n", filename); code = COAP_RESPONSE_404; goto error; } if ( offset > statbuf.st_size ) { code = COAP_RESPONSE_400; goto error; } else if ( offset + *buflen > statbuf.st_size ) *buflen = statbuf.st_size - offset; file = fopen(filename, "r"); if ( !file ) { perror("resource_from_file: fopen"); code = COAP_RESPONSE_500; goto error; } if ( fseek(file, offset, SEEK_SET) < 0 ) { perror("resource_from_file: fseek"); code = COAP_RESPONSE_500; goto error; } *buflen = fread(buf, 1, *buflen, file); fclose(file); *finished = offset + *buflen >= statbuf.st_size; return COAP_RESPONSE_200; error: *buflen = 0; *finished = 1; return code; } int resource_ni(coap_uri_t *uri, coap_tid_t *id, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method) { *finished = 1; return COAP_RESPONSE_200; } #define RESOURCE_SET_URI(r,st) \ (r)->uri = coap_new_uri((const unsigned char *)(st), strlen(st)); #define RESOURCE_SET_DESC(r,st) \ (r)->name = coap_new_string(strlen(st)); \ if ((r)->name) { \ (r)->name->length = strlen(st); \ memcpy((r)->name->s, (st), (r)->name->length); \ } void init_resources(coap_context_t *ctx) { static const char *u_lipsum = "/lipsum"; static const char *d_lipsum = "some large text to test buffer sizes ( marks its end)"; static const char *u_time = "/time"; static const char *d_time = "server's local time and date"; static const char *u_file = "/filestorage"; static const char *d_file = "a single file, you can PUT things here"; static const char *u_data = "/data-sink"; static const char *d_data = "POSTed data is stored here"; static const char *u_ni = "/ni"; static const char *d_ni = "node integrate"; coap_resource_t *r; if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) return; memset(r, 0, sizeof(coap_resource_t)); r->uri = coap_new_uri((const unsigned char *)"/" COAP_DEFAULT_URI_WELLKNOWN, sizeof(COAP_DEFAULT_URI_WELLKNOWN)); r->mediatype = COAP_MEDIATYPE_APPLICATION_LINK_FORMAT; r->dirty = 0; r->writable = 0; coap_add_resource( ctx, r ); if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) return; memset(r, 0, sizeof(coap_resource_t)); RESOURCE_SET_URI(r,u_lipsum); RESOURCE_SET_DESC(r,d_lipsum); r->mediatype = COAP_MEDIATYPE_TEXT_PLAIN; r->dirty = 1; r->writable = 0; r->data = resource_lipsum; r->maxage = 1209600; /* two weeks */ coap_add_resource( ctx, r ); if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) return; memset(r, 0, sizeof(coap_resource_t)); RESOURCE_SET_URI(r,u_time); RESOURCE_SET_DESC(r,d_time); r->mediatype = COAP_MEDIATYPE_ANY; r->dirty = 0; r->writable = 0; r->data = resource_time; r->maxage = 1; coap_add_resource( ctx, r ); if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) return; memset(r, 0, sizeof(coap_resource_t)); RESOURCE_SET_URI(r,u_file); RESOURCE_SET_DESC(r,d_file); r->mediatype = COAP_MEDIATYPE_ANY; r->dirty = 0; r->writable = 1; r->data = resource_from_file; write_file("filestorage",(unsigned char *)"initial text", 12); coap_add_resource( ctx, r ); if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) return; memset(r, 0, sizeof(coap_resource_t)); RESOURCE_SET_URI(r,u_data); RESOURCE_SET_DESC(r,d_data); r->mediatype = COAP_MEDIATYPE_APPLICATION_LINK_FORMAT; r->dirty = 0; r->writable = 0; r->data = resource_from_file; r->maxage = 10; coap_add_resource(ctx, r); if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) return; memset(r, 0, sizeof(coap_resource_t)); RESOURCE_SET_URI(r,u_ni); RESOURCE_SET_DESC(r,d_ni); r->mediatype = COAP_MEDIATYPE_ANY; r->dirty = 0; r->writable = 1; r->data = resource_ni; r->maxage = 10; coap_add_resource(ctx, r); } int main(int argc, char **argv) { coap_context_t *ctx; fd_set readfds; struct timeval tv, *timeout; int result; time_t now; coap_queue_t *nextpdu; unsigned short port = COAP_DEFAULT_PORT; int opt; char *group = NULL; while ((opt = getopt(argc, argv, "g:p:")) != -1) { switch (opt) { case 'g' : group = optarg; break; case 'p' : port = atoi(optarg); break; default: usage( argv[0], PACKAGE_VERSION ); exit( 1 ); } } ctx = coap_new_context( port ); if ( !ctx ) return -1; if ( group ) join( ctx, group ); coap_register_message_handler( ctx, message_handler ); init_resources(ctx); signal(SIGINT, handle_sigint); while ( !quit ) { FD_ZERO(&readfds); FD_SET( ctx->sockfd, &readfds ); nextpdu = coap_peek_next( ctx ); time(&now); while ( nextpdu && nextpdu->t <= now ) { coap_retransmit( ctx, coap_pop_next( ctx ) ); nextpdu = coap_peek_next( ctx ); } if ( nextpdu && nextpdu->t <= now + COAP_RESOURCE_CHECK_TIME ) { /* set timeout if there is a pdu to send before our automatic timeout occurs */ tv.tv_usec = 0; tv.tv_sec = nextpdu->t - now; timeout = &tv; } else { tv.tv_usec = 0; tv.tv_sec = COAP_RESOURCE_CHECK_TIME; timeout = &tv; } result = select( FD_SETSIZE, &readfds, 0, 0, timeout ); if ( result < 0 ) { /* error */ if (errno != EINTR) perror("select"); } else if ( result > 0 ) { /* read from socket */ if ( FD_ISSET( ctx->sockfd, &readfds ) ) { coap_read( ctx ); /* read received data */ coap_dispatch( ctx ); /* and dispatch PDUs from receivequeue */ } } else { /* timeout */ coap_check_resource_list( ctx ); coap_check_subscriptions( ctx ); } } coap_free_context( ctx ); return 0; } tinyos-2.1.2+dfsg/support/sdk/c/coap/examples/tiny.c000066400000000000000000000056461207233610700224020ustar00rootroot00000000000000/* tiny -- tiny sender * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #include #include #include #include #include #include #include #include #include #include "../coap.h" static coap_tid_t id; coap_pdu_t * make_pdu( unsigned int value ) { coap_pdu_t *pdu; unsigned char enc; static unsigned char buf[20]; int len, ls; if ( ! ( pdu = coap_new_pdu() ) ) return NULL; pdu->hdr->type = COAP_MESSAGE_NON; pdu->hdr->code = COAP_REQUEST_POST; pdu->hdr->id = htons(id++); enc = COAP_PSEUDOFP_ENCODE_8_4_DOWN(value,ls); coap_add_data( pdu, 1, &enc); len = sprintf((char *)buf, "%u", COAP_PSEUDOFP_DECODE_8_4(enc)); if ( len > 0 ) { coap_add_data( pdu, len, buf ); } return pdu; } void usage( const char *program ) { const char *p; p = strrchr( program, '/' ); if ( p ) program = ++p; fprintf( stderr, "%s -- tiny fake sensor\n" "(c) 2010 Olaf Bergmann \n\n" "usage: %s [group address]\n" "\n\nSends some fake sensor values to specified multicast group\n", program, program ); } int main(int argc, char **argv) { coap_context_t *ctx; struct timeval tv; coap_pdu_t *pdu; struct sockaddr_in6 dst; int hops = 16; if ( argc > 1 && strncmp(argv[1], "-h", 2) == 0 ) { usage( argv[0] ); exit( 1 ); } ctx = coap_new_context(0); if ( !ctx ) return -1; id = rand() & INT_MAX; memset(&dst, 0, sizeof(struct sockaddr_in6 )); dst.sin6_family = AF_INET6; inet_pton( AF_INET6, argc > 1 ? argv[1] : "::1", &dst.sin6_addr ); dst.sin6_port = htons( COAP_DEFAULT_PORT ); if ( IN6_IS_ADDR_MULTICAST(&dst.sin6_addr) ) { /* set socket options for multicast */ if ( setsockopt( ctx->sockfd, IPPROTO_IPV6, IPV6_MULTICAST_HOPS, (char *)&hops, sizeof(hops) ) < 0 ) perror("setsockopt: IPV6_MULTICAST_HOPS"); } while ( 1 ) { if (! (pdu = make_pdu( rand() & 0xfff ) ) ) return -1; coap_send( ctx, &dst, pdu ); tv.tv_sec = 5; tv.tv_usec = 0; select( 0, 0, 0, 0, &tv ); } coap_free_context( ctx ); return 0; } tinyos-2.1.2+dfsg/support/sdk/c/coap/list.c000066400000000000000000000042651207233610700205500ustar00rootroot00000000000000/* list.c -- CoAP list structures * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #include "mem.h" #include "list.h" int coap_insert(coap_list_t **queue, coap_list_t *node, int (*order)(void *, void *node) ) { coap_list_t *p, *q; if ( !queue || !node ) return 0; /* set queue head if empty */ if ( !*queue ) { *queue = node; return 1; } /* replace queue head if new node has to be added before the existing queue head */ q = *queue; if ( order( node->data, q->data ) < 0) { node->next = q; *queue = node; return 1; } /* search for right place to insert */ do { p = q; q = q->next; } while ( q && order( node->data, q->data ) >= 0); /* insert new item */ node->next = q; p->next = node; return 1; } int coap_delete(coap_list_t *node) { if ( !node ) return 0; if ( node->delete ) node->delete( node->data ); coap_free( node->data ); coap_free( node ); return 1; } void coap_delete_list(coap_list_t *queue) { if ( !queue ) return; coap_delete_list( queue->next ); coap_delete( queue ); } coap_list_t * coap_new_listnode(void *data, void (*delete)(void *) ) { coap_list_t *node = coap_malloc( sizeof(coap_list_t) ); if ( ! node ) { #ifndef IDENT_APPNAME perror ("coap_new_listnode: malloc"); #endif return NULL; } memset(node, 0, sizeof(coap_list_t)); node->data = data; node->delete = delete; return node; } tinyos-2.1.2+dfsg/support/sdk/c/coap/list.h000066400000000000000000000035631207233610700205550ustar00rootroot00000000000000/* list.h -- CoAP list structures * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_LIST_H_ #define _COAP_LIST_H_ struct coap_linkedlistnode { struct coap_linkedlistnode *next; void *data; /** * Callback function that is called from coap_delete to release * additional memory allocated by data Set to NULL if you do not * need this. Note that data is free'd automatically. */ void (*delete)(void *); }; typedef struct coap_linkedlistnode coap_list_t; /** * Adds node to given queue, ordered by specified order function. Returns 1 * when insert was successful, 0 otherwise. */ int coap_insert(coap_list_t **queue, coap_list_t *node, int (*order)(void *, void *) ); /* destroys specified node */ int coap_delete(coap_list_t *node); /* removes all items from given queue and frees the allocated storage */ void coap_delete_list(coap_list_t *queue); /** * Creates a new list node and adds the given data object. The memory allocated * by data will be released by coap_delete() with the new node. Returns the * new list node. */ coap_list_t *coap_new_listnode(void *data, void (*delete)(void *) ); #endif /* _COAP_LIST_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/mem.h000066400000000000000000000020261207233610700203510ustar00rootroot00000000000000/* mem.h -- CoAP memory handling * Currently, this is just a dummy for malloc/free * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_MEM_H_ #define _COAP_MEM_H_ #include #define coap_malloc(size) malloc(size) #define coap_free(size) free(size) #endif /* _COAP_MEM_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/net.c000066400000000000000000000375261207233610700203710ustar00rootroot00000000000000/* net.c -- CoAP network interface * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #ifndef IDENT_APPNAME #include #include #endif #ifndef PLATFORM_MICAZ #include #endif #ifndef IDENT_APPNAME #include #include #include #endif #include "debug.h" #include "mem.h" #include "str.h" #ifndef IDENT_APPNAME #include "subscribe.h" #endif #include "net.h" #define options_start(p) ((coap_opt_t *) ( (unsigned char *)p->hdr + sizeof ( coap_hdr_t ) )) #define options_end(p, opt) { \ unsigned char opt_code = 0, cnt; \ *opt = options_start( node->pdu ); \ for ( cnt = (p)->hdr->optcnt; cnt; --cnt ) { \ opt_code += COAP_OPT_DELTA(**opt); \ *opt = (coap_opt_t *)( (unsigned char *)(*opt) + COAP_OPT_SIZE(**opt)); \ } \ } /************************************************************************ ** some functions for debugging ************************************************************************/ #ifndef IDENT_APPNAME void for_each_option(coap_pdu_t *pdu, void (*f)(coap_opt_t *, unsigned char, unsigned int, const unsigned char *) ) { unsigned char cnt; coap_opt_t *opt; unsigned char opt_code = 0; if (! pdu ) return; opt = options_start( pdu ); for ( cnt = pdu->hdr->optcnt; cnt; --cnt ) { opt_code += COAP_OPT_DELTA(*opt); f ( opt, opt_code, COAP_OPT_LENGTH(*opt), COAP_OPT_VALUE(*opt) ); opt = (coap_opt_t *)( (unsigned char *)opt + COAP_OPT_SIZE(*opt) ); } } unsigned int print_readable( const unsigned char *data, unsigned int len, unsigned char *result, unsigned int buflen, int encode_always ) { static unsigned char hex[] = "0123456789ABCDEF"; unsigned int cnt = 0; while ( len && (cnt < buflen-1) ) { if ( !encode_always && isprint( *data ) ) { *result++ = *data; ++cnt; } else { if ( cnt+4 < buflen-1 ) { *result++ = '\\'; *result++ = 'x'; *result++ = hex[(*data & 0xf0) >> 4]; *result++ = hex[*data & 0x0f ]; cnt += 4; } else break; } ++data; --len; } *result = '\0'; return cnt; } void show( coap_opt_t *opt, unsigned char type, unsigned int len, const unsigned char *data ) { static unsigned char buf[COAP_MAX_PDU_SIZE]; print_readable( data, len, buf, COAP_MAX_PDU_SIZE, 0 ); printf(" %d:'%s'", type, buf ); } void show_data( coap_pdu_t *pdu ) { static unsigned char buf[COAP_MAX_PDU_SIZE]; unsigned int len = (int)( (unsigned char *)pdu->hdr + pdu->length - pdu->data ); print_readable( pdu->data, len, buf, COAP_MAX_PDU_SIZE, 0 ); printf("'%s'", buf); } void coap_show_pdu( coap_pdu_t *pdu ) { printf("pdu (%d bytes)", pdu->length); printf(" v:%d t:%d oc:%d c:%d id:%u", pdu->hdr->version, pdu->hdr->type, pdu->hdr->optcnt, pdu->hdr->code, ntohs(pdu->hdr->id)); if ( pdu->hdr->optcnt ) { printf(" o:"); for_each_option ( pdu, show ); } if ( pdu->data < (unsigned char *)pdu->hdr + pdu->length ) { printf("\n data:"); show_data ( pdu ); } printf("\n"); fflush(stdout); } #endif /************************************************************************/ int coap_insert_node(coap_queue_t **queue, coap_queue_t *node, int (*order)(coap_queue_t *, coap_queue_t *node) ) { coap_queue_t *p, *q; if ( !queue || !node ) return 0; /* set queue head if empty */ if ( !*queue ) { *queue = node; return 1; } /* replace queue head if PDU's time is less than head's time */ q = *queue; if ( order( node, q ) < 0) { node->next = q; *queue = node; return 1; } /* search for right place to insert */ do { p = q; q = q->next; } while ( q && order( node, q ) >= 0 ); /* insert new item */ node->next = q; p->next = node; return 1; } int coap_delete_node(coap_queue_t *node) { if ( !node ) return 0; coap_free( node->pdu ); coap_free( node ); return 1; } void coap_delete_all(coap_queue_t *queue) { if ( !queue ) return; coap_delete_all( queue->next ); coap_delete_node( queue ); } coap_queue_t * coap_new_node() { coap_queue_t *node = coap_malloc ( sizeof *node ); if ( ! node ) { #ifndef IDENT_APPNAME perror ("coap_new_node: malloc"); #endif return NULL; } memset(node, 0, sizeof *node ); return node; } coap_queue_t * coap_peek_next( coap_context_t *context ) { if ( !context || !context->sendqueue ) return NULL; return context->sendqueue; } coap_queue_t * coap_pop_next( coap_context_t *context ) { coap_queue_t *next; if ( !context || !context->sendqueue ) return NULL; next = context->sendqueue; context->sendqueue = context->sendqueue->next; next->next = NULL; return next; } #ifndef IDENT_APPNAME coap_context_t * coap_new_context(in_port_t port) { coap_context_t *c = coap_malloc( sizeof( coap_context_t ) ); struct sockaddr_in6 addr; time_t now; int reuse = 1, need_port = 1; srand( getpid() ^ time(&now) ); if ( !c ) { perror("coap_init: malloc:"); return NULL; } memset(c, 0, sizeof( coap_context_t ) ); c->sockfd = socket(AF_INET6, SOCK_DGRAM, 0); if ( c->sockfd < 0 ) { perror("coap_new_context: socket"); goto onerror; } if ( setsockopt( c->sockfd, SOL_SOCKET, SO_REUSEADDR, &reuse, sizeof(reuse) ) < 0 ) perror("setsockopt SO_REUSEADDR"); if ( port == 0 ) { port = COAP_DEFAULT_PORT; need_port = 0; } memset(&addr, 0, sizeof addr ); addr.sin6_family = AF_INET6; addr.sin6_port = htons( port ); memcpy( &addr.sin6_addr, &in6addr_any, sizeof addr.sin6_addr ); if ( bind (c->sockfd, (struct sockaddr *)&addr, sizeof addr) < 0 ) { if (need_port) { perror("coap_new_context: bind"); goto onerror; } do { addr.sin6_port = htons( ++port ); } while (bind (c->sockfd, (struct sockaddr *)&addr, sizeof addr) < 0); } return c; onerror: if ( c->sockfd >= 0 ) close ( c->sockfd ); coap_free( c ); return NULL; } void coap_free_context( coap_context_t *context ) { if ( !context ) return; coap_delete_all(context->recvqueue); coap_delete_all(context->sendqueue); coap_delete_list(context->resources); coap_delete_list(context->subscriptions); close( context->sockfd ); coap_free( context ); } #endif #ifndef IDENT_APPNAME /* releases space allocated by PDU if free_pdu is set */ coap_tid_t coap_send_impl( coap_context_t *context, const struct sockaddr_in6 *dst, coap_pdu_t *pdu, int free_pdu ) { ssize_t bytes_written; #ifndef NDEBUG char addr[INET6_ADDRSTRLEN];/* buffer space for textual represenation of destination address */ #endif if ( !context || !dst || !pdu ) return COAP_INVALID_TID; #ifndef NDEBUG if ( inet_ntop(dst->sin6_family, &dst->sin6_addr, addr, INET6_ADDRSTRLEN) == 0 ) { perror("coap_send_impl: inet_ntop"); } else { fprintf(stderr,"send to [%s]:%d:\n ",addr,ntohs(dst->sin6_port)); } coap_show_pdu( pdu ); #endif bytes_written = sendto( context->sockfd, pdu->hdr, pdu->length, 0, (const struct sockaddr *)dst, sizeof( *dst )); if ( free_pdu ) coap_delete_pdu( pdu ); if ( bytes_written < 0 ) { perror("coap_send: sendto"); return COAP_INVALID_TID; } return ntohs(pdu->hdr->id); } #else // this is defined in LibCoapAdapterP.nc for TinyOS coap_tid_t coap_send_impl( coap_context_t *context, const struct sockaddr_in6 *dst, coap_pdu_t *pdu, int free_pdu ); #endif coap_tid_t coap_send( coap_context_t *context, const struct sockaddr_in6 *dst, coap_pdu_t *pdu ) { return coap_send_impl( context, dst, pdu, 1 ); } #ifndef IDENT_APPNAME int _order_timestamp( coap_queue_t *lhs, coap_queue_t *rhs ) { return lhs && rhs && ( lhs->t < rhs->t ) ? -1 : 1; } coap_tid_t coap_send_confirmed( coap_context_t *context, const struct sockaddr_in6 *dst, coap_pdu_t *pdu ) { coap_queue_t *node; /* send once, and enter into message queue for retransmission unless * retransmission counter is reached */ node = coap_new_node(); time(&node->t); node->t += 1; /* 1 == 1 << 0 == 1 << retransmit_cnt */ memcpy( &node->remote, dst, sizeof( struct sockaddr_in6 ) ); node->pdu = pdu; if ( !coap_insert_node( &context->sendqueue, node, _order_timestamp ) ) { #ifndef NDEBUG fprintf(stderr, "coap_send_confirmed: cannot insert node:into sendqueue\n"); #endif coap_delete_node ( node ); return COAP_INVALID_TID; } return coap_send_impl( context, dst, pdu, 0 ); } coap_tid_t coap_retransmit( coap_context_t *context, coap_queue_t *node ) { if ( !context || !node ) return COAP_INVALID_TID; /* re-initialize timeout when maximum number of retransmissions are not reached yet */ if ( node->retransmit_cnt < COAP_DEFAULT_MAX_RETRANSMIT ) { node->retransmit_cnt++; node->t += ( 1 << node->retransmit_cnt ); coap_insert_node( &context->sendqueue, node, _order_timestamp ); debug("** retransmission #%d of transaction %d\n", node->retransmit_cnt, ntohs(node->pdu->hdr->id)); return coap_send_impl( context, &node->remote, node->pdu, 0 ); } /* no more retransmissions, remove node from system */ debug("** removed transaction %d\n", ntohs(node->pdu->hdr->id)); coap_delete_node( node ); return COAP_INVALID_TID; } #endif int order_transaction_id( coap_queue_t *lhs, coap_queue_t *rhs ) { return ( lhs && rhs && lhs->pdu && rhs->pdu && ( lhs->pdu->hdr->id < lhs->pdu->hdr->id ) ) ? -1 : 1; } #ifndef IDENT_APPNAME int coap_read( coap_context_t *ctx ) { static char buf[COAP_MAX_PDU_SIZE]; ssize_t bytes_read; static struct sockaddr_in6 src; socklen_t addrsize = sizeof src; coap_queue_t *node; coap_opt_t *opt; #ifndef NDEBUG static char addr[INET6_ADDRSTRLEN]; #endif bytes_read = recvfrom( ctx->sockfd, buf, COAP_MAX_PDU_SIZE, 0, (struct sockaddr *)&src, &addrsize ); if ( bytes_read < 0 ) { perror("coap_read: recvfrom"); return -1; } if ( bytes_read < sizeof(coap_hdr_t)) { #ifndef NDEBUG fprintf(stderr, "coap_read: discarded invalid frame (too small)\n" ); #endif return -1; } if (((coap_hdr_t *)buf)->version != COAP_DEFAULT_VERSION ) { #ifndef NDEBUG fprintf(stderr, "coap_read: discarded invalid frame (wrong version 0x%x)\n", ((coap_hdr_t *)buf)->version ); #endif return -1; } node = coap_new_node(); if ( !node ) return -1; node->pdu = coap_new_pdu(); if ( !node->pdu ) { coap_delete_node( node ); return -1; } time( &node->t ); memcpy( &node->remote, &src, sizeof( src ) ); /* "parse" received PDU by filling pdu structure */ memcpy( node->pdu->hdr, buf, bytes_read ); node->pdu->length = bytes_read; /* finally calculate beginning of data block */ options_end( node->pdu, &opt ); if ( (unsigned char *)node->pdu->hdr + node->pdu->length < (unsigned char *)opt ) node->pdu->data = (unsigned char *)node->pdu->hdr + node->pdu->length; else node->pdu->data = (unsigned char *)opt; /* and add new node to receive queue */ coap_insert_node( &ctx->recvqueue, node, order_transaction_id ); #ifndef NDEBUG if ( inet_ntop(src.sin6_family, &src.sin6_addr, addr, INET6_ADDRSTRLEN) == 0 ) { perror("coap_read: inet_ntop"); } else { debug("** received from [%s]:%d:\n ",addr,ntohs(src.sin6_port)); } coap_show_pdu( node->pdu ); #endif return 0; } #endif int coap_remove_transaction( coap_queue_t **queue, coap_tid_t id ) { coap_queue_t *p, *q; if ( !queue || !*queue) return 0; /* replace queue head if PDU's time is less than head's time */ q = *queue; if ( id == q->pdu->hdr->id ) { /* found transaction */ *queue = q->next; coap_delete_node( q ); #ifndef NDEBUG debug("*** removed transaction %u\n", ntohs(id)); #endif return 1; } /* search transaction to remove (only first occurence will be removed) */ do { p = q; q = q->next; } while ( q && id != q->pdu->hdr->id ); if ( q ) { /* found transaction */ p->next = q->next; coap_delete_node( q ); #ifndef NDEBUG debug("*** removed transaction %u\n", ntohs(id)); #endif return 1; } return 0; } coap_queue_t * coap_find_transaction(coap_queue_t *queue, coap_tid_t id) { if ( !queue ) return 0; for (; queue; queue = queue->next) { if (queue->pdu && queue->pdu->hdr && queue->pdu->hdr->id == id) return queue; } return NULL; } #ifdef IDENT_APPNAME // since there are no sockets in tinyos coap_tid_t coap_send_tinyos(coap_context_t *context, struct sockaddr_in6 *dst, coap_pdu_t *pdu, int free_pdu); #endif void coap_dispatch( coap_context_t *context ) { coap_queue_t *node, *sent; coap_uri_t uri; coap_opt_t *opt; int type; coap_pdu_t *response; if ( !context ) return; while ( context->recvqueue ) { node = context->recvqueue; /* remove node from recvqueue */ context->recvqueue = context->recvqueue->next; node->next = NULL; switch ( node->pdu->hdr->type ) { case COAP_MESSAGE_ACK : /* find transaction in sendqueue to stop retransmission */ coap_remove_transaction( &context->sendqueue, node->pdu->hdr->id ); break; case COAP_MESSAGE_RST : /* We have sent something the receiver disliked, so we remove * not only the transaction but also the subscriptions we might * have. */ #ifndef NDEBUG fprintf(stderr, "* got RST for transaction %u\n", ntohs(node->pdu->hdr->id) ); #endif sent = coap_find_transaction(context->sendqueue, node->pdu->hdr->id); if (sent && coap_get_request_uri(sent->pdu, &uri)) { /* The easy way: we still have the transaction that has caused * the trouble.*/ #ifndef IDENT_APPNAME coap_delete_subscription(context, coap_uri_hash(&uri), &node->remote); #endif } else { /* ?? */ } /* find transaction in sendqueue to stop retransmission */ coap_remove_transaction( &context->sendqueue, node->pdu->hdr->id ); break; case COAP_MESSAGE_NON : /* check for unknown critical options */ if ( coap_check_critical(node->pdu, &opt) != 0 ) goto cleanup; break; case COAP_MESSAGE_CON : /* check for unknown critical options */ /* get type and option */ type = coap_check_critical(node->pdu, &opt); if ( type != 0 ) { /* send error response if unknown */ response = coap_new_pdu(); if (response) { response->hdr->type = COAP_MESSAGE_RST; response->hdr->code = COAP_RESPONSE_X_242; response->hdr->id = node->pdu->hdr->id; /* add rejected option */ coap_add_option(response, type, COAP_OPT_LENGTH(*opt), COAP_OPT_VALUE(*opt)); if ( coap_send( context, &node->remote, response ) == COAP_INVALID_TID ) { #ifndef NDEBUG debug("coap_dispatch: error sending reponse"); #endif coap_delete_pdu(response); } } goto cleanup; } break; } /* pass message to upper layer if a specific handler was registered */ if ( context->msg_handler ) context->msg_handler( context, node, NULL ); cleanup: coap_delete_node( node ); } } void coap_register_message_handler( coap_context_t *context, coap_message_handler_t handler) { context->msg_handler = (void (*)( void *, coap_queue_t *, void *)) handler; } int coap_can_exit( coap_context_t *context ) { return !context || (context->recvqueue == NULL && context->sendqueue == NULL); } tinyos-2.1.2+dfsg/support/sdk/c/coap/net.h000066400000000000000000000126301207233610700203630ustar00rootroot00000000000000/* net.h -- CoAP network interface * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_NET_H_ #define _COAP_NET_H_ #include #ifdef IDENT_APPNAME #include typedef uint16_t ssize_t; #ifdef PLATFORM_MICAZ typedef uint16_t in_port_t; #endif #else #include #include #include #endif #include "pdu.h" struct coap_listnode { struct coap_listnode *next; #ifndef IDENT_APPNAME time_t t; /* when to send PDU for the next time */ #endif unsigned char retransmit_cnt; /* retransmission counter, will be removed when zero */ struct sockaddr_in6 remote; /* remote address */ coap_pdu_t *pdu; /* the CoAP PDU to send */ }; typedef struct coap_listnode coap_queue_t; /* adds node to given queue, ordered by specified order function */ int coap_insert_node(coap_queue_t **queue, coap_queue_t *node, int (*order)(coap_queue_t *, coap_queue_t *node) ); /* destroys specified node */ int coap_delete_node(coap_queue_t *node); /* removes all items from given queue and frees the allocated storage */ void coap_delete_all(coap_queue_t *queue); /* creates a new node suitable for adding to the CoAP sendqueue */ coap_queue_t *coap_new_node(); /* The CoAP stack's global state is stored in a coap_context_t object */ typedef struct { coap_list_t *resources, *subscriptions; /* FIXME: make these hash tables */ coap_queue_t *sendqueue, *recvqueue; /* FIXME make these coap_list_t */ #ifndef IDENT_APPNAME int sockfd; /* send/receive socket */ #else int tinyos_port; #endif int reqtoken; void ( *msg_handler )( void *, coap_queue_t *, void *); coap_queue_t *splitphasequeue; /* FIXME to keep the details of TinyOS splitphase responses */ } coap_context_t; typedef void (*coap_message_handler_t)( coap_context_t *, coap_queue_t *, void *); /** * Registers a new message handler that is called whenever a new PDU * was received. Note that the transactions are handled on the lower * layer previously to stop retransmissions, e.g. */ void coap_register_message_handler( coap_context_t *context, coap_message_handler_t handler); /** * Registers a new handler function that is called when a RST message * has been received. */ void coap_register_error_handler( coap_context_t *context, coap_message_handler_t handler); /* Returns the next pdu to send without removing from sendqeue. */ coap_queue_t *coap_peek_next( coap_context_t *context ); /* Returns the next pdu to send and removes it from the sendqeue. */ coap_queue_t *coap_pop_next( coap_context_t *context ); /* Creates a new coap_context_t object that will hold the CoAP stack status. If port is * set to zero, the next free port will be used as server port, starting with COAP_DEFAULT_PORT. */ coap_context_t *coap_new_context(in_port_t port); /* CoAP stack context must be released with coap_free_context() */ void coap_free_context( coap_context_t *context ); /** * Sends a confirmed CoAP message to given destination. The memory that is allocated by pdu will * be released by coap_send_confirmed(). The caller must not make any assumption on the lifetime * of pdu. */ coap_tid_t coap_send_confirmed( coap_context_t *context, const struct sockaddr_in6 *dst, coap_pdu_t *pdu ); /** * Sends a non-confirmed CoAP message to given destination. The memory that is allocated by pdu will * be released by coap_send(). The caller must not make any assumption on the lifetime of pdu. */ #ifndef IDENT_APPNAME coap_tid_t coap_send( coap_context_t *context, const struct sockaddr_in6 *dst, coap_pdu_t *pdu ); #endif /** Handles retransmissions of confirmable messages */ coap_tid_t coap_retransmit( coap_context_t *context, coap_queue_t *node ); #ifndef IDENT_APPNAME /** * Reads data from the network and tries to parse as CoAP PDU. On success, 0 is returned * and a new node with the parsed PDU is added to the receive queue in the specified context * object. */ int coap_read( coap_context_t *context ); #endif /** Removes transaction with specified id from given queue. Returns 0 if not found, 1 otherwise. */ int coap_remove_transaction( coap_queue_t **queue, coap_tid_t id ); /** * Retrieves transaction from queue. * @queue The transaction queue to be searched * @id Unique key of the transaction to find. * @return A pointer to the transaction object or NULL if not found */ coap_queue_t *coap_find_transaction(coap_queue_t *queue, coap_tid_t id); /** Dispatches the PDUs from the receive queue in given context. */ void coap_dispatch( coap_context_t *context ); /** Returns 1 if there are no messages to send or to dispatch in the context's queues. */ int coap_can_exit( coap_context_t *context ); int order_transaction_id( coap_queue_t *lhs, coap_queue_t *rhs ); #endif /* _COAP_NET_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/pdu.c000066400000000000000000000143651207233610700203670ustar00rootroot00000000000000/* pdu.c -- CoAP message structure * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #include #ifdef IDENT_APPNAME #include #else #include #endif #include "debug.h" #include "mem.h" #include "pdu.h" coap_pdu_t * coap_new_pdu() { coap_pdu_t *pdu = coap_malloc( sizeof(coap_pdu_t) + COAP_MAX_PDU_SIZE ); if (!pdu) { #ifndef IDENT_APPNAME perror("new_pdu: malloc"); #endif return NULL; } /* initialize PDU */ memset(pdu, 0, sizeof(coap_pdu_t) + COAP_MAX_PDU_SIZE ); pdu->hdr = (coap_hdr_t *) ( (unsigned char *)pdu + sizeof(coap_pdu_t) ); pdu->hdr->version = COAP_DEFAULT_VERSION; pdu->hdr->id = ntohs( COAP_INVALID_TID ); /* data points after the header; when options are added, the data pointer is moved to the back */ pdu->length = sizeof(coap_hdr_t); pdu->data = (unsigned char *)pdu->hdr + pdu->length; return pdu; } void coap_delete_pdu(coap_pdu_t *pdu) { coap_free( pdu ); } #define options_start(p) ((coap_opt_t *) ( (unsigned char *)p->hdr + sizeof ( coap_hdr_t ) )) int coap_add_option(coap_pdu_t *pdu, unsigned char type, unsigned int len, const unsigned char *data) { unsigned char cnt; coap_opt_t *opt; unsigned char opt_code = 0; if (!pdu) return -1; /* get last option from pdu to calculate the delta */ opt = options_start( pdu ); for ( cnt = pdu->hdr->optcnt; cnt; --cnt ) { opt_code += COAP_OPT_DELTA(*opt); opt = (coap_opt_t *)( (unsigned char *)opt + COAP_OPT_SIZE(*opt) ); } if ( type < opt_code ) { #ifndef NDEBUG fprintf(stderr, "options not added in correct order\n"); #endif return -1; } /* Create new option after last existing option: First check if we * need fence posts between type and last opt_code (i.e. delta > * 15), and then add actual option. */ while (type - opt_code > 15) { cnt = opt_code / COAP_OPTION_NOOP; /* add fence post */ pdu->hdr->optcnt += 1; COAP_OPT_SETLENGTH( *opt, 0 ); COAP_OPT_SETDELTA( *opt, (COAP_OPTION_NOOP * (cnt+1)) - opt_code ); opt_code += COAP_OPT_DELTA(*opt); opt = (coap_opt_t *)( (unsigned char *)opt + COAP_OPT_SIZE(*opt) ); } /* here, the actual option is added (delta <= 15) */ pdu->hdr->optcnt += 1; COAP_OPT_SETDELTA( *opt, type - opt_code ); COAP_OPT_SETLENGTH( *opt, len ); memcpy(COAP_OPT_VALUE(*opt), data, len); pdu->data = (unsigned char *)COAP_OPT_VALUE(*opt) + len ; pdu->length = pdu->data - (unsigned char *)pdu->hdr; return len; } coap_opt_t * coap_check_option(coap_pdu_t *pdu, unsigned char type) { unsigned char cnt; coap_opt_t *opt; unsigned char opt_code = 0; if (!pdu) return NULL; /* get last option from pdu to calculate the delta */ opt = options_start( pdu ); for ( cnt = pdu->hdr->optcnt; cnt && opt_code < type; --cnt ) { opt_code += COAP_OPT_DELTA(*opt); /* check if current option is the one we are looking for */ if (type == opt_code) return opt; /* yes, return */ /* goto next option */ opt = (coap_opt_t *)( (unsigned char *)opt + COAP_OPT_SIZE(*opt) ); } return NULL; } int coap_check_critical(coap_pdu_t *pdu, coap_opt_t **option) { unsigned char cnt; unsigned char opt_code = 0; if (!pdu) goto success; /* get last option from pdu to calculate the delta */ *option = options_start( pdu ); for ( cnt = pdu->hdr->optcnt; cnt; --cnt ) { opt_code += COAP_OPT_DELTA(**option); /* check if current option is critical */ if (opt_code & 0x01) { switch (opt_code) { /* skip known options */ case COAP_OPTION_CONTENT_TYPE : case COAP_OPTION_URI_AUTHORITY : case COAP_OPTION_URI_PATH : case COAP_OPTION_TOKEN : case COAP_OPTION_BLOCK : case COAP_OPTION_URI_QUERY : break; default: /* return first unknown critical option */ #ifndef NDEBUG fprintf(stderr, "coap_check_critical: unknown critical option %d\n", opt_code); #endif return opt_code; } } /* goto next option */ *option = (coap_opt_t *)( (unsigned char *)*option + COAP_OPT_SIZE(**option) ); } success: *option = NULL; return 0; } int coap_add_data(coap_pdu_t *pdu, unsigned int len, const unsigned char *data) { if ( !pdu ) return 0; if ( pdu->length + len > COAP_MAX_PDU_SIZE ) { #ifndef NDEBUG fprintf(stderr, "coap_add_data: cannot add: data too large for PDU\n"); #endif return 0; } memcpy( (unsigned char *)pdu->hdr + pdu->length, data, len ); pdu->length += len; return 1; } int coap_get_data(coap_pdu_t *pdu, unsigned int *len, unsigned char **data) { if ( !pdu ) return 0; if ( pdu->data < (unsigned char *)pdu->hdr + pdu->length ) { /* pdu contains data */ *len = (unsigned char *)pdu->hdr + pdu->length - pdu->data; *data = pdu->data; } else { /* no data, clear everything */ *len = 0; *data = NULL; } return 1; } int coap_get_request_uri(coap_pdu_t *pdu, coap_uri_t *result) { coap_opt_t *opt; if (!pdu || !result) return 0; memset(result, 0, sizeof(*result)); if ((opt = coap_check_option(pdu, COAP_OPTION_URI_AUTHORITY))) COAP_SET_STR(&result->na, COAP_OPT_LENGTH(*opt), COAP_OPT_VALUE(*opt)); if ((opt = coap_check_option(pdu, COAP_OPTION_URI_PATH))) COAP_SET_STR(&result->path, COAP_OPT_LENGTH(*opt), COAP_OPT_VALUE(*opt)); if ((opt = coap_check_option(pdu, COAP_OPTION_URI_QUERY))) COAP_SET_STR(&result->query, COAP_OPT_LENGTH(*opt), COAP_OPT_VALUE(*opt)); return 1; } #if 0 int coap_encode_pdu(coap_pdu_t *pdu) { } #endif tinyos-2.1.2+dfsg/support/sdk/c/coap/pdu.h000066400000000000000000000302131207233610700203620ustar00rootroot00000000000000/* pdu.h -- CoAP message structure * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _PDU_H_ #define _PDU_H_ #include "config.h" #include "list.h" #include "uri.h" /* pre-defined constants that reflect defaults for CoAP */ #define COAP_DEFAULT_RESPONSE_TIMEOUT 1 /* response timeout in seconds */ #define COAP_DEFAULT_MAX_RETRANSMIT 5 /* max number of retransmissions */ #define COAP_DEFAULT_PORT 61616 /* CoAP default UDP port */ #define COAP_DEFAULT_MAX_AGE 60 /* default maximum object lifetime in seconds */ #define COAP_MAX_PDU_SIZE 700 /* maximum size of a CoAP PDU */ #define COAP_DEFAULT_VERSION 1 /* version of CoAP supported */ #define COAP_DEFAULT_SCHEME "coap" /* the default scheme for CoAP URIs */ #define COAP_DEFAULT_URI_WELLKNOWN ".well-known/core" /* well-known resources URI */ /* CoAP message types */ #define COAP_MESSAGE_CON 0 /* confirmable message (requires ACK/RST) */ #define COAP_MESSAGE_NON 1 /* non-confirmable message (one-shot message) */ #define COAP_MESSAGE_ACK 2 /* used to acknowledge confirmable messages */ #define COAP_MESSAGE_RST 3 /* indicates error in received messages */ /* CoAP request methods */ #define COAP_REQUEST_GET 1 #define COAP_REQUEST_POST 2 #define COAP_REQUEST_PUT 3 #define COAP_REQUEST_DELETE 4 /* CoAP option types (be sure to update check_critical when adding options */ #define COAP_OPTION_CONTENT_TYPE 1 /* C, 8-bit uint, 1 B, 0 (text/plain) */ #define COAP_OPTION_MAXAGE 2 /* E, variable length, 1--4 B, 60 Seconds */ #define COAP_OPTION_URI_SCHEME 3 /* C, String, 1-270 B, "coap" */ #define COAP_OPTION_ETAG 4 /* E, sequence of bytes, 1-4 B, - */ #define COAP_OPTION_URI_AUTHORITY 5 /* C, String, 1-270 B, "" */ #define COAP_OPTION_LOCATION 6 /* E, String, 1-270 B, - */ #define COAP_OPTION_URI_PATH 9 /* C, String, 1-270 B, "" */ #define COAP_OPTION_TOKEN 11 /* C, Sequence of Bytes, 1-2 B, - */ #define COAP_OPTION_URI_QUERY 15 /* C, String, 1-270 B, "" */ /* option types from draft-hartke-coap-observe-01 */ #define COAP_OPTION_SUBSCRIPTION 10 /* E, Duration, 1 B, 0 */ /* selected option types from draft-bormann-coap-misc-04 */ #define COAP_OPTION_ACCEPT 8 /* E Sequence of Bytes, 1-n B, - */ #define COAP_OPTION_BLOCK 13 /* C, unsigned integer, 1--3 B, 0 */ #define COAP_OPTION_NOOP 14 /* no-op for fenceposting */ /* CoAP result codes (HTTP-Code / 100 * 40 + HTTP-Code % 100) */ #define COAP_RESPONSE_CODE(N) (((N)/100 << 5) | (N)%100) #define COAP_RESPONSE_100 40 /* 100 Continue */ #define COAP_RESPONSE_200 80 /* 200 OK */ #define COAP_RESPONSE_201 81 /* 201 Created */ #define COAP_RESPONSE_304 124 /* 304 Not Modified */ #define COAP_RESPONSE_400 160 /* 400 Bad Request */ #define COAP_RESPONSE_404 164 /* 404 Not Found */ #define COAP_RESPONSE_405 165 /* 405 Method Not Allowed */ #define COAP_RESPONSE_415 175 /* 415 Unsupported Media Type */ #define COAP_RESPONSE_500 200 /* 500 Internal Server Error */ #define COAP_RESPONSE_503 203 /* 503 Service Unavailable */ #define COAP_RESPONSE_504 204 /* 504 Gateway Timeout */ #define COAP_RESPONSE_X_240 240 /* Token Option required by server */ #define COAP_RESPONSE_X_241 241 /* Uri-Authority Option required by server */ #define COAP_RESPONSE_X_242 242 /* Critical Option not supported */ #define COAP_SPLITPHASE 300 /* Code for telling TinyOS that the splitphase resource has successfully started */ /* CoAP media type encoding */ #define COAP_MEDIATYPE_TEXT_PLAIN 0 /* text/plain (UTF-8) */ #define COAP_MEDIATYPE_TEXT_XML 1 /* text/xml (UTF-8) */ #define COAP_MEDIATYPE_TEXT_CSV 2 /* text/csv (UTF-8) */ #define COAP_MEDIATYPE_TEXT_HTML 3 /* text/html (UTF-8) */ #define COAP_MEDIATYPE_IMAGE_GIF 21 /* image/gif */ #define COAP_MEDIATYPE_IMAGE_JPEG 22 /* image/jpeg */ #define COAP_MEDIATYPE_IMAGE_PNG 23 /* image/png */ #define COAP_MEDIATYPE_IMAGE_TIFF 24 /* image/tiff */ #define COAP_MEDIATYPE_AUDIO_RAW 25 /* audio/raw */ #define COAP_MEDIATYPE_VIDEO_RAW 26 /* video/raw */ #define COAP_MEDIATYPE_APPLICATION_LINK_FORMAT 40 /* application/link-format */ #define COAP_MEDIATYPE_APPLICATION_XML 41 /* application/xml */ #define COAP_MEDIATYPE_APPLICATION_OCTET_STREAM 42 /* application/octet-stream */ #define COAP_MEDIATYPE_APPLICATION_RDF_XML 43 /* application/rdf+xml */ #define COAP_MEDIATYPE_APPLICATION_SOAP_XML 44 /* application/soap+xml */ #define COAP_MEDIATYPE_APPLICATION_ATOM_XML 45 /* application/atom+xml */ #define COAP_MEDIATYPE_APPLICATION_XMPP_XML 46 /* application/xmpp+xml */ #define COAP_MEDIATYPE_APPLICATION_EXI 47 /* application/exi */ #define COAP_MEDIATYPE_APPLICATION_X_BXML 48 /* application/x-bxml */ #define COAP_MEDIATYPE_APPLICATION_FASTINFOSET 49 /* application/fastinfoset */ #define COAP_MEDIATYPE_APPLICATION_SOAP_FASTINFOSET 50 /* application/soap+fastinfoset */ #define COAP_MEDIATYPE_APPLICATION_JSON 51 /* application/json */ #define COAP_MEDIATYPE_ANY 0xff /* any media type */ /* CoAP transaction id */ typedef unsigned short coap_tid_t; /* typedef int coap_tid_t;*/ #define COAP_INVALID_TID -1 #ifdef WORDS_BIGENDIAN typedef struct { unsigned int version:2; /* protocol version */ unsigned int type:2; /* type flag */ unsigned int optcnt:4; /* number of options following the header */ unsigned int code:8; /* request method (value 1--10) or response code (value 40-255) */ unsigned short id; /* transaction id */ } coap_hdr_t; #else typedef struct { unsigned int optcnt:4; /* number of options following the header */ unsigned int type:2; /* type flag */ unsigned int version:2; /* protocol version */ unsigned int code:8; /* request method (value 1--10) or response code (value 40-255) */ unsigned short id; /* transaction id (network byte order!) */ } coap_hdr_t; #endif #ifdef WORDS_BIGENDIAN typedef union { struct { /* short form, to be used when length < 15 */ unsigned int delta:4; /* option type (expressed as delta) */ unsigned int length:4; /* number of option bytes (15 indicates extended form) */ /* 0--14 bytes options */ } sval; struct { /* extended form, to be used when lengt==15 */ unsigned int delta:4; /* option type (expressed as delta) */ unsigned int flag:4; /* must be 15! */ unsigned int length:8; /* length - 15 */ /* 15--270 bytes options */ } lval; } coap_opt_t; #else typedef union { struct { /* short form, to be used when length < 15 */ unsigned int length:4; /* number of option bytes (15 indicates extended form) */ unsigned int delta:4; /* option type (expressed as delta) */ /* 0--14 bytes options */ } sval; struct { /* extended form, to be used when lengt==15 */ unsigned int flag:4; /* must be 15! */ unsigned int delta:4; /* option type (expressed as delta) */ unsigned int length:8; /* length - 15 */ /* 15--270 bytes options */ } lval; } coap_opt_t; #endif #define COAP_OPT_SVAL(opt) (opt).sval #define COAP_OPT_LVAL(opt) (opt).lval #define COAP_OPT_ISEXTENDED(opt) (COAP_OPT_LVAL(opt).flag == 15) /* these macros should be used to access fields from coap_opt_t */ #define COAP_OPT_DELTA(opt) COAP_OPT_SVAL(opt).delta #define COAP_OPT_SETDELTA(opt,val) COAP_OPT_SVAL(opt).delta = (val) #define COAP_OPT_LENGTH(opt) \ ( COAP_OPT_ISEXTENDED(opt) ? COAP_OPT_LVAL(opt).length + 15 : COAP_OPT_SVAL(opt).length ) #define COAP_OPT_SETLENGTH(opt,val) \ if ( (val) < 15 ) \ COAP_OPT_SVAL(opt).length = (val) & 0x0f; \ else { \ COAP_OPT_LVAL(opt).length = ((val) - 15) & 0xff; \ COAP_OPT_LVAL(opt).flag = 15; \ } #define COAP_OPT_VALUE(opt) \ ( (unsigned char *)&(opt) + ( COAP_OPT_ISEXTENDED(opt) ? 2 : 1 ) ) /* do not forget to adjust this when coap_opt_t is changed! */ #define COAP_OPT_SIZE(opt) ( COAP_OPT_LENGTH(opt) + ( COAP_OPT_ISEXTENDED(opt) ? 2: 1 ) ) /** * Structures for more convenient handling of options. (To be used with ordered * coap_list_t.) The option's data will be added to the end of the coap_option * structure (see macro COAP_OPTION_DATA). */ typedef struct { unsigned short key; /* the option key (no delta coding) */ unsigned int length; #if 0 union { unsigned int n; /* unsigned integer (1--4 bytes) */ unsigned char fp; /* pseudo-fp (currently, only (8,4) supported */ unsigned char *d; /* date (4--6 bytes) */ unsigned char *s; /* string (or sequence of bytes) */ } value; #endif } coap_option; #define COAP_OPTION_KEY(option) (option).key #define COAP_OPTION_LENGTH(option) (option).length #if 0 #define COAP_OPTION_UINT(option) (option).value.n #define COAP_OPTION_PSEUDO_FP(option) (option).value.fp #define COAP_OPTION_DATE(option) (option).value.d #define COAP_OPTION_STRING(option) (option).value.s #endif #define COAP_OPTION_DATA(option) ((unsigned char *)&(option) + sizeof(coap_option)) /** Header structure for CoAP PDUs */ typedef struct { coap_hdr_t *hdr; unsigned short length; /* PDU length (including header, options, data) */ coap_list_t *options; /* parsed options */ unsigned char *data; /* payload */ } coap_pdu_t; /** Options in coap_pdu_t are accessed with the macro COAP_OPTION. */ #define COAP_OPTION(node) ((coap_option *)(node)->options) /** * Creates a new CoAP PDU. The object is created on the heap and must be released * using delete_pdu(); */ coap_pdu_t *coap_new_pdu(); void coap_delete_pdu(coap_pdu_t *); #if 0 int coap_encode_pdu(coap_pdu_t *); #endif /** * Adds option of given type to pdu that is passed as first parameter. coap_add_option() * destroys the PDU's data, so coap_add_data must be called after all options have been * added. */ int coap_add_option(coap_pdu_t *pdu, unsigned char type, unsigned int len, const unsigned char *data); coap_opt_t *coap_check_option(coap_pdu_t *pdu, unsigned char type); /** * Checks for critical options that we do not know, as requests * containing unknown critical options must be discarded. The function * returns a pointer to the first unknown critical option in the given * pdu (hence with delta-encoded type) or NULL when no unknown critical * option was found. The return value contains the type code of the * rejected option, or zero if none was found. */ int coap_check_critical(coap_pdu_t *pdu, coap_opt_t **option); /** * Adds given data to the pdu that is passed as first parameter. Note that the PDU's * data is destroyed by coap_add_option(). */ int coap_add_data(coap_pdu_t *pdu, unsigned int len, const unsigned char *data); /** * Retrieves the length and data pointer of specified PDU. Returns 0 on error * or 1 if *len and *data have correct values. Note that these values are * destroyed with the pdu. */ int coap_get_data(coap_pdu_t *pdu, unsigned int *len, unsigned char **data); /** * Fills the given coap_uri_t object with the request URI components from * the PDU. * @param pdu the PDU * @param result the URI object to update * @return 1 if result has been updated, 0 otherwise, i.e. in case of error */ int coap_get_request_uri(coap_pdu_t *pdu, coap_uri_t *result); #endif /* _PDU_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/str.c000066400000000000000000000023051207233610700203760ustar00rootroot00000000000000/* str.c -- strings to be used in the CoAP library * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include "mem.h" #include "str.h" str *coap_new_string(size_t size) { str *s = coap_malloc(sizeof(str) + size + 1); if ( !s ) { #ifndef NDEBUG perror("coap_new_string: malloc"); #endif return NULL; } memset(s, 0, sizeof(str)); s->s = ((unsigned char *)s) + sizeof(str); return s; } void coap_delete_string(str *s) { coap_free(s); } tinyos-2.1.2+dfsg/support/sdk/c/coap/str.h000066400000000000000000000025471207233610700204130ustar00rootroot00000000000000/* str.h -- strings to be used in the CoAP library * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_STR_H_ #define _COAP_STR_H_ #include typedef struct { size_t length; /* length of string */ unsigned char *s; /* string data */ } str; #define COAP_SET_STR(st,l,v) { (st)->length = (l), (st)->s = (v); } /** * Returns a new string object with at least size bytes storage * allocated. The string must be released using coap_delete_string(); */ str *coap_new_string(size_t size); /** Deletes the given string and releases any memory allocated. */ void coap_delete_string(str *); #endif /* _COAP_STR_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/subscribe.c000066400000000000000000000251101207233610700215460ustar00rootroot00000000000000/* subscribe.c -- subscription handling for CoAP * see draft-hartke-coap-observe-01 * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #ifndef IDENT_APPNAME #include #endif #include "pdu.h" #include "mem.h" #include "encode.h" #include "debug.h" #include "subscribe.h" #define HMASK (ULONG_MAX >> 1) #ifndef IDENT_APPNAME void notify(coap_context_t *context, coap_resource_t *res, coap_subscription_t *sub, unsigned int duration, int code) { coap_pdu_t *pdu; int ls, finished=0; unsigned char ct, d; unsigned int length; #ifndef NDEBUG char addr[INET6_ADDRSTRLEN]; #endif if ( !context || !res || !sub || !(pdu = coap_new_pdu()) ) return; pdu->hdr->type = COAP_MESSAGE_CON; pdu->hdr->id = rand(); /* use a random transaction id */ pdu->hdr->code = code; /* FIXME: content-type and data (how about block?) */ if (res->uri->na.length) coap_add_option (pdu, COAP_OPTION_URI_AUTHORITY, res->uri->na.length, res->uri->na.s ); if (res->uri->path.length) coap_add_option (pdu, COAP_OPTION_URI_PATH, res->uri->path.length, res->uri->path.s); d = COAP_PSEUDOFP_ENCODE_8_4_DOWN(duration, ls); coap_add_option ( pdu, COAP_OPTION_SUBSCRIPTION, 1, &d ); if (sub->token.length) { coap_add_option (pdu, COAP_OPTION_TOKEN, sub->token.length, sub->token.s); } if (res->uri->query.length) coap_add_option (pdu, COAP_OPTION_URI_QUERY, res->uri->query.length, res->uri->query.s ); if (res->data) { length = (unsigned char *)pdu->hdr + COAP_MAX_PDU_SIZE - pdu->data; ct = res->mediatype; res->data(res->uri, &pdu->hdr->id, &ct, 0, pdu->data, &length, &finished, COAP_REQUEST_GET); /* TODO: check whether method is really always a GET */ pdu->length += length; /* TODO: add block option if not finished */ /* TODO: add mediatype */ } #ifndef NDEBUG if ( inet_ntop(AF_INET6, &(sub->subscriber.sin6_addr), addr, INET6_ADDRSTRLEN) ) { debug("*** notify for %s to [%s]:%d\n", res->uri->path.s, addr, ntohs(sub->subscriber.sin6_port)); } #endif if ( pdu && coap_send_confirmed(context, &sub->subscriber, pdu ) == COAP_INVALID_TID ) { #ifndef NDEBUG debug("coap_check_resource_list: error sending notification\n"); #endif coap_delete_pdu(pdu); } } #endif #ifndef IDENT_APPNAME void coap_check_resource_list(coap_context_t *context) { coap_list_t *res, *sub; coap_key_t key; time_t now; if ( !context || !context->resources /* || !context->subscribers */) return; time(&now); for (res = context->resources; res; res = res->next) { if ( COAP_RESOURCE(res)->dirty && COAP_RESOURCE(res)->uri ) { key = coap_uri_hash( COAP_RESOURCE(res)->uri ) ; /* is subscribed? */ for (sub = context->subscriptions; sub; sub = sub->next) { if ( COAP_SUBSCRIPTION(sub)->resource == key ) { /* notify subscriber */ notify(context, COAP_RESOURCE(res), COAP_SUBSCRIPTION(sub), COAP_SUBSCRIPTION(sub)->expires - now, COAP_RESPONSE_200); } } COAP_RESOURCE(res)->dirty = 0; } } } #endif coap_resource_t * coap_get_resource_from_key(coap_context_t *ctx, coap_key_t key) { coap_list_t *node; if (ctx) { /* TODO: use hash table for resources with key to access */ for (node = ctx->resources; node; node = node->next) { if ( key == coap_uri_hash(COAP_RESOURCE(node)->uri) ) return COAP_RESOURCE(node); } } return NULL; } coap_resource_t * coap_get_resource(coap_context_t *ctx, coap_uri_t *uri) { return uri ? coap_get_resource_from_key(ctx, coap_uri_hash(uri)) : NULL; } #ifndef IDENT_APPNAME void coap_check_subscriptions(coap_context_t *context) { time_t now; coap_list_t *node; #ifndef NDEBUG char addr[INET6_ADDRSTRLEN]; #endif if ( !context ) return; time(&now); node = context->subscriptions; while ( node && COAP_SUBSCRIPTION(node)->expires < now ) { #ifndef NDEBUG if ( inet_ntop(AF_INET6, &(COAP_SUBSCRIPTION(node)->subscriber.sin6_addr), addr, INET6_ADDRSTRLEN) ) { debug("** removed expired subscription from [%s]:%d\n", addr, ntohs(COAP_SUBSCRIPTION(node)->subscriber.sin6_port)); } #endif #if 0 notify(context, coap_get_resource_from_key(context, COAP_SUBSCRIPTION(node)->resource), COAP_SUBSCRIPTION(node), 0, COAP_RESPONSE_400); #endif context->subscriptions = node->next; coap_delete(node); node = context->subscriptions; } } #endif void coap_free_resource(void *res) { if ( res ) { coap_free(((coap_resource_t *)res)->uri); coap_delete_string(((coap_resource_t *)res)->name); } } coap_key_t _hash(coap_key_t init, const char *s) { int c; if ( s ) while ( (c = *s++) ) { init = ((init << 7) + init) + c; } return init & HMASK; } coap_key_t _hash2(coap_key_t init, const unsigned char *s, unsigned int len) { if ( len && !s ) return COAP_INVALID_HASHKEY; while ( len-- ) { init = ((init << 7) + init) + *s++; } return init & HMASK; } coap_key_t coap_uri_hash(const coap_uri_t *uri) { return uri ? _hash2(0, uri->path.s, uri->path.length) : COAP_INVALID_HASHKEY; } coap_key_t coap_add_resource(coap_context_t *context, coap_resource_t *resource) { coap_list_t *node; if ( !context || !resource ) return COAP_INVALID_HASHKEY; node = coap_new_listnode(resource, coap_free_resource); if ( !node ) return COAP_INVALID_HASHKEY; if ( !context->resources ) { context->resources = node; } else { node->next = context->resources; context->resources = node; } return coap_uri_hash( resource->uri ); } /** * Deletes the resource that is identified by key. Returns 1 if the resource was * removed, 0 on error (e.g. if no such resource exists). */ int coap_delete_resource(coap_context_t *context, coap_key_t key) { coap_list_t *prev, *node; if (!context || key == COAP_INVALID_HASHKEY) return 0; for (prev = NULL, node = context->resources; node; prev = node, node = node->next) { if (coap_uri_hash(COAP_RESOURCE(node)->uri) == key) { #ifndef NDEBUG debug("removed key %lu (%s)\n",key,COAP_RESOURCE(node)->uri->path.s); #endif if (!prev) context->resources = node->next; else prev->next = node->next; coap_delete(node); return 1; } } return 0; } #ifndef IDENT_APPNAME coap_subscription_t * coap_new_subscription(coap_context_t *context, const coap_uri_t *resource, const struct sockaddr_in6 *subscriber, time_t expiry) { coap_subscription_t *result; if ( !context || !resource || !subscriber || !(result = coap_malloc(sizeof(coap_subscription_t)))) return NULL; result->resource = coap_uri_hash(resource); result->expires = expiry; memcpy( &result->subscriber, subscriber, sizeof(struct sockaddr_in6) ); memset(&result->token, 0, sizeof(str)); return result; } coap_list_t * coap_list_push_first(coap_list_t **list, void *data, void (*delete)(void *) ) { coap_list_t *node; node = coap_new_listnode(data, delete); if ( !node || !list ) return NULL; if ( !*list ) { *list = node; } else { node->next = *list; *list = node; } return node; } int _order_subscription(void *a, void *b) { if ( !a || !b ) return a < b ? -1 : 1; return ((coap_subscription_t *)a)->expires < ((coap_subscription_t *)b)->expires ? -1 : 1; } coap_key_t coap_subscription_hash(coap_subscription_t *subscription) { if ( !subscription ) return COAP_INVALID_HASHKEY; return _hash2( subscription->resource, (unsigned char *)&subscription->subscriber, sizeof(subscription->subscriber) ); } coap_key_t coap_add_subscription(coap_context_t *context, coap_subscription_t *subscription) { coap_list_t *node; if ( !context || !subscription ) return COAP_INVALID_HASHKEY; if ( !(node = coap_new_listnode(subscription, NULL)) ) return COAP_INVALID_HASHKEY; if ( !coap_insert(&context->subscriptions, node, _order_subscription ) ) { coap_free( node ); /* do not call coap_delete(), so subscription object will survive */ return COAP_INVALID_HASHKEY; } return coap_subscription_hash(subscription); } coap_subscription_t * coap_find_subscription(coap_context_t *context, coap_key_t hashkey, struct sockaddr_in6 *subscriber, str *token) { coap_list_t *node; if (!context || !subscriber || hashkey == COAP_INVALID_HASHKEY) return NULL; for (node = context->subscriptions; node; node = node->next) { if (COAP_SUBSCRIPTION(node)->resource == hashkey) { if (token) { /* do not proceed if tokens do not match */ if (token->length != COAP_SUBSCRIPTION(node)->token.length || memcmp(token->s, COAP_SUBSCRIPTION(node)->token.s, token->length) != 0) continue; } if (subscriber->sin6_port == COAP_SUBSCRIPTION(node)->subscriber.sin6_port && memcmp(&subscriber->sin6_addr, &COAP_SUBSCRIPTION(node)->subscriber.sin6_addr, sizeof(struct in6_addr)) == 0) return COAP_SUBSCRIPTION(node); } } return NULL; } int coap_delete_subscription(coap_context_t *context, coap_key_t key, struct sockaddr_in6 *subscriber) { coap_list_t *prev, *node; if (!context || !subscriber || key == COAP_INVALID_HASHKEY) return 0; for (prev = NULL, node = context->subscriptions; node; prev = node, node = node->next) { if (COAP_SUBSCRIPTION(node)->resource == key) { if (subscriber->sin6_port == COAP_SUBSCRIPTION(node)->subscriber.sin6_port && memcmp(&subscriber->sin6_addr, &COAP_SUBSCRIPTION(node)->subscriber.sin6_addr, sizeof(struct in6_addr)) == 0) { if (!prev) { context->subscriptions = node->next; coap_free(COAP_SUBSCRIPTION(node)->token.s); coap_delete(node); } else { prev->next = node->next; coap_free(COAP_SUBSCRIPTION(node)->token.s); coap_delete(node); } return 1; } } } return 0; } #endif tinyos-2.1.2+dfsg/support/sdk/c/coap/subscribe.h000066400000000000000000000154031207233610700215570ustar00rootroot00000000000000/* subscribe.h -- subscription handling for CoAP * see draft-hartke-coap-observe-01 * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_SUBSCRIBE_H_ #define _COAP_SUBSCRIBE_H_ #include "uri.h" #include "list.h" #include "pdu.h" #include "net.h" typedef unsigned long coap_key_t; /** Used to indicate that a hashkey is invalid. */ #define COAP_INVALID_HASHKEY ((coap_key_t)-1) typedef struct { coap_uri_t *uri; /* unique identifier; memory is released by coap_delete_resource() */ str *name; /* display name of the resource */ unsigned char mediatype; /* media type for resource representation */ unsigned int dirty:1; /* set to 1 if resource has changed */ unsigned int writable:1; /* set to 1 if resource can be changed using PUT */ unsigned int splitphase:1; /* set to 1 if resource is split-phase async */ unsigned int immediately; /* set to 1 if data is send immediately */ /* cache-control */ unsigned char etag[4]; /* version identifier for this resource * (zero terminated, first byte is zero if not set). */ unsigned int maxage; /* maximum cache time (zero means no Max-age option) */ /** * Callback function that copies the resource representation into the provided data * buffer (PDU payload). finished is set to 1 to indicate that this was the last block * of buflen data for this resource representation, 0 means that data is not finished * and a subsequent call with offset updated by buflen would yield more data (i.e. * the M-bit of CoAP's block option must be set if offset and buflen are selected * accordingly. * When called, buflen must be set to the maximum length of buf that is to be filled * with the mediatype representation of the resource identified by uri. * The mediatype must be set to the requested mediatype of COAP_MEDIATYPE_ANY if * none was given. On return, the mediatype will be set to the type that is * actually used. * The return value indicates the result code that should be used in a response to * this function. */ int (*data)(coap_uri_t *uri, unsigned short *tid, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method); } coap_resource_t; typedef struct { coap_key_t resource; /* hash key for subscribed resource */ #ifndef IDENT_APPNAME time_t expires; /* expiry time of subscription */ #endif struct sockaddr_in6 subscriber; /* subscriber's address */ str token; /* subscription token */ } coap_subscription_t; #define COAP_RESOURCE(node) ((coap_resource_t *)(node)->data) #define COAP_SUBSCRIPTION(node) ((coap_subscription_t *)(node)->data) /** Checks subscribed resources for updates and notifies subscribers of changes. */ void coap_check_resource_list(coap_context_t *context); /** Removes expired subscriptions. */ void coap_check_subscriptions(coap_context_t *context); /** * Adds specified resource to the resource observation list. Returns a * unique key for the resource. The alloceted memory is released when * the resource is destroyed with coap_delete_resource(). */ coap_key_t coap_add_resource(coap_context_t *context, coap_resource_t *); /** * Deletes the resource that is identified by key. Returns 1 if the resource was * removed, 0 on error (e.g. if no such resource exists). */ int coap_delete_resource(coap_context_t *context, coap_key_t key); /** * Creates a new subscription object filled with the given data. The storage * allocated for this object must be released using coap_free(). */ #ifndef IDENT_APPNAME coap_subscription_t *coap_new_subscription(coap_context_t *context, const coap_uri_t *resource, const struct sockaddr_in6 *subscriber, time_t expiry); #endif /** * Adds the given subsription object to the observer list. * @param context The CoAP context * @param subscription A new subscription oobject created with coap_new_subscription() * @return A unique hash key for this resource or COAP_INVALID_HASHKEY on error. * The storage allocated for the subscription object is released when it is * removed from the subscription list, unless the function has returned * COAP_INVALID_HASHKEY. In this case, the storage must be released by the * caller of this function. */ coap_key_t coap_add_subscription(coap_context_t *context, coap_subscription_t *subscription); /** * Returns the subscription from subscriber for the resource identified * by hashkey. When token is not NULL the subscription must have the * same token. * @param context The CoAP context * @param hashkey The unique key that identifies the subscription * @param subscriber The subscriber's transport address * @param token If not NULL, this specifies a token given by the * subscriber to identify its subscription. * @return The requested subscription object or NULL when not found. */ coap_subscription_t * coap_find_subscription(coap_context_t *context, coap_key_t hashkey, struct sockaddr_in6 *subscriber, str *token); /** * Removes a subscription from the subscription list stored in context and * releases the storage that was allocated for this subscription. * @param context The CoAP context. * @param haskey The unique key that identifies the subscription to remove. * @return 1 if a subscription was removed, 0 otherwise. */ int coap_delete_subscription(coap_context_t *context, coap_key_t hashkey, struct sockaddr_in6 *subscriber); /** Returns a unique hash for the specified URI or COAP_INVALID_HASHKEY on error. */ coap_key_t coap_uri_hash(const coap_uri_t *uri); /** Returns a unique hash for the specified subscription or COAP_INVALID_HASHKEY on error. */ coap_key_t coap_subscription_hash(coap_subscription_t *subscription); /** Returns the resource identified by key or NULL if not found. */ coap_resource_t *coap_get_resource_from_key(coap_context_t *ctx, coap_key_t key); /** Returns the resource identified by uri or NULL if not found. */ coap_resource_t *coap_get_resource(coap_context_t *ctx, coap_uri_t *uri); #endif /* _COAP_SUBSCRIBE_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/coap/uri.c000066400000000000000000000103261207233610700203670ustar00rootroot00000000000000/* uri.c -- helper functions for URI treatment * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include #include #include #include "mem.h" #include "debug.h" #include "pdu.h" #include "uri.h" #ifndef MIN # define MIN(x,y) (x) < (y) ? (x) : (y) #endif int coap_split_uri(unsigned char *str_var, coap_uri_t *uri) { unsigned char *p; if ( !str_var || !uri ) return -1; memset( uri, 0, sizeof(coap_uri_t) ); /* find scheme */ p = str_var; while ( isalnum(*p) ) ++p; if ( *p != ':' ) { /* no scheme, reset p */ p = str_var; } else { /* scheme found, check if it is "coap" */ if (memcmp(str_var, COAP_DEFAULT_SCHEME, MIN(p - str_var, sizeof(COAP_DEFAULT_SCHEME) - 1)) != 0) { #ifndef NDEBUG debug("unknown URI scheme '%s'\n", str_var); #endif return -1; } *p++ = '\0'; /* look for network authority */ if ( strncmp( (char *)p, "//", 2 ) == 0 ) { /* have network authority */ p += 2; uri->na.s = p; /* skip NA and port so that p and str_var finally point to path */ while ( *p && *p != '/' && *p != '?') ++p; uri->na.length = p - uri->na.s; str_var = p; #if 0 /* split server address and port */ if ( *uri->na == '[' ) { /* IPv6 address reference */ p = ++uri->na; while ( *p && *p != ']' ) ++p; *p++ = '\0'; } else { /* IPv4 address or hostname */ p = uri->na; while ( *p && *p != ':' ) ++p; } if ( *p == ':' ) { /* handle port */ *p++ = '\0'; uri->port = p; } #endif } else str_var = p; /* str_var now points to the path or query if path is empty*/ } /* split path and query */ if ( *str_var == '\0' ) return 0; if (*str_var != '?') { if (*str_var == '/') /* skip leading '/' */ *str_var++ = '\0'; uri->path.s = str_var; } while (*str_var && *str_var != '?') str_var++; if (*str_var == '?') { *str_var++ = '\0'; if (*str_var) { uri->query.s = str_var; uri->query.length = strlen((char *)uri->query.s); } } if (uri->path.s) uri->path.length = strlen((char *)uri->path.s); return 0; } #define URI_DATA(uriobj) ((unsigned char *)(uriobj) + sizeof(coap_uri_t)) coap_uri_t * coap_new_uri(const unsigned char *uri, unsigned int length) { unsigned char *result = coap_malloc(length + 1 + sizeof(coap_uri_t)); if ( !result ) return NULL; memcpy(URI_DATA(result), uri, length); URI_DATA(result)[length] = '\0'; /* make it zero-terminated */ coap_split_uri( URI_DATA(result), (coap_uri_t *)result ); return (coap_uri_t *)result; } coap_uri_t * coap_clone_uri(const coap_uri_t *uri) { coap_uri_t *result; if ( !uri ) return NULL; result = (coap_uri_t *)coap_malloc( uri->query.length + uri->na.length + uri->path.length + sizeof(coap_uri_t) + 1); if ( !result ) return NULL; memset( result, 0, sizeof(coap_uri_t) ); if ( uri->na.length ) { result->na.s = URI_DATA(result); result->na.length = uri->na.length; memcpy(result->na.s, uri->na.s, uri->na.length); } if ( uri->path.length ) { result->path.s = URI_DATA(result) + uri->na.length; result->path.length = uri->path.length; memcpy(result->path.s, uri->path.s, uri->path.length); } if ( uri->query.length ) { result->query.s = URI_DATA(result) + uri->na.length + uri->path.length; result->query.length = uri->query.length; memcpy(result->query.s, uri->query.s, uri->query.length); } return result; } tinyos-2.1.2+dfsg/support/sdk/c/coap/uri.h000066400000000000000000000036771207233610700204070ustar00rootroot00000000000000/* uri.h -- helper functions for URI treatment * * Copyright (C) 2010 Olaf Bergmann * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef _COAP_URI_H_ #define _COAP_URI_H_ #include "str.h" typedef struct { str na; /* network authority */ str path; /* path */ str query; /* query part */ } coap_uri_t; /** * Splits given URI into pieces and fills the specified uri object accordingly. * URI parts that are not available will be set to NULL in uri. The function * returns -1 on error, 0 on success. Note that the passed str will be altered. */ int coap_split_uri(unsigned char *str_var, coap_uri_t *uri); /** * Creates a new coap_uri_t object from the specified URI. Returns the new * object or NULL on error. The memory allocated by the new coap_uri_t * must be released using coap_free(). * @param uri The URI path to copy. * @para length The length of uri. * @return New URI object or NULL on error. */ coap_uri_t *coap_new_uri(const unsigned char *uri, unsigned int length); /** * Clones the specified coap_uri_t object. Thie function allocates sufficient * memory to hold the coap_uri_t structure and its contents. The object must * be released with coap_free(). */ coap_uri_t *coap_clone_uri(const coap_uri_t *uri); #endif /* _COAP_URI_H_ */ tinyos-2.1.2+dfsg/support/sdk/c/sf/000077500000000000000000000000001207233610700171105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/c/sf/Makefile.am000066400000000000000000000016621207233610700211510ustar00rootroot00000000000000AUTOMAKE_OPTIONS = foreign MIGFLAGS = -D_POSIX_C_SOURCE TOS=$(shell ncc -print-tosdir) SERIAL_H = $(TOS)/lib/serial/Serial.h BUILT_SOURCES = serialpacket.h serialprotocol.h bin_PROGRAMS=sf noinst_PROGRAMS=prettylisten sflisten sfsend seriallisten serialsend noinst_LIBRARIES=libmote.a sf_SOURCES = sf.c sf_LDADD = libmote.a prettylisten_SOURCES = prettylisten.c prettylisten_LDADD = libmote.a sflisten_SOURCES = sflisten.c sflisten_LDADD = libmote.a sfsend_SOURCES = sfsend.c sfsend_LDADD = libmote.a seriallisten_SOURCES = seriallisten.c seriallisten_LDADD = libmote.a serialsend_SOURCES = serialsend.c serialsend_LDADD = libmote.a libmote_a_SOURCES = \ message.c \ serialpacket.c \ serialsource.c \ sfsource.c serialpacket.c serialpacket.h: $(SERIAL_H) mig -o serialpacket.h -c-prefix=spacket c $(SERIAL_H) serial_packet $(MIGFLAGS) serialprotocol.h: $(SERIAL_H) ncg -o $@ -c-prefix=SERIAL c $(SERIAL_H) Serial.h $(MIGFLAGS) tinyos-2.1.2+dfsg/support/sdk/c/sf/README000066400000000000000000000041331207233610700177710ustar00rootroot00000000000000Mini C-SDK for TinyOS ===================== This directory contains a mini-SDK for C, for communicating with motes running TinyOS 2.0. To build this SDK, run ./bootstrap ./configure --prefix= make in the current directory and, if you wish, "make install" to install the C-based serial forwarder in /bin. This directory contains one utility: - sf: a C-based serial forwarder: sf Starts a serial forwarder listening for TCP connections on port , and sending and receiving packets on serial port at the specified . This serial forwarder implements the standard TinyOS 2.0 serial forwarder protocol (see comments in support/sdk/java/net/tinyos/packet/SFProtocol.java for a brief overview). a library (libmote.a) supporting mote communication: - serialsource.h: send and receive packets over a serial port (supports non-blocking I/O) - sfsource.h: send and receive packets using the serial forwarder protocol - message.h: support functions for mig, to encode and decode bitfields of arbitrary size and endianness - serialpacket.h: mig-generated code to encode and decode the header of TinyOS serial active-message packets (the packets sent and received by the BaseStation application) - serialprotocol.h: ncg-generated code containing the constants describing TinyOS serial packets (from tos/lib/serial/Serial.h) and four example programs that use that library: - seriallisten: print packets received from a serial port - sflisten: print packets received from a serial forwarder - prettylisten: print packets received from a serial forwarder, using mig-generated code to decode the standard serial-active-message header - sfsend: send a packet (specified on the command line) to a serial forwarder Note that sflisten prints, and sfsend sends, raw packets. In particular, the first byte indicates the packet type (e.g., 00 for the AM-over-serial packets). For more information on serial communication to and from motes, see TEP113. For more information on using ncg and mig with C, see the nescc-mig and nescc-ncg man pages. tinyos-2.1.2+dfsg/support/sdk/c/sf/bootstrap000077500000000000000000000000751207233610700210550ustar00rootroot00000000000000mkdir config-aux aclocal autoheader autoconf automake -a -c tinyos-2.1.2+dfsg/support/sdk/c/sf/build.xml000066400000000000000000000013541207233610700207340ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/support/sdk/c/sf/configure.ac000066400000000000000000000002601207233610700213740ustar00rootroot00000000000000AC_INIT(cmotesdk, 1.0) AC_CONFIG_SRCDIR(sfsource.c) AM_CONFIG_HEADER(autoconf.h) AC_CONFIG_AUX_DIR(config-aux) AM_INIT_AUTOMAKE AC_PROG_CC AC_PROG_RANLIB AC_OUTPUT(Makefile) tinyos-2.1.2+dfsg/support/sdk/c/sf/message.c000066400000000000000000000152051207233610700207030ustar00rootroot00000000000000/* Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab */ #include #include "message.h" struct tmsg { uint8_t *data; size_t len; }; tmsg_t *new_tmsg(void *packet, size_t len) { tmsg_t *x = malloc(sizeof(tmsg_t)); if (x) { x->data = packet; x->len = len; } return x; } void free_tmsg(tmsg_t *msg) { if (msg) free(msg); } void reset_tmsg(tmsg_t *msg, void *packet, size_t len) { if (!msg) return; msg->data = packet; msg->len = len; } void *tmsg_data(tmsg_t *msg) { return msg->data; } size_t tmsg_length(tmsg_t *msg) { return msg->len; } static void (*failfn)(void); void tmsg_fail(void) { if (failfn) failfn(); } void (*tmsg_set_fail(void (*fn)(void)))(void) { void (*oldfn)(void) = failfn; failfn = fn; return oldfn; } /* Check if a specified bit field is in range for a buffer, and invoke tmsg_fail if not. Return TRUE if in range, FALSE otherwise */ static int boundsp(tmsg_t *msg, size_t offset, size_t length) { if (offset + length <= msg->len * 8) return 1; tmsg_fail(); return 0; } /* Convert 2's complement 'length' bit integer 'x' from unsigned to signed */ static int64_t u2s(uint64_t x, size_t length) { if (x & 1ULL << (length - 1)) return (int64_t)x - (1LL << length); else return x; } uint64_t tmsg_read_ule(tmsg_t *msg, size_t offset, size_t length) { uint64_t x = 0; if (boundsp(msg, offset, length)) { size_t byte_offset = offset >> 3; size_t bit_offset = offset & 7; size_t shift = 0; /* all in one byte case */ if (length + bit_offset <= 8) return (msg->data[byte_offset] >> bit_offset) & ((1 << length) - 1); /* get some high order bits */ if (offset > 0) { x = msg->data[byte_offset] >> bit_offset; byte_offset++; shift += 8 - bit_offset; length -= 8 - bit_offset; } while (length >= 8) { x |= (uint64_t)msg->data[byte_offset++] << shift; shift += 8; length -= 8; } /* data from last byte */ if (length > 0) x |= (uint64_t)(msg->data[byte_offset] & ((1 << length) - 1)) << shift; } return x; } int64_t tmsg_read_le(tmsg_t *msg, size_t offset, size_t length) { return u2s(tmsg_read_ule(msg, offset, length), length); } void tmsg_write_ule(tmsg_t *msg, size_t offset, size_t length, uint64_t x) { if (boundsp(msg, offset, length)) { size_t byte_offset = offset >> 3; size_t bit_offset = offset & 7; size_t shift = 0; /* all in one byte case */ if (length + bit_offset <= 8) { msg->data[byte_offset] = ((msg->data[byte_offset] & ~(((1 << length) - 1) << bit_offset)) | x << bit_offset); return; } /* set some high order bits */ if (bit_offset > 0) { msg->data[byte_offset] = ((msg->data[byte_offset] & ((1 << bit_offset) - 1)) | x << bit_offset); byte_offset++; shift += 8 - bit_offset; length -= 8 - bit_offset; } while (length >= 8) { msg->data[byte_offset++] = x >> shift; shift += 8; length -= 8; } /* data for last byte */ if (length > 0) msg->data[byte_offset] = (msg->data[byte_offset] & ~((1 << length) - 1)) | x >> shift; } } void tmsg_write_le(tmsg_t *msg, size_t offset, size_t length, int64_t value) { tmsg_write_ule(msg, offset, length, value); } uint64_t tmsg_read_ube(tmsg_t *msg, size_t offset, size_t length) { uint64_t x = 0; if (boundsp(msg, offset, length)) { size_t byte_offset = offset >> 3; size_t bit_offset = offset & 7; /* All in one byte case */ if (length + bit_offset <= 8) return (msg->data[byte_offset] >> (8 - bit_offset - length)) & ((1 << length) - 1); /* get some high order bits */ if (bit_offset > 0) { length -= 8 - bit_offset; x = (uint64_t)(msg->data[byte_offset] & ((1 << (8 - bit_offset)) - 1)) << length; byte_offset++; } while (length >= 8) { length -= 8; x |= (uint64_t)msg->data[byte_offset++] << length; } /* data from last byte */ if (length > 0) x |= msg->data[byte_offset] >> (8 - length); return x; } return x; } int64_t tmsg_read_be(tmsg_t *msg, size_t offset, size_t length) { return u2s(tmsg_read_ube(msg, offset, length), length); } void tmsg_write_ube(tmsg_t *msg, size_t offset, size_t length, uint64_t x) { if (boundsp(msg, offset, length)) { size_t byte_offset = offset >> 3; size_t bit_offset = offset & 7; /* all in one byte case */ if (length + bit_offset <= 8) { size_t mask = ((1 << length) - 1) << (8 - bit_offset - length); msg->data[byte_offset] = ((msg->data[byte_offset] & ~mask) | x << (8 - bit_offset - length)); return; } /* set some high order bits */ if (bit_offset > 0) { size_t mask = (1 << (8 - bit_offset)) - 1; length -= 8 - bit_offset; msg->data[byte_offset] = ((msg->data[byte_offset] & ~mask) | x >> length); byte_offset++; } while (length >= 8) { length -= 8; msg->data[byte_offset++] = x >> length; } /* data for last byte */ if (length > 0) { size_t mask = (1 << (8 - length)) - 1; msg->data[byte_offset] = ((msg->data[byte_offset] & mask) | x << (8 - length)); } } } void tmsg_write_be(tmsg_t *msg, size_t offset, size_t length, int64_t value) { tmsg_write_ube(msg, offset, length, value); } /* u2f and f2u convert raw 32-bit values to/from float. This code assumes that the floating point rep in the uint32_t values: bit 31: sign, bits 30-23: exponent, bits 22-0: mantissa matches that of a floating point value when such a value is stored in memory. */ /* Note that C99 wants us to use the union approach rather than the cast-a-pointer approach... */ union f_and_u { uint32_t u; float f; }; static float u2f(uint32_t x) { union f_and_u y = { .u = x}; return y.f; } static uint32_t f2u(float x) { union f_and_u y = { .f = x}; return y.u; } float tmsg_read_float_le(tmsg_t *msg, size_t offset) { return u2f(tmsg_read_ule(msg, offset, 32)); } void tmsg_write_float_le(tmsg_t *msg, size_t offset, float x) { tmsg_write_ule(msg, offset, 32, f2u(x)); } float tmsg_read_float_be(tmsg_t *msg, size_t offset) { return u2f(tmsg_read_ube(msg, offset, 32)); } void tmsg_write_float_be(tmsg_t *msg, size_t offset, float x) { tmsg_write_ube(msg, offset, 32, f2u(x)); } tinyos-2.1.2+dfsg/support/sdk/c/sf/message.h000066400000000000000000000116371207233610700207150ustar00rootroot00000000000000/* Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab */ #ifndef MESSAGE_H #define MESSAGE_H #include #include #ifdef __cplusplus extern "C" { #endif /** The type of message buffers */ typedef struct tmsg tmsg_t; /** Invoke the function set by tmsg_set_fail. * tmsg_fail is called by the tmsg_read and tmsg_write functions when an * out-of-buffer access is attempted. */ void tmsg_fail(void); /** Set the function that tmsg_fail should call, and return the previous * function. If the function is NULL, tmsg_fail does nothing. */ void (*tmsg_set_fail(void (*fn)(void)))(void); /** * Create a message buffer from array 'packet' of 'len' bytes */ tmsg_t *new_tmsg(void *packet, size_t len); /** * Free a message buffer. This does NOT free the underlying array. */ void free_tmsg(tmsg_t *msg); /** * Reuse an existing tmsg */ void reset_tmsg(tmsg_t *msg, void *packet, size_t len) ; /** * Return underlying array of a message buffer */ void *tmsg_data(tmsg_t *msg); /** * Return length of a message buffer */ size_t tmsg_length(tmsg_t *msg); /** * Read an unsigned little-endian integer of 'bit_length' bits from bit offset * 'bit_offset' * If the specified field is out of range for the buffer, tmsg_fail is called * and 0 is returned. */ uint64_t tmsg_read_ule(tmsg_t *msg, size_t bit_offset, size_t bit_length); /** * Read a signed little-endian integer of 'bit_length' bits from bit offset * 'bit_offset' * If the specified field is out of range for the buffer, tmsg_fail is called * and 0 is returned. */ int64_t tmsg_read_le(tmsg_t *msg, size_t bit_offset, size_t bit_length); /** * Write an unsigned little-endian integer of 'bit_length' bits to bit offset * 'bit_offset'. * If the specified field is out of range for the buffer, tmsg_fail is called * and no write occurs. */ void tmsg_write_ule(tmsg_t *msg, size_t bit_offset, size_t bit_length, uint64_t value); /** * Write a signed little-endian integer of 'bit_length' bits to bit offset * 'bit_offset'. * If the specified field is out of range for the buffer, tmsg_fail is called * and no write occurs. */ void tmsg_write_le(tmsg_t *msg, size_t bit_offset, size_t bit_length, int64_t value); /** * Read an unsigned big-endian integer of 'bit_length' bits from bit offset * 'bit_offset' * If the specified field is out of range for the buffer, tmsg_fail is called * and 0 is returned. */ uint64_t tmsg_read_ube(tmsg_t *msg, size_t bit_offset, size_t bit_length); /** * Read a signed big-endian integer of 'bit_length' bits from bit offset * 'bit_offset' * If the specified field is out of range for the buffer, tmsg_fail is called * and 0 is returned. */ int64_t tmsg_read_be(tmsg_t *msg, size_t bit_offset, size_t bit_length); /** * Write an unsigned big-endian integer of 'bit_length' bits to bit offset * 'bit_offset'. * If the specified field is out of range for the buffer, tmsg_fail is called * and no write occurs. */ void tmsg_write_ube(tmsg_t *msg, size_t bit_offset, size_t bit_length, uint64_t value); /** * Write a signed big-endian integer of 'bit_length' bits to bit offset * 'bit_offset'. * If the specified field is out of range for the buffer, tmsg_fail is called * and no write occurs. */ void tmsg_write_be(tmsg_t *msg, size_t bit_offset, size_t bit_length, int64_t value); /** * Read a 32-bit IEEE float stored in little-endian format (bit 31: sign, * bits 30-23: exponent, bits 22-0: mantissa) from bit offset 'bit_offset' * If the specified field is out of range for the buffer, tmsg_fail is called * and 0 is returned. */ float tmsg_read_float_le(tmsg_t *msg, size_t offset); /** * Write a 32-bit IEEE float in little-endian format (bit 31: sign, * bits 30-23: exponent, bits 22-0: mantissa) to bit offset 'bit_offset' * If the specified field is out of range for the buffer, tmsg_fail is called * and no write occurs. */ void tmsg_write_float_le(tmsg_t *msg, size_t offset, float x); /** * Read a 32-bit IEEE float stored in big-endian format (bit 31: sign, * bits 30-23: exponent, bits 22-0: mantissa) from bit offset 'bit_offset' * If the specified field is out of range for the buffer, tmsg_fail is called * and 0 is returned. */ float tmsg_read_float_be(tmsg_t *msg, size_t offset); /** * Write a 32-bit IEEE float in big-endian format (bit 31: sign, * bits 30-23: exponent, bits 22-0: mantissa) to bit offset 'bit_offset' * If the specified field is out of range for the buffer, tmsg_fail is called * and no write occurs. */ void tmsg_write_float_be(tmsg_t *msg, size_t offset, float x); #ifdef __cplusplus } #endif #endif tinyos-2.1.2+dfsg/support/sdk/c/sf/prettylisten.c000066400000000000000000000025721207233610700220300ustar00rootroot00000000000000#include #include #include "sfsource.h" #include "serialpacket.h" #include "serialprotocol.h" void hexprint(uint8_t *packet, int len) { int i; for (i = 0; i < len; i++) printf("%02x ", packet[i]); } int main(int argc, char **argv) { int fd; if (argc != 3) { fprintf(stderr, "Usage: %s - dump packets from a serial forwarder\n", argv[0]); exit(2); } fd = open_sf_source(argv[1], atoi(argv[2])); if (fd < 0) { fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n", argv[1], argv[2]); exit(1); } for (;;) { int len, i; uint8_t *packet = read_sf_packet(fd, &len); if (!packet) exit(0); if (len >= 1 + SPACKET_SIZE && packet[0] == SERIAL_TOS_SERIAL_ACTIVE_MESSAGE_ID) { tmsg_t *msg = new_tmsg(packet + 1, len - 1); if (!msg) exit(0); printf("dest %u, src %u, length %u, group %u, type %u\n ", spacket_header_dest_get(msg), spacket_header_src_get(msg), spacket_header_length_get(msg), spacket_header_group_get(msg), spacket_header_type_get(msg)); hexprint((uint8_t *)tmsg_data(msg) + spacket_data_offset(0), tmsg_length(msg) - spacket_data_offset(0)); free(msg); } else { printf("non-AM packet: "); hexprint(packet, len); } putchar('\n'); fflush(stdout); free((void *)packet); } } tinyos-2.1.2+dfsg/support/sdk/c/sf/seriallisten.c000066400000000000000000000017541207233610700217610ustar00rootroot00000000000000#include #include #include "serialsource.h" static char *msgs[] = { "unknown_packet_type", "ack_timeout" , "sync" , "too_long" , "too_short" , "bad_sync" , "bad_crc" , "closed" , "no_memory" , "unix_error" }; void stderr_msg(serial_source_msg problem) { fprintf(stderr, "Note: %s\n", msgs[problem]); } int main(int argc, char **argv) { serial_source src; if (argc != 3) { fprintf(stderr, "Usage: %s - dump packets from a serial port\n", argv[0]); exit(2); } src = open_serial_source(argv[1], platform_baud_rate(argv[2]), 0, stderr_msg); if (!src) { fprintf(stderr, "Couldn't open serial port at %s:%s\n", argv[1], argv[2]); exit(1); } for (;;) { int len, i; const unsigned char *packet = read_serial_packet(src, &len); if (!packet) exit(0); for (i = 0; i < len; i++) printf("%02x ", packet[i]); putchar('\n'); free((void *)packet); } } tinyos-2.1.2+dfsg/support/sdk/c/sf/serialsend.c000066400000000000000000000023711207233610700214100ustar00rootroot00000000000000#include #include #include "serialsource.h" static char *msgs[] = { "unknown_packet_type", "ack_timeout" , "sync" , "too_long" , "too_short" , "bad_sync" , "bad_crc" , "closed" , "no_memory" , "unix_error" }; void stderr_msg(serial_source_msg problem) { fprintf(stderr, "Note: %s\n", msgs[problem]); } void send_packet(serial_source src, char **bytes, int count) { int i; unsigned char *packet; packet = malloc(count); if (!packet) exit(2); for (i = 0; i < count; i++) packet[i] = strtol(bytes[i], NULL, 0); fprintf(stderr,"Sending "); for (i = 0; i < count; i++) fprintf(stderr, " %02x", packet[i]); fprintf(stderr, "\n"); if (write_serial_packet(src, packet, count) == 0) printf("ack\n"); else printf("noack\n"); } int main(int argc, char **argv) { serial_source src; if (argc < 3) { fprintf(stderr, "Usage: %s - send a raw packet to a serial port\n", argv[0]); exit(2); } src = open_serial_source(argv[1], platform_baud_rate(argv[2]), 0, stderr_msg); if (!src) { fprintf(stderr, "Couldn't open serial port at %s:%s\n", argv[1], argv[2]); exit(1); } send_packet(src, argv + 3, argc - 3); } tinyos-2.1.2+dfsg/support/sdk/c/sf/serialsource.c000066400000000000000000000507511207233610700217640ustar00rootroot00000000000000#if defined(_WIN32) && !defined(__CYGWIN__) /* Avoid confusing windows w/o cygwin w/ cygwin */ #define LOSE32 #endif #ifndef LOSE32 #include #include #include #include #include #include #include #include #include #include #include #ifdef __CYGWIN__ #include #include #else #include #endif #endif #ifdef LOSE32 #include #include #endif /* C implementation of the mote serial protocol. See net.tinyos.packet.Packetizer for more details */ #undef DEBUG #include "serialsource.h" #include "serialprotocol.h" typedef int bool; enum { #ifndef __CYGWIN__ #ifndef LOSE32 FALSE = 0, TRUE = 1, #endif #endif BUFSIZE = 256, MTU = 256, ACK_TIMEOUT = 100000, /* in us */ SYNC_BYTE = SERIAL_HDLC_FLAG_BYTE, ESCAPE_BYTE = SERIAL_HDLC_CTLESC_BYTE, P_ACK = SERIAL_SERIAL_PROTO_ACK, P_PACKET_ACK = SERIAL_SERIAL_PROTO_PACKET_ACK, P_PACKET_NO_ACK = SERIAL_SERIAL_PROTO_PACKET_NOACK, P_UNKNOWN = SERIAL_SERIAL_PROTO_PACKET_UNKNOWN }; struct packet_list { uint8_t *packet; int len; struct packet_list *next; }; struct serial_source_t { #ifndef LOSE32 int fd; #else HANDLE hComm; #endif bool non_blocking; void (*message)(serial_source_msg problem); /* Receive state */ struct { uint8_t buffer[BUFSIZE]; int bufpos, bufused; uint8_t packet[MTU]; bool in_sync, escaped; int count; struct packet_list *queue[256]; // indexed by protocol } recv; struct { uint8_t seqno; uint8_t *escaped; int escapeptr; uint16_t crc; } send; }; #ifndef LOSE32 static tcflag_t parse_baudrate(int requested) { int baudrate; switch (requested) { #ifdef B50 case 50: baudrate = B50; break; #endif #ifdef B75 case 75: baudrate = B75; break; #endif #ifdef B110 case 110: baudrate = B110; break; #endif #ifdef B134 case 134: baudrate = B134; break; #endif #ifdef B150 case 150: baudrate = B150; break; #endif #ifdef B200 case 200: baudrate = B200; break; #endif #ifdef B300 case 300: baudrate = B300; break; #endif #ifdef B600 case 600: baudrate = B600; break; #endif #ifdef B1200 case 1200: baudrate = B1200; break; #endif #ifdef B1800 case 1800: baudrate = B1800; break; #endif #ifdef B2400 case 2400: baudrate = B2400; break; #endif #ifdef B4800 case 4800: baudrate = B4800; break; #endif #ifdef B9600 case 9600: baudrate = B9600; break; #endif #ifdef B19200 case 19200: baudrate = B19200; break; #endif #ifdef B38400 case 38400: baudrate = B38400; break; #endif #ifdef B57600 case 57600: baudrate = B57600; break; #endif #ifdef B115200 case 115200: baudrate = B115200; break; #endif #ifdef B230400 case 230400: baudrate = B230400; break; #endif #ifdef B460800 case 460800: baudrate = B460800; break; #endif #ifdef B500000 case 500000: baudrate = B500000; break; #endif #ifdef B576000 case 576000: baudrate = B576000; break; #endif #ifdef B921600 case 921600: baudrate = B921600; break; #endif #ifdef B1000000 case 1000000: baudrate = B1000000; break; #endif #ifdef B1152000 case 1152000: baudrate = B1152000; break; #endif #ifdef B1500000 case 1500000: baudrate = B1500000; break; #endif #ifdef B2000000 case 2000000: baudrate = B2000000; break; #endif #ifdef B2500000 case 2500000: baudrate = B2500000; break; #endif #ifdef B3000000 case 3000000: baudrate = B3000000; break; #endif #ifdef B3500000 case 3500000: baudrate = B3500000; break; #endif #ifdef B4000000 case 4000000: baudrate = B4000000; break; #endif default: baudrate = 0; } return baudrate; } #endif #ifdef DEBUG static void dump(const char *msg, unsigned char *packet, int len) { int i; printf("%s", msg); for (i = 0; i < len; i++) printf(" %02x", packet[i]); putchar('\n'); } #endif static void message(serial_source src, serial_source_msg msg) { if (src->message) src->message(msg); } static int serial_read(serial_source src, int non_blocking, void *buffer, int n) { #ifndef LOSE32 fd_set fds; int cnt; if (non_blocking) { cnt = read(src->fd, buffer, n); /* Work around buggy usb serial driver (returns 0 when no data is available). Mac OS X seems to like to do this too (at least with a Keyspan 49WG). */ if (cnt == 0) { cnt = -1; errno = EAGAIN; } return cnt; } else for (;;) { FD_ZERO(&fds); FD_SET(src->fd, &fds); cnt = select(src->fd + 1, &fds, NULL, NULL, NULL); if (cnt < 0) return -1; cnt = read(src->fd, buffer, n); if (cnt != 0) return cnt; } #else // LOSE32 int cnt; if (non_blocking) { ReadFile(src->hComm, buffer, n, &cnt, NULL); return cnt; } else { for (;;) { DWORD eventMask; SetCommMask(src->hComm, EV_RXCHAR); if (!WaitCommEvent(src->hComm, &eventMask, NULL)) { return -1; } ReadFile(src->hComm, buffer, n, &cnt, NULL); if (cnt != 0) { return cnt; } } } #endif } serial_source open_serial_source(const char *device, int baud_rate, int non_blocking, void (*message)(serial_source_msg problem)) /* Effects: opens serial port device at specified baud_rate. If non_blocking is true, read_serial_packet calls will be non-blocking (writes are always blocking, for now at least) Returns: descriptor for serial forwarder at host:port, or NULL for failure (bad device or bad baud rate) */ { #ifndef LOSE32 struct termios newtio; int fd; tcflag_t baudflag = parse_baudrate(baud_rate); if (!baudflag) return NULL; fd = open(device, O_RDWR | O_NOCTTY | O_NONBLOCK); if (fd < 0) return NULL; #ifdef __CYGWIN__ /* For some very mysterious reason, this incantation is necessary to make the serial port work under some windows machines */ HANDLE handle = (HANDLE)get_osfhandle(fd); DCB dcb; if (!(GetCommState(handle, &dcb) && SetCommState(handle, &dcb))) { close(fd); return NULL; } #endif /* Serial port setting */ memset(&newtio, 0, sizeof(newtio)); newtio.c_cflag = CS8 | CLOCAL | CREAD; newtio.c_iflag = IGNPAR | IGNBRK; cfsetispeed(&newtio, baudflag); cfsetospeed(&newtio, baudflag); /* Raw output_file */ newtio.c_oflag = 0; if (tcflush(fd, TCIFLUSH) >= 0 && tcsetattr(fd, TCSANOW, &newtio) >= 0) { serial_source src = malloc(sizeof *src); if (src) { memset(src, 0, sizeof *src); src->fd = fd; src->non_blocking = non_blocking; src->message = message; src->send.seqno = 37; return src; } } close(fd); return NULL; #else // LOSE32 LPCTSTR ComName = (LPCTSTR)device; HANDLE hComm; DCB dcb; serial_source src; int buflen = MultiByteToWideChar(CP_ACP,0,(PCSTR)device,-1,(LPWSTR)ComName,0); MultiByteToWideChar(CP_ACP,0,(PCSTR)device,-1,(LPWSTR)ComName,buflen); //syncronize hComm = CreateFile(ComName, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL); if (hComm == INVALID_HANDLE_VALUE) { return NULL; } PurgeComm(hComm, PURGE_RXCLEAR); GetCommState(hComm, &dcb); dcb.BaudRate = baud_rate; dcb.ByteSize = 8; dcb.Parity = NOPARITY; dcb.fParity = FALSE; dcb.StopBits = ONESTOPBIT; if (SetCommState(hComm, &dcb) == 0) { return NULL; } src = malloc(sizeof *src); if (src) { memset(src, 0, sizeof *src); src->hComm = hComm; src->non_blocking = non_blocking; src->message = message; src->send.seqno = 37; } return src; #endif // LOSE32 } #ifndef LOSE32 int serial_source_fd(serial_source src) /* Returns: the file descriptor used by serial source src (useful when non-blocking reads were requested) */ { return src->fd; } #endif #ifdef LOSE32 HANDLE serial_source_handle(serial_source src) /* Returns: the file descriptor used by serial source src (useful when non-blocking reads were requested) */ { return src->hComm; } #endif int close_serial_source(serial_source src) /* Effects: closes serial source src Returns: 0 if successful, -1 if some problem occured (but source is considered closed anyway) */ { #ifndef LOSE32 int ok = close(src->fd); #else int ok = CloseHandle(src->hComm); #endif free(src); return ok; } static int source_wait(serial_source src, struct timeval *deadline) /* Effects: waits until deadline for some data on source. deadline can be NULL for indefinite waiting. Returns: 0 if data is available, -1 if the deadline expires */ { #ifndef LOSE32 struct timeval tv; fd_set fds; int cnt; if (src->recv.bufpos < src->recv.bufused) return 0; for (;;) { if (deadline) { gettimeofday(&tv, NULL); tv.tv_sec = deadline->tv_sec - tv.tv_sec; tv.tv_usec = deadline->tv_usec - tv.tv_usec; if (tv.tv_usec < 0) { tv.tv_usec += 1000000; tv.tv_sec--; } if (tv.tv_sec < 0) return -1; } FD_ZERO(&fds); FD_SET(src->fd, &fds); cnt = select(src->fd + 1, &fds, NULL, NULL, deadline ? &tv : NULL); if (cnt < 0) { if (errno == EINTR) continue; message(src, msg_unix_error); return -1; } if (cnt == 0) return -1; return 0; } #else // LOSE32 // FIXME: the deadline is ignored here DWORD eventMask; SetCommMask(src->hComm, EV_RXCHAR); if (!WaitCommEvent(src->hComm, &eventMask, NULL)) { return -1; } return 0; #endif } static int source_write(serial_source src, const void *buffer, int count) { #ifndef LOSE32 int actual = 0; if (fcntl(src->fd, F_SETFL, 0) < 0) { message(src, msg_unix_error); return -1; } while (count > 0) { int n = write(src->fd, buffer, count); if (n < 0 && errno == EINTR) continue; if (n < 0) { message(src, msg_unix_error); actual = -1; break; } count -= n; actual += n; buffer += n; } if (fcntl(src->fd, F_SETFL, O_NONBLOCK) < 0) { message(src, msg_unix_error); /* We're in trouble, but there's no obvious fix. */ } return actual; #else // LOSE32 int actual = 0; int n; const unsigned char * b = buffer; while (count > 0) { if (!WriteFile(src->hComm, b, count, &n, NULL)) { message(src, msg_unix_error); actual = -1; break; } count -= n; actual += n; b += n; } return actual; #endif } static void push_protocol_packet(serial_source src, uint8_t type, uint8_t *packet, uint8_t len) { /* I'm assuming short queues */ struct packet_list *entry = malloc(sizeof *entry), **last; if (!entry) { message(src, msg_no_memory); free(packet); return; } entry->packet = packet; entry->len = len; entry->next = NULL; last = &src->recv.queue[type]; while (*last) last = &(*last)->next; *last = entry; } static struct packet_list *pop_protocol_packet(serial_source src, uint8_t type) { struct packet_list *entry = src->recv.queue[type]; if (entry) src->recv.queue[type] = entry->next; return entry; } static bool packet_available(serial_source src, uint8_t type) { return src->recv.queue[type] != NULL; } int serial_source_empty(serial_source src) /* Returns: true if serial source does not contain any pending data, i.e., if the result is true and there is no data available on the source's file descriptor, then read_serial_packet will: - return NULL if the source is non-blocking - block if it is blocking (Note: the presence of this calls allows the serial_source to do some internal buffering) */ { return src->recv.bufpos >= src->recv.bufused && !packet_available(src, P_PACKET_NO_ACK); } /* Slow implementation of crc function */ static uint16_t crc_byte(uint16_t crc, uint8_t b) { uint8_t i; crc = crc ^ b << 8; i = 8; do if (crc & 0x8000) crc = crc << 1 ^ 0x1021; else crc = crc << 1; while (--i); return crc; } static uint16_t crc_packet(uint8_t *data, int len) { uint16_t crc = 0; while (len-- > 0) crc = crc_byte(crc, *data++); return crc; } static int read_byte(serial_source src, int non_blocking) /* Returns: next byte (>= 0), or -1 if no data available and non-blocking is true. */ { if (src->recv.bufpos >= src->recv.bufused) { for (;;) { int n = serial_read(src, non_blocking, src->recv.buffer, sizeof src->recv.buffer); if (n == 0) /* Can't occur because of serial_read bug workaround */ { message(src, msg_closed); return -1; } if (n > 0) { #ifdef DEBUG dump("raw", src->recv.buffer, n); #endif src->recv.bufpos = 0; src->recv.bufused = n; break; } #ifndef LOSE32 if (errno == EAGAIN) return -1; if (errno != EINTR) message(src, msg_unix_error); #endif } } //printf("in %02x\n", src->recv.buffer[src->recv.bufpos]); return src->recv.buffer[src->recv.bufpos++]; } static void process_packet(serial_source src, uint8_t *packet, int len); static int write_framed_packet(serial_source src, uint8_t packet_type, uint8_t first_byte, const uint8_t *packet, int count); static void read_and_process(serial_source src, int non_blocking) /* Effects: reads and processes up to one packet. */ { uint8_t *packet = src->recv.packet; for (;;) { int byte = read_byte(src, non_blocking); if (byte < 0) return; if (!src->recv.in_sync) { if (byte == SYNC_BYTE) { src->recv.in_sync = TRUE; message(src, msg_sync); src->recv.count = 0; src->recv.escaped = FALSE; } continue; } if (src->recv.count >= MTU) { message(src, msg_too_long); src->recv.in_sync = FALSE; continue; } if (src->recv.escaped) { if (byte == SYNC_BYTE) { /* sync byte following escape is an error, resync */ message(src, msg_bad_sync); src->recv.in_sync = FALSE; continue; } byte ^= 0x20; src->recv.escaped = FALSE; } else if (byte == ESCAPE_BYTE) { src->recv.escaped = TRUE; continue; } else if (byte == SYNC_BYTE) { int count = src->recv.count; uint8_t *received; uint16_t read_crc, computed_crc; src->recv.count = 0; /* ready for next packet */ if (count < 4) /* frames that are too small are ignored */ continue; received = malloc(count - 2); if (!received) { message(src, msg_no_memory); continue; } memcpy(received, packet, count - 2); read_crc = packet[count - 2] | packet[count - 1] << 8; computed_crc = crc_packet(received, count - 2); #ifdef DEBUG dump("received", packet, count); printf(" crc %x comp %x\n", read_crc, computed_crc); #endif if (read_crc == computed_crc) { process_packet(src, received, count - 2); return; /* give rest of world chance to do something */ } else { message(src, msg_bad_crc); free(received); /* We don't lose sync here. If we did, garbage on the line at startup will cause loss of the first packet. */ continue; } } packet[src->recv.count++] = byte; } } static void process_packet(serial_source src, uint8_t *packet, int len) { int packet_type = packet[0], offset = 1; if (packet_type == P_PACKET_ACK) { /* send ack */ write_framed_packet(src, P_ACK, packet[1], NULL, 0); /* And merge with un-acked packets */ packet_type = P_PACKET_NO_ACK; offset = 2; } /* packet must remain a valid pointer to pass to free. So we move the data rather than pass an internal pointer */ memmove(packet, packet + offset, len - offset); push_protocol_packet(src, packet_type, packet, len - offset); } void *read_serial_packet(serial_source src, int *len) /* Effects: Read the serial source src. If a packet is available, return it. If in blocking mode and no packet is available, wait for one. Returns: the packet read (in newly allocated memory), with *len is set to the packet length, or NULL if no packet is yet available and the serial source is in non-blocking mode */ { read_and_process(src, TRUE); for (;;) { struct packet_list *entry; entry = pop_protocol_packet(src, P_PACKET_NO_ACK); if (entry) { uint8_t *packet = entry->packet; *len = entry->len; free(entry); return packet; } if (src->non_blocking && serial_source_empty(src)) return NULL; source_wait(src, NULL); read_and_process(src, src->non_blocking); } } /* The escaper does the sync bytes+escape-like encoding+crc of packets */ static void escape_add(serial_source src, uint8_t b) { src->send.escaped[src->send.escapeptr++] = b; } static int init_escaper(serial_source src, int count) { src->send.escaped = malloc(count * 2 + 2); if (!src->send.escaped) { message(src, msg_no_memory); return -1; } src->send.escapeptr = 0; src->send.crc = 0; escape_add(src, SYNC_BYTE); return 0; } static void terminate_escaper(serial_source src) { escape_add(src, SYNC_BYTE); } static void escape_byte(serial_source src, uint8_t b) { src->send.crc = crc_byte(src->send.crc, b); if (b == SYNC_BYTE || b == ESCAPE_BYTE) { escape_add(src, ESCAPE_BYTE); escape_add(src, b ^ 0x20); } else escape_add(src, b); } static void free_escaper(serial_source src) { free(src->send.escaped); } // Write a packet of type 'packetType', first byte 'firstByte' // and bytes 2..'count'+1 in 'packet' static int write_framed_packet(serial_source src, uint8_t packet_type, uint8_t first_byte, const uint8_t *packet, int count) { int i, crc; #ifdef DEBUG printf("writing %02x %02x", packet_type, first_byte); dump("", packet, count); #endif if (init_escaper(src, count + 4) < 0) return -1; escape_byte(src, packet_type); escape_byte(src, first_byte); for (i = 0; i < count; i++) escape_byte(src, packet[i]); crc = src->send.crc; escape_byte(src, crc & 0xff); escape_byte(src, crc >> 8); terminate_escaper(src); #ifdef DEBUG dump("encoded", src->send.escaped, src->send.escapeptr); #endif if (source_write(src, src->send.escaped, src->send.escapeptr) < 0) { free_escaper(src); return -1; } free_escaper(src); return 0; } static void add_timeval(struct timeval *tv, long us) /* Specialised for this app */ { tv->tv_sec += us / 1000000; tv->tv_usec += us % 1000000; if (tv->tv_usec > 1000000) { tv->tv_usec -= 1000000; tv->tv_sec++; } } int write_serial_packet(serial_source src, const void *packet, int len) /* Effects: writes len byte packet to serial source src Returns: 0 if packet successfully written, 1 if successfully written but not acknowledged, -1 otherwise */ { struct timeval deadline; src->send.seqno++; if (write_framed_packet(src, P_PACKET_ACK, src->send.seqno, packet, len) < 0) return -1; // FIXME: the WIN32 implementation of source_wait() // disregards the deadline parameter anyway #ifndef LOSE32 gettimeofday(&deadline, NULL); add_timeval(&deadline, ACK_TIMEOUT); #endif for (;;) { struct packet_list *entry; read_and_process(src, TRUE); entry = pop_protocol_packet(src, P_ACK); if (entry) { uint8_t acked = entry->packet[0]; free(entry->packet); free(entry); if (acked == src->send.seqno) return 0; } else if (source_wait(src, &deadline) < 0) return 1; } } /* This somewhat convoluted code allows us to use a common baudrate table with the Java code. This could be improved if we generated the Java code from a common table. */ struct pargs { char *name; int rate; }; static void padd(struct pargs *args, const char *name, int baudrate) { if (!strcmp(args->name, name)) args->rate = baudrate; } static void init(void) { } int platform_baud_rate(char *platform_name) /* Returns: The baud rate of the specified platform, or -1 for unknown platforms */ { /* The Java code looks like Platform.add(Platform.x, "name", baudrate); Fake up some C stuff which will make that work right. */ struct pargs args; struct { void (*add)(struct pargs *args, const char *name, int baudrate); struct pargs *x; } Platform = { padd, &args }; static struct { struct { int packet; } tinyos; } net; if (isdigit(platform_name[0])) return atoi(platform_name); args.name = platform_name; args.rate = -1; #define class #define BaudRate #define static #define void #define throws ; #define Exception #define package #include "../../java/net/tinyos/packet/BaudRate.java" return args.rate; } tinyos-2.1.2+dfsg/support/sdk/c/sf/serialsource.h000066400000000000000000000060151207233610700217630ustar00rootroot00000000000000#ifndef SERIALSOURCE_H #define SERIALSOURCE_H #ifdef _WIN32 #include #endif #ifdef __cplusplus extern "C" { #endif typedef struct serial_source_t *serial_source; typedef enum { msg_unknown_packet_type, /* packet of unknown type received */ msg_ack_timeout, /* ack not received within timeout */ msg_sync, /* sync achieved */ msg_too_long, /* greater than MTU (256 bytes) */ msg_too_short, /* less than 4 bytes */ msg_bad_sync, /* unexpected sync byte received */ msg_bad_crc, /* received packet has bad crc */ msg_closed, /* serial port closed itself */ msg_no_memory, /* malloc failed */ msg_unix_error /* check errno for details */ } serial_source_msg; serial_source open_serial_source(const char *device, int baud_rate, int non_blocking, void (*message)(serial_source_msg problem)); /* Effects: opens serial port device at specified baud_rate. If non_blocking is true, read_serial_packet calls will be non-blocking (writes are always blocking, for now at least) If non-null, message will be called to signal various problems during execution. Returns: descriptor for serial forwarder at host:port, or NULL for failure */ #ifndef _WIN32 int serial_source_fd(serial_source src); /* Returns: the file descriptor used by serial source src (useful when non-blocking reads were requested) */ #endif #ifdef _WIN32 HANDLE serial_source_handle(serial_source src); /* Returns: the file descriptor used by serial source src (useful when non-blocking reads were requested) */ #endif int serial_source_empty(serial_source src); /* Returns: true if serial source does not contain any pending data, i.e., if the result is true and there is no data available on the source's file descriptor, then read_serial_packet will: - return NULL if the source is non-blocking - block if it is blocking (Note: the presence of this calls allows the serial_source to do some internal buffering) */ int close_serial_source(serial_source src); /* Effects: closes serial source src Returns: 0 if successful, -1 if some problem occured (but source is considered closed anyway) */ void *read_serial_packet(serial_source src, int *len); /* Effects: Read the serial source src. If a packet is available, return it. If in blocking mode and no packet is available, wait for one. Returns: the packet read (in newly allocated memory), with *len is set to the packet length, or NULL if no packet is yet available and the serial source is in non-blocking mode */ int write_serial_packet(serial_source src, const void *packet, int len); /* Effects: writes len byte packet to serial source src Returns: 0 if packet successfully written, 1 if successfully written but not acknowledged, -1 otherwise */ int platform_baud_rate(char *platform_name); /* Returns: The baud rate of the specified platform, or -1 for unknown platforms. If platform_name starts with a digit, just return atoi(platform_name). */ #ifdef __cplusplus } #endif #endif tinyos-2.1.2+dfsg/support/sdk/c/sf/sf.c000066400000000000000000000126351207233610700176730ustar00rootroot00000000000000#include #include #include #include #include #include #include #include #include #include #include #include #include "sfsource.h" #include "serialsource.h" serial_source src; int server_socket; int packets_read, packets_written, num_clients; struct client_list { struct client_list *next; int fd; } *clients; int unix_check(const char *msg, int result) { if (result < 0) { perror(msg); exit(2); } return result; } void *xmalloc(size_t s) { void *p = malloc(s); if (!p) { fprintf(stderr, "out of memory\n"); exit(2); } return p; } void fd_wait(fd_set *fds, int *maxfd, int fd) { if (fd > *maxfd) *maxfd = fd; FD_SET(fd, fds); } void pstatus(void) { printf("clients %d, read %d, wrote %d\n", num_clients, packets_read, packets_written); } void forward_packet(const void *packet, int len); void add_client(int fd) { struct client_list *c = xmalloc(sizeof *c); c->next = clients; clients = c; num_clients++; pstatus(); c->fd = fd; } void rem_client(struct client_list **c) { struct client_list *dead = *c; *c = dead->next; num_clients--; pstatus(); close(dead->fd); free(dead); } void new_client(int fd) { fcntl(fd, F_SETFL, 0); if (init_sf_source(fd) < 0) close(fd); else add_client(fd); } void check_clients(fd_set *fds) { struct client_list **c; for (c = &clients; *c; ) { int next = 1; if (FD_ISSET((*c)->fd, fds)) { int len; const void *packet = read_sf_packet((*c)->fd, &len); if (packet) { forward_packet(packet, len); free((void *)packet); } else { rem_client(c); next = 0; } } if (next) c = &(*c)->next; } } void wait_clients(fd_set *fds, int *maxfd) { struct client_list *c; for (c = clients; c; c = c->next) fd_wait(fds, maxfd, c->fd); } void dispatch_packet(const void *packet, int len) { struct client_list **c; for (c = &clients; *c; ) if (write_sf_packet((*c)->fd, packet, len) >= 0) c = &(*c)->next; else rem_client(c); } void open_server_socket(int port) { struct sockaddr_in me; int opt; server_socket = unix_check("socket", socket(AF_INET, SOCK_STREAM, 0)); unix_check("socket", fcntl(server_socket, F_SETFL, O_NONBLOCK)); memset(&me, 0, sizeof me); me.sin_family = AF_INET; me.sin_port = htons(port); opt = 1; unix_check("setsockopt", setsockopt(server_socket, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt))); unix_check("bind", bind(server_socket, (struct sockaddr *)&me, sizeof me)); unix_check("listen", listen(server_socket, 5)); } void check_new_client(void) { int clientfd = accept(server_socket, NULL, NULL); if (clientfd >= 0) new_client(clientfd); } void stderr_msg(serial_source_msg problem) { static char *msgs[] = { "unknown_packet_type", "ack_timeout" , "sync" , "too_long" , "too_short" , "bad_sync" , "bad_crc" , "closed" , "no_memory" , "unix_error" }; fprintf(stderr, "Note: %s\n", msgs[problem]); } void open_serial(const char *dev, int baud) { char ldev[80]; #ifdef __CYGWIN__ int portnum; if (strncasecmp(dev, "COM", 3) == 0) { fprintf(stderr, "Warning: you're attempting to open a Windows rather that a Cygwin device. Retrying with "); portnum=atoi(dev+3); sprintf(ldev, "/dev/ttyS%d",portnum-1); fprintf(stderr,ldev); fprintf(stderr, "\n"); } else #endif strcpy(ldev, dev); src = open_serial_source(ldev, baud, 1, stderr_msg); if (!src) { fprintf(stderr, "Couldn't open serial port at %s:%d\n", dev, baud); exit(1); } } void check_serial(void) { int len; const unsigned char *packet = read_serial_packet(src, &len); if (packet) { packets_read++; dispatch_packet(packet, len); free((void *)packet); } } void forward_packet(const void *packet, int len) { int ok = write_serial_packet(src, packet, len); packets_written++; if (ok < 0) exit(2); if (ok > 0) fprintf(stderr, "Note: write failed\n"); } int main(int argc, char **argv) { int serfd; if (argc != 4) { fprintf(stderr, "Usage: %s - act as a serial forwarder on \n" "(listens to serial port at baud rate )\n" , argv[0]); exit(2); } if (signal(SIGPIPE, SIG_IGN) == SIG_ERR) fprintf(stderr, "Warning: failed to ignore SIGPIPE.\n"); open_serial(argv[2], platform_baud_rate(argv[3])); serfd = serial_source_fd(src); open_server_socket(atoi(argv[1])); for (;;) { fd_set rfds; int maxfd = -1; struct timeval zero; int serial_empty; int ret; zero.tv_sec = zero.tv_usec = 0; FD_ZERO(&rfds); fd_wait(&rfds, &maxfd, serfd); fd_wait(&rfds, &maxfd, server_socket); wait_clients(&rfds, &maxfd); serial_empty = serial_source_empty(src); if (serial_empty) ret = select(maxfd + 1, &rfds, NULL, NULL, NULL); else { ret = select(maxfd + 1, &rfds, NULL, NULL, &zero); check_serial(); } if (ret >= 0) { if (FD_ISSET(serfd, &rfds)) check_serial(); if (FD_ISSET(server_socket, &rfds)) check_new_client(); check_clients(&rfds); } } } tinyos-2.1.2+dfsg/support/sdk/c/sf/sflisten.c000066400000000000000000000012741207233610700211070ustar00rootroot00000000000000#include #include #include "sfsource.h" int main(int argc, char **argv) { int fd; if (argc != 3) { fprintf(stderr, "Usage: %s - dump packets from a serial forwarder\n", argv[0]); exit(2); } fd = open_sf_source(argv[1], atoi(argv[2])); if (fd < 0) { fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n", argv[1], argv[2]); exit(1); } for (;;) { int len, i; const unsigned char *packet = read_sf_packet(fd, &len); if (!packet) exit(0); for (i = 0; i < len; i++) printf("%02x ", packet[i]); putchar('\n'); fflush(stdout); free((void *)packet); } } tinyos-2.1.2+dfsg/support/sdk/c/sf/sfsend.c000066400000000000000000000016151207233610700205410ustar00rootroot00000000000000#include #include #include #include "sfsource.h" void send_packet(int fd, char **bytes, int count) { int i; unsigned char *packet; packet = malloc(count); if (!packet) exit(2); for (i = 0; i < count; i++) packet[i] = strtol(bytes[i], NULL, 0); fprintf(stderr,"Sending "); for (i = 0; i < count; i++) fprintf(stderr, " %02x", packet[i]); fprintf(stderr, "\n"); write_sf_packet(fd, packet, count); } int main(int argc, char **argv) { int fd; if (argc < 4) { fprintf(stderr, "Usage: %s - send a raw packet to a serial forwarder\n", argv[0]); exit(2); } fd = open_sf_source(argv[1], atoi(argv[2])); if (fd < 0) { fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n", argv[1], argv[2]); exit(1); } send_packet(fd, argv + 3, argc - 3); close(fd); } tinyos-2.1.2+dfsg/support/sdk/c/sf/sfsource.c000066400000000000000000000061111207233610700211040ustar00rootroot00000000000000#include #include #include #include #include #include #include #include #include "sfsource.h" int saferead(int fd, void *buffer, int count) { int actual = 0; while (count > 0) { int n = read(fd, buffer, count); if (n == -1 && errno == EINTR) continue; if (n == -1) return -1; if (n == 0) return actual; count -= n; actual += n; buffer = (char*)buffer + n; } return actual; } int safewrite(int fd, const void *buffer, int count) { int actual = 0; while (count > 0) { int n = write(fd, buffer, count); if (n == -1 && errno == EINTR) continue; if (n == -1) return -1; count -= n; actual += n; buffer = (char*)buffer + n; } return actual; } int open_sf_source(const char *host, int port) /* Returns: file descriptor for serial forwarder at host:port */ { int fd = socket(AF_INET, SOCK_STREAM, 0); struct hostent *entry; struct sockaddr_in addr; if (fd < 0) return fd; entry = gethostbyname(host); if (!entry) { close(fd); return -1; } addr.sin_family = entry->h_addrtype; memcpy(&addr.sin_addr, entry->h_addr_list[0], entry->h_length); addr.sin_port = htons(port); if (connect(fd, (struct sockaddr *)&addr, sizeof addr) < 0) { close(fd); return -1; } if (init_sf_source(fd) < 0) { close(fd); return -1; } return fd; } int init_sf_source(int fd) /* Effects: Checks that fd is following the TinyOS 2.0 serial forwarder protocol. Use this if you obtain your file descriptor from some other source than open_sf_source (e.g., you're a server) Returns: 0 if it is, -1 otherwise */ { char check[2], us[2]; int version; /* Indicate version and check if a TinyOS 2.0 serial forwarder on the other end */ us[0] = 'U'; us[1] = ' '; if (safewrite(fd, us, 2) != 2 || saferead(fd, check, 2) != 2 || check[0] != 'U') return -1; version = check[1]; if (us[1] < version) version = us[1]; /* Add other cases here for later protocol versions */ switch (version) { case ' ': break; default: return -1; /* not a valid version */ } return 0; } void *read_sf_packet(int fd, int *len) /* Effects: reads packet from serial forwarder on file descriptor fd Returns: the packet read (in newly allocated memory), and *len is set to the packet length, or NULL for failure */ { unsigned char l; void *packet; if (saferead(fd, &l, 1) != 1) return NULL; packet = malloc(l); if (!packet) return NULL; if (saferead(fd, packet, l) != l) { free(packet); return NULL; } *len = l; return packet; } int write_sf_packet(int fd, const void *packet, int len) /* Effects: writes len byte packet to serial forwarder on file descriptor fd Returns: 0 if packet successfully written, -1 otherwise */ { unsigned char l = len; if (safewrite(fd, &l, 1) != 1 || safewrite(fd, packet, l) != l) return -1; return 0; } tinyos-2.1.2+dfsg/support/sdk/c/sf/sfsource.h000066400000000000000000000016721207233610700211200ustar00rootroot00000000000000#ifndef SFSOURCE_H #define SFSOURCE_H #ifdef __cplusplus extern "C" { #endif int open_sf_source(const char *host, int port); /* Returns: file descriptor for TinyOS 2.0 serial forwarder at host:port, or -1 for failure */ int init_sf_source(int fd); /* Effects: Checks that fd is following the TinyOS 2.0 serial forwarder protocol. Use this if you obtain your file descriptor from some other source than open_sf_source (e.g., you're a server) Returns: 0 if it is, -1 otherwise */ void *read_sf_packet(int fd, int *len); /* Effects: reads packet from serial forwarder on file descriptor fd Returns: the packet read (in newly allocated memory), and *len is set to the packet length */ int write_sf_packet(int fd, const void *packet, int len); /* Effects: writes len byte packet to serial forwarder on file descriptor fd Returns: 0 if packet successfully written, -1 otherwise */ #ifdef __cplusplus } #endif #endif tinyos-2.1.2+dfsg/support/sdk/cpp/000077500000000000000000000000001207233610700170405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/cpp/sf/000077500000000000000000000000001207233610700174505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/cpp/sf/Makefile000066400000000000000000000045451207233610700211200ustar00rootroot00000000000000# # Copyright (c) 2007, Technische Universitaet Berlin # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # - Redistributions of source code must retain the above copyright notice, # this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # - Neither the name of the Technische Universitaet Berlin nor the names # of its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED # TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, # OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY # OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE # USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # # @author Philipp Huppertz # @author Andreas Koepke # CC=g++ CFLAGS= -Wall -O3 -pthread all: sf sf: sf.o sfcontrol.o serialcomm.o tcpcomm.o basecomm.o packetbuffer.o sfpacket.o $(CC) $(CFLAGS) sf.o sfcontrol.o serialcomm.o tcpcomm.o basecomm.o packetbuffer.o sfpacket.o -o sf %.o: %.cpp $(CC) -c $(CFLAGS) $< serialcomm.o: serialcomm.cpp serialcomm.h basecomm.h sfpacket.h packetbuffer.h sharedinfo.h tcpcomm.o: tcpcomm.cpp sharedinfo.h tcpcomm.h sfpacket.h packetbuffer.h basecomm.h sfpacket.o: sfpacket.cpp sfpacket.h serialprotocol.h basecomm.o: basecomm.cpp basecomm.h sfcontrol.o: sfcontrol.cpp sfcontrol.h sharedinfo.h packetbuffer.h tcpcomm.h serialcomm.h packetbuffer.o: packetbuffer.cpp packetbuffer.h sfpacket.h clean: rm -rf *.o sf tinyos-2.1.2+dfsg/support/sdk/cpp/sf/README.txt000066400000000000000000000136611207233610700211550ustar00rootroot000000000000001. PREFACE: This is a re-implementation of the C serial forwarder, covering the same functionality with some improvements. It maintains the features of the C version (low CPU usage, small memory footprint), but with increased reliability: it does not loose packets while it waits for an ACK from the mote. In addition it has a control interface listening on a port, so if you run it as a daemon you can still ask it for various statistics, start and stop additional SFs for individual motes... C++ makes this implementation a bit more readable. 2. INSTALLATION: Make sure that your environment has a C++ compiler, supports POSIX threads and can make a select on files and on sockets. cd to src Open the Makefile and adjust the CC variable and the CFLAGS to match your environment. Please pay attention to the -c (compile only) flag in the stem rule. If you use a Linux and g++ you should be fine out of the box. run make and wait Your compiler might issue a warning: "sfpacket.cpp: warning: comparison is always true due to limited range of data type" you can safely ignore it. You should end up with an exectuable called sf in this directory, copy it whereever you need it. TODO: some of the things can be caught if we use a automake/autoconf environment. This is an overkill until we iron out the different platforms. 3. USAGE Start it with: sf or : sf control-port PORT_NUMBER daemon Arguments: control-port PORT_NUMBER : TCP port on which commands are accepted, to play with it: use telnet. Commands are executed once a new line '\n' is entered. If you write your own client, make sure that it sends a terminating '\n' after the command. daemon : this switch (if present) makes sf aware that it may be running as a daemon. Currently this only means that it will not read from stdin. No arguments: If sf is started without arguments it listen on standard input for commands (for a list type "help" when sf is running). If it is started with a given control-port (e.g.: sf control-port 9009) sf listen on the given TCP control port _and_ the standard input. Once you have it running and accepting commands either via the TCP port or via stdin, you can issue several commands (executed once a new line '\n' is entered): start - starts a sf-server on a given port and device stop - stops a running sf-server list - lists all running sf-servers info - prints out some information about a given sf-server close - closes the TCP connection to the control-client exit - immediatly exits and kills all running sf-servers By typing "help" followd by a command (e.g.: "help start" detailed information about that command is printed. The parameters of start are modelled after the command line of the C serial forwarder. The info command prints out some stats: The TCP SIDE (this is where your PC side application hooks up to the SF) prints: clients: the number of clients (or PC side apps/MoteIFs) connected to this port. packets read: correct packets received via TCP packets written: packets send vi TCP to your application The SERIAL LINE interface prints: packets read: the number of packets read from the mote. dropped: the number of packets that could not be send via TCP (usually because no client was connected) bad: number of packets with CRC or length errors, often 1: it needs a packet to synchronize to the stream. packets written: packets written to the mote dropped: number of packets where no ACK was received from the mote after 25 retries (with linear increasing backoff). Go check your mote application ;-) total retries: total number of packets where ACKs from the motes where not received in time. These packets are usually ACKed on a retry, these are not in failures in general. 4. AUTHOR Philipp Huppertz 5. MAINTAINERS Andreas Koepke Jan Hauer 6. KNOWN BUGS - Only one control client is allowed at one point in time. - The daemon switch is less powerful than it promises. - serialprotocol.h should be generated, as is done for the C version. - automake/autoconf build is missing 7. LICENSE Copyright (c) 2007, Technische Universitaet Berlin All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - Neither the name of the Technische Universitaet Berlin nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.tinyos-2.1.2+dfsg/support/sdk/cpp/sf/basecomm.cpp000066400000000000000000000054501207233610700217460ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #include #include #include "basecomm.h" BaseComm::BaseComm() { } BaseComm::~BaseComm() { } /* all count bytes must be read before returning - blocking in that way... */ int BaseComm::readFD(int fd, char *buffer, int count, int *err) { int actual = 0; while (count > 0) { int n = read(fd, buffer, count); if (n == -1) { *err = errno; return -1; } if (n == 0) { return actual; } count -= n; actual += n; buffer += n; } return actual; } /* all count bytes must be written before returning - blocking in that way... */ int BaseComm::writeFD(int fd, const char *buffer, int count, int *err) { int actual = 0; while (count > 0) { int n = write(fd, buffer, count); if(n == -1) { if(errno != 0) { *err = errno; return -1; } else { // looks like a temporary glitch n = 0; } } count -= n; actual += n; buffer += n; } return actual; } tinyos-2.1.2+dfsg/support/sdk/cpp/sf/basecomm.h000066400000000000000000000037551207233610700214210ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #ifndef BASECOMM_H #define BASECOMM_H class BaseComm { public: BaseComm(); virtual ~BaseComm(); protected: /* performs blocking read on fd */ virtual int readFD(int fd, char *buffer, int count, int *err); /* performs blocking write on fd */ virtual int writeFD(int fd, const char *buffer, int count, int *err); }; #endif tinyos-2.1.2+dfsg/support/sdk/cpp/sf/build.xml000066400000000000000000000003541207233610700212730ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/support/sdk/cpp/sf/packetbuffer.cpp000066400000000000000000000131371207233610700226220ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #include "packetbuffer.h" #include "pthread.h" #include PacketBuffer::PacketBuffer() { pthread_mutex_init(&buffer.lock, NULL); pthread_cond_init(&buffer.notempty, NULL); pthread_cond_init(&buffer.notfull, NULL); } PacketBuffer::~PacketBuffer() { pthread_cond_destroy(&buffer.notempty); pthread_cond_destroy(&buffer.notfull); pthread_mutex_destroy(&buffer.lock); } // clears the buffer void PacketBuffer::clear() { pthread_testcancel(); pthread_mutex_lock(&buffer.lock); // clear buffer.container.clear(); DEBUG("PacketBuffer::clear : cleared buffer and signal ") pthread_cond_signal(&buffer.notfull); pthread_mutex_unlock(&buffer.lock); } // gets a packet from the buffer (NULL = buffer empty) SFPacket PacketBuffer::dequeue() { SFPacket packet; pthread_testcancel(); pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &buffer.lock); pthread_mutex_lock(&buffer.lock); // wait until buffer is _not_ empty while(buffer.container.size() == 0) { DEBUG("PacketBuffer::dequeue : waiting until buffer is ") pthread_cond_wait(&buffer.notempty, &buffer.lock); } // dequeue packet = buffer.container.front(); buffer.container.pop_front(); DEBUG("PacketBuffer::dequeue : get from buffer and signal ") pthread_cond_signal(&buffer.notfull); pthread_cleanup_pop(1); return packet; } // puts a packet into buffer... (SUCCESS = true) bool PacketBuffer::enqueueFront(SFPacket &pPacket) { pthread_testcancel(); pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &buffer.lock); pthread_mutex_lock(&buffer.lock); // wait until buffer is _not_ full while(buffer.container.size() >= cMaxBufferSize) { DEBUG("PacketBuffer::enqueueFront : waiting until buffer is ") pthread_cond_wait(&buffer.notfull, &buffer.lock); } // enqueue buffer.container.push_front(pPacket); DEBUG("PacketBuffer::enqueueFront : put in buffer and signal ") // signal that buffer is now not empty pthread_cond_signal(&buffer.notempty); pthread_cleanup_pop(1); return true; } // puts a packet into buffer... (SUCCESS = true) bool PacketBuffer::enqueueBack(SFPacket &pPacket) { pthread_testcancel(); pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &buffer.lock); pthread_mutex_lock(&buffer.lock); // wait until buffer is _not_ full while(buffer.container.size() >= cMaxBufferSize) { DEBUG("PacketBuffer::enqueueBack : waiting until buffer is ") pthread_cond_wait(&buffer.notfull, &buffer.lock); } // enqueue buffer.container.push_back(pPacket); DEBUG("PacketBuffer::enqueueBack : put in buffer and signal ") // signal that buffer is now not empty pthread_cond_signal(&buffer.notempty); pthread_cleanup_pop(1); return true; } /* checks if packet buffer is full */ bool PacketBuffer::isFull() { bool isFull = true; pthread_testcancel(); pthread_mutex_lock(&buffer.lock); if (buffer.container.size() < cMaxBufferSize) { isFull = false; } pthread_mutex_unlock(&buffer.lock); return isFull; } /* checks if packet buffer is empty */ bool PacketBuffer::isEmpty() { bool isEmpty = true; pthread_testcancel(); pthread_mutex_lock(&buffer.lock); if (buffer.container.size() > 0) { isEmpty = false; } pthread_mutex_unlock(&buffer.lock); return isEmpty; } /* checks if pPacket is in queue */ bool PacketBuffer::isInQueue(SFPacket &pPacket) { bool result = false; DEBUG("PacketBuffer::isInQueue : lock") pthread_testcancel(); pthread_mutex_lock(&buffer.lock); container_t::const_iterator it = find(buffer.container.begin(), buffer.container.end(), pPacket); if( it != buffer.container.end() ) { result = true; } pthread_mutex_unlock(&buffer.lock); DEBUG("PacketBuffer::isInQueue : unlock") return result; } tinyos-2.1.2+dfsg/support/sdk/cpp/sf/packetbuffer.h000066400000000000000000000051411207233610700222630ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #ifndef PACKETBUFFER_H #define PACKETBUFFER_H #include #include #include "sfpacket.h" // #define DEBUG_PACKETBUFFER #undef DEBUG #ifdef DEBUG_PACKETBUFFER #include #define DEBUG(message) std::cout << message << std::endl; #else #define DEBUG(message) #endif class PacketBuffer { protected: static const unsigned cMaxBufferSize = 25; typedef std::list container_t; // thread safe buffer typedef struct { // mutex lock for any of this vars pthread_mutex_t lock; // notempty cond pthread_cond_t notempty; // not full cond pthread_cond_t notfull; // actual buffer container_t container; } sharedBuffer_t; sharedBuffer_t buffer; public: PacketBuffer(); ~PacketBuffer(); void clear(); SFPacket dequeue(); bool enqueueFront(SFPacket &pPacket); bool enqueueBack(SFPacket &pPacket); bool isFull(); bool isEmpty(); bool isInQueue(SFPacket &pPacket); }; #endif tinyos-2.1.2+dfsg/support/sdk/cpp/sf/serialcomm.cpp000066400000000000000000000527231207233610700223200ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #include "serialcomm.h" #include "sharedinfo.h" #include #include #include #include #include #include #include #include #include #include #include using namespace std; /* forward declarations of pthrad helper functions*/ void* readSerialThread(void*); void* writeSerialThread(void*); tcflag_t SerialComm::parseBaudrate(int requested) { int baudrate; switch (requested) { #ifdef B50 case 50: baudrate = B50; break; #endif #ifdef B75 case 75: baudrate = B75; break; #endif #ifdef B110 case 110: baudrate = B110; break; #endif #ifdef B134 case 134: baudrate = B134; break; #endif #ifdef B150 case 150: baudrate = B150; break; #endif #ifdef B200 case 200: baudrate = B200; break; #endif #ifdef B300 case 300: baudrate = B300; break; #endif #ifdef B600 case 600: baudrate = B600; break; #endif #ifdef B1200 case 1200: baudrate = B1200; break; #endif #ifdef B1800 case 1800: baudrate = B1800; break; #endif #ifdef B2400 case 2400: baudrate = B2400; break; #endif #ifdef B4800 case 4800: baudrate = B4800; break; #endif #ifdef B9600 case 9600: baudrate = B9600; break; #endif #ifdef B19200 case 19200: baudrate = B19200; break; #endif #ifdef B38400 case 38400: baudrate = B38400; break; #endif #ifdef B57600 case 57600: baudrate = B57600; break; #endif #ifdef B115200 case 115200: baudrate = B115200; break; #endif #ifdef B230400 case 230400: baudrate = B230400; break; #endif #ifdef B460800 case 460800: baudrate = B460800; break; #endif #ifdef B500000 case 500000: baudrate = B500000; break; #endif #ifdef B576000 case 576000: baudrate = B576000; break; #endif #ifdef B921600 case 921600: baudrate = B921600; break; #endif #ifdef B1000000 case 1000000: baudrate = B1000000; break; #endif #ifdef B1152000 case 1152000: baudrate = B1152000; break; #endif #ifdef B1500000 case 1500000: baudrate = B1500000; break; #endif #ifdef B2000000 case 2000000: baudrate = B2000000; break; #endif #ifdef B2500000 case 2500000: baudrate = B2500000; break; #endif #ifdef B3000000 case 3000000: baudrate = B3000000; break; #endif #ifdef B3500000 case 3500000: baudrate = B3500000; break; #endif #ifdef B4000000 case 4000000: baudrate = B4000000; break; #endif default: baudrate = 0; } return baudrate; } SerialComm::SerialComm(const char* pDevice, int pBaudrate, PacketBuffer &pReadBuffer, PacketBuffer &pWriteBuffer, sharedControlInfo_t& pControl) : readBuffer(pReadBuffer), writeBuffer(pWriteBuffer), droppedReadPacketCount(0), droppedWritePacketCount(0), readPacketCount(0), writtenPacketCount(0), badPacketCount(0), sumRetries(0), device(pDevice), baudrate(pBaudrate), serialReadFD(-1), serialWriteFD(-1), errorReported(false), errorMsg(""), control(pControl) { writerThreadRunning = false; readerThreadRunning = false; rawFifo.head = rawFifo.tail = 0; tcflag_t baudflag = parseBaudrate(pBaudrate); srand ( time(NULL) ); seqno = rand(); FD_ZERO(&rfds); FD_ZERO(&wfds); serialReadFD = open(device.c_str(), O_RDONLY | O_NOCTTY | O_NONBLOCK); serialWriteFD = open(device.c_str(), O_WRONLY | O_NOCTTY); if (((serialReadFD < 0) || (serialWriteFD < 0) || (!baudflag)) && !(errorReported == true)) { ostringstream msg; msg << "could not open device = " << pDevice << " with baudrate = " << pBaudrate; reportError(msg.str().c_str() ,-1); } /* Serial port setting */ struct termios newtio; memset(&newtio, 0, sizeof(newtio)); newtio.c_cflag = CS8 | CLOCAL | CREAD; newtio.c_iflag = IGNPAR | IGNBRK; cfsetispeed(&newtio, baudflag); cfsetospeed(&newtio, baudflag); /* Raw output_file */ newtio.c_oflag = 0; if ((tcflush(serialReadFD, TCIFLUSH) >= 0 && tcsetattr(serialReadFD, TCSANOW, &newtio) >= 0) && (tcflush(serialWriteFD, TCIFLUSH) >= 0 && tcsetattr(serialWriteFD, TCSANOW, &newtio) >= 0) && !errorReported) { DEBUG("SerialComm::SerialComm : opened device "<< pDevice << " with baudrate = " << pBaudrate) } else { close(serialReadFD); close(serialWriteFD); if (!errorReported) { ostringstream msg; msg << "could not set ioflags for opened device = " << pDevice; reportError(msg.str().c_str(),-1); } } pthread_mutex_init(&ack.lock, NULL); pthread_cond_init(&ack.received, NULL); if (!errorReported) { // start thread for reading from serial line if (reportError("SerialComm::SerialComm : pthread_create( &readerThread, NULL, readSerialThread, this)", pthread_create( &readerThread, NULL, readSerialThread, this)) == 0) readerThreadRunning = true; // start thread for writing to serial line if (reportError("SerialComm::SerialComm : pthread_create( &writerThread, NULL, writeSerialThread, this)", pthread_create( &writerThread, NULL, writeSerialThread, this)) == 0) writerThreadRunning = true; } } SerialComm::~SerialComm() { cancel(); pthread_mutex_destroy(&ack.lock); pthread_cond_destroy(&ack.received); if(serialReadFD > 2) close(serialReadFD); if(serialWriteFD > 2) close(serialWriteFD); } int SerialComm::hdlcEncode(int count, const char* from, char *to) { int offset = 0; for(int i = 0; i < count; i++) { if (from[i] == SYNC_BYTE || from[i] == ESCAPE_BYTE) { to[offset++] = ESCAPE_BYTE; to[offset++] = from[i] ^ 0x20; } else { to[offset++] = from[i]; } } return offset; } int SerialComm::writeFD(int fd, const char *buffer, int count, int *err) { int cnt = 0; /* FD_SET(serialWriteFD, &wfds); if(select(serialWriteFD + 1, NULL, &wfds, NULL, NULL) < 0) { return -1; } FD_CLR(serialWriteFD, &wfds); */ int tmpCnt = BaseComm::writeFD(fd, buffer, count, err); if (tmpCnt < 0) { *err = errno; return tmpCnt; } else { cnt += tmpCnt; } return cnt; } /* Work around buggy usb serial driver (returns 0 when no data is available, independent of the blocking/non-blocking mode) */ int SerialComm::readFD(int fd, char *buffer, int count, int maxCount, int *err) { int cnt = 0; timeval tvold; timeval tv; unsigned to = (10000000 / baudrate) * count; // time out in usec tvold.tv_sec = to / 1000000; tvold.tv_usec = to % 1000000; while (cnt == 0) { // no FD_ZERO here because of performance issues. It is done in constructor... FD_SET(serialReadFD, &rfds); if (select(serialReadFD + 1, &rfds, NULL, NULL, NULL) < 0) { return -1; } FD_CLR(serialReadFD, &rfds); tv = tvold; select(0, NULL, NULL, NULL, &tv); int tmpCnt = read(fd, buffer, maxCount); if (tmpCnt < 0) { *err = errno; return tmpCnt; } else { cnt += tmpCnt; } } return cnt; } char SerialComm::nextRaw() { char nextByte = 0; int err = 0; if(rawFifo.tail < rawFifo.head) { nextByte = rawFifo.queue[rawFifo.tail++]; } else { // fifo empty -- need to get some bytes rawFifo.tail = 0; rawFifo.head = readFD(serialReadFD, rawFifo.queue, rawReadBytes, maxMTU-1, &err); if(rawFifo.head < 0) { close(serialReadFD); close(serialWriteFD); serialReadFD = -1; serialWriteFD = -1; errno = err; } reportError("SerialComm::nextRaw: readFD(serialReadFD, rawFifo.queue, rawReadBytes, maxMTU-1)", rawFifo.head); nextByte = rawFifo.queue[rawFifo.tail++]; } return nextByte; } /* reads packet */ bool SerialComm::readPacket(SFPacket &pPacket) { uint8_t buffer[maxMTU + 10]; int count = 0; rx_states_t state = WAIT_FOR_SYNC; for(;;) { uint8_t nextByte = nextRaw(); if(state == WAIT_FOR_SYNC) { if(nextByte == SYNC_BYTE) { count = 0; state = IN_SYNC; } } else if(state == IN_SYNC) { if(nextByte == SYNC_BYTE) { if(count < minMTU) { DEBUG("SerialComm::readPacket : frame too short - size = " << count << " : resynchronising "); badPacketCount++; count = 0; } else { bool dobreak = true; DEBUG("SerialComm::readPacket : frame size = " << count); if(checkCrc(buffer, count)) { pPacket.setType(buffer[typeOffset]); pPacket.setSeqno(buffer[seqnoOffset]); switch (buffer[typeOffset]) { case SF_ACK: break; case SF_PACKET_NO_ACK: pPacket.setPayload((char *)(&buffer[payloadOffset]-1), count+1+1 - serialHeaderBytes); break; case SF_PACKET_ACK: pPacket.setPayload((char *)(&buffer[payloadOffset]), count+1 - serialHeaderBytes); break; default: dobreak = false; DEBUG("SerialComm::readPacket : unknown packet type = " \ << static_cast(buffer[typeOffset] & 0xff)); break; } if(dobreak) break; // leave loop } else { DEBUG("SerialComm::readPacket : bad crc"); count = 0; badPacketCount++; } } } else if(nextByte == ESCAPE_BYTE) { state = ESCAPED; } else { buffer[count++] = nextByte; if(count >= maxMTU) { DEBUG("SerialComm::readPacket : packet too long, resynchronizing"); count = 0; badPacketCount++; state = WAIT_FOR_SYNC; } } } else if(state == ESCAPED) { if(nextByte == SYNC_BYTE) { DEBUG("SerialComm::readPacket : state ESCAPED, packet got sync byte, resynchronizing"); count = 0; badPacketCount++; state = IN_SYNC; } else { buffer[count++] = nextByte ^ 0x20; if(count >= maxMTU) { DEBUG("SerialComm::readPacket : state ESCAPED, packet too long, resynchronizing"); count = 0; badPacketCount++; state = WAIT_FOR_SYNC; } else { state = IN_SYNC; } } } } return true; } /* writes packet */ bool SerialComm::writePacket(SFPacket &pPacket) { char type, byte = 0; uint16_t crc = 0; char buffer[2*pPacket.getLength() + 20]; int offset = 0; int err = 0; int written = 0; // put SFD into buffer buffer[offset++] = SYNC_BYTE; // packet type byte = type = pPacket.getType(); crc = byteCRC(byte, crc); offset += hdlcEncode(1, &byte, buffer + offset); // seqno byte = pPacket.getSeqno(); crc = byteCRC(byte, crc); offset += hdlcEncode(1, &byte, buffer + offset); switch (type) { case SF_ACK: break; case SF_PACKET_NO_ACK: case SF_PACKET_ACK: // compute crc for(int i = 0; i < pPacket.getLength(); i++) { crc = byteCRC(pPacket.getPayload()[i], crc); } offset += hdlcEncode(pPacket.getLength(), pPacket.getPayload(), buffer + offset); break; default: return false; } // crc two bytes byte = crc & 0xff; offset += hdlcEncode(1, &byte, buffer + offset); byte = (crc >> 8) & 0xff; offset += hdlcEncode(1, &byte, buffer + offset); // put SFD into buffer buffer[offset++] = SYNC_BYTE; written = writeFD(serialWriteFD, buffer, offset, &err); if(written < 0) { if(err != EINTR) { close(serialReadFD); serialReadFD = -1; close(serialWriteFD); serialWriteFD = -1; errno = err; reportError("SerialComm::writePacket failed",-1); return false; } } else if(written < offset) { DEBUG("SerialComm::writePacket failed"); return false; } return true; } string SerialComm::getDevice() const { return device; } int SerialComm::getBaudRate() const { return baudrate; } /* helper function to start serial reader pthread */ void* readSerialThread(void* ob) { static_cast(ob)->readSerial(); return NULL; } /* reads from connected clients */ void SerialComm::readSerial() { while (true) { SFPacket packet; readPacket(packet); switch (packet.getType()) { case SF_ACK: // successful delivery // FIXME: seqnos are not implemented on the node ! pthread_cond_signal(&ack.received); break; case SF_PACKET_ACK: { // put ack in front of queue SFPacket ack(SF_ACK, packet.getSeqno()); writeBuffer.enqueueFront(ack); } case SF_PACKET_NO_ACK: // do nothing - fall through default: if (!readBuffer.isFull()) { ++readPacketCount; // put silently into buffer... readBuffer.enqueueBack(packet); } else { while(readBuffer.isFull()) { readBuffer.dequeue(); ++droppedReadPacketCount; } readBuffer.enqueueBack(packet); // DEBUG("SerialComm::readSerial : dropped packet") } } } } /* helper function to start serial writer pthread */ void* writeSerialThread(void* ob) { static_cast(ob)->writeSerial(); return NULL; } /* writes to serial/node */ void SerialComm::writeSerial() { SFPacket packet; bool retry = false; int retryCount = 0; long long timeout; while (true) { if (!retry) { cerr << " serial deqeue packet, empty: " << writeBuffer.isEmpty() << endl; packet = writeBuffer.dequeue(); } switch (packet.getType()) { case SF_ACK: // successful delivery if (!writePacket(packet)) { DEBUG("SerialComm::writeSerial : writePacket failed (SF_ACK)") reportError("SerialComm::writeSerial : writePacket(SF_ACK)", -1); } break; case SF_PACKET_ACK: // do nothing - fall through case SF_PACKET_NO_ACK: // do nothing - fall through default: if (!retry) ++writtenPacketCount; // FIXME: this is the only currently supported type by the mote packet.setType(SF_PACKET_ACK); if (!writePacket(packet)) { DEBUG("SerialComm::writeSerial : writePacket failed (SF_PACKET)") reportError("SerialComm::writeSerial : writeFD(SF_PACKET)", -1); } // wait for ack... struct timeval currentTime; struct timespec ackTime; timeout = (long long)ackTimeout * (retryCount + 1); pthread_testcancel(); pthread_mutex_lock(&ack.lock); gettimeofday(¤tTime, NULL); ackTime.tv_sec = currentTime.tv_sec; ackTime.tv_nsec = currentTime.tv_usec * 1000; ackTime.tv_sec += timeout / (1000*1000*1000); ackTime.tv_nsec += timeout % (1000*1000*1000); pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &ack.lock); int retval = pthread_cond_timedwait(&ack.received, &ack.lock, &ackTime); if (!((retryCount < maxRetries) && (retval == ETIMEDOUT))) { if (retryCount >= maxRetries) ++droppedWritePacketCount; retry = false; retryCount = 0; } else { ++retryCount; retry = true; DEBUG("SerialComm::writeSerial : packet retryCount = " << retryCount); ++sumRetries; } // removes the cleanup handler and executes it (unlock mutex) pthread_cleanup_pop(1); } } } /* cancels all running threads */ void SerialComm::cancel() { pthread_t callingThread = pthread_self(); if(readerThreadRunning && pthread_equal(callingThread, readerThread)) { DEBUG("SerialComm::cancel : by readerThread") pthread_detach(readerThread); if (writerThreadRunning) { pthread_cancel(writerThread); DEBUG("SerialComm::cancel : writerThread canceled, joining") pthread_join(writerThread, NULL); writerThreadRunning = false; } readerThreadRunning = false; pthread_cond_signal(&control.cancel); pthread_exit(NULL); } else if(writerThreadRunning && pthread_equal(callingThread, writerThread)) { DEBUG("SerialComm::cancel : by writerThread") pthread_detach(writerThread); if (readerThreadRunning) { pthread_cancel(readerThread); DEBUG("SerialComm::cancel : readerThread canceled, joining") pthread_join(readerThread, NULL); readerThreadRunning = false; } writerThreadRunning = false; pthread_cond_signal(&control.cancel); pthread_exit(NULL); } else { DEBUG("SerialComm::cancel : by other thread") if (readerThreadRunning) { pthread_cancel(readerThread); DEBUG("SerialComm::cancel : readerThread canceled, joining") pthread_join(readerThread, NULL); readerThreadRunning = false; } if (writerThreadRunning) { pthread_cancel(writerThread); DEBUG("SerialComm::cancel : writerThread canceled, joining") pthread_join(writerThread, NULL); writerThreadRunning = false; } pthread_cond_signal(&control.cancel); } } /* reports error */ int SerialComm::reportError(const char *msg, int result) { if ((result < 0) && (!errorReported)) { errorMsg << "error : SF-Server ( SerialComm on device = " << device << " ) : " << msg << " ( result = " << result << " )" << endl << "error-description : " << strerror(errno) << endl; cerr << errorMsg.str(); errorReported = true; cancel(); } return result; } /* prints out status */ void SerialComm::reportStatus(ostream& os) { os << "SF-Server ( SerialComm on device " << device << " ) : " << "baudrate = " << baudrate << " , packets read = " << readPacketCount << " ( dropped = " << droppedReadPacketCount << ", bad = " << badPacketCount << " )" << " , packets written = " << writtenPacketCount << " ( dropped = " << droppedWritePacketCount << ", total retries: " << sumRetries << " )" << endl; } tinyos-2.1.2+dfsg/support/sdk/cpp/sf/serialcomm.h000066400000000000000000000165241207233610700217640ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #ifndef SERIALCOMM_H #define SERIALCOMM_H #include "basecomm.h" #include "sfpacket.h" #include "packetbuffer.h" #include "sharedinfo.h" #include #include #include #include #include #include // #define DEBUG_SERIALCOMM // #define DEBUG_RAW_SERIALCOMM #undef DEBUG #ifdef DEBUG_SERIALCOMM #include #define DEBUG(message) std::cout << message << std::endl; #else #define DEBUG(message) #endif class SerialComm : public BaseComm { /** Constants **/ protected: // max serial MTU static const int maxMTU = (SFPacket::cMaxPacketLength+1)*2; // min serial MTU static const int minMTU = 4; // byte count of serial header static const int serialHeaderBytes = 5; // byte offset of type field static const int typeOffset = 0; // byte offset of sequence number field static const int seqnoOffset = 1; // byte offset of payload field static const int payloadOffset = 2; // timeout for acks in s static const int ackTimeout = 1000 * 1000 * 200; // max. reties for packets from pc to node static const int maxRetries = 25; // how many bytes do we attempt to read from the serial line in one go? static const int rawReadBytes = 20; enum rx_states_t { WAIT_FOR_SYNC, IN_SYNC, ESCAPED }; /** Member vars */ protected: /* pthread for serial reading */ pthread_t readerThread; bool readerThreadRunning; /* pthread for serial writing */ pthread_t writerThread; bool writerThreadRunning; // thread safe ack typedef struct { // mutex lock for any of this vars pthread_mutex_t lock; // notempty cond pthread_cond_t received; } ackCondition_t; ackCondition_t ack; /* raw read buffer */ struct rawFifo_t { char queue[maxMTU]; int head; int tail; }; rawFifo_t rawFifo; /* reference to read packet buffer */ PacketBuffer &readBuffer; /* reference to write packet buffer */ PacketBuffer &writeBuffer; /* number of dropped (read) packets */ int droppedReadPacketCount; /* number of dropped (write) packets */ int droppedWritePacketCount; /* number of read packets */ int readPacketCount; /* number of written packets */ int writtenPacketCount; /* number of bad packets read from serial line, counts resynchronizations! */ int badPacketCount; /* sum retry attempts for all packets */ int sumRetries; /* device port of this sf */ std::string device; /* baudrate of connected device */ int baudrate; /* read fd set */ fd_set rfds; /* write fd set */ fd_set wfds; /* fd for reading from serial device */ int serialReadFD; /* fd for writing to serial device */ int serialWriteFD; /* seqno for serial data packets */ int seqno; /* indicates that an error occured */ bool errorReported; /* error message of reportError call */ std::ostringstream errorMsg; /* for noticing the parent thread of cancelation */ sharedControlInfo_t &control; /** Member functions */ /* needed to start pthreads */ friend void* readSerialThread(void* ob); friend void* writeSerialThread(void* ob); private: /* do not allow standard constructor */ SerialComm(); protected: char nextRaw(); /* claculates crc byte-wise */ inline static uint16_t byteCRC(uint8_t byte, uint16_t crc) { crc = (uint8_t)(crc >> 8) | (crc << 8); crc ^= byte; crc ^= (uint8_t)(crc & 0xff) >> 4; crc ^= crc << 12; crc ^= (crc & 0xff) << 5; return crc; } inline static uint16_t calcCRC(uint8_t *bytes, uint16_t len) { uint16_t crc = 0; for(unsigned i = 0; i < len; i++) { crc = SerialComm::byteCRC(bytes[i], crc); } return crc; } inline static uint16_t checkCrc(uint8_t *bytes, uint16_t count) { bool crcOk = false; if(count > 2) { uint16_t crc = calcCRC(bytes, count - 2); uint16_t packetCrc = (bytes[count-1] << 8) | bytes[count-2]; if(crc == packetCrc) crcOk = true; } return crcOk; } /* HDLC encode (byte stuff) count bytes from buffer from into buffer to. * to must be at least count * 2 bytes large. Returns the number of bytes * written into to. */ int hdlcEncode(int count, const char* from, char *to); /** * try to read at least count bytes in one go, but may read up to maxCount bytes. */ virtual int readFD(int fd, char *buffer, int count, int maxCount, int *err); /* enables byte escaping. overwrites method from base class.*/ virtual int writeFD(int fd, const char *buffer, int count, int *err); /* reads a packet (blocking) */ bool readPacket(SFPacket &pPacket); /* writes a packet to serial source */ bool writePacket(SFPacket &pPacket); /* returns tcflag of requested baudrate */ static tcflag_t parseBaudrate(int requested); int reportError(const char *msg, int result); /* checks for messages from node - producer thread */ void readSerial(); /* write messages to serial / node - consumer thread */ void writeSerial(); public: SerialComm(const char* pDevice, int pBaudrate, PacketBuffer &pReadBuffer, PacketBuffer &pWriteBuffer, sharedControlInfo_t& pControl); ~SerialComm(); /* cancels all running threads */ void cancel(); std::string getDevice() const; int getBaudRate() const; void reportStatus(std::ostream& os); /* returns if error occurred */ bool isErrorReported() { return errorReported; } }; #endif tinyos-2.1.2+dfsg/support/sdk/cpp/sf/serialprotocol.h000066400000000000000000000011141207233610700226570ustar00rootroot00000000000000/** * This file is automatically generated by ncg. DO NOT EDIT THIS FILE. * It includes values of some nesC constants from * /home/phihup/cvs/tinyos-2.x/tos/lib/serial/Serial.h. */ enum { SERIAL_HDLC_CTLESC_BYTE = 125, SERIAL_TOS_SERIAL_802_15_4_ID = 2, SERIAL_SERIAL_PROTO_ACK = 67, SERIAL_TOS_SERIAL_CC1000_ID = 1, SERIAL_SERIAL_PROTO_PACKET_NOACK = 69, SERIAL_SERIAL_PROTO_PACKET_UNKNOWN = 255, SERIAL_HDLC_FLAG_BYTE = 126, SERIAL_TOS_SERIAL_ACTIVE_MESSAGE_ID = 0, SERIAL_TOS_SERIAL_UNKNOWN_ID = 255, SERIAL_SERIAL_PROTO_PACKET_ACK = 68 }; tinyos-2.1.2+dfsg/support/sdk/cpp/sf/sf.cpp000066400000000000000000000043351207233610700205710ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #ifdef HAVE_CONFIG_H #include #endif #include #include #include #include #include "sfcontrol.h" #include "tcpcomm.h" #include "serialcomm.h" #include "packetbuffer.h" #ifdef __APPLE__ #include #include #endif using namespace std; int main(int argc, char *argv[]) { #ifdef __APPLE__ if (signal(SIGPIPE, SIG_IGN) == SIG_ERR) cerr << "Warning: failed to ignore SIGPIPE " << endl; #endif SFControl control; control.parseArgs(argc, argv); control.waitOnInput(); return EXIT_SUCCESS; } tinyos-2.1.2+dfsg/support/sdk/cpp/sf/sfcontrol.cpp000066400000000000000000000534471207233610700222020ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #include "sfcontrol.h" #include "sharedinfo.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include using namespace std; /* forward declarations of pthrad helper functions*/ void* checkCancelThread(void*); SFControl::SFControl() { servers.clear(); pthread_mutex_init(&sfControlInfo.lock, NULL); pthread_cond_init(&sfControlInfo.cancel, NULL); FD_ZERO(&rfds); FD_ZERO(&wfds); uniqueId = 0; servers.clear(); serverFD = -1; clientFD = -1; controlPort = -1; controlServerStarted = false; daemon = false; reportError("SFControl::SFControl : pthread_create( &cancelThread, NULL, checkCancelThread, this)", pthread_create( &cancelThread, NULL, checkCancelThread, this)); } SFControl::~SFControl() { close(serverFD); pthread_mutex_destroy(&sfControlInfo.lock); pthread_cond_destroy(&sfControlInfo.cancel); } string SFControl::getHelpMessage(string msg) { stringstream helpMessage; if (msg == "help arguments") { // genral help message for command line arguments helpMessage << "sf - Controls (starting/stopping) several SFs on one machine" << endl << endl << "Usage : sf" << endl << "or : sf control-port PORT_NUMBER daemon" << endl << endl << "Arguments:" << endl << " control-port PORT_NUMBER : TCP port on which commands are accepted" << endl << " daemon : this switch (if present) makes sf aware that it may be running as a daemon " << endl << endl << "Info:" << endl << " If sf is started without arguments it listen on " << endl << " standard input for commands (for a list type \"help\" when sf is running)." << endl << " If it is started with a given control-port (e.g.: sf control-port 9009)" << endl << " sf listen on the given TCP control port _and_ the standard" << endl << " input." << endl; } else if (msg == "start") { helpMessage << ">> start PORT DEVICE_NAME BAUDRATE:" << endl << ">> Starts a sf-server on a given TCP port connecting to a given device with the given baudrate." << endl << ">> The TCP port device name must be specified and must not" << endl << ">> overlap with any other TCP port or device name pair of an already running sf-server." << endl << ">> (e.g: \"start 9002 /dev/ttyUSB2 115200\" starts server on port 9002 and device /dev/ttyUSB2 with baudrate 115200)" << endl; } else if (msg == "stop") { helpMessage << ">> stop ID | PORT | DEVICE_NAME:" << endl << ">> Stops the specified sf-server." << endl << ">> The unique id or the device or the TCP port of the" << endl << ">> sf-server must be specified." << endl << ">> (e.g: \"stop 1\" stops server with id 1 " << endl << ">> \"stop /dev/ttyUSB0\" stops server connected to /dev/ttyUSB0" << endl << ">> \"stop 9002\" prints stops server listening on TCPport 90002)" << endl; } else if (msg == "info") { helpMessage << ">> info ID | PORT | DEVICE_NAME:" << endl << ">> Prints some information about a given sf-server." << endl << ">> The unique id or the device or the TCP port of the" << endl << ">> sf-server must be specified." << endl << ">> (e.g: \"info 1\" prints out information about server with id 1 " << endl << ">> \"info /dev/ttyUSB0\" prints out information about server connected to /dev/ttyUSB0" << endl << ">> \"info 9002\" prints out information about server listening on TCPport 90002)" << endl; } else if (msg == "list") { helpMessage << ">> list:" << endl << ">> Displays a list of currently running sf-servers." << endl << ">> A List Entry contains the unique id, the TCP port and the device" << endl << ">> of a sf-server." << endl; } else if (msg == "close") { helpMessage << ">> close:" << endl << ">> Closes the TCP connection to the control client." << endl << ">> It can be issued only if the control-server is started."<< endl; } else if (msg == "exit") { helpMessage << ">> exit:" << endl << ">> Immediatly exits and kills all running sf-servers." << endl << ">> This ends everything gracefully..." << endl; } else { // genral help message for interactive commands helpMessage << ">> Supported commands are:" << endl << ">> " << endl << ">> start - starts a sf-server on a given port and device" << endl << ">> stop - stops a running sf-server" << endl << ">> list - lists all running sf-servers" << endl << ">> info - prints out some information about a given sf-server" << endl; if (controlServerStarted) { helpMessage << ">> close - closes the TCP connection to the control-client" << endl; } helpMessage << ">> exit - immediatly exits and kills all running sf-servers" << endl << ">>" << endl << ">> By typing \"help\" followd by a command (e.g.: \"help start\")" << endl << ">> detailed information about that command is printed." << endl; } return helpMessage.str(); } void SFControl::parseArgs(int argc, char *argv[]) { if (argc == 1) { os << ">> Starting sf-control." << endl; os << ">> Accepting commands on standard input..." << endl; deliverOutput(); // test standard port before } else if (argc >= 3) { int port = -1; string argPort(argv[2]); stringstream helpStream(argPort); helpStream >> port; if ((strncmp(argv[1], "control-port", 13) >= 0) && (port > 0)) { controlPort = port; startControlServer(); os << ">> Accepting commands on TCP port " << controlPort ; if(argc == 3) { os << " and on standard input..." << endl; daemon = false; } else { os << " but not on standard input..." << endl; daemon = true; } deliverOutput(); } else { os << getHelpMessage("help arguments"); deliverOutput(); exit(1); } } else { os << getHelpMessage("help arguments"); deliverOutput(); exit(1); } } /* starts a sf-server */ void SFControl::startServer(int port, string device, int baudrate) { pthread_testcancel(); pthread_mutex_lock(&sfControlInfo.lock); sfServer_t newSFServer; newSFServer.serial2tcp = new PacketBuffer(); newSFServer.tcp2serial = new PacketBuffer(); newSFServer.TcpServer = new TCPComm(port, *(newSFServer.tcp2serial), *(newSFServer.serial2tcp), sfControlInfo); newSFServer.SerialDevice = new SerialComm(device.c_str(), baudrate, *(newSFServer.serial2tcp), *(newSFServer.tcp2serial), sfControlInfo); newSFServer.id = ++uniqueId; servers.push_back(newSFServer); pthread_mutex_unlock(&sfControlInfo.lock); } /* stops a given sf-server. returns false if specified server not running */ bool SFControl::stopServer(int& id, int& port, string& device) { pthread_testcancel(); pthread_mutex_lock(&sfControlInfo.lock); bool found = false; list::iterator it = servers.begin(); list::iterator next = it; while( (it != servers.end()) && (!found)) { ++next; if (((*it).SerialDevice->getDevice() == device) || ((*it).TcpServer->getPort() == port) || ((*it).id == id) ) { // cancel (*it).TcpServer->cancel(); (*it).SerialDevice->cancel(); // set id, port and device accordingly id = (*it).id; port = (*it).TcpServer->getPort(); device = (*it).SerialDevice->getDevice(); // clean up delete (*it).TcpServer; delete (*it).SerialDevice; delete (*it).tcp2serial; delete (*it).serial2tcp; servers.erase(it); found = true; } it = next; } pthread_mutex_unlock(&sfControlInfo.lock); return found; } /* prints out server info for specified server */ bool SFControl::showServerInfo(ostream& pOs, int id, int port, string device) { pthread_testcancel(); pthread_mutex_lock(&sfControlInfo.lock); bool found = false; list::iterator it = servers.begin(); list::iterator next = it; while( it != servers.end() && (!found)) { ++next; if (((*it).SerialDevice->getDevice() == device) || ((*it).TcpServer->getPort() == port) || ((*it).id == id) ) { pOs << ">> info for sf-server with id = " << (*it).id << " ( port = " << (*it).TcpServer->getPort() << " , device = " << (*it).SerialDevice->getDevice() << " , baudrate = " << (*it).SerialDevice->getBaudRate() << " )" << endl; pOs << ">> "; (*it).TcpServer->reportStatus(os); pOs << ">> "; (*it).SerialDevice->reportStatus(os); found = true; } it = next; } pthread_mutex_unlock(&sfControlInfo.lock); return found; } /* lists all running servers */ void SFControl::listServers(ostream& pOs) { pthread_testcancel(); pthread_mutex_lock(&sfControlInfo.lock); list::iterator it = servers.begin(); for ( it = servers.begin(); it != servers.end(); it++ ) { pOs << ">> sf-server id = " << (*it).id << " , port = " << (*it).TcpServer->getPort() << " , device = " << (*it).SerialDevice->getDevice() << " , baudrate = " << (*it).SerialDevice->getBaudRate() << endl; } if (servers.size() == 0) { pOs << ">> none" << endl; } pthread_mutex_unlock(&sfControlInfo.lock); } void SFControl::parseInput(std::string arg) { /* silly, but works ... */ string strBuf; stringstream parseStream(arg); vector tokens; while (parseStream >> strBuf) tokens.push_back(strBuf); if (tokens[0] == "start") { if (tokens.size() == 4) { if (servers.size() < maxSFServers) { os << ">> Trying to start sf-server with id = " << (uniqueId+1) << " ( port = " << tokens[1] << " , device = " << tokens[2] << " , baudrate = " << tokens[3] << " )" << endl; deliverOutput(); stringstream helpInt; int baudrate = 0; int port = 0; helpInt << tokens[3] << " " << tokens[1]; helpInt >> baudrate >> port; startServer(port, tokens[2], baudrate); } else { os << ">> FAIL: Too many running servers (currently " << servers.size() << " servers running)" << endl; deliverOutput(); } } else { os << getHelpMessage("start"); deliverOutput(); } } else if (tokens[0] == "stop") { if (tokens.size() == 2) { stringstream helpInt; int port = 0; int id = -1; helpInt << tokens[1] << " " << tokens[1]; helpInt >> id >> port; if (!stopServer(id, port, tokens[1])) { os << ">> no sf-server with id / device / baudrate = " << tokens[1] << " found!" << endl; deliverOutput(); } else { os << ">> stopped sf-server with id = " << id << " ( port = " << port << " , device = " << tokens[1] << " )" << endl; deliverOutput(); } } else { os << getHelpMessage("stop"); deliverOutput(); } } else if (tokens[0] == "info") { if (tokens.size() == 2) { stringstream helpInt; int port = 0; int id = -1; helpInt << tokens[1] << " " << tokens[1]; helpInt >> id >> port; if (!showServerInfo(os, id, port, tokens[1])) { os << ">> no sf-server with id / device / baudrate = " << tokens[1] << " found!" << endl; deliverOutput(); } else { deliverOutput(); } } else { os << getHelpMessage("info"); deliverOutput(); } } else if ((tokens[0] == "close") && (controlServerStarted)) { if (clientFD > 0) { os << ">> closing connection to control-client " << endl; deliverOutput(); close(clientFD); clientFD = -1; } } else if (tokens[0] == "list") { os << ">> currently running sf-servers:" << endl; listServers(os); deliverOutput(); } else if (tokens[0] == "exit") { os << ">> exiting..." << endl; deliverOutput(); exit(0); } else { if ((tokens[0] == "help") && (tokens.size() == 2)) { os << getHelpMessage(tokens[1]); deliverOutput(); } else { os << getHelpMessage(tokens[0]); deliverOutput(); } } } /* send string to connected client.. */ bool SFControl::sendToClient(string message) { if (clientFD < 0) return false; int length = message.size(); const char* buffer = message.c_str(); while (length > 0) { #ifdef __APPLE__ int n = send(clientFD, buffer, length, 0); #else int n = send(clientFD, buffer, length, MSG_NOSIGNAL); #endif if (!(n > 0)) { return false; } length -= n; buffer += n; } return true; } /* receive string from connected client... */ bool SFControl::readFromClient(string& message) { if (clientFD < 0) return false; int length = 0; char buffer[256]; char* bufPtr = buffer; *bufPtr = '\0'; do { int n = read(clientFD, (void *) bufPtr, 1); if (!(n > 0)) { return false; } } while ((*bufPtr++ != '\n') && (length++ < 255)); buffer[length] = '\0'; message = (length == 1) ? "" : buffer; return true; } void SFControl::waitOnInput() { bool clientConnected = false; struct sockaddr_in client; socklen_t clientAddrLen = sizeof(client); FD_ZERO(&rfds); while (true) { int maxfd = 0; if(daemon) { FD_CLR(0, &rfds); } else { FD_SET(0, &rfds); } if (controlServerStarted) { FD_SET(serverFD, &rfds); maxfd = (serverFD > maxfd) ? serverFD : maxfd; } if (clientConnected) { FD_SET(clientFD, &rfds); maxfd = (clientFD > maxfd) ? clientFD : maxfd; } reportError("SFControl::waitOnInput : select(maxfd+1, &rfds, NULL, NULL, NULL)", select(maxfd+1, &rfds, NULL, NULL, NULL)); if (FD_ISSET(0, &rfds)) { /* parse standard input */ FD_CLR(0, &rfds); string input = ""; getline (cin, input); if (input != "") { os << "standard input : " << input << endl; if (!(clientFD < 0)) sendToClient(os.str()); os.str(""); os.clear(); parseInput(input); } } if (clientFD == -1) clientConnected = false; if (controlServerStarted) { if (FD_ISSET(serverFD, &rfds)) { /* we got a new connection request */ FD_CLR(serverFD, &rfds); int newClientFD = reportError("SFControl::waitOnInput : accept(serverFD, (struct sockaddr*) &client, &clientAddrLen)", accept(serverFD, (struct sockaddr*) &client, &clientAddrLen)); if ((newClientFD >= 0) && (!clientConnected)) { clientFD = newClientFD; clientConnected = true; os << ">> accepted connection from control-client " << inet_ntoa(client.sin_addr) << endl; deliverOutput(); } else { close(newClientFD); } } } if (clientConnected) { if (FD_ISSET(clientFD, &rfds)) { /* we got data from the connected control client */ FD_CLR(clientFD, &rfds); string input = ""; if (readFromClient(input)) { if (input != "") { os << "control-client : " << input << endl; cout << os.str(); os.str(""); os.clear(); parseInput(input); } } else { os << ">> closing connection to control-client " << inet_ntoa(client.sin_addr) << endl; deliverOutput(); close(clientFD); clientFD = -1; } } } if (clientFD == -1) clientConnected = false; } } void* checkCancelThread(void* ob) { static_cast(ob)->checkThreadCancel(); return NULL; } /* keeps track of self-canceled sf-servers */ void SFControl::checkThreadCancel() { while(true) { pthread_testcancel(); pthread_mutex_lock(&sfControlInfo.lock); pthread_cond_wait(&sfControlInfo.cancel, &sfControlInfo.lock); list::iterator it = servers.begin(); list::iterator next = it; while( it != servers.end() ) { ++next; if ((*it).TcpServer->isErrorReported() || (*it).SerialDevice->isErrorReported()) { // cancel (*it).TcpServer->cancel(); (*it).SerialDevice->cancel(); // inform user os << ">> FAIL: sf-server with id = " << (*it).id << " ( port = " << (*it).TcpServer->getPort() << " , device = " << (*it).SerialDevice->getDevice() << " ) canceled" << endl; deliverOutput(); // clean up delete (*it).TcpServer; delete (*it).SerialDevice; delete (*it).tcp2serial; delete (*it).serial2tcp; servers.erase(it); } it = next; } pthread_mutex_unlock(&sfControlInfo.lock); } } void SFControl::startControlServer() { struct sockaddr_in me; int opt = 1; serverFD = reportError("SFControl::startControlServer : socket(AF_INET, SOCK_STREAM, 0)", socket(AF_INET, SOCK_STREAM, 0)); reportError("SFControl::startControlServer : fcntl(serverFD, F_SETFL, O_NONBLOCK)", fcntl(serverFD, F_SETFL, O_NONBLOCK)); memset(&me, 0, sizeof me); me.sin_family = AF_INET; me.sin_port = htons(controlPort); reportError("SFControl::startControlServer : setsockopt(serverFD, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt))", setsockopt(serverFD, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt))); reportError("SFControl::startControlServer : bind(serverFD, (struct sockaddr *)&me, sizeof me)", bind(serverFD, (struct sockaddr *)&me, sizeof me)); reportError("SFControl::startControlServer : listen(serverFD, 1)", listen(serverFD, 1)); controlServerStarted = true; } void SFControl::deliverOutput() { if (!(clientFD < 0)) sendToClient(os.str()); cout << os.str(); os.str(""); os.clear(); } /* reports error */ int SFControl::reportError(const char *msg, int result) { if (result < 0) { cerr << "FATAL : SF-Control-Server : " << msg << " ( result = " << result << " )" << endl << "error-description : " << strerror(errno) << endl; exit(1); } return result; } tinyos-2.1.2+dfsg/support/sdk/cpp/sf/sfcontrol.h000066400000000000000000000104621207233610700216350ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #ifndef SFCONTROL_H #define SFCONTROL_H #include "stdio.h" #include "packetbuffer.h" #include "tcpcomm.h" #include "serialcomm.h" #include "pthread.h" #include #include class SFControl { protected: typedef struct { PacketBuffer* serial2tcp; PacketBuffer* tcp2serial; TCPComm* TcpServer; SerialComm* SerialDevice; int id; } sfServer_t; /* needed to get informed about canceled threads */ sharedControlInfo_t sfControlInfo; /* list of running / started sf-servers */ std::list servers; /* max. allowed sf-servers */ static const unsigned int maxSFServers = 512; /* pthread for thread cancel notification */ pthread_t cancelThread; /* read fd set */ fd_set rfds; /* write fd set */ fd_set wfds; /* indicated that the control server is started */ bool controlServerStarted; /* in daemon mode: do not read from stdin */ bool daemon; /* tcp port the control server listens on */ int controlPort; /* control server FD */ int serverFD; /* control-client fd */ int clientFD; /* string stream for multiplexing output (cout and control-client) */ std::ostringstream os; friend void* checkCancelThread(void* ob); /* needed for id generation */ int uniqueId; public: SFControl(); ~SFControl(); /* gets corresponding help message to command */ std::string getHelpMessage(std::string msg = ""); /* parses command line arguments */ void parseArgs(int argc, char *argv[]); /* parses input */ void parseInput(std::string arg); /* main loop, waits for input */ void waitOnInput(); protected: /* checks if child threads canceled themselves */ void checkThreadCancel(); /* starts the controling server */ void startControlServer(); /* send string to connected client.. */ bool sendToClient(std::string message); /* receive string from connected client... */ bool readFromClient(std::string& message); /* starts a sf-server */ void startServer(int port, std::string device, int baudrate); /* stops a given sf-server. returns false if specified server not running */ bool stopServer(int& id, int& port, std::string& device); /* prints out server info for specified server */ bool showServerInfo(std::ostream& pOs, int id, int port, std::string device); /* lists all running servers */ void listServers(std::ostream& pOs); /* send output to console and/or to connected control client */ void deliverOutput(); /* reports error to stderr */ int reportError(const char *msg, int result); }; #endif tinyos-2.1.2+dfsg/support/sdk/cpp/sf/sfpacket.cpp000066400000000000000000000071771207233610700217700ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #include "sfpacket.h" #include SFPacket::SFPacket(int pType, int pSeqno) { length = 0; seqno = pSeqno; type = pType; } // copy constructor SFPacket::SFPacket(const SFPacket &pPacket) { length = pPacket.getLength(); type = pPacket.getType(); seqno = pPacket.getSeqno(); setPayload(pPacket.getPayload(), length); } SFPacket::~SFPacket() { // if (buffer) delete[] buffer; } const char* SFPacket::getPayload() const { if(((type == SF_PACKET_ACK) || (type == SF_PACKET_NO_ACK))) { return buffer + 1; } else { return NULL; } } int SFPacket::getLength() const { return length; } int SFPacket::getType() const { return type; } int SFPacket::getSeqno() const { return seqno; } bool SFPacket::setPayload(const char* pBuffer, uint8_t pLength) { if ((pLength > 0) && (pLength < cMaxPacketLength) && ((type == SF_PACKET_ACK) || (type == SF_PACKET_NO_ACK))) { length = pLength; memcpy(buffer + 1, pBuffer, pLength); return true; } DEBUG("SFPACKET::setPayload : wrong packet length = " << static_cast(pLength) << " or type = " << type) return false; } void SFPacket::setSeqno(int pSeqno) { seqno = pSeqno; } void SFPacket::setType(int pType) { type = pType; } int const SFPacket::getMaxPayloadLength() { return cMaxPacketLength; } /* == operator */ bool SFPacket::operator==(SFPacket const& pPacket) { bool retval=false; if((pPacket.getType() == type) && (pPacket.getLength() == length) && (pPacket.getSeqno() == seqno)) { if((type == SF_PACKET_ACK) || (type == SF_PACKET_NO_ACK)) { retval = (memcmp(pPacket.getPayload(), getPayload(), length) == 0); } } return retval; } /* return the length that shall be transmitted via TCP */ int SFPacket::getTcpLength() const { return length + 1; } /* return the payload of the TCP packet */ const char* SFPacket::getTcpPayload() { char l = length; buffer[0] = l; return buffer; } tinyos-2.1.2+dfsg/support/sdk/cpp/sf/sfpacket.h000066400000000000000000000067561207233610700214370ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #ifndef SFPACKET_H #define SFPACKET_H // #define DEBUG_SFPACKET #undef DEBUG #ifdef DEBUG_SFPACKET #include #define DEBUG(message) std::cout << message << std::endl; #else #define DEBUG(message) #endif #include #include #include "serialprotocol.h" enum { SYNC_BYTE = SERIAL_HDLC_FLAG_BYTE, ESCAPE_BYTE = SERIAL_HDLC_CTLESC_BYTE, SF_ACK = SERIAL_SERIAL_PROTO_ACK, SF_PACKET_ACK = SERIAL_SERIAL_PROTO_PACKET_ACK, SF_PACKET_NO_ACK = SERIAL_SERIAL_PROTO_PACKET_NOACK, SF_UNKNOWN = SERIAL_SERIAL_PROTO_PACKET_UNKNOWN }; class SFPacket{ public: /* max packet length in bytes */ static const int cMaxPacketLength = 256; /** member vars **/ protected: /* internal buffer */ char buffer[cMaxPacketLength + 1]; /* length of byte buffer */ int length; /* type */ int type; /* sequence number */ int seqno; /** member functions **/ protected: public: SFPacket(int type = SF_PACKET_ACK, int pSeqno = 0); ~SFPacket(); SFPacket(const SFPacket &pPacket); /* returns buffer */ const char* getPayload() const; /* returns length of buffer */ int getLength() const; /* return the length that shall be transmitted via TCP */ int getTcpLength() const; /* return the payload of the TCP packet */ const char* getTcpPayload(); /* returns the seqno of this packet */ int getSeqno() const; /* returns type of packet */ int getType() const; /* sets buffer and length and constructs frame (incl crc) */ bool setPayload(const char* pBuffer, uint8_t pLength); /* sets the seqno */ void setSeqno(int pSeqno); /* sets the type */ void setType(int pType); /* returns max payload length */ static const int getMaxPayloadLength(); /* == operator */ bool operator==(SFPacket const& pPacket); }; #endif tinyos-2.1.2+dfsg/support/sdk/cpp/sf/sharedinfo.h000066400000000000000000000036501207233610700217470ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #ifndef SHAREDINFO_H #define SHAREDINFO_H #include "pthread.h" typedef struct { /* mutex to protect *Comm objects */ pthread_mutex_t lock; /* condition that object is canceled*/ pthread_cond_t cancel; } sharedControlInfo_t; #endif tinyos-2.1.2+dfsg/support/sdk/cpp/sf/tcpcomm.cpp000066400000000000000000000425401207233610700216230ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #include "sharedinfo.h" #include "tcpcomm.h" #include "sfpacket.h" #include "stdio.h" #include #include #include #include #include #include #include #include #include #include using namespace std; /* forward declarations of pthrad helper functions*/ void* checkClientsThread(void*); void* readClientsThread(void*); void* writeClientsThread(void*); /* opens tcp server port for listening and start threads*/ TCPComm::TCPComm(int pPort, PacketBuffer &pReadBuffer, PacketBuffer &pWriteBuffer, sharedControlInfo_t& pControl) : readBuffer(pReadBuffer), writeBuffer(pWriteBuffer), errorReported(false), errorMsg(""), control(pControl) { // init values writerThreadRunning = false; readerThreadRunning = false; serverThreadRunning = false; clientInfo.count = 0; clientInfo.FDs.clear(); readPacketCount = 0; writtenPacketCount = 0; port = pPort; pthread_mutex_init(&clientInfo.sleeplock, NULL); pthread_mutex_init(&clientInfo.countlock, NULL); pthread_cond_init(&clientInfo.wakeup, NULL); struct sockaddr_in me; int opt; int rxBuf = 1024; /* create pipe to inform client reader of new clients */ if (!errorReported) { int pipeFDPair[2]; reportError("TCPComm::TCPComm : pipe(pipeFDPair)", pipe(pipeFDPair)); pipeWriteFD = pipeFDPair[1]; pipeReadFD = pipeFDPair[0]; } if (!errorReported) { reportError("TCPComm::TCPComm : fcntl(pipeReadFD, F_SETFL, O_NONBLOCK);", fcntl(pipeReadFD, F_SETFL, O_NONBLOCK)); } /* create server socket where clients connect */ if (!errorReported) { serverFD = reportError("TCPComm::TCPComm : socket(AF_INET, SOCK_STREAM, 0)", socket(AF_INET, SOCK_STREAM, 0)); } memset(&me, 0, sizeof me); me.sin_family = AF_INET; me.sin_port = htons(port); opt = 1; if (!errorReported) { reportError("TCPComm::TCPComm : setsockopt(serverFD, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt))", setsockopt(serverFD, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt))); } if (!errorReported) { reportError("TCPComm::TCPComm : setsockopt(serverFD, SOL_SOCKET, SO_RCVBUF, (char *)&rxBuf, sizeof(rxBuf))", setsockopt(serverFD, SOL_SOCKET, SO_RCVBUF, (char *)&rxBuf, sizeof(rxBuf))); } if (!errorReported) { reportError("TCPComm::TCPComm : bind(serverFD, (struct sockaddr *)&me, sizeof me)", bind(serverFD, (struct sockaddr *)&me, sizeof me)); } if (!errorReported) { reportError("TCPComm::TCPComm : listen(serverFD, 5)", listen(serverFD, 5)); } // start thread for server socket (adding and removing clients) if (!errorReported) { if (reportError("TCPComm::TCPComm : pthread_create( &serverThread, NULL, checkClientsThread, this)", pthread_create( &serverThread, NULL, checkClientsThread, this)) == 0) { serverThreadRunning = true; } // start thread for reading from client connections if (reportError("TCPComm::TCPComm : pthread_create( &readerThread, NULL, readClientsThread, this)", pthread_create( &readerThread, NULL, readClientsThread, this)) == 0) { readerThreadRunning = true; } // start thread for writing to client connections if (reportError("TCPComm::TCPComm : pthread_create( &writerThread, NULL, writeClientsThread, this)", pthread_create( &writerThread, NULL, writeClientsThread, this)) == 0) { writerThreadRunning = true; } } } TCPComm::~TCPComm() { cancel(); close(serverFD); set::iterator it; for( it = clientInfo.FDs.begin(); it != clientInfo.FDs.end(); it++ ) { close(*it); } close(pipeWriteFD); close(pipeReadFD); pthread_mutex_destroy(&clientInfo.sleeplock); pthread_mutex_destroy(&clientInfo.countlock); pthread_cond_destroy(&clientInfo.wakeup); } int TCPComm::getPort() { return port; } /* reads packet */ bool TCPComm::readPacket(int pFD, SFPacket &pPacket) { char l; char* buffer[SFPacket::getMaxPayloadLength()]; int err; if (readFD(pFD, &l, 1, &err) != 1) { return false; } if (l > SFPacket::getMaxPayloadLength()) { return false; } if (readFD(pFD, (char*) buffer, static_cast(l), &err) != l) { return false; } if (pPacket.setPayload((char*)buffer ,l)) { return true; } else { return false; } } int TCPComm::writeFD(int fd, const char *buffer, int count, int *err) { int actual = 0; while (count > 0) { #ifdef __APPLE__ int n = send(fd, buffer, count, 0); #else int n = send(fd, buffer, count, MSG_NOSIGNAL); #endif if (n == -1) { *err = errno; return -1; } count -= n; actual += n; buffer += n; } return actual; } /* writes packet */ bool TCPComm::writePacket(int pFD, SFPacket &pPacket) { int len = pPacket.getTcpLength(); int err; return (writeFD(pFD, pPacket.getTcpPayload(), len, &err) == len); } /* checks for correct version of SF protocol */ bool TCPComm::versionCheck(int clientFD) { char check[2], us[2]; int version; int err = 0; /* Indicate version and check if a TinyOS 2.0 serial forwarder on the other end */ us[0] = 'U'; us[1] = ' '; if (writeFD(clientFD, us, 2, &err) != 2) { return false; } if (readFD(clientFD, check, 2, &err) != 2) { return false; } if (check[0] != 'U') { return false; } version = check[1]; if (us[1] < version) { version = us[1]; } /* Add other cases here for later protocol versions */ switch (version) { case ' ': break; default: return false; } return true; } /* adds a client to the client list and wakes up all threads */ void TCPComm::addClient(int clientFD) { DEBUG("TCPComm::addClient : lock") pthread_testcancel(); pthread_mutex_lock( &clientInfo.countlock ); bool wakeupClientThreads = false; if (clientInfo.count == 0) { wakeupClientThreads = true; } ++clientInfo.count; clientInfo.FDs.insert(clientFD); if (wakeupClientThreads) { pthread_cond_broadcast( &clientInfo.wakeup ); } pthread_mutex_unlock( &clientInfo.countlock ); stuffPipe(); DEBUG("TCPComm::addClient : unlock") } void TCPComm::removeClient(int clientFD) { DEBUG("TCPComm::removeClient : lock") pthread_testcancel(); pthread_mutex_lock( &clientInfo.countlock ); if (clientInfo.count > 0) { clientInfo.FDs.erase(clientFD); if (close(clientFD) != 0) { DEBUG("TCPComm::removeClient : error closing fd " << clientFD) } else { --clientInfo.count; } } if (clientInfo.count == 0) { // clear write buffer writeBuffer.clear(); } pthread_mutex_unlock( &clientInfo.countlock ); stuffPipe(); DEBUG("TCPComm::removeClient : unlock") } /* helper function to start server pthread */ void* checkClientsThread(void* ob) { static_cast(ob)->connectClients(); return NULL; } /* checks for new connected clients */ void TCPComm::connectClients() { while (true) { int clientFD = accept(serverFD, NULL, NULL); pthread_testcancel(); if (clientFD >= 0) { if (versionCheck(clientFD)) { addClient(clientFD); } else { close(clientFD); } } else { pthread_testcancel(); cancel(); } } } /* helper function to start client reader pthread */ void* readClientsThread(void* ob) { static_cast(ob)->readClients(); return NULL; } /* reads from connected clients */ void TCPComm::readClients() { FD_t clientFDs; while (true) { pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &clientInfo.countlock); pthread_mutex_lock( &clientInfo.countlock ); while( clientInfo.count == 0 ) { // do nothing when no client is connected... DEBUG("TCPComm::readClients : sleeping reader thread") pthread_cond_wait( &clientInfo.wakeup, &clientInfo.countlock ); } // copy set in to temp set clientFDs = clientInfo.FDs; // removes the cleanup handler and executes it (unlock mutex) pthread_cleanup_pop(1); // check all fds (work with temp set)... fd_set rfds; FD_ZERO(&rfds); int maxFD = pipeReadFD; FD_SET(pipeReadFD, &rfds); set::iterator it; for( it = clientFDs.begin(); it != clientFDs.end(); it++ ) { if (*it > maxFD) { maxFD = *it; } FD_SET(*it, &rfds); } if (select(maxFD + 1, &rfds, NULL, NULL, NULL) < 0 ) { // run = false; reportError("TCPComm::readClients : select(maxFD+1, &rfds, NULL, NULL, NULL)", -1); } else { if(FD_ISSET(pipeReadFD, &rfds)) { clearPipe(); } for (it = clientFDs.begin(); it != clientFDs.end(); it++) { if (FD_ISSET(*it, &rfds)) { SFPacket packet; if(readPacket(*it, packet)) { // this call blocks until buffer is not full readBuffer.enqueueBack(packet); ++readPacketCount; } else { DEBUG("TCPComm::readClients : removeClient") removeClient(*it); } } } } } } /* helper function to start client writer pthread */ void* writeClientsThread(void* ob) { static_cast(ob)->writeClients(); return NULL; } /* writes to connected clients */ void TCPComm::writeClients() { FD_t clientFDs; while (true) { pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &clientInfo.countlock); pthread_mutex_lock( &clientInfo.countlock ); while( clientInfo.count == 0 ) { // do nothing when no client is connected... DEBUG("TCPComm::writeClients : sleeping writer thread") pthread_cond_wait( &clientInfo.wakeup, &clientInfo.countlock ); } // removes the cleanup handler and executes it (unlock mutex) pthread_cleanup_pop(1); // blocks until buffer is not empty SFPacket packet = writeBuffer.dequeue(); pthread_testcancel(); pthread_mutex_lock( &clientInfo.countlock ); // copy client fd set into temp set clientFDs = clientInfo.FDs; pthread_mutex_unlock( &clientInfo.countlock ); // check all fds (work with temp set)... set::iterator it; // duplicate and send out packet to all connected clients for( it = clientFDs.begin(); it != clientFDs.end(); it++ ) { if (writePacket(*it, packet)) { ++writtenPacketCount; } else { DEBUG("TCPComm::writeClients : removeClient") removeClient(*it); } } } } /* cancels all running threads */ void TCPComm::cancel() { pthread_t callingThread = pthread_self(); if (pthread_equal(callingThread, readerThread)) { DEBUG("TCPComm::cancel : by readerThread") pthread_detach(readerThread); if (writerThreadRunning) { pthread_cancel(writerThread); DEBUG("TCPComm::cancel : writerThread canceled, joining") pthread_join(writerThread, NULL); writerThreadRunning = false; } if (serverThreadRunning) { pthread_cancel(serverThread); DEBUG("TCPComm::cancel : serverThread canceled, joining") pthread_join(serverThread, NULL); serverThreadRunning = false; } readerThreadRunning = false; pthread_cond_signal(&control.cancel); pthread_exit(NULL); } else if (pthread_equal(callingThread, writerThread)) { DEBUG("TCPComm::cancel : by writerThread") pthread_detach(writerThread); if (readerThreadRunning) { pthread_cancel(readerThread); DEBUG("TCPComm::cancel : readerThread canceled, joining") pthread_join(readerThread, NULL); readerThreadRunning = false; } if (serverThreadRunning) { pthread_cancel(serverThread); DEBUG("TCPComm::cancel : serverThread canceled, joining") pthread_join(serverThread, NULL); serverThreadRunning = false; } writerThreadRunning = false; pthread_cond_signal(&control.cancel); pthread_exit(NULL); } else if (pthread_equal(callingThread, serverThread)) { DEBUG("TCPComm::cancel : by serverThread") pthread_detach(serverThread); if (readerThreadRunning) { pthread_cancel(readerThread); DEBUG("TCPComm::cancel : readerThread canceled, joining") pthread_join(readerThread, NULL); readerThreadRunning = false; } if (writerThreadRunning) { pthread_cancel(writerThread); DEBUG("TCPComm::cancel : writerThread canceled, joining") pthread_join(writerThread, NULL); writerThreadRunning = false; } serverThreadRunning = false; pthread_cond_signal(&control.cancel); pthread_exit(NULL); } else { DEBUG("TCPComm::cancel : by other thread") if (serverThreadRunning) { pthread_cancel(serverThread); DEBUG("TCPComm::cancel : serverThread canceled, joining") pthread_join(serverThread, NULL); serverThreadRunning = false; } if (writerThreadRunning) { pthread_cancel(writerThread); DEBUG("TCPComm::cancel : writerThread canceled, joining") pthread_join(writerThread, NULL); writerThreadRunning = false; } if (readerThreadRunning) { pthread_cancel(readerThread); DEBUG("TCPComm::cancel : readerThread canceled, joining") pthread_join(readerThread, NULL); readerThreadRunning = false; } pthread_cond_signal(&control.cancel); } } /* reports error */ int TCPComm::reportError(const char *msg, int result) { if ((result < 0) && (!errorReported)) { errorMsg << "error : SF-Server (TCPComm on port = " << port << ") : " << msg << " ( result = " << result << " )" << endl << "error-description : " << strerror(errno) << endl; cerr << errorMsg.str(); errorReported = true; cancel(); } return result; } /* prints out status */ void TCPComm::reportStatus(ostream& os) { os << "SF-Server ( TCPComm on port " << port << " )" << " : clients = " << clientInfo.count << " , packets read = " << readPacketCount << " , packets written = " << writtenPacketCount << endl; } void TCPComm::stuffPipe() { char info = 'n'; if(write(pipeWriteFD, &info, 1) != 1) DEBUG("TCPComm::stuffPipe : lokal pipe is broken"); } void TCPComm::clearPipe() { char buf; while(read(pipeReadFD, &buf, 1) > 0) { ; } } tinyos-2.1.2+dfsg/support/sdk/cpp/sf/tcpcomm.h000066400000000000000000000130271207233610700212660ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philipp Huppertz */ #ifndef TCPCOMM_H #define TCPCOMM_H #include "sfpacket.h" #include "packetbuffer.h" #include "basecomm.h" #include "sharedinfo.h" #include #include #include #include // #define DEBUG_TCPCOMM #undef DEBUG #ifdef DEBUG_TCPCOMM #include #define DEBUG(message) std::cout << message << std::endl; #else #define DEBUG(message) #endif class TCPComm : public BaseComm { /** Member vars */ protected: /* pthread for tcp client connection handling */ pthread_t serverThread; bool serverThreadRunning; /* pthread for tcp client reading */ pthread_t readerThread; bool readerThreadRunning; /* pthread for tcp client writing */ pthread_t writerThread; bool writerThreadRunning; typedef std::set FD_t; // thread safe shared info about connected clients typedef struct { /* mutex to protect clientCount and clientFDs */ pthread_mutex_t countlock; /* mutex to protect wakeup condiation */ pthread_mutex_t sleeplock; /* wakeup condition which is siganled if clients are connected */ pthread_cond_t wakeup; /* number of connected clients */ int count; /* container for client stuff */ FD_t FDs; } sharedClientInfo_t; /* information about clients */ sharedClientInfo_t clientInfo; /* number of read packets */ int readPacketCount; /* number of written packets */ int writtenPacketCount; /* port of this sf */ int port; /* file descriptor for server port on local machine */ int serverFD; /* pipe fd pair to inform client reader thread of new clients */ int pipeWriteFD; int pipeReadFD; /* reference to read packet buffer */ PacketBuffer &readBuffer; /* reference to write packet buffer */ PacketBuffer &writeBuffer; /* indicates that an error occured */ bool errorReported; /* error message of reportError call */ std::ostringstream errorMsg; /* for noticing the parent thread of cancelation */ sharedControlInfo_t &control; /** Member functions */ /* needed to start pthreads */ friend void* checkClientsThread(void* ob); friend void* readClientsThread(void* ob); friend void* writeClientsThread(void* ob); private: /* disable standard constructor */ TCPComm(); protected: /* performs blocking write on fd */ virtual int writeFD(int fd, const char *buffer, int count, int *err); /* checks SF client protocol version */ bool versionCheck(int clientFD); /* reads packet */ bool readPacket(int pFD, SFPacket &pPacket); /* writes packet */ bool writePacket(int pFD, SFPacket &pPacket); /* adds client to the list */ void addClient(int clientFD); /* removes client from the list */ void removeClient(int clientFD); /* checks for connecting clients - main thread for connection handling */ void connectClients(); /* checks for messages from the clients - producer thread */ void readClients(); /* write messages to clients (duplicate) - consumer thread */ void writeClients(); /* reports error to stderr */ int reportError(const char *msg, int result); /* write something into pipe to wake up client readerThread */ void stuffPipe(); /* remove data written into pipe */ void clearPipe(); public: /* create SF TCP server - init and start threads */ TCPComm(int pPort, PacketBuffer &pReadBuffer, PacketBuffer &pWriteBuffer, sharedControlInfo_t& pControl); /* wait for threads, close fds and cleanup */ ~TCPComm(); /* cancels all running threads */ void cancel(); /* returns the TCP/IP port of this sf server */ int getPort(); /* reports status info to stdout */ void reportStatus(std::ostream& os); /* returns if error occurred */ bool isErrorReported() { return errorReported; } }; #endif tinyos-2.1.2+dfsg/support/sdk/java/000077500000000000000000000000001207233610700171775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/Makefile000066400000000000000000000006601207233610700206410ustar00rootroot00000000000000# Top-level Makefile for tools/java SUBDIRS = net JAVADOCDIR = ../../../doc/javadoc ROOT = . include $(ROOT)/Makefile.include tinyos.jar: all rm -f tinyos.jar @# create the jar, as update requires it to exist. we use a @# .class file we assume always exists find . | grep -E "class|jpg|gif" | xargs jar cf tinyos.jar javadoc: all rm -rf $(JAVADOCDIR) mkdir -p $(JAVADOCDIR) javadoc -d $(JAVADOCDIR) `find -name *.java` tinyos-2.1.2+dfsg/support/sdk/java/Makefile.include000066400000000000000000000052761207233610700222730ustar00rootroot00000000000000#-*-makefile-*- ###################################################################### # # Contains the shared make rules for the tools/java tree. # # In each directory, create a Makefile that includes the lines # ROOT = # include $(ROOT)/Makefile.include # # By default the Makefile will compile all .java source code in the # current directory. You may also specify the following flags in # your Makefile, *before* including Makefile.include: # # SUBDIRS = dir1 dir2 ... # Specify a list of subdirectories that 'make' should descend into # # INITIAL_TARGETS = target1 target2 ... # Specify build targets to be compiled before compiling Java classes # # FINAL_TARGETS = target1 target2 ... # Specify build targets to be compiled after compiling Java classes # # OTHER_CLEAN = target1 target2 ... # Specify other targets to be executed when 'make clean' is run # # NOTE: this Makefile requires GNU make, as well as a number of # standard UNIX shell tools. # ###################################################################### SRC = $(wildcard *.java) JAVA = $(SRC) CLASSES = $(JAVA:.java=.class) all: here subdirs $(FINAL_TARGETS) # figure out useful variables PWD = $(shell pwd) # set compiler command ifeq ($(JAVAC)_x, _x) JAVAC = javac endif # general rule for java files %.class: %.java $(JAVAC) $< ifeq ($(SUBDIRS)_x, _x) subdirs: here subdirs-clean: here-clean else subdirs: here @for i in $(SUBDIRS); do \ if [ -d $$i ]; then \ if [ -f $$i/Makefile ]; then \ $(MAKE) -C $$i; \ else \ echo "***" no Makefile in directory: $(PWD)/$$i; \ fi \ else \ echo "***" skipping missing directory: $(PWD)/$$i; \ fi; \ done subdirs-clean: here-clean @for i in $(SUBDIRS); do \ if [ -d $$i ]; then \ if [ -f $$i/Makefile ]; then \ $(MAKE) -C $$i clean; \ else \ echo "***" no Makefile in directory: $(PWD)/$$i; \ fi \ else \ echo "***" skipping missing directory: $$i; \ fi; \ done subdirs-install: @for i in $(INSTALLDIRS); do \ if [ -d $$i ]; then \ if [ -f $$i/Makefile ]; then \ $(MAKE) -C $$i install; \ else \ echo "***" no Makefile in directory: $(PWD)/$$i; \ fi \ else \ echo "***" skipping missing directory: $$i; \ fi; \ done endif here: printdir $(INITIAL_TARGETS) $(JAVA) $(CLASSES) FORCE printdir: @echo "... $(PWD)"; here-clean: FORCE @rm -f *.class *~ javacore*.txt @echo "cleaning $(PWD)" clean: here-clean subdirs-clean $(OTHER_CLEAN) install: subdirs-install # some phony targets - FORCE forces a command to be run on all dependencies, # and .PHONY prevents badness if a phony target coincides with a filename FORCE: .PHONY: all $(SUBDIRS) $(SUBDIRSCLEAN) clean tinyos-2.1.2+dfsg/support/sdk/java/build.xml000066400000000000000000000042701207233610700210230ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/support/sdk/java/net/000077500000000000000000000000001207233610700177655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/Makefile000066400000000000000000000001431207233610700214230ustar00rootroot00000000000000# Top-level Makefile for tools/java SUBDIRS = tinyos ROOT = .. include $(ROOT)/Makefile.include tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/000077500000000000000000000000001207233610700213125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/Makefile000066400000000000000000000004511207233610700227520ustar00rootroot00000000000000# Top-level Makefile for tools/java # We do all subdirectories (to allow for optional package installation) SUBDIRS = packet message sf $(shell find . -maxdepth 1 -type d | tail -n +2 | grep -v /CVS | grep -v packet | grep -v message | grep -v sf) ROOT = ../.. include $(ROOT)/Makefile.include tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/000077500000000000000000000000001207233610700222455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/ByteQueue.java000066400000000000000000000065411207233610700250260ustar00rootroot00000000000000//$Id: ByteQueue.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp package net.tinyos.comm; public class ByteQueue { byte buffer[]; int nbegin; int nend; int num_free_back() { return buffer.length - nend; } void left_justify_into( byte dest[] ) { for( int i=nbegin,j=0; i 0 ) return ((int)buffer[nbegin++]) & 255; return -1; } public int pop_front( byte b[] ) { return pop_front( b, 0, b.length ); } public int pop_front( byte b[], int off, int len ) { int n = available(); if( n > len ) n = len; int bend = off + len; while( off < bend ) b[off++] = buffer[nbegin++]; return n; } public ByteQueue() { this(64); } public ByteQueue( int initial_buffer_length ) { buffer = new byte[ initial_buffer_length ]; nbegin = 0; nend = 0; } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/Makefile000066400000000000000000000001271207233610700237050ustar00rootroot00000000000000# Top-level Makefile for tools/java ROOT = ../../.. include $(ROOT)/Makefile.include tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/NativeSerial.java000066400000000000000000000115531207233610700255030ustar00rootroot00000000000000package net.tinyos.comm; /* ---------------------------------------------------------------------------- * This file was automatically generated by SWIG (http://www.swig.org). * Version: 1.3.21 * * Do not make changes to this file unless you know what you are doing--modify * the SWIG interface file instead. * ----------------------------------------------------------------------------- */ /** * Updated to include the open() method, which allows us to keep this object * while being temporarily disconnected from the serial port */ public class NativeSerial { /** The handle to the serial port we're connected to */ protected long swigCPtr; /** True if we have an open serial port connection */ protected boolean swigCMemOwn; /** Name of the port */ private String myPortname = ""; /** * Constructor * * @param portname */ public NativeSerial(String portname) { this(TOSCommJNI.new_NativeSerial(portname), true); } /** * Constructor * * @param cPtr * @param cMemoryOwn */ private NativeSerial(long cPtr, boolean cMemoryOwn) { swigCMemOwn = cMemoryOwn; swigCPtr = cPtr; } /** * Reconnect to this serial port * * @return true if the connection is made */ public boolean open() { if (!swigCMemOwn && !myPortname.matches("")) { swigCPtr = TOSCommJNI.new_NativeSerial(myPortname); swigCMemOwn = true; return true; } return false; } public void close() { // We can come here with swigCptr == 0 from finalize if the C++ // constructor throws an exception. Ideally, we should guard all // methods in the C++ code, but this is simpler. if (swigCPtr != 0) { TOSCommJNI.NativeSerial_close(swigCPtr); } } protected NativeSerial() { this(0, false); } protected void finalize() { delete(); } public void delete() { if (swigCPtr != 0 && swigCMemOwn) { swigCMemOwn = false; TOSCommJNI.delete_NativeSerial(swigCPtr); } swigCPtr = 0; } protected static long getCPtr(NativeSerial obj) { return (obj == null) ? 0 : obj.swigCPtr; } public void setSerialPortParams(int baudrate, int databits, int stopbits, boolean parity) { TOSCommJNI.NativeSerial_setSerialPortParams(swigCPtr, baudrate, databits, stopbits, parity); } public int getBaudRate() { return TOSCommJNI.NativeSerial_getBaudRate(swigCPtr); } public int getDataBits() { return TOSCommJNI.NativeSerial_getDataBits(swigCPtr); } public int getStopBits() { return TOSCommJNI.NativeSerial_getStopBits(swigCPtr); } public boolean getParity() { return TOSCommJNI.NativeSerial_getParity(swigCPtr); } public void notifyOn(int event, boolean enable) { if (swigCPtr != 0) { TOSCommJNI.NativeSerial_notifyOn(swigCPtr, event, enable); } } public boolean isNotifyOn(int event) { return TOSCommJNI.NativeSerial_isNotifyOn(swigCPtr, event); } public boolean waitForEvent() { if (swigCPtr != 0) { try { return TOSCommJNI.NativeSerial_waitForEvent(swigCPtr); } catch (Exception e) { return false; } } return false; } public boolean cancelWait() { if (swigCPtr != 0) { return TOSCommJNI.NativeSerial_cancelWait(swigCPtr); } return false; } public boolean didEventOccur(int event) { return TOSCommJNI.NativeSerial_didEventOccur(swigCPtr, event); } public void setDTR(boolean high) { TOSCommJNI.NativeSerial_setDTR(swigCPtr, high); } public void setRTS(boolean high) { TOSCommJNI.NativeSerial_setRTS(swigCPtr, high); } public boolean isDTR() { return TOSCommJNI.NativeSerial_isDTR(swigCPtr); } public boolean isRTS() { return TOSCommJNI.NativeSerial_isRTS(swigCPtr); } public boolean isCTS() { return TOSCommJNI.NativeSerial_isCTS(swigCPtr); } public boolean isDSR() { return TOSCommJNI.NativeSerial_isDSR(swigCPtr); } public boolean isRI() { return TOSCommJNI.NativeSerial_isRI(swigCPtr); } public boolean isCD() { return TOSCommJNI.NativeSerial_isCD(swigCPtr); } public void sendBreak(int millis) { TOSCommJNI.NativeSerial_sendBreak(swigCPtr, millis); } public int available() { try { return TOSCommJNI.NativeSerial_available(swigCPtr); } catch (Exception e) { return 0; } } public int read() { return TOSCommJNI.NativeSerial_read__SWIG_0(swigCPtr); } public int read(byte[] buffer_out, int off, int len) { return TOSCommJNI.NativeSerial_read__SWIG_1(swigCPtr, buffer_out, off, len); } public int write(int b) { return TOSCommJNI.NativeSerial_write__SWIG_0(swigCPtr, b); } public int write(byte[] buffer_in, int off, int len) { return TOSCommJNI.NativeSerial_write__SWIG_1(swigCPtr, buffer_in, off, len); } public static String getTOSCommMap() { return TOSCommJNI.NativeSerial_getTOSCommMap(); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/SerialPort.java000066400000000000000000000062571207233610700252060ustar00rootroot00000000000000//$Id: SerialPort.java,v 1.6 2010-06-29 22:07:41 scipio Exp $ package net.tinyos.comm; /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp import java.io.*; public interface SerialPort { public static final int STOPBITS_1 = 1; public static final int STOPBITS_2 = 2; public static final int STOPBITS_1_5 = 3; /* public static final int FLOWCONTROL_NONE = 0; public static final int FLOWCONTROL_RTSCTS_IN = 1; public static final int FLOWCONTROL_RTSCTS_OUT = 2; public static final int FLOWCONTROL_XONXOFF_IN = 4; public static final int FLOWCONTROL_XONXOFF_OUT = 8; */ public InputStream getInputStream() throws IOException; public OutputStream getOutputStream() throws IOException; public boolean open(); public void close(); public void finalize(); public void setSerialPortParams( int baudrate, int dataBits, int stopBits, boolean parity ) throws UnsupportedCommOperationException; public int getBaudRate(); public int getDataBits(); public int getStopBits(); public boolean getParity(); public void sendBreak( int millis ); /* public void setFlowControlMode( int flowcontrol ) throws UnsupportedCommOperationException; public int getFlowControlMode(); */ public void setDTR( boolean dtr ); public void setRTS( boolean rts ); public boolean isDTR(); public boolean isRTS(); public boolean isCTS(); public boolean isDSR(); public boolean isRI(); public boolean isCD(); public void addListener( SerialPortListener l ); public void removeListener( SerialPortListener l ); public void notifyOn( int serialEvent, boolean enable ); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/SerialPortEvent.java000066400000000000000000000047621207233610700262070ustar00rootroot00000000000000//$Id: SerialPortEvent.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp package net.tinyos.comm; public class SerialPortEvent extends java.util.EventObject { public final static int DATA_AVAILABLE = (1<<0); public final static int OUTPUT_EMPTY = (1<<1); public final static int CTS = (1<<2); public final static int DSR = (1<<3); public final static int RING_INDICATOR = (1<<4); public final static int CARRIER_DETECT = (1<<5); public final static int OVERRUN_ERROR = (1<<6); public final static int PARITY_ERROR = (1<<7); public final static int FRAMING_ERROR = (1<<8); public final static int BREAK_INTERRUPT = (1<<9); public SerialPort port; int eventType; public SerialPortEvent( SerialPort _port, int _eventType ) { super(_port); port = _port; eventType = _eventType; } public int getEventType() { return eventType; } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/SerialPortListener.java000066400000000000000000000034771207233610700267150ustar00rootroot00000000000000//$Id: SerialPortListener.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp package net.tinyos.comm; public interface SerialPortListener { public void serialEvent( SerialPortEvent ev ); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/TOSCommJNI.java000066400000000000000000000051731207233610700247400ustar00rootroot00000000000000package net.tinyos.comm; /* ---------------------------------------------------------------------------- * This file was automatically generated by SWIG (http://www.swig.org). * Version: 1.3.21 * * Do not make changes to this file unless you know what you are doing--modify * the SWIG interface file instead. * ----------------------------------------------------------------------------- */ class TOSCommJNI { static { net.tinyos.util.TOSLibraryLoader.load("toscomm"); } public final static native void NativeSerial_setSerialPortParams(long jarg1, int jarg2, int jarg3, int jarg4, boolean jarg5); public final static native int NativeSerial_getBaudRate(long jarg1); public final static native int NativeSerial_getDataBits(long jarg1); public final static native int NativeSerial_getStopBits(long jarg1); public final static native boolean NativeSerial_getParity(long jarg1); public final static native void NativeSerial_notifyOn(long jarg1, int jarg2, boolean jarg3); public final static native boolean NativeSerial_isNotifyOn(long jarg1, int jarg2); public final static native boolean NativeSerial_waitForEvent(long jarg1); public final static native boolean NativeSerial_cancelWait(long jarg1); public final static native boolean NativeSerial_didEventOccur(long jarg1, int jarg2); public final static native void NativeSerial_setDTR(long jarg1, boolean jarg2); public final static native void NativeSerial_setRTS(long jarg1, boolean jarg2); public final static native boolean NativeSerial_isDTR(long jarg1); public final static native boolean NativeSerial_isRTS(long jarg1); public final static native boolean NativeSerial_isCTS(long jarg1); public final static native boolean NativeSerial_isDSR(long jarg1); public final static native boolean NativeSerial_isRI(long jarg1); public final static native boolean NativeSerial_isCD(long jarg1); public final static native void NativeSerial_sendBreak(long jarg1, int jarg2); public final static native long new_NativeSerial(String jarg1); public final static native void delete_NativeSerial(long jarg1); public final static native void NativeSerial_close(long jarg1); public final static native int NativeSerial_available(long jarg1); public final static native int NativeSerial_read__SWIG_0(long jarg1); public final static native int NativeSerial_read__SWIG_1(long jarg1, byte[] jarg2, int jarg3, int jarg4); public final static native int NativeSerial_write__SWIG_0(long jarg1, int jarg2); public final static native int NativeSerial_write__SWIG_1(long jarg1, byte[] jarg2, int jarg3, int jarg4); public final static native String NativeSerial_getTOSCommMap(); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/TOSSerial.java000066400000000000000000000244441207233610700247250ustar00rootroot00000000000000//$Id: TOSSerial.java,v 1.7 2010-06-29 22:07:41 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp package net.tinyos.comm; import java.io.*; import java.util.*; import java.util.regex.*; public class TOSSerial extends NativeSerial implements SerialPort { /** * Inner Class to handle serial event dispatching * */ class EventDispatcher extends Thread { private boolean m_run; /** * Constructor * */ public EventDispatcher() { m_run = false; } /** * Start waiting for events * */ public void open() { m_run = true; if( ! this.isAlive() ) this.start(); } /** * Stop waiting for events * Here's the deal: we're running a thread here that is calling * a function waitForEvent() in the toscomm driver. We're now waiting for * two events: DATA_AVAILABLE and OUTPUT_EMPTY. If you call cancelWait(), * nothing happens until the waitForEvent() returns by getting an event * anyway, so if our node isn't generating bytes on its own, we need to * force it to make an event so we can get out of that function to avoid * a driver crash. * * Previously, it never returned because there were no events. Now we * make an event by adding notifyOn(OUTPUT_EMPTY) and then writing a * standard 0x7E sync byte to the serial port and let it tell us that * an event occured. * * When the waitForEvent() function finally exits, we are then able to * tell it, "Oh yea, while you're at it, cancelWait()". Finally, the * EventDispatcher is in a state where the driver is not sitting around * waiting for an event to occur. At that point, we can shut down the * NativeSerial by calling super.close() elsewhere. * * As far as I can tell, this is the only way to make this work without * modifying the actual toscomm driver. * * The only other trick I can see to this is sometimes you can't connect * immediately after you disconnect.. I added a wait(500) after a disconnect * more toward my application layer to prevent my app from trying to * reconnect immediately. My JUnit tests, for example, disconnect and * reconnect very rapidly as you would expect. */ public void close() { m_run = false; while (this.isAlive()) { write(0x7E); cancelWait(); try { synchronized(this) { // Wait for the waitForEvent() done event, if it doesn't work after // 100 ms, then we try generating that OUTPUT_EMPTY event again. wait(100); } } catch (InterruptedException e) { e.printStackTrace(); } } } /** * Dispatch the event if it really occured * * @param event */ private void dispatch_event(int event) { if (didEventOccur(event)) { SerialPortEvent ev = new SerialPortEvent(TOSSerial.this, event); synchronized (m_listeners) { Iterator i = m_listeners.iterator(); while (i.hasNext()) ((SerialPortListener) i.next()).serialEvent(ev); } } } public void run() { while (m_run) { if (waitForEvent()) { dispatch_event(SerialPortEvent.DATA_AVAILABLE); dispatch_event(SerialPortEvent.OUTPUT_EMPTY); } } // wake up the closing thread synchronized(this) { this.notify(); } } } /** * Inner Serial Input Stream Class * */ class SerialInputStream extends InputStream { ByteQueue bq = new ByteQueue(128); protected void gather() { int navail = TOSSerial.this.available(); if (navail > 0) { byte buffer[] = new byte[navail]; bq.push_back(buffer, 0, TOSSerial.this.read(buffer, 0, navail)); } } public int read() { gather(); return bq.pop_front(); } public int read(byte[] b) { gather(); return bq.pop_front(b); } public int read(byte[] b, int off, int len) { gather(); return bq.pop_front(b, off, len); } public int available() { gather(); return bq.available(); } } /** * Inner Serial Output Stream Class * */ class SerialOutputStream extends OutputStream { public void write(int b) { TOSSerial.this.write(b); } public void write(byte[] b) { TOSSerial.this.write(b, 0, b.length); } public void write(byte[] b, int off, int len) { int nwritten = 0; while (nwritten < len) nwritten += TOSSerial.this.write(b, nwritten, len - nwritten); } } private SerialInputStream m_in; private SerialOutputStream m_out; private Vector m_listeners = new Vector(); private EventDispatcher m_dispatch; static String map_portname(String mapstr, String portname) { // mapstr is of the form "from1=to1:from2=to2" // If "from", "to", and "portname" all end port numbers, then the ports in // "from" and "to" are used as a bias for the port in "portname", appended // to the "to" string (without its original terminating digits). If more // than one port mapping matches, the one with the smallest non-negative // port number wins. // For instance, if // mapstr="com1=COM1:com10=\\.\COM10" // then // com1 => COM1 // com3 => COM3 // com10 => \\.\COM10 // com12 => \\.\COM12 // or if // mapstr="com1=/dev/ttyS0:usb1=/dev/ttyS100" // then // com1 => /dev/ttyS0 // com3 => /dev/ttyS2 // usb1 => /dev/ttyS100 // usb3 => /dev/ttyS102 String maps[] = mapstr.split(":"); Pattern pkv = Pattern.compile("(.*?)=(.*?)"); Pattern pnum = Pattern.compile("(.*\\D)(\\d+)"); Matcher mport = pnum.matcher(portname); int match_distance = -1; String str_port_to = null; for (int i = 0; i < maps.length; i++) { Matcher mkv = pkv.matcher(maps[i]); if (mkv.matches()) { Matcher mfrom = pnum.matcher(mkv.group(1)); Matcher mto = pnum.matcher(mkv.group(2)); if (mfrom.matches() && mto.matches() && mport.matches() && mfrom.group(1).equalsIgnoreCase(mport.group(1))) { int nfrom = Integer.parseInt(mfrom.group(2)); int nto = Integer.parseInt(mto.group(2)); int nport_from = Integer.parseInt(mport.group(2)); int nport_to = nport_from - nfrom + nto; int ndist = nport_from - nfrom; if ((ndist >= 0) && ((ndist < match_distance) || (match_distance == -1))) { match_distance = ndist; str_port_to = mto.group(1) + nport_to; } } else if (mkv.group(1).equalsIgnoreCase(portname)) { match_distance = 0; str_port_to = mkv.group(2); } } } return (str_port_to == null) ? portname : str_port_to; } /** * Real Constructor of TOSSerial * * @param portname */ public TOSSerial(String portname) { super(map_portname(NativeSerial.getTOSCommMap(), portname)); m_in = new SerialInputStream(); m_out = new SerialOutputStream(); m_dispatch = new EventDispatcher(); m_dispatch.open(); } /** * Open the serial port connection */ public boolean open() { if (m_dispatch != null) { m_dispatch.open(); } return super.open(); } /** * Close the serial port connection */ public void close() { if (m_dispatch != null) { m_dispatch.close(); } super.close(); } public void addListener(SerialPortListener l) { synchronized (m_listeners) { if (!m_listeners.contains(l)) m_listeners.add(l); } } public void removeListener(SerialPortListener l) { synchronized (m_listeners) { m_listeners.remove(l); } } public InputStream getInputStream() { return m_in; } public OutputStream getOutputStream() { return m_out; } /** * Finalize the serial port connection, do not expect to open it again */ public void finalize() { // Be careful what you call here. The object may never have been // created, so the underlying C++ object may not exist, and there's // insufficient guarding to avoid a core dump. If you call other // methods than super.close() or super.finalize(), be sure to // add an if (swigCptr != 0) guard in NativeSerial.java. if (m_dispatch != null) { m_dispatch.close(); } /* * try { if (m_dispatch != null) { m_dispatch.join(); } } catch * (InterruptedException e) { } */ super.close(); try { if (m_in != null) { m_in.close(); } if (m_out != null) { m_out.close(); } } catch (IOException e) { } m_dispatch = null; m_in = null; m_out = null; super.finalize(); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/UnsupportedCommOperationException.java000066400000000000000000000037161207233610700320230ustar00rootroot00000000000000//$Id: UnsupportedCommOperationException.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp package net.tinyos.comm; public class UnsupportedCommOperationException extends Exception { public UnsupportedCommOperationException(String str) { super(str); } public UnsupportedCommOperationException() { super(); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/comm/package.html000066400000000000000000000017111207233610700245260ustar00rootroot00000000000000 Provides the Java half of JNI interfaces to serial ports.

    Package Specification

    Related Documentation

    For how to this package is used to communicate with motes, please see: tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/message/000077500000000000000000000000001207233610700227365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/message/Makefile000066400000000000000000000005511207233610700243770ustar00rootroot00000000000000# Top-level Makefile for tools/java INITIAL_TARGETS = SerialPacket.class SerialPacket.java ROOT = ../../.. include $(ROOT)/Makefile.include TOS=$(shell ncc -print-tosdir) SERIAL_H = $(TOSDIR)/lib/serial/Serial.h SerialPacket.java: $(SERIAL_H) FORCE mig -o $@ -java-classname=net.tinyos.message.SerialPacket java $(SERIAL_H) serial_packet -I$(TOSDIR)/types tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/message/Message.java000066400000000000000000000510271207233610700251720ustar00rootroot00000000000000// $Id: Message.java,v 1.7 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab * */ /** * Message class (encode/decode tinyos messages).

    * * The base class for encoding and decoding tinyos messages. Provides * methods to read and write bit fields at an offset for a particular bit * length. Intended for use by the Java code generated by mig. * * @version 1, 15 Jul 2002 * @author David Gay * @author David Gay * @author Intel Research Berkeley Lab */ package net.tinyos.message; public class Message implements Cloneable { /** * The maximum number of characters read from an 8-bit array field being * converted into a Java String. */ public static final int MAX_CONVERTED_STRING_LENGTH = 512; /** * The underlying byte array storing the data for this message. This is * private to enforce access to the data through the accessor methods in this * class, which do bounds checking and manage the base_offset for embedded * messages. */ private byte[] data; /** * The base offset into the data. This allows the message data to exist at * some non-zero offset into the actual data. */ protected int base_offset; /** * The actual length of the message data. Must be less than or equal to * (data.length - base_offset). */ protected int data_length; /** * The AM type corresponding to this object. Set to -1 if no AM type is known. */ protected int am_type; /** The serial packet this message originated from */ private SerialPacket serialPacket; /** Limit no-arg instantiation. */ protected Message() { } /** * Construct a new message of the given size. * * @param data_length * The size of the message to create. */ public Message(int data_length) { init(data_length); } public void init(int data_length) { init(new byte[data_length]); } /** * Construct a new message of the given size and base offset. Allocates a new * byte array of size data_length+base_offset. * * @param data_length * The size of the message to create. * @param base_offset * The base offset into the newly created message. */ public Message(int data_length, int base_offset) { init(data_length, base_offset); } protected void init(int data_length, int base_offset) { init(new byte[data_length + base_offset], base_offset); } /** * Construct a message using data as the storage. The length of data * determines the length of this message. * * @param data * the storage for this message */ public Message(byte[] data) { init(data); } protected void init(byte[] data) { init(data, 0); } /** * Construct a message using data as the storage. Use the given base_offset as * the base offset into the data array. The data length will be (data.length - * base_offset). * * @param data * the storage for this message * @param base_offset * the base offset into the data array */ public Message(byte[] data, int base_offset) { init(data, base_offset); } protected void init(byte[] data, int base_offset) { init(data, base_offset, data.length - base_offset); } /** * Construct a message using data as the storage. Use the given base_offset as * the base offset into the data array, and the specified data length. * * @param data * the storage for this message * @param base_offset * the base offset into the data array * @param data_length * the length of the message data */ public Message(byte[] data, int base_offset, int data_length) { init(data, base_offset, data_length); } protected void init(byte[] data, int base_offset, int data_length) { this.data = data; this.base_offset = base_offset; this.data_length = data_length; if (base_offset + data_length > data.length) throw new ArrayIndexOutOfBoundsException( "Cannot create Message with base_offset " + base_offset + ", data_length " + data_length + " and data array size " + data.length); } /** * Construct an embedded message within the given 'msg'. Use the given * base_offset as the base offset into the data array, and the specified data * length. * * @param msg * the message to embed this message into * @param base_offset * the base offset into the data array * @param data_length * the length of the message data */ public Message(Message msg, int base_offset, int data_length) { init(msg, base_offset, data_length); } protected void init(Message msg, int base_offset, int data_length) { init(msg.dataGet(), msg.base_offset + base_offset, data_length); } private Message cloneself() { Message copy; try { copy = (Message) super.clone(); } catch (CloneNotSupportedException e) { System.err .println("Message: WARNING: CloneNotSupportedException in cloneself(): " + e); System.err .println("Message: This is a bug - please contact dgay@intel-research.net"); copy = null; System.exit(2); } return copy; } /** * Clone this Message, including making a copy of its data */ public Object clone() { Message copy = cloneself(); copy.init((byte[]) data.clone(), base_offset, data_length); copy.am_type = this.am_type; return copy; } /** * Clone this Message, but give it a new unitialised data array of size size * * @param size * size of the new data array */ public Message clone(int size) { Message copy = cloneself(); copy.init(new byte[size], 0, size); copy.am_type = this.am_type; return copy; } /** * Copy new data for this message from 'data'. Copies min(data.length, * this.data_length) bytes. * * @param data * the array containing the data to be copied * @exception ArrayIndexOutOfBoundsException * if any of data[0..getData().length - 1] are invalid */ public void dataSet(byte[] data) { dataSet(data, 0, this.base_offset, Math.min(this.data_length, data.length)); } /** * Copy new data for this message from offsetFrom in data to offsetTo in this * message. Copies a total of length bytes * * @param data * the array containing the data to be copied * @param offsetFrom * the offset in data to start copying from * @param offsetTo * the offset at which to start copying data into this message. * @param length * bytes are copied. * @exception ArrayIndexOutOfBoundsException * if any of the source or target indices are invalid */ public void dataSet(byte[] data, int offsetFrom, int offsetTo, int length) { System.arraycopy(data, offsetFrom, this.data, offsetTo + base_offset, length); } /** * Copy new data for this message from the raw data in msg to offsetTo in this * message. Copies a total of msg.dataLength() bytes * * @param msg * the message containing the data to be copied * @param offsetTo * the offset at which to start copying data into this message. * @exception ArrayIndexOutOfBoundsException * if any of the target indices are invalid */ public void dataSet(Message msg, int offsetTo) { System.arraycopy(msg.dataGet(), msg.baseOffset(), this.data, offsetTo + base_offset, msg.dataLength()); } /** * Return the raw byte array representing the data of this message. Note that * only indices in the range (this.baseOffset(), * this.baseOffset()+this.dataLength()) are valid. */ public byte[] dataGet() { return data; } /** * Return the base offset into the data array for this message. */ public int baseOffset() { return base_offset; } /** * Return the length of the data (in bytes) contained in this message. */ public int dataLength() { return data_length; } /** * Return the active message type of this message (-1 if unknown) */ public int amType() { return am_type; } /** * Set the active message type of this message */ public void amTypeSet(int type) { this.am_type = type; } // Check that length bits from offset are in bounds private void checkBounds(int offset, int length) { if (offset < 0 || length <= 0 || offset + length > (data_length * 8)) throw new ArrayIndexOutOfBoundsException( "Message.checkBounds: bad offset (" + offset + ") or length (" + length + "), for data_length " + data_length + " in class " + this.getClass()); } // Check that value is valid for a bitfield of length length private void checkValue(int length, long value) { if (length != 64 && (value < 0 || value >= 1L << length)) throw new IllegalArgumentException("Message.checkValue: bad length (" + length + " or value (" + value + ")"); } // Unsigned byte read private int ubyte(int offset) { int val = data[base_offset + offset]; if (val < 0) return val + 256; else return val; } // ASSUMES: little endian bits & bytes for the methods without BE, and // big endian bits & bytes for the methods with BE /** * Read the length bit unsigned little-endian int at offset * * @param offset * bit offset where the unsigned int starts * @param length * bit length of the unsigned int * @exception ArrayIndexOutOfBoundsException * for invalid offset, length */ protected long getUIntElement(int offset, int length) { checkBounds(offset, length); int byteOffset = offset >> 3; int bitOffset = offset & 7; int shift = 0; long val = 0; // all in one byte case if (length + bitOffset <= 8) return (ubyte(byteOffset) >> bitOffset) & ((1 << length) - 1); // get some high order bits if (bitOffset > 0) { val = ubyte(byteOffset) >> bitOffset; byteOffset++; shift += 8 - bitOffset; length -= 8 - bitOffset; } while (length >= 8) { val |= (long) ubyte(byteOffset++) << shift; shift += 8; length -= 8; } // data from last byte if (length > 0) val |= (long) (ubyte(byteOffset) & ((1 << length) - 1)) << shift; return val; } /** * Set the length bit unsigned little-endian int at offset to val * * @param offset * bit offset where the unsigned int starts * @param length * bit length of the unsigned int * @param val * value to set the bit field to * @exception ArrayIndexOutOfBoundsException * for invalid offset, length * @exception IllegalArgumentException * if val is an out-of-range value for this bitfield */ protected void setUIntElement(int offset, int length, long val) { checkBounds(offset, length); // checkValue(length, val); int byteOffset = offset >> 3; int bitOffset = offset & 7; int shift = 0; // all in one byte case if (length + bitOffset <= 8) { data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & ~(((1 << length) - 1) << bitOffset)) | val << bitOffset); return; } // set some high order bits if (bitOffset > 0) { data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & ((1 << bitOffset) - 1)) | val << bitOffset); byteOffset++; shift += 8 - bitOffset; length -= 8 - bitOffset; } while (length >= 8) { data[base_offset + (byteOffset++)] = (byte) (val >> shift); shift += 8; length -= 8; } // data for last byte if (length > 0) data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & ~((1 << length) - 1)) | val >> shift); } /** * Read the length bit signed little-endian int at offset * * @param offset * bit offset where the signed int starts * @param length * bit length of the signed int * @exception ArrayIndexOutOfBoundsException * for invalid offset, length */ protected long getSIntElement(int offset, int length) throws ArrayIndexOutOfBoundsException { long val = getUIntElement(offset, length); if (length == 64) return val; if ((val & 1L << (length - 1)) != 0) return val - (1L << length); return val; } /** * Set the length bit signed little-endian int at offset to val * * @param offset * bit offset where the signed int starts * @param length * bit length of the signed int * @param value * value to set the bit field to * @exception ArrayIndexOutOfBoundsException * for invalid offset, length * @exception IllegalArgumentException * if val is an out-of-range value for this bitfield */ protected void setSIntElement(int offset, int length, long value) throws ArrayIndexOutOfBoundsException { if (length != 64 && value >= 1L << (length - 1)) throw new IllegalArgumentException(); if (length != 64 && value < 0) value += 1L << length; setUIntElement(offset, length, value); } /** * Read the length bit unsigned big-endian int at offset * * @param offset * bit offset where the unsigned int starts. Note that these are * big-endian bit offsets: bit 0 is the MSB, bit 7 the LSB. * @param length * bit length of the unsigned int * @exception ArrayIndexOutOfBoundsException * for invalid offset, length */ protected long getUIntBEElement(int offset, int length) { checkBounds(offset, length); int byteOffset = offset >> 3; int bitOffset = offset & 7; long val = 0; // All in one byte case if (length + bitOffset <= 8) return (ubyte(byteOffset) >> (8 - bitOffset - length)) & ((1 << length) - 1); // get some high order bits if (bitOffset > 0) { length -= 8 - bitOffset; val = (long) (ubyte(byteOffset) & ((1 << (8 - bitOffset)) - 1)) << length; byteOffset++; } while (length >= 8) { length -= 8; val |= (long) ubyte(byteOffset++) << length; } // data from last byte if (length > 0) val |= ubyte(byteOffset) >> (8 - length); return val; } /** * Set the length bit unsigned big-endian int at offset to val * * @param offset * bit offset where the unsigned int starts. Note that these are * big-endian bit offsets: bit 0 is the MSB, bit 7 the LSB. * @param length * bit length of the unsigned int * @param val * value to set the bit field to * @exception ArrayIndexOutOfBoundsException * for invalid offset, length * @exception IllegalArgumentException * if val is an out-of-range value for this bitfield */ protected void setUIntBEElement(int offset, int length, long val) { checkBounds(offset, length); // checkValue(length, val); int byteOffset = offset >> 3; int bitOffset = offset & 7; // all in one byte case if (length + bitOffset <= 8) { int mask = ((1 << length) - 1) << (8 - bitOffset - length); data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & ~mask) | val << (8 - bitOffset - length)); return; } // set some high order bits if (bitOffset > 0) { int mask = (1 << (8 - bitOffset)) - 1; length -= 8 - bitOffset; data[base_offset + byteOffset] = (byte) (ubyte(byteOffset) & ~mask | val >> length); byteOffset++; } while (length >= 8) { length -= 8; data[base_offset + (byteOffset++)] = (byte) (val >> length); } // data for last byte if (length > 0) { int mask = (1 << (8 - length)) - 1; data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & mask) | val << (8 - length)); } } /** * Read the length bit signed big-endian int at offset * * @param offset * bit offset where the signed int starts * @param length * bit length of the signed int * @exception ArrayIndexOutOfBoundsException * for invalid offset, length */ protected long getSIntBEElement(int offset, int length) throws ArrayIndexOutOfBoundsException { long val = getUIntBEElement(offset, length); if (length == 64) return val; if ((val & 1L << (length - 1)) != 0) return val - (1L << length); return val; } /** * Set the length bit signed big-endian int at offset to val * * @param offset * bit offset where the signed int starts * @param length * bit length of the signed int * @param value * value to set the bit field to * @exception ArrayIndexOutOfBoundsException * for invalid offset, length * @exception IllegalArgumentException * if val is an out-of-range value for this bitfield */ protected void setSIntBEElement(int offset, int length, long value) throws ArrayIndexOutOfBoundsException { if (length != 64 && value >= 1L << (length - 1)) throw new IllegalArgumentException(); if (length != 64 && value < 0) value += 1L << length; setUIntBEElement(offset, length, value); } /** * Read the 32 bit IEEE float at offset * * @param offset * bit offset where the float starts * @param length * is ignored * @exception ArrayIndexOutOfBoundsException * for invalid offset */ protected float getFloatElement(int offset, int length) throws ArrayIndexOutOfBoundsException { return Float.intBitsToFloat((int) getUIntElement(offset, 32)); } /** * Set the 32 bit IEEE float at offset to value * * @param offset * bit offset where the float starts * @param length * is ignored * @param value * value to store in bitfield * @exception ArrayIndexOutOfBoundsException * for invalid offset */ protected void setFloatElement(int offset, int length, float value) throws ArrayIndexOutOfBoundsException { // using SInt because floatToRawIntBits might return a negative value setSIntElement(offset, 32, Float.floatToRawIntBits(value)); } /** * * @return the SerialPacket this message originated from, if it was set * externally */ public SerialPacket getSerialPacket() { return serialPacket; } /** * * @param mySerialPacket the SerialPacket this message originated from */ protected void setSerialPacket(SerialPacket mySerialPacket) { serialPacket = mySerialPacket; } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/message/MessageListener.java000066400000000000000000000054431207233610700267010ustar00rootroot00000000000000// $Id: MessageListener.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab * */ /** * @author David Gay * @author Intel Research Berkeley Lab */ package net.tinyos.message; /** * MessageListener interface (listen to tinyos messages).

    * * An interface for listening to messages built from * net.tinyos.message.Message * * @version 1, 15 Jul 2002 * @author David Gay */ public interface MessageListener { /** * This method is called to signal message reception. The destination of * message m is to. * @param to the destination of the message (Note: to is only valid * when using TOSBase base stations) * @param m the received message */ public void messageReceived(int to, Message m); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/message/MoteIF.java000066400000000000000000000150651207233610700247330ustar00rootroot00000000000000// $Id: MoteIF.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab * */ /** * @author David Gay * @author Intel Research Berkeley Lab */ package net.tinyos.message; import net.tinyos.util.*; import net.tinyos.packet.*; import java.io.*; /** * MoteIF provides an application-level Java interface for receiving * messages from, and sending messages to, a mote through a serial port, * TCP connection, or some other means of connectivity. Generally this * is used to write Java programs that connect over a TCP or serial port * to communicate with a TOSBase or GenericBase mote. * * The default way to use MoteIF is to create an instance of this class * and then register one or more MessageListener objects that will * be invoked when messages arrive. For example: * 

     *   MoteIF mif = new MoteIF();
 *   mif.registerListener(new FooMsg(), this);
 *   
 *   // Invoked when a message arrives
 *   public void messageReceived(int toaddr, Message msg) { ... }
 *
    * The default MoteIF constructor uses the MOTECOM environment * variable to determine how the Java application connects to the mote. * For example, a MOTECOM setting of "serial@COM1" connects to a base * station using the serial port on COM1. * * You can also send messages through the base station mote using * MoteIF.send(). * * @see net.tinyos.packet.BuildSource * @author David Gay */ public class MoteIF { /** The destination address for a broadcast. */ public static final int TOS_BCAST_ADDR = 0xffff; protected PhoenixSource source; protected Sender sender; protected Receiver receiver; /** * Create a new mote interface to packet source specified using the * MOTECOM environment variable. Status and error messages will * be printed to System.err. */ public MoteIF() { init(BuildSource.makePhoenix(net.tinyos.util.PrintStreamMessenger.err)); } /** * Create a new mote interface to packet source specified using the * MOTECOM environment variable. Status and error messages will * be printed to 'messages'. * * @param messages where to send status messages (null means no messages) */ public MoteIF(Messenger messages) { init(BuildSource.makePhoenix(messages)); } /** * Create a new mote interface to an arbitrary packet source. The * packet source is started if necessary. * * @param source packet source to use */ public MoteIF(PhoenixSource source) { init(source); } /**********************************************************************/ private void init(PhoenixSource source) { this.source = source; // Start source if it isn't started yet try { source.start(); } catch (IllegalThreadStateException e) { } try { source.awaitStartup(); } catch (IOException e) { e.printStackTrace(); } receiver = new Receiver(source); sender = new Sender(source); } /** * @return this MoteIF's source */ public PhoenixSource getSource() { return source; } /** * Send m to moteId via this mote interface * @param moteId message destination * @param m message * @exception IOException thrown if message could not be sent */ synchronized public void send(int moteId, Message m) throws IOException { sender.send(moteId, m); } /** * Register a listener for given messages type. The message m should be * an instance of a subclass of Message (generated by mig). When a * message of the corresponding type is received, a new instance of m's * class is created with the received message as data. This message is * then passed to the given MessageListener. * * Note that multiple MessageListeners can be registered for the same * message type, and in fact each listener can use a different template * type if it wishes (the only requirement is that m.getType() matches * the received message). * * @param m message template specifying which message to receive * @param l listener to which received messages are dispatched */ synchronized public void registerListener(Message m, MessageListener l) { receiver.registerListener(m, l); } /** * Deregister a listener for a given message type. * @param m message template specifying which message to receive * @param l listener to which received messages are dispatched */ synchronized public void deregisterListener(Message m, MessageListener l) { receiver.deregisterListener(m, l); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/message/Receiver.java000066400000000000000000000163731207233610700253570ustar00rootroot00000000000000// $Id: Receiver.java,v 1.6 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab * */ /** * @author David Gay * @author Intel Research Berkeley Lab */ package net.tinyos.message; import net.tinyos.util.*; import net.tinyos.packet.*; import java.util.*; /** * Receiver class (receive tinyos messages). * * A receiver class provides a simple interface built on Message for receiving * tinyos messages from a SerialForwarder * * @version 1, 15 Jul 2002 * @author David Gay */ public class Receiver implements PacketListenerIF { public static final boolean DEBUG = false; public static final boolean DISPLAY_ERROR_MSGS = true; Hashtable templateTbl; // Mapping from AM type to msgTemplate PhoenixSource source; /** * Inner class representing a single MessageListener and its associated * Message template. */ class msgTemplate { Message template; MessageListener listener; msgTemplate(Message template, MessageListener listener) { this.template = template; this.listener = listener; } public boolean equals(Object o) { try { msgTemplate mt = (msgTemplate) o; if (mt.template.getClass().equals(this.template.getClass()) && mt.listener.equals(this.listener)) { return true; } } catch (Exception e) { return false; } return false; } public int hashCode() { return listener.hashCode(); } } /** * Create a receiver messages from forwarder of any group id and of active * message type m.getType() When such a message is received, a new instance of * m's class is created with the received data and send to * listener.messageReceived * * @param forwarder * packet source to listen to */ public Receiver(PhoenixSource forwarder) { this.templateTbl = new Hashtable(); this.source = forwarder; forwarder.registerPacketListener(this); } /** * Register a particular listener for a particular message type. More than one * listener can be registered for each message type. * * @param template * specify message type and template we're listening for * @param listener * destination for received messages */ public void registerListener(Message template, MessageListener listener) { Integer amType = new Integer(template.amType()); Vector vec = (Vector) templateTbl.get(amType); if (vec == null) { vec = new Vector(); } vec.addElement(new msgTemplate(template, listener)); templateTbl.put(amType, vec); } /** * Stop listening for messages of the given type with the given listener. * * @param template * specify message type and template we're listening for * @param listener * destination for received messages */ public void deregisterListener(Message template, MessageListener listener) { Integer amType = new Integer(template.amType()); Vector vec = (Vector) templateTbl.get(amType); if (vec == null) { throw new IllegalArgumentException( "No listeners registered for message type " + template.getClass().getName() + " (AM type " + template.amType() + ")"); } msgTemplate mt = new msgTemplate(template, listener); // Remove all occurrences while (vec.removeElement(mt)) ; if (vec.size() == 0) templateTbl.remove(amType); } private void error(msgTemplate temp, String msg) { System.err.println("receive error for " + temp.template.getClass().getName() + " (AM type " + temp.template.amType() + "): " + msg); } public void packetReceived(byte[] packet) { if (DEBUG) Dump.dump("Received message", packet); if (packet[0] != Serial.TOS_SERIAL_ACTIVE_MESSAGE_ID) return; // not for us. SerialPacket msg = new SerialPacket(packet, 1); Integer type = new Integer(msg.get_header_type()); Vector vec = (Vector) templateTbl.get(type); if (vec == null) { if (DEBUG) Dump.dump("Received packet with type " + type + ", but no listeners registered", packet); return; } int length = msg.get_header_length(); Enumeration en = vec.elements(); while (en.hasMoreElements()) { msgTemplate temp = (msgTemplate) en.nextElement(); Message received; // Erk - end up cloning the message multiple times in case // different templates used for different listeners try { received = temp.template.clone(length); received.dataSet(msg.dataGet(), SerialPacket.offset_data(0) + msg.baseOffset(), 0, length); received.setSerialPacket(msg); } catch (ArrayIndexOutOfBoundsException e) { error(temp, "invalid length message received (too long)"); continue; } catch (Exception e) { error(temp, "couldn't clone message!"); continue; } /* * Messages that are longer than the template might have a variable-sized * array at their end */ if (temp.template.dataGet().length > length) { error(temp, "invalid length message received (too short)"); continue; } temp.listener.messageReceived(msg.get_header_dest(), received); } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/message/Sender.java000066400000000000000000000076661207233610700250400ustar00rootroot00000000000000// $Id: Sender.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab * */ /** * @author David Gay * @author Intel Research Berkeley Lab */ package net.tinyos.message; import net.tinyos.util.*; import net.tinyos.packet.*; import java.io.*; /** * Sender class (send tinyos messages).

    * * A sender class provides a simple interface built on Message for * sending tinyos messages to a SerialForwarder * * @version 2, 24 Jul 2003 * @author David Gay */ public class Sender { // If true, dump packet contents that are sent private static final boolean VERBOSE = false; PhoenixSource sender; /** * Create a sender talking to PhoenixSource forwarder. The group id of * sent packets is not set. * @param forwarder PhoenixSource with which we wish to send packets */ public Sender(PhoenixSource forwarder) { sender = forwarder; } /** * Send m to moteId via this Sender's SerialForwarder * @param moteId message destination * @param m message * @exception IOException thrown if message could not be sent */ synchronized public void send(int moteId, Message m) throws IOException { int amType = m.amType(); byte[] data = m.dataGet(); if (amType < 0) { throw new IOException("unknown AM type for message " + m.getClass().getName()); } SerialPacket packet = new SerialPacket(SerialPacket.offset_data(0) + data.length); packet.set_header_dest(moteId); packet.set_header_type((short)amType); packet.set_header_length((short)data.length); packet.dataSet(data, 0, SerialPacket.offset_data(0), data.length); byte[] packetData = packet.dataGet(); byte[] fullPacket = new byte[packetData.length + 1]; fullPacket[0] = Serial.TOS_SERIAL_ACTIVE_MESSAGE_ID; System.arraycopy(packetData, 0, fullPacket, 1, packetData.length); sender.writePacket(fullPacket); if (VERBOSE) Dump.dump("sent", fullPacket); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/message/package.html000066400000000000000000000014471207233610700252250ustar00rootroot00000000000000 Provides abstractions for reading and writing data messages to different communication sources.

    Package Specification

    Related Documentation

    tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/000077500000000000000000000000001207233610700222775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/DDocument.java000066400000000000000000000340621207233610700250310ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ package net.tinyos.mviz; // DDocument.java import java.awt.*; import java.awt.event.*; import java.awt.image.*; import java.io.*; import java.lang.reflect.*; import java.net.*; import java.util.*; import javax.imageio.ImageIO; import javax.swing.*; import javax.swing.border.*; import javax.swing.table.*; import net.tinyos.message.*; public class DDocument extends JPanel implements ActionListener{ protected String directory; protected JPanel canvas; protected Vector layers; private Color currentColor; public float[] maxValues; public int selectedFieldIndex; public int selectedLinkIndex; public ImageIcon icon; public Image image; public DNavigate navigator; public Color getColor(){ return currentColor; } public Vector sensed_motes; public Vector sensed_links; public ArrayList moteModels; public ArrayList linkModels; private JTextField jText; private DrawTableModel tableModel; private JTable jTable; private String[] toStringArray(Vector v) { String[] array = new String[v.size()]; for (int i = 0; i < v.size(); i++) { array[i] = (String)v.elementAt(i); } return array; } public DDocument(int width, int height, Vector fieldVector, Vector linkVector, String dir) { super(); layers = new Vector(); directory = dir; setOpaque(false); setLayout(new BorderLayout(6,6)); try{ UIManager.setLookAndFeel(UIManager.getSystemLookAndFeelClassName()); } catch (Exception ignore){} selectedFieldIndex = 0; selectedLinkIndex = 0; canvas = new DPanel(this); canvas.setLayout(null); canvas.setDoubleBuffered(true); canvas.setPreferredSize(new Dimension(width, height)); canvas.setMinimumSize(new Dimension(width, height)); canvas.setSize(new Dimension(width, height)); canvas.setOpaque(false); canvas.setBorder(new SoftBevelBorder(SoftBevelBorder.LOWERED)); add(canvas, BorderLayout.CENTER); sensed_motes = fieldVector; sensed_links = linkVector; moteIndex = new HashMap(); linkIndex = new HashMap(); String imgName = directory + "/mote.gif"; try { image = Toolkit.getDefaultToolkit().getImage(imgName); } catch (Exception e) { System.out.println(e); } System.out.println(imgName); canvas.addComponentListener(new ComponentListener(){ public void componentResized(ComponentEvent e) { navigator.redrawAllLayers(); } public void componentHidden(ComponentEvent arg0) { } public void componentMoved(ComponentEvent arg0) { } public void componentShown(ComponentEvent arg0) { } }); // Make control area JPanel west = new JPanel(); west.setDoubleBuffered(true); west.setLayout(new BoxLayout(west, BoxLayout.Y_AXIS)); add(west, BorderLayout.WEST); currentColor = Color.GRAY; navigator = new DNavigate(sensed_motes, sensed_links, this); west.add(navigator); west.add(Box.createVerticalStrut(10)); tableModel = new DrawTableModel(sensed_motes); jTable = new JTable(tableModel); jTable.setAutoResizeMode(JTable.AUTO_RESIZE_ALL_COLUMNS); JScrollPane scroller = new JScrollPane(jTable); scroller.setPreferredSize(new Dimension(350, 200)); scroller.setMinimumSize(new Dimension(350, 200)); scroller.setSize(new Dimension(350, 200)); west.add(scroller); enableEvents(LinkSetEvent.EVENT_ID); enableEvents(ValueSetEvent.EVENT_ID); } public void actionPerformed(ActionEvent e) { } private void zMove(int direction){ tableModel.updateTable(); } public int width_canvas = 600; public int height_canvas = 600; protected ArrayList motes = new ArrayList(); protected ArrayList links = new ArrayList(); protected DMoteModel selected = null; protected HashMap moteIndex; protected HashMap linkIndex; // Provided default ctor that calls the regular ctor public DDocument(Vector fieldVector, Vector linkVector) { this(300, 300, fieldVector, linkVector, "."); // this syntax calls one ctor from another } public DShape getSelected() { return null; } public void setSelected(DShape selected) { } Random rand = new Random(); private DMoteModel createNewMote(int moteID){ DMoteModel m = new DMoteModel(moteID, rand, this); //System.out.println("Adding mote " + moteID); motes.add(m); moteIndex.put(new Integer(moteID), m); tableModel.add(m); navigator.addMote(m); return m; } public void setMoteValue(int moteID, String name, int value) { ValueSetEvent vsv = new ValueSetEvent(this, moteID, name, value); EventQueue eq = Toolkit.getDefaultToolkit().getSystemEventQueue(); eq.postEvent(vsv); } private DLinkModel createNewLink(DMoteModel start, DMoteModel end) { DLinkModel dl = new DLinkModel(start, end, rand, this); links.add(dl); linkIndex.put(start.getId() + " " + end.getId(), dl); //System.out.println("Put with key <" + start.getId() + " " + end.getId() + ">"); return dl; } public void setLinkValue(int startMote, int endMote, String name, int value) { LinkSetEvent lsv = new LinkSetEvent(this, name, value, startMote, endMote); EventQueue eq = Toolkit.getDefaultToolkit().getSystemEventQueue(); eq.postEvent(lsv); } protected void processEvent(AWTEvent event) { if (event instanceof ValueSetEvent) { ValueSetEvent vsv = (ValueSetEvent)event; String name = vsv.name(); int moteID = vsv.moteId(); int value = vsv.value(); DMoteModel m = (DMoteModel)moteIndex.get(new Integer(moteID)); if (m == null) { m = createNewMote(moteID); } //System.out.println("Set " + moteID + ":" + name + " to " + value); m.setMoteValue(name, value); navigator.redrawAllLayers(); } else if (event instanceof LinkSetEvent) { LinkSetEvent lsv = (LinkSetEvent)event; String name = lsv.name(); int startMote = lsv.start(); int endMote = lsv.end(); int value = lsv.value(); DMoteModel m = (DMoteModel)moteIndex.get(new Integer(startMote)); if (m == null) { m = createNewMote(startMote); } DMoteModel m2 = (DMoteModel)moteIndex.get(new Integer(endMote)); if (m2 == null) { m2 = createNewMote(endMote); } DLinkModel dl = (DLinkModel)linkIndex.get(startMote + " " + endMote); if (dl == null) { //System.out.println("Does not contain key <" + startMote + " " + endMote + ">"); dl = createNewLink(m, m2); } //System.out.println("Setting " + name + " " + startMote + " -> " + endMote + " to " + value); dl.setLinkValue(name, value); navigator.redrawAllLayers(); } else { super.processEvent(event); } } public static void usage() { System.err.println("usage: tos-mviz [-comm source] [-dir image_dir] message_type [message_type ...]"); } // Just a test main -- put a little DDocument on screen public static void main(String[] args) { JFrame frame = new JFrame("MViz"); Vector packetVector = new Vector(); String source = null; String dir = "."; if (args.length > 0) { for (int i = 0; i < args.length; i++) { if (args[i].equals("-comm")) { source = args[++i]; } else if (args[i].equals("-dir")) { dir = args[++i]; } else { String className = args[i]; packetVector.add(className); } } } else if (args.length != 0) { usage(); System.exit(1); } if (packetVector.size() == 0) { usage(); System.exit(1); } DataModel model = new DataModel(packetVector); DDocument doc = new DDocument(600, 600, model.fields(), model.links(), dir); frame.setContentPane(doc); frame.setDefaultCloseOperation(JFrame.EXIT_ON_CLOSE); frame.pack(); frame.setVisible(true); MessageInput input = new MessageInput(packetVector, source, doc); input.start(); } private void repaintAllMotes(){ Iterator it = motes.iterator(); while(it.hasNext()){ ((DMoteModel)it.next()).requestRepaint(); } } private void repaintAllLinks(){ Iterator it = links.iterator(); while(it.hasNext()){ ((DLink)it.next()).repaint(); } } //#########################################################################// private class DrawTableModel extends AbstractTableModel implements DMoteModelListener { private Vector fields; public DrawTableModel(Vector fields) { this.fields = fields; } //-----------------------------o public String getColumnName(int col){ switch(col) { case 0: return "X"; case 1: return "Y"; default: return (String)fields.elementAt(col - 2); } } //-----------------------------o public int getColumnCount() { return fields.size() + 2; } //-----------------------------o public int getRowCount() { return DDocument.this.motes.size(); } //-----------------------------o public Object getValueAt(int row, int col) { DMoteModel model = (DMoteModel) DDocument.this.motes.get(row); switch(col) { case 0: return "" + (int)model.getLocX(); case 1: return "" + (int)model.getLocY(); default: return("" + (int)model.getValue(col - 2)); } } //-----------------------------o public void shapeChanged(DMoteModel changed, int type){ int row = findModel(changed); if (row != -1) fireTableRowsUpdated(row, row); } //-----------------------------o public void add(DMoteModel model){ model.addListener(this); int last = DDocument.this.motes.size()-1; fireTableRowsInserted(last, last); } //-----------------------------o public void remove(DMoteModel model){ int row = findModel(model); if (row != -1) fireTableRowsDeleted(row, row); } //-----------------------------o public void updateTable(){ fireTableDataChanged(); } //-----------------------------o private int findModel(DMoteModel changed){ for (int i=0; i= low && val <= high); } public void mousePressed(MouseEvent e) { lastX = e.getX(); lastY = e.getY(); Iterator it = doc.motes.iterator(); while (it.hasNext()) { DMoteModel model = (DMoteModel)it.next(); if (withinRange(e.getX(), model.getLocX() - 20, model.getLocX() + 20) && withinRange(e.getY(), model.getLocY() - 20, model.getLocY() + 20)) { selected = model; return; } } } public void mouseReleased(MouseEvent e) { if (doc.selected != null) { doc.selected = null; lastX = -1; lastY = -1; } } }); addMouseMotionListener(new MouseMotionAdapter() { public void mouseDragged(MouseEvent e) { if (doc.selected != null) { if (lastY == -1) { lastY = e.getY(); } if (lastX == -1) { lastX = e.getX(); } int x = e.getX(); int y = e.getY(); int dx = x-lastX; int dy = y-lastY; lastX = x; lastY = y; selected.move(selected.getLocX() + dx, selected.getLocY() + dy); } doc.navigator.redrawAllLayers(); } }); } public void paintComponent(Graphics g) { super.paintComponent(g); setOpaque(false); //System.out.println("Painting panel!"); doc.navigator.redrawAllLayers(); } } private class CanvasMouse extends MouseAdapter { } protected class ValueSetEvent extends AWTEvent { public static final int EVENT_ID = AWTEvent.RESERVED_ID_MAX + 1; private String name; private int value; private int mote; public ValueSetEvent(Object target, int mote, String name, int value) { super(target, EVENT_ID); this.value = value; this.name = name; this.mote = mote; } public String name() { return name; } public int value() { return value; } public int moteId() { return mote; } } protected class LinkSetEvent extends AWTEvent { public static final int EVENT_ID = AWTEvent.RESERVED_ID_MAX + 2; private String name; private int value; private int start; private int end; public LinkSetEvent(Object target, String name, int value, int start, int end) { super(target, EVENT_ID); this.value = value; this.name = name; this.start = start; this.end = end; } public String name() { return name; } public int value() { return value; } public int start() { return start; } public int end() { return end; } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/DLayer.java000066400000000000000000000264031207233610700243270ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ package net.tinyos.mviz; // DDocument.java import java.awt.*; import javax.imageio.ImageIO; import javax.swing.*; import java.util.*; import java.awt.event.*; import java.io.*; import javax.swing.*; import javax.swing.border.Border; import javax.swing.border.LineBorder; import javax.swing.table.*; import java.awt.image.*; // Standard imports for XML import javax.xml.parsers.*; import org.xml.sax.*; import org.w3c.dom.*; public class DLayer extends JPanel implements ActionListener{ public static final int MOTE = 0; public static final int LINK = 1; public static final int FIELD = 2; private static final Color[] COLORS = { new Color(231, 220, 206), new Color(250, 210, 99), new Color(209, 230, 179) }; private int type; protected int index; protected int zIndex; protected int z_index = 0; private ArrayList layer = new ArrayList(); private JLabel label; private JCheckBox check; private String[][] DISPLAYS = { {"circle", "img", "txt"}, {"line", "line+label", "label"}, {"color 256", "color 1024", "color 4096", "color 16384"}}; private JComboBox displays; private ArrayList models; private ArrayList linkModels; private JButton up; private JButton down; protected int paintMode = 0; // Values chosen for COLOR so that readings can be right shifted // that many bits to be in range 0-255 static public final int COLOR_256 = 0; static public final int OVAL = 1; static public final int COLOR_1024 = 2; static public final int IMG = 3; static public final int COLOR_4096 = 4; static public final int TXT_MOTE = 5; static public final int COLOR_16384 = 6; static public final int LINE = 7; static public final int LABEL = 8; static public final int LINE_LABEL = 9; protected DNavigate navigator; private String name; private DDocument parent; public DLayer(int zIndex, int index, String label, int type, DDocument parent, ArrayList models, DNavigate navigator){ this.parent = parent; this.type = type; this.models = models; this.zIndex = zIndex; this.index = index; this.navigator = navigator; this.name = label; if (type == MOTE) { this.paintMode = OVAL; } else if (type == LINK) { this.paintMode = LINE; } SpringLayout layout = new SpringLayout(); setLayout(layout); setMaximumSize(new Dimension(350, 25)); setPreferredSize(new Dimension(350, 25)); setSize(new Dimension(350, 25)); setDoubleBuffered(true); setBackground(COLORS[type]); setBorder(new LineBorder(new Color(155, 155, 155))); check = new JCheckBox(); check.setSize(35, 25); check.setMaximumSize(new Dimension(35, 25)); check.setMinimumSize(new Dimension(35, 25)); check.setPreferredSize(new Dimension(35, 25)); up = new JButton("^"); up.setFont(new Font("Times", Font.PLAIN, 9)); up.setSize(25, 25); up.setMaximumSize(new Dimension(25, 25)); up.setMinimumSize(new Dimension(25, 25)); up.setPreferredSize(new Dimension(25, 25)); up.setMargin(new Insets(2, 2, 2, 2)); down = new JButton("v"); down.setFont(new Font("Times", Font.PLAIN, 8)); down.setSize(25, 25); down.setMaximumSize(new Dimension(25, 25)); down.setMinimumSize(new Dimension(25, 25)); down.setPreferredSize(new Dimension(25, 25)); down.setMargin(new Insets(2, 2, 2, 2)); this.label = new JLabel(" " + label, JLabel.LEFT); this.label.setSize(125, 25); this.label.setMaximumSize(new Dimension(125, 25)); this.label.setMinimumSize(new Dimension(125, 25)); this.label.setPreferredSize(new Dimension(125, 25)); switch (type) { case MOTE: this.label.setBackground(new Color(255, 200, 200)); break; case FIELD: this.label.setBackground(new Color(200, 255, 200)); break; case LINK: this.label.setBackground(new Color(200, 200, 255)); break; default: // do nothing } displays = new JComboBox(DISPLAYS[type]); displays.setSize(100, 25); //displays.setMaximumSize(new Dimension(125, 25)); displays.setMinimumSize(new Dimension(125, 25)); displays.setPreferredSize(new Dimension(125, 25)); check.addActionListener(this); up.addActionListener(this); down.addActionListener(this); displays.addActionListener(this); layout.putConstraint(SpringLayout.WEST, this, 0, SpringLayout.WEST, down); layout.putConstraint(SpringLayout.EAST, check, 0, SpringLayout.WEST, down); layout.putConstraint(SpringLayout.EAST, down, 0, SpringLayout.WEST, up); layout.putConstraint(SpringLayout.EAST, up, 0, SpringLayout.WEST, this.label); layout.putConstraint(SpringLayout.EAST, this.label, 0, SpringLayout.WEST, displays); layout.putConstraint(SpringLayout.EAST, displays, 0, SpringLayout.EAST, this); add(check); add(down); add(up); add(this.label); add(displays); } public boolean isFieldSelected(){ return (type==FIELD && check.isSelected()); } public void actionPerformed(ActionEvent e) { if (e.getSource() == check) { if (check.isSelected()){ parent.selectedFieldIndex = index; //repaintLayer(g); //System.out.println("redraw index " +zIndex +" on layer"); } else if(type==FIELD){ //System.out.println("clear"); //parent.canvas.repaint(); //repaintLayer(g); } else { //repaintLayer(g); } } else if (e.getSource() == up){ parent.navigator.moveLayerUp(this.zIndex); } else if (e.getSource() == down){ parent.navigator.moveLayerDown(this.zIndex); } else if (e.getSource() == displays){ String selected = (String)displays.getSelectedItem(); if (selected.equals("circle")){ paintMode = OVAL; } else if (selected.equals("img")){ paintMode = IMG; } else if (selected.equals("txt")){ paintMode = TXT_MOTE; } else if (selected.equals("color 256")) { paintMode = COLOR_256; } else if (selected.equals("color 1024")) { paintMode = COLOR_1024; } else if (selected.equals("color 4096")) { paintMode = COLOR_4096; } else if (selected.equals("color 16384")) { paintMode = COLOR_16384; } else if (selected.equals("line")) { paintMode = LINE; } else if (selected.equals("label")) { paintMode = LABEL; } else if (selected.equals("line+label")) { paintMode = LINE_LABEL; } } //System.out.println("Repainting parent?"); //parent.repaint(); } public void init(){ if (type==LINK){ //addLinks(true); } else { addMotes(true); } } public String toString() { return "Layer " + name + " " + type; } // private void addLinks(boolean paint){ // Iterator it = models.iterator(); // while(it.hasNext()){ // DLink mm = (DLink) it.next(); // //canvas.add(mm); // if (paint) mm.repaint(); // } // } protected void addMote(DMoteModel model, boolean paint){ DShape mote = new DMote(model, this.parent, this); layer.add(mote); } private void addMotes(boolean paint){ Iterator it = models.iterator(); while(it.hasNext()){ addMote((DMoteModel) it.next(), paint); } } public void updateIndex(int index, boolean repaint){ zIndex = index; z_index = (navigator.totalLayers - zIndex)*100; //if (repaint) redrawLayer(); //parent.canvas.setLayer(d.canvas, length - i); } public void paintScreenBefore(Graphics g) { Dimension d = parent.canvas.getSize(); int x = 0; int y = 0; int xstep = (int)(d.width / 40); int ystep = (int)(d.height / 40); for(;x < d.width; x += xstep){ for(y = 0;y < d.height; y += ystep){ double val = 0; double sum = 0; double total = 0; double min = 10000000; Iterator it = models.iterator(); while(it.hasNext()){ DMoteModel m = (DMoteModel) it.next(); double dist = distance(x, y, m.x, m.y); if(true){ //121 if(dist < min) min = dist; val += ((double)(((int)m.getValue(index)) >> paintMode )) / dist /dist; sum += (1/dist/dist); } } int reading = (int)(val / sum); //System.out.println("Reading: " + reading); if (reading > 255) reading = 255; g.setColor(new Color(reading, reading, reading)); //System.out.println("Filling " + x + "+" + step + " " + y + "+" + step + " with " + g.getColor()); g.fillRect(x, y, xstep, ystep); } } } public double distance(int x, int y, int x1, int y1){ return Math.sqrt( (x-x1)*(x-x1)+(y-y1)*(y-y1)); } protected void repaintLayer(Graphics g){ if (check.isSelected()){ //System.out.println("Repaint layer " + name); if (type==FIELD){ paintScreenBefore(g); } else if (type == LINK) { Iterator it = models.iterator(); //System.out.print("Draw links: "); while (it.hasNext()) { DLinkModel model = (DLinkModel)it.next(); DLink lnk = new DLink(model, parent, this); lnk.paintShape(g); //System.out.print("+"); } //System.out.println(); } else if (type == MOTE) { Iterator it = models.iterator(); //System.out.print("Draw motes: "); while (it.hasNext()){ DMoteModel model = (DMoteModel)it.next(); DShape m = new DMote(model, parent, this); m.paintShape(g); //System.out.print("+"); } //System.out.println(); } } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/DLink.java000066400000000000000000000143561207233610700241540ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ package net.tinyos.mviz; // DShape.java import java.awt.*; import java.util.*; import javax.swing.*; import java.awt.event.*; import java.awt.geom.Line2D; public class DLink extends JComponent implements DLinkModelListener { protected DLinkModel model; protected DDocument document; private DLayer layer; // remember the last point for mouse tracking private int lastX, lastY; // Move or Resize ? private int action; private static final int MOVE = 0; //=========================================================================// public DLink(DLinkModel model, DDocument document, DLayer layer) { super(); this.model = model; this.layer = layer; this.document = document; model.addListener(this); // Mouse listeners. addMouseListener( new MouseAdapter() { public void mousePressed(MouseEvent e) { selected(); lastX = e.getX()+getX(); lastY = e.getY()+getY(); if (e.isControlDown()){ }else if(e.isAltDown()){ }else if(e.isShiftDown()){ }else{ DetermineAction(lastX, lastY); } } } ); addMouseMotionListener( new MouseMotionAdapter() { public void mouseDragged(MouseEvent e) { int x = e.getX()+getX(); int y = e.getY()+getY(); // compute delta from last point int dx = x-lastX; int dy = y-lastY; lastX = x; lastY = y; switch(action){ case MOVE: DoAction(dx, dy); break; } } } ); synchToModel(); } //=========================================================================// public DLinkModel getModel() { return(model); } //=========================================================================// public void shapeChanged(DLinkModel changed, int type) { synchToModel(); repaint(); } //=========================================================================// public void paintShape(Graphics g){ Graphics2D g2 = (Graphics2D) g; g.setColor(Color.BLACK); int diffX = (model.m1.getLocX() - model.m2.getLocX()); int diffY = (model.m1.getLocY() - model.m2.getLocY()); if (diffX == 0 && diffY == 0) { return; } if (diffX == 0) {diffX = 1;} if (diffY == 0) {diffY = 1;} int midX = (model.m1.getLocX() + model.m2.getLocX()) / 2; int midY = (model.m1.getLocY() + model.m2.getLocY()) / 2; midY += 8; midX += 10; //midX += Math.abs(((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX))) * 60); if (diffX * diffY < 0) { midY += Math.abs(((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX))) * 10); midX += Math.abs(((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX))) * 10); } else { midY -= Math.abs(((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX))) * 10); midX += Math.abs((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX)) * 10); } switch(layer.paintMode) { case DLayer.LINE_LABEL: g.setColor(Color.BLACK); g2.drawString(document.sensed_links.elementAt(layer.index) + ": " + (int)model.getValue(layer.index), midX, midY); case DLayer.LINE: g2.setStroke(new BasicStroke(3)); g2.setColor(Color.RED); g2.draw(new Line2D.Double(model.m1.getLocX(), model.m1.getLocY(), model.m2.getLocX(), model.m2.getLocY())); break; case DLayer.LABEL: g.setColor(Color.BLACK); g2.drawString(document.sensed_links.elementAt(layer.index) + ": " + (int)model.getValue(layer.index), midX, midY); break; } } //=========================================================================// public void paintComponent(Graphics g) { } //=========================================================================// private void DetermineAction(int x, int y){ action = MOVE; } //=========================================================================// private void DoAction(int dx, int dy){ } //=========================================================================// private void synchToModel(){ setBounds(model.getTop(), model.getLeft(), model.getWidth(), model.getHeight()); } //=========================================================================// private void selected(){ } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/DLinkModel.java000066400000000000000000000117011207233610700251240ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ package net.tinyos.mviz; // DShapeModel.java /* Store the data state for a single shape: type, two points, color Supports DShapeModelListeners. */ import java.awt.*; import javax.swing.*; import java.util.*; import java.awt.event.*; import java.io.*; class DLinkModel extends Object implements Serializable { public static final int VALUE = 0; public static final int MOTION = 1; public static final int ANY = 1; public DDocument root; transient private ArrayList listeners; protected int x12, y12; protected int[] values; DMoteModel m1; DMoteModel m2; protected int COLOR_MAX = 230; public DLinkModel(DMoteModel m1, DMoteModel m2, Random rand, DDocument root){ this.root = root; this.m1 = m1; this.m2 = m2; x12 = getMiddle(m1.x, m2.x); y12 = getMiddle(m1.y, m2.y); values = new int[root.sensed_links.size()]; for (int i=0; i=0; i--){ DLayer a = (DLayer)layers.get(i); a.repaintLayer(g); } parent.canvas.getGraphics().drawImage(offscreen, 0, 0, this); } public void update(Graphics g) { paint(g); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/DShape.java000066400000000000000000000112531207233610700243100ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ package net.tinyos.mviz; // DShape.java import java.awt.*; import java.util.*; import javax.swing.*; import java.awt.event.*; abstract class DShape extends JComponent implements DMoteModelListener { protected DMoteModel model; protected DDocument document; public Image img; // remember the last point for mouse tracking private int lastX, lastY; protected DLayer layer; // Move or Resize ? private int action; private static final int MOVE = 0; //=========================================================================// public DShape(DMoteModel model, DDocument document, DLayer layer) { super(); this.model = model; this.img = document.image; this.document = document; this.layer = layer; model.addListener(this); addMouseMotionListener( new MouseMotionAdapter() { public void mouseDragged(MouseEvent e) { int x = e.getX()+getX(); int y = e.getY()+getY(); // compute delta from last point int dx = x-lastX; int dy = y-lastY; lastX = x; lastY = y; switch(action){ case MOVE: DoAction(dx, dy); break; } } } ); synchToModel(); } //=========================================================================// public DMoteModel getModel() { return(model); } //=========================================================================// public void shapeChanged(DMoteModel changed, int type) { synchToModel(); repaint(); } //=========================================================================// public abstract void paintShape(Graphics g); //=========================================================================// public void paintComponent(Graphics g) { } //=========================================================================// private void DetermineAction(int x, int y){ action = MOVE; } //=========================================================================// private void DoAction(int dx, int dy){ model.applyDeltas(dx, dy); } //=========================================================================// private void synchToModel(){ int x=0, y=0, w=0, h=0; switch(layer.paintMode){ case DLayer.IMG: x = model.getLocX(); y = model.getLocY(); //w = model.getWidth(layer.index); //h = model.getHeight(layer.index); w = 250; h = 250; break; case DLayer.OVAL: x = model.getLocX(); y= model.getLocY(); w = 10; h = 10; break; case DLayer.TXT_MOTE: x = model.getLocX(); y= model.getLocY(); w = 250; h = 250; break; } //setLocation(x, y); setBounds(0, 0, 0, 0); } //=========================================================================// private void selected(){ document.setSelected(this); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/DShapeModel.java000066400000000000000000000141061207233610700252710ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ package net.tinyos.mviz; // DShapeModel.java /* Store the data state for a single shape: type, two points, color Supports DShapeModelListeners. */ import java.awt.*; import javax.swing.*; import java.util.*; import java.awt.event.*; import java.io.*; class DShapeModel extends Object implements Serializable { // The 5 standard things for a DShapeModel to store protected char type; protected int x1, y1, x; protected int x2, y2, y; protected Color fill; protected float value; protected int HALF_WIDTH = 20; protected int HALF_HEIGHT = 20; // NOTE: "transient" -- not serialized transient private ArrayList listeners; public DShapeModel(char type, int x, int y, float value) { this.type = type; this.x = x; this.y = y; this.value = value; int color = (int)(value)%230; this.fill = new Color(color+15, color, color+25); listeners = null; this.x1 = x - this.HALF_WIDTH; this.x2 = x + this.HALF_WIDTH; this.y1 = y - this.HALF_HEIGHT; this.y2 = y + this.HALF_HEIGHT; } // Construct a DShapeModel with default size. public DShapeModel(char type, Color color) { this(type, 50, 50, 89, 89, color); } public DShapeModel(){ this('m', new Color(12,24,48)); } public DShapeModel(char type, int x1, int y1, int x2, int y2, Color fill) { this.type = type; this.x1 = x1; this.y1 = y1; this.x2 = x2; this.y2 = y2; this.fill = fill; listeners = null; } public DShapeModel(DShapeModel other) { this.type = other.type; this.x1 = other.x1; this.y1 = other.y1; this.x2 = other.x2; this.y2 = other.y2; this.fill = other.fill; listeners = null; } public char getType() { return(type); } public int getX1() { return(x1); } public int getY1() { return(y1); } public int getX2() { return(x2); } public int getY2() { return(y2); } // Below here, code not done public void applyDeltas(int dx1, int dy1, int dx2, int dy2) { x1 += dx1; x2 += dx2; y1 += dy1; y2 += dy2; x += dx1; y += dy1; fireChanges(); } public int getWidth() { return Math.abs(x2-x1)+1; } public int getHeight() { return Math.abs(y2-y1)+1; } public int getLocX() { return Math.min(x1, x2); } public int getLocY() { return Math.min(y1, y2); } public Color getColor() { return(fill); } public void setColor(Color color) { if (fill.equals(color)) return; fill = color; fireChanges(); } public void addListener(DShapeModelListener listener) { if (listeners == null) listeners = new ArrayList(); Iterator it = listeners.iterator(); while (it.hasNext()) { if (it.next() == listener) return; } listeners.add(listener); } public void removeListener(DShapeModelListener listener) { if (listeners == null) return; Iterator it = listeners.iterator(); while (it.hasNext()) { if (it.next() == listener){ it.remove(); return; } } } //=========================================================================/ protected void fireChanges(){ if (listeners==null) return; Iterator it = listeners.iterator(); while (it.hasNext()) ((DShapeModelListener)(it.next())).shapeChanged(this); } //=========================================================================/ public void rotate(){ // Get old height/width and locations. int x = getLocX(); int y = getLocY(); int w = getWidth(); int h = getHeight(); int dL = (h/2-w/2); // Get the locations right. x-=dL; y+= dL; x1=x; x2=x+h-1; y1=y; y2=y+w-1; fireChanges(); } //=========================================================================/ // Rotation with respect to center. public void scale(int magnitude){ if (x1"); links.add(name); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/Makefile000066400000000000000000000001431207233610700237350ustar00rootroot00000000000000# Top-level Makefile for tools/java SUBDIRS = ROOT = ../../.. include $(ROOT)/Makefile.include tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/MessageInput.java000066400000000000000000000130161207233610700255470ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ package net.tinyos.mviz; import java.lang.reflect.*; import java.io.*; import java.util.*; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class MessageInput implements net.tinyos.message.MessageListener { private Vector msgVector = new Vector(); private MoteIF moteIF; private DDocument document; public MessageInput(Vector packetVector, String commSource, DDocument doc) { document = doc; loadMessages(packetVector); createSource(commSource); installListeners(); } private void loadMessages(Vector packetVector) { for (int i = 0; i < packetVector.size(); i++) { String className = (String)packetVector.elementAt(i); try { Class c = Class.forName(className); Object packet = c.newInstance(); Message msg = (Message)packet; msgVector.addElement(msg); } catch (Exception e) { System.err.println(e); } } } private void createSource(String source) { if (source != null) { moteIF = new MoteIF(BuildSource.makePhoenix(source, PrintStreamMessenger.err)); } else { moteIF = new MoteIF(BuildSource.makePhoenix(PrintStreamMessenger.err)); } } private void addMsgType(Message msg) { moteIF.registerListener(msg, this); } private void installListeners() { Enumeration msgs = msgVector.elements(); while (msgs.hasMoreElements()) { Message m = (Message)msgs.nextElement(); this.addMsgType(m); } } public void start() {} public void messageReceived(int to, Message message) { Hashtable table = new Hashtable(); Hashtable linkTable = new Hashtable(); //System.out.println("Received message:"); //System.out.println(message); Class pktClass = message.getClass(); Method[] methods = pktClass.getMethods(); for (int i = 0; i < methods.length; i++) { Method method = methods[i]; String name = method.getName(); Class[] params = method.getParameterTypes(); Class returnType = method.getReturnType(); if (params.length != 0 || returnType.isArray()) { continue; } if (name.startsWith("get_") && !name.startsWith("get_link")) { name = name.substring(4); // Chop off "get_" try { //System.out.println(name + " returns " + res); Integer result = (Integer)method.invoke(message, null); table.put(name, result); } catch (java.lang.IllegalAccessException exc) { System.err.println("Unable to access field " + name); } catch (java.lang.reflect.InvocationTargetException exc) { System.err.println("Unable to access target " + name); } } else if (name.startsWith("get_link_")) { name = name.substring(9); // chop off "get_link_" try { Integer result = (Integer)method.invoke(message, null); linkTable.put(name, result); } catch (java.lang.IllegalAccessException exc) { System.err.println("Unable to access field " + name); } catch (java.lang.reflect.InvocationTargetException exc) { System.err.println("Unable to access target " + name); } } } if (table.containsKey("origin")) { Integer origin = (Integer)table.get("origin"); //table.remove("origin"); Enumeration elements = table.keys(); while (elements.hasMoreElements()) { String key = (String)elements.nextElement(); Integer value = (Integer)table.get(key); document.setMoteValue(origin.intValue(), key, value.intValue()); } elements = linkTable.keys(); while (elements.hasMoreElements()) { String key = (String)elements.nextElement(); if (!key.endsWith("_value")) { continue; } Integer value = (Integer)linkTable.get(key); key = key.substring(0, key.length() - 6); // chop off "_value" String addrkey = key + "_addr"; if (!linkTable.containsKey(addrkey)) { continue; } Integer addr = (Integer)linkTable.get(addrkey); document.setLinkValue(origin.intValue(), addr.intValue(), key, value.intValue()); } } else { System.err.println("Could not find origin field, discarding message."); } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/images/000077500000000000000000000000001207233610700235445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/mviz/images/tmote_sky.gif000066400000000000000000000102461207233610700262540ustar00rootroot00000000000000GIF89ad@(;(@(F)4+N,J%*-,F*Q/10T6Y#1Q5^7Q:a5S%5G,4@"6Z#5_:]269*:<695?hBq<9-Dl"b(27?KI=-*D]/CU@>C1A\OAC?8CXFA>=DGN|;C_$Mp!NwDHK-Oh;K[CIP5Kl.Om7LfAJVWSFB7PY8NbY UBLaLLINLDZ)WyJNQPNA\K1+U!\|,V"]`?YLATi@ToMTNFUePSUITkMU\9\uVTQLTqEZd@[n%cYVJ<[&g|7_~FZvJ[oQZg7apT8S[bPZpV[]2ia]PHcx>fBgz3ka_W__]VamDgYahPcyOeuNdGfccN]aoUdu^ceZbvdbfNi~pcOZhtdem^hn>s]maFpoi\MqjjgOtijsVqemtiloQsdmzZqbsa`oemZx{`unCqn}vqdks{osukswqmrtors|xr}Uwt\qye}xfi}vy|c}n~xys{m}sm{o{}wzw{cw}atYl~|ywvjv~c˸ȼþÿ¾´Ǿ! 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    Package Specification

    Related Documentation

    For how to use the classes in this package, please see the man page of the tos-mviz tool. tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/000077500000000000000000000000001207233610700225615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/AbstractSource.java000066400000000000000000000077671207233610700263710ustar00rootroot00000000000000// $Id: AbstractSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; import java.io.*; import net.tinyos.util.*; /** * Provide a standard, generic implementation of PacketSource. Subclasses * need only implement low-level open and close operations, and packet * reading and writing. This class provides the automatic close-on-error * functionality, general error checking, and standard messages. */ abstract public class AbstractSource implements PacketSource { protected String name; protected boolean opened = false; protected Messenger messages; protected void message(String s) { if (messages != null) messages.message(s); } protected AbstractSource(String name) { this.name = name; } public String getName() { return name; } synchronized public void open(Messenger messages) throws IOException { if (opened) throw new IOException("already open"); this.messages = messages; openSource(); opened = true; } synchronized public void close() throws IOException { if (opened) { opened = false; closeSource(); } } protected void failIfClosed() throws IOException { if (!opened) throw new IOException("closed"); } public byte[] readPacket() throws IOException { failIfClosed(); try { return check(readSourcePacket()); } catch (IOException e) { close(); throw e; } } synchronized public boolean writePacket(byte[] packet) throws IOException { failIfClosed(); try { return writeSourcePacket(check(packet)); } catch (IOException e) { close(); throw e; } } protected byte[] check(byte[] packet) throws IOException { return packet; } // Implementation interfaces abstract protected void openSource() throws IOException; abstract protected void closeSource() throws IOException; abstract protected byte[] readSourcePacket() throws IOException; protected boolean writeSourcePacket(byte[] packet) throws IOException { // Default writer swallows packets return true; } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/BaudRate.java000066400000000000000000000020361207233610700251140ustar00rootroot00000000000000/** * This file contains the default baud rate for current TinyOS * platforms. Don't add anything but platform entries, as this file is also * #included in C code to get the table, with appropriate #define's to * avoid problems... */ package net.tinyos.packet; class BaudRate { static void init() throws Exception { /* The Platform.x argument is there for when this code is #include'd into C */ Platform.add(Platform.x, "mica", 19200); Platform.add(Platform.x, "mica2", 57600); Platform.add(Platform.x, "mica2dot", 19200); Platform.add(Platform.x, "telos", 115200); Platform.add(Platform.x, "telosb", 115200); Platform.add(Platform.x, "tinynode", 115200); Platform.add(Platform.x, "tmote", 115200); Platform.add(Platform.x, "micaz", 57600); Platform.add(Platform.x, "eyesIFX", 57600); Platform.add(Platform.x, "intelmote2", 115200); Platform.add(Platform.x, "iris", 57600); Platform.add(Platform.x, "shimmer", 115200); Platform.add(Platform.x, "ucmini", 115200); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/BuildSource.java000066400000000000000000000322531207233610700256510ustar00rootroot00000000000000// $Id: BuildSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; import net.tinyos.util.*; /** * This class is where packet-sources are created. It also provides * convenient shortcuts for building PhoenixSources on packet-sources. * * See PacketSource and PhoenixSource for details on the source behaviours. * * Most applications will probably use net.tinyos.message.MoteIF with * the default source, but those that don't must use BuildSource to obtain * a PacketSource. * * The default source is specified by the MOTECOM environment variable * (note that the JNI code for net.tinyos.util.Env must be installed for * this to work - see net/tinyos/util/Env.INSTALL for details). When * MOTECOM is undefined (or the JNI code for Env.java cannot be found), the * packet source is "sf@localhost:9002" (new serial-forwarder, on localhost * port 9002). * * Packet sources can either be specified by strings (when calling * makePacketSource, or by calling a specific makeXXX method * (e.g., makeSF, makeSerial). There are also * makeArgsXXX methods which make a source from its source-args (see below). * * Packet source strings have the format: [@], * where source-args have reasonable defaults for most sources. * The sourceHelp method prints an up-to-date description * of known sources and their arguments. */ public class BuildSource { /** * Make a new PhoenixSource over a specified PacketSource * Note that a PhoenixSource must be started (start method) * before use, and that resurrection is off by default (the default error * calls System.exit). * @param source The packet-source to use (not null) * @param messages Where to send status messages (null for no messages) * @return The new PhoenixSource */ public static PhoenixSource makePhoenix(PacketSource source, Messenger messages) { return new PhoenixSource(source, messages); } /** * Make a new PhoenixSource over a specified PacketSource * Note that a PhoenixSource must be started (start method) * before use, and that resurrection is off by default (the default error * calls System.exit). * @param name The packet-source to use, specified with a packet-source * string * @param messages Where to send status messages (null for no messages) * @return The new PhoenixSource, or null if name is an invalid source */ public static PhoenixSource makePhoenix(String name, Messenger messages) { PacketSource source = makePacketSource(name); if (source == null) { return null; } return new PhoenixSource(source, messages); } /** * Make a new PhoenixSource over the default PacketSource * Note that a PhoenixSource must be started (start method) * before use, and that resurrection is off by default (the default error * calls System.exit). * @param messages Where to send status messages (null for no messages) * @return The new PhoenixSource * @return The new PhoenixSource, or null if the default packet source is * invalid (ie, the MOTECOM environment variable specifies an invalid packet * source) */ public static PhoenixSource makePhoenix(Messenger messages) { PacketSource source = makePacketSource(); if (source == null) { return null; } return new PhoenixSource(source, messages); } /** * Make the default packet source * @return The packet source, or null if it could not be made */ public static PacketSource makePacketSource() { return makePacketSource(Env.getenv("MOTECOM")); } /** * Make the specified packet source * @param name Name of the packet source, or null for "sf@localhost:9002" * @return The packet source, or null if it could not be made */ public static PacketSource makePacketSource(String name) { if (name == null) name = "sf@localhost:9002"; // default source ParseArgs parser = new ParseArgs(name, "@"); String source = parser.next(); String args = parser.next(); PacketSource retVal = null; if (source.equals("sf")) retVal = makeArgsSF(args); if (source.equals("serial")) retVal = makeArgsSerial(args); if (source.equals("network")) retVal = makeArgsNetwork(args); if (source.equals("tossim-serial")) retVal = makeArgsTossimSerial(args); if (source.equals("tossim-radio")) retVal = makeArgsTossimRadio(args); return retVal; } /** * Return summary of source string specifications */ public static String sourceHelp() { return " - sf@HOSTNAME:PORTNUMBER\n" + " A serial forwarder.\n" + " - serial@SERIALPORT:BAUDRATE\n" + " A mote connected to a serial port using the TinyOS 2.0 serial protocol.\n" + " BAUDRATE is either a number or a platform name (selects platform's\n" + " default baud rate).\n" + " - network@HOSTNAME:PORTNUMBER\n" + " A mote whose serial port is accessed over the network.\n" + " - tossim-serial[@HOSTNAME]\n" + " The serial port of tossim node 0.\n" + " - tossim-radio[@HOSTNAME]\n" + " The radios of tossim nodes.\n" + "\n" + "Examples: serial@COM1:mica2, serial@/dev/ttyUSB2:19200, sf@localhost:9000"; } /** * Make a serial-forwarder source (tcp/ip client) from an argument string * @param args "hostname:port-number", or null for "localhost:9002" * @return The new PacketSource or null for invalid arguments */ public static PacketSource makeArgsSF(String args) { if (args == null) args = "localhost:9002"; ParseArgs parser = new ParseArgs(args, ":"); String host = parser.next(); String portS = parser.next(); if (portS == null) return null; int port = Integer.parseInt(portS); return makeSF(host, port); } /** * Make a serial-forwarder source (tcp/ip client) * @param host hostname * @param port port number * @return The new PacketSource */ public static PacketSource makeSF(String host, int port) { return new SFSource(host, port); } private static int decodeBaudrate(String rateS) { try { int rate = Platform.get(rateS); if (rate == -1) rate = Integer.parseInt(rateS); if (rate > 0) return rate; } catch (NumberFormatException e) { } return -1; } /** * Make a serial-port packet source. Serial packet sources report * missing acknowledgements via a false result to writePacket. * @param args "COMn[:baudrate]" ("COM1" if args is null) * baudrate is an integer or mote name * The default baudrate is 19200. * @return The new packet source, or null if the arguments are invalid */ public static PacketSource makeArgsSerial(String args) { if (args == null) args = "COM1"; ParseArgs parser = new ParseArgs(args, ":"); String port = parser.next(); String platformOrBaud = parser.next(); int baudrate = decodeBaudrate(platformOrBaud); if (baudrate < 0) return null; return makeSerial(port, baudrate); } /** * Make a serial-port packet source. Serial packet sources report * missing acknowledgements via a false result to writePacket. * @param port javax.comm serial port name ("COMn:") * @param baudrate requested baudrate * @return The new packet source */ public static PacketSource makeSerial(String port, int baudrate) { return new Packetizer("serial@" + port + ":" + baudrate, new SerialByteSource(port, baudrate)); } /** * Make a serial-port packet source for a network-accessible serial * port. Serial packet sources report missing acknowledgements via a * false result to writePacket. * @param args "hostname:portnumber" (no default) * @return The new packet source, or null if the arguments are invalid */ public static PacketSource makeArgsNetwork(String args) { if (args == null) return null; ParseArgs parser = new ParseArgs(args, ":,"); String host = parser.next(); String portS = parser.next(); if (portS == null) return null; int port = Integer.parseInt(portS); return makeNetwork(host, port); } /** * Make a serial-port packet source for a network-accessible serial * port. Serial packet sources report missing acknowledgements via a * false result to writePacket. * @param host hostname of network-accessible serial port * @param port tcp/ip port number * @return The new packet source */ public static PacketSource makeNetwork(String host, int port) { return new Packetizer("network@" + host + ":" + port, new NetworkByteSource(host, port)); } // We create tossim sources using reflection to avoid depending on // tossim at compile-time /** * Make a tossim serial port (node 0) packet source * @param args "hostname" ("localhost" for null) (on which tossim runs) * @return The new packet source */ public static PacketSource makeArgsTossimSerial(String args) { if (args == null) args = "localhost"; return makeTossimSerial(args); } /** * Make a tossim serial port (node 0) packet source * @param host hostname on which tossim runs * @return The new packet source */ public static PacketSource makeTossimSerial(String host) { return makeTossimSource("TossimSerialSource", host); } /** * Make a tossim radio packet source * @param args "hostname" ("localhost" for null) (on which tossim runs) * @return The new packet source */ public static PacketSource makeArgsTossimRadio(String args) { if (args == null) args = "localhost"; return makeTossimRadio(args); } /** * Make a tossim radio packet source * @param host hostname on which tossim runs * @return The new packet source */ public static PacketSource makeTossimRadio(String host) { return makeTossimSource("TossimRadioSource", host); } private static PacketSource makeTossimSource(String name, String host) { try { Class[] oneStringArg = new Class[1]; oneStringArg[0] = Class.forName("java.lang.String"); Object[] args = new Object[1]; args[0] = host; Class tossimSource = Class.forName("net.tinyos.sim.packet." + name); return (PacketSource)tossimSource.getConstructor(oneStringArg).newInstance(args); } catch (Exception e) { System.err.println("Couldn't instantiate tossim packet source"); System.err.println("Did you compile tossim?"); return null; } } // static class ParseArgs { // String tokens[]; // int tokenIndex; // ParseArgs(String s, String delimiterSequence) { // int count = delimiterSequence.length(); // tokens = new String[count + 1]; // tokenIndex = 0; // // Fill in the tokens // int i = 0, lastMatch = 0; // while (i < count) { // int pos = s.indexOf(delimiterSequence.charAt(i++)); // if (pos >= 0) { // // When we finally find a delimiter, we know where // // the last token ended // tokens[lastMatch] = s.substring(0, pos); // lastMatch = i; // s = s.substring(pos + 1); // } // } // tokens[lastMatch] = s; // } // String next() { // return tokens[tokenIndex++]; // } // } public static void main(String[] args) { System.err.println(sourceHelp()); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/ByteSource.java000066400000000000000000000045301207233610700255120ustar00rootroot00000000000000// $Id: ByteSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Simple byte I/O interface for use with PacketSource packetizers */ package net.tinyos.packet; import java.io.*; public interface ByteSource { public void open() throws IOException; public void close(); public byte readByte() throws IOException; public void writeBytes(byte[] bytes) throws IOException; } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/Makefile000066400000000000000000000004761207233610700242300ustar00rootroot00000000000000# Makefile for tools/java/net/tinyos/packet INITIAL_TARGETS = Serial.class Serial.java ROOT = ../../.. include $(ROOT)/Makefile.include TOS=$(shell ncc -print-tosdir) SERIAL_H = $(TOS)/lib/serial/Serial.h Serial.java: $(SERIAL_H) FORCE ncg -o $@ -java-classname=net.tinyos.packet.Serial java $(SERIAL_H) Serial.h tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/NetworkByteSource.java000066400000000000000000000051251207233610700270650ustar00rootroot00000000000000// $Id: NetworkByteSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; import java.io.*; import java.net.*; /** * A tcp/ip (client) byte-source */ public class NetworkByteSource extends StreamByteSource { private Socket socket; private String host; private int port; public NetworkByteSource(String host, int port) { this.host = host; this.port = port; } protected void openStreams() throws IOException { socket = new Socket(host, port); is = socket.getInputStream(); os = socket.getOutputStream(); } protected void closeStreams() throws IOException { socket.close(); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/PacketListenerIF.java000066400000000000000000000045041207233610700265630ustar00rootroot00000000000000// $Id: PacketListenerIF.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; /** * * The listener interface receives incoming packets. * * @author     Mike Chen * @since 1.1.6 */ public interface PacketListenerIF extends java.util.EventListener { public void packetReceived(byte[] packet); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/PacketSource.java000066400000000000000000000106751207233610700260250ustar00rootroot00000000000000// $Id: PacketSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** This interface specifies the generic behaviour of a packet mediator. The read and write operations are blocking. Reads and writes may fail (e.g., for communications failure), which implicitly closes the mediator. It is not possible to reopen a mediator after it is closed (instead, a new mediator should be created). The packet byte array must be at least 1 byte long - the first byte indicates the type of packet and is used to dispatch to upper layers. PacketSources are point-to-point and have "at most once" semantics. writePacket should return true only if the packet has been received Note that checking this is not possible with some of our broken, legacy protocols, and that we will optimistically assume that packets sent over reliable links (e.g., tcp/ip socket to a serial forwarder) will be reliably delivered by tcp/ip. */ package net.tinyos.packet; import java.io.*; import net.tinyos.util.*; public interface PacketSource { /** * Get PacketSource name * @return the name of this packet source, valid for use with * BuildSource.makeSource. */ public String getName(); /** * Open a packet source * @param messages A destination for informative messages from the * packet source, or null to discard these. * @exception IOException If the source could not be opened */ public void open(Messenger messages) throws IOException; /** * Close a packet source. Closing a source must force any * running readPacket and writePacket * operations to terminate with an IOException * @exception IOException Thrown if a problem occured during closing. * The source is considered closed even if thos occurs. * Closing a closed source does not cause this exception */ public void close() throws IOException; /** * Read a packet * @return The packet read (newly allocated). The format is described * above * @exception IOException If the source detected a problem. The source * is automatically closed. */ public byte[] readPacket() throws IOException; /** * Write a packet * @param packet The packet to write. The format is decribed above. * @return Some packet sources will return false if the packet * could not be written. */ public boolean writePacket(byte[] packet) throws IOException; } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/Packetizer.java000066400000000000000000000277311207233610700255370ustar00rootroot00000000000000// $Id: Packetizer.java,v 1.8 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; import net.tinyos.util.*; import java.io.*; import java.util.*; /** * The Packetizer class implements the new mote-PC protocol, using a ByteSource * for low-level I/O */ public class Packetizer extends AbstractSource implements Runnable { /* * Protocol inspired by, but not identical to, RFC 1663. There is * currently no protocol establishment phase, and a single byte * ("packet type") to identify the kind/target/etc of each packet. * * The protocol is really, really not aiming for high performance. * * There is however a hook for future extensions: implementations * are required to answer all unknown packet types with a P_UNKNOWN * packet. * * To summarise the protocol: * - the two sides (A & B) are connected by a (potentially * unreliable) byte stream * * - the two sides exchange packets framed by 0x7e (SYNC_BYTE) bytes * * - each packet has the form * <16-bit crc> * where the crc (see net.tinyos.util.Crc) covers the packet type * and bytes 1..n * * - bytes can be escaped by preceding them with 0x7d and their * value xored with 0x20; 0x7d and 0x7e bytes must be escaped, * 0x00 - 0x1f and 0x80-0x9f may be optionally escaped * * - There are currently 5 packet types: * P_PACKET_NO_ACK: A user-packet, with no ack required * P_PACKET_ACK: A user-packet with a prefix byte, ack * required. The receiver must send a P_ACK packet with the * prefix byte as its contents. * P_ACK: ack for a previous P_PACKET_ACK packet * P_UNKNOWN: unknown packet type received. On reception of an * unknown packet type, the receicer must send a P_UNKNOWN packet, * the first byte must be the unknown packet type. * * - Packets that are greater than a (private) MTU are silently * dropped. */ final static boolean DEBUG = false; final static int SYNC_BYTE = Serial.HDLC_FLAG_BYTE; final static int ESCAPE_BYTE = Serial.HDLC_CTLESC_BYTE; final static int MTU = 256; final static int ACK_TIMEOUT = 1000; // in milliseconds final static int P_ACK = Serial.SERIAL_PROTO_ACK; final static int P_PACKET_ACK = Serial.SERIAL_PROTO_PACKET_ACK; final static int P_PACKET_NO_ACK = Serial.SERIAL_PROTO_PACKET_NOACK; final static int P_UNKNOWN = Serial.SERIAL_PROTO_PACKET_UNKNOWN; private ByteSource io; private boolean inSync; private byte[] receiveBuffer = new byte[MTU]; private int seqNo; // Packets are received by a separate thread and placed in a // per-packet-type queue. If received[x] is null, then x is an // unknown protocol (but P_UNKNOWN and P_PACKET_ACK are handled // specially) private Thread reader; private LinkedList[] received; /** * Packetizers are built using the makeXXX methods in BuildSource */ Packetizer(String name, ByteSource io) { super(name); this.io = io; inSync = false; seqNo = 13; reader = new Thread(this); received = new LinkedList[256]; received[P_ACK] = new LinkedList(); received[P_PACKET_NO_ACK] = new LinkedList(); } synchronized public void open(Messenger messages) throws IOException { super.open(messages); if (!reader.isAlive()) { reader.start(); } } protected void openSource() throws IOException { io.open(); } protected void closeSource() { io.close(); } protected byte[] readProtocolPacket(int packetType, long deadline) throws IOException { LinkedList inPackets = received[packetType]; // Wait for a packet on inPackets synchronized (inPackets) { while (inPackets.isEmpty()) { long now = System.currentTimeMillis(); if (deadline != 0 && now >= deadline) { return null; } try { inPackets.wait(deadline != 0 ? deadline - now : 0); } catch (InterruptedException e) { throw new IOException("interrupted"); } } return (byte[]) inPackets.removeFirst(); } } // Place a packet in its packet queue, or reject unknown packet // types (which don't have a queue) protected void pushProtocolPacket(int packetType, byte[] packet) { LinkedList inPackets = received[packetType]; if (inPackets != null) { synchronized (inPackets) { inPackets.add(packet); inPackets.notify(); } } else if (packetType != P_UNKNOWN) { try { writeFramedPacket(P_UNKNOWN, packetType, ackPacket, 0); } catch (IOException e) { } message(name + ": ignoring unknown packet type 0x" + Integer.toHexString(packetType)); } } protected byte[] readSourcePacket() throws IOException { // Packetizer packet format is identical to PacketSource's for (;;) { byte[] packet = readProtocolPacket(P_PACKET_NO_ACK, 0); if (packet.length >= 1) { return packet; } } } // Write an ack-ed packet protected boolean writeSourcePacket(byte[] packet) throws IOException { for (int retries = 0; retries < 25; retries++) { writeFramedPacket(P_PACKET_ACK, ++seqNo, packet, packet.length); long deadline = System.currentTimeMillis() + ACK_TIMEOUT; byte[] ack = readProtocolPacket(P_ACK, deadline); if (ack == null) { if (DEBUG) { message(name + ": ACK timed out"); } continue; } if (ack[0] == (byte) seqNo) { if (DEBUG) { message(name + ": Rcvd ACK"); } return true; } } return false; } static private byte ackPacket[] = new byte[0]; public void run() { try { for (;;) { byte[] packet = readFramedPacket(); int packetType = packet[0] & 0xff; int pdataOffset = 1; if (packetType == P_PACKET_ACK) { // send ack writeFramedPacket(P_ACK, packet[1], ackPacket, 0); // And merge with un-acked packets packetType = P_PACKET_NO_ACK; pdataOffset = 2; } int dataLength = packet.length - pdataOffset; byte[] dataPacket = new byte[dataLength]; System.arraycopy(packet, pdataOffset, dataPacket, 0, dataLength); pushProtocolPacket(packetType, dataPacket); } } catch (IOException e) { } } // Read system-level packet. If inSync is false, we currently don't // have sync private byte[] readFramedPacket() throws IOException { int count = 0; boolean escaped = false; for (;;) { if (!inSync) { message(name + ": resynchronising"); // re-synchronise while (io.readByte() != SYNC_BYTE) ; inSync = true; count = 0; escaped = false; } if (count >= MTU) { // Packet too long, give up and try to resync message(name + ": packet too long"); inSync = false; continue; } byte b = io.readByte(); if (escaped) { if (b == SYNC_BYTE) { // sync byte following escape is an error, resync message(name + ": unexpected sync byte"); inSync = false; continue; } b ^= 0x20; escaped = false; } else if (b == ESCAPE_BYTE) { escaped = true; continue; } else if (b == SYNC_BYTE) { if (count < 4) { // too-small frames are ignored count = 0; continue; } byte[] packet = new byte[count - 2]; System.arraycopy(receiveBuffer, 0, packet, 0, count - 2); int readCrc = (receiveBuffer[count - 2] & 0xff) | (receiveBuffer[count - 1] & 0xff) << 8; int computedCrc = Crc.calc(packet, packet.length); if (DEBUG) { System.err.println("received: "); Dump.printPacket(System.err, packet); System.err.println(" rcrc: " + Integer.toHexString(readCrc) + " ccrc: " + Integer.toHexString(computedCrc)); } if (readCrc == computedCrc) { return packet; } else { message(name + ": bad packet"); /* * We don't lose sync here. If we did, garbage on the line at startup * will cause loss of the first packet. */ count = 0; continue; } } receiveBuffer[count++] = b; } } // Class to build a framed, escaped and crced packet byte stream static class Escaper { byte[] escaped; int escapePtr; int crc; // We're building a length-byte packet Escaper(int length) { escaped = new byte[2 * length]; escapePtr = 0; crc = 0; escaped[escapePtr++] = SYNC_BYTE; } static private boolean needsEscape(int b) { return b == SYNC_BYTE || b == ESCAPE_BYTE; } void nextByte(int b) { b = b & 0xff; crc = Crc.calcByte(crc, b); if (needsEscape(b)) { escaped[escapePtr++] = ESCAPE_BYTE; escaped[escapePtr++] = (byte) (b ^ 0x20); } else { escaped[escapePtr++] = (byte) b; } } void terminate() { escaped[escapePtr++] = SYNC_BYTE; } } // Write a packet of type 'packetType', first byte 'firstByte' // and bytes 2..'count'+1 in 'packet' private synchronized void writeFramedPacket(int packetType, int firstByte, byte[] packet, int count) throws IOException { if (DEBUG) { System.err.println("sending: "); Dump.printByte(System.err, packetType); Dump.printByte(System.err, firstByte); Dump.printPacket(System.err, packet); System.err.println(); } Escaper buffer = new Escaper(count + 6); buffer.nextByte(packetType); buffer.nextByte(firstByte); for (int i = 0; i < count; i++) { buffer.nextByte(packet[i]); } int crc = buffer.crc; buffer.nextByte(crc & 0xff); buffer.nextByte(crc >> 8); buffer.terminate(); byte[] realPacket = new byte[buffer.escapePtr]; System.arraycopy(buffer.escaped, 0, realPacket, 0, buffer.escapePtr); if (DEBUG) { Dump.dump("encoded", realPacket); } io.writeBytes(realPacket); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/ParseArgs.java000066400000000000000000000022421207233610700253130ustar00rootroot00000000000000 /** * Parse a string into tokens based on a sequence of delimiters * Given delimiters (single characters) d1, d2, ..., dn, this * class recognises strings of the form s0[d1s1][d2s2]...[dnsn], * where s does not contain character di * This is unambiguous if all di are distinct. If not, strings * are attributed to the earliest possible si (so if the delimiters * are : and :, and the input string is foo:bar, then s0 is foo, * s1 is bar and s2 is null */ package net.tinyos.packet; class ParseArgs { String tokens[]; int tokenIndex; ParseArgs(String s, String delimiterSequence) { int count = delimiterSequence.length(); tokens = new String[count + 1]; tokenIndex = 0; // Fill in the tokens int i = 0, lastMatch = 0; while (i < count) { int pos = s.indexOf(delimiterSequence.charAt(i++)); if (pos >= 0) { // When we finally find a delimiter, we know where // the last token ended tokens[lastMatch] = s.substring(0, pos); lastMatch = i; s = s.substring(pos + 1); } } tokens[lastMatch] = s; } String next() { return tokens[tokenIndex++]; } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/PhoenixError.java000066400000000000000000000050541207233610700260540ustar00rootroot00000000000000// $Id: PhoenixError.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab * */ /** * @author David Gay * @author Intel Research Berkeley Lab */ package net.tinyos.packet; /** * An interface for reporting packet source errors. * * @version 1, 1 Aug 2003 * @author David Gay */ public interface PhoenixError { /** * This method is called to signal a problem with a packet source * @param e The IOExcpetion that occured */ public void error(java.io.IOException e); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/PhoenixSource.java000066400000000000000000000165461207233610700262330ustar00rootroot00000000000000// $Id: PhoenixSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; import net.tinyos.util.*; import java.io.*; import java.util.*; /** * A PhoenixSource builds upon a PacketSource to provide the following * features: * - automatic reading and dispatching of packets (registerPacketListener * and deregisterPacketListener) * - automatic source restarting (via setResurrection), off by default * * PhoenixSources are threads and hence need to be started. PhoenixSources * are not PacketSources (direct reads are no longer allowed, open and * close is less meaningful with automatic restart). * * net.tinyos.message.MoteIF builds upon a PhoenixSource, not a PacketSource. * * PhoenixSources are built using the makePhoenix methods in BuildSource */ public class PhoenixSource extends Thread implements PhoenixError { private PacketSource source; private Messenger messages; private Vector listeners; private boolean phoenixLike = true; // does it rise from the ashes? private boolean started; private PhoenixError errorHandler = this; protected void message(String s) { if (messages != null) messages.message(s); } // Wait for thread to start public synchronized void awaitStartup() throws IOException { while (!started) { try { wait(); } catch (InterruptedException e) { throw new IOException("interrupted"); } } } private synchronized void started() { started = true; notify(); } synchronized private void stopped() { started = false; } /** * Build PhoenixSources using makePhoenix in BuildSource */ PhoenixSource(PacketSource source, Messenger messages) { this.source = source; this.messages = messages; listeners = new Vector(); } /** * Shutdown a PhoenixSource (closes underlying packet source) * close errors are NOT reported to the error handler, instead * a simple message is sent */ synchronized public void shutdown() { phoenixLike = false; try { source.close(); interrupt(); } catch (IOException e) { message("close error " + e); } } /** * @return This PhoenixSource's PacketSource */ public PacketSource getPacketSource() { return source; } /** * Write a packet. Waits for PhoenixSource thread to start * @param packet Packet to write (same format as PacketSource) * @return false if packet wasn't received (only the serial * and network packet sources currently provide this indication) * Note that a true result does not guarantee reception */ public boolean writePacket(byte[] packet) throws IOException { awaitStartup(); return source.writePacket(packet); } /** * Register a new packet listener * @param listener listener.packetReceived will be invoked for * all packets received on this packet source (see PacketSource * for a description of the packet format). The listener will * be invoked in the context of the PhoenixSource thread. */ public void registerPacketListener(PacketListenerIF listener) { listeners.addElement(listener); } /** * Remove a packet listener * @param listener Listener to remove (if it was registered twice, * only one entry will be removed) */ public void deregisterPacketListener(PacketListenerIF listener) { listeners.remove(listener); } private void packetDipatchLoop() throws IOException { for (;;) { dispatch(source.readPacket()); } } private void dispatch(byte[] packet) { Enumeration e = listeners.elements(); while (e.hasMoreElements()) { PacketListenerIF listener = (PacketListenerIF)e.nextElement(); listener.packetReceived(packet); } } public void run() { while (phoenixLike) { try { source.open(messages); started(); packetDipatchLoop(); } catch (IOException e) { stopped(); if (phoenixLike) errorHandler.error(e); } } } /** * Set the error handler for this PhoenixSource. When an IOException e * is thrown by this PhoenixSource's PacketSource (note that this * implicitly closes the PacketSource), errorHandler.error is invoked * with e as an argument. When the error handler returns, the * PhoenixSource will restart (i.e., reopen the packet source and try * to read messages), except if the shutdown method has * been called. * @param errorHandler The packet source error handler for this * PhoenixSource */ synchronized public void setPacketErrorHandler(PhoenixError errorHandler) { this.errorHandler = errorHandler; } /** * Turn resurrection on. This changes the current packet error handler * (see setPacketErrorHandler) to one that automatically * restarts the packet source after a 2s delay */ public void setResurrection() { setPacketErrorHandler(new PhoenixError() { public void error(IOException e) { message(source.getName() + " died - restarting"); try { sleep(2000); } catch (InterruptedException ie) { } } }); } // Default error handler public void error(IOException e) { String msg = source.getName() + " died - exiting (" + e + ")"; if (messages != null) { message(msg); } else { // We always try and print this message as we're about to exit. System.err.println(msg); } System.exit(2); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/Platform.java000066400000000000000000000012511207233610700252070ustar00rootroot00000000000000package net.tinyos.packet; import java.util.*; class Platform { static int x; static Hashtable platforms; static void add(int dummy, String name, int baudrate) { platforms.put(name, new Integer(baudrate)); } static int get(String name) { if (platforms == null) { platforms = new Hashtable(); try { BaudRate.init(); } catch (Exception e) { System.err.println("Failed to initialize baud rates for platforms. Serial communication may not work properly."); } } Object val = platforms.get(name); if (val != null) return ((Integer)val).intValue(); else return -1; } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/SFProtocol.java000066400000000000000000000112561207233610700254630ustar00rootroot00000000000000// $Id: SFProtocol.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; import java.io.*; /** * This is the TinyOS 2.x serial forwarder protocol. It is incompatible * with the TinyOS 1.x serial forwarder protocol to avoid accidentally * mixing TinyOS 1.x and 2.x serial forwarders, applications, etc. */ abstract public class SFProtocol extends AbstractSource { // Protocol version, written at connection-open time // 2 bytes: first byte is always 'U', second byte is // protocol version // The actual protocol used will be min(my-version, other-version) // current protocols: // ' ': initial protocol, no further connection data, packets are // 1-byte length followed by n-bytes data. Length must be at least 1. final static byte VERSION[] = {'U', ' '}; int version; // The protocol version we're running (negotiated) protected InputStream is; protected OutputStream os; protected SFProtocol(String name) { super(name); } protected void openSource() throws IOException { // Assumes streams are open os.write(VERSION); byte[] partner = readN(2); // Check that it's a valid header (min version is ' ') if (partner[0] != VERSION[0]) throw new IOException("protocol error"); // Actual version is min received vs our version version = partner[1] & 0xff; int ourversion = VERSION[1] & 0xff; if (ourversion < version) version = ourversion; // Handle the different protocol versions (currently only one) // Any connection-time data-exchange goes here switch (version) { case ' ': break; default: throw new IOException("bad protocol version"); } } protected byte[] readSourcePacket() throws IOException { // Protocol is straightforward: 1 size byte, data bytes byte[] size = readN(1); if (size[0] == 0) throw new IOException("0-byte packet"); byte[] read = readN(size[0] & 0xff); //Dump.dump("reading", read); return read; } protected byte[] readN(int n) throws IOException { byte[] data = new byte[n]; int offset = 0; // A timeout would be nice, but there's no obvious way to // write it before java 1.4 (probably some trickery with // a thread and closing the stream would do the trick, but...) while (offset < n) { int count = is.read(data, offset, n - offset); if (count == -1) throw new IOException("end-of-stream"); offset += count; } return data; } protected boolean writeSourcePacket(byte[] packet) throws IOException { if (packet.length > 255) throw new IOException("packet too long"); if (packet.length == 0) throw new IOException("packet too short"); //Dump.dump("writing", packet); os.write((byte)packet.length); os.write(packet); os.flush(); return true; } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/SFSource.java000066400000000000000000000053301207233610700251160ustar00rootroot00000000000000// $Id: SFSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; import java.io.*; import java.net.*; /** * Packet source (tcp/ip client) for the new serial forwarder protocol */ class SFSource extends SFProtocol { private Socket socket; private String host; private int port; /** * Packetizers are built using the makeXXX methods in BuildSource */ SFSource(String host, int port) { super("sf@" + host + ":" + port); this.host = host; this.port = port; } protected void openSource() throws IOException { socket = new Socket(host, port); is = socket.getInputStream(); os = socket.getOutputStream(); super.openSource(); } protected void closeSource() throws IOException { socket.close(); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/SerialByteSource.java000066400000000000000000000117041207233610700266530ustar00rootroot00000000000000// $Id: SerialByteSource.java,v 1.7 2010-06-29 22:07:41 scipio Exp $ package net.tinyos.packet; /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ import java.io.*; import net.tinyos.comm.*; /** * A serial port byte source using net.tinyos.comm */ public class SerialByteSource extends StreamByteSource implements SerialPortListener { private SerialPort serialPort; private String portName; private int baudRate; public SerialByteSource(String portName, int baudRate) { this.portName = portName; this.baudRate = baudRate; } public void openStreams() throws IOException { // if (serialPort == null) { try { serialPort = new TOSSerial(portName); } catch (Exception e) { throw new IOException("Could not open " + portName + ": " + e.getMessage()); } /* * } else { if (!serialPort.open()) { throw new IOException("Could not * re-open " + portName); } } */ try { // serialPort.setFlowControlMode(SerialPort.FLOWCONTROL_NONE); serialPort.setSerialPortParams(baudRate, 8, SerialPort.STOPBITS_1, false); serialPort.addListener(this); serialPort.notifyOn(SerialPortEvent.DATA_AVAILABLE, true); serialPort.notifyOn(SerialPortEvent.OUTPUT_EMPTY, true); } catch (Exception e) { serialPort.close(); throw new IOException("Could not configure " + portName + ": " + e.getMessage()); } is = serialPort.getInputStream(); os = serialPort.getOutputStream(); } public void closeStreams() throws IOException { serialPort.close(); synchronized (sync) { sync.notify(); } } public String allPorts() { /* * Enumeration ports = CommPortIdentifier.getPortIdentifiers(); if (ports == * null) return "No comm ports found!"; * * boolean noPorts = true; String portList = "Known serial ports:\n"; while * (ports.hasMoreElements()) { CommPortIdentifier port = * (CommPortIdentifier)ports.nextElement(); * * if (port.getPortType() == CommPortIdentifier.PORT_SERIAL) { portList += "- " + * port.getName() + "\n"; noPorts = false; } } if (noPorts) return "No comm * ports found!"; else return portList; */ return "Listing available comm ports is no longer supported."; } Object sync = new Object(); public byte readByte() throws IOException { // On Linux at least, javax.comm input streams are not interruptible. // Make them so, relying on the DATA_AVAILABLE serial event. synchronized (sync) { while (opened && is.available() == 0) { try { sync.wait(); } catch (InterruptedException e) { close(); throw new IOException("interrupted"); } } } if( opened ) return super.readByte(); else throw new IOException("closed"); } public void serialEvent(SerialPortEvent ev) { if (ev.getEventType() == SerialPortEvent.DATA_AVAILABLE) { synchronized (sync) { sync.notify(); } } } protected void finalize() { serialPort.finalize(); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/StreamByteSource.java000066400000000000000000000063131207233610700266670ustar00rootroot00000000000000// $Id: StreamByteSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.packet; import java.io.*; abstract public class StreamByteSource implements ByteSource { protected InputStream is; protected OutputStream os; protected boolean opened; protected StreamByteSource() { } abstract protected void openStreams() throws IOException; abstract protected void closeStreams() throws IOException; public void open() throws IOException { openStreams(); opened = true; } public void close() { if (opened) { opened = false; try { os.close(); is.close(); closeStreams(); } catch (Exception e) { } } } public byte readByte() throws IOException { int serialByte; if (!opened) throw new IOException("not open"); try { serialByte = is.read(); } catch (IOException e) { serialByte = -1; } if (serialByte == -1) { close(); throw new IOException("read error"); } return (byte)serialByte; } public void writeBytes(byte[] bytes) throws IOException { if (!opened) throw new IOException("not open"); try { os.write(bytes); os.flush(); } catch (IOException e) { close(); throw new IOException("write error"); } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/packet/package.html000066400000000000000000000015411207233610700250430ustar00rootroot00000000000000 Provides for transforming byte arrays into TinyOS packet abstractions.

    Package Specification

    Related Documentation

    The mig tool generates packets from arbitrary packet format delcarations. tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/000077500000000000000000000000001207233610700217225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/Makefile000066400000000000000000000001271207233610700233620ustar00rootroot00000000000000# Top-level Makefile for tools/java ROOT = ../../.. include $(ROOT)/Makefile.include tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/README000066400000000000000000000006261207233610700226060ustar00rootroot00000000000000Package: net.tinyos.sf Description: provides serial port multiplexing Author: Bret Hull David Gay This application instantiates a server which provides a bi-directional packet stream between a mote connected to the host PC and clients anywhere on the network. For more information, see "serialforwarder.pdf" in the "doc" directory. tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/SFClient.java000066400000000000000000000104641207233610700242410ustar00rootroot00000000000000// $Id: SFClient.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * File: ServerReceivingThread.java * * Description: * The ServerReceivingThread listens for requests * from a connected Aggregator Server. If a data * packet is received, it is sent on to the serial * port. * * @author Bret Hull * @author David Gay * */ package net.tinyos.sf; import java.net.*; import java.io.*; import java.util.*; import net.tinyos.packet.*; public class SFClient extends SFProtocol implements Runnable, PacketListenerIF { private Thread thread; private Socket socket = null; private SerialForwarder sf; private SFListen listenServer; public SFClient(Socket socket, SerialForwarder serialForward, SFListen listenSvr) { super(""); thread = new Thread(this); sf = serialForward; listenServer = listenSvr; this.socket = socket; InetAddress addr = socket.getInetAddress(); name = "client at " + addr.getHostName() + " (" + addr.getHostAddress() + ")"; sf.debug.message("new " + name); } protected void openSource() throws IOException { is = socket.getInputStream(); os = socket.getOutputStream(); super.openSource(); } protected void closeSource() throws IOException { socket.close(); } private void init() throws IOException { sf.incrementClients(); open(sf); listenServer.source.registerPacketListener(this); } public void shutdown() { try { close(); } catch (IOException e) { } } public void start() { thread.start(); } public final void join(long millis) throws InterruptedException { thread.join(millis); } public void run() { try { init(); readPackets(); } catch (IOException e) { } finally { listenServer.source.deregisterPacketListener(this); listenServer.removeSFClient(this); sf.decrementClients(); shutdown(); } } private void readPackets() throws IOException { for (;;) { byte[] packet = readPacket(); sf.incrementPacketsWritten(); if (!listenServer.source.writePacket(packet)) sf.verbose.message("write failed"); } } public void packetReceived(byte[] packet) { try { writePacket(packet); } catch (IOException e) { shutdown(); } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/SFConsoleRenderer.java000066400000000000000000000057061207233610700261170ustar00rootroot00000000000000//$Id: SFConsoleRenderer.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp package net.tinyos.sf; public class SFConsoleRenderer implements SFRenderer { boolean statusLine = false; boolean listening = false; int nclients = 0; int nread = 0; int nwritten = 0; public void SFConsoleRenderer() { } void clearStatus() { if( statusLine ) { System.out.print("\r \r"); statusLine = false; } } void updateStatus() { clearStatus(); System.out.print( (listening?"SF enabled":"SF disabled") + ", " + nclients + " " + (nclients==1?"client":"clients") + ", " + nread + " " + (nread==1?"packet":"packets") + " read, " + nwritten + " " + (nwritten==1?"packet":"packets") + " written" + " " ); statusLine = true; } public void message( String msg ) { clearStatus(); System.out.println(msg); updateStatus(); } public void updatePacketsRead( int n ) { nread = n; updateStatus(); } public void updatePacketsWritten( int n ) { nwritten = n; updateStatus(); } public void updateNumClients( int n ) { nclients = n; updateStatus(); } public void updateListenServerStatus( boolean b ) { listening = b; updateStatus(); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/SFListen.java000066400000000000000000000130601207233610700242540ustar00rootroot00000000000000// $Id: SFListen.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * File: ListenServer.java * * Description: * The Listen Server is the heart of the serial forwarder. Upon * instantiation, this class spawns the SerialPortReader and the * Multicast threads. As clients connect, this class spawns * ServerReceivingThreads as wells as registers the new connection * SerialPortReader. This class also provides the central * point of contact for the GUI, allowing the server to easily * be shut down * * @author Bret Hull * @author David Gay */ package net.tinyos.sf; import java.net.*; import java.io.*; import java.util.*; import net.tinyos.packet.*; public class SFListen extends Thread implements PacketListenerIF, PhoenixError { PhoenixSource source; private ServerSocket serverSocket; private Vector clients = new Vector(); private SerialForwarder sf; public SFListen(SerialForwarder sf) { this.sf = sf; } // IO error on packet source, restart it // This is essentially the same as the standard resurrection error // handler, but sends the error message to a different location // (sf.message vs sf.verbose.message) public void error(IOException e) { if (e.getMessage() != null) { sf.message(e.getMessage()); } sf.message(source.getPacketSource().getName() + " died - restarting"); try { sleep(5000); } catch (InterruptedException ie) { } } public void run() { try { sf.verbose.message("Listening to " + sf.motecom); source = BuildSource.makePhoenix(sf.motecom, sf.verbose); if (source == null) { sf.message("Invalid source " + sf.motecom + ", pick one of:"); sf.message(BuildSource.sourceHelp()); return; } source.setPacketErrorHandler(this); source.registerPacketListener(this); source.start(); // open up our server socket try { serverSocket = new ServerSocket(sf.serverPort); } catch (Exception e) { sf.message("Could not listen on port: " + sf.serverPort); source.shutdown(); return; } sf.verbose.message("Listening for client connections on port " + sf.serverPort); try { for (;;) { Socket currentSocket = serverSocket.accept(); SFClient newServicer = new SFClient(currentSocket, sf, this); clients.add(newServicer); newServicer.start(); } } catch (IOException e) { } } finally { cleanup(); sf.verbose.message("--------------------------"); } } private void cleanup() { shutdownAllSFClients(); sf.verbose.message("Closing source"); if (source != null) { source.shutdown(); } sf.verbose.message("Closing socket"); if (serverSocket != null) { try { serverSocket.close(); } catch (IOException e) { } } sf.listenServerStopped(); } private void shutdownAllSFClients() { sf.verbose.message("Shutting down all client connections"); SFClient crrntServicer; while (clients.size() != 0) { crrntServicer = (SFClient)clients.firstElement(); crrntServicer.shutdown(); try { crrntServicer.join(1000); } catch (InterruptedException e) { e.printStackTrace(); } } } public void removeSFClient(SFClient clientS) { clients.remove(clientS); } public void packetReceived(byte[] packet) { sf.incrementPacketsRead(); } public void shutdown() { try { if (serverSocket != null) { serverSocket.close(); } } catch (IOException e) { sf.debug.message("shutdown error " + e); } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/SFNullRenderer.java000066400000000000000000000005051207233610700254170ustar00rootroot00000000000000package net.tinyos.sf; public class SFNullRenderer implements SFRenderer { public void message(String msg) { } public void updatePacketsRead(int n) { } public void updatePacketsWritten(int n) { } public void updateNumClients(int n) { } public void updateListenServerStatus(boolean listening) { } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/SFRenderer.java000066400000000000000000000037361207233610700245750ustar00rootroot00000000000000//$Id: SFRenderer.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp package net.tinyos.sf; public interface SFRenderer { public void message( String msg ); public void updatePacketsRead( int n ); public void updatePacketsWritten( int n ); public void updateNumClients( int n ); public void updateListenServerStatus( boolean listening ); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/SFWindow.java000066400000000000000000000225231207233610700242710ustar00rootroot00000000000000// $Id: SFWindow.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * File: ControlWindow.java * * Description: * This class displays the GUI that allows the serial forwarder * to be more easily configured * * @author Bret Hull * @author David Gay */ package net.tinyos.sf; import javax.swing.*; import java.awt.*; import java.awt.event.*; import net.tinyos.packet.*; public class SFWindow extends JPanel implements WindowListener, SFRenderer { JScrollPane mssgPanel = new JScrollPane(); JTextArea mssgArea = new JTextArea(); BorderLayout toplayout = new BorderLayout(); JTabbedPane pnlTabs = new JTabbedPane(); JLabel labelPacketsSent = new JLabel(); JLabel labelServerPort = new JLabel(); JTextField fieldServerPort = new JTextField(); JLabel labelMoteCom = new JLabel(); JLabel labelPacketsReceived = new JLabel(); JTextField fieldMoteCom = new JTextField(); ButtonGroup bttnGroup = new ButtonGroup(); JPanel pnlMain = new JPanel(); GridLayout gridLayout1 = new GridLayout(); JLabel labelNumClients = new JLabel(); JCheckBox cbVerboseMode = new JCheckBox(); JButton bStopServer = new JButton(); GridLayout gridLayout2 = new GridLayout(); JButton bHelp = new JButton(); JButton bClear = new JButton(); JButton bQuit = new JButton(); private SerialForwarder sf; public SFWindow(SerialForwarder SF) { sf = SF; try { jbInit(); } catch(Exception e) { e.printStackTrace(); System.exit(2); } } static public SFWindow createGui( SerialForwarder sf, String title ) { JFrame mainFrame = new JFrame(title); SFWindow cntrlWndw = new SFWindow(sf); mainFrame.setSize(cntrlWndw.getPreferredSize()); mainFrame.getContentPane().add("Center", cntrlWndw); mainFrame.show(); mainFrame.addWindowListener(cntrlWndw); return cntrlWndw; } private void jbInit() throws Exception { this.setLayout(toplayout); mssgPanel.setVerticalScrollBarPolicy(JScrollPane.VERTICAL_SCROLLBAR_ALWAYS); mssgPanel.setAutoscrolls(true); this.setMinimumSize(new Dimension(500, 250)); this.setPreferredSize(new Dimension(500, 300)); labelPacketsSent.setFont(new java.awt.Font("Dialog", 1, 10)); labelPacketsSent.setHorizontalTextPosition(SwingConstants.LEFT); labelPacketsSent.setText("Pckts Read: 0"); labelServerPort.setFont(new java.awt.Font("Dialog", 1, 10)); labelServerPort.setText("Server Port:"); fieldServerPort.setFont(new java.awt.Font("Dialog", 0, 10)); fieldServerPort.setText(Integer.toString (sf.serverPort)); labelMoteCom.setFont(new java.awt.Font("Dialog", 1, 10)); labelMoteCom.setText("Mote Communications:"); labelPacketsReceived.setFont(new java.awt.Font("Dialog", 1, 10)); labelPacketsReceived.setHorizontalTextPosition(SwingConstants.LEFT); labelPacketsReceived.setText("Pckts Wrttn: 0"); fieldMoteCom.setFont(new java.awt.Font("Dialog", 0, 10)); fieldMoteCom.setText(sf.motecom); // Input CheckBoxes ActionListener cbal = new ActionListener() { public void actionPerformed(ActionEvent e) { updateGlobals(); } }; bQuit.addActionListener(new java.awt.event.ActionListener() { public void actionPerformed(ActionEvent e) { shutdown(); } }); bQuit.setText("Quit"); bQuit.setFont(new java.awt.Font("Dialog", 1, 10)); bClear.addActionListener(new java.awt.event.ActionListener() { public synchronized void actionPerformed(ActionEvent e) { mssgArea.setText(""); sf.clearCounts(); } }); bClear.setText("Clear"); bClear.setFont(new java.awt.Font("Dialog", 1, 10)); bHelp.addActionListener(new java.awt.event.ActionListener() { public void actionPerformed(ActionEvent e) { sf.message("The Mote communications field must"); sf.message("specify a known packet source, one of:"); sf.message(BuildSource.sourceHelp()); } }); bHelp.setText("Help"); bHelp.setFont(new java.awt.Font("Dialog", 1, 10)); pnlMain.setLayout(gridLayout1); pnlMain.setMinimumSize(new Dimension(150, 75)); pnlMain.setPreferredSize(new Dimension(150, 75)); gridLayout1.setRows(13); labelNumClients.setFont(new java.awt.Font("Dialog", 1, 10)); labelNumClients.setText("Num Clients: 0"); cbVerboseMode.setSelected(sf.verbose.on); cbVerboseMode.setText("Verbose Mode"); cbVerboseMode.setFont(new java.awt.Font("Dialog", 1, 10)); cbVerboseMode.addActionListener(cbal); bStopServer.setFont(new java.awt.Font("Dialog", 1, 10)); bStopServer.setText("Stop Server"); bStopServer.addActionListener(new java.awt.event.ActionListener() { public void actionPerformed(ActionEvent e) { if (sf.listenServer != null) { sf.stopListenServer(); } else { updateGlobals(); sf.startListenServer(); } } }); gridLayout2.setRows(15); gridLayout2.setColumns(1); toplayout.setHgap(1); toplayout.setVgap(1); this.add(mssgPanel, BorderLayout.CENTER); this.add(pnlTabs, BorderLayout.EAST); pnlTabs.add(pnlMain, "Main"); // Main Panel Setup pnlMain.add(labelServerPort, null); pnlMain.add(fieldServerPort, null); pnlMain.add(labelMoteCom, null); pnlMain.add(fieldMoteCom, null); pnlMain.add(bStopServer, null); pnlMain.add(cbVerboseMode, null); pnlMain.add(labelPacketsSent, null); pnlMain.add(labelPacketsReceived, null); pnlMain.add(labelNumClients, null); pnlMain.add(bHelp, null); pnlMain.add(bClear, null); pnlMain.add(bQuit, null); mssgPanel.getViewport().add(mssgArea, null); mssgArea.setFont(new java.awt.Font("Monospaced", Font.PLAIN, 12)); } public synchronized void windowClosing (WindowEvent e) { shutdown(); } public void windowClosed (WindowEvent e) { } public void windowActivated (WindowEvent e) { } public void windowIconified (WindowEvent e) { } public void windowDeactivated (WindowEvent e) { } public void windowDeiconified (WindowEvent e) { } public void windowOpened (WindowEvent e) { } public synchronized void message(String mssg) { mssgArea.append(mssg + "\n"); mssgArea.setCaretPosition(mssgArea.getDocument().getLength()); } public void updatePacketsRead(int numPackets) { labelPacketsSent.setText("Pckts Read: " + numPackets); } public void updatePacketsWritten(int numPackets) { labelPacketsReceived.setText("Pckts Wrttn: " + numPackets); } public void updateNumClients(int numClients) { labelNumClients.setText("Num Clients: " + numClients); } private void updateGlobals() { // set application/communications defaults sf.verbose.on = cbVerboseMode.isSelected(); sf.motecom = fieldMoteCom.getText(); sf.serverPort = Integer.parseInt(fieldServerPort.getText()); } public void updateListenServerStatus(boolean running) { if (!running) { bStopServer.setText("Start Server"); } else { bStopServer.setText("Stop Server"); } } synchronized private void shutdown() { //sf.cntrlWndw = null; sf.stopListenServer(); System.out.println("Serial Forwarder Exited Normally\n"); System.exit(0); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/SerialForwarder.java000066400000000000000000000156261207233610700256720ustar00rootroot00000000000000// $Id: SerialForwarder.java,v 1.6 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * File: SerialForwarder.java * * Description: * The SerialForwarder class provides many static functions * that handle the initialization of the serialforwarder * and/or the associated gui. * * @author Bret Hull * @author David Gay */ package net.tinyos.sf; import java.io.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class SerialForwarder implements Messenger { public static final int DEFAULT_PORT = 9002; // appication defaults public SFRenderer renderer; public SFListen listenServer; public String motecom = "serial@com1:57600"; public boolean logDB; public int serverPort = DEFAULT_PORT; private boolean displayHelp = false; private int nClients = 0; private int nPacketsRead = 0; private int nPacketsWritten = 0; private SFListen listener = null; SFMessenger verbose = new SFMessenger(true); SFMessenger debug = new SFMessenger(false); class SFMessenger implements Messenger { boolean on; SFMessenger(boolean on) { this.on = on; } public void message(String message) { if (on) { SerialForwarder.this.message(message); } } } public static void main(String[] args) throws IOException { new SerialForwarder(args); } public SerialForwarder(String[] args) throws IOException { ProcessCommandLineArgs(args); if (displayHelp) { printHelp(); System.exit(2); } if(renderer == null) { // Default is GUI renderer = SFWindow.createGui(this, "TinyOS 2.x Serial Forwarder"); } startListenServer(); } private void ProcessCommandLineArgs(String[] args) { for (int i = 0; i < args.length; i++) { debug.message(args[i]); } for (int i = 0; i < args.length; i++) { if (args[i].equals("-no-gui") && renderer == null) { renderer = new SFConsoleRenderer(); } else if(args[i].equals("-no-output") && renderer == null) { renderer = new SFNullRenderer(); } else if (args[i].equals("-comm")) { i++; if (i < args.length) { motecom = args[i]; } else { displayHelp = true; } } else if (args[i].equals("-port")) { i++; if (i < args.length) { serverPort = Integer.parseInt(args[i]); } else { displayHelp = true; } } else if (args[i].equals("-log")) { logDB = true; } else if (args[i].equals("-quiet")) { verbose.on = false; } else if (args[i].equals("-debug")) { debug.on = true; } else { displayHelp = true; } } } private static void printHelp() { System.err.println("optional arguments:"); System.err.println("-port [server port] (default " + DEFAULT_PORT + ")"); System.err.println("-comm [motecom spec] (default serial@com1:57600)"); System.err.println("-packetsize [size] (default 36)"); System.err.println("-no-gui = do not display graphic interface"); System.err.println("-no-output"); System.err.println("-quiet = non-verbose mode"); System.err.println("-debug = display debug messages"); System.err.println("-log = log to database"); } private void createGui() { renderer = SFWindow.createGui(this, "SerialForwarder"); } public void message(String msg) { renderer.message(msg); } synchronized public void incrementPacketsRead() { nPacketsRead++; renderer.updatePacketsRead(nPacketsRead); } synchronized public void incrementPacketsWritten() { nPacketsWritten++; renderer.updatePacketsWritten(nPacketsWritten); } synchronized public void incrementClients() { nClients++; renderer.updateNumClients(nClients); } synchronized public void decrementClients() { nClients--; renderer.updateNumClients(nClients); } public synchronized void clearCounts() { nPacketsRead = nPacketsWritten = 0; renderer.updatePacketsWritten(nPacketsWritten); renderer.updatePacketsRead(nPacketsRead); } public synchronized void startListenServer() { if (listenServer == null) { nClients = 0; listenServer = new SFListen(this); listenServer.start(); } renderer.updateListenServerStatus(true); renderer.updateNumClients(nClients); clearCounts(); } public void stopListenServer() { SFListen lserver; // We can't just make stopSFListen synchronized because // listenServerStopped must be synchronized too synchronized (this) { lserver = listenServer; if (lserver != null) listenServer.shutdown(); } if (lserver != null) { try { lserver.join(2000); } catch (InterruptedException ex) { } } } public synchronized void listenServerStopped() { listenServer = null; renderer.updateListenServerStatus(false); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sf/package.html000066400000000000000000000016101207233610700242010ustar00rootroot00000000000000 Provides a communication source mux/demux (SerialForwarder) that allows multiple clients to share a single packet source.

    Package Specification

    Related Documentation

    Lesson 4 of the TinyOS tutorials describes how to use SerialForwarder. tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sim/000077500000000000000000000000001207233610700221025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sim/LinkLayerModel.java000066400000000000000000000641071207233610700256300ustar00rootroot00000000000000/**************************************************************************** * * Copyright (c) 2006 The University of Southern California" * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Marco Zuniga, Avinash Sridharan * Director: Prof. Bhaskar Krishnamachari * Autonomous Networks Reseach Group, University of Southern California * http://ceng.usc.edu/~anrg * Contact: marcozun@usc.edu * * Date last modified: 2004/07/02 marcozun * Date last modified: 2006/02/05 asridhar * * * Description: This file contains the code that generates the * gains for all links in the network and noise floor values for * all nodes. * ****************************************************************************/ package net.tinyos.sim; import java.io.*; import java.util.*; import java.text.DecimalFormat; /** * Stores channel, radio and topology parameters provided by user * through the configuration file. */ class InputVariables { // Channel parameters double n; // path loss exponent double sigma; // standard deviation shadowing variance double d0; // reference distance double pld0; // power decay for reference distance d0 // Radio parameters double pn; // radio noise floor double wgn; // white gaussian noise // Covariance Matrix for hardware variance double s11; double s12; double s21; double s22; // Topology parameters int numNodes; // number of nodes int top; // topology option double grid; // grid unit double Xterr; // X dimension of Terrain double Yterr; // Y dimension of Terrain String topFile; // file name with nodes' coordinates (user-defined) // data directly derived from configuration file double area; // area of the terrain InputVariables() { // Constructor, loading default values n = 3; sigma = 3; pld0 = 55; d0 = 1; pn = -105; wgn = 4; s11 = 3.7; s12 = -3.3; s21 = -3.3; s22 = 6.0; numNodes= 0; top = 0; Xterr = 0; Yterr = 0; topFile = ""; area = 0; } } /** * Stores nodes' coordinates, link gains and noise floor values for a given topology */ class OutputVariables { double[] nodePosX; // X coordinate double[] nodePosY; // Y coordinate double[] outputpowervar; // output power double[] noisefloor; // noise floor double[][] linkGain; // link gain OutputVariables(int numNodes) { // Constructor nodePosX = new double[numNodes]; nodePosY = new double[numNodes]; outputpowervar = new double[numNodes]; noisefloor = new double[numNodes]; linkGain = new double[numNodes][numNodes]; } } /** * Simulates gains for all links of a specific topology, and noise * floor values for all nodes.

    The link gain between nodes A and B * is defined as the output power of A minus the pathloss between A * and B. The user specifies the desired channel, radio and topology * parameters through a configuration file. The configuration file is * provided as a command line argument: $ java LinkLayerModel * configurationFileName, and the link gains and noise floor * values are provided on a file called linkgain.out. */ public class LinkLayerModel { public static void main (String args[]) { if (args.length != 1) { usage(); return; } // variable that contains input parameters InputVariables inVar = new InputVariables(); // parse configuration file and store parameters in inVar readFile ( args[0], inVar ); // if user defined topology (TOPOLOGY = 4), obtain number of nodes if (inVar.top == 4) { obtainNumNodes (inVar.topFile, inVar); } // variable that contains output data OutputVariables outVar = new OutputVariables( inVar.numNodes ); // create topology System.out.print("Topology ...\t\t\t"); obtainTopology ( inVar, outVar ); System.out.println("done"); // obtain ouput power and noise floor for all nodes System.out.print("Radio Pt and Pn ...\t\t"); obtainRadioPtPn ( inVar, outVar ); System.out.println("done"); // obtain link gains System.out.print("Links Gain .....\t\t"); obtainLinkGain ( inVar, outVar); System.out.println("done"); // print linkgain.out (link gains and noise floor) and topology.out (x/y coordinates) System.out.print("Printing Output File ...\t"); printFile ( inVar, outVar); System.out.println("done"); } /** * Parses configuration file provided by user and stores specified * parameters * * @param inputFile configuration file containing channel, radio and * deployment parameters * @param var class that stores input parameters from configuration file * @return true if file parsing was performed without errors */ protected static boolean readFile (String inputFile, InputVariables var ) { String thisLine; StringTokenizer st; // open configuration file try { FileInputStream fin = new FileInputStream(inputFile); try { BufferedReader myInput = new BufferedReader(new InputStreamReader(fin)); try { // parse the file while ((thisLine = myInput.readLine()) != null) { if ( !thisLine.equals("") && !thisLine.startsWith("%") ) { st = new StringTokenizer(thisLine, " =;\t"); String key = st.nextToken(); String value = st.nextToken(); if ( key.equals("PATH_LOSS_EXPONENT")) { var.n = Double.valueOf(value).doubleValue(); if (var.n < 0) { System.out.println("Error: value of PATH_LOSS_EXPONENT must be positive"); System.exit(1); } } else if ( key.equals("SHADOWING_STANDARD_DEVIATION")) { var.sigma = Double.valueOf(value).doubleValue(); if (var.sigma < 0) { System.out.println("Error: value of SHADOWING_STANDARD_DEVIATION must be positive"); System.exit(1); } } else if ( key.equals("PL_D0")) { var.pld0 = Double.valueOf(value).doubleValue(); if (var.pld0 < 0) { System.out.println("Error: value of PL_D0 must be positive"); System.exit(1); } } else if ( key.equals("D0")) { var.d0 = Double.valueOf(value).doubleValue(); if (var.d0 <= 0) { System.out.println("Error: value of D0 must be greater than zero"); System.exit(1); } } else if ( key.equals("NOISE_FLOOR")) { var.pn = Double.valueOf(value).doubleValue(); } else if ( key.equals("WHITE_GAUSSIAN_NOISE")) { var.wgn = Double.valueOf(value).doubleValue(); if (var.wgn < 0) { System.out.println("Error: value of WHITE_GAUSSIAN_NOISE must be greater equal than 0"); System.exit(1); } } else if ( key.equals("S11")) { var.s11 = Double.valueOf(value).doubleValue(); if (var.s11 < 0) { System.out.println("Error: value of S11 must be greater equal than 0"); System.exit(1); } } else if ( key.equals("S12")) { var.s12 = Double.valueOf(value).doubleValue(); } else if ( key.equals("S21")) { var.s21 = Double.valueOf(value).doubleValue(); } else if ( key.equals("S22")) { var.s22 = Double.valueOf(value).doubleValue(); if (var.s22 < 0) { System.out.println("Error: value of S22 must be greater equal than 0"); System.exit(1); } } else if ( key.equals("NUMBER_OF_NODES")) { var.numNodes = Integer.parseInt(value); if (var.numNodes <= 0) { System.out.println("Error: value of NUMBER_OF_NODES must be positive"); System.exit(1); } } else if ( key.equals("TOPOLOGY")) { var.top = Integer.parseInt(value); if ( (var.top < 1) | (var.top > 4) ) { System.out.println("Error: value of TOPOLOGY must be between 1 and 4"); System.exit(1); } } else if ( key.equals("GRID_UNIT")) { var.grid = Double.valueOf(value).doubleValue(); } else if ( key.equals("TOPOLOGY_FILE")) { var.topFile = value; } else if ( key.equals("TERRAIN_DIMENSIONS_X")) { var.Xterr = Double.valueOf(value).doubleValue(); if (var.Xterr < 0) { System.out.println("Error: value of TERRAIN_DIMENSIONS_X must be positive"); System.exit(1); } } else if ( key.equals("TERRAIN_DIMENSIONS_Y")) { var.Yterr = Double.valueOf(value).doubleValue(); if (var.Yterr < 0) { System.out.println("Error: value of TERRAIN_DIMENSIONS_Y must be positive"); System.exit(1); } var.area = var.Xterr * var.Yterr; } else { System.out.println("Error: undefined parameter " + key + ", please review your configuration file"); System.exit(1); } } } // end while loop } catch (Exception e) { System.out.println("Error1: " + e); System.exit(1); } } // end try catch (Exception e) { System.out.println("Error2: " + e); System.exit(1); } } // end try catch (Exception e) { System.out.println("Error Failed to Open file " + inputFile + e); System.exit(1); } return true; } /** * Obtain X and Y coordinates for all nodes. Different type of topologies are available * (grid, uniform, random, user-defined) * * @param inVar class that contains input parameters from configuration file * @param outVar class that stores x/y coordinates * @return true if X/Y coordinates are obtained without errors */ protected static boolean obtainTopology( InputVariables inVar, OutputVariables outVar ) { Random rand = new Random(); int i, j; int sqrtNumNodes, nodesX; double cellArea, cellLength; double Xdist, Ydist, dist; boolean wrongPlacement; if (inVar.numNodes <= 0) { System.out.println("\nError: value of NUMBER_OF_NODES must be positive"); System.exit(1); } switch (inVar.top) { case 1: // GRID if (inVar.grid < inVar.d0) { System.out.println("\nError: value of GRID_UNIT must be equal or greater than D0"); System.exit(1); } sqrtNumNodes = (int) Math.sqrt(inVar.numNodes); if ( sqrtNumNodes != Math.sqrt(inVar.numNodes) ) { System.out.println ("\nError: on GRID topology, NUMBER_OF_NODES should be the square of a natural number"); System.exit(1); } for (i = 0; i < inVar.numNodes; i = i+1) { outVar.nodePosX[i] = (i%sqrtNumNodes) * inVar.grid; outVar.nodePosY[i] = (i/sqrtNumNodes) * inVar.grid; } break; case 2: // UNIFORM sqrtNumNodes = (int) Math.sqrt(inVar.numNodes); if ( sqrtNumNodes != Math.sqrt(inVar.numNodes) ) { System.out.println ("\nError: on UNIFORM topology, NUMBER_OF_NODES should be the square of a natural number"); System.exit(1); } if ( (inVar.Xterr <= 0) | (inVar.Yterr <= 0) ) { System.out.println("\nError: values of TERRAIN_DIMENSIONS must be positive"); System.exit(1); } if ( inVar.Xterr != inVar.Yterr ) { System.out.println("\nError: values of TERRAIN_DIMENSIONS_X and TERRAIN_DIMENSIONS_Y must be equal"); System.exit(1); } cellLength = Math.sqrt ( inVar.area / inVar.numNodes ); nodesX = sqrtNumNodes; if ( cellLength < (inVar.d0*1.4) ) { System.out.println ("\nError: on UNIFORM topology, density is too high, increase physical terrain"); System.exit(1); } for (i = 0; i < inVar.numNodes; i = i+1) { outVar.nodePosX[i] = (i%nodesX) * cellLength + rand.nextDouble()*cellLength; outVar.nodePosY[i] = (i/nodesX) * cellLength + rand.nextDouble()*cellLength; wrongPlacement = true; while ( wrongPlacement ) { for (j = 0; j < i; j = j+1) { Xdist = outVar.nodePosX[i] - outVar.nodePosX[j]; Ydist = outVar.nodePosY[i] - outVar.nodePosY[j]; // distance between a given pair of nodes dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5); if (dist < inVar.d0) { outVar.nodePosX[i] = (i%nodesX) * cellLength + rand.nextDouble()*cellLength; outVar.nodePosY[i] = (i/nodesX) * cellLength + rand.nextDouble()*cellLength; wrongPlacement = true; break; } } if ( j == i ) { wrongPlacement = false; } } } break; case 3: // RANDOM if ( (inVar.Xterr <= 0) | (inVar.Yterr <= 0) ) { System.out.println("\nError: values of TERRAIN_DIMENSIONS must be positive"); System.exit(1); } cellLength = Math.sqrt ( inVar.area / inVar.numNodes ); if ( cellLength < (inVar.d0*1.4) ) { System.out.println ("\nError: on RANDOM topology, density is too high, increase physical terrain"); System.exit(1); } for (i = 0; i < inVar.numNodes; i = i+1) { outVar.nodePosX[i] = rand.nextDouble() * inVar.Xterr; outVar.nodePosY[i] = rand.nextDouble() * inVar.Yterr; wrongPlacement = true; while ( wrongPlacement ) { for (j = 0; j < i; j = j+1) { Xdist = outVar.nodePosX[i] - outVar.nodePosX[j]; Ydist = outVar.nodePosY[i] - outVar.nodePosY[j]; // distance between a given pair of nodes dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5); if (dist < inVar.d0) { outVar.nodePosX[i] = rand.nextDouble() * inVar.Xterr; outVar.nodePosY[i] = rand.nextDouble() * inVar.Yterr; wrongPlacement = true; break; } } if ( j == i ) { wrongPlacement = false; } } } break; case 4: // FILE (user-defined topology) readTopologyFile(inVar.topFile, outVar); correctTopology (inVar, outVar); break; default: System.out.println("\nError: topology is not correct, please check TOPOLOGY in the configuration file"); System.exit(1); } return true; } /** * Checks that user-defined topology does not have inter-node distances less than D0 meter, * where D0 is the reference distance in the channel model (specified in configuration file) * * @param inVar class that stores input parameters from configuration file * @param outVar class that stores link gains, noise floors and x/y coordinates * @return true if x/y coordinates provided by user satisfy the condition that no internode distance is lesss than D0 */ protected static boolean correctTopology ( InputVariables inVar, OutputVariables outVar ) { Random rand = new Random(); int i, j; double Xdist, Ydist, dist, avgDecay; for (i = 0; i < inVar.numNodes; i = i+1) { for (j = i+1; j < inVar.numNodes; j = j+1 ) { Xdist = outVar.nodePosX[i] - outVar.nodePosX[j]; Ydist = outVar.nodePosY[i] - outVar.nodePosY[j]; // distance between a given pair of nodes dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5); if (dist < inVar.d0) { System.out.println("\nError: file " + inVar.topFile + " contains inter-node distances less than one."); System.exit(1); } } } return true; } /** * Obtains output power and noise floor for all nodes in the network * * @param inVar class that contains radio parameters * @param outVar class that stores output powers and noise floors * @return true if all output powers and noise floors were obtained correctly */ protected static boolean obtainRadioPtPn ( InputVariables inVar, OutputVariables outVar ) { Random rand = new Random(); int i, j; double t11, t12, t21, t22; double rn1, rn2; t11 = 0; t12 = 0; t21 = 0; t22 = 0; if ( (inVar.s11 == 0) && (inVar.s22 == 0) ) { // symmetric links do nothing } else if ( (inVar.s11 == 0) && (inVar.s22 != 0) ) { // both S11 and S22 must be 0 for symmetric links System.out.println("\nError: symmetric links require both, S11 and S22 to be 0, not only S11."); System.exit(1); } else { if ( (inVar.s12 != inVar.s21) ) { // check that S is symmetric System.out.println("\nError: S12 and S21 must have the same value."); System.exit(1); } if ( Math.abs(inVar.s12) > Math.sqrt(inVar.s11*inVar.s22) ) { // check that correlation is within [-1,1] System.out.println("\nError: S12 (and S21) must be less than sqrt(S11xS22)."); System.exit(1); } t11 = Math.sqrt(inVar.s11); t12 = inVar.s12/Math.sqrt(inVar.s11); t21 = 0; t22 = Math.sqrt( (inVar.s11*inVar.s22 - Math.pow( inVar.s12, 2)) / inVar.s11 ); } for (i = 0; i < inVar.numNodes; i = i+1) { rn1 = rand.nextGaussian(); rn2 = rand.nextGaussian(); outVar.noisefloor[i] = inVar.pn + t11 * rn1; outVar.outputpowervar[i] = t12 * rn1 + t22 * rn2; } return true; } /** * Obtains gain for all links in the network. The link gain between nodes A and B * is defined as the output power of A minus the pathloss between A and B. * * @param inVar class that contains channel parameters from configuration file * @param outVar class that stores link gains * @return true if all link gains were obtained correctly */ protected static boolean obtainLinkGain ( InputVariables inVar, OutputVariables outVar ) { Random rand = new Random(); int i, j; double Xdist, Ydist, dist, pathloss; for (i = 0; i < inVar.numNodes; i = i+1) { for (j = i+1; j < inVar.numNodes; j = j+1 ) { Xdist = outVar.nodePosX[i] - outVar.nodePosX[j]; Ydist = outVar.nodePosY[i] - outVar.nodePosY[j]; // distance between a given pair of nodes dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5); // mean decay dependent on distance pathloss = - inVar.pld0 - 10*inVar.n*(Math.log(dist/inVar.d0)/Math.log(10.0)) + ( rand.nextGaussian()*inVar.sigma ); // assymetric links are given by running two different // R.V.s for each unidirectional link (output power variance). outVar.linkGain[i][j] = outVar.outputpowervar[i] + pathloss; outVar.linkGain[j][i] = outVar.outputpowervar[j] + pathloss; } } return true; } /** * Provides link gain and noise floor in file linkgain.out, and the * X/Y coordinates in file topology.out. * * @param inVar class that contains input parameters from configuration file * @param outVar class that stores link gains, noise floors and x/y coordinates * @return true if files linkgain.out and topology.out were printed correctly */ protected static boolean printFile( InputVariables inVar, OutputVariables outVar ) { int i, j; DecimalFormat posFormat = new DecimalFormat("##0.00"); /* * Output file for xy coordinates. */ try{ FileOutputStream fout = new FileOutputStream("topology.out"); try { PrintStream myOutput = new PrintStream(fout); for (i = 0; i < inVar.numNodes; i = i+1) { myOutput.print( i + "\t" + posFormat.format(outVar.nodePosX[i]) + "\t"+ posFormat.format(outVar.nodePosY[i]) + "\n"); } } catch (Exception e) { System.out.println("\nError : Failed to open a print stream to the linkgain file" + e); } } catch (Exception e) { System.out.println("\nError : Failed to open the link gain file linkgains.out:" + e); } /* * Output file for link gains. */ try{ FileOutputStream fout = new FileOutputStream("linkgain.out"); try { PrintStream myOutput = new PrintStream(fout); for (i = 0; i < inVar.numNodes; i = i+1) { for (j = (i+1); j < inVar.numNodes; j = j+1 ) { if ( i != j) { myOutput.print( "gain\t" + i + "\t" + j + "\t" + posFormat.format(outVar.linkGain[i][j]) + "\n"); myOutput.print( "gain\t" + j + "\t" + i + "\t" + posFormat.format(outVar.linkGain[j][i]) + "\n"); } } } for (i = 0; i < inVar.numNodes; i = i+1) { myOutput.print( "noise\t" + i + "\t" + posFormat.format(outVar.noisefloor[i]) + "\t" + posFormat.format(inVar.wgn) + "\n"); } } catch (Exception e) { System.out.println("\nError : Failed to open a print stream to the linkgain file" + e); } } catch (Exception e) { System.out.println("\nError : Failed to open the link gain file linkgains.out:" + e); } return true; } /** * Obtains nodes coordinates for user-defined topology. * * @param inputTopoFile topology file provided by user * @param outVar class that contains variables to store x/y coordinates of nodes * @return true if x/y coordinates of user-defined topology file were read correctly. */ protected static boolean readTopologyFile ( String inputTopoFile, OutputVariables outVar ) { String thisLine; StringTokenizer st; int counter = 0; try { FileInputStream fin = new FileInputStream(inputTopoFile); try { BufferedReader myInput = new BufferedReader(new InputStreamReader(fin)); try { while ((thisLine = myInput.readLine()) != null) { if ( !thisLine.equals("") && !thisLine.startsWith("%") && !thisLine.startsWith(" ") ) { st = new StringTokenizer(thisLine, " \t"); int node = Integer.parseInt(st.nextToken()); double x = Double.valueOf(st.nextToken()).doubleValue(); double y = Double.valueOf(st.nextToken()).doubleValue(); outVar.nodePosX[node] = x; outVar.nodePosY[node] = y; counter++; } } } // end try catch (Exception e) { System.out.println("Error4: " + e); System.exit(1); } } // end try catch (Exception e) { System.out.println("Error5: " + e); System.exit(1); } } // end try catch (Exception e) { System.out.println("Error: Failed to Open TOPOLOGY_FILE " + inputTopoFile + e); System.exit(1); } return true; } /** * Obtains number of nodes in network when user defines the topology. * * @param inputTopoFile topology file provided by user * @param inVar class that contains variable for number of nodes * @return true if number of nodes from user-defined topology file were obtained correctly */ protected static boolean obtainNumNodes ( String inputTopoFile, InputVariables inVar ) { String thisLine; StringTokenizer st; int counter = 0; try { FileInputStream fin = new FileInputStream(inputTopoFile); try { BufferedReader myInput = new BufferedReader(new InputStreamReader(fin)); try { while ((thisLine = myInput.readLine()) != null) { if ( !thisLine.equals("") && !thisLine.startsWith("%") && !thisLine.startsWith(" ") ) { counter++; } } inVar.numNodes = counter; } // end try catch (Exception e) { System.out.println("Error4: " + e); System.exit(1); } } // end try catch (Exception e) { System.out.println("Error5: " + e); System.exit(1); } } // end try catch (Exception e) { System.out.println("Error: Failed to Open TOPOLOGY_FILE " + inputTopoFile + e); System.exit(1); } return true; } private static void usage() { System.err.println("usage: net.tinyos.sim.LinkLayerModel "); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sim/Makefile000066400000000000000000000001271207233610700235420ustar00rootroot00000000000000# Top-level Makefile for tools/java ROOT = ../../.. include $(ROOT)/Makefile.include tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/sim/package.html000066400000000000000000000015111207233610700243610ustar00rootroot00000000000000 Provides tools to generate communication topologies for TOSSIM.

    Package Specification

    Related Documentation

    Lesson 11 of the TinyOS tutorials describe how to use these tools. tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/tools/000077500000000000000000000000001207233610700224525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/tools/Listen.java000066400000000000000000000062571207233610700245650ustar00rootroot00000000000000// $Id: Listen.java,v 1.5 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.tools; import java.io.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class Listen { public static void main(String args[]) throws IOException { String source = null; PacketSource reader; if (args.length == 2 && args[0].equals("-comm")) { source = args[1]; } else if (args.length > 0) { System.err.println("usage: java net.tinyos.tools.Listen [-comm PACKETSOURCE]"); System.err.println(" (default packet source from MOTECOM environment variable)"); System.exit(2); } if (source == null) { reader = BuildSource.makePacketSource(); } else { reader = BuildSource.makePacketSource(source); } if (reader == null) { System.err.println("Invalid packet source (check your MOTECOM environment variable)"); System.exit(2); } try { reader.open(PrintStreamMessenger.err); for (;;) { byte[] packet = reader.readPacket(); Dump.printPacket(System.out, packet); System.out.println(); System.out.flush(); } } catch (IOException e) { System.err.println("Error on " + reader.getName() + ": " + e); } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/tools/ListenRaw.java000066400000000000000000000136751207233610700252410ustar00rootroot00000000000000// $Id: ListenRaw.java,v 1.7 2010-06-29 22:07:41 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: Mike Chen, Philip Levis * Last Modified: 7/1/02 (transition to nesC) * */ /** * @author Mike Chen * @author Philip Levis */ package net.tinyos.tools; import java.io.*; import net.tinyos.comm.*; import net.tinyos.util.*; public class ListenRaw { private static final int PORT_SPEED_TELOS = 115200; private static final int PORT_SPEED_MICAZ = 57600; private static final int PORT_SPEED_MICA2 = 57600; private static final int PORT_SPEED_MICA2DOT = 19200; private static final int PORT_SPEED_MICA = 19200; private static final int PORT_SPEED_RENE = 19200; private static final int PORT_SPEED_IRIS = 57600; private static final int PORT_SPEED_SHIMMER = 115200; private int portSpeed; private SerialPort port; private String portName; private InputStream in; private OutputStream out; public ListenRaw(String portName, int portSpeed) { this.portName = portName; this.portSpeed = portSpeed; } public void open() throws IOException, UnsupportedCommOperationException { System.out.println("Opening port " + portName); port = new TOSSerial(portName); in = port.getInputStream(); out = port.getOutputStream(); //port.setFlowControlMode(SerialPort.FLOWCONTROL_NONE); // These are the mote UART parameters port.setSerialPortParams(portSpeed, 8, SerialPort.STOPBITS_1, false); printPortStatus(); System.out.println(); } private void printPortStatus() { System.out.println(" baud rate: " + port.getBaudRate()); System.out.println(" data bits: " + port.getDataBits()); System.out.println(" stop bits: " + port.getStopBits()); System.out.println(" parity: " + port.getParity()); } public void read() throws IOException { int i; while ((i = in.read()) != -1) { if (i == 0x7e) { System.out.println(); } Dump.printByte(System.out, i); } } private static void printUsage() { System.err.println("usage: java net.tinyos.tools.ListenRaw [options] "); System.err.println("options are:"); System.err.println(" -h, --help: usage help"); System.err.println(" -p: print available ports"); System.err.println(" -telos: Telos ("+PORT_SPEED_TELOS+" bps)"); System.err.println(" -micaz: Mica2 ("+PORT_SPEED_MICAZ+" bps) [default]"); System.err.println(" -mica2: Mica2 ("+PORT_SPEED_MICA2+" bps) [default]"); System.err.println(" -mica2dot: Mica2Dot ("+PORT_SPEED_MICA2DOT+" bps)"); System.err.println(" -mica: Mica ("+PORT_SPEED_MICA+" bps)"); System.err.println(" -rene: Rene ("+PORT_SPEED_RENE+" bps)"); System.err.println(" -iris: Iris ("+PORT_SPEED_IRIS+" bps) [default]"); System.err.println(" -shimmer: Shimmer ("+PORT_SPEED_SHIMMER+" bps)"); System.exit(-1); } public static void main(String args[]) { int speed = PORT_SPEED_MICA2; if ((args.length < 1) || (args.length > 3)) { printUsage(); } for (int i = 0; i < args.length; i++) { if (args[i].equals("-h") || args[i].equals("--help")) { printUsage(); } if (args[i].equals("-telos")) { speed = PORT_SPEED_TELOS; } if (args[i].equals("-micaz")) { speed = PORT_SPEED_MICAZ; } if (args[i].equals("-mica2")) { speed = PORT_SPEED_MICA2; } if (args[i].equals("-mica2dot")) { speed = PORT_SPEED_MICA2DOT; } if (args[i].equals("-mica")) { speed = PORT_SPEED_MICA; } if (args[i].equals("-rene")) { speed = PORT_SPEED_RENE; } if (args[i].equals("-iris")) { speed = PORT_SPEED_IRIS; } if (args[i].equals("-shimmer")) { speed = PORT_SPEED_SHIMMER; } } if (args[args.length - 1].charAt(0) == '-') { return; // No port specified } ListenRaw reader = new ListenRaw(args[args.length - 1], speed); try { reader.open(); } catch (Exception e) { e.printStackTrace(); } try { reader.read(); } catch (Exception e) { e.printStackTrace(); } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/tools/Makefile000066400000000000000000000005721207233610700241160ustar00rootroot00000000000000# $Id: Makefile,v 1.6 2008-06-18 19:04:45 sallai Exp $ # # TinyOS Tools Makefile # # @author TinyOS Team # INITIAL_TARGETS = PrintfMsg.class PrintfMsg.java ROOT = ../../.. include $(ROOT)/Makefile.include PRINTF_H = $(TOSDIR)/lib/printf/printf.h PrintfMsg.java: $(PRINTF_H) FORCE mig java $(CFLAGS) -java-classname=net.tinyos.tools.PrintfMsg $(PRINTF_H) printf_msg -o $@ tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/tools/MsgReader.java000066400000000000000000000077531207233610700252020ustar00rootroot00000000000000/* tab:4 * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: Phil Levis * Date: December 1 2005 * Desc: Generic Message reader * */ /** * @author Phil Levis */ package net.tinyos.tools; import java.util.*; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class MsgReader implements net.tinyos.message.MessageListener { private MoteIF moteIF; public MsgReader(String source) throws Exception { if (source != null) { moteIF = new MoteIF(BuildSource.makePhoenix(source, PrintStreamMessenger.err)); } else { moteIF = new MoteIF(BuildSource.makePhoenix(PrintStreamMessenger.err)); } } public void start() { } public void messageReceived(int to, Message message) { long t = System.currentTimeMillis(); // Date d = new Date(t); System.out.print("" + t + ": "); System.out.println(message); } private static void usage() { System.err.println("usage: MsgReader [-comm ] message-class [message-class ...]"); } private void addMsgType(Message msg) { moteIF.registerListener(msg, this); } public static void main(String[] args) throws Exception { String source = null; Vector v = new Vector(); if (args.length > 0) { for (int i = 0; i < args.length; i++) { if (args[i].equals("-comm")) { source = args[++i]; } else { String className = args[i]; try { Class c = Class.forName(className); Object packet = c.newInstance(); Message msg = (Message)packet; if (msg.amType() < 0) { System.err.println(className + " does not have an AM type - ignored"); } else { v.addElement(msg); } } catch (Exception e) { System.err.println(e); } } } } else if (args.length != 0) { usage(); System.exit(1); } MsgReader mr = new MsgReader(source); Enumeration msgs = v.elements(); while (msgs.hasMoreElements()) { Message m = (Message)msgs.nextElement(); mr.addMsgType(m); } mr.start(); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/tools/PrintfClient.java000066400000000000000000000057051207233610700257250ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.3 $ * @date $Date: 2010-06-29 22:07:42 $ */ package net.tinyos.tools; import net.tinyos.message.*; import net.tinyos.packet.*; import net.tinyos.util.*; public class PrintfClient implements MessageListener { private MoteIF moteIF; public PrintfClient(MoteIF moteIF) { this.moteIF = moteIF; this.moteIF.registerListener(new PrintfMsg(), this); } public void messageReceived(int to, Message message) { PrintfMsg msg = (PrintfMsg)message; for(int i=0; i]"); } public static void main(String[] args) throws Exception { String source = null; if (args.length == 2) { if (!args[0].equals("-comm")) { usage(); System.exit(1); } source = args[1]; } PhoenixSource phoenix; if (source == null) { phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); } else { phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); } System.out.print(phoenix); MoteIF mif = new MoteIF(phoenix); PrintfClient client = new PrintfClient(mif); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/tools/Send.java000066400000000000000000000052471207233610700242160ustar00rootroot00000000000000// $Id: Send.java,v 1.5 2010-06-29 22:07:42 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.tools; import net.tinyos.util.*; import net.tinyos.packet.*; import java.io.*; public class Send { public static void main(String[] argv) throws IOException { PacketSource sfw = BuildSource.makePacketSource(); sfw.open(PrintStreamMessenger.err); byte[] packet = new byte[argv.length]; for (int i = 0; i < argv.length; i++) packet[i] = (byte)Integer.parseInt(argv[i], 16); try { sfw.writePacket(packet); } catch (IOException e) { System.exit(2); } Dump.printPacket(System.out, packet); System.out.println(); // A close would be nice, but javax.comm's close is deathly slow //sfw.close(); System.exit(0); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/tools/package.html000066400000000000000000000014041207233610700247320ustar00rootroot00000000000000 Provides low-level tools for interacting with TinyOS nodes.

    Package Specification

    Related Documentation

    tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/000077500000000000000000000000001207233610700222675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/Crc.java000066400000000000000000000061031207233610700236410ustar00rootroot00000000000000// $Id: Crc.java,v 1.5 2010-06-29 22:07:42 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.util; public class Crc { public static int calcByte(int crc, int b) { crc = crc ^ (int)b << 8; for (int i = 0; i < 8; i++) { if ((crc & 0x8000) == 0x8000) crc = crc << 1 ^ 0x1021; else crc = crc << 1; } return crc & 0xffff; } public static int calc(byte[] packet, int index, int count) { int crc = 0; while (count > 0) { crc = calcByte(crc, packet[index++]); count--; } return crc; } public static int calc(byte[] packet, int count) { return calc(packet, 0, count); } public static void set(byte[] packet) { int crc = Crc.calc(packet, packet.length - 2); packet[packet.length - 2] = (byte) (crc & 0xFF); packet[packet.length - 1] = (byte) ((crc >> 8) & 0xFF); } public static void main(String[] args) { byte[] ia = new byte[args.length]; for (int i = 0; i < args.length; i++) try { ia[i] = Integer.decode(args[i]).byteValue(); } catch (NumberFormatException e) { } System.out.println(Integer.toHexString(calc(ia, ia.length))); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/DiagMsg.java000066400000000000000000000240231207233610700244460ustar00rootroot00000000000000/* * Copyright (c) 2003-2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ package net.tinyos.util; import net.tinyos.packet.*; import net.tinyos.util.PrintStreamMessenger; public class DiagMsg implements PacketListenerIF { protected String delimiter = " "; protected java.text.SimpleDateFormat timestamp = new java.text.SimpleDateFormat("HH:mm:ss"); static final int PACKET_TYPE_FIELD = 7; static final int PACKET_LENGTH_FIELD = 5; static final int PACKET_DATA_FIELD = 8; static final int PACKET_CRC_SIZE = 0; static final byte AM_DIAG_MSG = (byte)0xB1; protected PhoenixSource forwarder; public DiagMsg(PhoenixSource forwarder) { this.forwarder = forwarder; forwarder.registerPacketListener(this); } public void run() { forwarder.run(); } public static void main(String[] args) throws Exception { PhoenixSource phoenix = null; if( args.length == 0 ) phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); else if( args.length == 2 && args[0].equals("-comm") ) phoenix = BuildSource.makePhoenix(args[1], PrintStreamMessenger.err); else { System.err.println("usage: DiagMsg [-comm ]"); System.exit(1); } DiagMsg listener = new DiagMsg(phoenix); listener.run(); } public void packetReceived(byte[] packet) { if( packet[PACKET_TYPE_FIELD] == AM_DIAG_MSG ) { try { System.out.println(timestamp.format(new java.util.Date()) + " " + decode(packet)); } catch(Exception e) { System.out.println(e.getMessage()); } } } protected byte[] packet; protected int end; protected int head; protected StringBuffer line; protected synchronized String decode(byte[] packet) throws Exception { this.packet = packet; head = PACKET_DATA_FIELD; end = PACKET_DATA_FIELD + packet[PACKET_LENGTH_FIELD]; if( end < head || end > packet.length - PACKET_CRC_SIZE ) throw new Exception("illegal message length"); line = new StringBuffer(); while(head < end) { byte code = getByte(); addSimple(code & 0xF); addSimple((code >> 4) & 0xF); } // delete the leading space if( line.length() > 0 && line.substring(0, delimiter.length()).equals(delimiter) ) line.delete(0, delimiter.length()); return new String(line); } static final int TYPE_END = 0; static final int TYPE_INT8 = 1; static final int TYPE_UINT8 = 2; static final int TYPE_HEX8 = 3; static final int TYPE_INT16 = 4; static final int TYPE_UINT16 = 5; static final int TYPE_HEX16 = 6; static final int TYPE_INT32 = 7; static final int TYPE_UINT32 = 8; static final int TYPE_HEX32 = 9; static final int TYPE_FLOAT = 10; static final int TYPE_CHAR = 11; static final int TYPE_INT64 = 12; static final int TYPE_UINT64 = 13; static final int TYPE_ARRAY = 15; protected void addSimple(int type) throws Exception { switch(type) { case TYPE_END: break; case TYPE_INT8: addInt8(); break; case TYPE_UINT8: addUint8(); break; case TYPE_HEX8: addHex8(); break; case TYPE_INT16: addInt16(); break; case TYPE_UINT16: addUint16(); break; case TYPE_HEX16: addHex16(); break; case TYPE_INT32: addInt32(); break; case TYPE_UINT32: addUint32(); break; case TYPE_HEX32: addHex32(); break; case TYPE_FLOAT: addReal(); break; case TYPE_CHAR: addChar(); break; case TYPE_INT64: addInt64(); break; case TYPE_UINT64: addUint64(); break; case TYPE_ARRAY: addArray(); break; default: line.append(delimiter + "unknown"); } } protected void addArray() throws Exception { int len = getByte(); int type = (len >> 4) & 0xF; len &= 0xF; if( type == TYPE_CHAR ) addStr(len); else { line.append(delimiter + "["); while( --len >= 0 ) addSimple(type); line.append(" ]"); } } protected void check(int len) throws Exception { if( head + len > end ) throw new Exception("illegal message format"); } protected byte getByte() throws Exception { check(1); byte ret = packet[head]; head += 1; return ret; } protected short getShort() throws Exception { short a,b; check(2); a = packet[head]; a &= 0x00FF; b = packet[head+1]; b <<= 8; b &= 0xFF00; a |= b; head += 2; return a; } protected int getInt() throws Exception { int a,b; check(4); a = packet[head]; a &= 0x000000FF; b = packet[head+1]; b <<= 8; b &= 0x0000FF00; a |= b; b = packet[head+2]; b <<= 16; b &= 0x00FF0000; a |= b; b = packet[head+3]; b <<= 24; b &= 0xFF000000; a |= b; head += 4; return a; } protected long getLong() throws Exception { long a,b; check(8); a = packet[head]; a &= 0xFF; b = packet[head+1]; b &= 0xFF; b <<= 8; a |= b; b = packet[head+2]; b &= 0xFF; b <<= 16; a |= b; b = packet[head+3]; b &= 0xFF; b <<= 24; a |= b; b = packet[head+4]; b &= 0xFF; b <<= 32; a |= b; b = packet[head+5]; b &= 0xFF; b <<= 40; a |= b; b = packet[head+6]; b &= 0xFF; b <<= 48; a |= b; b = packet[head+7]; b &= 0xFF; b <<= 56; a |= b; head += 8; return a; } protected void addUint8() throws Exception { String value = Integer.toString(getByte() & 0xFF); line.append(delimiter + value); } protected void addInt8() throws Exception { String value = Byte.toString(getByte()); line.append(delimiter + value); } protected void addHex8() throws Exception { String value = Integer.toHexString(getByte() & 0xFF); line.append(delimiter + "0x"); for(int i = value.length(); i < 2; ++i) line.append('0'); line.append(value); } protected void addUint16() throws Exception { String value = Integer.toString(getShort() & 0xFFFF); line.append(delimiter + value); } protected void addInt16() throws Exception { String value = Short.toString(getShort()); line.append(delimiter + value); } protected void addHex16() throws Exception { String value = Integer.toHexString(getShort() & 0xFFFF); line.append(delimiter + "0x"); for(int i = value.length(); i < 4; ++i) line.append('0'); line.append(value); } protected void addUint32() throws Exception { String value = Long.toString(getInt() & 0xFFFFFFFFL); line.append(delimiter + value); } protected void addInt32() throws Exception { String value = Integer.toString(getInt()); line.append(delimiter + value); } protected void addHex32() throws Exception { String value = Integer.toHexString(getInt()); line.append(delimiter + "0x"); for(int i = value.length(); i < 8; ++i) line.append('0'); line.append(value); } protected void addInt64() throws Exception { String value = Long.toString(getLong()); line.append(delimiter + value); } protected void addUint64() throws Exception { // TODO: make this an unsigned conversion String value = Long.toString(getLong()); line.append(delimiter + value); } protected void addReal() throws Exception { float value = Float.intBitsToFloat(getInt()); line.append(delimiter + Float.toString(value)); } protected void addChar() throws Exception { char value = (char)getByte(); line.append(delimiter + "'" + value + "'"); } protected void addStr(int len) throws Exception { line.append(delimiter + "\""); while( --len >= 0 ) line.append((char)getByte()); line.append('"'); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/Dump.java000066400000000000000000000061271207233610700240450ustar00rootroot00000000000000// $Id: Dump.java,v 1.5 2010-06-29 22:07:42 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: David Gay * Intel Research Berkeley Lab * */ /** * @author David Gay * @author Intel Research Berkeley Lab */ package net.tinyos.util; import java.io.*; /** * Dump class (print tinyos messages).

    * * Print packets in hex * * @version 1, 15 Jul 2002 * @author David Gay */ public class Dump { public static void printByte(PrintStream p, int b) { String bs = Integer.toHexString(b & 0xff).toUpperCase(); if (b >=0 && b < 16) p.print("0"); p.print(bs + " "); } public static void printPacket(PrintStream p, byte[] packet, int from, int count) { for (int i = from; i < count; i++) printByte(p, packet[i]); } public static void printPacket(PrintStream p, byte[] packet) { printPacket(p, packet, 0, packet.length); } public static void dump(PrintStream to, String prefix, byte[] data) { to.print(prefix); to.print(":"); printPacket(to, data); to.println(); } public static void dump(String prefix, byte[] packet) { dump(System.err, prefix, packet); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/Env.java000066400000000000000000000024651207233610700236710ustar00rootroot00000000000000// $Id: Env.java,v 1.4 2006-12-12 18:23:00 vlahan Exp $ package net.tinyos.util; /** * The Env class provides an implementation of * getenv that actually works, unlike the one in * java.lang.System. The class cannot be instantiated. * * V1.1: provide wrapper so that getenv doesn't fail horribly when the * native code is not found. * * @author R M Yorston, David Gay * @version 1.1 */ public class Env { static private boolean loaded; static { try { net.tinyos.util.TOSLibraryLoader.load("getenv"); loaded = true; } catch (Throwable t) { System.err.println("getenv JNI library not found. Env.getenv will not work"); System.err.println("(run the tos-install-jni tool, see man tos-install-jni for more details)\n"); } } private Env() { } /** * Gets an environment variable. An environment variable is a * system-dependent external variable that has a string value. * * @param name name of the environment variable * @return the value of the variable, or null if the * variable is not defined. */ public static String getenv(String name) { if (loaded) { return igetenv(name); } else { return null; } } private static native String igetenv(String name); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/Makefile000066400000000000000000000001441207233610700237260ustar00rootroot00000000000000# Top-level Makefile for tools/java SUBDIRS = ROOT = ../../.. include $(ROOT)/Makefile.include tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/Messenger.java000066400000000000000000000041441207233610700250650ustar00rootroot00000000000000// $Id: Messenger.java,v 1.5 2010-06-29 22:07:42 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.util; public interface Messenger { public void message(String s); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/PrintStreamMessenger.java000066400000000000000000000046731207233610700272650ustar00rootroot00000000000000// $Id: PrintStreamMessenger.java,v 1.5 2010-06-29 22:07:42 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ package net.tinyos.util; import java.io.*; public class PrintStreamMessenger implements Messenger { private PrintStream ps; public PrintStreamMessenger(PrintStream ps) { this.ps = ps; } public void message(String s) { ps.println(s); } public static PrintStreamMessenger err = new PrintStreamMessenger(System.err); public static PrintStreamMessenger out = new PrintStreamMessenger(System.out); } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/TOSLibraryLoader.java000066400000000000000000000200271207233610700262540ustar00rootroot00000000000000/* Copyright (c) 2010 Urs Hunkeler (urs.hunkeler@epfl.ch) * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement * is hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR THE AUTHOR BE LIABLE TO ANY PARTY * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE COPYRIGHT * HOLDER AND/OR THE AUTHOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE COPYRIGHT HOLDER AND THE AUTHOR SPECIFICALLY DISCLAIM ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND * FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS ON AN * "AS IS" BASIS, AND NEITHER THE COPYRIGHT OWNER NOR THE AUTHOR HAS ANY * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR * MODIFICATIONS. */ package net.tinyos.util; import java.io.ByteArrayOutputStream; import java.io.File; import java.io.FileOutputStream; import java.io.IOException; import java.io.InputStream; import java.io.PrintStream; /** * This is a loader for native libraries that tries * to load the libraries from an alternative path if * the tradition loading fails. * * The traditional approach is to find and load the native * libraries from an operating system and Java implementation * specific path. This requires the user to install the * libraries in a specific location and has proven to be * error prone and a frequent source of problems. The * traditional approach is supported by default to give * developers a means to easily test new versions of the * libraries. * * The alternative approach is strictly considered a * fall-back method if the libraries have not been installed * properly and to ease the deployment of back-end software * on non-developer machines. * * The alternative method determines the file (or resource) * name of the native library based on the current operating * system and architecture. It then attempts to copy the * library from a resource on the classpath (which might be * inside a .jar file, such as the tinyos.jar file) to a * temporary file and load the library from this temporary * file. The advantage of this method is that no native * library files need to be installed on the computer (and * thus no administrator rights are necessary). The temporary * files are deleted when the virtual machine terminates. * * Currently, the library loader class recognizes the * following operating systems: Mac OS X, Linux, and Windows. * The library loader class further recognizes the following * architectures: ppc (PowerPC), x86 (the common Intel x86 * 32-bit compatible processors), and amd64 (the x86 64-bit * processors). Precompiled libraries are only available * for the toscomm and getenv libraries for the following * platforms: macosx_ppc, macosx_x86, and windows_x86. * * @author Urs Hunkeler (urs.hunkeler@epfl.ch) */ public class TOSLibraryLoader { public static void load(String libName) { boolean loaded = false; boolean ok = true; InputStream is = null; FileOutputStream fos = null; String text = ""; // attempt to load the library the conventional way // (using Java's default library locations and loading // mechanism) try { text += "Attempting to load library '" + libName + "'\n"; System.loadLibrary(libName); loaded = true; text += "Library loaded successfully\n"; } catch(Throwable t) { text += "Could not load library '" + libName + "': " + t.getMessage() + "\n"; ByteArrayOutputStream baos = new ByteArrayOutputStream(); PrintStream ps = new PrintStream(baos); t.printStackTrace(ps); text += "----------\n"; text += baos.toString(); text += "----------\n"; } if(!loaded) { // failed to load the library the conventional way System.err.println("Error loading the TinyOS JNI libraries the conventional way!"); System.err.println(text); // try to extract the library from the classpath // (might be in tinyos.jar) // First some debugging information System.out.println("In order to load the library '" + libName + "' Java tries to locate the file '" + System.mapLibraryName(libName) + "' in one of the " + "following paths:"); System.out.println(System.getProperty("java.library.path")); System.out.println(); String os = System.getProperty("os.name"); String arch = System.getProperty("os.arch"); System.out.println("The operating system is '" + os + "' (" + arch + ")"); System.out.println(); String libFile = null; File tmpFile = null; if(os.toLowerCase().startsWith("linux")) { // Linux if(arch.toLowerCase().equals("x86") || arch.toLowerCase().equals("i386")) { libFile = "linux_x86_" + libName; } else if(arch.toLowerCase().equals("ppc")) { // not currently supported //libFile = "linux_ppc_" + libName; } else if(arch.toLowerCase().equals("amd64")) { libFile = "linux_amd64_" + libName; } } else if(os.toLowerCase().startsWith("windows")) { // Windows if(arch.toLowerCase().equals("x86") || arch.toLowerCase().equals("i386")) { libFile = "windows_x86_" + libName; } else if(arch.toLowerCase().equals("ppc")) { // not currently supported //libFile = "windows_ppc_" + libName; } else if(arch.toLowerCase().equals("amd64")) { // not currently supported //libFile = "windows_amd64_" + libName; } } else if(os.toLowerCase().startsWith("mac os x")) { libFile = "macosx_universal_" + libName; } if(libFile != null) libFile += ".lib"; if(libFile == null) { ok = false; System.out.println("The operating system and architecture " + "is currently not supported"); } if(ok) { System.out.println("Trying to locate the file '" + libFile + "' in the classpath"); // we found a mapping, now let's try to copy // the library from the classpath (might be // inside a .jar file) to a temporary file // and load it from there // open the library file in the classpath (potentially inside the .jar file) is = TOSLibraryLoader.class.getResourceAsStream(libFile); if(is == null) { System.out.println("The library file was not found in the classpath"); ok = false; } } if(ok) { try { tmpFile = File.createTempFile(libName, ".lib"); } catch(IOException ioe) { ok = false; tmpFile = null; System.out.println("Could not create temporary file to extract library, aborting..."); ioe.printStackTrace(); } } if(tmpFile == null) { ok = false; } if(ok) { System.out.println("Temporary file created: '" + tmpFile.getAbsolutePath() + "'"); tmpFile.deleteOnExit(); try { // open the temporary file for writing fos = new FileOutputStream(tmpFile); // copy the file byte[] buffer = new byte[1024]; int len = 0; while((len = is.read(buffer, 0, buffer.length)) > 0) { fos.write(buffer, 0, len); } } catch(IOException ioe) { ok = false; System.out.println("An error occurred while copying the library file, aborting..."); tmpFile.delete(); tmpFile = null; } finally { if(fos != null) try { fos.close(); } catch(IOException ioe) { ioe.printStackTrace(); } if( is != null) try { is.close(); } catch(IOException ioe) { ioe.printStackTrace(); } } } if(ok) { try { System.out.println("Library copied successfully. Let's load it."); System.load(tmpFile.getAbsolutePath()); loaded = true; System.out.println("Library loaded successfully"); } catch(Throwable t) { ok = false; System.out.println("Error loading the library: " + t.getMessage()); t.printStackTrace(); tmpFile.delete(); tmpFile = null; } } } } public static void main(String[] args) { load("toscomm"); } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/ZigbitProgrammer.java000066400000000000000000000210461207233610700264210ustar00rootroot00000000000000/** Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ package net.tinyos.util; import net.tinyos.comm.*; import java.io.*; import java.util.*; /** * This class implements the ZigBit bootloader protocol and can reset * the mote through a serial message. */ public class ZigbitProgrammer implements SerialPortListener { TOSSerial serial; protected InputStream is; protected OutputStream os; public byte[] readBytes(int count, long timeout) throws IOException { long deadline = System.currentTimeMillis() + timeout; byte[] bytes = new byte[count]; for(int i = 0; i < count; ) { synchronized(is) { if( is.available() > 0 ) bytes[i++] = (byte)is.read(); else { timeout = deadline - System.currentTimeMillis(); if( timeout <= 0 ) return null; try { is.wait(timeout); } catch(InterruptedException e) { return null; } } } } return bytes; } public void serialEvent(SerialPortEvent ev) { synchronized(is) { is.notify(); } } public void writeBytes(byte[] bytes) throws IOException { os.write(bytes); os.flush(); } public void closePort() throws IOException { if( serial != null ) { is.close(); os.close(); serial.close(); serial = null; is = null; os = null; } } public void openPort(String port) throws IOException { closePort(); try { serial = new TOSSerial(port); } catch(Exception e) { System.out.println("Cound not open port: " + port); System.exit(5); } serial.addListener(this); serial.notifyOn(SerialPortEvent.DATA_AVAILABLE, true); is = serial.getInputStream(); os = serial.getOutputStream(); } public void setBaudrate(int baudrate) { serial.setSerialPortParams(baudrate, 8, SerialPort.STOPBITS_1, false); } public boolean resetTinyOS(int baudrate) throws IOException { byte[] req = new byte[] { (byte)0x7e, (byte)0x44, (byte)0x19, (byte)0x72, 'R', 'S', 'T', (byte)0xb9, (byte)0x1e, (byte)0x7e }; byte[] ack = new byte[] { (byte)0x7e, (byte)0x45, (byte)0x72, 'Z', 'B', 'P', (byte)0x76, (byte)0x35, (byte)0x7e }; byte[] response = new byte[ack.length]; int[] baudrates; if( baudrate == 0 ) baudrates = new int[] { 57600, 230400, 115200, 38400 }; else baudrates = new int[] { baudrate }; System.out.print("Resetting TinyOS .."); for(int i = 0; i < 3; ++i) { for(int j = 0; j < baudrates.length; ++j) { setBaudrate(baudrates[j]); for(int k = 0; k < 2; ++k) { System.out.print('.'); writeBytes(req); long deadline = System.currentTimeMillis() + 200; for(;;) { long timeout = deadline - System.currentTimeMillis(); if( timeout <= 0 ) break; byte[] b = readBytes(1, timeout); if( b != null ) { System.arraycopy(response, 1, response, 0, response.length-1); response[response.length-1] = b[0]; if( Arrays.equals(response, ack) ) { System.out.println(" done"); return true; } } } } } } System.out.println(" failed"); return false; } public void accessBootloder() throws IOException { byte[] req = new byte[] { (byte)0xB2, (byte)0xA5, (byte)0x65, (byte)0x4B }; byte[] ack = new byte[] { (byte)0x69, (byte)0xD3, (byte)0xD2, (byte)0x26 }; System.out.print("Connecting to bootloader .."); for(int i = 0; i < 20; ++i) { System.out.print('.'); writeBytes(req); byte[] response = readBytes(4, 500); if( response != null && Arrays.equals(response, ack) ) { System.out.println(" done"); return; } } System.out.println(" failed"); System.exit(1); } public void uploadFile(String filename) throws FileNotFoundException, IOException { Scanner scanner = new Scanner(new File(filename)); ArrayList lines = new ArrayList(); while( scanner.hasNextLine() ) lines.add(scanner.nextLine()); byte[] ack = new byte[] { (byte)0x4D, (byte)0x5A, (byte)0x9A, (byte)0xB4 }; byte[] nak = new byte[] { (byte)0x2D, (byte)0x59, (byte)0x5A, (byte)0xB2 }; System.out.print("Writing " + lines.size() + " pages to flash ..."); for(int i = 0; i < lines.size(); ++i) { String line = lines.get(i); byte[] bytes = new byte[1 + line.length()/2]; bytes[0] = (byte)line.charAt(0); bytes[1] = (byte)line.charAt(1); for(int j = 2; j < bytes.length; ++j) bytes[j] = (byte)Integer.parseInt(line.substring(-2 + j*2, j*2), 16); writeBytes(bytes); byte[] response = readBytes(4, 50); if( response == null ) { System.out.println(" no response"); System.exit(2); } else if( Arrays.equals(response, ack) ) { if( i % 16 == 0 ) System.out.print("."); } else if( Arrays.equals(response, nak) ) { System.out.println(" not accepted"); System.exit(3); } else { System.out.println(" incorrect response"); System.exit(4); } } System.out.println(" done"); } public static void main(String[] args) throws IOException, InterruptedException { String port = null; int baudrate = 0; boolean reset = false; boolean askForReset=false; String srec = null; int sleep = 0; if( args.length == 0 ) { System.out.println("Usage: java net.tinyos.util.ZigbitProgrammer "); System.out.println(" where flags are the following"); System.out.println("\t-port \t\tsets the communication port (mandatory)"); System.out.println("\t-baudrate \tsets the baudrate of TinyOS serial (0=auto)"); System.out.println("\t-reset\t\t\tsoftware reset through TinyOS serial"); System.out.println("\t-askforreset\t\tasks the user to reset the mote if needed"); System.out.println("\t-sleep \twaits (omitted if a reset fails)"); System.out.println("\t-upload \tuploads file through ZigBit bootloader"); System.exit(0); } for(int i = 0; i < args.length; ++i) { if( args[i].equals("-port") ) port = args[++i]; else if( args[i].equals("-baudrate") ) baudrate = Integer.parseInt(args[++i]); else if( args[i].equals("-reset") ) reset = true; else if( args[i].equals("-askforreset") ) askForReset = true; else if( args[i].equals("-sleep") ) sleep = Integer.parseInt(args[++i]); else if( args[i].equals("-upload") ) srec = args[++i]; else { System.out.println("Incorrect option: " + args[i]); System.exit(6); } } if( port == null ) { System.out.println("The communication port is not specified"); System.exit(6); } ZigbitProgrammer programmer = new ZigbitProgrammer(); if( reset ) { programmer.openPort(port); if ( programmer.resetTinyOS(baudrate) == false ){ sleep=0; } else askForReset=false; programmer.closePort(); } if( askForReset ) { System.out.println("Please reset the mote, than press enter"); System.in.read(); } else if( sleep > 0 ) Thread.sleep(1000 * sleep); if( srec != null ) { programmer.openPort(port); programmer.setBaudrate(38400); programmer.accessBootloder(); programmer.uploadFile(srec); programmer.closePort(); } } } tinyos-2.1.2+dfsg/support/sdk/java/net/tinyos/util/package.html000066400000000000000000000013721207233610700245530ustar00rootroot00000000000000 Provides low-level utilities used by many packages.

    Package Specification

    Related Documentation

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__Wnet/tinyos/mviz/DMote.classPK }j?gdO net/tinyos/mviz/DMoteModel.classPK }j?]$t(lnet/tinyos/mviz/DMoteModelListener.classPK }j?! q &net/tinyos/mviz/DNavigate.classPK }j?Ymnet/tinyos/mviz/DShape$1.classPK }j?UO^net/tinyos/mviz/DShape.classPK }j?sL'u !net/tinyos/mviz/DShapeModel.classPK }j?Qr)gnet/tinyos/mviz/DShapeModelListener.classPK }j?M;  net/tinyos/mviz/DataModel.classPK }j?_U"ݨnet/tinyos/mviz/MessageInput.classPK }j?Aưnet/tinyos/packet/PK }j?0̈́&net/tinyos/packet/AbstractSource.classPK }j?5t[Rg net/tinyos/packet/BaudRate.classPK }j?g_i#net/tinyos/packet/BuildSource.classPK }j?QA"net/tinyos/packet/ByteSource.classPK }j?$Ѳ)tnet/tinyos/packet/NetworkByteSource.classPK |j?^E!΃(mnet/tinyos/packet/PacketListenerIF.classPK |j?9p;I$6net/tinyos/packet/PacketSource.classPK }j?Iv*Znet/tinyos/packet/Packetizer$Escaper.classPK }j?-"Unet/tinyos/packet/Packetizer.classPK }j?&ыd!net/tinyos/packet/ParseArgs.classPK |j?Evq}$net/tinyos/packet/PhoenixError.classPK |j?Fg&'net/tinyos/packet/PhoenixSource$1.classPK |j?t %net/tinyos/packet/PhoenixSource.classPK }j?r0 cnet/tinyos/packet/Platform.classPK }j?'"net/tinyos/packet/SFProtocol.classPK }j? net/tinyos/packet/SFSource.classPK }j?ebInet/tinyos/packet/Serial.classPK }j?(net/tinyos/packet/SerialByteSource.classPK }j?#f:U(net/tinyos/packet/StreamByteSource.classPK }j?Aenet/tinyos/sf/PK }j?@wE net/tinyos/sf/SFClient.classPK }j?n%Bnet/tinyos/sf/SFConsoleRenderer.classPK }j?ͺ ~net/tinyos/sf/SFListen.classPK }j?B"net/tinyos/sf/SFNullRenderer.classPK }j? h{net/tinyos/sf/SFRenderer.classPK }j?&=net/tinyos/sf/SFWindow$1.classPK }j?>Knet/tinyos/sf/SFWindow$2.classPK }j?cUnet/tinyos/sf/SFWindow$3.classPK }j?hR,net/tinyos/sf/SFWindow$4.classPK }j?æEnet/tinyos/sf/SFWindow$5.classPK }j?E9 net/tinyos/sf/SFWindow.classPK }j?LD5/$net/tinyos/sf/SerialForwarder$SFMessenger.classPK }j?N^T?#net/tinyos/sf/SerialForwarder.classPK }j?A;net/tinyos/sim/PK }j?2u#hnet/tinyos/sim/InputVariables.classPK }j?~Nc!"#rnet/tinyos/sim/LinkLayerModel.classPK }j? e$,net/tinyos/sim/OutputVariables.classPK }j?A^-net/tinyos/tools/PK }j?~Z6-net/tinyos/tools/Listen.classPK }j?U "1net/tinyos/tools/ListenRaw.classPK }j?o 8net/tinyos/tools/MsgReader.classPK }j?8s@N#A=net/tinyos/tools/PrintfClient.classPK }j?zHd4 @net/tinyos/tools/PrintfMsg.classPK }j?-F ,4Fnet/tinyos/tools/Send.classPK }j?AHnet/tinyos/util/PK }j?mRHnet/tinyos/util/Crc.classPK }j?s|{ PKnet/tinyos/util/DiagMsg.classPK }j?QoU;OVnet/tinyos/util/Dump.classPK }j?JXnet/tinyos/util/Env.classPK |j?~kwZnet/tinyos/util/Messenger.classPK }j?e&XYF*s[net/tinyos/util/PrintStreamMessenger.classPK }j?夯&]net/tinyos/util/TOSLibraryLoader.classPK }j?^ 2&enet/tinyos/util/ZigbitProgrammer.classPK j?H |&pnet/tinyos/util/linux_amd64_getenv.libPK j?+`*Ow'+znet/tinyos/util/linux_amd64_toscomm.libPK j?f 8u$net/tinyos/util/linux_x86_getenv.libPK j?jbL%Qnet/tinyos/util/linux_x86_toscomm.libPK j?8P+net/tinyos/util/macosx_universal_getenv.libPK j?&X,%net/tinyos/util/macosx_universal_toscomm.libPK j?!߷o"&hnet/tinyos/util/windows_x86_getenv.libPK j?'net/tinyos/util/windows_x86_toscomm.libPKpp"tinyos-2.1.2+dfsg/support/sdk/python/000077500000000000000000000000001207233610700175775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/python/tinyos/000077500000000000000000000000001207233610700211245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/python/tinyos/__init__.py000066400000000000000000000031731207233610700232410ustar00rootroot00000000000000# # Copyright (c) 2005 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # __all__ = ["message", "packet", "utils", "tossim"] tinyos-2.1.2+dfsg/support/sdk/python/tinyos/message/000077500000000000000000000000001207233610700225505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/python/tinyos/message/Makefile000066400000000000000000000002321207233610700242050ustar00rootroot00000000000000SERIAL_H = $(TOSDIR)/lib/serial/Serial.h SerialPacket.py: mig -o $@ -python-classname=SerialPacket python $(SERIAL_H) serial_packet -I$(TOSDIR)/types tinyos-2.1.2+dfsg/support/sdk/python/tinyos/message/Message.py000066400000000000000000000144321207233610700245120ustar00rootroot00000000000000# # Copyright (c) 2005 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Authors: Geoffrey Mainland # Philip Levis import struct class MessageException(Exception): def __init__(self, *args): self.args = args class Message: def __init__(self, data, addr=None, gid=None, base_offset=0, data_length=None): self.addr = addr self.gid = gid self.data = data self.base_offset = base_offset if data_length != None: self.data_length = data_length if data == None or len(data) != data_length: self.data = chr(0) * data_length else: self.data_length = len(data) self.am_type = 0 def dataGet(self): return self.data def baseOffset(self): return self.base_offset def dataLength(self): return self.data_length def getAddr(self): return self.addr def getGid(self): return self.gid def amType(self): return self.am_type def amTypeSet(self, type): self.am_type = type def checkBounds(self, offset, length): if offset < 0 or length <= 0 or offset + length > (self.data_length * 8): raise MessageException("Message.checkBounds: bad offset (%d) or length (%d), for data_length %d" \ % (offset, length, self.data_length)) if offset & 7 != 0: raise MessageException("Cannot deal with bit fields") if length & 7 != 0: raise MessageException("Cannot deal with bit fields") def getUIntElement(self, offset, length, endian): self.checkBounds(offset, length) byteOffset = offset >> 3 bitOffset = offset & 7 if (endian): endian = ">" else: endian = "<" temp = self.data[byteOffset:byteOffset + (length >> 3)] if length == 8: return struct.unpack("B", temp)[0] elif length == 16: return struct.unpack(endian + "H", temp)[0] elif length == 32: return struct.unpack(endian + "L", temp)[0] else: raise MessageException("Bad length") def setUIntElement(self, offset, length, val, endian): self.checkBounds(offset, length) byteOffset = offset >> 3 bitOffset = offset & 7 if (endian): endian = ">" else: endian = "<" if length == 8: temp = struct.pack(endian + "B", val) elif length == 16: temp = struct.pack(endian + "H", val) elif length == 32: temp = struct.pack(endian + "L", val) else: raise MessageException("Bad length") self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):] def getSIntElement(self, offset, length, endian): self.checkBounds(offset, length) byteOffset = offset >> 3 bitOffset = offset & 7 if (endian): endian = ">" else: endian = "<" temp = self.data[byteOffset:byteOffset + (length >> 3)] if length == 8: return struct.unpack(endian + "b", temp)[0] elif length == 16: return struct.unpack(endian + "h", temp)[0] elif length == 32: return struct.unpack(endian + "l", temp)[0] else: raise MessageException("Bad length") def setSIntElement(self, offset, length, val, endian): self.checkBounds(offset, length) byteOffset = offset >> 3 bitOffset = offset & 7 if (endian): endian = ">" else: endian = "<" if length == 8: temp = struct.pack(endian + "b", val) elif length == 16: temp = struct.pack(endian + "h", val) elif length == 32: temp = struct.pack(endian + "l", val) else: raise MessageException("Bad length") self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):] def getFloatElement(self, offset, length, endian): self.checkBounds(offset, length) byteOffset = offset >> 3 bitOffset = offset & 7 if (endian): endian = ">" else: endian = "<" temp = self.data[byteOffset:byteOffset + (length >> 3)] return struct.unpack(endian + "f", temp)[0] def setFloatElement(self, offset, length, value, endian): self.checkBounds(offset, length) byteOffset = offset >> 3 bitOffset = offset & 7 if (endian): endian = ">" else: endian = "<" temp = struct.pack(endian + "f", value) self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):] tinyos-2.1.2+dfsg/support/sdk/python/tinyos/message/MoteIF.py000066400000000000000000000126601207233610700242520ustar00rootroot00000000000000# # Copyright (c) 2005-2006 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # Tinyos-2: Stephen Dawson-Haggerty import os import re import struct import sys import traceback from tinyos.utils.Watcher import Watcher from tinyos.packet.Serial import Serial from tinyos.message.SerialPacket import SerialPacket import tinyos.packet.PacketDispatcher import tinyos.packet.PacketSource import tinyos.packet.SFSource try: import tinyos.packet.SerialSource except: tinyos.packet.SerialSource = None DEBUG = False class MoteIFException(Exception): def __init__(self, *args): self.args = args class MoteIF: def __init__(self): self.listeners = {} self.watcher = Watcher.getInstance() def addListener(self, listener, msgClass): if listener not in self.listeners: self.listeners[listener] = {} amTypes = self.listeners[listener] amTypes[msgClass.get_amType()] = msgClass def removeListener(self, listener): del self.listeners[listener] def dispatchPacket(self, source, packet): #try: #print "Packet length: ", len(packet) # print "Dispatching from MoteIF" # for i in packet: # print ord(i)," ", # print try: # Message.py ignores base_offset, so we'll just chop off # the first byte (the SERIAL_AMTYPE) here. serial_pkt = SerialPacket(packet[1:], data_length=len(packet)-1) except: traceback.print_exc() try: data_start = serial_pkt.offset_data(0) + 1 data_end = data_start + serial_pkt.get_header_length() data = packet[data_start:data_end] amType = serial_pkt.get_header_type() except Exception, x: print >>sys.stderr, x print >>sys.stderr, traceback.print_tb(sys.exc_info()[2]) for l in self.listeners: amTypes = self.listeners[l] if amType in amTypes: try: msgClass = amTypes[amType] msg = msgClass(data=data, data_length = len(data), addr=serial_pkt.get_header_src(), gid=serial_pkt.get_header_group()) l.receive(source, msg) except Exception, x: print >>sys.stderr, x print >>sys.stderr, traceback.print_tb(sys.exc_info()[2]) def sendMsg(self, dest, addr, amType, group, msg): try: payload = msg.dataGet() msg = SerialPacket(None) msg.set_header_dest(int(addr)) msg.set_header_group(int(group)) msg.set_header_type(int(amType)) msg.set_header_length(len(payload)) # from tinyos.packet.Serial data = chr(Serial.TOS_SERIAL_ACTIVE_MESSAGE_ID) data += msg.dataGet()[0:msg.offset_data(0)] data += payload dest.writePacket(data) except Exception, x: print >>sys.stderr, x print >>sys.stderr, traceback.print_tb(sys.exc_info()[2]) def addSource(self, name=None): if name == None: name = os.environ.get("MOTECOM", "sf@localhost:9002") m = re.match(r'([^@]*)@(.*)', name) if m == None: raise MoteIFException("base source '%s'" % (name)) (sourceType, args) = m.groups() if sourceType == "sf": source = tinyos.packet.SFSource.SFSource(self, args) elif sourceType == "serial" and tinyos.packet.SerialSource != None: source = tinyos.packet.SerialSource.SerialSource(self, args) else: raise MoteIFException("bad source") source.start() return source def finishAll(self): tinyos.packet.PacketSource.finishAll() tinyos-2.1.2+dfsg/support/sdk/python/tinyos/message/SerialPacket.py000066400000000000000000000254621207233610700255020ustar00rootroot00000000000000# # This class is automatically generated by mig. DO NOT EDIT THIS FILE. # This class implements a Python interface to the 'SerialPacket' # message type. # import tinyos.message.Message # The default size of this message type in bytes. DEFAULT_MESSAGE_SIZE = 7 # The Active Message type associated with this message. AM_TYPE = -1 class SerialPacket(tinyos.message.Message.Message): # Create a new SerialPacket of size 7. def __init__(self, data="", addr=None, gid=None, base_offset=0, data_length=7): tinyos.message.Message.Message.__init__(self, data, addr, gid, base_offset, data_length) self.amTypeSet(AM_TYPE) # Get AM_TYPE def get_amType(cls): return AM_TYPE get_amType = classmethod(get_amType) # # Return a String representation of this message. Includes the # message type name and the non-indexed field values. # def __str__(self): s = "Message \n" try: s += " [header.dest=0x%x]\n" % (self.get_header_dest()) except: pass try: s += " [header.src=0x%x]\n" % (self.get_header_src()) except: pass try: s += " [header.length=0x%x]\n" % (self.get_header_length()) except: pass try: s += " [header.group=0x%x]\n" % (self.get_header_group()) except: pass try: s += " [header.type=0x%x]\n" % (self.get_header_type()) except: pass try: pass except: pass return s # Message-type-specific access methods appear below. # # Accessor methods for field: header.dest # Field type: int # Offset (bits): 0 # Size (bits): 16 # # # Return whether the field 'header.dest' is signed (False). # def isSigned_header_dest(self): return False # # Return whether the field 'header.dest' is an array (False). # def isArray_header_dest(self): return False # # Return the offset (in bytes) of the field 'header.dest' # def offset_header_dest(self): return (0 / 8) # # Return the offset (in bits) of the field 'header.dest' # def offsetBits_header_dest(self): return 0 # # Return the value (as a int) of the field 'header.dest' # def get_header_dest(self): return self.getUIntElement(self.offsetBits_header_dest(), 16, 1) # # Set the value of the field 'header.dest' # def set_header_dest(self, value): self.setUIntElement(self.offsetBits_header_dest(), 16, value, 1) # # Return the size, in bytes, of the field 'header.dest' # def size_header_dest(self): return (16 / 8) # # Return the size, in bits, of the field 'header.dest' # def sizeBits_header_dest(self): return 16 # # Accessor methods for field: header.src # Field type: int # Offset (bits): 16 # Size (bits): 16 # # # Return whether the field 'header.src' is signed (False). # def isSigned_header_src(self): return False # # Return whether the field 'header.src' is an array (False). # def isArray_header_src(self): return False # # Return the offset (in bytes) of the field 'header.src' # def offset_header_src(self): return (16 / 8) # # Return the offset (in bits) of the field 'header.src' # def offsetBits_header_src(self): return 16 # # Return the value (as a int) of the field 'header.src' # def get_header_src(self): return self.getUIntElement(self.offsetBits_header_src(), 16, 1) # # Set the value of the field 'header.src' # def set_header_src(self, value): self.setUIntElement(self.offsetBits_header_src(), 16, value, 1) # # Return the size, in bytes, of the field 'header.src' # def size_header_src(self): return (16 / 8) # # Return the size, in bits, of the field 'header.src' # def sizeBits_header_src(self): return 16 # # Accessor methods for field: header.length # Field type: short # Offset (bits): 32 # Size (bits): 8 # # # Return whether the field 'header.length' is signed (False). # def isSigned_header_length(self): return False # # Return whether the field 'header.length' is an array (False). # def isArray_header_length(self): return False # # Return the offset (in bytes) of the field 'header.length' # def offset_header_length(self): return (32 / 8) # # Return the offset (in bits) of the field 'header.length' # def offsetBits_header_length(self): return 32 # # Return the value (as a short) of the field 'header.length' # def get_header_length(self): return self.getUIntElement(self.offsetBits_header_length(), 8, 1) # # Set the value of the field 'header.length' # def set_header_length(self, value): self.setUIntElement(self.offsetBits_header_length(), 8, value, 1) # # Return the size, in bytes, of the field 'header.length' # def size_header_length(self): return (8 / 8) # # Return the size, in bits, of the field 'header.length' # def sizeBits_header_length(self): return 8 # # Accessor methods for field: header.group # Field type: short # Offset (bits): 40 # Size (bits): 8 # # # Return whether the field 'header.group' is signed (False). # def isSigned_header_group(self): return False # # Return whether the field 'header.group' is an array (False). # def isArray_header_group(self): return False # # Return the offset (in bytes) of the field 'header.group' # def offset_header_group(self): return (40 / 8) # # Return the offset (in bits) of the field 'header.group' # def offsetBits_header_group(self): return 40 # # Return the value (as a short) of the field 'header.group' # def get_header_group(self): return self.getUIntElement(self.offsetBits_header_group(), 8, 1) # # Set the value of the field 'header.group' # def set_header_group(self, value): self.setUIntElement(self.offsetBits_header_group(), 8, value, 1) # # Return the size, in bytes, of the field 'header.group' # def size_header_group(self): return (8 / 8) # # Return the size, in bits, of the field 'header.group' # def sizeBits_header_group(self): return 8 # # Accessor methods for field: header.type # Field type: short # Offset (bits): 48 # Size (bits): 8 # # # Return whether the field 'header.type' is signed (False). # def isSigned_header_type(self): return False # # Return whether the field 'header.type' is an array (False). # def isArray_header_type(self): return False # # Return the offset (in bytes) of the field 'header.type' # def offset_header_type(self): return (48 / 8) # # Return the offset (in bits) of the field 'header.type' # def offsetBits_header_type(self): return 48 # # Return the value (as a short) of the field 'header.type' # def get_header_type(self): return self.getUIntElement(self.offsetBits_header_type(), 8, 1) # # Set the value of the field 'header.type' # def set_header_type(self, value): self.setUIntElement(self.offsetBits_header_type(), 8, value, 1) # # Return the size, in bytes, of the field 'header.type' # def size_header_type(self): return (8 / 8) # # Return the size, in bits, of the field 'header.type' # def sizeBits_header_type(self): return 8 # # Accessor methods for field: data # Field type: short[] # Offset (bits): 56 # Size of each element (bits): 8 # # # Return whether the field 'data' is signed (False). # def isSigned_data(self): return False # # Return whether the field 'data' is an array (True). # def isArray_data(self): return True # # Return the offset (in bytes) of the field 'data' # def offset_data(self, index1): offset = 56 if index1 < 0: raise IndexError offset += 0 + index1 * 8 return (offset / 8) # # Return the offset (in bits) of the field 'data' # def offsetBits_data(self, index1): offset = 56 if index1 < 0: raise IndexError offset += 0 + index1 * 8 return offset # # Return the entire array 'data' as a short[] # def get_data(self): raise IndexError # # Set the contents of the array 'data' from the given short[] # def set_data(self, value): for index0 in range(0, len(value)): self.setElement_data(index0, value[index0]) # # Return an element (as a short) of the array 'data' # def getElement_data(self, index1): return self.getUIntElement(self.offsetBits_data(index1), 8, 1) # # Set an element of the array 'data' # def setElement_data(self, index1, value): self.setUIntElement(self.offsetBits_data(index1), 8, value, 1) # # Return the size, in bytes, of each element of the array 'data' # def elementSize_data(self): return (8 / 8) # # Return the size, in bits, of each element of the array 'data' # def elementSizeBits_data(self): return 8 # # Return the number of dimensions in the array 'data' # def numDimensions_data(self): return 1 # # Return the number of elements in the array 'data' # for the given dimension. # def numElements_data(self, dimension): array_dims = [ 0, ] if dimension < 0 or dimension >= 1: raise IndexException if array_dims[dimension] == 0: raise IndexError return array_dims[dimension] # # Fill in the array 'data' with a String # def setString_data(self, s): l = len(s) for i in range(0, l): self.setElement_data(i, ord(s[i])); self.setElement_data(l, 0) #null terminate # # Read the array 'data' as a String # def getString_data(self): carr = ""; for i in range(0, 4000): if self.getElement_data(i) == chr(0): break carr += self.getElement_data(i) return carr tinyos-2.1.2+dfsg/support/sdk/python/tinyos/message/__init__.py000066400000000000000000000031671207233610700246700ustar00rootroot00000000000000# # Copyright (c) 2005 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # __all__ = ["Message", "MoteIF", "SerialPacket"] tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/000077500000000000000000000000001207233610700223735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/IO.py000066400000000000000000000037001207233610700232540ustar00rootroot00000000000000# # Copyright (c) 2005 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # class IODone(Exception): pass class IO: def __init__(self): self.done = False def isDone(self): return self.done def cancel(self): self.done = True def open(self): pass def close(self): pass def read(self, count): pass def write(self, data): pass def flush(self): pass tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/Makefile000066400000000000000000000002441207233610700240330ustar00rootroot00000000000000# Makefile for tools/java/net/tinyos/packet SERIAL_H = $(TOSDIR)/lib/serial/Serial.h Serial.py: ncg -o $@ -python-classname=Serial python $(SERIAL_H) Serial.h tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/PacketDispatcher.py000066400000000000000000000046001207233610700261630ustar00rootroot00000000000000# # Copyright (c) 2005 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # import struct class PacketDispatcher: def __init__(self): self.listeners = {} def addListener(self, listener, msgClass): if listener not in self.listeners: self.listeners[listener] = {} amTypes = self.listeners[listener] amTypes[msgClass.get_amType()] = msgClass def removeListener(self, listener): del self.listeners[listener] def dispatchPacket(self, source, packet): (addr, amType, group, length) = struct.unpack(" # import signal import sys import traceback from IO import * from ThreadTask import * DEBUG = False runner = ThreadTaskRunner() def finishAll(): global runner runner.cancelAll() runner.finish() class PacketSourceException(Exception): def __init__(self, *args): self.args = args class PacketSource(ThreadTask): def __init__(self, dispatcher): global runner ThreadTask.__init__(self, runner) self.dispatcher = dispatcher def __call__(self): try: self.open() except Exception, x: if DEBUG: print "Exception while opening packet source:" print x print traceback.print_tb(sys.exc_info()[2]) self.done = True except: if DEBUG: print "Unknown exception while opening packet source" self.done = True while not self.isDone(): try: packet = self.readPacket() except IODone: if DEBUG: print "IO finished" break except Exception, x: if DEBUG: print "IO exception:" print x print traceback.print_tb(sys.exc_info()[2]) break except: if DEBUG: print "Unknown IO exception" break if packet: try: # print "About to run packet dispatcher!" # for i in packet: # print ord(i)," ", # print self.dispatcher.dispatchPacket(self, packet) except Exception, x: if DEBUG: print "Exception when dispatching packet:" print x print traceback.print_tb(sys.exc_info()[2]) # break except: if DEBUG: print "Unknown exception when dispatching packet" # break try: self.close() except: pass self.finish() def start(self): global runner runner.start(self) def open(self): pass def close(self): pass def readPacket(self): return None def writePacket(self, packet): pass tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/Platform.py000066400000000000000000000057421207233610700245410ustar00rootroot00000000000000# # Copyright (c) 2006 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # import re import socket import sys import traceback DEBUG = False PLATFORMS = {"mica": ("avrmote", 1, 19200), "mica2dot": ("avrmote", 1, 19200), "mica2": ("avrmote", 1, 57600), "telos": ("telos", 2, 57600), "tmote": ("telos", 2, 57600), "micaz": ("avrmote", 3, 57600), "eyes": ("eyes", 4, 19200)} ID_AVRMOTE = 1 ID_TELOS = 2 ID_MICAZ = 3 ID_EYES = 4 DEFAULT_BAUD = 19200 class UnknownPlatform(Exception): pass def baud_from_name(name): try: return PLATFORMS[name][2] except: raise UnknownPlatform() def default_factory(): return factory_from_platform("avrmote") def factory_from_name(name): try: return factory_from_platform(PLATFORMS[name][0]) except: raise UnknownPlatform() def factory_from_id(i): if i == ID_AVRMOTE: return factory_from_platform("avrmote") elif i == ID_TELOS: return factory_from_platform("telos") elif i == ID_MICAZ: return factory_from_platform("avrmote") else: raise UnknownPlatform() def factory_from_platform(platform): try: mod = __import__("tinyos.packet.%s" % platform) return mod.packet.__dict__[platform].TOS_Msg except Exception, x: if DEBUG: print >>sys.stderr, x print >>sys.stderr, traceback.print_tb(sys.exc_info()[2]) raise UnknownPlatform() tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/SFProtocol.py000066400000000000000000000054501207233610700250030ustar00rootroot00000000000000# # Copyright (c) 2005-2006 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # VERSION = "U" SUBVERSION = " " PLATFORM_UNKNOWN = 0 class SFProtocolException(Exception): def __init__(self, *args): self.args = args class SFProtocol: def __init__(self, ins, outs): self.ins = ins self.outs = outs self.platform = None def open(self): self.outs.write(VERSION + SUBVERSION) partner = self.ins.read(2) if partner[0] != VERSION: print "SFProtocol : version error" raise SFProtocolException("protocol version error") # Actual version is min received vs our version # ourversion = partner[1] & 0xff if self.platform == None: self.platform = PLATFORM_UNKNOWN # In tinyox-1.x, we then exchanged platform information # the tinyos-2.x serial forwarder doesn't do that, so the # connection is all set up at this point. def readPacket(self): size = self.ins.read(1) packet = self.ins.read(ord(size)) return packet def writePacket(self, packet): if len(packet) > 255: raise SFProtocolException("packet too long") self.outs.write(chr(len(packet))) self.outs.write(packet) self.outs.flush() tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/SFSource.py000066400000000000000000000046651207233610700244510ustar00rootroot00000000000000# # Copyright (c) 2005-2006 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # import re import socket from PacketSource import * from Platform import * from SFProtocol import * from SocketIO import * class SFSource(PacketSource): def __init__(self, dispatcher, args): PacketSource.__init__(self, dispatcher) m = re.match(r'(.*):(.*)', args) if m == None: raise PacketSourceException("bad arguments") (host, port) = m.groups() port = int(port) self.io = SocketIO(host, port) self.prot = SFProtocol(self.io, self.io) def cancel(self): self.done = True self.io.cancel() def open(self): self.io.open() self.prot.open() PacketSource.open(self) def close(self): self.io.close() def readPacket(self): return self.prot.readPacket() def writePacket(self, packet): self.prot.writePacket(packet) tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/Serial.py000066400000000000000000000007761207233610700241760ustar00rootroot00000000000000 # # This class is automatically generated by ncg. DO NOT EDIT THIS FILE. # This class includes values of some nesC constants from # /opt/tinyos-2.x/tos/lib/serial/Serial.h. #/ class Serial: HDLC_CTLESC_BYTE = 125 SERIAL_PROTO_ACK = 67 TOS_SERIAL_802_15_4_ID = 2 SERIAL_PROTO_PACKET_UNKNOWN = 255 SERIAL_PROTO_PACKET_NOACK = 69 TOS_SERIAL_CC1000_ID = 1 HDLC_FLAG_BYTE = 126 TOS_SERIAL_ACTIVE_MESSAGE_ID = 0 SERIAL_PROTO_PACKET_ACK = 68 TOS_SERIAL_UNKNOWN_ID = 255 tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/SocketIO.py000066400000000000000000000053301207233610700244260ustar00rootroot00000000000000# # Copyright (c) 2005 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # import socket from IO import * class SocketIO(IO): def __init__(self, host, port): IO.__init__(self) self.done = False self.host = host self.port = port self.socket = socket.socket(socket.AF_INET, socket.SOCK_STREAM) self.socket.setsockopt(socket.IPPROTO_TCP, socket.TCP_NODELAY, 1) self.socket.settimeout(1) self.socket.bind(("", 0)) def cancel(self): self.done = True def open(self): print "SocketIO: Connecting socket to "+str(self.host)+":"+str(self.port) self.socket.connect((self.host, self.port)) self.socket.settimeout(1) def close(self): self.socket.close() self.socket = None def read(self, count): data = "" while count - len(data) > 0: if self.isDone(): raise IODone() try: data += self.socket.recv(count - len(data)) except: pass return data def write(self, data): return self.socket.send(data) def flush(self): pass tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/ThreadTask.py000066400000000000000000000056061207233610700250060ustar00rootroot00000000000000# # Copyright (c) 2005 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # import threading import time class ThreadTask: def __init__(self, runner): self.done = False self.runner = runner runner.add(self) def isDone(self): return self.done def cancel(self): self.done = True def finish(self): self.runner.remove(self) class ThreadTaskRunner: def __init__(self): self.taskList = [] self.taskListLock = threading.Lock() def add(self, task): self.taskListLock.acquire() self.taskList = [task] + self.taskList self.taskListLock.release() def remove(self, task): self.taskListLock.acquire() self.taskList.remove(task) self.taskListLock.release() def start(self, task): thread = threading.Thread(None, task) thread.start() def cancelAll(self): self.taskListLock.acquire() for t in self.taskList: try: t.cancel() except: pass self.taskListLock.release() def finish(self): try: self.taskListLock.acquire() while len(self.taskList) != 0: self.taskListLock.release() time.sleep(0.2) self.taskListLock.acquire() self.taskListLock.release() except: pass tinyos-2.1.2+dfsg/support/sdk/python/tinyos/packet/__init__.py000066400000000000000000000033371207233610700245120ustar00rootroot00000000000000# # Copyright (c) 2005 # The President and Fellows of Harvard College. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # 3. Neither the name of the University nor the names of its contributors # may be used to endorse or promote products derived from this software # without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # # Author: Geoffrey Mainland # __all__ = ["PacketDispatcher", "PacketSource", "Packetizer", "SFProtocol", "SFSource", "ThreadTask", "avrmote", "micaz", "telos"] tinyos-2.1.2+dfsg/support/sdk/python/tinyos/tossim/000077500000000000000000000000001207233610700224425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/python/tinyos/tossim/TossimApp.py000066400000000000000000000443611207233610700247430ustar00rootroot00000000000000# Copyright (c) 2000-2003 The Regents of the University of California. # Copyright (c) 2005 Stanford University. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # # @author Kamin Whitehouse # @author Philip Levis from tinyos.tossim.TossimNescDecls import * class NescVariables(object) : def __init__( self, applicationName="Unknown App", xmlFilename=None ) : self.applicationName = applicationName self._varNames = [] self._vars = [] dom = minidom.parse(xmlFilename) variableList = [node for node in dom.getElementsByTagName("variables")] while len(variableList) > 0: variables = variableList.pop(0).getElementsByTagName("variable") while len(variables) > 0: cVariable = 0 isArray = 0 variable = variables.pop(0) name = variable.getAttribute("name") component = variable.getElementsByTagName("component-ref") if (len(component) > 0): name = component[0].getAttribute("qname") + "." + name else: # It's in a C file cVariable = 1 fileName = variable.getAttribute("loc") index = fileName.rfind("/") # First check for a UNIX path if (index == -1): index = fileName.rfind("\\") # Then a windows path if (index == -1): index = fileName.rfind(":") # Then if it's in the local dir if (index != -1): fileName = fileName[index+1:] index = fileName.rfind(".") if (index != -1): fileName = fileName[0:index] name = fileName + "." + name varType = "unknown" varTypes = variable.getElementsByTagName("type-float") if (len(varTypes) == 0): varTypes = variable.getElementsByTagName("type-int") if (len(variable.getElementsByTagName("type-array")) > 0): isArray = 1 if (len(varTypes) > 0): varTypeEntry = varTypes[0] varType = varTypeEntry.getAttribute("cname") if (cVariable == 0): self._varNames.append(str(name)) self._vars.append(str(name)) if (isArray): self._vars.append("array") else: self._vars.append("simple") self._vars.append(str(varType)) def __str__(self) : """ Print all available variables.""" string = "\n" name = 1 for val in self._varNames : if (name): string += "\t" + val name = 0 else: string += ": " + val + "\n" name = 1 return string def variables(self): return self._vars class NescTypes( object ) : """A class that holds all types defined in a specific nesc application. usage: myTypes = NescTypes('/path/to/nescDecls.xml') print myTypes var = myTypes.typeName """ def __init__( self, applicationName="Unknown App", xmlFilename = None) : self.applicationName = applicationName self._typeNames = [] self._types = {} #figure out the sizes of all the basic types for this platform (by scanning the xml file) platformTypes = {} typeRE = re.compile('cname=\"([\w\s]+?)\" size=\"I:(\d+?)\"') infile = open(xmlFilename, 'r') for line in infile : match = typeRE.search(line) if match != None: platformTypes[match.groups()[0]] = int(match.groups()[1]) #define all the basic types self.addType( nescType("uint8_t", "unsigned char", "int", "type-int", "B",1,0)) self.addType( nescType("int8_t", "signed char", "int", "type-int", "b", 1, 0)) if (platformTypes.has_key("int") and platformTypes["int"] == 4) or \ (platformTypes.has_key("unsigned int") and platformTypes["unsigned int"] == 4) : self.addType( nescType("uint16_t", "unsigned short", "int", "type-int", "H", 2, 0)) self.addType( nescType("int16_t", "short", "int", "type-int", "h", 2, 0)) self.addType( nescType("uint32_t", "unsigned int", "int", "type-int", "L",4,0)) self.addType( nescType("int32_t", "int", "int", "type-int", "L", 4, 0)) self.addType( nescType("unsigned long", "unsigned long", "int", "type-int", "L",4,0)) self.addType( nescType("long", "long", "int", "type-int", "l", 4, 0)) else : #int is 2 bytes long (the default) self.addType( nescType("unsigned short", "unsigned short", "int", "type-int", "H", 2, 0)) self.addType( nescType("short", "short", "int", "type-int", "h", 2, 0)) self.addType( nescType("uint16_t", "unsigned int", "int", "type-int", "H", 2, 0)) self.addType( nescType("int16_t", "int", "int", "type-int", "h", 2, 0)) self.addType( nescType("uint32_t", "unsigned long", "int", "type-int", "L",4,0)) self.addType( nescType("int32_t", "long", "int", "type-int", "l", 4, 0)) self.addType( nescType("int64_t", "long long", "long", "type-int", "q", 8, 0)) self.addType( nescType("uint64_t", "unsigned long long", "long", "type-int", "Q", 8, 0)) self.addType( nescType("float", "float", "float", "type-float", "f", 4, 0)) if platformTypes.has_key("double") and platformTypes["double"] == 8 : self.addType( nescType("double", "double", "float", "type-float", "d", 8, 0)) else : #double is 4 bytes (the default) self.addType( nescType("double", "double", "float", "type-float", "f", 4, 0)) self.addType( nescType("char", "char", "str", "type-int", "c", 1, '\x00')) self.addType( nescType("void", "void", "", "type-void", "", 0, '')) #some arrays for error reporting: self.unknownStructs = [] self.anonymousStructs = [] self.anonymousRefStructs = [] self.undefinedTypes = [] self.createTypesFromXml(xmlFilename) self._typeNames.sort() #self.printSkippedTypes() def addType(self, value) : if not value.nescType in self._typeNames : self._typeNames.append(value.nescType) self._types[value.nescType] = value #XXX: why does this have to be unconditional?? if not self._types.has_key(value.cType): self._types[value.cType] = value self._typeNames.append(value.cType) def __getattr__(self, name) : if name in self._typeNames : return deepcopy(self._types[name]) else: raise AttributeError("No type \"%s\" defined" % name) def __getitem__(self, key) : if key in self._typeNames : return deepcopy(self._types[key]) else: raise AttributeError("No type \"%s\" defined" % key) def __repr__(self) : return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self)) def __str__(self) : """ Print all available types.""" string = "\n" for t in self._typeNames : string += "\t%s\n" % t return string def createTypesFromXml(self, xmlFilename) : """Go through the struct and typedef elements in the nescDecls.xml file""" dom = minidom.parse(xmlFilename) typeDefs = [node for node in dom.getElementsByTagName("struct")] for node in dom.getElementsByTagName("typedef") : typeDefs.append(node) numSkipped = 0 #keep going through the queue until it is empty while len(typeDefs) > 0: typeDef = typeDefs.pop(0) #if this is a typedef, see if the value is there if typeDef.tagName == "typedef" : value = typeDef.getAttribute("value") name = typeDef.getAttribute("name") #if the real value exists and typedef doesn't already exist, copy and rename original if self._types.has_key(value) : newType = deepcopy(self._types[value]) newType.nescType = name self.addType(newType) numSkipped=0 else : #try again later typeDefs.append(typeDef) numSkipped += 1 else : #if all types within the struct are already defined, it can be defined try : self.addType(nescStruct(self, typeDef ) ) numSkipped=0 except Exception, e: if len(e.args) > 0 and e.args[0] == "Undefined struct": #otherwise, put it back in the queue and move on to the next one typeDefs.append(typeDef) numSkipped += 1 elif len(e.args) > 0 and e.args[0] == "Anonymous struct" : self.anonymousStructs.append(typeDef) elif len(e.args) > 0 and e.args[0] == "Anonymous struct reference" : self.anonymousRefStructs.append( (typeDef, e.args[1]) ) elif len(e.args) > 0 and e.args[0] == "Unknown type" : self.unknownStructs.append( (typeDef, e.args[1]) ) else : #if it's an unknown exception, reraise it raise #make sure we are not cycling endlessly if numSkipped >= len(typeDefs) > 0: self.undefinedTypes = typeDefs break def printSkippedTypes(self): err = "" if len(self.anonymousStructs) >0 : err += "\nWarning: %d structs were anonymous." % len(self.anonymousStructs) # for struc in anonymousStructs : # err += "\t%s\n" % struc.getAttribute("ref") if len(self.anonymousRefStructs) >0 : err += "\nWarning: The following structs referenced anonymous structs:\n" for pair in self.anonymousRefStructs : err += "\t%s\n" % pair[0].getAttribute("name") if len(self.undefinedTypes) >0 : err += "\nWarning: The following types are ill-defined or had circular dependencies:\n" for struc in self.undefinedTypes : err += "\t%s\n" % struc.getAttribute("name") if len(self.unknownStructs) >0 : err += "\nWarning: The following structs had unknown xml types:\n" for pair in self.unknownStructs : err += "\t%s (%s)\n" % (pair[0].getAttribute("name"), pair[1].tagName ) if len(err) > 0 : print err def getTypeFromXML(self, xmlDefinition) : """Find the type name value given an xml definition. If it is an array or pointer, define the new type here.""" #first, see if the tag is type or if child is type if xmlDefinition.tagName.find("type-") < 0 or \ xmlDefinition.tagName.find("type-qualified") >= 0 : foundType = 0 childNodes = [node for node in xmlDefinition.childNodes if node.nodeType == 1] for tag in childNodes : if tag.tagName.find("type-") >= 0 : foundType += 1 typeTag = tag if foundType < 1 : raise Exception("No type tag found") if foundType > 1 : raise Exception("Too many type tags found") else : return self.getTypeFromXML(typeTag) #now check all the existing types to see if it is one of them for val in self._typeNames : typeObj = self._types[val] if typeObj.isType(xmlDefinition) : return deepcopy(typeObj) #if the type doesn't already exist, try creating a new one try : return nescArray(self, xmlDefinition) except Exception, e: if len(e.args) <= 0 or e.args[0] != "Not array definition": raise try : return nescPointer(self, xmlDefinition) except Exception, e: if len(e.args) <= 0 or e.args[0] != "Not pointer definition": raise #it is not a simple type, array, or pointer, #so it must be a yet undefined struct child = getUniqueChild(xmlDefinition) if ( xmlDefinition.tagName == "type-tag" and child != None and child.tagName == "struct-ref" ): if child.hasAttribute("name"): raise Exception("Undefined struct") else : raise Exception("Anonymous struct reference", child) else: #otherwise, raise an exception #(but first make sure the right kind of unknown type is displayed) if xmlDefinition.tagName == "type-tag": xmlDefinition = child raise Exception("Unknown type", xmlDefinition) class NescEnums( object ) : """A class that holds all enums defined in a specific nesc application. usage: myEnums = NescEnums('/path/to/nescDecls.xml') print myEnums var = myEnums.enumName """ def __init__( self, applicationName="Unknown App", xmlFilename = None ) : self.applicationName = applicationName self._enums = [] if type(xmlFilename) == str: xmlFilename = minidom.parse(xmlFilename) self.createEnumsFromXml(xmlFilename) def __getitem__(self, key) : if key in self._enums : return self.__dict__[key] else: raise AttributeError("No such enum defined") def createEnumsFromXml(self, dom) : #now define all the struct types enumDefs = [node for node in dom.getElementsByTagName("enum")] integer = re.compile('^I:(\d+)$') hexidecimal = re.compile('^(0x[\dabcdefABCDEF]+)$') for enumDef in enumDefs : name = enumDef.getAttribute("name") if name in self._enums : continue value = enumDef.getAttribute("value") match = integer.match(value) if match != None : self.__dict__[name] = int(match.groups()[0]) else : match = hexidecimal.match(value) if match != None : self.__dict__[name] = int(match.groups()[0], 16) else : self.__dict__[name] = value self._enums.append(name) namedEnums = [node for node in dom.getElementsByTagName("namedEnum")] for namedEnum in namedEnums : name = namedEnum.getAttribute("name") self.__dict__[name] = NescEnums(namedEnum,name) self._enums.append(name) def __repr__(self) : return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self)) def __str__(self) : """ Print all available enums.""" string = "\n" for key in self._enums : string += "\t%s = %s\n" % (key, str(self[key])) return string class NescMsgs( object ) : """A class that holds all msgs defined in a specific nesc application. It assumes a struct is a message if AM_STRUCTNAME is defined. usage: myMsgs = NescMsgs(myTypes, myEnums[, applicationName]) print myMsgs var = myMsgs.msgName """ def __init__( self, types, enums, applicationName="Unknown App" ) : self.applicationName = applicationName msgTypes = [enum for enum in enums._enums if enum.find("AM_") ==0] name = re.compile("^AM_(\w+)$") self._msgNames = [] self._msgs = {} for msgType in msgTypes : if type(enums[msgType]) == int: msgName = name.match(msgType) if msgName != None : msgName = msgName.groups()[0] for key in types._typeNames : if key.lower() == msgName.lower() : msg = TosMsg(enums[msgType], types[key]) self._msgs[key] = msg self._msgNames.append(key) break def __getattr__(self, name) : if name in self._msgNames : return deepcopy(self._msgs[name]) else: raise AttributeError("No such message defined") def __getitem__(self, key) : if key in self._msgNames : return deepcopy(self._msgs[key]) else: raise AttributeError("No such message defined") def __repr__(self) : return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self)) def __str__(self) : """ Print all available msgs.""" string = "\n" for key in self._msgNames : string += "\t%5d : %s\n" % (self._msgs[key].amType, key) return string class NescApp( object ) : """A class that holds all types, enums, msgs, rpc commands and ram symbol definitions as defined for a specific nesc application. usage: myApp = nescApp('/path/to/nescDecls.xml') print myApp var = myApp.enums.enumName var = myApp.types.typeName """ def __init__( self, applicationName="Unknown App", xmlFile="app.xml" ) : """This function creates the NescEnums, NescTypes, and NescMsgs objects for a particular application.""" #first, import all enums, types, msgs, rpc functions, and ram symbols self.applicationName = applicationName self.xmlFile = xmlFile # Check for the nescDecls.xml file if not os.path.isfile(xmlFile): raise Exception("""\nERROR: cannot find file \"%s\". Your nesC app cannot be imported. Be sure that you compiled with the \"nescDecls\" option.\n\n""" % xmlFile) # Import enums, types, and msgs self.enums = NescEnums(applicationName, xmlFile) self.types = NescTypes(applicationName, xmlFile) self.variables = NescVariables(applicationName, xmlFile) self.messages = NescMsgs(self.types, self.enums, applicationName) def __repr__(self) : return "%s object at %s:\n\n%s" % (self.__class__, hex(id(self)), str(self)) def __str__(self) : """ Print all application declarations.""" string = "%20s : %d\n" % ("Enums", len(self.enums._enums)) string += "%20s : %d\n" % ("Types", len(self.types._types)) string += "%20s : %d\n" % ("Messages", len(self.messages._msgNames)) string += "%20s : %d\n" % ("Variables", len(self.variables._varNames)) return string def configureTossim(self): for var in variables: Mote.var tinyos-2.1.2+dfsg/support/sdk/python/tinyos/tossim/TossimNescDecls.py000066400000000000000000000663271207233610700260740ustar00rootroot00000000000000# Copyright (c) 2000-2003 The Regents of the University of California. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # # @author Kamin Whitehouse # import sys, string, math, re, os from struct import * from xml.dom import minidom from copy import deepcopy ########### # This class can be used to hold a basic nesc type, eg uint8_t It can # be set and get through nescType.value, and does type checking # ########### def findBuildFile(givenString, desiredFilename) : """This function will find a desiredFilename (eg. nescDecls.xml) the build directory from a givenString (e.g 'build/pc'). Legal givenStrings are: 1. Full path, eg: /home/kamin/tinyos-1.x/... 2. relative path, eg: apps/TestRpc/build/pc 3. platform name, eg: pc or telosb """ #check to see if the given string contains the desiredFilename if givenString.find(desiredFilename) >= 0 : filename = givenString #then check to see if it is an absolute or relative path elif givenString.find('/') >= 0 : filename = givenString + desiredFilename #then check to see if it is just the platform name elif len(givenString) > 0: filename = 'build/' + givenString + '/' + desiredFilename #check if a default platform environment variable is defined elif os.environ.has_key("TINYOS_DEFAULT_PLATFORM") : filename = 'build/' + os.environ["TINYOS_DEFAULT_PLATFORM"] + '/' + desiredFilename #otherwise, assume the file is in './' else : filename = desiredFilename #check to see if the file was successfully found if not os.path.isfile(filename) : raise IOError("File %s not found" % filename) return filename class nescType( object ) : """A python representation of a nesc type. usage: X = nescType.value nescType.value = X bytes = nescType.getBytes() nescType.setBytes(bytes) nescType print nescType """ def __init__( self , nescType, cType, pythonType, xmlTag, conversionString, size, defaultValue) : """create a new nescType""" self.nescType = nescType self.cType = cType self.pythonType = pythonType self._xmlTag = xmlTag self.size = size self._conversionString = conversionString self.value = defaultValue def __repr__(self) : return "%s object at %s:\n\n%20s : %s" % (self.__class__, hex(id(self)), "value", str(self)) def __str__(self) : if self._conversionString == "c" : return "'" + str(self.value) + "'" else : return str(self.value) # this func could be used for type checking def __setattr__(self, name, value) : if self.__dict__.has_key("value") and name == "value": #use the type conversions built into pack pack(self._conversionString, value) self.__dict__[name] = value def oneLineStr(self) : return str(self) def __deepcopy__(self, memo={}) : result = nescType(self.nescType, self.cType, self.pythonType, self._xmlTag, self._conversionString, self.size, deepcopy(self.value, memo)) memo[id(self)] = result return result def isType(self, xmlDefinition) : """returns 1 if the xml definition describes this type. Returns 0 otherwise.""" if xmlDefinition != None and xmlDefinition.tagName == self._xmlTag and \ xmlDefinition.hasAttribute("cname") and \ xmlDefinition.getAttribute("cname") == self.cType : return 1 elif self.nescType == "void" and xmlDefinition.tagName == self._xmlTag : #void is a special xml case that doesn't have cname defined (grr) return 1 else : return 0 def getBytes(self) : """Hexidecimal representation of a value of this type""" if self.nescType == "void" : return '' try: bytes = pack(self._conversionString, self.value) except Exception, inst: print inst raise Exception("Bytes conversion error: %s %d bytes to %d" % (self.nescType, len(bytes), self.size) ) if len(bytes) != self.size: raise Exception("Wrong number of bytes for conversion: %s %d bytes to %d" % (self.nescType, len(bytes), self.size)) return bytes def setBytes(self, bytes): """A value of this type from a hexidecimal representation""" if self.nescType == "void" : return bytes if len(bytes) < self.size: raise Exception("Wrong number of bytes for conversion: %s %d bytes to %d" % (self.nescType, len(bytes), self.size)) try: self.value, = unpack( self._conversionString, bytes[:self.size]) except Exception, inst: print inst raise Exception("Bytes conversion error: %s %d bytes to %d" % ( self.nescType, len(bytes), self.size) ) return bytes[self.size:] ########### # Array of basic nesc types, ########### class nescArray( object ) : """A python representation of a nesc array. usage: array = nescArray(size, nescType) array = nescArray(myTypes, xmlDecl) X = array[3] X = array[3:6] (returns a list or, if char[] array, a python string) array[3] = X array[3:6] [X,Y,Z] (or, if char[], \"foo\") bytes = array.getBytes() array.setBytes(bytes) array print array """ def __init__( self , *varargs) : """initialize all elements to 0""" if len(varargs) == 0 : return elif len(varargs) == 2 and type(varargs[0]) == int : (self.len,self.elementType) = varargs[:] bracketStr = "[" + str(self.len) + "]" elif len(varargs) == 2 : (nescTypes, xmlDefinition) = varargs[:] if xmlDefinition.tagName != "type-array" : raise Exception("Not array definition") child = getUniqueChild(xmlDefinition) self.elementType = nescTypes.getTypeFromXML(child) sizeStr = xmlDefinition.getAttribute("elements")[2:] self.len = int(sizeStr) bracketStr = "[" + sizeStr + "]" else : raise Exception("Illegal array params") self.nescType = self.elementType.nescType + bracketStr self.cType = self.elementType.cType + bracketStr self.pythonType = self.elementType.pythonType + bracketStr self.size = self.len * self.elementType.size self.value = [] for i in range(self.len): self.value.append(deepcopy(self.elementType)) def __repr__(self) : """A printable representation of the value""" return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self)) def __str__(self) : """A printable representation of the value""" string = "nescArray of type %s:\n" % self.nescType # if self.elementType._conversionString == "c": # string += self.oneLineStr() # else: for i in range(self.len) : string += "%2d: %s\n" % (i, self.value[i].oneLineStr()) return string def __getitem__(self, key) : if self.elementType.__class__ == nescType : if key.__class__ == slice: if self.elementType._conversionString == "c": string = "" for item in self.value.__getitem__(key) : string += item.value return string else: return [item.value for item in self.value.__getitem__(key)] else: return self.value.__getitem__(key).value else: return self.value.__getitem__(key) def __setitem__(self, key, value) : if self.elementType.__class__ == nescType : if key.__class__ == slice: i=0; for item in self.value.__getitem__(key) : item.value = value[i] i += 1 else: self.value.__getitem__(key).value = value else : self.value.__setitem__(key, value) def __delitem__(self, key) : return self.value.__delitem__(key) def oneLineStr(self) : """A one-line representation of the value""" #maybe the string should just print like a string #but the \x00 chars look like nothing # if self.elementType._conversionString == "c": # string = '\'' # for c in self.value : # string += c.value # string += '\'' # else: tmpStr = str(self.elementType) if tmpStr.find("\n") >= 0 or len(tmpStr) > 5 : return self.nescType else : i = 0; string = "[" while len(string) < 40 and i < self.len : string += str(self.value[i]) + ", " i += 1 if i < self.len : string += "...]" else: string += "\b\b]" return string def __deepcopy__(self, memo={}) : result = nescArray() memo[id(self)] = result result.elementType = deepcopy(self.elementType, memo) result.nescType = self.nescType result.cType = self.cType result.pythonType = self.pythonType result.len = self.len result.size = self.size result.value = deepcopy(self.value, memo) return result def isType(self, xmlDefinition) : """returns 1 if the xml definition describes this type. Returns 0 otherwise.""" if ( xmlDefinition != None and xmlDefinition.tagName == "type-array" and int(xmlDefinition.getAttribute("elements")[2:]) == self.len ) : child = getUniqueChild(xmlDefinition) return self.elementType.isType(child) else : return 0 def getBytes(self) : """Hexidecimal representation of a value of this type""" bytes = "" for i in range(self.len): bytes += self.value[i].getBytes() if len(bytes) != self.size: raise Exception("Byte conversion error: %s %d bytes to %d" % ( self.nescType, len(bytes), self.size)) return bytes def setBytes(self, bytes) : """A value of this type from a hexidecimal representation""" if len(bytes) < self.size: raise Exception("Byte conversion error: %s %d bytes to %d" % (self.nescType, len(bytes), self.size) ) for i in range(self.len) : bytes = self.value[i].setBytes(bytes) return bytes ########### # Pointer to basic nesc types, ########### class nescPointer( object ) : """A python representation of a nesc pointer. usage: pointer = nescPointer(ptrSize, nescType) pointer = nescPointer(myTypes, xmlDecl) nescType = pointer.value pointer.value = nescType bytes = pointer.getBytes() pointer.setBytes(bytes) pointer print pointer """ def __init__( self , *varargs) : """initialize all elements to 0""" if len(varargs) == 0: return elif len(varargs) == 2 and varargs[1].__dict__.has_key("tagName"): (nescTypes, xmlDefinition) = varargs[:] if xmlDefinition.tagName != "type-pointer" : raise Exception("Not pointer definition") child = getUniqueChild(xmlDefinition) self.value = nescTypes.getTypeFromXML(child) self.size = int(xmlDefinition.getAttribute("size")[2:]) elif len(varargs) == 2 : self.size = varargs[0].types["unsigned int"].size self.value = varargs[1] else : raise Exception("Illegal nescPointer constructor arguments") self.nescType = self.value.nescType + "*" self.cType = self.value.cType + "*" self.pythonType = self.value.pythonType + "*" def __repr__(self) : return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self)) def __str__(self) : """A text representation of the value""" return "ptr-> %s" % str(self.value) def oneLineStr(self) : """A one-line representation of the value""" return "ptr-> %s" % self.value.oneLineStr() def __deepcopy__(self, memo={}) : result = nescPointer() memo[id(self)] = result result.value = deepcopy(self.value, memo) result.size = self.size result.nescType = self.nescType result.cType = self.cType result.pythonType = self.pythonType return result def isType(self, xmlDefinition) : """returns 1 if the xml definition describes this type. Returns 0 otherwise.""" if xmlDefinition != None and xmlDefinition.tagName == "type-pointer" : child = getUniqueChild(xmlDefinition) return self.value.isType(child) else : return 0 def getBytes(self) : bytes = pack (str(self.size)+"s",'\x00') if len(bytes) != self.size: raise Exception("Byte conversion error: %s %d bytes to %d" % (self.nescType, len(bytes), self.size) ) return bytes def setBytes(self, bytes) : if len(bytes) < self.size: raise Exception("Byte conversion error: %s %d bytes to %d" % ( self.nescType, len(bytes), self.size) ) return bytes[self.size:] ########### # Struct of basic nesc types, ########### class nescStruct( object ) : """A python representation of a nesc structure. usage: struct = nescStruct(myTypes, xmlDecl) struct = nescStruct(structName, (fieldName, type) (fieldName, type), ...) X = struct.field struct.field = X bytes = struct.getBytes() struct.setBytes(bytes) struct print struct """ def __init__( self, *varargs) : """initialize all fields to 0""" self.__dict__["value"] = {} self.fields = [] self.size = 0 if len(varargs) == 0 : self.nescType = "" #create the struct from nescType args elif len(varargs) >= 1 and ( type(varargs[0]) == str or type(varargs[0]) == unicode ) : self.nescType = varargs[0] self._parseNescTypeFields(varargs[1:]) ## parse the struct def from xml elif len(varargs) == 2 and type(varargs[1]) != tuple : (nescTypes, xmlDefinition) = varargs[:] if xmlDefinition.tagName != "struct" : raise Exception("Not struct definition") if xmlDefinition.hasAttribute("name") == False: raise Exception("Anonymous struct") self.nescType = xmlDefinition.getAttribute("name") if xmlDefinition.getAttribute("size")[2:]: self.size = int(xmlDefinition.getAttribute("size")[2:]) else: self.size = 0 self._parseXMLFields(nescTypes, xmlDefinition) else : raise Exception("Illegal nescStruct constructor args") self.cType = self.nescType self.pythonType = self.nescType self.__initialized = True def __getattr__(self, name) : if self.__dict__.has_key("value") : if self.value.has_key(name) : if self.value[name].__class__ == nescType : return self.value[name].value else : return self.value[name] else : raise AttributeError("No such field \"%s\" in the nescStruct \"%s\"" % (name, self.nescType)) def __setattr__(self, name, value) : if not self.__dict__.has_key("_nescStruct__initialized") : self.__dict__[name] = value return if self.value.has_key(name) : if self.value[name].__class__ == nescType : self.value[name].value = value; else : self.value[name] = value; elif self.__dict__.has_key(name) : self.__dict__[name] = value else : raise AttributeError("No such field \"%s\" in the nescStruct \"%s\"" % (name, self.nescType)) def __repr__(self) : return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self)) def __str__(self) : """All fields and values as a readable string""" string = self.nescType + ": \n" for field in self.fields : string += "%30s : %s\n" % ( "%s %s" % (self.value[field["name"]].nescType, field["name"]), self.value[field["name"]].oneLineStr() ) return string def oneLineStr(self) : """A one-line representation of the struct""" return self.nescType def __deepcopy__(self, memo={}) : result = self.__class__() memo[id(self)] = result self._copyFields(result, memo) return result def _copyFields(self, other, memo=None) : other.size = self.size other.nescType = self.nescType other.cType = self.cType other.pythonType = self.pythonType if memo == None : other.value = deepcopy(self.value) other.fields = deepcopy(self.fields) else : other.value = deepcopy(self.value, memo) other.fields = deepcopy(self.fields, memo) other.__initialized = True def _parseXMLFields(self, nescTypes, xmlDefinition) : """Create a list of fields & values given a struct xml declaration.""" fields = [node for node in xmlDefinition.getElementsByTagName("field")] fields.sort( lambda A, B : int(A.getAttribute("bit-offset")[2:]) - int(B.getAttribute("bit-offset")[2:])) for fieldDef in fields: field = {} field["name"] = fieldDef.getAttribute("name") field["bitOffset"] = int(fieldDef.getAttribute("bit-offset")[2:]) if fieldDef.hasAttribute("bit-size"): field["bitSize"] = int(fieldDef.getAttribute("bit-size")[2:]) elif fieldDef.hasAttribute("size"): field["bitSize"] = int(fieldDef.getAttribute("size")[2:])*8 self.fields.append(field) self.value[fieldDef.getAttribute("name")] = nescTypes.getTypeFromXML(fieldDef) #here's a weird bug in the nesc.xml generation where the "size" attribute #for packed structs is actually the size of the unpacked struct. if xmlDefinition.hasAttribute("packed") : self.size = self.packedSize() elif xmlDefinition.getAttribute("size")[2:]: self.size = int(xmlDefinition.getAttribute("size")[2:]) else: self.size = 0 def _parseNescTypeFields(self, fields) : """Create a list of fields & values given a tuple of fieldname,value sequences.""" self.size = 0 for fieldDef in fields: field = {} (field["name"],fType) = fieldDef field["bitOffset"] = self.size*8 field["bitSize"] = fType.size*8 self.fields.append(field) self.value[field["name"]] = fType self.size += fType.size def isType(self, xmlDefinition) : """returns 1 if the xml definition describes this type. Returns 0 otherwise.""" if xmlDefinition == None : return 0 child = getUniqueChild(xmlDefinition) if ( ( xmlDefinition.tagName == "struct" and xmlDefinition.getAttribute("name") == self.nescType) or ( xmlDefinition.tagName == "type-tag" and child != None and child.tagName == "struct-ref" and child.getAttribute("name") == self.nescType ) ) : return 1 else : return 0 def getBytes(self) : """Hexidecimal representation of struct""" # We have to be careful in here about: # 1. bit fields (ie. bitSize shorter than nominal type size) # 2. packing (ie. bits that are not part of any particular field) bits = "" for field in self.fields : for i in range(len(bits), field["bitOffset"]) : bits += "0" newBits = hex2bin(self.value[field["name"]].getBytes()) bits += newBits[-field["bitSize"]:] #the following loop is just type checking for bit fields. Can we do this on setattr? for i in range(len(newBits)-field["bitSize"]): if newBits[i] == "1": print "Bit-field type error: value of %s.%s being truncated" % (self.nescType, field["name"]) for i in range(len(bits), self.size*8) : bits += "0" bytes = bin2hex(bits) if len(bytes) != self.size: raise Exception("Byte conversion error: %s %d bytes to %d" % ( self.nescType, len(bytes), self.size)) return bytes def setBytes(self, bytes) : """Set all values using hexidecimal representation""" # We have to be careful in here about: # 1. bit fields (ie. bitSize shorter than nominal type size) # 2. packing (ie. bits that are not part of any particular field) if len(bytes) < self.size: raise Exception("Byte conversion error: %s %d bytes to %d" % (self.nescType, len(bytes), self.size) ) bits = hex2bin(bytes) for field in self.fields : newBits = "" for i in range(self.value[field["name"]].size*8) : newBits += "0" selectedBits=bits[field["bitOffset"]:field["bitOffset"]+field["bitSize"]] newBits = newBits[:-field["bitSize"]] + selectedBits newBytes = "" for i in range(self.value[field["name"]].size) : newBytes += '\x00' tmpBytes = bin2hex(newBits) newBytes = newBytes[:-len(tmpBytes)] + tmpBytes self.value[field["name"]].setBytes(newBytes); return bytes[self.size:] def packedSize(self) : if len(self.fields) == 0 : trueSize = 0 else : a,b,lastField = self._findLastNestedField() trueSize = (lastField["bitOffset"] + lastField["bitSize"]) /8 return trueSize def _findLastNestedField(self) : lastField = self parents = [] #find the last (possibly nested) field while issubclass(type(lastField), nescStruct) and len(lastField.fields) > 0 : parent = lastField lastFieldDef = parent.fields[-1] lastField = parent.value[lastFieldDef["name"]] parents.append( parent ) return (lastField, parents, lastFieldDef) class TosMsg ( nescStruct ) : """A python representation of a TosMsg. Is a nescStruct object. Can be used with pytos.comm.send, pytos.comm.register, pytos.comm.unregister. usage: msg = TosMsg(amType) msg = TosMsg(amType, nescStruct) msg = TosMsg(amType, ) print msg msg.field = X comm.send(msg) comm.register(msg, f) comm.unregister(msg, f) migMsg = msg.createMigMsg() msg.parseMigMsg(migMsg) """ def __init__(self, amType, *varargs): self.amType = amType self.parentMsg = None #if this is a nescStruct argument, make myself a clone of it if len(varargs) == 1 and issubclass(type(varargs[0]), nescStruct) : nescStruct._copyFields(varargs[0],self) #otherwise, make myself into a struct with the struct args elif len(varargs) >= 1: nescStruct.__init__(self, *varargs) def __deepcopy__(self, memo={}) : result = self.__class__(self.amType) memo[id(self)] = result self._copyFields(result, memo) result.parentMsg = deepcopy(self.parentMsg, memo) return result def getParentMsg(self, amOrName) : """This function will get the parent message with the amType or name specified""" if self.parentMsg == None : return None elif self.parentMsg.nescType == amOrName or self.parentMsg.amType == amOrName : return self.parentMsg else : return self.parentMsg.getParentMsg(amOrName) def createMigMsg(self) : """Returns a java BaseTOSMsg with same amType and length and with data payload of same bytes""" Message = tinyos.message.Message() msg = Message(self.size) msg.dataSet(unpack( str(self.size) + 'b', self.getBytes() ) ) msg.amTypeSet(self.amType) # msg.set_type( self.amType ) # msg.set_length(self.size) return msg def parseMigMsg(self, msg) : """Takes a java BaseTOSMsg and creates TosMsg with same amType and length and with data payload of same bytes""" self.amType = msg.amType() data = list(msg.dataGet()) self.setBytes(pack(str(len(data)) + 'b', *data)) def __repr__(self) : return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self)) def __str__(self) : """All fields and values as a readable string""" return "TosMsg(am=%d) " % self.amType + nescStruct.__str__(self) def setBytes(self, bytes) : """Extend this msg to be longer, if necessary to accomodate extra data. This only happens if the last field is a nescArray of length 0. Unlike nescStructs, TosMsg objects are not nested recursively, so it is Ok to do this.""" if len(bytes) > self.size : #trueSize() : #print "there are more bytes than fit in this msg... trying to grow msg" lastField, parents,b = self._findLastNestedField() #see if it is an array of size 0 if type(lastField) == nescArray and lastField.len == 0 : #make it bigger #print "last field is nescArray[0]... growing" lastFieldSize = lastField.elementType.size numExtraBytes = len(bytes) - self.size #trueSize() if numExtraBytes % lastFieldSize == 0: requiredArraySize = int( numExtraBytes/lastFieldSize ) lastField = nescArray(requiredArraySize, lastField.elementType) #print "new size is %d" % numExtraBytes #and set it, changing the size of all parent structs parents.reverse() for parent in parents : # trueSize = parent.trueSize() parent.value[parent.fields[-1]["name"]] = lastField parent.fields[-1]["bitSize"] = lastField.size*8 parent.size = self.packedSize()# + lastField.size lastField = parent else: #print "last field is not nescArray[0]. Cannot grow. Ignoring extra data." pass #make sure everything worked out correctly and call parent's function if len(bytes) != self.size :#trueSize() : raise Exception("Incorrect number of bytes for TosMsg. Byte conversion error: %s %d bytes to %d" % ( self.nescType, len(bytes), self.size) ) #print "passing to child to set bytes." nescStruct.setBytes(self,bytes) def getUniqueChild(xmlDefinition) : child = None for childNode in xmlDefinition.childNodes : if childNode.nodeType == 1 : child = childNode break return child def bin2hex(bits) : bytes = "" for i in range(0, len(bits), 8 ): bytes += pack('B',int(bits[i:i+8],2)) return bytes def hex2bin(bytes) : bits = "" for i in range(len(bytes)) : val, = unpack('B',bytes[i]) for j in range(7,-1,-1): if val>= pow(2,j): bits += "1" val -= pow(2,j) else : bits += "0" return bits def TestAppTypes() : testRpc = appTypes('/home/kamin/tinyos-1.x/contrib/hood/apps/TestRpc/build/telosb/nesc.xml') print testRpc if __name__ == "__main__": TestAppTypes() tinyos-2.1.2+dfsg/support/sdk/python/tinyos/tossim/__init__.py000066400000000000000000000031241207233610700245530ustar00rootroot00000000000000# Copyright (c) 2005 Stanford University. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # # Author Philip Levis __all__ = ["TossimApp", "TossimNescDecls"] tinyos-2.1.2+dfsg/support/sdk/python/tinyos/utils/000077500000000000000000000000001207233610700222645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/support/sdk/python/tinyos/utils/Singleton.py000066400000000000000000000235051207233610700246050ustar00rootroot00000000000000# Copyright (c) 2006-2007 Chad Metcalf # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # the rights to use, copy, modify, merge, publish, distribute, sublicense, # and/or sell copies of the Software, and to permit persons to whom the # Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in # all copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. # # Author: Chad Metcalf # """ A Python Singleton mixin class that makes use of some of the ideas found at http://c2.com/cgi/wiki?PythonSingleton. Just inherit from it and you have a singleton. No code is required in subclasses to create singleton behavior -- inheritance from Singleton is all that is needed. Assume S is a class that inherits from Singleton. Useful behaviors are: 1) Getting the singleton: S.getInstance() returns the instance of S. If none exists, it is created. 2) The usual idiom to construct an instance by calling the class, i.e. S() is disabled for the sake of clarity. If it were allowed, a programmer who didn't happen notice the inheritance from Singleton might think he was creating a new instance. So it is felt that it is better to make that clearer by requiring the call of a class method that is defined in Singleton. An attempt to instantiate via S() will restult in an SingletonException being raised. 3) If S.__init__(.) requires parameters, include them in the first call to S.getInstance(.). If subsequent calls have parameters, a SingletonException is raised. 4) As an implementation detail, classes that inherit from Singleton may not have their own __new__ methods. To make sure this requirement is followed, an exception is raised if a Singleton subclass includ es __new__. This happens at subclass instantiation time (by means of the MetaSingleton metaclass. By Gary Robinson, grobinson@transpose.com. No rights reserved -- placed in the public domain -- which is only reasonable considering how much it owes to other people's version which are in the public domain. The idea of using a metaclass came from a comment on Gary's blog (see http://www.garyrobinson.net/2004/03/python_singleto.html#comments). Other improvements came from comments and email from other people who saw it online. (See the blog post and comments for further credits.) Not guaranteed to be fit for any particular purpose. Use at your own risk. """ class SingletonException(Exception): def __init__(self, *args): Exception.__init__(self) self.args = args class MetaSingleton(type): def __new__(metaclass, strName, tupBases, dict): if dict.has_key('__new__'): raise SingletonException, 'Can not override __new__ in a Singleton' return super(MetaSingleton,metaclass).__new__(metaclass, strName, tupBases, dict) def __call__(cls, *lstArgs, **dictArgs): raise SingletonException, 'Singletons may only be instantiated through getInstance()' class Singleton(object): __metaclass__ = MetaSingleton def getInstance(cls, *lstArgs): """ Call this to instantiate an instance or retrieve the existing instance. If the singleton requires args to be instantiated, include them the first time you call getInstance. """ if cls._isInstantiated(): if len(lstArgs) != 0: raise SingletonException, 'If no supplied args, singleton must already be instantiated, or __init__ must require no args' else: if cls._getConstructionArgCountNotCountingSelf() > 0 and len(lstArgs) <= 0: raise SingletonException, 'If the singleton requires __init__ args, supply them on first instantiation' instance = cls.__new__(cls) instance.__init__(*lstArgs) cls.cInstance = instance return cls.cInstance getInstance = classmethod(getInstance) def _isInstantiated(cls): return hasattr(cls, 'cInstance') _isInstantiated = classmethod(_isInstantiated) def _getConstructionArgCountNotCountingSelf(cls): return cls.__init__.im_func.func_code.co_argcount - 1 _getConstructionArgCountNotCountingSelf = classmethod(_getConstructionArgCountNotCountingSelf) def _forgetClassInstanceReferenceForTesting(cls): """ This is designed for convenience in testing -- sometimes you want to get rid of a singleton during test code to see what happens when you call getInstance() under a new situation. To really delete the object, all external references to it also need to be deleted. """ try: delattr(cls,'cInstance') except AttributeError: # run up the chain of base classes until we find the one that has the instance # and then delete it there for baseClass in cls.__bases__: if issubclass(baseClass, Singleton): baseClass._forgetClassInstanceReferenceForTesting() _forgetClassInstanceReferenceForTesting = classmethod(_forgetClassInstanceReferenceForTesting) if __name__ == '__main__': import unittest class PublicInterfaceTest(unittest.TestCase): def testReturnsSameObject(self): """ Demonstrates normal use -- just call getInstance and it returns a singleton instance """ class A(Singleton): def __init__(self): super(A, self).__init__() a1 = A.getInstance() a2 = A.getInstance() self.assertEquals(id(a1), id(a2)) def testInstantiateWithMultiArgConstructor(self): """ If the singleton needs args to construct, include them in the first call to get instances. """ class B(Singleton): def __init__(self, arg1, arg2): super(B, self).__init__() self.arg1 = arg1 self.arg2 = arg2 b1 = B.getInstance('arg1 value', 'arg2 value') b2 = B.getInstance() self.assertEquals(b1.arg1, 'arg1 value') self.assertEquals(b1.arg2, 'arg2 value') self.assertEquals(id(b1), id(b2)) def testTryToInstantiateWithoutNeededArgs(self): class B(Singleton): def __init__(self, arg1, arg2): super(B, self).__init__() self.arg1 = arg1 self.arg2 = arg2 self.assertRaises(SingletonException, B.getInstance) def testTryToInstantiateWithoutGetInstance(self): """ Demonstrates that singletons can ONLY be instantiated through getInstance, as long as they call Singleton.__init__ during construction. If this check is not required, you don't need to call Singleton.__init__(). """ class A(Singleton): def __init__(self): super(A, self).__init__() self.assertRaises(SingletonException, A) def testDontAllowNew(self): def instantiatedAnIllegalClass(): class A(Singleton): def __init__(self): super(A, self).__init__() def __new__(metaclass, strName, tupBases, dict): return super(MetaSingleton,metaclass).__new__(metaclass, strName, tupBases, dict) self.assertRaises(SingletonException, instantiatedAnIllegalClass) def testDontAllowArgsAfterConstruction(self): class B(Singleton): def __init__(self, arg1, arg2): super(B, self).__init__() self.arg1 = arg1 self.arg2 = arg2 b1 = B.getInstance('arg1 value', 'arg2 value') self.assertRaises(SingletonException, B, 'arg1 value', 'arg2 value') def test_forgetClassInstanceReferenceForTesting(self): class A(Singleton): def __init__(self): super(A, self).__init__() class B(A): def __init__(self): super(B, self).__init__() # check that changing the class after forgetting the instance produces # an instance of the new class a = A.getInstance() assert a.__class__.__name__ == 'A' A._forgetClassInstanceReferenceForTesting() b = B.getInstance() assert b.__class__.__name__ == 'B' # check that invoking the 'forget' on a subclass still deletes the instance B._forgetClassInstanceReferenceForTesting() a = A.getInstance() B._forgetClassInstanceReferenceForTesting() b = B.getInstance() assert b.__class__.__name__ == 'B' unittest.main() tinyos-2.1.2+dfsg/support/sdk/python/tinyos/utils/Watcher.py000066400000000000000000000051161207233610700242360ustar00rootroot00000000000000# Copyright (c) 2006-2007 Chad Metcalf # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # the rights to use, copy, modify, merge, publish, distribute, sublicense, # and/or sell copies of the Software, and to permit persons to whom the # Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in # all copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. # # Author: Chad Metcalf # import os import sys import signal from tinyos.utils.Singleton import Singleton class Watcher(Singleton): """ As seen in: http://aspn.activestate.com/ASPN/Cookbook/Python/Recipe/496735 This class solves two problems with multithreaded programs in Python, (1) a signal might be delivered to any thread (which is just a malfeature) and (2) if the thread that gets the signal is waiting, the signal is ignored (which is a bug). The watcher is a concurrent process (not thread) that waits for a signal and the process that contains the threads. See Appendix A of The Little Book of Semaphores. http://greenteapress.com/semaphores/ """ def __init__(self): """ Creates a child thread, which returns. The parent thread waits for a KeyboardInterrupt and then kills the child thread. """ Singleton.__init__(self) self.child = os.fork() if self.child != 0: self.watch() def watch(self): try: os.wait() except KeyboardInterrupt: # I put the capital B in KeyBoardInterrupt so I can # tell when the Watcher gets the SIGINT print 'KeyBoardInterrupt' self.kill() sys.exit() def kill(self): try: os.kill(self.child, signal.SIGKILL) except OSError, x: print "os.kill failed" print xtinyos-2.1.2+dfsg/support/sdk/python/tinyos/utils/__init__.py000066400000000000000000000022671207233610700244040ustar00rootroot00000000000000# Copyright (c) 2006-2007 Chad Metcalf # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # the rights to use, copy, modify, merge, publish, distribute, sublicense, # and/or sell copies of the Software, and to permit persons to whom the # Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in # all copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE # SOFTWARE. # # Author: Chad Metcalf # __all__ = ["Singleton", "Watcher"] tinyos-2.1.2+dfsg/support/sdk/python/tos.py000066400000000000000000000577401207233610700207730ustar00rootroot00000000000000# Copyright (c) 2008 Johns Hopkins University. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # @author Razvan Musaloiu-E. # @author David Purdy """ A library that implements the T2 serial communication. This library has two parts: one that deals with sending and receiving packets using the serial format from T2 (TEP113) and a second one that tries to simplifies the work with arbitrary packets. """ import sys, struct, time, socket, operator, os import traceback try: import serial except ImportError, e: print "Please install PySerial first." sys.exit(1) __version__ = "$Id: tos.py,v 1.12 2010-06-29 22:07:42 scipio Exp $" __all__ = ['Serial', 'AM', 'Packet', 'RawPacket', 'AckFrame', 'DataFrame', 'NoAckDataFrame', 'ActiveMessage'] HDLC_FLAG_BYTE = 0x7e HDLC_CTLESC_BYTE = 0x7d TOS_SERIAL_ACTIVE_MESSAGE_ID = 0 TOS_SERIAL_CC1000_ID = 1 TOS_SERIAL_802_15_4_ID = 2 TOS_SERIAL_UNKNOWN_ID = 255 SERIAL_PROTO_ACK = 67 SERIAL_PROTO_PACKET_ACK = 68 SERIAL_PROTO_PACKET_NOACK = 69 SERIAL_PROTO_PACKET_UNKNOWN = 255 def list2hex(v): return " ".join(["%02x" % p for p in v]) class Timeout(Exception): pass def getSource(comm): source = comm.split('@') params = source[1].split(':') debug = '--debug' in sys.argv if source[0] == 'serial': try: return Serial(params[0], int(params[1]), flush=True, debug=debug) except: print "ERROR: Unable to initialize a serial connection to", comm raise Exception elif source[0] == 'network': try: return SerialMIB600(params[0], int(params[1]), debug=debug) except: print "ERROR: Unable to initialize a network connection to", comm print "ERROR:", traceback.format_exc() raise Exception raise Exception class Serial: def __init__(self, port, baudrate, flush=False, debug=False, readTimeout=None, ackTimeout=0.02): self.debug = debug self.readTimeout = readTimeout self.ackTimeout = ackTimeout self._ts = None if port.startswith('COM') or port.startswith('com'): port = int(port[3:]) - 1 elif port.isdigit(): port = int(port) - 1 self._s = serial.Serial(port, int(baudrate), rtscts=0, timeout=0.5) self._s.flushInput() if flush: print >>sys.stdout, "Flushing the serial port", endtime = time.time() + 1 while time.time() < endtime: self._s.read() sys.stdout.write(".") if not self.debug: sys.stdout.write("\n") self._s.close() self._s = serial.Serial(port, baudrate, rtscts=0, timeout=readTimeout) def getByte(self): c = self._s.read() if c == '': raise Timeout #print 'Serial:getByte: 0x%02x' % ord(c) return ord(c) def putBytes(self, data): #print "DEBUG: putBytes:", data for b in data: self._s.write(struct.pack('B', b)) time.sleep(0.000001) def getTimeout(self): return self._s.timeout def setTimeout(self, timeout): self._s.timeout = timeout class SerialMIB600: def __init__(self, host, port=10002, debug=False, readTimeout=None, ackTimeout=0.5): self.debug = debug self.readTimeout = readTimeout self.ackTimeout = ackTimeout self._ts = None self._s = socket.socket(socket.AF_INET, socket.SOCK_STREAM) self._s.connect((host, port)) print "Connected" def getByte(self): try: c = self._s.recv(1) except socket.timeout: c = '' if c == '': raise Timeout #print 'Serial:getByte: 0x%02x' % ord(c) return ord(c) def putBytes(self, data): #print "DEBUG: putBytes:", data for b in data: self._s.send(struct.pack('B', b)) def getTimeout(self): return self._s.gettimeout() def setTimeout(self, timeout): self._s.settimeout(timeout) class HDLC: """ An HDLC object offers a way to send and receive data on a byte source using a HDLC-like formating. """ def __init__(self, source): self._s = source # Returns the next incoming serial packet def read(self, timeout=None): """Wait for a packet and return it as a RawPacket.""" # Developer notes: # # Packet data read is in this format: # [HDLC_FLAG_BYTE][Escaped data][HDLC_FLAG_BYTE] # # [Escaped data] is encoded so that [HDLC_FLAG_BYTE] byte # values cannot occur within it. When [Escaped data] has been # unescaped, the last 2 bytes are a 16-bit CRC of the earlier # part of the packet (excluding the initial HDLC_FLAG_BYTE # byte) # # It's also possible that the serial device was half-way # through transmitting a packet when this function was called # (app was just started). So we also neeed to handle this # case: # # [Incomplete escaped data][HDLC_FLAG_BYTE][HDLC_FLAG_BYTE][Escaped data][HDLC_FLAG_BYTE] # # In this case we skip over the first (incomplete) packet. # if self._s.getTimeout() != timeout and timeout != None: self.log("Set the timeout to %s, previous one was %s" % (timeout, self._s.getTimeout())) self._s.setTimeout(timeout) # +--- FLAG -----+ # | | ___________ # v | / | # >(1)-- !FLAG -->(2)<-- !FLAG --+ # | # FLAG # | ___________ # v / | # (3)<-- FLAG ---+ # | # !FLAG # | ___________ # v / | # (4)<-- !FLAG --+ # | # FLAG # | # v # (5) try: # Read bytes until we get to a HDLC_FLAG_BYTE value # (either the end of a packet, or the start of a new one) d = self._s.getByte() ts = time.time() if d != HDLC_FLAG_BYTE: self.log("Skipping byte %d" % d) while d != HDLC_FLAG_BYTE: d = self._s.getByte() self.log("Skipping byte %d" % d) ts = time.time() # Store HDLC_FLAG_BYTE at the start of the retrieved packet # data: packet = [d] # Is the next byte also HDLC_FLAG_BYTE? d = self._s.getByte() while d == HDLC_FLAG_BYTE: d = self._s.getByte() ts = time.time() # We are now on the 2nd byte of the packet. Add it to # our retrieved packet data: packet.append(d) # Read bytes from serial until we read another HDLC_FLAG_BYTE # value (end of the current packet): while d != HDLC_FLAG_BYTE: d = self._s.getByte() packet.append(d) # Done reading a whole packet from serial self.log("SimpleSerial:_read: unescaped %s" % packet) # Decode the packet, and check CRC: packet = self._unescape(packet) crc = self._crc16(0, packet[1:-3]) packet_crc = self._decode(packet[-3:-1]) if crc != packet_crc: print "Warning: wrong CRC! %x != %x %s" % (crc, packet_crc, ["%2x" % i for i in packet]) if not self._s._ts: self._s._ts = ts self.log("Serial:_read: %.4f (%.4f) Recv: %s" % (ts, ts - self._s._ts, self._format(packet[1:-3]))) self._ts = ts # Packet was successfully retrieved, so return it in a # RawPacket wrapper object (but leave out the HDLC_FLAG_BYTE # and CRC bytes) return RawPacket(ts, packet[1:-3]) except Timeout: return None def write(self, payload, seqno): """ Write a packet. If the payload argument is a list, it is assumed to be exactly the payload. Otherwise the payload is assume to be a Packet and the real payload is obtain by calling the .payload(). """ if isinstance(payload, Packet): payload = payload.payload() packet = DataFrame(); # We need to always request for acks packet.protocol = SERIAL_PROTO_PACKET_ACK packet.seqno = seqno packet.dispatch = 0 packet.data = payload packet = packet.payload() crc = self._crc16(0, packet) packet.append(crc & 0xff) packet.append((crc >> 8) & 0xff) packet = [HDLC_FLAG_BYTE] + self._escape(packet) + [HDLC_FLAG_BYTE] self.log("Serial: write %s" % packet) self._s.putBytes(packet) def _format(self, payload): f = NoAckDataFrame(payload) if f.protocol == SERIAL_PROTO_ACK: rpacket = AckFrame(payload) return "Ack seqno: %d" % (rpacket.seqno) else: rpacket = ActiveMessage(f.data) return "D: %04x S: %04x L: %02x G: %02x T: %02x | %s" % \ (rpacket.destination, rpacket.source, rpacket.length, rpacket.group, rpacket.type, list2hex(rpacket.data)) def _crc16(self, base_crc, frame_data): crc = base_crc for b in frame_data: crc = crc ^ (b << 8) for i in range(0, 8): if crc & 0x8000 == 0x8000: crc = (crc << 1) ^ 0x1021 else: crc = crc << 1 crc = crc & 0xffff return crc def _encode(self, val, dim): output = [] for i in range(dim): output.append(val & 0xFF) val = val >> 8 return output def _decode(self, v): r = long(0) for i in v[::-1]: r = (r << 8) + i return r def _unescape(self, packet): r = [] esc = False for b in packet: if esc: r.append(b ^ 0x20) esc = False elif b == HDLC_CTLESC_BYTE: esc = True else: r.append(b) return r def _escape(self, packet): r = [] for b in packet: if b == HDLC_FLAG_BYTE or b == HDLC_CTLESC_BYTE: r.append(HDLC_CTLESC_BYTE) r.append(b ^ 0x20) else: r.append(b) return r def log(self, s): if self._s.debug: print s class SimpleAM(object): def __init__(self, source, oobHook=None): self._source = source self._hdlc = HDLC(source) self.seqno = 0 self.oobHook = oobHook def read(self, timeout=None): f = self._hdlc.read(timeout) if f: return ActiveMessage(NoAckDataFrame(f)) return None def write(self, packet, amId, timeout=5, blocking=True, inc=1): self.seqno = (self.seqno + inc) % 256 prevTimeout = self._source.getTimeout() ack = None end = None if timeout: end = time.time() + timeout while not end or time.time() < end: self._hdlc.write(ActiveMessage(packet, amId=amId), seqno=self.seqno) if not blocking: return True start = time.time() f = self._hdlc.read(self._source.ackTimeout) if f == None: #print "Ack Timeout!" continue ack = AckFrame(f) while ack.protocol != SERIAL_PROTO_ACK and (not end or time.time() < end): if self.oobHook: self.oobHook(ActiveMessage(NoAckDataFrame(f))) else: print 'SimpleAM:write: skip', ack, f f = self._hdlc.read(self._source.ackTimeout) if f == None: #print "Ack Timeout!" break ack = AckFrame(f) if f != None: break self._source.setTimeout(prevTimeout) #print 'SimpleAM:write: got an ack:', ack, ack.seqno == self.seqno return (ack != None and ack.seqno == self.seqno) def setOobHook(self, oobHook): self.oobHook = oobHook def printfHook(packet): if packet == None: return if packet.type == 100: s = "".join([chr(i) for i in packet.data]).strip('\0') lines = s.split('\n') for line in lines: if line: print "PRINTF:", line packet = None # No further processing for the printf packet return packet class AM(SimpleAM): def __init__(self, s=None, oobHook=None): if s == None: try: s = getSource(sys.argv[1]) except: try: for (i, j) in zip(sys.argv[1::2], sys.argv[2::2]): if i == '-comm': s = getSource(j) if s == None: raise Exception except: try: s = getSource(os.environ['MOTECOM']) except: print "ERROR: Please indicate a way to connect to the mote" sys.exit(-1) if oobHook == None: oobHook = printfHook super(AM, self).__init__(s, oobHook) def read(self, timeout=None): return self.oobHook(super(AM, self).read(timeout)) def write(self, packet, amId, timeout=None, blocking=True): r = super(AM, self).write(packet, amId, timeout, blocking) while not r: r = super(AM, self).write(packet, amId, timeout, blocking, inc=0) if timeout and not r: raise Timeout return True # class SFClient: # def __init__(self, host, port, qsize=10): # self._in_queue = Queue(qsize) # self._s = socket.socket(socket.AF_INET, socket.SOCK_STREAM) # self._s.connect((host, port)) # data = self._s.recv(2) # if data != 'U ': # print "Wrong handshake" # self._s.send("U ") # print "Connected" # thread.start_new_thread(self.run, ()) # def run(self): # while True: # length = ord(self._s.recv(1)) # data = self._s.recv(length) # data = [ord(c) for c in data][1:] # #print "Recv %d bytes" % (length), ActiveMessage(data) # if self._in_queue.full(): # print "Warning: Buffer overflow" # self._in_queue.get() # p = RawPacket() # p.data = data # self._in_queue.put(p, block=False) # def read(self, timeout=0): # return self._in_queue.get() # def write(self, payload): # print "SFClient: write:", payload # if type(payload) != type([]): # # Assume this will be derived from Packet # payload = payload.payload() # payload = [0] + payload # self._s.send(chr(len(payload))) # self._s.send(''.join([chr(c) for c in payload])) # return True ################################################################################ class Packet: """ The Packet class offers a handy way to build pack and unpack binary data based on a given pattern. """ def _decode(self, v): r = long(0) for i in v: r = (r << 8) + i return r def _encode(self, val, dim): output = [] for i in range(dim): output.append(int(val & 0xFF)) val = val >> 8 output.reverse() return output def _sign(self, val, dim): if val > (1 << (dim * 8 - 1)): return val - (1 << (dim * 8)) return val def __init__(self, desc, packet = None): offset = 0 boffset = 0 sum = 0 for i in range(len(desc)-1, -1, -1): (n, t, s) = desc[i] if s == None: if sum > 0: desc[i] = (n, t, -sum) break sum += s self.__dict__['_schema'] = [(t, s) for (n, t, s) in desc] self.__dict__['_names'] = [n for (n, t, s) in desc] self.__dict__['_values'] = [] if type(packet) == type([]): for (t, s) in self._schema: if t == 'int': self._values.append(self._decode(packet[offset:offset + s])) offset += s elif t == 'sint': self._values.append(self._sign(self._decode(packet[offset:offset + s]), s)) offset += s elif t == 'bint': doffset = 8 - (boffset + s) self._values.append((packet[offset] >> doffset) & ((1< 0: self._values.append(packet[offset:offset + s]) offset += s else: self._values.append(packet[offset:s]) offset = len(packet) + s else: self._values.append(packet[offset:]) elif type(packet) == type(()): for i in packet: self._values.append(i) else: for v in self._schema: self._values.append(None) def __repr__(self): return self._values.__repr__() def __str__(self): r = "" for i in range(len(self._names)): r += "%s: %s " % (self._names[i], self._values[i]) for i in range(len(self._names), len(self._values)): r += "%s" % self._values[i] return r # Implement the struct behavior def __getattr__(self, name): if type(name) == type(0): return self._names[name] else: return self._values[self._names.index(name)] def __setattr__(self, name, value): if type(name) == type(0): self._values[name] = value else: self._values[self._names.index(name)] = value def __ne__(self, other): if other.__class__ == self.__class__: return self._values != other._values else: return True def __eq__(self, other): if other.__class__ == self.__class__: return self._values == other._values else: return False def __nonzero__(self): return True; # Implement the map behavior def __getitem__(self, key): return self.__getattr__(key) def __setitem__(self, key, value): self.__setattr__(key, value) def __len__(self): return len(self._values) def keys(self): return self._names def values(self): return self._values # Custom functions def names(self): return self._names def sizes(self): return self._schema def payload(self): r = [] boffset = 0 for i in range(len(self._schema)): (t, s) = self._schema[i] if t == 'int': r += self._encode(self._values[i], s) boffset = 0 elif t == 'bint': doffset = 8 - (boffset + s) if boffset == 0: r += [self._values[i] << doffset] else: r[-1] |= self._values[i] << doffset boffset += s if boffset == 8: boffset = 0 elif self._values[i] != []: r += self._values[i] for i in self._values[len(self._schema):]: r += i return r class RawPacket(Packet): def __init__(self, ts = None, data = None): Packet.__init__(self, [('ts' , 'int', 4), ('data', 'blob', None)], None) self.ts = ts; self.data = data class AckFrame(Packet): def __init__(self, payload = None): if isinstance(payload, Packet): if isinstance(payload, RawPacket): payload = payload.data else: payload = payload.payload() Packet.__init__(self, [('protocol', 'int', 1), ('seqno', 'int', 1)], payload) class DataFrame(Packet): def __init__(self, payload = None): if isinstance(payload, Packet): if isinstance(payload, RawPacket): payload = payload.data else: payload = payload.payload() Packet.__init__(self, [('protocol', 'int', 1), ('seqno', 'int', 1), ('dispatch', 'int', 1), ('data', 'blob', None)], payload) class NoAckDataFrame(Packet): def __init__(self, payload = None): if isinstance(payload, Packet): if isinstance(payload, RawPacket): payload = payload.data else: payload = payload.payload() Packet.__init__(self, [('protocol', 'int', 1), ('dispatch', 'int', 1), ('data', 'blob', None)], payload) class ActiveMessage(Packet): def __init__(self, packet = None, amId = 0x00, dest = 0xFFFF): payload = None if type(packet) == type([]): payload = packet elif isinstance(packet, NoAckDataFrame): payload = packet.data packet = None Packet.__init__(self, [('destination', 'int', 2), ('source', 'int', 2), ('length', 'int', 1), ('group', 'int', 1), ('type', 'int', 1), ('data', 'blob', None)], payload) if payload == None: self.destination = dest self.source = 0x0000 self.group = 0x00 self.type = amId self.data = [] if isinstance(packet, Packet): self.data = packet.payload() self.length = len(self.data) tinyos-2.1.2+dfsg/tos/000077500000000000000000000000001207233610700145665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/.default-platform000066400000000000000000000000051207233610700200300ustar00rootroot00000000000000null tinyos-2.1.2+dfsg/tos/chips/000077500000000000000000000000001207233610700156745ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/README000066400000000000000000000063651207233610700165660ustar00rootroot00000000000000============================================== Directory Description: tos/chips ============================================== :$Id: README,v 1.4 2006-12-12 18:23:02 vlahan Exp $ :TinyOS-Version: 2.0 :Author: Martin Turon :Created: 14-Feb-2005 :Version: $Revision: 1.4 $ :Modified: $Date: 2006-12-12 18:23:02 $ 1. Introduction ==================================================================== Platform dependant code independent of a specific platform ---------------------------------------------------------- The tos/chips directory is designed to house code to drive a particular chip in a way that can be shared across disparate platforms that share that particular chip. One of the main issues in tinyos-1.x that limited portability was that similar platforms would often copy code files hard-code customizations, rather than rigorously share common code. By placing chip-specific code here in a designated chips directory, and enforcing a policy of making this code specific to the chip but not the platform, code reuse will be promoted. 2. Microcontrollers ==================================================================== ATmega128 --------- Part of the AVR 8-bit series by Atmel corporation. Atmel's AVR microcontrollers have a RISC core running single cycle instructions and a well-defined I/O structure that limits the need for external components. Internal oscillators, timers, UART, SPI, pull-up resistors, pulse width modulation, ADC, analog comparator and watch-dog timers are some of the features you will find in AVR devices. 128-Kbyte self-programming Flash Program Memory, 4-Kbyte SRAM, 4-Kbyte EEPROM, 8 Channel 10-bit A/D-converter. JTAG interface for on-chip-debug. Up to 16 MIPS throughput at 16 MHz. 2.7 - 5.5 Volt operation. http://atmel.com/dyn/products/product_card.asp?part_id=2018 msp430 ------ The MSP430 family of ultra-low-power 16-bit RISC mixed-signal processors from Texas Instruments provides the ultimate solution for battery-powered measurement applications. http://focus.ti.com/mcu/docs/overview.tsp?familyId=342&templateId=5246&navigationId=11466&path=templatedata/cm/mcuovw/data/msp430_ovw 3. Radio Chips ==================================================================== cc2420 ------ The CC2420 is a low-cost transceiver designed specifically for low-power, low-voltage RF applications in the 2.4 GHz unlicensed ISM band. It is the first commercially available RF Transceiver compliant with the IEEE 802.15.4 standard and the first RF-IC that can be qualified for use in 2.4 GHz ZigBeetm products. http://www.chipcon.com/index.cfm?kat_id=2&subkat_id=12&dok_id=115 cc1000 ------ The CC1000 is a true ultra-low-power single-chip RF transceiver for e.g. the 315, 433, 868, 915 MHz bands. It has been specifically designed to comply with the most stringent demands of the low power radio market. Based on a pure CMOS technology this is the first product in the market that offers a unique combination of low cost and high integration, performance and flexibility, thus setting a new standard for short-range wireless communication. http://www.chipcon.com/index.cfm?kat_id=2&subkat_id=12&dok_id=14 4. Volatile Flash Chips ==================================================================== tinyos-2.1.2+dfsg/tos/chips/ad5200/000077500000000000000000000000001207233610700165675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/ad5200/AD5200C.nc000066400000000000000000000052101207233610700200050ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:02 $ * ======================================================================== */ /** * There is currently no TEP for describing devices of this type.

    * * This component provides the implementation of the ad5200 potentiometer * chip. It is currently the only chip of its type, and does not conform to * any existing TEP standard. This component will be updated as a TEP for * potentiometers is developed in the near future. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ configuration AD5200C { provides { interface Pot; interface Resource; interface StdControl; } } implementation { components AD5200P , AD5200SpiC , AD5200PotIO , MainC ; StdControl = AD5200P; Pot = AD5200P; Resource = AD5200SpiC; MainC.SoftwareInit-> AD5200P.Init; AD5200P.ENPOT -> AD5200PotIO.AD5200PotENPOT; AD5200P.SDPOT -> AD5200PotIO.AD5200PotSDPOT; AD5200P.SpiByte -> AD5200SpiC; } tinyos-2.1.2+dfsg/tos/chips/ad5200/AD5200P.nc000066400000000000000000000070061207233610700200270ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:02 $ * ======================================================================== */ /** * There is currently no TEP for describing devices of this type.

    * * This component provides the internal implementation of the ad5200 potentiometer * chip. It is currently the only chip of its type, and does not conform to * any existing TEP standard. This component will be updated as a TEP for * potentiometers is developed in the near future. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ module AD5200P { provides { interface Init; interface Pot; interface StdControl; } uses { interface GeneralIO as ENPOT; interface GeneralIO as SDPOT; interface SpiByte; } } implementation { uint8_t Pot_value = -1; /************** interface commands **************/ command error_t Init.init() { call ENPOT.makeOutput(); call SDPOT.makeOutput(); call ENPOT.set(); call SDPOT.set(); return SUCCESS; } command error_t StdControl.start() { call SDPOT.set(); call ENPOT.set(); return SUCCESS; } command error_t StdControl.stop() { call ENPOT.set(); call SDPOT.clr(); return SUCCESS; } async command error_t Pot.set(uint8_t setting) { call ENPOT.clr(); call SpiByte.write(setting); call ENPOT.set(); atomic Pot_value = setting; return SUCCESS; } async command uint8_t Pot.get() { return Pot_value; } async command error_t Pot.increase() { if (Pot_value < 255 && Pot_value >= 0) { Pot_value++; return call Pot.set(Pot_value); } else return FAIL; } async command error_t Pot.decrease() { if (Pot_value > 0) { Pot_value--; return call Pot.set(Pot_value); } else return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/ad5200/AD5200SpiC.nc000066400000000000000000000045161207233610700204710ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:02 $ * ======================================================================== */ /** * There is currently no TEP for describing components of this type.

    * * Configuration file for using the default Spi implementation for writing * a value to the Ad5200 Potentiometer. This file can be shadowed in the * application or platform directory in order to use a different Spi * implementation. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ configuration AD5200SpiC { provides { interface Resource; interface SpiByte; } } implementation { components new Spi0C() as Spi; Resource = Spi; SpiByte = Spi; } tinyos-2.1.2+dfsg/tos/chips/ad5200/Pot.nc000066400000000000000000000071311207233610700176550ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:02 $ * ======================================================================== */ /** * There is currently no TEP for describing this interface.

    * * This interface is an attempt at describing the HIL abstraction for * potentiomter devices. Since there is currently no TEP describing the * abstractions for potentiometers, this interface will need to be updated * once one is created. * * @author Jason Hill * @author David Gay * @author Philip Levis * @author Kevin Klues (klues@tkn.tu-berlin.de) -- modified for TinyOS-2.x */ interface Pot { /** * Set the potentiometer value. * * @param setting -- The new value of the potentiometer. * @return SUCCESS if the setting was successful
    * FAIL if the component has not been initialized or the desired * setting is outside of the valid range. */ async command error_t set(uint8_t setting); /** * Increment the potentiometer value by 1. This function proves to be * quite useful in active potentiometer control scenarios. * * @return SUCCESS if the increment was successful.
    * FAIL if the component has not been initialized or if the * potentiometer cannot be incremented further. */ async command error_t increase(); /** * Decrement the potentiometer value by 1. This function proves to be * quite useful in active potentiometer control scenarios. * * @return SUCCESS if the decrement was successful. * FAIL if the component has not been initialized or if the * potentiometer cannot be decremented further. */ async command error_t decrease(); /** * Return the current setting of the potentiometer. * @return An unsigned 8-bit value denoting the current setting of the * potentiometer. */ async command uint8_t get(); } tinyos-2.1.2+dfsg/tos/chips/ad5200/PotC.nc000066400000000000000000000045421207233610700177630ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:02 $ * ======================================================================== */ /** * There is currently no TEP for describing devices of this type.

    * * This component provides the HIL abstraction for the Ad5200 potentiomter. * Since there is currently no TEP describing the abstractions for * potentiometers, this component will need to be updated once one is created. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ configuration PotC { provides { interface Resource; interface Pot; interface StdControl; } } implementation { components Ad5200C; Pot = Ad5200C; StdControl = Ad5200C; Resource = Ad5200C; } tinyos-2.1.2+dfsg/tos/chips/ade7753/000077500000000000000000000000001207233610700167535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/ade7753/ACMeter.h000066400000000000000000000034121207233610700204040ustar00rootroot00000000000000/* * Copyright (c) 2011 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef ACMETER_H #define ACMETER_H typedef enum { ACMETER_OFF, ACMETER_ON, } acmeter_state_t; struct acmeter_buffer { uint16_t sz; struct acmeter_buffer *next; }; #endif tinyos-2.1.2+dfsg/tos/chips/ade7753/ACMeter.nc000066400000000000000000000032571207233610700205640ustar00rootroot00000000000000/* * Copyright (c) 2011 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ interface ACMeter { command uint8_t getGain(); command void setGain(uint8_t gain); } tinyos-2.1.2+dfsg/tos/chips/ade7753/ACMeterC.nc000066400000000000000000000054011207233610700206600ustar00rootroot00000000000000/* * Copyright (c) 2011 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * AC Mote and Energy Meter using ADE7753 * * @author Fred Jiang * @author Thomas Schmid (generalized module) */ configuration ACMeterC { provides { interface SplitControl; interface ReadStream as ReadEnergy; interface GetSet as RelayConfig; interface GetSet as GainConfig; interface Get as GetPeriod; } uses { interface SpiPacket; interface Resource as SpiResource; interface GeneralIO as CSN; interface GeneralIO as RelayIO; } } implementation { #ifdef DEBUG_ADE7753 components DiagMsgC; #endif components MainC; components ACMeterP, ADE7753P, LedsC; components new AlarmMilliC() as SampleAlarmC; SplitControl = ACMeterP; ReadEnergy = ACMeterP; RelayConfig = ACMeterP; GainConfig = ACMeterP; GetPeriod = ACMeterP; MainC.SoftwareInit -> ADE7753P.Init; ACMeterP.Leds -> LedsC; ACMeterP.ADE7753 -> ADE7753P; ACMeterP.MeterControl -> ADE7753P; ACMeterP.SampleAlarm -> SampleAlarmC; RelayIO = ACMeterP.onoff; SpiPacket = ADE7753P.SpiPacket; CSN = ADE7753P.SPIFRM; ADE7753P.Leds -> LedsC; SpiResource = ADE7753P.Resource; } tinyos-2.1.2+dfsg/tos/chips/ade7753/ACMeterP.nc000066400000000000000000000202641207233610700207010ustar00rootroot00000000000000/* * Copyright (c) 2011 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * AC Mote and Energy Meter using ADE7753 * * @author Fred Jiang * @author Thomas Schmid (generalized module) */ #include #include #include #include "ACMeter.h" module ACMeterP { provides { interface SplitControl; interface ReadStream as ReadEnergy; interface GetSet as RelayConfig; interface GetSet as GainConfig; interface Get as GetPeriod; } uses { interface Alarm as SampleAlarm; interface Leds; interface ADE7753; interface SplitControl as MeterControl; interface GeneralIO as onoff; } } implementation { acmeter_state_t onoff_state; norace uint32_t m_gain; uint32_t m_period, m_last; norace uint16_t m_mode; bool dirty; uint32_t *current_buffer, *deliver_buffer; uint16_t current_buffer_size, deliver_buffer_size; uint16_t current_buffer_idx; struct acmeter_buffer *extra_buffers = NULL; norace enum { OFF, INIT, ON, } state = OFF; norace enum { SET_MODE, SET_GAIN, DONE, } initState = SET_MODE; task void signalStartDone() { signal SplitControl.startDone(SUCCESS); } // this state machine drives the initialization task void init_task() { ASSERT(state == INIT); switch(initState) { case SET_MODE: call Leds.led2On(); m_mode = (1<sz; extra_buffers = extra_buffers->next; } else { current_buffer = NULL; } } } } } } async event void ADE7753.getRegDone( error_t error, uint8_t regAddr, uint32_t val, uint16_t len) { if (state == INIT) { post init_task(); return; } ASSERT(state == ON); switch(regAddr) { case ADE7753_RAENERGY: readRAEnergy(val); break; default: ASSERT(1); } } /* adding buffers */ command error_t ReadEnergy.postBuffer(uint32_t *buf, uint16_t count) { atomic { if (current_buffer == NULL) { current_buffer = buf; current_buffer_size = count; current_buffer_idx = 0; } else { struct acmeter_buffer *newbuf = (struct acmeter_buffer *)buf; if (count * sizeof(uint32_t) < sizeof(struct acmeter_buffer)) { return ESIZE; } newbuf->sz = count; newbuf->next = extra_buffers; extra_buffers = newbuf; } } return SUCCESS; } async event void ADE7753.setRegDone( error_t error, uint8_t regAddr, uint32_t val, uint16_t len) { if (state == INIT) { post init_task(); return; } ASSERT(state == ON); switch (regAddr) { default: ASSERT(1); } } } tinyos-2.1.2+dfsg/tos/chips/ade7753/ADE7753.h000066400000000000000000000103671207233610700200520ustar00rootroot00000000000000/* * Copyright (c) 2011 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * types and register defs for ADE7753 energy meter * @author Fred Jiang */ #ifndef __ADE7753_H__ #define __ADE7753_H__ // Register addresses #define ADE7753_WAVEFORM 0x01 #define ADE7753_AENERGY 0x02 #define ADE7753_RAENERGY 0x03 #define ADE7753_LAENERGY 0x04 #define ADE7753_VAENERGY 0x05 #define ADE7753_RVAENERGY 0x06 #define ADE7753_LVAENERGY 0x07 #define ADE7753_LVARENERGY 0x08 #define ADE7753_MODE 0x09 #define ADE7753_IRQEN 0x0A #define ADE7753_STATUS 0x0B #define ADE7753_RSTATUS 0x0C #define ADE7753_CH1OS 0x0D #define ADE7753_CH2OS 0x0E #define ADE7753_GAIN 0x0F #define ADE7753_PHCAL 0x10 #define ADE7753_APOS 0x11 #define ADE7753_WGAIN 0x12 #define ADE7753_WDIV 0x13 #define ADE7753_CFNUM 0x14 #define ADE7753_CFDEN 0x15 #define ADE7753_IRMS 0x16 #define ADE7753_VRMS 0x17 #define ADE7753_IRMSOS 0x18 #define ADE7753_VRMSOS 0x19 #define ADE7753_VGAIN 0x1A #define ADE7753_VADIV 0x1B #define ADE7753_LINECYC 0x1C #define ADE7753_ZXTOUT 0x1D #define ADE7753_SAGCYC 0x1E #define ADE7753_SAGLVL 0x1F #define ADE7753_IPKLVL 0x20 #define ADE7753_VPKLVL 0x21 #define ADE7753_IPEAK 0x22 #define ADE7753_RSTIPEAK 0x23 #define ADE7753_VPEAK 0x24 #define ADE7753_RSTVPEAK 0x25 #define ADE7753_TEMP 0x26 // gain settings #define ADE7753_GAIN_PGA_CH1 0 #define ADE7753_GAIN_SCALE_CH1 3 #define ADE7753_GAIN_PGA_CH2 5 #define ADE7753_GAIN_1 0 #define ADE7753_GAIN_2 1 #define ADE7753_GAIN_4 2 #define ADE7753_GAIN_8 3 #define ADE7753_GAIN_16 4 #define ADE7753_GAIN_SCALE_05 0 #define ADE7753_GAIN_SCALE_025 1 #define ADE7753_GAIN_SCALE_0125 2 // mode settings #define ADE7753_MODE_DISHPF 0 #define ADE7753_MODE_DISHLPF2 1 #define ADE7753_MODE_DISCF 2 #define ADE7753_MODE_DISSAG 3 #define ADE7753_MODE_ASUSPEND 4 #define ADE7753_MODE_TEMPSEL 5 #define ADE7753_MODE_SWRST 6 #define ADE7753_MODE_CYCMODE 7 #define ADE7753_MODE_DISH1 8 #define ADE7753_MODE_DISH2 9 #define ADE7753_MODE_SWAP 10 #define ADE7753_MODE_DTRT 11 #define ADE7753_MODE_WAVSEL 13 #define ADE7753_MODE_POAM 15 #define ADE7753_IRQ_AEHF 0 #define ADE7753_IRQ_SAG 1 #define ADE7753_IRQ_CYCEND 2 #define ADE7753_IRQ_WSMP 3 #define ADE7753_IRQ_ZX 4 #define ADE7753_IRQ_TEMP 5 #define ADE7753_IRQ_RESET 6 #define ADE7753_IRQ_AEOF 7 #define ADE7753_IRQ_PKV 8 #define ADE7753_IRQ_PKI 9 #define ADE7753_IRQ_VAEHF 10 #define ADE7753_IRQ_VAEOF 11 #define ADE7753_IRQ_ZXTO 12 #define ADE7753_IRQ_PPOS 13 #define ADE7753_IRQ_PNEG 14 #endif // __ADE7753_H__ tinyos-2.1.2+dfsg/tos/chips/ade7753/ADE7753.nc000066400000000000000000000037331207233610700202220ustar00rootroot00000000000000/* * Copyright (c) 2011 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ interface ADE7753 { async command error_t getReg(uint8_t regAddr, uint8_t len); async event void getRegDone( error_t error, uint8_t regAddr, uint32_t val, uint16_t len); async command error_t setReg( uint8_t regAddr, uint8_t len, uint32_t val); async event void setRegDone( error_t error , uint8_t regAddr, uint32_t val, uint16_t len); // async event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/ade7753/ADE7753P.nc000066400000000000000000000156701207233610700203450ustar00rootroot00000000000000/* * Copyright (c) 2011 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include module ADE7753P { provides { interface Init; interface SplitControl; interface ADE7753; } uses { interface Resource; interface SpiPacket; interface GeneralIO as SPIFRM; interface Leds; } } implementation { enum { STATE_IDLE, STATE_STARTING, STATE_STOPPING, STATE_STOPPED, STATE_GETREG, STATE_SETREG, STATE_ERROR }; uint8_t mSPIRxBuf[4],mSPITxBuf[4]; uint8_t mSPITxLen; uint8_t mSPIRxLen; // bool lock; uint8_t mState; bool misInited = FALSE; norace error_t mSSError; task void StartDone() { atomic mState = STATE_IDLE; signal SplitControl.startDone(SUCCESS); return; } task void StopDone() { signal SplitControl.stopDone(mSSError); return; } command error_t Init.init() { atomic { if (!misInited) { misInited = TRUE; mState = STATE_STOPPED; } // Control CS pin manually call SPIFRM.makeOutput(); call SPIFRM.set(); } return SUCCESS; } command error_t SplitControl.start() { error_t error = SUCCESS; atomic { if (mState == STATE_STOPPED) { mState = STATE_IDLE; } else { error = EBUSY; } } if (error) return error; atomic mState = STATE_IDLE; call SPIFRM.set(); post StartDone(); return error; } command error_t SplitControl.stop() { error_t error = SUCCESS; // atomic lock = FALSE; atomic { if (mState == STATE_IDLE) { // mState = STATE_STOPPING; mState = STATE_STOPPED; } else { error = EBUSY; } } if (error) return error; atomic mState = STATE_STOPPED; call SPIFRM.set(); post StopDone(); return error; } event void Resource.granted() { atomic switch(mState) { case STATE_GETREG: // call Leds.led0Toggle(); call SPIFRM.clr(); // CS LOW if (call SpiPacket.send(mSPITxBuf,mSPIRxBuf,mSPIRxLen) == FAIL) call Resource.request(); break; case STATE_SETREG: // call Leds.led0On(); call SPIFRM.clr(); // CS LOW if (call SpiPacket.send(mSPITxBuf,mSPIRxBuf,mSPITxLen) == FAIL) call Resource.request(); break; default: call Resource.release(); } } // Here I'm forcing 24 bit receive data async command error_t ADE7753.getReg(uint8_t regAddr, uint8_t len) { error_t error = SUCCESS; atomic { if (mState != STATE_IDLE) { return FAIL; } else { mState = STATE_GETREG; } } mSPITxBuf[0] = regAddr; mSPITxBuf[1] = 0; mSPITxBuf[2] = 0; mSPITxBuf[3] = 0; mSPIRxBuf[0] = 0; mSPIRxBuf[1] = 0; mSPIRxBuf[2] = 0; mSPIRxBuf[3] = 0; mSPIRxLen = len; call Resource.request(); return error; } // here I'm forcing 24bit of val during a write async command error_t ADE7753.setReg(uint8_t regAddr, uint8_t len, uint32_t val) { error_t error = SUCCESS; atomic { if (mState != STATE_IDLE) { return FAIL; } else { mState = STATE_SETREG; } } // call Leds.led0On(); atomic { mSPITxBuf[0] = regAddr | (1 << 7); // set the WRITE bit switch (len) { case 2: mSPITxBuf[1] = (uint8_t) val; break; case 3: mSPITxBuf[1] = (uint8_t) (val>>8); mSPITxBuf[2] = (uint8_t) val; break; case 4: mSPITxBuf[1] = (uint8_t) (val>>16); mSPITxBuf[2] = (uint8_t) (val>>8); mSPITxBuf[3] = (uint8_t) val; break; } mSPITxLen = len; } // call Leds.led0On(); call Resource.request(); return error; } async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t spi_error ) { uint32_t val; error_t error = spi_error; call SPIFRM.set(); // CS HIGH atomic { switch (mState) { case STATE_GETREG: mState = STATE_IDLE; // repack switch (len) { case 2: val = rxBuf[1]; break; case 3: val = ((uint32_t)rxBuf[1])<<8 | rxBuf[2]; break; case 4: val = ((uint32_t)rxBuf[1])<<16 | ((uint32_t)rxBuf[2])<<8 | rxBuf[3]; break; default: val = 0xF0F0F0F0; break; } signal ADE7753.getRegDone(error, (txBuf[0] & 0x7F), val, len); break; case STATE_SETREG: // call Leds.led1Toggle(); mState = STATE_IDLE; // repack switch (len) { case 2: val = txBuf[1]; break; case 3: val = ((uint32_t)txBuf[1])<<8 | txBuf[2]; break; case 4: val = ((uint32_t)txBuf[1])<<16 | ((uint32_t)txBuf[2])<<8 | txBuf[3]; break; default: val = 0xF0F0F0F0; break; } signal ADE7753.setRegDone(error, (txBuf[0] & 0x7F), val, len); break; default: mState = STATE_IDLE; break; } } call Resource.release(); return; } default event void SplitControl.startDone( error_t error ) { return; } default event void SplitControl.stopDone( error_t error ) { return; } } tinyos-2.1.2+dfsg/tos/chips/ade7753/Assert.h000066400000000000000000000035111207233610700203650ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __ASSERT_H__ #define __ASSERT_H__ #ifdef ASSERT void assert(bool condition, const char* file, uint16_t line); #define ASSERT(COND) assert(COND, __FILE__, __LINE__) #else #define ASSERT(COND) for(;0;) #endif #endif//__ASSERT_H__ tinyos-2.1.2+dfsg/tos/chips/adxl345/000077500000000000000000000000001207233610700170605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/adxl345/ADXL345.h000066400000000000000000000124041207233610700202160ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote * * Credits goes to DEXMA SENSORS SL * @author: Xavier Orduna * @author: Jordi Soucheiron * @author: Antonio Linan * */ #ifndef ADXL345_H #define ADXL345_H #define ADXL345_ADDRESS 0x53 //ADXL345 Registers Start #define ADXL345_DEVID 0x00 // R // Device ID. #define ADXL345_THRESH_TAP 0x1D // RW // Tap Threshold 62.5mg/LSB (0xFF = +16g) #define ADXL345_OFSX 0x1E // RW // X-axis Offset 15.6mg/LSB #define ADXL345_OFSY 0x1F // RW // Y-axis Offset 15.6mg/LSB #define ADXL345_OFSZ 0x20 // RW // Z-axis Offset 15.6mg/LSB #define ADXL345_DUR 0x21 // RW // Tap Duration 625us/LSB #define ADXL345_LATENT 0x22 // RW // Tap Latency 1.25ms/LSB #define ADXL345_WINDOW 0x23 // RW // Tap Window 1.25ms/LSB #define ADXL345_THRESH_ACT 0x24 // RW // Activity threshold 62.5mg/LSB #define ADXL345_THRESH_INACT 0x25 // RW // Inactivity Threshold 62.5mg/LSB #define ADXL345_TIME_INACT 0x26 // RW // Inactivity Time. 1s/LSB #define ADXL345_ACT_INACT_CTL 0x27 // RW // xis enable control for activity and inactivity detection. #define ADXL345_THRESH_FF 0x28 // RW // Free-fall threshold. 62.5mg/LSB #define ADXL345_TIME_FF 0x29 // RW // Free-fall Time 5ms/LSB (values 0x14 to 0x46 are recommended) #define ADXL345_TAP_AXES 0x2A // RW // Axis control for tap/double tap #define ADXL345_ACT_TAP_STATUS 0x2B // R // Source of tap/double tap #define ADXL345_BW_RATE 0x2C // RW // Data rate and power control mode (default 0xA) #define ADXL345_POWER_CTL 0x2D // RW // Power saving features control #define ADXL345_INT_ENABLE 0x2E // RW // Interrupt enable control #define ADXL345_INT_MAP 0x2F // RW // Interrupt mapping control #define ADXL345_INT_SOURCE 0x30 // R // Source of interrupts #define ADXL345_DATAFORMAT 0x31 // RW // Data format control #define ADXL345_DATAX0 0x32 // R // X-Axis #define ADXL345_DATAY0 0x34 // R // Y-Axis #define ADXL345_DATAZ0 0x36 // R // Z-Axis #define ADXL345_FIFO_CTL 0x38 // RW // FIFO control #define ADXL345_FIFO_STATE 0x39 // R // FIFO status //ADXL Registers End #define ADXL345_MEASURE_MODE 0x08 #define ADXL345_STANDBY_MODE 0xF7 #define ADXL345_SLEEP_MODE 0x04 #define ADXL345_RANGE_2G 0 #define ADXL345_RANGE_4G 1 #define ADXL345_RANGE_8G 2 #define ADXL345_RANGE_16G 3 #define ADXL345_LOWRES 0 #define ADXL345_FULLRES 1 #define ADXL345_START_TIMEOUT 2000 //ADXL345 Driver States States typedef enum { ADXLCMD_START, ADXLCMD_READ_REGISTER, ADXLCMD_READ_DURATION, ADXLCMD_READ_LATENT, ADXLCMD_READ_WINDOW, ADXLCMD_READ_THRESH_ACT, //TODO ADXLCMD_READ_THRESH_INACT, //TODO ADXLCMD_READ_TIME_INACT, //TODO ADXLCMD_READ_ACT_INACT_CTL, //TODO ADXLCMD_READ_THRESH_FF, //TODO ADXLCMD_READ_TIME_FF, //TODO ADXLCMD_READ_TAP_AXES, //TODO ADXLCMD_READ_ACT_TAP_STATUS, //TODO ADXLCMD_READ_BW_RATE, //TODO ADXLCMD_READ_POWER_CTL, //TODO ADXLCMD_READ_INT_ENABLE, ADXLCMD_READ_INT_MAP, ADXLCMD_READ_INT_SOURCE, ADXLCMD_READ_X, ADXLCMD_READ_Y, ADXLCMD_READ_Z, ADXLCMD_READ_XYZ, ADXLCMD_SET_RANGE, ADXLCMD_STOP, ADXLCMD_SLEEP, ADXLCMD_INT, ADXLCMD_SET_REGISTER, ADXLCMD_SET_DURATION, ADXLCMD_SET_LATENT, ADXLCMD_SET_WINDOW, ADXLCMD_SET_INT_MAP, } adxl345_commands; //ADXL345 Interruptions typedef enum { ADXLINT_NONE = 0x00, ADXLINT_OVERRUN = 0x01, ADXLINT_WATERMARK = 0x02, ADXLINT_FREE_FALL = 0x04, ADXLINT_INACTIVITY = 0x08, ADXLINT_ACTIVITY = 0x10, ADXLINT_DOUBLE_TAP = 0x20, ADXLINT_SINGLE_TAP = 0x40, ADXLINT_DATA_READY = 0x80, } adxlint_state_t; typedef struct { uint16_t x_axis; uint16_t y_axis; uint16_t z_axis; } adxl345_readxyt_t; #endif tinyos-2.1.2+dfsg/tos/chips/adxl345/ADXL345C.nc000066400000000000000000000062111207233610700204710ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote * * Credits goes to DEXMA SENSORS SL * @author: Xavier Orduna * @author: Jordi Soucheiron * @author: Antonio Linan * @author: Andre Rodrigues */ #include "ADXL345.h" generic configuration ADXL345C() { provides interface SplitControl; provides interface Read as X; provides interface Read as Y; provides interface Read as Z; provides interface Read as XYZ; provides interface Read as IntSource; provides interface Read as Register; provides interface ADXL345Control; provides interface Notify as Int1; provides interface Notify as Int2; } implementation { components ADXL345P; X = ADXL345P.X; Y = ADXL345P.Y; Z = ADXL345P.Z; XYZ = ADXL345P.XYZ; IntSource = ADXL345P.IntSource; SplitControl = ADXL345P; ADXL345Control = ADXL345P; Register = ADXL345P.Register; components new Msp430I2C1C() as I2C; ADXL345P.Resource -> I2C; ADXL345P.ResourceRequested -> I2C; ADXL345P.I2CBasicAddr -> I2C; components HplADXL345C; Int1 = ADXL345P.Int1; Int2 = ADXL345P.Int2; ADXL345P.GpioInterrupt1 -> HplADXL345C.GpioInterrupt1; ADXL345P.GpioInterrupt2 -> HplADXL345C.GpioInterrupt2; ADXL345P.GeneralIO1 -> HplADXL345C.GeneralIO1; ADXL345P.GeneralIO2 -> HplADXL345C.GeneralIO2; components new TimerMilliC() as TimeoutAlarm; ADXL345P.TimeoutAlarm -> TimeoutAlarm; } tinyos-2.1.2+dfsg/tos/chips/adxl345/ADXL345Control.nc000066400000000000000000000053011207233610700217260ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote * * Credits goes to DEXMA SENSORS SL * @author: Xavier Orduna * @author: Jordi Soucheiron * @author: Antonio Linan */ interface ADXL345Control { command error_t setRange(uint8_t range, uint8_t resolution); event void setRangeDone(error_t error); command error_t setInterrups(uint8_t interrupt_vector); event void setInterruptsDone(error_t error); command error_t setIntMap(uint8_t int_map_vector); event void setIntMapDone(error_t error); command error_t setRegister(uint8_t reg, uint8_t value); event void setRegisterDone(error_t error); command error_t setDuration(uint8_t duration); event void setDurationDone(error_t error); command error_t setLatent(uint8_t latent); event void setLatentDone(error_t error); command error_t setWindow(uint8_t window); event void setWindowDone(error_t error); command error_t setReadAddress(uint8_t address); event void setReadAddressDone(error_t error); } tinyos-2.1.2+dfsg/tos/chips/adxl345/ADXL345P.nc000066400000000000000000000644531207233610700205220ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2011 ZOLERTIA LABS * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote * * Credits goes to DEXMA SENSORS SL * @author: Xavier Orduna * @author: Jordi Soucheiron * @author: Antonio Linan */ #include "ADXL345.h" module ADXL345P { provides { interface SplitControl; interface Read as Register; interface Read as Duration; interface Read as Latent; interface Read as Window; interface Read as BwRate; interface Read as PowerCtl; interface Read as IntEnable; interface Read as IntMap; interface Read as IntSource; interface Read as X; interface Read as Y; interface Read as Z; interface Read as XYZ; interface ADXL345Control; interface Notify as Int1; interface Notify as Int2; } uses { interface Resource; interface ResourceRequested; interface I2CPacket as I2CBasicAddr; interface GeneralIO as GeneralIO1; interface GeneralIO as GeneralIO2; interface GpioInterrupt as GpioInterrupt1; interface GpioInterrupt as GpioInterrupt2; interface Timer as TimeoutAlarm; } } implementation { norace bool lock=FALSE; norace uint8_t state; norace uint8_t adxlcmd; norace uint8_t databuf[20]; norace uint8_t set_reg[2]; norace uint8_t pointer; norace uint8_t readAddress=0; norace uint8_t regData; norace uint8_t duration; norace uint8_t latent; norace uint8_t window; norace uint8_t bw_rate; norace uint8_t power_ctl=0x0; norace uint8_t int_enable; norace uint8_t int_map; norace uint8_t int_source; norace uint8_t dataformat; norace error_t error_return= SUCCESS; norace uint16_t x_axis; norace uint16_t y_axis; norace uint16_t z_axis; norace adxl345_readxyt_t xyz_axis; task void sendEvent1(); task void sendEvent2(); task void started(){ if(call TimeoutAlarm.isRunning()) call TimeoutAlarm.stop(); lock = FALSE; signal SplitControl.startDone(error_return); } task void stopped(){ lock = FALSE; signal SplitControl.stopDone(error_return); } task void calculatePowerCtl() { lock = FALSE; signal PowerCtl.readDone(error_return, power_ctl); } task void calculateBwRate() { lock = FALSE; signal BwRate.readDone(error_return, bw_rate); } task void calculateIntMap() { lock = FALSE; signal IntMap.readDone(error_return, int_map); } task void calculateIntEnable() { lock = FALSE; signal IntEnable.readDone(error_return, int_enable); } task void calculateIntSource() { lock = FALSE; signal IntSource.readDone(error_return, int_source); } task void calculateX(){ lock = FALSE; signal X.readDone(error_return, x_axis); } task void calculateY(){ lock = FALSE; signal Y.readDone(error_return, y_axis); } task void calculateZ(){ lock = FALSE; signal Z.readDone(error_return, z_axis); } task void calculateXYZ(){ lock = FALSE; signal XYZ.readDone(error_return, xyz_axis); } task void calculateRegister() { lock = FALSE; signal Register.readDone(error_return, regData); } task void rangeDone(){ lock = FALSE; signal ADXL345Control.setRangeDone(error_return); } task void setRegisterDone(){ lock = FALSE; signal ADXL345Control.setRegisterDone(error_return); } task void setIntMapDone(){ lock = FALSE; signal ADXL345Control.setIntMapDone(error_return); } task void interruptsDone(){ lock = FALSE; signal ADXL345Control.setInterruptsDone(error_return); } task void durationDone(){ lock = FALSE; signal ADXL345Control.setDurationDone(error_return); } task void latentDone(){ lock = FALSE; signal ADXL345Control.setLatentDone(error_return); } task void windowDone(){ lock = FALSE; signal ADXL345Control.setWindowDone(error_return); } task void readDurationDone(){ lock = FALSE; signal Duration.readDone(error_return, duration); } task void readLatentDone(){ lock = FALSE; signal Latent.readDone(error_return, latent); } task void readWindowDone(){ lock = FALSE; signal Window.readDone(error_return, window); } task void setReadAddressDone() { lock = FALSE; signal ADXL345Control.setReadAddressDone(SUCCESS); } command error_t SplitControl.start(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_START; e = call Resource.request(); if (e==SUCCESS) { call TimeoutAlarm.startOneShot(ADXL345_START_TIMEOUT); return SUCCESS; } lock = FALSE; return e; } command error_t SplitControl.stop(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_STOP; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t ADXL345Control.setReadAddress(uint8_t address){ if(lock) return EBUSY; lock = TRUE; if( address >= 0x01 && address <= 0x1C) return EINVAL; //reserved, do not access if( address >= 0x3A) return EINVAL; //too big readAddress = address; post setReadAddressDone(); return SUCCESS; } command error_t ADXL345Control.setRange(uint8_t range, uint8_t resolution){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_SET_RANGE; e=call Resource.request(); if(e==SUCCESS) { dataformat = resolution << 3; dataformat = dataformat + range; return SUCCESS; } lock = FALSE; return e; } command error_t ADXL345Control.setRegister(uint8_t reg, uint8_t value){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_SET_REGISTER; e=call Resource.request(); if(e==SUCCESS) { set_reg[0] = reg; set_reg[1] = value; return SUCCESS; } lock = FALSE; return e; } command error_t ADXL345Control.setInterrups(uint8_t int_enable_par) { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_INT; e = call Resource.request(); if (e==SUCCESS) { int_enable = int_enable_par; return SUCCESS; } lock = FALSE; return e; } command error_t ADXL345Control.setDuration(uint8_t duration_par) { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_SET_DURATION; e = call Resource.request(); if (e==SUCCESS) { duration = duration_par; return SUCCESS; } lock = FALSE; return e; } command error_t ADXL345Control.setLatent(uint8_t latent_par) { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_SET_LATENT; e = call Resource.request(); if (e==SUCCESS) { latent = latent_par; return SUCCESS; } lock = FALSE; return e; } command error_t ADXL345Control.setWindow(uint8_t window_par) { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_SET_WINDOW; e = call Resource.request(); if (e==SUCCESS) { window = window_par; return SUCCESS; } lock = FALSE; return e; } command error_t ADXL345Control.setIntMap(uint8_t int_map_par) { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_SET_INT_MAP; e = call Resource.request(); if (e==SUCCESS) { int_map = int_map_par; return SUCCESS; } lock = FALSE; return e; } command error_t PowerCtl.read() { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_POWER_CTL; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t BwRate.read() { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_BW_RATE; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t IntEnable.read() { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_INT_ENABLE; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t IntMap.read() { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_INT_MAP; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t IntSource.read() { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_INT_SOURCE; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t Register.read() { error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_REGISTER; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t X.read(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_X; if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { lock=FALSE; return FAIL; } e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t Y.read(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_Y; if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { lock=FALSE; return FAIL; } e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t Z.read(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_Z; if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { lock=FALSE; return FAIL; } e = call Resource.request(); if (e==SUCCESS) return SUCCESS; lock = FALSE; return e; } command error_t XYZ.read(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_XYZ; if ((power_ctl & ADXL345_MEASURE_MODE) == 0) { lock=FALSE; return FAIL; } e = call Resource.request(); if (e==SUCCESS) return SUCCESS; lock = FALSE; return e; } command error_t Duration.read(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_DURATION; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t Latent.read(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_LATENT; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } command error_t Window.read(){ error_t e; if(lock) return EBUSY; lock = TRUE; adxlcmd = ADXLCMD_READ_WINDOW; e = call Resource.request(); if (e==SUCCESS) { return SUCCESS; } lock = FALSE; return e; } event void Resource.granted(){ error_t e; switch(adxlcmd){ case ADXLCMD_READ_XYZ: //NOTE moved to speedup pointer = ADXL345_DATAX0; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateXYZ(); } break; case ADXLCMD_START: power_ctl = power_ctl | ADXL345_MEASURE_MODE; databuf[0] = ADXL345_THRESH_TAP; databuf[1] = 0x40; //ADXL345_THRESH_TAP databuf[2] = 0x0; //ADXL345_OFSX databuf[3] = 0x0; //ADXL345_OFSY databuf[4] = 0x0; //ADXL345_OFSZ databuf[5] = 0x7F; //ADXL345_DUR databuf[6] = 0x30; //ADXL345_LATENT databuf[7] = 0x7F; //ADXL345_WINDOW databuf[8] = 0x2; //ADXL345_THRESH_ACT databuf[9] = 0x1; //ADXL345_THRESH_INACT databuf[10] = 0xFF; //ADXL345_TIME_INACT databuf[11] = 0xFF; //ADXL345_ACT_INACT_CTL databuf[12] = 0x05; //ADXL345_THRESH_FF databuf[13] = 0x14; //ADXL345_TIME_FF databuf[14] = 0x7; //ADXL345_TAP_AXES databuf[15] = 0x0; //ADXL345_ACT_TAP_STATUS(read only) databuf[16] = 0x0A; //ADXL345_BW_RATE databuf[17] = power_ctl; //ADXL345_POWER_CTL databuf[18] = 0x0; //ADXL345_INT_ENABLE (all disabled by default) e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 19, databuf); if (e!= SUCCESS) { error_return = e; post started(); } break; case ADXLCMD_READ_DURATION: pointer = ADXL345_DUR; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post readDurationDone(); } break; case ADXLCMD_READ_LATENT: pointer = ADXL345_LATENT; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post readLatentDone(); } break; case ADXLCMD_READ_WINDOW: pointer = ADXL345_WINDOW; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post readWindowDone(); } break; case ADXLCMD_READ_POWER_CTL: pointer = ADXL345_POWER_CTL; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculatePowerCtl(); } break; case ADXLCMD_READ_BW_RATE: pointer = ADXL345_BW_RATE; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateBwRate(); } break; case ADXLCMD_READ_INT_ENABLE: pointer = ADXL345_INT_ENABLE; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateIntEnable(); } break; case ADXLCMD_READ_INT_MAP: pointer = ADXL345_INT_MAP; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateIntMap(); } break; case ADXLCMD_READ_INT_SOURCE: pointer = ADXL345_INT_SOURCE; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateIntSource(); } break; case ADXLCMD_READ_X: pointer = ADXL345_DATAX0; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateX(); } break; case ADXLCMD_READ_Y: pointer = ADXL345_DATAY0; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateY(); } break; case ADXLCMD_READ_Z: pointer = ADXL345_DATAZ0; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateZ(); } break; case ADXLCMD_READ_REGISTER: pointer = readAddress; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, &pointer); if (e!= SUCCESS) { error_return = e; post calculateRegister(); } break; case ADXLCMD_SET_REGISTER: databuf[0] = set_reg[0]; databuf[1] = set_reg[1]; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); if (e!= SUCCESS) { error_return = e; post setRegisterDone(); } break; case ADXLCMD_SET_INT_MAP: databuf[0] = ADXL345_INT_MAP; databuf[1] = int_map; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); if (e!= SUCCESS) { error_return = e; post setIntMapDone(); } break; case ADXLCMD_SET_RANGE: databuf[0] = ADXL345_DATAFORMAT; databuf[1] = dataformat; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); if (e!= SUCCESS) { error_return = e; post rangeDone(); } break; case ADXLCMD_STOP: power_ctl = power_ctl & ADXL345_STANDBY_MODE; databuf[0] = ADXL345_POWER_CTL; databuf[1] = power_ctl; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); if (e!= SUCCESS) { error_return = e; post stopped(); } break; case ADXLCMD_INT: databuf[0] = ADXL345_INT_ENABLE; databuf[1] = int_enable; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); if (e!= SUCCESS) { error_return = e; post interruptsDone(); } break; case ADXLCMD_SET_DURATION: databuf[0] = ADXL345_DUR; databuf[1] = duration; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); if (e!= SUCCESS) { error_return = e; post durationDone(); } break; case ADXLCMD_SET_LATENT: databuf[0] = ADXL345_LATENT; databuf[1] = latent; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); if (e!= SUCCESS) { error_return = e; post latentDone(); } break; case ADXLCMD_SET_WINDOW: databuf[0] = ADXL345_WINDOW; databuf[1] = window; e = call I2CBasicAddr.write((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); if (e!= SUCCESS) { error_return = e; post windowDone(); } break; } } async event void ResourceRequested.requested(){ } async event void ResourceRequested.immediateRequested(){ } async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ uint16_t tmp=0; if(call Resource.isOwner()) { error_return=error; for(tmp=0;tmp<0x8fff;tmp++); //delay tmp= call Resource.release(); if(adxlcmd == ADXLCMD_READ_X || adxlcmd == ADXLCMD_READ_Y || adxlcmd == ADXLCMD_READ_Z) { tmp = data[1]; tmp = tmp << 8; tmp = tmp + data[0]; } switch(adxlcmd){ case ADXLCMD_READ_XYZ: //NOTE moved to speedup xyz_axis.x_axis = (data[1] << 8) + data[0]; xyz_axis.y_axis = (data[3] << 8) + data[2]; xyz_axis.z_axis = (data[5] << 8) + data[4]; post calculateXYZ(); break; case ADXLCMD_READ_REGISTER: regData=data[0]; post calculateRegister(); break; case ADXLCMD_READ_DURATION: duration=data[0]; post readDurationDone(); break; case ADXLCMD_READ_LATENT: latent=data[0]; post readLatentDone(); break; case ADXLCMD_READ_WINDOW: window=data[0]; post readWindowDone(); break; case ADXLCMD_READ_POWER_CTL: power_ctl=data[0]; post calculatePowerCtl(); break; case ADXLCMD_READ_BW_RATE: bw_rate=data[0]; post calculateBwRate(); break; case ADXLCMD_READ_INT_ENABLE: int_enable=data[0]; post calculateIntEnable(); break; case ADXLCMD_READ_INT_MAP: int_map=data[0]; post calculateIntMap(); break; case ADXLCMD_READ_INT_SOURCE: int_source=data[0]; post calculateIntSource(); break; case ADXLCMD_READ_X: x_axis = tmp; post calculateX(); break; case ADXLCMD_READ_Y: y_axis = tmp; post calculateY(); break; case ADXLCMD_READ_Z: z_axis = tmp; post calculateZ(); break; } } } async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ if(call Resource.isOwner()) { error_return=error; if( adxlcmd != ADXLCMD_READ_XYZ //NOTE moved to speedup && adxlcmd != ADXLCMD_READ_REGISTER && adxlcmd != ADXLCMD_READ_DURATION && adxlcmd != ADXLCMD_READ_LATENT && adxlcmd != ADXLCMD_READ_WINDOW && adxlcmd != ADXLCMD_READ_INT_ENABLE && adxlcmd != ADXLCMD_READ_INT_MAP && adxlcmd != ADXLCMD_READ_INT_SOURCE && adxlcmd != ADXLCMD_READ_X && adxlcmd != ADXLCMD_READ_Y && adxlcmd != ADXLCMD_READ_Z ) { call Resource.release(); } switch(adxlcmd){ case ADXLCMD_READ_XYZ: //NOTE moved to speedup if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 6, databuf); else post calculateXYZ(); break; case ADXLCMD_START: post started(); break; case ADXLCMD_READ_REGISTER: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post calculateRegister(); break; case ADXLCMD_READ_DURATION: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post readDurationDone(); break; case ADXLCMD_READ_LATENT: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post readLatentDone(); break; case ADXLCMD_READ_WINDOW: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post readWindowDone(); break; case ADXLCMD_READ_POWER_CTL: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post calculatePowerCtl(); break; case ADXLCMD_READ_BW_RATE: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post calculateBwRate(); break; case ADXLCMD_READ_INT_ENABLE: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post calculateIntEnable(); break; case ADXLCMD_READ_INT_MAP: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post calculateIntMap(); break; case ADXLCMD_READ_INT_SOURCE: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 1, databuf); else post calculateIntSource(); break; case ADXLCMD_READ_X: if (error==SUCCESS) call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); else post calculateX(); break; case ADXLCMD_READ_Y: if (error==SUCCESS) call I2CBasicAddr.read((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); else post calculateY(); break; case ADXLCMD_READ_Z: if (error==SUCCESS) call I2CBasicAddr.read ((I2C_START | I2C_STOP), ADXL345_ADDRESS, 2, databuf); else post calculateZ(); break; case ADXLCMD_SET_REGISTER: post setRegisterDone(); break; case ADXLCMD_SET_INT_MAP: post setIntMapDone(); break; case ADXLCMD_SET_RANGE: post rangeDone(); break; case ADXLCMD_STOP: post stopped(); break; case ADXLCMD_INT: post interruptsDone(); break; case ADXLCMD_SET_DURATION: post durationDone(); break; case ADXLCMD_SET_LATENT: post latentDone(); break; case ADXLCMD_SET_WINDOW: post windowDone(); break; } } } /* default handlers */ default event void Register.readDone(error_t error, uint8_t data) { return; } default event void Duration.readDone(error_t error, uint8_t data){ return; } default event void Latent.readDone(error_t error, uint8_t data) { return; } default event void Window.readDone(error_t error, uint8_t data) { return; } default event void PowerCtl.readDone(error_t error, uint8_t data) { return; } default event void BwRate.readDone(error_t error, uint8_t data) { return; } default event void IntEnable.readDone(error_t error, uint8_t data) { return; } default event void IntMap.readDone(error_t error, uint8_t data) { return; } default event void IntSource.readDone(error_t error, uint8_t data){ return; } default event void X.readDone(error_t error, uint16_t data){ return; } default event void Y.readDone(error_t error, uint16_t data){ return; } default event void Z.readDone(error_t error, uint16_t data){ return; } default event void XYZ.readDone(error_t error, adxl345_readxyt_t data){ return; } default event void ADXL345Control.setRangeDone(error_t error){ return; } default event void ADXL345Control.setInterruptsDone(error_t error){ return; } default event void ADXL345Control.setRegisterDone(error_t error){ return; } default event void ADXL345Control.setDurationDone(error_t error){ return; } default event void ADXL345Control.setLatentDone(error_t error){ return; } default event void ADXL345Control.setWindowDone(error_t error){ return; } default event void ADXL345Control.setIntMapDone(error_t error){ return; } default event void ADXL345Control.setReadAddressDone(error_t error){ return; } default event void Int1.notify(adxlint_state_t val) { } default event void Int2.notify(adxlint_state_t val) { } /*defaut handlers end*/ event void TimeoutAlarm.fired() { if(lock && (adxlcmd == ADXLCMD_START)) { lock = FALSE; signal SplitControl.startDone(EOFF); } } command error_t Int1.enable() { call GeneralIO1.makeInput(); return call GpioInterrupt1.enableRisingEdge(); } command error_t Int2.enable() { call GeneralIO2.makeInput(); return call GpioInterrupt2.enableRisingEdge(); } command error_t Int1.disable() { return call GpioInterrupt1.disable(); } command error_t Int2.disable() { return call GpioInterrupt2.disable(); } task void sendEvent1() { signal Int1.notify( 1 ); call GpioInterrupt1.enableRisingEdge(); } task void sendEvent2() { signal Int2.notify( 1 ); call GpioInterrupt2.enableRisingEdge(); } async event void GpioInterrupt1.fired() { call GpioInterrupt1.disable(); post sendEvent1(); } async event void GpioInterrupt2.fired() { call GpioInterrupt2.disable(); post sendEvent2(); } } tinyos-2.1.2+dfsg/tos/chips/at45db/000077500000000000000000000000001207233610700167575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/at45db/At45db.h000066400000000000000000000042421207233610700201550ustar00rootroot00000000000000// $Id: At45db.h,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef AT45DB_H #define AT45DB_H #define UQ_AT45DB "at45db.resource" #include enum { AT45_ERASE, AT45_DONT_ERASE, AT45_PREVIOUSLY_ERASED }; #endif tinyos-2.1.2+dfsg/tos/chips/at45db/At45db.nc000066400000000000000000000205151207233610700203270ustar00rootroot00000000000000// $Id: At45db.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "At45db.h" /** * HAL for Atmel's AT45DB family of serial dataflash chips. This provides * reasonably high-level operations on AT45DB pages, including automatic * buffer management. Writes are only guaranteed to happen after a flush, * flushAll, sync or syncAll. *

    * When buffers are flushed to the flash (either explicitly or implicitly), * their contents are checked to ensure the write was succesful. If this * check fails, the flush is retried some number of times. If this fails * more than some number of times, all access to the flash is disabled * (all requests will report FAIL in their completion event). *

    * This interface only supports one operation at a time - components offering * At45db should use the Resource interface for resource sharing. * * @author David Gay */ interface At45db { /** * Write some data to an AT45DB page. writeDone will be signaled. * @param page Flash page to write to. Must be less than AT45_MAX_PAGES. * @param offset Offset in page at which to start writing - must be between * 0 and AT45_PAGE_SIZE - 1 * @param data Data to write. The buffer is "returned" at writeDone time. * @param n Number of bytes to write (> 0). offset + n must be <= * AT45_PAGE_SIZE */ command void write(at45page_t page, at45pageoffset_t offset, void *PASS COUNT(n) data, at45pageoffset_t n); /** * Signal completion of a write operation. The buffer passed to write * is implictly returned. * @param error SUCCESS for a successful write, FAIL otherwise */ event void writeDone(error_t error); /** * Copy one flash page to another. copyDone will be signaled. If page * from had been modified, it is first flushed to flash. Page * to will only actually be written when the buffer holding * it is flushed (see flush, flushAll, sync, syncAll). * * @param from Flash page to copy. Must be less than AT45_MAX_PAGES. * @param to Flash page to overwrite. Must be less than AT45_MAX_PAGES. */ command void copyPage(at45page_t from, at45page_t to); /** * Signal completion of a copyPage operation. * @param error SUCCESS if the copy was successful, FAIL otherwise */ event void copyPageDone(error_t error); /** * Erase an AT45DB page. eraseDone will be signaled. * @param page Flash page to erase. Must be less than AT45_MAX_PAGES. * @param eraseKind How to handle the erase: *
    AT45_ERASE: actually erase the page in the flash chip *
    AT45_DONT_ERASE: don't erase the page in the flash * chip, but reserve a buffer for this page - subsequent writes to this * page will be faster because the old contents need not be read *
    AT45_PREVIOUSLY_ERASED: assume the page was previously * erased in the flash and reserve a buffer for this page - subsequent * writes to page will be faster because the old contents need not be * read and the write itself will be faster */ command void erase(at45page_t page, uint8_t eraseKind); /** * Signal completion of an erase operation. * @param error SUCCESS if the erase was successful, FAIL otherwise */ event void eraseDone(error_t error); /** * Flush an AT45DB page from the buffers to the actual flash. syncDone * will be signaled once the flush has been completed and the buffer * contents successfully compared with the flash. If the page is not * in the buffers, syncDone will succeed "immediately". * @param page Flash page to sync. Must be less than AT45_MAX_PAGES. */ command void sync(at45page_t page); /** * Flush all AT45DB buffers to the actual flash. syncDone * will be signaled once the flush has been completed and the buffer * contents successfully compared with the flash. */ command void syncAll(); /** * Signal completion of a sync or syncAll operation. * @param error SUCCESS if the sync was successful, FAIL otherwise */ event void syncDone(error_t error); /** * Flush an AT45DB page from the buffers to the actual flash. flushDone * will be signaled once the flush has been initiated. If the page is not * in the buffers, flushDone will succeed "immediately". * @param page Flash page to sync. Must be less than AT45_MAX_PAGES. */ command void flush(at45page_t page); /** * Flush all AT45DB buffers to the actual flash. flushDone * will be signaled once the flushes have been initiated. */ command void flushAll(); /** * Signal completion of an flush or flushAll operation. * @param error SUCCESS if the flush was successful, FAIL otherwise */ event void flushDone(error_t error); /** * Read some data from an AT45DB page. readDone will be signaled. * @param page Flash page to read from. Must be less than AT45_MAX_PAGES. * @param offset Offset in page at which to start reading - must be between * 0 and AT45_PAGE_SIZE - 1 * @param data Buffer in which to place read data. The buffer is "returned" * at readDone time. * @param n Number of bytes to read (> 0). offset + n must be <= * AT45_PAGE_SIZE */ command void read(at45page_t page, at45pageoffset_t offset, void *PASS COUNT(n) data, at45pageoffset_t n); /** * Signal completion of a read operation. The buffer passed to read * is implictly returned. * @param error SUCCESS for a successful read, FAIL otherwise */ event void readDone(error_t error); /** * Compute the CRC of some data from an AT45DB page (using the CRC * function from crc.h). computeCrcDone will be signaled. * @param page Flash page to read from. Must be less than AT45_MAX_PAGES. * @param offset Offset in page at which to start reading - must be between * 0 and AT45_PAGE_SIZE - 1 * @param n Number of bytes to read (> 0). offset + n must be <= * AT45_PAGE_SIZE * @param baseCrc initial CRC value - use 0 if computing a "standalone" * CRC, or a previous computeCrc result if computing a CRC over several * flash pages */ command void computeCrc(at45page_t page, at45pageoffset_t offset, at45pageoffset_t n, uint16_t baseCrc); /** * Signal completion of a CRC computation. * @param error SUCCESS if the CRC was successfully computed, FAIL otherwise * @param crc CRC value (valid only if error == SUCCESS) */ event void computeCrcDone(error_t error, uint16_t crc); } tinyos-2.1.2+dfsg/tos/chips/at45db/At45dbBlockConfig.nc000066400000000000000000000033651207233610700224340ustar00rootroot00000000000000// $Id: At45dbBlockConfig.nc,v 1.5 2008-06-11 00:46:23 razvanm Exp $ /* * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Private interface between the AT45DB implementations of config and block storage * * @author: David Gay */ interface At45dbBlockConfig { /** * Check if this block is a config volumes * @return TRUE for config volumes, FALSE for block volumes */ command int isConfig(); /** * Query which half of the block is used by the current config state * @return TRUE for 2nd half, FALSE for 1st half */ command int flipped(); /** * Hook called by block storage just before the start of each write * @return TRUE to delay the write until writeContinue * is called, FALSE to proceed immediately. */ command int writeHook(); /** * Continue or abort write suspended as a result of a writeHook * event * @param error SUCCESS to continue write, anything else to abort write * returning that error code */ event void writeContinue(error_t error); /** * Return size of a config volume in pages (half of the actual block) * @return Config volume size */ event at45page_t npages(); /** * Map a volume-relative page to an absolute flash page, taking account * of the current flipped status * @param page Volume-relative page * @return Actual flash page for page */ event at45page_t remap(at45page_t page); } tinyos-2.1.2+dfsg/tos/chips/at45db/At45dbC.nc000066400000000000000000000022061207233610700204270ustar00rootroot00000000000000// $Id: HALAT45DBC.nc,v 1.1 2005/01/22 00:26:31 idgay Exp /* * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * HAL for Atmel's AT45DB family of serial dataflash chips. Access to the HAL * is controlled by a parameterised Resource interface - client ids are * obtained with unique(UQ_AT45DB). * * @author David Gay */ #include "At45db.h" configuration At45dbC { provides { interface At45db; interface Resource[uint8_t client]; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { components At45dbP, HplAt45dbC, MainC, BusyWaitMicroC; components new FcfsArbiterC(UQ_AT45DB) as Arbiter; At45db = At45dbP; Resource = Arbiter; ResourceDefaultOwner = Arbiter; ArbiterInfo = Arbiter; MainC.SoftwareInit -> At45dbP; At45dbP.HplAt45db -> HplAt45dbC; At45dbP.BusyWait -> BusyWaitMicroC; } tinyos-2.1.2+dfsg/tos/chips/at45db/At45dbP.nc000066400000000000000000000303161207233610700204470ustar00rootroot00000000000000// $Id: At45dbP.nc,v 1.11 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "crc.h" #include "At45db.h" #include "Timer.h" /** * Private componenent for the Atmel's AT45DB HAL. * * @author David Gay */ module At45dbP @safe() { provides { interface Init; interface At45db; } uses { interface HplAt45db; interface BusyWait; } } implementation { #define CHECKARGS #if 0 uint8_t work[20]; uint8_t woffset; void wdbg(uint8_t x) { work[woffset++] = x; if (woffset == sizeof work) woffset = 0; } #else #define wdbg(n) #endif enum { // requests IDLE, R_READ, R_READCRC, R_WRITE, R_ERASE, R_COPY, R_SYNC, R_SYNCALL, R_FLUSH, R_FLUSHALL, BROKEN // Write failed. Fail all subsequent requests. }; uint8_t request; at45pageoffset_t reqOffset, reqBytes; uint8_t * COUNT_NOK(reqBytes) reqBuf; at45page_t reqPage; enum { P_READ, P_READCRC, P_WRITE, P_FLUSH, P_FILL, P_ERASE, P_COMPARE, P_COMPARE_CHECK }; struct { at45page_t page; bool busy : 1; bool clean : 1; bool erased : 1; uint8_t unchecked : 2; } buffer[2]; uint8_t selected; // buffer used by the current op uint8_t checking; bool flashBusy; // Select a command for the current buffer #define OPN(n, name) ((n) ? name ## 1 : name ## 2) #define OP(name) OPN(selected, name) command error_t Init.init() { request = IDLE; flashBusy = TRUE; // pretend we're on an invalid non-existent page buffer[0].page = buffer[1].page = AT45_MAX_PAGES; buffer[0].busy = buffer[1].busy = FALSE; buffer[0].clean = buffer[1].clean = TRUE; buffer[0].unchecked = buffer[1].unchecked = 0; buffer[0].erased = buffer[1].erased = FALSE; return SUCCESS; } void flashIdle() { flashBusy = buffer[0].busy = buffer[1].busy = FALSE; } void requestDone(error_t result, uint16_t computedCrc, uint8_t newState); void handleRWRequest(); task void taskSuccess() { requestDone(SUCCESS, 0, IDLE); } task void taskFail() { requestDone(FAIL, 0, IDLE); } void checkBuffer(uint8_t buf) { if (flashBusy) { call HplAt45db.waitIdle(); return; } call HplAt45db.compare(OPN(buf, AT45_C_COMPARE_BUFFER), buffer[buf].page); checking = buf; } void flushBuffer() { if (flashBusy) { call HplAt45db.waitIdle(); return; } call HplAt45db.flush(buffer[selected].erased ? OP(AT45_C_QFLUSH_BUFFER) : OP(AT45_C_FLUSH_BUFFER), buffer[selected].page); } event void HplAt45db.waitIdleDone() { flashIdle(); // Eager compare - this steals the current command #if 0 if ((buffer[0].unchecked || buffer[1].unchecked) && cmdPhase != P_COMPARE) checkBuffer(buffer[0].unchecked ? 0 : 1); else #endif handleRWRequest(); } event void HplAt45db.waitCompareDone(bool ok) { flashIdle(); if (ok) buffer[checking].unchecked = 0; else if (buffer[checking].unchecked < 2) buffer[checking].clean = FALSE; else { requestDone(FAIL, 0, BROKEN); return; } handleRWRequest(); } event void HplAt45db.readDone() { requestDone(SUCCESS, 0, IDLE); } event void HplAt45db.writeDone() { buffer[selected].clean = FALSE; buffer[selected].unchecked = 0; requestDone(SUCCESS, 0, IDLE); } event void HplAt45db.crcDone(uint16_t crc) { requestDone(SUCCESS, crc, IDLE); } event void HplAt45db.flushDone() { flashBusy = TRUE; buffer[selected].clean = buffer[selected].busy = TRUE; buffer[selected].unchecked++; buffer[selected].erased = FALSE; handleRWRequest(); } event void HplAt45db.compareDone() { flashBusy = TRUE; buffer[checking].busy = TRUE; // The 10us wait makes old mica motes (Atmega 103) happy, for // some mysterious reason (w/o this wait, the first compare // always fails, even though the compare after the rewrite // succeeds...) call BusyWait.wait(10); call HplAt45db.waitCompare(); } event void HplAt45db.fillDone() { flashBusy = TRUE; buffer[selected].page = reqPage; buffer[selected].clean = buffer[selected].busy = TRUE; buffer[selected].erased = FALSE; handleRWRequest(); } event void HplAt45db.eraseDone() { flashBusy = TRUE; // The buffer contains garbage, but we don't care about the state // of bits on this page anyway (if we do, we'll perform a // subsequent write) buffer[selected].page = reqPage; buffer[selected].clean = TRUE; buffer[selected].erased = TRUE; requestDone(SUCCESS, 0, IDLE); } void syncOrFlushAll(uint8_t newReq); void handleRWRequest() { if (reqPage == buffer[selected].page) switch (request) { case R_ERASE: switch (reqOffset) { case AT45_ERASE: if (flashBusy) call HplAt45db.waitIdle(); else call HplAt45db.erase(AT45_C_ERASE_PAGE, reqPage); break; case AT45_PREVIOUSLY_ERASED: // We believe the user... buffer[selected].erased = TRUE; /* Fallthrough */ case AT45_DONT_ERASE: // The buffer contains garbage, but we don't care about the state // of bits on this page anyway (if we do, we'll perform a // subsequent write) buffer[selected].clean = TRUE; requestDone(SUCCESS, 0, IDLE); break; } break; case R_COPY: if (!buffer[selected].clean) // flush any modifications flushBuffer(); else { // Just redesignate as destination page, and mark it dirty. // It will eventually be flushed, completing the copy. buffer[selected].page = reqOffset; buffer[selected].clean = FALSE; post taskSuccess(); } break; case R_SYNC: case R_SYNCALL: if (buffer[selected].clean && buffer[selected].unchecked) { checkBuffer(selected); return; } /* fall through */ case R_FLUSH: case R_FLUSHALL: if (!buffer[selected].clean) flushBuffer(); else if (request == R_FLUSH || request == R_SYNC) post taskSuccess(); else { // Check for more dirty pages uint8_t oreq = request; request = IDLE; syncOrFlushAll(oreq); } break; case R_READ: if (buffer[selected].busy) call HplAt45db.waitIdle(); else call HplAt45db.readBuffer(OP(AT45_C_READ_BUFFER), reqOffset, reqBuf, reqBytes); break; case R_READCRC: if (buffer[selected].busy) call HplAt45db.waitIdle(); else /* Hack: baseCrc was stored in reqBuf */ call HplAt45db.crc(OP(AT45_C_READ_BUFFER), 0, reqOffset, reqBytes, (uint16_t)reqBuf); break; case R_WRITE: if (buffer[selected].busy) call HplAt45db.waitIdle(); else call HplAt45db.write(OP(AT45_C_WRITE_BUFFER), 0, reqOffset, reqBuf, reqBytes); break; } else if (!buffer[selected].clean) flushBuffer(); else if (buffer[selected].unchecked) checkBuffer(selected); else { // just get the new page (except for erase) if (request == R_ERASE) { buffer[selected].page = reqPage; handleRWRequest(); } else if (flashBusy) call HplAt45db.waitIdle(); else call HplAt45db.fill(OP(AT45_C_FILL_BUFFER), reqPage); } } void requestDone(error_t result, uint16_t computedCrc, uint8_t newState) { uint8_t orequest = request; request = newState; switch (orequest) { case R_READ: signal At45db.readDone(result); break; case R_READCRC: signal At45db.computeCrcDone(result, computedCrc); break; case R_WRITE: signal At45db.writeDone(result); break; case R_SYNC: case R_SYNCALL: signal At45db.syncDone(result); break; case R_FLUSH: case R_FLUSHALL: signal At45db.flushDone(result); break; case R_ERASE: signal At45db.eraseDone(result); break; case R_COPY: signal At45db.copyPageDone(result); break; } } void newRequest(uint8_t req, at45page_t page, at45pageoffset_t offset, void * COUNT_NOK(n) reqdata, at45pageoffset_t n) { request = req; reqBuf = NULL; reqBytes = n; reqBuf = reqdata; reqPage = page; reqOffset = offset; if (page == buffer[0].page) selected = 0; else if (page == buffer[1].page) selected = 1; else selected = !selected; // LRU with 2 buffers... #ifdef CHECKARGS if (page >= AT45_MAX_PAGES || n > AT45_PAGE_SIZE || (req != R_COPY && offset >= AT45_PAGE_SIZE) || (req != R_COPY && offset + n > AT45_PAGE_SIZE) || (req == R_COPY && offset >= AT45_MAX_PAGES)) { post taskFail(); } else #endif handleRWRequest(); } command void At45db.read(at45page_t page, at45pageoffset_t offset, void *reqdata, at45pageoffset_t n) { newRequest(R_READ, page, offset, reqdata, n); } command void At45db.computeCrc(at45page_t page, at45pageoffset_t offset, at45pageoffset_t n, uint16_t baseCrc) { /* This is a hack (store crc in reqBuf), but it saves 2 bytes of RAM */ newRequest(R_READCRC, page, offset, TCAST(uint8_t * COUNT(n), baseCrc), n); } command void At45db.write(at45page_t page, at45pageoffset_t offset, void *reqdata, at45pageoffset_t n) { newRequest(R_WRITE, page, offset, reqdata, n); } command void At45db.erase(at45page_t page, uint8_t eraseKind) { newRequest(R_ERASE, page, eraseKind, NULL, 0); } command void At45db.copyPage(at45page_t from, at45page_t to) { /* Assumes at45pageoffset_t can hold an at45page_t. A little icky */ newRequest(R_COPY, from, to, NULL, 0); } void syncOrFlush(at45page_t page, uint8_t newReq) { request = newReq; if (buffer[0].page == page) selected = 0; else if (buffer[1].page == page) selected = 1; else { post taskSuccess(); return; } buffer[selected].unchecked = 0; handleRWRequest(); } command void At45db.sync(at45page_t page) { syncOrFlush(page, R_SYNC); } command void At45db.flush(at45page_t page) { syncOrFlush(page, R_FLUSH); } void syncOrFlushAll(uint8_t newReq) { request = newReq; if (!buffer[0].clean) selected = 0; else if (!buffer[1].clean) selected = 1; else { post taskSuccess(); return; } buffer[selected].unchecked = 0; handleRWRequest(); } command void At45db.syncAll() { syncOrFlushAll(R_SYNCALL); } command void At45db.flushAll() { syncOrFlushAll(R_FLUSHALL); } } tinyos-2.1.2+dfsg/tos/chips/at45db/At45dbStorageManagerC.nc000066400000000000000000000020011207233610700232400ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * HAL component providing information on the flash volumes. * * @author: David Gay */ module At45dbStorageManagerC @safe() { provides interface At45dbVolume[volume_id_t volid]; } implementation { command at45page_t At45dbVolume.remap[volume_id_t volid](at45page_t volumePage) { switch (volid) { #define VB(id, base) case id: return volumePage + base; #include "StorageVolumes.h" default: return AT45_MAX_PAGES; } } command at45page_t At45dbVolume.volumeSize[volume_id_t volid]() { switch (volid) { #define VS(id, size) case id: return size; #include "StorageVolumes.h" default: return 0; } } } tinyos-2.1.2+dfsg/tos/chips/at45db/At45dbVolume.nc000066400000000000000000000015051207233610700215150ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "At45db.h" /** * AT45DB interface for managing flash volumes. * * @author David Gay */ interface At45dbVolume { /** * Map a volume page to the corresponding page in the whole flash * @return What flash page this volume page maps to, or * AT45_MAX_PAGES for invalid volumes */ command at45page_t remap(at45page_t volumePage); /** * Find the flash volume size * @return Flash volume size in pages */ command at45page_t volumeSize(); } tinyos-2.1.2+dfsg/tos/chips/at45db/BlockStorageC.nc000066400000000000000000000023331207233610700217640ustar00rootroot00000000000000// $Id: BlockStorageC.nc,v 1.4 2006-12-12 18:23:02 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation of the block storage abstraction from TEP103 for the * Atmel AT45DB serial data flash. * * @param volid Volume to use for block storage * * @author David Gay */ #include "Storage.h" generic configuration BlockStorageC(volume_id_t volid) { provides { interface BlockWrite; interface BlockRead; } } implementation { enum { BLOCK_ID = unique(UQ_BLOCK_STORAGE) + uniqueCount(UQ_CONFIG_STORAGE), RESOURCE_ID = unique(UQ_AT45DB) }; components BlockStorageP, WireBlockStorageP, At45dbStorageManagerC, At45dbC; BlockWrite = BlockStorageP.BlockWrite[BLOCK_ID]; BlockRead = BlockStorageP.BlockRead[BLOCK_ID]; BlockStorageP.At45dbVolume[BLOCK_ID] -> At45dbStorageManagerC.At45dbVolume[volid]; BlockStorageP.Resource[BLOCK_ID] -> At45dbC.Resource[RESOURCE_ID]; } tinyos-2.1.2+dfsg/tos/chips/at45db/BlockStorageP.nc000066400000000000000000000310011207233610700217730ustar00rootroot00000000000000// $Id: BlockStorageP.nc,v 1.10 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Private component of the AT45DB implementation of the block storage * abstraction. * * @author: Jonathan Hui * @author: David Gay */ #include "Storage.h" module BlockStorageP @safe() { provides { interface BlockWrite[uint8_t blockId]; interface BlockRead[uint8_t blockId]; } uses { interface At45db; interface At45dbVolume[uint8_t blockId]; interface Resource[uint8_t blockId]; interface At45dbBlockConfig as BConfig[uint8_t blockId]; } } implementation { /* The AT45DB block storage implementation simply provides direct read/write access to the underlying pages of the volume. Random writes to the block storage will thus lead to pages being erased/programmed many times (there is a 2 page cache, but random writes are unlikely to hit in it). The cache is only flushed on sync. The first page of a block storage volume stores the maximum address written in the block and a CRC of the block's contents (up to that maximum address). This CRC is written at sync time and verified at validate time. This BlockStorage code is reused in the implementation of ConfigStorage. See the ConfigStorageP component and the At45dbBlockConfig interface for more discussion. If there are m ConfigStorage volumes and n BlockStorage volumes, the ids 0..m-1 are for ConfigStorage and m..m+n-1 are for BlockStorage. */ enum { R_IDLE, R_WRITE, R_ERASE, R_SYNC, R_READ, R_CRC, }; enum { N = uniqueCount(UQ_BLOCK_STORAGE) + uniqueCount(UQ_CONFIG_STORAGE), NO_CLIENT = 0xff }; uint8_t client = NO_CLIENT; storage_addr_t currentOffset; struct { /* The latest request made for this client, and it's arguments */ uint8_t request; /* automatically initialised to R_IDLE */ uint8_t * COUNT_NOK(len) buf; storage_addr_t addr; storage_len_t len; } s[N]; /* ------------------------------------------------------------------ */ /* Interface with ConfigStorageP (see also writeHook call below) */ /* ------------------------------------------------------------------ */ at45page_t pageRemap(at45page_t p) { return signal BConfig.remap[client](p); } event at45page_t BConfig.npages[uint8_t id]() { return call At45dbVolume.volumeSize[id]() >> 1; } event at45page_t BConfig.remap[uint8_t id](at45page_t page) { if (call BConfig.isConfig[id]() && call BConfig.flipped[id]()) page += signal BConfig.npages[id](); return call At45dbVolume.remap[id](page); } default command int BConfig.isConfig[uint8_t blockId]() { return FALSE; } default command int BConfig.flipped[uint8_t blockId]() { return FALSE; } /* ------------------------------------------------------------------ */ /* Queue and initiate user requests */ /* ------------------------------------------------------------------ */ void eraseStart(); void syncStart(); void multipageStart(uint16_t crc); void startRequest() { switch (s[client].request) { case R_ERASE: eraseStart(); break; case R_SYNC: syncStart(); break; default: multipageStart((uint16_t)s[client].buf); } } void endRequest(error_t result, uint16_t crc) { uint8_t c = client; uint8_t tmpState = s[c].request; client = NO_CLIENT; s[c].request = R_IDLE; call Resource.release[c](); switch(tmpState) { case R_READ: signal BlockRead.readDone[c](s[c].addr, s[c].buf, currentOffset, result); break; case R_WRITE: signal BlockWrite.writeDone[c](s[c].addr, s[c].buf, currentOffset, result); break; case R_ERASE: signal BlockWrite.eraseDone[c](result); break; case R_CRC: signal BlockRead.computeCrcDone[c](s[c].addr, currentOffset, crc, result); break; case R_SYNC: signal BlockWrite.syncDone[c](result); break; } } error_t newRequest(uint8_t newState, uint8_t id, storage_addr_t addr, uint8_t* COUNT_NOK(len) buf, storage_len_t len) { storage_len_t vsize; if (s[id].request != R_IDLE) return EBUSY; vsize = call BlockRead.getSize[id](); if (addr > vsize || len > vsize - addr) return EINVAL; s[id].request = newState; s[id].addr = addr; /* With deputy, updating a buffer/length pair requires nulling-out the buffer first (setting the buffer first would fail if the new buffer is shorter than the old, setting the length first would fail if the new buffer is longer than the old) */ s[id].buf = NULL; s[id].len = len; s[id].buf = buf; call Resource.request[id](); return SUCCESS; } event void Resource.granted[uint8_t blockId]() { client = blockId; if (s[blockId].request == R_WRITE && call BConfig.writeHook[blockId]()) { /* Config write intercept. We'll get a writeContinue when it's time to resume. */ client = NO_CLIENT; return; } startRequest(); } default command int BConfig.writeHook[uint8_t blockId]() { return FALSE; } event void BConfig.writeContinue[uint8_t blockId](error_t error) { /* Config intercept complete. Resume operation. */ client = blockId; if (error == SUCCESS) startRequest(); else endRequest(error, 0); } /* ------------------------------------------------------------------ */ /* Multipage operations */ /* ------------------------------------------------------------------ */ void multipageContinue(uint16_t crc) { storage_addr_t remaining = s[client].len - currentOffset, addr; at45page_t page; at45pageoffset_t pageOffset, count; uint8_t *buf = s[client].buf; if (remaining == 0) { endRequest(SUCCESS, crc); return; } addr = s[client].addr + currentOffset; page = pageRemap(addr >> AT45_PAGE_SIZE_LOG2); pageOffset = addr & ((1 << AT45_PAGE_SIZE_LOG2) - 1); count = (1 << AT45_PAGE_SIZE_LOG2) - pageOffset; if (remaining < count) count = remaining; switch (s[client].request) { case R_WRITE: call At45db.write(page, pageOffset, buf + currentOffset, count); break; case R_READ: call At45db.read(page, pageOffset, buf + currentOffset, count); break; case R_CRC: call At45db.computeCrc(page, pageOffset, count, crc); break; } currentOffset += count; } void multipageStart(uint16_t crc) { currentOffset = 0; multipageContinue(crc); } void multipageOpDone(error_t result, uint16_t crc) { if (result != SUCCESS) endRequest(result, 0); else multipageContinue(crc); } /* ------------------------------------------------------------------ */ /* Erase */ /* ------------------------------------------------------------------ */ command error_t BlockWrite.erase[uint8_t id]() { return newRequest(R_ERASE, id, 0, NULL, 0); } void eraseStart() { call At45db.erase(pageRemap(0), AT45_ERASE); } void eraseEraseDone(error_t error) { endRequest(error, 0); } /* ------------------------------------------------------------------ */ /* Write */ /* ------------------------------------------------------------------ */ command error_t BlockWrite.write[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { return newRequest(R_WRITE, id, addr, buf, len); } /* ------------------------------------------------------------------ */ /* Sync */ /* ------------------------------------------------------------------ */ command error_t BlockWrite.sync[uint8_t id]() { return newRequest(R_SYNC, id, 0, NULL, 0); } void syncStart() { call At45db.syncAll(); } void syncSyncDone(error_t error) { endRequest(error, 0); } /* ------------------------------------------------------------------ */ /* Read */ /* ------------------------------------------------------------------ */ command error_t BlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { return newRequest(R_READ, id, addr, buf, len); } /* ------------------------------------------------------------------ */ /* Compute CRC */ /* ------------------------------------------------------------------ */ command error_t BlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t basecrc) { return newRequest(R_CRC, id, addr, TCAST(void * COUNT(len),basecrc), len); } /* ------------------------------------------------------------------ */ /* Get Size */ /* ------------------------------------------------------------------ */ command storage_len_t BlockRead.getSize[uint8_t blockId]() { storage_len_t vsize; if (call BConfig.isConfig[blockId]()) vsize = signal BConfig.npages[blockId](); else vsize = call At45dbVolume.volumeSize[blockId](); return vsize << AT45_PAGE_SIZE_LOG2; } /* ------------------------------------------------------------------ */ /* Dispatch HAL operations to current user op */ /* ------------------------------------------------------------------ */ event void At45db.writeDone(error_t result) { if (client != NO_CLIENT) multipageOpDone(result, 0); } event void At45db.readDone(error_t result) { if (client != NO_CLIENT) multipageOpDone(result, 0); } event void At45db.computeCrcDone(error_t result, uint16_t newCrc) { if (client != NO_CLIENT) multipageOpDone(result, newCrc); } event void At45db.eraseDone(error_t result) { if (client != NO_CLIENT) eraseEraseDone(result); } event void At45db.syncDone(error_t result) { if (client != NO_CLIENT) syncSyncDone(result); } event void At45db.flushDone(error_t result) { } event void At45db.copyPageDone(error_t error) { } default event void BlockWrite.writeDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t result) { } default event void BlockWrite.eraseDone[uint8_t id](error_t result) { } default event void BlockWrite.syncDone[uint8_t id](error_t result) { } default event void BlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t result) { } default event void BlockRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t x, error_t result) { } default command at45page_t At45dbVolume.remap[uint8_t id](at45page_t volumePage) { return 0; } default command at45page_t At45dbVolume.volumeSize[uint8_t id]() { return 0; } default async command error_t Resource.request[uint8_t id]() { return FAIL; } default async command error_t Resource.release[uint8_t id]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/at45db/ConfigStorageC.nc000066400000000000000000000023641207233610700221430ustar00rootroot00000000000000// $Id: ConfigStorageC.nc,v 1.4 2006-12-12 18:23:02 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation of the config storage abstraction from TEP103 for the * Atmel AT45DB serial data flash. * * @param volid Volume to use for config storage * * @author David Gay */ #include "Storage.h" generic configuration ConfigStorageC(volume_id_t volid) { provides { interface Mount; interface ConfigStorage; } } implementation { enum { CONFIG_ID = unique(UQ_CONFIG_STORAGE), RESOURCE_ID = unique(UQ_AT45DB) }; components ConfigStorageP, WireConfigStorageP, At45dbStorageManagerC, At45dbC; components BlockStorageP, WireBlockStorageP; Mount = ConfigStorageP.Mount[CONFIG_ID]; ConfigStorage = ConfigStorageP.ConfigStorage[CONFIG_ID]; BlockStorageP.At45dbVolume[CONFIG_ID] -> At45dbStorageManagerC.At45dbVolume[volid]; BlockStorageP.Resource[CONFIG_ID] -> At45dbC.Resource[RESOURCE_ID]; } tinyos-2.1.2+dfsg/tos/chips/at45db/ConfigStorageP.nc000066400000000000000000000277041207233610700221650ustar00rootroot00000000000000// $Id: ConfigStorageP.nc,v 1.7 2008-06-23 20:25:15 regehr Exp $ /* * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Private component of the AT45DB implementation of the config storage * abstraction. * * @author: David Gay */ #include "Storage.h" #include "crc.h" module ConfigStorageP @safe() { provides { interface Mount[uint8_t id]; interface ConfigStorage[uint8_t id]; interface At45dbBlockConfig as BConfig[uint8_t id]; } uses { interface At45db; interface BlockRead[uint8_t id]; interface BlockWrite[uint8_t id]; } } implementation { /* A config storage is built on top of a block storage volume, with the block storage volume divided into two and the first 4 bytes of each half holding a (>0) version number. The valid half with the highest version number is the current version. Transactional behaviour is achieved by copying the current half into the other, then increment its version number. Writes then proceed in that new half until a commit, which just uses the underlying BlockStorage commit's operation. Note: all of this depends on the at45db's implementation of BlockStorageP. It will not work over an arbitrary BlockStorageP implementation (additionally, it uses hooks in BlockStorageP to support the half-volume operation). Additionally, the code assumes that the config volumes all have lower ids than the block volumes. */ enum { S_STOPPED, S_MOUNT, S_COMMIT, S_CLEAN, S_DIRTY, S_INVALID }; enum { N = uniqueCount(UQ_CONFIG_STORAGE), NO_CLIENT = 0xff, }; /* Per-client state. We could keep just the state and current version in an array, but this requires more complex arbitration (don't release block storage during mount or commit). As I don't expect many config volumes, this doesn't seem worth the trouble. */ struct { uint8_t state : 3; uint8_t committing : 1; } s[N]; nx_struct { nx_uint16_t crc; nx_uint32_t version; } low[N], high[N]; /* Bit n is true if client n is using upper block */ uint8_t flipState[(N + 7) / 8]; uint8_t client = NO_CLIENT; at45page_t nextPage; void setFlip(uint8_t id, bool flip) { if (flip) flipState[id >> 3] |= 1 << (id & 7); else flipState[id >> 3] &= ~(1 << (id & 7)); } bool flipped(uint8_t id) { return call BConfig.flipped[id](); } void flip(uint8_t id) { setFlip(id, !flipped(id)); } storage_len_t volumeSize(uint8_t id) { return call BlockRead.getSize[id](); } /* ------------------------------------------------------------------ */ /* Mounting */ /* ------------------------------------------------------------------ */ command error_t Mount.mount[uint8_t id]() { /* Read version on both halves. Validate higher. Validate lower if higher invalid. Use lower if both invalid. */ if (s[id].state != S_STOPPED) return FAIL; s[id].state = S_MOUNT; setFlip(id, FALSE); call BlockRead.read[id](0, &low[id], sizeof low[id]); return SUCCESS; } void computeCrc(uint8_t id) { call BlockRead.computeCrc[id](sizeof(nx_uint16_t), volumeSize(id) - sizeof(nx_uint16_t), 0); } void mountReadDone(uint8_t id, error_t error) { if (error != SUCCESS) { s[id].state = S_STOPPED; signal Mount.mountDone[id](FAIL); } else if (!call BConfig.flipped[id]()) { /* Just read low-half version. Read high-half version */ setFlip(id, TRUE); call BlockRead.read[id](0, &high[id], sizeof high[id]); } else { /* Verify the half with the largest version */ setFlip(id, high[id].version > low[id].version); computeCrc(id); } } void mountCrcDone(uint8_t id, uint16_t crc, error_t error) { bool isflipped = call BConfig.flipped[id](); if (error == SUCCESS && crc == (isflipped ? high[id].crc : low[id].crc)) { /* We just use the low data once mounted */ if (isflipped) low[id].version = high[id].version; s[id].state = S_CLEAN; } else { // try the other half? if ((high[id].version > low[id].version) == isflipped) { /* Verification of the half with the highest version failed. Try the other half. */ setFlip(id, !isflipped); computeCrc(id); return; } /* Both halves bad, terminate. Reads will fail. */ s[id].state = S_INVALID; low[id].version = 0; } signal Mount.mountDone[id](SUCCESS); } /* ------------------------------------------------------------------ */ /* Read */ /* ------------------------------------------------------------------ */ command error_t ConfigStorage.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { /* Read from current half using BlockRead */ if (s[id].state < S_CLEAN) return EOFF; if (s[id].state == S_INVALID) // nothing to read return FAIL; return call BlockRead.read[id](addr + sizeof low[0], buf, len); } void readReadDone(uint8_t id, storage_addr_t addr, void* COUNT(len) buf, storage_len_t len, error_t error) { signal ConfigStorage.readDone[id](addr - sizeof low[0], buf, len, error); } /* ------------------------------------------------------------------ */ /* Write */ /* ------------------------------------------------------------------ */ command error_t ConfigStorage.write[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { /* 1: If first write: copy to other half with incremented version number 2: Write to other half using BlockWrite */ if (s[id].state < S_CLEAN) return EOFF; return call BlockWrite.write[id](addr + sizeof low[0], buf, len); } void copyCopyPageDone(error_t error); void writeContinue(error_t error); command int BConfig.writeHook[uint8_t id]() { if (s[id].committing) return FALSE; flip(id); /* We write to the non-current half... */ if (s[id].state != S_CLEAN) // no copy if dirty or invalid return FALSE; /* Time to do the copy dance */ client = id; nextPage = signal BConfig.npages[id](); copyCopyPageDone(SUCCESS); return TRUE; } void copyCopyPageDone(error_t error) { if (error != SUCCESS) writeContinue(error); else if (nextPage == 0) // copy done { s[client].state = S_DIRTY; writeContinue(SUCCESS); } else { // copy next page at45page_t from, to, npages = signal BConfig.npages[client](); to = from = signal BConfig.remap[client](--nextPage); if (flipped(client)) from -= npages; else from += npages; call At45db.copyPage(from, to); } } void writeContinue(error_t error) { uint8_t id = client; client = NO_CLIENT; signal BConfig.writeContinue[id](error); } void writeWriteDone(uint8_t id, storage_addr_t addr, void* COUNT(len) buf, storage_len_t len, error_t error) { flip(id); // flip back to current half signal ConfigStorage.writeDone[id](addr - sizeof low[0], buf, len, error); } /* ------------------------------------------------------------------ */ /* Commit */ /* ------------------------------------------------------------------ */ void commitSyncDone(uint8_t id, error_t error); command error_t ConfigStorage.commit[uint8_t id]() { error_t ok; uint16_t crc; uint8_t i; if (s[id].state < S_CLEAN) return EOFF; if (s[id].state == S_CLEAN) /* A dummy CRC call to avoid signaling a completion event from here */ return call BlockRead.computeCrc[id](0, 1, 0); /* Compute CRC for new version and current contents */ flip(id); low[id].version++; for (crc = 0, i = 0; i < sizeof low[id].version; i++) crc = crcByte(crc, ((uint8_t *)&low[id] + sizeof(nx_uint16_t))[i]); ok = call BlockRead.computeCrc[id](sizeof low[id], volumeSize(id) - sizeof low[id], crc); if (ok == SUCCESS) s[id].committing = TRUE; return ok; } void commitCrcDone(uint8_t id, uint16_t crc, error_t error) { /* Weird commit of clean volume hack: we just complete now, w/o really doing anything. Ideally we should short-circuit out in the commit call, but that would break the "no-signal-from-command" rule. So we just waste the CRC computation effort instead - the assumption is people don't regularly commit clean volumes. */ if (s[id].state == S_CLEAN) signal ConfigStorage.commitDone[id](error); else if (error != SUCCESS) commitSyncDone(id, error); else { low[id].crc = crc; call BlockWrite.write[id](0, &low[id], sizeof low[id]); } } void commitWriteDone(uint8_t id, error_t error) { if (error != SUCCESS) commitSyncDone(id, error); else call BlockWrite.sync[id](); } void commitSyncDone(uint8_t id, error_t error) { s[id].committing = FALSE; if (error == SUCCESS) s[id].state = S_CLEAN; else flip(id); // revert to old block signal ConfigStorage.commitDone[id](error); } /* ------------------------------------------------------------------ */ /* Get Size */ /* ------------------------------------------------------------------ */ command storage_len_t ConfigStorage.getSize[uint8_t id]() { return volumeSize(id) - sizeof low[0]; } /* ------------------------------------------------------------------ */ /* Valid */ /* ------------------------------------------------------------------ */ command bool ConfigStorage.valid[uint8_t id]() { return s[id].state != S_INVALID; } /* ------------------------------------------------------------------ */ /* Interface with BlockStorageP */ /* ------------------------------------------------------------------ */ /* The config volumes use the low block volume numbers. So a volume is a config volume iff its its id is less than N */ command int BConfig.isConfig[uint8_t id]() { return id < N; } inline command int BConfig.flipped[uint8_t id]() { return (flipState[id >> 3] & (1 << (id & 7))) != 0; } event void BlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { if (id < N) if (s[id].state == S_MOUNT) mountReadDone(id, error); else readReadDone(id, addr, buf, len, error); } event void BlockWrite.writeDone[uint8_t id]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) { if (id < N) if (s[id].committing) commitWriteDone(id, error); else writeWriteDone(id, addr, buf, len, error); } event void BlockWrite.syncDone[uint8_t id]( error_t error ) { if (id < N) commitSyncDone(id, error); } event void BlockRead.computeCrcDone[uint8_t id]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error ) { if (id < N) if (s[id].state == S_MOUNT) mountCrcDone(id, crc, error); else commitCrcDone(id, crc, error); } event void At45db.copyPageDone(error_t error) { if (client != NO_CLIENT) copyCopyPageDone(error); } event void BlockWrite.eraseDone[uint8_t id](error_t error) {} event void At45db.eraseDone(error_t error) {} event void At45db.syncDone(error_t error) {} event void At45db.flushDone(error_t error) {} event void At45db.readDone(error_t error) {} event void At45db.computeCrcDone(error_t error, uint16_t crc) {} event void At45db.writeDone(error_t error) {} default event void Mount.mountDone[uint8_t id](error_t error) { } default event void ConfigStorage.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void ConfigStorage.writeDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void ConfigStorage.commitDone[uint8_t id](error_t error) {} } tinyos-2.1.2+dfsg/tos/chips/at45db/HplAt45db.h000066400000000000000000000020421207233610700206150ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef HPLAT45DB_H #define HPLAT45DB_H #include "HplAt45db_chip.h" enum { // commands we're executing (all SPI Mode 0 or 3) AT45_C_READ_BUFFER1 = 0xd4, AT45_C_READ_BUFFER2 = 0xd6, AT45_C_READ_CONTINUOUS = 0xe8, AT45_C_READ_PAGE = 0xd2, AT45_C_WRITE_BUFFER1 = 0x84, AT45_C_WRITE_BUFFER2 = 0x87, AT45_C_WRITE_MEM_BUFFER1 = 0x82, AT45_C_WRITE_MEM_BUFFER2 = 0x85, AT45_C_FILL_BUFFER1 = 0x53, AT45_C_FILL_BUFFER2 = 0x55, AT45_C_FLUSH_BUFFER1 = 0x83, AT45_C_FLUSH_BUFFER2 = 0x86, AT45_C_QFLUSH_BUFFER1 = 0x88, AT45_C_QFLUSH_BUFFER2 = 0x89, AT45_C_COMPARE_BUFFER1 = 0x60, AT45_C_COMPARE_BUFFER2 = 0x61, AT45_C_REQ_STATUS = 0xd7, AT45_C_ERASE_PAGE = 0x81, }; #endif tinyos-2.1.2+dfsg/tos/chips/at45db/HplAt45db.nc000066400000000000000000000151301207233610700207700ustar00rootroot00000000000000/* * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * HPL for Atmel's AT45DB family of serial dataflash chips. * Provides access to all basic AT45DB operations plus operations to * wait for the flash to go idle or finish a comparison. See the AT45DB * family datasheets for full details on these operations. *

    * This interface only supports one operation at a time. * * @author David Gay */ #include "HplAt45db.h" interface HplAt45db { /** * Wait for a "Group A" operation to complete (essentially all non-buffer * operations). You should use waitComapre if you are waiting for a * comparison to complete. waitIdleDone will be signaled when the operation * is complete. */ command void waitIdle(); /** * Signaled when the flash is idle. */ event void waitIdleDone(); /** * Wait for a buffer-flash comparison to complete. waitCompareDone will * be signaled when that occurs. */ command void waitCompare(); /** * Signaled when the buffer-flash comparison is complete. * @param compareOk TRUE if the comparison succeeded, FALSE otherwise. */ event void waitCompareDone(bool compareOk); /** * Read a page from flash into a buffer. fillDone will be signaled. * @param cmd AT45_C_FILL_BUFFER1 to read into buffer 1, * AT45_C_FILL_BUFFER2 to read into buffer 2 * @param page Page to read (must be less than AT45_MAX_PAGES) */ command void fill(uint8_t cmd, at45page_t page); /** * Signaled when fill command sent (use waitIdle to detect when * fill command completes) */ event void fillDone(); /** * Write a buffer to a flash page. flushDone will be signaled. * @param cmd AT45_C_FLUSH_BUFFER1 to write buffer 1 to flash, * AT45_C_FLUSH_BUFFER2 to write buffer 2 to flash, * AT45_C_QFLUSH_BUFFER1 to write buffer 1 to flash w/o erase * (page must have been previously erased), * AT45_C_QFLUSH_BUFFER2 to write buffer 2 to flash w/o erase * (page must have been previously erased), * @param page Page to write (must be less than AT45_MAX_PAGES) */ command void flush(uint8_t cmd, at45page_t page); /** * Signaled when flush command sent (use waitIdle to detect when * flush command completes) */ event void flushDone(); /** * Compare a page from flash with a buffer. compareDone will be signaled. * @param cmd AT45_C_COMPARE_BUFFER1 to compare buffer 1, * AT45_C_COMPARE_BUFFER2 to compare buffer 2 * @param page Page to compare with (must be less than AT45_MAX_PAGES) */ command void compare(uint8_t cmd, at45page_t page); /** * Signaled when compare command sent (use waitCompare to detect when * compare command completes and find out comparison result) */ event void compareDone(); /** * Erase a flash page. eraseDone will be signaled. * @param cmd must be AT45_C_ERASE_PAGE * @param page Page to compare with (must be less than AT45_MAX_PAGES) */ command void erase(uint8_t cmd, at45page_t page); /** * Signaled when erase command sent (use waitIdle to detect when * erase command completes) */ event void eraseDone(); /** * Read from a flash buffer. readDone will be signaled. * @param cmd AT45_C_READ_BUFFER1 to read from buffer 1, * AT45_C_READ_BUFFER2 to read from buffer 2 * @param offset Offset in page at which to start reading - must be between * 0 and AT45_PAGE_SIZE - 1 * @param data Buffer in which to place read data. The buffer is "returned" * at readDone time. * @param n Number of bytes to read (> 0). offset + n must be <= * AT45_PAGE_SIZE */ command void readBuffer(uint8_t cmd, at45pageoffset_t offset, uint8_t *PASS COUNT_NOK(n) data, uint16_t n); /** * Read directly from flash. readDone will be signaled. * @param cmd AT45_C_READ_CONTINUOUS or AT45_C_READ_PAGE. When the end of * a page is read, AT45_C_READ_CONTINUOUS continues on the next page, * while AT45_C_READ_PAGE continues at the start of the same page. * @param page Page to read from * @param offset Offset in page at which to start reading - must be between * 0 and AT45_PAGE_SIZE - 1 * @param data Buffer in which to place read data. The buffer is "returned" * at readDone time. * @param n Number of bytes to read (> 0). */ command void read(uint8_t cmd, at45page_t page, at45pageoffset_t offset, uint8_t *PASS COUNT_NOK(n) data, at45pageoffset_t n); /** * Signaled when data has been read from the buffer. The data buffer * is "returned". */ event void readDone(); /** * Compute CRC of data in a flash buffer (using the CRC function from crc.h). * crcDone will be signaled. * @param cmd AT45_C_READ_BUFFER1 to compute CRC from buffer 1, * AT45_C_READ_BUFFER2 to compute CRC from buffer 2 * @param page ignored (reserved for future use) * @param offset Offset in page at which to start reading - must be between * 0 and AT45_PAGE_SIZE - 1 * @param n Number of bytes to read (> 0). offset + n must be <= * AT45_PAGE_SIZE * @param baseCrc initial CRC value - use 0 if computing a "standalone" * CRC, or a previous crc result if computing a CRC over several * flash pages */ command void crc(uint8_t cmd, at45page_t page, at45pageoffset_t offset, at45pageoffset_t n, uint16_t baseCrc); /** * Signaled when CRC has been computed. * @param computedCrc CRC value */ event void crcDone(uint16_t computedCrc); /** * Write some data to a flash buffer, and optionally the flash itself. * writeDone will be signaled. * @param cmd One of AT45_C_WRITE_BUFFER1/2 or AT45_C_WRITE_MEM_BUFFER1/2 * to write respectively to buffer 1/2, or to buffer 1/2 and the * specified main memory page. * @param page Page to write when cmd is AT45_C_WRITE_MEM_BUFFER1/2 * @param offset Offset in page at which to start writing - must be between * 0 and AT45_PAGE_SIZE - 1 * @param data Data to write. The buffer is "returned" at writeDone time. * @param n Number of bytes to write (> 0). offset + n must be <= * AT45_PAGE_SIZE */ command void write(uint8_t cmd, at45page_t page, at45pageoffset_t offset, uint8_t *PASS COUNT_NOK(n) data, at45pageoffset_t n); /** * Signaled when data has been written to the buffer. The data buffer * is "returned". */ event void writeDone(); } tinyos-2.1.2+dfsg/tos/chips/at45db/HplAt45dbByte.nc000066400000000000000000000031151207233610700216140ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Interface between generic byte-at-a-time AT45DB HPL implementation and * its platform specific aspects. *

    * Each platform must provide its own HPL implementation for its AT45DB * flash chip. To simplify this task, this directory provides a generic HPL * implementation (HplAt45dbByteC) which can easily be used to build an * AT45DB HPL by connecting it to a byte-at-a-time SPI interface, and an * implementation of the operations of this interface. * * @author David Gay */ interface HplAt45dbByte { /** * Wait for the flash chip to report that it is idle. This command is * called immediately after sending a status request command to the * flash, so it is sufficient to wait for the flash's data pin to go * high. */ command void waitIdle(); /** * Signaled when the flash chip is idle. */ event void idle(); /** * This command may be called immediately after idle is signaled. It * must report the flash's current compare status. * @return TRUE if the last compare succeeded, FALSE if it failed. */ command bool getCompareStatus(); /** * Assert the flash's select pin. */ command void select(); /** * Deassert the flash's select pin. */ command void deselect(); } tinyos-2.1.2+dfsg/tos/chips/at45db/HplAt45dbByteC.nc000066400000000000000000000134731207233610700217270ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Generic byte-at-a-time implementation of the AT45DB HPL. * * Each platform must provide its own HPL implementation for its AT45DB * flash chip. To simplify this task, this component can easily be used to * build an AT45DB HPL by connecting it to a byte-at-a-time SPI interface, * and an HplAt45dbByte interface. * * @param The number of bits needed to represent a sector size, e.g., 9 * for the AT45DB041B. * * @author David Gay */ generic module HplAt45dbByteC(int sectorSizeLog2) @safe() { provides interface HplAt45db; uses { interface Resource; interface SpiByte as FlashSpi; interface HplAt45dbByte; } } implementation { enum { P_IDLE, P_SEND_CMD, P_READ, P_READ_CRC, P_WRITE, P_WAIT_IDLE, P_WAIT_COMPARE, P_WAIT_COMPARE_OK, P_FILL, P_FLUSH, P_COMPARE, P_ERASE }; uint8_t status = P_IDLE; uint8_t flashCmd[9]; at45pageoffset_t dataCount; uint8_t * COUNT_NOK(dataCount) data; uint8_t dontCare; void complete(uint16_t crc) { uint8_t s = status; status = P_IDLE; switch (s) { default: break; case P_READ_CRC: signal HplAt45db.crcDone(crc); break; case P_FILL: signal HplAt45db.fillDone(); break; case P_FLUSH: signal HplAt45db.flushDone(); break; case P_COMPARE: signal HplAt45db.compareDone(); break; case P_ERASE: signal HplAt45db.eraseDone(); break; case P_READ: signal HplAt45db.readDone(); break; case P_WRITE: signal HplAt45db.writeDone(); break; } } void requestFlashStatus() { call HplAt45dbByte.select(); call FlashSpi.write(AT45_C_REQ_STATUS); call HplAt45dbByte.waitIdle(); } void doCommand() { uint8_t in = 0, out = 0; uint8_t *ptr; at45pageoffset_t count; uint8_t lphase; uint16_t crc = (uint16_t)data; if (dataCount) // skip 0-byte ops { /* For a 3% speedup, we could use labels and goto *. But: very gcc-specific. Also, need to do asm ("ijmp" : : "z" (state)) instead of goto *state */ ptr = flashCmd; lphase = P_SEND_CMD; count = 4 + dontCare; call HplAt45dbByte.select(); for (;;) { if (lphase == P_READ_CRC) { crc = crcByte(crc, in); --count; if (!count) break; } else if (lphase == P_SEND_CMD) { // Note: the dontCare bytes are read after the end of cmd... out = *ptr++; count--; if (!count) { lphase = status; ptr = data; count = dataCount; } } else if (lphase == P_READ) { *ptr++ = in; --count; if (!count) break; } else if (lphase == P_WRITE) { if (!count) break; out = *ptr++; --count; } else /* P_COMMAND */ break; in = call FlashSpi.write(out); } call HplAt45dbByte.deselect(); } call Resource.release(); complete(crc); } event void Resource.granted() { switch (status) { case P_WAIT_COMPARE: case P_WAIT_IDLE: requestFlashStatus(); break; default: doCommand(); break; } } void execCommand(uint8_t op, uint8_t reqCmd, uint8_t reqDontCare, at45page_t reqPage, at45pageoffset_t reqOffset, uint8_t * COUNT_NOK(reqCount) reqData, at45pageoffset_t reqCount) { status = op; // page (2 bytes) and highest bit of offset flashCmd[0] = reqCmd; flashCmd[1] = reqPage >> (16 - sectorSizeLog2); flashCmd[2] = reqPage << (sectorSizeLog2 - 8) | reqOffset >> 8; flashCmd[3] = reqOffset; // low-order 8 bits data = NULL; dataCount = reqCount; data = reqData; dontCare = reqDontCare; call Resource.request(); } command void HplAt45db.waitIdle() { status = P_WAIT_IDLE; call Resource.request(); } command void HplAt45db.waitCompare() { status = P_WAIT_COMPARE; call Resource.request(); } event void HplAt45dbByte.idle() { if (status == P_WAIT_COMPARE) { bool cstatus = call HplAt45dbByte.getCompareStatus(); call HplAt45dbByte.deselect(); call Resource.release(); signal HplAt45db.waitCompareDone(cstatus); } else { call HplAt45dbByte.deselect(); call Resource.release(); signal HplAt45db.waitIdleDone(); } } command void HplAt45db.fill(uint8_t cmd, at45page_t page) { execCommand(P_FILL, cmd, 0, page, 0, NULL, 1); } command void HplAt45db.flush(uint8_t cmd, at45page_t page) { execCommand(P_FLUSH, cmd, 0, page, 0, NULL, 1); } command void HplAt45db.compare(uint8_t cmd, at45page_t page) { execCommand(P_COMPARE, cmd, 0, page, 0, NULL, 1); } command void HplAt45db.erase(uint8_t cmd, at45page_t page) { execCommand(P_ERASE, cmd, 0, page, 0, NULL, 1); } command void HplAt45db.read(uint8_t cmd, at45page_t page, at45pageoffset_t offset, uint8_t *pdata, at45pageoffset_t count) { execCommand(P_READ, cmd, 5, page, offset, pdata, count); } command void HplAt45db.readBuffer(uint8_t cmd, at45pageoffset_t offset, uint8_t *pdata, at45pageoffset_t count) { execCommand(P_READ, cmd, 2, 0, offset, pdata, count); } command void HplAt45db.crc(uint8_t cmd, at45page_t page, at45pageoffset_t offset, at45pageoffset_t count, uint16_t baseCrc) { execCommand(P_READ_CRC, cmd, 2, page, offset, TCAST(uint8_t * COUNT(count), baseCrc), count); } command void HplAt45db.write(uint8_t cmd, at45page_t page, at45pageoffset_t offset, uint8_t *pdata, at45pageoffset_t count) { execCommand(P_WRITE, cmd, 0, page, offset, pdata, count); } } tinyos-2.1.2+dfsg/tos/chips/at45db/LogStorageC.nc000066400000000000000000000024201207233610700214500ustar00rootroot00000000000000// $Id: LogStorageC.nc,v 1.4 2006-12-12 18:23:02 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation of the log storage abstraction from TEP103 for the * Atmel AT45DB serial data flash. * * @param volid Volume to use for log storage * @param circular TRUE if you want a circular log, FALSE for a linear log * * @author David Gay */ #include "Storage.h" generic configuration LogStorageC(volume_id_t volid, bool circular) { provides { interface LogWrite; interface LogRead; } } implementation { enum { LOG_ID = unique(UQ_LOG_STORAGE), INTF_ID = LOG_ID << 1 | circular, RESOURCE_ID = unique(UQ_AT45DB) }; components LogStorageP, WireLogStorageP, At45dbStorageManagerC, At45dbC; LogWrite = LogStorageP.LogWrite[INTF_ID]; LogRead = LogStorageP.LogRead[INTF_ID]; LogStorageP.At45dbVolume[LOG_ID] -> At45dbStorageManagerC.At45dbVolume[volid]; LogStorageP.Resource[LOG_ID] -> At45dbC.Resource[RESOURCE_ID]; } tinyos-2.1.2+dfsg/tos/chips/at45db/LogStorageP.nc000066400000000000000000000727651207233610700215100ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include #include /** * Private component of the AT45DB implementation of the log storage * abstraction. * * @author: David Gay * @author: Jonathan Hui */ module LogStorageP @safe() { provides { interface LogRead[uint8_t logId]; interface LogWrite[uint8_t logId]; } uses { interface At45db; interface At45dbVolume[uint8_t logId]; interface Resource[uint8_t logId]; } } implementation { /* Some design notes. - The logId's in the LogRead and LogWrites are shifted left by 1 bit. The low-order bit is 1 for circular logs, 0 for linear ones (see newRequest and endRequest, and the LogStorageC configuration) - Data is written sequentially to the pages of a log volume. Each page ends with a footer (nx_struct pageinfo) recording metadata on the current page: o a cookie o the "position" of the current page in the log (see below) o the offset of the last record on this page (i.e., the offset at which the last append ended) - only valid if flags & F_LASTVALID o flags: x F_SYNC page was synchronised - data after lastRecordOffset is not log data; implies F_LASTVALID x F_CIRCLED this page is not from the first run through the log's pages (never set in linear logs) x F_LASTVALID not set if no record ended on this page o a CRC - "Positions" are stored in the metadata, used as cookies by currentOffset and seek, and stored in the wpos and rpos fields of the volume state structure. They represent the number of bytes that writing has advanced in the log since the log was erased, with PAGE_SIZE added. Note that this is basically the number of bytes written, except that when a page is synchronised unused bytes in the page count towards increasing the position. As a result, on page p, the following equation holds: (metadata(p).pos - PAGE_SIZE) % volume-size == p * PAGE_SIZE (this also means that the "position" metadata field could be replaced by a count of the number of times writing has cycled through the log, reducing the metadata size) The PAGE_SIZE offset on positions is caused by Invariant 2 below: to ensure that Invariant 2 is respected, at flash erase time, we write a valid page with position 0 to the last block of the flash. As a result, the first writes to the flash, in page 0, are at "position" PAGE_SIZE. - This code is designed to deal with "one-at-a-time" failures (i.e., the system will not modify any blocks after a previous failed write). This should allow recovery from: o arbitrary reboots o write failure (the underlying PageEEPROM shuts down after any write fails; all pages are flushed before moving on to the next page) It will not recover from arbitrary data corruption - When sync is called, the current write page is written to flash with an F_SYNC flag and writing continues on the next page (wasting on average half a flasg page) - We maintain the following invariants on log volumes, even in the face of the "one-at-a-time" failures described above: 1) at least one of the first and last blocks are valid 2) the last block, if valid, has the F_SYNC flag - Locating the log boundary page (the page with the greatest position): Invariant 1, the one-at-a-time failure model and the metadata position definition guarantees that the physical flash pages have the following properties: an initial set of V1 valid pages, followed by a set of I invalid pages, followed by a set of V2 valid pages with V1+i+V2=total-number-of-pages, and V1, V2, I >= 0 Additionally, the position of all pages in V1 is greater than in V2, and consecutive pages in V1 (respectively V2) have greater positions than their predecessors. From this, it's possible to locate the log boundary page (the page with the greatest position) using the following algorithm: o let basepos=metadata(lastpage).pos, or 0 if the last page is invalid o locate (using a binary search) the page p with the largest position greater than basepos invalid pages can be assumed to have positions less than basepos if there is no such page p, let p = lastpage Once the log boundary page is known, we resume writing at the last page before p with a record boundary (Invariant 2, combined with limiting individual records to volumesize - PAGE_SIZE ensures there will be such a page). - The read pointer has a special "invalid" state which represents the current beginning of the log. In that state, LogRead.currentOffset() returns SEEK_BEGINNING rather than a regular position. The read pointer is invalidated: o at boot time o after the volume is erased o after the write position "catches up" with the read position o after a failed seek Reads from an invalid pointer: o start reading from the beginning of the flash if we are on the first run through the log volume o start reading at the first valid page after the write page with an F_LASTVALID flag; the read offset is set to the lastRecordOffset value if this page has the SYNC flag, we start at the beginning of the next page */ enum { F_SYNC = 1, F_CIRCLED = 2, F_LASTVALID = 4 }; nx_struct pageinfo { nx_uint16_t magic; nx_uint32_t pos; nx_uint8_t lastRecordOffset; nx_uint8_t flags; nx_uint16_t crc; }; enum { N = uniqueCount(UQ_LOG_STORAGE), NO_CLIENT = 0xff, PAGE_SIZE = AT45_PAGE_SIZE - sizeof(nx_struct pageinfo), PERSISTENT_MAGIC = 0x4256, }; enum { R_IDLE, R_ERASE, R_APPEND, R_SYNC, R_READ, R_SEEK }; enum { META_IDLE, META_LOCATEFIRST, META_LOCATE, META_LOCATELAST, META_SEEK, META_READ, META_WRITE }; uint8_t client = NO_CLIENT; uint8_t metaState; bool recordsLost; at45page_t firstPage, lastPage; storage_len_t pos; nx_struct pageinfo metadata; struct { /* The latest request made for this client, and it's arguments */ uint8_t request; uint8_t *COUNT_NOK(len) buf; storage_len_t len; /* Log r/w positions */ bool positionKnown : 1; bool circular : 1; bool circled : 1; bool rvalid : 1; uint32_t wpos; /* Bytes since start of logging */ at45page_t wpage; /* Current write page */ at45pageoffset_t woffset; /* Offset on current write page */ uint32_t rpos; /* Bytes since start of logging */ at45page_t rpage; /* Current read page */ at45pageoffset_t roffset; /* Offset on current read page */ at45pageoffset_t rend; /* Last valid offset on current read page */ } s[N]; at45page_t firstVolumePage() { return call At45dbVolume.remap[client](0); } at45page_t npages() { return call At45dbVolume.volumeSize[client](); } at45page_t lastVolumePage() { return call At45dbVolume.remap[client](npages()); } void setWritePage(at45page_t page) { if (s[client].circular && page == lastVolumePage()) { s[client].circled = TRUE; page = firstVolumePage(); } s[client].wpage = page; s[client].woffset = 0; } void invalidateReadPointer() { s[client].rvalid = FALSE; } void crcPage(at45page_t page) { call At45db.computeCrc(page, 0, PAGE_SIZE + offsetof(nx_struct pageinfo, crc), 0); } void readMetadata(at45page_t page) { call At45db.read(page, PAGE_SIZE, &metadata, sizeof metadata); } void writeMetadata(at45page_t page) { call At45db.write(page, PAGE_SIZE, &metadata, sizeof metadata); } void wmetadataStart(); void sync() { metadata.flags = F_SYNC | F_LASTVALID; metadata.lastRecordOffset = s[client].woffset; /* rend is now no longer the end of the page */ if (s[client].rpage == s[client].wpage) s[client].rend = s[client].woffset; wmetadataStart(); } /* ------------------------------------------------------------------ */ /* Queue and initiate user requests */ /* ------------------------------------------------------------------ */ void eraseStart(); void appendStart(); void syncStart(); void readStart(); void locateStart(); void rmetadataStart(); void seekStart(); void startRequest() { if (!s[client].positionKnown && s[client].request != R_ERASE) { locateStart(); return; } metaState = META_IDLE; switch (s[client].request) { case R_ERASE: eraseStart(); break; case R_APPEND: appendStart(); break; case R_SYNC: syncStart(); break; case R_READ: readStart(); break; case R_SEEK: seekStart(); break; } } void endRequest(error_t ok) { uint8_t c = client; uint8_t request = s[c].request; storage_len_t actualLen = pos; void *ptr = s[c].buf; client = NO_CLIENT; s[c].request = R_IDLE; call Resource.release[c](); c = c << 1 | s[c].circular; switch (request) { case R_ERASE: signal LogWrite.eraseDone[c](ok); break; case R_APPEND: signal LogWrite.appendDone[c](ptr, actualLen, recordsLost, ok); break; case R_SYNC: signal LogWrite.syncDone[c](ok); break; case R_READ: signal LogRead.readDone[c](ptr, actualLen, ok); break; case R_SEEK: signal LogRead.seekDone[c](ok); break; } } /* Enqueue request and request the underlying flash */ error_t newRequest(uint8_t newRequest, uint8_t id, uint8_t *COUNT_NOK(length) buf, storage_len_t length) { s[id >> 1].circular = id & 1; id >>= 1; if (s[id].request != R_IDLE) return EBUSY; s[id].request = newRequest; s[id].buf = NULL; s[id].len = length; s[id].buf = buf; call Resource.request[id](); return SUCCESS; } event void Resource.granted[uint8_t id]() { client = id; pos = 0; startRequest(); } command error_t LogWrite.append[uint8_t id](void* buf, storage_len_t length) { if (length > call LogRead.getSize[id]() - PAGE_SIZE) /* Writes greater than the volume size are invalid. Writes equal to the volume size could break the log volume invariant (see next comment). Writes that span the whole volume could lead to problems at boot time (no valid block with a record boundary). Refuse them all. */ return EINVAL; else return newRequest(R_APPEND, id, buf, length); } command storage_cookie_t LogWrite.currentOffset[uint8_t id]() { return s[id >> 1].wpos; } command error_t LogWrite.erase[uint8_t id]() { return newRequest(R_ERASE, id, NULL, 0); } command error_t LogWrite.sync[uint8_t id]() { return newRequest(R_SYNC, id, NULL, 0); } command error_t LogRead.read[uint8_t id](void* buf, storage_len_t length) { return newRequest(R_READ, id, buf, length); } command storage_cookie_t LogRead.currentOffset[uint8_t id]() { id >>= 1; return s[id].rvalid ? s[id].rpos : SEEK_BEGINNING; } command error_t LogRead.seek[uint8_t id](storage_cookie_t offset) { return newRequest(R_SEEK, id, TCAST(void *COUNT(offset), ((uint16_t)(offset >> 16))), offset); } command storage_len_t LogRead.getSize[uint8_t id]() { return call At45dbVolume.volumeSize[id >> 1]() * (storage_len_t)PAGE_SIZE; } /* ------------------------------------------------------------------ */ /* Erase */ /* ------------------------------------------------------------------ */ void eraseMetadataDone() { /* Set write pointer to the beginning of the flash */ s[client].wpos = PAGE_SIZE; // last page has offset 0 and is before us s[client].circled = FALSE; setWritePage(firstVolumePage()); invalidateReadPointer(); s[client].positionKnown = TRUE; endRequest(SUCCESS); } void eraseEraseDone() { if (firstPage == lastPage - 1) { /* We create a valid, synced last page (see invariants) */ metadata.flags = F_SYNC | F_LASTVALID; metadata.lastRecordOffset = 0; setWritePage(firstPage); s[client].circled = FALSE; s[client].wpos = 0; wmetadataStart(); } else call At45db.erase(firstPage++, AT45_ERASE); } void eraseStart() { s[client].positionKnown = FALSE; // in case erase fails firstPage = firstVolumePage(); lastPage = lastVolumePage(); eraseEraseDone(); } /* ------------------------------------------------------------------ */ /* Locate log boundaries */ /* ------------------------------------------------------------------ */ void locateLastRecord(); void locateLastCrcDone(uint16_t crc) { if (crc != metadata.crc) { locateLastRecord(); return; } /* We've found the last valid page with a record-end. Set up the read and write positions. */ invalidateReadPointer(); if (metadata.flags & F_SYNC) /* must start on next page */ { /* We need to special case the empty log, as we don't want to wrap around in the case of a full, non-circular log with a sync on its last page. */ if (firstPage == lastPage && !metadata.pos) setWritePage(firstVolumePage()); else setWritePage(firstPage + 1); s[client].wpos = metadata.pos + PAGE_SIZE; } else { s[client].wpage = firstPage; s[client].woffset = metadata.lastRecordOffset; s[client].wpos = metadata.pos + metadata.lastRecordOffset; } s[client].circled = (metadata.flags & F_CIRCLED) != 0; if (s[client].circled && !s[client].circular) // oops { endRequest(FAIL); return; } /* And we can now proceed to the real request */ s[client].positionKnown = TRUE; startRequest(); } void locateLastReadDone() { if (metadata.magic == PERSISTENT_MAGIC && metadata.flags & F_LASTVALID) crcPage(firstPage); else locateLastRecord(); } void locateLastRecord() { if (firstPage == lastPage) { /* We walked all the way back to the last page, and it's not valid. The log-volume invariant is not holding. Fail out. */ endRequest(FAIL); return; } if (firstPage == firstVolumePage()) firstPage = lastPage; else firstPage--; readMetadata(firstPage); } void located() { metaState = META_LOCATELAST; /* firstPage is one after last valid page, but the last page with a record end may be some pages earlier. Search for it. */ lastPage = lastVolumePage() - 1; locateLastRecord(); } at45page_t locateCurrentPage() { return firstPage + ((lastPage - firstPage) >> 1); } void locateBinarySearch() { if (lastPage <= firstPage) located(); else readMetadata(locateCurrentPage()); } void locateGreaterThan() { firstPage = locateCurrentPage() + 1; locateBinarySearch(); } void locateLessThan() { lastPage = locateCurrentPage(); locateBinarySearch(); } void locateCrcDone(uint16_t crc) { if (crc == metadata.crc) { s[client].wpos = metadata.pos; locateGreaterThan(); } else locateLessThan(); } void locateReadDone() { if (metadata.magic == PERSISTENT_MAGIC && s[client].wpos < metadata.pos) crcPage(locateCurrentPage()); else locateLessThan(); } void locateFirstCrcDone(uint16_t crc) { if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc) s[client].wpos = metadata.pos; else s[client].wpos = 0; metaState = META_LOCATE; locateBinarySearch(); } void locateFirstReadDone() { crcPage(lastPage); } /* Locate log beginning and ending. See description at top of file. */ void locateStart() { metaState = META_LOCATEFIRST; firstPage = firstVolumePage(); lastPage = lastVolumePage() - 1; readMetadata(lastPage); } /* ------------------------------------------------------------------ */ /* Append */ /* ------------------------------------------------------------------ */ void appendContinue() { uint8_t *buf = s[client].buf + pos; at45pageoffset_t offset = s[client].woffset, count; storage_len_t len = s[client].len - pos; if (len == 0) { endRequest(SUCCESS); return; } if (s[client].wpage == lastVolumePage()) { /* We reached the end of a linear log */ endRequest(ESIZE); return; } if (offset + len <= PAGE_SIZE) count = len; else count = PAGE_SIZE - offset; s[client].wpos += count; s[client].woffset += count; pos += count; /* We normally lose data at the point we make the first write to a page in a log that has circled. */ if (offset == 0 && s[client].circled) recordsLost = TRUE; call At45db.write(s[client].wpage, offset, buf, count); } void appendWriteDone() { if (s[client].woffset == PAGE_SIZE) /* Time to write metadata */ wmetadataStart(); else endRequest(SUCCESS); } void appendMetadataDone() { // metadata of previous page flushed /* Setup metadata in case we overflow this page too */ metadata.flags = 0; appendContinue(); } void appendSyncDone() { s[client].wpos = metadata.pos + PAGE_SIZE; appendStart(); } void appendStart() { storage_len_t len = s[client].len - pos; storage_len_t vlen = (storage_len_t)npages() * PAGE_SIZE; recordsLost = FALSE; /* If request would span the end of the flash, sync, to maintain the invariant that the last flash page is synced and that either the first or last pages are valid. Note that >= in the if below means we won't write a record that would end on the last byte of the last page, as this would mean that we would not sync the last page, breaking the log volume invariant */ if ((s[client].wpos - PAGE_SIZE) % vlen >= vlen - len) sync(); else { /* Set lastRecordOffset in case we need to write metadata (see wmetadataStart) */ metadata.lastRecordOffset = s[client].woffset; metadata.flags = F_LASTVALID; appendContinue(); } } /* ------------------------------------------------------------------ */ /* Sync */ /* ------------------------------------------------------------------ */ void syncStart() { if (s[client].woffset == 0) /* we can't lose any writes */ endRequest(SUCCESS); else sync(); } void syncMetadataDone() { /* Write position reflect the absolute position in the flash, not user-bytes written. So update wpos to reflect sync effects. */ s[client].wpos = metadata.pos + PAGE_SIZE; endRequest(SUCCESS); } /* ------------------------------------------------------------------ */ /* Write block metadata */ /* ------------------------------------------------------------------ */ void wmetadataStart() { /* The caller ensures that metadata.flags (except F_CIRCLED) and metadata.lastRecordOffset are set correctly. */ metaState = META_WRITE; firstPage = s[client].wpage; // remember page to commit metadata.pos = s[client].wpos - s[client].woffset; metadata.magic = PERSISTENT_MAGIC; if (s[client].circled) metadata.flags |= F_CIRCLED; call At45db.computeCrc(firstPage, 0, PAGE_SIZE, 0); /* We move to the next page now. If writing the metadata fails, we'll simply leave the invalid page in place. Trying to recover seems complicated, and of little benefit (note that in practice, At45dbC shuts down after a failed write, so nothing is really going to happen after that anyway). */ setWritePage(s[client].wpage + 1); /* Invalidate read pointer if we reach it's page */ if (s[client].wpage == s[client].rpage) invalidateReadPointer(); } void wmetadataCrcDone(uint16_t crc) { uint8_t i, *md; // Include metadata in crc md = (uint8_t *)&metadata; for (i = 0; i < offsetof(nx_struct pageinfo, crc); i++) crc = crcByte(crc, md[i]); metadata.crc = crc; // And save it writeMetadata(firstPage); } void wmetadataWriteDone() { metaState = META_IDLE; if (metadata.flags & F_SYNC) call At45db.sync(firstPage); else call At45db.flush(firstPage); } /* ------------------------------------------------------------------ */ /* Read */ /* ------------------------------------------------------------------ */ void readContinue() { uint8_t *buf = s[client].buf + pos; at45pageoffset_t offset = s[client].roffset, count; at45pageoffset_t end = s[client].rend; storage_len_t len = s[client].len - pos; if (len == 0) { endRequest(SUCCESS); return; } if (!s[client].rvalid) { if (s[client].circled) /* Find a valid page after wpage, skipping invalid pages */ s[client].rpage = s[client].wpage; else { /* resume reading at the beginning of the first page */ s[client].rvalid = TRUE; s[client].rpage = lastVolumePage() - 1; } rmetadataStart(); return; } if (s[client].rpage == s[client].wpage) end = s[client].woffset; if (offset == end) { if ((s[client].rpage + 1 == lastVolumePage() && !s[client].circular) || s[client].rpage == s[client].wpage) endRequest(SUCCESS); // end of log else rmetadataStart(); return; } if (offset + len <= end) count = len; else count = end - offset; pos += count; s[client].rpos += count; s[client].roffset = offset + count; call At45db.read(s[client].rpage, offset, buf, count); } void readStart() { readContinue(); } /* ------------------------------------------------------------------ */ /* Read block metadata */ /* ------------------------------------------------------------------ */ void continueReadAt(at45pageoffset_t roffset) { /* Resume reading at firstPage whose metadata is currently available in the metadata variable */ metaState = META_IDLE; s[client].rpos = metadata.pos + roffset; s[client].rpage = firstPage; s[client].roffset = roffset; s[client].rend = metadata.flags & F_SYNC ? metadata.lastRecordOffset : PAGE_SIZE; s[client].rvalid = TRUE; readContinue(); } void rmetadataContinue() { if (++firstPage == lastVolumePage()) firstPage = firstVolumePage(); if (firstPage == s[client].wpage) if (!s[client].rvalid) /* We cannot find a record boundary to start at (we've just walked through the whole log...). Give up. */ endRequest(SUCCESS); else { /* The current write page has no metadata yet, so we fake it */ metadata.flags = 0; metadata.pos = s[client].wpos - s[client].woffset; continueReadAt(0); } else readMetadata(firstPage); } void rmetadataReadDone() { if (metadata.magic == PERSISTENT_MAGIC) crcPage(firstPage); else endRequest(SUCCESS); } void rmetadataCrcDone(uint16_t crc) { if (!s[client].rvalid) if (crc == metadata.crc && metadata.flags & F_LASTVALID) continueReadAt(metadata.lastRecordOffset); else rmetadataContinue(); else if (crc == metadata.crc) continueReadAt(0); else endRequest(SUCCESS); } void rmetadataStart() { metaState = META_READ; firstPage = s[client].rpage; rmetadataContinue(); } /* ------------------------------------------------------------------ */ /* Seek. */ /* ------------------------------------------------------------------ */ void seekCrcDone(uint16_t crc) { if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc && metadata.pos == s[client].rpos - s[client].roffset) { s[client].rvalid = TRUE; if (metadata.flags & F_SYNC) s[client].rend = metadata.lastRecordOffset; } endRequest(SUCCESS); } void seekReadDone() { crcPage(s[client].rpage); } /* Move to position specified by cookie. */ void seekStart() { uint32_t offset = (uint32_t)(uint16_t)s[client].buf << 16 | s[client].len; invalidateReadPointer(); // default to beginning of log /* The write positions are offset by PAGE_SIZE (see emptyLog) */ if (offset == SEEK_BEGINNING) offset = PAGE_SIZE; if (offset > s[client].wpos || offset < PAGE_SIZE) { endRequest(EINVAL); return; } /* Cookies are just flash positions which continue incrementing as you circle around and around. So we can just check the requested page's metadata.pos field matches the cookie's value */ s[client].rpos = offset; s[client].roffset = (offset - PAGE_SIZE) % PAGE_SIZE; s[client].rpage = firstVolumePage() + ((offset - PAGE_SIZE) / PAGE_SIZE) % npages(); s[client].rend = PAGE_SIZE; // default to no sync flag // The last page's metadata isn't written to flash yet. Special case it. if (s[client].rpage == s[client].wpage) { /* If we're seeking within the current write page, just go there. Otherwise, we're asking for an old version of the current page so just keep the invalidated read pointer, i.e., read from the beginning. */ if (offset >= s[client].wpos - s[client].woffset) s[client].rvalid = TRUE; endRequest(SUCCESS); } else { metaState = META_SEEK; readMetadata(s[client].rpage); } } /* ------------------------------------------------------------------ */ /* Dispatch HAL operations to current user op */ /* ------------------------------------------------------------------ */ event void At45db.eraseDone(error_t error) { if (client != NO_CLIENT) if (error != SUCCESS) endRequest(FAIL); else eraseEraseDone(); } event void At45db.writeDone(error_t error) { if (client != NO_CLIENT) if (error != SUCCESS) endRequest(FAIL); else switch (metaState) { case META_WRITE: wmetadataWriteDone(); break; case META_IDLE: appendWriteDone(); break; } } event void At45db.syncDone(error_t error) { if (client != NO_CLIENT) if (error != SUCCESS) endRequest(FAIL); else switch (s[client].request) { case R_ERASE: eraseMetadataDone(); break; case R_APPEND: appendSyncDone(); break; case R_SYNC: syncMetadataDone(); break; } } event void At45db.flushDone(error_t error) { if (client != NO_CLIENT) if (error != SUCCESS) endRequest(FAIL); else appendMetadataDone(); } event void At45db.readDone(error_t error) { if (client != NO_CLIENT) if (error != SUCCESS) endRequest(FAIL); else switch (metaState) { case META_LOCATEFIRST: locateFirstReadDone(); break; case META_LOCATE: locateReadDone(); break; case META_LOCATELAST: locateLastReadDone(); break; case META_SEEK: seekReadDone(); break; case META_READ: rmetadataReadDone(); break; case META_IDLE: readContinue(); break; } } event void At45db.computeCrcDone(error_t error, uint16_t crc) { if (client != NO_CLIENT) if (error != SUCCESS) endRequest(FAIL); else switch (metaState) { case META_LOCATEFIRST: locateFirstCrcDone(crc); break; case META_LOCATE: locateCrcDone(crc); break; case META_LOCATELAST: locateLastCrcDone(crc); break; case META_SEEK: seekCrcDone(crc); break; case META_WRITE: wmetadataCrcDone(crc); break; case META_READ: rmetadataCrcDone(crc); break; } } event void At45db.copyPageDone(error_t error) { } default event void LogWrite.appendDone[uint8_t logId](void* buf, storage_len_t l, bool rLost, error_t error) { } default event void LogWrite.eraseDone[uint8_t logId](error_t error) { } default event void LogWrite.syncDone[uint8_t logId](error_t error) { } default event void LogRead.readDone[uint8_t logId](void* buf, storage_len_t l, error_t error) { } default event void LogRead.seekDone[uint8_t logId](error_t error) {} default command at45page_t At45dbVolume.remap[uint8_t logId](at45page_t volumePage) {return 0;} default command at45page_t At45dbVolume.volumeSize[uint8_t logId]() {return 0;} default async command error_t Resource.request[uint8_t logId]() {return SUCCESS;} default async command error_t Resource.release[uint8_t logId]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/at45db/Storage_chip.h000066400000000000000000000004411207233610700215360ustar00rootroot00000000000000// $Id: Storage_chip.h,v 1.4 2006-12-12 18:23:02 vlahan Exp $ #ifndef STORAGE_CHIP_H #define STORAGE_CHIP_H #include "At45db.h" #define UQ_BLOCK_STORAGE "BlockStorageP.BlockRead" #define UQ_LOG_STORAGE "LogStorageP.LogRead" #define UQ_CONFIG_STORAGE "ConfigStorageP.ConfigRead" #endif tinyos-2.1.2+dfsg/tos/chips/at45db/WireBlockStorageP.nc000066400000000000000000000011551207233610700226310ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Private component of the AT45DB implementation of the block storage * abstraction. * * @author: David Gay */ configuration WireBlockStorageP { } implementation { components BlockStorageP, At45dbC; BlockStorageP.At45db -> At45dbC; } tinyos-2.1.2+dfsg/tos/chips/at45db/WireConfigStorageP.nc000066400000000000000000000014061207233610700230030ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Private component of the AT45DB implementation of the config storage * abstraction. * * @author: David Gay */ configuration WireConfigStorageP { } implementation { components ConfigStorageP, BlockStorageP, At45dbC; ConfigStorageP.At45db -> At45dbC; ConfigStorageP.BlockRead -> BlockStorageP; ConfigStorageP.BlockWrite -> BlockStorageP; ConfigStorageP.BConfig <- BlockStorageP; } tinyos-2.1.2+dfsg/tos/chips/at45db/WireLogStorageP.nc000066400000000000000000000011451207233610700223170ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Private component of the AT45DB implementation of the log storage * abstraction. * * @author: David Gay */ configuration WireLogStorageP { } implementation { components LogStorageP, At45dbC; LogStorageP.At45db -> At45dbC; } tinyos-2.1.2+dfsg/tos/chips/atm128/000077500000000000000000000000001207233610700167105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/Atm128Clock.h000066400000000000000000000057051207233610700210200ustar00rootroot00000000000000// $Id: Atm128Clock.h,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon #ifndef _H_ATM128CLOCK_H #define _H_ATM128CLOCK_H //====================== Oscillators ================================== /* Timer Clock Select -- set via Fuses only through ISP */ enum { ATM128_CKSEL_EXT_CLK = 0, //!< External clock source ATM128_CKSEL_INT_1MHZ = 1, //!< Internal RC oscillator ATM128_CKSEL_INT_2MHZ, ATM128_CKSEL_INT_4MHZ, ATM128_CKSEL_INT_8MHZ, ATM128_CKSEL_EXT_RC_1MHZ = 5, //!< External RC oscillator ATM128_CKSEL_EXT_RC_3MHZ, ATM128_CKSEL_EXT_RC_8MHZ, ATM128_CKSEL_EXT_RC_12MHZ, ATM128_CKSEL_EXT_CRYSTAL = 9, //!< External low freq crystal ATM128_CKSEL_EXT_RES_1MHZ = 10, //!< External resonator ATM128_CKSEL_EXT_RES_3MHZ, ATM128_CKSEL_EXT_RES_8MHZ }; /* * Calibration Register for Internal Oscillator * * OSCCAL Min Freq Max Freq * 0x00 50% 100% * 0x7F 75% 150% * 0xFF 100% 200% */ typedef uint8_t Atm128_OSCCAL_t; //!< Internal Oscillator Calibration Register /* 8-bit Clock Divider Register */ typedef struct { uint8_t xdiven : 1; //!< Enable clock divider uint8_t xdiv : 7; //!< fCLK = Source Clock / 129 - xdiv } Atm128ClockDivider_t; typedef Atm128ClockDivider_t Atm128_XTAL_t; //!< Asynchronous Clock Divider #endif //_H_ATM128CLOCK_H tinyos-2.1.2+dfsg/tos/chips/atm128/Atm128I2C.h000066400000000000000000000062731207233610700203430ustar00rootroot00000000000000// $Id: Atm128I2C.h,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon #ifndef _H_Atm128I2C_h #define _H_Atm128I2C_h //====================== I2C Bus ================================== /* SCL freq = CPU freq / (16 + 2(TWBR) * pow(4, TWPR)) */ enum { ATM128_I2C_RATE_DIVIDE_16 = 0, ATM128_I2C_RATE_DIVIDE_24 = 1, ATM128_I2C_RATE_DIVIDE_80 = 2, } typedef uint8_t Atm128_TWBR_t; //!< Two Wire Bit Rate Register /* I2C Control Register */ typedef struct { uint8_t twie : 1; //!< Two Wire Interrupt Enable uint8_t rsvd : 1; //!< Reserved uint8_t twen : 1; //!< Two Wire Enable Bit uint8_t twwc : 1; //!< Two Wire Write Collision Flag uint8_t twsto : 1; //!< Two Wire Stop Condition Bit uint8_t twsta : 1; //!< Two Wire Start Condition Bit uint8_t twea : 1; //!< Two Wire Enable Acknowledge Bit uint8_t twint : 1; //!< Two Wire Interrupt Flag } Atm128I2CControl_t; typedef Atm128I2CControl_t Atm128_TWCR_t; //!< Two Wire Control Register /* SCL freq = CPU freq / (16 + 2(TWBR) * pow(4, TWPR)) */ enum { ATM128_I2C_PRESCALE_1 = 0, ATM128_I2C_PRESCALE_4 = 1, ATM128_I2C_PRESCALE_16 = 2, ATM128_I2C_PRESCALE_64 = 3, }; enum { ATM128_I2C_STATUS_START = 1, }; /* I2C Status Register */ typedef struct { uint8_t twps : 2; //!< Two Wire Prescaler Bits uint8_t rsvd : 1; //!< Reserved uint8_t tws : 5; //!< Two Wire Status } Atm128I2CStatus_t; typedef Atm128I2CStatus_t Atm128_TWCR_t; //!< Two Wire Status Register typedef uint8_t Atm128_TWDR_t; //!< Two Wire Data Register typedef uint8_t Atm128_TWAR_t; //!< Two Wire Slave Address Register #endif //_H_Atm128I2C_h tinyos-2.1.2+dfsg/tos/chips/atm128/Atm128Power.h000066400000000000000000000043151207233610700210550ustar00rootroot00000000000000// $Id: Atm128Power.h,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon #ifndef _H_Atm128Power_h #define _H_Atm128Power_h //================== ATmega128 Power Management ========================== /* MCU Control Register */ typedef struct { uint8_t ivce : 1; //!< Interrupt Vector Change Enable uint8_t ivsel : 1; //!< Interrupt Vector Select uint8_t stdby : 1; //!< Standby Enable (sm2) uint8_t sm : 2; //!< Sleep Mode uint8_t se : 1; //!< Sleep Enable uint8_t srw10 : 1; //!< SRAM wait state enable uint8_t srw : 1; //!< External SRAM enable } Atm128_MCUCR_t; #endif //_H_Atm128Power_h tinyos-2.1.2+dfsg/tos/chips/atm128/Atm128Uart.h000066400000000000000000000124641207233610700207000ustar00rootroot00000000000000// $Id: Atm128Uart.h,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon #ifndef _H_Atm128Uart_h #define _H_Atm128Uart_h //====================== UART Bus ================================== typedef uint8_t Atm128_UDR0_t; //!< USART0 I/O Data Register typedef uint8_t Atm128_UDR1_t; //!< USART1 I/O Data Register /* UART Status Register */ typedef union { struct Atm128_UCSRA_t { uint8_t mpcm : 1; //!< UART Multiprocessor Communication Mode uint8_t u2x : 1; //!< UART Double Transmission Speed uint8_t upe : 1; //!< UART Parity Error uint8_t dor : 1; //!< UART Data Overrun uint8_t fe : 1; //!< UART Frame Error uint8_t udre : 1; //!< USART Data Register Empty uint8_t txc : 1; //!< USART Transfer Complete uint8_t rxc : 1; //!< USART Receive Complete } bits; uint8_t flat; } Atm128UartStatus_t; typedef Atm128UartStatus_t Atm128_UCSR0A_t; //!< UART 0 Status Register typedef Atm128UartStatus_t Atm128_UCSR1A_t; //!< UART 1 Status Register /* UART Control Register */ typedef union { struct Atm128_UCSRB_t { uint8_t txb8 : 1; //!< UART Transmit Data Bit 8 uint8_t rxb8 : 1; //!< UART Receive Data Bit 8 uint8_t ucsz2 : 1; //!< UART Character Size (Bit 2) uint8_t txen : 1; //!< UART Transmitter Enable uint8_t rxen : 1; //!< UART Receiver Enable uint8_t udrie : 1; //!< USART Data Register Enable uint8_t txcie : 1; //!< UART TX Complete Interrupt Enable uint8_t rxcie : 1; //!< UART RX Complete Interrupt Enable } bits; uint8_t flat; } Atm128UartControl_t; typedef Atm128UartControl_t Atm128_UCSR0B_t; //!< UART 0 Control Register typedef Atm128UartControl_t Atm128_UCSR1B_t; //!< UART 1 Control Register enum { ATM128_UART_DATA_SIZE_5_BITS = 0, ATM128_UART_DATA_SIZE_6_BITS = 1, ATM128_UART_DATA_SIZE_7_BITS = 2, ATM128_UART_DATA_SIZE_8_BITS = 3, }; /* UART Control Register */ typedef union { uint8_t flat; struct Atm128_UCSRC_t { uint8_t ucpol : 1; //!< UART Clock Polarity uint8_t ucsz : 2; //!< UART Character Size (Bits 0 and 1) uint8_t usbs : 1; //!< UART Stop Bit Select uint8_t upm : 2; //!< UART Parity Mode uint8_t umsel : 1; //!< USART Mode Select uint8_t rsvd : 1; //!< Reserved } bits; } Atm128UartMode_t; typedef Atm128UartMode_t Atm128_UCSR0C_t; //!< UART 0 Mode Register typedef Atm128UartMode_t Atm128_UCSR1C_t; //!< UART 1 Mode Register /* * ATmega1128 UART baud register settings: * ATM128__BAUD_ */ enum { ATM128_19200_BAUD_4MHZ = 12, ATM128_38400_BAUD_4MHZ = 6, ATM128_57600_BAUD_4MHZ = 3, ATM128_19200_BAUD_4MHZ_2X = 25, ATM128_38400_BAUD_4MHZ_2X = 12, ATM128_57600_BAUD_4MHZ_2X = 8, ATM128_19200_BAUD_7MHZ = 23, ATM128_38400_BAUD_7MHZ = 11, ATM128_57600_BAUD_7MHZ = 7, ATM128_19200_BAUD_7MHZ_2X = 47, ATM128_38400_BAUD_7MHZ_2X = 23, ATM128_57600_BAUD_7MHZ_2X = 15, ATM128_19200_BAUD_8MHZ = 25, ATM128_38400_BAUD_8MHZ = 12, ATM128_57600_BAUD_8MHZ = 8, ATM128_19200_BAUD_8MHZ_2X = 51, ATM128_38400_BAUD_8MHZ_2X = 34, ATM128_57600_BAUD_8MHZ_2X = 11, }; typedef uint8_t Atm128_UBRR0L_t; //!< UART 0 Baud Register (Low) typedef uint8_t Atm128_UBRR0H_t; //!< UART 0 Baud Register (High) typedef uint8_t Atm128_UBRR1L_t; //!< UART 1 Baud Register (Low) typedef uint8_t Atm128_UBRR1H_t; //!< UART 1 Baud Register (High) typedef uint8_t uart_parity_t; typedef uint8_t uart_speed_t; typedef uint8_t uart_duplex_t; enum { TOS_UART_PARITY_NONE = 0, TOS_UART_PARITY_EVEN = 1, TOS_UART_PARITY_ODD = 2, }; enum { TOS_UART_19200 = 0, TOS_UART_38400 = 1, TOS_UART_57600 = 2, }; enum { TOS_UART_OFF = 0, TOS_UART_RONLY = 1, TOS_UART_TONLY = 2, TOS_UART_DUPLEX = 3, }; #endif //_H_Atm128UART_h tinyos-2.1.2+dfsg/tos/chips/atm128/Atm128Uart0C.nc000066400000000000000000000044171207233610700212330ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:02 $ */ configuration Atm128Uart0C { provides interface StdControl; provides interface UartByte; provides interface UartStream; uses interface Counter; } implementation{ components new Atm128UartP() as UartP; StdControl = UartP; UartByte = UartP; UartStream = UartP; UartP.Counter = Counter; components HplAtm128UartC as HplUartC; UartP.HplUartTxControl -> HplUartC.Uart0TxControl; UartP.HplUartRxControl -> HplUartC.Uart0RxControl; UartP.HplUart -> HplUartC.HplUart0; components MainC; MainC.SoftwareInit -> UartP; } tinyos-2.1.2+dfsg/tos/chips/atm128/Atm128Uart1C.nc000066400000000000000000000044171207233610700212340ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.1 $ $Date: 2010-06-16 21:45:58 $ */ configuration Atm128Uart1C { provides interface StdControl; provides interface UartByte; provides interface UartStream; uses interface Counter; } implementation{ components new Atm128UartP() as UartP; StdControl = UartP; UartByte = UartP; UartStream = UartP; UartP.Counter = Counter; components HplAtm128UartC as HplUartC; UartP.HplUartTxControl -> HplUartC.Uart1TxControl; UartP.HplUartRxControl -> HplUartC.Uart1RxControl; UartP.HplUart -> HplUartC.HplUart1; components MainC; MainC.SoftwareInit -> UartP; } tinyos-2.1.2+dfsg/tos/chips/atm128/Atm128UartP.nc000066400000000000000000000141061207233610700211640ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @author Philip Levis (maintainer) * @version $Revision: 1.7 $ $Date: 2008-06-23 20:25:15 $ * * Modification @ 11/27 (pal): Folded in Alec's reimplementation * from the -devel branch. Fixed bug in RX interrupts, where * they were not enabled on start. Possibly due to alternative * ARC TEP113 implementation that uses UartStream? */ #include generic module Atm128UartP() @safe() { provides interface Init; provides interface StdControl; provides interface UartByte; provides interface UartStream; uses interface StdControl as HplUartTxControl; uses interface StdControl as HplUartRxControl; uses interface HplAtm128Uart as HplUart; uses interface Counter; } implementation{ norace uint16_t m_tx_len, m_rx_len; norace uint8_t *COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; norace uint16_t m_tx_pos, m_rx_pos; norace uint16_t m_byte_time; norace uint8_t m_rx_intr; norace uint8_t m_tx_intr; command error_t Init.init() { if (PLATFORM_BAUDRATE == 19200UL) m_byte_time = 200; // 1 TMicor ~= 2.12 us, one byte = 417us ~= 200 else if (PLATFORM_BAUDRATE == 57600UL) m_byte_time = 68; // 1 TMicor ~= 2.12 us, one byte = 138us ~= 65 return SUCCESS; } command error_t StdControl.start(){ /* make sure interupts are off and set flags */ call HplUart.disableTxIntr(); call HplUart.disableRxIntr(); m_rx_intr = 0; m_tx_intr = 0; /* enable tx/rx */ call HplUartTxControl.start(); call HplUartRxControl.start(); // Bug fix: pal 11/26/07: RX interrupts should be enabled on start call HplUart.enableRxIntr(); return SUCCESS; } command error_t StdControl.stop(){ call HplUartTxControl.stop(); call HplUartRxControl.stop(); return SUCCESS; } async command error_t UartStream.enableReceiveInterrupt(){ atomic{ m_rx_intr = 3; call HplUart.enableRxIntr(); } return SUCCESS; } async command error_t UartStream.disableReceiveInterrupt(){ atomic{ call HplUart.disableRxIntr(); m_rx_intr = 0; } return SUCCESS; } async command error_t UartStream.receive( uint8_t* buf, uint16_t len ){ if ( len == 0 ) return FAIL; atomic { if ( m_rx_buf ) return EBUSY; m_rx_buf = buf; m_rx_len = len; m_rx_pos = 0; m_rx_intr |= 1; call HplUart.enableRxIntr(); } return SUCCESS; } async event void HplUart.rxDone( uint8_t data ) { if ( m_rx_buf ) { m_rx_buf[ m_rx_pos++ ] = data; if ( m_rx_pos >= m_rx_len ) { uint8_t* buf = m_rx_buf; atomic{ m_rx_buf = NULL; if(m_rx_intr != 3){ call HplUart.disableRxIntr(); m_rx_intr = 0; } } signal UartStream.receiveDone( buf, m_rx_len, SUCCESS ); } } else { signal UartStream.receivedByte( data ); } } async command error_t UartStream.send( uint8_t *buf, uint16_t len){ if ( len == 0 ) return FAIL; else if ( m_tx_buf ) return EBUSY; m_tx_len = len; m_tx_buf = buf; m_tx_pos = 0; m_tx_intr = 1; call HplUart.enableTxIntr(); call HplUart.tx( buf[ m_tx_pos++ ] ); return SUCCESS; } async event void HplUart.txDone() { if ( m_tx_pos < m_tx_len ) { call HplUart.tx( m_tx_buf[ m_tx_pos++ ] ); } else { uint8_t* buf = m_tx_buf; m_tx_buf = NULL; m_tx_intr = 0; call HplUart.disableTxIntr(); signal UartStream.sendDone( buf, m_tx_len, SUCCESS ); } } async command error_t UartByte.send( uint8_t byte ){ if(m_tx_intr) return FAIL; call HplUart.tx( byte ); while ( !call HplUart.isTxEmpty() ); return SUCCESS; } async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout){ uint16_t timeout_micro = m_byte_time * timeout + 1; uint16_t start; if(m_rx_intr) return FAIL; start = call Counter.get(); while ( call HplUart.isRxEmpty() ) { if ( ( (uint16_t)call Counter.get() - start ) >= timeout_micro ) return FAIL; } *byte = call HplUart.rx(); return SUCCESS; } async event void Counter.overflow() {} default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ){} default async event void UartStream.receivedByte( uint8_t byte ){} default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ){} } tinyos-2.1.2+dfsg/tos/chips/atm128/HplAtm128Uart.nc000066400000000000000000000041431207233610700215100ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:03 $ */ interface HplAtm128Uart { async command error_t enableTxIntr(); async command error_t disableTxIntr(); async command error_t enableRxIntr(); async command error_t disableRxIntr(); async command bool isTxEmpty(); async command bool isRxEmpty(); async command void tx( uint8_t data ); async event void txDone(); async command uint8_t rx(); async event void rxDone( uint8_t data ); } tinyos-2.1.2+dfsg/tos/chips/atm128/HplAtm128UartC.nc000066400000000000000000000052071207233610700216150ustar00rootroot00000000000000/// $Id: HplAtm128UartC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /// #include /** * HPL for the Atmega 128 serial ports. * * @author Martin Turon * @author David Gay */ configuration HplAtm128UartC { provides { interface StdControl as Uart0TxControl; interface StdControl as Uart0RxControl; interface HplAtm128Uart as HplUart0; interface StdControl as Uart1TxControl; interface StdControl as Uart1RxControl; interface HplAtm128Uart as HplUart1; } } implementation { components HplAtm128UartP, PlatformC, McuSleepC; Uart0TxControl = HplAtm128UartP.Uart0TxControl; Uart0RxControl = HplAtm128UartP.Uart0RxControl; HplUart0 = HplAtm128UartP.HplUart0; Uart1TxControl = HplAtm128UartP.Uart1TxControl; Uart1RxControl = HplAtm128UartP.Uart1RxControl; HplUart1 = HplAtm128UartP.HplUart1; HplAtm128UartP.Atm128Calibrate -> PlatformC; HplAtm128UartP.McuPowerState -> McuSleepC; components MainC; MainC.SoftwareInit -> HplAtm128UartP.Uart0Init; MainC.SoftwareInit -> HplAtm128UartP.Uart1Init; } tinyos-2.1.2+dfsg/tos/chips/atm128/HplAtm128UartP.nc000066400000000000000000000203471207233610700216340ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:43 $ */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Private component of the Atmega128 serial port HPL. * * @author Martin Turon * @author David Gay */ #include module HplAtm128UartP { provides interface Init as Uart0Init; provides interface StdControl as Uart0TxControl; provides interface StdControl as Uart0RxControl; provides interface HplAtm128Uart as HplUart0; provides interface Init as Uart1Init; provides interface StdControl as Uart1TxControl; provides interface StdControl as Uart1RxControl; provides interface HplAtm128Uart as HplUart1; uses interface Atm128Calibrate; uses interface McuPowerState; } implementation { //=== Uart Init Commands. ==================================== command error_t Uart0Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr0; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR0L = ubrr0; UBRR0H = ubrr0 >> 8; UCSR0A = stts.flat; UCSR0C = mode.flat; UCSR0B = ctrl.flat; return SUCCESS; } command error_t Uart0TxControl.start() { SET_BIT(UCSR0B, TXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart0TxControl.stop() { CLR_BIT(UCSR0B, TXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.start() { SET_BIT(UCSR0B, RXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.stop() { CLR_BIT(UCSR0B, RXEN); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart0.enableTxIntr() { SET_BIT(UCSR0A, TXC); SET_BIT(UCSR0B, TXCIE); return SUCCESS; } async command error_t HplUart0.disableTxIntr(){ CLR_BIT(UCSR0B, TXCIE); return SUCCESS; } async command error_t HplUart0.enableRxIntr(){ SET_BIT(UCSR0B, RXCIE); return SUCCESS; } async command error_t HplUart0.disableRxIntr(){ CLR_BIT(UCSR0B, RXCIE); return SUCCESS; } async command bool HplUart0.isTxEmpty(){ return READ_BIT(UCSR0A, TXC); } async command bool HplUart0.isRxEmpty(){ return !READ_BIT(UCSR0A, RXC); } async command uint8_t HplUart0.rx(){ return UDR0; } async command void HplUart0.tx(uint8_t data) { atomic{ UDR0 = data; SET_BIT(UCSR0A, TXC); } } AVR_ATOMIC_HANDLER(SIG_UART0_RECV) { if (READ_BIT(UCSR0A, RXC)) { signal HplUart0.rxDone(UDR0); } } AVR_NONATOMIC_HANDLER(SIG_UART0_TRANS) { signal HplUart0.txDone(); } command error_t Uart1Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr1; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR1L = ubrr1; UBRR1H = ubrr1 >> 8; UCSR1A = stts.flat; UCSR1C = mode.flat; UCSR1B = ctrl.flat; return SUCCESS; } command error_t Uart1TxControl.start() { SET_BIT(UCSR1B, TXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart1TxControl.stop() { CLR_BIT(UCSR1B, TXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.start() { SET_BIT(UCSR1B, RXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.stop() { CLR_BIT(UCSR1B, RXEN); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart1.enableTxIntr() { SET_BIT(UCSR1A, TXC); SET_BIT(UCSR1B, TXCIE); return SUCCESS; } async command error_t HplUart1.disableTxIntr(){ CLR_BIT(UCSR1B, TXCIE); return SUCCESS; } async command error_t HplUart1.enableRxIntr(){ SET_BIT(UCSR1B, RXCIE); return SUCCESS; } async command error_t HplUart1.disableRxIntr(){ CLR_BIT(UCSR1B, RXCIE); return SUCCESS; } async command bool HplUart1.isTxEmpty() { return READ_BIT(UCSR1A, TXC); } async command bool HplUart1.isRxEmpty() { return !READ_BIT(UCSR1A, RXC); } async command uint8_t HplUart1.rx(){ return UDR1; } async command void HplUart1.tx(uint8_t data) { atomic{ UDR1 = data; SET_BIT(UCSR1A, TXC); } } AVR_ATOMIC_HANDLER(SIG_UART1_RECV) { if (READ_BIT(UCSR1A, RXC)) signal HplUart1.rxDone(UDR1); } AVR_NONATOMIC_HANDLER(SIG_UART1_TRANS) { signal HplUart1.txDone(); } default async event void HplUart0.txDone() {} default async event void HplUart0.rxDone(uint8_t data) {} default async event void HplUart1.txDone() {} default async event void HplUart1.rxDone(uint8_t data) {} } tinyos-2.1.2+dfsg/tos/chips/atm128/McuSleepC.nc000066400000000000000000000103371207233610700210560ustar00rootroot00000000000000/// $Id: McuSleepC.nc,v 1.11 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of TEP 112 (Microcontroller Power Management) for * the Atmega128. Power state calculation code copied from Rob * Szewczyk's 1.x code in HPLPowerManagementM.nc. * * 

     *  $Id: McuSleepC.nc,v 1.11 2010-06-29 22:07:43 scipio Exp $
 *
    * * @author Philip Levis * @author Robert Szewczyk * @date October 26, 2005 */ module McuSleepC @safe() { provides { interface McuSleep; interface McuPowerState; } uses { interface McuPowerOverride; } } implementation { /* There is no dirty bit management because the sleep mode depends on the amount of time remaining in timer0. Note also that the sleep cost depends typically depends on waiting for ASSR to clear. */ /* Note that the power values are maintained in an order * based on their active components, NOT on their values. * Look at atm128hardware.h and page 42 of the ATmeg128 * manual (table 17).*/ const_uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = { 0, /* idle */ (1 << SM0), /* adc */ (1 << SM2) | (1 << SM1) | (1 << SM0), /* ext standby */ (1 << SM1) | (1 << SM0), /* power save */ (1 << SM2) | (1 << SM1), /* standby */ (1 << SM1)}; /* power down */ mcu_power_t getPowerState() { // Note: we go to sleep even if timer 1, 2, or 3's overflow interrupt // is enabled - this allows using these timers as TinyOS "Alarm"s // while still having power management. // Are external timers running? if (TIMSK & ~(1 << OCIE0 | 1 << TOIE0 | 1 << TOIE1 | 1 << TOIE2) || ETIMSK & ~(1 << TOIE3)) { return ATM128_POWER_IDLE; } // SPI (Radio stack on mica/micaZ else if (bit_is_set(SPCR, SPE)) { return ATM128_POWER_IDLE; } // A UART is active else if ((UCSR0B | UCSR1B) & (1 << TXEN | 1 << RXEN)) { // UART return ATM128_POWER_IDLE; } // I2C (Two-wire) is active else if (bit_is_set(TWCR, TWEN)){ return ATM128_POWER_IDLE; } // ADC is enabled else if (bit_is_set(ADCSR, ADEN)) { return ATM128_POWER_ADC_NR; } else { return ATM128_POWER_DOWN; } } async command void McuSleep.sleep() { uint8_t powerState; powerState = mcombine(getPowerState(), call McuPowerOverride.lowestState()); MCUCR = (MCUCR & 0xe3) | 1 << SE | read_uint8_t(&atm128PowerBits[powerState]); sei(); // All of memory may change at this point... asm volatile ("sleep" : : : "memory"); cli(); CLR_BIT(MCUCR, SE); } async command void McuPowerState.update() { } default async command mcu_power_t McuPowerOverride.lowestState() { return ATM128_POWER_DOWN; } } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/000077500000000000000000000000001207233610700174375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/adc/Adc.h000066400000000000000000000011771207233610700203050ustar00rootroot00000000000000/* $Id: Adc.h,v 1.4 2006-12-12 18:23:03 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * @author David Gay */ #ifndef ADC_H #define ADC_H #include "Atm128Adc.h" /* Read and ReadNow share client ids */ #define UQ_ADC_READ "adc.read" #define UQ_ADC_READNOW UQ_ADC_READ #define UQ_ADC_READSTREAM "adc.readstream" #endif tinyos-2.1.2+dfsg/tos/chips/atm128/adc/AdcP.nc000066400000000000000000000106571207233610700206010ustar00rootroot00000000000000/* $Id: AdcP.nc,v 1.6 2008-06-26 04:39:03 regehr Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Convert ATmega128 HAL A/D interface to the HIL interfaces. * @author David Gay * @author Jan Hauer */ #include "Timer.h" module AdcP @safe() { provides { interface Read[uint8_t client]; interface ReadNow[uint8_t client]; } uses { interface Atm128AdcSingle; interface Atm128AdcConfig[uint8_t client]; } } implementation { enum { IDLE, ACQUIRE_DATA, ACQUIRE_DATA_NOW, }; /* Resource reservation is required, and it's incorrect to call getData again before dataReady is signaled, so there are no races in correct programs */ norace uint8_t state; norace uint8_t client; norace uint16_t val; uint8_t channel() { return call Atm128AdcConfig.getChannel[client](); } uint8_t refVoltage() { return call Atm128AdcConfig.getRefVoltage[client](); } uint8_t prescaler() { return call Atm128AdcConfig.getPrescaler[client](); } void sample() { call Atm128AdcSingle.getData(channel(), refVoltage(), FALSE, prescaler()); } error_t startGet(uint8_t newState, uint8_t newClient) { /* Note: we retry imprecise results in dataReady */ state = newState; client = newClient; sample(); return SUCCESS; } command error_t Read.read[uint8_t c]() { return startGet(ACQUIRE_DATA, c); } async command error_t ReadNow.read[uint8_t c]() { return startGet(ACQUIRE_DATA_NOW, c); } task void acquiredData() { state = IDLE; signal Read.readDone[client](SUCCESS, val); } async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) { switch (state) { case ACQUIRE_DATA: if (!precise) sample(); else { val = data; post acquiredData(); } break; case ACQUIRE_DATA_NOW: if (!precise) sample(); else { state = IDLE; signal ReadNow.readDone[client](SUCCESS, data); } break; default: break; } } /* Configuration defaults. Read ground fast! ;-) */ default async command uint8_t Atm128AdcConfig.getChannel[uint8_t c]() { return ATM128_ADC_SNGL_GND; } default async command uint8_t Atm128AdcConfig.getRefVoltage[uint8_t c]() { return ATM128_ADC_VREF_OFF; } default async command uint8_t Atm128AdcConfig.getPrescaler[uint8_t c]() { return ATM128_ADC_PRESCALE_2; } default event void Read.readDone[uint8_t c](error_t e, uint16_t d) { } default async event void ReadNow.readDone[uint8_t c](error_t e, uint16_t d) { } } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/AdcReadClientC.nc000066400000000000000000000022401207233610700225040ustar00rootroot00000000000000/* $Id: AdcReadClientC.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provide, as per TEP101, arbitrated access via a Read interface to the * Atmega128 ADC. Users of this component must link it to an * implementation of Atm128AdcConfig which provides the ADC parameters * (channel, etc). * * @author David Gay */ #include "Adc.h" generic configuration AdcReadClientC() { provides interface Read; uses { interface Atm128AdcConfig; interface ResourceConfigure; } } implementation { components WireAdcP, Atm128AdcC; enum { ID = unique(UQ_ADC_READ), HAL_ID = unique(UQ_ATM128ADC_RESOURCE) }; Read = WireAdcP.Read[ID]; Atm128AdcConfig = WireAdcP.Atm128AdcConfig[ID]; WireAdcP.Resource[ID] -> Atm128AdcC.Resource[HAL_ID]; ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID]; } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/AdcReadNowClientC.nc000066400000000000000000000023151207233610700231730ustar00rootroot00000000000000/* $Id: AdcReadNowClientC.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provide, as per TEP101, Resource-based access to the Atmega128 ADC via a * ReadNow interface. Users of this component must link it to an * implementation of Atm128AdcConfig which provides the ADC parameters * (channel, etc). * * @author David Gay */ #include "Adc.h" generic configuration AdcReadNowClientC() { provides { interface Resource; interface ReadNow; } uses { interface Atm128AdcConfig; interface ResourceConfigure; } } implementation { components WireAdcP, Atm128AdcC; enum { ID = unique(UQ_ADC_READNOW), HAL_ID = unique(UQ_ATM128ADC_RESOURCE) }; ReadNow = WireAdcP.ReadNow[ID]; Atm128AdcConfig = WireAdcP.Atm128AdcConfig[ID]; Resource = Atm128AdcC.Resource[HAL_ID]; ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID]; } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/AdcReadStreamClientC.nc000066400000000000000000000023421207233610700236630ustar00rootroot00000000000000/* $Id: AdcReadStreamClientC.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provide, as per TEP101, arbitrated access via a ReadStream interface to * the Atmega128 ADC. Users of this component must link it to an * implementation of Atm128AdcConfig which provides the ADC parameters * (channel, etc). * * @author David Gay */ #include "Adc.h" generic configuration AdcReadStreamClientC() { provides interface ReadStream; uses { interface Atm128AdcConfig; interface ResourceConfigure; } } implementation { components WireAdcStreamP, Atm128AdcC; enum { ID = unique(UQ_ADC_READSTREAM), HAL_ID = unique(UQ_ATM128ADC_RESOURCE) }; ReadStream = WireAdcStreamP.ReadStream[ID]; Atm128AdcConfig = WireAdcStreamP.Atm128AdcConfig[ID]; WireAdcStreamP.Resource[ID] -> Atm128AdcC.Resource[HAL_ID]; ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID]; } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/AdcStreamP.nc000066400000000000000000000162251207233610700217520ustar00rootroot00000000000000/* $Id: AdcStreamP.nc,v 1.12 2008-06-23 23:38:28 idgay Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Convert ATmega128 HAL A/D interface to the HIL interfaces. * @author David Gay * @author Jan Hauer */ #include "Timer.h" module AdcStreamP @safe() { provides { interface Init @atleastonce(); interface ReadStream[uint8_t client]; } uses { interface Atm128AdcSingle; interface Atm128AdcConfig[uint8_t client]; interface Atm128Calibrate; interface Alarm; } } implementation { enum { NSTREAM = uniqueCount(UQ_ADC_READSTREAM) }; /* Resource reservation is required, and it's incorrect to call getData again before dataReady is signaled, so there are no races in correct programs */ norace uint8_t client = NSTREAM; /* Stream data */ struct list_entry_t { uint16_t count; struct list_entry_t * ONE_NOK next; }; struct list_entry_t *bufferQueue[NSTREAM]; struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM]; uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount; norace uint16_t count; norace uint16_t * COUNT_NOK(count) buffer; norace uint16_t * BND_NOK(buffer, buffer+count) pos; norace uint32_t now, period; command error_t Init.init() { uint8_t i; for (i = 0; i != NSTREAM; i++) bufferQueueEnd[i] = &bufferQueue[i]; return SUCCESS; } uint8_t channel() { return call Atm128AdcConfig.getChannel[client](); } uint8_t refVoltage() { return call Atm128AdcConfig.getRefVoltage[client](); } uint8_t prescaler() { return call Atm128AdcConfig.getPrescaler[client](); } void sample() { call Atm128AdcSingle.getData(channel(), refVoltage(), FALSE, prescaler()); } command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) { if (n < sizeof(struct list_entry_t)) return ESIZE; atomic { struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf); if (!bufferQueueEnd[c]) // Can't post right now. return FAIL; newEntry->count = n; newEntry->next = NULL; *bufferQueueEnd[c] = newEntry; bufferQueueEnd[c] = &newEntry->next; } return SUCCESS; } task void readStreamDone() { uint8_t c = client; uint32_t actualPeriod = call Atm128Calibrate.actualMicro(period); atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](SUCCESS, actualPeriod); } task void readStreamFail() { /* By now, the pending bufferDone has been signaled (see readStream). */ struct list_entry_t *entry; uint8_t c = client; atomic entry = bufferQueue[c]; for (; entry; entry = entry->next){ uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count; signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count); } atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](FAIL, 0); } task void bufferDone() { uint16_t *b, c; atomic { b = lastBuffer; c = lastCount; lastBuffer = NULL; } signal ReadStream.bufferDone[client](SUCCESS, b, c); } void nextAlarm() { call Alarm.startAt(now, period); now += period; } async event void Alarm.fired() { sample(); } command error_t ReadStream.read[uint8_t c](uint32_t usPeriod) { /* The first reading may be imprecise. So we just do a dummy read to get things rolling - this is indicated by setting count to 0 */ buffer = pos = NULL; count = 0; period = call Atm128Calibrate.calibrateMicro(usPeriod); client = c; sample(); return SUCCESS; } void nextBuffer() { atomic { struct list_entry_t *entry = bufferQueue[client]; if (!entry) { // all done bufferQueueEnd[client] = NULL; // prevent post post readStreamDone(); } else { uint16_t tmp_count; bufferQueue[client] = entry->next; if (!bufferQueue[client]) bufferQueueEnd[client] = &bufferQueue[client]; pos = buffer = NULL; count = entry->count; tmp_count = count; pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry); nextAlarm(); } } } async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) { if (client == NSTREAM) return; if (count == 0) { now = call Alarm.getNow(); nextBuffer(); } else { *pos++ = data; if (pos == buffer + count) { atomic { if (lastBuffer) { /* We failed to signal bufferDone in time. Fail. */ bufferQueueEnd[client] = NULL; // prevent post post readStreamFail(); return; } else { lastCount = count; lastBuffer = buffer; } } post bufferDone(); nextBuffer(); } else nextAlarm(); } } /* Configuration defaults. Read ground fast! ;-) */ default async command uint8_t Atm128AdcConfig.getChannel[uint8_t c]() { return ATM128_ADC_SNGL_GND; } default async command uint8_t Atm128AdcConfig.getRefVoltage[uint8_t c]() { return ATM128_ADC_VREF_OFF; } default async command uint8_t Atm128AdcConfig.getPrescaler[uint8_t c]() { return ATM128_ADC_PRESCALE_2; } } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/Atm128Adc.h000066400000000000000000000120561207233610700212000ustar00rootroot00000000000000// $Id: Atm128Adc.h,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon // @author Hu Siquan #ifndef _H_Atm128ADC_h #define _H_Atm128ADC_h //================== 8 channel 10-bit ADC ============================== /* Voltage Reference Settings */ enum { ATM128_ADC_VREF_OFF = 0, //!< VR+ = AREF and VR- = GND ATM128_ADC_VREF_AVCC = 1,//!< VR+ = AVcc and VR- = GND ATM128_ADC_VREF_RSVD, ATM128_ADC_VREF_2_56 = 3,//!< VR+ = 2.56V and VR- = GND }; /* Voltage Reference Settings */ enum { ATM128_ADC_RIGHT_ADJUST = 0, ATM128_ADC_LEFT_ADJUST = 1, }; /* ADC Multiplexer Settings */ enum { ATM128_ADC_SNGL_ADC0 = 0, ATM128_ADC_SNGL_ADC1, ATM128_ADC_SNGL_ADC2, ATM128_ADC_SNGL_ADC3, ATM128_ADC_SNGL_ADC4, ATM128_ADC_SNGL_ADC5, ATM128_ADC_SNGL_ADC6, ATM128_ADC_SNGL_ADC7, ATM128_ADC_DIFF_ADC00_10x, ATM128_ADC_DIFF_ADC10_10x, ATM128_ADC_DIFF_ADC00_200x, ATM128_ADC_DIFF_ADC10_200x, ATM128_ADC_DIFF_ADC22_10x, ATM128_ADC_DIFF_ADC32_10x, ATM128_ADC_DIFF_ADC22_200x, ATM128_ADC_DIFF_ADC32_200x, ATM128_ADC_DIFF_ADC01_1x, ATM128_ADC_DIFF_ADC11_1x, ATM128_ADC_DIFF_ADC21_1x, ATM128_ADC_DIFF_ADC31_1x, ATM128_ADC_DIFF_ADC41_1x, ATM128_ADC_DIFF_ADC51_1x, ATM128_ADC_DIFF_ADC61_1x, ATM128_ADC_DIFF_ADC71_1x, ATM128_ADC_DIFF_ADC02_1x, ATM128_ADC_DIFF_ADC12_1x, ATM128_ADC_DIFF_ADC22_1x, ATM128_ADC_DIFF_ADC32_1x, ATM128_ADC_DIFF_ADC42_1x, ATM128_ADC_DIFF_ADC52_1x, ATM128_ADC_SNGL_1_23, ATM128_ADC_SNGL_GND, }; /* ADC Multiplexer Selection Register */ typedef struct { uint8_t mux : 5; //!< Analog Channel and Gain Selection Bits uint8_t adlar : 1; //!< ADC Left Adjust Result uint8_t refs : 2; //!< Reference Selection Bits } Atm128Admux_t; /* ADC Prescaler Settings */ /* Note: each platform must define ATM128_ADC_PRESCALE to the smallest prescaler which guarantees full A/D precision. */ enum { ATM128_ADC_PRESCALE_2 = 0, ATM128_ADC_PRESCALE_2b, ATM128_ADC_PRESCALE_4, ATM128_ADC_PRESCALE_8, ATM128_ADC_PRESCALE_16, ATM128_ADC_PRESCALE_32, ATM128_ADC_PRESCALE_64, ATM128_ADC_PRESCALE_128, // This special value is used to ask the platform for the prescaler // which gives full precision. ATM128_ADC_PRESCALE }; /* ADC Enable Settings */ enum { ATM128_ADC_ENABLE_OFF = 0, ATM128_ADC_ENABLE_ON, }; /* ADC Start Conversion Settings */ enum { ATM128_ADC_START_CONVERSION_OFF = 0, ATM128_ADC_START_CONVERSION_ON, }; /* ADC Free Running Select Settings */ enum { ATM128_ADC_FREE_RUNNING_OFF = 0, ATM128_ADC_FREE_RUNNING_ON, }; /* ADC Interrupt Flag Settings */ enum { ATM128_ADC_INT_FLAG_OFF = 0, ATM128_ADC_INT_FLAG_ON, }; /* ADC Interrupt Enable Settings */ enum { ATM128_ADC_INT_ENABLE_OFF = 0, ATM128_ADC_INT_ENABLE_ON, }; /* ADC Multiplexer Selection Register */ typedef struct { uint8_t adps : 3; //!< ADC Prescaler Select Bits uint8_t adie : 1; //!< ADC Interrupt Enable uint8_t adif : 1; //!< ADC Interrupt Flag uint8_t adfr : 1; //!< ADC Free Running Select uint8_t adsc : 1; //!< ADC Start Conversion uint8_t aden : 1; //!< ADC Enable } Atm128Adcsra_t; typedef uint8_t Atm128_ADCH_t; //!< ADC data register high typedef uint8_t Atm128_ADCL_t; //!< ADC data register low // The resource identifier string for the ADC subsystem #define UQ_ATM128ADC_RESOURCE "atm128adc.resource" #endif //_H_Atm128ADC_h tinyos-2.1.2+dfsg/tos/chips/atm128/adc/Atm128AdcC.nc000066400000000000000000000054671207233610700214640ustar00rootroot00000000000000/// $Id: Atm128AdcC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Atm128Adc.h" /** * HAL for the Atmega128 A/D conversion susbsystem. * * @author Hu Siquan * @author David Gay */ configuration Atm128AdcC { provides { interface Resource[uint8_t client]; interface Atm128AdcSingle; interface Atm128AdcMultiple; } uses interface ResourceConfigure[uint8_t client]; } implementation { components Atm128AdcP, HplAtm128AdcC, PlatformC, MainC, new RoundRobinArbiterC(UQ_ATM128ADC_RESOURCE) as AdcArbiter, new AsyncStdControlPowerManagerC() as PM; Resource = AdcArbiter; ResourceConfigure = AdcArbiter; Atm128AdcSingle = Atm128AdcP; Atm128AdcMultiple = Atm128AdcP; PlatformC.SubInit -> Atm128AdcP; Atm128AdcP.HplAtm128Adc -> HplAtm128AdcC; Atm128AdcP.Atm128Calibrate -> PlatformC; PM.AsyncStdControl -> Atm128AdcP; PM.ResourceDefaultOwner -> AdcArbiter; } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/Atm128AdcConfig.nc000066400000000000000000000023261207233610700224760ustar00rootroot00000000000000/* $Id: Atm128AdcConfig.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Atm128Adc.h" /** * Clients of the higher-level A/D system must implement this interface to * specify which channel to sample, and with what parameters. * * @author David Gay */ interface Atm128AdcConfig { /** * Obtain channel. * @return The A/D channel to use. Must be one of the ATM128_ADC_SNGL_xxx * or ATM128_ADC_DIFF_xxx values from Atm128Adc.h. */ async command uint8_t getChannel(); /** * Obtain reference voltage * @return The reference voltage to use. Must be one of the * ATM128_ADC_VREF_xxx values from Atm128Adc.h. */ async command uint8_t getRefVoltage(); /** * Obtain prescaler value. * @return The prescaler value to use. Must be one of the * ATM128_ADC_PRESCALE_xxx values from Atm128Adc.h. */ async command uint8_t getPrescaler(); } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/Atm128AdcMultiple.nc000066400000000000000000000136071207233610700230700ustar00rootroot00000000000000/// $Id: Atm128AdcMultiple.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Hardware Abstraction Layer interface of Atmega128 for acquiring data * from multiple channels using the ATmega128's free-running mode. *

    * Because of the possibility that samples may be imprecise after * switching channels and/or reference voltages, and because there * is a one sample delay on swithcing channels and reference voltages, * Atm128ADCMultiple is complex. Two straightforward uses are: *

      *
    1. Acquire N samples from channel C: *
        *
      1. call getData to start sampling on channel C at the desired rate * (note that the choice of prescalers is very limited, so you * don't have many choices for sampling rate) *
      2. ignore the first dataReady event *
      3. use the results of the next N dataReady() events, return FALSE * on the last one *
      *
    2. Acquire one sample each from channels C1, ..., Cn (this pseudocode * assumes that none of these channels are differential) *
        *
      1. call getData to start sampling on channel C1 *
      2. on the ith dataReady event switch to channel Ci+1 by changing * *newChannel *
      3. the data passed to the ith dataReady event is for channel Ci-1 * (the data from the first dataReady event is ignored) *
      *
    * * @author Hu Siquan * @author David Gay */ #include "Atm128Adc.h" interface Atm128AdcMultiple { /** * Initiates free-running ADC conversions, with the ability to switch * channels and reference-voltage with a one sample delay. * * @param channel Initial A/D conversion channel. The channel can * be changed in the dataReady event, though these changes happen * with a one-sample delay (this is a hardware restriction). * @param refVoltage Initial A/D reference voltage. See the * ATM128_ADC_VREF_xxx constants in Atm128ADC.h. Like the channel, * the reference voltage can be changed in the dataReady event with * a one-sample delay. * @param leftJustify TRUE to place A/D result in high-order bits * (i.e., shifted left by 6 bits), low to place it in the low-order bits * @param prescaler Prescaler value for the A/D conversion clock. If you * specify ATM128_ADC_PRESCALE, a prescaler will be chosen that guarantees * full precision. Other prescalers can be used to get faster conversions. * See the ATmega128 manual for details. * @return TRUE if the conversion will be precise, FALSE if it will be * imprecise (due to a change in reference voltage, or switching to a * differential input channel) */ async command bool getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler); /** * Returns the next sample in a free-running conversion. Allow the user * to switch channels and/or reference voltages with a one sample delay. * * @param data a 2 byte unsigned data value sampled by the ADC. * @param precise if this conversion was precise, FALSE if it wasn't * (we assume that the second conversion after a change of reference * voltage or after switching to a differential channel is precise) * @param channel Channel this sample was from. * @param newChannel Change this parameter to switch to a new channel * for the second next sample. * @param newRefVoltage Change this parameter to change the reference * voltage for the second next sample. * * @return TRUE to continue sampling, FALSE to stop. */ async event bool dataReady(uint16_t data, bool precise, uint8_t channel, uint8_t *newChannel, uint8_t *newRefVoltage); /* Note: there is no cancel in free-running mode because you cannot tell from a successful (or unsuccessful) cancellation whether there will be another dataReady event. Thus you cannot tell when you can safely reuse the ADC (short of waiting one ADC conversion period, in which case you might as well use the result of dataReady to cancel). */ } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/Atm128AdcP.nc000066400000000000000000000220261207233610700214670ustar00rootroot00000000000000/* $Id: Atm128AdcP.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $ * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * Internal component of the Atmega128 A/D HAL. * * @author Jason Hill * @author David Gay * @author Philip Levis * @author Phil Buonadonna * @author Hu Siquan */ module Atm128AdcP @safe() { provides { interface Init; interface AsyncStdControl; interface Atm128AdcSingle; interface Atm128AdcMultiple; } uses { interface HplAtm128Adc; interface Atm128Calibrate; } } implementation { /* State for the current and next (multiple-sampling only) conversion */ struct { bool multiple : 1; /* single and multiple-sampling mode */ bool precise : 1; /* is this result going to be precise? */ uint8_t channel : 5; /* what channel did this sample come from? */ } f, nextF; command error_t Init.init() { atomic { Atm128Adcsra_t adcsr; adcsr.aden = ATM128_ADC_ENABLE_OFF; adcsr.adsc = ATM128_ADC_START_CONVERSION_OFF; adcsr.adfr = ATM128_ADC_FREE_RUNNING_OFF; adcsr.adif = ATM128_ADC_INT_FLAG_OFF; adcsr.adie = ATM128_ADC_INT_ENABLE_OFF; adcsr.adps = ATM128_ADC_PRESCALE_2; call HplAtm128Adc.setAdcsra(adcsr); } return SUCCESS; } /* We enable the A/D when start is called, and disable it when stop is called. This drops A/D conversion latency by a factor of two (but increases idle mode power consumption a little). */ async command error_t AsyncStdControl.start() { atomic call HplAtm128Adc.enableAdc(); return SUCCESS; } async command error_t AsyncStdControl.stop() { atomic call HplAtm128Adc.disableAdc(); return SUCCESS; } /* Return TRUE if switching to 'channel' with reference voltage 'refVoltage' will give a precise result (the first sample after changing reference voltage or switching to/between a differential channel is imprecise) */ inline bool isPrecise(Atm128Admux_t admux, uint8_t channel, uint8_t refVoltage) { return refVoltage == admux.refs && (channel <= ATM128_ADC_SNGL_ADC7 || channel >= ATM128_ADC_SNGL_1_23 || channel == admux.mux); } async event void HplAtm128Adc.dataReady(uint16_t data) { bool precise, multiple; uint8_t channel; atomic { channel = f.channel; precise = f.precise; multiple = f.multiple; } if (!multiple) { /* A single sample. Disable the ADC interrupt to avoid starting a new sample at the next "sleep" instruction. */ call HplAtm128Adc.disableInterruption(); signal Atm128AdcSingle.dataReady(data, precise); } else { /* Multiple sampling. The user can: - tell us to stop sampling - or, to continue sampling on a new channel, possibly with a new reference voltage; however this change applies not to the next sample (the hardware has already started working on that), but on the one after. */ bool cont; uint8_t nextChannel, nextVoltage; Atm128Admux_t admux; atomic { admux = call HplAtm128Adc.getAdmux(); nextVoltage = admux.refs; nextChannel = admux.mux; } cont = signal Atm128AdcMultiple.dataReady(data, precise, channel, &nextChannel, &nextVoltage); atomic if (cont) { /* Switch channels and update our internal channel+precision tracking state (f and nextF). Note that this tracking will be incorrect if we take too long to get to this point. */ admux.refs = nextVoltage; admux.mux = nextChannel; call HplAtm128Adc.setAdmux(admux); f = nextF; nextF.channel = nextChannel; nextF.precise = isPrecise(admux, nextChannel, nextVoltage); } else call HplAtm128Adc.cancel(); } } /* Start sampling based on request parameters */ void getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { Atm128Admux_t admux; Atm128Adcsra_t adcsr; admux = call HplAtm128Adc.getAdmux(); f.precise = isPrecise(admux, channel, refVoltage); f.channel = channel; admux.refs = refVoltage; admux.adlar = leftJustify; admux.mux = channel; call HplAtm128Adc.setAdmux(admux); adcsr.aden = ATM128_ADC_ENABLE_ON; adcsr.adsc = ATM128_ADC_START_CONVERSION_ON; adcsr.adfr = f.multiple; adcsr.adif = ATM128_ADC_INT_FLAG_ON; // clear any stale flag adcsr.adie = ATM128_ADC_INT_ENABLE_ON; if (prescaler == ATM128_ADC_PRESCALE) prescaler = call Atm128Calibrate.adcPrescaler(); adcsr.adps = prescaler; call HplAtm128Adc.setAdcsra(adcsr); } async command bool Atm128AdcSingle.getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { atomic { f.multiple = FALSE; getData(channel, refVoltage, leftJustify, prescaler); return f.precise; } } async command bool Atm128AdcSingle.cancel() { /* There is no Atm128AdcMultiple.cancel, for reasons discussed in that interface */ return call HplAtm128Adc.cancel(); } async command bool Atm128AdcMultiple.getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { atomic { f.multiple = TRUE; getData(channel, refVoltage, leftJustify, prescaler); nextF = f; /* We assume the 2nd sample is precise */ nextF.precise = TRUE; return f.precise; } } default async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) { } default async event bool Atm128AdcMultiple.dataReady(uint16_t data, bool precise, uint8_t channel, uint8_t *newChannel, uint8_t *newRefVoltage) { return FALSE; // stop conversion if we somehow end up here. } } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/Atm128AdcSingle.nc000066400000000000000000000076451207233610700225230ustar00rootroot00000000000000/// $Id: Atm128AdcSingle.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Hardware Abstraction Layer interface of Atmega128 for acquiring * a single sample from a channel. * * @author Hu Siquan * @author David Gay */ #include "Atm128Adc.h" interface Atm128AdcSingle { /** * Initiates an ADC conversion on a given channel. * * @param channel A/D conversion channel. * @param refVoltage Select reference voltage for A/D conversion. See * the ATM128_ADC_VREF_xxx constants in Atm128ADC.h * @param leftJustify TRUE to place A/D result in high-order bits * (i.e., shifted left by 6 bits), low to place it in the low-order bits * @param prescaler Prescaler value for the A/D conversion clock. If you * specify ATM128_ADC_PRESCALE, a prescaler will be chosen that guarantees * full precision. Other prescalers can be used to get faster conversions. * See the ATmega128 manual for details. * @return TRUE if the conversion will be precise, FALSE if it will be * imprecise (due to a change in refernce voltage, or switching to a * differential input channel) */ async command bool getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler); /** * Indicates a sample has been recorded by the ADC as the result * of a getData() command. * * @param data a 2 byte unsigned data value sampled by the ADC. * @param precise if the conversion precise, FALSE if it wasn't. This * values matches the result from the getData call. */ async event void dataReady(uint16_t data, bool precise); /** * Cancel an outstanding getData operation. Use with care, to * avoid problems with races between the dataReady event and cancel. * @return TRUE if a conversion was in-progress or an interrupt * was pending. dataReady will not be signaled. FALSE if the * conversion was already complete. dataReady will be (or has * already been) signaled. */ async command bool cancel(); } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/HplAtm128Adc.nc000066400000000000000000000116221207233610700220130ustar00rootroot00000000000000/// $Id: HplAtm128Adc.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL interface to the Atmega128 A/D conversion subsystem. Please see the * Atmega128 manual for full details on the functioning of this subsystem. *

    * A word of warning: the Atmega128 SLEEP instruction initiates an A/D * conversion when the ADC and ADC interrupt are enabled. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ interface HplAtm128Adc { /** * Read the ADMUX (ADC selection) register * @return Current ADMUX value */ async command Atm128Admux_t getAdmux(); /** * Set the ADMUX (ADC selection) register * @param admux New ADMUX value */ async command void setAdmux(Atm128Admux_t admux); /** * Read the ADCSRA (ADC control) register * @return Current ADCSRA value */ async command Atm128Adcsra_t getAdcsra(); /** * Set the ADCSRA (ADC control) register * @param adcsra New ADCSRA value */ async command void setAdcsra(Atm128Adcsra_t adcsra); /** * Read the latest A/D conversion result * @return A/D value */ async command uint16_t getValue(); /// A/D control utilities. All of these clear any pending A/D interrupt. /** * Enable ADC sampling */ async command void enableAdc(); /** * Disable ADC sampling */ async command void disableAdc(); /** * Enable ADC interrupt */ async command void enableInterruption(); /** * Disable ADC interrupt */ async command void disableInterruption(); /** * Clear the ADC interrupt flag */ async command void resetInterrupt(); /** * Start ADC conversion. If ADC interrupts are enabled, the dataReady event * will be signaled once (in non-continuous mode) or repeatedly (in * continuous mode). */ async command void startConversion(); /** * Enable continuous sampling */ async command void setContinuous(); /** * Disable continuous sampling */ async command void setSingle(); /* A/D status checks */ /** * Is ADC enabled? * @return TRUE if the ADC is enabled, FALSE otherwise */ async command bool isEnabled(); /** * Is A/D conversion in progress? * @return TRUE if the A/D conversion is in progress, FALSE otherwise */ async command bool isStarted(); /** * Is A/D conversion complete? Note that this flag is automatically * cleared when an A/D interrupt occurs. * @return TRUE if the A/D conversion is complete, FALSE otherwise */ async command bool isComplete(); /** * Set ADC prescaler selection bits * @param scale New ADC prescaler. Must be one of the ATM128_ADC_PRESCALE_xxx * values from Atm128Adc.h */ async command void setPrescaler(uint8_t scale); /** * Cancel A/D conversion and any pending A/D interrupt. Also disables the * ADC interruption (otherwise a sample might start at the next sleep * instruction). This command can assume that the A/D converter is enabled. * @return TRUE if an A/D conversion was in progress or an A/D interrupt * was pending, FALSE otherwise. In single conversion mode, a return * of TRUE implies that the dataReady event will not be signaled. */ async command bool cancel(); /** * A/D interrupt occured * @param data Latest A/D conversion result */ async event void dataReady(uint16_t data); } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/HplAtm128AdcC.nc000066400000000000000000000040051207233610700221130ustar00rootroot00000000000000/// $Id: HplAtm128AdcC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL for the Atmega128 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ configuration HplAtm128AdcC { provides interface HplAtm128Adc; } implementation { components HplAtm128AdcP, McuSleepC; HplAtm128Adc = HplAtm128AdcP; HplAtm128AdcP.McuPowerState -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/HplAtm128AdcP.nc000066400000000000000000000117241207233610700221360ustar00rootroot00000000000000/// $Id: HplAtm128AdcP.nc,v 1.9 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL for the Atmega128 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ module HplAtm128AdcP @safe() { provides interface HplAtm128Adc; uses interface McuPowerState; } implementation { //=== Direct read of HW registers. ================================= async command Atm128Admux_t HplAtm128Adc.getAdmux() { return *(Atm128Admux_t*)&ADMUX; } async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { return *(Atm128Adcsra_t*)&ADCSRA; } async command uint16_t HplAtm128Adc.getValue() { return ADC; } DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t); DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t); //=== Direct write of HW registers. ================================ async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) { ADMUX = Admux2int(x); } async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { ADCSRA = Adcsra2int(x); } async command void HplAtm128Adc.setPrescaler(uint8_t scale){ Atm128Adcsra_t current_val = call HplAtm128Adc.getAdcsra(); current_val.adif = FALSE; current_val.adps = scale; call HplAtm128Adc.setAdcsra(current_val); } // Individual bit manipulation. These all clear any pending A/D interrupt. async command void HplAtm128Adc.enableAdc() { SET_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.disableAdc() { CLR_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.setContinuous() { SET_BIT(ADCSRA, ADFR); } async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADFR); } async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); } async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); } /* A/D status checks */ async command bool HplAtm128Adc.isEnabled() { return (call HplAtm128Adc.getAdcsra()).aden; } async command bool HplAtm128Adc.isStarted() { return (call HplAtm128Adc.getAdcsra()).adsc; } async command bool HplAtm128Adc.isComplete() { return (call HplAtm128Adc.getAdcsra()).adif; } /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */ AVR_ATOMIC_HANDLER(SIG_ADC) { uint16_t data = call HplAtm128Adc.getValue(); __nesc_enable_interrupt(); signal HplAtm128Adc.dataReady(data); } default async event void HplAtm128Adc.dataReady(uint16_t done) { } async command bool HplAtm128Adc.cancel() { /* This is tricky */ atomic { Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr; /* To cancel a conversion, first turn off ADEN, then turn off ADSC. We also cancel any pending interrupt. Finally we reenable the ADC. */ newSr = oldSr; newSr.aden = FALSE; newSr.adif = TRUE; /* This clears a pending interrupt... */ newSr.adie = FALSE; /* We don't want to start sampling again at the next sleep */ call HplAtm128Adc.setAdcsra(newSr); newSr.adsc = FALSE; call HplAtm128Adc.setAdcsra(newSr); newSr.aden = TRUE; call HplAtm128Adc.setAdcsra(newSr); return oldSr.adif || oldSr.adsc; } } } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/WireAdcP.nc000066400000000000000000000020041207233610700214130ustar00rootroot00000000000000/* $Id: WireAdcP.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Support component for AdcReadClientC and AdcReadNowClientC. * * @author David Gay */ configuration WireAdcP { provides { interface Read[uint8_t client]; interface ReadNow[uint8_t client]; } uses { interface Atm128AdcConfig[uint8_t client]; interface Resource[uint8_t client]; } } implementation { components Atm128AdcC, AdcP, new ArbitratedReadC(uint16_t) as ArbitrateRead; Read = ArbitrateRead; ReadNow = AdcP; Resource = ArbitrateRead.Resource; Atm128AdcConfig = AdcP; ArbitrateRead.Service -> AdcP.Read; AdcP.Atm128AdcSingle -> Atm128AdcC; } tinyos-2.1.2+dfsg/tos/chips/atm128/adc/WireAdcStreamP.nc000066400000000000000000000022611207233610700225740ustar00rootroot00000000000000/* $Id: WireAdcStreamP.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Support component for AdcReadStreamClientC. * * @author David Gay */ #include "Adc.h" configuration WireAdcStreamP { provides interface ReadStream[uint8_t client]; uses { interface Atm128AdcConfig[uint8_t client]; interface Resource[uint8_t client]; } } implementation { components Atm128AdcC, AdcStreamP, PlatformC, MainC, new AlarmMicro32C(), new ArbitratedReadStreamC(uniqueCount(UQ_ADC_READSTREAM), uint16_t) as ArbitrateReadStream; Resource = ArbitrateReadStream; ReadStream = ArbitrateReadStream; Atm128AdcConfig = AdcStreamP; ArbitrateReadStream.Service -> AdcStreamP; AdcStreamP.Init <- MainC; AdcStreamP.Atm128AdcSingle -> Atm128AdcC; AdcStreamP.Atm128Calibrate -> PlatformC; AdcStreamP.Alarm -> AlarmMicro32C; } tinyos-2.1.2+dfsg/tos/chips/atm128/atm128const.h000066400000000000000000000024261207233610700211500ustar00rootroot00000000000000// $Id: atm128const.h,v 1.4 2006-12-12 18:23:03 vlahan Exp $ /* * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * const_[u]int[8/16/32]_t types are used to declare single and array * constants that should live in ROM/FLASH. These constants must be read * via the corresponding read_[u]int[8/16/32]_t functions. * * This file defines the ATmega128 version of these types and functions. * @author David Gay */ #ifndef ATMEGA128CONST_H #define ATMEGA128CONST_H typedef uint8_t const_uint8_t PROGMEM; typedef uint16_t const_uint16_t PROGMEM; typedef uint32_t const_uint32_t PROGMEM; typedef int8_t const_int8_t PROGMEM; typedef int16_t const_int16_t PROGMEM; typedef int32_t const_int32_t PROGMEM; #define read_uint8_t(x) pgm_read_byte(x) #define read_uint16_t(x) pgm_read_word(x) #define read_uint32_t(x) pgm_read_dword(x) #define read_int8_t(x) ((int8_t)pgm_read_byte(x)) #define read_int16_t(x) ((int16_t)pgm_read_word(x)) #define read_int32_t(x) ((int32_t)pgm_read_dword(x)) #endif tinyos-2.1.2+dfsg/tos/chips/atm128/atm128hardware.h000066400000000000000000000132771207233610700216250ustar00rootroot00000000000000// $Id: atm128hardware.h,v 1.12 2010-06-29 22:07:43 scipio Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2002-2003 Intel Corporation. * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Jason Hill, Philip Levis, Nelson Lee, David Gay * @author Martin Turon */ #ifndef _H_atmega128hardware_H #define _H_atmega128hardware_H #include #if __AVR_LIBC_VERSION__ >= 10400UL #include #else #include #include #endif #include #include #include "atm128const.h" /* We need slightly different defs than SIGNAL, INTERRUPT */ #define AVR_ATOMIC_HANDLER(signame) \ void signame() __attribute__ ((signal)) @atomic_hwevent() @C() #define AVR_NONATOMIC_HANDLER(signame) \ void signame() __attribute__ ((interrupt)) @hwevent() @C() /* Macro to create union casting functions. */ #define DEFINE_UNION_CAST(func_name, from_type, to_type) \ to_type func_name(from_type x) { \ union {from_type f; to_type t;} c = {f:x}; return c.t; } // Bit operators using bit number #define SET_BIT(port, bit) ((port) |= _BV(bit)) #define CLR_BIT(port, bit) ((port) &= ~_BV(bit)) #define READ_BIT(port, bit) (((port) & _BV(bit)) != 0) #define FLIP_BIT(port, bit) ((port) ^= _BV(bit)) #define WRITE_BIT(port, bit, value) \ if (value) SET_BIT((port), (bit)); \ else CLR_BIT((port), (bit)) // Bit operators using bit flag mask #define SET_FLAG(port, flag) ((port) |= (flag)) #define CLR_FLAG(port, flag) ((port) &= ~(flag)) #define READ_FLAG(port, flag) ((port) & (flag)) /* Enables interrupts. */ inline void __nesc_enable_interrupt() @safe() { sei(); } /* Disables all interrupts. */ inline void __nesc_disable_interrupt() @safe() { cli(); } /* Defines data type for storing interrupt mask state during atomic. */ typedef uint8_t __nesc_atomic_t; __nesc_atomic_t __nesc_atomic_start(void); void __nesc_atomic_end(__nesc_atomic_t original_SREG); #ifndef NESC_BUILD_BINARY /* @spontaneous() functions should not be included when NESC_BUILD_BINARY is #defined, to avoid duplicate functions definitions wheb binary components are used. Such functions do need a prototype in all cases, though. */ /* Saves current interrupt mask state and disables interrupts. */ inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { __nesc_atomic_t result = SREG; __nesc_disable_interrupt(); asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ return result; } /* Restores interrupt mask to original state. */ inline void __nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous() @safe() { asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ SREG = original_SREG; } #endif /* Defines the mcu_power_t type for atm128 power management. */ typedef uint8_t mcu_power_t @combine("mcombine"); enum { ATM128_POWER_IDLE = 0, ATM128_POWER_ADC_NR = 1, ATM128_POWER_EXT_STANDBY = 2, ATM128_POWER_SAVE = 3, ATM128_POWER_STANDBY = 4, ATM128_POWER_DOWN = 5, }; /* Combine function. */ mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() { return (m1 < m2)? m1: m2; } /* Floating-point network-type support. These functions must convert to/from a 32-bit big-endian integer that follows the layout of Java's java.lang.float.floatToRawIntBits method. Conveniently, for the AVR family, this is a straight byte copy... */ typedef float nx_float __attribute__((nx_base_be(afloat))); inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() { float f; memcpy(&f, source, sizeof(float)); return f; } inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() { memcpy(target, &value, sizeof(float)); return value; } #endif //_H_atmega128hardware_H tinyos-2.1.2+dfsg/tos/chips/atm128/crc.h000066400000000000000000000121021207233610700176240ustar00rootroot00000000000000// $Id: crc.h,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef CRC_H #define CRC_H /* We don't want to duplicate this fairly large function inside binary components. */ #ifdef NESC_BUILD_BINARY uint16_t crcByte(uint16_t oldCrc, uint8_t byte); #else uint16_t crcTable[256] PROGMEM = { 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; /* * Optimised Atmega128 ITU-T CRC function. * * @param crc Running CRC value * @param b Byte to "add" to the CRC * @return New CRC value */ uint16_t crcByte(uint16_t oldCrc, uint8_t byte) __attribute__((noinline)) @safe() { #if 1 uint16_t *table = crcTable; uint16_t newCrc; asm ("eor %1,%B3\n" "\tlsl %1\n" "\tadc %B2, __zero_reg__\n" "\tadd %A2, %1\n" "\tadc %B2, __zero_reg__\n" "\tlpm\n" "\tmov %B0, %A3\n" "\tmov %A0, r0\n" "\tadiw r30,1\n" "\tlpm\n" "\teor %B0, r0" : "=r" (newCrc), "+r" (byte), "+z" (table) : "r" (oldCrc)); return newCrc; #else uint8_t *magic = (uint8_t *)&crcTable[oldCrc >> 8 ^ byte]; return PRG_RDB(magic) | ((uint8_t)oldCrc ^ PRG_RDB(magic + 1)) << 8; #endif } #endif #endif tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/000077500000000000000000000000001207233610700173655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/Atm128I2C.h000066400000000000000000000046541207233610700210210ustar00rootroot00000000000000// $Id: Atm128I2C.h,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon #ifndef _H_Atm128I2C_h #define _H_Atm128I2C_h #define ATM128_I2C_SLA_WRITE 0x00 #define ATM128_I2C_SLA_READ 0x01 #define UQ_ATM128_I2CMASTER "Atm128I2CMasterC.I2CPacket" enum { ATM128_I2C_BUSERROR = 0x00, ATM128_I2C_START = 0x08, ATM128_I2C_RSTART = 0x10, ATM128_I2C_MW_SLA_ACK = 0x18, ATM128_I2C_MW_SLA_NACK = 0x20, ATM128_I2C_MW_DATA_ACK = 0x28, ATM128_I2C_MW_DATA_NACK = 0x30, ATM128_I2C_M_ARB_LOST = 0x38, ATM128_I2C_MR_SLA_ACK = 0x40, ATM128_I2C_MR_SLA_NACK = 0x48, ATM128_I2C_MR_DATA_ACK = 0x50, ATM128_I2C_MR_DATA_NACK = 0x58 }; #ifndef ATM128_I2C_EXTERNAL_PULLDOWN #define ATM128_I2C_EXTERNAL_PULLDOWN FALSE #endif #endif // _H_Atm128I2C_h tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/Atm128I2C.nc000066400000000000000000000037101207233610700211620ustar00rootroot00000000000000/// $Id: Atm128I2C.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128I2C.h" /** * An interface for stopping the I2C bus. Needed by the resource * reservation system, so that when a client releases you're sure * there's a stop. * * @author Philip Levis * * @version $Id: Atm128I2C.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ */ interface Atm128I2C { async command void stop(); } tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/Atm128I2CMaster.nc000066400000000000000000000045201207233610700223360ustar00rootroot00000000000000/// $Id: Atm128I2CMaster.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128I2C.h" /** * Interface for non-blocking I2C master engine. * * @author Martin Turon */ interface Atm128I2CMaster { /** Ping the I2C device. */ command error_t ping (); /** Write the given data buffer the I2C device. */ command error_t write (uint8_t *data, uint8_t length); /** Read from the I2C device. */ command error_t read (uint8_t *data, uint8_t length); /** Signal that the ping to the I2C device is done. */ event void pingDone (error_t result); /** Signal that the read from the I2C device is done. */ event void readDone (); /** Signal that the write to the I2C device is done. */ event void writeDone (); } tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/Atm128I2CMasterC.nc000066400000000000000000000041631207233610700224440ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The basic client abstraction of the I2C on the Atmega128. I2C * device drivers should instantiate one of these to ensure * exclusive access to the I2C bus. * * @author Philip Levis * @date May 28, 2006 */ #include "Atm128I2C.h" generic configuration Atm128I2CMasterC() { provides interface Resource; provides interface I2CPacket; } implementation { enum { CLIENT_ID = unique(UQ_ATM128_I2CMASTER), }; components Atm128I2CMasterP as I2C; Resource = I2C.Resource[CLIENT_ID]; I2CPacket = I2C.I2CPacket[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/Atm128I2CMasterImplP.nc000066400000000000000000000077061207233610700233110ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The configuration that takes the underlying I2C driver on the * Atmega128 and turns it into a shared abstraction. * * @date May 28 2006 * @author Philip Levis */ generic module Atm128I2CMasterImplP() { provides interface Resource[uint8_t client]; provides interface I2CPacket[uint8_t client]; uses interface Resource as SubResource[uint8_t]; uses interface I2CPacket as SubPacket; uses interface Atm128I2C; uses interface Leds; } implementation { enum { NO_CLIENT = 0xff }; uint8_t currentClient = NO_CLIENT; async command error_t Resource.request[uint8_t id]() { return call SubResource.request[id](); } async command error_t Resource.immediateRequest[uint8_t id]() { error_t rval = call SubResource.immediateRequest[id](); if (rval == SUCCESS) { atomic currentClient = id; } return rval; } event void SubResource.granted[uint8_t id]() { atomic currentClient = id; signal Resource.granted[id](); } async command error_t Resource.release[uint8_t id]() { call Atm128I2C.stop(); // Always stop if someone has released. return call SubResource.release[id](); } async command bool Resource.isOwner[uint8_t id]() { return call SubResource.isOwner[id](); } async command error_t I2CPacket.write[uint8_t id](i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) { atomic { if (currentClient != id) { return FAIL; } } return call SubPacket.write(flags, addr, len, data); } async command error_t I2CPacket.read[uint8_t id](i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) { atomic { if (currentClient != id) { return FAIL; } } return call SubPacket.read(flags, addr, len, data); } async event void SubPacket.readDone(error_t error, uint16_t addr, uint8_t len, uint8_t* data) { signal I2CPacket.readDone[currentClient](error, addr, len, data); } async event void SubPacket.writeDone(error_t error, uint16_t addr, uint8_t len, uint8_t* data) { signal I2CPacket.writeDone[currentClient](error, addr, len, data); } default event void Resource.granted[uint8_t id]() {} default async event void I2CPacket.writeDone[uint8_t id](error_t error, uint16_t addr, uint8_t len, uint8_t* data) {} default async event void I2CPacket.readDone[uint8_t id](error_t error, uint16_t addr, uint8_t len, uint8_t* data) {} } tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/Atm128I2CMasterP.nc000066400000000000000000000051131207233610700224550ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The configuration that takes the underlying I2C driver on the * Atmega128 and turns it into a shared abstraction. * * @date May 28 2006 * @author Philip Levis */ #include "Atm128I2C.h" configuration Atm128I2CMasterP { provides interface Resource[uint8_t client]; provides interface I2CPacket[uint8_t client]; } implementation { enum { ATM128_I2C_CLIENT_COUNT = uniqueCount(UQ_ATM128_I2CMASTER), }; components new FcfsArbiterC(UQ_ATM128_I2CMASTER) as Arbiter; components new AsyncPowerManagerP() as Power; components new Atm128I2CMasterImplP() as I2C; components new Atm128I2CMasterPacketP() as Master; components HplAtm128I2CBusC; components LedsC, NoLedsC; Resource = I2C; I2CPacket = I2C; I2C.SubResource -> Arbiter; I2C.SubPacket -> Master; I2C.Atm128I2C -> Master; Power.AsyncStdControl -> Master; Power.ResourceDefaultOwner -> Arbiter; Master.I2C -> HplAtm128I2CBusC; Master.ReadDebugLeds -> NoLedsC; Master.WriteDebugLeds -> NoLedsC; } tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/Atm128I2CMasterPacketP.nc000066400000000000000000000307061207233610700236130ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * Copyright (c) 2009, Distributed Computing Group (DCG), ETH Zurich. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, * OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. * * * */ #include "Atm128I2C.h" /** * This driver implements an interupt driven I2C Master controller * Hardware Abstraction Layer (HAL) to the ATmega128 * two-wire-interface (TWI) hardware subsystem. * * @author Philip Levis * @author Philipp Sommer, ETH Zurich, sommer@tik.ee.ethz.ch * @author Roland Flury, ETH Zurich, rflury@tik.ee.ethz.ch * @author Thomas Fahrni, ETH Zurich, tfahrni@ee.ethz.ch * @author Richard Huber, ETH Zurich, rihuber@ee.ethz.ch * @author Lars Schor, ETH Zurich, lschor@ee.ethz.ch * @author Andras Biro, University of Szeged * */ generic module Atm128I2CMasterPacketP() { provides interface AsyncStdControl; provides interface I2CPacket; provides interface Atm128I2C; uses interface HplAtm128I2CBus as I2C; uses interface Leds as ReadDebugLeds; uses interface Leds as WriteDebugLeds; } implementation { enum { I2C_OFF = 0, I2C_IDLE = 1, I2C_BUSY = 2, I2C_DATA = 3, I2C_STARTING = 4, I2C_STOPPING = 5, I2C_SLAVE_ACK = 6 } atm128_i2c_state_t; uint8_t state = I2C_OFF; i2c_flags_t packetFlags; uint8_t* packetPtr; uint8_t packetLen; uint8_t index; uint16_t packetAddr; bool reading = FALSE; void i2c_abort(error_t err) { atomic { // Cycle the I2C call I2C.readCurrent(); call I2C.enableInterrupt(FALSE); call I2C.enable(FALSE); call I2C.sendCommand(); call I2C.readCurrent(); call I2C.enable(TRUE); call I2C.sendCommand(); state = I2C_IDLE; if (reading) { signal I2CPacket.readDone(err, packetAddr, packetLen, packetPtr); } else { signal I2CPacket.writeDone(err, packetAddr, packetLen, packetPtr); } } } async command error_t AsyncStdControl.start() { atomic { if (state == I2C_OFF) { call I2C.init(ATM128_I2C_EXTERNAL_PULLDOWN); call I2C.readCurrent(); call I2C.enable(TRUE); call I2C.enableInterrupt(FALSE); call I2C.sendCommand(); state = I2C_IDLE; return SUCCESS; } else { return FAIL; } } } async command error_t AsyncStdControl.stop() { atomic { if (state == I2C_IDLE) { call I2C.readCurrent(); call I2C.enable(FALSE); call I2C.enableInterrupt(FALSE); call I2C.setInterruptPending(FALSE); call I2C.setStop(FALSE); call I2C.sendCommand(); call I2C.off(); state = I2C_OFF; return SUCCESS; } else { return FAIL; } } } inline void readNextByte(bool startRead){ if(!startRead){ packetPtr[index] = call I2C.read(); index++; } if (index < packetLen) { if (index == packetLen - 1 && !(packetFlags & I2C_ACK_END)) { call I2C.enableAck(FALSE); } call I2C.sendCommand(); } else { call I2C.enableInterrupt(FALSE); if (packetFlags & I2C_STOP) { packetFlags &= ~I2C_STOP; call I2C.setStop(TRUE); call I2C.status(); } else { call I2C.setInterruptPending(FALSE); } call I2C.sendCommand(); state = I2C_IDLE; signal I2CPacket.readDone(SUCCESS, packetAddr, packetLen, packetPtr); return; } } inline void writeNextByte(){ if (index < packetLen) { call I2C.write(packetPtr[index]); index++; call I2C.sendCommand(); } else { call I2C.enableInterrupt(FALSE); if (packetFlags & I2C_STOP) { packetFlags &= ~I2C_STOP; call I2C.setStop(TRUE); call WriteDebugLeds.led1On(); } else { call I2C.setInterruptPending(FALSE); } call I2C.sendCommand(); state = I2C_IDLE; call WriteDebugLeds.led2On(); signal I2CPacket.writeDone(SUCCESS, packetAddr, packetLen, packetPtr); } } async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) { atomic { if (state == I2C_IDLE) { state = I2C_BUSY; } else if (state == I2C_OFF) { return EOFF; } else { return EBUSY; } } /* This follows the procedure described on page 209 of the atmega128L * data sheet. It is synchronous (does not handle interrupts).*/ atomic { packetAddr = addr; packetPtr = data; packetLen = len; packetFlags = flags; index = 0; reading = TRUE; } /* Clear interrupt pending, send the I2C start command and abort if we're not in the start state.*/ call I2C.readCurrent(); atomic { call I2C.enableInterrupt(TRUE); call I2C.setInterruptPending(TRUE); call I2C.enableAck(FALSE); call I2C.setStop(FALSE); if (flags & I2C_START) { call I2C.setStart(TRUE); state = I2C_STARTING; } else if (len > 1 || (len > 0 && flags & I2C_ACK_END)) { call I2C.enableAck(TRUE); state = I2C_DATA; } else if (len == 1) { // length is 1 state = I2C_DATA; } else if (flags & I2C_STOP) { state = I2C_STOPPING; call I2C.enableAck(FALSE); call I2C.setStop(TRUE); } call I2C.sendCommand(); } return SUCCESS; } async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) { atomic { if (state == I2C_IDLE) { state = I2C_BUSY; } else if (state == I2C_OFF) { return EOFF; } else { return EBUSY; } } /* This follows the procedure described on page 209 of the atmega128L * data sheet. It is synchronous (does not handle interrupts).*/ atomic { packetAddr = addr; packetPtr = data; packetLen = len; packetFlags = flags; index = 0; reading = FALSE; } call I2C.readCurrent(); atomic { call I2C.setInterruptPending(TRUE); call I2C.enableAck(TRUE); call I2C.enableInterrupt(TRUE); call I2C.setStop(FALSE); if (flags & I2C_START) { call I2C.setStart(TRUE); // call WriteDebugLeds.led0On(); state = I2C_STARTING; } else if (len > 0) { state = I2C_DATA; writeNextByte(); return SUCCESS; } else if (flags & I2C_STOP) { state = I2C_STOPPING; call I2C.enableAck(FALSE); call I2C.setStop(TRUE); } else { // A 0-length packet with no start and no stop.... state = I2C_IDLE; return FAIL; } call I2C.sendCommand(); } return SUCCESS; } /** * A command has been sent over the I2C. * The diversity of I2C options and modes means that there are a * plethora of cases to consider. To simplify reading the code, * they're described here and the corresponding statements * are only labelled with identifying comments. * * When reading: * R1) A start condition has been requested. This requires * sending the start signal. When the interrupt comes in, * send the first byte of the packet. This driver * detects this condition by the START flag being set. * A successful send of the start clears the local copy of * the flag. The driver does not distinguish between start * and repeated start. * R2) Sending the address byte with the read bit set. * R3) Sending the first byte of a two-byte address with the * read bit set. * R4) Sending the second byte of a two-byte address. * R5) Reading any byte except the last byte of a packet. * R6) Reading the last byte of the packet, with ACK_END requested. * R7) Reading the last byte of the packet, with ACK_END cleared. * R8) Sending a stop condition. */ async event void I2C.commandComplete() { call I2C.readCurrent(); atomic { switch(state){ case I2C_SLAVE_ACK: { //check for slave addr ack uint8_t i2c_status=call I2C.status(); if (reading == TRUE) { if(i2c_status==0x40){ state = I2C_DATA; readNextByte(TRUE); } else { i2c_abort(EOFF); return; } } else{ if(i2c_status==0x18){ state = I2C_DATA; writeNextByte(); } else { i2c_abort(EOFF); return; } } } break; case I2C_DATA: if (reading == TRUE) readNextByte(FALSE); else // Writing writeNextByte(); break; case I2C_STARTING: packetFlags &= ~I2C_START; call I2C.setStart(FALSE); if (call I2C.status() != ATM128_I2C_START && call I2C.status() != ATM128_I2C_RSTART) { i2c_abort(FAIL); return; } //after the START condition, we write the address call I2C.enableAck(TRUE); call I2C.write(((packetAddr & 0x7f) << 1) | ((reading == TRUE) ? ATM128_I2C_SLA_READ : ATM128_I2C_SLA_WRITE)); state = I2C_SLAVE_ACK; call I2C.sendCommand(); break; } } } async command void Atm128I2C.stop() { atomic { call I2C.readCurrent(); call I2C.enableInterrupt(FALSE); call I2C.setStop(TRUE); call I2C.setInterruptPending(TRUE); call I2C.sendCommand(); } } } tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/HplAtm128I2CBus.nc000066400000000000000000000066221207233610700223050ustar00rootroot00000000000000/// $Id: HplAtm128I2CBus.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128I2C.h" /** * This driver implements direct I2C register access and a blocking master * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its * two-wire-interface (TWI) hardware subsystem. * * @author Martin Turon * @author Philip Levis * * @version $Id: HplAtm128I2CBus.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ */ interface HplAtm128I2CBus { async command void init(bool hasExternalPulldown); async command void off(); async command uint8_t status(); async command void readCurrent(); async command void sendCommand(); async event void commandComplete(); // Transaction interface async command void setStart(bool on); async command bool hasStart(); async command void setStop(bool on); async command bool hasStop(); async command void enableAck(bool enable); async command bool hasAcks(); async command void enableInterrupt(bool enable); async command bool isInterruptEnabled(); // Examines actual register. Included so that code which needs // to spin in TWINT does not have to read out cached copies. async command bool isRealInterruptPending(); // Operates on cached copy (from readCurrent) async command bool isInterruptPending(); // NOTE: writing a 1 in the interrupt pending bit (TWINT) of the // atm128 I2C control register (TWCR) will *clear* the bit if it // is set. This is how you tell the I2C to take the next action, // as when the bit is cleared it starts the next operation. async command void setInterruptPending(bool on); async command void enable(bool on); async command bool isEnabled(); async command bool hasWriteCollided(); // Data interface to TWDR async command void write(uint8_t data); async command uint8_t read(); } tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/HplAtm128I2CBusC.nc000066400000000000000000000043501207233610700224040ustar00rootroot00000000000000/// $Id: HplAtm128I2CBusC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2006 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This driver implements direct I2C register access and a blocking master * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its * two-wire-interface (TWI) hardware subsystem. * * @author Martin Turon * @author Philip Levis * * @version $Id: HplAtm128I2CBusC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ */ configuration HplAtm128I2CBusC { provides interface HplAtm128I2CBus as I2C; } implementation { components HplAtm128GeneralIOC as IO, HplAtm128I2CBusP as Bus; I2C = Bus.I2C; Bus.I2CClk -> IO.PortD0; Bus.I2CData -> IO.PortD1; } tinyos-2.1.2+dfsg/tos/chips/atm128/i2c/HplAtm128I2CBusP.nc000066400000000000000000000120131207233610700224140ustar00rootroot00000000000000/// $Id: HplAtm128I2CBusP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #define F_CPU 7372800 #include "Atm128I2C.h" /** * This driver implements direct I2C register access and a blocking master * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its * two-wire-interface (TWI) hardware subsystem. * * @author Martin Turon * @author Philip Levis * * @version $Id: HplAtm128I2CBusP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ */ module HplAtm128I2CBusP { provides interface HplAtm128I2CBus as I2C; uses { interface GeneralIO as I2CClk; interface GeneralIO as I2CData; } } implementation { uint8_t current; async command void I2C.init(bool hasExternalPulldown) { // Set the internal pullup resisters if (hasExternalPulldown) { //call I2CClk.makeOutput(); //call I2CData.makeOutput(); call I2CClk.set(); call I2CData.set(); } call I2CClk.makeInput(); call I2CData.makeInput(); TWSR = 0; // set prescaler == 0 TWBR = (F_CPU / 50000UL - 16) / 2; // set I2C baud rate //TWBR = 50; TWAR = 0; TWCR = 0; } async command void I2C.off() { call I2CClk.clr(); call I2CData.clr(); } async command uint8_t I2C.status() { return TWSR & 0xf8; } async command void I2C.sendCommand() { atomic TWCR = current; } async command void I2C.readCurrent() { atomic current = TWCR; } /** Send START symbol and begin I2C bus transaction. */ async command void I2C.setStart(bool on) { if (on) { atomic SET_BIT(current, TWSTA); } else { atomic CLR_BIT(current, TWSTA); } } async command bool I2C.hasStart() { return READ_BIT(current, TWSTA); } async command void I2C.setStop(bool on) { if (on) { atomic SET_BIT(current, TWSTO); } else { atomic CLR_BIT(current, TWSTO); } } async command bool I2C.hasStop() { return READ_BIT(current, TWSTO); } /** Write a byte to an I2C slave device. */ async command void I2C.write(uint8_t data) { TWDR = data; } async command uint8_t I2C.read() { return TWDR; } async command void I2C.enableAck(bool enable) { if (enable) { atomic SET_BIT(current, TWEA); } else { atomic CLR_BIT(current, TWEA); } } async command bool I2C.hasAcks() { return READ_BIT(current, TWEA); } async command void I2C.enableInterrupt(bool enable) { if (enable) { atomic SET_BIT(current, TWIE); } else { atomic CLR_BIT(current, TWIE); } } async command bool I2C.isInterruptEnabled() { return READ_BIT(current, TWIE); } async command bool I2C.isRealInterruptPending() { return READ_BIT(TWCR, TWINT); } async command bool I2C.isInterruptPending() { return READ_BIT(current, TWINT); } async command void I2C.setInterruptPending(bool on) { if (on) { atomic SET_BIT(current, TWINT); } else { atomic CLR_BIT(current, TWINT); } } async command void I2C.enable(bool enable) { if (enable) { atomic SET_BIT(current, TWEN); } else { atomic CLR_BIT(current, TWEN); } } async command bool I2C.isEnabled() { return READ_BIT(current, TWEN); } async command bool I2C.hasWriteCollided() { return READ_BIT(current, TWWC); } default async event void I2C.commandComplete() { } AVR_ATOMIC_HANDLER(SIG_2WIRE_SERIAL) { signal I2C.commandComplete(); } } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/000077500000000000000000000000001207233610700176615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/pins/Atm128GpioInterruptC.nc000066400000000000000000000016361207233610700240240ustar00rootroot00000000000000/// $Id: Atm128GpioInterruptC.nc,v 1.6 2010-05-14 13:16:55 mmaroti Exp $ /** * @author Phil Levis */ generic module Atm128GpioInterruptC() @safe() { provides interface GpioInterrupt as Interrupt; uses interface HplAtm128Interrupt as Atm128Interrupt; } implementation { error_t enable( bool rising ) { atomic { call Atm128Interrupt.disable(); call Atm128Interrupt.clear(); call Atm128Interrupt.edge( rising ); call Atm128Interrupt.enable(); } return SUCCESS; } async command error_t Interrupt.enableRisingEdge() { return enable( TRUE ); } async command error_t Interrupt.enableFallingEdge() { return enable( FALSE ); } async command error_t Interrupt.disable() { call Atm128Interrupt.disable(); return SUCCESS; } async event void Atm128Interrupt.fired() { signal Interrupt.fired(); } default async event void Interrupt.fired() { } } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/Atm128Interrupt.h000066400000000000000000000050661207233610700227320ustar00rootroot00000000000000// $Id: Atm128Interrupt.h,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon #ifndef _H_Atm128Interrupt_h #define _H_Atm128Interrupt_h //====================== External Interrupts =============================== /* Sleep modes */ enum { ATM128_IRQ_ON_LOW = 0, ATM128_IRQ_ON_CHANGE = 1, ATM128_IRQ_ON_FALL = 2, ATM128_IRQ_ON_RISE = 3, }; /* Interrupt Control Register */ typedef struct { uint8_t isc0 : 2; //!< Interrupt Sense Control uint8_t isc1 : 2; //!< Interrupt Sense Control uint8_t isc2 : 2; //!< Interrupt Sense Control uint8_t isc3 : 2; //!< Interrupt Sense Control } Atm128_InterruptCtrl_t; typedef Atm128_InterruptCtrl_t Atm128_EICRA_t; //!< Ext Interrupt Control A typedef Atm128_InterruptCtrl_t Atm128_EICRB_t; //!< Ext Interrupt Control B typedef uint8_t Atm128_EIMSK_t; //!< External Interrupt Mask Register typedef uint8_t Atm128_EIFR_t; //!< External Interrupt Flag Register #endif //_H_Atm128Interrupt_h tinyos-2.1.2+dfsg/tos/chips/atm128/pins/Atm128InterruptC.nc000066400000000000000000000052201207233610700231760ustar00rootroot00000000000000/// $Id: Atm128InterruptC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Joe Polastre * @author Martin Turon */ generic module Atm128InterruptC() { provides interface Interrupt; uses interface HplAtm128Interrupt; } implementation { /** * enable an edge interrupt on the Interrupt pin */ async command error_t Interrupt.startWait(bool low_to_high) { atomic { call HplAtm128Interrupt.disable(); call HplAtm128Interrupt.clear(); call HplAtm128Interrupt.edge(low_to_high); call HplAtm128Interrupt.enable(); } return SUCCESS; } /** * disables Interrupt interrupts */ async command error_t Interrupt.disable() { call HplAtm128Interrupt.disable(); return SUCCESS; } /** * Event fired by lower level interrupt dispatch for Interrupt */ async event void HplAtm128Interrupt.fired() { // The flag is automatically cleared, clearing it again can cause missed interrupts // call HplAtm128Interrupt.clear(); signal Interrupt.fired(); } default async event void Interrupt.fired() { } } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128GeneralIOC.nc000066400000000000000000000153061207233610700234610ustar00rootroot00000000000000/// $Id: HplAtm128GeneralIOC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include /** * Provide GeneralIO interfaces for all of the ATmega128's pins. * * @author Martin Turon */ configuration HplAtm128GeneralIOC { // provides all the ports as raw ports provides { interface GeneralIO as PortA0; interface GeneralIO as PortA1; interface GeneralIO as PortA2; interface GeneralIO as PortA3; interface GeneralIO as PortA4; interface GeneralIO as PortA5; interface GeneralIO as PortA6; interface GeneralIO as PortA7; interface GeneralIO as PortB0; interface GeneralIO as PortB1; interface GeneralIO as PortB2; interface GeneralIO as PortB3; interface GeneralIO as PortB4; interface GeneralIO as PortB5; interface GeneralIO as PortB6; interface GeneralIO as PortB7; interface GeneralIO as PortC0; interface GeneralIO as PortC1; interface GeneralIO as PortC2; interface GeneralIO as PortC3; interface GeneralIO as PortC4; interface GeneralIO as PortC5; interface GeneralIO as PortC6; interface GeneralIO as PortC7; interface GeneralIO as PortD0; interface GeneralIO as PortD1; interface GeneralIO as PortD2; interface GeneralIO as PortD3; interface GeneralIO as PortD4; interface GeneralIO as PortD5; interface GeneralIO as PortD6; interface GeneralIO as PortD7; interface GeneralIO as PortE0; interface GeneralIO as PortE1; interface GeneralIO as PortE2; interface GeneralIO as PortE3; interface GeneralIO as PortE4; interface GeneralIO as PortE5; interface GeneralIO as PortE6; interface GeneralIO as PortE7; interface GeneralIO as PortF0; interface GeneralIO as PortF1; interface GeneralIO as PortF2; interface GeneralIO as PortF3; interface GeneralIO as PortF4; interface GeneralIO as PortF5; interface GeneralIO as PortF6; interface GeneralIO as PortF7; interface GeneralIO as PortG0; interface GeneralIO as PortG1; interface GeneralIO as PortG2; interface GeneralIO as PortG3; interface GeneralIO as PortG4; } } implementation { components new HplAtm128GeneralIOPortP((uint8_t)&PORTA, (uint8_t)&DDRA, (uint8_t)&PINA) as PortA, new HplAtm128GeneralIOPortP((uint8_t)&PORTB, (uint8_t)&DDRB, (uint8_t)&PINB) as PortB, new HplAtm128GeneralIOPortP((uint8_t)&PORTC, (uint8_t)&DDRC, (uint8_t)&PINC) as PortC, new HplAtm128GeneralIOPortP((uint8_t)&PORTD, (uint8_t)&DDRD, (uint8_t)&PIND) as PortD, new HplAtm128GeneralIOPortP((uint8_t)&PORTE, (uint8_t)&DDRE, (uint8_t)&PINE) as PortE, new HplAtm128GeneralIOPortP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF) as PortF, // PortF cannot use sbi, cbi new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 0) as F0, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 1) as F1, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 2) as F2, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 3) as F3, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 4) as F4, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 5) as F5, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 6) as F6, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 7) as F7, // PortG only exposes 5 bits and cannot use sbi, cbi new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 0) as G0, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 1) as G1, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 2) as G2, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 3) as G3, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 4) as G4 ; PortA0 = PortA.Pin0; PortA1 = PortA.Pin1; PortA2 = PortA.Pin2; PortA3 = PortA.Pin3; PortA4 = PortA.Pin4; PortA5 = PortA.Pin5; PortA6 = PortA.Pin6; PortA7 = PortA.Pin7; PortB0 = PortB.Pin0; PortB1 = PortB.Pin1; PortB2 = PortB.Pin2; PortB3 = PortB.Pin3; PortB4 = PortB.Pin4; PortB5 = PortB.Pin5; PortB6 = PortB.Pin6; PortB7 = PortB.Pin7; PortC0 = PortC.Pin0; PortC1 = PortC.Pin1; PortC2 = PortC.Pin2; PortC3 = PortC.Pin3; PortC4 = PortC.Pin4; PortC5 = PortC.Pin5; PortC6 = PortC.Pin6; PortC7 = PortC.Pin7; PortD0 = PortD.Pin0; PortD1 = PortD.Pin1; PortD2 = PortD.Pin2; PortD3 = PortD.Pin3; PortD4 = PortD.Pin4; PortD5 = PortD.Pin5; PortD6 = PortD.Pin6; PortD7 = PortD.Pin7; PortE0 = PortE.Pin0; PortE1 = PortE.Pin1; PortE2 = PortE.Pin2; PortE3 = PortE.Pin3; PortE4 = PortE.Pin4; PortE5 = PortE.Pin5; PortE6 = PortE.Pin6; PortE7 = PortE.Pin7; PortF0 = PortF.Pin0; PortF1 = PortF.Pin1; PortF2 = PortF.Pin2; PortF3 = PortF.Pin3; PortF4 = PortF.Pin4; PortF5 = PortF.Pin5; PortF6 = PortF.Pin6; PortF7 = PortF.Pin7; PortG0 = G0; PortG1 = G1; PortG2 = G2; PortG3 = G3; PortG4 = G4; } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc000066400000000000000000000054521207233610700241460ustar00rootroot00000000000000/// $Id: HplAtm128GeneralIOPinP.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Generic pin access for pins mapped into I/O space (for which the sbi, cbi * instructions give atomic updates). This can be used for ports A-E. * * @author Martin Turon * @author David Gay */ generic module HplAtm128GeneralIOPinP (uint8_t port_addr, uint8_t ddr_addr, uint8_t pin_addr, uint8_t bit) @safe() { provides interface GeneralIO as IO; } implementation { #define pin (*TCAST(volatile uint8_t * ONE, pin_addr)) #define port (*TCAST(volatile uint8_t * ONE, port_addr)) #define ddr (*TCAST(volatile uint8_t * ONE, ddr_addr)) inline async command bool IO.get() { return READ_BIT (pin, bit); } inline async command void IO.set() { SET_BIT (port, bit); } inline async command void IO.clr() { CLR_BIT (port, bit); } async command void IO.toggle() { atomic FLIP_BIT (port, bit); } inline async command void IO.makeInput() { CLR_BIT (ddr, bit); } inline async command bool IO.isInput() { return !READ_BIT(ddr, bit); } inline async command void IO.makeOutput() { SET_BIT (ddr, bit); } inline async command bool IO.isOutput() { return READ_BIT(ddr, bit); } } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128GeneralIOPortP.nc000066400000000000000000000056321207233610700243440ustar00rootroot00000000000000/// $Id: HplAtm128GeneralIOPortP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Generic component to expose a full 8-bit port of GPIO pins. * * @author Martin Turon */ generic configuration HplAtm128GeneralIOPortP (uint8_t port_addr, uint8_t ddr_addr, uint8_t pin_addr) { // provides all the ports as raw ports provides { interface GeneralIO as Pin0; interface GeneralIO as Pin1; interface GeneralIO as Pin2; interface GeneralIO as Pin3; interface GeneralIO as Pin4; interface GeneralIO as Pin5; interface GeneralIO as Pin6; interface GeneralIO as Pin7; } } implementation { components new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 0) as Bit0, new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 1) as Bit1, new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 2) as Bit2, new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 3) as Bit3, new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 4) as Bit4, new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 5) as Bit5, new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 6) as Bit6, new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 7) as Bit7; Pin0 = Bit0; Pin1 = Bit1; Pin2 = Bit2; Pin3 = Bit3; Pin4 = Bit4; Pin5 = Bit5; Pin6 = Bit6; Pin7 = Bit7; } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc000066400000000000000000000055401207233610700250110ustar00rootroot00000000000000/// $Id: HplAtm128GeneralIOSlowPinP.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Generic pin access for pins not mapped into I/O space (for which the * sbi, cbi instructions cannot be used). This can be used for ports F-G. * * @author Martin Turon * @author David Gay */ generic module HplAtm128GeneralIOSlowPinP (uint8_t port_addr, uint8_t ddr_addr, uint8_t pin_addr, uint8_t bit) @safe() { provides interface GeneralIO as IO; } implementation { #define pin (*TCAST(volatile uint8_t * ONE, pin_addr)) #define port (*TCAST(volatile uint8_t * ONE, port_addr)) #define ddr (*TCAST(volatile uint8_t * ONE, ddr_addr)) inline async command bool IO.get() { return READ_BIT (pin, bit); } inline async command void IO.set() { atomic SET_BIT (port, bit); } inline async command void IO.clr() { atomic CLR_BIT (port, bit); } inline async command void IO.toggle() { atomic FLIP_BIT (port, bit); } inline async command void IO.makeInput() { atomic CLR_BIT (ddr, bit); } inline async command bool IO.isInput() { return !READ_BIT(ddr, bit); } inline async command void IO.makeOutput() { atomic SET_BIT (ddr, bit); } inline async command bool IO.isOutput() { return READ_BIT(ddr, bit); } } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128Interrupt.nc000066400000000000000000000052221207233610700235410ustar00rootroot00000000000000/// $Id: HplAtm128Interrupt.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to an Atmega128 external interrupt pin * * @author Joe Polastre * @author Martin Turon */ interface HplAtm128Interrupt { /** * Enables ATmega128 hardware interrupt on a particular port */ async command void enable(); /** * Disables ATmega128 hardware interrupt on a particular port */ async command void disable(); /** * Clears the ATmega128 Interrupt Pending Flag for a particular port */ async command void clear(); /** * Gets the current value of the input voltage of a port * * @return TRUE if the pin is set high, FALSE if it is set low */ async command bool getValue(); /** * Sets whether the edge should be high to low or low to high. * @param TRUE if the interrupt should be triggered on a low to high * edge transition, false for interrupts on a high to low transition */ async command void edge(bool low_to_high); /** * Signalled when an interrupt occurs on a port */ async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128InterruptC.nc000066400000000000000000000066071207233610700236540ustar00rootroot00000000000000/// $Id: HplAtm128InterruptC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include /** * Component providing access to all external interrupt pins on ATmega128. * @author Martin Turon */ configuration HplAtm128InterruptC { // provides all the ports as raw ports provides { interface HplAtm128Interrupt as Int0; interface HplAtm128Interrupt as Int1; interface HplAtm128Interrupt as Int2; interface HplAtm128Interrupt as Int3; interface HplAtm128Interrupt as Int4; interface HplAtm128Interrupt as Int5; interface HplAtm128Interrupt as Int6; interface HplAtm128Interrupt as Int7; } } implementation { #define IRQ_PORT_D_PIN(bit) (uint8_t)&EICRA, ISC##bit##0, ISC##bit##1, bit #define IRQ_PORT_E_PIN(bit) (uint8_t)&EICRB, ISC##bit##0, ISC##bit##1, bit components HplAtm128InterruptSigP as IrqVector, new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(0)) as IntPin0, new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(1)) as IntPin1, new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(2)) as IntPin2, new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(3)) as IntPin3, new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(4)) as IntPin4, new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(5)) as IntPin5, new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(6)) as IntPin6, new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(7)) as IntPin7; Int0 = IntPin0; Int1 = IntPin1; Int2 = IntPin2; Int3 = IntPin3; Int4 = IntPin4; Int5 = IntPin5; Int6 = IntPin6; Int7 = IntPin7; IntPin0.IrqSignal -> IrqVector.IntSig0; IntPin1.IrqSignal -> IrqVector.IntSig1; IntPin2.IrqSignal -> IrqVector.IntSig2; IntPin3.IrqSignal -> IrqVector.IntSig3; IntPin4.IrqSignal -> IrqVector.IntSig4; IntPin5.IrqSignal -> IrqVector.IntSig5; IntPin6.IrqSignal -> IrqVector.IntSig6; IntPin7.IrqSignal -> IrqVector.IntSig7; } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc000066400000000000000000000055631207233610700243400ustar00rootroot00000000000000/// $Id: HplAtm128InterruptPinP.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interrupt interface access for interrupt capable GPIO pins. * * @author Martin Turon */ generic module HplAtm128InterruptPinP (uint8_t ctrl_addr, uint8_t edge0bit, uint8_t edge1bit, uint8_t bit) @safe() { provides interface HplAtm128Interrupt as Irq; uses interface HplAtm128InterruptSig as IrqSignal; } implementation { inline async command bool Irq.getValue() { return (EIFR & (1 << bit)) != 0; } inline async command void Irq.clear() { EIFR = 1 << bit; } inline async command void Irq.enable() { EIMSK |= 1 << bit; } inline async command void Irq.disable() { EIMSK &= ~(1 << bit); } #define ctrl (*TCAST(volatile uint8_t * ONE, ctrl_addr)) inline async command void Irq.edge(bool low_to_high) { ctrl |= 1 << edge1bit; // use edge mode // and select rising vs falling if (low_to_high) ctrl |= 1 << edge0bit; else ctrl &= ~(1 << edge0bit); } /** * Forward the external interrupt event. This ties the statically * allocated interrupt vector SIG_INTERRUPT##bit to a particular * pin passed in via the generic component instantiation. */ async event void IrqSignal.fired() { signal Irq.fired(); } default async event void Irq.fired() { } } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128InterruptSig.nc000066400000000000000000000040331207233610700242030ustar00rootroot00000000000000/// $Id: HplAtm128InterruptSig.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to an Atmega128 external interrupt pin that exposes just the * interrupt vector routine for easy linking to generic components (see * HplAtm128Interrupt for the full interface). * * @author Martin Turon * @see HplAtm128Interrupt */ interface HplAtm128InterruptSig { /** * Signalled when an interrupt occurs on a pin */ async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/HplAtm128InterruptSigP.nc000066400000000000000000000064211207233610700243260ustar00rootroot00000000000000/// $Id: HplAtm128InterruptSigP.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interrupt interface access for interrupt capable GPIO pins. * Exposes just the interrupt vector routine for * easy linking to generic components. * * @author Martin Turon */ module HplAtm128InterruptSigP @safe() { provides interface HplAtm128InterruptSig as IntSig0; provides interface HplAtm128InterruptSig as IntSig1; provides interface HplAtm128InterruptSig as IntSig2; provides interface HplAtm128InterruptSig as IntSig3; provides interface HplAtm128InterruptSig as IntSig4; provides interface HplAtm128InterruptSig as IntSig5; provides interface HplAtm128InterruptSig as IntSig6; provides interface HplAtm128InterruptSig as IntSig7; } implementation { default async event void IntSig0.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT0 ) { signal IntSig0.fired(); } default async event void IntSig1.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT1 ) { signal IntSig1.fired(); } default async event void IntSig2.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT2 ) { signal IntSig2.fired(); } default async event void IntSig3.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT3 ) { signal IntSig3.fired(); } default async event void IntSig4.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT4 ) { signal IntSig4.fired(); } default async event void IntSig5.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT5 ) { signal IntSig5.fired(); } default async event void IntSig6.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT6 ) { signal IntSig6.fired(); } default async event void IntSig7.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT7 ) { signal IntSig7.fired(); } } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/sim/000077500000000000000000000000001207233610700204515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/pins/sim/HplAtm128GeneralIOC.nc000066400000000000000000000160321207233610700242460ustar00rootroot00000000000000// $Id: HplAtm128GeneralIOC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /// @author Martin Turon /** * Provide GeneralIO interfaces for all of the ATmega128's pins. */ #include configuration HplAtm128GeneralIOC { // provides all the ports as raw ports provides { interface GeneralIO as PortA0; interface GeneralIO as PortA1; interface GeneralIO as PortA2; interface GeneralIO as PortA3; interface GeneralIO as PortA4; interface GeneralIO as PortA5; interface GeneralIO as PortA6; interface GeneralIO as PortA7; interface GeneralIO as PortB0; interface GeneralIO as PortB1; interface GeneralIO as PortB2; interface GeneralIO as PortB3; interface GeneralIO as PortB4; interface GeneralIO as PortB5; interface GeneralIO as PortB6; interface GeneralIO as PortB7; interface GeneralIO as PortC0; interface GeneralIO as PortC1; interface GeneralIO as PortC2; interface GeneralIO as PortC3; interface GeneralIO as PortC4; interface GeneralIO as PortC5; interface GeneralIO as PortC6; interface GeneralIO as PortC7; interface GeneralIO as PortD0; interface GeneralIO as PortD1; interface GeneralIO as PortD2; interface GeneralIO as PortD3; interface GeneralIO as PortD4; interface GeneralIO as PortD5; interface GeneralIO as PortD6; interface GeneralIO as PortD7; interface GeneralIO as PortE0; interface GeneralIO as PortE1; interface GeneralIO as PortE2; interface GeneralIO as PortE3; interface GeneralIO as PortE4; interface GeneralIO as PortE5; interface GeneralIO as PortE6; interface GeneralIO as PortE7; interface GeneralIO as PortF0; interface GeneralIO as PortF1; interface GeneralIO as PortF2; interface GeneralIO as PortF3; interface GeneralIO as PortF4; interface GeneralIO as PortF5; interface GeneralIO as PortF6; interface GeneralIO as PortF7; interface GeneralIO as PortG0; interface GeneralIO as PortG1; interface GeneralIO as PortG2; interface GeneralIO as PortG3; interface GeneralIO as PortG4; } } implementation { components new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTA, (uint8_t)ATM128_DDRA, (uint8_t)ATM128_PINA) as PortA, new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTB, (uint8_t)ATM128_DDRB, (uint8_t)ATM128_PINB) as PortB, new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTC, (uint8_t)ATM128_DDRC, (uint8_t)ATM128_PINC) as PortC, new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTD, (uint8_t)ATM128_DDRD, (uint8_t)ATM128_PIND) as PortD, new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTE, (uint8_t)ATM128_DDRE, (uint8_t)ATM128_PINE) as PortE, new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF) as PortF, // PortF cannot use sbi, cbi new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 0) as F0, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 1) as F1, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 2) as F2, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 3) as F3, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 4) as F4, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 5) as F5, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 6) as F6, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 7) as F7, // PortG only exposes 5 bits and cannot use sbi, cbi new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 0) as G0, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 1) as G1, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 2) as G2, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 3) as G3, new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 4) as G4 ; PortA0 = PortA.Pin0; PortA1 = PortA.Pin1; PortA2 = PortA.Pin2; PortA3 = PortA.Pin3; PortA4 = PortA.Pin4; PortA5 = PortA.Pin5; PortA6 = PortA.Pin6; PortA7 = PortA.Pin7; PortB0 = PortB.Pin0; PortB1 = PortB.Pin1; PortB2 = PortB.Pin2; PortB3 = PortB.Pin3; PortB4 = PortB.Pin4; PortB5 = PortB.Pin5; PortB6 = PortB.Pin6; PortB7 = PortB.Pin7; PortC0 = PortC.Pin0; PortC1 = PortC.Pin1; PortC2 = PortC.Pin2; PortC3 = PortC.Pin3; PortC4 = PortC.Pin4; PortC5 = PortC.Pin5; PortC6 = PortC.Pin6; PortC7 = PortC.Pin7; PortD0 = PortD.Pin0; PortD1 = PortD.Pin1; PortD2 = PortD.Pin2; PortD3 = PortD.Pin3; PortD4 = PortD.Pin4; PortD5 = PortD.Pin5; PortD6 = PortD.Pin6; PortD7 = PortD.Pin7; PortE0 = PortE.Pin0; PortE1 = PortE.Pin1; PortE2 = PortE.Pin2; PortE3 = PortE.Pin3; PortE4 = PortE.Pin4; PortE5 = PortE.Pin5; PortE6 = PortE.Pin6; PortE7 = PortE.Pin7; PortF0 = PortF.Pin0; PortF1 = PortF.Pin1; PortF2 = PortF.Pin2; PortF3 = PortF.Pin3; PortF4 = PortF.Pin4; PortF5 = PortF.Pin5; PortF6 = PortF.Pin6; PortF7 = PortF.Pin7; PortG0 = G0; PortG1 = G1; PortG2 = G2; PortG3 = G3; PortG4 = G4; } tinyos-2.1.2+dfsg/tos/chips/atm128/pins/sim/HplAtm128GeneralIOPinP.nc000066400000000000000000000054271207233610700247400ustar00rootroot00000000000000// $Id: HplAtm128GeneralIOPinP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /// @author Martin Turon /// @author David Gay /** * Generic pin access for pins mapped into I/O space (for which the sbi, cbi * instructions give atomic updates). This can be used for ports A-E. */ generic module HplAtm128GeneralIOPinP (uint8_t port_addr, uint8_t ddr_addr, uint8_t pin_addr, uint8_t bit) { provides interface GeneralIO as IO; } implementation { #define pin pin_addr #define port port_addr #define ddr ddr_addr inline async command bool IO.get() { return READ_BIT (port, bit); } inline async command void IO.set() { dbg("Pins", "Setting bit %i of port %i.\n", (int)bit, (int)port); SET_BIT (port, bit); } inline async command void IO.clr() { CLR_BIT (port, bit); } inline async command void IO.toggle() { atomic FLIP_BIT (port, bit); } inline async command void IO.makeInput() { CLR_BIT (ddr, bit); } inline async command void IO.makeOutput() { SET_BIT (ddr, bit); } inline async command bool IO.isInput() { return !READ_BIT (ddr, bit); } inline async command bool IO.isOutput() { return READ_BIT (ddr, bit); } } tinyos-2.1.2+dfsg/tos/chips/atm128/sim/000077500000000000000000000000001207233610700175005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/sim/McuSleepC.nc000066400000000000000000000077511207233610700216540ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * TOSSIM Implementation of TEP 112 (Microcontroller Power Management) * for the Atmega128. It currently does nothing. * * 

     *  $Id: McuSleepC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
 *
    * * @author Philip Levis * @date October 26, 2005 * */ module McuSleepC { provides { interface McuSleep; interface McuPowerState; } uses { interface McuPowerOverride; } } implementation { bool dirty = TRUE; mcu_power_t powerState = ATM128_POWER_IDLE; /* Note that the power values are maintained in an order * based on their active components, NOT on their values. * Look at atm128hardware.h and page 42 of the ATmeg128 * manual (figure 17).*/ // NOTE: This table should be in progmem. const uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = { 0, (1 << SM0), (1 << SM2) | (1 << SM1) | (1 << SM0), (1 << SM1) | (1 << SM0), (1 << SM2) | (1 << SM1), (1 << SM1)}; mcu_power_t getPowerState() { uint8_t diff; // Are external timers running? if (TIMSK & ~((1 << OCIE0) | ( 1 << TOIE0))) { return ATM128_POWER_IDLE; } // SPI (Radio stack on mica/micaZ else if (READ_BIT(SPCR, SPIE)) { return ATM128_POWER_IDLE; } // UARTs are active else if (UCSR0B & ((1 << TXCIE) | (1 << RXCIE))) { // UART return ATM128_POWER_IDLE; } else if (UCSR1B & ((1 << TXCIE) | (1 << RXCIE))) { // UART return ATM128_POWER_IDLE; } // ADC is enbaled else if (READ_BIT(ADCSR, ADEN)) { return ATM128_POWER_ADC_NR; } // How soon for the timer to go off? else if (TIMSK & ((1< * * $Id: atm128hardware.h,v 1.8 2010-06-29 22:07:43 scipio Exp $ */ #ifndef _H_atmega128hardware_H #define _H_atmega128hardware_H #include #include uint8_t atm128RegFile[TOSSIM_MAX_NODES][0xa0]; #define REG_ACCESS(x) atm128RegFile[sim_node()][x] /* We need slightly different defs than SIGNAL, INTERRUPT */ #define AVR_ATOMIC_HANDLER(signame) \ void signame() @spontaneous() @C() #define AVR_NONATOMIC_HANDLER(signame) \ void signame() @spontaneous() @C() /* Macro to create union casting functions. */ #define DEFINE_UNION_CAST(func_name, from_type, to_type) \ to_type func_name(from_type x_type) { \ union {from_type f_type; to_type t_type;} c_type = {f_type:x_type}; return c_type.t_type; } // Bit operators using bit number #define SET_BIT(port, bit) ((REG_ACCESS(port)) |= _BV(bit)) #define CLR_BIT(port, bit) ((REG_ACCESS(port)) &= ~_BV(bit)) #define READ_BIT(port, bit) (((REG_ACCESS(port)) & _BV(bit)) != 0) #define FLIP_BIT(port, bit) ((REG_ACCESS(port)) ^= _BV(bit)) #define WRITE_BIT(port, bit, value) \ if (value) SET_BIT((port), (bit)); \ else CLR_BIT((port), (bit)) // Bit operators using bit flag mask #define SET_FLAG(port, flag) ((REG_ACCESS(port)) |= (flag)) #define CLR_FLAG(port, flag) ((REG_ACCESS(port)) &= ~(flag)) #define READ_FLAG(port, flag) ((REG_ACCESS(port)) & (flag)) #define sei() (SET_BIT(SREG, 7)) #define cli() (CLR_BIT(SREG, 7)) /* Enables interrupts. */ inline void __nesc_enable_interrupt() { sei(); } /* Disables all interrupts. */ inline void __nesc_disable_interrupt() { cli(); } /* Defines data type for storing interrupt mask state during atomic. */ typedef uint8_t __nesc_atomic_t; /* Saves current interrupt mask state and disables interrupts. */ inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() { __nesc_atomic_t result = SREG; __nesc_disable_interrupt(); return result; } /* Restores interrupt mask to original state. */ inline void __nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous() { SREG = original_SREG; } inline void __nesc_atomic_sleep() { //sbi(MCUCR, SE); power manager will enable/disable sleep sei(); // Make sure interrupts are on, so we can wake up! asm volatile ("sleep"); } typedef uint8_t mcu_power_t @combine("mcombine"); /* Combine function. */ mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) { return (m1 < m2)? m1: m2; } enum { ATM128_POWER_IDLE = 0, ATM128_POWER_ADC_NR = 1, ATM128_POWER_EXT_STANDBY = 2, ATM128_POWER_SAVE = 3, ATM128_POWER_STANDBY = 4, ATM128_POWER_DOWN = 5, }; #endif //_H_atmega128hardware_H tinyos-2.1.2+dfsg/tos/chips/atm128/sim/crc.h000066400000000000000000000113071207233610700204220ustar00rootroot00000000000000// $Id: crc.h,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef CRC_H #define CRC_H uint16_t crcTable[256] = { 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint16_t crcByte(uint16_t oldCrc, uint8_t byte) { #if 0 uint16_t *table = crcTable; uint16_t newCrc; asm ("eor %1,%B3\n" "\tlsl %1\n" "\tadc %B2, __zero_reg__\n" "\tadd %A2, %1\n" "\tadc %B2, __zero_reg__\n" "\tlpm\n" "\tmov %B0, %A3\n" "\tmov %A0, r0\n" "\tadiw r30,1\n" "\tlpm\n" "\teor %B0, r0" : "=r" (newCrc), "+r" (byte), "+z" (table) : "r" (oldCrc)); return newCrc; #else uint8_t *magic = (uint8_t *)&crcTable[oldCrc >> 8 ^ byte]; return *magic | ((uint8_t)oldCrc ^ *(magic + 1)) << 8; #endif } #endif tinyos-2.1.2+dfsg/tos/chips/atm128/spi/000077500000000000000000000000001207233610700175035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/spi/Atm128Spi.h000066400000000000000000000056301207233610700213100ustar00rootroot00000000000000// $Id: Atm128Spi.h,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon #ifndef _H_Atm128SPI_h #define _H_Atm128SPI_h //====================== SPI Bus ================================== enum { ATM128_SPI_CLK_DIVIDE_4 = 0, ATM128_SPI_CLK_DIVIDE_16 = 1, ATM128_SPI_CLK_DIVIDE_64 = 2, ATM128_SPI_CLK_DIVIDE_128 = 3, }; /* SPI Control Register */ typedef struct { uint8_t spie : 1; //!< SPI Interrupt Enable uint8_t spe : 1; //!< SPI Enable uint8_t dord : 1; //!< SPI Data Order uint8_t mstr : 1; //!< SPI Master/Slave Select uint8_t cpol : 1; //!< SPI Clock Polarity uint8_t cpha : 1; //!< SPI Clock Phase uint8_t spr : 2; //!< SPI Clock Rate } Atm128SPIControl_s; typedef union { uint8_t flat; Atm128SPIControl_s bits; } Atm128SPIControl_t; typedef Atm128SPIControl_t Atm128_SPCR_t; //!< SPI Control Register /* SPI Status Register */ typedef struct { uint8_t spif : 1; //!< SPI Interrupt Flag uint8_t wcol : 1; //!< SPI Write COLision flag uint8_t rsvd : 5; //!< Reserved uint8_t spi2x : 1; //!< Whether we are in double speed } Atm128SPIStatus_s; typedef union { uint8_t flat; Atm128SPIStatus_s bits; } Atm128SPIStatus_t; typedef Atm128SPIStatus_t Atm128_SPSR_t; //!< SPI Status Register typedef uint8_t Atm128_SPDR_t; //!< SPI Data Register #endif //_H_Atm128SPI_h tinyos-2.1.2+dfsg/tos/chips/atm128/spi/Atm128Spi.nc000066400000000000000000000124351207233610700214620ustar00rootroot00000000000000/// $Id: Atm128Spi.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL-level access to the Atmega128 SPI bus. Refer to pages 162-9 * of the Atmega128 datasheet (rev. 2467M-AVR-11/04) for details. * * 
     *  $Id: Atm128Spi.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
 *
    * * @author Philip Levis * @author Martin Turon * @date September 8 2005 */ #include "Atm128Spi.h" interface Atm128Spi { /* Modal functions */ /** Initialize the ATmega128 SPI bus into master mode. */ async command void initMaster(); /** Initialize the ATmega128 SPI bus into slave mode. */ async command void initSlave(); /** Disable and sleep the ATmega128 SPI bus. */ async command void sleep(); /* SPDR: SPI Data Register */ /** * Read the SPI data register * @return last data byte */ async command uint8_t read(); /** * Write the SPI data register * @param data next data byte */ async command void write(uint8_t data); /** * Interrupt signalling SPI data cycle is complete. * @param data data byte from data register */ async event void dataReady(uint8_t data); /* SPCR: SPI Control Register */ /* SPIE bit */ async command void enableInterrupt(bool enabled); async command bool isInterruptEnabled(); /* SPI bit */ async command void enableSpi(bool busOn); async command bool isSpiEnabled(); /* DORD bit */ async command void setDataOrder(bool lsbFirst); async command bool isOrderLsbFirst(); /* MSTR bit */ async command void setMasterBit(bool isMaster); async command bool isMasterBitSet(); /* CPOL bit */ async command void setClockPolarity(bool highWhenIdle); async command bool getClockPolarity(); /* CPHA bit */ async command void setClockPhase(bool sampleOnTrailing); async command bool getClockPhase(); /* SPR1 and SPR0 bits */ async command void setClock(uint8_t speed); async command uint8_t getClock(); /* SPSR: SPI Status Register */ /* SPIF bit */ async command bool isInterruptPending(); /* WCOL bit */ async command bool hasWriteCollided(); /* SPI2X bit */ async command bool isMasterDoubleSpeed(); async command void setMasterDoubleSpeed(bool on); } tinyos-2.1.2+dfsg/tos/chips/atm128/spi/Atm128SpiC.nc000066400000000000000000000102241207233610700215570ustar00rootroot00000000000000/// $Id: Atm128SpiC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * The HAL of the SPI bus on the atm128. * * 
     *  $Id: Atm128SpiC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
 *
    * * * @author Philip Levis * @author Martin Turon * @author Joe Polastre * @date September 7 2005 */ configuration Atm128SpiC { provides interface Init; provides interface SpiByte; provides interface FastSpiByte; provides interface SpiPacket; provides interface Resource[uint8_t id]; } implementation { components Atm128SpiP as SpiMaster, HplAtm128SpiC as HplSpi; components new SimpleFcfsArbiterC("Atm128SpiC.Resource") as Arbiter; components McuSleepC; Init = SpiMaster; SpiByte = SpiMaster; FastSpiByte = SpiMaster; SpiPacket = SpiMaster; Resource = SpiMaster; SpiMaster.ResourceArbiter -> Arbiter; SpiMaster.ArbiterInfo -> Arbiter; SpiMaster.Spi -> HplSpi; SpiMaster.McuPowerState -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128/spi/Atm128SpiP.nc000066400000000000000000000311671207233610700216050ustar00rootroot00000000000000/// $Id: Atm128SpiP.nc,v 1.12 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /** * Primitives for accessing the SPI module on ATmega128 * microcontroller. This module assumes the bus has been reserved and * checks that the bus owner is in fact the person using the bus. * SpiPacket provides an asynchronous send interface where the * transmit data length is equal to the receive data length, while * SpiByte provides an interface for sending a single byte * synchronously. SpiByte allows a component to send a few bytes * in a simple fashion: if more than a handful need to be sent, * SpiPacket should be used. * * * 
     *  $Id: Atm128SpiP.nc,v 1.12 2010-06-29 22:07:43 scipio Exp $
 *
    * * @author Philip Levis * @author Joe Polastre * @author Martin Turon * */ module Atm128SpiP @safe() { provides { interface Init; interface SpiByte; interface FastSpiByte; interface SpiPacket; interface Resource[uint8_t id]; } uses { interface Atm128Spi as Spi; interface Resource as ResourceArbiter[uint8_t id]; interface ArbiterInfo; interface McuPowerState; } } implementation { uint16_t len; uint8_t* COUNT_NOK(len) txBuffer; uint8_t* COUNT_NOK(len) rxBuffer; uint16_t pos; enum { SPI_IDLE, SPI_BUSY, SPI_ATOMIC_SIZE = 10, }; command error_t Init.init() { return SUCCESS; } //default clockrate: 4000 kHz #ifndef SPI_CLOCKRATE #define SPI_CLOCKRATE 4000 #endif #if !defined(PLATFORM_MHZ) && defined(MHZ) enum { PLATFORM_MHZ = MHZ }; #endif void startSpi() { call Spi.enableSpi(FALSE); atomic { call Spi.initMaster(); call Spi.enableInterrupt(FALSE); call Spi.setClockPolarity(FALSE); call Spi.setClockPhase(FALSE); call Spi.enableSpi(TRUE); //calculating prescaler for desired spi clockrate with floor function to the nearest available clockrate #if (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=64 call Spi.setMasterDoubleSpeed(FALSE); call Spi.setClock(3); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=32 call Spi.setMasterDoubleSpeed(FALSE); call Spi.setClock(2); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=16 call Spi.setMasterDoubleSpeed(TRUE); call Spi.setClock(2); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=8 call Spi.setMasterDoubleSpeed(FALSE); call Spi.setClock(1); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=4 call Spi.setMasterDoubleSpeed(TRUE); call Spi.setClock(1); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=2 call Spi.setMasterDoubleSpeed(FALSE); call Spi.setClock(0); #else call Spi.setMasterDoubleSpeed(TRUE); call Spi.setClock(0); #endif } call McuPowerState.update(); } void stopSpi() { call Spi.enableSpi(FALSE); atomic { call Spi.sleep(); } call McuPowerState.update(); } async command uint8_t SpiByte.write( uint8_t tx ) { /* There is no need to enable the SPI bus and update the power state here since that must have been done when the resource was granted. However there seems to be a bug somewhere in the radio driver for the MicaZ platform so we cannot remove the following two lines before that problem is resolved. (Miklos Maroti) */ #ifdef PLATFORM_MICAZ call Spi.enableSpi(TRUE); call McuPowerState.update(); #endif call Spi.write( tx ); while( ! call Spi.isInterruptPending() ) ; return call Spi.read(); } inline async command void FastSpiByte.splitWrite(uint8_t data) { call Spi.write(data); } inline async command uint8_t FastSpiByte.splitRead() { while( ! call Spi.isInterruptPending() ) ; return call Spi.read(); } inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) { uint8_t b; while( ! call Spi.isInterruptPending() ) ; b = call Spi.read(); call Spi.write(data); return b; } inline async command uint8_t FastSpiByte.write(uint8_t data) { call Spi.write(data); while( ! call Spi.isInterruptPending() ) ; return call Spi.read(); } /** * This component sends SPI packets in chunks of size SPI_ATOMIC_SIZE * (which is normally 5). The tradeoff is between SPI performance * (throughput) and how much the component limits concurrency in the * rest of the system. Handling an interrupt on each byte is * very expensive: the context saving/register spilling constrains * the rate at which one can write out bytes. A more efficient * approach is to write out a byte and wait for a few cycles until * the byte is written (a tiny spin loop). This leads to greater * throughput, but blocks the system and prevents it from doing * useful work. * * This component takes a middle ground. When asked to transmit X * bytes in a packet, it transmits those X bytes in 10-byte parts. * sendNextPart() is responsible for sending one such * part. It transmits bytes with the SpiByte interface, which * disables interrupts and spins on the SPI control register for * completion. On the last byte, however, sendNextPart * re-enables SPI interrupts and sends the byte through the * underlying split-phase SPI interface. When this component handles * the SPI transmit completion event (handles the SPI interrupt), * it calls sendNextPart() again. As the SPI interrupt does * not disable interrupts, this allows processing in the rest of the * system to continue. */ error_t sendNextPart() { uint16_t end; uint16_t tmpPos; uint16_t myLen; uint8_t* COUNT_NOK(myLen) tx; uint8_t* COUNT_NOK(myLen) rx; atomic { myLen = len; tx = txBuffer; rx = rxBuffer; tmpPos = pos; end = pos + SPI_ATOMIC_SIZE; end = (end > len)? len:end; } for (;tmpPos < (end - 1) ; tmpPos++) { uint8_t val; if (tx != NULL) val = call SpiByte.write( tx[tmpPos] ); else val = call SpiByte.write( 0 ); if (rx != NULL) { rx[tmpPos] = val; } } // For the last byte, we re-enable interrupts. call Spi.enableInterrupt(TRUE); atomic { if (tx != NULL) call Spi.write(tx[tmpPos]); else call Spi.write(0); pos = tmpPos; // The final increment will be in the interrupt // handler. } return SUCCESS; } task void zeroTask() { uint16_t myLen; uint8_t* COUNT_NOK(myLen) rx; uint8_t* COUNT_NOK(myLen) tx; atomic { myLen = len; rx = rxBuffer; tx = txBuffer; rxBuffer = NULL; txBuffer = NULL; len = 0; pos = 0; signal SpiPacket.sendDone(tx, rx, myLen, SUCCESS); } } /** * Send bufLen bytes in writeBuf and receive bufLen bytes * into readBuf. If readBuf is NULL, bytes will be * read out of the SPI, but they will be discarded. A byte is read * from the SPI before writing and discarded (to clear any buffered * bytes that might have been left around). * * This command only sets up the state variables and clears the SPI: * sendNextPart() does the real work. * * If there's a send of zero bytes, short-circuit and just post * a task to signal the sendDone. This generally occurs due to an * error in the caler, but signaling an event will hopefully let * it recover better than returning FAIL. */ async command error_t SpiPacket.send(uint8_t* writeBuf, uint8_t* readBuf, uint16_t bufLen) { uint8_t discard; atomic { len = bufLen; txBuffer = writeBuf; rxBuffer = readBuf; pos = 0; } if (bufLen > 0) { discard = call Spi.read(); return sendNextPart(); } else { post zeroTask(); return SUCCESS; } } default async event void SpiPacket.sendDone (uint8_t* _txbuffer, uint8_t* _rxbuffer, uint16_t _length, error_t _success) { } async event void Spi.dataReady(uint8_t data) { bool again; atomic { if (rxBuffer != NULL) { rxBuffer[pos] = data; // Increment position } pos++; } call Spi.enableInterrupt(FALSE); atomic { again = (pos < len); } if (again) { sendNextPart(); } else { uint8_t discard; uint16_t myLen; uint8_t* COUNT_NOK(myLen) rx; uint8_t* COUNT_NOK(myLen) tx; atomic { myLen = len; rx = rxBuffer; tx = txBuffer; rxBuffer = NULL; txBuffer = NULL; len = 0; pos = 0; } discard = call Spi.read(); signal SpiPacket.sendDone(tx, rx, myLen, SUCCESS); } } async command error_t Resource.immediateRequest[ uint8_t id ]() { error_t result = call ResourceArbiter.immediateRequest[ id ](); if ( result == SUCCESS ) { startSpi(); } return result; } async command error_t Resource.request[ uint8_t id ]() { atomic { if (!call ArbiterInfo.inUse()) { startSpi(); } } return call ResourceArbiter.request[ id ](); } async command error_t Resource.release[ uint8_t id ]() { error_t error = call ResourceArbiter.release[ id ](); atomic { if (!call ArbiterInfo.inUse()) { stopSpi(); } } return error; } async command bool Resource.isOwner[uint8_t id]() { return call ResourceArbiter.isOwner[id](); } event void ResourceArbiter.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } default event void Resource.granted[ uint8_t id ]() {} } tinyos-2.1.2+dfsg/tos/chips/atm128/spi/HplAtm128SpiC.nc000066400000000000000000000075051207233610700222330ustar00rootroot00000000000000/// $Id: HplAtm128SpiC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Configuration encapsulating the basic SPI HPL for the atm128. * * 
     * $Id: HplAtm128SpiC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
 *
    * * @author Philip Levis * @author Martin Turon */ configuration HplAtm128SpiC { provides interface Atm128Spi as SpiBus; } implementation { components HplAtm128GeneralIOC as IO, HplAtm128SpiP as HplSpi; components McuSleepC; SpiBus = HplSpi; HplSpi.Mcu -> McuSleepC; HplSpi.SS -> IO.PortB0; // Slave set line HplSpi.SCK -> IO.PortB1; // SPI clock line HplSpi.MOSI -> IO.PortB2; // Master out, slave in HplSpi.MISO -> IO.PortB3; // Master in, slave out } tinyos-2.1.2+dfsg/tos/chips/atm128/spi/HplAtm128SpiP.nc000066400000000000000000000157331207233610700222520ustar00rootroot00000000000000/// $Id: HplAtm128SpiP.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the SPI bus abstraction for the atm128 * microcontroller. * * @author Philip Levis * @author Martin Turon */ #include "Atm128Spi.h" module HplAtm128SpiP @safe() { provides interface Atm128Spi as SPI; provides interface AsyncStdControl; uses { interface GeneralIO as SS; // Slave set line interface GeneralIO as SCK; // SPI clock line interface GeneralIO as MOSI; // Master out, slave in interface GeneralIO as MISO; // Master in, slave out interface McuPowerState as Mcu; } } implementation { async command error_t AsyncStdControl.start() { call SPI.enableSpi(TRUE); } async command error_t AsyncStdControl.stop() { call SPI.enableInterrupt(FALSE); call SPI.enableSpi(FALSE); } async command void SPI.initMaster() { call MOSI.makeOutput(); call MISO.makeInput(); call SCK.makeOutput(); call SS.makeOutput(); // otherwise the SPI can go slave mode call SPI.setMasterBit(TRUE); } async command void SPI.initSlave() { call MISO.makeOutput(); call MOSI.makeInput(); call SCK.makeInput(); call SS.makeInput(); call SPI.setMasterBit(FALSE); } async command void SPI.sleep() { } async command uint8_t SPI.read() { return SPDR; } async command void SPI.write(uint8_t d) { SPDR = d; } default async event void SPI.dataReady(uint8_t d) {} AVR_ATOMIC_HANDLER(SIG_SPI) { signal SPI.dataReady(call SPI.read()); } //=== SPI Bus utility routines. ==================================== async command bool SPI.isInterruptPending() { return READ_BIT(SPSR, SPIF); } async command bool SPI.isInterruptEnabled () { return READ_BIT(SPCR, SPIE); } async command void SPI.enableInterrupt(bool enabled) { if (enabled) { SET_BIT(SPCR, SPIE); call Mcu.update(); } else { CLR_BIT(SPCR, SPIE); call Mcu.update(); } } async command bool SPI.isSpiEnabled() { return READ_BIT(SPCR, SPE); } async command void SPI.enableSpi(bool enabled) { if (enabled) { SET_BIT(SPCR, SPE); call Mcu.update(); } else { CLR_BIT(SPCR, SPE); call Mcu.update(); } } /* DORD bit */ async command void SPI.setDataOrder(bool lsbFirst) { if (lsbFirst) { SET_BIT(SPCR, DORD); } else { CLR_BIT(SPCR, DORD); } } async command bool SPI.isOrderLsbFirst() { return READ_BIT(SPCR, DORD); } /* MSTR bit */ async command void SPI.setMasterBit(bool isMaster) { if (isMaster) { SET_BIT(SPCR, MSTR); } else { CLR_BIT(SPCR, MSTR); } } async command bool SPI.isMasterBitSet() { return READ_BIT(SPCR, MSTR); } /* CPOL bit */ async command void SPI.setClockPolarity(bool highWhenIdle) { if (highWhenIdle) { SET_BIT(SPCR, CPOL); } else { CLR_BIT(SPCR, CPOL); } } async command bool SPI.getClockPolarity() { return READ_BIT(SPCR, CPOL); } /* CPHA bit */ async command void SPI.setClockPhase(bool sampleOnTrailing) { if (sampleOnTrailing) { SET_BIT(SPCR, CPHA); } else { CLR_BIT(SPCR, CPHA); } } async command bool SPI.getClockPhase() { return READ_BIT(SPCR, CPHA); } async command uint8_t SPI.getClock () { return READ_FLAG(SPCR, ((1 << SPR1) | (1 << SPR0))); } async command void SPI.setClock (uint8_t v) { v &= (1 << SPR1) | (1 << SPR0); SPCR = (SPCR & ~((1 << SPR1) | (1 << SPR0))) | v; } async command bool SPI.hasWriteCollided() { return READ_BIT(SPSR, WCOL); } async command bool SPI.isMasterDoubleSpeed() { return READ_BIT(SPSR, SPI2X); } async command void SPI.setMasterDoubleSpeed(bool on) { if (on) { SET_BIT(SPSR, SPI2X); } else { CLR_BIT(SPSR, SPI2X); } } } tinyos-2.1.2+dfsg/tos/chips/atm128/spi/sim/000077500000000000000000000000001207233610700202735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/spi/sim/Atm128SpiC.nc000066400000000000000000000044431207233610700223550ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The simulated HAL of the SPI bus on the atm128, which just maps to * the platform-specific implementation of the device end point. * * 
     *  $Id: Atm128SpiC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
 *
    * * * @author Philip Levis * @date November 22 2005 */ configuration Atm128SpiC { provides interface Init; provides interface SPIByte; provides interface SPIPacket; provides interface Resource[uint8_t id]; } implementation { components SimAtm128SpiDeviceC as Device; components new SimpleFcfsArbiterC("Atm128SpiC.Resource") as Arbiter; components McuSleepC; Init = Device; SPIByte = Device; SPIPacket = Device; Resource = Arbiter; Device.McuPowerState -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/000077500000000000000000000000001207233610700200305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc000066400000000000000000000027611207233610700234120ustar00rootroot00000000000000// $Id: Atm128AlarmAsyncC.nc,v 1.3 2007-05-23 22:49:08 idgay Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Build a 32-bit alarm and counter from the atmega128's 8-bit timer 0 * in asynchronous mode. Attempting to use the generic Atm128AlarmC * component and the generic timer components runs into problems * apparently related to letting timer 0 overflow. * * So, instead, this version (inspired by the 1.x code and a remark from * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 0 * and never lets timer 0 overflow. * * @author David Gay */ generic configuration Atm128AlarmAsyncC(typedef precision, int divider) { provides { interface Init @atleastonce(); interface Alarm; interface Counter; } } implementation { components new Atm128AlarmAsyncP(precision, divider), HplAtm128Timer0AsyncC; Init = Atm128AlarmAsyncP; Alarm = Atm128AlarmAsyncP; Counter = Atm128AlarmAsyncP; Atm128AlarmAsyncP.Timer -> HplAtm128Timer0AsyncC; Atm128AlarmAsyncP.TimerCtrl -> HplAtm128Timer0AsyncC; Atm128AlarmAsyncP.Compare -> HplAtm128Timer0AsyncC; Atm128AlarmAsyncP.TimerAsync -> HplAtm128Timer0AsyncC; } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128AlarmAsyncP.nc000066400000000000000000000145071207233610700234300ustar00rootroot00000000000000// $Id: Atm128AlarmAsyncP.nc,v 1.8 2008-06-26 03:38:27 regehr Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Build a 32-bit alarm and counter from the atmega128's 8-bit timer 0 * in asynchronous mode. Attempting to use the generic Atm128AlarmC * component and the generic timer components runs into problems * apparently related to letting timer 0 overflow. * * So, instead, this version (inspired by the 1.x code and a remark from * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 0 * and never lets timer 0 overflow. * * @author David Gay */ generic module Atm128AlarmAsyncP(typedef precision, int divider) @safe() { provides { interface Init; interface Alarm; interface Counter; } uses { interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { uint8_t set; /* Is the alarm set? */ uint32_t t0, dt; /* Time of the next alarm */ norace uint32_t base; /* base+TCNT0 is the current time if no interrupt is pending. See Counter.get() for the full details. */ enum { MINDT = 2, /* Minimum interval between interrupts */ MAXT = 230 /* Maximum value to let timer 0 reach (from Joe Polastre and Robert Szewczyk's painful experiences with the 1.x timer ;-)) */ }; void setInterrupt(); /* Configure timer 0 */ command error_t Init.init() { atomic { Atm128TimerControl_t x; call TimerAsync.setTimer0Asynchronous(); x.flat = 0; x.bits.cs = divider; x.bits.wgm1 = 1; /* We use the clear-on-compare mode */ call TimerCtrl.setControl(x); call Compare.set(MAXT); /* setInterrupt needs a valid value here */ call Compare.start(); } setInterrupt(); return SUCCESS; } /* Set compare register for timer 0 to n. But increment n by 1 if TCNT0 reaches this value before we can set the compare register. */ void setOcr0(uint8_t n) { while (call TimerAsync.compareBusy()) ; if (n == call Timer.get()) n++; /* Support for overflow. Force interrupt at wrap around value. This does not cause a backwards-in-time value as we do this every time we set OCR0. */ if (base + n + 1 < base) n = -base - 1; call Compare.set(n); } /* Update the compare register to trigger an interrupt at the appropriate time based on the current alarm settings */ void setInterrupt() { bool fired = FALSE; atomic { /* interrupt_in is the time to the next interrupt. Note that compare register values are off by 1 (i.e., if you set OCR0 to 3, the interrupt will happen whjen TCNT0 is 4) */ uint8_t interrupt_in = 1 + call Compare.get() - call Timer.get(); uint8_t newOcr0; uint8_t tifr = (uint8_t)((call TimerCtrl.getInterruptFlag()).flat); dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: TIFR is %hhx\n", tifr); if ((interrupt_in != 0 && interrupt_in < MINDT) || (tifr & (1 << OCF0))) { if (interrupt_in < MINDT) { dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: under min: %hhu.\n", interrupt_in); } else { dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: OCF set.\n"); } return; // wait for next interrupt } /* When no alarm is set, we just ask for an interrupt every MAXT */ if (!set) { newOcr0 = MAXT; dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: no alarm set, set at max.\n"); } else { uint32_t now = call Counter.get(); dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: now-t0 = %llu, dt = %llu\n", (now-t0), dt); /* Check if alarm expired */ if ((uint32_t)(now - t0) >= dt) { set = FALSE; fired = TRUE; newOcr0 = MAXT; } else { /* No. Set compare register to time of next alarm if it's within the next MAXT units */ uint32_t alarm_in = (t0 + dt) - base; if (alarm_in > MAXT) newOcr0 = MAXT; else if ((uint8_t)alarm_in < MINDT) // alarm_in < MAXT ... newOcr0 = MINDT; else newOcr0 = alarm_in; } } newOcr0--; // interrupt is 1ms late setOcr0(newOcr0); } if (fired) signal Alarm.fired(); } async event void Compare.fired() { int overflowed; /* Compare register fired. Update time knowledge */ base += call Compare.get() + 1U; // interrupt is 1ms late overflowed = !base; __nesc_enable_interrupt(); setInterrupt(); if (overflowed) signal Counter.overflow(); } async command uint32_t Counter.get() { uint32_t now; atomic { /* Current time is base+TCNT0 if no interrupt is pending. But if an interrupt is pending, then it's base + compare value + 1 + TCNT0 */ uint8_t now8 = call Timer.get(); if ((call TimerCtrl.getInterruptFlag()).bits.ocf0) /* We need to reread TCNT0 as it might've overflowed after we read TCNT0 the first time */ now = base + call Compare.get() + 1 + call Timer.get(); else /* We need to use the value of TCNT0 from before we check the interrupt flag, as it might wrap around after the check */ now = base + now8; } return now; } async command bool Counter.isOverflowPending() { atomic return (call TimerCtrl.getInterruptFlag()).bits.ocf0 && !(base + call Compare.get() + 1); } async command void Counter.clearOverflow() { atomic if (call Counter.isOverflowPending()) { base = 0; call Compare.reset(); } else return; setInterrupt(); } async command void Alarm.start(uint32_t ndt) { call Alarm.startAt(call Counter.get(), ndt); } async command void Alarm.stop() { atomic set = FALSE; } async command bool Alarm.isRunning() { atomic return set; } async command void Alarm.startAt(uint32_t nt0, uint32_t ndt) { atomic { set = TRUE; t0 = nt0; dt = ndt; } setInterrupt(); } async command uint32_t Alarm.getNow() { return call Counter.get(); } async command uint32_t Alarm.getAlarm() { atomic return t0 + dt; } async event void Timer.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128AlarmC.nc000066400000000000000000000110711207233610700224060ustar00rootroot00000000000000/// $Id: Atm128AlarmC.nc,v 1.9 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Build a TEP102 Alarm from an Atmega128 hardware timer and one of its * compare registers. * @param frequency_tag The frequency tag for this Alarm * @param timer_size The width of this Alarm * @param mindt The shortest time in the future this Alarm can be set * (in its own time units). Has to be at least 2, as setting a compare * register one above the current counter value is unreliable. Has to be * large enough that the Alarm time does not pass between the computation * of expires and actually setting the compare register. * Check this (for high-frequency timers) by inspecting the generated * assembly code... * * @author Martin Turon * @author David Gay */ generic module Atm128AlarmC(typedef frequency_tag, typedef timer_size @integer(), int mindt) @safe() { provides interface Alarm as Alarm @atmostonce(); uses interface HplAtm128Timer; uses interface HplAtm128Compare; } implementation { async command timer_size Alarm.getNow() { return call HplAtm128Timer.get(); } async command timer_size Alarm.getAlarm() { return call HplAtm128Compare.get(); } async command bool Alarm.isRunning() { return call HplAtm128Compare.isOn(); } async command void Alarm.stop() { call HplAtm128Compare.stop(); } async command void Alarm.start( timer_size dt ) { call Alarm.startAt( call HplAtm128Timer.get(), dt); } async command void Alarm.startAt( timer_size t0, timer_size dt ) { /* We don't set an interrupt before "now" + mindt to avoid setting an interrupt which is in the past by the time we actually set it. mindt should always be at least 2, because you cannot reliably set an interrupt one cycle in the future. mindt should also be large enough to cover the execution time of this function. */ atomic { timer_size now, elapsed, expires; dbg("Atm128AlarmC", " starting timer at %llu with dt %llu\n", (uint64_t)t0, (uint64_t) dt); now = call HplAtm128Timer.get(); elapsed = now + mindt - t0; if (elapsed >= dt) expires = now + mindt; else expires = t0 + dt; /* Setting the compare register to "-1" is a bad idea (interrupt fires before counter overflow is detected, and all the "current time" stuff goes bad) */ if (expires == 0) expires = 1; /* Note: all HplAtm128Compare.set values have one subtracted, because the comparisons are continuous, but the actual interrupt is signalled at the next timer clock cycle. */ call HplAtm128Compare.set(expires - 1); call HplAtm128Compare.reset(); call HplAtm128Compare.start(); } } async event void HplAtm128Compare.fired() { call HplAtm128Compare.stop(); dbg("Atm128AlarmC", " Compare fired, signal alarm above.\n"); __nesc_enable_interrupt(); signal Alarm.fired(); } async event void HplAtm128Timer.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128Calibrate.nc000066400000000000000000000041021207233610700231320ustar00rootroot00000000000000// $Id: Atm128Calibrate.nc,v 1.4 2006-12-12 18:23:04 vlahan Exp $ /* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * This interface provides functions to compute ATmega128 configuration * values that are clock-rate dependent. These include:
      *
    • the ADC prescaler value necessary for full precision *
    • values for the UBRR registers to achieve a specific baud rate *
    • any adjustment necessary to values passed to some platform-provided * AlarmMicroXXC components to get more accurate timing *
    • the number of cycles per 1/32768s (a typical implementation of this * interface will measure this value at boot time and use it to compute * the values above) *
    * * @author David Gay */ interface Atm128Calibrate { /** * Return CPU cycles per 1/32768s. * @return CPU cycles. */ async command uint16_t cyclesPerJiffy(); /** * Convert n microseconds into a value suitable for use with * AlarmMicro32C Alarms. * @param n Time in microseconds. * @return AlarmMicro argument that best approximates n microseconds. */ async command uint32_t calibrateMicro(uint32_t n); /** * Convert values used by AlarmMicro32C Alarms into actual microseconds. * @param n A time expressed in AlarmMicro time units. * @return Time in microseconds that corresponds to AlarmMicro argument n. */ async command uint32_t actualMicro(uint32_t n); /** * Return the smallest ADC prescaler value which guaranteers full * ADC precision. * @return ADC prescaler value. */ async command uint8_t adcPrescaler(); /** * Return the value to use for the baudrate register to achieve a * particular baud rate. Assumes U2X=1 (the USART is being run at * double speed). */ async command uint16_t baudrateRegister(uint32_t baudrate); } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128CaptureC.nc000066400000000000000000000075401207233610700227630ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * $Id: Atm128CaptureC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ */ /** * Exposes Capture capability of hardware as general interface, * with some ATmega128 specific dependencies including: * Only available with the two 16-bit timers. * Each Timer has only one dedicated capture pin. * Timer1 == PortD.Pin4 [D4] * Timer3 == PortE.Pin7 [E7] * So selection of 16-bit timer gives implicit wiring of actual Pin to capture. * * @author Alan Broad, Crossbow * @author Matt Miller, Crossbow * @author Martin Turon, Crossbow */ generic module Atm128CaptureC () { provides { interface Capture as CapturePin; } uses { interface HplAtm128Capture; // interface HplAtm128Timer as Timer; // interface GeneralIO as PinToCapture; // implicit to timer used } } implementation { // ************* CapturePin Interrupt handlers and dispatch ************* /** * CapturePin.enableCapture * * Configure Atmega128 TIMER to capture edge input of CapturePin signal. * This will cause an interrupt and save TIMER count. * TIMER Timebase is set by stdControl.start * -- see HplAtm128Capture interface and HplAtm128TimerM implementation */ async command error_t CapturePin.enableCapture(bool low_to_high) { atomic { call HplAtm128Capture.stop(); // clear any capture interrupt call HplAtm128Capture.setEdge(low_to_high); call HplAtm128Capture.reset(); call HplAtm128Capture.start(); } return SUCCESS; } async command error_t CapturePin.disable() { call HplAtm128Capture.stop(); return SUCCESS; } /** * Handle signal from HplAtm128Capture interface indicating an external * event has been timestamped. * Signal client with time and disable capture timer if nolonger needed. */ async event void HplAtm128Capture.captured(uint16_t time) { // first, signal client error_t val = signal CapturePin.captured(time); if (val == FAIL) { // if client returns failure, stop time capture call HplAtm128Capture.stop(); } else { // otherwise, time capture keeps running, reset if needed if (call HplAtm128Capture.test()) call HplAtm128Capture.reset(); } } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128CounterC.nc000066400000000000000000000046201207233610700227730ustar00rootroot00000000000000//$Id: Atm128CounterC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Build a TEP102 Counter from an Atmega128 hardware timer. * @param frequency_tag The frequency tag for this Counter * @param timer_size The width of this Counter * * @author Martin Turon */ generic module Atm128CounterC(typedef frequency_tag, typedef timer_size @integer()) @safe() { provides interface Counter as Counter; uses interface HplAtm128Timer as Timer; } implementation { async command timer_size Counter.get() { return call Timer.get(); } async command bool Counter.isOverflowPending() { return call Timer.test(); } async command void Counter.clearOverflow() { call Timer.reset(); } async event void Timer.overflow() { signal Counter.overflow(); } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128GpioCaptureC.nc000066400000000000000000000052211207233610700235740ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * $Id: Atm128GpioCaptureC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ */ /** * Expose capture capability as a GpioCapture interface from TEP117. * * @author Martin Turon, Crossbow */ generic module Atm128GpioCaptureC() @safe() { provides interface GpioCapture as Capture; uses interface HplAtm128Capture as Atm128Capture; } implementation { error_t enableCapture( uint8_t mode ) { atomic { call Atm128Capture.stop(); call Atm128Capture.reset(); call Atm128Capture.setEdge( mode ); call Atm128Capture.start(); } return SUCCESS; } async command error_t Capture.captureRisingEdge() { return enableCapture( TRUE ); } async command error_t Capture.captureFallingEdge() { return enableCapture( FALSE ); } async command void Capture.disable() { call Atm128Capture.stop(); } async event void Atm128Capture.captured( uint16_t time ) { // The flag is automatically cleared, clearing it again can cause missed interrupts // call Atm128Capture.reset(); signal Capture.captured( time ); } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128Timer.h000066400000000000000000000264261207233610700221700ustar00rootroot00000000000000// $Id: Atm128Timer.h,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * This file contains the configuration constants for the Atmega128 * clocks and timers. * * @author Philip Levis * @author Martin Turon * @date September 21 2005 */ #ifndef _H_Atm128Timer_h #define _H_Atm128Timer_h //====================== 8 bit Timers ================================== // Timer0 and Timer2 are 8-bit timers. /* 8-bit Timer0 clock source select bits CS02, CS01, CS0 (page 103, ATmega128L data sheet Rev. 2467M-AVR-11/04 */ enum { ATM128_CLK8_OFF = 0x0, ATM128_CLK8_NORMAL = 0x1, ATM128_CLK8_DIVIDE_8 = 0x2, ATM128_CLK8_DIVIDE_32 = 0x3, ATM128_CLK8_DIVIDE_64 = 0x4, ATM128_CLK8_DIVIDE_128 = 0x5, ATM128_CLK8_DIVIDE_256 = 0x6, ATM128_CLK8_DIVIDE_1024 = 0x7, }; enum { ATM128_CLK16_OFF = 0x0, ATM128_CLK16_NORMAL = 0x1, ATM128_CLK16_DIVIDE_8 = 0x2, ATM128_CLK16_DIVIDE_64 = 0x3, ATM128_CLK16_DIVIDE_256 = 0x4, ATM128_CLK16_DIVIDE_1024 = 0x5, ATM128_CLK16_EXTERNAL_FALL = 0x6, ATM128_CLK16_EXTERNAL_RISE = 0x7, }; /* Common scales across both 8-bit and 16-bit clocks. */ enum { AVR_CLOCK_OFF = 0, AVR_CLOCK_ON = 1, AVR_CLOCK_DIVIDE_8 = 2, }; /* 8-bit Waveform Generation Modes */ enum { ATM128_WAVE8_NORMAL = 0, ATM128_WAVE8_PWM, ATM128_WAVE8_CTC, ATM128_WAVE8_PWM_FAST, }; /* 8-bit Timer compare settings */ enum { ATM128_COMPARE_OFF = 0, //!< compare disconnected ATM128_COMPARE_TOGGLE, //!< toggle on match (PWM reserved ATM128_COMPARE_CLEAR, //!< clear on match (PWM downcount) ATM128_COMPARE_SET, //!< set on match (PWN upcount) }; /* 8-bit Timer Control Register */ typedef union { uint8_t flat; struct { uint8_t cs : 3; //!< Clock Source Select uint8_t wgm1 : 1; //!< Waveform generation mode (high bit) uint8_t com : 2; //!< Compare Match Output uint8_t wgm0 : 1; //!< Waveform generation mode (low bit) uint8_t foc : 1; //!< Force Output Compare } bits; } Atm128TimerControl_t; typedef Atm128TimerControl_t Atm128_TCCR0_t; //!< Timer0 Control Register typedef uint8_t Atm128_TCNT0_t; //!< Timer0 Control Register typedef uint8_t Atm128_OCR0_t; //!< Timer0 Output Compare Register typedef Atm128TimerControl_t Atm128_TCCR2_t; //!< Timer2 Control Register typedef uint8_t Atm128_TCNT2_t; //!< Timer2 Control Register typedef uint8_t Atm128_OCR2_t; //!< Timer2 Output Compare Register // Timer2 shares compare lines with Timer1C /* Asynchronous Status Register -- Timer0 */ typedef union { uint8_t flat; struct { uint8_t tcr0ub : 1; //!< Timer0 Control Resgister Update Busy uint8_t ocr0ub : 1; //!< Timer0 Output Compare Register Update Busy uint8_t tcn0ub : 1; //!< Timer0 Update Busy uint8_t as0 : 1; //!< Asynchronous Timer/Counter (off=CPU,on=32KHz osc) uint8_t rsvd : 4; //!< Reserved } bits; } Atm128Assr_t; /* Timer/Counter Interrupt Mask Register */ typedef union { uint8_t flat; struct { uint8_t toie0 : 1; //!< Timer0 Overflow Interrupt Enable uint8_t ocie0 : 1; //!< Timer0 Output Compare Interrupt Enable uint8_t toie1 : 1; //!< Timer1 Overflow Interrupt Enable uint8_t ocie1b: 1; //!< Timer1 Output Compare B Interrupt Enable uint8_t ocie1a: 1; //!< Timer1 Output Compare A Interrupt Enable uint8_t ticie1: 1; //!< Timer1 Input Capture Enable uint8_t toie2 : 1; //!< Timer2 Overflow Interrupt Enable uint8_t ocie2 : 1; //!< Timer2 Output Compare Interrupt Enable } bits; } Atm128_TIMSK_t; // + Note: Contains some 16-bit Timer flags /* Timer/Counter Interrupt Flag Register */ typedef union { uint8_t flat; struct { uint8_t tov0 : 1; //!< Timer0 Overflow Flag uint8_t ocf0 : 1; //!< Timer0 Output Compare Flag uint8_t tov1 : 1; //!< Timer1 Overflow Flag uint8_t ocf1b : 1; //!< Timer1 Output Compare B Flag uint8_t ocf1a : 1; //!< Timer1 Output Compare A Flag uint8_t icf1 : 1; //!< Timer1 Input Capture Flag uint8_t tov2 : 1; //!< Timer2 Overflow Flag uint8_t ocf2 : 1; //!< Timer2 Output Compare Flag } bits; } Atm128_TIFR_t; // + Note: Contains some 16-bit Timer flags /* Timer/Counter Interrupt Flag Register */ typedef union { uint8_t flat; struct { uint8_t psr321 : 1; //!< Prescaler Reset Timer1,2,3 uint8_t psr0 : 1; //!< Prescaler Reset Timer0 uint8_t pud : 1; //!< uint8_t acme : 1; //!< uint8_t rsvd : 3; //!< Reserved uint8_t tsm : 1; //!< Timer/Counter Synchronization Mode } bits; } Atm128_SFIOR_t; //====================== 16 bit Timers ================================== // Timer1 and Timer3 are both 16-bit, and have three compare channels: (A,B,C) enum { ATM128_TIMER_COMPARE_NORMAL = 0, ATM128_TIMER_COMPARE_TOGGLE, ATM128_TIMER_COMPARE_CLEAR, ATM128_TIMER_COMPARE_SET }; /* Timer/Counter Control Register A Type */ typedef union { uint8_t flat; struct { uint8_t wgm10 : 2; //!< Waveform generation mode uint8_t comC : 2; //!< Compare Match Output C uint8_t comB : 2; //!< Compare Match Output B uint8_t comA : 2; //!< Compare Match Output A } bits; } Atm128TimerCtrlCompare_t; /* Timer1 Compare Control Register A */ typedef Atm128TimerCtrlCompare_t Atm128_TCCR1A_t; /* Timer3 Compare Control Register A */ typedef Atm128TimerCtrlCompare_t Atm128_TCCR3A_t; /* 16-bit Waveform Generation Modes */ enum { ATM128_WAVE16_NORMAL = 0, ATM128_WAVE16_PWM_8BIT, ATM128_WAVE16_PWM_9BIT, ATM128_WAVE16_PWM_10BIT, ATM128_WAVE16_CTC_COMPARE, ATM128_WAVE16_PWM_FAST_8BIT, ATM128_WAVE16_PWM_FAST_9BIT, ATM128_WAVE16_PWM_FAST_10BIT, ATM128_WAVE16_PWM_CAPTURE_LOW, ATM128_WAVE16_PWM_COMPARE_LOW, ATM128_WAVE16_PWM_CAPTURE_HIGH, ATM128_WAVE16_PWM_COMPARE_HIGH, ATM128_WAVE16_CTC_CAPTURE, ATM128_WAVE16_RESERVED, ATM128_WAVE16_PWM_FAST_CAPTURE, ATM128_WAVE16_PWM_FAST_COMPARE, }; /* Timer/Counter Control Register B Type */ typedef union { uint8_t flat; struct { uint8_t cs : 3; //!< Clock Source Select uint8_t wgm32 : 2; //!< Waveform generation mode uint8_t rsvd : 1; //!< Reserved uint8_t ices1 : 1; //!< Input Capture Edge Select (1=rising, 0=falling) uint8_t icnc1 : 1; //!< Input Capture Noise Canceler } bits; } Atm128TimerCtrlCapture_t; /* Timer1 Control Register B */ typedef Atm128TimerCtrlCapture_t Atm128_TCCR1B_t; /* Timer3 Control Register B */ typedef Atm128TimerCtrlCapture_t Atm128_TCCR3B_t; /* Timer/Counter Control Register C Type */ typedef union { uint8_t flat; struct { uint8_t rsvd : 5; //!< Reserved uint8_t focC : 1; //!< Force Output Compare Channel C uint8_t focB : 1; //!< Force Output Compare Channel B uint8_t focA : 1; //!< Force Output Compare Channel A } bits; } Atm128TimerCtrlClock_t; /* Timer1 Control Register B */ typedef Atm128TimerCtrlClock_t Atm128_TCCR1C_t; /* Timer3 Control Register B */ typedef Atm128TimerCtrlClock_t Atm128_TCCR3C_t; // Read/Write these 16-bit Timer registers according to p.112: // Access as bytes. Read low before high. Write high before low. typedef uint8_t Atm128_TCNT1H_t; //!< Timer1 Register typedef uint8_t Atm128_TCNT1L_t; //!< Timer1 Register typedef uint8_t Atm128_TCNT3H_t; //!< Timer3 Register typedef uint8_t Atm128_TCNT3L_t; //!< Timer3 Register /* Contains value to continuously compare with Timer1 */ typedef uint8_t Atm128_OCR1AH_t; //!< Output Compare Register 1A typedef uint8_t Atm128_OCR1AL_t; //!< Output Compare Register 1A typedef uint8_t Atm128_OCR1BH_t; //!< Output Compare Register 1B typedef uint8_t Atm128_OCR1BL_t; //!< Output Compare Register 1B typedef uint8_t Atm128_OCR1CH_t; //!< Output Compare Register 1C typedef uint8_t Atm128_OCR1CL_t; //!< Output Compare Register 1C /* Contains value to continuously compare with Timer3 */ typedef uint8_t Atm128_OCR3AH_t; //!< Output Compare Register 3A typedef uint8_t Atm128_OCR3AL_t; //!< Output Compare Register 3A typedef uint8_t Atm128_OCR3BH_t; //!< Output Compare Register 3B typedef uint8_t Atm128_OCR3BL_t; //!< Output Compare Register 3B typedef uint8_t Atm128_OCR3CH_t; //!< Output Compare Register 3C typedef uint8_t Atm128_OCR3CL_t; //!< Output Compare Register 3C /* Contains counter value when event occurs on ICPn pin. */ typedef uint8_t Atm128_ICR1H_t; //!< Input Capture Register 1 typedef uint8_t Atm128_ICR1L_t; //!< Input Capture Register 1 typedef uint8_t Atm128_ICR3H_t; //!< Input Capture Register 3 typedef uint8_t Atm128_ICR3L_t; //!< Input Capture Register 3 /* Extended Timer/Counter Interrupt Mask Register */ typedef union { uint8_t flat; struct { uint8_t ocie1c: 1; //!< Timer1 Output Compare C Interrupt Enable uint8_t ocie3c: 1; //!< Timer3 Output Compare C Interrupt Enable uint8_t toie3 : 1; //!< Timer3 Overflow Interrupt Enable uint8_t ocie3b: 1; //!< Timer3 Output Compare B Interrupt Enable uint8_t ocie3a: 1; //!< Timer3 Output Compare A Interrupt Enable uint8_t ticie3: 1; //!< Timer3 Input Capture Interrupt Enable uint8_t rsvd : 2; //!< Timer2 Output Compare Interrupt Enable } bits; } Atm128_ETIMSK_t; /* Extended Timer/Counter Interrupt Flag Register */ typedef union { uint8_t flat; struct { uint8_t ocf1c : 1; //!< Timer1 Output Compare C Flag uint8_t ocf3c : 1; //!< Timer3 Output Compare C Flag uint8_t tov3 : 1; //!< Timer/Counter Overflow Flag uint8_t ocf3b : 1; //!< Timer3 Output Compare B Flag uint8_t ocf3a : 1; //!< Timer3 Output Compare A Flag uint8_t icf3 : 1; //!< Timer3 Input Capture Flag uint8_t rsvd : 2; //!< Reserved } bits; } Atm128_ETIFR_t; /* Resource strings for timer 1 and 3 compare registers */ #define UQ_TIMER1_COMPARE "atm128.timer1" #define UQ_TIMER3_COMPARE "atm128.timer3" #endif //_H_Atm128Timer_h tinyos-2.1.2+dfsg/tos/chips/atm128/timer/Atm128TimerInitC.nc000066400000000000000000000045011207233610700232560ustar00rootroot00000000000000/// $Id: Atm128TimerInitC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Initialise an Atmega128 timer to a particular prescaler. Expected to be * used at boot time. * @param timer_size Integer type of the timer * @param prescaler Desired prescaler value * * @author Martin Turon * @author David Gay */ generic module Atm128TimerInitC(typedef timer_size @integer(), uint8_t prescaler) @safe() { provides interface Init @atleastonce(); uses interface HplAtm128Timer as Timer; } implementation { command error_t Init.init() { atomic { call Timer.set(0); call Timer.start(); call Timer.setScale(prescaler); } return SUCCESS; } async event void Timer.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Capture.nc000066400000000000000000000061001207233610700233130ustar00rootroot00000000000000/// $Id: HplAtm128Capture.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL Interface to Atmega128 capture capabilities. * @param size_type Integer type of capture register * * @author Martin Turon */ interface HplAtm128Capture { // ==== Capture value register: Direct access ====================== /** * Get the time to be captured. * @return the capture time */ async command size_type get(); /** * Set the time to be captured. * @param t the time of the next capture event */ async command void set(size_type t); // ==== Interrupt signals ========================================== /** * Signalled on capture interrupt. * @param t the time of the capture event */ async event void captured(size_type t); // ==== Interrupt flag utilites: Bit level set/clr ================= /** Clear the capture interrupt flag. */ async command void reset(); /** Enable the capture interrupt. */ async command void start(); /** Turn off capture interrupts. */ async command void stop(); /** * Did a capture interrupt occur? * @return TRUE if capture triggered, FALSE otherwise */ async command bool test(); /** * Is capture interrupt on? * @return TRUE if capture enabled, FALSE otherwise */ async command bool isOn(); /** * Sets the capture edge. * @param up TRUE = detect rising edge, FALSE = detect falling edge */ async command void setEdge(bool up); } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Compare.nc000066400000000000000000000056111207233610700233040ustar00rootroot00000000000000/// $Id: HplAtm128Compare.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL Interface to Atmega128 compare registers. * @param size_type Integer type of compare register * * @author Martin Turon */ interface HplAtm128Compare { // ==== Compare value register: Direct access ====================== /** * Get the compare time to fire on. * @return the compare time value */ async command size_type get(); /** * Set the compare time to fire on. * @param t the compare time to set */ async command void set(size_type t); // ==== Interrupt signals ========================================== /** Signalled on interrupt. */ async event void fired(); // * This interface is designed to be independent of whether the underlying * hardware is an 8-bit or 16-bit wide counter. As such, timer_size is * specified via a generics parameter. Because this is exposing a common * subset of functionality that all ATmega128 hardware timers share, all * that is exposed is access to the overflow capability. Compare and capture * functionality are exposed on separate interfaces to allow easy * configurability via wiring. *

    * This interface provides four major groups of functionality:

      *
    1. Timer Value: get/set current time *
    2. Overflow Interrupt event *
    3. Control of Overflow Interrupt: start/stop/clear... *
    4. Timer Initialization: turn on/off clock source *
    * * @author Martin Turon */ interface HplAtm128Timer { /** * Get the current time. * @return the current time */ async command timer_size get(); /** * Set the current time. * @param t the time to set */ async command void set( timer_size t ); /** Signalled on timer overflow interrupt. */ async event void overflow(); // ==== Interrupt flag utilites: Bit level set/clr ================= /** Clear the overflow interrupt flag. */ async command void reset(); /** Enable the overflow interrupt. */ async command void start(); /** Turn off overflow interrupts. */ async command void stop(); /** * Did an overflow interrupt occur? * @return TRUE if overflow triggered, FALSE otherwise */ async command bool test(); /** * Is overflow interrupt on? * @return TRUE if overflow enabled, FALSE otherwise */ async command bool isOn(); // ==== Clock initialization interface ============================= /** Turn off the clock. */ async command void off(); /** * Turn on the clock. * @param scale Prescaler setting of clock -- see Atm128Timer.h */ async command void setScale( uint8_t scale); /** * Get prescaler setting. * @return Prescaler setting of clock -- see Atm128Timer.h */ async command uint8_t getScale(); } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc000066400000000000000000000046171207233610700241640ustar00rootroot00000000000000/// $Id: HplAtm128Timer0AsyncC.nc,v 1.7 2007-03-29 21:07:25 idgay Exp $ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Simple wrapper around the actual timer implementation that automatically * wires it to McuSleepC for low-power calculations.. * * @author Philip Levis * @author David Gay */ #include configuration HplAtm128Timer0AsyncC { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { components HplAtm128Timer0AsyncP; components McuSleepC; McuSleepC.McuPowerOverride -> HplAtm128Timer0AsyncP; Timer = HplAtm128Timer0AsyncP; TimerCtrl = HplAtm128Timer0AsyncP; Compare = HplAtm128Timer0AsyncP; TimerAsync = HplAtm128Timer0AsyncP; } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Timer0AsyncP.nc000066400000000000000000000174241207233610700242010ustar00rootroot00000000000000/// $Id: HplAtm128Timer0AsyncP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to Atmega128 timer 0 in ASYNC mode. This is a specialised * HPL component that assumes that timer 0 is used in ASYNC mode and * includes some workarounds for some of the weirdnesses (delayed overflow * interrupt) of that mode. * * @author Martin Turon * @author David Gay */ #include module HplAtm128Timer0AsyncP @safe() { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface McuPowerOverride; interface HplAtm128TimerAsync as TimerAsync; } } implementation { //=== Read the current timer value. =================================== async command uint8_t Timer.get() { return TCNT0; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint8_t t) { TCNT0 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR0 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128TimerControl_t x = call TimerCtrl.getControl(); x.bits.cs = s; call TimerCtrl.setControl(x); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t TimerCtrl.getControl() { return *(Atm128TimerControl_t*)&TCCR0; } //=== Write the control registers. ==================================== async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { TCCR0 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { return *(Atm128_TIFR_t*)&TIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer.reset() { TIFR = 1 << TOV0; } async command void Timer.start() { SET_BIT(TIMSK, TOIE0); } async command void Timer.stop() { CLR_BIT(TIMSK, TOIE0); } bool overflowed() { return (call TimerCtrl.getInterruptFlag()).bits.tov0; } async command bool Timer.test() { return overflowed(); } async command bool Timer.isOn() { return (call TimerCtrl.getInterruptMask()).bits.toie0; } async command void Compare.reset() { TIFR = 1 << OCF0; } async command void Compare.start() { SET_BIT(TIMSK,OCIE0); } async command void Compare.stop() { CLR_BIT(TIMSK,OCIE0); } async command bool Compare.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf0; } async command bool Compare.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie0; } //=== Read the compare registers. ===================================== async command uint8_t Compare.get() { return OCR0; } //=== Write the compare registers. ==================================== async command void Compare.set(uint8_t t) { OCR0 = t; } //=== Timer interrupts signals ======================================== inline void stabiliseTimer0() { TCCR0 = TCCR0; while (ASSR & 1 << TCR0UB) ; } /** * On the atm128, there is a small latency when waking up from * POWER_SAVE mode. So if a timer is going to go off very soon, it's * better to drop down until EXT_STANDBY, which has a 6 cycle wakeup * latency. This function calculates whether staying in EXT_STANDBY * is needed. If the timer is not running it returns POWER_DOWN. * Please refer to TEP 112 and the atm128 datasheet for details. */ async command mcu_power_t McuPowerOverride.lowestState() { uint8_t diff; // We need to make sure that the sleep wakeup latency will not // cause us to miss a timer. POWER_SAVE if (TIMSK & (1 << OCIE0 | 1 << TOIE0)) { // need to wait for timer 0 updates propagate before sleeping // (we don't need to worry about reentering sleep mode too early, // as the wake ups from timer0 wait at least one TOSC1 cycle // anyway - see the stabiliseTimer0 function) while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB)) ; diff = OCR0 - TCNT0; if (diff < EXT_STANDBY_T0_THRESHOLD || TCNT0 > 256 - EXT_STANDBY_T0_THRESHOLD) return ATM128_POWER_EXT_STANDBY; return ATM128_POWER_SAVE; } else { return ATM128_POWER_DOWN; } } default async event void Compare.fired() { } AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) { stabiliseTimer0(); signal Compare.fired(); } default async event void Timer.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) { stabiliseTimer0(); signal Timer.overflow(); } // Asynchronous status register support async command Atm128Assr_t TimerAsync.getAssr() { return *(Atm128Assr_t *)&ASSR; } async command void TimerAsync.setAssr(Atm128Assr_t x) { ASSR = x.flat; } async command void TimerAsync.setTimer0Asynchronous() { ASSR |= 1 << AS0; } async command int TimerAsync.controlBusy() { return (ASSR & (1 << TCR0UB)) != 0; } async command int TimerAsync.compareBusy() { return (ASSR & (1 << OCR0UB)) != 0; } async command int TimerAsync.countBusy() { return (ASSR & (1 << TCN0UB)) != 0; } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Timer1C.nc000066400000000000000000000046241207233610700231650ustar00rootroot00000000000000/// $Id: HplAtm128Timer1C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to Atmega128 timer 1. * * @author Martin Turon * @author David Gay */ configuration HplAtm128Timer1C { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as Compare[uint8_t id]; } } implementation { components HplAtm128Timer0AsyncC, HplAtm128Timer1P; Timer = HplAtm128Timer1P; TimerCtrl = HplAtm128Timer1P; Capture = HplAtm128Timer1P; Compare[0] = HplAtm128Timer1P.CompareA; Compare[1] = HplAtm128Timer1P.CompareB; Compare[2] = HplAtm128Timer1P.CompareC; HplAtm128Timer1P.Timer0Ctrl -> HplAtm128Timer0AsyncC; } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Timer1P.nc000066400000000000000000000216141207233610700232000ustar00rootroot00000000000000/// $Id: HplAtm128Timer1P.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Internal component of the HPL interface to Atmega128 timer 1. * * @author Martin Turon */ #include module HplAtm128Timer1P @safe() { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as CompareA; interface HplAtm128Compare as CompareB; interface HplAtm128Compare as CompareC; } uses interface HplAtm128TimerCtrl8 as Timer0Ctrl; } implementation { //=== Read the current timer value. =================================== async command uint16_t Timer.get() { return TCNT1; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint16_t t) { TCNT1 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR1B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture(); x.bits.cs = s; call TimerCtrl.setCtrlCapture(x); } //=== Read the control registers. ===================================== async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { return *(Atm128TimerCtrlCompare_t*ONE)&TCCR1A; } async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { return *(Atm128TimerCtrlCapture_t*ONE)&TCCR1B; } async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { return *(Atm128TimerCtrlClock_t*ONE)&TCCR1C; } //=== Control registers utilities. ================================== DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t); //=== Write the control registers. ==================================== async command void TimerCtrl.setCtrlCompare( Atm128_TCCR1A_t x ) { TCCR1A = TimerCtrlCompare2int(x); } async command void TimerCtrl.setCtrlCapture( Atm128_TCCR1B_t x ) { TCCR1B = TimerCtrlCapture2int(x); } async command void TimerCtrl.setCtrlClock( Atm128_TCCR1C_t x ) { TCCR1C = TimerCtrlClock2int(x); } //=== Read the interrupt mask. ===================================== async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { return *(Atm128_ETIMSK_t*)&ETIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { ETIMSK = TimerMask16_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { return *(Atm128_ETIFR_t*ONE)&ETIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { ETIFR = TimerFlags16_2int(x); } //=== Capture 16-bit implementation. =================================== async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); } //=== Timer 16-bit implementation. =================================== async command void Timer.reset() { TIFR = 1 << TOV1; } async command void Capture.reset() { TIFR = 1 << ICF1; } async command void CompareA.reset() { TIFR = 1 << OCF1A; } async command void CompareB.reset() { TIFR = 1 << OCF1B; } async command void CompareC.reset() { ETIFR = 1 << OCF1C; } async command void Timer.start() { SET_BIT(TIMSK,TOIE1); } async command void Capture.start() { SET_BIT(TIMSK,TICIE1); } async command void CompareA.start() { SET_BIT(TIMSK,OCIE1A); } async command void CompareB.start() { SET_BIT(TIMSK,OCIE1B); } async command void CompareC.start() { SET_BIT(ETIMSK,OCIE1C); } async command void Timer.stop() { CLR_BIT(TIMSK,TOIE1); } async command void Capture.stop() { CLR_BIT(TIMSK,TICIE1); } async command void CompareA.stop() { CLR_BIT(TIMSK,OCIE1A); } async command void CompareB.stop() { CLR_BIT(TIMSK,OCIE1B); } async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE1C); } // Note: Many Timer interrupt flags are on Timer0 register async command bool Timer.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.tov1; } async command bool Capture.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.icf1; } async command bool CompareA.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1a; } async command bool CompareB.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1b; } async command bool CompareC.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf1c; } // Note: Many Timer interrupt mask bits are on Timer0 register async command bool Timer.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.toie1; } async command bool Capture.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.ticie1; } async command bool CompareA.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.ocie1a; } async command bool CompareB.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.ocie1b; } async command bool CompareC.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie1c; } //=== Read the compare registers. ===================================== async command uint16_t CompareA.get() { return OCR1A; } async command uint16_t CompareB.get() { return OCR1B; } async command uint16_t CompareC.get() { return OCR1C; } //=== Write the compare registers. ==================================== async command void CompareA.set(uint16_t t) { OCR1A = t; } async command void CompareB.set(uint16_t t) { OCR1B = t; } async command void CompareC.set(uint16_t t) { OCR1C = t; } //=== Read the capture registers. ===================================== async command uint16_t Capture.get() { return ICR1; } //=== Write the capture registers. ==================================== async command void Capture.set(uint16_t t) { ICR1 = t; } //=== Timer interrupts signals ======================================== default async event void CompareA.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) { signal CompareA.fired(); } default async event void CompareB.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) { signal CompareB.fired(); } default async event void CompareC.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) { signal CompareC.fired(); } default async event void Capture.captured(uint16_t time) { } AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) { signal Capture.captured(call Capture.get()); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) { signal Timer.overflow(); } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Timer2C.nc000066400000000000000000000131521207233610700231620ustar00rootroot00000000000000/// $Id: HplAtm128Timer2C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to Atmega128 timer 2. * * @author Martin Turon */ #include module HplAtm128Timer2C { provides { interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; } } implementation { //=== Read the current timer value. =================================== async command uint8_t Timer.get() { return TCNT2; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint8_t t) { TCNT2 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR2 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128TimerControl_t x = call TimerCtrl.getControl(); x.bits.cs = s; call TimerCtrl.setControl(x); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t TimerCtrl.getControl() { return *(Atm128TimerControl_t*)&TCCR2; } //=== Control registers utilities. ================================== DEFINE_UNION_CAST(TimerCtrlCompareint, Atm128TimerCtrlCompare_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t); //=== Write the control registers. ==================================== async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { TCCR2 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { return *(Atm128_TIFR_t*)&TIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer.reset() { TIFR = 1 << TOV2; } async command void Timer.start() { SET_BIT(TIMSK,TOIE2); } async command void Timer.stop() { CLR_BIT(TIMSK,TOIE2); } async command bool Timer.test() { return (call TimerCtrl.getInterruptFlag()).bits.tov2; } async command bool Timer.isOn() { return (call TimerCtrl.getInterruptMask()).bits.toie2; } async command void Compare.reset() { TIFR = 1 << OCF2; } async command void Compare.start() { SET_BIT(TIMSK,OCIE2); } async command void Compare.stop() { CLR_BIT(TIMSK,OCIE2); } async command bool Compare.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf2; } async command bool Compare.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie2; } //=== Read the compare registers. ===================================== async command uint8_t Compare.get() { return OCR2; } //=== Write the compare registers. ==================================== async command void Compare.set(uint8_t t) { OCR2 = t; } //=== Timer interrupts signals ======================================== default async event void Compare.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE2) { signal Compare.fired(); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW2) { signal Timer.overflow(); } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Timer3C.nc000066400000000000000000000045021207233610700231620ustar00rootroot00000000000000/// $Id: HplAtm128Timer3C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to Atmega128 timer 2. * * @author Martin Turon * @author David Gay */ configuration HplAtm128Timer3C { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as Compare[uint8_t id]; } } implementation { components HplAtm128Timer3P; Timer = HplAtm128Timer3P; TimerCtrl = HplAtm128Timer3P; Capture = HplAtm128Timer3P; Compare[0] = HplAtm128Timer3P.CompareA; Compare[1] = HplAtm128Timer3P.CompareB; Compare[2] = HplAtm128Timer3P.CompareC; } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128Timer3P.nc000066400000000000000000000210641207233610700232010ustar00rootroot00000000000000/// $Id: HplAtm128Timer3P.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Internal componentr of the HPL interface to Atmega128 timer 3. * * @author Martin Turon */ #include module HplAtm128Timer3P { provides { interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as CompareA; interface HplAtm128Compare as CompareB; interface HplAtm128Compare as CompareC; } } implementation { //=== Read the current timer value. =================================== async command uint16_t Timer.get() { return TCNT3; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint16_t t) { TCNT3 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR3B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture(); x.bits.cs = s; call TimerCtrl.setCtrlCapture(x); } //=== Read the control registers. ===================================== async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { return *(Atm128TimerCtrlCompare_t*)&TCCR3A; } async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { return *(Atm128TimerCtrlCapture_t*)&TCCR3B; } async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { return *(Atm128TimerCtrlClock_t*)&TCCR3C; } //=== Control registers utilities. ================================== DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t); //=== Write the control registers. ==================================== async command void TimerCtrl.setCtrlCompare( Atm128_TCCR3A_t x ) { TCCR3A = TimerCtrlCompare2int(x); } async command void TimerCtrl.setCtrlCapture( Atm128_TCCR3B_t x ) { TCCR3B = TimerCtrlCapture2int(x); } async command void TimerCtrl.setCtrlClock( Atm128_TCCR3C_t x ) { TCCR3C = TimerCtrlClock2int(x); } //=== Read the interrupt mask. ===================================== async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { return *(Atm128_ETIMSK_t*)&ETIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { ETIMSK = TimerMask16_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { return *(Atm128_ETIFR_t*)&ETIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { ETIFR = TimerFlags16_2int(x); } //=== Capture 16-bit implementation. =================================== async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B,ICES3, up); } //=== Timer 16-bit implementation. =================================== async command void Timer.reset() { ETIFR = 1 << TOV3; } async command void Capture.reset() { ETIFR = 1 << ICF3; } async command void CompareA.reset() { ETIFR = 1 << OCF3A; } async command void CompareB.reset() { ETIFR = 1 << OCF3B; } async command void CompareC.reset() { ETIFR = 1 << OCF3C; } async command void Timer.start() { SET_BIT(ETIMSK,TOIE3); } async command void Capture.start() { SET_BIT(ETIMSK,TICIE3); } async command void CompareA.start() { SET_BIT(ETIMSK,OCIE3A); } async command void CompareB.start() { SET_BIT(ETIMSK,OCIE3B); } async command void CompareC.start() { SET_BIT(ETIMSK,OCIE3C); } async command void Timer.stop() { CLR_BIT(ETIMSK,TOIE3); } async command void Capture.stop() { CLR_BIT(ETIMSK,TICIE3); } async command void CompareA.stop() { CLR_BIT(ETIMSK,OCIE3A); } async command void CompareB.stop() { CLR_BIT(ETIMSK,OCIE3B); } async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE3C); } async command bool Timer.test() { return (call TimerCtrl.getInterruptFlag()).bits.tov3; } async command bool Capture.test() { return (call TimerCtrl.getInterruptFlag()).bits.icf3; } async command bool CompareA.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf3a; } async command bool CompareB.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf3b; } async command bool CompareC.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf3c; } async command bool Timer.isOn() { return (call TimerCtrl.getInterruptMask()).bits.toie3; } async command bool Capture.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ticie3; } async command bool CompareA.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie3a; } async command bool CompareB.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie3b; } async command bool CompareC.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie3c; } //=== Read the compare registers. ===================================== async command uint16_t CompareA.get() { return OCR3A; } async command uint16_t CompareB.get() { return OCR3B; } async command uint16_t CompareC.get() { return OCR3C; } //=== Write the compare registers. ==================================== async command void CompareA.set(uint16_t t) { OCR3A = t; } async command void CompareB.set(uint16_t t) { OCR3B = t; } async command void CompareC.set(uint16_t t) { OCR3C = t; } //=== Read the capture registers. ===================================== async command uint16_t Capture.get() { return ICR3; } //=== Write the capture registers. ==================================== async command void Capture.set(uint16_t t) { ICR3 = t; } //=== Timer interrupts signals ======================================== default async event void CompareA.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) { signal CompareA.fired(); } default async event void CompareB.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) { signal CompareB.fired(); } default async event void CompareC.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) { signal CompareC.fired(); } default async event void Capture.captured(uint16_t time) { } AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) { signal Capture.captured(call Capture.get()); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) { signal Timer.overflow(); } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128TimerAsync.nc000066400000000000000000000026541207233610700240000ustar00rootroot00000000000000// $Id: HplAtm128TimerAsync.nc,v 1.2 2007-03-29 21:29:33 idgay Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * @author David Gay */ interface HplAtm128TimerAsync { /** * Read timer0 asynchronous status register (ASSR) * @return Current value of ASSR */ async command Atm128Assr_t getAssr(); /** * Set timer0 asynchronous status register (ASSR) * @param x New value for ASSR */ async command void setAssr(Atm128Assr_t x); /** * Turn on timer 0 asynchronous mode */ async command void setTimer0Asynchronous(); /** * Check if control register TCCR0 is busy (should not be updated if true) * @return TRUE if TCCR0 is busy, FALSE otherwise (can be updated) */ async command int controlBusy(); /** * Check if compare register OCR0 is busy (should not be updated if true) * @return TRUE if OCR0 is busy, FALSE otherwise (can be updated) */ async command int compareBusy(); /** * Check if current timer value (TCNT0) is busy (should not be updated if true) * @return TRUE if TCNT0 is busy, FALSE otherwise (can be updated) */ async command int countBusy(); } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128TimerCtrl16.nc000066400000000000000000000050571207233610700237760ustar00rootroot00000000000000/// $Id: HplAtm128TimerCtrl16.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL Interface to Atmega128 16-bit timer control registers * * @author Martin Turon */ #include interface HplAtm128TimerCtrl16 { /// Timer control registers: Direct access async command Atm128TimerCtrlCompare_t getCtrlCompare(); async command Atm128TimerCtrlCapture_t getCtrlCapture(); async command Atm128TimerCtrlClock_t getCtrlClock(); async command void setCtrlCompare( Atm128TimerCtrlCompare_t control ); async command void setCtrlCapture( Atm128TimerCtrlCapture_t control ); async command void setCtrlClock ( Atm128TimerCtrlClock_t control ); /// Interrupt mask register: Direct access async command Atm128_ETIMSK_t getInterruptMask(); async command void setInterruptMask( Atm128_ETIMSK_t mask); /// Interrupt flag register: Direct access async command Atm128_ETIFR_t getInterruptFlag(); async command void setInterruptFlag( Atm128_ETIFR_t flags ); } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/HplAtm128TimerCtrl8.nc000066400000000000000000000044171207233610700237160ustar00rootroot00000000000000/// $Id: HplAtm128TimerCtrl8.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL Interface to Atmega128 8-bit timer control registers * * @author Martin Turon */ #include interface HplAtm128TimerCtrl8 { /// Timer control register: Direct access async command Atm128TimerControl_t getControl(); async command void setControl( Atm128TimerControl_t control ); /// Interrupt mask register: Direct access async command Atm128_TIMSK_t getInterruptMask(); async command void setInterruptMask( Atm128_TIMSK_t mask); /// Interrupt flag register: Direct access async command Atm128_TIFR_t getInterruptFlag(); async command void setInterruptFlag( Atm128_TIFR_t flags ); } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/sim/000077500000000000000000000000001207233610700206205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128/timer/sim/HplAtm128CompareC.nc000066400000000000000000000213071207233610700241770ustar00rootroot00000000000000/// $Id: HplAtm128CompareC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic compare abstraction that builds on top of a counter. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: HplAtm128CompareC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ #include generic module HplAtm128CompareC(typedef width_t @integer(), uint8_t valueRegister, uint8_t interruptRegister, uint8_t interruptBit, uint8_t flagRegister, uint8_t flagBit) { provides { // 8-bit Timers interface HplAtm128Compare as Compare; } uses { interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128TimerNotify as Notify; } } implementation { /* lastZero keeps track of the phase of the clock. It denotes the sim * time at which the underlying clock started, which is needed to * calculate when compares will occur. */ sim_time_t lastZero = 0; /** This variable is needed to keep track of when the underlying * timer starts, in order to reset lastZero. When oldScale is * AVR_CLOCK_OFF and the scale is set to something else, the * clock starts ticking. */ uint8_t oldScale = AVR_CLOCK_OFF; void adjust_zero(width_t currentCounter); void cancel_compare(); sim_event_t* allocate_compare(); void configure_compare(sim_event_t* e); void schedule_new_compare(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); sim_time_t last_zero() { if (lastZero == 0) { lastZero = sim_mote_start_time(sim_node()); } return lastZero; } async event void Notify.changed() { uint8_t newScale = call Timer.getScale(); if (newScale != AVR_CLOCK_OFF && oldScale == AVR_CLOCK_OFF) { lastZero = sim_time(); } oldScale = newScale; schedule_new_compare(); } async command void Compare.reset() { REG_ACCESS(flagRegister) &= ~(1 << flagBit); } async command void Compare.start() { SET_BIT(interruptRegister,interruptBit); } async command void Compare.stop() { CLR_BIT(interruptRegister,interruptBit); } async command bool Compare.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf0; } async command bool Compare.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie0; } //=== Read the compare registers. ===================================== async command width_t Compare.get() { return (width_t)REG_ACCESS(valueRegister); } //=== Write the compare registers. ==================================== async command void Compare.set(width_t t) { atomic { /* Re the comment above: it's a bad idea to wake up at time 0, as we'll just spin when setting the next deadline. Try and reduce the likelihood by delaying the interrupt... */ if (t == 0 || t >= 0xfe) t = 1; if (t != REG_ACCESS(valueRegister)) { REG_ACCESS(valueRegister) = t; schedule_new_compare(); } } } //=== Timer interrupts signals ======================================== default async event void Compare.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) { signal Compare.fired(); } /** * If the clock was stopped and has restarted, then * we need to move the time when the clock was last * zero to a time that reflects the current settings. * For example, if the clock was stopped when the counter * was 52 and then later restarted, then lastZero * needs to be moved forward in time so that the 52 * reflects the current time. */ void adjust_zero(width_t currentCounter) { sim_time_t now = sim_time(); sim_time_t adjust = currentCounter; adjust = adjust << shiftFromScale(); adjust = clock_to_sim(adjust); lastZero = now - adjust; } sim_time_t clock_to_sim(sim_time_t t) { t *= sim_ticks_per_sec(); t /= call Notify.clockTicksPerSec(); return t; } sim_time_t sim_to_clock(sim_time_t t) { t *= call Notify.clockTicksPerSec(); t /= sim_ticks_per_sec(); return t; } uint16_t shiftFromScale() { uint8_t scale = call Timer.getScale(); switch (scale) { case 0: return 0; case 1: return 0; case 2: return 3; case 3: return 5; case 4: return 6; case 5: return 7; case 6: return 8; case 7: return 10; default: return 255; } } sim_event_t* compare; void timer0_compare_handle(sim_event_t* evt) { dbg("HplAtm128CompareC", "%s Beginning compare at 0x%p\n", __FUNCTION__, evt); if (evt->cancelled) { return; } else { dbg("HplAtm128CompareC", "%s Handling compare at 0x%p @ %s\n",__FUNCTION__, evt, sim_time_string()); if (READ_BIT(interruptRegister, interruptBit)) { CLR_BIT(flagRegister, flagBit); dbg("HplAtm128CompareC", "%s Compare interrupt @ %s\n", __FUNCTION__, sim_time_string()); SIG_OUTPUT_COMPARE0(); } else { SET_BIT(flagRegister, flagBit); } // If we haven't been cancelled if (!evt->cancelled) { configure_compare(evt); sim_queue_insert(evt); } } } sim_event_t* allocate_compare() { sim_event_t* newEvent = sim_queue_allocate_event(); dbg("HplAtm128CompareC", "Allocated compare at 0x%p\n", newEvent); newEvent->handle = timer0_compare_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_compare(sim_event_t* evt) { sim_time_t compareTime = 0; sim_time_t phaseOffset = 0; uint8_t timerVal = call Timer.get(); uint8_t compareVal = call Compare.get(); // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. compareTime = ((compareVal - timerVal) & 0xff); if (compareTime == 0) { compareTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. compareTime = compareTime << shiftFromScale(); compareTime = clock_to_sim(compareTime); compareTime += sim_time(); // How long into a timer tick was the clock actually reset? // This covers the case when the compare is set midway between // a tick, so it will go off a little early phaseOffset = sim_time(); phaseOffset -= last_zero(); phaseOffset %= clock_to_sim(1 << shiftFromScale()); compareTime -= phaseOffset; dbg("HplAtm128CompareC", "Configuring new compare of %i for %i at time %llu (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time()); evt->time = compareTime; } void schedule_new_compare() { if (compare != NULL) { cancel_compare(); } if (call Timer.getScale() != AVR_CLOCK_OFF) { sim_event_t* newEvent = allocate_compare(); configure_compare(newEvent); compare = newEvent; sim_queue_insert(newEvent); } } void cancel_compare() { dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare); if (compare != NULL) { compare->cancelled = 1; compare->cleanup = sim_queue_cleanup_total; } } async event void Timer.overflow() {} } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/sim/HplAtm128Counter0C.nc000066400000000000000000000267111207233610700243140ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer0 counter. It handles * overflow, scaling, and phase considerations. * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Counter0C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include #include module HplAtm128Counter0C { provides { interface Init @atleastonce(); // 8-bit Timers interface HplAtm128Timer as Timer0; interface HplAtm128TimerNotify as Notify; interface HplAtm128TimerCtrl8 as Timer0Ctrl; } } implementation { bool inOverflow = 0; uint8_t savedCounter = 0; sim_time_t lastZero = 0; void adjust_zero(uint8_t currentCounter); void cancel_overflow(); sim_event_t* allocate_overflow(); void configure_overflow(sim_event_t* e); void schedule_new_overflow(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); command error_t Init.init() { /* Do nothing. On a standard mote this configures Timer0 to * operating in asynchronous mode off an external crystal. Here in * TOSSIM it's assumed that's the case. */ return SUCCESS; } async command sim_time_t Notify.clockTicksPerSec() { return ATM128_TIMER0_TICKSPPS; } sim_time_t last_zero() { if (lastZero == 0) { lastZero = sim_mote_start_time(sim_node()); } return lastZero; } //=== Read the current timer value. =================================== async command uint8_t Timer0.get() { uint8_t rval; sim_time_t elapsed = sim_time() - last_zero(); elapsed = sim_to_clock(elapsed); elapsed = elapsed >> shiftFromScale(); rval = (uint8_t)(elapsed & 0xff); dbg("HplAtm128Counter0C", "HplAtm128Counter0C: Getting timer: %hhu\n", rval); return rval; } //=== Set/clear the current timer value. ============================== /** * Set/clear the current timer value. * * This code is pretty tricky. */ async command void Timer0.set(uint8_t newVal) { uint8_t curVal = call Timer0.get(); if (newVal == curVal) { return; } else { sim_time_t adjustment = curVal - newVal; adjustment = adjustment << shiftFromScale(); adjustment = clock_to_sim(adjustment); if (newVal < curVal) { lastZero += adjustment; } else { // newVal > curVal lastZero -= adjustment; } schedule_new_overflow(); signal Notify.changed(); } } //=== Read the current timer scale. =================================== async command uint8_t Timer0.getScale() { return TCCR0 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer0.off() { call Timer0.setScale(AVR_CLOCK_OFF); savedCounter = call Timer0.get(); cancel_overflow(); signal Notify.changed(); } //=== Write a new timer scale. ======================================== async command void Timer0.setScale(uint8_t s) { Atm128TimerControl_t ctrl; uint8_t currentScale = call Timer0.getScale(); uint8_t currentCounter; dbg("HplAtm128Counter0C", "Timer0 scale set to %i\n", (int)s); if (currentScale == 0) { currentCounter = savedCounter; } else { currentCounter = call Timer0.get(); } ctrl = call Timer0Ctrl.getControl(); ctrl.flat &= ~(0x7); ctrl.flat |= (s & 0x7); call Timer0Ctrl.setControl(ctrl); if (currentScale != s) { adjust_zero(currentCounter); schedule_new_overflow(); } signal Notify.changed(); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t Timer0Ctrl.getControl() { return *(Atm128TimerControl_t*)&TCCR0; } //=== Write the control registers. ==================================== async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) { TCCR0 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() { return *(Atm128_TIFR_t*)&TIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer0.reset() { // Clear TOV0. On real hardware, this is a write. TIFR &= ~(1 << TOV0); } async command void Timer0.start() { SET_BIT(ATM128_TIMSK, TOIE0); dbg("HplAtm128Counter0C", "Enabling TOIE0 at %llu\n", sim_time()); schedule_new_overflow(); } async command void Timer0.stop() { dbg("HplAtm128Counter0C", "Timer stopped @ %llu\n", sim_time()); CLR_BIT(ATM128_TIMSK, TOIE0); cancel_overflow(); } bool overflowed() { return READ_BIT(ATM128_TIFR, TOV0); } inline void stabiliseOverflow() { /* From the atmel manual: During asynchronous operation, the synchronization of the interrupt flags for the asynchronous timer takes three processor cycles plus one timer cycle. The timer is therefore advanced by at least one before the processor can read the timer value causing the setting of the interrupt flag. The output compare pin is changed on the timer clock and is not synchronized to the processor clock. So: if the timer is = 0, wait till it's = 1, except if - we're currently in the overflow interrupt handler - or, the overflow flag is already set */ //if (!inOverflow) // while (!TCNT0 && !overflowed()) //; } async command bool Timer0.test() { stabiliseOverflow(); return overflowed(); } async command bool Timer0.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.toie0; } default async event void Timer0.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) { inOverflow = TRUE; signal Timer0.overflow(); inOverflow = FALSE; } /** * If the clock was stopped and has restarted, then * we need to move the time when the clock was last * zero to a time that reflects the current settings. * For example, if the clock was stopped when the counter * was 52 and then later restarted, then lastZero * needs to be moved forward in time so that the 52 * reflects the current time. */ void adjust_zero(uint8_t currentCounter) { sim_time_t now = sim_time(); sim_time_t adjust = currentCounter; adjust = adjust << shiftFromScale(); adjust = clock_to_sim(adjust); lastZero = now - adjust; } sim_time_t clock_to_sim(sim_time_t t) { t *= sim_ticks_per_sec(); t /= call Notify.clockTicksPerSec(); return t; } sim_time_t sim_to_clock(sim_time_t t) { t *= call Notify.clockTicksPerSec(); t /= sim_ticks_per_sec(); return t; } uint16_t shiftFromScale() { uint8_t scale = call Timer0.getScale(); switch (scale) { case 0: return 0; case 1: return 0; case 2: return 3; case 3: return 5; case 4: return 6; case 5: return 7; case 6: return 8; case 7: return 10; default: return 255; } } sim_event_t* overflow; void timer0_overflow_handle(sim_event_t* evt) { if (evt->cancelled) { return; } else { if (READ_BIT(ATM128_TIMSK, TOIE0)) { CLR_BIT(ATM128_TIFR, TOV0); dbg("HplAtm128Counter0C", "Overflow interrupt at %s\n", sim_time_string()); SIG_OVERFLOW0(); } else { dbg("HplAtm128Counter0C", "Setting overflow bit at %s\n", sim_time_string()); SET_BIT(ATM128_TIFR, TOV0); } configure_overflow(evt); sim_queue_insert(evt); } } sim_event_t* allocate_overflow() { sim_event_t* newEvent = sim_queue_allocate_event(); newEvent->handle = timer0_overflow_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_overflow(sim_event_t* evt) { sim_time_t overflowTime = 0; uint8_t timerVal = call Timer0.get(); uint8_t overflowVal = 0; // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. overflowTime = ((overflowVal - timerVal) & 0xff); if (overflowTime == 0) { overflowTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. overflowTime = overflowTime << shiftFromScale(); overflowTime = clock_to_sim(overflowTime); overflowTime += sim_time(); overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale()); dbg("HplAtm128Counter0C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime); evt->time = overflowTime; } void schedule_new_overflow() { sim_event_t* newEvent = allocate_overflow(); configure_overflow(newEvent); if (overflow != NULL) { cancel_overflow(); } overflow = newEvent; sim_queue_insert(newEvent); } void cancel_overflow() { if (overflow != NULL) { overflow->cancelled = 1; dbg("HplAtm128Counter0C", "Cancelling overflow %p.\n", overflow); overflow->cleanup = sim_queue_cleanup_total; } } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/sim/HplAtm128Counter2C.nc000066400000000000000000000263411207233610700243150ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer2 counter. It handles * overflow, scaling, and phase considerations. * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Counter2C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include #include enum { ATM128_TIMER2_TICKSPPS = (1 << 13) }; module HplAtm128Counter2C { provides { // 8-bit Timers interface HplAtm128Timer as Timer2; interface HplAtm128TimerNotify as Notify; interface HplAtm128TimerCtrl8 as Timer2Ctrl; } } implementation { bool inOverflow = 0; uint8_t savedCounter = 0; sim_time_t lastZero = 0; void adjust_zero(uint8_t currentCounter); void cancel_overflow(); sim_event_t* allocate_overflow(); void configure_overflow(sim_event_t* e); void schedule_new_overflow(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); async command sim_time_t Notify.clockTicksPerSec() { return ATM128_TIMER2_TICKSPPS; } sim_time_t last_zero() { if (lastZero == 0) { lastZero = sim_mote_start_time(sim_node()); } return lastZero; } //=== Read the current timer value. =================================== async command uint8_t Timer2.get() { uint8_t rval; sim_time_t elapsed = sim_time() - last_zero(); elapsed = sim_to_clock(elapsed); elapsed = elapsed >> shiftFromScale(); rval = (uint8_t)(elapsed & 0xff); dbg("HplAtm128Counter2C", "HplAtm128Counter2C: Getting timer: %hhu\n", rval); return rval; } //=== Set/clear the current timer value. ============================== /** * Set/clear the current timer value. * * This code is pretty tricky. */ async command void Timer2.set(uint8_t newVal) { uint8_t curVal = call Timer2.get(); if (newVal == curVal) { return; } else { sim_time_t adjustment = curVal - newVal; adjustment = adjustment << shiftFromScale(); adjustment = clock_to_sim(adjustment); if (newVal < curVal) { lastZero += adjustment; } else { // newVal > curVal lastZero -= adjustment; } schedule_new_overflow(); signal Notify.changed(); } } //=== Read the current timer scale. =================================== async command uint8_t Timer2.getScale() { return TCCR2 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer2.off() { call Timer2.setScale(AVR_CLOCK_OFF); savedCounter = call Timer2.get(); cancel_overflow(); signal Notify.changed(); } //=== Write a new timer scale. ======================================== async command void Timer2.setScale(uint8_t s) { Atm128TimerControl_t ctrl; uint8_t currentScale = call Timer2.getScale(); uint8_t currentCounter; dbg("HplAtm128Counter2C", "Timer2 scale set to %i\n", (int)s); if (currentScale == 0) { currentCounter = savedCounter; } else { currentCounter = call Timer2.get(); } ctrl = call Timer2Ctrl.getControl(); ctrl.bits.cs = s; call Timer2Ctrl.setControl(ctrl); if (currentScale != s) { adjust_zero(currentCounter); schedule_new_overflow(); } signal Notify.changed(); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t Timer2Ctrl.getControl() { return *(Atm128TimerControl_t*)&TCCR2; } //=== Write the control registers. ==================================== async command void Timer2Ctrl.setControl( Atm128TimerControl_t x ) { TCCR2 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t Timer2Ctrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void Timer2Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t Timer2Ctrl.getInterruptFlag() { return *(Atm128_TIFR_t*)&TIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void Timer2Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer2.reset() { // Clear TOV0. On real hardware, this is a write. TIFR &= ~(1 << TOV2); } async command void Timer2.start() { SET_BIT(ATM128_TIMSK, TOIE2); dbg("HplAtm128Counter2C", "Enabling TOIE0 at %llu\n", sim_time()); schedule_new_overflow(); } async command void Timer2.stop() { dbg("HplAtm128Counter2C", "Timer stopped @ %llu\n", sim_time()); CLR_BIT(ATM128_TIMSK, TOIE2); cancel_overflow(); } bool overflowed() { return READ_BIT(ATM128_TIFR, TOV2); } inline void stabiliseOverflow() { /* From the atmel manual: During asynchronous operation, the synchronization of the interrupt flags for the asynchronous timer takes three processor cycles plus one timer cycle. The timer is therefore advanced by at least one before the processor can read the timer value causing the setting of the interrupt flag. The output compare pin is changed on the timer clock and is not synchronized to the processor clock. So: if the timer is = 0, wait till it's = 1, except if - we're currently in the overflow interrupt handler - or, the overflow flag is already set */ //if (!inOverflow) // while (!TCNT0 && !overflowed()) //; } async command bool Timer2.test() { stabiliseOverflow(); return overflowed(); } async command bool Timer2.isOn() { return (call Timer2Ctrl.getInterruptMask()).bits.toie2; } default async event void Timer2.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) { inOverflow = TRUE; signal Timer2.overflow(); inOverflow = FALSE; } /** * If the clock was stopped and has restarted, then * we need to move the time when the clock was last * zero to a time that reflects the current settings. * For example, if the clock was stopped when the counter * was 52 and then later restarted, then lastZero * needs to be moved forward in time so that the 52 * reflects the current time. */ void adjust_zero(uint8_t currentCounter) { sim_time_t now = sim_time(); sim_time_t adjust = currentCounter; adjust = adjust << shiftFromScale(); adjust = clock_to_sim(adjust); lastZero = now - adjust; } sim_time_t clock_to_sim(sim_time_t t) { t *= sim_ticks_per_sec(); t /= call Notify.clockTicksPerSec(); return t; } sim_time_t sim_to_clock(sim_time_t t) { t *= call Notify.clockTicksPerSec(); t /= sim_ticks_per_sec(); return t; } uint16_t shiftFromScale() { uint8_t scale = call Timer2.getScale(); switch (scale) { case 0: return 0; case 1: return 0; case 2: return 3; case 3: return 5; case 4: return 6; case 5: return 7; case 6: return 8; case 7: return 10; default: return 255; } } sim_event_t* overflow; void timer2_overflow_handle(sim_event_t* evt) { if (evt->cancelled) { return; } else { char time[128]; sim_print_now(time, 128); if (READ_BIT(ATM128_TIMSK, TOIE2)) { CLR_BIT(ATM128_TIFR, TOV2); dbg("HplAtm128Counter2C", "Overflow interrupt at %s\n", time); SIG_OVERFLOW2(); } else { dbg("HplAtm128Counter2C", "Setting overflow bit at %s\n", time); SET_BIT(ATM128_TIFR, TOV2); } configure_overflow(evt); sim_queue_insert(evt); } } sim_event_t* allocate_overflow() { sim_event_t* newEvent = sim_queue_allocate_event(); newEvent->handle = timer2_overflow_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_overflow(sim_event_t* evt) { sim_time_t overflowTime = 0; uint8_t timerVal = call Timer2.get(); uint8_t overflowVal = 0; // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. overflowTime = ((overflowVal - timerVal) & 0xff); if (overflowTime == 0) { overflowTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. overflowTime = overflowTime << shiftFromScale(); overflowTime = clock_to_sim(overflowTime); overflowTime += sim_time(); overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale()); dbg("HplAtm128Counter2C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime); evt->time = overflowTime; } void schedule_new_overflow() { sim_event_t* newEvent = allocate_overflow(); configure_overflow(newEvent); if (overflow != NULL) { cancel_overflow(); } overflow = newEvent; sim_queue_insert(newEvent); } void cancel_overflow() { if (overflow != NULL) { overflow->cancelled = 1; dbg("HplAtm128Counter2C", "Cancelling overflow %p.\n", overflow); overflow->cleanup = sim_queue_cleanup_total; } } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncC.nc000066400000000000000000000051631207233610700247510ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer0. It is built from a * timer-specific counter component and a generic compare * component. The counter component has an additional simulation-only * interface to let the compare component know when its state has * changed (e.g., TCNTX was set). * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Timer0AsyncC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include configuration HplAtm128Timer0AsyncC { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { components HplAtm128Timer0AsyncP; Timer = HplAtm128Timer0AsyncP; TimerCtrl = HplAtm128Timer0AsyncP; Compare = HplAtm128Timer0AsyncP; TimerAsync = HplAtm128Timer0AsyncP; } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncP.nc000066400000000000000000000430041207233610700247620ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer0 counter. It handles * overflow, scaling, and phase considerations. * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Timer0AsyncP.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include #include module HplAtm128Timer0AsyncP { provides { interface HplAtm128Timer as Timer0; interface HplAtm128TimerCtrl8 as Timer0Ctrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { bool inOverflow = 0; uint8_t savedCounter = 0; void adjust_zero(uint8_t currentCounter); void cancel_overflow(); sim_event_t* allocate_overflow(); void configure_overflow(sim_event_t* e); void schedule_new_overflow(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); /* lastZero keeps track of the phase of the clock. It denotes the sim * time at which the underlying clock started, which is needed to * calculate when compares will occur. */ sim_time_t lastZero = 0; /** This variable is needed to keep track of when the underlying * timer starts, in order to reset lastZero. When oldScale is * AVR_CLOCK_OFF and the scale is set to something else, the * clock starts ticking. */ uint8_t oldScale = AVR_CLOCK_OFF; void adjust_zero(uint8_t currentCounter); void cancel_compare(); sim_event_t* allocate_compare(); void configure_compare(sim_event_t* e); void schedule_new_compare(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); default async event void Compare.fired() { } AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) { //stabiliseTimer0(); signal Compare.fired(); } default async event void Timer0.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) { inOverflow = TRUE; signal Timer0.overflow(); inOverflow = FALSE; } sim_time_t last_zero() { if (lastZero == 0) { lastZero = sim_mote_start_time(sim_node()); } return lastZero; } void notify_changed() { uint8_t newScale = call Timer0.getScale(); if (newScale != AVR_CLOCK_OFF && oldScale == AVR_CLOCK_OFF) { lastZero = sim_time(); } oldScale = newScale; schedule_new_compare(); } sim_time_t notify_clockTicksPerSec() { return ATM128_TIMER0_TICKSPPS; } /** * If the clock was stopped and has restarted, then * we need to move the time when the clock was last * zero to a time that reflects the current settings. * For example, if the clock was stopped when the counter * was 52 and then later restarted, then lastZero * needs to be moved forward in time so that the 52 * reflects the current time. */ void adjust_zero(uint8_t currentCounter) { sim_time_t now = sim_time(); sim_time_t adjust = currentCounter; adjust = adjust << shiftFromScale(); adjust = clock_to_sim(adjust); lastZero = now - adjust; } sim_time_t clock_to_sim(sim_time_t t) { t *= sim_ticks_per_sec(); t /= notify_clockTicksPerSec(); return t; } sim_time_t sim_to_clock(sim_time_t t) { t *= notify_clockTicksPerSec(); t /= sim_ticks_per_sec(); return t; } uint16_t shiftFromScale() { uint8_t scale = call Timer0.getScale(); switch (scale) { case 0: return 0; case 1: return 0; case 2: return 3; case 3: return 5; case 4: return 6; case 5: return 7; case 6: return 8; case 7: return 10; default: return 255; } } sim_event_t* compare; void timer0_compare_handle(sim_event_t* evt) { dbg("HplAtm128Timer0AsyncP", "Beginning compare 0x%p at %s\n", evt, sim_time_string()); if (evt->cancelled) { return; } else { char timeStr[128]; sim_print_now(timeStr, 128); dbg("HplAtm128Timer0AsyncP", "Handling compare at 0x%p @ %s\n", evt, sim_time_string()); if (READ_BIT(ATM128_TCCR0, WGM01) && !READ_BIT(ATM128_TCCR0, WGM00)) { dbg("HplAtm128Timer0AsyncP", "%s: CTC is set, clear timer.\n", __FUNCTION__); call Timer0.set(0); } else { dbg("HplAtm128Timer0AsyncP", "%s: TCCR is 0x%hhx, %i, %i\n", __FUNCTION__, TCCR0, (int)READ_BIT(ATM128_TCCR0, WGM01), (int)READ_BIT(ATM128_TCCR0, WGM00)); } if (READ_BIT(ATM128_TIMSK, OCIE0)) { dbg("HplAtm128Timer0AsyncP", "TIFR is %hhx\n", TIFR); CLR_BIT(ATM128_TIFR, OCF0); dbg("HplAtm128Timer0AsyncP", "TIFR is %hhx\n", TIFR); dbg("HplAtm128Timer0AsyncP", "Compare interrupt @ %s\n", timeStr); SIG_OUTPUT_COMPARE0(); } else { SET_BIT(ATM128_TIFR, OCF0); } // If we haven't been cancelled if (!evt->cancelled) { configure_compare(evt); sim_queue_insert(evt); } } } sim_event_t* allocate_compare() { sim_event_t* newEvent = sim_queue_allocate_event(); dbg("HplAtm128Timer0AsyncP", "Allocated compare at 0x%p\n", newEvent); newEvent->handle = timer0_compare_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_compare(sim_event_t* evt) { sim_time_t compareTime = 0; sim_time_t phaseOffset = 0; uint8_t timerVal = call Timer0.get(); uint8_t compareVal = call Compare.get(); // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. compareTime = ((compareVal - timerVal) & 0xff); if (compareTime == 0) { compareTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. // The +1 is from the timer behavior: if you set OCR0 to be X, // it will actually fire when TCNT is X+1 compareTime = (compareTime + 1) << shiftFromScale(); compareTime = clock_to_sim(compareTime); compareTime += sim_time(); // How long into a timer tick was the clock actually reset? // This covers the case when the compare is set midway between // a tick, so it will go off a little early phaseOffset = sim_time(); phaseOffset -= last_zero(); phaseOffset %= clock_to_sim(1 << shiftFromScale()); compareTime -= phaseOffset; dbg("HplAtm128Timer0AsyncP", "Configuring new compare of %i for %i at time %llu (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time()); evt->time = compareTime; } void schedule_new_compare() { if (compare != NULL) { cancel_compare(); } if (call Timer0.getScale() != AVR_CLOCK_OFF) { sim_event_t* newEvent = allocate_compare(); configure_compare(newEvent); compare = newEvent; sim_queue_insert(newEvent); } } //=== Read the current timer value. =================================== async command uint8_t Timer0.get() { uint8_t rval; sim_time_t elapsed = sim_time() - last_zero(); elapsed = sim_to_clock(elapsed); elapsed = elapsed >> shiftFromScale(); rval = (uint8_t)(elapsed & 0xff); dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Getting timer: %hhu\n", rval); return rval; } //=== Set/clear the current timer value. ============================== /** * Set/clear the current timer value. * * This code is pretty tricky. */ async command void Timer0.set(uint8_t newVal) { uint8_t curVal = call Timer0.get(); dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Setting timer: %hhu\n", newVal); if (newVal == curVal) { return; } else { sim_time_t adjustment = curVal - newVal; adjustment = adjustment << shiftFromScale(); adjustment = clock_to_sim(adjustment); if (newVal < curVal) { lastZero += adjustment; } else { // newVal > curVal lastZero -= adjustment; } schedule_new_overflow(); notify_changed(); } } //=== Read the current timer scale. =================================== async command uint8_t Timer0.getScale() { return TCCR0 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer0.off() { call Timer0.setScale(AVR_CLOCK_OFF); savedCounter = call Timer0.get(); cancel_overflow(); notify_changed(); } //=== Write a new timer scale. ======================================== async command void Timer0.setScale(uint8_t s) { Atm128TimerControl_t ctrl; uint8_t currentScale = call Timer0.getScale(); uint8_t currentCounter; dbg("HplAtm128Timer0AsyncP", "Timer0 scale set to %i\n", (int)s); if (currentScale == 0) { currentCounter = savedCounter; } else { currentCounter = call Timer0.get(); } ctrl = call Timer0Ctrl.getControl(); ctrl.flat &= ~(0x7); ctrl.flat |= (s & 0x7); call Timer0Ctrl.setControl(ctrl); if (currentScale != s) { adjust_zero(currentCounter); schedule_new_overflow(); } notify_changed(); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t Timer0Ctrl.getControl() { return *(Atm128TimerControl_t*)&TCCR0; } //=== Write the control registers. ==================================== async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) { dbg("HplAtm128Timer0AsyncP", "Setting control to be 0x%hhx\n", x.flat); TCCR0 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() { Atm128_TIFR_t at; at.flat = TIFR; return at; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer0.reset() { // Clear TOV0. On real hardware, this is a write. TIFR &= ~(1 << TOV0); } async command void Timer0.start() { SET_BIT(ATM128_TIMSK, TOIE0); dbg("HplAtm128Timer0AsyncP", "Enabling TOIE0 at %llu\n", sim_time()); schedule_new_overflow(); } async command void Timer0.stop() { dbg("HplAtm128Timer0AsyncP", "Timer stopped @ %llu\n", sim_time()); CLR_BIT(ATM128_TIMSK, TOIE0); cancel_overflow(); } bool overflowed() { return READ_BIT(ATM128_TIFR, TOV0); } inline void stabiliseOverflow() { /* From the atmel manual: During asynchronous operation, the synchronization of the interrupt flags for the asynchronous timer takes three processor cycles plus one timer cycle. The timer is therefore advanced by at least one before the processor can read the timer value causing the setting of the interrupt flag. The output compare pin is changed on the timer clock and is not synchronized to the processor clock. So: if the timer is = 0, wait till it's = 1, except if - we're currently in the overflow interrupt handler - or, the overflow flag is already set */ //if (!inOverflow) // while (!TCNT0 && !overflowed()) //; } async command bool Timer0.test() { stabiliseOverflow(); return overflowed(); } async command bool Timer0.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.toie0; } async command void Compare.reset() { TIFR = 1 << OCF0; } async command void Compare.start() { SET_BIT(ATM128_TIMSK,OCIE0); } async command void Compare.stop() { CLR_BIT(ATM128_TIMSK,OCIE0); } async command bool Compare.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.ocf0; } async command bool Compare.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.ocie0; } //=== Read the compare registers. ===================================== async command uint8_t Compare.get() { dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Getting compare: %hhu\n", OCR0); return OCR0; } //=== Write the compare registers. ==================================== async command void Compare.set(uint8_t t) { dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Setting compare: %hhu\n", t); atomic { /* Re the comment above: it's a bad idea to wake up at time 0, as we'll just spin when setting the next deadline. Try and reduce the likelihood by delaying the interrupt... */ if (t == 0 || t >= 0xfe) t = 1; if (t != OCR0) { OCR0 = t; schedule_new_compare(); } } } sim_event_t* overflow; void timer0_overflow_handle(sim_event_t* evt) { if (evt->cancelled) { return; } else { if (READ_BIT(ATM128_TIMSK, TOIE0)) { CLR_BIT(ATM128_TIFR, TOV0); dbg("HplAtm128Timer0AsyncP", "Overflow interrupt at %s\n", sim_time_string()); SIG_OVERFLOW0(); } else { dbg("HplAtm128Timer0AsyncP", "Setting overflow bit at %s\n", sim_time_string()); SET_BIT(ATM128_TIFR, TOV0); } configure_overflow(evt); sim_queue_insert(evt); } } sim_event_t* allocate_overflow() { sim_event_t* newEvent = sim_queue_allocate_event(); newEvent->handle = timer0_overflow_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_overflow(sim_event_t* evt) { sim_time_t overflowTime = 0; uint8_t timerVal = call Timer0.get(); uint8_t overflowVal = 0; // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. overflowTime = ((overflowVal - timerVal) & 0xff); if (overflowTime == 0) { overflowTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. overflowTime = overflowTime << shiftFromScale(); overflowTime = clock_to_sim(overflowTime); overflowTime += sim_time(); overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale()); dbg("HplAtm128Timer0AsyncP", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime); evt->time = overflowTime; } void schedule_new_overflow() { sim_event_t* newEvent = allocate_overflow(); configure_overflow(newEvent); if (overflow != NULL) { cancel_overflow(); } overflow = newEvent; sim_queue_insert(newEvent); } void cancel_overflow() { if (overflow != NULL) { overflow->cancelled = 1; dbg("HplAtm128Timer0AsyncP", "Cancelling overflow %p.\n", overflow); overflow->cleanup = sim_queue_cleanup_total; } } async command Atm128Assr_t TimerAsync.getAssr() { return *(Atm128Assr_t *)&ASSR; } async command void TimerAsync.setAssr(Atm128Assr_t x) { ASSR = x.flat; } async command void TimerAsync.setTimer0Asynchronous() { ASSR |= 1 << AS0; } async command int TimerAsync.controlBusy() { return (ASSR & (1 << TCR0UB)) != 0; } async command int TimerAsync.compareBusy() { return (ASSR & (1 << OCR0UB)) != 0; } async command int TimerAsync.countBusy() { return (ASSR & (1 << TCN0UB)) != 0; } void cancel_compare() { dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare); if (compare != NULL) { compare->cancelled = 1; compare->cleanup = sim_queue_cleanup_total; } } } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/sim/HplAtm128Timer2C.nc000066400000000000000000000054331207233610700237550ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer2. It is built from a * timer-specific counter component and a generic compare * component. The counter component has an additional simulation-only * interface to let the compare component know when its state has * changed (e.g., TCNTX was set). * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Timer2C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include configuration HplAtm128Timer2C { provides { // 8-bit Timers interface HplAtm128Timer as Timer2; interface HplAtm128TimerCtrl8 as Timer2Ctrl; interface HplAtm128Compare as Compare2; } } implementation { components HplAtm128Counter0C, new HplAtm128CompareC(uint8_t, ATM128_OCR2, ATM128_TIMSK, OCIE2, ATM128_TIFR, OCF2); Timer2 = HplAtm128Counter2C; Timer2Ctrl = HplAtm128Counter2C; Compare2 = HplAtm128CompareC; HplAtm128CompareC.Timer -> HplAtm128Counter2C; HplAtm128CompareC.TimerCtrl -> HplAtm128Counter2C; HplAtm128CompareC.Notify -> HplAtm128Counter2C; } tinyos-2.1.2+dfsg/tos/chips/atm128/timer/sim/HplAtm128TimerNotify.nc000066400000000000000000000044731207233610700247640ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM-specific timer interface needed to notify when the state * of the underlying timer has changed. E.g., if a compare is built on top * of the timer, but someone sets the counter register, the compare will need * adjust its event timing. * * @date November 22 2005 * * @author Philip Levis */ // $Id: HplAtm128TimerNotify.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc, interface HplAtm128TimerNotify { /** * Signaled whenever the state of the counter has changed. Dependent * abstractions should recalculate. */ async event void changed(); /** * Basic utility function so the counter itself can specify the * ticks pps. */ async command sim_time_t clockTicksPerSec(); } tinyos-2.1.2+dfsg/tos/chips/atm1281/000077500000000000000000000000001207233610700167715ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm1281/HplAtm128GeneralIOC.nc000066400000000000000000000154161207233610700225730ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include /** * Provide GeneralIO interfaces for all of the ATmega128's pins. * * @author Martin Turon */ configuration HplAtm128GeneralIOC { // provides all the ports as raw ports provides { interface GeneralIO as PortA0; interface GeneralIO as PortA1; interface GeneralIO as PortA2; interface GeneralIO as PortA3; interface GeneralIO as PortA4; interface GeneralIO as PortA5; interface GeneralIO as PortA6; interface GeneralIO as PortA7; interface GeneralIO as PortB0; interface GeneralIO as PortB1; interface GeneralIO as PortB2; interface GeneralIO as PortB3; interface GeneralIO as PortB4; interface GeneralIO as PortB5; interface GeneralIO as PortB6; interface GeneralIO as PortB7; interface GeneralIO as PortC0; interface GeneralIO as PortC1; interface GeneralIO as PortC2; interface GeneralIO as PortC3; interface GeneralIO as PortC4; interface GeneralIO as PortC5; interface GeneralIO as PortC6; interface GeneralIO as PortC7; interface GeneralIO as PortD0; interface GeneralIO as PortD1; interface GeneralIO as PortD2; interface GeneralIO as PortD3; interface GeneralIO as PortD4; interface GeneralIO as PortD5; interface GeneralIO as PortD6; interface GeneralIO as PortD7; interface GeneralIO as PortE0; interface GeneralIO as PortE1; interface GeneralIO as PortE2; interface GeneralIO as PortE3; interface GeneralIO as PortE4; interface GeneralIO as PortE5; interface GeneralIO as PortE6; interface GeneralIO as PortE7; interface GeneralIO as PortF0; interface GeneralIO as PortF1; interface GeneralIO as PortF2; interface GeneralIO as PortF3; interface GeneralIO as PortF4; interface GeneralIO as PortF5; interface GeneralIO as PortF6; interface GeneralIO as PortF7; interface GeneralIO as PortG0; interface GeneralIO as PortG1; interface GeneralIO as PortG2; interface GeneralIO as PortG3; interface GeneralIO as PortG4; interface GeneralIO as PortG5; } } implementation { components new HplAtm128GeneralIOPortP((uint8_t)&PORTA, (uint8_t)&DDRA, (uint8_t)&PINA) as PortA, new HplAtm128GeneralIOPortP((uint8_t)&PORTB, (uint8_t)&DDRB, (uint8_t)&PINB) as PortB, new HplAtm128GeneralIOPortP((uint8_t)&PORTC, (uint8_t)&DDRC, (uint8_t)&PINC) as PortC, new HplAtm128GeneralIOPortP((uint8_t)&PORTD, (uint8_t)&DDRD, (uint8_t)&PIND) as PortD, new HplAtm128GeneralIOPortP((uint8_t)&PORTE, (uint8_t)&DDRE, (uint8_t)&PINE) as PortE, new HplAtm128GeneralIOPortP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF) as PortF, // PortF cannot use sbi, cbi new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 0) as F0, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 1) as F1, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 2) as F2, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 3) as F3, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 4) as F4, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 5) as F5, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 6) as F6, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 7) as F7, // PortG only exposes 5 bits and cannot use sbi, cbi new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 0) as G0, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 1) as G1, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 2) as G2, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 3) as G3, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 4) as G4, new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 5) as G5 ; PortA0 = PortA.Pin0; PortA1 = PortA.Pin1; PortA2 = PortA.Pin2; PortA3 = PortA.Pin3; PortA4 = PortA.Pin4; PortA5 = PortA.Pin5; PortA6 = PortA.Pin6; PortA7 = PortA.Pin7; PortB0 = PortB.Pin0; PortB1 = PortB.Pin1; PortB2 = PortB.Pin2; PortB3 = PortB.Pin3; PortB4 = PortB.Pin4; PortB5 = PortB.Pin5; PortB6 = PortB.Pin6; PortB7 = PortB.Pin7; PortC0 = PortC.Pin0; PortC1 = PortC.Pin1; PortC2 = PortC.Pin2; PortC3 = PortC.Pin3; PortC4 = PortC.Pin4; PortC5 = PortC.Pin5; PortC6 = PortC.Pin6; PortC7 = PortC.Pin7; PortD0 = PortD.Pin0; PortD1 = PortD.Pin1; PortD2 = PortD.Pin2; PortD3 = PortD.Pin3; PortD4 = PortD.Pin4; PortD5 = PortD.Pin5; PortD6 = PortD.Pin6; PortD7 = PortD.Pin7; PortE0 = PortE.Pin0; PortE1 = PortE.Pin1; PortE2 = PortE.Pin2; PortE3 = PortE.Pin3; PortE4 = PortE.Pin4; PortE5 = PortE.Pin5; PortE6 = PortE.Pin6; PortE7 = PortE.Pin7; PortF0 = PortF.Pin0; PortF1 = PortF.Pin1; PortF2 = PortF.Pin2; PortF3 = PortF.Pin3; PortF4 = PortF.Pin4; PortF5 = PortF.Pin5; PortF6 = PortF.Pin6; PortF7 = PortF.Pin7; PortG0 = G0; PortG1 = G1; PortG2 = G2; PortG3 = G3; PortG4 = G4; PortG5 = G5; } tinyos-2.1.2+dfsg/tos/chips/atm1281/HplAtm128UartP.nc000066400000000000000000000235671207233610700217240ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:43 $ */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Private component of the Atmega1281 serial port HPL. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ #include module HplAtm128UartP { provides interface Init as Uart0Init; provides interface StdControl as Uart0TxControl; provides interface StdControl as Uart0RxControl; provides interface HplAtm128Uart as HplUart0; provides interface Init as Uart1Init; provides interface StdControl as Uart1TxControl; provides interface StdControl as Uart1RxControl; provides interface HplAtm128Uart as HplUart1; uses interface Atm128Calibrate; uses interface McuPowerState; } implementation { //=== Uart Init Commands. ==================================== command error_t Uart0Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr0; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR0L = ubrr0; UBRR0H = ubrr0 >> 8; UCSR0A = stts.flat; UCSR0C = mode.flat; UCSR0B = ctrl.flat; return SUCCESS; } command error_t Uart0TxControl.start() { SET_BIT(UCSR0B, TXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0TxControl.stop() { CLR_BIT(UCSR0B, TXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.start() { SET_BIT(UCSR0B, RXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.stop() { CLR_BIT(UCSR0B, RXEN0); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart0.enableTxIntr() { SET_BIT(UCSR0A, TXC0); SET_BIT(UCSR0B, TXCIE0); return SUCCESS; } async command error_t HplUart0.disableTxIntr(){ CLR_BIT(UCSR0B, TXCIE0); return SUCCESS; } async command error_t HplUart0.enableRxIntr(){ SET_BIT(UCSR0B, RXCIE0); return SUCCESS; } async command error_t HplUart0.disableRxIntr(){ CLR_BIT(UCSR0B, RXCIE0); return SUCCESS; } async command bool HplUart0.isTxEmpty(){ return READ_BIT(UCSR0A, TXC0); } async command bool HplUart0.isRxEmpty(){ return !READ_BIT(UCSR0A, RXC0); } async command uint8_t HplUart0.rx(){ return UDR0; } async command void HplUart0.tx(uint8_t data) { atomic{ UDR0 = data; SET_BIT(UCSR0A, TXC0); } } AVR_ATOMIC_HANDLER(SIG_USART0_RECV) { if (READ_BIT(UCSR0A, RXC0)) { signal HplUart0.rxDone(UDR0); } } AVR_NONATOMIC_HANDLER(SIG_USART0_TRANS) { signal HplUart0.txDone(); } command error_t Uart1Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr1; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR1L = ubrr1; UBRR1H = ubrr1 >> 8; UCSR1A = stts.flat; UCSR1C = mode.flat; UCSR1B = ctrl.flat; return SUCCESS; } command error_t Uart1TxControl.start() { SET_BIT(UCSR1B, TXEN1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1TxControl.stop() { CLR_BIT(UCSR1B, TXEN1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.start() { SET_BIT(UCSR1B, RXEN1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.stop() { CLR_BIT(UCSR1B, RXEN1); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart1.enableTxIntr() { SET_BIT(UCSR1A, TXC1); SET_BIT(UCSR1B, TXCIE1); return SUCCESS; } async command error_t HplUart1.disableTxIntr(){ CLR_BIT(UCSR1B, TXCIE1); return SUCCESS; } async command error_t HplUart1.enableRxIntr(){ SET_BIT(UCSR1B, RXCIE1); return SUCCESS; } async command error_t HplUart1.disableRxIntr(){ CLR_BIT(UCSR1B, RXCIE1); return SUCCESS; } async command bool HplUart1.isTxEmpty() { return READ_BIT(UCSR1A, TXC1); } async command bool HplUart1.isRxEmpty() { return !READ_BIT(UCSR1A, RXC1); } async command uint8_t HplUart1.rx(){ return UDR1; } async command void HplUart1.tx(uint8_t data) { atomic{ UDR1 = data; SET_BIT(UCSR1A, TXC1); } } AVR_ATOMIC_HANDLER(SIG_USART1_RECV) { if (READ_BIT(UCSR1A, RXC1)) signal HplUart1.rxDone(UDR1); } AVR_NONATOMIC_HANDLER(SIG_USART1_TRANS) { signal HplUart1.txDone(); } default async event void HplUart0.txDone() {} default async event void HplUart0.rxDone(uint8_t data) {} default async event void HplUart1.txDone() {} default async event void HplUart1.rxDone(uint8_t data) {} } tinyos-2.1.2+dfsg/tos/chips/atm1281/McuSleepC.nc000066400000000000000000000140321207233610700211330ustar00rootroot00000000000000/// $Id: McuSleepC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Implementation of TEP 112 (Microcontroller Power Management) for * the Atmega128. Power state calculation code copied from Rob * Szewczyk's 1.x code in HPLPowerManagementM.nc. * * 
     *  $Id: McuSleepC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
 *
    * * @author Philip Levis * @author Robert Szewczyk * @author Janos Sallai * @date October 30, 2007 */ module McuSleepC @safe() { provides { interface McuSleep; interface McuPowerState; } uses { interface McuPowerOverride; } } implementation { /* There is no dirty bit management because the sleep mode depends on the amount of time remaining in timer2. */ /* Note that the power values are maintained in an order * based on their active components, NOT on their values. * Look at atm1281hardware.h and page 54 of the ATmeg1281 * manual (Table 25).*/ const_uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = { 0, (1 << SM0), (1 << SM2) | (1 << SM1) | (1 << SM0), (1 << SM1) | (1 << SM0), (1 << SM2) | (1 << SM1), (1 << SM1)}; mcu_power_t getPowerState() { // Note: we go to sleep even if timer 0, 1, 3, 4, or 5's overflow // interrupt is enabled - this allows using timers 0, 1 and 3 as TinyOS // "Alarm"s while still having power management. (see TEP102 Appendix C) // Input capture and output compare for timer 4 and 5 are not functional // on the atm1281. // Are there any input capture or output compare interrupts enabled // for timers 0, 1 or 3? if ( TIMSK0 & (1 << OCIE0A | 1 << OCIE0B ) || TIMSK1 & (1 << ICIE1 | 1 << OCIE1A | 1 << OCIE1B | 1 << OCIE1C) || TIMSK3 & (1 << ICIE3 | 1 << OCIE3A | 1 << OCIE3B | 1 << OCIE3C) ) { return ATM128_POWER_IDLE; } // SPI (Radio stack) else if (bit_is_set(SPCR, SPIE)) { return ATM128_POWER_IDLE; } // UARTs are active else if (UCSR0B & (1 << TXEN0 | 1 << RXEN0)) { // UART return ATM128_POWER_IDLE; } else if (UCSR1B & (1 << TXEN1 | 1 << RXEN1)) { // UART return ATM128_POWER_IDLE; } // I2C (Two-wire) is active else if (bit_is_set(TWCR, TWEN)){ return ATM128_POWER_IDLE; } // ADC is enabled else if (bit_is_set(ADCSRA, ADEN)) { return ATM128_POWER_ADC_NR; } else { return ATM128_POWER_DOWN; } } async command void McuSleep.sleep() { uint8_t powerState; powerState = mcombine(getPowerState(), call McuPowerOverride.lowestState()); SMCR = (SMCR & 0xf0) | 1 << SE | read_uint8_t(&atm128PowerBits[powerState]); sei(); // All of memory may change at this point... asm volatile ("sleep" : : : "memory"); cli(); CLR_BIT(SMCR, SE); } async command void McuPowerState.update() { } default async command mcu_power_t McuPowerOverride.lowestState() { return ATM128_POWER_DOWN; } } tinyos-2.1.2+dfsg/tos/chips/atm1281/adc/000077500000000000000000000000001207233610700175205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm1281/adc/AdcP.nc000066400000000000000000000112731207233610700206550ustar00rootroot00000000000000/* $Id: AdcP.nc,v 1.6 2008-06-26 04:39:03 regehr Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Convert ATmega128 HAL A/D interface to the HIL interfaces. * @author David Gay * @author Jan Hauer */ #include "Timer.h" module AdcP @safe() { provides { interface Read[uint8_t client]; interface ReadNow[uint8_t client]; } uses { interface Atm128AdcSingle; interface Atm128AdcConfig[uint8_t client]; interface BusyWait; } } implementation { enum { IDLE, ACQUIRE_DATA, ACQUIRE_DATA_NOW, }; /* Resource reservation is required, and it's incorrect to call getData again before dataReady is signaled, so there are no races in correct programs */ norace uint8_t state; norace uint8_t client; norace uint16_t val; uint8_t channel() { return call Atm128AdcConfig.getChannel[client](); } uint8_t refVoltage() { return call Atm128AdcConfig.getRefVoltage[client](); } uint8_t prescaler() { return call Atm128AdcConfig.getPrescaler[client](); } void sample() { call Atm128AdcSingle.getData(channel(), refVoltage(), FALSE, prescaler()); } error_t startGet(uint8_t newState, uint8_t newClient) { /* Note: we retry imprecise results in dataReady */ state = newState; client = newClient; sample(); return SUCCESS; } command error_t Read.read[uint8_t c]() { return startGet(ACQUIRE_DATA, c); } async command error_t ReadNow.read[uint8_t c]() { return startGet(ACQUIRE_DATA_NOW, c); } task void acquiredData() { state = IDLE; signal Read.readDone[client](SUCCESS, val); } async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) { switch (state) { case ACQUIRE_DATA: if (!precise) { // the stage may take up to 125us to stabilize after channel change call BusyWait.wait(125); sample(); } else { val = data; post acquiredData(); } break; case ACQUIRE_DATA_NOW: if (!precise) { // the stage may take up to 125us to stabilize after channel change call BusyWait.wait(125); sample(); } else { state = IDLE; signal ReadNow.readDone[client](SUCCESS, data); } break; default: break; } } /* Configuration defaults. Read ground fast! ;-) */ default async command uint8_t Atm128AdcConfig.getChannel[uint8_t c]() { return ATM128_ADC_SNGL_GND; } default async command uint8_t Atm128AdcConfig.getRefVoltage[uint8_t c]() { return ATM128_ADC_VREF_OFF; } default async command uint8_t Atm128AdcConfig.getPrescaler[uint8_t c]() { return ATM128_ADC_PRESCALE_2; } default event void Read.readDone[uint8_t c](error_t e, uint16_t d) { } default async event void ReadNow.readDone[uint8_t c](error_t e, uint16_t d) { } } tinyos-2.1.2+dfsg/tos/chips/atm1281/adc/Atm128Adc.h000066400000000000000000000161321207233610700212600ustar00rootroot00000000000000// $Id: Atm128Adc.h,v 1.3 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon // @author Hu Siquan /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ // @author Janos Sallai /* Updated chips/atm128 to include atm1281's ADCSRB register. */ #ifndef _H_Atm128ADC_h #define _H_Atm128ADC_h //================== 8 channel 10-bit ADC ============================== /* Voltage Reference Settings */ enum { ATM128_ADC_VREF_OFF = 0, //!< VR+ = AREF and VR- = GND ATM128_ADC_VREF_AVCC = 1,//!< VR+ = AVcc and VR- = GND ATM128_ADC_VREF_1_1 = 2, //!< VR+ = 1.1V and VR- = GND ATM128_ADC_VREF_2_56 = 3,//!< VR+ = 2.56V and VR- = GND }; /* Voltage Reference Settings */ enum { ATM128_ADC_RIGHT_ADJUST = 0, ATM128_ADC_LEFT_ADJUST = 1, }; /* ADC Multiplexer Settings */ enum { ATM128_ADC_SNGL_ADC0 = 0, ATM128_ADC_SNGL_ADC1, ATM128_ADC_SNGL_ADC2, ATM128_ADC_SNGL_ADC3, ATM128_ADC_SNGL_ADC4, ATM128_ADC_SNGL_ADC5, ATM128_ADC_SNGL_ADC6, ATM128_ADC_SNGL_ADC7, ATM128_ADC_DIFF_ADC00_10x, ATM128_ADC_DIFF_ADC10_10x, ATM128_ADC_DIFF_ADC00_200x, ATM128_ADC_DIFF_ADC10_200x, ATM128_ADC_DIFF_ADC22_10x, ATM128_ADC_DIFF_ADC32_10x, ATM128_ADC_DIFF_ADC22_200x, ATM128_ADC_DIFF_ADC32_200x, ATM128_ADC_DIFF_ADC01_1x, ATM128_ADC_DIFF_ADC11_1x, ATM128_ADC_DIFF_ADC21_1x, ATM128_ADC_DIFF_ADC31_1x, ATM128_ADC_DIFF_ADC41_1x, ATM128_ADC_DIFF_ADC51_1x, ATM128_ADC_DIFF_ADC61_1x, ATM128_ADC_DIFF_ADC71_1x, ATM128_ADC_DIFF_ADC02_1x, ATM128_ADC_DIFF_ADC12_1x, ATM128_ADC_DIFF_ADC22_1x, ATM128_ADC_DIFF_ADC32_1x, ATM128_ADC_DIFF_ADC42_1x, ATM128_ADC_DIFF_ADC52_1x, ATM128_ADC_SNGL_1_23, ATM128_ADC_SNGL_GND, }; /* ADC Multiplexer Selection Register */ typedef struct { uint8_t mux : 5; //!< Analog Channel and Gain Selection Bits uint8_t adlar : 1; //!< ADC Left Adjust Result uint8_t refs : 2; //!< Reference Selection Bits } Atm128Admux_t; /* ADC Prescaler Settings */ /* Note: each platform must define ATM128_ADC_PRESCALE to the smallest prescaler which guarantees full A/D precision. */ enum { ATM128_ADC_PRESCALE_2 = 0, ATM128_ADC_PRESCALE_2b, ATM128_ADC_PRESCALE_4, ATM128_ADC_PRESCALE_8, ATM128_ADC_PRESCALE_16, ATM128_ADC_PRESCALE_32, ATM128_ADC_PRESCALE_64, ATM128_ADC_PRESCALE_128, // This special value is used to ask the platform for the prescaler // which gives full precision. ATM128_ADC_PRESCALE }; /* ADC Enable Settings */ enum { ATM128_ADC_ENABLE_OFF = 0, ATM128_ADC_ENABLE_ON, }; /* ADC Start Conversion Settings */ enum { ATM128_ADC_START_CONVERSION_OFF = 0, ATM128_ADC_START_CONVERSION_ON, }; /* ADC Free Running Select Settings */ enum { ATM128_ADC_FREE_RUNNING_OFF = 0, ATM128_ADC_FREE_RUNNING_ON, }; /* ADC Interrupt Flag Settings */ enum { ATM128_ADC_INT_FLAG_OFF = 0, ATM128_ADC_INT_FLAG_ON, }; /* ADC Interrupt Enable Settings */ enum { ATM128_ADC_INT_ENABLE_OFF = 0, ATM128_ADC_INT_ENABLE_ON, }; /* ADC Multiplexer Selection Register */ typedef struct { uint8_t adps : 3; //!< ADC Prescaler Select Bits uint8_t adie : 1; //!< ADC Interrupt Enable uint8_t adif : 1; //!< ADC Interrupt Flag uint8_t adate : 1; //!< ADC Auto Trigger Enable uint8_t adsc : 1; //!< ADC Start Conversion uint8_t aden : 1; //!< ADC Enable } Atm128Adcsra_t; /* ADC Multiplexer Selection Register */ typedef struct { uint8_t adts : 3; //!< ADC Trigger Select uint8_t mux5 : 1; //!< Analog Channel and Gain Selection Bit uint8_t resv1 : 2; //!< Reserved uint8_t acme : 1; //!< Analog Comparator Multiplexer Enable uint8_t resv2 : 1; //!< Reserved } Atm128Adcsrb_t; typedef uint8_t Atm128_ADCH_t; //!< ADC data register high typedef uint8_t Atm128_ADCL_t; //!< ADC data register low // The resource identifier string for the ADC subsystem #define UQ_ATM128ADC_RESOURCE "atm128adc.resource" #endif //_H_Atm128ADC_h tinyos-2.1.2+dfsg/tos/chips/atm1281/adc/Atm128AdcP.nc000066400000000000000000000163301207233610700215510ustar00rootroot00000000000000/* $Id: Atm128AdcP.nc,v 1.3 2010-06-29 22:07:43 scipio Exp $ * * Copyright (c) 2000-2003 The Regents of the University of California. * Copyright (c) 2002-2005 Intel Corporation. * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2007, Vanderbilt University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * Internal component of the Atmega1281 A/D HAL. * * @author Jason Hill * @author David Gay * @author Philip Levis * @author Phil Buonadonna * @author Hu Siquan * @author Janos Sallai */ module Atm128AdcP @safe() { provides { interface Init; interface AsyncStdControl; interface Atm128AdcSingle; interface Atm128AdcMultiple; } uses { interface HplAtm128Adc; interface Atm128Calibrate; } } implementation { /* State for the current and next (multiple-sampling only) conversion */ struct { bool multiple : 1; /* single and multiple-sampling mode */ bool precise : 1; /* is this result going to be precise? */ uint8_t channel : 5; /* what channel did this sample come from? */ } f, nextF; command error_t Init.init() { atomic { Atm128Adcsra_t adcsr; adcsr.aden = ATM128_ADC_ENABLE_OFF; adcsr.adsc = ATM128_ADC_START_CONVERSION_OFF; adcsr.adate= ATM128_ADC_FREE_RUNNING_OFF; adcsr.adif = ATM128_ADC_INT_FLAG_OFF; adcsr.adie = ATM128_ADC_INT_ENABLE_OFF; adcsr.adps = ATM128_ADC_PRESCALE_2; call HplAtm128Adc.setAdcsra(adcsr); } return SUCCESS; } /* We enable the A/D when start is called, and disable it when stop is called. This drops A/D conversion latency by a factor of two (but increases idle mode power consumption a little). */ async command error_t AsyncStdControl.start() { atomic call HplAtm128Adc.enableAdc(); return SUCCESS; } async command error_t AsyncStdControl.stop() { atomic call HplAtm128Adc.disableAdc(); return SUCCESS; } /* Return TRUE if switching to 'channel' with reference voltage 'refVoltage' will give a precise result (the first sample after changing reference voltage or switching to/between a differential channel is imprecise) */ inline bool isPrecise(Atm128Admux_t admux, uint8_t channel, uint8_t refVoltage) { return ((refVoltage == admux.refs) && (channel == admux.mux)); } async event void HplAtm128Adc.dataReady(uint16_t data) { bool precise, multiple; uint8_t channel; atomic { channel = f.channel; precise = f.precise; multiple = f.multiple; } if (!multiple) { /* A single sample. Disable the ADC interrupt to avoid starting a new sample at the next "sleep" instruction. */ call HplAtm128Adc.disableInterruption(); signal Atm128AdcSingle.dataReady(data, precise); } else { /* Multiple sampling. The user can: - tell us to stop sampling - or, to continue sampling on a new channel, possibly with a new reference voltage; however this change applies not to the next sample (the hardware has already started working on that), but on the one after. */ bool cont; uint8_t nextChannel, nextVoltage; Atm128Admux_t admux; atomic { admux = call HplAtm128Adc.getAdmux(); nextVoltage = admux.refs; nextChannel = admux.mux; } cont = signal Atm128AdcMultiple.dataReady(data, precise, channel, &nextChannel, &nextVoltage); atomic if (cont) { /* Switch channels and update our internal channel+precision tracking state (f and nextF). Note that this tracking will be incorrect if we take too long to get to this point. */ admux.refs = nextVoltage; admux.mux = nextChannel; call HplAtm128Adc.setAdmux(admux); f = nextF; nextF.channel = nextChannel; nextF.precise = isPrecise(admux, nextChannel, nextVoltage); } else call HplAtm128Adc.cancel(); } } /* Start sampling based on request parameters */ void getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { Atm128Admux_t admux; Atm128Adcsra_t adcsr; admux = call HplAtm128Adc.getAdmux(); f.precise = isPrecise(admux, channel, refVoltage); f.channel = channel; admux.refs = refVoltage; admux.adlar = leftJustify; admux.mux = channel; call HplAtm128Adc.setAdmux(admux); adcsr.aden = ATM128_ADC_ENABLE_ON; adcsr.adsc = ATM128_ADC_START_CONVERSION_ON; adcsr.adate= f.multiple; adcsr.adif = ATM128_ADC_INT_FLAG_ON; // clear any stale flag adcsr.adie = ATM128_ADC_INT_ENABLE_ON; if (prescaler == ATM128_ADC_PRESCALE) prescaler = call Atm128Calibrate.adcPrescaler(); adcsr.adps = prescaler; call HplAtm128Adc.setAdcsra(adcsr); } async command bool Atm128AdcSingle.getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { atomic { f.multiple = FALSE; getData(channel, refVoltage, leftJustify, prescaler); return f.precise; } } async command bool Atm128AdcSingle.cancel() { /* There is no Atm128AdcMultiple.cancel, for reasons discussed in that interface */ return call HplAtm128Adc.cancel(); } async command bool Atm128AdcMultiple.getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { atomic { f.multiple = TRUE; getData(channel, refVoltage, leftJustify, prescaler); nextF = f; /* We assume the 2nd sample is precise */ nextF.precise = TRUE; return f.precise; } } default async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) { } default async event bool Atm128AdcMultiple.dataReady(uint16_t data, bool precise, uint8_t channel, uint8_t *newChannel, uint8_t *newRefVoltage) { return FALSE; // stop conversion if we somehow end up here. } } tinyos-2.1.2+dfsg/tos/chips/atm1281/adc/HplAtm128AdcP.nc000066400000000000000000000121761207233610700222210ustar00rootroot00000000000000/// $Id: HplAtm128AdcP.nc,v 1.3 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL for the Atmega1281 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay * @author Janos Sallai */ module HplAtm128AdcP @safe() { provides interface HplAtm128Adc; uses interface McuPowerState; } implementation { //=== Direct read of HW registers. ================================= async command Atm128Admux_t HplAtm128Adc.getAdmux() { return *(Atm128Admux_t*)&ADMUX; } async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { return *(Atm128Adcsra_t*)&ADCSRA; } async command uint16_t HplAtm128Adc.getValue() { return ADC; } DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t); DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t); //=== Direct write of HW registers. ================================ async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) { ADMUX = Admux2int(x); } async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { ADCSRA = Adcsra2int(x); } async command void HplAtm128Adc.setPrescaler(uint8_t scale){ Atm128Adcsra_t current_val = call HplAtm128Adc.getAdcsra(); current_val.adif = FALSE; current_val.adps = scale; call HplAtm128Adc.setAdcsra(current_val); } // Individual bit manipulation. These all clear any pending A/D interrupt. // It's not clear these are that useful... async command void HplAtm128Adc.enableAdc() { SET_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.disableAdc() { CLR_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.setContinuous() { ((Atm128Adcsrb_t*)&ADCSRB)->adts = 0; SET_BIT(ADCSRA, ADATE); } async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADATE); } async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); } async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); } /* A/D status checks */ async command bool HplAtm128Adc.isEnabled() { return (call HplAtm128Adc.getAdcsra()).aden; } async command bool HplAtm128Adc.isStarted() { return (call HplAtm128Adc.getAdcsra()).adsc; } async command bool HplAtm128Adc.isComplete() { return (call HplAtm128Adc.getAdcsra()).adif; } /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */ AVR_ATOMIC_HANDLER(SIG_ADC) { uint16_t data = call HplAtm128Adc.getValue(); __nesc_enable_interrupt(); signal HplAtm128Adc.dataReady(data); } default async event void HplAtm128Adc.dataReady(uint16_t done) { } async command bool HplAtm128Adc.cancel() { /* This is tricky */ atomic { Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr; /* To cancel a conversion, first turn off ADEN, then turn off ADSC. We also cancel any pending interrupt. Finally we reenable the ADC. */ newSr = oldSr; newSr.aden = FALSE; newSr.adif = TRUE; /* This clears a pending interrupt... */ newSr.adie = FALSE; /* We don't want to start sampling again at the next sleep */ call HplAtm128Adc.setAdcsra(newSr); newSr.adsc = FALSE; call HplAtm128Adc.setAdcsra(newSr); newSr.aden = TRUE; call HplAtm128Adc.setAdcsra(newSr); return oldSr.adif || oldSr.adsc; } } } tinyos-2.1.2+dfsg/tos/chips/atm1281/adc/WireAdcP.nc000066400000000000000000000021551207233610700215030ustar00rootroot00000000000000/* $Id: WireAdcP.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Support component for AdcReadClientC and AdcReadNowClientC. * * @author David Gay * @author Janos Sallai */ configuration WireAdcP { provides { interface Read[uint8_t client]; interface ReadNow[uint8_t client]; } uses { interface Atm128AdcConfig[uint8_t client]; interface Resource[uint8_t client]; } } implementation { components Atm128AdcC, AdcP, BusyWaitMicroC, new ArbitratedReadC(uint16_t) as ArbitrateRead; Read = ArbitrateRead; ReadNow = AdcP; Resource = ArbitrateRead.Resource; Atm128AdcConfig = AdcP; ArbitrateRead.Service -> AdcP.Read; AdcP.Atm128AdcSingle -> Atm128AdcC; AdcP.BusyWait -> BusyWaitMicroC; } tinyos-2.1.2+dfsg/tos/chips/atm1281/atm128hardware.h000066400000000000000000000153051207233610700217000ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2002-2003 Intel Corporation. * Copyright (c) 2000-2003 The Regents of the University of California. * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Updated chips/atm128/atm128hardware.h with atm1281's MCU status and * memory control registers. * * @author Janos Sallai, Martin Turon, Jason Hill, Philip Levis, Nelson Lee, David Gay */ #ifndef _H_atmega128hardware_H #define _H_atmega128hardware_H #include #if __AVR_LIBC_VERSION__ >= 10400UL #include #else #include #include #endif #include #include #include "atm128const.h" /* We need slightly different defs than SIGNAL, INTERRUPT */ #define AVR_ATOMIC_HANDLER(signame) \ void signame() __attribute__ ((signal)) @atomic_hwevent() @C() #define AVR_NONATOMIC_HANDLER(signame) \ void signame() __attribute__ ((interrupt)) @hwevent() @C() /* Macro to create union casting functions. */ #define DEFINE_UNION_CAST(func_name, from_type, to_type) \ to_type func_name(from_type x) { \ union {from_type f; to_type t;} c = {f:x}; return c.t; } // Bit operators using bit number #define SET_BIT(port, bit) ((port) |= _BV(bit)) #define CLR_BIT(port, bit) ((port) &= ~_BV(bit)) #define READ_BIT(port, bit) (((port) & _BV(bit)) != 0) #define FLIP_BIT(port, bit) ((port) ^= _BV(bit)) #define WRITE_BIT(port, bit, value) \ if (value) SET_BIT((port), (bit)); \ else CLR_BIT((port), (bit)) // Bit operators using bit flag mask #define SET_FLAG(port, flag) ((port) |= (flag)) #define CLR_FLAG(port, flag) ((port) &= ~(flag)) #define READ_FLAG(port, flag) ((port) & (flag)) /* Enables interrupts. */ inline void __nesc_enable_interrupt() @safe() { sei(); } /* Disables all interrupts. */ inline void __nesc_disable_interrupt() @safe() { cli(); } /* Defines data type for storing interrupt mask state during atomic. */ typedef uint8_t __nesc_atomic_t; __nesc_atomic_t __nesc_atomic_start(void); void __nesc_atomic_end(__nesc_atomic_t original_SREG); #ifndef NESC_BUILD_BINARY /* @spontaneous() functions should not be included when NESC_BUILD_BINARY is #defined, to avoid duplicate functions definitions wheb binary components are used. Such functions do need a prototype in all cases, though. */ /* Saves current interrupt mask state and disables interrupts. */ inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { __nesc_atomic_t result = SREG; __nesc_disable_interrupt(); asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ return result; } /* Restores interrupt mask to original state. */ inline void __nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous() @safe() { asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ SREG = original_SREG; } #endif /* Defines the mcu_power_t type for atm128 power management. */ typedef uint8_t mcu_power_t @combine("mcombine"); enum { ATM128_POWER_IDLE = 0, ATM128_POWER_ADC_NR = 1, ATM128_POWER_EXT_STANDBY = 2, ATM128_POWER_SAVE = 3, ATM128_POWER_STANDBY = 4, ATM128_POWER_DOWN = 5, }; /* Combine function. */ mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() { return (m1 < m2)? m1: m2; } /* MCU Status Register*/ typedef struct { uint8_t porf : 1; //!< Power-on Reset Flag uint8_t extrf : 1; //!< External Reset Flag uint8_t borf : 1; //!< Brown-out Reset Flag uint8_t wdrf : 1; //!< Watchdog Reset Flag uint8_t jtrf : 1; //!< JTAG Reset Flag uint8_t resv1 : 3; //!< Reserved } Atm128_MCUSR_t; /* External Memory Control Register A*/ typedef struct { uint8_t srw00 : 1; //!< Wait-state Select Bits for Lower Sector uint8_t srw01 : 1; //!< Wait-state Select Bits for Lower Sector uint8_t srw10 : 1; //!< Wait-state Select Bits for Upper Sector uint8_t srw11 : 1; //!< Wait-state Select Bits for Upper Sector uint8_t srl : 3; //!< Wait-state Sector Limit uint8_t sre : 1; //!< External SRAM/XMEM Enable } Atm128_XMCRA_t; /* External Memory Control Register B*/ typedef struct { uint8_t xmm : 3; //!< External Memory High Mask uint8_t resv1 : 4; //!< Reserved uint8_t xmbk : 1; //!< External Memory Bus-keeper Enable } Atm128_XMCRB_t; /* Floating-point network-type support. These functions must convert to/from a 32-bit big-endian integer that follows the layout of Java's java.lang.float.floatToRawIntBits method. Conveniently, for the AVR family, this is a straight byte copy... */ typedef float nx_float __attribute__((nx_base_be(afloat))); inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() { float f; memcpy(&f, source, sizeof(float)); return f; } inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() { memcpy(target, &value, sizeof(float)); return value; } #endif //_H_atmega128hardware_H tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/000077500000000000000000000000001207233610700201115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/Atm1281AlarmAsyncP.nc000066400000000000000000000200471207233610700235660ustar00rootroot00000000000000// $Id: Atm1281AlarmAsyncP.nc,v 1.3 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Build a 32-bit alarm and counter from the atmega1281's 8-bit timer 2 * in asynchronous mode. Attempting to use the generic Atm128AlarmC * component and the generic timer components runs into problems * apparently related to letting timer 2 overflow. * * So, instead, this version (inspired by the 1.x code and a remark from * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 2 * and never lets timer 2 overflow. * * @author David Gay * @author Janos Sallai */ generic module Atm1281AlarmAsyncP(typedef precision, int divider) @safe() { provides { interface Init; interface Alarm; interface Counter; } uses { interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { uint8_t set; /* Is the alarm set? */ uint32_t t0, dt; /* Time of the next alarm */ norace uint32_t base; /* base+TCNT2 is the current time if no interrupt is pending. See Counter.get() for the full details. */ enum { MINDT = 2, /* Minimum interval between interrupts */ MAXT = 230 /* Maximum value to let timer 2 reach (from Joe Polastre and Robert Szewczyk's painful experiences with the 1.x timer ;-)) */ }; void setInterrupt(); /* Configure timer 2 */ command error_t Init.init() { atomic { Atm128_TCCR2A_t x; Atm128_TCCR2B_t y; call TimerAsync.setTimer2Asynchronous(); x.flat = 0; x.bits.wgm21 = 1; /* We use the clear-on-compare mode */ call TimerCtrl.setControlA(x.flat); y.flat = 0; y.bits.cs = divider; call TimerCtrl.setControlB(y.flat); call Compare.set(MAXT); /* setInterrupt needs a valid value here */ call Compare.start(); } setInterrupt(); return SUCCESS; } /* Set compare register for timer 2 to n. But increment n by 1 if TCNT2 reaches this value before we can set the compare register. */ void setOcr2A(uint8_t n) { while (call TimerAsync.compareABusy()) ; if (n == call Timer.get()) n++; /* Support for overflow. Force interrupt at wrap around value. This does not cause a backwards-in-time value as we do this every time we set OCR2A. */ if (base + n + 1 < base) n = -base - 1; call Compare.set(n); } /* Update the compare register to trigger an interrupt at the appropriate time based on the current alarm settings */ void setInterrupt() { bool fired = FALSE; atomic { /* interrupt_in is the time to the next interrupt. Note that compare register values are off by 1 (i.e., if you set OCR2A to 3, the interrupt will happen when TCNT2 is 4) */ uint8_t interrupt_in = 1 + call Compare.get() - call Timer.get(); uint8_t newOcr2A; uint8_t tifr2 = call TimerCtrl.getInterruptFlag(); dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: TIFR is %hhx\n", tifr2); if ((interrupt_in != 0 && interrupt_in < MINDT) || (tifr2 & (1 << OCF2A))) { if (interrupt_in < MINDT) { dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: under min: %hhu.\n", interrupt_in); } else { dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: OCF2A set.\n"); } return; // wait for next interrupt } /* When no alarm is set, we just ask for an interrupt every MAXT */ if (!set) { newOcr2A = MAXT; dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: no alarm set, set at max.\n"); } else { uint32_t now = call Counter.get(); dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: now-t0 = %llu, dt = %llu\n", (now-t0), dt); /* Check if alarm expired */ if ((uint32_t)(now - t0) >= dt) { set = FALSE; fired = TRUE; newOcr2A = MAXT; } else { /* No. Set compare register to time of next alarm if it's within the next MAXT units */ uint32_t alarm_in = (t0 + dt) - base; if (alarm_in > MAXT) newOcr2A = MAXT; else if ((uint8_t)alarm_in < MINDT) // alarm_in < MAXT ... newOcr2A = MINDT; else newOcr2A = alarm_in; } } newOcr2A--; // interrupt is 1ms late setOcr2A(newOcr2A); } if (fired) signal Alarm.fired(); } async event void Compare.fired() { int overflowed; /* Compare register fired. Update time knowledge */ base += call Compare.get() + 1U; // interrupt is 1ms late overflowed = !base; __nesc_enable_interrupt(); setInterrupt(); if (overflowed) signal Counter.overflow(); } async command uint32_t Counter.get() { uint32_t now; atomic { /* Current time is base+TCNT2 if no interrupt is pending. But if an interrupt is pending, then it's base + compare value + 1 + TCNT2 */ uint8_t now8 = call Timer.get(); if ((((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag())).bits.ocfa) /* We need to reread TCNT2 as it might've overflowed after we read TCNT2 the first time */ now = base + call Compare.get() + 1 + call Timer.get(); else /* We need to use the value of TCNT2 from before we check the interrupt flag, as it might wrap around after the check */ now = base + now8; } return now; } async command bool Counter.isOverflowPending() { atomic return (((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag())).bits.ocfa && !(base + call Compare.get() + 1); } async command void Counter.clearOverflow() { atomic if (call Counter.isOverflowPending()) { base = 0; call Compare.reset(); } else return; setInterrupt(); } async command void Alarm.start(uint32_t ndt) { call Alarm.startAt(call Counter.get(), ndt); } async command void Alarm.stop() { atomic set = FALSE; } async command bool Alarm.isRunning() { atomic return set; } async command void Alarm.startAt(uint32_t nt0, uint32_t ndt) { atomic { set = TRUE; t0 = nt0; dt = ndt; } setInterrupt(); } async command uint32_t Alarm.getNow() { return call Counter.get(); } async command uint32_t Alarm.getAlarm() { atomic return t0 + dt; } async event void Timer.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/Atm128AlarmAsyncC.nc000066400000000000000000000061631207233610700234730ustar00rootroot00000000000000// $Id: Atm128AlarmAsyncC.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Build a 32-bit alarm and counter from the atmega1281's 8-bit timer 2 * in asynchronous mode. Attempting to use the generic Atm128AlarmC * component and the generic timer components runs into problems * apparently related to letting timer 2 overflow. * * So, instead, this version (inspired by the 1.x code and a remark from * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 2 * and never lets timer 2 overflow. * * @author David Gay * @author Janos Sallai */ generic configuration Atm128AlarmAsyncC(typedef precision, int divider) { provides { interface Init @atleastonce(); interface Alarm; interface Counter; } } implementation { components new Atm1281AlarmAsyncP(precision, divider), HplAtm1281Timer2AsyncC; Init = Atm1281AlarmAsyncP; Alarm = Atm1281AlarmAsyncP; Counter = Atm1281AlarmAsyncP; Atm1281AlarmAsyncP.Timer -> HplAtm1281Timer2AsyncC; Atm1281AlarmAsyncP.TimerCtrl -> HplAtm1281Timer2AsyncC; Atm1281AlarmAsyncP.Compare -> HplAtm1281Timer2AsyncC; Atm1281AlarmAsyncP.TimerAsync -> HplAtm1281Timer2AsyncC; } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/Atm128Timer.h000066400000000000000000000350031207233610700222400ustar00rootroot00000000000000// $Id: Atm128Timer.h,v 1.2 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * This file contains the configuration constants for the Atmega1281 * clocks and timers. * * @author Philip Levis * @author Martin Turon * @author Janos Sallai */ #ifndef _H_Atm128Timer_h #define _H_Atm128Timer_h /* Prescaler values for Timer/Counter 2 (8-bit asynchronous ) */ enum { ATM128_CLK8_OFF = 0x0, ATM128_CLK8_NORMAL = 0x1, ATM128_CLK8_DIVIDE_8 = 0x2, ATM128_CLK8_DIVIDE_32 = 0x3, ATM128_CLK8_DIVIDE_64 = 0x4, ATM128_CLK8_DIVIDE_128 = 0x5, ATM128_CLK8_DIVIDE_256 = 0x6, ATM128_CLK8_DIVIDE_1024 = 0x7, }; /* Prescaler values for Timer/Counter 0 (8-bit) and 1, 3, 4, 5 (16-bit) */ enum { ATM128_CLK16_OFF = 0x0, ATM128_CLK16_NORMAL = 0x1, ATM128_CLK16_DIVIDE_8 = 0x2, ATM128_CLK16_DIVIDE_64 = 0x3, ATM128_CLK16_DIVIDE_256 = 0x4, ATM128_CLK16_DIVIDE_1024 = 0x5, ATM128_CLK16_EXTERNAL_FALL = 0x6, ATM128_CLK16_EXTERNAL_RISE = 0x7, }; /* Common scales across both 8-bit and 16-bit clocks. */ enum { AVR_CLOCK_OFF = 0, AVR_CLOCK_ON = 1, AVR_CLOCK_DIVIDE_8 = 2, }; enum { ATM128_TIMER_COMPARE_NORMAL = 0, ATM128_TIMER_COMPARE_TOGGLE, ATM128_TIMER_COMPARE_CLEAR, ATM128_TIMER_COMPARE_SET }; /* 8-bit Waveform Generation Modes */ enum { ATM128_WAVE8_NORMAL = 0, ATM128_WAVE8_PWM, ATM128_WAVE8_CTC, ATM128_WAVE8_PWM_FAST, }; /* 16-bit Waveform Generation Modes */ enum { ATM128_WAVE16_NORMAL = 0, ATM128_WAVE16_PWM_8BIT, ATM128_WAVE16_PWM_9BIT, ATM128_WAVE16_PWM_10BIT, ATM128_WAVE16_CTC_COMPARE, ATM128_WAVE16_PWM_FAST_8BIT, ATM128_WAVE16_PWM_FAST_9BIT, ATM128_WAVE16_PWM_FAST_10BIT, ATM128_WAVE16_PWM_CAPTURE_LOW, ATM128_WAVE16_PWM_COMPARE_LOW, ATM128_WAVE16_PWM_CAPTURE_HIGH, ATM128_WAVE16_PWM_COMPARE_HIGH, ATM128_WAVE16_CTC_CAPTURE, ATM128_WAVE16_RESERVED, ATM128_WAVE16_PWM_FAST_CAPTURE, ATM128_WAVE16_PWM_FAST_COMPARE, }; /* 8-bit Timer compare settings */ enum { ATM128_COMPARE_OFF = 0, //!< compare disconnected ATM128_COMPARE_TOGGLE, //!< toggle on match (PWM reserved ATM128_COMPARE_CLEAR, //!< clear on match (PWM downcount) ATM128_COMPARE_SET, //!< set on match (PWN upcount) }; /* 8-bit Timer/Counter 0 Control Register A*/ typedef union { uint8_t flat; struct { uint8_t wgm00 : 1; //!< Waveform generation mode (low bit) uint8_t wgm01 : 1; //!< Waveform generation mode (high bit) uint8_t resv1 : 2; //!< Compare Match Output uint8_t com0b0: 1; //!< Compare Match Output uint8_t com0b1: 1; //!< Compare Match Output uint8_t com0a0: 1; //!< Compare Match Output uint8_t com0a1: 1; //!< Compare Match Output } bits; } Atm128_TCCR0A_t; /* 8-bit Timer/Counter 0 Control Register B*/ typedef union { uint8_t flat; struct { uint8_t cs00 : 1; //!< Clock Select 0 uint8_t cs01 : 1; //!< Clock Select 1 uint8_t cs02 : 2; //!< Clock Select 2 uint8_t wgm02 : 1; //!< Waveform Generation Mode uint8_t resv1 : 2; //!< Reserved uint8_t foc0b : 1; //!< Force Output Compare B uint8_t foc0a : 1; //!< Force Output Compare A } bits; } Atm128_TCCR0B_t; /* Timer/Counter 0 Interrupt Mask Register */ typedef union { uint8_t flat; struct { uint8_t toie0 : 1; //!< Timer/Counter0 Overflow Interrupt Enable uint8_t ocie0a: 1; //!< Timer/Counter0 Output Compare Match A Interrupt Enable uint8_t ocie0e: 1; //!< Timer/Counter Output Compare Match B Interrupt Enable uint8_t resv1 : 5; //!< Reserved } bits; } Atm128_TIMSK0_t; /* Timer/Counter 0 Interrupt Flag Register*/ typedef union { uint8_t flat; struct { uint8_t tov0 : 1; //!< Timer/Counter0 Overflow Flag uint8_t ocf0a : 1; //!< Timer/Counter 0 Output Compare A Match Flag uint8_t ocf0b : 1; //!< Timer/Counter 0 Output Compare B Match Flag uint8_t resv1 : 5; //!< Reserved } bits; } Atm128_TIFR0_t; /* Asynchronous Status Register -- Timer2 */ typedef union { uint8_t flat; struct { uint8_t tcr2bub: 1; //!< Timer/Counter Control Register2 Update Busy uint8_t tcr2aub: 1; //!< Timer/Counter Control Register2 Update Busy uint8_t ocr2bub: 1; //!< Output Compare Register2 Update Busy uint8_t ocr2aub: 1; //!< Output Compare Register2 Update Busy uint8_t tcn2ub : 1; //!< Timer/Counter2 Update Busy uint8_t as2 : 1; //!< Asynchronous Timer/Counter2 (off=CLK_IO,on=TOSC1) uint8_t exclk : 1; //!< Enable External Clock Input uint8_t resv1 : 1; //!< Reserved } bits; } Atm128_ASSR_t; /* Timer/Counter 2 Control Register A*/ typedef union { uint8_t flat; struct { uint8_t wgm20 : 1; //!< Waveform Generation Mode uint8_t wgm21 : 1; //!< Waveform Generation Mode uint8_t resv1 : 2; //!< Reserved uint8_t comb: 2; //!< Compare Output Mode for Channel B uint8_t coma: 2; //!< Compare Output Mode for Channel A } bits; } Atm128_TCCR2A_t; /* Timer/Counter 2 Control Register B*/ typedef union { uint8_t flat; struct { uint8_t cs : 3; //!< Clock Select uint8_t wgm22 : 1; //!< Waveform Generation Mode uint8_t resv1 : 2; //!< Reserved uint8_t foc2b : 1; //!< Force Output Compare B uint8_t foc2a : 1; //!< Force Output Compare A } bits; } Atm128_TCCR2B_t; /* Timer/Counter 2 Interrupt Mask Register */ typedef union { uint8_t flat; struct { uint8_t toie : 1; //!< Timer/Counter2 Overflow Interrupt Enable uint8_t ociea: 1; //!< Timer/Counter2 Output Compare Match A Interrupt Enable uint8_t ocieb: 1; //!< Timer/Counter Output Compare Match B Interrupt Enable uint8_t resv1 : 5; //!< Reserved } bits; } Atm128_TIMSK2_t; /* Timer/Counter 2 Interrupt Flag Register */ typedef union { uint8_t flat; struct { uint8_t tov : 1; //!< Timer1 Overflow Flag uint8_t ocfa : 1; //!< Timer1 Output Compare Flag A uint8_t ocfb : 1; //!< Timer1 Output Compare Flag B uint8_t resv1 : 5; //!< Reserved } bits; } Atm128_TIFR2_t; /* Timer/Counter 1,3,4,5 Control Register A*/ typedef union { uint8_t flat; struct { uint8_t wgm01 : 2; //!< Waveform Generation Mode uint8_t comc : 2; //!< Compare Output Mode for Channel C uint8_t comb : 2; //!< Compare Output Mode for Channel B uint8_t coma : 2; //!< Compare Output Mode for Channel A } bits; } Atm128_TCCRA_t; /* Timer/Counter 1,3,4,5 Control Register B*/ typedef union { uint8_t flat; struct { uint8_t cs : 3; //!< Clock Select uint8_t wgm23 : 2; //!< Waveform Generation Mode uint8_t resv1 : 1; //!< Reserved uint8_t ices : 1; //!< Input Capture Edge Select uint8_t icnc : 1; //!< Input Capture Noise Canceler } bits; } Atm128_TCCRB_t; /* Timer/Counter 1,3,4,5 Control Register C*/ typedef union { uint8_t flat; struct { uint8_t resv1 : 5; //!< Reserved uint8_t focc : 1; //!< Force Output Compare for Channel A uint8_t focb : 1; //!< Force Output Compare for Channel A uint8_t foca : 1; //!< Force Output Compare for Channel A } bits; } Atm128_TCCRC_t; /* Timer/Counter 1,3,4,5 Interrupt Mask Register */ typedef union { uint8_t flat; struct { uint8_t toie : 1; //!< Timer/Counter1 Overflow Interrupt Enable uint8_t ociea: 1; //!< Timer/Counter1 Output Compare Match A Interrupt Enable uint8_t ocieb: 1; //!< Timer/Counter1 Output Compare Match B Interrupt Enable uint8_t ociec: 1; //!< Timer/Counter1 Output Compare Match C Interrupt Enable uint8_t resv1: 1; //!< Reserved uint8_t icie : 1; //!< Timer/Counter1, Input Capture Interrupt Enable uint8_t resv2 : 2; //!< Reserved } bits; } Atm128_TIMSK_t; /* Timer/Counter 1,3,4,5 Interrupt Flag Register */ typedef union { uint8_t flat; struct { uint8_t tov : 1; //!< Timer1 Overflow Flag uint8_t ocfa : 1; //!< Timer1 Output Compare Flag A uint8_t ocfb : 1; //!< Timer1 Output Compare Flag B uint8_t ocfc : 1; //!< Timer1 Output Compare Flag C uint8_t resv1: 1; //!< Reserved uint8_t icf : 1; //!< Timer1 Input Capture Flag uint8_t resv2: 2; //!< Reserved } bits; } Atm128_TIFR_t; /* General Timer/Counter Control Register */ typedef union { uint8_t flat; struct { uint8_t psrsync: 1; //!< Prescaler Reset for Synchronous Timer/Counters 0,1,3,4,5 uint8_t psrasy : 1; //!< Prescaler Reset Timer/Counter2 uint8_t resv1 : 5; //!< Reserved uint8_t tsm : 1; //!< Timer/Counter Synchronization Mode } bits; } Atm128_GTCCR_t; // Read/Write these 16-bit Timer registers // Access as bytes. Read low before high. Write high before low. typedef uint8_t Atm128_TCNT1H_t; //!< Timer1 Register typedef uint8_t Atm128_TCNT1L_t; //!< Timer1 Register typedef uint8_t Atm128_TCNT3H_t; //!< Timer3 Register typedef uint8_t Atm128_TCNT3L_t; //!< Timer3 Register typedef uint8_t Atm128_TCNT4H_t; //!< Timer4 Register typedef uint8_t Atm128_TCNT4L_t; //!< Timer4 Register typedef uint8_t Atm128_TCNT5H_t; //!< Timer5 Register typedef uint8_t Atm128_TCNT5L_t; //!< Timer5 Register /* Contains value to continuously compare with Timer1 */ typedef uint8_t Atm128_OCR1AH_t; //!< Output Compare Register 1A typedef uint8_t Atm128_OCR1AL_t; //!< Output Compare Register 1A typedef uint8_t Atm128_OCR1BH_t; //!< Output Compare Register 1B typedef uint8_t Atm128_OCR1BL_t; //!< Output Compare Register 1B typedef uint8_t Atm128_OCR1CH_t; //!< Output Compare Register 1C typedef uint8_t Atm128_OCR1CL_t; //!< Output Compare Register 1C /* Contains value to continuously compare with Timer3 */ typedef uint8_t Atm128_OCR3AH_t; //!< Output Compare Register 3A typedef uint8_t Atm128_OCR3AL_t; //!< Output Compare Register 3A typedef uint8_t Atm128_OCR3BH_t; //!< Output Compare Register 3B typedef uint8_t Atm128_OCR3BL_t; //!< Output Compare Register 3B typedef uint8_t Atm128_OCR3CH_t; //!< Output Compare Register 3C typedef uint8_t Atm128_OCR3CL_t; //!< Output Compare Register 3C /* Contains value to continuously compare with Timer4 */ typedef uint8_t Atm128_OCR4AH_t; //!< Output Compare Register 4A typedef uint8_t Atm128_OCR4AL_t; //!< Output Compare Register 4A typedef uint8_t Atm128_OCR4BH_t; //!< Output Compare Register 4B typedef uint8_t Atm128_OCR4BL_t; //!< Output Compare Register 4B typedef uint8_t Atm128_OCR4CH_t; //!< Output Compare Register 4C typedef uint8_t Atm128_OCR4CL_t; //!< Output Compare Register 4C /* Contains value to continuously compare with Timer5 */ typedef uint8_t Atm128_OCR5AH_t; //!< Output Compare Register 5A typedef uint8_t Atm128_OCR5AL_t; //!< Output Compare Register 5A typedef uint8_t Atm128_OCR5BH_t; //!< Output Compare Register 5B typedef uint8_t Atm128_OCR5BL_t; //!< Output Compare Register 5B typedef uint8_t Atm128_OCR5CH_t; //!< Output Compare Register 5C typedef uint8_t Atm128_OCR5CL_t; //!< Output Compare Register 5C /* Contains counter value when event occurs on ICPn pin. */ typedef uint8_t Atm128_ICR1H_t; //!< Input Capture Register 1 typedef uint8_t Atm128_ICR1L_t; //!< Input Capture Register 1 typedef uint8_t Atm128_ICR3H_t; //!< Input Capture Register 3 typedef uint8_t Atm128_ICR3L_t; //!< Input Capture Register 3 typedef uint8_t Atm128_ICR4H_t; //!< Input Capture Register 4 typedef uint8_t Atm128_ICR4L_t; //!< Input Capture Register 4 typedef uint8_t Atm128_ICR5H_t; //!< Input Capture Register 5 typedef uint8_t Atm128_ICR5L_t; //!< Input Capture Register 5 /* Resource strings for timer 1 and 3 compare registers */ #define UQ_TIMER1_COMPARE "atm128.timer1" #define UQ_TIMER3_COMPARE "atm128.timer3" #endif //_H_Atm128Timer_h tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm1281Timer1P.nc000066400000000000000000000227541207233610700233500ustar00rootroot00000000000000 /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Internal component of the HPL interface to Atmega1281 timer 1. * * @author Martin Turon * @author Janos Sallai */ #include module HplAtm1281Timer1P @safe() { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as CompareA; interface HplAtm128Compare as CompareB; interface HplAtm128Compare as CompareC; } } implementation { //=== Read the current timer value. =================================== async command uint16_t Timer.get() { return TCNT1; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint16_t t) { TCNT1 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR1B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128_TCCRB_t x = (Atm128_TCCRB_t) call TimerCtrl.getControlB(); x.bits.cs = s; call TimerCtrl.setControlB(x.flat); } //=== Read the control registers. ===================================== async command uint8_t TimerCtrl.getControlA() { return TCCR1A; } async command uint8_t TimerCtrl.getControlB() { return TCCR1B; } async command uint8_t TimerCtrl.getControlC() { return TCCR1C; } //=== Write the control registers. ==================================== async command void TimerCtrl.setControlA( uint8_t x ) { TCCR1A = x; } async command void TimerCtrl.setControlB( uint8_t x ) { TCCR1B = x; } async command void TimerCtrl.setControlC( uint8_t x ) { TCCR1C = x; } //=== Read the interrupt mask. ===================================== async command uint8_t TimerCtrl.getInterruptMask() { return TIMSK1; } //=== Write the interrupt mask. ==================================== async command void TimerCtrl.setInterruptMask( uint8_t x ) { TIMSK1 = x; } //=== Read the interrupt flags. ===================================== async command uint8_t TimerCtrl.getInterruptFlag() { return TIFR1; } //=== Write the interrupt flags. ==================================== async command void TimerCtrl.setInterruptFlag( uint8_t x ) { TIFR1 = x; } //=== Capture 16-bit implementation. =================================== async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); } //=== Timer 16-bit implementation. =================================== async command void Timer.reset() { TIFR1 = 1 << TOV1; } async command void Capture.reset() { TIFR1 = 1 << ICF1; } async command void CompareA.reset() { TIFR1 = 1 << OCF1A; } async command void CompareB.reset() { TIFR1 = 1 << OCF1B; } async command void CompareC.reset() { TIFR1 = 1 << OCF1C; } async command void Timer.start() { SET_BIT(TIMSK1,TOIE1); } async command void Capture.start() { SET_BIT(TIMSK1,ICIE1); } async command void CompareA.start() { SET_BIT(TIMSK1,OCIE1A); } async command void CompareB.start() { SET_BIT(TIMSK1,OCIE1B); } async command void CompareC.start() { SET_BIT(TIMSK1,OCIE1C); } async command void Timer.stop() { CLR_BIT(TIMSK1,TOIE1); } async command void Capture.stop() { CLR_BIT(TIMSK1,ICIE1); } async command void CompareA.stop() { CLR_BIT(TIMSK1,OCIE1A); } async command void CompareB.stop() { CLR_BIT(TIMSK1,OCIE1B); } async command void CompareC.stop() { CLR_BIT(TIMSK1,OCIE1C); } async command bool Timer.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.tov; } async command bool Capture.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.icf; } async command bool CompareA.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; } async command bool CompareB.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfb; } async command bool CompareC.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfc; } async command bool Timer.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.toie; } async command bool Capture.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.icie; } async command bool CompareA.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociea; } async command bool CompareB.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ocieb; } async command bool CompareC.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociec; } //=== Read the compare registers. ===================================== async command uint16_t CompareA.get() { return OCR1A; } async command uint16_t CompareB.get() { return OCR1B; } async command uint16_t CompareC.get() { return OCR1C; } //=== Write the compare registers. ==================================== async command void CompareA.set(uint16_t t) { OCR1A = t; } async command void CompareB.set(uint16_t t) { OCR1B = t; } async command void CompareC.set(uint16_t t) { OCR1C = t; } //=== Read the capture registers. ===================================== async command uint16_t Capture.get() { return ICR1; } //=== Write the capture registers. ==================================== async command void Capture.set(uint16_t t) { ICR1 = t; } //=== Timer interrupts signals ======================================== default async event void CompareA.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) { signal CompareA.fired(); } default async event void CompareB.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) { signal CompareB.fired(); } default async event void CompareC.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) { signal CompareC.fired(); } default async event void Capture.captured(uint16_t time) { } AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) { signal Capture.captured(call Capture.get()); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) { signal Timer.overflow(); } } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm1281Timer2AsyncC.nc000066400000000000000000000100111207233610700243110ustar00rootroot00000000000000/// $Id: HplAtm1281Timer2AsyncC.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Simple wrapper around the actual timer implementation that automatically * wires it to McuSleepC for low-power calculations.. * * @author Philip Levis * @author David Gay * @author Janos Sallai */ #include configuration HplAtm1281Timer2AsyncC { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { components HplAtm1281Timer2AsyncP; components McuSleepC; McuSleepC.McuPowerOverride -> HplAtm1281Timer2AsyncP; Timer = HplAtm1281Timer2AsyncP; TimerCtrl = HplAtm1281Timer2AsyncP; Compare = HplAtm1281Timer2AsyncP; TimerAsync = HplAtm1281Timer2AsyncP; } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm1281Timer2AsyncP.nc000066400000000000000000000234431207233610700243430ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL interface to Atmega1281 timer 2 in ASYNC mode. This is a specialised * HPL component that assumes that timer 2 is used in ASYNC mode and * includes some workarounds for some of the weirdnesses (delayed overflow * interrupt) of that mode. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ #include module HplAtm1281Timer2AsyncP @safe() { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface McuPowerOverride; interface HplAtm128TimerAsync as TimerAsync; } } implementation { // bool inOverflow; // command error_t Init.init() { // SET_BIT(ASSR, AS2); // set Timer/Counter2 to asynchronous mode // return SUCCESS; // } //=== Read the current timer value. =================================== async command uint8_t Timer.get() { return TCNT2; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint8_t t) { while (ASSR & 1 << TCN2UB) ; TCNT2 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR2B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128_TCCR2B_t x = (Atm128_TCCR2B_t) call TimerCtrl.getControlB(); x.bits.cs = s; call TimerCtrl.setControlB(x.flat); } //=== Read the control registers. ===================================== async command uint8_t TimerCtrl.getControlA() { return TCCR2A; } async command uint8_t TimerCtrl.getControlB() { return TCCR2B; } //=== Write the control registers. ==================================== async command void TimerCtrl.setControlA( uint8_t x ) { while (ASSR & 1 << TCR2AUB) ; TCCR2A = ((Atm128_TCCR2A_t)x).flat; } async command void TimerCtrl.setControlB( uint8_t x ) { while (ASSR & 1 << TCR2BUB) ; TCCR2B = ((Atm128_TCCR2B_t)x).flat; } //=== Read the interrupt mask. ===================================== async command uint8_t TimerCtrl.getInterruptMask() { return TIMSK2; } //=== Write the interrupt mask. ==================================== async command void TimerCtrl.setInterruptMask( uint8_t x ) { TIMSK2 = x; } //=== Read the interrupt flags. ===================================== async command uint8_t TimerCtrl.getInterruptFlag() { return TIFR2; } //=== Write the interrupt flags. ==================================== async command void TimerCtrl.setInterruptFlag( uint8_t x ) { TIFR2 = x; } //=== Timer 8-bit implementation. ==================================== async command void Timer.reset() { TIFR2 = 1 << TOV2; } async command void Timer.start() { SET_BIT(TIMSK2, TOIE2); } async command void Timer.stop() { CLR_BIT(TIMSK2, TOIE2); } bool overflowed() { return ((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag()).bits.tov; } async command bool Timer.test() { return overflowed(); } async command bool Timer.isOn() { return ((Atm128_TIMSK2_t)call TimerCtrl.getInterruptMask()).bits.toie; } async command void Compare.reset() { TIFR2 = 1 << OCF2A; } async command void Compare.start() { SET_BIT(TIMSK2,OCIE2A); } async command void Compare.stop() { CLR_BIT(TIMSK2,OCIE2A); } async command bool Compare.test() { return ((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; } async command bool Compare.isOn() { return ((Atm128_TIMSK2_t)call TimerCtrl.getInterruptMask()).bits.ociea; } //=== Read the compare registers. ===================================== async command uint8_t Compare.get(){ return OCR2A; } //=== Write the compare registers. ==================================== async command void Compare.set(uint8_t t) { atomic { while (ASSR & 1 << OCR2AUB) ; OCR2A = t; } } //=== Timer interrupts signals ======================================== inline void stabiliseTimer2() { TCCR2A = TCCR2A; while (ASSR & 1 << TCR2AUB) ; } /** * On the atm128, there is a small latency when waking up from * POWER_SAVE mode. So if a timer is going to go off very soon, it's * better to drop down until EXT_STANDBY, which has a 6 cycle wakeup * latency. This function calculates whether staying in EXT_STANDBY * is needed. If the timer is not running it returns POWER_DOWN. * Please refer to TEP 112 and the atm128 datasheet for details. */ async command mcu_power_t McuPowerOverride.lowestState() { uint8_t diff; // We need to make sure that the sleep wakeup latency will not // cause us to miss a timer. POWER_SAVE if (TIMSK2 & (1 << OCIE2A | 1 << TOIE2)) { // need to wait for timer 2 updates propagate before sleeping // (we don't need to worry about reentering sleep mode too early, // as the wake ups from timer2 wait at least one TOSC1 cycle // anyway - see the stabiliseTimer2 function) while (ASSR & (1 << TCN2UB | 1 << OCR2AUB | 1 << TCR2AUB)) ; diff = OCR2A - TCNT2; if (diff < EXT_STANDBY_T0_THRESHOLD || TCNT2 > 256 - EXT_STANDBY_T0_THRESHOLD) return ATM128_POWER_EXT_STANDBY; return ATM128_POWER_SAVE; } else { return ATM128_POWER_DOWN; } } default async event void Compare.fired() { } AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE2A) { stabiliseTimer2(); // __nesc_enable_interrupt(); signal Compare.fired(); } default async event void Timer.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) { stabiliseTimer2(); // inOverflow = TRUE; signal Timer.overflow(); // inOverflow = FALSE; } // Asynchronous status register support async command Atm128_ASSR_t TimerAsync.getAssr() { return *(Atm128_ASSR_t *)&ASSR; } async command void TimerAsync.setAssr(Atm128_ASSR_t x) { ASSR = x.flat; } async command void TimerAsync.setTimer2Asynchronous() { ASSR |= 1 << AS2; } async command int TimerAsync.controlABusy() { return (ASSR & (1 << TCR2AUB)) != 0; } async command int TimerAsync.controlBBusy() { return (ASSR & (1 << TCR2BUB)) != 0; } async command int TimerAsync.compareABusy() { return (ASSR & (1 << OCR2AUB)) != 0; } async command int TimerAsync.compareBBusy() { return (ASSR & (1 << OCR2BUB)) != 0; } async command int TimerAsync.countBusy() { return (ASSR & (1 << TCN2UB)) != 0; } } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm1281Timer3P.nc000066400000000000000000000227551207233610700233530ustar00rootroot00000000000000 /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Internal component of the HPL interface to Atmega1281 timer 3. * * @author Martin Turon * @author Janos Sallai */ #include module HplAtm1281Timer3P @safe() { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as CompareA; interface HplAtm128Compare as CompareB; interface HplAtm128Compare as CompareC; } } implementation { //=== Read the current timer value. =================================== async command uint16_t Timer.get() { return TCNT3; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint16_t t) { TCNT3 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR3B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128_TCCRB_t x = (Atm128_TCCRB_t) call TimerCtrl.getControlB(); x.bits.cs = s; call TimerCtrl.setControlB(x.flat); } //=== Read the control registers. ===================================== async command uint8_t TimerCtrl.getControlA() { return TCCR3A; } async command uint8_t TimerCtrl.getControlB() { return TCCR3B; } async command uint8_t TimerCtrl.getControlC() { return TCCR3C; } //=== Write the control registers. ==================================== async command void TimerCtrl.setControlA( uint8_t x ) { TCCR3A = x; } async command void TimerCtrl.setControlB( uint8_t x ) { TCCR3B = x; } async command void TimerCtrl.setControlC( uint8_t x ) { TCCR3C = x; } //=== Read the interrupt mask. ===================================== async command uint8_t TimerCtrl.getInterruptMask() { return TIMSK3; } //=== Write the interrupt mask. ==================================== async command void TimerCtrl.setInterruptMask( uint8_t x ) { TIMSK3 = x; } //=== Read the interrupt flags. ===================================== async command uint8_t TimerCtrl.getInterruptFlag() { return TIFR3; } //=== Write the interrupt flags. ==================================== async command void TimerCtrl.setInterruptFlag( uint8_t x ) { TIFR3 = x; } //=== Capture 16-bit implementation. =================================== async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B, ICES3, up); } //=== Timer 16-bit implementation. =================================== async command void Timer.reset() { TIFR3 = 1 << TOV3; } async command void Capture.reset() { TIFR3 = 1 << ICF3; } async command void CompareA.reset() { TIFR3 = 1 << OCF3A; } async command void CompareB.reset() { TIFR3 = 1 << OCF3B; } async command void CompareC.reset() { TIFR3 = 1 << OCF3C; } async command void Timer.start() { SET_BIT(TIMSK3,TOIE3); } async command void Capture.start() { SET_BIT(TIMSK3,ICIE3); } async command void CompareA.start() { SET_BIT(TIMSK3,OCIE3A); } async command void CompareB.start() { SET_BIT(TIMSK3,OCIE3B); } async command void CompareC.start() { SET_BIT(TIMSK3,OCIE3C); } async command void Timer.stop() { CLR_BIT(TIMSK3,TOIE3); } async command void Capture.stop() { CLR_BIT(TIMSK3,ICIE3); } async command void CompareA.stop() { CLR_BIT(TIMSK3,OCIE3A); } async command void CompareB.stop() { CLR_BIT(TIMSK3,OCIE3B); } async command void CompareC.stop() { CLR_BIT(TIMSK3,OCIE3C); } async command bool Timer.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.tov; } async command bool Capture.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.icf; } async command bool CompareA.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; } async command bool CompareB.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfb; } async command bool CompareC.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfc; } async command bool Timer.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.toie; } async command bool Capture.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.icie; } async command bool CompareA.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociea; } async command bool CompareB.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ocieb; } async command bool CompareC.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociec; } //=== Read the compare registers. ===================================== async command uint16_t CompareA.get() { return OCR3A; } async command uint16_t CompareB.get() { return OCR3B; } async command uint16_t CompareC.get() { return OCR3C; } //=== Write the compare registers. ==================================== async command void CompareA.set(uint16_t t) { OCR3A = t; } async command void CompareB.set(uint16_t t) { OCR3B = t; } async command void CompareC.set(uint16_t t) { OCR3C = t; } //=== Read the capture registers. ===================================== async command uint16_t Capture.get() { return ICR3; } //=== Write the capture registers. ==================================== async command void Capture.set(uint16_t t) { ICR3 = t; } //=== Timer interrupts signals ======================================== default async event void CompareA.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) { signal CompareA.fired(); } default async event void CompareB.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) { signal CompareB.fired(); } default async event void CompareC.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) { signal CompareC.fired(); } default async event void Capture.captured(uint16_t time) { } AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) { signal Capture.captured(call Capture.get()); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) { signal Timer.overflow(); } } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm128Timer1C.nc000066400000000000000000000076751207233610700232570ustar00rootroot00000000000000/// $Id: HplAtm128Timer1C.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL interface to Atmega1281 timer 1. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ configuration HplAtm128Timer1C { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as Compare[uint8_t id]; } } implementation { components HplAtm1281Timer1P; Timer = HplAtm1281Timer1P; TimerCtrl = HplAtm1281Timer1P; Capture = HplAtm1281Timer1P; Compare[0] = HplAtm1281Timer1P.CompareA; Compare[1] = HplAtm1281Timer1P.CompareB; Compare[2] = HplAtm1281Timer1P.CompareC; } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm128Timer3C.nc000066400000000000000000000076751207233610700232610ustar00rootroot00000000000000/// $Id: HplAtm128Timer3C.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL interface to Atmega1281 timer 3. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ configuration HplAtm128Timer3C { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as Compare[uint8_t id]; } } implementation { components HplAtm1281Timer3P; Timer = HplAtm1281Timer3P; TimerCtrl = HplAtm1281Timer3P; Capture = HplAtm1281Timer3P; Compare[0] = HplAtm1281Timer3P.CompareA; Compare[1] = HplAtm1281Timer3P.CompareB; Compare[2] = HplAtm1281Timer3P.CompareC; } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm128TimerAsync.nc000066400000000000000000000067711207233610700240650ustar00rootroot00000000000000// $Id: HplAtm128TimerAsync.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2007 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL Interface to Atmega1281 8-bit asynchronous timer control registers * * @author David Gay * @author Janos Sallai */ interface HplAtm128TimerAsync { /** * Read timer2 asynchronous status register (ASSR) * @return Current value of ASSR */ async command Atm128_ASSR_t getAssr(); /** * Set timer2 asynchronous status register (ASSR) * @param x New value for ASSR */ async command void setAssr(Atm128_ASSR_t x); /** * Turn on timer 2 asynchronous mode */ async command void setTimer2Asynchronous(); /** * Check if control register TCCR2A is busy (should not be updated if true) * @return TRUE if TCCR2A is busy, FALSE otherwise (can be updated) */ async command int controlABusy(); /** * Check if control register TCCR2B is busy (should not be updated if true) * @return TRUE if TCCR2B is busy, FALSE otherwise (can be updated) */ async command int controlBBusy(); /** * Check if compare register OCR2A is busy (should not be updated if true) * @return TRUE if OCR2A is busy, FALSE otherwise (can be updated) */ async command int compareABusy(); /** * Check if compare register OCR2B is busy (should not be updated if true) * @return TRUE if OCR2B is busy, FALSE otherwise (can be updated) */ async command int compareBBusy(); /** * Check if current timer value (TCNT2) is busy (should not be updated if true) * @return TRUE if TCNT2 is busy, FALSE otherwise (can be updated) */ async command int countBusy(); } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm128TimerCtrl16.nc000066400000000000000000000100171207233610700240470ustar00rootroot00000000000000/// $Id: HplAtm128TimerCtrl16.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL Interface to Atmega1281 16-bit timer control registers * * @author Martin Turon * @author Janos Sallai */ #include interface HplAtm128TimerCtrl16 { /// Timer control register: Direct access async command uint8_t getControlA(); async command uint8_t getControlB(); async command uint8_t getControlC(); async command void setControlA( uint8_t control ); async command void setControlB( uint8_t control ); async command void setControlC( uint8_t control ); /// Interrupt mask register: Direct access async command uint8_t getInterruptMask(); async command void setInterruptMask( uint8_t mask); /// Interrupt flag register: Direct access async command uint8_t getInterruptFlag(); async command void setInterruptFlag( uint8_t flags ); } tinyos-2.1.2+dfsg/tos/chips/atm1281/timer/HplAtm128TimerCtrl8.nc000066400000000000000000000076531207233610700240040ustar00rootroot00000000000000/// $Id: HplAtm128TimerCtrl8.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL Interface to Atmega1281 8-bit timer control registers * * @author Martin Turon * @author Janos Sallai */ #include interface HplAtm128TimerCtrl8 { /// Timer control register: Direct access async command uint8_t getControlA(); async command uint8_t getControlB(); async command void setControlA( uint8_t control ); async command void setControlB( uint8_t control ); /// Interrupt mask register: Direct access async command uint8_t getInterruptMask(); async command void setInterruptMask( uint8_t mask); /// Interrupt flag register: Direct access async command uint8_t getInterruptFlag(); async command void setInterruptFlag( uint8_t flags ); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/000077500000000000000000000000001207233610700174625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/BusPowerManager.nc000066400000000000000000000053451207233610700230540ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti, Andras Biro */ interface BusPowerManager { /** * Sets the startup and keepalive timeout values in milliseconds. * Only the largest numbers are remembered, as the bus might not * be operational if one of the chips on it is not operational. */ command void configure(uint16_t startup, uint16_t keepalive); /** * Requests to power up this bus. The bus might be already powered * up, in which case the powerOn event will not come. */ command void requestPower(); /** * Releases the power up request. You must call this command exactly * the same number of times as you have called requestPower. If other * chips still want to keep the power (e.g. a measurement is in * progress), then powerOff will not be called. */ command void releasePower(); /** * This event is called when the bus is powered on and the maximum * specified startup time has elapsed. Implementations should * initialize the chip or go into power down mode. */ event void powerOn(); /** * This event is called when there are no outstanding power requests * and the keepalive timeout value has expired. */ event void powerOff(); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/BusPowerManagerC.nc000066400000000000000000000037421207233610700231560ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration BusPowerManagerC(bool highIsOn, bool initPin) { provides interface BusPowerManager; uses interface GeneralIO; } implementation { components new BusPowerManagerP(highIsOn, initPin), new TimerMilliC(), RealMainP; BusPowerManager = BusPowerManagerP; GeneralIO = BusPowerManagerP; BusPowerManagerP.Timer -> TimerMilliC; BusPowerManagerP.Init <- RealMainP.PlatformInit; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/BusPowerManagerP.nc000066400000000000000000000064121207233610700231700ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module BusPowerManagerP(bool highIsOn, bool initPin) { provides interface BusPowerManager; uses interface Timer; uses interface GeneralIO; provides interface Init; } implementation { uint16_t maxStartup; uint16_t maxKeepAlive; uint8_t counter; enum { COUNTER_MASK = 0x7F, COUNTER_TIMER = 0x80, // timer is running }; command error_t Init.init(){ call GeneralIO.makeOutput(); if(initPin){ if( highIsOn ) call GeneralIO.clr(); else call GeneralIO.set(); } return SUCCESS; } command void BusPowerManager.configure(uint16_t startup, uint16_t keepalive) { if( maxStartup < startup ) maxStartup = startup; if( maxKeepAlive < keepalive ) maxKeepAlive = keepalive; } command void BusPowerManager.requestPower() { ++counter; if( counter == 1 ) // bus is off { if( highIsOn ) call GeneralIO.set(); else call GeneralIO.clr(); call Timer.startOneShot(maxStartup); counter = 1 | COUNTER_TIMER; } else if( counter == (1 | COUNTER_TIMER) ) // during keepalive { call Timer.stop(); counter = 1; } } command void BusPowerManager.releasePower() { --counter; if( counter == 0 ) // bus is on { call Timer.startOneShot(maxKeepAlive); counter = COUNTER_TIMER; } else if( counter == 0 + COUNTER_TIMER) // during startup { if( highIsOn ) call GeneralIO.clr(); else call GeneralIO.set(); call Timer.stop(); counter = 0; } } event void Timer.fired() { counter &= COUNTER_MASK; if( counter == 0 ) { if( highIsOn ) call GeneralIO.clr(); else call GeneralIO.set(); signal BusPowerManager.powerOff(); } else { signal BusPowerManager.powerOn(); } } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/DummyBusPowerManagerC.nc000066400000000000000000000035311207233610700241660ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ generic module DummyBusPowerManagerC(){ provides interface BusPowerManager; } implementation { command void BusPowerManager.configure(uint16_t startup, uint16_t keepalive) {} command void BusPowerManager.requestPower() { signal BusPowerManager.powerOn(); } command void BusPowerManager.releasePower() {} } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/HplAtm128UartC.nc000066400000000000000000000053421207233610700223670ustar00rootroot00000000000000/// $Id: HplAtm128UartC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /// #include /** * HPL for the Atmega 128 serial ports. * * @author Martin Turon * @author David Gay */ configuration HplAtm128UartC { provides { interface StdControl as Uart0TxControl; interface StdControl as Uart0RxControl; interface HplAtm128Uart as HplUart0; interface StdControl as Uart1TxControl; interface StdControl as Uart1RxControl; interface HplAtm128Uart as HplUart1; } } implementation { components HplAtm128UartP, PlatformC, McuSleepC; Uart0TxControl = HplAtm128UartP.Uart0TxControl; Uart0RxControl = HplAtm128UartP.Uart0RxControl; HplUart0 = HplAtm128UartP.HplUart0; Uart1TxControl = HplAtm128UartP.Uart1TxControl; Uart1RxControl = HplAtm128UartP.Uart1RxControl; HplUart1 = HplAtm128UartP.HplUart1; HplAtm128UartP.Atm128Calibrate -> PlatformC; HplAtm128UartP.McuPowerState -> McuSleepC; components MainC; MainC.SoftwareInit -> HplAtm128UartP.Uart0Init; MainC.SoftwareInit -> HplAtm128UartP.Uart1Init; HplAtm128UartP.McuPowerState -> McuSleepC; HplAtm128UartP.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/HplAtm128UartP.nc000066400000000000000000000242571207233610700224120ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.1 $ $Date: 2010-10-25 03:23:39 $ */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Private component of the Atmega1281 serial port HPL. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ #include module HplAtm128UartP { provides interface Init as Uart0Init; provides interface StdControl as Uart0TxControl; provides interface StdControl as Uart0RxControl; provides interface HplAtm128Uart as HplUart0; provides interface Init as Uart1Init; provides interface StdControl as Uart1TxControl; provides interface StdControl as Uart1RxControl; provides interface HplAtm128Uart as HplUart1; provides interface McuPowerOverride; uses interface Atm128Calibrate; uses interface McuPowerState; } implementation { //=== Uart Init Commands. ==================================== command error_t Uart0Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr0; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR0L = ubrr0; UBRR0H = ubrr0 >> 8; UCSR0A = stts.flat; UCSR0C = mode.flat; UCSR0B = ctrl.flat; return SUCCESS; } command error_t Uart0TxControl.start() { SET_BIT(UCSR0B, TXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0TxControl.stop() { CLR_BIT(UCSR0B, TXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.start() { SET_BIT(UCSR0B, RXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.stop() { CLR_BIT(UCSR0B, RXEN0); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart0.enableTxIntr() { SET_BIT(UCSR0A, TXC0); SET_BIT(UCSR0B, TXCIE0); return SUCCESS; } async command error_t HplUart0.disableTxIntr(){ CLR_BIT(UCSR0B, TXCIE0); return SUCCESS; } async command error_t HplUart0.enableRxIntr(){ SET_BIT(UCSR0B, RXCIE0); return SUCCESS; } async command error_t HplUart0.disableRxIntr(){ CLR_BIT(UCSR0B, RXCIE0); return SUCCESS; } async command bool HplUart0.isTxEmpty(){ return READ_BIT(UCSR0A, TXC0); } async command bool HplUart0.isRxEmpty(){ return !READ_BIT(UCSR0A, RXC0); } async command uint8_t HplUart0.rx(){ return UDR0; } async command void HplUart0.tx(uint8_t data) { atomic{ UDR0 = data; SET_BIT(UCSR0A, TXC0); } } AVR_ATOMIC_HANDLER(USART0_RX_vect) { if (READ_BIT(UCSR0A, RXC0)) { signal HplUart0.rxDone(UDR0); } } AVR_NONATOMIC_HANDLER(USART0_TX_vect) { signal HplUart0.txDone(); } command error_t Uart1Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr1; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR1L = ubrr1; UBRR1H = ubrr1 >> 8; UCSR1A = stts.flat; UCSR1C = mode.flat; UCSR1B = ctrl.flat; return SUCCESS; } command error_t Uart1TxControl.start() { SET_BIT(UCSR1B, TXEN1); CLR_BIT(UCSR1B, TXCIE1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1TxControl.stop() { CLR_BIT(UCSR1B, TXEN1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.start() { SET_BIT(UCSR1B, RXEN1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.stop() { CLR_BIT(UCSR1B, RXEN1); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart1.enableTxIntr() { SET_BIT(UCSR1A, TXC1); SET_BIT(UCSR1B, TXCIE1); return SUCCESS; } async command error_t HplUart1.disableTxIntr(){ CLR_BIT(UCSR1B, TXCIE1); return SUCCESS; } async command error_t HplUart1.enableRxIntr(){ SET_BIT(UCSR1B, RXCIE1); return SUCCESS; } async command error_t HplUart1.disableRxIntr(){ CLR_BIT(UCSR1B, RXCIE1); return SUCCESS; } async command bool HplUart1.isTxEmpty() { return READ_BIT(UCSR1A, TXC1); } async command bool HplUart1.isRxEmpty() { return !READ_BIT(UCSR1A, RXC1); } async command uint8_t HplUart1.rx(){ return UDR1; } async command void HplUart1.tx(uint8_t data) { atomic{ UDR1 = data; SET_BIT(UCSR1A, TXC1); } } AVR_ATOMIC_HANDLER(USART1_RX_vect) { if (READ_BIT(UCSR1A, RXC1)) signal HplUart1.rxDone(UDR1); } AVR_NONATOMIC_HANDLER(USART1_TX_vect) { signal HplUart1.txDone(); } async command mcu_power_t McuPowerOverride.lowestState() { if ( (UCSR0B & (1< RFA1RadioOffP; McuInitP.MeasureClock -> MeasureClockC; #ifdef TOGGLE_ON_SLEEP // this is a HACK, but becasue of some compiling issues we // cannot make McuSleepC into a configuration, so we wire here components McuSleepC, LedsC; McuSleepC.Leds -> LedsC; #endif } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/McuInitP.nc000066400000000000000000000054621207233610700215030ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" module McuInitP @safe() { provides interface Init; uses { interface Init as MeasureClock; interface Init as TimerInit; interface Init as AdcInit; interface Init as RadioInit; } } implementation { error_t systemClockInit() { // set the clock prescaler atomic { // enable changing the prescaler CLKPR = 0x80; #if PLATFORM_MHZ == 16 CLKPR = 0x0F; #elif PLATFORM_MHZ == 8 CLKPR = 0x00; #elif PLATFORM_MHZ == 4 CLKPR = 0x01; #elif PLATFORM_MHZ == 2 CLKPR = 0x02; #elif PLATFORM_MHZ == 1 CLKPR = 0x03; #else #error "Unsupported MHZ" #endif } return SUCCESS; } command error_t Init.init() { error_t ok; DRTRAM0 |= 1< */ module McuSleepC @safe() { provides { interface McuSleep; interface McuPowerState; } uses { interface McuPowerOverride; interface Leds @atmostonce(); } } implementation { /* Note that the power values are maintained in an order * based on their active components, NOT on their values. * Look at atm1281hardware.h and page 54 of the ATmeg1281 * manual (Table 25).*/ const_uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = { 0, //IDLE (1 << SM0), //ADC_NR (1 << SM2) | (1 << SM1) | (1 << SM0), //EXT_STDBY (1 << SM1) | (1 << SM0), //POWER_SAVE (1 << SM2) | (1 << SM1), //STDBY (1 << SM1) //POWER_DOWN }; norace int8_t powerState = -1; async command void McuSleep.sleep() { if( powerState < 0 ) { powerState = call McuPowerOverride.lowestState(); SMCR = (SMCR & 0xf0) | read_uint8_t(&atm128PowerBits[powerState]); } #ifdef TOGGLE_ON_SLEEP if( powerState >= ATM128_POWER_SAVE ) call Leds.led0Off(); #endif SET_BIT(SMCR, SE); sei(); // All of memory may change at this point... asm volatile ("sleep" : : : "memory"); cli(); CLR_BIT(SMCR, SE); #ifdef TOGGLE_ON_SLEEP call Leds.led0On(); #endif } async command void McuPowerState.update() { powerState = -1; } default async command mcu_power_t McuPowerOverride.lowestState() { return ATM128_POWER_DOWN; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/adc/000077500000000000000000000000001207233610700202115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/adc/Atm128Adc.h000066400000000000000000000145541207233610700217570ustar00rootroot00000000000000// $Id: Atm128Adc.h,v 1.2 2010-09-20 08:12:04 szabomeister Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. * * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR * MODIFICATIONS. */ // @author Martin Turon // @author Hu Siquan /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * */ // @author Janos Sallai /* Updated chips/atm128 to include atm1281's ADCSRB register. */ #ifndef _H_Atm128ADC_h #define _H_Atm128ADC_h //================== 8 channel 10-bit ADC ============================== /* Voltage Reference Settings */ enum { ATM128_ADC_VREF_OFF = 0, //!< VR+ = AREF and VR- = GND ATM128_ADC_VREF_AVDD = 1,//!< VR+ = AVDD(1.8V) and VR- = GND ATM128_ADC_VREF_1_5 = 2, //!< VR+ = 1.5V and VR- = GND ATM128_ADC_VREF_1_6 = 3, //!< VR+ = 1.6V and VR- = GND ATM128_ADC_VREF_AVCC = ATM128_ADC_VREF_AVDD, //backward compatibility }; /* Voltage Reference Settings */ enum { ATM128_ADC_RIGHT_ADJUST = 0, ATM128_ADC_LEFT_ADJUST = 1, }; /* ADC Multiplexer Settings */ enum { ATM128_ADC_SNGL_ADC0 = 0, ATM128_ADC_SNGL_ADC1, ATM128_ADC_SNGL_ADC2, ATM128_ADC_SNGL_ADC3, ATM128_ADC_SNGL_ADC4, ATM128_ADC_SNGL_ADC5, ATM128_ADC_SNGL_ADC6, ATM128_ADC_SNGL_ADC7, ATM128_ADC_DIFF_ADC00_10x, ATM128_ADC_DIFF_ADC10_10x, ATM128_ADC_DIFF_ADC00_200x, ATM128_ADC_DIFF_ADC10_200x, ATM128_ADC_DIFF_ADC22_10x, ATM128_ADC_DIFF_ADC32_10x, ATM128_ADC_DIFF_ADC22_200x, ATM128_ADC_DIFF_ADC32_200x, ATM128_ADC_DIFF_ADC01_1x, ATM128_ADC_DIFF_ADC11_1x, ATM128_ADC_DIFF_ADC21_1x, ATM128_ADC_DIFF_ADC31_1x, ATM128_ADC_DIFF_ADC41_1x, ATM128_ADC_DIFF_ADC51_1x, ATM128_ADC_DIFF_ADC61_1x, ATM128_ADC_DIFF_ADC71_1x, ATM128_ADC_DIFF_ADC02_1x, ATM128_ADC_DIFF_ADC12_1x, ATM128_ADC_DIFF_ADC22_1x, ATM128_ADC_DIFF_ADC32_1x, ATM128_ADC_DIFF_ADC42_1x, ATM128_ADC_DIFF_ADC52_1x, ATM128_ADC_SNGL_1_23, ATM128_ADC_SNGL_GND, ATM128_ADC_INT_TEMP = 41, ATM128_ADC_INT_VDRTBBP = 52, ATM128_ADC_INT_VDRTBBN = 61, }; /* ADC Multiplexer Selection Register */ typedef struct { uint8_t mux : 5; //!< Analog Channel and Gain Selection Bits uint8_t adlar : 1; //!< ADC Left Adjust Result uint8_t refs : 2; //!< Reference Selection Bits } Atm128Admux_t; /* ADC Prescaler Settings */ /* Note: each platform must define ATM128_ADC_PRESCALE to the smallest prescaler which guarantees full A/D precision. */ enum { ATM128_ADC_PRESCALE_2 = 0, ATM128_ADC_PRESCALE_2b, ATM128_ADC_PRESCALE_4, ATM128_ADC_PRESCALE_8, ATM128_ADC_PRESCALE_16, ATM128_ADC_PRESCALE_32, ATM128_ADC_PRESCALE_64, ATM128_ADC_PRESCALE_128, // This special value is used to ask the platform for the prescaler // which gives full precision. ATM128_ADC_PRESCALE }; /* ADC Enable Settings */ enum { ATM128_ADC_ENABLE_OFF = 0, ATM128_ADC_ENABLE_ON, }; /* ADC Start Conversion Settings */ enum { ATM128_ADC_START_CONVERSION_OFF = 0, ATM128_ADC_START_CONVERSION_ON, }; /* ADC Free Running Select Settings */ enum { ATM128_ADC_FREE_RUNNING_OFF = 0, ATM128_ADC_FREE_RUNNING_ON, }; /* ADC Interrupt Flag Settings */ enum { ATM128_ADC_INT_FLAG_OFF = 0, ATM128_ADC_INT_FLAG_ON, }; /* ADC Interrupt Enable Settings */ enum { ATM128_ADC_INT_ENABLE_OFF = 0, ATM128_ADC_INT_ENABLE_ON, }; /* ADC Multiplexer Selection Register */ typedef struct { uint8_t adps : 3; //!< ADC Prescaler Select Bits uint8_t adie : 1; //!< ADC Interrupt Enable uint8_t adif : 1; //!< ADC Interrupt Flag uint8_t adate : 1; //!< ADC Auto Trigger Enable uint8_t adsc : 1; //!< ADC Start Conversion uint8_t aden : 1; //!< ADC Enable } Atm128Adcsra_t; /* ADC Multiplexer Selection Register */ typedef struct { uint8_t adts : 3; //!< ADC Trigger Select uint8_t mux5 : 1; //!< Analog Channel and Gain Selection Bit uint8_t acch : 1; //!< Analog Channel Change uint8_t refok : 1; //!< Reference Voltage OK uint8_t acme : 1; //!< Analog Comparator Multiplexer Enable uint8_t avddok: 1; //!< AVDD Supply Voltage OK } Atm128Adcsrb_t; typedef uint8_t Atm128_ADCH_t; //!< ADC data register high typedef uint8_t Atm128_ADCL_t; //!< ADC data register low // The resource identifier string for the ADC subsystem #define UQ_ATM128ADC_RESOURCE "atm128adc.resource" #endif //_H_Atm128ADC_h tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/adc/Atm128AdcC.nc000066400000000000000000000055001207233610700222220ustar00rootroot00000000000000/// $Id: Atm128AdcC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "Atm128Adc.h" /** * HAL for the Atmega128 A/D conversion susbsystem. * * @author Hu Siquan * @author David Gay */ configuration Atm128AdcC { provides { interface Resource[uint8_t client]; interface Atm128AdcSingle; interface Atm128AdcMultiple; } uses interface ResourceConfigure[uint8_t client]; } implementation { components Atm128AdcP, HplAtm128AdcC, McuInitC, MainC, PlatformC, new RoundRobinArbiterC(UQ_ATM128ADC_RESOURCE) as AdcArbiter, new AsyncStdControlPowerManagerC() as PM; Resource = AdcArbiter; ResourceConfigure = AdcArbiter; Atm128AdcSingle = Atm128AdcP; Atm128AdcMultiple = Atm128AdcP; McuInitC.AdcInit -> Atm128AdcP; Atm128AdcP.HplAtm128Adc -> HplAtm128AdcC; Atm128AdcP.Atm128Calibrate -> PlatformC; PM.AsyncStdControl -> Atm128AdcP; PM.ResourceDefaultOwner -> AdcArbiter; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/adc/Atm128AdcP.nc000066400000000000000000000226711207233610700222470ustar00rootroot00000000000000/* $Id: Atm128AdcP.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $ * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * Internal component of the Atmega128 A/D HAL. * * @author Jason Hill * @author David Gay * @author Philip Levis * @author Phil Buonadonna * @author Hu Siquan * @author Janos Sallai * @author Andras Biro */ module Atm128AdcP @safe() { provides { interface Init; interface AsyncStdControl; interface Atm128AdcSingle; interface Atm128AdcMultiple; } uses { interface HplAtm128Adc; interface Atm128Calibrate; } } implementation { /* State for the current and next (multiple-sampling only) conversion */ struct { bool multiple : 1; /* single and multiple-sampling mode */ bool precise : 1; /* is this result going to be precise? */ uint8_t channel : 6; /* what channel did this sample come from? */ } f, nextF; command error_t Init.init() { atomic { Atm128Adcsra_t adcsr; adcsr.aden = ATM128_ADC_ENABLE_OFF; adcsr.adsc = ATM128_ADC_START_CONVERSION_OFF; adcsr.adate = ATM128_ADC_FREE_RUNNING_OFF; adcsr.adif = ATM128_ADC_INT_FLAG_OFF; adcsr.adie = ATM128_ADC_INT_ENABLE_OFF; adcsr.adps = ATM128_ADC_PRESCALE_2; call HplAtm128Adc.setAdcsra(adcsr); } return SUCCESS; } /* We enable the A/D when start is called, and disable it when stop is * called. This drops A/D conversion latency by a factor of two (but * increases idle mode power consumption a little). */ async command error_t AsyncStdControl.start() { atomic call HplAtm128Adc.enableAdc(); return SUCCESS; } async command error_t AsyncStdControl.stop() { atomic call HplAtm128Adc.disableAdc(); return SUCCESS; } /* Return TRUE if switching to 'channel' with reference voltage 'refVoltage' * will give a precise result (the first sample after changing reference * voltage or switching to/between a differential channel is imprecise) */ inline bool isPrecise(uint8_t currentChannel, uint8_t currentRefVoltage, uint8_t channel, uint8_t refVoltage) { return refVoltage == currentRefVoltage && (channel <= ATM128_ADC_SNGL_ADC7 || channel >= ATM128_ADC_SNGL_1_23 || channel == currentChannel); } async event void HplAtm128Adc.dataReady(uint16_t data) { bool precise, multiple; uint8_t channel; atomic { channel = f.channel; precise = f.precise; multiple = f.multiple; } if (!multiple) { /* A single sample. Disable the ADC interrupt to avoid starting * a new sample at the next "sleep" instruction. */ call HplAtm128Adc.disableInterruption(); signal Atm128AdcSingle.dataReady(data, precise); } else { /* Multiple sampling. The user can: * - tell us to stop sampling * - or, to continue sampling on a new channel, possibly with a * new reference voltage; however this change applies not to * the next sample (the hardware has already started working on * that), but on the one after. */ bool cont; uint8_t nextChannel, nextVoltage; atomic { nextVoltage = call HplAtm128Adc.getRef(); nextChannel = call HplAtm128Adc.getChannel(); } cont = signal Atm128AdcMultiple.dataReady(data, precise, channel, &nextChannel, &nextVoltage); atomic if (cont) { /* Switch channels and update our internal channel+precision * tracking state (f and nextF). Note that this tracking will * be incorrect if we take too long to get to this point. */ call HplAtm128Adc.setChannel(nextChannel); call HplAtm128Adc.setRef(nextVoltage); f = nextF; nextF.channel = nextChannel; nextF.precise = isPrecise(call HplAtm128Adc.getChannel(), call HplAtm128Adc.getRef(), nextChannel, nextVoltage); } else call HplAtm128Adc.cancel(); } } /* Start sampling based on request parameters */ void getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { Atm128Adcsra_t adcsr; f.precise = isPrecise(call HplAtm128Adc.getChannel(), call HplAtm128Adc.getRef(), channel, refVoltage); f.channel = channel; call HplAtm128Adc.setChannel(channel); call HplAtm128Adc.setAdlar(leftJustify); call HplAtm128Adc.setRef(refVoltage); adcsr.aden = ATM128_ADC_ENABLE_ON; adcsr.adsc = ATM128_ADC_START_CONVERSION_ON; adcsr.adate = f.multiple; adcsr.adif = ATM128_ADC_INT_FLAG_ON; // clear any stale flag adcsr.adie = ATM128_ADC_INT_ENABLE_ON; if (prescaler == ATM128_ADC_PRESCALE) prescaler = call Atm128Calibrate.adcPrescaler(); adcsr.adps = prescaler; call HplAtm128Adc.setAdcsra(adcsr); } async command bool Atm128AdcSingle.getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { atomic { f.multiple = FALSE; getData(channel, refVoltage, leftJustify, prescaler); return f.precise; } } async command bool Atm128AdcSingle.cancel() { /* There is no Atm128AdcMultiple.cancel, for reasons discussed in that * interface */ return call HplAtm128Adc.cancel(); } async command bool Atm128AdcMultiple.getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) { atomic { f.multiple = TRUE; getData(channel, refVoltage, leftJustify, prescaler); nextF = f; /* We assume the 2nd sample is precise */ nextF.precise = TRUE; return f.precise; } } default async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) { } default async event bool Atm128AdcMultiple.dataReady(uint16_t data, bool precise, uint8_t channel, uint8_t *newChannel, uint8_t *newRefVoltage) { return FALSE; // stop conversion if we somehow end up here. } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/adc/HplAtm128Adc.nc000066400000000000000000000126411207233610700225670ustar00rootroot00000000000000/// $Id: HplAtm128Adc.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL interface to the Atmega128 A/D conversion subsystem. Please see the * Atmega128 manual for full details on the functioning of this subsystem. *

    * A word of warning: the Atmega128 SLEEP instruction initiates an A/D * conversion when the ADC and ADC interrupt are enabled. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ interface HplAtm128Adc { /** * Sets the ADC channel * @param mux New channel */ async command void setChannel(uint8_t mux); /** * Returns the current ADC channel * @return Current channel */ async command uint8_t getChannel(); /** * Turns ADLAR (ADC left adjust result) on/off * @param adlarOn TRUE turns on ADLAR, FALSE turns it off */ async command void setAdlar(bool adlarOn); /** * Returns ADLAR (ADC left adjust result) status * @returns TRUE if ADLAR is on. */ async command bool isAdlarOn(); /** * Sets the reference voltage * @param ref New reference voltage */ async command void setRef(uint8_t ref); /** * Returns the current reference voltage * @returns the current reference voltage */ async command uint8_t getRef(); /** * Read the ADCSRA (ADC control) register * @return Current ADCSRA value */ async command Atm128Adcsra_t getAdcsra(); /** * Set the ADCSRA (ADC control) register * @param adcsra New ADCSRA value */ async command void setAdcsra(Atm128Adcsra_t adcsra); /** * Read the latest A/D conversion result * @return A/D value */ async command uint16_t getValue(); /// A/D control utilities. All of these clear any pending A/D interrupt. /** * Enable ADC sampling */ async command void enableAdc(); /** * Disable ADC sampling */ async command void disableAdc(); /** * Enable ADC interrupt */ async command void enableInterruption(); /** * Disable ADC interrupt */ async command void disableInterruption(); /** * Clear the ADC interrupt flag */ async command void resetInterrupt(); /** * Start ADC conversion. If ADC interrupts are enabled, the dataReady event * will be signaled once (in non-continuous mode) or repeatedly (in * continuous mode). */ async command void startConversion(); /** * Enable continuous sampling */ async command void setContinuous(); /** * Disable continuous sampling */ async command void setSingle(); /* A/D status checks */ /** * Is ADC enabled? * @return TRUE if the ADC is enabled, FALSE otherwise */ async command bool isEnabled(); /** * Is A/D conversion in progress? * @return TRUE if the A/D conversion is in progress, FALSE otherwise */ async command bool isStarted(); /** * Is A/D conversion complete? Note that this flag is automatically * cleared when an A/D interrupt occurs. * @return TRUE if the A/D conversion is complete, FALSE otherwise */ async command bool isComplete(); /** * Set ADC prescaler selection bits * @param scale New ADC prescaler. Must be one of the ATM128_ADC_PRESCALE_xxx * values from Atm128Adc.h */ async command void setPrescaler(uint8_t scale); /** * Cancel A/D conversion and any pending A/D interrupt. Also disables the * ADC interruption (otherwise a sample might start at the next sleep * instruction). This command can assume that the A/D converter is enabled. * @return TRUE if an A/D conversion was in progress or an A/D interrupt * was pending, FALSE otherwise. In single conversion mode, a return * of TRUE implies that the dataReady event will not be signaled. */ async command bool cancel(); /** * A/D interrupt occured * @param data Latest A/D conversion result */ async event void dataReady(uint16_t data); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/adc/HplAtm128AdcC.nc000066400000000000000000000040631207233610700226710ustar00rootroot00000000000000/// $Id: HplAtm128AdcC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL for the Atmega128 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ configuration HplAtm128AdcC { provides interface HplAtm128Adc; } implementation { components HplAtm128AdcP, McuSleepC; HplAtm128Adc = HplAtm128AdcP; HplAtm128AdcP.McuPowerState -> McuSleepC; HplAtm128AdcP.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/adc/HplAtm128AdcP.nc000066400000000000000000000140621207233610700227060ustar00rootroot00000000000000/// $Id: HplAtm128AdcP.nc,v 1.1 2010-11-10 11:05:37 andrasbiro Exp $ /* * Copyright (c) 2007, Vanderbilt University * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL for the Atmega1281 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay * @author Janos Sallai */ module HplAtm128AdcP @safe() { provides interface HplAtm128Adc; provides interface McuPowerOverride; uses interface McuPowerState; } implementation { async command void HplAtm128Adc.setChannel(uint8_t mux){ ADMUX = (ADMUX & 0xE0) | (mux & 0x1F); //upper 3 bits: unchanged; lower 5 bits: mux if(mux & 0x20) ADCSRB |= (1 << MUX5); else ADCSRB &= ~(1 << MUX5); } async command uint8_t HplAtm128Adc.getChannel(){ return (ADMUX & 0x1F) | (((ADCSRB & MUX5) >> MUX5) << 5); } async command void HplAtm128Adc.setAdlar(bool adlarOn){ if(adlarOn) ADMUX |= 1<> REFS0 ); } //TODO: this should be eliminated //=== Direct read of HW registers. ================================= async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { return *(Atm128Adcsra_t*)&ADCSRA; } async command uint16_t HplAtm128Adc.getValue() { return ADC; } DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t); DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t); //TODO: this should be eliminated //=== Direct write of HW registers. ================================ async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { ADCSRA = Adcsra2int(x); } async command void HplAtm128Adc.setPrescaler(uint8_t scale){ Atm128Adcsra_t current_val = call HplAtm128Adc.getAdcsra(); current_val.adif = FALSE; current_val.adps = scale; call HplAtm128Adc.setAdcsra(current_val); } // Individual bit manipulation. These all clear any pending A/D interrupt. // It's not clear these are that useful... async command void HplAtm128Adc.enableAdc() { SET_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.disableAdc() { CLR_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.setContinuous() { ((Atm128Adcsrb_t*)&ADCSRB)->adts = 0; SET_BIT(ADCSRA, ADATE); } async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADATE); } async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); } async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); } /* A/D status checks */ async command bool HplAtm128Adc.isEnabled() { return (call HplAtm128Adc.getAdcsra()).aden; } async command bool HplAtm128Adc.isStarted() { return (call HplAtm128Adc.getAdcsra()).adsc; } async command bool HplAtm128Adc.isComplete() { return (call HplAtm128Adc.getAdcsra()).adif; } /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */ AVR_ATOMIC_HANDLER(ADC_vect) { uint16_t data = call HplAtm128Adc.getValue(); __nesc_enable_interrupt(); signal HplAtm128Adc.dataReady(data); } default async event void HplAtm128Adc.dataReady(uint16_t done) { } async command mcu_power_t McuPowerOverride.lowestState() { if(bit_is_set(ADCSRA,ADEN)) { return ATM128_POWER_ADC_NR; } else return ATM128_POWER_DOWN; } async command bool HplAtm128Adc.cancel() { /* This is tricky */ atomic { Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr; /* To cancel a conversion, first turn off ADEN, then turn off ADSC. We also cancel any pending interrupt. Finally we reenable the ADC. */ newSr = oldSr; newSr.aden = FALSE; newSr.adif = TRUE; /* This clears a pending interrupt... */ newSr.adie = FALSE; /* We don't want to start sampling again at the next sleep */ call HplAtm128Adc.setAdcsra(newSr); newSr.adsc = FALSE; call HplAtm128Adc.setAdcsra(newSr); newSr.aden = TRUE; call HplAtm128Adc.setAdcsra(newSr); return oldSr.adif || oldSr.adsc; } } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/atm128hardware.h000066400000000000000000000153771207233610700224020ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2002-2003 Intel Corporation. * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written * agreement is hereby granted, provided that the above copyright * notice, the (updated) modification history and the author appear in * all copies of this source code. * * Permission is also granted to distribute this software under the * standard BSD license as contained in the TinyOS distribution. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * */ /* * Updated chips/atm128/atm128hardware.h with atm1281's MCU status and * memory control registers. * * @author Janos Sallai, Martin Turon, Jason Hill, Philip Levis, Nelson Lee, David Gay */ #ifndef _H_atmega128hardware_H #define _H_atmega128hardware_H #include #if __AVR_LIBC_VERSION__ >= 10400UL #include #else #include #include #endif #include #include #include "atm128const.h" /* We need slightly different defs than SIGNAL, INTERRUPT */ #define AVR_ATOMIC_HANDLER(signame) \ void signame() __attribute__ ((signal)) @atomic_hwevent() @C() #define AVR_NONATOMIC_HANDLER(signame) \ void signame() __attribute__ ((interrupt)) @hwevent() @C() /* Macro to create union casting functions. */ #define DEFINE_UNION_CAST(func_name, from_type, to_type) \ to_type func_name(from_type x) { \ union {from_type f; to_type t;} c = {f:x}; return c.t; } // Bit operators using bit number #define SET_BIT(port, bit) ((port) |= _BV(bit)) #define CLR_BIT(port, bit) ((port) &= ~_BV(bit)) #define READ_BIT(port, bit) (((port) & _BV(bit)) != 0) #define FLIP_BIT(port, bit) ((port) ^= _BV(bit)) #define WRITE_BIT(port, bit, value) \ if (value) SET_BIT((port), (bit)); \ else CLR_BIT((port), (bit)) // Bit operators using bit flag mask #define SET_FLAG(port, flag) ((port) |= (flag)) #define CLR_FLAG(port, flag) ((port) &= ~(flag)) #define READ_FLAG(port, flag) ((port) & (flag)) /* Enables interrupts. */ inline void __nesc_enable_interrupt() @safe() { sei(); } /* Disables all interrupts. */ inline void __nesc_disable_interrupt() @safe() { cli(); } /* Defines data type for storing interrupt mask state during atomic. */ typedef uint8_t __nesc_atomic_t; __nesc_atomic_t __nesc_atomic_start(void); void __nesc_atomic_end(__nesc_atomic_t original_SREG); #ifndef NESC_BUILD_BINARY /* @spontaneous() functions should not be included when NESC_BUILD_BINARY is #defined, to avoid duplicate functions definitions wheb binary components are used. Such functions do need a prototype in all cases, though. */ /* Saves current interrupt mask state and disables interrupts. */ inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { __nesc_atomic_t result = SREG; __nesc_disable_interrupt(); asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ return result; } /* Restores interrupt mask to original state. */ inline void __nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous() @safe() { asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ SREG = original_SREG; } #endif /* Defines the mcu_power_t type for atm128 power management. */ typedef uint8_t mcu_power_t @combine("mcombine"); enum { ATM128_POWER_IDLE = 0, ATM128_POWER_ADC_NR = 1, ATM128_POWER_EXT_STANDBY = 2, ATM128_POWER_SAVE = 3, ATM128_POWER_STANDBY = 4, ATM128_POWER_DOWN = 5, }; /* Combine function. */ mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() { return (m1 < m2)? m1: m2; } /* MCU Status Register*/ typedef struct { uint8_t porf : 1; //!< Power-on Reset Flag uint8_t extrf : 1; //!< External Reset Flag uint8_t borf : 1; //!< Brown-out Reset Flag uint8_t wdrf : 1; //!< Watchdog Reset Flag uint8_t jtrf : 1; //!< JTAG Reset Flag uint8_t resv1 : 3; //!< Reserved } Atm128_MCUSR_t; /* Floating-point network-type support. These functions must convert to/from a 32-bit big-endian integer that follows the layout of Java's java.lang.float.floatToRawIntBits method. Conveniently, for the AVR family, this is a straight byte copy... */ typedef float nx_float __attribute__((nx_base_be(afloat))); inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() { float f; memcpy(&f, source, sizeof(float)); return f; } inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() { memcpy(target, &value, sizeof(float)); return value; } #endif //_H_atmega128hardware_H tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/i2c/000077500000000000000000000000001207233610700201375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/i2c/HplAtm128I2CBusC.nc000066400000000000000000000042411207233610700231550ustar00rootroot00000000000000/* * Copyright (c) 2004-2006 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This driver implements direct I2C register access and a blocking master * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its * two-wire-interface (TWI) hardware subsystem. * * @author Martin Turon * @author Philip Levis */ configuration HplAtm128I2CBusC { provides interface HplAtm128I2CBus as I2C; } implementation { components AtmegaGeneralIOC as IO, HplAtm128I2CBusP as Bus, McuSleepC; I2C = Bus.I2C; Bus.I2CClk -> IO.PortD0; Bus.I2CData -> IO.PortD1; Bus.McuPowerState -> McuSleepC; Bus.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/i2c/HplAtm128I2CBusP.nc000066400000000000000000000122051207233610700231710ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef I2C_PRESCALER #define I2C_PRESCALER 0 #endif #ifndef I2C_BITRATE #ifndef I2C_FREQ #define I2C_FREQ 50000U #endif #define TWBR_VALUE(cpu_mhz) ( ((cpu_mhz*500000)/I2C_FREQ)-8 ) #define I2C_BITRATE TWBR_VALUE(PLATFORM_MHZ) #endif #include "Atm128I2C.h" /** * This driver implements direct I2C register access and a blocking master * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its * two-wire-interface (TWI) hardware subsystem. * * @author Martin Turon * @author Philip Levis */ module HplAtm128I2CBusP { provides interface HplAtm128I2CBus as I2C; provides interface McuPowerOverride; uses { interface GeneralIO as I2CClk; interface GeneralIO as I2CData; interface McuPowerState; } } implementation { uint8_t current; async command void I2C.init(bool hasExternalPulldown) { // Set the internal pullup resisters if (hasExternalPulldown) { call I2CClk.set(); call I2CData.set(); } TWSR=I2C_PRESCALER; TWBR=I2C_BITRATE; TWAR = 0; TWCR = 0; } async command void I2C.off() { call I2CClk.clr(); call I2CData.clr(); } async command uint8_t I2C.status() { return TWSR & 0xf8; } async command void I2C.sendCommand() { atomic TWCR = current; } async command void I2C.readCurrent() { atomic current = TWCR; } /** Send START symbol and begin I2C bus transaction. */ async command void I2C.setStart(bool on) { if (on) { atomic SET_BIT(current, TWSTA); } else { atomic CLR_BIT(current, TWSTA); } } async command bool I2C.hasStart() { return READ_BIT(current, TWSTA); } async command void I2C.setStop(bool on) { if (on) { atomic SET_BIT(current, TWSTO); } else { atomic CLR_BIT(current, TWSTO); } } async command bool I2C.hasStop() { return READ_BIT(current, TWSTO); } /** Write a byte to an I2C slave device. */ async command void I2C.write(uint8_t data) { TWDR = data; } async command uint8_t I2C.read() { return TWDR; } async command void I2C.enableAck(bool enable) { if (enable) { atomic SET_BIT(current, TWEA); } else { atomic CLR_BIT(current, TWEA); } } async command bool I2C.hasAcks() { return READ_BIT(current, TWEA); } async command void I2C.enableInterrupt(bool enable) { if (enable) { atomic SET_BIT(current, TWIE); } else { atomic CLR_BIT(current, TWIE); } } async command bool I2C.isInterruptEnabled() { return READ_BIT(current, TWIE); } async command bool I2C.isRealInterruptPending() { return READ_BIT(TWCR, TWINT); } async command bool I2C.isInterruptPending() { return READ_BIT(current, TWINT); } async command void I2C.setInterruptPending(bool on) { if (on) { atomic SET_BIT(current, TWINT); } else { atomic CLR_BIT(current, TWINT); } } async command void I2C.enable(bool enable) { if (enable) { atomic SET_BIT(current, TWEN); } else { atomic CLR_BIT(current, TWEN); } call McuPowerState.update(); } async command bool I2C.isEnabled() { return READ_BIT(current, TWEN); } async command bool I2C.hasWriteCollided() { return READ_BIT(current, TWWC); } async command mcu_power_t McuPowerOverride.lowestState() { if(bit_is_set(TWCR,TWEN)) { return ATM128_POWER_IDLE; } else return ATM128_POWER_DOWN; } default async event void I2C.commandComplete() { } AVR_ATOMIC_HANDLER(TWI_vect) { signal I2C.commandComplete(); } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/000077500000000000000000000000001207233610700204335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/AtmegaExtInterruptC.nc000066400000000000000000000054731207233610700246650ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration AtmegaExtInterruptC { provides interface GpioInterrupt[uint8_t vector]; } implementation { components HplAtmegaExtInterruptC; components new AtmegaExtInterruptP(FALSE) as Int0P; components new AtmegaExtInterruptP(FALSE) as Int1P; components new AtmegaExtInterruptP(FALSE) as Int2P; components new AtmegaExtInterruptP(FALSE) as Int3P; components new AtmegaExtInterruptP(TRUE) as Int4P; components new AtmegaExtInterruptP(TRUE) as Int5P; components new AtmegaExtInterruptP(TRUE) as Int6P; components new AtmegaExtInterruptP(TRUE) as Int7P; GpioInterrupt[0] = Int0P; GpioInterrupt[1] = Int1P; GpioInterrupt[2] = Int2P; GpioInterrupt[3] = Int3P; GpioInterrupt[4] = Int4P; GpioInterrupt[5] = Int5P; GpioInterrupt[6] = Int6P; GpioInterrupt[7] = Int7P; HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[0] <- Int0P; HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[1] <- Int1P; HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[2] <- Int2P; HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[3] <- Int3P; HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[4] <- Int4P; HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[5] <- Int5P; HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[6] <- Int6P; HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[7] <- Int7P; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/AtmegaExtInterruptP.nc000066400000000000000000000050701207233610700246730ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "HplAtmegaExtInterrupt.h" generic module AtmegaExtInterruptP(bool lowLevel){ uses interface HplAtmegaExtInterrupt; provides interface GpioInterrupt; } implementation{ async command error_t GpioInterrupt.enableRisingEdge(){ atomic{ call HplAtmegaExtInterrupt.setMode(ATMEGA_EXTINT_RISING_EDGE); call HplAtmegaExtInterrupt.enable(); call HplAtmegaExtInterrupt.reset(); } return SUCCESS; } async command error_t GpioInterrupt.enableFallingEdge(){ atomic{ call HplAtmegaExtInterrupt.setMode(lowLevel ? ATMEGA_EXTINT_LOW_LEVEL : ATMEGA_EXTINT_FALLING_EDGE); call HplAtmegaExtInterrupt.enable(); call HplAtmegaExtInterrupt.reset(); } return SUCCESS; } async command error_t GpioInterrupt.disable(){ call HplAtmegaExtInterrupt.disable(); return SUCCESS; } async event void HplAtmegaExtInterrupt.fired(){ signal GpioInterrupt.fired(); } default async event void GpioInterrupt.fired(){} } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/AtmegaGeneralIOC.nc000066400000000000000000000125471207233610700240150ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Martin Turon * @author Miklos Maroti */ configuration AtmegaGeneralIOC { provides { interface GeneralIO as PortA0; interface GeneralIO as PortA1; interface GeneralIO as PortA2; interface GeneralIO as PortA3; interface GeneralIO as PortA4; interface GeneralIO as PortA5; interface GeneralIO as PortA6; interface GeneralIO as PortA7; interface GeneralIO as PortB0; interface GeneralIO as PortB1; interface GeneralIO as PortB2; interface GeneralIO as PortB3; interface GeneralIO as PortB4; interface GeneralIO as PortB5; interface GeneralIO as PortB6; interface GeneralIO as PortB7; interface GeneralIO as PortC0; interface GeneralIO as PortC1; interface GeneralIO as PortC2; interface GeneralIO as PortC3; interface GeneralIO as PortC4; interface GeneralIO as PortC5; interface GeneralIO as PortC6; interface GeneralIO as PortC7; interface GeneralIO as PortD0; interface GeneralIO as PortD1; interface GeneralIO as PortD2; interface GeneralIO as PortD3; interface GeneralIO as PortD4; interface GeneralIO as PortD5; interface GeneralIO as PortD6; interface GeneralIO as PortD7; interface GeneralIO as PortE0; interface GeneralIO as PortE1; interface GeneralIO as PortE2; interface GeneralIO as PortE3; interface GeneralIO as PortE4; interface GeneralIO as PortE5; interface GeneralIO as PortE6; interface GeneralIO as PortE7; interface GeneralIO as PortF0; interface GeneralIO as PortF1; interface GeneralIO as PortF2; interface GeneralIO as PortF3; interface GeneralIO as PortF4; interface GeneralIO as PortF5; interface GeneralIO as PortF6; interface GeneralIO as PortF7; interface GeneralIO as PortG0; interface GeneralIO as PortG1; interface GeneralIO as PortG2; interface GeneralIO as PortG3; interface GeneralIO as PortG4; interface GeneralIO as PortG5; } } implementation { components new AtmegaGeneralIOP((uint8_t)&PORTA, (uint8_t)&DDRA, (uint8_t)&PINA) as PortA; PortA0 = PortA.Pin[0]; PortA1 = PortA.Pin[1]; PortA2 = PortA.Pin[2]; PortA3 = PortA.Pin[3]; PortA4 = PortA.Pin[4]; PortA5 = PortA.Pin[5]; PortA6 = PortA.Pin[6]; PortA7 = PortA.Pin[7]; components new AtmegaGeneralIOP((uint8_t)&PORTB, (uint8_t)&DDRB, (uint8_t)&PINB) as PortB; PortB0 = PortB.Pin[0]; PortB1 = PortB.Pin[1]; PortB2 = PortB.Pin[2]; PortB3 = PortB.Pin[3]; PortB4 = PortB.Pin[4]; PortB5 = PortB.Pin[5]; PortB6 = PortB.Pin[6]; PortB7 = PortB.Pin[7]; components new AtmegaGeneralIOP((uint8_t)&PORTC, (uint8_t)&DDRC, (uint8_t)&PINC) as PortC; PortC0 = PortC.Pin[0]; PortC1 = PortC.Pin[1]; PortC2 = PortC.Pin[2]; PortC3 = PortC.Pin[3]; PortC4 = PortC.Pin[4]; PortC5 = PortC.Pin[5]; PortC6 = PortC.Pin[6]; PortC7 = PortC.Pin[7]; components new AtmegaGeneralIOP((uint8_t)&PORTD, (uint8_t)&DDRD, (uint8_t)&PIND) as PortD; PortD0 = PortD.Pin[0]; PortD1 = PortD.Pin[1]; PortD2 = PortD.Pin[2]; PortD3 = PortD.Pin[3]; PortD4 = PortD.Pin[4]; PortD5 = PortD.Pin[5]; PortD6 = PortD.Pin[6]; PortD7 = PortD.Pin[7]; components new AtmegaGeneralIOP((uint8_t)&PORTE, (uint8_t)&DDRE, (uint8_t)&PINE) as PortE; PortE0 = PortE.Pin[0]; PortE1 = PortE.Pin[1]; PortE2 = PortE.Pin[2]; PortE3 = PortE.Pin[3]; PortE4 = PortE.Pin[4]; PortE5 = PortE.Pin[5]; PortE6 = PortE.Pin[6]; PortE7 = PortE.Pin[7]; components new AtmegaGeneralIOP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF) as PortF; PortF0 = PortF.Pin[0]; PortF1 = PortF.Pin[1]; PortF2 = PortF.Pin[2]; PortF3 = PortF.Pin[3]; PortF4 = PortF.Pin[4]; PortF5 = PortF.Pin[5]; PortF6 = PortF.Pin[6]; PortF7 = PortF.Pin[7]; components new AtmegaGeneralIOP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING) as PortG; PortG0 = PortG.Pin[0]; PortG1 = PortG.Pin[1]; PortG2 = PortG.Pin[2]; PortG3 = PortG.Pin[3]; PortG4 = PortG.Pin[4]; PortG5 = PortG.Pin[5]; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/AtmegaGeneralIOP.nc000066400000000000000000000052151207233610700240240ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Martin Turon * @author David Gay * @author Miklos Maroti */ generic module AtmegaGeneralIOP(uint8_t port_addr, uint8_t ddr_addr, uint8_t pin_addr) @safe() { provides interface GeneralIO as Pin[uint8_t bit]; } implementation { #define pin (*TCAST(volatile uint8_t * ONE, pin_addr)) #define port (*TCAST(volatile uint8_t * ONE, port_addr)) #define ddr (*TCAST(volatile uint8_t * ONE, ddr_addr)) inline async command bool Pin.get[uint8_t bit]() { return (pin & (1< HplAtmegaPinChange0C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/AtmegaPinChange1C.nc000066400000000000000000000035271207233610700241230ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration AtmegaPinChange1C { provides interface GpioInterrupt[uint8_t pin]; } implementation { components HplAtmegaPinChange1C, new AtmegaPinChangeP(); GpioInterrupt = AtmegaPinChangeP; AtmegaPinChangeP.HplAtmegaPinChange -> HplAtmegaPinChange1C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/AtmegaPinChangeP.nc000066400000000000000000000104551207233610700240550ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro, Miklos Maroti */ /* * This module provides emulated edge triggered GpioInterrupt using a * shared pin change interrupt. Note, that this emulation cannot be * perfect, as if one is wating for a rising edge and gets an ON quickly * followed by a OFF signal, then the fired event will miss this and * will not report anything. This emulation works only for external * components that hold their interrupt line long enough (e.g. they * need to be manually cleared via SPI or I2C). * * Also note, that the actual filtering logic is done in the fired * event and we cannot rule out spontaneous interrupts (e.g. by a * pin change interrupt in an uninteresting direction), therefore we * do no clear the interrupt flag when enabling the pin change * interrupt and save on code size. */ generic module AtmegaPinChangeP(){ uses interface HplAtmegaPinChange; provides interface GpioInterrupt[uint8_t pin]; } implementation{ uint8_t isFalling; /* Enables the interrupt */ async command error_t GpioInterrupt.enableRisingEdge[uint8_t pin](){ atomic{ isFalling &= ~(1< McuSleepC; components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF0, (uint8_t)&EIMSK, INT0, (uint8_t)&EICRA, ISC00) as Int0P; components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF1, (uint8_t)&EIMSK, INT1, (uint8_t)&EICRA, ISC10) as Int1P; components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF2, (uint8_t)&EIMSK, INT2, (uint8_t)&EICRA, ISC20) as Int2P; components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF3, (uint8_t)&EIMSK, INT3, (uint8_t)&EICRA, ISC30) as Int3P; components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF4, (uint8_t)&EIMSK, INT4, (uint8_t)&EICRB, ISC40) as Int4P; components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF5, (uint8_t)&EIMSK, INT5, (uint8_t)&EICRB, ISC50) as Int5P; components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF6, (uint8_t)&EIMSK, INT6, (uint8_t)&EICRB, ISC60) as Int6P; components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF7, (uint8_t)&EIMSK, INT7, (uint8_t)&EICRB, ISC70) as Int7P; HplAtmegaExtInterrupt[0] = Int0P; HplAtmegaExtInterrupt[1] = Int1P; HplAtmegaExtInterrupt[2] = Int2P; HplAtmegaExtInterrupt[3] = Int3P; HplAtmegaExtInterrupt[4] = Int4P; HplAtmegaExtInterrupt[5] = Int5P; HplAtmegaExtInterrupt[6] = Int6P; HplAtmegaExtInterrupt[7] = Int7P; HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[0] <- Int0P; HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[1] <- Int1P; HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[2] <- Int2P; HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[3] <- Int3P; HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[4] <- Int4P; HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[5] <- Int5P; HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[6] <- Int6P; HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[7] <- Int7P; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptP.nc000066400000000000000000000061221207233610700253360ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module HplAtmegaExtInterruptP( uint8_t EIFR_ADDR, uint8_t EIFR_PIN, uint8_t EIMSK_ADDR, uint8_t EIMSK_PIN, uint8_t EICR_ADDR, uint8_t EICR_PIN) { provides interface HplAtmegaExtInterrupt; uses interface HplAtmegaExtInterruptSig; } implementation { #define EIFR_REG (*(volatile uint8_t*)(EIFR_ADDR)) #define EIMSK_REG (*(volatile uint8_t*)(EIMSK_ADDR)) #define EICR_REG (*(volatile uint8_t*)(EICR_ADDR)) // ----- external interrupt flag register (EIFR) async event void HplAtmegaExtInterruptSig.fired() { signal HplAtmegaExtInterrupt.fired(); } default async event void HplAtmegaExtInterrupt.fired() { } async command bool HplAtmegaExtInterrupt.test() { return (EIFR_REG & (1<> EICR_PIN) & 3; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptSig.nc000066400000000000000000000034311207233610700256610ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface HplAtmegaExtInterruptSig { /* Signalled when the interrupt is executed */ async event void fired(); /* Called when the interrupt is enabled/disabled */ async command void update(); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptSigP.nc000066400000000000000000000060421207233610700260020ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ module HplAtmegaExtInterruptSigP { provides { interface HplAtmegaExtInterruptSig[uint8_t vector]; interface McuPowerOverride; } uses interface McuPowerState; } implementation { AVR_ATOMIC_HANDLER( INT0_vect ) { signal HplAtmegaExtInterruptSig.fired[0](); } AVR_ATOMIC_HANDLER( INT1_vect ) { signal HplAtmegaExtInterruptSig.fired[1](); } AVR_ATOMIC_HANDLER( INT2_vect ) { signal HplAtmegaExtInterruptSig.fired[2](); } AVR_ATOMIC_HANDLER( INT3_vect ) { signal HplAtmegaExtInterruptSig.fired[3](); } AVR_ATOMIC_HANDLER( INT4_vect ) { signal HplAtmegaExtInterruptSig.fired[4](); } AVR_ATOMIC_HANDLER( INT5_vect ) { signal HplAtmegaExtInterruptSig.fired[5](); } AVR_ATOMIC_HANDLER( INT6_vect ) { signal HplAtmegaExtInterruptSig.fired[6](); } AVR_ATOMIC_HANDLER( INT7_vect ) { signal HplAtmegaExtInterruptSig.fired[7](); } default async event void HplAtmegaExtInterruptSig.fired[uint8_t vector]() { } async command void HplAtmegaExtInterruptSig.update[uint8_t vector]() { if( vector >= 4 ) call McuPowerState.update(); } async command mcu_power_t McuPowerOverride.lowestState() { uint8_t eimsk = EIMSK; uint8_t eicrb = EICRB; if( (eimsk & (1< #ifdef IEEE154FRAMES_ENABLED #error "You cannot use ActiveMessageC with IEEE154FRAMES_ENABLED defined" #endif configuration RFA1ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RFA1RadioC as RadioC; SplitControl = RadioC; AMSend = RadioC; Receive = RadioC.Receive; Snoop = RadioC.Snoop; SendNotifier = RadioC; ReceiveDefault = RadioC.ReceiveDefault; SnoopDefault = RadioC.SnoopDefault; Packet = RadioC.PacketForActiveMessage; AMPacket = RadioC; PacketAcknowledgements = RadioC; LowPowerListening = RadioC; PacketLink = RadioC; RadioChannel = RadioC; PacketLinkQuality = RadioC.PacketLinkQuality; PacketTransmitPower = RadioC.PacketTransmitPower; PacketRSSI = RadioC.PacketRSSI; LinkPacketMetadata = RadioC; LocalTimeRadio = RadioC; PacketTimeStampMilli = RadioC; PacketTimeStampRadio = RadioC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/radio/RFA1DriverConfig.nc000066400000000000000000000044451207233610700241040ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Andras Biro */ interface RFA1DriverConfig { /** * Returns the length of a dummy header to align the payload properly. */ async command uint8_t headerLength(message_t* msg); /** * Returns the maximum length of the PHY payload including the * length field but not counting the FCF field. */ async command uint8_t maxPayloadLength(); /** * Returns the length of a dummy metadata section to align the * metadata section properly. */ async command uint8_t metadataLength(message_t* msg); /** * Returns TRUE if before sending this message we should make sure that * the channel is clear via a very basic (and quick) RSSI check. */ async command bool requiresRssiCca(message_t* msg); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/radio/RFA1DriverLayer.h000066400000000000000000000036041207233610700235760ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Andras Biro */ #ifndef __RFA1DRIVERLAYER_H__ #define __RFA1DRIVERLAYER_H__ typedef nx_struct rfa1_header_t { nxle_uint8_t length; } rfa1_header_t; typedef struct rfa1_metadata_t { uint8_t lqi; union { uint8_t power; uint8_t rssi; }; } rfa1_metadata_t; #endif//__RFA1DRIVERLAYER_H__ tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/radio/RFA1DriverLayerC.nc000066400000000000000000000073731207233610700240610ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Andras Biro */ #include #include configuration RFA1DriverLayerC { provides { interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface Alarm; } uses { interface RFA1DriverConfig as Config; interface PacketTimeStamp; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; } } implementation { components RFA1DriverLayerP, BusyWaitMicroC, TaskletC, LocalTime62khzC, new Alarm62khz32C(), HplAtmRfa1TimerMacC; RadioState = RFA1DriverLayerP; RadioSend = RFA1DriverLayerP; RadioReceive = RFA1DriverLayerP; RadioCCA = RFA1DriverLayerP; RadioPacket = RFA1DriverLayerP; LocalTimeRadio = LocalTime62khzC; Config = RFA1DriverLayerP; PacketTransmitPower = RFA1DriverLayerP.PacketTransmitPower; TransmitPowerFlag = RFA1DriverLayerP.TransmitPowerFlag; PacketRSSI = RFA1DriverLayerP.PacketRSSI; RSSIFlag = RFA1DriverLayerP.RSSIFlag; PacketTimeSyncOffset = RFA1DriverLayerP.PacketTimeSyncOffset; TimeSyncFlag = RFA1DriverLayerP.TimeSyncFlag; PacketLinkQuality = RFA1DriverLayerP.PacketLinkQuality; PacketTimeStamp = RFA1DriverLayerP.PacketTimeStamp; LinkPacketMetadata = RFA1DriverLayerP; RFA1DriverLayerP.LocalTime -> LocalTime62khzC; RFA1DriverLayerP.SfdCapture -> HplAtmRfa1TimerMacC.SfdCapture; Alarm = Alarm62khz32C; RFA1DriverLayerP.Tasklet -> TaskletC; RFA1DriverLayerP.BusyWait -> BusyWaitMicroC; #ifdef RADIO_DEBUG components DiagMsgC; RFA1DriverLayerP.DiagMsg -> DiagMsgC; #endif components MainC, RealMainP; RealMainP.PlatformInit -> RFA1DriverLayerP.PlatformInit; MainC.SoftwareInit -> RFA1DriverLayerP.SoftwareInit; components McuSleepC; RFA1DriverLayerP.McuPowerState -> McuSleepC; RFA1DriverLayerP.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/radio/RFA1DriverLayerP.nc000066400000000000000000000543301207233610700240710ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author:Andras Biro */ #include #include #include #include #include module RFA1DriverLayerP { provides { interface Init as PlatformInit @exactlyonce(); interface Init as SoftwareInit @exactlyonce(); interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; interface McuPowerOverride; } uses { interface BusyWait; interface LocalTime; interface AtmegaCapture as SfdCapture; interface RFA1DriverConfig as Config; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface PacketTimeStamp; interface Tasklet; interface McuPowerState; #ifdef RADIO_DEBUG interface DiagMsg; #endif } } implementation { rfa1_header_t* getHeader(message_t* msg) { return ((void*)msg) + call Config.headerLength(msg); } void* getPayload(message_t* msg) { return ((void*)msg) + call RadioPacket.headerLength(msg); } rfa1_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } /*----------------- STATE -----------------*/ tasklet_norace uint8_t state; enum { STATE_P_ON = 0, STATE_SLEEP = 1, STATE_SLEEP_2_TRX_OFF = 2, STATE_TRX_OFF = 3, STATE_TRX_OFF_2_RX_ON = 4, STATE_RX_ON = 5, STATE_BUSY_TX_2_RX_ON = 6, }; tasklet_norace uint8_t cmd; enum { CMD_NONE = 0, // the state machine has stopped CMD_TURNOFF = 1, // goto SLEEP state CMD_STANDBY = 2, // goto TRX_OFF state CMD_TURNON = 3, // goto RX_ON state CMD_TRANSMIT = 4, // currently transmitting a message CMD_RECEIVE = 5, // currently receiving a message CMD_CCA = 6, // performing clear channel assessment CMD_CHANNEL = 7, // changing the channel CMD_SIGNAL_DONE = 8, // signal the end of the state transition CMD_DOWNLOAD = 9, // download the received message }; enum { IRQ_NONE=0, IRQ_AWAKE=1, IRQ_TX_END=2, IRQ_XAH_AMI=4, IRQ_CCA_ED_DONE=8, IRQ_RX_END=16, IRQ_RX_START=32, IRQ_PLL_UNLOCK=64, IRQ_PLL_LOCK=128, }; enum { // this disables the RFA1RadioOffP component RFA1RADIOON = unique("RFA1RadioOn"), }; norace uint8_t radioIrq; tasklet_norace uint8_t txPower; tasklet_norace uint8_t channel; tasklet_norace message_t* rxMsg; message_t rxMsgBuffer; tasklet_norace uint8_t rssiClear; tasklet_norace uint8_t rssiBusy; /*----------------- INIT -----------------*/ command error_t PlatformInit.init() { rxMsg = &rxMsgBuffer; // these are just good approximates rssiClear = 0; rssiBusy = 90; return SUCCESS; } command error_t SoftwareInit.init() { CCA_THRES=RFA1_CCA_THRES_VALUE; #ifdef RFA1_ENABLE_PA SET_BIT(DDRG,0); // DIG3 CLR_BIT(PORTG,0); SET_BIT(DDRF, 3); // DIG0 CLR_BIT(PORTF, 3); #endif #ifdef RFA1_DATA_RATE #if RFA1_DATA_RATE == 250 TRX_CTRL_2 = (TRX_CTRL_2 & 0xfc) | 0; #elif RFA1_DATA_RATE == 500 TRX_CTRL_2 = (TRX_CTRL_2 & 0xfc) | 1; #elif RFA1_DATA_RATE == 1000 TRX_CTRL_2 = (TRX_CTRL_2 & 0xfc) | 2; #elif RFA1_DATA_RATE == 2000 TRX_CTRL_2 = (TRX_CTRL_2 & 0xfc) | 3; #else #error Unsupported RFA1_DATA_RATE (supported: 250, 500, 1000, 2000. default is 250) #endif #endif PHY_TX_PWR = RFA1_PA_BUF_LT | RFA1_PA_LT | (RFA1_DEF_RFPOWER&RFA1_TX_PWR_MASK)< ((rssiClear + rssiBusy) >> 3) ) return EBUSY; TRX_STATE = CMD_PLL_ON; // do something useful, just to wait a little timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; data = getPayload(msg); length = getHeader(msg)->length; // length | data[0] ... data[length-3] | automatically generated FCS TRXFBST = length; // the FCS is atomatically generated (2 bytes) (TX_AUTO_CRC_ON==1 by default) length -= 2; // we have missed an incoming message in this short amount of time if( (TRX_STATUS & RFA1_TRX_STATUS_MASK) != PLL_ON ) { RADIO_ASSERT( (TRX_STATUS & RFA1_TRX_STATUS_MASK) == BUSY_RX ); TRX_STATE = CMD_RX_ON; return EBUSY; } atomic { time = call LocalTime.get(); TRX_STATE = CMD_TX_START; } time += TX_SFD_DELAY; RADIO_ASSERT( ! radioIrq ); // fix the time stamp if( timesync != 0 ) *(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time; // then upload the whole payload memcpy((void*)(&TRXFBST+1), data, length); // go back to RX_ON state when finished TRX_STATE=CMD_RX_ON; if( timesync != 0 ) *(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time; call PacketTimeStamp.set(msg, time); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { length = getHeader(msg)->length; call DiagMsg.chr('t'); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(call LocalTime.get()); call DiagMsg.int8(length); call DiagMsg.hex8s(getPayload(msg), length - 2); call DiagMsg.send(); } #endif // wait for the TRX_END interrupt state = STATE_BUSY_TX_2_RX_ON; cmd = CMD_TRANSMIT; return SUCCESS; } default tasklet_async event void RadioSend.sendDone(error_t error) { } default tasklet_async event void RadioSend.ready() { } /*----------------- CCA -----------------*/ tasklet_async command error_t RadioCCA.request() { if( cmd != CMD_NONE || state != STATE_RX_ON ) return EBUSY; // see Errata 38.5.5 datasheet TRX_STATE=CMD_PLL_ON; //TODO: test&optimize this call BusyWait.wait(1); if( (TRX_STATUS & RFA1_TRX_STATUS_MASK) != PLL_ON ) return EBUSY; SET_BIT(RX_SYN,RX_PDT_DIS); TRX_STATE=CMD_RX_ON; //end of workaround cmd = CMD_CCA; PHY_CC_CCA = 1 << CCA_REQUEST | RFA1_CCA_MODE_VALUE | channel; return SUCCESS; } default tasklet_async event void RadioCCA.done(error_t error) { } /*----------------- RECEIVE -----------------*/ //TODO: RX_SAFE_MODE with define inline void downloadMessage() { uint8_t length; bool sendSignal = FALSE; length = TST_RX_LENGTH; if( (PHY_RSSI & (1<= 3 && length <= call RadioPacket.maxPayloadLength() + 2 ) { uint8_t* data; data = getPayload(rxMsg); getHeader(rxMsg)->length = length; // we do not store the CRC field length -= 2; // memory is fast, no point optimizing header check memcpy(data,(void*)&TRXFBST,length); if( signal RadioReceive.header(rxMsg) ) { call PacketLinkQuality.set(rxMsg, (uint8_t)*(&TRXFBST+TST_RX_LENGTH)); sendSignal = TRUE; } } state = STATE_RX_ON; #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { length = getHeader(rxMsg)->length; call DiagMsg.chr('r'); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(call LocalTime.get()); call DiagMsg.int8(sendSignal ? length : -length); call DiagMsg.hex8s(getPayload(rxMsg), length - 2); call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1); call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0); call DiagMsg.send(); } #endif cmd = CMD_NONE; // signal only if it has passed the CRC check if( sendSignal ) rxMsg = signal RadioReceive.receive(rxMsg); } default tasklet_async event bool RadioReceive.header(message_t* msg) { return TRUE; } default tasklet_async event message_t* RadioReceive.receive(message_t* msg) { return msg; } /*----------------- IRQ -----------------*/ void serviceRadio() { uint32_t time; uint8_t irq; uint8_t temp; atomic { time = call SfdCapture.get(); irq = radioIrq; radioIrq = IRQ_NONE; } #ifdef RFA1_RSSI_ENERGY // check this early before the PHY_ED_LEVEL register is overwritten if( irq == IRQ_RX_END ) call PacketRSSI.set(rxMsg, PHY_ED_LEVEL); else call PacketRSSI.clear(rxMsg); #endif if( (irq & IRQ_PLL_LOCK) != 0 ) { if( cmd == CMD_TURNON || cmd == CMD_CHANNEL ) { RADIO_ASSERT( state == STATE_TRX_OFF_2_RX_ON ); state = STATE_RX_ON; cmd = CMD_SIGNAL_DONE; } else if( cmd == CMD_TRANSMIT ) RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON ); else RADIO_ASSERT(FALSE); } if( cmd == CMD_TRANSMIT && (irq & IRQ_TX_END) != 0 ) { RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON ); state = STATE_RX_ON; cmd = CMD_NONE; signal RadioSend.sendDone(SUCCESS); // TODO: we could have missed a received message RADIO_ASSERT( ! (irq & IRQ_RX_START) ); } if( (irq & IRQ_RX_START) != 0 ) { if( cmd == CMD_CCA ) { signal RadioCCA.done(FAIL); cmd = CMD_NONE; } if( cmd == CMD_NONE ) { RADIO_ASSERT( state == STATE_RX_ON ); // the most likely place for busy channel and good SFD, with no other interrupts if( irq == IRQ_RX_START ) { temp = PHY_RSSI & RFA1_RSSI_MASK; rssiBusy += temp - (rssiBusy >> 2); call PacketTimeStamp.set(rxMsg, time); #ifndef RFA1_RSSI_ENERGY call PacketRSSI.set(rxMsg, temp); #endif } else { call PacketTimeStamp.clear(rxMsg); #ifndef RFA1_RSSI_ENERGY call PacketRSSI.clear(rxMsg); #endif } cmd = CMD_RECEIVE; } else RADIO_ASSERT( cmd == CMD_TURNOFF ); } if( cmd == CMD_RECEIVE && (irq & IRQ_RX_END) != 0 ) { RADIO_ASSERT( state == STATE_RX_ON ); // the most likely place for clear channel (hope to avoid acks) rssiClear += (PHY_RSSI & RFA1_RSSI_MASK) - (rssiClear >> 2); cmd = CMD_DOWNLOAD; } if( (irq & IRQ_AWAKE) != 0 ){ if( state == STATE_SLEEP_2_TRX_OFF && (cmd==CMD_STANDBY || cmd==CMD_TURNON) ) state = STATE_TRX_OFF; else RADIO_ASSERT(FALSE); } if( (irq & IRQ_CCA_ED_DONE) != 0 ){ if( cmd == CMD_CCA ) { // workaround, see Errata 38.5.5 datasheet CLR_BIT(RX_SYN,RX_PDT_DIS); cmd = CMD_NONE; RADIO_ASSERT( state == STATE_RX_ON ); RADIO_ASSERT( (TRX_STATUS & RFA1_TRX_STATUS_MASK) == RX_ON ); signal RadioCCA.done( (TRX_STATUS & CCA_DONE) ? ((TRX_STATUS & CCA_STATUS) ? SUCCESS : EBUSY) : FAIL ); } else RADIO_ASSERT(FALSE); } } /** * Indicates the completion of a frame transmission */ AVR_NONATOMIC_HANDLER(TRX24_TX_END_vect){ RADIO_ASSERT( ! radioIrq ); atomic radioIrq |= IRQ_TX_END; call Tasklet.schedule(); } /** * Indicates the completion of a frame reception */ AVR_NONATOMIC_HANDLER(TRX24_RX_END_vect){ RADIO_ASSERT( ! radioIrq ); atomic radioIrq |= IRQ_RX_END; call Tasklet.schedule(); } /** * Indicates the start of a PSDU reception. The TRX_STATE changes * to BUSY_RX, the PHR is ready to be read from Frame Buffer */ AVR_NONATOMIC_HANDLER(TRX24_RX_START_vect){ RADIO_ASSERT( ! radioIrq ); atomic radioIrq |= IRQ_RX_START; call Tasklet.schedule(); } /** * Indicates PLL lock */ AVR_NONATOMIC_HANDLER(TRX24_PLL_LOCK_vect){ RADIO_ASSERT( ! radioIrq ); atomic radioIrq |= IRQ_PLL_LOCK; call Tasklet.schedule(); } /** * indicates sleep/reset->trx_off mode change */ AVR_NONATOMIC_HANDLER(TRX24_AWAKE_vect){ RADIO_ASSERT( ! radioIrq ); atomic radioIrq |= IRQ_AWAKE; call Tasklet.schedule(); } /** * indicates CCA ED done */ AVR_NONATOMIC_HANDLER(TRX24_CCA_ED_DONE_vect){ RADIO_ASSERT( ! radioIrq ); atomic radioIrq |= IRQ_CCA_ED_DONE; call Tasklet.schedule(); } // never called, we have the RX_START interrupt instead async event void SfdCapture.fired() { } /*----------------- TASKLET -----------------*/ tasklet_async event void Tasklet.run() { if( radioIrq != IRQ_NONE ) serviceRadio(); if( cmd != CMD_NONE ) { if( cmd == CMD_DOWNLOAD ) downloadMessage(); else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON ) changeState(); else if( cmd == CMD_CHANNEL ) changeChannel(); if( cmd == CMD_SIGNAL_DONE ) { cmd = CMD_NONE; signal RadioState.done(); } } if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq ) signal RadioSend.ready(); } /*----------------- McuPower -----------------*/ async command mcu_power_t McuPowerOverride.lowestState() { if( (IRQ_MASK & 1<length - 2; } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { RADIO_ASSERT( 1 <= length && length <= 125 ); RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); // we add the length of the CRC, which is automatically generated getHeader(msg)->length = length + 2; } async command uint8_t RadioPacket.maxPayloadLength() { RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rfa1_header_t) <= 125 ); return call Config.maxPayloadLength() - sizeof(rfa1_header_t); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call Config.metadataLength(msg) + sizeof(rfa1_metadata_t); } async command void RadioPacket.clear(message_t* msg) { // all flags are automatically cleared } /*----------------- PacketTransmitPower -----------------*/ async command bool PacketTransmitPower.isSet(message_t* msg) { return call TransmitPowerFlag.get(msg); } async command uint8_t PacketTransmitPower.get(message_t* msg) { return getMeta(msg)->power; } async command void PacketTransmitPower.clear(message_t* msg) { call TransmitPowerFlag.clear(msg); } async command void PacketTransmitPower.set(message_t* msg, uint8_t value) { call TransmitPowerFlag.set(msg); getMeta(msg)->power = value; } /*----------------- PacketRSSI -----------------*/ async command bool PacketRSSI.isSet(message_t* msg) { return call RSSIFlag.get(msg); } async command uint8_t PacketRSSI.get(message_t* msg) { return getMeta(msg)->rssi; } async command void PacketRSSI.clear(message_t* msg) { call RSSIFlag.clear(msg); } async command void PacketRSSI.set(message_t* msg, uint8_t value) { // just to be safe if the user fails to clear the packet call TransmitPowerFlag.clear(msg); call RSSIFlag.set(msg); getMeta(msg)->rssi = value; } /*----------------- PacketTimeSyncOffset -----------------*/ async command bool PacketTimeSyncOffset.isSet(message_t* msg) { return call TimeSyncFlag.get(msg); } async command uint8_t PacketTimeSyncOffset.get(message_t* msg) { return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t); } async command void PacketTimeSyncOffset.clear(message_t* msg) { call TimeSyncFlag.clear(msg); } async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value) { // we do not store the value, the time sync field is always the last 4 bytes RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value ); call TimeSyncFlag.set(msg); } /*----------------- PacketLinkQuality -----------------*/ async command bool PacketLinkQuality.isSet(message_t* msg) { return TRUE; } async command uint8_t PacketLinkQuality.get(message_t* msg) { return getMeta(msg)->lqi; } async command void PacketLinkQuality.clear(message_t* msg) { } async command void PacketLinkQuality.set(message_t* msg, uint8_t value) { getMeta(msg)->lqi = value; } /*----------------- LinkPacketMetadata -----------------*/ async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { return call PacketLinkQuality.get(msg) > 200; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/radio/RFA1Radio.h000066400000000000000000000053261207233610700224070ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Andras Biro */ #ifndef __RFA1RADIO_H__ #define __RFA1RADIO_H__ #include #include #include #include #include #include #include #include #include typedef nx_struct rfa1packet_header_t { rfa1_header_t rfa1; ieee154_simple_header_t ieee154; #ifndef TFRAMES_ENABLED network_header_t network; #endif #ifndef IEEE154FRAMES_ENABLED activemessage_header_t am; #endif } rfa1packet_header_t; typedef nx_struct rfa1packet_footer_t { // the time stamp is not recorded here, time stamped messaged cannot have max length } rfa1packet_footer_t; typedef struct rfa1packet_metadata_t { #ifdef LOW_POWER_LISTENING lpl_metadata_t lpl; #endif #ifdef PACKET_LINK link_metadata_t link; #endif timestamp_metadata_t timestamp; flags_metadata_t flags; rfa1_metadata_t rfa1; } rfa1packet_metadata_t; enum//masks for easyer handling { RFA1_TX_PWR_MASK=0x0F, RFA1_CHANNEL_MASK=0x1F, RFA1_TRX_STATUS_MASK=0x1F, RFA1_RSSI_MASK=0x1F, }; #endif//__RFA1RADIO_H__ tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/radio/RFA1RadioC.nc000066400000000000000000000235741207233610700226700ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Andras Biro */ #include configuration RFA1RadioC { provides { interface SplitControl; #ifndef IEEE154FRAMES_ENABLED interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet as PacketForActiveMessage; #endif #ifndef TFRAMES_ENABLED interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier as Ieee154Notifier; interface Resource as SendResource[uint8_t clint]; interface Ieee154Packet; interface Packet as PacketForIeee154Message; #endif interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; #ifdef TRAFFIC_MONITOR interface TrafficMonitor; #endif interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { #define UQ_METADATA_FLAGS "UQ_RFA1_METADATA_FLAGS" #define UQ_RADIO_ALARM "UQ_RFA1_RADIO_ALARM" // -------- RadioP components RFA1RadioP as RadioP; #ifdef RADIO_DEBUG components AssertC; #endif RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC; RadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; RadioP.PacketTimeStamp -> TimeStampingLayerC; RadioP.RFA1Packet -> RadioDriverLayerC; // -------- RadioAlarm components new RadioAlarmC(); RadioAlarmC.Alarm -> RadioDriverLayerC; // -------- Active Message #ifndef IEEE154FRAMES_ENABLED components new ActiveMessageLayerC(); ActiveMessageLayerC.Config -> RadioP; ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC; ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive; ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket; AMSend = ActiveMessageLayerC; Receive = ActiveMessageLayerC.Receive; Snoop = ActiveMessageLayerC.Snoop; SendNotifier = ActiveMessageLayerC; AMPacket = ActiveMessageLayerC; PacketForActiveMessage = ActiveMessageLayerC; ReceiveDefault = ActiveMessageLayerC.ReceiveDefault; SnoopDefault = ActiveMessageLayerC.SnoopDefault; #endif // -------- Automatic RadioSend Resource #ifndef IEEE154FRAMES_ENABLED #ifndef TFRAMES_ENABLED components new AutoResourceAcquireLayerC(); AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)]; #else components new DummyLayerC() as AutoResourceAcquireLayerC; #endif AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend; #endif // -------- RadioSend Resource #ifndef TFRAMES_ENABLED components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC; SendResource = SendResourceC; // -------- Ieee154 Message components new Ieee154MessageLayerC(); Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC; Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send; Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive; Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet; Ieee154Send = Ieee154MessageLayerC; Ieee154Receive = Ieee154MessageLayerC; Ieee154Notifier = Ieee154MessageLayerC; Ieee154Packet = Ieee154PacketLayerC; PacketForIeee154Message = Ieee154MessageLayerC; #endif // -------- Tinyos Network components new TinyosNetworkLayerC(); TinyosNetworkLayerC.SubSend -> UniqueLayerC; TinyosNetworkLayerC.SubReceive -> PacketLinkLayerC; TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC; // -------- IEEE 802.15.4 Packet components new Ieee154PacketLayerC(); Ieee154PacketLayerC.SubPacket -> PacketLinkLayerC; // -------- UniqueLayer Send part (wired twice) components new UniqueLayerC(); UniqueLayerC.Config -> RadioP; UniqueLayerC.SubSend -> PacketLinkLayerC; // -------- Packet Link components new PacketLinkLayerC(); PacketLink = PacketLinkLayerC; PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC; PacketLinkLayerC -> LowPowerListeningLayerC.Send; PacketLinkLayerC -> LowPowerListeningLayerC.Receive; PacketLinkLayerC -> LowPowerListeningLayerC.RadioPacket; // -------- Low Power Listening #ifdef LOW_POWER_LISTENING #warning "*** USING LOW POWER LISTENING LAYER" components new LowPowerListeningLayerC(); LowPowerListeningLayerC.Config -> RadioP; LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC; #else components new LowPowerListeningDummyC() as LowPowerListeningLayerC; #endif LowPowerListeningLayerC.SubControl -> MessageBufferLayerC; LowPowerListeningLayerC.SubSend -> MessageBufferLayerC; LowPowerListeningLayerC.SubReceive -> MessageBufferLayerC; LowPowerListeningLayerC.SubPacket -> TimeStampingLayerC; SplitControl = LowPowerListeningLayerC; LowPowerListening = LowPowerListeningLayerC; // -------- MessageBuffer components new MessageBufferLayerC(); MessageBufferLayerC.RadioSend -> CollisionAvoidanceLayerC; MessageBufferLayerC.RadioReceive -> UniqueLayerC; MessageBufferLayerC.RadioState -> TrafficMonitorLayerC; RadioChannel = MessageBufferLayerC; // -------- UniqueLayer receive part (wired twice) UniqueLayerC.SubReceive -> CollisionAvoidanceLayerC; // -------- CollisionAvoidance #ifdef SLOTTED_MAC components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC; #else components new RandomCollisionLayerC() as CollisionAvoidanceLayerC; #endif CollisionAvoidanceLayerC.Config -> RadioP; CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC; CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC; CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; // -------- SoftwareAcknowledgement components new SoftwareAckLayerC(); SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; PacketAcknowledgements = SoftwareAckLayerC; SoftwareAckLayerC.Config -> RadioP; SoftwareAckLayerC.SubSend -> CsmaLayerC; SoftwareAckLayerC.SubReceive -> CsmaLayerC; // -------- Carrier Sense components new DummyLayerC() as CsmaLayerC; CsmaLayerC.Config -> RadioP; CsmaLayerC -> TrafficMonitorLayerC.RadioSend; CsmaLayerC -> TrafficMonitorLayerC.RadioReceive; CsmaLayerC -> RadioDriverLayerC.RadioCCA; // -------- TimeStamping components new TimeStampingLayerC(); TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC; TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC; PacketTimeStampRadio = TimeStampingLayerC; PacketTimeStampMilli = TimeStampingLayerC; TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; // -------- MetadataFlags components new MetadataFlagsLayerC(); MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC; // -------- Traffic Monitor #ifdef TRAFFIC_MONITOR components new TrafficMonitorLayerC(); TrafficMonitor = TrafficMonitorLayerC; #else components new DummyLayerC() as TrafficMonitorLayerC; #endif TrafficMonitorLayerC.Config -> RadioP; TrafficMonitorLayerC -> RadioDriverDebugLayerC.RadioSend; TrafficMonitorLayerC -> RadioDriverLayerC.RadioReceive; TrafficMonitorLayerC -> RadioDriverDebugLayerC.RadioState; // -------- Debug #ifdef RADIO_DEBUG components new DebugLayerC("driver") as RadioDriverDebugLayerC; #else components new DummyLayerC() as RadioDriverDebugLayerC; #endif RadioDriverDebugLayerC.SubState -> RadioDriverLayerC; RadioDriverDebugLayerC.SubSend -> RadioDriverLayerC; // -------- Driver components RFA1DriverLayerC as RadioDriverLayerC; RadioDriverLayerC.Config -> RadioP; RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC; PacketTransmitPower = RadioDriverLayerC.PacketTransmitPower; PacketLinkQuality = RadioDriverLayerC.PacketLinkQuality; PacketRSSI = RadioDriverLayerC.PacketRSSI; LinkPacketMetadata = RadioDriverLayerC; LocalTimeRadio = RadioDriverLayerC; RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/radio/RFA1RadioOffP.nc000066400000000000000000000034551207233610700233340ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ module RFA1RadioOffP { provides interface Init as RFA1RadioOff; } implementation { command error_t RFA1RadioOff.init() { if(!uniqueCount("RFA1RadioOn")) { TRXPR |= (1< #include #include module RFA1RadioP { provides { interface RFA1DriverConfig; interface SoftwareAckConfig; interface UniqueConfig; interface CsmaConfig; interface TrafficMonitorConfig; interface RandomCollisionConfig; interface SlottedCollisionConfig; interface ActiveMessageConfig; interface DummyConfig; #ifdef LOW_POWER_LISTENING interface LowPowerListeningConfig; #endif } uses { interface Ieee154PacketLayer; interface RadioAlarm; interface RadioPacket as RFA1Packet; interface PacketTimeStamp; } } implementation { /*----------------- RFA1DriverConfig -----------------*/ async command uint8_t RFA1DriverConfig.headerLength(message_t* msg) { return offsetof(message_t, data) - sizeof(rfa1packet_header_t); } async command uint8_t RFA1DriverConfig.maxPayloadLength() { return sizeof(rfa1packet_header_t) + TOSH_DATA_LENGTH; } async command uint8_t RFA1DriverConfig.metadataLength(message_t* msg) { return 0; } async command bool RFA1DriverConfig.requiresRssiCca(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- SoftwareAckConfig -----------------*/ async command bool SoftwareAckConfig.requiresAckWait(message_t* msg) { return call Ieee154PacketLayer.requiresAckWait(msg); } async command bool SoftwareAckConfig.isAckPacket(message_t* msg) { return call Ieee154PacketLayer.isAckFrame(msg); } async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack) { return call Ieee154PacketLayer.verifyAckReply(data, ack); } async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack) { call Ieee154PacketLayer.setAckRequired(msg, ack); } async command bool SoftwareAckConfig.requiresAckReply(message_t* msg) { return call Ieee154PacketLayer.requiresAckReply(msg); } async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack) { call Ieee154PacketLayer.createAckReply(data, ack); } #ifndef SOFTWAREACK_TIMEOUT #define SOFTWAREACK_TIMEOUT 1000 #endif async command uint16_t SoftwareAckConfig.getAckTimeout() { return (uint16_t)(SOFTWAREACK_TIMEOUT * RADIO_ALARM_MICROSEC); } tasklet_async command void SoftwareAckConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- UniqueConfig -----------------*/ async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg) { return call Ieee154PacketLayer.getDSN(msg); } async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn) { call Ieee154PacketLayer.setDSN(msg, dsn); } async command am_addr_t UniqueConfig.getSender(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } tasklet_async command void UniqueConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- ActiveMessageConfig -----------------*/ command am_addr_t ActiveMessageConfig.destination(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg); } command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setDestAddr(msg, addr); } command am_addr_t ActiveMessageConfig.source(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setSrcAddr(msg, addr); } command am_group_t ActiveMessageConfig.group(message_t* msg) { return call Ieee154PacketLayer.getDestPan(msg); } command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp) { call Ieee154PacketLayer.setDestPan(msg, grp); } command error_t ActiveMessageConfig.checkFrame(message_t* msg) { if( ! call Ieee154PacketLayer.isDataFrame(msg) ) call Ieee154PacketLayer.createDataFrame(msg); return SUCCESS; } /*----------------- CsmaConfig -----------------*/ async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- TrafficMonitorConfig -----------------*/ async command uint16_t TrafficMonitorConfig.getBytes(message_t* msg) { // pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes) return call RFA1Packet.payloadLength(msg) + 6; } /*----------------- RandomCollisionConfig -----------------*/ /* * We try to use the same values as in CC2420 * * CC2420_MIN_BACKOFF = 10 jiffies = 320 microsec * CC2420_BACKOFF_PERIOD = 10 jiffies * initial backoff = 0x1F * CC2420_BACKOFF_PERIOD = 310 jiffies = 9920 microsec * congestion backoff = 0x7 * CC2420_BACKOFF_PERIOD = 70 jiffies = 2240 microsec */ #ifndef LOW_POWER_LISTENING #ifndef RFA1_BACKOFF_MIN #define RFA1_BACKOFF_MIN 320 #endif async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(RFA1_BACKOFF_MIN * RADIO_ALARM_MICROSEC); } #ifndef RFA1_BACKOFF_INIT #define RFA1_BACKOFF_INIT 4960 // instead of 9920 #endif async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(RFA1_BACKOFF_INIT * RADIO_ALARM_MICROSEC); } #ifndef RFA1_BACKOFF_CONG #define RFA1_BACKOFF_CONG 2240 #endif async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(RFA1_BACKOFF_CONG * RADIO_ALARM_MICROSEC); } #endif async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg) { uint16_t time; // TODO: maybe we should use the embedded timestamp of the message time = call RadioAlarm.getNow(); // estimated response time (download the message, etc) is 5-8 bytes if( call Ieee154PacketLayer.requiresAckReply(msg) ) time += (uint16_t)(32 * (-5 + 16 + 11 + 5) * RADIO_ALARM_MICROSEC); else time += (uint16_t)(32 * (-5 + 5) * RADIO_ALARM_MICROSEC); return time; } tasklet_async event void RadioAlarm.fired() { } /*----------------- SlottedCollisionConfig -----------------*/ async command uint16_t SlottedCollisionConfig.getInitialDelay() { return 300; } async command uint8_t SlottedCollisionConfig.getScheduleExponent() { return 1 + RADIO_ALARM_MILLI_EXP; } async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg) { // TODO: check if the timestamp is correct return call PacketTimeStamp.timestamp(msg); } async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg) { // the preamble (4 bytes), SFD (1 byte), plus two extra for safety return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC); } async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg) { return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC); } /*----------------- Dummy -----------------*/ async command void DummyConfig.nothing() { } /*----------------- LowPowerListening -----------------*/ #ifdef LOW_POWER_LISTENING command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR; } command bool LowPowerListeningConfig.ackRequested(message_t* msg) { return call Ieee154PacketLayer.getAckRequired(msg); } command uint16_t LowPowerListeningConfig.getListenLength() { return 5; } async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(320 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(1600 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(3200 * RADIO_ALARM_MICROSEC); } #endif } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/radio/RFA1TimeSyncMessageC.nc000066400000000000000000000100041207233610700246520ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include configuration RFA1TimeSyncMessageC { provides { interface SplitControl; interface Receive[uint8_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketTimeStamp as PacketTimeStampRadio; interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; interface PacketTimeStamp as PacketTimeStampMilli2; interface TimeSyncAMSend as TimeSyncAMSendMilli2[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli2; } } implementation { components RFA1ActiveMessageC as ActiveMessageC, new TimeSyncMessageLayerC(); SplitControl = ActiveMessageC; AMPacket = TimeSyncMessageLayerC; Receive = TimeSyncMessageLayerC.Receive; Snoop = TimeSyncMessageLayerC.Snoop; Packet = TimeSyncMessageLayerC; PacketAcknowledgements = ActiveMessageC; LowPowerListening = ActiveMessageC; PacketTimeStampRadio = ActiveMessageC; TimeSyncAMSendRadio = TimeSyncMessageLayerC; TimeSyncPacketRadio = TimeSyncMessageLayerC; PacketTimeStampMilli = ActiveMessageC; TimeSyncAMSendMilli = TimeSyncMessageLayerC; TimeSyncPacketMilli = TimeSyncMessageLayerC; TimeSyncMessageLayerC.PacketTimeStampRadio -> ActiveMessageC; TimeSyncMessageLayerC.PacketTimeStampMilli -> ActiveMessageC; components RFA1DriverLayerC as DriverLayerC; TimeSyncMessageLayerC.LocalTimeRadio -> DriverLayerC; TimeSyncMessageLayerC.PacketTimeSyncOffset -> DriverLayerC.PacketTimeSyncOffset; components new TimeConverterLayerC(TMilli, RADIO_ALARM_MILLI_EXP) as TimeConverterMilliC, LocalTimeMilliC; PacketTimeStampMilli2 = TimeConverterMilliC; TimeSyncAMSendMilli2 = TimeConverterMilliC; TimeSyncPacketMilli2 = TimeConverterMilliC; TimeConverterMilliC.PacketTimeStampRadio -> ActiveMessageC; TimeConverterMilliC.TimeSyncAMSendRadio -> TimeSyncMessageLayerC; TimeConverterMilliC.TimeSyncPacketRadio -> TimeSyncMessageLayerC; TimeConverterMilliC.LocalTimeRadio -> ActiveMessageC; TimeConverterMilliC.LocalTimeOther -> LocalTimeMilliC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/000077500000000000000000000000001207233610700211565ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/AtmegaTemperatureC.nc000066400000000000000000000035121207233610700252200ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Razvan Musaloiu-E. */ generic configuration AtmegaTemperatureC() { provides interface Read; } implementation { components new AdcReadClientC(), AtmegaTemperatureP; Read = AdcReadClientC; AdcReadClientC.Atm128AdcConfig -> AtmegaTemperatureP; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/AtmegaTemperatureNowC.nc000066400000000000000000000041261207233610700257060ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Razvan Musaloiu-E. */ /** * Battery Temperature. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. */ generic configuration AtmegaTemperatureNowC() { provides interface Resource; provides interface ReadNow; } implementation { components new AdcReadNowClientC(), AtmegaTemperatureP; ReadNow = AdcReadNowClientC; Resource = AdcReadNowClientC; AdcReadNowClientC.Atm128AdcConfig -> AtmegaTemperatureP; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/AtmegaTemperatureP.nc000066400000000000000000000037301207233610700252370ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ #include "Atm128Adc.h" module AtmegaTemperatureP { provides interface Atm128AdcConfig; } implementation { async command uint8_t Atm128AdcConfig.getChannel() { return ATM128_ADC_INT_TEMP; } async command uint8_t Atm128AdcConfig.getRefVoltage() { return ATM128_ADC_VREF_1_6; } async command uint8_t Atm128AdcConfig.getPrescaler() { return ATM128_ADC_PRESCALE; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/AtmegaTemperatureStreamC.nc000066400000000000000000000040511207233610700263730ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Razvan Musaloiu-E. */ /** * Battery Temperature. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. */ generic configuration AtmegaTemperatureStreamC() { provides interface ReadStream; } implementation { components new AdcReadStreamClientC(), AtmegaTemperatureP; ReadStream = AdcReadStreamClientC; AdcReadStreamClientC.Atm128AdcConfig -> AtmegaTemperatureP; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/AtmegaVoltageC.nc000066400000000000000000000037651207233610700243360ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Razvan Musaloiu-E. */ /** * Battery Voltage. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. */ generic configuration AtmegaVoltageC() { provides interface Read; } implementation { components new AdcReadClientC(), AtmegaVoltageP; Read = AdcReadClientC; AdcReadClientC.Atm128AdcConfig -> AtmegaVoltageP; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/AtmegaVoltageNowC.nc000066400000000000000000000041061207233610700250100ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Razvan Musaloiu-E. */ /** * Battery Voltage. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. */ generic configuration AtmegaVoltageNowC() { provides interface Resource; provides interface ReadNow; } implementation { components new AdcReadNowClientC(), AtmegaVoltageP; ReadNow = AdcReadNowClientC; Resource = AdcReadNowClientC; AdcReadNowClientC.Atm128AdcConfig -> AtmegaVoltageP; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/AtmegaVoltageP.nc000066400000000000000000000043541207233610700243460ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Razvan Musaloiu-E. */ /** * Battery Voltage. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. */ #include "Atm128Adc.h" module AtmegaVoltageP { provides interface Atm128AdcConfig; } implementation { async command uint8_t Atm128AdcConfig.getChannel() { // select the 1.23V (V_BG). Reference: Table 97, page 244 from the Atmega128 return ATM128_ADC_SNGL_1_23; } async command uint8_t Atm128AdcConfig.getRefVoltage() { return ATM128_ADC_VREF_OFF; } async command uint8_t Atm128AdcConfig.getPrescaler() { return ATM128_ADC_PRESCALE; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/sensors/AtmegaVoltageStreamC.nc000066400000000000000000000040311207233610700254750ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Razvan Musaloiu-E. */ /** * Battery Voltage. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. */ generic configuration AtmegaVoltageStreamC() { provides interface ReadStream; } implementation { components new AdcReadStreamClientC(), AtmegaVoltageP; ReadStream = AdcReadStreamClientC; AdcReadStreamClientC.Atm128AdcConfig -> AtmegaVoltageP; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/spi/000077500000000000000000000000001207233610700202555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/spi/Atm128SpiC.nc000066400000000000000000000102321207233610700223300ustar00rootroot00000000000000/// $Id: Atm128SpiC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * The HAL of the SPI bus on the atm128. * * 

     *  $Id: Atm128SpiC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
 *
    * * * @author Philip Levis * @author Martin Turon * @author Joe Polastre * @date September 7 2005 */ configuration Atm128SpiC { provides interface Init; provides interface SpiByte; provides interface FastSpiByte; provides interface SpiPacket; provides interface Resource[uint8_t id]; } implementation { components new Atm128SpiP() as SpiMaster, HplAtm128SpiC as HplSpi; components new SimpleFcfsArbiterC("Atm128SpiC.Resource") as Arbiter; components McuSleepC; Init = SpiMaster; SpiByte = SpiMaster; FastSpiByte = SpiMaster; SpiPacket = SpiMaster; Resource = SpiMaster; SpiMaster.ResourceArbiter -> Arbiter; SpiMaster.ArbiterInfo -> Arbiter; SpiMaster.Spi -> HplSpi; SpiMaster.McuPowerState -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/spi/Atm128SpiP.nc000066400000000000000000000310611207233610700223500ustar00rootroot00000000000000/// $Id: Atm128SpiP.nc,v 1.12 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /** * Primitives for accessing the SPI module on ATmega128 * microcontroller. This module assumes the bus has been reserved and * checks that the bus owner is in fact the person using the bus. * SpiPacket provides an asynchronous send interface where the * transmit data length is equal to the receive data length, while * SpiByte provides an interface for sending a single byte * synchronously. SpiByte allows a component to send a few bytes * in a simple fashion: if more than a handful need to be sent, * SpiPacket should be used. * * * 
     *  $Id: Atm128SpiP.nc,v 1.12 2010-06-29 22:07:43 scipio Exp $
 *
    * * @author Philip Levis * @author Joe Polastre * @author Martin Turon * */ generic module Atm128SpiP() @safe() { provides { interface Init; interface SpiByte; interface FastSpiByte; interface SpiPacket; interface Resource[uint8_t id]; } uses { interface Atm128Spi as Spi; interface Resource as ResourceArbiter[uint8_t id]; interface ArbiterInfo; interface McuPowerState; } } implementation { uint16_t len; uint8_t* COUNT_NOK(len) txBuffer; uint8_t* COUNT_NOK(len) rxBuffer; uint16_t pos; enum { SPI_IDLE, SPI_BUSY, SPI_ATOMIC_SIZE = 10, }; command error_t Init.init() { return SUCCESS; } //default clockrate: 4000 kHz #ifndef SPI_CLOCKRATE #define SPI_CLOCKRATE 4000 #endif void startSpi() { call Spi.enableSpi(FALSE); atomic { call Spi.initMaster(); call Spi.enableInterrupt(FALSE); call Spi.setClockPolarity(FALSE); call Spi.setClockPhase(FALSE); call Spi.enableSpi(TRUE); //calculating prescaler for desired spi clockrate with floor function to the nearest available clockrate #if (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=64 call Spi.setMasterDoubleSpeed(FALSE); call Spi.setClock(3); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=32 call Spi.setMasterDoubleSpeed(FALSE); call Spi.setClock(2); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=16 call Spi.setMasterDoubleSpeed(TRUE); call Spi.setClock(2); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=8 call Spi.setMasterDoubleSpeed(FALSE); call Spi.setClock(1); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=4 call Spi.setMasterDoubleSpeed(TRUE); call Spi.setClock(1); #elif (PLATFORM_MHZ*1000)/SPI_CLOCKRATE>=2 call Spi.setMasterDoubleSpeed(FALSE); call Spi.setClock(0); #else call Spi.setMasterDoubleSpeed(TRUE); call Spi.setClock(0); #endif } call McuPowerState.update(); } void stopSpi() { call Spi.enableSpi(FALSE); atomic { call Spi.sleep(); } call McuPowerState.update(); } async command uint8_t SpiByte.write( uint8_t tx ) { /* There is no need to enable the SPI bus and update the power state here since that must have been done when the resource was granted. However there seems to be a bug somewhere in the radio driver for the MicaZ platform so we cannot remove the following two lines before that problem is resolved. (Miklos Maroti) */ #ifdef PLATFORM_MICAZ call Spi.enableSpi(TRUE); call McuPowerState.update(); #endif call Spi.write( tx ); while( ! call Spi.isInterruptPending() ) ; return call Spi.read(); } inline async command void FastSpiByte.splitWrite(uint8_t data) { call Spi.write(data); } inline async command uint8_t FastSpiByte.splitRead() { while( ! call Spi.isInterruptPending() ) ; return call Spi.read(); } inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) { uint8_t b; while( ! call Spi.isInterruptPending() ) ; b = call Spi.read(); call Spi.write(data); return b; } inline async command uint8_t FastSpiByte.write(uint8_t data) { call Spi.write(data); while( ! call Spi.isInterruptPending() ) ; return call Spi.read(); } /** * This component sends SPI packets in chunks of size SPI_ATOMIC_SIZE * (which is normally 5). The tradeoff is between SPI performance * (throughput) and how much the component limits concurrency in the * rest of the system. Handling an interrupt on each byte is * very expensive: the context saving/register spilling constrains * the rate at which one can write out bytes. A more efficient * approach is to write out a byte and wait for a few cycles until * the byte is written (a tiny spin loop). This leads to greater * throughput, but blocks the system and prevents it from doing * useful work. * * This component takes a middle ground. When asked to transmit X * bytes in a packet, it transmits those X bytes in 10-byte parts. * sendNextPart() is responsible for sending one such * part. It transmits bytes with the SpiByte interface, which * disables interrupts and spins on the SPI control register for * completion. On the last byte, however, sendNextPart * re-enables SPI interrupts and sends the byte through the * underlying split-phase SPI interface. When this component handles * the SPI transmit completion event (handles the SPI interrupt), * it calls sendNextPart() again. As the SPI interrupt does * not disable interrupts, this allows processing in the rest of the * system to continue. */ error_t sendNextPart() { uint16_t end; uint16_t tmpPos; uint16_t myLen; uint8_t* COUNT_NOK(myLen) tx; uint8_t* COUNT_NOK(myLen) rx; atomic { myLen = len; tx = txBuffer; rx = rxBuffer; tmpPos = pos; end = pos + SPI_ATOMIC_SIZE; end = (end > len)? len:end; } for (;tmpPos < (end - 1) ; tmpPos++) { uint8_t val; if (tx != NULL) val = call SpiByte.write( tx[tmpPos] ); else val = call SpiByte.write( 0 ); if (rx != NULL) { rx[tmpPos] = val; } } // For the last byte, we re-enable interrupts. call Spi.enableInterrupt(TRUE); atomic { if (tx != NULL) call Spi.write(tx[tmpPos]); else call Spi.write(0); pos = tmpPos; // The final increment will be in the interrupt // handler. } return SUCCESS; } task void zeroTask() { uint16_t myLen; uint8_t* COUNT_NOK(myLen) rx; uint8_t* COUNT_NOK(myLen) tx; atomic { myLen = len; rx = rxBuffer; tx = txBuffer; rxBuffer = NULL; txBuffer = NULL; len = 0; pos = 0; signal SpiPacket.sendDone(tx, rx, myLen, SUCCESS); } } /** * Send bufLen bytes in writeBuf and receive bufLen bytes * into readBuf. If readBuf is NULL, bytes will be * read out of the SPI, but they will be discarded. A byte is read * from the SPI before writing and discarded (to clear any buffered * bytes that might have been left around). * * This command only sets up the state variables and clears the SPI: * sendNextPart() does the real work. * * If there's a send of zero bytes, short-circuit and just post * a task to signal the sendDone. This generally occurs due to an * error in the caler, but signaling an event will hopefully let * it recover better than returning FAIL. */ async command error_t SpiPacket.send(uint8_t* writeBuf, uint8_t* readBuf, uint16_t bufLen) { uint8_t discard; atomic { len = bufLen; txBuffer = writeBuf; rxBuffer = readBuf; pos = 0; } if (bufLen > 0) { discard = call Spi.read(); return sendNextPart(); } else { post zeroTask(); return SUCCESS; } } default async event void SpiPacket.sendDone (uint8_t* _txbuffer, uint8_t* _rxbuffer, uint16_t _length, error_t _success) { } async event void Spi.dataReady(uint8_t data) { bool again; atomic { if (rxBuffer != NULL) { rxBuffer[pos] = data; // Increment position } pos++; } call Spi.enableInterrupt(FALSE); atomic { again = (pos < len); } if (again) { sendNextPart(); } else { uint8_t discard; uint16_t myLen; uint8_t* COUNT_NOK(myLen) rx; uint8_t* COUNT_NOK(myLen) tx; atomic { myLen = len; rx = rxBuffer; tx = txBuffer; rxBuffer = NULL; txBuffer = NULL; len = 0; pos = 0; } discard = call Spi.read(); signal SpiPacket.sendDone(tx, rx, myLen, SUCCESS); } } async command error_t Resource.immediateRequest[ uint8_t id ]() { error_t result = call ResourceArbiter.immediateRequest[ id ](); if ( result == SUCCESS ) { startSpi(); } return result; } async command error_t Resource.request[ uint8_t id ]() { atomic { if (!call ArbiterInfo.inUse()) { startSpi(); } } return call ResourceArbiter.request[ id ](); } async command error_t Resource.release[ uint8_t id ]() { error_t error = call ResourceArbiter.release[ id ](); atomic { if (!call ArbiterInfo.inUse()) { stopSpi(); } } return error; } async command bool Resource.isOwner[uint8_t id]() { return call ResourceArbiter.isOwner[id](); } event void ResourceArbiter.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } default event void Resource.granted[ uint8_t id ]() {} } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/spi/Atm128rfa1Usart0SpiC.nc000066400000000000000000000043161207233610700242070ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ configuration Atm128rfa1Usart0SpiC { provides interface Init; provides interface SpiByte; provides interface FastSpiByte; provides interface SpiPacket; provides interface Resource[uint8_t id]; } implementation { components new Atm128SpiP(), HplAtm128rfa1Usart0SpiC; components new SimpleFcfsArbiterC("Atm128SpiC.Resource") as Arbiter; components McuSleepC; Init = Atm128SpiP; SpiByte = Atm128SpiP; FastSpiByte = Atm128SpiP; SpiPacket = Atm128SpiP; Resource = Atm128SpiP; Atm128SpiP.ArbiterInfo -> Arbiter; Atm128SpiP.ResourceArbiter -> Arbiter; Atm128SpiP.Spi -> HplAtm128rfa1Usart0SpiC; Atm128SpiP.McuPowerState -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/spi/HplAtm128SpiC.nc000066400000000000000000000075551207233610700230120ustar00rootroot00000000000000/// $Id: HplAtm128SpiC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Configuration encapsulating the basic SPI HPL for the atm128. * * 
     * $Id: HplAtm128SpiC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
 *
    * * @author Philip Levis * @author Martin Turon */ configuration HplAtm128SpiC { provides interface Atm128Spi as SpiBus; } implementation { components AtmegaGeneralIOC as IO, HplAtm128SpiP as HplSpi; components McuSleepC; SpiBus = HplSpi; HplSpi.Mcu -> McuSleepC; HplSpi.SS -> IO.PortB0; // Slave set line HplSpi.SCK -> IO.PortB1; // SPI clock line HplSpi.MOSI -> IO.PortB2; // Master out, slave in HplSpi.MISO -> IO.PortB3; // Master in, slave out HplSpi.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/spi/HplAtm128SpiP.nc000066400000000000000000000162231207233610700230170ustar00rootroot00000000000000/// $Id: HplAtm128SpiP.nc,v 1.1 2010-11-18 23:15:08 andrasbiro Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the SPI bus abstraction for the atm128 * microcontroller. * * @author Philip Levis * @author Martin Turon */ #include "Atm128Spi.h" module HplAtm128SpiP @safe() { provides interface Atm128Spi as SPI; provides interface AsyncStdControl; provides interface McuPowerOverride; uses { interface GeneralIO as SS; // Slave set line interface GeneralIO as SCK; // SPI clock line interface GeneralIO as MOSI; // Master out, slave in interface GeneralIO as MISO; // Master in, slave out interface McuPowerState as Mcu; } } implementation { async command error_t AsyncStdControl.start() { call SPI.enableSpi(TRUE); } async command error_t AsyncStdControl.stop() { call SPI.enableInterrupt(FALSE); call SPI.enableSpi(FALSE); } async command void SPI.initMaster() { call MOSI.makeOutput(); call MISO.makeInput(); call SCK.makeOutput(); call SS.makeOutput(); call SPI.setMasterBit(TRUE); } async command void SPI.initSlave() { call MISO.makeOutput(); call MOSI.makeInput(); call SCK.makeInput(); call SS.makeInput(); call SPI.setMasterBit(FALSE); } async command void SPI.sleep() { } async command uint8_t SPI.read() { return SPDR; } async command void SPI.write(uint8_t d) { SPDR = d; } default async event void SPI.dataReady(uint8_t d) {} AVR_ATOMIC_HANDLER(SPI_STC_vect) { signal SPI.dataReady(call SPI.read()); } //=== SPI Bus utility routines. ==================================== async command bool SPI.isInterruptPending() { return READ_BIT(SPSR, SPIF); } async command bool SPI.isInterruptEnabled () { return READ_BIT(SPCR, SPIE); } async command void SPI.enableInterrupt(bool enabled) { if (enabled) { SET_BIT(SPCR, SPIE); call Mcu.update(); } else { CLR_BIT(SPCR, SPIE); call Mcu.update(); } } async command bool SPI.isSpiEnabled() { return READ_BIT(SPCR, SPE); } async command void SPI.enableSpi(bool enabled) { if (enabled) { SET_BIT(SPCR, SPE); call Mcu.update(); } else { CLR_BIT(SPCR, SPE); call Mcu.update(); } } /* DORD bit */ async command void SPI.setDataOrder(bool lsbFirst) { if (lsbFirst) { SET_BIT(SPCR, DORD); } else { CLR_BIT(SPCR, DORD); } } async command bool SPI.isOrderLsbFirst() { return READ_BIT(SPCR, DORD); } /* MSTR bit */ async command void SPI.setMasterBit(bool isMaster) { if (isMaster) { SET_BIT(SPCR, MSTR); } else { CLR_BIT(SPCR, MSTR); } } async command bool SPI.isMasterBitSet() { return READ_BIT(SPCR, MSTR); } /* CPOL bit */ async command void SPI.setClockPolarity(bool highWhenIdle) { if (highWhenIdle) { SET_BIT(SPCR, CPOL); } else { CLR_BIT(SPCR, CPOL); } } async command bool SPI.getClockPolarity() { return READ_BIT(SPCR, CPOL); } /* CPHA bit */ async command void SPI.setClockPhase(bool sampleOnTrailing) { if (sampleOnTrailing) { SET_BIT(SPCR, CPHA); } else { CLR_BIT(SPCR, CPHA); } } async command bool SPI.getClockPhase() { return READ_BIT(SPCR, CPHA); } async command uint8_t SPI.getClock () { return READ_FLAG(SPCR, ((1 << SPR1) | (1 << SPR0))); } async command void SPI.setClock (uint8_t v) { v &= (1 << SPR1) | (1 << SPR0); SPCR = (SPCR & ~((1 << SPR1) | (1 << SPR0))) | v; } async command bool SPI.hasWriteCollided() { return READ_BIT(SPSR, WCOL); } async command bool SPI.isMasterDoubleSpeed() { return READ_BIT(SPSR, SPI2X); } async command void SPI.setMasterDoubleSpeed(bool on) { if (on) { SET_BIT(SPSR, SPI2X); } else { CLR_BIT(SPSR, SPI2X); } } async command mcu_power_t McuPowerOverride.lowestState() { if(bit_is_set(SPCR,SPE)) { return ATM128_POWER_IDLE; } else return ATM128_POWER_DOWN; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/spi/HplAtm128rfa1Usart0SpiC.nc000066400000000000000000000040701207233610700246500ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ configuration HplAtm128rfa1Usart0SpiC { provides interface Atm128Spi as SpiBus; } implementation { components AtmegaGeneralIOC as IO, HplAtm128rfa1Usart0SpiP, HplBma180C, new NoPinC(); components McuSleepC; SpiBus = HplAtm128rfa1Usart0SpiP; HplAtm128rfa1Usart0SpiP.Mcu -> McuSleepC; HplAtm128rfa1Usart0SpiP.McuPowerOverride <- McuSleepC; HplAtm128rfa1Usart0SpiP.SS -> NoPinC; HplAtm128rfa1Usart0SpiP.SCK -> IO.PortE2; HplAtm128rfa1Usart0SpiP.MOSI -> IO.PortE1; HplAtm128rfa1Usart0SpiP.MISO -> IO.PortE0; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/spi/HplAtm128rfa1Usart0SpiP.nc000066400000000000000000000131361207233610700246700ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ module HplAtm128rfa1Usart0SpiP { provides interface Atm128Spi as SPI; provides interface McuPowerOverride; uses { interface GeneralIO as SS; interface GeneralIO as SCK; interface GeneralIO as MOSI; interface GeneralIO as MISO; interface McuPowerState as Mcu; } } implementation { async command void SPI.initMaster() { call SPI.setClock(0); call SCK.makeOutput(); call SS.makeOutput(); call SS.set(); call MOSI.makeOutput(); call MISO.makeInput(); call SPI.setMasterBit(TRUE); } async command void SPI.initSlave() { //dummy call SPI.initMaster(); } async command void SPI.sleep() { // call SS.set(); // why was this needed? } async command uint8_t SPI.read() { return UDR0; } async command void SPI.write(uint8_t d) { UDR0 = d; } default async event void SPI.dataReady(uint8_t d) {} AVR_ATOMIC_HANDLER(USART0_UDRE_vect) { signal SPI.dataReady(call SPI.read()); } async command bool SPI.isInterruptPending() { return READ_BIT(UCSR0A, RXC0); } async command bool SPI.isInterruptEnabled () { return READ_BIT(UCSR0B, UDRIE0); } async command void SPI.enableInterrupt(bool enabled) { if (enabled) { SET_BIT(UCSR0B, UDRIE0); call Mcu.update(); } else { CLR_BIT(UCSR0B, UDRIE0); call Mcu.update(); } } async command bool SPI.isSpiEnabled() { return (UCSR0B & (1 << RXEN0 | 1 << TXEN0))?TRUE:FALSE; } async command void SPI.enableSpi(bool enabled) { if (enabled) { UCSR0B |= (1 << RXEN0) | (1 << TXEN0) /*| (1<; } implementation { components new AtmegaCompareP(T62khz, uint32_t, 0, SYM_ALARM_MINDT); Alarm = AtmegaCompareP; components McuInitC; McuInitC.TimerInit -> AtmegaCompareP; components HplAtmRfa1TimerMacC; AtmegaCompareP.AtmegaCounter -> HplAtmRfa1TimerMacC; AtmegaCompareP.AtmegaCompare -> HplAtmRfa1TimerMacC.Compare[unique(UQ_T62KHZ_ALARM)]; // just to start the timer components Counter62khz32C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AlarmMcu16C.nc000066400000000000000000000043101207233610700230750ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" generic configuration AlarmMcu16C() { provides interface Alarm; } implementation { components new AtmegaCompareP(TMcu, uint16_t, 0, MCU_ALARM_MINDT); Alarm = AtmegaCompareP; components McuInitC; McuInitC.TimerInit -> AtmegaCompareP; #if MCU_TIMER_NO == 1 components HplAtmRfa1Timer1C as HplAtmRfa1TimerC; #elif MCU_TIMER_NO == 3 components HplAtmRfa1Timer3C as HplAtmRfa1TimerC; #endif AtmegaCompareP.AtmegaCounter -> HplAtmRfa1TimerC; AtmegaCompareP.AtmegaCompare -> HplAtmRfa1TimerC.Compare[unique(UQ_MCU_ALARM)]; // just to start the timer components CounterMcu16C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AlarmMcu32C.nc000066400000000000000000000036701207233610700231030ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" generic configuration AlarmMcu32C() { provides interface Alarm; } implementation { components new TransformAlarmC(TMcu, uint32_t, TMcu, uint16_t, 0); Alarm = TransformAlarmC; TransformAlarmC.Counter -> CounterMcu32C; TransformAlarmC.AlarmFrom -> AlarmMcu16C; components CounterMcu32C, new AlarmMcu16C(); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AlarmMicro32C.nc000066400000000000000000000040751207233610700234300ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" generic configuration AlarmMicro32C() { provides interface Alarm; } implementation { #if MCU_TIMER_MHZ_LOG2 == 0 components new AlarmMcu32C(); Alarm = AlarmMcu32C; #else components new AlarmMcu32C(); components CounterMicro32C; components new TransformAlarmC(TMicro, uint32_t, TMcu, uint32_t, MCU_TIMER_MHZ_LOG2); Alarm = TransformAlarmC; TransformAlarmC.AlarmFrom -> AlarmMcu32C; TransformAlarmC.Counter -> CounterMicro32C; #endif } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AlarmMilli32C.nc000066400000000000000000000037241207233610700234250ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" generic configuration AlarmMilli32C() { provides interface Alarm; } implementation { components new Alarm62khz32C(); components CounterMilli32C; components new TransformAlarmC(TMilli, uint32_t, T62khz, uint32_t, 6); Alarm = TransformAlarmC; TransformAlarmC.AlarmFrom -> Alarm62khz32C; TransformAlarmC.Counter -> CounterMilli32C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AlarmRtc16C.nc000066400000000000000000000042131207233610700231030ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" generic configuration AlarmRtc16C() { provides interface Alarm; } implementation { components new AtmegaRtcCompareP(TRtc, 0, RTC_ALARM_MINDT); Alarm = AtmegaRtcCompareP; components McuInitC; McuInitC.TimerInit -> AtmegaRtcCompareP; components HplAtmRfa1Timer2C, CounterRtc16C; AtmegaRtcCompareP.AtmegaCounter -> HplAtmRfa1Timer2C; AtmegaRtcCompareP.AtmegaCompare -> HplAtmRfa1Timer2C.Compare[unique(UQ_RTC_ALARM)]; AtmegaRtcCompareP.Counter -> CounterRtc16C; AtmegaRtcCompareP.getCounterHigh -> CounterRtc16C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaCapture.nc000066400000000000000000000052021207233610700236450ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface AtmegaCapture { // ----- input capture register (ICR) /* Returns the current captured value */ async command size_type get(); /* Sets the current captured value */ async command void set(size_type value); // ----- timer interrupt flag register (TIFR), input capture flag (ICF) /* Signalled when the captured event has occured */ async event void fired(); /* Tests if there is a pending captured event */ async command bool test(); /* Resets a pending interrupt */ async command void reset(); // ----- timer interrupt mask register (TIMSK), input capture interrupt enable (ICIE) /* Enables the capture interrupt */ async command void start(); /* Disables the capture interrupt */ async command void stop(); /* Checks is the overflow interrupt is enabled */ async command bool isOn(); // ----- timer control register (TCCR), input capture mode (ICNC and ICES) /* Sets the input capture mode bits */ async command void setMode(uint8_t mode); /* Returns the input capture mode bits */ async command uint8_t getMode(); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaCompare.nc000066400000000000000000000054401207233610700236340ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface AtmegaCompare { // ----- output compare register (OCR) /* Returns the current compare value */ async command size_type get(); /* Sets the current compare value */ async command void set(size_type value); // ----- timer interrupt flag register (TIFR), output comare match flag (OCF) /* Signalled when the counter equals the compare value */ async event void fired(); /* Tests if there is a pending overflow interrupt */ async command bool test(); /* Resets a pending interrupt */ async command void reset(); // ----- timer interrupt mask register (TIMSK), output compare interrupt enable (OCIE) /* Enables the overflow interrupt */ async command void start(); /* Disables the overflow interrupt */ async command void stop(); /* Checks is the overflow interrupt is enabled */ async command bool isOn(); // ----- timer control register (TCCR), compare output mode (COM) /* Sets the waveform generation mode bits */ async command void setMode(uint8_t mode); /* Returns the waveform generation mode bits */ async command uint8_t getMode(); // ----- timer control register (TCCR), force output compare (FOC) /* Forces the output compare match */ async command void force(); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaCompareP.nc000066400000000000000000000063661207233610700237640ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module AtmegaCompareP(typedef precision_tag, typedef size_type @integer(), uint8_t mode, uint16_t mindt) { provides { interface Init @exactlyonce(); interface Alarm; } uses { interface AtmegaCounter; interface AtmegaCompare; } } implementation { command error_t Init.init() { call AtmegaCompare.stop(); call AtmegaCompare.setMode(mode); return SUCCESS; } default async event void Alarm.fired() { } // called in atomic context async event void AtmegaCompare.fired() { call AtmegaCompare.stop(); signal Alarm.fired(); } async command void Alarm.stop() { call AtmegaCompare.stop(); } async command bool Alarm.isRunning() { return call AtmegaCompare.isOn(); } // callers make sure that time is always in the future void setAlarm(size_type time) { call AtmegaCompare.set(time); call AtmegaCompare.reset(); call AtmegaCompare.start(); } async command void Alarm.startAt(size_type nt0, size_type ndt) { atomic { // current time + time needed to set alarm size_type n = call AtmegaCounter.get() + mindt; // if alarm is set in the future, where n-nt0 is the time passed since nt0 if( (size_type)(n - nt0) < ndt ) n = nt0 + ndt; setAlarm(n); } } async command void Alarm.start(size_type ndt) { atomic { size_type n = call AtmegaCounter.get(); // calculate the next alarm n += (mindt > ndt) ? mindt : ndt; setAlarm(n); } } async command size_type Alarm.getNow() { return call AtmegaCounter.get(); } async command size_type Alarm.getAlarm() { return call AtmegaCompare.get(); } async event void AtmegaCounter.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaCounter.nc000066400000000000000000000055221207233610700236660ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface AtmegaCounter { // ----- timer counter register (TCNT) /* Returns the current counter value */ async command size_type get(); /* Sets the current counter value */ async command void set(size_type value); // ----- timer interrupt flag register (TIFR), timer overflow flag (TOV) /* Signalled when the counter is going from 0xFF to 0x00. WARNING: This event MUST be executed in atomic context */ async event void overflow(); /* Tests if there is a pending overflow interrupt WARNING: This command MUST be executed in atomic context */ async command bool test(); /* Resets a pending interrupt */ async command void reset(); // ----- timer interrupt mask register (TIMSK), timer overflow interrupt enable (TOIE) /* Enables the overflow interrupt */ async command void start(); /* Disables the overflow interrupt */ async command void stop(); /* Checks is the overflow interrupt is enabled */ async command bool isOn(); // ----- timer control registers (TCCR), clock select bits (CS) and waveform generation mode (WGM) /* Sets the clock select and waveform generation mode bits */ async command void setMode(uint8_t mode); /* Returns the clock select andwaveform generation mode bits */ async command uint8_t getMode(); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaCounterP.nc000066400000000000000000000045341207233610700240100ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module AtmegaCounterP(typedef precision_tag, typedef size_type @integer(), uint8_t mode) { provides { interface Init @exactlyonce(); interface Counter; } uses { interface AtmegaCounter; } } implementation { command error_t Init.init() { call AtmegaCounter.setMode(mode); call AtmegaCounter.start(); return SUCCESS; } async command size_type Counter.get() { return call AtmegaCounter.get(); } default async event void Counter.overflow() { } async event void AtmegaCounter.overflow() { signal Counter.overflow(); } async command bool Counter.isOverflowPending() { atomic return call AtmegaCounter.test(); } async command void Counter.clearOverflow() { call AtmegaCounter.reset(); } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaRtcCompareP.nc000066400000000000000000000070711207233610700244270ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module AtmegaRtcCompareP(typedef precision, uint8_t mode, uint16_t mindt) { provides { interface Init @exactlyonce(); interface Alarm as Alarm; } uses { interface AtmegaCounter; interface AtmegaCompare; interface Counter as Counter; async command uint8_t getCounterHigh(); } } implementation { command error_t Init.init() { call AtmegaCompare.stop(); call AtmegaCompare.setMode(mode); return SUCCESS; } uint16_t alarm; default async event void Alarm.fired() { } // called in atomic context async event void AtmegaCompare.fired() { uint8_t h = call getCounterHigh(); if( h == (alarm >> 8) ) { call AtmegaCompare.stop(); signal Alarm.fired(); } } async command void Alarm.stop() { call AtmegaCompare.stop(); } async command bool Alarm.isRunning() { return call AtmegaCompare.isOn(); } // callers make sure that time is always in the future void setAlarm(uint16_t time) { call AtmegaCompare.set((uint8_t)time); alarm = time; // if( high == (time >> 8) ) // { call AtmegaCompare.reset(); call AtmegaCompare.start(); // } // else // call AtmegaCompare.stop(); } async command void Alarm.startAt(uint16_t nt0, uint16_t ndt) { atomic { // current time + time needed to set alarm uint16_t n = call Counter.get() + mindt; // if alarm is set in the future, where n-nt0 is the time passed since nt0 if( (uint16_t)(n - nt0) < ndt ) n = nt0 + ndt; setAlarm(n); } } async command void Alarm.start(uint16_t ndt) { atomic { uint16_t n = call Counter.get(); // calculate the next alarm n += (mindt > ndt) ? mindt : ndt; setAlarm(n); } } async command uint16_t Alarm.getNow() { return call Counter.get(); } async command uint16_t Alarm.getAlarm() { return alarm; } async event void Counter.overflow() { } // TODO: enable the alarm just when high = (alarm>>8)-1; async event void AtmegaCounter.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaRtcCounterP.nc000066400000000000000000000064511207233610700244610ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module AtmegaRtcCounterP(typedef precision, uint8_t mode) { provides { interface Init @exactlyonce(); interface Counter; // for the alarm async command uint8_t getCounterHigh(); } uses { interface AtmegaCounter; } } implementation { command error_t Init.init() { call AtmegaCounter.setMode(mode); call AtmegaCounter.start(); return SUCCESS; } volatile uint8_t high; /* * Without prescaler the interrupt occurs when the Timer goes from 0 to 1, * so we can have two posible sequences of events * * TST=0, CNT=0, TST=1, CNT=1, TST=1 ... TST=1, CNT=1, TST=0 * TST=0, CNT=0, TST=0, CNT=1, TST=1 ... TST=1, CNT=1, TST=0 * * With the prescaler enabled the interrupt occurs while the Timer is 0 * (one 32768 HZ tick after the Timer became 0), so we have one possibility: * * TST=0, CNT=0, TST=1, CNT=0, TST=1 ... TST=1, CNT=0, TST=0 */ async command uint16_t Counter.get() { uint8_t a, b; bool c; atomic { b = call AtmegaCounter.get(); c = call AtmegaCounter.test(); a = high; } if( c && b != 0 ) a += 1; // overflow occurs when switching from 0 to 1. b -= 1; return (((uint16_t)a) << 8) + b; } async command bool Counter.isOverflowPending() { atomic return high == 0xFF && call AtmegaCounter.test(); } async command void Counter.clearOverflow() { call AtmegaCounter.reset(); } default async event void Counter.overflow() { } // called in atomic context async event void AtmegaCounter.overflow() { ++high; if( high == 0 ) signal Counter.overflow(); } // used by the alarm async command uint8_t getCounterHigh() { uint8_t h = high; if( call AtmegaCounter.test() ) h += 1; return h; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaTransformCounterC.nc000066400000000000000000000041521207233610700256630ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration AtmegaTransformCounterC(typedef to_size_t @integer(), typedef from_size_t @integer(), int8_t bitshift) { provides interface AtmegaCounter; uses interface AtmegaCounter as SubCounter; } implementation { components new AtmegaTransformCounterP(to_size_t, from_size_t); AtmegaCounter = AtmegaTransformCounterP.AtmegaCounter; SubCounter = AtmegaTransformCounterP.SubCounter; components new HighBitsC(to_size_t, from_size_t, bitshift); AtmegaTransformCounterP.HighBits -> HighBitsC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/AtmegaTransformCounterP.nc000066400000000000000000000071671207233610700257110ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module AtmegaTransformCounterP(typedef to_size_t @integer(), typedef from_size_t @integer()) { provides interface AtmegaCounter; uses { interface AtmegaCounter as SubCounter; interface HighBits; } } implementation { async command to_size_t AtmegaCounter.get() { to_size_t value; from_size_t counter; /* atomic { counter = call SubCounter.get(); value = call HighBits.get(); if( call SubCounter.test() ) { counter = call SubCounter.get(); value += call HighBits.convertHigh(1); } } value |= call HighBits.convertLow(counter); */ uint8_t increment = 0; atomic { counter = call SubCounter.get(); if( call SubCounter.test() ) { increment = 1; counter = call SubCounter.get(); } value = call HighBits.getXXX(counter, increment); } return value; } async command void AtmegaCounter.set(to_size_t value) { from_size_t counter; atomic { counter = call HighBits.set(value); call SubCounter.set(counter); } } default async event void AtmegaCounter.overflow() { } // WARNING: This event MUST be executed in atomic context, it // does not help if we put the body inside an atomic block async event void SubCounter.overflow() { if( call HighBits.add(1) ) signal AtmegaCounter.overflow(); } // WARNING: This event MUST be executed in atomic context, it // does not help if we put the body inside an atomic block async command bool AtmegaCounter.test() { return call SubCounter.test() && call HighBits.equals(-1); } async command void AtmegaCounter.reset() { call SubCounter.reset(); } async command void AtmegaCounter.start() { call SubCounter.start(); } async command void AtmegaCounter.stop() { call SubCounter.stop(); } async command bool AtmegaCounter.isOn() { return call SubCounter.isOn(); } async command void AtmegaCounter.setMode(uint8_t mode) { call SubCounter.setMode(mode); } async command uint8_t AtmegaCounter.getMode() { return call SubCounter.getMode(); } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/BusyWaitMicroC.nc000066400000000000000000000041521207233610700237720ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration BusyWaitMicroC { provides interface BusyWait; } implementation { components new BusyWaitCounterC(TMicro, uint16_t); BusyWait = BusyWaitCounterC; BusyWaitCounterC.Counter -> CounterMicro16C; #if MCU_TIMER_MHZ_LOG2 == 0 components CounterMcu16C as CounterMicro16C; #else components new TransformCounterC(TMicro, uint16_t, TMcu, uint16_t, MCU_TIMER_MHZ_LOG2, uint8_t) as CounterMicro16C; components CounterMcu16C; CounterMicro16C.CounterFrom -> CounterMcu16C; #endif } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/Counter62khz32C.nc000066400000000000000000000037121207233610700237030ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration Counter62khz32C { provides interface Counter; } implementation { components new AtmegaCounterP(T62khz, uint32_t, SYM_TIMER_MODE); Counter = AtmegaCounterP; components McuInitC; McuInitC.TimerInit -> AtmegaCounterP.Init; components HplAtmRfa1TimerMacC; AtmegaCounterP.AtmegaCounter -> HplAtmRfa1TimerMacC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/CounterMcu16C.nc000066400000000000000000000040741207233610700234670ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration CounterMcu16C { provides interface Counter; } implementation { components new AtmegaCounterP(TMcu, uint16_t, MCU_TIMER_MODE); Counter = AtmegaCounterP; components McuInitC; McuInitC.TimerInit -> AtmegaCounterP.Init; #if MCU_TIMER_NO == 1 components HplAtmRfa1Timer1C as HplAtmRfa1TimerC; #elif MCU_TIMER_NO == 3 components HplAtmRfa1Timer3C as HplAtmRfa1TimerC; #endif AtmegaCounterP.AtmegaCounter -> HplAtmRfa1TimerC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/CounterMcu32C.nc000066400000000000000000000036111207233610700234610ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration CounterMcu32C { provides interface Counter; } implementation { components new TransformCounterC(TMcu, uint32_t, TMcu, uint16_t, 0, uint16_t); Counter = TransformCounterC; TransformCounterC.CounterFrom -> CounterMcu16C; components CounterMcu16C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/CounterMicro32C.nc000066400000000000000000000040051207233610700240040ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration CounterMicro32C { provides { interface Counter; } } implementation { #if MCU_TIMER_MHZ_LOG2 == 0 components CounterMcu32C; Counter = CounterMcu32C; #else components new TransformCounterC(TMicro, uint32_t, TMcu, uint32_t, MCU_TIMER_MHZ_LOG2, uint8_t); Counter = TransformCounterC; components CounterMcu32C; TransformCounterC.CounterFrom -> CounterMcu32C; #endif } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/CounterMilli32C.nc000066400000000000000000000036241207233610700240070ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration CounterMilli32C { provides interface Counter; } implementation { components new TransformCounterC(TMilli, uint32_t, T62khz, uint32_t, 6, uint8_t); Counter = TransformCounterC; components Counter62khz32C; TransformCounterC.CounterFrom -> Counter62khz32C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/CounterRtc16C.nc000066400000000000000000000040461207233610700234720ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration CounterRtc16C { provides interface Counter; // for the alarm provides command uint8_t getCounterHigh(); } implementation { components new AtmegaRtcCounterP(TRtc, RTC_TIMER_MODE); Counter = AtmegaRtcCounterP; getCounterHigh = AtmegaRtcCounterP; components McuInitC; McuInitC.TimerInit -> AtmegaRtcCounterP.Init; components HplAtmRfa1Timer2C; AtmegaRtcCounterP.AtmegaCounter -> HplAtmRfa1Timer2C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/CounterRtc32C.nc000066400000000000000000000036111207233610700234650ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration CounterRtc32C { provides interface Counter; } implementation { components new TransformCounterC(TRtc, uint32_t, TRtc, uint16_t, 0, uint16_t); Counter = TransformCounterC; TransformCounterC.CounterFrom -> CounterRtc16C; components CounterRtc16C; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HighBits.nc000066400000000000000000000050421207233610700226260ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface HighBits { async command to_size_t getXXX(from_size_t low, int8_t increment); /** * Returns the stored high bits. */ async command to_size_t get(); /** * Increments the stored high bits, and returns TRUE * if the high bits become 0. */ async command bool add(int8_t high); /** * Returns TRUE if the high bits plus the increment is zero */ async command bool equals(int8_t high); /** * Takes the low bits from the parameter and returns it */ async command to_size_t convertLow(from_size_t low); /** * Takes the parameter and interprets it as high bits. */ async command to_size_t convertHigh(int8_t high); /** * Takes the high bits from the parameter and stores it in * memory, then it returns the low bits. You should not * use this method to increment the high bits. */ async command from_size_t set(to_size_t value); } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HighBitsC.nc000066400000000000000000000134721207233610700227370ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ /** * This component allows you to store and manipulate high and low * bits of an integer. You can freely use positive or negative * bitshifts. * * The layout of to_size_t: * +------------------------------------+-----------------------------+ * | high bits stored by this component | low bits given in arguments | * +------------------------------------+-----------------------------+ * * The layout of from_size_t: * +-----------------------------+-----------------------------+ * | low bits given in arguments | bitshift many discaded bits | * +-----------------------------+-----------------------------+ * * The layout of high_bytes_t: * +------------------------------------+-------------+ * | high bits stored by this component | always zero | * +------------------------------------+-------------+ */ generic module HighBitsC(typedef to_size_t @integer(), typedef from_size_t @integer(), int8_t bitshift) { provides interface HighBits; } implementation { enum { FROM_SIZE = sizeof(from_size_t), TO_SIZE = sizeof(to_size_t), BITSHIFT = bitshift, // the number of bits stored in memory HIGH_BITS = 8 * (TO_SIZE - FROM_SIZE) + BITSHIFT, // the number of bits obtained from user LOW_BITS = 8 * FROM_SIZE - BITSHIFT, // compile time checks TOO_SMALL_HIGHBITS_SHIFT = 1 / (HIGH_BITS > 0), TOO_LARGE_HIGHBITS_SHIFT = 1 / (LOW_BITS > 0), // number of bytes required to store high bits HIGH_SIZE = HIGH_BITS < 0 ? -1 : HIGH_BITS == 0 ? 0 : HIGH_BITS <= 8 ? 1 : HIGH_BITS <= 16 ? 2 : HIGH_BITS <= 32 ? 4 : -1, // number of zero bits in high_bytes HIGH_ZEROS = 8 * HIGH_SIZE - HIGH_BITS, // shifts to align high_bytes into to_size HIGH_SHIFTS = 8 * (TO_SIZE - HIGH_SIZE), }; uint8_t high_bytes[HIGH_SIZE]; typedef union reg32_t { uint32_t full; struct { uint16_t low; uint16_t high; }; } reg32_t; async command to_size_t HighBits.getXXX(from_size_t low, int8_t increment) { to_size_t value; if( HIGH_SIZE == 2 ) { reg32_t reg; reg.high = *(uint16_t*)high_bytes; reg.high += (int16_t)increment; reg.low = low; value = reg.full; } else value = 0; return value; } async command to_size_t HighBits.get() { to_size_t value; if( HIGH_SIZE == 1 ) { uint8_t high = *(uint8_t*)high_bytes; value = ((to_size_t)high) << (HIGH_SIZE == 1 ? HIGH_SHIFTS : 0); } else if( HIGH_SIZE == 2 ) { uint16_t high = *(uint16_t*)high_bytes; value = ((to_size_t)high) << (HIGH_SIZE == 2 ? HIGH_SHIFTS : 0); } else if( HIGH_SIZE == 4 ) { uint32_t high = *(uint32_t*)high_bytes; value = ((to_size_t)high) << (HIGH_SIZE == 4 ? HIGH_SHIFTS : 0); } else value = 0; return value; } async command bool HighBits.add(int8_t high) { if( HIGH_SIZE == 1 ) { return (*(uint8_t*)high_bytes += high << HIGH_ZEROS) == 0; } else if( HIGH_SIZE == 2 ) { return (*(uint16_t*)high_bytes += ((int16_t)high) << HIGH_ZEROS) == 0; } else if( HIGH_SIZE == 4 ) { return (*(uint32_t*)high_bytes += ((int32_t)high) << HIGH_ZEROS) == 0; } else return TRUE; } async command bool HighBits.equals(int8_t high) { if( HIGH_SIZE == 1 ) { return (*(uint8_t*)high_bytes) + (high << HIGH_ZEROS) == 0; } else if( HIGH_SIZE == 2 ) { return (*(uint16_t*)high_bytes) + (((int16_t)high) << HIGH_ZEROS) == 0; } else if( HIGH_SIZE == 4 ) { return (*(uint32_t*)high_bytes) + (((int32_t)high) << HIGH_ZEROS) == 0; } else return TRUE; } async command to_size_t HighBits.convertLow(from_size_t low) { to_size_t value; if( BITSHIFT > 0 ) value = ((to_size_t)low) >> (BITSHIFT > 0 ? BITSHIFT : 0); else if( BITSHIFT < 0 ) value = ((to_size_t)low) << (BITSHIFT < 0 ? -BITSHIFT : 0); else value = (to_size_t)low; return value; } inline async command to_size_t HighBits.convertHigh(int8_t high) { if( TO_SIZE == 1 ) { return ((int8_t)high) << (TO_SIZE == 1 ? LOW_BITS : 0); } else if( TO_SIZE == 2 ) { return ((int16_t)high) << (TO_SIZE == 2 ? LOW_BITS : 0); } else if( TO_SIZE == 4 ) { return ((int32_t)high) << (TO_SIZE == 4 ? LOW_BITS : 0); } else return 0; } async command from_size_t HighBits.set(to_size_t value) { // TODO: implement it return 0; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1Timer.h000066400000000000000000000110511207233610700236510ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __HPLATMRFA1TIMER_H__ #define __HPLATMRFA1TIMER_H__ // ------- 8-bit timers ------- // constants for AtmegaTimer.setMode enum { // timer control register (TCCR), clock select bits (CS) ATMRFA1_CLK8_OFF = 0, ATMRFA1_CLK8_NORMAL = 1, ATMRFA1_CLK8_DIVIDE_8 = 2, ATMRFA1_CLK8_DIVIDE_32 = 3, ATMRFA1_CLK8_DIVIDE_64 = 4, ATMRFA1_CLK8_DIVIDE_128 = 5, ATMRFA1_CLK8_DIVIDE_256 = 6, ATMRFA1_CLK8_DIVIDE_1024 = 7, // timer control register (TCCR), wave generation mode (WGM) ATMRFA1_WGM8_NORMAL = 0 << 3, ATMRFA1_WGM8_PWM = 1 << 3, ATMRFA1_WGM8_CTC = 2 << 3, ATMRFA1_WGM8_PWM_FAST = 3 << 3, ATMRFA1_WGM8_COMPARE_HIGH = 5 << 3, ATMRFA1_WGM8_COMPARE_LOW = 7 << 3, // asynchronous status register (ASSR) clock bits (EXCLK and AS2) ATMRFA1_ASYNC_OFF = 0 << 6, ATMRFA1_ASYNC_ON = 1 << 6, ATMRFA1_ASYNC_EXT = 3 << 6, }; // constants for AtmegaCompare.setMode enum { // timer control register (TCCR), compare output mode (COM) ATMRFA1_COM8_OFF = 0, ATMRFA1_COM8_TOGGLE, ATMRFA1_COM8_CLEAR, ATMRFA1_COM8_SET, }; // ------- 16-bit timers ------- // constants for AtmegaTimer.setMode enum { // timer control register (TCCR), clock select bits (CS) ATMRFA1_CLK16_OFF = 0, ATMRFA1_CLK16_NORMAL = 1, ATMRFA1_CLK16_DIVIDE_8 = 2, ATMRFA1_CLK16_DIVIDE_64 = 3, ATMRFA1_CLK16_DIVIDE_256 = 4, ATMRFA1_CLK16_DIVIDE_1024 = 5, ATMRFA1_CLK16_EXTERNAL_FALL = 6, ATMRFA1_CLK16_EXTERNAL_RISE = 7, // timer control register (TCCR), wave generation mode (WGM) ATMRFA1_WGM16_NORMAL = 0 << 3, ATMRFA1_WGM16_PWM_8BIT = 1 << 3, ATMRFA1_WGM16_PWM_9BIT = 2 << 3, ATMRFA1_WGM16_PWM_10BIT = 3 << 3, ATMRFA1_WGM16_CTC_COMPARE = 4 << 3, ATMRFA1_WGM16_PWM_FAST_8BIT = 5 << 3, ATMRFA1_WGM16_PWM_FAST_9BIT = 6 << 3, ATMRFA1_WGM16_PWM_FAST_10BIT = 7 << 3, ATMRFA1_WGM16_PWM_CAPTURE_LOW = 8 << 3, ATMRFA1_WGM16_PWM_COMPARE_LOW = 9 << 3, ATMRFA1_WGM16_PWM_CAPTURE_HIGH = 10 << 3, ATMRFA1_WGM16_PWM_COMPARE_HIGH = 11 << 3, ATMRFA1_WGM16_CTC_CAPTURE = 12 << 3, ATMRFA1_WGM16_RESERVED = 13 << 3, ATMRFA1_WGM16_PWM_FAST_CAPTURE = 14 << 3, ATMRFA1_WGM16_PWM_FAST_COMPARE = 15 << 3, }; // constants for AtmegaCompare.setMode enum { // timer control register (TCCR), compare output mode (COM) ATMRFA1_COM16_NORMAL = 0, ATMRFA1_COM16_TOGGLE, ATMRFA1_COM16_CLEAR, ATMRFA1_COM16_SET }; // constants for AtmegaCapture.setMode enum { ATMRFA1_CAP16_RISING_EDGE = 0x01, ATMRFA1_CAP16_NOISE_CANCEL = 0x02, }; // ------- MAC symbol counter ------- // constants for AtmegaTimer.setMode enum { ATMRFA1_CLKSC_DISABLE = 0, ATMRFA1_CLKSC_XTAL = 1 << SCEN, // 16 MHz XTAL1 ATMRFA1_CLKSC_RTC = (1 << SCEN) | (1 << SCCKSEL), // 32 KHz RTC }; // constants for AtmegaCompare.setMode enum { ATMRFA1_COMSC_ABSOLUTE = 0, ATMRFA1_COMSC_RELATIVE = 1, }; // constants for AtmegaCapture.setMode enum { ATMRFA1_CAPSC_OFF = 0, ATMRFA1_CAPSC_ON = 1, }; #endif//__HPLATMRFA1TIMER_H__ tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1Timer1C.nc000066400000000000000000000042121207233610700242070ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration HplAtmRfa1Timer1C { provides { interface AtmegaCounter as Counter; interface AtmegaCompare as Compare[uint8_t id]; interface AtmegaCapture as Capture; } } implementation { components HplAtmRfa1Timer1P; Counter = HplAtmRfa1Timer1P; Compare[0] = HplAtmRfa1Timer1P.CompareA; Compare[1] = HplAtmRfa1Timer1P.CompareB; Compare[2] = HplAtmRfa1Timer1P.CompareC; Capture = HplAtmRfa1Timer1P; components McuSleepC; HplAtmRfa1Timer1P.McuPowerState -> McuSleepC; HplAtmRfa1Timer1P.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1Timer1P.nc000066400000000000000000000214311207233610700242260ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "HplAtmRfa1Timer.h" module HplAtmRfa1Timer1P @safe() { provides { interface AtmegaCounter as Timer; interface AtmegaCompare as CompareA; interface AtmegaCompare as CompareB; interface AtmegaCompare as CompareC; interface AtmegaCapture as Capture; interface McuPowerOverride; } uses { interface McuPowerState; } } implementation { // ----- TIMER: timer counter register (TCNT) async command uint16_t Timer.get() { atomic return TCNT1; } async command void Timer.set(uint16_t value) { atomic TCNT1 = value; } // ----- TIMER: timer interrupt flag register (TIFR), timer overflow flag (TOV) default async event void Timer.overflow() { } AVR_ATOMIC_HANDLER(TIMER1_OVF_vect) { signal Timer.overflow(); } async command bool Timer.test() { return TIFR1 & (1 << TOV1); } async command void Timer.reset() { TIFR1 = 1 << TOV1; } // ----- TIMER: timer interrupt mask register (TIMSK), timer overflow interrupt enable (TOIE) async command void Timer.start() { SET_BIT(TIMSK1, TOIE1); } async command void Timer.stop() { CLR_BIT(TIMSK1, TOIE1); } async command bool Timer.isOn() { return TIMSK1 & (1 << TOIE1); } // ----- TIMER: timer control register (TCCR), clock select (CS) and waveform generation mode (WGM) bits async command void Timer.setMode(uint8_t mode) { atomic { TCCR1A = (TCCR1A & ~(0x3 << WGM10)) | ((mode >> 3) & 0x3) << WGM10; TCCR1B = (TCCR1B & ~(0x3 << WGM12 | 0x7 << CS10)) | ((mode >> 5) & 0x3) << WGM12 | ((mode >> 0) & 0x7) << CS10; } } async command uint8_t Timer.getMode() { uint8_t a, b; atomic { a = TCCR1A; b = TCCR1B; } return ((a >> WGM10) & 0x3) << 3 | ((b >> WGM12) & 0x3) << 5 | ((b >> CS10) & 0x7) << 0; } // ----- COMPARE A: output compare register (OCR) async command uint16_t CompareA.get() { atomic return OCR1A; } async command void CompareA.set(uint16_t value) { atomic OCR1A = value; } // ----- COMPARE B: output compare register (OCR) async command uint16_t CompareB.get() { atomic return OCR1B; } async command void CompareB.set(uint16_t value) { atomic OCR1B = value; } // ----- COMPARE C: output compare register (OCR) async command uint16_t CompareC.get() { atomic return OCR1C; } async command void CompareC.set(uint16_t value) { atomic OCR1C = value; } // ----- COMPARE A: timer interrupt flag register (TIFR), output comare match flag (OCF) default async event void CompareA.fired() { } AVR_ATOMIC_HANDLER(TIMER1_COMPA_vect) { signal CompareA.fired(); } async command bool CompareA.test() { return TIFR1 & (1 << OCF1A); } async command void CompareA.reset() { TIFR1 = 1 << OCF1A; } // ----- COMPARE B: timer interrupt flag register (TIFR), output comare match flag (OCF) default async event void CompareB.fired() { } AVR_ATOMIC_HANDLER(TIMER1_COMPB_vect) { signal CompareB.fired(); } async command bool CompareB.test() { return TIFR1 & (1 << OCF1B); } async command void CompareB.reset() { TIFR1 = 1 << OCF1B; } // ----- COMPARE C: timer interrupt flag register (TIFR), output comare match flag (OCF) default async event void CompareC.fired() { } AVR_ATOMIC_HANDLER(TIMER1_COMPC_vect) { signal CompareC.fired(); } async command bool CompareC.test() { return TIFR1 & (1 << OCF1C); } async command void CompareC.reset() { TIFR1 = 1 << OCF1C; } // ----- COMPARE A: timer interrupt mask register (TIMSK), output compare interrupt enable (OCIE) async command void CompareA.start() { SET_BIT(TIMSK1, OCIE1A); call McuPowerState.update(); } async command void CompareA.stop() { CLR_BIT(TIMSK1, OCIE1A); call McuPowerState.update(); } async command bool CompareA.isOn() { return TIMSK1 & (1 << OCIE1A); } // ----- COMPARE B: timer interrupt mask register (TIMSK), output compare interrupt enable (OCIE) async command void CompareB.start() { SET_BIT(TIMSK1, OCIE1B); call McuPowerState.update(); } async command void CompareB.stop() { CLR_BIT(TIMSK1, OCIE1B); call McuPowerState.update(); } async command bool CompareB.isOn() { return TIMSK1 & (1 << OCIE1B); } // ----- COMPARE C: timer interrupt mask register (TIMSK), output compare interrupt enable (OCIE) async command void CompareC.start() { SET_BIT(TIMSK1, OCIE1C); call McuPowerState.update(); } async command void CompareC.stop() { CLR_BIT(TIMSK1, OCIE1C); call McuPowerState.update(); } async command bool CompareC.isOn() { return TIMSK1 & (1 << OCIE1C); } // ----- COMPARE A: timer control register (TCCR), compare output mode (COM) async command void CompareA.setMode(uint8_t mode) { atomic { TCCR1A = (TCCR1A & ~(0x3 << COM1A0)) | (mode & 0x3) << COM1A0; } } async command uint8_t CompareA.getMode() { return (TCCR1A >> COM1A0) & 0x3; } // ----- COMPARE B: timer control register (TCCR), compare output mode (COM) async command void CompareB.setMode(uint8_t mode) { atomic { TCCR1B = (TCCR1B & ~(0x3 << COM1B0)) | (mode & 0x3) << COM1B0; } } async command uint8_t CompareB.getMode() { return (TCCR1B >> COM1B0) & 0x3; } // ----- COMPARE C: timer control register (TCCR), compare output mode (COM) async command void CompareC.setMode(uint8_t mode) { atomic { TCCR1C = (TCCR1C & ~(0x3 << COM1C0)) | (mode & 0x3) << COM1C0; } } async command uint8_t CompareC.getMode() { return (TCCR1C >> COM1C0) & 0x3; } // ----- COMPARE A: timer control register (TCCR), force output compare (FOC) async command void CompareA.force() { SET_BIT(TCCR1C, FOC1A); } // ----- COMPARE B: timer control register (TCCR), force output compare (FOC) async command void CompareB.force() { SET_BIT(TCCR1C, FOC1B); } // ----- COMPARE C: timer control register (TCCR), force output compare (FOC) async command void CompareC.force() { SET_BIT(TCCR1C, FOC1C); } // ----- CAPTURE: input capture register (ICR) async command uint16_t Capture.get() { atomic return ICR1; } async command void Capture.set(uint16_t value) { atomic ICR1 = value; } // ----- CAPTURE: timer interrupt flag register (TIFR), input capture flag (ICF) default async event void Capture.fired() { } AVR_ATOMIC_HANDLER(TIMER1_CAPT_vect) { signal Capture.fired(); } async command bool Capture.test() { return TIFR1 & (1 << ICF1); } async command void Capture.reset() { TIFR1 = 1 << ICF1; } // ----- CAPTURE: timer interrupt mask register (TIMSK), input capture interrupt enable (ICIE) async command void Capture.start() { SET_BIT(TIMSK1, ICIE1); call McuPowerState.update(); } async command void Capture.stop() { CLR_BIT(TIMSK1, ICIE1); call McuPowerState.update(); } async command bool Capture.isOn() { return TIMSK1 & (1 << ICIE1); } // ----- CAPTURE: timer control register (TCCR), input capture mode (COM) async command void Capture.setMode(uint8_t mode) { atomic { TCCR1B = (TCCR1B & ~(0x3 << ICES1)) | (mode & 0x3) << ICES1; } } async command uint8_t Capture.getMode() { return (TCCR1B >> ICES1) & 0x3; } // ----- MCUPOWER async command mcu_power_t McuPowerOverride.lowestState() { // if we need to wake up by this clock if( TIMSK1 & (1 << OCIE1A | 1 << OCIE1B | 1 << OCIE1C | 1 << ICIE1) ) return ATM128_POWER_IDLE; else return ATM128_POWER_DOWN; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1Timer2AsyncC.nc000066400000000000000000000040651207233610700252140ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration HplAtmRfa1Timer2AsyncC { provides { interface AtmegaCounter as Counter; interface AtmegaCompare as Compare[uint8_t id]; } } implementation { components HplAtmRfa1Timer2AsyncP; Counter = HplAtmRfa1Timer2AsyncP; Compare[0] = HplAtmRfa1Timer2AsyncP.CompareA; // Compare[1] = HplAtmRfa1Timer2AsyncP.CompareB; components McuSleepC; HplAtmRfa1Timer2AsyncP.McuPowerState -> McuSleepC; HplAtmRfa1Timer2AsyncP.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1Timer2AsyncP.nc000066400000000000000000000144731207233610700252350ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "HplAtmRfa1Timer.h" module HplAtmRfa1Timer2AsyncP @safe() { provides { interface AtmegaCounter as Counter; interface AtmegaCompare as CompareA; // interface AtmegaCompare as CompareB; interface McuPowerOverride; } uses { interface McuPowerState; } } implementation { /* Updating certain registers takes 1-2 clock ticks at 32768 KHz (regardless of the prescaler) if the timer is running asynchronously, so we have to monitor when these updates are propagated. We always check ASSR before updating these registers, and we do not wait for completion after the change to make good use of the processor time. However, we force the mcu power state calculation and before entering power down mode we wait for the completion of these register updates. */ // ----- TIMER: timer counter register (TCNT) async command uint8_t Counter.get() { // TODO: make sure we wait at least one 1/32768 clock tick after wakeup return TCNT2; } async command void Counter.set(uint8_t value) { atomic { while( ASSR & (1 << TCN2UB) ) ; TCNT2 = value; } call McuPowerState.update(); } // ----- TIMER: timer interrupt flag register (TIFR), timer overflow flag (TOV) default async event void Counter.overflow() { } AVR_ATOMIC_HANDLER(TIMER2_OVF_vect) { // to keep the MCU from going to sleep too early TCCR2A = TCCR2A; call McuPowerState.update(); signal Counter.overflow(); } async command bool Counter.test() { return TIFR2 & (1 << TOV2); } async command void Counter.reset() { TIFR2 = 1 << TOV2; } // ----- TIMER: timer interrupt mask register (TIMSK), timer overflow interrupt enable (TOIE) async command void Counter.start() { SET_BIT(TIMSK2, TOIE2); call McuPowerState.update(); } async command void Counter.stop() { CLR_BIT(TIMSK2, TOIE2); call McuPowerState.update(); } async command bool Counter.isOn() { return TIMSK2 & (1 << TOIE2); } // ----- TIMER: timer control register (TCCR), clock select (CS) and waveform generation mode (WGM) bits async command void Counter.setMode(uint8_t mode) { atomic { ASSR = (ASSR & ~(0x3 << AS2)) | ((mode >> 6) & 0x3) << AS2; while( ASSR & (1 << TCR2AUB | 1 << TCR2BUB) ) ; TCCR2A = (TCCR2A & ~(0x3 << WGM20)) | ((mode >> 3) & 0x3) << WGM20; TCCR2B = (TCCR2B & ~(0x1 << WGM22 | 0x7 << CS20)) | ((mode >> 5) & 0x1) << WGM22 | ((mode >> 0) & 0x7) << CS20; } call McuPowerState.update(); } async command uint8_t Counter.getMode() { uint8_t a, b, c; atomic { a = ASSR; b = TCCR2A; c = TCCR2B; } return ((a >> AS2) & 0x3) << 6 | ((b >> WGM20) & 0x3) << 3 | ((c >> WGM22) & 0x1) << 5 | ((c >> CS20) & 0x7) << 0; } // ----- COMPARE A: output compare register (OCR) async command uint8_t CompareA.get() { return OCR2A; } async command void CompareA.set(uint8_t value) { atomic { while( ASSR & (1 << OCR2AUB) ) ; OCR2A = value; } call McuPowerState.update(); } // ----- COMPARE A: timer interrupt flag register (TIFR), output comare match flag (OCF) default async event void CompareA.fired() { } AVR_ATOMIC_HANDLER(TIMER2_COMPA_vect) { // to keep the MCU from going to sleep too early TCCR2A = TCCR2A; call McuPowerState.update(); signal CompareA.fired(); } async command bool CompareA.test() { return TIFR2 & (1 << OCF2A); } async command void CompareA.reset() { TIFR2 = 1 << OCF2A; } // ----- COMPARE A: timer interrupt mask register (TIMSK), output compare interrupt enable (OCIE) async command void CompareA.start() { SET_BIT(TIMSK2, OCIE2A); call McuPowerState.update(); } async command void CompareA.stop() { CLR_BIT(TIMSK2, OCIE2A); call McuPowerState.update(); } async command bool CompareA.isOn() { return TIMSK2 & (1 << OCIE2A); } // ----- COMPARE A: timer control register (TCCR), compare output mode (COM) async command void CompareA.setMode(uint8_t mode) { atomic { while( ASSR & (1 << TCR2AUB) ) ; TCCR2A = (TCCR2A & ~(0x3 << COM2A0)) | (mode & 0x3) << COM2A0; } call McuPowerState.update(); } async command uint8_t CompareA.getMode() { return (TCCR2A >> COM2A0) & 0x3; } // ----- COMPARE A: timer control register (TCCR), force output compare (FOC) async command void CompareA.force() { atomic { while( ASSR & (1 << TCR2BUB) ) ; SET_BIT(TCCR2B, FOC2A); } call McuPowerState.update(); } // ----- MCUPOWER async command mcu_power_t McuPowerOverride.lowestState() { // wait for all changes to propagate while( ASSR & (1 << TCN2UB | 1 << OCR2AUB | 1 << OCR2BUB | 1 << TCR2AUB | 1 << TCR2BUB) ) ; // if we need to wake up by this clock if( TIMSK2 & (1 << TOIE2 | 1 << OCIE2A | 1 << OCIE2B) ) return ATM128_POWER_SAVE; else return ATM128_POWER_DOWN; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1Timer3C.nc000066400000000000000000000042121207233610700242110ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration HplAtmRfa1Timer3C { provides { interface AtmegaCounter as Counter; interface AtmegaCompare as Compare[uint8_t id]; interface AtmegaCapture as Capture; } } implementation { components HplAtmRfa1Timer3P; Counter = HplAtmRfa1Timer3P; Compare[0] = HplAtmRfa1Timer3P.CompareA; Compare[1] = HplAtmRfa1Timer3P.CompareB; Compare[2] = HplAtmRfa1Timer3P.CompareC; Capture = HplAtmRfa1Timer3P; components McuSleepC; HplAtmRfa1Timer3P.McuPowerState -> McuSleepC; HplAtmRfa1Timer3P.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1Timer3P.nc000066400000000000000000000214311207233610700242300ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "HplAtmRfa1Timer.h" module HplAtmRfa1Timer3P @safe() { provides { interface AtmegaCounter as Timer; interface AtmegaCompare as CompareA; interface AtmegaCompare as CompareB; interface AtmegaCompare as CompareC; interface AtmegaCapture as Capture; interface McuPowerOverride; } uses { interface McuPowerState; } } implementation { // ----- TIMER: timer counter register (TCNT) async command uint16_t Timer.get() { atomic return TCNT3; } async command void Timer.set(uint16_t value) { atomic TCNT3 = value; } // ----- TIMER: timer interrupt flag register (TIFR), timer overflow flag (TOV) default async event void Timer.overflow() { } AVR_ATOMIC_HANDLER(TIMER3_OVF_vect) { signal Timer.overflow(); } async command bool Timer.test() { return TIFR3 & (1 << TOV3); } async command void Timer.reset() { TIFR3 = 1 << TOV3; } // ----- TIMER: timer interrupt mask register (TIMSK), timer overflow interrupt enable (TOIE) async command void Timer.start() { SET_BIT(TIMSK3, TOIE3); } async command void Timer.stop() { CLR_BIT(TIMSK3, TOIE3); } async command bool Timer.isOn() { return TIMSK3 & (1 << TOIE3); } // ----- TIMER: timer control register (TCCR), clock select (CS) and waveform generation mode (WGM) bits async command void Timer.setMode(uint8_t mode) { atomic { TCCR3A = (TCCR3A & ~(0x3 << WGM30)) | ((mode >> 3) & 0x3) << WGM30; TCCR3B = (TCCR3B & ~(0x3 << WGM32 | 0x7 << CS30)) | ((mode >> 5) & 0x3) << WGM32 | ((mode >> 0) & 0x7) << CS30; } } async command uint8_t Timer.getMode() { uint8_t a, b; atomic { a = TCCR3A; b = TCCR3B; } return ((a >> WGM30) & 0x3) << 3 | ((b >> WGM32) & 0x3) << 5 | ((b >> CS30) & 0x7) << 0; } // ----- COMPARE A: output compare register (OCR) async command uint16_t CompareA.get() { atomic return OCR3A; } async command void CompareA.set(uint16_t value) { atomic OCR3A = value; } // ----- COMPARE B: output compare register (OCR) async command uint16_t CompareB.get() { atomic return OCR3B; } async command void CompareB.set(uint16_t value) { atomic OCR3B = value; } // ----- COMPARE C: output compare register (OCR) async command uint16_t CompareC.get() { atomic return OCR3C; } async command void CompareC.set(uint16_t value) { atomic OCR3C = value; } // ----- COMPARE A: timer interrupt flag register (TIFR), output comare match flag (OCF) default async event void CompareA.fired() { } AVR_ATOMIC_HANDLER(TIMER3_COMPA_vect) { signal CompareA.fired(); } async command bool CompareA.test() { return TIFR3 & (1 << OCF3A); } async command void CompareA.reset() { TIFR3 = 1 << OCF3A; } // ----- COMPARE B: timer interrupt flag register (TIFR), output comare match flag (OCF) default async event void CompareB.fired() { } AVR_ATOMIC_HANDLER(TIMER3_COMPB_vect) { signal CompareB.fired(); } async command bool CompareB.test() { return TIFR3 & (1 << OCF3B); } async command void CompareB.reset() { TIFR3 = 1 << OCF3B; } // ----- COMPARE C: timer interrupt flag register (TIFR), output comare match flag (OCF) default async event void CompareC.fired() { } AVR_ATOMIC_HANDLER(TIMER3_COMPC_vect) { signal CompareC.fired(); } async command bool CompareC.test() { return TIFR3 & (1 << OCF3C); } async command void CompareC.reset() { TIFR3 = 1 << OCF3C; } // ----- COMPARE A: timer interrupt mask register (TIMSK), output compare interrupt enable (OCIE) async command void CompareA.start() { SET_BIT(TIMSK3, OCIE3A); call McuPowerState.update(); } async command void CompareA.stop() { CLR_BIT(TIMSK3, OCIE3A); call McuPowerState.update(); } async command bool CompareA.isOn() { return TIMSK3 & (1 << OCIE3A); } // ----- COMPARE B: timer interrupt mask register (TIMSK), output compare interrupt enable (OCIE) async command void CompareB.start() { SET_BIT(TIMSK3, OCIE3B); call McuPowerState.update(); } async command void CompareB.stop() { CLR_BIT(TIMSK3, OCIE3B); call McuPowerState.update(); } async command bool CompareB.isOn() { return TIMSK3 & (1 << OCIE3B); } // ----- COMPARE C: timer interrupt mask register (TIMSK), output compare interrupt enable (OCIE) async command void CompareC.start() { SET_BIT(TIMSK3, OCIE3C); call McuPowerState.update(); } async command void CompareC.stop() { CLR_BIT(TIMSK3, OCIE3C); call McuPowerState.update(); } async command bool CompareC.isOn() { return TIMSK3 & (1 << OCIE3C); } // ----- COMPARE A: timer control register (TCCR), compare output mode (COM) async command void CompareA.setMode(uint8_t mode) { atomic { TCCR3A = (TCCR3A & ~(0x3 << COM3A0)) | (mode & 0x3) << COM3A0; } } async command uint8_t CompareA.getMode() { return (TCCR3A >> COM3A0) & 0x3; } // ----- COMPARE B: timer control register (TCCR), compare output mode (COM) async command void CompareB.setMode(uint8_t mode) { atomic { TCCR3B = (TCCR3B & ~(0x3 << COM3B0)) | (mode & 0x3) << COM3B0; } } async command uint8_t CompareB.getMode() { return (TCCR3B >> COM3B0) & 0x3; } // ----- COMPARE C: timer control register (TCCR), compare output mode (COM) async command void CompareC.setMode(uint8_t mode) { atomic { TCCR3C = (TCCR3C & ~(0x3 << COM3C0)) | (mode & 0x3) << COM3C0; } } async command uint8_t CompareC.getMode() { return (TCCR3C >> COM3C0) & 0x3; } // ----- COMPARE A: timer control register (TCCR), force output compare (FOC) async command void CompareA.force() { SET_BIT(TCCR3C, FOC3A); } // ----- COMPARE B: timer control register (TCCR), force output compare (FOC) async command void CompareB.force() { SET_BIT(TCCR3C, FOC3B); } // ----- COMPARE C: timer control register (TCCR), force output compare (FOC) async command void CompareC.force() { SET_BIT(TCCR3C, FOC3C); } // ----- CAPTURE: input capture register (ICR) async command uint16_t Capture.get() { atomic return ICR3; } async command void Capture.set(uint16_t value) { atomic ICR3 = value; } // ----- CAPTURE: timer interrupt flag register (TIFR), input capture flag (ICF) default async event void Capture.fired() { } AVR_ATOMIC_HANDLER(TIMER3_CAPT_vect) { signal Capture.fired(); } async command bool Capture.test() { return TIFR3 & (1 << ICF3); } async command void Capture.reset() { TIFR3 = 1 << ICF3; } // ----- CAPTURE: timer interrupt mask register (TIMSK), input capture interrupt enable (ICIE) async command void Capture.start() { SET_BIT(TIMSK3, ICIE3); call McuPowerState.update(); } async command void Capture.stop() { CLR_BIT(TIMSK3, ICIE3); call McuPowerState.update(); } async command bool Capture.isOn() { return TIMSK3 & (1 << ICIE3); } // ----- CAPTURE: timer control register (TCCR), input capture mode (COM) async command void Capture.setMode(uint8_t mode) { atomic { TCCR3B = (TCCR3B & ~(0x3 << ICES3)) | (mode & 0x3) << ICES3; } } async command uint8_t Capture.getMode() { return (TCCR3B >> ICES3) & 0x3; } // ----- MCUPOWER async command mcu_power_t McuPowerOverride.lowestState() { // if we need to wake up by this clock if( TIMSK3 & (1 << OCIE3A | 1 << OCIE3B | 1 << OCIE3C | 1 << ICIE3) ) return ATM128_POWER_IDLE; else return ATM128_POWER_DOWN; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1TimerMacC.nc000066400000000000000000000043131207233610700245510ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "HplAtmRfa1Timer.h" configuration HplAtmRfa1TimerMacC { provides { interface AtmegaCounter as Counter; interface AtmegaCompare as Compare[uint8_t id]; interface AtmegaCapture as SfdCapture; } } implementation { components HplAtmRfa1TimerMacP; Counter = HplAtmRfa1TimerMacP; Compare[0] = HplAtmRfa1TimerMacP.CompareA; Compare[1] = HplAtmRfa1TimerMacP.CompareB; Compare[2] = HplAtmRfa1TimerMacP.CompareC; SfdCapture = HplAtmRfa1TimerMacP.SfdCapture; components McuSleepC; HplAtmRfa1TimerMacP.McuPowerState -> McuSleepC; HplAtmRfa1TimerMacP.McuPowerOverride <- McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/HplAtmRfa1TimerMacP.nc000066400000000000000000000231671207233610700245760ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "HplAtmRfa1Timer.h" module HplAtmRfa1TimerMacP @safe() { provides { interface AtmegaCounter as Counter; interface AtmegaCompare as CompareA; interface AtmegaCompare as CompareB; interface AtmegaCompare as CompareC; interface AtmegaCapture as SfdCapture; interface McuPowerOverride; } uses { interface McuPowerState; } } implementation { typedef union reg32_t { uint32_t full; struct { uint8_t ll; uint8_t lh; uint8_t hl; uint8_t hh; }; } reg32_t; // ----- COUNTER: symbol counter register (SCCNT) async command uint32_t Counter.get() { reg32_t time; atomic { time.ll = SCCNTLL; time.lh = SCCNTLH; time.hl = SCCNTHL; time.hh = SCCNTHH; } return time.full; } async command void Counter.set(uint32_t value) { reg32_t time; time.full = value; atomic { SCCNTHH = time.hh; SCCNTHL = time.hl; SCCNTLH = time.lh; SCCNTLL = time.ll; } while( SCSR & (1 << SCBSY) ) ; } // ----- COUNTER: symbol counter interrupt status register (SCIRQS), overflow flag (IRQSOF) default async event void Counter.overflow() { } AVR_ATOMIC_HANDLER(SCNT_OVFL_vect) { signal Counter.overflow(); } async command bool Counter.test() { return SCIRQS & (1 << IRQSOF); } async command void Counter.reset() { SCIRQS = 1 << IRQSOF; } // ----- COUNTER: symbol counter interrupt mask register (SCIRQM), overflow interrupt enable (IRQMOF) async command void Counter.start() { SET_BIT(SCIRQM, IRQMOF); } async command void Counter.stop() { CLR_BIT(SCIRQM, IRQMOF); } async command bool Counter.isOn() { return SCIRQM & (1 << IRQMOF); } // ----- COUNTER: symbol counter control register (SCCR), counter enable (SCEN) and clock select (SCCKSEL) async command void Counter.setMode(uint8_t mode) { mode &= (1 << SCEN) | (1 << SCCKSEL); // RTC needs to be enabled, otherwise it does not work if( (mode & (1 << SCCKSEL)) != 0 ) ASSR = 1 << AS2; atomic SCCR0 = (SCCR0 & ~((1 << SCEN) | (1 << SCCKSEL))) | mode; call McuPowerState.update(); } async command uint8_t Counter.getMode() { return SCCR0 & ((1 << SCEN) | (1 << SCCKSEL)); } // ----- COMPARE A: symbol counter output compare register (SCOCR) async command uint32_t CompareA.get() { reg32_t time; atomic { time.ll = SCOCR1LL; time.lh = SCOCR1LH; time.hl = SCOCR1HL; time.hh = SCOCR1HH; } return time.full; } async command void CompareA.set(uint32_t value) { reg32_t time; time.full = value; atomic { SCOCR1HH = time.hh; SCOCR1HL = time.hl; SCOCR1LH = time.lh; SCOCR1LL = time.ll; } } // ----- COMPARE A: symbol counter interrupt status register (SCIRQS), comare match flag (IRQSCP) default async event void CompareA.fired() { } AVR_ATOMIC_HANDLER(SCNT_CMP1_vect) { signal CompareA.fired(); } async command bool CompareA.test() { return SCIRQS & (1 << IRQSCP1); } async command void CompareA.reset() { SCIRQS = 1 << IRQSCP1; } // ----- COMPARE A: symbol counter interrupt mask register (SCIRQM), compare interrupt enable (IRQMCP) async command void CompareA.start() { SET_BIT(SCIRQM, IRQMCP1); call McuPowerState.update(); } async command void CompareA.stop() { CLR_BIT(SCIRQM, IRQMCP1); call McuPowerState.update(); } async command bool CompareA.isOn() { return SCIRQM & (1 << IRQMCP1); } // ----- COMPARE A: symbol counter control register (SCCR), compare mode (SCCMP) async command void CompareA.setMode(uint8_t mode) { atomic { SCCR0 = (SCCR0 & ~(1 << SCCMP1)) | (mode & 0x1) << SCCMP1; } } async command uint8_t CompareA.getMode() { return (SCCR0 >> SCCMP1) & 0x1; } // ----- COMPARE A: ignore force for the symbol counter async command void CompareA.force() { } // ----- COMPARE B: symbol counter output compare register (SCOCR) async command uint32_t CompareB.get() { reg32_t time; atomic { time.ll = SCOCR2LL; time.lh = SCOCR2LH; time.hl = SCOCR2HL; time.hh = SCOCR2HH; } return time.full; } async command void CompareB.set(uint32_t value) { reg32_t time; time.full = value; atomic { SCOCR2HH = time.hh; SCOCR2HL = time.hl; SCOCR2LH = time.lh; SCOCR2LL = time.ll; } } // ----- COMPARE B: symbol counter interrupt status register (SCIRQS), comare match flag (IRQSCP) default async event void CompareB.fired() { } AVR_ATOMIC_HANDLER(SCNT_CMP2_vect) { signal CompareB.fired(); } async command bool CompareB.test() { return SCIRQS & (1 << IRQSCP2); } async command void CompareB.reset() { SCIRQS = 1 << IRQSCP2; } // ----- COMPARE B: symbol counter interrupt mask register (SCIRQM), compare interrupt enable (IRQMCP) async command void CompareB.start() { SET_BIT(SCIRQM, IRQMCP2); call McuPowerState.update(); } async command void CompareB.stop() { CLR_BIT(SCIRQM, IRQMCP2); call McuPowerState.update(); } async command bool CompareB.isOn() { return SCIRQM & (1 << IRQMCP2); } // ----- COMPARE B: symbol counter control register (SCCR), compare mode (SCCMP) async command void CompareB.setMode(uint8_t mode) { atomic { SCCR0 = (SCCR0 & ~(1 << SCCMP2)) | (mode & 0x1) << SCCMP2; } } async command uint8_t CompareB.getMode() { return (SCCR0 >> SCCMP2) & 0x1; } // ----- COMPARE B: ignore force for the symbol counter async command void CompareB.force() { } // ----- COMPARE C: symbol counter output compare register (SCOCR) async command uint32_t CompareC.get() { reg32_t time; atomic { time.ll = SCOCR3LL; time.lh = SCOCR3LH; time.hl = SCOCR3HL; time.hh = SCOCR3HH; } return time.full; } async command void CompareC.set(uint32_t value) { reg32_t time; time.full = value; atomic { SCOCR3HH = time.hh; SCOCR3HL = time.hl; SCOCR3LH = time.lh; SCOCR3LL = time.ll; } } // ----- COMPARE C: symbol counter interrupt status register (SCIRQS), comare match flag (IRQSCP) default async event void CompareC.fired() { } AVR_ATOMIC_HANDLER(SCNT_CMP3_vect) { signal CompareC.fired(); } async command bool CompareC.test() { return SCIRQS & (1 << IRQSCP3); } async command void CompareC.reset() { SCIRQS = 1 << IRQSCP3; } // ----- COMPARE C: symbol counter interrupt mask register (SCIRQM), compare interrupt enable (IRQMCP) async command void CompareC.start() { SET_BIT(SCIRQM, IRQMCP3); call McuPowerState.update(); } async command void CompareC.stop() { CLR_BIT(SCIRQM, IRQMCP3); call McuPowerState.update(); } async command bool CompareC.isOn() { return SCIRQM & (1 << IRQMCP3); } // ----- COMPARE C: symbol counter control register (SCCR), compare mode (SCCMP) async command void CompareC.setMode(uint8_t mode) { atomic { SCCR0 = (SCCR0 & ~(1 << SCCMP3)) | (mode & 0x1) << SCCMP3; } } async command uint8_t CompareC.getMode() { return (SCCR0 >> SCCMP3) & 0x1; } // ----- COMPARE C: ignore force for the symbol counter async command void CompareC.force() { } // ----- SFD CAPTURE: symbol counter time stamp register (SCTSR) async command uint32_t SfdCapture.get() { reg32_t time; atomic { time.ll = SCTSRLL; time.lh = SCTSRLH; time.hl = SCTSRHL; time.hh = SCTSRHH; } return time.full; } async command void SfdCapture.set(uint32_t value) { // SCTSR is read only } // ----- SFD CAPTURE: has no interrupt (use RX_START instead) async command bool SfdCapture.test() { return FALSE; } async command void SfdCapture.reset() { } async command void SfdCapture.start() { } async command void SfdCapture.stop() { } async command bool SfdCapture.isOn() { return FALSE; } // ----- SFD CAPTURE: symbol counter control register (SCCR), timestamping enable (SCTES) async command void SfdCapture.setMode(uint8_t mode) { atomic { SCCR0 = (SCCR0 & ~(1 << SCTSE)) | (mode & 0x1) << SCTSE; } } async command uint8_t SfdCapture.getMode() { return (SCCR0 >> SCTSE) & 0x1; } // ----- MCUPOWER async command mcu_power_t McuPowerOverride.lowestState() { // TODO: check out why ATM128_POWER_DOWN does not work if( SCCR0 & (1 << SCEN) ) return ATM128_POWER_SAVE; else return ATM128_POWER_DOWN; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/LocalTime62khzC.nc000066400000000000000000000035431207233610700237720ustar00rootroot00000000000000/* * Copyright (c) 2010, ETH Zurich * * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Philipp Sommer */ #include "TimerConfig.h" configuration LocalTime62khzC { provides interface LocalTime; } implementation { components Counter62khz32C; components new CounterToLocalTimeC(T62khz); CounterToLocalTimeC.Counter -> Counter62khz32C; LocalTime = CounterToLocalTimeC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/LocalTimeMcuC.nc000066400000000000000000000035371207233610700235550ustar00rootroot00000000000000/* * Copyright (c) 2008, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration LocalTimeMcuC { provides interface LocalTime; } implementation { components CounterMcu32C; components new CounterToLocalTimeC(TMcu); CounterToLocalTimeC.Counter -> CounterMcu32C; LocalTime = CounterToLocalTimeC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/LocalTimeMicroC.nc000066400000000000000000000035431207233610700240770ustar00rootroot00000000000000/* * Copyright (c) 2008, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Timer.h" configuration LocalTimeMicroC { provides interface LocalTime; } implementation { components CounterMicro32C; components new CounterToLocalTimeC(TMicro); CounterToLocalTimeC.Counter -> CounterMicro32C; LocalTime = CounterToLocalTimeC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/LocalTimeMilliC.nc000066400000000000000000000035351207233610700240750ustar00rootroot00000000000000/* * Copyright (c) 2010, ETH Zurich * * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Philipp Sommer */ #include "Timer.h" configuration LocalTimeMilliC { provides interface LocalTime; } implementation { components CounterMilli32C; components new CounterToLocalTimeC(TMilli); CounterToLocalTimeC.Counter -> CounterMilli32C; LocalTime = CounterToLocalTimeC; } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/MeasureClockC.nc000066400000000000000000000121241207233610700236040ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include /** * Measure cpu clock frequency at boot time. Provides an Atm128Calibrate * interface so that other components can adjust their calibration as * needed. * * @author David Gay * @author Janos Sallai */ module MeasureClockC { provides { /** * This code MUST be called from PlatformP only, hence the exactlyonce. */ interface Init @exactlyonce(); interface Atm128Calibrate; } } implementation { /** * The number of MCU cycles per 64/32768 = 1/512 seconds. This value * fits into 16-bits up to 32 MHz. */ uint16_t cycles; command error_t Init.init() { /* This code doesn't use the HPL to avoid timing issues when compiling with debugging on */ atomic { uint8_t wraps_ok=0; uint8_t wraps=255; // max 255 wrap = 2 sec uint16_t now; uint16_t prev_cycles_min=0xffff; uint16_t prev_cycles_max=0; /* Setup timer2 to at 32768 Hz, and timer1 cpu cycles */ TCCR1B = 1 << CS10; ASSR = 1 << AS2; TCCR2B = 1 << CS20; // one wrap is 256/32768 = 1/128 sec while( wraps_ok < 50 && --wraps != 0 ) { while( TCNT2 != 0 ) ; now = TCNT1; while( TCNT2 != 64 ) // wait 64/32768 = 1/512 sec ; cycles = TCNT1 - now; if(prev_cycles_mincycles) prev_cycles_max=cycles; if(prev_cycles_max-prev_cycles_min<=1){ wraps_ok++; } else{ wraps_ok=0; prev_cycles_min=0xffff; prev_cycles_max=0; } } /* Reset to boot state */ ASSR = TCCR1B = TCCR2B = 0; while (ASSR & (1 << TCR2AUB | 1 << TCR2BUB)) ; } return SUCCESS; } /** * Returns the number of MCU cycles per 1/32768 seconds. */ async command uint16_t Atm128Calibrate.cyclesPerJiffy() { return cycles >> 6; } /** * This is expected number of cycles per 64 jiffy at the platform's * specified MHz. Assumes PLATFORM_MHZ == 1, 2, 4, 8 or 16. */ enum { MAGIC = 31250 / (16 / PLATFORM_MHZ) }; async command uint32_t Atm128Calibrate.calibrateMicro(uint32_t n) { return scale32(n , cycles, MAGIC); } async command uint32_t Atm128Calibrate.actualMicro(uint32_t n) { return scale32(n, MAGIC, cycles); } /** * This is also log2(cycles/64*3.05). But that's a pain to compute */ async command uint8_t Atm128Calibrate.adcPrescaler() { if (cycles >= 24960) return ATM128_ADC_PRESCALE_128; if (cycles >= 12480) return ATM128_ADC_PRESCALE_64; if (cycles >= 6208) return ATM128_ADC_PRESCALE_32; if (cycles >= 3072) return ATM128_ADC_PRESCALE_16; if (cycles >= 1536) return ATM128_ADC_PRESCALE_8; if (cycles >= 768) return ATM128_ADC_PRESCALE_4; return ATM128_ADC_PRESCALE_2; } /** * The baudrate must be a multiple of 64 (this holds for all commonly * used baud rates starting from 4800). The actual formula is * * reg = (cycles * 512) / (8 * baudrate) - 1 */ async command uint16_t Atm128Calibrate.baudrateRegister(uint32_t baudrate) { return cycles / (baudrate >> 6) - 1; } } tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/README000066400000000000000000000026321207233610700214650ustar00rootroot00000000000000This directory contains two types of files: the RFA1 microcontroller specific HplAtmRfa1* and TimerConfig.h files, and everything else which is built on top of these and could support other microcontrollers in the ATmega family. The HplAtmRfa1* files provides very basic access to the various timers and handle power management. The TimerConfig.h file configures the rest of the system. We build two separate timers on top of the HPL layer: the TMcu timer from which we derive all TMicro timers and alarms. The TMcu timer is built on top of one of the 16-bit hardware timer. This timer stops counting if the microcontroller is in one of the power save modes. However, if one of the alarms is set (or a capture is enabled), then this prevents the mcu to stop. Note, that depending on the clock frequency of the MCU the TMcu timer can run with any frequency between 1 and 16 MHz. The other timer is the real time clock, which is derived from the 8-bit 32 KHz async timer/counter. You can set various prescale settings here, so the TRtc can run at 1 KHz, 4 KHz or 32 KHz. All TMilli timers and alarms are derived from this. The RFA1 has a symbol counter also driven by the external 32 KHz crystal, but it runs at 62.5 KHz. This is independent of the RTC clock, and in fact it is much more efficient than the 8-bit 32 KHz timer. You can select in TimerConfig.h to use this for the TRtc (and TMilli). tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/TimerConfig.h000066400000000000000000000076631207233610700231750ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __TIMERCONFIG_H__ #define __TIMERCONFIG_H__ #include "HplAtmRfa1Timer.h" #include "hardware.h" #include "Timer.h" // ------ MCU platform clock ------ #ifndef PLATFORM_MHZ #define PLATFORM_MHZ 16 #endif #if PLATFORM_MHZ == 16 #define PLATFORM_MHZ_LOG2 4 #elif PLATFORM_MHZ == 8 #define PLATFORM_MHZ_LOG2 3 #elif PLATFORM_MHZ == 4 #define PLATFORM_MHZ_LOG2 2 #elif PLATFORM_MHZ == 2 #define PLATFORM_MHZ_LOG2 1 #elif PLATFORM_MHZ == 1 #define PLATFORM_MHZ_LOG2 0 #else #error "PLATFORM_MHZ must be 1, 2, 4, 8 or 16" #endif // ------ MCU timer parameters ------ #define MCU_TIMER_MODE (ATMRFA1_CLK16_DIVIDE_8 | ATMRFA1_WGM16_NORMAL) #define MCU_TIMER_MHZ_LOG2 (PLATFORM_MHZ_LOG2-3) #define MCU_TIMER_MHZ (1 << MCU_TIMER_MHZ_LOG2) #define MCU_TIMER_HZ (16000000ul / 16 * (1 << MCU_TIMER_MHZ_LOG2)) typedef struct T16mhz { } T16mhz; typedef struct T8mhz { } T8mhz; typedef struct T4mhz { } T4mhz; typedef struct T2mhz { } T2mhz; #if MCU_TIMER_MHZ_LOG2 == 4 typedef T16mhz TMcu; #elif MCU_TIMER_MHZ_LOG2 == 3 typedef T8mhz TMcu; #elif MCU_TIMER_MHZ_LOG2 == 2 typedef T4mhz TMcu; #elif MCU_TIMER_MHZ_LOG2 == 1 typedef T2mhz TMcu; #elif MCU_TIMER_MHZ_LOG2 == 0 typedef TMicro TMcu; #else #error "MCU clock must run at at least 1 MHz" #endif // selects which 16-bit TimerCounter should be used (1 or 3) #define MCU_TIMER_NO 1 #define MCU_ALARM_MINDT 100 #define UQ_MCU_ALARM "UQ_MCU_ALARM" // ------ RTC timer parameters ------ #define RTC_TIMER_KHZ_LOG2 5 #if RTC_TIMER_KHZ_LOG2 == 5 typedef T32khz TRtc; #define RTC_TIMER_MODE (ATMRFA1_CLK8_NORMAL | ATMRFA1_WGM8_NORMAL | ATMRFA1_ASYNC_ON) #elif RTC_TIMER_KHZ_LOG2 == 2 typedef struct T4khz { } T4khz; typedef T4khz TRtc; #define RTC_TIMER_MODE (ATMRFA1_CLK8_DIVIDE_8 | ATMRFA1_WGM8_NORMAL | ATMRFA1_ASYNC_ON) #elif RTC_TIMER_KHZ_LOG2 == 0 typedef TMilli TRtc; #define RTC_TIMER_MODE (ATMRFA1_CLK8_DIVIDE_32 | ATMRFA1_WGM8_NORMAL | ATMRFA1_ASYNC_ON) #else #error "The RTC must be run at 32 KHz, 4 KHz or 1 KHz." #endif #define RTC_TIMER_KHZ (1 << RTC_TIMER_KHZ_LOG2) #define RTC_TIMER_HZ (32768ul / 32 * (1 << RTC_TIMER_KHZ_LOG2)) #define RTC_ALARM_MINDT 4 #define UQ_RTC_ALARM "UQ_RTC_ALARM" // ------ Symbol counter patarmeters ------ typedef struct T62khz { } T62khz; #define UQ_T62KHZ_ALARM "T62KHZ_ALARM" #define SYM_TIMER_MODE ATMRFA1_CLKSC_RTC #define SYM_ALARM_MINDT 2 #endif//__TIMERCONFIG_H__ tinyos-2.1.2+dfsg/tos/chips/atm128rfa1/timer/TimerMilliP.nc000066400000000000000000000037521207233610700233220ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "TimerConfig.h" configuration TimerMilliP { provides { interface Timer as TimerMilli[uint8_t id]; } } implementation { components new AlarmMilli32C(); components new AlarmToTimerC(TMilli); AlarmToTimerC.Alarm -> AlarmMilli32C; components new VirtualizeTimerC(TMilli, uniqueCount(UQ_TIMER_MILLI)); TimerMilli = VirtualizeTimerC; VirtualizeTimerC.TimerFrom -> AlarmToTimerC; } tinyos-2.1.2+dfsg/tos/chips/bh1750fvi/000077500000000000000000000000001207233610700173075ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/bh1750fvi/Bh1750fvi.h000066400000000000000000000033011207233610700210300ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #ifndef BH1750FVI_H #define BH1750FVI_H #define UQ_BH1750FVI_RESOURCE "Bh1750fviPressure.ReadResource" #endif tinyos-2.1.2+dfsg/tos/chips/bh1750fvi/Bh1750fviArbitratedC.nc000066400000000000000000000037631207233610700233220ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Bh1750fvi.h" configuration Bh1750fviArbitratedC { provides interface Read[uint8_t client]; } implementation { components Bh1750fviC; components new ArbitratedReadC(uint16_t), new FcfsArbiterC(UQ_BH1750FVI_RESOURCE) as Arbiter, new ReadClientP(uint16_t); Read=ArbitratedReadC.Read; ArbitratedReadC.Resource->Arbiter; ArbitratedReadC.Service->ReadClientP; ReadClientP.ActualRead->Bh1750fviC; }tinyos-2.1.2+dfsg/tos/chips/bh1750fvi/Bh1750fviC.nc000066400000000000000000000037161207233610700213160ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo, Andras Biro */ configuration Bh1750fviC { provides interface Read as Light; } implementation { components Bh1750fviP; components new TimerMilliC(); Light = Bh1750fviP.Light; Bh1750fviP.Timer -> TimerMilliC; components HplBh1750C, MainC; Bh1750fviP.Init <- MainC.SoftwareInit; Bh1750fviP.I2CPacket -> HplBh1750C; Bh1750fviP.I2CResource -> HplBh1750C; Bh1750fviP.BusPowerManager -> HplBh1750C; } tinyos-2.1.2+dfsg/tos/chips/bh1750fvi/Bh1750fviP.nc000066400000000000000000000111331207233610700213230ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo, Andras Biro */ module Bh1750fviP { provides interface Read as Light; uses interface I2CPacket; uses interface Timer; uses interface Resource as I2CResource; uses interface BusPowerManager; provides interface Init; } implementation { enum { BH1750FVI_POWER_DOWN = 0x00, BH1750FVI_POWER_ON = 0x01, BH1750FVI_RESET = 0x07, BH1750FVI_CONT_H_RES = 0x10, BH1750FVI_CONT_H2_RES = 0x11, BH1750FVI_CONT_L_RES = 0x13, BH1750FVI_ONE_SHOT_H_RES = 0x20, BH1750FVI_ONE_SHOT_H2_RES = 0x21, BH1750FVI_ONE_SHOT_L_RES = 0x23, } bh1750fviCommand; enum { BH1750FVI_TIMEOUT_H_RES = 180, // max 180 BH1750FVI_TIMEOUT_H2_RES= 180, // max 180 BH1750FVI_TIMEOUT_L_RES = 24, // max 24 BH1750FVI_TIMEOUT_BOOT = 11, } bh1750fviTimeout; enum { BH1750FVI_ADDRESS = 0x23,//0x46/0x47, //if addr== H then it would be 0xb8/0xb9 } bh1750fviHeader; uint8_t i2cBuffer[2]; norace error_t lastError; enum { S_OFF = 0, S_IDLE, S_BUSY_CMD, S_BUSY_MEAS, }; uint8_t state = S_OFF; command error_t Init.init(){ call BusPowerManager.configure(BH1750FVI_TIMEOUT_BOOT,BH1750FVI_TIMEOUT_BOOT); return SUCCESS; } command error_t Light.read() { uint8_t prevState=state; if(state == S_BUSY_MEAS || state == S_BUSY_CMD) return EBUSY; state = S_BUSY_CMD; call BusPowerManager.requestPower(); if(prevState == S_IDLE) call I2CResource.request(); return SUCCESS; } event void BusPowerManager.powerOn(){ if(state == S_BUSY_CMD) call I2CResource.request(); else state = S_IDLE; } task void signalReadDone() { state= S_IDLE; call BusPowerManager.releasePower(); signal Light.readDone(lastError, ((i2cBuffer[0]<<8) | i2cBuffer[1]) ); } event void I2CResource.granted() { if(state == S_BUSY_CMD){ i2cBuffer[0]=BH1750FVI_ONE_SHOT_H_RES; lastError = call I2CPacket.write(I2C_START | I2C_STOP, BH1750FVI_ADDRESS, 1, i2cBuffer); } else { lastError=call I2CPacket.read(I2C_START | I2C_STOP, BH1750FVI_ADDRESS, 2, i2cBuffer); } if(lastError!=SUCCESS){ call I2CResource.release(); post signalReadDone(); } } task void startTimeout() { state=S_BUSY_MEAS; call Timer.startOneShot(BH1750FVI_TIMEOUT_H_RES); } async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { call I2CResource.release(); if(error != SUCCESS) { lastError = error; post signalReadDone(); } else { post startTimeout(); } } event void Timer.fired() { call I2CResource.request(); } async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { lastError = error; call I2CResource.release(); post signalReadDone(); } event void BusPowerManager.powerOff(){ state=S_OFF; } default event void Light.readDone(error_t error, uint16_t val) { } } tinyos-2.1.2+dfsg/tos/chips/bh1750fvi/Bh1750fviRawLightC.nc000066400000000000000000000034071207233610700227550ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Bh1750fvi.h" generic configuration Bh1750fviRawLightC() { provides interface Read; } implementation { components Bh1750fviArbitratedC; Read=Bh1750fviArbitratedC.Read[unique(UQ_BH1750FVI_RESOURCE)]; }tinyos-2.1.2+dfsg/tos/chips/bma180/000077500000000000000000000000001207233610700166645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/bma180/Bma180.h000066400000000000000000000054401207233610700177700ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ #ifndef BMA180_H #define BMA180_H typedef struct bma180_data { int16_t bma180_accel_x; int16_t bma180_accel_y; int16_t bma180_accel_z; int8_t bma180_temperature; uint8_t bma180_short_timestamp; } bma180_data_t; enum { BMA_SAMPLING_TIME_MS = 64, }; /* 0: low noise, higest current, full bandwidth(1200Hz) 1: super low noise, highest current, reduced bandwidth (300Hz) 2: ultra low noise, smaller current, reduced bandwidth (150Hz) 3: Low power mode, lowest current, higher noise than other modes */ enum { BMA_MODE = 3, }; /* 0: 1g 1: 1.5g 2: 2g 3: 3g 4: 4g 5: 8g 6: 16g 7: NA */ enum { BMA_RANGE = 2, }; //helper array for retrieving data in milli g according to actual range selection const double convRatio[7] = { .13f, .19f, .25f, .38f, .5f, .99f, 1.98f}; /* 0: 10Hz 1: 20Hz 2: 40Hz 3: 75Hz 4:150Hz 5:300Hz 7:600Hz 7:1200Hz 8: High pass 1Hz 9: band pass 0.2 .. 300Hz 10 .. 15: NA */ enum { BMA_BW = 4, }; enum { BMA_LAT_INT = 0, BMA_NEW_DATA_INT, BMA_ADV_INT, BMA_TAPSENS_INT, BMA_LOW_INT, BMA_HIGH_INT, BMA_SLOPE_INT, BMA_SLOPE_ALART, }; enum { BMA_CTRL_REG3 = (1<; interface ReadStream; interface StdControl as BmaControl; interface Init; } } implementation { components BmaReadC, BmaStreamC, PlatformC, DiagMsgC; Read = BmaReadC; ReadStream = BmaStreamC; BmaControl = BmaReadC; Init = BmaReadC; //BmaStreamP.Read -> TestSbSC; //BmaStreamP.Atm128Calibrate -> PlatformC; //BmaStreamP.DiagMsg -> DiagMsgC; } tinyos-2.1.2+dfsg/tos/chips/bma180/BmaReadC.nc000066400000000000000000000042641207233610700206120ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ #include "Bma180.h" configuration BmaReadC { provides { interface StdControl; interface Read; interface Init; } } implementation { components BmaReadP, LedsC, new TimerMilliC(), HplBma180C, DiagMsgC, SerialActiveMessageC, Atm128rfa1Usart0SpiC, LocalTimeMilliC; StdControl = BmaReadP.BmaControl; Read = BmaReadP; Init = BmaReadP; BmaReadP.Leds -> LedsC; BmaReadP.Timer -> TimerMilliC; BmaReadP.LocalTime -> LocalTimeMilliC; BmaReadP.DiagMsg -> DiagMsgC; BmaReadP.FastSpiByte -> HplBma180C; BmaReadP.Resource -> HplBma180C; BmaReadP.CSN -> HplBma180C.CSN; BmaReadP.PWR -> HplBma180C.PWR; } tinyos-2.1.2+dfsg/tos/chips/bma180/BmaReadP.nc000066400000000000000000000134531207233610700206270ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ #include "Bma180.h" module BmaReadP { provides { interface Read; interface StdControl as BmaControl; interface Init; } uses { interface Leds; interface Timer; interface LocalTime; interface DiagMsg; interface FastSpiByte; interface Resource; interface GeneralIO as CSN; interface GeneralIO as PWR; } } implementation { enum{ S_OFF = 0, S_STARTING, S_CONFIG, S_RESTART, S_IDLE, }; bma180_data_t s_res; uint16_t x,y,z; norace uint8_t temp, state=S_OFF; void writeRegister(uint8_t, uint8_t); uint8_t readRegister(uint8_t); command error_t Init.init() { call CSN.set(); call CSN.makeOutput(); return SUCCESS; } command error_t BmaControl.start() { if(state == S_STARTING) return EBUSY; if(state != S_OFF) return EALREADY; state = S_STARTING; call PWR.makeOutput(); call PWR.set(); state = S_CONFIG; return SUCCESS; } command error_t BmaControl.stop() { call PWR.makeOutput(); call PWR.clr(); return SUCCESS; } void setLeds(uint8_t data) { if( (data & 0x01) != 0 ) call Leds.led0On(); else call Leds.led0Off(); if( (data & 0x02) != 0 ) call Leds.led1On(); else call Leds.led1Off(); if( (data & 0x04) != 0 ) call Leds.led2On(); else call Leds.led2Off(); } command error_t Read.read() { call Resource.request(); return SUCCESS; } uint8_t readRegister(uint8_t address) { uint8_t ret; call CSN.clr(); call FastSpiByte.write(0x80 | address); ret = call FastSpiByte.write(0); call CSN.set(); return ret; } void writeRegister(uint8_t address, uint8_t newValue) { call CSN.clr(); call FastSpiByte.write(0x7F & address); call FastSpiByte.write(newValue); call CSN.set(); } void setup_params(){ temp = readRegister(0xD); //ctrl_reg0 temp |= 0x10; // enable ee_w; needed for writing to addresses 0x20 .. 0x3B writeRegister(0xD, temp); temp = readRegister(0x35); //offset_lsb1 temp &= 0xF1; // clear range bits temp |= (BMA_RANGE<<1); writeRegister(0x35, temp); temp = readRegister(0x30); //tco_z temp &= 0xFC; // clear mode bits temp |= BMA_MODE; writeRegister(0x30, temp); temp = readRegister(0x20); // bw_tcs temp &= 0x0F; temp |= (BMA_BW<<4); writeRegister(0x20, temp); temp = readRegister(0x21); //ctrl_reg3 temp = BMA_CTRL_REG3; writeRegister(0x21, temp); } event void Timer.fired() { if(state==S_CONFIG){ setup_params(); temp = readRegister(0xD); //ctrl_reg0 temp &= 0x02; temp |= (1<<1); //sleep control; 1:enable sleep writeRegister(0xD, temp); state = S_IDLE; call Timer.startOneShot(1); } else if(state == S_RESTART) { setup_params(); state = S_IDLE; call Timer.startOneShot(10); } else if(state == S_IDLE) { call Leds.led3Toggle(); //check if the sensor is in sleep mode temp = readRegister(0xD); temp &= 0x02; //if so, then wake it up if(temp){ temp &=~ (1<<1); //sleep control; 1:enable sleep writeRegister(0xD, temp); state = S_RESTART; return call Timer.startOneShot(10); } //chipSelect call CSN.clr(); // read registers call FastSpiByte.write(0x80 | 0x02); x = call FastSpiByte.write(0x00);//x x |= (call FastSpiByte.write(0) << 8); y = call FastSpiByte.write(0);//y y |= (call FastSpiByte.write(0) << 8); z = call FastSpiByte.write(0);//z z |= (call FastSpiByte.write(0) << 8); s_res.bma180_temperature = (int8_t)(call FastSpiByte.write(0)); s_res.bma180_short_timestamp = (uint8_t)(call LocalTime.get()); //chipDeselect call CSN.set(); s_res.bma180_accel_x = ( ((int16_t)x)>>2)*convRatio[BMA_RANGE]; s_res.bma180_accel_y = ( ((int16_t)y)>>2)*convRatio[BMA_RANGE]; s_res.bma180_accel_z = ( ((int16_t)z)>>2)*convRatio[BMA_RANGE]; call Resource.release(); signal Read.readDone(SUCCESS, s_res); //setLeds(x); } } event void Resource.granted() { call Timer.startOneShot(BMA_SAMPLING_TIME_MS); } } tinyos-2.1.2+dfsg/tos/chips/bma180/BmaStreamC.nc000066400000000000000000000041151207233610700211650ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ configuration BmaStreamC { provides { interface ReadStream; interface Init; } } implementation { components BmaStreamP, HplBma180C, LocalTimeMilliC, LedsC; Init = BmaStreamP; ReadStream = BmaStreamP; BmaStreamP.Resource -> HplBma180C; BmaStreamP.FastSpiByte -> HplBma180C; BmaStreamP.Leds -> LedsC; BmaStreamP.LocalTime -> LocalTimeMilliC; BmaStreamP.CSN -> HplBma180C.CSN; BmaStreamP.PWR -> HplBma180C.PWR; BmaStreamP.Interrupt -> HplBma180C.ACCINT; } tinyos-2.1.2+dfsg/tos/chips/bma180/BmaStreamP.nc000066400000000000000000000200211207233610700211740ustar00rootroot00000000000000/* * Copyright (c) 2009, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ #include "Bma180.h" module BmaStreamP { provides { interface ReadStream; interface Init; } uses { interface FastSpiByte; interface GpioInterrupt as Interrupt; interface Resource; interface Leds; interface LocalTime; interface GeneralIO as CSN; interface GeneralIO as PWR; } } implementation { enum { STATE_READY = 0, STATE_20 = 1, // 2 buffers to be filled, 0 to be reported STATE_11 = 2, // 1 buffer to be filled, 1 to be reported STATE_02 = 3, // 0 buffer to be filled, 2 to be reported STATE_10 = 4, // 1 buffer to be filled, 0 to be reported STATE_01 = 5, // 0 buffer to be filled, 1 to be reported STATE_00 = 7, // error reporting SAMPLING_STEP = 1, // state increment after sampling REPORTING_STEP = 2, // state increment after reporting }; norace uint8_t state, temp; bma180_data_t * firstStart; uint16_t firstLength; norace bma180_data_t * secondStart; norace uint16_t secondLength; // ------- Fast path norace bma180_data_t * currentPtr; norace bma180_data_t * currentEnd; task void bufferDone(); uint8_t readRegister(uint8_t address) { uint8_t ret; call CSN.clr(); call FastSpiByte.write(0x80 | address); ret = call FastSpiByte.write(0); call CSN.set(); return ret; } void writeRegister(uint8_t address, uint8_t newValue) { call CSN.clr(); call FastSpiByte.write(0x7F & address); call FastSpiByte.write(newValue); call CSN.set(); } command error_t Init.init() { call PWR.makeOutput(); call PWR.set(); call CSN.set(); call CSN.makeOutput(); return SUCCESS; } void readAccel() { if(call Resource.immediateRequest()==SUCCESS) { call CSN.clr(); call FastSpiByte.write(0x88); currentPtr->bma180_temperature = (int8_t)call FastSpiByte.write(0); call CSN.set(); call CSN.clr(); call FastSpiByte.write(0x82); currentPtr->bma180_accel_x = call FastSpiByte.write(0); currentPtr->bma180_accel_x |= (call FastSpiByte.write(0) << 8); currentPtr->bma180_accel_x >>= 2; currentPtr->bma180_accel_y = call FastSpiByte.write(0); currentPtr->bma180_accel_y |= (call FastSpiByte.write(0) << 8); currentPtr->bma180_accel_y >>=2; currentPtr->bma180_accel_z = call FastSpiByte.write(0); currentPtr->bma180_accel_z |= (call FastSpiByte.write(0) << 8); currentPtr->bma180_accel_z >>=2; currentPtr->bma180_short_timestamp = (uint8_t)(call LocalTime.get()); call CSN.set(); call Resource.release(); } } async event void Interrupt.fired() { readAccel(); currentPtr++; if( currentPtr != currentEnd ) { return; } currentPtr = secondStart; currentEnd = currentPtr + secondLength; if( (state += SAMPLING_STEP) != STATE_11 ) { call Interrupt.disable(); } post bufferDone(); } // ------- Slow path uint16_t actualPeriod; typedef struct free_buffer_t { uint16_t count; struct free_buffer_t * next; } free_buffer_t; free_buffer_t * freeBuffers; task void bufferDone() { uint8_t s; bma180_data_t * reportStart = firstStart; uint16_t reportLength = firstLength; firstStart = secondStart; firstLength = secondLength; atomic { s = state; if( s == STATE_11 && freeBuffers != NULL ) { secondStart = (bma180_data_t *)freeBuffers; secondLength = freeBuffers->count; freeBuffers = freeBuffers->next; state = STATE_20; } else if( s != STATE_00 ) { state = s + REPORTING_STEP; } } if( s != STATE_00 || freeBuffers != NULL ) { if( s == STATE_00 ) { reportStart = (bma180_data_t *)freeBuffers; reportLength = freeBuffers->count; freeBuffers = freeBuffers->next; } signal ReadStream.bufferDone(s != STATE_00 ? SUCCESS : FAIL, reportStart, reportLength); } if( freeBuffers == NULL && (s == STATE_00 || s == STATE_01) ) { signal ReadStream.readDone(s == STATE_01 ? SUCCESS : FAIL, actualPeriod); state = STATE_READY; } else if( s != STATE_11 ) post bufferDone(); } command error_t ReadStream.postBuffer(bma180_data_t *buffer, uint16_t count) { free_buffer_t * * last; if( count < (sizeof(free_buffer_t) + 1) >> 1 ) return ESIZE; atomic { if( state == STATE_10 ) { secondStart = buffer; secondLength = count; state = STATE_20; return SUCCESS; } } last = & freeBuffers; while( *last != NULL ) last = &((*last)->next); *last = (free_buffer_t *)buffer; (*last)->count = count; (*last)->next = NULL; return SUCCESS; } command error_t ReadStream.read(uint32_t period) { if( state != STATE_READY ) return EBUSY; if( freeBuffers == NULL ) return FAIL; // do it early //call Interrupt.enable(); if(call Resource.immediateRequest() == SUCCESS) { temp = readRegister(0xD); //ctrl_reg0 temp |= 0x10; // enable ee_w; needed for writing to addresses 0x20 .. 0x3B temp &=~(1<<1); //turn off sleep temp |= 1; //dis_wake_up writeRegister(0xD, temp); temp = readRegister(0x35); //offset_lsb1 temp &= 0xF1; // clear range bits temp |= (BMA_RANGE<<1); temp |= 1; // smp_skip writeRegister(0x35, temp); temp = readRegister(0x30); //tco_z temp &= 0xFC; // clear mode bits temp |= BMA_MODE; writeRegister(0x30, temp); temp = readRegister(0x20); // bw_tcs temp &= 0x0F; temp |= (BMA_BW<<4); writeRegister(0x20, temp); writeRegister(0x21, 2);//BMA_CTRL_REG3); call Resource.release(); } firstStart = (bma180_data_t *)freeBuffers; firstLength = freeBuffers->count; freeBuffers = freeBuffers->next; currentPtr = firstStart; currentEnd = firstStart + firstLength; if( freeBuffers == NULL ) state = STATE_10; else { secondStart = (bma180_data_t *)freeBuffers; secondLength = freeBuffers->count; freeBuffers = freeBuffers->next; state = STATE_20; } call Interrupt.enableRisingEdge(); return SUCCESS; } event void Resource.granted() {} default event void ReadStream.bufferDone(error_t result, bma180_data_t* buf, uint16_t count) {} default event void ReadStream.readDone(error_t err, uint32_t usPeriod) {} } tinyos-2.1.2+dfsg/tos/chips/cc1000/000077500000000000000000000000001207233610700165625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc1000/ByteRadio.nc000066400000000000000000000051471207233610700207750ustar00rootroot00000000000000/* $Id: ByteRadio.nc,v 1.5 2008-06-03 04:08:34 regehr Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Radio logic is split between Csma (media-access control, low-power * listening and general control) and SendReceive (packet reception and * transmission). This interface specifies the interaction between these * two components. * * @author David Gay */ interface ByteRadio { /** * SendReceive wants to send a packet. * @param msg Message to be sent. */ event void rts(message_t * ONE msg); /** * Access to the media granted. Start sending. SendReceive must signal * sendDone when transmission is complete. Note: the media-access-contro * layer must have enabled listening before calling cts(). */ async command void cts(); /** * Between the rts() and sendDone() events, this must return the * message under transmission. * @return Message being transmitted. */ async command message_t *getTxMessage(); /** * Transmission complete. */ async event void sendDone(); /** * Set message preamble length. * @param bytes Preamble length in bytes */ async command void setPreambleLength(uint16_t bytes); /** * Get message preamble length. * @return Preamble length in bytes */ async command uint16_t getPreambleLength(); /** * Enable listening for incoming packets. */ async command void listen(); /** * Disable listening for incoming packets. */ async command void off(); /** * SendReceive signals this event for every radio-byte-time while * listening is enabled and a message isn't being received or * transmitted. * @param preamble TRUE if a message preamble byte has been received */ async event void idleByte(bool preamble); /** * Detect if SendReceive is attempting to sync with an incoming packet. * During sync, idleByte events are not signaled. If sync is successful, * an rx() event will be signaled, if it fails, idleByte events will * resume. If syncing() returns TRUE, the last idleByte() event must * have had preamble = TRUE. * * @return TRUE if a sync attempt is in progress, FALSE if not. */ async command bool syncing(); /** * A message is being received */ async event void rx(); /** * Message reception is complete. */ async event void rxDone(); } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000ActiveMessageC.nc000066400000000000000000000066261207233610700224500ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * The Active Message layer for the CC1000 radio. This configuration * just layers the AM dispatch (CC1000ActiveMessageM) on top of the * underlying CC1000 radio packet (CC1000CsmaRadioC), which is * inherently an AM packet (acknowledgements based on AM destination * addr and group). * * @author Philip Levis * @author Marco Langerwisch (Packet timestamping) */ configuration CC1000ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Packet; interface PacketAcknowledgements; interface LinkPacketMetadata; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeSyncOffset; interface LowPowerListening; } } implementation { components CC1000ActiveMessageP as AM, CC1000CsmaRadioC as Radio; components ActiveMessageAddressC as Address; SplitControl = Radio; Packet = Radio; PacketAcknowledgements = Radio; LinkPacketMetadata = Radio; AMSend = AM; Receive = AM.Receive; Snoop = AM.Snoop; AMPacket = AM; AM.SubSend -> Radio.Send; AM.SubReceive -> Radio.Receive; AM.amAddress -> Address; AM.Packet -> Radio; PacketTimeStamp32khz = Radio; PacketTimeStampMilli = Radio; PacketTimeSyncOffset = Radio; LowPowerListening = Radio; } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000ActiveMessageP.nc000066400000000000000000000133361207233610700224610ustar00rootroot00000000000000// $Id: CC1000ActiveMessageP.nc,v 1.13 2010-06-29 22:07:44 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation component for CC1000ActiveMessageC. * * @author Philip Levis * @date June 19 2006 */ module CC1000ActiveMessageP @safe() { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; } uses { interface Send as SubSend; interface Receive as SubReceive; interface Packet as Packet; command am_addr_t amAddress(); } } implementation { cc1000_header_t* ONE getHeader(message_t* ONE amsg) { return TCAST(cc1000_header_t* ONE, (uint8_t*)amsg + offsetof(message_t, data) - sizeof(cc1000_header_t)); } cc1000_footer_t *getFooter(message_t *amsg) { return (cc1000_footer_t *)(amsg->footer); } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* amsg, uint8_t len) { cc1000_header_t* header = getHeader(amsg); header->type = id; header->dest = addr; header->source = call AMPacket.address(); header->group = TOS_AM_GROUP; return call SubSend.send(amsg, len); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } event void SubSend.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } /* Receiving a packet */ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { cc1000_footer_t* msg_footer = getFooter(msg); if(msg_footer->crc == 1) { if (call AMPacket.isForMe(msg)) { return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); } else { return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); } } return msg; } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { cc1000_header_t* header = getHeader(amsg); return header->dest; } command am_addr_t AMPacket.source(message_t* amsg) { cc1000_header_t* header = getHeader(amsg); return header->source; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { cc1000_header_t* header = getHeader(amsg); header->dest = addr; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { cc1000_header_t* header = getHeader(amsg); header->source = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { cc1000_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t type) { cc1000_header_t* header = getHeader(amsg); header->type = type; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { cc1000_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.group(message_t* msg) { cc1000_header_t* header = getHeader(msg); return header->group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000Const.h000066400000000000000000000340371207233610700205370ustar00rootroot00000000000000// $Id: CC1000Const.h,v 1.5 2008-06-11 00:46:23 razvanm Exp $ /* -*- Mode: C; c-basic-indent: 2; indent-tabs-mode: nil -*- */ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * Constants for CC1000 radio * * @author Phil Buonadonna */ #ifndef CC1000CONST_H #define CC1000CONST_H /* Constants defined for CC1K */ /* Register addresses */ enum { CC1K_MAIN = 0x00, CC1K_FREQ_2A = 0x01, CC1K_FREQ_1A = 0x02, CC1K_FREQ_0A = 0x03, CC1K_FREQ_2B = 0x04, CC1K_FREQ_1B = 0x05, CC1K_FREQ_0B = 0x06, CC1K_FSEP1 = 0x07, CC1K_FSEP0 = 0x08, CC1K_CURRENT = 0x09, CC1K_FRONT_END = 0x0A, //10 CC1K_PA_POW = 0x0B, //11 CC1K_PLL = 0x0C, //12 CC1K_LOCK = 0x0D, //13 CC1K_CAL = 0x0E, //14 CC1K_MODEM2 = 0x0F, //15 CC1K_MODEM1 = 0x10, //16 CC1K_MODEM0 = 0x11, //17 CC1K_MATCH = 0x12, //18 CC1K_FSCTRL = 0x13, //19 CC1K_FSHAPE7 = 0x14, //20 CC1K_FSHAPE6 = 0x15, //21 CC1K_FSHAPE5 = 0x16, //22 CC1K_FSHAPE4 = 0x17, //23 CC1K_FSHAPE3 = 0x18, //24 CC1K_FSHAPE2 = 0x19, //25 CC1K_FSHAPE1 = 0x1A, //26 CC1K_FSDELAY = 0x1B, //27 CC1K_PRESCALER = 0x1C, //28 CC1K_TEST6 = 0x40, //64 CC1K_TEST5 = 0x41, //66 CC1K_TEST4 = 0x42, //67 CC1K_TEST3 = 0x43, //68 CC1K_TEST2 = 0x44, //69 CC1K_TEST1 = 0x45, //70 CC1K_TEST0 = 0x46, //71 // MAIN Register Bit Posititions CC1K_RXTX = 7, CC1K_F_REG = 6, CC1K_RX_PD = 5, CC1K_TX_PD = 4, CC1K_FS_PD = 3, CC1K_CORE_PD = 2, CC1K_BIAS_PD = 1, CC1K_RESET_N = 0, // CURRENT Register Bit Positions CC1K_VCO_CURRENT = 4, CC1K_LO_DRIVE = 2, CC1K_PA_DRIVE = 0, // FRONT_END Register Bit Positions CC1K_BUF_CURRENT = 5, CC1K_LNA_CURRENT = 3, CC1K_IF_RSSI = 1, CC1K_XOSC_BYPASS = 0, // PA_POW Register Bit Positions CC1K_PA_HIGHPOWER = 4, CC1K_PA_LOWPOWER = 0, // PLL Register Bit Positions CC1K_EXT_FILTER = 7, CC1K_REFDIV = 3, CC1K_ALARM_DISABLE = 2, CC1K_ALARM_H = 1, CC1K_ALARM_L = 0, // LOCK Register Bit Positions CC1K_LOCK_SELECT = 4, CC1K_PLL_LOCK_ACCURACY = 3, CC1K_PLL_LOCK_LENGTH = 2, CC1K_LOCK_INSTANT = 1, CC1K_LOCK_CONTINUOUS = 0, // CAL Register Bit Positions CC1K_CAL_START = 7, CC1K_CAL_DUAL = 6, CC1K_CAL_WAIT = 5, CC1K_CAL_CURRENT = 4, CC1K_CAL_COMPLETE = 3, CC1K_CAL_ITERATE = 0, // MODEM2 Register Bit Positions CC1K_PEAKDETECT = 7, CC1K_PEAK_LEVEL_OFFSET = 0, // MODEM1 Register Bit Positions CC1K_MLIMIT = 5, CC1K_LOCK_AVG_IN = 4, CC1K_LOCK_AVG_MODE = 3, CC1K_SETTLING = 1, CC1K_MODEM_RESET_N = 0, // MODEM0 Register Bit Positions CC1K_BAUDRATE = 4, CC1K_DATA_FORMAT = 2, CC1K_XOSC_FREQ = 0, // MATCH Register Bit Positions CC1K_RX_MATCH = 4, CC1K_TX_MATCH = 0, // FSCTLR Register Bit Positions CC1K_DITHER1 = 3, CC1K_DITHER0 = 2, CC1K_SHAPE = 1, CC1K_FS_RESET_N = 0, // PRESCALER Register Bit Positions CC1K_PRE_SWING = 6, CC1K_PRE_CURRENT = 4, CC1K_IF_INPUT = 3, CC1K_IF_FRONT = 2, // TEST6 Register Bit Positions CC1K_LOOPFILTER_TP1 = 7, CC1K_LOOPFILTER_TP2 = 6, CC1K_CHP_OVERRIDE = 5, CC1K_CHP_CO = 0, // TEST5 Register Bit Positions CC1K_CHP_DISABLE = 5, CC1K_VCO_OVERRIDE = 4, CC1K_VCO_AO = 0, // TEST3 Register Bit Positions CC1K_BREAK_LOOP = 4, CC1K_CAL_DAC_OPEN = 0, /* * CC1K Register Parameters Table * * This table follows the same format order as the CC1K register * set EXCEPT for the last entry in the table which is the * CURRENT register value for TX mode. * * NOTE: To save RAM space, this table resides in program memory (flash). * This has two important implications: * 1) You can't write to it (duh!) * 2) You must read it using the PRG_RDB(addr) macro. IT CANNOT BE ACCESSED AS AN ORDINARY C ARRAY. * * Add/remove individual entries below to suit your RF tastes. * */ CC1K_433_002_MHZ = 0x00, CC1K_915_998_MHZ = 0x01, CC1K_434_845_MHZ = 0x02, CC1K_914_077_MHZ = 0x03, CC1K_315_178_MHZ = 0x04, //#define CC1K_SquelchInit 0x02F8 // 0.90V using the bandgap reference CC1K_SquelchInit = 0x120, CC1K_SquelchTableSize = 9, CC1K_MaxRSSISamples = 5, CC1K_Settling = 1, CC1K_ValidPrecursor = 2, CC1K_SquelchIntervalFast = 128, CC1K_SquelchIntervalSlow = 2560, CC1K_SquelchCount = 30, CC1K_SquelchBuffer = 12, CC1K_LPL_STATES = 9, CC1K_LPL_PACKET_TIME = 16, CC1K_LPL_CHECK_TIME = 16, /* In tenth's of milliseconds, this should be an approximation of the on-time for a LPL check rather than the total check time. */ CC1K_LPL_MIN_INTERVAL = 5, /* In milliseconds, the minimum interval between low-power-listening checks */ CC1K_LPL_MAX_INTERVAL = 10000 /* In milliseconds, the maximum interval between low-power-listening checks. Arbitrary value, but must be at most 32767 because of the way sleep interval is stored in outgoing messages */ }; #ifdef CC1K_DEFAULT_FREQ #define CC1K_DEF_PRESET (CC1K_DEFAULT_FREQ) #endif #ifdef CC1K_MANUAL_FREQ #define CC1K_DEF_FREQ (CC1K_MANUAL_FREQ) #endif #ifndef CC1K_DEF_PRESET #define CC1K_DEF_PRESET (CC1K_434_845_MHZ) #endif static const_uint8_t CC1K_Params[6][20] = { // (0) 433.002 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO { // MAIN 0x00 0x31, // FREQ2A,FREQ1A,FREQ0A 0x01-0x03 0x58,0x00,0x00, // FREQ2B,FREQ1B,FREQ0B 0x04-0x06 0x57,0xf6,0x85, //XBOW // FSEP1, FSEP0 0x07-0x08 0X03,0x55, // CURRENT RX MODE VALUE 0x09 also see below 4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE, // FRONT_END 0x0a 1 << CC1K_IF_RSSI, // PA_POW 0x0b 0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, // PLL 0x0c 12 << CC1K_REFDIV, // LOCK 0x0d 0xe << CC1K_LOCK_SELECT, // CAL 0x0e 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE, // MODEM2 0x0f 0 << CC1K_PEAKDETECT | 28 << CC1K_PEAK_LEVEL_OFFSET, // MODEM1 0x10 3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, // MODEM0 0x11 5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ, // MATCH 0x12 0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH, // tx current (extra) 8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE, }, // 1 915.9988 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO { // MAIN 0x00 0x31, // FREQ2A,FREQ1A,FREQ0A 0x01-0x03 0x7c,0x00,0x00, // FREQ2B,FREQ1B,FREQ0B 0x04-0x06 0x7b,0xf9,0xae, // FSEP1, FSEP0 0x07-0x8 0x02,0x38, // CURRENT RX MODE VALUE 0x09 also see below 8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE, //0x8C, // FRONT_END 0x0a 1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 1 << CC1K_IF_RSSI, //0x32, // PA_POW 0x0b 0x8 << CC1K_PA_HIGHPOWER | 0x0 << CC1K_PA_LOWPOWER, //0xff, // PLL 0xc 8 << CC1K_REFDIV, //0x40, // LOCK 0xd 0x1 << CC1K_LOCK_SELECT, //0x10, // CAL 0xe 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE, //0x26, // MODEM2 0xf 1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET, //0xA1, // MODEM1 0x10 3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, //0x6f, // MODEM0 0x11 5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ, //0x55, // MATCH 0x12 0x1 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH, // tx current (extra) 15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE, }, // 2 434.845200 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO { // MAIN 0x00 0x31, // FREQ2A,FREQ1A,FREQ0A 0x01-0x03 0x51,0x00,0x00, // FREQ2B,FREQ1B,FREQ0B 0x04-0x06 0x50,0xf7,0x4F, //XBOW // FSEP1, FSEP0 0x07-0x08 0X03,0x0E, // CURRENT RX MODE VALUE 0x09 also see below 4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE, // FRONT_END 0x0a 1 << CC1K_IF_RSSI, // PA_POW 0x0b 0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, // PLL 0x0c 11 << CC1K_REFDIV, // LOCK 0x0d 0xe << CC1K_LOCK_SELECT, // CAL 0x0e 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE, // MODEM2 0x0f 1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET, // MODEM1 0x10 3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, // MODEM0 0x11 5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ, // MATCH 0x12 0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH, // tx current (extra) 8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE, }, // 3 914.077 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO { // MAIN 0x00 0x31, // FREQ2A,FREQ1A,FREQ0A 0x01-0x03 0x5c,0xe0,0x00, // FREQ2B,FREQ1B,FREQ0B 0x04-0x06 0x5c,0xdb,0x42, // FSEP1, FSEP0 0x07-0x8 0x01,0xAA, // CURRENT RX MODE VALUE 0x09 also see below 8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE, //0x8C, // FRONT_END 0x0a 1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 1 << CC1K_IF_RSSI, //0x32, // PA_POW 0x0b 0x8 << CC1K_PA_HIGHPOWER | 0x0 << CC1K_PA_LOWPOWER, //0xff, // PLL 0xc 6 << CC1K_REFDIV, //0x40, // LOCK 0xd 0x1 << CC1K_LOCK_SELECT, //0x10, // CAL 0xe 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE, //0x26, // MODEM2 0xf 1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET, //0xA1, // MODEM1 0x10 3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, //0x6f, // MODEM0 0x11 5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ, //0x55, // MATCH 0x12 0x1 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH, // tx current (extra) 15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE, }, // 4 315.178985 MHz channel, 38.4 Kbps data, Manchester Encoding, High Side LO { // MAIN 0x00 0x31, // FREQ2A,FREQ1A,FREQ0A 0x01-0x03 0x45,0x60,0x00, // FREQ2B,FREQ1B,FREQ0B 0x04-0x06 0x45,0x55,0xBB, // FSEP1, FSEP0 0x07-0x08 0X03,0x9C, // CURRENT RX MODE VALUE 0x09 also see below 8 << CC1K_VCO_CURRENT | 0 << CC1K_LO_DRIVE, // FRONT_END 0x0a 1 << CC1K_IF_RSSI, // PA_POW 0x0b 0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, // PLL 0x0c 13 << CC1K_REFDIV, // LOCK 0x0d 0xe << CC1K_LOCK_SELECT, // CAL 0x0e 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE, // MODEM2 0x0f 1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET, // MODEM1 0x10 3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, // MODEM0 0x11 5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 0 << CC1K_XOSC_FREQ, // MATCH 0x12 0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH, // tx current (extra) 8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE, }, // 5 Spare { // MAIN 0x00 0x31, // FREQ2A,FREQ1A,FREQ0A 0x01-0x03 0x58,0x00,0x00, // FREQ2B,FREQ1B,FREQ0B 0x04-0x06 0x57,0xf6,0x85, //XBOW // FSEP1, FSEP0 0x07-0x08 0X03,0x55, // CURRENT RX MODE VALUE 0x09 also see below 8 << CC1K_VCO_CURRENT | 4 << CC1K_LO_DRIVE, // FRONT_END 0x0a 1 << CC1K_IF_RSSI, // PA_POW 0x0b 0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, // PLL 0x0c 12 << CC1K_REFDIV, // LOCK 0x0d 0xe << CC1K_LOCK_SELECT, // CAL 0x0e 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE, // MODEM2 0x0f 1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET, // MODEM1 0x10 3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, // MODEM0 0x11 5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ, // MATCH 0x12 0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH, // tx current (extra) 8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE, }, }; #define UQ_CC1000_RSSI "CC1000RssiP.Rssi" #endif /* CC1000CONST_H */ tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000Control.nc000066400000000000000000000121331207233610700212330ustar00rootroot00000000000000/* $Id: CC1000Control.nc,v 1.5 2010-06-29 22:07:44 scipio Exp $ * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * CC1000 internal radio control interface. * @author Philip Buonadonna * @aythor Jaein Jeong */ interface CC1000Control { /** * Initialise the radio to its default state. */ command void init(); /** * Tune the radio to one of the frequencies available in the CC1K_Params * table. Calling Tune will allso reset the rfpower and LockVal * selections to the table values. * * @param freq The index into the CC1K_Params table that holds the * desired preset frequency parameters. */ command void tunePreset(uint8_t freq); /** * Tune the radio to a given frequency. Since the CC1000 uses a digital * frequency synthesizer, it cannot tune to just an arbitrary frequency. * This routine will determine the closest achievable channel, compute * the necessary parameters and tune the radio. * * @param The desired channel frequency, in Hz. * * @return The actual computed channel frequency, in Hz. A return value * of '0' indicates that no frequency was computed and the radio was not * tuned. */ command uint32_t tuneManual(uint32_t DesiredFreq); /** * Turn the CC1000 off */ async command void off(); /** * Shift the CC1000 Radio into transmit mode. */ async command void txMode(); /** * Shift the CC1000 Radio in receive mode. */ async command void rxMode(); /** * Turn off the bias power on the CC1000 radio, but leave the core and * crystal oscillator powered. This will result in approximately a 750 * uA power savings. */ async command void coreOn(); /** * Turn the bias power on. This function must be followed by a call to * either rxMode() or txMode() to place the radio in a recieve/transmit * state respectively. There is approximately a 200us delay when * restoring bias power. */ async command void biasOn(); /** * Set the transmit RF power value. The input value is simply an * arbitrary index that is programmed into the CC1000 registers. Consult * the CC1000 datasheet for the resulting power output/current * consumption values. * * @param power A power index between 1 and 255. */ command void setRFPower(uint8_t power); /** * Get the present RF power index. * * @return The power index value. */ command uint8_t getRFPower(); /** * Select the signal to monitor at the CHP_OUT pin of the CC1000. See * the CC1000 data sheet for the available signals. * * @param LockVal The index of the signal to monitor at the CHP_OUT pin */ command void selectLock(uint8_t LockVal); /** * Get the binary value from the CHP_OUT pin. Analog signals cannot be * read using function. * * @return 1 - Pin is high or 0 - Pin is low */ command uint8_t getLock(); /** * Returns whether the present frequency set is using high-side LO * injection or not. This information is used to determine if the data * from the CC1000 needs to be inverted or not. * * @return TRUE if high-side LO injection is being used (i.e. data does NOT need to be inverted * at the receiver. */ command bool getLOStatus(); } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000ControlP.nc000066400000000000000000000252401207233610700213560ustar00rootroot00000000000000/* $Id: CC1000ControlP.nc,v 1.6 2010-06-29 22:07:44 scipio Exp $ * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "CC1000Const.h" #include "Timer.h" /** * This module provides the CONTROL functionality for the Chipcon1000 * series radio. It exports a custom interface to control CC1000 * operation. * * @author Philip Buonadonna * @author Jaein Jeong * @author David Gay */ module CC1000ControlP @safe() { provides { interface CC1000Control; } uses { interface HplCC1000 as CC; interface BusyWait; } } implementation { uint8_t txCurrent, rxCurrent, power; enum { IF = 150000, FREQ_MIN = 4194304, FREQ_MAX = 16751615 }; const_uint32_t fRefTbl[9] = {2457600, 2106514, 1843200, 1638400, 1474560, 1340509, 1228800, 1134277, 1053257}; const_uint16_t corTbl[9] = {1213, 1416, 1618, 1820, 2022, 2224, 2427, 2629, 2831}; const_uint16_t fSepTbl[9] = {0x1AA, 0x1F1, 0x238, 0x280, 0x2C7, 0x30E, 0x355, 0x39C, 0x3E3}; void calibrateNow() { // start cal call CC.write(CC1K_CAL, 1 << CC1K_CAL_START | 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE); while ((call CC.read(CC1K_CAL) & 1 << CC1K_CAL_COMPLETE) == 0) ; //exit cal mode call CC.write(CC1K_CAL, 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE); } void calibrate() { call CC.write(CC1K_PA_POW, 0x00); // turn off rf amp call CC.write(CC1K_TEST4, 0x3f); // chip rate >= 38.4kb // RX - configure main freq A call CC.write(CC1K_MAIN, 1 << CC1K_TX_PD | 1 << CC1K_RESET_N); calibrateNow(); // TX - configure main freq B call CC.write(CC1K_MAIN, 1 << CC1K_RXTX | 1 << CC1K_F_REG | 1 << CC1K_RX_PD | 1 << CC1K_RESET_N); // Set TX current call CC.write(CC1K_CURRENT, txCurrent); call CC.write(CC1K_PA_POW, 0); calibrateNow(); call CC1000Control.rxMode(); } /* * cc1000ComputeFreq(uint32_t desiredFreq); * * Compute an achievable frequency and the necessary CC1K parameters from * a given desired frequency (Hz). The function returns the actual achieved * channel frequency in Hz. * * This routine assumes the following: * - Crystal Freq: 14.7456 MHz * - LO Injection: High * - Separation: 64 KHz * - IF: 150 KHz * * Approximate costs for this function: * - ~870 bytes FLASH * - ~32 bytes RAM * - 9400 cycles */ uint32_t cc1000SetFrequency(uint32_t desiredFreq) { uint32_t ActualChannel = 0; uint32_t RXFreq = 0, TXFreq = 0; int32_t Offset = 0x7fffffff; uint16_t FSep = 0; uint8_t RefDiv = 0; uint8_t i, match, frontend; for (i = 0; i < 9; i++) { uint32_t NRef = desiredFreq + IF; uint32_t FRef = read_uint32_t(&fRefTbl[i]); uint32_t Channel = 0; uint32_t RXCalc = 0, TXCalc = 0; int32_t diff; NRef = ((desiredFreq + IF) << 2) / FRef; if (NRef & 0x1) NRef++; if (NRef & 0x2) { RXCalc = 16384 >> 1; Channel = FRef >> 1; } NRef >>= 2; RXCalc += (NRef * 16384) - 8192; if ((RXCalc < FREQ_MIN) || (RXCalc > FREQ_MAX)) continue; TXCalc = RXCalc - read_uint16_t(&corTbl[i]); if (TXCalc < FREQ_MIN || TXCalc > FREQ_MAX) continue; Channel += NRef * FRef; Channel -= IF; diff = Channel - desiredFreq; if (diff < 0) diff = -diff; if (diff < Offset) { RXFreq = RXCalc; TXFreq = TXCalc; ActualChannel = Channel; FSep = read_uint16_t(&fSepTbl[i]); RefDiv = i + 6; Offset = diff; } } if (RefDiv != 0) { call CC.write(CC1K_FREQ_0A, RXFreq); call CC.write(CC1K_FREQ_1A, RXFreq >> 8); call CC.write(CC1K_FREQ_2A, RXFreq >> 16); call CC.write(CC1K_FREQ_0B, TXFreq); call CC.write(CC1K_FREQ_1B, TXFreq >> 8); call CC.write(CC1K_FREQ_2B, TXFreq >> 16); call CC.write(CC1K_FSEP0, FSep); call CC.write(CC1K_FSEP1, FSep >> 8); if (ActualChannel < 500000000) { if (ActualChannel < 400000000) { rxCurrent = 8 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE; txCurrent = 9 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE; } else { rxCurrent = 4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE; txCurrent = 8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE; } frontend = 1 << CC1K_IF_RSSI; match = 7 << CC1K_RX_MATCH; } else { rxCurrent = 8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE; txCurrent = 15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE; frontend = 1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 1 << CC1K_IF_RSSI; match = 2 << CC1K_RX_MATCH; // datasheet says to use 1... } call CC.write(CC1K_CURRENT, rxCurrent); call CC.write(CC1K_MATCH, match); call CC.write(CC1K_FRONT_END, frontend); call CC.write(CC1K_PLL, RefDiv << CC1K_REFDIV); } return ActualChannel; } command void CC1000Control.init() { call CC.init(); // wake up xtal and reset unit call CC.write(CC1K_MAIN, 1 << CC1K_RX_PD | 1 << CC1K_TX_PD | 1 << CC1K_FS_PD | 1 << CC1K_BIAS_PD); // clear reset. call CC1000Control.coreOn(); call BusyWait.wait(2000); // Set default parameter values // POWER: 0dbm (~900MHz), 6dbm (~430MHz) power = 8 << CC1K_PA_HIGHPOWER | 0 << CC1K_PA_LOWPOWER; call CC.write(CC1K_PA_POW, power); // select Manchester Violation for CHP_OUT call CC.write(CC1K_LOCK_SELECT, 9 << CC1K_LOCK_SELECT); // Default modem values = 19.2 Kbps (38.4 kBaud), Manchester encoded call CC.write(CC1K_MODEM2, 0); call CC.write(CC1K_MODEM1, 3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | 3 << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N); call CC.write(CC1K_MODEM0, 5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ); call CC.write(CC1K_FSCTRL, 1 << CC1K_FS_RESET_N); #ifdef CC1K_DEF_FREQ call CC1000Control.tuneManual(CC1K_DEF_FREQ); #else call CC1000Control.tunePreset(CC1K_DEF_PRESET); #endif call CC1000Control.off(); } command void CC1000Control.tunePreset(uint8_t freq) { int i; // FREQA, FREQB, FSEP, CURRENT(RX), FRONT_END, POWER, PLL for (i = CC1K_FREQ_2A; i <= CC1K_PLL; i++) call CC.write(i, read_uint8_t(&CC1K_Params[freq][i])); call CC.write(CC1K_MATCH, read_uint8_t(&CC1K_Params[freq][CC1K_MATCH])); rxCurrent = read_uint8_t(&CC1K_Params[freq][CC1K_CURRENT]); txCurrent = read_uint8_t(&CC1K_Params[freq][CC1K_MATCH + 1]); power = read_uint8_t(&CC1K_Params[freq][CC1K_PA_POW]); calibrate(); } command uint32_t CC1000Control.tuneManual(uint32_t DesiredFreq) { uint32_t actualFreq; actualFreq = cc1000SetFrequency(DesiredFreq); calibrate(); return actualFreq; } async command void CC1000Control.txMode() { // MAIN register to TX mode call CC.write(CC1K_MAIN, 1 << CC1K_RXTX | 1 << CC1K_F_REG | 1 << CC1K_RX_PD | 1 << CC1K_RESET_N); // Set the TX mode VCO Current call CC.write(CC1K_CURRENT, txCurrent); call BusyWait.wait(250); call CC.write(CC1K_PA_POW, power); call BusyWait.wait(20); } async command void CC1000Control.rxMode() { // MAIN register to RX mode // Powerup Freqency Synthesizer and Receiver call CC.write(CC1K_CURRENT, rxCurrent); call CC.write(CC1K_PA_POW, 0); // turn off power amp call CC.write(CC1K_MAIN, 1 << CC1K_TX_PD | 1 << CC1K_RESET_N); call BusyWait.wait(125); } async command void CC1000Control.coreOn() { // MAIN register to SLEEP mode call CC.write(CC1K_MAIN, 1 << CC1K_RX_PD | 1 << CC1K_TX_PD | 1 << CC1K_FS_PD | 1 << CC1K_BIAS_PD | 1 << CC1K_RESET_N); } async command void CC1000Control.biasOn() { call CC.write(CC1K_MAIN, 1 << CC1K_RX_PD | 1 << CC1K_TX_PD | 1 << CC1K_FS_PD | 1 << CC1K_RESET_N); } async command void CC1000Control.off() { // MAIN register to power down mode. Shut everything off call CC.write(CC1K_MAIN, 1 << CC1K_RX_PD | 1 << CC1K_TX_PD | 1 << CC1K_FS_PD | 1 << CC1K_CORE_PD | 1 << CC1K_BIAS_PD | 1 << CC1K_RESET_N); call CC.write(CC1K_PA_POW, 0); // turn off rf amp } command void CC1000Control.setRFPower(uint8_t newPower) { power = newPower; } command uint8_t CC1000Control.getRFPower() { return power; } command void CC1000Control.selectLock(uint8_t fn) { // Select function of CHP_OUT pin (readable via getLock) call CC.write(CC1K_LOCK, fn << CC1K_LOCK_SELECT); } command uint8_t CC1000Control.getLock() { return call CC.getLOCK(); } command bool CC1000Control.getLOStatus() { // We use a high-side LO (local oscillator) frequency -> data will be // inverted. See cc1000ComputeFreq and CC1000 datasheet p.23. return TRUE; } } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000CsmaP.nc000066400000000000000000000334661207233610700206320ustar00rootroot00000000000000// $Id: CC1000CsmaP.nc,v 1.11 2010-06-29 22:07:44 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "message.h" #include "crc.h" #include "CC1000Const.h" #include "Timer.h" /** * A rewrite of the low-power-listening CC1000 radio stack. * This file contains the CSMA and low-power listening logic. Actual * packet transmission and reception is in SendReceive. *

    * This code has some degree of platform-independence, via the * CC1000Control, RSSIADC and SpiByteFifo interfaces which must be provided * by the platform. However, these interfaces may still reflect some * particularities of the mica2 hardware implementation. * * @author Philip Buonadonna * @author Jaein Jeong * @author Joe Polastre * @author David Gay */ module CC1000CsmaP @safe() { provides { interface Init; interface SplitControl; interface CsmaControl; interface CsmaBackoff; interface LowPowerListening; } uses { interface Init as ByteRadioInit; interface StdControl as ByteRadioControl; interface ByteRadio; //interface PowerManagement; interface CC1000Control; interface CC1000Squelch; interface Random; interface Timer as WakeupTimer; interface BusyWait; interface ReadNow as RssiNoiseFloor; interface ReadNow as RssiCheckChannel; interface ReadNow as RssiPulseCheck; async command void cancelRssi(); } } implementation { enum { DISABLED_STATE, IDLE_STATE, RX_STATE, TX_STATE, POWERDOWN_STATE, PULSECHECK_STATE }; enum { TIME_AFTER_CHECK = 30, }; uint8_t radioState = DISABLED_STATE; struct { uint8_t ccaOff : 1; uint8_t txPending : 1; } f; // f for flags uint8_t count; uint8_t clearCount; int16_t macDelay; uint16_t sleepTime; uint16_t rssiForSquelch; task void setWakeupTask(); cc1000_metadata_t * ONE getMetadata(message_t * ONE amsg) { return TCAST(cc1000_metadata_t * ONE, (uint8_t*)amsg + offsetof(message_t, footer) + sizeof(cc1000_footer_t)); } void enterIdleState() { call cancelRssi(); radioState = IDLE_STATE; } void enterIdleStateSetWakeup() { enterIdleState(); post setWakeupTask(); } void enterDisabledState() { call cancelRssi(); radioState = DISABLED_STATE; } void enterPowerDownState() { call cancelRssi(); radioState = POWERDOWN_STATE; } void enterPulseCheckState() { radioState = PULSECHECK_STATE; count = 0; } void enterRxState() { call cancelRssi(); radioState = RX_STATE; } void enterTxState() { radioState = TX_STATE; } /* Basic radio power control */ void radioOn() { call CC1000Control.coreOn(); call BusyWait.wait(2000); call CC1000Control.biasOn(); call BusyWait.wait(200); atomic call ByteRadio.listen(); } void radioOff() { call CC1000Control.off(); call ByteRadio.off(); } void setPreambleLength(message_t * ONE msg); /* Initialisation, startup and stopping */ /*--------------------------------------*/ command error_t Init.init() { call ByteRadioInit.init(); call CC1000Control.init(); return SUCCESS; } task void startStopDone() { uint8_t s; // Save a byte of RAM by sharing start/stopDone task atomic s = radioState; if (s == DISABLED_STATE) signal SplitControl.stopDone(SUCCESS); else signal SplitControl.startDone(SUCCESS); } command error_t SplitControl.start() { atomic if (radioState == DISABLED_STATE) { call ByteRadioControl.start(); enterIdleStateSetWakeup(); f.txPending = FALSE; } else return SUCCESS; radioOn(); post startStopDone(); return SUCCESS; } command error_t SplitControl.stop() { atomic { call ByteRadioControl.stop(); enterDisabledState(); radioOff(); } call WakeupTimer.stop(); post startStopDone(); return SUCCESS; } /* Wakeup timer */ /*-------------*/ /* All timer setting code is placed in setWakeup, for consistency. */ void setWakeup() { switch (radioState) { case IDLE_STATE: /* Timer already running means that we have a noise floor measurement scheduled. If we just set a new alarm here, we might indefinitely delay noise floor measurements if we're, e,g, transmitting frequently. */ if (!call WakeupTimer.isRunning()) if (call CC1000Squelch.settled()) { if (sleepTime == 0) call WakeupTimer.startOneShot(CC1K_SquelchIntervalSlow); else // timeout for receiving a message after an lpl check // indicates channel activity. call WakeupTimer.startOneShot(TIME_AFTER_CHECK); } else call WakeupTimer.startOneShot(CC1K_SquelchIntervalFast); break; case PULSECHECK_STATE: // Radio warm-up time. call WakeupTimer.startOneShot(1); break; case POWERDOWN_STATE: // low-power listening check interval call WakeupTimer.startOneShot(sleepTime); break; } } task void setWakeupTask() { atomic setWakeup(); } event void WakeupTimer.fired() { atomic { switch (radioState) { case IDLE_STATE: /* If we appear to be receiving a packet we don't check the noise floor. For LPL, this means that going to sleep will be delayed by another TIME_AFTER_CHECK ms. */ if (!call ByteRadio.syncing()) { call cancelRssi(); call RssiNoiseFloor.read(); } break; case POWERDOWN_STATE: // Turn radio on, wait for 1ms enterPulseCheckState(); call CC1000Control.biasOn(); break; case PULSECHECK_STATE: // Switch to RX mode and get RSSI output call CC1000Control.rxMode(); call RssiPulseCheck.read(); call BusyWait.wait(80); return; // don't set wakeup timer } setWakeup(); } } /* Low-power listening stuff */ /*---------------------------*/ /* Should we go to sleep, or turn the radio fully on? */ task void sleepCheck() { bool turnOn = FALSE; atomic if (f.txPending || !sleepTime) { if (radioState == PULSECHECK_STATE || radioState == POWERDOWN_STATE) { enterIdleStateSetWakeup(); turnOn = TRUE; } } else if (call CC1000Squelch.settled() && !call ByteRadio.syncing()) { radioOff(); enterPowerDownState(); setWakeup(); } if (turnOn) radioOn(); } task void adjustSquelch(); async event void RssiPulseCheck.readDone(error_t result, uint16_t data) { if (result != SUCCESS) { /* Just give up on this interval. */ post sleepCheck(); return; } /* We got some RSSI data for our LPL check. Decide whether to: - go back to sleep (quiet) - wake up (channel active) - get more RSSI data */ if (data > call CC1000Squelch.get() - (call CC1000Squelch.get() >> 2)) { post sleepCheck(); // don't be too agressive (ignore really quiet thresholds). if (data < call CC1000Squelch.get() + (call CC1000Squelch.get() >> 3)) { // adjust the noise floor level, go back to sleep. rssiForSquelch = data; post adjustSquelch(); } } else if (count++ > 5) { //go to the idle state since no outliers were found enterIdleStateSetWakeup(); call ByteRadio.listen(); } else { call RssiPulseCheck.read(); call BusyWait.wait(80); } } /* CSMA */ /*------*/ event void ByteRadio.rts(message_t * ONE msg) { atomic { f.txPending = TRUE; if (radioState == POWERDOWN_STATE) post sleepCheck(); if (!f.ccaOff) macDelay = signal CsmaBackoff.initial(call ByteRadio.getTxMessage()); else macDelay = 1; setPreambleLength(msg); } } async event void ByteRadio.sendDone() { f.txPending = FALSE; enterIdleStateSetWakeup(); } void congestion() { macDelay = signal CsmaBackoff.congestion(call ByteRadio.getTxMessage()); } async event void ByteRadio.idleByte(bool preamble) { if (f.txPending) { if (!f.ccaOff && preamble) congestion(); else if (macDelay && !--macDelay) { call cancelRssi(); count = 0; call RssiCheckChannel.read(); } } } async event void RssiCheckChannel.readDone(error_t result, uint16_t data) { if (result != SUCCESS) { /* We'll retry the transmission at the next SPI event. */ atomic macDelay = 1; return; } count++; if (data > call CC1000Squelch.get() + CC1K_SquelchBuffer) clearCount++; else clearCount = 0; // if the channel is clear or CCA is disabled, GO GO GO! if (clearCount >= 1 || f.ccaOff) { enterTxState(); call ByteRadio.cts(); } else if (count == CC1K_MaxRSSISamples) congestion(); else call RssiCheckChannel.read(); } /* Message being received. We basically just go inactive. */ /*--------------------------------------------------------*/ async event void ByteRadio.rx() { enterRxState(); } async event void ByteRadio.rxDone() { if (radioState == RX_STATE) enterIdleStateSetWakeup(); } /* Noise floor */ /*-------------*/ task void adjustSquelch() { uint16_t squelchData; atomic squelchData = rssiForSquelch; call CC1000Squelch.adjust(squelchData); } async event void RssiNoiseFloor.readDone(error_t result, uint16_t data) { if (result != SUCCESS) { /* We just ignore failed noise floor measurements */ post sleepCheck(); return; } rssiForSquelch = data; post adjustSquelch(); post sleepCheck(); } /* Options */ /*---------*/ async command error_t CsmaControl.enableCca() { atomic f.ccaOff = FALSE; return SUCCESS; } async command error_t CsmaControl.disableCca() { atomic f.ccaOff = TRUE; return SUCCESS; } /* Default MAC backoff parameters */ /*--------------------------------*/ default async event uint16_t CsmaBackoff.initial(message_t *m) { // initially back off [1,32] bytes (approx 2/3 packet) return (call Random.rand16() & 0x1F) + 1; } default async event uint16_t CsmaBackoff.congestion(message_t *m) { return (call Random.rand16() & 0xF) + 1; } /* LowPowerListening setup */ /* ----------------------- */ uint16_t validateSleepInterval(uint16_t sleepIntervalMs) { if (sleepIntervalMs < CC1K_LPL_MIN_INTERVAL) return 0; else if (sleepIntervalMs > CC1K_LPL_MAX_INTERVAL) return CC1K_LPL_MAX_INTERVAL; else return sleepIntervalMs; } uint16_t dutyToSleep(uint16_t dutyCycle) { /* Scaling factors on CC1K_LPL_CHECK_TIME and dutyCycle are identical */ uint16_t interval = (1000 * CC1K_LPL_CHECK_TIME) / dutyCycle; return interval < CC1K_LPL_MIN_INTERVAL ? 0 : interval; } uint16_t sleepToDuty(uint16_t sleepInterval) { if (sleepInterval < CC1K_LPL_MIN_INTERVAL) return 10000; /* Scaling factors on CC1K_LPL_CHECK_TIME and dutyCycle are identical */ return (1000 * CC1K_LPL_CHECK_TIME) / sleepInterval; } command void LowPowerListening.setLocalWakeupInterval(uint16_t s) { sleepTime = validateSleepInterval(s); } command uint16_t LowPowerListening.getLocalWakeupInterval() { return sleepTime; } command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t sleepIntervalMs) { cc1000_metadata_t *meta = getMetadata(msg); meta->strength_or_preamble = -(int16_t)validateSleepInterval(sleepIntervalMs) - 1; } command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { cc1000_metadata_t *meta = getMetadata(msg); if (meta->strength_or_preamble >= 0) return sleepTime; else return -(meta->strength_or_preamble + 1); } void setPreambleLength(message_t * ONE msg) { cc1000_metadata_t *meta = getMetadata(msg); uint16_t s; uint32_t plen; if (meta->strength_or_preamble >= 0) s = sleepTime; else s = -(meta->strength_or_preamble + 1); meta->strength_or_preamble = 0; /* Destroy setting */ if (s == 0) plen = 6; else plen = ((s * 614UL) >> 8) + 22; /* ~ s * 2.4 + 22 */ call ByteRadio.setPreambleLength(plen); } } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000CsmaRadioC.nc000066400000000000000000000120521207233610700215600ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * A low-power-listening CC1000 radio stack. * * Radio logic is split between Csma (media-access control, low-power * listening and general control) and SendReceive (packet reception and * transmission). * * CC1000RssiP (RSSI sharing), CC1000SquelchP (noise-floor estimation) * and CC1000ControlP (radio configuration) provide supporting roles. * * This code has some degree of platform-independence, via the HplCC1000, * RssiAdc and HplCC1000Spi interfaces which must be provided by the * platform. However, these interfaces may still reflect some * particularities of the mica2 hardware implementation. * * @author Joe Polastre * @author David Gay * @author Marco Langerwisch (Packet timestamping) */ #include "CC1000Const.h" #include "message.h" configuration CC1000CsmaRadioC { provides { interface SplitControl; interface Send; interface Receive; interface Packet; interface CsmaControl; interface CsmaBackoff; interface PacketAcknowledgements; interface LinkPacketMetadata; interface LowPowerListening; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeSyncOffset; } } implementation { components CC1000CsmaP as Csma; components CC1000SendReceiveP as SendReceive; components CC1000RssiP as Rssi; components CC1000SquelchP as Squelch; components CC1000ControlP as Control; components HplCC1000C as Hpl; components MainC, RandomC, new TimerMilliC(), ActiveMessageAddressC, BusyWaitMicroC; MainC.SoftwareInit -> Csma; MainC.SoftwareInit -> Squelch; SplitControl = Csma; Send = SendReceive; Receive = SendReceive; Packet = SendReceive; CsmaControl = Csma; CsmaBackoff = Csma; LowPowerListening = Csma; PacketAcknowledgements = SendReceive; LinkPacketMetadata = SendReceive; Csma.CC1000Control -> Control; Csma.Random -> RandomC; Csma.CC1000Squelch -> Squelch; Csma.WakeupTimer -> TimerMilliC; Csma.ByteRadio -> SendReceive; Csma.ByteRadioInit -> SendReceive; Csma.ByteRadioControl -> SendReceive; SendReceive.CC1000Control -> Control; SendReceive.HplCC1000Spi -> Hpl; SendReceive.amAddress -> ActiveMessageAddressC; SendReceive.RssiRx -> Rssi.Rssi[unique(UQ_CC1000_RSSI)]; SendReceive.CC1000Squelch -> Squelch; Csma.RssiNoiseFloor -> Rssi.Rssi[unique(UQ_CC1000_RSSI)]; Csma.RssiCheckChannel -> Rssi.Rssi[unique(UQ_CC1000_RSSI)]; Csma.RssiPulseCheck -> Rssi.Rssi[unique(UQ_CC1000_RSSI)]; Csma.cancelRssi -> Rssi; Csma.BusyWait -> BusyWaitMicroC; Rssi.ActualRssi -> Hpl; Rssi.Resource -> Hpl; Control.CC -> Hpl; Control.BusyWait -> BusyWaitMicroC; PacketTimeStamp32khz = SendReceive; PacketTimeStampMilli = SendReceive; PacketTimeSyncOffset = SendReceive; components Counter32khz32C, new CounterToLocalTimeC(T32khz); CounterToLocalTimeC.Counter -> Counter32khz32C; SendReceive.LocalTime32khz -> CounterToLocalTimeC; //DummyTimer is introduced to compile apps that use no timers components HilTimerMilliC, new TimerMilliC() as DummyTimer; SendReceive.LocalTimeMilli -> HilTimerMilliC; } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000Msg.h000066400000000000000000000022531207233610700201720ustar00rootroot00000000000000#ifndef CC1K_RADIO_MSG_H #define CC1K_RADIO_MSG_H #include "AM.h" typedef nx_struct CC1KHeader { nx_am_addr_t dest; nx_am_addr_t source; nx_uint8_t length; nx_am_group_t group; nx_am_id_t type; } cc1000_header_t; typedef nx_struct CC1KFooter { nxle_uint16_t crc; } cc1000_footer_t; typedef enum { CC1000_ACK_BIT = 0x1, CC1000_WHITE_BIT = 0x2, /* 60 comes from the mica2 data sheet (MPR/MIB guide) and Dongjin Son's work in SenSys 2006. Son's work showed that a SINR of 6dB is sufficient for > 90% PRR. Figure 7-2 of the data sheet shows that a 6dB difference is approximately equal to a VRSSI voltage difference of 0.15V. Since the battery voltage is 2.8V (approximately), 60/1024 * 2.8 is roughly equal to 0.15. This deserves some experimental testing. -pal */ CC1000_WHITE_BIT_THRESH = 60 } CC1KMetadataBits; typedef nx_struct CC1KMetadata { nx_int16_t strength_or_preamble; /* negative when used for preamble length */ nx_uint8_t metadataBits; nx_bool timesync; nx_uint32_t timestamp; nx_uint8_t sendSecurityMode; nx_uint8_t receiveSecurityMode; } cc1000_metadata_t; enum { CC1000_INVALID_TIMESTAMP = 0x80000000L, }; #endif tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000RssiP.nc000066400000000000000000000076441207233610700206660ustar00rootroot00000000000000/* $Id: CC1000RssiP.nc,v 1.8 2010-06-29 22:07:44 scipio Exp $ * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * RSSI fun. It's used for lots of things, and a request to read it * for one purpose may have to be discarded if conditions change. For * example, if we've initiated a noise-floor measure, but start * receiving a packet, we have to:

      *
    • cancel the noise-floor measure (we don't know if the value will * reflect the received packet or the previous idle state) *
    • start an RSSI measurement so that we can report signal strength * to the application *

    * This module hides the complexities of cancellation from the rest of * the stack. */ module CC1000RssiP @safe() { provides { interface ReadNow as Rssi[uint8_t reason]; async command void cancel(); } uses { interface Resource; interface ReadNow as ActualRssi; } } implementation { enum { IDLE = unique(UQ_CC1000_RSSI), CANCELLED = unique(UQ_CC1000_RSSI) }; /* All commands are called within atomic sections */ uint8_t currentOp = IDLE; uint8_t nextOp; async command void cancel() { if (currentOp != IDLE) currentOp = CANCELLED; } event void Resource.granted() { call ActualRssi.read(); } async command error_t Rssi.read[uint8_t reason]() { if (currentOp == IDLE) { currentOp = reason; if (call Resource.immediateRequest() == SUCCESS) call ActualRssi.read(); else call Resource.request(); } else nextOp = reason; return SUCCESS; } void startNextOp() { currentOp = nextOp; if (nextOp != IDLE) { nextOp = IDLE; call ActualRssi.read(); } else call Resource.release(); } async event void ActualRssi.readDone(error_t result, uint16_t data) { atomic { /* The RSSI measurements are assumed to be 10-bits */ signal Rssi.readDone[currentOp](result, data); startNextOp(); } } default async event void Rssi.readDone[uint8_t reason](error_t result, uint16_t data) { } } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000SendReceiveP.nc000066400000000000000000000516111207233610700221330ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "message.h" #include "crc.h" #include "CC1000Const.h" #include "Timer.h" #include "CC1000TimeSyncMessage.h" /** * A rewrite of the low-power-listening CC1000 radio stack. * This file contains the send and receive logic for the CC1000 radio. * It does not do any media-access control. It requests the channel * via the ready-to-send event (rts) and starts transmission on reception * of the clear-to-send command (cts). It listens for packets if the * listen() command is called, and stops listening when off() is called. *

    * This code has some degree of platform-independence, via the * CC1000Control, RSSIADC and SpiByteFifo interfaces which must be provided * by the platform. However, these interfaces may still reflect some * particularities of the mica2 hardware implementation. * * @author Philip Buonadonna * @author Jaein Jeong * @author Joe Polastre * @author David Gay * @author Marco Langerwisch (Packet timestamping) */ module CC1000SendReceiveP @safe() { provides { interface Init; interface StdControl; interface Send; interface Receive; interface Packet; interface ByteRadio; interface PacketAcknowledgements; interface LinkPacketMetadata; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeSyncOffset; } uses { //interface PowerManagement; interface CC1000Control; interface HplCC1000Spi; interface CC1000Squelch; interface ReadNow as RssiRx; async command am_addr_t amAddress(); interface LocalTime as LocalTime32khz; interface LocalTime as LocalTimeMilli; } } implementation { #ifdef PLATFORM_MICA2 // estimated calibration, 19.2 Kbps data, Manchester Encoding, time in jiffies (32768 Hz) static const int8_t BIT_CORRECTION[8] = { 27, 28, 30, 32, 34, 36, 38, 40 }; #else // other platforms not calibrated yet static const uint8_t BIT_CORRECTION[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; #endif enum { OFF_STATE, INACTIVE_STATE, /* Not listening, but will accept sends */ LISTEN_STATE, /* Listening for packets */ /* Reception states */ SYNC_STATE, RX_STATE, RECEIVED_STATE, SENDING_ACK, /* Transmission states */ TXPREAMBLE_STATE, TXSYNC_STATE, TXDATA_STATE, TXCRC_STATE, TXFLUSH_STATE, TXWAITFORACK_STATE, TXREADACK_STATE, TXDONE_STATE, }; enum { SYNC_BYTE1 = 0x33, SYNC_BYTE2 = 0xcc, SYNC_WORD = SYNC_BYTE1 << 8 | SYNC_BYTE2, ACK_BYTE1 = 0xba, ACK_BYTE2 = 0x83, ACK_WORD = ACK_BYTE1 << 8 | ACK_BYTE2, ACK_LENGTH = 16, MAX_ACK_WAIT = 18 }; uint8_t radioState; struct { uint8_t ack : 1; /* acks enabled? */ uint8_t txBusy : 1; /* send pending? */ uint8_t invert : 1; /* data inverted? (see cc1000 datasheet) */ uint8_t rxBitOffset : 3; /* bit-offset of received bytes */ } f; // f for flags uint16_t count; uint16_t runningCrc; uint16_t rxShiftBuf; message_t rxBuf; message_t * ONE rxBufPtr = &rxBuf; uint16_t preambleLength; message_t * ONE_NOK txBufPtr; uint8_t nextTxByte; const_uint8_t ackCode[5] = { 0xab, ACK_BYTE1, ACK_BYTE2, 0xaa, 0xaa }; /* Packet structure accessor functions. Note that everything is * relative to the data field. */ cc1000_header_t * ONE getHeader(message_t * ONE amsg) { return TCAST(cc1000_header_t * ONE, (uint8_t *)amsg + offsetof(message_t, data) - sizeof(cc1000_header_t)); } cc1000_footer_t *getFooter(message_t * ONE amsg) { return (cc1000_footer_t *)(amsg->footer); } cc1000_metadata_t * ONE getMetadata(message_t * ONE amsg) { return TCAST(cc1000_metadata_t * ONE, (uint8_t *)amsg + offsetof(message_t, footer) + sizeof(cc1000_footer_t)); } /* State transition functions */ /*----------------------------*/ void enterOffState() { radioState = OFF_STATE; } void enterInactiveState() { radioState = INACTIVE_STATE; } void enterListenState() { radioState = LISTEN_STATE; count = 0; } void enterSyncState() { radioState = SYNC_STATE; count = 0; rxShiftBuf = 0; } void enterRxState() { cc1000_header_t *header = getHeader(rxBufPtr); radioState = RX_STATE; header->length = sizeof rxBufPtr->data; count = sizeof(message_header_t) - sizeof(cc1000_header_t); runningCrc = 0; } void enterReceivedState() { radioState = RECEIVED_STATE; } void enterAckState() { radioState = SENDING_ACK; count = 0; } void enterTxPreambleState() { radioState = TXPREAMBLE_STATE; count = 0; runningCrc = 0; nextTxByte = 0xaa; } void enterTxSyncState() { radioState = TXSYNC_STATE; } void enterTxDataState() { radioState = TXDATA_STATE; // The count increment happens before the first byte is read from the // packet, so we subtract one from the real packet start point to // compensate. count = (sizeof(message_header_t) - sizeof(cc1000_header_t)) -1; } void enterTxCrcState() { radioState = TXCRC_STATE; } void enterTxFlushState() { radioState = TXFLUSH_STATE; count = 0; } void enterTxWaitForAckState() { radioState = TXWAITFORACK_STATE; count = 0; } void enterTxReadAckState() { radioState = TXREADACK_STATE; rxShiftBuf = 0; count = 0; } void enterTxDoneState() { radioState = TXDONE_STATE; } command error_t Init.init() { f.ack = TRUE; /* We always ack, for now at least */ call HplCC1000Spi.initSlave(); return SUCCESS; } command error_t StdControl.start() { atomic { enterInactiveState(); f.txBusy = FALSE; f.invert = call CC1000Control.getLOStatus(); } return SUCCESS; } command error_t StdControl.stop() { atomic enterOffState(); return SUCCESS; } /* Send side. Outside requests, SPI handlers for each state */ /*----------------------------------------------------------*/ command error_t Send.send(message_t *msg, uint8_t len) { atomic { if (f.txBusy || radioState == OFF_STATE) return FAIL; else { cc1000_header_t *header = getHeader(msg); cc1000_metadata_t *metadata = getMetadata(msg); f.txBusy = TRUE; header->length = len; txBufPtr = msg; metadata->timesync = FALSE; metadata->timestamp = CC1000_INVALID_TIMESTAMP; } } signal ByteRadio.rts(msg); return SUCCESS; } async command void ByteRadio.cts() { /* We're set to go! Start with our exciting preamble... */ enterTxPreambleState(); call HplCC1000Spi.writeByte(0xaa); call CC1000Control.txMode(); call HplCC1000Spi.txMode(); } command error_t Send.cancel(message_t *msg) { /* We simply ignore cancellations. */ return FAIL; } void sendNextByte() { call HplCC1000Spi.writeByte(nextTxByte); count++; } void txPreamble() { sendNextByte(); if (count >= preambleLength) { nextTxByte = SYNC_BYTE1; enterTxSyncState(); } } void txSync() { sendNextByte(); nextTxByte = SYNC_BYTE2; enterTxDataState(); } void txData() { cc1000_header_t *txHeader = getHeader(txBufPtr); sendNextByte(); if (nextTxByte == SYNC_BYTE2) { // SYNC_WORD has just been sent uint32_t time32khz = call LocalTime32khz.get(); call PacketTimeStamp32khz.set(txBufPtr, time32khz); if (call PacketTimeSyncOffset.isSet(txBufPtr)) { timesync_radio_t *timesync = (timesync_radio_t*)((void*)txBufPtr + call PacketTimeSyncOffset.get(txBufPtr)); // set timesync event time as the offset between the event time and the SFD interrupt time (TEP 133) *timesync -= time32khz; } } if (count < txHeader->length + sizeof(message_header_t)) { nextTxByte = ((uint8_t *)txBufPtr)[count]; runningCrc = crcByte(runningCrc, nextTxByte); } else { nextTxByte = runningCrc; enterTxCrcState(); } } void txCrc() { sendNextByte(); nextTxByte = runningCrc >> 8; enterTxFlushState(); } void txFlush() { sendNextByte(); if (count > 3) if (f.ack) enterTxWaitForAckState(); else { call HplCC1000Spi.rxMode(); call CC1000Control.rxMode(); enterTxDoneState(); } } void txWaitForAck() { sendNextByte(); if (count == 1) { call HplCC1000Spi.rxMode(); call CC1000Control.rxMode(); } else if (count > 3) enterTxReadAckState(); } void txReadAck(uint8_t in) { uint8_t i; sendNextByte(); for (i = 0; i < 8; i ++) { rxShiftBuf <<= 1; if (in & 0x80) rxShiftBuf |= 0x1; in <<= 1; if (rxShiftBuf == ACK_WORD) { getMetadata(txBufPtr)->metadataBits |= CC1000_ACK_BIT; enterTxDoneState(); return; } } if (count >= MAX_ACK_WAIT) { getMetadata(txBufPtr)->metadataBits &= ~CC1000_ACK_BIT; enterTxDoneState(); } } task void signalPacketSent() { message_t *pBuf; atomic { pBuf = txBufPtr; f.txBusy = FALSE; enterListenState(); } signal Send.sendDone(pBuf, SUCCESS); } void txDone() { post signalPacketSent(); signal ByteRadio.sendDone(); } /* Receive */ /*---------*/ void packetReceived(); void packetReceiveDone(); async command void ByteRadio.listen() { enterListenState(); call CC1000Control.rxMode(); call HplCC1000Spi.rxMode(); call HplCC1000Spi.enableIntr(); } async command void ByteRadio.off() { enterInactiveState(); call HplCC1000Spi.disableIntr(); } void listenData(uint8_t in) { bool preamble = in == 0xaa || in == 0x55; // Look for enough preamble bytes if (preamble) { count++; if (count > CC1K_ValidPrecursor) enterSyncState(); } else count = 0; signal ByteRadio.idleByte(preamble); } void syncData(uint8_t in) { // draw in the preamble bytes and look for a sync byte // save the data in a short with last byte received as msbyte // and current byte received as the lsbyte. // use a bit shift compare to find the byte boundary for the sync byte // retain the shift value and use it to collect all of the packet data // check for data inversion, and restore proper polarity // XXX-PB: Don't do this. if (in == 0xaa || in == 0x55) // It is actually possible to have the LAST BIT of the incoming // data be part of the Sync Byte. SO, we need to store that // However, the next byte should definitely not have this pattern. // XXX-PB: Do we need to check for excessive preamble? rxShiftBuf = in << 8; else if (count++ == 0) rxShiftBuf |= in; else if (count <= 6) { // TODO: Modify to be tolerant of bad bits in the preamble... uint32_t time; uint16_t tmp; uint8_t i; time = call LocalTime32khz.get(); // bit shift the data in with previous sample to find sync tmp = rxShiftBuf; rxShiftBuf = rxShiftBuf << 8 | in; for(i = 0; i < 8; i++) { tmp <<= 1; if (in & 0x80) tmp |= 0x1; in <<= 1; // check for sync bytes if (tmp == SYNC_WORD) { enterRxState(); signal ByteRadio.rx(); f.rxBitOffset = 7 - i; // correct receive time according to bit offset and set timestamp time -= BIT_CORRECTION[f.rxBitOffset]; call PacketTimeStamp32khz.set(rxBufPtr, time); call RssiRx.read(); } } } else // We didn't find it after a reasonable number of tries, so.... enterListenState(); } async event void RssiRx.readDone(error_t result, uint16_t data) { cc1000_metadata_t *rxMetadata = getMetadata(rxBufPtr); if (result != SUCCESS) rxMetadata->strength_or_preamble = 0; else rxMetadata->strength_or_preamble = data; } void rxData(uint8_t in) { uint8_t nextByte; cc1000_header_t *rxHeader = getHeader(rxBufPtr); uint8_t rxLength = rxHeader->length; // Reject invalid length packets if (rxLength > TOSH_DATA_LENGTH) { // The packet's screwed up, so just dump it enterListenState(); signal ByteRadio.rxDone(); return; } rxShiftBuf = rxShiftBuf << 8 | in; nextByte = rxShiftBuf >> f.rxBitOffset; ((uint8_t *COUNT(sizeof(message_t)))rxBufPtr)[count++] = nextByte; // Adjust rxLength to correspond to the corresponding offset in message_t rxLength += offsetof(message_t, data); if (count <= rxLength) runningCrc = crcByte(runningCrc, nextByte); // Jump to CRC when we reach the end of data if (count == rxLength) { count = offsetof(message_t, footer) + offsetof(cc1000_footer_t, crc); } if (count == (offsetof(message_t, footer) + sizeof(cc1000_footer_t))) packetReceived(); } void packetReceived() { cc1000_footer_t *rxFooter = getFooter(rxBufPtr); cc1000_header_t *rxHeader = getHeader(rxBufPtr); // Packet filtering based on bad CRC's is done at higher layers. // So sayeth the TOS weenies. rxFooter->crc = (rxFooter->crc == runningCrc); if (f.ack && rxFooter->crc && rxHeader->dest == call amAddress()) { enterAckState(); call CC1000Control.txMode(); call HplCC1000Spi.txMode(); call HplCC1000Spi.writeByte(0xaa); } else packetReceiveDone(); } void ackData(uint8_t in) { if (++count >= ACK_LENGTH) { call CC1000Control.rxMode(); call HplCC1000Spi.rxMode(); packetReceiveDone(); } else if (count >= ACK_LENGTH - sizeof ackCode) call HplCC1000Spi.writeByte(read_uint8_t(&ackCode[count + sizeof ackCode - ACK_LENGTH])); } task void signalPacketReceived() { message_t *pBuf; cc1000_header_t *pHeader; atomic { if (radioState != RECEIVED_STATE) return; pBuf = rxBufPtr; } pHeader = getHeader(pBuf); pBuf = signal Receive.receive(pBuf, pBuf->data, pHeader->length); atomic { if (pBuf) rxBufPtr = pBuf; if (radioState == RECEIVED_STATE) // receiver might've done something enterListenState(); signal ByteRadio.rxDone(); } } void packetReceiveDone() { uint16_t snr; snr = (uint16_t) getMetadata(rxBufPtr)->strength_or_preamble; /* Higher signal strengths have lower voltages. So see if we're CC1000_WHITE_BIT_THRESH *below* the noise floor. */ if ((snr + CC1000_WHITE_BIT_THRESH) < ((call CC1000Squelch.get()))) { getMetadata(rxBufPtr)->metadataBits |= CC1000_WHITE_BIT; } else { getMetadata(rxBufPtr)->metadataBits &= ~CC1000_WHITE_BIT; } post signalPacketReceived(); enterReceivedState(); } async event void HplCC1000Spi.dataReady(uint8_t data) { if (f.invert) data = ~data; switch (radioState) { default: break; case TXPREAMBLE_STATE: txPreamble(); break; case TXSYNC_STATE: txSync(); break; case TXDATA_STATE: txData(); break; case TXCRC_STATE: txCrc(); break; case TXFLUSH_STATE: txFlush(); break; case TXWAITFORACK_STATE: txWaitForAck(); break; case TXREADACK_STATE: txReadAck(data); break; case TXDONE_STATE: txDone(); break; case LISTEN_STATE: listenData(data); break; case SYNC_STATE: syncData(data); break; case RX_STATE: rxData(data); break; case SENDING_ACK: ackData(data); break; } } /* Interaction with rest of stack */ /*--------------------------------*/ async command void ByteRadio.setPreambleLength(uint16_t bytes) { atomic preambleLength = bytes; } async command uint16_t ByteRadio.getPreambleLength() { atomic return preambleLength; } async command message_t *ByteRadio.getTxMessage() { return txBufPtr; } async command bool ByteRadio.syncing() { return radioState == SYNC_STATE; } /* Abstract packet layout */ command void Packet.clear(message_t *msg) { memset(getHeader(msg), 0x0, sizeof(cc1000_header_t)); memset(getFooter(msg), 0x0, sizeof(cc1000_footer_t)); memset(getMetadata(msg), 0x0, sizeof(cc1000_metadata_t)); } command uint8_t Packet.payloadLength(message_t *msg) { cc1000_header_t *header = getHeader(msg); return header->length; } command void Packet.setPayloadLength(message_t *msg, uint8_t len) { getHeader(msg)->length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command void* Packet.getPayload(message_t *msg, uint8_t len) { if (len <= TOSH_DATA_LENGTH) { return (void* COUNT_NOK(len))msg->data; } else { return NULL; } } async command error_t PacketAcknowledgements.requestAck(message_t *msg) { return SUCCESS; /* We always ack. */ } async command error_t PacketAcknowledgements.noAck(message_t *msg) { return FAIL; /* We always ack */ } command uint8_t Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command void* Send.getPayload(message_t *m, uint8_t len) { return call Packet.getPayload(m, len); } async command bool PacketAcknowledgements.wasAcked(message_t *msg) { return getMetadata(msg)->metadataBits & CC1000_ACK_BIT; } async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { return getMetadata(msg)->metadataBits & CC1000_WHITE_BIT; } /***************** PacketTimeStamp32khz Commands ****************/ async command bool PacketTimeStamp32khz.isValid(message_t* msg) { return (getMetadata(msg)->timestamp != CC1000_INVALID_TIMESTAMP); } async command uint32_t PacketTimeStamp32khz.timestamp(message_t* msg) { return getMetadata(msg)->timestamp; } async command void PacketTimeStamp32khz.clear(message_t* msg) { getMetadata(msg)->timesync = FALSE; getMetadata(msg)->timestamp = CC1000_INVALID_TIMESTAMP; } async command void PacketTimeStamp32khz.set(message_t* msg, uint32_t value) { getMetadata(msg)->timestamp = value; } /***************** PacketTimeStampMilli Commands ****************/ // over the air value is always T32khz async command bool PacketTimeStampMilli.isValid(message_t* msg) { return call PacketTimeStamp32khz.isValid(msg); } async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg) { int32_t offset = call PacketTimeStamp32khz.timestamp(msg) - call LocalTime32khz.get(); return (offset >> 5) + call LocalTimeMilli.get(); } async command void PacketTimeStampMilli.clear(message_t* msg) { call PacketTimeStamp32khz.clear(msg); } async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value) { int32_t offset = (value - call LocalTimeMilli.get()) << 5; call PacketTimeStamp32khz.set(msg, offset + call LocalTime32khz.get()); } /*----------------- PacketTimeSyncOffset -----------------*/ async command bool PacketTimeSyncOffset.isSet(message_t* msg) { return getMetadata(msg)->timesync; } async command uint8_t PacketTimeSyncOffset.get(message_t* msg) { return sizeof(cc1000_header_t) + getHeader(msg)->length - sizeof(timesync_radio_t); } async command void PacketTimeSyncOffset.set(message_t* msg) { getMetadata(msg)->timesync = TRUE; } async command void PacketTimeSyncOffset.cancel(message_t* msg) { getMetadata(msg)->timesync = FALSE; } } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000Squelch.nc000066400000000000000000000051221207233610700212170ustar00rootroot00000000000000/* $Id: CC1000Squelch.nc,v 1.5 2010-06-29 22:07:44 scipio Exp $ * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * CC1000 internal noise floor (aka squelch value) interface * @author David Gay */ interface CC1000Squelch { /** * Adjust noise floor based on new noise measurement * @param data noise measurement */ command void adjust(uint16_t data); /** * Return current estimated noise floor * @return Noise floor value */ async command uint16_t get(); /** * Check if noise floor estimate is considered stable (typically after * some number of measurements) * @return TRUE if noise floor estimate considered stable, FALSE otherwise */ command bool settled(); } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000SquelchP.nc000066400000000000000000000070351207233610700213440ustar00rootroot00000000000000/* $Id: CC1000SquelchP.nc,v 1.6 2010-06-29 22:07:44 scipio Exp $ * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "CC1000Const.h" /** * Clear threshold estimation based on RSSI measurements. * * @author Philip Buonadonna * @author Jaein Jeong * @author Joe Polastre * @author David Gay */ module CC1000SquelchP @safe() { provides { interface Init; interface CC1000Squelch; } } implementation { uint16_t clearThreshold = CC1K_SquelchInit; uint16_t squelchTable[CC1K_SquelchTableSize]; uint8_t squelchIndex, squelchCount; command error_t Init.init() { uint8_t i; for (i = 0; i < CC1K_SquelchTableSize; i++) squelchTable[i] = CC1K_SquelchInit; return SUCCESS; } command void CC1000Squelch.adjust(uint16_t data) { uint16_t squelchTab[CC1K_SquelchTableSize]; uint8_t i, j, min; uint32_t newThreshold; squelchTable[squelchIndex++] = data; if (squelchIndex >= CC1K_SquelchTableSize) squelchIndex = 0; if (squelchCount <= CC1K_SquelchCount) squelchCount++; // Find 3rd highest (aka lowest signal strength) value memcpy(squelchTab, squelchTable, sizeof squelchTable); for (j = 0; ; j++) { min = 0; for (i = 1; i < CC1K_SquelchTableSize; i++) if (squelchTab[i] > squelchTab[min]) min = i; if (j == 3) break; squelchTab[min] = 0; } newThreshold = ((uint32_t)clearThreshold << 5) + ((uint32_t)squelchTab[min] << 1); atomic clearThreshold = newThreshold / 34; } async command uint16_t CC1000Squelch.get() { return clearThreshold; } command bool CC1000Squelch.settled() { return squelchCount > CC1K_SquelchCount; } } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000TimeSyncMessage.h000066400000000000000000000033671207233610700225130ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __TIMESYNCMESSAGE_H__ #define __TIMESYNCMESSAGE_H__ // this value is sent in the air typedef nx_uint32_t timesync_radio_t; #endif//__TIMESYNCMESSAGE_H__ tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000TimeSyncMessageC.nc000066400000000000000000000077041207233610700227660ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The Active Message layer for the CC1000 radio with timesync support. This * configuration is just layer above CC1000ActiveMessageC that supports * TimeSyncPacket and TimeSyncAMSend interfaces (TEP 133) * * @author: Miklos Maroti * @author: Brano Kusy (CC2420 port) * @author: Marco Langerwisch (CC1000 port) */ #include #include configuration CC1000TimeSyncMessageC { provides { interface SplitControl; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components CC1000TimeSyncMessageP, CC1000ActiveMessageC, LedsC; PacketTimeStamp32khz = CC1000ActiveMessageC; PacketTimeStampMilli = CC1000ActiveMessageC; TimeSyncAMSend32khz = CC1000TimeSyncMessageP; TimeSyncPacket32khz = CC1000TimeSyncMessageP; TimeSyncAMSendMilli = CC1000TimeSyncMessageP; TimeSyncPacketMilli = CC1000TimeSyncMessageP; Packet = CC1000TimeSyncMessageP; CC1000TimeSyncMessageP.SubSend -> CC1000ActiveMessageC.AMSend; CC1000TimeSyncMessageP.SubPacket -> CC1000ActiveMessageC.Packet; CC1000TimeSyncMessageP.PacketTimeStamp32khz -> CC1000ActiveMessageC; CC1000TimeSyncMessageP.PacketTimeStampMilli -> CC1000ActiveMessageC; CC1000TimeSyncMessageP.PacketTimeSyncOffset -> CC1000ActiveMessageC; components Counter32khz32C, new CounterToLocalTimeC(T32khz) as LocalTime32khzC, LocalTimeMilliC; LocalTime32khzC.Counter -> Counter32khz32C; CC1000TimeSyncMessageP.LocalTime32khz -> LocalTime32khzC; CC1000TimeSyncMessageP.LocalTimeMilli -> LocalTimeMilliC; CC1000TimeSyncMessageP.Leds -> LedsC; SplitControl = CC1000ActiveMessageC; Receive = CC1000ActiveMessageC.Receive; Snoop = CC1000ActiveMessageC.Snoop; AMPacket = CC1000ActiveMessageC; } tinyos-2.1.2+dfsg/tos/chips/cc1000/CC1000TimeSyncMessageP.nc000066400000000000000000000155461207233610700230060ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti * @author: Brano Kusy (CC2420 port) * @author: Marco Langerwisch (CC1000 port) */ #include "CC1000TimeSyncMessage.h" module CC1000TimeSyncMessageP { provides { interface TimeSyncAMSend as TimeSyncAMSend32khz[uint8_t id]; interface TimeSyncAMSend as TimeSyncAMSendMilli[uint8_t id]; interface Packet; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncPacket as TimeSyncPacketMilli; } uses { interface AMSend as SubSend[uint8_t id]; interface Packet as SubPacket; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeSyncOffset; interface LocalTime as LocalTime32khz; interface LocalTime as LocalTimeMilli; interface Leds; } } implementation { // TODO: change the Packet.payloadLength and Packet.maxPayloadLength commands to async inline void* getFooter(message_t* msg) { // we use the payload length that we export (the smaller one) return msg->data + call Packet.payloadLength(msg); } /*----------------- Packet -----------------*/ command void Packet.clear(message_t* msg) { call PacketTimeSyncOffset.cancel(msg); call SubPacket.clear(msg); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg, len + sizeof(timesync_radio_t)); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(timesync_radio_t); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(timesync_radio_t); } command void* Packet.getPayload(message_t* msg, uint8_t len) { return call SubPacket.getPayload(msg, len + sizeof(timesync_radio_t)); } /*----------------- TimeSyncAMSend32khz -----------------*/ command error_t TimeSyncAMSend32khz.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time) { error_t err; timesync_radio_t* timesync = (timesync_radio_t*)(msg->data + len); *timesync = event_time; err = call SubSend.send[id](addr, msg, len + sizeof(timesync_radio_t)); call PacketTimeSyncOffset.set(msg); return err; } command error_t TimeSyncAMSend32khz.cancel[am_id_t id](message_t* msg) { call PacketTimeSyncOffset.cancel(msg); return call SubSend.cancel[id](msg); } default event void TimeSyncAMSend32khz.sendDone[am_id_t id](message_t* msg, error_t error) {} command uint8_t TimeSyncAMSend32khz.maxPayloadLength[am_id_t id]() { return call SubSend.maxPayloadLength[id]() - sizeof(timesync_radio_t); } command void* TimeSyncAMSend32khz.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call SubSend.getPayload[id](msg, len + sizeof(timesync_radio_t)); } /*----------------- TimeSyncAMSendMilli -----------------*/ command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time) { // compute elapsed time in millisecond event_time = ((event_time - call LocalTimeMilli.get()) << 5) + call LocalTime32khz.get(); return call TimeSyncAMSend32khz.send[id](addr, msg, len, event_time); } command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg) { return call TimeSyncAMSend32khz.cancel[id](msg); } default event void TimeSyncAMSendMilli.sendDone[am_id_t id](message_t* msg, error_t error){} command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]() { return call TimeSyncAMSend32khz.maxPayloadLength[id](); } command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call TimeSyncAMSend32khz.getPayload[id](msg, len); } /*----------------- SubSend.sendDone -------------------*/ event void SubSend.sendDone[am_id_t id](message_t* msg, error_t error) { signal TimeSyncAMSend32khz.sendDone[id](msg, error); signal TimeSyncAMSendMilli.sendDone[id](msg, error); } /*----------------- TimeSyncPacket32khz -----------------*/ command bool TimeSyncPacket32khz.isValid(message_t* msg) { timesync_radio_t* timesync = getFooter(msg); return call PacketTimeStamp32khz.isValid(msg) && *timesync != CC1000_INVALID_TIMESTAMP; } command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg) { timesync_radio_t* timesync = getFooter(msg); return (uint32_t)(*timesync) + call PacketTimeStamp32khz.timestamp(msg); } /*----------------- TimeSyncPacketMilli -----------------*/ command bool TimeSyncPacketMilli.isValid(message_t* msg) { timesync_radio_t* timesync = getFooter(msg); return call PacketTimeStampMilli.isValid(msg) && *timesync != CC1000_INVALID_TIMESTAMP; } command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg) { timesync_radio_t* timesync = getFooter(msg); return ((int32_t)(*timesync) >> 5) + call PacketTimeStampMilli.timestamp(msg); } } tinyos-2.1.2+dfsg/tos/chips/cc1000/CsmaControl.nc000066400000000000000000000040721207233610700213330ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface for activating/deactivating congestion control. * * @author Philip Levis * @author Joe Polastre * @date August 31 2005 */ interface CsmaControl { /** * Enable congestion control. * @return SUCCESS if congestion control enabled, FAIL otherwise. */ async command error_t enableCca(); /** * Disable congestion control. * @return SUCCESS if congestion control disabled, FAIL otherwise. */ async command error_t disableCca(); } tinyos-2.1.2+dfsg/tos/chips/cc1000/HplCC1000.nc000066400000000000000000000055511207233610700203440ustar00rootroot00000000000000// $Id: HplCC1000.nc,v 1.6 2010-06-29 22:07:44 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Authors: Jason Hill, David Gay, Philip Levis * Date last modified: 6/25/02 * * */ /** * Low-level CC1000 radio-access operations that must be provided by a * platform wishing to use this CC1000 implementation. * * @author Jason Hill * @author David Gay * @author Philip Levis */ interface HplCC1000 { /** * Initialize CC1K pins */ command void init(); /** * Write a value to a CC1000 register. * @param addr Which CC1000 register * @param data Value to write */ async command void write(uint8_t addr, uint8_t data); /** * Read a value from a CC1000 register. * @param addr Which CC1000 register * @return Value of register */ async command uint8_t read(uint8_t addr); /** * Read the state of the CHP_OUT pin * @return State of CHP_OUT as a boolean (TRUE for high) */ async command bool getLOCK(); } tinyos-2.1.2+dfsg/tos/chips/cc1000/HplCC1000Spi.nc000066400000000000000000000067651207233610700210300ustar00rootroot00000000000000// $Id: HplCC1000Spi.nc,v 1.6 2010-06-29 22:07:44 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Interface to the CC1000 chip's serial bus. This isn't really an SPI, * but the mica2 interface was done using the Atmega128 SPI hardware. Hence * the name. * * @author Jaein Jeong * @author Philip buonadonna */ interface HplCC1000Spi { /** * Write a byte to the CC1000 bus. * @param data Byte to write. */ async command void writeByte(uint8_t data); /** * Is write buffer busy with the last transmission? * @return TRUE if the buffer is busy, FALSE otherwise. */ async command bool isBufBusy(); /** * Get the last byte received from the CC1000 bus. * @return Last byte received. */ async command uint8_t readByte(); /** * Enable dataReady events on every byte sent or received from the CC1000 * bus. After this is called, dataReady events will be signaled every * 8 CC1000 data clocks. */ async command void enableIntr(); /** * Disable CC1000 bus interrupts. */ async command void disableIntr(); /** * Initialise the interface to the CC1000 bus. */ async command void initSlave(); /** * Switch the interface to the CC1000 bus "transmit" mode. */ async command void txMode(); /** * Switch the interface to the CC1000 bus to "receive" mode. */ async command void rxMode(); /** * If enableIntr() is called, this event will be signaled every 8 CC1000 * data clocks. * @param data In "receive" mode, the last value received from the CC1000 * bus. */ async event void dataReady(uint8_t data); } tinyos-2.1.2+dfsg/tos/chips/cc1000/PacketTimeSyncOffset.nc000066400000000000000000000056201207233610700231410ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti, Brano Kusy * * Interface for one hop time synchronization. Allows to modify timesync * messages in the MAC layer with elapsed time of an event (ETA timesync * primitive). Interface also provides a command to determine offset within * a CC1000 packet, where the timesync ETA value is stored. word 'timestamping' * used in describing commands does not refer to metadata.timestamp value, * rather it refers to the timesync ETA timestamp which is part of data * payload and is transmitted over the air. */ interface PacketTimeSyncOffset { /** * @param 'message_t *ONE msg' message to examine. * * Returns TRUE if the current message should be timestamped. */ async command bool isSet(message_t* msg); /** * @param 'message_t *ONE msg' message to examine. * * Returns the offset of where the timesync timestamp is sotred in a * CC2420 packet */ async command uint8_t get(message_t* msg); /** * @param 'message_t *ONE msg' message to modify. * * Sets the current message to be timestamped in the MAC layer. */ async command void set(message_t* msg); /** * @param 'message_t *ONE msg' message to modify. * * Cancels any pending requests to timestamp the message in MAC. */ async command void cancel(message_t* msg); } tinyos-2.1.2+dfsg/tos/chips/cc2420/000077500000000000000000000000001207233610700165715ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420.h000066400000000000000000000267141207233610700175510ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * * @author Jonathan Hui * @author David Moss * @version $Revision: 1.19 $ $Date: 2009-09-17 23:36:36 $ */ #ifndef __CC2420_H__ #define __CC2420_H__ typedef uint8_t cc2420_status_t; #if defined(TFRAMES_ENABLED) && defined(IEEE154FRAMES_ENABLED) #error "Both TFRAMES and IEEE154FRAMES enabled!" #endif /** * CC2420 header definition. * * An I-frame (interoperability frame) header has an extra network * byte specified by 6LowPAN * * Length = length of the header + payload of the packet, minus the size * of the length byte itself (1). This is what allows for variable * length packets. * * FCF = Frame Control Field, defined in the 802.15.4 specs and the * CC2420 datasheet. * * DSN = Data Sequence Number, a number incremented for each packet sent * by a particular node. This is used in acknowledging that packet, * and also filtering out duplicate packets. * * DestPan = The destination PAN (personal area network) ID, so your * network can sit side by side with another TinyOS network and not * interfere. * * Dest = The destination address of this packet. 0xFFFF is the broadcast * address. * * Src = The local node ID that generated the message. * * Network = The TinyOS network ID, for interoperability with other types * of 802.15.4 networks. * * Type = TinyOS AM type. When you create a new AMSenderC(AM_MYMSG), * the AM_MYMSG definition is the type of packet. * * TOSH_DATA_LENGTH defaults to 28, it represents the maximum size of * the payload portion of the packet, and is specified in the * tos/types/message.h file. * * All of these fields will be filled in automatically by the radio stack * when you attempt to send a message. */ /** * CC2420 Security Header */ typedef nx_struct security_header_t { nx_uint8_t secLevel:3; nx_uint8_t keyMode:2; nx_uint8_t reserved:3; nx_uint32_t frameCounter; nx_uint8_t keyID[1]; // One byte for now } security_header_t; typedef nx_struct cc2420_header_t { nxle_uint8_t length; nxle_uint16_t fcf; nxle_uint8_t dsn; nxle_uint16_t destpan; nxle_uint16_t dest; nxle_uint16_t src; /** CC2420 802.15.4 header ends here */ #ifdef CC2420_HW_SECURITY security_header_t secHdr; #endif #ifndef TFRAMES_ENABLED /** I-Frame 6LowPAN interoperability byte */ nxle_uint8_t network; #endif nxle_uint8_t type; } cc2420_header_t; /** * CC2420 Packet Footer */ typedef nx_struct cc2420_footer_t { } cc2420_footer_t; /** * CC2420 Packet metadata. Contains extra information about the message * that will not be transmitted. * * Note that the first two bytes automatically take in the values of the * FCS when the payload is full. Do not modify the first two bytes of metadata. */ typedef nx_struct cc2420_metadata_t { nx_uint8_t rssi; nx_uint8_t lqi; nx_uint8_t tx_power; nx_bool crc; nx_bool ack; nx_bool timesync; nx_uint32_t timestamp; nx_uint16_t rxInterval; /** Packet Link Metadata */ #ifdef PACKET_LINK nx_uint16_t maxRetries; nx_uint16_t retryDelay; #endif } cc2420_metadata_t; typedef nx_struct cc2420_packet_t { cc2420_header_t packet; nx_uint8_t data[]; } cc2420_packet_t; #ifndef TOSH_DATA_LENGTH #define TOSH_DATA_LENGTH 28 #endif #ifndef CC2420_DEF_CHANNEL #define CC2420_DEF_CHANNEL 26 #endif #ifndef CC2420_DEF_RFPOWER #define CC2420_DEF_RFPOWER 31 #endif /** * Ideally, your receive history size should be equal to the number of * RF neighbors your node will have */ #ifndef RECEIVE_HISTORY_SIZE #define RECEIVE_HISTORY_SIZE 4 #endif /** * The 6LowPAN NALP ID for a TinyOS network is 63 (TEP 125). */ #ifndef TINYOS_6LOWPAN_NETWORK_ID #define TINYOS_6LOWPAN_NETWORK_ID 0x3f #endif enum { // size of the header not including the length byte MAC_HEADER_SIZE = sizeof( cc2420_header_t ) - 1, // size of the footer (FCS field) MAC_FOOTER_SIZE = sizeof( uint16_t ), // MDU MAC_PACKET_SIZE = MAC_HEADER_SIZE + TOSH_DATA_LENGTH + MAC_FOOTER_SIZE, CC2420_SIZE = MAC_HEADER_SIZE + MAC_FOOTER_SIZE, }; enum cc2420_enums { CC2420_TIME_ACK_TURNAROUND = 7, // jiffies CC2420_TIME_VREN = 20, // jiffies CC2420_TIME_SYMBOL = 2, // 2 symbols / jiffy CC2420_BACKOFF_PERIOD = ( 20 / CC2420_TIME_SYMBOL ), // symbols CC2420_MIN_BACKOFF = ( 20 / CC2420_TIME_SYMBOL ), // platform specific? CC2420_ACK_WAIT_DELAY = 256, // jiffies }; enum cc2420_status_enums { CC2420_STATUS_RSSI_VALID = 1 << 1, CC2420_STATUS_LOCK = 1 << 2, CC2420_STATUS_TX_ACTIVE = 1 << 3, CC2420_STATUS_ENC_BUSY = 1 << 4, CC2420_STATUS_TX_UNDERFLOW = 1 << 5, CC2420_STATUS_XOSC16M_STABLE = 1 << 6, }; enum cc2420_config_reg_enums { CC2420_SNOP = 0x00, CC2420_SXOSCON = 0x01, CC2420_STXCAL = 0x02, CC2420_SRXON = 0x03, CC2420_STXON = 0x04, CC2420_STXONCCA = 0x05, CC2420_SRFOFF = 0x06, CC2420_SXOSCOFF = 0x07, CC2420_SFLUSHRX = 0x08, CC2420_SFLUSHTX = 0x09, CC2420_SACK = 0x0a, CC2420_SACKPEND = 0x0b, CC2420_SRXDEC = 0x0c, CC2420_STXENC = 0x0d, CC2420_SAES = 0x0e, CC2420_MAIN = 0x10, CC2420_MDMCTRL0 = 0x11, CC2420_MDMCTRL1 = 0x12, CC2420_RSSI = 0x13, CC2420_SYNCWORD = 0x14, CC2420_TXCTRL = 0x15, CC2420_RXCTRL0 = 0x16, CC2420_RXCTRL1 = 0x17, CC2420_FSCTRL = 0x18, CC2420_SECCTRL0 = 0x19, CC2420_SECCTRL1 = 0x1a, CC2420_BATTMON = 0x1b, CC2420_IOCFG0 = 0x1c, CC2420_IOCFG1 = 0x1d, CC2420_MANFIDL = 0x1e, CC2420_MANFIDH = 0x1f, CC2420_FSMTC = 0x20, CC2420_MANAND = 0x21, CC2420_MANOR = 0x22, CC2420_AGCCTRL = 0x23, CC2420_AGCTST0 = 0x24, CC2420_AGCTST1 = 0x25, CC2420_AGCTST2 = 0x26, CC2420_FSTST0 = 0x27, CC2420_FSTST1 = 0x28, CC2420_FSTST2 = 0x29, CC2420_FSTST3 = 0x2a, CC2420_RXBPFTST = 0x2b, CC2420_FMSTATE = 0x2c, CC2420_ADCTST = 0x2d, CC2420_DACTST = 0x2e, CC2420_TOPTST = 0x2f, CC2420_TXFIFO = 0x3e, CC2420_RXFIFO = 0x3f, }; enum cc2420_ram_addr_enums { CC2420_RAM_TXFIFO = 0x000, CC2420_RAM_RXFIFO = 0x080, CC2420_RAM_KEY0 = 0x100, CC2420_RAM_RXNONCE = 0x110, CC2420_RAM_SABUF = 0x120, CC2420_RAM_KEY1 = 0x130, CC2420_RAM_TXNONCE = 0x140, CC2420_RAM_CBCSTATE = 0x150, CC2420_RAM_IEEEADR = 0x160, CC2420_RAM_PANID = 0x168, CC2420_RAM_SHORTADR = 0x16a, }; enum cc2420_nonce_enums { CC2420_NONCE_BLOCK_COUNTER = 0, CC2420_NONCE_KEY_SEQ_COUNTER = 2, CC2420_NONCE_FRAME_COUNTER = 3, CC2420_NONCE_SOURCE_ADDRESS = 7, CC2420_NONCE_FLAGS = 15, }; enum cc2420_main_enums { CC2420_MAIN_RESETn = 15, CC2420_MAIN_ENC_RESETn = 14, CC2420_MAIN_DEMOD_RESETn = 13, CC2420_MAIN_MOD_RESETn = 12, CC2420_MAIN_FS_RESETn = 11, CC2420_MAIN_XOSC16M_BYPASS = 0, }; enum cc2420_mdmctrl0_enums { CC2420_MDMCTRL0_RESERVED_FRAME_MODE = 13, CC2420_MDMCTRL0_PAN_COORDINATOR = 12, CC2420_MDMCTRL0_ADR_DECODE = 11, CC2420_MDMCTRL0_CCA_HYST = 8, CC2420_MDMCTRL0_CCA_MOD = 6, CC2420_MDMCTRL0_AUTOCRC = 5, CC2420_MDMCTRL0_AUTOACK = 4, CC2420_MDMCTRL0_PREAMBLE_LENGTH = 0, }; enum cc2420_mdmctrl1_enums { CC2420_MDMCTRL1_CORR_THR = 6, CC2420_MDMCTRL1_DEMOD_AVG_MODE = 5, CC2420_MDMCTRL1_MODULATION_MODE = 4, CC2420_MDMCTRL1_TX_MODE = 2, CC2420_MDMCTRL1_RX_MODE = 0, }; enum cc2420_rssi_enums { CC2420_RSSI_CCA_THR = 8, CC2420_RSSI_RSSI_VAL = 0, }; enum cc2420_syncword_enums { CC2420_SYNCWORD_SYNCWORD = 0, }; enum cc2420_txctrl_enums { CC2420_TXCTRL_TXMIXBUF_CUR = 14, CC2420_TXCTRL_TX_TURNAROUND = 13, CC2420_TXCTRL_TXMIX_CAP_ARRAY = 11, CC2420_TXCTRL_TXMIX_CURRENT = 9, CC2420_TXCTRL_PA_CURRENT = 6, CC2420_TXCTRL_RESERVED = 5, CC2420_TXCTRL_PA_LEVEL = 0, }; enum cc2420_rxctrl0_enums { CC2420_RXCTRL0_RXMIXBUF_CUR = 12, CC2420_RXCTRL0_HIGH_LNA_GAIN = 10, CC2420_RXCTRL0_MED_LNA_GAIN = 8, CC2420_RXCTRL0_LOW_LNA_GAIN = 6, CC2420_RXCTRL0_HIGH_LNA_CURRENT = 4, CC2420_RXCTRL0_MED_LNA_CURRENT = 2, CC2420_RXCTRL0_LOW_LNA_CURRENT = 0, }; enum cc2420_rxctrl1_enums { CC2420_RXCTRL1_RXBPF_LOCUR = 13, CC2420_RXCTRL1_RXBPF_MIDCUR = 12, CC2420_RXCTRL1_LOW_LOWGAIN = 11, CC2420_RXCTRL1_MED_LOWGAIN = 10, CC2420_RXCTRL1_HIGH_HGM = 9, CC2420_RXCTRL1_MED_HGM = 8, CC2420_RXCTRL1_LNA_CAP_ARRAY = 6, CC2420_RXCTRL1_RXMIX_TAIL = 4, CC2420_RXCTRL1_RXMIX_VCM = 2, CC2420_RXCTRL1_RXMIX_CURRENT = 0, }; enum cc2420_rsctrl_enums { CC2420_FSCTRL_LOCK_THR = 14, CC2420_FSCTRL_CAL_DONE = 13, CC2420_FSCTRL_CAL_RUNNING = 12, CC2420_FSCTRL_LOCK_LENGTH = 11, CC2420_FSCTRL_LOCK_STATUS = 10, CC2420_FSCTRL_FREQ = 0, }; enum cc2420_secctrl0_enums { CC2420_SECCTRL0_RXFIFO_PROTECTION = 9, CC2420_SECCTRL0_SEC_CBC_HEAD = 8, CC2420_SECCTRL0_SEC_SAKEYSEL = 7, CC2420_SECCTRL0_SEC_TXKEYSEL = 6, CC2420_SECCTRL0_SEC_RXKEYSEL = 5, CC2420_SECCTRL0_SEC_M = 2, CC2420_SECCTRL0_SEC_MODE = 0, }; enum cc2420_secctrl1_enums { CC2420_SECCTRL1_SEC_TXL = 8, CC2420_SECCTRL1_SEC_RXL = 0, }; enum cc2420_battmon_enums { CC2420_BATTMON_BATT_OK = 6, CC2420_BATTMON_BATTMON_EN = 5, CC2420_BATTMON_BATTMON_VOLTAGE = 0, }; enum cc2420_iocfg0_enums { CC2420_IOCFG0_BCN_ACCEPT = 11, CC2420_IOCFG0_FIFO_POLARITY = 10, CC2420_IOCFG0_FIFOP_POLARITY = 9, CC2420_IOCFG0_SFD_POLARITY = 8, CC2420_IOCFG0_CCA_POLARITY = 7, CC2420_IOCFG0_FIFOP_THR = 0, }; enum cc2420_iocfg1_enums { CC2420_IOCFG1_HSSD_SRC = 10, CC2420_IOCFG1_SFDMUX = 5, CC2420_IOCFG1_CCAMUX = 0, }; enum cc2420_manfidl_enums { CC2420_MANFIDL_PARTNUM = 12, CC2420_MANFIDL_MANFID = 0, }; enum cc2420_manfidh_enums { CC2420_MANFIDH_VERSION = 12, CC2420_MANFIDH_PARTNUM = 0, }; enum cc2420_fsmtc_enums { CC2420_FSMTC_TC_RXCHAIN2RX = 13, CC2420_FSMTC_TC_SWITCH2TX = 10, CC2420_FSMTC_TC_PAON2TX = 6, CC2420_FSMTC_TC_TXEND2SWITCH = 3, CC2420_FSMTC_TC_TXEND2PAOFF = 0, }; enum cc2420_sfdmux_enums { CC2420_SFDMUX_SFD = 0, CC2420_SFDMUX_XOSC16M_STABLE = 24, }; enum cc2420_security_enums{ CC2420_NO_SEC = 0, CC2420_CBC_MAC = 1, CC2420_CTR = 2, CC2420_CCM = 3, NO_SEC = 0, CBC_MAC_4 = 1, CBC_MAC_8 = 2, CBC_MAC_16 = 3, CTR = 4, CCM_4 = 5, CCM_8 = 6, CCM_16 = 7 }; norace uint8_t SECURITYLOCK = 0; enum { CC2420_INVALID_TIMESTAMP = 0x80000000L, }; #endif tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420ActiveMessageC.nc000066400000000000000000000072571207233610700224670ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The Active Message layer for the CC2420 radio. This configuration * just layers the AM dispatch (CC2420ActiveMessageM) on top of the * underlying CC2420 radio packet (CC2420CsmaCsmaCC), which is * inherently an AM packet (acknowledgements based on AM destination * addr and group). Note that snooping may not work, due to CC2420 * early packet rejection if acknowledgements are enabled. * * @author Philip Levis * @author David Moss * @version $Revision: 1.16 $ $Date: 2010-06-29 22:07:44 $ */ #include "CC2420.h" #include "AM.h" #include "Ieee154.h" #ifdef IEEE154FRAMES_ENABLED #error "CC2420 AM layer cannot work when IEEE 802.15.4 frames only are used" #endif configuration CC2420ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Packet; interface CC2420Packet; interface PacketAcknowledgements; interface LinkPacketMetadata; interface RadioBackoff[am_id_t amId]; interface LowPowerListening; interface PacketLink; interface SendNotifier[am_id_t amId]; } } implementation { enum { CC2420_AM_SEND_ID = unique(RADIO_SEND_RESOURCE), }; components CC2420RadioC as Radio; components CC2420ActiveMessageP as AM; components ActiveMessageAddressC; components CC2420CsmaC as CsmaC; components CC2420ControlC; components CC2420PacketC; SplitControl = Radio; RadioBackoff = AM; Packet = AM; AMSend = AM; SendNotifier = AM; Receive = AM.Receive; Snoop = AM.Snoop; AMPacket = AM; PacketLink = Radio; LowPowerListening = Radio; CC2420Packet = Radio; PacketAcknowledgements = Radio; LinkPacketMetadata = Radio; // Radio resource for the AM layer AM.RadioResource -> Radio.Resource[CC2420_AM_SEND_ID]; AM.SubSend -> Radio.ActiveSend; AM.SubReceive -> Radio.ActiveReceive; AM.ActiveMessageAddress -> ActiveMessageAddressC; AM.CC2420Packet -> CC2420PacketC; AM.CC2420PacketBody -> CC2420PacketC; AM.CC2420Config -> CC2420ControlC; AM.SubBackoff -> CsmaC; components LedsC; AM.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420ActiveMessageP.nc000066400000000000000000000240111207233610700224670ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Active message implementation on top of the CC2420 radio. This * implementation uses the 16-bit addressing mode of 802.15.4: the * only additional byte it adds is the AM id byte, as the first byte * of the data payload. * * @author Philip Levis * @version $Revision: 1.22 $ $Date: 2010-06-29 22:07:44 $ */ #include #include "CC2420.h" module CC2420ActiveMessageP @safe() { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Packet; interface SendNotifier[am_id_t id]; interface RadioBackoff[am_id_t id]; } uses { interface Send as SubSend; interface Receive as SubReceive; interface CC2420Packet; interface CC2420PacketBody; interface CC2420Config; interface ActiveMessageAddress; interface RadioBackoff as SubBackoff; interface Resource as RadioResource; interface Leds; } } implementation { uint16_t pending_length; message_t * ONE_NOK pending_message = NULL; /***************** Resource event ****************/ event void RadioResource.granted() { uint8_t rc; cc2420_header_t* header = call CC2420PacketBody.getHeader( pending_message ); signal SendNotifier.aboutToSend[header->type](header->dest, pending_message); rc = call SubSend.send( pending_message, pending_length ); if (rc != SUCCESS) { call RadioResource.release(); signal AMSend.sendDone[header->type]( pending_message, rc ); } } /***************** AMSend Commands ****************/ command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { cc2420_header_t* header = call CC2420PacketBody.getHeader( msg ); if (len > call Packet.maxPayloadLength()) { return ESIZE; } header->type = id; header->dest = addr; header->destpan = call CC2420Config.getPanAddr(); header->src = call AMPacket.address(); header->fcf |= ( 1 << IEEE154_FCF_INTRAPAN ) | ( IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE ) | ( IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE ) ; header->length = len + CC2420_SIZE; if (call RadioResource.immediateRequest() == SUCCESS) { error_t rc; signal SendNotifier.aboutToSend[id](addr, msg); rc = call SubSend.send( msg, len ); if (rc != SUCCESS) { call RadioResource.release(); } return rc; } else { pending_length = len; pending_message = msg; return call RadioResource.request(); } } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } /***************** AMPacket Commands ****************/ command am_addr_t AMPacket.address() { return call ActiveMessageAddress.amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); return header->dest; } command am_addr_t AMPacket.source(message_t* amsg) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); return header->src; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); header->dest = addr; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t type) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); header->type = type; } command am_group_t AMPacket.group(message_t* amsg) { return (call CC2420PacketBody.getHeader(amsg))->destpan; } command void AMPacket.setGroup(message_t* amsg, am_group_t grp) { // Overridden intentionally when we send() (call CC2420PacketBody.getHeader(amsg))->destpan = grp; } command am_group_t AMPacket.localGroup() { return call CC2420Config.getPanAddr(); } /***************** Packet Commands ****************/ command void Packet.clear(message_t* msg) { memset(call CC2420PacketBody.getHeader(msg), 0x0, sizeof(cc2420_header_t)); memset(call CC2420PacketBody.getMetadata(msg), 0x0, sizeof(cc2420_metadata_t)); } command uint8_t Packet.payloadLength(message_t* msg) { return (call CC2420PacketBody.getHeader(msg))->length - CC2420_SIZE; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { (call CC2420PacketBody.getHeader(msg))->length = len + CC2420_SIZE; } command uint8_t Packet.maxPayloadLength() { return call SubSend.maxPayloadLength(); } command void* Packet.getPayload(message_t* msg, uint8_t len) { return call SubSend.getPayload(msg, len); } /***************** SubSend Events ****************/ event void SubSend.sendDone(message_t* msg, error_t result) { call RadioResource.release(); signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } /***************** SubReceive Events ****************/ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { if (call AMPacket.isForMe(msg)) { return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); } else { return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); } } /***************** ActiveMessageAddress Events ****************/ async event void ActiveMessageAddress.changed() { } /***************** CC2420Config Events ****************/ event void CC2420Config.syncDone( error_t error ) { } /***************** RadioBackoff ***********************/ async event void SubBackoff.requestInitialBackoff(message_t *msg) { signal RadioBackoff.requestInitialBackoff[(TCAST(cc2420_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg); } async event void SubBackoff.requestCongestionBackoff(message_t *msg) { signal RadioBackoff.requestCongestionBackoff[(TCAST(cc2420_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg); } async event void SubBackoff.requestCca(message_t *msg) { // Lower layers than this do not configure the CCA settings signal RadioBackoff.requestCca[(TCAST(cc2420_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg); } async command void RadioBackoff.setInitialBackoff[am_id_t amId](uint16_t backoffTime) { call SubBackoff.setInitialBackoff(backoffTime); } /** * Must be called within a requestCongestionBackoff event * @param backoffTime the amount of time in some unspecified units to backoff */ async command void RadioBackoff.setCongestionBackoff[am_id_t amId](uint16_t backoffTime) { call SubBackoff.setCongestionBackoff(backoffTime); } /** * Enable CCA for the outbound packet. Must be called within a requestCca * event * @param ccaOn TRUE to enable CCA, which is the default. */ async command void RadioBackoff.setCca[am_id_t amId](bool useCca) { call SubBackoff.setCca(useCca); } /***************** Defaults ****************/ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { call RadioResource.release(); } default event void SendNotifier.aboutToSend[am_id_t amId](am_addr_t addr, message_t *msg) { } default async event void RadioBackoff.requestInitialBackoff[am_id_t id]( message_t *msg) { } default async event void RadioBackoff.requestCongestionBackoff[am_id_t id]( message_t *msg) { } default async event void RadioBackoff.requestCca[am_id_t id]( message_t *msg) { } } tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420Ieee154MessageC.nc000066400000000000000000000114101207233610700223370ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* tab:4 * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * IEEE 802.15.4 layer for the cc2420. Provides a simplistic * link layer with dispatching on the 6lowpan "network" field * * @author Philip Levis * @author David Moss * @author Stephen Dawson-Haggerty * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:44 $ */ #include "CC2420.h" #ifdef TFRAMES_ENABLED #error "The CC2420 Ieee 802.15.4 layer does not work with TFRAMES" #endif configuration CC2420Ieee154MessageC { provides { interface SplitControl; interface Resource as SendResource[uint8_t clientId]; interface Ieee154Send; interface Receive as Ieee154Receive; interface Ieee154Packet; interface Packet; interface CC2420Packet; interface PacketAcknowledgements; interface LinkPacketMetadata; interface LowPowerListening; interface CC2420Config; interface PacketLink; } } implementation { components CC2420RadioC as Radio; components CC2420Ieee154MessageP as Msg; components CC2420PacketC; components CC2420ControlC; SendResource = Radio.Resource; Ieee154Receive = Msg; Ieee154Send = Msg; Ieee154Packet = Msg; Packet = Msg; CC2420Packet = CC2420PacketC; SplitControl = Radio; CC2420Packet = Radio; PacketAcknowledgements = Radio; LinkPacketMetadata = Radio; LowPowerListening = Radio; CC2420Config = CC2420ControlC; PacketLink = Radio; Msg.SubSend -> Radio.BareSend; Msg.SubReceive -> Radio.BareReceive; #ifdef CC2420_IEEE154_RESOURCE_SEND Msg.Resource -> Radio.Resource[unique(RADIO_SEND_RESOURCE)]; #endif Msg.CC2420Packet -> CC2420PacketC; Msg.CC2420PacketBody -> CC2420PacketC; Msg.CC2420Config -> CC2420ControlC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420Ieee154MessageP.nc000066400000000000000000000210231207233610700223550ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* tab:4 * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * @author Stephen Dawson-Haggerty * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:44 $ */ #include "CC2420.h" #include "IEEE802154.h" module CC2420Ieee154MessageP { provides { interface Ieee154Send; interface Receive as Ieee154Receive; interface Ieee154Packet; interface Packet; } uses { interface Send as SubSend; interface Receive as SubReceive; interface CC2420Packet; interface CC2420PacketBody; interface CC2420Config; #ifdef CC2420_IEEE154_RESOURCE_SEND interface Resource; #endif } } implementation { message_t *m_pending_msg; enum { EXTRA_OVERHEAD = sizeof(cc2420_header_t) - offsetof(cc2420_header_t, network), }; /***************** Ieee154Send Commands ****************/ command error_t Ieee154Send.send(ieee154_saddr_t addr, message_t* msg, uint8_t len) { cc2420_header_t* header = call CC2420PacketBody.getHeader( msg ); header->length = len + CC2420_SIZE - EXTRA_OVERHEAD; header->dest = addr; header->destpan = call CC2420Config.getPanAddr(); header->src = call CC2420Config.getShortAddr(); header->fcf = ( 1 << IEEE154_FCF_INTRAPAN ) | ( IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE ) | ( IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE ) ; #ifdef CC2420_IEEE154_RESOURCE_SEND if (call Resource.isOwner()) return EBUSY; if (call Resource.immediateRequest() == SUCCESS) { error_t rc; rc = call SubSend.send( msg, header->length - 1 ); if (rc != SUCCESS) { call Resource.release(); } return rc; } else { m_pending_msg = msg; return call Resource.request(); } #else return call SubSend.send( msg, header->length - 1 ); #endif } #ifdef CC2420_IEEE154_RESOURCE_SEND event void Resource.granted() { error_t rc; cc2420_header_t* header = call CC2420PacketBody.getHeader( m_pending_msg ); rc = call SubSend.send(m_pending_msg, header->length - 1); if (rc != SUCCESS) { call Resource.release(); signal Ieee154Send.sendDone(m_pending_msg, rc); } } #endif command error_t Ieee154Send.cancel(message_t* msg) { return call SubSend.cancel(msg); } command uint8_t Ieee154Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command void* Ieee154Send.getPayload(message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } event message_t *SubReceive.receive(message_t *msg, void *payload, uint8_t len) { return signal Ieee154Receive.receive(msg, call Packet.getPayload(msg, 0), call Packet.payloadLength(msg)); } /***************** Ieee154Packet Commands ****************/ command ieee154_saddr_t Ieee154Packet.address() { return call CC2420Config.getShortAddr(); } command ieee154_saddr_t Ieee154Packet.destination(message_t* msg) { cc2420_header_t* header = call CC2420PacketBody.getHeader(msg); return header->dest; } command ieee154_saddr_t Ieee154Packet.source(message_t* msg) { cc2420_header_t* header = call CC2420PacketBody.getHeader(msg); return header->src; } command void Ieee154Packet.setDestination(message_t* msg, ieee154_saddr_t addr) { cc2420_header_t* header = call CC2420PacketBody.getHeader(msg); header->dest = addr; } command void Ieee154Packet.setSource(message_t* msg, ieee154_saddr_t addr) { cc2420_header_t* header = call CC2420PacketBody.getHeader(msg); header->src = addr; } command bool Ieee154Packet.isForMe(message_t* msg) { return (call Ieee154Packet.destination(msg) == call Ieee154Packet.address() || call Ieee154Packet.destination(msg) == IEEE154_BROADCAST_ADDR); } command ieee154_panid_t Ieee154Packet.pan(message_t* msg) { return (call CC2420PacketBody.getHeader(msg))->destpan; } command void Ieee154Packet.setPan(message_t* msg, ieee154_panid_t grp) { // Overridden intentionally when we send() (call CC2420PacketBody.getHeader(msg))->destpan = grp; } command ieee154_panid_t Ieee154Packet.localPan() { return call CC2420Config.getPanAddr(); } /***************** Packet Commands ****************/ command void Packet.clear(message_t* msg) { memset(call CC2420PacketBody.getHeader(msg), sizeof(cc2420_header_t) - EXTRA_OVERHEAD, 0); memset(call CC2420PacketBody.getMetadata(msg), sizeof(cc2420_metadata_t), 0); } command uint8_t Packet.payloadLength(message_t* msg) { return (call CC2420PacketBody.getHeader(msg))->length - CC2420_SIZE + EXTRA_OVERHEAD; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { (call CC2420PacketBody.getHeader(msg))->length = len + CC2420_SIZE - EXTRA_OVERHEAD; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH + EXTRA_OVERHEAD; } command void* Packet.getPayload(message_t* msg, uint8_t len) { return msg->data - EXTRA_OVERHEAD; } /***************** SubSend Events ****************/ event void SubSend.sendDone(message_t* msg, error_t result) { #ifdef CC2420_IEEE154_RESOURCE_SEND call Resource.release(); #endif signal Ieee154Send.sendDone(msg, result); } /***************** CC2420Config Events ****************/ event void CC2420Config.syncDone( error_t error ) { } default event void Ieee154Send.sendDone(message_t *msg, error_t e) { } } tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420RadioC.nc000066400000000000000000000063311207233610700207750ustar00rootroot00000000000000/* * "Copyright (c) 2005 Stanford University. All rights reserved. * * Permission to use, copy, modify, and distribute this software and * its documentation for any purpose, without fee, and without written * agreement is hereby granted, provided that the above copyright * notice, the following two paragraphs and the author appear in all * copies of this software. * * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. * * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, * ENHANCEMENTS, OR MODIFICATIONS." */ /** * Radio wiring for the CC2420. This layer seperates the common * wiring of the lower-layer components of the CC2420 stack and makes * them available to clients like the AM stack and the IEEE802.15.4 * stack. * * This component provides the highest-level internal interface to * other components of the CC2420 stack. * * @author Philip Levis * @author David Moss * @author Stephen Dawson-Haggerty * @version $Revision: 1.2 $ $Date: 2009/08/20 01:37:44 $ */ #include "CC2420.h" configuration CC2420RadioC { provides { interface SplitControl; interface Resource[uint8_t clientId]; interface Send as BareSend; interface Receive as BareReceive; interface Packet as BarePacket; interface Send as ActiveSend; interface Receive as ActiveReceive; interface CC2420Packet; interface PacketAcknowledgements; interface LinkPacketMetadata; interface LowPowerListening; interface PacketLink; } } implementation { components CC2420CsmaC as CsmaC; components UniqueSendC; components UniqueReceiveC; components CC2420TinyosNetworkC; components CC2420PacketC; components CC2420ControlC; #if defined(LOW_POWER_LISTENING) || defined(ACK_LOW_POWER_LISTENING) components DefaultLplC as LplC; #else components DummyLplC as LplC; #endif #if defined(PACKET_LINK) components PacketLinkC as LinkC; #else components PacketLinkDummyC as LinkC; #endif PacketLink = LinkC; LowPowerListening = LplC; CC2420Packet = CC2420PacketC; PacketAcknowledgements = CC2420PacketC; LinkPacketMetadata = CC2420PacketC; Resource = CC2420TinyosNetworkC; BareSend = CC2420TinyosNetworkC.Send; BareReceive = CC2420TinyosNetworkC.Receive; BarePacket = CC2420TinyosNetworkC.BarePacket; ActiveSend = CC2420TinyosNetworkC.ActiveSend; ActiveReceive = CC2420TinyosNetworkC.ActiveReceive; // SplitControl Layers SplitControl = LplC; LplC.SubControl -> CsmaC; // Send Layers CC2420TinyosNetworkC.SubSend -> UniqueSendC; UniqueSendC.SubSend -> LinkC; LinkC.SubSend -> LplC.Send; LplC.SubSend -> CsmaC; // Receive Layers CC2420TinyosNetworkC.SubReceive -> LplC; LplC.SubReceive -> UniqueReceiveC.Receive; UniqueReceiveC.SubReceive -> CsmaC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420TimeSyncMessage.h000066400000000000000000000036371207233610700225310ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __TIMESYNCMESSAGE_H__ #define __TIMESYNCMESSAGE_H__ #ifndef AM_TIMESYNCMSG #define AM_TIMESYNCMSG 0x3D #endif // this value is sent in the air typedef nx_uint32_t timesync_radio_t; typedef nx_struct timesync_footer_t { nx_am_id_t type; timesync_radio_t timestamp; } timesync_footer_t; #endif//__TIMESYNCMESSAGE_H__ tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420TimeSyncMessageC.nc000066400000000000000000000103121207233610700227710ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The Active Message layer for the CC2420 radio with timesync support. This * configuration is just layer above CC2420ActiveMessageC that supports * TimeSyncPacket and TimeSyncAMSend interfaces (TEP 133) * * @author: Miklos Maroti * @author: Brano Kusy (CC2420 port) */ #include #include #include "CC2420TimeSyncMessage.h" configuration CC2420TimeSyncMessageC { provides { interface SplitControl; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components CC2420TimeSyncMessageP, CC2420ActiveMessageC, CC2420PacketC, LedsC; TimeSyncAMSend32khz = CC2420TimeSyncMessageP; TimeSyncPacket32khz = CC2420TimeSyncMessageP; TimeSyncAMSendMilli = CC2420TimeSyncMessageP; TimeSyncPacketMilli = CC2420TimeSyncMessageP; Packet = CC2420TimeSyncMessageP; // use the AMSenderC infrastructure to avoid concurrent send clashes components new AMSenderC(AM_TIMESYNCMSG); CC2420TimeSyncMessageP.SubSend -> AMSenderC; CC2420TimeSyncMessageP.SubAMPacket -> AMSenderC; CC2420TimeSyncMessageP.SubPacket -> AMSenderC; CC2420TimeSyncMessageP.PacketTimeStamp32khz -> CC2420PacketC; CC2420TimeSyncMessageP.PacketTimeStampMilli -> CC2420PacketC; CC2420TimeSyncMessageP.PacketTimeSyncOffset -> CC2420PacketC; components Counter32khz32C, new CounterToLocalTimeC(T32khz) as LocalTime32khzC, LocalTimeMilliC; LocalTime32khzC.Counter -> Counter32khz32C; CC2420TimeSyncMessageP.LocalTime32khz -> LocalTime32khzC; CC2420TimeSyncMessageP.LocalTimeMilli -> LocalTimeMilliC; CC2420TimeSyncMessageP.Leds -> LedsC; components ActiveMessageC; SplitControl = CC2420ActiveMessageC; PacketAcknowledgements = CC2420ActiveMessageC; LowPowerListening = CC2420ActiveMessageC; Receive = CC2420TimeSyncMessageP.Receive; Snoop = CC2420TimeSyncMessageP.Snoop; AMPacket = CC2420TimeSyncMessageP; CC2420TimeSyncMessageP.SubReceive -> ActiveMessageC.Receive[AM_TIMESYNCMSG]; CC2420TimeSyncMessageP.SubSnoop -> ActiveMessageC.Snoop[AM_TIMESYNCMSG]; } tinyos-2.1.2+dfsg/tos/chips/cc2420/CC2420TimeSyncMessageP.nc000066400000000000000000000220121207233610700230060ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti * @author: Brano Kusy (CC2420 port) */ #include "CC2420TimeSyncMessage.h" module CC2420TimeSyncMessageP { provides { interface TimeSyncAMSend as TimeSyncAMSend32khz[uint8_t id]; interface TimeSyncAMSend as TimeSyncAMSendMilli[uint8_t id]; interface Packet; interface AMPacket; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncPacket as TimeSyncPacketMilli; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; } uses { interface AMSend as SubSend; interface Packet as SubPacket; interface AMPacket as SubAMPacket; interface Receive as SubReceive; interface Receive as SubSnoop; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeSyncOffset; interface LocalTime as LocalTime32khz; interface LocalTime as LocalTimeMilli; interface Leds; } } implementation { // TODO: change the Packet.payloadLength and Packet.maxPayloadLength commands to async inline timesync_footer_t* getFooter(message_t* msg) { // we use the payload length that we export (the smaller one) return (timesync_footer_t*)(msg->data + call Packet.payloadLength(msg)); } /*----------------- Packet -----------------*/ command void Packet.clear(message_t* msg) { call PacketTimeSyncOffset.cancel(msg); call SubPacket.clear(msg); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg, len + sizeof(timesync_footer_t)); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(timesync_footer_t); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(timesync_footer_t); } command void* Packet.getPayload(message_t* msg, uint8_t len) { return call SubPacket.getPayload(msg, len + sizeof(timesync_footer_t)); } /*----------------- AMPacket -----------------*/ inline command am_addr_t AMPacket.address() { return call SubAMPacket.address(); } inline command am_group_t AMPacket.localGroup() { return call SubAMPacket.localGroup(); } inline command bool AMPacket.isForMe(message_t* msg) { return call SubAMPacket.isForMe(msg) && call SubAMPacket.type(msg) == AM_TIMESYNCMSG; } inline command am_addr_t AMPacket.destination(message_t* msg) { return call SubAMPacket.destination(msg); } inline command void AMPacket.setDestination(message_t* msg, am_addr_t addr) { call SubAMPacket.setDestination(msg, addr); } inline command am_addr_t AMPacket.source(message_t* msg) { return call SubAMPacket.source(msg); } inline command void AMPacket.setSource(message_t* msg, am_addr_t addr) { call SubAMPacket.setSource(msg, addr); } inline command am_id_t AMPacket.type(message_t* msg) { return getFooter(msg)->type; } inline command void AMPacket.setType(message_t* msg, am_id_t type) { getFooter(msg)->type = type; } inline command am_group_t AMPacket.group(message_t* msg) { return call SubAMPacket.group(msg); } inline command void AMPacket.setGroup(message_t* msg, am_group_t grp) { call SubAMPacket.setGroup(msg, grp); } /*----------------- TimeSyncAMSend32khz -----------------*/ command error_t TimeSyncAMSend32khz.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time) { error_t err; timesync_footer_t* footer = (timesync_footer_t*)(msg->data + len); footer->type = id; footer->timestamp = event_time; err = call SubSend.send(addr, msg, len + sizeof(timesync_footer_t)); call PacketTimeSyncOffset.set(msg); return err; } command error_t TimeSyncAMSend32khz.cancel[am_id_t id](message_t* msg) { call PacketTimeSyncOffset.cancel(msg); return call SubSend.cancel(msg); } default event void TimeSyncAMSend32khz.sendDone[am_id_t id](message_t* msg, error_t error) {} command uint8_t TimeSyncAMSend32khz.maxPayloadLength[am_id_t id]() { return call SubSend.maxPayloadLength() - sizeof(timesync_footer_t); } command void* TimeSyncAMSend32khz.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call SubSend.getPayload(msg, len + sizeof(timesync_footer_t)); } /*----------------- TimeSyncAMSendMilli -----------------*/ command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time) { // compute elapsed time in millisecond event_time = ((event_time - call LocalTimeMilli.get()) << 5) + call LocalTime32khz.get(); return call TimeSyncAMSend32khz.send[id](addr, msg, len, event_time); } command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg) { return call TimeSyncAMSend32khz.cancel[id](msg); } default event void TimeSyncAMSendMilli.sendDone[am_id_t id](message_t* msg, error_t error){} command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]() { return call TimeSyncAMSend32khz.maxPayloadLength[id](); } command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call TimeSyncAMSend32khz.getPayload[id](msg, len); } /*----------------- SubReceive -------------------*/ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { am_id_t id = call AMPacket.type(msg); return signal Receive.receive[id](msg, payload, len - sizeof(timesync_footer_t)); } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } /*----------------- SubSnoop -------------------*/ event message_t* SubSnoop.receive(message_t* msg, void* payload, uint8_t len) { am_id_t id = call AMPacket.type(msg); return signal Snoop.receive[id](msg, payload, len - sizeof(timesync_footer_t)); } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } /*----------------- SubSend.sendDone -------------------*/ event void SubSend.sendDone(message_t* msg, error_t error) { am_id_t id = call AMPacket.type(msg); signal TimeSyncAMSend32khz.sendDone[id](msg, error); signal TimeSyncAMSendMilli.sendDone[id](msg, error); } /*----------------- TimeSyncPacket32khz -----------------*/ command bool TimeSyncPacket32khz.isValid(message_t* msg) { return call PacketTimeStamp32khz.isValid(msg) && getFooter(msg)->timestamp != CC2420_INVALID_TIMESTAMP; } command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg) { return (uint32_t)(getFooter(msg)->timestamp) + call PacketTimeStamp32khz.timestamp(msg); } /*----------------- TimeSyncPacketMilli -----------------*/ command bool TimeSyncPacketMilli.isValid(message_t* msg) { return call PacketTimeStampMilli.isValid(msg) && getFooter(msg)->timestamp != CC2420_INVALID_TIMESTAMP; } command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg) { return ((int32_t)(getFooter(msg)->timestamp) >> 5) + call PacketTimeStampMilli.timestamp(msg); } } tinyos-2.1.2+dfsg/tos/chips/cc2420/IEEE802154.h000066400000000000000000000033671207233610700201460ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * * @author Jonathan Hui * @version $Revision: 1.7 $ $Date: 2007-07-04 00:37:14 $ */ #ifndef __IEEE802154_H__ #define __IEEE802154_H__ #include #endif tinyos-2.1.2+dfsg/tos/chips/cc2420/README.txt000066400000000000000000000110071207233610700202660ustar00rootroot00000000000000 To compile in the default Ack LPL version, #define the preprocessor variable: LOW_POWER_LISTENING To compile in the PacketLink (auto-retransmission) layer, #define: PACKET_LINK To remove all acknowledgements, #define (or use CC2420Config in 2.0.2) CC2420_NO_ACKNOWLEDGEMENTS To use hardware auto-acks instead of software acks, #define: CC2420_HW_ACKNOWLEDGEMENTS To stop using address recognition on the radio hardware, #define: CC2420_NO_ADDRESS_RECOGNITION ============================================================ CC2420 2.0.2 Release Notes 7/2/07 Updates (Moss) __________________________________________ * New chip SPI bus arbitration working with Receive and Transmit. * Applied TUnit automated unit testing to CC2420 development > Caught lots of bugs, especially through regression testing > Source code in tinyos-2.x-contribs/tunit/ * Applied TEP115 behavior to CC2420 SplitControl in Csma and Lpl * Updated ActiveMessageAddressC to provide the ActiveMessageAddress interface > Updated CC2420ConfigP to handle ActiveMessageAddress.addressChanged() and sync automatically upon address change events. * Updated CC2420Config interface to enable/disable sw/hw acknowledgements * Updated CC2420ConfigP to share register editing through single functions * Acknowledge after packet length and FCF check out valid. > The destination address is confirmed in hardware, so we don't need to download the entire header before acking. * Moved the getHeader() and getMetadata() commands to an internal interface called CC2420PacketBody, provided by CC2420PacketC * Separated core functionality into different sub-packages/directories > Updated micaz, telosb, intelmote2 .platform files > Logically organizes code * Updated some LPL architecture > Removed continuous modulation because it didn't work 100% and I don't have time to make it work. > Decreased backoffs and decreased on-time for detects, saving energy. * Updated to the new AMPacket interface; made the radio set the outbound packet's destpan after send(). 7/5/07: * Added two methods to enable/disable automatic address recognition: - Preprocessor CC2420_NO_ADDRESS_RECOGNITION to disable address recognition at compile time - CC2420Config.setAddressRecognition(bool on) through CC2420ControlC * Allowed the CC2420ReceiveP to perform software address checks to support the case where a base station type application must sniff packets from other address, but also SACK packets destined for its address * Updated CC2420Config interface to provide an async getShortAddr() and getPanAddr() Known issues __________________________________________ ============================================================ CC2420 Release Notes 4/11/07 This CC2420 stack contains two low power listening strategies, a packet retransmission layer, unique send and receive layers, ability to specify backoff and use of clear channel assessments on outbound messages, direct RSSI readings, ability to change channels on the fly, an experimental 6LowPAN layer (not implemented by default), general bug fixes, and more. Known Issues __________________________________________ > LPL Lockups when the node is also accessing the USART. This is a SPI bus issue, where shutting off the SPI bus in the middle of an operation may cause the node to hang. Look to future versions on CVS for the fix. > NoAck LPL doesn't ack at the end properly, and also isn't finished being implemented. The CRC of the packet needs to manually be loaded into TXFIFO before continuous modulation. > LPL stack is optimized for reliability at this point, since SFD sampling is not implemented in this version. Low Power Listening Schemes and Preprocessor Variables __________________________________________ There are two low power listening schemes. The default is called "AckLpl", because it inserts acknowledgement gaps andshort backoffs during the packet retransmission process. This allows the transmitter to stop transmitting early, but increases the power consumption per receive check. This is better for slow receive check, high transmission rate networks. The second is called "NoAckLpl", because it does not insert acknowledgement gaps or backoffs in the retransmission process, so the receive checks are shorter but the transmissions are longer. This is more experimental than the Ack LPL version. The radio continuously modulates the channel when delivering its packetized preamble. This is better for fast receive check, low transmission rate networks. tinyos-2.1.2+dfsg/tos/chips/cc2420/alarm/000077500000000000000000000000001207233610700176655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/alarm/AlarmMultiplexC.nc000066400000000000000000000041151207233610700232530ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * A component that multiplexes the use of an alarm. The assumption is * that its use is mutually exclusive and users check whether the * events are for them. * * @author Jonathan Hui * @version $Revision: 1.1 $ $Date: 2007-07-04 00:37:14 $ */ #include configuration AlarmMultiplexC { provides interface Init; provides interface Alarm as Alarm32khz32; } implementation { components new HplCC2420AlarmC() as Alarm; Init = Alarm; Alarm32khz32 = Alarm; } tinyos-2.1.2+dfsg/tos/chips/cc2420/control/000077500000000000000000000000001207233610700202515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/control/CC2420ControlC.nc000066400000000000000000000067671207233610700230540ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation for configuring a ChipCon CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.3 $ $Date: 2008/05/14 21:33:07 $ */ #include "CC2420.h" #include "IEEE802154.h" configuration CC2420ControlC { provides interface Resource; provides interface CC2420Config; provides interface CC2420Power; provides interface Read as ReadRssi; } implementation { components CC2420ControlP; Resource = CC2420ControlP; CC2420Config = CC2420ControlP; CC2420Power = CC2420ControlP; ReadRssi = CC2420ControlP; components MainC; MainC.SoftwareInit -> CC2420ControlP; components AlarmMultiplexC as Alarm; CC2420ControlP.StartupTimer -> Alarm; components HplCC2420PinsC as Pins; CC2420ControlP.CSN -> Pins.CSN; CC2420ControlP.RSTN -> Pins.RSTN; CC2420ControlP.VREN -> Pins.VREN; components HplCC2420InterruptsC as Interrupts; CC2420ControlP.InterruptCCA -> Interrupts.InterruptCCA; components new CC2420SpiC() as Spi; CC2420ControlP.SpiResource -> Spi; CC2420ControlP.SRXON -> Spi.SRXON; CC2420ControlP.SRFOFF -> Spi.SRFOFF; CC2420ControlP.SXOSCON -> Spi.SXOSCON; CC2420ControlP.SXOSCOFF -> Spi.SXOSCOFF; CC2420ControlP.FSCTRL -> Spi.FSCTRL; CC2420ControlP.IOCFG0 -> Spi.IOCFG0; CC2420ControlP.IOCFG1 -> Spi.IOCFG1; CC2420ControlP.MDMCTRL0 -> Spi.MDMCTRL0; CC2420ControlP.MDMCTRL1 -> Spi.MDMCTRL1; CC2420ControlP.PANID -> Spi.PANID; CC2420ControlP.IEEEADR -> Spi.IEEEADR; CC2420ControlP.RXCTRL1 -> Spi.RXCTRL1; CC2420ControlP.RSSI -> Spi.RSSI; CC2420ControlP.TXCTRL -> Spi.TXCTRL; components new CC2420SpiC() as SyncSpiC; CC2420ControlP.SyncResource -> SyncSpiC; components new CC2420SpiC() as RssiResource; CC2420ControlP.RssiResource -> RssiResource; components ActiveMessageAddressC; CC2420ControlP.ActiveMessageAddress -> ActiveMessageAddressC; components LocalIeeeEui64C; CC2420ControlP.LocalIeeeEui64 -> LocalIeeeEui64C; } tinyos-2.1.2+dfsg/tos/chips/cc2420/control/CC2420ControlP.nc000066400000000000000000000351121207233610700230530ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Urs Hunkeler (ReadRssi implementation) * @version $Revision: 1.7 $ $Date: 2008/06/24 04:07:28 $ */ #include #include "Timer.h" module CC2420ControlP @safe() { provides interface Init; provides interface Resource; provides interface CC2420Config; provides interface CC2420Power; provides interface Read as ReadRssi; uses interface LocalIeeeEui64; uses interface Alarm as StartupTimer; uses interface GeneralIO as CSN; uses interface GeneralIO as RSTN; uses interface GeneralIO as VREN; uses interface GpioInterrupt as InterruptCCA; uses interface ActiveMessageAddress; uses interface CC2420Ram as IEEEADR; uses interface CC2420Ram as PANID; uses interface CC2420Register as FSCTRL; uses interface CC2420Register as IOCFG0; uses interface CC2420Register as IOCFG1; uses interface CC2420Register as MDMCTRL0; uses interface CC2420Register as MDMCTRL1; uses interface CC2420Register as RXCTRL1; uses interface CC2420Register as RSSI; uses interface CC2420Register as TXCTRL; uses interface CC2420Strobe as SRXON; uses interface CC2420Strobe as SRFOFF; uses interface CC2420Strobe as SXOSCOFF; uses interface CC2420Strobe as SXOSCON; uses interface Resource as SpiResource; uses interface Resource as RssiResource; uses interface Resource as SyncResource; uses interface Leds; } implementation { typedef enum { S_VREG_STOPPED, S_VREG_STARTING, S_VREG_STARTED, S_XOSC_STARTING, S_XOSC_STARTED, } cc2420_control_state_t; uint8_t m_channel; uint8_t m_tx_power; uint16_t m_pan; uint16_t m_short_addr; ieee_eui64_t m_ext_addr; bool m_sync_busy; /** TRUE if acknowledgments are enabled */ bool autoAckEnabled; /** TRUE if acknowledgments are generated in hardware only */ bool hwAutoAckDefault; /** TRUE if software or hardware address recognition is enabled */ bool addressRecognition; /** TRUE if address recognition should also be performed in hardware */ bool hwAddressRecognition; norace cc2420_control_state_t m_state = S_VREG_STOPPED; /***************** Prototypes ****************/ void writeFsctrl(); void writeMdmctrl0(); void writeId(); void writeTxctrl(); task void sync(); task void syncDone(); /***************** Init Commands ****************/ command error_t Init.init() { int i, t; call CSN.makeOutput(); call RSTN.makeOutput(); call VREN.makeOutput(); m_short_addr = call ActiveMessageAddress.amAddress(); m_ext_addr = call LocalIeeeEui64.getId(); m_pan = call ActiveMessageAddress.amGroup(); m_tx_power = CC2420_DEF_RFPOWER; m_channel = CC2420_DEF_CHANNEL; m_ext_addr = call LocalIeeeEui64.getId(); for (i = 0; i < 4; i++) { t = m_ext_addr.data[i]; m_ext_addr.data[i] = m_ext_addr.data[7-i]; m_ext_addr.data[7-i] = t; } #if defined(CC2420_NO_ADDRESS_RECOGNITION) addressRecognition = FALSE; #else addressRecognition = TRUE; #endif #if defined(CC2420_HW_ADDRESS_RECOGNITION) hwAddressRecognition = TRUE; #else hwAddressRecognition = FALSE; #endif #if defined(CC2420_NO_ACKNOWLEDGEMENTS) autoAckEnabled = FALSE; #else autoAckEnabled = TRUE; #endif #if defined(CC2420_HW_ACKNOWLEDGEMENTS) hwAutoAckDefault = TRUE; hwAddressRecognition = TRUE; #else hwAutoAckDefault = FALSE; #endif return SUCCESS; } /***************** Resource Commands ****************/ async command error_t Resource.immediateRequest() { error_t error = call SpiResource.immediateRequest(); if ( error == SUCCESS ) { call CSN.clr(); } return error; } async command error_t Resource.request() { return call SpiResource.request(); } async command bool Resource.isOwner() { return call SpiResource.isOwner(); } async command error_t Resource.release() { atomic { call CSN.set(); return call SpiResource.release(); } } /***************** CC2420Power Commands ****************/ async command error_t CC2420Power.startVReg() { atomic { if ( m_state != S_VREG_STOPPED ) { return FAIL; } m_state = S_VREG_STARTING; } call VREN.set(); call StartupTimer.start( CC2420_TIME_VREN ); return SUCCESS; } async command error_t CC2420Power.stopVReg() { m_state = S_VREG_STOPPED; call RSTN.clr(); call VREN.clr(); call RSTN.set(); return SUCCESS; } async command error_t CC2420Power.startOscillator() { atomic { if ( m_state != S_VREG_STARTED ) { return FAIL; } m_state = S_XOSC_STARTING; call IOCFG1.write( CC2420_SFDMUX_XOSC16M_STABLE << CC2420_IOCFG1_CCAMUX ); call InterruptCCA.enableRisingEdge(); call SXOSCON.strobe(); call IOCFG0.write( ( 1 << CC2420_IOCFG0_FIFOP_POLARITY ) | ( 127 << CC2420_IOCFG0_FIFOP_THR ) ); writeFsctrl(); writeMdmctrl0(); call RXCTRL1.write( ( 1 << CC2420_RXCTRL1_RXBPF_LOCUR ) | ( 1 << CC2420_RXCTRL1_LOW_LOWGAIN ) | ( 1 << CC2420_RXCTRL1_HIGH_HGM ) | ( 1 << CC2420_RXCTRL1_LNA_CAP_ARRAY ) | ( 1 << CC2420_RXCTRL1_RXMIX_TAIL ) | ( 1 << CC2420_RXCTRL1_RXMIX_VCM ) | ( 2 << CC2420_RXCTRL1_RXMIX_CURRENT ) ); writeTxctrl(); } return SUCCESS; } async command error_t CC2420Power.stopOscillator() { atomic { if ( m_state != S_XOSC_STARTED ) { return FAIL; } m_state = S_VREG_STARTED; call SXOSCOFF.strobe(); } return SUCCESS; } async command error_t CC2420Power.rxOn() { atomic { if ( m_state != S_XOSC_STARTED ) { return FAIL; } call SRXON.strobe(); } return SUCCESS; } async command error_t CC2420Power.rfOff() { atomic { if ( m_state != S_XOSC_STARTED ) { return FAIL; } call SRFOFF.strobe(); } return SUCCESS; } /***************** CC2420Config Commands ****************/ command uint8_t CC2420Config.getChannel() { atomic return m_channel; } command void CC2420Config.setChannel( uint8_t channel ) { atomic m_channel = channel; } command ieee_eui64_t CC2420Config.getExtAddr() { return m_ext_addr; } async command uint16_t CC2420Config.getShortAddr() { atomic return m_short_addr; } command void CC2420Config.setShortAddr( uint16_t addr ) { atomic m_short_addr = addr; } async command uint16_t CC2420Config.getPanAddr() { atomic return m_pan; } command void CC2420Config.setPanAddr( uint16_t pan ) { atomic m_pan = pan; } /** * Sync must be called to commit software parameters configured on * the microcontroller (through the CC2420Config interface) to the * CC2420 radio chip. */ command error_t CC2420Config.sync() { atomic { if ( m_sync_busy ) { return FAIL; } m_sync_busy = TRUE; if ( m_state == S_XOSC_STARTED ) { call SyncResource.request(); } else { post syncDone(); } } return SUCCESS; } /** * @param enableAddressRecognition TRUE to turn address recognition on * @param useHwAddressRecognition TRUE to perform address recognition first * in hardware. This doesn't affect software address recognition. The * driver must sync with the chip after changing this value. */ command void CC2420Config.setAddressRecognition(bool enableAddressRecognition, bool useHwAddressRecognition) { atomic { addressRecognition = enableAddressRecognition; hwAddressRecognition = useHwAddressRecognition; } } /** * @return TRUE if address recognition is enabled */ async command bool CC2420Config.isAddressRecognitionEnabled() { atomic return addressRecognition; } /** * @return TRUE if address recognition is performed first in hardware. */ async command bool CC2420Config.isHwAddressRecognitionDefault() { atomic return hwAddressRecognition; } /** * Sync must be called for acknowledgement changes to take effect * @param enableAutoAck TRUE to enable auto acknowledgements * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to * default to software auto acknowledgements */ command void CC2420Config.setAutoAck(bool enableAutoAck, bool hwAutoAck) { atomic autoAckEnabled = enableAutoAck; atomic hwAutoAckDefault = hwAutoAck; } /** * @return TRUE if hardware auto acks are the default, FALSE if software * acks are the default */ async command bool CC2420Config.isHwAutoAckDefault() { atomic return hwAutoAckDefault; } /** * @return TRUE if auto acks are enabled */ async command bool CC2420Config.isAutoAckEnabled() { atomic return autoAckEnabled; } /***************** ReadRssi Commands ****************/ command error_t ReadRssi.read() { return call RssiResource.request(); } /***************** Spi Resources Events ****************/ event void SyncResource.granted() { call CSN.clr(); call SRFOFF.strobe(); writeFsctrl(); writeMdmctrl0(); writeId(); call CSN.set(); call CSN.clr(); call SRXON.strobe(); call CSN.set(); call SyncResource.release(); post syncDone(); } event void SpiResource.granted() { call CSN.clr(); signal Resource.granted(); } event void RssiResource.granted() { uint16_t data = 0; call CSN.clr(); call RSSI.read(&data); call CSN.set(); call RssiResource.release(); data += 0x7f; data &= 0x00ff; signal ReadRssi.readDone(SUCCESS, data); } /***************** StartupTimer Events ****************/ async event void StartupTimer.fired() { if ( m_state == S_VREG_STARTING ) { m_state = S_VREG_STARTED; call RSTN.clr(); call RSTN.set(); signal CC2420Power.startVRegDone(); } } /***************** InterruptCCA Events ****************/ async event void InterruptCCA.fired() { m_state = S_XOSC_STARTED; call InterruptCCA.disable(); call IOCFG1.write( 0 ); writeId(); call CSN.set(); call CSN.clr(); signal CC2420Power.startOscillatorDone(); } /***************** ActiveMessageAddress Events ****************/ async event void ActiveMessageAddress.changed() { atomic { m_short_addr = call ActiveMessageAddress.amAddress(); m_pan = call ActiveMessageAddress.amGroup(); } post sync(); } /***************** Tasks ****************/ /** * Attempt to synchronize our current settings with the CC2420 */ task void sync() { call CC2420Config.sync(); } task void syncDone() { atomic m_sync_busy = FALSE; signal CC2420Config.syncDone( SUCCESS ); } /***************** Functions ****************/ /** * Write teh FSCTRL register */ void writeFsctrl() { uint8_t channel; atomic { channel = m_channel; } call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) | ( ( (channel - 11)*5+357 ) << CC2420_FSCTRL_FREQ ) ); } /** * Write the MDMCTRL0 register * Disabling hardware address recognition improves acknowledgment success * rate and low power communications reliability by causing the local node * to do work while the real destination node of the packet is acknowledging. */ void writeMdmctrl0() { atomic { call MDMCTRL0.write( ( 1 << CC2420_MDMCTRL0_RESERVED_FRAME_MODE ) | ( ((addressRecognition && hwAddressRecognition) ? 1 : 0) << CC2420_MDMCTRL0_ADR_DECODE ) | ( 2 << CC2420_MDMCTRL0_CCA_HYST ) | ( 3 << CC2420_MDMCTRL0_CCA_MOD ) | ( 1 << CC2420_MDMCTRL0_AUTOCRC ) | ( (autoAckEnabled && hwAutoAckDefault) << CC2420_MDMCTRL0_AUTOACK ) | ( 0 << CC2420_MDMCTRL0_AUTOACK ) | ( 2 << CC2420_MDMCTRL0_PREAMBLE_LENGTH ) ); } // Jon Green: // MDMCTRL1.CORR_THR is defaulted to 20 instead of 0 like the datasheet says // If we add in changes to MDMCTRL1, be sure to include this fix. } /** * Write the PANID register */ void writeId() { nxle_uint16_t id[ 6 ]; atomic { /* Eui-64 is stored in big endian */ memcpy((uint8_t *)id, m_ext_addr.data, 8); id[ 4 ] = m_pan; id[ 5 ] = m_short_addr; } call IEEEADR.write(0, (uint8_t *)&id, 12); } /* Write the Transmit control register. This is needed so acknowledgments are sent at the correct transmit power even if a node has not sent a packet (Google Code Issue #27) -pal */ void writeTxctrl() { atomic { call TXCTRL.write( ( 2 << CC2420_TXCTRL_TXMIXBUF_CUR ) | ( 3 << CC2420_TXCTRL_PA_CURRENT ) | ( 1 << CC2420_TXCTRL_RESERVED ) | ( (CC2420_DEF_RFPOWER & 0x1F) << CC2420_TXCTRL_PA_LEVEL ) ); } } /***************** Defaults ****************/ default event void CC2420Config.syncDone( error_t error ) { } default event void ReadRssi.readDone(error_t error, uint16_t data) { } } tinyos-2.1.2+dfsg/tos/chips/cc2420/csma/000077500000000000000000000000001207233610700175145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/csma/CC2420CsmaC.nc000066400000000000000000000052671207233610700215540ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Basic implementation of a CSMA MAC for the ChipCon CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.2 $ $Date: 2008-05-14 21:33:07 $ */ #include "CC2420.h" #include "IEEE802154.h" configuration CC2420CsmaC { provides interface SplitControl; provides interface Send; provides interface Receive; provides interface RadioBackoff; } implementation { components CC2420CsmaP as CsmaP; RadioBackoff = CsmaP; SplitControl = CsmaP; Send = CsmaP; components CC2420ControlC; CsmaP.Resource -> CC2420ControlC; CsmaP.CC2420Power -> CC2420ControlC; components CC2420TransmitC; CsmaP.SubControl -> CC2420TransmitC; CsmaP.CC2420Transmit -> CC2420TransmitC; CsmaP.SubBackoff -> CC2420TransmitC; components CC2420ReceiveC; Receive = CC2420ReceiveC; CsmaP.SubControl -> CC2420ReceiveC; components CC2420PacketC; CsmaP.CC2420Packet -> CC2420PacketC; CsmaP.CC2420PacketBody -> CC2420PacketC; components RandomC; CsmaP.Random -> RandomC; components new StateC(); CsmaP.SplitControlState -> StateC; components LedsC as Leds; CsmaP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/cc2420/csma/CC2420CsmaP.nc000066400000000000000000000211211207233610700215540ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.12 $ $Date: 2009/09/17 23:36:36 $ */ module CC2420CsmaP @safe() { provides interface SplitControl; provides interface Send; provides interface RadioBackoff; uses interface Resource; uses interface CC2420Power; uses interface StdControl as SubControl; uses interface CC2420Transmit; uses interface RadioBackoff as SubBackoff; uses interface Random; uses interface Leds; uses interface CC2420Packet; uses interface CC2420PacketBody; uses interface State as SplitControlState; } implementation { enum { S_STOPPED, S_STARTING, S_STARTED, S_STOPPING, S_TRANSMITTING, }; message_t* ONE_NOK m_msg; error_t sendErr = SUCCESS; /** TRUE if we are to use CCA when sending the current packet */ norace bool ccaOn; /****************** Prototypes ****************/ task void startDone_task(); task void stopDone_task(); task void sendDone_task(); void shutdown(); /***************** SplitControl Commands ****************/ command error_t SplitControl.start() { if(call SplitControlState.requestState(S_STARTING) == SUCCESS) { call CC2420Power.startVReg(); return SUCCESS; } else if(call SplitControlState.isState(S_STARTED)) { return EALREADY; } else if(call SplitControlState.isState(S_STARTING)) { return SUCCESS; } return EBUSY; } command error_t SplitControl.stop() { if (call SplitControlState.isState(S_STARTED)) { call SplitControlState.forceState(S_STOPPING); shutdown(); return SUCCESS; } else if(call SplitControlState.isState(S_STOPPED)) { return EALREADY; } else if(call SplitControlState.isState(S_TRANSMITTING)) { call SplitControlState.forceState(S_STOPPING); // At sendDone, the radio will shut down return SUCCESS; } else if(call SplitControlState.isState(S_STOPPING)) { return SUCCESS; } return EBUSY; } /***************** Send Commands ****************/ command error_t Send.cancel( message_t* p_msg ) { return call CC2420Transmit.cancel(); } command error_t Send.send( message_t* p_msg, uint8_t len ) { cc2420_header_t* header = call CC2420PacketBody.getHeader( p_msg ); cc2420_metadata_t* metadata = call CC2420PacketBody.getMetadata( p_msg ); atomic { if (!call SplitControlState.isState(S_STARTED)) { return FAIL; } call SplitControlState.forceState(S_TRANSMITTING); m_msg = p_msg; } // header->length = len + CC2420_SIZE; #ifdef CC2420_HW_SECURITY header->fcf &= ((1 << IEEE154_FCF_ACK_REQ)| (1 << IEEE154_FCF_SECURITY_ENABLED)| (0x3 << IEEE154_FCF_SRC_ADDR_MODE) | (0x3 << IEEE154_FCF_DEST_ADDR_MODE)); #else header->fcf &= ((1 << IEEE154_FCF_ACK_REQ) | (0x3 << IEEE154_FCF_SRC_ADDR_MODE) | (0x3 << IEEE154_FCF_DEST_ADDR_MODE)); #endif header->fcf |= ( ( IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE ) | ( 1 << IEEE154_FCF_INTRAPAN ) ); metadata->ack = FALSE; metadata->rssi = 0; metadata->lqi = 0; //metadata->timesync = FALSE; metadata->timestamp = CC2420_INVALID_TIMESTAMP; ccaOn = TRUE; signal RadioBackoff.requestCca(m_msg); call CC2420Transmit.send( m_msg, ccaOn ); return SUCCESS; } command void* Send.getPayload(message_t* m, uint8_t len) { if (len <= call Send.maxPayloadLength()) { return (void* COUNT_NOK(len ))(m->data); } else { return NULL; } } command uint8_t Send.maxPayloadLength() { return TOSH_DATA_LENGTH; } /**************** RadioBackoff Commands ****************/ /** * Must be called within a requestInitialBackoff event * @param backoffTime the amount of time in some unspecified units to backoff */ async command void RadioBackoff.setInitialBackoff(uint16_t backoffTime) { call SubBackoff.setInitialBackoff(backoffTime); } /** * Must be called within a requestCongestionBackoff event * @param backoffTime the amount of time in some unspecified units to backoff */ async command void RadioBackoff.setCongestionBackoff(uint16_t backoffTime) { call SubBackoff.setCongestionBackoff(backoffTime); } /** * Enable CCA for the outbound packet. Must be called within a requestCca * event * @param ccaOn TRUE to enable CCA, which is the default. */ async command void RadioBackoff.setCca(bool useCca) { ccaOn = useCca; } /**************** Events ****************/ async event void CC2420Transmit.sendDone( message_t* p_msg, error_t err ) { atomic sendErr = err; post sendDone_task(); } async event void CC2420Power.startVRegDone() { call Resource.request(); } event void Resource.granted() { call CC2420Power.startOscillator(); } async event void CC2420Power.startOscillatorDone() { post startDone_task(); } /***************** SubBackoff Events ****************/ async event void SubBackoff.requestInitialBackoff(message_t *msg) { call SubBackoff.setInitialBackoff ( call Random.rand16() % (0x1F * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF); signal RadioBackoff.requestInitialBackoff(msg); } async event void SubBackoff.requestCongestionBackoff(message_t *msg) { call SubBackoff.setCongestionBackoff( call Random.rand16() % (0x7 * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF); signal RadioBackoff.requestCongestionBackoff(msg); } async event void SubBackoff.requestCca(message_t *msg) { // Lower layers than this do not configure the CCA settings signal RadioBackoff.requestCca(msg); } /***************** Tasks ****************/ task void sendDone_task() { error_t packetErr; atomic packetErr = sendErr; if(call SplitControlState.isState(S_STOPPING)) { shutdown(); } else { call SplitControlState.forceState(S_STARTED); } signal Send.sendDone( m_msg, packetErr ); } task void startDone_task() { call SubControl.start(); call CC2420Power.rxOn(); call Resource.release(); call SplitControlState.forceState(S_STARTED); signal SplitControl.startDone( SUCCESS ); } task void stopDone_task() { call SplitControlState.forceState(S_STOPPED); signal SplitControl.stopDone( SUCCESS ); } /***************** Functions ****************/ /** * Shut down all sub-components and turn off the radio */ void shutdown() { call SubControl.stop(); call CC2420Power.stopVReg(); post stopDone_task(); } /***************** Defaults ***************/ default event void SplitControl.startDone(error_t error) { } default event void SplitControl.stopDone(error_t error) { } default async event void RadioBackoff.requestInitialBackoff(message_t *msg) { } default async event void RadioBackoff.requestCongestionBackoff(message_t *msg) { } default async event void RadioBackoff.requestCca(message_t *msg) { } } tinyos-2.1.2+dfsg/tos/chips/cc2420/htmlreport.tar.gz000066400000000000000000036305261207233610700221370ustar00rootroot00000000000000 |Q<@,( l KQ9dۆIMRR/@- "*"˭ܷ`9T(ZC gw4Φm3Ifw~;f;ɶj7)(V5l¼u|15ER*&d *rq)fY%EIf3&-#L N|PҿSvfIn$/GEZBEHr@g'/G f z?THr$ND$~Y#aG?5ҿɟwG?4%nBYRpWYx0 ZW1&TɒxC$H&U;H^@ 0@#տX$N`&OPNķ #Q/Kп$X@MqIeIp N1͖3g1,V*pPF%뿣io/J-қD)$icOQҿI{`Ui5eIgjdMh1mq0c-ZMpdI3-y&=b[-b?NWP/K{gM1ќ`?'K>w1sREE8M%ѿ6Ev:*'FO$ZϛkV( d?A(Ka)`biT?5dI"/~_C\W,cׁHO3X3vnx8Hr7%?84G˒X,^@˒`z^:b WQ?IAo7U|W?ImPBq_M ˒ |n]p/PտZ$HM֐zq _JoL D_YH?a`./G ED8hOP"ɕB1S?(LIHOo7f26.qa?l?Rɒ`Θiy!g8(4, F Og%PbSq_j?H~_1YR@W|@4% _)1@ɓ_I<Oɴ3V0;f HD_T5X,"bO,%T(C$V!#FԈɒ?D&0dIbϿ>qɓD_Դ$_ YYśPI\ŭI"o1g<( 'UM(JF?;sB"biD=%Sh`4؀wti_u |EP(&oXsu&Zb0c5̺:Ֆٌi0c7u-&51ƥŰ[vCKElE-Q&-K&ʼ(VdX a٘x _LL=f1 \X%׏vKoy:xxU^(aa븕d2dz%Jˑa-~~s|.dF.d&IMru,ycT1 P(W4 7O}[v70ڃ&6>sk ADVx ҃ndKeL%'Ɓ)oGzfKjZ. <܇u|ǧ8ř{op.އ~^oAlqW-}u>l~\ J  3eZl2xr)Yfw'Nq| X |blsI)f.6WǵϪ`0 a8ZXcױ,;IP16)VDB*G}5ูoY4l{X5w VZqj R`%&42l̓<=;XlvfuVD?b@-*L 3dusY mq}SWk5V{ZTUAT~NcE*С\K;%q~"2"Hf)enˀ|.iՏ`LDPGH_vr;*Vcɽ8VT jrLhl6`Mh6:*OADYkh!- BZB AoĂV$Z8@`AZPI= 5|#0" %$!f};,&vΟ!V7mQ|)LPOY=ofYEb Sy?P#!k҈" "" "I},Jg;G8 Da$Wj 5. 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IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An HAL abstraction of the ChipCon CC2420 radio. This abstraction * deals specifically with radio configurations. All get() and set() * commands are single-phase. After setting some values, a call to * sync() is required for the changes to propagate to the cc2420 * hardware chip. This interface allows setting multiple parameters * before calling sync(). * * @author Jonathan Hui * @version $Revision: 1.3 $ $Date: 2008/06/16 15:33:32 $ */ #include "IEEE802154.h" interface CC2420Config { /** * Sync configuration changes with the radio hardware. This only * applies to set commands below. * * @return SUCCESS if the request was accepted, FAIL otherwise. */ command error_t sync(); event void syncDone( error_t error ); /** * Change the channel of the radio, between 11 and 26 */ command uint8_t getChannel(); command void setChannel( uint8_t channel ); /** * Get the long address of the radio: set in hardware */ command ieee_eui64_t getExtAddr(); /** * Change the short address of the radio. */ async command uint16_t getShortAddr(); command void setShortAddr( uint16_t address ); /** * Change the PAN address of the radio. */ async command uint16_t getPanAddr(); command void setPanAddr( uint16_t address ); /** * @param enableAddressRecognition TRUE to turn address recognition on * @param useHwAddressRecognition TRUE to perform address recognition first * in hardware. This doesn't affect software address recognition. The * driver must sync with the chip after changing this value. */ command void setAddressRecognition(bool enableAddressRecognition, bool useHwAddressRecognition); /** * @return TRUE if address recognition is enabled */ async command bool isAddressRecognitionEnabled(); /** * @return TRUE if address recognition is performed first in hardware. */ async command bool isHwAddressRecognitionDefault(); /** * Sync must be called for acknowledgement changes to take effect * @param enableAutoAck TRUE to enable auto acknowledgements * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to * default to software auto acknowledgements */ command void setAutoAck(bool enableAutoAck, bool hwAutoAck); /** * @return TRUE if hardware auto acks are the default, FALSE if software * acks are the default */ async command bool isHwAutoAckDefault(); /** * @return TRUE if auto acks are enabled */ async command bool isAutoAckEnabled(); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Fifo.nc000066400000000000000000000070721207233610700226450ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HAL abstraction for accessing the FIFO registers of a ChipCon * CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.2 $ $Date: 2008-06-03 04:43:03 $ */ interface CC2420Fifo { /** * Start reading from the FIFO. The readDone event will * be signalled upon completion. * * @param data a pointer to the receive buffer. * @param length number of bytes to read. * @return status byte returned when sending the last address byte * of the SPI transaction. */ async command cc2420_status_t beginRead( uint8_t* COUNT_NOK(length) data, uint8_t length ); /** * Continue reading from the FIFO without having to send the address * byte again. The readDone event will be signalled * upon completion. * * @param data a pointer to the receive buffer. * @param length number of bytes to read. * @return SUCCESS always. */ async command error_t continueRead( uint8_t* COUNT_NOK(length) data, uint8_t length ); /** * Signals the completion of a read operation. * * @param data a pointer to the receive buffer. * @param length number of bytes read. * @param error notification of how the operation went */ async event void readDone( uint8_t* COUNT_NOK(length) data, uint8_t length, error_t error ); /** * Start writing the FIFO. The writeDone event will be * signalled upon completion. * * @param data a pointer to the send buffer. * @param length number of bytes to write. * @return status byte returned when sending the last address byte * of the SPI transaction. */ async command cc2420_status_t write( uint8_t* COUNT_NOK(length) data, uint8_t length ); /** * Signals the completion of a write operation. * * @param data a pointer to the send buffer. * @param length number of bytes written. * @param error notification of how the operation went */ async event void writeDone( uint8_t* COUNT_NOK(length) data, uint8_t length, error_t error ); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Keys.nc000066400000000000000000000034251207233610700226730ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Razvan Musaloiu-E. * @author Jong Hyun Lim */ interface CC2420Keys { command error_t setKey(uint8_t keyNo, uint8_t* key); event void setKeyDone(uint8_t keyNo, uint8_t* key); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Packet.nc000066400000000000000000000054761207233610700231770ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Chad Metcalf */ #include "message.h" interface CC2420Packet { /** * Get transmission power setting for current packet. * * @param the message */ async command uint8_t getPower( message_t* p_msg ); /** * Set transmission power for a given packet. Valid ranges are * between 0 and 31. * * @param p_msg the message. * @param power transmission power. */ async command void setPower( message_t* p_msg, uint8_t power ); /** * Get rssi value for a given packet. For received packets, it is * the received signal strength when receiving that packet. For sent * packets, it is the received signal strength of the ack if an ack * was received. */ async command int8_t getRssi( message_t* p_msg ); /** * Get lqi value for a given packet. For received packets, it is the * link quality indicator value when receiving that packet. For sent * packets, it is the link quality indicator value of the ack if an * ack was received. */ async command uint8_t getLqi( message_t* p_msg ); async command uint8_t getNetwork( message_t* ONE p_msg ); async command void setNetwork( message_t* ONE p_msg, uint8_t networkId ); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420PacketBody.nc000066400000000000000000000043001207233610700237760ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Internal interface for the CC2420 to get portions of a packet. * @author David Moss */ interface CC2420PacketBody { /** * @return pointer to the cc2420_header_t of the given message */ async command cc2420_header_t * ONE getHeader(message_t * ONE msg); /** * @return pointer to the payload region of the message, after any headers * works with extended addressing mode */ async command uint8_t * getPayload( message_t* msg); /** * @return pointer to the cc2420_metadata_t of the given message */ async command cc2420_metadata_t * ONE getMetadata(message_t * ONE msg); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Power.nc000066400000000000000000000063321207233610700230540ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An HAL abstraction of the ChipCon CC2420 radio. This abstraction * deals specifically with radio power operations (e.g. voltage * regulator, oscillator, etc). However, it does not include * transmission power, see the CC2420Config interface. * * @author Jonathan Hui * @version $Revision: 1.1 $ $Date: 2007-07-04 00:37:14 $ */ interface CC2420Power { /** * Start the voltage regulator on the CC2420. On SUCCESS, * startVReg() will be signalled when the voltage * regulator is fully on. * * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t startVReg(); /** * Signals that the voltage regulator has been started. */ async event void startVRegDone(); /** * Stop the voltage regulator immediately. * * @return SUCCESS always */ async command error_t stopVReg(); /** * Start the oscillator. On SUCCESS, startOscillator * will be signalled when the oscillator has been started. * * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t startOscillator(); /** * Signals that the oscillator has been started. */ async event void startOscillatorDone(); /** * Stop the oscillator. * * @return SUCCESS if the oscillator was stopped, FAIL otherwise. */ async command error_t stopOscillator(); /** * Enable RX. * * @return SUCCESS if receive mode has been enabled, FAIL otherwise. */ async command error_t rxOn(); /** * Disable RX. * * @return SUCCESS if receive mode has been disabled, FAIL otherwise. */ async command error_t rfOff(); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Ram.nc000066400000000000000000000051071207233610700224760ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HAL abstraction for accessing theRAM of a ChipCon CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.2 $ $Date: 2008-06-03 04:43:03 $ */ #include "CC2420.h" interface CC2420Ram { /** * Read data from a RAM. This operation is sychronous. * * @param offset within the field. * @param data a pointer to the receive buffer. * @param length number of bytes to read. * @return status byte returned when sending the last byte * of the SPI transaction. */ async command cc2420_status_t read( uint8_t offset, uint8_t* COUNT_NOK(length) data, uint8_t length ); /** * Write data to RAM. This operation is sychronous. * * @param offset within the field. * @param data a pointer to the send buffer. * @param length number of bytes to write. * @return status byte returned when sending the last address byte * of the SPI transaction. */ async command cc2420_status_t write( uint8_t offset, uint8_t* COUNT_NOK(length) data, uint8_t length ); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Receive.nc000066400000000000000000000045341207233610700233440ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Low-level abstraction of the receive path implementation for the * ChipCon CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2008-06-17 07:28:24 $ */ #include "message.h" interface CC2420Receive { /** * Notification that an SFD capture has occured. * * @param time at which the capture happened. */ async command void sfd( uint32_t time ); /** * Notification that the packet has been dropped by the radio * (e.g. due to address rejection). */ async command void sfd_dropped(); /** * Signals that a message has been received. * * @param type of the message received. * @param message pointer to message received. */ async event void receive( uint8_t type, message_t* ONE_NOK message ); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Register.nc000066400000000000000000000047571207233610700235550ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface representing one of the Read/Write registers on the * CC2420 radio. The return values (when appropriate) refer to the * status byte returned on the CC2420 SO pin. A full list of RW * registers can be found on page 61 of the CC2420 datasheet (rev * 1.2). Page 25 of the same document describes the protocol for * interacting with these registers over the CC2420 SPI bus. * * @author Philip Levis * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:44 $ */ #include "CC2420.h" interface CC2420Register { /** * Read a 16-bit data word from the register. * * @param data pointer to place the register value. * @return status byte from the read. */ async command cc2420_status_t read(uint16_t* data); /** * Write a 16-bit data word to the register. * * @param data value to write to register. * @return status byte from the write. */ async command cc2420_status_t write(uint16_t data); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420SecurityMode.nc000066400000000000000000000037361207233610700244010ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Razvan Musaloiu-E. * @author Jong Hyun Lim */ interface CC2420SecurityMode { command error_t setCtr(message_t* msg, uint8_t setKey, uint8_t setSkip); // Valid sizes are: 4, 6, 8, 10, 12, 14, 16 command error_t setCbcMac(message_t* msg, uint8_t setKey, uint8_t setSkip, uint8_t size); command error_t setCcm(message_t* msg, uint8_t setKey, uint8_t setSkip, uint8_t size); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Strobe.nc000066400000000000000000000042541207233610700232170ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface representing one of the CC2420 command strobe registers. * Writing to one of these registers enacts a command on the CC2420, * such as power-up, transmission, or clear a FIFO. * * @author Philip Levis * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:44 $ */ #include "CC2420.h" interface CC2420Strobe { /** * Send a command strobe to the register. The return value is the * CC2420 status register. Table 5 on page 27 of the CC2420 * datasheet (v1.2) describes the contents of this register. * * @return Status byte from the CC2420. */ async command cc2420_status_t strobe(); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/CC2420Transmit.nc000066400000000000000000000061571207233610700235660ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Low-level abstraction for the transmit path implementaiton of the * ChipCon CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.2 $ $Date: 2008-06-03 04:43:03 $ */ #include "message.h" interface CC2420Transmit { /** * Send a message * * @param p_msg message to send. * @param useCca TRUE if this Tx should use clear channel assessments * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t send( message_t* ONE p_msg, bool useCca ); /** * Send the previous message again * @param useCca TRUE if this re-Tx should use clear channel assessments * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t resend(bool useCca); /** * Cancel sending of the message. * * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t cancel(); /** * Signal that a message has been sent * * @param p_msg message to send. * @param error notifaction of how the operation went. */ async event void sendDone( message_t* ONE_NOK p_msg, error_t error ); /** * Modify the contents of a packet. This command can only be used * when an SFD capture event for the sending packet is signalled. * * @param offset in the message to start modifying. * @param buf to data to write * @param len of bytes to write * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t modify( uint8_t offset, uint8_t* COUNT_NOK(len) buf, uint8_t len ); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/ChipSpiResource.nc000066400000000000000000000025511207233610700243100ustar00rootroot00000000000000 /** * Interface for the SPI resource for an entire chip. The chip accesses * the platform SPI resource one time, but can have multiple clients * using the SPI bus on top. When all of the clients are released, the * chip will normally try to release itself from the platforms SPI bus. * In some cases, this isn't desirable - so even though upper components * aren't actively using the SPI bus, they can tell the chip to hold onto * it so they can have immediate access when they need. * * Any component that aborts a release MUST attempt the release at a later * time if they don't acquire and release the SPI bus naturally after the * abort. * * @author David Moss */ interface ChipSpiResource { /** * The SPI bus is about to be automatically released. Modules that aren't * using the SPI bus but still want the SPI bus to stick around must call * abortRelease() within the event. */ async event void releasing(); /** * Abort the release of the SPI bus. This must be called only with the * releasing() event */ async command void abortRelease(); /** * Release the SPI bus if there are no objections * @return SUCCESS if the SPI bus is released from the chip. * FAIL if the SPI bus is already in use. * EBUSY if some component aborted the release. */ async command error_t attemptRelease(); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/PacketTimeSyncOffset.nc000066400000000000000000000056211207233610700252740ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti, Brano Kusy * * Interface for one hop time synchronization. Allows to modify timesync * messages in the MAC layer with elapsed time of an event (ETA timesync * primitive). Interface also provides a command to determine offset within * a CC2420 packet, where the timesync ETA value is stored. word 'timestamping' * used in describing commands does not refer to metadata.timestamp value, * rather it refers to the timesync ETA timestamp which is part of data * payload and is transmitted over the air. */ interface PacketTimeSyncOffset { /** * @param 'message_t *ONE msg' message to examine. * * Returns TRUE if the current message should be timestamped. */ async command bool isSet(message_t* msg); /** * @param 'message_t *ONE msg' message to examine. * * Returns the offset of where the timesync timestamp is sotred in a * CC2420 packet */ async command uint8_t get(message_t* msg); /** * @param 'message_t *ONE msg' message to modify. * * Sets the current message to be timestamped in the MAC layer. */ async command void set(message_t* msg); /** * @param 'message_t *ONE msg' message to modify. * * Cancels any pending requests to timestamp the message in MAC. */ async command void cancel(message_t* msg); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/PowerCycle.nc000066400000000000000000000042401207233610700233120ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Manage the CC2420's duty cycle and power management * @author David Moss */ interface PowerCycle { /** * Set the sleep interval, in binary milliseconds * @param sleepIntervalMs the sleep interval in [ms] */ command void setSleepInterval(uint16_t sleepIntervalMs); /** * @return the sleep interval in [ms] */ command uint16_t getSleepInterval(); /** * @deprecated Should be removed in the future when the PowerCycle * component does packet-level detects and is in full control of radio * power. */ event void detected(); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/RadioBackoff.nc000066400000000000000000000074031207233610700235540ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Interface to request and specify backoff periods for messages * * We use a call back method for setting the backoff as opposed to * events that return backoff values. * * This is because of fan-out issues with multiple components wanting to * affect backoffs for whatever they're interested in: * If you signal out an *event* to request an initial backoff and * several components happen to be listening, then those components * would be required to return a backoff value. We don't want that * behavior. * With this strategy, components can listen for the requests and then * decide if they want to affect the behavior. If the component wants to * affect the behavior, it calls back using the setXYZBackoff(..) command. * If several components call back, then the last component to get its * word in has the final say. * * @author David Moss */ interface RadioBackoff { /** * Must be called within a requestInitialBackoff event * @param backoffTime the amount of time in some unspecified units to backoff */ async command void setInitialBackoff(uint16_t backoffTime); /** * Must be called within a requestCongestionBackoff event * @param backoffTime the amount of time in some unspecified units to backoff */ async command void setCongestionBackoff(uint16_t backoffTime); /** * Enable CCA for the outbound packet. Must be called within a requestCca * event * @param ccaOn TRUE to enable CCA, which is the default. */ async command void setCca(bool ccaOn); /** * Request for input on the initial backoff * Reply using setInitialBackoff(..) * @param msg pointer to the message being sent */ async event void requestInitialBackoff(message_t * ONE msg); /** * Request for input on the congestion backoff * Reply using setCongestionBackoff(..) * @param msg pointer to the message being sent */ async event void requestCongestionBackoff(message_t * ONE msg); /** * Request for input on whether or not to use CCA on the outbound packet. * Replies should come in the form of setCca(..) * @param msg pointer to the message being sent */ async event void requestCca(message_t * ONE msg); } tinyos-2.1.2+dfsg/tos/chips/cc2420/interfaces/ReceiveIndicator.nc000066400000000000000000000035411207233610700244600ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Interface to obtain energy, byte, and packet receive check readings * @author David Moss */ interface ReceiveIndicator { /** * @return TRUE if the indicator is showing we are actively receiving at this * level */ command bool isReceiving(); } tinyos-2.1.2+dfsg/tos/chips/cc2420/link/000077500000000000000000000000001207233610700175265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/link/PacketLinkC.nc000066400000000000000000000044201207233610700222000ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Reliable Packet Link Functionality * @author David Moss * @author Jon Wyant */ #warning "*** USING PACKET LINK LAYER" configuration PacketLinkC { provides { interface Send; interface PacketLink; } uses { interface Send as SubSend; } } implementation { components PacketLinkP, CC2420PacketC, RandomC, new StateC() as SendStateC, new TimerMilliC() as DelayTimerC; PacketLink = PacketLinkP; Send = PacketLinkP.Send; SubSend = PacketLinkP.SubSend; PacketLinkP.SendState -> SendStateC; PacketLinkP.DelayTimer -> DelayTimerC; PacketLinkP.PacketAcknowledgements -> CC2420PacketC; PacketLinkP.CC2420PacketBody -> CC2420PacketC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/link/PacketLinkDummyC.nc000066400000000000000000000037771207233610700232320ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Dummy configuration for PacketLink Layer * @author David Moss * @author Jon Wyant */ configuration PacketLinkDummyC { provides { interface Send; interface PacketLink; } uses { interface Send as SubSend; } } implementation { components PacketLinkDummyP, CC2420RadioC; PacketLink = PacketLinkDummyP; Send = SubSend; PacketLinkDummyP.PacketAcknowledgements -> CC2420RadioC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/link/PacketLinkDummyP.nc000066400000000000000000000056751207233610700232460ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Dummy module for Packet Link layer * @author David Moss * @author Jon Wyant */ module PacketLinkDummyP { provides { interface PacketLink; } uses { interface PacketAcknowledgements; } } implementation { /***************** PacketLink Commands ***************/ /** * Set the maximum number of times attempt message delivery * Default is 0 * @param msg * @param maxRetries the maximum number of attempts to deliver * the message */ command void PacketLink.setRetries(message_t *msg, uint16_t maxRetries) { } /** * Set a delay between each retry attempt * @param msg * @param retryDelay the delay betweeen retry attempts, in milliseconds */ command void PacketLink.setRetryDelay(message_t *msg, uint16_t retryDelay) { } /** * @return the maximum number of retry attempts for this message */ command uint16_t PacketLink.getRetries(message_t *msg) { return 0; } /** * @return the delay between retry attempts in ms for this message */ command uint16_t PacketLink.getRetryDelay(message_t *msg) { return 0; } /** * @return TRUE if the message was delivered. * This should always be TRUE if the message was sent to the * AM_BROADCAST_ADDR */ command bool PacketLink.wasDelivered(message_t *msg) { return call PacketAcknowledgements.wasAcked(msg); } } tinyos-2.1.2+dfsg/tos/chips/cc2420/link/PacketLinkP.nc000066400000000000000000000151611207233610700222210ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Reliable Packet Link Functionality * @author David Moss * @author Jon Wyant */ #include "CC2420.h" module PacketLinkP { provides { interface Send; interface PacketLink; } uses { interface Send as SubSend; interface State as SendState; interface PacketAcknowledgements; interface Timer as DelayTimer; interface CC2420PacketBody; } } implementation { /** The message currently being sent */ message_t *currentSendMsg; /** Length of the current send message */ uint8_t currentSendLen; /** The length of the current send message */ uint16_t totalRetries; /** * Send States */ enum { S_IDLE, S_SENDING, }; /***************** Prototypes ***************/ task void send(); void signalDone(error_t error); /***************** PacketLink Commands ***************/ /** * Set the maximum number of times attempt message delivery * Default is 0 * @param msg * @param maxRetries the maximum number of attempts to deliver * the message */ command void PacketLink.setRetries(message_t *msg, uint16_t maxRetries) { (call CC2420PacketBody.getMetadata(msg))->maxRetries = maxRetries; } /** * Set a delay between each retry attempt * @param msg * @param retryDelay the delay betweeen retry attempts, in milliseconds */ command void PacketLink.setRetryDelay(message_t *msg, uint16_t retryDelay) { (call CC2420PacketBody.getMetadata(msg))->retryDelay = retryDelay; } /** * @return the maximum number of retry attempts for this message */ command uint16_t PacketLink.getRetries(message_t *msg) { return (call CC2420PacketBody.getMetadata(msg))->maxRetries; } /** * @return the delay between retry attempts in ms for this message */ command uint16_t PacketLink.getRetryDelay(message_t *msg) { return (call CC2420PacketBody.getMetadata(msg))->retryDelay; } /** * @return TRUE if the message was delivered. */ command bool PacketLink.wasDelivered(message_t *msg) { return call PacketAcknowledgements.wasAcked(msg); } /***************** Send Commands ***************/ /** * Each call to this send command gives the message a single * DSN that does not change for every copy of the message * sent out. For messages that are not acknowledged, such as * a broadcast address message, the receiving end does not * signal receive() more than once for that message. */ command error_t Send.send(message_t *msg, uint8_t len) { error_t error; if(call SendState.requestState(S_SENDING) == SUCCESS) { currentSendMsg = msg; currentSendLen = len; totalRetries = 0; if(call PacketLink.getRetries(msg) > 0) { call PacketAcknowledgements.requestAck(msg); } if((error = call SubSend.send(msg, len)) != SUCCESS) { call SendState.toIdle(); } return error; } return EBUSY; } command error_t Send.cancel(message_t *msg) { if(currentSendMsg == msg) { call SendState.toIdle(); return call SubSend.cancel(msg); } return FAIL; } command uint8_t Send.maxPayloadLength() { return call SubSend.maxPayloadLength(); } command void *Send.getPayload(message_t* msg, uint8_t len) { return call SubSend.getPayload(msg, len); } /***************** SubSend Events ***************/ event void SubSend.sendDone(message_t* msg, error_t error) { if(call SendState.getState() == S_SENDING) { totalRetries++; if(call PacketAcknowledgements.wasAcked(msg)) { signalDone(SUCCESS); return; } else if(totalRetries < call PacketLink.getRetries(currentSendMsg)) { if(call PacketLink.getRetryDelay(currentSendMsg) > 0) { // Resend after some delay call DelayTimer.startOneShot(call PacketLink.getRetryDelay(currentSendMsg)); } else { // Resend immediately post send(); } return; } } signalDone(error); } /***************** Timer Events ****************/ /** * When this timer is running, that means we're sending repeating messages * to a node that is receive check duty cycling. */ event void DelayTimer.fired() { if(call SendState.getState() == S_SENDING) { post send(); } } /***************** Tasks ***************/ task void send() { if(call PacketLink.getRetries(currentSendMsg) > 0) { call PacketAcknowledgements.requestAck(currentSendMsg); } if(call SubSend.send(currentSendMsg, currentSendLen) != SUCCESS) { post send(); } } /***************** Functions ***************/ void signalDone(error_t error) { call DelayTimer.stop(); call SendState.toIdle(); // update only if retries were explicitly asked for if((call CC2420PacketBody.getMetadata(currentSendMsg))->maxRetries > 0) (call CC2420PacketBody.getMetadata(currentSendMsg))->maxRetries = totalRetries; signal Send.sendDone(currentSendMsg, error); } } tinyos-2.1.2+dfsg/tos/chips/cc2420/link/readme.txt000066400000000000000000000003361207233610700215260ustar00rootroot00000000000000PacketLink is used for link-layer retransmissions guided by your own application requirements. It will fail if it receives false-acknowledgements, which is completely possible in 802.15.4. See TEP 127 for more details. tinyos-2.1.2+dfsg/tos/chips/cc2420/lowpan/000077500000000000000000000000001207233610700200715ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/lowpan/CC2420TinyosNetworkC.nc000066400000000000000000000075721207233610700241060ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Original TinyOS T-Frames use a packet header that is not compatible with * other 6LowPAN networks. They do not include the network byte * responsible for identifying the packing as being sourced from a TinyOS * network. * * TinyOS I-Frames are interoperability packets that do include a network * byte as defined by 6LowPAN specifications. The I-Frame header type is * the default packet header used in TinyOS networks. * * Since either packet header is acceptable, this layer must do some * preprocessing (sorry) to figure out whether or not it needs to include * the functionality to process I-frames. If I-Frames are used, then * the network byte is added on the way out and checked on the way in. * If the packet came from a network different from a TinyOS network, the * user may access it through the DispatchP's NonTinyosReceive[] Receive * interface and process it in a different radio stack. * * If T-Frames are used instead, this layer is simply pass-through wiring to the * layer beneath. * * Define "CC2420_IFRAME_TYPE" to use the interoperability frame and * this layer * * @author David Moss */ #include "CC2420.h" #include "Ieee154.h" configuration CC2420TinyosNetworkC { provides { interface Resource[uint8_t clientId]; interface Send; interface Receive; interface Send as ActiveSend; interface Receive as ActiveReceive; interface Packet as BarePacket; } uses { interface Receive as SubReceive; interface Send as SubSend; } } implementation { enum { TINYOS_N_NETWORKS = uniqueCount(RADIO_SEND_RESOURCE), }; components MainC; components CC2420TinyosNetworkP; components CC2420PacketC; components new FcfsResourceQueueC(TINYOS_N_NETWORKS); CC2420TinyosNetworkP.BareSend = Send; CC2420TinyosNetworkP.BareReceive = Receive; CC2420TinyosNetworkP.BarePacket = BarePacket; CC2420TinyosNetworkP.SubSend = SubSend; CC2420TinyosNetworkP.SubReceive = SubReceive; CC2420TinyosNetworkP.Resource = Resource; CC2420TinyosNetworkP.ActiveSend = ActiveSend; CC2420TinyosNetworkP.ActiveReceive = ActiveReceive; CC2420TinyosNetworkP.CC2420Packet -> CC2420PacketC; CC2420TinyosNetworkP.CC2420PacketBody -> CC2420PacketC; CC2420TinyosNetworkP.Queue -> FcfsResourceQueueC; MainC.SoftwareInit -> FcfsResourceQueueC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/lowpan/CC2420TinyosNetworkP.nc000066400000000000000000000171241207233610700241150ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Fills in the network ID byte for outgoing packets for compatibility with * other 6LowPAN networks. Filters incoming packets that are not * TinyOS network compatible. Provides the 6LowpanSnoop interface to * sniff for packets that were not originated from TinyOS. * * @author David Moss */ #include "CC2420.h" #include "Ieee154.h" module CC2420TinyosNetworkP @safe() { provides { interface Resource[uint8_t client]; interface Send as BareSend; interface Receive as BareReceive; interface Send as ActiveSend; interface Receive as ActiveReceive; interface Packet as BarePacket; } uses { interface Send as SubSend; interface Receive as SubReceive; interface CC2420Packet; interface CC2420PacketBody; interface ResourceQueue as Queue; } } implementation { enum { OWNER_NONE = 0xff, TINYOS_N_NETWORKS = uniqueCount("RADIO_SEND_RESOURCE"), } state; enum { CLIENT_AM, CLIENT_BARE, } m_busy_client; norace uint8_t resource_owner = OWNER_NONE, next_owner; command error_t ActiveSend.send(message_t* msg, uint8_t len) { call CC2420Packet.setNetwork(msg, TINYOS_6LOWPAN_NETWORK_ID); m_busy_client = CLIENT_AM; return call SubSend.send(msg, len); } command error_t ActiveSend.cancel(message_t* msg) { return call SubSend.cancel(msg); } command uint8_t ActiveSend.maxPayloadLength() { return call SubSend.maxPayloadLength(); } command void* ActiveSend.getPayload(message_t* msg, uint8_t len) { if (len <= call ActiveSend.maxPayloadLength()) { return msg->data; } else { return NULL; } } /***************** BarePacket Commands ****************/ command void BarePacket.clear(message_t *msg) { memset(msg, 0, sizeof(message_t)); } command uint8_t BarePacket.payloadLength(message_t *msg) { cc2420_header_t *hdr = call CC2420PacketBody.getHeader(msg); return hdr->length + 1 - MAC_FOOTER_SIZE; } command void BarePacket.setPayloadLength(message_t* msg, uint8_t len) { cc2420_header_t *hdr = call CC2420PacketBody.getHeader(msg); hdr->length = len - 1 + MAC_FOOTER_SIZE; } command uint8_t BarePacket.maxPayloadLength() { return TOSH_DATA_LENGTH + sizeof(cc2420_header_t); } command void* BarePacket.getPayload(message_t* msg, uint8_t len) { } /***************** Send Commands ****************/ command error_t BareSend.send(message_t* msg, uint8_t len) { call BarePacket.setPayloadLength(msg, len); m_busy_client = CLIENT_BARE; return call SubSend.send(msg, 0); } command error_t BareSend.cancel(message_t* msg) { return call SubSend.cancel(msg); } command uint8_t BareSend.maxPayloadLength() { return call BarePacket.maxPayloadLength(); } command void* BareSend.getPayload(message_t* msg, uint8_t len) { #ifndef TFRAMES_ENABLED cc2420_header_t *hdr = call CC2420PacketBody.getHeader(msg); return hdr; #else // you really can't use BareSend with TFRAMES #endif } /***************** SubSend Events *****************/ event void SubSend.sendDone(message_t* msg, error_t error) { if (m_busy_client == CLIENT_AM) { signal ActiveSend.sendDone(msg, error); } else { signal BareSend.sendDone(msg, error); } } /***************** SubReceive Events ***************/ event message_t *SubReceive.receive(message_t *msg, void *payload, uint8_t len) { uint8_t network = call CC2420Packet.getNetwork(msg); if(!(call CC2420PacketBody.getMetadata(msg))->crc) { return msg; } #ifndef TFRAMES_ENABLED if (network == TINYOS_6LOWPAN_NETWORK_ID) { return signal ActiveReceive.receive(msg, payload, len); } else { return signal BareReceive.receive(msg, call BareSend.getPayload(msg, len), len + sizeof(cc2420_header_t)); } #else return signal ActiveReceive.receive(msg, payload, len); #endif } /***************** Resource ****************/ // SDH : 8-7-2009 : testing if there's more then one client allows // the compiler to eliminate most of the logic when there's only one // client. task void grantTask() { if (TINYOS_N_NETWORKS > 1) { if (resource_owner == OWNER_NONE && !(call Queue.isEmpty())) { resource_owner = call Queue.dequeue(); if (resource_owner != OWNER_NONE) { signal Resource.granted[resource_owner](); } } } else { if (next_owner != resource_owner) { resource_owner = next_owner; signal Resource.granted[resource_owner](); } } } async command error_t Resource.request[uint8_t id]() { post grantTask(); if (TINYOS_N_NETWORKS > 1) { return call Queue.enqueue(id); } else { if (id == resource_owner) { return EALREADY; } else { next_owner = id; return SUCCESS; } } } async command error_t Resource.immediateRequest[uint8_t id]() { if (resource_owner == id) return EALREADY; if (TINYOS_N_NETWORKS > 1) { if (resource_owner == OWNER_NONE && call Queue.isEmpty()) { resource_owner = id; return SUCCESS; } return FAIL; } else { resource_owner = id; return SUCCESS; } } async command error_t Resource.release[uint8_t id]() { if (TINYOS_N_NETWORKS > 1) { post grantTask(); } resource_owner = OWNER_NONE; return SUCCESS; } async command bool Resource.isOwner[uint8_t id]() { return (id == resource_owner); } /***************** Defaults ****************/ default event message_t *BareReceive.receive(message_t *msg, void *payload, uint8_t len) { return msg; } default event void BareSend.sendDone(message_t *msg, error_t error) { } default event message_t *ActiveReceive.receive(message_t *msg, void *payload, uint8_t len) { return msg; } default event void ActiveSend.sendDone(message_t *msg, error_t error) { } default event void Resource.granted[uint8_t client]() { call Resource.release[client](); } } tinyos-2.1.2+dfsg/tos/chips/cc2420/lowpan/readme.txt000066400000000000000000000000421207233610700220630ustar00rootroot00000000000000See TEP 125 for more information. tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/000077500000000000000000000000001207233610700173605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/DefaultLpl.h000066400000000000000000000065551207233610700216000ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author David Moss * @author Tony O'Donovan */ #ifndef DEFAULTLPL_H #define DEFAULTLPL_H /** * Low Power Listening Send States */ typedef enum { S_LPL_NOT_SENDING, // DEFAULT S_LPL_FIRST_MESSAGE, // 1. Sending the first message S_LPL_SENDING, // 2. Sending all other messages S_LPL_CLEAN_UP, // 3. Clean up the transmission } lpl_sendstate_t; /** * This is a measured value of the time in ms the radio is actually on * We round this up to err on the side of better performance ratios * This includes the acknowledgement wait period and backoffs, * which can typically be much longer than the transmission. * * Measured by Tony O'Donovan */ #ifndef DUTY_ON_TIME #define DUTY_ON_TIME 11 #endif /** * The maximum number of CCA checks performed on each wakeup. * If there are too few, the receiver may wake up between messages * and not detect the transmitter. * * The on-time had to increase from the original version to allow multiple * transmitters to co-exist. This is due to using ack's, which then requires us * to extend the backoff period. In networks that transmit frequently, possibly * with multiple transmitters, this power scheme makes sense. * * In networks that transmit very infrequently or without multiple transmitters, * it makes more sense to go with no acks and no backoffs and make the * receive check as short as possible. */ #ifndef MAX_LPL_CCA_CHECKS #if defined(PLATFORM_TELOSB) || defined(PLATFORM_TMOTE) #define MAX_LPL_CCA_CHECKS 400 #else #define MAX_LPL_CCA_CHECKS 400 #endif #endif /** * The minimum number of samples that must be taken in CC2420DutyCycleP * that show the channel is not clear before a detection event is issued */ #ifndef MIN_SAMPLES_BEFORE_DETECT #define MIN_SAMPLES_BEFORE_DETECT 3 #endif #endif tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/DefaultLplC.nc000066400000000000000000000063771207233610700220560ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Low Power Listening for the CC2420 * @author David Moss */ #include "DefaultLpl.h" #warning "*** USING DEFAULT LOW POWER COMMUNICATIONS ***" configuration DefaultLplC { provides { interface LowPowerListening; interface Send; interface Receive; interface SplitControl; interface State as SendState; } uses { interface Send as SubSend; interface Receive as SubReceive; interface SplitControl as SubControl; } } implementation { components MainC, DefaultLplP, PowerCycleC, CC2420RadioC, CC2420CsmaC, CC2420TransmitC, CC2420PacketC, RandomC, new StateC() as SendStateC, new TimerMilliC() as OffTimerC, new TimerMilliC() as SendDoneTimerC, SystemLowPowerListeningC, LedsC; LowPowerListening = DefaultLplP; Send = DefaultLplP; Receive = DefaultLplP; SplitControl = PowerCycleC; SendState = SendStateC; SubControl = DefaultLplP.SubControl; SubReceive = DefaultLplP.SubReceive; SubSend = DefaultLplP.SubSend; MainC.SoftwareInit -> DefaultLplP; DefaultLplP.SplitControlState -> PowerCycleC.SplitControlState; DefaultLplP.RadioPowerState -> PowerCycleC.RadioPowerState; DefaultLplP.SendState -> SendStateC; DefaultLplP.OffTimer -> OffTimerC; DefaultLplP.SendDoneTimer -> SendDoneTimerC; DefaultLplP.PowerCycle -> PowerCycleC; DefaultLplP.Resend -> CC2420TransmitC; DefaultLplP.PacketAcknowledgements -> CC2420RadioC; DefaultLplP.CC2420PacketBody -> CC2420PacketC; DefaultLplP.RadioBackoff -> CC2420CsmaC; DefaultLplP.Random -> RandomC; DefaultLplP.Leds -> LedsC; DefaultLplP.SystemLowPowerListening -> SystemLowPowerListeningC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/DefaultLplP.nc000066400000000000000000000277541207233610700220750ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Low Power Listening for the CC2420. This component is responsible for * delivery of an LPL packet, and for turning off the radio when the radio * has run out of tasks. * * The PowerCycle component is responsible for duty cycling the radio * and performing receive detections. * * @author David Moss */ #include "Lpl.h" #include "DefaultLpl.h" #include "AM.h" module DefaultLplP { provides { interface Init; interface LowPowerListening; interface Send; interface Receive; } uses { interface Send as SubSend; interface CC2420Transmit as Resend; interface RadioBackoff; interface Receive as SubReceive; interface SplitControl as SubControl; interface PowerCycle; interface CC2420PacketBody; interface PacketAcknowledgements; interface State as SendState; interface State as RadioPowerState; interface State as SplitControlState; interface Timer as OffTimer; interface Timer as SendDoneTimer; interface Random; interface Leds; interface SystemLowPowerListening; } } implementation { /** The message currently being sent */ norace message_t *currentSendMsg; /** The length of the current send message */ uint8_t currentSendLen; /** TRUE if the radio is duty cycling and not always on */ bool dutyCycling; /** * Radio Power State */ enum { S_OFF, // off by default S_TURNING_ON, S_ON, S_TURNING_OFF, }; /** * Send States */ enum { S_IDLE, S_SENDING, }; enum { ONE_MESSAGE = 0, }; /***************** Prototypes ***************/ task void send(); task void resend(); task void startRadio(); task void stopRadio(); void initializeSend(); void startOffTimer(); /***************** Init Commands ***************/ command error_t Init.init() { dutyCycling = FALSE; return SUCCESS; } /***************** LowPowerListening Commands ***************/ /** * Set this this node's radio wakeup interval, in milliseconds. * Once every interval, the node will sleep and perform an Rx check * on the radio. Setting the wakeup interval to 0 will keep the radio * always on. * * @param intervalMs the length of this node's wakeup interval, in [ms] */ command void LowPowerListening.setLocalWakeupInterval(uint16_t intervalMs) { call PowerCycle.setSleepInterval(intervalMs); } /** * @return the local node's wakeup interval, in [ms] */ command uint16_t LowPowerListening.getLocalWakeupInterval() { return call PowerCycle.getSleepInterval(); } /** * Configure this outgoing message so it can be transmitted to a neighbor mote * with the specified wakeup interval. * @param msg Pointer to the message that will be sent * @param intervalMs The receiving node's wakeup interval, in [ms] */ command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs) { (call CC2420PacketBody.getMetadata(msg))->rxInterval = intervalMs; } /** * @return the destination node's wakeup interval configured in this message */ command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { return (call CC2420PacketBody.getMetadata(msg))->rxInterval; } /***************** Send Commands ***************/ /** * Each call to this send command gives the message a single * DSN that does not change for every copy of the message * sent out. For messages that are not acknowledged, such as * a broadcast address message, the receiving end does not * signal receive() more than once for that message. */ command error_t Send.send(message_t *msg, uint8_t len) { if(call SplitControlState.getState() == S_OFF) { // Everything is off right now, start SplitControl and try again return EOFF; } if(call SendState.requestState(S_LPL_SENDING) == SUCCESS) { currentSendMsg = msg; currentSendLen = len; // In case our off timer is running... call OffTimer.stop(); call SendDoneTimer.stop(); if(call RadioPowerState.getState() == S_ON) { initializeSend(); return SUCCESS; } else { post startRadio(); } return SUCCESS; } return EBUSY; } command error_t Send.cancel(message_t *msg) { if(currentSendMsg == msg) { call SendState.toIdle(); call SendDoneTimer.stop(); startOffTimer(); return call SubSend.cancel(msg); } return FAIL; } command uint8_t Send.maxPayloadLength() { return call SubSend.maxPayloadLength(); } command void *Send.getPayload(message_t* msg, uint8_t len) { return call SubSend.getPayload(msg, len); } /***************** RadioBackoff Events ****************/ async event void RadioBackoff.requestInitialBackoff(message_t *msg) { if((call CC2420PacketBody.getMetadata(msg))->rxInterval > ONE_MESSAGE) { call RadioBackoff.setInitialBackoff( call Random.rand16() % (0x4 * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF); } } async event void RadioBackoff.requestCongestionBackoff(message_t *msg) { if((call CC2420PacketBody.getMetadata(msg))->rxInterval > ONE_MESSAGE) { call RadioBackoff.setCongestionBackoff( call Random.rand16() % (0x3 * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF); } } async event void RadioBackoff.requestCca(message_t *msg) { } /***************** DutyCycle Events ***************/ /** * A transmitter was detected. You must now take action to * turn the radio off when the transaction is complete. */ event void PowerCycle.detected() { // At this point, the duty cycling has been disabled temporary // and it will be this component's job to turn the radio back off // Wait long enough to see if we actually receive a packet, which is // just a little longer in case there is more than one lpl transmitter on // the channel. startOffTimer(); } /***************** SubControl Events ***************/ event void SubControl.startDone(error_t error) { if(!error) { call RadioPowerState.forceState(S_ON); if(call SendState.getState() == S_LPL_FIRST_MESSAGE || call SendState.getState() == S_LPL_SENDING) { initializeSend(); } } } event void SubControl.stopDone(error_t error) { if(!error) { if(call SendState.getState() == S_LPL_FIRST_MESSAGE || call SendState.getState() == S_LPL_SENDING) { // We're in the middle of sending a message; start the radio back up post startRadio(); } else { call OffTimer.stop(); call SendDoneTimer.stop(); } } } /***************** SubSend Events ***************/ event void SubSend.sendDone(message_t* msg, error_t error) { switch(call SendState.getState()) { case S_LPL_SENDING: if(call SendDoneTimer.isRunning()) { if(!call PacketAcknowledgements.wasAcked(msg)) { post resend(); return; } } break; case S_LPL_CLEAN_UP: /** * We include this state so upper layers can't send a different message * before the last message gets done sending */ break; default: break; } call SendState.toIdle(); call SendDoneTimer.stop(); startOffTimer(); signal Send.sendDone(msg, error); } /***************** SubReceive Events ***************/ /** * If the received message is new, we signal the receive event and * start the off timer. If the last message we received had the same * DSN as this message, then the chances are pretty good * that this message should be ignored, especially if the destination address * as the broadcast address */ event message_t *SubReceive.receive(message_t* msg, void* payload, uint8_t len) { startOffTimer(); return signal Receive.receive(msg, payload, len); } /***************** Timer Events ****************/ event void OffTimer.fired() { /* * Only stop the radio if the radio is supposed to be off permanently * or if the duty cycle is on and our sleep interval is not 0 */ if(call SplitControlState.getState() == S_OFF || (call PowerCycle.getSleepInterval() > 0 && call SplitControlState.getState() != S_OFF && call SendState.getState() == S_LPL_NOT_SENDING)) { post stopRadio(); } } /** * When this timer is running, that means we're sending repeating messages * to a node that is receive check duty cycling. */ event void SendDoneTimer.fired() { if(call SendState.getState() == S_LPL_SENDING) { // The next time SubSend.sendDone is signaled, send is complete. call SendState.forceState(S_LPL_CLEAN_UP); } } /***************** Resend Events ****************/ /** * Signal that a message has been sent * * @param p_msg message to send. * @param error notifaction of how the operation went. */ async event void Resend.sendDone( message_t* p_msg, error_t error ) { // This is actually caught by SubSend.sendDone } /***************** Tasks ***************/ task void send() { if(call SubSend.send(currentSendMsg, currentSendLen) != SUCCESS) { post send(); } } task void resend() { if(call Resend.resend(TRUE) != SUCCESS) { post resend(); } } task void startRadio() { if(call SubControl.start() != SUCCESS) { post startRadio(); } } task void stopRadio() { if(call SendState.getState() == S_LPL_NOT_SENDING) { if(call SubControl.stop() != SUCCESS) { post stopRadio(); } } } /***************** Functions ***************/ void initializeSend() { if(call LowPowerListening.getRemoteWakeupInterval(currentSendMsg) > ONE_MESSAGE) { if((call CC2420PacketBody.getHeader(currentSendMsg))->dest == IEEE154_BROADCAST_ADDR) { call PacketAcknowledgements.noAck(currentSendMsg); } else { // Send it repetitively within our transmit window call PacketAcknowledgements.requestAck(currentSendMsg); } call SendDoneTimer.startOneShot( call LowPowerListening.getRemoteWakeupInterval(currentSendMsg) + 20); } post send(); } void startOffTimer() { call OffTimer.startOneShot(call SystemLowPowerListening.getDelayAfterReceive()); } } tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/DummyLplC.nc000066400000000000000000000045211207233610700215520ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Dummy low power listening interface used when LowPowerListening is not * compiled in with the application. * Sleep interval is always 0, and duty cycle is always 100% * @author David Moss */ #warning "*** LOW POWER COMMUNICATIONS DISABLED ***" configuration DummyLplC { provides { interface Send; interface Receive; interface LowPowerListening; interface SplitControl; interface State as SendState; } uses { interface Send as SubSend; interface Receive as SubReceive; interface SplitControl as SubControl; } } implementation { components DummyLplP; components new StateC(); Send = SubSend; Receive = SubReceive; SplitControl = SubControl; LowPowerListening = DummyLplP; SendState = StateC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/DummyLplP.nc000066400000000000000000000043341207233610700215710ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Dummy low power listening interface used when LowPowerListening is not * compiled in with the application. * Wakeup interval is always 0 (always on) * @author David Moss */ module DummyLplP { provides { interface LowPowerListening; } } implementation { command void LowPowerListening.setLocalWakeupInterval(uint16_t intervalMs) { } command uint16_t LowPowerListening.getLocalWakeupInterval() { return 0; } command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs) { } command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { return 0; } } tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/PowerCycleC.nc000066400000000000000000000056141207233610700220670ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Use this component to duty cycle the radio. When a message is heard, * disable DutyCycling. * * @author David Moss dmm@rincon.com */ configuration PowerCycleC { provides { interface PowerCycle; interface SplitControl; interface State as SplitControlState; interface State as RadioPowerState; } } implementation { components PowerCycleP, CC2420TransmitC, CC2420ReceiveC, CC2420CsmaC, LedsC, new StateC() as RadioPowerStateC, new StateC() as SplitControlStateC, new TimerMilliC() as OnTimerC, new TimerMilliC() as CheckTimerC; #if defined(LOW_POWER_LISTENING) || defined(ACK_LOW_POWER_LISTENING) components DefaultLplC as LplC; #else components DummyLplC as LplC; #endif PowerCycle = PowerCycleP; SplitControl = PowerCycleP; SplitControlState = SplitControlStateC; RadioPowerState = RadioPowerStateC; PowerCycleP.EnergyIndicator -> CC2420TransmitC.EnergyIndicator; PowerCycleP.ByteIndicator -> CC2420TransmitC.ByteIndicator; PowerCycleP.PacketIndicator -> CC2420ReceiveC.PacketIndicator; PowerCycleP.SubControl -> CC2420CsmaC; PowerCycleP.SendState -> LplC; PowerCycleP.RadioPowerState -> RadioPowerStateC; PowerCycleP.SplitControlState -> SplitControlStateC; PowerCycleP.OnTimer -> OnTimerC; PowerCycleP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/PowerCycleP.nc000066400000000000000000000221531207233610700221010ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Module to duty cycle the radio on and off, performing CCA receive checks. * When a carrier is sensed, this will leave the radio on. It is then up * to higher layers to turn the radio off again. Once the radio is turned * off, this module will automatically continue duty cycling and looking for * a modulated signal. * * Suggested TODO's: * > TransmitC and ReceiveC provide Energy, Byte, and Packet indicators. * Tap into those to add more detection levels and granularity. Only let * the radio turn off when we're not actively receiving bytes. Right now * the packet indicator is a little backwards. * > Let one component be in charge of maintaining State information about * the power of the radio, probably lower in the stack. * > Wire SplitControl, Send, and Receive through this component. Make it * responsible for packet-level detections and being completely responsible * for controlling the power of the radio without the use of upper layers * > Remove unnecessary State components and Timers. * * @author David Moss */ #include "DefaultLpl.h" module PowerCycleP { provides { interface PowerCycle; interface SplitControl; } uses { interface Timer as OnTimer; interface SplitControl as SubControl; interface State as RadioPowerState; interface State as SplitControlState; interface State as SendState; interface Leds; interface ReceiveIndicator as EnergyIndicator; interface ReceiveIndicator as ByteIndicator; interface ReceiveIndicator as PacketIndicator; } } implementation { /** The current period of the duty cycle, equivalent of wakeup interval */ uint16_t sleepInterval = LPL_DEF_LOCAL_WAKEUP; /** The number of times the CCA has been sampled in this wakeup period */ uint16_t ccaChecks; /** * Radio Power, Check State, and Duty Cycling State */ enum { S_OFF, // off by default S_TURNING_ON, S_ON, S_TURNING_OFF, }; /***************** Prototypes ****************/ task void stopRadio(); task void startRadio(); task void getCca(); bool finishSplitControlRequests(); bool isDutyCycling(); /***************** PowerCycle Commands ****************/ /** * Set the sleep interval, in binary milliseconds * @param sleepIntervalMs the sleep interval in [ms] */ command void PowerCycle.setSleepInterval(uint16_t sleepIntervalMs) { if (!sleepInterval && sleepIntervalMs) { // We were always on, now lets duty cycle post stopRadio(); // Might want to delay turning off the radio } sleepInterval = sleepIntervalMs; if(sleepInterval == 0 && call SplitControlState.isState(S_ON)) { /* * Leave the radio on permanently if sleepInterval == 0 and the radio is * supposed to be enabled */ if(call RadioPowerState.getState() == S_OFF) { call SubControl.start(); } } } /** * @return the sleep interval in [ms] */ command uint16_t PowerCycle.getSleepInterval() { return sleepInterval; } /***************** SplitControl Commands ****************/ command error_t SplitControl.start() { if(call SplitControlState.isState(S_ON)) { return EALREADY; } else if(call SplitControlState.isState(S_TURNING_ON)) { return SUCCESS; } else if(!call SplitControlState.isState(S_OFF)) { return EBUSY; } // Radio was off, now has been told to turn on or duty cycle. call SplitControlState.forceState(S_TURNING_ON); if(sleepInterval > 0) { // Begin duty cycling post stopRadio(); return SUCCESS; } else { post startRadio(); return SUCCESS; } } command error_t SplitControl.stop() { if(call SplitControlState.isState(S_OFF)) { return EALREADY; } else if(call SplitControlState.isState(S_TURNING_OFF)) { return SUCCESS; } else if(!call SplitControlState.isState(S_ON)) { return EBUSY; } call SplitControlState.forceState(S_TURNING_OFF); post stopRadio(); return SUCCESS; } /***************** Timer Events ****************/ event void OnTimer.fired() { if(isDutyCycling()) { if(call RadioPowerState.getState() == S_OFF) { ccaChecks = 0; /* * Turn on the radio only after the uC is fully awake. ATmega128's * have this issue when running on an external crystal. */ post getCca(); } else { // Someone else turned on the radio, try again in awhile call OnTimer.startOneShot(sleepInterval); } } } /***************** SubControl Events ****************/ event void SubControl.startDone(error_t error) { call RadioPowerState.forceState(S_ON); //call Leds.led2On(); if(finishSplitControlRequests()) { return; } else if(isDutyCycling()) { post getCca(); } } event void SubControl.stopDone(error_t error) { call RadioPowerState.forceState(S_OFF); //call Leds.led2Off(); if(finishSplitControlRequests()) { return; } else if(isDutyCycling()) { call OnTimer.startOneShot(sleepInterval); } } /***************** Tasks ****************/ task void stopRadio() { error_t error = call SubControl.stop(); if(error != SUCCESS) { // Already stopped? finishSplitControlRequests(); call OnTimer.startOneShot(sleepInterval); } } task void startRadio() { error_t startResult = call SubControl.start(); // If the radio wasn't started successfully, or already on, try again if ((startResult != SUCCESS && startResult != EALREADY)) { post startRadio(); } } task void getCca() { uint8_t detects = 0; if(isDutyCycling()) { ccaChecks++; if(ccaChecks == 1) { // Microcontroller is ready, turn on the radio and sample a few times post startRadio(); return; } atomic { for( ; ccaChecks < MAX_LPL_CCA_CHECKS && call SendState.isIdle(); ccaChecks++) { if(call PacketIndicator.isReceiving()) { signal PowerCycle.detected(); return; } if(call EnergyIndicator.isReceiving()) { detects++; if(detects > MIN_SAMPLES_BEFORE_DETECT) { signal PowerCycle.detected(); return; } // Leave the radio on for upper layers to perform some transaction } } } if(call SendState.isIdle()) { post stopRadio(); } } } /** * @return TRUE if the radio should be actively duty cycling */ bool isDutyCycling() { return sleepInterval > 0 && call SplitControlState.isState(S_ON); } /** * @return TRUE if we successfully handled a SplitControl request */ bool finishSplitControlRequests() { if(call SplitControlState.isState(S_TURNING_OFF)) { call SplitControlState.forceState(S_OFF); signal SplitControl.stopDone(SUCCESS); return TRUE; } else if(call SplitControlState.isState(S_TURNING_ON)) { // Starting while we're duty cycling first turns off the radio call SplitControlState.forceState(S_ON); signal SplitControl.startDone(SUCCESS); return TRUE; } return FALSE; } /**************** Defaults ****************/ default event void PowerCycle.detected() { } default event void SplitControl.startDone(error_t error) { } default event void SplitControl.stopDone(error_t error) { } } tinyos-2.1.2+dfsg/tos/chips/cc2420/lpl/readme.txt000066400000000000000000000117011207233610700213560ustar00rootroot00000000000000 ARCHITECTURE ======================================================= The default LPL implementation uses a packet train with acknowledgements enabled, shortened backoffs, and a spinning energy checking loop. The default strategy can be improved by implementing a different architecture. Right now the architecture looks like this: +----------------------------------+ | DefaultLplP | -> To lower level Send | Responsible for retransmissions | -> To lower level SplitControl | and turning the radio off when | <- From lower level Receive | done, or on when starting to | | transmit | +----------------------------------+ | PowerCycleP | | Responsible for performing | -> To lower level SplitControl | receive checks and leaving the | | radio on | +----------------------------------+ I think the architecture should be changed. If you're interested in doing work in this area, there's lots of development and research to be done. First, take a look at tinyos-2.x-contrib/wustl/upma. The architecture of the CC2420 stack there is implemented to define a low-level abstraction layer which separates radio-specific functionality from radio-independent functionality. This is nice. By providing certain interfaces from the radio-dependant functionality, it makes it easier to maintain MAC layer stuff independent of the radio. And that includes LPL. One of the things that radio stack uses is an Alarm instead of a spinning task/while loop. Whereas the implementation here uses a static number of loops to detect if energy is on the channel, we would be better able to achieve the smallest radio asynchronous receive check on-time by using an alarm. After all, the radio only has to be on to span the quiet gaps in a transmitter's transmission, and we know approximately the duration of those quiet gaps based on the backoff period, which the stack defines. I recommend we redo some of the LPL architecture to look more like this: +----------------------------------+ | DefaultLplP | | Responsible for retransmissions | +----------------------------------+ | | | (Send, Receive, SplitControl goes through PowerCycle) +----------------------------------+ | PowerCycleP | | Responsible for managing radio | -> To lower level Send | on/off power, and telling | -> To lower level SplitControl | PacketDetectP when to start/stop | <- From lower level Receive | its job | +----------------------------------+ | PacketDetectP | | Responsible for detecting | <- EnergyIndicator | energy, bytes, and/or packets. | <- ByteIndicator | Notify PowerCycle when packets | <- PacketIndicator | are detected | +----------------------------------+ This is pretty radio independent. OTHER LOW POWER LISTENING STRATEGIES ============================================================= Other low power listening layers can be implemented as well: * Continuous modulation / No Acknowledgements: > Allows the receiver to achieve the lowest possible receive check on time. It's shown to be several times more efficient on the receive check than the default. This is a radio-dependent LPL strategy and the CC2420 can acheive it by putting some transmit register into test mode where it continually retransmits the contents of the TXFIFO. The CRC of the packet must be uploaded into the TXFIFO because it won't be calculated by the CC2420. Not sure if the preamble and sync bytes need to be uploaded as well. The transmitter takes a hit because it cannot receive acks in the middle of its packet train. But since the receiver's energy consumption is so low, it's possible to increase the number of receive checks in order to lower the duration of the transmission. > This strategy would be a good match for networks that must get data through quickly when there is data, but doesn't see too many transmissions in any given geographical area of the network. Also a good strategy where your transmitters have more power. * 802.15.4/ZigBee End Node: > Queue up packets to Send to a particular destination until that node checks in at some random time. Use fields in the ack frame to let the node know that packets are available. Good match for networks where one node has access to line power and other nodes are on batteries. * Low throughput acknowledgement LPL: > Just like the default, only it uses the ByteIndicator to turn off the radio as soon as it stops receiving bytes and no packet was received. Able to get a much shorter receive check at the expense of decreased probability that you'll receive messages in a congested network. tinyos-2.1.2+dfsg/tos/chips/cc2420/packet/000077500000000000000000000000001207233610700200405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/packet/CC2420PacketC.nc000066400000000000000000000052711207233610700224170ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Chad Metcalf */ configuration CC2420PacketC { provides { interface CC2420Packet; interface PacketAcknowledgements as Acks; interface CC2420PacketBody; interface LinkPacketMetadata; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeSyncOffset; } } implementation { components CC2420PacketP; CC2420Packet = CC2420PacketP; Acks = CC2420PacketP; CC2420PacketBody = CC2420PacketP; LinkPacketMetadata = CC2420PacketP; PacketTimeStamp32khz = CC2420PacketP; PacketTimeStampMilli = CC2420PacketP; PacketTimeSyncOffset = CC2420PacketP; components Counter32khz32C, new CounterToLocalTimeC(T32khz); CounterToLocalTimeC.Counter -> Counter32khz32C; CC2420PacketP.LocalTime32khz -> CounterToLocalTimeC; //DummyTimer is introduced to compile apps that use no timers components HilTimerMilliC, new TimerMilliC() as DummyTimer; CC2420PacketP.LocalTimeMilli -> HilTimerMilliC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/packet/CC2420PacketP.nc000066400000000000000000000200071207233610700224260ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Chad Metcalf */ #include "IEEE802154.h" #include "message.h" #include "CC2420.h" #include "CC2420TimeSyncMessage.h" module CC2420PacketP @safe() { provides { interface CC2420Packet; interface PacketAcknowledgements as Acks; interface CC2420PacketBody; interface LinkPacketMetadata; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeSyncOffset; } uses interface Packet; uses interface LocalTime as LocalTime32khz; uses interface LocalTime as LocalTimeMilli; } implementation { /***************** PacketAcknowledgement Commands ****************/ async command error_t Acks.requestAck( message_t* p_msg ) { (call CC2420PacketBody.getHeader( p_msg ))->fcf |= 1 << IEEE154_FCF_ACK_REQ; return SUCCESS; } async command error_t Acks.noAck( message_t* p_msg ) { (call CC2420PacketBody.getHeader( p_msg ))->fcf &= ~(1 << IEEE154_FCF_ACK_REQ); return SUCCESS; } async command bool Acks.wasAcked( message_t* p_msg ) { return (call CC2420PacketBody.getMetadata( p_msg ))->ack; } /***************** CC2420Packet Commands ****************/ int getAddressLength(int type) { switch (type) { case IEEE154_ADDR_SHORT: return 2; case IEEE154_ADDR_EXT: return 8; case IEEE154_ADDR_NONE: return 0; default: return -100; } } uint8_t * ONE getNetwork(message_t * ONE msg) { cc2420_header_t *hdr = (call CC2420PacketBody.getHeader( msg )); int offset; offset = getAddressLength((hdr->fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 0x3) + getAddressLength((hdr->fcf >> IEEE154_FCF_SRC_ADDR_MODE) & 0x3) + offsetof(cc2420_header_t, dest); return ((uint8_t *)hdr) + offset; } async command void CC2420Packet.setPower( message_t* p_msg, uint8_t power ) { if ( power > 31 ) power = 31; (call CC2420PacketBody.getMetadata( p_msg ))->tx_power = power; } async command uint8_t CC2420Packet.getPower( message_t* p_msg ) { return (call CC2420PacketBody.getMetadata( p_msg ))->tx_power; } async command int8_t CC2420Packet.getRssi( message_t* p_msg ) { return (call CC2420PacketBody.getMetadata( p_msg ))->rssi; } async command uint8_t CC2420Packet.getLqi( message_t* p_msg ) { return (call CC2420PacketBody.getMetadata( p_msg ))->lqi; } async command uint8_t CC2420Packet.getNetwork( message_t* ONE p_msg ) { #if defined(TFRAMES_ENABLED) return TINYOS_6LOWPAN_NETWORK_ID; #else atomic return *(getNetwork(p_msg)); #endif } async command void CC2420Packet.setNetwork( message_t* ONE p_msg , uint8_t networkId ) { #if ! defined(TFRAMES_ENABLED) atomic *(getNetwork(p_msg)) = networkId; #endif } /***************** CC2420PacketBody Commands ****************/ async command cc2420_header_t * ONE CC2420PacketBody.getHeader( message_t* ONE msg ) { return TCAST(cc2420_header_t* ONE, (uint8_t *)msg + offsetof(message_t, data) - sizeof( cc2420_header_t )); } async command uint8_t * CC2420PacketBody.getPayload( message_t* msg) { cc2420_header_t *hdr = (call CC2420PacketBody.getHeader( msg )); int offset; offset = getAddressLength((hdr->fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 0x3) + getAddressLength((hdr->fcf >> IEEE154_FCF_SRC_ADDR_MODE) & 0x3) + offsetof(cc2420_header_t, dest); return ((uint8_t *)hdr) + offset; } async command cc2420_metadata_t *CC2420PacketBody.getMetadata( message_t* msg ) { return (cc2420_metadata_t*)msg->metadata; } async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { return call CC2420Packet.getLqi(msg) > 105; } /***************** PacketTimeStamp32khz Commands ****************/ async command bool PacketTimeStamp32khz.isValid(message_t* msg) { return ((call CC2420PacketBody.getMetadata( msg ))->timestamp != CC2420_INVALID_TIMESTAMP); } async command uint32_t PacketTimeStamp32khz.timestamp(message_t* msg) { return (call CC2420PacketBody.getMetadata( msg ))->timestamp; } async command void PacketTimeStamp32khz.clear(message_t* msg) { (call CC2420PacketBody.getMetadata( msg ))->timesync = FALSE; (call CC2420PacketBody.getMetadata( msg ))->timestamp = CC2420_INVALID_TIMESTAMP; } async command void PacketTimeStamp32khz.set(message_t* msg, uint32_t value) { (call CC2420PacketBody.getMetadata( msg ))->timestamp = value; } /***************** PacketTimeStampMilli Commands ****************/ // over the air value is always T32khz, which is used to capture SFD interrupt // (Timer1 on micaZ, B1 on telos) async command bool PacketTimeStampMilli.isValid(message_t* msg) { return call PacketTimeStamp32khz.isValid(msg); } //timestmap is always represented in 32khz //28.1 is coefficient difference between T32khz and TMilli on MicaZ async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg) { int32_t offset = (call LocalTime32khz.get()-call PacketTimeStamp32khz.timestamp(msg)); offset/=28.1; return call LocalTimeMilli.get() - offset; } async command void PacketTimeStampMilli.clear(message_t* msg) { call PacketTimeStamp32khz.clear(msg); } async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value) { int32_t offset = (value - call LocalTimeMilli.get()) << 5; call PacketTimeStamp32khz.set(msg, offset + call LocalTime32khz.get()); } /*----------------- PacketTimeSyncOffset -----------------*/ async command bool PacketTimeSyncOffset.isSet(message_t* msg) { return ((call CC2420PacketBody.getMetadata( msg ))->timesync); } //returns offset of timestamp from the beginning of cc2420 header which is // sizeof(cc2420_header_t)+datalen-sizeof(timesync_radio_t) //uses packet length of the message which is // MAC_HEADER_SIZE+MAC_FOOTER_SIZE+datalen async command uint8_t PacketTimeSyncOffset.get(message_t* msg) { return (call CC2420PacketBody.getHeader(msg))->length + (sizeof(cc2420_header_t) - MAC_HEADER_SIZE) - MAC_FOOTER_SIZE - sizeof(timesync_radio_t); } async command void PacketTimeSyncOffset.set(message_t* msg) { (call CC2420PacketBody.getMetadata( msg ))->timesync = TRUE; } async command void PacketTimeSyncOffset.cancel(message_t* msg) { (call CC2420PacketBody.getMetadata( msg ))->timesync = FALSE; } } tinyos-2.1.2+dfsg/tos/chips/cc2420/receive/000077500000000000000000000000001207233610700202135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/receive/CC2420ReceiveC.nc000066400000000000000000000063711207233610700227470ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the receive path for the ChipCon CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2009-08-14 20:33:43 $ */ configuration CC2420ReceiveC { provides interface StdControl; provides interface CC2420Receive; provides interface Receive; provides interface ReceiveIndicator as PacketIndicator; } implementation { components MainC; components CC2420ReceiveP; components CC2420PacketC; components new CC2420SpiC() as Spi; components CC2420ControlC; components HplCC2420PinsC as Pins; components HplCC2420InterruptsC as InterruptsC; components LedsC as Leds; CC2420ReceiveP.Leds -> Leds; StdControl = CC2420ReceiveP; CC2420Receive = CC2420ReceiveP; Receive = CC2420ReceiveP; PacketIndicator = CC2420ReceiveP.PacketIndicator; MainC.SoftwareInit -> CC2420ReceiveP; CC2420ReceiveP.CSN -> Pins.CSN; CC2420ReceiveP.FIFO -> Pins.FIFO; CC2420ReceiveP.FIFOP -> Pins.FIFOP; CC2420ReceiveP.InterruptFIFOP -> InterruptsC.InterruptFIFOP; CC2420ReceiveP.SpiResource -> Spi; CC2420ReceiveP.RXFIFO -> Spi.RXFIFO; CC2420ReceiveP.SFLUSHRX -> Spi.SFLUSHRX; CC2420ReceiveP.SACK -> Spi.SACK; CC2420ReceiveP.CC2420Packet -> CC2420PacketC; CC2420ReceiveP.CC2420PacketBody -> CC2420PacketC; CC2420ReceiveP.PacketTimeStamp -> CC2420PacketC; CC2420ReceiveP.CC2420Config -> CC2420ControlC; CC2420ReceiveP.SECCTRL0 -> Spi.SECCTRL0; CC2420ReceiveP.SECCTRL1 -> Spi.SECCTRL1; CC2420ReceiveP.SRXDEC -> Spi.SRXDEC; CC2420ReceiveP.RXNONCE -> Spi.RXNONCE; CC2420ReceiveP.KEY0 -> Spi.KEY0; CC2420ReceiveP.KEY1 -> Spi.KEY1; CC2420ReceiveP.RXFIFO_RAM -> Spi.RXFIFO_RAM; CC2420ReceiveP.SNOP -> Spi.SNOP; } tinyos-2.1.2+dfsg/tos/chips/cc2420/receive/CC2420ReceiveP.nc000066400000000000000000000575571207233610700230000ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Jung Il Choi * @author JeongGil Ko * @author Razvan Musaloiu-E * @version $Revision: 1.21 $ $Date: 2009/09/17 23:36:36 $ */ #include "IEEE802154.h" #include "message.h" #include "AM.h" module CC2420ReceiveP @safe() { provides interface Init; provides interface StdControl; provides interface CC2420Receive; provides interface Receive; provides interface ReceiveIndicator as PacketIndicator; uses interface GeneralIO as CSN; uses interface GeneralIO as FIFO; uses interface GeneralIO as FIFOP; uses interface GpioInterrupt as InterruptFIFOP; uses interface Resource as SpiResource; uses interface CC2420Fifo as RXFIFO; uses interface CC2420Strobe as SACK; uses interface CC2420Strobe as SFLUSHRX; uses interface CC2420Packet; uses interface CC2420PacketBody; uses interface CC2420Config; uses interface PacketTimeStamp; uses interface CC2420Strobe as SRXDEC; uses interface CC2420Register as SECCTRL0; uses interface CC2420Register as SECCTRL1; uses interface CC2420Ram as KEY0; uses interface CC2420Ram as KEY1; uses interface CC2420Ram as RXNONCE; uses interface CC2420Ram as RXFIFO_RAM; uses interface CC2420Strobe as SNOP; uses interface Leds; } implementation { typedef enum { S_STOPPED, S_STARTED, S_RX_LENGTH, S_RX_DEC, S_RX_DEC_WAIT, S_RX_FCF, S_RX_PAYLOAD, } cc2420_receive_state_t; enum { RXFIFO_SIZE = 128, TIMESTAMP_QUEUE_SIZE = 8, SACK_HEADER_LENGTH = 7, }; uint32_t m_timestamp_queue[ TIMESTAMP_QUEUE_SIZE ]; uint8_t m_timestamp_head; uint8_t m_timestamp_size; /** Number of packets we missed because we were doing something else */ #ifdef CC2420_HW_SECURITY norace uint8_t m_missed_packets; #else uint8_t m_missed_packets; #endif /** TRUE if we are receiving a valid packet into the stack */ bool receivingPacket; /** The length of the frame we're currently receiving */ norace uint8_t rxFrameLength; norace uint8_t m_bytes_left; norace message_t* ONE_NOK m_p_rx_buf; message_t m_rx_buf; #ifdef CC2420_HW_SECURITY norace cc2420_receive_state_t m_state; norace uint8_t packetLength = 0; norace uint8_t pos = 0; norace uint8_t secHdrPos = 0; uint8_t nonceValue[16] = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01}; norace uint8_t skip; norace uint8_t securityOn = 0; norace uint8_t authentication = 0; norace uint8_t micLength = 0; uint8_t flush_flag = 0; uint16_t startTime = 0; void beginDec(); void dec(); #else cc2420_receive_state_t m_state; #endif /***************** Prototypes ****************/ void reset_state(); void beginReceive(); void receive(); void waitForNextPacket(); void flush(); bool passesAddressCheck(message_t * ONE msg); task void receiveDone_task(); /***************** Init Commands ****************/ command error_t Init.init() { m_p_rx_buf = &m_rx_buf; return SUCCESS; } /***************** StdControl ****************/ command error_t StdControl.start() { atomic { reset_state(); m_state = S_STARTED; atomic receivingPacket = FALSE; /* Note: We use the falling edge because the FIFOP polarity is reversed. This is done in CC2420Power.startOscillator from CC2420ControlP.nc. */ call InterruptFIFOP.enableFallingEdge(); } return SUCCESS; } command error_t StdControl.stop() { atomic { m_state = S_STOPPED; reset_state(); call CSN.set(); call InterruptFIFOP.disable(); } return SUCCESS; } /***************** CC2420Receive Commands ****************/ /** * Start frame delimiter signifies the beginning/end of a packet * See the CC2420 datasheet for details. */ async command void CC2420Receive.sfd( uint32_t time ) { if ( m_timestamp_size < TIMESTAMP_QUEUE_SIZE ) { uint8_t tail = ( ( m_timestamp_head + m_timestamp_size ) % TIMESTAMP_QUEUE_SIZE ); m_timestamp_queue[ tail ] = time; m_timestamp_size++; } } async command void CC2420Receive.sfd_dropped() { if ( m_timestamp_size ) { m_timestamp_size--; } } /***************** PacketIndicator Commands ****************/ command bool PacketIndicator.isReceiving() { bool receiving; atomic { receiving = receivingPacket; } return receiving; } /***************** InterruptFIFOP Events ****************/ async event void InterruptFIFOP.fired() { if ( m_state == S_STARTED ) { #ifndef CC2420_HW_SECURITY m_state = S_RX_LENGTH; beginReceive(); #else m_state = S_RX_DEC; atomic receivingPacket = TRUE; beginDec(); #endif } else { m_missed_packets++; } } /*****************Decryption Options*********************/ #ifdef CC2420_HW_SECURITY task void waitTask(){ if(SECURITYLOCK == 1){ post waitTask(); }else{ m_state = S_RX_DEC; beginDec(); } } void beginDec(){ if(call SpiResource.isOwner()) { dec(); } else if (call SpiResource.immediateRequest() == SUCCESS) { dec(); } else { call SpiResource.request(); } } norace uint8_t decLoopCount = 0; task void waitDecTask(){ cc2420_status_t status; call CSN.clr(); status = call SNOP.strobe(); call CSN.set(); atomic decLoopCount ++; if(decLoopCount > 10){ call CSN.clr(); atomic call SECCTRL0.write((0 << CC2420_SECCTRL0_SEC_MODE) | (0 << CC2420_SECCTRL0_SEC_M) | (0 << CC2420_SECCTRL0_SEC_RXKEYSEL) | (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) | (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ; call CSN.set(); SECURITYLOCK = 0; call SpiResource.release(); atomic flush_flag = 1; beginReceive(); }else if(status & CC2420_STATUS_ENC_BUSY){ post waitDecTask(); }else{ call CSN.clr(); atomic call SECCTRL0.write((0 << CC2420_SECCTRL0_SEC_MODE) | (0 << CC2420_SECCTRL0_SEC_M) | (0 << CC2420_SECCTRL0_SEC_RXKEYSEL) | (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) | (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ; call CSN.set(); SECURITYLOCK = 0; call SpiResource.release(); beginReceive(); } } void waitDec(){ cc2420_status_t status; call CSN.clr(); status = call SNOP.strobe(); call CSN.set(); if(status & CC2420_STATUS_ENC_BUSY){ atomic decLoopCount = 1; post waitDecTask(); }else{ call CSN.clr(); atomic call SECCTRL0.write((0 << CC2420_SECCTRL0_SEC_MODE) | (0 << CC2420_SECCTRL0_SEC_M) | (0 << CC2420_SECCTRL0_SEC_RXKEYSEL) | (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) | (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ; call CSN.set(); SECURITYLOCK = 0; call SpiResource.release(); beginReceive(); } } void dec(){ cc2420_header_t header; security_header_t secHdr; uint8_t mode, key, temp, crc; atomic pos = (packetLength+pos)%RXFIFO_SIZE; #if ! defined(TFRAMES_ENABLED) atomic secHdrPos = (pos+11)%RXFIFO_SIZE; #else atomic secHdrPos = (pos+10)%RXFIFO_SIZE; #endif if (pos + 3 > RXFIFO_SIZE){ temp = RXFIFO_SIZE - pos; call CSN.clr(); atomic call RXFIFO_RAM.read(pos,(uint8_t*)&header, temp); call CSN.set(); call CSN.clr(); atomic call RXFIFO_RAM.read(0,(uint8_t*)&header+temp, 3-temp); call CSN.set(); }else{ call CSN.clr(); atomic call RXFIFO_RAM.read(pos,(uint8_t*)&header, 3); call CSN.set(); } packetLength = header.length+1; if(packetLength == 6){ // ACK packet m_state = S_RX_LENGTH; call SpiResource.release(); beginReceive(); return; } if (pos + sizeof(cc2420_header_t) > RXFIFO_SIZE){ temp = RXFIFO_SIZE - pos; call CSN.clr(); atomic call RXFIFO_RAM.read(pos,(uint8_t*)&header, temp); call CSN.set(); call CSN.clr(); atomic call RXFIFO_RAM.read(0,(uint8_t*)&header+temp, sizeof(cc2420_header_t)-temp); call CSN.set(); }else{ call CSN.clr(); atomic call RXFIFO_RAM.read(pos,(uint8_t*)&header, sizeof(cc2420_header_t)); call CSN.set(); } if (pos+header.length+1 > RXFIFO_SIZE){ temp = header.length - (RXFIFO_SIZE - pos); call CSN.clr(); atomic call RXFIFO_RAM.read(temp,&crc, 1); call CSN.set(); }else{ call CSN.clr(); atomic call RXFIFO_RAM.read(pos+header.length,&crc, 1); call CSN.set(); } if(header.length+1 > RXFIFO_SIZE || !(crc << 7)){ atomic flush_flag = 1; m_state = S_RX_LENGTH; call SpiResource.release(); beginReceive(); return; } if( (header.fcf & (1 << IEEE154_FCF_SECURITY_ENABLED)) && (crc << 7) ){ if(call CC2420Config.isAddressRecognitionEnabled()){ if(!(header.dest==call CC2420Config.getShortAddr() || header.dest==AM_BROADCAST_ADDR)){ packetLength = header.length + 1; m_state = S_RX_LENGTH; call SpiResource.release(); beginReceive(); return; } } if(SECURITYLOCK == 1){ call SpiResource.release(); post waitTask(); return; }else{ //We are going to decrypt so lock the registers atomic SECURITYLOCK = 1; if (secHdrPos + sizeof(security_header_t) > RXFIFO_SIZE){ temp = RXFIFO_SIZE - secHdrPos; call CSN.clr(); atomic call RXFIFO_RAM.read(secHdrPos,(uint8_t*)&secHdr, temp); call CSN.set(); call CSN.clr(); atomic call RXFIFO_RAM.read(0,(uint8_t*)&secHdr+temp, sizeof(security_header_t) - temp); call CSN.set(); } else { call CSN.clr(); atomic call RXFIFO_RAM.read(secHdrPos,(uint8_t*)&secHdr, sizeof(security_header_t)); call CSN.set(); } key = secHdr.keyID[0]; if (secHdr.secLevel == NO_SEC){ mode = CC2420_NO_SEC; micLength = 0; }else if (secHdr.secLevel == CBC_MAC_4){ mode = CC2420_CBC_MAC; micLength = 4; }else if (secHdr.secLevel == CBC_MAC_8){ mode = CC2420_CBC_MAC; micLength = 8; }else if (secHdr.secLevel == CBC_MAC_16){ mode = CC2420_CBC_MAC; micLength = 16; }else if (secHdr.secLevel == CTR){ mode = CC2420_CTR; micLength = 0; }else if (secHdr.secLevel == CCM_4){ mode = CC2420_CCM; micLength = 4; }else if (secHdr.secLevel == CCM_8){ mode = CC2420_CCM; micLength = 8; }else if (secHdr.secLevel == CCM_16){ mode = CC2420_CCM; micLength = 16; }else{ atomic SECURITYLOCK = 0; packetLength = header.length + 1; m_state = S_RX_LENGTH; call SpiResource.release(); beginReceive(); return; } if(mode < 4 && mode > 0) { // if mode is valid securityOn = 1; memcpy(&nonceValue[3], &(secHdr.frameCounter), 4); skip = secHdr.reserved; if(mode == CC2420_CBC_MAC || mode == CC2420_CCM){ authentication = 1; call CSN.clr(); atomic call SECCTRL0.write((mode << CC2420_SECCTRL0_SEC_MODE) | ((micLength-2)/2 << CC2420_SECCTRL0_SEC_M) | (key << CC2420_SECCTRL0_SEC_RXKEYSEL) | (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) | (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ; call CSN.set(); }else{ call CSN.clr(); atomic call SECCTRL0.write((mode << CC2420_SECCTRL0_SEC_MODE) | (1 << CC2420_SECCTRL0_SEC_M) | (key << CC2420_SECCTRL0_SEC_RXKEYSEL) | (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) | (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ; call CSN.set(); } call CSN.clr(); #ifndef TFRAMES_ENABLED atomic call SECCTRL1.write(skip+11+sizeof(security_header_t)+((skip+11+sizeof(security_header_t))<<8)); #else atomic call SECCTRL1.write(skip+10+sizeof(security_header_t)+((skip+10+sizeof(security_header_t))<<8)); #endif call CSN.set(); call CSN.clr(); atomic call RXNONCE.write(0, nonceValue, 16); call CSN.set(); call CSN.clr(); atomic call SRXDEC.strobe(); call CSN.set(); atomic decLoopCount = 0; post waitDecTask(); return; }else{ atomic SECURITYLOCK = 0; packetLength = header.length + 1; m_state = S_RX_LENGTH; call SpiResource.release(); beginReceive(); return; } } }else{ packetLength = header.length + 1; m_state = S_RX_LENGTH; call SpiResource.release(); beginReceive(); return; } } #endif /***************** SpiResource Events ****************/ event void SpiResource.granted() { #ifdef CC2420_HW_SECURITY if(m_state == S_RX_DEC){ dec(); }else{ receive(); } #else receive(); #endif } /***************** RXFIFO Events ****************/ /** * We received some bytes from the SPI bus. Process them in the context * of the state we're in. Remember the length byte is not part of the length */ async event void RXFIFO.readDone( uint8_t* rx_buf, uint8_t rx_len, error_t error ) { cc2420_header_t* header = call CC2420PacketBody.getHeader( m_p_rx_buf ); uint8_t tmpLen __DEPUTY_UNUSED__ = sizeof(message_t) - (offsetof(message_t, data) - sizeof(cc2420_header_t)); uint8_t* COUNT(tmpLen) buf = TCAST(uint8_t* COUNT(tmpLen), header); rxFrameLength = buf[ 0 ]; switch( m_state ) { case S_RX_LENGTH: m_state = S_RX_FCF; #ifdef CC2420_HW_SECURITY packetLength = rxFrameLength+1; #endif if ( rxFrameLength + 1 > m_bytes_left #ifdef CC2420_HW_SECURITY || flush_flag == 1 #endif ) { // Length of this packet is bigger than the RXFIFO, flush it out. flush(); } else { if ( !call FIFO.get() && !call FIFOP.get() ) { m_bytes_left -= rxFrameLength + 1; } if(rxFrameLength <= MAC_PACKET_SIZE) { if(rxFrameLength > 0) { if(rxFrameLength > SACK_HEADER_LENGTH) { // This packet has an FCF byte plus at least one more byte to read call RXFIFO.continueRead(buf + 1, SACK_HEADER_LENGTH); } else { // This is really a bad packet, skip FCF and get it out of here. m_state = S_RX_PAYLOAD; call RXFIFO.continueRead(buf + 1, rxFrameLength); } } else { // Length == 0; start reading the next packet atomic receivingPacket = FALSE; call CSN.set(); call SpiResource.release(); waitForNextPacket(); } } else { // Length is too large; we have to flush the entire Rx FIFO flush(); } } break; case S_RX_FCF: m_state = S_RX_PAYLOAD; /* * The destination address check here is not completely optimized. If you * are seeing issues with dropped acknowledgements, try removing * the address check and decreasing SACK_HEADER_LENGTH to 2. * The length byte and the FCF byte are the only two bytes required * to know that the packet is valid and requested an ack. The destination * address is useful when we want to sniff packets from other transmitters * while acknowledging packets that were destined for our local address. */ if(call CC2420Config.isAutoAckEnabled() && !call CC2420Config.isHwAutoAckDefault()) { if (((( header->fcf >> IEEE154_FCF_ACK_REQ ) & 0x01) == 1) && ((header->dest == call CC2420Config.getShortAddr()) || (header->dest == AM_BROADCAST_ADDR)) && ((( header->fcf >> IEEE154_FCF_FRAME_TYPE ) & 7) == IEEE154_TYPE_DATA)) { // CSn flippage cuts off our FIFO; SACK and begin reading again call CSN.set(); call CSN.clr(); call SACK.strobe(); call CSN.set(); call CSN.clr(); call RXFIFO.beginRead(buf + 1 + SACK_HEADER_LENGTH, rxFrameLength - SACK_HEADER_LENGTH); return; } } // Didn't flip CSn, we're ok to continue reading. call RXFIFO.continueRead(buf + 1 + SACK_HEADER_LENGTH, rxFrameLength - SACK_HEADER_LENGTH); break; case S_RX_PAYLOAD: call CSN.set(); if(!m_missed_packets) { // Release the SPI only if there are no more frames to download call SpiResource.release(); } //new packet is buffered up, or we don't have timestamp in fifo, or ack if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get() || !m_timestamp_size || rxFrameLength <= 10) { call PacketTimeStamp.clear(m_p_rx_buf); } else { if (m_timestamp_size==1) call PacketTimeStamp.set(m_p_rx_buf, m_timestamp_queue[ m_timestamp_head ]); m_timestamp_head = ( m_timestamp_head + 1 ) % TIMESTAMP_QUEUE_SIZE; m_timestamp_size--; if (m_timestamp_size>0) { call PacketTimeStamp.clear(m_p_rx_buf); m_timestamp_head = 0; m_timestamp_size = 0; } } // We may have received an ack that should be processed by Transmit // buf[rxFrameLength] >> 7 checks the CRC if ( ( buf[ rxFrameLength ] >> 7 ) && rx_buf ) { uint8_t type = ( header->fcf >> IEEE154_FCF_FRAME_TYPE ) & 7; signal CC2420Receive.receive( type, m_p_rx_buf ); if ( type == IEEE154_TYPE_DATA ) { post receiveDone_task(); return; } } waitForNextPacket(); break; default: atomic receivingPacket = FALSE; call CSN.set(); call SpiResource.release(); break; } } async event void RXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) { } /***************** Tasks *****************/ /** * Fill in metadata details, pass the packet up the stack, and * get the next packet. */ task void receiveDone_task() { cc2420_metadata_t* metadata = call CC2420PacketBody.getMetadata( m_p_rx_buf ); cc2420_header_t* header = call CC2420PacketBody.getHeader( m_p_rx_buf); uint8_t length = header->length; uint8_t tmpLen __DEPUTY_UNUSED__ = sizeof(message_t) - (offsetof(message_t, data) - sizeof(cc2420_header_t)); uint8_t* COUNT(tmpLen) buf = TCAST(uint8_t* COUNT(tmpLen), header); metadata->crc = buf[ length ] >> 7; metadata->lqi = buf[ length ] & 0x7f; metadata->rssi = buf[ length - 1 ]; if (passesAddressCheck(m_p_rx_buf) && length >= CC2420_SIZE) { #ifdef CC2420_HW_SECURITY if(securityOn == 1){ if(m_missed_packets > 0){ m_missed_packets --; } if(authentication){ length -= micLength; } } micLength = 0; securityOn = 0; authentication = 0; #endif m_p_rx_buf = signal Receive.receive( m_p_rx_buf, m_p_rx_buf->data, length - CC2420_SIZE); } atomic receivingPacket = FALSE; waitForNextPacket(); } /****************** CC2420Config Events ****************/ event void CC2420Config.syncDone( error_t error ) { } /****************** Functions ****************/ /** * Attempt to acquire the SPI bus to receive a packet. */ void beginReceive() { m_state = S_RX_LENGTH; atomic receivingPacket = TRUE; if(call SpiResource.isOwner()) { receive(); } else if (call SpiResource.immediateRequest() == SUCCESS) { receive(); } else { call SpiResource.request(); } } /** * Flush out the Rx FIFO */ void flush() { #ifdef CC2420_HW_SECURITY flush_flag = 0; pos =0; packetLength =0; micLength = 0; securityOn = 0; authentication = 0; #endif reset_state(); call CSN.set(); call CSN.clr(); call SFLUSHRX.strobe(); call SFLUSHRX.strobe(); call CSN.set(); call SpiResource.release(); waitForNextPacket(); } /** * The first byte of each packet is the length byte. Read in that single * byte, and then read in the rest of the packet. The CC2420 could contain * multiple packets that have been buffered up, so if something goes wrong, * we necessarily want to flush out the FIFO unless we have to. */ void receive() { call CSN.clr(); call RXFIFO.beginRead( (uint8_t*)(call CC2420PacketBody.getHeader( m_p_rx_buf )), 1 ); } /** * Determine if there's a packet ready to go, or if we should do nothing * until the next packet arrives */ void waitForNextPacket() { atomic { if ( m_state == S_STOPPED ) { call SpiResource.release(); return; } atomic receivingPacket = FALSE; /* * The FIFOP pin here is high when there are 0 bytes in the RX FIFO * and goes low as soon as there are bytes in the RX FIFO. The pin * is inverted from what the datasheet says, and its threshold is 127. * Whenever the FIFOP line goes low, as you can see from the interrupt * handler elsewhere in this module, it means we received a new packet. * If the line stays low without generating an interrupt, that means * there's still more data to be received. */ if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get() ) { // A new packet is buffered up and ready to go if ( m_missed_packets ) { m_missed_packets--; } #ifdef CC2420_HW_SECURITY call SpiResource.release(); m_state = S_RX_DEC; beginDec(); #else beginReceive(); #endif } else { // Wait for the next packet to arrive m_state = S_STARTED; m_missed_packets = 0; call SpiResource.release(); } } } /** * Reset this component */ void reset_state() { m_bytes_left = RXFIFO_SIZE; atomic receivingPacket = FALSE; m_timestamp_head = 0; m_timestamp_size = 0; m_missed_packets = 0; } /** * @return TRUE if the given message passes address recognition */ bool passesAddressCheck(message_t *msg) { cc2420_header_t *header = call CC2420PacketBody.getHeader( msg ); int mode = (header->fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 3; ieee_eui64_t *ext_addr; if(!(call CC2420Config.isAddressRecognitionEnabled())) { return TRUE; } if (mode == IEEE154_ADDR_SHORT) { return (header->dest == call CC2420Config.getShortAddr() || header->dest == IEEE154_BROADCAST_ADDR); } else if (mode == IEEE154_ADDR_EXT) { ieee_eui64_t local_addr = (call CC2420Config.getExtAddr()); ext_addr = TCAST(ieee_eui64_t* ONE, &header->dest); return (memcmp(ext_addr->data, local_addr.data, IEEE_EUI64_LENGTH) == 0); } else { /* reject frames with either no address or invalid type */ return FALSE; } } } tinyos-2.1.2+dfsg/tos/chips/cc2420/security/000077500000000000000000000000001207233610700204405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/security/CC2420KeysC.nc000066400000000000000000000037721207233610700225270ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Razvan Musaloiu-E. * @author Jong Hyun Lim */ configuration CC2420KeysC { provides interface CC2420Keys; } implementation { components new CC2420SpiC(); components HplCC2420PinsC as Pins; components CC2420KeysP; CC2420Keys = CC2420KeysP; CC2420KeysP.CSN -> Pins.CSN; CC2420KeysP.KEY0 -> CC2420SpiC.KEY0; CC2420KeysP.KEY1 -> CC2420SpiC.KEY1; CC2420KeysP.Resource -> CC2420SpiC.Resource; } tinyos-2.1.2+dfsg/tos/chips/cc2420/security/CC2420KeysP.nc000066400000000000000000000053041207233610700225350ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Razvan Musaloiu-E. * @author Jong Hyun Lim */ module CC2420KeysP { provides interface CC2420Keys; uses { interface GeneralIO as CSN; interface CC2420Ram as KEY0; interface CC2420Ram as KEY1; interface Resource; } } implementation { uint8_t *currentKey = NULL; bool currentKeyNo; task void resourceReq() { error_t error; error = call Resource.immediateRequest(); if(error != SUCCESS){ post resourceReq(); } } command error_t CC2420Keys.setKey(uint8_t keyNo, uint8_t* key) { if (currentKey != NULL || keyNo > 1) { return FAIL; } currentKey = key; currentKeyNo = keyNo; if(call Resource.request() != SUCCESS){ post resourceReq(); } return SUCCESS; } event void Resource.granted() { if (currentKeyNo) { call CSN.clr(); call KEY1.write(0, currentKey, 16); call CSN.set(); } else { call CSN.clr(); call KEY0.write(0, currentKey, 16); call CSN.set(); } call Resource.release(); currentKey = NULL; signal CC2420Keys.setKeyDone(currentKeyNo, currentKey); } } tinyos-2.1.2+dfsg/tos/chips/cc2420/security/SecAMSenderC.nc000066400000000000000000000045271207233610700231660ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Razvan Musaloiu-E. * @author Jong Hyun Lim */ generic configuration SecAMSenderC(am_id_t id) { provides { interface AMSend; interface Packet; interface AMPacket; interface PacketAcknowledgements as Acks; interface CC2420SecurityMode; } } implementation { components ActiveMessageC; components NoLedsC; components LedsC; components new CC2420SpiC(); components CC2420ActiveMessageC; components new AMSenderC(id); components new SecAMSenderP(id); AMSend = SecAMSenderP.AMSend; Packet = AMSenderC; Acks = CC2420ActiveMessageC; AMPacket = CC2420ActiveMessageC; CC2420SecurityMode = SecAMSenderP; SecAMSenderP.SubAMSend -> AMSenderC; SecAMSenderP.SecurityPacket -> AMSenderC; SecAMSenderP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/security/SecAMSenderP.nc000066400000000000000000000136611207233610700232020ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Razvan Musaloiu-E. * @author Jong Hyun Lim */ generic module SecAMSenderP(am_id_t id) { provides { interface AMSend; interface CC2420SecurityMode; } uses { interface AMSend as SubAMSend; interface Packet as SecurityPacket; interface AMPacket; interface Leds; } } implementation { uint32_t nonceCounter = 0; uint8_t secLevel = NO_SEC; uint8_t keyIndex = 0; uint8_t reserved = 0; // skip in cc2420 implementations uint8_t micLength = 0; uint8_t length; command error_t AMSend.send(am_addr_t addr, message_t* msg, uint8_t len) { cc2420_header_t* hdr = (cc2420_header_t*)msg->header; security_header_t* secHdr = (security_header_t*)&hdr->secHdr; #if ! defined(TFRAMES_ENABLED) (uint8_t*)secHdr += 1; #endif if(secHdr->secLevel == CBC_MAC_4 || secHdr->secLevel == CCM_4){ micLength = 4; }else if(secHdr->secLevel == CBC_MAC_8 || secHdr->secLevel == CCM_8){ micLength = 8; }else if(secHdr->secLevel == CBC_MAC_16 || secHdr->secLevel == CCM_16){ micLength = 16; } return call SubAMSend.send(addr, msg, len + (((secHdr->secLevel >= CBC_MAC_4 && secHdr->secLevel <= CBC_MAC_16) || (secHdr->secLevel >= CCM_4 && secHdr->secLevel <= CCM_16)) ? micLength : 0)); } command uint8_t AMSend.maxPayloadLength() { return call SecurityPacket.maxPayloadLength(); } command void* AMSend.getPayload(message_t* msg, uint8_t len) { return call SecurityPacket.getPayload(msg, len); } command error_t AMSend.cancel(message_t* msg) { return call SubAMSend.cancel(msg); } event void SubAMSend.sendDone(message_t *msg, error_t error) { signal AMSend.sendDone(msg, error); } command error_t CC2420SecurityMode.setCtr(message_t* msg, uint8_t setKey, uint8_t setSkip) { cc2420_header_t* hdr = (cc2420_header_t*)msg->header; security_header_t* secHdr = (security_header_t*)&hdr->secHdr; #if ! defined(TFRAMES_ENABLED) (uint8_t*)secHdr += 1; #endif if (setKey > 1 || setSkip > 7){ return FAIL; } secLevel = CTR; keyIndex = setKey; reserved = setSkip; nonceCounter++; secHdr->secLevel = secLevel; secHdr->keyMode = 1; // Fixed to 1 for now secHdr->reserved = reserved; //skip in cc2420 secHdr->frameCounter = nonceCounter; secHdr->keyID[0] = keyIndex; // Always first position for now due to fixed keyMode hdr->fcf |= 1 << IEEE154_FCF_SECURITY_ENABLED; return SUCCESS; } command error_t CC2420SecurityMode.setCbcMac(message_t* msg, uint8_t setKey, uint8_t setSkip, uint8_t size) { cc2420_header_t* hdr = (cc2420_header_t*)msg->header; security_header_t* secHdr = (security_header_t*)&hdr->secHdr; #if ! defined(TFRAMES_ENABLED) (uint8_t*)secHdr += 1; #endif if (setKey > 1 || (size != 4 && size != 8 && size != 16) || (setSkip > 7)){ return FAIL; } if(size == 4) secLevel = CBC_MAC_4; else if (size == 8) secLevel = CBC_MAC_8; else if (size == 16) secLevel = CBC_MAC_16; else return FAIL; keyIndex = setKey; reserved = setSkip; nonceCounter++; secHdr->secLevel = secLevel; secHdr->keyMode = 1; // Fixed to 1 for now secHdr->reserved = reserved; //skip in cc2420 secHdr->frameCounter = nonceCounter; secHdr->keyID[0] = keyIndex; // Always first position for now due to fixed keyMode hdr->fcf |= 1 << IEEE154_FCF_SECURITY_ENABLED; return SUCCESS; } command error_t CC2420SecurityMode.setCcm(message_t* msg, uint8_t setKey, uint8_t setSkip, uint8_t size) { cc2420_header_t* hdr = (cc2420_header_t*)msg->header; security_header_t* secHdr = (security_header_t*)&hdr->secHdr; #if ! defined(TFRAMES_ENABLED) (uint8_t*)secHdr += 1; #endif if (setKey > 1 || (size != 4 && size != 8 && size != 16) || (setSkip > 7)){ return FAIL; } if(size == 4) secLevel = CCM_4; else if (size == 8) secLevel = CCM_8; else if (size == 16) secLevel = CCM_16; else return FAIL; keyIndex = setKey; reserved = setSkip; nonceCounter++; secHdr->secLevel = secLevel; secHdr->keyMode = 1; // Fixed to 1 for now secHdr->reserved = reserved; //skip in cc2420 secHdr->frameCounter = nonceCounter; secHdr->keyID[0] = keyIndex; // Always first position for now due to fixed keyMode hdr->fcf |= 1 << IEEE154_FCF_SECURITY_ENABLED; return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/cc2420/spi/000077500000000000000000000000001207233610700173645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/spi/CC2420SpiC.nc000066400000000000000000000143201207233610700212620ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of basic SPI primitives for the ChipCon CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2009-08-14 20:33:43 $ */ generic configuration CC2420SpiC() { provides interface Resource; provides interface ChipSpiResource; // commands provides interface CC2420Strobe as SNOP; provides interface CC2420Strobe as SXOSCON; provides interface CC2420Strobe as STXCAL; provides interface CC2420Strobe as SRXON; provides interface CC2420Strobe as STXON; provides interface CC2420Strobe as STXONCCA; provides interface CC2420Strobe as SRFOFF; provides interface CC2420Strobe as SXOSCOFF; provides interface CC2420Strobe as SFLUSHRX; provides interface CC2420Strobe as SFLUSHTX; provides interface CC2420Strobe as SACK; provides interface CC2420Strobe as SACKPEND; provides interface CC2420Strobe as SRXDEC; provides interface CC2420Strobe as STXENC; provides interface CC2420Strobe as SAES; // registers provides interface CC2420Register as MAIN; provides interface CC2420Register as MDMCTRL0; provides interface CC2420Register as MDMCTRL1; provides interface CC2420Register as RSSI; provides interface CC2420Register as SYNCWORD; provides interface CC2420Register as TXCTRL; provides interface CC2420Register as RXCTRL0; provides interface CC2420Register as RXCTRL1; provides interface CC2420Register as FSCTRL; provides interface CC2420Register as SECCTRL0; provides interface CC2420Register as SECCTRL1; provides interface CC2420Register as BATTMON; provides interface CC2420Register as IOCFG0; provides interface CC2420Register as IOCFG1; provides interface CC2420Register as MANFIDL; provides interface CC2420Register as MANFIDH; provides interface CC2420Register as FSMTC; provides interface CC2420Register as MANAND; provides interface CC2420Register as MANOR; provides interface CC2420Register as AGCCTRL; provides interface CC2420Register as RXFIFO_REGISTER; // ram provides interface CC2420Ram as IEEEADR; provides interface CC2420Ram as PANID; provides interface CC2420Ram as SHORTADR; provides interface CC2420Ram as TXFIFO_RAM; provides interface CC2420Ram as RXFIFO_RAM; provides interface CC2420Ram as KEY0; provides interface CC2420Ram as KEY1; provides interface CC2420Ram as SABUF; provides interface CC2420Ram as TXNONCE; provides interface CC2420Ram as RXNONCE; // fifos provides interface CC2420Fifo as RXFIFO; provides interface CC2420Fifo as TXFIFO; } implementation { enum { CLIENT_ID = unique( "CC2420Spi.Resource" ), }; components HplCC2420PinsC as Pins; components CC2420SpiWireC as Spi; ChipSpiResource = Spi.ChipSpiResource; Resource = Spi.Resource[ CLIENT_ID ]; // commands SNOP = Spi.Strobe[ CC2420_SNOP ]; SXOSCON = Spi.Strobe[ CC2420_SXOSCON ]; STXCAL = Spi.Strobe[ CC2420_STXCAL ]; SRXON = Spi.Strobe[ CC2420_SRXON ]; STXON = Spi.Strobe[ CC2420_STXON ]; STXONCCA = Spi.Strobe[ CC2420_STXONCCA ]; SRFOFF = Spi.Strobe[ CC2420_SRFOFF ]; SXOSCOFF = Spi.Strobe[ CC2420_SXOSCOFF ]; SFLUSHRX = Spi.Strobe[ CC2420_SFLUSHRX ]; SFLUSHTX = Spi.Strobe[ CC2420_SFLUSHTX ]; SACK = Spi.Strobe[ CC2420_SACK ]; SACKPEND = Spi.Strobe[ CC2420_SACKPEND ]; SRXDEC = Spi.Strobe[ CC2420_SRXDEC ]; STXENC = Spi.Strobe[ CC2420_STXENC ]; SAES = Spi.Strobe[ CC2420_SAES ]; // registers MAIN = Spi.Reg[ CC2420_MAIN ]; MDMCTRL0 = Spi.Reg[ CC2420_MDMCTRL0 ]; MDMCTRL1 = Spi.Reg[ CC2420_MDMCTRL1 ]; RSSI = Spi.Reg[ CC2420_RSSI ]; SYNCWORD = Spi.Reg[ CC2420_SYNCWORD ]; TXCTRL = Spi.Reg[ CC2420_TXCTRL ]; RXCTRL0 = Spi.Reg[ CC2420_RXCTRL0 ]; RXCTRL1 = Spi.Reg[ CC2420_RXCTRL1 ]; FSCTRL = Spi.Reg[ CC2420_FSCTRL ]; SECCTRL0 = Spi.Reg[ CC2420_SECCTRL0 ]; SECCTRL1 = Spi.Reg[ CC2420_SECCTRL1 ]; BATTMON = Spi.Reg[ CC2420_BATTMON ]; IOCFG0 = Spi.Reg[ CC2420_IOCFG0 ]; IOCFG1 = Spi.Reg[ CC2420_IOCFG1 ]; MANFIDL = Spi.Reg[ CC2420_MANFIDL ]; MANFIDH = Spi.Reg[ CC2420_MANFIDH ]; FSMTC = Spi.Reg[ CC2420_FSMTC ]; MANAND = Spi.Reg[ CC2420_MANAND ]; MANOR = Spi.Reg[ CC2420_MANOR ]; AGCCTRL = Spi.Reg[ CC2420_AGCCTRL ]; RXFIFO_REGISTER = Spi.Reg[ CC2420_RXFIFO ]; // ram IEEEADR = Spi.Ram[ CC2420_RAM_IEEEADR ]; PANID = Spi.Ram[ CC2420_RAM_PANID ]; SHORTADR = Spi.Ram[ CC2420_RAM_SHORTADR ]; TXFIFO_RAM = Spi.Ram[ CC2420_RAM_TXFIFO ]; RXFIFO_RAM = Spi.Ram[ CC2420_RAM_RXFIFO ]; KEY0 = Spi.Ram[ CC2420_RAM_KEY0 ]; KEY1 = Spi.Ram[ CC2420_RAM_KEY1 ]; SABUF = Spi.Ram[ CC2420_RAM_SABUF ]; TXNONCE = Spi.Ram[ CC2420_RAM_TXNONCE ]; RXNONCE = Spi.Ram[ CC2420_RAM_RXNONCE ]; // fifos RXFIFO = Spi.Fifo[ CC2420_RXFIFO ]; TXFIFO = Spi.Fifo[ CC2420_TXFIFO ]; } tinyos-2.1.2+dfsg/tos/chips/cc2420/spi/CC2420SpiP.nc000066400000000000000000000232501207233610700213010ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Roman Lim * @author Razvan Musaloie-E. * @author Jeonggil Ko * @version $Revision: 1.4 $ $Date: 2008-06-23 20:25:15 $ */ module CC2420SpiP @safe() { provides { interface ChipSpiResource; interface Resource[ uint8_t id ]; interface CC2420Fifo as Fifo[ uint8_t id ]; interface CC2420Ram as Ram[ uint16_t id ]; interface CC2420Register as Reg[ uint8_t id ]; interface CC2420Strobe as Strobe[ uint8_t id ]; } uses { interface Resource as SpiResource; interface SpiByte; interface SpiPacket; interface State as WorkingState; interface Leds; } } implementation { enum { RESOURCE_COUNT = uniqueCount( "CC2420Spi.Resource" ), NO_HOLDER = 0xFF, }; /** WorkingStates */ enum { S_IDLE, S_BUSY, }; /** Address to read/write on the CC2420, also maintains caller's client id */ norace uint16_t m_addr; /** Each bit represents a client ID that is requesting SPI bus access */ uint8_t m_requests = 0; /** The current client that owns the SPI bus */ uint8_t m_holder = NO_HOLDER; /** TRUE if it is safe to release the SPI bus after all users say ok */ bool release; /***************** Prototypes ****************/ error_t attemptRelease(); task void grant(); /***************** ChipSpiResource Commands ****************/ /** * Abort the release of the SPI bus. This must be called only with the * releasing() event */ async command void ChipSpiResource.abortRelease() { atomic release = FALSE; } /** * Release the SPI bus if there are no objections */ async command error_t ChipSpiResource.attemptRelease() { return attemptRelease(); } /***************** Resource Commands *****************/ async command error_t Resource.request[ uint8_t id ]() { atomic { if ( call WorkingState.requestState(S_BUSY) == SUCCESS ) { m_holder = id; if(call SpiResource.isOwner()) { post grant(); } else { call SpiResource.request(); } } else { m_requests |= 1 << id; } } return SUCCESS; } async command error_t Resource.immediateRequest[ uint8_t id ]() { error_t error; atomic { if ( call WorkingState.requestState(S_BUSY) != SUCCESS ) { return EBUSY; } if(call SpiResource.isOwner()) { m_holder = id; error = SUCCESS; } else if ((error = call SpiResource.immediateRequest()) == SUCCESS ) { m_holder = id; } else { call WorkingState.toIdle(); } } return error; } async command error_t Resource.release[ uint8_t id ]() { uint8_t i; atomic { if ( m_holder != id ) { return FAIL; } m_holder = NO_HOLDER; if ( !m_requests ) { call WorkingState.toIdle(); attemptRelease(); } else { for ( i = m_holder + 1; ; i++ ) { i %= RESOURCE_COUNT; if ( m_requests & ( 1 << i ) ) { m_holder = i; m_requests &= ~( 1 << i ); post grant(); return SUCCESS; } } } } return SUCCESS; } async command bool Resource.isOwner[ uint8_t id ]() { atomic return (m_holder == id); } /***************** SpiResource Events ****************/ event void SpiResource.granted() { post grant(); } /***************** Fifo Commands ****************/ async command cc2420_status_t Fifo.beginRead[ uint8_t addr ]( uint8_t* data, uint8_t len ) { cc2420_status_t status = 0; atomic { if(call WorkingState.isIdle()) { return status; } } m_addr = addr | 0x40; status = call SpiByte.write( m_addr ); call Fifo.continueRead[ addr ]( data, len ); return status; } async command error_t Fifo.continueRead[ uint8_t addr ]( uint8_t* data, uint8_t len ) { return call SpiPacket.send( NULL, data, len ); } async command cc2420_status_t Fifo.write[ uint8_t addr ]( uint8_t* data, uint8_t len ) { uint8_t status = 0; atomic { if(call WorkingState.isIdle()) { return status; } } m_addr = addr; status = call SpiByte.write( m_addr ); call SpiPacket.send( data, NULL, len ); return status; } /***************** RAM Commands ****************/ async command cc2420_status_t Ram.read[ uint16_t addr ]( uint8_t offset, uint8_t* data, uint8_t len ) { cc2420_status_t status = 0; atomic { if(call WorkingState.isIdle()) { return status; } } addr += offset; status = call SpiByte.write( addr | 0x80 ); call SpiByte.write( ( ( addr >> 1 ) & 0xC0 ) | 0x20 ); for ( ; len; len-- ) { *data++ = call SpiByte.write( 0 ); } return status; } async command cc2420_status_t Ram.write[ uint16_t addr ]( uint8_t offset, uint8_t* data, uint8_t len ) { cc2420_status_t status = 0; uint8_t tmpLen = len; uint8_t * COUNT(tmpLen) tmpData = (uint8_t * COUNT(tmpLen))data; atomic { if(call WorkingState.isIdle()) { return status; } } addr += offset; status = call SpiByte.write( addr | 0x80 ); call SpiByte.write( ( addr >> 1 ) & 0xc0 ); for ( ; len; len-- ) { call SpiByte.write( tmpData[tmpLen-len] ); } return status; } /***************** Register Commands ****************/ async command cc2420_status_t Reg.read[ uint8_t addr ]( uint16_t* data ) { cc2420_status_t status = 0; atomic { if(call WorkingState.isIdle()) { return status; } } status = call SpiByte.write( addr | 0x40 ); *data = (uint16_t)call SpiByte.write( 0 ) << 8; *data |= call SpiByte.write( 0 ); return status; } async command cc2420_status_t Reg.write[ uint8_t addr ]( uint16_t data ) { atomic { if(call WorkingState.isIdle()) { return 0; } } call SpiByte.write( addr ); call SpiByte.write( data >> 8 ); return call SpiByte.write( data & 0xff ); } /***************** Strobe Commands ****************/ async command cc2420_status_t Strobe.strobe[ uint8_t addr ]() { atomic { if(call WorkingState.isIdle()) { return 0; } } return call SpiByte.write( addr ); } /***************** SpiPacket Events ****************/ async event void SpiPacket.sendDone( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) { if ( m_addr & 0x40 ) { signal Fifo.readDone[ m_addr & ~0x40 ]( rx_buf, len, error ); } else { signal Fifo.writeDone[ m_addr ]( tx_buf, len, error ); } } /***************** Functions ****************/ error_t attemptRelease() { if(m_requests > 0 || m_holder != NO_HOLDER || !call WorkingState.isIdle()) { return FAIL; } atomic release = TRUE; signal ChipSpiResource.releasing(); atomic { if(release) { call SpiResource.release(); return SUCCESS; } } return EBUSY; } task void grant() { uint8_t holder; atomic { holder = m_holder; } signal Resource.granted[ holder ](); } /***************** Defaults ****************/ default event void Resource.granted[ uint8_t id ]() { } default async event void Fifo.readDone[ uint8_t addr ]( uint8_t* rx_buf, uint8_t rx_len, error_t error ) { } default async event void Fifo.writeDone[ uint8_t addr ]( uint8_t* tx_buf, uint8_t tx_len, error_t error ) { } default async event void ChipSpiResource.releasing() { } } tinyos-2.1.2+dfsg/tos/chips/cc2420/spi/CC2420SpiWireC.nc000066400000000000000000000046631207233610700221220ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.1 $ $Date: 2007-07-04 00:37:16 $ */ configuration CC2420SpiWireC { provides interface Resource[ uint8_t id ]; provides interface ChipSpiResource; provides interface CC2420Fifo as Fifo[ uint8_t id ]; provides interface CC2420Ram as Ram[ uint16_t id ]; provides interface CC2420Register as Reg[ uint8_t id ]; provides interface CC2420Strobe as Strobe[ uint8_t id ]; } implementation { components CC2420SpiP as SpiP; Resource = SpiP; Fifo = SpiP; Ram = SpiP; Reg = SpiP; Strobe = SpiP; ChipSpiResource = SpiP; components new StateC() as WorkingStateC; SpiP.WorkingState -> WorkingStateC; components new HplCC2420SpiC(); SpiP.SpiResource -> HplCC2420SpiC; SpiP.SpiByte -> HplCC2420SpiC; SpiP.SpiPacket -> HplCC2420SpiC; components LedsC; SpiP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/transmit/000077500000000000000000000000001207233610700204325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/transmit/CC2420TransmitC.nc000066400000000000000000000073651207233610700234110ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the transmit path for the ChipCon CC2420 radio. * * @author Jonathan Hui * @version $Revision: 1.3 $ $Date: 2009-08-14 20:33:43 $ */ #include "IEEE802154.h" configuration CC2420TransmitC { provides { interface StdControl; interface CC2420Transmit; interface RadioBackoff; interface ReceiveIndicator as EnergyIndicator; interface ReceiveIndicator as ByteIndicator; } } implementation { components CC2420TransmitP; StdControl = CC2420TransmitP; CC2420Transmit = CC2420TransmitP; RadioBackoff = CC2420TransmitP; EnergyIndicator = CC2420TransmitP.EnergyIndicator; ByteIndicator = CC2420TransmitP.ByteIndicator; components MainC; MainC.SoftwareInit -> CC2420TransmitP; MainC.SoftwareInit -> Alarm; components AlarmMultiplexC as Alarm; CC2420TransmitP.BackoffTimer -> Alarm; components HplCC2420PinsC as Pins; CC2420TransmitP.CCA -> Pins.CCA; CC2420TransmitP.CSN -> Pins.CSN; CC2420TransmitP.SFD -> Pins.SFD; components HplCC2420InterruptsC as Interrupts; CC2420TransmitP.CaptureSFD -> Interrupts.CaptureSFD; components new CC2420SpiC() as Spi; CC2420TransmitP.SpiResource -> Spi; CC2420TransmitP.ChipSpiResource -> Spi; CC2420TransmitP.SNOP -> Spi.SNOP; CC2420TransmitP.STXON -> Spi.STXON; CC2420TransmitP.STXONCCA -> Spi.STXONCCA; CC2420TransmitP.SFLUSHTX -> Spi.SFLUSHTX; CC2420TransmitP.TXCTRL -> Spi.TXCTRL; CC2420TransmitP.TXFIFO -> Spi.TXFIFO; CC2420TransmitP.TXFIFO_RAM -> Spi.TXFIFO_RAM; CC2420TransmitP.MDMCTRL1 -> Spi.MDMCTRL1; CC2420TransmitP.SECCTRL0 -> Spi.SECCTRL0; CC2420TransmitP.SECCTRL1 -> Spi.SECCTRL1; CC2420TransmitP.STXENC -> Spi.STXENC; CC2420TransmitP.TXNONCE -> Spi.TXNONCE; CC2420TransmitP.KEY0 -> Spi.KEY0; CC2420TransmitP.KEY1 -> Spi.KEY1; components CC2420ReceiveC; CC2420TransmitP.CC2420Receive -> CC2420ReceiveC; components CC2420PacketC; CC2420TransmitP.CC2420Packet -> CC2420PacketC; CC2420TransmitP.CC2420PacketBody -> CC2420PacketC; CC2420TransmitP.PacketTimeStamp -> CC2420PacketC; CC2420TransmitP.PacketTimeSyncOffset -> CC2420PacketC; components LedsC; CC2420TransmitP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/transmit/CC2420TransmitP.nc000066400000000000000000000607301207233610700234210ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Jung Il Choi Initial SACK implementation * @author JeongGil Ko * @author Razvan Musaloiu-E * @version $Revision: 1.18 $ $Date: 2010-04-13 20:27:05 $ */ #include "CC2420.h" #include "CC2420TimeSyncMessage.h" #include "crc.h" #include "message.h" module CC2420TransmitP @safe() { provides interface Init; provides interface StdControl; provides interface CC2420Transmit as Send; provides interface RadioBackoff; provides interface ReceiveIndicator as EnergyIndicator; provides interface ReceiveIndicator as ByteIndicator; uses interface Alarm as BackoffTimer; uses interface CC2420Packet; uses interface CC2420PacketBody; uses interface PacketTimeStamp; uses interface PacketTimeSyncOffset; uses interface GpioCapture as CaptureSFD; uses interface GeneralIO as CCA; uses interface GeneralIO as CSN; uses interface GeneralIO as SFD; uses interface Resource as SpiResource; uses interface ChipSpiResource; uses interface CC2420Fifo as TXFIFO; uses interface CC2420Ram as TXFIFO_RAM; uses interface CC2420Register as TXCTRL; uses interface CC2420Strobe as SNOP; uses interface CC2420Strobe as STXON; uses interface CC2420Strobe as STXONCCA; uses interface CC2420Strobe as SFLUSHTX; uses interface CC2420Register as MDMCTRL1; uses interface CC2420Strobe as STXENC; uses interface CC2420Register as SECCTRL0; uses interface CC2420Register as SECCTRL1; uses interface CC2420Ram as KEY0; uses interface CC2420Ram as KEY1; uses interface CC2420Ram as TXNONCE; uses interface CC2420Receive; uses interface Leds; } implementation { typedef enum { S_STOPPED, S_STARTED, S_LOAD, S_SAMPLE_CCA, S_BEGIN_TRANSMIT, S_SFD, S_EFD, S_ACK_WAIT, S_CANCEL, } cc2420_transmit_state_t; // This specifies how many jiffies the stack should wait after a // TXACTIVE to receive an SFD interrupt before assuming something is // wrong and aborting the send. There seems to be a condition // on the micaZ where the SFD interrupt is never handled. enum { CC2420_ABORT_PERIOD = 320 }; #ifdef CC2420_HW_SECURITY uint16_t startTime = 0; norace uint8_t secCtrlMode = 0; norace uint8_t nonceValue[16] = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01}; norace uint8_t skip; norace uint16_t CTR_SECCTRL0, CTR_SECCTRL1; uint8_t securityChecked = 0; void securityCheck(); #endif norace message_t * ONE_NOK m_msg; norace bool m_cca; norace uint8_t m_tx_power; cc2420_transmit_state_t m_state = S_STOPPED; bool m_receiving = FALSE; uint16_t m_prev_time; /** Byte reception/transmission indicator */ bool sfdHigh; /** Let the CC2420 driver keep a lock on the SPI while waiting for an ack */ bool abortSpiRelease; /** Total CCA checks that showed no activity before the NoAck LPL send */ norace int8_t totalCcaChecks; /** The initial backoff period */ norace uint16_t myInitialBackoff; /** The congestion backoff period */ norace uint16_t myCongestionBackoff; /***************** Prototypes ****************/ error_t send( message_t * ONE p_msg, bool cca ); error_t resend( bool cca ); void loadTXFIFO(); void attemptSend(); void congestionBackoff(); error_t acquireSpiResource(); error_t releaseSpiResource(); void signalDone( error_t err ); /***************** Init Commands *****************/ command error_t Init.init() { call CCA.makeInput(); call CSN.makeOutput(); call SFD.makeInput(); return SUCCESS; } /***************** StdControl Commands ****************/ command error_t StdControl.start() { atomic { call CaptureSFD.captureRisingEdge(); m_state = S_STARTED; m_receiving = FALSE; abortSpiRelease = FALSE; m_tx_power = 0; } return SUCCESS; } command error_t StdControl.stop() { atomic { m_state = S_STOPPED; call BackoffTimer.stop(); call CaptureSFD.disable(); call SpiResource.release(); // REMOVE call CSN.set(); } return SUCCESS; } /**************** Send Commands ****************/ async command error_t Send.send( message_t* ONE p_msg, bool useCca ) { return send( p_msg, useCca ); } async command error_t Send.resend(bool useCca) { return resend( useCca ); } async command error_t Send.cancel() { atomic { switch( m_state ) { case S_LOAD: case S_SAMPLE_CCA: case S_BEGIN_TRANSMIT: m_state = S_CANCEL; break; default: // cancel not allowed while radio is busy transmitting return FAIL; } } return SUCCESS; } async command error_t Send.modify( uint8_t offset, uint8_t* buf, uint8_t len ) { call CSN.clr(); call TXFIFO_RAM.write( offset, buf, len ); call CSN.set(); return SUCCESS; } /***************** Indicator Commands ****************/ command bool EnergyIndicator.isReceiving() { return !(call CCA.get()); } command bool ByteIndicator.isReceiving() { bool high; atomic high = sfdHigh; return high; } /***************** RadioBackoff Commands ****************/ /** * Must be called within a requestInitialBackoff event * @param backoffTime the amount of time in some unspecified units to backoff */ async command void RadioBackoff.setInitialBackoff(uint16_t backoffTime) { myInitialBackoff = backoffTime + 1; } /** * Must be called within a requestCongestionBackoff event * @param backoffTime the amount of time in some unspecified units to backoff */ async command void RadioBackoff.setCongestionBackoff(uint16_t backoffTime) { myCongestionBackoff = backoffTime + 1; } async command void RadioBackoff.setCca(bool useCca) { } // this method converts a 16-bit timestamp into a 32-bit one inline uint32_t getTime32(uint16_t captured_time) { uint32_t now = call BackoffTimer.getNow(); // the captured_time is always in the past return now - (uint16_t)(now - captured_time); } /** * The CaptureSFD event is actually an interrupt from the capture pin * which is connected to timing circuitry and timer modules. This * type of interrupt allows us to see what time (being some relative value) * the event occurred, and lets us accurately timestamp our packets. This * allows higher levels in our system to synchronize with other nodes. * * Because the SFD events can occur so quickly, and the interrupts go * in both directions, we set up the interrupt but check the SFD pin to * determine if that interrupt condition has already been met - meaning, * we should fall through and continue executing code where that interrupt * would have picked up and executed had our microcontroller been fast enough. */ async event void CaptureSFD.captured( uint16_t time ) { uint32_t time32; uint8_t sfd_state = 0; atomic { time32 = getTime32(time); switch( m_state ) { case S_SFD: m_state = S_EFD; sfdHigh = TRUE; // in case we got stuck in the receive SFD interrupts, we can reset // the state here since we know that we are not receiving anymore m_receiving = FALSE; call CaptureSFD.captureFallingEdge(); call PacketTimeStamp.set(m_msg, time32); if (call PacketTimeSyncOffset.isSet(m_msg)) { uint8_t absOffset = sizeof(message_header_t)-sizeof(cc2420_header_t)+call PacketTimeSyncOffset.get(m_msg); timesync_radio_t *timesync = (timesync_radio_t *)((nx_uint8_t*)m_msg+absOffset); // set timesync event time as the offset between the event time and the SFD interrupt time (TEP 133) *timesync -= time32; call CSN.clr(); call TXFIFO_RAM.write( absOffset, (uint8_t*)timesync, sizeof(timesync_radio_t) ); call CSN.set(); //restoring the event time to the original value *timesync += time32; } if ( (call CC2420PacketBody.getHeader( m_msg ))->fcf & ( 1 << IEEE154_FCF_ACK_REQ ) ) { // This is an ack packet, don't release the chip's SPI bus lock. abortSpiRelease = TRUE; } releaseSpiResource(); call BackoffTimer.stop(); if ( call SFD.get() ) { break; } /** Fall Through because the next interrupt was already received */ case S_EFD: sfdHigh = FALSE; call CaptureSFD.captureRisingEdge(); if ( (call CC2420PacketBody.getHeader( m_msg ))->fcf & ( 1 << IEEE154_FCF_ACK_REQ ) ) { m_state = S_ACK_WAIT; call BackoffTimer.start( CC2420_ACK_WAIT_DELAY ); } else { signalDone(SUCCESS); } if ( !call SFD.get() ) { break; } /** Fall Through because the next interrupt was already received */ default: /* this is the SFD for received messages */ if ( !m_receiving && sfdHigh == FALSE ) { sfdHigh = TRUE; call CaptureSFD.captureFallingEdge(); // safe the SFD pin status for later use sfd_state = call SFD.get(); call CC2420Receive.sfd( time32 ); m_receiving = TRUE; m_prev_time = time; if ( call SFD.get() ) { // wait for the next interrupt before moving on return; } // if SFD.get() = 0, then an other interrupt happened since we // reconfigured CaptureSFD! Fall through } if ( sfdHigh == TRUE ) { sfdHigh = FALSE; call CaptureSFD.captureRisingEdge(); m_receiving = FALSE; /* if sfd_state is 1, then we fell through, but at the time of * saving the time stamp the SFD was still high. Thus, the timestamp * is valid. * if the sfd_state is 0, then either we fell through and SFD * was low while we safed the time stamp, or we didn't fall through. * Thus, we check for the time between the two interrupts. * FIXME: Why 10 tics? Seams like some magic number... */ if ((sfd_state == 0) && (time - m_prev_time < 10) ) { call CC2420Receive.sfd_dropped(); if (m_msg) call PacketTimeStamp.clear(m_msg); } break; } } } } /***************** ChipSpiResource Events ****************/ async event void ChipSpiResource.releasing() { if(abortSpiRelease) { call ChipSpiResource.abortRelease(); } } /***************** CC2420Receive Events ****************/ /** * If the packet we just received was an ack that we were expecting, * our send is complete. */ async event void CC2420Receive.receive( uint8_t type, message_t* ack_msg ) { cc2420_header_t* ack_header; cc2420_header_t* msg_header; cc2420_metadata_t* msg_metadata; uint8_t* ack_buf; uint8_t length; if ( type == IEEE154_TYPE_ACK && m_msg) { ack_header = call CC2420PacketBody.getHeader( ack_msg ); msg_header = call CC2420PacketBody.getHeader( m_msg ); if ( m_state == S_ACK_WAIT && msg_header->dsn == ack_header->dsn ) { call BackoffTimer.stop(); msg_metadata = call CC2420PacketBody.getMetadata( m_msg ); ack_buf = (uint8_t *) ack_header; length = ack_header->length; msg_metadata->ack = TRUE; msg_metadata->rssi = ack_buf[ length - 1 ]; msg_metadata->lqi = ack_buf[ length ] & 0x7f; signalDone(SUCCESS); } } } /***************** SpiResource Events ****************/ event void SpiResource.granted() { uint8_t cur_state; atomic { cur_state = m_state; } switch( cur_state ) { case S_LOAD: loadTXFIFO(); break; case S_BEGIN_TRANSMIT: attemptSend(); break; case S_CANCEL: call CSN.clr(); call SFLUSHTX.strobe(); call CSN.set(); releaseSpiResource(); atomic { m_state = S_STARTED; } signal Send.sendDone( m_msg, ECANCEL ); break; default: releaseSpiResource(); break; } } /***************** TXFIFO Events ****************/ /** * The TXFIFO is used to load packets into the transmit buffer on the * chip */ async event void TXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) { call CSN.set(); if ( m_state == S_CANCEL ) { atomic { call CSN.clr(); call SFLUSHTX.strobe(); call CSN.set(); } releaseSpiResource(); m_state = S_STARTED; signal Send.sendDone( m_msg, ECANCEL ); } else if ( !m_cca ) { atomic { m_state = S_BEGIN_TRANSMIT; } attemptSend(); } else { releaseSpiResource(); atomic { m_state = S_SAMPLE_CCA; } signal RadioBackoff.requestInitialBackoff(m_msg); call BackoffTimer.start(myInitialBackoff); } } async event void TXFIFO.readDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) { } /***************** Timer Events ****************/ /** * The backoff timer is mainly used to wait for a moment before trying * to send a packet again. But we also use it to timeout the wait for * an acknowledgement, and timeout the wait for an SFD interrupt when * we should have gotten one. */ async event void BackoffTimer.fired() { atomic { switch( m_state ) { case S_SAMPLE_CCA : // sample CCA and wait a little longer if free, just in case we // sampled during the ack turn-around window if ( call CCA.get() ) { m_state = S_BEGIN_TRANSMIT; call BackoffTimer.start( CC2420_TIME_ACK_TURNAROUND ); } else { congestionBackoff(); } break; case S_BEGIN_TRANSMIT: case S_CANCEL: if ( acquireSpiResource() == SUCCESS ) { attemptSend(); } break; case S_ACK_WAIT: signalDone( SUCCESS ); break; case S_SFD: // We didn't receive an SFD interrupt within CC2420_ABORT_PERIOD // jiffies. Assume something is wrong. call SFLUSHTX.strobe(); call CaptureSFD.captureRisingEdge(); releaseSpiResource(); signalDone( ERETRY ); break; default: break; } } } /***************** Functions ****************/ /** * Set up a message to be sent. First load it into the outbound tx buffer * on the chip, then attempt to send it. * @param *p_msg Pointer to the message that needs to be sent * @param cca TRUE if this transmit should use clear channel assessment */ error_t send( message_t* ONE p_msg, bool cca ) { atomic { if (m_state == S_CANCEL) { return ECANCEL; } if ( m_state != S_STARTED ) { return FAIL; } #ifdef CC2420_HW_SECURITY securityChecked = 0; #endif m_state = S_LOAD; m_cca = cca; m_msg = p_msg; totalCcaChecks = 0; } if ( acquireSpiResource() == SUCCESS ) { loadTXFIFO(); } return SUCCESS; } /** * Resend a packet that already exists in the outbound tx buffer on the * chip * @param cca TRUE if this transmit should use clear channel assessment */ error_t resend( bool cca ) { atomic { if (m_state == S_CANCEL) { return ECANCEL; } if ( m_state != S_STARTED ) { return FAIL; } m_cca = cca; m_state = cca ? S_SAMPLE_CCA : S_BEGIN_TRANSMIT; totalCcaChecks = 0; } if(m_cca) { signal RadioBackoff.requestInitialBackoff(m_msg); call BackoffTimer.start( myInitialBackoff ); } else if ( acquireSpiResource() == SUCCESS ) { attemptSend(); } return SUCCESS; } #ifdef CC2420_HW_SECURITY task void waitTask(){ call Leds.led2Toggle(); if(SECURITYLOCK == 1){ post waitTask(); }else{ securityCheck(); } } void securityCheck(){ cc2420_header_t* msg_header; cc2420_status_t status; security_header_t* secHdr; uint8_t mode; uint8_t key; uint8_t micLength; msg_header = (cc2420_header_t*)m_msg->header; if(!(msg_header->fcf & (1 << IEEE154_FCF_SECURITY_ENABLED))){ // Security is not used for this packet // Make sure to set mode to 0 and the others to the default values CTR_SECCTRL0 = ((0 << CC2420_SECCTRL0_SEC_MODE) | (1 << CC2420_SECCTRL0_SEC_M) | (1 << CC2420_SECCTRL0_SEC_TXKEYSEL) | (1 << CC2420_SECCTRL0_SEC_CBC_HEAD)) ; call CSN.clr(); call SECCTRL0.write(CTR_SECCTRL0); call CSN.set(); return; } if(SECURITYLOCK == 1){ post waitTask(); }else { //Will perform encryption lock registers atomic SECURITYLOCK = 1; secHdr = (security_header_t*) &msg_header->secHdr; #if ! defined(TFRAMES_ENABLED) secHdr=(security_header_t*)((uint8_t*)secHdr+1); #endif memcpy(&nonceValue[3], &(secHdr->frameCounter), 4); skip = secHdr->reserved; key = secHdr->keyID[0]; // For now this is the only key selection mode. if (secHdr->secLevel == NO_SEC){ mode = CC2420_NO_SEC; micLength = 4; }else if (secHdr->secLevel == CBC_MAC_4){ // call Leds.led0Toggle(); mode = CC2420_CBC_MAC; micLength = 4; }else if (secHdr->secLevel == CBC_MAC_8){ mode = CC2420_CBC_MAC; micLength = 8; }else if (secHdr->secLevel == CBC_MAC_16){ mode = CC2420_CBC_MAC; micLength = 16; }else if (secHdr->secLevel == CTR){ // call Leds.led1Toggle(); mode = CC2420_CTR; micLength = 4; }else if (secHdr->secLevel == CCM_4){ mode = CC2420_CCM; micLength = 4; }else if (secHdr->secLevel == CCM_8){ mode = CC2420_CCM; micLength = 8; }else if (secHdr->secLevel == CCM_16){ mode = CC2420_CCM; micLength = 16; }else{ return; } CTR_SECCTRL0 = ((mode << CC2420_SECCTRL0_SEC_MODE) | ((micLength-2)/2 << CC2420_SECCTRL0_SEC_M) | (key << CC2420_SECCTRL0_SEC_TXKEYSEL) | (1 << CC2420_SECCTRL0_SEC_CBC_HEAD)) ; #ifndef TFRAMES_ENABLED CTR_SECCTRL1 = (skip+11+sizeof(security_header_t)+((skip+11+sizeof(security_header_t))<<8)); #else CTR_SECCTRL1 = (skip+10+sizeof(security_header_t)+((skip+10+sizeof(security_header_t))<<8)); #endif call CSN.clr(); call SECCTRL0.write(CTR_SECCTRL0); call CSN.set(); call CSN.clr(); call SECCTRL1.write(CTR_SECCTRL1); call CSN.set(); call CSN.clr(); call TXNONCE.write(0, nonceValue, 16); call CSN.set(); call CSN.clr(); status = call SNOP.strobe(); call CSN.set(); while(status & CC2420_STATUS_ENC_BUSY){ call CSN.clr(); status = call SNOP.strobe(); call CSN.set(); } // Inline security will be activated by STXON or STXONCCA strobes atomic SECURITYLOCK = 0; } } #endif /** * Attempt to send the packet we have loaded into the tx buffer on * the radio chip. The STXONCCA will send the packet immediately if * the channel is clear. If we're not concerned about whether or not * the channel is clear (i.e. m_cca == FALSE), then STXON will send the * packet without checking for a clear channel. * * If the packet didn't get sent, then congestion == TRUE. In that case, * we reset the backoff timer and try again in a moment. * * If the packet got sent, we should expect an SFD interrupt to take * over, signifying the packet is getting sent. * * If security is enabled, STXONCCA or STXON will perform inline security * options before transmitting the packet. */ void attemptSend() { uint8_t status; bool congestion = TRUE; atomic { if (m_state == S_CANCEL) { call SFLUSHTX.strobe(); releaseSpiResource(); call CSN.set(); m_state = S_STARTED; signal Send.sendDone( m_msg, ECANCEL ); return; } #ifdef CC2420_HW_SECURITY if(securityChecked != 1){ securityCheck(); } securityChecked = 1; #endif call CSN.clr(); status = m_cca ? call STXONCCA.strobe() : call STXON.strobe(); if ( !( status & CC2420_STATUS_TX_ACTIVE ) ) { status = call SNOP.strobe(); if ( status & CC2420_STATUS_TX_ACTIVE ) { congestion = FALSE; } } m_state = congestion ? S_SAMPLE_CCA : S_SFD; call CSN.set(); } if ( congestion ) { totalCcaChecks = 0; releaseSpiResource(); congestionBackoff(); } else { call BackoffTimer.start(CC2420_ABORT_PERIOD); } } /** * Congestion Backoff */ void congestionBackoff() { atomic { signal RadioBackoff.requestCongestionBackoff(m_msg); call BackoffTimer.start(myCongestionBackoff); } } error_t acquireSpiResource() { error_t error = call SpiResource.immediateRequest(); if ( error != SUCCESS ) { call SpiResource.request(); } return error; } error_t releaseSpiResource() { call SpiResource.release(); return SUCCESS; } /** * Setup the packet transmission power and load the tx fifo buffer on * the chip with our outbound packet. * * Warning: the tx_power metadata might not be initialized and * could be a value other than 0 on boot. Verification is needed here * to make sure the value won't overstep its bounds in the TXCTRL register * and is transmitting at max power by default. * * It should be possible to manually calculate the packet's CRC here and * tack it onto the end of the header + payload when loading into the TXFIFO, * so the continuous modulation low power listening strategy will continually * deliver valid packets. This would increase receive reliability for * mobile nodes and lossy connections. The crcByte() function should use * the same CRC polynomial as the CC2420's AUTOCRC functionality. */ void loadTXFIFO() { cc2420_header_t* header = call CC2420PacketBody.getHeader( m_msg ); uint8_t tx_power = (call CC2420PacketBody.getMetadata( m_msg ))->tx_power; if ( !tx_power ) { tx_power = CC2420_DEF_RFPOWER; } call CSN.clr(); if ( m_tx_power != tx_power ) { call TXCTRL.write( ( 2 << CC2420_TXCTRL_TXMIXBUF_CUR ) | ( 3 << CC2420_TXCTRL_PA_CURRENT ) | ( 1 << CC2420_TXCTRL_RESERVED ) | ( (tx_power & 0x1F) << CC2420_TXCTRL_PA_LEVEL ) ); } m_tx_power = tx_power; { uint8_t tmpLen __DEPUTY_UNUSED__ = header->length - 1; call TXFIFO.write(TCAST(uint8_t * COUNT(tmpLen), header), header->length - 1); } } void signalDone( error_t err ) { atomic m_state = S_STARTED; abortSpiRelease = FALSE; call ChipSpiResource.attemptRelease(); signal Send.sendDone( m_msg, err ); } } tinyos-2.1.2+dfsg/tos/chips/cc2420/unique/000077500000000000000000000000001207233610700200775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420/unique/UniqueReceiveC.nc000066400000000000000000000045611207233610700233030ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * This layer keeps a history of the past RECEIVE_HISTORY_SIZE received messages * If the source address and dsn number of a newly received message matches * our recent history, we drop the message because we've already seen it. * This should sit at the bottom of the stack * @author David Moss */ configuration UniqueReceiveC { provides { interface Receive; interface Receive as DuplicateReceive; } uses { interface Receive as SubReceive; } } implementation { components UniqueReceiveP, CC2420PacketC, MainC; Receive = UniqueReceiveP.Receive; DuplicateReceive = UniqueReceiveP.DuplicateReceive; SubReceive = UniqueReceiveP.SubReceive; MainC.SoftwareInit -> UniqueReceiveP; UniqueReceiveP.CC2420PacketBody -> CC2420PacketC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/unique/UniqueReceiveP.nc000066400000000000000000000142621207233610700233170ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * This layer keeps a history of the past RECEIVE_HISTORY_SIZE received messages * If the source address and dsn number of a newly received message matches * our recent history, we drop the message because we've already seen it. * @author David Moss */ #include "CC2420.h" module UniqueReceiveP @safe() { provides { interface Receive; interface Receive as DuplicateReceive; interface Init; } uses { interface Receive as SubReceive; interface CC2420PacketBody; } } implementation { struct { uint16_t source; uint8_t dsn; } receivedMessages[RECEIVE_HISTORY_SIZE]; uint8_t writeIndex = 0; /** History element containing info on a source previously received from */ uint8_t recycleSourceElement; enum { INVALID_ELEMENT = 0xFF, }; /***************** Init Commands *****************/ command error_t Init.init() { int i; for(i = 0; i < RECEIVE_HISTORY_SIZE; i++) { receivedMessages[i].source = (am_addr_t) 0xFFFF; receivedMessages[i].dsn = 0; } return SUCCESS; } /***************** Prototypes Commands ***************/ bool hasSeen(uint16_t msgSource, uint8_t msgDsn); void insert(uint16_t msgSource, uint8_t msgDsn); uint16_t getSourceKey(message_t ONE *msg); /***************** SubReceive Events *****************/ event message_t *SubReceive.receive(message_t* msg, void* payload, uint8_t len) { uint16_t msgSource = getSourceKey(msg); uint8_t msgDsn = (call CC2420PacketBody.getHeader(msg))->dsn; if(hasSeen(msgSource, msgDsn)) { return signal DuplicateReceive.receive(msg, payload, len); } else { insert(msgSource, msgDsn); return signal Receive.receive(msg, payload, len); } } /****************** Functions ****************/ /** * This function does two things: * 1. It loops through our entire receive history and detects if we've * seen this DSN before from the given source (duplicate packet) * 2. It detects if we've seen messages from this source before, so we know * where to update our history if it turns out this is a new message. * * The global recycleSourceElement variable stores the location of the next insert * if we've received a packet from that source before. Otherwise, it's up * to the insert() function to decide who to kick out of our history. */ bool hasSeen(uint16_t msgSource, uint8_t msgDsn) { int i; recycleSourceElement = INVALID_ELEMENT; atomic { for(i = 0; i < RECEIVE_HISTORY_SIZE; i++) { if(receivedMessages[i].source == msgSource) { if(receivedMessages[i].dsn == msgDsn) { // Only exit this loop if we found a duplicate packet return TRUE; } recycleSourceElement = i; } } } return FALSE; } /** * Insert the message into the history. If we received a message from this * source before, insert it into the same location as last time and verify * that the "writeIndex" is not pointing to that location. Otherwise, * insert it into the "writeIndex" location. */ void insert(uint16_t msgSource, uint8_t msgDsn) { uint8_t element = recycleSourceElement; bool increment = FALSE; atomic { if(element == INVALID_ELEMENT || writeIndex == element) { // Use the writeIndex element to insert this new message into element = writeIndex; increment = TRUE; } receivedMessages[element].source = msgSource; receivedMessages[element].dsn = msgDsn; if(increment) { writeIndex++; writeIndex %= RECEIVE_HISTORY_SIZE; } } } /** * Derive a key to to store the source address with. * * For long (EUI64) addresses, use the sum of the word in the * address as a key in the table to avoid manipulating the full * address. */ uint16_t getSourceKey(message_t * ONE msg) { cc2420_header_t *hdr = call CC2420PacketBody.getHeader(msg); int s_mode = (hdr->fcf >> IEEE154_FCF_SRC_ADDR_MODE) & 0x3; int d_mode = (hdr->fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 0x3; int s_offset = 2, s_len = 2; uint16_t key = 0; uint8_t *current = (uint8_t *)&hdr->dest; int i; if (s_mode == IEEE154_ADDR_EXT) { s_len = 8; } if (d_mode == IEEE154_ADDR_EXT) { s_offset = 8; } current += s_offset; for (i = 0; i < s_len; i++) { key += current[i]; } return key; } /***************** Defaults ****************/ default event message_t *DuplicateReceive.receive(message_t *msg, void *payload, uint8_t len) { return msg; } } tinyos-2.1.2+dfsg/tos/chips/cc2420/unique/UniqueSendC.nc000066400000000000000000000042311207233610700226040ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Generate a unique dsn byte for this outgoing packet * This should sit at the top of the stack * @author David Moss */ configuration UniqueSendC { provides { interface Send; } uses { interface Send as SubSend; } } implementation { components UniqueSendP, new StateC(), RandomC, CC2420PacketC, MainC; Send = UniqueSendP.Send; SubSend = UniqueSendP.SubSend; MainC.SoftwareInit -> UniqueSendP; UniqueSendP.State -> StateC; UniqueSendP.Random -> RandomC; UniqueSendP.CC2420PacketBody -> CC2420PacketC; } tinyos-2.1.2+dfsg/tos/chips/cc2420/unique/UniqueSendP.nc000066400000000000000000000065511207233610700226300ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * This layer is responsible for supplying a unique data sequence number (dsn) * to each outgoing message. * @author David Moss */ module UniqueSendP @safe() { provides { interface Send; interface Init; } uses { interface Send as SubSend; interface State; interface Random; interface CC2420PacketBody; } } implementation { uint8_t localSendId; enum { S_IDLE, S_SENDING, }; /***************** Init Commands ****************/ command error_t Init.init() { localSendId = call Random.rand16(); return SUCCESS; } /***************** Send Commands ****************/ /** * Each call to this send command gives the message a single * DSN that does not change for every copy of the message * sent out. For messages that are not acknowledged, such as * a broadcast address message, the receiving end does not * signal receive() more than once for that message. */ command error_t Send.send(message_t *msg, uint8_t len) { error_t error; if(call State.requestState(S_SENDING) == SUCCESS) { (call CC2420PacketBody.getHeader(msg))->dsn = localSendId++; if((error = call SubSend.send(msg, len)) != SUCCESS) { call State.toIdle(); } return error; } return EBUSY; } command error_t Send.cancel(message_t *msg) { return call SubSend.cancel(msg); } command uint8_t Send.maxPayloadLength() { return call SubSend.maxPayloadLength(); } command void *Send.getPayload(message_t* msg, uint8_t len) { return call SubSend.getPayload(msg, len); } /***************** SubSend Events ****************/ event void SubSend.sendDone(message_t *msg, error_t error) { call State.toIdle(); signal Send.sendDone(msg, error); } } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/000077500000000000000000000000001207233610700176775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420ActiveMessageC.nc000066400000000000000000000047511207233610700235710ustar00rootroot00000000000000/* * Copyright (c) 2011, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== * Author(s): Jan Hauer * ======================================================================== */ /* We need this component only because some routing protocols, such as CTP, * wire to the radio-specific Active Message component to get the * LinkPacketMetadata, because - for some strange reason - this interface is * not provided by the standard ActiveMessageC in TinyOS. Note: because we only * provide one interface and don't need to wire to other components this * component is actually module. **/ #include "TKN154_MAC.h" module CC2420ActiveMessageC { provides { interface LinkPacketMetadata; } } implementation { async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { ieee154_metadata_t *metadata = (ieee154_metadata_t*) msg->metadata; return metadata->linkQuality > 105; } } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420AsyncSplitControl.nc000066400000000000000000000137551207233610700244040ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ $Date: 2010-06-29 22:07:45 $ * @author Jan Hauer * ======================================================================== */ /* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This interface is a mixture of a SplitControl/AsyncStdControl interface. * @author Jan Hauer */ interface CC2420AsyncSplitControl { /** * Start this component and all of its subcomponents. * * @return SUCCESS if the component was started successfully.
      * FAIL Otherwise */ async command error_t start(); /** * Stop this component and all of its subcomponents - iff this command * succeeds then stopDone will signal the result of the stop * operation. * * @return SUCCESS Stop operation was started, stopDone will be signalled * FAIL Otherwise (stopDone will not be signalled) */ async command error_t stop(); /** * Notify caller that the component has been stopped. This event * completes the stop() operation. * * @param error -- SUCCESS if the component was successfully * turned off, FAIL otherwise */ async event void stopDone(error_t error); } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420Config.nc000066400000000000000000000067211207233610700221520ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An HAL abstraction of the ChipCon CC2420 radio. This abstraction * deals specifically with radio configurations. All get() and set() * commands are single-phase. After setting some values, a call to * sync() is required for the changes to propagate to the cc2420 * hardware chip. This interface allows setting multiple parameters * before calling sync(). * * @author Jonathan Hui * @author Jan Hauer (added some commands) * @version $Revision: 1.1 $ $Date: 2008-06-16 18:02:40 $ */ interface CC2420Config { /** * Sync configuration changes with the radio hardware. This only * applies to set commands below. * * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t sync(); /** * Whether changes have been made that should be sync-ed. * * @return TRUE if changes have been made, FALSE otherwise. */ async command bool needsSync(); /** * Change the channel of the radio, between 11 and 26 */ command uint8_t getChannel(); command void setChannel( uint8_t channel ); /** * Change the short address of the radio. */ async command uint16_t getShortAddr(); command void setShortAddr( uint16_t address ); /** * Change the PAN address of the radio. */ async command uint16_t getPanAddr(); command void setPanAddr( uint16_t address ); /** * Change the PAN address of the radio. */ async command bool getPanCoordinator(); command void setPanCoordinator( bool pcoord ); /** * Change to promiscuous mode. */ command void setPromiscuousMode(bool on); async command bool isPromiscuousModeEnabled(); /** * Change the CCA mode. */ async command uint8_t getCCAMode(); command void setCCAMode(uint8_t mode); /** * Change the transmission power. */ async command uint8_t getTxPower(); command void setTxPower(uint8_t txPower); } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420ControlP.nc000066400000000000000000000341231207233610700225020ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Urs Hunkeler (ReadRssi implementation) * @author Jan Hauer * @version $Revision: 1.5 $ $Date: 2009-05-05 16:56:49 $ */ #include "Timer.h" #include "AM.h" #include "TKN154_PIB.h" module CC2420ControlP { provides interface Init; provides interface Resource; provides interface CC2420Config; provides interface CC2420Power; uses interface Alarm as StartupAlarm; uses interface GeneralIO as CSN; uses interface GeneralIO as RSTN; uses interface GeneralIO as VREN; uses interface GpioInterrupt as InterruptCCA; uses interface GeneralIO as FIFO; uses interface CC2420Ram as IEEEADR; uses interface CC2420Register as FSCTRL; uses interface CC2420Register as IOCFG0; uses interface CC2420Register as IOCFG1; uses interface CC2420Register as MDMCTRL0; uses interface CC2420Register as MDMCTRL1; uses interface CC2420Register as RXCTRL1; uses interface CC2420Register as RSSI; uses interface CC2420Register as RXFIFO_REGISTER; uses interface CC2420Strobe as SNOP; uses interface CC2420Strobe as SRXON; uses interface CC2420Strobe as SRFOFF; uses interface CC2420Strobe as SXOSCOFF; uses interface CC2420Strobe as SXOSCON; uses interface CC2420Strobe as SACKPEND; uses interface CC2420Strobe as SFLUSHRX; uses interface CC2420Register as TXCTRL; uses interface AMPacket; uses interface Resource as SpiResource; uses interface FrameUtility; } implementation { typedef enum { S_VREG_STOPPED, S_VREG_STARTING, S_VREG_STARTED, S_XOSC_STARTING, S_XOSC_STARTED, } cc2420_control_state_t; uint8_t m_channel; uint16_t m_pan; uint16_t m_short_addr; bool autoAckEnabled; bool hwAutoAckDefault; bool addressRecognition; bool acceptReservedFrames; bool m_isPanCoord; uint8_t m_CCAMode; uint8_t m_txPower; bool m_needsSync; norace cc2420_control_state_t m_state = S_VREG_STOPPED; /***************** Prototypes ****************/ void writeFsctrl(); void writeMdmctrl0(); void writeId(); void writeTxPower(); /***************** Init Commands ****************/ command error_t Init.init() { call CSN.makeOutput(); call RSTN.makeOutput(); call VREN.makeOutput(); #if defined(CC2420_NO_ADDRESS_RECOGNITION) #warning Address recognition disabled! addressRecognition = FALSE; #else addressRecognition = TRUE; #endif #if defined(CC2420_NO_ACKNOWLEDGEMENTS) #warning Acknowledgements disabled! autoAckEnabled = FALSE; #else autoAckEnabled = TRUE; #endif hwAutoAckDefault = TRUE; acceptReservedFrames = FALSE; m_needsSync = FALSE; return SUCCESS; } /***************** Resource Commands ****************/ /* This module never actively requests the SPI resource, * instead the caller MUST request the SPI through this module * before it calls any of the provided commands and it must * release it afterwards (the caller can call multiple * commands in this module before it releases the SPI, though). */ async command error_t Resource.immediateRequest() { error_t error = call SpiResource.immediateRequest(); if ( error == SUCCESS ) { /* call CSN.clr();*/ } return error; } async command error_t Resource.request() { return call SpiResource.request(); } async command bool Resource.isOwner() { return call SpiResource.isOwner(); } async command error_t Resource.release() { atomic { /* call CSN.set();*/ return call SpiResource.release(); } } event void SpiResource.granted() { /* call CSN.clr();*/ signal Resource.granted(); } /***************** CC2420Power Commands ****************/ async command error_t CC2420Power.startVReg() { atomic { if ( m_state != S_VREG_STOPPED ) { return FAIL; } m_state = S_VREG_STARTING; } call VREN.set(); call StartupAlarm.start( CC2420_TIME_VREN * 2 ); // JH: changed from 32khz jiffies return SUCCESS; } async command error_t CC2420Power.stopVReg() { m_state = S_VREG_STOPPED; call RSTN.clr(); call VREN.clr(); call RSTN.set(); return SUCCESS; } async command error_t CC2420Power.startOscillator() { atomic { if ( m_state != S_VREG_STARTED ) { return FAIL; } m_state = S_XOSC_STARTING; call CSN.set(); call CSN.clr(); call IOCFG1.write( CC2420_SFDMUX_XOSC16M_STABLE << CC2420_IOCFG1_CCAMUX ); call InterruptCCA.enableRisingEdge(); call SXOSCON.strobe(); call IOCFG0.write( ( 1 << CC2420_IOCFG0_FIFOP_POLARITY ) | ( 127 << CC2420_IOCFG0_FIFOP_THR ) ); writeFsctrl(); writeMdmctrl0(); call RXCTRL1.write( ( 1 << CC2420_RXCTRL1_RXBPF_LOCUR ) | ( 1 << CC2420_RXCTRL1_LOW_LOWGAIN ) | ( 1 << CC2420_RXCTRL1_HIGH_HGM ) | ( 1 << CC2420_RXCTRL1_LNA_CAP_ARRAY ) | ( 1 << CC2420_RXCTRL1_RXMIX_TAIL ) | ( 1 << CC2420_RXCTRL1_RXMIX_VCM ) | ( 2 << CC2420_RXCTRL1_RXMIX_CURRENT ) ); call CSN.set(); } return SUCCESS; } async command error_t CC2420Power.stopOscillator() { atomic { if ( m_state != S_XOSC_STARTED ) { return FAIL; } m_state = S_VREG_STARTED; call CSN.set(); call CSN.clr(); call SXOSCOFF.strobe(); call CSN.set(); } return SUCCESS; } async command error_t CC2420Power.rxOn() { atomic { if ( !call SpiResource.isOwner() ) return FAIL; call CSN.set(); call CSN.clr(); call SRXON.strobe(); call SACKPEND.strobe(); // JH: ACKs need the pending bit set call CSN.set(); } return SUCCESS; } async command error_t CC2420Power.rfOff() { atomic { if ( !call SpiResource.isOwner() ) return FAIL; call CSN.set(); call CSN.clr(); call SRFOFF.strobe(); call CSN.set(); } return SUCCESS; } async command error_t CC2420Power.flushRxFifo() { uint16_t dummy; atomic { if ( !call SpiResource.isOwner() ) return FAIL; if ( call FIFO.get() ){ // check if there is something in the RXFIFO // SFLUSHRX: "Flush the RX FIFO buffer and reset the demodulator. // Always read at least one byte from the RXFIFO before // issuing the SFLUSHRX command strobe" (CC2420 Datasheet) call CSN.clr(); call RXFIFO_REGISTER.read(&dummy); // reading the byte call CSN.set(); call CSN.clr(); // "SFLUSHRX command strobe should be issued twice to ensure // that the SFD pin goes back to its idle state." (CC2420 Datasheet) call SFLUSHRX.strobe(); call SFLUSHRX.strobe(); call CSN.set(); } } return SUCCESS; } /***************** CC2420Config Commands ****************/ command uint8_t CC2420Config.getChannel() { atomic return m_channel; } command void CC2420Config.setChannel( uint8_t channel ) { atomic { m_needsSync = TRUE; m_channel = channel; } } async command uint16_t CC2420Config.getShortAddr() { atomic return m_short_addr; } command void CC2420Config.setShortAddr( uint16_t addr ) { atomic { m_needsSync = TRUE; m_short_addr = addr; } } async command uint16_t CC2420Config.getPanAddr() { atomic return m_pan; } command void CC2420Config.setPanAddr( uint16_t pan ) { atomic { m_needsSync = TRUE; m_pan = pan; } } async command bool CC2420Config.getPanCoordinator() { atomic return m_isPanCoord; } command void CC2420Config.setPanCoordinator( bool pCoord ) { atomic { m_needsSync = TRUE; m_isPanCoord = pCoord; } } command void CC2420Config.setPromiscuousMode(bool on) { atomic { m_needsSync = TRUE; if (on){ addressRecognition = FALSE; acceptReservedFrames = TRUE; autoAckEnabled = FALSE; } else { addressRecognition = TRUE; acceptReservedFrames = FALSE; autoAckEnabled = TRUE; } } } async command bool CC2420Config.isPromiscuousModeEnabled() { return acceptReservedFrames; } async command uint8_t CC2420Config.getCCAMode() { atomic return m_CCAMode; } command void CC2420Config.setCCAMode(uint8_t mode) { atomic { m_needsSync = TRUE; m_CCAMode = mode; } } async command uint8_t CC2420Config.getTxPower() { atomic return m_txPower; } command void CC2420Config.setTxPower(uint8_t txPower) { atomic { m_needsSync = TRUE; m_txPower = txPower; } } async command bool CC2420Config.needsSync(){ atomic return m_needsSync; } /** * Sync must be called to commit software parameters configured on * the microcontroller (through the CC2420Config interface) to the * CC2420 radio chip. */ async command error_t CC2420Config.sync() { atomic { if ( !call SpiResource.isOwner() ) return FAIL; if (m_needsSync){ call CSN.set(); call CSN.clr(); call SRFOFF.strobe(); call CSN.set(); call CSN.clr(); writeFsctrl(); writeMdmctrl0(); writeTxPower(); call CSN.set(); call CSN.clr(); writeId(); call CSN.set(); m_needsSync = FALSE; } } return SUCCESS; } /***************** ReadRssi Commands ****************/ async command error_t CC2420Power.rssi(int8_t *rssi) { uint16_t data; cc2420_status_t status; atomic { if ( !call SpiResource.isOwner() ) return FAIL; call CSN.set(); call CSN.clr(); status = call RSSI.read(&data); call CSN.set(); if ((status & 0x02)){ *rssi = (data & 0x00FF); return SUCCESS; } else return FAIL; } } /***************** StartupAlarm Events ****************/ async event void StartupAlarm.fired() { if ( m_state == S_VREG_STARTING ) { m_state = S_VREG_STARTED; call RSTN.clr(); call RSTN.set(); signal CC2420Power.startVRegDone(); } } /***************** InterruptCCA Events ****************/ async event void InterruptCCA.fired() { m_state = S_XOSC_STARTED; call InterruptCCA.disable(); call CSN.set(); call CSN.clr(); call IOCFG1.write( 0 ); writeId(); call CSN.set(); signal CC2420Power.startOscillatorDone(); } /***************** Functions ****************/ /** * Write teh FSCTRL register */ void writeFsctrl() { uint8_t channel; atomic { channel = m_channel; } call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) | ( ( (channel - 11)*5+357 ) << CC2420_FSCTRL_FREQ ) ); } /** * Write the MDMCTRL0 register */ void writeMdmctrl0() { atomic { uint8_t _acceptReservedFrames = (acceptReservedFrames ? 1: 0); uint8_t _panCoord = (m_isPanCoord ? 1: 0); uint8_t _addressRecognition = (addressRecognition ? 1: 0); uint8_t _autoAck = ((autoAckEnabled && hwAutoAckDefault) ? 1 : 0); call MDMCTRL0.write( ( _acceptReservedFrames << CC2420_MDMCTRL0_RESERVED_FRAME_MODE ) | ( _panCoord << CC2420_MDMCTRL0_PAN_COORDINATOR ) | ( _addressRecognition << CC2420_MDMCTRL0_ADR_DECODE ) | ( 2 << CC2420_MDMCTRL0_CCA_HYST ) | ( m_CCAMode << CC2420_MDMCTRL0_CCA_MOD ) | ( 1 << CC2420_MDMCTRL0_AUTOCRC ) | ( _autoAck << CC2420_MDMCTRL0_AUTOACK ) | ( 2 << CC2420_MDMCTRL0_PREAMBLE_LENGTH ) ); } // Jon Green: // MDMCTRL1.CORR_THR is defaulted to 20 instead of 0 like the datasheet says // If we add in changes to MDMCTRL1, be sure to include this fix. } /** * Write the IEEEADR register */ void writeId() { uint16_t bcnAccept = 0; nxle_uint16_t id[ 6 ]; atomic { call FrameUtility.copyLocalExtendedAddressLE((uint8_t*) &id); id[ 4 ] = m_pan; id[ 5 ] = m_short_addr; } if (m_pan == 0xFFFF) bcnAccept = 1; call IOCFG0.write( (bcnAccept << CC2420_IOCFG0_BCN_ACCEPT) | ( 1 << CC2420_IOCFG0_FIFOP_POLARITY ) | ( 127 << CC2420_IOCFG0_FIFOP_THR ) ); // ext.adr, PANID and short adr are located at consecutive addresses in RAM call IEEEADR.write(0, (uint8_t*)&id, sizeof(id)); } void writeTxPower(){ call TXCTRL.write( ( 2 << CC2420_TXCTRL_TXMIXBUF_CUR ) | ( 3 << CC2420_TXCTRL_PA_CURRENT ) | ( 1 << CC2420_TXCTRL_RESERVED ) | ( (m_txPower & 0x1F) << CC2420_TXCTRL_PA_LEVEL ) ); } } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420ControlTransmitC.nc000066400000000000000000000120261207233610700242050ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2009-03-04 18:31:04 $ * @author Jan Hauer * ======================================================================== */ /** * This configuration combines CC2420ControlC and CC2420TransmitC * and uses only one instance of CC2420SpiC. * * @author Jonathan Hui * @author Jan-Hinrich Hauer * @version $Revision: 1.4 $ $Date: 2009-03-04 18:31:04 $ */ #include "CC2420.h" configuration CC2420ControlTransmitC { provides { // CC2420ControlC interface Resource; interface CC2420Config; interface CC2420Power; // CC2420TransmitC interface AsyncStdControl as TxControl; interface CC2420Tx; } uses { // CC2420ControlC interface Alarm as StartupAlarm; interface FrameUtility; // CC2420TransmitC interface Alarm as AckAlarm; interface CaptureTime; } } implementation { // CC2420ControlC components CC2420ControlP; Resource = CC2420ControlP; CC2420Config = CC2420ControlP; CC2420Power = CC2420ControlP; FrameUtility = CC2420ControlP; components MainC; MainC.SoftwareInit -> CC2420ControlP; CC2420ControlP.StartupAlarm = StartupAlarm; components HplCC2420PinsC as Pins; CC2420ControlP.CSN -> Pins.CSN; CC2420ControlP.RSTN -> Pins.RSTN; CC2420ControlP.VREN -> Pins.VREN; CC2420ControlP.FIFO -> Pins.FIFO; components HplCC2420InterruptsC as Interrupts; CC2420ControlP.InterruptCCA -> Interrupts.InterruptCCA; components new CC2420SpiC() as Spi; CC2420ControlP.SpiResource -> Spi; CC2420ControlP.SRXON -> Spi.SRXON; CC2420ControlP.SACKPEND -> Spi.SACKPEND; CC2420ControlP.SRFOFF -> Spi.SRFOFF; CC2420ControlP.SXOSCON -> Spi.SXOSCON; CC2420ControlP.SXOSCOFF -> Spi.SXOSCOFF; CC2420ControlP.FSCTRL -> Spi.FSCTRL; CC2420ControlP.IOCFG0 -> Spi.IOCFG0; CC2420ControlP.IOCFG1 -> Spi.IOCFG1; CC2420ControlP.MDMCTRL0 -> Spi.MDMCTRL0; CC2420ControlP.MDMCTRL1 -> Spi.MDMCTRL1; /* CC2420ControlP.PANID -> Spi.PANID;*/ CC2420ControlP.TXCTRL -> Spi.TXCTRL; CC2420ControlP.IEEEADR -> Spi.IEEEADR; CC2420ControlP.RXCTRL1 -> Spi.RXCTRL1; CC2420ControlP.SFLUSHRX-> Spi.SFLUSHRX; CC2420ControlP.RSSI -> Spi.RSSI; CC2420ControlP.RXFIFO_REGISTER -> Spi.RXFIFO_REGISTER; CC2420ControlP.SNOP -> Spi.SNOP; // CC2420TransmitC components CC2420TransmitP; TxControl = CC2420TransmitP; CC2420Tx = CC2420TransmitP; AckAlarm = CC2420TransmitP; CaptureTime = CC2420TransmitP; MainC.SoftwareInit -> CC2420TransmitP; CC2420TransmitP.CCA -> Pins.CCA; CC2420TransmitP.CSN -> Pins.CSN; CC2420TransmitP.SFD -> Pins.SFD; CC2420TransmitP.CaptureSFD -> Interrupts.CaptureSFD; CC2420TransmitP.FIFOP -> Pins.FIFOP; CC2420TransmitP.FIFO -> Pins.FIFO; CC2420TransmitP.ChipSpiResource -> Spi; CC2420TransmitP.SNOP -> Spi.SNOP; CC2420TransmitP.STXON -> Spi.STXON; CC2420TransmitP.STXONCCA -> Spi.STXONCCA; CC2420TransmitP.SFLUSHTX -> Spi.SFLUSHTX; CC2420TransmitP.TXCTRL -> Spi.TXCTRL; CC2420TransmitP.TXFIFO -> Spi.TXFIFO; CC2420TransmitP.TXFIFO_RAM -> Spi.TXFIFO_RAM; CC2420TransmitP.MDMCTRL1 -> Spi.MDMCTRL1; CC2420TransmitP.SRXON -> Spi.SRXON; CC2420TransmitP.SRFOFF -> Spi.SRFOFF; CC2420TransmitP.SFLUSHRX-> Spi.SFLUSHRX; CC2420TransmitP.SACKPEND -> Spi.SACKPEND; components CC2420ReceiveC; CC2420TransmitP.CC2420Receive -> CC2420ReceiveC; } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420Power.nc000066400000000000000000000072251207233610700220410ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An HAL abstraction of the ChipCon CC2420 radio. This abstraction * deals specifically with radio power operations (e.g. voltage * regulator, oscillator, etc). However, it does not include * transmission power, see the CC2420Config interface. * * @author Jonathan Hui * @author Jan Hauer * @version $Revision: 1.3 $ $Date: 2009-03-04 18:31:04 $ */ interface CC2420Power { /** * Start the voltage regulator on the CC2420. On SUCCESS, * startVReg() will be signalled when the voltage * regulator is fully on. * * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t startVReg(); /** * Signals that the voltage regulator has been started. */ async event void startVRegDone(); /** * Stop the voltage regulator immediately. * * @return SUCCESS always */ async command error_t stopVReg(); /** * Start the oscillator. On SUCCESS, startOscillator * will be signalled when the oscillator has been started. * * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t startOscillator(); /** * Signals that the oscillator has been started. */ async event void startOscillatorDone(); /** * Stop the oscillator. * * @return SUCCESS if the oscillator was stopped, FAIL otherwise. */ async command error_t stopOscillator(); /** * Enable RX. * * @return SUCCESS if receive mode has been enabled, FAIL otherwise. */ async command error_t rxOn(); /** * Disable RX. * * @return SUCCESS if receive mode has been disabled, FAIL otherwise. */ async command error_t rfOff(); /** * Read RSSI from the radio. * @return SUCCESS if RSSI was read successfully, FAIL otherwise. */ async command error_t rssi(int8_t *rssi); /** * Flush the RXFIFO if it is not empty. * Radio SHOULD be disabled (off) when calling this command. * * @return SUCCESS if fifo was flushed (or it was empty), FAIL otherwise. */ async command error_t flushRxFifo(); } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420ReceiveC.nc000066400000000000000000000056071207233610700224340ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the receive path for the ChipCon CC2420 radio. * * @author Jonathan Hui * @author Jan Hauer * @version $Revision: 1.2 $ $Date: 2009-03-04 18:31:04 $ */ configuration CC2420ReceiveC { provides interface CC2420AsyncSplitControl; provides interface CC2420Receive; // to CC2420TransmitP for ACK provides interface CC2420Rx; // to the driver uses interface FrameUtility; uses interface CC2420Config; } implementation { components MainC; components CC2420ReceiveP; components new CC2420SpiC() as Spi; components HplCC2420PinsC as Pins; components HplCC2420InterruptsC as InterruptsC; CC2420AsyncSplitControl = CC2420ReceiveP; CC2420Receive = CC2420ReceiveP; CC2420Rx = CC2420ReceiveP; FrameUtility = CC2420ReceiveP; CC2420Config = CC2420ReceiveP; MainC.SoftwareInit -> CC2420ReceiveP; CC2420ReceiveP.CSN -> Pins.CSN; CC2420ReceiveP.FIFO -> Pins.FIFO; CC2420ReceiveP.FIFOP -> Pins.FIFOP; CC2420ReceiveP.InterruptFIFOP -> InterruptsC.InterruptFIFOP; CC2420ReceiveP.SpiResource -> Spi; CC2420ReceiveP.RXFIFO -> Spi.RXFIFO; CC2420ReceiveP.SFLUSHRX -> Spi.SFLUSHRX; CC2420ReceiveP.SACK -> Spi.SACK; CC2420ReceiveP.SACKPEND -> Spi.SACKPEND; CC2420ReceiveP.SRXON -> Spi.SRXON; CC2420ReceiveP.MDMCTRL1 -> Spi.MDMCTRL1; } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420ReceiveP.nc000066400000000000000000000364471207233610700224570ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Jung Il Choi * @author Jan Hauer * @version $Revision: 1.4 $ $Date: 2009-05-05 16:56:49 $ */ module CC2420ReceiveP { provides interface Init; provides interface CC2420AsyncSplitControl as AsyncSplitControl; provides interface CC2420Receive; provides interface CC2420Rx; uses interface GeneralIO as CSN; uses interface GeneralIO as FIFO; uses interface GeneralIO as FIFOP; uses interface GpioInterrupt as InterruptFIFOP; uses interface Resource as SpiResource; uses interface CC2420Fifo as RXFIFO; uses interface CC2420Strobe as SACK; uses interface CC2420Strobe as SFLUSHRX; uses interface CC2420Strobe as SRXON; uses interface CC2420Strobe as SACKPEND; uses interface CC2420Register as MDMCTRL1; uses interface FrameUtility; uses interface CC2420Config; uses interface CC2420Ram as RXFIFO_RAM; } implementation { typedef enum { S_STOPPED, S_STARTING, S_STARTED, S_RX_LENGTH, S_RX_FCF, S_RX_HEADER, S_RX_PAYLOAD, } cc2420_receive_state_t; enum { RXFIFO_SIZE = 128, TIMESTAMP_QUEUE_SIZE = 8, //SACK_HEADER_LENGTH = 7, SACK_HEADER_LENGTH = 3, }; uint32_t m_timestamp_queue[ TIMESTAMP_QUEUE_SIZE ]; uint8_t m_timestamp_head; uint8_t m_timestamp_size; /** Number of packets we missed because we were doing something else */ uint8_t m_missed_packets; /** TRUE if we are receiving a valid packet into the stack */ norace bool receivingPacket; /** The length of the frame we're currently receiving */ norace uint8_t rxFrameLength; norace uint8_t m_bytes_left; // norace message_t* m_p_rx_buf; // message_t m_rx_buf; cc2420_receive_state_t m_state; // new packet format: message_t m_frame; norace message_t *m_rxFramePtr; norace uint8_t m_mhrLen; uint8_t m_dummy; norace bool m_stop; /***************** Prototypes ****************/ void reset_state(); void beginReceive(); void receive(); void waitForNextPacket(); void flush(); void switchToUnbufferedMode(); void switchToBufferedMode(); void continueStart(); void continueStop(); task void stopContinueTask(); task void receiveDone_task(); /***************** Init Commands ****************/ command error_t Init.init() { m_rxFramePtr = &m_frame; atomic m_state = S_STOPPED; return SUCCESS; } /***************** AsyncSplitControl ****************/ /* NOTE: AsyncSplitControl does not switch the state of the radio * hardware (i.e. it does not put the radio in Rx mode, this has to * be done by the caller through a separate interface/component). */ /** * AsyncSplitControl.start should be called before radio * is switched to Rx mode (or at least early enough before * a packet has been received, i.e. before FIFOP changes) */ async command error_t AsyncSplitControl.start() { atomic { if ( !call FIFO.get() && !call FIFOP.get() ){ // RXFIFO has some data (remember: FIFOP is inverted) // the problem is that this messses up the timestamping // so why don't we flush here ourselves? // because we don't own the SPI... return FAIL; } ASSERT(m_state == S_STOPPED); reset_state(); m_state = S_STARTED; call InterruptFIFOP.enableFallingEdge(); // ready! } return SUCCESS; } /* AsyncSplitControl.stop: * * IMPORTANT: when AsyncSplitControl.stop is called, * then either * 1) the radio MUST still be in RxMode * 2) it was never put in RxMode after * AsyncSplitControl.start() was called * * => The radio may be switched off only *after* the * stopDone() event was signalled. */ async command error_t AsyncSplitControl.stop() { atomic { if (m_state == S_STOPPED) return EALREADY; else { m_stop = TRUE; call InterruptFIFOP.disable(); if (!receivingPacket) continueStop(); // it is safe to stop now // else continueStop will be called after // current Rx operation is finished } } return SUCCESS; } void continueStop() { atomic { if (!m_stop){ return; } m_stop = FALSE; m_state = S_STOPPED; } post stopContinueTask(); } task void stopContinueTask() { ASSERT(receivingPacket != TRUE); call SpiResource.release(); // may fail atomic m_state = S_STOPPED; signal AsyncSplitControl.stopDone(SUCCESS); } /***************** CC2420Receive Commands ****************/ /** * Start frame delimiter signifies the beginning/end of a packet * See the CC2420 datasheet for details. */ async command void CC2420Receive.sfd( uint32_t time ) { if (m_state == S_STOPPED) return; if ( m_timestamp_size < TIMESTAMP_QUEUE_SIZE ) { uint8_t tail = ( ( m_timestamp_head + m_timestamp_size ) % TIMESTAMP_QUEUE_SIZE ); m_timestamp_queue[ tail ] = time; m_timestamp_size++; } } async command void CC2420Receive.sfd_dropped() { if (m_state == S_STOPPED) return; if ( m_timestamp_size ) { m_timestamp_size--; } } /***************** InterruptFIFOP Events ****************/ async event void InterruptFIFOP.fired() { atomic { if ( m_state == S_STARTED ) { beginReceive(); } else { m_missed_packets++; } } } /***************** SpiResource Events ****************/ event void SpiResource.granted() { atomic { switch (m_state) { case S_STOPPED: ASSERT(0); break; // this should never happen! default: receive(); } } } /***************** RXFIFO Events ****************/ /** * We received some bytes from the SPI bus. Process them in the context * of the state we're in. Remember the length byte is not part of the length */ async event void RXFIFO.readDone( uint8_t* rx_buf, uint8_t rx_len, error_t error ) { uint8_t* buf; atomic { buf = (uint8_t*) &((ieee154_header_t*) m_rxFramePtr->header)->length; rxFrameLength = ((ieee154_header_t*) m_rxFramePtr->header)->length; switch( m_state ) { case S_RX_LENGTH: m_state = S_RX_FCF; if ( rxFrameLength + 1 > m_bytes_left ) { // Length of this packet is bigger than the RXFIFO, flush it out. flush(); } else { if ( !call FIFO.get() && !call FIFOP.get() ) { //m_bytes_left -= rxFrameLength + 1; flush(); } //if(rxFrameLength <= MAC_PACKET_SIZE) { if(rxFrameLength <= (sizeof(ieee154_header_t) - 1 + TOSH_DATA_LENGTH + 2)){ if(rxFrameLength > 0) { if(rxFrameLength > SACK_HEADER_LENGTH) { // This packet has an FCF byte plus at least one more byte to read call RXFIFO.continueRead(buf + 1, SACK_HEADER_LENGTH); } else { // This is really a bad packet, skip FCF and get it out of here. flush(); //m_state = S_RX_PAYLOAD; //call RXFIFO.continueRead(buf + 1, rxFrameLength); } } else { // Length == 0; start reading the next packet flush(); /* atomic receivingPacket = FALSE;*/ /* call CSN.set();*/ /* call SpiResource.release();*/ /* waitForNextPacket();*/ } } else { // Length is too large; we have to flush the entire Rx FIFO flush(); } } break; case S_RX_FCF: if (call FrameUtility.getMHRLength(buf[1], buf[2], &m_mhrLen) != SUCCESS || m_mhrLen > rxFrameLength - 2) { // header size incorrect flush(); break; } else if (m_mhrLen > SACK_HEADER_LENGTH) { m_state = S_RX_HEADER; call RXFIFO.continueRead(buf + 1 + SACK_HEADER_LENGTH, m_mhrLen - SACK_HEADER_LENGTH); break; } else { // complete header has been read: fall through } // fall through case S_RX_HEADER: // JH: we are either using HW ACKs (normal receive mode) or don't ACK any // packets (promiscuous mode) // Didn't flip CSn, we're ok to continue reading. if ((rxFrameLength - m_mhrLen - 2) > TOSH_DATA_LENGTH) // 2 for CRC flush(); else { m_state = S_RX_PAYLOAD; call RXFIFO.continueRead((uint8_t*) m_rxFramePtr->data, rxFrameLength - m_mhrLen); } break; case S_RX_PAYLOAD: call CSN.set(); if(!m_missed_packets) { // Release the SPI only if there are no more frames to download call SpiResource.release(); } if ( m_timestamp_size ) { if ( rxFrameLength > 4 ) { ((ieee154_metadata_t*) m_rxFramePtr->metadata)->timestamp = m_timestamp_queue[ m_timestamp_head ]; m_timestamp_head = ( m_timestamp_head + 1 ) % TIMESTAMP_QUEUE_SIZE; m_timestamp_size--; } } else { ((ieee154_metadata_t*) m_rxFramePtr->metadata)->timestamp = IEEE154_INVALID_TIMESTAMP; } // We may have received an ack that should be processed by Transmit // buf[rxFrameLength] >> 7 checks the CRC if ( ( m_rxFramePtr->data[ rxFrameLength - m_mhrLen - 1 ] >> 7 ) && rx_buf ) { uint8_t type = ((ieee154_header_t*) m_rxFramePtr->header)->mhr[0] & 0x07; /* signal CC2420Receive.receive( type, m_p_rx_buf );*/ signal CC2420Receive.receive( type, m_rxFramePtr ); /* if ( type == IEEE154_TYPE_DATA ) {*/ if ( (type != IEEE154_TYPE_ACK || call CC2420Config.isPromiscuousModeEnabled()) && !m_stop) { post receiveDone_task(); return; } } waitForNextPacket(); break; default: atomic receivingPacket = FALSE; call CSN.set(); call SpiResource.release(); if (m_stop){ continueStop(); return; } break; } } } async event void RXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) { } /***************** Tasks *****************/ /** * Fill in metadata details, pass the packet up the stack, and * get the next packet. */ task void receiveDone_task() { uint8_t payloadLen = ((ieee154_header_t*) m_rxFramePtr->header)->length - m_mhrLen - 2; ieee154_metadata_t *metadata = (ieee154_metadata_t*) m_rxFramePtr->metadata; atomic ASSERT(m_state != S_STOPPED); ((ieee154_header_t*) m_rxFramePtr->header)->length = m_rxFramePtr->data[payloadLen+1] & 0x7f; // temp. LQI metadata->rssi = m_rxFramePtr->data[payloadLen]; metadata->linkQuality = ((ieee154_header_t*) m_rxFramePtr->header)->length; // copy back ((ieee154_header_t*) m_rxFramePtr->header)->length = payloadLen; m_rxFramePtr = signal CC2420Rx.received(m_rxFramePtr); /* cc2420_metadata_t* metadata = call CC2420PacketBody.getMetadata( m_p_rx_buf );*/ /* uint8_t* buf = (uint8_t*) call CC2420PacketBody.getHeader( m_p_rx_buf );;*/ /* */ /* metadata->crc = buf[ rxFrameLength ] >> 7;*/ /* metadata->rssi = buf[ rxFrameLength - 1 ];*/ /* metadata->lqi = buf[ rxFrameLength ] & 0x7f;*/ // async event message_t* receiveDone( message_t *data ); /* m_p_rx_buf = signal Receive.receive( m_rxFramePtrm_p_rx_buf, m_p_rx_buf->data, */ /* rxFrameLength );*/ atomic receivingPacket = FALSE; waitForNextPacket(); } /****************** Functions ****************/ /** * Attempt to acquire the SPI bus to receive a packet. */ void beginReceive() { atomic { if (m_state == S_STOPPED || m_stop){ return; } m_state = S_RX_LENGTH; receivingPacket = TRUE; if(call SpiResource.isOwner()) { receive(); } else if (call SpiResource.immediateRequest() == SUCCESS) { receive(); } else { call SpiResource.request(); } } } /** * Flush out the Rx FIFO */ void flush() { reset_state(); call CSN.set(); call CSN.clr(); call SFLUSHRX.strobe(); call SFLUSHRX.strobe(); call CSN.set(); call SpiResource.release(); waitForNextPacket(); } /** * The first byte of each packet is the length byte. Read in that single * byte, and then read in the rest of the packet. The CC2420 could contain * multiple packets that have been buffered up, so if something goes wrong, * we necessarily want to flush out the FIFO unless we have to. */ void receive() { call CSN.set(); call CSN.clr(); //call RXFIFO.beginRead( (uint8_t*)(call CC2420PacketBody.getHeader( m_p_rx_buf )), 1 ); call RXFIFO.beginRead( &((ieee154_header_t*) m_rxFramePtr->header)->length, 1 ); } /** * Determine if there's a packet ready to go, or if we should do nothing * until the next packet arrives */ void waitForNextPacket() { atomic { if ( m_state == S_STOPPED) { call SpiResource.release(); return; } receivingPacket = FALSE; if (m_stop){ continueStop(); return; } if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get() ) { // A new packet is buffered up and ready to go if ( m_missed_packets ) { m_missed_packets--; } beginReceive(); } else { // Wait for the next packet to arrive m_state = S_STARTED; m_missed_packets = 0; call SpiResource.release(); } } } /** * Reset this component */ void reset_state() { m_bytes_left = RXFIFO_SIZE; atomic receivingPacket = FALSE; m_timestamp_head = 0; m_timestamp_size = 0; m_missed_packets = 0; } } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420Rx.nc000066400000000000000000000040741207233610700213350ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:07 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" #include "TKN154_platform.h" interface CC2420Rx { /** * Receive a packet buffer, returning a buffer for the signaling * component to use for the next reception. */ event message_t* received(message_t *data); } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420TKN154C.nc000066400000000000000000000067751207233610700217470ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:07 $ * @author: Jan Hauer * ======================================================================== */ #include "Timer62500hz.h" configuration CC2420TKN154C { provides { interface SplitControl; interface RadioRx; interface RadioTx; interface SlottedCsmaCa; interface UnslottedCsmaCa; interface EnergyDetection; interface RadioOff; interface Set as RadioPromiscuousMode; interface Timestamp; interface GetNow as CCA; } uses { interface Notify as PIBUpdate[uint8_t attributeID]; interface LocalTime; interface Alarm as Alarm1; interface Alarm as Alarm2; interface FrameUtility; interface ReliableWait; interface TimeCalc; interface Random; interface CaptureTime; } } implementation { components MainC, CC2420TKN154P as PHY; SplitControl = PHY; RadioRx = PHY; RadioTx = PHY; SlottedCsmaCa = PHY; UnslottedCsmaCa = PHY; RadioOff = PHY; EnergyDetection = PHY; PIBUpdate = PHY; RadioPromiscuousMode = PHY; Timestamp = PHY; LocalTime = PHY; ReliableWait = PHY; TimeCalc = PHY; CCA = PHY; PHY.Random = Random; components CC2420ControlTransmitC; PHY.SpiResource -> CC2420ControlTransmitC; PHY.CC2420Power -> CC2420ControlTransmitC; PHY.CC2420Config -> CC2420ControlTransmitC; CC2420ControlTransmitC.StartupAlarm = Alarm2; FrameUtility = CC2420ControlTransmitC; CaptureTime = CC2420ControlTransmitC; PHY.TxControl -> CC2420ControlTransmitC; PHY.CC2420Tx -> CC2420ControlTransmitC; CC2420ControlTransmitC.AckAlarm = Alarm1; components CC2420ReceiveC; PHY.RxControl -> CC2420ReceiveC; PHY.CC2420Rx -> CC2420ReceiveC.CC2420Rx; FrameUtility = CC2420ReceiveC; CC2420ReceiveC.CC2420Config -> CC2420ControlTransmitC; } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420TKN154P.nc000066400000000000000000000700651207233610700217550ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2009/10/20 09:21:39 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" #include "TKN154_PHY.h" #include "platform_message.h" #include #include "Timer62500hz.h" module CC2420TKN154P { provides { interface SplitControl; interface RadioOff; interface RadioRx; interface RadioTx; interface SlottedCsmaCa; interface UnslottedCsmaCa; interface EnergyDetection; interface Set as RadioPromiscuousMode; interface Timestamp; interface GetNow as CCA; } uses { interface Notify as PIBUpdate[uint8_t attributeID]; interface LocalTime as LocalTime; interface Resource as SpiResource; interface AsyncStdControl as TxControl; interface CC2420AsyncSplitControl as RxControl; interface CC2420Power; interface CC2420Config; interface CC2420Rx; interface CC2420Tx; interface Random; interface Leds; interface ReliableWait; interface TimeCalc; } } implementation { typedef enum { S_STOPPED, S_STOPPING, S_STARTING, S_ED, S_RADIO_OFF, S_RESERVE_RX_SPI, S_RX_PENDING, S_RECEIVING, S_OFF_PENDING, S_LOAD_TXFIFO_NO_CSMA, S_LOAD_TXFIFO_UNSLOTTED, S_LOAD_TXFIFO_SLOTTED, S_TX_PENDING, S_TX_BACKOFF_UNSLOTTED, S_TX_BACKOFF_SLOTTED, S_TX_ACTIVE_NO_CSMA, S_TX_ACTIVE_UNSLOTTED_CSMA, S_TX_ACTIVE_SLOTTED_CSMA, } m_state_t; norace m_state_t m_state = S_STOPPED; norace ieee154_txframe_t *m_txframe; norace error_t m_txResult; norace bool m_ackFramePending; norace uint16_t m_remainingBackoff; norace bool m_resume; norace ieee154_csma_t *m_csma; bool m_pibUpdated; /* timing */ norace uint32_t m_dt; norace uint32_t m_t0; /* energy detection */ int8_t m_maxEnergy; uint32_t m_edDuration; uint32_t m_edStartTime; /* task prototypes */ task void energyDetectionTask(); task void startDoneTask(); task void rxControlStopDoneTask(); task void configSyncTask(); /* function prototypes */ uint8_t dBmToPA_LEVEL(int dbm); void txDoneRxControlStopped(); void rxSpiReserved(); void txSpiReserved(); void sendDoneSpiReserved(); void offSpiReserved(); void offStopRxDone(); uint16_t getRandomBackoff(uint8_t BE); void loadTxFrame(ieee154_txframe_t *frame); void checkEnableRxForACK(); /* ----------------------- StdControl Operations ----------------------- */ command error_t SplitControl.start() { atomic { if (m_state == S_RADIO_OFF) return EALREADY; else if (m_state != S_STOPPED) return FAIL; m_state = S_STARTING; } call SpiResource.request(); /* continue in startSpiReserved() */ return SUCCESS; } void startSpiReserved() { /* we own the SPI bus */ call CC2420Power.startVReg(); } async event void CC2420Power.startVRegDone() { call CC2420Power.startOscillator(); } async event void CC2420Power.startOscillatorDone() { call CC2420Power.rfOff(); call CC2420Power.flushRxFifo(); call CC2420Tx.unlockChipSpi(); post startDoneTask(); } task void startDoneTask() { // in case this is a restart: we just set the channel to the same value // it had before in order to set m_needsSync to TRUE and then call sync // to populate the registers on the chip with the values already in memory call CC2420Config.setChannel(call CC2420Config.getChannel()); call CC2420Config.sync(); call SpiResource.release(); m_state = S_RADIO_OFF; signal SplitControl.startDone(SUCCESS); } command error_t SplitControl.stop() { atomic { if (m_state == S_STOPPED) return EALREADY; else if (m_state != S_RADIO_OFF) return FAIL; m_state = S_STOPPING; } call SpiResource.request(); return SUCCESS; } void stopSpiReserved() { /* we own the SPI bus */ call CC2420Power.rfOff(); call CC2420Power.flushRxFifo(); call CC2420Power.stopOscillator(); call CC2420Power.stopVReg(); call CC2420Tx.unlockChipSpi(); call SpiResource.release(); m_state = S_STOPPED; signal SplitControl.stopDone(SUCCESS); } /* ----------------------- Helpers / PIB Updates ----------------------- */ /* Returns a random number [0,(2^BE) - 1] (uniform distr.) */ /* multiplied by backoff period time (in symbols) */ uint16_t getRandomBackoff(uint8_t BE) { uint16_t res = call Random.rand16(); uint16_t mask = 0xFFFF; mask <<= BE; mask = ~mask; res &= mask; return (res * IEEE154_aUnitBackoffPeriod); } /* input: power in dBm, output: PA_LEVEL setting for CC2420 TXCTRL register */ uint8_t dBmToPA_LEVEL(int dBm) { uint8_t result; /* the cc2420 has 8 discrete (documented) values */ if (dBm >= 0) result = 31; else if (dBm > -2) result = 27; else if (dBm > -4) result = 23; else if (dBm > -6) result = 19; else if (dBm > -9) result = 15; else if (dBm > -13) result = 11; else if (dBm > -20) result = 7; else result = 3; return result; } event void PIBUpdate.notify[uint8_t PIBAttribute](const void* PIBAttributeValue) { uint8_t txpower; switch (PIBAttribute) { case IEEE154_macShortAddress: call CC2420Config.setShortAddr(*((ieee154_macShortAddress_t*) PIBAttributeValue)); break; case IEEE154_macPANId: call CC2420Config.setPanAddr(*((ieee154_macPANId_t*) PIBAttributeValue)); break; case IEEE154_phyCurrentChannel: call CC2420Config.setChannel(*((ieee154_phyCurrentChannel_t*) PIBAttributeValue)); break; case IEEE154_macPanCoordinator: call CC2420Config.setPanCoordinator(*((ieee154_macPanCoordinator_t*) PIBAttributeValue)); break; case IEEE154_phyTransmitPower: /* lower 6 bits are twos-complement in dBm (range -32 to +31 dBm) */ txpower = (*((ieee154_phyTransmitPower_t*) PIBAttributeValue)) & 0x3F; if (txpower & 0x20) txpower |= 0xC0; /* make it negative, to be interpreted as int8_t */ call CC2420Config.setTxPower(dBmToPA_LEVEL((int8_t) txpower)); break; case IEEE154_phyCCAMode: call CC2420Config.setCCAMode(*((ieee154_phyCCAMode_t*) PIBAttributeValue)); break; } if (m_state == S_RECEIVING || m_state == S_RX_PENDING) post configSyncTask(); } task void configSyncTask() { if (call SpiResource.immediateRequest() == SUCCESS) { call CC2420Config.sync(); if (m_state == S_RECEIVING) { // need to toggle radio state to make changes effective now call CC2420Power.rfOff(); call CC2420Power.rxOn(); } call SpiResource.release(); } else post configSyncTask(); // spin (should be short time, until packet is received) } command void RadioPromiscuousMode.set( bool val ) { call CC2420Config.setPromiscuousMode(val); } /* ----------------------- Energy Detection ----------------------- */ command error_t EnergyDetection.start(uint32_t duration) { atomic { if (m_state == S_ED) return EALREADY; else if (m_state != S_RADIO_OFF) return FAIL; m_state = S_ED; } m_edDuration = duration; m_maxEnergy = -128 + 45; /* initialization (45 will be substracted below) */ call SpiResource.request(); return SUCCESS; } void edReserved() { call CC2420Config.sync(); /* put PIB changes into operation (if any) */ call CC2420Power.rxOn(); m_edStartTime = call LocalTime.get(); post energyDetectionTask(); } task void energyDetectionTask() { int8_t value; if (call CC2420Power.rssi(&value) == SUCCESS) if (value > m_maxEnergy) m_maxEnergy = value; if (call TimeCalc.hasExpired(m_edStartTime, m_edDuration)) { /* P = RSSI_VAL + RSSI_OFFSET [dBm] */ /* RSSI_OFFSET is approximately -45. */ m_maxEnergy -= 45; call CC2420Power.rfOff(); call CC2420Power.flushRxFifo(); call SpiResource.release(); m_state = S_RADIO_OFF; signal EnergyDetection.done(SUCCESS, m_maxEnergy); } else post energyDetectionTask(); } /* ----------------------- RadioOff ----------------------- */ async command error_t RadioOff.off() { error_t result; atomic { if (m_state == S_RADIO_OFF) return EALREADY; else if (m_state != S_RECEIVING) return FAIL; m_state = S_OFF_PENDING; } result = call RxControl.stop(); ASSERT(result == SUCCESS); return result; } void offStopRxDone() { if (call SpiResource.immediateRequest() == SUCCESS) offSpiReserved(); else call SpiResource.request(); /* will continue in offSpiReserved() */ } void offSpiReserved() { call TxControl.stop(); call CC2420Power.rfOff(); call CC2420Power.flushRxFifo(); call CC2420Tx.unlockChipSpi(); call SpiResource.release(); m_state = S_RADIO_OFF; signal RadioOff.offDone(); } async command bool RadioOff.isOff() { return m_state == S_RADIO_OFF; } /* ----------------------- RadioRx ----------------------- */ async command error_t RadioRx.enableRx(uint32_t t0, uint32_t dt) { error_t result; atomic { if (m_state != S_RADIO_OFF) return FAIL; m_state = S_RESERVE_RX_SPI; } m_t0 = t0; m_dt = dt; result = call RxControl.start(); ASSERT(result == SUCCESS); if (result == SUCCESS) if (call SpiResource.immediateRequest() == SUCCESS) rxSpiReserved(); else call SpiResource.request(); /* will continue in rxSpiReserved() */ return result; } void rxSpiReserved() { m_state = S_RX_PENDING; call CC2420Config.sync(); /* put any pending PIB changes into operation */ call TxControl.stop(); /* reset Tx logic for timestamping (SFD interrupt) */ call TxControl.start(); atomic { if (call TimeCalc.hasExpired(m_t0, m_dt)) signal ReliableWait.waitRxDone(); else call ReliableWait.waitRx(m_t0, m_dt); /* will signal waitRxDone() just in time */ } } async event void ReliableWait.waitRxDone() { error_t result; atomic { m_state = S_RECEIVING; result = call CC2420Power.rxOn(); } ASSERT(result == SUCCESS); call CC2420Tx.lockChipSpi(); call SpiResource.release(); signal RadioRx.enableRxDone(); } event message_t* CC2420Rx.received(message_t *frame) { if (m_state == S_RECEIVING) return signal RadioRx.received(frame); else return frame; } async command bool RadioRx.isReceiving() { return m_state == S_RECEIVING; } /* ----------------------- RadioTx ----------------------- */ async command error_t RadioTx.transmit( ieee154_txframe_t *frame, uint32_t t0, uint32_t dt ) { if( frame == NULL || frame->header == NULL || ((frame->payload == NULL) && (frame->payloadLen != 0)) || frame->metadata == NULL || (frame->headerLen + frame->payloadLen + 2) > IEEE154_aMaxPHYPacketSize ) return EINVAL; atomic { if( m_state != S_RADIO_OFF ) return FAIL; m_state = S_LOAD_TXFIFO_NO_CSMA; } m_txframe = frame; m_t0 = t0; m_dt = dt; loadTxFrame(frame); /* will continue in loadDoneRadioTx() */ return SUCCESS; } void loadDoneRadioTx() { /* frame was loaded into TXFIFO */ atomic { m_state = S_TX_PENDING; if (m_dt == 0) signal ReliableWait.waitTxDone(); else call ReliableWait.waitTx(m_t0, m_dt); /* will signal waitTxDone() just in time */ } } async event void ReliableWait.waitTxDone() { error_t result; ASSERT(m_state == S_TX_PENDING); atomic { m_state = S_TX_ACTIVE_NO_CSMA; result = call CC2420Tx.send(FALSE); /* transmit without CCA, this must succeed */ checkEnableRxForACK(); } ASSERT(result == SUCCESS); } inline void txDoneRadioTx(ieee154_txframe_t *frame, error_t result) { /* transmission completed */ signal RadioTx.transmitDone(frame, result); } /* ----------------------- UnslottedCsmaCa ----------------------- */ async command error_t UnslottedCsmaCa.transmit(ieee154_txframe_t *frame, ieee154_csma_t *csma) { if( frame == NULL || frame->header == NULL || ((frame->payload == NULL) && (frame->payloadLen != 0)) || frame->metadata == NULL || (frame->headerLen + frame->payloadLen + 2) > IEEE154_aMaxPHYPacketSize ) return EINVAL; atomic { if( m_state != S_RADIO_OFF ) return FAIL; m_state = S_LOAD_TXFIFO_UNSLOTTED; } m_txframe = frame; m_csma = csma; loadTxFrame(frame); /* will continue in nextIterationUnslottedCsma() */ return SUCCESS; } void nextIterationUnslottedCsma() { /* wait for a random time of [0,(2^BE) - 1] backoff slots */ uint16_t backoff = getRandomBackoff(m_csma->BE); m_state = S_TX_BACKOFF_UNSLOTTED; call ReliableWait.waitBackoff(backoff); /* will continue in waitBackoffDoneUnslottedCsma() */ } void waitBackoffDoneUnslottedCsma() { /* backoff finished, try to transmit now */ int8_t dummy; ieee154_txframe_t *frame = NULL; ieee154_csma_t *csma = NULL; atomic { /* The CC2420 needs to be in an Rx mode for STXONCCA strobe */ /* Note: the receive logic of the CC2420 driver is not yet */ /* started, i.e. we cannot (yet) receive any packets */ call CC2420Power.rxOn(); m_state = S_TX_ACTIVE_UNSLOTTED_CSMA; /* wait for CC2420 Rx to calibrate + CCA valid time */ while (call CC2420Power.rssi(&dummy) != SUCCESS) ; /* transmit with a single CCA done in hardware (STXONCCA strobe) */ if (call CC2420Tx.send(TRUE) == SUCCESS) { /* frame is being sent now, do we need Rx logic ready for an ACK? */ checkEnableRxForACK(); } else { /* channel is busy */ call CC2420Power.rfOff(); /* we might have accidentally caught something during CCA, flush it out */ call CC2420Power.flushRxFifo(); m_csma->NB += 1; if (m_csma->NB > m_csma->macMaxCsmaBackoffs) { /* CSMA-CA failure, we're done. The MAC may decide to retransmit. */ frame = m_txframe; csma = m_csma; /* continue below */ } else { /* Retry -> next iteration of the unslotted CSMA-CA */ m_csma->BE += 1; if (m_csma->BE > m_csma->macMaxBE) m_csma->BE = m_csma->macMaxBE; nextIterationUnslottedCsma(); } } } if (frame != NULL) { call CC2420Tx.unlockChipSpi(); call TxControl.stop(); call SpiResource.release(); m_state = S_RADIO_OFF; signal UnslottedCsmaCa.transmitDone(frame, csma, FALSE, FAIL); } } inline void txDoneUnslottedCsma(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result) { /* transmission completed */ signal UnslottedCsmaCa.transmitDone(frame, csma, ackPendingFlag, result); } /* ----------------------- SlottedCsmaCa ----------------------- */ /* The slotted CSMA-CA requires very exact timing, because transmissions * must start on 320 us backoff boundaries. Because it is accessed over SPI * the CC2420 is not good at meeting these timing requirements, so consider * the "SlottedCsmaCa"-code below as experimental. */ async command error_t SlottedCsmaCa.transmit(ieee154_txframe_t *frame, ieee154_csma_t *csma, uint32_t slot0Time, uint32_t dtMax, bool resume, uint16_t remainingBackoff) { if( frame == NULL || frame->header == NULL || ((frame->payload == NULL) && (frame->payloadLen != 0)) || frame->metadata == NULL || (frame->headerLen + frame->payloadLen + 2) > IEEE154_aMaxPHYPacketSize) return EINVAL; atomic { if( m_state != S_RADIO_OFF ) return FAIL; m_state = S_LOAD_TXFIFO_SLOTTED; } m_txframe = frame; m_csma = csma; m_t0 = slot0Time; m_dt = dtMax; m_resume = resume; m_remainingBackoff = remainingBackoff; loadTxFrame(frame); /* will continue in nextIterationSlottedCsma() */ return SUCCESS; } void nextIterationSlottedCsma() { uint32_t dtTxTarget; uint16_t backoff; ieee154_txframe_t *frame = NULL; ieee154_csma_t *csma = NULL; atomic { if (m_resume) { backoff = m_remainingBackoff; m_resume = FALSE; } else backoff = getRandomBackoff(m_csma->BE); dtTxTarget = call TimeCalc.timeElapsed(m_t0, call LocalTime.get()); dtTxTarget += backoff; if (dtTxTarget > m_dt) { /* frame doesn't fit into remaining CAP */ uint32_t overlap = dtTxTarget - m_dt; overlap = overlap + (IEEE154_aUnitBackoffPeriod - (overlap % IEEE154_aUnitBackoffPeriod)); backoff = overlap; frame = m_txframe; csma = m_csma; } else { /* backoff now */ m_state = S_TX_BACKOFF_SLOTTED; call ReliableWait.waitBackoff(backoff); /* will continue in waitBackoffDoneSlottedCsma() */ } } if (frame != NULL) { /* frame didn't fit in the remaining CAP */ call CC2420Tx.unlockChipSpi(); call TxControl.stop(); call SpiResource.release(); m_state = S_RADIO_OFF; signal SlottedCsmaCa.transmitDone(frame, csma, FALSE, backoff, ERETRY); } } void waitBackoffDoneSlottedCsma() { int8_t dummy; bool ccaFailure = FALSE; error_t result = FAIL; ieee154_txframe_t *frame = NULL; ieee154_csma_t *csma = NULL; atomic { /* The CC2420 needs to be in an Rx mode for STXONCCA strobe */ /* Note: the receive logic of the CC2420 driver is not yet */ /* started, i.e. we cannot (yet) receive any packets */ call CC2420Power.rxOn(); m_state = S_TX_ACTIVE_SLOTTED_CSMA; /* wait for CC2420 Rx to calibrate + CCA valid time */ while (call CC2420Power.rssi(&dummy) != SUCCESS) ; /* perform CCA on slot boundary (i.e. 8 symbols after backoff bounday); */ /* this platform-specific command is supposed to return just in time, so */ /* that the frame will be transmitted exactly on the next backoff boundary */ if (call ReliableWait.ccaOnBackoffBoundary(m_t0)) { /* first CCA succeeded */ if (call CC2420Tx.send(TRUE) == SUCCESS) { /* frame is being sent now, do we need Rx logic ready for an ACK? */ checkEnableRxForACK(); return; } else ccaFailure = TRUE; /* second CCA failed */ } else ccaFailure = TRUE; /* first CCA failed */ /* did not transmit the frame */ call CC2420Power.rfOff(); call CC2420Power.flushRxFifo(); /* we might have (accidentally) caught something */ m_state = S_LOAD_TXFIFO_SLOTTED; if (ccaFailure) { m_csma->NB += 1; if (m_csma->NB > m_csma->macMaxCsmaBackoffs) { /* CSMA-CA failure, we're done. The MAC may decide to retransmit. */ frame = m_txframe; csma = m_csma; result = FAIL; } else { /* next iteration of slotted CSMA-CA */ m_csma->BE += 1; if (m_csma->BE > m_csma->macMaxBE) m_csma->BE = m_csma->macMaxBE; nextIterationSlottedCsma(); } } else { /* frame didn't fit into remaining CAP, this can only happen */ /* if the runtime overhead was too high. this should actually not happen. */ /* (in principle the frame should have fitted, because we checked before) */ frame = m_txframe; csma = m_csma; result = ERETRY; } } if (frame != NULL) { call CC2420Tx.unlockChipSpi(); call TxControl.stop(); call SpiResource.release(); m_state = S_RADIO_OFF; signal SlottedCsmaCa.transmitDone(frame, csma, FALSE, 0, result); } } inline void txDoneSlottedCsmaCa(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, uint16_t remainingBackoff, error_t result) { /* transmission completed */ signal SlottedCsmaCa.transmitDone(frame, csma, ackPendingFlag, remainingBackoff, result); } /* ----------------------- Common Tx Operations ----------------------- */ void loadTxFrame(ieee154_txframe_t *frame) { if (call SpiResource.isOwner() || call SpiResource.immediateRequest() == SUCCESS) txSpiReserved(); else call SpiResource.request(); /* will continue in txSpiReserved() */ } void txSpiReserved() { error_t result; call CC2420Config.sync(); call TxControl.start(); result = call CC2420Tx.loadTXFIFO(m_txframe); ASSERT(result == SUCCESS); } async event void CC2420Tx.loadTXFIFODone(ieee154_txframe_t *data, error_t error) { atomic { switch (m_state) { case S_LOAD_TXFIFO_NO_CSMA: loadDoneRadioTx(); break; case S_LOAD_TXFIFO_UNSLOTTED: nextIterationUnslottedCsma(); break; case S_LOAD_TXFIFO_SLOTTED: nextIterationSlottedCsma(); break; default: ASSERT(0); break; } } } void checkEnableRxForACK() { /* A frame is currently being transmitted, check if we */ /* need the Rx logic ready for the ACK */ bool ackRequest = (m_txframe->header->mhr[MHR_INDEX_FC1] & FC1_ACK_REQUEST) ? TRUE : FALSE; error_t result = SUCCESS; if (ackRequest) { /* release SpiResource and start Rx logic, so the latter */ /* can take over after Tx is finished to receive the ACK */ call SpiResource.release(); result = call RxControl.start(); } ASSERT(result == SUCCESS); } async event void CC2420Tx.sendDone(ieee154_txframe_t *frame, bool ackPendingFlag, error_t result) { m_ackFramePending = ackPendingFlag; m_txResult = result; if (!call SpiResource.isOwner()) { /* this means an ACK was requested and during the transmission */ /* we released the Spi to allow the Rx part to take over */ ASSERT((frame->header->mhr[MHR_INDEX_FC1] & FC1_ACK_REQUEST)); result = call RxControl.stop(); ASSERT(result == SUCCESS); /* will continue in txDoneRxControlStopped() */ } else sendDoneSpiReserved(); } void txDoneRxControlStopped() { /* get the Spi to switch radio off */ if (call SpiResource.isOwner() || call SpiResource.immediateRequest() == SUCCESS) sendDoneSpiReserved(); else call SpiResource.request(); /* will continue in sendDoneSpiReserved() */ } void sendDoneSpiReserved() { /* transmission completed, we're owning the Spi, Rx logic is disabled */ m_state_t state = m_state; ieee154_txframe_t *frame = m_txframe; ieee154_csma_t *csma = m_csma; call CC2420Power.rfOff(); call CC2420Power.flushRxFifo(); call CC2420Tx.unlockChipSpi(); call TxControl.stop(); call SpiResource.release(); m_state = S_RADIO_OFF; if (state == S_TX_ACTIVE_NO_CSMA) txDoneRadioTx(frame, m_txResult); else if (state == S_TX_ACTIVE_UNSLOTTED_CSMA) txDoneUnslottedCsma(frame, csma, m_ackFramePending, m_txResult); else if (state == S_TX_ACTIVE_SLOTTED_CSMA) txDoneSlottedCsmaCa(frame, csma, m_ackFramePending, m_remainingBackoff, m_txResult); else ASSERT(0); } async event void CC2420Tx.transmissionStarted( ieee154_txframe_t *frame ) { uint8_t frameType = frame->header->mhr[0] & FC1_FRAMETYPE_MASK; uint8_t token = frame->headerLen; signal Timestamp.transmissionStarted(frameType, frame->handle, frame->payload, token); } async event void CC2420Tx.transmittedSFD( uint32_t time, ieee154_txframe_t *frame ) { uint8_t frameType = frame->header->mhr[0] & FC1_FRAMETYPE_MASK; uint8_t token = frame->headerLen; signal Timestamp.transmittedSFD( time, frameType, frame->handle, frame->payload, token ); } async command void Timestamp.modifyMACPayload( uint8_t token, uint8_t offset, uint8_t* buf, uint8_t len ) { if (m_state == S_TX_ACTIVE_NO_CSMA || m_state == S_TX_ACTIVE_SLOTTED_CSMA || m_state == S_LOAD_TXFIFO_UNSLOTTED ) call CC2420Tx.modify( offset+1+token, buf, len ); } async event void ReliableWait.waitBackoffDone() { switch (m_state) { case S_TX_BACKOFF_SLOTTED: waitBackoffDoneSlottedCsma(); break; case S_TX_BACKOFF_UNSLOTTED: waitBackoffDoneUnslottedCsma(); break; default: ASSERT(0); break; } } /* ----------------------- RxControl ----------------------- */ async event void RxControl.stopDone(error_t error) { post rxControlStopDoneTask(); } task void rxControlStopDoneTask() { switch (m_state) { case S_OFF_PENDING: offStopRxDone(); break; case S_TX_ACTIVE_NO_CSMA: /* fall through */ case S_TX_ACTIVE_UNSLOTTED_CSMA: /* fall through */ case S_TX_ACTIVE_SLOTTED_CSMA: txDoneRxControlStopped(); break; default: ASSERT(0); break; } } /* ----------------------- SPI Bus Arbitration ----------------------- */ event void SpiResource.granted() { switch (m_state) { case S_STARTING: startSpiReserved(); break; case S_ED: edReserved(); break; case S_RESERVE_RX_SPI: rxSpiReserved(); break; case S_LOAD_TXFIFO_NO_CSMA: /* fall through */ case S_LOAD_TXFIFO_UNSLOTTED: /* fall through */ case S_LOAD_TXFIFO_SLOTTED: txSpiReserved(); break; case S_TX_ACTIVE_NO_CSMA: /* fall through */ case S_TX_ACTIVE_UNSLOTTED_CSMA: /* fall through */ case S_TX_ACTIVE_SLOTTED_CSMA: sendDoneSpiReserved(); break; case S_STOPPING: stopSpiReserved(); break; case S_OFF_PENDING: offSpiReserved(); break; default: ASSERT(0); break; } } async command bool CCA.getNow() { return call CC2420Tx.cca(); } default event void SplitControl.startDone(error_t error) {} default event void SplitControl.stopDone(error_t error) {} default async event void UnslottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result) {} default async event void SlottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, uint16_t remainingBackoff, error_t result) {} default async event void Timestamp.transmissionStarted(uint8_t frameType, uint8_t msduHandle, uint8_t *msdu, uint8_t token) {} default async event void Timestamp.transmittedSFD(uint32_t time, uint8_t frameType, uint8_t msduHandle, uint8_t *msdu, uint8_t token) {} } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420TransmitP.nc000066400000000000000000000321271207233610700226650ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Jung Il Choi Initial SACK implementation * @author Jan Hauer * * IMPORTANT: this module does not use the SPI Resource interface, * instead the caller must take care of the resource arbitration * (i.e. the caller must own the resource before calling commands * like CC2420Tx.loadTXFIFO()) * Note: on TelosB there seems to be a problem if BackoffAlarm * is virtualized - i.e. BackoffAlarm should be a dedicated Alarm. * * @version $Revision: 1.4 $ $Date: 2009-03-04 18:31:11 $ */ #include "CC2420.h" #include "crc.h" #include "message.h" module CC2420TransmitP { provides interface Init; provides interface AsyncStdControl; provides interface CC2420Tx; uses interface Alarm as BackoffAlarm; uses interface GpioCapture as CaptureSFD; uses interface GeneralIO as CCA; uses interface GeneralIO as CSN; uses interface GeneralIO as SFD; uses interface GeneralIO as FIFO; uses interface GeneralIO as FIFOP; uses interface ChipSpiResource; uses interface CC2420Fifo as TXFIFO; uses interface CC2420Ram as TXFIFO_RAM; uses interface CC2420Register as TXCTRL; uses interface CC2420Strobe as SNOP; uses interface CC2420Strobe as STXON; uses interface CC2420Strobe as STXONCCA; uses interface CC2420Strobe as SFLUSHTX; uses interface CC2420Strobe as SRXON; uses interface CC2420Strobe as SRFOFF; uses interface CC2420Strobe as SFLUSHRX; uses interface CC2420Strobe as SACKPEND; uses interface CC2420Register as MDMCTRL1; uses interface CaptureTime; uses interface CC2420Receive; uses interface Leds; } implementation { typedef enum { S_STOPPED, S_STARTED, S_LOAD, S_READY_TX, S_SFD, S_EFD, S_ACK_WAIT, } cc2420_transmit_state_t; // This specifies how many symbols the stack should wait after a // TXACTIVE to receive an SFD interrupt before assuming something is // wrong and aborting the send. There seems to be a condition // on the micaZ where the SFD interrupt is never handled. enum { CC2420_ABORT_PERIOD = 320*3, }; norace ieee154_txframe_t *m_frame; cc2420_transmit_state_t m_state = S_STOPPED; bool m_receiving = FALSE; uint16_t m_prev_time; /** Byte reception/transmission indicator */ bool sfdHigh; /** Let the CC2420 driver keep a lock on the SPI while waiting for an ack */ norace bool abortSpiRelease; /***************** Prototypes ****************/ void signalDone( bool ackFramePending, error_t err ); /***************** Init Commands *****************/ command error_t Init.init() { call CCA.makeInput(); call CSN.makeOutput(); call SFD.makeInput(); return SUCCESS; } /***************** AsyncStdControl Commands ****************/ async command error_t AsyncStdControl.start() { atomic { if (m_state == S_STARTED) return EALREADY; call CaptureSFD.captureRisingEdge(); m_state = S_STARTED; m_receiving = FALSE; } return SUCCESS; } async command error_t AsyncStdControl.stop() { atomic { m_state = S_STOPPED; call BackoffAlarm.stop(); call CaptureSFD.disable(); call CSN.set(); } return SUCCESS; } /**************** Load/Send Commands ****************/ async command error_t CC2420Tx.loadTXFIFO(ieee154_txframe_t *data) { atomic { if ( m_state != S_STARTED ) return FAIL; m_state = S_LOAD; m_frame = data; m_frame->header->length = m_frame->headerLen + m_frame->payloadLen + 2; // 2 for CRC call CSN.set(); call CSN.clr(); call SFLUSHTX.strobe(); // flush out anything that was in TXFIFO call CSN.set(); call CSN.clr(); call TXFIFO.write( &(m_frame->header->length), 1 ); } return SUCCESS; } async event void TXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error) { atomic { call CSN.set(); if (tx_buf == &(m_frame->header->length)){ call CSN.clr(); call TXFIFO.write( m_frame->header->mhr, m_frame->headerLen ); return; } else if (tx_buf == m_frame->header->mhr) { call CSN.clr(); call TXFIFO.write( m_frame->payload, m_frame->payloadLen ); return; } } m_state = S_READY_TX; signal CC2420Tx.loadTXFIFODone(m_frame, error); } async command error_t CC2420Tx.send(bool cca) { cc2420_status_t status; bool congestion = TRUE; atomic { if (m_state != S_READY_TX) return EOFF; call CSN.set(); call CSN.clr(); // DEBUG //P2OUT |= 0x40; // P2.6 high status = cca ? call STXONCCA.strobe() : call STXON.strobe(); //status = call STXON.strobe(); //U0TXBUF = 0x04; // strobe STXON //while (!(IFG1 & URXIFG0)); //status = U0RXBUF; //call CSN.set(); if ( !( status & CC2420_STATUS_TX_ACTIVE ) ) { status = call SNOP.strobe(); if ( status & CC2420_STATUS_TX_ACTIVE ) { congestion = FALSE; } } call CSN.set(); // DEBUG: on telosb SFD is connected to Pin P4.1 //if (!congestion) {while (!(P4IN & 0x02)) ; P6OUT &= ~0x80;} if (congestion){ return FAIL; // channel busy } else { m_state = S_SFD; m_frame->metadata->timestamp = IEEE154_INVALID_TIMESTAMP; // pessimistic call BackoffAlarm.start(CC2420_ABORT_PERIOD); return SUCCESS; } } } /** * The CaptureSFD event is actually an interrupt from the capture pin * which is connected to timing circuitry and timer modules. This * type of interrupt allows us to see what time (being some relative value) * the event occurred, and lets us accurately timestamp our packets. This * allows higher levels in our system to synchronize with other nodes. * * Because the SFD events can occur so quickly, and the interrupts go * in both directions, we set up the interrupt but check the SFD pin to * determine if that interrupt condition has already been met - meaning, * we should fall through and continue executing code where that interrupt * would have picked up and executed had our microcontroller been fast enough. */ async event void CaptureSFD.captured( uint16_t time ) { uint32_t time32; uint8_t sfd_state = 0; atomic { time32 = call CaptureTime.getTimestamp(time); switch( m_state ) { case S_SFD: m_state = S_EFD; sfdHigh = TRUE; // in case we got stuck in the receive SFD interrupts, we can reset // the state here since we know that we are not receiving anymore m_receiving = FALSE; call CaptureSFD.captureFallingEdge(); m_frame->metadata->timestamp = time32; call BackoffAlarm.stop(); if ( call SFD.get() ) { break; } /** Fall Through because the next interrupt was already received */ case S_EFD: sfdHigh = FALSE; call CaptureSFD.captureRisingEdge(); signal CC2420Tx.transmissionStarted(m_frame); if ( (m_frame->header->mhr)[0] & ( 1 << IEEE154_FCF_ACK_REQ ) ) { // wait for the ACK m_state = S_ACK_WAIT; // we need to have *completely* received the ACK, 32+22 symbols // should theroretically be enough, but there can be delays in // servicing the FIFOP interrupt, so we use 150 symbols here call BackoffAlarm.start( 150 ); } else { signalDone(FALSE, SUCCESS); } if ( !call SFD.get() ) { break; } /** Fall Through because the next interrupt was already received */ default: /* this is the SFD for received messages */ if ( !m_receiving && sfdHigh == FALSE ) { sfdHigh = TRUE; call CaptureSFD.captureFallingEdge(); // safe the SFD pin status for later use sfd_state = call SFD.get(); call CC2420Receive.sfd(time32); m_receiving = TRUE; m_prev_time = time; if ( call SFD.get() ) { // wait for the next interrupt before moving on return; } } if ( sfdHigh == TRUE ) { sfdHigh = FALSE; call CaptureSFD.captureRisingEdge(); m_receiving = FALSE; /* if sfd_state is 1, then we fell through, but at the time of * saving the time stamp the SFD was still high. Thus, the timestamp * is valid. * if the sfd_state is 0, then either we fell through and SFD * was low while we safed the time stamp, or we didn't fall through. * There is some time needed by the automatic address recognition, * a value of 10 32khz ticks (20 symbols) has been proven a sufficient * threshold, so we use that (implies that ACKs cannot be timestamped). */ if ((sfd_state == 0) && call CaptureTime.getSFDUptime(m_prev_time, time) < 20) call CC2420Receive.sfd_dropped(); break; } } } } async command bool CC2420Tx.cca() { return call CCA.get(); } async command error_t CC2420Tx.modify( uint8_t offset, uint8_t* buf, uint8_t len ) { call CSN.set(); call CSN.clr(); call TXFIFO_RAM.write( offset, buf, len ); call CSN.set(); return SUCCESS; } async command void CC2420Tx.lockChipSpi() { abortSpiRelease = TRUE; } async command void CC2420Tx.unlockChipSpi() { abortSpiRelease = FALSE; } async event void ChipSpiResource.releasing() { if(abortSpiRelease) { call ChipSpiResource.abortRelease(); } } /***************** CC2420Receive Events ****************/ /** * If the packet we just received was an ack that we were expecting, * our send is complete. */ async event void CC2420Receive.receive( uint8_t type, message_t *ackFrame ){ atomic { if ( type == IEEE154_TYPE_ACK ) { if ( m_state == S_ACK_WAIT && m_frame->header->mhr[2] == ((ieee154_header_t*) ackFrame->header)->mhr[2] ) { // compare seqno call BackoffAlarm.stop(); signalDone(( ((ieee154_header_t*) ackFrame->header)->mhr[0] & 0x10) ? TRUE: FALSE, SUCCESS); } } } } async event void BackoffAlarm.fired() { atomic { switch( m_state ) { case S_SFD: case S_EFD: // fall through // We didn't receive an SFD interrupt within CC2420_ABORT_PERIOD // jiffies. Assume something is wrong. atomic { call CSN.set(); call CSN.clr(); call SFLUSHTX.strobe(); call CSN.set(); } signalDone( FALSE, ERETRY ); break; case S_ACK_WAIT: /* if (call FIFOP.get()) { */ /* // There's a packet in the Rx queue: it might be an ACK for our*/ /* // latest transmission, so we better wait a bit longer and let*/ /* // the Rx part of the driver get the packet first ...*/ /* call BackoffAlarm.start(100); */ /* return;*/ /* }*/ signalDone( FALSE, ENOACK ); break; default: break; } } } void signalDone( bool ackFramePending, error_t err ) { atomic m_state = S_STARTED; signal CC2420Tx.sendDone( m_frame, ackFramePending, err ); call ChipSpiResource.attemptRelease(); } async event void TXFIFO.readDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) { } } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CC2420Tx.nc000066400000000000000000000055661207233610700213460ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:12 $ * @author: Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" #include "TKN154_PHY.h" interface CC2420Tx { async command error_t loadTXFIFO(ieee154_txframe_t *data); async event void loadTXFIFODone(ieee154_txframe_t *data, error_t error ); async command error_t send(bool cca); async event void sendDone(ieee154_txframe_t *frame, bool ackPendingFlag, error_t error); async command bool cca(); async command void lockChipSpi(); async command void unlockChipSpi(); async event void transmissionStarted ( ieee154_txframe_t *data ); // timestamp denotes first bit of preamble (not SFD byte)! async event void transmittedSFD(uint32_t timestamp, ieee154_txframe_t *data); /** * Modify the contents of a packet. This command can only be used * when an SFD capture event for the sending packet is signalled. * * @param offset in the message to start modifying. * @param buf to data to write * @param len of bytes to write * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t modify( uint8_t offset, uint8_t* buf, uint8_t len ); } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/CaptureTime.nc000066400000000000000000000053761207233610700224560ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:00 $ * @author Jan Hauer * ======================================================================== */ interface CaptureTime { /** * Converts a platform-specific SFD capture time value (16-bit) into a IEEE * 802.15.4 timestamp. The timestamp is a 32-bit value that represents the * local time when the *first bit* (chip) of the corresponding frame was * transmitted / received (note that on the CC2420 the SFD capture happens * 5 byte (=10 symbols) after the transmission/reception of the first bit). * * @param time capture time * @return timestamp local time when the frame was transmitted/received **/ async command uint32_t getTimestamp(uint16_t SFDCaptureTime); /** * Returns the time interval that the SFD pin was high during a packet * transmission/reception. The time is expressed in 802.15.4 symbols. * * @param SFDCaptureTime capture time of rising SFD * @param EFDCaptureTime capture time of falling SFD */ async command uint16_t getSFDUptime(uint16_t SFDCaptureTime, uint16_t EFDCaptureTime); } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/ReliableWait.nc000066400000000000000000000042141207233610700225660ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:12 $ * @author Jan Hauer * ======================================================================== */ interface ReliableWait { async command void waitRx(uint32_t t0, uint32_t dt); async event void waitRxDone(); async command void waitTx(uint32_t t0, uint32_t dt); async event void waitTxDone(); async command void waitBackoff(uint32_t dt); async event void waitBackoffDone(); async command bool ccaOnBackoffBoundary(uint32_t slot0); } tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/TKN154_PHY.h000066400000000000000000000052061207233610700214610ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-09-08 09:04:42 $ * @author: Jan Hauer * ======================================================================== */ // PHY constants for the CC2420 #ifndef __TKN154_PHY_H #define __TKN154_PHY_H #include "TKN154_MAC.h" enum { IEEE154_SUPPORTED_CHANNELS = 0x07FFF800, IEEE154_SYMBOLS_PER_OCTET = 2, IEEE154_TXPOWER_TOLERANCE = 0x80, IEEE154_SHR_DURATION = (5 * IEEE154_SYMBOLS_PER_OCTET), IEEE154_MAX_FRAME_DURATION = (IEEE154_SHR_DURATION + ((IEEE154_aMaxPHYPacketSize + 1) * IEEE154_SYMBOLS_PER_OCTET)), IEEE154_PREAMBLE_LENGTH = (4*IEEE154_SYMBOLS_PER_OCTET), IEEE154_SYNC_SYMBOL_OFFSET = (1 * IEEE154_SYMBOLS_PER_OCTET), IEEE154_MIN_LIFS_PERIOD = 40, IEEE154_MIN_SIFS_PERIOD = 12, IEEE154_ACK_WAIT_DURATION = (20 + 12 + IEEE154_SHR_DURATION + 6 * IEEE154_SYMBOLS_PER_OCTET), IEEE154_TIMESTAMP_SUPPORTED = TRUE, }; #include "Timer62500hz.h" #define TSymbolIEEE802154 T62500hz #endif tinyos-2.1.2+dfsg/tos/chips/cc2420_tkn154/Timestamp.nc000066400000000000000000000110421207233610700221620ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ $Date: 2009-03-04 18:31:12 $ * @author Jan Hauer * ======================================================================== */ #include "IEEE802154.h" interface Timestamp { /** * The transmission of a packet has started (the PHY preamble is being * transmitted). * Within the event handler the modifyPayload()<\code> command can * be called to modify the contents of the frame's payload. * * @param frameType the type of frame (BEACON=0, DATA=1, ACK=2, COMMAND=3) * @param msduHandle for DATA frames the handle associated with the MSDU, * otherwise undefined * @param payload the MAC payload (e.g. in a DATA frame this is the msdu, * in a BEACON frame this is the first byte of the SFSpec) * @param token a token to be used as parameter for the * modifyPayload()<\code> command */ async event void transmissionStarted(uint8_t frameType, uint8_t msduHandle, uint8_t *payload, uint8_t token); /** * The Start-of-Frame Delimiter of an outgoing frame has been transmitted. * Within the event handler the modifyPayload()<\code> command may * be called to modify the contents of the frame's payload. * * @param time the time when the SFD was transmitted, expressed * in 15.4 symbols as determined by a call to a T62500hz * Alarm/Timer.getNow() * @param frameType the type of frame (BEACON=0, DATA=1, ACK=2, COMMAND=3) * @param msduHandle for DATA frames the handle associated with the MSDU, * otherwise undefined * @param payload the MAC payload (e.g. in a DATA frame this is the msdu, * in a BEACON frame this is the first byte of the SFSpec) * @param token a token to be used as parameter for the * modifyPayload()<\code> command */ async event void transmittedSFD(uint32_t time, uint8_t frameType, uint8_t msduHandle, uint8_t *payload, uint8_t token); /** * Modify (overwrite) the contents of the MAC payload. This command must only * be called in an transmittedSFD()<\code> eventhandler, which should * return fast. Note: the smaller the offset, the faster the * transmittedSFD()<\code> eventhandler must be finished (offset of * zero might not work), because you are modifying a packet, whose first * bytes have already been transmitted. * * @param token the token signalled by transmittedSFD()<\code> * @param offset the offset in the frame's payload to start modifying; * an offset of zero means the first byte of the MAC payload field * @param buf data to write * @param len number of bytes to write */ async command void modifyMACPayload(uint8_t token, uint8_t offset, uint8_t* buf, uint8_t len); } tinyos-2.1.2+dfsg/tos/chips/cc2420x/000077500000000000000000000000001207233610700167615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XActiveMessageC.nc000066400000000000000000000057461207233610700230100ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai, Miklos Maroti */ #include #ifdef IEEE154FRAMES_ENABLED #error "You cannot use CC2420XActiveMessageC with IEEE154FRAMES_ENABLED defined" #endif configuration CC2420XActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeStamp as PacketTimeStamp32khz; } uses { interface PacketTimeStamp as UnimplementedPacketTimeStamp32khz; } } implementation { components CC2420XRadioC as RadioC; SplitControl = RadioC; AMSend = RadioC; Receive = RadioC.Receive; Snoop = RadioC.Snoop; SendNotifier = RadioC; ReceiveDefault = RadioC.ReceiveDefault; SnoopDefault = RadioC.SnoopDefault; Packet = RadioC.PacketForActiveMessage; AMPacket = RadioC; PacketAcknowledgements = RadioC; LowPowerListening = RadioC; PacketLink = RadioC; RadioChannel = RadioC; PacketLinkQuality = RadioC.PacketLinkQuality; PacketTransmitPower = RadioC.PacketTransmitPower; PacketRSSI = RadioC.PacketRSSI; LinkPacketMetadata = RadioC; LocalTimeRadio = RadioC; PacketTimeStampMilli = RadioC; PacketTimeStampRadio = RadioC; PacketTimeStamp32khz = UnimplementedPacketTimeStamp32khz; } tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XDriverConfig.nc000066400000000000000000000040421207233610700225320ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai, Miklos Maroti */ interface CC2420XDriverConfig { /** * Returns the length of a dummy header to align the payload properly. */ async command uint8_t headerLength(message_t* msg); /** * Returns the maximum length of the PHY payload including the * length field but not counting the FCF field. */ async command uint8_t maxPayloadLength(); /** * Returns the length of a dummy metadata section to align the * metadata section properly. */ async command uint8_t metadataLength(message_t* msg); /** * Gets the number of bytes we should read before the RadioReceive.header * event is fired. If the length of the packet is less than this amount, * then that event is fired earlier. The header length must be at least one. */ async command uint8_t headerPreloadLength(); /** * Returns TRUE if before sending this message we should make sure that * the channel is clear via a very basic (and quick) RSSI check. */ async command bool requiresRssiCca(message_t* msg); } tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XDriverLayer.h000066400000000000000000000146021207233610700222330ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ #ifndef __CC2420XDRIVERLAYER_H__ #define __CC2420XDRIVERLAYER_H__ typedef nx_struct cc2420x_header_t { nxle_uint8_t length; } cc2420x_header_t; typedef struct cc2420x_metadata_t { uint8_t lqi; union { uint8_t power; uint8_t rssi; }; } cc2420x_metadata_t; enum cc2420X_timing_enums { CC2420X_SYMBOL_TIME = 16, // 16us IDLE_2_RX_ON_TIME = 12 * CC2420X_SYMBOL_TIME, PD_2_IDLE_TIME = 860, // .86ms STROBE_TO_TX_ON_TIME = 12 * CC2420X_SYMBOL_TIME, // TX SFD delay is computed as follows: // a.) STROBE_TO_TX_ON_TIME is required for preamble transmission to // start after TX strobe is issued // b.) the SFD byte is the 5th byte transmitted (10 symbol periods) // c.) there's approximately a 25us delay between the strobe and reading // the timer register TX_SFD_DELAY = STROBE_TO_TX_ON_TIME + 10 * CC2420X_SYMBOL_TIME - 25, // TX SFD is captured in hardware RX_SFD_DELAY = 0, }; enum cc2420X_reg_access_enums { CC2420X_CMD_REGISTER_MASK = 0x3f, CC2420X_CMD_REGISTER_READ = 0x40, CC2420X_CMD_REGISTER_WRITE = 0x00, CC2420X_CMD_TXRAM_WRITE = 0x80, }; typedef union cc2420X_status { uint16_t value; struct { unsigned reserved0:1; unsigned rssi_valid:1; unsigned lock:1; unsigned tx_active:1; unsigned enc_busy:1; unsigned tx_underflow:1; unsigned xosc16m_stable:1; unsigned reserved7:1; }; } cc2420X_status_t; typedef union cc2420X_iocfg0 { uint16_t value; struct { unsigned fifop_thr:7; unsigned cca_polarity:1; unsigned sfd_polarity:1; unsigned fifop_polarity:1; unsigned fifo_polarity:1; unsigned bcn_accept:1; unsigned reserved:4; // write as 0 } f; } cc2420X_iocfg0_t; // TODO: make sure that we avoid wasting RAM static const cc2420X_iocfg0_t cc2420X_iocfg0_default = {.f.fifop_thr = 64, .f.cca_polarity = 0, .f.sfd_polarity = 0, .f.fifop_polarity = 0, .f.fifo_polarity = 0, .f.bcn_accept = 0, .f.reserved = 0}; typedef union cc2420X_iocfg1 { uint16_t value; struct { unsigned ccamux:5; unsigned sfdmux:5; unsigned hssd_src:3; unsigned reserved:3; // write as 0 } f; } cc2420X_iocfg1_t; static const cc2420X_iocfg1_t cc2420X_iocfg1_default = {.value = 0}; typedef union cc2420X_fsctrl { uint16_t value; struct { unsigned freq:10; unsigned lock_status:1; unsigned lock_length:1; unsigned cal_running:1; unsigned cal_done:1; unsigned lock_thr:2; } f; } cc2420X_fsctrl_t; static const cc2420X_fsctrl_t cc2420X_fsctrl_default = {.f.lock_thr = 1, .f.freq = 357, .f.lock_status = 0, .f.lock_length = 0, .f.cal_running = 0, .f.cal_done = 0}; typedef union cc2420X_mdmctrl0 { uint16_t value; struct { unsigned preamble_length:4; unsigned autoack:1; unsigned autocrc:1; unsigned cca_mode:2; unsigned cca_hyst:3; unsigned adr_decode:1; unsigned pan_coordinator:1; unsigned reserved_frame_mode:1; unsigned reserved:2; } f; } cc2420X_mdmctrl0_t; static const cc2420X_mdmctrl0_t cc2420X_mdmctrl0_default = {.f.preamble_length = 2, .f.autocrc = 1, .f.cca_mode = 3, .f.cca_hyst = 2, .f.adr_decode = 1}; typedef union cc2420X_txctrl { uint16_t value; struct { unsigned pa_level:5; unsigned reserved:1; unsigned pa_current:3; unsigned txmix_current:2; unsigned txmix_caparray:2; unsigned tx_turnaround:1; unsigned txmixbuf_cur:2; } f; } cc2420X_txctrl_t; static const cc2420X_txctrl_t cc2420X_txctrl_default = {.f.pa_level = 31, .f.reserved = 1, .f.pa_current = 3, .f.tx_turnaround = 1, .f.txmixbuf_cur = 2}; #ifndef CC2420X_DEF_CHANNEL #define CC2420X_DEF_CHANNEL 11 #endif #ifndef CC2420X_DEF_RFPOWER #define CC2420X_DEF_RFPOWER 31 #endif enum { CC2420X_TX_PWR_MASK = 0x1f, CC2420X_CHANNEL_MASK = 0x1f, }; enum cc2420X_config_reg_enums { CC2420X_SNOP = 0x00, CC2420X_SXOSCON = 0x01, CC2420X_STXCAL = 0x02, CC2420X_SRXON = 0x03, CC2420X_STXON = 0x04, CC2420X_STXONCCA = 0x05, CC2420X_SRFOFF = 0x06, CC2420X_SXOSCOFF = 0x07, CC2420X_SFLUSHRX = 0x08, CC2420X_SFLUSHTX = 0x09, CC2420X_SACK = 0x0a, CC2420X_SACKPEND = 0x0b, CC2420X_SRXDEC = 0x0c, CC2420X_STXENC = 0x0d, CC2420X_SAES = 0x0e, CC2420X_MAIN = 0x10, CC2420X_MDMCTRL0 = 0x11, CC2420X_MDMCTRL1 = 0x12, CC2420X_RSSI = 0x13, CC2420X_SYNCWORD = 0x14, CC2420X_TXCTRL = 0x15, CC2420X_RXCTRL0 = 0x16, CC2420X_RXCTRL1 = 0x17, CC2420X_FSCTRL = 0x18, CC2420X_SECCTRL0 = 0x19, CC2420X_SECCTRL1 = 0x1a, CC2420X_BATTMON = 0x1b, CC2420X_IOCFG0 = 0x1c, CC2420X_IOCFG1 = 0x1d, CC2420X_MANFIDL = 0x1e, CC2420X_MANFIDH = 0x1f, CC2420X_FSMTC = 0x20, CC2420X_MANAND = 0x21, CC2420X_MANOR = 0x22, CC2420X_AGCCTRL = 0x23, CC2420X_AGCTST0 = 0x24, CC2420X_AGCTST1 = 0x25, CC2420X_AGCTST2 = 0x26, CC2420X_FSTST0 = 0x27, CC2420X_FSTST1 = 0x28, CC2420X_FSTST2 = 0x29, CC2420X_FSTST3 = 0x2a, CC2420X_RXBPFTST = 0x2b, CC2420X_FSMSTATE = 0x2c, CC2420X_ADCTST = 0x2d, CC2420X_DACTST = 0x2e, CC2420X_TOPTST = 0x2f, CC2420X_TXFIFO = 0x3e, CC2420X_RXFIFO = 0x3f, }; enum cc2420X_ram_addr_enums { CC2420X_RAM_TXFIFO = 0x000, CC2420X_RAM_TXFIFO_END = 0x7f, CC2420X_RAM_RXFIFO = 0x080, CC2420X_RAM_KEY0 = 0x100, CC2420X_RAM_RXNONCE = 0x110, CC2420X_RAM_SABUF = 0x120, CC2420X_RAM_KEY1 = 0x130, CC2420X_RAM_TXNONCE = 0x140, CC2420X_RAM_CBCSTATE = 0x150, CC2420X_RAM_IEEEADR = 0x160, CC2420X_RAM_PANID = 0x168, CC2420X_RAM_SHORTADR = 0x16a, }; #endif // __CC2420XDRIVERLAYER_H__ tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XDriverLayerC.nc000066400000000000000000000066001207233610700225060ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai, Miklos Maroti */ #include #include configuration CC2420XDriverLayerC { provides { interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface Alarm; } uses { interface CC2420XDriverConfig as Config; interface PacketTimeStamp; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface RadioAlarm; } } implementation { components CC2420XDriverLayerP as DriverLayerP, BusyWaitMicroC, TaskletC, MainC, HplCC2420XC as HplC; MainC.SoftwareInit -> DriverLayerP.SoftwareInit; MainC.SoftwareInit -> HplC.Init; RadioState = DriverLayerP; RadioSend = DriverLayerP; RadioReceive = DriverLayerP; RadioCCA = DriverLayerP; RadioPacket = DriverLayerP; LocalTimeRadio = HplC; Config = DriverLayerP; DriverLayerP.VREN -> HplC.VREN; DriverLayerP.CSN -> HplC.CSN; DriverLayerP.CCA -> HplC.CCA; DriverLayerP.RSTN -> HplC.RSTN; DriverLayerP.FIFO -> HplC.FIFO; DriverLayerP.FIFOP -> HplC.FIFOP; DriverLayerP.SFD -> HplC.SFD; PacketTransmitPower = DriverLayerP.PacketTransmitPower; TransmitPowerFlag = DriverLayerP.TransmitPowerFlag; PacketRSSI = DriverLayerP.PacketRSSI; RSSIFlag = DriverLayerP.RSSIFlag; PacketTimeSyncOffset = DriverLayerP.PacketTimeSyncOffset; TimeSyncFlag = DriverLayerP.TimeSyncFlag; PacketLinkQuality = DriverLayerP.PacketLinkQuality; PacketTimeStamp = DriverLayerP.PacketTimeStamp; LinkPacketMetadata = DriverLayerP; Alarm = HplC.Alarm; RadioAlarm = DriverLayerP.RadioAlarm; DriverLayerP.SpiResource -> HplC.SpiResource; DriverLayerP.FastSpiByte -> HplC; DriverLayerP.SfdCapture -> HplC; DriverLayerP.FifopInterrupt -> HplC; DriverLayerP.Tasklet -> TaskletC; DriverLayerP.BusyWait -> BusyWaitMicroC; DriverLayerP.LocalTime-> HplC.LocalTimeRadio; #ifdef RADIO_DEBUG components DiagMsgC; DriverLayerP.DiagMsg -> DiagMsgC; #endif components LedsC; DriverLayerP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XDriverLayerP.nc000066400000000000000000000760111207233610700225260ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ #include #include #include #include #include #define spi_atomic module CC2420XDriverLayerP { provides { interface Init as SoftwareInit @exactlyonce(); interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; } uses { interface Resource as SpiResource; interface BusyWait; interface LocalTime; interface CC2420XDriverConfig as Config; interface FastSpiByte; interface GeneralIO as CSN; interface GeneralIO as VREN; interface GeneralIO as CCA; interface GeneralIO as RSTN; interface GeneralIO as FIFO; interface GeneralIO as FIFOP; interface GeneralIO as SFD; interface GpioCapture as SfdCapture; interface GpioInterrupt as FifopInterrupt; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface PacketTimeStamp; interface Tasklet; interface RadioAlarm; #ifdef RADIO_DEBUG interface DiagMsg; #endif interface Leds; } } implementation { cc2420x_header_t* getHeader(message_t* msg) { return ((void*)msg) + call Config.headerLength(msg); } void* getPayload(message_t* msg) { return ((void*)msg); } cc2420x_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } /*----------------- STATE -----------------*/ enum { STATE_VR_ON = 0, STATE_PD = 1, STATE_PD_2_IDLE = 2, STATE_IDLE = 3, STATE_IDLE_2_RX_ON = 4, STATE_RX_ON = 5, STATE_BUSY_TX_2_RX_ON = 6, STATE_IDLE_2_TX_ON = 7, STATE_TX_ON = 8, STATE_RX_DOWNLOAD = 9, }; norace uint8_t state = STATE_VR_ON; enum { CMD_NONE = 0, // the state machine has stopped CMD_TURNOFF = 1, // goto SLEEP state CMD_STANDBY = 2, // goto TRX_OFF state CMD_TURNON = 3, // goto RX_ON state CMD_TRANSMIT = 4, // currently transmitting a message CMD_RECEIVE = 5, // currently receiving a message CMD_CCA = 6, // performing clear chanel assesment CMD_CHANNEL = 7, // changing the channel CMD_SIGNAL_DONE = 8, // signal the end of the state transition CMD_DOWNLOAD = 9, // download the received message }; tasklet_norace uint8_t cmd = CMD_NONE; norace bool radioIrq = 0; tasklet_norace uint8_t txPower; tasklet_norace uint8_t channel; tasklet_norace message_t* rxMsg; #ifdef RADIO_DEBUG_MESSAGES tasklet_norace message_t* txMsg; #endif message_t rxMsgBuffer; uint16_t capturedTime; // time when the last SFD interrupt has occured inline cc2420X_status_t getStatus(); /*----------------- ALARM -----------------*/ tasklet_async event void RadioAlarm.fired() { if( state == STATE_PD_2_IDLE ) { state = STATE_IDLE; if( cmd == CMD_STANDBY ) cmd = CMD_SIGNAL_DONE; } else if( state == STATE_IDLE_2_RX_ON ) { state = STATE_RX_ON; cmd = CMD_SIGNAL_DONE; // in receive mode, enable SFD capture call SfdCapture.captureRisingEdge(); } else RADIO_ASSERT(FALSE); // make sure the rest of the command processing is called call Tasklet.schedule(); } /*----------------- REGISTER -----------------*/ inline uint16_t readRegister(uint8_t reg) { uint16_t value = 0; RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & CC2420X_CMD_REGISTER_MASK) ); call CSN.set(); call CSN.clr(); call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_READ | reg); call FastSpiByte.splitReadWrite(0); value = ((uint16_t)call FastSpiByte.splitReadWrite(0) << 8); value += call FastSpiByte.splitRead(); call CSN.set(); return value; } inline cc2420X_status_t strobe(uint8_t reg) { cc2420X_status_t status; RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & CC2420X_CMD_REGISTER_MASK) ); call CSN.set(); call CSN.clr(); call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_WRITE | reg); status.value = call FastSpiByte.splitRead(); call CSN.set(); return status; } inline cc2420X_status_t getStatus() { return strobe(CC2420X_SNOP); } inline cc2420X_status_t writeRegister(uint8_t reg, uint16_t value) { cc2420X_status_t status; RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & CC2420X_CMD_REGISTER_MASK) ); call CSN.set(); call CSN.clr(); call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_WRITE | reg); call FastSpiByte.splitReadWrite(value >> 8); call FastSpiByte.splitReadWrite(value & 0xff); status.value = call FastSpiByte.splitRead(); call CSN.set(); return status; } inline cc2420X_status_t writeTxFifo(uint8_t* data, uint8_t length) { cc2420X_status_t status; uint8_t idx; RADIO_ASSERT( call SpiResource.isOwner() ); call CSN.set(); call CSN.clr(); call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_WRITE | CC2420X_TXFIFO); for(idx = 0; idxlength; // length | data[0] ... data[length-3] | automatically generated FCS header = call Config.headerPreloadLength(); if( header > length ) header = length; length -= header; // disable SFD interrupt call SfdCapture.disable(); // first upload the header to gain some time spi_atomic writeTxFifo(data, header); // there's a chance that there was a receive SFD interrupt in such a short time // we probably didn't cover all possibilities, but that's OK: downloadMessage() can // clean up the RXFIFO if necessary if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || radioIrq || call SFD.get() == 1 ) { // discard header we wrote to TXFIFO strobe(CC2420X_SFLUSHTX); // re-enable SFD interrupt call SfdCapture.captureRisingEdge(); // and bail out return EBUSY; } // there's _still_ a chance that there was a receive SFD interrupt in such a short // time , but that's OK: downloadMessage() can clean up the RXFIFO if necessary atomic { // zero out capturedTime // the SFD interrupt will set it again _while_ this function is running capturedTime = 0; // start transmission strobe(CC2420X_STXON); // get a timestamp right after strobe returns time = call RadioAlarm.getNow(); cmd = CMD_TRANSMIT; state = STATE_TX_ON; call SfdCapture.captureFallingEdge(); } timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; if( timesync == 0 ) { // no timesync: write the entire payload to the fifo if(length>0) spi_atomic writeTxFifo(data+header, length - 1); state = STATE_BUSY_TX_2_RX_ON; } else { // timesync required: write the payload before the timesync bytes to the fifo // TODO: we're assuming here that the timestamp is at the end of the message spi_atomic writeTxFifo(data+header, length - sizeof(timesync_relative) - 1); } // compute timesync sfdTime = time; // read both clocks // TODO: how can atomic be removed??? atomic { time = call RadioAlarm.getNow(); time32 = call LocalTime.get(); } // adjust time32 with the time elapsed since the SFD event time -= sfdTime; time32 -= time; // adjust for delay between the STXON strobe and the transmission of the SFD time32 += TX_SFD_DELAY; call PacketTimeStamp.set(msg, time32); if( timesync != 0 ) { // read and adjust the timestamp field timesync_relative = (*(timesync_absolute_t*)timesync) - time32; // write it to the fifo // TODO: we're assuming here that the timestamp is at the end of the message spi_atomic writeTxFifo((uint8_t*)(×ync_relative), sizeof(timesync_relative)); state = STATE_BUSY_TX_2_RX_ON; } #ifdef RADIO_DEBUG_MESSAGES txMsg = msg; if( call DiagMsg.record() ) { length = getHeader(msg)->length; call DiagMsg.chr('t'); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.uint32(call PacketTimeStamp.isValid(msg) ? call PacketTimeStamp.timestamp(msg) : 0); call DiagMsg.int8(length); call DiagMsg.hex8s(getPayload(msg), length); call DiagMsg.send(); } #endif return SUCCESS; } default tasklet_async event void RadioSend.sendDone(error_t error) { } default tasklet_async event void RadioSend.ready() { } /*----------------- CCA -----------------*/ tasklet_async command error_t RadioCCA.request() { if( cmd != CMD_NONE || state != STATE_RX_ON ) return EBUSY; if(call CCA.get()) { signal RadioCCA.done(SUCCESS); } else { signal RadioCCA.done(EBUSY); } return SUCCESS; } default tasklet_async event void RadioCCA.done(error_t error) { } /*----------------- RECEIVE -----------------*/ // recover from an error // rx fifo flush does not always work inline void recover() { cc2420X_status_t status; call SfdCapture.disable(); // reset the radio, initialize registers to default values resetRadio(); RADIO_ASSERT(state == STATE_PD); // start oscillator strobe(CC2420X_SXOSCON); // going idle in PD_2_IDLE_TIME state = STATE_PD_2_IDLE; call BusyWait.wait(PD_2_IDLE_TIME); // .86ms OSC startup time // get status status = getStatus(); RADIO_ASSERT(status.rssi_valid == 0); RADIO_ASSERT(status.lock == 0); RADIO_ASSERT(status.tx_active == 0); RADIO_ASSERT(status.enc_busy == 0); RADIO_ASSERT(status.tx_underflow == 0); RADIO_ASSERT(status.xosc16m_stable == 1); // we're idle now state = STATE_IDLE; // download current channel to the radio setChannel(); // start receiving strobe(CC2420X_SRXON); state = STATE_IDLE_2_RX_ON; call SfdCapture.captureRisingEdge(); // we will be able to receive packets in 12 symbol periods state = STATE_RX_ON; } inline void downloadMessage() { uint8_t length; uint16_t crc = 1; uint8_t* data; uint8_t rssi; uint8_t crc_ok_lqi; uint16_t sfdTime; state = STATE_RX_DOWNLOAD; atomic sfdTime = capturedTime; // data starts after the length field data = getPayload(rxMsg) + sizeof(cc2420x_header_t); // read the length byte spi_atomic readLengthFromRxFifo(&length); // check for too short lengths if (length == 0) { // stop reading RXFIFO call CSN.set(); RADIO_ASSERT( call FIFOP.get() == 0 ); RADIO_ASSERT( call FIFO.get() == 0 ); state = STATE_RX_ON; cmd = CMD_NONE; call SfdCapture.captureRisingEdge(); return; } if (length == 1) { // skip payload and rssi spi_atomic readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); RADIO_ASSERT( call FIFOP.get() == 0 ); RADIO_ASSERT( call FIFO.get() == 0 ); state = STATE_RX_ON; cmd = CMD_NONE; call SfdCapture.captureRisingEdge(); return; } if (length == 2) { // skip payload spi_atomic { readRssiFromRxFifo(&rssi); readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); } RADIO_ASSERT( call FIFOP.get() == 0 ); RADIO_ASSERT( call FIFO.get() == 0 ); state = STATE_RX_ON; cmd = CMD_NONE; call SfdCapture.captureRisingEdge(); return; } // check for too long lengths if( length > 127 ) { recover(); RADIO_ASSERT( call FIFOP.get() == 0 ); RADIO_ASSERT( call FIFO.get() == 0 ); state = STATE_RX_ON; cmd = CMD_NONE; call SfdCapture.captureRisingEdge(); return; } if( length > call RadioPacket.maxPayloadLength() + 2 ) { while( length-- > 2 ) { readPayloadFromRxFifo(data, 1); } spi_atomic { readRssiFromRxFifo(&rssi); readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); } RADIO_ASSERT( call FIFOP.get() == 0 ); state = STATE_RX_ON; cmd = CMD_NONE; call SfdCapture.captureRisingEdge(); return; } // if we're here, length must be correct RADIO_ASSERT(length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2); getHeader(rxMsg)->length = length; // we'll read the FCS/CRC separately length -= 2; spi_atomic { // download the whole payload readPayloadFromRxFifo(data, length ); // the last two bytes are not the fsc, but RSSI(8), CRC_ON(1)+LQI(7) readRssiFromRxFifo(&rssi); readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); } // there are still bytes in the fifo or if there's an overflow, recover // TODO: actually, we can signal that a message was received, without timestamp set if (call FIFOP.get() == 1 || call FIFO.get() == 1) { recover(); state = STATE_RX_ON; cmd = CMD_NONE; call SfdCapture.captureRisingEdge(); return; } state = STATE_RX_ON; cmd = CMD_NONE; // ready to receive new message: enable SFD interrupts call SfdCapture.captureRisingEdge(); if( signal RadioReceive.header(rxMsg) ) { // set RSSI, CRC and LQI only if we're accepting the message call PacketRSSI.set(rxMsg, rssi); call PacketLinkQuality.set(rxMsg, crc_ok_lqi & 0x7f); crc = (crc_ok_lqi > 0x7f) ? 0 : 1; } // signal only if it has passed the CRC check if( crc == 0 ) { uint32_t time32; uint16_t time; atomic { time = call RadioAlarm.getNow(); time32 = call LocalTime.get(); } time -= sfdTime; time32 -= time; call PacketTimeStamp.set(rxMsg, time32); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { call DiagMsg.str("r"); call DiagMsg.uint16(call RadioAlarm.getNow() - (uint16_t)call PacketTimeStamp.timestamp(rxMsg) ); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.uint16(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.int8(length); call DiagMsg.hex8s(getPayload(rxMsg), length); call DiagMsg.send(); } #endif rxMsg = signal RadioReceive.receive(rxMsg); } } /*----------------- IRQ -----------------*/ // RX SFD (rising edge), disabled for TX async event void SfdCapture.captured( uint16_t time ) { #ifdef RADIO_DEBUG_IRQ if( call DiagMsg.record() ) { call DiagMsg.str("SFD"); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.str("s="); call DiagMsg.uint8(state); if(call FIFO.get()) call DiagMsg.str("FIFO"); if(call FIFOP.get()) call DiagMsg.str("FIFOP"); if(call SFD.get()) call DiagMsg.str("SFD"); call DiagMsg.send(); } #endif RADIO_ASSERT( ! radioIrq ); RADIO_ASSERT(state == STATE_RX_ON || state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON); atomic capturedTime = time; radioIrq = TRUE; call SfdCapture.disable(); // do the rest of the processing call Tasklet.schedule(); } // FIFOP interrupt, last byte received async event void FifopInterrupt.fired() { // not used } inline void serviceRadio() { atomic if( isSpiAcquired() ) { radioIrq = FALSE; if( state == STATE_RX_ON && cmd == CMD_NONE ) { // it's an RX SFD cmd = CMD_DOWNLOAD; } else if( (state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON) && cmd == CMD_TRANSMIT) { cc2420X_status_t status; // it's a TX_END state = STATE_RX_ON; cmd = CMD_NONE; #if defined(RADIO_DEBUG_IRQ) && defined(RADIO_DEBUG_MESSAGES) if( call DiagMsg.record() ) { call DiagMsg.str("txdone"); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.uint16(capturedTime - (uint16_t)call PacketTimeStamp.timestamp(txMsg)); if(call FIFO.get()) call DiagMsg.str("FIFO"); if(call FIFOP.get()) call DiagMsg.str("FIFOP"); if(call SFD.get()) call DiagMsg.str("SFD"); call DiagMsg.send(); } #endif call SfdCapture.captureRisingEdge(); // get status status = getStatus(); if ( status.tx_underflow == 1) { // flush tx fifo strobe(CC2420X_SFLUSHTX); signal RadioSend.sendDone(FAIL); } else { signal RadioSend.sendDone(SUCCESS); } } else RADIO_ASSERT(FALSE); } } default tasklet_async event bool RadioReceive.header(message_t* msg) { return TRUE; } default tasklet_async event message_t* RadioReceive.receive(message_t* msg) { return msg; } /*----------------- TASKLET -----------------*/ task void releaseSpi() { call SpiResource.release(); } tasklet_async event void Tasklet.run() { #ifdef RADIO_DEBUG_TASKLET if( call DiagMsg.record() ) { call DiagMsg.str("tsk_str"); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.str("s="); call DiagMsg.uint8(state); call DiagMsg.str("c="); call DiagMsg.uint8(cmd); if(radioIrq) call DiagMsg.str("IRQ"); if(call FIFO.get()) call DiagMsg.str("FIFO"); if(call FIFOP.get()) call DiagMsg.str("FIFOP"); if(call SFD.get()) call DiagMsg.str("SFD"); call DiagMsg.send(); } #endif if( radioIrq ) serviceRadio(); if( cmd != CMD_NONE ) { if( cmd == CMD_DOWNLOAD && state == STATE_RX_ON) downloadMessage(); else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON ) changeState(); else if( cmd == CMD_CHANNEL ) changeChannel(); if( cmd == CMD_SIGNAL_DONE ) { cmd = CMD_NONE; signal RadioState.done(); } } if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq ) signal RadioSend.ready(); if( cmd == CMD_NONE ) post releaseSpi(); #ifdef RADIO_DEBUG_TASKLET if( call DiagMsg.record() ) { call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.str("tsk_end"); call DiagMsg.str("s="); call DiagMsg.uint8(state); call DiagMsg.str("c="); call DiagMsg.uint8(cmd); if(radioIrq) call DiagMsg.str("IRQ"); if(call FIFO.get()) call DiagMsg.str("FIFO"); if(call FIFOP.get()) call DiagMsg.str("FIFOP"); if(call SFD.get()) call DiagMsg.str("SFD"); call DiagMsg.send(); } #endif } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg) { return call Config.headerLength(msg) + sizeof(cc2420x_header_t); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return getHeader(msg)->length - 2; } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { RADIO_ASSERT( 1 <= length && length <= 125 ); RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); // we add the length of the CRC, which is automatically generated getHeader(msg)->length = length + 2; } async command uint8_t RadioPacket.maxPayloadLength() { RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(cc2420x_header_t) <= 125 ); return call Config.maxPayloadLength() - sizeof(cc2420x_header_t); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call Config.metadataLength(msg) + sizeof(cc2420x_metadata_t); } async command void RadioPacket.clear(message_t* msg) { // all flags are automatically cleared } /*----------------- PacketTransmitPower -----------------*/ async command bool PacketTransmitPower.isSet(message_t* msg) { return call TransmitPowerFlag.get(msg); } async command uint8_t PacketTransmitPower.get(message_t* msg) { return getMeta(msg)->power; } async command void PacketTransmitPower.clear(message_t* msg) { call TransmitPowerFlag.clear(msg); } async command void PacketTransmitPower.set(message_t* msg, uint8_t value) { call TransmitPowerFlag.set(msg); getMeta(msg)->power = value; } /*----------------- PacketRSSI -----------------*/ async command bool PacketRSSI.isSet(message_t* msg) { return call RSSIFlag.get(msg); } async command uint8_t PacketRSSI.get(message_t* msg) { return getMeta(msg)->rssi; } async command void PacketRSSI.clear(message_t* msg) { call RSSIFlag.clear(msg); } async command void PacketRSSI.set(message_t* msg, uint8_t value) { // just to be safe if the user fails to clear the packet call TransmitPowerFlag.clear(msg); call RSSIFlag.set(msg); getMeta(msg)->rssi = value; } /*----------------- PacketTimeSyncOffset -----------------*/ async command bool PacketTimeSyncOffset.isSet(message_t* msg) { return call TimeSyncFlag.get(msg); } async command uint8_t PacketTimeSyncOffset.get(message_t* msg) { return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t); } async command void PacketTimeSyncOffset.clear(message_t* msg) { call TimeSyncFlag.clear(msg); } async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value) { // we do not store the value, the time sync field is always the last 4 bytes RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value ); call TimeSyncFlag.set(msg); } /*----------------- PacketLinkQuality -----------------*/ async command bool PacketLinkQuality.isSet(message_t* msg) { return TRUE; } async command uint8_t PacketLinkQuality.get(message_t* msg) { return getMeta(msg)->lqi; } async command void PacketLinkQuality.clear(message_t* msg) { } async command void PacketLinkQuality.set(message_t* msg, uint8_t value) { getMeta(msg)->lqi = value; } /*----------------- LinkPacketMetadata -----------------*/ async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { return call PacketLinkQuality.get(msg) > 105; } } tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XRadio.h000066400000000000000000000041061207233610700210370ustar00rootroot00000000000000 /* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ #ifndef __CC2420XRADIO_H__ #define __CC2420XRADIO_H__ #include #include #include #include #include #include #include #include #include typedef nx_struct cc2420xpacket_header_t { cc2420x_header_t cc2420x; ieee154_simple_header_t ieee154; #ifndef TFRAMES_ENABLED network_header_t network; #endif #ifndef IEEE154FRAMES_ENABLED activemessage_header_t am; #endif } cc2420xpacket_header_t; typedef nx_struct cc2420xpacket_footer_t { // the time stamp is not recorded here, time stamped messaged cannot have max length } cc2420xpacket_footer_t; typedef struct cc2420xpacket_metadata_t { #ifdef LOW_POWER_LISTENING lpl_metadata_t lpl; #endif #ifdef PACKET_LINK link_metadata_t link; #endif timestamp_metadata_t timestamp; flags_metadata_t flags; cc2420x_metadata_t cc2420x; } cc2420xpacket_metadata_t; #endif//__CC2420XRADIO_H__ tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XRadioC.nc000066400000000000000000000222271207233610700213170ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai, Miklos Maroti */ #include configuration CC2420XRadioC { provides { interface SplitControl; #ifndef IEEE154FRAMES_ENABLED interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet as PacketForActiveMessage; #endif #ifndef TFRAMES_ENABLED interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier as Ieee154Notifier; interface Resource as SendResource[uint8_t clint]; interface Ieee154Packet; interface Packet as PacketForIeee154Message; #endif interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; #ifdef TRAFFIC_MONITOR interface TrafficMonitor; #endif interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { #define UQ_METADATA_FLAGS "UQ_CC2420X_METADATA_FLAGS" #define UQ_RADIO_ALARM "UQ_CC2420X_RADIO_ALARM" // -------- RadioP components CC2420XRadioP as RadioP; #ifdef RADIO_DEBUG components AssertC; #endif RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC; RadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; RadioP.PacketTimeStamp -> TimeStampingLayerC; RadioP.CC2420XPacket -> RadioDriverLayerC; // -------- RadioAlarm components new RadioAlarmC(); RadioAlarmC.Alarm -> RadioDriverLayerC; // -------- Active Message #ifndef IEEE154FRAMES_ENABLED components new ActiveMessageLayerC(); ActiveMessageLayerC.Config -> RadioP; ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC; ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive; ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket; AMSend = ActiveMessageLayerC; Receive = ActiveMessageLayerC.Receive; Snoop = ActiveMessageLayerC.Snoop; SendNotifier = ActiveMessageLayerC; AMPacket = ActiveMessageLayerC; PacketForActiveMessage = ActiveMessageLayerC; ReceiveDefault = ActiveMessageLayerC.ReceiveDefault; SnoopDefault = ActiveMessageLayerC.SnoopDefault; #endif // -------- Automatic RadioSend Resource #ifndef IEEE154FRAMES_ENABLED #ifndef TFRAMES_ENABLED components new AutoResourceAcquireLayerC(); AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)]; #else components new DummyLayerC() as AutoResourceAcquireLayerC; #endif AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend; #endif // -------- RadioSend Resource #ifndef TFRAMES_ENABLED components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC; SendResource = SendResourceC; // -------- Ieee154 Message components new Ieee154MessageLayerC(); Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC; Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send; Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive; Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet; Ieee154Send = Ieee154MessageLayerC; Ieee154Receive = Ieee154MessageLayerC; Ieee154Notifier = Ieee154MessageLayerC; Ieee154Packet = Ieee154PacketLayerC; PacketForIeee154Message = Ieee154MessageLayerC; #endif // -------- Tinyos Network components new TinyosNetworkLayerC(); TinyosNetworkLayerC.SubSend -> UniqueLayerC; TinyosNetworkLayerC.SubReceive -> PacketLinkLayerC; TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC; // -------- IEEE 802.15.4 Packet components new Ieee154PacketLayerC(); Ieee154PacketLayerC.SubPacket -> PacketLinkLayerC; // -------- UniqueLayer Send part (wired twice) components new UniqueLayerC(); UniqueLayerC.Config -> RadioP; UniqueLayerC.SubSend -> PacketLinkLayerC; // -------- Packet Link components new PacketLinkLayerC(); PacketLink = PacketLinkLayerC; PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC; PacketLinkLayerC -> LowPowerListeningLayerC.Send; PacketLinkLayerC -> LowPowerListeningLayerC.Receive; PacketLinkLayerC -> LowPowerListeningLayerC.RadioPacket; // -------- Low Power Listening #ifdef LOW_POWER_LISTENING #warning "*** USING LOW POWER LISTENING LAYER" components new LowPowerListeningLayerC(); LowPowerListeningLayerC.Config -> RadioP; LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC; #else components new LowPowerListeningDummyC() as LowPowerListeningLayerC; #endif LowPowerListeningLayerC.SubControl -> MessageBufferLayerC; LowPowerListeningLayerC.SubSend -> MessageBufferLayerC; LowPowerListeningLayerC.SubReceive -> MessageBufferLayerC; LowPowerListeningLayerC.SubPacket -> TimeStampingLayerC; SplitControl = LowPowerListeningLayerC; LowPowerListening = LowPowerListeningLayerC; // -------- MessageBuffer components new MessageBufferLayerC(); MessageBufferLayerC.RadioSend -> CollisionAvoidanceLayerC; MessageBufferLayerC.RadioReceive -> UniqueLayerC; MessageBufferLayerC.RadioState -> TrafficMonitorLayerC; RadioChannel = MessageBufferLayerC; // -------- UniqueLayer receive part (wired twice) UniqueLayerC.SubReceive -> CollisionAvoidanceLayerC; // -------- CollisionAvoidance #ifdef SLOTTED_MAC components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC; #else components new RandomCollisionLayerC() as CollisionAvoidanceLayerC; #endif CollisionAvoidanceLayerC.Config -> RadioP; CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC; CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC; CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; // -------- SoftwareAcknowledgement components new SoftwareAckLayerC(); SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; PacketAcknowledgements = SoftwareAckLayerC; SoftwareAckLayerC.Config -> RadioP; SoftwareAckLayerC.SubSend -> CsmaLayerC; SoftwareAckLayerC.SubReceive -> CsmaLayerC; // -------- Carrier Sense components new DummyLayerC() as CsmaLayerC; CsmaLayerC.Config -> RadioP; CsmaLayerC -> TrafficMonitorLayerC.RadioSend; CsmaLayerC -> TrafficMonitorLayerC.RadioReceive; CsmaLayerC -> RadioDriverLayerC.RadioCCA; // -------- TimeStamping components new TimeStampingLayerC(); TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC; TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC; PacketTimeStampRadio = TimeStampingLayerC; PacketTimeStampMilli = TimeStampingLayerC; TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; // -------- MetadataFlags components new MetadataFlagsLayerC(); MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC; // -------- Traffic Monitor #ifdef TRAFFIC_MONITOR components new TrafficMonitorLayerC(); TrafficMonitor = TrafficMonitorLayerC; #else components new DummyLayerC() as TrafficMonitorLayerC; #endif TrafficMonitorLayerC.Config -> RadioP; TrafficMonitorLayerC -> RadioDriverLayerC.RadioSend; TrafficMonitorLayerC -> RadioDriverLayerC.RadioReceive; TrafficMonitorLayerC -> RadioDriverLayerC.RadioState; // -------- Driver components CC2420XDriverLayerC as RadioDriverLayerC; RadioDriverLayerC.Config -> RadioP; RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC; PacketTransmitPower = RadioDriverLayerC.PacketTransmitPower; PacketLinkQuality = RadioDriverLayerC.PacketLinkQuality; PacketRSSI = RadioDriverLayerC.PacketRSSI; LinkPacketMetadata = RadioDriverLayerC; LocalTimeRadio = RadioDriverLayerC; RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; } tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XRadioP.nc000066400000000000000000000212421207233610700213300ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Miklos Maroti, Janos Sallai */ #include #include #include module CC2420XRadioP { provides { interface CC2420XDriverConfig; interface SoftwareAckConfig; interface UniqueConfig; interface CsmaConfig; interface TrafficMonitorConfig; interface RandomCollisionConfig; interface SlottedCollisionConfig; interface ActiveMessageConfig; interface DummyConfig; #ifdef LOW_POWER_LISTENING interface LowPowerListeningConfig; #endif } uses { interface Ieee154PacketLayer; interface RadioAlarm; interface RadioPacket as CC2420XPacket; interface PacketTimeStamp; } } implementation { /*----------------- CC2420XDriverConfig -----------------*/ async command uint8_t CC2420XDriverConfig.headerLength(message_t* msg) { return offsetof(message_t, data) - sizeof(cc2420xpacket_header_t); } async command uint8_t CC2420XDriverConfig.maxPayloadLength() { return sizeof(cc2420xpacket_header_t) + TOSH_DATA_LENGTH; } async command uint8_t CC2420XDriverConfig.metadataLength(message_t* msg) { return 0; } async command uint8_t CC2420XDriverConfig.headerPreloadLength() { // we need the fcf, dsn, destpan and dest return 7; } async command bool CC2420XDriverConfig.requiresRssiCca(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- SoftwareAckConfig -----------------*/ async command bool SoftwareAckConfig.requiresAckWait(message_t* msg) { return call Ieee154PacketLayer.requiresAckWait(msg); } async command bool SoftwareAckConfig.isAckPacket(message_t* msg) { return call Ieee154PacketLayer.isAckFrame(msg); } async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack) { return call Ieee154PacketLayer.verifyAckReply(data, ack); } async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack) { call Ieee154PacketLayer.setAckRequired(msg, ack); } async command bool SoftwareAckConfig.requiresAckReply(message_t* msg) { return call Ieee154PacketLayer.requiresAckReply(msg); } async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack) { call Ieee154PacketLayer.createAckReply(data, ack); } #ifndef SOFTWAREACK_TIMEOUT #define SOFTWAREACK_TIMEOUT 1000 #endif async command uint16_t SoftwareAckConfig.getAckTimeout() { return (uint16_t)(SOFTWAREACK_TIMEOUT * RADIO_ALARM_MICROSEC); } tasklet_async command void SoftwareAckConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- UniqueConfig -----------------*/ async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg) { return call Ieee154PacketLayer.getDSN(msg); } async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn) { call Ieee154PacketLayer.setDSN(msg, dsn); } async command am_addr_t UniqueConfig.getSender(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } tasklet_async command void UniqueConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- ActiveMessageConfig -----------------*/ command am_addr_t ActiveMessageConfig.destination(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg); } command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setDestAddr(msg, addr); } command am_addr_t ActiveMessageConfig.source(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setSrcAddr(msg, addr); } command am_group_t ActiveMessageConfig.group(message_t* msg) { return call Ieee154PacketLayer.getDestPan(msg); } command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp) { call Ieee154PacketLayer.setDestPan(msg, grp); } command error_t ActiveMessageConfig.checkFrame(message_t* msg) { if( ! call Ieee154PacketLayer.isDataFrame(msg) ) call Ieee154PacketLayer.createDataFrame(msg); return SUCCESS; } /*----------------- CsmaConfig -----------------*/ async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- TrafficMonitorConfig -----------------*/ async command uint16_t TrafficMonitorConfig.getBytes(message_t* msg) { // pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes) return call CC2420XPacket.payloadLength(msg) + 6; } /*----------------- RandomCollisionConfig -----------------*/ /* * We try to use the same values as in CC2420 * * CC2420_MIN_BACKOFF = 10 jiffies = 320 microsec * CC2420_BACKOFF_PERIOD = 10 jiffies * initial backoff = 0x1F * CC2420_BACKOFF_PERIOD = 310 jiffies = 9920 microsec * congestion backoff = 0x7 * CC2420_BACKOFF_PERIOD = 70 jiffies = 2240 microsec */ #ifndef LOW_POWER_LISTENING async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(320 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(9920 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(2240 * RADIO_ALARM_MICROSEC); } #endif async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg) { uint16_t time; // TODO: maybe we should use the embedded timestamp of the message time = call RadioAlarm.getNow(); // estimated response time (download the message, etc) is 5-8 bytes if( call Ieee154PacketLayer.requiresAckReply(msg) ) time += (uint16_t)(32 * (-5 + 16 + 11 + 5) * RADIO_ALARM_MICROSEC); else time += (uint16_t)(32 * (-5 + 5) * RADIO_ALARM_MICROSEC); return time; } tasklet_async event void RadioAlarm.fired() { } /*----------------- SlottedCollisionConfig -----------------*/ async command uint16_t SlottedCollisionConfig.getInitialDelay() { return 300; } async command uint8_t SlottedCollisionConfig.getScheduleExponent() { return 1 + RADIO_ALARM_MILLI_EXP; } async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg) { // TODO: check if the timestamp is correct return call PacketTimeStamp.timestamp(msg); } async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg) { // the preamble (4 bytes), SFD (1 byte), plus two extra for safety return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC); } async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg) { return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC); } /*----------------- Dummy -----------------*/ async command void DummyConfig.nothing() { } /*----------------- LowPowerListening -----------------*/ #ifdef LOW_POWER_LISTENING command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR; } command bool LowPowerListeningConfig.ackRequested(message_t* msg) { return call Ieee154PacketLayer.getAckRequired(msg); } command uint16_t LowPowerListeningConfig.getListenLength() { return 5; } async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(320 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(1600 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(3200 * RADIO_ALARM_MICROSEC); } #endif } tinyos-2.1.2+dfsg/tos/chips/cc2420x/CC2420XTimeSyncMessageC.nc000066400000000000000000000054641207233610700233250ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Miklos Maroti, Janos Sallai */ #include configuration CC2420XTimeSyncMessageC { provides { interface SplitControl; interface Receive[uint8_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketTimeStamp as PacketTimeStampRadio; interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components CC2420XActiveMessageC as ActiveMessageC, new TimeSyncMessageLayerC(); SplitControl = ActiveMessageC; AMPacket = TimeSyncMessageLayerC; Receive = TimeSyncMessageLayerC.Receive; Snoop = TimeSyncMessageLayerC.Snoop; Packet = TimeSyncMessageLayerC; PacketAcknowledgements = ActiveMessageC; LowPowerListening = ActiveMessageC; PacketTimeStampRadio = ActiveMessageC.PacketTimeStampRadio; TimeSyncAMSendRadio = TimeSyncMessageLayerC; TimeSyncPacketRadio = TimeSyncMessageLayerC; PacketTimeStampMilli = ActiveMessageC.PacketTimeStampMilli; TimeSyncAMSendMilli = TimeSyncMessageLayerC; TimeSyncPacketMilli = TimeSyncMessageLayerC; TimeSyncMessageLayerC.PacketTimeStampRadio -> ActiveMessageC.PacketTimeStampRadio; TimeSyncMessageLayerC.PacketTimeStampMilli -> ActiveMessageC.PacketTimeStampMilli; components CC2420XDriverLayerC as DriverLayerC; TimeSyncMessageLayerC.LocalTimeRadio -> DriverLayerC; TimeSyncMessageLayerC.PacketTimeSyncOffset -> DriverLayerC.PacketTimeSyncOffset; } tinyos-2.1.2+dfsg/tos/chips/cc2420x/README.txt000066400000000000000000000005701207233610700204610ustar00rootroot00000000000000CC2420X is an alternative radio stack for the TI CC2420 radio, using the rfxlink library (lib/rfxlink). The stack is IEEE802.15.4 compliant. It does not support hardware acknowledgements or security. All the rfxlink features are supported. See lib/rfxlink/README.txt for details. To use this stack, simply wire against CC2420XActiveMessageC instead of ActiveMessageC. tinyos-2.1.2+dfsg/tos/chips/cc2520/000077500000000000000000000000001207233610700165725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520ActiveMessageC.nc000066400000000000000000000061071207233610700224620ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Author: Janos Sallai, Miklos Maroti * Author: Thomas Schmid (adapted to CC2520) */ #include #ifdef IEEE154FRAMES_ENABLED #error "You cannot use ActiveMessageC with IEEE154FRAMES_ENABLED defined" #endif configuration CC2520ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components CC2520RadioC as RadioC; SplitControl = RadioC; AMSend = RadioC; Receive = RadioC.Receive; Snoop = RadioC.Snoop; SendNotifier = RadioC; Packet = RadioC.PacketForActiveMessage; AMPacket = RadioC; PacketAcknowledgements = RadioC; LowPowerListening = RadioC; PacketLink = RadioC; RadioChannel = RadioC; PacketLinkQuality = RadioC.PacketLinkQuality; PacketTransmitPower = RadioC.PacketTransmitPower; PacketRSSI = RadioC.PacketRSSI; LocalTimeRadio = RadioC; PacketTimeStampMilli = RadioC; PacketTimeStampRadio = RadioC; } tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520DriverConfig.nc000066400000000000000000000051461207233610700222220ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Author: Miklos Maroti * Author: Thomas Schmid (port to CC2520) */ interface CC2520DriverConfig { /** * Returns the length of a dummy header to align the payload properly. */ async command uint8_t headerLength(message_t* msg); /** * Returns the maximum length of the PHY payload including the * length field but not counting the FCF field. */ async command uint8_t maxPayloadLength(); /** * Returns the length of a dummy metadata section to align the * metadata section properly. */ async command uint8_t metadataLength(message_t* msg); /** * Gets the number of bytes we should read before the RadioReceive.header * event is fired. If the length of the packet is less than this amount, * then that event is fired earlier. The header length must be at least one. */ async command uint8_t headerPreloadLength(); /** * Returns TRUE if before sending this message we should make sure that * the channel is clear via a very basic (and quick) RSSI check. */ async command bool requiresRssiCca(message_t* msg); } tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520DriverLayer.h000066400000000000000000000303751207233610700217220ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ #ifndef __CC2520XDRIVERLAYER_H__ #define __CC2520XDRIVERLAYER_H__ typedef nx_struct cc2520_header_t { nxle_uint8_t length; } cc2520_header_t; typedef struct cc2520_metadata_t { uint8_t lqi; union { uint8_t power; uint8_t ack; uint8_t rssi; }; } cc2520_metadata_t; enum cc2520_reg_access_enums { CC2520_FREG_MASK = 0x3F, // highest address in FREG CC2520_SREG_MASK = 0x7F, // highest address in SREG CC2520_CMD_TXRAM_WRITE = 0x80, // FIXME: not sure... might need to change }; typedef union cc2520_status { uint16_t value; struct { unsigned rx_active :1; unsigned tx_active :1; unsigned dpu_l_active :1; unsigned dpu_h_active :1; unsigned exception_b :1; unsigned exception_a :1; unsigned rssi_valid :1; unsigned xosc_stable :1; }; } cc2520_status_t; typedef union cc2520_frmctrl0 { uint8_t value; struct { unsigned tx_mode : 2; unsigned rx_mode : 2; unsigned energy_scan : 1; unsigned autoack : 1; unsigned autocrc : 1; unsigned append_data_mode : 1; } f; } cc2520_frmctrl0_t; static cc2520_frmctrl0_t cc2520_frmctrl0_default = {.f.autocrc = 1}; typedef union cc2520_txpower { uint8_t value; struct { unsigned pa_power: 8; } f; } cc2520_txpower_t; // Set 0dBm output power static cc2520_txpower_t cc2520_txpower_default = { .f.pa_power = 0x32 }; typedef union cc2520_ccactrl0 { uint8_t value; struct { unsigned cca_thr: 8; } f; } cc2520_ccactrl0_t; // Raises CCA threshold from -108dBm to -8 - 76 = -84dBm //static cc2520_ccactrl0_t cc2520_ccactrl0_default = { .f.cca_thr = 0xF8 }; // FIXME: This might be a problem in the EK devkit. But the threshold has to // be really high! // Raises CCA threshold from -108dBm to 10 - 76dBm static cc2520_ccactrl0_t cc2520_ccactrl0_default = { .f.cca_thr = 0x1A }; typedef union cc2520_mdmctrl0 { uint8_t value; struct { unsigned tx_filter : 1; unsigned preamble_length : 4; unsigned demod_avg_mode : 1; unsigned dem_num_zeros : 2; } f; } cc2520_mdmctrl0_t; // Makes sync word detection less likely by requiring two zero symbols before // the sync word static cc2520_mdmctrl0_t cc2520_mdmctrl0_default = {.f.tx_filter = 1, .f.preamble_length = 2, .f.demod_avg_mode = 0, .f.dem_num_zeros = 2}; typedef union cc2520_mdmctrl1 { uint8_t value; struct { unsigned corr_thr : 5; unsigned corr_thr_sfd : 1; unsigned reserved0 : 2; } f; } cc2520_mdmctrl1_t; // Only one SFD symbol must be above threshold, and raise correlation // threshold static cc2520_mdmctrl1_t cc2520_mdmctrl1_default = {.f.corr_thr = 0x14, .f.corr_thr_sfd = 0}; typedef union cc2520_freqctrl { uint8_t value; struct { unsigned freq : 7; unsigned reserved0 : 1; } f; } cc2520_freqctrl_t; static cc2520_freqctrl_t cc2520_freqctrl_default = {.f.freq = 0x0B }; typedef union cc2520_fifopctrl { uint8_t value; struct { unsigned fifop_thr : 7; unsigned reserved0 : 1; } f; } cc2520_fifopctrl_t; typedef union cc2520_frmfilt0 { uint8_t value; struct { unsigned frame_filter_en : 1; unsigned pan_coordinator : 1; unsigned max_frame_version : 2; unsigned fcf_reserved_mask : 3; unsigned reserved : 1; } f; } cc2520_frmfilt0_t; static cc2520_frmfilt0_t cc2520_frmfilt0_default = {.f.max_frame_version = 2, .f.frame_filter_en = 1}; typedef union cc2520_frmfilt1 { uint8_t value; struct { unsigned reserved0 : 1; unsigned modify_ft_filter : 2; unsigned accept_ft_0_beacon : 1; unsigned accept_ft_1_data : 1; unsigned accept_ft_2_ack : 1; unsigned accept_ft_3_mac_cmd : 1; unsigned accept_ft_4to7_reserved : 1; } f; } cc2520_frmfilt1_t; static cc2520_frmfilt1_t cc2520_frmfilt1_default = {.f.accept_ft_0_beacon = 1, .f.accept_ft_1_data = 1, .f.accept_ft_2_ack = 1, .f.accept_ft_3_mac_cmd = 1}; typedef union cc2520_srcmatch { uint8_t value; struct { unsigned src_match_en : 1; unsigned autopend : 1; unsigned pend_datareq_only : 1; unsigned reserved : 5; } f; } cc2520_srcmatch_t; static cc2520_srcmatch_t cc2520_srcmatch_default = {.f.src_match_en = 1, .f.autopend = 1, .f.pend_datareq_only = 1}; typedef union cc2520_rxctrl { uint8_t value; } cc2520_rxctrl_t; static cc2520_rxctrl_t cc2520_rxctrl_default = {.value = 0x3F}; typedef union cc2520_fsctrl { uint8_t value; } cc2520_fsctrl_t; static cc2520_fsctrl_t cc2520_fsctrl_default = {.value = 0x5A}; typedef union cc2520_fscal1 { uint8_t value; } cc2520_fscal1_t; static cc2520_fscal1_t cc2520_fscal1_default = {.value = 0x2B}; typedef union cc2520_agcctrl1 { uint8_t value; } cc2520_agcctrl1_t; static cc2520_agcctrl1_t cc2520_agcctrl1_default = {.value = 0x11}; typedef union cc2520_adctest0 { uint8_t value; } cc2520_adctest0_t; static cc2520_adctest0_t cc2520_adctest0_default = {.value = 0x10}; typedef union cc2520_adctest1 { uint8_t value; } cc2520_adctest1_t; static cc2520_adctest1_t cc2520_adctest1_default = {.value = 0x0E}; typedef union cc2520_adctest2 { uint8_t value; } cc2520_adctest2_t; static cc2520_adctest2_t cc2520_adctest2_default = {.value = 0x03}; #ifndef CC2520_DEF_CHANNEL #define CC2520_DEF_CHANNEL 25 #endif #ifndef CC2520_DEF_RFPOWER #define CC2520_DEF_RFPOWER 0x32 // 0 dBm #endif enum { CC2520_TX_PWR_MASK = 0xFF, CC2520_TX_PWR_0 = 0x03, // -18 dBm CC2520_TX_PWR_1 = 0x2C, // -7 dBm CC2520_TX_PWR_2 = 0x88, // -4 dBm CC2520_TX_PWR_3 = 0x81, // -2 dBm CC2520_TX_PWR_4 = 0x32, // 0 dBm CC2520_TX_PWR_5 = 0x13, // 1 dBm CC2520_TX_PWR_6 = 0xAB, // 2 dBm CC2520_TX_PWR_7 = 0xF2, // 3 dBm CC2520_TX_PWR_8 = 0xF7, // 5 dBm CC2520_CHANNEL_MASK = 0x1F, }; enum cc2520_register_enums { // FREG Registers CC2520_FRMFILT0 = 0x00, CC2520_FRMFILT1 = 0x01, CC2520_SRCMATCH = 0x02, CC2520_SRCSHORTEN0 = 0x04, CC2520_SRCSHORTEN1 = 0x05, CC2520_SRCSHORTEN2 = 0x06, CC2520_SRCEXTEN0 = 0x08, CC2520_SRCEXTEN1 = 0x09, CC2520_SRCEXTEN2 = 0x0A, CC2520_FRMCTRL0 = 0x0C, CC2520_FRMCTRL1 = 0x0D, CC2520_RXENABLE0 = 0x0E, CC2520_RXENABLE1 = 0x0F, CC2520_EXCFLAG0 = 0x10, CC2520_EXCFLAG1 = 0x11, CC2520_EXCFLAG2 = 0x12, CC2520_EXCMASKA0 = 0x14, CC2520_EXCMASKA1 = 0x15, CC2520_EXCMASKA2 = 0x16, CC2520_EXCMASKB0 = 0x18, CC2520_EXCMASKB1 = 0x19, CC2520_EXCMASKB2 = 0x1A, CC2520_EXCBINDX0 = 0x1C, CC2520_EXCBINDX1 = 0x1D, CC2520_EXCBINDY0 = 0x1E, CC2520_EXCBINDY1 = 0x1F, CC2520_GPIOCTRL0 = 0x20, CC2520_GPIOCTRL1 = 0x21, CC2520_GPIOCTRL2 = 0x22, CC2520_GPIOCTRL3 = 0x23, CC2520_GPIOCTRL4 = 0x24, CC2520_GPIOCTRL5 = 0x25, CC2520_GPIOPOLARITY = 0x26, CC2520_GPIOCTRL = 0x28, CC2520_DPUCON = 0x2A, CC2520_DPUSTAT = 0x2C, CC2520_FREQCTRL = 0x2E, CC2520_FREQTUNE = 0x2F, CC2520_TXPOWER = 0x30, CC2520_TXCTRL = 0x31, CC2520_FSMSTAT0 = 0x32, CC2520_FSMSTAT1 = 0x33, CC2520_FIFOPCTRL = 0x34, CC2520_FSMCTRL = 0x35, CC2520_CCACTRL0 = 0x36, CC2520_CCACTRL1 = 0x37, CC2520_RSSI = 0x38, CC2520_RSSISTAT = 0x39, CC2520_RXFIRST = 0x3C, CC2520_RXFIFOCNT = 0x3E, CC2520_TXFIFOCNT = 0x3F, // SREG registers CC2520_CHIPID = 0x40, CC2520_VERSION = 0x42, CC2520_EXTCLOCK = 0x44, CC2520_MDMCTRL0 = 0x46, CC2520_MDMCTRL1 = 0x47, CC2520_FREQEST = 0x48, CC2520_RXCTRL = 0x4A, CC2520_FSCTRL = 0x4C, CC2520_FSCAL0 = 0x4E, CC2520_FSCAL1 = 0x4F, CC2520_FSCAL2 = 0x50, CC2520_FSCAL3 = 0x51, CC2520_AGCCTRL0 = 0x52, CC2520_AGCCTRL1 = 0x53, CC2520_AGCCTRL2 = 0x54, CC2520_AGCCTRL3 = 0x55, CC2520_ADCTEST0 = 0x56, CC2520_ADCTEST1 = 0x57, CC2520_ADCTEST2 = 0x58, CC2520_MDMTEST0 = 0x5A, CC2520_MDMTEST1 = 0x5B, CC2520_DACTEST0 = 0x5C, CC2520_DACTEST1 = 0x5D, CC2520_ATEST = 0x5E, CC2520_DACTEST2 = 0x5F, CC2520_PTEST0 = 0x60, CC2520_PTEST1 = 0x61, CC2520_RESERVED = 0x62, CC2520_DPUBIST = 0x7A, CC2520_ACTBIST = 0x7C, CC2520_RAMBIST = 0x7E, }; enum cc2520_spi_command_enums { CC2520_CMD_SNOP = 0x00, // CC2520_CMD_IBUFLD = 0x02, // CC2520_CMD_SIBUFEX = 0x03, // CC2520_CMD_SSAMPLECCA = 0x04, // CC2520_CMD_SRES = 0x0f, // CC2520_CMD_MEMORY_MASK = 0x0f, // CC2520_CMD_MEMORY_READ = 0x10, // MEMRD CC2520_CMD_MEMORY_WRITE = 0x20, // MEMWR CC2520_CMD_RXBUF = 0x30, // CC2520_CMD_RXBUFCP = 0x38, // CC2520_CMD_RXBUFMOV = 0x32, // CC2520_CMD_TXBUF = 0x3A, // CC2520_CMD_TXBUFCP = 0x3E, // CC2520_CMD_RANDOM = 0x3C, // CC2520_CMD_SXOSCON = 0x40, // CC2520_CMD_STXCAL = 0x41, // CC2520_CMD_SRXON = 0x42, // CC2520_CMD_STXON = 0x43, // CC2520_CMD_STXONCCA = 0x44, // CC2520_CMD_SRFOFF = 0x45, // CC2520_CMD_SXOSCOFF = 0x46, // CC2520_CMD_SFLUSHRX = 0x47, // CC2520_CMD_SFLUSHTX = 0x48, // CC2520_CMD_SACK = 0x49, // CC2520_CMD_SACKPEND = 0x4A, // CC2520_CMD_SNACK = 0x4B, // CC2520_CMD_SRXMASKBITSET = 0x4C, // CC2520_CMD_SRXMASKBITCLR = 0x4D, // CC2520_CMD_RXMASKAND = 0x4E, // CC2520_CMD_RXMASKOR = 0x4F, // CC2520_CMD_MEMCP = 0x50, // CC2520_CMD_MEMCPR = 0x52, // CC2520_CMD_MEMXCP = 0x54, // CC2520_CMD_MEMXWR = 0x56, // CC2520_CMD_BCLR = 0x58, // CC2520_CMD_BSET = 0x59, // CC2520_CMD_CTR_UCTR = 0x60, // CC2520_CMD_CBCMAC = 0x64, // CC2520_CMD_UCBCMAC = 0x66, // CC2520_CMD_CCM = 0x68, // CC2520_CMD_UCCM = 0x6A, // CC2520_CMD_ECB = 0x70, // CC2520_CMD_ECBO = 0x72, // CC2520_CMD_ECBX = 0x74, // CC2520_CMD_INC = 0x78, // CC2520_CMD_ABORT = 0x7F, // CC2520_CMD_REGISTER_READ = 0x80, // CC2520_CMD_REGISTER_WRITE = 0xC0, // }; #endif // __CC2520XDRIVERLAYER_H__ tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520DriverLayerC.nc000066400000000000000000000107351207233610700221740ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Janos Sallai, Miklos Maroti * Author: Thomas Schmid (adapted to CC2520) */ #include #include configuration CC2520DriverLayerC { provides { interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; //interface PacketField as AckReceived; interface LocalTime as LocalTimeRadio; interface Alarm; interface PacketAcknowledgements; } uses { interface CC2520DriverConfig as Config; interface PacketTimeStamp; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface PacketFlag as AckReceivedFlag; interface RadioAlarm; } } implementation { components CC2520DriverLayerP as DriverLayerP, BusyWaitMicroC, TaskletC, MainC, HplCC2520C as HplC; MainC.SoftwareInit -> DriverLayerP.SoftwareInit; RadioState = DriverLayerP; RadioSend = DriverLayerP; RadioReceive = DriverLayerP; RadioCCA = DriverLayerP; RadioPacket = DriverLayerP; PacketAcknowledgements = DriverLayerP; LocalTimeRadio = HplC; Config = DriverLayerP; DriverLayerP.VREN -> HplC.VREN; DriverLayerP.CSN -> HplC.CSN; DriverLayerP.CCA -> HplC.CCA; DriverLayerP.RSTN -> HplC.RSTN; DriverLayerP.FIFO -> HplC.FIFO; DriverLayerP.FIFOP -> HplC.FIFOP; DriverLayerP.SFD -> HplC.SFD; PacketTransmitPower = DriverLayerP.PacketTransmitPower; DriverLayerP.TransmitPowerFlag = TransmitPowerFlag; PacketRSSI = DriverLayerP.PacketRSSI; DriverLayerP.RSSIFlag = RSSIFlag; PacketTimeSyncOffset = DriverLayerP.PacketTimeSyncOffset; DriverLayerP.TimeSyncFlag = TimeSyncFlag; /* AckReceived = DriverLayerP.AckReceived; components new CC2520MetadataFlagC() as AckFlagC; DriverLayerP.AckFlag -> AckFlagC; */ AckReceivedFlag = DriverLayerP.AckReceivedFlag; PacketLinkQuality = DriverLayerP.PacketLinkQuality; PacketTimeStamp = DriverLayerP.PacketTimeStamp; RadioAlarm = DriverLayerP.RadioAlarm; Alarm = HplC.Alarm; DriverLayerP.SpiResource -> HplC.SpiResource; DriverLayerP.SpiByte -> HplC; DriverLayerP.SfdCapture -> HplC; DriverLayerP.FifopInterrupt -> HplC.FifopInterrupt; DriverLayerP.FifoInterrupt -> HplC.FifoInterrupt; DriverLayerP.Tasklet -> TaskletC; DriverLayerP.BusyWait -> BusyWaitMicroC; DriverLayerP.LocalTime-> HplC.LocalTimeRadio; #ifdef RADIO_DEBUG_MESSAGES components DiagMsgC; DriverLayerP.DiagMsg -> DiagMsgC; #endif components LedsC, NoLedsC; DriverLayerP.Leds -> NoLedsC; #ifdef RADIO_LCD_DEBUG components LcdC; DriverLayerP.Draw -> LcdC; #endif components CC2520SecurityP; DriverLayerP.CC2520Security -> CC2520SecurityP; } tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520DriverLayerP.nc000066400000000000000000001460231207233610700222110ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Author: Janos Sallai, Miklos Maroti * Author: Thomas Schmid (port to CC2520) * Author: JeongGil Ko (CC2520 modifications and security support) */ #include #include #include #include #include module CC2520DriverLayerP { provides{ interface Init as SoftwareInit @exactlyonce(); interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; //interface PacketField as AckReceived; interface PacketAcknowledgements; } uses{ interface BusyWait; interface LocalTime; interface CC2520DriverConfig as Config; interface Resource as SpiResource; interface SpiByte; interface SpiPacket; interface GeneralIO as CSN; interface GeneralIO as VREN; interface GeneralIO as CCA; interface GeneralIO as RSTN; interface GeneralIO as FIFO; interface GeneralIO as FIFOP; interface GeneralIO as SFD; interface GpioCapture as SfdCapture; interface GpioInterrupt as FifopInterrupt; interface GpioInterrupt as FifoInterrupt; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface PacketFlag as AckReceivedFlag; interface PacketTimeStamp; interface Tasklet; interface RadioAlarm; #ifdef RADIO_DEBUG_MESSAGES interface DiagMsg; #endif interface Leds; interface Draw; interface CC2520Security; } } implementation{ #define HI_UINT16(val) (((val) >> 8) & 0xFF) #define LO_UINT16(val) ((val) & 0xFF) #define ADDR_DATA 0x200 #define ADDR_NONCE 0x320 #define ADDR_KEY 0x340 #define HIGH_PRIORITY 1 #define LOW_PRIORITY 0 #define NONCE_FLAG_BYTE 0x09 inline void serviceRadio(); inline void downloadMessage(); uint8_t pKey[]= { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; uint8_t decNonce[]= { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, }; uint8_t encNonce[]= { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, }; cc2520_header_t* getHeader(message_t* msg) { return ((void*)msg) + call Config.headerLength(msg); } /* * Return a pointer to the data portion of the message. */ void* getPayload(message_t* msg){ return ((void*)msg) + call RadioPacket.headerLength(msg); } cc2520_metadata_t* getMeta(message_t* msg){ return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } /*----------------- STATE -----------------*/ enum{ STATE_VR_ON = 0, STATE_PD = 1, STATE_PD_2_IDLE = 2, STATE_IDLE = 3, STATE_IDLE_2_RX_ON = 4, STATE_RX_ON = 5, STATE_BUSY_TX_2_RX_ON = 6, STATE_IDLE_2_TX_ON = 7, STATE_TX_ON = 8, STATE_RX_DOWNLOAD = 9, }; tasklet_norace uint8_t state = STATE_VR_ON; enum{ CMD_NONE = 0, // the state machine has stopped CMD_TURNOFF = 1, // goto SLEEP state CMD_STANDBY = 2, // goto TRX_OFF state CMD_TURNON = 3, // goto RX_ON state CMD_TRANSMIT = 4, // currently transmitting a message CMD_RECEIVE = 5, // currently receiving a message CMD_CCA = 6, // performing clear chanel assesment CMD_CHANNEL = 7, // changing the channel CMD_SIGNAL_DONE = 8, // signal the end of the state transition CMD_DOWNLOAD = 9, // download the received message }; tasklet_norace uint8_t cmd = CMD_NONE; norace bool radioIrq = 0; tasklet_norace uint8_t txPower; tasklet_norace uint8_t channel; tasklet_norace message_t* rxMsg; //#ifdef RADIO_DEBUG_MESSAGES tasklet_norace message_t* txMsg; //#endif message_t rxMsgBuffer; uint32_t capturedTime; // the current time when the last interrupt has occured tasklet_norace uint8_t rssiClear; tasklet_norace uint8_t rssiBusy; norace bool first_packet = TRUE; norace bool sending = FALSE; norace bool receiving = FALSE; norace bool security_processing = FALSE; // used to continue tx after sfd norace uint8_t* txData; norace uint8_t header; norace uint8_t prevdata9, prevdata10; norace uint8_t secMode; norace uint8_t txLength; norace ieee154_simple_header_t* txIeee154header; enum{ // FIXME: need to check these for CC2520 TX_SFD_DELAY = (uint16_t)(0 * RADIO_ALARM_MICROSEC), RX_SFD_DELAY = (uint16_t)(7 * RADIO_ALARM_MICROSEC/2), }; inline cc2520_status_t getStatus(); //inline void sendDoneSignal(error_t error, bool ack); tasklet_async event void RadioAlarm.fired(){ if( state == STATE_PD_2_IDLE ) { state = STATE_IDLE; if( cmd == CMD_STANDBY ) cmd = CMD_SIGNAL_DONE; } else if( state == STATE_IDLE_2_RX_ON ) { state = STATE_RX_ON; // in receive mode, enable SFD capture //call SfdCapture.captureRisingEdge(); //JK cmd = CMD_SIGNAL_DONE; }else{ RADIO_ASSERT(FALSE); } // make sure the rest of the command processing is called call Tasklet.schedule(); } /*----------------- REGISTER -----------------*/ inline cc2520_status_t writeRegister(uint8_t reg, uint8_t value){ cc2520_status_t status; uint8_t v; RADIO_ASSERT( call SpiResource.isOwner() ); call CSN.set(); call CSN.clr(); if( reg <= CC2520_FREG_MASK){ // we can use 1 byte less to write this register using the // register write command RADIO_ASSERT( reg == (reg & CC2520_FREG_MASK) ); status.value = call SpiByte.write(CC2520_CMD_REGISTER_WRITE | reg); } else{ // we have to use the memory write command as the register is in // SREG RADIO_ASSERT( reg == (reg & CC2520_SREG_MASK) ); // the register has to be below the 0x100 memory address. Thus, we // don't have to add anything to the MEMORY_WRITE command. status.value = call SpiByte.write(CC2520_CMD_MEMORY_WRITE); status.value = call SpiByte.write(reg); } // v is the value previously in the register v = call SpiByte.write(value); call CSN.set(); return status; } /* New function by JK -- identical to MEMWR function */ /* This function is to write data to memory spaces above 0x200 */ inline cc2520_status_t writeMemory(uint16_t mem_addr, uint8_t* value, uint8_t count){ cc2520_status_t status; uint8_t v, i; if(mem_addr < 0x200){ mem_addr = 0x200; } RADIO_ASSERT( call SpiResource.isOwner() ); call CSN.set(); call CSN.clr(); status.value = call SpiByte.write(CC2520_CMD_MEMORY_WRITE | HI_UINT16(mem_addr)); status.value = call SpiByte.write(LO_UINT16(mem_addr)); for(i=0;ilength; secMode = call CC2520Security.getSecurityMode(); txIeee154header = (ieee154_simple_header_t*)txData; if(secMode > 0 && (txIeee154header->fcf & (IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE))){ // Note that the payload starts at txData[9] when 16 bit addressing is used frameCounter = call CC2520Security.getFrameCounter(); frameCounter = 0; memcpy(&encNonce[3], &frameCounter, 4); writeMemory(ADDR_DATA, &txData[11], 2); //JK: Set security related parameters writeMemory(ADDR_KEY, call CC2520Security.getKey(), 16); writeMemory(ADDR_NONCE, encNonce, 16); MEMCP(HIGH_PRIORITY, 16, ADDR_KEY, ADDR_KEY); MEMCP(HIGH_PRIORITY, 16, ADDR_NONCE, ADDR_NONCE); //JK: Send ENC command while(security_processing){} security_processing = TRUE; if(secMode == CTR_MODE){ micLength = 0; CTR(HIGH_PRIORITY, ADDR_KEY/16, txLength - 11 - 2, ADDR_NONCE/16, ADDR_DATA, 0); //11 for txData and 2 for fcs }else if(secMode == CBC_MAC_4){ micLength = 4; CBCMAC(HIGH_PRIORITY, ADDR_KEY/16, txLength - 11 - 2, ADDR_DATA, 0, 1); }else if(secMode == CBC_MAC_8){ micLength = 8; CBCMAC(HIGH_PRIORITY, ADDR_KEY/16, txLength - 11 - 2, ADDR_DATA, 0, 2); }else if(secMode == CBC_MAC_16){ micLength = 16; CBCMAC(HIGH_PRIORITY, ADDR_KEY/16, txLength - 11 - 2, ADDR_DATA, 0, 3); }else if(secMode == CCM_4){ micLength = 4; CCM(HIGH_PRIORITY, ADDR_KEY/16, txLength - 11 - 2, ADDR_NONCE/16, ADDR_DATA, 0, txLength - 11 - 2, 1); }else if(secMode == CCM_8){ micLength = 8; CCM(HIGH_PRIORITY, ADDR_KEY/16, txLength - 11 - 2, ADDR_NONCE/16, ADDR_DATA, 0, txLength - 11 - 2, 2); }else if(secMode == CCM_16){ micLength = 16; CCM(HIGH_PRIORITY, ADDR_KEY/16, txLength - 11 - 2, ADDR_NONCE/16, ADDR_DATA, 0, txLength - 11 - 2, 3); } status = getStatus(); while(status.dpu_h_active) status = getStatus(); readMemory(ADDR_DATA, &txData[11+sizeof(security_header_t)], 2 + micLength); security_processing = FALSE; txData[9+sizeof(security_header_t)] = txData[9]; txData[10+sizeof(security_header_t)] = txData[10]; prevdata9 = txData[9]; prevdata10 = txData[10]; secHdr = (security_header_t*)&txData[9]; // beginning of txData section secHdr->secLevel = secMode; secHdr->keyMode = 1; // Fixed to 1 for now secHdr->reserved = 0; secHdr->frameCounter = frameCounter; secHdr->keyID[0] = 1; // Always first position for now due to fixed keyMode txIeee154header->fcf |= 1 << IEEE154_FCF_SECURITY_ENABLED; txLength += (sizeof(security_header_t) + micLength); } // txLength | txData[0] ... txData[txLength-3] | automatically generated FCS atomic writeTxFifo(&txLength, 1); // FCS is automatically generated txLength -= 2; // preload fcf, dsn, destpan, and dest header = call Config.headerPreloadLength(); if( header > txLength ) header = txLength; txLength -= header; // first upload the header to gain some time atomic writeTxFifo(txData, header); atomic { //call SfdCapture.captureRisingEdge(); strobe(CC2520_CMD_STXON); state = STATE_TX_ON; //*((volatile uint32_t * )0x40010054) |= (1 << 16); call SfdCapture.captureRisingEdge(); } //#ifdef RADIO_DEBUG_MESSAGES txMsg = msg; //#endif // wait for SFD rising edge. return SUCCESS; } inline void continueTx() { void* timesync; uint32_t time32; cc2520_status_t status; /***************************************** * FIXME: We have to check for underrun here! *****************************************/ // prepare for end of TX on falling SFD timesync = call PacketTimeSyncOffset.isSet(txMsg) ? ((void*)txMsg) + call PacketTimeSyncOffset.get(txMsg) : 0; time32 = capturedTime; if( timesync != 0 ) *(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32; // write the rest of the payload to the fifo atomic writeTxFifo(txData+header, txLength); call SfdCapture.captureFallingEdge(); if(secMode > 0){ txData[9] = prevdata9; txData[10] = prevdata10; } // get status status = getStatus(); RADIO_ASSERT ( status.tx_active == 1); // FIXME: have to check for underflow exception! //RADIO_ASSERT ( status.tx_underflow == 0); RADIO_ASSERT ( status.xosc_stable == 1); if( timesync != 0 ) *(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32; call PacketTimeStamp.set(txMsg, time32); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ){ uint16_t t = call RadioAlarm.getNow(); txLength = getHeader(txMsg)->length; call DiagMsg.chr('t'); call DiagMsg.uint16(time32); call DiagMsg.uint16(t); call DiagMsg.uint16(t-time32); call DiagMsg.uint32(call PacketTimeStamp.isValid(txMsg) ? call PacketTimeStamp.timestamp(txMsg) : 0); call DiagMsg.int8(txLength); call DiagMsg.hex8s(getPayload(txMsg), txLength - 2); if(txLength - 2 > 15) { call DiagMsg.hex8s(&(((uint8_t *)getPayload(txMsg))[15]), txLength - 2 - 15); } if(txIeee154header->fcf & (1 << IEEE154_FCF_ACK_REQ)){ call DiagMsg.str("w/ ack"); } call DiagMsg.send(); } #endif // wait for SFD falling edge state = STATE_BUSY_TX_2_RX_ON; cmd = CMD_TRANSMIT; //call SpiResource.release(); atomic sending = TRUE; } default tasklet_async event void RadioSend.sendDone(error_t error) { } default tasklet_async event void RadioSend.ready() { } /*----------------- CCA -----------------*/ tasklet_async command error_t RadioCCA.request(){ if( cmd != CMD_NONE || state != STATE_RX_ON ) return EBUSY; if(call CCA.get()) { signal RadioCCA.done(SUCCESS); } else { signal RadioCCA.done(EBUSY); } return SUCCESS; } default tasklet_async event void RadioCCA.done(error_t error) { } /*----------------- RECEIVE -----------------*/ // recover from an error // rx fifo flush does not always work inline void recover() { cc2520_status_t status; // reset the radio, initialize registers to default values RADIO_ASSERT(0); resetRadio(); //call SfdCapture.disable(); RADIO_ASSERT(state == STATE_PD); // start oscillator strobe(CC2520_CMD_SXOSCON); // going idle in PD_2_IDLE_TIME state = STATE_PD_2_IDLE; call BusyWait.wait(PD_2_IDLE_TIME); // .86ms OSC startup time // get status status = getStatus(); RADIO_ASSERT ( status.rssi_valid == 0); //RADIO_ASSERT ( status.lock == 0); RADIO_ASSERT ( status.tx_active == 0); //RADIO_ASSERT ( status.enc_busy == 0); //RADIO_ASSERT ( status.tx_underflow == 0); RADIO_ASSERT ( status.xosc_stable == 1); // we're idle now state = STATE_IDLE; // download current channel to the radio setChannel(); // start receiving strobe(CC2520_CMD_SRXON); state = STATE_IDLE_2_RX_ON; //call SfdCapture.captureRisingEdge(); // JK // we will be able to receive packets in 12 symbol periods state = STATE_RX_ON; } inline void recover_err() { cc2520_status_t status; // reset the radio, initialize registers to default values RADIO_ASSERT(0); resetRadio(); // start oscillator strobe(CC2520_CMD_SXOSCON); // going idle in PD_2_IDLE_TIME state = STATE_PD_2_IDLE; //call BusyWait.wait(PD_2_IDLE_TIME); // .86ms OSC startup time // get status status = getStatus(); RADIO_ASSERT ( status.rssi_valid == 0); //RADIO_ASSERT ( status.lock == 0); RADIO_ASSERT ( status.tx_active == 0); //RADIO_ASSERT ( status.enc_busy == 0); //RADIO_ASSERT ( status.tx_underflow == 0); RADIO_ASSERT ( status.xosc_stable == 1); // we're idle now state = STATE_IDLE; // download current channel to the radio setChannel(); // start receiving strobe(CC2520_CMD_SRXON); state = STATE_IDLE_2_RX_ON; //call SfdCapture.captureRisingEdge(); // JK // we will be able to receive packets in 12 symbol periods state = STATE_RX_ON; } inline void endRx(){ receiving = FALSE; } inline void downloadMessage(){ // receiving message to buffer! uint8_t length, micLength; uint16_t crc = 1; uint8_t* data; uint8_t rssi; uint8_t crc_ok_lqi; uint32_t sfdTime, decLimit; cc2520_status_t status; security_header_t* secHdr; ieee154_simple_header_t* ieee154header; //call Draw.fill(COLOR_WHITE); //state = STATE_RX_DOWNLOAD; isSpiAcquired(); atomic sfdTime = capturedTime; // data starts after the length field data = getPayload(rxMsg); // read the length byte readLengthFromRxFifo(&length); #ifdef RADIO_DEBUG_MESSAGES_____ if( call DiagMsg.record() ){ call DiagMsg.str("rx"); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(sfdTime); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.int8(length); call DiagMsg.hex8s(getPayload(rxMsg), length - 2); call DiagMsg.send(); } #endif // check for too short lengths if (length == 0) { #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ){ call DiagMsg.str("rx 0 length"); call DiagMsg.send(); } #endif if(!first_packet){ atomic recover_err(); atomic flushRxFifo(); } atomic first_packet = FALSE; call CSN.set(); RADIO_ASSERT( call FIFOP.get() == 0 ); RADIO_ASSERT( call FIFO.get() == 0 ); call SpiResource.release(); call CSN.set(); endRx(); return; } if (length == 1) { // skip payload and rssi atomic readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); RADIO_ASSERT( call FIFOP.get() == 0 ); RADIO_ASSERT( call FIFO.get() == 0 ); call SpiResource.release(); call CSN.set(); endRx(); return; } if (length == 2) { // skip payload atomic readRssiFromRxFifo(&rssi); atomic readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); RADIO_ASSERT( call FIFOP.get() == 0 ); RADIO_ASSERT( call FIFO.get() == 0 ); call SpiResource.release(); call CSN.set(); endRx(); return; } // check for too long lengths if( length > 127 ) { #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ){ call DiagMsg.str("rx > 127"); call DiagMsg.send(); } #endif atomic recover_err(); atomic flushRxFifo(); // JK RADIO_ASSERT( call FIFOP.get() == 0 ); RADIO_ASSERT( call FIFO.get() == 0 ); call SpiResource.release(); call CSN.set(); endRx(); return; } if( length > call RadioPacket.maxPayloadLength() + 2 ){ while( length-- > 2 ) { atomic readPayloadFromRxFifo(data, 1); } atomic readRssiFromRxFifo(&rssi); atomic readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ){ call DiagMsg.str("rx too long"); call DiagMsg.send(); } #endif atomic recover_err(); atomic flushRxFifo(); RADIO_ASSERT( call FIFOP.get() == 0 ); call SpiResource.release(); call CSN.set(); endRx(); return; } // if we're here, length must be correct RADIO_ASSERT(length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2); getHeader(rxMsg)->length = length; // we'll read the FCS/CRC separately length -= 2; // download the whole payload readPayloadFromRxFifo(data, length); // the last two bytes are not the fsc, but RSSI(8), CRC_ON(1)+LQI(7) readRssiFromRxFifo(&rssi); readCrcOkAndLqiFromRxFifo(&crc_ok_lqi); ieee154header = (ieee154_simple_header_t*)data; // TODO: actually, we can signal that a message was received, without // timestamp set if (call FIFOP.get() == 1 || call FIFO.get() == 1) { #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ){ call DiagMsg.str("FIFO or FIFOP = 1"); call DiagMsg.send(); } #endif atomic recover_err(); atomic flushRxFifo(); call SpiResource.release(); call CSN.set(); endRx(); return; } if( signal RadioReceive.header(rxMsg) ){ // set RSSI, CRC and LQI only if we're accepting the message call PacketRSSI.set(rxMsg, rssi); call PacketLinkQuality.set(rxMsg, crc_ok_lqi & 0x7f); crc = (crc_ok_lqi > 0x7f) ? 0 : 1; } if(length == 3 || ieee154header->fcf & (2 << IEEE154_FCF_FRAME_TYPE) ){ //call Leds.led2Toggle(); call SpiResource.release(); call CSN.set(); rxMsg = signal RadioReceive.receive(rxMsg); endRx(); return; } // signal only if it has passed the CRC check if( crc == 0){ call PacketTimeStamp.set(rxMsg, sfdTime); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ){ uint16_t t = call RadioAlarm.getNow(); call DiagMsg.chr('r'); //call DiagMsg.uint16(call RadioAlarm.getNow() - (uint16_t)call PacketTimeStamp.timestamp(rxMsg) ); call DiagMsg.uint16(sfdTime); call DiagMsg.uint16(t); call DiagMsg.uint16(t-sfdTime); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.int8(length); call DiagMsg.hex8s(getPayload(rxMsg), length); if(length > 15) { call DiagMsg.hex8s(&(((uint8_t*)getPayload(rxMsg))[15]), length - 15); } call DiagMsg.send(); } #endif // check fcf for security bit in data packets if((ieee154header->fcf & (1 << IEEE154_FCF_SECURITY_ENABLED)) && (ieee154header->fcf & (IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE)) ){ secHdr = (security_header_t*)&data[9]; memcpy(&decNonce[3], &(secHdr->frameCounter), 4); // readout nonce from tinyos 15.4 security header writeMemory(ADDR_KEY, call CC2520Security.getKey(), 16); writeMemory(ADDR_NONCE, decNonce, 16); MEMCP(HIGH_PRIORITY, 16, ADDR_KEY, ADDR_KEY); MEMCP(HIGH_PRIORITY, 16, ADDR_NONCE, ADDR_NONCE); // reverse twice since CC2420 uses the correct ordered nonce // TODO: add proper operation for each case atomic security_processing = TRUE; // perform security options. if (secHdr->secLevel == NO_SEC){ micLength = 0; }else if (secHdr->secLevel == CBC_MAC_4){ micLength = 4; }else if (secHdr->secLevel == CBC_MAC_8){ micLength = 8; }else if (secHdr->secLevel == CBC_MAC_16){ micLength = 16; }else if (secHdr->secLevel == CTR_MODE){ writeMemory(ADDR_DATA, &data[11+sizeof(security_header_t)], length - sizeof(security_header_t) - 11); CTR(HIGH_PRIORITY, ADDR_KEY/16, length - sizeof(security_header_t) - 11, ADDR_NONCE/16, ADDR_DATA, 0); //mode = CC2420_CTR; micLength = 0; }else if (secHdr->secLevel == CCM_4){ micLength = 4; }else if (secHdr->secLevel == CCM_8){ micLength = 8; }else if (secHdr->secLevel == CCM_16){ micLength = 16; }else{ // invalid security micLength = 0; } // Wait for security done interrupt (pp. 49) status = getStatus(); decLimit = 0; while(status.dpu_h_active && decLimit++ < 0xFFFF) status = getStatus(); call Leds.led0Toggle(); // copy data from the memory to msg buffer and delete security header data[9] = data[9+sizeof(security_header_t)]; data[10] = data[10+sizeof(security_header_t)]; readMemory(ADDR_DATA, &data[11], length - 11 - sizeof(security_header_t)); atomic security_processing = FALSE; length = length - micLength - sizeof(security_header_t); // TODO: not working out too well // TODO: If I do this do I lose the RSSI pointers? //readMemory(ADDR_DATA, &data[11+sizeof(security_header_t)], length - 11 - sizeof(security_header_t)); //length -= micLength; //memcpy(&data[9], &data[9+sizeof(security_header_t)], 2 + (length - 11 - sizeof(security_header_t))); //length -= micLength - sizeof(security_header_t); // modify length w.r.t. mic length } call SpiResource.release(); call CSN.set(); call Leds.led1Toggle(); rxMsg = signal RadioReceive.receive(rxMsg); endRx(); // ready to receive new message: enable SFD interrupts //call SfdCapture.captureRisingEdge(); // JK }else{ call SpiResource.release(); call CSN.set(); //state = STATE_RX_ON; //cmd = CMD_NONE; //call Draw.drawInt(80,140,5,1,COLOR_BLUE); endRx(); // ready to receive new message: enable SFD interrupts //call SfdCapture.captureRisingEdge();// JK } } /*----------------- IRQ -----------------*/ // SFD (rising edge) for timestamps in RX & TX, falling for TX end async event void SfdCapture.captured( uint16_t time ) { //call SfdCapture.disable(); // if canceling the above takes care of the stopping issue, then //the state machine is getting stck at some point inthe disable //state RADIO_ASSERT( ! radioIrq ); RADIO_ASSERT( state == STATE_RX_ON || state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON ); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ){ call DiagMsg.str("SFD"); call DiagMsg.uint16(time); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.str("s="); call DiagMsg.uint8(state); if(call FIFO.get()) call DiagMsg.str("FIFO"); if(call FIFOP.get()) call DiagMsg.str("FIFOP"); if(call SFD.get()) call DiagMsg.str("SFD"); call DiagMsg.send(); } #endif if(call SFD.get()) { atomic { // rising edge, safe time and mutex to 0 capturedTime = call LocalTime.get(); // FIXME: there is a small chance that between the SFD and read of // LocalTime, the timer overflowed. This wil incurr an error of 65436. // We have to check for this overflow! But how? if(state == STATE_TX_ON) { if((uint16_t)(time + TX_SFD_DELAY) > (uint16_t)(capturedTime)) // we had an overflow between SFD capture and read of LocalTime capturedTime -= 1<<16; capturedTime += (uint16_t)(time + TX_SFD_DELAY) - (uint16_t)(capturedTime); } else { if((uint16_t)(time - RX_SFD_DELAY) > (uint16_t)(capturedTime)) // we had an overflow between SFD capture and read of LocalTime capturedTime -= 1<<16; capturedTime += (uint16_t)(time - RX_SFD_DELAY) - (uint16_t)(capturedTime); } } } radioIrq = TRUE; call Tasklet.schedule(); } async event void FifoInterrupt.fired(){ } // FIFOP interrupt, last byte received async event void FifopInterrupt.fired(){ if(receiving == FALSE){ atomic receiving = TRUE; downloadMessage(); } } inline void serviceRadio(){ atomic if( isSpiAcquired() ){ radioIrq = FALSE; switch(state) { case STATE_TX_ON: continueTx(); break; case STATE_BUSY_TX_2_RX_ON: state = STATE_RX_ON; cmd = CMD_NONE; if(sending){ atomic sending = FALSE; call SfdCapture.captureRisingEdge(); // JK release this to enable rx side sfd. // do not signal success if the packet requested for an ack // In this case call a timer instead and signal success once the timer expires or an ack is received call Leds.led2Toggle(); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ){ call DiagMsg.str("RadioSend.sendDone"); call DiagMsg.send(); } #endif signal RadioSend.sendDone(SUCCESS); } default: RADIO_ASSERT(1); } } } default tasklet_async event bool RadioReceive.header(message_t* msg){ return TRUE; } default tasklet_async event message_t* RadioReceive.receive(message_t* msg){ return msg; } /*----------------- TASKLET -----------------*/ tasklet_async event void Tasklet.run(){ if( radioIrq ){ serviceRadio(); } if( cmd != CMD_NONE ){ if( cmd == CMD_DOWNLOAD && state == STATE_RX_ON){ // receive state //downloadMessage(); } else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON ) changeState(); else if( cmd == CMD_CHANNEL ) changeChannel(); if( cmd == CMD_SIGNAL_DONE ){ cmd = CMD_NONE; signal RadioState.done(); } } if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq ) signal RadioSend.ready(); if( cmd == CMD_NONE ) call SpiResource.release(); } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg){ return call Config.headerLength(msg) + sizeof(cc2520_header_t); } async command uint8_t RadioPacket.payloadLength(message_t* msg){ return getHeader(msg)->length - 2; } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length){ RADIO_ASSERT( 1 <= length && length <= 125 ); RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); // we add the length of the CRC, which is automatically generated getHeader(msg)->length = length + 2; } async command uint8_t RadioPacket.maxPayloadLength(){ RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(cc2520_header_t) <= 125 ); return call Config.maxPayloadLength() - sizeof(cc2520_header_t); } async command uint8_t RadioPacket.metadataLength(message_t* msg){ return call Config.metadataLength(msg) + sizeof(cc2520_metadata_t); } async command void RadioPacket.clear(message_t* msg){ // all flags are automatically cleared } /*----------------- PacketTransmitPower -----------------*/ async command bool PacketTransmitPower.isSet(message_t* msg){ return call TransmitPowerFlag.get(msg); } async command uint8_t PacketTransmitPower.get(message_t* msg){ return getMeta(msg)->power; } async command void PacketTransmitPower.clear(message_t* msg){ call TransmitPowerFlag.clear(msg); } async command void PacketTransmitPower.set(message_t* msg, uint8_t value){ call TransmitPowerFlag.set(msg); getMeta(msg)->power = value; } /*----------------- PacketRSSI -----------------*/ async command bool PacketRSSI.isSet(message_t* msg) { return call RSSIFlag.get(msg); } async command uint8_t PacketRSSI.get(message_t* msg) { return getMeta(msg)->rssi; } async command void PacketRSSI.clear(message_t* msg) { call RSSIFlag.clear(msg); } async command void PacketRSSI.set(message_t* msg, uint8_t value) { // just to be safe if the user fails to clear the packet call TransmitPowerFlag.clear(msg); call RSSIFlag.set(msg); getMeta(msg)->rssi = value; } /*----------------- PacketTimeSyncOffset -----------------*/ async command bool PacketTimeSyncOffset.isSet(message_t* msg) { return call TimeSyncFlag.get(msg); } async command uint8_t PacketTimeSyncOffset.get(message_t* msg) { return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t); } async command void PacketTimeSyncOffset.clear(message_t* msg) { call TimeSyncFlag.clear(msg); } async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value) { // we do not store the value, the time sync field is always the last 4 bytes RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value ); call TimeSyncFlag.set(msg); } /*----------------- PacketLinkQuality -----------------*/ async command bool PacketLinkQuality.isSet(message_t* msg) { return TRUE; } async command uint8_t PacketLinkQuality.get(message_t* msg) { return getMeta(msg)->lqi; } async command void PacketLinkQuality.clear(message_t* msg) { } async command void PacketLinkQuality.set(message_t* msg, uint8_t value) { getMeta(msg)->lqi = value; } ieee154_simple_header_t* getIeeeHeader(message_t* msg) { return (ieee154_simple_header_t*) (void*)msg;//getHeader(msg);//((void*)msg) + call SubPacket.headerLength(msg); } async command error_t PacketAcknowledgements.requestAck(message_t* msg) { //call SoftwareAckConfig.setAckRequired(msg, TRUE); getIeeeHeader(msg)->fcf |= (1 << IEEE154_FCF_ACK_REQ); return SUCCESS; } async command error_t PacketAcknowledgements.noAck(message_t* msg) { getIeeeHeader(msg)->fcf &= ~(uint16_t)(1 << IEEE154_FCF_ACK_REQ); return SUCCESS; } async command bool PacketAcknowledgements.wasAcked(message_t* msg) { #ifdef CC2520_HARDWARE_ACK return call AckReceivedFlag.get(msg); #else RADIO_ASSERT(1); return FALSE; #endif } } tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520Radio.h000066400000000000000000000062171207233610700205260ustar00rootroot00000000000000 /* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Author: Janos Sallai * Author: Thomas Schmid (adapted to CC2520) * Author: JeongGil Ko (Security Header Added) */ #ifndef __CC2520RADIO_H__ #define __CC2520RADIO_H__ #include #include #include #include #include #include #include #include #include /** * CC2520 Security Header */ typedef nx_struct security_header_t { nx_uint8_t secLevel:3; nx_uint8_t keyMode:2; nx_uint8_t reserved:3; nx_uint32_t frameCounter; nx_uint8_t keyID[1]; // One byte for now } security_header_t; typedef nx_struct cc2520packet_header_t { cc2520_header_t cc2520; ieee154_simple_header_t ieee154; #ifdef CC2520_HW_SECURITY security_header_t secHdr; #endif #ifndef TFRAMES_ENABLED network_header_t network; #endif #ifndef IEEE154FRAMES_ENABLED activemessage_header_t am; #endif } cc2520packet_header_t; typedef nx_struct cc2520packet_footer_t { // the time stamp is not recorded here, time stamped messaged cannot have max length } cc2520packet_footer_t; typedef struct cc2520packet_metadata_t { #ifdef LOW_POWER_LISTENING lpl_metadata_t lpl; #endif #ifdef PACKET_LINK link_metadata_t link; #endif timestamp_metadata_t timestamp; flags_metadata_t flags; cc2520_metadata_t cc2520; } cc2520packet_metadata_t; enum cc2520_security_enums{ NO_SEC = 0, CBC_MAC_4 = 1, CBC_MAC_8 = 2, CBC_MAC_16 = 3, CTR_MODE = 4, CCM_4 = 5, CCM_8 = 6, CCM_16 = 7 }; #endif//__CC2520RADIO_H__ tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520RadioC.nc000066400000000000000000000243711207233610700210030ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Author: Miklos Maroti, Janos Sallai * Author: Thomas Schmid (adapted to CC2520) */ #include configuration CC2520RadioC { provides { interface SplitControl; #ifndef IEEE154FRAMES_ENABLED interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet as PacketForActiveMessage; #endif #ifndef TFRAMES_ENABLED interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier as Ieee154Notifier; interface Resource as SendResource[uint8_t clint]; interface Ieee154Packet; interface Packet as PacketForIeee154Message; #endif interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; #ifdef TRAFFIC_MONITOR interface TrafficMonitor; #endif interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { #define UQ_METADATA_FLAGS "UQ_CC2520_METADATA_FLAGS" #define UQ_RADIO_ALARM "UQ_CC2520_RADIO_ALARM" // -------- RadioP components CC2520RadioP as RadioP; #ifdef RADIO_DEBUG components AssertC; #endif RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC; RadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; RadioP.PacketTimeStamp -> TimeStampingLayerC; RadioP.CC2520Packet -> RadioDriverLayerC; // -------- RadioAlarm components new RadioAlarmC(); RadioAlarmC.Alarm -> RadioDriverLayerC; // -------- Active Message #ifndef IEEE154FRAMES_ENABLED components new ActiveMessageLayerC(); ActiveMessageLayerC.Config -> RadioP; ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC; ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive; ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket; AMSend = ActiveMessageLayerC; Receive = ActiveMessageLayerC.Receive; Snoop = ActiveMessageLayerC.Snoop; SendNotifier = ActiveMessageLayerC; AMPacket = ActiveMessageLayerC; PacketForActiveMessage = ActiveMessageLayerC; ReceiveDefault = ActiveMessageLayerC.ReceiveDefault; SnoopDefault = ActiveMessageLayerC.SnoopDefault; #endif // -------- Automatic RadioSend Resource #ifndef IEEE154FRAMES_ENABLED #ifndef TFRAMES_ENABLED components new AutoResourceAcquireLayerC(); AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)]; #else components new DummyLayerC() as AutoResourceAcquireLayerC; #endif AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend; #endif // -------- RadioSend Resource #ifndef TFRAMES_ENABLED components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC; SendResource = SendResourceC; // -------- Ieee154 Message components new Ieee154MessageLayerC(); Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC; Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send; Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive; Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet; Ieee154Send = Ieee154MessageLayerC; Ieee154Receive = Ieee154MessageLayerC; Ieee154Notifier = Ieee154MessageLayerC; Ieee154Packet = Ieee154PacketLayerC; PacketForIeee154Message = Ieee154MessageLayerC; #endif // -------- Tinyos Network components new TinyosNetworkLayerC(); TinyosNetworkLayerC.SubSend -> UniqueLayerC; TinyosNetworkLayerC.SubReceive -> PacketLinkLayerC; TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC; // -------- IEEE 802.15.4 Packet components new Ieee154PacketLayerC(); Ieee154PacketLayerC.SubPacket -> PacketLinkLayerC; // -------- UniqueLayer Send part (wired twice) components new UniqueLayerC(); UniqueLayerC.Config -> RadioP; UniqueLayerC.SubSend -> PacketLinkLayerC; // -------- Packet Link components new PacketLinkLayerC(); PacketLink = PacketLinkLayerC; #ifdef CC2520_HARDWARE_ACK PacketLinkLayerC.PacketAcknowledgements -> RadioDriverLayerC; #else PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC; #endif PacketLinkLayerC -> LowPowerListeningLayerC.Send; PacketLinkLayerC -> LowPowerListeningLayerC.Receive; PacketLinkLayerC -> LowPowerListeningLayerC.RadioPacket; // -------- Low Power Listening #ifdef LOW_POWER_LISTENING #warning "*** USING LOW POWER LISTENING LAYER" components new LowPowerListeningLayerC(); LowPowerListeningLayerC.Config -> RadioP; #ifdef CC2520_HARDWARE_ACK LowPowerListeningLayerC.PacketAcknowledgements -> RadioDriverLayerC; #else LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC; #endif #else components new LowPowerListeningDummyC() as LowPowerListeningLayerC; #endif LowPowerListeningLayerC.SubControl -> MessageBufferLayerC; LowPowerListeningLayerC.SubSend -> MessageBufferLayerC; LowPowerListeningLayerC.SubReceive -> MessageBufferLayerC; LowPowerListeningLayerC.SubPacket -> TimeStampingLayerC; SplitControl = LowPowerListeningLayerC; LowPowerListening = LowPowerListeningLayerC; // -------- MessageBuffer components new MessageBufferLayerC(); MessageBufferLayerC.RadioSend -> CollisionAvoidanceLayerC; MessageBufferLayerC.RadioReceive -> UniqueLayerC; MessageBufferLayerC.RadioState -> TrafficMonitorLayerC; RadioChannel = MessageBufferLayerC; // -------- UniqueLayer receive part (wired twice) UniqueLayerC.SubReceive -> CollisionAvoidanceLayerC; // -------- CollisionAvoidance #ifdef SLOTTED_MAC components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC; #else components new RandomCollisionLayerC() as CollisionAvoidanceLayerC; #endif CollisionAvoidanceLayerC.Config -> RadioP; CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC; CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC; CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; // -------- SoftwareAcknowledgement #ifndef CC2520_HARDWARE_ACK components new SoftwareAckLayerC(); SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; PacketAcknowledgements = SoftwareAckLayerC; #else components new DummyLayerC() as SoftwareAckLayerC; #endif SoftwareAckLayerC.Config -> RadioP; SoftwareAckLayerC.SubSend -> CsmaLayerC; SoftwareAckLayerC.SubReceive -> CsmaLayerC; // -------- Carrier Sense components new DummyLayerC() as CsmaLayerC; CsmaLayerC.Config -> RadioP; CsmaLayerC -> TrafficMonitorLayerC.RadioSend; CsmaLayerC -> TrafficMonitorLayerC.RadioReceive; CsmaLayerC -> RadioDriverLayerC.RadioCCA; // -------- TimeStamping components new TimeStampingLayerC(); TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC; TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC; PacketTimeStampRadio = TimeStampingLayerC; PacketTimeStampMilli = TimeStampingLayerC; TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; // -------- MetadataFlags components new MetadataFlagsLayerC(); MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC; // -------- Traffic Monitor #ifdef TRAFFIC_MONITOR components new TrafficMonitorLayerC(); TrafficMonitor = TrafficMonitorLayerC; #else components new DummyLayerC() as TrafficMonitorLayerC; #endif TrafficMonitorLayerC.Config -> RadioP; TrafficMonitorLayerC -> RadioDriverLayerC.RadioSend; TrafficMonitorLayerC -> RadioDriverLayerC.RadioReceive; TrafficMonitorLayerC -> RadioDriverLayerC.RadioState; // -------- Driver #ifdef CC2520_HARDWARE_ACK components CC2520DriverLayerC as RadioDriverLayerC; PacketAcknowledgements = RadioDriverLayerC; RadioDriverLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC; RadioDriverLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; #else components CC2520DriverLayerC as RadioDriverLayerC; #endif RadioDriverLayerC.Config -> RadioP; RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC; PacketTransmitPower = RadioDriverLayerC.PacketTransmitPower; PacketLinkQuality = RadioDriverLayerC.PacketLinkQuality; PacketRSSI = RadioDriverLayerC.PacketRSSI; LocalTimeRadio = RadioDriverLayerC; RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; } tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520RadioP.nc000066400000000000000000000227431207233610700210210ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Author: Miklos Maroti, Janos Sallai * Author: Thomas Schmid (adapted to CC2520) */ #include #include #include module CC2520RadioP { provides { interface CC2520DriverConfig; interface SoftwareAckConfig; interface UniqueConfig; interface CsmaConfig; interface TrafficMonitorConfig; interface RandomCollisionConfig; interface SlottedCollisionConfig; interface ActiveMessageConfig; interface DummyConfig; #ifdef LOW_POWER_LISTENING interface LowPowerListeningConfig; #endif } uses { interface Ieee154PacketLayer; interface RadioAlarm; interface RadioPacket as CC2520Packet; interface PacketTimeStamp; } } implementation { /*----------------- CC2520DriverConfig -----------------*/ async command uint8_t CC2520DriverConfig.headerLength(message_t* msg) { return offsetof(message_t, data) - sizeof(cc2520packet_header_t); } async command uint8_t CC2520DriverConfig.maxPayloadLength() { return sizeof(cc2520packet_header_t) + TOSH_DATA_LENGTH; } async command uint8_t CC2520DriverConfig.metadataLength(message_t* msg) { return 0; } async command uint8_t CC2520DriverConfig.headerPreloadLength() { // we need the fcf, dsn, destpan, and dest return 7; } async command bool CC2520DriverConfig.requiresRssiCca(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- SoftwareAckConfig -----------------*/ async command bool SoftwareAckConfig.requiresAckWait(message_t* msg) { return call Ieee154PacketLayer.requiresAckWait(msg); } async command bool SoftwareAckConfig.isAckPacket(message_t* msg) { return call Ieee154PacketLayer.isAckFrame(msg); } async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack) { return call Ieee154PacketLayer.verifyAckReply(data, ack); } async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack) { call Ieee154PacketLayer.setAckRequired(msg, ack); } async command bool SoftwareAckConfig.requiresAckReply(message_t* msg) { return call Ieee154PacketLayer.requiresAckReply(msg); } async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack) { call Ieee154PacketLayer.createAckReply(data, ack); } #ifndef SOFTWAREACK_TIMEOUT #define SOFTWAREACK_TIMEOUT 1000 #endif async command uint16_t SoftwareAckConfig.getAckTimeout() { return (uint16_t)(SOFTWAREACK_TIMEOUT); } tasklet_async command void SoftwareAckConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- UniqueConfig -----------------*/ async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg) { return call Ieee154PacketLayer.getDSN(msg); } async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn) { call Ieee154PacketLayer.setDSN(msg, dsn); } async command am_addr_t UniqueConfig.getSender(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } tasklet_async command void UniqueConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- ActiveMessageConfig -----------------*/ command am_addr_t ActiveMessageConfig.destination(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg); } command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setDestAddr(msg, addr); } command am_addr_t ActiveMessageConfig.source(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setSrcAddr(msg, addr); } command am_group_t ActiveMessageConfig.group(message_t* msg) { return call Ieee154PacketLayer.getDestPan(msg); } command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp) { call Ieee154PacketLayer.setDestPan(msg, grp); } command error_t ActiveMessageConfig.checkFrame(message_t* msg) { if( ! call Ieee154PacketLayer.isDataFrame(msg) ) call Ieee154PacketLayer.createDataFrame(msg); return SUCCESS; } /*----------------- CsmaConfig -----------------*/ async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- TrafficMonitorConfig -----------------*/ async command uint16_t TrafficMonitorConfig.getBytes(message_t* msg) { // pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes) return call CC2520Packet.payloadLength(msg) + 6; } /*----------------- RandomCollisionConfig -----------------*/ /* * We try to use the same values as in CC2420 * * CC2420_MIN_BACKOFF = 10 jiffies = 320 microsec * CC2420_BACKOFF_PERIOD = 10 jiffies * initial backoff = 0x1F * CC2420_BACKOFF_PERIOD = 310 jiffies = 9920 microsec * congestion backoff = 0x7 * CC2420_BACKOFF_PERIOD = 70 jiffies = 2240 microsec */ #ifndef LOW_POWER_LISTENING #ifndef CC2520_BACKOFF_MIN #define CC2520_BACKOFF_MIN 320 #endif async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(CC2520_BACKOFF_MIN * RADIO_ALARM_MICROSEC); } #ifndef CC2520_BACKOFF_INIT #define CC2520_BACKOFF_INIT 4960 // instead of 9920 #endif async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(CC2520_BACKOFF_INIT * RADIO_ALARM_MICROSEC); } #ifndef CC2520_BACKOFF_CONG #define CC2520_BACKOFF_CONG 2240 #endif async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(CC2520_BACKOFF_CONG * RADIO_ALARM_MICROSEC); } #endif async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg) { uint16_t time; // TODO: maybe we should use the embedded timestamp of the message time = call RadioAlarm.getNow(); // estimated response time (download the message, etc) is 5-8 bytes if( call Ieee154PacketLayer.requiresAckReply(msg) ) time += (uint16_t)(32 * (-5 + 16 + 11 + 5) * RADIO_ALARM_MICROSEC); else time += (uint16_t)(32 * (-5 + 5) * RADIO_ALARM_MICROSEC); return time; } tasklet_async event void RadioAlarm.fired() { } /*----------------- SlottedCollisionConfig -----------------*/ async command uint16_t SlottedCollisionConfig.getInitialDelay() { return 300; } async command uint8_t SlottedCollisionConfig.getScheduleExponent() { return 1 + RADIO_ALARM_MILLI_EXP; } async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg) { // TODO: check if the timestamp is correct return call PacketTimeStamp.timestamp(msg); } async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg) { // the preamble (4 bytes), SFD (1 byte), plus two extra for safety return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC); } async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg) { return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC); } /*----------------- Dummy -----------------*/ async command void DummyConfig.nothing() { } /*----------------- LowPowerListening -----------------*/ #ifdef LOW_POWER_LISTENING command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR; } command bool LowPowerListeningConfig.ackRequested(message_t* msg) { return call Ieee154PacketLayer.getAckRequired(msg); } command uint16_t LowPowerListeningConfig.getListenLength() { return 5; } async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(320 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(1600 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(3200 * RADIO_ALARM_MICROSEC); } #endif } tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520Security.nc000066400000000000000000000035401207233610700214440ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ interface CC2520Security{ async command uint8_t getSecurityMode(); command void setSecurityMode(uint8_t mode); command void setKey(uint8_t* pKey, uint8_t length); async command uint8_t* getKey(); async command uint32_t getFrameCounter(); } tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520SecurityP.nc000066400000000000000000000043101207233610700215600ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ module CC2520SecurityP{ provides interface CC2520Security; } implementation{ norace uint8_t MODE, K_LENGTH; norace uint32_t FRAMECOUNTER = 0; uint8_t PKEY[16]; async command uint8_t CC2520Security.getSecurityMode(){ return MODE; } command void CC2520Security.setSecurityMode(uint8_t mode){ atomic MODE = mode; } command void CC2520Security.setKey(uint8_t* pKey, uint8_t length){ memcpy(PKEY, pKey, length); } async command uint8_t* CC2520Security.getKey(){ return PKEY; } async command uint32_t CC2520Security.getFrameCounter(){ return FRAMECOUNTER++; } } tinyos-2.1.2+dfsg/tos/chips/cc2520/CC2520TimeSyncMessageC.nc000066400000000000000000000064611207233610700230050ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Author: Miklos Maroti, Janos Sallai * Author: Thomas Schmid (adapted to CC2520) */ #include configuration CC2520TimeSyncMessageC { provides { interface SplitControl; interface Receive[uint8_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketTimeStamp as PacketTimeStampRadio; interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components CC2520ActiveMessageC as ActiveMessageC, new TimeSyncMessageLayerC(); SplitControl = ActiveMessageC; AMPacket = TimeSyncMessageLayerC; Receive = TimeSyncMessageLayerC.Receive; Snoop = TimeSyncMessageLayerC.Snoop; Packet = TimeSyncMessageLayerC; PacketAcknowledgements = ActiveMessageC; LowPowerListening = ActiveMessageC; PacketTimeStampRadio = ActiveMessageC; TimeSyncAMSendRadio = TimeSyncMessageLayerC; TimeSyncPacketRadio = TimeSyncMessageLayerC; PacketTimeStampMilli = ActiveMessageC; TimeSyncAMSendMilli = TimeSyncMessageLayerC; TimeSyncPacketMilli = TimeSyncMessageLayerC; TimeSyncMessageLayerC.PacketTimeStampRadio -> ActiveMessageC; TimeSyncMessageLayerC.PacketTimeStampMilli -> ActiveMessageC; components CC2520DriverLayerC as DriverLayerC; TimeSyncMessageLayerC.LocalTimeRadio -> DriverLayerC; TimeSyncMessageLayerC.PacketTimeSyncOffset -> DriverLayerC.PacketTimeSyncOffset; } tinyos-2.1.2+dfsg/tos/chips/cortex/000077500000000000000000000000001207233610700172005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/000077500000000000000000000000001207233610700175175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/cortexm3hardware.h000066400000000000000000000072411207233610700231560ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Definitions specific to the Cortex-M3 MCU. * Includes interrupt enable/disable routines for nesC. * * @author Wanja Hofer * @author Thomas Schmid */ #ifndef CORTEXM3_HARDWARE_H #define CORTEXM3_HARDWARE_H #define ROUNDDOWN(a, n) \ ({ \ uint32_t __a = (uint32_t) (a); \ (typeof(a)) (__a - __a % (n)); \ }) // Round up to the nearest multiple of n #define ROUNDUP(a, n) \ ({ \ uint32_t __n = (uint32_t) (n); \ (typeof(a)) (ROUNDDOWN((uint32_t) (a) + __n - 1, __n)); \ }) typedef uint32_t __nesc_atomic_t; inline __nesc_atomic_t __nesc_atomic_start() @spontaneous() __attribute__((always_inline)) { __nesc_atomic_t oldState = 0; __nesc_atomic_t newState = 1; asm volatile( "mrs %[old], primask\n" "msr primask, %[new]\n" : [old] "=&r" (oldState) // output, assure write only! : [new] "r" (newState) // input : "cc", "memory" // clobber condition code flag and memory ); return oldState; } inline void __nesc_atomic_end(__nesc_atomic_t oldState) @spontaneous() __attribute__((always_inline)) { asm volatile("" : : : "memory"); // memory barrier asm volatile( "msr primask, %[old]" : // no output : [old] "r" (oldState) // input ); } // See definitive guide to Cortex-M3, p. 141, 142 // Enables all exceptions except hard fault and NMI inline void __nesc_enable_interrupt() __attribute__((always_inline)) { __nesc_atomic_t newState = 0; asm volatile( "msr primask, %0" : // output : "r" (newState) // input ); } // See definitive guide to Cortex-M3, p. 141, 142 // Disables all exceptions except hard fault and NMI inline void __nesc_disable_interrupt() __attribute__((always_inline)) { __nesc_atomic_t newState = 1; asm volatile( "msr primask, %0" : // output : "r" (newState) // input ); } #endif // CORTEXM3_HARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/000077500000000000000000000000001207233610700203625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/FunctionWrapper.nc000066400000000000000000000032731207233610700240370ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the CSIRO nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Kevin Klues */ interface FunctionWrapper { async command void preamble(); async command void postamble(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/Sam3LowPower.nc000066400000000000000000000033151207233610700232100ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * @author Kevin Klues */ interface Sam3LowPower { async command void configure(); async event void customizePio(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/eefc/000077500000000000000000000000001207233610700212645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/eefc/HplSam3Eefc.nc000066400000000000000000000035431207233610700236450ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Kevin Klues */ interface HplSam3Eefc { command error_t read(void* addr, void* buf, uint16_t size); command error_t write(void* addr, void* buf, uint16_t size); command error_t erase(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/eefc/HplSam3EefcC.nc000066400000000000000000000140121207233610700237410ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Kevin Klues */ #include "sam3eefchardware.h" generic module HplSam3EefcC(uint32_t eefc_base, uint32_t base_addr, uint32_t page_size, uint32_t total_size) { provides interface Init; provides interface InternalFlash; provides interface HplSam3Eefc; } implementation { volatile eefc_t *EEFC; // Temporary holder as we build the flash cmd register eefc_fcr_t fcr; // Shouldn't need this temp_buf (i.e. we should be able to write // directly to the base_addr) // Doesn't seem to work without it though... uint8_t temp_buf[page_size]; __attribute__((noinline)) uint32_t sendCommand(uint8_t cmd, uint32_t arg) { while(!EEFC->fsr.bits.frdy); fcr.bits.fkey = EFFC_FCR_KEY; // Set the key required to send commands fcr.bits.farg = arg; fcr.bits.fcmd = cmd; EEFC->fcr = fcr; while(!EEFC->fsr.bits.frdy); return EEFC->frr.flat; } bool getGpnvmBit(uint8_t bit) { return sendCommand(EFFC_FCMD_GET_GPNVM, 0) & (1 << bit); } void eraseIFlash() { sendCommand(EFFC_FCMD_ERASE_ALL, 0); } void eraseWriteIFlashPage(void* buf, uint32_t page) { // Write the buffer into the internal flash's latch buffer // by writing it to the base address for this flash region memcpy((void*)base_addr, buf, page_size); sendCommand(EFFC_FCMD_ERASE_PAGE_WRITE_PAGE, page); } __attribute__((noinline)) error_t doIFlashWrite(void* saddr, void* buf, uint16_t size) { int i; uint8_t *aligned_saddr = ROUNDDOWN(saddr, page_size); uint8_t *aligned_eaddr = ROUNDDOWN(saddr+size-1, page_size); uint16_t soffset = (uint32_t)saddr - (uint32_t)aligned_saddr; uint16_t next_page = ((uint32_t)aligned_saddr - base_addr)/page_size; uint16_t npages = ((uint32_t)(aligned_eaddr-aligned_saddr))/page_size + 1; // If nothing to write, just return SUCCESS if(size == 0) return SUCCESS; if(((uint32_t)saddr + size) > (base_addr + total_size)) return ESIZE; // Make sure there are no outstanding requests while(!EEFC->fsr.bits.frdy); // Prepare the temporary buffer with the contents of the first page // Preserve original contents at the front memcpy(temp_buf, aligned_saddr, soffset); // If the whole buffer fits within the first page if(aligned_saddr == aligned_eaddr) { //Write new contents to the middle memcpy(temp_buf+soffset, buf, size); // Preserve contents to the end memcpy(temp_buf+soffset+size, aligned_saddr+soffset+size, page_size-soffset-size); } else // Write new contents to the end memcpy(temp_buf+soffset, buf, page_size-soffset); // Write the first page eraseWriteIFlashPage(temp_buf, next_page); // If there was only one page, we're done if(aligned_saddr == aligned_eaddr) return SUCCESS; // Otherwise update variables and move onto the next page buf+=page_size-soffset; size-=page_size-soffset; next_page++; // Write all remaining pages except for the last one which may // have some alignment issues for(i=0; ifmr.bits.frdy = 0; // Don't generate an frdy interrupt EEFC->fmr.bits.fws = 2; // use 3 wait states EEFC->fmr.bits.fam = 0; // enhance for performance return SUCCESS; } command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) { return doIFlashWrite(addr, buf, size); } command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) { memcpy(buf, addr, size); return SUCCESS; } command error_t HplSam3Eefc.write(void* addr, void* buf, uint16_t size) { return doIFlashWrite(addr, buf, size); } command error_t HplSam3Eefc.read(void* addr, void* buf, uint16_t size) { memcpy(buf, addr, size); return SUCCESS; } command error_t HplSam3Eefc.erase() { eraseIFlash(); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/eefc/Sam3EefcC.nc000066400000000000000000000044631207233610700233060ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Kevin Klues */ #include "AT91SAM3U4.h" #include "sam3eefchardware.h" configuration Sam3EefcC { provides { interface Init as InitIFlash0; interface Init as InitIFlash1; interface InternalFlash as InternalFlash0; interface InternalFlash as InternalFlash1; } } implementation { components new HplSam3EefcC((uint32_t)AT91C_BASE_EFC0, AT91C_IFLASH0, AT91C_IFLASH0_PAGE_SIZE, AT91C_IFLASH0_SIZE) as IFlash0; components new HplSam3EefcC((uint32_t)AT91C_BASE_EFC1, AT91C_IFLASH1, AT91C_IFLASH1_PAGE_SIZE, AT91C_IFLASH1_SIZE) as IFlash1; InitIFlash0 = IFlash0; InitIFlash1 = IFlash1; InternalFlash0 = IFlash0; InternalFlash1 = IFlash1; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/eefc/eefchardware.h000066400000000000000000000113671207233610700240650ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Enhanced Embedded Flash Controller register definitions. * * @author Thomas Schmid */ #ifndef _EFFCHARDWARE_H #define _EFFCHARDWARE_H /** * EEFC Flash Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 315 */ typedef union { uint32_t flat; struct { uint8_t frdy : 1; // ready interrupt enable uint8_t reserved0 : 7; uint8_t fws : 4; // flash wait state uint8_t reserved1 : 4; uint8_t reserved2 : 8; uint8_t fam : 1; // flash access mode uint8_t reserved3 : 7; } __attribute__((__packed__)) bits; } eefc_fmr_t; /** * EEFC Flash Command Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 316 */ typedef union { uint32_t flat; struct { uint8_t fcmd : 8; // flash command uint16_t farg : 16; // flash command argument uint8_t fkey : 8; // flash writing protection key, has to be written as 0x5A! } __attribute__((__packed__)) bits; } eefc_fcr_t; // For more details on the flash commands, see AT91 ARM Cortex-M3 based // Microcontrollers SAM3U Series, Preliminary, p. 309 #define EFFC_FCMD_GET_FLASH_DESCRIPTOR 0x0 #define EFFC_FCMD_WRITE_PAGE 0x1 #define EFFC_FCMD_WRITE_PAGE_LOCK 0x2 #define EFFC_FCMD_ERASE_PAGE_WRITE_PAGE 0x3 #define EFFC_FCMD_ERASE_PAGE_WRITE_PAGE_LOCK 0x4 #define EFFC_FCMD_ERASE_ALL 0x5 #define EFFC_FCMD_SET_LOCK 0x8 #define EFFC_FCMD_CLEAR_LOCK 0x9 #define EFFC_FCMD_GET_LOCK 0xA #define EFFC_FCMD_SET_GPNVM 0xB #define EFFC_FCMD_CLEAR_GPNVM 0xC #define EFFC_FCMD_GET_GPNVM 0xD #define EFFC_FCMD_START_READ_UNIQUE_ID 0xE #define EFFC_FCMD_STOP_READ_UNIQUE_ID 0xF #define EFFC_FCR_KEY 0x5A /** * EEFC Flash Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 317 */ typedef union { uint32_t flat; struct { uint8_t frdy : 1; // flash ready status uint8_t fcmde : 1; // flash command error status uint8_t flocke : 1; // flash lock error status uint8_t reserved0 : 5; uint8_t reserved1 : 8; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } eefc_fsr_t; /** * EEFC Flash Result Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 318 */ typedef union { uint32_t flat; struct { uint32_t fvalue : 32; // flash result value } __attribute__((__packed__)) bits; } eefc_frr_t; /** * EEFC Register definition, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 314 */ typedef struct effc { volatile eefc_fmr_t fmr; // EEFC Flash Mode Register volatile eefc_fcr_t fcr; // EEFC Flash Command Register volatile eefc_fsr_t fsr; // EEFC Flash Status Register volatile eefc_frr_t frr; // EEFC Flash Result Register } eefc_t; #endif // _EFFCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/matrix/000077500000000000000000000000001207233610700216665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/matrix/matrixhardware.h000066400000000000000000000124271207233610700250670ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Bus Matrix register definitions. * * @author Thomas Schmid */ #ifndef _MATRIXHARDWARE_H #define _MATRIXHARDWARE_H /** * Bus Matrix Master Configuration Register, AT91 ARM Cortex-M3 based * Microcontrollers SAM3U Series, Preliminary, p. 341 */ typedef union { uint32_t flat; struct { uint8_t ulbt : 3; // undefined length burst type uint8_t reserved0 : 5; uint8_t reserved1 : 8; uint16_t reserved2 : 16; }__attribute__((__packed__)) bits; } matrix_mcfg_t; #define MATRIX_MCFG_ULBT_INFINITE_BURST 0x0 #define MATRIX_MCFG_ULBT_SINGLE_ACCESS 0x1 #define MATRIX_MCFG_ULBT_FOUR_BEAT_BURST 0x2 #define MATRIX_MCFG_ULBT_EIGHT_BEAT_BURST 0x3 #define MATRIX_MCFG_ULBT_SIXTEEN_BEAT_BURST 0x4 /** * Bus Matrix Slave Configuration Register, AT91 ARM Cortex-M3 based * Microcontrollers SAM3U Series, Preliminary, p. 342 */ typedef union { uint32_t flat; struct { uint8_t slot_cycle : 8; // maximum number of allowed cycles for a burst uint8_t reserved0 : 8; uint8_t defmstr_type : 2; // default master type uint8_t fixed_defmstr: 3; // fixed default master uint8_t reserved1 : 3; uint8_t arbt : 2; // arbitration type uint8_t reserved2 : 6; }__attribute__((__packed__)) bits; } matrix_scfg_t; #define MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT 0x0 #define MATRIX_SCFG_MASTER_TYPE_LAST_DEFAULT 0x1 #define MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT 0x2 #define MATRIX_SCFG_ARBT_ROUND_ROBINT 0x0 #define MATRIX_SCFG_ARBT_FIXED_PRIO 0x1 /** * Bus Matrix Priority Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 343 */ typedef union { uint32_t flat; struct { uint8_t m0pr : 2; // master 0 priority uint8_t reserved0 : 2; uint8_t m1pr : 2; // master 1 priority uint8_t reserved1 : 2; uint8_t m2pr : 2; // master 2 priority uint8_t reserved2 : 2; uint8_t m3pr : 2; // master 3 priority uint8_t reserved3 : 2; uint8_t m4pr : 2; // master 4 priority uint8_t reserved4 : 6; uint8_t reserved5 : 8; }__attribute__((__packed__)) bits; } matrix_pras_t; /** * Bus Matrix Master Remap Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 344 */ typedef union { uint32_t flat; struct { uint8_t rcb0 : 1; // remap command bit for ahb master 0 uint8_t rcb1 : 1; // remap command bit for ahb master 1 uint8_t rcb2 : 1; // remap command bit for ahb master 2 uint8_t rcb3 : 1; // remap command bit for ahb master 3 uint8_t rcb4 : 1; // remap command bit for ahb master 4 uint8_t reserved0 : 3; uint8_t reserved1 : 8; uint16_t reserved2 : 16; }__attribute__((__packed__)) bits; } matrix_mrcr_t; /** * Bus Matrix Write Protection Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 350 */ typedef union { uint32_t flat; struct { uint32_t wpen : 1; uint32_t reserved0 : 7; uint32_t wpkey : 24; }__attribute__((__packed__)) bits; } matrix_wpmr_t; /** * Bus Matrix Write Protection Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 350 */ typedef union { uint32_t flat; struct { uint8_t wpvs : 1; uint8_t reserved0 : 7; uint16_t wpkey : 16; uint8_t reserved1 : 8; }__attribute__((__packed__)) bits; } matrix_wpsr_t; #endif // _MATRIXHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/nvic/000077500000000000000000000000001207233610700213215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/nvic/HplNVICCntl.nc000066400000000000000000000051151207233610700236710ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Control interface for the NVIC. * * @author Thomas Schmid * @author Wanja Hofer */ interface HplNVICCntl { command void setPriorityGrouping(uint32_t priority_grouping); async command void enableUsageFault(); async command void disableUsageFault(); async command void enableBusFault(); async command void disableBusFault(); async command void enableMemoryProtectionFault(); async command void disableMemoryProtectionFault(); async command bool isSVCallPended(); async command bool isUsageFaultPended(); async command bool isBusFaultPended(); async command bool isMemoryProtectionFaultPended(); async command bool isSysTickActive(); async command bool isPendSVActive(); async command bool isMonitorActive(); async command bool isSVCallActive(); async command bool isUsageFaultActive(); async command bool isBusFaultActive(); async command bool isMemoryProtectionFaultActive(); command void setSVCallPrio(uint8_t prio); command void setPendSVPrio(uint8_t prio); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/nvic/HplNVICCntlP.nc000066400000000000000000000107531207233610700240150ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * NVIC Controller * * @author Thomas Schmid * @author Wanja Hofer */ #include "nvichardware.h" module HplNVICCntlP { provides interface HplNVICCntl; provides interface Init; } implementation{ command void HplNVICCntl.setPriorityGrouping(uint32_t priority_grouping) { uint32_t reg_value=0; reg_value = SCB->AIRCR; /* read old register configuration */ reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */ reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (priority_grouping << 8))); /* Insert write key and priorty group */ SCB->AIRCR = reg_value; } async command void HplNVICCntl.enableUsageFault() { SCB->SHCSR.bits.usgfaultena = 1; } async command void HplNVICCntl.disableUsageFault() { SCB->SHCSR.bits.usgfaultena = 0; } async command void HplNVICCntl.enableBusFault() { SCB->SHCSR.bits.busfaultena = 1; } async command void HplNVICCntl.disableBusFault() { SCB->SHCSR.bits.busfaultena = 0; } async command void HplNVICCntl.enableMemoryProtectionFault() { SCB->SHCSR.bits.memfaultena = 1; } async command void HplNVICCntl.disableMemoryProtectionFault() { SCB->SHCSR.bits.memfaultena = 0; } async command bool HplNVICCntl.isSVCallPended() { return (SCB->SHCSR.bits.svcallpended == 0x1); } async command bool HplNVICCntl.isUsageFaultPended() { return (SCB->SHCSR.bits.usgfaultpended == 0x1); } async command bool HplNVICCntl.isBusFaultPended() { return (SCB->SHCSR.bits.busfaultpended == 0x1); } async command bool HplNVICCntl.isMemoryProtectionFaultPended() { return (SCB->SHCSR.bits.memfaultpended == 0x1); } async command bool HplNVICCntl.isSysTickActive() { return (SCB->SHCSR.bits.systickact == 0x1); } async command bool HplNVICCntl.isPendSVActive() { return (SCB->SHCSR.bits.pendsvact == 0x1); } async command bool HplNVICCntl.isMonitorActive() { return (SCB->SHCSR.bits.monitoract == 0x1); } async command bool HplNVICCntl.isSVCallActive() { return (SCB->SHCSR.bits.svcallact == 0x1); } async command bool HplNVICCntl.isUsageFaultActive() { return (SCB->SHCSR.bits.usgfaultact == 0x1); } async command bool HplNVICCntl.isBusFaultActive() { return (SCB->SHCSR.bits.busfaultact == 0x1); } async command bool HplNVICCntl.isMemoryProtectionFaultActive() { return (SCB->SHCSR.bits.memfaultact == 0x1); } command void HplNVICCntl.setSVCallPrio(uint8_t prio) { (SCB->SHP)[7] = prio; } command void HplNVICCntl.setPendSVPrio(uint8_t prio) { (SCB->SHP)[10] = prio; } command error_t Init.init() { // both SVCall and PendSV have the same, lowest prio in the system call HplNVICCntl.setSVCallPrio(0xff); call HplNVICCntl.setPendSVPrio(0xff); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/nvic/HplNVICInterruptCntl.nc000066400000000000000000000042021207233610700256020ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * This is an interface to configure one particular interrupt of the Nested * Vectored Interrupt Controller. * * @author Thomas Schmid */ interface HplNVICInterruptCntl { async command void configure(uint32_t priority); async command void enable(); async command void disable(); async command bool isPending(); async command void setPending(); async command void clearPending(); async command uint32_t getActive(); async command void setPriority(uint32_t priority); async command uint32_t getPriority(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/nvic/HplNVICInterruptP.nc000066400000000000000000000076321207233610700251130ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Generic module representing an NVIC interrupt. * * @author Thomas Schmid */ #include "nvichardware.h" generic module HplNVICInterruptP (irqn_t irqn) @safe() { provides { interface HplNVICInterruptCntl as Cntl; } } implementation { async command void Cntl.configure(uint32_t priority){ unsigned int priGroup = __NVIC_PRIO_BITS; unsigned int nPre = 8 - priGroup; unsigned int nSub = priGroup; unsigned int preemptionPriority; unsigned int subPriority; unsigned int IRQpriority; preemptionPriority = (priority & 0xff00) >> 8; subPriority = (priority & 0xff); // Disable the interrupt first call Cntl.disable(); // Clear any pending status call Cntl.clearPending(); if (subPriority >= (0x01 << nSub)) subPriority = (0x01 << nSub) - 1; if (preemptionPriority >= (0x01 << nPre)) preemptionPriority = (0x01 << nPre) - 1; IRQpriority = (subPriority | (preemptionPriority << nSub)); call Cntl.setPriority(IRQpriority); } inline async command void Cntl.enable(){ NVIC->iser0 = (1 << ((uint32_t)(irqn) & 0x1F)); /* enable interrupt */ } inline async command void Cntl.disable(){ NVIC->icer0 = (1 << ((uint32_t)(irqn) & 0x1F)); /* disable interrupt */ } inline async command bool Cntl.isPending(){ return((irqn_t) (NVIC->ispr0 & (1 << ((uint32_t)(irqn) & 0x1F)))); /* Return Interrupt bit or 'zero' */ } inline async command void Cntl.setPending(){ NVIC->ispr0 = (1 << ((uint32_t)(irqn) & 0x1F)); /* set interrupt pending */ } inline async command void Cntl.clearPending(){ NVIC->icpr0 = (1 << ((uint32_t)(irqn) & 0x1F)); } inline async command uint32_t Cntl.getActive(){ return((irqn_t)(NVIC->iabr0 & (1 << ((uint32_t)(irqn) & 0x1F)))); /* Return Interruptnumber or 'zero' */ } inline async command void Cntl.setPriority(uint32_t priority){ NVIC->ip[(uint32_t)(irqn)] = (priority & 0xff); } inline async command uint32_t Cntl.getPriority(){ return((uint32_t)(NVIC->ip[(uint32_t)(irqn)] >> (8 - __NVIC_PRIO_BITS))); } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/nvic/nvichardware.h000066400000000000000000000151351207233610700241540ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Header definition for the Nested Vector Interrupt Controller. * * @author Thomas Schmid * @author Wanja Hofer */ #ifndef NVICHARDWARE_H #define NVICHARDWARE_H #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ #define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */ /** * IO definitions * * define access restrictions to peripheral registers **/ #define __I volatile const /*!< defines 'read only' permissions */ #define __O volatile /*!< defines 'write only' permissions */ #define __IO volatile /*!< defines 'read / write' permissions */ /* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */ typedef struct { volatile uint32_t iser0; // Interrupt Set Enable uint32_t reserved[31]; volatile uint32_t icer0; // Interrupt Clear-enable uint32_t reserved1[31]; volatile uint32_t ispr0; // Interrupt Set-pending uint32_t reserved2[31]; volatile uint32_t icpr0; // Interrupt Clear-pending uint32_t reserved3[31]; volatile uint32_t iabr0; // Interrupt Active Bit uint32_t reserved4[63]; volatile uint8_t ip[32]; // Interrupt Priority Registers uint32_t reserved5[696]; volatile uint32_t stir; // Software Trigger Interrupt } nvic_t; typedef union { uint32_t flat; struct { uint8_t memfaultact: 1; uint8_t busfaultact: 1; uint8_t reserved0: 1; uint8_t usgfaultact: 1; uint8_t reserved1: 3; uint8_t svcallact: 1; uint8_t monitoract: 1; uint8_t reserved2: 1; uint8_t pendsvact: 1; uint8_t systickact: 1; uint8_t usgfaultpended: 1; uint8_t memfaultpended: 1; uint8_t busfaultpended: 1; uint8_t svcallpended: 1; uint8_t memfaultena: 1; uint8_t busfaultena: 1; uint8_t usgfaultena: 1; uint16_t reserved3: 13; } __attribute__((__packed__)) bits; } nvic_shcsr_t; typedef union { uint32_t flat; struct { uint32_t reserved0 : 1; uint32_t sleeonexit : 1; uint32_t sleepdeep : 1; uint32_t reserved1 : 1; uint32_t sevonpend : 1; uint32_t reserved2 : 27; } __attribute__((__packed__)) bits; } scr_t; /* memory mapping struct for System Control Block */ typedef struct { __I uint32_t CPUID; /*!< CPU ID Base Register */ __IO uint32_t ICSR; /*!< Interrupt Control State Register */ __IO uint32_t VTOR; /*!< Vector Table Offset Register */ __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */ __IO scr_t scr; /*!< System Control Register */ __IO uint32_t CCR; /*!< Configuration Control Register */ __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */ __IO nvic_shcsr_t SHCSR; /*!< System Handler Control and State Register */ __IO uint32_t CFSR; /*!< Configurable Fault Status Register */ __IO uint32_t HFSR; /*!< Hard Fault Status Register */ __IO uint32_t DFSR; /*!< Debug Fault Status Register */ __IO uint32_t MMFAR; /*!< Mem Manage Address Register */ __IO uint32_t BFAR; /*!< Bus Fault Address Register */ __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */ __I uint32_t PFR[2]; /*!< Processor Feature Register */ __I uint32_t DFR; /*!< Debug Feature Register */ __I uint32_t ADR; /*!< Auxiliary Feature Register */ __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */ __I uint32_t ISAR[5]; /*!< ISA Feature Register */ } scb_t; /* Memory mapping of Cortex-M3 Hardware */ volatile nvic_t* NVIC = (volatile nvic_t *) 0xE000E100; // NVIC Base Address #define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ #define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ #define SCB ((scb_t*) SCB_BASE) /*!< SCB configuration struct */ #endif // SAM3UNVICHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pdc/000077500000000000000000000000001207233610700211305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pdc/HplSam3Pdc.nc000066400000000000000000000052551207233610700233570ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ interface HplSam3Pdc { /* Pointer Registers */ async command void setRxPtr(void* addr); async command void setTxPtr(void* addr); async command void setNextRxPtr(void* addr); async command void setNextTxPtr(void* addr); async command uint32_t getRxPtr(); async command uint32_t getTxPtr(); async command uint32_t getNextRxPtr(); async command uint32_t getNextTxPtr(); /* Counter Registers */ async command void setRxCounter(uint16_t counter); async command void setTxCounter(uint16_t counter); async command void setNextRxCounter(uint16_t counter); async command void setNextTxCounter(uint16_t counter); async command uint16_t getRxCounter(); async command uint16_t getTxCounter(); async command uint16_t getNextRxCounter(); async command uint16_t getNextTxCounter(); /* Enable / Disable Register */ async command void enablePdcRx(); async command void enablePdcTx(); async command void disablePdcRx(); async command void disablePdcTx(); /* Status Registers - Checks status */ async command bool rxEnabled(); async command bool txEnabled(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pdc/HplSam3PdcP.nc000066400000000000000000000137451207233610700235020ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "pdchardware.h" generic module HplSam3PdcP(uint32_t BASE_ADDR){ provides interface HplSam3Pdc as Pdc; } implementation{ uint32_t PDC_BASE_ADDR = (BASE_ADDR + 0x100); async command void Pdc.setRxPtr(void* addr){ volatile periph_rpr_t* RPR = (volatile periph_rpr_t*) (PDC_BASE_ADDR + 0x0); periph_rpr_t rpr; rpr.bits.rxptr = (uint32_t)addr; *RPR = rpr; } async command void Pdc.setTxPtr(void* addr){ volatile periph_tpr_t* TPR = (volatile periph_tpr_t*) (PDC_BASE_ADDR + 0x8); periph_tpr_t tpr; tpr.bits.txptr = (uint32_t)addr; *TPR = tpr; } async command void Pdc.setNextRxPtr(void* addr){ volatile periph_rnpr_t* RNPR = (volatile periph_rnpr_t*) (PDC_BASE_ADDR + 0x10); periph_rnpr_t rnpr; rnpr.bits.rxnptr = (uint32_t)addr; *RNPR = rnpr; } async command void Pdc.setNextTxPtr(void* addr){ volatile periph_tnpr_t* TNPR = (volatile periph_tnpr_t*) (PDC_BASE_ADDR + 0x18); periph_tnpr_t tnpr; tnpr.bits.txnptr = (uint32_t)addr; *TNPR = tnpr; } async command uint32_t Pdc.getRxPtr(){ volatile periph_rpr_t* RPR = (volatile periph_rpr_t*) (PDC_BASE_ADDR + 0x0); return RPR->bits.rxptr; } async command uint32_t Pdc.getTxPtr(){ volatile periph_tpr_t* TPR = (volatile periph_tpr_t*) (PDC_BASE_ADDR + 0x8); return TPR->bits.txptr; } async command uint32_t Pdc.getNextRxPtr(){ volatile periph_rnpr_t* RNPR = (volatile periph_rnpr_t*) (PDC_BASE_ADDR + 0x10); return RNPR->bits.rxnptr; } async command uint32_t Pdc.getNextTxPtr(){ volatile periph_tnpr_t* TNPR = (volatile periph_tnpr_t*) (PDC_BASE_ADDR + 0x18); return TNPR->bits.txnptr; } async command uint16_t Pdc.getRxCounter(){ volatile periph_rcr_t* RCR = (volatile periph_rcr_t*) (PDC_BASE_ADDR + 0x4); return RCR->bits.rxctr; } async command uint16_t Pdc.getTxCounter(){ volatile periph_tcr_t* TCR = (volatile periph_tcr_t*) (PDC_BASE_ADDR + 0xC); return TCR->bits.txctr; } async command uint16_t Pdc.getNextRxCounter(){ volatile periph_rncr_t* RNCR = (volatile periph_rncr_t*) (PDC_BASE_ADDR + 0x14); return RNCR->bits.rxnctr; } async command uint16_t Pdc.getNextTxCounter(){ volatile periph_tncr_t* TNCR = (volatile periph_tncr_t*) (PDC_BASE_ADDR + 0x1C); return TNCR->bits.txnctr; } async command void Pdc.setRxCounter(uint16_t counter){ volatile periph_rcr_t* RCR = (volatile periph_rcr_t*) (PDC_BASE_ADDR + 0x4); periph_rcr_t rcr; rcr.bits.rxctr = counter; *RCR = rcr; } async command void Pdc.setTxCounter(uint16_t counter){ volatile periph_tcr_t* TCR = (volatile periph_tcr_t*) (PDC_BASE_ADDR + 0xC); periph_tcr_t tcr; tcr.bits.txctr = counter; *TCR = tcr; } async command void Pdc.setNextRxCounter(uint16_t counter){ volatile periph_rncr_t* RNCR = (volatile periph_rncr_t*) (PDC_BASE_ADDR + 0x14); periph_rncr_t rncr; rncr.bits.rxnctr = counter; *RNCR = rncr; } async command void Pdc.setNextTxCounter(uint16_t counter){ volatile periph_tncr_t* TNCR = (volatile periph_tncr_t*) (PDC_BASE_ADDR + 0x1C); periph_tncr_t tncr; tncr.bits.txnctr = counter; *TNCR = tncr; } async command void Pdc.enablePdcRx(){ volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (PDC_BASE_ADDR + 0x20); periph_ptcr_t ptcr; ptcr.bits.rxten = 1; *PTCR = ptcr; } async command void Pdc.enablePdcTx(){ volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (PDC_BASE_ADDR + 0x20); periph_ptcr_t ptcr; ptcr.bits.txten = 1; *PTCR = ptcr; } async command void Pdc.disablePdcRx(){ volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (PDC_BASE_ADDR + 0x20); periph_ptcr_t ptcr; ptcr.bits.rxtdis = 1; *PTCR = ptcr; } async command void Pdc.disablePdcTx(){ volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (PDC_BASE_ADDR + 0x20); periph_ptcr_t ptcr; ptcr.bits.txtdis = 1; *PTCR = ptcr; } async command bool Pdc.rxEnabled(){ volatile periph_ptsr_t* PTSR = (volatile periph_ptsr_t*) (PDC_BASE_ADDR + 0x24); periph_ptsr_t ptsr = *PTSR; if(ptsr.bits.rxten){ return TRUE; }else{ return FALSE; } } async command bool Pdc.txEnabled(){ volatile periph_ptsr_t* PTSR = (volatile periph_ptsr_t*) (PDC_BASE_ADDR + 0x24); periph_ptsr_t ptsr = *PTSR; if(ptsr.bits.txten){ return TRUE; }else{ return FALSE; } } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pdc/README000066400000000000000000000007651207233610700220200ustar00rootroot00000000000000Generic PDC implementation for SAM3 @author JeongGil Ko @author Thomas Schmid The implementation is based on the preliminary specifications and the MSP430 implementations. - Each PDC supporting user interface (uart, usart, twi, pwm, etc.) should wire to the PDC component for the user interface. - Be sure to enable the peripheral clock for each peripheral's user interface before writing to the PDC registers. If the clock is not active, some registers will be inactive. tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pdc/pdchardware.h000066400000000000000000000120511207233610700235640ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * PDC register definitions. * * @author JeongGil Ko */ #ifndef _PDCHARDWARE_H #define _PDCHARDWARE_H /** * PDC Received Pointer Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 462 */ typedef union { uint32_t flat; struct { uint32_t rxptr : 32; } __attribute__((__packed__)) bits; } periph_rpr_t; /** * PDC Receive Counter Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 463 */ typedef union { uint32_t flat; struct { uint16_t rxctr : 16; uint16_t reserved0 : 16; } __attribute__((__packed__)) bits; } periph_rcr_t; /** * PDC Transmit Pointer Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 464 */ typedef union { uint32_t flat; struct { uint32_t txptr : 32; } __attribute__((__packed__)) bits; } periph_tpr_t; /** * PDC Transmit Counter Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 464 */ typedef union { uint32_t flat; struct { uint16_t txctr : 16; uint16_t reserved0 : 16; } __attribute__((__packed__)) bits; } periph_tcr_t; /** * PDC Received Next Pointer Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 465 */ typedef union { uint32_t flat; struct { uint32_t rxnptr : 32; } __attribute__((__packed__)) bits; } periph_rnpr_t; /** * PDC Receive Next Counter Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 465 */ typedef union { uint32_t flat; struct { uint16_t rxnctr : 16; uint16_t reserved0 : 16; } __attribute__((__packed__)) bits; } periph_rncr_t; /** * PDC Transmit Pointer Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 466 */ typedef union { uint32_t flat; struct { uint32_t txnptr : 32; } __attribute__((__packed__)) bits; } periph_tnpr_t; /** * PDC Transmit Next Counter Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 466 */ typedef union { uint32_t flat; struct { uint16_t txnctr : 16; uint16_t reserved0 : 16; } __attribute__((__packed__)) bits; } periph_tncr_t; /** * PDC Transfer Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 467 */ typedef union { uint32_t flat; struct { uint8_t rxten : 1; uint8_t rxtdis : 1; uint8_t reserved0 : 6; uint8_t txten : 1; uint8_t txtdis : 1; uint8_t reserved1 : 6; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } periph_ptcr_t; /** * PDC Transfer Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 468 */ typedef union { uint32_t flat; struct { uint8_t rxten : 1; uint8_t reserved0 : 7; uint8_t txten : 1; uint8_t reserved1 : 7; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } periph_ptsr_t; /** * PDC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 461 */ typedef struct pdc { volatile periph_rpr_t rpr; volatile periph_rcr_t rcr; volatile periph_tpr_t tpr; volatile periph_tcr_t tcr; volatile periph_rnpr_t rnpr; volatile periph_rncr_t rncr; volatile periph_tnpr_t tnpr; volatile periph_tncr_t tncr; volatile periph_ptcr_t ptcr; volatile periph_ptsr_t ptsr; } periph_t; #endif // _PDCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pins/000077500000000000000000000000001207233610700213335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOP.nc000066400000000000000000000075041207233610700250000ustar00rootroot00000000000000/** * "Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * This module is only used to dispatch the IRQ to the correct module. * @author Thomas Schmid */ module HplSam3GeneralIOP { provides { interface HplSam3GeneralIOPort as HplPortA; interface HplSam3GeneralIOPort as HplPortB; interface HplSam3GeneralIOPort as HplPortC; } uses { interface FunctionWrapper as PioAInterruptWrapper; interface FunctionWrapper as PioBInterruptWrapper; interface FunctionWrapper as PioCInterruptWrapper; } } implementation { __attribute__((interrupt)) void PioAIrqHandler() @C() @spontaneous() { uint32_t time = 0; call PioAInterruptWrapper.preamble(); signal HplPortA.fired(time); call PioAInterruptWrapper.postamble(); } __attribute__((interrupt)) void PioBIrqHandler() @C() @spontaneous() { uint32_t time = 0; call PioBInterruptWrapper.preamble(); signal HplPortB.fired(time); call PioBInterruptWrapper.postamble(); } __attribute__((interrupt)) void PioCIrqHandler() @C() @spontaneous() { uint32_t time = 0; call PioCInterruptWrapper.preamble(); signal HplPortC.fired(time); call PioCInterruptWrapper.postamble(); } /** * Does nothing! */ async command void HplPortA.enableInterrupt() { } async command void HplPortA.disableInterrupt() { } async command void HplPortA.enableClock() { } async command void HplPortA.disableClock() { } /** * Does nothing! */ async command void HplPortB.enableInterrupt() { } async command void HplPortB.disableInterrupt() { } async command void HplPortB.enableClock() { } async command void HplPortB.disableClock() { } /** * Does nothing! */ async command void HplPortC.enableInterrupt() { } async command void HplPortC.disableInterrupt() { } async command void HplPortC.enableClock() { } async command void HplPortC.disableClock() { } default async event void HplPortA.fired(uint32_t time) {} default async event void HplPortB.fired(uint32_t time) {} default async event void HplPortC.fired(uint32_t time) {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPin.nc000066400000000000000000000056531207233610700253320ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Wanja Hofer */ interface HplSam3GeneralIOPin { async command void enablePioControl(); /** * Disables the PIO controller from driving the pin. The connected * peripheral (if any) will do that. */ async command void disablePioControl(); async command bool isEnabledPioControl(); async command void enableMultiDrive(); async command void disableMultiDrive(); async command bool isEnabledMultiDrive(); async command void enablePullUpResistor(); async command void disablePullUpResistor(); async command bool isEnabledPullUpResistor(); async command void selectPeripheralA(); async command void selectPeripheralB(); #ifdef CHIP_SAM3_HAS_PERIPHERAL_CD async command void selectPeripheralC(); async command void selectPeripheralD(); #endif /** * Returns TRUE if peripheral A is selected, returns FALSE if * peripheral B is selected. */ async command bool isSelectedPeripheralA(); // interrupt async command void enableInterrupt(); async command void disableInterrupt(); async command bool isEnabledInterrupt(); // edge selection async command void enableEdgeDetection(); async command bool isEnabledEdgeDetection(); async command void fallingEdgeDetection(); async command bool isFallingEdgeDetection(); async command void risingEdgeDetection(); /* TODO: input, and filter functions */ } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPinP.nc000066400000000000000000000260261207233610700254470ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Pin abstraction on the SAM3. * * @author Wanja Hofer */ generic module HplSam3GeneralIOPinP(uint32_t pio_addr, uint8_t bit) { provides { interface GeneralIO as IO; interface GpioInterrupt as Interrupt; interface GpioCapture as Capture; interface HplSam3GeneralIOPin as HplPin; } uses { interface HplSam3GeneralIOPort as HplPort; } } implementation { async command bool IO.get() { if ((call IO.isInput()) == 1) { /* Read bit from Pin Data Status Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x03c)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 1); } else { /* Read bit from Output Data Status Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x038)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 1); } } async command void IO.set() { /* Set bit in Set Output Data Register */ *((volatile uint32_t *) (pio_addr + 0x030)) = (1 << bit); } async command void IO.clr() { /* Set bit in Clear Output Data Register */ *((volatile uint32_t *) (pio_addr + 0x034)) = (1 << bit); } async command void IO.toggle() { if ((call IO.get()) == 1) { call IO.clr(); } else { call IO.set(); } } async command void IO.makeInput() { /* Set bit in Output Disable Register */ *((volatile uint32_t *) (pio_addr + 0x014)) = (1 << bit); call HplPort.enableClock(); } async command void IO.makeOutput() { /* Set bit in Output Enable Register */ *((volatile uint32_t *) (pio_addr + 0x010)) = (1 << bit); // we don't need the clock in output mode call HplPort.disableClock(); } async command bool IO.isOutput() { /* Read bit from Output Status Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x018)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 1); } async command bool IO.isInput() { return (! (call IO.isOutput())); } async command void HplPin.enablePioControl() { /* Set bit in PIO Enable Register */ *((volatile uint32_t *) (pio_addr + 0x000)) = (1 << bit); } async command void HplPin.disablePioControl() { /* Set bit in PIO Disable Register */ *((volatile uint32_t *) (pio_addr + 0x004)) = (1 << bit); } async command bool HplPin.isEnabledPioControl() { /* Read bit from PIO Status Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x008)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 1); } async command void HplPin.enableMultiDrive() { /* Set bit in Multi-Driver Enable Register */ *((volatile uint32_t *) (pio_addr + 0x050)) = (1 << bit); } async command void HplPin.disableMultiDrive() { /* Set bit in Multi-Driver Disable Register */ *((volatile uint32_t *) (pio_addr + 0x054)) = (1 << bit); } async command bool HplPin.isEnabledMultiDrive() { /* Read bit from Multi-Driver Status Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x058)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 1); } async command void HplPin.enablePullUpResistor() { /* Set bit in Pull-Up Enable Register */ *((volatile uint32_t *) (pio_addr + 0x064)) = (1 << bit); } async command void HplPin.disablePullUpResistor() { /* Set bit in Pull-Up Disable Register */ *((volatile uint32_t *) (pio_addr + 0x060)) = (1 << bit); } async command bool HplPin.isEnabledPullUpResistor() { /* Read bit from Pull-Up Status Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x068)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 0); } async command void HplPin.selectPeripheralA() { /* Read in Peripheral AB Select Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070)); /* Clear bit */ currentport &= ~ (1 << bit); /* Write back to register */ *((volatile uint32_t *) (pio_addr + 0x070)) = currentport; #ifdef CHIP_SAM3_HAS_PERIPHERAL_CD currentport = *((volatile uint32_t *) (pio_addr + 0x074)); currentport &= ~ (1 << bit); *((volatile uint32_t *) (pio_addr + 0x074)) = currentport; #endif } async command void HplPin.selectPeripheralB() { /* Read in Peripheral AB Select Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070)); /* Set bit */ currentport |= (1 << bit); /* Write back to register */ *((volatile uint32_t *) (pio_addr + 0x070)) = currentport; #ifdef CHIP_SAM3_HAS_PERIPHERAL_CD currentport = *((volatile uint32_t *) (pio_addr + 0x074)); /* clear bit */ currentport &= ~(1 << bit); /* Write back to register */ *((volatile uint32_t *) (pio_addr + 0x074)) = currentport; #endif } #ifdef CHIP_SAM3_HAS_PERIPHERAL_CD async command void HplPin.selectPeripheralC() { /* Read in Peripheral AB Select Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070)); /* clear bit */ currentport &= ~(1 << bit); /* Write back to register */ *((volatile uint32_t *) (pio_addr + 0x070)) = currentport; currentport = *((volatile uint32_t *) (pio_addr + 0x074)); /* set bit */ currentport |= (1 << bit); /* Write back to register */ *((volatile uint32_t *) (pio_addr + 0x074)) = currentport; } async command void HplPin.selectPeripheralD() { /* Read in Peripheral AB Select Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070)); /* set bit */ currentport |= (1 << bit); /* Write back to register */ *((volatile uint32_t *) (pio_addr + 0x070)) = currentport; currentport = *((volatile uint32_t *) (pio_addr + 0x074)); /* set bit */ currentport |= (1 << bit); /* Write back to register */ *((volatile uint32_t *) (pio_addr + 0x074)) = currentport; } #endif async command bool HplPin.isSelectedPeripheralA() { /* Read bit from Peripheral AB Select Register */ uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; #ifdef CHIP_SAM3_HAS_PERIPHERAL_CD uint32_t currentport2 = *((volatile uint32_t *) (pio_addr + 0x074)); uint32_t currentpin2 = (currentport2 & (1 << bit)) >> bit; return (((currentpin & 1) == 0) && (currentpin2 & 1) == 0); #else return ((currentpin & 1) == 0); #endif } // interrupt async command void HplPin.enableInterrupt() { *((volatile uint32_t *) (pio_addr + 0x040)) = 1 << bit; call HplPort.enableInterrupt(); } async command void HplPin.disableInterrupt() { *((volatile uint32_t *) (pio_addr + 0x044)) = 1 << bit; call HplPort.disableInterrupt(); } async command bool HplPin.isEnabledInterrupt() { uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x048)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 1); } // edge selection async command void HplPin.enableEdgeDetection() { *((volatile uint32_t *) (pio_addr + 0x0C0)) = 1 << bit; // for precaution, reset additional interrupt modes register // so that we can do just edge detection (rising and falling) *((volatile uint32_t *) (pio_addr + 0x0B4)) = 1 << bit; } async command bool HplPin.isEnabledEdgeDetection() { uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x0C8)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 0); } async command void HplPin.fallingEdgeDetection() { // set the bit in falling edge register *((volatile uint32_t *) (pio_addr + 0x0D0)) = 1 << bit; // enable additional interrupt modes *((volatile uint32_t *) (pio_addr + 0x0B0)) = 1 << bit; } async command bool HplPin.isFallingEdgeDetection() { uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x0D8)); uint32_t currentpin = (currentport & (1 << bit)) >> bit; return ((currentpin & 1) == 0); } async command void HplPin.risingEdgeDetection() { // set the bit in the rising edge detection *((volatile uint32_t *) (pio_addr + 0x0D4)) = 1 << bit; // enable additional interrupt modes *((volatile uint32_t *) (pio_addr + 0x0B0)) = 1 << bit; } async event void HplPort.fired(uint32_t time) { signal Interrupt.fired(); signal Capture.captured((uint16_t)time); } async command error_t Interrupt.disable() { call HplPin.disableInterrupt(); return SUCCESS; } async command error_t Interrupt.enableFallingEdge() { call HplPin.enablePioControl(); call HplPin.enableEdgeDetection(); call HplPin.fallingEdgeDetection(); call HplPin.enableInterrupt(); return SUCCESS; } async command error_t Interrupt.enableRisingEdge() { call HplPin.enablePioControl(); call HplPin.enableEdgeDetection(); call HplPin.risingEdgeDetection(); call HplPin.enableInterrupt(); return SUCCESS; } async command error_t Capture.captureRisingEdge() { return call Interrupt.enableRisingEdge(); } async command error_t Capture.captureFallingEdge() { return call Interrupt.enableFallingEdge(); } async command void Capture.disable() { call Interrupt.disable(); } default async event void Interrupt.fired() {} default async event void Capture.captured(uint16_t time) {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPioC.nc000066400000000000000000000305511207233610700254310ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Abstraction of a PIO controller on the SAM3. Has 32 pins. * * @author wanja@cs.fau.de */ generic configuration HplSam3GeneralIOPioC(uint32_t pio_addr) { provides { interface GeneralIO as Pin0; interface GeneralIO as Pin1; interface GeneralIO as Pin2; interface GeneralIO as Pin3; interface GeneralIO as Pin4; interface GeneralIO as Pin5; interface GeneralIO as Pin6; interface GeneralIO as Pin7; interface GeneralIO as Pin8; interface GeneralIO as Pin9; interface GeneralIO as Pin10; interface GeneralIO as Pin11; interface GeneralIO as Pin12; interface GeneralIO as Pin13; interface GeneralIO as Pin14; interface GeneralIO as Pin15; interface GeneralIO as Pin16; interface GeneralIO as Pin17; interface GeneralIO as Pin18; interface GeneralIO as Pin19; interface GeneralIO as Pin20; interface GeneralIO as Pin21; interface GeneralIO as Pin22; interface GeneralIO as Pin23; interface GeneralIO as Pin24; interface GeneralIO as Pin25; interface GeneralIO as Pin26; interface GeneralIO as Pin27; interface GeneralIO as Pin28; interface GeneralIO as Pin29; interface GeneralIO as Pin30; interface GeneralIO as Pin31; interface HplSam3GeneralIOPin as HplPin0; interface HplSam3GeneralIOPin as HplPin1; interface HplSam3GeneralIOPin as HplPin2; interface HplSam3GeneralIOPin as HplPin3; interface HplSam3GeneralIOPin as HplPin4; interface HplSam3GeneralIOPin as HplPin5; interface HplSam3GeneralIOPin as HplPin6; interface HplSam3GeneralIOPin as HplPin7; interface HplSam3GeneralIOPin as HplPin8; interface HplSam3GeneralIOPin as HplPin9; interface HplSam3GeneralIOPin as HplPin10; interface HplSam3GeneralIOPin as HplPin11; interface HplSam3GeneralIOPin as HplPin12; interface HplSam3GeneralIOPin as HplPin13; interface HplSam3GeneralIOPin as HplPin14; interface HplSam3GeneralIOPin as HplPin15; interface HplSam3GeneralIOPin as HplPin16; interface HplSam3GeneralIOPin as HplPin17; interface HplSam3GeneralIOPin as HplPin18; interface HplSam3GeneralIOPin as HplPin19; interface HplSam3GeneralIOPin as HplPin20; interface HplSam3GeneralIOPin as HplPin21; interface HplSam3GeneralIOPin as HplPin22; interface HplSam3GeneralIOPin as HplPin23; interface HplSam3GeneralIOPin as HplPin24; interface HplSam3GeneralIOPin as HplPin25; interface HplSam3GeneralIOPin as HplPin26; interface HplSam3GeneralIOPin as HplPin27; interface HplSam3GeneralIOPin as HplPin28; interface HplSam3GeneralIOPin as HplPin29; interface HplSam3GeneralIOPin as HplPin30; interface HplSam3GeneralIOPin as HplPin31; interface GpioInterrupt as InterruptPin0; interface GpioInterrupt as InterruptPin1; interface GpioInterrupt as InterruptPin2; interface GpioInterrupt as InterruptPin3; interface GpioInterrupt as InterruptPin4; interface GpioInterrupt as InterruptPin5; interface GpioInterrupt as InterruptPin6; interface GpioInterrupt as InterruptPin7; interface GpioInterrupt as InterruptPin8; interface GpioInterrupt as InterruptPin9; interface GpioInterrupt as InterruptPin10; interface GpioInterrupt as InterruptPin11; interface GpioInterrupt as InterruptPin12; interface GpioInterrupt as InterruptPin13; interface GpioInterrupt as InterruptPin14; interface GpioInterrupt as InterruptPin15; interface GpioInterrupt as InterruptPin16; interface GpioInterrupt as InterruptPin17; interface GpioInterrupt as InterruptPin18; interface GpioInterrupt as InterruptPin19; interface GpioInterrupt as InterruptPin20; interface GpioInterrupt as InterruptPin21; interface GpioInterrupt as InterruptPin22; interface GpioInterrupt as InterruptPin23; interface GpioInterrupt as InterruptPin24; interface GpioInterrupt as InterruptPin25; interface GpioInterrupt as InterruptPin26; interface GpioInterrupt as InterruptPin27; interface GpioInterrupt as InterruptPin28; interface GpioInterrupt as InterruptPin29; interface GpioInterrupt as InterruptPin30; interface GpioInterrupt as InterruptPin31; interface GpioCapture as CapturePin0; interface GpioCapture as CapturePin1; interface GpioCapture as CapturePin2; interface GpioCapture as CapturePin3; interface GpioCapture as CapturePin4; interface GpioCapture as CapturePin5; interface GpioCapture as CapturePin6; interface GpioCapture as CapturePin7; interface GpioCapture as CapturePin8; interface GpioCapture as CapturePin9; interface GpioCapture as CapturePin10; interface GpioCapture as CapturePin11; interface GpioCapture as CapturePin12; interface GpioCapture as CapturePin13; interface GpioCapture as CapturePin14; interface GpioCapture as CapturePin15; interface GpioCapture as CapturePin16; interface GpioCapture as CapturePin17; interface GpioCapture as CapturePin18; interface GpioCapture as CapturePin19; interface GpioCapture as CapturePin20; interface GpioCapture as CapturePin21; interface GpioCapture as CapturePin22; interface GpioCapture as CapturePin23; interface GpioCapture as CapturePin24; interface GpioCapture as CapturePin25; interface GpioCapture as CapturePin26; interface GpioCapture as CapturePin27; interface GpioCapture as CapturePin28; interface GpioCapture as CapturePin29; interface GpioCapture as CapturePin30; interface GpioCapture as CapturePin31; } uses { interface HplSam3GeneralIOPort as HplPort; interface HplNVICInterruptCntl as PIOIrqControl; interface HplSam3PeripheralClockCntl as PIOClockControl; } } implementation { components new HplSam3GeneralIOPinP(pio_addr, 0) as Bit0, new HplSam3GeneralIOPinP(pio_addr, 1) as Bit1, new HplSam3GeneralIOPinP(pio_addr, 2) as Bit2, new HplSam3GeneralIOPinP(pio_addr, 3) as Bit3, new HplSam3GeneralIOPinP(pio_addr, 4) as Bit4, new HplSam3GeneralIOPinP(pio_addr, 5) as Bit5, new HplSam3GeneralIOPinP(pio_addr, 6) as Bit6, new HplSam3GeneralIOPinP(pio_addr, 7) as Bit7, new HplSam3GeneralIOPinP(pio_addr, 8) as Bit8, new HplSam3GeneralIOPinP(pio_addr, 9) as Bit9, new HplSam3GeneralIOPinP(pio_addr, 10) as Bit10, new HplSam3GeneralIOPinP(pio_addr, 11) as Bit11, new HplSam3GeneralIOPinP(pio_addr, 12) as Bit12, new HplSam3GeneralIOPinP(pio_addr, 13) as Bit13, new HplSam3GeneralIOPinP(pio_addr, 14) as Bit14, new HplSam3GeneralIOPinP(pio_addr, 15) as Bit15, new HplSam3GeneralIOPinP(pio_addr, 16) as Bit16, new HplSam3GeneralIOPinP(pio_addr, 17) as Bit17, new HplSam3GeneralIOPinP(pio_addr, 18) as Bit18, new HplSam3GeneralIOPinP(pio_addr, 19) as Bit19, new HplSam3GeneralIOPinP(pio_addr, 20) as Bit20, new HplSam3GeneralIOPinP(pio_addr, 21) as Bit21, new HplSam3GeneralIOPinP(pio_addr, 22) as Bit22, new HplSam3GeneralIOPinP(pio_addr, 23) as Bit23, new HplSam3GeneralIOPinP(pio_addr, 24) as Bit24, new HplSam3GeneralIOPinP(pio_addr, 25) as Bit25, new HplSam3GeneralIOPinP(pio_addr, 26) as Bit26, new HplSam3GeneralIOPinP(pio_addr, 27) as Bit27, new HplSam3GeneralIOPinP(pio_addr, 28) as Bit28, new HplSam3GeneralIOPinP(pio_addr, 29) as Bit29, new HplSam3GeneralIOPinP(pio_addr, 30) as Bit30, new HplSam3GeneralIOPinP(pio_addr, 31) as Bit31; Pin0 = Bit0; Pin1 = Bit1; Pin2 = Bit2; Pin3 = Bit3; Pin4 = Bit4; Pin5 = Bit5; Pin6 = Bit6; Pin7 = Bit7; Pin8 = Bit8; Pin9 = Bit9; Pin10 = Bit10; Pin11 = Bit11; Pin12 = Bit12; Pin13 = Bit13; Pin14 = Bit14; Pin15 = Bit15; Pin16 = Bit16; Pin17 = Bit17; Pin18 = Bit18; Pin19 = Bit19; Pin20 = Bit20; Pin21 = Bit21; Pin22 = Bit22; Pin23 = Bit23; Pin24 = Bit24; Pin25 = Bit25; Pin26 = Bit26; Pin27 = Bit27; Pin28 = Bit28; Pin29 = Bit29; Pin30 = Bit30; Pin31 = Bit31; HplPin0 = Bit0; HplPin1 = Bit1; HplPin2 = Bit2; HplPin3 = Bit3; HplPin4 = Bit4; HplPin5 = Bit5; HplPin6 = Bit6; HplPin7 = Bit7; HplPin8 = Bit8; HplPin9 = Bit9; HplPin10 = Bit10; HplPin11 = Bit11; HplPin12 = Bit12; HplPin13 = Bit13; HplPin14 = Bit14; HplPin15 = Bit15; HplPin16 = Bit16; HplPin17 = Bit17; HplPin18 = Bit18; HplPin19 = Bit19; HplPin20 = Bit20; HplPin21 = Bit21; HplPin22 = Bit22; HplPin23 = Bit23; HplPin24 = Bit24; HplPin25 = Bit25; HplPin26 = Bit26; HplPin27 = Bit27; HplPin28 = Bit28; HplPin29 = Bit29; HplPin30 = Bit30; HplPin31 = Bit31; InterruptPin0 = Bit0; InterruptPin1 = Bit1; InterruptPin2 = Bit2; InterruptPin3 = Bit3; InterruptPin4 = Bit4; InterruptPin5 = Bit5; InterruptPin6 = Bit6; InterruptPin7 = Bit7; InterruptPin8 = Bit8; InterruptPin9 = Bit9; InterruptPin10 = Bit10; InterruptPin11 = Bit11; InterruptPin12 = Bit12; InterruptPin13 = Bit13; InterruptPin14 = Bit14; InterruptPin15 = Bit15; InterruptPin16 = Bit16; InterruptPin17 = Bit17; InterruptPin18 = Bit18; InterruptPin19 = Bit19; InterruptPin20 = Bit20; InterruptPin21 = Bit21; InterruptPin22 = Bit22; InterruptPin23 = Bit23; InterruptPin24 = Bit24; InterruptPin25 = Bit25; InterruptPin26 = Bit26; InterruptPin27 = Bit27; InterruptPin28 = Bit28; InterruptPin29 = Bit29; InterruptPin30 = Bit30; InterruptPin31 = Bit31; CapturePin0 = Bit0; CapturePin1 = Bit1; CapturePin2 = Bit2; CapturePin3 = Bit3; CapturePin4 = Bit4; CapturePin5 = Bit5; CapturePin6 = Bit6; CapturePin7 = Bit7; CapturePin8 = Bit8; CapturePin9 = Bit9; CapturePin10 = Bit10; CapturePin11 = Bit11; CapturePin12 = Bit12; CapturePin13 = Bit13; CapturePin14 = Bit14; CapturePin15 = Bit15; CapturePin16 = Bit16; CapturePin17 = Bit17; CapturePin18 = Bit18; CapturePin19 = Bit19; CapturePin20 = Bit20; CapturePin21 = Bit21; CapturePin22 = Bit22; CapturePin23 = Bit23; CapturePin24 = Bit24; CapturePin25 = Bit25; CapturePin26 = Bit26; CapturePin27 = Bit27; CapturePin28 = Bit28; CapturePin29 = Bit29; CapturePin30 = Bit30; CapturePin31 = Bit31; components new HplSam3GeneralIOPortP(pio_addr) as Port; HplPort = Port.HplPort; PIOIrqControl = Port.PIOIrqControl; PIOClockControl = Port.PIOClockControl; Bit0.HplPort -> Port.Bits[0]; Bit1.HplPort -> Port.Bits[1]; Bit2.HplPort -> Port.Bits[2]; Bit3.HplPort -> Port.Bits[3]; Bit4.HplPort -> Port.Bits[4]; Bit5.HplPort -> Port.Bits[5]; Bit6.HplPort -> Port.Bits[6]; Bit7.HplPort -> Port.Bits[7]; Bit8.HplPort -> Port.Bits[8]; Bit9.HplPort -> Port.Bits[9]; Bit10.HplPort -> Port.Bits[10]; Bit11.HplPort -> Port.Bits[11]; Bit12.HplPort -> Port.Bits[12]; Bit13.HplPort -> Port.Bits[13]; Bit14.HplPort -> Port.Bits[14]; Bit15.HplPort -> Port.Bits[15]; Bit16.HplPort -> Port.Bits[16]; Bit17.HplPort -> Port.Bits[17]; Bit18.HplPort -> Port.Bits[18]; Bit19.HplPort -> Port.Bits[19]; Bit20.HplPort -> Port.Bits[20]; Bit21.HplPort -> Port.Bits[21]; Bit22.HplPort -> Port.Bits[22]; Bit23.HplPort -> Port.Bits[23]; Bit24.HplPort -> Port.Bits[24]; Bit25.HplPort -> Port.Bits[25]; Bit26.HplPort -> Port.Bits[26]; Bit27.HplPort -> Port.Bits[27]; Bit28.HplPort -> Port.Bits[28]; Bit29.HplPort -> Port.Bits[29]; Bit30.HplPort -> Port.Bits[30]; Bit31.HplPort -> Port.Bits[31]; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPort.nc000066400000000000000000000040751207233610700255250ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ interface HplSam3GeneralIOPort { // signals that the interrupt for a specific pin happened async event void fired(uint32_t time); // enables the interrupt on this port async command void enableInterrupt(); // disable the interrupt on this port async command void disableInterrupt(); // enables the peripheral clock async command void enableClock(); // disables the clock if it is not used by anyone async command void disableClock(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPortP.nc000066400000000000000000000107171207233610700256450ustar00rootroot00000000000000/** * "Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ uint32_t clocks = 0; generic module HplSam3GeneralIOPortP(uint32_t pio_addr) { provides { interface HplSam3GeneralIOPort as Bits [uint8_t bit]; } uses { interface HplSam3GeneralIOPort as HplPort; interface HplNVICInterruptCntl as PIOIrqControl; interface HplSam3PeripheralClockCntl as PIOClockControl; } } implementation { uint32_t isr = 0; bool isPending(uint8_t bit) { uint32_t currentpin; // make sure to not loose state for other bits! atomic { isr |= *((volatile uint32_t *) (pio_addr + 0x04C)); currentpin = (isr & (1 << bit)) >> bit; // remove bit isr &= ~( 1 << bit); } return ((currentpin & 1) == 1); } async event void HplPort.fired(uint32_t time) { uint8_t i; uint32_t isrMasked; atomic { // make sure to not loose state for other bits! isr |= *((volatile uint32_t *) (pio_addr + 0x04C)); // only look at pins where the interrupt is enabled isrMasked = isr & *((volatile uint32_t *) (pio_addr + 0x048)); // find out which port for(i=0; i<32; i++){ if(isrMasked & (1 << i)) { signal Bits.fired[i](time); } } // remove signaled bits from isr isr &= ~isrMasked; } } async command void Bits.enableInterrupt[uint8_t bit]() { // Enable the PIO clock if not already enabled (state checked internally) call Bits.enableClock[bit](); // check if the NVIC is already enabled if(call PIOIrqControl.getActive() == 0) { call PIOIrqControl.configure(IRQ_PRIO_PIO); call PIOIrqControl.enable(); } } async command void Bits.disableInterrupt[uint8_t bit]() { // Disable the PIO clock if no one else needs it (state checked internally) call Bits.disableClock[bit](); // if all the interrupts are disabled, disable the NVIC. if(*((volatile uint32_t *) (pio_addr + 0x048)) == 0) { call PIOIrqControl.disable(); } } async command void Bits.enableClock[uint8_t bit]() { atomic { // only enable the peripheral clock if no one else has enabled it. if(!clocks) call PIOClockControl.enable(); clocks |= (1<pcer; pcer.flat |= ( 1 << pid ); ((volatile pmc_pc_t *) (pio_addr))->pcer = pcer; } async command void Cntl.disable() { pmc_pcdr_t pcdr = ((volatile pmc_pc_t *) (pio_addr))->pcdr; pcdr.flat |= ( 1 << pid ); ((volatile pmc_pc_t *) (pio_addr))->pcdr = pcdr; } async command bool Cntl.status() { if(((volatile pmc_pc_t *) (pio_addr))->pcsr.flat & (1 << pid)) return TRUE; else return FALSE; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/pmc/pmchardware.h000066400000000000000000000400141207233610700236060ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Power Management Controller register definitions. * * @author Thomas Schmid */ #ifndef PMCHARDWARE_H #define PMCHARDWARE_H /** * PMC System Clock Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 482 * 0: no effect * 1: enable clock */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 8; uint8_t pck0 : 1; // enables clock output 0 uint8_t pck1 : 1; // enables clock output 1 uint8_t pck2 : 1; // enables clock output 2 uint8_t reserved1 : 5; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } pmc_scer_t; /** * PMC System Clock Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 483 * 0: no effect * 1: disable clock */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 8; uint8_t pck0 : 1; // disables clock output 0 uint8_t pck1 : 1; // disables clock output 1 uint8_t pck2 : 1; // disables clock output 2 uint8_t reserved1 : 5; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } pmc_scdr_t; /** * PMC System Clock Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 484 * 0: clock disabled * 1: clock enabled */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 8; uint8_t pck0 : 1; // status of clock output 0 uint8_t pck1 : 1; // status of clock output 1 uint8_t pck2 : 1; // status of clock output 2 uint8_t reserved1 : 5; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } pmc_scsr_t; /** * PMC Clock Generator Main Oscillator Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 489 * * Note: You have to write 'key' together with every other operation, or else * the write gets aborted. */ typedef union { uint32_t flat; struct { uint8_t moscxten : 1; // main crtystal oscillator enable uint8_t moscxtby : 1; // main crystal oscillator bypass uint8_t waitmode : 1; // wait mode command uint8_t moscrcen : 1; // main on-chip rc oscillator enable uint8_t moscrcf : 3; // main on-chip rc oscillator frequency selection (0: 4MHz, 1: 8MHz, 2: 12MHz, 3: reserved) uint8_t reserved0 : 1; uint8_t moscxtst : 8; // main crystal oscillator start-up time (in slow clock cycles times 8 uint8_t key : 8; // should be written at value 0x37 uint8_t moscsel : 1; // main oscillator selection (0: on-chip RC, 1: main crystal) uint8_t cfden : 1; // clock failure detector enable uint8_t reserved1 : 6; } __attribute__((__packed__)) bits; } pmc_mor_t; #define PMC_MOR_KEY 0x37 /** * PMC Clock Generator Main Clock Frequency Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 490 * read-only */ typedef union { uint32_t flat; struct { uint16_t mainf : 16; // gives the number of main clock cycles within 16 slow clock periods uint8_t mainfrdy : 1; // main clock ready uint16_t reserved0 : 15; } __attribute__((__packed__)) bits; } pmc_mcfr_t; /** * PMC Clock Generator PLLA Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 491 * Note: bit 29 must always be set to 1 when writing this register! */ typedef union { uint32_t flat; struct { uint32_t diva : 8; // divider uint32_t pllacount : 6; // plla counter, specifies the number of slow clock cycles times 8 uint32_t reserved0 : 2; // was start mode. no longer exists! uint32_t mula : 11; // PLLA Multiplier uint32_t reserved1 : 2; uint32_t bit29 : 1; // ALWAYS SET THIS TO 1!!!!!! uint32_t reserved2 : 2; } __attribute__((__packed__)) bits; } pmc_pllar_t; #define PMC_PLLAR_STMODE_FAST_STARTUP 0 #define PMC_PLLAR_STMODE_NORMAL_STARTUP 2 /** * PMC Master Clock Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 493 */ typedef union { uint32_t flat; struct { uint8_t css : 2; // master clock source select uint8_t reserved0 : 2; uint8_t pres : 3; // processor clock prescaler uint8_t reserved1 : 1; uint8_t reserved2 : 5; uint8_t uplldiv : 1; // upll clock divider by 1 or 2 uint8_t reserved3 : 2; uint16_t reserved4 : 16; } __attribute__((__packed__)) bits; } pmc_mckr_t; #define PMC_MCKR_CSS_SLOW_CLOCK 0 #define PMC_MCKR_CSS_MAIN_CLOCK 1 #define PMC_MCKR_CSS_PLLA_CLOCK 2 #define PMC_MCKR_CSS_UPLL_CLOCK 3 #define PMC_MCKR_PRES_DIV_1 0 #define PMC_MCKR_PRES_DIV_2 1 #define PMC_MCKR_PRES_DIV_4 2 #define PMC_MCKR_PRES_DIV_8 3 #define PMC_MCKR_PRES_DIV_16 4 #define PMC_MCKR_PRES_DIV_32 5 #define PMC_MCKR_PRES_DIV_64 6 #define PMC_MCKR_PRES_DIV_3 7 #define PMC_MCKR_UPLLDIV_1 0 #define PMC_MCKR_UPLLDIV_2 1 /** * PMC Programmable Clock Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 494 */ typedef union { uint32_t flat; struct { uint8_t css : 3; // programmable clock source selection uint8_t reserved0 : 1; uint8_t pres : 3; // programmable clock prescaler uint8_t reserved1 : 1; uint8_t reserved2 : 8; uint16_t reserved3: 16; } __attribute__((__packed__)) bits; } pmc_pck_t; #define PMC_PCKX_CSS_SLOW_CLOCK 0 #define PMC_PCKX_CSS_MAIN_CLOCK 1 #define PMC_PCKX_CSS_PLLA_CLOCK 2 #define PMC_PCKX_CSS_UPLL_CLOCK 3 #define PMC_PCKX_CSS_MASTER_CLOCK 4 #define PMC_PCKX_PRES_DIV_1 0 #define PMC_PCKX_PRES_DIV_2 1 #define PMC_PCKX_PRES_DIV_4 2 #define PMC_PCKX_PRES_DIV_8 3 #define PMC_PCKX_PRES_DIV_16 4 #define PMC_PCKX_PRES_DIV_32 5 #define PMC_PCKX_PRES_DIV_64 6 /** * PMC Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 495 */ typedef union { uint32_t flat; struct { uint8_t moscxts : 1; // main crystal oscillator status interrupt enable uint8_t locka : 1; // pll a lock interrupt enable uint8_t reserved0 : 1; uint8_t mckrdy : 1; // master clock ready interrupt enable uint8_t reserved1 : 2; uint8_t locku : 1; // utmi pll lock interrupt enable uint8_t reserved2 : 1; uint8_t pckrdy0 : 1; // programmable clock 0 ready interrupt enable uint8_t pckrdy1 : 1; // programmable clock 1 ready interrupt enable uint8_t pckrdy2 : 1; // programmable clock 2 ready interrupt enable uint8_t reserved3 : 5; uint8_t moscsels : 1; // main oscillator selection status interrupt enable uint8_t moscrcs : 1; // main on-chip rc status interrupt enable uint8_t cfdev : 1; // clock failure detector event interrupt enable uint16_t reserved4 : 13; } __attribute__((__packed__)) bits; } pmc_ier_t; /** * PMC Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 496 */ typedef union { uint32_t flat; struct { uint8_t moscxts : 1; // main crystal oscillator status interrupt disable uint8_t locka : 1; // pll a lock interrupt disable uint8_t reserved0 : 1; uint8_t mckrdy : 1; // master clock ready interrupt disable uint8_t reserved1 : 2; uint8_t locku : 1; // utmi pll lock interrupt disable uint8_t reserved2 : 1; uint8_t pckrdy0 : 1; // programmable clock 0 ready interrupt disable uint8_t pckrdy1 : 1; // programmable clock 1 ready interrupt disable uint8_t pckrdy2 : 1; // programmable clock 2 ready interrupt disable uint8_t reserved3 : 5; uint8_t moscsels : 1; // main oscillator selection status interrupt disable uint8_t moscrcs : 1; // main on-chip rc status interrupt disable uint8_t cfdev : 1; // clock failure detector event interrupt disable uint16_t reserved4 : 13; } __attribute__((__packed__)) bits; } pmc_idr_t; /** * PMC Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 497 */ typedef union { uint32_t flat; struct { uint8_t moscxts : 1; // main crystal oscillator stabilized uint8_t locka : 1; // pll a locked uint8_t reserved0 : 1; uint8_t mckrdy : 1; // master clock ready uint8_t reserved1 : 2; uint8_t locku : 1; // utmi pll locked uint8_t oscsels : 1; // Slow clock oscillator selection (0: rc osc, 1: external clock) uint8_t pckrdy0 : 1; // programmable clock 0 ready uint8_t pckrdy1 : 1; // programmable clock 1 ready uint8_t pckrdy2 : 1; // programmable clock 2 ready uint8_t reserved2 : 5; uint8_t moscsels : 1; // main oscillator selection (0: done, 1: in progress uint8_t moscrcs : 1; // main on-chip rc stabilized uint8_t cfdev : 1; // clock failure detector event since last read uint8_t cfds : 1; // clock failure detected uint8_t fos : 1; // clock failure detector fault output status uint16_t reserved3 : 11; } __attribute__((__packed__)) bits; } pmc_sr_t; /** * PMC Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 499 */ typedef union { uint32_t flat; struct { uint8_t moscxts : 1; // main crystal oscillator status interrupt mask uint8_t locka : 1; // pll a lock interrupt mask uint8_t reserved0 : 1; uint8_t mckrdy : 1; // master clock ready interrupt mask uint8_t reserved1 : 2; uint8_t locku : 1; // utmi pll lock interrupt mask uint8_t reserved2 : 1; uint8_t pckrdy0 : 1; // programmable clock 0 ready interrupt mask uint8_t pckrdy1 : 1; // programmable clock 1 ready interrupt mask uint8_t pckrdy2 : 1; // programmable clock 2 ready interrupt mask uint8_t reserved3 : 5; uint8_t moscsels : 1; // main oscillator selection status interrupt mask uint8_t moscrcs : 1; // main on-chip rc status interrupt mask uint8_t cfdev : 1; // clock failure detector event interrupt mask uint16_t reserved4 : 13; } __attribute__((__packed__)) bits; } pmc_imr_t; /** * PMC Fast Startup Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 500 */ typedef union { uint32_t flat; struct { uint8_t fstt0 : 1; // fast startup input enable 0 uint8_t fstt1 : 1; // fast startup input enable 1 uint8_t fstt2 : 1; // fast startup input enable 2 uint8_t fstt3 : 1; // fast startup input enable 3 uint8_t fstt4 : 1; // fast startup input enable 4 uint8_t fstt5 : 1; // fast startup input enable 5 uint8_t fstt6 : 1; // fast startup input enable 6 uint8_t fstt7 : 1; // fast startup input enable 7 uint8_t fstt8 : 1; // fast startup input enable 8 uint8_t fstt9 : 1; // fast startup input enable 9 uint8_t fstt10 : 1; // fast startup input enable 10 uint8_t fstt11 : 1; // fast startup input enable 11 uint8_t fstt12 : 1; // fast startup input enable 12 uint8_t fstt13 : 1; // fast startup input enable 13 uint8_t fstt14 : 1; // fast startup input enable 14 uint8_t fstt15 : 1; // fast startup input enable 15 uint8_t rttal : 1; // RTT alarm enable uint8_t rtcal : 1; // RTC alarm enable uint8_t usbal : 1; // USB alarm enable uint8_t reserved0 : 1; uint8_t lpm : 1; // low power mode (0: wfi or wfe makes processor go into idle mode, 1: wfe makes processor go into wait mode) uint16_t reserved1 : 11; } __attribute__((__packed__)) bits; } pmc_fsmr_t; /** * PMC Fast Startup Polarity Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 501 */ typedef union { uint32_t flat; struct { uint8_t fstt0 : 1; // fast startup input 0 uint8_t fstt1 : 1; // fast startup input 1 uint8_t fstt2 : 1; // fast startup input 2 uint8_t fstt3 : 1; // fast startup input 3 uint8_t fstt4 : 1; // fast startup input 4 uint8_t fstt5 : 1; // fast startup input 5 uint8_t fstt6 : 1; // fast startup input 6 uint8_t fstt7 : 1; // fast startup input 7 uint8_t fstt8 : 1; // fast startup input 8 uint8_t fstt9 : 1; // fast startup input 9 uint8_t fstt10 : 1; // fast startup input 10 uint8_t fstt11 : 1; // fast startup input 11 uint8_t fstt12 : 1; // fast startup input 12 uint8_t fstt13 : 1; // fast startup input 13 uint8_t fstt14 : 1; // fast startup input 14 uint8_t fstt15 : 1; // fast startup input 15 uint16_t reserved0 : 16; } __attribute__((__packed__)) bits; } pmc_fspr_t; /** * PMC Fault Output Clear Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 502 */ typedef union { uint32_t flat; struct { uint8_t foclr : 1; // fault output clear uint32_t reserved0 : 31; } __attribute__((__packed__)) bits; } pmc_focr_t; /** * PMC Write Protect Mode Register. */ typedef union { uint32_t flat; struct { uint32_t wpen : 1; // Write Protect Enable uint32_t reserved0 : 7; uint32_t wpkey : 24; // Write Protect Key } __attribute__((__packed__)) bits; } pmc_wpmr_t; #define PMC_WPMR_WPKEY 0x504D43 /** * PMC Write Protect Status Register. */ typedef union { uint32_t flat; struct { uint32_t wpvs : 1; // Write Protect Violation Status uint32_t reserved0 : 7; uint32_t wpvsrc : 16; // Write Protect Violation Source uint32_t reserved1 : 8; } __attribute__((__packed__)) bits; } pmc_wpsr_t; #endif // PMCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/000077500000000000000000000000001207233610700206245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/McuSleepC.nc000066400000000000000000000230621207233610700227710ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas schmid */ #include "hardware.h" #include "sam3snvichardware.h" #include "sam3spmchardware.h" #include "sam3ssupchardware.h" #include "sam3rtthardware.h" //#include "sam3stchardware.h" module McuSleepC { provides{ interface McuSleep; interface McuPowerState; interface Sam3LowPower; interface FunctionWrapper as InterruptWrapper; } uses { interface HplSam3Clock; } } implementation{ #define PMC_PIO_CLOCK_MASK 0x3FFFFFFC enum { S_AWAKE, S_SLEEP, S_WAIT, S_BACKUP, }; norace uint32_t ps; norace struct { } wait_restore; // This C function is defined so that we can call it // from platform_bootstrap(), as defined in platform.h void sam3LowPowerConfigure() @C() @spontaneous() { call Sam3LowPower.configure(); } async command void Sam3LowPower.configure() { // Customize pio settings as appropriate for the platform signal Sam3LowPower.customizePio(); } uint32_t getPowerState() { //if (PMC->pcsr.flat & PMC_PIO_CLOCK_MASK) if ((PMC->pc.pcsr.flat > 0) || (PMC->pc1.pcsr.flat > 0)) return S_SLEEP; else return S_WAIT; } void commonSleep() { // Check if any alarms are set for the tc2 alarm hardware. // If not, turn off its peripheral clock // This is necessary because the TMicro alarm is linked to tc2. // More logic will need to be added here later, as more alarms are set up // for use. //if(!(TC->ch2.imr.bits.cpcs & 0x01)) // PMC->pcdr.bits.tc2 = 1; } void commonResume() { // Turn the periperhal clock for tc2 back on so that its alarm can be // set and times can be read from it //PMC->pcer.bits.tc2 = 1; } void setupSleepMode() { // Nothing special to do here yet } void resumeFromSleepMode() { // Nothing special to do here yet } void setupWaitMode() { // Save the state of the cpu we are about to change /* wait_restore.mck = call HplSam3Clock.getMainClockSpeed(); wait_restore.adc_emr = ADC12B->emr; wait_restore.pmc_pcsr = PMC->pcsr; wait_restore.pmc_uckr = PMC->uckr; wait_restore.supc_mr = SUPC->mr; wait_restore.pioa_psr = AT91C_BASE_PIOA->PIO_PSR; wait_restore.piob_psr = AT91C_BASE_PIOB->PIO_PSR; wait_restore.pioc_psr = AT91C_BASE_PIOC->PIO_PSR; wait_restore.pioa_osr = AT91C_BASE_PIOA->PIO_OSR; wait_restore.piob_osr = AT91C_BASE_PIOB->PIO_OSR; wait_restore.pioc_osr = AT91C_BASE_PIOC->PIO_OSR; wait_restore.pioa_pusr = AT91C_BASE_PIOA->PIO_PPUSR; wait_restore.piob_pusr = AT91C_BASE_PIOB->PIO_PPUSR; wait_restore.pioc_pusr = AT91C_BASE_PIOC->PIO_PPUSR; */ // Turn off all clocks to peripheral IO and configure pins // appropriately, so that when we go to sleep we are // drawing the least amount of current possible call Sam3LowPower.configure(); // Force us into 4 MHz with the RC Oscillator /* call HplSam3Clock.mckInit4RC(); // Setup for wait mode PMC->fsmr.bits.lpm = 1; // Only resume from wait mode with an input from the RTT PMC->fsmr.bits.rttal = 1; // Make sure we DON'T go into deep sleep (i.e. backup mode) SCB->scr.bits.sleepdeep = 0; */ } void resumeFromWaitMode() { // Restore the old clock settings /* uint32_t oldMck = wait_restore.mck; if(oldMck > 13000 && oldMck < 49000){ call HplSam3Clock.mckInit48(); }else if(oldMck > 49000 && oldMck < 90000){ call HplSam3Clock.mckInit84(); }else if(oldMck > 90000){ call HplSam3Clock.mckInit96(); } // Restore the ADC to its previous mode ADC12B->emr = wait_restore.adc_emr; // Reenable peripheral clocks, as appropriate PMC->pcer.flat = wait_restore.pmc_pcsr.flat; PMC->pcdr.flat = ~wait_restore.pmc_pcsr.flat; // Reenable the UTMI clock, as appropriate PMC->uckr = wait_restore.pmc_uckr; // Reenable brownout detector, as appropriate { supc_mr_t mr; mr = wait_restore.supc_mr; mr.bits.key = 0xA5; SUPC->mr = mr; } */ // Restore the PIO output/input pin and pullup resistor // settings to the values they had before entering wait mode /* AT91C_BASE_PIOA->PIO_PER = wait_restore.pioa_psr; AT91C_BASE_PIOB->PIO_PER = wait_restore.piob_psr; AT91C_BASE_PIOC->PIO_PER = wait_restore.pioc_psr; AT91C_BASE_PIOA->PIO_PDR = ~wait_restore.pioa_psr; AT91C_BASE_PIOB->PIO_PDR = ~wait_restore.piob_psr; AT91C_BASE_PIOC->PIO_PDR = ~wait_restore.pioc_psr; AT91C_BASE_PIOA->PIO_OER = wait_restore.pioa_osr; AT91C_BASE_PIOB->PIO_OER = wait_restore.piob_osr; AT91C_BASE_PIOC->PIO_OER = wait_restore.pioc_osr; AT91C_BASE_PIOA->PIO_ODR = ~wait_restore.pioa_osr; AT91C_BASE_PIOB->PIO_ODR = ~wait_restore.piob_osr; AT91C_BASE_PIOC->PIO_ODR = ~wait_restore.pioc_osr; // Notice the reverse logic below - its on purpose, check the data sheet // 0 means active, 1 means inactive AT91C_BASE_PIOA->PIO_PPUER = ~wait_restore.pioa_pusr; AT91C_BASE_PIOB->PIO_PPUER = ~wait_restore.piob_pusr; AT91C_BASE_PIOC->PIO_PPUER = ~wait_restore.pioc_pusr; AT91C_BASE_PIOA->PIO_PPUDR = wait_restore.pioa_pusr; AT91C_BASE_PIOB->PIO_PPUDR = wait_restore.piob_pusr; AT91C_BASE_PIOC->PIO_PPUDR = wait_restore.pioc_pusr; */ } void setupBackupMode() { // Not yet supported.... // Need to think more about how to do this since it is essentially a "hibernate" // mode, meaning we will have to save all register and memory state into // non-volatile memory. Possibly more state will need to be saved as well. } void resumeFromBackupMode() { // Not yet supported.... // Need to think more about how to do this since it is essentially a "hibernate" // mode and resuming will be from a reboot, not a simple interrupt service routine // Consider changing vectors.c to call out to this after checking some state variable // stored in the internal EEFC. } async command void McuSleep.sleep() { commonSleep(); switch(ps = getPowerState()) { case S_AWAKE: //Just stay awake... break; case S_SLEEP: // Setup for sleep mode setupSleepMode(); break; case S_WAIT: // Setup for wait mode setupWaitMode(); break; case S_BACKUP: // Setup for backup mode setupBackupMode(); break; default: // Default setup setupSleepMode(); } __nesc_enable_interrupt(); /** * We need to disable sleep while debugging. Else, the GDB connection gets * disconnected. */ #ifndef DEBUG_CORE // Enter appropriate idle mode if(ps != S_AWAKE) __asm volatile ("wfe"); #endif // Normally, at this point we can only be woken up by an interrupt, so execution continues // in the body of the InterruptWrapper.preamble() command before returning to here // However, if we never actually went to sleep, we need to force this command to run. if(ps == S_AWAKE) call InterruptWrapper.preamble(); // all of memory may change at this point, because an IRQ handler // may have posted a task! asm volatile("" : : : "memory"); __nesc_disable_interrupt(); } async command void InterruptWrapper.preamble() { atomic { switch(ps) { case S_AWAKE: // Stayed awake the whole time, so do nothing break; case S_SLEEP: // Resume from sleep mode resumeFromSleepMode(); break; case S_WAIT: // Resume from wait mode resumeFromWaitMode(); break; case S_BACKUP: // Resume from backup mode resumeFromBackupMode(); break; default: // Default resume resumeFromSleepMode(); } if(ps != S_AWAKE) commonResume(); ps = S_AWAKE; } } async command void InterruptWrapper.postamble() { /* Do nothing */ } async command void McuPowerState.update(){} async event void HplSam3Clock.mainClockChanged(){} default async event void Sam3LowPower.customizePio() {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/000077500000000000000000000000001207233610700213535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/AdcP.nc000066400000000000000000000171101207233610700225040ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sadchardware.h" module AdcP { provides { interface Read as Read[uint8_t client]; interface ReadNow as ReadNow[uint8_t client]; interface Resource as ResourceReadNow[uint8_t client]; } uses { // for Read only: interface Resource as ResourceRead[uint8_t client]; // for ReadNow only: interface Resource as SubResourceReadNow[uint8_t client]; // for Read and ReadNow: interface Sam3sGetAdc as GetAdc[uint8_t client]; interface AdcConfigure as Config[uint8_t client]; interface Leds; } } implementation { norace uint8_t state; norace uint8_t readNowClient; norace uint8_t setClient; norace uint16_t adcResult; enum { S_READ, S_READNOW, }; error_t configureAdcRegisters(uint8_t client) { const sam3s_adc_channel_config_t * ONE config; config = call Config.getConfiguration[client](); return call GetAdc.configureAdc[client](config); } /** Read.read - TEP 114 **/ command error_t Read.read[uint8_t client]() { state = S_READ; call Leds.led1Toggle(); return call ResourceRead.request[client](); } event void ResourceRead.granted[uint8_t client]() { error_t result = configureAdcRegisters(client); if(result == SUCCESS){ //call actual read! call GetAdc.getData[client](); }else{ //configure failed! call ResourceRead.release[client](); signal Read.readDone[client](result, 0); } } /************************************************/ /** ReadNow.read **/ async command error_t ReadNow.read[uint8_t nowClient]() { if(call SubResourceReadNow.isOwner[nowClient]()){ return call GetAdc.getData[nowClient](); }else{ return FAIL; } } task void signalGranted(){ error_t error = configureAdcRegisters(readNowClient); if(error == SUCCESS){ state = S_READNOW; }else{ // config error } signal ResourceReadNow.granted[readNowClient](); } async command error_t ResourceReadNow.request[uint8_t nowClient]() { if(!call SubResourceReadNow.isOwner[nowClient]()) return call SubResourceReadNow.request[nowClient](); else{ atomic readNowClient = nowClient; post signalGranted(); return SUCCESS; } } event void SubResourceReadNow.granted[uint8_t nowClient]() { error_t error = configureAdcRegisters(nowClient); if(error == SUCCESS){ state = S_READNOW; }else{ // config error } signal ResourceReadNow.granted[nowClient](); } async command error_t ResourceReadNow.immediateRequest[uint8_t nowClient]() { error_t result = call SubResourceReadNow.immediateRequest[nowClient](); if (result == SUCCESS){ result = configureAdcRegisters(nowClient); if (result == SUCCESS) state = S_READNOW; } return result; } async command error_t ResourceReadNow.release[uint8_t nowClient]() { return call SubResourceReadNow.release[nowClient](); } async command bool ResourceReadNow.isOwner[uint8_t nowClient]() { return call SubResourceReadNow.isOwner[nowClient](); } /** Read Done **/ void task readDone() { call ResourceRead.release[setClient](); signal Read.readDone[setClient](SUCCESS, adcResult); } void task readDoneNow() { signal ReadNow.readDone[setClient](SUCCESS, adcResult); } /************************************************/ /** Data is ready! **/ async event error_t GetAdc.dataReady[uint8_t client](uint16_t data) { atomic setClient = client; atomic adcResult = data; switch (state) { case S_READ: call ResourceRead.release[client](); post readDone(); break; case S_READNOW: post readDoneNow(); break; default: break; } return SUCCESS; } /************************************************/ const sam3s_adc_channel_config_t defaultConfig = { channel: 0, trgen : 0, // 0: trigger disabled trgsel : 0, // 0: external trigger lowres : 0, // 0: 12-bit sleep : 0, // 0: normal, adc core and vref are kept on between conversions fwup : 0, // 0: normal, sleep mode is defined by sleep bit freerun : 0, // 0: normal mode, wait for trigger prescal : 2, // ADCClock = MCK / ((prescal + 1)*2) startup : 7, // 112 periods of ADCClock settling : 1, // 5 periods of ADCClock anach : 0, // 0: no analog changed on channel switching tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods useq : 0, // 0: normal, converts channel in sequence ibctl : 1, diff : 0, gain : 0, offset : 0, }; default async command error_t ResourceRead.request[uint8_t client]() { return FAIL; } default async command error_t ResourceRead.immediateRequest[uint8_t client]() { return FAIL; } default async command error_t ResourceRead.release[uint8_t client]() { return FAIL; } default async command bool ResourceRead.isOwner[uint8_t client]() { return FALSE; } default event void Read.readDone[uint8_t client]( error_t result, uint16_t val ){} default async command error_t SubResourceReadNow.release[uint8_t nowClient](){ return FAIL;} default async command error_t SubResourceReadNow.request[uint8_t nowClient](){ return FAIL; } default async command bool SubResourceReadNow.isOwner[uint8_t client]() { return FALSE; } default event void ResourceReadNow.granted[uint8_t nowClient](){} default async event void ReadNow.readDone[uint8_t client]( error_t result, uint16_t val ){} default async command error_t SubResourceReadNow.immediateRequest[uint8_t nowClient]() { return FAIL; } default async command error_t GetAdc.getData[uint8_t client](){ return EINVAL; } default async command const sam3s_adc_channel_config_t* Config.getConfiguration[uint8_t client]() { return &defaultConfig; } default async command error_t GetAdc.configureAdc[uint8_t client](const sam3s_adc_channel_config_t *config){ return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/AdcReadClientC.nc000066400000000000000000000042011207233610700244170ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sadchardware.h" generic configuration AdcReadClientC() { provides { interface Read; } uses interface AdcConfigure; } implementation { components AdcP; components new Sam3sAdcClientC(); enum { CLIENT = unique(ADCC_SERVICE), }; Read = AdcP.Read[CLIENT]; AdcConfigure = AdcP.Config[CLIENT]; AdcP.GetAdc[CLIENT] -> Sam3sAdcClientC.Sam3sGetAdc; AdcP.ResourceRead[CLIENT] -> Sam3sAdcClientC.Resource; components NoLedsC as Leds; AdcP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/AdcReadNowClientC.nc000066400000000000000000000042421207233610700251100ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sadchardware.h" generic configuration AdcReadNowClientC() { provides { interface ReadNow; interface Resource; } uses interface AdcConfigure; } implementation { components AdcP; components new Sam3sAdcClientC(); enum { CLIENT = unique(ADCC_SERVICE), }; ReadNow = AdcP.ReadNow[CLIENT]; AdcConfigure = AdcP.Config[CLIENT]; Resource = AdcP.ResourceReadNow[CLIENT]; AdcP.GetAdc[CLIENT] -> Sam3sAdcClientC.Sam3sGetAdc; AdcP.SubResourceReadNow[CLIENT] -> Sam3sAdcClientC.Resource; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/AdcReadStreamClientC.nc000066400000000000000000000044201207233610700255760ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sadchardware.h" generic configuration AdcReadStreamClientC() { provides { interface ReadStream; } uses interface AdcConfigure; } implementation { #ifndef SAM3S_ADC_PDC components AdcStreamP; #else components AdcStreamPDCP as AdcStreamP; #endif components new Sam3sAdcClientC(); components WireAdcStreamP; enum { CLIENT = unique(ADCC_READ_STREAM_SERVICE), }; ReadStream = WireAdcStreamP.ReadStream[CLIENT]; AdcConfigure = WireAdcStreamP.AdcConfigure[CLIENT]; WireAdcStreamP.Resource[CLIENT] -> Sam3sAdcClientC.Resource; WireAdcStreamP.Sam3sGetAdc[CLIENT] -> Sam3sAdcClientC.Sam3sGetAdc; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/AdcStreamP.nc000066400000000000000000000153471207233610700236720ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation for ReadStream interface in Sam3u * (Coverted msp430 and atm128 code) * @author JeongGil Ko * @author Thomas Schmid */ #include "sam3sadchardware.h" module AdcStreamP { provides { interface Init @atleastonce(); interface ReadStream[uint8_t client]; } uses { interface Sam3sGetAdc as GetAdc[uint8_t client]; interface AdcConfigure as Config[uint8_t client]; interface Alarm; interface Leds; } } implementation { enum { NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE) }; norace uint8_t client = NSTREAM; struct list_entry_t { uint16_t count; struct list_entry_t * ONE_NOK next; }; struct list_entry_t *bufferQueue[NSTREAM]; struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM]; uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount; norace uint16_t count; norace uint16_t * COUNT_NOK(count) buffer; norace uint16_t * BND_NOK(buffer, buffer+count) pos; norace uint32_t now, period; command error_t Init.init() { uint8_t i; for (i = 0; i != NSTREAM; i++) bufferQueueEnd[i] = &bufferQueue[i]; return SUCCESS; } void sampleSingle() { call GetAdc.getData[client](); } error_t postBuffer(uint8_t c, uint16_t *buf, uint16_t n) { if (n < sizeof(struct list_entry_t)) return ESIZE; atomic { struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf); if (!bufferQueueEnd[c]) return FAIL; newEntry->count = n; newEntry->next = NULL; *bufferQueueEnd[c] = newEntry; bufferQueueEnd[c] = &newEntry->next; } return SUCCESS; } command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) { return postBuffer(c, buf, n); } task void readStreamDone() { uint8_t c = client; uint32_t actualPeriod = period; atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](SUCCESS, actualPeriod); } task void readStreamFail() { struct list_entry_t *entry; uint8_t c = client; atomic entry = bufferQueue[c]; for (; entry; entry = entry->next) { uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count; signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count); } atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](FAIL, 0); } task void bufferDone() { uint16_t *b, c; atomic { b = lastBuffer; c = lastCount; lastBuffer = NULL; } signal ReadStream.bufferDone[client](SUCCESS, b, c); } void nextAlarm() { call Alarm.startAt(now, period); now += period; } async event void Alarm.fired() { call Leds.led2Toggle(); sampleSingle(); } error_t nextBuffer(bool startNextAlarm) { atomic { struct list_entry_t *entry = bufferQueue[client]; if (!entry) { // all done bufferQueueEnd[client] = NULL; // prevent post post readStreamDone(); return FAIL; } else { uint16_t tmp_count; bufferQueue[client] = entry->next; if (!bufferQueue[client]) bufferQueueEnd[client] = &bufferQueue[client]; pos = buffer = NULL; count = entry->count; tmp_count = count; pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry); if (startNextAlarm) nextAlarm(); return SUCCESS; } } } command error_t ReadStream.read[uint8_t c](uint32_t usPeriod) { /* not exactly microseconds */ /* ADC is currently based on a 1.5MHz clock */ period = usPeriod; client = c; now = call Alarm.getNow(); call GetAdc.configureAdc[c](call Config.getConfiguration[c]()); if (nextBuffer(FALSE) == SUCCESS){ sampleSingle(); } return SUCCESS; } async event error_t GetAdc.dataReady[uint8_t streamClient](uint16_t data) { call Leds.led1Toggle(); if (client == NSTREAM) return FAIL; if (count == 0) { now = call Alarm.getNow(); nextBuffer(TRUE); } else { *pos++ = data; if (pos == buffer + count) { atomic { if (lastBuffer) { /* We failed to signal bufferDone in time. Fail. */ bufferQueueEnd[client] = NULL; // prevent post post readStreamFail(); return FAIL; } else { lastCount = count; lastBuffer = buffer; } } post bufferDone(); nextBuffer(TRUE); } else nextAlarm(); } return FAIL; } const sam3s_adc_channel_config_t defaultConfig = { }; default async command const sam3s_adc_channel_config_t* Config.getConfiguration[uint8_t c]() { return &defaultConfig; } default async command error_t GetAdc.getData[uint8_t c]() { return FAIL; } default async command error_t GetAdc.configureAdc[uint8_t c]( const sam3s_adc_channel_config_t *config){ return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/AdcStreamPDCP.nc000066400000000000000000000107431207233610700242140ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation for ReadStream interface with PDC in Sam3 * @author JeongGil Ko */ #include "sam3sadchardware.h" module AdcStreamPDCP { provides { interface Init @atleastonce(); interface ReadStream[uint8_t client]; } uses { interface Sam3sGetAdc as GetAdc[uint8_t client]; interface AdcConfigure as Config[uint8_t client]; interface HplSam3Pdc as HplPdc; interface Leds; } } implementation { enum { NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE) }; norace uint8_t client = NSTREAM; adc_cr_t cr; struct list_entry_t { uint16_t count; struct list_entry_t * ONE_NOK next; }; struct list_entry_t *bufferQueue[NSTREAM]; struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM]; uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount; norace uint16_t count; norace uint16_t * COUNT_NOK(count) buffer; norace uint16_t * BND_NOK(buffer, buffer+count) pos; norace uint32_t now, period; norace uint16_t originalLength; norace uint16_t *originalPointer; norace uint8_t state; enum{ S_READ, S_IDLE, }; command error_t Init.init() { uint8_t i; state = S_IDLE; for (i = 0; i != NSTREAM; i++) bufferQueueEnd[i] = &bufferQueue[i]; return SUCCESS; } void samplePdc() { // switch this to pdc enable call HplPdc.enablePdcRx(); atomic cr.bits.start = 1; // enable software trigger atomic ADC->cr = cr; } command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) { // set parameters here!!!! // set pdc buffers and set the length as a global parameter originalLength = n; originalPointer = buf; call HplPdc.setRxPtr(buf); call HplPdc.setRxCounter(n); return SUCCESS; } command error_t ReadStream.read[uint8_t c](uint32_t usPeriod) { period = usPeriod; client = c; call GetAdc.configureAdc[c](call Config.getConfiguration[c]()); state = S_READ; //samplePdc(); call GetAdc.getData[c](); call HplPdc.enablePdcRx(); return SUCCESS; } task void signalReadDone(){ signal ReadStream.readDone[client](SUCCESS, period); } task void signalBufferDone(){ signal ReadStream.bufferDone[client](SUCCESS, originalPointer, originalLength); } async event error_t GetAdc.dataReady[uint8_t streamClient](uint16_t data) { if(state == S_READ){ atomic state = S_IDLE; call HplPdc.disablePdcRx(); post signalReadDone(); post signalBufferDone(); } return SUCCESS; } const sam3s_adc_channel_config_t defaultConfig = { }; default async command const sam3s_adc_channel_config_t* Config.getConfiguration[uint8_t c]() { return &defaultConfig; } default async command error_t GetAdc.getData[uint8_t c]() { return FAIL; } default async command error_t GetAdc.configureAdc[uint8_t c]( const sam3s_adc_channel_config_t *config){ return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcClientC.nc000066400000000000000000000036431207233610700245430ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sadchardware.h" generic configuration Sam3sAdcClientC() { provides { interface Resource; interface Sam3sGetAdc; } } implementation { components Sam3sAdcP; enum { ID = unique(SAM3SADC_RESOURCE), }; Resource = Sam3sAdcP.Resource[ID]; Sam3sGetAdc = Sam3sAdcP.Sam3sGetAdc[ID]; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcImplP.nc000066400000000000000000000154771207233610700242530ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sadchardware.h" module Sam3sAdcImplP { provides { interface Init; interface Sam3sGetAdc as Sam3sAdc[uint8_t id]; } uses { interface HplNVICInterruptCntl as ADCInterrupt; interface HplSam3GeneralIOPin as AdcPin; interface HplSam3PeripheralClockCntl as AdcClockControl; interface HplSam3Clock as ClockConfig; interface FunctionWrapper as AdcInterruptWrapper; #ifdef SAM3S_ADC_PDC interface HplSam3Pdc as HplPdc; #endif interface Leds; } } implementation { norace uint8_t clientID; norace uint8_t state; norace uint8_t channel; enum{ S_ADC, S_IDLE, }; command error_t Init.init(){ /* Enable clock */ call AdcClockControl.enable(); ADC->idr.flat = 0x1f00ffff; // disable all interrupt sources ADC->idr.flat = 0x1f00ffff; // disable all interrupt sources /* Reset ADC */ ADC->cr.flat = 0x1; /* Configure interrupts */ call ADCInterrupt.configure(IRQ_PRIO_ADC); /* Set IO line */ call AdcPin.disablePioControl(); // Disable whatever is set currently call AdcPin.selectPeripheralD(); // set to peripheral D. All ADC pins are on D state = S_IDLE; return SUCCESS; } async command error_t Sam3sAdc.configureAdc[uint8_t id](const sam3s_adc_channel_config_t *config){ adc_chdr_t chdr; adc_idr_t idr; adc_cr_t cr; adc_mr_t mr; adc_acr_t acr; adc_cgr_t cgr = ADC->cgr; adc_cor_t cor = ADC->cor; adc_cher_t cher; adc_ier_t ier; channel = config->channel; //cher.flat = ADC->chsr.flat; // read from status cher.flat = 0; //ier.flat = ADC->imr.flat; // read from mask to see who is enabled ier.flat = 0; chdr.flat = 0x0000FFFF; ADC->chdr = chdr; // disable all channels during setup idr.flat = 0x1f00FFFF; ADC->idr = idr; // disable all interrupts during setup cher.flat |= (1 << config->channel); #ifndef SAM3S_ADC_PDC // enable channel interrupt ier.flat |= (1 << config->channel); #else // enable PDC channel interrupt ier.bits.rxbuff = 1; #endif cr.bits.swrst = 0; cr.bits.start = 0; // disable start bit for the configuration stage mr.bits.trgen = config->trgen; mr.bits.trgsel = config->trgsel ; mr.bits.lowres = config->lowres ; mr.bits.sleep = config->sleep ; mr.bits.fwup = config->fwup ; mr.bits.freerun = config->freerun ; mr.bits.prescal = config->prescal ; mr.bits.startup = config->startup ; mr.bits.settling = config->settling; mr.bits.anach = config->anach ; mr.bits.tracktim = config->tracktim; mr.bits.transfer = config->transfer; mr.bits.useq = config->useq ; acr.bits.ibctl = config->ibctl; cgr.flat &= (3 << (config->channel << 1)); cgr.flat |= (config->gain << (config->channel << 1)); if(config->diff) { cor.flat |= ((1 << config->channel) << 16); } else { cor.flat &= ~ ((1 << config->channel) << 16); } if(config->offset) { cor.flat |= ((1 << config->channel)); } else { cor.flat &= ~ (1 << config->channel); } call ADCInterrupt.enable(); call ADCInterrupt.clearPending(); // We have now locally modified all the register values // Write the register back in its respective memory space ADC->cher = cher; ADC->cr = cr; ADC->mr = mr; ADC->acr = acr; ADC->cgr = cgr; ADC->cor = cor; ADC->ier = ier; call Leds.led0Toggle(); return SUCCESS; } async command error_t Sam3sAdc.getData[uint8_t id](){ adc_cr_t cr; cr.flat = 0; call AdcClockControl.enable(); //call ADCInterrupt.enable(); //call ADCInterrupt.clearPending(); atomic clientID = id; if(state != S_IDLE){ return EBUSY; }else{ cr.bits.start = 1; // enable software trigger ADC->cr = cr; atomic state = S_ADC; call Leds.led1Toggle(); return SUCCESS; } } async event void ClockConfig.mainClockChanged(){} /* Get events (signals) from chips here! */ void handler() @spontaneous() { adc_cr_t cr; adc_isr_t isr = ADC->isr; uint16_t data = 0; call Leds.led2Toggle(); #ifndef SAM3S_ADC_PDC call ADCInterrupt.disable(); // read eoc for the current channel if(isr.flat & (1 << channel)){ data = ADC->cdr[channel].bits.data; cr.bits.start = 0; // disable software trigger ADC->cr = cr; //get data from register atomic state = S_IDLE; call AdcClockControl.disable(); signal Sam3sAdc.dataReady[clientID](data); } #else if(isr.bits.rxbuff){ //call ADCInterrupt.disable(); atomic { state = S_IDLE; cr.bits.start = 0; // enable software trigger ADC->cr = cr; } signal Sam3sAdc.dataReady[clientID](data); }else{ call HplPdc.enablePdcRx(); atomic { cr.bits.start = 1; // enable software trigger ADC->cr = cr; } } #endif } void AdcIrqHandler() @C() @spontaneous() { call AdcInterruptWrapper.preamble(); handler(); call AdcInterruptWrapper.postamble(); } /* Default functions */ default async event error_t Sam3sAdc.dataReady[uint8_t id](uint16_t data){ return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcP.nc000066400000000000000000000047451207233610700234250ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sadchardware.h" configuration Sam3sAdcP { provides { interface Resource[uint8_t id]; interface Sam3sGetAdc[uint8_t id]; } } implementation { components Sam3sAdcImplP as AdcImpl; components MainC; components HplNVICC, HplSam3sClockC, HplSam3sGeneralIOC; //components new Resource[uint8_t id]; components new SimpleRoundRobinArbiterC(SAM3SADC_RESOURCE) as Arbiter; AdcImpl.ADCInterrupt -> HplNVICC.ADCInterrupt; AdcImpl.AdcPin -> HplSam3sGeneralIOC.HplPioB1; AdcImpl.AdcClockControl -> HplSam3sClockC.ADCCntl; Resource = Arbiter; // set this!?! Sam3sGetAdc = AdcImpl.Sam3sAdc; MainC.SoftwareInit -> AdcImpl.Init; components LedsC, NoLedsC; AdcImpl.Leds -> LedsC; components McuSleepC; AdcImpl.AdcInterruptWrapper -> McuSleepC; #ifdef SAM3S_ADC_PDC components HplSam3sPdcC; AdcImpl.HplPdc -> HplSam3sPdcC.AdcPdcControl; #endif } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/Sam3sGetAdc.nc000066400000000000000000000034741207233610700237430ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sadchardware.h" interface Sam3sGetAdc { async command error_t configureAdc(const sam3s_adc_channel_config_t *config); async command error_t getData(); async event error_t dataReady(uint16_t data); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/WireAdcStreamP.nc000066400000000000000000000051171207233610700245130ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Thomas Schmid */ #include "sam3sadchardware.h" configuration WireAdcStreamP { provides interface ReadStream[uint8_t client]; uses { interface AdcConfigure[uint8_t client]; interface Sam3sGetAdc[uint8_t client]; interface Resource[uint8_t client]; } } implementation { #ifndef SAM3S_ADC_PDC components AdcStreamP; #else components AdcStreamPDCP as AdcStreamP; #endif components MainC, new AlarmTMicro16C() as Alarm, new ArbitratedReadStreamC(uniqueCount(ADCC_READ_STREAM_SERVICE), uint16_t) as ArbitrateReadStream; ReadStream = ArbitrateReadStream; AdcConfigure = AdcStreamP; Resource = ArbitrateReadStream; ArbitrateReadStream.Service -> AdcStreamP; #ifdef SAM3S_ADC_PDC components HplSam3sPdcC; AdcStreamP.HplPdc -> HplSam3sPdcC.AdcPdcControl; #else AdcStreamP.Alarm -> Alarm; #endif AdcStreamP.Init <- MainC; Sam3sGetAdc = AdcStreamP.GetAdc; components LedsC, NoLedsC; AdcStreamP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/adc/sam3sadchardware.h000066400000000000000000000551111207233610700247430ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sam3s ADC register definitions * * @author Thomas Schmid */ #ifndef SAM3SADCHARDWARE_H #define SAM3SADCHARDWARE_H /** * ADC Control Register */ typedef union { uint32_t flat; struct { uint32_t swrst : 1; // Software Reset uint32_t start : 1; // Start Conversion uint32_t reserved : 30; } __attribute__((__packed__)) bits; } adc_cr_t; /** * ADC Mode Register */ typedef union { uint32_t flat; struct { uint32_t trgen : 1; // Trigger Enable uint32_t trgsel : 3; // Trigger Selection uint32_t lowres : 1; // Resolution uint32_t sleep : 1; // Sleep Mode uint32_t fwup : 1; // Fast Wake Up uint32_t freerun : 1; // Free Run Mode uint32_t prescal : 8; // Prescaler Rate Selection uint32_t startup : 4; // Start Up Time uint32_t settling : 2; // Analog Settling Time uint32_t reserved0 : 1; uint32_t anach : 1; // Analog change uint32_t tracktim : 4; // Tracking Time uint32_t transfer : 2; // Transfer Period uint32_t reserved1 : 1; uint32_t useq : 1; // Use Sequence Enable } __attribute__((__packed__)) bits; } adc_mr_t; /** * ADC Channel Sequence 1 Register */ typedef union { uint32_t flat; struct { uint32_t usch1 : 3; // User Sequence Number uint32_t reserved0 : 1; uint32_t usch2 : 3; // User Sequence Number uint32_t reserved1 : 1; uint32_t usch3 : 3; // User Sequence Number uint32_t reserved2 : 1; uint32_t usch4 : 3; // User Sequence Number uint32_t reserved3 : 1; uint32_t usch5 : 3; // User Sequence Number uint32_t reserved4 : 1; uint32_t usch6 : 3; // User Sequence Number uint32_t reserved5 : 1; uint32_t usch7 : 3; // User Sequence Number uint32_t reserved6 : 1; uint32_t usch8 : 3; // User Sequence Number uint32_t reserved7 : 1; } __attribute__((__packed__)) bits; } adc_seqr1_t; /** * ADC Channel Sequence 2 Register */ typedef union { uint32_t flat; struct { uint32_t usch9 : 3; // User Sequence Number uint32_t reserved0 : 1; uint32_t usch10 : 3; // User Sequence Number uint32_t reserved1 : 1; uint32_t usch11 : 3; // User Sequence Number uint32_t reserved2 : 1; uint32_t usch12 : 3; // User Sequence Number uint32_t reserved3 : 1; uint32_t usch13 : 3; // User Sequence Number uint32_t reserved4 : 1; uint32_t usch14 : 3; // User Sequence Number uint32_t reserved5 : 1; uint32_t usch15 : 3; // User Sequence Number uint32_t reserved6 : 1; uint32_t usch16 : 3; // User Sequence Number uint32_t reserved7 : 1; } __attribute__((__packed__)) bits; } adc_seqr2_t; /** * ADC Channel Enable Register */ typedef union { uint32_t flat; struct { uint32_t ch0 : 1; // Channel Enable uint32_t ch1 : 1; // Channel Enable uint32_t ch2 : 1; // Channel Enable uint32_t ch3 : 1; // Channel Enable uint32_t ch4 : 1; // Channel Enable uint32_t ch5 : 1; // Channel Enable uint32_t ch6 : 1; // Channel Enable uint32_t ch7 : 1; // Channel Enable uint32_t ch8 : 1; // Channel Enable uint32_t ch9 : 1; // Channel Enable uint32_t ch10 : 1; // Channel Enable uint32_t ch11 : 1; // Channel Enable uint32_t ch12 : 1; // Channel Enable uint32_t ch13 : 1; // Channel Enable uint32_t ch14 : 1; // Channel Enable uint32_t ch15 : 1; // Channel Enable uint32_t reserved : 16; } __attribute__((__packed__)) bits; } adc_cher_t; /** * ADC Channel Disable Register */ typedef union { uint32_t flat; struct { uint32_t ch0 : 1; // Channel Disable uint32_t ch1 : 1; // Channel Disable uint32_t ch2 : 1; // Channel Disable uint32_t ch3 : 1; // Channel Disable uint32_t ch4 : 1; // Channel Disable uint32_t ch5 : 1; // Channel Disable uint32_t ch6 : 1; // Channel Disable uint32_t ch7 : 1; // Channel Disable uint32_t ch8 : 1; // Channel Disable uint32_t ch9 : 1; // Channel Disable uint32_t ch10 : 1; // Channel Disable uint32_t ch11 : 1; // Channel Disable uint32_t ch12 : 1; // Channel Disable uint32_t ch13 : 1; // Channel Disable uint32_t ch14 : 1; // Channel Disable uint32_t ch15 : 1; // Channel Disable uint32_t reserved : 16; } __attribute__((__packed__)) bits; } adc_chdr_t; /** * ADC Channel Status Register */ typedef union { uint32_t flat; struct { uint32_t ch0 : 1; // Channel Status uint32_t ch1 : 1; // Channel Status uint32_t ch2 : 1; // Channel Status uint32_t ch3 : 1; // Channel Status uint32_t ch4 : 1; // Channel Status uint32_t ch5 : 1; // Channel Status uint32_t ch6 : 1; // Channel Status uint32_t ch7 : 1; // Channel Status uint32_t ch8 : 1; // Channel Status uint32_t ch9 : 1; // Channel Status uint32_t ch10 : 1; // Channel Status uint32_t ch11 : 1; // Channel Status uint32_t ch12 : 1; // Channel Status uint32_t ch13 : 1; // Channel Status uint32_t ch14 : 1; // Channel Status uint32_t ch15 : 1; // Channel Status uint32_t reserved : 16; } __attribute__((__packed__)) bits; } adc_chsr_t; /** * ADC Last Converted Data Register */ typedef union { uint32_t flat; struct { uint32_t ldata : 12; // Last Data Converted uint32_t chnb : 4; // Channel Number uint32_t reserved : 16; } __attribute__((__packed__)) bits; } adc_lcdr_t; /** * ADC Interrupt Enable Register */ typedef union { uint32_t flat; struct { uint32_t eoc0 : 1; // End of Conversion Interrupt Enable x uint32_t eoc1 : 1; // End of Conversion Interrupt Enable x uint32_t eoc2 : 1; // End of Conversion Interrupt Enable x uint32_t eoc3 : 1; // End of Conversion Interrupt Enable x uint32_t eoc4 : 1; // End of Conversion Interrupt Enable x uint32_t eoc5 : 1; // End of Conversion Interrupt Enable x uint32_t eoc6 : 1; // End of Conversion Interrupt Enable x uint32_t eoc7 : 1; // End of Conversion Interrupt Enable x uint32_t eoc8 : 1; // End of Conversion Interrupt Enable x uint32_t eoc9 : 1; // End of Conversion Interrupt Enable x uint32_t eoc10 : 1; // End of Conversion Interrupt Enable x uint32_t eoc11 : 1; // End of Conversion Interrupt Enable x uint32_t eoc12 : 1; // End of Conversion Interrupt Enable x uint32_t eoc13 : 1; // End of Conversion Interrupt Enable x uint32_t eoc14 : 1; // End of Conversion Interrupt Enable x uint32_t eoc15 : 1; // End of Conversion Interrupt Enable x uint32_t reserved0 : 8; uint32_t drdy : 1; // Data Ready Interrupt Enable uint32_t govre : 1; // General Overrun Error Interrupt Enable uint32_t compe : 1; // comparison Event Interrupt Enable uint32_t endrx : 1; // End of Receive Buffer Interrupt Enable uint32_t rxbuff : 1; // Receive Buffer Full Interrupt Enable uint32_t reserved1 : 3; } __attribute__((__packed__)) bits; } adc_ier_t; /** * ADC Interrupt Disable Register */ typedef union { uint32_t flat; struct { uint32_t eoc0 : 1; // End of Conversion Interrupt Disable x uint32_t eoc1 : 1; // End of Conversion Interrupt Disable x uint32_t eoc2 : 1; // End of Conversion Interrupt Disable x uint32_t eoc3 : 1; // End of Conversion Interrupt Disable x uint32_t eoc4 : 1; // End of Conversion Interrupt Disable x uint32_t eoc5 : 1; // End of Conversion Interrupt Disable x uint32_t eoc6 : 1; // End of Conversion Interrupt Disable x uint32_t eoc7 : 1; // End of Conversion Interrupt Disable x uint32_t eoc8 : 1; // End of Conversion Interrupt Disable x uint32_t eoc9 : 1; // End of Conversion Interrupt Disable x uint32_t eoc10 : 1; // End of Conversion Interrupt Disable x uint32_t eoc11 : 1; // End of Conversion Interrupt Disable x uint32_t eoc12 : 1; // End of Conversion Interrupt Disable x uint32_t eoc13 : 1; // End of Conversion Interrupt Disable x uint32_t eoc14 : 1; // End of Conversion Interrupt Disable x uint32_t eoc15 : 1; // End of Conversion Interrupt Disable x uint32_t reserved0 : 8; uint32_t drdy : 1; // Data Ready Interrupt Disable uint32_t govre : 1; // General Overrun Error Interrupt Disable uint32_t compe : 1; // comparison Event Interrupt Disable uint32_t endrx : 1; // End of Receive Buffer Interrupt Disable uint32_t rxbuff : 1; // Receive Buffer Full Interrupt Disable uint32_t reserved1 : 3; } __attribute__((__packed__)) bits; } adc_idr_t; /** * ADC Interrupt Mask Register */ typedef union { uint32_t flat; struct { uint32_t eoc0 : 1; // End of Conversion Interrupt Mask x uint32_t eoc1 : 1; // End of Conversion Interrupt Mask x uint32_t eoc2 : 1; // End of Conversion Interrupt Mask x uint32_t eoc3 : 1; // End of Conversion Interrupt Mask x uint32_t eoc4 : 1; // End of Conversion Interrupt Mask x uint32_t eoc5 : 1; // End of Conversion Interrupt Mask x uint32_t eoc6 : 1; // End of Conversion Interrupt Mask x uint32_t eoc7 : 1; // End of Conversion Interrupt Mask x uint32_t eoc8 : 1; // End of Conversion Interrupt Mask x uint32_t eoc9 : 1; // End of Conversion Interrupt Mask x uint32_t eoc10 : 1; // End of Conversion Interrupt Mask x uint32_t eoc11 : 1; // End of Conversion Interrupt Mask x uint32_t eoc12 : 1; // End of Conversion Interrupt Mask x uint32_t eoc13 : 1; // End of Conversion Interrupt Mask x uint32_t eoc14 : 1; // End of Conversion Interrupt Mask x uint32_t eoc15 : 1; // End of Conversion Interrupt Mask x uint32_t reserved0 : 8; uint32_t drdy : 1; // Data Ready Interrupt Mask uint32_t govre : 1; // General Overrun Error Interrupt Mask uint32_t compe : 1; // comparison Event Interrupt Mask uint32_t endrx : 1; // End of Receive Buffer Interrupt Mask uint32_t rxbuff : 1; // Receive Buffer Full Interrupt Mask uint32_t reserved1 : 3; } __attribute__((__packed__)) bits; } adc_imr_t; /** * ADC Interrupt Status Register */ typedef union { uint32_t flat; struct { uint32_t eoc0 : 1; // End of Conversion Interrupt Status x uint32_t eoc1 : 1; // End of Conversion Interrupt Status x uint32_t eoc2 : 1; // End of Conversion Interrupt Status x uint32_t eoc3 : 1; // End of Conversion Interrupt Status x uint32_t eoc4 : 1; // End of Conversion Interrupt Status x uint32_t eoc5 : 1; // End of Conversion Interrupt Status x uint32_t eoc6 : 1; // End of Conversion Interrupt Status x uint32_t eoc7 : 1; // End of Conversion Interrupt Status x uint32_t eoc8 : 1; // End of Conversion Interrupt Status x uint32_t eoc9 : 1; // End of Conversion Interrupt Status x uint32_t eoc10 : 1; // End of Conversion Interrupt Status x uint32_t eoc11 : 1; // End of Conversion Interrupt Status x uint32_t eoc12 : 1; // End of Conversion Interrupt Status x uint32_t eoc13 : 1; // End of Conversion Interrupt Status x uint32_t eoc14 : 1; // End of Conversion Interrupt Status x uint32_t eoc15 : 1; // End of Conversion Interrupt Status x uint32_t reserved0 : 8; uint32_t drdy : 1; // Data Ready Interrupt Status uint32_t govre : 1; // General Overrun Error Interrupt Status uint32_t compe : 1; // comparison Event Interrupt Status uint32_t endrx : 1; // End of Receive Buffer Interrupt Status uint32_t rxbuff : 1; // Receive Buffer Full Interrupt Status uint32_t reserved1 : 3; } __attribute__((__packed__)) bits; } adc_isr_t; /** * ADC Overrun Status Register */ typedef union { uint32_t flat; struct { uint32_t ovre0 : 1; // Overrun Error x uint32_t ovre1 : 1; // Overrun Error x uint32_t ovre2 : 1; // Overrun Error x uint32_t ovre3 : 1; // Overrun Error x uint32_t ovre4 : 1; // Overrun Error x uint32_t ovre5 : 1; // Overrun Error x uint32_t ovre6 : 1; // Overrun Error x uint32_t ovre7 : 1; // Overrun Error x uint32_t ovre8 : 1; // Overrun Error x uint32_t ovre9 : 1; // Overrun Error x uint32_t ovre10 : 1; // Overrun Error x uint32_t ovre11 : 1; // Overrun Error x uint32_t ovre12 : 1; // Overrun Error x uint32_t ovre13 : 1; // Overrun Error x uint32_t ovre14 : 1; // Overrun Error x uint32_t ovre15 : 1; // Overrun Error x uint32_t reserved : 16; } __attribute__((__packed__)) bits; } adc_over_t; /** * ADC Extended Mode Register */ typedef union { uint32_t flat; struct { uint32_t cmpmode : 2; // Comparison Mode uint32_t reserved0 : 2; uint32_t cmpsel : 4; // Comparison Selected Channel uint32_t reserved1 : 1; uint32_t cmpall : 1; //Compare All Channels uint32_t reserved2 : 14; uint32_t tag : 1; // TAG of ADC_LDCR register uint32_t reserved3 : 7; } __attribute__((__packed__)) bits; } adc_emr_t; /** * ADC Compare Window Register */ typedef union { uint32_t flat; struct { uint32_t lowthres : 12; // Low Threshold uint32_t reserved0 : 4; uint32_t highthres : 12; // High Threshold uint32_t reserved1 : 4; } __attribute__((__packed__)) bits; } adc_cwr_t; /** * ADC Channel Gain Register */ typedef union { uint32_t flat; struct { uint32_t gain0 : 2; // Gain Channel x uint32_t gain1 : 2; // Gain Channel x uint32_t gain2 : 2; // Gain Channel x uint32_t gain3 : 2; // Gain Channel x uint32_t gain4 : 2; // Gain Channel x uint32_t gain5 : 2; // Gain Channel x uint32_t gain6 : 2; // Gain Channel x uint32_t gain7 : 2; // Gain Channel x uint32_t gain8 : 2; // Gain Channel x uint32_t gain9 : 2; // Gain Channel x uint32_t gain10 : 2; // Gain Channel x uint32_t gain11 : 2; // Gain Channel x uint32_t gain12 : 2; // Gain Channel x uint32_t gain13 : 2; // Gain Channel x uint32_t gain14 : 2; // Gain Channel x uint32_t gain15 : 2; // Gain Channel x } __attribute__((__packed__)) bits; } adc_cgr_t; /** * ADC Channel Offset Register */ typedef union { uint32_t flat; struct { uint32_t off0 : 1; // Offset for Channel x uint32_t off1 : 1; // Offset for Channel x uint32_t off2 : 1; // Offset for Channel x uint32_t off3 : 1; // Offset for Channel x uint32_t off4 : 1; // Offset for Channel x uint32_t off5 : 1; // Offset for Channel x uint32_t off6 : 1; // Offset for Channel x uint32_t off7 : 1; // Offset for Channel x uint32_t off8 : 1; // Offset for Channel x uint32_t off9 : 1; // Offset for Channel x uint32_t off10 : 1; // Offset for Channel x uint32_t off11 : 1; // Offset for Channel x uint32_t off12 : 1; // Offset for Channel x uint32_t off13 : 1; // Offset for Channel x uint32_t off14 : 1; // Offset for Channel x uint32_t off15 : 1; // Offset for Channel x uint32_t diff0 : 1; // Differential inputs for channel x uint32_t diff1 : 1; // Differential inputs for channel x uint32_t diff2 : 1; // Differential inputs for channel x uint32_t diff3 : 1; // Differential inputs for channel x uint32_t diff4 : 1; // Differential inputs for channel x uint32_t diff5 : 1; // Differential inputs for channel x uint32_t diff6 : 1; // Differential inputs for channel x uint32_t diff7 : 1; // Differential inputs for channel x uint32_t diff8 : 1; // Differential inputs for channel x uint32_t diff9 : 1; // Differential inputs for channel x uint32_t diff10 : 1; // Differential inputs for channel x uint32_t diff11 : 1; // Differential inputs for channel x uint32_t diff12 : 1; // Differential inputs for channel x uint32_t diff13 : 1; // Differential inputs for channel x uint32_t diff14 : 1; // Differential inputs for channel x uint32_t diff15 : 1; // Differential inputs for channel x } __attribute__((__packed__)) bits; } adc_cor_t; /** * ADC Channel Data Register */ typedef union { uint32_t flat; struct { uint32_t data : 12; // converted Data uint32_t reserved : 20; } __attribute__((__packed__)) bits; } adc_cdr_t; /** * ADC Analog Control Register */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 4; uint32_t tson : 1; // Temperature Sensor On uint32_t reserved1 : 3; uint32_t ibctl : 2; // ADC Bias Current Control uint32_t reserved2 : 22; } __attribute__((__packed__)) bits; } adc_acr_t; /** * ADC Write Protect Mode Register */ typedef union { uint32_t flat; struct { uint32_t wpen : 1; // Write Protect Enable uint32_t reserved0 : 7; uint32_t wpkey : 24; // Write Protect key } __attribute__((__packed__)) bits; } adc_wpmr_t; #define ADC_WPMR_KEY 0x414443 /** * ADC Write Protect Status Register */ typedef union { uint32_t flat; struct { uint32_t wpvs : 1; // Write Protect Violation Status uint32_t reserved0 : 7; uint32_t wpvsrc : 16; // Write Protect Violation Source uint32_t reserved1 : 8; } __attribute__((__packed__)) bits; } adc_wpsr_t; /** * ADC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3S * Series, Preliminary, p. 989 */ typedef struct adc { volatile adc_cr_t cr; // Control Register volatile adc_mr_t mr; // Mode Register volatile adc_seqr1_t seqr1; // Channel Sequence Register 1 volatile adc_seqr2_t seqr2; // Channel Sequence Register 2 volatile adc_cher_t cher; // Channel Enable Register volatile adc_chdr_t chdr; // Channel Disable Register volatile adc_chsr_t chsr; // channel Status Register uint32_t reserved0; volatile adc_lcdr_t lcdr; // Last Converted Data Register volatile adc_ier_t ier; // Interrupt Enable Register volatile adc_idr_t idr; // Interrupt Disable Register volatile adc_imr_t imr; // Interrupt Mask Register volatile adc_isr_t isr; // Interrupt Status Register uint32_t reserved1; uint32_t reserved2; volatile adc_over_t over; // Overrun Status Register volatile adc_emr_t emr; // Extended Mode Register volatile adc_cwr_t cwr; // Compare Window Register volatile adc_cgr_t cgr; // Channel Gain Register volatile adc_cor_t cor; // Channel Offset Register volatile adc_cdr_t cdr[16]; // Channel Data Register x uint32_t reserved3; volatile adc_acr_t acr; // Analog Control Register uint32_t reserved4[19]; volatile adc_wpmr_t wpmr; // Write Protect Mode Register volatile adc_wpsr_t wpsr; // Write Protect Status Register } adc_t; /** * Memory mapping for the ADC */ #define ADC_BASE_ADDRESS 0x40038000 volatile adc_t* ADC = (volatile adc_t *) ADC_BASE_ADDRESS; // ADC Base Address #define SAM3SADC_RESOURCE "Sam3AdcC.Resource" #define ADCC_SERVICE "AdcC.Service" #define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client" typedef struct { uint32_t channel : 4; uint32_t trgen : 1; uint32_t trgsel : 3; uint32_t lowres : 1; uint32_t sleep : 1; uint32_t fwup : 1; uint32_t freerun : 1; uint32_t prescal : 8; uint32_t startup : 4; uint32_t settling : 2; uint32_t anach : 1; uint32_t tracktim : 4; uint32_t transfer : 2; uint32_t useq : 1; uint32_t ibctl : 2; uint32_t diff : 1; uint32_t gain : 2; uint32_t offset : 1; } sam3s_adc_channel_config_t; #endif //SAM3SADCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/dacc/000077500000000000000000000000001207233610700215165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDac.nc000066400000000000000000000103521207233610700234370ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ interface Sam3sDac { /** * triggerEn: enable external trigger mode * triggerSel: select trigger source * wordTransfer: 1: word transfer, 0: half-word * sleep: 1: sleep mode, 0: normal mode * userSel: select channel * tagSelection: 1: bits 13-12 in data select channel * maxSpeed: 1: max speed mode enabled */ command error_t configure( bool triggerEn, uint8_t triggerSel, bool wordTransfer, bool sleep, bool fastWakeUp, uint8_t refreshPeriod, uint8_t userSel, bool tagSelection, bool maxSpeed, uint8_t startupTime); async command error_t enable(uint8_t channel); async command error_t disable(uint8_t channel); /** * Sets the DAC value. If wordTransfer is selected in the configuration, * then the lower half-word of data is one conversion value, and the upper * half-word a second. The DAC has a FIFO of up to 4 conversion values. * * If tagSelection is set, then the upper 15-13 bits of each half-word * indicate the channel. * * @return SUCCESS if ok, EBUSY if the DAC if the FIFO is full. */ async command error_t set(uint32_t data); /** * Set the requested frequency at which the samples in a buffer should be * played out. Not all frequencies are possible. The return value will * indicate the actual frequency set. * * @param frequency The requested frequency in Hz * @return The set frequency in Hz */ command uint32_t setFrequency(uint32_t frequency); /** * Set the buffer to be sent out on the DAC using the PDC. Depending on the * configuration, the buffer can contain word or half-word data, and bit * 13-12 of each half-word can indicate the channel. * * The PDC can hold up to two buffers. The function will return EBUSY if * both slots are currently full. * * @param buffer A pointer to the memory location of the buffer * @param length Size of the buffer * @return SUCCESS if the buffer was added, EBUSY if the PDC is full. */ async command error_t setBuffer(uint32_t *buffer, uint16_t length); /** * Start the PDC transfers. */ async command void startPdc(); /** * Stop the PDC transfers. */ async command void stopPdc(); /** * Signals that a buffer has been completely sent out. This is an indication * that the next buffer can be sent to the PDC. * * @param error SUCCESS if the buffer was sent out without errors. * @param buffer Pointer to the buffer structure that was sent out. * @param length Size of the finished buffer */ async event void bufferDone(error_t error, uint32_t *buffer, uint16_t length); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDacC.nc000066400000000000000000000045561207233610700235530ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ configuration Sam3sDacC { provides { interface StdControl; interface Sam3sDac; } } implementation { components Sam3sDacP as DacP, LedsC, NoLedsC, HplNVICC, HplSam3sClockC, HplSam3sGeneralIOC; StdControl = DacP; Sam3sDac = DacP; DacP.DacInterrupt -> HplNVICC.DACCInterrupt; DacP.DacPin0 -> HplSam3sGeneralIOC.HplPioB13; DacP.DacPin1 -> HplSam3sGeneralIOC.HplPioB14; DacP.DacClockControl -> HplSam3sClockC.DACCCntl; DacP.ClockConfig -> HplSam3sClockC; components McuSleepC; DacP.DacInterruptWrapper -> McuSleepC; components HplSam3sPdcC; DacP.HplPdc -> HplSam3sPdcC.DacPdcControl; components Sam3sPwmC; DacP.PwmControl -> Sam3sPwmC; DacP.Pwm -> Sam3sPwmC; DacP.Leds -> NoLedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDacP.nc000066400000000000000000000174121207233610700235630ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS * IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3sdacchardware.h" #include "sam3spwmhardware.h" module Sam3sDacP { provides { interface StdControl; interface Sam3sDac; } uses { interface HplNVICInterruptCntl as DacInterrupt; interface HplSam3GeneralIOPin as DacPin0; interface HplSam3GeneralIOPin as DacPin1; interface HplSam3PeripheralClockCntl as DacClockControl; interface HplSam3Clock as ClockConfig; interface FunctionWrapper as DacInterruptWrapper; interface HplSam3Pdc as HplPdc; interface Leds; interface StdControl as PwmControl; interface Sam3sPwm as Pwm; } } implementation { norace uint16_t currentLength; norace uint32_t *currentBuffer; norace uint16_t nextLength; norace uint32_t *nextBuffer; command error_t StdControl.start() { atomic { DACC->cr.flat = 0x1; // software reset call DacClockControl.enable(); /* Configure interrupts */ call DacInterrupt.configure(IRQ_PRIO_DAC); /* Set IO line */ call DacPin0.disablePioControl(); // Disable whatever is set currently call DacPin0.selectPeripheralD(); call DacPin1.disablePioControl(); // Disable whatever is set currently call DacPin1.selectPeripheralD(); call Sam3sDac.stopPdc(); } return SUCCESS; } command error_t StdControl.stop() { atomic { call DacClockControl.disable(); call DacInterrupt.disable(); call PwmControl.stop(); } return SUCCESS; } command error_t Sam3sDac.configure( bool triggerEn, // enable external trigger mode uint8_t triggerSel, // select trigger source bool wordTransfer, // 1: word transfer, 0: half-word bool sleep, // 1: sleep mode, 0: normal mode bool fastWakeUp, uint8_t refreshPeriod, uint8_t userSel, // select channel bool tagSelection, // 1: bits 13-12 in data select channel bool maxSpeed, // 1: max speed mode enabled uint8_t startupTime) { dacc_mr_t mr; mr.bits.trgen = triggerEn; mr.bits.trgsel = triggerSel & 0x7; mr.bits.word = wordTransfer; mr.bits.sleep = sleep; mr.bits.fastwkup = fastWakeUp; mr.bits.refresh = refreshPeriod; mr.bits.user_sel = userSel; mr.bits.tag = tagSelection; mr.bits.maxs = maxSpeed; mr.bits.startup = startupTime & 0x3F; DACC->mr = mr; return SUCCESS; } async command error_t Sam3sDac.enable(uint8_t channel) { if(channel >= DACC_MAX_CHANNELS) return FAIL; DACC->cher.flat = (1 << channel); return SUCCESS; } async command error_t Sam3sDac.disable(uint8_t channel) { if(channel >= DACC_MAX_CHANNELS) return FAIL; DACC->chdr.flat = (1 << channel); } async command error_t Sam3sDac.set(uint32_t data) { if(DACC->isr.bits.txrdy) { DACC->cdr.bits.data = data; return SUCCESS; } else { return EBUSY; } } async event void ClockConfig.mainClockChanged(){} command uint32_t Sam3sDac.setFrequency(uint32_t frequency) { uint32_t pwmFreq; dacc_mr_t mr = DACC->mr; if(frequency > 1000000) { // DAC doesn't support this return 0; } call PwmControl.start(); pwmFreq = 1200; // set it at about 1 MHz if(call Pwm.configure(pwmFreq) != SUCCESS) { return 0; } // get the actual frequency pwmFreq = call Pwm.getFrequency(); // now, calculate the period we really need call Pwm.setPeriod(pwmFreq * 1000 / frequency); call Pwm.enableCompare(PWM_COMPARE_DAC, 1); call Pwm.setEventCompares(PWM_EVENT_DAC, (1 << PWM_COMPARE_DAC)); // setup the DAC to be triggered from external triggers mr.bits.trgen = 1; mr.bits.trgsel = 4 + PWM_EVENT_DAC; // select the right event DACC->mr = mr; return pwmFreq * 1000 / (pwmFreq * 1000 / frequency); } async command error_t Sam3sDac.setBuffer(uint32_t *buffer, uint16_t length) { if(call HplPdc.getTxCounter() == 0) { call HplPdc.setTxPtr(buffer); call HplPdc.setTxCounter(length); atomic { currentBuffer = buffer; currentLength = length; } call Sam3sDac.startPdc(); } else { if(call HplPdc.getNextTxCounter() == 0) { dacc_ier_t ier; ier.flat = 0; call HplPdc.setNextTxPtr(buffer); call HplPdc.setNextTxCounter(length); atomic { nextBuffer = buffer; nextLength = length; // enable endtx interrupt again ier.bits.endtx = 1; DACC->ier = ier; } } else { // PDC busy return EBUSY; } } return SUCCESS; } async command void Sam3sDac.startPdc() { dacc_ier_t ier; call DacInterrupt.disable(); call DacInterrupt.clearPending(); call DacInterrupt.enable(); ier.flat = 0; ier.bits.endtx = 1; ier.bits.txbufe = 1; DACC->ier = ier; call HplPdc.enablePdcTx(); } async command void Sam3sDac.stopPdc() { dacc_idr_t idr; call DacInterrupt.disable(); idr.bits.endtx = 1; idr.bits.txbufe = 1; DACC->idr = idr; call HplPdc.disablePdcTx(); } task void signalDone() { signal Sam3sDac.bufferDone(SUCCESS, currentBuffer, currentLength); atomic { currentBuffer = nextBuffer; currentLength = nextLength; } } void handler() @spontaneous() { dacc_isr_t isr = DACC->isr; dacc_idr_t idr; idr.flat = 0; if(isr.bits.txbufe) { // PDC done. Disable interrupts. idr.flat = 0; idr.bits.txbufe = 1; idr.bits.endtx = 1; call HplPdc.disablePdcTx(); call Leds.led0Toggle(); post signalDone(); } else if(isr.bits.endtx) { // Disable endtx. If this was the second last buffer, txbufe will be the // next interrupt. Else the next set buffer will set this interrupt // again. idr.bits.endtx = 1; call Leds.led1Toggle(); post signalDone(); } DACC->idr = idr; } void DaccIrqHandler() @C() @spontaneous() { call DacInterruptWrapper.preamble(); handler(); call DacInterruptWrapper.postamble(); } default async event void Sam3sDac.bufferDone(error_t error, uint32_t *buffer, uint16_t length) { } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/dacc/sam3sdacchardware.h000066400000000000000000000203441207233610700252510ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sam3s DACC register definitions * * @author Thomas Schmid */ #ifndef SAM3SDACCHARDWARE_H #define SAM3SDACCHARDWARE_H #include "pdchardware.h" /** * DACC Control Register */ typedef union { uint32_t flat; struct { uint32_t swrst : 1; // Software Reset uint32_t reserved : 31; } __attribute__((__packed__)) bits; } dacc_cr_t; /** * DACC Mode Register */ typedef union { uint32_t flat; struct { uint32_t trgen : 1; // Trigger Enable uint32_t trgsel : 3; // Trigger Selection uint32_t word : 1; // Word Transfer uint32_t sleep : 1; // Sleep Mode uint32_t fastwkup : 1; // Fast Wake Up Mode uint32_t reserved0 : 1; uint32_t refresh : 8; // Refresh Period uint32_t user_sel : 2; // User Channel Selection uint32_t reserved1 : 2; uint32_t tag : 1; // Tag Selection Mode uint32_t maxs : 1; // Max Speed Mode uint32_t reserved2 : 2; uint32_t startup : 6; // Startup Time Selection uint32_t reserved3 : 2; } __attribute__((__packed__)) bits; } dacc_mr_t; /** * DACC Channel Enable Register */ typedef union { uint32_t flat; struct { uint32_t ch0 : 1; // Channel 0 enable uint32_t ch1 : 1; // Channel 1 enable uint32_t reserved : 30; } __attribute__((__packed__)) bits; } dacc_cher_t; /** * DACC Channel Disable Register */ typedef union { uint32_t flat; struct { uint32_t ch0 : 1; // Channel 0 disable uint32_t ch1 : 1; // Channel 1 disable uint32_t reserved : 30; } __attribute__((__packed__)) bits; } dacc_chdr_t; /** * DACC Channel Status Register */ typedef union { uint32_t flat; struct { uint32_t ch0 : 1; // Channel 0 Status uint32_t ch1 : 1; // Channel 1 Status uint32_t reserved : 30; } __attribute__((__packed__)) bits; } dacc_chsr_t; /** * DACC Conversion Data Register */ typedef union { uint32_t flat; struct { uint32_t data : 32; // Data to Convert } __attribute__((__packed__)) bits; } dacc_cdr_t; /** * DACC Interrupt Enable Register */ typedef union { uint32_t flat; struct { uint32_t txrdy : 1; // Transmit Ready Interrupt Enable uint32_t eoc : 1; // End of Conversion Interrupt Enable uint32_t endtx : 1; // End of Transmit Buffer Interrupt Enable uint32_t txbufe : 1; // Transmit Buffer Empty Interrupt Enable uint32_t reserved : 28; } __attribute__((__packed__)) bits; } dacc_ier_t; /** * DACC Interrupt Disable Register */ typedef union { uint32_t flat; struct { uint32_t txrdy : 1; // Transmit Ready Interrupt Disable uint32_t eoc : 1; // End of Conversion Interrupt Disable uint32_t endtx : 1; // End of Transmit Buffer Interrupt Disable uint32_t txbufe : 1; // Transmit Buffer Empty Interrupt Disable uint32_t reserved : 28; } __attribute__((__packed__)) bits; } dacc_idr_t; /** * DACC Interrupt Mask Register */ typedef union { uint32_t flat; struct { uint32_t txrdy : 1; // Transmit Ready Interrupt Mask uint32_t eoc : 1; // End of Conversion Interrupt Mask uint32_t endtx : 1; // End of Transmit Buffer Interrupt Mask uint32_t txbufe : 1; // Transmit Buffer Empty Interrupt Mask uint32_t reserved : 28; } __attribute__((__packed__)) bits; } dacc_imr_t; /** * DACC Interrupt Status Register */ typedef union { uint32_t flat; struct { uint32_t txrdy : 1; // Transmit Ready Interrupt Status uint32_t eoc : 1; // End of Conversion Interrupt Status uint32_t endtx : 1; // End of Transmit Buffer Interrupt Status uint32_t txbufe : 1; // Transmit Buffer Empty Interrupt Status uint32_t reserved : 28; } __attribute__((__packed__)) bits; } dacc_isr_t; /** * DACC Analog Current Register */ typedef union { uint32_t flat; struct { uint32_t ibctlch0 : 2; // Analog Output Current Control Channel 0 uint32_t ibctlch1 : 2; // Analog Output Current Control Channel 1 uint32_t reserved0 : 4; uint32_t ibctldaccore : 2; // Bias Current Control for DAC Core uint32_t reserved1 : 22; } __attribute__((__packed__)) bits; } dacc_acr_t; /** * DACC Write Protect Mode Register */ typedef union { uint32_t flat; struct { uint32_t wpen : 1; // Write Protect Enable uint32_t reserved0 : 7; uint32_t wpkey : 24; // Write Protect key } __attribute__((__packed__)) bits; } dacc_wpmr_t; #define DACC_WPMR_KEY 0x444143 /** * DACC Write Protect Status Register */ typedef union { uint32_t flat; struct { uint32_t wproterr : 1; // Write Protection error uint32_t reserved0 : 7; uint32_t wprotaddr : 8; // Write protection error address uint32_t reserved1 : 16; } __attribute__((__packed__)) bits; } dacc_wpsr_t; /** * DACC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3S * Series, Preliminary, p. 1019 */ typedef struct dacc { volatile dacc_cr_t cr; // Control Register volatile dacc_mr_t mr; // Mode Register uint32_t reserved0; uint32_t reserved1; volatile dacc_cher_t cher; // Channel Enable Register volatile dacc_chdr_t chdr; // Channel Disable Register volatile dacc_chsr_t chsr; // Channel Status Register uint32_t reserved2; volatile dacc_cdr_t cdr; // Channel Data Register volatile dacc_ier_t ier; // Ineterrupt Enable Register volatile dacc_idr_t idr; // Interrupt Disable Register volatile dacc_imr_t imr; // Interrupt Mask Register volatile dacc_isr_t isr; // Interrupt Status Register uint32_t reserved3[24]; volatile dacc_acr_t acr; // Analog current Register uint32_t reserved4[19]; volatile dacc_wpmr_t wpmr; // Write Protect Mode Register volatile dacc_wpsr_t wpsr; // Write Protect Status Register uint32_t reserved5[5]; volatile periph_rpr_t rpr; volatile periph_rcr_t rcr; volatile periph_tpr_t tpr; volatile periph_tcr_t tcr; volatile periph_rnpr_t rnpr; volatile periph_rncr_t rncr; volatile periph_tnpr_t tnpr; volatile periph_tncr_t tncr; volatile periph_ptcr_t ptcr; volatile periph_ptsr_t ptsr; } dacc_t; /** * Memory mapping for the DACC */ #define DACC_BASE_ADDRESS 0x4003C000 volatile dacc_t* DACC = (volatile dacc_t *) DACC_BASE_ADDRESS; // DACC Base Address #define DACC_MAX_CHANNELS 2 #endif //SAM3SADCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/eefc/000077500000000000000000000000001207233610700215265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/eefc/sam3eefchardware.h000066400000000000000000000035361207233610700251120ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #ifndef SAM3SEEFCHARDWARE_H #define SAM3SEEFCHARDWARE_H #include "eefchardware.h" /** * Memory mapping for the EEFC0. No EEFC1 on the Sam3S. */ volatile eefc_t* EEFC0 = (volatile eefc_t*) 0x400E0A00; // EEFC0 Base Address #endif // SAM3SEEFCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/matrix/000077500000000000000000000000001207233610700221305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/matrix/sam3matrixhardware.h000066400000000000000000000105111207233610700261050ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Bus Matrix register definitions. * * @author Thomas Schmid */ #ifndef _SAM3SMATRIXHARDWARE_H #define _SAM3SMATRIXHARDWARE_H #include "matrixhardware.h" /** * System I/O Configuration Register */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 4; uint32_t sysio4 : 1; uint32_t sysio5 : 1; uint32_t sysio6 : 1; uint32_t sysio7 : 1; uint32_t reserved1 : 2; uint32_t sysio10 : 1; uint32_t sysio11 : 1; uint32_t sysio12 : 1; uint32_t reserved2 : 19; }__attribute__((__packed__)) bits; } ccfg_sysio_t; /** * SMC NAND Flash Chip select Configuration Register */ typedef union { uint32_t flat; struct { uint32_t smc_nfcs0 : 1; uint32_t smc_nfcs1 : 1; uint32_t smc_nfcs2 : 1; uint32_t smc_nfcs3 : 1; uint32_t reserved : 28; }__attribute__((__packed__)) bits; } ccfg_smcnfcs_t; /** * Bus Matrix Register definitions, AT91 ARM Cortex-M3 based Microcontrollers * SAM3S Series, Preliminary, p. 352 */ typedef struct matrix { volatile matrix_mcfg_t mcfg0; // master configuration register 0 volatile matrix_mcfg_t mcfg1; // master configuration register 1 volatile matrix_mcfg_t mcfg2; // master configuration register 2 volatile matrix_mcfg_t mcfg3; // master configuration register 3 uint32_t reserved0[12]; volatile matrix_scfg_t scfg0; // slave confgiruation register 0 volatile matrix_scfg_t scfg1; // slave confgiruation register 1 volatile matrix_scfg_t scfg2; // slave confgiruation register 2 volatile matrix_scfg_t scfg3; // slave confgiruation register 3 volatile matrix_scfg_t scfg4; // slave confgiruation register 4 uint32_t reserved1[11]; volatile matrix_pras_t pras0; // priority register A for slave 0 uint32_t reserved2; volatile matrix_pras_t pras1; // priority register A for slave 0 uint32_t reserved3; volatile matrix_pras_t pras2; // priority register A for slave 0 uint32_t reserved4; volatile matrix_pras_t pras3; // priority register A for slave 0 uint32_t reserved5; volatile matrix_pras_t pras4; // priority register A for slave 0 uint32_t reserved6[28]; volatile ccfg_sysio_t sysio; // System I/O Configuration register uint32_t reserved7; volatile ccfg_smcnfcs_t smcnfcs; // SMC Chip Select NAND Flash Assignment Register uint32_t reserved8[49]; volatile matrix_wpmr_t wpmr; // Write Protect Mode Register volatile matrix_wpsr_t wpsr; // Write Protect Status Register } matrix_t; /** * Memory mapping for the MATRIX */ volatile matrix_t* MATRIX = (volatile matrix_t*) 0x400E0200; // MATRIX Base Address #endif // _SAM3SMATRIXHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/nvic/000077500000000000000000000000001207233610700215635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/nvic/HplNVICC.nc000066400000000000000000000172731207233610700234250ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3snvichardware.h" configuration HplNVICC { provides { interface HplNVICCntl; interface Init; interface HplNVICInterruptCntl as SUPCInterrupt; // SUPPLY CONTROLLER interface HplNVICInterruptCntl as RSTCInterrupt; // RESET CONTROLLER interface HplNVICInterruptCntl as RTCInterrupt; // REAL TIME CLOCK interface HplNVICInterruptCntl as RTTInterrupt; // REAL TIME TIMER interface HplNVICInterruptCntl as WDGInterrupt; // WATCHDOG TIMER interface HplNVICInterruptCntl as PMCInterrupt; // PMC interface HplNVICInterruptCntl as EFC0Interrupt; // EFC interface HplNVICInterruptCntl as RES0Interrupt; // Reserved interface HplNVICInterruptCntl as UART0Interrupt; // UART0 interface HplNVICInterruptCntl as UART1Interrupt; // UART1 interface HplNVICInterruptCntl as SMCInterrupt; // SMC interface HplNVICInterruptCntl as PIOAInterrupt; // PARALLEL I/O CONTROLLER A interface HplNVICInterruptCntl as PIOBInterrupt; // PARALLEL I/O CONTROLLER B interface HplNVICInterruptCntl as PIOCInterrupt; // PARALLEL I/O CONTROLLER C interface HplNVICInterruptCntl as USART0Interrupt; // USART0 interface HplNVICInterruptCntl as USART1Interrupt; // USART1 interface HplNVICInterruptCntl as RES1Interrupt; // Reserved interface HplNVICInterruptCntl as RES2Interrupt; // Reserved interface HplNVICInterruptCntl as HSMCIInterrupt; // HIGH SPEED MULTIMEDIA CARD INTERFACE interface HplNVICInterruptCntl as TWI0Interrupt; // TWO WIRE INTERFACE 0 interface HplNVICInterruptCntl as TWI1Interrupt; // TWO WIRE INTERFACE 1 interface HplNVICInterruptCntl as SPIInterrupt; // SERIAL PERIPHERAL INTERFACE interface HplNVICInterruptCntl as SSCInterrupt; // SYNCHRONOUS SERIAL CONTROLLER interface HplNVICInterruptCntl as TC0Interrupt; // TIMER/COUNTER 0 interface HplNVICInterruptCntl as TC1Interrupt; // TIMER/COUNTER 1 interface HplNVICInterruptCntl as TC2Interrupt; // TIMER/COUNTER 2 interface HplNVICInterruptCntl as TC3Interrupt; // TIMER/COUNTER 3 interface HplNVICInterruptCntl as TC4Interrupt; // TIMER/COUNTER 4 interface HplNVICInterruptCntl as TC5Interrupt; // TIMER/COUNTER 5 interface HplNVICInterruptCntl as ADCInterrupt; // ANALOG-TO-DIGITAL CONVERTER interface HplNVICInterruptCntl as DACCInterrupt; // DIGITAL-TO-ANALOG CONVERTE interface HplNVICInterruptCntl as PWMInterrupt; // PULSE WIDTH MODULATION interface HplNVICInterruptCntl as CRCCUInterrupt; // CRC CALCULATION UNIT interface HplNVICInterruptCntl as ACCInterrupt; // ANALOG COMPARATOR interface HplNVICInterruptCntl as UDPInterrupt; // USB DEVICE PORT } } implementation { components HplNVICCntlP, new HplNVICInterruptP(AT91C_ID_SUPC) as SUPC , new HplNVICInterruptP(AT91C_ID_RSTC) as RSTC , new HplNVICInterruptP(AT91C_ID_RTC) as RTC , new HplNVICInterruptP(AT91C_ID_RTT) as RTT , new HplNVICInterruptP(AT91C_ID_WDG) as WDG , new HplNVICInterruptP(AT91C_ID_PMC) as PMC , new HplNVICInterruptP(AT91C_ID_EFC0) as EFC0 , new HplNVICInterruptP(AT91C_ID_RES0) as RES0 , new HplNVICInterruptP(AT91C_ID_UART0) as UART0 , new HplNVICInterruptP(AT91C_ID_UART1) as UART1 , new HplNVICInterruptP(AT91C_ID_SMC) as SMC , new HplNVICInterruptP(AT91C_ID_PIOA) as PIOA , new HplNVICInterruptP(AT91C_ID_PIOB) as PIOB , new HplNVICInterruptP(AT91C_ID_PIOC) as PIOC , new HplNVICInterruptP(AT91C_ID_USART0) as USART0, new HplNVICInterruptP(AT91C_ID_USART1) as USART1, new HplNVICInterruptP(AT91C_ID_RES1) as RES1 , new HplNVICInterruptP(AT91C_ID_RES2) as RES2 , new HplNVICInterruptP(AT91C_ID_HSMCI) as HSMCI , new HplNVICInterruptP(AT91C_ID_TWI0) as TWI0 , new HplNVICInterruptP(AT91C_ID_TWI1) as TWI1 , new HplNVICInterruptP(AT91C_ID_SPI) as SPI , new HplNVICInterruptP(AT91C_ID_SSC) as SSC , new HplNVICInterruptP(AT91C_ID_TC0) as TC0 , new HplNVICInterruptP(AT91C_ID_TC1) as TC1 , new HplNVICInterruptP(AT91C_ID_TC2) as TC2 , new HplNVICInterruptP(AT91C_ID_TC3) as TC3 , new HplNVICInterruptP(AT91C_ID_TC4) as TC4 , new HplNVICInterruptP(AT91C_ID_TC5) as TC5 , new HplNVICInterruptP(AT91C_ID_ADC) as ADC , new HplNVICInterruptP(AT91C_ID_DACC) as DACC , new HplNVICInterruptP(AT91C_ID_PWM) as PWM , new HplNVICInterruptP(AT91C_ID_CRCCU) as CRCCU , new HplNVICInterruptP(AT91C_ID_ACC) as ACC , new HplNVICInterruptP(AT91C_ID_UDP) as UDP ; HplNVICCntl = HplNVICCntlP; Init = HplNVICCntlP; SUPCInterrupt = SUPC.Cntl; RSTCInterrupt = RSTC.Cntl; RTCInterrupt = RTC.Cntl; RTTInterrupt = RTT.Cntl; WDGInterrupt = WDG.Cntl; PMCInterrupt = PMC.Cntl; EFC0Interrupt = EFC0.Cntl; RES0Interrupt = RES0.Cntl; UART0Interrupt = UART0.Cntl; UART1Interrupt = UART1.Cntl; SMCInterrupt = SMC.Cntl; PIOAInterrupt = PIOA.Cntl; PIOBInterrupt = PIOB.Cntl; PIOCInterrupt = PIOC.Cntl; USART0Interrupt = USART0.Cntl; USART1Interrupt = USART1.Cntl; RES1Interrupt = RES1.Cntl; RES2Interrupt = RES2.Cntl; HSMCIInterrupt = HSMCI.Cntl; TWI0Interrupt = TWI0.Cntl; TWI1Interrupt = TWI1.Cntl; SPIInterrupt = SPI.Cntl; SSCInterrupt = SSC.Cntl; TC0Interrupt = TC0.Cntl; TC1Interrupt = TC1.Cntl; TC2Interrupt = TC2.Cntl; TC3Interrupt = TC3.Cntl; TC4Interrupt = TC4.Cntl; TC5Interrupt = TC5.Cntl; ADCInterrupt = ADC.Cntl; DACCInterrupt = DACC.Cntl; PWMInterrupt = PWM.Cntl; CRCCUInterrupt = CRCCU.Cntl; ACCInterrupt = ACC.Cntl; UDPInterrupt = UDP.Cntl; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/nvic/sam3snvichardware.h000066400000000000000000000120761207233610700253660ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ #ifndef SAM3SNVICHARDWARE_H #define SAM3SNVICHARDWARE_H #include "nvichardware.h" #include "sam3shardware.h" /// Interrupt sources typedef enum irqn { /****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ /****** AT91SAM3U4 specific Interrupt Numbers *********************************************************/ IRQn_SUPC = AT91C_ID_SUPC , // SUPPLY CONTROLLER IRQn_RSTC = AT91C_ID_RSTC , // RESET CONTROLLER IRQn_RTC = AT91C_ID_RTC , // REAL TIME CLOCK IRQn_RTT = AT91C_ID_RTT , // REAL TIME TIMER IRQn_WDG = AT91C_ID_WDG , // WATCHDOG TIMER IRQn_PMC = AT91C_ID_PMC , // PMC IRQn_EFC0 = AT91C_ID_EFC0 , // EFC IRQn_RES0 = AT91C_ID_RES0 , // Reserved IRQn_UART0 = AT91C_ID_UART0 , // UART0 IRQn_UART1 = AT91C_ID_UART1 , // UART1 IRQn_SMC = AT91C_ID_SMC , // SMC IRQn_PIOA = AT91C_ID_PIOA , // PARALLEL I/O CONTROLLER A IRQn_PIOB = AT91C_ID_PIOB , // PARALLEL I/O CONTROLLER B IRQn_PIOC = AT91C_ID_PIOC , // PARALLEL I/O CONTROLLER C IRQn_USART0 = AT91C_ID_USART0, // USART0 IRQn_USART1 = AT91C_ID_USART1, // USART1 IRQn_RES1 = AT91C_ID_RES1 , // Reserved IRQn_RES2 = AT91C_ID_RES2 , // Reserved IRQn_HSMCI = AT91C_ID_HSMCI , // HIGH SPEED MULTIMEDIA CARD INTERFACE IRQn_TWI0 = AT91C_ID_TWI0 , // TWO WIRE INTERFACE 0 IRQn_TWI1 = AT91C_ID_TWI1 , // TWO WIRE INTERFACE 1 IRQn_SPI = AT91C_ID_SPI , // SERIAL PERIPHERAL INTERFACE IRQn_SSC = AT91C_ID_SSC , // SYNCHRONOUS SERIAL CONTROLLER IRQn_TC0 = AT91C_ID_TC0 , // TIMER/COUNTER 0 IRQn_TC1 = AT91C_ID_TC1 , // TIMER/COUNTER 1 IRQn_TC2 = AT91C_ID_TC2 , // TIMER/COUNTER 2 IRQn_TC3 = AT91C_ID_TC3 , // TIMER/COUNTER 3 IRQn_TC4 = AT91C_ID_TC4 , // TIMER/COUNTER 4 IRQn_TC5 = AT91C_ID_TC5 , // TIMER/COUNTER 5 IRQn_ADC = AT91C_ID_ADC , // ANALOG-TO-DIGITAL CONVERTER IRQn_DACC = AT91C_ID_DACC , // DIGITAL-TO-ANALOG CONVERTE IRQn_PWM = AT91C_ID_PWM , // PULSE WIDTH MODULATION IRQn_CRCCU = AT91C_ID_CRCCU , // CRC CALCULATION UNIT IRQn_ACC = AT91C_ID_ACC , // ANALOG COMPARATOR IRQn_UDP = AT91C_ID_UDP // USB DEVICE PORT } irqn_t; #endif // SAM3SNVICHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pdc/000077500000000000000000000000001207233610700213725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pdc/HplSam3sPdcC.nc000066400000000000000000000042331207233610700241020ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Thomas Schmid */ #include "sam3sadchardware.h" #include "sam3sdacchardware.h" #include "sam3spwmhardware.h" configuration HplSam3sPdcC { provides { interface HplSam3Pdc as AdcPdcControl; interface HplSam3Pdc as DacPdcControl; interface HplSam3Pdc as PwmPdcControl; } } implementation { components new HplSam3PdcP(ADC_BASE_ADDRESS) as AdcPdc; components new HplSam3PdcP(DACC_BASE_ADDRESS) as DacPdc; components new HplSam3PdcP(PWM_BASE_ADDRESS) as PwmPdc; AdcPdcControl = AdcPdc; DacPdcControl = DacPdc; PwmPdcControl = PwmPdc; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pins/000077500000000000000000000000001207233610700215755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pins/HplSam3sGeneralIOC.nc000066400000000000000000000742511207233610700254130ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * General-purpose I/O abstraction for the SAM3S. * Includes PIO controllers A, B, C with 32 pins each. * TODO: There are other capabilities that are not integrated yet: * - pull down * - shitt trigger * - parallel capture * * @author Wanja Hofer * @author Thomas Schmid */ configuration HplSam3sGeneralIOC { provides { interface GeneralIO as PioA0; interface GeneralIO as PioA1; interface GeneralIO as PioA2; interface GeneralIO as PioA3; interface GeneralIO as PioA4; interface GeneralIO as PioA5; interface GeneralIO as PioA6; interface GeneralIO as PioA7; interface GeneralIO as PioA8; interface GeneralIO as PioA9; interface GeneralIO as PioA10; interface GeneralIO as PioA11; interface GeneralIO as PioA12; interface GeneralIO as PioA13; interface GeneralIO as PioA14; interface GeneralIO as PioA15; interface GeneralIO as PioA16; interface GeneralIO as PioA17; interface GeneralIO as PioA18; interface GeneralIO as PioA19; interface GeneralIO as PioA20; interface GeneralIO as PioA21; interface GeneralIO as PioA22; interface GeneralIO as PioA23; interface GeneralIO as PioA24; interface GeneralIO as PioA25; interface GeneralIO as PioA26; interface GeneralIO as PioA27; interface GeneralIO as PioA28; interface GeneralIO as PioA29; interface GeneralIO as PioA30; interface GeneralIO as PioA31; interface GeneralIO as PioB0; interface GeneralIO as PioB1; interface GeneralIO as PioB2; interface GeneralIO as PioB3; interface GeneralIO as PioB4; interface GeneralIO as PioB5; interface GeneralIO as PioB6; interface GeneralIO as PioB7; interface GeneralIO as PioB8; interface GeneralIO as PioB9; interface GeneralIO as PioB10; interface GeneralIO as PioB11; interface GeneralIO as PioB12; interface GeneralIO as PioB13; interface GeneralIO as PioB14; interface GeneralIO as PioB15; interface GeneralIO as PioB16; interface GeneralIO as PioB17; interface GeneralIO as PioB18; interface GeneralIO as PioB19; interface GeneralIO as PioB20; interface GeneralIO as PioB21; interface GeneralIO as PioB22; interface GeneralIO as PioB23; interface GeneralIO as PioB24; interface GeneralIO as PioB25; interface GeneralIO as PioB26; interface GeneralIO as PioB27; interface GeneralIO as PioB28; interface GeneralIO as PioB29; interface GeneralIO as PioB30; interface GeneralIO as PioB31; interface GeneralIO as PioC0; interface GeneralIO as PioC1; interface GeneralIO as PioC2; interface GeneralIO as PioC3; interface GeneralIO as PioC4; interface GeneralIO as PioC5; interface GeneralIO as PioC6; interface GeneralIO as PioC7; interface GeneralIO as PioC8; interface GeneralIO as PioC9; interface GeneralIO as PioC10; interface GeneralIO as PioC11; interface GeneralIO as PioC12; interface GeneralIO as PioC13; interface GeneralIO as PioC14; interface GeneralIO as PioC15; interface GeneralIO as PioC16; interface GeneralIO as PioC17; interface GeneralIO as PioC18; interface GeneralIO as PioC19; interface GeneralIO as PioC20; interface GeneralIO as PioC21; interface GeneralIO as PioC22; interface GeneralIO as PioC23; interface GeneralIO as PioC24; interface GeneralIO as PioC25; interface GeneralIO as PioC26; interface GeneralIO as PioC27; interface GeneralIO as PioC28; interface GeneralIO as PioC29; interface GeneralIO as PioC30; interface GeneralIO as PioC31; interface GpioInterrupt as InterruptPioA0; interface GpioInterrupt as InterruptPioA1; interface GpioInterrupt as InterruptPioA2; interface GpioInterrupt as InterruptPioA3; interface GpioInterrupt as InterruptPioA4; interface GpioInterrupt as InterruptPioA5; interface GpioInterrupt as InterruptPioA6; interface GpioInterrupt as InterruptPioA7; interface GpioInterrupt as InterruptPioA8; interface GpioInterrupt as InterruptPioA9; interface GpioInterrupt as InterruptPioA10; interface GpioInterrupt as InterruptPioA11; interface GpioInterrupt as InterruptPioA12; interface GpioInterrupt as InterruptPioA13; interface GpioInterrupt as InterruptPioA14; interface GpioInterrupt as InterruptPioA15; interface GpioInterrupt as InterruptPioA16; interface GpioInterrupt as InterruptPioA17; interface GpioInterrupt as InterruptPioA18; interface GpioInterrupt as InterruptPioA19; interface GpioInterrupt as InterruptPioA20; interface GpioInterrupt as InterruptPioA21; interface GpioInterrupt as InterruptPioA22; interface GpioInterrupt as InterruptPioA23; interface GpioInterrupt as InterruptPioA24; interface GpioInterrupt as InterruptPioA25; interface GpioInterrupt as InterruptPioA26; interface GpioInterrupt as InterruptPioA27; interface GpioInterrupt as InterruptPioA28; interface GpioInterrupt as InterruptPioA29; interface GpioInterrupt as InterruptPioA30; interface GpioInterrupt as InterruptPioA31; interface GpioInterrupt as InterruptPioB0; interface GpioInterrupt as InterruptPioB1; interface GpioInterrupt as InterruptPioB2; interface GpioInterrupt as InterruptPioB3; interface GpioInterrupt as InterruptPioB4; interface GpioInterrupt as InterruptPioB5; interface GpioInterrupt as InterruptPioB6; interface GpioInterrupt as InterruptPioB7; interface GpioInterrupt as InterruptPioB8; interface GpioInterrupt as InterruptPioB9; interface GpioInterrupt as InterruptPioB10; interface GpioInterrupt as InterruptPioB11; interface GpioInterrupt as InterruptPioB12; interface GpioInterrupt as InterruptPioB13; interface GpioInterrupt as InterruptPioB14; interface GpioInterrupt as InterruptPioB15; interface GpioInterrupt as InterruptPioB16; interface GpioInterrupt as InterruptPioB17; interface GpioInterrupt as InterruptPioB18; interface GpioInterrupt as InterruptPioB19; interface GpioInterrupt as InterruptPioB20; interface GpioInterrupt as InterruptPioB21; interface GpioInterrupt as InterruptPioB22; interface GpioInterrupt as InterruptPioB23; interface GpioInterrupt as InterruptPioB24; interface GpioInterrupt as InterruptPioB25; interface GpioInterrupt as InterruptPioB26; interface GpioInterrupt as InterruptPioB27; interface GpioInterrupt as InterruptPioB28; interface GpioInterrupt as InterruptPioB29; interface GpioInterrupt as InterruptPioB30; interface GpioInterrupt as InterruptPioB31; interface GpioInterrupt as InterruptPioC0; interface GpioInterrupt as InterruptPioC1; interface GpioInterrupt as InterruptPioC2; interface GpioInterrupt as InterruptPioC3; interface GpioInterrupt as InterruptPioC4; interface GpioInterrupt as InterruptPioC5; interface GpioInterrupt as InterruptPioC6; interface GpioInterrupt as InterruptPioC7; interface GpioInterrupt as InterruptPioC8; interface GpioInterrupt as InterruptPioC9; interface GpioInterrupt as InterruptPioC10; interface GpioInterrupt as InterruptPioC11; interface GpioInterrupt as InterruptPioC12; interface GpioInterrupt as InterruptPioC13; interface GpioInterrupt as InterruptPioC14; interface GpioInterrupt as InterruptPioC15; interface GpioInterrupt as InterruptPioC16; interface GpioInterrupt as InterruptPioC17; interface GpioInterrupt as InterruptPioC18; interface GpioInterrupt as InterruptPioC19; interface GpioInterrupt as InterruptPioC20; interface GpioInterrupt as InterruptPioC21; interface GpioInterrupt as InterruptPioC22; interface GpioInterrupt as InterruptPioC23; interface GpioInterrupt as InterruptPioC24; interface GpioInterrupt as InterruptPioC25; interface GpioInterrupt as InterruptPioC26; interface GpioInterrupt as InterruptPioC27; interface GpioInterrupt as InterruptPioC28; interface GpioInterrupt as InterruptPioC29; interface GpioInterrupt as InterruptPioC30; interface GpioInterrupt as InterruptPioC31; interface GpioCapture as CapturePioA0; interface GpioCapture as CapturePioA1; interface GpioCapture as CapturePioA2; interface GpioCapture as CapturePioA3; interface GpioCapture as CapturePioA4; interface GpioCapture as CapturePioA5; interface GpioCapture as CapturePioA6; interface GpioCapture as CapturePioA7; interface GpioCapture as CapturePioA8; interface GpioCapture as CapturePioA9; interface GpioCapture as CapturePioA10; interface GpioCapture as CapturePioA11; interface GpioCapture as CapturePioA12; interface GpioCapture as CapturePioA13; interface GpioCapture as CapturePioA14; interface GpioCapture as CapturePioA15; interface GpioCapture as CapturePioA16; interface GpioCapture as CapturePioA17; interface GpioCapture as CapturePioA18; interface GpioCapture as CapturePioA19; interface GpioCapture as CapturePioA20; interface GpioCapture as CapturePioA21; interface GpioCapture as CapturePioA22; interface GpioCapture as CapturePioA23; interface GpioCapture as CapturePioA24; interface GpioCapture as CapturePioA25; interface GpioCapture as CapturePioA26; interface GpioCapture as CapturePioA27; interface GpioCapture as CapturePioA28; interface GpioCapture as CapturePioA29; interface GpioCapture as CapturePioA30; interface GpioCapture as CapturePioA31; interface GpioCapture as CapturePioB0; interface GpioCapture as CapturePioB1; interface GpioCapture as CapturePioB2; interface GpioCapture as CapturePioB3; interface GpioCapture as CapturePioB4; interface GpioCapture as CapturePioB5; interface GpioCapture as CapturePioB6; interface GpioCapture as CapturePioB7; interface GpioCapture as CapturePioB8; interface GpioCapture as CapturePioB9; interface GpioCapture as CapturePioB10; interface GpioCapture as CapturePioB11; interface GpioCapture as CapturePioB12; interface GpioCapture as CapturePioB13; interface GpioCapture as CapturePioB14; interface GpioCapture as CapturePioB15; interface GpioCapture as CapturePioB16; interface GpioCapture as CapturePioB17; interface GpioCapture as CapturePioB18; interface GpioCapture as CapturePioB19; interface GpioCapture as CapturePioB20; interface GpioCapture as CapturePioB21; interface GpioCapture as CapturePioB22; interface GpioCapture as CapturePioB23; interface GpioCapture as CapturePioB24; interface GpioCapture as CapturePioB25; interface GpioCapture as CapturePioB26; interface GpioCapture as CapturePioB27; interface GpioCapture as CapturePioB28; interface GpioCapture as CapturePioB29; interface GpioCapture as CapturePioB30; interface GpioCapture as CapturePioB31; interface GpioCapture as CapturePioC0; interface GpioCapture as CapturePioC1; interface GpioCapture as CapturePioC2; interface GpioCapture as CapturePioC3; interface GpioCapture as CapturePioC4; interface GpioCapture as CapturePioC5; interface GpioCapture as CapturePioC6; interface GpioCapture as CapturePioC7; interface GpioCapture as CapturePioC8; interface GpioCapture as CapturePioC9; interface GpioCapture as CapturePioC10; interface GpioCapture as CapturePioC11; interface GpioCapture as CapturePioC12; interface GpioCapture as CapturePioC13; interface GpioCapture as CapturePioC14; interface GpioCapture as CapturePioC15; interface GpioCapture as CapturePioC16; interface GpioCapture as CapturePioC17; interface GpioCapture as CapturePioC18; interface GpioCapture as CapturePioC19; interface GpioCapture as CapturePioC20; interface GpioCapture as CapturePioC21; interface GpioCapture as CapturePioC22; interface GpioCapture as CapturePioC23; interface GpioCapture as CapturePioC24; interface GpioCapture as CapturePioC25; interface GpioCapture as CapturePioC26; interface GpioCapture as CapturePioC27; interface GpioCapture as CapturePioC28; interface GpioCapture as CapturePioC29; interface GpioCapture as CapturePioC30; interface GpioCapture as CapturePioC31; interface HplSam3GeneralIOPin as HplPioA0; interface HplSam3GeneralIOPin as HplPioA1; interface HplSam3GeneralIOPin as HplPioA2; interface HplSam3GeneralIOPin as HplPioA3; interface HplSam3GeneralIOPin as HplPioA4; interface HplSam3GeneralIOPin as HplPioA5; interface HplSam3GeneralIOPin as HplPioA6; interface HplSam3GeneralIOPin as HplPioA7; interface HplSam3GeneralIOPin as HplPioA8; interface HplSam3GeneralIOPin as HplPioA9; interface HplSam3GeneralIOPin as HplPioA10; interface HplSam3GeneralIOPin as HplPioA11; interface HplSam3GeneralIOPin as HplPioA12; interface HplSam3GeneralIOPin as HplPioA13; interface HplSam3GeneralIOPin as HplPioA14; interface HplSam3GeneralIOPin as HplPioA15; interface HplSam3GeneralIOPin as HplPioA16; interface HplSam3GeneralIOPin as HplPioA17; interface HplSam3GeneralIOPin as HplPioA18; interface HplSam3GeneralIOPin as HplPioA19; interface HplSam3GeneralIOPin as HplPioA20; interface HplSam3GeneralIOPin as HplPioA21; interface HplSam3GeneralIOPin as HplPioA22; interface HplSam3GeneralIOPin as HplPioA23; interface HplSam3GeneralIOPin as HplPioA24; interface HplSam3GeneralIOPin as HplPioA25; interface HplSam3GeneralIOPin as HplPioA26; interface HplSam3GeneralIOPin as HplPioA27; interface HplSam3GeneralIOPin as HplPioA28; interface HplSam3GeneralIOPin as HplPioA29; interface HplSam3GeneralIOPin as HplPioA30; interface HplSam3GeneralIOPin as HplPioA31; interface HplSam3GeneralIOPin as HplPioB0; interface HplSam3GeneralIOPin as HplPioB1; interface HplSam3GeneralIOPin as HplPioB2; interface HplSam3GeneralIOPin as HplPioB3; interface HplSam3GeneralIOPin as HplPioB4; interface HplSam3GeneralIOPin as HplPioB5; interface HplSam3GeneralIOPin as HplPioB6; interface HplSam3GeneralIOPin as HplPioB7; interface HplSam3GeneralIOPin as HplPioB8; interface HplSam3GeneralIOPin as HplPioB9; interface HplSam3GeneralIOPin as HplPioB10; interface HplSam3GeneralIOPin as HplPioB11; interface HplSam3GeneralIOPin as HplPioB12; interface HplSam3GeneralIOPin as HplPioB13; interface HplSam3GeneralIOPin as HplPioB14; interface HplSam3GeneralIOPin as HplPioB15; interface HplSam3GeneralIOPin as HplPioB16; interface HplSam3GeneralIOPin as HplPioB17; interface HplSam3GeneralIOPin as HplPioB18; interface HplSam3GeneralIOPin as HplPioB19; interface HplSam3GeneralIOPin as HplPioB20; interface HplSam3GeneralIOPin as HplPioB21; interface HplSam3GeneralIOPin as HplPioB22; interface HplSam3GeneralIOPin as HplPioB23; interface HplSam3GeneralIOPin as HplPioB24; interface HplSam3GeneralIOPin as HplPioB25; interface HplSam3GeneralIOPin as HplPioB26; interface HplSam3GeneralIOPin as HplPioB27; interface HplSam3GeneralIOPin as HplPioB28; interface HplSam3GeneralIOPin as HplPioB29; interface HplSam3GeneralIOPin as HplPioB30; interface HplSam3GeneralIOPin as HplPioB31; interface HplSam3GeneralIOPin as HplPioC0; interface HplSam3GeneralIOPin as HplPioC1; interface HplSam3GeneralIOPin as HplPioC2; interface HplSam3GeneralIOPin as HplPioC3; interface HplSam3GeneralIOPin as HplPioC4; interface HplSam3GeneralIOPin as HplPioC5; interface HplSam3GeneralIOPin as HplPioC6; interface HplSam3GeneralIOPin as HplPioC7; interface HplSam3GeneralIOPin as HplPioC8; interface HplSam3GeneralIOPin as HplPioC9; interface HplSam3GeneralIOPin as HplPioC10; interface HplSam3GeneralIOPin as HplPioC11; interface HplSam3GeneralIOPin as HplPioC12; interface HplSam3GeneralIOPin as HplPioC13; interface HplSam3GeneralIOPin as HplPioC14; interface HplSam3GeneralIOPin as HplPioC15; interface HplSam3GeneralIOPin as HplPioC16; interface HplSam3GeneralIOPin as HplPioC17; interface HplSam3GeneralIOPin as HplPioC18; interface HplSam3GeneralIOPin as HplPioC19; interface HplSam3GeneralIOPin as HplPioC20; interface HplSam3GeneralIOPin as HplPioC21; interface HplSam3GeneralIOPin as HplPioC22; interface HplSam3GeneralIOPin as HplPioC23; interface HplSam3GeneralIOPin as HplPioC24; interface HplSam3GeneralIOPin as HplPioC25; interface HplSam3GeneralIOPin as HplPioC26; interface HplSam3GeneralIOPin as HplPioC27; interface HplSam3GeneralIOPin as HplPioC28; interface HplSam3GeneralIOPin as HplPioC29; interface HplSam3GeneralIOPin as HplPioC30; interface HplSam3GeneralIOPin as HplPioC31; } } implementation { components new HplSam3GeneralIOPioC(0x400e0e00) as PioA, new HplSam3GeneralIOPioC(0x400e1000) as PioB, new HplSam3GeneralIOPioC(0x400e1200) as PioC; components HplSam3GeneralIOP; PioA.HplPort -> HplSam3GeneralIOP.HplPortA; PioB.HplPort -> HplSam3GeneralIOP.HplPortB; PioC.HplPort -> HplSam3GeneralIOP.HplPortC; components McuSleepC; HplSam3GeneralIOP.PioAInterruptWrapper -> McuSleepC; HplSam3GeneralIOP.PioBInterruptWrapper -> McuSleepC; HplSam3GeneralIOP.PioCInterruptWrapper -> McuSleepC; components HplNVICC, HplSam3sClockC; PioA.PIOIrqControl -> HplNVICC.PIOAInterrupt; PioA.PIOClockControl -> HplSam3sClockC.PIOACntl; PioB.PIOIrqControl -> HplNVICC.PIOBInterrupt; PioB.PIOClockControl -> HplSam3sClockC.PIOBCntl; PioC.PIOIrqControl -> HplNVICC.PIOCInterrupt; PioC.PIOClockControl -> HplSam3sClockC.PIOCCntl; PioA0 = PioA.Pin0; PioA1 = PioA.Pin1; PioA2 = PioA.Pin2; PioA3 = PioA.Pin3; PioA4 = PioA.Pin4; PioA5 = PioA.Pin5; PioA6 = PioA.Pin6; PioA7 = PioA.Pin7; PioA8 = PioA.Pin8; PioA9 = PioA.Pin9; PioA10 = PioA.Pin10; PioA11 = PioA.Pin11; PioA12 = PioA.Pin12; PioA13 = PioA.Pin13; PioA14 = PioA.Pin14; PioA15 = PioA.Pin15; PioA16 = PioA.Pin16; PioA17 = PioA.Pin17; PioA18 = PioA.Pin18; PioA19 = PioA.Pin19; PioA20 = PioA.Pin20; PioA21 = PioA.Pin21; PioA22 = PioA.Pin22; PioA23 = PioA.Pin23; PioA24 = PioA.Pin24; PioA25 = PioA.Pin25; PioA26 = PioA.Pin26; PioA27 = PioA.Pin27; PioA28 = PioA.Pin28; PioA29 = PioA.Pin29; PioA30 = PioA.Pin30; PioA31 = PioA.Pin31; PioB0 = PioB.Pin0; PioB1 = PioB.Pin1; PioB2 = PioB.Pin2; PioB3 = PioB.Pin3; PioB4 = PioB.Pin4; PioB5 = PioB.Pin5; PioB6 = PioB.Pin6; PioB7 = PioB.Pin7; PioB8 = PioB.Pin8; PioB9 = PioB.Pin9; PioB10 = PioB.Pin10; PioB11 = PioB.Pin11; PioB12 = PioB.Pin12; PioB13 = PioB.Pin13; PioB14 = PioB.Pin14; PioB15 = PioB.Pin15; PioB16 = PioB.Pin16; PioB17 = PioB.Pin17; PioB18 = PioB.Pin18; PioB19 = PioB.Pin19; PioB20 = PioB.Pin20; PioB21 = PioB.Pin21; PioB22 = PioB.Pin22; PioB23 = PioB.Pin23; PioB24 = PioB.Pin24; PioB25 = PioB.Pin25; PioB26 = PioB.Pin26; PioB27 = PioB.Pin27; PioB28 = PioB.Pin28; PioB29 = PioB.Pin29; PioB30 = PioB.Pin30; PioB31 = PioB.Pin31; PioC0 = PioC.Pin0; PioC1 = PioC.Pin1; PioC2 = PioC.Pin2; PioC3 = PioC.Pin3; PioC4 = PioC.Pin4; PioC5 = PioC.Pin5; PioC6 = PioC.Pin6; PioC7 = PioC.Pin7; PioC8 = PioC.Pin8; PioC9 = PioC.Pin9; PioC10 = PioC.Pin10; PioC11 = PioC.Pin11; PioC12 = PioC.Pin12; PioC13 = PioC.Pin13; PioC14 = PioC.Pin14; PioC15 = PioC.Pin15; PioC16 = PioC.Pin16; PioC17 = PioC.Pin17; PioC18 = PioC.Pin18; PioC19 = PioC.Pin19; PioC20 = PioC.Pin20; PioC21 = PioC.Pin21; PioC22 = PioC.Pin22; PioC23 = PioC.Pin23; PioC24 = PioC.Pin24; PioC25 = PioC.Pin25; PioC26 = PioC.Pin26; PioC27 = PioC.Pin27; PioC28 = PioC.Pin28; PioC29 = PioC.Pin29; PioC30 = PioC.Pin30; PioC31 = PioC.Pin31; InterruptPioA0 = PioA.InterruptPin0; InterruptPioA1 = PioA.InterruptPin1; InterruptPioA2 = PioA.InterruptPin2; InterruptPioA3 = PioA.InterruptPin3; InterruptPioA4 = PioA.InterruptPin4; InterruptPioA5 = PioA.InterruptPin5; InterruptPioA6 = PioA.InterruptPin6; InterruptPioA7 = PioA.InterruptPin7; InterruptPioA8 = PioA.InterruptPin8; InterruptPioA9 = PioA.InterruptPin9; InterruptPioA10 = PioA.InterruptPin10; InterruptPioA11 = PioA.InterruptPin11; InterruptPioA12 = PioA.InterruptPin12; InterruptPioA13 = PioA.InterruptPin13; InterruptPioA14 = PioA.InterruptPin14; InterruptPioA15 = PioA.InterruptPin15; InterruptPioA16 = PioA.InterruptPin16; InterruptPioA17 = PioA.InterruptPin17; InterruptPioA18 = PioA.InterruptPin18; InterruptPioA19 = PioA.InterruptPin19; InterruptPioA20 = PioA.InterruptPin20; InterruptPioA21 = PioA.InterruptPin21; InterruptPioA22 = PioA.InterruptPin22; InterruptPioA23 = PioA.InterruptPin23; InterruptPioA24 = PioA.InterruptPin24; InterruptPioA25 = PioA.InterruptPin25; InterruptPioA26 = PioA.InterruptPin26; InterruptPioA27 = PioA.InterruptPin27; InterruptPioA28 = PioA.InterruptPin28; InterruptPioA29 = PioA.InterruptPin29; InterruptPioA30 = PioA.InterruptPin30; InterruptPioA31 = PioA.InterruptPin31; InterruptPioB0 = PioB.InterruptPin0; InterruptPioB1 = PioB.InterruptPin1; InterruptPioB2 = PioB.InterruptPin2; InterruptPioB3 = PioB.InterruptPin3; InterruptPioB4 = PioB.InterruptPin4; InterruptPioB5 = PioB.InterruptPin5; InterruptPioB6 = PioB.InterruptPin6; InterruptPioB7 = PioB.InterruptPin7; InterruptPioB8 = PioB.InterruptPin8; InterruptPioB9 = PioB.InterruptPin9; InterruptPioB10 = PioB.InterruptPin10; InterruptPioB11 = PioB.InterruptPin11; InterruptPioB12 = PioB.InterruptPin12; InterruptPioB13 = PioB.InterruptPin13; InterruptPioB14 = PioB.InterruptPin14; InterruptPioB15 = PioB.InterruptPin15; InterruptPioB16 = PioB.InterruptPin16; InterruptPioB17 = PioB.InterruptPin17; InterruptPioB18 = PioB.InterruptPin18; InterruptPioB19 = PioB.InterruptPin19; InterruptPioB20 = PioB.InterruptPin20; InterruptPioB21 = PioB.InterruptPin21; InterruptPioB22 = PioB.InterruptPin22; InterruptPioB23 = PioB.InterruptPin23; InterruptPioB24 = PioB.InterruptPin24; InterruptPioB25 = PioB.InterruptPin25; InterruptPioB26 = PioB.InterruptPin26; InterruptPioB27 = PioB.InterruptPin27; InterruptPioB28 = PioB.InterruptPin28; InterruptPioB29 = PioB.InterruptPin29; InterruptPioB30 = PioB.InterruptPin30; InterruptPioB31 = PioB.InterruptPin31; InterruptPioC0 = PioC.InterruptPin0; InterruptPioC1 = PioC.InterruptPin1; InterruptPioC2 = PioC.InterruptPin2; InterruptPioC3 = PioC.InterruptPin3; InterruptPioC4 = PioC.InterruptPin4; InterruptPioC5 = PioC.InterruptPin5; InterruptPioC6 = PioC.InterruptPin6; InterruptPioC7 = PioC.InterruptPin7; InterruptPioC8 = PioC.InterruptPin8; InterruptPioC9 = PioC.InterruptPin9; InterruptPioC10 = PioC.InterruptPin10; InterruptPioC11 = PioC.InterruptPin11; InterruptPioC12 = PioC.InterruptPin12; InterruptPioC13 = PioC.InterruptPin13; InterruptPioC14 = PioC.InterruptPin14; InterruptPioC15 = PioC.InterruptPin15; InterruptPioC16 = PioC.InterruptPin16; InterruptPioC17 = PioC.InterruptPin17; InterruptPioC18 = PioC.InterruptPin18; InterruptPioC19 = PioC.InterruptPin19; InterruptPioC20 = PioC.InterruptPin20; InterruptPioC21 = PioC.InterruptPin21; InterruptPioC22 = PioC.InterruptPin22; InterruptPioC23 = PioC.InterruptPin23; InterruptPioC24 = PioC.InterruptPin24; InterruptPioC25 = PioC.InterruptPin25; InterruptPioC26 = PioC.InterruptPin26; InterruptPioC27 = PioC.InterruptPin27; InterruptPioC28 = PioC.InterruptPin28; InterruptPioC29 = PioC.InterruptPin29; InterruptPioC30 = PioC.InterruptPin30; InterruptPioC31 = PioC.InterruptPin31; CapturePioA0 = PioA.CapturePin0; CapturePioA1 = PioA.CapturePin1; CapturePioA2 = PioA.CapturePin2; CapturePioA3 = PioA.CapturePin3; CapturePioA4 = PioA.CapturePin4; CapturePioA5 = PioA.CapturePin5; CapturePioA6 = PioA.CapturePin6; CapturePioA7 = PioA.CapturePin7; CapturePioA8 = PioA.CapturePin8; CapturePioA9 = PioA.CapturePin9; CapturePioA10 = PioA.CapturePin10; CapturePioA11 = PioA.CapturePin11; CapturePioA12 = PioA.CapturePin12; CapturePioA13 = PioA.CapturePin13; CapturePioA14 = PioA.CapturePin14; CapturePioA15 = PioA.CapturePin15; CapturePioA16 = PioA.CapturePin16; CapturePioA17 = PioA.CapturePin17; CapturePioA18 = PioA.CapturePin18; CapturePioA19 = PioA.CapturePin19; CapturePioA20 = PioA.CapturePin20; CapturePioA21 = PioA.CapturePin21; CapturePioA22 = PioA.CapturePin22; CapturePioA23 = PioA.CapturePin23; CapturePioA24 = PioA.CapturePin24; CapturePioA25 = PioA.CapturePin25; CapturePioA26 = PioA.CapturePin26; CapturePioA27 = PioA.CapturePin27; CapturePioA28 = PioA.CapturePin28; CapturePioA29 = PioA.CapturePin29; CapturePioA30 = PioA.CapturePin30; CapturePioA31 = PioA.CapturePin31; CapturePioB0 = PioB.CapturePin0; CapturePioB1 = PioB.CapturePin1; CapturePioB2 = PioB.CapturePin2; CapturePioB3 = PioB.CapturePin3; CapturePioB4 = PioB.CapturePin4; CapturePioB5 = PioB.CapturePin5; CapturePioB6 = PioB.CapturePin6; CapturePioB7 = PioB.CapturePin7; CapturePioB8 = PioB.CapturePin8; CapturePioB9 = PioB.CapturePin9; CapturePioB10 = PioB.CapturePin10; CapturePioB11 = PioB.CapturePin11; CapturePioB12 = PioB.CapturePin12; CapturePioB13 = PioB.CapturePin13; CapturePioB14 = PioB.CapturePin14; CapturePioB15 = PioB.CapturePin15; CapturePioB16 = PioB.CapturePin16; CapturePioB17 = PioB.CapturePin17; CapturePioB18 = PioB.CapturePin18; CapturePioB19 = PioB.CapturePin19; CapturePioB20 = PioB.CapturePin20; CapturePioB21 = PioB.CapturePin21; CapturePioB22 = PioB.CapturePin22; CapturePioB23 = PioB.CapturePin23; CapturePioB24 = PioB.CapturePin24; CapturePioB25 = PioB.CapturePin25; CapturePioB26 = PioB.CapturePin26; CapturePioB27 = PioB.CapturePin27; CapturePioB28 = PioB.CapturePin28; CapturePioB29 = PioB.CapturePin29; CapturePioB30 = PioB.CapturePin30; CapturePioB31 = PioB.CapturePin31; CapturePioC0 = PioC.CapturePin0; CapturePioC1 = PioC.CapturePin1; CapturePioC2 = PioC.CapturePin2; CapturePioC3 = PioC.CapturePin3; CapturePioC4 = PioC.CapturePin4; CapturePioC5 = PioC.CapturePin5; CapturePioC6 = PioC.CapturePin6; CapturePioC7 = PioC.CapturePin7; CapturePioC8 = PioC.CapturePin8; CapturePioC9 = PioC.CapturePin9; CapturePioC10 = PioC.CapturePin10; CapturePioC11 = PioC.CapturePin11; CapturePioC12 = PioC.CapturePin12; CapturePioC13 = PioC.CapturePin13; CapturePioC14 = PioC.CapturePin14; CapturePioC15 = PioC.CapturePin15; CapturePioC16 = PioC.CapturePin16; CapturePioC17 = PioC.CapturePin17; CapturePioC18 = PioC.CapturePin18; CapturePioC19 = PioC.CapturePin19; CapturePioC20 = PioC.CapturePin20; CapturePioC21 = PioC.CapturePin21; CapturePioC22 = PioC.CapturePin22; CapturePioC23 = PioC.CapturePin23; CapturePioC24 = PioC.CapturePin24; CapturePioC25 = PioC.CapturePin25; CapturePioC26 = PioC.CapturePin26; CapturePioC27 = PioC.CapturePin27; CapturePioC28 = PioC.CapturePin28; CapturePioC29 = PioC.CapturePin29; CapturePioC30 = PioC.CapturePin30; CapturePioC31 = PioC.CapturePin31; HplPioA0 = PioA.HplPin0; HplPioA1 = PioA.HplPin1; HplPioA2 = PioA.HplPin2; HplPioA3 = PioA.HplPin3; HplPioA4 = PioA.HplPin4; HplPioA5 = PioA.HplPin5; HplPioA6 = PioA.HplPin6; HplPioA7 = PioA.HplPin7; HplPioA8 = PioA.HplPin8; HplPioA9 = PioA.HplPin9; HplPioA10 = PioA.HplPin10; HplPioA11 = PioA.HplPin11; HplPioA12 = PioA.HplPin12; HplPioA13 = PioA.HplPin13; HplPioA14 = PioA.HplPin14; HplPioA15 = PioA.HplPin15; HplPioA16 = PioA.HplPin16; HplPioA17 = PioA.HplPin17; HplPioA18 = PioA.HplPin18; HplPioA19 = PioA.HplPin19; HplPioA20 = PioA.HplPin20; HplPioA21 = PioA.HplPin21; HplPioA22 = PioA.HplPin22; HplPioA23 = PioA.HplPin23; HplPioA24 = PioA.HplPin24; HplPioA25 = PioA.HplPin25; HplPioA26 = PioA.HplPin26; HplPioA27 = PioA.HplPin27; HplPioA28 = PioA.HplPin28; HplPioA29 = PioA.HplPin29; HplPioA30 = PioA.HplPin30; HplPioA31 = PioA.HplPin31; HplPioB0 = PioB.HplPin0; HplPioB1 = PioB.HplPin1; HplPioB2 = PioB.HplPin2; HplPioB3 = PioB.HplPin3; HplPioB4 = PioB.HplPin4; HplPioB5 = PioB.HplPin5; HplPioB6 = PioB.HplPin6; HplPioB7 = PioB.HplPin7; HplPioB8 = PioB.HplPin8; HplPioB9 = PioB.HplPin9; HplPioB10 = PioB.HplPin10; HplPioB11 = PioB.HplPin11; HplPioB12 = PioB.HplPin12; HplPioB13 = PioB.HplPin13; HplPioB14 = PioB.HplPin14; HplPioB15 = PioB.HplPin15; HplPioB16 = PioB.HplPin16; HplPioB17 = PioB.HplPin17; HplPioB18 = PioB.HplPin18; HplPioB19 = PioB.HplPin19; HplPioB20 = PioB.HplPin20; HplPioB21 = PioB.HplPin21; HplPioB22 = PioB.HplPin22; HplPioB23 = PioB.HplPin23; HplPioB24 = PioB.HplPin24; HplPioB25 = PioB.HplPin25; HplPioB26 = PioB.HplPin26; HplPioB27 = PioB.HplPin27; HplPioB28 = PioB.HplPin28; HplPioB29 = PioB.HplPin29; HplPioB30 = PioB.HplPin30; HplPioB31 = PioB.HplPin31; HplPioC0 = PioC.HplPin0; HplPioC1 = PioC.HplPin1; HplPioC2 = PioC.HplPin2; HplPioC3 = PioC.HplPin3; HplPioC4 = PioC.HplPin4; HplPioC5 = PioC.HplPin5; HplPioC6 = PioC.HplPin6; HplPioC7 = PioC.HplPin7; HplPioC8 = PioC.HplPin8; HplPioC9 = PioC.HplPin9; HplPioC10 = PioC.HplPin10; HplPioC11 = PioC.HplPin11; HplPioC12 = PioC.HplPin12; HplPioC13 = PioC.HplPin13; HplPioC14 = PioC.HplPin14; HplPioC15 = PioC.HplPin15; HplPioC16 = PioC.HplPin16; HplPioC17 = PioC.HplPin17; HplPioC18 = PioC.HplPin18; HplPioC19 = PioC.HplPin19; HplPioC20 = PioC.HplPin20; HplPioC21 = PioC.HplPin21; HplPioC22 = PioC.HplPin22; HplPioC23 = PioC.HplPin23; HplPioC24 = PioC.HplPin24; HplPioC25 = PioC.HplPin25; HplPioC26 = PioC.HplPin26; HplPioC27 = PioC.HplPin27; HplPioC28 = PioC.HplPin28; HplPioC29 = PioC.HplPin29; HplPioC30 = PioC.HplPin30; HplPioC31 = PioC.HplPin31; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pmc/000077500000000000000000000000001207233610700214035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pmc/HplSam3sClockC.nc000066400000000000000000000166131207233610700244450ustar00rootroot00000000000000/** * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * This is the main configuration for the low-layer clock module. * * @author Thomas Schmid */ configuration HplSam3sClockC { provides { interface HplSam3Clock; interface HplSam3PeripheralClockCntl as RTCCntl; interface HplSam3PeripheralClockCntl as RTTCntl; interface HplSam3PeripheralClockCntl as WDGCntl; interface HplSam3PeripheralClockCntl as PMCCntl; interface HplSam3PeripheralClockCntl as EFC0Cntl; interface HplSam3PeripheralClockCntl as RES0Cntl; interface HplSam3PeripheralClockCntl as UART0Cntl; interface HplSam3PeripheralClockCntl as UART1Cntl; interface HplSam3PeripheralClockCntl as SMCCntl; interface HplSam3PeripheralClockCntl as PIOACntl; interface HplSam3PeripheralClockCntl as PIOBCntl; interface HplSam3PeripheralClockCntl as PIOCCntl; interface HplSam3PeripheralClockCntl as USART0Cntl; interface HplSam3PeripheralClockCntl as USART1Cntl; interface HplSam3PeripheralClockCntl as RES1Cntl; interface HplSam3PeripheralClockCntl as RES2Cntl; interface HplSam3PeripheralClockCntl as HSMCICntl; interface HplSam3PeripheralClockCntl as TWI0Cntl; interface HplSam3PeripheralClockCntl as TWI1Cntl; interface HplSam3PeripheralClockCntl as SPICntl; interface HplSam3PeripheralClockCntl as SSCCntl; interface HplSam3PeripheralClockCntl as TC0Cntl; interface HplSam3PeripheralClockCntl as TC1Cntl; interface HplSam3PeripheralClockCntl as TC2Cntl; interface HplSam3PeripheralClockCntl as TC3Cntl; interface HplSam3PeripheralClockCntl as TC4Cntl; interface HplSam3PeripheralClockCntl as TC5Cntl; interface HplSam3PeripheralClockCntl as ADCCntl; interface HplSam3PeripheralClockCntl as DACCCntl; interface HplSam3PeripheralClockCntl as PWMCntl; interface HplSam3PeripheralClockCntl as CRCCUCntl; interface HplSam3PeripheralClockCntl as ACCCntl; interface HplSam3PeripheralClockCntl as UDPCntl; } } implementation { #define PMC_PC_BASE 0x400e0410 #define PMC_PC1_BASE 0x400e0500 components HplSam3sClockP, new HplSam3PeripheralClockP(AT91C_ID_RTC ,PMC_PC_BASE ) as RTC, new HplSam3PeripheralClockP(AT91C_ID_RTT ,PMC_PC_BASE ) as RTT, new HplSam3PeripheralClockP(AT91C_ID_WDG ,PMC_PC_BASE ) as WDG, new HplSam3PeripheralClockP(AT91C_ID_PMC ,PMC_PC_BASE ) as PMC, new HplSam3PeripheralClockP(AT91C_ID_EFC0 ,PMC_PC_BASE ) as EFC0, new HplSam3PeripheralClockP(AT91C_ID_RES0 ,PMC_PC_BASE ) as RES0, new HplSam3PeripheralClockP(AT91C_ID_UART0 ,PMC_PC_BASE ) as UART0, new HplSam3PeripheralClockP(AT91C_ID_UART1 ,PMC_PC_BASE ) as UART1, new HplSam3PeripheralClockP(AT91C_ID_SMC ,PMC_PC_BASE ) as SMC, new HplSam3PeripheralClockP(AT91C_ID_PIOA ,PMC_PC_BASE ) as PIOA, new HplSam3PeripheralClockP(AT91C_ID_PIOB ,PMC_PC_BASE ) as PIOB, new HplSam3PeripheralClockP(AT91C_ID_PIOC ,PMC_PC_BASE ) as PIOC, new HplSam3PeripheralClockP(AT91C_ID_USART0,PMC_PC_BASE ) as USART0, new HplSam3PeripheralClockP(AT91C_ID_USART1,PMC_PC_BASE ) as USART1, new HplSam3PeripheralClockP(AT91C_ID_RES1 ,PMC_PC_BASE ) as RES1, new HplSam3PeripheralClockP(AT91C_ID_RES2 ,PMC_PC_BASE ) as RES2, new HplSam3PeripheralClockP(AT91C_ID_HSMCI ,PMC_PC_BASE ) as HSMCI, new HplSam3PeripheralClockP(AT91C_ID_TWI0 ,PMC_PC_BASE ) as TWI0, new HplSam3PeripheralClockP(AT91C_ID_TWI1 ,PMC_PC_BASE ) as TWI1, new HplSam3PeripheralClockP(AT91C_ID_SPI ,PMC_PC_BASE ) as SPI, new HplSam3PeripheralClockP(AT91C_ID_SSC ,PMC_PC_BASE ) as SSC, new HplSam3PeripheralClockP(AT91C_ID_TC0 ,PMC_PC_BASE ) as TC0, new HplSam3PeripheralClockP(AT91C_ID_TC1 ,PMC_PC_BASE ) as TC1, new HplSam3PeripheralClockP(AT91C_ID_TC2 ,PMC_PC_BASE ) as TC2, new HplSam3PeripheralClockP(AT91C_ID_TC3 ,PMC_PC_BASE ) as TC3, new HplSam3PeripheralClockP(AT91C_ID_TC4 ,PMC_PC_BASE ) as TC4, new HplSam3PeripheralClockP(AT91C_ID_TC5 ,PMC_PC_BASE ) as TC5, new HplSam3PeripheralClockP(AT91C_ID_ADC ,PMC_PC_BASE ) as ADC, new HplSam3PeripheralClockP(AT91C_ID_DACC ,PMC_PC_BASE ) as DACC, new HplSam3PeripheralClockP(AT91C_ID_PWM ,PMC_PC_BASE ) as PWM, new HplSam3PeripheralClockP(AT91C_ID_CRCCU ,PMC_PC1_BASE) as CRCCU, new HplSam3PeripheralClockP(AT91C_ID_ACC ,PMC_PC1_BASE) as ACC, new HplSam3PeripheralClockP(AT91C_ID_UDP ,PMC_PC1_BASE) as UDP; HplSam3Clock = HplSam3sClockP; RTCCntl = RTC.Cntl; RTTCntl = RTT.Cntl; WDGCntl = WDG.Cntl; PMCCntl = PMC.Cntl; EFC0Cntl = EFC0.Cntl; RES0Cntl = RES0.Cntl; UART0Cntl = UART0.Cntl; UART1Cntl = UART1.Cntl; SMCCntl = SMC.Cntl; PIOACntl = PIOA.Cntl; PIOBCntl = PIOB.Cntl; PIOCCntl = PIOC.Cntl; USART0Cntl = USART0.Cntl; USART1Cntl = USART1.Cntl; RES1Cntl = RES1.Cntl; RES2Cntl = RES2.Cntl; HSMCICntl = HSMCI.Cntl; TWI0Cntl = TWI0.Cntl; TWI1Cntl = TWI1.Cntl; SPICntl = SPI.Cntl; SSCCntl = SSC.Cntl; TC0Cntl = TC0.Cntl; TC1Cntl = TC1.Cntl; TC2Cntl = TC2.Cntl; TC3Cntl = TC3.Cntl; TC4Cntl = TC4.Cntl; TC5Cntl = TC5.Cntl; ADCCntl = ADC.Cntl; DACCCntl = DACC.Cntl; PWMCntl = PWM.Cntl; CRCCUCntl = CRCCU.Cntl; ACCCntl = ACC.Cntl; UDPCntl = UDP.Cntl; components McuSleepC; McuSleepC.HplSam3Clock -> HplSam3sClockP; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pmc/HplSam3sClockP.nc000066400000000000000000000357031207233610700244630ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * This is a low-level clock component controlling the different clock * systems. * * @author Thomas Schmid */ #include "sam3spmchardware.h" #include "sam3ssupchardware.h" #define CLOCK_TIMEOUT 0xFFFFFFFF module HplSam3sClockP { provides { interface HplSam3Clock; } } implementation { async command error_t HplSam3Clock.slckExternalOsc() { uint32_t timeout = 0; if(SUPC->sr.bits.oscsel == 0) { supc_cr_t cr; cr.flat = 0; // assure it is all zero! cr.bits.xtalsel = 1; cr.bits.key = SUPC_CR_KEY; SUPC->cr = cr; timeout = 0; while (!(SUPC->sr.bits.oscsel) && (timeout++ < CLOCK_TIMEOUT)); } return SUCCESS; } async command error_t HplSam3Clock.slckRCOsc() { uint32_t timeout = 0; if(SUPC->sr.bits.oscsel == 1) { supc_cr_t cr; cr.flat = 0; // assure it is all zero! cr.bits.xtalsel = 0; cr.bits.key = SUPC_CR_KEY; SUPC->cr = cr; timeout = 0; while (!(SUPC->sr.bits.oscsel) && (timeout++ < CLOCK_TIMEOUT)); } return SUCCESS; } async command error_t HplSam3Clock.mckInit48() { pmc_mor_t mor; pmc_mckr_t mckr; pmc_pllar_t pllar; uint32_t timeout = 0; // Check if MCK source is RC or XT if(PMC->mor.bits.moscsel == 0) { // it is RC, turn on XT mor.flat = 0; // make sure it is zreoed out mor.bits.key = PMC_MOR_KEY; mor.bits.moscxtst = 0x3F; // main oscillator startup time mor.bits.moscrcen = 1; // enable the on-chip rc oscillator mor.bits.moscxten = 1; // main crystal oscillator enable PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT)); } // Switch to XT mor.flat = 0; // make sure it is zeroed mor.bits.key = PMC_MOR_KEY; mor.bits.moscxtst = 0x3F; mor.bits.moscrcen = 1; mor.bits.moscxten = 1; mor.bits.moscsel = 1; PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT)); mckr = PMC->mckr; mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); // Initialize PLLA pllar.flat = 0; // make sure it is zeroed out pllar.bits.bit29 = 1; // we always have to do this! pllar.bits.mula = 0x3; // multiplication is MULA+1 => 12x4 = 48MHz pllar.bits.pllacount = 0x3F; pllar.bits.diva = 0x1; // divider is bypassed PMC->pllar = pllar; timeout = 0; while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT)); // Switch to fast clock mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); mckr.bits.pres = PMC_MCKR_PRES_DIV_1; mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); signal HplSam3Clock.mainClockChanged(); return SUCCESS; } async command error_t HplSam3Clock.mckInit84() { pmc_mor_t mor; pmc_mckr_t mckr; pmc_pllar_t pllar; uint32_t timeout = 0; // Check if MCK source is RC or XT if(PMC->mor.bits.moscsel == 0) { // it is RC, turn on XT mor.flat = 0; // make sure it is zreoed out mor.bits.key = PMC_MOR_KEY; mor.bits.moscxtst = 0x3F; // main oscillator startup time mor.bits.moscrcen = 1; // enable the on-chip rc oscillator mor.bits.moscxten = 1; // main crystal oscillator enable PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT)); } // Switch to XT mor.flat = 0; // make sure it is zeroed mor.bits.key = PMC_MOR_KEY; mor.bits.moscxtst = 0x3F; mor.bits.moscrcen = 1; mor.bits.moscxten = 1; mor.bits.moscsel = 1; PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT)); mckr = PMC->mckr; mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); // Initialize PLLA pllar.flat = 0; // make sure it is zeroed out pllar.bits.bit29 = 1; // we always have to do this! pllar.bits.mula = 0x6; // multiplication is MULA+1 => 12x7 = 84MHz pllar.bits.pllacount = 0x3F; pllar.bits.diva = 0x1; // divider is bypassed PMC->pllar = pllar; timeout = 0; while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT)); // Switch to fast clock mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); mckr.bits.pres = PMC_MCKR_PRES_DIV_1; mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); signal HplSam3Clock.mainClockChanged(); return SUCCESS; } async command error_t HplSam3Clock.mckInit96() { pmc_mor_t mor; pmc_mckr_t mckr; pmc_pllar_t pllar; uint32_t timeout = 0; // Check if MCK source is RC or XT if(PMC->mor.bits.moscsel == 0) { // it is RC, turn on XT mor.flat = 0; // make sure it is zreoed out mor.bits.key = PMC_MOR_KEY; mor.bits.moscxtst = 0x3F; // main oscillator startup time mor.bits.moscrcen = 1; // enable the on-chip rc oscillator mor.bits.moscxten = 1; // main crystal oscillator enable PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT)); } // Switch to XT mor.flat = 0; // make sure it is zeroed mor.bits.key = PMC_MOR_KEY; mor.bits.moscxtst = 0x3F; mor.bits.moscrcen = 1; mor.bits.moscxten = 1; mor.bits.moscsel = 1; PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT)); mckr = PMC->mckr; mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); // Initialize PLLA pllar.flat = 0; // make sure it is zeroed out pllar.bits.bit29 = 1; // we always have to do this! pllar.bits.mula = 0x7; // multiplication is MULA+1 => 12x8 = 96MHz pllar.bits.pllacount = 0x3F; pllar.bits.diva = 0x1; // divider is bypassed PMC->pllar = pllar; timeout = 0; while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT)); // Switch to fast clock mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); mckr.bits.pres = PMC_MCKR_PRES_DIV_1; mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); signal HplSam3Clock.mainClockChanged(); return SUCCESS; } async command error_t HplSam3Clock.mckInit4RC(){ pmc_mor_t mor; pmc_mckr_t mckr; pmc_pllar_t pllar; uint32_t timeout = 0; // Check if MCK source is RC or XT if(PMC->mor.bits.moscsel == 1){ // it is XT, turn on RC mor.flat = 0; // make sure it is zreoed out mor.bits.key = PMC_MOR_KEY; mor.bits.moscrcf = 0; // select 4 MHz RC mor.bits.moscrcen = 1; // enable the on-chip rc oscillator mor.bits.moscxten = 1; // main crystal oscillator enable PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscrcs) && (timeout++ < 0xFFFFFFFF)); } // Switch to RC mor.flat = 0; // make sure it is zeroed mor.bits.key = PMC_MOR_KEY; mor.bits.moscrcf = 0; // select 4 MHz RC mor.bits.moscrcen = 1; mor.bits.moscxten = 1; mor.bits.moscsel = 0; PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscsels) && (timeout++ < 0xFFFFFFFF)); mckr = PMC->mckr; mckr.bits.pres = PMC_MCKR_PRES_DIV_1; mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < 0xFFFFFFFF)); // turn off external clock mor.bits.moscxten = 0; PMC->mor = mor; // Turn off PLL pllar.flat = 0; // make sure it is zeroed out pllar.bits.bit29 = 1; // this always has to be written as 1! PMC->pllar = pllar; signal HplSam3Clock.mainClockChanged(); return SUCCESS; } async command error_t HplSam3Clock.mckInit8RC(){ pmc_mor_t mor; pmc_mckr_t mckr; pmc_pllar_t pllar; uint32_t timeout = 0; // Check if MCK source is RC or XT if(PMC->mor.bits.moscsel == 1){ // it is XT, turn on RC mor.flat = 0; // make sure it is zreoed out mor.bits.key = PMC_MOR_KEY; mor.bits.moscrcf = 1; // select 8 MHz RC mor.bits.moscrcen = 1; // enable the on-chip rc oscillator mor.bits.moscxten = 1; // main crystal oscillator enable PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscrcs) && (timeout++ < 0xFFFFFFFF)); } // Switch to RC mor.flat = 0; // make sure it is zeroed mor.bits.key = PMC_MOR_KEY; mor.bits.moscrcf = 1; // select 8 MHz RC mor.bits.moscrcen = 1; mor.bits.moscxten = 1; mor.bits.moscsel = 0; PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscsels) && (timeout++ < 0xFFFFFFFF)); mckr = PMC->mckr; mckr.bits.pres = PMC_MCKR_PRES_DIV_1; mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < 0xFFFFFFFF)); // turn off external clock mor.bits.moscxten = 0; PMC->mor = mor; // Turn off PLL pllar.flat = 0; // make sure it is zeroed out pllar.bits.bit29 = 1; // this always has to be written as 1! PMC->pllar = pllar; signal HplSam3Clock.mainClockChanged(); return SUCCESS; } async command error_t HplSam3Clock.mckInit12RC() { pmc_mor_t mor; pmc_mckr_t mckr; pmc_pllar_t pllar; uint32_t timeout = 0; // Check if MCK source is RC or XT if(PMC->mor.bits.moscsel == 1) { // it is XT, turn on RC mor.flat = 0; // make sure it is zreoed out mor.bits.key = PMC_MOR_KEY; mor.bits.moscrcf = 3; // select 12 MHz RC mor.bits.moscrcen = 1; // enable the on-chip rc oscillator mor.bits.moscxten = 1; // main crystal oscillator enable PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscrcs) && (timeout++ < CLOCK_TIMEOUT)); } // Switch to RC mor.flat = 0; // make sure it is zeroed mor.bits.key = PMC_MOR_KEY; mor.bits.moscrcf = 3; // select 12 MHz RC mor.bits.moscrcen = 1; mor.bits.moscxten = 1; mor.bits.moscsel = 0; PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT)); mckr = PMC->mckr; mckr.bits.pres = PMC_MCKR_PRES_DIV_1; mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); // turn off external clock mor.bits.moscxten = 0; PMC->mor = mor; // Turn off PLL pllar.flat = 0; // make sure it is zeroed out pllar.bits.bit29 = 1; // this always has to be written as 1! PMC->pllar = pllar; signal HplSam3Clock.mainClockChanged(); return SUCCESS; } async command uint32_t HplSam3Clock.getMainClockSpeed() { uint32_t speed = 0; switch(PMC->mckr.bits.css) { case PMC_MCKR_CSS_SLOW_CLOCK: speed = 32; break; case PMC_MCKR_CSS_MAIN_CLOCK: speed = PMC->mcfr.bits.mainf*2048/1000; // 0.48828 corresponds to 16 clock ticks of a 32kHz crystal. break; case PMC_MCKR_CSS_PLLA_CLOCK: if(PMC->pllar.bits.diva != 0) { // note, the PLL multiplier is (mula + 1) speed = PMC->mcfr.bits.mainf*2048/1000 * (PMC->pllar.bits.mula + 1) / PMC->pllar.bits.diva; //speed = PMC->mcfr.bits.mainf*1000/488 * (PMC->pllar.bits.mula + 1) / PMC->pllar.bits.diva; } else speed = 0; break; default: speed = 0; } return speed; } default async event void HplSam3Clock.mainClockChanged(){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pmc/sam3spmchardware.h000066400000000000000000000220231207233610700250170ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sam3s specific PMC registers * * @author Thomas Schmid */ #ifndef SAM3SPMCHARDWARE_H #define SAM3SPMCHARDWARE_H #include "pmchardware.h" /** * PMC Peripheral Clock Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3S Series, * 0: no effect * 1: enable corresponding peripheral clock */ typedef union { uint32_t flat; struct { uint8_t b0 : 1; uint8_t b1 : 1; uint8_t b2 : 1; uint8_t b3 : 1; uint8_t b4 : 1; uint8_t b5 : 1; uint8_t b6 : 1; uint8_t b7 : 1; uint8_t b8 : 1; uint8_t b9 : 1; uint8_t b10 : 1; uint8_t b11 : 1; uint8_t b12 : 1; uint8_t b13 : 1; uint8_t b14 : 1; uint8_t b15 : 1; uint8_t b16 : 1; uint8_t b17 : 1; uint8_t b18 : 1; uint8_t b19 : 1; uint8_t b20 : 1; uint8_t b21 : 1; uint8_t b22 : 1; uint8_t b23 : 1; uint8_t b24 : 1; uint8_t b25 : 1; uint8_t b26 : 1; uint8_t b27 : 1; uint8_t b28 : 1; uint8_t b29 : 1; uint8_t b30 : 1; uint8_t b31 : 1; } __attribute__((__packed__)) bits; } pmc_pcer_t; /** * PMC Peripheral Clock Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 486 * 0: no effect * 1: disable corresponding peripheral clock */ typedef union { uint32_t flat; struct { uint8_t b0 : 1; uint8_t b1 : 1; uint8_t b2 : 1; uint8_t b3 : 1; uint8_t b4 : 1; uint8_t b5 : 1; uint8_t b6 : 1; uint8_t b7 : 1; uint8_t b8 : 1; uint8_t b9 : 1; uint8_t b10 : 1; uint8_t b11 : 1; uint8_t b12 : 1; uint8_t b13 : 1; uint8_t b14 : 1; uint8_t b15 : 1; uint8_t b16 : 1; uint8_t b17 : 1; uint8_t b18 : 1; uint8_t b19 : 1; uint8_t b20 : 1; uint8_t b21 : 1; uint8_t b22 : 1; uint8_t b23 : 1; uint8_t b24 : 1; uint8_t b25 : 1; uint8_t b26 : 1; uint8_t b27 : 1; uint8_t b28 : 1; uint8_t b29 : 1; uint8_t b30 : 1; uint8_t b31 : 1; } __attribute__((__packed__)) bits; } pmc_pcdr_t; /** * PMC Peripheral Clock Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 487 * 0: peripheral clock disabled * 1: peripheral clock enabled */ typedef union { uint32_t flat; struct { uint8_t b0 : 1; uint8_t b1 : 1; uint8_t b2 : 1; uint8_t b3 : 1; uint8_t b4 : 1; uint8_t b5 : 1; uint8_t b6 : 1; uint8_t b7 : 1; uint8_t b8 : 1; uint8_t b9 : 1; uint8_t b10 : 1; uint8_t b11 : 1; uint8_t b12 : 1; uint8_t b13 : 1; uint8_t b14 : 1; uint8_t b15 : 1; uint8_t b16 : 1; uint8_t b17 : 1; uint8_t b18 : 1; uint8_t b19 : 1; uint8_t b20 : 1; uint8_t b21 : 1; uint8_t b22 : 1; uint8_t b23 : 1; uint8_t b24 : 1; uint8_t b25 : 1; uint8_t b26 : 1; uint8_t b27 : 1; uint8_t b28 : 1; uint8_t b29 : 1; uint8_t b30 : 1; uint8_t b31 : 1; } __attribute__((__packed__)) bits; } pmc_pcsr_t; typedef struct { volatile pmc_pcer_t pcer; // Peripheral Clock Enable Register volatile pmc_pcdr_t pcdr; // Peripheral Clock Disable Register volatile pmc_pcsr_t pcsr; // Peripheral Clock Status Register } pmc_pc_t; /** * PMC Clock Generator PLLA Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 491 * Note: bit 29 must always be set to 1 when writing this register! */ typedef union { uint32_t flat; struct { uint8_t divb : 8; // divider uint8_t pllbcount : 6; // pllb counter, specifies the number of slow clock cycles times 8 uint8_t stmode : 2; // start mode uint16_t mulb : 11; // PLLB Multiplier uint8_t reserved0 : 5; } __attribute__((__packed__)) bits; } pmc_pllbr_t; #define PMC_PLLBR_STMODE_FAST_STARTUP 0 #define PMC_PLLBR_STMODE_NORMAL_STARTUP 2 /** * PMC USB Clock Register */ typedef union { uint32_t flat; struct { uint32_t usbs : 1; // USB Input Clock Selection uint32_t reserved0 : 7; uint32_t usbdiv : 4; // Divider for USB Clock uint32_t reserved1 : 20; } __attribute__((__packed__)) bits; } pmc_usb_t; /** * PMC Oscillator Calibration Register. */ typedef union { uint32_t flat; struct { uint32_t cal4 : 7; // RC Oscillator Calibration bits for 4MHz uint32_t sel4 : 1; // Selection of RC Oscillator Calibration bits for 4 MHz uint32_t cal8 : 7; // RC Oscillator Calibration bits for 8MHz uint32_t sel8 : 1; // Selection of RC Oscillator Calibration bits for 8 MHz uint32_t cal12 : 7; // RC Oscillator Calibration bits for 12MHz uint32_t sel12 : 1; // Selection of RC Oscillator Calibration bits for 12 MHz uint32_t reserved0 : 8; } __attribute__((__packed__)) bits; } pmc_ocr_t; /** * PMC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 481 */ typedef struct pmc { volatile pmc_scer_t scer; // System Clock Enable Register volatile pmc_scdr_t scdr; // System Clock Disable Register volatile pmc_scsr_t scsr; // System Clock Status Register uint32_t reserved0; volatile pmc_pc_t pc; // Peripheral Clock Control Registers 0 uint32_t reserved1; volatile pmc_mor_t mor; // Main Oscillator Register volatile pmc_mcfr_t mcfr; // Main Clock Frequency Register volatile pmc_pllar_t pllar; // PLLA Register volatile pmc_pllbr_t pllbr; // PLLB Register volatile pmc_mckr_t mckr; // Master Clock Register uint32_t reserved2; volatile pmc_usb_t usb; // USB Clock Register uint32_t reserved3; volatile pmc_pck_t pck0; // Programmable Clock 0 Register volatile pmc_pck_t pck1; // Programmable Clock 1 Register volatile pmc_pck_t pck2; // Programmable Clock 2 Register uint32_t reserved4[5]; volatile pmc_ier_t ier; // Interrupt Enable Register volatile pmc_idr_t idr; // Interrupt Disable Register volatile pmc_sr_t sr; // Status Register volatile pmc_imr_t imr; // Interrupt Mask Register volatile pmc_fsmr_t fsmr; // Fast Startup Mode Register volatile pmc_fspr_t fspr; // Fast Startup Polarity Register volatile pmc_focr_t focr; // Fault Output Clear Register uint32_t reserved5[26]; volatile pmc_wpmr_t wpmr; // Write Protect Mode Register volatile pmc_wpsr_t wpsr; // Write Protect Status Register uint32_t reserved6[5]; volatile pmc_pc_t pc1; // Peripheral Clock Control Registers 1 uint32_t reserved7; volatile pmc_ocr_t ocr; // Oscillator Calibration Register } pmc_t; /** * Memory mapping for the PMC */ volatile pmc_t* PMC = (volatile pmc_t *) 0x400E0400; // PMC Base Address #endif //SAM3UPMCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pwm/000077500000000000000000000000001207233610700214275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pwm/Sam3sPwm.nc000066400000000000000000000054361207233610700234330ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This currently only implements a very minimal subset of the PWM peripheral * capabilities to drive the event lines going to the ADC and DAC. The PWM * unit can do many many more things. * * @author Thomas Schmid */ interface Sam3sPwm { /** * @param frequency Frequency in Herz at which the counter should count. */ async command error_t configure( uint32_t frequency ); /** * @param period Interval period in tics at which the channel 0 will reset. */ async command void setPeriod(uint16_t period); /** * This command returns the actual frequency that the counter is set to. Not * all frequencies are possible. */ async command uint32_t getFrequency(); /** * @param compareNumber Specifies which compare to enable * @param compareValue Sets the compare value at which we match */ async command error_t enableCompare(uint8_t compareNumber, uint16_t compareValue); async command error_t disableCompare(uint8_t compareNumber); /** * @param eventNumber indicates which event channel should be enabled * @param compares Indicates which compares this event is sensitive to. */ async command error_t setEventCompares(uint8_t eventNumber, uint8_t comparers); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pwm/Sam3sPwmC.nc000066400000000000000000000042421207233610700235300ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ configuration Sam3sPwmC { provides { interface StdControl; interface Sam3sPwm; } } implementation { components Sam3sPwmP as PwmP, LedsC, NoLedsC, HplNVICC, HplSam3sClockC, HplSam3sGeneralIOC; StdControl = PwmP; Sam3sPwm = PwmP; PwmP.PwmInterrupt -> HplNVICC.PWMInterrupt; PwmP.PwmClockControl -> HplSam3sClockC.PWMCntl; PwmP.ClockConfig -> HplSam3sClockC; components McuSleepC; PwmP.PwmInterruptWrapper -> McuSleepC; components HplSam3sPdcC; PwmP.HplPdc -> HplSam3sPdcC.PwmPdcControl; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pwm/Sam3sPwmP.nc000066400000000000000000000132121207233610700235420ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS * IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3spwmhardware.h" module Sam3sPwmP { provides { interface StdControl; interface Sam3sPwm; } uses { interface HplNVICInterruptCntl as PwmInterrupt; interface HplSam3PeripheralClockCntl as PwmClockControl; interface HplSam3Clock as ClockConfig; interface FunctionWrapper as PwmInterruptWrapper; interface HplSam3Pdc as HplPdc; interface Leds; } } implementation { norace uint32_t actualFrequency = 0; command error_t StdControl.start() { atomic { call PwmClockControl.enable(); /* Configure interrupts */ call PwmInterrupt.configure(IRQ_PRIO_PWM); } return SUCCESS; } command error_t StdControl.stop() { atomic { call PwmClockControl.disable(); call PwmInterrupt.disable(); } return SUCCESS; } async command error_t Sam3sPwm.configure(uint32_t frequency) { uint8_t i; // get the main clock speed in khz uint32_t mck = call ClockConfig.getMainClockSpeed(); uint32_t divider = mck / frequency; pwm_clk_t clk = PWM->clk; volatile pwm_channel_t *ch0 = &(PWM->channel[0]); pwm_cmr_t cmr = ch0->cmr; // disable channel 0 PWM->dis.flat = 1; if(divider == 0) { // mck is too slow for requested frequency. return FAIL; } // check if we can use modulo counter clocks for(i=0; i<11; i++) { if(divider == (1 << i)) { // GREAT! break; } } if(i < 11) { // we can use the modulo counter cmr.bits.cpre = i; actualFrequency = (mck >> i); } else { // we have to use the divider too cmr.bits.cpre = PWM_CMR_CPRE_CLKA; // find the right combination of modulo counter and divider that matches // the requested frequency the closest. for(i=0; i<11; i++) { divider = (mck >> i) / frequency; if(divider < 255) { clk.bits.diva = divider; clk.bits.prea = i; actualFrequency = (mck >> i) / divider; break; } } if(i >= 11) { // we couldn't find a combination of modulo counter and divider that // works. return FAIL; } } // clock setup done. PWM->clk = clk; ch0->cmr = cmr; // enable channel 0 PWM->ena.flat = 1; return SUCCESS; } async command void Sam3sPwm.setPeriod(uint16_t period) { volatile pwm_channel_t *ch0 = &(PWM->channel[0]); pwm_cdtyupd_t cdtyupd = ch0->cdtyupd; pwm_cprdupd_t cprdupd = ch0->cprdupd; // setup period and duty-cycle. cdtyupd.bits.cdtyupd = period / 2; // 50% duty cycle cprdupd.bits.cprdupd = period; // count at which counter resets to 0 ch0->cdtyupd = cdtyupd; ch0->cprdupd = cprdupd; } async command uint32_t Sam3sPwm.getFrequency() { return actualFrequency; } async command error_t Sam3sPwm.enableCompare(uint8_t compareNumber, uint16_t compareValue) { volatile pwm_comparison_t *compare; pwm_cmpm_t cmpm; pwm_cmpv_t cmpv; if(compareNumber < 8) { compare = &(PWM->comparison[compareNumber]); cmpm = compare->cmpm; cmpv = compare->cmpv; } else { return FAIL; } // turn of comparison compare->cmpm.flat = 0; cmpv.bits.cv = compareValue; cmpm.bits.cen = 1; compare->cmpv = cmpv; compare->cmpm = cmpm; return SUCCESS; } async command error_t Sam3sPwm.disableCompare(uint8_t compareNumber) { volatile pwm_comparison_t *compare; if(compareNumber < 8) { compare = &(PWM->comparison[compareNumber]); } else { return FAIL; } // turn of comparison compare->cmpm.flat = 0; return SUCCESS; } async command error_t Sam3sPwm.setEventCompares(uint8_t eventNumber, uint8_t compares) { switch(eventNumber) { case 0: PWM->elm0r.flat = compares; break; case 1: PWM->elm1r.flat = compares; break; default: return FAIL; } return SUCCESS; } async event void ClockConfig.mainClockChanged(){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/pwm/sam3spwmhardware.h000066400000000000000000000633141207233610700250770ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sam3s PWM register definitions * * @author Thomas Schmid */ #ifndef SAM3SPWMHARDWARE_H #define SAM3SPWMHARDWARE_H #define PWM_COMPARE_DAC 0 #define PWM_COMPARE_ADC 1 #define PWM_EVENT_DAC 0 #define PWM_EVENT_ADC 1 /** * PWM Clock Register */ typedef union { uint32_t flat; struct { uint32_t diva : 8; // clock divider A uint32_t prea : 4; // clock source selection uint32_t reserved0 : 4; uint32_t divb : 8; // clock divider B uint32_t preb : 4; // clock source selection uint32_t reserved1 : 4; } __attribute__((__packed__)) bits; } pwm_clk_t; /** * PWM Enable Register */ typedef union { uint32_t flat; struct { uint32_t chid0 : 1; // channel 0 uint32_t chid1 : 1; // channel 1 uint32_t chid2 : 1; // channel 2 uint32_t chid3 : 1; // channel 3 uint32_t reserved : 28; } __attribute__((__packed__)) bits; } pwm_ena_t; /** * PWM Disable Register */ typedef union { uint32_t flat; struct { uint32_t chid0 : 1; // channel 0 uint32_t chid1 : 1; // channel 1 uint32_t chid2 : 1; // channel 2 uint32_t chid3 : 1; // channel 3 uint32_t reserved : 28; } __attribute__((__packed__)) bits; } pwm_dis_t; /** * PWM Status Register */ typedef union { uint32_t flat; struct { uint32_t chid0 : 1; // channel 0 uint32_t chid1 : 1; // channel 1 uint32_t chid2 : 1; // channel 2 uint32_t chid3 : 1; // channel 3 uint32_t reserved : 28; } __attribute__((__packed__)) bits; } pwm_sr_t; /** * PWM Interrupt Enable Register 1 */ typedef union { uint32_t flat; struct { uint32_t chid0 : 1; // channel 0 uint32_t chid1 : 1; // channel 1 uint32_t chid2 : 1; // channel 2 uint32_t chid3 : 1; // channel 3 uint32_t reserved0 : 12; uint32_t fchid0 : 1; // channel 0 uint32_t fchid1 : 1; // channel 1 uint32_t fchid2 : 1; // channel 2 uint32_t fchid3 : 1; // channel 3 uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_ier1_t; /** * PWM Interrupt Disable Register 1 */ typedef union { uint32_t flat; struct { uint32_t chid0 : 1; // channel 0 uint32_t chid1 : 1; // channel 1 uint32_t chid2 : 1; // channel 2 uint32_t chid3 : 1; // channel 3 uint32_t reserved0 : 12; uint32_t fchid0 : 1; // channel 0 uint32_t fchid1 : 1; // channel 1 uint32_t fchid2 : 1; // channel 2 uint32_t fchid3 : 1; // channel 3 uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_idr1_t; /** * PWM Interrupt Mask Register 1 */ typedef union { uint32_t flat; struct { uint32_t chid0 : 1; // channel 0 uint32_t chid1 : 1; // channel 1 uint32_t chid2 : 1; // channel 2 uint32_t chid3 : 1; // channel 3 uint32_t reserved0 : 12; uint32_t fchid0 : 1; // channel 0 uint32_t fchid1 : 1; // channel 1 uint32_t fchid2 : 1; // channel 2 uint32_t fchid3 : 1; // channel 3 uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_imr1_t; /** * PWM Interrupt Status Register 1 */ typedef union { uint32_t flat; struct { uint32_t chid0 : 1; // channel 0 uint32_t chid1 : 1; // channel 1 uint32_t chid2 : 1; // channel 2 uint32_t chid3 : 1; // channel 3 uint32_t reserved0 : 12; uint32_t fchid0 : 1; // channel 0 uint32_t fchid1 : 1; // channel 1 uint32_t fchid2 : 1; // channel 2 uint32_t fchid3 : 1; // channel 3 uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_isr1_t; /** * PWM Sync channels Mode Register */ typedef union { uint32_t flat; struct { uint32_t sync0 : 1; uint32_t sync1 : 1; uint32_t sync2 : 1; uint32_t sync3 : 1; uint32_t reserved0 : 12; uint32_t updm : 2; // sync channel update mode uint32_t reserved1 : 2; uint32_t ptrm : 1; // PDC Transfer Request Mode uint32_t ptrcs : 3; // PDC Transfer Request Comparison Selection uint32_t reserved2 : 8; } __attribute__((__packed__)) bits; } pwm_scm_t; /** * PWM Sync Channels Update Control Register */ typedef union { uint32_t flat; struct { uint32_t updulock : 1; // Synchronous Channels Update Unlock uint32_t reserved : 31; } __attribute__((__packed__)) bits; } pwm_scuc_t; /** * PWM Sync Channels Update Period Register */ typedef union { uint32_t flat; struct { uint32_t upr : 4; // update period uint32_t uprcnt : 4; // update period counter uint32_t reserved : 24; } __attribute__((__packed__)) bits; } pwm_scup_t; /** * PWM Sync Channels Update Period Update Register */ typedef union { uint32_t flat; struct { uint32_t uprupd : 4; // update period update uint32_t reserved : 28; } __attribute__((__packed__)) bits; } pwm_scupupd_t; /** * PWM Interrupt Enable Register 2 */ typedef union { uint32_t flat; struct { uint32_t wrdy : 1; // write ready for synchronous channel update interrupt enable uint32_t endtx : 1; // pdc end of tx buffer uint32_t txbufe : 1; // pdc tx buffer empty uint32_t unre : 1; // sync channels update underrun error uint32_t reserved0 : 4; uint32_t cmpm0 : 1; // comparison x match interrupt uint32_t cmpm1 : 1; // comparison x match interrupt uint32_t cmpm2 : 1; // comparison x match interrupt uint32_t cmpm3 : 1; // comparison x match interrupt uint32_t cmpm4 : 1; // comparison x match interrupt uint32_t cmpm5 : 1; // comparison x match interrupt uint32_t cmpm6 : 1; // comparison x match interrupt uint32_t cmpm7 : 1; // comparison x match interrupt uint32_t cmpu0 : 1; // comparison x update interrupt uint32_t cmpu1 : 1; // comparison x update interrupt uint32_t cmpu2 : 1; // comparison x update interrupt uint32_t cmpu3 : 1; // comparison x update interrupt uint32_t cmpu4 : 1; // comparison x update interrupt uint32_t cmpu5 : 1; // comparison x update interrupt uint32_t cmpu6 : 1; // comparison x update interrupt uint32_t cmpu7 : 1; // comparison x update interrupt uint32_t reserved1 : 8; } __attribute__((__packed__)) bits; } pwm_ier2_t; /** * PWM Interrupt Disable Register 2 */ typedef union { uint32_t flat; struct { uint32_t wrdy : 1; // write ready for synchronous channel update interrupt enable uint32_t endtx : 1; // pdc end of tx buffer uint32_t txbufe : 1; // pdc tx buffer empty uint32_t unre : 1; // sync channels update underrun error uint32_t reserved0 : 4; uint32_t cmpm0 : 1; // comparison x match interrupt uint32_t cmpm1 : 1; // comparison x match interrupt uint32_t cmpm2 : 1; // comparison x match interrupt uint32_t cmpm3 : 1; // comparison x match interrupt uint32_t cmpm4 : 1; // comparison x match interrupt uint32_t cmpm5 : 1; // comparison x match interrupt uint32_t cmpm6 : 1; // comparison x match interrupt uint32_t cmpm7 : 1; // comparison x match interrupt uint32_t cmpu0 : 1; // comparison x update interrupt uint32_t cmpu1 : 1; // comparison x update interrupt uint32_t cmpu2 : 1; // comparison x update interrupt uint32_t cmpu3 : 1; // comparison x update interrupt uint32_t cmpu4 : 1; // comparison x update interrupt uint32_t cmpu5 : 1; // comparison x update interrupt uint32_t cmpu6 : 1; // comparison x update interrupt uint32_t cmpu7 : 1; // comparison x update interrupt uint32_t reserved1 : 8; } __attribute__((__packed__)) bits; } pwm_idr2_t; /** * PWM Interrupt Mask Register 2 */ typedef union { uint32_t flat; struct { uint32_t wrdy : 1; // write ready for synchronous channel update interrupt enable uint32_t endtx : 1; // pdc end of tx buffer uint32_t txbufe : 1; // pdc tx buffer empty uint32_t unre : 1; // sync channels update underrun error uint32_t reserved0 : 4; uint32_t cmpm0 : 1; // comparison x match interrupt uint32_t cmpm1 : 1; // comparison x match interrupt uint32_t cmpm2 : 1; // comparison x match interrupt uint32_t cmpm3 : 1; // comparison x match interrupt uint32_t cmpm4 : 1; // comparison x match interrupt uint32_t cmpm5 : 1; // comparison x match interrupt uint32_t cmpm6 : 1; // comparison x match interrupt uint32_t cmpm7 : 1; // comparison x match interrupt uint32_t cmpu0 : 1; // comparison x update interrupt uint32_t cmpu1 : 1; // comparison x update interrupt uint32_t cmpu2 : 1; // comparison x update interrupt uint32_t cmpu3 : 1; // comparison x update interrupt uint32_t cmpu4 : 1; // comparison x update interrupt uint32_t cmpu5 : 1; // comparison x update interrupt uint32_t cmpu6 : 1; // comparison x update interrupt uint32_t cmpu7 : 1; // comparison x update interrupt uint32_t reserved1 : 8; } __attribute__((__packed__)) bits; } pwm_imr2_t; /** * PWM Interrupt Status Register 2 */ typedef union { uint32_t flat; struct { uint32_t wrdy : 1; // write ready for synchronous channel update interrupt enable uint32_t endtx : 1; // pdc end of tx buffer uint32_t txbufe : 1; // pdc tx buffer empty uint32_t unre : 1; // sync channels update underrun error uint32_t reserved0 : 4; uint32_t cmpm0 : 1; // comparison x match interrupt uint32_t cmpm1 : 1; // comparison x match interrupt uint32_t cmpm2 : 1; // comparison x match interrupt uint32_t cmpm3 : 1; // comparison x match interrupt uint32_t cmpm4 : 1; // comparison x match interrupt uint32_t cmpm5 : 1; // comparison x match interrupt uint32_t cmpm6 : 1; // comparison x match interrupt uint32_t cmpm7 : 1; // comparison x match interrupt uint32_t cmpu0 : 1; // comparison x update interrupt uint32_t cmpu1 : 1; // comparison x update interrupt uint32_t cmpu2 : 1; // comparison x update interrupt uint32_t cmpu3 : 1; // comparison x update interrupt uint32_t cmpu4 : 1; // comparison x update interrupt uint32_t cmpu5 : 1; // comparison x update interrupt uint32_t cmpu6 : 1; // comparison x update interrupt uint32_t cmpu7 : 1; // comparison x update interrupt uint32_t reserved1 : 8; } __attribute__((__packed__)) bits; } pwm_isr2_t; /** * PWM Output Override Value Register */ typedef union { uint32_t flat; struct { uint32_t oovh0 : 1; // Output Override value for pwmh output of the channel x uint32_t oovh1 : 1; // Output Override value for pwmh output of the channel x uint32_t oovh2 : 1; // Output Override value for pwmh output of the channel x uint32_t oovh3 : 1; // Output Override value for pwmh output of the channel x uint32_t reserved0 : 12; uint32_t oovl0 : 1; // output override value for pwml output of the channel x uint32_t oovl1 : 1; // output override value for pwml output of the channel x uint32_t oovl2 : 1; // output override value for pwml output of the channel x uint32_t oovl3 : 1; // output override value for pwml output of the channel x uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_oov_t; /** * PWM Output Selection Register */ typedef union { uint32_t flat; struct { uint32_t osh0 : 1; // Output Selection for PWMH output of the channel x uint32_t osh1 : 1; // Output Selection for PWMH output of the channel x uint32_t osh2 : 1; // Output Selection for PWMH output of the channel x uint32_t osh3 : 1; // Output Selection for PWMH output of the channel x uint32_t reserved0 : 12; uint32_t osl0 : 1; // output selection for PWML output of the channel x uint32_t osl1 : 1; // output selection for PWML output of the channel x uint32_t osl2 : 1; // output selection for PWML output of the channel x uint32_t osl3 : 1; // output selection for PWML output of the channel x uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_os_t; /** * PWM Output Selection Set Register */ typedef union { uint32_t flat; struct { uint32_t ossh0 : 1; // Output Selection Set for PWMH output of the channel x uint32_t ossh1 : 1; // Output Selection Set for PWMH output of the channel x uint32_t ossh2 : 1; // Output Selection Set for PWMH output of the channel x uint32_t ossh3 : 1; // Output Selection Set for PWMH output of the channel x uint32_t reserved0 : 12; uint32_t ossl0 : 1; // Output Selection Set for PWML output of the channel x uint32_t ossl1 : 1; // Output Selection Set for PWML output of the channel x uint32_t ossl2 : 1; // Output Selection Set for PWML output of the channel x uint32_t ossl3 : 1; // Output Selection Set for PWML output of the channel x uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_oss_t; /** * PWM Output Selection Clear Register */ typedef union { uint32_t flat; struct { uint32_t osch0 : 1; uint32_t osch1 : 1; uint32_t osch2 : 1; uint32_t osch3 : 1; uint32_t reserved0 : 12; uint32_t oscl0 : 1; uint32_t oscl1 : 1; uint32_t oscl2 : 1; uint32_t oscl3 : 1; uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_osc_t; /** * PWM Output Selection Set Update Register */ typedef union { uint32_t flat; struct { uint32_t ossuph0 : 1; uint32_t ossuph1 : 1; uint32_t ossuph2 : 1; uint32_t ossuph3 : 1; uint32_t reserved0 : 12; uint32_t ossupl0 : 1; uint32_t ossupl1 : 1; uint32_t ossupl2 : 1; uint32_t ossupl3 : 1; uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_ossupd_t; /** * PWM Output Selection Clear Update Register */ typedef union { uint32_t flat; struct { uint32_t oscuph0 : 1; uint32_t oscuph1 : 1; uint32_t oscuph2 : 1; uint32_t oscuph3 : 1; uint32_t reserved0 : 12; uint32_t oscupl0 : 1; uint32_t oscupl1 : 1; uint32_t oscupl2 : 1; uint32_t oscupl3 : 1; uint32_t reserved1 : 12; } __attribute__((__packed__)) bits; } pwm_oscupd_t; /** * PWM Fault Mode Register */ typedef union { uint32_t flat; struct { uint32_t fpol : 8; uint32_t fmod : 8; uint32_t ffil : 8; uint32_t reserved : 8; } __attribute__((__packed__)) bits; } pwm_fmr_t; /** * PWM Fault Status Register */ typedef union { uint32_t flat; struct { uint32_t fiv : 8; uint32_t fs : 8; uint32_t reserved : 16; } __attribute__((__packed__)) bits; } pwm_fsr_t; /** * PWM Fault Clear Register */ typedef union { uint32_t flat; struct { uint32_t fclr : 8; uint32_t reserved : 24; } __attribute__((__packed__)) bits; } pwm_fcr_t; /** * PWM Fault Protection Value Register */ typedef union { uint32_t flat; struct { uint32_t fpvh0 : 1; uint32_t fpvh1 : 1; uint32_t fpvh2 : 1; uint32_t fpvh3 : 1; uint32_t reserved0 : 12; uint32_t fpvl0 : 1; uint32_t fpvl1 : 1; uint32_t fpvl2 : 1; uint32_t fpvl3 : 1; } __attribute__((__packed__)) bits; } pwm_fpv_t; /** * PWM Fault Protection Enable Register */ typedef union { uint32_t flat; struct { uint32_t fpe0 : 8; uint32_t fpe1 : 8; uint32_t fpe2 : 8; uint32_t fpe3 : 8; } __attribute__((__packed__)) bits; } pwm_fpe_t; /** * PWM Event Line x Register */ typedef union { uint32_t flat; struct { uint32_t csel0 : 1; uint32_t csel1 : 1; uint32_t csel2 : 1; uint32_t csel3 : 1; uint32_t csel4 : 1; uint32_t csel5 : 1; uint32_t csel6 : 1; uint32_t csel7 : 1; uint32_t reserved : 24; } __attribute__((__packed__)) bits; } pwm_elmr_t; /** * PWM Stepper Motor Mode Register */ typedef union { uint32_t flat; struct { uint32_t gcen0 : 1; uint32_t gcen1 : 1; uint32_t reserved0 : 14; uint32_t down0 : 1; uint32_t down1 : 1; uint32_t reserved1 : 14; } __attribute__((__packed__)) bits; } pwm_smmr_t; /** * PWM Write Protect Control Register */ typedef union { uint32_t flat; struct { uint32_t wpcmd : 2; uint32_t wprg0 : 1; uint32_t wprg1 : 1; uint32_t wprg2 : 1; uint32_t wprg3 : 1; uint32_t wprg4 : 1; uint32_t wprg5 : 1; uint32_t wpkey : 24; } __attribute__((__packed__)) bits; } pwm_wpcr_t; #define PWM_WPCR_KEY 0x50574D /** * PWM Write Protect Status Register */ typedef union { uint32_t flat; struct { uint32_t wpsws0 : 1; uint32_t wpsws1 : 1; uint32_t wpsws2 : 1; uint32_t wpsws3 : 1; uint32_t wpsws4 : 1; uint32_t wpsws5 : 1; uint32_t reserved0 : 1; uint32_t wpvs : 1; uint32_t wphws0 : 1; uint32_t wphws1 : 1; uint32_t wphws2 : 1; uint32_t wphws3 : 1; uint32_t wphws4 : 1; uint32_t wphws5 : 1; uint32_t reserved1 : 2; uint32_t wpvsrc : 16; } __attribute__((__packed__)) bits; } pwm_wpsr_t; /** * PWM Comparison x Value Register */ typedef union { uint32_t flat; struct { uint32_t cv : 24; uint32_t cvm : 1; uint32_t reserved : 7; } __attribute__((__packed__)) bits; } pwm_cmpv_t; /** * PWM Comparison x Value Update Register */ typedef union { uint32_t flat; struct { uint32_t cvupd : 24; uint32_t cvmupd : 1; uint32_t reserved : 7; } __attribute__((__packed__)) bits; } pwm_cmpvupd_t; /** * PWM Comparison x Mode Register */ typedef union { uint32_t flat; struct { uint32_t cen : 1; uint32_t reserved0 : 3; uint32_t ctr : 4; uint32_t cpr : 4; uint32_t cprcnt : 4; uint32_t cupr : 4; uint32_t cuprcnt : 4; uint32_t reserved1 : 8; } __attribute__((__packed__)) bits; } pwm_cmpm_t; /** * PWM Comparison x Mode Update Register */ typedef union { uint32_t flat; struct { uint32_t cenupd : 1; uint32_t reserved0 : 3; uint32_t ctrupd : 4; uint32_t cprupd : 4; uint32_t reserved1 : 4; uint32_t cuprupd : 4; uint32_t reserved2 : 12; } __attribute__((__packed__)) bits; } pwm_cmpmupd_t; /** * PWM Channel Mode Register */ typedef union { uint32_t flat; struct { uint32_t cpre : 4; uint32_t reserved0 : 4; uint32_t calg : 1; uint32_t cpol : 1; uint32_t ces : 1; uint32_t reserved1 : 5; uint32_t dte : 1; uint32_t dthi : 1; uint32_t dtli : 1; uint32_t reserved2 : 13; } __attribute__((__packed__)) bits; } pwm_cmr_t; #define PWM_CMR_CPRE_CLKA 11 #define PWM_CMR_CPRE_CLKB 12 /** * PWM Channel Duty Cycle Register */ typedef union { uint32_t flat; struct { uint32_t cdty : 24; uint32_t reserved : 8; } __attribute__((__packed__)) bits; } pwm_cdty_t; /** * PWM Channe Duty Cycle Update Register */ typedef union { uint32_t flat; struct { uint32_t cdtyupd : 24; uint32_t reserved : 8; } __attribute__((__packed__)) bits; } pwm_cdtyupd_t; /** * PWM Channel Period Register */ typedef union { uint32_t flat; struct { uint32_t cprd : 24; uint32_t reserved : 8; } __attribute__((__packed__)) bits; } pwm_cprd_t; /** * PWM Channel Period Update Register */ typedef union { uint32_t flat; struct { uint32_t cprdupd : 24; uint32_t reserved : 8; } __attribute__((__packed__)) bits; } pwm_cprdupd_t; /** * PWM Channel Counter Register */ typedef union { uint32_t flat; struct { uint32_t cnt : 24; uint32_t reserved : 8; } __attribute__((__packed__)) bits; } pwm_ccnt_t; /** * PWM Channel Dead Time Register */ typedef union { uint32_t flat; struct { uint32_t dth : 16; uint32_t dtl : 16; } __attribute__((__packed__)) bits; } pwm_dt_t; /** * PWM Channel Dead Time Update Register */ typedef union { uint32_t flat; struct { uint32_t dthupd : 16; uint32_t dtlupd : 16; } __attribute__((__packed__)) bits; } pwm_dtupd_t; typedef struct pwm_comparison { pwm_cmpv_t cmpv; pwm_cmpvupd_t cmpvupd; pwm_cmpm_t cmpm; pwm_cmpmupd_t cmpmupd; } pwm_comparison_t; typedef struct pwm_channel { pwm_cmr_t cmr; pwm_cdty_t cdty; pwm_cdtyupd_t cdtyupd; pwm_cprd_t cprd; pwm_cprdupd_t cprdupd; pwm_ccnt_t ccnt; pwm_dt_t dt; pwm_dtupd_t dtupd; } pwm_channel_t; /** * PWM Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3S * Series, Preliminary, p. 875 */ typedef struct pwm { volatile pwm_clk_t clk; volatile pwm_ena_t ena; volatile pwm_dis_t dis; volatile pwm_sr_t sr; volatile pwm_ier1_t ier1; volatile pwm_idr1_t idr1; volatile pwm_imr1_t imr1; volatile pwm_isr1_t isr1; volatile pwm_scm_t scm; uint32_t reserved0; volatile pwm_scuc_t scuc; volatile pwm_scup_t scup; volatile pwm_scupupd_t scupupd; volatile pwm_ier2_t ier2; volatile pwm_idr2_t idr2; volatile pwm_imr2_t imr2; volatile pwm_isr2_t isr2; volatile pwm_oov_t oov; volatile pwm_os_t os; volatile pwm_oss_t oss; volatile pwm_osc_t osc; volatile pwm_ossupd_t ossupd; volatile pwm_oscupd_t oscupd; volatile pwm_fmr_t fmr; volatile pwm_fsr_t fsr; volatile pwm_fcr_t fcr; volatile pwm_fpv_t fpv; volatile pwm_fpe_t fpe; uint32_t reserved1[3]; volatile pwm_elmr_t elm0r; volatile pwm_elmr_t elm1r; uint32_t reserved2[11]; volatile pwm_smmr_t smmr; uint32_t reserved3[12]; volatile pwm_wpcr_t wpcr; volatile pwm_wpsr_t wpsr; uint32_t reserved4[17]; volatile pwm_comparison_t comparison[8]; uint32_t reserved5[20]; volatile pwm_channel_t channel[4]; } pwm_t; /** * Memory mapping for the PWM */ #define PWM_BASE_ADDRESS 0x40020000 volatile pwm_t* PWM = (volatile pwm_t *) PWM_BASE_ADDRESS; #endif //SAM3SPWMHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/sam3shardware.h000066400000000000000000000142321207233610700235430ustar00rootroot00000000000000/* * Copyright (c) 2010 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Definitions specific to the SAM3S MCU. * * @author Thomas Schmid */ #ifndef SAM3S_HARDWARE_H #define SAM3S_HARDWARE_H #include // The Sam3s has more I/O Muxing than the Sam3u. #define CHIP_SAM3_HAS_PERIPHERAL_CD 1 // Peripheral ID definitions for the SAM3S // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3S Series, Preliminary, p. 34 #define AT91C_ID_SUPC ( 0) // SUPPLY CONTROLLER #define AT91C_ID_RSTC ( 1) // RESET CONTROLLER #define AT91C_ID_RTC ( 2) // REAL TIME CLOCK #define AT91C_ID_RTT ( 3) // REAL TIME TIMER #define AT91C_ID_WDG ( 4) // WATCHDOG TIMER #define AT91C_ID_PMC ( 5) // PMC #define AT91C_ID_EFC0 ( 6) // EFC #define AT91C_ID_RES0 ( 7) // Reserved #define AT91C_ID_UART0 ( 8) // UART0 #define AT91C_ID_UART1 ( 9) // UART1 #define AT91C_ID_SMC (10) // SMC #define AT91C_ID_PIOA (11) // PARALLEL I/O CONTROLLER A #define AT91C_ID_PIOB (12) // PARALLEL I/O CONTROLLER B #define AT91C_ID_PIOC (13) // PARALLEL I/O CONTROLLER C #define AT91C_ID_USART0 (14) // USART0 #define AT91C_ID_USART1 (15) // USART1 #define AT91C_ID_RES1 (16) // Reserved #define AT91C_ID_RES2 (17) // Reserved #define AT91C_ID_HSMCI (18) // HIGH SPEED MULTIMEDIA CARD INTERFACE #define AT91C_ID_TWI0 (19) // TWO WIRE INTERFACE 0 #define AT91C_ID_TWI1 (20) // TWO WIRE INTERFACE 1 #define AT91C_ID_SPI (21) // SERIAL PERIPHERAL INTERFACE #define AT91C_ID_SSC (22) // SYNCHRONOUS SERIAL CONTROLLER #define AT91C_ID_TC0 (23) // TIMER/COUNTER 0 #define AT91C_ID_TC1 (24) // TIMER/COUNTER 1 #define AT91C_ID_TC2 (25) // TIMER/COUNTER 2 #define AT91C_ID_TC3 (26) // TIMER/COUNTER 3 #define AT91C_ID_TC4 (27) // TIMER/COUNTER 4 #define AT91C_ID_TC5 (28) // TIMER/COUNTER 5 #define AT91C_ID_ADC (29) // ANALOG-TO-DIGITAL CONVERTER #define AT91C_ID_DACC (30) // DIGITAL-TO-ANALOG CONVERTE #define AT91C_ID_PWM (31) // PULSE WIDTH MODULATION #define AT91C_ID_CRCCU (32) // CRC CALCULATION UNIT #define AT91C_ID_ACC (33) // ANALOG COMPARATOR #define AT91C_ID_UDP (34) // USB DEVICE PORT #define SAM3S_PERIPHERALA (0x400e0e00) #define SAM3S_PERIPHERALB (0x400e1000) #define SAM3S_PERIPHERALC (0x400e1200) #define TOSH_ASSIGN_PIN(name, port, bit) \ static inline void TOSH_SET_##name##_PIN() \ {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x030)) = (1 << bit);} \ static inline void TOSH_CLR_##name##_PIN() \ {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x034)) = (1 << bit);} \ static inline int TOSH_READ_##name##_PIN() \ { \ /* Read bit from Output Status Register */ \ uint32_t currentport = *((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x018)); \ uint32_t currentpin = (currentport & (1 << bit)) >> bit; \ bool isInput = ((currentpin & 1) == 0); \ if (isInput == 1) { \ /* Read bit from Pin Data Status Register */ \ currentport = *((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x03c)); \ currentpin = (currentport & (1 << bit)) >> bit; \ return ((currentpin & 1) == 1); \ } else { \ /* Read bit from Output Data Status Register */ \ currentport = *((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x038)); \ currentpin = (currentport & (1 << bit)) >> bit; \ return ((currentpin & 1) == 1); \ } \ } \ static inline void TOSH_MAKE_##name##_OUTPUT() \ {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x010)) = (1 << bit);} \ static inline void TOSH_MAKE_##name##_INPUT() \ {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x014)) = (1 << bit);} #define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \ static inline void TOSH_SET_##name##_PIN() \ {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x030)) = (1 << bit);} \ static inline void TOSH_CLR_##name##_PIN() \ {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x034)) = (1 << bit);} \ static inline void TOSH_MAKE_##name##_OUTPUT() \ {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x010)) = (1 << bit);} \ #define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\ static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \ static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \ static inline void TOSH_MAKE_##alias##_OUTPUT() {} \ #define TOSH_ALIAS_PIN(alias, connector) \ static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \ static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \ static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \ static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \ #endif // SAM3S_HARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/smc/000077500000000000000000000000001207233610700214065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/smc/sam3smchardware.h000066400000000000000000000063161207233610700246510ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Static Memory Controller Register Definitions * * @author Thomas Schmid */ #ifndef _SAM3SSMCHARDWARE_H #define _SAM3SSMCHARDWARE_H #include "smchardware.h" /** * SMC MODE Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3S Series, Preliminary */ typedef union { uint32_t flat; struct { uint32_t read_mode : 1; // read mode uint32_t write_mode : 1; // write mode uint32_t reserved0 : 2; uint32_t exnw_mode : 2; // nwait mode uint32_t reserved1 : 2; uint32_t reserved2 : 4; uint32_t dbw : 2; // data bus width uint32_t reserved3 : 2; uint32_t tdf_cycles : 4; // data float time uint32_t tdf_mode : 1; // tdf optimization uint32_t reserved4 : 3; uint32_t pmen : 1; // page mode enable (note, not in documentation, but in code at91lib!) uint32_t reserved5 : 3; uint32_t ps : 2; // page mode size (note: not in documentation, but in code at91lib!) uint32_t reserved6 : 2; } __attribute__((__packed__)) bits; } smc_mode_t; typedef struct { volatile smc_setup_t setup; volatile smc_pulse_t pulse; volatile smc_cycle_t cycle; volatile smc_mode_t mode; } smc_cs_t; volatile smc_cs_t* SMC_CS0 = (volatile smc_cs_t*)0x400E0000; volatile smc_cs_t* SMC_CS1 = (volatile smc_cs_t*)0x400E0010; volatile smc_cs_t* SMC_CS2 = (volatile smc_cs_t*)0x400E0020; volatile smc_cs_t* SMC_CS3 = (volatile smc_cs_t*)0x400E0030; volatile smc_cs_t* SMC_CS4 = (volatile smc_cs_t*)0x400E0040; // questionable... #endif //_SAM3USMCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/spi/000077500000000000000000000000001207233610700214175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/spi/HilSam3SpiC.nc000066400000000000000000000073441207233610700237700ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SPI Configuration for the SAM3U-EK devkit. Does not use DMA (PDC) at this * point. Byte interface performs busy wait! * * @author Thomas Schmid * @author Kevin Klues */ #include configuration HilSam3SpiC { provides { interface Resource[uint8_t]; interface SpiByte[uint8_t]; interface FastSpiByte[uint8_t]; interface SpiPacket[uint8_t]; interface HplSam3SpiChipSelConfig[uint8_t]; interface HplSam3SpiConfig; } uses { interface Init as SpiChipInit; interface ResourceConfigure[uint8_t]; } } implementation { components RealMainP; RealMainP.PlatformInit -> HilSam3SpiP.Init; components HplSam3SpiC; HplSam3SpiConfig = HplSam3SpiC; HilSam3SpiP.SpiChipInit = SpiChipInit; HilSam3SpiP.HplSam3SpiConfig -> HplSam3SpiC; HilSam3SpiP.HplSam3SpiControl -> HplSam3SpiC; HilSam3SpiP.HplSam3SpiStatus -> HplSam3SpiC; HilSam3SpiP.HplSam3SpiInterrupts -> HplSam3SpiC; HplSam3SpiChipSelConfig[0] = HplSam3SpiC.HplSam3SpiChipSelConfig0; HplSam3SpiChipSelConfig[1] = HplSam3SpiC.HplSam3SpiChipSelConfig1; HplSam3SpiChipSelConfig[2] = HplSam3SpiC.HplSam3SpiChipSelConfig2; HplSam3SpiChipSelConfig[3] = HplSam3SpiC.HplSam3SpiChipSelConfig3; components new FcfsArbiterC(SAM3_SPI_BUS) as ArbiterC; Resource = ArbiterC; ResourceConfigure = ArbiterC; HilSam3SpiP.ArbiterInfo -> ArbiterC; components new AsyncStdControlPowerManagerC() as PM; PM.AsyncStdControl -> HplSam3SpiC; PM.ArbiterInfo -> ArbiterC.ArbiterInfo; PM.ResourceDefaultOwner -> ArbiterC.ResourceDefaultOwner; components HilSam3SpiP; SpiByte = HilSam3SpiP.SpiByte; SpiPacket = HilSam3SpiP.SpiPacket; components new FastSpiSam3C(SAM3_SPI_BUS); FastSpiSam3C.SpiByte -> HilSam3SpiP.SpiByte; FastSpiByte = FastSpiSam3C; components HplSam3sGeneralIOC; HilSam3SpiP.SpiPinMiso -> HplSam3sGeneralIOC.HplPioA12; HilSam3SpiP.SpiPinMosi -> HplSam3sGeneralIOC.HplPioA13; HilSam3SpiP.SpiPinSpck -> HplSam3sGeneralIOC.HplPioA14; components HplNVICC; HilSam3SpiP.SpiIrqControl -> HplNVICC.SPIInterrupt; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/spi/HplSam3SpiC.nc000066400000000000000000000060021207233610700237650ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * The hardware presentation layer for the SAM3U SPI. * * @author Thomas Schmid */ #include "sam3spihardware.h" configuration HplSam3SpiC { provides { interface AsyncStdControl; interface HplSam3SpiConfig; interface HplSam3SpiControl; interface HplSam3SpiInterrupts; interface HplSam3SpiStatus; interface HplSam3SpiChipSelConfig as HplSam3SpiChipSelConfig0; interface HplSam3SpiChipSelConfig as HplSam3SpiChipSelConfig1; interface HplSam3SpiChipSelConfig as HplSam3SpiChipSelConfig2; interface HplSam3SpiChipSelConfig as HplSam3SpiChipSelConfig3; } } implementation { components HplSam3SpiP; AsyncStdControl = HplSam3SpiP; HplSam3SpiConfig = HplSam3SpiP; HplSam3SpiControl = HplSam3SpiP; HplSam3SpiInterrupts = HplSam3SpiP; HplSam3SpiStatus = HplSam3SpiP; components new HplSam3SpiChipSelP(0x40008030) as CS0, new HplSam3SpiChipSelP(0x40008034) as CS1, new HplSam3SpiChipSelP(0x40008038) as CS2, new HplSam3SpiChipSelP(0x4000803C) as CS3; HplSam3SpiChipSelConfig0 = CS0; HplSam3SpiChipSelConfig1 = CS1; HplSam3SpiChipSelConfig2 = CS2; HplSam3SpiChipSelConfig3 = CS3; components HplSam3sClockC; HplSam3SpiP.SpiClockControl -> HplSam3sClockC.SPICntl; HplSam3SpiP.ClockConfig -> HplSam3sClockC; components McuSleepC; HplSam3SpiP.SpiInterruptWrapper -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/spi/sam3spihardware.h000066400000000000000000000036151207233610700246720ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Serial Peripheral Interface (SPI) register definitions. * * @author Thomas Schmid */ #ifndef _SAM3SPIHARDWARE_H #define _SAM3SPIHARDWARE_H #include "spihardware.h" /** * Memory mapping for the SPI */ volatile spi_t* SPI = (volatile spi_t *) 0x40008000; // SPI Base Address #endif // _SPIHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/supc/000077500000000000000000000000001207233610700215765ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/supc/sam3ssupchardware.h000066400000000000000000000034611207233610700254120ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ #ifndef SAM3SSUPCHARDWARE_H #define SAM3SSUPCHARDWARE_H #include "supchardware.h" /** * Memory mappin gofr the SUPC */ volatile supc_t* SUPC = (volatile supc_t *) 0x400E1410; #endif //SAM3SSUPCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/timer/000077500000000000000000000000001207233610700217445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/timer/HplSam3TCC.nc000066400000000000000000000151131207233610700240700ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Top level configuration of the timer counter peripheral. * * @author Thomas Schmid */ #include configuration HplSam3TCC { provides { interface Init; interface HplSam3TC as TC0; interface HplSam3TC as TC1; interface HplSam3TCChannel as TCH0; interface HplSam3TCChannel as TCH1; interface HplSam3TCChannel as TCH2; interface HplSam3TCChannel as TCH3; interface HplSam3TCChannel as TCH4; interface HplSam3TCChannel as TCH5; interface HplSam3TCCapture as TC0Capture; interface HplSam3TCCompare as TC0CompareA; interface HplSam3TCCompare as TC0CompareB; interface HplSam3TCCompare as TC0CompareC; interface HplSam3TCCapture as TC1Capture; interface HplSam3TCCompare as TC1CompareA; interface HplSam3TCCompare as TC1CompareB; interface HplSam3TCCompare as TC1CompareC; interface HplSam3TCCapture as TC2Capture; interface HplSam3TCCompare as TC2CompareA; interface HplSam3TCCompare as TC2CompareB; interface HplSam3TCCompare as TC2CompareC; interface HplSam3TCCapture as TC3Capture; interface HplSam3TCCompare as TC3CompareA; interface HplSam3TCCompare as TC3CompareB; interface HplSam3TCCompare as TC3CompareC; interface HplSam3TCCapture as TC4Capture; interface HplSam3TCCompare as TC4CompareA; interface HplSam3TCCompare as TC4CompareB; interface HplSam3TCCompare as TC4CompareC; interface HplSam3TCCapture as TC5Capture; interface HplSam3TCCompare as TC5CompareA; interface HplSam3TCCompare as TC5CompareB; interface HplSam3TCCompare as TC5CompareC; } } implementation { components HplNVICC, HplSam3TCEventP, HplSam3sClockC, new HplSam3TCChannelP( TC_CH0_BASE ) as TCCH0, new HplSam3TCChannelP( TC_CH1_BASE ) as TCCH1, new HplSam3TCChannelP( TC_CH2_BASE ) as TCCH2, new HplSam3TCChannelP( TC1_CH0_BASE ) as TCCH3, new HplSam3TCChannelP( TC1_CH1_BASE ) as TCCH4, new HplSam3TCChannelP( TC1_CH2_BASE ) as TCCH5; components McuSleepC; HplSam3TCEventP.TC0InterruptWrapper -> McuSleepC; HplSam3TCEventP.TC1InterruptWrapper -> McuSleepC; HplSam3TCEventP.TC2InterruptWrapper -> McuSleepC; HplSam3TCEventP.TC3InterruptWrapper -> McuSleepC; HplSam3TCEventP.TC4InterruptWrapper -> McuSleepC; HplSam3TCEventP.TC5InterruptWrapper -> McuSleepC; TCH0 = TCCH0; TCH1 = TCCH1; TCH2 = TCCH2; TCH3 = TCCH3; TCH4 = TCCH4; TCH5 = TCCH5; TCCH0.NVICTCInterrupt -> HplNVICC.TC0Interrupt; TCCH0.TimerEvent -> HplSam3TCEventP.TC0Event; TCCH0.TCPClockCntl -> HplSam3sClockC.TC0Cntl; TCCH0.ClockConfig -> HplSam3sClockC; TCCH1.NVICTCInterrupt -> HplNVICC.TC1Interrupt; TCCH1.TimerEvent -> HplSam3TCEventP.TC1Event; TCCH1.TCPClockCntl -> HplSam3sClockC.TC1Cntl; TCCH1.ClockConfig -> HplSam3sClockC; TCCH2.NVICTCInterrupt -> HplNVICC.TC2Interrupt; TCCH2.TimerEvent -> HplSam3TCEventP.TC2Event; TCCH2.TCPClockCntl -> HplSam3sClockC.TC2Cntl; TCCH2.ClockConfig -> HplSam3sClockC; TCCH3.NVICTCInterrupt -> HplNVICC.TC3Interrupt; TCCH3.TimerEvent -> HplSam3TCEventP.TC3Event; TCCH3.TCPClockCntl -> HplSam3sClockC.TC3Cntl; TCCH3.ClockConfig -> HplSam3sClockC; TCCH4.NVICTCInterrupt -> HplNVICC.TC4Interrupt; TCCH4.TimerEvent -> HplSam3TCEventP.TC4Event; TCCH4.TCPClockCntl -> HplSam3sClockC.TC4Cntl; TCCH4.ClockConfig -> HplSam3sClockC; TCCH5.NVICTCInterrupt -> HplNVICC.TC5Interrupt; TCCH5.TimerEvent -> HplSam3TCEventP.TC5Event; TCCH5.TCPClockCntl -> HplSam3sClockC.TC5Cntl; TCCH5.ClockConfig -> HplSam3sClockC; TC0Capture = TCCH0.Capture; TC0CompareA = TCCH0.CompareA; TC0CompareB = TCCH0.CompareB; TC0CompareC = TCCH0.CompareC; TC1Capture = TCCH1.Capture; TC1CompareA = TCCH1.CompareA; TC1CompareB = TCCH1.CompareB; TC1CompareC = TCCH1.CompareC; TC2Capture = TCCH2.Capture; TC2CompareA = TCCH2.CompareA; TC2CompareB = TCCH2.CompareB; TC2CompareC = TCCH2.CompareC; TC3Capture = TCCH3.Capture; TC3CompareA = TCCH3.CompareA; TC3CompareB = TCCH3.CompareB; TC3CompareC = TCCH3.CompareC; TC4Capture = TCCH4.Capture; TC4CompareA = TCCH4.CompareA; TC4CompareB = TCCH4.CompareB; TC4CompareC = TCCH4.CompareC; TC5Capture = TCCH5.Capture; TC5CompareA = TCCH5.CompareA; TC5CompareB = TCCH5.CompareB; TC5CompareC = TCCH5.CompareC; components new HplSam3TCP(TC_BASE) as HplTC0; components new HplSam3TCP(TC1_BASE) as HplTC1; Init = HplTC0; Init = HplTC1; HplTC0.ClockConfig -> HplSam3sClockC; HplTC1.ClockConfig -> HplSam3sClockC; HplTC0.TC0 -> TCCH0; HplTC0.TC1 -> TCCH1; HplTC0.TC2 -> TCCH2; HplTC1.TC0 -> TCCH3; HplTC1.TC1 -> TCCH4; HplTC1.TC2 -> TCCH5; HplTC0 = TC0; HplTC1 = TC1; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/timer/HplSam3TCEventP.nc000066400000000000000000000073451207233610700251170ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SAM3U TC Event dispatcher. * * @author Thomas Schmid */ #include "sam3tchardware.h" module HplSam3TCEventP @safe() { provides { interface HplSam3TCEvent as TC0Event; interface HplSam3TCEvent as TC1Event; interface HplSam3TCEvent as TC2Event; interface HplSam3TCEvent as TC3Event; interface HplSam3TCEvent as TC4Event; interface HplSam3TCEvent as TC5Event; } uses { interface FunctionWrapper as TC0InterruptWrapper; interface FunctionWrapper as TC1InterruptWrapper; interface FunctionWrapper as TC2InterruptWrapper; interface FunctionWrapper as TC3InterruptWrapper; interface FunctionWrapper as TC4InterruptWrapper; interface FunctionWrapper as TC5InterruptWrapper; } } implementation { void TC0IrqHandler() @C() @spontaneous() { call TC0InterruptWrapper.preamble(); signal TC0Event.fired(); call TC0InterruptWrapper.postamble(); } void TC1IrqHandler() @C() @spontaneous() { call TC1InterruptWrapper.preamble(); signal TC1Event.fired(); call TC1InterruptWrapper.postamble(); } void TC2IrqHandler() @C() @spontaneous() { call TC2InterruptWrapper.preamble(); signal TC2Event.fired(); call TC2InterruptWrapper.postamble(); } void TC3IrqHandler() @C() @spontaneous() { call TC3InterruptWrapper.preamble(); signal TC3Event.fired(); call TC3InterruptWrapper.postamble(); } void TC4IrqHandler() @C() @spontaneous() { call TC4InterruptWrapper.preamble(); signal TC4Event.fired(); call TC4InterruptWrapper.postamble(); } void TC5IrqHandler() @C() @spontaneous() { call TC5InterruptWrapper.preamble(); signal TC5Event.fired(); call TC5InterruptWrapper.postamble(); } default async event void TC0Event.fired() {} default async event void TC1Event.fired() {} default async event void TC2Event.fired() {} default async event void TC3Event.fired() {} default async event void TC4Event.fired() {} default async event void TC5Event.fired() {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/timer/sam3rtthardware.h000066400000000000000000000035601207233610700252340ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Real-Time Timer register definitions. * * @author Thomas Schmid */ #ifndef SAM3SRTTHARDWARE_H #define SAM3SRTTHARDWARE_H #include "rtthardware.h" // Defined in AT91 ARM Coretx-M3 based Microcontrollers, SAM3S Series, volatile rtt_t* RTT = (volatile rtt_t*) 0x400E1430; #endif // SAM3SRTTHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/timer/sam3tchardware.h000066400000000000000000000052221207233610700250260ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Timer Counter register definitions. * * @author Thomas Schmid */ #ifndef SAM3STCHARDWARE_H #define SAM3STCHARDWARE_H #include "tchardware.h" /** * TC definition capture mode */ typedef struct { volatile tc_channel_capture_t ch0; uint32_t reserved0[4]; volatile tc_channel_capture_t ch1; uint32_t reserved1[4]; volatile tc_channel_capture_t ch2; uint32_t reserved2[4]; volatile tc_bcr_t bcr; volatile tc_bmr_t bmr; volatile tc_qier_t qier; volatile tc_qidr_t qidr; volatile tc_qimr_t qimr; volatile tc_qisr_t qisr; } tc_t; /** * TC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary 9/1/09, p. 827 */ #define TC_BASE 0x40010000 #define TC1_BASE 0x40014000 #define TC_CH0_BASE 0x40010000 #define TC_CH1_BASE 0x40010040 #define TC_CH2_BASE 0x40010080 #define TC1_CH0_BASE 0x40014000 #define TC1_CH1_BASE 0x40014040 #define TC1_CH2_BASE 0x40014080 volatile tc_t* TC = (volatile tc_t*)TC_BASE; volatile tc_t* TC1 = (volatile tc_t*)TC1_BASE; #endif //SAM3UTCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/uart/000077500000000000000000000000001207233610700215775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/uart/HilSam3UartC.nc000066400000000000000000000051031207233610700243170ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ configuration HilSam3UartC { provides { interface StdControl; interface UartByte; interface UartStream; } } implementation { components HilSam3UartP; StdControl = HilSam3UartP; UartByte = HilSam3UartP; UartStream = HilSam3UartP; components HplSam3UartC; HilSam3UartP.HplSam3UartInterrupts -> HplSam3UartC; HilSam3UartP.HplSam3UartStatus -> HplSam3UartC; HilSam3UartP.HplSam3UartControl -> HplSam3UartC; HilSam3UartP.HplSam3UartConfig -> HplSam3UartC; #ifdef THREADS components PlatformInterruptC; HplSam3UartC.PlatformInterrupt -> PlatformInterruptC; #endif components MainC; MainC.SoftwareInit -> HilSam3UartP.Init; components HplNVICC; HilSam3UartP.UartIrqControl -> HplNVICC.UART0Interrupt; components HplSam3sGeneralIOC; HilSam3UartP.UartPin1 -> HplSam3sGeneralIOC.HplPioA9; HilSam3UartP.UartPin2 -> HplSam3sGeneralIOC.HplPioA10; components HplSam3sClockC; HilSam3UartP.UartClockControl -> HplSam3sClockC.UART0Cntl; HilSam3UartP.ClockConfig -> HplSam3sClockC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/uart/sam3uarthardware.h000066400000000000000000000054511207233610700252320ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Definitions specific to the SAM3S UART chip. * * @author Wanja Hofer * @author Thomas Schmid */ #ifndef SAM3SUARTHARDWARE_H #define SAM3SUARTHARDWARE_H #include "uarthardware.h" // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3S Series, Preliminary, p. 663 volatile uint32_t* UART_BASE = (volatile uint32_t *) 0x400e0600; volatile uart_cr_t* UART_CR = (volatile uart_cr_t*) 0x400e0600; // control, wo volatile uart_mr_t* UART_MR = (volatile uart_mr_t*) 0x400e0604; // mode, rw, reset 0x0 volatile uart_ier_t* UART_IER = (volatile uart_ier_t*) 0x400e0608; // interrupt enable, wo volatile uart_idr_t* UART_IDR = (volatile uart_idr_t*) 0x400e060c; // interrupt disable, wo volatile uart_imr_t* UART_IMR = (volatile uart_imr_t*) 0x400e0610; // interrupt mask, ro, reset 0x0 volatile uart_sr_t* UART_SR = (volatile uart_sr_t*) 0x400e0614; // status, ro volatile uart_rhr_t* UART_RHR = (volatile uart_rhr_t*) 0x400e0618; // receive holding, ro, reset 0x0 volatile uart_thr_t* UART_THR = (volatile uart_thr_t*) 0x400e061c; // transmit holding, wo volatile uart_brgr_t* UART_BRGR = (volatile uart_brgr_t*) 0x400e0620; // baud rate generator, rw, reset 0x0 #endif // SAM3SUARTHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/wdtc/000077500000000000000000000000001207233610700215655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/s/wdtc/sam3wdtchardware.h000066400000000000000000000037351207233610700252110ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Watchdog Timer register definitions. * * @author Thomas Schmid */ #ifndef _SAM3SWDTCHARDWARE_H #define _SAM3SWDTCHARDWARE_H #include "wdtchardware.h" /** * Memory mapping for the WDTC * Note that it is NOT 0x400e1440 as mentioned in sam3s preliminary from * Aug-10 */ volatile wdtc_t* WDTC = (volatile wdtc_t *) 0x400E1450; // WDTC Base Address #endif // _SAM3SWDTCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/smc/000077500000000000000000000000001207233610700211445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/smc/smchardware.h000066400000000000000000000065761207233610700236330ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Static Memory Controller Register Definitions * * @author Thomas Schmid */ #ifndef _SAM3SMCHARDWARE_H #define _SAM3SMCHARDWARE_H /** * SMC SETUP Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. */ typedef union { uint32_t flat; struct { uint32_t nwe_setup : 6; // NWE Setup length uint32_t reserved0 : 2; uint32_t ncs_wr_setup : 6; // ncs setup length in write access uint32_t reserved1 : 2; uint32_t nrd_setup : 6; // nrd setup length uint32_t reserved2 : 2; uint32_t ncs_rd_setup : 6; // ncs setup length in read access uint32_t reserved3 : 2; } __attribute__((__packed__)) bits; } smc_setup_t; /** * SMC PULSE Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. */ typedef union { uint32_t flat; struct { uint32_t nwe_pulse : 6; // NWE setup length uint32_t reserved0 : 2; uint32_t ncs_wr_pulse : 6; // ncs setup length in write access uint32_t reserved1 : 2; uint32_t nrd_pulse : 6; // nrd setup length uint32_t reserved2 : 2; uint32_t ncs_rd_pulse : 6; // ncs setup length in read access uint32_t reserved3 : 2; } __attribute__((__packed__)) bits; } smc_pulse_t; /** * SMC CYCLE Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. */ typedef union { uint32_t flat; struct { uint32_t nwe_cycle : 9; // total write cycle length uint32_t reserved0 : 7; uint32_t nrd_cycle : 9; // total read cycle length uint32_t reserved1 : 7; } __attribute__((__packed__)) bits; } smc_cycle_t; #endif //_SAM3SMCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/000077500000000000000000000000001207233610700211555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/FastSpiSam3C.nc000066400000000000000000000062601207233610700237030ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Emulate fast spi with SpiByte */ generic module FastSpiSam3C(char resourceName[]) { provides { interface FastSpiByte[uint8_t]; } uses { interface SpiByte[uint8_t]; } } implementation { enum { NUM_CLIENTS = uniqueCount(resourceName) }; volatile uint8_t lastRead[NUM_CLIENTS]; /** * Starts a split-phase SPI data transfer with the given data. * A splitRead/splitReadWrite command must follow this command even * if the result is unimportant. */ async command void FastSpiByte.splitWrite[uint8_t id](uint8_t data){ atomic lastRead[id] = call SpiByte.write[id](data); } /** * Finishes the split-phase SPI data transfer by waiting till * the write command comletes and returning the received data. */ async command uint8_t FastSpiByte.splitRead[uint8_t id](){ atomic return lastRead[id]; } /** * This command first reads the SPI register and then writes * there the new data, then returns. */ async command uint8_t FastSpiByte.splitReadWrite[uint8_t id](uint8_t data){ uint8_t tmp; atomic { tmp = lastRead[id]; lastRead[id] = call SpiByte.write[id](data); } return tmp; } /** * This is the standard SpiByte.write command but a little * faster as we should not need to adjust the power state there. * (To be consistent, this command could have be named splitWriteRead). */ async command uint8_t FastSpiByte.write[uint8_t id](uint8_t data){ return call SpiByte.write[id](data); } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/HilSam3SpiP.nc000066400000000000000000000135121207233610700235350ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SPI implementation for the SAM3U chip. Does not use DMA (PDC) at this * point. Byte interface performs busy wait! * * @author Thomas Schmid * @author Kevin Klues */ #include "sam3spihardware.h" module HilSam3SpiP { provides { interface Init; interface SpiByte[uint8_t]; interface SpiPacket[uint8_t]; } uses { interface Init as SpiChipInit; interface ArbiterInfo; interface HplSam3SpiConfig; interface HplSam3SpiControl; interface HplSam3SpiInterrupts; interface HplSam3SpiStatus; interface HplNVICInterruptCntl as SpiIrqControl; interface HplSam3GeneralIOPin as SpiPinMiso; interface HplSam3GeneralIOPin as SpiPinMosi; interface HplSam3GeneralIOPin as SpiPinSpck; } } implementation { void signalDone(); task void signalDone_task(); uint8_t* globalTxBuf; uint8_t* globalRxBuf; uint16_t globalLen; command error_t Init.init() { // turn off all interrupts call HplSam3SpiInterrupts.disableAllSpiIrqs(); // configure NVIC call SpiIrqControl.configure(IRQ_PRIO_SPI); call SpiIrqControl.enable(); // configure PIO call SpiPinMiso.disablePioControl(); call SpiPinMiso.selectPeripheralA(); call SpiPinMosi.disablePioControl(); call SpiPinMosi.selectPeripheralA(); call SpiPinSpck.disablePioControl(); call SpiPinSpck.selectPeripheralA(); // reset the SPI configuration call HplSam3SpiControl.resetSpi(); // configure for master call HplSam3SpiConfig.setMaster(); // chip select options call HplSam3SpiConfig.setFixedCS(); // CS needs to be configured for each message sent! //call HplSam3SpiConfig.setVariableCS(); // CS needs to be configured for each message sent! call HplSam3SpiConfig.setDirectCS(); // CS pins are not multiplexed call SpiChipInit.init(); return SUCCESS; } async command uint8_t SpiByte.write[uint8_t device]( uint8_t tx) { uint8_t byte; if(!(call ArbiterInfo.userId() == device)) return -1; //call HplSam3SpiChipSelConfig.enableCSActive(); call HplSam3SpiStatus.setDataToTransmit(tx); while(!call HplSam3SpiStatus.isRxFull()); byte = (uint8_t)call HplSam3SpiStatus.getReceivedData(); return byte; } async command error_t SpiPacket.send[uint8_t device](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { uint16_t m_len = len; uint16_t m_pos = 0; if(!(call ArbiterInfo.userId() == device)) return -1; if(len) { while( m_pos < len) { /** * FIXME: in order to be compatible with the general TinyOS * Spi Interface, we can't do automatic CS control!!! if(m_pos == len-1) call HplSam3SpiStatus.setDataToTransmitCS(txBuf[m_pos], 3, TRUE); else call HplSam3SpiStatus.setDataToTransmitCS(txBuf[m_pos], 3, FALSE); */ /* call HplSam3SpiStatus.setDataToTransmitCS(txBuf[m_pos], device, FALSE); while(!call HplSam3SpiStatus.isRxFull()); rxBuf[m_pos] = (uint8_t)call HplSam3SpiStatus.getReceivedData(); */ rxBuf[m_pos] = (uint8_t)call SpiByte.write[device](txBuf[m_pos]); m_pos += 1; } } atomic { globalRxBuf = rxBuf; globalTxBuf = txBuf; globalLen = m_len; } post signalDone_task(); //atomic signal SpiPacket.sendDone(txBuf, rxBuf, m_len, SUCCESS); return SUCCESS; } task void signalDone_task() { atomic signalDone(); } void signalDone() { uint8_t device = call ArbiterInfo.userId(); signal SpiPacket.sendDone[device](globalTxBuf, globalRxBuf, globalLen, SUCCESS); } default async event void SpiPacket.sendDone[uint8_t device](uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error) {} async event void HplSam3SpiInterrupts.receivedData(uint16_t data) {}; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/HplSam3SpiChipSelConfig.nc000066400000000000000000000063421207233610700260250ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to configure the Chip Selects of the SAM3U SPI. * * @author Thomas Schmid */ interface HplSam3SpiChipSelConfig { /** * Set the Clock polarity * 0: inactive state is logic zero * 1: inactive state is logic one */ async command error_t setClockPolarity(uint8_t p); /** * Set the Clock Phase * 0: changed on leading edge, and captured on following edge * 1: captured on leading edge, and changed on following edge */ async command error_t setClockPhase(uint8_t p); /** * Disable automatic Chip Select rising between consecutive transmits * (default) */ async command error_t disableAutoCS(); /** * enable automatic Chip Select rising between consecutive transmits. */ async command error_t enableAutoCS(); /** * Enable Chip Select active after transfer (default). */ async command error_t enableCSActive(); /** * Disable Chip Select active after transfer. */ async command error_t disableCSActive(); /** * Set the total amount of bits per transfer. Range is from 8 to 16. */ async command error_t setBitsPerTransfer(uint8_t b); /** * Set the serial clock baud rate by defining the MCK devider, i.e., baud * rate = MCK/divider. * Acceptable values range from 1 to 255. */ async command error_t setBaud(uint8_t divider); /** * Set the delay between NPCS ready to first valid SPCK. */ async command error_t setClkDelay(uint8_t delay); /** * Set the delay between consecutive transfers. */ async command error_t setTxDelay(uint8_t delay); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/HplSam3SpiChipSelP.nc000066400000000000000000000116731207233610700250220ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to control the SAM3U SPI. * * @author Thomas Schmid */ #include "sam3spihardware.h" generic module HplSam3SpiChipSelP(uint32_t csrp) { provides { interface HplSam3SpiChipSelConfig; } } implementation { volatile spi_csr_t *csr = (volatile spi_csr_t*)csrp; bool cs; /** * Set the Clock polarity * 0: inactive state is logic zero * 1: inactive state is logic one */ async command error_t HplSam3SpiChipSelConfig.setClockPolarity(uint8_t p) { spi_csr_t reg = *csr; if(p > 1) return FAIL; reg.bits.cpol = p; *csr = reg; return SUCCESS; } /** * Set the Clock Phase * 0: changed on leading edge, and captured on following edge * 1: captured on leading edge, and changed on following edge */ async command error_t HplSam3SpiChipSelConfig.setClockPhase(uint8_t p) { spi_csr_t reg = *csr; if(p > 1) return FAIL; reg.bits.ncpha = p; *csr = reg; return SUCCESS; } /** * Disable automatic Chip Select rising between consecutive transmits * (default) */ async command error_t HplSam3SpiChipSelConfig.disableAutoCS() { spi_csr_t reg = *csr; reg.bits.csnaat = 0; *csr = reg; return SUCCESS; } /** * enable automatic Chip Select rising between consecutive transmits. */ async command error_t HplSam3SpiChipSelConfig.enableAutoCS() { spi_csr_t reg = *csr; reg.bits.csnaat = 1; *csr = reg; return SUCCESS; } /** * Enable Chip Select active after transfer (default). */ async command error_t HplSam3SpiChipSelConfig.enableCSActive() { spi_csr_t reg = *csr; reg.bits.csaat= 0; *csr = reg; return SUCCESS; } /** * Disable Chip Select active after transfer. */ async command error_t HplSam3SpiChipSelConfig.disableCSActive() { spi_csr_t reg = *csr; reg.bits.csaat= 1; *csr = reg; return SUCCESS; } /** * Set the total amount of bits per transfer. Range is from 8 to 16. */ async command error_t HplSam3SpiChipSelConfig.setBitsPerTransfer(uint8_t b) { spi_csr_t reg = *csr; if(b > 8) return FAIL; reg.bits.bits = b; *csr = reg; return SUCCESS; } /** * Set the serial clock baud rate by defining the MCK devider, i.e., baud * rate = MCK/divider. * Acceptable values range from 1 to 255. */ async command error_t HplSam3SpiChipSelConfig.setBaud(uint8_t divider) { spi_csr_t tcsr = *csr; if(divider == 0) return FAIL; tcsr.bits.scbr = divider; *csr = tcsr; return SUCCESS; } /** * Set the delay between NPCS ready to first valid SPCK. */ async command error_t HplSam3SpiChipSelConfig.setClkDelay(uint8_t delay) { spi_csr_t tcsr = *csr; tcsr.bits.dlybs = delay; *csr = tcsr; return SUCCESS; } /** * Set the delay between consecutive transfers. */ async command error_t HplSam3SpiChipSelConfig.setTxDelay(uint8_t delay) { spi_csr_t tcsr = *csr; tcsr.bits.dlybct = delay; *csr = tcsr; return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/HplSam3SpiConfig.nc000066400000000000000000000063731207233610700245610ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to configure the SAM3 SPI. * * @author Thomas Schmid */ interface HplSam3SpiConfig { /** * Set the SPI interface to Master mode (default). */ async command error_t setMaster(); /** * Set the SPI interface to Slave mode. */ async command error_t setSlave(); /** * Set fixed peripherel select. */ async command error_t setFixedCS(); /** * Set variable peripheral select. */ async command error_t setVariableCS(); /** * Set the Chip Select pins to be directly connected to the chips * (default). */ async command error_t setDirectCS(); /** * Set the Chip Select pins to be connected to a 4- to 16-bit decoder */ async command error_t setMultiplexedCS(); /** * Enable mode fault detection (default). */ async command error_t enableModeFault(); /** * Disable mode fault detection. */ async command error_t disableModeFault(); /** * Disable suppression of transmit if receive register is not empty * (default). */ async command error_t disableWaitTx(); /** * Enable suppression of transmit if receive register is not empty. */ async command error_t enableWaitTx(); /** * Disable local loopback */ async command error_t disableLoopBack(); /** * Enable local loopback */ async command error_t enableLoopBack(); /** * Select peripheral chip */ async command error_t selectChip(uint8_t pcs); /** * Set the delay between chip select changes in MCK clock ticks. */ async command error_t setChipSelectDelay(uint8_t n); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/HplSam3SpiControl.nc000066400000000000000000000035221207233610700247650ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to control the SAM3U SPI. * * @author Thomas Schmid */ interface HplSam3SpiControl { async command void resetSpi(); async command void enableSpi(); async command void disableSpi(); async command void lastTransfer(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/HplSam3SpiInterrupts.nc000066400000000000000000000053701207233610700255270ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to control and query the SAM3 SPI interrupts. * * @author Thomas Schmid */ interface HplSam3SpiInterrupts { async event void receivedData(uint16_t data); async command void disableAllSpiIrqs(); async command void enableRxFullIrq(); async command void disableRxFullIrq(); async command bool isEnabledRxFullIrq(); async command void enableTxDataEmptyIrq(); async command void disableTxDataEmptyIrq(); async command bool isEnabledTxDataEmptyIrq(); async command void enableModeFaultIrq(); async command void disableModeFaultIrq(); async command bool isEnabledModeFaultIrq(); async command void enableOverrunIrq(); async command void disableOverrunIrq(); async command bool isEnabledOverrunIrq(); async command void enableNssRisingIrq(); async command void disableNssRisingIrq(); async command bool isEnabledNssRisingIrq(); async command void enableTxEmptyIrq(); async command void disableTxEmptyIrq(); async command bool isEnabledTxEmptyIrq(); async command void enableUnderrunIrq(); async command void disableUnderrunIrq(); async command bool isEnabledUnderrunIrq(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/HplSam3SpiP.nc000066400000000000000000000332261207233610700235500ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * The hardware presentation layer for the SAM3U SPI. * * @author Thomas Schmid */ #include "sam3spihardware.h" module HplSam3SpiP { provides { interface AsyncStdControl; interface HplSam3SpiConfig; interface HplSam3SpiControl; interface HplSam3SpiInterrupts; interface HplSam3SpiStatus; } uses { interface FunctionWrapper as SpiInterruptWrapper; interface HplSam3PeripheralClockCntl as SpiClockControl; interface HplSam3Clock as ClockConfig; } } implementation { async command error_t AsyncStdControl.start() { // enable peripheral clock call SpiClockControl.enable(); // enable SPI call HplSam3SpiControl.enableSpi(); // enable SPI IRQ (Byte is a busy wait!) //call HplSam3SpiInterrupts.enableRxFullIrq(); return SUCCESS; } async command error_t AsyncStdControl.stop() { // stop the SPI call HplSam3SpiControl.disableSpi(); // stop the peripheral clock call SpiClockControl.disable(); return SUCCESS; } /** * Set the SPI interface to Master mode (default). */ async command error_t HplSam3SpiConfig.setMaster() { spi_mr_t mr = SPI->mr; mr.bits.mstr = 1; SPI->mr = mr; return SUCCESS; } /** * Set the SPI interface to Slave mode. */ async command error_t HplSam3SpiConfig.setSlave() { spi_mr_t mr = SPI->mr; mr.bits.mstr = 0; SPI->mr = mr; return SUCCESS; } /** * Set fixed peripherel select. */ async command error_t HplSam3SpiConfig.setFixedCS() { spi_mr_t mr = SPI->mr; mr.bits.ps = 0; SPI->mr = mr; return SUCCESS; } /** * Set variable peripheral select. */ async command error_t HplSam3SpiConfig.setVariableCS() { spi_mr_t mr = SPI->mr; mr.bits.ps = 1; SPI->mr = mr; return SUCCESS; } /** * Set the Chip Select pins to be directly connected to the chips * (default). */ async command error_t HplSam3SpiConfig.setDirectCS() { spi_mr_t mr = SPI->mr; mr.bits.pcsdec = 0; SPI->mr = mr; return SUCCESS; } /** * Set the Chip Select pins to be connected to a 4- to 16-bit decoder */ async command error_t HplSam3SpiConfig.setMultiplexedCS() { spi_mr_t mr = SPI->mr; mr.bits.pcsdec = 1; SPI->mr = mr; return SUCCESS; } /** * Enable mode fault detection (default). */ async command error_t HplSam3SpiConfig.enableModeFault() { spi_mr_t mr = SPI->mr; mr.bits.modfdis = 0; SPI->mr = mr; return SUCCESS; } /** * Disable mode fault detection. */ async command error_t HplSam3SpiConfig.disableModeFault() { spi_mr_t mr = SPI->mr; mr.bits.modfdis = 1; SPI->mr = mr; return SUCCESS; } /** * Disable suppression of transmit if receive register is not empty * (default). */ async command error_t HplSam3SpiConfig.disableWaitTx() { spi_mr_t mr = SPI->mr; mr.bits.wdrbt = 0; SPI->mr = mr; return SUCCESS; } /** * Enable suppression of transmit if receive register is not empty. */ async command error_t HplSam3SpiConfig.enableWaitTx() { spi_mr_t mr = SPI->mr; mr.bits.wdrbt = 1; SPI->mr = mr; return SUCCESS; } /** * Disable local loopback */ async command error_t HplSam3SpiConfig.disableLoopBack() { spi_mr_t mr = SPI->mr; mr.bits.llb = 0; SPI->mr = mr; return SUCCESS; } /** * Enable local loopback */ async command error_t HplSam3SpiConfig.enableLoopBack() { spi_mr_t mr = SPI->mr; mr.bits.llb = 1; SPI->mr = mr; return SUCCESS; } /** * Select peripheral chip */ async command error_t HplSam3SpiConfig.selectChip(uint8_t pcs) { spi_mr_t mr = SPI->mr; if(SPI->mr.bits.pcsdec == 0) { switch(pcs) { case 0: mr.bits.pcs = 0; break; case 1: mr.bits.pcs = 1; break; case 2: mr.bits.pcs = 3; break; case 3: mr.bits.pcs = 7; break; default: return EINVAL; } } else { if(pcs > 15) return EINVAL; mr.bits.pcs = pcs; } SPI->mr = mr; return SUCCESS; } /** * Set the delay between chip select changes in MCK clock ticks. */ async command error_t HplSam3SpiConfig.setChipSelectDelay(uint8_t n) { spi_mr_t mr = SPI->mr; mr.bits.dlybcs = n; SPI->mr = mr; return SUCCESS; } async command void HplSam3SpiControl.resetSpi() { spi_cr_t cr = SPI->cr; cr.bits.swrst = 1; SPI->cr = cr; } async command void HplSam3SpiControl.enableSpi() { spi_cr_t cr = SPI->cr; cr.bits.spien = 1; SPI->cr = cr; } async command void HplSam3SpiControl.disableSpi() { spi_cr_t cr = SPI->cr; cr.bits.spidis = 1; SPI->cr = cr; } async command void HplSam3SpiControl.lastTransfer() { spi_cr_t cr = SPI->cr; cr.bits.lastxfer = 1; SPI->cr = cr; } __attribute__((interrupt)) void SpiIrqHandler() @C() @spontaneous() { call SpiInterruptWrapper.preamble(); if((call HplSam3SpiInterrupts.isEnabledRxFullIrq() == TRUE) && (call HplSam3SpiStatus.isRxFull() == TRUE)) { uint16_t data = call HplSam3SpiStatus.getReceivedData(); signal HplSam3SpiInterrupts.receivedData(data); } call SpiInterruptWrapper.postamble(); } async command void HplSam3SpiInterrupts.disableAllSpiIrqs() { call HplSam3SpiInterrupts.disableRxFullIrq(); call HplSam3SpiInterrupts.disableTxDataEmptyIrq(); call HplSam3SpiInterrupts.disableModeFaultIrq(); call HplSam3SpiInterrupts.disableOverrunIrq(); call HplSam3SpiInterrupts.disableNssRisingIrq(); call HplSam3SpiInterrupts.disableTxEmptyIrq(); call HplSam3SpiInterrupts.disableUnderrunIrq(); } // RDRF async command void HplSam3SpiInterrupts.enableRxFullIrq() { spi_ier_t ier = SPI->ier; ier.bits.rdrf = 1; SPI->ier = ier; } async command void HplSam3SpiInterrupts.disableRxFullIrq() { spi_idr_t idr = SPI->idr; idr.bits.rdrf = 1; SPI->idr = idr; } async command bool HplSam3SpiInterrupts.isEnabledRxFullIrq() { return (SPI->imr.bits.rdrf == 1); } // TDRE async command void HplSam3SpiInterrupts.enableTxDataEmptyIrq() { spi_ier_t ier = SPI->ier; ier.bits.tdre = 1; SPI->ier = ier; } async command void HplSam3SpiInterrupts.disableTxDataEmptyIrq() { spi_idr_t idr = SPI->idr; idr.bits.tdre = 1; SPI->idr = idr; } async command bool HplSam3SpiInterrupts.isEnabledTxDataEmptyIrq() { return (SPI->imr.bits.tdre == 1); } // MODF async command void HplSam3SpiInterrupts.enableModeFaultIrq() { spi_ier_t ier = SPI->ier; ier.bits.modf = 1; SPI->ier = ier; } async command void HplSam3SpiInterrupts.disableModeFaultIrq() { spi_idr_t idr = SPI->idr; idr.bits.modf = 1; SPI->idr = idr; } async command bool HplSam3SpiInterrupts.isEnabledModeFaultIrq() { return (SPI->imr.bits.modf == 1); } // OVRES async command void HplSam3SpiInterrupts.enableOverrunIrq() { spi_ier_t ier = SPI->ier; ier.bits.ovres = 1; SPI->ier = ier; } async command void HplSam3SpiInterrupts.disableOverrunIrq() { spi_idr_t idr = SPI->idr; idr.bits.ovres = 1; SPI->idr = idr; } async command bool HplSam3SpiInterrupts.isEnabledOverrunIrq() { return (SPI->imr.bits.ovres == 1); } // NSSR async command void HplSam3SpiInterrupts.enableNssRisingIrq() { spi_ier_t ier = SPI->ier; ier.bits.nssr = 1; SPI->ier = ier; } async command void HplSam3SpiInterrupts.disableNssRisingIrq() { spi_idr_t idr = SPI->idr; idr.bits.nssr = 1; SPI->idr = idr; } async command bool HplSam3SpiInterrupts.isEnabledNssRisingIrq() { return (SPI->imr.bits.nssr == 1); } // TXEMPTY async command void HplSam3SpiInterrupts.enableTxEmptyIrq() { spi_ier_t ier = SPI->ier; ier.bits.txempty = 1; SPI->ier = ier; } async command void HplSam3SpiInterrupts.disableTxEmptyIrq() { spi_idr_t idr = SPI->idr; idr.bits.txempty = 1; SPI->idr = idr; } async command bool HplSam3SpiInterrupts.isEnabledTxEmptyIrq() { return (SPI->imr.bits.txempty == 1); } // UNDES async command void HplSam3SpiInterrupts.enableUnderrunIrq() { spi_ier_t ier = SPI->ier; ier.bits.undes = 1; SPI->ier = ier; } async command void HplSam3SpiInterrupts.disableUnderrunIrq() { spi_idr_t idr = SPI->idr; idr.bits.undes = 1; SPI->idr = idr; } async command bool HplSam3SpiInterrupts.isEnabledUnderrunIrq() { return (SPI->imr.bits.undes == 1); } async command uint16_t HplSam3SpiStatus.getReceivedData() { return SPI->rdr.bits.rd; } async command error_t HplSam3SpiStatus.setDataToTransmitCS(uint16_t txchr, uint8_t pcs, bool lastXfer) { spi_tdr_t tdr; if(SPI->mr.bits.ps == 1) { if(SPI->mr.bits.pcsdec == 0) { switch(pcs) { case 0: tdr.bits.pcs = 0; break; case 1: tdr.bits.pcs = 1; break; case 2: tdr.bits.pcs = 3; break; case 3: tdr.bits.pcs = 7; break; default: return EINVAL; } } else { if(pcs > 15) return EINVAL; tdr.bits.pcs = pcs; } tdr.bits.td = txchr; tdr.bits.lastxfer = lastXfer; SPI->tdr = tdr; } else { if(call HplSam3SpiConfig.selectChip(pcs) != SUCCESS) return EINVAL; call HplSam3SpiStatus.setDataToTransmit(txchr); } return SUCCESS; } async command void HplSam3SpiStatus.setDataToTransmit(uint16_t txchr) { spi_tdr_t tdr = SPI->tdr; tdr.bits.td = txchr; SPI->tdr = tdr; } async command bool HplSam3SpiStatus.isRxFull() { return (SPI->sr.bits.rdrf == 1); } async command bool HplSam3SpiStatus.isTxDataEmpty() { return (SPI->sr.bits.tdre == 1); } async command bool HplSam3SpiStatus.isModeFault() { return (SPI->sr.bits.modf == 1); } async command bool HplSam3SpiStatus.isOverrunError() { return (SPI->sr.bits.ovres == 1); } async command bool HplSam3SpiStatus.isNssRising() { return (SPI->sr.bits.nssr == 1); } async command bool HplSam3SpiStatus.isTxEmpty() { return (SPI->sr.bits.txempty == 1); } async command bool HplSam3SpiStatus.isUnderrunError() { return (SPI->sr.bits.undes == 1); } async command bool HplSam3SpiStatus.isSpiEnabled() { return (SPI->sr.bits.spiens == 1); } async event void ClockConfig.mainClockChanged() {}; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/HplSam3SpiStatus.nc000066400000000000000000000043041207233610700246270ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to query the status of the SAM3 SPI. * * @author Thomas Schmid */ interface HplSam3SpiStatus { async command uint16_t getReceivedData(); async command void setDataToTransmit(uint16_t txchr); async command error_t setDataToTransmitCS(uint16_t txchr, uint8_t pcs, bool lastXfer); async command bool isRxFull(); async command bool isTxDataEmpty(); async command bool isModeFault(); async command bool isOverrunError(); async command bool isNssRising(); async command bool isTxEmpty(); async command bool isUnderrunError(); async command bool isSpiEnabled(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/Sam3Spi0C.nc000066400000000000000000000050341207233610700231430ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include generic configuration Sam3Spi0C() { provides { interface Resource; interface SpiByte; interface FastSpiByte; interface SpiPacket; interface HplSam3SpiChipSelConfig; } uses { interface Init as SpiInit; interface ResourceConfigure; } } implementation { enum { CLIENT_ID = unique(SAM3_SPI_BUS), }; components HilSam3SpiC as SpiC; SpiC.SpiChipInit = SpiInit; Resource = SpiC.Resource[CLIENT_ID]; SpiByte = SpiC.SpiByte[CLIENT_ID]; FastSpiByte = SpiC.FastSpiByte[CLIENT_ID]; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; HplSam3SpiChipSelConfig = SpiC.HplSam3SpiChipSelConfig[0]; components new Sam3SpiP(0); ResourceConfigure = Sam3SpiP.ResourceConfigure; Sam3SpiP.SubResourceConfigure <- SpiC.ResourceConfigure[CLIENT_ID]; Sam3SpiP.HplSam3SpiConfig -> SpiC.HplSam3SpiConfig; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/Sam3Spi1C.nc000066400000000000000000000050161207233610700231440ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include generic configuration Sam3Spi1C() { provides { interface Resource; interface SpiByte; interface FastSpiByte; interface SpiPacket; interface HplSam3SpiChipSelConfig; } uses { interface Init as SpiInit; interface ResourceConfigure; } } implementation { enum { CLIENT_ID = unique(SAM3_SPI_BUS), }; components HilSam3SpiC as SpiC; SpiC.SpiChipInit = SpiInit; Resource = SpiC.Resource[CLIENT_ID]; SpiByte = SpiC.SpiByte[CLIENT_ID]; FastSpiByte = SpiC.FastSpiByte[CLIENT_ID]; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; HplSam3SpiChipSelConfig = SpiC.HplSam3SpiChipSelConfig[1]; components new Sam3SpiP(1); ResourceConfigure = Sam3SpiP.ResourceConfigure; Sam3SpiP.SubResourceConfigure <- SpiC.ResourceConfigure[CLIENT_ID]; Sam3SpiP.HplSam3SpiConfig -> SpiC.HplSam3SpiConfig; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/Sam3Spi2C.nc000066400000000000000000000050161207233610700231450ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include generic configuration Sam3Spi2C() { provides { interface Resource; interface SpiByte; interface FastSpiByte; interface SpiPacket; interface HplSam3SpiChipSelConfig; } uses { interface Init as SpiInit; interface ResourceConfigure; } } implementation { enum { CLIENT_ID = unique(SAM3_SPI_BUS), }; components HilSam3SpiC as SpiC; SpiC.SpiChipInit = SpiInit; Resource = SpiC.Resource[CLIENT_ID]; SpiByte = SpiC.SpiByte[CLIENT_ID]; FastSpiByte = SpiC.FastSpiByte[CLIENT_ID]; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; HplSam3SpiChipSelConfig = SpiC.HplSam3SpiChipSelConfig[2]; components new Sam3SpiP(2); ResourceConfigure = Sam3SpiP.ResourceConfigure; Sam3SpiP.SubResourceConfigure <- SpiC.ResourceConfigure[CLIENT_ID]; Sam3SpiP.HplSam3SpiConfig -> SpiC.HplSam3SpiConfig; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/Sam3Spi3C.nc000066400000000000000000000050161207233610700231460ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include generic configuration Sam3Spi3C() { provides { interface Resource; interface SpiByte; interface FastSpiByte; interface SpiPacket; interface HplSam3SpiChipSelConfig; } uses { interface Init as SpiInit; interface ResourceConfigure; } } implementation { enum { CLIENT_ID = unique(SAM3_SPI_BUS), }; components HilSam3SpiC as SpiC; SpiC.SpiChipInit = SpiInit; Resource = SpiC.Resource[CLIENT_ID]; SpiByte = SpiC.SpiByte[CLIENT_ID]; FastSpiByte = SpiC.FastSpiByte[CLIENT_ID]; SpiPacket = SpiC.SpiPacket[CLIENT_ID]; HplSam3SpiChipSelConfig = SpiC.HplSam3SpiChipSelConfig[3]; components new Sam3SpiP(3); ResourceConfigure = Sam3SpiP.ResourceConfigure; Sam3SpiP.SubResourceConfigure <- SpiC.ResourceConfigure[CLIENT_ID]; Sam3SpiP.HplSam3SpiConfig -> SpiC.HplSam3SpiConfig; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/Sam3SpiP.nc000066400000000000000000000041211207233610700230740ustar00rootroot00000000000000/* * Copyright (c) 2009 University of California, Los Angeles * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ generic module Sam3SpiP(uint8_t chip_id) { provides { interface ResourceConfigure as SubResourceConfigure; } uses { interface ResourceConfigure; interface HplSam3SpiConfig; } } implementation { async command void SubResourceConfigure.configure() { call HplSam3SpiConfig.selectChip(chip_id); call ResourceConfigure.configure(); } async command void SubResourceConfigure.unconfigure() { call ResourceConfigure.unconfigure(); } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/spi/spihardware.h000066400000000000000000000242431207233610700236440ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Serial Peripheral Interface (SPI) register definitions. * * @author Thomas Schmid */ #ifndef _SPIHARDWARE_H #define _SPIHARDWARE_H #define SAM3_HPLSPI_RESOURCE "Sam3HplSpi.Resource" #define SAM3_SPI_BUS "Sam3Spi.Bus" /** * SPI Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 621 */ typedef union { uint32_t flat; struct { uint8_t spien : 1; // spi enable uint8_t spidis : 1; // spi disable uint8_t reserved0 : 5; uint8_t swrst : 1; // spi software reset uint8_t reserved1 : 8; uint8_t reserved2 : 8; uint8_t lastxfer : 1; // last transfer uint8_t reserved3 : 7; } __attribute__((__packed__)) bits; } spi_cr_t; /** * SPI Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 622 */ typedef union { uint32_t flat; struct { uint8_t mstr : 1; // master/slave mode uint8_t ps : 1; // peripheral select uint8_t pcsdec : 1; // chip select decode uint8_t reserved0 : 1; uint8_t modfdis : 1; // mode fault detection uint8_t wdrbt : 1; // wait data ready before transfer uint8_t reserved1 : 1; uint8_t llb : 1; // local loopback enable uint8_t reserved2 : 8; uint8_t pcs : 4; // peripheral chip select uint8_t reserved3 : 4; uint8_t dlybcs : 8; // delay between chip selects } __attribute__((__packed__)) bits; } spi_mr_t; /** * SPI Receive Data Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 624 */ typedef union { uint32_t flat; struct { uint16_t rd : 16; // receive data uint8_t pcs : 4; // peripheral chip select uint8_t reserved0 : 4; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } spi_rdr_t; /** * SPI Transmit Data Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 625 */ typedef union { uint32_t flat; struct { uint16_t td : 16; // transmit data uint8_t pcs : 4; // peripheral chip select uint8_t reserved0 : 4; uint8_t lastxfer : 1; // last transfer uint8_t reserved1 : 7; } __attribute__((__packed__)) bits; } spi_tdr_t; /** * SPI Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 626 */ typedef union { uint32_t flat; struct { uint8_t rdrf : 1; // receive data register full uint8_t tdre : 1; // transmit data register empty uint8_t modf : 1; // mode fault error uint8_t ovres : 1; // overrun error status uint8_t reserved0 : 4; uint8_t nssr : 1; // nss rising uint8_t txempty : 1; // transmission registers empty uint8_t undes : 1; // underrun error status (slave only) uint8_t reserved1 : 5; uint8_t spiens : 1; // spi enable status uint8_t reserved2 : 7; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } spi_sr_t; /** * SPI Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 628 */ typedef union { uint32_t flat; struct { uint8_t rdrf : 1; // receive data register full interrupt enable uint8_t tdre : 1; // spi transmit data register empty interrupt enable uint8_t modf : 1; // mode fault error interrupt enable uint8_t ovres : 1; // overrun error interrupt enable uint8_t reserved0 : 4; uint8_t nssr : 1; // nss rising interrupt enable uint8_t txempty : 1; // transmission registers empty enable uint8_t undes : 1; // underrun error interrupt enable uint8_t reserved1 : 5; uint8_t reserved2 : 8; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } spi_ier_t; /** * SPI Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 629 */ typedef union { uint32_t flat; struct { uint8_t rdrf : 1; // receive data register full interrupt disable uint8_t tdre : 1; // spi transmit data register empty interrupt disable uint8_t modf : 1; // mode fault error interrupt disable uint8_t ovres : 1; // overrun error interrupt disable uint8_t reserved0 : 4; uint8_t nssr : 1; // nss rising interrupt disable uint8_t txempty : 1; // transmission registers empty disable uint8_t undes : 1; // underrun error interrupt disable uint8_t reserved1 : 5; uint8_t reserved2 : 8; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } spi_idr_t; /** * SPI Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 630 */ typedef union { uint32_t flat; struct { uint8_t rdrf : 1; // receive data register full interrupt mask uint8_t tdre : 1; // spi transmit data register empty interrupt mask uint8_t modf : 1; // mode fault error interrupt mask uint8_t ovres : 1; // overrun error interrupt mask uint8_t reserved0 : 4; uint8_t nssr : 1; // nss rising interrupt mask uint8_t txempty : 1; // transmission registers empty mask uint8_t undes : 1; // underrun error interrupt mask uint8_t reserved1 : 5; uint8_t reserved2 : 8; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } spi_imr_t; /** * SPI Chip Select Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 631 */ typedef union { uint32_t flat; struct { uint8_t cpol : 1; // clock polarity uint8_t ncpha : 1; // clock phase uint8_t csnaat : 1; // chip select not active after transfer (ignored if csaat = 1) uint8_t csaat : 1; // chip select active after transfer uint8_t bits : 4; // bits per transfer uint8_t scbr : 8; // serial clock baud rate uint8_t dlybs : 8; // delay before spck uint8_t dlybct : 8; // delay between consecutive transfers } __attribute__((__packed__)) bits; } spi_csr_t; #define SPI_CSR_BITS_8 0 #define SPI_CSR_BITS_9 1 #define SPI_CSR_BITS_10 2 #define SPI_CSR_BITS_11 3 #define SPI_CSR_BITS_12 4 #define SPI_CSR_BITS_13 5 #define SPI_CSR_BITS_14 6 #define SPI_CSR_BITS_15 7 #define SPI_CSR_BITS_16 8 /** * SPI Write Protection Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 634 */ typedef union { uint32_t flat; struct { uint8_t spiwpen : 1; // spi write protection enable uint8_t reserved0 : 7; uint32_t spiwpkey : 24; // spi write protection key password } __attribute__((__packed__)) bits; } spi_wpcr_t; #define SPI_WPCR_SPIWPKEY 0x535049 /** * SPI Write Protection Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 635 */ typedef union { uint32_t flat; struct { uint8_t spiwpvs : 3; // spi write protection violation status uint8_t reserved0 : 5; uint8_t spiwpvsrc : 8; // spi write protection violation source uint8_t reserved1 : 8; uint8_t reserved2 : 8; } __attribute__((__packed__)) bits; } spi_wpsr_t; /** * SPI Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary 9/1/09, p. 620 */ typedef struct { volatile spi_cr_t cr; // Control Register volatile spi_mr_t mr; // Mode Register volatile spi_rdr_t rdr; // Receive Data Register volatile spi_tdr_t tdr; // Transmit Data Register volatile spi_sr_t sr; // Status Register volatile spi_ier_t ier; // Interrupt Enable Register volatile spi_idr_t idr; // Interrupt Disable Register volatile spi_imr_t imr; // Interrupt Mask Register uint32_t reserved0[4]; volatile spi_csr_t csr0; // Chip Select Register 0 volatile spi_csr_t csr1; // Chip Select Register 1 volatile spi_csr_t csr2; // Chip Select Register 2 volatile spi_csr_t csr3; // Chip Select Register 3 uint32_t reserved1[41]; volatile spi_wpcr_t wpcr; // Write Protection Control Register volatile spi_wpsr_t wpsr; // Write Protection Status Register uint32_t reserved2[5]; } spi_t; #endif // _SPIHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/supc/000077500000000000000000000000001207233610700213345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/supc/supchardware.h000066400000000000000000000233461207233610700242050ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Supply Controller register definitions. * * @author Thomas Schmid */ #ifndef SUPCHARDWARE_H #define SUPCHARDWARE_H /** * SUPC Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 291 */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 2; uint8_t vroff : 1; // voltage regulator off (1: stop regularot if key correct) uint8_t xtalsel : 1; // crystal oscillator select (1: select crystal if key correct) uint8_t reserved1 : 4; uint16_t reserved2 : 16; uint8_t key : 8; // key shoulc be written to value 0xA5 } __attribute__((__packed__)) bits; } supc_cr_t; #define SUPC_CR_KEY 0xA5 /** * SUPC Supply Monitor Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 292 */ typedef union { uint32_t flat; struct { uint8_t smth : 4; // supply monitor threshold uint8_t reserved0 : 4; uint8_t smsmpl : 3; // supply monitor sampling period uint8_t reserved1 : 1; uint8_t smrsten : 1; // supply monitor reset enable uint8_t smien : 1; // supply monitor interrupt enable uint8_t reserved2 : 2; uint16_t reserved3: 16; } __attribute__((__packed__)) bits; } supc_smmr_t; #define SUPC_SMMR_SMTH_1_9V 0x0 #define SUPC_SMMR_SMTH_2_0V 0x1 #define SUPC_SMMR_SMTH_2_1V 0x2 #define SUPC_SMMR_SMTH_2_2V 0x3 #define SUPC_SMMR_SMTH_2_3V 0x4 #define SUPC_SMMR_SMTH_2_4V 0x5 #define SUPC_SMMR_SMTH_2_5V 0x6 #define SUPC_SMMR_SMTH_2_6V 0x7 #define SUPC_SMMR_SMTH_2_7V 0x8 #define SUPC_SMMR_SMTH_2_8V 0x9 #define SUPC_SMMR_SMTH_2_9V 0xA #define SUPC_SMMR_SMTH_3_0V 0xB #define SUPC_SMMR_SMTH_3_1V 0xC #define SUPC_SMMR_SMTH_3_2V 0xD #define SUPC_SMMR_SMTH_3_3V 0xE #define SUPC_SMMR_SMTH_3_4V 0xF #define SUPC_SMMR_SMSMPL_SMD 0x0 #define SUPC_SMMR_SMSMPL_CSM 0x1 #define SUPC_SMMR_SMSMPL_32SLCK 0x2 #define SUPC_SMMR_SMSMPL_256SLCK 0x3 #define SUPC_SMMR_SMSMPL_2048SLCK 0x4 /** * SUPC Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 294 */ typedef union { uint32_t flat; struct { uint16_t reserved0 : 12; uint8_t bodrsten : 1; // brownout detector reset enable uint8_t boddis : 1; // brownout detector disable uint8_t vddiordy : 1; // VDDIO ready uint8_t reserved1 : 1; uint8_t reserved2 : 4; uint8_t oscbypass : 1; // oscillator bypass uint8_t reserved3 : 3; uint8_t key : 8; // key should be written to value 0xA5 } __attribute__((__packed__)) bits; } supc_mr_t; #define SUPC_MR_KEY 0xA5 /** * SUPC Wake Up Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 295 */ typedef union { uint32_t flat; struct { uint8_t fwupen : 1; // force wake up enable uint8_t smen : 1; // supply monitor wake up enable uint8_t rtten : 1; // real time timer wake up enable uint8_t rtcen : 1; // real time clock waek up enable uint8_t reserved0 : 4; uint8_t fwupdbc : 3; // force wake up debouncer uint8_t reserved1 : 1; uint8_t wkupdbc : 3; // wake up inputs debouncer uint8_t reserved2 : 1; uint16_t reserved3 : 16; } __attribute__((__packed__)) bits; } supc_wumr_t; #define SUPC_WUMR_FWUPDBC_1SCLK 0x0 #define SUPC_WUMR_FWUPDBC_3SCLK 0x1 #define SUPC_WUMR_FWUPDBC_32SCLK 0x2 #define SUPC_WUMR_FWUPDBC_512SCLK 0x3 #define SUPC_WUMR_FWUPDBC_4096SCLK 0x4 #define SUPC_WUMR_FWUPDBC_32768SCLK 0x5 #define SUPC_WUMR_WKUPDBC_1SCLK 0x0 #define SUPC_WUMR_WKUPDBC_3SCLK 0x1 #define SUPC_WUMR_WKUPDBC_32SCLK 0x2 #define SUPC_WUMR_WKUPDBC_512SCLK 0x3 #define SUPC_WUMR_WUKPDBC_4096SCLK 0x4 #define SUPC_WUMR_WKUPDBC_32768SCLK 0x5 /** * SUPC System Controller wake up inputs Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 297 */ typedef union { uint32_t flat; struct { uint8_t wkupen0 : 1; // wake up input enable 0 uint8_t wkupen1 : 1; // wake up input enable 1 uint8_t wkupen2 : 1; // wake up input enable 2 uint8_t wkupen3 : 1; // wake up input enable 3 uint8_t wkupen4 : 1; // wake up input enable 4 uint8_t wkupen5 : 1; // wake up input enable 5 uint8_t wkupen6 : 1; // wake up input enable 6 uint8_t wkupen7 : 1; // wake up input enable 7 uint8_t wkupen8 : 1; // wake up input enable 8 uint8_t wkupen9 : 1; // wake up input enable 9 uint8_t wkupen10 : 1; // wake up input enable 10 uint8_t wkupen11 : 1; // wake up input enable 11 uint8_t wkupen12 : 1; // wake up input enable 12 uint8_t wkupen13 : 1; // wake up input enable 13 uint8_t wkupen14 : 1; // wake up input enable 14 uint8_t wkupen15 : 1; // wake up input enable 15 uint8_t wkupt0 : 1; // wake up input transition 0 uint8_t wkupt1 : 1; // wake up input transition 1 uint8_t wkupt2 : 1; // wake up input transition 2 uint8_t wkupt3 : 1; // wake up input transition 3 uint8_t wkupt4 : 1; // wake up input transition 4 uint8_t wkupt5 : 1; // wake up input transition 5 uint8_t wkupt6 : 1; // wake up input transition 6 uint8_t wkupt7 : 1; // wake up input transition 7 uint8_t wkupt8 : 1; // wake up input transition 8 uint8_t wkupt9 : 1; // wake up input transition 9 uint8_t wkupt10 : 1; // wake up input transition 10 uint8_t wkupt11 : 1; // wake up input transition 11 uint8_t wkupt12 : 1; // wake up input transition 12 uint8_t wkupt13 : 1; // wake up input transition 13 uint8_t wkupt14 : 1; // wake up input transition 14 uint8_t wkupt15 : 1; // wake up input transition 15 } __attribute__((__packed__)) bits; } supc_wuir_t; /** * SUPC Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 298 */ typedef union { uint32_t flat; struct { uint8_t fwups : 1; // fwup wake up status uint8_t wkups : 1; // wkup wake up status uint8_t smws : 1; // supply monitor detection wake up status uint8_t bodrsts : 1; // brownout detector reset status uint8_t smrsts : 1; // supply monitor reset status uint8_t sms : 1; // supply monitor status uint8_t smos : 1; // supply monitor output status uint8_t oscsel : 1; // 32-khz oscillator selection status uint8_t reserved0 : 4; uint8_t fwupis : 1; // fwup input status uint8_t reserved1 : 3; uint8_t wkupis0 : 1; // wkup input status 0 uint8_t wkupis1 : 1; // wkup input status 1 uint8_t wkupis2 : 1; // wkup input status 2 uint8_t wkupis3 : 1; // wkup input status 3 uint8_t wkupis4 : 1; // wkup input status 4 uint8_t wkupis5 : 1; // wkup input status 5 uint8_t wkupis6 : 1; // wkup input status 6 uint8_t wkupis7 : 1; // wkup input status 7 uint8_t wkupis8 : 1; // wkup input status 8 uint8_t wkupis9 : 1; // wkup input status 9 uint8_t wkupis10 : 1; // wkup input status 10 uint8_t wkupis11 : 1; // wkup input status 11 uint8_t wkupis12 : 1; // wkup input status 12 uint8_t wkupis13 : 1; // wkup input status 13 uint8_t wkupis14 : 1; // wkup input status 14 uint8_t wkupis15 : 1; // wkup input status 15 } __attribute__((__packed__)) bits; } supc_sr_t; /** * SUPC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 290 */ typedef struct supc { volatile supc_cr_t cr; // Control Register volatile supc_smmr_t smmr; // Supply Monitor Mode Register volatile supc_mr_t mr; // Mode Register volatile supc_wumr_t wumr; // Wake Up Mode Register volatile supc_wuir_t wuir; // Wake Up Inputs Register volatile supc_sr_t sr; // Status Register } supc_t; #endif // SUPCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/000077500000000000000000000000001207233610700215025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/Alarm32khz16C.nc000066400000000000000000000042641207233610700242220ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Alarm32khzC is the alarm for async 32khz alarms * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic configuration Alarm32khz16C() { provides interface Init; provides interface Alarm; } implementation { components HplSam3TC32khzC as HplSam3TCChannel; components new HilSam3TCAlarmC(T32khz, 32) as HilSam3TCAlarm; Init = HilSam3TCAlarm; Alarm = HilSam3TCAlarm; HilSam3TCAlarm.HplSam3TCChannel -> HplSam3TCChannel; HilSam3TCAlarm.HplSam3TCCompare -> HplSam3TCChannel; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/Alarm32khz32C.nc000066400000000000000000000044451207233610700242210ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Alarm32khzC is the alarm for async 32khz alarms * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic configuration Alarm32khz32C() { provides interface Init; provides interface Alarm; } implementation { #error The existing implementation that is in here was broken and doesn't work. Check it with an Oscilloscope! components HplSam3TC32khzC as HplSam3TCChannel; components new HilSam3TCAlarmC(T32khz, 32) as HilSam3TCAlarm; Init = HilSam3TCAlarm; Alarm = HilSam3TCAlarm; HilSam3TCAlarm.HplSam3TCChannel -> HplSam3TCChannel; HilSam3TCAlarm.HplSam3TCCompare -> HplSam3TCChannel; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/AlarmMilli16C.nc000066400000000000000000000041211207233610700243170ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * AlarmMilliC is the alarm for async millisecond alarms * * @author Thomas Schmid */ generic configuration AlarmMilli16C() { provides { interface Init; interface Alarm; } } implementation { components new Alarm32khz32C() as AlarmC; components CounterMilli16C as Counter; components new TransformAlarmC(TMilli,uint16_t,T32khz,uint32_t,5) as Transform; Init = AlarmC; Alarm = Transform; Transform.AlarmFrom -> AlarmC; Transform.Counter -> Counter; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/AlarmMilliC.nc000066400000000000000000000035201207233610700241520ustar00rootroot00000000000000/** * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #define UQ_ALARM_TMILLI "AlarmMilliC.Alarm" generic configuration AlarmMilliC() { provides { interface Alarm; } } implementation { components AlarmMilliP; Alarm = AlarmMilliP.AlarmMilli[unique(UQ_ALARM_TMILLI)]; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/AlarmMilliP.nc000066400000000000000000000035121207233610700241700ustar00rootroot00000000000000/** * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration AlarmMilliP { provides { interface Alarm as AlarmMilli[uint8_t id]; } } implementation { components HilAlarmMilliC, MainC; MainC.SoftwareInit -> HilAlarmMilliC; AlarmMilli = HilAlarmMilliC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/AlarmTMicro16C.nc000066400000000000000000000036201207233610700244510ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #define UQ_ALARM_TMICRO16 "HilAlarmTMicro16.Alarm" generic configuration AlarmTMicro16C() { provides { interface Alarm; } } implementation { components AlarmTMicro16P; Alarm = AlarmTMicro16P.Alarm[unique(UQ_ALARM_TMICRO16)]; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/AlarmTMicro16P.nc000066400000000000000000000036001207233610700244640ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration AlarmTMicro16P { provides { interface Alarm as Alarm[uint8_t id]; } } implementation { components HilAlarmTMicro16C, MainC; MainC.SoftwareInit -> HilAlarmTMicro16C; Alarm = HilAlarmTMicro16C; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/AlarmTMicro32C.nc000066400000000000000000000044541207233610700244550ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * AlarmTMicroC is the alarm for TMicro alarms * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic configuration AlarmTMicro32C() { provides interface Init; provides interface Alarm; } implementation { #error The existing implementation that is in here was broken and doesn't work. Check it with an Oscilloscope! components HilSam3TCCounterTMicroC as HplSam3TCChannel; components new HilSam3TCAlarmC(TMicro, 1000) as HilSam3TCAlarm; Init = HilSam3TCAlarm; Alarm = HilSam3TCAlarm; HilSam3TCAlarm.HplSam3TCChannel -> HplSam3TCChannel; HilSam3TCAlarm.HplSam3TCCompare -> HplSam3TCChannel; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/BusyWaitMicroC.nc000066400000000000000000000040211207233610700246650ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration BusyWaitMicroC { provides interface BusyWait; } implementation { components new BusyWaitCounterC(TMicro,uint16_t) , CounterTMicro16C ; BusyWait = BusyWaitCounterC; BusyWaitCounterC.Counter -> CounterTMicro16C; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/Counter32khz16C.nc000066400000000000000000000037451207233610700246100ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Counter32khz16C provides at 16-bit counter at 32768 ticks per second. * * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration Counter32khz16C { provides interface Counter; } implementation { components HilSam3TCCounter32khzC as CounterFrom; Counter = CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/Counter32khz32C.nc000066400000000000000000000041511207233610700245760ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Counter32khz32C provides at 32-bit counter at 32768 ticks per second. * * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration Counter32khz32C { provides interface Counter; } implementation { components HilSam3TCCounter32khzC as CounterFrom; components new TransformCounterC(T32khz,uint32_t,T32khz,uint16_t,0,uint16_t) as Transform; Counter = Transform; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/Counter32khz64C.nc000066400000000000000000000041431207233610700246040ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Counter32khz32C provides at 32-bit counter at 32768 ticks per second. * * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration Counter32khz64C { provides interface Counter; } implementation { components Counter32khz32C as CounterFrom; components new TransformCounterC(T32khz,uint64_t,T32khz,uint32_t,0,uint32_t) as Transform; Counter = Transform; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/CounterMilli16C.nc000066400000000000000000000042061207233610700247060ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * CounterMilli16C provides at 32-bit counter at 1024 ticks per second. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration CounterMilli16C { provides interface Counter; } implementation { components Counter32khz16C as CounterFrom; components new TransformCounterC(TMilli,uint16_t,T32khz,uint16_t,5,uint8_t) as Transform; Counter = Transform.Counter; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/CounterTMicro16C.nc000066400000000000000000000041151207233610700250340ustar00rootroot00000000000000/* * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * CounterTMicroC provides at 16-bit counter at at approximately 1us * resolution. However, to get the accurate frequency inquire the * getTimerFrequency() function. * * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration CounterTMicro16C { provides { interface Counter; } } implementation { components HilSam3TCCounterTMicroC as CounterFrom; Counter = CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/CounterTMicro32C.nc000066400000000000000000000041541207233610700250350ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * CounterTMicro32C provides a 32-bit counter about 1M ticks per second. * * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration CounterTMicro32C { provides interface Counter; } implementation { components HilSam3TCCounterTMicroC as CounterFrom; components new TransformCounterC(TMicro,uint32_t,TMicro,uint16_t,0,uint16_t) as Transform; Counter = Transform; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/CounterToLocalTime64C.nc000066400000000000000000000042751207233610700260250ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * CounterToLocalTimeC converts a 32-bit LocalTime to a Counter. * *

      See TEP102 for more details. * @param precision_tag A type indicating the precision of the LocalTime and * Counter being converted. * * @author Cory Sharp */ generic module CounterToLocalTime64C(typedef precision_tag) @safe() { provides interface LocalTime64; uses interface Counter; } implementation { async command uint64_t LocalTime64.get() { return call Counter.get(); } async event void Counter.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/GpioCaptureC.nc000066400000000000000000000053731207233610700243610ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui * @author Joe Polastre */ generic module GpioCaptureC() @safe() { provides { interface GpioCapture as Capture; } uses { interface HplSam3TCCapture as TCCapture; interface HplSam3GeneralIOPin as GeneralIO; } } implementation { error_t enableCapture( uint8_t mode ) { atomic { call TCCapture.disable(); call GeneralIO.disablePioControl(); call GeneralIO.selectPeripheralA(); call TCCapture.setEdge( mode ); call TCCapture.clearPendingEvent(); call TCCapture.clearOverrun(); call TCCapture.enable(); } return SUCCESS; } async command error_t Capture.captureRisingEdge() { return enableCapture( TC_CMR_ETRGEDG_RISING ); } async command error_t Capture.captureFallingEdge() { return enableCapture( TC_CMR_ETRGEDG_FALLING ); } async command void Capture.disable() { atomic { call TCCapture.disable(); } } async event void TCCapture.captured( uint16_t time ) { call TCCapture.clearPendingEvent(); call TCCapture.clearOverrun(); signal Capture.captured( time ); } async event void TCCapture.overrun() { } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HalSam3RttC.nc000066400000000000000000000037701207233610700240600ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ configuration HalSam3RttC { provides { interface Init; interface Alarm as Alarm; interface LocalTime as LocalTime; } } implementation { components HplSam3RttC, HalSam3RttP; HalSam3RttP.HplSam3Rtt -> HplSam3RttC; HalSam3RttP.RttInit -> HplSam3RttC.Init; Init = HalSam3RttP; Alarm = HalSam3RttP; LocalTime = HalSam3RttP; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HalSam3RttP.nc000066400000000000000000000075671207233610700241050ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Provides an alarm, counter, and local time with TMilli resolution using the * SAM3's RTT. * * @author Thomas Schmid */ module HalSam3RttP @safe() { provides { interface Init; interface Alarm as Alarm; interface LocalTime as LocalTime; } uses { interface HplSam3Rtt; interface Init as RttInit; } } implementation { bool running; command error_t Init.init() { running = FALSE; call RttInit.init(); // make the counter count in milliseconds. This restarts the RTT and // resets the counter. call HplSam3Rtt.setPrescaler(32); return SUCCESS; } async command void Alarm.start(uint32_t dt) { atomic running = TRUE; call Alarm.startAt(call Alarm.getNow(), dt); } async command void Alarm.stop() { atomic running = FALSE; call HplSam3Rtt.disableAlarmInterrupt(); } async command bool Alarm.isRunning() { return running; } async command void Alarm.startAt( uint32_t t0, uint32_t dt) { atomic { uint32_t now = call Alarm.getNow(); uint32_t elapsed = now-t0; if(elapsed >= dt ) { // l.et the timer expire at the next tic of the RTT call HplSam3Rtt.setAlarm(now+1); } else { uint32_t remaining = dt - elapsed; if(remaining <= 1) { call HplSam3Rtt.setAlarm(now + 1); } else { call HplSam3Rtt.setAlarm(now + remaining); } } call HplSam3Rtt.enableAlarmInterrupt(); } } async command uint32_t Alarm.getNow() { uint32_t c; c = call HplSam3Rtt.getTime(); return c; } async command uint32_t Alarm.getAlarm() { uint32_t c; c = call HplSam3Rtt.getAlarm(); return c; } async command uint32_t LocalTime.get() { return call Alarm.getNow(); } async event void HplSam3Rtt.alarmFired() { call Alarm.stop(); call HplSam3Rtt.disableAlarmInterrupt(); signal Alarm.fired(); } async event void HplSam3Rtt.incrementFired() { } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HilAlarmMilliC.nc000066400000000000000000000037441207233610700246170ustar00rootroot00000000000000/** * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration HilAlarmMilliC { provides { interface Init; interface Alarm as AlarmMilli[uint8_t id]; } } implementation { components HalSam3RttC as AlarmC; components new VirtualizeAlarmC(TMilli, uint32_t, uniqueCount(UQ_ALARM_TMILLI)) as VirtAlarmsTMilli; Init = AlarmC; AlarmMilli = VirtAlarmsTMilli.Alarm; VirtAlarmsTMilli.AlarmFrom -> AlarmC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HilAlarmTMicro16C.nc000066400000000000000000000043701207233610700251110ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * */ configuration HilAlarmTMicro16C { provides { interface Init; interface Alarm as Alarm[ uint8_t num ]; } } implementation { components new VirtualizeAlarmC(TMicro, uint16_t, uniqueCount(UQ_ALARM_TMICRO16)) as VirtAlarmsTMicro16; components HilSam3TCCounterTMicroC as HplSam3TCChannel; components new HilSam3TCAlarmC(TMicro, 1000) as HilSam3TCAlarm; Init = HilSam3TCAlarm; Alarm = VirtAlarmsTMicro16.Alarm; VirtAlarmsTMicro16.AlarmFrom -> HilSam3TCAlarm; HilSam3TCAlarm.HplSam3TCChannel -> HplSam3TCChannel; HilSam3TCAlarm.HplSam3TCCompare -> HplSam3TCChannel; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HilSam3TCAlarmC.nc000066400000000000000000000070011207233610700245710ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * HilSam3TCAlarmC is a generic component that wraps the SAM3U HPL timers and * compares into a TinyOS Alarm. * * @author Thomas Schmid * @author Kevin Klues * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic module HilSam3TCAlarmC(typedef frequency_tag, uint16_t freq_divisor) @safe() { provides { interface Init; interface Alarm as Alarm; } uses { interface HplSam3TCChannel; interface HplSam3TCCompare; } } implementation { command error_t Init.init() { call HplSam3TCCompare.disable(); return SUCCESS; } async command void Alarm.start( uint16_t dt ) { call Alarm.startAt( call Alarm.getNow(), dt ); } async command void Alarm.stop() { call HplSam3TCCompare.disable(); } async event void HplSam3TCCompare.fired() { call HplSam3TCCompare.disable(); signal Alarm.fired(); } async command bool Alarm.isRunning() { return call HplSam3TCCompare.isEnabled(); } async command void Alarm.startAt( uint16_t t0, uint16_t dt ) { uint32_t freq = call HplSam3TCChannel.getTimerFrequency(); dt = (dt*freq)/(uint32_t)freq_divisor + 1; atomic { uint16_t now = call HplSam3TCChannel.get(); uint16_t elapsed = now - t0; if( elapsed >= dt ) { call HplSam3TCCompare.setEventFromNow(2); } else { uint16_t remaining = dt - elapsed; if( remaining <= 2 ) call HplSam3TCCompare.setEventFromNow(2); else call HplSam3TCCompare.setEvent( now+remaining ); } call HplSam3TCCompare.clearPendingEvent(); call HplSam3TCCompare.enable(); } } async command uint16_t Alarm.getNow() { return call HplSam3TCChannel.get(); } async command uint16_t Alarm.getAlarm() { return call HplSam3TCCompare.getEvent(); } async event void HplSam3TCChannel.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounter32khzC.nc000066400000000000000000000041351207233610700260430ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * HilSam3TCCounter32khC provides the standard 32khz counter for the SAM3U. * * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration HilSam3TCCounter32khzC { provides interface Counter as HilSam3TCCounter32khz; } implementation { components HplSam3TCC; components new HilSam3TCCounterC(T32khz) as Counter; HilSam3TCCounter32khz = Counter; Counter.HplSam3TCChannel -> HplSam3TCC.TC0; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounterC.nc000066400000000000000000000046701207233610700251650ustar00rootroot00000000000000/* * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * HilSam3TCCounter is a generic component that wraps the SAM3U HPL timers into a * TinyOS Counter. * * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic module HilSam3TCCounterC( typedef frequency_tag ) @safe() { provides interface Counter as Counter; uses interface HplSam3TCChannel; } implementation { async command uint16_t Counter.get() { return call HplSam3TCChannel.get(); } async command bool Counter.isOverflowPending() { return call HplSam3TCChannel.isOverflowPending(); } async command void Counter.clearOverflow() { call HplSam3TCChannel.clearOverflow(); } async event void HplSam3TCChannel.overflow() { signal Counter.overflow(); } default async event void Counter.overflow() {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounterTMicroC.nc000066400000000000000000000044201207233610700262740ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * HilSam3TCCounterTMicroC provides the an approximate TMicro counter for the * SAM3U. * * @author Thomas Schmid * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration HilSam3TCCounterTMicroC { provides { interface Counter as HilSam3TCCounterTMicro; interface HplSam3TCChannel; interface HplSam3TCCompare; } } implementation { components HplSam3TCC; components new HilSam3TCCounterC(TMicro) as Counter; HilSam3TCCounterTMicro = Counter; Counter.HplSam3TCChannel -> HplSam3TCC.TCH2; HplSam3TCChannel = HplSam3TCC.TCH2; HplSam3TCCompare = HplSam3TCC.TC2CompareC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HilTimerMilliC.nc000066400000000000000000000043741207233610700246430ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid * */ #include "Timer.h" configuration HilTimerMilliC { provides { interface Init; interface Timer as TimerMilli[ uint8_t num ]; interface LocalTime; } } implementation { components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI)) as VirtTimersMilli32; components new AlarmToTimerC(TMilli) as AlarmToTimerMilli32; components new AlarmMilliC() as AlarmMilli32; components HalSam3RttC; Init = HalSam3RttC; TimerMilli = VirtTimersMilli32.Timer; LocalTime = HalSam3RttC; VirtTimersMilli32.TimerFrom -> AlarmToTimerMilli32.Timer; AlarmToTimerMilli32.Alarm -> AlarmMilli32.Alarm; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3Rtt.nc000066400000000000000000000063261207233610700237740ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface for the SAM3 Real-Time Timer. * * @author Thomas Schmid */ interface HplSam3Rtt { /** * Sets the prescaler value of the RTT and restart it. This function * disables all interrupt sources! * * @par prescaler 16-bit prescaler for the counter. The RTT is fed by a * 32.768 Hz clock. */ async command error_t setPrescaler(uint16_t prescaler); /** * Retrieves the current time of the timer. * * @return The 32-bit counter value. */ async command uint32_t getTime(); /** * Enables the alarm interrupt of the RTT. */ async command error_t enableAlarmInterrupt(); /** * Disables the alarm interrupt of the RTT. */ async command error_t disableAlarmInterrupt(); /** * Enables the incremental interrupt of the RTT. */ async command error_t enableIncrementalInterrupt(); /** * Disables the incremental interrupt of the RTT. */ async command error_t disableIncrementalInterrupt(); /** * Restart the RTT and resets the counter value. */ async command error_t restart(); /** * Set the alarm for the RTT. * * @par time The 32-bit time value at which the alarm interrupt should * happen. */ async command error_t setAlarm(uint32_t time); /** * Returns the current alarm time. */ async command uint32_t getAlarm(); /** * Event indicating that the increment interrupt fired. */ async event void incrementFired(); /** * Event indicating that the alarm interrupt fired. */ async event void alarmFired(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3RttC.nc000066400000000000000000000041741207233610700240760ustar00rootroot00000000000000/* * Copyright (c) 2009 The Regents of the University of California. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid * @author Kevin Klues */ configuration HplSam3RttC { provides { interface Init; interface HplSam3Rtt; } } implementation { components HplSam3RttP; Init = HplSam3RttP; HplSam3Rtt = HplSam3RttP; components HplNVICC; HplSam3RttP.HplNVICCntl -> HplNVICC; HplSam3RttP.NVICRTTInterrupt -> HplNVICC.RTTInterrupt; components McuSleepC; HplSam3RttP.RttInterruptWrapper -> McuSleepC; components LedsC; HplSam3RttP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3RttP.nc000066400000000000000000000113621207233610700241100ustar00rootroot00000000000000/* * Copyright (c) 2009 The Regents of the University of California. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid * @author Kevin Klues */ // Chip specific include that defines the RTT variable #include "sam3rtthardware.h" module HplSam3RttP @safe() { provides { interface Init; interface HplSam3Rtt; } uses { interface HplNVICCntl; interface HplNVICInterruptCntl as NVICRTTInterrupt; interface FunctionWrapper as RttInterruptWrapper; interface Leds; } } implementation { command error_t Init.init() { call NVICRTTInterrupt.configure(0); // now enable the IRQ call NVICRTTInterrupt.enable(); return SUCCESS; } /** * Sets the prescaler value of the RTT and restart it. This function * disables all interrupt sources! */ async command error_t HplSam3Rtt.setPrescaler(uint16_t prescaler) { rtt_mr_t mr = RTT->mr; // after changing the prescaler, we have to restart the RTT mr.bits.rtpres = prescaler; RTT->mr = mr; return call HplSam3Rtt.restart(); } async command uint32_t HplSam3Rtt.getTime() { return RTT->vr; } async command error_t HplSam3Rtt.enableAlarmInterrupt() { rtt_mr_t mr = RTT->mr; mr.bits.almien = 1;; RTT->mr = mr; return SUCCESS; } async command error_t HplSam3Rtt.disableAlarmInterrupt() { rtt_mr_t mr = RTT->mr; mr.bits.almien = 0; RTT->mr = mr; return SUCCESS; } async command error_t HplSam3Rtt.enableIncrementalInterrupt() { rtt_mr_t mr = RTT->mr; mr.bits.rttincien = 1; RTT->mr = mr; return SUCCESS; } async command error_t HplSam3Rtt.disableIncrementalInterrupt() { rtt_mr_t mr = RTT->mr; mr.bits.rttincien = 0; RTT->mr = mr; return SUCCESS; } async command error_t HplSam3Rtt.restart() { rtt_mr_t mr = RTT->mr; mr.bits.rttrst = 1; RTT->mr = mr; return SUCCESS; } async command error_t HplSam3Rtt.setAlarm(uint32_t time) { if(time > 0) { RTT->ar = time - 1; return SUCCESS; } else { return FAIL; } } async command uint32_t HplSam3Rtt.getAlarm() { return RTT->ar; } void RttIrqHandler() @C() @spontaneous() { rtt_sr_t status; call RttInterruptWrapper.preamble(); atomic { //PMC->pc.pcer.bits.tc2 = 1; // FIXME: what is this???? // clear pending interrupt call NVICRTTInterrupt.clearPending(); status = RTT->sr; if (status.bits.rttinc) { // we got an increment interrupt signal HplSam3Rtt.incrementFired(); } if (status.bits.alms) { // we got an alarm //call Leds.led2Toggle(); signal HplSam3Rtt.alarmFired(); } } call RttInterruptWrapper.postamble(); } default async event void HplSam3Rtt.incrementFired() {} default async event void HplSam3Rtt.alarmFired() {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TC.nc000066400000000000000000000036611207233610700235300ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ interface HplSam3TC{ command void enableTC0(); // slclk command void enableTC1(); // slclk command void enableTC2(); // used for TMicro command void disableTC0(); command void disableTC1(); command void disableTC2(); /** * Synchronizes (resets) all thre timer channels at the same time. */ command void sync(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TC32khzC.nc000066400000000000000000000037001207233610700245070ustar00rootroot00000000000000/* * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ configuration HplSam3TC32khzC { provides interface HplSam3TCChannel; provides interface HplSam3TCCompare; } implementation { components HplSam3TC32khzMapC as Map; enum { ALARM_ID = unique("Sam3TC32khzMapC") }; HplSam3TCChannel = Map.HplSam3TCChannel[ ALARM_ID ]; HplSam3TCCompare = Map.HplSam3TCCompare[ ALARM_ID ]; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TC32khzMapC.nc000066400000000000000000000044271207233610700251540ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * HplSam3TC32khzMapC presents as paramaterized interfaces all of the 32khz * channels on the SAM3U that are available for compile time allocation * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. * * Platforms based on the SAM3U are encouraged to copy in and override this * file, presenting only the hardware timers that are available for allocation * on that platform. * * @author Thomas Schmid */ configuration HplSam3TC32khzMapC { provides interface HplSam3TCChannel[ uint8_t id ]; provides interface HplSam3TCCompare[ uint8_t id ]; } implementation { components HplSam3TCC; HplSam3TCChannel[0] = HplSam3TCC.TC0; HplSam3TCCompare[0] = HplSam3TCC.TC0CompareC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TCCapture.nc000066400000000000000000000067071207233610700250600ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SAM3 TC capture interface. * * @author Thomas Schmid */ interface HplSam3TCCapture { /** * Enable the capture event interrupt. */ async command void enable(); /** * Disable the capture event interrupt. */ async command void disable(); /** * Reads the value of the last capture event in RA */ async command uint16_t getEventRA(); /** * Reads the value of the last capture event in RB */ async command uint16_t getEventRB(); /** * Clear any pending event. */ async command void clearPendingEvent(); /** * Set the edge that the capture should occur * * @param cm Capture Mode for edge capture. * enums exist for: * TC_CMR_ETRGEDG_NONE is no capture. * TC_CMR_ETRGEDG_RISING is rising edge capture. * TC_CMR_ETRGEDG_FALLING is a falling edge capture. * TC_CMR_ETRGEDG_EACH captures on both rising and falling edges. */ async command void setEdge(uint8_t cm); /** * Select the external trigger source. Allowed values: * TC_CMR_ABETRG_TIOA * TC_CMR_ABETRG_TIOB */ async command void setExternalTrigger(uint8_t cm); /** * Set external trigger edge. */ async command void setExternalTriggerEdge(uint8_t cm); /** * Determine if a capture load overrun is pending. * * @return TRUE if the capture register has was loaded twice since last read */ async command bool isOverrunPending(); /** * Clear the capture overrun flag for when multiple captures occur */ async command void clearOverrun(); /** * Signalled when an event is captured. * * @param time The time of the capture event */ async event void captured(uint16_t time); /** * Signalled when an overrun occures. */ async event void overrun(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TCChannel.nc000066400000000000000000000062421207233610700250170ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SAM3U TC Channel interface. * * @author Thomas Schmid */ interface HplSam3TCChannel { async command uint16_t get(); async command bool isOverflowPending(); async command void clearOverflow(); async event void overflow(); /** * FIXME: this currently only selects between wave mode or non-wave mode. * This should be extended to all the different posibilities of modes! * * allowed arguments: * TC_CMR_WAVE: selects wave mode. Allows compare on A, B, and C or wave * generation * TC_CMR_CAPTURE: selects capture mode (disables wave mode!). Allows * capture on A, B, and compare on C. (DEFAULT) */ async command void setMode(uint8_t mode); async command uint8_t getMode(); async command void enableEvents(); async command void disableEvents(); async command void enableClock(); async command void disableClock(); /** * Allowed clock sources: * TC_CMR_CLK_TC1: selects MCK/2 * TC_CMR_CLK_TC2: selects MCK/8 * TC_CMR_CLK_TC3: selects MCK/32 * TC_CMR_CLK_TC4: selects MCK/128 * TC_CMR_CLK_SLOW: selects SLCK. if MCK=SLCK, then this clock will be * modified by PRES and MDIV! * TC_CMR_CLK_XC0: selects external clock input 0 * TC_CMR_CLK_XC1: selects external clock input 1 * TC_CMR_CLK_XC2: selects external clock input 2 */ async command void setClockSource(uint8_t clockSource); /** * Returns the current timer frequency in kHz. */ async command uint32_t getTimerFrequency(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TCChannelP.nc000066400000000000000000000336521207233610700251440ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Provides a bare bone interface to the SAM3 TC. * * @author Thomas Schmid */ #include "sam3tchardware.h" generic module HplSam3TCChannelP(uint32_t tc_channel_base) @safe() { provides { interface HplSam3TCChannel; interface HplSam3TCCapture as Capture; interface HplSam3TCCompare as CompareA; interface HplSam3TCCompare as CompareB; interface HplSam3TCCompare as CompareC; } uses { interface HplSam3Clock as ClockConfig; interface HplSam3TCEvent as TimerEvent; interface HplNVICInterruptCntl as NVICTCInterrupt; interface HplSam3PeripheralClockCntl as TCPClockCntl; } } implementation { // the CMR registers have slightly different meanings in the two modes! volatile tc_channel_capture_t *CH_CAPTURE = (volatile tc_channel_capture_t*)tc_channel_base; volatile tc_channel_wave_t *CH_WAVE = (volatile tc_channel_wave_t*)tc_channel_base; // interrupt status tc_sr_t sr; /****************************************** * General TC Channel functions ******************************************/ async command uint16_t HplSam3TCChannel.get() { return CH_CAPTURE->cv.bits.cv; } async command bool HplSam3TCChannel.isOverflowPending() { sr.flat |= CH_CAPTURE->sr.flat; return (sr.bits.covfs && 1); } async command void HplSam3TCChannel.clearOverflow() { // read the sr register to clear it sr.flat |= CH_CAPTURE->sr.flat; // assure that the overlof is cleared sr.bits.covfs = 0; } /** * FIXME: this currently only selects between wave mode or non-wave mode. * This should be extended to all the different posibilities of modes! * * allowed arguments: * TC_CMR_WAVE: selects wave mode. Allows compare on A, B, and C or wave * generation * TC_CMR_CAPTURE: selects capture mode (disables wave mode!). Allows * capture on A, B, and compare on C. (DEFAULT) */ async command void HplSam3TCChannel.setMode(uint8_t mode) { switch(mode) { case TC_CMR_WAVE: { tc_cmr_wave_t cmr = CH_WAVE->cmr; cmr.bits.wave = (mode & 0x01); CH_WAVE->cmr = cmr; } case TC_CMR_CAPTURE: { tc_cmr_capture_t cmr = CH_CAPTURE->cmr; cmr.bits.wave = (mode & 0x01); CH_CAPTURE->cmr = cmr; } } } async command uint8_t HplSam3TCChannel.getMode() { // the wave field is the same in capture and wave mode! return CH_CAPTURE->cmr.bits.wave; } /** * This enables the events for this channel and the peripheral clock! */ async command void HplSam3TCChannel.enableEvents() { tc_ier_t ier; tc_ccr_t ccr; ier.flat = 0; ccr.flat = 0; // enable the peripheral clock to this channel call TCPClockCntl.enable(); call NVICTCInterrupt.configure(0); // now enable the IRQ call NVICTCInterrupt.enable(); // by default, we enable at least overflows ier.bits.covfs = 1; CH_CAPTURE->ier = ier; // enable the clock ccr.bits.clken = 1; // start the clock! ccr.bits.swtrg = 1; CH_CAPTURE->ccr = ccr; } /** * This enables the peripheral clock for this channel */ async command void HplSam3TCChannel.enableClock() { // enable the peripheral clock to this channel call TCPClockCntl.enable(); } /** * This disables the events for this channel and the peripheral clock! */ async command void HplSam3TCChannel.disableEvents() { tc_idr_t idr; idr.flat = 0; call NVICTCInterrupt.disable(); call TCPClockCntl.disable(); // disable overruns idr.bits.covfs = 1; CH_CAPTURE->idr = idr; } /** * This disables the peripheral clock for this channel */ async command void HplSam3TCChannel.disableClock() { // disable the peripheral clock to this channel call TCPClockCntl.disable(); } /** * Allowed clock sources: * TC_CMR_CLK_TC1: selects MCK/2 * TC_CMR_CLK_TC2: selects MCK/8 * TC_CMR_CLK_TC3: selects MCK/32 * TC_CMR_CLK_TC4: selects MCK/128 * TC_CMR_CLK_SLOW: selects SLCK. if MCK=SLCK, then this clock will be * modified by PRES and MDIV! * TC_CMR_CLK_XC0: selects external clock input 0 * TC_CMR_CLK_XC1: selects external clock input 1 * TC_CMR_CLK_XC2: selects external clock input 2 */ async command void HplSam3TCChannel.setClockSource(uint8_t clockSource) { // the tcclks is the same in capture and wave! tc_cmr_capture_t cmr = CH_CAPTURE->cmr; cmr.bits.tcclks = clockSource; CH_CAPTURE->cmr = cmr; } async event void TimerEvent.fired() { atomic{ sr.flat |= CH_CAPTURE->sr.flat; // combine the current state for everyone to; if(sr.bits.covfs){ signal HplSam3TCChannel.overflow(); sr.bits.covfs = 0; } if(sr.bits.lovrs){ // only signal if the corresponding capture is enabled if(CH_CAPTURE->imr.bits.ldras) signal Capture.overrun(); if(CH_CAPTURE->imr.bits.ldrbs) signal Capture.overrun(); sr.bits.lovrs = 0; } if(sr.bits.cpas){ signal CompareA.fired(); sr.bits.cpas = 0; } if(sr.bits.cpbs){ signal CompareB.fired(); sr.bits.cpbs = 0; } if(sr.bits.cpcs){ signal CompareC.fired(); sr.bits.cpcs = 0; } if(sr.bits.ldras){ signal Capture.captured(call Capture.getEventRA()); sr.bits.ldras = 0; } if(sr.bits.ldrbs){ signal Capture.captured(call Capture.getEventRB()); sr.bits.ldrbs = 0; } } } async command uint32_t HplSam3TCChannel.getTimerFrequency() { uint32_t mck; if(CH_CAPTURE->cmr.bits.tcclks == TC_CMR_CLK_SLOW) return 32; mck = call ClockConfig.getMainClockSpeed(); return mck >> ((CH_CAPTURE->cmr.bits.tcclks* 2) + 1); } async event void ClockConfig.mainClockChanged() { // in the best case, we would now inform the user! } default async event void HplSam3TCChannel.overflow(){ } /****************************************** * Capture ******************************************/ async command void Capture.enable() { tc_ier_t ier; ier.bits.ldras = 1; ier.bits.ldrbs = 1; ier.bits.lovrs = 1; CH_CAPTURE->ier = ier; } async command void Capture.disable() { tc_idr_t idr; // disable interrupt plus overrun idr.bits.ldras = 1; idr.bits.ldrbs = 1; idr.bits.lovrs = 1; CH_CAPTURE->idr = idr; } async command uint16_t Capture.getEventRA() { return CH_CAPTURE->ra.bits.ra; } async command uint16_t Capture.getEventRB() { return CH_CAPTURE->rb.bits.rb; } async command void Capture.clearPendingEvent() { sr.flat |= CH_CAPTURE->sr.flat; sr.bits.ldras = 0; sr.bits.ldrbs = 0; } async command void Capture.setEdge(uint8_t cm) { tc_cmr_capture_t cmr = CH_CAPTURE->cmr; cmr.bits.ldra = (cm & 0x3); cmr.bits.ldrb = (cm & 0x3); CH_CAPTURE->cmr = cmr; } async command void Capture.setExternalTriggerEdge(uint8_t cm) { tc_cmr_capture_t cmr = CH_CAPTURE->cmr; cmr.bits.etrgedg = (cm & 0x3); CH_CAPTURE->cmr = cmr; } async command void Capture.setExternalTrigger(uint8_t cm ) { tc_cmr_capture_t cmr = CH_CAPTURE->cmr; cmr.bits.abetrg = (cm & 0x1); CH_CAPTURE->cmr = cmr; } async command bool Capture.isOverrunPending() { sr.flat |= CH_CAPTURE->sr.flat; return (sr.bits.lovrs & 0x01); } async command void Capture.clearOverrun() { sr.flat |= CH_CAPTURE->sr.flat; sr.bits.lovrs = 0; } default async event void Capture.overrun() { } default async event void Capture.captured(uint16_t time) { } /****************************************** * Compare A ******************************************/ async command void CompareA.enable() { tc_ier_t ier = CH_WAVE->ier; ier.bits.cpas = 1; CH_WAVE->ier = ier; } async command void CompareA.disable() { tc_idr_t idr = CH_WAVE->idr; idr.bits.cpas = 1; CH_WAVE->idr = idr; } async command bool CompareA.isEnabled() { return (CH_WAVE->imr.bits.cpas & 0x01); } async command void CompareA.clearPendingEvent() { sr.flat |= CH_WAVE->sr.flat; sr.bits.cpas = 0; } async command uint16_t CompareA.getEvent() { return CH_WAVE->ra.bits.ra; } async command void CompareA.setEvent( uint16_t time ) { tc_ra_t ra = CH_WAVE->ra; ra.bits.ra = time; CH_WAVE->ra = ra; } async command void CompareA.setEventFromPrev( uint16_t delta ) { tc_ra_t ra = CH_WAVE->ra; ra.bits.ra += delta; CH_WAVE->ra = ra; } async command void CompareA.setEventFromNow( uint16_t delta ) { tc_ra_t ra = CH_WAVE->ra; ra.bits.ra = CH_WAVE->cv.bits.cv + delta; CH_WAVE->ra = ra; } default async event void CompareA.fired() { } /****************************************** * Compare B ******************************************/ async command void CompareB.enable() { tc_ier_t ier = CH_WAVE->ier; ier.bits.cpbs = 1; CH_WAVE->ier = ier; } async command void CompareB.disable() { tc_idr_t idr = CH_WAVE->idr; idr.bits.cpbs = 1; CH_WAVE->idr = idr; } async command bool CompareB.isEnabled() { return (CH_WAVE->imr.bits.cpbs & 0x01); } async command void CompareB.clearPendingEvent() { sr.flat |= CH_WAVE->sr.flat; sr.bits.cpbs = 0; } async command uint16_t CompareB.getEvent() { return CH_WAVE->rb.bits.rb; } async command void CompareB.setEvent( uint16_t time ) { tc_rb_t rb = CH_WAVE->rb; rb.bits.rb = time; CH_WAVE->rb = rb; } async command void CompareB.setEventFromPrev( uint16_t delta ) { tc_rb_t rb = CH_WAVE->rb; rb.bits.rb += delta; CH_WAVE->rb = rb; } async command void CompareB.setEventFromNow( uint16_t delta ) { tc_rb_t rb = CH_WAVE->rb; rb.bits.rb = CH_WAVE->cv.bits.cv + delta; CH_WAVE->rb = rb; } default async event void CompareB.fired() { } /****************************************** * Compare C ******************************************/ async command void CompareC.enable() { tc_ier_t ier = CH_WAVE->ier; ier.bits.cpcs = 1; CH_WAVE->ier = ier; } async command void CompareC.disable() { tc_idr_t idr = CH_WAVE->idr; idr.bits.cpcs = 1; CH_WAVE->idr = idr; } async command bool CompareC.isEnabled() { return (CH_WAVE->imr.bits.cpcs & 0x01); } async command void CompareC.clearPendingEvent() { sr.flat |= CH_WAVE->sr.flat; sr.bits.cpcs = 0; } async command uint16_t CompareC.getEvent() { return CH_WAVE->rc.bits.rc; } async command void CompareC.setEvent( uint16_t time ) { tc_rc_t rc = CH_WAVE->rc; rc.bits.rc = time; CH_WAVE->rc = rc; } async command void CompareC.setEventFromPrev( uint16_t delta ) { tc_rc_t rc = CH_WAVE->rc; rc.bits.rc += delta; CH_WAVE->rc = rc; } async command void CompareC.setEventFromNow( uint16_t delta ) { tc_rc_t rc = CH_WAVE->rc; rc.bits.rc = CH_WAVE->cv.bits.cv + delta; CH_WAVE->rc = rc; } default async event void CompareC.fired() { } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TCCompare.nc000066400000000000000000000040661207233610700250370ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SAM3 TC compare interface. * * @author Thomas Schmid */ interface HplSam3TCCompare { async command void enable(); async command void disable(); async command bool isEnabled(); async command void clearPendingEvent(); async command uint16_t getEvent(); async command void setEvent( uint16_t time ); async command void setEventFromPrev( uint16_t delta ); async command void setEventFromNow( uint16_t delta ); async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TCEvent.nc000066400000000000000000000033271207233610700245310ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SAM3 TC general event interface. * * @author Thomas Schmid */ interface HplSam3TCEvent { async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/HplSam3TCP.nc000066400000000000000000000107051207233610700236450ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Provides the functionality of the SAM3U TC. It enables and disables the * whole unit and initializes the default configuration. * * @author Thomas Schmid */ #include "sam3tchardware.h" generic module HplSam3TCP(uint32_t tc_base) @safe() { provides { interface Init; interface HplSam3TC as TC; } uses { interface HplSam3TCChannel as TC0; interface HplSam3TCChannel as TC1; interface HplSam3TCChannel as TC2; interface HplSam3Clock as ClockConfig; } } implementation { volatile tc_t *TC_P = (volatile tc_t*)tc_base; command error_t Init.init() { uint32_t mck; uint8_t clockSource; call TC0.setMode(TC_CMR_CAPTURE); call TC1.setMode(TC_CMR_CAPTURE); call TC2.setMode(TC_CMR_CAPTURE); // check the speed of the master clock mck = call ClockConfig.getMainClockSpeed(); // in kHz // convert to MHz to find the right divider mck = mck / 1000; if(mck >= 128) clockSource = TC_CMR_CLK_TC4; else if (mck >= 32) clockSource = TC_CMR_CLK_TC3; else if (mck >= 8) clockSource = TC_CMR_CLK_TC2; else if (mck >= 2) clockSource = TC_CMR_CLK_TC1; else clockSource = TC_CMR_CLK_SLOW; call TC0.setClockSource(clockSource); call TC1.setClockSource(clockSource); call TC2.setClockSource(clockSource); call TC2.enableEvents(); return SUCCESS; } command void TC.enableTC0(){ call TC0.setMode(TC_CMR_CAPTURE); call TC0.setClockSource(TC_CMR_CLK_SLOW); call TC0.enableEvents(); } command void TC.enableTC1(){ call TC1.setMode(TC_CMR_CAPTURE); call TC1.setClockSource(TC_CMR_CLK_SLOW); call TC1.enableEvents(); } command void TC.enableTC2(){ uint32_t mck; call TC2.setMode(TC_CMR_CAPTURE); // check the speed of the master clock mck = call ClockConfig.getMainClockSpeed(); // in kHz // convert to MHz to find the right divider mck = mck / 1000; if(mck >= 128) call TC2.setClockSource(TC_CMR_CLK_TC4); else if (mck >= 32) call TC2.setClockSource(TC_CMR_CLK_TC3); else if (mck >= 8) call TC2.setClockSource(TC_CMR_CLK_TC2); else if (mck >= 2) call TC2.setClockSource(TC_CMR_CLK_TC1); else call TC2.setClockSource(TC_CMR_CLK_SLOW); call TC2.enableEvents(); } command void TC.disableTC0(){ call TC0.disableEvents(); } command void TC.disableTC1(){ call TC1.disableEvents(); } command void TC.disableTC2(){ call TC2.disableEvents(); } command void TC.sync(){ tc_bcr_t bcr = TC_P->bcr; bcr.bits.sync = 1; TC_P->bcr = bcr; } async event void ClockConfig.mainClockChanged() {}; async event void TC0.overflow() {}; async event void TC1.overflow() {}; async event void TC2.overflow() {}; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/LocalTime64.nc000066400000000000000000000047341207233610700240570ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * A LocalTime interface counts time in some units. If you need to detect * time overflow, you should use a component offering the Counter * interface. * *

      The LocalTime interface is parameterised by its "precision" * (milliseconds, microseconds, etc), identified by a type. This prevents, * e.g., unintentionally mixing components expecting milliseconds with * those expecting microseconds as those interfaces have a different type. * *

      See TEP102 for more details. * * @param precision_tag A type indicating the precision of this Counter. * * @author Cory Sharp */ interface LocalTime64 { /** * Return current time. Time starts counting at boot - some time sources * may stop counting while the processor is in low-power mode. * * @return Current time. */ async command uint64_t get(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/LocalTimeMicroC.nc000066400000000000000000000036231207233610700247760ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai * Author: Thomas Schmid (adapted to sam3) */ #include configuration LocalTimeMicroC { provides interface LocalTime; } implementation { components CounterTMicro32C; components new CounterToLocalTimeC(TMicro); LocalTime = CounterToLocalTimeC; CounterToLocalTimeC.Counter -> CounterTMicro32C; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/rtthardware.h000066400000000000000000000054251207233610700242100ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Real-Time Timer register definitions. * * @author Thomas Schmid */ #ifndef RTTHARDWARE_H #define RTTHARDWARE_H typedef union { uint32_t flat; struct { uint16_t rtpres : 16; // RTT prescaler uint8_t almien : 1; // alarm interrupt enable uint8_t rttincien : 1; // RTT increment interrupt enable uint8_t rttrst : 1; // RTT restart uint8_t reserved1 : 5; uint8_t reserved0 : 8; } bits; } rtt_mr_t; /* Note: Never read directly the status register since it gets reset after * each read. Thus, you migh tmiss an interrupt! */ typedef union { uint32_t flat; struct { uint8_t alms : 1; // RT alarm status uint8_t rttinc : 1; // RTT increment status uint8_t reserved2 : 6; uint8_t reserved1 : 8; uint16_t reserved0 : 16; } bits; } rtt_sr_t; // Real Time Timer Register definition typedef struct rtt { volatile rtt_mr_t mr; // Real Time Mode Register volatile uint32_t ar; // Real Time Alarm Register volatile uint32_t vr; // Real Time Value Register volatile rtt_sr_t sr; // Real Time Status Register } rtt_t; #endif // RTTHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/timer/tchardware.h000066400000000000000000000325501207233610700240040ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Timer Counter register definitions. * * @author Thomas Schmid */ #ifndef TCHARDWARE_H #define TCHARDWARE_H /** * TC Block Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 828 */ typedef union { uint32_t flat; struct { uint32_t sync : 1; // synchro command uint32_t reserved0 : 7; uint32_t reserved1 : 8; uint32_t reserved2 : 8; } __attribute__((packed)) bits; } tc_bcr_t; /** * TC Block Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 829 */ typedef union { uint32_t flat; struct { uint32_t tc0xc0s : 2; // external clock signal 0 selection uint32_t tc1xc1s : 2; // external clock signal 1 selection uint32_t tc2xc2s : 2; // external clock signal 2 selection uint32_t reserved0 : 2; uint32_t qden : 1; // quadrature decoder enabled uint32_t posen : 1; // position enabled uint32_t speeden : 1; // speed enabled uint32_t qdtrans : 1; // quadrature decoding transparent uint32_t edgpha : 1; // edge on pha count mode uint32_t inva : 1; // invert pha uint32_t invb : 1; // invert phb uint32_t invidx : 1; // swap pha and phb uint32_t swap : 1; // inverted index uint32_t idxphb : 1; // index pin is phb pin uint32_t reserved1 : 1; uint32_t filter : 1; // filter uint32_t maxfilt : 6; // maximum filter uint32_t reserved2 : 6; } __attribute__((packed)) bits; } tc_bmr_t; /** * TC Channel Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 831 */ typedef union { uint32_t flat; struct { uint32_t clken : 1; // counter clock enable command uint32_t clkdis : 1; // counter clock disable command uint32_t swtrg : 1; // software trigger command uint32_t reserved0 : 5; uint32_t reserved1 : 8; uint32_t reserved2 : 16; } __attribute__((packed)) bits; } tc_ccr_t; /** * TC QDEC Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 832 */ typedef union { uint32_t flat; struct { uint32_t idx : 1; // index uint32_t dirchg : 1; // direction change uint32_t qerr : 1; // quadrature error uint32_t reserved0 : 5; uint32_t reserved1 : 8; uint32_t reserved2 : 16; } __attribute__((packed)) bits; } tc_qier_t; /** * TC QDEC Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 833 */ typedef union { uint32_t flat; struct { uint32_t idx : 1; // index uint32_t dirchg : 1; // direction change uint32_t qerr : 1; // quadrature error uint32_t reserved0 : 5; uint32_t reserved1 : 8; uint32_t reserved2 : 16; } __attribute__((packed)) bits; } tc_qidr_t; /** * TC QDEC Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 834 */ typedef union { uint32_t flat; struct { uint32_t idx : 1; // index uint32_t dirchg : 1; // direction change uint32_t qerr : 1; // quadrature error uint32_t reserved0 : 5; uint32_t reserved1 : 8; uint32_t reserved2 : 16; } __attribute__((packed)) bits; } tc_qimr_t; /** * TC QDEC Interrupt Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 835 */ typedef union { uint32_t flat; struct { uint32_t idx : 1; // index uint32_t dirchg : 1; // direction change uint32_t qerr : 1; // quadrature error uint32_t reserved0 : 5; uint32_t dir : 1; // direction uint32_t reserved1 : 7; uint32_t reserved2 : 16; } __attribute__((packed)) bits; } tc_qisr_t; /** * TC Channel Mode Register Capture Mode, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 836 */ typedef union { uint32_t flat; struct { uint32_t tcclks : 3; // clock selection uint32_t clki : 1; // clock invert uint32_t burst : 2; // burst signal selection uint32_t ldbstop : 1; // counter clock stopped with rb loading uint32_t ldbdis : 1; // counter clock disable with rb loading uint32_t etrgedg : 2; // external trigger edge selection uint32_t abetrg : 1; // tioa or tiob external trigger selection uint32_t reserved0 : 3; uint32_t cpctrg : 1; // rc compare trigger enable uint32_t wave : 1; // wave uint32_t ldra : 2; // ra loading selection uint32_t ldrb : 2; // rb loading selection uint32_t reserved1 : 4; uint32_t reserved2 : 8; } __attribute__((packed)) bits; } tc_cmr_capture_t; #define TC_CMR_ETRGEDG_NONE 0 #define TC_CMR_ETRGEDG_RISING 1 #define TC_CMR_ETRGEDG_FALLING 2 #define TC_CMR_ETRGEDG_EACH 3 #define TC_CMR_CAPTURE 0 #define TC_CMR_WAVE 1 #define TC_CMR_CLK_TC1 0 #define TC_CMR_CLK_TC2 1 #define TC_CMR_CLK_TC3 2 #define TC_CMR_CLK_TC4 3 #define TC_CMR_CLK_SLOW 4 #define TC_CMR_CLK_XC0 5 #define TC_CMR_CLK_XC1 6 #define TC_CMR_CLK_XC2 7 #define TC_CMR_ABETRG_TIOA 0 #define TC_CMR_ABETRG_TIOB 1 /** * TC Channel Mode Register Waveform Mode, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 838 */ typedef union { uint32_t flat; struct { uint32_t tcclks : 3; // clock selection uint32_t clki : 1; // clock invert uint32_t burst : 2; // burst signal selection uint32_t cpcstop : 1; // counter clock stopped with rc compare uint32_t cpcdis : 1; // counter clock disable with rc compare uint32_t eevtedg : 2; // external event edge selection uint32_t eevt : 2; // external event selection uint32_t enetrg : 1; // external event trigger enable uint32_t wavsel : 2; // waveform selection uint32_t wave : 1; // wave uint32_t acpa : 2; // ra compare effect on tioa uint32_t acpc : 2; // rc compare effect on tioa uint32_t aeevt : 2; // external event effect on tioa uint32_t aswtrg : 2; // software trigger effect on tioa uint32_t bcpb : 2; // rb compare effect on tiob uint32_t bcpc : 2; // rc compare effect on tiob uint32_t beevt : 2; // external event effect on tiob uint32_t bswtrg : 2; // software trigger effect on tiob } __attribute__((packed)) bits; } tc_cmr_wave_t; /** * TC Counter Value Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 842 */ typedef union { uint32_t flat; struct { uint32_t cv : 16; // counter value uint32_t reserved : 16; } __attribute__((packed)) bits; } tc_cv_t; /** * TC Register A, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 842 */ typedef union { uint32_t flat; struct { uint32_t ra : 16; // register a uint32_t reserved : 16; } __attribute__((packed)) bits; } tc_ra_t; /** * TC Register B, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 843 */ typedef union { uint32_t flat; struct { uint32_t rb : 16; // register b uint32_t reserved : 16; } __attribute__((packed)) bits; } tc_rb_t; /** * TC Register C, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 843 */ typedef union { uint32_t flat; struct { uint32_t rc : 16; // register c uint32_t reserved : 16; } __attribute__((packed)) bits; } tc_rc_t; /** * TC Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 844 */ typedef union { uint32_t flat; struct { uint32_t covfs : 1; // counter overflow status uint32_t lovrs : 1; // load overrun status uint32_t cpas : 1; // ra compare status uint32_t cpbs : 1; // rb compare status uint32_t cpcs : 1; // rc compare status uint32_t ldras : 1; // ra loading status uint32_t ldrbs : 1; // rb loading status uint32_t etrgs : 1; // external trigger status uint32_t reserved0 : 8; uint32_t clksta : 1; // clock enable status uint32_t mtioa : 1; // tioa mirror uint32_t mtiob : 1; // tiob mirror uint32_t reserved1 : 5; uint32_t reserved2 : 8; } __attribute__((packed)) bits; } tc_sr_t; /** * TC Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 846 */ typedef union { uint32_t flat; struct { uint32_t covfs : 1; // counter overflow uint32_t lovrs : 1; // load overrun uint32_t cpas : 1; // ra compare uint32_t cpbs : 1; // rb compare uint32_t cpcs : 1; // rc compare uint32_t ldras : 1; // ra loading uint32_t ldrbs : 1; // rb loading uint32_t etrgs : 1; // external trigger uint32_t reserved0 : 8; uint32_t reserved1 :16; } __attribute__((packed)) bits; } tc_ier_t; /** * TC Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 847 */ typedef union { uint32_t flat; struct { uint32_t covfs : 1; // counter overflow uint32_t lovrs : 1; // load overrun uint32_t cpas : 1; // ra compare uint32_t cpbs : 1; // rb compare uint32_t cpcs : 1; // rc compare uint32_t ldras : 1; // ra loading uint32_t ldrbs : 1; // rb loading uint32_t etrgs : 1; // external trigger uint32_t reserved0 : 8; uint32_t reserved1 :16; } __attribute__((packed)) bits; } tc_idr_t; /** * TC Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. 848 */ typedef union { uint32_t flat; struct { uint32_t covfs : 1; // counter overflow uint32_t lovrs : 1; // load overrun uint32_t cpas : 1; // ra compare uint32_t cpbs : 1; // rb compare uint32_t cpcs : 1; // rc compare uint32_t ldras : 1; // ra loading uint32_t ldrbs : 1; // rb loading uint32_t etrgs : 1; // external trigger uint32_t reserved0 : 8; uint32_t reserved1 :16; } __attribute__((packed)) bits; } tc_imr_t; /** * Channel definition capture mode */ typedef struct { volatile tc_ccr_t ccr; volatile tc_cmr_capture_t cmr; uint32_t reserved[2]; volatile tc_cv_t cv; volatile tc_ra_t ra; volatile tc_rb_t rb; volatile tc_rc_t rc; volatile tc_sr_t sr; volatile tc_ier_t ier; volatile tc_idr_t idr; volatile tc_imr_t imr; } tc_channel_capture_t; /** * Channel definition wave mode */ typedef struct { volatile tc_ccr_t ccr; volatile tc_cmr_wave_t cmr; uint32_t reserved[2]; volatile tc_cv_t cv; volatile tc_ra_t ra; volatile tc_rb_t rb; volatile tc_rc_t rc; volatile tc_sr_t sr; volatile tc_ier_t ier; volatile tc_idr_t idr; volatile tc_imr_t imr; } tc_channel_wave_t; #endif //TCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/000077500000000000000000000000001207233610700206265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/AT91SAM3U4.h000066400000000000000000021211551207233610700223210ustar00rootroot00000000000000// ---------------------------------------------------------------------------- // ATMEL Microcontroller Software Support - ROUSSET - // ---------------------------------------------------------------------------- // Copyright (c) 2008, Atmel Corporation // All rights reserved. // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // - Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // - Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // - Neither the name of the copyright holders nor the names of its // contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, // BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS // OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED // AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT // LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY // WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. // // ---------------------------------------------------------------------------- // File Name : AT91SAM3U4.h // Object : AT91SAM3U4 definitions // Generated : AT91 SW Application Group 06/26/2009 (09:26:22) // // CVS Reference : /AT91SAM3U4.pl/1.38/Thu Jun 4 08:57:57 2009// // CVS Reference : /SYS_SAM3U4.pl/1.4/Fri Oct 17 13:27:57 2008// // CVS Reference : /HMATRIX2_SAM3U4.pl/1.5/Fri Jun 26 07:25:14 2009// // CVS Reference : /PMC_SAM3U4.pl/1.7/Fri Oct 17 13:27:54 2008// // CVS Reference : /EBI_SAM9260.pl/1.1/Fri Sep 30 12:12:14 2005// // CVS Reference : /EFC2_SAM3U4.pl/1.3/Mon Mar 2 10:12:06 2009// // CVS Reference : /HSDRAMC1_6100A.pl/1.2/Mon Aug 9 10:52:25 2004// // CVS Reference : /HSMC4_xxxx.pl/1.9/Fri Oct 17 13:27:56 2008// // CVS Reference : /HECC_6143A.pl/1.1/Wed Feb 9 17:16:57 2005// // CVS Reference : /CORTEX_M3_NVIC.pl/1.8/Fri Jun 19 12:00:55 2009// // CVS Reference : /CORTEX_M3_MPU.pl/1.3/Fri Oct 17 13:27:48 2008// // CVS Reference : /CORTEX_M3.pl/1.1/Mon Sep 15 15:22:06 2008// // CVS Reference : /PDC_6074C.pl/1.2/Thu Feb 3 09:02:11 2005// // CVS Reference : /DBGU_SAM3U4.pl/1.3/Tue May 5 11:28:09 2009// // CVS Reference : /PIO3_xxxx.pl/1.6/Mon Mar 9 10:43:37 2009// // CVS Reference : /RSTC_6098A.pl/1.4/Fri Oct 17 13:27:55 2008// // CVS Reference : /SHDWC_6122A.pl/1.3/Wed Oct 6 14:16:58 2004// // CVS Reference : /SUPC by datasheet // CVS Reference : /RTTC_6081A.pl/1.2/Thu Nov 4 13:57:22 2004// // CVS Reference : /PITC_6079A.pl/1.2/Thu Nov 4 13:56:22 2004// // CVS Reference : /WDTC_6080A.pl/1.3/Thu Nov 4 13:58:52 2004// // CVS Reference : /TC_6082A.pl/1.8/Fri Oct 17 13:27:58 2008// // CVS Reference : /MCI_6101F.pl/1.3/Fri Jan 23 09:15:32 2009// // CVS Reference : /TWI_6061B.pl/1.3/Fri Oct 17 13:27:59 2008// // CVS Reference : /US_6089J.pl/1.3/Fri Oct 17 13:27:59 2008// // CVS Reference : /SSC_SAM3U4.pl/1.1/Thu Jun 4 09:02:35 2009// // CVS Reference : /SPI2.pl/1.5/Thu Jun 4 08:58:10 2009// // CVS Reference : /PWM_6343B_V400.pl/1.3/Fri Oct 17 13:27:54 2008// // CVS Reference : /DMAC by datasheet // CVS Reference : /UDPHS_SAM9_7ept6dma4iso.pl/1.4/Tue Jun 24 13:05:14 2008// // CVS Reference : /ADC_SAM3UE.pl/1.4/Fri Feb 20 12:19:18 2009// // CVS Reference : /ADC12B by datasheet // CVS Reference : /RTC_1245D.pl/1.3/Fri Sep 17 14:01:31 2004// // ---------------------------------------------------------------------------- #ifndef AT91SAM3U4_H #define AT91SAM3U4_H #ifndef __ASSEMBLY__ typedef volatile unsigned int AT91_REG;// Hardware register definition #define AT91_CAST(a) (a) #else #define AT91_CAST(a) #endif // ***************************************************************************** // SOFTWARE API DEFINITION FOR System Peripherals // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_SYS { AT91_REG HSMC4_CFG; // Configuration Register AT91_REG HSMC4_CTRL; // Control Register AT91_REG HSMC4_SR; // Status Register AT91_REG HSMC4_IER; // Interrupt Enable Register AT91_REG HSMC4_IDR; // Interrupt Disable Register AT91_REG HSMC4_IMR; // Interrupt Mask Register AT91_REG HSMC4_ADDR; // Address Cycle Zero Register AT91_REG HSMC4_BANK; // Bank Register AT91_REG HSMC4_ECCCR; // ECC reset register AT91_REG HSMC4_ECCCMD; // ECC Page size register AT91_REG HSMC4_ECCSR1; // ECC Status register 1 AT91_REG HSMC4_ECCPR0; // ECC Parity register 0 AT91_REG HSMC4_ECCPR1; // ECC Parity register 1 AT91_REG HSMC4_ECCSR2; // ECC Status register 2 AT91_REG HSMC4_ECCPR2; // ECC Parity register 2 AT91_REG HSMC4_ECCPR3; // ECC Parity register 3 AT91_REG HSMC4_ECCPR4; // ECC Parity register 4 AT91_REG HSMC4_ECCPR5; // ECC Parity register 5 AT91_REG HSMC4_ECCPR6; // ECC Parity register 6 AT91_REG HSMC4_ECCPR7; // ECC Parity register 7 AT91_REG HSMC4_ECCPR8; // ECC Parity register 8 AT91_REG HSMC4_ECCPR9; // ECC Parity register 9 AT91_REG HSMC4_ECCPR10; // ECC Parity register 10 AT91_REG HSMC4_ECCPR11; // ECC Parity register 11 AT91_REG HSMC4_ECCPR12; // ECC Parity register 12 AT91_REG HSMC4_ECCPR13; // ECC Parity register 13 AT91_REG HSMC4_ECCPR14; // ECC Parity register 14 AT91_REG HSMC4_Eccpr15; // ECC Parity register 15 AT91_REG Reserved0[40]; // AT91_REG HSMC4_OCMS; // OCMS MODE register AT91_REG HSMC4_KEY1; // KEY1 Register AT91_REG HSMC4_KEY2; // KEY2 Register AT91_REG Reserved1[50]; // AT91_REG HSMC4_WPCR; // Write Protection Control register AT91_REG HSMC4_WPSR; // Write Protection Status Register AT91_REG HSMC4_ADDRSIZE; // Write Protection Status Register AT91_REG HSMC4_IPNAME1; // Write Protection Status Register AT91_REG HSMC4_IPNAME2; // Write Protection Status Register AT91_REG HSMC4_FEATURES; // Write Protection Status Register AT91_REG HSMC4_VER; // HSMC4 Version Register AT91_REG HMATRIX_MCFG0; // Master Configuration Register 0 : ARM I and D AT91_REG HMATRIX_MCFG1; // Master Configuration Register 1 : ARM S AT91_REG HMATRIX_MCFG2; // Master Configuration Register 2 AT91_REG HMATRIX_MCFG3; // Master Configuration Register 3 AT91_REG HMATRIX_MCFG4; // Master Configuration Register 4 AT91_REG HMATRIX_MCFG5; // Master Configuration Register 5 AT91_REG HMATRIX_MCFG6; // Master Configuration Register 6 AT91_REG HMATRIX_MCFG7; // Master Configuration Register 7 AT91_REG Reserved2[8]; // AT91_REG HMATRIX_SCFG0; // Slave Configuration Register 0 AT91_REG HMATRIX_SCFG1; // Slave Configuration Register 1 AT91_REG HMATRIX_SCFG2; // Slave Configuration Register 2 AT91_REG HMATRIX_SCFG3; // Slave Configuration Register 3 AT91_REG HMATRIX_SCFG4; // Slave Configuration Register 4 AT91_REG HMATRIX_SCFG5; // Slave Configuration Register 5 AT91_REG HMATRIX_SCFG6; // Slave Configuration Register 6 AT91_REG HMATRIX_SCFG7; // Slave Configuration Register 5 AT91_REG HMATRIX_SCFG8; // Slave Configuration Register 8 AT91_REG HMATRIX_SCFG9; // Slave Configuration Register 9 AT91_REG Reserved3[42]; // AT91_REG HMATRIX_SFR0 ; // Special Function Register 0 AT91_REG HMATRIX_SFR1 ; // Special Function Register 1 AT91_REG HMATRIX_SFR2 ; // Special Function Register 2 AT91_REG HMATRIX_SFR3 ; // Special Function Register 3 AT91_REG HMATRIX_SFR4 ; // Special Function Register 4 AT91_REG HMATRIX_SFR5 ; // Special Function Register 5 AT91_REG HMATRIX_SFR6 ; // Special Function Register 6 AT91_REG HMATRIX_SFR7 ; // Special Function Register 7 AT91_REG HMATRIX_SFR8 ; // Special Function Register 8 AT91_REG HMATRIX_SFR9 ; // Special Function Register 9 AT91_REG HMATRIX_SFR10; // Special Function Register 10 AT91_REG HMATRIX_SFR11; // Special Function Register 11 AT91_REG HMATRIX_SFR12; // Special Function Register 12 AT91_REG HMATRIX_SFR13; // Special Function Register 13 AT91_REG HMATRIX_SFR14; // Special Function Register 14 AT91_REG HMATRIX_SFR15; // Special Function Register 15 AT91_REG Reserved4[39]; // AT91_REG HMATRIX_ADDRSIZE; // HMATRIX2 ADDRSIZE REGISTER AT91_REG HMATRIX_IPNAME1; // HMATRIX2 IPNAME1 REGISTER AT91_REG HMATRIX_IPNAME2; // HMATRIX2 IPNAME2 REGISTER AT91_REG HMATRIX_FEATURES; // HMATRIX2 FEATURES REGISTER AT91_REG HMATRIX_VER; // HMATRIX2 VERSION REGISTER AT91_REG PMC_SCER; // System Clock Enable Register AT91_REG PMC_SCDR; // System Clock Disable Register AT91_REG PMC_SCSR; // System Clock Status Register AT91_REG Reserved5[1]; // AT91_REG PMC_PCER; // Peripheral Clock Enable Register AT91_REG PMC_PCDR; // Peripheral Clock Disable Register AT91_REG PMC_PCSR; // Peripheral Clock Status Register AT91_REG PMC_UCKR; // UTMI Clock Configuration Register AT91_REG PMC_MOR; // Main Oscillator Register AT91_REG PMC_MCFR; // Main Clock Frequency Register AT91_REG PMC_PLLAR; // PLL Register AT91_REG Reserved6[1]; // AT91_REG PMC_MCKR; // Master Clock Register AT91_REG Reserved7[3]; // AT91_REG PMC_PCKR[8]; // Programmable Clock Register AT91_REG PMC_IER; // Interrupt Enable Register AT91_REG PMC_IDR; // Interrupt Disable Register AT91_REG PMC_SR; // Status Register AT91_REG PMC_IMR; // Interrupt Mask Register AT91_REG PMC_FSMR; // Fast Startup Mode Register AT91_REG PMC_FSPR; // Fast Startup Polarity Register AT91_REG PMC_FOCR; // Fault Output Clear Register AT91_REG Reserved8[28]; // AT91_REG PMC_ADDRSIZE; // PMC ADDRSIZE REGISTER AT91_REG PMC_IPNAME1; // PMC IPNAME1 REGISTER AT91_REG PMC_IPNAME2; // PMC IPNAME2 REGISTER AT91_REG PMC_FEATURES; // PMC FEATURES REGISTER AT91_REG PMC_VER; // APMC VERSION REGISTER AT91_REG Reserved9[64]; // AT91_REG DBGU_CR; // Control Register AT91_REG DBGU_MR; // Mode Register AT91_REG DBGU_IER; // Interrupt Enable Register AT91_REG DBGU_IDR; // Interrupt Disable Register AT91_REG DBGU_IMR; // Interrupt Mask Register AT91_REG DBGU_CSR; // Channel Status Register AT91_REG DBGU_RHR; // Receiver Holding Register AT91_REG DBGU_THR; // Transmitter Holding Register AT91_REG DBGU_BRGR; // Baud Rate Generator Register AT91_REG Reserved10[9]; // AT91_REG DBGU_FNTR; // Force NTRST Register AT91_REG Reserved11[40]; // AT91_REG DBGU_ADDRSIZE; // DBGU ADDRSIZE REGISTER AT91_REG DBGU_IPNAME1; // DBGU IPNAME1 REGISTER AT91_REG DBGU_IPNAME2; // DBGU IPNAME2 REGISTER AT91_REG DBGU_FEATURES; // DBGU FEATURES REGISTER AT91_REG DBGU_VER; // DBGU VERSION REGISTER AT91_REG DBGU_RPR; // Receive Pointer Register AT91_REG DBGU_RCR; // Receive Counter Register AT91_REG DBGU_TPR; // Transmit Pointer Register AT91_REG DBGU_TCR; // Transmit Counter Register AT91_REG DBGU_RNPR; // Receive Next Pointer Register AT91_REG DBGU_RNCR; // Receive Next Counter Register AT91_REG DBGU_TNPR; // Transmit Next Pointer Register AT91_REG DBGU_TNCR; // Transmit Next Counter Register AT91_REG DBGU_PTCR; // PDC Transfer Control Register AT91_REG DBGU_PTSR; // PDC Transfer Status Register AT91_REG Reserved12[6]; // AT91_REG DBGU_CIDR; // Chip ID Register AT91_REG DBGU_EXID; // Chip ID Extension Register AT91_REG Reserved13[46]; // AT91_REG EFC0_FMR; // EFC Flash Mode Register AT91_REG EFC0_FCR; // EFC Flash Command Register AT91_REG EFC0_FSR; // EFC Flash Status Register AT91_REG EFC0_FRR; // EFC Flash Result Register AT91_REG Reserved14[1]; // AT91_REG EFC0_FVR; // EFC Flash Version Register AT91_REG Reserved15[122]; // AT91_REG EFC1_FMR; // EFC Flash Mode Register AT91_REG EFC1_FCR; // EFC Flash Command Register AT91_REG EFC1_FSR; // EFC Flash Status Register AT91_REG EFC1_FRR; // EFC Flash Result Register AT91_REG Reserved16[1]; // AT91_REG EFC1_FVR; // EFC Flash Version Register AT91_REG Reserved17[122]; // AT91_REG PIOA_PER; // PIO Enable Register AT91_REG PIOA_PDR; // PIO Disable Register AT91_REG PIOA_PSR; // PIO Status Register AT91_REG Reserved18[1]; // AT91_REG PIOA_OER; // Output Enable Register AT91_REG PIOA_ODR; // Output Disable Registerr AT91_REG PIOA_OSR; // Output Status Register AT91_REG Reserved19[1]; // AT91_REG PIOA_IFER; // Input Filter Enable Register AT91_REG PIOA_IFDR; // Input Filter Disable Register AT91_REG PIOA_IFSR; // Input Filter Status Register AT91_REG Reserved20[1]; // AT91_REG PIOA_SODR; // Set Output Data Register AT91_REG PIOA_CODR; // Clear Output Data Register AT91_REG PIOA_ODSR; // Output Data Status Register AT91_REG PIOA_PDSR; // Pin Data Status Register AT91_REG PIOA_IER; // Interrupt Enable Register AT91_REG PIOA_IDR; // Interrupt Disable Register AT91_REG PIOA_IMR; // Interrupt Mask Register AT91_REG PIOA_ISR; // Interrupt Status Register AT91_REG PIOA_MDER; // Multi-driver Enable Register AT91_REG PIOA_MDDR; // Multi-driver Disable Register AT91_REG PIOA_MDSR; // Multi-driver Status Register AT91_REG Reserved21[1]; // AT91_REG PIOA_PPUDR; // Pull-up Disable Register AT91_REG PIOA_PPUER; // Pull-up Enable Register AT91_REG PIOA_PPUSR; // Pull-up Status Register AT91_REG Reserved22[1]; // AT91_REG PIOA_ABSR; // Peripheral AB Select Register AT91_REG Reserved23[3]; // AT91_REG PIOA_SCIFSR; // System Clock Glitch Input Filter Select Register AT91_REG PIOA_DIFSR; // Debouncing Input Filter Select Register AT91_REG PIOA_IFDGSR; // Glitch or Debouncing Input Filter Clock Selection Status Register AT91_REG PIOA_SCDR; // Slow Clock Divider Debouncing Register AT91_REG Reserved24[4]; // AT91_REG PIOA_OWER; // Output Write Enable Register AT91_REG PIOA_OWDR; // Output Write Disable Register AT91_REG PIOA_OWSR; // Output Write Status Register AT91_REG Reserved25[1]; // AT91_REG PIOA_AIMER; // Additional Interrupt Modes Enable Register AT91_REG PIOA_AIMDR; // Additional Interrupt Modes Disables Register AT91_REG PIOA_AIMMR; // Additional Interrupt Modes Mask Register AT91_REG Reserved26[1]; // AT91_REG PIOA_ESR; // Edge Select Register AT91_REG PIOA_LSR; // Level Select Register AT91_REG PIOA_ELSR; // Edge/Level Status Register AT91_REG Reserved27[1]; // AT91_REG PIOA_FELLSR; // Falling Edge/Low Level Select Register AT91_REG PIOA_REHLSR; // Rising Edge/ High Level Select Register AT91_REG PIOA_FRLHSR; // Fall/Rise - Low/High Status Register AT91_REG Reserved28[1]; // AT91_REG PIOA_LOCKSR; // Lock Status Register AT91_REG Reserved29[6]; // AT91_REG PIOA_VER; // PIO VERSION REGISTER AT91_REG Reserved30[8]; // AT91_REG PIOA_KER; // Keypad Controller Enable Register AT91_REG PIOA_KRCR; // Keypad Controller Row Column Register AT91_REG PIOA_KDR; // Keypad Controller Debouncing Register AT91_REG Reserved31[1]; // AT91_REG PIOA_KIER; // Keypad Controller Interrupt Enable Register AT91_REG PIOA_KIDR; // Keypad Controller Interrupt Disable Register AT91_REG PIOA_KIMR; // Keypad Controller Interrupt Mask Register AT91_REG PIOA_KSR; // Keypad Controller Status Register AT91_REG PIOA_KKPR; // Keypad Controller Key Press Register AT91_REG PIOA_KKRR; // Keypad Controller Key Release Register AT91_REG Reserved32[46]; // AT91_REG PIOB_PER; // PIO Enable Register AT91_REG PIOB_PDR; // PIO Disable Register AT91_REG PIOB_PSR; // PIO Status Register AT91_REG Reserved33[1]; // AT91_REG PIOB_OER; // Output Enable Register AT91_REG PIOB_ODR; // Output Disable Registerr AT91_REG PIOB_OSR; // Output Status Register AT91_REG Reserved34[1]; // AT91_REG PIOB_IFER; // Input Filter Enable Register AT91_REG PIOB_IFDR; // Input Filter Disable Register AT91_REG PIOB_IFSR; // Input Filter Status Register AT91_REG Reserved35[1]; // AT91_REG PIOB_SODR; // Set Output Data Register AT91_REG PIOB_CODR; // Clear Output Data Register AT91_REG PIOB_ODSR; // Output Data Status Register AT91_REG PIOB_PDSR; // Pin Data Status Register AT91_REG PIOB_IER; // Interrupt Enable Register AT91_REG PIOB_IDR; // Interrupt Disable Register AT91_REG PIOB_IMR; // Interrupt Mask Register AT91_REG PIOB_ISR; // Interrupt Status Register AT91_REG PIOB_MDER; // Multi-driver Enable Register AT91_REG PIOB_MDDR; // Multi-driver Disable Register AT91_REG PIOB_MDSR; // Multi-driver Status Register AT91_REG Reserved36[1]; // AT91_REG PIOB_PPUDR; // Pull-up Disable Register AT91_REG PIOB_PPUER; // Pull-up Enable Register AT91_REG PIOB_PPUSR; // Pull-up Status Register AT91_REG Reserved37[1]; // AT91_REG PIOB_ABSR; // Peripheral AB Select Register AT91_REG Reserved38[3]; // AT91_REG PIOB_SCIFSR; // System Clock Glitch Input Filter Select Register AT91_REG PIOB_DIFSR; // Debouncing Input Filter Select Register AT91_REG PIOB_IFDGSR; // Glitch or Debouncing Input Filter Clock Selection Status Register AT91_REG PIOB_SCDR; // Slow Clock Divider Debouncing Register AT91_REG Reserved39[4]; // AT91_REG PIOB_OWER; // Output Write Enable Register AT91_REG PIOB_OWDR; // Output Write Disable Register AT91_REG PIOB_OWSR; // Output Write Status Register AT91_REG Reserved40[1]; // AT91_REG PIOB_AIMER; // Additional Interrupt Modes Enable Register AT91_REG PIOB_AIMDR; // Additional Interrupt Modes Disables Register AT91_REG PIOB_AIMMR; // Additional Interrupt Modes Mask Register AT91_REG Reserved41[1]; // AT91_REG PIOB_ESR; // Edge Select Register AT91_REG PIOB_LSR; // Level Select Register AT91_REG PIOB_ELSR; // Edge/Level Status Register AT91_REG Reserved42[1]; // AT91_REG PIOB_FELLSR; // Falling Edge/Low Level Select Register AT91_REG PIOB_REHLSR; // Rising Edge/ High Level Select Register AT91_REG PIOB_FRLHSR; // Fall/Rise - Low/High Status Register AT91_REG Reserved43[1]; // AT91_REG PIOB_LOCKSR; // Lock Status Register AT91_REG Reserved44[6]; // AT91_REG PIOB_VER; // PIO VERSION REGISTER AT91_REG Reserved45[8]; // AT91_REG PIOB_KER; // Keypad Controller Enable Register AT91_REG PIOB_KRCR; // Keypad Controller Row Column Register AT91_REG PIOB_KDR; // Keypad Controller Debouncing Register AT91_REG Reserved46[1]; // AT91_REG PIOB_KIER; // Keypad Controller Interrupt Enable Register AT91_REG PIOB_KIDR; // Keypad Controller Interrupt Disable Register AT91_REG PIOB_KIMR; // Keypad Controller Interrupt Mask Register AT91_REG PIOB_KSR; // Keypad Controller Status Register AT91_REG PIOB_KKPR; // Keypad Controller Key Press Register AT91_REG PIOB_KKRR; // Keypad Controller Key Release Register AT91_REG Reserved47[46]; // AT91_REG PIOC_PER; // PIO Enable Register AT91_REG PIOC_PDR; // PIO Disable Register AT91_REG PIOC_PSR; // PIO Status Register AT91_REG Reserved48[1]; // AT91_REG PIOC_OER; // Output Enable Register AT91_REG PIOC_ODR; // Output Disable Registerr AT91_REG PIOC_OSR; // Output Status Register AT91_REG Reserved49[1]; // AT91_REG PIOC_IFER; // Input Filter Enable Register AT91_REG PIOC_IFDR; // Input Filter Disable Register AT91_REG PIOC_IFSR; // Input Filter Status Register AT91_REG Reserved50[1]; // AT91_REG PIOC_SODR; // Set Output Data Register AT91_REG PIOC_CODR; // Clear Output Data Register AT91_REG PIOC_ODSR; // Output Data Status Register AT91_REG PIOC_PDSR; // Pin Data Status Register AT91_REG PIOC_IER; // Interrupt Enable Register AT91_REG PIOC_IDR; // Interrupt Disable Register AT91_REG PIOC_IMR; // Interrupt Mask Register AT91_REG PIOC_ISR; // Interrupt Status Register AT91_REG PIOC_MDER; // Multi-driver Enable Register AT91_REG PIOC_MDDR; // Multi-driver Disable Register AT91_REG PIOC_MDSR; // Multi-driver Status Register AT91_REG Reserved51[1]; // AT91_REG PIOC_PPUDR; // Pull-up Disable Register AT91_REG PIOC_PPUER; // Pull-up Enable Register AT91_REG PIOC_PPUSR; // Pull-up Status Register AT91_REG Reserved52[1]; // AT91_REG PIOC_ABSR; // Peripheral AB Select Register AT91_REG Reserved53[3]; // AT91_REG PIOC_SCIFSR; // System Clock Glitch Input Filter Select Register AT91_REG PIOC_DIFSR; // Debouncing Input Filter Select Register AT91_REG PIOC_IFDGSR; // Glitch or Debouncing Input Filter Clock Selection Status Register AT91_REG PIOC_SCDR; // Slow Clock Divider Debouncing Register AT91_REG Reserved54[4]; // AT91_REG PIOC_OWER; // Output Write Enable Register AT91_REG PIOC_OWDR; // Output Write Disable Register AT91_REG PIOC_OWSR; // Output Write Status Register AT91_REG Reserved55[1]; // AT91_REG PIOC_AIMER; // Additional Interrupt Modes Enable Register AT91_REG PIOC_AIMDR; // Additional Interrupt Modes Disables Register AT91_REG PIOC_AIMMR; // Additional Interrupt Modes Mask Register AT91_REG Reserved56[1]; // AT91_REG PIOC_ESR; // Edge Select Register AT91_REG PIOC_LSR; // Level Select Register AT91_REG PIOC_ELSR; // Edge/Level Status Register AT91_REG Reserved57[1]; // AT91_REG PIOC_FELLSR; // Falling Edge/Low Level Select Register AT91_REG PIOC_REHLSR; // Rising Edge/ High Level Select Register AT91_REG PIOC_FRLHSR; // Fall/Rise - Low/High Status Register AT91_REG Reserved58[1]; // AT91_REG PIOC_LOCKSR; // Lock Status Register AT91_REG Reserved59[6]; // AT91_REG PIOC_VER; // PIO VERSION REGISTER AT91_REG Reserved60[8]; // AT91_REG PIOC_KER; // Keypad Controller Enable Register AT91_REG PIOC_KRCR; // Keypad Controller Row Column Register AT91_REG PIOC_KDR; // Keypad Controller Debouncing Register AT91_REG Reserved61[1]; // AT91_REG PIOC_KIER; // Keypad Controller Interrupt Enable Register AT91_REG PIOC_KIDR; // Keypad Controller Interrupt Disable Register AT91_REG PIOC_KIMR; // Keypad Controller Interrupt Mask Register AT91_REG PIOC_KSR; // Keypad Controller Status Register AT91_REG PIOC_KKPR; // Keypad Controller Key Press Register AT91_REG PIOC_KKRR; // Keypad Controller Key Release Register AT91_REG Reserved62[46]; // AT91_REG RSTC_RCR; // Reset Control Register AT91_REG RSTC_RSR; // Reset Status Register AT91_REG RSTC_RMR; // Reset Mode Register AT91_REG Reserved63[1]; // AT91_REG SUPC_CR; // Supply Controller Control Register AT91_REG SUPC_SMMR; // Supply Controller Supply Monitor Mode Register AT91_REG SUPC_MR; // Supply Controller Mode Register AT91_REG SUPC_WUMR; // Supply Controller Wake Up Mode Register AT91_REG SUPC_WUIR; // Supply Controller Wake Up Inputs Register AT91_REG SUPC_SR; // Supply Controller Status Register AT91_REG Reserved64[2]; // AT91_REG RTTC_RTMR; // Real-time Mode Register AT91_REG RTTC_RTAR; // Real-time Alarm Register AT91_REG RTTC_RTVR; // Real-time Value Register AT91_REG RTTC_RTSR; // Real-time Status Register AT91_REG Reserved65[4]; // AT91_REG WDTC_WDCR; // Watchdog Control Register AT91_REG WDTC_WDMR; // Watchdog Mode Register AT91_REG WDTC_WDSR; // Watchdog Status Register AT91_REG Reserved66[1]; // AT91_REG RTC_CR; // Control Register AT91_REG RTC_MR; // Mode Register AT91_REG RTC_TIMR; // Time Register AT91_REG RTC_CALR; // Calendar Register AT91_REG RTC_TIMALR; // Time Alarm Register AT91_REG RTC_CALALR; // Calendar Alarm Register AT91_REG RTC_SR; // Status Register AT91_REG RTC_SCCR; // Status Clear Command Register AT91_REG RTC_IER; // Interrupt Enable Register AT91_REG RTC_IDR; // Interrupt Disable Register AT91_REG RTC_IMR; // Interrupt Mask Register AT91_REG RTC_VER; // Valid Entry Register AT91_REG SYS_GPBR[8]; // General Purpose Register AT91_REG Reserved67[19]; // AT91_REG RSTC_VER; // Version Register } AT91S_SYS, *AT91PS_SYS; #else #define GPBR (AT91_CAST(AT91_REG *) 0x00001290) // (GPBR) General Purpose Register #endif // -------- GPBR : (SYS Offset: 0x1290) GPBR General Purpose Register -------- #define AT91C_GPBR_GPRV (0x0 << 0) // (SYS) General Purpose Register Value // ***************************************************************************** // SOFTWARE API DEFINITION FOR HSMC4 Chip Select interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_HSMC4_CS { AT91_REG HSMC4_SETUP; // Setup Register AT91_REG HSMC4_PULSE; // Pulse Register AT91_REG HSMC4_CYCLE; // Cycle Register AT91_REG HSMC4_TIMINGS; // Timmings Register AT91_REG HSMC4_MODE; // Mode Register } AT91S_HSMC4_CS, *AT91PS_HSMC4_CS; #else #define HSMC4_SETUP (AT91_CAST(AT91_REG *) 0x00000000) // (HSMC4_SETUP) Setup Register #define HSMC4_PULSE (AT91_CAST(AT91_REG *) 0x00000004) // (HSMC4_PULSE) Pulse Register #define HSMC4_CYCLE (AT91_CAST(AT91_REG *) 0x00000008) // (HSMC4_CYCLE) Cycle Register #define HSMC4_TIMINGS (AT91_CAST(AT91_REG *) 0x0000000C) // (HSMC4_TIMINGS) Timmings Register #define HSMC4_MODE (AT91_CAST(AT91_REG *) 0x00000010) // (HSMC4_MODE) Mode Register #endif // -------- HSMC4_SETUP : (HSMC4_CS Offset: 0x0) HSMC4 SETUP -------- #define AT91C_HSMC4_NWE_SETUP (0x3F << 0) // (HSMC4_CS) NWE Setup length #define AT91C_HSMC4_NCS_WR_SETUP (0x3F << 8) // (HSMC4_CS) NCS Setup length in Write access #define AT91C_HSMC4_NRD_SETUP (0x3F << 16) // (HSMC4_CS) NRD Setup length #define AT91C_HSMC4_NCS_RD_SETUP (0x3F << 24) // (HSMC4_CS) NCS Setup legnth in Read access // -------- HSMC4_PULSE : (HSMC4_CS Offset: 0x4) HSMC4 PULSE -------- #define AT91C_HSMC4_NWE_PULSE (0x3F << 0) // (HSMC4_CS) NWE Pulse Length #define AT91C_HSMC4_NCS_WR_PULSE (0x3F << 8) // (HSMC4_CS) NCS Pulse length in WRITE access #define AT91C_HSMC4_NRD_PULSE (0x3F << 16) // (HSMC4_CS) NRD Pulse length #define AT91C_HSMC4_NCS_RD_PULSE (0x3F << 24) // (HSMC4_CS) NCS Pulse length in READ access // -------- HSMC4_CYCLE : (HSMC4_CS Offset: 0x8) HSMC4 CYCLE -------- #define AT91C_HSMC4_NWE_CYCLE (0x1FF << 0) // (HSMC4_CS) Total Write Cycle Length #define AT91C_HSMC4_NRD_CYCLE (0x1FF << 16) // (HSMC4_CS) Total Read Cycle Length // -------- HSMC4_TIMINGS : (HSMC4_CS Offset: 0xc) HSMC4 TIMINGS -------- #define AT91C_HSMC4_TCLR (0xF << 0) // (HSMC4_CS) CLE to REN low delay #define AT91C_HSMC4_TADL (0xF << 4) // (HSMC4_CS) ALE to data start #define AT91C_HSMC4_TAR (0xF << 8) // (HSMC4_CS) ALE to REN low delay #define AT91C_HSMC4_OCMSEN (0x1 << 12) // (HSMC4_CS) Off Chip Memory Scrambling Enable #define AT91C_HSMC4_TRR (0xF << 16) // (HSMC4_CS) Ready to REN low delay #define AT91C_HSMC4_TWB (0xF << 24) // (HSMC4_CS) WEN high to REN to busy #define AT91C_HSMC4_RBNSEL (0x7 << 28) // (HSMC4_CS) Ready/Busy Line Selection #define AT91C_HSMC4_NFSEL (0x1 << 31) // (HSMC4_CS) Nand Flash Selection // -------- HSMC4_MODE : (HSMC4_CS Offset: 0x10) HSMC4 MODE -------- #define AT91C_HSMC4_READ_MODE (0x1 << 0) // (HSMC4_CS) Read Mode #define AT91C_HSMC4_WRITE_MODE (0x1 << 1) // (HSMC4_CS) Write Mode #define AT91C_HSMC4_EXNW_MODE (0x3 << 4) // (HSMC4_CS) NWAIT Mode #define AT91C_HSMC4_EXNW_MODE_NWAIT_DISABLE (0x0 << 4) // (HSMC4_CS) External NWAIT disabled. #define AT91C_HSMC4_EXNW_MODE_NWAIT_ENABLE_FROZEN (0x2 << 4) // (HSMC4_CS) External NWAIT enabled in frozen mode. #define AT91C_HSMC4_EXNW_MODE_NWAIT_ENABLE_READY (0x3 << 4) // (HSMC4_CS) External NWAIT enabled in ready mode. #define AT91C_HSMC4_BAT (0x1 << 8) // (HSMC4_CS) Byte Access Type #define AT91C_HSMC4_BAT_BYTE_SELECT (0x0 << 8) // (HSMC4_CS) Write controled by ncs, nbs0, nbs1, nbs2, nbs3. Read controled by ncs, nrd, nbs0, nbs1, nbs2, nbs3. #define AT91C_HSMC4_BAT_BYTE_WRITE (0x1 << 8) // (HSMC4_CS) Write controled by ncs, nwe0, nwe1, nwe2, nwe3. Read controled by ncs and nrd. #define AT91C_HSMC4_DBW (0x3 << 12) // (HSMC4_CS) Data Bus Width #define AT91C_HSMC4_DBW_WIDTH_EIGTH_BITS (0x0 << 12) // (HSMC4_CS) 8 bits. #define AT91C_HSMC4_DBW_WIDTH_SIXTEEN_BITS (0x1 << 12) // (HSMC4_CS) 16 bits. #define AT91C_HSMC4_DBW_WIDTH_THIRTY_TWO_BITS (0x2 << 12) // (HSMC4_CS) 32 bits. #define AT91C_HSMC4_TDF_CYCLES (0xF << 16) // (HSMC4_CS) Data Float Time. #define AT91C_HSMC4_TDF_MODE (0x1 << 20) // (HSMC4_CS) TDF Enabled. #define AT91C_HSMC4_PMEN (0x1 << 24) // (HSMC4_CS) Page Mode Enabled. #define AT91C_HSMC4_PS (0x3 << 28) // (HSMC4_CS) Page Size #define AT91C_HSMC4_PS_SIZE_FOUR_BYTES (0x0 << 28) // (HSMC4_CS) 4 bytes. #define AT91C_HSMC4_PS_SIZE_EIGHT_BYTES (0x1 << 28) // (HSMC4_CS) 8 bytes. #define AT91C_HSMC4_PS_SIZE_SIXTEEN_BYTES (0x2 << 28) // (HSMC4_CS) 16 bytes. #define AT91C_HSMC4_PS_SIZE_THIRTY_TWO_BYTES (0x3 << 28) // (HSMC4_CS) 32 bytes. // ***************************************************************************** // SOFTWARE API DEFINITION FOR AHB Static Memory Controller 4 Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_HSMC4 { AT91_REG HSMC4_CFG; // Configuration Register AT91_REG HSMC4_CTRL; // Control Register AT91_REG HSMC4_SR; // Status Register AT91_REG HSMC4_IER; // Interrupt Enable Register AT91_REG HSMC4_IDR; // Interrupt Disable Register AT91_REG HSMC4_IMR; // Interrupt Mask Register AT91_REG HSMC4_ADDR; // Address Cycle Zero Register AT91_REG HSMC4_BANK; // Bank Register AT91_REG HSMC4_ECCCR; // ECC reset register AT91_REG HSMC4_ECCCMD; // ECC Page size register AT91_REG HSMC4_ECCSR1; // ECC Status register 1 AT91_REG HSMC4_ECCPR0; // ECC Parity register 0 AT91_REG HSMC4_ECCPR1; // ECC Parity register 1 AT91_REG HSMC4_ECCSR2; // ECC Status register 2 AT91_REG HSMC4_ECCPR2; // ECC Parity register 2 AT91_REG HSMC4_ECCPR3; // ECC Parity register 3 AT91_REG HSMC4_ECCPR4; // ECC Parity register 4 AT91_REG HSMC4_ECCPR5; // ECC Parity register 5 AT91_REG HSMC4_ECCPR6; // ECC Parity register 6 AT91_REG HSMC4_ECCPR7; // ECC Parity register 7 AT91_REG HSMC4_ECCPR8; // ECC Parity register 8 AT91_REG HSMC4_ECCPR9; // ECC Parity register 9 AT91_REG HSMC4_ECCPR10; // ECC Parity register 10 AT91_REG HSMC4_ECCPR11; // ECC Parity register 11 AT91_REG HSMC4_ECCPR12; // ECC Parity register 12 AT91_REG HSMC4_ECCPR13; // ECC Parity register 13 AT91_REG HSMC4_ECCPR14; // ECC Parity register 14 AT91_REG HSMC4_Eccpr15; // ECC Parity register 15 AT91_REG Reserved0[40]; // AT91_REG HSMC4_OCMS; // OCMS MODE register AT91_REG HSMC4_KEY1; // KEY1 Register AT91_REG HSMC4_KEY2; // KEY2 Register AT91_REG Reserved1[50]; // AT91_REG HSMC4_WPCR; // Write Protection Control register AT91_REG HSMC4_WPSR; // Write Protection Status Register AT91_REG HSMC4_ADDRSIZE; // Write Protection Status Register AT91_REG HSMC4_IPNAME1; // Write Protection Status Register AT91_REG HSMC4_IPNAME2; // Write Protection Status Register AT91_REG HSMC4_FEATURES; // Write Protection Status Register AT91_REG HSMC4_VER; // HSMC4 Version Register AT91_REG HSMC4_DUMMY; // This rtegister was created only ti have AHB constants } AT91S_HSMC4, *AT91PS_HSMC4; #else #define HSMC4_CFG (AT91_CAST(AT91_REG *) 0x00000000) // (HSMC4_CFG) Configuration Register #define HSMC4_CTRL (AT91_CAST(AT91_REG *) 0x00000004) // (HSMC4_CTRL) Control Register #define HSMC4_SR (AT91_CAST(AT91_REG *) 0x00000008) // (HSMC4_SR) Status Register #define HSMC4_IER (AT91_CAST(AT91_REG *) 0x0000000C) // (HSMC4_IER) Interrupt Enable Register #define HSMC4_IDR (AT91_CAST(AT91_REG *) 0x00000010) // (HSMC4_IDR) Interrupt Disable Register #define HSMC4_IMR (AT91_CAST(AT91_REG *) 0x00000014) // (HSMC4_IMR) Interrupt Mask Register #define HSMC4_ADDR (AT91_CAST(AT91_REG *) 0x00000018) // (HSMC4_ADDR) Address Cycle Zero Register #define HSMC4_BANK (AT91_CAST(AT91_REG *) 0x0000001C) // (HSMC4_BANK) Bank Register #define HSMC4_ECCCR (AT91_CAST(AT91_REG *) 0x00000020) // (HSMC4_ECCCR) ECC reset register #define HSMC4_ECCCMD (AT91_CAST(AT91_REG *) 0x00000024) // (HSMC4_ECCCMD) ECC Page size register #define HSMC4_ECCSR1 (AT91_CAST(AT91_REG *) 0x00000028) // (HSMC4_ECCSR1) ECC Status register 1 #define HSMC4_ECCPR0 (AT91_CAST(AT91_REG *) 0x0000002C) // (HSMC4_ECCPR0) ECC Parity register 0 #define HSMC4_ECCPR1 (AT91_CAST(AT91_REG *) 0x00000030) // (HSMC4_ECCPR1) ECC Parity register 1 #define HSMC4_ECCSR2 (AT91_CAST(AT91_REG *) 0x00000034) // (HSMC4_ECCSR2) ECC Status register 2 #define HSMC4_ECCPR2 (AT91_CAST(AT91_REG *) 0x00000038) // (HSMC4_ECCPR2) ECC Parity register 2 #define HSMC4_ECCPR3 (AT91_CAST(AT91_REG *) 0x0000003C) // (HSMC4_ECCPR3) ECC Parity register 3 #define HSMC4_ECCPR4 (AT91_CAST(AT91_REG *) 0x00000040) // (HSMC4_ECCPR4) ECC Parity register 4 #define HSMC4_ECCPR5 (AT91_CAST(AT91_REG *) 0x00000044) // (HSMC4_ECCPR5) ECC Parity register 5 #define HSMC4_ECCPR6 (AT91_CAST(AT91_REG *) 0x00000048) // (HSMC4_ECCPR6) ECC Parity register 6 #define HSMC4_ECCPR7 (AT91_CAST(AT91_REG *) 0x0000004C) // (HSMC4_ECCPR7) ECC Parity register 7 #define HSMC4_ECCPR8 (AT91_CAST(AT91_REG *) 0x00000050) // (HSMC4_ECCPR8) ECC Parity register 8 #define HSMC4_ECCPR9 (AT91_CAST(AT91_REG *) 0x00000054) // (HSMC4_ECCPR9) ECC Parity register 9 #define HSMC4_ECCPR10 (AT91_CAST(AT91_REG *) 0x00000058) // (HSMC4_ECCPR10) ECC Parity register 10 #define HSMC4_ECCPR11 (AT91_CAST(AT91_REG *) 0x0000005C) // (HSMC4_ECCPR11) ECC Parity register 11 #define HSMC4_ECCPR12 (AT91_CAST(AT91_REG *) 0x00000060) // (HSMC4_ECCPR12) ECC Parity register 12 #define HSMC4_ECCPR13 (AT91_CAST(AT91_REG *) 0x00000064) // (HSMC4_ECCPR13) ECC Parity register 13 #define HSMC4_ECCPR14 (AT91_CAST(AT91_REG *) 0x00000068) // (HSMC4_ECCPR14) ECC Parity register 14 #define Hsmc4_Eccpr15 (AT91_CAST(AT91_REG *) 0x0000006C) // (Hsmc4_Eccpr15) ECC Parity register 15 #define HSMC4_OCMS (AT91_CAST(AT91_REG *) 0x00000110) // (HSMC4_OCMS) OCMS MODE register #define HSMC4_KEY1 (AT91_CAST(AT91_REG *) 0x00000114) // (HSMC4_KEY1) KEY1 Register #define HSMC4_KEY2 (AT91_CAST(AT91_REG *) 0x00000118) // (HSMC4_KEY2) KEY2 Register #define HSMC4_WPCR (AT91_CAST(AT91_REG *) 0x000001E4) // (HSMC4_WPCR) Write Protection Control register #define HSMC4_WPSR (AT91_CAST(AT91_REG *) 0x000001E8) // (HSMC4_WPSR) Write Protection Status Register #define HSMC4_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000001EC) // (HSMC4_ADDRSIZE) Write Protection Status Register #define HSMC4_IPNAME1 (AT91_CAST(AT91_REG *) 0x000001F0) // (HSMC4_IPNAME1) Write Protection Status Register #define HSMC4_IPNAME2 (AT91_CAST(AT91_REG *) 0x000001F4) // (HSMC4_IPNAME2) Write Protection Status Register #define HSMC4_FEATURES (AT91_CAST(AT91_REG *) 0x000001F8) // (HSMC4_FEATURES) Write Protection Status Register #define HSMC4_VER (AT91_CAST(AT91_REG *) 0x000001FC) // (HSMC4_VER) HSMC4 Version Register #define HSMC4_DUMMY (AT91_CAST(AT91_REG *) 0x00000200) // (HSMC4_DUMMY) This rtegister was created only ti have AHB constants #endif // -------- HSMC4_CFG : (HSMC4 Offset: 0x0) Configuration Register -------- #define AT91C_HSMC4_PAGESIZE (0x3 << 0) // (HSMC4) PAGESIZE field description #define AT91C_HSMC4_PAGESIZE_528_Bytes (0x0) // (HSMC4) 512 bytes plus 16 bytes page size #define AT91C_HSMC4_PAGESIZE_1056_Bytes (0x1) // (HSMC4) 1024 bytes plus 32 bytes page size #define AT91C_HSMC4_PAGESIZE_2112_Bytes (0x2) // (HSMC4) 2048 bytes plus 64 bytes page size #define AT91C_HSMC4_PAGESIZE_4224_Bytes (0x3) // (HSMC4) 4096 bytes plus 128 bytes page size #define AT91C_HSMC4_WSPARE (0x1 << 8) // (HSMC4) Spare area access in Write Mode #define AT91C_HSMC4_RSPARE (0x1 << 9) // (HSMC4) Spare area access in Read Mode #define AT91C_HSMC4_EDGECTRL (0x1 << 12) // (HSMC4) Rising/Falling Edge Detection Control #define AT91C_HSMC4_RBEDGE (0x1 << 13) // (HSMC4) Ready/Busy Signal edge Detection #define AT91C_HSMC4_DTOCYC (0xF << 16) // (HSMC4) Data Timeout Cycle Number #define AT91C_HSMC4_DTOMUL (0x7 << 20) // (HSMC4) Data Timeout Multiplier #define AT91C_HSMC4_DTOMUL_1 (0x0 << 20) // (HSMC4) DTOCYC x 1 #define AT91C_HSMC4_DTOMUL_16 (0x1 << 20) // (HSMC4) DTOCYC x 16 #define AT91C_HSMC4_DTOMUL_128 (0x2 << 20) // (HSMC4) DTOCYC x 128 #define AT91C_HSMC4_DTOMUL_256 (0x3 << 20) // (HSMC4) DTOCYC x 256 #define AT91C_HSMC4_DTOMUL_1024 (0x4 << 20) // (HSMC4) DTOCYC x 1024 #define AT91C_HSMC4_DTOMUL_4096 (0x5 << 20) // (HSMC4) DTOCYC x 4096 #define AT91C_HSMC4_DTOMUL_65536 (0x6 << 20) // (HSMC4) DTOCYC x 65536 #define AT91C_HSMC4_DTOMUL_1048576 (0x7 << 20) // (HSMC4) DTOCYC x 1048576 // -------- HSMC4_CTRL : (HSMC4 Offset: 0x4) Control Register -------- #define AT91C_HSMC4_NFCEN (0x1 << 0) // (HSMC4) Nand Flash Controller Host Enable #define AT91C_HSMC4_NFCDIS (0x1 << 1) // (HSMC4) Nand Flash Controller Host Disable #define AT91C_HSMC4_HOSTEN (0x1 << 8) // (HSMC4) If set to one, the Host controller is activated and perform a data transfer phase. #define AT91C_HSMC4_HOSTWR (0x1 << 11) // (HSMC4) If this field is set to one, the host transfers data from the internal SRAM to the Memory Device. #define AT91C_HSMC4_HOSTCSID (0x7 << 12) // (HSMC4) Host Controller Chip select Id #define AT91C_HSMC4_HOSTCSID_0 (0x0 << 12) // (HSMC4) CS0 #define AT91C_HSMC4_HOSTCSID_1 (0x1 << 12) // (HSMC4) CS1 #define AT91C_HSMC4_HOSTCSID_2 (0x2 << 12) // (HSMC4) CS2 #define AT91C_HSMC4_HOSTCSID_3 (0x3 << 12) // (HSMC4) CS3 #define AT91C_HSMC4_HOSTCSID_4 (0x4 << 12) // (HSMC4) CS4 #define AT91C_HSMC4_HOSTCSID_5 (0x5 << 12) // (HSMC4) CS5 #define AT91C_HSMC4_HOSTCSID_6 (0x6 << 12) // (HSMC4) CS6 #define AT91C_HSMC4_HOSTCSID_7 (0x7 << 12) // (HSMC4) CS7 #define AT91C_HSMC4_VALID (0x1 << 15) // (HSMC4) When set to 1, a write operation modifies both HOSTCSID and HOSTWR fields. // -------- HSMC4_SR : (HSMC4 Offset: 0x8) HSMC4 Status Register -------- #define AT91C_HSMC4_NFCSTS (0x1 << 0) // (HSMC4) Nand Flash Controller status #define AT91C_HSMC4_RBRISE (0x1 << 4) // (HSMC4) Selected Ready Busy Rising Edge Detected flag #define AT91C_HSMC4_RBFALL (0x1 << 5) // (HSMC4) Selected Ready Busy Falling Edge Detected flag #define AT91C_HSMC4_HOSTBUSY (0x1 << 8) // (HSMC4) Host Busy #define AT91C_HSMC4_HOSTW (0x1 << 11) // (HSMC4) Host Write/Read Operation #define AT91C_HSMC4_HOSTCS (0x7 << 12) // (HSMC4) Host Controller Chip select Id #define AT91C_HSMC4_HOSTCS_0 (0x0 << 12) // (HSMC4) CS0 #define AT91C_HSMC4_HOSTCS_1 (0x1 << 12) // (HSMC4) CS1 #define AT91C_HSMC4_HOSTCS_2 (0x2 << 12) // (HSMC4) CS2 #define AT91C_HSMC4_HOSTCS_3 (0x3 << 12) // (HSMC4) CS3 #define AT91C_HSMC4_HOSTCS_4 (0x4 << 12) // (HSMC4) CS4 #define AT91C_HSMC4_HOSTCS_5 (0x5 << 12) // (HSMC4) CS5 #define AT91C_HSMC4_HOSTCS_6 (0x6 << 12) // (HSMC4) CS6 #define AT91C_HSMC4_HOSTCS_7 (0x7 << 12) // (HSMC4) CS7 #define AT91C_HSMC4_XFRDONE (0x1 << 16) // (HSMC4) Host Data Transfer Terminated #define AT91C_HSMC4_CMDDONE (0x1 << 17) // (HSMC4) Command Done #define AT91C_HSMC4_ECCRDY (0x1 << 18) // (HSMC4) ECC ready #define AT91C_HSMC4_DTOE (0x1 << 20) // (HSMC4) Data timeout Error #define AT91C_HSMC4_UNDEF (0x1 << 21) // (HSMC4) Undefined Area Error #define AT91C_HSMC4_AWB (0x1 << 22) // (HSMC4) Accessing While Busy Error #define AT91C_HSMC4_HASE (0x1 << 23) // (HSMC4) Host Controller Access Size Error #define AT91C_HSMC4_RBEDGE0 (0x1 << 24) // (HSMC4) Ready Busy line 0 Edge detected #define AT91C_HSMC4_RBEDGE1 (0x1 << 25) // (HSMC4) Ready Busy line 1 Edge detected #define AT91C_HSMC4_RBEDGE2 (0x1 << 26) // (HSMC4) Ready Busy line 2 Edge detected #define AT91C_HSMC4_RBEDGE3 (0x1 << 27) // (HSMC4) Ready Busy line 3 Edge detected #define AT91C_HSMC4_RBEDGE4 (0x1 << 28) // (HSMC4) Ready Busy line 4 Edge detected #define AT91C_HSMC4_RBEDGE5 (0x1 << 29) // (HSMC4) Ready Busy line 5 Edge detected #define AT91C_HSMC4_RBEDGE6 (0x1 << 30) // (HSMC4) Ready Busy line 6 Edge detected #define AT91C_HSMC4_RBEDGE7 (0x1 << 31) // (HSMC4) Ready Busy line 7 Edge detected // -------- HSMC4_IER : (HSMC4 Offset: 0xc) HSMC4 Interrupt Enable Register -------- // -------- HSMC4_IDR : (HSMC4 Offset: 0x10) HSMC4 Interrupt Disable Register -------- // -------- HSMC4_IMR : (HSMC4 Offset: 0x14) HSMC4 Interrupt Mask Register -------- // -------- HSMC4_ADDR : (HSMC4 Offset: 0x18) Address Cycle Zero Register -------- #define AT91C_HSMC4_ADDRCYCLE0 (0xFF << 0) // (HSMC4) Nand Flash Array Address cycle 0 // -------- HSMC4_BANK : (HSMC4 Offset: 0x1c) Bank Register -------- #define AT91C_BANK (0x7 << 0) // (HSMC4) Bank identifier #define AT91C_BANK_0 (0x0) // (HSMC4) BANK0 #define AT91C_BANK_1 (0x1) // (HSMC4) BANK1 #define AT91C_BANK_2 (0x2) // (HSMC4) BANK2 #define AT91C_BANK_3 (0x3) // (HSMC4) BANK3 #define AT91C_BANK_4 (0x4) // (HSMC4) BANK4 #define AT91C_BANK_5 (0x5) // (HSMC4) BANK5 #define AT91C_BANK_6 (0x6) // (HSMC4) BANK6 #define AT91C_BANK_7 (0x7) // (HSMC4) BANK7 // -------- HSMC4_ECCCR : (HSMC4 Offset: 0x20) ECC Control Register -------- #define AT91C_HSMC4_ECCRESET (0x1 << 0) // (HSMC4) Reset ECC // -------- HSMC4_ECCCMD : (HSMC4 Offset: 0x24) ECC mode register -------- #define AT91C_ECC_PAGE_SIZE (0x3 << 0) // (HSMC4) Nand Flash page size #define AT91C_ECC_TYPCORRECT (0x3 << 4) // (HSMC4) Nand Flash page size #define AT91C_ECC_TYPCORRECT_ONE_PER_PAGE (0x0 << 4) // (HSMC4) #define AT91C_ECC_TYPCORRECT_ONE_EVERY_256_BYTES (0x1 << 4) // (HSMC4) #define AT91C_ECC_TYPCORRECT_ONE_EVERY_512_BYTES (0x2 << 4) // (HSMC4) // -------- HSMC4_ECCSR1 : (HSMC4 Offset: 0x28) ECC Status Register 1 -------- #define AT91C_HSMC4_ECC_RECERR0 (0x1 << 0) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR0 (0x1 << 1) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR0 (0x1 << 2) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR1 (0x1 << 4) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR1 (0x1 << 5) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR1 (0x1 << 6) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR2 (0x1 << 8) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR2 (0x1 << 9) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR2 (0x1 << 10) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR3 (0x1 << 12) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR3 (0x1 << 13) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR3 (0x1 << 14) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR4 (0x1 << 16) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR4 (0x1 << 17) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR4 (0x1 << 18) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR5 (0x1 << 20) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR5 (0x1 << 21) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR5 (0x1 << 22) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR6 (0x1 << 24) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR6 (0x1 << 25) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR6 (0x1 << 26) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR7 (0x1 << 28) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR7 (0x1 << 29) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR7 (0x1 << 30) // (HSMC4) Multiple Error // -------- HSMC4_ECCPR0 : (HSMC4 Offset: 0x2c) HSMC4 ECC parity Register 0 -------- #define AT91C_HSMC4_ECC_BITADDR (0x7 << 0) // (HSMC4) Corrupted Bit Address in the page #define AT91C_HSMC4_ECC_WORDADDR (0xFF << 3) // (HSMC4) Corrupted Word Address in the page #define AT91C_HSMC4_ECC_NPARITY (0x7FF << 12) // (HSMC4) Parity N // -------- HSMC4_ECCPR1 : (HSMC4 Offset: 0x30) HSMC4 ECC parity Register 1 -------- // -------- HSMC4_ECCSR2 : (HSMC4 Offset: 0x34) ECC Status Register 2 -------- #define AT91C_HSMC4_ECC_RECERR8 (0x1 << 0) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR8 (0x1 << 1) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR8 (0x1 << 2) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR9 (0x1 << 4) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR9 (0x1 << 5) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR9 (0x1 << 6) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR10 (0x1 << 8) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR10 (0x1 << 9) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR10 (0x1 << 10) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR11 (0x1 << 12) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR11 (0x1 << 13) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR11 (0x1 << 14) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR12 (0x1 << 16) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR12 (0x1 << 17) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR12 (0x1 << 18) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR13 (0x1 << 20) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR13 (0x1 << 21) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR13 (0x1 << 22) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR14 (0x1 << 24) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR14 (0x1 << 25) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR14 (0x1 << 26) // (HSMC4) Multiple Error #define AT91C_HSMC4_ECC_RECERR15 (0x1 << 28) // (HSMC4) Recoverable Error #define AT91C_HSMC4_ECC_ECCERR15 (0x1 << 29) // (HSMC4) ECC Error #define AT91C_HSMC4_ECC_MULERR15 (0x1 << 30) // (HSMC4) Multiple Error // -------- HSMC4_ECCPR2 : (HSMC4 Offset: 0x38) HSMC4 ECC parity Register 2 -------- // -------- HSMC4_ECCPR3 : (HSMC4 Offset: 0x3c) HSMC4 ECC parity Register 3 -------- // -------- HSMC4_ECCPR4 : (HSMC4 Offset: 0x40) HSMC4 ECC parity Register 4 -------- // -------- HSMC4_ECCPR5 : (HSMC4 Offset: 0x44) HSMC4 ECC parity Register 5 -------- // -------- HSMC4_ECCPR6 : (HSMC4 Offset: 0x48) HSMC4 ECC parity Register 6 -------- // -------- HSMC4_ECCPR7 : (HSMC4 Offset: 0x4c) HSMC4 ECC parity Register 7 -------- // -------- HSMC4_ECCPR8 : (HSMC4 Offset: 0x50) HSMC4 ECC parity Register 8 -------- // -------- HSMC4_ECCPR9 : (HSMC4 Offset: 0x54) HSMC4 ECC parity Register 9 -------- // -------- HSMC4_ECCPR10 : (HSMC4 Offset: 0x58) HSMC4 ECC parity Register 10 -------- // -------- HSMC4_ECCPR11 : (HSMC4 Offset: 0x5c) HSMC4 ECC parity Register 11 -------- // -------- HSMC4_ECCPR12 : (HSMC4 Offset: 0x60) HSMC4 ECC parity Register 12 -------- // -------- HSMC4_ECCPR13 : (HSMC4 Offset: 0x64) HSMC4 ECC parity Register 13 -------- // -------- HSMC4_ECCPR14 : (HSMC4 Offset: 0x68) HSMC4 ECC parity Register 14 -------- // -------- HSMC4_ECCPR15 : (HSMC4 Offset: 0x6c) HSMC4 ECC parity Register 15 -------- // -------- HSMC4_OCMS : (HSMC4 Offset: 0x110) HSMC4 OCMS Register -------- #define AT91C_HSMC4_OCMS_SRSE (0x1 << 0) // (HSMC4) Static Memory Controller Scrambling Enable #define AT91C_HSMC4_OCMS_SMSE (0x1 << 1) // (HSMC4) SRAM Scramling Enable // -------- HSMC4_KEY1 : (HSMC4 Offset: 0x114) HSMC4 OCMS KEY1 Register -------- #define AT91C_HSMC4_OCMS_KEY1 (0x0 << 0) // (HSMC4) OCMS Key 2 // -------- HSMC4_OCMS_KEY2 : (HSMC4 Offset: 0x118) HSMC4 OCMS KEY2 Register -------- #define AT91C_HSMC4_OCMS_KEY2 (0x0 << 0) // (HSMC4) OCMS Key 2 // -------- HSMC4_WPCR : (HSMC4 Offset: 0x1e4) HSMC4 Witre Protection Control Register -------- #define AT91C_HSMC4_WP_EN (0x1 << 0) // (HSMC4) Write Protection Enable #define AT91C_HSMC4_WP_KEY (0xFFFFFF << 8) // (HSMC4) Protection Password // -------- HSMC4_WPSR : (HSMC4 Offset: 0x1e8) HSMC4 WPSR Register -------- #define AT91C_HSMC4_WP_VS (0xF << 0) // (HSMC4) Write Protection Violation Status #define AT91C_HSMC4_WP_VS_WP_VS0 (0x0) // (HSMC4) No write protection violation since the last read of this register #define AT91C_HSMC4_WP_VS_WP_VS1 (0x1) // (HSMC4) write protection detected unauthorized attempt to write a control register had occured (since the last read) #define AT91C_HSMC4_WP_VS_WP_VS2 (0x2) // (HSMC4) Software reset had been performed while write protection was enabled (since the last read) #define AT91C_HSMC4_WP_VS_WP_VS3 (0x3) // (HSMC4) Both write protection violation and software reset with write protection enabled had occured since the last read #define AT91C_ (0x0 << 8) // (HSMC4) // -------- HSMC4_VER : (HSMC4 Offset: 0x1fc) HSMC4 VERSION Register -------- // -------- HSMC4_DUMMY : (HSMC4 Offset: 0x200) HSMC4 DUMMY REGISTER -------- #define AT91C_HSMC4_CMD1 (0xFF << 2) // (HSMC4) Command Register Value for Cycle 1 #define AT91C_HSMC4_CMD2 (0xFF << 10) // (HSMC4) Command Register Value for Cycle 2 #define AT91C_HSMC4_VCMD2 (0x1 << 18) // (HSMC4) Valid Cycle 2 Command #define AT91C_HSMC4_ACYCLE (0x7 << 19) // (HSMC4) Number of Address required for the current command #define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_NONE (0x0 << 19) // (HSMC4) No address cycle #define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_ONE (0x1 << 19) // (HSMC4) One address cycle #define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_TWO (0x2 << 19) // (HSMC4) Two address cycles #define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_THREE (0x3 << 19) // (HSMC4) Three address cycles #define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_FOUR (0x4 << 19) // (HSMC4) Four address cycles #define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_FIVE (0x5 << 19) // (HSMC4) Five address cycles #define AT91C_HSMC4_CSID (0x7 << 22) // (HSMC4) Chip Select Identifier #define AT91C_HSMC4_CSID_0 (0x0 << 22) // (HSMC4) CS0 #define AT91C_HSMC4_CSID_1 (0x1 << 22) // (HSMC4) CS1 #define AT91C_HSMC4_CSID_2 (0x2 << 22) // (HSMC4) CS2 #define AT91C_HSMC4_CSID_3 (0x3 << 22) // (HSMC4) CS3 #define AT91C_HSMC4_CSID_4 (0x4 << 22) // (HSMC4) CS4 #define AT91C_HSMC4_CSID_5 (0x5 << 22) // (HSMC4) CS5 #define AT91C_HSMC4_CSID_6 (0x6 << 22) // (HSMC4) CS6 #define AT91C_HSMC4_CSID_7 (0x7 << 22) // (HSMC4) CS7 #define AT91C_HSMC4_HOST_EN (0x1 << 25) // (HSMC4) Host Main Controller Enable #define AT91C_HSMC4_HOST_WR (0x1 << 26) // (HSMC4) HOSTWR : Host Main Controller Write Enable #define AT91C_HSMC4_HOSTCMD (0x1 << 27) // (HSMC4) Host Command Enable // ***************************************************************************** // SOFTWARE API DEFINITION FOR AHB Matrix2 Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_HMATRIX2 { AT91_REG HMATRIX2_MCFG0; // Master Configuration Register 0 : ARM I and D AT91_REG HMATRIX2_MCFG1; // Master Configuration Register 1 : ARM S AT91_REG HMATRIX2_MCFG2; // Master Configuration Register 2 AT91_REG HMATRIX2_MCFG3; // Master Configuration Register 3 AT91_REG HMATRIX2_MCFG4; // Master Configuration Register 4 AT91_REG HMATRIX2_MCFG5; // Master Configuration Register 5 AT91_REG HMATRIX2_MCFG6; // Master Configuration Register 6 AT91_REG HMATRIX2_MCFG7; // Master Configuration Register 7 AT91_REG Reserved0[8]; // AT91_REG HMATRIX2_SCFG0; // Slave Configuration Register 0 AT91_REG HMATRIX2_SCFG1; // Slave Configuration Register 1 AT91_REG HMATRIX2_SCFG2; // Slave Configuration Register 2 AT91_REG HMATRIX2_SCFG3; // Slave Configuration Register 3 AT91_REG HMATRIX2_SCFG4; // Slave Configuration Register 4 AT91_REG HMATRIX2_SCFG5; // Slave Configuration Register 5 AT91_REG HMATRIX2_SCFG6; // Slave Configuration Register 6 AT91_REG HMATRIX2_SCFG7; // Slave Configuration Register 5 AT91_REG HMATRIX2_SCFG8; // Slave Configuration Register 8 AT91_REG HMATRIX2_SCFG9; // Slave Configuration Register 9 AT91_REG Reserved1[42]; // AT91_REG HMATRIX2_SFR0 ; // Special Function Register 0 AT91_REG HMATRIX2_SFR1 ; // Special Function Register 1 AT91_REG HMATRIX2_SFR2 ; // Special Function Register 2 AT91_REG HMATRIX2_SFR3 ; // Special Function Register 3 AT91_REG HMATRIX2_SFR4 ; // Special Function Register 4 AT91_REG HMATRIX2_SFR5 ; // Special Function Register 5 AT91_REG HMATRIX2_SFR6 ; // Special Function Register 6 AT91_REG HMATRIX2_SFR7 ; // Special Function Register 7 AT91_REG HMATRIX2_SFR8 ; // Special Function Register 8 AT91_REG HMATRIX2_SFR9 ; // Special Function Register 9 AT91_REG HMATRIX2_SFR10; // Special Function Register 10 AT91_REG HMATRIX2_SFR11; // Special Function Register 11 AT91_REG HMATRIX2_SFR12; // Special Function Register 12 AT91_REG HMATRIX2_SFR13; // Special Function Register 13 AT91_REG HMATRIX2_SFR14; // Special Function Register 14 AT91_REG HMATRIX2_SFR15; // Special Function Register 15 AT91_REG Reserved2[39]; // AT91_REG HMATRIX2_ADDRSIZE; // HMATRIX2 ADDRSIZE REGISTER AT91_REG HMATRIX2_IPNAME1; // HMATRIX2 IPNAME1 REGISTER AT91_REG HMATRIX2_IPNAME2; // HMATRIX2 IPNAME2 REGISTER AT91_REG HMATRIX2_FEATURES; // HMATRIX2 FEATURES REGISTER AT91_REG HMATRIX2_VER; // HMATRIX2 VERSION REGISTER } AT91S_HMATRIX2, *AT91PS_HMATRIX2; #else #define MATRIX_MCFG0 (AT91_CAST(AT91_REG *) 0x00000000) // (MATRIX_MCFG0) Master Configuration Register 0 : ARM I and D #define MATRIX_MCFG1 (AT91_CAST(AT91_REG *) 0x00000004) // (MATRIX_MCFG1) Master Configuration Register 1 : ARM S #define MATRIX_MCFG2 (AT91_CAST(AT91_REG *) 0x00000008) // (MATRIX_MCFG2) Master Configuration Register 2 #define MATRIX_MCFG3 (AT91_CAST(AT91_REG *) 0x0000000C) // (MATRIX_MCFG3) Master Configuration Register 3 #define MATRIX_MCFG4 (AT91_CAST(AT91_REG *) 0x00000010) // (MATRIX_MCFG4) Master Configuration Register 4 #define MATRIX_MCFG5 (AT91_CAST(AT91_REG *) 0x00000014) // (MATRIX_MCFG5) Master Configuration Register 5 #define MATRIX_MCFG6 (AT91_CAST(AT91_REG *) 0x00000018) // (MATRIX_MCFG6) Master Configuration Register 6 #define MATRIX_MCFG7 (AT91_CAST(AT91_REG *) 0x0000001C) // (MATRIX_MCFG7) Master Configuration Register 7 #define MATRIX_SCFG0 (AT91_CAST(AT91_REG *) 0x00000040) // (MATRIX_SCFG0) Slave Configuration Register 0 #define MATRIX_SCFG1 (AT91_CAST(AT91_REG *) 0x00000044) // (MATRIX_SCFG1) Slave Configuration Register 1 #define MATRIX_SCFG2 (AT91_CAST(AT91_REG *) 0x00000048) // (MATRIX_SCFG2) Slave Configuration Register 2 #define MATRIX_SCFG3 (AT91_CAST(AT91_REG *) 0x0000004C) // (MATRIX_SCFG3) Slave Configuration Register 3 #define MATRIX_SCFG4 (AT91_CAST(AT91_REG *) 0x00000050) // (MATRIX_SCFG4) Slave Configuration Register 4 #define MATRIX_SCFG5 (AT91_CAST(AT91_REG *) 0x00000054) // (MATRIX_SCFG5) Slave Configuration Register 5 #define MATRIX_SCFG6 (AT91_CAST(AT91_REG *) 0x00000058) // (MATRIX_SCFG6) Slave Configuration Register 6 #define MATRIX_SCFG7 (AT91_CAST(AT91_REG *) 0x0000005C) // (MATRIX_SCFG7) Slave Configuration Register 5 #define MATRIX_SCFG8 (AT91_CAST(AT91_REG *) 0x00000060) // (MATRIX_SCFG8) Slave Configuration Register 8 #define MATRIX_SCFG9 (AT91_CAST(AT91_REG *) 0x00000064) // (MATRIX_SCFG9) Slave Configuration Register 9 #define MATRIX_SFR0 (AT91_CAST(AT91_REG *) 0x00000110) // (MATRIX_SFR0 ) Special Function Register 0 #define MATRIX_SFR1 (AT91_CAST(AT91_REG *) 0x00000114) // (MATRIX_SFR1 ) Special Function Register 1 #define MATRIX_SFR2 (AT91_CAST(AT91_REG *) 0x00000118) // (MATRIX_SFR2 ) Special Function Register 2 #define MATRIX_SFR3 (AT91_CAST(AT91_REG *) 0x0000011C) // (MATRIX_SFR3 ) Special Function Register 3 #define MATRIX_SFR4 (AT91_CAST(AT91_REG *) 0x00000120) // (MATRIX_SFR4 ) Special Function Register 4 #define MATRIX_SFR5 (AT91_CAST(AT91_REG *) 0x00000124) // (MATRIX_SFR5 ) Special Function Register 5 #define MATRIX_SFR6 (AT91_CAST(AT91_REG *) 0x00000128) // (MATRIX_SFR6 ) Special Function Register 6 #define MATRIX_SFR7 (AT91_CAST(AT91_REG *) 0x0000012C) // (MATRIX_SFR7 ) Special Function Register 7 #define MATRIX_SFR8 (AT91_CAST(AT91_REG *) 0x00000130) // (MATRIX_SFR8 ) Special Function Register 8 #define MATRIX_SFR9 (AT91_CAST(AT91_REG *) 0x00000134) // (MATRIX_SFR9 ) Special Function Register 9 #define MATRIX_SFR10 (AT91_CAST(AT91_REG *) 0x00000138) // (MATRIX_SFR10) Special Function Register 10 #define MATRIX_SFR11 (AT91_CAST(AT91_REG *) 0x0000013C) // (MATRIX_SFR11) Special Function Register 11 #define MATRIX_SFR12 (AT91_CAST(AT91_REG *) 0x00000140) // (MATRIX_SFR12) Special Function Register 12 #define MATRIX_SFR13 (AT91_CAST(AT91_REG *) 0x00000144) // (MATRIX_SFR13) Special Function Register 13 #define MATRIX_SFR14 (AT91_CAST(AT91_REG *) 0x00000148) // (MATRIX_SFR14) Special Function Register 14 #define MATRIX_SFR15 (AT91_CAST(AT91_REG *) 0x0000014C) // (MATRIX_SFR15) Special Function Register 15 #define HMATRIX2_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000001EC) // (HMATRIX2_ADDRSIZE) HMATRIX2 ADDRSIZE REGISTER #define HMATRIX2_IPNAME1 (AT91_CAST(AT91_REG *) 0x000001F0) // (HMATRIX2_IPNAME1) HMATRIX2 IPNAME1 REGISTER #define HMATRIX2_IPNAME2 (AT91_CAST(AT91_REG *) 0x000001F4) // (HMATRIX2_IPNAME2) HMATRIX2 IPNAME2 REGISTER #define HMATRIX2_FEATURES (AT91_CAST(AT91_REG *) 0x000001F8) // (HMATRIX2_FEATURES) HMATRIX2 FEATURES REGISTER #define HMATRIX2_VER (AT91_CAST(AT91_REG *) 0x000001FC) // (HMATRIX2_VER) HMATRIX2 VERSION REGISTER #endif // -------- MATRIX_MCFG0 : (HMATRIX2 Offset: 0x0) Master Configuration Register ARM bus I and D -------- #define AT91C_MATRIX_ULBT (0x7 << 0) // (HMATRIX2) Undefined Length Burst Type #define AT91C_MATRIX_ULBT_INFINIT_LENGTH (0x0) // (HMATRIX2) infinite length burst #define AT91C_MATRIX_ULBT_SINGLE_ACCESS (0x1) // (HMATRIX2) Single Access #define AT91C_MATRIX_ULBT_4_BEAT (0x2) // (HMATRIX2) 4 Beat Burst #define AT91C_MATRIX_ULBT_8_BEAT (0x3) // (HMATRIX2) 8 Beat Burst #define AT91C_MATRIX_ULBT_16_BEAT (0x4) // (HMATRIX2) 16 Beat Burst #define AT91C_MATRIX_ULBT_32_BEAT (0x5) // (HMATRIX2) 32 Beat Burst #define AT91C_MATRIX_ULBT_64_BEAT (0x6) // (HMATRIX2) 64 Beat Burst #define AT91C_MATRIX_ULBT_128_BEAT (0x7) // (HMATRIX2) 128 Beat Burst // -------- MATRIX_MCFG1 : (HMATRIX2 Offset: 0x4) Master Configuration Register ARM bus S -------- // -------- MATRIX_MCFG2 : (HMATRIX2 Offset: 0x8) Master Configuration Register -------- // -------- MATRIX_MCFG3 : (HMATRIX2 Offset: 0xc) Master Configuration Register -------- // -------- MATRIX_MCFG4 : (HMATRIX2 Offset: 0x10) Master Configuration Register -------- // -------- MATRIX_MCFG5 : (HMATRIX2 Offset: 0x14) Master Configuration Register -------- // -------- MATRIX_MCFG6 : (HMATRIX2 Offset: 0x18) Master Configuration Register -------- // -------- MATRIX_MCFG7 : (HMATRIX2 Offset: 0x1c) Master Configuration Register -------- // -------- MATRIX_SCFG0 : (HMATRIX2 Offset: 0x40) Slave Configuration Register 0 -------- #define AT91C_MATRIX_SLOT_CYCLE (0xFF << 0) // (HMATRIX2) Maximum Number of Allowed Cycles for a Burst #define AT91C_MATRIX_DEFMSTR_TYPE (0x3 << 16) // (HMATRIX2) Default Master Type #define AT91C_MATRIX_DEFMSTR_TYPE_NO_DEFMSTR (0x0 << 16) // (HMATRIX2) No Default Master. At the end of current slave access, if no other master request is pending, the slave is deconnected from all masters. This results in having a one cycle latency for the first transfer of a burst. #define AT91C_MATRIX_DEFMSTR_TYPE_LAST_DEFMSTR (0x1 << 16) // (HMATRIX2) Last Default Master. At the end of current slave access, if no other master request is pending, the slave stay connected with the last master having accessed it. This results in not having the one cycle latency when the last master re-trying access on the slave. #define AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR (0x2 << 16) // (HMATRIX2) Fixed Default Master. At the end of current slave access, if no other master request is pending, the slave connects with fixed which number is in FIXED_DEFMSTR field. This results in not having the one cycle latency when the fixed master re-trying access on the slave. #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG0 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG0_ARMS (0x1 << 18) // (HMATRIX2) ARMS is Default Master // -------- MATRIX_SCFG1 : (HMATRIX2 Offset: 0x44) Slave Configuration Register 1 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG1 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG1_ARMS (0x1 << 18) // (HMATRIX2) ARMS is Default Master // -------- MATRIX_SCFG2 : (HMATRIX2 Offset: 0x48) Slave Configuration Register 2 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG2 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG2_ARMS (0x1 << 18) // (HMATRIX2) ARMS is Default Master // -------- MATRIX_SCFG3 : (HMATRIX2 Offset: 0x4c) Slave Configuration Register 3 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG3 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG3_ARMC (0x0 << 18) // (HMATRIX2) ARMC is Default Master // -------- MATRIX_SCFG4 : (HMATRIX2 Offset: 0x50) Slave Configuration Register 4 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG4 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG4_ARMC (0x0 << 18) // (HMATRIX2) ARMC is Default Master // -------- MATRIX_SCFG5 : (HMATRIX2 Offset: 0x54) Slave Configuration Register 5 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG5 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG5_ARMS (0x1 << 18) // (HMATRIX2) ARMS is Default Master // -------- MATRIX_SCFG6 : (HMATRIX2 Offset: 0x58) Slave Configuration Register 6 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG6 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG6_ARMS (0x1 << 18) // (HMATRIX2) ARMS is Default Master // -------- MATRIX_SCFG7 : (HMATRIX2 Offset: 0x5c) Slave Configuration Register 7 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG7 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG7_ARMS (0x1 << 18) // (HMATRIX2) ARMS is Default Master // -------- MATRIX_SCFG8 : (HMATRIX2 Offset: 0x60) Slave Configuration Register 8 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG8 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG8_ARMS (0x1 << 18) // (HMATRIX2) ARMS is Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG8_HDMA (0x4 << 18) // (HMATRIX2) HDMA is Default Master // -------- MATRIX_SCFG9 : (HMATRIX2 Offset: 0x64) Slave Configuration Register 9 -------- #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG9 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG9_ARMS (0x1 << 18) // (HMATRIX2) ARMS is Default Master #define AT91C_MATRIX_FIXED_DEFMSTR_SCFG9_HDMA (0x4 << 18) // (HMATRIX2) HDMA is Default Master // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x110) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x114) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x118) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x11c) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x120) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x124) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x128) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x12c) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x130) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x134) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x138) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x13c) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x140) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x144) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x148) Special Function Register 0 -------- // -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x14c) Special Function Register 0 -------- // -------- HMATRIX2_VER : (HMATRIX2 Offset: 0x1fc) VERSION Register -------- #define AT91C_HMATRIX2_VER (0xF << 0) // (HMATRIX2) VERSION Register // ***************************************************************************** // SOFTWARE API DEFINITION FOR NESTED vector Interrupt Controller // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_NVIC { AT91_REG Reserved0[1]; // AT91_REG NVIC_ICTR; // Interrupt Control Type Register AT91_REG Reserved1[2]; // AT91_REG NVIC_STICKCSR; // SysTick Control and Status Register AT91_REG NVIC_STICKRVR; // SysTick Reload Value Register AT91_REG NVIC_STICKCVR; // SysTick Current Value Register AT91_REG NVIC_STICKCALVR; // SysTick Calibration Value Register AT91_REG Reserved2[56]; // AT91_REG NVIC_ISER[8]; // Set Enable Register AT91_REG Reserved3[24]; // AT91_REG NVIC_ICER[8]; // Clear enable Register AT91_REG Reserved4[24]; // AT91_REG NVIC_ISPR[8]; // Set Pending Register AT91_REG Reserved5[24]; // AT91_REG NVIC_ICPR[8]; // Clear Pending Register AT91_REG Reserved6[24]; // AT91_REG NVIC_ABR[8]; // Active Bit Register AT91_REG Reserved7[56]; // AT91_REG NVIC_IPR[60]; // Interrupt Mask Register AT91_REG Reserved8[516]; // AT91_REG NVIC_CPUID; // CPUID Base Register AT91_REG NVIC_ICSR; // Interrupt Control State Register AT91_REG NVIC_VTOFFR; // Vector Table Offset Register AT91_REG NVIC_AIRCR; // Application Interrupt/Reset Control Reg AT91_REG NVIC_SCR; // System Control Register AT91_REG NVIC_CCR; // Configuration Control Register AT91_REG NVIC_HAND4PR; // System Handlers 4-7 Priority Register AT91_REG NVIC_HAND8PR; // System Handlers 8-11 Priority Register AT91_REG NVIC_HAND12PR; // System Handlers 12-15 Priority Register AT91_REG NVIC_HANDCSR; // System Handler Control and State Register AT91_REG NVIC_CFSR; // Configurable Fault Status Register AT91_REG NVIC_HFSR; // Hard Fault Status Register AT91_REG NVIC_DFSR; // Debug Fault Status Register AT91_REG NVIC_MMAR; // Mem Manage Address Register AT91_REG NVIC_BFAR; // Bus Fault Address Register AT91_REG NVIC_AFSR; // Auxiliary Fault Status Register AT91_REG NVIC_PFR0; // Processor Feature register0 AT91_REG NVIC_PFR1; // Processor Feature register1 AT91_REG NVIC_DFR0; // Debug Feature register0 AT91_REG NVIC_AFR0; // Auxiliary Feature register0 AT91_REG NVIC_MMFR0; // Memory Model Feature register0 AT91_REG NVIC_MMFR1; // Memory Model Feature register1 AT91_REG NVIC_MMFR2; // Memory Model Feature register2 AT91_REG NVIC_MMFR3; // Memory Model Feature register3 AT91_REG NVIC_ISAR0; // ISA Feature register0 AT91_REG NVIC_ISAR1; // ISA Feature register1 AT91_REG NVIC_ISAR2; // ISA Feature register2 AT91_REG NVIC_ISAR3; // ISA Feature register3 AT91_REG NVIC_ISAR4; // ISA Feature register4 AT91_REG Reserved9[99]; // AT91_REG NVIC_STIR; // Software Trigger Interrupt Register AT91_REG Reserved10[51]; // AT91_REG NVIC_PID4; // Peripheral identification register AT91_REG NVIC_PID5; // Peripheral identification register AT91_REG NVIC_PID6; // Peripheral identification register AT91_REG NVIC_PID7; // Peripheral identification register AT91_REG NVIC_PID0; // Peripheral identification register b7:0 AT91_REG NVIC_PID1; // Peripheral identification register b15:8 AT91_REG NVIC_PID2; // Peripheral identification register b23:16 AT91_REG NVIC_PID3; // Peripheral identification register b31:24 AT91_REG NVIC_CID0; // Component identification register b7:0 AT91_REG NVIC_CID1; // Component identification register b15:8 AT91_REG NVIC_CID2; // Component identification register b23:16 AT91_REG NVIC_CID3; // Component identification register b31:24 } AT91S_NVIC, *AT91PS_NVIC; #else #define NVIC_ICTR (AT91_CAST(AT91_REG *) 0x00000004) // (NVIC_ICTR) Interrupt Control Type Register #define NVIC_STICKCSR (AT91_CAST(AT91_REG *) 0x00000010) // (NVIC_STICKCSR) SysTick Control and Status Register #define NVIC_STICKRVR (AT91_CAST(AT91_REG *) 0x00000014) // (NVIC_STICKRVR) SysTick Reload Value Register #define NVIC_STICKCVR (AT91_CAST(AT91_REG *) 0x00000018) // (NVIC_STICKCVR) SysTick Current Value Register #define NVIC_STICKCALVR (AT91_CAST(AT91_REG *) 0x0000001C) // (NVIC_STICKCALVR) SysTick Calibration Value Register #define NVIC_ISER (AT91_CAST(AT91_REG *) 0x00000100) // (NVIC_ISER) Set Enable Register #define NVIC_ICER (AT91_CAST(AT91_REG *) 0x00000180) // (NVIC_ICER) Clear enable Register #define NVIC_ISPR (AT91_CAST(AT91_REG *) 0x00000200) // (NVIC_ISPR) Set Pending Register #define NVIC_ICPR (AT91_CAST(AT91_REG *) 0x00000280) // (NVIC_ICPR) Clear Pending Register #define NVIC_IABR (AT91_CAST(AT91_REG *) 0x00000300) // (NVIC_IABR) Active Bit Register #define NVIC_IPR (AT91_CAST(AT91_REG *) 0x00000400) // (NVIC_IPR) Interrupt Mask Register #define NVIC_CPUID (AT91_CAST(AT91_REG *) 0x00000D00) // (NVIC_CPUID) CPUID Base Register #define NVIC_ICSR (AT91_CAST(AT91_REG *) 0x00000D04) // (NVIC_ICSR) Interrupt Control State Register #define NVIC_VTOFFR (AT91_CAST(AT91_REG *) 0x00000D08) // (NVIC_VTOFFR) Vector Table Offset Register #define NVIC_AIRCR (AT91_CAST(AT91_REG *) 0x00000D0C) // (NVIC_AIRCR) Application Interrupt/Reset Control Reg #define NVIC_SCR (AT91_CAST(AT91_REG *) 0x00000D10) // (NVIC_SCR) System Control Register #define NVIC_CCR (AT91_CAST(AT91_REG *) 0x00000D14) // (NVIC_CCR) Configuration Control Register #define NVIC_HAND4PR (AT91_CAST(AT91_REG *) 0x00000D18) // (NVIC_HAND4PR) System Handlers 4-7 Priority Register #define NVIC_HAND8PR (AT91_CAST(AT91_REG *) 0x00000D1C) // (NVIC_HAND8PR) System Handlers 8-11 Priority Register #define NVIC_HAND12PR (AT91_CAST(AT91_REG *) 0x00000D20) // (NVIC_HAND12PR) System Handlers 12-15 Priority Register #define NVIC_HANDCSR (AT91_CAST(AT91_REG *) 0x00000D24) // (NVIC_HANDCSR) System Handler Control and State Register #define NVIC_CFSR (AT91_CAST(AT91_REG *) 0x00000D28) // (NVIC_CFSR) Configurable Fault Status Register #define NVIC_HFSR (AT91_CAST(AT91_REG *) 0x00000D2C) // (NVIC_HFSR) Hard Fault Status Register #define NVIC_DFSR (AT91_CAST(AT91_REG *) 0x00000D30) // (NVIC_DFSR) Debug Fault Status Register #define NVIC_MMAR (AT91_CAST(AT91_REG *) 0x00000D34) // (NVIC_MMAR) Mem Manage Address Register #define NVIC_BFAR (AT91_CAST(AT91_REG *) 0x00000D38) // (NVIC_BFAR) Bus Fault Address Register #define NVIC_AFSR (AT91_CAST(AT91_REG *) 0x00000D3C) // (NVIC_AFSR) Auxiliary Fault Status Register #define NVIC_PFR0 (AT91_CAST(AT91_REG *) 0x00000D40) // (NVIC_PFR0) Processor Feature register0 #define NVIC_PFR1 (AT91_CAST(AT91_REG *) 0x00000D44) // (NVIC_PFR1) Processor Feature register1 #define NVIC_DFR0 (AT91_CAST(AT91_REG *) 0x00000D48) // (NVIC_DFR0) Debug Feature register0 #define NVIC_AFR0 (AT91_CAST(AT91_REG *) 0x00000D4C) // (NVIC_AFR0) Auxiliary Feature register0 #define NVIC_MMFR0 (AT91_CAST(AT91_REG *) 0x00000D50) // (NVIC_MMFR0) Memory Model Feature register0 #define NVIC_MMFR1 (AT91_CAST(AT91_REG *) 0x00000D54) // (NVIC_MMFR1) Memory Model Feature register1 #define NVIC_MMFR2 (AT91_CAST(AT91_REG *) 0x00000D58) // (NVIC_MMFR2) Memory Model Feature register2 #define NVIC_MMFR3 (AT91_CAST(AT91_REG *) 0x00000D5C) // (NVIC_MMFR3) Memory Model Feature register3 #define NVIC_ISAR0 (AT91_CAST(AT91_REG *) 0x00000D60) // (NVIC_ISAR0) ISA Feature register0 #define NVIC_ISAR1 (AT91_CAST(AT91_REG *) 0x00000D64) // (NVIC_ISAR1) ISA Feature register1 #define NVIC_ISAR2 (AT91_CAST(AT91_REG *) 0x00000D68) // (NVIC_ISAR2) ISA Feature register2 #define NVIC_ISAR3 (AT91_CAST(AT91_REG *) 0x00000D6C) // (NVIC_ISAR3) ISA Feature register3 #define NVIC_ISAR4 (AT91_CAST(AT91_REG *) 0x00000D70) // (NVIC_ISAR4) ISA Feature register4 #define NVIC_STIR (AT91_CAST(AT91_REG *) 0x00000F00) // (NVIC_STIR) Software Trigger Interrupt Register #define NVIC_PID4 (AT91_CAST(AT91_REG *) 0x00000FD0) // (NVIC_PID4) Peripheral identification register #define NVIC_PID5 (AT91_CAST(AT91_REG *) 0x00000FD4) // (NVIC_PID5) Peripheral identification register #define NVIC_PID6 (AT91_CAST(AT91_REG *) 0x00000FD8) // (NVIC_PID6) Peripheral identification register #define NVIC_PID7 (AT91_CAST(AT91_REG *) 0x00000FDC) // (NVIC_PID7) Peripheral identification register #define NVIC_PID0 (AT91_CAST(AT91_REG *) 0x00000FE0) // (NVIC_PID0) Peripheral identification register b7:0 #define NVIC_PID1 (AT91_CAST(AT91_REG *) 0x00000FE4) // (NVIC_PID1) Peripheral identification register b15:8 #define NVIC_PID2 (AT91_CAST(AT91_REG *) 0x00000FE8) // (NVIC_PID2) Peripheral identification register b23:16 #define NVIC_PID3 (AT91_CAST(AT91_REG *) 0x00000FEC) // (NVIC_PID3) Peripheral identification register b31:24 #define NVIC_CID0 (AT91_CAST(AT91_REG *) 0x00000FF0) // (NVIC_CID0) Component identification register b7:0 #define NVIC_CID1 (AT91_CAST(AT91_REG *) 0x00000FF4) // (NVIC_CID1) Component identification register b15:8 #define NVIC_CID2 (AT91_CAST(AT91_REG *) 0x00000FF8) // (NVIC_CID2) Component identification register b23:16 #define NVIC_CID3 (AT91_CAST(AT91_REG *) 0x00000FFC) // (NVIC_CID3) Component identification register b31:24 #endif // -------- NVIC_ICTR : (NVIC Offset: 0x4) Interrupt Controller Type Register -------- #define AT91C_NVIC_INTLINESNUM (0xF << 0) // (NVIC) Total number of interrupt lines #define AT91C_NVIC_INTLINESNUM_32 (0x0) // (NVIC) up to 32 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_64 (0x1) // (NVIC) up to 64 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_96 (0x2) // (NVIC) up to 96 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_128 (0x3) // (NVIC) up to 128 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_160 (0x4) // (NVIC) up to 160 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_192 (0x5) // (NVIC) up to 192 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_224 (0x6) // (NVIC) up to 224 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_256 (0x7) // (NVIC) up to 256 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_288 (0x8) // (NVIC) up to 288 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_320 (0x9) // (NVIC) up to 320 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_352 (0xA) // (NVIC) up to 352 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_384 (0xB) // (NVIC) up to 384 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_416 (0xC) // (NVIC) up to 416 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_448 (0xD) // (NVIC) up to 448 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_480 (0xE) // (NVIC) up to 480 interrupt lines supported #define AT91C_NVIC_INTLINESNUM_496 (0xF) // (NVIC) up to 496 interrupt lines supported) // -------- NVIC_STICKCSR : (NVIC Offset: 0x10) SysTick Control and Status Register -------- #define AT91C_NVIC_STICKENABLE (0x1 << 0) // (NVIC) SysTick counter enable. #define AT91C_NVIC_STICKINT (0x1 << 1) // (NVIC) SysTick interrupt enable. #define AT91C_NVIC_STICKCLKSOURCE (0x1 << 2) // (NVIC) Reference clock selection. #define AT91C_NVIC_STICKCOUNTFLAG (0x1 << 16) // (NVIC) Return 1 if timer counted to 0 since last read. // -------- NVIC_STICKRVR : (NVIC Offset: 0x14) SysTick Reload Value Register -------- #define AT91C_NVIC_STICKRELOAD (0xFFFFFF << 0) // (NVIC) SysTick reload value. // -------- NVIC_STICKCVR : (NVIC Offset: 0x18) SysTick Current Value Register -------- #define AT91C_NVIC_STICKCURRENT (0x7FFFFFFF << 0) // (NVIC) SysTick current value. // -------- NVIC_STICKCALVR : (NVIC Offset: 0x1c) SysTick Calibration Value Register -------- #define AT91C_NVIC_STICKTENMS (0xFFFFFF << 0) // (NVIC) Reload value to use for 10ms timing. #define AT91C_NVIC_STICKSKEW (0x1 << 30) // (NVIC) Read as 1 if the calibration value is not exactly 10ms because of clock frequency. #define AT91C_NVIC_STICKNOREF (0x1 << 31) // (NVIC) Read as 1 if the reference clock is not provided. // -------- NVIC_IPR : (NVIC Offset: 0x400) Interrupt Priority Registers -------- #define AT91C_NVIC_PRI_N (0xFF << 0) // (NVIC) Priority of interrupt N (0, 4, 8, etc) #define AT91C_NVIC_PRI_N1 (0xFF << 8) // (NVIC) Priority of interrupt N+1 (1, 5, 9, etc) #define AT91C_NVIC_PRI_N2 (0xFF << 16) // (NVIC) Priority of interrupt N+2 (2, 6, 10, etc) #define AT91C_NVIC_PRI_N3 (0xFF << 24) // (NVIC) Priority of interrupt N+3 (3, 7, 11, etc) // -------- NVIC_CPUID : (NVIC Offset: 0xd00) CPU ID Base Register -------- #define AT91C_NVIC_REVISION (0xF << 0) // (NVIC) Implementation defined revision number. #define AT91C_NVIC_PARTNO (0xFFF << 4) // (NVIC) Number of processor within family #define AT91C_NVIC_CONSTANT (0xF << 16) // (NVIC) Reads as 0xF #define AT91C_NVIC_VARIANT (0xF << 20) // (NVIC) Implementation defined variant number. #define AT91C_NVIC_IMPLEMENTER (0xFF << 24) // (NVIC) Implementer code. ARM is 0x41 // -------- NVIC_ICSR : (NVIC Offset: 0xd04) Interrupt Control State Register -------- #define AT91C_NVIC_VECTACTIVE (0x1FF << 0) // (NVIC) Read-only Active ISR number field #define AT91C_NVIC_RETTOBASE (0x1 << 11) // (NVIC) Read-only #define AT91C_NVIC_VECTPENDING (0x1FF << 12) // (NVIC) Read-only Pending ISR number field #define AT91C_NVIC_ISRPENDING (0x1 << 22) // (NVIC) Read-only Interrupt pending flag. #define AT91C_NVIC_ISRPREEMPT (0x1 << 23) // (NVIC) Read-only You must only use this at debug time #define AT91C_NVIC_PENDSTCLR (0x1 << 25) // (NVIC) Write-only Clear pending SysTick bit #define AT91C_NVIC_PENDSTSET (0x1 << 26) // (NVIC) Read/write Set a pending SysTick bit #define AT91C_NVIC_PENDSVCLR (0x1 << 27) // (NVIC) Write-only Clear pending pendSV bit #define AT91C_NVIC_PENDSVSET (0x1 << 28) // (NVIC) Read/write Set pending pendSV bit #define AT91C_NVIC_NMIPENDSET (0x1 << 31) // (NVIC) Read/write Set pending NMI // -------- NVIC_VTOFFR : (NVIC Offset: 0xd08) Vector Table Offset Register -------- #define AT91C_NVIC_TBLOFF (0x3FFFFF << 7) // (NVIC) Vector table base offset field #define AT91C_NVIC_TBLBASE (0x1 << 29) // (NVIC) Table base is in Code (0) or RAM (1) #define AT91C_NVIC_TBLBASE_CODE (0x0 << 29) // (NVIC) Table base is in CODE #define AT91C_NVIC_TBLBASE_RAM (0x1 << 29) // (NVIC) Table base is in RAM // -------- NVIC_AIRCR : (NVIC Offset: 0xd0c) Application Interrupt and Reset Control Register -------- #define AT91C_NVIC_VECTRESET (0x1 << 0) // (NVIC) System Reset bit #define AT91C_NVIC_VECTCLRACTIVE (0x1 << 1) // (NVIC) Clear active vector bit #define AT91C_NVIC_SYSRESETREQ (0x1 << 2) // (NVIC) Causes a signal to be asserted to the outer system that indicates a reset is requested #define AT91C_NVIC_PRIGROUP (0x7 << 8) // (NVIC) Interrupt priority grouping field #define AT91C_NVIC_PRIGROUP_3 (0x3 << 8) // (NVIC) indicates four bits of pre-emption priority, none bit of subpriority #define AT91C_NVIC_PRIGROUP_4 (0x4 << 8) // (NVIC) indicates three bits of pre-emption priority, one bit of subpriority #define AT91C_NVIC_PRIGROUP_5 (0x5 << 8) // (NVIC) indicates two bits of pre-emption priority, two bits of subpriority #define AT91C_NVIC_PRIGROUP_6 (0x6 << 8) // (NVIC) indicates one bit of pre-emption priority, three bits of subpriority #define AT91C_NVIC_PRIGROUP_7 (0x7 << 8) // (NVIC) indicates no pre-emption priority, four bits of subpriority #define AT91C_NVIC_ENDIANESS (0x1 << 15) // (NVIC) Data endianness bit #define AT91C_NVIC_VECTKEY (0xFFFF << 16) // (NVIC) Register key // -------- NVIC_SCR : (NVIC Offset: 0xd10) System Control Register -------- #define AT91C_NVIC_SLEEPONEXIT (0x1 << 1) // (NVIC) Sleep on exit when returning from Handler mode to Thread mode #define AT91C_NVIC_SLEEPDEEP (0x1 << 2) // (NVIC) Sleep deep bit #define AT91C_NVIC_SEVONPEND (0x1 << 4) // (NVIC) When enabled, this causes WFE to wake up when an interrupt moves from inactive to pended // -------- NVIC_CCR : (NVIC Offset: 0xd14) Configuration Control Register -------- #define AT91C_NVIC_NONEBASETHRDENA (0x1 << 0) // (NVIC) When 0, default, It is only possible to enter Thread mode when returning from the last exception #define AT91C_NVIC_USERSETMPEND (0x1 << 1) // (NVIC) #define AT91C_NVIC_UNALIGN_TRP (0x1 << 3) // (NVIC) Trap for unaligned access #define AT91C_NVIC_DIV_0_TRP (0x1 << 4) // (NVIC) Trap on Divide by 0 #define AT91C_NVIC_BFHFNMIGN (0x1 << 8) // (NVIC) #define AT91C_NVIC_STKALIGN (0x1 << 9) // (NVIC) // -------- NVIC_HAND4PR : (NVIC Offset: 0xd18) System Handlers 4-7 Priority Register -------- #define AT91C_NVIC_PRI_4 (0xFF << 0) // (NVIC) #define AT91C_NVIC_PRI_5 (0xFF << 8) // (NVIC) #define AT91C_NVIC_PRI_6 (0xFF << 16) // (NVIC) #define AT91C_NVIC_PRI_7 (0xFF << 24) // (NVIC) // -------- NVIC_HAND8PR : (NVIC Offset: 0xd1c) System Handlers 8-11 Priority Register -------- #define AT91C_NVIC_PRI_8 (0xFF << 0) // (NVIC) #define AT91C_NVIC_PRI_9 (0xFF << 8) // (NVIC) #define AT91C_NVIC_PRI_10 (0xFF << 16) // (NVIC) #define AT91C_NVIC_PRI_11 (0xFF << 24) // (NVIC) // -------- NVIC_HAND12PR : (NVIC Offset: 0xd20) System Handlers 12-15 Priority Register -------- #define AT91C_NVIC_PRI_12 (0xFF << 0) // (NVIC) #define AT91C_NVIC_PRI_13 (0xFF << 8) // (NVIC) #define AT91C_NVIC_PRI_14 (0xFF << 16) // (NVIC) #define AT91C_NVIC_PRI_15 (0xFF << 24) // (NVIC) // -------- NVIC_HANDCSR : (NVIC Offset: 0xd24) System Handler Control and State Register -------- #define AT91C_NVIC_MEMFAULTACT (0x1 << 0) // (NVIC) #define AT91C_NVIC_BUSFAULTACT (0x1 << 1) // (NVIC) #define AT91C_NVIC_USGFAULTACT (0x1 << 3) // (NVIC) #define AT91C_NVIC_SVCALLACT (0x1 << 7) // (NVIC) #define AT91C_NVIC_MONITORACT (0x1 << 8) // (NVIC) #define AT91C_NVIC_PENDSVACT (0x1 << 10) // (NVIC) #define AT91C_NVIC_SYSTICKACT (0x1 << 11) // (NVIC) #define AT91C_NVIC_USGFAULTPENDED (0x1 << 12) // (NVIC) #define AT91C_NVIC_MEMFAULTPENDED (0x1 << 13) // (NVIC) #define AT91C_NVIC_BUSFAULTPENDED (0x1 << 14) // (NVIC) #define AT91C_NVIC_SVCALLPENDED (0x1 << 15) // (NVIC) #define AT91C_NVIC_MEMFAULTENA (0x1 << 16) // (NVIC) #define AT91C_NVIC_BUSFAULTENA (0x1 << 17) // (NVIC) #define AT91C_NVIC_USGFAULTENA (0x1 << 18) // (NVIC) // -------- NVIC_CFSR : (NVIC Offset: 0xd28) Configurable Fault Status Registers -------- #define AT91C_NVIC_MEMMANAGE (0xFF << 0) // (NVIC) #define AT91C_NVIC_BUSFAULT (0xFF << 8) // (NVIC) #define AT91C_NVIC_USAGEFAULT (0xFF << 16) // (NVIC) // -------- NVIC_BFAR : (NVIC Offset: 0xd38) Bus Fault Address Register -------- #define AT91C_NVIC_IBUSERR (0x1 << 0) // (NVIC) This bit indicates a bus fault on an instruction prefetch #define AT91C_NVIC_PRECISERR (0x1 << 1) // (NVIC) Precise data access error. The BFAR is written with the faulting address #define AT91C_NVIC_IMPRECISERR (0x1 << 2) // (NVIC) Imprecise data access error #define AT91C_NVIC_UNSTKERR (0x1 << 3) // (NVIC) This bit indicates a derived bus fault has occurred on exception return #define AT91C_NVIC_STKERR (0x1 << 4) // (NVIC) This bit indicates a derived bus fault has occurred on exception entry #define AT91C_NVIC_BFARVALID (0x1 << 7) // (NVIC) This bit is set if the BFAR register has valid contents // -------- NVIC_PFR0 : (NVIC Offset: 0xd40) Processor Feature register0 (ID_PFR0) -------- #define AT91C_NVIC_ID_PFR0_0 (0xF << 0) // (NVIC) State0 (T-bit == 0) #define AT91C_NVIC_ID_PRF0_1 (0xF << 4) // (NVIC) State1 (T-bit == 1) // -------- NVIC_PFR1 : (NVIC Offset: 0xd44) Processor Feature register1 (ID_PFR1) -------- #define AT91C_NVIC_ID_PRF1_MODEL (0xF << 8) // (NVIC) Microcontroller programmers model // -------- NVIC_DFR0 : (NVIC Offset: 0xd48) Debug Feature register0 (ID_DFR0) -------- #define AT91C_NVIC_ID_DFR0_MODEL (0xF << 20) // (NVIC) Microcontroller Debug Model memory mapped // -------- NVIC_MMFR0 : (NVIC Offset: 0xd50) Memory Model Feature register0 (ID_MMFR0) -------- #define AT91C_NVIC_ID_MMFR0_PMSA (0xF << 4) // (NVIC) Microcontroller Debug Model memory mapped #define AT91C_NVIC_ID_MMFR0_CACHE (0xF << 8) // (NVIC) Microcontroller Debug Model memory mapped // ***************************************************************************** // SOFTWARE API DEFINITION FOR NESTED vector Interrupt Controller // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_MPU { AT91_REG MPU_TYPE; // MPU Type Register AT91_REG MPU_CTRL; // MPU Control Register AT91_REG MPU_REG_NB; // MPU Region Number Register AT91_REG MPU_REG_BASE_ADDR; // MPU Region Base Address Register AT91_REG MPU_ATTR_SIZE; // MPU Attribute and Size Register AT91_REG MPU_REG_BASE_ADDR1; // MPU Region Base Address Register alias 1 AT91_REG MPU_ATTR_SIZE1; // MPU Attribute and Size Register alias 1 AT91_REG MPU_REG_BASE_ADDR2; // MPU Region Base Address Register alias 2 AT91_REG MPU_ATTR_SIZE2; // MPU Attribute and Size Register alias 2 AT91_REG MPU_REG_BASE_ADDR3; // MPU Region Base Address Register alias 3 AT91_REG MPU_ATTR_SIZE3; // MPU Attribute and Size Register alias 3 } AT91S_MPU, *AT91PS_MPU; #else #define MPU_TYPE (AT91_CAST(AT91_REG *) 0x00000000) // (MPU_TYPE) MPU Type Register #define MPU_CTRL (AT91_CAST(AT91_REG *) 0x00000004) // (MPU_CTRL) MPU Control Register #define MPU_REG_NB (AT91_CAST(AT91_REG *) 0x00000008) // (MPU_REG_NB) MPU Region Number Register #define MPU_REG_BASE_ADDR (AT91_CAST(AT91_REG *) 0x0000000C) // (MPU_REG_BASE_ADDR) MPU Region Base Address Register #define MPU_ATTR_SIZE (AT91_CAST(AT91_REG *) 0x00000010) // (MPU_ATTR_SIZE) MPU Attribute and Size Register #define MPU_REG_BASE_ADDR1 (AT91_CAST(AT91_REG *) 0x00000014) // (MPU_REG_BASE_ADDR1) MPU Region Base Address Register alias 1 #define MPU_ATTR_SIZE1 (AT91_CAST(AT91_REG *) 0x00000018) // (MPU_ATTR_SIZE1) MPU Attribute and Size Register alias 1 #define MPU_REG_BASE_ADDR2 (AT91_CAST(AT91_REG *) 0x0000001C) // (MPU_REG_BASE_ADDR2) MPU Region Base Address Register alias 2 #define MPU_ATTR_SIZE2 (AT91_CAST(AT91_REG *) 0x00000020) // (MPU_ATTR_SIZE2) MPU Attribute and Size Register alias 2 #define MPU_REG_BASE_ADDR3 (AT91_CAST(AT91_REG *) 0x00000024) // (MPU_REG_BASE_ADDR3) MPU Region Base Address Register alias 3 #define MPU_ATTR_SIZE3 (AT91_CAST(AT91_REG *) 0x00000028) // (MPU_ATTR_SIZE3) MPU Attribute and Size Register alias 3 #endif // -------- MPU_TYPE : (MPU Offset: 0x0) -------- #define AT91C_MPU_SEPARATE (0x1 << 0) // (MPU) #define AT91C_MPU_DREGION (0xFF << 8) // (MPU) #define AT91C_MPU_IREGION (0xFF << 16) // (MPU) // -------- MPU_CTRL : (MPU Offset: 0x4) -------- #define AT91C_MPU_ENABLE (0x1 << 0) // (MPU) #define AT91C_MPU_HFNMIENA (0x1 << 1) // (MPU) #define AT91C_MPU_PRIVDEFENA (0x1 << 2) // (MPU) // -------- MPU_REG_NB : (MPU Offset: 0x8) -------- #define AT91C_MPU_REGION (0xFF << 0) // (MPU) // -------- MPU_REG_BASE_ADDR : (MPU Offset: 0xc) -------- #define AT91C_MPU_REG (0xF << 0) // (MPU) #define AT91C_MPU_VALID (0x1 << 4) // (MPU) #define AT91C_MPU_ADDR (0x3FFFFFF << 5) // (MPU) // -------- MPU_ATTR_SIZE : (MPU Offset: 0x10) -------- #define AT91C_MPU_ENA (0x1 << 0) // (MPU) #define AT91C_MPU_SIZE (0xF << 1) // (MPU) #define AT91C_MPU_SRD (0xFF << 8) // (MPU) #define AT91C_MPU_B (0x1 << 16) // (MPU) #define AT91C_MPU_C (0x1 << 17) // (MPU) #define AT91C_MPU_S (0x1 << 18) // (MPU) #define AT91C_MPU_TEX (0x7 << 19) // (MPU) #define AT91C_MPU_AP (0x7 << 24) // (MPU) #define AT91C_MPU_XN (0x7 << 28) // (MPU) // ***************************************************************************** // SOFTWARE API DEFINITION FOR CORTEX_M3 Registers // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_CM3 { AT91_REG CM3_CPUID; // CPU ID Base Register AT91_REG CM3_ICSR; // Interrupt Control State Register AT91_REG CM3_VTOR; // Vector Table Offset Register AT91_REG CM3_AIRCR; // Application Interrupt and Reset Control Register AT91_REG CM3_SCR; // System Controller Register AT91_REG CM3_CCR; // Configuration Control Register AT91_REG CM3_SHPR[3]; // System Handler Priority Register AT91_REG CM3_SHCSR; // System Handler Control and State Register } AT91S_CM3, *AT91PS_CM3; #else #define CM3_CPUID (AT91_CAST(AT91_REG *) 0x00000000) // (CM3_CPUID) CPU ID Base Register #define CM3_ICSR (AT91_CAST(AT91_REG *) 0x00000004) // (CM3_ICSR) Interrupt Control State Register #define CM3_VTOR (AT91_CAST(AT91_REG *) 0x00000008) // (CM3_VTOR) Vector Table Offset Register #define CM3_AIRCR (AT91_CAST(AT91_REG *) 0x0000000C) // (CM3_AIRCR) Application Interrupt and Reset Control Register #define CM3_SCR (AT91_CAST(AT91_REG *) 0x00000010) // (CM3_SCR) System Controller Register #define CM3_CCR (AT91_CAST(AT91_REG *) 0x00000014) // (CM3_CCR) Configuration Control Register #define CM3_SHPR (AT91_CAST(AT91_REG *) 0x00000018) // (CM3_SHPR) System Handler Priority Register #define CM3_SHCSR (AT91_CAST(AT91_REG *) 0x00000024) // (CM3_SHCSR) System Handler Control and State Register #endif // -------- CM3_CPUID : (CM3 Offset: 0x0) -------- // -------- CM3_AIRCR : (CM3 Offset: 0xc) -------- #define AT91C_CM3_SYSRESETREQ (0x1 << 2) // (CM3) A reset is requested by the processor. // -------- CM3_SCR : (CM3 Offset: 0x10) -------- #define AT91C_CM3_SLEEPONEXIT (0x1 << 1) // (CM3) Sleep on exit when returning from Handler mode to Thread mode. Enables interrupt driven applications to avoid returning to empty main application. #define AT91C_CM3_SLEEPDEEP (0x1 << 2) // (CM3) Sleep deep bit. #define AT91C_CM3_SEVONPEND (0x1 << 4) // (CM3) When enabled, this causes WFE to wake up when an interrupt moves from inactive to pended. // -------- CM3_SHCSR : (CM3 Offset: 0x24) -------- #define AT91C_CM3_SYSTICKACT (0x1 << 11) // (CM3) Reads as 1 if SysTick is active. // ***************************************************************************** // SOFTWARE API DEFINITION FOR Peripheral DMA Controller // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_PDC { AT91_REG PDC_RPR; // Receive Pointer Register AT91_REG PDC_RCR; // Receive Counter Register AT91_REG PDC_TPR; // Transmit Pointer Register AT91_REG PDC_TCR; // Transmit Counter Register AT91_REG PDC_RNPR; // Receive Next Pointer Register AT91_REG PDC_RNCR; // Receive Next Counter Register AT91_REG PDC_TNPR; // Transmit Next Pointer Register AT91_REG PDC_TNCR; // Transmit Next Counter Register AT91_REG PDC_PTCR; // PDC Transfer Control Register AT91_REG PDC_PTSR; // PDC Transfer Status Register } AT91S_PDC, *AT91PS_PDC; #else #define PDC_RPR (AT91_CAST(AT91_REG *) 0x00000000) // (PDC_RPR) Receive Pointer Register #define PDC_RCR (AT91_CAST(AT91_REG *) 0x00000004) // (PDC_RCR) Receive Counter Register #define PDC_TPR (AT91_CAST(AT91_REG *) 0x00000008) // (PDC_TPR) Transmit Pointer Register #define PDC_TCR (AT91_CAST(AT91_REG *) 0x0000000C) // (PDC_TCR) Transmit Counter Register #define PDC_RNPR (AT91_CAST(AT91_REG *) 0x00000010) // (PDC_RNPR) Receive Next Pointer Register #define PDC_RNCR (AT91_CAST(AT91_REG *) 0x00000014) // (PDC_RNCR) Receive Next Counter Register #define PDC_TNPR (AT91_CAST(AT91_REG *) 0x00000018) // (PDC_TNPR) Transmit Next Pointer Register #define PDC_TNCR (AT91_CAST(AT91_REG *) 0x0000001C) // (PDC_TNCR) Transmit Next Counter Register #define PDC_PTCR (AT91_CAST(AT91_REG *) 0x00000020) // (PDC_PTCR) PDC Transfer Control Register #define PDC_PTSR (AT91_CAST(AT91_REG *) 0x00000024) // (PDC_PTSR) PDC Transfer Status Register #endif // -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- #define AT91C_PDC_RXTEN (0x1 << 0) // (PDC) Receiver Transfer Enable #define AT91C_PDC_RXTDIS (0x1 << 1) // (PDC) Receiver Transfer Disable #define AT91C_PDC_TXTEN (0x1 << 8) // (PDC) Transmitter Transfer Enable #define AT91C_PDC_TXTDIS (0x1 << 9) // (PDC) Transmitter Transfer Disable // -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- // ***************************************************************************** // SOFTWARE API DEFINITION FOR Debug Unit // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_DBGU { AT91_REG DBGU_CR; // Control Register AT91_REG DBGU_MR; // Mode Register AT91_REG DBGU_IER; // Interrupt Enable Register AT91_REG DBGU_IDR; // Interrupt Disable Register AT91_REG DBGU_IMR; // Interrupt Mask Register AT91_REG DBGU_CSR; // Channel Status Register AT91_REG DBGU_RHR; // Receiver Holding Register AT91_REG DBGU_THR; // Transmitter Holding Register AT91_REG DBGU_BRGR; // Baud Rate Generator Register AT91_REG Reserved0[9]; // AT91_REG DBGU_FNTR; // Force NTRST Register AT91_REG Reserved1[40]; // AT91_REG DBGU_ADDRSIZE; // DBGU ADDRSIZE REGISTER AT91_REG DBGU_IPNAME1; // DBGU IPNAME1 REGISTER AT91_REG DBGU_IPNAME2; // DBGU IPNAME2 REGISTER AT91_REG DBGU_FEATURES; // DBGU FEATURES REGISTER AT91_REG DBGU_VER; // DBGU VERSION REGISTER AT91_REG DBGU_RPR; // Receive Pointer Register AT91_REG DBGU_RCR; // Receive Counter Register AT91_REG DBGU_TPR; // Transmit Pointer Register AT91_REG DBGU_TCR; // Transmit Counter Register AT91_REG DBGU_RNPR; // Receive Next Pointer Register AT91_REG DBGU_RNCR; // Receive Next Counter Register AT91_REG DBGU_TNPR; // Transmit Next Pointer Register AT91_REG DBGU_TNCR; // Transmit Next Counter Register AT91_REG DBGU_PTCR; // PDC Transfer Control Register AT91_REG DBGU_PTSR; // PDC Transfer Status Register AT91_REG Reserved2[6]; // AT91_REG DBGU_CIDR; // Chip ID Register AT91_REG DBGU_EXID; // Chip ID Extension Register } AT91S_DBGU, *AT91PS_DBGU; #else #define DBGU_CR (AT91_CAST(AT91_REG *) 0x00000000) // (DBGU_CR) Control Register #define DBGU_MR (AT91_CAST(AT91_REG *) 0x00000004) // (DBGU_MR) Mode Register #define DBGU_IER (AT91_CAST(AT91_REG *) 0x00000008) // (DBGU_IER) Interrupt Enable Register #define DBGU_IDR (AT91_CAST(AT91_REG *) 0x0000000C) // (DBGU_IDR) Interrupt Disable Register #define DBGU_IMR (AT91_CAST(AT91_REG *) 0x00000010) // (DBGU_IMR) Interrupt Mask Register #define DBGU_CSR (AT91_CAST(AT91_REG *) 0x00000014) // (DBGU_CSR) Channel Status Register #define DBGU_RHR (AT91_CAST(AT91_REG *) 0x00000018) // (DBGU_RHR) Receiver Holding Register #define DBGU_THR (AT91_CAST(AT91_REG *) 0x0000001C) // (DBGU_THR) Transmitter Holding Register #define DBGU_BRGR (AT91_CAST(AT91_REG *) 0x00000020) // (DBGU_BRGR) Baud Rate Generator Register #define DBGU_FNTR (AT91_CAST(AT91_REG *) 0x00000048) // (DBGU_FNTR) Force NTRST Register #define DBGU_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (DBGU_ADDRSIZE) DBGU ADDRSIZE REGISTER #define DBGU_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (DBGU_IPNAME1) DBGU IPNAME1 REGISTER #define DBGU_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (DBGU_IPNAME2) DBGU IPNAME2 REGISTER #define DBGU_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (DBGU_FEATURES) DBGU FEATURES REGISTER #define DBGU_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (DBGU_VER) DBGU VERSION REGISTER #define DBGU_CIDR (AT91_CAST(AT91_REG *) 0x00000140) // (DBGU_CIDR) Chip ID Register #define DBGU_EXID (AT91_CAST(AT91_REG *) 0x00000144) // (DBGU_EXID) Chip ID Extension Register #endif // -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- #define AT91C_DBGU_RSTRX (0x1 << 2) // (DBGU) Reset Receiver #define AT91C_DBGU_RSTTX (0x1 << 3) // (DBGU) Reset Transmitter #define AT91C_DBGU_RXEN (0x1 << 4) // (DBGU) Receiver Enable #define AT91C_DBGU_RXDIS (0x1 << 5) // (DBGU) Receiver Disable #define AT91C_DBGU_TXEN (0x1 << 6) // (DBGU) Transmitter Enable #define AT91C_DBGU_TXDIS (0x1 << 7) // (DBGU) Transmitter Disable #define AT91C_DBGU_RSTSTA (0x1 << 8) // (DBGU) Reset Status Bits // -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- #define AT91C_DBGU_PAR (0x7 << 9) // (DBGU) Parity type #define AT91C_DBGU_PAR_EVEN (0x0 << 9) // (DBGU) Even Parity #define AT91C_DBGU_PAR_ODD (0x1 << 9) // (DBGU) Odd Parity #define AT91C_DBGU_PAR_SPACE (0x2 << 9) // (DBGU) Parity forced to 0 (Space) #define AT91C_DBGU_PAR_MARK (0x3 << 9) // (DBGU) Parity forced to 1 (Mark) #define AT91C_DBGU_PAR_NONE (0x4 << 9) // (DBGU) No Parity #define AT91C_DBGU_CHMODE (0x3 << 14) // (DBGU) Channel Mode #define AT91C_DBGU_CHMODE_NORMAL (0x0 << 14) // (DBGU) Normal Mode: The debug unit channel operates as an RX/TX debug unit. #define AT91C_DBGU_CHMODE_AUTO (0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin. #define AT91C_DBGU_CHMODE_LOCAL (0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal. #define AT91C_DBGU_CHMODE_REMOTE (0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin. // -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- #define AT91C_DBGU_RXRDY (0x1 << 0) // (DBGU) RXRDY Interrupt #define AT91C_DBGU_TXRDY (0x1 << 1) // (DBGU) TXRDY Interrupt #define AT91C_DBGU_ENDRX (0x1 << 3) // (DBGU) End of Receive Transfer Interrupt #define AT91C_DBGU_ENDTX (0x1 << 4) // (DBGU) End of Transmit Interrupt #define AT91C_DBGU_OVRE (0x1 << 5) // (DBGU) Overrun Interrupt #define AT91C_DBGU_FRAME (0x1 << 6) // (DBGU) Framing Error Interrupt #define AT91C_DBGU_PARE (0x1 << 7) // (DBGU) Parity Error Interrupt #define AT91C_DBGU_TXEMPTY (0x1 << 9) // (DBGU) TXEMPTY Interrupt #define AT91C_DBGU_TXBUFE (0x1 << 11) // (DBGU) TXBUFE Interrupt #define AT91C_DBGU_RXBUFF (0x1 << 12) // (DBGU) RXBUFF Interrupt #define AT91C_DBGU_COMM_TX (0x1 << 30) // (DBGU) COMM_TX Interrupt #define AT91C_DBGU_COMM_RX (0x1 << 31) // (DBGU) COMM_RX Interrupt // -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- // -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- // -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- // -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- #define AT91C_DBGU_FORCE_NTRST (0x1 << 0) // (DBGU) Force NTRST in JTAG // ***************************************************************************** // SOFTWARE API DEFINITION FOR Parallel Input Output Controler // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_PIO { AT91_REG PIO_PER; // PIO Enable Register AT91_REG PIO_PDR; // PIO Disable Register AT91_REG PIO_PSR; // PIO Status Register AT91_REG Reserved0[1]; // AT91_REG PIO_OER; // Output Enable Register AT91_REG PIO_ODR; // Output Disable Registerr AT91_REG PIO_OSR; // Output Status Register AT91_REG Reserved1[1]; // AT91_REG PIO_IFER; // Input Filter Enable Register AT91_REG PIO_IFDR; // Input Filter Disable Register AT91_REG PIO_IFSR; // Input Filter Status Register AT91_REG Reserved2[1]; // AT91_REG PIO_SODR; // Set Output Data Register AT91_REG PIO_CODR; // Clear Output Data Register AT91_REG PIO_ODSR; // Output Data Status Register AT91_REG PIO_PDSR; // Pin Data Status Register AT91_REG PIO_IER; // Interrupt Enable Register AT91_REG PIO_IDR; // Interrupt Disable Register AT91_REG PIO_IMR; // Interrupt Mask Register AT91_REG PIO_ISR; // Interrupt Status Register AT91_REG PIO_MDER; // Multi-driver Enable Register AT91_REG PIO_MDDR; // Multi-driver Disable Register AT91_REG PIO_MDSR; // Multi-driver Status Register AT91_REG Reserved3[1]; // AT91_REG PIO_PPUDR; // Pull-up Disable Register AT91_REG PIO_PPUER; // Pull-up Enable Register AT91_REG PIO_PPUSR; // Pull-up Status Register AT91_REG Reserved4[1]; // AT91_REG PIO_ABSR; // Peripheral AB Select Register AT91_REG Reserved5[3]; // AT91_REG PIO_SCIFSR; // System Clock Glitch Input Filter Select Register AT91_REG PIO_DIFSR; // Debouncing Input Filter Select Register AT91_REG PIO_IFDGSR; // Glitch or Debouncing Input Filter Clock Selection Status Register AT91_REG PIO_SCDR; // Slow Clock Divider Debouncing Register AT91_REG Reserved6[4]; // AT91_REG PIO_OWER; // Output Write Enable Register AT91_REG PIO_OWDR; // Output Write Disable Register AT91_REG PIO_OWSR; // Output Write Status Register AT91_REG Reserved7[1]; // AT91_REG PIO_AIMER; // Additional Interrupt Modes Enable Register AT91_REG PIO_AIMDR; // Additional Interrupt Modes Disables Register AT91_REG PIO_AIMMR; // Additional Interrupt Modes Mask Register AT91_REG Reserved8[1]; // AT91_REG PIO_ESR; // Edge Select Register AT91_REG PIO_LSR; // Level Select Register AT91_REG PIO_ELSR; // Edge/Level Status Register AT91_REG Reserved9[1]; // AT91_REG PIO_FELLSR; // Falling Edge/Low Level Select Register AT91_REG PIO_REHLSR; // Rising Edge/ High Level Select Register AT91_REG PIO_FRLHSR; // Fall/Rise - Low/High Status Register AT91_REG Reserved10[1]; // AT91_REG PIO_LOCKSR; // Lock Status Register AT91_REG Reserved11[6]; // AT91_REG PIO_VER; // PIO VERSION REGISTER AT91_REG Reserved12[8]; // AT91_REG PIO_KER; // Keypad Controller Enable Register AT91_REG PIO_KRCR; // Keypad Controller Row Column Register AT91_REG PIO_KDR; // Keypad Controller Debouncing Register AT91_REG Reserved13[1]; // AT91_REG PIO_KIER; // Keypad Controller Interrupt Enable Register AT91_REG PIO_KIDR; // Keypad Controller Interrupt Disable Register AT91_REG PIO_KIMR; // Keypad Controller Interrupt Mask Register AT91_REG PIO_KSR; // Keypad Controller Status Register AT91_REG PIO_KKPR; // Keypad Controller Key Press Register AT91_REG PIO_KKRR; // Keypad Controller Key Release Register } AT91S_PIO, *AT91PS_PIO; #else #define PIO_PER (AT91_CAST(AT91_REG *) 0x00000000) // (PIO_PER) PIO Enable Register #define PIO_PDR (AT91_CAST(AT91_REG *) 0x00000004) // (PIO_PDR) PIO Disable Register #define PIO_PSR (AT91_CAST(AT91_REG *) 0x00000008) // (PIO_PSR) PIO Status Register #define PIO_OER (AT91_CAST(AT91_REG *) 0x00000010) // (PIO_OER) Output Enable Register #define PIO_ODR (AT91_CAST(AT91_REG *) 0x00000014) // (PIO_ODR) Output Disable Registerr #define PIO_OSR (AT91_CAST(AT91_REG *) 0x00000018) // (PIO_OSR) Output Status Register #define PIO_IFER (AT91_CAST(AT91_REG *) 0x00000020) // (PIO_IFER) Input Filter Enable Register #define PIO_IFDR (AT91_CAST(AT91_REG *) 0x00000024) // (PIO_IFDR) Input Filter Disable Register #define PIO_IFSR (AT91_CAST(AT91_REG *) 0x00000028) // (PIO_IFSR) Input Filter Status Register #define PIO_SODR (AT91_CAST(AT91_REG *) 0x00000030) // (PIO_SODR) Set Output Data Register #define PIO_CODR (AT91_CAST(AT91_REG *) 0x00000034) // (PIO_CODR) Clear Output Data Register #define PIO_ODSR (AT91_CAST(AT91_REG *) 0x00000038) // (PIO_ODSR) Output Data Status Register #define PIO_PDSR (AT91_CAST(AT91_REG *) 0x0000003C) // (PIO_PDSR) Pin Data Status Register #define PIO_IER (AT91_CAST(AT91_REG *) 0x00000040) // (PIO_IER) Interrupt Enable Register #define PIO_IDR (AT91_CAST(AT91_REG *) 0x00000044) // (PIO_IDR) Interrupt Disable Register #define PIO_IMR (AT91_CAST(AT91_REG *) 0x00000048) // (PIO_IMR) Interrupt Mask Register #define PIO_ISR (AT91_CAST(AT91_REG *) 0x0000004C) // (PIO_ISR) Interrupt Status Register #define PIO_MDER (AT91_CAST(AT91_REG *) 0x00000050) // (PIO_MDER) Multi-driver Enable Register #define PIO_MDDR (AT91_CAST(AT91_REG *) 0x00000054) // (PIO_MDDR) Multi-driver Disable Register #define PIO_MDSR (AT91_CAST(AT91_REG *) 0x00000058) // (PIO_MDSR) Multi-driver Status Register #define PIO_PPUDR (AT91_CAST(AT91_REG *) 0x00000060) // (PIO_PPUDR) Pull-up Disable Register #define PIO_PPUER (AT91_CAST(AT91_REG *) 0x00000064) // (PIO_PPUER) Pull-up Enable Register #define PIO_PPUSR (AT91_CAST(AT91_REG *) 0x00000068) // (PIO_PPUSR) Pull-up Status Register #define PIO_ABSR (AT91_CAST(AT91_REG *) 0x00000070) // (PIO_ABSR) Peripheral AB Select Register #define PIO_SCIFSR (AT91_CAST(AT91_REG *) 0x00000080) // (PIO_SCIFSR) System Clock Glitch Input Filter Select Register #define PIO_DIFSR (AT91_CAST(AT91_REG *) 0x00000084) // (PIO_DIFSR) Debouncing Input Filter Select Register #define PIO_IFDGSR (AT91_CAST(AT91_REG *) 0x00000088) // (PIO_IFDGSR) Glitch or Debouncing Input Filter Clock Selection Status Register #define PIO_SCDR (AT91_CAST(AT91_REG *) 0x0000008C) // (PIO_SCDR) Slow Clock Divider Debouncing Register #define PIO_OWER (AT91_CAST(AT91_REG *) 0x000000A0) // (PIO_OWER) Output Write Enable Register #define PIO_OWDR (AT91_CAST(AT91_REG *) 0x000000A4) // (PIO_OWDR) Output Write Disable Register #define PIO_OWSR (AT91_CAST(AT91_REG *) 0x000000A8) // (PIO_OWSR) Output Write Status Register #define PIO_AIMER (AT91_CAST(AT91_REG *) 0x000000B0) // (PIO_AIMER) Additional Interrupt Modes Enable Register #define PIO_AIMDR (AT91_CAST(AT91_REG *) 0x000000B4) // (PIO_AIMDR) Additional Interrupt Modes Disables Register #define PIO_AIMMR (AT91_CAST(AT91_REG *) 0x000000B8) // (PIO_AIMMR) Additional Interrupt Modes Mask Register #define PIO_ESR (AT91_CAST(AT91_REG *) 0x000000C0) // (PIO_ESR) Edge Select Register #define PIO_LSR (AT91_CAST(AT91_REG *) 0x000000C4) // (PIO_LSR) Level Select Register #define PIO_ELSR (AT91_CAST(AT91_REG *) 0x000000C8) // (PIO_ELSR) Edge/Level Status Register #define PIO_FELLSR (AT91_CAST(AT91_REG *) 0x000000D0) // (PIO_FELLSR) Falling Edge/Low Level Select Register #define PIO_REHLSR (AT91_CAST(AT91_REG *) 0x000000D4) // (PIO_REHLSR) Rising Edge/ High Level Select Register #define PIO_FRLHSR (AT91_CAST(AT91_REG *) 0x000000D8) // (PIO_FRLHSR) Fall/Rise - Low/High Status Register #define PIO_LOCKSR (AT91_CAST(AT91_REG *) 0x000000E0) // (PIO_LOCKSR) Lock Status Register #define PIO_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (PIO_VER) PIO VERSION REGISTER #define PIO_KER (AT91_CAST(AT91_REG *) 0x00000120) // (PIO_KER) Keypad Controller Enable Register #define PIO_KRCR (AT91_CAST(AT91_REG *) 0x00000124) // (PIO_KRCR) Keypad Controller Row Column Register #define PIO_KDR (AT91_CAST(AT91_REG *) 0x00000128) // (PIO_KDR) Keypad Controller Debouncing Register #define PIO_KIER (AT91_CAST(AT91_REG *) 0x00000130) // (PIO_KIER) Keypad Controller Interrupt Enable Register #define PIO_KIDR (AT91_CAST(AT91_REG *) 0x00000134) // (PIO_KIDR) Keypad Controller Interrupt Disable Register #define PIO_KIMR (AT91_CAST(AT91_REG *) 0x00000138) // (PIO_KIMR) Keypad Controller Interrupt Mask Register #define PIO_KSR (AT91_CAST(AT91_REG *) 0x0000013C) // (PIO_KSR) Keypad Controller Status Register #define PIO_KKPR (AT91_CAST(AT91_REG *) 0x00000140) // (PIO_KKPR) Keypad Controller Key Press Register #define PIO_KKRR (AT91_CAST(AT91_REG *) 0x00000144) // (PIO_KKRR) Keypad Controller Key Release Register #endif // -------- PIO_KER : (PIO Offset: 0x120) Keypad Controller Enable Register -------- #define AT91C_PIO_KCE (0x1 << 0) // (PIO) Keypad Controller Enable // -------- PIO_KRCR : (PIO Offset: 0x124) Keypad Controller Row Column Register -------- #define AT91C_PIO_NBR (0x7 << 0) // (PIO) Number of Columns of the Keypad Matrix #define AT91C_PIO_NBC (0x7 << 8) // (PIO) Number of Rows of the Keypad Matrix // -------- PIO_KDR : (PIO Offset: 0x128) Keypad Controller Debouncing Register -------- #define AT91C_PIO_DBC (0x3FF << 0) // (PIO) Debouncing Value // -------- PIO_KIER : (PIO Offset: 0x130) Keypad Controller Interrupt Enable Register -------- #define AT91C_PIO_KPR (0x1 << 0) // (PIO) Key Press Interrupt Enable #define AT91C_PIO_KRL (0x1 << 1) // (PIO) Key Release Interrupt Enable // -------- PIO_KIDR : (PIO Offset: 0x134) Keypad Controller Interrupt Disable Register -------- // -------- PIO_KIMR : (PIO Offset: 0x138) Keypad Controller Interrupt Mask Register -------- // -------- PIO_KSR : (PIO Offset: 0x13c) Keypad Controller Status Register -------- #define AT91C_PIO_NBKPR (0x3 << 8) // (PIO) Number of Simultaneous Key Presses #define AT91C_PIO_NBKRL (0x3 << 16) // (PIO) Number of Simultaneous Key Releases // -------- PIO_KKPR : (PIO Offset: 0x140) Keypad Controller Key Press Register -------- #define AT91C_KEY0ROW (0x7 << 0) // (PIO) Row index of the first detected Key Press #define AT91C_KEY0COL (0x7 << 4) // (PIO) Column index of the first detected Key Press #define AT91C_KEY1ROW (0x7 << 8) // (PIO) Row index of the second detected Key Press #define AT91C_KEY1COL (0x7 << 12) // (PIO) Column index of the second detected Key Press #define AT91C_KEY2ROW (0x7 << 16) // (PIO) Row index of the third detected Key Press #define AT91C_KEY2COL (0x7 << 20) // (PIO) Column index of the third detected Key Press #define AT91C_KEY3ROW (0x7 << 24) // (PIO) Row index of the fourth detected Key Press #define AT91C_KEY3COL (0x7 << 28) // (PIO) Column index of the fourth detected Key Press // -------- PIO_KKRR : (PIO Offset: 0x144) Keypad Controller Key Release Register -------- // ***************************************************************************** // SOFTWARE API DEFINITION FOR Power Management Controler // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_PMC { AT91_REG PMC_SCER; // System Clock Enable Register AT91_REG PMC_SCDR; // System Clock Disable Register AT91_REG PMC_SCSR; // System Clock Status Register AT91_REG Reserved0[1]; // AT91_REG PMC_PCER; // Peripheral Clock Enable Register AT91_REG PMC_PCDR; // Peripheral Clock Disable Register AT91_REG PMC_PCSR; // Peripheral Clock Status Register AT91_REG PMC_UCKR; // UTMI Clock Configuration Register AT91_REG PMC_MOR; // Main Oscillator Register AT91_REG PMC_MCFR; // Main Clock Frequency Register AT91_REG PMC_PLLAR; // PLL Register AT91_REG Reserved1[1]; // AT91_REG PMC_MCKR; // Master Clock Register AT91_REG Reserved2[3]; // AT91_REG PMC_PCKR[8]; // Programmable Clock Register AT91_REG PMC_IER; // Interrupt Enable Register AT91_REG PMC_IDR; // Interrupt Disable Register AT91_REG PMC_SR; // Status Register AT91_REG PMC_IMR; // Interrupt Mask Register AT91_REG PMC_FSMR; // Fast Startup Mode Register AT91_REG PMC_FSPR; // Fast Startup Polarity Register AT91_REG PMC_FOCR; // Fault Output Clear Register AT91_REG Reserved3[28]; // AT91_REG PMC_ADDRSIZE; // PMC ADDRSIZE REGISTER AT91_REG PMC_IPNAME1; // PMC IPNAME1 REGISTER AT91_REG PMC_IPNAME2; // PMC IPNAME2 REGISTER AT91_REG PMC_FEATURES; // PMC FEATURES REGISTER AT91_REG PMC_VER; // APMC VERSION REGISTER } AT91S_PMC, *AT91PS_PMC; #else #define PMC_SCER (AT91_CAST(AT91_REG *) 0x00000000) // (PMC_SCER) System Clock Enable Register #define PMC_SCDR (AT91_CAST(AT91_REG *) 0x00000004) // (PMC_SCDR) System Clock Disable Register #define PMC_SCSR (AT91_CAST(AT91_REG *) 0x00000008) // (PMC_SCSR) System Clock Status Register #define PMC_PCER (AT91_CAST(AT91_REG *) 0x00000010) // (PMC_PCER) Peripheral Clock Enable Register #define PMC_PCDR (AT91_CAST(AT91_REG *) 0x00000014) // (PMC_PCDR) Peripheral Clock Disable Register #define PMC_PCSR (AT91_CAST(AT91_REG *) 0x00000018) // (PMC_PCSR) Peripheral Clock Status Register #define CKGR_UCKR (AT91_CAST(AT91_REG *) 0x0000001C) // (CKGR_UCKR) UTMI Clock Configuration Register #define CKGR_MOR (AT91_CAST(AT91_REG *) 0x00000020) // (CKGR_MOR) Main Oscillator Register #define CKGR_MCFR (AT91_CAST(AT91_REG *) 0x00000024) // (CKGR_MCFR) Main Clock Frequency Register #define CKGR_PLLAR (AT91_CAST(AT91_REG *) 0x00000028) // (CKGR_PLLAR) PLL Register #define PMC_MCKR (AT91_CAST(AT91_REG *) 0x00000030) // (PMC_MCKR) Master Clock Register #define PMC_PCKR (AT91_CAST(AT91_REG *) 0x00000040) // (PMC_PCKR) Programmable Clock Register #define PMC_IER (AT91_CAST(AT91_REG *) 0x00000060) // (PMC_IER) Interrupt Enable Register #define PMC_IDR (AT91_CAST(AT91_REG *) 0x00000064) // (PMC_IDR) Interrupt Disable Register #define PMC_SR (AT91_CAST(AT91_REG *) 0x00000068) // (PMC_SR) Status Register #define PMC_IMR (AT91_CAST(AT91_REG *) 0x0000006C) // (PMC_IMR) Interrupt Mask Register #define PMC_FSMR (AT91_CAST(AT91_REG *) 0x00000070) // (PMC_FSMR) Fast Startup Mode Register #define PMC_FSPR (AT91_CAST(AT91_REG *) 0x00000074) // (PMC_FSPR) Fast Startup Polarity Register #define PMC_FOCR (AT91_CAST(AT91_REG *) 0x00000078) // (PMC_FOCR) Fault Output Clear Register #define PMC_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (PMC_ADDRSIZE) PMC ADDRSIZE REGISTER #define PMC_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (PMC_IPNAME1) PMC IPNAME1 REGISTER #define PMC_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (PMC_IPNAME2) PMC IPNAME2 REGISTER #define PMC_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (PMC_FEATURES) PMC FEATURES REGISTER #define PMC_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (PMC_VER) APMC VERSION REGISTER #endif // -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- #define AT91C_PMC_PCK (0x1 << 0) // (PMC) Processor Clock #define AT91C_PMC_PCK0 (0x1 << 8) // (PMC) Programmable Clock Output #define AT91C_PMC_PCK1 (0x1 << 9) // (PMC) Programmable Clock Output #define AT91C_PMC_PCK2 (0x1 << 10) // (PMC) Programmable Clock Output // -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- // -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- // -------- CKGR_UCKR : (PMC Offset: 0x1c) UTMI Clock Configuration Register -------- #define AT91C_CKGR_UPLLEN (0x1 << 16) // (PMC) UTMI PLL Enable #define AT91C_CKGR_UPLLEN_DISABLED (0x0 << 16) // (PMC) The UTMI PLL is disabled #define AT91C_CKGR_UPLLEN_ENABLED (0x1 << 16) // (PMC) The UTMI PLL is enabled #define AT91C_CKGR_UPLLCOUNT (0xF << 20) // (PMC) UTMI Oscillator Start-up Time #define AT91C_CKGR_BIASEN (0x1 << 24) // (PMC) UTMI BIAS Enable #define AT91C_CKGR_BIASEN_DISABLED (0x0 << 24) // (PMC) The UTMI BIAS is disabled #define AT91C_CKGR_BIASEN_ENABLED (0x1 << 24) // (PMC) The UTMI BIAS is enabled #define AT91C_CKGR_BIASCOUNT (0xF << 28) // (PMC) UTMI BIAS Start-up Time // -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- #define AT91C_CKGR_MOSCXTEN (0x1 << 0) // (PMC) Main Crystal Oscillator Enable #define AT91C_CKGR_MOSCXTBY (0x1 << 1) // (PMC) Main Crystal Oscillator Bypass #define AT91C_CKGR_WAITMODE (0x1 << 2) // (PMC) Main Crystal Oscillator Bypass #define AT91C_CKGR_MOSCRCEN (0x1 << 3) // (PMC) Main On-Chip RC Oscillator Enable #define AT91C_CKGR_MOSCRCF (0x7 << 4) // (PMC) Main On-Chip RC Oscillator Frequency Selection #define AT91C_CKGR_MOSCXTST (0xFF << 8) // (PMC) Main Crystal Oscillator Start-up Time #define AT91C_CKGR_KEY (0xFF << 16) // (PMC) Clock Generator Controller Writing Protection Key #define AT91C_CKGR_MOSCSEL (0x1 << 24) // (PMC) Main Oscillator Selection #define AT91C_CKGR_CFDEN (0x1 << 25) // (PMC) Clock Failure Detector Enable // -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- #define AT91C_CKGR_MAINF (0xFFFF << 0) // (PMC) Main Clock Frequency #define AT91C_CKGR_MAINRDY (0x1 << 16) // (PMC) Main Clock Ready // -------- CKGR_PLLAR : (PMC Offset: 0x28) PLL A Register -------- #define AT91C_CKGR_DIVA (0xFF << 0) // (PMC) Divider Selected #define AT91C_CKGR_DIVA_0 (0x0) // (PMC) Divider output is 0 #define AT91C_CKGR_DIVA_BYPASS (0x1) // (PMC) Divider is bypassed #define AT91C_CKGR_PLLACOUNT (0x3F << 8) // (PMC) PLLA Counter #define AT91C_CKGR_STMODE (0x3 << 14) // (PMC) Start Mode #define AT91C_CKGR_STMODE_0 (0x0 << 14) // (PMC) Fast startup #define AT91C_CKGR_STMODE_1 (0x1 << 14) // (PMC) Reserved #define AT91C_CKGR_STMODE_2 (0x2 << 14) // (PMC) Normal startup #define AT91C_CKGR_STMODE_3 (0x3 << 14) // (PMC) Reserved #define AT91C_CKGR_MULA (0x7FF << 16) // (PMC) PLL Multiplier #define AT91C_CKGR_SRC (0x1 << 29) // (PMC) // -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- #define AT91C_PMC_CSS (0x7 << 0) // (PMC) Programmable Clock Selection #define AT91C_PMC_CSS_SLOW_CLK (0x0) // (PMC) Slow Clock is selected #define AT91C_PMC_CSS_MAIN_CLK (0x1) // (PMC) Main Clock is selected #define AT91C_PMC_CSS_PLLA_CLK (0x2) // (PMC) Clock from PLL A is selected #define AT91C_PMC_CSS_UPLL_CLK (0x3) // (PMC) Clock from UPLL is selected #define AT91C_PMC_CSS_SYS_CLK (0x4) // (PMC) System clock is selected #define AT91C_PMC_PRES (0x7 << 4) // (PMC) Programmable Clock Prescaler #define AT91C_PMC_PRES_CLK (0x0 << 4) // (PMC) Selected clock #define AT91C_PMC_PRES_CLK_2 (0x1 << 4) // (PMC) Selected clock divided by 2 #define AT91C_PMC_PRES_CLK_4 (0x2 << 4) // (PMC) Selected clock divided by 4 #define AT91C_PMC_PRES_CLK_8 (0x3 << 4) // (PMC) Selected clock divided by 8 #define AT91C_PMC_PRES_CLK_16 (0x4 << 4) // (PMC) Selected clock divided by 16 #define AT91C_PMC_PRES_CLK_32 (0x5 << 4) // (PMC) Selected clock divided by 32 #define AT91C_PMC_PRES_CLK_64 (0x6 << 4) // (PMC) Selected clock divided by 64 #define AT91C_PMC_PRES_CLK_3 (0x7 << 4) // (PMC) Selected clock divided by 3 // -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- // -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- #define AT91C_PMC_MOSCXTS (0x1 << 0) // (PMC) Main Crystal Oscillator Status/Enable/Disable/Mask #define AT91C_PMC_LOCKA (0x1 << 1) // (PMC) PLL A Status/Enable/Disable/Mask #define AT91C_PMC_MCKRDY (0x1 << 3) // (PMC) Master Clock Status/Enable/Disable/Mask #define AT91C_PMC_LOCKU (0x1 << 6) // (PMC) PLL UTMI Status/Enable/Disable/Mask #define AT91C_PMC_PCKRDY0 (0x1 << 8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask #define AT91C_PMC_PCKRDY1 (0x1 << 9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask #define AT91C_PMC_PCKRDY2 (0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask #define AT91C_PMC_MOSCSELS (0x1 << 16) // (PMC) Main Oscillator Selection Status #define AT91C_PMC_MOSCRCS (0x1 << 17) // (PMC) Main On-Chip RC Oscillator Status #define AT91C_PMC_CFDEV (0x1 << 18) // (PMC) Clock Failure Detector Event // -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- // -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- #define AT91C_PMC_OSCSELS (0x1 << 7) // (PMC) Slow Clock Oscillator Selection #define AT91C_PMC_CFDS (0x1 << 19) // (PMC) Clock Failure Detector Status #define AT91C_PMC_FOS (0x1 << 20) // (PMC) Clock Failure Detector Fault Output Status // -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- // -------- PMC_FSMR : (PMC Offset: 0x70) Fast Startup Mode Register -------- #define AT91C_PMC_FSTT (0xFFFF << 0) // (PMC) Fast Start-up Input Enable 0 to 15 #define AT91C_PMC_RTTAL (0x1 << 16) // (PMC) RTT Alarm Enable #define AT91C_PMC_RTCAL (0x1 << 17) // (PMC) RTC Alarm Enable #define AT91C_PMC_USBAL (0x1 << 18) // (PMC) USB Alarm Enable #define AT91C_PMC_LPM (0x1 << 20) // (PMC) Low Power Mode // -------- PMC_FSPR : (PMC Offset: 0x74) Fast Startup Polarity Register -------- #define AT91C_PMC_FSTP (0xFFFF << 0) // (PMC) Fast Start-up Input Polarity 0 to 15 // -------- PMC_FOCR : (PMC Offset: 0x78) Fault Output Clear Register -------- #define AT91C_PMC_FOCLR (0x1 << 0) // (PMC) Fault Output Clear // ***************************************************************************** // SOFTWARE API DEFINITION FOR Clock Generator Controler // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_CKGR { AT91_REG CKGR_UCKR; // UTMI Clock Configuration Register AT91_REG CKGR_MOR; // Main Oscillator Register AT91_REG CKGR_MCFR; // Main Clock Frequency Register AT91_REG CKGR_PLLAR; // PLL Register } AT91S_CKGR, *AT91PS_CKGR; #else #endif // -------- CKGR_UCKR : (CKGR Offset: 0x0) UTMI Clock Configuration Register -------- // -------- CKGR_MOR : (CKGR Offset: 0x4) Main Oscillator Register -------- // -------- CKGR_MCFR : (CKGR Offset: 0x8) Main Clock Frequency Register -------- // -------- CKGR_PLLAR : (CKGR Offset: 0xc) PLL A Register -------- // ***************************************************************************** // SOFTWARE API DEFINITION FOR Reset Controller Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_RSTC { AT91_REG RSTC_RCR; // Reset Control Register AT91_REG RSTC_RSR; // Reset Status Register AT91_REG RSTC_RMR; // Reset Mode Register AT91_REG Reserved0[60]; // AT91_REG RSTC_VER; // Version Register } AT91S_RSTC, *AT91PS_RSTC; #else #define RSTC_RCR (AT91_CAST(AT91_REG *) 0x00000000) // (RSTC_RCR) Reset Control Register #define RSTC_RSR (AT91_CAST(AT91_REG *) 0x00000004) // (RSTC_RSR) Reset Status Register #define RSTC_RMR (AT91_CAST(AT91_REG *) 0x00000008) // (RSTC_RMR) Reset Mode Register #define RSTC_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (RSTC_VER) Version Register #endif // -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- #define AT91C_RSTC_PROCRST (0x1 << 0) // (RSTC) Processor Reset #define AT91C_RSTC_ICERST (0x1 << 1) // (RSTC) ICE Interface Reset #define AT91C_RSTC_PERRST (0x1 << 2) // (RSTC) Peripheral Reset #define AT91C_RSTC_EXTRST (0x1 << 3) // (RSTC) External Reset #define AT91C_RSTC_KEY (0xA5 << 24) // (RSTC) Password // -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- #define AT91C_RSTC_URSTS (0x1 << 0) // (RSTC) User Reset Status #define AT91C_RSTC_RSTTYP (0x7 << 8) // (RSTC) Reset Type #define AT91C_RSTC_RSTTYP_GENERAL (0x0 << 8) // (RSTC) General reset. Both VDDCORE and VDDBU rising. #define AT91C_RSTC_RSTTYP_WAKEUP (0x1 << 8) // (RSTC) WakeUp Reset. VDDCORE rising. #define AT91C_RSTC_RSTTYP_WATCHDOG (0x2 << 8) // (RSTC) Watchdog Reset. Watchdog overflow occured. #define AT91C_RSTC_RSTTYP_SOFTWARE (0x3 << 8) // (RSTC) Software Reset. Processor reset required by the software. #define AT91C_RSTC_RSTTYP_USER (0x4 << 8) // (RSTC) User Reset. NRST pin detected low. #define AT91C_RSTC_NRSTL (0x1 << 16) // (RSTC) NRST pin level #define AT91C_RSTC_SRCMP (0x1 << 17) // (RSTC) Software Reset Command in Progress. // -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- #define AT91C_RSTC_URSTEN (0x1 << 0) // (RSTC) User Reset Enable #define AT91C_RSTC_URSTIEN (0x1 << 4) // (RSTC) User Reset Interrupt Enable #define AT91C_RSTC_ERSTL (0xF << 8) // (RSTC) User Reset Enable // ***************************************************************************** // SOFTWARE API DEFINITION FOR Supply Controller Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_SUPC { AT91_REG SUPC_CR; // Supply Controller Control Register AT91_REG SUPC_SMMR; // Supply Controller Supply Monitor Mode Register AT91_REG SUPC_MR; // Supply Controller Mode Register AT91_REG SUPC_WUMR; // Supply Controller Wake Up Mode Register AT91_REG SUPC_WUIR; // Supply Controller Wake Up Inputs Register AT91_REG SUPC_SR; // Supply Controller Status Register } AT91S_SUPC, *AT91PS_SUPC; #else #define SUPC_CR (AT91_CAST(AT91_REG *) 0x00000000) // Supply Controller Control Register #define SUPC_SMMR (AT91_CAST(AT91_REG *) 0x00000004) // Supply Controller Supply Monitor Mode Register #define SUPC_MR (AT91_CAST(AT91_REG *) 0x00000008) // Supply Controller Mode Register #define SUPC_WUMR (AT91_CAST(AT91_REG *) 0x0000000C) // Supply Controller Wake Up Mode Register #define SUPC_WUIR (AT91_CAST(AT91_REG *) 0x00000010) // Supply Controller Wake Up Inputs Register #define SUPC_SR (AT91_CAST(AT91_REG *) 0x00000014) // Supply Controller Status Register #endif // -------- SUPC_CR : (SUPC Offset: 0x00) Supply Controller Control Register -------- #define AT91C_SUPC_CR_VROFF (0x1 << 2) // (SUPC) Voltage Regulator Off #define AT91C_SUPC_CR_VROFF_NO_EFFECT (0x0 << 2) // (SUPC) no effect. #define AT91C_SUPC_CR_VROFF_STOP_VREG (0x1 << 2) // (SUPC) if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. #define AT91C_SUPC_CR_XTALSEL (0x1 << 3) // (SUPC) Crystal Oscillator Select #define AT91C_SUPC_CR_XTALSEL_NO_EFFECT (0x0 << 3) // (SUPC) no effect. #define AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL (0x1 << 3) // (SUPC) if KEY is correct, switches the slow clock on the crystal oscillator output. #define AT91C_SUPC_CR_KEY (0xA5 << 24) // (SUPC) Password // -------- SUPC_SMMR : (SUPC Offset: 0x04) Supply Controller Supply Monitor Mode Register -------- #define AT91C_SUPC_SMMR_SMTH (0xf << 0) // (SUPC) Supply Monitor Threshold #define AT91C_SUPC_SMMR_SMTH_1_9V (0x0 << 0) // (SUPC) 1.9 V #define AT91C_SUPC_SMMR_SMTH_2_0V (0x1 << 0) // (SUPC) 2.0 V #define AT91C_SUPC_SMMR_SMTH_2_1V (0x2 << 0) // (SUPC) 2.1 V #define AT91C_SUPC_SMMR_SMTH_2_2V (0x3 << 0) // (SUPC) 2.2 V #define AT91C_SUPC_SMMR_SMTH_2_3V (0x4 << 0) // (SUPC) 2.3 V #define AT91C_SUPC_SMMR_SMTH_2_4V (0x5 << 0) // (SUPC) 2.4 V #define AT91C_SUPC_SMMR_SMTH_2_5V (0x6 << 0) // (SUPC) 2.5 V #define AT91C_SUPC_SMMR_SMTH_2_6V (0x7 << 0) // (SUPC) 2.6 V #define AT91C_SUPC_SMMR_SMTH_2_7V (0x8 << 0) // (SUPC) 2.7 V #define AT91C_SUPC_SMMR_SMTH_2_8V (0x9 << 0) // (SUPC) 2.8 V #define AT91C_SUPC_SMMR_SMTH_2_9V (0xA << 0) // (SUPC) 2.9 V #define AT91C_SUPC_SMMR_SMTH_3_0V (0xB << 0) // (SUPC) 3.0 V #define AT91C_SUPC_SMMR_SMTH_3_1V (0xC << 0) // (SUPC) 3.1 V #define AT91C_SUPC_SMMR_SMTH_3_2V (0xD << 0) // (SUPC) 3.2 V #define AT91C_SUPC_SMMR_SMTH_3_3V (0xE << 0) // (SUPC) 3.3 V #define AT91C_SUPC_SMMR_SMTH_3_4V (0xF << 0) // (SUPC) 3.4 V #define AT91C_SUPC_SMMR_SMSMPL (0x7 << 8) // (SUPC) Supply Monitor Sampling Period #define AT91C_SUPC_SMMR_SMSMPL_SMD (0x0 << 8) // (SUPC) Supply Monitor disabled #define AT91C_SUPC_SMMR_SMSMPL_CSM (0x1 << 8) // (SUPC) Continuous Supply Monitor #define AT91C_SUPC_SMMR_SMSMPL_32SLCK (0x2 << 8) // (SUPC) Supply Monitor enabled one SLCK period every 32 SLCK periods #define AT91C_SUPC_SMMR_SMSMPL_256SLCK (0x3 << 8) // (SUPC) Supply Monitor enabled one SLCK period every 256 SLCK periods #define AT91C_SUPC_SMMR_SMSMPL_2048SLCK (0x4 << 8) // (SUPC) Supply Monitor enabled one SLCK period every 2,048 SLCK periods #define AT91C_SUPC_SMMR_SMRSTEN (0x1 << 12) // (SUPC) Supply Monitor Reset Enable #define AT91C_SUPC_SMMR_SMRSTEN_NOT_ENABLE (0x0 << 12) // (SUPC) the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs. #define AT91C_SUPC_SMMR_SMRSTEN_ENABLE (0x1 << 12) // (SUPC) the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs. #define AT91C_SUPC_SMMR_SMIEN (0x1 << 13) // (SUPC) Supply Monitor Interrupt Enable #define AT91C_SUPC_SMMR_SMIEN_NOT_ENABLE (0x0 << 13) // (SUPC) the SUPC interrupt signal is not affected when a supply monitor detection occurs. #define AT91C_SUPC_SMMR_SMIEN_ENABLE (0x1 << 13) // (SUPC) the SUPC interrupt signal is asserted when a supply monitor detection occurs. // -------- SUPC_MR : (SUPC Offset: 0x08) Supply Controller Mode Register -------- #define AT91C_SUPC_MR_BODRSTEN (0x1 << 12) // (SUPC) Brownout Detector Reset Enable #define AT91C_SUPC_MR_BODRSTEN_NOT_ENABLE (0x0 << 12) // (SUPC) the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs. #define AT91C_SUPC_MR_BODRSTEN_ENABLE (0x1 << 12) // (SUPC) the core reset signal, vddcore_nreset is asserted when a brownout detection occurs. #define AT91C_SUPC_MR_BODDIS (0x1 << 13) // (SUPC) Brownout Detector Disable #define AT91C_SUPC_MR_BODDIS_ENABLE (0x0 << 13) // (SUPC) the core brownout detector is enabled. #define AT91C_SUPC_MR_BODDIS_DISABLE (0x1 << 13) // (SUPC) the core brownout detector is disabled. #define AT91C_SUPC_MR_VDDIORDY (0x1 << 14) // (SUPC) VDDIO Ready #define AT91C_SUPC_MR_VDDIORDY_VDDIO_REMOVED (0x0 << 14) // (SUPC) VDDIO is removed (used before going to backup mode when backup batteries are used) #define AT91C_SUPC_MR_VDDIORDY_VDDIO_PRESENT (0x1 << 14) // (SUPC) VDDIO is present (used before going to backup mode when backup batteries are used) #define AT91C_SUPC_MR_OSCBYPASS (0x1 << 20) // (SUPC) Oscillator Bypass #define AT91C_SUPC_MR_OSCBYPASS_NO_EFFECT (0x0 << 20) // (SUPC) no effect. Clock selection depends on XTALSEL value. #define AT91C_SUPC_MR_OSCBYPASS_BYPASS (0x1 << 20) // (SUPC) the 32-KHz XTAL oscillator is selected and is put in bypass mode. #define AT91C_SUPC_MR_KEY (0xff << 24) // (SUPC) Password Key // -------- SUPC_WUMR : (SUPC Offset: 0x0C) Supply Controller Wake Up Mode Register -------- #define AT91C_SUPC_WUMR_FWUPEN (0x1 << 0) // (SUPC) Force Wake Up Enable #define AT91C_SUPC_WUMR_FWUPEN_NOT_ENABLE (0x0 << 0) // (SUPC) the Force Wake Up pin has no wake up effect. #define AT91C_SUPC_WUMR_FWUPEN_ENABLE (0x1 << 0) // (SUPC) the Force Wake Up pin low forces the wake up of the core power supply. #define AT91C_SUPC_WUMR_SMEN (0x1 << 1) // (SUPC) Supply Monitor Wake Up Enable #define AT91C_SUPC_WUMR_SMEN_NOT_ENABLE (0x0 << 1) // (SUPC) the supply monitor detection has no wake up effect. #define AT91C_SUPC_WUMR_SMEN_ENABLE (0x1 << 1) // (SUPC) the supply monitor detection forces the wake up of the core power supply. #define AT91C_SUPC_WUMR_RTTEN (0x1 << 2) // (SUPC) Real Time Timer Wake Up Enable #define AT91C_SUPC_WUMR_RTTEN_NOT_ENABLE (0x0 << 2) // (SUPC) the RTT alarm signal has no wake up effect. #define AT91C_SUPC_WUMR_RTTEN_ENABLE (0x1 << 2) // (SUPC) the RTT alarm signal forces the wake up of the core power supply. #define AT91C_SUPC_WUMR_RTCEN (0x1 << 3) // (SUPC) Real Time Clock Wake Up Enable #define AT91C_SUPC_WUMR_RTCEN_NOT_ENABLE (0x0 << 3) // (SUPC) the RTC alarm signal has no wake up effect. #define AT91C_SUPC_WUMR_RTCEN_ENABLE (0x1 << 3) // (SUPC) the RTC alarm signal forces the wake up of the core power supply. #define AT91C_SUPC_WUMR_FWUPDBC (0x7 << 8) // (SUPC) Force Wake Up Debouncer #define AT91C_SUPC_WUMR_FWUPDBC_1SCLK (0x0 << 8) // (SUPC) Immediate, no debouncing, detected active at least on one Slow Clock edge. #define AT91C_SUPC_WUMR_FWUPDBC_3SCLK (0x1 << 8) // (SUPC) FWUP shall be low for at least 3 SLCK periods #define AT91C_SUPC_WUMR_FWUPDBC_32SCLK (0x2 << 8) // (SUPC) FWUP shall be low for at least 32 SLCK periods #define AT91C_SUPC_WUMR_FWUPDBC_512SCLK (0x3 << 8) // (SUPC) FWUP shall be low for at least 512 SLCK periods #define AT91C_SUPC_WUMR_FWUPDBC_4096SCLK (0x4 << 8) // (SUPC) FWUP shall be low for at least 4,096 SLCK periods #define AT91C_SUPC_WUMR_FWUPDBC_32768SCLK (0x5 << 8) // (SUPC) FWUP shall be low for at least 32,768 SLCK periods #define AT91C_SUPC_WUMR_WKUPDBC (0x7 << 12) // (SUPC) Wake Up Inputs Debouncer #define AT91C_SUPC_WUMR_WKUPDBC_1SCLK (0x0 << 12) // (SUPC) Immediate, no debouncing, detected active at least on one Slow Clock edge. #define AT91C_SUPC_WUMR_WKUPDBC_3SCLK (0x1 << 12) // (SUPC) An enabled wake-up input shall be active for at least 3 SLCK periods #define AT91C_SUPC_WUMR_WKUPDBC_32SCLK (0x2 << 12) // (SUPC) An enabled wake-up input shall be active for at least 32 SLCK periods #define AT91C_SUPC_WUMR_WKUPDBC_512SCLK (0x3 << 12) // (SUPC) An enabled wake-up input shall be active for at least 512 SLCK periods #define AT91C_SUPC_WUMR_WKUPDBC_4096SCLK (0x4 << 12) // (SUPC) An enabled wake-up input shall be active for at least 4,096 SLCK periods #define AT91C_SUPC_WUMR_WKUPDBC_32768SCLK (0x5 << 12) // (SUPC) An enabled wake-up input shall be active for at least 32,768 SLCK periods // -------- SUPC_WUIR : (SUPC Offset: 0x10) Supply Controller Wake Up Inputs Register -------- #define AT91C_SUPC_WUIR_WKUPEN0 (0x1 << 0) // (SUPC) Wake Up Input Enable 0 #define AT91C_SUPC_WUIR_WKUPEN0_NOT_ENABLE (0x0 << 0) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN0_ENABLE (0x1 << 0) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN1 (0x1 << 1) // (SUPC) Wake Up Input Enable 1 #define AT91C_SUPC_WUIR_WKUPEN1_NOT_ENABLE (0x0 << 1) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN1_ENABLE (0x1 << 1) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN2 (0x1 << 2) // (SUPC) Wake Up Input Enable 2 #define AT91C_SUPC_WUIR_WKUPEN2_NOT_ENABLE (0x0 << 2) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN2_ENABLE (0x1 << 2) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN3 (0x1 << 3) // (SUPC) Wake Up Input Enable 3 #define AT91C_SUPC_WUIR_WKUPEN3_NOT_ENABLE (0x0 << 3) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN3_ENABLE (0x1 << 3) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN4 (0x1 << 4) // (SUPC) Wake Up Input Enable 4 #define AT91C_SUPC_WUIR_WKUPEN4_NOT_ENABLE (0x0 << 4) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN4_ENABLE (0x1 << 4) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN5 (0x1 << 5) // (SUPC) Wake Up Input Enable 5 #define AT91C_SUPC_WUIR_WKUPEN5_NOT_ENABLE (0x0 << 5) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN5_ENABLE (0x1 << 5) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN6 (0x1 << 6) // (SUPC) Wake Up Input Enable 6 #define AT91C_SUPC_WUIR_WKUPEN6_NOT_ENABLE (0x0 << 6) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN6_ENABLE (0x1 << 6) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN7 (0x1 << 7) // (SUPC) Wake Up Input Enable 7 #define AT91C_SUPC_WUIR_WKUPEN7_NOT_ENABLE (0x0 << 7) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN7_ENABLE (0x1 << 7) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN8 (0x1 << 8) // (SUPC) Wake Up Input Enable 8 #define AT91C_SUPC_WUIR_WKUPEN8_NOT_ENABLE (0x0 << 8) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN8_ENABLE (0x1 << 8) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN9 (0x1 << 9) // (SUPC) Wake Up Input Enable 9 #define AT91C_SUPC_WUIR_WKUPEN9_NOT_ENABLE (0x0 << 9) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN9_ENABLE (0x1 << 9) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN10 (0x1 << 10) // (SUPC) Wake Up Input Enable 10 #define AT91C_SUPC_WUIR_WKUPEN10_NOT_ENABLE (0x0 << 10) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN10_ENABLE (0x1 << 10) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN11 (0x1 << 11) // (SUPC) Wake Up Input Enable 11 #define AT91C_SUPC_WUIR_WKUPEN11_NOT_ENABLE (0x0 << 11) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN11_ENABLE (0x1 << 11) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN12 (0x1 << 12) // (SUPC) Wake Up Input Enable 12 #define AT91C_SUPC_WUIR_WKUPEN12_NOT_ENABLE (0x0 << 12) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN12_ENABLE (0x1 << 12) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN13 (0x1 << 13) // (SUPC) Wake Up Input Enable 13 #define AT91C_SUPC_WUIR_WKUPEN13_NOT_ENABLE (0x0 << 13) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN13_ENABLE (0x1 << 13) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN14 (0x1 << 14) // (SUPC) Wake Up Input Enable 14 #define AT91C_SUPC_WUIR_WKUPEN14_NOT_ENABLE (0x0 << 14) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN14_ENABLE (0x1 << 14) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPEN15 (0x1 << 15) // (SUPC) Wake Up Input Enable 15 #define AT91C_SUPC_WUIR_WKUPEN15_NOT_ENABLE (0x0 << 15) // (SUPC) the corresponding wake-up input has no wake up effect. #define AT91C_SUPC_WUIR_WKUPEN15_ENABLE (0x1 << 15) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT0 (0x1 << 16) // (SUPC) Wake Up Input Transition 0 #define AT91C_SUPC_WUIR_WKUPT0_HIGH_TO_LOW (0x0 << 16) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT0_LOW_TO_HIGH (0x1 << 16) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT1 (0x1 << 17) // (SUPC) Wake Up Input Transition 1 #define AT91C_SUPC_WUIR_WKUPT1_HIGH_TO_LOW (0x0 << 17) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT1_LOW_TO_HIGH (0x1 << 17) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT2 (0x1 << 18) // (SUPC) Wake Up Input Transition 2 #define AT91C_SUPC_WUIR_WKUPT2_HIGH_TO_LOW (0x0 << 18) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT2_LOW_TO_HIGH (0x1 << 18) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT3 (0x1 << 19) // (SUPC) Wake Up Input Transition 3 #define AT91C_SUPC_WUIR_WKUPT3_HIGH_TO_LOW (0x0 << 19) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT3_LOW_TO_HIGH (0x1 << 19) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT4 (0x1 << 20) // (SUPC) Wake Up Input Transition 4 #define AT91C_SUPC_WUIR_WKUPT4_HIGH_TO_LOW (0x0 << 20) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT4_LOW_TO_HIGH (0x1 << 20) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT5 (0x1 << 21) // (SUPC) Wake Up Input Transition 5 #define AT91C_SUPC_WUIR_WKUPT5_HIGH_TO_LOW (0x0 << 21) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT5_LOW_TO_HIGH (0x1 << 21) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT6 (0x1 << 22) // (SUPC) Wake Up Input Transition 6 #define AT91C_SUPC_WUIR_WKUPT6_HIGH_TO_LOW (0x0 << 22) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT6_LOW_TO_HIGH (0x1 << 22) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT7 (0x1 << 23) // (SUPC) Wake Up Input Transition 7 #define AT91C_SUPC_WUIR_WKUPT7_HIGH_TO_LOW (0x0 << 23) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT7_LOW_TO_HIGH (0x1 << 23) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT8 (0x1 << 24) // (SUPC) Wake Up Input Transition 8 #define AT91C_SUPC_WUIR_WKUPT8_HIGH_TO_LOW (0x0 << 24) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT8_LOW_TO_HIGH (0x1 << 24) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT9 (0x1 << 25) // (SUPC) Wake Up Input Transition 9 #define AT91C_SUPC_WUIR_WKUPT9_HIGH_TO_LOW (0x0 << 25) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT9_LOW_TO_HIGH (0x1 << 25) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT10 (0x1 << 26) // (SUPC) Wake Up Input Transition 10 #define AT91C_SUPC_WUIR_WKUPT10_HIGH_TO_LOW (0x0 << 26) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT10_LOW_TO_HIGH (0x1 << 26) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT11 (0x1 << 27) // (SUPC) Wake Up Input Transition 11 #define AT91C_SUPC_WUIR_WKUPT11_HIGH_TO_LOW (0x0 << 27) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT11_LOW_TO_HIGH (0x1 << 27) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT12 (0x1 << 28) // (SUPC) Wake Up Input Transition 12 #define AT91C_SUPC_WUIR_WKUPT12_HIGH_TO_LOW (0x0 << 28) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT12_LOW_TO_HIGH (0x1 << 28) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT13 (0x1 << 29) // (SUPC) Wake Up Input Transition 13 #define AT91C_SUPC_WUIR_WKUPT13_HIGH_TO_LOW (0x0 << 29) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT13_LOW_TO_HIGH (0x1 << 29) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT14 (0x1 << 30) // (SUPC) Wake Up Input Transition 14 #define AT91C_SUPC_WUIR_WKUPT14_HIGH_TO_LOW (0x0 << 30) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT14_LOW_TO_HIGH (0x1 << 30) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT15 (0x1 << 31) // (SUPC) Wake Up Input Transition 15 #define AT91C_SUPC_WUIR_WKUPT15_HIGH_TO_LOW (0x0 << 31) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. #define AT91C_SUPC_WUIR_WKUPT15_LOW_TO_HIGH (0x1 << 31) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. // -------- SUPC_SR : (SUPC Offset: 0x14) Supply Controller Status Register -------- #define AT91C_SUPC_SR_FWUPS (0x1 << 0) // (SUPC) FWUP Wake Up Status #define AT91C_SUPC_SR_FWUPS_NO (0x0 << 0) // (SUPC) no wake up due to the assertion of the FWUP pin has occurred since the last read of SUPC_SR. #define AT91C_SUPC_SR_FWUPS_PRESENT (0x1 << 0) // (SUPC) at least one wake up due to the assertion of the FWUP pin has occurred since the last read of SUPC_SR. #define AT91C_SUPC_SR_WKUPS (0x1 << 1) // (SUPC) WKUP Wake Up Status #define AT91C_SUPC_SR_WKUPS_NO (0x0 << 1) // (SUPC) no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. #define AT91C_SUPC_SR_WKUPS_PRESENT (0x1 << 1) // (SUPC) at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. #define AT91C_SUPC_SR_SMWS (0x1 << 2) // (SUPC) Supply Monitor Detection Wake Up Status #define AT91C_SUPC_SR_SMWS_NO (0x0 << 2) // (SUPC) no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. #define AT91C_SUPC_SR_SMWS_PRESENT (0x1 << 2) // (SUPC) at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. #define AT91C_SUPC_SR_BODRSTS (0x1 << 3) // (SUPC) Brownout Detector Reset Status #define AT91C_SUPC_SR_BODRSTS_NO (0x0 << 3) // (SUPC) no core brownout detection has generated a core reset since the last read of the SUPC_SR. #define AT91C_SUPC_SR_BODRSTS_PRESENT (0x1 << 3) // (SUPC) at least one core brownout detection has generated a core reset since the last read of the SUPC_SR. #define AT91C_SUPC_SR_SMRSTS (0x1 << 4) // (SUPC) Supply Monitor Reset Status #define AT91C_SUPC_SR_SMRSTS_NO (0x0 << 4) // (SUPC) no supply monitor detection has generated a core reset since the last read of the SUPC_SR. #define AT91C_SUPC_SR_SMRSTS_PRESENT (0x1 << 4) // (SUPC) at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. #define AT91C_SUPC_SR_SMS (0x1 << 5) // (SUPC) Supply Monitor Status #define AT91C_SUPC_SR_SMS_NO (0x0 << 5) // (SUPC) no supply monitor detection since the last read of SUPC_SR. #define AT91C_SUPC_SR_SMS_PRESENT (0x1 << 5) // (SUPC) at least one supply monitor detection since the last read of SUPC_SR. #define AT91C_SUPC_SR_SMOS (0x1 << 6) // (SUPC) Supply Monitor Output Status #define AT91C_SUPC_SR_SMOS_HIGH (0x0 << 6) // (SUPC) the supply monitor detected VDDUTMI higher than its threshold at its last measurement. #define AT91C_SUPC_SR_SMOS_LOW (0x1 << 6) // (SUPC) the supply monitor detected VDDUTMI lower than its threshold at its last measurement. #define AT91C_SUPC_SR_OSCSEL (0x1 << 7) // (SUPC) 32-kHz Oscillator Selection Status #define AT91C_SUPC_SR_OSCSEL_RC (0x0 << 7) // (SUPC) the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. #define AT91C_SUPC_SR_OSCSEL_CRYST (0x1 << 7) // (SUPC) the slow clock, SLCK is generated by the 32-kHz crystal oscillator. #define AT91C_SUPC_SR_FWUPIS (0x1 << 12) // (SUPC) FWUP Input Status #define AT91C_SUPC_SR_FWUPIS_LOW (0x0 << 12) // (SUPC) FWUP input is tied low. #define AT91C_SUPC_SR_FWUPIS_HIGH (0x1 << 12) // (SUPC) FWUP input is tied high. #define AT91C_SUPC_SR_WKUPIS0 (0x1 << 16) // (SUPC) WKUP Input Status 0 #define AT91C_SUPC_SR_WKUPIS0_DIS (0x0 << 16) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS0_EN (0x1 << 16) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS1 (0x1 << 17) // (SUPC) WKUP Input Status 1 #define AT91C_SUPC_SR_WKUPIS1_DIS (0x0 << 17) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS1_EN (0x1 << 17) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS2 (0x1 << 18) // (SUPC) WKUP Input Status 2 #define AT91C_SUPC_SR_WKUPIS2_DIS (0x0 << 18) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS2_EN (0x1 << 18) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS3 (0x1 << 19) // (SUPC) WKUP Input Status 3 #define AT91C_SUPC_SR_WKUPIS3_DIS (0x0 << 19) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS3_EN (0x1 << 19) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS4 (0x1 << 20) // (SUPC) WKUP Input Status 4 #define AT91C_SUPC_SR_WKUPIS4_DIS (0x0 << 20) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS4_EN (0x1 << 20) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS5 (0x1 << 21) // (SUPC) WKUP Input Status 5 #define AT91C_SUPC_SR_WKUPIS5_DIS (0x0 << 21) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS5_EN (0x1 << 21) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS6 (0x1 << 22) // (SUPC) WKUP Input Status 6 #define AT91C_SUPC_SR_WKUPIS6_DIS (0x0 << 22) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS6_EN (0x1 << 22) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS7 (0x1 << 23) // (SUPC) WKUP Input Status 7 #define AT91C_SUPC_SR_WKUPIS7_DIS (0x0 << 23) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS7_EN (0x1 << 23) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS8 (0x1 << 24) // (SUPC) WKUP Input Status 8 #define AT91C_SUPC_SR_WKUPIS8_DIS (0x0 << 24) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS8_EN (0x1 << 24) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS9 (0x1 << 25) // (SUPC) WKUP Input Status 9 #define AT91C_SUPC_SR_WKUPIS9_DIS (0x0 << 25) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS9_EN (0x1 << 25) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS10 (0x1 << 26) // (SUPC) WKUP Input Status 10 #define AT91C_SUPC_SR_WKUPIS10_DIS (0x0 << 26) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS10_EN (0x1 << 26) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS11 (0x1 << 27) // (SUPC) WKUP Input Status 11 #define AT91C_SUPC_SR_WKUPIS11_DIS (0x0 << 27) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS11_EN (0x1 << 27) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS12 (0x1 << 28) // (SUPC) WKUP Input Status 12 #define AT91C_SUPC_SR_WKUPIS12_DIS (0x0 << 28) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS12_EN (0x1 << 28) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS13 (0x1 << 29) // (SUPC) WKUP Input Status 13 #define AT91C_SUPC_SR_WKUPIS13_DIS (0x0 << 29) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS13_EN (0x1 << 29) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS14 (0x1 << 30) // (SUPC) WKUP Input Status 14 #define AT91C_SUPC_SR_WKUPIS14_DIS (0x0 << 30) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS14_EN (0x1 << 30) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS15 (0x1 << 31) // (SUPC) WKUP Input Status 15 #define AT91C_SUPC_SR_WKUPIS15_DIS (0x0 << 31) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. #define AT91C_SUPC_SR_WKUPIS15_EN (0x1 << 31) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. // ***************************************************************************** // SOFTWARE API DEFINITION FOR Real Time Timer Controller Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_RTTC { AT91_REG RTTC_RTMR; // Real-time Mode Register AT91_REG RTTC_RTAR; // Real-time Alarm Register AT91_REG RTTC_RTVR; // Real-time Value Register AT91_REG RTTC_RTSR; // Real-time Status Register } AT91S_RTTC, *AT91PS_RTTC; #else #define RTTC_RTMR (AT91_CAST(AT91_REG *) 0x00000000) // (RTTC_RTMR) Real-time Mode Register #define RTTC_RTAR (AT91_CAST(AT91_REG *) 0x00000004) // (RTTC_RTAR) Real-time Alarm Register #define RTTC_RTVR (AT91_CAST(AT91_REG *) 0x00000008) // (RTTC_RTVR) Real-time Value Register #define RTTC_RTSR (AT91_CAST(AT91_REG *) 0x0000000C) // (RTTC_RTSR) Real-time Status Register #endif // -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- #define AT91C_RTTC_RTPRES (0xFFFF << 0) // (RTTC) Real-time Timer Prescaler Value #define AT91C_RTTC_ALMIEN (0x1 << 16) // (RTTC) Alarm Interrupt Enable #define AT91C_RTTC_RTTINCIEN (0x1 << 17) // (RTTC) Real Time Timer Increment Interrupt Enable #define AT91C_RTTC_RTTRST (0x1 << 18) // (RTTC) Real Time Timer Restart // -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- #define AT91C_RTTC_ALMV (0x0 << 0) // (RTTC) Alarm Value // -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- #define AT91C_RTTC_CRTV (0x0 << 0) // (RTTC) Current Real-time Value // -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- #define AT91C_RTTC_ALMS (0x1 << 0) // (RTTC) Real-time Alarm Status #define AT91C_RTTC_RTTINC (0x1 << 1) // (RTTC) Real-time Timer Increment // ***************************************************************************** // SOFTWARE API DEFINITION FOR Watchdog Timer Controller Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_WDTC { AT91_REG WDTC_WDCR; // Watchdog Control Register AT91_REG WDTC_WDMR; // Watchdog Mode Register AT91_REG WDTC_WDSR; // Watchdog Status Register } AT91S_WDTC, *AT91PS_WDTC; #else #define WDTC_WDCR (AT91_CAST(AT91_REG *) 0x00000000) // (WDTC_WDCR) Watchdog Control Register #define WDTC_WDMR (AT91_CAST(AT91_REG *) 0x00000004) // (WDTC_WDMR) Watchdog Mode Register #define WDTC_WDSR (AT91_CAST(AT91_REG *) 0x00000008) // (WDTC_WDSR) Watchdog Status Register #endif // -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- #define AT91C_WDTC_WDRSTT (0x1 << 0) // (WDTC) Watchdog Restart #define AT91C_WDTC_KEY (0xFF << 24) // (WDTC) Watchdog KEY Password // -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- #define AT91C_WDTC_WDV (0xFFF << 0) // (WDTC) Watchdog Timer Restart #define AT91C_WDTC_WDFIEN (0x1 << 12) // (WDTC) Watchdog Fault Interrupt Enable #define AT91C_WDTC_WDRSTEN (0x1 << 13) // (WDTC) Watchdog Reset Enable #define AT91C_WDTC_WDRPROC (0x1 << 14) // (WDTC) Watchdog Timer Restart #define AT91C_WDTC_WDDIS (0x1 << 15) // (WDTC) Watchdog Disable #define AT91C_WDTC_WDD (0xFFF << 16) // (WDTC) Watchdog Delta Value #define AT91C_WDTC_WDDBGHLT (0x1 << 28) // (WDTC) Watchdog Debug Halt #define AT91C_WDTC_WDIDLEHLT (0x1 << 29) // (WDTC) Watchdog Idle Halt // -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- #define AT91C_WDTC_WDUNF (0x1 << 0) // (WDTC) Watchdog Underflow #define AT91C_WDTC_WDERR (0x1 << 1) // (WDTC) Watchdog Error // ***************************************************************************** // SOFTWARE API DEFINITION FOR Real-time Clock Alarm and Parallel Load Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_RTC { AT91_REG RTC_CR; // Control Register AT91_REG RTC_MR; // Mode Register AT91_REG RTC_TIMR; // Time Register AT91_REG RTC_CALR; // Calendar Register AT91_REG RTC_TIMALR; // Time Alarm Register AT91_REG RTC_CALALR; // Calendar Alarm Register AT91_REG RTC_SR; // Status Register AT91_REG RTC_SCCR; // Status Clear Command Register AT91_REG RTC_IER; // Interrupt Enable Register AT91_REG RTC_IDR; // Interrupt Disable Register AT91_REG RTC_IMR; // Interrupt Mask Register AT91_REG RTC_VER; // Valid Entry Register } AT91S_RTC, *AT91PS_RTC; #else #define RTC_CR (AT91_CAST(AT91_REG *) 0x00000000) // (RTC_CR) Control Register #define RTC_MR (AT91_CAST(AT91_REG *) 0x00000004) // (RTC_MR) Mode Register #define RTC_TIMR (AT91_CAST(AT91_REG *) 0x00000008) // (RTC_TIMR) Time Register #define RTC_CALR (AT91_CAST(AT91_REG *) 0x0000000C) // (RTC_CALR) Calendar Register #define RTC_TIMALR (AT91_CAST(AT91_REG *) 0x00000010) // (RTC_TIMALR) Time Alarm Register #define RTC_CALALR (AT91_CAST(AT91_REG *) 0x00000014) // (RTC_CALALR) Calendar Alarm Register #define RTC_SR (AT91_CAST(AT91_REG *) 0x00000018) // (RTC_SR) Status Register #define RTC_SCCR (AT91_CAST(AT91_REG *) 0x0000001C) // (RTC_SCCR) Status Clear Command Register #define RTC_IER (AT91_CAST(AT91_REG *) 0x00000020) // (RTC_IER) Interrupt Enable Register #define RTC_IDR (AT91_CAST(AT91_REG *) 0x00000024) // (RTC_IDR) Interrupt Disable Register #define RTC_IMR (AT91_CAST(AT91_REG *) 0x00000028) // (RTC_IMR) Interrupt Mask Register #define RTC_VER (AT91_CAST(AT91_REG *) 0x0000002C) // (RTC_VER) Valid Entry Register #endif // -------- RTC_CR : (RTC Offset: 0x0) RTC Control Register -------- #define AT91C_RTC_UPDTIM (0x1 << 0) // (RTC) Update Request Time Register #define AT91C_RTC_UPDCAL (0x1 << 1) // (RTC) Update Request Calendar Register #define AT91C_RTC_TIMEVSEL (0x3 << 8) // (RTC) Time Event Selection #define AT91C_RTC_TIMEVSEL_MINUTE (0x0 << 8) // (RTC) Minute change. #define AT91C_RTC_TIMEVSEL_HOUR (0x1 << 8) // (RTC) Hour change. #define AT91C_RTC_TIMEVSEL_DAY24 (0x2 << 8) // (RTC) Every day at midnight. #define AT91C_RTC_TIMEVSEL_DAY12 (0x3 << 8) // (RTC) Every day at noon. #define AT91C_RTC_CALEVSEL (0x3 << 16) // (RTC) Calendar Event Selection #define AT91C_RTC_CALEVSEL_WEEK (0x0 << 16) // (RTC) Week change (every Monday at time 00:00:00). #define AT91C_RTC_CALEVSEL_MONTH (0x1 << 16) // (RTC) Month change (every 01 of each month at time 00:00:00). #define AT91C_RTC_CALEVSEL_YEAR (0x2 << 16) // (RTC) Year change (every January 1 at time 00:00:00). // -------- RTC_MR : (RTC Offset: 0x4) RTC Mode Register -------- #define AT91C_RTC_HRMOD (0x1 << 0) // (RTC) 12-24 hour Mode // -------- RTC_TIMR : (RTC Offset: 0x8) RTC Time Register -------- #define AT91C_RTC_SEC (0x7F << 0) // (RTC) Current Second #define AT91C_RTC_MIN (0x7F << 8) // (RTC) Current Minute #define AT91C_RTC_HOUR (0x3F << 16) // (RTC) Current Hour #define AT91C_RTC_AMPM (0x1 << 22) // (RTC) Ante Meridiem, Post Meridiem Indicator // -------- RTC_CALR : (RTC Offset: 0xc) RTC Calendar Register -------- #define AT91C_RTC_CENT (0x3F << 0) // (RTC) Current Century #define AT91C_RTC_YEAR (0xFF << 8) // (RTC) Current Year #define AT91C_RTC_MONTH (0x1F << 16) // (RTC) Current Month #define AT91C_RTC_DAY (0x7 << 21) // (RTC) Current Day #define AT91C_RTC_DATE (0x3F << 24) // (RTC) Current Date // -------- RTC_TIMALR : (RTC Offset: 0x10) RTC Time Alarm Register -------- #define AT91C_RTC_SECEN (0x1 << 7) // (RTC) Second Alarm Enable #define AT91C_RTC_MINEN (0x1 << 15) // (RTC) Minute Alarm #define AT91C_RTC_HOUREN (0x1 << 23) // (RTC) Current Hour // -------- RTC_CALALR : (RTC Offset: 0x14) RTC Calendar Alarm Register -------- #define AT91C_RTC_MONTHEN (0x1 << 23) // (RTC) Month Alarm Enable #define AT91C_RTC_DATEEN (0x1 << 31) // (RTC) Date Alarm Enable // -------- RTC_SR : (RTC Offset: 0x18) RTC Status Register -------- #define AT91C_RTC_ACKUPD (0x1 << 0) // (RTC) Acknowledge for Update #define AT91C_RTC_ALARM (0x1 << 1) // (RTC) Alarm Flag #define AT91C_RTC_SECEV (0x1 << 2) // (RTC) Second Event #define AT91C_RTC_TIMEV (0x1 << 3) // (RTC) Time Event #define AT91C_RTC_CALEV (0x1 << 4) // (RTC) Calendar event // -------- RTC_SCCR : (RTC Offset: 0x1c) RTC Status Clear Command Register -------- // -------- RTC_IER : (RTC Offset: 0x20) RTC Interrupt Enable Register -------- // -------- RTC_IDR : (RTC Offset: 0x24) RTC Interrupt Disable Register -------- // -------- RTC_IMR : (RTC Offset: 0x28) RTC Interrupt Mask Register -------- // -------- RTC_VER : (RTC Offset: 0x2c) RTC Valid Entry Register -------- #define AT91C_RTC_NVTIM (0x1 << 0) // (RTC) Non valid Time #define AT91C_RTC_NVCAL (0x1 << 1) // (RTC) Non valid Calendar #define AT91C_RTC_NVTIMALR (0x1 << 2) // (RTC) Non valid time Alarm #define AT91C_RTC_NVCALALR (0x1 << 3) // (RTC) Nonvalid Calendar Alarm // ***************************************************************************** // SOFTWARE API DEFINITION FOR Analog to Digital Convertor // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_ADC { AT91_REG ADC_CR; // ADC Control Register AT91_REG ADC_MR; // ADC Mode Register AT91_REG Reserved0[2]; // AT91_REG ADC_CHER; // ADC Channel Enable Register AT91_REG ADC_CHDR; // ADC Channel Disable Register AT91_REG ADC_CHSR; // ADC Channel Status Register AT91_REG ADC_SR; // ADC Status Register AT91_REG ADC_LCDR; // ADC Last Converted Data Register AT91_REG ADC_IER; // ADC Interrupt Enable Register AT91_REG ADC_IDR; // ADC Interrupt Disable Register AT91_REG ADC_IMR; // ADC Interrupt Mask Register AT91_REG ADC_CDR0; // ADC Channel Data Register 0 AT91_REG ADC_CDR1; // ADC Channel Data Register 1 AT91_REG ADC_CDR2; // ADC Channel Data Register 2 AT91_REG ADC_CDR3; // ADC Channel Data Register 3 AT91_REG ADC_CDR4; // ADC Channel Data Register 4 AT91_REG ADC_CDR5; // ADC Channel Data Register 5 AT91_REG ADC_CDR6; // ADC Channel Data Register 6 AT91_REG ADC_CDR7; // ADC Channel Data Register 7 AT91_REG Reserved1[5]; // AT91_REG ADC_ACR; // Analog Control Register AT91_REG ADC_EMR; // Extended Mode Register AT91_REG Reserved2[32]; // AT91_REG ADC_ADDRSIZE; // ADC ADDRSIZE REGISTER AT91_REG ADC_IPNAME1; // ADC IPNAME1 REGISTER AT91_REG ADC_IPNAME2; // ADC IPNAME2 REGISTER AT91_REG ADC_FEATURES; // ADC FEATURES REGISTER AT91_REG ADC_VER; // ADC VERSION REGISTER AT91_REG ADC_RPR; // Receive Pointer Register AT91_REG ADC_RCR; // Receive Counter Register AT91_REG ADC_TPR; // Transmit Pointer Register AT91_REG ADC_TCR; // Transmit Counter Register AT91_REG ADC_RNPR; // Receive Next Pointer Register AT91_REG ADC_RNCR; // Receive Next Counter Register AT91_REG ADC_TNPR; // Transmit Next Pointer Register AT91_REG ADC_TNCR; // Transmit Next Counter Register AT91_REG ADC_PTCR; // PDC Transfer Control Register AT91_REG ADC_PTSR; // PDC Transfer Status Register } AT91S_ADC, *AT91PS_ADC; #else #define ADC_CR (AT91_CAST(AT91_REG *) 0x00000000) // (ADC_CR) ADC Control Register #define ADC_MR (AT91_CAST(AT91_REG *) 0x00000004) // (ADC_MR) ADC Mode Register #define ADC_CHER (AT91_CAST(AT91_REG *) 0x00000010) // (ADC_CHER) ADC Channel Enable Register #define ADC_CHDR (AT91_CAST(AT91_REG *) 0x00000014) // (ADC_CHDR) ADC Channel Disable Register #define ADC_CHSR (AT91_CAST(AT91_REG *) 0x00000018) // (ADC_CHSR) ADC Channel Status Register #define ADC_SR (AT91_CAST(AT91_REG *) 0x0000001C) // (ADC_SR) ADC Status Register #define ADC_LCDR (AT91_CAST(AT91_REG *) 0x00000020) // (ADC_LCDR) ADC Last Converted Data Register #define ADC_IER (AT91_CAST(AT91_REG *) 0x00000024) // (ADC_IER) ADC Interrupt Enable Register #define ADC_IDR (AT91_CAST(AT91_REG *) 0x00000028) // (ADC_IDR) ADC Interrupt Disable Register #define ADC_IMR (AT91_CAST(AT91_REG *) 0x0000002C) // (ADC_IMR) ADC Interrupt Mask Register #define ADC_CDR0 (AT91_CAST(AT91_REG *) 0x00000030) // (ADC_CDR0) ADC Channel Data Register 0 #define ADC_CDR1 (AT91_CAST(AT91_REG *) 0x00000034) // (ADC_CDR1) ADC Channel Data Register 1 #define ADC_CDR2 (AT91_CAST(AT91_REG *) 0x00000038) // (ADC_CDR2) ADC Channel Data Register 2 #define ADC_CDR3 (AT91_CAST(AT91_REG *) 0x0000003C) // (ADC_CDR3) ADC Channel Data Register 3 #define ADC_CDR4 (AT91_CAST(AT91_REG *) 0x00000040) // (ADC_CDR4) ADC Channel Data Register 4 #define ADC_CDR5 (AT91_CAST(AT91_REG *) 0x00000044) // (ADC_CDR5) ADC Channel Data Register 5 #define ADC_CDR6 (AT91_CAST(AT91_REG *) 0x00000048) // (ADC_CDR6) ADC Channel Data Register 6 #define ADC_CDR7 (AT91_CAST(AT91_REG *) 0x0000004C) // (ADC_CDR7) ADC Channel Data Register 7 #define ADC_ACR (AT91_CAST(AT91_REG *) 0x00000064) // (ADC_ACR) Analog Control Register #define ADC_EMR (AT91_CAST(AT91_REG *) 0x00000068) // (ADC_EMR) Extended Mode Register #define ADC_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (ADC_ADDRSIZE) ADC ADDRSIZE REGISTER #define ADC_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (ADC_IPNAME1) ADC IPNAME1 REGISTER #define ADC_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (ADC_IPNAME2) ADC IPNAME2 REGISTER #define ADC_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (ADC_FEATURES) ADC FEATURES REGISTER #define ADC_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (ADC_VER) ADC VERSION REGISTER #endif // -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- #define AT91C_ADC_SWRST (0x1 << 0) // (ADC) Software Reset #define AT91C_ADC_START (0x1 << 1) // (ADC) Start Conversion // -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- #define AT91C_ADC_TRGEN (0x1 << 0) // (ADC) Trigger Enable #define AT91C_ADC_TRGEN_DIS (0x0) // (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software #define AT91C_ADC_TRGEN_EN (0x1) // (ADC) Hardware trigger selected by TRGSEL field is enabled. #define AT91C_ADC_TRGSEL (0x7 << 1) // (ADC) Trigger Selection #define AT91C_ADC_TRGSEL_EXT (0x0 << 1) // (ADC) Selected TRGSEL = External Trigger #define AT91C_ADC_TRGSEL_TIOA0 (0x1 << 1) // (ADC) Selected TRGSEL = TIAO0 #define AT91C_ADC_TRGSEL_TIOA1 (0x2 << 1) // (ADC) Selected TRGSEL = TIAO1 #define AT91C_ADC_TRGSEL_TIOA2 (0x3 << 1) // (ADC) Selected TRGSEL = TIAO2 #define AT91C_ADC_TRGSEL_PWM0_TRIG (0x4 << 1) // (ADC) Selected TRGSEL = PWM trigger #define AT91C_ADC_TRGSEL_PWM1_TRIG (0x5 << 1) // (ADC) Selected TRGSEL = PWM Trigger #define AT91C_ADC_TRGSEL_RESERVED (0x6 << 1) // (ADC) Selected TRGSEL = Reserved #define AT91C_ADC_LOWRES (0x1 << 4) // (ADC) Resolution. #define AT91C_ADC_LOWRES_10_BIT (0x0 << 4) // (ADC) 10-bit resolution #define AT91C_ADC_LOWRES_8_BIT (0x1 << 4) // (ADC) 8-bit resolution #define AT91C_ADC_SLEEP (0x1 << 5) // (ADC) Sleep Mode #define AT91C_ADC_SLEEP_NORMAL_MODE (0x0 << 5) // (ADC) Normal Mode #define AT91C_ADC_SLEEP_MODE (0x1 << 5) // (ADC) Sleep Mode #define AT91C_ADC_PRESCAL (0x3F << 8) // (ADC) Prescaler rate selection #define AT91C_ADC_STARTUP (0x1F << 16) // (ADC) Startup Time #define AT91C_ADC_SHTIM (0xF << 24) // (ADC) Sample & Hold Time // -------- ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- #define AT91C_ADC_CH0 (0x1 << 0) // (ADC) Channel 0 #define AT91C_ADC_CH1 (0x1 << 1) // (ADC) Channel 1 #define AT91C_ADC_CH2 (0x1 << 2) // (ADC) Channel 2 #define AT91C_ADC_CH3 (0x1 << 3) // (ADC) Channel 3 #define AT91C_ADC_CH4 (0x1 << 4) // (ADC) Channel 4 #define AT91C_ADC_CH5 (0x1 << 5) // (ADC) Channel 5 #define AT91C_ADC_CH6 (0x1 << 6) // (ADC) Channel 6 #define AT91C_ADC_CH7 (0x1 << 7) // (ADC) Channel 7 // -------- ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- // -------- ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- // -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- #define AT91C_ADC_EOC0 (0x1 << 0) // (ADC) End of Conversion #define AT91C_ADC_EOC1 (0x1 << 1) // (ADC) End of Conversion #define AT91C_ADC_EOC2 (0x1 << 2) // (ADC) End of Conversion #define AT91C_ADC_EOC3 (0x1 << 3) // (ADC) End of Conversion #define AT91C_ADC_EOC4 (0x1 << 4) // (ADC) End of Conversion #define AT91C_ADC_EOC5 (0x1 << 5) // (ADC) End of Conversion #define AT91C_ADC_EOC6 (0x1 << 6) // (ADC) End of Conversion #define AT91C_ADC_EOC7 (0x1 << 7) // (ADC) End of Conversion #define AT91C_ADC_OVRE0 (0x1 << 8) // (ADC) Overrun Error #define AT91C_ADC_OVRE1 (0x1 << 9) // (ADC) Overrun Error #define AT91C_ADC_OVRE2 (0x1 << 10) // (ADC) Overrun Error #define AT91C_ADC_OVRE3 (0x1 << 11) // (ADC) Overrun Error #define AT91C_ADC_OVRE4 (0x1 << 12) // (ADC) Overrun Error #define AT91C_ADC_OVRE5 (0x1 << 13) // (ADC) Overrun Error #define AT91C_ADC_OVRE6 (0x1 << 14) // (ADC) Overrun Error #define AT91C_ADC_OVRE7 (0x1 << 15) // (ADC) Overrun Error #define AT91C_ADC_DRDY (0x1 << 16) // (ADC) Data Ready #define AT91C_ADC_GOVRE (0x1 << 17) // (ADC) General Overrun #define AT91C_ADC_ENDRX (0x1 << 18) // (ADC) End of Receiver Transfer #define AT91C_ADC_RXBUFF (0x1 << 19) // (ADC) RXBUFF Interrupt // -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- #define AT91C_ADC_LDATA (0x3FF << 0) // (ADC) Last Data Converted // -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- // -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- // -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- // -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- #define AT91C_ADC_DATA (0x3FF << 0) // (ADC) Converted Data // -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- // -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- // -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- // -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- // -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- // -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- // -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- // -------- ADC_ACR : (ADC Offset: 0x64) ADC Analog Controler Register -------- #define AT91C_ADC_GAIN (0x3 << 0) // (ADC) Input Gain #define AT91C_ADC_IBCTL (0x3 << 6) // (ADC) Bias Current Control #define AT91C_ADC_IBCTL_00 (0x0 << 6) // (ADC) typ - 20% #define AT91C_ADC_IBCTL_01 (0x1 << 6) // (ADC) typ #define AT91C_ADC_IBCTL_10 (0x2 << 6) // (ADC) typ + 20% #define AT91C_ADC_IBCTL_11 (0x3 << 6) // (ADC) typ + 40% #define AT91C_ADC_DIFF (0x1 << 16) // (ADC) Differential Mode #define AT91C_ADC_OFFSET (0x1 << 17) // (ADC) Input OFFSET // -------- ADC_EMR : (ADC Offset: 0x68) ADC Extended Mode Register -------- #define AT91C_OFFMODES (0x1 << 0) // (ADC) Off Mode if #define AT91C_OFF_MODE_STARTUP_TIME (0x1 << 16) // (ADC) Startup Time // -------- ADC_VER : (ADC Offset: 0xfc) ADC VER -------- #define AT91C_ADC_VER (0xF << 0) // (ADC) ADC VER // ***************************************************************************** // SOFTWARE API DEFINITION FOR Analog-to Digital Converter // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_ADC12B { AT91_REG ADC12B_CR; // Control Register AT91_REG ADC12B_MR; // Mode Register AT91_REG Reserved1[2]; AT91_REG ADC12B_CHER; // Channel Enable Register AT91_REG ADC12B_CHDR; // Channel Disable Register AT91_REG ADC12B_CHSR; // Channel Status Register AT91_REG ADC12B_SR; // Status Register AT91_REG ADC12B_LCDR; // Last Converted Data Register AT91_REG ADC12B_IER; // Interrupt Enable Register AT91_REG ADC12B_IDR; // Interrupt Disable Register AT91_REG ADC12B_IMR; // Interrupt Mask Register AT91_REG ADC12B_CDR[8]; // Channel Data Register AT91_REG Reserved2[5]; AT91_REG ADC12B_ACR; // Analog Control Register AT91_REG ADC12B_EMR; // Extended Mode Register } AT91S_ADC12B, *AT91PS_ADC12B; #else #define ADC12B_CR (AT91_CAST(AT91_REG *) 0x00000000) // Control Register #define ADC12B_MR (AT91_CAST(AT91_REG *) 0x00000004) // Mode Register #define ADC12B_CHER (AT91_CAST(AT91_REG *) 0x00000010) // Channel Enable Register #define ADC12B_CHDR (AT91_CAST(AT91_REG *) 0x00000014) // Channel Disable Register #define ADC12B_CHSR (AT91_CAST(AT91_REG *) 0x00000018) // Channel Status Register #define ADC12B_SR (AT91_CAST(AT91_REG *) 0x0000001C) // Status Register #define ADC12B_LCDR (AT91_CAST(AT91_REG *) 0x00000020) // Last Converted Data Register #define ADC12B_IER (AT91_CAST(AT91_REG *) 0x00000024) // Interrupt Enable Register #define ADC12B_IDR (AT91_CAST(AT91_REG *) 0x00000028) // Interrupt Disable Register #define ADC12B_IMR (AT91_CAST(AT91_REG *) 0x0000002C) // Interrupt Mask Register #define ADC12B_CDR (AT91_CAST(AT91_REG *) 0x00000030) // Channel Data Register #define ADC12B_ACR (AT91_CAST(AT91_REG *) 0x00000064) // Analog Control Register #define ADC12B_EMR (AT91_CAST(AT91_REG *) 0x00000068) // Extended Mode Register #endif // -------- ADC12B_CR : (ADC12B Offset: 0x00) Control Register -------- #define AT91C_ADC12B_CR_SWRST (0x1 << 0) // (ADC12B) Software Reset #define AT91C_ADC12B_CR_SWRST_NO_EFFECT (0x0 << 0) // (ADC12B) No effect. #define AT91C_ADC12B_CR_SWRST_RESET (0x1 << 0) // (ADC12B) Resets the ADC12B simulating a hardware reset. #define AT91C_ADC12B_CR_START (0x1 << 1) // (ADC12B) Start Conversion #define AT91C_ADC12B_CR_START_NO_EFFECT (0x0 << 1) // (ADC12B) No effect. #define AT91C_ADC12B_CR_START_BEGIN_ADC (0x1 << 1) // (ADC12B) Begins analog-to-digital conversion. // -------- ADC12B_MR : (ADC12B Offset: 0x04) Mode Register -------- #define AT91C_ADC12B_MR_TRGEN (0x1 << 0) // (ADC12B) Trigger Enable #define AT91C_ADC12B_MR_TRGEN_DIS (0x0 << 0) // (ADC12B) Hardware triggers are disabled. Starting a conversion is only possible by software. #define AT91C_ADC12B_MR_TRGEN_EN (0x1 << 0) // (ADC12B) Hardware trigger selected by TRGSEL field is enabled. #define AT91C_ADC12B_MR_TRGSEL (0x7 << 1) // (ADC12B) Trigger Selection #define AT91C_ADC12B_MR_TRGSEL_EXT_TRIG (0x0 << 1) // (ADC12B) External trigger #define AT91C_ADC12B_MR_TRGSEL_TIOA_0 (0x1 << 1) // (ADC12B) TIO Output of the Timer Counter Channel 0 #define AT91C_ADC12B_MR_TRGSEL_TIOA_1 (0x2 << 1) // (ADC12B) TIO Output of the Timer Counter Channel 1 #define AT91C_ADC12B_MR_TRGSEL_TIOA_2 (0x3 << 1) // (ADC12B) TIO Output of the Timer Counter Channel 2 #define AT91C_ADC12B_MR_TRGSEL_TIOA_3 (0x4 << 1) // (ADC12B) PWM Event Line 0 #define AT91C_ADC12B_MR_TRGSEL_TIOA_4 (0x5 << 1) // (ADC12B) PWM Event Line 1 #define AT91C_ADC12B_MR_LOWRES (0x1 << 4) // (ADC12B) Resolution #define AT91C_ADC12B_MR_LOWRES_12_BIT (0x0 << 4) // (ADC12B) 12-bit resolution #define AT91C_ADC12B_MR_LOWRES_10_BIT (0x1 << 4) // (ADC12B) 10-bit resolution #define AT91C_ADC12B_MR_SLEEP (0x1 << 5) // (ADC12B) Sleep Mode #define AT91C_ADC12B_MR_SLEEP_NORMAL (0x0 << 5) // (ADC12B) Normal Mode #define AT91C_ADC12B_MR_SLEEP_SLEEP (0x1 << 5) // (ADC12B) Sleep Modes (see OFFMODES register) #define AT91C_ADC12B_MR_PRESCAL (0xff << 8) // (ADC12B) Prescaler Rate Selection #define AT91C_ADC12B_MR_STARTUP (0xff << 16) // (ADC12B) Start Up Time #define AT91C_ADC12B_MR_SHTIM (0xf << 24) // (ADC12B) Sample & Hold Time // -------- ADC12B_CHER : (ADC12B Offset: 0x10) Channel Enable Register -------- #define AT91C_ADC12B_CHER_CH0 (0x1 << 0) // (ADC12B) Channel 0 Enable #define AT91C_ADC12B_CHER_CH0_NO_EFFECT (0x0 << 0) // (ADC12B) No effect. #define AT91C_ADC12B_CHER_CH0_ENABLE (0x1 << 0) // (ADC12B) Enables the corresponding channel. #define AT91C_ADC12B_CHER_CH1 (0x1 << 1) // (ADC12B) Channel 1 Enable #define AT91C_ADC12B_CHER_CH1_NO_EFFECT (0x0 << 1) // (ADC12B) No effect. #define AT91C_ADC12B_CHER_CH1_ENABLE (0x1 << 1) // (ADC12B) Enables the corresponding channel. #define AT91C_ADC12B_CHER_CH2 (0x1 << 2) // (ADC12B) Channel 2 Enable #define AT91C_ADC12B_CHER_CH2_NO_EFFECT (0x0 << 2) // (ADC12B) No effect. #define AT91C_ADC12B_CHER_CH2_ENABLE (0x1 << 2) // (ADC12B) Enables the corresponding channel. #define AT91C_ADC12B_CHER_CH3 (0x1 << 3) // (ADC12B) Channel 3 Enable #define AT91C_ADC12B_CHER_CH3_NO_EFFECT (0x0 << 3) // (ADC12B) No effect. #define AT91C_ADC12B_CHER_CH3_ENABLE (0x1 << 3) // (ADC12B) Enables the corresponding channel. #define AT91C_ADC12B_CHER_CH4 (0x1 << 4) // (ADC12B) Channel 4 Enable #define AT91C_ADC12B_CHER_CH4_NO_EFFECT (0x0 << 4) // (ADC12B) No effect. #define AT91C_ADC12B_CHER_CH4_ENABLE (0x1 << 4) // (ADC12B) Enables the corresponding channel. #define AT91C_ADC12B_CHER_CH5 (0x1 << 5) // (ADC12B) Channel 5 Enable #define AT91C_ADC12B_CHER_CH5_NO_EFFECT (0x0 << 5) // (ADC12B) No effect. #define AT91C_ADC12B_CHER_CH5_ENABLE (0x1 << 5) // (ADC12B) Enables the corresponding channel. #define AT91C_ADC12B_CHER_CH6 (0x1 << 6) // (ADC12B) Channel 6 Enable #define AT91C_ADC12B_CHER_CH6_NO_EFFECT (0x0 << 6) // (ADC12B) No effect. #define AT91C_ADC12B_CHER_CH6_ENABLE (0x1 << 6) // (ADC12B) Enables the corresponding channel. #define AT91C_ADC12B_CHER_CH7 (0x1 << 7) // (ADC12B) Channel 7 Enable #define AT91C_ADC12B_CHER_CH7_NO_EFFECT (0x0 << 7) // (ADC12B) No effect. #define AT91C_ADC12B_CHER_CH7_ENABLE (0x1 << 7) // (ADC12B) Enables the corresponding channel. // -------- ADC12B_CHDR : (ADC12B Offset: 0x14) Channel Disable Register -------- #define AT91C_ADC12B_CHDR_CH0 (0x1 << 0) // (ADC12B) Channel 0 Disable #define AT91C_ADC12B_CHDR_CH0_NO_EFFECT (0x0 << 0) // (ADC12B) No effect. #define AT91C_ADC12B_CHDR_CH0_DISABLE (0x1 << 0) // (ADC12B) Disables the corresponding channel. #define AT91C_ADC12B_CHDR_CH1 (0x1 << 1) // (ADC12B) Channel 1 Disable #define AT91C_ADC12B_CHDR_CH1_NO_EFFECT (0x0 << 1) // (ADC12B) No effect. #define AT91C_ADC12B_CHDR_CH1_DISABLE (0x1 << 1) // (ADC12B) Disables the corresponding channel. #define AT91C_ADC12B_CHDR_CH2 (0x1 << 2) // (ADC12B) Channel 2 Disable #define AT91C_ADC12B_CHDR_CH2_NO_EFFECT (0x0 << 2) // (ADC12B) No effect. #define AT91C_ADC12B_CHDR_CH2_DISABLE (0x1 << 2) // (ADC12B) Disables the corresponding channel. #define AT91C_ADC12B_CHDR_CH3 (0x1 << 3) // (ADC12B) Channel 3 Disable #define AT91C_ADC12B_CHDR_CH3_NO_EFFECT (0x0 << 3) // (ADC12B) No effect. #define AT91C_ADC12B_CHDR_CH3_DISABLE (0x1 << 3) // (ADC12B) Disables the corresponding channel. #define AT91C_ADC12B_CHDR_CH4 (0x1 << 4) // (ADC12B) Channel 4 Disable #define AT91C_ADC12B_CHDR_CH4_NO_EFFECT (0x0 << 4) // (ADC12B) No effect. #define AT91C_ADC12B_CHDR_CH4_DISABLE (0x1 << 4) // (ADC12B) Disables the corresponding channel. #define AT91C_ADC12B_CHDR_CH5 (0x1 << 5) // (ADC12B) Channel 5 Disable #define AT91C_ADC12B_CHDR_CH5_NO_EFFECT (0x0 << 5) // (ADC12B) No effect. #define AT91C_ADC12B_CHDR_CH5_DISABLE (0x1 << 5) // (ADC12B) Disables the corresponding channel. #define AT91C_ADC12B_CHDR_CH6 (0x1 << 6) // (ADC12B) Channel 6 Disable #define AT91C_ADC12B_CHDR_CH6_NO_EFFECT (0x0 << 6) // (ADC12B) No effect. #define AT91C_ADC12B_CHDR_CH6_DISABLE (0x1 << 6) // (ADC12B) Disables the corresponding channel. #define AT91C_ADC12B_CHDR_CH7 (0x1 << 7) // (ADC12B) Channel 7 Disable #define AT91C_ADC12B_CHDR_CH7_NO_EFFECT (0x0 << 7) // (ADC12B) No effect. #define AT91C_ADC12B_CHDR_CH7_DISABLE (0x1 << 7) // (ADC12B) Disables the corresponding channel. // -------- ADC12B_CHSR : (ADC12B Offset: 0x18) Channel Status Register -------- #define AT91C_ADC12B_CHSR_CH0 (0x1 << 0) // (ADC12B) Channel 0 Status #define AT91C_ADC12B_CHSR_CH0_DISABLED (0x0 << 0) // (ADC12B) Corresponding channel is disabled. #define AT91C_ADC12B_CHSR_CH0_ENABLED (0x1 << 0) // (ADC12B) Corresponding channel is enabled. #define AT91C_ADC12B_CHSR_CH1 (0x1 << 1) // (ADC12B) Channel 1 Status #define AT91C_ADC12B_CHSR_CH1_DISABLED (0x0 << 1) // (ADC12B) Corresponding channel is disabled. #define AT91C_ADC12B_CHSR_CH1_ENABLED (0x1 << 1) // (ADC12B) Corresponding channel is enabled. #define AT91C_ADC12B_CHSR_CH2 (0x1 << 2) // (ADC12B) Channel 2 Status #define AT91C_ADC12B_CHSR_CH2_DISABLED (0x0 << 2) // (ADC12B) Corresponding channel is disabled. #define AT91C_ADC12B_CHSR_CH2_ENABLED (0x1 << 2) // (ADC12B) Corresponding channel is enabled. #define AT91C_ADC12B_CHSR_CH3 (0x1 << 3) // (ADC12B) Channel 3 Status #define AT91C_ADC12B_CHSR_CH3_DISABLED (0x0 << 3) // (ADC12B) Corresponding channel is disabled. #define AT91C_ADC12B_CHSR_CH3_ENABLED (0x1 << 3) // (ADC12B) Corresponding channel is enabled. #define AT91C_ADC12B_CHSR_CH4 (0x1 << 4) // (ADC12B) Channel 4 Status #define AT91C_ADC12B_CHSR_CH4_DISABLED (0x0 << 4) // (ADC12B) Corresponding channel is disabled. #define AT91C_ADC12B_CHSR_CH4_ENABLED (0x1 << 4) // (ADC12B) Corresponding channel is enabled. #define AT91C_ADC12B_CHSR_CH5 (0x1 << 5) // (ADC12B) Channel 5 Status #define AT91C_ADC12B_CHSR_CH5_DISABLED (0x0 << 5) // (ADC12B) Corresponding channel is disabled. #define AT91C_ADC12B_CHSR_CH5_ENABLED (0x1 << 5) // (ADC12B) Corresponding channel is enabled. #define AT91C_ADC12B_CHSR_CH6 (0x1 << 6) // (ADC12B) Channel 6 Status #define AT91C_ADC12B_CHSR_CH6_DISABLED (0x0 << 6) // (ADC12B) Corresponding channel is disabled. #define AT91C_ADC12B_CHSR_CH6_ENABLED (0x1 << 6) // (ADC12B) Corresponding channel is enabled. #define AT91C_ADC12B_CHSR_CH7 (0x1 << 7) // (ADC12B) Channel 7 Status #define AT91C_ADC12B_CHSR_CH7_DISABLED (0x0 << 7) // (ADC12B) Corresponding channel is disabled. #define AT91C_ADC12B_CHSR_CH7_ENABLED (0x1 << 7) // (ADC12B) Corresponding channel is enabled. // -------- ADC12B_SR : (ADC12B Offset: 0x1C) Status Register -------- #define AT91C_ADC12B_SR_EOC0 (0x1 << 0) // (ADC12B) End of Conversion 0 #define AT91C_ADC12B_SR_EOC0_DISABLE (0x0 << 0) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished. #define AT91C_ADC12B_SR_EOC0_ENABLE (0x1 << 0) // (ADC12B) Corresponding analog channel is enabled and conversion is complete. #define AT91C_ADC12B_SR_EOC1 (0x1 << 1) // (ADC12B) End of Conversion 1 #define AT91C_ADC12B_SR_EOC1_DISABLE (0x0 << 1) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished. #define AT91C_ADC12B_SR_EOC1_ENABLE (0x1 << 1) // (ADC12B) Corresponding analog channel is enabled and conversion is complete. #define AT91C_ADC12B_SR_EOC2 (0x1 << 2) // (ADC12B) End of Conversion 2 #define AT91C_ADC12B_SR_EOC2_DISABLE (0x0 << 2) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished. #define AT91C_ADC12B_SR_EOC2_ENABLE (0x1 << 2) // (ADC12B) Corresponding analog channel is enabled and conversion is complete. #define AT91C_ADC12B_SR_EOC3 (0x1 << 3) // (ADC12B) End of Conversion 3 #define AT91C_ADC12B_SR_EOC3_DISABLE (0x0 << 3) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished. #define AT91C_ADC12B_SR_EOC3_ENABLE (0x1 << 3) // (ADC12B) Corresponding analog channel is enabled and conversion is complete. #define AT91C_ADC12B_SR_EOC4 (0x1 << 4) // (ADC12B) End of Conversion 4 #define AT91C_ADC12B_SR_EOC4_DISABLE (0x0 << 4) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished. #define AT91C_ADC12B_SR_EOC4_ENABLE (0x1 << 4) // (ADC12B) Corresponding analog channel is enabled and conversion is complete. #define AT91C_ADC12B_SR_EOC5 (0x1 << 5) // (ADC12B) End of Conversion 5 #define AT91C_ADC12B_SR_EOC5_DISABLE (0x0 << 5) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished. #define AT91C_ADC12B_SR_EOC5_ENABLE (0x1 << 5) // (ADC12B) Corresponding analog channel is enabled and conversion is complete. #define AT91C_ADC12B_SR_EOC6 (0x1 << 6) // (ADC12B) End of Conversion 6 #define AT91C_ADC12B_SR_EOC6_DISABLE (0x0 << 6) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished. #define AT91C_ADC12B_SR_EOC6_ENABLE (0x1 << 6) // (ADC12B) Corresponding analog channel is enabled and conversion is complete. #define AT91C_ADC12B_SR_EOC7 (0x1 << 7) // (ADC12B) End of Conversion 7 #define AT91C_ADC12B_SR_EOC7_DISABLE (0x0 << 7) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished. #define AT91C_ADC12B_SR_EOC7_ENABLE (0x1 << 7) // (ADC12B) Corresponding analog channel is enabled and conversion is complete. #define AT91C_ADC12B_SR_OVRE0 (0x1 << 8) // (ADC12B) Overrun Error 0 #define AT91C_ADC12B_SR_OVRE0_NO_ERROR (0x0 << 8) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE0_ERROR (0x1 << 8) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE1 (0x1 << 9) // (ADC12B) Overrun Error 1 #define AT91C_ADC12B_SR_OVRE1_NO_ERROR (0x0 << 9) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE1_ERROR (0x1 << 9) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE2 (0x1 << 10) // (ADC12B) Overrun Error 2 #define AT91C_ADC12B_SR_OVRE2_NO_ERROR (0x0 << 10) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE2_ERROR (0x1 << 10) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE3 (0x1 << 11) // (ADC12B) Overrun Error 3 #define AT91C_ADC12B_SR_OVRE3_NO_ERROR (0x0 << 11) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE3_ERROR (0x1 << 11) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE4 (0x1 << 12) // (ADC12B) Overrun Error 4 #define AT91C_ADC12B_SR_OVRE4_NO_ERROR (0x0 << 12) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE4_ERROR (0x1 << 12) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE5 (0x1 << 13) // (ADC12B) Overrun Error 5 #define AT91C_ADC12B_SR_OVRE5_NO_ERROR (0x0 << 13) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE5_ERROR (0x1 << 13) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE6 (0x1 << 14) // (ADC12B) Overrun Error 6 #define AT91C_ADC12B_SR_OVRE6_NO_ERROR (0x0 << 14) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE6_ERROR (0x1 << 14) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE7 (0x1 << 15) // (ADC12B) Overrun Error 7 #define AT91C_ADC12B_SR_OVRE7_NO_ERROR (0x0 << 15) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_OVRE7_ERROR (0x1 << 15) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_DRDY (0x1 << 16) // (ADC12B) Data Ready #define AT91C_ADC12B_SR_DRDY_NO_CONV (0x0 << 16) // (ADC12B) No data has been converted since the last read of ADC12B_LCDR. #define AT91C_ADC12B_SR_DRDY_CONV (0x1 << 16) // (ADC12B) At least one data has been converted and is available in ADC12B_LCDR. #define AT91C_ADC12B_SR_GOVRE (0x1 << 17) // (ADC12B) General Overrun Error #define AT91C_ADC12B_SR_GOVRE_NO_ERROR (0x0 << 17) // (ADC12B) No General Overrun Error occurred since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_GOVRE_ERROR (0x1 << 17) // (ADC12B) At least one General Overrun Error has occurred since the last read of ADC12B_SR. #define AT91C_ADC12B_SR_ENDRX (0x1 << 18) // (ADC12B) End of RX Buffer #define AT91C_ADC12B_SR_ENDRX_NOT_REACH (0x0 << 18) // (ADC12B) The Receive Counter Register has not reached 0 since the last write in ADC12B_RCR or ADC12B_RNCR. #define AT91C_ADC12B_SR_ENDRX_REACH_0 (0x1 << 18) // (ADC12B) The Receive Counter Register has reached 0 since the last write in ADC12B_RCR or ADC12B_RNCR. #define AT91C_ADC12B_SR_RXBUFF (0x1 << 19) // (ADC12B) RX Buffer Full #define AT91C_ADC12B_SR_RXBUFF_NO_ZERO (0x0 << 19) // (ADC12B) ADC12B_RCR or ADC12B_RNCR have a value other than 0. #define AT91C_ADC12B_SR_RXBUFF_ZERO (0x1 << 19) // (ADC12B) Both ADC12B_RCR and ADC12B_RNCR have a value of 0. // -------- ADC12B_LCDR : (ADC12B Offset: 0x20) Last Converted Data Register -------- #define AT91C_ADC12B_LCDR_LDATA (0xfff << 0) // (ADC12B) Last Data Converted // -------- ADC12B_IER : (ADC12B Offset: 0x24) Interrupt Enable Register -------- #define AT91C_ADC12B_IER_EOC0 (0x1 << 0) // (ADC12B) End of Conversion Interrupt Enable 0 #define AT91C_ADC12B_IER_EOC0_NO_EFFECT (0x0 << 0) // (ADC12B) No effect. #define AT91C_ADC12B_IER_EOC0_ENABLE (0x1 << 0) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_EOC1 (0x1 << 1) // (ADC12B) End of Conversion Interrupt Enable 1 #define AT91C_ADC12B_IER_EOC1_NO_EFFECT (0x0 << 1) // (ADC12B) No effect. #define AT91C_ADC12B_IER_EOC1_ENABLE (0x1 << 1) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_EOC2 (0x1 << 2) // (ADC12B) End of Conversion Interrupt Enable 2 #define AT91C_ADC12B_IER_EOC2_NO_EFFECT (0x0 << 2) // (ADC12B) No effect. #define AT91C_ADC12B_IER_EOC2_ENABLE (0x1 << 2) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_EOC3 (0x1 << 3) // (ADC12B) End of Conversion Interrupt Enable 3 #define AT91C_ADC12B_IER_EOC3_NO_EFFECT (0x0 << 3) // (ADC12B) No effect. #define AT91C_ADC12B_IER_EOC3_ENABLE (0x1 << 3) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_EOC4 (0x1 << 4) // (ADC12B) End of Conversion Interrupt Enable 4 #define AT91C_ADC12B_IER_EOC4_NO_EFFECT (0x0 << 4) // (ADC12B) No effect. #define AT91C_ADC12B_IER_EOC4_ENABLE (0x1 << 4) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_EOC5 (0x1 << 5) // (ADC12B) End of Conversion Interrupt Enable 5 #define AT91C_ADC12B_IER_EOC5_NO_EFFECT (0x0 << 5) // (ADC12B) No effect. #define AT91C_ADC12B_IER_EOC5_ENABLE (0x1 << 5) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_EOC6 (0x1 << 6) // (ADC12B) End of Conversion Interrupt Enable 6 #define AT91C_ADC12B_IER_EOC6_NO_EFFECT (0x0 << 6) // (ADC12B) No effect. #define AT91C_ADC12B_IER_EOC6_ENABLE (0x1 << 6) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_EOC7 (0x1 << 7) // (ADC12B) End of Conversion Interrupt Enable 7 #define AT91C_ADC12B_IER_EOC7_NO_EFFECT (0x0 << 7) // (ADC12B) No effect. #define AT91C_ADC12B_IER_EOC7_ENABLE (0x1 << 7) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_OVRE0 (0x1 << 8) // (ADC12B) Overrun Error Interrupt Enable 0 #define AT91C_ADC12B_IER_OVRE0_NO_EFFECT (0x0 << 8) // (ADC12B) No effect. #define AT91C_ADC12B_IER_OVRE0_ENABLE (0x1 << 8) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_OVRE1 (0x1 << 9) // (ADC12B) Overrun Error Interrupt Enable 1 #define AT91C_ADC12B_IER_OVRE1_NO_EFFECT (0x0 << 9) // (ADC12B) No effect. #define AT91C_ADC12B_IER_OVRE1_ENABLE (0x1 << 9) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_OVRE2 (0x1 << 10) // (ADC12B) Overrun Error Interrupt Enable 2 #define AT91C_ADC12B_IER_OVRE2_NO_EFFECT (0x0 << 10) // (ADC12B) No effect. #define AT91C_ADC12B_IER_OVRE2_ENABLE (0x1 << 10) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_OVRE3 (0x1 << 11) // (ADC12B) Overrun Error Interrupt Enable 3 #define AT91C_ADC12B_IER_OVRE3_NO_EFFECT (0x0 << 11) // (ADC12B) No effect. #define AT91C_ADC12B_IER_OVRE3_ENABLE (0x1 << 11) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_OVRE4 (0x1 << 12) // (ADC12B) Overrun Error Interrupt Enable 4 #define AT91C_ADC12B_IER_OVRE4_NO_EFFECT (0x0 << 12) // (ADC12B) No effect. #define AT91C_ADC12B_IER_OVRE4_ENABLE (0x1 << 12) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_OVRE5 (0x1 << 13) // (ADC12B) Overrun Error Interrupt Enable 5 #define AT91C_ADC12B_IER_OVRE5_NO_EFFECT (0x0 << 13) // (ADC12B) No effect. #define AT91C_ADC12B_IER_OVRE5_ENABLE (0x1 << 13) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_OVRE6 (0x1 << 14) // (ADC12B) Overrun Error Interrupt Enable 6 #define AT91C_ADC12B_IER_OVRE6_NO_EFFECT (0x0 << 14) // (ADC12B) No effect. #define AT91C_ADC12B_IER_OVRE6_ENABLE (0x1 << 14) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_OVRE7 (0x1 << 15) // (ADC12B) Overrun Error Interrupt Enable 7 #define AT91C_ADC12B_IER_OVRE7_NO_EFFECT (0x0 << 15) // (ADC12B) No effect. #define AT91C_ADC12B_IER_OVRE7_ENABLE (0x1 << 15) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_DRDY (0x1 << 16) // (ADC12B) Data Ready Interrupt Enable #define AT91C_ADC12B_IER_DRDY_NO_EFFECT (0x0 << 16) // (ADC12B) No effect. #define AT91C_ADC12B_IER_DRDY_ENABLE (0x1 << 16) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_GOVRE (0x1 << 17) // (ADC12B) General Overrun Error Interrupt Enable #define AT91C_ADC12B_IER_GOVRE_NO_EFFECT (0x0 << 17) // (ADC12B) No effect. #define AT91C_ADC12B_IER_GOVRE_ENABLE (0x1 << 17) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_ENDRX (0x1 << 18) // (ADC12B) End of Receive Buffer Interrupt Enable #define AT91C_ADC12B_IER_ENDRX_NO_EFFECT (0x0 << 18) // (ADC12B) No effect. #define AT91C_ADC12B_IER_ENDRX_ENABLE (0x1 << 18) // (ADC12B) Enables the corresponding interrupt. #define AT91C_ADC12B_IER_RXBUFF (0x1 << 19) // (ADC12B) Receive Buffer Full Interrupt Enable #define AT91C_ADC12B_IER_RXBUFF_NO_EFFECT (0x0 << 19) // (ADC12B) No effect. #define AT91C_ADC12B_IER_RXBUFF_ENABLE (0x1 << 19) // (ADC12B) Enables the corresponding interrupt. // -------- ADC12B_IDR : (ADC12B Offset: 0x28) Interrupt Disable Register -------- #define AT91C_ADC12B_IDR_EOC0 (0x1 << 0) // (ADC12B) End of Conversion Interrupt Disable 0 #define AT91C_ADC12B_IDR_EOC0_NO_EFFECT (0x0 << 0) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_EOC0_DISABLE (0x1 << 0) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_EOC1 (0x1 << 1) // (ADC12B) End of Conversion Interrupt Disable 1 #define AT91C_ADC12B_IDR_EOC1_NO_EFFECT (0x0 << 1) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_EOC1_DISABLE (0x1 << 1) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_EOC2 (0x1 << 2) // (ADC12B) End of Conversion Interrupt Disable 2 #define AT91C_ADC12B_IDR_EOC2_NO_EFFECT (0x0 << 2) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_EOC2_DISABLE (0x1 << 2) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_EOC3 (0x1 << 3) // (ADC12B) End of Conversion Interrupt Disable 3 #define AT91C_ADC12B_IDR_EOC3_NO_EFFECT (0x0 << 3) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_EOC3_DISABLE (0x1 << 3) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_EOC4 (0x1 << 4) // (ADC12B) End of Conversion Interrupt Disable 4 #define AT91C_ADC12B_IDR_EOC4_NO_EFFECT (0x0 << 4) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_EOC4_DISABLE (0x1 << 4) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_EOC5 (0x1 << 5) // (ADC12B) End of Conversion Interrupt Disable 5 #define AT91C_ADC12B_IDR_EOC5_NO_EFFECT (0x0 << 5) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_EOC5_DISABLE (0x1 << 5) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_EOC6 (0x1 << 6) // (ADC12B) End of Conversion Interrupt Disable 6 #define AT91C_ADC12B_IDR_EOC6_NO_EFFECT (0x0 << 6) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_EOC6_DISABLE (0x1 << 6) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_EOC7 (0x1 << 7) // (ADC12B) End of Conversion Interrupt Disable 7 #define AT91C_ADC12B_IDR_EOC7_NO_EFFECT (0x0 << 7) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_EOC7_DISABLE (0x1 << 7) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_OVRE0 (0x1 << 8) // (ADC12B) Overrun Error Interrupt Disable 0 #define AT91C_ADC12B_IDR_OVRE0_NO_EFFECT (0x0 << 8) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_OVRE0_DISABLE (0x1 << 8) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_OVRE1 (0x1 << 9) // (ADC12B) Overrun Error Interrupt Disable 1 #define AT91C_ADC12B_IDR_OVRE1_NO_EFFECT (0x0 << 9) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_OVRE1_DISABLE (0x1 << 9) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_OVRE2 (0x1 << 10) // (ADC12B) Overrun Error Interrupt Disable 2 #define AT91C_ADC12B_IDR_OVRE2_NO_EFFECT (0x0 << 10) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_OVRE2_DISABLE (0x1 << 10) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_OVRE3 (0x1 << 11) // (ADC12B) Overrun Error Interrupt Disable 3 #define AT91C_ADC12B_IDR_OVRE3_NO_EFFECT (0x0 << 11) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_OVRE3_DISABLE (0x1 << 11) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_OVRE4 (0x1 << 12) // (ADC12B) Overrun Error Interrupt Disable 4 #define AT91C_ADC12B_IDR_OVRE4_NO_EFFECT (0x0 << 12) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_OVRE4_DISABLE (0x1 << 12) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_OVRE5 (0x1 << 13) // (ADC12B) Overrun Error Interrupt Disable 5 #define AT91C_ADC12B_IDR_OVRE5_NO_EFFECT (0x0 << 13) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_OVRE5_DISABLE (0x1 << 13) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_OVRE6 (0x1 << 14) // (ADC12B) Overrun Error Interrupt Disable 6 #define AT91C_ADC12B_IDR_OVRE6_NO_EFFECT (0x0 << 14) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_OVRE6_DISABLE (0x1 << 14) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_OVRE7 (0x1 << 15) // (ADC12B) Overrun Error Interrupt Disable 7 #define AT91C_ADC12B_IDR_OVRE7_NO_EFFECT (0x0 << 15) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_OVRE7_DISABLE (0x1 << 15) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_DRDY (0x1 << 16) // (ADC12B) Data Ready Interrupt Disable #define AT91C_ADC12B_IDR_DRDY_NO_EFFECT (0x0 << 16) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_DRDY_DISABLE (0x1 << 16) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_GOVRE (0x1 << 17) // (ADC12B) General Overrun Error Interrupt Disable #define AT91C_ADC12B_IDR_GOVRE_NO_EFFECT (0x0 << 17) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_GOVRE_DISABLE (0x1 << 17) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_ENDRX (0x1 << 18) // (ADC12B) End of Receive Buffer Interrupt Disable #define AT91C_ADC12B_IDR_ENDRX_NO_EFFECT (0x0 << 18) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_ENDRX_DISABLE (0x1 << 18) // (ADC12B) Disables the corresponding interrupt. #define AT91C_ADC12B_IDR_RXBUFF (0x1 << 19) // (ADC12B) Receive Buffer Full Interrupt Disable #define AT91C_ADC12B_IDR_RXBUFF_NO_EFFECT (0x0 << 19) // (ADC12B) No effect. #define AT91C_ADC12B_IDR_RXBUFF_DISABLE (0x1 << 19) // (ADC12B) Disables the corresponding interrupt. // -------- ADC12B_IMR : (ADC12B Offset: 0x2C) Interrupt Mask Register -------- #define AT91C_ADC12B_IMR_EOC0 (0x1 << 0) // (ADC12B) End of Conversion Interrupt Mask 0 #define AT91C_ADC12B_IMR_EOC0_DIS (0x0 << 0) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_EOC0_EN (0x1 << 0) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_EOC1 (0x1 << 1) // (ADC12B) End of Conversion Interrupt Mask 1 #define AT91C_ADC12B_IMR_EOC1_DIS (0x0 << 1) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_EOC1_EN (0x1 << 1) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_EOC2 (0x1 << 2) // (ADC12B) End of Conversion Interrupt Mask 2 #define AT91C_ADC12B_IMR_EOC2_DIS (0x0 << 2) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_EOC2_EN (0x1 << 2) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_EOC3 (0x1 << 3) // (ADC12B) End of Conversion Interrupt Mask 3 #define AT91C_ADC12B_IMR_EOC3_DIS (0x0 << 3) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_EOC3_EN (0x1 << 3) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_EOC4 (0x1 << 4) // (ADC12B) End of Conversion Interrupt Mask 4 #define AT91C_ADC12B_IMR_EOC4_DIS (0x0 << 4) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_EOC4_EN (0x1 << 4) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_EOC5 (0x1 << 5) // (ADC12B) End of Conversion Interrupt Mask 5 #define AT91C_ADC12B_IMR_EOC5_DIS (0x0 << 5) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_EOC5_EN (0x1 << 5) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_EOC6 (0x1 << 6) // (ADC12B) End of Conversion Interrupt Mask 6 #define AT91C_ADC12B_IMR_EOC6_DIS (0x0 << 6) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_EOC6_EN (0x1 << 6) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_EOC7 (0x1 << 7) // (ADC12B) End of Conversion Interrupt Mask 7 #define AT91C_ADC12B_IMR_EOC7_DIS (0x0 << 7) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_EOC7_EN (0x1 << 7) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_OVRE0 (0x1 << 8) // (ADC12B) Overrun Error Interrupt Mask 0 #define AT91C_ADC12B_IMR_OVRE0_DIS (0x0 << 8) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_OVRE0_EN (0x1 << 8) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_OVRE1 (0x1 << 9) // (ADC12B) Overrun Error Interrupt Mask 1 #define AT91C_ADC12B_IMR_OVRE1_DIS (0x0 << 9) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_OVRE1_EN (0x1 << 9) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_OVRE2 (0x1 << 10) // (ADC12B) Overrun Error Interrupt Mask 2 #define AT91C_ADC12B_IMR_OVRE2_DIS (0x0 << 10) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_OVRE2_EN (0x1 << 10) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_OVRE3 (0x1 << 11) // (ADC12B) Overrun Error Interrupt Mask 3 #define AT91C_ADC12B_IMR_OVRE3_DIS (0x0 << 11) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_OVRE3_EN (0x1 << 11) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_OVRE4 (0x1 << 12) // (ADC12B) Overrun Error Interrupt Mask 4 #define AT91C_ADC12B_IMR_OVRE4_DIS (0x0 << 12) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_OVRE4_EN (0x1 << 12) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_OVRE5 (0x1 << 13) // (ADC12B) Overrun Error Interrupt Mask 5 #define AT91C_ADC12B_IMR_OVRE5_DIS (0x0 << 13) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_OVRE5_EN (0x1 << 13) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_OVRE6 (0x1 << 14) // (ADC12B) Overrun Error Interrupt Mask 6 #define AT91C_ADC12B_IMR_OVRE6_DIS (0x0 << 14) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_OVRE6_EN (0x1 << 14) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_OVRE7 (0x1 << 15) // (ADC12B) Overrun Error Interrupt Mask 7 #define AT91C_ADC12B_IMR_OVRE7_DIS (0x0 << 15) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_OVRE7_EN (0x1 << 15) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_DRDY (0x1 << 16) // (ADC12B) Data Ready Interrupt Mask #define AT91C_ADC12B_IMR_DRDY_DIS (0x0 << 16) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_DRDY_EN (0x1 << 16) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_GOVRE (0x1 << 17) // (ADC12B) General Overrun Error Interrupt Mask #define AT91C_ADC12B_IMR_GOVRE_DIS (0x0 << 17) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_GOVRE_EN (0x1 << 17) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_ENDRX (0x1 << 18) // (ADC12B) End of Receive Buffer Interrupt Mask #define AT91C_ADC12B_IMR_ENDRX_DIS (0x0 << 18) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_ENDRX_EN (0x1 << 18) // (ADC12B) The corresponding interrupt is enabled. #define AT91C_ADC12B_IMR_RXBUFF (0x1 << 19) // (ADC12B) Receive Buffer Full Interrupt Mask #define AT91C_ADC12B_IMR_RXBUFF_DIS (0x0 << 19) // (ADC12B) The corresponding interrupt is disabled. #define AT91C_ADC12B_IMR_RXBUFF_EN (0x1 << 19) // (ADC12B) The corresponding interrupt is enabled. // -------- ADC12B_CDR[8] : (ADC12B Offset: 0x30) Channel Data Register -------- #define AT91C_ADC12B_CDR_DATA (0xfff << 0) // (ADC12B) Converted Data // -------- ADC12B_ACR : (ADC12B Offset: 0x64) Analog Control Register -------- #define AT91C_ADC12B_ACR_GAIN (0x3 << 0) // (ADC12B) Input Gain #define AT91C_ADC12B_ACR_IBCTL (0x3 << 6) // (ADC12B) Bias Current Control #define AT91C_ADC12B_ACR_IBCTL_MIN20 (0x0 << 6) // (ADC12B) typ - 20% #define AT91C_ADC12B_ACR_IBCTL_TYP (0x1 << 6) // (ADC12B) typ #define AT91C_ADC12B_ACR_IBCTL_PLUS20 (0x2 << 6) // (ADC12B) typ + 20% #define AT91C_ADC12B_ACR_IBCTL_PLUS40 (0x3 << 6) // (ADC12B) typ + 40% #define AT91C_ADC12B_ACR_DIFF (0x1 << 16) // (ADC12B) Differential Mode #define AT91C_ADC12B_ACR_DIFF_SINGLE (0x0 << 16) // (ADC12B) Single Ended Mode #define AT91C_ADC12B_ACR_DIFF_FULLY (0x1 << 16) // (ADC12B) Fully Differential Mode #define AT91C_ADC12B_ACR_OFFSET (0x1 << 17) // (ADC12B) Input OFFSET // -------- ADC12B_EMR : (ADC12B Offset: 0x68) Extended Mode Register -------- #define AT91C_ADC12B_EMR_OFFMODES (0x1 << 0) // (ADC12B) Off Mode if Sleep Bit (ADC12B_MR) = 1 #define AT91C_ADC12B_EMR_OFFMODES_STBY (0x0 << 0) // (ADC12B) Standby Mode #define AT91C_ADC12B_EMR_OFFMODES_OFF (0x1 << 0) // (ADC12B) Off Mode #define AT91C_ADC12B_EMR_OFF_MODE_STARTUP_TIME (0xff << 16) // (ADC12B) Startup Time // ***************************************************************************** // SOFTWARE API DEFINITION FOR Timer Counter Channel Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_TC { AT91_REG TC_CCR; // Channel Control Register AT91_REG TC_CMR; // Channel Mode Register (Capture Mode / Waveform Mode) AT91_REG Reserved0[2]; // AT91_REG TC_CV; // Counter Value AT91_REG TC_RA; // Register A AT91_REG TC_RB; // Register B AT91_REG TC_RC; // Register C AT91_REG TC_SR; // Status Register AT91_REG TC_IER; // Interrupt Enable Register AT91_REG TC_IDR; // Interrupt Disable Register AT91_REG TC_IMR; // Interrupt Mask Register } AT91S_TC, *AT91PS_TC; #else #define TC_CCR (AT91_CAST(AT91_REG *) 0x00000000) // (TC_CCR) Channel Control Register #define TC_CMR (AT91_CAST(AT91_REG *) 0x00000004) // (TC_CMR) Channel Mode Register (Capture Mode / Waveform Mode) #define TC_CV (AT91_CAST(AT91_REG *) 0x00000010) // (TC_CV) Counter Value #define TC_RA (AT91_CAST(AT91_REG *) 0x00000014) // (TC_RA) Register A #define TC_RB (AT91_CAST(AT91_REG *) 0x00000018) // (TC_RB) Register B #define TC_RC (AT91_CAST(AT91_REG *) 0x0000001C) // (TC_RC) Register C #define TC_SR (AT91_CAST(AT91_REG *) 0x00000020) // (TC_SR) Status Register #define TC_IER (AT91_CAST(AT91_REG *) 0x00000024) // (TC_IER) Interrupt Enable Register #define TC_IDR (AT91_CAST(AT91_REG *) 0x00000028) // (TC_IDR) Interrupt Disable Register #define TC_IMR (AT91_CAST(AT91_REG *) 0x0000002C) // (TC_IMR) Interrupt Mask Register #endif // -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- #define AT91C_TC_CLKEN (0x1 << 0) // (TC) Counter Clock Enable Command #define AT91C_TC_CLKDIS (0x1 << 1) // (TC) Counter Clock Disable Command #define AT91C_TC_SWTRG (0x1 << 2) // (TC) Software Trigger Command // -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- #define AT91C_TC_CLKS (0x7 << 0) // (TC) Clock Selection #define AT91C_TC_CLKS_TIMER_DIV1_CLOCK (0x0) // (TC) Clock selected: TIMER_DIV1_CLOCK #define AT91C_TC_CLKS_TIMER_DIV2_CLOCK (0x1) // (TC) Clock selected: TIMER_DIV2_CLOCK #define AT91C_TC_CLKS_TIMER_DIV3_CLOCK (0x2) // (TC) Clock selected: TIMER_DIV3_CLOCK #define AT91C_TC_CLKS_TIMER_DIV4_CLOCK (0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK #define AT91C_TC_CLKS_TIMER_DIV5_CLOCK (0x4) // (TC) Clock selected: TIMER_DIV5_CLOCK #define AT91C_TC_CLKS_XC0 (0x5) // (TC) Clock selected: XC0 #define AT91C_TC_CLKS_XC1 (0x6) // (TC) Clock selected: XC1 #define AT91C_TC_CLKS_XC2 (0x7) // (TC) Clock selected: XC2 #define AT91C_TC_CLKI (0x1 << 3) // (TC) Clock Invert #define AT91C_TC_BURST (0x3 << 4) // (TC) Burst Signal Selection #define AT91C_TC_BURST_NONE (0x0 << 4) // (TC) The clock is not gated by an external signal #define AT91C_TC_BURST_XC0 (0x1 << 4) // (TC) XC0 is ANDed with the selected clock #define AT91C_TC_BURST_XC1 (0x2 << 4) // (TC) XC1 is ANDed with the selected clock #define AT91C_TC_BURST_XC2 (0x3 << 4) // (TC) XC2 is ANDed with the selected clock #define AT91C_TC_CPCSTOP (0x1 << 6) // (TC) Counter Clock Stopped with RC Compare #define AT91C_TC_LDBSTOP (0x1 << 6) // (TC) Counter Clock Stopped with RB Loading #define AT91C_TC_CPCDIS (0x1 << 7) // (TC) Counter Clock Disable with RC Compare #define AT91C_TC_LDBDIS (0x1 << 7) // (TC) Counter Clock Disabled with RB Loading #define AT91C_TC_ETRGEDG (0x3 << 8) // (TC) External Trigger Edge Selection #define AT91C_TC_ETRGEDG_NONE (0x0 << 8) // (TC) Edge: None #define AT91C_TC_ETRGEDG_RISING (0x1 << 8) // (TC) Edge: rising edge #define AT91C_TC_ETRGEDG_FALLING (0x2 << 8) // (TC) Edge: falling edge #define AT91C_TC_ETRGEDG_BOTH (0x3 << 8) // (TC) Edge: each edge #define AT91C_TC_EEVTEDG (0x3 << 8) // (TC) External Event Edge Selection #define AT91C_TC_EEVTEDG_NONE (0x0 << 8) // (TC) Edge: None #define AT91C_TC_EEVTEDG_RISING (0x1 << 8) // (TC) Edge: rising edge #define AT91C_TC_EEVTEDG_FALLING (0x2 << 8) // (TC) Edge: falling edge #define AT91C_TC_EEVTEDG_BOTH (0x3 << 8) // (TC) Edge: each edge #define AT91C_TC_EEVT (0x3 << 10) // (TC) External Event Selection #define AT91C_TC_EEVT_TIOB (0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input #define AT91C_TC_EEVT_XC0 (0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output #define AT91C_TC_EEVT_XC1 (0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output #define AT91C_TC_EEVT_XC2 (0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output #define AT91C_TC_ABETRG (0x1 << 10) // (TC) TIOA or TIOB External Trigger Selection #define AT91C_TC_ENETRG (0x1 << 12) // (TC) External Event Trigger enable #define AT91C_TC_WAVESEL (0x3 << 13) // (TC) Waveform Selection #define AT91C_TC_WAVESEL_UP (0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare #define AT91C_TC_WAVESEL_UPDOWN (0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare #define AT91C_TC_WAVESEL_UP_AUTO (0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare #define AT91C_TC_WAVESEL_UPDOWN_AUTO (0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare #define AT91C_TC_CPCTRG (0x1 << 14) // (TC) RC Compare Trigger Enable #define AT91C_TC_WAVE (0x1 << 15) // (TC) #define AT91C_TC_ACPA (0x3 << 16) // (TC) RA Compare Effect on TIOA #define AT91C_TC_ACPA_NONE (0x0 << 16) // (TC) Effect: none #define AT91C_TC_ACPA_SET (0x1 << 16) // (TC) Effect: set #define AT91C_TC_ACPA_CLEAR (0x2 << 16) // (TC) Effect: clear #define AT91C_TC_ACPA_TOGGLE (0x3 << 16) // (TC) Effect: toggle #define AT91C_TC_LDRA (0x3 << 16) // (TC) RA Loading Selection #define AT91C_TC_LDRA_NONE (0x0 << 16) // (TC) Edge: None #define AT91C_TC_LDRA_RISING (0x1 << 16) // (TC) Edge: rising edge of TIOA #define AT91C_TC_LDRA_FALLING (0x2 << 16) // (TC) Edge: falling edge of TIOA #define AT91C_TC_LDRA_BOTH (0x3 << 16) // (TC) Edge: each edge of TIOA #define AT91C_TC_ACPC (0x3 << 18) // (TC) RC Compare Effect on TIOA #define AT91C_TC_ACPC_NONE (0x0 << 18) // (TC) Effect: none #define AT91C_TC_ACPC_SET (0x1 << 18) // (TC) Effect: set #define AT91C_TC_ACPC_CLEAR (0x2 << 18) // (TC) Effect: clear #define AT91C_TC_ACPC_TOGGLE (0x3 << 18) // (TC) Effect: toggle #define AT91C_TC_LDRB (0x3 << 18) // (TC) RB Loading Selection #define AT91C_TC_LDRB_NONE (0x0 << 18) // (TC) Edge: None #define AT91C_TC_LDRB_RISING (0x1 << 18) // (TC) Edge: rising edge of TIOA #define AT91C_TC_LDRB_FALLING (0x2 << 18) // (TC) Edge: falling edge of TIOA #define AT91C_TC_LDRB_BOTH (0x3 << 18) // (TC) Edge: each edge of TIOA #define AT91C_TC_AEEVT (0x3 << 20) // (TC) External Event Effect on TIOA #define AT91C_TC_AEEVT_NONE (0x0 << 20) // (TC) Effect: none #define AT91C_TC_AEEVT_SET (0x1 << 20) // (TC) Effect: set #define AT91C_TC_AEEVT_CLEAR (0x2 << 20) // (TC) Effect: clear #define AT91C_TC_AEEVT_TOGGLE (0x3 << 20) // (TC) Effect: toggle #define AT91C_TC_ASWTRG (0x3 << 22) // (TC) Software Trigger Effect on TIOA #define AT91C_TC_ASWTRG_NONE (0x0 << 22) // (TC) Effect: none #define AT91C_TC_ASWTRG_SET (0x1 << 22) // (TC) Effect: set #define AT91C_TC_ASWTRG_CLEAR (0x2 << 22) // (TC) Effect: clear #define AT91C_TC_ASWTRG_TOGGLE (0x3 << 22) // (TC) Effect: toggle #define AT91C_TC_BCPB (0x3 << 24) // (TC) RB Compare Effect on TIOB #define AT91C_TC_BCPB_NONE (0x0 << 24) // (TC) Effect: none #define AT91C_TC_BCPB_SET (0x1 << 24) // (TC) Effect: set #define AT91C_TC_BCPB_CLEAR (0x2 << 24) // (TC) Effect: clear #define AT91C_TC_BCPB_TOGGLE (0x3 << 24) // (TC) Effect: toggle #define AT91C_TC_BCPC (0x3 << 26) // (TC) RC Compare Effect on TIOB #define AT91C_TC_BCPC_NONE (0x0 << 26) // (TC) Effect: none #define AT91C_TC_BCPC_SET (0x1 << 26) // (TC) Effect: set #define AT91C_TC_BCPC_CLEAR (0x2 << 26) // (TC) Effect: clear #define AT91C_TC_BCPC_TOGGLE (0x3 << 26) // (TC) Effect: toggle #define AT91C_TC_BEEVT (0x3 << 28) // (TC) External Event Effect on TIOB #define AT91C_TC_BEEVT_NONE (0x0 << 28) // (TC) Effect: none #define AT91C_TC_BEEVT_SET (0x1 << 28) // (TC) Effect: set #define AT91C_TC_BEEVT_CLEAR (0x2 << 28) // (TC) Effect: clear #define AT91C_TC_BEEVT_TOGGLE (0x3 << 28) // (TC) Effect: toggle #define AT91C_TC_BSWTRG (0x3 << 30) // (TC) Software Trigger Effect on TIOB #define AT91C_TC_BSWTRG_NONE (0x0 << 30) // (TC) Effect: none #define AT91C_TC_BSWTRG_SET (0x1 << 30) // (TC) Effect: set #define AT91C_TC_BSWTRG_CLEAR (0x2 << 30) // (TC) Effect: clear #define AT91C_TC_BSWTRG_TOGGLE (0x3 << 30) // (TC) Effect: toggle // -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- #define AT91C_TC_COVFS (0x1 << 0) // (TC) Counter Overflow #define AT91C_TC_LOVRS (0x1 << 1) // (TC) Load Overrun #define AT91C_TC_CPAS (0x1 << 2) // (TC) RA Compare #define AT91C_TC_CPBS (0x1 << 3) // (TC) RB Compare #define AT91C_TC_CPCS (0x1 << 4) // (TC) RC Compare #define AT91C_TC_LDRAS (0x1 << 5) // (TC) RA Loading #define AT91C_TC_LDRBS (0x1 << 6) // (TC) RB Loading #define AT91C_TC_ETRGS (0x1 << 7) // (TC) External Trigger #define AT91C_TC_CLKSTA (0x1 << 16) // (TC) Clock Enabling #define AT91C_TC_MTIOA (0x1 << 17) // (TC) TIOA Mirror #define AT91C_TC_MTIOB (0x1 << 18) // (TC) TIOA Mirror // -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- // -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- // -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- // ***************************************************************************** // SOFTWARE API DEFINITION FOR Timer Counter Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_TCB { AT91S_TC TCB_TC0; // TC Channel 0 AT91_REG Reserved0[4]; // AT91S_TC TCB_TC1; // TC Channel 1 AT91_REG Reserved1[4]; // AT91S_TC TCB_TC2; // TC Channel 2 AT91_REG Reserved2[4]; // AT91_REG TCB_BCR; // TC Block Control Register AT91_REG TCB_BMR; // TC Block Mode Register AT91_REG Reserved3[9]; // AT91_REG TCB_ADDRSIZE; // TC ADDRSIZE REGISTER AT91_REG TCB_IPNAME1; // TC IPNAME1 REGISTER AT91_REG TCB_IPNAME2; // TC IPNAME2 REGISTER AT91_REG TCB_FEATURES; // TC FEATURES REGISTER AT91_REG TCB_VER; // Version Register } AT91S_TCB, *AT91PS_TCB; #else #define TCB_BCR (AT91_CAST(AT91_REG *) 0x000000C0) // (TCB_BCR) TC Block Control Register #define TCB_BMR (AT91_CAST(AT91_REG *) 0x000000C4) // (TCB_BMR) TC Block Mode Register #define TC_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (TC_ADDRSIZE) TC ADDRSIZE REGISTER #define TC_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (TC_IPNAME1) TC IPNAME1 REGISTER #define TC_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (TC_IPNAME2) TC IPNAME2 REGISTER #define TC_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (TC_FEATURES) TC FEATURES REGISTER #define TC_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (TC_VER) Version Register #endif // -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- #define AT91C_TCB_SYNC (0x1 << 0) // (TCB) Synchro Command // -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- #define AT91C_TCB_TC0XC0S (0x3 << 0) // (TCB) External Clock Signal 0 Selection #define AT91C_TCB_TC0XC0S_TCLK0 (0x0) // (TCB) TCLK0 connected to XC0 #define AT91C_TCB_TC0XC0S_NONE (0x1) // (TCB) None signal connected to XC0 #define AT91C_TCB_TC0XC0S_TIOA1 (0x2) // (TCB) TIOA1 connected to XC0 #define AT91C_TCB_TC0XC0S_TIOA2 (0x3) // (TCB) TIOA2 connected to XC0 #define AT91C_TCB_TC1XC1S (0x3 << 2) // (TCB) External Clock Signal 1 Selection #define AT91C_TCB_TC1XC1S_TCLK1 (0x0 << 2) // (TCB) TCLK1 connected to XC1 #define AT91C_TCB_TC1XC1S_NONE (0x1 << 2) // (TCB) None signal connected to XC1 #define AT91C_TCB_TC1XC1S_TIOA0 (0x2 << 2) // (TCB) TIOA0 connected to XC1 #define AT91C_TCB_TC1XC1S_TIOA2 (0x3 << 2) // (TCB) TIOA2 connected to XC1 #define AT91C_TCB_TC2XC2S (0x3 << 4) // (TCB) External Clock Signal 2 Selection #define AT91C_TCB_TC2XC2S_TCLK2 (0x0 << 4) // (TCB) TCLK2 connected to XC2 #define AT91C_TCB_TC2XC2S_NONE (0x1 << 4) // (TCB) None signal connected to XC2 #define AT91C_TCB_TC2XC2S_TIOA0 (0x2 << 4) // (TCB) TIOA0 connected to XC2 #define AT91C_TCB_TC2XC2S_TIOA1 (0x3 << 4) // (TCB) TIOA2 connected to XC2 // ***************************************************************************** // SOFTWARE API DEFINITION FOR Embedded Flash Controller 2.0 // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_EFC { AT91_REG EFC_FMR; // EFC Flash Mode Register AT91_REG EFC_FCR; // EFC Flash Command Register AT91_REG EFC_FSR; // EFC Flash Status Register AT91_REG EFC_FRR; // EFC Flash Result Register AT91_REG Reserved0[1]; // AT91_REG EFC_FVR; // EFC Flash Version Register } AT91S_EFC, *AT91PS_EFC; #else #define EFC_FMR (AT91_CAST(AT91_REG *) 0x00000000) // (EFC_FMR) EFC Flash Mode Register #define EFC_FCR (AT91_CAST(AT91_REG *) 0x00000004) // (EFC_FCR) EFC Flash Command Register #define EFC_FSR (AT91_CAST(AT91_REG *) 0x00000008) // (EFC_FSR) EFC Flash Status Register #define EFC_FRR (AT91_CAST(AT91_REG *) 0x0000000C) // (EFC_FRR) EFC Flash Result Register #define EFC_FVR (AT91_CAST(AT91_REG *) 0x00000014) // (EFC_FVR) EFC Flash Version Register #endif // -------- EFC_FMR : (EFC Offset: 0x0) EFC Flash Mode Register -------- #define AT91C_EFC_FRDY (0x1 << 0) // (EFC) Ready Interrupt Enable #define AT91C_EFC_FWS (0xF << 8) // (EFC) Flash Wait State. #define AT91C_EFC_FWS_0WS (0x0 << 8) // (EFC) 0 Wait State #define AT91C_EFC_FWS_1WS (0x1 << 8) // (EFC) 1 Wait State #define AT91C_EFC_FWS_2WS (0x2 << 8) // (EFC) 2 Wait States #define AT91C_EFC_FWS_3WS (0x3 << 8) // (EFC) 3 Wait States // -------- EFC_FCR : (EFC Offset: 0x4) EFC Flash Command Register -------- #define AT91C_EFC_FCMD (0xFF << 0) // (EFC) Flash Command #define AT91C_EFC_FCMD_GETD (0x0) // (EFC) Get Flash Descriptor #define AT91C_EFC_FCMD_WP (0x1) // (EFC) Write Page #define AT91C_EFC_FCMD_WPL (0x2) // (EFC) Write Page and Lock #define AT91C_EFC_FCMD_EWP (0x3) // (EFC) Erase Page and Write Page #define AT91C_EFC_FCMD_EWPL (0x4) // (EFC) Erase Page and Write Page then Lock #define AT91C_EFC_FCMD_EA (0x5) // (EFC) Erase All #define AT91C_EFC_FCMD_EPL (0x6) // (EFC) Erase Plane #define AT91C_EFC_FCMD_EPA (0x7) // (EFC) Erase Pages #define AT91C_EFC_FCMD_SLB (0x8) // (EFC) Set Lock Bit #define AT91C_EFC_FCMD_CLB (0x9) // (EFC) Clear Lock Bit #define AT91C_EFC_FCMD_GLB (0xA) // (EFC) Get Lock Bit #define AT91C_EFC_FCMD_SFB (0xB) // (EFC) Set Fuse Bit #define AT91C_EFC_FCMD_CFB (0xC) // (EFC) Clear Fuse Bit #define AT91C_EFC_FCMD_GFB (0xD) // (EFC) Get Fuse Bit #define AT91C_EFC_FCMD_STUI (0xE) // (EFC) Start Read Unique ID #define AT91C_EFC_FCMD_SPUI (0xF) // (EFC) Stop Read Unique ID #define AT91C_EFC_FARG (0xFFFF << 8) // (EFC) Flash Command Argument #define AT91C_EFC_FKEY (0x5A << 24) // (EFC) Flash Writing Protection Key // -------- EFC_FSR : (EFC Offset: 0x8) EFC Flash Status Register -------- #define AT91C_EFC_FRDY_S (0x1 << 0) // (EFC) Flash Ready Status #define AT91C_EFC_FCMDE (0x1 << 1) // (EFC) Flash Command Error Status #define AT91C_EFC_LOCKE (0x1 << 2) // (EFC) Flash Lock Error Status // -------- EFC_FRR : (EFC Offset: 0xc) EFC Flash Result Register -------- #define AT91C_EFC_FVALUE (0x0 << 0) // (EFC) Flash Result Value // ***************************************************************************** // SOFTWARE API DEFINITION FOR Multimedia Card Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_MCI { AT91_REG MCI_CR; // MCI Control Register AT91_REG MCI_MR; // MCI Mode Register AT91_REG MCI_DTOR; // MCI Data Timeout Register AT91_REG MCI_SDCR; // MCI SD/SDIO Card Register AT91_REG MCI_ARGR; // MCI Argument Register AT91_REG MCI_CMDR; // MCI Command Register AT91_REG MCI_BLKR; // MCI Block Register AT91_REG MCI_CSTOR; // MCI Completion Signal Timeout Register AT91_REG MCI_RSPR[4]; // MCI Response Register AT91_REG MCI_RDR; // MCI Receive Data Register AT91_REG MCI_TDR; // MCI Transmit Data Register AT91_REG Reserved0[2]; // AT91_REG MCI_SR; // MCI Status Register AT91_REG MCI_IER; // MCI Interrupt Enable Register AT91_REG MCI_IDR; // MCI Interrupt Disable Register AT91_REG MCI_IMR; // MCI Interrupt Mask Register AT91_REG MCI_DMA; // MCI DMA Configuration Register AT91_REG MCI_CFG; // MCI Configuration Register AT91_REG Reserved1[35]; // AT91_REG MCI_WPCR; // MCI Write Protection Control Register AT91_REG MCI_WPSR; // MCI Write Protection Status Register AT91_REG MCI_ADDRSIZE; // MCI ADDRSIZE REGISTER AT91_REG MCI_IPNAME1; // MCI IPNAME1 REGISTER AT91_REG MCI_IPNAME2; // MCI IPNAME2 REGISTER AT91_REG MCI_FEATURES; // MCI FEATURES REGISTER AT91_REG MCI_VER; // MCI VERSION REGISTER AT91_REG MCI_RPR; // Receive Pointer Register AT91_REG MCI_RCR; // Receive Counter Register AT91_REG MCI_TPR; // Transmit Pointer Register AT91_REG MCI_TCR; // Transmit Counter Register AT91_REG MCI_RNPR; // Receive Next Pointer Register AT91_REG MCI_RNCR; // Receive Next Counter Register AT91_REG MCI_TNPR; // Transmit Next Pointer Register AT91_REG MCI_TNCR; // Transmit Next Counter Register AT91_REG MCI_PTCR; // PDC Transfer Control Register AT91_REG MCI_PTSR; // PDC Transfer Status Register AT91_REG Reserved2[54]; // AT91_REG MCI_FIFO; // MCI FIFO Aperture Register } AT91S_MCI, *AT91PS_MCI; #else #define MCI_CR (AT91_CAST(AT91_REG *) 0x00000000) // (MCI_CR) MCI Control Register #define MCI_MR (AT91_CAST(AT91_REG *) 0x00000004) // (MCI_MR) MCI Mode Register #define MCI_DTOR (AT91_CAST(AT91_REG *) 0x00000008) // (MCI_DTOR) MCI Data Timeout Register #define MCI_SDCR (AT91_CAST(AT91_REG *) 0x0000000C) // (MCI_SDCR) MCI SD/SDIO Card Register #define MCI_ARGR (AT91_CAST(AT91_REG *) 0x00000010) // (MCI_ARGR) MCI Argument Register #define MCI_CMDR (AT91_CAST(AT91_REG *) 0x00000014) // (MCI_CMDR) MCI Command Register #define MCI_BLKR (AT91_CAST(AT91_REG *) 0x00000018) // (MCI_BLKR) MCI Block Register #define MCI_CSTOR (AT91_CAST(AT91_REG *) 0x0000001C) // (MCI_CSTOR) MCI Completion Signal Timeout Register #define MCI_RSPR (AT91_CAST(AT91_REG *) 0x00000020) // (MCI_RSPR) MCI Response Register #define MCI_RDR (AT91_CAST(AT91_REG *) 0x00000030) // (MCI_RDR) MCI Receive Data Register #define MCI_TDR (AT91_CAST(AT91_REG *) 0x00000034) // (MCI_TDR) MCI Transmit Data Register #define MCI_SR (AT91_CAST(AT91_REG *) 0x00000040) // (MCI_SR) MCI Status Register #define MCI_IER (AT91_CAST(AT91_REG *) 0x00000044) // (MCI_IER) MCI Interrupt Enable Register #define MCI_IDR (AT91_CAST(AT91_REG *) 0x00000048) // (MCI_IDR) MCI Interrupt Disable Register #define MCI_IMR (AT91_CAST(AT91_REG *) 0x0000004C) // (MCI_IMR) MCI Interrupt Mask Register #define MCI_DMA (AT91_CAST(AT91_REG *) 0x00000050) // (MCI_DMA) MCI DMA Configuration Register #define MCI_CFG (AT91_CAST(AT91_REG *) 0x00000054) // (MCI_CFG) MCI Configuration Register #define MCI_WPCR (AT91_CAST(AT91_REG *) 0x000000E4) // (MCI_WPCR) MCI Write Protection Control Register #define MCI_WPSR (AT91_CAST(AT91_REG *) 0x000000E8) // (MCI_WPSR) MCI Write Protection Status Register #define MCI_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (MCI_ADDRSIZE) MCI ADDRSIZE REGISTER #define MCI_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (MCI_IPNAME1) MCI IPNAME1 REGISTER #define MCI_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (MCI_IPNAME2) MCI IPNAME2 REGISTER #define MCI_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (MCI_FEATURES) MCI FEATURES REGISTER #define MCI_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (MCI_VER) MCI VERSION REGISTER #define MCI_FIFO (AT91_CAST(AT91_REG *) 0x00000200) // (MCI_FIFO) MCI FIFO Aperture Register #endif // -------- MCI_CR : (MCI Offset: 0x0) MCI Control Register -------- #define AT91C_MCI_MCIEN (0x1 << 0) // (MCI) Multimedia Interface Enable #define AT91C_MCI_MCIEN_0 (0x0) // (MCI) No effect #define AT91C_MCI_MCIEN_1 (0x1) // (MCI) Enable the MultiMedia Interface if MCIDIS is 0 #define AT91C_MCI_MCIDIS (0x1 << 1) // (MCI) Multimedia Interface Disable #define AT91C_MCI_MCIDIS_0 (0x0 << 1) // (MCI) No effect #define AT91C_MCI_MCIDIS_1 (0x1 << 1) // (MCI) Disable the MultiMedia Interface #define AT91C_MCI_PWSEN (0x1 << 2) // (MCI) Power Save Mode Enable #define AT91C_MCI_PWSEN_0 (0x0 << 2) // (MCI) No effect #define AT91C_MCI_PWSEN_1 (0x1 << 2) // (MCI) Enable the Power-saving mode if PWSDIS is 0. #define AT91C_MCI_PWSDIS (0x1 << 3) // (MCI) Power Save Mode Disable #define AT91C_MCI_PWSDIS_0 (0x0 << 3) // (MCI) No effect #define AT91C_MCI_PWSDIS_1 (0x1 << 3) // (MCI) Disable the Power-saving mode. #define AT91C_MCI_IOWAITEN (0x1 << 4) // (MCI) SDIO Read Wait Enable #define AT91C_MCI_IOWAITEN_0 (0x0 << 4) // (MCI) No effect #define AT91C_MCI_IOWAITEN_1 (0x1 << 4) // (MCI) Enables the SDIO Read Wait Operation. #define AT91C_MCI_IOWAITDIS (0x1 << 5) // (MCI) SDIO Read Wait Disable #define AT91C_MCI_IOWAITDIS_0 (0x0 << 5) // (MCI) No effect #define AT91C_MCI_IOWAITDIS_1 (0x1 << 5) // (MCI) Disables the SDIO Read Wait Operation. #define AT91C_MCI_SWRST (0x1 << 7) // (MCI) MCI Software reset #define AT91C_MCI_SWRST_0 (0x0 << 7) // (MCI) No effect #define AT91C_MCI_SWRST_1 (0x1 << 7) // (MCI) Resets the MCI // -------- MCI_MR : (MCI Offset: 0x4) MCI Mode Register -------- #define AT91C_MCI_CLKDIV (0xFF << 0) // (MCI) Clock Divider #define AT91C_MCI_PWSDIV (0x7 << 8) // (MCI) Power Saving Divider #define AT91C_MCI_RDPROOF (0x1 << 11) // (MCI) Read Proof Enable #define AT91C_MCI_RDPROOF_DISABLE (0x0 << 11) // (MCI) Disables Read Proof #define AT91C_MCI_RDPROOF_ENABLE (0x1 << 11) // (MCI) Enables Read Proof #define AT91C_MCI_WRPROOF (0x1 << 12) // (MCI) Write Proof Enable #define AT91C_MCI_WRPROOF_DISABLE (0x0 << 12) // (MCI) Disables Write Proof #define AT91C_MCI_WRPROOF_ENABLE (0x1 << 12) // (MCI) Enables Write Proof #define AT91C_MCI_PDCFBYTE (0x1 << 13) // (MCI) PDC Force Byte Transfer #define AT91C_MCI_PDCFBYTE_DISABLE (0x0 << 13) // (MCI) Disables PDC Force Byte Transfer #define AT91C_MCI_PDCFBYTE_ENABLE (0x1 << 13) // (MCI) Enables PDC Force Byte Transfer #define AT91C_MCI_PDCPADV (0x1 << 14) // (MCI) PDC Padding Value #define AT91C_MCI_PDCMODE (0x1 << 15) // (MCI) PDC Oriented Mode #define AT91C_MCI_PDCMODE_DISABLE (0x0 << 15) // (MCI) Disables PDC Transfer #define AT91C_MCI_PDCMODE_ENABLE (0x1 << 15) // (MCI) Enables PDC Transfer #define AT91C_MCI_BLKLEN (0xFFFF << 16) // (MCI) Data Block Length // -------- MCI_DTOR : (MCI Offset: 0x8) MCI Data Timeout Register -------- #define AT91C_MCI_DTOCYC (0xF << 0) // (MCI) Data Timeout Cycle Number #define AT91C_MCI_DTOMUL (0x7 << 4) // (MCI) Data Timeout Multiplier #define AT91C_MCI_DTOMUL_1 (0x0 << 4) // (MCI) DTOCYC x 1 #define AT91C_MCI_DTOMUL_16 (0x1 << 4) // (MCI) DTOCYC x 16 #define AT91C_MCI_DTOMUL_128 (0x2 << 4) // (MCI) DTOCYC x 128 #define AT91C_MCI_DTOMUL_256 (0x3 << 4) // (MCI) DTOCYC x 256 #define AT91C_MCI_DTOMUL_1024 (0x4 << 4) // (MCI) DTOCYC x 1024 #define AT91C_MCI_DTOMUL_4096 (0x5 << 4) // (MCI) DTOCYC x 4096 #define AT91C_MCI_DTOMUL_65536 (0x6 << 4) // (MCI) DTOCYC x 65536 #define AT91C_MCI_DTOMUL_1048576 (0x7 << 4) // (MCI) DTOCYC x 1048576 // -------- MCI_SDCR : (MCI Offset: 0xc) MCI SD Card Register -------- #define AT91C_MCI_SCDSEL (0x3 << 0) // (MCI) SD Card/SDIO Selector #define AT91C_MCI_SCDSEL_SLOTA (0x0) // (MCI) Slot A selected #define AT91C_MCI_SCDSEL_SLOTB (0x1) // (MCI) Slot B selected #define AT91C_MCI_SCDSEL_SLOTC (0x2) // (MCI) Slot C selected #define AT91C_MCI_SCDSEL_SLOTD (0x3) // (MCI) Slot D selected #define AT91C_MCI_SCDBUS (0x3 << 6) // (MCI) SDCard/SDIO Bus Width #define AT91C_MCI_SCDBUS_1BIT (0x0 << 6) // (MCI) 1-bit data bus #define AT91C_MCI_SCDBUS_4BITS (0x2 << 6) // (MCI) 4-bits data bus #define AT91C_MCI_SCDBUS_8BITS (0x3 << 6) // (MCI) 8-bits data bus // -------- MCI_CMDR : (MCI Offset: 0x14) MCI Command Register -------- #define AT91C_MCI_CMDNB (0x3F << 0) // (MCI) Command Number #define AT91C_MCI_RSPTYP (0x3 << 6) // (MCI) Response Type #define AT91C_MCI_RSPTYP_NO (0x0 << 6) // (MCI) No response #define AT91C_MCI_RSPTYP_48 (0x1 << 6) // (MCI) 48-bit response #define AT91C_MCI_RSPTYP_136 (0x2 << 6) // (MCI) 136-bit response #define AT91C_MCI_RSPTYP_R1B (0x3 << 6) // (MCI) R1b response #define AT91C_MCI_SPCMD (0x7 << 8) // (MCI) Special CMD #define AT91C_MCI_SPCMD_NONE (0x0 << 8) // (MCI) Not a special CMD #define AT91C_MCI_SPCMD_INIT (0x1 << 8) // (MCI) Initialization CMD #define AT91C_MCI_SPCMD_SYNC (0x2 << 8) // (MCI) Synchronized CMD #define AT91C_MCI_SPCMD_CE_ATA (0x3 << 8) // (MCI) CE-ATA Completion Signal disable CMD #define AT91C_MCI_SPCMD_IT_CMD (0x4 << 8) // (MCI) Interrupt command #define AT91C_MCI_SPCMD_IT_REP (0x5 << 8) // (MCI) Interrupt response #define AT91C_MCI_OPDCMD (0x1 << 11) // (MCI) Open Drain Command #define AT91C_MCI_OPDCMD_PUSHPULL (0x0 << 11) // (MCI) Push/pull command #define AT91C_MCI_OPDCMD_OPENDRAIN (0x1 << 11) // (MCI) Open drain command #define AT91C_MCI_MAXLAT (0x1 << 12) // (MCI) Maximum Latency for Command to respond #define AT91C_MCI_MAXLAT_5 (0x0 << 12) // (MCI) 5 cycles maximum latency #define AT91C_MCI_MAXLAT_64 (0x1 << 12) // (MCI) 64 cycles maximum latency #define AT91C_MCI_TRCMD (0x3 << 16) // (MCI) Transfer CMD #define AT91C_MCI_TRCMD_NO (0x0 << 16) // (MCI) No transfer #define AT91C_MCI_TRCMD_START (0x1 << 16) // (MCI) Start transfer #define AT91C_MCI_TRCMD_STOP (0x2 << 16) // (MCI) Stop transfer #define AT91C_MCI_TRDIR (0x1 << 18) // (MCI) Transfer Direction #define AT91C_MCI_TRDIR_WRITE (0x0 << 18) // (MCI) Write #define AT91C_MCI_TRDIR_READ (0x1 << 18) // (MCI) Read #define AT91C_MCI_TRTYP (0x7 << 19) // (MCI) Transfer Type #define AT91C_MCI_TRTYP_BLOCK (0x0 << 19) // (MCI) MMC/SDCard Single Block Transfer type #define AT91C_MCI_TRTYP_MULTIPLE (0x1 << 19) // (MCI) MMC/SDCard Multiple Block transfer type #define AT91C_MCI_TRTYP_STREAM (0x2 << 19) // (MCI) MMC Stream transfer type #define AT91C_MCI_TRTYP_SDIO_BYTE (0x4 << 19) // (MCI) SDIO Byte transfer type #define AT91C_MCI_TRTYP_SDIO_BLOCK (0x5 << 19) // (MCI) SDIO Block transfer type #define AT91C_MCI_IOSPCMD (0x3 << 24) // (MCI) SDIO Special Command #define AT91C_MCI_IOSPCMD_NONE (0x0 << 24) // (MCI) NOT a special command #define AT91C_MCI_IOSPCMD_SUSPEND (0x1 << 24) // (MCI) SDIO Suspend Command #define AT91C_MCI_IOSPCMD_RESUME (0x2 << 24) // (MCI) SDIO Resume Command #define AT91C_MCI_ATACS (0x1 << 26) // (MCI) ATA with command completion signal #define AT91C_MCI_ATACS_NORMAL (0x0 << 26) // (MCI) normal operation mode #define AT91C_MCI_ATACS_COMPLETION (0x1 << 26) // (MCI) completion signal is expected within MCI_CSTOR // -------- MCI_BLKR : (MCI Offset: 0x18) MCI Block Register -------- #define AT91C_MCI_BCNT (0xFFFF << 0) // (MCI) MMC/SDIO Block Count / SDIO Byte Count // -------- MCI_CSTOR : (MCI Offset: 0x1c) MCI Completion Signal Timeout Register -------- #define AT91C_MCI_CSTOCYC (0xF << 0) // (MCI) Completion Signal Timeout Cycle Number #define AT91C_MCI_CSTOMUL (0x7 << 4) // (MCI) Completion Signal Timeout Multiplier #define AT91C_MCI_CSTOMUL_1 (0x0 << 4) // (MCI) CSTOCYC x 1 #define AT91C_MCI_CSTOMUL_16 (0x1 << 4) // (MCI) CSTOCYC x 16 #define AT91C_MCI_CSTOMUL_128 (0x2 << 4) // (MCI) CSTOCYC x 128 #define AT91C_MCI_CSTOMUL_256 (0x3 << 4) // (MCI) CSTOCYC x 256 #define AT91C_MCI_CSTOMUL_1024 (0x4 << 4) // (MCI) CSTOCYC x 1024 #define AT91C_MCI_CSTOMUL_4096 (0x5 << 4) // (MCI) CSTOCYC x 4096 #define AT91C_MCI_CSTOMUL_65536 (0x6 << 4) // (MCI) CSTOCYC x 65536 #define AT91C_MCI_CSTOMUL_1048576 (0x7 << 4) // (MCI) CSTOCYC x 1048576 // -------- MCI_SR : (MCI Offset: 0x40) MCI Status Register -------- #define AT91C_MCI_CMDRDY (0x1 << 0) // (MCI) Command Ready flag #define AT91C_MCI_RXRDY (0x1 << 1) // (MCI) RX Ready flag #define AT91C_MCI_TXRDY (0x1 << 2) // (MCI) TX Ready flag #define AT91C_MCI_BLKE (0x1 << 3) // (MCI) Data Block Transfer Ended flag #define AT91C_MCI_DTIP (0x1 << 4) // (MCI) Data Transfer in Progress flag #define AT91C_MCI_NOTBUSY (0x1 << 5) // (MCI) Data Line Not Busy flag #define AT91C_MCI_ENDRX (0x1 << 6) // (MCI) End of RX Buffer flag #define AT91C_MCI_ENDTX (0x1 << 7) // (MCI) End of TX Buffer flag #define AT91C_MCI_SDIOIRQA (0x1 << 8) // (MCI) SDIO Interrupt for Slot A #define AT91C_MCI_SDIOIRQB (0x1 << 9) // (MCI) SDIO Interrupt for Slot B #define AT91C_MCI_SDIOIRQC (0x1 << 10) // (MCI) SDIO Interrupt for Slot C #define AT91C_MCI_SDIOIRQD (0x1 << 11) // (MCI) SDIO Interrupt for Slot D #define AT91C_MCI_SDIOWAIT (0x1 << 12) // (MCI) SDIO Read Wait operation flag #define AT91C_MCI_CSRCV (0x1 << 13) // (MCI) CE-ATA Completion Signal flag #define AT91C_MCI_RXBUFF (0x1 << 14) // (MCI) RX Buffer Full flag #define AT91C_MCI_TXBUFE (0x1 << 15) // (MCI) TX Buffer Empty flag #define AT91C_MCI_RINDE (0x1 << 16) // (MCI) Response Index Error flag #define AT91C_MCI_RDIRE (0x1 << 17) // (MCI) Response Direction Error flag #define AT91C_MCI_RCRCE (0x1 << 18) // (MCI) Response CRC Error flag #define AT91C_MCI_RENDE (0x1 << 19) // (MCI) Response End Bit Error flag #define AT91C_MCI_RTOE (0x1 << 20) // (MCI) Response Time-out Error flag #define AT91C_MCI_DCRCE (0x1 << 21) // (MCI) data CRC Error flag #define AT91C_MCI_DTOE (0x1 << 22) // (MCI) Data timeout Error flag #define AT91C_MCI_CSTOE (0x1 << 23) // (MCI) Completion Signal timeout Error flag #define AT91C_MCI_BLKOVRE (0x1 << 24) // (MCI) DMA Block Overrun Error flag #define AT91C_MCI_DMADONE (0x1 << 25) // (MCI) DMA Transfer Done flag #define AT91C_MCI_FIFOEMPTY (0x1 << 26) // (MCI) FIFO Empty flag #define AT91C_MCI_XFRDONE (0x1 << 27) // (MCI) Transfer Done flag #define AT91C_MCI_OVRE (0x1 << 30) // (MCI) Overrun flag #define AT91C_MCI_UNRE (0x1 << 31) // (MCI) Underrun flag // -------- MCI_IER : (MCI Offset: 0x44) MCI Interrupt Enable Register -------- // -------- MCI_IDR : (MCI Offset: 0x48) MCI Interrupt Disable Register -------- // -------- MCI_IMR : (MCI Offset: 0x4c) MCI Interrupt Mask Register -------- // -------- MCI_DMA : (MCI Offset: 0x50) MCI DMA Configuration Register -------- #define AT91C_MCI_OFFSET (0x3 << 0) // (MCI) DMA Write Buffer Offset #define AT91C_MCI_CHKSIZE (0x7 << 4) // (MCI) DMA Channel Read/Write Chunk Size #define AT91C_MCI_CHKSIZE_1 (0x0 << 4) // (MCI) Number of data transferred is 1 #define AT91C_MCI_CHKSIZE_4 (0x1 << 4) // (MCI) Number of data transferred is 4 #define AT91C_MCI_CHKSIZE_8 (0x2 << 4) // (MCI) Number of data transferred is 8 #define AT91C_MCI_CHKSIZE_16 (0x3 << 4) // (MCI) Number of data transferred is 16 #define AT91C_MCI_CHKSIZE_32 (0x4 << 4) // (MCI) Number of data transferred is 32 #define AT91C_MCI_DMAEN (0x1 << 8) // (MCI) DMA Hardware Handshaking Enable #define AT91C_MCI_DMAEN_DISABLE (0x0 << 8) // (MCI) DMA interface is disabled #define AT91C_MCI_DMAEN_ENABLE (0x1 << 8) // (MCI) DMA interface is enabled // -------- MCI_CFG : (MCI Offset: 0x54) MCI Configuration Register -------- #define AT91C_MCI_FIFOMODE (0x1 << 0) // (MCI) MCI Internal FIFO Control Mode #define AT91C_MCI_FIFOMODE_AMOUNTDATA (0x0) // (MCI) A write transfer starts when a sufficient amount of datas is written into the FIFO #define AT91C_MCI_FIFOMODE_ONEDATA (0x1) // (MCI) A write transfer starts as soon as one data is written into the FIFO #define AT91C_MCI_FERRCTRL (0x1 << 4) // (MCI) Flow Error Flag Reset Control Mode #define AT91C_MCI_FERRCTRL_RWCMD (0x0 << 4) // (MCI) When an underflow/overflow condition flag is set, a new Write/Read command is needed to reset the flag #define AT91C_MCI_FERRCTRL_READSR (0x1 << 4) // (MCI) When an underflow/overflow condition flag is set, a read status resets the flag #define AT91C_MCI_HSMODE (0x1 << 8) // (MCI) High Speed Mode #define AT91C_MCI_HSMODE_DISABLE (0x0 << 8) // (MCI) Default Bus Timing Mode #define AT91C_MCI_HSMODE_ENABLE (0x1 << 8) // (MCI) High Speed Mode #define AT91C_MCI_LSYNC (0x1 << 12) // (MCI) Synchronize on last block #define AT91C_MCI_LSYNC_CURRENT (0x0 << 12) // (MCI) Pending command sent at end of current data block #define AT91C_MCI_LSYNC_INFINITE (0x1 << 12) // (MCI) Pending command sent at end of block transfer when transfer length is not infinite // -------- MCI_WPCR : (MCI Offset: 0xe4) Write Protection Control Register -------- #define AT91C_MCI_WP_EN (0x1 << 0) // (MCI) Write Protection Enable #define AT91C_MCI_WP_EN_DISABLE (0x0) // (MCI) Write Operation is disabled (if WP_KEY corresponds) #define AT91C_MCI_WP_EN_ENABLE (0x1) // (MCI) Write Operation is enabled (if WP_KEY corresponds) #define AT91C_MCI_WP_KEY (0xFFFFFF << 8) // (MCI) Write Protection Key // -------- MCI_WPSR : (MCI Offset: 0xe8) Write Protection Status Register -------- #define AT91C_MCI_WP_VS (0xF << 0) // (MCI) Write Protection Violation Status #define AT91C_MCI_WP_VS_NO_VIOLATION (0x0) // (MCI) No Write Protection Violation detected since last read #define AT91C_MCI_WP_VS_ON_WRITE (0x1) // (MCI) Write Protection Violation detected since last read #define AT91C_MCI_WP_VS_ON_RESET (0x2) // (MCI) Software Reset Violation detected since last read #define AT91C_MCI_WP_VS_ON_BOTH (0x3) // (MCI) Write Protection and Software Reset Violation detected since last read #define AT91C_MCI_WP_VSRC (0xF << 8) // (MCI) Write Protection Violation Source #define AT91C_MCI_WP_VSRC_NO_VIOLATION (0x0 << 8) // (MCI) No Write Protection Violation detected since last read #define AT91C_MCI_WP_VSRC_MCI_MR (0x1 << 8) // (MCI) Write Protection Violation detected on MCI_MR since last read #define AT91C_MCI_WP_VSRC_MCI_DTOR (0x2 << 8) // (MCI) Write Protection Violation detected on MCI_DTOR since last read #define AT91C_MCI_WP_VSRC_MCI_SDCR (0x3 << 8) // (MCI) Write Protection Violation detected on MCI_SDCR since last read #define AT91C_MCI_WP_VSRC_MCI_CSTOR (0x4 << 8) // (MCI) Write Protection Violation detected on MCI_CSTOR since last read #define AT91C_MCI_WP_VSRC_MCI_DMA (0x5 << 8) // (MCI) Write Protection Violation detected on MCI_DMA since last read #define AT91C_MCI_WP_VSRC_MCI_CFG (0x6 << 8) // (MCI) Write Protection Violation detected on MCI_CFG since last read #define AT91C_MCI_WP_VSRC_MCI_DEL (0x7 << 8) // (MCI) Write Protection Violation detected on MCI_DEL since last read // -------- MCI_VER : (MCI Offset: 0xfc) VERSION Register -------- #define AT91C_MCI_VER (0xF << 0) // (MCI) VERSION Register // ***************************************************************************** // SOFTWARE API DEFINITION FOR Two-wire Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_TWI { AT91_REG TWI_CR; // Control Register AT91_REG TWI_MMR; // Master Mode Register AT91_REG TWI_SMR; // Slave Mode Register AT91_REG TWI_IADR; // Internal Address Register AT91_REG TWI_CWGR; // Clock Waveform Generator Register AT91_REG Reserved0[3]; // AT91_REG TWI_SR; // Status Register AT91_REG TWI_IER; // Interrupt Enable Register AT91_REG TWI_IDR; // Interrupt Disable Register AT91_REG TWI_IMR; // Interrupt Mask Register AT91_REG TWI_RHR; // Receive Holding Register AT91_REG TWI_THR; // Transmit Holding Register AT91_REG Reserved1[45]; // AT91_REG TWI_ADDRSIZE; // TWI ADDRSIZE REGISTER AT91_REG TWI_IPNAME1; // TWI IPNAME1 REGISTER AT91_REG TWI_IPNAME2; // TWI IPNAME2 REGISTER AT91_REG TWI_FEATURES; // TWI FEATURES REGISTER AT91_REG TWI_VER; // Version Register AT91_REG TWI_RPR; // Receive Pointer Register AT91_REG TWI_RCR; // Receive Counter Register AT91_REG TWI_TPR; // Transmit Pointer Register AT91_REG TWI_TCR; // Transmit Counter Register AT91_REG TWI_RNPR; // Receive Next Pointer Register AT91_REG TWI_RNCR; // Receive Next Counter Register AT91_REG TWI_TNPR; // Transmit Next Pointer Register AT91_REG TWI_TNCR; // Transmit Next Counter Register AT91_REG TWI_PTCR; // PDC Transfer Control Register AT91_REG TWI_PTSR; // PDC Transfer Status Register } AT91S_TWI, *AT91PS_TWI; #else #define TWI_CR (AT91_CAST(AT91_REG *) 0x00000000) // (TWI_CR) Control Register #define TWI_MMR (AT91_CAST(AT91_REG *) 0x00000004) // (TWI_MMR) Master Mode Register #define TWI_SMR (AT91_CAST(AT91_REG *) 0x00000008) // (TWI_SMR) Slave Mode Register #define TWI_IADR (AT91_CAST(AT91_REG *) 0x0000000C) // (TWI_IADR) Internal Address Register #define TWI_CWGR (AT91_CAST(AT91_REG *) 0x00000010) // (TWI_CWGR) Clock Waveform Generator Register #define TWI_SR (AT91_CAST(AT91_REG *) 0x00000020) // (TWI_SR) Status Register #define TWI_IER (AT91_CAST(AT91_REG *) 0x00000024) // (TWI_IER) Interrupt Enable Register #define TWI_IDR (AT91_CAST(AT91_REG *) 0x00000028) // (TWI_IDR) Interrupt Disable Register #define TWI_IMR (AT91_CAST(AT91_REG *) 0x0000002C) // (TWI_IMR) Interrupt Mask Register #define TWI_RHR (AT91_CAST(AT91_REG *) 0x00000030) // (TWI_RHR) Receive Holding Register #define TWI_THR (AT91_CAST(AT91_REG *) 0x00000034) // (TWI_THR) Transmit Holding Register #define TWI_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (TWI_ADDRSIZE) TWI ADDRSIZE REGISTER #define TWI_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (TWI_IPNAME1) TWI IPNAME1 REGISTER #define TWI_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (TWI_IPNAME2) TWI IPNAME2 REGISTER #define TWI_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (TWI_FEATURES) TWI FEATURES REGISTER #define TWI_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (TWI_VER) Version Register #endif // -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- #define AT91C_TWI_START (0x1 << 0) // (TWI) Send a START Condition #define AT91C_TWI_STOP (0x1 << 1) // (TWI) Send a STOP Condition #define AT91C_TWI_MSEN (0x1 << 2) // (TWI) TWI Master Transfer Enabled #define AT91C_TWI_MSDIS (0x1 << 3) // (TWI) TWI Master Transfer Disabled #define AT91C_TWI_SVEN (0x1 << 4) // (TWI) TWI Slave mode Enabled #define AT91C_TWI_SVDIS (0x1 << 5) // (TWI) TWI Slave mode Disabled #define AT91C_TWI_SWRST (0x1 << 7) // (TWI) Software Reset // -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- #define AT91C_TWI_IADRSZ (0x3 << 8) // (TWI) Internal Device Address Size #define AT91C_TWI_IADRSZ_NO (0x0 << 8) // (TWI) No internal device address #define AT91C_TWI_IADRSZ_1_BYTE (0x1 << 8) // (TWI) One-byte internal device address #define AT91C_TWI_IADRSZ_2_BYTE (0x2 << 8) // (TWI) Two-byte internal device address #define AT91C_TWI_IADRSZ_3_BYTE (0x3 << 8) // (TWI) Three-byte internal device address #define AT91C_TWI_MREAD (0x1 << 12) // (TWI) Master Read Direction #define AT91C_TWI_DADR (0x7F << 16) // (TWI) Device Address // -------- TWI_SMR : (TWI Offset: 0x8) TWI Slave Mode Register -------- #define AT91C_TWI_SADR (0x7F << 16) // (TWI) Slave Address // -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- #define AT91C_TWI_CLDIV (0xFF << 0) // (TWI) Clock Low Divider #define AT91C_TWI_CHDIV (0xFF << 8) // (TWI) Clock High Divider #define AT91C_TWI_CKDIV (0x7 << 16) // (TWI) Clock Divider // -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- #define AT91C_TWI_TXCOMP_SLAVE (0x1 << 0) // (TWI) Transmission Completed #define AT91C_TWI_TXCOMP_MASTER (0x1 << 0) // (TWI) Transmission Completed #define AT91C_TWI_RXRDY (0x1 << 1) // (TWI) Receive holding register ReaDY #define AT91C_TWI_TXRDY_MASTER (0x1 << 2) // (TWI) Transmit holding register ReaDY #define AT91C_TWI_TXRDY_SLAVE (0x1 << 2) // (TWI) Transmit holding register ReaDY #define AT91C_TWI_SVREAD (0x1 << 3) // (TWI) Slave READ (used only in Slave mode) #define AT91C_TWI_SVACC (0x1 << 4) // (TWI) Slave ACCess (used only in Slave mode) #define AT91C_TWI_GACC (0x1 << 5) // (TWI) General Call ACcess (used only in Slave mode) #define AT91C_TWI_OVRE (0x1 << 6) // (TWI) Overrun Error (used only in Master and Multi-master mode) #define AT91C_TWI_NACK_SLAVE (0x1 << 8) // (TWI) Not Acknowledged #define AT91C_TWI_NACK_MASTER (0x1 << 8) // (TWI) Not Acknowledged #define AT91C_TWI_ARBLST_MULTI_MASTER (0x1 << 9) // (TWI) Arbitration Lost (used only in Multimaster mode) #define AT91C_TWI_SCLWS (0x1 << 10) // (TWI) Clock Wait State (used only in Slave mode) #define AT91C_TWI_EOSACC (0x1 << 11) // (TWI) End Of Slave ACCess (used only in Slave mode) #define AT91C_TWI_ENDRX (0x1 << 12) // (TWI) End of Receiver Transfer #define AT91C_TWI_ENDTX (0x1 << 13) // (TWI) End of Receiver Transfer #define AT91C_TWI_RXBUFF (0x1 << 14) // (TWI) RXBUFF Interrupt #define AT91C_TWI_TXBUFE (0x1 << 15) // (TWI) TXBUFE Interrupt // -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- // -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- // -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- // ***************************************************************************** // SOFTWARE API DEFINITION FOR Usart // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_USART { AT91_REG US_CR; // Control Register AT91_REG US_MR; // Mode Register AT91_REG US_IER; // Interrupt Enable Register AT91_REG US_IDR; // Interrupt Disable Register AT91_REG US_IMR; // Interrupt Mask Register AT91_REG US_CSR; // Channel Status Register AT91_REG US_RHR; // Receiver Holding Register AT91_REG US_THR; // Transmitter Holding Register AT91_REG US_BRGR; // Baud Rate Generator Register AT91_REG US_RTOR; // Receiver Time-out Register AT91_REG US_TTGR; // Transmitter Time-guard Register AT91_REG Reserved0[5]; // AT91_REG US_FIDI; // FI_DI_Ratio Register AT91_REG US_NER; // Nb Errors Register AT91_REG Reserved1[1]; // AT91_REG US_IF; // IRDA_FILTER Register AT91_REG US_MAN; // Manchester Encoder Decoder Register AT91_REG Reserved2[38]; // AT91_REG US_ADDRSIZE; // US ADDRSIZE REGISTER AT91_REG US_IPNAME1; // US IPNAME1 REGISTER AT91_REG US_IPNAME2; // US IPNAME2 REGISTER AT91_REG US_FEATURES; // US FEATURES REGISTER AT91_REG US_VER; // VERSION Register AT91_REG US_RPR; // Receive Pointer Register AT91_REG US_RCR; // Receive Counter Register AT91_REG US_TPR; // Transmit Pointer Register AT91_REG US_TCR; // Transmit Counter Register AT91_REG US_RNPR; // Receive Next Pointer Register AT91_REG US_RNCR; // Receive Next Counter Register AT91_REG US_TNPR; // Transmit Next Pointer Register AT91_REG US_TNCR; // Transmit Next Counter Register AT91_REG US_PTCR; // PDC Transfer Control Register AT91_REG US_PTSR; // PDC Transfer Status Register } AT91S_USART, *AT91PS_USART; #else #define US_CR (AT91_CAST(AT91_REG *) 0x00000000) // (US_CR) Control Register #define US_MR (AT91_CAST(AT91_REG *) 0x00000004) // (US_MR) Mode Register #define US_IER (AT91_CAST(AT91_REG *) 0x00000008) // (US_IER) Interrupt Enable Register #define US_IDR (AT91_CAST(AT91_REG *) 0x0000000C) // (US_IDR) Interrupt Disable Register #define US_IMR (AT91_CAST(AT91_REG *) 0x00000010) // (US_IMR) Interrupt Mask Register #define US_CSR (AT91_CAST(AT91_REG *) 0x00000014) // (US_CSR) Channel Status Register #define US_RHR (AT91_CAST(AT91_REG *) 0x00000018) // (US_RHR) Receiver Holding Register #define US_THR (AT91_CAST(AT91_REG *) 0x0000001C) // (US_THR) Transmitter Holding Register #define US_BRGR (AT91_CAST(AT91_REG *) 0x00000020) // (US_BRGR) Baud Rate Generator Register #define US_RTOR (AT91_CAST(AT91_REG *) 0x00000024) // (US_RTOR) Receiver Time-out Register #define US_TTGR (AT91_CAST(AT91_REG *) 0x00000028) // (US_TTGR) Transmitter Time-guard Register #define US_FIDI (AT91_CAST(AT91_REG *) 0x00000040) // (US_FIDI) FI_DI_Ratio Register #define US_NER (AT91_CAST(AT91_REG *) 0x00000044) // (US_NER) Nb Errors Register #define US_IF (AT91_CAST(AT91_REG *) 0x0000004C) // (US_IF) IRDA_FILTER Register #define US_MAN (AT91_CAST(AT91_REG *) 0x00000050) // (US_MAN) Manchester Encoder Decoder Register #define US_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (US_ADDRSIZE) US ADDRSIZE REGISTER #define US_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (US_IPNAME1) US IPNAME1 REGISTER #define US_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (US_IPNAME2) US IPNAME2 REGISTER #define US_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (US_FEATURES) US FEATURES REGISTER #define US_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (US_VER) VERSION Register #endif // -------- US_CR : (USART Offset: 0x0) Control Register -------- #define AT91C_US_RSTRX (0x1 << 2) // (USART) Reset Receiver #define AT91C_US_RSTTX (0x1 << 3) // (USART) Reset Transmitter #define AT91C_US_RXEN (0x1 << 4) // (USART) Receiver Enable #define AT91C_US_RXDIS (0x1 << 5) // (USART) Receiver Disable #define AT91C_US_TXEN (0x1 << 6) // (USART) Transmitter Enable #define AT91C_US_TXDIS (0x1 << 7) // (USART) Transmitter Disable #define AT91C_US_RSTSTA (0x1 << 8) // (USART) Reset Status Bits #define AT91C_US_STTBRK (0x1 << 9) // (USART) Start Break #define AT91C_US_STPBRK (0x1 << 10) // (USART) Stop Break #define AT91C_US_STTTO (0x1 << 11) // (USART) Start Time-out #define AT91C_US_SENDA (0x1 << 12) // (USART) Send Address #define AT91C_US_RSTIT (0x1 << 13) // (USART) Reset Iterations #define AT91C_US_RSTNACK (0x1 << 14) // (USART) Reset Non Acknowledge #define AT91C_US_RETTO (0x1 << 15) // (USART) Rearm Time-out #define AT91C_US_DTREN (0x1 << 16) // (USART) Data Terminal ready Enable #define AT91C_US_DTRDIS (0x1 << 17) // (USART) Data Terminal ready Disable #define AT91C_US_RTSEN (0x1 << 18) // (USART) Request to Send enable #define AT91C_US_RTSDIS (0x1 << 19) // (USART) Request to Send Disable // -------- US_MR : (USART Offset: 0x4) Mode Register -------- #define AT91C_US_USMODE (0xF << 0) // (USART) Usart mode #define AT91C_US_USMODE_NORMAL (0x0) // (USART) Normal #define AT91C_US_USMODE_RS485 (0x1) // (USART) RS485 #define AT91C_US_USMODE_HWHSH (0x2) // (USART) Hardware Handshaking #define AT91C_US_USMODE_MODEM (0x3) // (USART) Modem #define AT91C_US_USMODE_ISO7816_0 (0x4) // (USART) ISO7816 protocol: T = 0 #define AT91C_US_USMODE_ISO7816_1 (0x6) // (USART) ISO7816 protocol: T = 1 #define AT91C_US_USMODE_IRDA (0x8) // (USART) IrDA #define AT91C_US_USMODE_SWHSH (0xC) // (USART) Software Handshaking #define AT91C_US_CLKS (0x3 << 4) // (USART) Clock Selection (Baud Rate generator Input Clock #define AT91C_US_CLKS_CLOCK (0x0 << 4) // (USART) Clock #define AT91C_US_CLKS_FDIV1 (0x1 << 4) // (USART) fdiv1 #define AT91C_US_CLKS_SLOW (0x2 << 4) // (USART) slow_clock (ARM) #define AT91C_US_CLKS_EXT (0x3 << 4) // (USART) External (SCK) #define AT91C_US_CHRL (0x3 << 6) // (USART) Clock Selection (Baud Rate generator Input Clock #define AT91C_US_CHRL_5_BITS (0x0 << 6) // (USART) Character Length: 5 bits #define AT91C_US_CHRL_6_BITS (0x1 << 6) // (USART) Character Length: 6 bits #define AT91C_US_CHRL_7_BITS (0x2 << 6) // (USART) Character Length: 7 bits #define AT91C_US_CHRL_8_BITS (0x3 << 6) // (USART) Character Length: 8 bits #define AT91C_US_SYNC (0x1 << 8) // (USART) Synchronous Mode Select #define AT91C_US_PAR (0x7 << 9) // (USART) Parity type #define AT91C_US_PAR_EVEN (0x0 << 9) // (USART) Even Parity #define AT91C_US_PAR_ODD (0x1 << 9) // (USART) Odd Parity #define AT91C_US_PAR_SPACE (0x2 << 9) // (USART) Parity forced to 0 (Space) #define AT91C_US_PAR_MARK (0x3 << 9) // (USART) Parity forced to 1 (Mark) #define AT91C_US_PAR_NONE (0x4 << 9) // (USART) No Parity #define AT91C_US_PAR_MULTI_DROP (0x6 << 9) // (USART) Multi-drop mode #define AT91C_US_NBSTOP (0x3 << 12) // (USART) Number of Stop bits #define AT91C_US_NBSTOP_1_BIT (0x0 << 12) // (USART) 1 stop bit #define AT91C_US_NBSTOP_15_BIT (0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits #define AT91C_US_NBSTOP_2_BIT (0x2 << 12) // (USART) 2 stop bits #define AT91C_US_CHMODE (0x3 << 14) // (USART) Channel Mode #define AT91C_US_CHMODE_NORMAL (0x0 << 14) // (USART) Normal Mode: The USART channel operates as an RX/TX USART. #define AT91C_US_CHMODE_AUTO (0x1 << 14) // (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin. #define AT91C_US_CHMODE_LOCAL (0x2 << 14) // (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal. #define AT91C_US_CHMODE_REMOTE (0x3 << 14) // (USART) Remote Loopback: RXD pin is internally connected to TXD pin. #define AT91C_US_MSBF (0x1 << 16) // (USART) Bit Order #define AT91C_US_MODE9 (0x1 << 17) // (USART) 9-bit Character length #define AT91C_US_CKLO (0x1 << 18) // (USART) Clock Output Select #define AT91C_US_OVER (0x1 << 19) // (USART) Over Sampling Mode #define AT91C_US_INACK (0x1 << 20) // (USART) Inhibit Non Acknowledge #define AT91C_US_DSNACK (0x1 << 21) // (USART) Disable Successive NACK #define AT91C_US_VAR_SYNC (0x1 << 22) // (USART) Variable synchronization of command/data sync Start Frame Delimiter #define AT91C_US_MAX_ITER (0x1 << 24) // (USART) Number of Repetitions #define AT91C_US_FILTER (0x1 << 28) // (USART) Receive Line Filter #define AT91C_US_MANMODE (0x1 << 29) // (USART) Manchester Encoder/Decoder Enable #define AT91C_US_MODSYNC (0x1 << 30) // (USART) Manchester Synchronization mode #define AT91C_US_ONEBIT (0x1 << 31) // (USART) Start Frame Delimiter selector // -------- US_IER : (USART Offset: 0x8) Interrupt Enable Register -------- #define AT91C_US_RXRDY (0x1 << 0) // (USART) RXRDY Interrupt #define AT91C_US_TXRDY (0x1 << 1) // (USART) TXRDY Interrupt #define AT91C_US_RXBRK (0x1 << 2) // (USART) Break Received/End of Break #define AT91C_US_ENDRX (0x1 << 3) // (USART) End of Receive Transfer Interrupt #define AT91C_US_ENDTX (0x1 << 4) // (USART) End of Transmit Interrupt #define AT91C_US_OVRE (0x1 << 5) // (USART) Overrun Interrupt #define AT91C_US_FRAME (0x1 << 6) // (USART) Framing Error Interrupt #define AT91C_US_PARE (0x1 << 7) // (USART) Parity Error Interrupt #define AT91C_US_TIMEOUT (0x1 << 8) // (USART) Receiver Time-out #define AT91C_US_TXEMPTY (0x1 << 9) // (USART) TXEMPTY Interrupt #define AT91C_US_ITERATION (0x1 << 10) // (USART) Max number of Repetitions Reached #define AT91C_US_TXBUFE (0x1 << 11) // (USART) TXBUFE Interrupt #define AT91C_US_RXBUFF (0x1 << 12) // (USART) RXBUFF Interrupt #define AT91C_US_NACK (0x1 << 13) // (USART) Non Acknowledge #define AT91C_US_RIIC (0x1 << 16) // (USART) Ring INdicator Input Change Flag #define AT91C_US_DSRIC (0x1 << 17) // (USART) Data Set Ready Input Change Flag #define AT91C_US_DCDIC (0x1 << 18) // (USART) Data Carrier Flag #define AT91C_US_CTSIC (0x1 << 19) // (USART) Clear To Send Input Change Flag #define AT91C_US_MANE (0x1 << 20) // (USART) Manchester Error Interrupt // -------- US_IDR : (USART Offset: 0xc) Interrupt Disable Register -------- // -------- US_IMR : (USART Offset: 0x10) Interrupt Mask Register -------- // -------- US_CSR : (USART Offset: 0x14) Channel Status Register -------- #define AT91C_US_RI (0x1 << 20) // (USART) Image of RI Input #define AT91C_US_DSR (0x1 << 21) // (USART) Image of DSR Input #define AT91C_US_DCD (0x1 << 22) // (USART) Image of DCD Input #define AT91C_US_CTS (0x1 << 23) // (USART) Image of CTS Input #define AT91C_US_MANERR (0x1 << 24) // (USART) Manchester Error // -------- US_MAN : (USART Offset: 0x50) Manchester Encoder Decoder Register -------- #define AT91C_US_TX_PL (0xF << 0) // (USART) Transmitter Preamble Length #define AT91C_US_TX_PP (0x3 << 8) // (USART) Transmitter Preamble Pattern #define AT91C_US_TX_PP_ALL_ONE (0x0 << 8) // (USART) ALL_ONE #define AT91C_US_TX_PP_ALL_ZERO (0x1 << 8) // (USART) ALL_ZERO #define AT91C_US_TX_PP_ZERO_ONE (0x2 << 8) // (USART) ZERO_ONE #define AT91C_US_TX_PP_ONE_ZERO (0x3 << 8) // (USART) ONE_ZERO #define AT91C_US_TX_MPOL (0x1 << 12) // (USART) Transmitter Manchester Polarity #define AT91C_US_RX_PL (0xF << 16) // (USART) Receiver Preamble Length #define AT91C_US_RX_PP (0x3 << 24) // (USART) Receiver Preamble Pattern detected #define AT91C_US_RX_PP_ALL_ONE (0x0 << 24) // (USART) ALL_ONE #define AT91C_US_RX_PP_ALL_ZERO (0x1 << 24) // (USART) ALL_ZERO #define AT91C_US_RX_PP_ZERO_ONE (0x2 << 24) // (USART) ZERO_ONE #define AT91C_US_RX_PP_ONE_ZERO (0x3 << 24) // (USART) ONE_ZERO #define AT91C_US_RX_MPOL (0x1 << 28) // (USART) Receiver Manchester Polarity #define AT91C_US_DRIFT (0x1 << 30) // (USART) Drift compensation // ***************************************************************************** // SOFTWARE API DEFINITION FOR Synchronous Serial Controller Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_SSC { AT91_REG SSC_CR; // Control Register AT91_REG SSC_CMR; // Clock Mode Register AT91_REG Reserved0[2]; // AT91_REG SSC_RCMR; // Receive Clock ModeRegister AT91_REG SSC_RFMR; // Receive Frame Mode Register AT91_REG SSC_TCMR; // Transmit Clock Mode Register AT91_REG SSC_TFMR; // Transmit Frame Mode Register AT91_REG SSC_RHR; // Receive Holding Register AT91_REG SSC_THR; // Transmit Holding Register AT91_REG Reserved1[2]; // AT91_REG SSC_RSHR; // Receive Sync Holding Register AT91_REG SSC_TSHR; // Transmit Sync Holding Register AT91_REG SSC_RC0R; // Receive Compare 0 Register AT91_REG SSC_RC1R; // Receive Compare 1 Register AT91_REG SSC_SR; // Status Register AT91_REG SSC_IER; // Interrupt Enable Register AT91_REG SSC_IDR; // Interrupt Disable Register AT91_REG SSC_IMR; // Interrupt Mask Register } AT91S_SSC, *AT91PS_SSC; #else #define SSC_CR (AT91_CAST(AT91_REG *) 0x00000000) // (SSC_CR) Control Register #define SSC_CMR (AT91_CAST(AT91_REG *) 0x00000004) // (SSC_CMR) Clock Mode Register #define SSC_RCMR (AT91_CAST(AT91_REG *) 0x00000010) // (SSC_RCMR) Receive Clock ModeRegister #define SSC_RFMR (AT91_CAST(AT91_REG *) 0x00000014) // (SSC_RFMR) Receive Frame Mode Register #define SSC_TCMR (AT91_CAST(AT91_REG *) 0x00000018) // (SSC_TCMR) Transmit Clock Mode Register #define SSC_TFMR (AT91_CAST(AT91_REG *) 0x0000001C) // (SSC_TFMR) Transmit Frame Mode Register #define SSC_RHR (AT91_CAST(AT91_REG *) 0x00000020) // (SSC_RHR) Receive Holding Register #define SSC_THR (AT91_CAST(AT91_REG *) 0x00000024) // (SSC_THR) Transmit Holding Register #define SSC_RSHR (AT91_CAST(AT91_REG *) 0x00000030) // (SSC_RSHR) Receive Sync Holding Register #define SSC_TSHR (AT91_CAST(AT91_REG *) 0x00000034) // (SSC_TSHR) Transmit Sync Holding Register #define SSC_RC0R (AT91_CAST(AT91_REG *) 0x00000038) // (SSC_RC0R) Receive Compare 0 Register #define SSC_RC1R (AT91_CAST(AT91_REG *) 0x0000003C) // (SSC_RC1R) Receive Compare 1 Register #define SSC_SR (AT91_CAST(AT91_REG *) 0x00000040) // (SSC_SR) Status Register #define SSC_IER (AT91_CAST(AT91_REG *) 0x00000044) // (SSC_IER) Interrupt Enable Register #define SSC_IDR (AT91_CAST(AT91_REG *) 0x00000048) // (SSC_IDR) Interrupt Disable Register #define SSC_IMR (AT91_CAST(AT91_REG *) 0x0000004C) // (SSC_IMR) Interrupt Mask Register #endif // -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- #define AT91C_SSC_RXEN (0x1 << 0) // (SSC) Receive Enable #define AT91C_SSC_RXDIS (0x1 << 1) // (SSC) Receive Disable #define AT91C_SSC_TXEN (0x1 << 8) // (SSC) Transmit Enable #define AT91C_SSC_TXDIS (0x1 << 9) // (SSC) Transmit Disable #define AT91C_SSC_SWRST (0x1 << 15) // (SSC) Software Reset // -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- #define AT91C_SSC_CKS (0x3 << 0) // (SSC) Receive/Transmit Clock Selection #define AT91C_SSC_CKS_DIV (0x0) // (SSC) Divided Clock #define AT91C_SSC_CKS_TK (0x1) // (SSC) TK Clock signal #define AT91C_SSC_CKS_RK (0x2) // (SSC) RK pin #define AT91C_SSC_CKO (0x7 << 2) // (SSC) Receive/Transmit Clock Output Mode Selection #define AT91C_SSC_CKO_NONE (0x0 << 2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only #define AT91C_SSC_CKO_CONTINOUS (0x1 << 2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output #define AT91C_SSC_CKO_DATA_TX (0x2 << 2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output #define AT91C_SSC_CKI (0x1 << 5) // (SSC) Receive/Transmit Clock Inversion #define AT91C_SSC_CKG (0x3 << 6) // (SSC) Receive/Transmit Clock Gating Selection #define AT91C_SSC_CKG_NONE (0x0 << 6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock #define AT91C_SSC_CKG_LOW (0x1 << 6) // (SSC) Receive/Transmit Clock enabled only if RF Low #define AT91C_SSC_CKG_HIGH (0x2 << 6) // (SSC) Receive/Transmit Clock enabled only if RF High #define AT91C_SSC_START (0xF << 8) // (SSC) Receive/Transmit Start Selection #define AT91C_SSC_START_CONTINOUS (0x0 << 8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data. #define AT91C_SSC_START_TX (0x1 << 8) // (SSC) Transmit/Receive start #define AT91C_SSC_START_LOW_RF (0x2 << 8) // (SSC) Detection of a low level on RF input #define AT91C_SSC_START_HIGH_RF (0x3 << 8) // (SSC) Detection of a high level on RF input #define AT91C_SSC_START_FALL_RF (0x4 << 8) // (SSC) Detection of a falling edge on RF input #define AT91C_SSC_START_RISE_RF (0x5 << 8) // (SSC) Detection of a rising edge on RF input #define AT91C_SSC_START_LEVEL_RF (0x6 << 8) // (SSC) Detection of any level change on RF input #define AT91C_SSC_START_EDGE_RF (0x7 << 8) // (SSC) Detection of any edge on RF input #define AT91C_SSC_START_0 (0x8 << 8) // (SSC) Compare 0 #define AT91C_SSC_STOP (0x1 << 12) // (SSC) Receive Stop Selection #define AT91C_SSC_STTOUT (0x1 << 15) // (SSC) Receive/Transmit Start Output Selection #define AT91C_SSC_STTDLY (0xFF << 16) // (SSC) Receive/Transmit Start Delay #define AT91C_SSC_PERIOD (0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection // -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- #define AT91C_SSC_DATLEN (0x1F << 0) // (SSC) Data Length #define AT91C_SSC_LOOP (0x1 << 5) // (SSC) Loop Mode #define AT91C_SSC_MSBF (0x1 << 7) // (SSC) Most Significant Bit First #define AT91C_SSC_DATNB (0xF << 8) // (SSC) Data Number per Frame #define AT91C_SSC_FSLEN (0xF << 16) // (SSC) Receive/Transmit Frame Sync length #define AT91C_SSC_FSOS (0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection #define AT91C_SSC_FSOS_NONE (0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only #define AT91C_SSC_FSOS_NEGATIVE (0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse #define AT91C_SSC_FSOS_POSITIVE (0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse #define AT91C_SSC_FSOS_LOW (0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer #define AT91C_SSC_FSOS_HIGH (0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer #define AT91C_SSC_FSOS_TOGGLE (0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer #define AT91C_SSC_FSEDGE (0x1 << 24) // (SSC) Frame Sync Edge Detection // -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- // -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- #define AT91C_SSC_DATDEF (0x1 << 5) // (SSC) Data Default Value #define AT91C_SSC_FSDEN (0x1 << 23) // (SSC) Frame Sync Data Enable // -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- #define AT91C_SSC_TXRDY (0x1 << 0) // (SSC) Transmit Ready #define AT91C_SSC_TXEMPTY (0x1 << 1) // (SSC) Transmit Empty #define AT91C_SSC_ENDTX (0x1 << 2) // (SSC) End Of Transmission #define AT91C_SSC_TXBUFE (0x1 << 3) // (SSC) Transmit Buffer Empty #define AT91C_SSC_RXRDY (0x1 << 4) // (SSC) Receive Ready #define AT91C_SSC_OVRUN (0x1 << 5) // (SSC) Receive Overrun #define AT91C_SSC_ENDRX (0x1 << 6) // (SSC) End of Reception #define AT91C_SSC_RXBUFF (0x1 << 7) // (SSC) Receive Buffer Full #define AT91C_SSC_CP0 (0x1 << 8) // (SSC) Compare 0 #define AT91C_SSC_CP1 (0x1 << 9) // (SSC) Compare 1 #define AT91C_SSC_TXSYN (0x1 << 10) // (SSC) Transmit Sync #define AT91C_SSC_RXSYN (0x1 << 11) // (SSC) Receive Sync #define AT91C_SSC_TXENA (0x1 << 16) // (SSC) Transmit Enable #define AT91C_SSC_RXENA (0x1 << 17) // (SSC) Receive Enable // -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- // -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- // -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- // ***************************************************************************** // SOFTWARE API DEFINITION FOR PWMC Channel Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_PWMC_CH { AT91_REG PWMC_CMR; // Channel Mode Register AT91_REG PWMC_CDTYR; // Channel Duty Cycle Register AT91_REG PWMC_CDTYUPDR; // Channel Duty Cycle Update Register AT91_REG PWMC_CPRDR; // Channel Period Register AT91_REG PWMC_CPRDUPDR; // Channel Period Update Register AT91_REG PWMC_CCNTR; // Channel Counter Register AT91_REG PWMC_DTR; // Channel Dead Time Value Register AT91_REG PWMC_DTUPDR; // Channel Dead Time Update Value Register } AT91S_PWMC_CH, *AT91PS_PWMC_CH; #else #define PWMC_CMR (AT91_CAST(AT91_REG *) 0x00000000) // (PWMC_CMR) Channel Mode Register #define PWMC_CDTYR (AT91_CAST(AT91_REG *) 0x00000004) // (PWMC_CDTYR) Channel Duty Cycle Register #define PWMC_CDTYUPDR (AT91_CAST(AT91_REG *) 0x00000008) // (PWMC_CDTYUPDR) Channel Duty Cycle Update Register #define PWMC_CPRDR (AT91_CAST(AT91_REG *) 0x0000000C) // (PWMC_CPRDR) Channel Period Register #define PWMC_CPRDUPDR (AT91_CAST(AT91_REG *) 0x00000010) // (PWMC_CPRDUPDR) Channel Period Update Register #define PWMC_CCNTR (AT91_CAST(AT91_REG *) 0x00000014) // (PWMC_CCNTR) Channel Counter Register #define PWMC_DTR (AT91_CAST(AT91_REG *) 0x00000018) // (PWMC_DTR) Channel Dead Time Value Register #define PWMC_DTUPDR (AT91_CAST(AT91_REG *) 0x0000001C) // (PWMC_DTUPDR) Channel Dead Time Update Value Register #endif // -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- #define AT91C_PWMC_CPRE (0xF << 0) // (PWMC_CH) Channel Pre-scaler : PWMC_CLKx #define AT91C_PWMC_CPRE_MCK (0x0) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_2 (0x1) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_4 (0x2) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_8 (0x3) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_16 (0x4) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_32 (0x5) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_64 (0x6) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_128 (0x7) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_256 (0x8) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_512 (0x9) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCK_DIV_1024 (0xA) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCKA (0xB) // (PWMC_CH) #define AT91C_PWMC_CPRE_MCKB (0xC) // (PWMC_CH) #define AT91C_PWMC_CALG (0x1 << 8) // (PWMC_CH) Channel Alignment #define AT91C_PWMC_CPOL (0x1 << 9) // (PWMC_CH) Channel Polarity #define AT91C_PWMC_CES (0x1 << 10) // (PWMC_CH) Counter Event Selection #define AT91C_PWMC_DTE (0x1 << 16) // (PWMC_CH) Dead Time Genrator Enable #define AT91C_PWMC_DTHI (0x1 << 17) // (PWMC_CH) Dead Time PWMHx Output Inverted #define AT91C_PWMC_DTLI (0x1 << 18) // (PWMC_CH) Dead Time PWMLx Output Inverted // -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- #define AT91C_PWMC_CDTY (0xFFFFFF << 0) // (PWMC_CH) Channel Duty Cycle // -------- PWMC_CDTYUPDR : (PWMC_CH Offset: 0x8) PWMC Channel Duty Cycle Update Register -------- #define AT91C_PWMC_CDTYUPD (0xFFFFFF << 0) // (PWMC_CH) Channel Duty Cycle Update // -------- PWMC_CPRDR : (PWMC_CH Offset: 0xc) PWMC Channel Period Register -------- #define AT91C_PWMC_CPRD (0xFFFFFF << 0) // (PWMC_CH) Channel Period // -------- PWMC_CPRDUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Period Update Register -------- #define AT91C_PWMC_CPRDUPD (0xFFFFFF << 0) // (PWMC_CH) Channel Period Update // -------- PWMC_CCNTR : (PWMC_CH Offset: 0x14) PWMC Channel Counter Register -------- #define AT91C_PWMC_CCNT (0xFFFFFF << 0) // (PWMC_CH) Channel Counter // -------- PWMC_DTR : (PWMC_CH Offset: 0x18) Channel Dead Time Value Register -------- #define AT91C_PWMC_DTL (0xFFFF << 0) // (PWMC_CH) Channel Dead Time for PWML #define AT91C_PWMC_DTH (0xFFFF << 16) // (PWMC_CH) Channel Dead Time for PWMH // -------- PWMC_DTUPDR : (PWMC_CH Offset: 0x1c) Channel Dead Time Value Register -------- #define AT91C_PWMC_DTLUPD (0xFFFF << 0) // (PWMC_CH) Channel Dead Time Update for PWML. #define AT91C_PWMC_DTHUPD (0xFFFF << 16) // (PWMC_CH) Channel Dead Time Update for PWMH. // ***************************************************************************** // SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_PWMC { AT91_REG PWMC_MR; // PWMC Mode Register AT91_REG PWMC_ENA; // PWMC Enable Register AT91_REG PWMC_DIS; // PWMC Disable Register AT91_REG PWMC_SR; // PWMC Status Register AT91_REG PWMC_IER1; // PWMC Interrupt Enable Register 1 AT91_REG PWMC_IDR1; // PWMC Interrupt Disable Register 1 AT91_REG PWMC_IMR1; // PWMC Interrupt Mask Register 1 AT91_REG PWMC_ISR1; // PWMC Interrupt Status Register 1 AT91_REG PWMC_SYNC; // PWM Synchronized Channels Register AT91_REG Reserved0[1]; // AT91_REG PWMC_UPCR; // PWM Update Control Register AT91_REG PWMC_SCUP; // PWM Update Period Register AT91_REG PWMC_SCUPUPD; // PWM Update Period Update Register AT91_REG PWMC_IER2; // PWMC Interrupt Enable Register 2 AT91_REG PWMC_IDR2; // PWMC Interrupt Disable Register 2 AT91_REG PWMC_IMR2; // PWMC Interrupt Mask Register 2 AT91_REG PWMC_ISR2; // PWMC Interrupt Status Register 2 AT91_REG PWMC_OOV; // PWM Output Override Value Register AT91_REG PWMC_OS; // PWM Output Selection Register AT91_REG PWMC_OSS; // PWM Output Selection Set Register AT91_REG PWMC_OSC; // PWM Output Selection Clear Register AT91_REG PWMC_OSSUPD; // PWM Output Selection Set Update Register AT91_REG PWMC_OSCUPD; // PWM Output Selection Clear Update Register AT91_REG PWMC_FMR; // PWM Fault Mode Register AT91_REG PWMC_FSR; // PWM Fault Mode Status Register AT91_REG PWMC_FCR; // PWM Fault Mode Clear Register AT91_REG PWMC_FPV; // PWM Fault Protection Value Register AT91_REG PWMC_FPER1; // PWM Fault Protection Enable Register 1 AT91_REG PWMC_FPER2; // PWM Fault Protection Enable Register 2 AT91_REG PWMC_FPER3; // PWM Fault Protection Enable Register 3 AT91_REG PWMC_FPER4; // PWM Fault Protection Enable Register 4 AT91_REG PWMC_EL0MR; // PWM Event Line 0 Mode Register AT91_REG PWMC_EL1MR; // PWM Event Line 1 Mode Register AT91_REG PWMC_EL2MR; // PWM Event Line 2 Mode Register AT91_REG PWMC_EL3MR; // PWM Event Line 3 Mode Register AT91_REG PWMC_EL4MR; // PWM Event Line 4 Mode Register AT91_REG PWMC_EL5MR; // PWM Event Line 5 Mode Register AT91_REG PWMC_EL6MR; // PWM Event Line 6 Mode Register AT91_REG PWMC_EL7MR; // PWM Event Line 7 Mode Register AT91_REG Reserved1[18]; // AT91_REG PWMC_WPCR; // PWM Write Protection Enable Register AT91_REG PWMC_WPSR; // PWM Write Protection Status Register AT91_REG PWMC_ADDRSIZE; // PWMC ADDRSIZE REGISTER AT91_REG PWMC_IPNAME1; // PWMC IPNAME1 REGISTER AT91_REG PWMC_IPNAME2; // PWMC IPNAME2 REGISTER AT91_REG PWMC_FEATURES; // PWMC FEATURES REGISTER AT91_REG PWMC_VER; // PWMC Version Register AT91_REG PWMC_RPR; // Receive Pointer Register AT91_REG PWMC_RCR; // Receive Counter Register AT91_REG PWMC_TPR; // Transmit Pointer Register AT91_REG PWMC_TCR; // Transmit Counter Register AT91_REG PWMC_RNPR; // Receive Next Pointer Register AT91_REG PWMC_RNCR; // Receive Next Counter Register AT91_REG PWMC_TNPR; // Transmit Next Pointer Register AT91_REG PWMC_TNCR; // Transmit Next Counter Register AT91_REG PWMC_PTCR; // PDC Transfer Control Register AT91_REG PWMC_PTSR; // PDC Transfer Status Register AT91_REG Reserved2[2]; // AT91_REG PWMC_CMP0V; // PWM Comparison Value 0 Register AT91_REG PWMC_CMP0VUPD; // PWM Comparison Value 0 Update Register AT91_REG PWMC_CMP0M; // PWM Comparison Mode 0 Register AT91_REG PWMC_CMP0MUPD; // PWM Comparison Mode 0 Update Register AT91_REG PWMC_CMP1V; // PWM Comparison Value 1 Register AT91_REG PWMC_CMP1VUPD; // PWM Comparison Value 1 Update Register AT91_REG PWMC_CMP1M; // PWM Comparison Mode 1 Register AT91_REG PWMC_CMP1MUPD; // PWM Comparison Mode 1 Update Register AT91_REG PWMC_CMP2V; // PWM Comparison Value 2 Register AT91_REG PWMC_CMP2VUPD; // PWM Comparison Value 2 Update Register AT91_REG PWMC_CMP2M; // PWM Comparison Mode 2 Register AT91_REG PWMC_CMP2MUPD; // PWM Comparison Mode 2 Update Register AT91_REG PWMC_CMP3V; // PWM Comparison Value 3 Register AT91_REG PWMC_CMP3VUPD; // PWM Comparison Value 3 Update Register AT91_REG PWMC_CMP3M; // PWM Comparison Mode 3 Register AT91_REG PWMC_CMP3MUPD; // PWM Comparison Mode 3 Update Register AT91_REG PWMC_CMP4V; // PWM Comparison Value 4 Register AT91_REG PWMC_CMP4VUPD; // PWM Comparison Value 4 Update Register AT91_REG PWMC_CMP4M; // PWM Comparison Mode 4 Register AT91_REG PWMC_CMP4MUPD; // PWM Comparison Mode 4 Update Register AT91_REG PWMC_CMP5V; // PWM Comparison Value 5 Register AT91_REG PWMC_CMP5VUPD; // PWM Comparison Value 5 Update Register AT91_REG PWMC_CMP5M; // PWM Comparison Mode 5 Register AT91_REG PWMC_CMP5MUPD; // PWM Comparison Mode 5 Update Register AT91_REG PWMC_CMP6V; // PWM Comparison Value 6 Register AT91_REG PWMC_CMP6VUPD; // PWM Comparison Value 6 Update Register AT91_REG PWMC_CMP6M; // PWM Comparison Mode 6 Register AT91_REG PWMC_CMP6MUPD; // PWM Comparison Mode 6 Update Register AT91_REG PWMC_CMP7V; // PWM Comparison Value 7 Register AT91_REG PWMC_CMP7VUPD; // PWM Comparison Value 7 Update Register AT91_REG PWMC_CMP7M; // PWM Comparison Mode 7 Register AT91_REG PWMC_CMP7MUPD; // PWM Comparison Mode 7 Update Register AT91_REG Reserved3[20]; // AT91S_PWMC_CH PWMC_CH[8]; // PWMC Channel 0 } AT91S_PWMC, *AT91PS_PWMC; #else #define PWMC_MR (AT91_CAST(AT91_REG *) 0x00000000) // (PWMC_MR) PWMC Mode Register #define PWMC_ENA (AT91_CAST(AT91_REG *) 0x00000004) // (PWMC_ENA) PWMC Enable Register #define PWMC_DIS (AT91_CAST(AT91_REG *) 0x00000008) // (PWMC_DIS) PWMC Disable Register #define PWMC_SR (AT91_CAST(AT91_REG *) 0x0000000C) // (PWMC_SR) PWMC Status Register #define PWMC_IER1 (AT91_CAST(AT91_REG *) 0x00000010) // (PWMC_IER1) PWMC Interrupt Enable Register 1 #define PWMC_IDR1 (AT91_CAST(AT91_REG *) 0x00000014) // (PWMC_IDR1) PWMC Interrupt Disable Register 1 #define PWMC_IMR1 (AT91_CAST(AT91_REG *) 0x00000018) // (PWMC_IMR1) PWMC Interrupt Mask Register 1 #define PWMC_ISR1 (AT91_CAST(AT91_REG *) 0x0000001C) // (PWMC_ISR1) PWMC Interrupt Status Register 1 #define PWMC_SYNC (AT91_CAST(AT91_REG *) 0x00000020) // (PWMC_SYNC) PWM Synchronized Channels Register #define PWMC_UPCR (AT91_CAST(AT91_REG *) 0x00000028) // (PWMC_UPCR) PWM Update Control Register #define PWMC_SCUP (AT91_CAST(AT91_REG *) 0x0000002C) // (PWMC_SCUP) PWM Update Period Register #define PWMC_SCUPUPD (AT91_CAST(AT91_REG *) 0x00000030) // (PWMC_SCUPUPD) PWM Update Period Update Register #define PWMC_IER2 (AT91_CAST(AT91_REG *) 0x00000034) // (PWMC_IER2) PWMC Interrupt Enable Register 2 #define PWMC_IDR2 (AT91_CAST(AT91_REG *) 0x00000038) // (PWMC_IDR2) PWMC Interrupt Disable Register 2 #define PWMC_IMR2 (AT91_CAST(AT91_REG *) 0x0000003C) // (PWMC_IMR2) PWMC Interrupt Mask Register 2 #define PWMC_ISR2 (AT91_CAST(AT91_REG *) 0x00000040) // (PWMC_ISR2) PWMC Interrupt Status Register 2 #define PWMC_OOV (AT91_CAST(AT91_REG *) 0x00000044) // (PWMC_OOV) PWM Output Override Value Register #define PWMC_OS (AT91_CAST(AT91_REG *) 0x00000048) // (PWMC_OS) PWM Output Selection Register #define PWMC_OSS (AT91_CAST(AT91_REG *) 0x0000004C) // (PWMC_OSS) PWM Output Selection Set Register #define PWMC_OSC (AT91_CAST(AT91_REG *) 0x00000050) // (PWMC_OSC) PWM Output Selection Clear Register #define PWMC_OSSUPD (AT91_CAST(AT91_REG *) 0x00000054) // (PWMC_OSSUPD) PWM Output Selection Set Update Register #define PWMC_OSCUPD (AT91_CAST(AT91_REG *) 0x00000058) // (PWMC_OSCUPD) PWM Output Selection Clear Update Register #define PWMC_FMR (AT91_CAST(AT91_REG *) 0x0000005C) // (PWMC_FMR) PWM Fault Mode Register #define PWMC_FSR (AT91_CAST(AT91_REG *) 0x00000060) // (PWMC_FSR) PWM Fault Mode Status Register #define PWMC_FCR (AT91_CAST(AT91_REG *) 0x00000064) // (PWMC_FCR) PWM Fault Mode Clear Register #define PWMC_FPV (AT91_CAST(AT91_REG *) 0x00000068) // (PWMC_FPV) PWM Fault Protection Value Register #define PWMC_FPER1 (AT91_CAST(AT91_REG *) 0x0000006C) // (PWMC_FPER1) PWM Fault Protection Enable Register 1 #define PWMC_FPER2 (AT91_CAST(AT91_REG *) 0x00000070) // (PWMC_FPER2) PWM Fault Protection Enable Register 2 #define PWMC_FPER3 (AT91_CAST(AT91_REG *) 0x00000074) // (PWMC_FPER3) PWM Fault Protection Enable Register 3 #define PWMC_FPER4 (AT91_CAST(AT91_REG *) 0x00000078) // (PWMC_FPER4) PWM Fault Protection Enable Register 4 #define PWMC_EL0MR (AT91_CAST(AT91_REG *) 0x0000007C) // (PWMC_EL0MR) PWM Event Line 0 Mode Register #define PWMC_EL1MR (AT91_CAST(AT91_REG *) 0x00000080) // (PWMC_EL1MR) PWM Event Line 1 Mode Register #define PWMC_EL2MR (AT91_CAST(AT91_REG *) 0x00000084) // (PWMC_EL2MR) PWM Event Line 2 Mode Register #define PWMC_EL3MR (AT91_CAST(AT91_REG *) 0x00000088) // (PWMC_EL3MR) PWM Event Line 3 Mode Register #define PWMC_EL4MR (AT91_CAST(AT91_REG *) 0x0000008C) // (PWMC_EL4MR) PWM Event Line 4 Mode Register #define PWMC_EL5MR (AT91_CAST(AT91_REG *) 0x00000090) // (PWMC_EL5MR) PWM Event Line 5 Mode Register #define PWMC_EL6MR (AT91_CAST(AT91_REG *) 0x00000094) // (PWMC_EL6MR) PWM Event Line 6 Mode Register #define PWMC_EL7MR (AT91_CAST(AT91_REG *) 0x00000098) // (PWMC_EL7MR) PWM Event Line 7 Mode Register #define PWMC_WPCR (AT91_CAST(AT91_REG *) 0x000000E4) // (PWMC_WPCR) PWM Write Protection Enable Register #define PWMC_WPSR (AT91_CAST(AT91_REG *) 0x000000E8) // (PWMC_WPSR) PWM Write Protection Status Register #define PWMC_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (PWMC_ADDRSIZE) PWMC ADDRSIZE REGISTER #define PWMC_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (PWMC_IPNAME1) PWMC IPNAME1 REGISTER #define PWMC_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (PWMC_IPNAME2) PWMC IPNAME2 REGISTER #define PWMC_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (PWMC_FEATURES) PWMC FEATURES REGISTER #define PWMC_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (PWMC_VER) PWMC Version Register #define PWMC_CMP0V (AT91_CAST(AT91_REG *) 0x00000130) // (PWMC_CMP0V) PWM Comparison Value 0 Register #define PWMC_CMP0VUPD (AT91_CAST(AT91_REG *) 0x00000134) // (PWMC_CMP0VUPD) PWM Comparison Value 0 Update Register #define PWMC_CMP0M (AT91_CAST(AT91_REG *) 0x00000138) // (PWMC_CMP0M) PWM Comparison Mode 0 Register #define PWMC_CMP0MUPD (AT91_CAST(AT91_REG *) 0x0000013C) // (PWMC_CMP0MUPD) PWM Comparison Mode 0 Update Register #define PWMC_CMP1V (AT91_CAST(AT91_REG *) 0x00000140) // (PWMC_CMP1V) PWM Comparison Value 1 Register #define PWMC_CMP1VUPD (AT91_CAST(AT91_REG *) 0x00000144) // (PWMC_CMP1VUPD) PWM Comparison Value 1 Update Register #define PWMC_CMP1M (AT91_CAST(AT91_REG *) 0x00000148) // (PWMC_CMP1M) PWM Comparison Mode 1 Register #define PWMC_CMP1MUPD (AT91_CAST(AT91_REG *) 0x0000014C) // (PWMC_CMP1MUPD) PWM Comparison Mode 1 Update Register #define PWMC_CMP2V (AT91_CAST(AT91_REG *) 0x00000150) // (PWMC_CMP2V) PWM Comparison Value 2 Register #define PWMC_CMP2VUPD (AT91_CAST(AT91_REG *) 0x00000154) // (PWMC_CMP2VUPD) PWM Comparison Value 2 Update Register #define PWMC_CMP2M (AT91_CAST(AT91_REG *) 0x00000158) // (PWMC_CMP2M) PWM Comparison Mode 2 Register #define PWMC_CMP2MUPD (AT91_CAST(AT91_REG *) 0x0000015C) // (PWMC_CMP2MUPD) PWM Comparison Mode 2 Update Register #define PWMC_CMP3V (AT91_CAST(AT91_REG *) 0x00000160) // (PWMC_CMP3V) PWM Comparison Value 3 Register #define PWMC_CMP3VUPD (AT91_CAST(AT91_REG *) 0x00000164) // (PWMC_CMP3VUPD) PWM Comparison Value 3 Update Register #define PWMC_CMP3M (AT91_CAST(AT91_REG *) 0x00000168) // (PWMC_CMP3M) PWM Comparison Mode 3 Register #define PWMC_CMP3MUPD (AT91_CAST(AT91_REG *) 0x0000016C) // (PWMC_CMP3MUPD) PWM Comparison Mode 3 Update Register #define PWMC_CMP4V (AT91_CAST(AT91_REG *) 0x00000170) // (PWMC_CMP4V) PWM Comparison Value 4 Register #define PWMC_CMP4VUPD (AT91_CAST(AT91_REG *) 0x00000174) // (PWMC_CMP4VUPD) PWM Comparison Value 4 Update Register #define PWMC_CMP4M (AT91_CAST(AT91_REG *) 0x00000178) // (PWMC_CMP4M) PWM Comparison Mode 4 Register #define PWMC_CMP4MUPD (AT91_CAST(AT91_REG *) 0x0000017C) // (PWMC_CMP4MUPD) PWM Comparison Mode 4 Update Register #define PWMC_CMP5V (AT91_CAST(AT91_REG *) 0x00000180) // (PWMC_CMP5V) PWM Comparison Value 5 Register #define PWMC_CMP5VUPD (AT91_CAST(AT91_REG *) 0x00000184) // (PWMC_CMP5VUPD) PWM Comparison Value 5 Update Register #define PWMC_CMP5M (AT91_CAST(AT91_REG *) 0x00000188) // (PWMC_CMP5M) PWM Comparison Mode 5 Register #define PWMC_CMP5MUPD (AT91_CAST(AT91_REG *) 0x0000018C) // (PWMC_CMP5MUPD) PWM Comparison Mode 5 Update Register #define PWMC_CMP6V (AT91_CAST(AT91_REG *) 0x00000190) // (PWMC_CMP6V) PWM Comparison Value 6 Register #define PWMC_CMP6VUPD (AT91_CAST(AT91_REG *) 0x00000194) // (PWMC_CMP6VUPD) PWM Comparison Value 6 Update Register #define PWMC_CMP6M (AT91_CAST(AT91_REG *) 0x00000198) // (PWMC_CMP6M) PWM Comparison Mode 6 Register #define PWMC_CMP6MUPD (AT91_CAST(AT91_REG *) 0x0000019C) // (PWMC_CMP6MUPD) PWM Comparison Mode 6 Update Register #define PWMC_CMP7V (AT91_CAST(AT91_REG *) 0x000001A0) // (PWMC_CMP7V) PWM Comparison Value 7 Register #define PWMC_CMP7VUPD (AT91_CAST(AT91_REG *) 0x000001A4) // (PWMC_CMP7VUPD) PWM Comparison Value 7 Update Register #define PWMC_CMP7M (AT91_CAST(AT91_REG *) 0x000001A8) // (PWMC_CMP7M) PWM Comparison Mode 7 Register #define PWMC_CMP7MUPD (AT91_CAST(AT91_REG *) 0x000001AC) // (PWMC_CMP7MUPD) PWM Comparison Mode 7 Update Register #endif // -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- #define AT91C_PWMC_DIVA (0xFF << 0) // (PWMC) CLKA divide factor. #define AT91C_PWMC_PREA (0xF << 8) // (PWMC) Divider Input Clock Prescaler A #define AT91C_PWMC_PREA_MCK (0x0 << 8) // (PWMC) #define AT91C_PWMC_PREA_MCK_DIV_2 (0x1 << 8) // (PWMC) #define AT91C_PWMC_PREA_MCK_DIV_4 (0x2 << 8) // (PWMC) #define AT91C_PWMC_PREA_MCK_DIV_8 (0x3 << 8) // (PWMC) #define AT91C_PWMC_PREA_MCK_DIV_16 (0x4 << 8) // (PWMC) #define AT91C_PWMC_PREA_MCK_DIV_32 (0x5 << 8) // (PWMC) #define AT91C_PWMC_PREA_MCK_DIV_64 (0x6 << 8) // (PWMC) #define AT91C_PWMC_PREA_MCK_DIV_128 (0x7 << 8) // (PWMC) #define AT91C_PWMC_PREA_MCK_DIV_256 (0x8 << 8) // (PWMC) #define AT91C_PWMC_DIVB (0xFF << 16) // (PWMC) CLKB divide factor. #define AT91C_PWMC_PREB (0xF << 24) // (PWMC) Divider Input Clock Prescaler B #define AT91C_PWMC_PREB_MCK (0x0 << 24) // (PWMC) #define AT91C_PWMC_PREB_MCK_DIV_2 (0x1 << 24) // (PWMC) #define AT91C_PWMC_PREB_MCK_DIV_4 (0x2 << 24) // (PWMC) #define AT91C_PWMC_PREB_MCK_DIV_8 (0x3 << 24) // (PWMC) #define AT91C_PWMC_PREB_MCK_DIV_16 (0x4 << 24) // (PWMC) #define AT91C_PWMC_PREB_MCK_DIV_32 (0x5 << 24) // (PWMC) #define AT91C_PWMC_PREB_MCK_DIV_64 (0x6 << 24) // (PWMC) #define AT91C_PWMC_PREB_MCK_DIV_128 (0x7 << 24) // (PWMC) #define AT91C_PWMC_PREB_MCK_DIV_256 (0x8 << 24) // (PWMC) #define AT91C_PWMC_CLKSEL (0x1 << 31) // (PWMC) CCK Source Clock Selection // -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- #define AT91C_PWMC_CHID0 (0x1 << 0) // (PWMC) Channel ID 0 #define AT91C_PWMC_CHID1 (0x1 << 1) // (PWMC) Channel ID 1 #define AT91C_PWMC_CHID2 (0x1 << 2) // (PWMC) Channel ID 2 #define AT91C_PWMC_CHID3 (0x1 << 3) // (PWMC) Channel ID 3 #define AT91C_PWMC_CHID4 (0x1 << 4) // (PWMC) Channel ID 4 #define AT91C_PWMC_CHID5 (0x1 << 5) // (PWMC) Channel ID 5 #define AT91C_PWMC_CHID6 (0x1 << 6) // (PWMC) Channel ID 6 #define AT91C_PWMC_CHID7 (0x1 << 7) // (PWMC) Channel ID 7 #define AT91C_PWMC_CHID8 (0x1 << 8) // (PWMC) Channel ID 8 #define AT91C_PWMC_CHID9 (0x1 << 9) // (PWMC) Channel ID 9 #define AT91C_PWMC_CHID10 (0x1 << 10) // (PWMC) Channel ID 10 #define AT91C_PWMC_CHID11 (0x1 << 11) // (PWMC) Channel ID 11 #define AT91C_PWMC_CHID12 (0x1 << 12) // (PWMC) Channel ID 12 #define AT91C_PWMC_CHID13 (0x1 << 13) // (PWMC) Channel ID 13 #define AT91C_PWMC_CHID14 (0x1 << 14) // (PWMC) Channel ID 14 #define AT91C_PWMC_CHID15 (0x1 << 15) // (PWMC) Channel ID 15 // -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- // -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- // -------- PWMC_IER1 : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- #define AT91C_PWMC_FCHID0 (0x1 << 16) // (PWMC) Fault Event Channel ID 0 #define AT91C_PWMC_FCHID1 (0x1 << 17) // (PWMC) Fault Event Channel ID 1 #define AT91C_PWMC_FCHID2 (0x1 << 18) // (PWMC) Fault Event Channel ID 2 #define AT91C_PWMC_FCHID3 (0x1 << 19) // (PWMC) Fault Event Channel ID 3 #define AT91C_PWMC_FCHID4 (0x1 << 20) // (PWMC) Fault Event Channel ID 4 #define AT91C_PWMC_FCHID5 (0x1 << 21) // (PWMC) Fault Event Channel ID 5 #define AT91C_PWMC_FCHID6 (0x1 << 22) // (PWMC) Fault Event Channel ID 6 #define AT91C_PWMC_FCHID7 (0x1 << 23) // (PWMC) Fault Event Channel ID 7 #define AT91C_PWMC_FCHID8 (0x1 << 24) // (PWMC) Fault Event Channel ID 8 #define AT91C_PWMC_FCHID9 (0x1 << 25) // (PWMC) Fault Event Channel ID 9 #define AT91C_PWMC_FCHID10 (0x1 << 26) // (PWMC) Fault Event Channel ID 10 #define AT91C_PWMC_FCHID11 (0x1 << 27) // (PWMC) Fault Event Channel ID 11 #define AT91C_PWMC_FCHID12 (0x1 << 28) // (PWMC) Fault Event Channel ID 12 #define AT91C_PWMC_FCHID13 (0x1 << 29) // (PWMC) Fault Event Channel ID 13 #define AT91C_PWMC_FCHID14 (0x1 << 30) // (PWMC) Fault Event Channel ID 14 #define AT91C_PWMC_FCHID15 (0x1 << 31) // (PWMC) Fault Event Channel ID 15 // -------- PWMC_IDR1 : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- // -------- PWMC_IMR1 : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- // -------- PWMC_ISR1 : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- // -------- PWMC_SYNC : (PWMC Offset: 0x20) PWMC Synchronous Channels Register -------- #define AT91C_PWMC_SYNC0 (0x1 << 0) // (PWMC) Synchronous Channel ID 0 #define AT91C_PWMC_SYNC1 (0x1 << 1) // (PWMC) Synchronous Channel ID 1 #define AT91C_PWMC_SYNC2 (0x1 << 2) // (PWMC) Synchronous Channel ID 2 #define AT91C_PWMC_SYNC3 (0x1 << 3) // (PWMC) Synchronous Channel ID 3 #define AT91C_PWMC_SYNC4 (0x1 << 4) // (PWMC) Synchronous Channel ID 4 #define AT91C_PWMC_SYNC5 (0x1 << 5) // (PWMC) Synchronous Channel ID 5 #define AT91C_PWMC_SYNC6 (0x1 << 6) // (PWMC) Synchronous Channel ID 6 #define AT91C_PWMC_SYNC7 (0x1 << 7) // (PWMC) Synchronous Channel ID 7 #define AT91C_PWMC_SYNC8 (0x1 << 8) // (PWMC) Synchronous Channel ID 8 #define AT91C_PWMC_SYNC9 (0x1 << 9) // (PWMC) Synchronous Channel ID 9 #define AT91C_PWMC_SYNC10 (0x1 << 10) // (PWMC) Synchronous Channel ID 10 #define AT91C_PWMC_SYNC11 (0x1 << 11) // (PWMC) Synchronous Channel ID 11 #define AT91C_PWMC_SYNC12 (0x1 << 12) // (PWMC) Synchronous Channel ID 12 #define AT91C_PWMC_SYNC13 (0x1 << 13) // (PWMC) Synchronous Channel ID 13 #define AT91C_PWMC_SYNC14 (0x1 << 14) // (PWMC) Synchronous Channel ID 14 #define AT91C_PWMC_SYNC15 (0x1 << 15) // (PWMC) Synchronous Channel ID 15 #define AT91C_PWMC_UPDM (0x3 << 16) // (PWMC) Synchronous Channels Update mode #define AT91C_PWMC_UPDM_MODE0 (0x0 << 16) // (PWMC) Manual write of data and manual trigger of the update #define AT91C_PWMC_UPDM_MODE1 (0x1 << 16) // (PWMC) Manual write of data and automatic trigger of the update #define AT91C_PWMC_UPDM_MODE2 (0x2 << 16) // (PWMC) Automatic write of data and automatic trigger of the update // -------- PWMC_UPCR : (PWMC Offset: 0x28) PWMC Update Control Register -------- #define AT91C_PWMC_UPDULOCK (0x1 << 0) // (PWMC) Synchronized Channels Duty Cycle Update Unlock // -------- PWMC_SCUP : (PWMC Offset: 0x2c) PWM Update Period Register -------- #define AT91C_PWMC_UPR (0xF << 0) // (PWMC) PWM Update Period. #define AT91C_PWMC_UPRCNT (0xF << 4) // (PWMC) PWM Update Period Counter. // -------- PWMC_SCUPUPD : (PWMC Offset: 0x30) PWM Update Period Update Register -------- #define AT91C_PWMC_UPVUPDAL (0xF << 0) // (PWMC) PWM Update Period Update. // -------- PWMC_IER2 : (PWMC Offset: 0x34) PWMC Interrupt Enable Register -------- #define AT91C_PWMC_WRDY (0x1 << 0) // (PWMC) PDC Write Ready #define AT91C_PWMC_ENDTX (0x1 << 1) // (PWMC) PDC End of TX Buffer #define AT91C_PWMC_TXBUFE (0x1 << 2) // (PWMC) PDC End of TX Buffer #define AT91C_PWMC_UNRE (0x1 << 3) // (PWMC) PDC End of TX Buffer // -------- PWMC_IDR2 : (PWMC Offset: 0x38) PWMC Interrupt Disable Register -------- // -------- PWMC_IMR2 : (PWMC Offset: 0x3c) PWMC Interrupt Mask Register -------- // -------- PWMC_ISR2 : (PWMC Offset: 0x40) PWMC Interrupt Status Register -------- #define AT91C_PWMC_CMPM0 (0x1 << 8) // (PWMC) Comparison x Match #define AT91C_PWMC_CMPM1 (0x1 << 9) // (PWMC) Comparison x Match #define AT91C_PWMC_CMPM2 (0x1 << 10) // (PWMC) Comparison x Match #define AT91C_PWMC_CMPM3 (0x1 << 11) // (PWMC) Comparison x Match #define AT91C_PWMC_CMPM4 (0x1 << 12) // (PWMC) Comparison x Match #define AT91C_PWMC_CMPM5 (0x1 << 13) // (PWMC) Comparison x Match #define AT91C_PWMC_CMPM6 (0x1 << 14) // (PWMC) Comparison x Match #define AT91C_PWMC_CMPM7 (0x1 << 15) // (PWMC) Comparison x Match #define AT91C_PWMC_CMPU0 (0x1 << 16) // (PWMC) Comparison x Update #define AT91C_PWMC_CMPU1 (0x1 << 17) // (PWMC) Comparison x Update #define AT91C_PWMC_CMPU2 (0x1 << 18) // (PWMC) Comparison x Update #define AT91C_PWMC_CMPU3 (0x1 << 19) // (PWMC) Comparison x Update #define AT91C_PWMC_CMPU4 (0x1 << 20) // (PWMC) Comparison x Update #define AT91C_PWMC_CMPU5 (0x1 << 21) // (PWMC) Comparison x Update #define AT91C_PWMC_CMPU6 (0x1 << 22) // (PWMC) Comparison x Update #define AT91C_PWMC_CMPU7 (0x1 << 23) // (PWMC) Comparison x Update // -------- PWMC_OOV : (PWMC Offset: 0x44) PWM Output Override Value Register -------- #define AT91C_PWMC_OOVH0 (0x1 << 0) // (PWMC) Output Override Value for PWMH output of the channel 0 #define AT91C_PWMC_OOVH1 (0x1 << 1) // (PWMC) Output Override Value for PWMH output of the channel 1 #define AT91C_PWMC_OOVH2 (0x1 << 2) // (PWMC) Output Override Value for PWMH output of the channel 2 #define AT91C_PWMC_OOVH3 (0x1 << 3) // (PWMC) Output Override Value for PWMH output of the channel 3 #define AT91C_PWMC_OOVH4 (0x1 << 4) // (PWMC) Output Override Value for PWMH output of the channel 4 #define AT91C_PWMC_OOVH5 (0x1 << 5) // (PWMC) Output Override Value for PWMH output of the channel 5 #define AT91C_PWMC_OOVH6 (0x1 << 6) // (PWMC) Output Override Value for PWMH output of the channel 6 #define AT91C_PWMC_OOVH7 (0x1 << 7) // (PWMC) Output Override Value for PWMH output of the channel 7 #define AT91C_PWMC_OOVH8 (0x1 << 8) // (PWMC) Output Override Value for PWMH output of the channel 8 #define AT91C_PWMC_OOVH9 (0x1 << 9) // (PWMC) Output Override Value for PWMH output of the channel 9 #define AT91C_PWMC_OOVH10 (0x1 << 10) // (PWMC) Output Override Value for PWMH output of the channel 10 #define AT91C_PWMC_OOVH11 (0x1 << 11) // (PWMC) Output Override Value for PWMH output of the channel 11 #define AT91C_PWMC_OOVH12 (0x1 << 12) // (PWMC) Output Override Value for PWMH output of the channel 12 #define AT91C_PWMC_OOVH13 (0x1 << 13) // (PWMC) Output Override Value for PWMH output of the channel 13 #define AT91C_PWMC_OOVH14 (0x1 << 14) // (PWMC) Output Override Value for PWMH output of the channel 14 #define AT91C_PWMC_OOVH15 (0x1 << 15) // (PWMC) Output Override Value for PWMH output of the channel 15 #define AT91C_PWMC_OOVL0 (0x1 << 16) // (PWMC) Output Override Value for PWML output of the channel 0 #define AT91C_PWMC_OOVL1 (0x1 << 17) // (PWMC) Output Override Value for PWML output of the channel 1 #define AT91C_PWMC_OOVL2 (0x1 << 18) // (PWMC) Output Override Value for PWML output of the channel 2 #define AT91C_PWMC_OOVL3 (0x1 << 19) // (PWMC) Output Override Value for PWML output of the channel 3 #define AT91C_PWMC_OOVL4 (0x1 << 20) // (PWMC) Output Override Value for PWML output of the channel 4 #define AT91C_PWMC_OOVL5 (0x1 << 21) // (PWMC) Output Override Value for PWML output of the channel 5 #define AT91C_PWMC_OOVL6 (0x1 << 22) // (PWMC) Output Override Value for PWML output of the channel 6 #define AT91C_PWMC_OOVL7 (0x1 << 23) // (PWMC) Output Override Value for PWML output of the channel 7 #define AT91C_PWMC_OOVL8 (0x1 << 24) // (PWMC) Output Override Value for PWML output of the channel 8 #define AT91C_PWMC_OOVL9 (0x1 << 25) // (PWMC) Output Override Value for PWML output of the channel 9 #define AT91C_PWMC_OOVL10 (0x1 << 26) // (PWMC) Output Override Value for PWML output of the channel 10 #define AT91C_PWMC_OOVL11 (0x1 << 27) // (PWMC) Output Override Value for PWML output of the channel 11 #define AT91C_PWMC_OOVL12 (0x1 << 28) // (PWMC) Output Override Value for PWML output of the channel 12 #define AT91C_PWMC_OOVL13 (0x1 << 29) // (PWMC) Output Override Value for PWML output of the channel 13 #define AT91C_PWMC_OOVL14 (0x1 << 30) // (PWMC) Output Override Value for PWML output of the channel 14 #define AT91C_PWMC_OOVL15 (0x1 << 31) // (PWMC) Output Override Value for PWML output of the channel 15 // -------- PWMC_OS : (PWMC Offset: 0x48) PWM Output Selection Register -------- #define AT91C_PWMC_OSH0 (0x1 << 0) // (PWMC) Output Selection for PWMH output of the channel 0 #define AT91C_PWMC_OSH1 (0x1 << 1) // (PWMC) Output Selection for PWMH output of the channel 1 #define AT91C_PWMC_OSH2 (0x1 << 2) // (PWMC) Output Selection for PWMH output of the channel 2 #define AT91C_PWMC_OSH3 (0x1 << 3) // (PWMC) Output Selection for PWMH output of the channel 3 #define AT91C_PWMC_OSH4 (0x1 << 4) // (PWMC) Output Selection for PWMH output of the channel 4 #define AT91C_PWMC_OSH5 (0x1 << 5) // (PWMC) Output Selection for PWMH output of the channel 5 #define AT91C_PWMC_OSH6 (0x1 << 6) // (PWMC) Output Selection for PWMH output of the channel 6 #define AT91C_PWMC_OSH7 (0x1 << 7) // (PWMC) Output Selection for PWMH output of the channel 7 #define AT91C_PWMC_OSH8 (0x1 << 8) // (PWMC) Output Selection for PWMH output of the channel 8 #define AT91C_PWMC_OSH9 (0x1 << 9) // (PWMC) Output Selection for PWMH output of the channel 9 #define AT91C_PWMC_OSH10 (0x1 << 10) // (PWMC) Output Selection for PWMH output of the channel 10 #define AT91C_PWMC_OSH11 (0x1 << 11) // (PWMC) Output Selection for PWMH output of the channel 11 #define AT91C_PWMC_OSH12 (0x1 << 12) // (PWMC) Output Selection for PWMH output of the channel 12 #define AT91C_PWMC_OSH13 (0x1 << 13) // (PWMC) Output Selection for PWMH output of the channel 13 #define AT91C_PWMC_OSH14 (0x1 << 14) // (PWMC) Output Selection for PWMH output of the channel 14 #define AT91C_PWMC_OSH15 (0x1 << 15) // (PWMC) Output Selection for PWMH output of the channel 15 #define AT91C_PWMC_OSL0 (0x1 << 16) // (PWMC) Output Selection for PWML output of the channel 0 #define AT91C_PWMC_OSL1 (0x1 << 17) // (PWMC) Output Selection for PWML output of the channel 1 #define AT91C_PWMC_OSL2 (0x1 << 18) // (PWMC) Output Selection for PWML output of the channel 2 #define AT91C_PWMC_OSL3 (0x1 << 19) // (PWMC) Output Selection for PWML output of the channel 3 #define AT91C_PWMC_OSL4 (0x1 << 20) // (PWMC) Output Selection for PWML output of the channel 4 #define AT91C_PWMC_OSL5 (0x1 << 21) // (PWMC) Output Selection for PWML output of the channel 5 #define AT91C_PWMC_OSL6 (0x1 << 22) // (PWMC) Output Selection for PWML output of the channel 6 #define AT91C_PWMC_OSL7 (0x1 << 23) // (PWMC) Output Selection for PWML output of the channel 7 #define AT91C_PWMC_OSL8 (0x1 << 24) // (PWMC) Output Selection for PWML output of the channel 8 #define AT91C_PWMC_OSL9 (0x1 << 25) // (PWMC) Output Selection for PWML output of the channel 9 #define AT91C_PWMC_OSL10 (0x1 << 26) // (PWMC) Output Selection for PWML output of the channel 10 #define AT91C_PWMC_OSL11 (0x1 << 27) // (PWMC) Output Selection for PWML output of the channel 11 #define AT91C_PWMC_OSL12 (0x1 << 28) // (PWMC) Output Selection for PWML output of the channel 12 #define AT91C_PWMC_OSL13 (0x1 << 29) // (PWMC) Output Selection for PWML output of the channel 13 #define AT91C_PWMC_OSL14 (0x1 << 30) // (PWMC) Output Selection for PWML output of the channel 14 #define AT91C_PWMC_OSL15 (0x1 << 31) // (PWMC) Output Selection for PWML output of the channel 15 // -------- PWMC_OSS : (PWMC Offset: 0x4c) PWM Output Selection Set Register -------- #define AT91C_PWMC_OSSH0 (0x1 << 0) // (PWMC) Output Selection Set for PWMH output of the channel 0 #define AT91C_PWMC_OSSH1 (0x1 << 1) // (PWMC) Output Selection Set for PWMH output of the channel 1 #define AT91C_PWMC_OSSH2 (0x1 << 2) // (PWMC) Output Selection Set for PWMH output of the channel 2 #define AT91C_PWMC_OSSH3 (0x1 << 3) // (PWMC) Output Selection Set for PWMH output of the channel 3 #define AT91C_PWMC_OSSH4 (0x1 << 4) // (PWMC) Output Selection Set for PWMH output of the channel 4 #define AT91C_PWMC_OSSH5 (0x1 << 5) // (PWMC) Output Selection Set for PWMH output of the channel 5 #define AT91C_PWMC_OSSH6 (0x1 << 6) // (PWMC) Output Selection Set for PWMH output of the channel 6 #define AT91C_PWMC_OSSH7 (0x1 << 7) // (PWMC) Output Selection Set for PWMH output of the channel 7 #define AT91C_PWMC_OSSH8 (0x1 << 8) // (PWMC) Output Selection Set for PWMH output of the channel 8 #define AT91C_PWMC_OSSH9 (0x1 << 9) // (PWMC) Output Selection Set for PWMH output of the channel 9 #define AT91C_PWMC_OSSH10 (0x1 << 10) // (PWMC) Output Selection Set for PWMH output of the channel 10 #define AT91C_PWMC_OSSH11 (0x1 << 11) // (PWMC) Output Selection Set for PWMH output of the channel 11 #define AT91C_PWMC_OSSH12 (0x1 << 12) // (PWMC) Output Selection Set for PWMH output of the channel 12 #define AT91C_PWMC_OSSH13 (0x1 << 13) // (PWMC) Output Selection Set for PWMH output of the channel 13 #define AT91C_PWMC_OSSH14 (0x1 << 14) // (PWMC) Output Selection Set for PWMH output of the channel 14 #define AT91C_PWMC_OSSH15 (0x1 << 15) // (PWMC) Output Selection Set for PWMH output of the channel 15 #define AT91C_PWMC_OSSL0 (0x1 << 16) // (PWMC) Output Selection Set for PWML output of the channel 0 #define AT91C_PWMC_OSSL1 (0x1 << 17) // (PWMC) Output Selection Set for PWML output of the channel 1 #define AT91C_PWMC_OSSL2 (0x1 << 18) // (PWMC) Output Selection Set for PWML output of the channel 2 #define AT91C_PWMC_OSSL3 (0x1 << 19) // (PWMC) Output Selection Set for PWML output of the channel 3 #define AT91C_PWMC_OSSL4 (0x1 << 20) // (PWMC) Output Selection Set for PWML output of the channel 4 #define AT91C_PWMC_OSSL5 (0x1 << 21) // (PWMC) Output Selection Set for PWML output of the channel 5 #define AT91C_PWMC_OSSL6 (0x1 << 22) // (PWMC) Output Selection Set for PWML output of the channel 6 #define AT91C_PWMC_OSSL7 (0x1 << 23) // (PWMC) Output Selection Set for PWML output of the channel 7 #define AT91C_PWMC_OSSL8 (0x1 << 24) // (PWMC) Output Selection Set for PWML output of the channel 8 #define AT91C_PWMC_OSSL9 (0x1 << 25) // (PWMC) Output Selection Set for PWML output of the channel 9 #define AT91C_PWMC_OSSL10 (0x1 << 26) // (PWMC) Output Selection Set for PWML output of the channel 10 #define AT91C_PWMC_OSSL11 (0x1 << 27) // (PWMC) Output Selection Set for PWML output of the channel 11 #define AT91C_PWMC_OSSL12 (0x1 << 28) // (PWMC) Output Selection Set for PWML output of the channel 12 #define AT91C_PWMC_OSSL13 (0x1 << 29) // (PWMC) Output Selection Set for PWML output of the channel 13 #define AT91C_PWMC_OSSL14 (0x1 << 30) // (PWMC) Output Selection Set for PWML output of the channel 14 #define AT91C_PWMC_OSSL15 (0x1 << 31) // (PWMC) Output Selection Set for PWML output of the channel 15 // -------- PWMC_OSC : (PWMC Offset: 0x50) PWM Output Selection Clear Register -------- #define AT91C_PWMC_OSCH0 (0x1 << 0) // (PWMC) Output Selection Clear for PWMH output of the channel 0 #define AT91C_PWMC_OSCH1 (0x1 << 1) // (PWMC) Output Selection Clear for PWMH output of the channel 1 #define AT91C_PWMC_OSCH2 (0x1 << 2) // (PWMC) Output Selection Clear for PWMH output of the channel 2 #define AT91C_PWMC_OSCH3 (0x1 << 3) // (PWMC) Output Selection Clear for PWMH output of the channel 3 #define AT91C_PWMC_OSCH4 (0x1 << 4) // (PWMC) Output Selection Clear for PWMH output of the channel 4 #define AT91C_PWMC_OSCH5 (0x1 << 5) // (PWMC) Output Selection Clear for PWMH output of the channel 5 #define AT91C_PWMC_OSCH6 (0x1 << 6) // (PWMC) Output Selection Clear for PWMH output of the channel 6 #define AT91C_PWMC_OSCH7 (0x1 << 7) // (PWMC) Output Selection Clear for PWMH output of the channel 7 #define AT91C_PWMC_OSCH8 (0x1 << 8) // (PWMC) Output Selection Clear for PWMH output of the channel 8 #define AT91C_PWMC_OSCH9 (0x1 << 9) // (PWMC) Output Selection Clear for PWMH output of the channel 9 #define AT91C_PWMC_OSCH10 (0x1 << 10) // (PWMC) Output Selection Clear for PWMH output of the channel 10 #define AT91C_PWMC_OSCH11 (0x1 << 11) // (PWMC) Output Selection Clear for PWMH output of the channel 11 #define AT91C_PWMC_OSCH12 (0x1 << 12) // (PWMC) Output Selection Clear for PWMH output of the channel 12 #define AT91C_PWMC_OSCH13 (0x1 << 13) // (PWMC) Output Selection Clear for PWMH output of the channel 13 #define AT91C_PWMC_OSCH14 (0x1 << 14) // (PWMC) Output Selection Clear for PWMH output of the channel 14 #define AT91C_PWMC_OSCH15 (0x1 << 15) // (PWMC) Output Selection Clear for PWMH output of the channel 15 #define AT91C_PWMC_OSCL0 (0x1 << 16) // (PWMC) Output Selection Clear for PWML output of the channel 0 #define AT91C_PWMC_OSCL1 (0x1 << 17) // (PWMC) Output Selection Clear for PWML output of the channel 1 #define AT91C_PWMC_OSCL2 (0x1 << 18) // (PWMC) Output Selection Clear for PWML output of the channel 2 #define AT91C_PWMC_OSCL3 (0x1 << 19) // (PWMC) Output Selection Clear for PWML output of the channel 3 #define AT91C_PWMC_OSCL4 (0x1 << 20) // (PWMC) Output Selection Clear for PWML output of the channel 4 #define AT91C_PWMC_OSCL5 (0x1 << 21) // (PWMC) Output Selection Clear for PWML output of the channel 5 #define AT91C_PWMC_OSCL6 (0x1 << 22) // (PWMC) Output Selection Clear for PWML output of the channel 6 #define AT91C_PWMC_OSCL7 (0x1 << 23) // (PWMC) Output Selection Clear for PWML output of the channel 7 #define AT91C_PWMC_OSCL8 (0x1 << 24) // (PWMC) Output Selection Clear for PWML output of the channel 8 #define AT91C_PWMC_OSCL9 (0x1 << 25) // (PWMC) Output Selection Clear for PWML output of the channel 9 #define AT91C_PWMC_OSCL10 (0x1 << 26) // (PWMC) Output Selection Clear for PWML output of the channel 10 #define AT91C_PWMC_OSCL11 (0x1 << 27) // (PWMC) Output Selection Clear for PWML output of the channel 11 #define AT91C_PWMC_OSCL12 (0x1 << 28) // (PWMC) Output Selection Clear for PWML output of the channel 12 #define AT91C_PWMC_OSCL13 (0x1 << 29) // (PWMC) Output Selection Clear for PWML output of the channel 13 #define AT91C_PWMC_OSCL14 (0x1 << 30) // (PWMC) Output Selection Clear for PWML output of the channel 14 #define AT91C_PWMC_OSCL15 (0x1 << 31) // (PWMC) Output Selection Clear for PWML output of the channel 15 // -------- PWMC_OSSUPD : (PWMC Offset: 0x54) Output Selection Set for PWMH / PWML output of the channel x -------- #define AT91C_PWMC_OSSUPDH0 (0x1 << 0) // (PWMC) Output Selection Set for PWMH output of the channel 0 #define AT91C_PWMC_OSSUPDH1 (0x1 << 1) // (PWMC) Output Selection Set for PWMH output of the channel 1 #define AT91C_PWMC_OSSUPDH2 (0x1 << 2) // (PWMC) Output Selection Set for PWMH output of the channel 2 #define AT91C_PWMC_OSSUPDH3 (0x1 << 3) // (PWMC) Output Selection Set for PWMH output of the channel 3 #define AT91C_PWMC_OSSUPDH4 (0x1 << 4) // (PWMC) Output Selection Set for PWMH output of the channel 4 #define AT91C_PWMC_OSSUPDH5 (0x1 << 5) // (PWMC) Output Selection Set for PWMH output of the channel 5 #define AT91C_PWMC_OSSUPDH6 (0x1 << 6) // (PWMC) Output Selection Set for PWMH output of the channel 6 #define AT91C_PWMC_OSSUPDH7 (0x1 << 7) // (PWMC) Output Selection Set for PWMH output of the channel 7 #define AT91C_PWMC_OSSUPDH8 (0x1 << 8) // (PWMC) Output Selection Set for PWMH output of the channel 8 #define AT91C_PWMC_OSSUPDH9 (0x1 << 9) // (PWMC) Output Selection Set for PWMH output of the channel 9 #define AT91C_PWMC_OSSUPDH10 (0x1 << 10) // (PWMC) Output Selection Set for PWMH output of the channel 10 #define AT91C_PWMC_OSSUPDH11 (0x1 << 11) // (PWMC) Output Selection Set for PWMH output of the channel 11 #define AT91C_PWMC_OSSUPDH12 (0x1 << 12) // (PWMC) Output Selection Set for PWMH output of the channel 12 #define AT91C_PWMC_OSSUPDH13 (0x1 << 13) // (PWMC) Output Selection Set for PWMH output of the channel 13 #define AT91C_PWMC_OSSUPDH14 (0x1 << 14) // (PWMC) Output Selection Set for PWMH output of the channel 14 #define AT91C_PWMC_OSSUPDH15 (0x1 << 15) // (PWMC) Output Selection Set for PWMH output of the channel 15 #define AT91C_PWMC_OSSUPDL0 (0x1 << 16) // (PWMC) Output Selection Set for PWML output of the channel 0 #define AT91C_PWMC_OSSUPDL1 (0x1 << 17) // (PWMC) Output Selection Set for PWML output of the channel 1 #define AT91C_PWMC_OSSUPDL2 (0x1 << 18) // (PWMC) Output Selection Set for PWML output of the channel 2 #define AT91C_PWMC_OSSUPDL3 (0x1 << 19) // (PWMC) Output Selection Set for PWML output of the channel 3 #define AT91C_PWMC_OSSUPDL4 (0x1 << 20) // (PWMC) Output Selection Set for PWML output of the channel 4 #define AT91C_PWMC_OSSUPDL5 (0x1 << 21) // (PWMC) Output Selection Set for PWML output of the channel 5 #define AT91C_PWMC_OSSUPDL6 (0x1 << 22) // (PWMC) Output Selection Set for PWML output of the channel 6 #define AT91C_PWMC_OSSUPDL7 (0x1 << 23) // (PWMC) Output Selection Set for PWML output of the channel 7 #define AT91C_PWMC_OSSUPDL8 (0x1 << 24) // (PWMC) Output Selection Set for PWML output of the channel 8 #define AT91C_PWMC_OSSUPDL9 (0x1 << 25) // (PWMC) Output Selection Set for PWML output of the channel 9 #define AT91C_PWMC_OSSUPDL10 (0x1 << 26) // (PWMC) Output Selection Set for PWML output of the channel 10 #define AT91C_PWMC_OSSUPDL11 (0x1 << 27) // (PWMC) Output Selection Set for PWML output of the channel 11 #define AT91C_PWMC_OSSUPDL12 (0x1 << 28) // (PWMC) Output Selection Set for PWML output of the channel 12 #define AT91C_PWMC_OSSUPDL13 (0x1 << 29) // (PWMC) Output Selection Set for PWML output of the channel 13 #define AT91C_PWMC_OSSUPDL14 (0x1 << 30) // (PWMC) Output Selection Set for PWML output of the channel 14 #define AT91C_PWMC_OSSUPDL15 (0x1 << 31) // (PWMC) Output Selection Set for PWML output of the channel 15 // -------- PWMC_OSCUPD : (PWMC Offset: 0x58) Output Selection Clear for PWMH / PWML output of the channel x -------- #define AT91C_PWMC_OSCUPDH0 (0x1 << 0) // (PWMC) Output Selection Clear for PWMH output of the channel 0 #define AT91C_PWMC_OSCUPDH1 (0x1 << 1) // (PWMC) Output Selection Clear for PWMH output of the channel 1 #define AT91C_PWMC_OSCUPDH2 (0x1 << 2) // (PWMC) Output Selection Clear for PWMH output of the channel 2 #define AT91C_PWMC_OSCUPDH3 (0x1 << 3) // (PWMC) Output Selection Clear for PWMH output of the channel 3 #define AT91C_PWMC_OSCUPDH4 (0x1 << 4) // (PWMC) Output Selection Clear for PWMH output of the channel 4 #define AT91C_PWMC_OSCUPDH5 (0x1 << 5) // (PWMC) Output Selection Clear for PWMH output of the channel 5 #define AT91C_PWMC_OSCUPDH6 (0x1 << 6) // (PWMC) Output Selection Clear for PWMH output of the channel 6 #define AT91C_PWMC_OSCUPDH7 (0x1 << 7) // (PWMC) Output Selection Clear for PWMH output of the channel 7 #define AT91C_PWMC_OSCUPDH8 (0x1 << 8) // (PWMC) Output Selection Clear for PWMH output of the channel 8 #define AT91C_PWMC_OSCUPDH9 (0x1 << 9) // (PWMC) Output Selection Clear for PWMH output of the channel 9 #define AT91C_PWMC_OSCUPDH10 (0x1 << 10) // (PWMC) Output Selection Clear for PWMH output of the channel 10 #define AT91C_PWMC_OSCUPDH11 (0x1 << 11) // (PWMC) Output Selection Clear for PWMH output of the channel 11 #define AT91C_PWMC_OSCUPDH12 (0x1 << 12) // (PWMC) Output Selection Clear for PWMH output of the channel 12 #define AT91C_PWMC_OSCUPDH13 (0x1 << 13) // (PWMC) Output Selection Clear for PWMH output of the channel 13 #define AT91C_PWMC_OSCUPDH14 (0x1 << 14) // (PWMC) Output Selection Clear for PWMH output of the channel 14 #define AT91C_PWMC_OSCUPDH15 (0x1 << 15) // (PWMC) Output Selection Clear for PWMH output of the channel 15 #define AT91C_PWMC_OSCUPDL0 (0x1 << 16) // (PWMC) Output Selection Clear for PWML output of the channel 0 #define AT91C_PWMC_OSCUPDL1 (0x1 << 17) // (PWMC) Output Selection Clear for PWML output of the channel 1 #define AT91C_PWMC_OSCUPDL2 (0x1 << 18) // (PWMC) Output Selection Clear for PWML output of the channel 2 #define AT91C_PWMC_OSCUPDL3 (0x1 << 19) // (PWMC) Output Selection Clear for PWML output of the channel 3 #define AT91C_PWMC_OSCUPDL4 (0x1 << 20) // (PWMC) Output Selection Clear for PWML output of the channel 4 #define AT91C_PWMC_OSCUPDL5 (0x1 << 21) // (PWMC) Output Selection Clear for PWML output of the channel 5 #define AT91C_PWMC_OSCUPDL6 (0x1 << 22) // (PWMC) Output Selection Clear for PWML output of the channel 6 #define AT91C_PWMC_OSCUPDL7 (0x1 << 23) // (PWMC) Output Selection Clear for PWML output of the channel 7 #define AT91C_PWMC_OSCUPDL8 (0x1 << 24) // (PWMC) Output Selection Clear for PWML output of the channel 8 #define AT91C_PWMC_OSCUPDL9 (0x1 << 25) // (PWMC) Output Selection Clear for PWML output of the channel 9 #define AT91C_PWMC_OSCUPDL10 (0x1 << 26) // (PWMC) Output Selection Clear for PWML output of the channel 10 #define AT91C_PWMC_OSCUPDL11 (0x1 << 27) // (PWMC) Output Selection Clear for PWML output of the channel 11 #define AT91C_PWMC_OSCUPDL12 (0x1 << 28) // (PWMC) Output Selection Clear for PWML output of the channel 12 #define AT91C_PWMC_OSCUPDL13 (0x1 << 29) // (PWMC) Output Selection Clear for PWML output of the channel 13 #define AT91C_PWMC_OSCUPDL14 (0x1 << 30) // (PWMC) Output Selection Clear for PWML output of the channel 14 #define AT91C_PWMC_OSCUPDL15 (0x1 << 31) // (PWMC) Output Selection Clear for PWML output of the channel 15 // -------- PWMC_FMR : (PWMC Offset: 0x5c) PWM Fault Mode Register -------- #define AT91C_PWMC_FPOL0 (0x1 << 0) // (PWMC) Fault Polarity on fault input 0 #define AT91C_PWMC_FPOL1 (0x1 << 1) // (PWMC) Fault Polarity on fault input 1 #define AT91C_PWMC_FPOL2 (0x1 << 2) // (PWMC) Fault Polarity on fault input 2 #define AT91C_PWMC_FPOL3 (0x1 << 3) // (PWMC) Fault Polarity on fault input 3 #define AT91C_PWMC_FPOL4 (0x1 << 4) // (PWMC) Fault Polarity on fault input 4 #define AT91C_PWMC_FPOL5 (0x1 << 5) // (PWMC) Fault Polarity on fault input 5 #define AT91C_PWMC_FPOL6 (0x1 << 6) // (PWMC) Fault Polarity on fault input 6 #define AT91C_PWMC_FPOL7 (0x1 << 7) // (PWMC) Fault Polarity on fault input 7 #define AT91C_PWMC_FMOD0 (0x1 << 8) // (PWMC) Fault Activation Mode on fault input 0 #define AT91C_PWMC_FMOD1 (0x1 << 9) // (PWMC) Fault Activation Mode on fault input 1 #define AT91C_PWMC_FMOD2 (0x1 << 10) // (PWMC) Fault Activation Mode on fault input 2 #define AT91C_PWMC_FMOD3 (0x1 << 11) // (PWMC) Fault Activation Mode on fault input 3 #define AT91C_PWMC_FMOD4 (0x1 << 12) // (PWMC) Fault Activation Mode on fault input 4 #define AT91C_PWMC_FMOD5 (0x1 << 13) // (PWMC) Fault Activation Mode on fault input 5 #define AT91C_PWMC_FMOD6 (0x1 << 14) // (PWMC) Fault Activation Mode on fault input 6 #define AT91C_PWMC_FMOD7 (0x1 << 15) // (PWMC) Fault Activation Mode on fault input 7 #define AT91C_PWMC_FFIL00 (0x1 << 16) // (PWMC) Fault Filtering on fault input 0 #define AT91C_PWMC_FFIL01 (0x1 << 17) // (PWMC) Fault Filtering on fault input 1 #define AT91C_PWMC_FFIL02 (0x1 << 18) // (PWMC) Fault Filtering on fault input 2 #define AT91C_PWMC_FFIL03 (0x1 << 19) // (PWMC) Fault Filtering on fault input 3 #define AT91C_PWMC_FFIL04 (0x1 << 20) // (PWMC) Fault Filtering on fault input 4 #define AT91C_PWMC_FFIL05 (0x1 << 21) // (PWMC) Fault Filtering on fault input 5 #define AT91C_PWMC_FFIL06 (0x1 << 22) // (PWMC) Fault Filtering on fault input 6 #define AT91C_PWMC_FFIL07 (0x1 << 23) // (PWMC) Fault Filtering on fault input 7 // -------- PWMC_FSR : (PWMC Offset: 0x60) Fault Input x Value -------- #define AT91C_PWMC_FIV0 (0x1 << 0) // (PWMC) Fault Input 0 Value #define AT91C_PWMC_FIV1 (0x1 << 1) // (PWMC) Fault Input 1 Value #define AT91C_PWMC_FIV2 (0x1 << 2) // (PWMC) Fault Input 2 Value #define AT91C_PWMC_FIV3 (0x1 << 3) // (PWMC) Fault Input 3 Value #define AT91C_PWMC_FIV4 (0x1 << 4) // (PWMC) Fault Input 4 Value #define AT91C_PWMC_FIV5 (0x1 << 5) // (PWMC) Fault Input 5 Value #define AT91C_PWMC_FIV6 (0x1 << 6) // (PWMC) Fault Input 6 Value #define AT91C_PWMC_FIV7 (0x1 << 7) // (PWMC) Fault Input 7 Value #define AT91C_PWMC_FS0 (0x1 << 8) // (PWMC) Fault 0 Status #define AT91C_PWMC_FS1 (0x1 << 9) // (PWMC) Fault 1 Status #define AT91C_PWMC_FS2 (0x1 << 10) // (PWMC) Fault 2 Status #define AT91C_PWMC_FS3 (0x1 << 11) // (PWMC) Fault 3 Status #define AT91C_PWMC_FS4 (0x1 << 12) // (PWMC) Fault 4 Status #define AT91C_PWMC_FS5 (0x1 << 13) // (PWMC) Fault 5 Status #define AT91C_PWMC_FS6 (0x1 << 14) // (PWMC) Fault 6 Status #define AT91C_PWMC_FS7 (0x1 << 15) // (PWMC) Fault 7 Status // -------- PWMC_FCR : (PWMC Offset: 0x64) Fault y Clear -------- #define AT91C_PWMC_FCLR0 (0x1 << 0) // (PWMC) Fault 0 Clear #define AT91C_PWMC_FCLR1 (0x1 << 1) // (PWMC) Fault 1 Clear #define AT91C_PWMC_FCLR2 (0x1 << 2) // (PWMC) Fault 2 Clear #define AT91C_PWMC_FCLR3 (0x1 << 3) // (PWMC) Fault 3 Clear #define AT91C_PWMC_FCLR4 (0x1 << 4) // (PWMC) Fault 4 Clear #define AT91C_PWMC_FCLR5 (0x1 << 5) // (PWMC) Fault 5 Clear #define AT91C_PWMC_FCLR6 (0x1 << 6) // (PWMC) Fault 6 Clear #define AT91C_PWMC_FCLR7 (0x1 << 7) // (PWMC) Fault 7 Clear // -------- PWMC_FPV : (PWMC Offset: 0x68) PWM Fault Protection Value -------- #define AT91C_PWMC_FPVH0 (0x1 << 0) // (PWMC) Fault Protection Value for PWMH output on channel 0 #define AT91C_PWMC_FPVH1 (0x1 << 1) // (PWMC) Fault Protection Value for PWMH output on channel 1 #define AT91C_PWMC_FPVH2 (0x1 << 2) // (PWMC) Fault Protection Value for PWMH output on channel 2 #define AT91C_PWMC_FPVH3 (0x1 << 3) // (PWMC) Fault Protection Value for PWMH output on channel 3 #define AT91C_PWMC_FPVH4 (0x1 << 4) // (PWMC) Fault Protection Value for PWMH output on channel 4 #define AT91C_PWMC_FPVH5 (0x1 << 5) // (PWMC) Fault Protection Value for PWMH output on channel 5 #define AT91C_PWMC_FPVH6 (0x1 << 6) // (PWMC) Fault Protection Value for PWMH output on channel 6 #define AT91C_PWMC_FPVH7 (0x1 << 7) // (PWMC) Fault Protection Value for PWMH output on channel 7 #define AT91C_PWMC_FPVL0 (0x1 << 16) // (PWMC) Fault Protection Value for PWML output on channel 0 #define AT91C_PWMC_FPVL1 (0x1 << 17) // (PWMC) Fault Protection Value for PWML output on channel 1 #define AT91C_PWMC_FPVL2 (0x1 << 18) // (PWMC) Fault Protection Value for PWML output on channel 2 #define AT91C_PWMC_FPVL3 (0x1 << 19) // (PWMC) Fault Protection Value for PWML output on channel 3 #define AT91C_PWMC_FPVL4 (0x1 << 20) // (PWMC) Fault Protection Value for PWML output on channel 4 #define AT91C_PWMC_FPVL5 (0x1 << 21) // (PWMC) Fault Protection Value for PWML output on channel 5 #define AT91C_PWMC_FPVL6 (0x1 << 22) // (PWMC) Fault Protection Value for PWML output on channel 6 #define AT91C_PWMC_FPVL7 (0x1 << 23) // (PWMC) Fault Protection Value for PWML output on channel 7 // -------- PWMC_FPER1 : (PWMC Offset: 0x6c) PWM Fault Protection Enable Register 1 -------- #define AT91C_PWMC_FPE0 (0xFF << 0) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 0 #define AT91C_PWMC_FPE1 (0xFF << 8) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 1 #define AT91C_PWMC_FPE2 (0xFF << 16) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 2 #define AT91C_PWMC_FPE3 (0xFF << 24) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 3 // -------- PWMC_FPER2 : (PWMC Offset: 0x70) PWM Fault Protection Enable Register 2 -------- #define AT91C_PWMC_FPE4 (0xFF << 0) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 4 #define AT91C_PWMC_FPE5 (0xFF << 8) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 5 #define AT91C_PWMC_FPE6 (0xFF << 16) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 6 #define AT91C_PWMC_FPE7 (0xFF << 24) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 7 // -------- PWMC_FPER3 : (PWMC Offset: 0x74) PWM Fault Protection Enable Register 3 -------- #define AT91C_PWMC_FPE8 (0xFF << 0) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 8 #define AT91C_PWMC_FPE9 (0xFF << 8) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 9 #define AT91C_PWMC_FPE10 (0xFF << 16) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 10 #define AT91C_PWMC_FPE11 (0xFF << 24) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 11 // -------- PWMC_FPER4 : (PWMC Offset: 0x78) PWM Fault Protection Enable Register 4 -------- #define AT91C_PWMC_FPE12 (0xFF << 0) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 12 #define AT91C_PWMC_FPE13 (0xFF << 8) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 13 #define AT91C_PWMC_FPE14 (0xFF << 16) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 14 #define AT91C_PWMC_FPE15 (0xFF << 24) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 15 // -------- PWMC_EL0MR : (PWMC Offset: 0x7c) PWM Event Line 0 Mode Register -------- #define AT91C_PWMC_L0CSEL0 (0x1 << 0) // (PWMC) Comparison 0 Selection #define AT91C_PWMC_L0CSEL1 (0x1 << 1) // (PWMC) Comparison 1 Selection #define AT91C_PWMC_L0CSEL2 (0x1 << 2) // (PWMC) Comparison 2 Selection #define AT91C_PWMC_L0CSEL3 (0x1 << 3) // (PWMC) Comparison 3 Selection #define AT91C_PWMC_L0CSEL4 (0x1 << 4) // (PWMC) Comparison 4 Selection #define AT91C_PWMC_L0CSEL5 (0x1 << 5) // (PWMC) Comparison 5 Selection #define AT91C_PWMC_L0CSEL6 (0x1 << 6) // (PWMC) Comparison 6 Selection #define AT91C_PWMC_L0CSEL7 (0x1 << 7) // (PWMC) Comparison 7 Selection // -------- PWMC_EL1MR : (PWMC Offset: 0x80) PWM Event Line 1 Mode Register -------- #define AT91C_PWMC_L1CSEL0 (0x1 << 0) // (PWMC) Comparison 0 Selection #define AT91C_PWMC_L1CSEL1 (0x1 << 1) // (PWMC) Comparison 1 Selection #define AT91C_PWMC_L1CSEL2 (0x1 << 2) // (PWMC) Comparison 2 Selection #define AT91C_PWMC_L1CSEL3 (0x1 << 3) // (PWMC) Comparison 3 Selection #define AT91C_PWMC_L1CSEL4 (0x1 << 4) // (PWMC) Comparison 4 Selection #define AT91C_PWMC_L1CSEL5 (0x1 << 5) // (PWMC) Comparison 5 Selection #define AT91C_PWMC_L1CSEL6 (0x1 << 6) // (PWMC) Comparison 6 Selection #define AT91C_PWMC_L1CSEL7 (0x1 << 7) // (PWMC) Comparison 7 Selection // -------- PWMC_EL2MR : (PWMC Offset: 0x84) PWM Event line 2 Mode Register -------- #define AT91C_PWMC_L2CSEL0 (0x1 << 0) // (PWMC) Comparison 0 Selection #define AT91C_PWMC_L2CSEL1 (0x1 << 1) // (PWMC) Comparison 1 Selection #define AT91C_PWMC_L2CSEL2 (0x1 << 2) // (PWMC) Comparison 2 Selection #define AT91C_PWMC_L2CSEL3 (0x1 << 3) // (PWMC) Comparison 3 Selection #define AT91C_PWMC_L2CSEL4 (0x1 << 4) // (PWMC) Comparison 4 Selection #define AT91C_PWMC_L2CSEL5 (0x1 << 5) // (PWMC) Comparison 5 Selection #define AT91C_PWMC_L2CSEL6 (0x1 << 6) // (PWMC) Comparison 6 Selection #define AT91C_PWMC_L2CSEL7 (0x1 << 7) // (PWMC) Comparison 7 Selection // -------- PWMC_EL3MR : (PWMC Offset: 0x88) PWM Event line 3 Mode Register -------- #define AT91C_PWMC_L3CSEL0 (0x1 << 0) // (PWMC) Comparison 0 Selection #define AT91C_PWMC_L3CSEL1 (0x1 << 1) // (PWMC) Comparison 1 Selection #define AT91C_PWMC_L3CSEL2 (0x1 << 2) // (PWMC) Comparison 2 Selection #define AT91C_PWMC_L3CSEL3 (0x1 << 3) // (PWMC) Comparison 3 Selection #define AT91C_PWMC_L3CSEL4 (0x1 << 4) // (PWMC) Comparison 4 Selection #define AT91C_PWMC_L3CSEL5 (0x1 << 5) // (PWMC) Comparison 5 Selection #define AT91C_PWMC_L3CSEL6 (0x1 << 6) // (PWMC) Comparison 6 Selection #define AT91C_PWMC_L3CSEL7 (0x1 << 7) // (PWMC) Comparison 7 Selection // -------- PWMC_EL4MR : (PWMC Offset: 0x8c) PWM Event line 4 Mode Register -------- #define AT91C_PWMC_L4CSEL0 (0x1 << 0) // (PWMC) Comparison 0 Selection #define AT91C_PWMC_L4CSEL1 (0x1 << 1) // (PWMC) Comparison 1 Selection #define AT91C_PWMC_L4CSEL2 (0x1 << 2) // (PWMC) Comparison 2 Selection #define AT91C_PWMC_L4CSEL3 (0x1 << 3) // (PWMC) Comparison 3 Selection #define AT91C_PWMC_L4CSEL4 (0x1 << 4) // (PWMC) Comparison 4 Selection #define AT91C_PWMC_L4CSEL5 (0x1 << 5) // (PWMC) Comparison 5 Selection #define AT91C_PWMC_L4CSEL6 (0x1 << 6) // (PWMC) Comparison 6 Selection #define AT91C_PWMC_L4CSEL7 (0x1 << 7) // (PWMC) Comparison 7 Selection // -------- PWMC_EL5MR : (PWMC Offset: 0x90) PWM Event line 5 Mode Register -------- #define AT91C_PWMC_L5CSEL0 (0x1 << 0) // (PWMC) Comparison 0 Selection #define AT91C_PWMC_L5CSEL1 (0x1 << 1) // (PWMC) Comparison 1 Selection #define AT91C_PWMC_L5CSEL2 (0x1 << 2) // (PWMC) Comparison 2 Selection #define AT91C_PWMC_L5CSEL3 (0x1 << 3) // (PWMC) Comparison 3 Selection #define AT91C_PWMC_L5CSEL4 (0x1 << 4) // (PWMC) Comparison 4 Selection #define AT91C_PWMC_L5CSEL5 (0x1 << 5) // (PWMC) Comparison 5 Selection #define AT91C_PWMC_L5CSEL6 (0x1 << 6) // (PWMC) Comparison 6 Selection #define AT91C_PWMC_L5CSEL7 (0x1 << 7) // (PWMC) Comparison 7 Selection // -------- PWMC_EL6MR : (PWMC Offset: 0x94) PWM Event line 6 Mode Register -------- #define AT91C_PWMC_L6CSEL0 (0x1 << 0) // (PWMC) Comparison 0 Selection #define AT91C_PWMC_L6CSEL1 (0x1 << 1) // (PWMC) Comparison 1 Selection #define AT91C_PWMC_L6CSEL2 (0x1 << 2) // (PWMC) Comparison 2 Selection #define AT91C_PWMC_L6CSEL3 (0x1 << 3) // (PWMC) Comparison 3 Selection #define AT91C_PWMC_L6CSEL4 (0x1 << 4) // (PWMC) Comparison 4 Selection #define AT91C_PWMC_L6CSEL5 (0x1 << 5) // (PWMC) Comparison 5 Selection #define AT91C_PWMC_L6CSEL6 (0x1 << 6) // (PWMC) Comparison 6 Selection #define AT91C_PWMC_L6CSEL7 (0x1 << 7) // (PWMC) Comparison 7 Selection // -------- PWMC_EL7MR : (PWMC Offset: 0x98) PWM Event line 7 Mode Register -------- #define AT91C_PWMC_L7CSEL0 (0x1 << 0) // (PWMC) Comparison 0 Selection #define AT91C_PWMC_L7CSEL1 (0x1 << 1) // (PWMC) Comparison 1 Selection #define AT91C_PWMC_L7CSEL2 (0x1 << 2) // (PWMC) Comparison 2 Selection #define AT91C_PWMC_L7CSEL3 (0x1 << 3) // (PWMC) Comparison 3 Selection #define AT91C_PWMC_L7CSEL4 (0x1 << 4) // (PWMC) Comparison 4 Selection #define AT91C_PWMC_L7CSEL5 (0x1 << 5) // (PWMC) Comparison 5 Selection #define AT91C_PWMC_L7CSEL6 (0x1 << 6) // (PWMC) Comparison 6 Selection #define AT91C_PWMC_L7CSEL7 (0x1 << 7) // (PWMC) Comparison 7 Selection // -------- PWMC_WPCR : (PWMC Offset: 0xe4) PWM Write Protection Control Register -------- #define AT91C_PWMC_WPCMD (0x3 << 0) // (PWMC) Write Protection Command #define AT91C_PWMC_WPRG0 (0x1 << 2) // (PWMC) Write Protect Register Group 0 #define AT91C_PWMC_WPRG1 (0x1 << 3) // (PWMC) Write Protect Register Group 1 #define AT91C_PWMC_WPRG2 (0x1 << 4) // (PWMC) Write Protect Register Group 2 #define AT91C_PWMC_WPRG3 (0x1 << 5) // (PWMC) Write Protect Register Group 3 #define AT91C_PWMC_WPRG4 (0x1 << 6) // (PWMC) Write Protect Register Group 4 #define AT91C_PWMC_WPRG5 (0x1 << 7) // (PWMC) Write Protect Register Group 5 #define AT91C_PWMC_WPKEY (0xFFFFFF << 8) // (PWMC) Protection Password // -------- PWMC_WPVS : (PWMC Offset: 0xe8) Write Protection Status Register -------- #define AT91C_PWMC_WPSWS0 (0x1 << 0) // (PWMC) Write Protect SW Group 0 Status #define AT91C_PWMC_WPSWS1 (0x1 << 1) // (PWMC) Write Protect SW Group 1 Status #define AT91C_PWMC_WPSWS2 (0x1 << 2) // (PWMC) Write Protect SW Group 2 Status #define AT91C_PWMC_WPSWS3 (0x1 << 3) // (PWMC) Write Protect SW Group 3 Status #define AT91C_PWMC_WPSWS4 (0x1 << 4) // (PWMC) Write Protect SW Group 4 Status #define AT91C_PWMC_WPSWS5 (0x1 << 5) // (PWMC) Write Protect SW Group 5 Status #define AT91C_PWMC_WPVS (0x1 << 7) // (PWMC) Write Protection Enable #define AT91C_PWMC_WPHWS0 (0x1 << 8) // (PWMC) Write Protect HW Group 0 Status #define AT91C_PWMC_WPHWS1 (0x1 << 9) // (PWMC) Write Protect HW Group 1 Status #define AT91C_PWMC_WPHWS2 (0x1 << 10) // (PWMC) Write Protect HW Group 2 Status #define AT91C_PWMC_WPHWS3 (0x1 << 11) // (PWMC) Write Protect HW Group 3 Status #define AT91C_PWMC_WPHWS4 (0x1 << 12) // (PWMC) Write Protect HW Group 4 Status #define AT91C_PWMC_WPHWS5 (0x1 << 13) // (PWMC) Write Protect HW Group 5 Status #define AT91C_PWMC_WPVSRC (0xFFFF << 16) // (PWMC) Write Protection Violation Source // -------- PWMC_CMP0V : (PWMC Offset: 0x130) PWM Comparison Value 0 Register -------- #define AT91C_PWMC_CV (0xFFFFFF << 0) // (PWMC) PWM Comparison Value 0. #define AT91C_PWMC_CVM (0x1 << 24) // (PWMC) Comparison Value 0 Mode. // -------- PWMC_CMP0VUPD : (PWMC Offset: 0x134) PWM Comparison Value 0 Update Register -------- #define AT91C_PWMC_CVUPD (0xFFFFFF << 0) // (PWMC) PWM Comparison Value Update. #define AT91C_PWMC_CVMUPD (0x1 << 24) // (PWMC) Comparison Value Update Mode. // -------- PWMC_CMP0M : (PWMC Offset: 0x138) PWM Comparison 0 Mode Register -------- #define AT91C_PWMC_CEN (0x1 << 0) // (PWMC) Comparison Enable. #define AT91C_PWMC_CTR (0xF << 4) // (PWMC) PWM Comparison Trigger. #define AT91C_PWMC_CPR (0xF << 8) // (PWMC) PWM Comparison Period. #define AT91C_PWMC_CPRCNT (0xF << 12) // (PWMC) PWM Comparison Period Counter. #define AT91C_PWMC_CUPR (0xF << 16) // (PWMC) PWM Comparison Update Period. #define AT91C_PWMC_CUPRCNT (0xF << 20) // (PWMC) PWM Comparison Update Period Counter. // -------- PWMC_CMP0MUPD : (PWMC Offset: 0x13c) PWM Comparison 0 Mode Update Register -------- #define AT91C_PWMC_CENUPD (0x1 << 0) // (PWMC) Comparison Enable Update. #define AT91C_PWMC_CTRUPD (0xF << 4) // (PWMC) PWM Comparison Trigger Update. #define AT91C_PWMC_CPRUPD (0xF << 8) // (PWMC) PWM Comparison Period Update. #define AT91C_PWMC_CUPRUPD (0xF << 16) // (PWMC) PWM Comparison Update Period Update. // -------- PWMC_CMP1V : (PWMC Offset: 0x140) PWM Comparison Value 1 Register -------- // -------- PWMC_CMP1VUPD : (PWMC Offset: 0x144) PWM Comparison Value 1 Update Register -------- // -------- PWMC_CMP1M : (PWMC Offset: 0x148) PWM Comparison 1 Mode Register -------- // -------- PWMC_CMP1MUPD : (PWMC Offset: 0x14c) PWM Comparison 1 Mode Update Register -------- // -------- PWMC_CMP2V : (PWMC Offset: 0x150) PWM Comparison Value 2 Register -------- // -------- PWMC_CMP2VUPD : (PWMC Offset: 0x154) PWM Comparison Value 2 Update Register -------- // -------- PWMC_CMP2M : (PWMC Offset: 0x158) PWM Comparison 2 Mode Register -------- // -------- PWMC_CMP2MUPD : (PWMC Offset: 0x15c) PWM Comparison 2 Mode Update Register -------- // -------- PWMC_CMP3V : (PWMC Offset: 0x160) PWM Comparison Value 3 Register -------- // -------- PWMC_CMP3VUPD : (PWMC Offset: 0x164) PWM Comparison Value 3 Update Register -------- // -------- PWMC_CMP3M : (PWMC Offset: 0x168) PWM Comparison 3 Mode Register -------- // -------- PWMC_CMP3MUPD : (PWMC Offset: 0x16c) PWM Comparison 3 Mode Update Register -------- // -------- PWMC_CMP4V : (PWMC Offset: 0x170) PWM Comparison Value 4 Register -------- // -------- PWMC_CMP4VUPD : (PWMC Offset: 0x174) PWM Comparison Value 4 Update Register -------- // -------- PWMC_CMP4M : (PWMC Offset: 0x178) PWM Comparison 4 Mode Register -------- // -------- PWMC_CMP4MUPD : (PWMC Offset: 0x17c) PWM Comparison 4 Mode Update Register -------- // -------- PWMC_CMP5V : (PWMC Offset: 0x180) PWM Comparison Value 5 Register -------- // -------- PWMC_CMP5VUPD : (PWMC Offset: 0x184) PWM Comparison Value 5 Update Register -------- // -------- PWMC_CMP5M : (PWMC Offset: 0x188) PWM Comparison 5 Mode Register -------- // -------- PWMC_CMP5MUPD : (PWMC Offset: 0x18c) PWM Comparison 5 Mode Update Register -------- // -------- PWMC_CMP6V : (PWMC Offset: 0x190) PWM Comparison Value 6 Register -------- // -------- PWMC_CMP6VUPD : (PWMC Offset: 0x194) PWM Comparison Value 6 Update Register -------- // -------- PWMC_CMP6M : (PWMC Offset: 0x198) PWM Comparison 6 Mode Register -------- // -------- PWMC_CMP6MUPD : (PWMC Offset: 0x19c) PWM Comparison 6 Mode Update Register -------- // -------- PWMC_CMP7V : (PWMC Offset: 0x1a0) PWM Comparison Value 7 Register -------- // -------- PWMC_CMP7VUPD : (PWMC Offset: 0x1a4) PWM Comparison Value 7 Update Register -------- // -------- PWMC_CMP7M : (PWMC Offset: 0x1a8) PWM Comparison 7 Mode Register -------- // -------- PWMC_CMP7MUPD : (PWMC Offset: 0x1ac) PWM Comparison 7 Mode Update Register -------- // ***************************************************************************** // SOFTWARE API DEFINITION FOR Serial Parallel Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_SPI { AT91_REG SPI_CR; // Control Register AT91_REG SPI_MR; // Mode Register AT91_REG SPI_RDR; // Receive Data Register AT91_REG SPI_TDR; // Transmit Data Register AT91_REG SPI_SR; // Status Register AT91_REG SPI_IER; // Interrupt Enable Register AT91_REG SPI_IDR; // Interrupt Disable Register AT91_REG SPI_IMR; // Interrupt Mask Register AT91_REG Reserved0[4]; // AT91_REG SPI_CSR[4]; // Chip Select Register AT91_REG Reserved1[43]; // AT91_REG SPI_ADDRSIZE; // SPI ADDRSIZE REGISTER AT91_REG SPI_IPNAME1; // SPI IPNAME1 REGISTER AT91_REG SPI_IPNAME2; // SPI IPNAME2 REGISTER AT91_REG SPI_FEATURES; // SPI FEATURES REGISTER AT91_REG SPI_VER; // Version Register } AT91S_SPI, *AT91PS_SPI; #else #define SPI_CR (AT91_CAST(AT91_REG *) 0x00000000) // (SPI_CR) Control Register #define SPI_MR (AT91_CAST(AT91_REG *) 0x00000004) // (SPI_MR) Mode Register #define SPI_RDR (AT91_CAST(AT91_REG *) 0x00000008) // (SPI_RDR) Receive Data Register #define SPI_TDR (AT91_CAST(AT91_REG *) 0x0000000C) // (SPI_TDR) Transmit Data Register #define SPI_SR (AT91_CAST(AT91_REG *) 0x00000010) // (SPI_SR) Status Register #define SPI_IER (AT91_CAST(AT91_REG *) 0x00000014) // (SPI_IER) Interrupt Enable Register #define SPI_IDR (AT91_CAST(AT91_REG *) 0x00000018) // (SPI_IDR) Interrupt Disable Register #define SPI_IMR (AT91_CAST(AT91_REG *) 0x0000001C) // (SPI_IMR) Interrupt Mask Register #define SPI_CSR (AT91_CAST(AT91_REG *) 0x00000030) // (SPI_CSR) Chip Select Register #define SPI_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (SPI_ADDRSIZE) SPI ADDRSIZE REGISTER #define SPI_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (SPI_IPNAME1) SPI IPNAME1 REGISTER #define SPI_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (SPI_IPNAME2) SPI IPNAME2 REGISTER #define SPI_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (SPI_FEATURES) SPI FEATURES REGISTER #define SPI_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (SPI_VER) Version Register #endif // -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- #define AT91C_SPI_SPIEN (0x1 << 0) // (SPI) SPI Enable #define AT91C_SPI_SPIDIS (0x1 << 1) // (SPI) SPI Disable #define AT91C_SPI_SWRST (0x1 << 7) // (SPI) SPI Software reset #define AT91C_SPI_LASTXFER (0x1 << 24) // (SPI) SPI Last Transfer // -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- #define AT91C_SPI_MSTR (0x1 << 0) // (SPI) Master/Slave Mode #define AT91C_SPI_PS (0x1 << 1) // (SPI) Peripheral Select #define AT91C_SPI_PS_FIXED (0x0 << 1) // (SPI) Fixed Peripheral Select #define AT91C_SPI_PS_VARIABLE (0x1 << 1) // (SPI) Variable Peripheral Select #define AT91C_SPI_PCSDEC (0x1 << 2) // (SPI) Chip Select Decode #define AT91C_SPI_FDIV (0x1 << 3) // (SPI) Clock Selection #define AT91C_SPI_MODFDIS (0x1 << 4) // (SPI) Mode Fault Detection #define AT91C_SPI_LLB (0x1 << 7) // (SPI) Clock Selection #define AT91C_SPI_PCS (0xF << 16) // (SPI) Peripheral Chip Select #define AT91C_SPI_DLYBCS (0xFF << 24) // (SPI) Delay Between Chip Selects // -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- #define AT91C_SPI_RD (0xFFFF << 0) // (SPI) Receive Data #define AT91C_SPI_RPCS (0xF << 16) // (SPI) Peripheral Chip Select Status // -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- #define AT91C_SPI_TD (0xFFFF << 0) // (SPI) Transmit Data #define AT91C_SPI_TPCS (0xF << 16) // (SPI) Peripheral Chip Select Status // -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- #define AT91C_SPI_RDRF (0x1 << 0) // (SPI) Receive Data Register Full #define AT91C_SPI_TDRE (0x1 << 1) // (SPI) Transmit Data Register Empty #define AT91C_SPI_MODF (0x1 << 2) // (SPI) Mode Fault Error #define AT91C_SPI_OVRES (0x1 << 3) // (SPI) Overrun Error Status #define AT91C_SPI_ENDRX (0x1 << 4) // (SPI) End of Receiver Transfer #define AT91C_SPI_ENDTX (0x1 << 5) // (SPI) End of Receiver Transfer #define AT91C_SPI_RXBUFF (0x1 << 6) // (SPI) RXBUFF Interrupt #define AT91C_SPI_TXBUFE (0x1 << 7) // (SPI) TXBUFE Interrupt #define AT91C_SPI_NSSR (0x1 << 8) // (SPI) NSSR Interrupt #define AT91C_SPI_TXEMPTY (0x1 << 9) // (SPI) TXEMPTY Interrupt #define AT91C_SPI_SPIENS (0x1 << 16) // (SPI) Enable Status // -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- // -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- // -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- // -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- #define AT91C_SPI_CPOL (0x1 << 0) // (SPI) Clock Polarity #define AT91C_SPI_NCPHA (0x1 << 1) // (SPI) Clock Phase #define AT91C_SPI_CSNAAT (0x1 << 2) // (SPI) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) #define AT91C_SPI_CSAAT (0x1 << 3) // (SPI) Chip Select Active After Transfer #define AT91C_SPI_BITS (0xF << 4) // (SPI) Bits Per Transfer #define AT91C_SPI_BITS_8 (0x0 << 4) // (SPI) 8 Bits Per transfer #define AT91C_SPI_BITS_9 (0x1 << 4) // (SPI) 9 Bits Per transfer #define AT91C_SPI_BITS_10 (0x2 << 4) // (SPI) 10 Bits Per transfer #define AT91C_SPI_BITS_11 (0x3 << 4) // (SPI) 11 Bits Per transfer #define AT91C_SPI_BITS_12 (0x4 << 4) // (SPI) 12 Bits Per transfer #define AT91C_SPI_BITS_13 (0x5 << 4) // (SPI) 13 Bits Per transfer #define AT91C_SPI_BITS_14 (0x6 << 4) // (SPI) 14 Bits Per transfer #define AT91C_SPI_BITS_15 (0x7 << 4) // (SPI) 15 Bits Per transfer #define AT91C_SPI_BITS_16 (0x8 << 4) // (SPI) 16 Bits Per transfer #define AT91C_SPI_SCBR (0xFF << 8) // (SPI) Serial Clock Baud Rate #define AT91C_SPI_DLYBS (0xFF << 16) // (SPI) Serial Clock Baud Rate #define AT91C_SPI_DLYBCT (0xFF << 24) // (SPI) Delay Between Consecutive Transfers // ***************************************************************************** // SOFTWARE API DEFINITION FOR UDPHS Enpoint FIFO data register // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_UDPHS_EPTFIFO { AT91_REG UDPHS_READEPT0[16384]; // FIFO Endpoint Data Register 0 AT91_REG UDPHS_READEPT1[16384]; // FIFO Endpoint Data Register 1 AT91_REG UDPHS_READEPT2[16384]; // FIFO Endpoint Data Register 2 AT91_REG UDPHS_READEPT3[16384]; // FIFO Endpoint Data Register 3 AT91_REG UDPHS_READEPT4[16384]; // FIFO Endpoint Data Register 4 AT91_REG UDPHS_READEPT5[16384]; // FIFO Endpoint Data Register 5 AT91_REG UDPHS_READEPT6[16384]; // FIFO Endpoint Data Register 6 } AT91S_UDPHS_EPTFIFO, *AT91PS_UDPHS_EPTFIFO; #else #define UDPHS_READEPT0 (AT91_CAST(AT91_REG *) 0x00000000) // (UDPHS_READEPT0) FIFO Endpoint Data Register 0 #define UDPHS_READEPT1 (AT91_CAST(AT91_REG *) 0x00010000) // (UDPHS_READEPT1) FIFO Endpoint Data Register 1 #define UDPHS_READEPT2 (AT91_CAST(AT91_REG *) 0x00020000) // (UDPHS_READEPT2) FIFO Endpoint Data Register 2 #define UDPHS_READEPT3 (AT91_CAST(AT91_REG *) 0x00030000) // (UDPHS_READEPT3) FIFO Endpoint Data Register 3 #define UDPHS_READEPT4 (AT91_CAST(AT91_REG *) 0x00040000) // (UDPHS_READEPT4) FIFO Endpoint Data Register 4 #define UDPHS_READEPT5 (AT91_CAST(AT91_REG *) 0x00050000) // (UDPHS_READEPT5) FIFO Endpoint Data Register 5 #define UDPHS_READEPT6 (AT91_CAST(AT91_REG *) 0x00060000) // (UDPHS_READEPT6) FIFO Endpoint Data Register 6 #endif // ***************************************************************************** // SOFTWARE API DEFINITION FOR UDPHS Endpoint struct // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_UDPHS_EPT { AT91_REG UDPHS_EPTCFG; // UDPHS Endpoint Config Register AT91_REG UDPHS_EPTCTLENB; // UDPHS Endpoint Control Enable Register AT91_REG UDPHS_EPTCTLDIS; // UDPHS Endpoint Control Disable Register AT91_REG UDPHS_EPTCTL; // UDPHS Endpoint Control Register AT91_REG Reserved0[1]; // AT91_REG UDPHS_EPTSETSTA; // UDPHS Endpoint Set Status Register AT91_REG UDPHS_EPTCLRSTA; // UDPHS Endpoint Clear Status Register AT91_REG UDPHS_EPTSTA; // UDPHS Endpoint Status Register } AT91S_UDPHS_EPT, *AT91PS_UDPHS_EPT; #else #define UDPHS_EPTCFG (AT91_CAST(AT91_REG *) 0x00000000) // (UDPHS_EPTCFG) UDPHS Endpoint Config Register #define UDPHS_EPTCTLENB (AT91_CAST(AT91_REG *) 0x00000004) // (UDPHS_EPTCTLENB) UDPHS Endpoint Control Enable Register #define UDPHS_EPTCTLDIS (AT91_CAST(AT91_REG *) 0x00000008) // (UDPHS_EPTCTLDIS) UDPHS Endpoint Control Disable Register #define UDPHS_EPTCTL (AT91_CAST(AT91_REG *) 0x0000000C) // (UDPHS_EPTCTL) UDPHS Endpoint Control Register #define UDPHS_EPTSETSTA (AT91_CAST(AT91_REG *) 0x00000014) // (UDPHS_EPTSETSTA) UDPHS Endpoint Set Status Register #define UDPHS_EPTCLRSTA (AT91_CAST(AT91_REG *) 0x00000018) // (UDPHS_EPTCLRSTA) UDPHS Endpoint Clear Status Register #define UDPHS_EPTSTA (AT91_CAST(AT91_REG *) 0x0000001C) // (UDPHS_EPTSTA) UDPHS Endpoint Status Register #endif // -------- UDPHS_EPTCFG : (UDPHS_EPT Offset: 0x0) UDPHS Endpoint Config Register -------- #define AT91C_UDPHS_EPT_SIZE (0x7 << 0) // (UDPHS_EPT) Endpoint Size #define AT91C_UDPHS_EPT_SIZE_8 (0x0) // (UDPHS_EPT) 8 bytes #define AT91C_UDPHS_EPT_SIZE_16 (0x1) // (UDPHS_EPT) 16 bytes #define AT91C_UDPHS_EPT_SIZE_32 (0x2) // (UDPHS_EPT) 32 bytes #define AT91C_UDPHS_EPT_SIZE_64 (0x3) // (UDPHS_EPT) 64 bytes #define AT91C_UDPHS_EPT_SIZE_128 (0x4) // (UDPHS_EPT) 128 bytes #define AT91C_UDPHS_EPT_SIZE_256 (0x5) // (UDPHS_EPT) 256 bytes (if possible) #define AT91C_UDPHS_EPT_SIZE_512 (0x6) // (UDPHS_EPT) 512 bytes (if possible) #define AT91C_UDPHS_EPT_SIZE_1024 (0x7) // (UDPHS_EPT) 1024 bytes (if possible) #define AT91C_UDPHS_EPT_DIR (0x1 << 3) // (UDPHS_EPT) Endpoint Direction 0:OUT, 1:IN #define AT91C_UDPHS_EPT_DIR_OUT (0x0 << 3) // (UDPHS_EPT) Direction OUT #define AT91C_UDPHS_EPT_DIR_IN (0x1 << 3) // (UDPHS_EPT) Direction IN #define AT91C_UDPHS_EPT_TYPE (0x3 << 4) // (UDPHS_EPT) Endpoint Type #define AT91C_UDPHS_EPT_TYPE_CTL_EPT (0x0 << 4) // (UDPHS_EPT) Control endpoint #define AT91C_UDPHS_EPT_TYPE_ISO_EPT (0x1 << 4) // (UDPHS_EPT) Isochronous endpoint #define AT91C_UDPHS_EPT_TYPE_BUL_EPT (0x2 << 4) // (UDPHS_EPT) Bulk endpoint #define AT91C_UDPHS_EPT_TYPE_INT_EPT (0x3 << 4) // (UDPHS_EPT) Interrupt endpoint #define AT91C_UDPHS_BK_NUMBER (0x3 << 6) // (UDPHS_EPT) Number of Banks #define AT91C_UDPHS_BK_NUMBER_0 (0x0 << 6) // (UDPHS_EPT) Zero Bank, the EndPoint is not mapped in memory #define AT91C_UDPHS_BK_NUMBER_1 (0x1 << 6) // (UDPHS_EPT) One Bank (Bank0) #define AT91C_UDPHS_BK_NUMBER_2 (0x2 << 6) // (UDPHS_EPT) Double bank (Ping-Pong : Bank0 / Bank1) #define AT91C_UDPHS_BK_NUMBER_3 (0x3 << 6) // (UDPHS_EPT) Triple Bank (Bank0 / Bank1 / Bank2) (if possible) #define AT91C_UDPHS_NB_TRANS (0x3 << 8) // (UDPHS_EPT) Number Of Transaction per Micro-Frame (High-Bandwidth iso only) #define AT91C_UDPHS_EPT_MAPD (0x1 << 31) // (UDPHS_EPT) Endpoint Mapped (read only // -------- UDPHS_EPTCTLENB : (UDPHS_EPT Offset: 0x4) UDPHS Endpoint Control Enable Register -------- #define AT91C_UDPHS_EPT_ENABL (0x1 << 0) // (UDPHS_EPT) Endpoint Enable #define AT91C_UDPHS_AUTO_VALID (0x1 << 1) // (UDPHS_EPT) Packet Auto-Valid Enable/Disable #define AT91C_UDPHS_INTDIS_DMA (0x1 << 3) // (UDPHS_EPT) Endpoint Interrupts DMA Request Enable/Disable #define AT91C_UDPHS_NYET_DIS (0x1 << 4) // (UDPHS_EPT) NYET Enable/Disable #define AT91C_UDPHS_DATAX_RX (0x1 << 6) // (UDPHS_EPT) DATAx Interrupt Enable/Disable #define AT91C_UDPHS_MDATA_RX (0x1 << 7) // (UDPHS_EPT) MDATA Interrupt Enabled/Disable #define AT91C_UDPHS_ERR_OVFLW (0x1 << 8) // (UDPHS_EPT) OverFlow Error Interrupt Enable/Disable/Status #define AT91C_UDPHS_RX_BK_RDY (0x1 << 9) // (UDPHS_EPT) Received OUT Data #define AT91C_UDPHS_TX_COMPLT (0x1 << 10) // (UDPHS_EPT) Transmitted IN Data Complete Interrupt Enable/Disable or Transmitted IN Data Complete (clear) #define AT91C_UDPHS_ERR_TRANS (0x1 << 11) // (UDPHS_EPT) Transaction Error Interrupt Enable/Disable #define AT91C_UDPHS_TX_PK_RDY (0x1 << 11) // (UDPHS_EPT) TX Packet Ready Interrupt Enable/Disable #define AT91C_UDPHS_RX_SETUP (0x1 << 12) // (UDPHS_EPT) Received SETUP Interrupt Enable/Disable #define AT91C_UDPHS_ERR_FL_ISO (0x1 << 12) // (UDPHS_EPT) Error Flow Clear/Interrupt Enable/Disable #define AT91C_UDPHS_STALL_SNT (0x1 << 13) // (UDPHS_EPT) Stall Sent Clear #define AT91C_UDPHS_ERR_CRISO (0x1 << 13) // (UDPHS_EPT) CRC error / Error NB Trans / Interrupt Enable/Disable #define AT91C_UDPHS_NAK_IN (0x1 << 14) // (UDPHS_EPT) NAKIN ERROR FLUSH / Clear / Interrupt Enable/Disable #define AT91C_UDPHS_NAK_OUT (0x1 << 15) // (UDPHS_EPT) NAKOUT / Clear / Interrupt Enable/Disable #define AT91C_UDPHS_BUSY_BANK (0x1 << 18) // (UDPHS_EPT) Busy Bank Interrupt Enable/Disable #define AT91C_UDPHS_SHRT_PCKT (0x1 << 31) // (UDPHS_EPT) Short Packet / Interrupt Enable/Disable // -------- UDPHS_EPTCTLDIS : (UDPHS_EPT Offset: 0x8) UDPHS Endpoint Control Disable Register -------- #define AT91C_UDPHS_EPT_DISABL (0x1 << 0) // (UDPHS_EPT) Endpoint Disable // -------- UDPHS_EPTCTL : (UDPHS_EPT Offset: 0xc) UDPHS Endpoint Control Register -------- // -------- UDPHS_EPTSETSTA : (UDPHS_EPT Offset: 0x14) UDPHS Endpoint Set Status Register -------- #define AT91C_UDPHS_FRCESTALL (0x1 << 5) // (UDPHS_EPT) Stall Handshake Request Set/Clear/Status #define AT91C_UDPHS_KILL_BANK (0x1 << 9) // (UDPHS_EPT) KILL Bank // -------- UDPHS_EPTCLRSTA : (UDPHS_EPT Offset: 0x18) UDPHS Endpoint Clear Status Register -------- #define AT91C_UDPHS_TOGGLESQ (0x1 << 6) // (UDPHS_EPT) Data Toggle Clear // -------- UDPHS_EPTSTA : (UDPHS_EPT Offset: 0x1c) UDPHS Endpoint Status Register -------- #define AT91C_UDPHS_TOGGLESQ_STA (0x3 << 6) // (UDPHS_EPT) Toggle Sequencing #define AT91C_UDPHS_TOGGLESQ_STA_00 (0x0 << 6) // (UDPHS_EPT) Data0 #define AT91C_UDPHS_TOGGLESQ_STA_01 (0x1 << 6) // (UDPHS_EPT) Data1 #define AT91C_UDPHS_TOGGLESQ_STA_10 (0x2 << 6) // (UDPHS_EPT) Data2 (only for High-Bandwidth Isochronous EndPoint) #define AT91C_UDPHS_TOGGLESQ_STA_11 (0x3 << 6) // (UDPHS_EPT) MData (only for High-Bandwidth Isochronous EndPoint) #define AT91C_UDPHS_CONTROL_DIR (0x3 << 16) // (UDPHS_EPT) #define AT91C_UDPHS_CONTROL_DIR_00 (0x0 << 16) // (UDPHS_EPT) Bank 0 #define AT91C_UDPHS_CONTROL_DIR_01 (0x1 << 16) // (UDPHS_EPT) Bank 1 #define AT91C_UDPHS_CONTROL_DIR_10 (0x2 << 16) // (UDPHS_EPT) Bank 2 #define AT91C_UDPHS_CONTROL_DIR_11 (0x3 << 16) // (UDPHS_EPT) Invalid #define AT91C_UDPHS_CURRENT_BANK (0x3 << 16) // (UDPHS_EPT) #define AT91C_UDPHS_CURRENT_BANK_00 (0x0 << 16) // (UDPHS_EPT) Bank 0 #define AT91C_UDPHS_CURRENT_BANK_01 (0x1 << 16) // (UDPHS_EPT) Bank 1 #define AT91C_UDPHS_CURRENT_BANK_10 (0x2 << 16) // (UDPHS_EPT) Bank 2 #define AT91C_UDPHS_CURRENT_BANK_11 (0x3 << 16) // (UDPHS_EPT) Invalid #define AT91C_UDPHS_BUSY_BANK_STA (0x3 << 18) // (UDPHS_EPT) Busy Bank Number #define AT91C_UDPHS_BUSY_BANK_STA_00 (0x0 << 18) // (UDPHS_EPT) All banks are free #define AT91C_UDPHS_BUSY_BANK_STA_01 (0x1 << 18) // (UDPHS_EPT) 1 busy bank #define AT91C_UDPHS_BUSY_BANK_STA_10 (0x2 << 18) // (UDPHS_EPT) 2 busy banks #define AT91C_UDPHS_BUSY_BANK_STA_11 (0x3 << 18) // (UDPHS_EPT) 3 busy banks (if possible) #define AT91C_UDPHS_BYTE_COUNT (0x7FF << 20) // (UDPHS_EPT) UDPHS Byte Count // ***************************************************************************** // SOFTWARE API DEFINITION FOR UDPHS DMA struct // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_UDPHS_DMA { AT91_REG UDPHS_DMANXTDSC; // UDPHS DMA Channel Next Descriptor Address AT91_REG UDPHS_DMAADDRESS; // UDPHS DMA Channel Address Register AT91_REG UDPHS_DMACONTROL; // UDPHS DMA Channel Control Register AT91_REG UDPHS_DMASTATUS; // UDPHS DMA Channel Status Register } AT91S_UDPHS_DMA, *AT91PS_UDPHS_DMA; #else #define UDPHS_DMANXTDSC (AT91_CAST(AT91_REG *) 0x00000000) // (UDPHS_DMANXTDSC) UDPHS DMA Channel Next Descriptor Address #define UDPHS_DMAADDRESS (AT91_CAST(AT91_REG *) 0x00000004) // (UDPHS_DMAADDRESS) UDPHS DMA Channel Address Register #define UDPHS_DMACONTROL (AT91_CAST(AT91_REG *) 0x00000008) // (UDPHS_DMACONTROL) UDPHS DMA Channel Control Register #define UDPHS_DMASTATUS (AT91_CAST(AT91_REG *) 0x0000000C) // (UDPHS_DMASTATUS) UDPHS DMA Channel Status Register #endif // -------- UDPHS_DMANXTDSC : (UDPHS_DMA Offset: 0x0) UDPHS DMA Next Descriptor Address Register -------- #define AT91C_UDPHS_NXT_DSC_ADD (0xFFFFFFF << 4) // (UDPHS_DMA) next Channel Descriptor // -------- UDPHS_DMAADDRESS : (UDPHS_DMA Offset: 0x4) UDPHS DMA Channel Address Register -------- #define AT91C_UDPHS_BUFF_ADD (0x0 << 0) // (UDPHS_DMA) starting address of a DMA Channel transfer // -------- UDPHS_DMACONTROL : (UDPHS_DMA Offset: 0x8) UDPHS DMA Channel Control Register -------- #define AT91C_UDPHS_CHANN_ENB (0x1 << 0) // (UDPHS_DMA) Channel Enabled #define AT91C_UDPHS_LDNXT_DSC (0x1 << 1) // (UDPHS_DMA) Load Next Channel Transfer Descriptor Enable #define AT91C_UDPHS_END_TR_EN (0x1 << 2) // (UDPHS_DMA) Buffer Close Input Enable #define AT91C_UDPHS_END_B_EN (0x1 << 3) // (UDPHS_DMA) End of DMA Buffer Packet Validation #define AT91C_UDPHS_END_TR_IT (0x1 << 4) // (UDPHS_DMA) End Of Transfer Interrupt Enable #define AT91C_UDPHS_END_BUFFIT (0x1 << 5) // (UDPHS_DMA) End Of Channel Buffer Interrupt Enable #define AT91C_UDPHS_DESC_LD_IT (0x1 << 6) // (UDPHS_DMA) Descriptor Loaded Interrupt Enable #define AT91C_UDPHS_BURST_LCK (0x1 << 7) // (UDPHS_DMA) Burst Lock Enable #define AT91C_UDPHS_BUFF_LENGTH (0xFFFF << 16) // (UDPHS_DMA) Buffer Byte Length (write only) // -------- UDPHS_DMASTATUS : (UDPHS_DMA Offset: 0xc) UDPHS DMA Channelx Status Register -------- #define AT91C_UDPHS_CHANN_ACT (0x1 << 1) // (UDPHS_DMA) #define AT91C_UDPHS_END_TR_ST (0x1 << 4) // (UDPHS_DMA) #define AT91C_UDPHS_END_BF_ST (0x1 << 5) // (UDPHS_DMA) #define AT91C_UDPHS_DESC_LDST (0x1 << 6) // (UDPHS_DMA) #define AT91C_UDPHS_BUFF_COUNT (0xFFFF << 16) // (UDPHS_DMA) // ***************************************************************************** // SOFTWARE API DEFINITION FOR UDPHS High Speed Device Interface // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_UDPHS { AT91_REG UDPHS_CTRL; // UDPHS Control Register AT91_REG UDPHS_FNUM; // UDPHS Frame Number Register AT91_REG Reserved0[2]; // AT91_REG UDPHS_IEN; // UDPHS Interrupt Enable Register AT91_REG UDPHS_INTSTA; // UDPHS Interrupt Status Register AT91_REG UDPHS_CLRINT; // UDPHS Clear Interrupt Register AT91_REG UDPHS_EPTRST; // UDPHS Endpoints Reset Register AT91_REG Reserved1[44]; // AT91_REG UDPHS_TSTSOFCNT; // UDPHS Test SOF Counter Register AT91_REG UDPHS_TSTCNTA; // UDPHS Test A Counter Register AT91_REG UDPHS_TSTCNTB; // UDPHS Test B Counter Register AT91_REG UDPHS_TSTMODREG; // UDPHS Test Mode Register AT91_REG UDPHS_TST; // UDPHS Test Register AT91_REG Reserved2[2]; // AT91_REG UDPHS_RIPPADDRSIZE; // UDPHS PADDRSIZE Register AT91_REG UDPHS_RIPNAME1; // UDPHS Name1 Register AT91_REG UDPHS_RIPNAME2; // UDPHS Name2 Register AT91_REG UDPHS_IPFEATURES; // UDPHS Features Register AT91_REG UDPHS_IPVERSION; // UDPHS Version Register AT91S_UDPHS_EPT UDPHS_EPT[7]; // UDPHS Endpoint struct AT91_REG Reserved3[72]; // AT91S_UDPHS_DMA UDPHS_DMA[6]; // UDPHS DMA channel struct (not use [0]) } AT91S_UDPHS, *AT91PS_UDPHS; #else #define UDPHS_CTRL (AT91_CAST(AT91_REG *) 0x00000000) // (UDPHS_CTRL) UDPHS Control Register #define UDPHS_FNUM (AT91_CAST(AT91_REG *) 0x00000004) // (UDPHS_FNUM) UDPHS Frame Number Register #define UDPHS_IEN (AT91_CAST(AT91_REG *) 0x00000010) // (UDPHS_IEN) UDPHS Interrupt Enable Register #define UDPHS_INTSTA (AT91_CAST(AT91_REG *) 0x00000014) // (UDPHS_INTSTA) UDPHS Interrupt Status Register #define UDPHS_CLRINT (AT91_CAST(AT91_REG *) 0x00000018) // (UDPHS_CLRINT) UDPHS Clear Interrupt Register #define UDPHS_EPTRST (AT91_CAST(AT91_REG *) 0x0000001C) // (UDPHS_EPTRST) UDPHS Endpoints Reset Register #define UDPHS_TSTSOFCNT (AT91_CAST(AT91_REG *) 0x000000D0) // (UDPHS_TSTSOFCNT) UDPHS Test SOF Counter Register #define UDPHS_TSTCNTA (AT91_CAST(AT91_REG *) 0x000000D4) // (UDPHS_TSTCNTA) UDPHS Test A Counter Register #define UDPHS_TSTCNTB (AT91_CAST(AT91_REG *) 0x000000D8) // (UDPHS_TSTCNTB) UDPHS Test B Counter Register #define UDPHS_TSTMODREG (AT91_CAST(AT91_REG *) 0x000000DC) // (UDPHS_TSTMODREG) UDPHS Test Mode Register #define UDPHS_TST (AT91_CAST(AT91_REG *) 0x000000E0) // (UDPHS_TST) UDPHS Test Register #define UDPHS_RIPPADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (UDPHS_RIPPADDRSIZE) UDPHS PADDRSIZE Register #define UDPHS_RIPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (UDPHS_RIPNAME1) UDPHS Name1 Register #define UDPHS_RIPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (UDPHS_RIPNAME2) UDPHS Name2 Register #define UDPHS_IPFEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (UDPHS_IPFEATURES) UDPHS Features Register #define UDPHS_IPVERSION (AT91_CAST(AT91_REG *) 0x000000FC) // (UDPHS_IPVERSION) UDPHS Version Register #endif // -------- UDPHS_CTRL : (UDPHS Offset: 0x0) UDPHS Control Register -------- #define AT91C_UDPHS_DEV_ADDR (0x7F << 0) // (UDPHS) UDPHS Address #define AT91C_UDPHS_FADDR_EN (0x1 << 7) // (UDPHS) Function Address Enable #define AT91C_UDPHS_EN_UDPHS (0x1 << 8) // (UDPHS) UDPHS Enable #define AT91C_UDPHS_DETACH (0x1 << 9) // (UDPHS) Detach Command #define AT91C_UDPHS_REWAKEUP (0x1 << 10) // (UDPHS) Send Remote Wake Up #define AT91C_UDPHS_PULLD_DIS (0x1 << 11) // (UDPHS) PullDown Disable // -------- UDPHS_FNUM : (UDPHS Offset: 0x4) UDPHS Frame Number Register -------- #define AT91C_UDPHS_MICRO_FRAME_NUM (0x7 << 0) // (UDPHS) Micro Frame Number #define AT91C_UDPHS_FRAME_NUMBER (0x7FF << 3) // (UDPHS) Frame Number as defined in the Packet Field Formats #define AT91C_UDPHS_FNUM_ERR (0x1 << 31) // (UDPHS) Frame Number CRC Error // -------- UDPHS_IEN : (UDPHS Offset: 0x10) UDPHS Interrupt Enable Register -------- #define AT91C_UDPHS_DET_SUSPD (0x1 << 1) // (UDPHS) Suspend Interrupt Enable/Clear/Status #define AT91C_UDPHS_MICRO_SOF (0x1 << 2) // (UDPHS) Micro-SOF Interrupt Enable/Clear/Status #define AT91C_UDPHS_IEN_SOF (0x1 << 3) // (UDPHS) SOF Interrupt Enable/Clear/Status #define AT91C_UDPHS_ENDRESET (0x1 << 4) // (UDPHS) End Of Reset Interrupt Enable/Clear/Status #define AT91C_UDPHS_WAKE_UP (0x1 << 5) // (UDPHS) Wake Up CPU Interrupt Enable/Clear/Status #define AT91C_UDPHS_ENDOFRSM (0x1 << 6) // (UDPHS) End Of Resume Interrupt Enable/Clear/Status #define AT91C_UDPHS_UPSTR_RES (0x1 << 7) // (UDPHS) Upstream Resume Interrupt Enable/Clear/Status #define AT91C_UDPHS_EPT_INT_0 (0x1 << 8) // (UDPHS) Endpoint 0 Interrupt Enable/Status #define AT91C_UDPHS_EPT_INT_1 (0x1 << 9) // (UDPHS) Endpoint 1 Interrupt Enable/Status #define AT91C_UDPHS_EPT_INT_2 (0x1 << 10) // (UDPHS) Endpoint 2 Interrupt Enable/Status #define AT91C_UDPHS_EPT_INT_3 (0x1 << 11) // (UDPHS) Endpoint 3 Interrupt Enable/Status #define AT91C_UDPHS_EPT_INT_4 (0x1 << 12) // (UDPHS) Endpoint 4 Interrupt Enable/Status #define AT91C_UDPHS_EPT_INT_5 (0x1 << 13) // (UDPHS) Endpoint 5 Interrupt Enable/Status #define AT91C_UDPHS_EPT_INT_6 (0x1 << 14) // (UDPHS) Endpoint 6 Interrupt Enable/Status #define AT91C_UDPHS_DMA_INT_1 (0x1 << 25) // (UDPHS) DMA Channel 1 Interrupt Enable/Status #define AT91C_UDPHS_DMA_INT_2 (0x1 << 26) // (UDPHS) DMA Channel 2 Interrupt Enable/Status #define AT91C_UDPHS_DMA_INT_3 (0x1 << 27) // (UDPHS) DMA Channel 3 Interrupt Enable/Status #define AT91C_UDPHS_DMA_INT_4 (0x1 << 28) // (UDPHS) DMA Channel 4 Interrupt Enable/Status #define AT91C_UDPHS_DMA_INT_5 (0x1 << 29) // (UDPHS) DMA Channel 5 Interrupt Enable/Status #define AT91C_UDPHS_DMA_INT_6 (0x1 << 30) // (UDPHS) DMA Channel 6 Interrupt Enable/Status // -------- UDPHS_INTSTA : (UDPHS Offset: 0x14) UDPHS Interrupt Status Register -------- #define AT91C_UDPHS_SPEED (0x1 << 0) // (UDPHS) Speed Status // -------- UDPHS_CLRINT : (UDPHS Offset: 0x18) UDPHS Clear Interrupt Register -------- // -------- UDPHS_EPTRST : (UDPHS Offset: 0x1c) UDPHS Endpoints Reset Register -------- #define AT91C_UDPHS_RST_EPT_0 (0x1 << 0) // (UDPHS) Endpoint Reset 0 #define AT91C_UDPHS_RST_EPT_1 (0x1 << 1) // (UDPHS) Endpoint Reset 1 #define AT91C_UDPHS_RST_EPT_2 (0x1 << 2) // (UDPHS) Endpoint Reset 2 #define AT91C_UDPHS_RST_EPT_3 (0x1 << 3) // (UDPHS) Endpoint Reset 3 #define AT91C_UDPHS_RST_EPT_4 (0x1 << 4) // (UDPHS) Endpoint Reset 4 #define AT91C_UDPHS_RST_EPT_5 (0x1 << 5) // (UDPHS) Endpoint Reset 5 #define AT91C_UDPHS_RST_EPT_6 (0x1 << 6) // (UDPHS) Endpoint Reset 6 // -------- UDPHS_TSTSOFCNT : (UDPHS Offset: 0xd0) UDPHS Test SOF Counter Register -------- #define AT91C_UDPHS_SOFCNTMAX (0x3 << 0) // (UDPHS) SOF Counter Max Value #define AT91C_UDPHS_SOFCTLOAD (0x1 << 7) // (UDPHS) SOF Counter Load // -------- UDPHS_TSTCNTA : (UDPHS Offset: 0xd4) UDPHS Test A Counter Register -------- #define AT91C_UDPHS_CNTAMAX (0x7FFF << 0) // (UDPHS) A Counter Max Value #define AT91C_UDPHS_CNTALOAD (0x1 << 15) // (UDPHS) A Counter Load // -------- UDPHS_TSTCNTB : (UDPHS Offset: 0xd8) UDPHS Test B Counter Register -------- #define AT91C_UDPHS_CNTBMAX (0x7FFF << 0) // (UDPHS) B Counter Max Value #define AT91C_UDPHS_CNTBLOAD (0x1 << 15) // (UDPHS) B Counter Load // -------- UDPHS_TSTMODREG : (UDPHS Offset: 0xdc) UDPHS Test Mode Register -------- #define AT91C_UDPHS_TSTMODE (0x1F << 1) // (UDPHS) UDPHS Core TestModeReg // -------- UDPHS_TST : (UDPHS Offset: 0xe0) UDPHS Test Register -------- #define AT91C_UDPHS_SPEED_CFG (0x3 << 0) // (UDPHS) Speed Configuration #define AT91C_UDPHS_SPEED_CFG_NM (0x0) // (UDPHS) Normal Mode #define AT91C_UDPHS_SPEED_CFG_RS (0x1) // (UDPHS) Reserved #define AT91C_UDPHS_SPEED_CFG_HS (0x2) // (UDPHS) Force High Speed #define AT91C_UDPHS_SPEED_CFG_FS (0x3) // (UDPHS) Force Full-Speed #define AT91C_UDPHS_TST_J (0x1 << 2) // (UDPHS) TestJMode #define AT91C_UDPHS_TST_K (0x1 << 3) // (UDPHS) TestKMode #define AT91C_UDPHS_TST_PKT (0x1 << 4) // (UDPHS) TestPacketMode #define AT91C_UDPHS_OPMODE2 (0x1 << 5) // (UDPHS) OpMode2 // -------- UDPHS_RIPPADDRSIZE : (UDPHS Offset: 0xec) UDPHS PADDRSIZE Register -------- #define AT91C_UDPHS_IPPADDRSIZE (0x0 << 0) // (UDPHS) 2^UDPHSDEV_PADDR_SIZE // -------- UDPHS_RIPNAME1 : (UDPHS Offset: 0xf0) UDPHS Name Register -------- #define AT91C_UDPHS_IPNAME1 (0x0 << 0) // (UDPHS) ASCII string HUSB // -------- UDPHS_RIPNAME2 : (UDPHS Offset: 0xf4) UDPHS Name Register -------- #define AT91C_UDPHS_IPNAME2 (0x0 << 0) // (UDPHS) ASCII string 2DEV // -------- UDPHS_IPFEATURES : (UDPHS Offset: 0xf8) UDPHS Features Register -------- #define AT91C_UDPHS_EPT_NBR_MAX (0xF << 0) // (UDPHS) Max Number of Endpoints #define AT91C_UDPHS_DMA_CHANNEL_NBR (0x7 << 4) // (UDPHS) Number of DMA Channels #define AT91C_UDPHS_DMA_B_SIZ (0x1 << 7) // (UDPHS) DMA Buffer Size #define AT91C_UDPHS_DMA_FIFO_WORD_DEPTH (0xF << 8) // (UDPHS) DMA FIFO Depth in words #define AT91C_UDPHS_FIFO_MAX_SIZE (0x7 << 12) // (UDPHS) DPRAM size #define AT91C_UDPHS_BW_DPRAM (0x1 << 15) // (UDPHS) DPRAM byte write capability #define AT91C_UDPHS_DATAB16_8 (0x1 << 16) // (UDPHS) UTMI DataBus16_8 #define AT91C_UDPHS_ISO_EPT_1 (0x1 << 17) // (UDPHS) Endpoint 1 High Bandwidth Isochronous Capability #define AT91C_UDPHS_ISO_EPT_2 (0x1 << 18) // (UDPHS) Endpoint 2 High Bandwidth Isochronous Capability #define AT91C_UDPHS_ISO_EPT_5 (0x1 << 21) // (UDPHS) Endpoint 5 High Bandwidth Isochronous Capability #define AT91C_UDPHS_ISO_EPT_6 (0x1 << 22) // (UDPHS) Endpoint 6 High Bandwidth Isochronous Capability // -------- UDPHS_IPVERSION : (UDPHS Offset: 0xfc) UDPHS Version Register -------- #define AT91C_UDPHS_VERSION_NUM (0xFFFF << 0) // (UDPHS) Give the IP version #define AT91C_UDPHS_METAL_FIX_NUM (0x7 << 16) // (UDPHS) Give the number of metal fixes // ***************************************************************************** // SOFTWARE API DEFINITION FOR HDMA Channel structure // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_HDMA_CH { AT91_REG HDMA_SADDR; // HDMA Channel Source Address Register AT91_REG HDMA_DADDR; // HDMA Channel Destination Address Register AT91_REG HDMA_DSCR; // HDMA Channel Descriptor Address Register AT91_REG HDMA_CTRLA; // HDMA Channel Control A Register AT91_REG HDMA_CTRLB; // HDMA Channel Control B Register AT91_REG HDMA_CFG; // HDMA Channel Configuration Register AT91_REG Reserved[4]; // Change for address alignment } AT91S_HDMA_CH, *AT91PS_HDMA_CH; #else #define HDMA_SADDR (AT91_CAST(AT91_REG *) 0x00000000) // (HDMA_SADDR) HDMA Channel Source Address Register #define HDMA_DADDR (AT91_CAST(AT91_REG *) 0x00000004) // (HDMA_DADDR) HDMA Channel Destination Address Register #define HDMA_DSCR (AT91_CAST(AT91_REG *) 0x00000008) // (HDMA_DSCR) HDMA Channel Descriptor Address Register #define HDMA_CTRLA (AT91_CAST(AT91_REG *) 0x0000000C) // (HDMA_CTRLA) HDMA Channel Control A Register #define HDMA_CTRLB (AT91_CAST(AT91_REG *) 0x00000010) // (HDMA_CTRLB) HDMA Channel Control B Register #define HDMA_CFG (AT91_CAST(AT91_REG *) 0x00000014) // (HDMA_CFG) HDMA Channel Configuration Register #endif // -------- HDMA_SADDR : (HDMA_CH Offset: 0x0) -------- #define AT91C_SADDR (0x0 << 0) // (HDMA_CH) // -------- HDMA_DADDR : (HDMA_CH Offset: 0x4) -------- #define AT91C_DADDR (0x0 << 0) // (HDMA_CH) // -------- HDMA_DSCR : (HDMA_CH Offset: 0x8) -------- #define AT91C_HDMA_DSCR (0x3FFFFFFF << 2) // (HDMA_CH) Buffer Transfer descriptor address. This address is word aligned. // -------- HDMA_CTRLA : (HDMA_CH Offset: 0xc) -------- #define AT91C_HDMA_BTSIZE (0xFFFF << 0) // (HDMA_CH) Buffer Transfer Size. #define AT91C_HDMA_SCSIZE (0x1 << 16) // (HDMA_CH) Source Chunk Transfer Size. #define AT91C_HDMA_SCSIZE_1 (0x0 << 16) // (HDMA_CH) 1. #define AT91C_HDMA_SCSIZE_4 (0x1 << 16) // (HDMA_CH) 4. #define AT91C_HDMA_DCSIZE (0x1 << 20) // (HDMA_CH) Destination Chunk Transfer Size #define AT91C_HDMA_DCSIZE_1 (0x0 << 20) // (HDMA_CH) 1. #define AT91C_HDMA_DCSIZE_4 (0x1 << 20) // (HDMA_CH) 4. #define AT91C_HDMA_SRC_WIDTH (0x3 << 24) // (HDMA_CH) Source Single Transfer Size #define AT91C_HDMA_SRC_WIDTH_BYTE (0x0 << 24) // (HDMA_CH) BYTE. #define AT91C_HDMA_SRC_WIDTH_HALFWORD (0x1 << 24) // (HDMA_CH) HALF-WORD. #define AT91C_HDMA_SRC_WIDTH_WORD (0x2 << 24) // (HDMA_CH) WORD. #define AT91C_HDMA_DST_WIDTH (0x3 << 28) // (HDMA_CH) Destination Single Transfer Size #define AT91C_HDMA_DST_WIDTH_BYTE (0x0 << 28) // (HDMA_CH) BYTE. #define AT91C_HDMA_DST_WIDTH_HALFWORD (0x1 << 28) // (HDMA_CH) HALF-WORD. #define AT91C_HDMA_DST_WIDTH_WORD (0x2 << 28) // (HDMA_CH) WORD. #define AT91C_HDMA_DONE (0x1 << 31) // (HDMA_CH) // -------- HDMA_CTRLB : (HDMA_CH Offset: 0x10) -------- #define AT91C_HDMA_SRC_DSCR (0x1 << 16) // (HDMA_CH) Source Buffer Descriptor Fetch operation #define AT91C_HDMA_SRC_DSCR_FETCH_FROM_MEM (0x0 << 16) // (HDMA_CH) Source address is updated when the descriptor is fetched from the memory. #define AT91C_HDMA_SRC_DSCR_FETCH_DISABLE (0x1 << 16) // (HDMA_CH) Buffer Descriptor Fetch operation is disabled for the Source. #define AT91C_HDMA_DST_DSCR (0x1 << 20) // (HDMA_CH) Destination Buffer Descriptor operation #define AT91C_HDMA_DST_DSCR_FETCH_FROM_MEM (0x0 << 20) // (HDMA_CH) Destination address is updated when the descriptor is fetched from the memory. #define AT91C_HDMA_DST_DSCR_FETCH_DISABLE (0x1 << 20) // (HDMA_CH) Buffer Descriptor Fetch operation is disabled for the destination. #define AT91C_HDMA_FC (0x7 << 21) // (HDMA_CH) This field defines which devices controls the size of the buffer transfer, also referred as to the Flow Controller. #define AT91C_HDMA_FC_MEM2MEM (0x0 << 21) // (HDMA_CH) Memory-to-Memory (DMA Controller). #define AT91C_HDMA_FC_MEM2PER (0x1 << 21) // (HDMA_CH) Memory-to-Peripheral (DMA Controller). #define AT91C_HDMA_FC_PER2MEM (0x2 << 21) // (HDMA_CH) Peripheral-to-Memory (DMA Controller). #define AT91C_HDMA_FC_PER2PER (0x3 << 21) // (HDMA_CH) Peripheral-to-Peripheral (DMA Controller). #define AT91C_HDMA_SRC_ADDRESS_MODE (0x3 << 24) // (HDMA_CH) Type of addressing mode #define AT91C_HDMA_SRC_ADDRESS_MODE_INCR (0x0 << 24) // (HDMA_CH) Incrementing Mode. #define AT91C_HDMA_SRC_ADDRESS_MODE_DECR (0x1 << 24) // (HDMA_CH) Decrementing Mode. #define AT91C_HDMA_SRC_ADDRESS_MODE_FIXED (0x2 << 24) // (HDMA_CH) Fixed Mode. #define AT91C_HDMA_DST_ADDRESS_MODE (0x3 << 28) // (HDMA_CH) Type of addressing mode #define AT91C_HDMA_DST_ADDRESS_MODE_INCR (0x0 << 28) // (HDMA_CH) Incrementing Mode. #define AT91C_HDMA_DST_ADDRESS_MODE_DECR (0x1 << 28) // (HDMA_CH) Decrementing Mode. #define AT91C_HDMA_DST_ADDRESS_MODE_FIXED (0x2 << 28) // (HDMA_CH) Fixed Mode. #define AT91C_HDMA_IEN (0x1 << 30) // (HDMA_CH) buffer transfer completed // -------- HDMA_CFG : (HDMA_CH Offset: 0x14) -------- #define AT91C_HDMA_SRC_PER (0xF << 0) // (HDMA_CH) Channel Source Request is associated with peripheral identifier coded SRC_PER handshaking interface. #define AT91C_HDMA_SRC_PER_0 (0x0) // (HDMA_CH) HW Handshaking Interface number 0. #define AT91C_HDMA_SRC_PER_1 (0x1) // (HDMA_CH) HW Handshaking Interface number 1. #define AT91C_HDMA_SRC_PER_2 (0x2) // (HDMA_CH) HW Handshaking Interface number 2. #define AT91C_HDMA_SRC_PER_3 (0x3) // (HDMA_CH) HW Handshaking Interface number 3. #define AT91C_HDMA_SRC_PER_4 (0x4) // (HDMA_CH) HW Handshaking Interface number 4. #define AT91C_HDMA_SRC_PER_5 (0x5) // (HDMA_CH) HW Handshaking Interface number 5. #define AT91C_HDMA_SRC_PER_6 (0x6) // (HDMA_CH) HW Handshaking Interface number 6. #define AT91C_HDMA_SRC_PER_7 (0x7) // (HDMA_CH) HW Handshaking Interface number 7. #define AT91C_HDMA_DST_PER (0xF << 4) // (HDMA_CH) Channel Destination Request is associated with peripheral identifier coded DST_PER handshaking interface. #define AT91C_HDMA_DST_PER_0 (0x0 << 4) // (HDMA_CH) HW Handshaking Interface number 0. #define AT91C_HDMA_DST_PER_1 (0x1 << 4) // (HDMA_CH) HW Handshaking Interface number 1. #define AT91C_HDMA_DST_PER_2 (0x2 << 4) // (HDMA_CH) HW Handshaking Interface number 2. #define AT91C_HDMA_DST_PER_3 (0x3 << 4) // (HDMA_CH) HW Handshaking Interface number 3. #define AT91C_HDMA_DST_PER_4 (0x4 << 4) // (HDMA_CH) HW Handshaking Interface number 4. #define AT91C_HDMA_DST_PER_5 (0x5 << 4) // (HDMA_CH) HW Handshaking Interface number 5. #define AT91C_HDMA_DST_PER_6 (0x6 << 4) // (HDMA_CH) HW Handshaking Interface number 6. #define AT91C_HDMA_DST_PER_7 (0x7 << 4) // (HDMA_CH) HW Handshaking Interface number 7. #define AT91C_HDMA_SRC_H2SEL (0x1 << 9) // (HDMA_CH) Source Handshaking Mode #define AT91C_HDMA_SRC_H2SEL_SW (0x0 << 9) // (HDMA_CH) Software handshaking interface is used to trigger a transfer request. #define AT91C_HDMA_SRC_H2SEL_HW (0x1 << 9) // (HDMA_CH) Hardware handshaking interface is used to trigger a transfer request. #define AT91C_HDMA_DST_H2SEL (0x1 << 13) // (HDMA_CH) Destination Handshaking Mode #define AT91C_HDMA_DST_H2SEL_SW (0x0 << 13) // (HDMA_CH) Software handshaking interface is used to trigger a transfer request. #define AT91C_HDMA_DST_H2SEL_HW (0x1 << 13) // (HDMA_CH) Hardware handshaking interface is used to trigger a transfer request. #define AT91C_HDMA_SOD (0x1 << 16) // (HDMA_CH) STOP ON DONE #define AT91C_HDMA_SOD_DISABLE (0x0 << 16) // (HDMA_CH) STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. #define AT91C_HDMA_SOD_ENABLE (0x1 << 16) // (HDMA_CH) STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. #define AT91C_HDMA_LOCK_IF (0x1 << 20) // (HDMA_CH) Interface Lock #define AT91C_HDMA_LOCK_IF_DISABLE (0x0 << 20) // (HDMA_CH) Interface Lock capability is disabled. #define AT91C_HDMA_LOCK_IF_ENABLE (0x1 << 20) // (HDMA_CH) Interface Lock capability is enabled. #define AT91C_HDMA_LOCK_B (0x1 << 21) // (HDMA_CH) AHB Bus Lock #define AT91C_HDMA_LOCK_B_DISABLE (0x0 << 21) // (HDMA_CH) AHB Bus Locking capability is disabled. #define AT91C_HDMA_LOCK_B_ENABLE (0x1 << 21) // (HDMA_CH) AHB Bus Locking capability is enabled. #define AT91C_HDMA_LOCK_IF_L (0x1 << 22) // (HDMA_CH) Master Interface Arbiter Lock #define AT91C_HDMA_LOCK_IF_L_CHUNK (0x0 << 22) // (HDMA_CH) The Master Interface Arbiter is locked by the channel x for a chunk transfer. #define AT91C_HDMA_LOCK_IF_L_BUFFER (0x1 << 22) // (HDMA_CH) The Master Interface Arbiter is locked by the channel x for a buffer transfer. #define AT91C_HDMA_AHB_PROT (0x7 << 24) // (HDMA_CH) AHB Prot #define AT91C_HDMA_FIFOCFG (0x3 << 28) // (HDMA_CH) FIFO Request Configuration #define AT91C_HDMA_FIFOCFG_LARGESTBURST (0x0 << 28) // (HDMA_CH) The largest defined length AHB burst is performed on the destination AHB interface. #define AT91C_HDMA_FIFOCFG_HALFFIFO (0x1 << 28) // (HDMA_CH) When half fifo size is available/filled a source/destination request is serviced. #define AT91C_HDMA_FIFOCFG_ENOUGHSPACE (0x2 << 28) // (HDMA_CH) When there is enough space/data available to perfom a single AHB access then the request is serviced. // ***************************************************************************** // SOFTWARE API DEFINITION FOR HDMA controller // ***************************************************************************** #ifndef __ASSEMBLY__ typedef struct _AT91S_HDMA { AT91_REG HDMA_GCFG; // HDMA Global Configuration Register AT91_REG HDMA_EN; // HDMA Controller Enable Register AT91_REG HDMA_SREQ; // HDMA Software Single Request Register AT91_REG HDMA_CREQ; // HDMA Software Chunk Transfer Request Register AT91_REG HDMA_LAST; // HDMA Software Last Transfer Flag Register AT91_REG Reserved0[1]; // AT91_REG HDMA_EBCIER; // HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register AT91_REG HDMA_EBCIDR; // HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register AT91_REG HDMA_EBCIMR; // HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register AT91_REG HDMA_EBCISR; // HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Status Register AT91_REG HDMA_CHER; // HDMA Channel Handler Enable Register AT91_REG HDMA_CHDR; // HDMA Channel Handler Disable Register AT91_REG HDMA_CHSR; // HDMA Channel Handler Status Register AT91_REG Reserved1[2]; // AT91S_HDMA_CH HDMA_CH[4]; // HDMA Channel structure AT91_REG Reserved2[68]; // AT91_REG HDMA_ADDRSIZE; // HDMA ADDRSIZE REGISTER AT91_REG HDMA_IPNAME1; // HDMA IPNAME1 REGISTER AT91_REG HDMA_IPNAME2; // HDMA IPNAME2 REGISTER AT91_REG HDMA_FEATURES; // HDMA FEATURES REGISTER AT91_REG HDMA_VER; // HDMA VERSION REGISTER } AT91S_HDMA, *AT91PS_HDMA; #else #define HDMA_GCFG (AT91_CAST(AT91_REG *) 0x00000000) // (HDMA_GCFG) HDMA Global Configuration Register #define HDMA_EN (AT91_CAST(AT91_REG *) 0x00000004) // (HDMA_EN) HDMA Controller Enable Register #define HDMA_SREQ (AT91_CAST(AT91_REG *) 0x00000008) // (HDMA_SREQ) HDMA Software Single Request Register #define HDMA_CREQ (AT91_CAST(AT91_REG *) 0x0000000C) // (HDMA_CREQ) HDMA Software Chunk Transfer Request Register #define HDMA_LAST (AT91_CAST(AT91_REG *) 0x00000010) // (HDMA_LAST) HDMA Software Last Transfer Flag Register #define HDMA_EBCIER (AT91_CAST(AT91_REG *) 0x00000018) // (HDMA_EBCIER) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register #define HDMA_EBCIDR (AT91_CAST(AT91_REG *) 0x0000001C) // (HDMA_EBCIDR) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register #define HDMA_EBCIMR (AT91_CAST(AT91_REG *) 0x00000020) // (HDMA_EBCIMR) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register #define HDMA_EBCISR (AT91_CAST(AT91_REG *) 0x00000024) // (HDMA_EBCISR) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Status Register #define HDMA_CHER (AT91_CAST(AT91_REG *) 0x00000028) // (HDMA_CHER) HDMA Channel Handler Enable Register #define HDMA_CHDR (AT91_CAST(AT91_REG *) 0x0000002C) // (HDMA_CHDR) HDMA Channel Handler Disable Register #define HDMA_CHSR (AT91_CAST(AT91_REG *) 0x00000030) // (HDMA_CHSR) HDMA Channel Handler Status Register #define HDMA_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000001EC) // (HDMA_ADDRSIZE) HDMA ADDRSIZE REGISTER #define HDMA_IPNAME1 (AT91_CAST(AT91_REG *) 0x000001F0) // (HDMA_IPNAME1) HDMA IPNAME1 REGISTER #define HDMA_IPNAME2 (AT91_CAST(AT91_REG *) 0x000001F4) // (HDMA_IPNAME2) HDMA IPNAME2 REGISTER #define HDMA_FEATURES (AT91_CAST(AT91_REG *) 0x000001F8) // (HDMA_FEATURES) HDMA FEATURES REGISTER #define HDMA_VER (AT91_CAST(AT91_REG *) 0x000001FC) // (HDMA_VER) HDMA VERSION REGISTER #endif // -------- HDMA_GCFG : (HDMA Offset: 0x0) -------- #define AT91C_HDMA_ARB_CFG (0x1 << 4) // (HDMA) Arbiter mode. #define AT91C_HDMA_ARB_CFG_FIXED (0x0 << 4) // (HDMA) Fixed priority arbiter. #define AT91C_HDMA_ARB_CFG_ROUND_ROBIN (0x1 << 4) // (HDMA) Modified round robin arbiter. // -------- HDMA_EN : (HDMA Offset: 0x4) -------- #define AT91C_HDMA_ENABLE (0x1 << 0) // (HDMA) #define AT91C_HDMA_ENABLE_DISABLE (0x0) // (HDMA) Disables HDMA. #define AT91C_HDMA_ENABLE_ENABLE (0x1) // (HDMA) Enables HDMA. // -------- HDMA_SREQ : (HDMA Offset: 0x8) -------- #define AT91C_HDMA_SSREQ0 (0x1 << 0) // (HDMA) Request a source single transfer on channel 0 #define AT91C_HDMA_SSREQ0_0 (0x0) // (HDMA) No effect. #define AT91C_HDMA_SSREQ0_1 (0x1) // (HDMA) Request a source single transfer on channel 0. #define AT91C_HDMA_DSREQ0 (0x1 << 1) // (HDMA) Request a destination single transfer on channel 0 #define AT91C_HDMA_DSREQ0_0 (0x0 << 1) // (HDMA) No effect. #define AT91C_HDMA_DSREQ0_1 (0x1 << 1) // (HDMA) Request a destination single transfer on channel 0. #define AT91C_HDMA_SSREQ1 (0x1 << 2) // (HDMA) Request a source single transfer on channel 1 #define AT91C_HDMA_SSREQ1_0 (0x0 << 2) // (HDMA) No effect. #define AT91C_HDMA_SSREQ1_1 (0x1 << 2) // (HDMA) Request a source single transfer on channel 1. #define AT91C_HDMA_DSREQ1 (0x1 << 3) // (HDMA) Request a destination single transfer on channel 1 #define AT91C_HDMA_DSREQ1_0 (0x0 << 3) // (HDMA) No effect. #define AT91C_HDMA_DSREQ1_1 (0x1 << 3) // (HDMA) Request a destination single transfer on channel 1. #define AT91C_HDMA_SSREQ2 (0x1 << 4) // (HDMA) Request a source single transfer on channel 2 #define AT91C_HDMA_SSREQ2_0 (0x0 << 4) // (HDMA) No effect. #define AT91C_HDMA_SSREQ2_1 (0x1 << 4) // (HDMA) Request a source single transfer on channel 2. #define AT91C_HDMA_DSREQ2 (0x1 << 5) // (HDMA) Request a destination single transfer on channel 2 #define AT91C_HDMA_DSREQ2_0 (0x0 << 5) // (HDMA) No effect. #define AT91C_HDMA_DSREQ2_1 (0x1 << 5) // (HDMA) Request a destination single transfer on channel 2. #define AT91C_HDMA_SSREQ3 (0x1 << 6) // (HDMA) Request a source single transfer on channel 3 #define AT91C_HDMA_SSREQ3_0 (0x0 << 6) // (HDMA) No effect. #define AT91C_HDMA_SSREQ3_1 (0x1 << 6) // (HDMA) Request a source single transfer on channel 3. #define AT91C_HDMA_DSREQ3 (0x1 << 7) // (HDMA) Request a destination single transfer on channel 3 #define AT91C_HDMA_DSREQ3_0 (0x0 << 7) // (HDMA) No effect. #define AT91C_HDMA_DSREQ3_1 (0x1 << 7) // (HDMA) Request a destination single transfer on channel 3. // -------- HDMA_CREQ : (HDMA Offset: 0xc) -------- #define AT91C_HDMA_SCREQ0 (0x1 << 0) // (HDMA) Request a source chunk transfer on channel 0 #define AT91C_HDMA_SCREQ0_0 (0x0) // (HDMA) No effect. #define AT91C_HDMA_SCREQ0_1 (0x1) // (HDMA) Request a source chunk transfer on channel 0. #define AT91C_HDMA_DCREQ0 (0x1 << 1) // (HDMA) Request a destination chunk transfer on channel 0 #define AT91C_HDMA_DCREQ0_0 (0x0 << 1) // (HDMA) No effect. #define AT91C_HDMA_DCREQ0_1 (0x1 << 1) // (HDMA) Request a destination chunk transfer on channel 0. #define AT91C_HDMA_SCREQ1 (0x1 << 2) // (HDMA) Request a source chunk transfer on channel 1 #define AT91C_HDMA_SCREQ1_0 (0x0 << 2) // (HDMA) No effect. #define AT91C_HDMA_SCREQ1_1 (0x1 << 2) // (HDMA) Request a source chunk transfer on channel 1. #define AT91C_HDMA_DCREQ1 (0x1 << 3) // (HDMA) Request a destination chunk transfer on channel 1 #define AT91C_HDMA_DCREQ1_0 (0x0 << 3) // (HDMA) No effect. #define AT91C_HDMA_DCREQ1_1 (0x1 << 3) // (HDMA) Request a destination chunk transfer on channel 1. #define AT91C_HDMA_SCREQ2 (0x1 << 4) // (HDMA) Request a source chunk transfer on channel 2 #define AT91C_HDMA_SCREQ2_0 (0x0 << 4) // (HDMA) No effect. #define AT91C_HDMA_SCREQ2_1 (0x1 << 4) // (HDMA) Request a source chunk transfer on channel 2. #define AT91C_HDMA_DCREQ2 (0x1 << 5) // (HDMA) Request a destination chunk transfer on channel 2 #define AT91C_HDMA_DCREQ2_0 (0x0 << 5) // (HDMA) No effect. #define AT91C_HDMA_DCREQ2_1 (0x1 << 5) // (HDMA) Request a destination chunk transfer on channel 2. #define AT91C_HDMA_SCREQ3 (0x1 << 6) // (HDMA) Request a source chunk transfer on channel 3 #define AT91C_HDMA_SCREQ3_0 (0x0 << 6) // (HDMA) No effect. #define AT91C_HDMA_SCREQ3_1 (0x1 << 6) // (HDMA) Request a source chunk transfer on channel 3. #define AT91C_HDMA_DCREQ3 (0x1 << 7) // (HDMA) Request a destination chunk transfer on channel 3 #define AT91C_HDMA_DCREQ3_0 (0x0 << 7) // (HDMA) No effect. #define AT91C_HDMA_DCREQ3_1 (0x1 << 7) // (HDMA) Request a destination chunk transfer on channel 3. // -------- HDMA_LAST : (HDMA Offset: 0x10) -------- #define AT91C_HDMA_SLAST0 (0x1 << 0) // (HDMA) Indicates that this source request is the last transfer of the buffer on channel 0 #define AT91C_HDMA_SLAST0_0 (0x0) // (HDMA) No effect. #define AT91C_HDMA_SLAST0_1 (0x1) // (HDMA) Writing one to SLASTx prior to writing one to SSREQx or SCREQx indicates that this source request is the last transfer of the buffer on channel 0. #define AT91C_HDMA_DLAST0 (0x1 << 1) // (HDMA) Indicates that this destination request is the last transfer of the buffer on channel 0 #define AT91C_HDMA_DLAST0_0 (0x0 << 1) // (HDMA) No effect. #define AT91C_HDMA_DLAST0_1 (0x1 << 1) // (HDMA) Writing one to DLASTx prior to writing one to DSREQx or DCREQx indicates that this destination request is the last transfer of the buffer on channel 0. #define AT91C_HDMA_SLAST1 (0x1 << 2) // (HDMA) Indicates that this source request is the last transfer of the buffer on channel 1 #define AT91C_HDMA_SLAST1_0 (0x0 << 2) // (HDMA) No effect. #define AT91C_HDMA_SLAST1_1 (0x1 << 2) // (HDMA) Writing one to SLASTx prior to writing one to SSREQx or SCREQx indicates that this source request is the last transfer of the buffer on channel 1. #define AT91C_HDMA_DLAST1 (0x1 << 3) // (HDMA) Indicates that this destination request is the last transfer of the buffer on channel 1 #define AT91C_HDMA_DLAST1_0 (0x0 << 3) // (HDMA) No effect. #define AT91C_HDMA_DLAST1_1 (0x1 << 3) // (HDMA) Writing one to DLASTx prior to writing one to DSREQx or DCREQx indicates that this destination request is the last transfer of the buffer on channel 1. #define AT91C_HDMA_SLAST2 (0x1 << 4) // (HDMA) Indicates that this source request is the last transfer of the buffer on channel 2 #define AT91C_HDMA_SLAST2_0 (0x0 << 4) // (HDMA) No effect. #define AT91C_HDMA_SLAST2_1 (0x1 << 4) // (HDMA) Writing one to SLASTx prior to writing one to SSREQx or SCREQx indicates that this source request is the last transfer of the buffer on channel 2. #define AT91C_HDMA_DLAST2 (0x1 << 5) // (HDMA) Indicates that this destination request is the last transfer of the buffer on channel 2 #define AT91C_HDMA_DLAST2_0 (0x0 << 5) // (HDMA) No effect. #define AT91C_HDMA_DLAST2_1 (0x1 << 5) // (HDMA) Writing one to DLASTx prior to writing one to DSREQx or DCREQx indicates that this destination request is the last transfer of the buffer on channel 2. #define AT91C_HDMA_SLAST3 (0x1 << 6) // (HDMA) Indicates that this source request is the last transfer of the buffer on channel 3 #define AT91C_HDMA_SLAST3_0 (0x0 << 6) // (HDMA) No effect. #define AT91C_HDMA_SLAST3_1 (0x1 << 6) // (HDMA) Writing one to SLASTx prior to writing one to SSREQx or SCREQx indicates that this source request is the last transfer of the buffer on channel 3. #define AT91C_HDMA_DLAST3 (0x1 << 7) // (HDMA) Indicates that this destination request is the last transfer of the buffer on channel 3 #define AT91C_HDMA_DLAST3_0 (0x0 << 7) // (HDMA) No effect. #define AT91C_HDMA_DLAST3_1 (0x1 << 7) // (HDMA) Writing one to DLASTx prior to writing one to DSREQx or DCREQx indicates that this destination request is the last transfer of the buffer on channel 3. // -------- HDMA_EBCIER : (HDMA Offset: 0x18) Buffer Transfer Completed/Chained Buffer Transfer Completed/Access Error Interrupt Enable Register -------- #define AT91C_HDMA_BTC0 (0x1 << 0) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_BTC1 (0x1 << 1) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_BTC2 (0x1 << 2) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_BTC3 (0x1 << 3) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_BTC4 (0x1 << 4) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_BTC5 (0x1 << 5) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_BTC6 (0x1 << 6) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_BTC7 (0x1 << 7) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_CBTC0 (0x1 << 8) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_CBTC1 (0x1 << 9) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_CBTC2 (0x1 << 10) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_CBTC3 (0x1 << 11) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_CBTC4 (0x1 << 12) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_CBTC5 (0x1 << 13) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_CBTC6 (0x1 << 14) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_CBTC7 (0x1 << 15) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register #define AT91C_HDMA_ERR0 (0x1 << 16) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register #define AT91C_HDMA_ERR1 (0x1 << 17) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register #define AT91C_HDMA_ERR2 (0x1 << 18) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register #define AT91C_HDMA_ERR3 (0x1 << 19) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register #define AT91C_HDMA_ERR4 (0x1 << 20) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register #define AT91C_HDMA_ERR5 (0x1 << 21) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register #define AT91C_HDMA_ERR6 (0x1 << 22) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register #define AT91C_HDMA_ERR7 (0x1 << 23) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register // -------- HDMA_EBCIDR : (HDMA Offset: 0x1c) -------- // -------- HDMA_EBCIMR : (HDMA Offset: 0x20) -------- // -------- HDMA_EBCISR : (HDMA Offset: 0x24) -------- // -------- HDMA_CHER : (HDMA Offset: 0x28) -------- #define AT91C_HDMA_ENA0 (0x1 << 0) // (HDMA) When set, channel 0 enabled. #define AT91C_HDMA_ENA0_0 (0x0) // (HDMA) No effect. #define AT91C_HDMA_ENA0_1 (0x1) // (HDMA) Channel 0 enabled. #define AT91C_HDMA_ENA1 (0x1 << 1) // (HDMA) When set, channel 1 enabled. #define AT91C_HDMA_ENA1_0 (0x0 << 1) // (HDMA) No effect. #define AT91C_HDMA_ENA1_1 (0x1 << 1) // (HDMA) Channel 1 enabled. #define AT91C_HDMA_ENA2 (0x1 << 2) // (HDMA) When set, channel 2 enabled. #define AT91C_HDMA_ENA2_0 (0x0 << 2) // (HDMA) No effect. #define AT91C_HDMA_ENA2_1 (0x1 << 2) // (HDMA) Channel 2 enabled. #define AT91C_HDMA_ENA3 (0x1 << 3) // (HDMA) When set, channel 3 enabled. #define AT91C_HDMA_ENA3_0 (0x0 << 3) // (HDMA) No effect. #define AT91C_HDMA_ENA3_1 (0x1 << 3) // (HDMA) Channel 3 enabled. #define AT91C_HDMA_ENA4 (0x1 << 4) // (HDMA) When set, channel 4 enabled. #define AT91C_HDMA_ENA4_0 (0x0 << 4) // (HDMA) No effect. #define AT91C_HDMA_ENA4_1 (0x1 << 4) // (HDMA) Channel 4 enabled. #define AT91C_HDMA_ENA5 (0x1 << 5) // (HDMA) When set, channel 5 enabled. #define AT91C_HDMA_ENA5_0 (0x0 << 5) // (HDMA) No effect. #define AT91C_HDMA_ENA5_1 (0x1 << 5) // (HDMA) Channel 5 enabled. #define AT91C_HDMA_ENA6 (0x1 << 6) // (HDMA) When set, channel 6 enabled. #define AT91C_HDMA_ENA6_0 (0x0 << 6) // (HDMA) No effect. #define AT91C_HDMA_ENA6_1 (0x1 << 6) // (HDMA) Channel 6 enabled. #define AT91C_HDMA_ENA7 (0x1 << 7) // (HDMA) When set, channel 7 enabled. #define AT91C_HDMA_ENA7_0 (0x0 << 7) // (HDMA) No effect. #define AT91C_HDMA_ENA7_1 (0x1 << 7) // (HDMA) Channel 7 enabled. #define AT91C_HDMA_SUSP0 (0x1 << 8) // (HDMA) When set, channel 0 freezed and its current context. #define AT91C_HDMA_SUSP0_0 (0x0 << 8) // (HDMA) No effect. #define AT91C_HDMA_SUSP0_1 (0x1 << 8) // (HDMA) Channel 0 freezed. #define AT91C_HDMA_SUSP1 (0x1 << 9) // (HDMA) When set, channel 1 freezed and its current context. #define AT91C_HDMA_SUSP1_0 (0x0 << 9) // (HDMA) No effect. #define AT91C_HDMA_SUSP1_1 (0x1 << 9) // (HDMA) Channel 1 freezed. #define AT91C_HDMA_SUSP2 (0x1 << 10) // (HDMA) When set, channel 2 freezed and its current context. #define AT91C_HDMA_SUSP2_0 (0x0 << 10) // (HDMA) No effect. #define AT91C_HDMA_SUSP2_1 (0x1 << 10) // (HDMA) Channel 2 freezed. #define AT91C_HDMA_SUSP3 (0x1 << 11) // (HDMA) When set, channel 3 freezed and its current context. #define AT91C_HDMA_SUSP3_0 (0x0 << 11) // (HDMA) No effect. #define AT91C_HDMA_SUSP3_1 (0x1 << 11) // (HDMA) Channel 3 freezed. #define AT91C_HDMA_SUSP4 (0x1 << 12) // (HDMA) When set, channel 4 freezed and its current context. #define AT91C_HDMA_SUSP4_0 (0x0 << 12) // (HDMA) No effect. #define AT91C_HDMA_SUSP4_1 (0x1 << 12) // (HDMA) Channel 4 freezed. #define AT91C_HDMA_SUSP5 (0x1 << 13) // (HDMA) When set, channel 5 freezed and its current context. #define AT91C_HDMA_SUSP5_0 (0x0 << 13) // (HDMA) No effect. #define AT91C_HDMA_SUSP5_1 (0x1 << 13) // (HDMA) Channel 5 freezed. #define AT91C_HDMA_SUSP6 (0x1 << 14) // (HDMA) When set, channel 6 freezed and its current context. #define AT91C_HDMA_SUSP6_0 (0x0 << 14) // (HDMA) No effect. #define AT91C_HDMA_SUSP6_1 (0x1 << 14) // (HDMA) Channel 6 freezed. #define AT91C_HDMA_SUSP7 (0x1 << 15) // (HDMA) When set, channel 7 freezed and its current context. #define AT91C_HDMA_SUSP7_0 (0x0 << 15) // (HDMA) No effect. #define AT91C_HDMA_SUSP7_1 (0x1 << 15) // (HDMA) Channel 7 freezed. #define AT91C_HDMA_KEEP0 (0x1 << 24) // (HDMA) When set, it resumes the channel 0 from an automatic stall state. #define AT91C_HDMA_KEEP0_0 (0x0 << 24) // (HDMA) No effect. #define AT91C_HDMA_KEEP0_1 (0x1 << 24) // (HDMA) Resumes the channel 0. #define AT91C_HDMA_KEEP1 (0x1 << 25) // (HDMA) When set, it resumes the channel 1 from an automatic stall state. #define AT91C_HDMA_KEEP1_0 (0x0 << 25) // (HDMA) No effect. #define AT91C_HDMA_KEEP1_1 (0x1 << 25) // (HDMA) Resumes the channel 1. #define AT91C_HDMA_KEEP2 (0x1 << 26) // (HDMA) When set, it resumes the channel 2 from an automatic stall state. #define AT91C_HDMA_KEEP2_0 (0x0 << 26) // (HDMA) No effect. #define AT91C_HDMA_KEEP2_1 (0x1 << 26) // (HDMA) Resumes the channel 2. #define AT91C_HDMA_KEEP3 (0x1 << 27) // (HDMA) When set, it resumes the channel 3 from an automatic stall state. #define AT91C_HDMA_KEEP3_0 (0x0 << 27) // (HDMA) No effect. #define AT91C_HDMA_KEEP3_1 (0x1 << 27) // (HDMA) Resumes the channel 3. #define AT91C_HDMA_KEEP4 (0x1 << 28) // (HDMA) When set, it resumes the channel 4 from an automatic stall state. #define AT91C_HDMA_KEEP4_0 (0x0 << 28) // (HDMA) No effect. #define AT91C_HDMA_KEEP4_1 (0x1 << 28) // (HDMA) Resumes the channel 4. #define AT91C_HDMA_KEEP5 (0x1 << 29) // (HDMA) When set, it resumes the channel 5 from an automatic stall state. #define AT91C_HDMA_KEEP5_0 (0x0 << 29) // (HDMA) No effect. #define AT91C_HDMA_KEEP5_1 (0x1 << 29) // (HDMA) Resumes the channel 5. #define AT91C_HDMA_KEEP6 (0x1 << 30) // (HDMA) When set, it resumes the channel 6 from an automatic stall state. #define AT91C_HDMA_KEEP6_0 (0x0 << 30) // (HDMA) No effect. #define AT91C_HDMA_KEEP6_1 (0x1 << 30) // (HDMA) Resumes the channel 6. #define AT91C_HDMA_KEEP7 (0x1 << 31) // (HDMA) When set, it resumes the channel 7 from an automatic stall state. #define AT91C_HDMA_KEEP7_0 (0x0 << 31) // (HDMA) No effect. #define AT91C_HDMA_KEEP7_1 (0x1 << 31) // (HDMA) Resumes the channel 7. // -------- HDMA_CHDR : (HDMA Offset: 0x2c) -------- #define AT91C_HDMA_DIS0 (0x1 << 0) // (HDMA) Write one to this field to disable the channel 0. #define AT91C_HDMA_DIS0_0 (0x0) // (HDMA) No effect. #define AT91C_HDMA_DIS0_1 (0x1) // (HDMA) Disables the channel 0. #define AT91C_HDMA_DIS1 (0x1 << 1) // (HDMA) Write one to this field to disable the channel 1. #define AT91C_HDMA_DIS1_0 (0x0 << 1) // (HDMA) No effect. #define AT91C_HDMA_DIS1_1 (0x1 << 1) // (HDMA) Disables the channel 1. #define AT91C_HDMA_DIS2 (0x1 << 2) // (HDMA) Write one to this field to disable the channel 2. #define AT91C_HDMA_DIS2_0 (0x0 << 2) // (HDMA) No effect. #define AT91C_HDMA_DIS2_1 (0x1 << 2) // (HDMA) Disables the channel 2. #define AT91C_HDMA_DIS3 (0x1 << 3) // (HDMA) Write one to this field to disable the channel 3. #define AT91C_HDMA_DIS3_0 (0x0 << 3) // (HDMA) No effect. #define AT91C_HDMA_DIS3_1 (0x1 << 3) // (HDMA) Disables the channel 3. #define AT91C_HDMA_DIS4 (0x1 << 4) // (HDMA) Write one to this field to disable the channel 4. #define AT91C_HDMA_DIS4_0 (0x0 << 4) // (HDMA) No effect. #define AT91C_HDMA_DIS4_1 (0x1 << 4) // (HDMA) Disables the channel 4. #define AT91C_HDMA_DIS5 (0x1 << 5) // (HDMA) Write one to this field to disable the channel 5. #define AT91C_HDMA_DIS5_0 (0x0 << 5) // (HDMA) No effect. #define AT91C_HDMA_DIS5_1 (0x1 << 5) // (HDMA) Disables the channel 5. #define AT91C_HDMA_DIS6 (0x1 << 6) // (HDMA) Write one to this field to disable the channel 6. #define AT91C_HDMA_DIS6_0 (0x0 << 6) // (HDMA) No effect. #define AT91C_HDMA_DIS6_1 (0x1 << 6) // (HDMA) Disables the channel 6. #define AT91C_HDMA_DIS7 (0x1 << 7) // (HDMA) Write one to this field to disable the channel 7. #define AT91C_HDMA_DIS7_0 (0x0 << 7) // (HDMA) No effect. #define AT91C_HDMA_DIS7_1 (0x1 << 7) // (HDMA) Disables the channel 7. #define AT91C_HDMA_RES0 (0x1 << 8) // (HDMA) Write one to this field to resume the channel 0 transfer restoring its context. #define AT91C_HDMA_RES0_0 (0x0 << 8) // (HDMA) No effect. #define AT91C_HDMA_RES0_1 (0x1 << 8) // (HDMA) Resumes the channel 0. #define AT91C_HDMA_RES1 (0x1 << 9) // (HDMA) Write one to this field to resume the channel 1 transfer restoring its context. #define AT91C_HDMA_RES1_0 (0x0 << 9) // (HDMA) No effect. #define AT91C_HDMA_RES1_1 (0x1 << 9) // (HDMA) Resumes the channel 1. #define AT91C_HDMA_RES2 (0x1 << 10) // (HDMA) Write one to this field to resume the channel 2 transfer restoring its context. #define AT91C_HDMA_RES2_0 (0x0 << 10) // (HDMA) No effect. #define AT91C_HDMA_RES2_1 (0x1 << 10) // (HDMA) Resumes the channel 2. #define AT91C_HDMA_RES3 (0x1 << 11) // (HDMA) Write one to this field to resume the channel 3 transfer restoring its context. #define AT91C_HDMA_RES3_0 (0x0 << 11) // (HDMA) No effect. #define AT91C_HDMA_RES3_1 (0x1 << 11) // (HDMA) Resumes the channel 3. #define AT91C_HDMA_RES4 (0x1 << 12) // (HDMA) Write one to this field to resume the channel 4 transfer restoring its context. #define AT91C_HDMA_RES4_0 (0x0 << 12) // (HDMA) No effect. #define AT91C_HDMA_RES4_1 (0x1 << 12) // (HDMA) Resumes the channel 4. #define AT91C_HDMA_RES5 (0x1 << 13) // (HDMA) Write one to this field to resume the channel 5 transfer restoring its context. #define AT91C_HDMA_RES5_0 (0x0 << 13) // (HDMA) No effect. #define AT91C_HDMA_RES5_1 (0x1 << 13) // (HDMA) Resumes the channel 5. #define AT91C_HDMA_RES6 (0x1 << 14) // (HDMA) Write one to this field to resume the channel 6 transfer restoring its context. #define AT91C_HDMA_RES6_0 (0x0 << 14) // (HDMA) No effect. #define AT91C_HDMA_RES6_1 (0x1 << 14) // (HDMA) Resumes the channel 6. #define AT91C_HDMA_RES7 (0x1 << 15) // (HDMA) Write one to this field to resume the channel 7 transfer restoring its context. #define AT91C_HDMA_RES7_0 (0x0 << 15) // (HDMA) No effect. #define AT91C_HDMA_RES7_1 (0x1 << 15) // (HDMA) Resumes the channel 7. // -------- HDMA_CHSR : (HDMA Offset: 0x30) -------- #define AT91C_HDMA_EMPT0 (0x1 << 16) // (HDMA) When set, channel 0 is empty. #define AT91C_HDMA_EMPT0_0 (0x0 << 16) // (HDMA) No effect. #define AT91C_HDMA_EMPT0_1 (0x1 << 16) // (HDMA) Channel 0 empty. #define AT91C_HDMA_EMPT1 (0x1 << 17) // (HDMA) When set, channel 1 is empty. #define AT91C_HDMA_EMPT1_0 (0x0 << 17) // (HDMA) No effect. #define AT91C_HDMA_EMPT1_1 (0x1 << 17) // (HDMA) Channel 1 empty. #define AT91C_HDMA_EMPT2 (0x1 << 18) // (HDMA) When set, channel 2 is empty. #define AT91C_HDMA_EMPT2_0 (0x0 << 18) // (HDMA) No effect. #define AT91C_HDMA_EMPT2_1 (0x1 << 18) // (HDMA) Channel 2 empty. #define AT91C_HDMA_EMPT3 (0x1 << 19) // (HDMA) When set, channel 3 is empty. #define AT91C_HDMA_EMPT3_0 (0x0 << 19) // (HDMA) No effect. #define AT91C_HDMA_EMPT3_1 (0x1 << 19) // (HDMA) Channel 3 empty. #define AT91C_HDMA_EMPT4 (0x1 << 20) // (HDMA) When set, channel 4 is empty. #define AT91C_HDMA_EMPT4_0 (0x0 << 20) // (HDMA) No effect. #define AT91C_HDMA_EMPT4_1 (0x1 << 20) // (HDMA) Channel 4 empty. #define AT91C_HDMA_EMPT5 (0x1 << 21) // (HDMA) When set, channel 5 is empty. #define AT91C_HDMA_EMPT5_0 (0x0 << 21) // (HDMA) No effect. #define AT91C_HDMA_EMPT5_1 (0x1 << 21) // (HDMA) Channel 5 empty. #define AT91C_HDMA_EMPT6 (0x1 << 22) // (HDMA) When set, channel 6 is empty. #define AT91C_HDMA_EMPT6_0 (0x0 << 22) // (HDMA) No effect. #define AT91C_HDMA_EMPT6_1 (0x1 << 22) // (HDMA) Channel 6 empty. #define AT91C_HDMA_EMPT7 (0x1 << 23) // (HDMA) When set, channel 7 is empty. #define AT91C_HDMA_EMPT7_0 (0x0 << 23) // (HDMA) No effect. #define AT91C_HDMA_EMPT7_1 (0x1 << 23) // (HDMA) Channel 7 empty. #define AT91C_HDMA_STAL0 (0x1 << 24) // (HDMA) When set, channel 0 is stalled. #define AT91C_HDMA_STAL0_0 (0x0 << 24) // (HDMA) No effect. #define AT91C_HDMA_STAL0_1 (0x1 << 24) // (HDMA) Channel 0 stalled. #define AT91C_HDMA_STAL1 (0x1 << 25) // (HDMA) When set, channel 1 is stalled. #define AT91C_HDMA_STAL1_0 (0x0 << 25) // (HDMA) No effect. #define AT91C_HDMA_STAL1_1 (0x1 << 25) // (HDMA) Channel 1 stalled. #define AT91C_HDMA_STAL2 (0x1 << 26) // (HDMA) When set, channel 2 is stalled. #define AT91C_HDMA_STAL2_0 (0x0 << 26) // (HDMA) No effect. #define AT91C_HDMA_STAL2_1 (0x1 << 26) // (HDMA) Channel 2 stalled. #define AT91C_HDMA_STAL3 (0x1 << 27) // (HDMA) When set, channel 3 is stalled. #define AT91C_HDMA_STAL3_0 (0x0 << 27) // (HDMA) No effect. #define AT91C_HDMA_STAL3_1 (0x1 << 27) // (HDMA) Channel 3 stalled. #define AT91C_HDMA_STAL4 (0x1 << 28) // (HDMA) When set, channel 4 is stalled. #define AT91C_HDMA_STAL4_0 (0x0 << 28) // (HDMA) No effect. #define AT91C_HDMA_STAL4_1 (0x1 << 28) // (HDMA) Channel 4 stalled. #define AT91C_HDMA_STAL5 (0x1 << 29) // (HDMA) When set, channel 5 is stalled. #define AT91C_HDMA_STAL5_0 (0x0 << 29) // (HDMA) No effect. #define AT91C_HDMA_STAL5_1 (0x1 << 29) // (HDMA) Channel 5 stalled. #define AT91C_HDMA_STAL6 (0x1 << 30) // (HDMA) When set, channel 6 is stalled. #define AT91C_HDMA_STAL6_0 (0x0 << 30) // (HDMA) No effect. #define AT91C_HDMA_STAL6_1 (0x1 << 30) // (HDMA) Channel 6 stalled. #define AT91C_HDMA_STAL7 (0x1 << 31) // (HDMA) When set, channel 7 is stalled. #define AT91C_HDMA_STAL7_0 (0x0 << 31) // (HDMA) No effect. #define AT91C_HDMA_STAL7_1 (0x1 << 31) // (HDMA) Channel 7 stalled. // -------- HDMA_VER : (HDMA Offset: 0x1fc) -------- // ***************************************************************************** // REGISTER ADDRESS DEFINITION FOR AT91SAM3U4 // ***************************************************************************** // ========== Register definition for SYS peripheral ========== #define AT91C_SYS_GPBR (AT91_CAST(AT91_REG *) 0x400E1290) // (SYS) General Purpose Register // ========== Register definition for HSMC4_CS0 peripheral ========== #define AT91C_CS0_MODE (AT91_CAST(AT91_REG *) 0x400E0080) // (HSMC4_CS0) Mode Register #define AT91C_CS0_PULSE (AT91_CAST(AT91_REG *) 0x400E0074) // (HSMC4_CS0) Pulse Register #define AT91C_CS0_CYCLE (AT91_CAST(AT91_REG *) 0x400E0078) // (HSMC4_CS0) Cycle Register #define AT91C_CS0_TIMINGS (AT91_CAST(AT91_REG *) 0x400E007C) // (HSMC4_CS0) Timmings Register #define AT91C_CS0_SETUP (AT91_CAST(AT91_REG *) 0x400E0070) // (HSMC4_CS0) Setup Register // ========== Register definition for HSMC4_CS1 peripheral ========== #define AT91C_CS1_CYCLE (AT91_CAST(AT91_REG *) 0x400E008C) // (HSMC4_CS1) Cycle Register #define AT91C_CS1_PULSE (AT91_CAST(AT91_REG *) 0x400E0088) // (HSMC4_CS1) Pulse Register #define AT91C_CS1_MODE (AT91_CAST(AT91_REG *) 0x400E0094) // (HSMC4_CS1) Mode Register #define AT91C_CS1_SETUP (AT91_CAST(AT91_REG *) 0x400E0084) // (HSMC4_CS1) Setup Register #define AT91C_CS1_TIMINGS (AT91_CAST(AT91_REG *) 0x400E0090) // (HSMC4_CS1) Timmings Register // ========== Register definition for HSMC4_CS2 peripheral ========== #define AT91C_CS2_PULSE (AT91_CAST(AT91_REG *) 0x400E009C) // (HSMC4_CS2) Pulse Register #define AT91C_CS2_TIMINGS (AT91_CAST(AT91_REG *) 0x400E00A4) // (HSMC4_CS2) Timmings Register #define AT91C_CS2_CYCLE (AT91_CAST(AT91_REG *) 0x400E00A0) // (HSMC4_CS2) Cycle Register #define AT91C_CS2_MODE (AT91_CAST(AT91_REG *) 0x400E00A8) // (HSMC4_CS2) Mode Register #define AT91C_CS2_SETUP (AT91_CAST(AT91_REG *) 0x400E0098) // (HSMC4_CS2) Setup Register // ========== Register definition for HSMC4_CS3 peripheral ========== #define AT91C_CS3_MODE (AT91_CAST(AT91_REG *) 0x400E00BC) // (HSMC4_CS3) Mode Register #define AT91C_CS3_TIMINGS (AT91_CAST(AT91_REG *) 0x400E00B8) // (HSMC4_CS3) Timmings Register #define AT91C_CS3_SETUP (AT91_CAST(AT91_REG *) 0x400E00AC) // (HSMC4_CS3) Setup Register #define AT91C_CS3_CYCLE (AT91_CAST(AT91_REG *) 0x400E00B4) // (HSMC4_CS3) Cycle Register #define AT91C_CS3_PULSE (AT91_CAST(AT91_REG *) 0x400E00B0) // (HSMC4_CS3) Pulse Register // ========== Register definition for HSMC4_NFC peripheral ========== #define AT91C_NFC_MODE (AT91_CAST(AT91_REG *) 0x400E010C) // (HSMC4_NFC) Mode Register #define AT91C_NFC_CYCLE (AT91_CAST(AT91_REG *) 0x400E0104) // (HSMC4_NFC) Cycle Register #define AT91C_NFC_PULSE (AT91_CAST(AT91_REG *) 0x400E0100) // (HSMC4_NFC) Pulse Register #define AT91C_NFC_SETUP (AT91_CAST(AT91_REG *) 0x400E00FC) // (HSMC4_NFC) Setup Register #define AT91C_NFC_TIMINGS (AT91_CAST(AT91_REG *) 0x400E0108) // (HSMC4_NFC) Timmings Register // ========== Register definition for HSMC4 peripheral ========== #define AT91C_HSMC4_IPNAME1 (AT91_CAST(AT91_REG *) 0x400E01F0) // (HSMC4) Write Protection Status Register #define AT91C_HSMC4_ECCPR6 (AT91_CAST(AT91_REG *) 0x400E0048) // (HSMC4) ECC Parity register 6 #define AT91C_HSMC4_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400E01EC) // (HSMC4) Write Protection Status Register #define AT91C_HSMC4_ECCPR11 (AT91_CAST(AT91_REG *) 0x400E005C) // (HSMC4) ECC Parity register 11 #define AT91C_HSMC4_SR (AT91_CAST(AT91_REG *) 0x400E0008) // (HSMC4) Status Register #define AT91C_HSMC4_IMR (AT91_CAST(AT91_REG *) 0x400E0014) // (HSMC4) Interrupt Mask Register #define AT91C_HSMC4_WPSR (AT91_CAST(AT91_REG *) 0x400E01E8) // (HSMC4) Write Protection Status Register #define AT91C_HSMC4_BANK (AT91_CAST(AT91_REG *) 0x400E001C) // (HSMC4) Bank Register #define AT91C_HSMC4_ECCPR8 (AT91_CAST(AT91_REG *) 0x400E0050) // (HSMC4) ECC Parity register 8 #define AT91C_HSMC4_WPCR (AT91_CAST(AT91_REG *) 0x400E01E4) // (HSMC4) Write Protection Control register #define AT91C_HSMC4_ECCPR2 (AT91_CAST(AT91_REG *) 0x400E0038) // (HSMC4) ECC Parity register 2 #define AT91C_HSMC4_ECCPR1 (AT91_CAST(AT91_REG *) 0x400E0030) // (HSMC4) ECC Parity register 1 #define AT91C_HSMC4_ECCSR2 (AT91_CAST(AT91_REG *) 0x400E0034) // (HSMC4) ECC Status register 2 #define AT91C_HSMC4_OCMS (AT91_CAST(AT91_REG *) 0x400E0110) // (HSMC4) OCMS MODE register #define AT91C_HSMC4_ECCPR9 (AT91_CAST(AT91_REG *) 0x400E0054) // (HSMC4) ECC Parity register 9 #define AT91C_HSMC4_DUMMY (AT91_CAST(AT91_REG *) 0x400E0200) // (HSMC4) This rtegister was created only ti have AHB constants #define AT91C_HSMC4_ECCPR5 (AT91_CAST(AT91_REG *) 0x400E0044) // (HSMC4) ECC Parity register 5 #define AT91C_HSMC4_ECCCR (AT91_CAST(AT91_REG *) 0x400E0020) // (HSMC4) ECC reset register #define AT91C_HSMC4_KEY2 (AT91_CAST(AT91_REG *) 0x400E0118) // (HSMC4) KEY2 Register #define AT91C_HSMC4_IER (AT91_CAST(AT91_REG *) 0x400E000C) // (HSMC4) Interrupt Enable Register #define AT91C_HSMC4_ECCSR1 (AT91_CAST(AT91_REG *) 0x400E0028) // (HSMC4) ECC Status register 1 #define AT91C_HSMC4_IDR (AT91_CAST(AT91_REG *) 0x400E0010) // (HSMC4) Interrupt Disable Register #define AT91C_HSMC4_ECCPR0 (AT91_CAST(AT91_REG *) 0x400E002C) // (HSMC4) ECC Parity register 0 #define AT91C_HSMC4_FEATURES (AT91_CAST(AT91_REG *) 0x400E01F8) // (HSMC4) Write Protection Status Register #define AT91C_HSMC4_ECCPR7 (AT91_CAST(AT91_REG *) 0x400E004C) // (HSMC4) ECC Parity register 7 #define AT91C_HSMC4_ECCPR12 (AT91_CAST(AT91_REG *) 0x400E0060) // (HSMC4) ECC Parity register 12 #define AT91C_HSMC4_ECCPR10 (AT91_CAST(AT91_REG *) 0x400E0058) // (HSMC4) ECC Parity register 10 #define AT91C_HSMC4_KEY1 (AT91_CAST(AT91_REG *) 0x400E0114) // (HSMC4) KEY1 Register #define AT91C_HSMC4_VER (AT91_CAST(AT91_REG *) 0x400E01FC) // (HSMC4) HSMC4 Version Register #define AT91C_HSMC4_Eccpr15 (AT91_CAST(AT91_REG *) 0x400E006C) // (HSMC4) ECC Parity register 15 #define AT91C_HSMC4_ECCPR4 (AT91_CAST(AT91_REG *) 0x400E0040) // (HSMC4) ECC Parity register 4 #define AT91C_HSMC4_IPNAME2 (AT91_CAST(AT91_REG *) 0x400E01F4) // (HSMC4) Write Protection Status Register #define AT91C_HSMC4_ECCCMD (AT91_CAST(AT91_REG *) 0x400E0024) // (HSMC4) ECC Page size register #define AT91C_HSMC4_ADDR (AT91_CAST(AT91_REG *) 0x400E0018) // (HSMC4) Address Cycle Zero Register #define AT91C_HSMC4_ECCPR3 (AT91_CAST(AT91_REG *) 0x400E003C) // (HSMC4) ECC Parity register 3 #define AT91C_HSMC4_CFG (AT91_CAST(AT91_REG *) 0x400E0000) // (HSMC4) Configuration Register #define AT91C_HSMC4_CTRL (AT91_CAST(AT91_REG *) 0x400E0004) // (HSMC4) Control Register #define AT91C_HSMC4_ECCPR13 (AT91_CAST(AT91_REG *) 0x400E0064) // (HSMC4) ECC Parity register 13 #define AT91C_HSMC4_ECCPR14 (AT91_CAST(AT91_REG *) 0x400E0068) // (HSMC4) ECC Parity register 14 // ========== Register definition for MATRIX peripheral ========== #define AT91C_MATRIX_SFR2 (AT91_CAST(AT91_REG *) 0x400E0318) // (MATRIX) Special Function Register 2 #define AT91C_MATRIX_SFR3 (AT91_CAST(AT91_REG *) 0x400E031C) // (MATRIX) Special Function Register 3 #define AT91C_MATRIX_SCFG8 (AT91_CAST(AT91_REG *) 0x400E0260) // (MATRIX) Slave Configuration Register 8 #define AT91C_MATRIX_MCFG2 (AT91_CAST(AT91_REG *) 0x400E0208) // (MATRIX) Master Configuration Register 2 #define AT91C_MATRIX_MCFG7 (AT91_CAST(AT91_REG *) 0x400E021C) // (MATRIX) Master Configuration Register 7 #define AT91C_MATRIX_SCFG3 (AT91_CAST(AT91_REG *) 0x400E024C) // (MATRIX) Slave Configuration Register 3 #define AT91C_MATRIX_SCFG0 (AT91_CAST(AT91_REG *) 0x400E0240) // (MATRIX) Slave Configuration Register 0 #define AT91C_MATRIX_SFR12 (AT91_CAST(AT91_REG *) 0x400E0340) // (MATRIX) Special Function Register 12 #define AT91C_MATRIX_SCFG1 (AT91_CAST(AT91_REG *) 0x400E0244) // (MATRIX) Slave Configuration Register 1 #define AT91C_MATRIX_SFR8 (AT91_CAST(AT91_REG *) 0x400E0330) // (MATRIX) Special Function Register 8 #define AT91C_MATRIX_VER (AT91_CAST(AT91_REG *) 0x400E03FC) // (MATRIX) HMATRIX2 VERSION REGISTER #define AT91C_MATRIX_SFR13 (AT91_CAST(AT91_REG *) 0x400E0344) // (MATRIX) Special Function Register 13 #define AT91C_MATRIX_SFR5 (AT91_CAST(AT91_REG *) 0x400E0324) // (MATRIX) Special Function Register 5 #define AT91C_MATRIX_MCFG0 (AT91_CAST(AT91_REG *) 0x400E0200) // (MATRIX) Master Configuration Register 0 : ARM I and D #define AT91C_MATRIX_SCFG6 (AT91_CAST(AT91_REG *) 0x400E0258) // (MATRIX) Slave Configuration Register 6 #define AT91C_MATRIX_SFR14 (AT91_CAST(AT91_REG *) 0x400E0348) // (MATRIX) Special Function Register 14 #define AT91C_MATRIX_SFR1 (AT91_CAST(AT91_REG *) 0x400E0314) // (MATRIX) Special Function Register 1 #define AT91C_MATRIX_SFR15 (AT91_CAST(AT91_REG *) 0x400E034C) // (MATRIX) Special Function Register 15 #define AT91C_MATRIX_SFR6 (AT91_CAST(AT91_REG *) 0x400E0328) // (MATRIX) Special Function Register 6 #define AT91C_MATRIX_SFR11 (AT91_CAST(AT91_REG *) 0x400E033C) // (MATRIX) Special Function Register 11 #define AT91C_MATRIX_IPNAME2 (AT91_CAST(AT91_REG *) 0x400E03F4) // (MATRIX) HMATRIX2 IPNAME2 REGISTER #define AT91C_MATRIX_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400E03EC) // (MATRIX) HMATRIX2 ADDRSIZE REGISTER #define AT91C_MATRIX_MCFG5 (AT91_CAST(AT91_REG *) 0x400E0214) // (MATRIX) Master Configuration Register 5 #define AT91C_MATRIX_SFR9 (AT91_CAST(AT91_REG *) 0x400E0334) // (MATRIX) Special Function Register 9 #define AT91C_MATRIX_MCFG3 (AT91_CAST(AT91_REG *) 0x400E020C) // (MATRIX) Master Configuration Register 3 #define AT91C_MATRIX_SCFG4 (AT91_CAST(AT91_REG *) 0x400E0250) // (MATRIX) Slave Configuration Register 4 #define AT91C_MATRIX_MCFG1 (AT91_CAST(AT91_REG *) 0x400E0204) // (MATRIX) Master Configuration Register 1 : ARM S #define AT91C_MATRIX_SCFG7 (AT91_CAST(AT91_REG *) 0x400E025C) // (MATRIX) Slave Configuration Register 5 #define AT91C_MATRIX_SFR10 (AT91_CAST(AT91_REG *) 0x400E0338) // (MATRIX) Special Function Register 10 #define AT91C_MATRIX_SCFG2 (AT91_CAST(AT91_REG *) 0x400E0248) // (MATRIX) Slave Configuration Register 2 #define AT91C_MATRIX_SFR7 (AT91_CAST(AT91_REG *) 0x400E032C) // (MATRIX) Special Function Register 7 #define AT91C_MATRIX_IPNAME1 (AT91_CAST(AT91_REG *) 0x400E03F0) // (MATRIX) HMATRIX2 IPNAME1 REGISTER #define AT91C_MATRIX_MCFG4 (AT91_CAST(AT91_REG *) 0x400E0210) // (MATRIX) Master Configuration Register 4 #define AT91C_MATRIX_SFR0 (AT91_CAST(AT91_REG *) 0x400E0310) // (MATRIX) Special Function Register 0 #define AT91C_MATRIX_FEATURES (AT91_CAST(AT91_REG *) 0x400E03F8) // (MATRIX) HMATRIX2 FEATURES REGISTER #define AT91C_MATRIX_SCFG5 (AT91_CAST(AT91_REG *) 0x400E0254) // (MATRIX) Slave Configuration Register 5 #define AT91C_MATRIX_MCFG6 (AT91_CAST(AT91_REG *) 0x400E0218) // (MATRIX) Master Configuration Register 6 #define AT91C_MATRIX_SCFG9 (AT91_CAST(AT91_REG *) 0x400E0264) // (MATRIX) Slave Configuration Register 9 #define AT91C_MATRIX_SFR4 (AT91_CAST(AT91_REG *) 0x400E0320) // (MATRIX) Special Function Register 4 // ========== Register definition for NVIC peripheral ========== #define AT91C_NVIC_MMAR (AT91_CAST(AT91_REG *) 0xE000ED34) // (NVIC) Mem Manage Address Register #define AT91C_NVIC_STIR (AT91_CAST(AT91_REG *) 0xE000EF00) // (NVIC) Software Trigger Interrupt Register #define AT91C_NVIC_MMFR2 (AT91_CAST(AT91_REG *) 0xE000ED58) // (NVIC) Memory Model Feature register2 #define AT91C_NVIC_CPUID (AT91_CAST(AT91_REG *) 0xE000ED00) // (NVIC) CPUID Base Register #define AT91C_NVIC_DFSR (AT91_CAST(AT91_REG *) 0xE000ED30) // (NVIC) Debug Fault Status Register #define AT91C_NVIC_HAND4PR (AT91_CAST(AT91_REG *) 0xE000ED18) // (NVIC) System Handlers 4-7 Priority Register #define AT91C_NVIC_HFSR (AT91_CAST(AT91_REG *) 0xE000ED2C) // (NVIC) Hard Fault Status Register #define AT91C_NVIC_PID6 (AT91_CAST(AT91_REG *) 0xE000EFD8) // (NVIC) Peripheral identification register #define AT91C_NVIC_PFR0 (AT91_CAST(AT91_REG *) 0xE000ED40) // (NVIC) Processor Feature register0 #define AT91C_NVIC_VTOFFR (AT91_CAST(AT91_REG *) 0xE000ED08) // (NVIC) Vector Table Offset Register #define AT91C_NVIC_ISPR (AT91_CAST(AT91_REG *) 0xE000E200) // (NVIC) Set Pending Register #define AT91C_NVIC_PID0 (AT91_CAST(AT91_REG *) 0xE000EFE0) // (NVIC) Peripheral identification register b7:0 #define AT91C_NVIC_PID7 (AT91_CAST(AT91_REG *) 0xE000EFDC) // (NVIC) Peripheral identification register #define AT91C_NVIC_STICKRVR (AT91_CAST(AT91_REG *) 0xE000E014) // (NVIC) SysTick Reload Value Register #define AT91C_NVIC_PID2 (AT91_CAST(AT91_REG *) 0xE000EFE8) // (NVIC) Peripheral identification register b23:16 #define AT91C_NVIC_ISAR0 (AT91_CAST(AT91_REG *) 0xE000ED60) // (NVIC) ISA Feature register0 #define AT91C_NVIC_SCR (AT91_CAST(AT91_REG *) 0xE000ED10) // (NVIC) System Control Register #define AT91C_NVIC_PID4 (AT91_CAST(AT91_REG *) 0xE000EFD0) // (NVIC) Peripheral identification register #define AT91C_NVIC_ISAR2 (AT91_CAST(AT91_REG *) 0xE000ED68) // (NVIC) ISA Feature register2 #define AT91C_NVIC_ISER (AT91_CAST(AT91_REG *) 0xE000E100) // (NVIC) Set Enable Register #define AT91C_NVIC_IPR (AT91_CAST(AT91_REG *) 0xE000E400) // (NVIC) Interrupt Mask Register #define AT91C_NVIC_AIRCR (AT91_CAST(AT91_REG *) 0xE000ED0C) // (NVIC) Application Interrupt/Reset Control Reg #define AT91C_NVIC_CID2 (AT91_CAST(AT91_REG *) 0xE000EFF8) // (NVIC) Component identification register b23:16 #define AT91C_NVIC_ICPR (AT91_CAST(AT91_REG *) 0xE000E280) // (NVIC) Clear Pending Register #define AT91C_NVIC_CID3 (AT91_CAST(AT91_REG *) 0xE000EFFC) // (NVIC) Component identification register b31:24 #define AT91C_NVIC_CFSR (AT91_CAST(AT91_REG *) 0xE000ED28) // (NVIC) Configurable Fault Status Register #define AT91C_NVIC_AFR0 (AT91_CAST(AT91_REG *) 0xE000ED4C) // (NVIC) Auxiliary Feature register0 #define AT91C_NVIC_ICSR (AT91_CAST(AT91_REG *) 0xE000ED04) // (NVIC) Interrupt Control State Register #define AT91C_NVIC_CCR (AT91_CAST(AT91_REG *) 0xE000ED14) // (NVIC) Configuration Control Register #define AT91C_NVIC_CID0 (AT91_CAST(AT91_REG *) 0xE000EFF0) // (NVIC) Component identification register b7:0 #define AT91C_NVIC_ISAR1 (AT91_CAST(AT91_REG *) 0xE000ED64) // (NVIC) ISA Feature register1 #define AT91C_NVIC_STICKCVR (AT91_CAST(AT91_REG *) 0xE000E018) // (NVIC) SysTick Current Value Register #define AT91C_NVIC_STICKCSR (AT91_CAST(AT91_REG *) 0xE000E010) // (NVIC) SysTick Control and Status Register #define AT91C_NVIC_CID1 (AT91_CAST(AT91_REG *) 0xE000EFF4) // (NVIC) Component identification register b15:8 #define AT91C_NVIC_DFR0 (AT91_CAST(AT91_REG *) 0xE000ED48) // (NVIC) Debug Feature register0 #define AT91C_NVIC_MMFR3 (AT91_CAST(AT91_REG *) 0xE000ED5C) // (NVIC) Memory Model Feature register3 #define AT91C_NVIC_MMFR0 (AT91_CAST(AT91_REG *) 0xE000ED50) // (NVIC) Memory Model Feature register0 #define AT91C_NVIC_STICKCALVR (AT91_CAST(AT91_REG *) 0xE000E01C) // (NVIC) SysTick Calibration Value Register #define AT91C_NVIC_PID1 (AT91_CAST(AT91_REG *) 0xE000EFE4) // (NVIC) Peripheral identification register b15:8 #define AT91C_NVIC_HAND12PR (AT91_CAST(AT91_REG *) 0xE000ED20) // (NVIC) System Handlers 12-15 Priority Register #define AT91C_NVIC_MMFR1 (AT91_CAST(AT91_REG *) 0xE000ED54) // (NVIC) Memory Model Feature register1 #define AT91C_NVIC_AFSR (AT91_CAST(AT91_REG *) 0xE000ED3C) // (NVIC) Auxiliary Fault Status Register #define AT91C_NVIC_HANDCSR (AT91_CAST(AT91_REG *) 0xE000ED24) // (NVIC) System Handler Control and State Register #define AT91C_NVIC_ISAR4 (AT91_CAST(AT91_REG *) 0xE000ED70) // (NVIC) ISA Feature register4 #define AT91C_NVIC_ABR (AT91_CAST(AT91_REG *) 0xE000E300) // (NVIC) Active Bit Register #define AT91C_NVIC_PFR1 (AT91_CAST(AT91_REG *) 0xE000ED44) // (NVIC) Processor Feature register1 #define AT91C_NVIC_PID5 (AT91_CAST(AT91_REG *) 0xE000EFD4) // (NVIC) Peripheral identification register #define AT91C_NVIC_ICTR (AT91_CAST(AT91_REG *) 0xE000E004) // (NVIC) Interrupt Control Type Register #define AT91C_NVIC_ICER (AT91_CAST(AT91_REG *) 0xE000E180) // (NVIC) Clear enable Register #define AT91C_NVIC_PID3 (AT91_CAST(AT91_REG *) 0xE000EFEC) // (NVIC) Peripheral identification register b31:24 #define AT91C_NVIC_ISAR3 (AT91_CAST(AT91_REG *) 0xE000ED6C) // (NVIC) ISA Feature register3 #define AT91C_NVIC_HAND8PR (AT91_CAST(AT91_REG *) 0xE000ED1C) // (NVIC) System Handlers 8-11 Priority Register #define AT91C_NVIC_BFAR (AT91_CAST(AT91_REG *) 0xE000ED38) // (NVIC) Bus Fault Address Register // ========== Register definition for MPU peripheral ========== #define AT91C_MPU_REG_BASE_ADDR3 (AT91_CAST(AT91_REG *) 0xE000EDB4) // (MPU) MPU Region Base Address Register alias 3 #define AT91C_MPU_REG_NB (AT91_CAST(AT91_REG *) 0xE000ED98) // (MPU) MPU Region Number Register #define AT91C_MPU_ATTR_SIZE1 (AT91_CAST(AT91_REG *) 0xE000EDA8) // (MPU) MPU Attribute and Size Register alias 1 #define AT91C_MPU_REG_BASE_ADDR1 (AT91_CAST(AT91_REG *) 0xE000EDA4) // (MPU) MPU Region Base Address Register alias 1 #define AT91C_MPU_ATTR_SIZE3 (AT91_CAST(AT91_REG *) 0xE000EDB8) // (MPU) MPU Attribute and Size Register alias 3 #define AT91C_MPU_CTRL (AT91_CAST(AT91_REG *) 0xE000ED94) // (MPU) MPU Control Register #define AT91C_MPU_ATTR_SIZE2 (AT91_CAST(AT91_REG *) 0xE000EDB0) // (MPU) MPU Attribute and Size Register alias 2 #define AT91C_MPU_REG_BASE_ADDR (AT91_CAST(AT91_REG *) 0xE000ED9C) // (MPU) MPU Region Base Address Register #define AT91C_MPU_REG_BASE_ADDR2 (AT91_CAST(AT91_REG *) 0xE000EDAC) // (MPU) MPU Region Base Address Register alias 2 #define AT91C_MPU_ATTR_SIZE (AT91_CAST(AT91_REG *) 0xE000EDA0) // (MPU) MPU Attribute and Size Register #define AT91C_MPU_TYPE (AT91_CAST(AT91_REG *) 0xE000ED90) // (MPU) MPU Type Register // ========== Register definition for CM3 peripheral ========== #define AT91C_CM3_SHCSR (AT91_CAST(AT91_REG *) 0xE000ED24) // (CM3) System Handler Control and State Register #define AT91C_CM3_CCR (AT91_CAST(AT91_REG *) 0xE000ED14) // (CM3) Configuration Control Register #define AT91C_CM3_ICSR (AT91_CAST(AT91_REG *) 0xE000ED04) // (CM3) Interrupt Control State Register #define AT91C_CM3_CPUID (AT91_CAST(AT91_REG *) 0xE000ED00) // (CM3) CPU ID Base Register #define AT91C_CM3_SCR (AT91_CAST(AT91_REG *) 0xE000ED10) // (CM3) System Controller Register #define AT91C_CM3_AIRCR (AT91_CAST(AT91_REG *) 0xE000ED0C) // (CM3) Application Interrupt and Reset Control Register #define AT91C_CM3_SHPR (AT91_CAST(AT91_REG *) 0xE000ED18) // (CM3) System Handler Priority Register #define AT91C_CM3_VTOR (AT91_CAST(AT91_REG *) 0xE000ED08) // (CM3) Vector Table Offset Register // ========== Register definition for PDC_DBGU peripheral ========== #define AT91C_DBGU_TPR (AT91_CAST(AT91_REG *) 0x400E0708) // (PDC_DBGU) Transmit Pointer Register #define AT91C_DBGU_PTCR (AT91_CAST(AT91_REG *) 0x400E0720) // (PDC_DBGU) PDC Transfer Control Register #define AT91C_DBGU_TNCR (AT91_CAST(AT91_REG *) 0x400E071C) // (PDC_DBGU) Transmit Next Counter Register #define AT91C_DBGU_PTSR (AT91_CAST(AT91_REG *) 0x400E0724) // (PDC_DBGU) PDC Transfer Status Register #define AT91C_DBGU_RNCR (AT91_CAST(AT91_REG *) 0x400E0714) // (PDC_DBGU) Receive Next Counter Register #define AT91C_DBGU_RPR (AT91_CAST(AT91_REG *) 0x400E0700) // (PDC_DBGU) Receive Pointer Register #define AT91C_DBGU_TCR (AT91_CAST(AT91_REG *) 0x400E070C) // (PDC_DBGU) Transmit Counter Register #define AT91C_DBGU_RNPR (AT91_CAST(AT91_REG *) 0x400E0710) // (PDC_DBGU) Receive Next Pointer Register #define AT91C_DBGU_TNPR (AT91_CAST(AT91_REG *) 0x400E0718) // (PDC_DBGU) Transmit Next Pointer Register #define AT91C_DBGU_RCR (AT91_CAST(AT91_REG *) 0x400E0704) // (PDC_DBGU) Receive Counter Register // ========== Register definition for DBGU peripheral ========== #define AT91C_DBGU_CR (AT91_CAST(AT91_REG *) 0x400E0600) // (DBGU) Control Register #define AT91C_DBGU_IDR (AT91_CAST(AT91_REG *) 0x400E060C) // (DBGU) Interrupt Disable Register #define AT91C_DBGU_CIDR (AT91_CAST(AT91_REG *) 0x400E0740) // (DBGU) Chip ID Register #define AT91C_DBGU_IPNAME2 (AT91_CAST(AT91_REG *) 0x400E06F4) // (DBGU) DBGU IPNAME2 REGISTER #define AT91C_DBGU_FEATURES (AT91_CAST(AT91_REG *) 0x400E06F8) // (DBGU) DBGU FEATURES REGISTER #define AT91C_DBGU_FNTR (AT91_CAST(AT91_REG *) 0x400E0648) // (DBGU) Force NTRST Register #define AT91C_DBGU_RHR (AT91_CAST(AT91_REG *) 0x400E0618) // (DBGU) Receiver Holding Register #define AT91C_DBGU_THR (AT91_CAST(AT91_REG *) 0x400E061C) // (DBGU) Transmitter Holding Register #define AT91C_DBGU_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400E06EC) // (DBGU) DBGU ADDRSIZE REGISTER #define AT91C_DBGU_MR (AT91_CAST(AT91_REG *) 0x400E0604) // (DBGU) Mode Register #define AT91C_DBGU_IER (AT91_CAST(AT91_REG *) 0x400E0608) // (DBGU) Interrupt Enable Register #define AT91C_DBGU_BRGR (AT91_CAST(AT91_REG *) 0x400E0620) // (DBGU) Baud Rate Generator Register #define AT91C_DBGU_CSR (AT91_CAST(AT91_REG *) 0x400E0614) // (DBGU) Channel Status Register #define AT91C_DBGU_VER (AT91_CAST(AT91_REG *) 0x400E06FC) // (DBGU) DBGU VERSION REGISTER #define AT91C_DBGU_IMR (AT91_CAST(AT91_REG *) 0x400E0610) // (DBGU) Interrupt Mask Register #define AT91C_DBGU_IPNAME1 (AT91_CAST(AT91_REG *) 0x400E06F0) // (DBGU) DBGU IPNAME1 REGISTER #define AT91C_DBGU_EXID (AT91_CAST(AT91_REG *) 0x400E0744) // (DBGU) Chip ID Extension Register // ========== Register definition for PIOA peripheral ========== #define AT91C_PIOA_PDR (AT91_CAST(AT91_REG *) 0x400E0C04) // (PIOA) PIO Disable Register #define AT91C_PIOA_FRLHSR (AT91_CAST(AT91_REG *) 0x400E0CD8) // (PIOA) Fall/Rise - Low/High Status Register #define AT91C_PIOA_KIMR (AT91_CAST(AT91_REG *) 0x400E0D38) // (PIOA) Keypad Controller Interrupt Mask Register #define AT91C_PIOA_LSR (AT91_CAST(AT91_REG *) 0x400E0CC4) // (PIOA) Level Select Register #define AT91C_PIOA_IFSR (AT91_CAST(AT91_REG *) 0x400E0C28) // (PIOA) Input Filter Status Register #define AT91C_PIOA_KKRR (AT91_CAST(AT91_REG *) 0x400E0D44) // (PIOA) Keypad Controller Key Release Register #define AT91C_PIOA_ODR (AT91_CAST(AT91_REG *) 0x400E0C14) // (PIOA) Output Disable Registerr #define AT91C_PIOA_SCIFSR (AT91_CAST(AT91_REG *) 0x400E0C80) // (PIOA) System Clock Glitch Input Filter Select Register #define AT91C_PIOA_PER (AT91_CAST(AT91_REG *) 0x400E0C00) // (PIOA) PIO Enable Register #define AT91C_PIOA_VER (AT91_CAST(AT91_REG *) 0x400E0CFC) // (PIOA) PIO VERSION REGISTER #define AT91C_PIOA_OWSR (AT91_CAST(AT91_REG *) 0x400E0CA8) // (PIOA) Output Write Status Register #define AT91C_PIOA_KSR (AT91_CAST(AT91_REG *) 0x400E0D3C) // (PIOA) Keypad Controller Status Register #define AT91C_PIOA_IMR (AT91_CAST(AT91_REG *) 0x400E0C48) // (PIOA) Interrupt Mask Register #define AT91C_PIOA_OWDR (AT91_CAST(AT91_REG *) 0x400E0CA4) // (PIOA) Output Write Disable Register #define AT91C_PIOA_MDSR (AT91_CAST(AT91_REG *) 0x400E0C58) // (PIOA) Multi-driver Status Register #define AT91C_PIOA_IFDR (AT91_CAST(AT91_REG *) 0x400E0C24) // (PIOA) Input Filter Disable Register #define AT91C_PIOA_AIMDR (AT91_CAST(AT91_REG *) 0x400E0CB4) // (PIOA) Additional Interrupt Modes Disables Register #define AT91C_PIOA_CODR (AT91_CAST(AT91_REG *) 0x400E0C34) // (PIOA) Clear Output Data Register #define AT91C_PIOA_SCDR (AT91_CAST(AT91_REG *) 0x400E0C8C) // (PIOA) Slow Clock Divider Debouncing Register #define AT91C_PIOA_KIER (AT91_CAST(AT91_REG *) 0x400E0D30) // (PIOA) Keypad Controller Interrupt Enable Register #define AT91C_PIOA_REHLSR (AT91_CAST(AT91_REG *) 0x400E0CD4) // (PIOA) Rising Edge/ High Level Select Register #define AT91C_PIOA_ISR (AT91_CAST(AT91_REG *) 0x400E0C4C) // (PIOA) Interrupt Status Register #define AT91C_PIOA_ESR (AT91_CAST(AT91_REG *) 0x400E0CC0) // (PIOA) Edge Select Register #define AT91C_PIOA_PPUDR (AT91_CAST(AT91_REG *) 0x400E0C60) // (PIOA) Pull-up Disable Register #define AT91C_PIOA_MDDR (AT91_CAST(AT91_REG *) 0x400E0C54) // (PIOA) Multi-driver Disable Register #define AT91C_PIOA_PSR (AT91_CAST(AT91_REG *) 0x400E0C08) // (PIOA) PIO Status Register #define AT91C_PIOA_PDSR (AT91_CAST(AT91_REG *) 0x400E0C3C) // (PIOA) Pin Data Status Register #define AT91C_PIOA_IFDGSR (AT91_CAST(AT91_REG *) 0x400E0C88) // (PIOA) Glitch or Debouncing Input Filter Clock Selection Status Register #define AT91C_PIOA_FELLSR (AT91_CAST(AT91_REG *) 0x400E0CD0) // (PIOA) Falling Edge/Low Level Select Register #define AT91C_PIOA_PPUSR (AT91_CAST(AT91_REG *) 0x400E0C68) // (PIOA) Pull-up Status Register #define AT91C_PIOA_OER (AT91_CAST(AT91_REG *) 0x400E0C10) // (PIOA) Output Enable Register #define AT91C_PIOA_OSR (AT91_CAST(AT91_REG *) 0x400E0C18) // (PIOA) Output Status Register #define AT91C_PIOA_KKPR (AT91_CAST(AT91_REG *) 0x400E0D40) // (PIOA) Keypad Controller Key Press Register #define AT91C_PIOA_AIMMR (AT91_CAST(AT91_REG *) 0x400E0CB8) // (PIOA) Additional Interrupt Modes Mask Register #define AT91C_PIOA_KRCR (AT91_CAST(AT91_REG *) 0x400E0D24) // (PIOA) Keypad Controller Row Column Register #define AT91C_PIOA_IER (AT91_CAST(AT91_REG *) 0x400E0C40) // (PIOA) Interrupt Enable Register #define AT91C_PIOA_KER (AT91_CAST(AT91_REG *) 0x400E0D20) // (PIOA) Keypad Controller Enable Register #define AT91C_PIOA_PPUER (AT91_CAST(AT91_REG *) 0x400E0C64) // (PIOA) Pull-up Enable Register #define AT91C_PIOA_KIDR (AT91_CAST(AT91_REG *) 0x400E0D34) // (PIOA) Keypad Controller Interrupt Disable Register #define AT91C_PIOA_ABSR (AT91_CAST(AT91_REG *) 0x400E0C70) // (PIOA) Peripheral AB Select Register #define AT91C_PIOA_LOCKSR (AT91_CAST(AT91_REG *) 0x400E0CE0) // (PIOA) Lock Status Register #define AT91C_PIOA_DIFSR (AT91_CAST(AT91_REG *) 0x400E0C84) // (PIOA) Debouncing Input Filter Select Register #define AT91C_PIOA_MDER (AT91_CAST(AT91_REG *) 0x400E0C50) // (PIOA) Multi-driver Enable Register #define AT91C_PIOA_AIMER (AT91_CAST(AT91_REG *) 0x400E0CB0) // (PIOA) Additional Interrupt Modes Enable Register #define AT91C_PIOA_ELSR (AT91_CAST(AT91_REG *) 0x400E0CC8) // (PIOA) Edge/Level Status Register #define AT91C_PIOA_IFER (AT91_CAST(AT91_REG *) 0x400E0C20) // (PIOA) Input Filter Enable Register #define AT91C_PIOA_KDR (AT91_CAST(AT91_REG *) 0x400E0D28) // (PIOA) Keypad Controller Debouncing Register #define AT91C_PIOA_IDR (AT91_CAST(AT91_REG *) 0x400E0C44) // (PIOA) Interrupt Disable Register #define AT91C_PIOA_OWER (AT91_CAST(AT91_REG *) 0x400E0CA0) // (PIOA) Output Write Enable Register #define AT91C_PIOA_ODSR (AT91_CAST(AT91_REG *) 0x400E0C38) // (PIOA) Output Data Status Register #define AT91C_PIOA_SODR (AT91_CAST(AT91_REG *) 0x400E0C30) // (PIOA) Set Output Data Register // ========== Register definition for PIOB peripheral ========== #define AT91C_PIOB_KIDR (AT91_CAST(AT91_REG *) 0x400E0F34) // (PIOB) Keypad Controller Interrupt Disable Register #define AT91C_PIOB_OWSR (AT91_CAST(AT91_REG *) 0x400E0EA8) // (PIOB) Output Write Status Register #define AT91C_PIOB_PSR (AT91_CAST(AT91_REG *) 0x400E0E08) // (PIOB) PIO Status Register #define AT91C_PIOB_MDER (AT91_CAST(AT91_REG *) 0x400E0E50) // (PIOB) Multi-driver Enable Register #define AT91C_PIOB_ODR (AT91_CAST(AT91_REG *) 0x400E0E14) // (PIOB) Output Disable Registerr #define AT91C_PIOB_IDR (AT91_CAST(AT91_REG *) 0x400E0E44) // (PIOB) Interrupt Disable Register #define AT91C_PIOB_AIMER (AT91_CAST(AT91_REG *) 0x400E0EB0) // (PIOB) Additional Interrupt Modes Enable Register #define AT91C_PIOB_DIFSR (AT91_CAST(AT91_REG *) 0x400E0E84) // (PIOB) Debouncing Input Filter Select Register #define AT91C_PIOB_PDR (AT91_CAST(AT91_REG *) 0x400E0E04) // (PIOB) PIO Disable Register #define AT91C_PIOB_REHLSR (AT91_CAST(AT91_REG *) 0x400E0ED4) // (PIOB) Rising Edge/ High Level Select Register #define AT91C_PIOB_PDSR (AT91_CAST(AT91_REG *) 0x400E0E3C) // (PIOB) Pin Data Status Register #define AT91C_PIOB_PPUDR (AT91_CAST(AT91_REG *) 0x400E0E60) // (PIOB) Pull-up Disable Register #define AT91C_PIOB_LSR (AT91_CAST(AT91_REG *) 0x400E0EC4) // (PIOB) Level Select Register #define AT91C_PIOB_OWDR (AT91_CAST(AT91_REG *) 0x400E0EA4) // (PIOB) Output Write Disable Register #define AT91C_PIOB_FELLSR (AT91_CAST(AT91_REG *) 0x400E0ED0) // (PIOB) Falling Edge/Low Level Select Register #define AT91C_PIOB_IFER (AT91_CAST(AT91_REG *) 0x400E0E20) // (PIOB) Input Filter Enable Register #define AT91C_PIOB_ABSR (AT91_CAST(AT91_REG *) 0x400E0E70) // (PIOB) Peripheral AB Select Register #define AT91C_PIOB_KIMR (AT91_CAST(AT91_REG *) 0x400E0F38) // (PIOB) Keypad Controller Interrupt Mask Register #define AT91C_PIOB_KKPR (AT91_CAST(AT91_REG *) 0x400E0F40) // (PIOB) Keypad Controller Key Press Register #define AT91C_PIOB_FRLHSR (AT91_CAST(AT91_REG *) 0x400E0ED8) // (PIOB) Fall/Rise - Low/High Status Register #define AT91C_PIOB_AIMDR (AT91_CAST(AT91_REG *) 0x400E0EB4) // (PIOB) Additional Interrupt Modes Disables Register #define AT91C_PIOB_SCIFSR (AT91_CAST(AT91_REG *) 0x400E0E80) // (PIOB) System Clock Glitch Input Filter Select Register #define AT91C_PIOB_VER (AT91_CAST(AT91_REG *) 0x400E0EFC) // (PIOB) PIO VERSION REGISTER #define AT91C_PIOB_PER (AT91_CAST(AT91_REG *) 0x400E0E00) // (PIOB) PIO Enable Register #define AT91C_PIOB_ELSR (AT91_CAST(AT91_REG *) 0x400E0EC8) // (PIOB) Edge/Level Status Register #define AT91C_PIOB_IMR (AT91_CAST(AT91_REG *) 0x400E0E48) // (PIOB) Interrupt Mask Register #define AT91C_PIOB_PPUSR (AT91_CAST(AT91_REG *) 0x400E0E68) // (PIOB) Pull-up Status Register #define AT91C_PIOB_SCDR (AT91_CAST(AT91_REG *) 0x400E0E8C) // (PIOB) Slow Clock Divider Debouncing Register #define AT91C_PIOB_KSR (AT91_CAST(AT91_REG *) 0x400E0F3C) // (PIOB) Keypad Controller Status Register #define AT91C_PIOB_IFDGSR (AT91_CAST(AT91_REG *) 0x400E0E88) // (PIOB) Glitch or Debouncing Input Filter Clock Selection Status Register #define AT91C_PIOB_ESR (AT91_CAST(AT91_REG *) 0x400E0EC0) // (PIOB) Edge Select Register #define AT91C_PIOB_ODSR (AT91_CAST(AT91_REG *) 0x400E0E38) // (PIOB) Output Data Status Register #define AT91C_PIOB_IFDR (AT91_CAST(AT91_REG *) 0x400E0E24) // (PIOB) Input Filter Disable Register #define AT91C_PIOB_SODR (AT91_CAST(AT91_REG *) 0x400E0E30) // (PIOB) Set Output Data Register #define AT91C_PIOB_IER (AT91_CAST(AT91_REG *) 0x400E0E40) // (PIOB) Interrupt Enable Register #define AT91C_PIOB_MDSR (AT91_CAST(AT91_REG *) 0x400E0E58) // (PIOB) Multi-driver Status Register #define AT91C_PIOB_ISR (AT91_CAST(AT91_REG *) 0x400E0E4C) // (PIOB) Interrupt Status Register #define AT91C_PIOB_IFSR (AT91_CAST(AT91_REG *) 0x400E0E28) // (PIOB) Input Filter Status Register #define AT91C_PIOB_KER (AT91_CAST(AT91_REG *) 0x400E0F20) // (PIOB) Keypad Controller Enable Register #define AT91C_PIOB_KKRR (AT91_CAST(AT91_REG *) 0x400E0F44) // (PIOB) Keypad Controller Key Release Register #define AT91C_PIOB_PPUER (AT91_CAST(AT91_REG *) 0x400E0E64) // (PIOB) Pull-up Enable Register #define AT91C_PIOB_LOCKSR (AT91_CAST(AT91_REG *) 0x400E0EE0) // (PIOB) Lock Status Register #define AT91C_PIOB_OWER (AT91_CAST(AT91_REG *) 0x400E0EA0) // (PIOB) Output Write Enable Register #define AT91C_PIOB_KIER (AT91_CAST(AT91_REG *) 0x400E0F30) // (PIOB) Keypad Controller Interrupt Enable Register #define AT91C_PIOB_MDDR (AT91_CAST(AT91_REG *) 0x400E0E54) // (PIOB) Multi-driver Disable Register #define AT91C_PIOB_KRCR (AT91_CAST(AT91_REG *) 0x400E0F24) // (PIOB) Keypad Controller Row Column Register #define AT91C_PIOB_CODR (AT91_CAST(AT91_REG *) 0x400E0E34) // (PIOB) Clear Output Data Register #define AT91C_PIOB_KDR (AT91_CAST(AT91_REG *) 0x400E0F28) // (PIOB) Keypad Controller Debouncing Register #define AT91C_PIOB_AIMMR (AT91_CAST(AT91_REG *) 0x400E0EB8) // (PIOB) Additional Interrupt Modes Mask Register #define AT91C_PIOB_OER (AT91_CAST(AT91_REG *) 0x400E0E10) // (PIOB) Output Enable Register #define AT91C_PIOB_OSR (AT91_CAST(AT91_REG *) 0x400E0E18) // (PIOB) Output Status Register // ========== Register definition for PIOC peripheral ========== #define AT91C_PIOC_FELLSR (AT91_CAST(AT91_REG *) 0x400E10D0) // (PIOC) Falling Edge/Low Level Select Register #define AT91C_PIOC_FRLHSR (AT91_CAST(AT91_REG *) 0x400E10D8) // (PIOC) Fall/Rise - Low/High Status Register #define AT91C_PIOC_MDDR (AT91_CAST(AT91_REG *) 0x400E1054) // (PIOC) Multi-driver Disable Register #define AT91C_PIOC_IFDGSR (AT91_CAST(AT91_REG *) 0x400E1088) // (PIOC) Glitch or Debouncing Input Filter Clock Selection Status Register #define AT91C_PIOC_ABSR (AT91_CAST(AT91_REG *) 0x400E1070) // (PIOC) Peripheral AB Select Register #define AT91C_PIOC_KIMR (AT91_CAST(AT91_REG *) 0x400E1138) // (PIOC) Keypad Controller Interrupt Mask Register #define AT91C_PIOC_KRCR (AT91_CAST(AT91_REG *) 0x400E1124) // (PIOC) Keypad Controller Row Column Register #define AT91C_PIOC_ODSR (AT91_CAST(AT91_REG *) 0x400E1038) // (PIOC) Output Data Status Register #define AT91C_PIOC_OSR (AT91_CAST(AT91_REG *) 0x400E1018) // (PIOC) Output Status Register #define AT91C_PIOC_IFER (AT91_CAST(AT91_REG *) 0x400E1020) // (PIOC) Input Filter Enable Register #define AT91C_PIOC_KKPR (AT91_CAST(AT91_REG *) 0x400E1140) // (PIOC) Keypad Controller Key Press Register #define AT91C_PIOC_MDSR (AT91_CAST(AT91_REG *) 0x400E1058) // (PIOC) Multi-driver Status Register #define AT91C_PIOC_IFDR (AT91_CAST(AT91_REG *) 0x400E1024) // (PIOC) Input Filter Disable Register #define AT91C_PIOC_MDER (AT91_CAST(AT91_REG *) 0x400E1050) // (PIOC) Multi-driver Enable Register #define AT91C_PIOC_SCDR (AT91_CAST(AT91_REG *) 0x400E108C) // (PIOC) Slow Clock Divider Debouncing Register #define AT91C_PIOC_SCIFSR (AT91_CAST(AT91_REG *) 0x400E1080) // (PIOC) System Clock Glitch Input Filter Select Register #define AT91C_PIOC_IER (AT91_CAST(AT91_REG *) 0x400E1040) // (PIOC) Interrupt Enable Register #define AT91C_PIOC_KDR (AT91_CAST(AT91_REG *) 0x400E1128) // (PIOC) Keypad Controller Debouncing Register #define AT91C_PIOC_OWDR (AT91_CAST(AT91_REG *) 0x400E10A4) // (PIOC) Output Write Disable Register #define AT91C_PIOC_IFSR (AT91_CAST(AT91_REG *) 0x400E1028) // (PIOC) Input Filter Status Register #define AT91C_PIOC_ISR (AT91_CAST(AT91_REG *) 0x400E104C) // (PIOC) Interrupt Status Register #define AT91C_PIOC_PPUDR (AT91_CAST(AT91_REG *) 0x400E1060) // (PIOC) Pull-up Disable Register #define AT91C_PIOC_PDSR (AT91_CAST(AT91_REG *) 0x400E103C) // (PIOC) Pin Data Status Register #define AT91C_PIOC_KKRR (AT91_CAST(AT91_REG *) 0x400E1144) // (PIOC) Keypad Controller Key Release Register #define AT91C_PIOC_AIMDR (AT91_CAST(AT91_REG *) 0x400E10B4) // (PIOC) Additional Interrupt Modes Disables Register #define AT91C_PIOC_LSR (AT91_CAST(AT91_REG *) 0x400E10C4) // (PIOC) Level Select Register #define AT91C_PIOC_PPUER (AT91_CAST(AT91_REG *) 0x400E1064) // (PIOC) Pull-up Enable Register #define AT91C_PIOC_AIMER (AT91_CAST(AT91_REG *) 0x400E10B0) // (PIOC) Additional Interrupt Modes Enable Register #define AT91C_PIOC_OER (AT91_CAST(AT91_REG *) 0x400E1010) // (PIOC) Output Enable Register #define AT91C_PIOC_CODR (AT91_CAST(AT91_REG *) 0x400E1034) // (PIOC) Clear Output Data Register #define AT91C_PIOC_AIMMR (AT91_CAST(AT91_REG *) 0x400E10B8) // (PIOC) Additional Interrupt Modes Mask Register #define AT91C_PIOC_OWER (AT91_CAST(AT91_REG *) 0x400E10A0) // (PIOC) Output Write Enable Register #define AT91C_PIOC_VER (AT91_CAST(AT91_REG *) 0x400E10FC) // (PIOC) PIO VERSION REGISTER #define AT91C_PIOC_IMR (AT91_CAST(AT91_REG *) 0x400E1048) // (PIOC) Interrupt Mask Register #define AT91C_PIOC_PPUSR (AT91_CAST(AT91_REG *) 0x400E1068) // (PIOC) Pull-up Status Register #define AT91C_PIOC_IDR (AT91_CAST(AT91_REG *) 0x400E1044) // (PIOC) Interrupt Disable Register #define AT91C_PIOC_DIFSR (AT91_CAST(AT91_REG *) 0x400E1084) // (PIOC) Debouncing Input Filter Select Register #define AT91C_PIOC_KIDR (AT91_CAST(AT91_REG *) 0x400E1134) // (PIOC) Keypad Controller Interrupt Disable Register #define AT91C_PIOC_KSR (AT91_CAST(AT91_REG *) 0x400E113C) // (PIOC) Keypad Controller Status Register #define AT91C_PIOC_REHLSR (AT91_CAST(AT91_REG *) 0x400E10D4) // (PIOC) Rising Edge/ High Level Select Register #define AT91C_PIOC_ESR (AT91_CAST(AT91_REG *) 0x400E10C0) // (PIOC) Edge Select Register #define AT91C_PIOC_KIER (AT91_CAST(AT91_REG *) 0x400E1130) // (PIOC) Keypad Controller Interrupt Enable Register #define AT91C_PIOC_ELSR (AT91_CAST(AT91_REG *) 0x400E10C8) // (PIOC) Edge/Level Status Register #define AT91C_PIOC_SODR (AT91_CAST(AT91_REG *) 0x400E1030) // (PIOC) Set Output Data Register #define AT91C_PIOC_PSR (AT91_CAST(AT91_REG *) 0x400E1008) // (PIOC) PIO Status Register #define AT91C_PIOC_KER (AT91_CAST(AT91_REG *) 0x400E1120) // (PIOC) Keypad Controller Enable Register #define AT91C_PIOC_ODR (AT91_CAST(AT91_REG *) 0x400E1014) // (PIOC) Output Disable Registerr #define AT91C_PIOC_OWSR (AT91_CAST(AT91_REG *) 0x400E10A8) // (PIOC) Output Write Status Register #define AT91C_PIOC_PDR (AT91_CAST(AT91_REG *) 0x400E1004) // (PIOC) PIO Disable Register #define AT91C_PIOC_LOCKSR (AT91_CAST(AT91_REG *) 0x400E10E0) // (PIOC) Lock Status Register #define AT91C_PIOC_PER (AT91_CAST(AT91_REG *) 0x400E1000) // (PIOC) PIO Enable Register // ========== Register definition for PMC peripheral ========== #define AT91C_PMC_PLLAR (AT91_CAST(AT91_REG *) 0x400E0428) // (PMC) PLL Register #define AT91C_PMC_UCKR (AT91_CAST(AT91_REG *) 0x400E041C) // (PMC) UTMI Clock Configuration Register #define AT91C_PMC_FSMR (AT91_CAST(AT91_REG *) 0x400E0470) // (PMC) Fast Startup Mode Register #define AT91C_PMC_MCKR (AT91_CAST(AT91_REG *) 0x400E0430) // (PMC) Master Clock Register #define AT91C_PMC_SCER (AT91_CAST(AT91_REG *) 0x400E0400) // (PMC) System Clock Enable Register #define AT91C_PMC_PCSR (AT91_CAST(AT91_REG *) 0x400E0418) // (PMC) Peripheral Clock Status Register #define AT91C_PMC_MCFR (AT91_CAST(AT91_REG *) 0x400E0424) // (PMC) Main Clock Frequency Register #define AT91C_PMC_FOCR (AT91_CAST(AT91_REG *) 0x400E0478) // (PMC) Fault Output Clear Register #define AT91C_PMC_FSPR (AT91_CAST(AT91_REG *) 0x400E0474) // (PMC) Fast Startup Polarity Register #define AT91C_PMC_SCSR (AT91_CAST(AT91_REG *) 0x400E0408) // (PMC) System Clock Status Register #define AT91C_PMC_IDR (AT91_CAST(AT91_REG *) 0x400E0464) // (PMC) Interrupt Disable Register #define AT91C_PMC_VER (AT91_CAST(AT91_REG *) 0x400E04FC) // (PMC) APMC VERSION REGISTER #define AT91C_PMC_IMR (AT91_CAST(AT91_REG *) 0x400E046C) // (PMC) Interrupt Mask Register #define AT91C_PMC_IPNAME2 (AT91_CAST(AT91_REG *) 0x400E04F4) // (PMC) PMC IPNAME2 REGISTER #define AT91C_PMC_SCDR (AT91_CAST(AT91_REG *) 0x400E0404) // (PMC) System Clock Disable Register #define AT91C_PMC_PCKR (AT91_CAST(AT91_REG *) 0x400E0440) // (PMC) Programmable Clock Register #define AT91C_PMC_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400E04EC) // (PMC) PMC ADDRSIZE REGISTER #define AT91C_PMC_PCDR (AT91_CAST(AT91_REG *) 0x400E0414) // (PMC) Peripheral Clock Disable Register #define AT91C_PMC_MOR (AT91_CAST(AT91_REG *) 0x400E0420) // (PMC) Main Oscillator Register #define AT91C_PMC_SR (AT91_CAST(AT91_REG *) 0x400E0468) // (PMC) Status Register #define AT91C_PMC_IER (AT91_CAST(AT91_REG *) 0x400E0460) // (PMC) Interrupt Enable Register #define AT91C_PMC_IPNAME1 (AT91_CAST(AT91_REG *) 0x400E04F0) // (PMC) PMC IPNAME1 REGISTER #define AT91C_PMC_PCER (AT91_CAST(AT91_REG *) 0x400E0410) // (PMC) Peripheral Clock Enable Register #define AT91C_PMC_FEATURES (AT91_CAST(AT91_REG *) 0x400E04F8) // (PMC) PMC FEATURES REGISTER // ========== Register definition for CKGR peripheral ========== #define AT91C_CKGR_PLLAR (AT91_CAST(AT91_REG *) 0x400E0428) // (CKGR) PLL Register #define AT91C_CKGR_UCKR (AT91_CAST(AT91_REG *) 0x400E041C) // (CKGR) UTMI Clock Configuration Register #define AT91C_CKGR_MOR (AT91_CAST(AT91_REG *) 0x400E0420) // (CKGR) Main Oscillator Register #define AT91C_CKGR_MCFR (AT91_CAST(AT91_REG *) 0x400E0424) // (CKGR) Main Clock Frequency Register // ========== Register definition for RSTC peripheral ========== #define AT91C_RSTC_VER (AT91_CAST(AT91_REG *) 0x400E12FC) // (RSTC) Version Register #define AT91C_RSTC_RCR (AT91_CAST(AT91_REG *) 0x400E1200) // (RSTC) Reset Control Register #define AT91C_RSTC_RMR (AT91_CAST(AT91_REG *) 0x400E1208) // (RSTC) Reset Mode Register #define AT91C_RSTC_RSR (AT91_CAST(AT91_REG *) 0x400E1204) // (RSTC) Reset Status Register // ========== Register definition for SUPC peripheral ========== #define AT91C_SUPC_CR (AT91_CAST(AT91_REG *) 0x400E1210) // (SUPC) Supply Controller Control Register #define AT91C_SUPC_SMMR (AT91_CAST(AT91_REG *) 0x400E1214) // (SUPC) Supply Controller Supply Monitor Mode Register #define AT91C_SUPC_MR (AT91_CAST(AT91_REG *) 0x400E1218) // (SUPC) Supply Controller Mode Register #define AT91C_SUPC_WUMR (AT91_CAST(AT91_REG *) 0x400E121C) // (SUPC) Supply Controller Wake Up Mode Register #define AT91C_SUPC_WUIR (AT91_CAST(AT91_REG *) 0x400E1220) // (SUPC) Supply Controller Wake Up Inputs Register #define AT91C_SUPC_SR (AT91_CAST(AT91_REG *) 0x400E1224) // (SUPC) Supply Controller Status Register // ========== Register definition for RTTC peripheral ========== #define AT91C_RTTC_RTVR (AT91_CAST(AT91_REG *) 0x400E1238) // (RTTC) Real-time Value Register #define AT91C_RTTC_RTAR (AT91_CAST(AT91_REG *) 0x400E1234) // (RTTC) Real-time Alarm Register #define AT91C_RTTC_RTMR (AT91_CAST(AT91_REG *) 0x400E1230) // (RTTC) Real-time Mode Register #define AT91C_RTTC_RTSR (AT91_CAST(AT91_REG *) 0x400E123C) // (RTTC) Real-time Status Register // ========== Register definition for WDTC peripheral ========== #define AT91C_WDTC_WDSR (AT91_CAST(AT91_REG *) 0x400E1258) // (WDTC) Watchdog Status Register #define AT91C_WDTC_WDMR (AT91_CAST(AT91_REG *) 0x400E1254) // (WDTC) Watchdog Mode Register #define AT91C_WDTC_WDCR (AT91_CAST(AT91_REG *) 0x400E1250) // (WDTC) Watchdog Control Register // ========== Register definition for RTC peripheral ========== #define AT91C_RTC_IMR (AT91_CAST(AT91_REG *) 0x400E1288) // (RTC) Interrupt Mask Register #define AT91C_RTC_SCCR (AT91_CAST(AT91_REG *) 0x400E127C) // (RTC) Status Clear Command Register #define AT91C_RTC_CALR (AT91_CAST(AT91_REG *) 0x400E126C) // (RTC) Calendar Register #define AT91C_RTC_MR (AT91_CAST(AT91_REG *) 0x400E1264) // (RTC) Mode Register #define AT91C_RTC_TIMR (AT91_CAST(AT91_REG *) 0x400E1268) // (RTC) Time Register #define AT91C_RTC_CALALR (AT91_CAST(AT91_REG *) 0x400E1274) // (RTC) Calendar Alarm Register #define AT91C_RTC_VER (AT91_CAST(AT91_REG *) 0x400E128C) // (RTC) Valid Entry Register #define AT91C_RTC_CR (AT91_CAST(AT91_REG *) 0x400E1260) // (RTC) Control Register #define AT91C_RTC_IDR (AT91_CAST(AT91_REG *) 0x400E1284) // (RTC) Interrupt Disable Register #define AT91C_RTC_TIMALR (AT91_CAST(AT91_REG *) 0x400E1270) // (RTC) Time Alarm Register #define AT91C_RTC_IER (AT91_CAST(AT91_REG *) 0x400E1280) // (RTC) Interrupt Enable Register #define AT91C_RTC_SR (AT91_CAST(AT91_REG *) 0x400E1278) // (RTC) Status Register // ========== Register definition for ADC0 peripheral ========== #define AT91C_ADC0_IPNAME2 (AT91_CAST(AT91_REG *) 0x400AC0F4) // (ADC0) ADC IPNAME2 REGISTER #define AT91C_ADC0_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400AC0EC) // (ADC0) ADC ADDRSIZE REGISTER #define AT91C_ADC0_IDR (AT91_CAST(AT91_REG *) 0x400AC028) // (ADC0) ADC Interrupt Disable Register #define AT91C_ADC0_CHSR (AT91_CAST(AT91_REG *) 0x400AC018) // (ADC0) ADC Channel Status Register #define AT91C_ADC0_FEATURES (AT91_CAST(AT91_REG *) 0x400AC0F8) // (ADC0) ADC FEATURES REGISTER #define AT91C_ADC0_CDR0 (AT91_CAST(AT91_REG *) 0x400AC030) // (ADC0) ADC Channel Data Register 0 #define AT91C_ADC0_LCDR (AT91_CAST(AT91_REG *) 0x400AC020) // (ADC0) ADC Last Converted Data Register #define AT91C_ADC0_EMR (AT91_CAST(AT91_REG *) 0x400AC068) // (ADC0) Extended Mode Register #define AT91C_ADC0_CDR3 (AT91_CAST(AT91_REG *) 0x400AC03C) // (ADC0) ADC Channel Data Register 3 #define AT91C_ADC0_CDR7 (AT91_CAST(AT91_REG *) 0x400AC04C) // (ADC0) ADC Channel Data Register 7 #define AT91C_ADC0_SR (AT91_CAST(AT91_REG *) 0x400AC01C) // (ADC0) ADC Status Register #define AT91C_ADC0_ACR (AT91_CAST(AT91_REG *) 0x400AC064) // (ADC0) Analog Control Register #define AT91C_ADC0_CDR5 (AT91_CAST(AT91_REG *) 0x400AC044) // (ADC0) ADC Channel Data Register 5 #define AT91C_ADC0_IPNAME1 (AT91_CAST(AT91_REG *) 0x400AC0F0) // (ADC0) ADC IPNAME1 REGISTER #define AT91C_ADC0_CDR6 (AT91_CAST(AT91_REG *) 0x400AC048) // (ADC0) ADC Channel Data Register 6 #define AT91C_ADC0_MR (AT91_CAST(AT91_REG *) 0x400AC004) // (ADC0) ADC Mode Register #define AT91C_ADC0_CDR1 (AT91_CAST(AT91_REG *) 0x400AC034) // (ADC0) ADC Channel Data Register 1 #define AT91C_ADC0_CDR2 (AT91_CAST(AT91_REG *) 0x400AC038) // (ADC0) ADC Channel Data Register 2 #define AT91C_ADC0_CDR4 (AT91_CAST(AT91_REG *) 0x400AC040) // (ADC0) ADC Channel Data Register 4 #define AT91C_ADC0_CHER (AT91_CAST(AT91_REG *) 0x400AC010) // (ADC0) ADC Channel Enable Register #define AT91C_ADC0_VER (AT91_CAST(AT91_REG *) 0x400AC0FC) // (ADC0) ADC VERSION REGISTER #define AT91C_ADC0_CHDR (AT91_CAST(AT91_REG *) 0x400AC014) // (ADC0) ADC Channel Disable Register #define AT91C_ADC0_CR (AT91_CAST(AT91_REG *) 0x400AC000) // (ADC0) ADC Control Register #define AT91C_ADC0_IMR (AT91_CAST(AT91_REG *) 0x400AC02C) // (ADC0) ADC Interrupt Mask Register #define AT91C_ADC0_IER (AT91_CAST(AT91_REG *) 0x400AC024) // (ADC0) ADC Interrupt Enable Register // ========== Register definition for ADC12B peripheral ========== #define AT91C_ADC12B_CR (AT91_CAST(AT91_REG *) 0x400A8000) // (ADC12B) Control Register #define AT91C_ADC12B_MR (AT91_CAST(AT91_REG *) 0x400A8004) // (ADC12B) Mode Register #define AT91C_ADC12B_CHER (AT91_CAST(AT91_REG *) 0x400A8010) // (ADC12B) Channel Enable Register #define AT91C_ADC12B_CHDR (AT91_CAST(AT91_REG *) 0x400A8014) // (ADC12B) Channel Disable Register #define AT91C_ADC12B_CHSR (AT91_CAST(AT91_REG *) 0x400A8018) // (ADC12B) Channel Status Register #define AT91C_ADC12B_SR (AT91_CAST(AT91_REG *) 0x400A801C) // (ADC12B) Status Register #define AT91C_ADC12B_LCDR (AT91_CAST(AT91_REG *) 0x400A8020) // (ADC12B) Last Converted Data Register #define AT91C_ADC12B_IER (AT91_CAST(AT91_REG *) 0x400A8024) // (ADC12B) Interrupt Enable Register #define AT91C_ADC12B_IDR (AT91_CAST(AT91_REG *) 0x400A8028) // (ADC12B) Interrupt Disable Register #define AT91C_ADC12B_IMR (AT91_CAST(AT91_REG *) 0x400A802C) // (ADC12B) Interrupt Mask Register #define AT91C_ADC12B_CDR (AT91_CAST(AT91_REG *) 0x400A8030) // (ADC12B) Channel Data Register #define AT91C_ADC12B_ACR (AT91_CAST(AT91_REG *) 0x400A8064) // (ADC12B) Analog Control Register #define AT91C_ADC12B_EMR (AT91_CAST(AT91_REG *) 0x400A8068) // (ADC12B) Extended Mode Register // ========== Register definition for TC0 peripheral ========== #define AT91C_TC0_IER (AT91_CAST(AT91_REG *) 0x40080024) // (TC0) Interrupt Enable Register #define AT91C_TC0_CV (AT91_CAST(AT91_REG *) 0x40080010) // (TC0) Counter Value #define AT91C_TC0_RA (AT91_CAST(AT91_REG *) 0x40080014) // (TC0) Register A #define AT91C_TC0_RB (AT91_CAST(AT91_REG *) 0x40080018) // (TC0) Register B #define AT91C_TC0_IDR (AT91_CAST(AT91_REG *) 0x40080028) // (TC0) Interrupt Disable Register #define AT91C_TC0_SR (AT91_CAST(AT91_REG *) 0x40080020) // (TC0) Status Register #define AT91C_TC0_IMR (AT91_CAST(AT91_REG *) 0x4008002C) // (TC0) Interrupt Mask Register #define AT91C_TC0_CMR (AT91_CAST(AT91_REG *) 0x40080004) // (TC0) Channel Mode Register (Capture Mode / Waveform Mode) #define AT91C_TC0_RC (AT91_CAST(AT91_REG *) 0x4008001C) // (TC0) Register C #define AT91C_TC0_CCR (AT91_CAST(AT91_REG *) 0x40080000) // (TC0) Channel Control Register // ========== Register definition for TC1 peripheral ========== #define AT91C_TC1_SR (AT91_CAST(AT91_REG *) 0x40080060) // (TC1) Status Register #define AT91C_TC1_RA (AT91_CAST(AT91_REG *) 0x40080054) // (TC1) Register A #define AT91C_TC1_IER (AT91_CAST(AT91_REG *) 0x40080064) // (TC1) Interrupt Enable Register #define AT91C_TC1_RB (AT91_CAST(AT91_REG *) 0x40080058) // (TC1) Register B #define AT91C_TC1_IDR (AT91_CAST(AT91_REG *) 0x40080068) // (TC1) Interrupt Disable Register #define AT91C_TC1_CCR (AT91_CAST(AT91_REG *) 0x40080040) // (TC1) Channel Control Register #define AT91C_TC1_IMR (AT91_CAST(AT91_REG *) 0x4008006C) // (TC1) Interrupt Mask Register #define AT91C_TC1_RC (AT91_CAST(AT91_REG *) 0x4008005C) // (TC1) Register C #define AT91C_TC1_CMR (AT91_CAST(AT91_REG *) 0x40080044) // (TC1) Channel Mode Register (Capture Mode / Waveform Mode) #define AT91C_TC1_CV (AT91_CAST(AT91_REG *) 0x40080050) // (TC1) Counter Value // ========== Register definition for TC2 peripheral ========== #define AT91C_TC2_RA (AT91_CAST(AT91_REG *) 0x40080094) // (TC2) Register A #define AT91C_TC2_RB (AT91_CAST(AT91_REG *) 0x40080098) // (TC2) Register B #define AT91C_TC2_CMR (AT91_CAST(AT91_REG *) 0x40080084) // (TC2) Channel Mode Register (Capture Mode / Waveform Mode) #define AT91C_TC2_SR (AT91_CAST(AT91_REG *) 0x400800A0) // (TC2) Status Register #define AT91C_TC2_CCR (AT91_CAST(AT91_REG *) 0x40080080) // (TC2) Channel Control Register #define AT91C_TC2_IMR (AT91_CAST(AT91_REG *) 0x400800AC) // (TC2) Interrupt Mask Register #define AT91C_TC2_CV (AT91_CAST(AT91_REG *) 0x40080090) // (TC2) Counter Value #define AT91C_TC2_RC (AT91_CAST(AT91_REG *) 0x4008009C) // (TC2) Register C #define AT91C_TC2_IER (AT91_CAST(AT91_REG *) 0x400800A4) // (TC2) Interrupt Enable Register #define AT91C_TC2_IDR (AT91_CAST(AT91_REG *) 0x400800A8) // (TC2) Interrupt Disable Register // ========== Register definition for TCB0 peripheral ========== #define AT91C_TCB0_BCR (AT91_CAST(AT91_REG *) 0x400800C0) // (TCB0) TC Block Control Register #define AT91C_TCB0_IPNAME2 (AT91_CAST(AT91_REG *) 0x400800F4) // (TCB0) TC IPNAME2 REGISTER #define AT91C_TCB0_IPNAME1 (AT91_CAST(AT91_REG *) 0x400800F0) // (TCB0) TC IPNAME1 REGISTER #define AT91C_TCB0_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400800EC) // (TCB0) TC ADDRSIZE REGISTER #define AT91C_TCB0_FEATURES (AT91_CAST(AT91_REG *) 0x400800F8) // (TCB0) TC FEATURES REGISTER #define AT91C_TCB0_BMR (AT91_CAST(AT91_REG *) 0x400800C4) // (TCB0) TC Block Mode Register #define AT91C_TCB0_VER (AT91_CAST(AT91_REG *) 0x400800FC) // (TCB0) Version Register // ========== Register definition for TCB1 peripheral ========== #define AT91C_TCB1_BCR (AT91_CAST(AT91_REG *) 0x40080100) // (TCB1) TC Block Control Register #define AT91C_TCB1_VER (AT91_CAST(AT91_REG *) 0x4008013C) // (TCB1) Version Register #define AT91C_TCB1_FEATURES (AT91_CAST(AT91_REG *) 0x40080138) // (TCB1) TC FEATURES REGISTER #define AT91C_TCB1_IPNAME2 (AT91_CAST(AT91_REG *) 0x40080134) // (TCB1) TC IPNAME2 REGISTER #define AT91C_TCB1_BMR (AT91_CAST(AT91_REG *) 0x40080104) // (TCB1) TC Block Mode Register #define AT91C_TCB1_ADDRSIZE (AT91_CAST(AT91_REG *) 0x4008012C) // (TCB1) TC ADDRSIZE REGISTER #define AT91C_TCB1_IPNAME1 (AT91_CAST(AT91_REG *) 0x40080130) // (TCB1) TC IPNAME1 REGISTER // ========== Register definition for TCB2 peripheral ========== #define AT91C_TCB2_FEATURES (AT91_CAST(AT91_REG *) 0x40080178) // (TCB2) TC FEATURES REGISTER #define AT91C_TCB2_VER (AT91_CAST(AT91_REG *) 0x4008017C) // (TCB2) Version Register #define AT91C_TCB2_ADDRSIZE (AT91_CAST(AT91_REG *) 0x4008016C) // (TCB2) TC ADDRSIZE REGISTER #define AT91C_TCB2_IPNAME1 (AT91_CAST(AT91_REG *) 0x40080170) // (TCB2) TC IPNAME1 REGISTER #define AT91C_TCB2_IPNAME2 (AT91_CAST(AT91_REG *) 0x40080174) // (TCB2) TC IPNAME2 REGISTER #define AT91C_TCB2_BMR (AT91_CAST(AT91_REG *) 0x40080144) // (TCB2) TC Block Mode Register #define AT91C_TCB2_BCR (AT91_CAST(AT91_REG *) 0x40080140) // (TCB2) TC Block Control Register // ========== Register definition for EFC0 peripheral ========== #define AT91C_EFC0_FCR (AT91_CAST(AT91_REG *) 0x400E0804) // (EFC0) EFC Flash Command Register #define AT91C_EFC0_FRR (AT91_CAST(AT91_REG *) 0x400E080C) // (EFC0) EFC Flash Result Register #define AT91C_EFC0_FMR (AT91_CAST(AT91_REG *) 0x400E0800) // (EFC0) EFC Flash Mode Register #define AT91C_EFC0_FSR (AT91_CAST(AT91_REG *) 0x400E0808) // (EFC0) EFC Flash Status Register #define AT91C_EFC0_FVR (AT91_CAST(AT91_REG *) 0x400E0814) // (EFC0) EFC Flash Version Register // ========== Register definition for EFC1 peripheral ========== #define AT91C_EFC1_FMR (AT91_CAST(AT91_REG *) 0x400E0A00) // (EFC1) EFC Flash Mode Register #define AT91C_EFC1_FVR (AT91_CAST(AT91_REG *) 0x400E0A14) // (EFC1) EFC Flash Version Register #define AT91C_EFC1_FSR (AT91_CAST(AT91_REG *) 0x400E0A08) // (EFC1) EFC Flash Status Register #define AT91C_EFC1_FCR (AT91_CAST(AT91_REG *) 0x400E0A04) // (EFC1) EFC Flash Command Register #define AT91C_EFC1_FRR (AT91_CAST(AT91_REG *) 0x400E0A0C) // (EFC1) EFC Flash Result Register // ========== Register definition for MCI0 peripheral ========== #define AT91C_MCI0_DMA (AT91_CAST(AT91_REG *) 0x40000050) // (MCI0) MCI DMA Configuration Register #define AT91C_MCI0_SDCR (AT91_CAST(AT91_REG *) 0x4000000C) // (MCI0) MCI SD/SDIO Card Register #define AT91C_MCI0_IPNAME1 (AT91_CAST(AT91_REG *) 0x400000F0) // (MCI0) MCI IPNAME1 REGISTER #define AT91C_MCI0_CSTOR (AT91_CAST(AT91_REG *) 0x4000001C) // (MCI0) MCI Completion Signal Timeout Register #define AT91C_MCI0_RDR (AT91_CAST(AT91_REG *) 0x40000030) // (MCI0) MCI Receive Data Register #define AT91C_MCI0_CMDR (AT91_CAST(AT91_REG *) 0x40000014) // (MCI0) MCI Command Register #define AT91C_MCI0_IDR (AT91_CAST(AT91_REG *) 0x40000048) // (MCI0) MCI Interrupt Disable Register #define AT91C_MCI0_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400000EC) // (MCI0) MCI ADDRSIZE REGISTER #define AT91C_MCI0_WPCR (AT91_CAST(AT91_REG *) 0x400000E4) // (MCI0) MCI Write Protection Control Register #define AT91C_MCI0_RSPR (AT91_CAST(AT91_REG *) 0x40000020) // (MCI0) MCI Response Register #define AT91C_MCI0_IPNAME2 (AT91_CAST(AT91_REG *) 0x400000F4) // (MCI0) MCI IPNAME2 REGISTER #define AT91C_MCI0_CR (AT91_CAST(AT91_REG *) 0x40000000) // (MCI0) MCI Control Register #define AT91C_MCI0_IMR (AT91_CAST(AT91_REG *) 0x4000004C) // (MCI0) MCI Interrupt Mask Register #define AT91C_MCI0_WPSR (AT91_CAST(AT91_REG *) 0x400000E8) // (MCI0) MCI Write Protection Status Register #define AT91C_MCI0_DTOR (AT91_CAST(AT91_REG *) 0x40000008) // (MCI0) MCI Data Timeout Register #define AT91C_MCI0_MR (AT91_CAST(AT91_REG *) 0x40000004) // (MCI0) MCI Mode Register #define AT91C_MCI0_SR (AT91_CAST(AT91_REG *) 0x40000040) // (MCI0) MCI Status Register #define AT91C_MCI0_IER (AT91_CAST(AT91_REG *) 0x40000044) // (MCI0) MCI Interrupt Enable Register #define AT91C_MCI0_VER (AT91_CAST(AT91_REG *) 0x400000FC) // (MCI0) MCI VERSION REGISTER #define AT91C_MCI0_FEATURES (AT91_CAST(AT91_REG *) 0x400000F8) // (MCI0) MCI FEATURES REGISTER #define AT91C_MCI0_BLKR (AT91_CAST(AT91_REG *) 0x40000018) // (MCI0) MCI Block Register #define AT91C_MCI0_ARGR (AT91_CAST(AT91_REG *) 0x40000010) // (MCI0) MCI Argument Register #define AT91C_MCI0_FIFO (AT91_CAST(AT91_REG *) 0x40000200) // (MCI0) MCI FIFO Aperture Register #define AT91C_MCI0_TDR (AT91_CAST(AT91_REG *) 0x40000034) // (MCI0) MCI Transmit Data Register #define AT91C_MCI0_CFG (AT91_CAST(AT91_REG *) 0x40000054) // (MCI0) MCI Configuration Register // ========== Register definition for PDC_TWI0 peripheral ========== #define AT91C_TWI0_TNCR (AT91_CAST(AT91_REG *) 0x4008411C) // (PDC_TWI0) Transmit Next Counter Register #define AT91C_TWI0_PTCR (AT91_CAST(AT91_REG *) 0x40084120) // (PDC_TWI0) PDC Transfer Control Register #define AT91C_TWI0_PTSR (AT91_CAST(AT91_REG *) 0x40084124) // (PDC_TWI0) PDC Transfer Status Register #define AT91C_TWI0_RCR (AT91_CAST(AT91_REG *) 0x40084104) // (PDC_TWI0) Receive Counter Register #define AT91C_TWI0_TNPR (AT91_CAST(AT91_REG *) 0x40084118) // (PDC_TWI0) Transmit Next Pointer Register #define AT91C_TWI0_RNPR (AT91_CAST(AT91_REG *) 0x40084110) // (PDC_TWI0) Receive Next Pointer Register #define AT91C_TWI0_RPR (AT91_CAST(AT91_REG *) 0x40084100) // (PDC_TWI0) Receive Pointer Register #define AT91C_TWI0_RNCR (AT91_CAST(AT91_REG *) 0x40084114) // (PDC_TWI0) Receive Next Counter Register #define AT91C_TWI0_TPR (AT91_CAST(AT91_REG *) 0x40084108) // (PDC_TWI0) Transmit Pointer Register #define AT91C_TWI0_TCR (AT91_CAST(AT91_REG *) 0x4008410C) // (PDC_TWI0) Transmit Counter Register // ========== Register definition for PDC_TWI1 peripheral ========== #define AT91C_TWI1_TNCR (AT91_CAST(AT91_REG *) 0x4008811C) // (PDC_TWI1) Transmit Next Counter Register #define AT91C_TWI1_PTCR (AT91_CAST(AT91_REG *) 0x40088120) // (PDC_TWI1) PDC Transfer Control Register #define AT91C_TWI1_RNCR (AT91_CAST(AT91_REG *) 0x40088114) // (PDC_TWI1) Receive Next Counter Register #define AT91C_TWI1_RCR (AT91_CAST(AT91_REG *) 0x40088104) // (PDC_TWI1) Receive Counter Register #define AT91C_TWI1_RPR (AT91_CAST(AT91_REG *) 0x40088100) // (PDC_TWI1) Receive Pointer Register #define AT91C_TWI1_TNPR (AT91_CAST(AT91_REG *) 0x40088118) // (PDC_TWI1) Transmit Next Pointer Register #define AT91C_TWI1_RNPR (AT91_CAST(AT91_REG *) 0x40088110) // (PDC_TWI1) Receive Next Pointer Register #define AT91C_TWI1_TCR (AT91_CAST(AT91_REG *) 0x4008810C) // (PDC_TWI1) Transmit Counter Register #define AT91C_TWI1_TPR (AT91_CAST(AT91_REG *) 0x40088108) // (PDC_TWI1) Transmit Pointer Register #define AT91C_TWI1_PTSR (AT91_CAST(AT91_REG *) 0x40088124) // (PDC_TWI1) PDC Transfer Status Register // ========== Register definition for TWI0 peripheral ========== #define AT91C_TWI0_FEATURES (AT91_CAST(AT91_REG *) 0x400840F8) // (TWI0) TWI FEATURES REGISTER #define AT91C_TWI0_IPNAME1 (AT91_CAST(AT91_REG *) 0x400840F0) // (TWI0) TWI IPNAME1 REGISTER #define AT91C_TWI0_SMR (AT91_CAST(AT91_REG *) 0x40084008) // (TWI0) Slave Mode Register #define AT91C_TWI0_MMR (AT91_CAST(AT91_REG *) 0x40084004) // (TWI0) Master Mode Register #define AT91C_TWI0_SR (AT91_CAST(AT91_REG *) 0x40084020) // (TWI0) Status Register #define AT91C_TWI0_IPNAME2 (AT91_CAST(AT91_REG *) 0x400840F4) // (TWI0) TWI IPNAME2 REGISTER #define AT91C_TWI0_CR (AT91_CAST(AT91_REG *) 0x40084000) // (TWI0) Control Register #define AT91C_TWI0_IER (AT91_CAST(AT91_REG *) 0x40084024) // (TWI0) Interrupt Enable Register #define AT91C_TWI0_RHR (AT91_CAST(AT91_REG *) 0x40084030) // (TWI0) Receive Holding Register #define AT91C_TWI0_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400840EC) // (TWI0) TWI ADDRSIZE REGISTER #define AT91C_TWI0_THR (AT91_CAST(AT91_REG *) 0x40084034) // (TWI0) Transmit Holding Register #define AT91C_TWI0_VER (AT91_CAST(AT91_REG *) 0x400840FC) // (TWI0) Version Register #define AT91C_TWI0_IADR (AT91_CAST(AT91_REG *) 0x4008400C) // (TWI0) Internal Address Register #define AT91C_TWI0_IMR (AT91_CAST(AT91_REG *) 0x4008402C) // (TWI0) Interrupt Mask Register #define AT91C_TWI0_CWGR (AT91_CAST(AT91_REG *) 0x40084010) // (TWI0) Clock Waveform Generator Register #define AT91C_TWI0_IDR (AT91_CAST(AT91_REG *) 0x40084028) // (TWI0) Interrupt Disable Register // ========== Register definition for TWI1 peripheral ========== #define AT91C_TWI1_VER (AT91_CAST(AT91_REG *) 0x400880FC) // (TWI1) Version Register #define AT91C_TWI1_IDR (AT91_CAST(AT91_REG *) 0x40088028) // (TWI1) Interrupt Disable Register #define AT91C_TWI1_IPNAME2 (AT91_CAST(AT91_REG *) 0x400880F4) // (TWI1) TWI IPNAME2 REGISTER #define AT91C_TWI1_CWGR (AT91_CAST(AT91_REG *) 0x40088010) // (TWI1) Clock Waveform Generator Register #define AT91C_TWI1_CR (AT91_CAST(AT91_REG *) 0x40088000) // (TWI1) Control Register #define AT91C_TWI1_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400880EC) // (TWI1) TWI ADDRSIZE REGISTER #define AT91C_TWI1_IADR (AT91_CAST(AT91_REG *) 0x4008800C) // (TWI1) Internal Address Register #define AT91C_TWI1_IER (AT91_CAST(AT91_REG *) 0x40088024) // (TWI1) Interrupt Enable Register #define AT91C_TWI1_SMR (AT91_CAST(AT91_REG *) 0x40088008) // (TWI1) Slave Mode Register #define AT91C_TWI1_RHR (AT91_CAST(AT91_REG *) 0x40088030) // (TWI1) Receive Holding Register #define AT91C_TWI1_FEATURES (AT91_CAST(AT91_REG *) 0x400880F8) // (TWI1) TWI FEATURES REGISTER #define AT91C_TWI1_IMR (AT91_CAST(AT91_REG *) 0x4008802C) // (TWI1) Interrupt Mask Register #define AT91C_TWI1_SR (AT91_CAST(AT91_REG *) 0x40088020) // (TWI1) Status Register #define AT91C_TWI1_THR (AT91_CAST(AT91_REG *) 0x40088034) // (TWI1) Transmit Holding Register #define AT91C_TWI1_MMR (AT91_CAST(AT91_REG *) 0x40088004) // (TWI1) Master Mode Register #define AT91C_TWI1_IPNAME1 (AT91_CAST(AT91_REG *) 0x400880F0) // (TWI1) TWI IPNAME1 REGISTER // ========== Register definition for PDC_US0 peripheral ========== #define AT91C_US0_RNCR (AT91_CAST(AT91_REG *) 0x40090114) // (PDC_US0) Receive Next Counter Register #define AT91C_US0_TNPR (AT91_CAST(AT91_REG *) 0x40090118) // (PDC_US0) Transmit Next Pointer Register #define AT91C_US0_TPR (AT91_CAST(AT91_REG *) 0x40090108) // (PDC_US0) Transmit Pointer Register #define AT91C_US0_RCR (AT91_CAST(AT91_REG *) 0x40090104) // (PDC_US0) Receive Counter Register #define AT91C_US0_RNPR (AT91_CAST(AT91_REG *) 0x40090110) // (PDC_US0) Receive Next Pointer Register #define AT91C_US0_TNCR (AT91_CAST(AT91_REG *) 0x4009011C) // (PDC_US0) Transmit Next Counter Register #define AT91C_US0_PTSR (AT91_CAST(AT91_REG *) 0x40090124) // (PDC_US0) PDC Transfer Status Register #define AT91C_US0_RPR (AT91_CAST(AT91_REG *) 0x40090100) // (PDC_US0) Receive Pointer Register #define AT91C_US0_PTCR (AT91_CAST(AT91_REG *) 0x40090120) // (PDC_US0) PDC Transfer Control Register #define AT91C_US0_TCR (AT91_CAST(AT91_REG *) 0x4009010C) // (PDC_US0) Transmit Counter Register // ========== Register definition for US0 peripheral ========== #define AT91C_US0_NER (AT91_CAST(AT91_REG *) 0x40090044) // (US0) Nb Errors Register #define AT91C_US0_RHR (AT91_CAST(AT91_REG *) 0x40090018) // (US0) Receiver Holding Register #define AT91C_US0_IPNAME1 (AT91_CAST(AT91_REG *) 0x400900F0) // (US0) US IPNAME1 REGISTER #define AT91C_US0_MR (AT91_CAST(AT91_REG *) 0x40090004) // (US0) Mode Register #define AT91C_US0_RTOR (AT91_CAST(AT91_REG *) 0x40090024) // (US0) Receiver Time-out Register #define AT91C_US0_IF (AT91_CAST(AT91_REG *) 0x4009004C) // (US0) IRDA_FILTER Register #define AT91C_US0_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400900EC) // (US0) US ADDRSIZE REGISTER #define AT91C_US0_IDR (AT91_CAST(AT91_REG *) 0x4009000C) // (US0) Interrupt Disable Register #define AT91C_US0_IMR (AT91_CAST(AT91_REG *) 0x40090010) // (US0) Interrupt Mask Register #define AT91C_US0_IER (AT91_CAST(AT91_REG *) 0x40090008) // (US0) Interrupt Enable Register #define AT91C_US0_TTGR (AT91_CAST(AT91_REG *) 0x40090028) // (US0) Transmitter Time-guard Register #define AT91C_US0_IPNAME2 (AT91_CAST(AT91_REG *) 0x400900F4) // (US0) US IPNAME2 REGISTER #define AT91C_US0_FIDI (AT91_CAST(AT91_REG *) 0x40090040) // (US0) FI_DI_Ratio Register #define AT91C_US0_CR (AT91_CAST(AT91_REG *) 0x40090000) // (US0) Control Register #define AT91C_US0_BRGR (AT91_CAST(AT91_REG *) 0x40090020) // (US0) Baud Rate Generator Register #define AT91C_US0_MAN (AT91_CAST(AT91_REG *) 0x40090050) // (US0) Manchester Encoder Decoder Register #define AT91C_US0_VER (AT91_CAST(AT91_REG *) 0x400900FC) // (US0) VERSION Register #define AT91C_US0_FEATURES (AT91_CAST(AT91_REG *) 0x400900F8) // (US0) US FEATURES REGISTER #define AT91C_US0_CSR (AT91_CAST(AT91_REG *) 0x40090014) // (US0) Channel Status Register #define AT91C_US0_THR (AT91_CAST(AT91_REG *) 0x4009001C) // (US0) Transmitter Holding Register // ========== Register definition for PDC_US1 peripheral ========== #define AT91C_US1_TNPR (AT91_CAST(AT91_REG *) 0x40094118) // (PDC_US1) Transmit Next Pointer Register #define AT91C_US1_TPR (AT91_CAST(AT91_REG *) 0x40094108) // (PDC_US1) Transmit Pointer Register #define AT91C_US1_RNCR (AT91_CAST(AT91_REG *) 0x40094114) // (PDC_US1) Receive Next Counter Register #define AT91C_US1_TNCR (AT91_CAST(AT91_REG *) 0x4009411C) // (PDC_US1) Transmit Next Counter Register #define AT91C_US1_RNPR (AT91_CAST(AT91_REG *) 0x40094110) // (PDC_US1) Receive Next Pointer Register #define AT91C_US1_TCR (AT91_CAST(AT91_REG *) 0x4009410C) // (PDC_US1) Transmit Counter Register #define AT91C_US1_PTSR (AT91_CAST(AT91_REG *) 0x40094124) // (PDC_US1) PDC Transfer Status Register #define AT91C_US1_RCR (AT91_CAST(AT91_REG *) 0x40094104) // (PDC_US1) Receive Counter Register #define AT91C_US1_RPR (AT91_CAST(AT91_REG *) 0x40094100) // (PDC_US1) Receive Pointer Register #define AT91C_US1_PTCR (AT91_CAST(AT91_REG *) 0x40094120) // (PDC_US1) PDC Transfer Control Register // ========== Register definition for US1 peripheral ========== #define AT91C_US1_IMR (AT91_CAST(AT91_REG *) 0x40094010) // (US1) Interrupt Mask Register #define AT91C_US1_RTOR (AT91_CAST(AT91_REG *) 0x40094024) // (US1) Receiver Time-out Register #define AT91C_US1_RHR (AT91_CAST(AT91_REG *) 0x40094018) // (US1) Receiver Holding Register #define AT91C_US1_IPNAME1 (AT91_CAST(AT91_REG *) 0x400940F0) // (US1) US IPNAME1 REGISTER #define AT91C_US1_VER (AT91_CAST(AT91_REG *) 0x400940FC) // (US1) VERSION Register #define AT91C_US1_MR (AT91_CAST(AT91_REG *) 0x40094004) // (US1) Mode Register #define AT91C_US1_FEATURES (AT91_CAST(AT91_REG *) 0x400940F8) // (US1) US FEATURES REGISTER #define AT91C_US1_NER (AT91_CAST(AT91_REG *) 0x40094044) // (US1) Nb Errors Register #define AT91C_US1_IPNAME2 (AT91_CAST(AT91_REG *) 0x400940F4) // (US1) US IPNAME2 REGISTER #define AT91C_US1_CR (AT91_CAST(AT91_REG *) 0x40094000) // (US1) Control Register #define AT91C_US1_BRGR (AT91_CAST(AT91_REG *) 0x40094020) // (US1) Baud Rate Generator Register #define AT91C_US1_IF (AT91_CAST(AT91_REG *) 0x4009404C) // (US1) IRDA_FILTER Register #define AT91C_US1_IER (AT91_CAST(AT91_REG *) 0x40094008) // (US1) Interrupt Enable Register #define AT91C_US1_TTGR (AT91_CAST(AT91_REG *) 0x40094028) // (US1) Transmitter Time-guard Register #define AT91C_US1_FIDI (AT91_CAST(AT91_REG *) 0x40094040) // (US1) FI_DI_Ratio Register #define AT91C_US1_MAN (AT91_CAST(AT91_REG *) 0x40094050) // (US1) Manchester Encoder Decoder Register #define AT91C_US1_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400940EC) // (US1) US ADDRSIZE REGISTER #define AT91C_US1_CSR (AT91_CAST(AT91_REG *) 0x40094014) // (US1) Channel Status Register #define AT91C_US1_THR (AT91_CAST(AT91_REG *) 0x4009401C) // (US1) Transmitter Holding Register #define AT91C_US1_IDR (AT91_CAST(AT91_REG *) 0x4009400C) // (US1) Interrupt Disable Register // ========== Register definition for PDC_US2 peripheral ========== #define AT91C_US2_RPR (AT91_CAST(AT91_REG *) 0x40098100) // (PDC_US2) Receive Pointer Register #define AT91C_US2_TPR (AT91_CAST(AT91_REG *) 0x40098108) // (PDC_US2) Transmit Pointer Register #define AT91C_US2_TCR (AT91_CAST(AT91_REG *) 0x4009810C) // (PDC_US2) Transmit Counter Register #define AT91C_US2_PTSR (AT91_CAST(AT91_REG *) 0x40098124) // (PDC_US2) PDC Transfer Status Register #define AT91C_US2_PTCR (AT91_CAST(AT91_REG *) 0x40098120) // (PDC_US2) PDC Transfer Control Register #define AT91C_US2_RNPR (AT91_CAST(AT91_REG *) 0x40098110) // (PDC_US2) Receive Next Pointer Register #define AT91C_US2_TNCR (AT91_CAST(AT91_REG *) 0x4009811C) // (PDC_US2) Transmit Next Counter Register #define AT91C_US2_RNCR (AT91_CAST(AT91_REG *) 0x40098114) // (PDC_US2) Receive Next Counter Register #define AT91C_US2_TNPR (AT91_CAST(AT91_REG *) 0x40098118) // (PDC_US2) Transmit Next Pointer Register #define AT91C_US2_RCR (AT91_CAST(AT91_REG *) 0x40098104) // (PDC_US2) Receive Counter Register // ========== Register definition for US2 peripheral ========== #define AT91C_US2_MAN (AT91_CAST(AT91_REG *) 0x40098050) // (US2) Manchester Encoder Decoder Register #define AT91C_US2_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400980EC) // (US2) US ADDRSIZE REGISTER #define AT91C_US2_MR (AT91_CAST(AT91_REG *) 0x40098004) // (US2) Mode Register #define AT91C_US2_IPNAME1 (AT91_CAST(AT91_REG *) 0x400980F0) // (US2) US IPNAME1 REGISTER #define AT91C_US2_IF (AT91_CAST(AT91_REG *) 0x4009804C) // (US2) IRDA_FILTER Register #define AT91C_US2_BRGR (AT91_CAST(AT91_REG *) 0x40098020) // (US2) Baud Rate Generator Register #define AT91C_US2_FIDI (AT91_CAST(AT91_REG *) 0x40098040) // (US2) FI_DI_Ratio Register #define AT91C_US2_IER (AT91_CAST(AT91_REG *) 0x40098008) // (US2) Interrupt Enable Register #define AT91C_US2_RTOR (AT91_CAST(AT91_REG *) 0x40098024) // (US2) Receiver Time-out Register #define AT91C_US2_CR (AT91_CAST(AT91_REG *) 0x40098000) // (US2) Control Register #define AT91C_US2_THR (AT91_CAST(AT91_REG *) 0x4009801C) // (US2) Transmitter Holding Register #define AT91C_US2_CSR (AT91_CAST(AT91_REG *) 0x40098014) // (US2) Channel Status Register #define AT91C_US2_VER (AT91_CAST(AT91_REG *) 0x400980FC) // (US2) VERSION Register #define AT91C_US2_FEATURES (AT91_CAST(AT91_REG *) 0x400980F8) // (US2) US FEATURES REGISTER #define AT91C_US2_IDR (AT91_CAST(AT91_REG *) 0x4009800C) // (US2) Interrupt Disable Register #define AT91C_US2_TTGR (AT91_CAST(AT91_REG *) 0x40098028) // (US2) Transmitter Time-guard Register #define AT91C_US2_IPNAME2 (AT91_CAST(AT91_REG *) 0x400980F4) // (US2) US IPNAME2 REGISTER #define AT91C_US2_RHR (AT91_CAST(AT91_REG *) 0x40098018) // (US2) Receiver Holding Register #define AT91C_US2_NER (AT91_CAST(AT91_REG *) 0x40098044) // (US2) Nb Errors Register #define AT91C_US2_IMR (AT91_CAST(AT91_REG *) 0x40098010) // (US2) Interrupt Mask Register // ========== Register definition for PDC_US3 peripheral ========== #define AT91C_US3_TPR (AT91_CAST(AT91_REG *) 0x4009C108) // (PDC_US3) Transmit Pointer Register #define AT91C_US3_PTCR (AT91_CAST(AT91_REG *) 0x4009C120) // (PDC_US3) PDC Transfer Control Register #define AT91C_US3_TCR (AT91_CAST(AT91_REG *) 0x4009C10C) // (PDC_US3) Transmit Counter Register #define AT91C_US3_RCR (AT91_CAST(AT91_REG *) 0x4009C104) // (PDC_US3) Receive Counter Register #define AT91C_US3_RNCR (AT91_CAST(AT91_REG *) 0x4009C114) // (PDC_US3) Receive Next Counter Register #define AT91C_US3_RNPR (AT91_CAST(AT91_REG *) 0x4009C110) // (PDC_US3) Receive Next Pointer Register #define AT91C_US3_RPR (AT91_CAST(AT91_REG *) 0x4009C100) // (PDC_US3) Receive Pointer Register #define AT91C_US3_PTSR (AT91_CAST(AT91_REG *) 0x4009C124) // (PDC_US3) PDC Transfer Status Register #define AT91C_US3_TNCR (AT91_CAST(AT91_REG *) 0x4009C11C) // (PDC_US3) Transmit Next Counter Register #define AT91C_US3_TNPR (AT91_CAST(AT91_REG *) 0x4009C118) // (PDC_US3) Transmit Next Pointer Register // ========== Register definition for US3 peripheral ========== #define AT91C_US3_MAN (AT91_CAST(AT91_REG *) 0x4009C050) // (US3) Manchester Encoder Decoder Register #define AT91C_US3_CSR (AT91_CAST(AT91_REG *) 0x4009C014) // (US3) Channel Status Register #define AT91C_US3_BRGR (AT91_CAST(AT91_REG *) 0x4009C020) // (US3) Baud Rate Generator Register #define AT91C_US3_IPNAME2 (AT91_CAST(AT91_REG *) 0x4009C0F4) // (US3) US IPNAME2 REGISTER #define AT91C_US3_RTOR (AT91_CAST(AT91_REG *) 0x4009C024) // (US3) Receiver Time-out Register #define AT91C_US3_ADDRSIZE (AT91_CAST(AT91_REG *) 0x4009C0EC) // (US3) US ADDRSIZE REGISTER #define AT91C_US3_CR (AT91_CAST(AT91_REG *) 0x4009C000) // (US3) Control Register #define AT91C_US3_IF (AT91_CAST(AT91_REG *) 0x4009C04C) // (US3) IRDA_FILTER Register #define AT91C_US3_FEATURES (AT91_CAST(AT91_REG *) 0x4009C0F8) // (US3) US FEATURES REGISTER #define AT91C_US3_VER (AT91_CAST(AT91_REG *) 0x4009C0FC) // (US3) VERSION Register #define AT91C_US3_RHR (AT91_CAST(AT91_REG *) 0x4009C018) // (US3) Receiver Holding Register #define AT91C_US3_TTGR (AT91_CAST(AT91_REG *) 0x4009C028) // (US3) Transmitter Time-guard Register #define AT91C_US3_NER (AT91_CAST(AT91_REG *) 0x4009C044) // (US3) Nb Errors Register #define AT91C_US3_IMR (AT91_CAST(AT91_REG *) 0x4009C010) // (US3) Interrupt Mask Register #define AT91C_US3_THR (AT91_CAST(AT91_REG *) 0x4009C01C) // (US3) Transmitter Holding Register #define AT91C_US3_IDR (AT91_CAST(AT91_REG *) 0x4009C00C) // (US3) Interrupt Disable Register #define AT91C_US3_MR (AT91_CAST(AT91_REG *) 0x4009C004) // (US3) Mode Register #define AT91C_US3_IER (AT91_CAST(AT91_REG *) 0x4009C008) // (US3) Interrupt Enable Register #define AT91C_US3_FIDI (AT91_CAST(AT91_REG *) 0x4009C040) // (US3) FI_DI_Ratio Register #define AT91C_US3_IPNAME1 (AT91_CAST(AT91_REG *) 0x4009C0F0) // (US3) US IPNAME1 REGISTER // ========== Register definition for PDC_SSC0 peripheral ========== #define AT91C_SSC0_RNCR (AT91_CAST(AT91_REG *) 0x40004114) // (PDC_SSC0) Receive Next Counter Register #define AT91C_SSC0_TPR (AT91_CAST(AT91_REG *) 0x40004108) // (PDC_SSC0) Transmit Pointer Register #define AT91C_SSC0_TCR (AT91_CAST(AT91_REG *) 0x4000410C) // (PDC_SSC0) Transmit Counter Register #define AT91C_SSC0_PTCR (AT91_CAST(AT91_REG *) 0x40004120) // (PDC_SSC0) PDC Transfer Control Register #define AT91C_SSC0_TNPR (AT91_CAST(AT91_REG *) 0x40004118) // (PDC_SSC0) Transmit Next Pointer Register #define AT91C_SSC0_RPR (AT91_CAST(AT91_REG *) 0x40004100) // (PDC_SSC0) Receive Pointer Register #define AT91C_SSC0_TNCR (AT91_CAST(AT91_REG *) 0x4000411C) // (PDC_SSC0) Transmit Next Counter Register #define AT91C_SSC0_RNPR (AT91_CAST(AT91_REG *) 0x40004110) // (PDC_SSC0) Receive Next Pointer Register #define AT91C_SSC0_RCR (AT91_CAST(AT91_REG *) 0x40004104) // (PDC_SSC0) Receive Counter Register #define AT91C_SSC0_PTSR (AT91_CAST(AT91_REG *) 0x40004124) // (PDC_SSC0) PDC Transfer Status Register // ========== Register definition for SSC0 peripheral ========== #define AT91C_SSC0_CR (AT91_CAST(AT91_REG *) 0x40004000) // (SSC0) Control Register #define AT91C_SSC0_RHR (AT91_CAST(AT91_REG *) 0x40004020) // (SSC0) Receive Holding Register #define AT91C_SSC0_TSHR (AT91_CAST(AT91_REG *) 0x40004034) // (SSC0) Transmit Sync Holding Register #define AT91C_SSC0_RFMR (AT91_CAST(AT91_REG *) 0x40004014) // (SSC0) Receive Frame Mode Register #define AT91C_SSC0_IDR (AT91_CAST(AT91_REG *) 0x40004048) // (SSC0) Interrupt Disable Register #define AT91C_SSC0_TFMR (AT91_CAST(AT91_REG *) 0x4000401C) // (SSC0) Transmit Frame Mode Register #define AT91C_SSC0_RSHR (AT91_CAST(AT91_REG *) 0x40004030) // (SSC0) Receive Sync Holding Register #define AT91C_SSC0_RC1R (AT91_CAST(AT91_REG *) 0x4000403C) // (SSC0) Receive Compare 1 Register #define AT91C_SSC0_TCMR (AT91_CAST(AT91_REG *) 0x40004018) // (SSC0) Transmit Clock Mode Register #define AT91C_SSC0_RCMR (AT91_CAST(AT91_REG *) 0x40004010) // (SSC0) Receive Clock ModeRegister #define AT91C_SSC0_SR (AT91_CAST(AT91_REG *) 0x40004040) // (SSC0) Status Register #define AT91C_SSC0_RC0R (AT91_CAST(AT91_REG *) 0x40004038) // (SSC0) Receive Compare 0 Register #define AT91C_SSC0_THR (AT91_CAST(AT91_REG *) 0x40004024) // (SSC0) Transmit Holding Register #define AT91C_SSC0_CMR (AT91_CAST(AT91_REG *) 0x40004004) // (SSC0) Clock Mode Register #define AT91C_SSC0_IER (AT91_CAST(AT91_REG *) 0x40004044) // (SSC0) Interrupt Enable Register #define AT91C_SSC0_IMR (AT91_CAST(AT91_REG *) 0x4000404C) // (SSC0) Interrupt Mask Register // ========== Register definition for PDC_PWMC peripheral ========== #define AT91C_PWMC_TNCR (AT91_CAST(AT91_REG *) 0x4008C11C) // (PDC_PWMC) Transmit Next Counter Register #define AT91C_PWMC_TPR (AT91_CAST(AT91_REG *) 0x4008C108) // (PDC_PWMC) Transmit Pointer Register #define AT91C_PWMC_RPR (AT91_CAST(AT91_REG *) 0x4008C100) // (PDC_PWMC) Receive Pointer Register #define AT91C_PWMC_TCR (AT91_CAST(AT91_REG *) 0x4008C10C) // (PDC_PWMC) Transmit Counter Register #define AT91C_PWMC_PTSR (AT91_CAST(AT91_REG *) 0x4008C124) // (PDC_PWMC) PDC Transfer Status Register #define AT91C_PWMC_RNPR (AT91_CAST(AT91_REG *) 0x4008C110) // (PDC_PWMC) Receive Next Pointer Register #define AT91C_PWMC_RCR (AT91_CAST(AT91_REG *) 0x4008C104) // (PDC_PWMC) Receive Counter Register #define AT91C_PWMC_RNCR (AT91_CAST(AT91_REG *) 0x4008C114) // (PDC_PWMC) Receive Next Counter Register #define AT91C_PWMC_PTCR (AT91_CAST(AT91_REG *) 0x4008C120) // (PDC_PWMC) PDC Transfer Control Register #define AT91C_PWMC_TNPR (AT91_CAST(AT91_REG *) 0x4008C118) // (PDC_PWMC) Transmit Next Pointer Register // ========== Register definition for PWMC_CH0 peripheral ========== #define AT91C_PWMC_CH0_DTR (AT91_CAST(AT91_REG *) 0x4008C218) // (PWMC_CH0) Channel Dead Time Value Register #define AT91C_PWMC_CH0_CMR (AT91_CAST(AT91_REG *) 0x4008C200) // (PWMC_CH0) Channel Mode Register #define AT91C_PWMC_CH0_CCNTR (AT91_CAST(AT91_REG *) 0x4008C214) // (PWMC_CH0) Channel Counter Register #define AT91C_PWMC_CH0_CPRDR (AT91_CAST(AT91_REG *) 0x4008C20C) // (PWMC_CH0) Channel Period Register #define AT91C_PWMC_CH0_DTUPDR (AT91_CAST(AT91_REG *) 0x4008C21C) // (PWMC_CH0) Channel Dead Time Update Value Register #define AT91C_PWMC_CH0_CPRDUPDR (AT91_CAST(AT91_REG *) 0x4008C210) // (PWMC_CH0) Channel Period Update Register #define AT91C_PWMC_CH0_CDTYUPDR (AT91_CAST(AT91_REG *) 0x4008C208) // (PWMC_CH0) Channel Duty Cycle Update Register #define AT91C_PWMC_CH0_CDTYR (AT91_CAST(AT91_REG *) 0x4008C204) // (PWMC_CH0) Channel Duty Cycle Register // ========== Register definition for PWMC_CH1 peripheral ========== #define AT91C_PWMC_CH1_CCNTR (AT91_CAST(AT91_REG *) 0x4008C234) // (PWMC_CH1) Channel Counter Register #define AT91C_PWMC_CH1_DTR (AT91_CAST(AT91_REG *) 0x4008C238) // (PWMC_CH1) Channel Dead Time Value Register #define AT91C_PWMC_CH1_CDTYUPDR (AT91_CAST(AT91_REG *) 0x4008C228) // (PWMC_CH1) Channel Duty Cycle Update Register #define AT91C_PWMC_CH1_DTUPDR (AT91_CAST(AT91_REG *) 0x4008C23C) // (PWMC_CH1) Channel Dead Time Update Value Register #define AT91C_PWMC_CH1_CDTYR (AT91_CAST(AT91_REG *) 0x4008C224) // (PWMC_CH1) Channel Duty Cycle Register #define AT91C_PWMC_CH1_CPRDR (AT91_CAST(AT91_REG *) 0x4008C22C) // (PWMC_CH1) Channel Period Register #define AT91C_PWMC_CH1_CPRDUPDR (AT91_CAST(AT91_REG *) 0x4008C230) // (PWMC_CH1) Channel Period Update Register #define AT91C_PWMC_CH1_CMR (AT91_CAST(AT91_REG *) 0x4008C220) // (PWMC_CH1) Channel Mode Register // ========== Register definition for PWMC_CH2 peripheral ========== #define AT91C_PWMC_CH2_CDTYR (AT91_CAST(AT91_REG *) 0x4008C244) // (PWMC_CH2) Channel Duty Cycle Register #define AT91C_PWMC_CH2_DTUPDR (AT91_CAST(AT91_REG *) 0x4008C25C) // (PWMC_CH2) Channel Dead Time Update Value Register #define AT91C_PWMC_CH2_CCNTR (AT91_CAST(AT91_REG *) 0x4008C254) // (PWMC_CH2) Channel Counter Register #define AT91C_PWMC_CH2_CMR (AT91_CAST(AT91_REG *) 0x4008C240) // (PWMC_CH2) Channel Mode Register #define AT91C_PWMC_CH2_CPRDR (AT91_CAST(AT91_REG *) 0x4008C24C) // (PWMC_CH2) Channel Period Register #define AT91C_PWMC_CH2_CPRDUPDR (AT91_CAST(AT91_REG *) 0x4008C250) // (PWMC_CH2) Channel Period Update Register #define AT91C_PWMC_CH2_CDTYUPDR (AT91_CAST(AT91_REG *) 0x4008C248) // (PWMC_CH2) Channel Duty Cycle Update Register #define AT91C_PWMC_CH2_DTR (AT91_CAST(AT91_REG *) 0x4008C258) // (PWMC_CH2) Channel Dead Time Value Register // ========== Register definition for PWMC_CH3 peripheral ========== #define AT91C_PWMC_CH3_CPRDUPDR (AT91_CAST(AT91_REG *) 0x4008C270) // (PWMC_CH3) Channel Period Update Register #define AT91C_PWMC_CH3_DTR (AT91_CAST(AT91_REG *) 0x4008C278) // (PWMC_CH3) Channel Dead Time Value Register #define AT91C_PWMC_CH3_CDTYR (AT91_CAST(AT91_REG *) 0x4008C264) // (PWMC_CH3) Channel Duty Cycle Register #define AT91C_PWMC_CH3_DTUPDR (AT91_CAST(AT91_REG *) 0x4008C27C) // (PWMC_CH3) Channel Dead Time Update Value Register #define AT91C_PWMC_CH3_CDTYUPDR (AT91_CAST(AT91_REG *) 0x4008C268) // (PWMC_CH3) Channel Duty Cycle Update Register #define AT91C_PWMC_CH3_CCNTR (AT91_CAST(AT91_REG *) 0x4008C274) // (PWMC_CH3) Channel Counter Register #define AT91C_PWMC_CH3_CMR (AT91_CAST(AT91_REG *) 0x4008C260) // (PWMC_CH3) Channel Mode Register #define AT91C_PWMC_CH3_CPRDR (AT91_CAST(AT91_REG *) 0x4008C26C) // (PWMC_CH3) Channel Period Register // ========== Register definition for PWMC peripheral ========== #define AT91C_PWMC_CMP6MUPD (AT91_CAST(AT91_REG *) 0x4008C19C) // (PWMC) PWM Comparison Mode 6 Update Register #define AT91C_PWMC_ISR1 (AT91_CAST(AT91_REG *) 0x4008C01C) // (PWMC) PWMC Interrupt Status Register 1 #define AT91C_PWMC_CMP5V (AT91_CAST(AT91_REG *) 0x4008C180) // (PWMC) PWM Comparison Value 5 Register #define AT91C_PWMC_CMP4MUPD (AT91_CAST(AT91_REG *) 0x4008C17C) // (PWMC) PWM Comparison Mode 4 Update Register #define AT91C_PWMC_FMR (AT91_CAST(AT91_REG *) 0x4008C05C) // (PWMC) PWM Fault Mode Register #define AT91C_PWMC_CMP6V (AT91_CAST(AT91_REG *) 0x4008C190) // (PWMC) PWM Comparison Value 6 Register #define AT91C_PWMC_EL4MR (AT91_CAST(AT91_REG *) 0x4008C08C) // (PWMC) PWM Event Line 4 Mode Register #define AT91C_PWMC_UPCR (AT91_CAST(AT91_REG *) 0x4008C028) // (PWMC) PWM Update Control Register #define AT91C_PWMC_CMP1VUPD (AT91_CAST(AT91_REG *) 0x4008C144) // (PWMC) PWM Comparison Value 1 Update Register #define AT91C_PWMC_CMP0M (AT91_CAST(AT91_REG *) 0x4008C138) // (PWMC) PWM Comparison Mode 0 Register #define AT91C_PWMC_CMP5VUPD (AT91_CAST(AT91_REG *) 0x4008C184) // (PWMC) PWM Comparison Value 5 Update Register #define AT91C_PWMC_FPER3 (AT91_CAST(AT91_REG *) 0x4008C074) // (PWMC) PWM Fault Protection Enable Register 3 #define AT91C_PWMC_OSCUPD (AT91_CAST(AT91_REG *) 0x4008C058) // (PWMC) PWM Output Selection Clear Update Register #define AT91C_PWMC_FPER1 (AT91_CAST(AT91_REG *) 0x4008C06C) // (PWMC) PWM Fault Protection Enable Register 1 #define AT91C_PWMC_SCUPUPD (AT91_CAST(AT91_REG *) 0x4008C030) // (PWMC) PWM Update Period Update Register #define AT91C_PWMC_DIS (AT91_CAST(AT91_REG *) 0x4008C008) // (PWMC) PWMC Disable Register #define AT91C_PWMC_IER1 (AT91_CAST(AT91_REG *) 0x4008C010) // (PWMC) PWMC Interrupt Enable Register 1 #define AT91C_PWMC_IMR2 (AT91_CAST(AT91_REG *) 0x4008C03C) // (PWMC) PWMC Interrupt Mask Register 2 #define AT91C_PWMC_CMP0V (AT91_CAST(AT91_REG *) 0x4008C130) // (PWMC) PWM Comparison Value 0 Register #define AT91C_PWMC_SR (AT91_CAST(AT91_REG *) 0x4008C00C) // (PWMC) PWMC Status Register #define AT91C_PWMC_CMP4M (AT91_CAST(AT91_REG *) 0x4008C178) // (PWMC) PWM Comparison Mode 4 Register #define AT91C_PWMC_CMP3M (AT91_CAST(AT91_REG *) 0x4008C168) // (PWMC) PWM Comparison Mode 3 Register #define AT91C_PWMC_IER2 (AT91_CAST(AT91_REG *) 0x4008C034) // (PWMC) PWMC Interrupt Enable Register 2 #define AT91C_PWMC_CMP3VUPD (AT91_CAST(AT91_REG *) 0x4008C164) // (PWMC) PWM Comparison Value 3 Update Register #define AT91C_PWMC_CMP2M (AT91_CAST(AT91_REG *) 0x4008C158) // (PWMC) PWM Comparison Mode 2 Register #define AT91C_PWMC_IDR2 (AT91_CAST(AT91_REG *) 0x4008C038) // (PWMC) PWMC Interrupt Disable Register 2 #define AT91C_PWMC_EL2MR (AT91_CAST(AT91_REG *) 0x4008C084) // (PWMC) PWM Event Line 2 Mode Register #define AT91C_PWMC_CMP7V (AT91_CAST(AT91_REG *) 0x4008C1A0) // (PWMC) PWM Comparison Value 7 Register #define AT91C_PWMC_CMP1M (AT91_CAST(AT91_REG *) 0x4008C148) // (PWMC) PWM Comparison Mode 1 Register #define AT91C_PWMC_CMP0VUPD (AT91_CAST(AT91_REG *) 0x4008C134) // (PWMC) PWM Comparison Value 0 Update Register #define AT91C_PWMC_WPSR (AT91_CAST(AT91_REG *) 0x4008C0E8) // (PWMC) PWM Write Protection Status Register #define AT91C_PWMC_CMP6VUPD (AT91_CAST(AT91_REG *) 0x4008C194) // (PWMC) PWM Comparison Value 6 Update Register #define AT91C_PWMC_CMP1MUPD (AT91_CAST(AT91_REG *) 0x4008C14C) // (PWMC) PWM Comparison Mode 1 Update Register #define AT91C_PWMC_CMP1V (AT91_CAST(AT91_REG *) 0x4008C140) // (PWMC) PWM Comparison Value 1 Register #define AT91C_PWMC_FCR (AT91_CAST(AT91_REG *) 0x4008C064) // (PWMC) PWM Fault Mode Clear Register #define AT91C_PWMC_VER (AT91_CAST(AT91_REG *) 0x4008C0FC) // (PWMC) PWMC Version Register #define AT91C_PWMC_EL1MR (AT91_CAST(AT91_REG *) 0x4008C080) // (PWMC) PWM Event Line 1 Mode Register #define AT91C_PWMC_EL6MR (AT91_CAST(AT91_REG *) 0x4008C094) // (PWMC) PWM Event Line 6 Mode Register #define AT91C_PWMC_ISR2 (AT91_CAST(AT91_REG *) 0x4008C040) // (PWMC) PWMC Interrupt Status Register 2 #define AT91C_PWMC_CMP4VUPD (AT91_CAST(AT91_REG *) 0x4008C174) // (PWMC) PWM Comparison Value 4 Update Register #define AT91C_PWMC_CMP5MUPD (AT91_CAST(AT91_REG *) 0x4008C18C) // (PWMC) PWM Comparison Mode 5 Update Register #define AT91C_PWMC_OS (AT91_CAST(AT91_REG *) 0x4008C048) // (PWMC) PWM Output Selection Register #define AT91C_PWMC_FPV (AT91_CAST(AT91_REG *) 0x4008C068) // (PWMC) PWM Fault Protection Value Register #define AT91C_PWMC_FPER2 (AT91_CAST(AT91_REG *) 0x4008C070) // (PWMC) PWM Fault Protection Enable Register 2 #define AT91C_PWMC_EL7MR (AT91_CAST(AT91_REG *) 0x4008C098) // (PWMC) PWM Event Line 7 Mode Register #define AT91C_PWMC_OSSUPD (AT91_CAST(AT91_REG *) 0x4008C054) // (PWMC) PWM Output Selection Set Update Register #define AT91C_PWMC_FEATURES (AT91_CAST(AT91_REG *) 0x4008C0F8) // (PWMC) PWMC FEATURES REGISTER #define AT91C_PWMC_CMP2V (AT91_CAST(AT91_REG *) 0x4008C150) // (PWMC) PWM Comparison Value 2 Register #define AT91C_PWMC_FSR (AT91_CAST(AT91_REG *) 0x4008C060) // (PWMC) PWM Fault Mode Status Register #define AT91C_PWMC_ADDRSIZE (AT91_CAST(AT91_REG *) 0x4008C0EC) // (PWMC) PWMC ADDRSIZE REGISTER #define AT91C_PWMC_OSC (AT91_CAST(AT91_REG *) 0x4008C050) // (PWMC) PWM Output Selection Clear Register #define AT91C_PWMC_SCUP (AT91_CAST(AT91_REG *) 0x4008C02C) // (PWMC) PWM Update Period Register #define AT91C_PWMC_CMP7MUPD (AT91_CAST(AT91_REG *) 0x4008C1AC) // (PWMC) PWM Comparison Mode 7 Update Register #define AT91C_PWMC_CMP2VUPD (AT91_CAST(AT91_REG *) 0x4008C154) // (PWMC) PWM Comparison Value 2 Update Register #define AT91C_PWMC_FPER4 (AT91_CAST(AT91_REG *) 0x4008C078) // (PWMC) PWM Fault Protection Enable Register 4 #define AT91C_PWMC_IMR1 (AT91_CAST(AT91_REG *) 0x4008C018) // (PWMC) PWMC Interrupt Mask Register 1 #define AT91C_PWMC_EL3MR (AT91_CAST(AT91_REG *) 0x4008C088) // (PWMC) PWM Event Line 3 Mode Register #define AT91C_PWMC_CMP3V (AT91_CAST(AT91_REG *) 0x4008C160) // (PWMC) PWM Comparison Value 3 Register #define AT91C_PWMC_IPNAME1 (AT91_CAST(AT91_REG *) 0x4008C0F0) // (PWMC) PWMC IPNAME1 REGISTER #define AT91C_PWMC_OSS (AT91_CAST(AT91_REG *) 0x4008C04C) // (PWMC) PWM Output Selection Set Register #define AT91C_PWMC_CMP0MUPD (AT91_CAST(AT91_REG *) 0x4008C13C) // (PWMC) PWM Comparison Mode 0 Update Register #define AT91C_PWMC_CMP2MUPD (AT91_CAST(AT91_REG *) 0x4008C15C) // (PWMC) PWM Comparison Mode 2 Update Register #define AT91C_PWMC_CMP4V (AT91_CAST(AT91_REG *) 0x4008C170) // (PWMC) PWM Comparison Value 4 Register #define AT91C_PWMC_ENA (AT91_CAST(AT91_REG *) 0x4008C004) // (PWMC) PWMC Enable Register #define AT91C_PWMC_CMP3MUPD (AT91_CAST(AT91_REG *) 0x4008C16C) // (PWMC) PWM Comparison Mode 3 Update Register #define AT91C_PWMC_EL0MR (AT91_CAST(AT91_REG *) 0x4008C07C) // (PWMC) PWM Event Line 0 Mode Register #define AT91C_PWMC_OOV (AT91_CAST(AT91_REG *) 0x4008C044) // (PWMC) PWM Output Override Value Register #define AT91C_PWMC_WPCR (AT91_CAST(AT91_REG *) 0x4008C0E4) // (PWMC) PWM Write Protection Enable Register #define AT91C_PWMC_CMP7M (AT91_CAST(AT91_REG *) 0x4008C1A8) // (PWMC) PWM Comparison Mode 7 Register #define AT91C_PWMC_CMP6M (AT91_CAST(AT91_REG *) 0x4008C198) // (PWMC) PWM Comparison Mode 6 Register #define AT91C_PWMC_CMP5M (AT91_CAST(AT91_REG *) 0x4008C188) // (PWMC) PWM Comparison Mode 5 Register #define AT91C_PWMC_IPNAME2 (AT91_CAST(AT91_REG *) 0x4008C0F4) // (PWMC) PWMC IPNAME2 REGISTER #define AT91C_PWMC_CMP7VUPD (AT91_CAST(AT91_REG *) 0x4008C1A4) // (PWMC) PWM Comparison Value 7 Update Register #define AT91C_PWMC_SYNC (AT91_CAST(AT91_REG *) 0x4008C020) // (PWMC) PWM Synchronized Channels Register #define AT91C_PWMC_MR (AT91_CAST(AT91_REG *) 0x4008C000) // (PWMC) PWMC Mode Register #define AT91C_PWMC_IDR1 (AT91_CAST(AT91_REG *) 0x4008C014) // (PWMC) PWMC Interrupt Disable Register 1 #define AT91C_PWMC_EL5MR (AT91_CAST(AT91_REG *) 0x4008C090) // (PWMC) PWM Event Line 5 Mode Register // ========== Register definition for SPI0 peripheral ========== #define AT91C_SPI0_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400080EC) // (SPI0) SPI ADDRSIZE REGISTER #define AT91C_SPI0_RDR (AT91_CAST(AT91_REG *) 0x40008008) // (SPI0) Receive Data Register #define AT91C_SPI0_FEATURES (AT91_CAST(AT91_REG *) 0x400080F8) // (SPI0) SPI FEATURES REGISTER #define AT91C_SPI0_CR (AT91_CAST(AT91_REG *) 0x40008000) // (SPI0) Control Register #define AT91C_SPI0_IPNAME1 (AT91_CAST(AT91_REG *) 0x400080F0) // (SPI0) SPI IPNAME1 REGISTER #define AT91C_SPI0_VER (AT91_CAST(AT91_REG *) 0x400080FC) // (SPI0) Version Register #define AT91C_SPI0_IDR (AT91_CAST(AT91_REG *) 0x40008018) // (SPI0) Interrupt Disable Register #define AT91C_SPI0_TDR (AT91_CAST(AT91_REG *) 0x4000800C) // (SPI0) Transmit Data Register #define AT91C_SPI0_MR (AT91_CAST(AT91_REG *) 0x40008004) // (SPI0) Mode Register #define AT91C_SPI0_IER (AT91_CAST(AT91_REG *) 0x40008014) // (SPI0) Interrupt Enable Register #define AT91C_SPI0_IMR (AT91_CAST(AT91_REG *) 0x4000801C) // (SPI0) Interrupt Mask Register #define AT91C_SPI0_IPNAME2 (AT91_CAST(AT91_REG *) 0x400080F4) // (SPI0) SPI IPNAME2 REGISTER #define AT91C_SPI0_CSR (AT91_CAST(AT91_REG *) 0x40008030) // (SPI0) Chip Select Register #define AT91C_SPI0_SR (AT91_CAST(AT91_REG *) 0x40008010) // (SPI0) Status Register // ========== Register definition for UDPHS_EPTFIFO peripheral ========== #define AT91C_UDPHS_EPTFIFO_READEPT6 (AT91_CAST(AT91_REG *) 0x201E0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 6 #define AT91C_UDPHS_EPTFIFO_READEPT2 (AT91_CAST(AT91_REG *) 0x201A0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 2 #define AT91C_UDPHS_EPTFIFO_READEPT1 (AT91_CAST(AT91_REG *) 0x20190000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 1 #define AT91C_UDPHS_EPTFIFO_READEPT0 (AT91_CAST(AT91_REG *) 0x20180000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 0 #define AT91C_UDPHS_EPTFIFO_READEPT5 (AT91_CAST(AT91_REG *) 0x201D0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 5 #define AT91C_UDPHS_EPTFIFO_READEPT4 (AT91_CAST(AT91_REG *) 0x201C0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 4 #define AT91C_UDPHS_EPTFIFO_READEPT3 (AT91_CAST(AT91_REG *) 0x201B0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 3 // ========== Register definition for UDPHS_EPT_0 peripheral ========== #define AT91C_UDPHS_EPT_0_EPTCTL (AT91_CAST(AT91_REG *) 0x400A410C) // (UDPHS_EPT_0) UDPHS Endpoint Control Register #define AT91C_UDPHS_EPT_0_EPTSTA (AT91_CAST(AT91_REG *) 0x400A411C) // (UDPHS_EPT_0) UDPHS Endpoint Status Register #define AT91C_UDPHS_EPT_0_EPTCLRSTA (AT91_CAST(AT91_REG *) 0x400A4118) // (UDPHS_EPT_0) UDPHS Endpoint Clear Status Register #define AT91C_UDPHS_EPT_0_EPTCTLDIS (AT91_CAST(AT91_REG *) 0x400A4108) // (UDPHS_EPT_0) UDPHS Endpoint Control Disable Register #define AT91C_UDPHS_EPT_0_EPTCFG (AT91_CAST(AT91_REG *) 0x400A4100) // (UDPHS_EPT_0) UDPHS Endpoint Config Register #define AT91C_UDPHS_EPT_0_EPTSETSTA (AT91_CAST(AT91_REG *) 0x400A4114) // (UDPHS_EPT_0) UDPHS Endpoint Set Status Register #define AT91C_UDPHS_EPT_0_EPTCTLENB (AT91_CAST(AT91_REG *) 0x400A4104) // (UDPHS_EPT_0) UDPHS Endpoint Control Enable Register // ========== Register definition for UDPHS_EPT_1 peripheral ========== #define AT91C_UDPHS_EPT_1_EPTSTA (AT91_CAST(AT91_REG *) 0x400A413C) // (UDPHS_EPT_1) UDPHS Endpoint Status Register #define AT91C_UDPHS_EPT_1_EPTSETSTA (AT91_CAST(AT91_REG *) 0x400A4134) // (UDPHS_EPT_1) UDPHS Endpoint Set Status Register #define AT91C_UDPHS_EPT_1_EPTCTL (AT91_CAST(AT91_REG *) 0x400A412C) // (UDPHS_EPT_1) UDPHS Endpoint Control Register #define AT91C_UDPHS_EPT_1_EPTCFG (AT91_CAST(AT91_REG *) 0x400A4120) // (UDPHS_EPT_1) UDPHS Endpoint Config Register #define AT91C_UDPHS_EPT_1_EPTCTLDIS (AT91_CAST(AT91_REG *) 0x400A4128) // (UDPHS_EPT_1) UDPHS Endpoint Control Disable Register #define AT91C_UDPHS_EPT_1_EPTCLRSTA (AT91_CAST(AT91_REG *) 0x400A4138) // (UDPHS_EPT_1) UDPHS Endpoint Clear Status Register #define AT91C_UDPHS_EPT_1_EPTCTLENB (AT91_CAST(AT91_REG *) 0x400A4124) // (UDPHS_EPT_1) UDPHS Endpoint Control Enable Register // ========== Register definition for UDPHS_EPT_2 peripheral ========== #define AT91C_UDPHS_EPT_2_EPTCTLENB (AT91_CAST(AT91_REG *) 0x400A4144) // (UDPHS_EPT_2) UDPHS Endpoint Control Enable Register #define AT91C_UDPHS_EPT_2_EPTCLRSTA (AT91_CAST(AT91_REG *) 0x400A4158) // (UDPHS_EPT_2) UDPHS Endpoint Clear Status Register #define AT91C_UDPHS_EPT_2_EPTCFG (AT91_CAST(AT91_REG *) 0x400A4140) // (UDPHS_EPT_2) UDPHS Endpoint Config Register #define AT91C_UDPHS_EPT_2_EPTCTL (AT91_CAST(AT91_REG *) 0x400A414C) // (UDPHS_EPT_2) UDPHS Endpoint Control Register #define AT91C_UDPHS_EPT_2_EPTSETSTA (AT91_CAST(AT91_REG *) 0x400A4154) // (UDPHS_EPT_2) UDPHS Endpoint Set Status Register #define AT91C_UDPHS_EPT_2_EPTSTA (AT91_CAST(AT91_REG *) 0x400A415C) // (UDPHS_EPT_2) UDPHS Endpoint Status Register #define AT91C_UDPHS_EPT_2_EPTCTLDIS (AT91_CAST(AT91_REG *) 0x400A4148) // (UDPHS_EPT_2) UDPHS Endpoint Control Disable Register // ========== Register definition for UDPHS_EPT_3 peripheral ========== #define AT91C_UDPHS_EPT_3_EPTCTLDIS (AT91_CAST(AT91_REG *) 0x400A4168) // (UDPHS_EPT_3) UDPHS Endpoint Control Disable Register #define AT91C_UDPHS_EPT_3_EPTCTLENB (AT91_CAST(AT91_REG *) 0x400A4164) // (UDPHS_EPT_3) UDPHS Endpoint Control Enable Register #define AT91C_UDPHS_EPT_3_EPTSETSTA (AT91_CAST(AT91_REG *) 0x400A4174) // (UDPHS_EPT_3) UDPHS Endpoint Set Status Register #define AT91C_UDPHS_EPT_3_EPTCLRSTA (AT91_CAST(AT91_REG *) 0x400A4178) // (UDPHS_EPT_3) UDPHS Endpoint Clear Status Register #define AT91C_UDPHS_EPT_3_EPTCFG (AT91_CAST(AT91_REG *) 0x400A4160) // (UDPHS_EPT_3) UDPHS Endpoint Config Register #define AT91C_UDPHS_EPT_3_EPTSTA (AT91_CAST(AT91_REG *) 0x400A417C) // (UDPHS_EPT_3) UDPHS Endpoint Status Register #define AT91C_UDPHS_EPT_3_EPTCTL (AT91_CAST(AT91_REG *) 0x400A416C) // (UDPHS_EPT_3) UDPHS Endpoint Control Register // ========== Register definition for UDPHS_EPT_4 peripheral ========== #define AT91C_UDPHS_EPT_4_EPTSETSTA (AT91_CAST(AT91_REG *) 0x400A4194) // (UDPHS_EPT_4) UDPHS Endpoint Set Status Register #define AT91C_UDPHS_EPT_4_EPTCTLDIS (AT91_CAST(AT91_REG *) 0x400A4188) // (UDPHS_EPT_4) UDPHS Endpoint Control Disable Register #define AT91C_UDPHS_EPT_4_EPTCTL (AT91_CAST(AT91_REG *) 0x400A418C) // (UDPHS_EPT_4) UDPHS Endpoint Control Register #define AT91C_UDPHS_EPT_4_EPTCFG (AT91_CAST(AT91_REG *) 0x400A4180) // (UDPHS_EPT_4) UDPHS Endpoint Config Register #define AT91C_UDPHS_EPT_4_EPTCTLENB (AT91_CAST(AT91_REG *) 0x400A4184) // (UDPHS_EPT_4) UDPHS Endpoint Control Enable Register #define AT91C_UDPHS_EPT_4_EPTSTA (AT91_CAST(AT91_REG *) 0x400A419C) // (UDPHS_EPT_4) UDPHS Endpoint Status Register #define AT91C_UDPHS_EPT_4_EPTCLRSTA (AT91_CAST(AT91_REG *) 0x400A4198) // (UDPHS_EPT_4) UDPHS Endpoint Clear Status Register // ========== Register definition for UDPHS_EPT_5 peripheral ========== #define AT91C_UDPHS_EPT_5_EPTCFG (AT91_CAST(AT91_REG *) 0x400A41A0) // (UDPHS_EPT_5) UDPHS Endpoint Config Register #define AT91C_UDPHS_EPT_5_EPTCTL (AT91_CAST(AT91_REG *) 0x400A41AC) // (UDPHS_EPT_5) UDPHS Endpoint Control Register #define AT91C_UDPHS_EPT_5_EPTCTLENB (AT91_CAST(AT91_REG *) 0x400A41A4) // (UDPHS_EPT_5) UDPHS Endpoint Control Enable Register #define AT91C_UDPHS_EPT_5_EPTSTA (AT91_CAST(AT91_REG *) 0x400A41BC) // (UDPHS_EPT_5) UDPHS Endpoint Status Register #define AT91C_UDPHS_EPT_5_EPTSETSTA (AT91_CAST(AT91_REG *) 0x400A41B4) // (UDPHS_EPT_5) UDPHS Endpoint Set Status Register #define AT91C_UDPHS_EPT_5_EPTCTLDIS (AT91_CAST(AT91_REG *) 0x400A41A8) // (UDPHS_EPT_5) UDPHS Endpoint Control Disable Register #define AT91C_UDPHS_EPT_5_EPTCLRSTA (AT91_CAST(AT91_REG *) 0x400A41B8) // (UDPHS_EPT_5) UDPHS Endpoint Clear Status Register // ========== Register definition for UDPHS_EPT_6 peripheral ========== #define AT91C_UDPHS_EPT_6_EPTCLRSTA (AT91_CAST(AT91_REG *) 0x400A41D8) // (UDPHS_EPT_6) UDPHS Endpoint Clear Status Register #define AT91C_UDPHS_EPT_6_EPTCTL (AT91_CAST(AT91_REG *) 0x400A41CC) // (UDPHS_EPT_6) UDPHS Endpoint Control Register #define AT91C_UDPHS_EPT_6_EPTCFG (AT91_CAST(AT91_REG *) 0x400A41C0) // (UDPHS_EPT_6) UDPHS Endpoint Config Register #define AT91C_UDPHS_EPT_6_EPTCTLDIS (AT91_CAST(AT91_REG *) 0x400A41C8) // (UDPHS_EPT_6) UDPHS Endpoint Control Disable Register #define AT91C_UDPHS_EPT_6_EPTSTA (AT91_CAST(AT91_REG *) 0x400A41DC) // (UDPHS_EPT_6) UDPHS Endpoint Status Register #define AT91C_UDPHS_EPT_6_EPTCTLENB (AT91_CAST(AT91_REG *) 0x400A41C4) // (UDPHS_EPT_6) UDPHS Endpoint Control Enable Register #define AT91C_UDPHS_EPT_6_EPTSETSTA (AT91_CAST(AT91_REG *) 0x400A41D4) // (UDPHS_EPT_6) UDPHS Endpoint Set Status Register // ========== Register definition for UDPHS_DMA_1 peripheral ========== #define AT91C_UDPHS_DMA_1_DMASTATUS (AT91_CAST(AT91_REG *) 0x400A431C) // (UDPHS_DMA_1) UDPHS DMA Channel Status Register #define AT91C_UDPHS_DMA_1_DMACONTROL (AT91_CAST(AT91_REG *) 0x400A4318) // (UDPHS_DMA_1) UDPHS DMA Channel Control Register #define AT91C_UDPHS_DMA_1_DMANXTDSC (AT91_CAST(AT91_REG *) 0x400A4310) // (UDPHS_DMA_1) UDPHS DMA Channel Next Descriptor Address #define AT91C_UDPHS_DMA_1_DMAADDRESS (AT91_CAST(AT91_REG *) 0x400A4314) // (UDPHS_DMA_1) UDPHS DMA Channel Address Register // ========== Register definition for UDPHS_DMA_2 peripheral ========== #define AT91C_UDPHS_DMA_2_DMASTATUS (AT91_CAST(AT91_REG *) 0x400A432C) // (UDPHS_DMA_2) UDPHS DMA Channel Status Register #define AT91C_UDPHS_DMA_2_DMANXTDSC (AT91_CAST(AT91_REG *) 0x400A4320) // (UDPHS_DMA_2) UDPHS DMA Channel Next Descriptor Address #define AT91C_UDPHS_DMA_2_DMACONTROL (AT91_CAST(AT91_REG *) 0x400A4328) // (UDPHS_DMA_2) UDPHS DMA Channel Control Register #define AT91C_UDPHS_DMA_2_DMAADDRESS (AT91_CAST(AT91_REG *) 0x400A4324) // (UDPHS_DMA_2) UDPHS DMA Channel Address Register // ========== Register definition for UDPHS_DMA_3 peripheral ========== #define AT91C_UDPHS_DMA_3_DMACONTROL (AT91_CAST(AT91_REG *) 0x400A4338) // (UDPHS_DMA_3) UDPHS DMA Channel Control Register #define AT91C_UDPHS_DMA_3_DMANXTDSC (AT91_CAST(AT91_REG *) 0x400A4330) // (UDPHS_DMA_3) UDPHS DMA Channel Next Descriptor Address #define AT91C_UDPHS_DMA_3_DMASTATUS (AT91_CAST(AT91_REG *) 0x400A433C) // (UDPHS_DMA_3) UDPHS DMA Channel Status Register #define AT91C_UDPHS_DMA_3_DMAADDRESS (AT91_CAST(AT91_REG *) 0x400A4334) // (UDPHS_DMA_3) UDPHS DMA Channel Address Register // ========== Register definition for UDPHS_DMA_4 peripheral ========== #define AT91C_UDPHS_DMA_4_DMAADDRESS (AT91_CAST(AT91_REG *) 0x400A4344) // (UDPHS_DMA_4) UDPHS DMA Channel Address Register #define AT91C_UDPHS_DMA_4_DMANXTDSC (AT91_CAST(AT91_REG *) 0x400A4340) // (UDPHS_DMA_4) UDPHS DMA Channel Next Descriptor Address #define AT91C_UDPHS_DMA_4_DMASTATUS (AT91_CAST(AT91_REG *) 0x400A434C) // (UDPHS_DMA_4) UDPHS DMA Channel Status Register #define AT91C_UDPHS_DMA_4_DMACONTROL (AT91_CAST(AT91_REG *) 0x400A4348) // (UDPHS_DMA_4) UDPHS DMA Channel Control Register // ========== Register definition for UDPHS_DMA_5 peripheral ========== #define AT91C_UDPHS_DMA_5_DMACONTROL (AT91_CAST(AT91_REG *) 0x400A4358) // (UDPHS_DMA_5) UDPHS DMA Channel Control Register #define AT91C_UDPHS_DMA_5_DMAADDRESS (AT91_CAST(AT91_REG *) 0x400A4354) // (UDPHS_DMA_5) UDPHS DMA Channel Address Register #define AT91C_UDPHS_DMA_5_DMANXTDSC (AT91_CAST(AT91_REG *) 0x400A4350) // (UDPHS_DMA_5) UDPHS DMA Channel Next Descriptor Address #define AT91C_UDPHS_DMA_5_DMASTATUS (AT91_CAST(AT91_REG *) 0x400A435C) // (UDPHS_DMA_5) UDPHS DMA Channel Status Register // ========== Register definition for UDPHS_DMA_6 peripheral ========== #define AT91C_UDPHS_DMA_6_DMASTATUS (AT91_CAST(AT91_REG *) 0x400A436C) // (UDPHS_DMA_6) UDPHS DMA Channel Status Register #define AT91C_UDPHS_DMA_6_DMACONTROL (AT91_CAST(AT91_REG *) 0x400A4368) // (UDPHS_DMA_6) UDPHS DMA Channel Control Register #define AT91C_UDPHS_DMA_6_DMANXTDSC (AT91_CAST(AT91_REG *) 0x400A4360) // (UDPHS_DMA_6) UDPHS DMA Channel Next Descriptor Address #define AT91C_UDPHS_DMA_6_DMAADDRESS (AT91_CAST(AT91_REG *) 0x400A4364) // (UDPHS_DMA_6) UDPHS DMA Channel Address Register // ========== Register definition for UDPHS peripheral ========== #define AT91C_UDPHS_EPTRST (AT91_CAST(AT91_REG *) 0x400A401C) // (UDPHS) UDPHS Endpoints Reset Register #define AT91C_UDPHS_IEN (AT91_CAST(AT91_REG *) 0x400A4010) // (UDPHS) UDPHS Interrupt Enable Register #define AT91C_UDPHS_TSTCNTB (AT91_CAST(AT91_REG *) 0x400A40D8) // (UDPHS) UDPHS Test B Counter Register #define AT91C_UDPHS_RIPNAME2 (AT91_CAST(AT91_REG *) 0x400A40F4) // (UDPHS) UDPHS Name2 Register #define AT91C_UDPHS_RIPPADDRSIZE (AT91_CAST(AT91_REG *) 0x400A40EC) // (UDPHS) UDPHS PADDRSIZE Register #define AT91C_UDPHS_TSTMODREG (AT91_CAST(AT91_REG *) 0x400A40DC) // (UDPHS) UDPHS Test Mode Register #define AT91C_UDPHS_TST (AT91_CAST(AT91_REG *) 0x400A40E0) // (UDPHS) UDPHS Test Register #define AT91C_UDPHS_TSTSOFCNT (AT91_CAST(AT91_REG *) 0x400A40D0) // (UDPHS) UDPHS Test SOF Counter Register #define AT91C_UDPHS_FNUM (AT91_CAST(AT91_REG *) 0x400A4004) // (UDPHS) UDPHS Frame Number Register #define AT91C_UDPHS_TSTCNTA (AT91_CAST(AT91_REG *) 0x400A40D4) // (UDPHS) UDPHS Test A Counter Register #define AT91C_UDPHS_INTSTA (AT91_CAST(AT91_REG *) 0x400A4014) // (UDPHS) UDPHS Interrupt Status Register #define AT91C_UDPHS_IPFEATURES (AT91_CAST(AT91_REG *) 0x400A40F8) // (UDPHS) UDPHS Features Register #define AT91C_UDPHS_CLRINT (AT91_CAST(AT91_REG *) 0x400A4018) // (UDPHS) UDPHS Clear Interrupt Register #define AT91C_UDPHS_RIPNAME1 (AT91_CAST(AT91_REG *) 0x400A40F0) // (UDPHS) UDPHS Name1 Register #define AT91C_UDPHS_CTRL (AT91_CAST(AT91_REG *) 0x400A4000) // (UDPHS) UDPHS Control Register #define AT91C_UDPHS_IPVERSION (AT91_CAST(AT91_REG *) 0x400A40FC) // (UDPHS) UDPHS Version Register // ========== Register definition for HDMA_CH_0 peripheral ========== #define AT91C_HDMA_CH_0_SADDR (AT91_CAST(AT91_REG *) 0x400B003C) // (HDMA_CH_0) HDMA Channel Source Address Register #define AT91C_HDMA_CH_0_DADDR (AT91_CAST(AT91_REG *) 0x400B0040) // (HDMA_CH_0) HDMA Channel Destination Address Register #define AT91C_HDMA_CH_0_CFG (AT91_CAST(AT91_REG *) 0x400B0050) // (HDMA_CH_0) HDMA Channel Configuration Register #define AT91C_HDMA_CH_0_CTRLB (AT91_CAST(AT91_REG *) 0x400B004C) // (HDMA_CH_0) HDMA Channel Control B Register #define AT91C_HDMA_CH_0_CTRLA (AT91_CAST(AT91_REG *) 0x400B0048) // (HDMA_CH_0) HDMA Channel Control A Register #define AT91C_HDMA_CH_0_DSCR (AT91_CAST(AT91_REG *) 0x400B0044) // (HDMA_CH_0) HDMA Channel Descriptor Address Register // ========== Register definition for HDMA_CH_1 peripheral ========== #define AT91C_HDMA_CH_1_DSCR (AT91_CAST(AT91_REG *) 0x400B006C) // (HDMA_CH_1) HDMA Channel Descriptor Address Register #define AT91C_HDMA_CH_1_CTRLB (AT91_CAST(AT91_REG *) 0x400B0074) // (HDMA_CH_1) HDMA Channel Control B Register #define AT91C_HDMA_CH_1_SADDR (AT91_CAST(AT91_REG *) 0x400B0064) // (HDMA_CH_1) HDMA Channel Source Address Register #define AT91C_HDMA_CH_1_CFG (AT91_CAST(AT91_REG *) 0x400B0078) // (HDMA_CH_1) HDMA Channel Configuration Register #define AT91C_HDMA_CH_1_DADDR (AT91_CAST(AT91_REG *) 0x400B0068) // (HDMA_CH_1) HDMA Channel Destination Address Register #define AT91C_HDMA_CH_1_CTRLA (AT91_CAST(AT91_REG *) 0x400B0070) // (HDMA_CH_1) HDMA Channel Control A Register // ========== Register definition for HDMA_CH_2 peripheral ========== #define AT91C_HDMA_CH_2_CTRLA (AT91_CAST(AT91_REG *) 0x400B0098) // (HDMA_CH_2) HDMA Channel Control A Register #define AT91C_HDMA_CH_2_SADDR (AT91_CAST(AT91_REG *) 0x400B008C) // (HDMA_CH_2) HDMA Channel Source Address Register #define AT91C_HDMA_CH_2_CTRLB (AT91_CAST(AT91_REG *) 0x400B009C) // (HDMA_CH_2) HDMA Channel Control B Register #define AT91C_HDMA_CH_2_DADDR (AT91_CAST(AT91_REG *) 0x400B0090) // (HDMA_CH_2) HDMA Channel Destination Address Register #define AT91C_HDMA_CH_2_CFG (AT91_CAST(AT91_REG *) 0x400B00A0) // (HDMA_CH_2) HDMA Channel Configuration Register #define AT91C_HDMA_CH_2_DSCR (AT91_CAST(AT91_REG *) 0x400B0094) // (HDMA_CH_2) HDMA Channel Descriptor Address Register // ========== Register definition for HDMA_CH_3 peripheral ========== #define AT91C_HDMA_CH_3_DSCR (AT91_CAST(AT91_REG *) 0x400B00BC) // (HDMA_CH_3) HDMA Channel Descriptor Address Register #define AT91C_HDMA_CH_3_SADDR (AT91_CAST(AT91_REG *) 0x400B00B4) // (HDMA_CH_3) HDMA Channel Source Address Register #define AT91C_HDMA_CH_3_CTRLB (AT91_CAST(AT91_REG *) 0x400B00C4) // (HDMA_CH_3) HDMA Channel Control B Register #define AT91C_HDMA_CH_3_CFG (AT91_CAST(AT91_REG *) 0x400B00C8) // (HDMA_CH_3) HDMA Channel Configuration Register #define AT91C_HDMA_CH_3_DADDR (AT91_CAST(AT91_REG *) 0x400B00B8) // (HDMA_CH_3) HDMA Channel Destination Address Register #define AT91C_HDMA_CH_3_CTRLA (AT91_CAST(AT91_REG *) 0x400B00C0) // (HDMA_CH_3) HDMA Channel Control A Register // ========== Register definition for HDMA peripheral ========== #define AT91C_HDMA_VER (AT91_CAST(AT91_REG *) 0x400B01FC) // (HDMA) HDMA VERSION REGISTER #define AT91C_HDMA_CHSR (AT91_CAST(AT91_REG *) 0x400B0030) // (HDMA) HDMA Channel Handler Status Register #define AT91C_HDMA_IPNAME2 (AT91_CAST(AT91_REG *) 0x400B01F4) // (HDMA) HDMA IPNAME2 REGISTER #define AT91C_HDMA_EBCIMR (AT91_CAST(AT91_REG *) 0x400B0020) // (HDMA) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register #define AT91C_HDMA_CHDR (AT91_CAST(AT91_REG *) 0x400B002C) // (HDMA) HDMA Channel Handler Disable Register #define AT91C_HDMA_EN (AT91_CAST(AT91_REG *) 0x400B0004) // (HDMA) HDMA Controller Enable Register #define AT91C_HDMA_GCFG (AT91_CAST(AT91_REG *) 0x400B0000) // (HDMA) HDMA Global Configuration Register #define AT91C_HDMA_IPNAME1 (AT91_CAST(AT91_REG *) 0x400B01F0) // (HDMA) HDMA IPNAME1 REGISTER #define AT91C_HDMA_LAST (AT91_CAST(AT91_REG *) 0x400B0010) // (HDMA) HDMA Software Last Transfer Flag Register #define AT91C_HDMA_FEATURES (AT91_CAST(AT91_REG *) 0x400B01F8) // (HDMA) HDMA FEATURES REGISTER #define AT91C_HDMA_CREQ (AT91_CAST(AT91_REG *) 0x400B000C) // (HDMA) HDMA Software Chunk Transfer Request Register #define AT91C_HDMA_EBCIER (AT91_CAST(AT91_REG *) 0x400B0018) // (HDMA) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register #define AT91C_HDMA_CHER (AT91_CAST(AT91_REG *) 0x400B0028) // (HDMA) HDMA Channel Handler Enable Register #define AT91C_HDMA_ADDRSIZE (AT91_CAST(AT91_REG *) 0x400B01EC) // (HDMA) HDMA ADDRSIZE REGISTER #define AT91C_HDMA_EBCISR (AT91_CAST(AT91_REG *) 0x400B0024) // (HDMA) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Status Register #define AT91C_HDMA_SREQ (AT91_CAST(AT91_REG *) 0x400B0008) // (HDMA) HDMA Software Single Request Register #define AT91C_HDMA_EBCIDR (AT91_CAST(AT91_REG *) 0x400B001C) // (HDMA) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register // ***************************************************************************** // PIO DEFINITIONS FOR AT91SAM3U4 // ***************************************************************************** #define AT91C_PIO_PA0 (1 << 0) // Pin Controlled by PA0 #define AT91C_PA0_TIOB0 (AT91C_PIO_PA0) // #define AT91C_PA0_SPI0_NPCS1 (AT91C_PIO_PA0) // #define AT91C_PIO_PA1 (1 << 1) // Pin Controlled by PA1 #define AT91C_PA1_TIOA0 (AT91C_PIO_PA1) // #define AT91C_PA1_SPI0_NPCS2 (AT91C_PIO_PA1) // #define AT91C_PIO_PA10 (1 << 10) // Pin Controlled by PA10 #define AT91C_PA10_TWCK0 (AT91C_PIO_PA10) // #define AT91C_PA10_PWML3 (AT91C_PIO_PA10) // #define AT91C_PIO_PA11 (1 << 11) // Pin Controlled by PA11 #define AT91C_PA11_DRXD (AT91C_PIO_PA11) // #define AT91C_PIO_PA12 (1 << 12) // Pin Controlled by PA12 #define AT91C_PA12_DTXD (AT91C_PIO_PA12) // #define AT91C_PIO_PA13 (1 << 13) // Pin Controlled by PA13 #define AT91C_PA13_SPI0_MISO (AT91C_PIO_PA13) // #define AT91C_PIO_PA14 (1 << 14) // Pin Controlled by PA14 #define AT91C_PA14_SPI0_MOSI (AT91C_PIO_PA14) // #define AT91C_PIO_PA15 (1 << 15) // Pin Controlled by PA15 #define AT91C_PA15_SPI0_SPCK (AT91C_PIO_PA15) // #define AT91C_PA15_PWMH2 (AT91C_PIO_PA15) // #define AT91C_PIO_PA16 (1 << 16) // Pin Controlled by PA16 #define AT91C_PA16_SPI0_NPCS0 (AT91C_PIO_PA16) // #define AT91C_PA16_NCS1 (AT91C_PIO_PA16) // #define AT91C_PIO_PA17 (1 << 17) // Pin Controlled by PA17 #define AT91C_PA17_SCK0 (AT91C_PIO_PA17) // #define AT91C_PIO_PA18 (1 << 18) // Pin Controlled by PA18 #define AT91C_PA18_TXD0 (AT91C_PIO_PA18) // #define AT91C_PIO_PA19 (1 << 19) // Pin Controlled by PA19 #define AT91C_PA19_RXD0 (AT91C_PIO_PA19) // #define AT91C_PA19_SPI0_NPCS3 (AT91C_PIO_PA19) // #define AT91C_PIO_PA2 (1 << 2) // Pin Controlled by PA2 #define AT91C_PA2_TCLK0 (AT91C_PIO_PA2) // #define AT91C_PA2_ADTRG1 (AT91C_PIO_PA2) // #define AT91C_PIO_PA20 (1 << 20) // Pin Controlled by PA20 #define AT91C_PA20_TXD1 (AT91C_PIO_PA20) // #define AT91C_PA20_PWMH3 (AT91C_PIO_PA20) // #define AT91C_PIO_PA21 (1 << 21) // Pin Controlled by PA21 #define AT91C_PA21_RXD1 (AT91C_PIO_PA21) // #define AT91C_PA21_PCK0 (AT91C_PIO_PA21) // #define AT91C_PIO_PA22 (1 << 22) // Pin Controlled by PA22 #define AT91C_PA22_TXD2 (AT91C_PIO_PA22) // #define AT91C_PA22_RTS1 (AT91C_PIO_PA22) // #define AT91C_PIO_PA23 (1 << 23) // Pin Controlled by PA23 #define AT91C_PA23_RXD2 (AT91C_PIO_PA23) // #define AT91C_PA23_CTS1 (AT91C_PIO_PA23) // #define AT91C_PIO_PA24 (1 << 24) // Pin Controlled by PA24 #define AT91C_PA24_TWD1 (AT91C_PIO_PA24) // #define AT91C_PA24_SCK1 (AT91C_PIO_PA24) // #define AT91C_PIO_PA25 (1 << 25) // Pin Controlled by PA25 #define AT91C_PA25_TWCK1 (AT91C_PIO_PA25) // #define AT91C_PA25_SCK2 (AT91C_PIO_PA25) // #define AT91C_PIO_PA26 (1 << 26) // Pin Controlled by PA26 #define AT91C_PA26_TD0 (AT91C_PIO_PA26) // #define AT91C_PA26_TCLK2 (AT91C_PIO_PA26) // #define AT91C_PIO_PA27 (1 << 27) // Pin Controlled by PA27 #define AT91C_PA27_RD0 (AT91C_PIO_PA27) // #define AT91C_PA27_PCK0 (AT91C_PIO_PA27) // #define AT91C_PIO_PA28 (1 << 28) // Pin Controlled by PA28 #define AT91C_PA28_TK0 (AT91C_PIO_PA28) // #define AT91C_PA28_PWMH0 (AT91C_PIO_PA28) // #define AT91C_PIO_PA29 (1 << 29) // Pin Controlled by PA29 #define AT91C_PA29_RK0 (AT91C_PIO_PA29) // #define AT91C_PA29_PWMH1 (AT91C_PIO_PA29) // #define AT91C_PIO_PA3 (1 << 3) // Pin Controlled by PA3 #define AT91C_PA3_MCI0_CK (AT91C_PIO_PA3) // #define AT91C_PA3_PCK1 (AT91C_PIO_PA3) // #define AT91C_PIO_PA30 (1 << 30) // Pin Controlled by PA30 #define AT91C_PA30_TF0 (AT91C_PIO_PA30) // #define AT91C_PA30_TIOA2 (AT91C_PIO_PA30) // #define AT91C_PIO_PA31 (1 << 31) // Pin Controlled by PA31 #define AT91C_PA31_RF0 (AT91C_PIO_PA31) // #define AT91C_PA31_TIOB2 (AT91C_PIO_PA31) // #define AT91C_PIO_PA4 (1 << 4) // Pin Controlled by PA4 #define AT91C_PA4_MCI0_CDA (AT91C_PIO_PA4) // #define AT91C_PA4_PWMH0 (AT91C_PIO_PA4) // #define AT91C_PIO_PA5 (1 << 5) // Pin Controlled by PA5 #define AT91C_PA5_MCI0_DA0 (AT91C_PIO_PA5) // #define AT91C_PA5_PWMH1 (AT91C_PIO_PA5) // #define AT91C_PIO_PA6 (1 << 6) // Pin Controlled by PA6 #define AT91C_PA6_MCI0_DA1 (AT91C_PIO_PA6) // #define AT91C_PA6_PWMH2 (AT91C_PIO_PA6) // #define AT91C_PIO_PA7 (1 << 7) // Pin Controlled by PA7 #define AT91C_PA7_MCI0_DA2 (AT91C_PIO_PA7) // #define AT91C_PA7_PWML0 (AT91C_PIO_PA7) // #define AT91C_PIO_PA8 (1 << 8) // Pin Controlled by PA8 #define AT91C_PA8_MCI0_DA3 (AT91C_PIO_PA8) // #define AT91C_PA8_PWML1 (AT91C_PIO_PA8) // #define AT91C_PIO_PA9 (1 << 9) // Pin Controlled by PA9 #define AT91C_PA9_TWD0 (AT91C_PIO_PA9) // #define AT91C_PA9_PWML2 (AT91C_PIO_PA9) // #define AT91C_PIO_PB0 (1 << 0) // Pin Controlled by PB0 #define AT91C_PB0_PWMH0 (AT91C_PIO_PB0) // #define AT91C_PB0_A2 (AT91C_PIO_PB0) // #define AT91C_PIO_PB1 (1 << 1) // Pin Controlled by PB1 #define AT91C_PB1_PWMH1 (AT91C_PIO_PB1) // #define AT91C_PB1_A3 (AT91C_PIO_PB1) // #define AT91C_PIO_PB10 (1 << 10) // Pin Controlled by PB10 #define AT91C_PB10_D1 (AT91C_PIO_PB10) // #define AT91C_PB10_DSR0 (AT91C_PIO_PB10) // #define AT91C_PIO_PB11 (1 << 11) // Pin Controlled by PB11 #define AT91C_PB11_D2 (AT91C_PIO_PB11) // #define AT91C_PB11_DCD0 (AT91C_PIO_PB11) // #define AT91C_PIO_PB12 (1 << 12) // Pin Controlled by PB12 #define AT91C_PB12_D3 (AT91C_PIO_PB12) // #define AT91C_PB12_RI0 (AT91C_PIO_PB12) // #define AT91C_PIO_PB13 (1 << 13) // Pin Controlled by PB13 #define AT91C_PB13_D4 (AT91C_PIO_PB13) // #define AT91C_PB13_PWMH0 (AT91C_PIO_PB13) // #define AT91C_PIO_PB14 (1 << 14) // Pin Controlled by PB14 #define AT91C_PB14_D5 (AT91C_PIO_PB14) // #define AT91C_PB14_PWMH1 (AT91C_PIO_PB14) // #define AT91C_PIO_PB15 (1 << 15) // Pin Controlled by PB15 #define AT91C_PB15_D6 (AT91C_PIO_PB15) // #define AT91C_PB15_PWMH2 (AT91C_PIO_PB15) // #define AT91C_PIO_PB16 (1 << 16) // Pin Controlled by PB16 #define AT91C_PB16_D7 (AT91C_PIO_PB16) // #define AT91C_PB16_PWMH3 (AT91C_PIO_PB16) // #define AT91C_PIO_PB17 (1 << 17) // Pin Controlled by PB17 #define AT91C_PB17_NANDOE (AT91C_PIO_PB17) // #define AT91C_PB17_PWML0 (AT91C_PIO_PB17) // #define AT91C_PIO_PB18 (1 << 18) // Pin Controlled by PB18 #define AT91C_PB18_NANDWE (AT91C_PIO_PB18) // #define AT91C_PB18_PWML1 (AT91C_PIO_PB18) // #define AT91C_PIO_PB19 (1 << 19) // Pin Controlled by PB19 #define AT91C_PB19_NRD (AT91C_PIO_PB19) // #define AT91C_PB19_PWML2 (AT91C_PIO_PB19) // #define AT91C_PIO_PB2 (1 << 2) // Pin Controlled by PB2 #define AT91C_PB2_PWMH2 (AT91C_PIO_PB2) // #define AT91C_PB2_A4 (AT91C_PIO_PB2) // #define AT91C_PIO_PB20 (1 << 20) // Pin Controlled by PB20 #define AT91C_PB20_NCS0 (AT91C_PIO_PB20) // #define AT91C_PB20_PWML3 (AT91C_PIO_PB20) // #define AT91C_PIO_PB21 (1 << 21) // Pin Controlled by PB21 #define AT91C_PB21_A21_NANDALE (AT91C_PIO_PB21) // #define AT91C_PB21_RTS2 (AT91C_PIO_PB21) // #define AT91C_PIO_PB22 (1 << 22) // Pin Controlled by PB22 #define AT91C_PB22_A22_NANDCLE (AT91C_PIO_PB22) // #define AT91C_PB22_CTS2 (AT91C_PIO_PB22) // #define AT91C_PIO_PB23 (1 << 23) // Pin Controlled by PB23 #define AT91C_PB23_NWR0_NWE (AT91C_PIO_PB23) // #define AT91C_PB23_PCK2 (AT91C_PIO_PB23) // #define AT91C_PIO_PB24 (1 << 24) // Pin Controlled by PB24 #define AT91C_PB24_NANDRDY (AT91C_PIO_PB24) // #define AT91C_PB24_PCK1 (AT91C_PIO_PB24) // #define AT91C_PIO_PB25 (1 << 25) // Pin Controlled by PB25 #define AT91C_PB25_D8 (AT91C_PIO_PB25) // #define AT91C_PB25_PWML0 (AT91C_PIO_PB25) // #define AT91C_PIO_PB26 (1 << 26) // Pin Controlled by PB26 #define AT91C_PB26_D9 (AT91C_PIO_PB26) // #define AT91C_PB26_PWML1 (AT91C_PIO_PB26) // #define AT91C_PIO_PB27 (1 << 27) // Pin Controlled by PB27 #define AT91C_PB27_D10 (AT91C_PIO_PB27) // #define AT91C_PB27_PWML2 (AT91C_PIO_PB27) // #define AT91C_PIO_PB28 (1 << 28) // Pin Controlled by PB28 #define AT91C_PB28_D11 (AT91C_PIO_PB28) // #define AT91C_PB28_PWML3 (AT91C_PIO_PB28) // #define AT91C_PIO_PB29 (1 << 29) // Pin Controlled by PB29 #define AT91C_PB29_D12 (AT91C_PIO_PB29) // #define AT91C_PIO_PB3 (1 << 3) // Pin Controlled by PB3 #define AT91C_PB3_PWMH3 (AT91C_PIO_PB3) // #define AT91C_PB3_A5 (AT91C_PIO_PB3) // #define AT91C_PIO_PB30 (1 << 30) // Pin Controlled by PB30 #define AT91C_PB30_D13 (AT91C_PIO_PB30) // #define AT91C_PIO_PB31 (1 << 31) // Pin Controlled by PB31 #define AT91C_PB31_D14 (AT91C_PIO_PB31) // #define AT91C_PIO_PB4 (1 << 4) // Pin Controlled by PB4 #define AT91C_PB4_TCLK1 (AT91C_PIO_PB4) // #define AT91C_PB4_A6 (AT91C_PIO_PB4) // #define AT91C_PIO_PB5 (1 << 5) // Pin Controlled by PB5 #define AT91C_PB5_TIOA1 (AT91C_PIO_PB5) // #define AT91C_PB5_A7 (AT91C_PIO_PB5) // #define AT91C_PIO_PB6 (1 << 6) // Pin Controlled by PB6 #define AT91C_PB6_TIOB1 (AT91C_PIO_PB6) // #define AT91C_PB6_D15 (AT91C_PIO_PB6) // #define AT91C_PIO_PB7 (1 << 7) // Pin Controlled by PB7 #define AT91C_PB7_RTS0 (AT91C_PIO_PB7) // #define AT91C_PB7_A0_NBS0 (AT91C_PIO_PB7) // #define AT91C_PIO_PB8 (1 << 8) // Pin Controlled by PB8 #define AT91C_PB8_CTS0 (AT91C_PIO_PB8) // #define AT91C_PB8_A1 (AT91C_PIO_PB8) // #define AT91C_PIO_PB9 (1 << 9) // Pin Controlled by PB9 #define AT91C_PB9_D0 (AT91C_PIO_PB9) // #define AT91C_PB9_DTR0 (AT91C_PIO_PB9) // #define AT91C_PIO_PC0 (1 << 0) // Pin Controlled by PC0 #define AT91C_PC0_A2 (AT91C_PIO_PC0) // #define AT91C_PIO_PC1 (1 << 1) // Pin Controlled by PC1 #define AT91C_PC1_A3 (AT91C_PIO_PC1) // #define AT91C_PIO_PC10 (1 << 10) // Pin Controlled by PC10 #define AT91C_PC10_A12 (AT91C_PIO_PC10) // #define AT91C_PC10_CTS3 (AT91C_PIO_PC10) // #define AT91C_PIO_PC11 (1 << 11) // Pin Controlled by PC11 #define AT91C_PC11_A13 (AT91C_PIO_PC11) // #define AT91C_PC11_RTS3 (AT91C_PIO_PC11) // #define AT91C_PIO_PC12 (1 << 12) // Pin Controlled by PC12 #define AT91C_PC12_NCS1 (AT91C_PIO_PC12) // #define AT91C_PC12_TXD3 (AT91C_PIO_PC12) // #define AT91C_PIO_PC13 (1 << 13) // Pin Controlled by PC13 #define AT91C_PC13_A2 (AT91C_PIO_PC13) // #define AT91C_PC13_RXD3 (AT91C_PIO_PC13) // #define AT91C_PIO_PC14 (1 << 14) // Pin Controlled by PC14 #define AT91C_PC14_A3 (AT91C_PIO_PC14) // #define AT91C_PC14_SPI0_NPCS2 (AT91C_PIO_PC14) // #define AT91C_PIO_PC15 (1 << 15) // Pin Controlled by PC15 #define AT91C_PC15_NWR1_NBS1 (AT91C_PIO_PC15) // #define AT91C_PIO_PC16 (1 << 16) // Pin Controlled by PC16 #define AT91C_PC16_NCS2 (AT91C_PIO_PC16) // #define AT91C_PC16_PWML3 (AT91C_PIO_PC16) // #define AT91C_PIO_PC17 (1 << 17) // Pin Controlled by PC17 #define AT91C_PC17_NCS3 (AT91C_PIO_PC17) // #define AT91C_PC17_A24 (AT91C_PIO_PC17) // #define AT91C_PIO_PC18 (1 << 18) // Pin Controlled by PC18 #define AT91C_PC18_NWAIT (AT91C_PIO_PC18) // #define AT91C_PIO_PC19 (1 << 19) // Pin Controlled by PC19 #define AT91C_PC19_SCK3 (AT91C_PIO_PC19) // #define AT91C_PC19_NPCS1 (AT91C_PIO_PC19) // #define AT91C_PIO_PC2 (1 << 2) // Pin Controlled by PC2 #define AT91C_PC2_A4 (AT91C_PIO_PC2) // #define AT91C_PIO_PC20 (1 << 20) // Pin Controlled by PC20 #define AT91C_PC20_A14 (AT91C_PIO_PC20) // #define AT91C_PIO_PC21 (1 << 21) // Pin Controlled by PC21 #define AT91C_PC21_A15 (AT91C_PIO_PC21) // #define AT91C_PIO_PC22 (1 << 22) // Pin Controlled by PC22 #define AT91C_PC22_A16 (AT91C_PIO_PC22) // #define AT91C_PIO_PC23 (1 << 23) // Pin Controlled by PC23 #define AT91C_PC23_A17 (AT91C_PIO_PC23) // #define AT91C_PIO_PC24 (1 << 24) // Pin Controlled by PC24 #define AT91C_PC24_A18 (AT91C_PIO_PC24) // #define AT91C_PC24_PWMH0 (AT91C_PIO_PC24) // #define AT91C_PIO_PC25 (1 << 25) // Pin Controlled by PC25 #define AT91C_PC25_A19 (AT91C_PIO_PC25) // #define AT91C_PC25_PWMH1 (AT91C_PIO_PC25) // #define AT91C_PIO_PC26 (1 << 26) // Pin Controlled by PC26 #define AT91C_PC26_A20 (AT91C_PIO_PC26) // #define AT91C_PC26_PWMH2 (AT91C_PIO_PC26) // #define AT91C_PIO_PC27 (1 << 27) // Pin Controlled by PC27 #define AT91C_PC27_A23 (AT91C_PIO_PC27) // #define AT91C_PC27_PWMH3 (AT91C_PIO_PC27) // #define AT91C_PIO_PC28 (1 << 28) // Pin Controlled by PC28 #define AT91C_PC28_A24 (AT91C_PIO_PC28) // #define AT91C_PC28_MCI0_DA4 (AT91C_PIO_PC28) // #define AT91C_PIO_PC29 (1 << 29) // Pin Controlled by PC29 #define AT91C_PC29_PWML0 (AT91C_PIO_PC29) // #define AT91C_PC29_MCI0_DA5 (AT91C_PIO_PC29) // #define AT91C_PIO_PC3 (1 << 3) // Pin Controlled by PC3 #define AT91C_PC3_A5 (AT91C_PIO_PC3) // #define AT91C_PC3_SPI0_NPCS1 (AT91C_PIO_PC3) // #define AT91C_PIO_PC30 (1 << 30) // Pin Controlled by PC30 #define AT91C_PC30_PWML1 (AT91C_PIO_PC30) // #define AT91C_PC30_MCI0_DA6 (AT91C_PIO_PC30) // #define AT91C_PIO_PC31 (1 << 31) // Pin Controlled by PC31 #define AT91C_PC31_PWML2 (AT91C_PIO_PC31) // #define AT91C_PC31_MCI0_DA7 (AT91C_PIO_PC31) // #define AT91C_PIO_PC4 (1 << 4) // Pin Controlled by PC4 #define AT91C_PC4_A6 (AT91C_PIO_PC4) // #define AT91C_PC4_SPI0_NPCS2 (AT91C_PIO_PC4) // #define AT91C_PIO_PC5 (1 << 5) // Pin Controlled by PC5 #define AT91C_PC5_A7 (AT91C_PIO_PC5) // #define AT91C_PC5_SPI0_NPCS3 (AT91C_PIO_PC5) // #define AT91C_PIO_PC6 (1 << 6) // Pin Controlled by PC6 #define AT91C_PC6_A8 (AT91C_PIO_PC6) // #define AT91C_PC6_PWML0 (AT91C_PIO_PC6) // #define AT91C_PIO_PC7 (1 << 7) // Pin Controlled by PC7 #define AT91C_PC7_A9 (AT91C_PIO_PC7) // #define AT91C_PC7_PWML1 (AT91C_PIO_PC7) // #define AT91C_PIO_PC8 (1 << 8) // Pin Controlled by PC8 #define AT91C_PC8_A10 (AT91C_PIO_PC8) // #define AT91C_PC8_PWML2 (AT91C_PIO_PC8) // #define AT91C_PIO_PC9 (1 << 9) // Pin Controlled by PC9 #define AT91C_PC9_A11 (AT91C_PIO_PC9) // #define AT91C_PC9_PWML3 (AT91C_PIO_PC9) // // ***************************************************************************** // PERIPHERAL ID DEFINITIONS FOR AT91SAM3U4 // ***************************************************************************** #define AT91C_ID_SUPC ( 0) // SUPPLY CONTROLLER #define AT91C_ID_RSTC ( 1) // RESET CONTROLLER #define AT91C_ID_RTC ( 2) // REAL TIME CLOCK #define AT91C_ID_RTT ( 3) // REAL TIME TIMER #define AT91C_ID_WDG ( 4) // WATCHDOG TIMER #define AT91C_ID_PMC ( 5) // PMC #define AT91C_ID_EFC0 ( 6) // EFC0 #define AT91C_ID_EFC1 ( 7) // EFC1 #define AT91C_ID_DBGU ( 8) // DBGU #define AT91C_ID_HSMC4 ( 9) // HSMC4 #define AT91C_ID_PIOA (10) // Parallel IO Controller A #define AT91C_ID_PIOB (11) // Parallel IO Controller B #define AT91C_ID_PIOC (12) // Parallel IO Controller C #define AT91C_ID_US0 (13) // USART 0 #define AT91C_ID_US1 (14) // USART 1 #define AT91C_ID_US2 (15) // USART 2 #define AT91C_ID_US3 (16) // USART 3 #define AT91C_ID_MCI0 (17) // Multimedia Card Interface #define AT91C_ID_TWI0 (18) // TWI 0 #define AT91C_ID_TWI1 (19) // TWI 1 #define AT91C_ID_SPI0 (20) // Serial Peripheral Interface #define AT91C_ID_SSC0 (21) // Serial Synchronous Controller 0 #define AT91C_ID_TC0 (22) // Timer Counter 0 #define AT91C_ID_TC1 (23) // Timer Counter 1 #define AT91C_ID_TC2 (24) // Timer Counter 2 #define AT91C_ID_PWMC (25) // Pulse Width Modulation Controller #define AT91C_ID_ADC12B (26) // 12-bit ADC Controller (ADC12B) #define AT91C_ID_ADC (27) // 10-bit ADC Controller (ADC) #define AT91C_ID_HDMA (28) // HDMA #define AT91C_ID_UDPHS (29) // USB Device High Speed #define AT91C_ALL_INT (0x3FFFFFFF) // ALL VALID INTERRUPTS // ***************************************************************************** // BASE ADDRESS DEFINITIONS FOR AT91SAM3U4 // ***************************************************************************** #define AT91C_BASE_SYS (AT91_CAST(AT91PS_SYS) 0x400E0000) // (SYS) Base Address #define AT91C_BASE_HSMC4_CS0 (AT91_CAST(AT91PS_HSMC4_CS) 0x400E0070) // (HSMC4_CS0) Base Address #define AT91C_BASE_HSMC4_CS1 (AT91_CAST(AT91PS_HSMC4_CS) 0x400E0084) // (HSMC4_CS1) Base Address #define AT91C_BASE_HSMC4_CS2 (AT91_CAST(AT91PS_HSMC4_CS) 0x400E0098) // (HSMC4_CS2) Base Address #define AT91C_BASE_HSMC4_CS3 (AT91_CAST(AT91PS_HSMC4_CS) 0x400E00AC) // (HSMC4_CS3) Base Address #define AT91C_BASE_HSMC4_NFC (AT91_CAST(AT91PS_HSMC4_CS) 0x400E00FC) // (HSMC4_NFC) Base Address #define AT91C_BASE_HSMC4 (AT91_CAST(AT91PS_HSMC4) 0x400E0000) // (HSMC4) Base Address #define AT91C_BASE_MATRIX (AT91_CAST(AT91PS_HMATRIX2) 0x400E0200) // (MATRIX) Base Address #define AT91C_BASE_NVIC (AT91_CAST(AT91PS_NVIC) 0xE000E000) // (NVIC) Base Address #define AT91C_BASE_MPU (AT91_CAST(AT91PS_MPU) 0xE000ED90) // (MPU) Base Address #define AT91C_BASE_CM3 (AT91_CAST(AT91PS_CM3) 0xE000ED00) // (CM3) Base Address #define AT91C_BASE_PDC_DBGU (AT91_CAST(AT91PS_PDC) 0x400E0700) // (PDC_DBGU) Base Address #define AT91C_BASE_DBGU (AT91_CAST(AT91PS_DBGU) 0x400E0600) // (DBGU) Base Address #define AT91C_BASE_PIOA (AT91_CAST(AT91PS_PIO) 0x400E0C00) // (PIOA) Base Address #define AT91C_BASE_PIOB (AT91_CAST(AT91PS_PIO) 0x400E0E00) // (PIOB) Base Address #define AT91C_BASE_PIOC (AT91_CAST(AT91PS_PIO) 0x400E1000) // (PIOC) Base Address #define AT91C_BASE_PMC (AT91_CAST(AT91PS_PMC) 0x400E0400) // (PMC) Base Address #define AT91C_BASE_CKGR (AT91_CAST(AT91PS_CKGR) 0x400E041C) // (CKGR) Base Address #define AT91C_BASE_RSTC (AT91_CAST(AT91PS_RSTC) 0x400E1200) // (RSTC) Base Address #define AT91C_BASE_SUPC (AT91_CAST(AT91PS_SUPC) 0x400E1210) // (SUPC) Base Address #define AT91C_BASE_RTTC (AT91_CAST(AT91PS_RTTC) 0x400E1230) // (RTTC) Base Address #define AT91C_BASE_WDTC (AT91_CAST(AT91PS_WDTC) 0x400E1250) // (WDTC) Base Address #define AT91C_BASE_RTC (AT91_CAST(AT91PS_RTC) 0x400E1260) // (RTC) Base Address #define AT91C_BASE_ADC0 (AT91_CAST(AT91PS_ADC) 0x400AC000) // (ADC0) Base Address #define AT91C_BASE_ADC12B (AT91_CAST(AT91PS_ADC12B ) 0x400A8000) // (ADC12B ) Base Address #define AT91C_BASE_TC0 (AT91_CAST(AT91PS_TC) 0x40080000) // (TC0) Base Address #define AT91C_BASE_TC1 (AT91_CAST(AT91PS_TC) 0x40080040) // (TC1) Base Address #define AT91C_BASE_TC2 (AT91_CAST(AT91PS_TC) 0x40080080) // (TC2) Base Address #define AT91C_BASE_TCB0 (AT91_CAST(AT91PS_TCB) 0x40080000) // (TCB0) Base Address #define AT91C_BASE_TCB1 (AT91_CAST(AT91PS_TCB) 0x40080040) // (TCB1) Base Address #define AT91C_BASE_TCB2 (AT91_CAST(AT91PS_TCB) 0x40080080) // (TCB2) Base Address #define AT91C_BASE_EFC0 (AT91_CAST(AT91PS_EFC) 0x400E0800) // (EFC0) Base Address #define AT91C_BASE_EFC1 (AT91_CAST(AT91PS_EFC) 0x400E0A00) // (EFC1) Base Address #define AT91C_BASE_MCI0 (AT91_CAST(AT91PS_MCI) 0x40000000) // (MCI0) Base Address #define AT91C_BASE_PDC_TWI0 (AT91_CAST(AT91PS_PDC) 0x40084100) // (PDC_TWI0) Base Address #define AT91C_BASE_PDC_TWI1 (AT91_CAST(AT91PS_PDC) 0x40088100) // (PDC_TWI1) Base Address #define AT91C_BASE_TWI0 (AT91_CAST(AT91PS_TWI) 0x40084000) // (TWI0) Base Address #define AT91C_BASE_TWI1 (AT91_CAST(AT91PS_TWI) 0x40088000) // (TWI1) Base Address #define AT91C_BASE_PDC_US0 (AT91_CAST(AT91PS_PDC) 0x40090100) // (PDC_US0) Base Address #define AT91C_BASE_US0 (AT91_CAST(AT91PS_USART) 0x40090000) // (US0) Base Address #define AT91C_BASE_PDC_US1 (AT91_CAST(AT91PS_PDC) 0x40094100) // (PDC_US1) Base Address #define AT91C_BASE_US1 (AT91_CAST(AT91PS_USART) 0x40094000) // (US1) Base Address #define AT91C_BASE_PDC_US2 (AT91_CAST(AT91PS_PDC) 0x40098100) // (PDC_US2) Base Address #define AT91C_BASE_US2 (AT91_CAST(AT91PS_USART) 0x40098000) // (US2) Base Address #define AT91C_BASE_PDC_US3 (AT91_CAST(AT91PS_PDC) 0x4009C100) // (PDC_US3) Base Address #define AT91C_BASE_US3 (AT91_CAST(AT91PS_USART) 0x4009C000) // (US3) Base Address #define AT91C_BASE_PDC_SSC0 (AT91_CAST(AT91PS_PDC) 0x40004100) // (PDC_SSC0) Base Address #define AT91C_BASE_SSC0 (AT91_CAST(AT91PS_SSC) 0x40004000) // (SSC0) Base Address #define AT91C_BASE_PDC_PWMC (AT91_CAST(AT91PS_PDC) 0x4008C100) // (PDC_PWMC) Base Address #define AT91C_BASE_PWMC_CH0 (AT91_CAST(AT91PS_PWMC_CH) 0x4008C200) // (PWMC_CH0) Base Address #define AT91C_BASE_PWMC_CH1 (AT91_CAST(AT91PS_PWMC_CH) 0x4008C220) // (PWMC_CH1) Base Address #define AT91C_BASE_PWMC_CH2 (AT91_CAST(AT91PS_PWMC_CH) 0x4008C240) // (PWMC_CH2) Base Address #define AT91C_BASE_PWMC_CH3 (AT91_CAST(AT91PS_PWMC_CH) 0x4008C260) // (PWMC_CH3) Base Address #define AT91C_BASE_PWMC (AT91_CAST(AT91PS_PWMC) 0x4008C000) // (PWMC) Base Address #define AT91C_BASE_SPI0 (AT91_CAST(AT91PS_SPI) 0x40008000) // (SPI0) Base Address #define AT91C_BASE_UDPHS_EPTFIFO (AT91_CAST(AT91PS_UDPHS_EPTFIFO) 0x20180000) // (UDPHS_EPTFIFO) Base Address #define AT91C_BASE_UDPHS_EPT_0 (AT91_CAST(AT91PS_UDPHS_EPT) 0x400A4100) // (UDPHS_EPT_0) Base Address #define AT91C_BASE_UDPHS_EPT_1 (AT91_CAST(AT91PS_UDPHS_EPT) 0x400A4120) // (UDPHS_EPT_1) Base Address #define AT91C_BASE_UDPHS_EPT_2 (AT91_CAST(AT91PS_UDPHS_EPT) 0x400A4140) // (UDPHS_EPT_2) Base Address #define AT91C_BASE_UDPHS_EPT_3 (AT91_CAST(AT91PS_UDPHS_EPT) 0x400A4160) // (UDPHS_EPT_3) Base Address #define AT91C_BASE_UDPHS_EPT_4 (AT91_CAST(AT91PS_UDPHS_EPT) 0x400A4180) // (UDPHS_EPT_4) Base Address #define AT91C_BASE_UDPHS_EPT_5 (AT91_CAST(AT91PS_UDPHS_EPT) 0x400A41A0) // (UDPHS_EPT_5) Base Address #define AT91C_BASE_UDPHS_EPT_6 (AT91_CAST(AT91PS_UDPHS_EPT) 0x400A41C0) // (UDPHS_EPT_6) Base Address #define AT91C_BASE_UDPHS_DMA_1 (AT91_CAST(AT91PS_UDPHS_DMA) 0x400A4310) // (UDPHS_DMA_1) Base Address #define AT91C_BASE_UDPHS_DMA_2 (AT91_CAST(AT91PS_UDPHS_DMA) 0x400A4320) // (UDPHS_DMA_2) Base Address #define AT91C_BASE_UDPHS_DMA_3 (AT91_CAST(AT91PS_UDPHS_DMA) 0x400A4330) // (UDPHS_DMA_3) Base Address #define AT91C_BASE_UDPHS_DMA_4 (AT91_CAST(AT91PS_UDPHS_DMA) 0x400A4340) // (UDPHS_DMA_4) Base Address #define AT91C_BASE_UDPHS_DMA_5 (AT91_CAST(AT91PS_UDPHS_DMA) 0x400A4350) // (UDPHS_DMA_5) Base Address #define AT91C_BASE_UDPHS_DMA_6 (AT91_CAST(AT91PS_UDPHS_DMA) 0x400A4360) // (UDPHS_DMA_6) Base Address #define AT91C_BASE_UDPHS (AT91_CAST(AT91PS_UDPHS) 0x400A4000) // (UDPHS) Base Address #define AT91C_BASE_HDMA_CH_0 (AT91_CAST(AT91PS_HDMA_CH) 0x400B003C) // (HDMA_CH_0) Base Address #define AT91C_BASE_HDMA_CH_1 (AT91_CAST(AT91PS_HDMA_CH) 0x400B0064) // (HDMA_CH_1) Base Address #define AT91C_BASE_HDMA_CH_2 (AT91_CAST(AT91PS_HDMA_CH) 0x400B008C) // (HDMA_CH_2) Base Address #define AT91C_BASE_HDMA_CH_3 (AT91_CAST(AT91PS_HDMA_CH) 0x400B00B4) // (HDMA_CH_3) Base Address #define AT91C_BASE_HDMA (AT91_CAST(AT91PS_HDMA) 0x400B0000) // (HDMA) Base Address // ***************************************************************************** // MEMORY MAPPING DEFINITIONS FOR AT91SAM3U4 // ***************************************************************************** // ITCM #define AT91C_ITCM (0x00100000) // Maximum ITCM Area base address #define AT91C_ITCM_SIZE (0x00010000) // Maximum ITCM Area size in byte (64 Kbytes) // DTCM #define AT91C_DTCM (0x00200000) // Maximum DTCM Area base address #define AT91C_DTCM_SIZE (0x00010000) // Maximum DTCM Area size in byte (64 Kbytes) // IRAM #define AT91C_IRAM (0x20000000) // Maximum Internal SRAM base address #define AT91C_IRAM_SIZE (0x00008000) // Maximum Internal SRAM size in byte (32 Kbytes) // IRAM_MIN #define AT91C_IRAM_MIN (0x00300000) // Minimum Internal RAM base address #define AT91C_IRAM_MIN_SIZE (0x00004000) // Minimum Internal RAM size in byte (16 Kbytes) // IROM #define AT91C_IROM (0x00180000) // Internal ROM base address #define AT91C_IROM_SIZE (0x00008000) // Internal ROM size in byte (32 Kbytes) // IFLASH0 #define AT91C_IFLASH0 (0x00080000) // Maximum IFLASH Area : 128Kbyte base address #define AT91C_IFLASH0_SIZE (0x00020000) // Maximum IFLASH Area : 128Kbyte size in byte (128 Kbytes) #define AT91C_IFLASH0_PAGE_SIZE (256) // Maximum IFLASH Area : 128Kbyte Page Size: 256 bytes #define AT91C_IFLASH0_LOCK_REGION_SIZE (8192) // Maximum IFLASH Area : 128Kbyte Lock Region Size: 8 Kbytes #define AT91C_IFLASH0_NB_OF_PAGES (512) // Maximum IFLASH Area : 128Kbyte Number of Pages: 512 bytes #define AT91C_IFLASH0_NB_OF_LOCK_BITS (16) // Maximum IFLASH Area : 128Kbyte Number of Lock Bits: 16 bytes // IFLASH1 #define AT91C_IFLASH1 (0x00100000) // Maximum IFLASH Area : 128Kbyte base address #define AT91C_IFLASH1_SIZE (0x00020000) // Maximum IFLASH Area : 128Kbyte size in byte (128 Kbytes) #define AT91C_IFLASH1_PAGE_SIZE (256) // Maximum IFLASH Area : 128Kbyte Page Size: 256 bytes #define AT91C_IFLASH1_LOCK_REGION_SIZE (8192) // Maximum IFLASH Area : 128Kbyte Lock Region Size: 8 Kbytes #define AT91C_IFLASH1_NB_OF_PAGES (512) // Maximum IFLASH Area : 128Kbyte Number of Pages: 512 bytes #define AT91C_IFLASH1_NB_OF_LOCK_BITS (16) // Maximum IFLASH Area : 128Kbyte Number of Lock Bits: 16 bytes // EBI_CS0 #define AT91C_EBI_CS0 (0x10000000) // EBI Chip Select 0 base address #define AT91C_EBI_CS0_SIZE (0x10000000) // EBI Chip Select 0 size in byte (262144 Kbytes) // EBI_CS1 #define AT91C_EBI_CS1 (0x20000000) // EBI Chip Select 1 base address #define AT91C_EBI_CS1_SIZE (0x10000000) // EBI Chip Select 1 size in byte (262144 Kbytes) // EBI_SDRAM #define AT91C_EBI_SDRAM (0x20000000) // SDRAM on EBI Chip Select 1 base address #define AT91C_EBI_SDRAM_SIZE (0x10000000) // SDRAM on EBI Chip Select 1 size in byte (262144 Kbytes) // EBI_SDRAM_16BIT #define AT91C_EBI_SDRAM_16BIT (0x20000000) // SDRAM on EBI Chip Select 1 base address #define AT91C_EBI_SDRAM_16BIT_SIZE (0x02000000) // SDRAM on EBI Chip Select 1 size in byte (32768 Kbytes) // EBI_SDRAM_32BIT #define AT91C_EBI_SDRAM_32BIT (0x20000000) // SDRAM on EBI Chip Select 1 base address #define AT91C_EBI_SDRAM_32BIT_SIZE (0x04000000) // SDRAM on EBI Chip Select 1 size in byte (65536 Kbytes) // EBI_CS2 #define AT91C_EBI_CS2 (0x30000000) // EBI Chip Select 2 base address #define AT91C_EBI_CS2_SIZE (0x10000000) // EBI Chip Select 2 size in byte (262144 Kbytes) // EBI_CS3 #define AT91C_EBI_CS3 (0x40000000) // EBI Chip Select 3 base address #define AT91C_EBI_CS3_SIZE (0x10000000) // EBI Chip Select 3 size in byte (262144 Kbytes) // EBI_SM #define AT91C_EBI_SM (0x40000000) // NANDFLASH on EBI Chip Select 3 base address #define AT91C_EBI_SM_SIZE (0x10000000) // NANDFLASH on EBI Chip Select 3 size in byte (262144 Kbytes) // EBI_CS4 #define AT91C_EBI_CS4 (0x50000000) // EBI Chip Select 4 base address #define AT91C_EBI_CS4_SIZE (0x10000000) // EBI Chip Select 4 size in byte (262144 Kbytes) // EBI_CF0 #define AT91C_EBI_CF0 (0x50000000) // CompactFlash 0 on EBI Chip Select 4 base address #define AT91C_EBI_CF0_SIZE (0x10000000) // CompactFlash 0 on EBI Chip Select 4 size in byte (262144 Kbytes) // EBI_CS5 #define AT91C_EBI_CS5 (0x60000000) // EBI Chip Select 5 base address #define AT91C_EBI_CS5_SIZE (0x10000000) // EBI Chip Select 5 size in byte (262144 Kbytes) // EBI_CF1 #define AT91C_EBI_CF1 (0x60000000) // CompactFlash 1 on EBIChip Select 5 base address #define AT91C_EBI_CF1_SIZE (0x10000000) // CompactFlash 1 on EBIChip Select 5 size in byte (262144 Kbytes) #endif tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/McuSleepC.nc000066400000000000000000000271301207233610700227730ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Wanja Hofer * @author Kevin Klues * @author JeongGil Ko */ #include "AT91SAM3U4.h" #include "hardware.h" #include "sam3upmchardware.h" #include "sam3usupchardware.h" #include "sam3unvichardware.h" #include "sam3rtthardware.h" #include "sam3tchardware.h" #include "sam3uadc12bhardware.h" module McuSleepC { provides{ interface McuSleep; interface McuPowerState; interface Sam3LowPower; interface FunctionWrapper as InterruptWrapper; } uses { interface HplSam3Clock; } } implementation{ #define PMC_PIO_CLOCK_MASK 0x3FFFFFFC enum { S_AWAKE, S_SLEEP, S_WAIT, S_BACKUP, }; norace uint32_t ps; norace struct { uint32_t mck; adc12b_emr_t adc_emr; pmc_pcsr_t pmc_pcsr; pmc_uckr_t pmc_uckr; supc_mr_t supc_mr; uint32_t pioa_psr; uint32_t piob_psr; uint32_t pioc_psr; uint32_t pioa_osr; uint32_t piob_osr; uint32_t pioc_osr; uint32_t pioa_pusr; uint32_t piob_pusr; uint32_t pioc_pusr; } wait_restore; // This C function is defined so that we can call it // from platform_bootstrap(), as defined in platform.h void sam3uLowPowerConfigure() @C() @spontaneous() { // Only do this at startup // Configure all PIO as input AT91C_BASE_PIOA->PIO_ODR = 0xFFFFFFFF; AT91C_BASE_PIOB->PIO_ODR = 0xFFFFFFFF; AT91C_BASE_PIOC->PIO_ODR = 0xFFFFFFFF; // Force all peripherals to enable PIO AT91C_BASE_PIOA->PIO_PER = 0xFFFFFFFF; AT91C_BASE_PIOB->PIO_PER = 0xFFFFFFFF; AT91C_BASE_PIOC->PIO_PER = 0xFFFFFFFF; call Sam3LowPower.configure(); } async command void Sam3LowPower.configure() { // Put the ADC into off mode ADC12B->emr.bits.offmodes = 1; // Disable all Peripheral Clocks PMC->pc.pcdr.flat = PMC_PIO_CLOCK_MASK; // Stop UTMI PMC->uckr.bits.upllen = 0; // Disable brownout detector { supc_mr_t mr = SUPC->mr; mr.bits.key = 0xA5; mr.bits.boddis = 1; mr.bits.bodrsten = 0; SUPC->mr = mr; } // Customize pio settings as appropriate for the platform signal Sam3LowPower.customizePio(); } uint32_t getPowerState() { //if (PMC->pc.pcsr.flat & PMC_PIO_CLOCK_MASK) if ( PMC->pc.pcsr.bits.rtc || PMC->pc.pcsr.bits.rtt || PMC->pc.pcsr.bits.wdg || PMC->pc.pcsr.bits.pmc || PMC->pc.pcsr.bits.efc0 || PMC->pc.pcsr.bits.efc1 || PMC->pc.pcsr.bits.dbgu || PMC->pc.pcsr.bits.hsmc4 || PMC->pc.pcsr.bits.pioa || PMC->pc.pcsr.bits.piob || PMC->pc.pcsr.bits.pioc || PMC->pc.pcsr.bits.us0 || PMC->pc.pcsr.bits.us1 || PMC->pc.pcsr.bits.us2 || PMC->pc.pcsr.bits.us3 || PMC->pc.pcsr.bits.mci0 || PMC->pc.pcsr.bits.twi0 || PMC->pc.pcsr.bits.twi1 || PMC->pc.pcsr.bits.spi0 || PMC->pc.pcsr.bits.ssc0 || PMC->pc.pcsr.bits.tc0 || PMC->pc.pcsr.bits.tc1 || PMC->pc.pcsr.bits.tc2 || PMC->pc.pcsr.bits.pwmc || PMC->pc.pcsr.bits.adc12b || PMC->pc.pcsr.bits.adc || PMC->pc.pcsr.bits.hdma || PMC->pc.pcsr.bits.udphs || 0 ) return S_SLEEP; else return S_WAIT; } void commonSleep() { // Check if any alarms are set for the tc2 alarm hardware. // If not, turn off its peripheral clock // This is necessary because the TMicro alarm is linked to tc2. // More logic will need to be added here later, as more alarms are set up // for use. if(!(TC->ch2.imr.bits.cpcs & 0x01)) PMC->pc.pcdr.bits.tc2 = 1; } void commonResume() { // Turn the periperhal clock for tc2 back on so that its alarm can be // set and times can be read from it PMC->pc.pcer.bits.tc2 = 1; } void setupSleepMode() { // Nothing special to do here yet } void resumeFromSleepMode() { // Nothing special to do here yet } void setupWaitMode() { // Save the state of the cpu we are about to change wait_restore.mck = call HplSam3Clock.getMainClockSpeed(); wait_restore.adc_emr = ADC12B->emr; wait_restore.pmc_pcsr = PMC->pc.pcsr; wait_restore.pmc_uckr = PMC->uckr; wait_restore.supc_mr = SUPC->mr; wait_restore.pioa_psr = AT91C_BASE_PIOA->PIO_PSR; wait_restore.piob_psr = AT91C_BASE_PIOB->PIO_PSR; wait_restore.pioc_psr = AT91C_BASE_PIOC->PIO_PSR; wait_restore.pioa_osr = AT91C_BASE_PIOA->PIO_OSR; wait_restore.piob_osr = AT91C_BASE_PIOB->PIO_OSR; wait_restore.pioc_osr = AT91C_BASE_PIOC->PIO_OSR; wait_restore.pioa_pusr = AT91C_BASE_PIOA->PIO_PPUSR; wait_restore.piob_pusr = AT91C_BASE_PIOB->PIO_PPUSR; wait_restore.pioc_pusr = AT91C_BASE_PIOC->PIO_PPUSR; // Turn off all clocks to peripheral IO and configure pins // appropriately, so that when we go to sleep we are // drawing the least amount of current possible call Sam3LowPower.configure(); // Force us into 4 MHz with the RC Oscillator call HplSam3Clock.mckInit4RC(); // Setup for wait mode PMC->fsmr.bits.lpm = 1; // Only resume from wait mode with an input from the RTT PMC->fsmr.bits.rttal = 1; // Make sure we DON'T go into deep sleep (i.e. backup mode) SCB->scr.bits.sleepdeep = 0; } void resumeFromWaitMode() { // Restore the old clock settings uint32_t oldMck = wait_restore.mck; if(oldMck > 13000 && oldMck < 49000){ call HplSam3Clock.mckInit48(); }else if(oldMck > 49000 && oldMck < 90000){ call HplSam3Clock.mckInit84(); }else if(oldMck > 90000){ call HplSam3Clock.mckInit96(); } // Restore the ADC to its previous mode ADC12B->emr = wait_restore.adc_emr; // Reenable peripheral clocks, as appropriate PMC->pc.pcer.flat = wait_restore.pmc_pcsr.flat; PMC->pc.pcdr.flat = ~wait_restore.pmc_pcsr.flat; // Reenable the UTMI clock, as appropriate PMC->uckr = wait_restore.pmc_uckr; // Reenable brownout detector, as appropriate { supc_mr_t mr; mr = wait_restore.supc_mr; mr.bits.key = 0xA5; SUPC->mr = mr; } // Restore the PIO output/input pin and pullup resistor // settings to the values they had before entering wait mode AT91C_BASE_PIOA->PIO_PER = wait_restore.pioa_psr; AT91C_BASE_PIOB->PIO_PER = wait_restore.piob_psr; AT91C_BASE_PIOC->PIO_PER = wait_restore.pioc_psr; AT91C_BASE_PIOA->PIO_PDR = ~wait_restore.pioa_psr; AT91C_BASE_PIOB->PIO_PDR = ~wait_restore.piob_psr; AT91C_BASE_PIOC->PIO_PDR = ~wait_restore.pioc_psr; AT91C_BASE_PIOA->PIO_OER = wait_restore.pioa_osr; AT91C_BASE_PIOB->PIO_OER = wait_restore.piob_osr; AT91C_BASE_PIOC->PIO_OER = wait_restore.pioc_osr; AT91C_BASE_PIOA->PIO_ODR = ~wait_restore.pioa_osr; AT91C_BASE_PIOB->PIO_ODR = ~wait_restore.piob_osr; AT91C_BASE_PIOC->PIO_ODR = ~wait_restore.pioc_osr; // Notice the reverse logic below - its on purpose, check the data sheet // 0 means active, 1 means inactive AT91C_BASE_PIOA->PIO_PPUER = ~wait_restore.pioa_pusr; AT91C_BASE_PIOB->PIO_PPUER = ~wait_restore.piob_pusr; AT91C_BASE_PIOC->PIO_PPUER = ~wait_restore.pioc_pusr; AT91C_BASE_PIOA->PIO_PPUDR = wait_restore.pioa_pusr; AT91C_BASE_PIOB->PIO_PPUDR = wait_restore.piob_pusr; AT91C_BASE_PIOC->PIO_PPUDR = wait_restore.pioc_pusr; } void setupBackupMode() { // Not yet supported.... // Need to think more about how to do this since it is essentially a "hibernate" // mode, meaning we will have to save all register and memory state into // non-volatile memory. Possibly more state will need to be saved as well. } void resumeFromBackupMode() { // Not yet supported.... // Need to think more about how to do this since it is essentially a "hibernate" // mode and resuming will be from a reboot, not a simple interrupt service routine // Consider changing vectors.c to call out to this after checking some state variable // stored in the internal EEFC. } async command void McuSleep.sleep() { commonSleep(); switch(ps = getPowerState()) { case S_AWAKE: //Just stay awake... break; case S_SLEEP: // Setup for sleep mode setupSleepMode(); break; case S_WAIT: // Setup for wait mode setupWaitMode(); break; case S_BACKUP: // Setup for backup mode setupBackupMode(); break; default: // Default setup setupSleepMode(); } __nesc_enable_interrupt(); // Enter appropriate idle mode if(ps != S_AWAKE) __asm volatile ("wfe"); // Normally, at this point we can only be woken up by an interrupt, so execution continues // in the body of the InterruptWrapper.preamble() command before returning to here // However, if we never actually went to sleep, we need to force this command to run. if(ps == S_AWAKE) call InterruptWrapper.preamble(); // all of memory may change at this point, because an IRQ handler // may have posted a task! asm volatile("" : : : "memory"); __nesc_disable_interrupt(); } async command void InterruptWrapper.preamble() { atomic { switch(ps) { case S_AWAKE: // Stayed awake the whole time, so do nothing break; case S_SLEEP: // Resume from sleep mode resumeFromSleepMode(); break; case S_WAIT: // Resume from wait mode resumeFromWaitMode(); break; case S_BACKUP: // Resume from backup mode resumeFromBackupMode(); break; default: // Default resume resumeFromSleepMode(); } if(ps != S_AWAKE) commonResume(); ps = S_AWAKE; } } async command void InterruptWrapper.postamble() { /* Do nothing */ } async command void McuPowerState.update(){} async event void HplSam3Clock.mainClockChanged(){} default async event void Sam3LowPower.customizePio() {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/000077500000000000000000000000001207233610700216625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/AdcP.nc000066400000000000000000000156561207233610700230300ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" module AdcP { provides { interface Read as Read[uint8_t client]; interface ReadNow as ReadNow[uint8_t client]; interface Resource as ResourceReadNow[uint8_t client]; } uses { // for Read only: interface Resource as ResourceRead[uint8_t client]; // for ReadNow only: interface Resource as SubResourceReadNow[uint8_t client]; // for Read and ReadNow: interface Sam3uGetAdc12b as GetAdc[uint8_t client]; interface AdcConfigure as Config[uint8_t client]; } } implementation { norace uint8_t state; norace uint8_t readNowClient; norace uint8_t setClient; norace uint16_t adcResult; enum { S_READ, S_READNOW, }; error_t configureAdcRegisters(uint8_t client) { const sam3u_adc12_channel_config_t * ONE config; config = call Config.getConfiguration[client](); return call GetAdc.configureAdc[client](config); } /** Read.read - TEP 114 **/ command error_t Read.read[uint8_t client]() { state = S_READ; return call ResourceRead.request[client](); } event void ResourceRead.granted[uint8_t client]() { error_t result = configureAdcRegisters(client); if(result == SUCCESS){ //call actual read! call GetAdc.getData[client](); }else{ //configure failed! call ResourceRead.release[client](); signal Read.readDone[client](result, 0); } } /************************************************/ /** ReadNow.read **/ async command error_t ReadNow.read[uint8_t nowClient]() { if(call SubResourceReadNow.isOwner[nowClient]()){ return call GetAdc.getData[nowClient](); }else{ return FAIL; } } task void signalGranted(){ error_t error = configureAdcRegisters(readNowClient); if(error == SUCCESS){ state = S_READNOW; }else{ // config error } signal ResourceReadNow.granted[readNowClient](); } async command error_t ResourceReadNow.request[uint8_t nowClient]() { if(!call SubResourceReadNow.isOwner[nowClient]()) return call SubResourceReadNow.request[nowClient](); else{ atomic readNowClient = nowClient; post signalGranted(); return SUCCESS; } } event void SubResourceReadNow.granted[uint8_t nowClient]() { error_t error = configureAdcRegisters(nowClient); if(error == SUCCESS){ state = S_READNOW; }else{ // config error } signal ResourceReadNow.granted[nowClient](); } async command error_t ResourceReadNow.immediateRequest[uint8_t nowClient]() { error_t result = call SubResourceReadNow.immediateRequest[nowClient](); if (result == SUCCESS){ result = configureAdcRegisters(nowClient); if (result == SUCCESS) state = S_READNOW; } return result; } async command error_t ResourceReadNow.release[uint8_t nowClient]() { return call SubResourceReadNow.release[nowClient](); } async command bool ResourceReadNow.isOwner[uint8_t nowClient]() { return call SubResourceReadNow.isOwner[nowClient](); } /** Read Done **/ void task readDone() { call ResourceRead.release[setClient](); signal Read.readDone[setClient](SUCCESS, adcResult); } void task readDoneNow() { signal ReadNow.readDone[setClient](SUCCESS, adcResult); } /************************************************/ /** Data is ready! **/ async event error_t GetAdc.dataReady[uint8_t client](uint16_t data) { atomic setClient = client; atomic adcResult = data; switch (state) { case S_READ: call ResourceRead.release[client](); post readDone(); break; case S_READNOW: post readDoneNow(); break; default: break; } return SUCCESS; } /************************************************/ const sam3u_adc12_channel_config_t defaultConfig = { channel: 0, diff: 0, prescal: 2, lowres: 0, shtim: 15, ibctl: 1, sleep: 0, startup: 104, trgen: 0, trgsel: 0 }; default async command error_t ResourceRead.request[uint8_t client]() { return FAIL; } default async command error_t ResourceRead.immediateRequest[uint8_t client]() { return FAIL; } default async command error_t ResourceRead.release[uint8_t client]() { return FAIL; } default async command bool ResourceRead.isOwner[uint8_t client]() { return FALSE; } default event void Read.readDone[uint8_t client]( error_t result, uint16_t val ){} default async command error_t SubResourceReadNow.release[uint8_t nowClient](){ return FAIL;} default async command error_t SubResourceReadNow.request[uint8_t nowClient](){ return FAIL; } default async command bool SubResourceReadNow.isOwner[uint8_t client]() { return FALSE; } default event void ResourceReadNow.granted[uint8_t nowClient](){} default async event void ReadNow.readDone[uint8_t client]( error_t result, uint16_t val ){} default async command error_t SubResourceReadNow.immediateRequest[uint8_t nowClient]() { return FAIL; } default async command error_t GetAdc.getData[uint8_t client](){ return EINVAL; } default async command const sam3u_adc12_channel_config_t* Config.getConfiguration[uint8_t client]() { return &defaultConfig; } default async command error_t GetAdc.configureAdc[uint8_t client](const sam3u_adc12_channel_config_t *config){ return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadClientC.nc000066400000000000000000000041351207233610700247340ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" generic configuration AdcReadClientC() { provides { interface Read; } uses interface AdcConfigure; } implementation { components AdcP; components new Sam3uAdc12bClientC(); enum { CLIENT = unique(ADCC_SERVICE), }; Read = AdcP.Read[CLIENT]; AdcConfigure = AdcP.Config[CLIENT]; AdcP.GetAdc[CLIENT] -> Sam3uAdc12bClientC.Sam3uGetAdc12b; AdcP.ResourceRead[CLIENT] -> Sam3uAdc12bClientC.Resource; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadNowClientC.nc000066400000000000000000000042621207233610700254210ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" generic configuration AdcReadNowClientC() { provides { interface ReadNow; interface Resource; } uses interface AdcConfigure; } implementation { components AdcP; components new Sam3uAdc12bClientC(); enum { CLIENT = unique(ADCC_SERVICE), }; ReadNow = AdcP.ReadNow[CLIENT]; AdcConfigure = AdcP.Config[CLIENT]; Resource = AdcP.ResourceReadNow[CLIENT]; AdcP.GetAdc[CLIENT] -> Sam3uAdc12bClientC.Sam3uGetAdc12b; AdcP.SubResourceReadNow[CLIENT] -> Sam3uAdc12bClientC.Resource; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadStreamClientC.nc000066400000000000000000000044461207233610700261150ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" generic configuration AdcReadStreamClientC() { provides { interface ReadStream; } uses interface AdcConfigure; } implementation { #ifndef SAM3U_ADC12B_PDC components AdcStreamP; #else components AdcStreamPDCP as AdcStreamP; #endif components new Sam3uAdc12bClientC(); components WireAdcStreamP; enum { CLIENT = unique(ADCC_READ_STREAM_SERVICE), }; ReadStream = WireAdcStreamP.ReadStream[CLIENT]; AdcConfigure = WireAdcStreamP.AdcConfigure[CLIENT]; WireAdcStreamP.Resource[CLIENT] -> Sam3uAdc12bClientC.Resource; WireAdcStreamP.Sam3uGetAdc12b[CLIENT] -> Sam3uAdc12bClientC.Sam3uGetAdc12b; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/AdcStreamP.nc000066400000000000000000000152711207233610700241750ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation for ReadStream interface in Sam3u * (Coverted msp430 and atm128 code) * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" module AdcStreamP { provides { interface Init @atleastonce(); interface ReadStream[uint8_t client]; } uses { interface Sam3uGetAdc12b as GetAdc[uint8_t client]; interface AdcConfigure as Config[uint8_t client]; interface Alarm; interface Leds; } } implementation { enum { NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE) }; norace uint8_t client = NSTREAM; struct list_entry_t { uint16_t count; struct list_entry_t * ONE_NOK next; }; struct list_entry_t *bufferQueue[NSTREAM]; struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM]; uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount; norace uint16_t count; norace uint16_t * COUNT_NOK(count) buffer; norace uint16_t * BND_NOK(buffer, buffer+count) pos; norace uint32_t now, period; command error_t Init.init() { uint8_t i; for (i = 0; i != NSTREAM; i++) bufferQueueEnd[i] = &bufferQueue[i]; return SUCCESS; } void sampleSingle() { call GetAdc.getData[client](); } error_t postBuffer(uint8_t c, uint16_t *buf, uint16_t n) { if (n < sizeof(struct list_entry_t)) return ESIZE; atomic { struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf); if (!bufferQueueEnd[c]) return FAIL; newEntry->count = n; newEntry->next = NULL; *bufferQueueEnd[c] = newEntry; bufferQueueEnd[c] = &newEntry->next; } return SUCCESS; } command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) { return postBuffer(c, buf, n); } task void readStreamDone() { uint8_t c = client; uint32_t actualPeriod = period; atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](SUCCESS, actualPeriod); } task void readStreamFail() { struct list_entry_t *entry; uint8_t c = client; atomic entry = bufferQueue[c]; for (; entry; entry = entry->next) { uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count; signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count); } atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](FAIL, 0); } task void bufferDone() { uint16_t *b, c; atomic { b = lastBuffer; c = lastCount; lastBuffer = NULL; } signal ReadStream.bufferDone[client](SUCCESS, b, c); } void nextAlarm() { call Alarm.startAt(now, period); now += period; } async event void Alarm.fired() { sampleSingle(); } error_t nextBuffer(bool startNextAlarm) { atomic { struct list_entry_t *entry = bufferQueue[client]; if (!entry) { // all done bufferQueueEnd[client] = NULL; // prevent post post readStreamDone(); return FAIL; } else { uint16_t tmp_count; bufferQueue[client] = entry->next; if (!bufferQueue[client]) bufferQueueEnd[client] = &bufferQueue[client]; pos = buffer = NULL; count = entry->count; tmp_count = count; pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry); if (startNextAlarm) nextAlarm(); return SUCCESS; } } } command error_t ReadStream.read[uint8_t c](uint32_t usPeriod) { /* not exactly microseconds */ /* ADC is currently based on a 1.5MHz clock */ period = usPeriod; client = c; now = call Alarm.getNow(); call GetAdc.configureAdc[c](call Config.getConfiguration[c]()); if (nextBuffer(FALSE) == SUCCESS){ sampleSingle(); } return SUCCESS; } async event error_t GetAdc.dataReady[uint8_t streamClient](uint16_t data) { call Leds.led0Toggle(); if (client == NSTREAM) return FAIL; if (count == 0) { now = call Alarm.getNow(); nextBuffer(TRUE); } else { *pos++ = data; if (pos == buffer + count) { atomic { if (lastBuffer) { /* We failed to signal bufferDone in time. Fail. */ bufferQueueEnd[client] = NULL; // prevent post post readStreamFail(); return FAIL; } else { lastCount = count; lastBuffer = buffer; } } post bufferDone(); nextBuffer(TRUE); } else nextAlarm(); } return FAIL; } const sam3u_adc12_channel_config_t defaultConfig = { }; default async command const sam3u_adc12_channel_config_t* Config.getConfiguration[uint8_t c]() { return &defaultConfig; } default async command error_t GetAdc.getData[uint8_t c]() { return FAIL; } default async command error_t GetAdc.configureAdc[uint8_t c]( const sam3u_adc12_channel_config_t *config){ return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/AdcStreamPDCP.nc000066400000000000000000000110341207233610700245150ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation for ReadStream interface with PDC in Sam3u * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" module AdcStreamPDCP { provides { interface Init @atleastonce(); interface ReadStream[uint8_t client]; } uses { interface Sam3uGetAdc12b as GetAdc[uint8_t client]; interface AdcConfigure as Config[uint8_t client]; //interface Alarm; interface HplSam3Pdc as HplPdc; interface Leds; } } implementation { enum { NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE) }; norace uint8_t client = NSTREAM; volatile adc12b_cr_t *CR = (volatile adc12b_cr_t *) 0x400A8000; adc12b_cr_t cr; struct list_entry_t { uint16_t count; struct list_entry_t * ONE_NOK next; }; struct list_entry_t *bufferQueue[NSTREAM]; struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM]; uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount; norace uint16_t count; norace uint16_t * COUNT_NOK(count) buffer; norace uint16_t * BND_NOK(buffer, buffer+count) pos; norace uint32_t now, period; norace uint16_t originalLength; norace uint16_t *originalPointer; norace uint8_t state; enum{ S_READ, S_IDLE, }; command error_t Init.init() { uint8_t i; state = S_IDLE; for (i = 0; i != NSTREAM; i++) bufferQueueEnd[i] = &bufferQueue[i]; return SUCCESS; } void samplePdc() { // switch this to pdc enable call HplPdc.enablePdcRx(); atomic cr.bits.start = 1; // enable software trigger atomic *CR = cr; } command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) { // set parameters here!!!! // set pdc buffers and set the length as a global parameter originalLength = n; originalPointer = buf; call HplPdc.setRxPtr(buf); call HplPdc.setRxCounter(n); return SUCCESS; } command error_t ReadStream.read[uint8_t c](uint32_t usPeriod) { period = usPeriod; client = c; call GetAdc.configureAdc[c](call Config.getConfiguration[c]()); state = S_READ; samplePdc(); return SUCCESS; } task void signalReadDone(){ signal ReadStream.readDone[client](SUCCESS, period); } task void signalBufferDone(){ signal ReadStream.bufferDone[client](SUCCESS, originalPointer, originalLength); } async event error_t GetAdc.dataReady[uint8_t streamClient](uint16_t data) { if(state == S_READ){ atomic state = S_IDLE; call HplPdc.disablePdcRx(); post signalReadDone(); post signalBufferDone(); } return SUCCESS; } const sam3u_adc12_channel_config_t defaultConfig = { }; default async command const sam3u_adc12_channel_config_t* Config.getConfiguration[uint8_t c]() { return &defaultConfig; } default async command error_t GetAdc.getData[uint8_t c]() { return FAIL; } default async command error_t GetAdc.configureAdc[uint8_t c]( const sam3u_adc12_channel_config_t *config){ return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12b.nc000066400000000000000000000034221207233610700236450ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ // introduce interfaces for Hpl #include "sam3uadc12bhardware.h" interface HplAdc12b{ async command void startConversion(); async command void stopConversion(); async command void enableConversion(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12bC.nc000066400000000000000000000032571207233610700237560ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ configuration HplAdc12bC{ provides{ interface HplAdc12b; } } implementation{ components HplAdc12P; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12bP.nc000066400000000000000000000032511207233610700237650ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ // Implement lowest layer - Hpl module HplAdc12P { provides interface HplAdc12; } implementation { } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/README000066400000000000000000000004051207233610700225410ustar00rootroot0000000000000012 bit ADC implementation for SAM3U @author JeongGil Ko The implementation is based on the preliminary specifications and the MSP430 implementations. - Supported Interfaces --- Read Interface --- ReadNow Interface --- ReadStream Interface tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bClientC.nc000066400000000000000000000036731207233610700253640ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" generic configuration Sam3uAdc12bClientC() { provides { interface Resource; interface Sam3uGetAdc12b; } } implementation { components Sam3uAdc12bP; enum { ID = unique(SAM3UADC12_RESOURCE), }; Resource = Sam3uAdc12bP.Resource[ID]; Sam3uGetAdc12b = Sam3uAdc12bP.Sam3uGetAdc12b[ID]; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bImplP.nc000066400000000000000000000172011207233610700250540ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" module Sam3uAdc12bImplP { provides { interface Init; interface Sam3uGetAdc12b as Sam3uAdc12b[uint8_t id]; } uses { interface HplNVICInterruptCntl as ADC12BInterrupt; interface HplSam3GeneralIOPin as Adc12bPin; interface HplSam3PeripheralClockCntl as Adc12bClockControl; interface HplSam3Clock as ClockConfig; interface FunctionWrapper as Adc12bInterruptWrapper; #ifdef SAM3U_ADC12B_PDC interface HplSam3Pdc as HplPdc; #endif interface Leds; } } implementation { norace uint8_t clientID; norace uint8_t state; enum{ S_ADC, S_IDLE, }; command error_t Init.init(){ /* Enable interrupts */ call ADC12BInterrupt.configure(IRQ_PRIO_ADC12B); // Peripheral ID 26 for ADC12B call ADC12BInterrupt.enable(); /* Enable clock */ call Adc12bClockControl.enable(); /* Set IO line */ call Adc12bPin.disablePioControl(); // Disable whatever is set currently call Adc12bPin.selectPeripheralB(); // set to peripheral B state = S_IDLE; return SUCCESS; } async command error_t Sam3uAdc12b.configureAdc[uint8_t id](const sam3u_adc12_channel_config_t *config){ // Since CHER is write-only read the information in CHSR in CHER format //volatile adc12b_cher_t *CHSR = (volatile adc12b_cher_t *) 0x400A8018; volatile adc12b_cher_t *CHER = (volatile adc12b_cher_t *) 0x400A8010; adc12b_cher_t cher; volatile adc12b_chdr_t *CHDR = (volatile adc12b_chdr_t *) 0x400A8014; adc12b_chdr_t chdr; // Since IER is write-only read the information in IMR in IER format //volatile adc12b_ier_t *IMR = (volatile adc12b_ier_t *) 0x400A802C; volatile adc12b_ier_t *IER = (volatile adc12b_ier_t *) 0x400A8024; adc12b_ier_t ier; volatile adc12b_idr_t *IDR = (volatile adc12b_idr_t *) 0x400A8028; adc12b_idr_t idr; // CR is write-only; There is no need to read it for modification but just set the memory location volatile adc12b_cr_t *CR = (volatile adc12b_cr_t *) 0x400A8000; adc12b_cr_t cr; // MR is read-write volatile adc12b_mr_t *MR = (volatile adc12b_mr_t *) 0x400A8004; adc12b_mr_t mr = *MR; // ACR is read-write volatile adc12b_acr_t *ACR = (volatile adc12b_acr_t *) 0x400A8064; adc12b_acr_t acr = *ACR; // EMR is read-write volatile adc12b_emr_t *EMR = (volatile adc12b_emr_t *) 0x400A8068; adc12b_emr_t emr = *EMR; cher.flat = 0; chdr.flat = 0x000000FF; *CHDR = chdr; idr.flat = 0x000000FF; *IDR = idr; switch(config->channel) { case 0: cher.bits.ch0 = 1; ier.bits.eoc0 = 1; break; case 1: cher.bits.ch1 = 1; ier.bits.eoc1 = 1; break; case 2: cher.bits.ch2 = 1; ier.bits.eoc2 = 1; break; case 3: cher.bits.ch3 = 1; ier.bits.eoc3 = 1; break; case 4: cher.bits.ch4 = 1; ier.bits.eoc4 = 1; break; case 5: cher.bits.ch5 = 1; ier.bits.eoc5 = 1; break; case 6: cher.bits.ch6 = 1; ier.bits.eoc6 = 1; break; case 7: cher.bits.ch7 = 1; ier.bits.eoc7 = 1; break; default: // Just return FAIL? cher.bits.ch0 = 0; ier.bits.eoc0 = 0; break; } cr.bits.swrst = 0; cr.bits.start = 0; // disable start bit for the configuration stage mr.bits.prescal = config->prescal; mr.bits.shtim = config->shtim; mr.bits.lowres = config->lowres; mr.bits.trgen = config->trgen; mr.bits.trgsel = config->trgsel; mr.bits.sleep = config->sleep; mr.bits.startup = config->startup; acr.bits.ibctl = config->ibctl; acr.bits.gain = 0; acr.bits.diff = config->diff; acr.bits.offset = 0; emr.bits.offmodes = 0; emr.bits.off_mode_startup_time = config->startup; // We have now locally modified all the register values // Write the register back in its respective memory space *CHER = cher; *IER = ier; *CR = cr; *MR = mr; *ACR = acr; *EMR = emr; return SUCCESS; } async command error_t Sam3uAdc12b.getData[uint8_t id](){ // CR is write-only; There is no need to read it for modification but just set the memory location volatile adc12b_cr_t *CR = (volatile adc12b_cr_t *) 0x400A8000; adc12b_cr_t cr; call Adc12bClockControl.enable(); atomic clientID = id; if(state != S_IDLE){ return EBUSY; }else{ atomic { state = S_ADC; } cr.bits.start = 1; // enable software trigger *CR = cr; call ADC12BInterrupt.enable(); return SUCCESS; } } async event void ClockConfig.mainClockChanged(){} /* Get events (signals) from chips here! */ void handler() @spontaneous() { // CR is write-only; There is no need to read it for modification but just set the memory location volatile adc12b_cr_t *CR = (volatile adc12b_cr_t *) 0x400A8000; adc12b_cr_t cr; // Read SR volatile adc12b_sr_t *SR = (volatile adc12b_sr_t *) 0x400A801C; adc12b_sr_t sr = *SR; uint16_t data = 0; #ifndef SAM3U_ADC12B_PDC // Read LCDR volatile adc12b_lcdr_t *LCDR = (volatile adc12b_lcdr_t *) 0x400A8020; adc12b_lcdr_t lcdr = *LCDR; call Adc12bClockControl.disable(); if(sr.bits.drdy){ atomic { data = lcdr.bits.ldata; cr.bits.start = 0; // disable software trigger *CR = cr; //get data from register state = S_IDLE; } signal Sam3uAdc12b.dataReady[clientID](data); } #else if(sr.bits.endrx){ atomic state = S_IDLE; atomic cr.bits.start = 0; // enable software trigger atomic *CR = cr; signal Sam3uAdc12b.dataReady[clientID](data); }else{ call HplPdc.enablePdcRx(); atomic cr.bits.start = 1; // enable software trigger atomic *CR = cr; } #endif } void Adc12BIrqHandler() @C() @spontaneous() { call Adc12bInterruptWrapper.preamble(); call ADC12BInterrupt.disable(); handler(); call Adc12bInterruptWrapper.postamble(); } /* Default functions */ default async event error_t Sam3uAdc12b.dataReady[uint8_t id](uint16_t data){ return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bP.nc000066400000000000000000000050561207233610700242370ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" configuration Sam3uAdc12bP { provides { interface Resource[uint8_t id]; interface Sam3uGetAdc12b[uint8_t id]; } } implementation { components Sam3uAdc12bImplP as Adc12bImpl; components MainC; components HplNVICC, HplSam3uClockC, HplSam3uGeneralIOC; //components new Resource[uint8_t id]; components new SimpleRoundRobinArbiterC(SAM3UADC12_RESOURCE) as Arbiter; Adc12bImpl.ADC12BInterrupt -> HplNVICC.ADC12BInterrupt; Adc12bImpl.Adc12bPin -> HplSam3uGeneralIOC.HplPioA2; Adc12bImpl.Adc12bClockControl -> HplSam3uClockC.ADC12BPPCntl; Resource = Arbiter; // set this!?! Sam3uGetAdc12b = Adc12bImpl.Sam3uAdc12b; MainC.SoftwareInit -> Adc12bImpl.Init; components LedsC, NoLedsC; Adc12bImpl.Leds -> NoLedsC; components McuSleepC; Adc12bImpl.Adc12bInterruptWrapper -> McuSleepC; #ifdef SAM3U_ADC12B_PDC components HplSam3uPdcC; Adc12bImpl.HplPdc -> HplSam3uPdcC.Adc12bPdcControl; #endif } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uGetAdc12b.nc000066400000000000000000000035031207233610700245520ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" interface Sam3uGetAdc12b { async command error_t configureAdc(const sam3u_adc12_channel_config_t *config); async command error_t getData(); async event error_t dataReady(uint16_t data); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/WireAdcStreamP.nc000066400000000000000000000051121207233610700250150ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uadc12bhardware.h" configuration WireAdcStreamP { provides interface ReadStream[uint8_t client]; uses { interface AdcConfigure[uint8_t client]; interface Sam3uGetAdc12b[uint8_t client]; interface Resource[uint8_t client]; } } implementation { #ifndef SAM3U_ADC12B_PDC components AdcStreamP; #else components AdcStreamPDCP as AdcStreamP; #endif components MainC, new AlarmTMicro16C() as Alarm, new ArbitratedReadStreamC(uniqueCount(ADCC_READ_STREAM_SERVICE), uint16_t) as ArbitrateReadStream; ReadStream = ArbitrateReadStream; AdcConfigure = AdcStreamP; Resource = ArbitrateReadStream; ArbitrateReadStream.Service -> AdcStreamP; #ifdef SAM3U_ADC12B_PDC components HplSam3uPdcC; AdcStreamP.HplPdc -> HplSam3uPdcC.Adc12bPdcControl; #else AdcStreamP.Alarm -> Alarm; #endif AdcStreamP.Init <- MainC; Sam3uGetAdc12b = AdcStreamP.GetAdc; components LedsC, NoLedsC; AdcStreamP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/adc12b/sam3uadc12bhardware.h000066400000000000000000000374561207233610700255750ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * 12 bit ADC register definitions. * * @author JeongGil Ko */ #ifndef _SAM3UADC12BHARDWARE_H #define _SAM3UADC12BHARDWARE_H /** * ADC12B Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1105 */ typedef union { uint32_t flat; struct { uint8_t swrst : 1; // software reset uint8_t start : 1; // start conversion uint8_t reserved0 : 6; uint16_t reserved1 : 16; uint8_t reserved2 : 8; } __attribute__((__packed__)) bits; } adc12b_cr_t; /** * ADC12B Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1106 */ typedef union { uint32_t flat; struct { uint8_t trgen : 1; // trigger enable uint8_t trgsel : 3; // trigger selection uint8_t lowres : 1; // resolution uint8_t sleep : 1; // sleep mode uint8_t reserved0 : 2; uint8_t prescal : 8; // prescaler rate selection uint8_t startup : 8; // startup time uint8_t shtim : 4; // sample & hold time uint8_t reserved1 : 4; } __attribute__((__packed__)) bits; } adc12b_mr_t; /** * ADC12B Channel Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1108 */ typedef union { uint32_t flat; struct { uint8_t ch0 : 1; uint8_t ch1 : 1; uint8_t ch2 : 1; uint8_t ch3 : 1; uint8_t ch4 : 1; uint8_t ch5 : 1; uint8_t ch6 : 1; uint8_t ch7 : 1; uint16_t reserved0 : 16; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } adc12b_cher_t; /** * ADC12B Channel Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1109 */ typedef union { uint32_t flat; struct { uint8_t ch0 : 1; uint8_t ch1 : 1; uint8_t ch2 : 1; uint8_t ch3 : 1; uint8_t ch4 : 1; uint8_t ch5 : 1; uint8_t ch6 : 1; uint8_t ch7 : 1; uint16_t reserved0 : 16; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } adc12b_chdr_t; /** * ADC12B Channel Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1110 */ typedef union { uint32_t flat; struct { uint8_t ch0 : 1; uint8_t ch1 : 1; uint8_t ch2 : 1; uint8_t ch3 : 1; uint8_t ch4 : 1; uint8_t ch5 : 1; uint8_t ch6 : 1; uint8_t ch7 : 1; uint16_t reserved0 : 16; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } adc12b_chsr_t; /** * ADC12B Analog Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1111 */ typedef union { uint32_t flat; struct { uint8_t gain : 2; // input gain uint8_t reserved0 : 6; uint8_t ibctl : 2; // bias current control uint8_t reserved1 : 6; uint8_t diff : 1; // differential mode uint8_t offset : 1; // input offset uint8_t reserved2 : 6; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } adc12b_acr_t; /** * ADC12B Extended Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1112 */ typedef union { uint32_t flat; struct { uint8_t offmodes : 1; // input gain uint8_t reserved0 : 7; uint8_t reserved1 : 8; uint8_t off_mode_startup_time : 8; // startup time uint8_t reserved2 : 8; } __attribute__((__packed__)) bits; } adc12b_emr_t; /** * ADC12B Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1113 */ typedef union { uint32_t flat; struct { uint8_t eoc0 : 1; // end of conversion uint8_t eoc1 : 1; // end of conversion uint8_t eoc2 : 1; // end of conversion uint8_t eoc3 : 1; // end of conversion uint8_t eoc4 : 1; // end of conversion uint8_t eoc5 : 1; // end of conversion uint8_t eoc6 : 1; // end of conversion uint8_t eoc7 : 1; // end of conversion uint8_t ovre0 : 1; // overrun error uint8_t ovre1 : 1; // overrun error uint8_t ovre2 : 1; // overrun error uint8_t ovre3 : 1; // overrun error uint8_t ovre4 : 1; // overrun error uint8_t ovre5 : 1; // overrun error uint8_t ovre6 : 1; // overrun error uint8_t ovre7 : 1; // overrun error uint8_t drdy : 1; // data ready uint8_t govre : 1; // general overrun error uint8_t endrx : 1; // end of rx buffer uint8_t rxbuff : 1; // rx buffer full uint8_t reserved0 : 4; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } adc12b_sr_t; /** * ADC12B Last Converted Data Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1114 */ typedef union { uint32_t flat; struct { uint16_t ldata : 12; // last data converted uint16_t reserved0 : 4; uint16_t reserved1 : 16; } __attribute__((__packed__)) bits; } adc12b_lcdr_t; /** * ADC12B Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1115 */ typedef union { uint32_t flat; struct { uint8_t eoc0 : 1; // end of conversion interrupt enable uint8_t eoc1 : 1; // end of conversion interrupt enable uint8_t eoc2 : 1; // end of conversion interrupt enable uint8_t eoc3 : 1; // end of conversion interrupt enable uint8_t eoc4 : 1; // end of conversion interrupt enable uint8_t eoc5 : 1; // end of conversion interrupt enable uint8_t eoc6 : 1; // end of conversion interrupt enable uint8_t eoc7 : 1; // end of conversion interrupt enable uint8_t ovre0 : 1; // overrun error interrupt enable uint8_t ovre1 : 1; // overrun error interrupt enable uint8_t ovre2 : 1; // overrun error interrupt enable uint8_t ovre3 : 1; // overrun error interrupt enable uint8_t ovre4 : 1; // overrun error interrupt enable uint8_t ovre5 : 1; // overrun error interrupt enable uint8_t ovre6 : 1; // overrun error interrupt enable uint8_t ovre7 : 1; // overrun error interrupt enable uint8_t drdy : 1; // data ready interrupt enable uint8_t govre : 1; // general overrun error interrupt enable uint8_t endrx : 1; // end of rx buffer interrupt enable uint8_t rxbuff : 1; // rx buffer full interrupt enable uint8_t reserved0 : 4; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } adc12b_ier_t; /** * ADC12B Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1116 */ typedef union { uint32_t flat; struct { uint8_t eoc0 : 1; // end of conversion interrupt disable uint8_t eoc1 : 1; // end of conversion interrupt disable uint8_t eoc2 : 1; // end of conversion interrupt disable uint8_t eoc3 : 1; // end of conversion interrupt disable uint8_t eoc4 : 1; // end of conversion interrupt disable uint8_t eoc5 : 1; // end of conversion interrupt disable uint8_t eoc6 : 1; // end of conversion interrupt disable uint8_t eoc7 : 1; // end of conversion interrupt disable uint8_t ovre0 : 1; // overrun error interrupt disable uint8_t ovre1 : 1; // overrun error interrupt disable uint8_t ovre2 : 1; // overrun error interrupt disable uint8_t ovre3 : 1; // overrun error interrupt disable uint8_t ovre4 : 1; // overrun error interrupt disable uint8_t ovre5 : 1; // overrun error interrupt disable uint8_t ovre6 : 1; // overrun error interrupt disable uint8_t ovre7 : 1; // overrun error interrupt disable uint8_t drdy : 1; // data ready interrupt disable uint8_t govre : 1; // general overrun error interrupt disable uint8_t endrx : 1; // end of rx buffer interrupt disable uint8_t rxbuff : 1; // rx buffer full interrupt disable uint8_t reserved0 : 4; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } adc12b_idr_t; /** * ADC12B Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1113 */ typedef union { uint32_t flat; struct { uint8_t eoc0 : 1; // end of conversion interrupt mask uint8_t eoc1 : 1; // end of conversion interrupt mask uint8_t eoc2 : 1; // end of conversion interrupt mask uint8_t eoc3 : 1; // end of conversion interrupt mask uint8_t eoc4 : 1; // end of conversion interrupt mask uint8_t eoc5 : 1; // end of conversion interrupt mask uint8_t eoc6 : 1; // end of conversion interrupt mask uint8_t eoc7 : 1; // end of conversion interrupt mask uint8_t ovre0 : 1; // overrun error interrupt mask uint8_t ovre1 : 1; // overrun error interrupt mask uint8_t ovre2 : 1; // overrun error interrupt mask uint8_t ovre3 : 1; // overrun error interrupt mask uint8_t ovre4 : 1; // overrun error interrupt mask uint8_t ovre5 : 1; // overrun error interrupt mask uint8_t ovre6 : 1; // overrun error interrupt mask uint8_t ovre7 : 1; // overrun error interrupt mask uint8_t drdy : 1; // data ready interrupt mask uint8_t govre : 1; // general overrun error interrupt mask uint8_t endrx : 1; // end of rx buffer interrupt mask uint8_t rxbuff : 1; // rx buffer full interrupt mask uint8_t reserved0 : 4; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } adc12b_imr_t; /** * ADC12B Channel Data Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1114 */ typedef union { uint32_t flat; struct { uint16_t data : 12; // converted data uint16_t reserved0 : 4; uint16_t reserved1 : 16; } __attribute__((__packed__)) bits; } adc12b_cdr_t; /** * ADC12B Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 1104 */ typedef struct adc12b { volatile adc12b_cr_t cr; // Control Register volatile adc12b_mr_t mr; // Mode Register uint32_t reserved0[2]; volatile adc12b_cher_t cher; // Channel Enable Register volatile adc12b_chdr_t chdr; // Channel Disable Register volatile adc12b_chsr_t chsr; // Channel Status Register volatile adc12b_sr_t sr; // Status Register volatile adc12b_lcdr_t lcdr; // Last Converted Data Register volatile adc12b_ier_t ier; // Interrupt Enable Register volatile adc12b_idr_t idr; // Interrupt Disable Register volatile adc12b_imr_t imr; // Interrupt Mask Register volatile adc12b_cdr_t cdr0; // Channal Data Register volatile adc12b_cdr_t cdr1; // Channal Data Register volatile adc12b_cdr_t cdr2; // Channal Data Register volatile adc12b_cdr_t cdr3; // Channal Data Register volatile adc12b_cdr_t cdr4; // Channal Data Register volatile adc12b_cdr_t cdr5; // Channal Data Register volatile adc12b_cdr_t cdr6; // Channal Data Register volatile adc12b_cdr_t cdr7; // Channal Data Register uint32_t reserved1[5]; volatile adc12b_acr_t acr; // Analog Control Register volatile adc12b_emr_t emr; // Extended Mode Register } adc12b_t; /** * Memory mapping for the ADC12B */ volatile adc12b_t* ADC12B = (volatile adc12b_t *) 0x400A8000; // ADC12B Base Address #define SAM3UADC12_RESOURCE "Sam3uAdc12bC.Resource" #define ADCC_SERVICE "AdcC.Service" #define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client" typedef struct { unsigned int channel: 3; unsigned int diff: 1; unsigned int prescal: 8; unsigned int lowres: 1; unsigned int shtim: 4; unsigned int ibctl: 2; unsigned int sleep: 1; unsigned int startup: 8; unsigned int trgen: 1; unsigned int trgsel: 1; unsigned int : 0; } sam3u_adc12_channel_config_t; #endif // _SAM3UADC12BHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/000077500000000000000000000000001207233610700213675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaC.nc000066400000000000000000000054471207233610700241040ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ configuration HplSam3uDmaC { provides interface HplSam3uDmaControl as Control; provides interface HplSam3uDmaChannel as Channel0; provides interface HplSam3uDmaChannel as Channel1; provides interface HplSam3uDmaChannel as Channel2; provides interface HplSam3uDmaChannel as Channel3; provides interface HplSam3uDmaInterrupt as Interrupt; } implementation { components HplSam3uDmaP; components new HplSam3uDmaXP(0) as Dma0; components new HplSam3uDmaXP(1) as Dma1; components new HplSam3uDmaXP(2) as Dma2; components new HplSam3uDmaXP(3) as Dma3; components HplNVICC; components HplSam3uClockC; components LedsC; Control = HplSam3uDmaP; Channel0 = Dma0; Channel1 = Dma1; Channel2 = Dma2; Channel3 = Dma3; Interrupt = HplSam3uDmaP; Dma0.Interrupt -> HplSam3uDmaP; Dma1.Interrupt -> HplSam3uDmaP; Dma2.Interrupt -> HplSam3uDmaP; Dma3.Interrupt -> HplSam3uDmaP; Dma0.Leds -> LedsC; Dma1.Leds -> LedsC; Dma2.Leds -> LedsC; Dma3.Leds -> LedsC; HplSam3uDmaP.HDMAInterrupt -> HplNVICC.HDMAInterrupt; HplSam3uDmaP.HDMAClockControl -> HplSam3uClockC.HDMAPPCntl; HplSam3uDmaP.Leds -> LedsC; components McuSleepC; HplSam3uDmaP.DmacInterruptWrapper -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaChannel.nc000066400000000000000000000055071207233610700252670ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uDmahardware.h" interface HplSam3uDmaChannel { async command error_t setSrcAddr(void* src_addr); async command error_t setDstAddr(void* dst_addr); async command error_t setCtrlA(uint16_t btsize, dmac_chunk_t scsize, dmac_chunk_t dcsize, dmac_width_t src_width, dmac_width_t dst_width); async command uint32_t setBtsize(uint16_t btsize); async command error_t setCtrlB(dmac_dscr_t src_dscr, dmac_dscr_t dst_dscr, dmac_fc_t fc, dmac_inc_t src_inc, dmac_inc_t dst_inc); async command error_t setCfg(uint8_t src_per, uint8_t dst_per, bool srcSwHandshake, bool dstSwHandshake, bool stopOnDone, bool lockIF, bool lockB, dmac_IFL_t lockIFL, dmac_ahbprot_t ahbprot, dmac_fifocfg_t fifocfg); async command void enable(); async command void disable(); async command void enableChannel(uint8_t channel); async command void disableChannel(uint8_t channel); async command void enableChannelInterrupt(uint8_t channel); async command void disableChannelInterrupt(uint8_t channel); async command void enableTransferRequest(uint8_t channel, bool s2d); async command bool getChannelStatus(uint8_t channel); async command void suspendChannel(uint8_t channel); async event void transferDone(error_t success); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaControl.nc000066400000000000000000000034621207233610700253350ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uDmahardware.h" interface HplSam3uDmaControl { async command error_t init(); async command error_t setRoundRobin(); async command error_t setFixedPriority(); async command void reset(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaInterrupt.nc000066400000000000000000000032361207233610700257100ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ interface HplSam3uDmaInterrupt { async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaP.nc000066400000000000000000000055311207233610700241130ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uDmahardware.h" module HplSam3uDmaP { provides interface HplSam3uDmaControl as DmaControl; provides interface HplSam3uDmaInterrupt as Interrupt; uses interface HplNVICInterruptCntl as HDMAInterrupt; uses interface HplSam3uPeripheralClockCntl as HDMAClockControl; uses interface FunctionWrapper as DmacInterruptWrapper; uses interface Leds; } implementation { async command error_t DmaControl.init(){ call HDMAInterrupt.disable(); call HDMAInterrupt.configure(IRQ_PRIO_DMAC); call HDMAInterrupt.enable(); call HDMAClockControl.enable(); return SUCCESS; } async command error_t DmaControl.setRoundRobin(){ volatile dmac_gcfg_t *GCFG = (volatile dmac_gcfg_t *) 0x400B0000; dmac_gcfg_t gcfg = *GCFG; gcfg.bits.arb_cfg = 1; *GCFG = gcfg; return SUCCESS; } async command error_t DmaControl.setFixedPriority(){ volatile dmac_gcfg_t *GCFG = (volatile dmac_gcfg_t *) 0x400B0000; dmac_gcfg_t gcfg = *GCFG; gcfg.bits.arb_cfg = 0; *GCFG = gcfg; return SUCCESS; } async command void DmaControl.reset(){ } void DmacIrqHandler() @C() @spontaneous() { call DmacInterruptWrapper.preamble(); signal Interrupt.fired(); call DmacInterruptWrapper.postamble(); } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaXP.nc000066400000000000000000000217671207233610700242540ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uDmahardware.h" generic module HplSam3uDmaXP(uint8_t DMACHANNEL) { provides interface HplSam3uDmaChannel as Dma; uses interface HplSam3uDmaInterrupt as Interrupt; uses interface Leds; } implementation { uint32_t CHANNEL_OFFSET = 0x3C + (DMACHANNEL * 0x28); async event void Interrupt.fired(){ // Disable channel and send signal up call Dma.disableChannel(DMACHANNEL); call Dma.disableChannelInterrupt(DMACHANNEL); call Dma.disable(); signal Dma.transferDone(SUCCESS); } async command error_t Dma.setSrcAddr(void* src_addr){ volatile dmac_saddrx_t *SADDRX = (volatile dmac_saddrx_t *)(0x400B0000 + CHANNEL_OFFSET); dmac_saddrx_t saddrxx; saddrxx.bits.saddrx = (uint32_t) src_addr; *SADDRX = saddrxx; return SUCCESS; } async command error_t Dma.setDstAddr(void* dst_addr){ volatile dmac_daddrx_t *DADDRX = (volatile dmac_daddrx_t *)(0x400B0004 + CHANNEL_OFFSET); dmac_daddrx_t daddrxx; daddrxx.bits.daddrx = (uint32_t) dst_addr; *DADDRX = daddrxx; return SUCCESS; } async command error_t Dma.setCtrlA(uint16_t btsize, dmac_chunk_t scsize, dmac_chunk_t dcsize, dmac_width_t src_width, dmac_width_t dst_width){ volatile dmac_ctrlax_t *CTRLAX = (volatile dmac_ctrlax_t *)(0x400B000C + CHANNEL_OFFSET); dmac_ctrlax_t ctrlax = *CTRLAX; ctrlax.bits.btsize = btsize; ctrlax.bits.scsize = scsize; ctrlax.bits.dcsize = dcsize; ctrlax.bits.src_width = src_width; ctrlax.bits.dst_width = dst_width; *CTRLAX = ctrlax; return SUCCESS; } async command error_t Dma.setCtrlB(dmac_dscr_t src_dscr, dmac_dscr_t dst_dscr, dmac_fc_t fc, dmac_inc_t src_inc, dmac_inc_t dst_inc){ volatile dmac_ctrlbx_t *CTRLBX = (volatile dmac_ctrlbx_t *)(0x400B0010 + CHANNEL_OFFSET); dmac_ctrlbx_t ctrlbx = *CTRLBX; ctrlbx.bits.src_dscr = src_dscr; ctrlbx.bits.dst_dscr = dst_dscr; ctrlbx.bits.fc = fc; ctrlbx.bits.src_incr = src_inc; ctrlbx.bits.dst_incr = dst_inc; *CTRLBX = ctrlbx; return SUCCESS; } async command uint32_t Dma.setBtsize(uint16_t btsize){ volatile dmac_ctrlax_t *CTRLAX = (volatile dmac_ctrlax_t *)(0x400B000C + CHANNEL_OFFSET); dmac_ctrlax_t ctrlax = *CTRLAX; ctrlax.bits.btsize = btsize; *CTRLAX = ctrlax; return (0x400B000C + CHANNEL_OFFSET); } async command error_t Dma.setCfg(uint8_t src_per, uint8_t dst_per, bool srcSwHandshake, bool dstSwHandshake, bool stopOnDone, bool lockIF, bool lockB, dmac_IFL_t lockIFL, dmac_ahbprot_t ahbprot, dmac_fifocfg_t fifocfg){ volatile dmac_cfgx_t *CFGX = (volatile dmac_cfgx_t *)(0x400B0014 + CHANNEL_OFFSET); dmac_cfgx_t cfgx = *CFGX; cfgx.bits.src_per = src_per; cfgx.bits.dst_per = dst_per; cfgx.bits.src_h2sel = !srcSwHandshake; cfgx.bits.dst_h2sel = !dstSwHandshake; cfgx.bits.sod = stopOnDone; cfgx.bits.lock_if = lockIF; cfgx.bits.lock_b = lockB; cfgx.bits.lock_if_l = lockIFL; cfgx.bits.ahb_prot = ahbprot; cfgx.bits.fifocfg = fifocfg; *CFGX = cfgx; return SUCCESS; } async command void Dma.enable(){ volatile dmac_en_t *EN = (volatile dmac_en_t *) 0x400B0004; dmac_en_t en = *EN; en.bits.enable = 1; *EN = en; } async command void Dma.disable(){ volatile dmac_en_t *EN = (volatile dmac_en_t *) 0x400B0004; dmac_en_t en = *EN; en.bits.enable = 0; *EN = en; } async command void Dma.enableChannel(uint8_t channel){ volatile dmac_cher_t *CHER = (volatile dmac_cher_t *) 0x400B0028; dmac_cher_t cher; switch(DMACHANNEL){ case 0: cher.bits.ena0 = 1; break; case 1: cher.bits.ena1 = 1; break; case 2: cher.bits.ena2 = 1; break; case 3: cher.bits.ena3 = 1; break; default: cher.bits.ena0 = 1; break; } *CHER = cher; } async command void Dma.disableChannel(uint8_t channel){ volatile dmac_chdr_t *CHDR = (volatile dmac_chdr_t *) 0x400B002C; dmac_chdr_t chdr; switch(DMACHANNEL){ case 0: chdr.bits.dis0 = 1; break; case 1: chdr.bits.dis1 = 1; break; case 2: chdr.bits.dis2 = 1; break; case 3: chdr.bits.dis3 = 1; break; default: chdr.bits.dis0 = 1; break; } *CHDR = chdr; } async command void Dma.enableTransferRequest(uint8_t channel, bool s2d){ volatile dmac_sreq_t *SREQ = (volatile dmac_sreq_t *) 0x400B0008; dmac_sreq_t sreq = *SREQ; volatile dmac_last_t *LAST = (volatile dmac_last_t *) 0x400B0010; dmac_last_t last = *LAST; volatile dmac_creq_t *CREQ = (volatile dmac_creq_t *) 0x400B000C; dmac_creq_t creq = *CREQ; switch(DMACHANNEL){ case 0: if(s2d){ last.bits.slast0 = 1; sreq.bits.ssreq0 = 1; }else{ last.bits.dlast0 = 1; sreq.bits.dsreq0 = 1; } break; case 1: if(s2d){ sreq.bits.ssreq1 = 1; last.bits.slast1 = 1; }else{ sreq.bits.dsreq1 = 1; last.bits.dlast1 = 1; } break; case 2: if(s2d){ sreq.bits.ssreq2dash = 1; last.bits.slast2 = 1; }else{ sreq.bits.dsreq2dash = 1; last.bits.dlast2 = 1; } break; case 3: if(s2d){ sreq.bits.ssreq3 = 1; last.bits.slast3 = 1; }else{ sreq.bits.dsreq3 = 1; last.bits.slast3 = 1; } break; default: if(s2d){ sreq.bits.ssreq0 = 1; last.bits.slast0 = 1; }else{ sreq.bits.dsreq0 = 1; last.bits.dlast0 = 1; } break; } *LAST = last; *CREQ = creq; *SREQ = sreq; } async command void Dma.enableChannelInterrupt(uint8_t channel){ volatile dmac_ebcier_t *EBCIER = (volatile dmac_ebcier_t *) 0x400B0018; dmac_ebcier_t ebcier;// = *EBCIER; switch(DMACHANNEL){ case 0: ebcier.bits.btc0 = 1; //ebcier.bits.err0 = 1; break; case 1: ebcier.bits.btc1 = 1; //ebcier.bits.err1 = 1; break; case 2: ebcier.bits.btc2 = 1; //ebcier.bits.err2 = 1; break; case 3: ebcier.bits.btc3 = 1; //ebcier.bits.err3 = 1; break; } *EBCIER = ebcier; } async command void Dma.disableChannelInterrupt(uint8_t channel){ volatile dmac_ebcidr_t *EBCIDR = (volatile dmac_ebcidr_t *) 0x400B001C; dmac_ebcidr_t ebcidr;// = *EBCIER; switch(DMACHANNEL){ case 0: ebcidr.bits.btc0 = 1; //ebcier.bits.err0 = 1; break; case 1: ebcidr.bits.btc1 = 1; //ebcier.bits.err1 = 1; break; case 2: ebcidr.bits.btc2 = 1; //ebcier.bits.err2 = 1; break; case 3: ebcidr.bits.btc3 = 1; //ebcier.bits.err3 = 1; break; } *EBCIDR = ebcidr; } async command bool Dma.getChannelStatus(uint8_t channel){ volatile dmac_chsr_t *CHSR = (volatile dmac_chsr_t *) 0x400B0030; switch(DMACHANNEL){ case 0: return CHSR->bits.ena0; case 1: return CHSR->bits.ena1; case 2: return CHSR->bits.ena2; case 3: return CHSR->bits.ena3; default: return CHSR->bits.ena0; } } async command void Dma.suspendChannel(uint8_t channel){ volatile dmac_cher_t *CHER = (volatile dmac_cher_t *) 0x400B0028; dmac_cher_t cher; switch(DMACHANNEL){ case 0: cher.bits.susp0 = 1; break; case 1: cher.bits.susp1 = 1; break; case 2: cher.bits.susp2 = 1; break; case 3: cher.bits.susp3 = 1; break; default: cher.bits.susp0 = 1; break; } *CHER = cher; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/README000066400000000000000000000002221207233610700222430ustar00rootroot00000000000000DMA Controller Implementation for SAM3U @author JeongGil Ko The implementations are based on the preliminary specifications. tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaC.nc000066400000000000000000000052071207233610700234320ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ configuration Sam3uDmaC { provides interface Sam3uDmaControl as Control; provides interface Sam3uDmaChannel as Channel0; provides interface Sam3uDmaChannel as Channel1; provides interface Sam3uDmaChannel as Channel2; provides interface Sam3uDmaChannel as Channel3; } implementation { components new Sam3uDmaChannelP() as Channel0P; components new Sam3uDmaChannelP() as Channel1P; components new Sam3uDmaChannelP() as Channel2P; components new Sam3uDmaChannelP() as Channel3P; components Sam3uDmaControlP as ControlP; components HplSam3uDmaC as DmaC; Control = ControlP; Channel0 = Channel0P; Channel1 = Channel1P; Channel2 = Channel2P; Channel3 = Channel3P; ControlP.DmaControl -> DmaC; //ControlP.DmaChannel0 -> DmaC.Channel0; //ControlP.DmaChannel1 -> DmaC.Channel1; //ControlP.DmaChannel2 -> DmaC.Channel2; //ControlP.DmaChannel3 -> DmaC.Channel3; Channel0P.DmaChannel -> DmaC.Channel0; Channel1P.DmaChannel -> DmaC.Channel1; Channel2P.DmaChannel -> DmaC.Channel2; Channel3P.DmaChannel -> DmaC.Channel3; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaChannel.nc000066400000000000000000000075611207233610700246250ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uDmahardware.h" interface Sam3uDmaChannel { async command error_t setupTransfer( uint8_t channel, void *src_addr, /* Source Address */ void *dst_addr, /* Destination Address */ uint16_t btsize, /* Size of buffer transfer */ dmac_chunk_t scsize, /* Source chunk transfer size -- details in header file */ dmac_chunk_t dcsize, /* Destination chunk transfer size -- details in header file */ dmac_width_t src_width, /* details in header file */ dmac_width_t dst_width, /* details in header file */ dmac_dscr_t src_dscr, /* Source address descripter method */ dmac_dscr_t dst_dscr, /* Destination address descripter method */ dmac_fc_t fc, /* Flow Controller -- deatils in header file */ dmac_inc_t src_inc, /* Source addressing mode */ dmac_inc_t dst_inc, /* Source addressing mode */ uint8_t src_per, /* Handshake peripheral, for HW handshakes -- 4 bits */ uint8_t dst_per, /* Handshake peripheral, for HW handshakes -- 4 bits */ bool srcSwHandshake, /* select sw handshake for source */ bool dstSwHandshake, /* select sw handshake for destination */ bool stopOnDone, /* DMAC disable upon done signal */ bool lockIF, /* Interface lock capability */ bool lockB, /* AHB Bus lock capability */ dmac_IFL_t lockIFL, /* Master interface locked by channel for chunk/buffer trasfer -- details in header file */ dmac_ahbprot_t ahbprot, /* Additional info on bus access -- deatils in header file */ dmac_fifocfg_t fifocfg /* Configure FIFO -- Details in header file */ ); async command error_t startTransfer(uint8_t channel); /* set enable bit */ async command error_t repeatTransfer( void *src_addr, void *dst_addr, uint16_t size, uint8_t channel); /* repeat trasfer with the previous settings */ async command error_t swTransferRequest(uint8_t channel, bool s2d); /* set source or destination tranfer request for channel */ async command error_t stopTransfer(uint8_t channel); /* Perform all fuctions needed to disable/stop transfer*/ async command error_t resetAll(uint8_t channel); async event void transferDone(error_t success); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaChannelP.nc000066400000000000000000000110651207233610700247370ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uDmahardware.h" generic module Sam3uDmaChannelP() { provides interface Sam3uDmaChannel as Channel; uses interface HplSam3uDmaChannel as DmaChannel; } implementation { async command error_t Channel.setupTransfer( uint8_t channel, void *src_addr, void *dst_addr, uint16_t btsize, dmac_chunk_t scsize, dmac_chunk_t dcsize, dmac_width_t src_width, dmac_width_t dst_width, dmac_dscr_t src_dscr, dmac_dscr_t dst_dscr, dmac_fc_t fc, dmac_inc_t src_inc, dmac_inc_t dst_inc, uint8_t src_per, uint8_t dst_per, bool srcSwHandshake, bool dstSwHandshake, bool stopOnDone, bool lockIF, bool lockB, dmac_IFL_t lockIFL, dmac_ahbprot_t ahbprot, dmac_fifocfg_t fifocfg) { call DmaChannel.enable(); call DmaChannel.disableChannelInterrupt(channel); call DmaChannel.setSrcAddr(src_addr); call DmaChannel.setDstAddr(dst_addr); call DmaChannel.setCtrlA(btsize, scsize, dcsize, src_width, dst_width); call DmaChannel.setCtrlB(src_dscr, dst_dscr, fc, src_inc, dst_inc); call DmaChannel.setCfg(src_per, dst_per, srcSwHandshake, dstSwHandshake, stopOnDone, lockIF, lockB, lockIFL, ahbprot, fifocfg); return SUCCESS; } async command error_t Channel.startTransfer(uint8_t channel) { call DmaChannel.enable(); call DmaChannel.enableChannelInterrupt(channel); call DmaChannel.enableChannel(channel); return SUCCESS; } async command error_t Channel.repeatTransfer( void *src_addr, void *dst_addr, uint16_t size, uint8_t channel) { call DmaChannel.setBtsize(size); call DmaChannel.enable(); call DmaChannel.enableChannelInterrupt(channel); call DmaChannel.enableChannel(channel); return SUCCESS; } async command error_t Channel.swTransferRequest(uint8_t channel, bool s2d) { // Only used for peripheral transmissions and not for memory-memory transfers call DmaChannel.enableTransferRequest(channel, s2d); return SUCCESS; } async command error_t Channel.stopTransfer(uint8_t channel) { if(call DmaChannel.getChannelStatus(channel)){ call DmaChannel.suspendChannel(channel); } call DmaChannel.disableChannel(channel); } async command error_t Channel.resetAll(uint8_t channel) { call DmaChannel.enable(); call DmaChannel.disableChannelInterrupt(channel); call DmaChannel.setSrcAddr(0); call DmaChannel.setDstAddr(0); call DmaChannel.setCtrlA(0, 0, 0, 0, 0); call DmaChannel.setCtrlB(0, 0, 0, 0, 0); call DmaChannel.setCfg(0, 0, 0, 0, 0, 0, 0, 0, 1, 0); call DmaChannel.disable(); return SUCCESS; } async event void DmaChannel.transferDone(error_t success){ signal Channel.transferDone(success); } default async event void Channel.transferDone(error_t success){ } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaControl.nc000066400000000000000000000034521207233610700246700ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3uDmahardware.h" interface Sam3uDmaControl { async command error_t init(); async command error_t setArbitor(bool roundRobin); // True is round robin ; False if fixed priority arbitor } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaControlP.nc000066400000000000000000000050331207233610700250050ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ module Sam3uDmaControlP { provides interface Sam3uDmaControl as Control; uses interface HplSam3uDmaControl as DmaControl; //uses interface HplSam3uDmaChannel as DmaChannel0; //uses interface HplSam3uDmaChannel as DmaChannel1; //uses interface HplSam3uDmaChannel as DmaChannel2; //uses interface HplSam3uDmaChannel as DmaChannel3; //uses interface HplSam3uDmaInterrupt as Interrupt; } implementation { async command error_t Control.init(){ call DmaControl.init(); return SUCCESS; } async command error_t Control.setArbitor(bool roundRobin){ if(roundRobin){ return call DmaControl.setRoundRobin(); }else{ return call DmaControl.setFixedPriority(); } } /* async event void DmaChannel0.transferDone(error_t err){} async event void DmaChannel1.transferDone(error_t err){} async event void DmaChannel2.transferDone(error_t err){} async event void DmaChannel3.transferDone(error_t err){} */ } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/dma/sam3uDmahardware.h000066400000000000000000000361601207233610700247360ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * 4 Channel DMA Controller register definitions. * * @author JeongGil Ko */ #ifndef _SAM3UDMAHARDWARE_H #define _SAM3UDMAHARDWARE_H /** * DMAC Global Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1073 */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 4; uint8_t arb_cfg : 1; uint8_t reserved1 : 3; uint16_t reserved2 : 16; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } dmac_gcfg_t; /** * DMAC Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1074 */ typedef union { uint32_t flat; struct { uint8_t enable : 1; uint8_t reserved0 : 7; uint16_t reserved1 : 16; uint8_t reserved2 : 8; } __attribute__((__packed__)) bits; } dmac_en_t; /** * DMAC Software Single Request Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1075 */ typedef union { uint32_t flat; struct { uint8_t ssreq0 : 1; uint8_t dsreq0 : 1; uint8_t ssreq1 : 1; uint8_t dsreq1 : 1; uint8_t ssreq2dash : 1; uint8_t dsreq2dash : 1; uint8_t ssreq3 : 1; uint8_t dsreq3 : 1; uint16_t reserved0 : 16; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } dmac_sreq_t; /** * DMAC Software Chunk Request Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1076 */ typedef union { uint32_t flat; struct { uint8_t screq0 : 1; uint8_t dcreq0 : 1; uint8_t screq1 : 1; uint8_t dcreq1 : 1; uint8_t screq2dash : 1; uint8_t dcreq2dash : 1; uint8_t screq3 : 1; uint8_t dcreq3 : 1; uint16_t reserved0 : 16; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } dmac_creq_t; /** * DMAC Software Last Transfer Flag Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1077 */ typedef union { uint32_t flat; struct { uint8_t slast0 : 1; uint8_t dlast0 : 1; uint8_t slast1 : 1; uint8_t dlast1 : 1; uint8_t slast2 : 1; uint8_t dlast2 : 1; uint8_t slast3 : 1; uint8_t dlast3 : 1; uint16_t reserved0 : 16; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } dmac_last_t; /** * DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1078 */ typedef union { uint32_t flat; struct { uint8_t btc0 : 1; uint8_t btc1 : 1; uint8_t btc2 : 1; uint8_t btc3 : 1; uint8_t reserved0 : 4; uint8_t cbtc0 : 1; uint8_t cbtc1 : 1; uint8_t cbtc2 : 1; uint8_t cbtc3 : 1; uint8_t reserved1 : 4; uint8_t err0 : 1; uint8_t err1 : 1; uint8_t err2 : 1; uint8_t err3 : 1; uint8_t reserved2 : 4; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } dmac_ebcier_t; /** * DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1079 */ typedef union { uint32_t flat; struct { uint8_t btc0 : 1; uint8_t btc1 : 1; uint8_t btc2 : 1; uint8_t btc3 : 1; uint8_t reserved0 : 4; uint8_t cbtc0 : 1; uint8_t cbtc1 : 1; uint8_t cbtc2 : 1; uint8_t cbtc3 : 1; uint8_t reserved1 : 4; uint8_t err0 : 1; uint8_t err1 : 1; uint8_t err2 : 1; uint8_t err3 : 1; uint8_t reserved2 : 4; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } dmac_ebcidr_t; /** * DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1080 */ typedef union { uint32_t flat; struct { uint8_t btc0 : 1; uint8_t btc1 : 1; uint8_t btc2 : 1; uint8_t btc3 : 1; uint8_t reserved0 : 4; uint8_t cbtc0 : 1; uint8_t cbtc1 : 1; uint8_t cbtc2 : 1; uint8_t cbtc3 : 1; uint8_t reserved1 : 4; uint8_t err0 : 1; uint8_t err1 : 1; uint8_t err2 : 1; uint8_t err3 : 1; uint8_t reserved2 : 4; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } dmac_ebcimr_t; /** * DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1081 */ typedef union { uint32_t flat; struct { uint8_t btc0 : 1; uint8_t btc1 : 1; uint8_t btc2 : 1; uint8_t btc3 : 1; uint8_t reserved0 : 4; uint8_t cbtc0 : 1; uint8_t cbtc1 : 1; uint8_t cbtc2 : 1; uint8_t cbtc3 : 1; uint8_t reserved1 : 4; uint8_t err0 : 1; uint8_t err1 : 1; uint8_t err2 : 1; uint8_t err3 : 1; uint8_t reserved2 : 4; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } dmac_ebcisr_t; /** * DMAC Channel Handler Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1082 */ typedef union { uint32_t flat; struct { uint8_t ena0 : 1; uint8_t ena1 : 1; uint8_t ena2 : 1; uint8_t ena3 : 1; uint8_t reserved0 : 4; uint8_t susp0 : 1; uint8_t susp1 : 1; uint8_t susp2 : 1; uint8_t susp3 : 1; uint8_t reserved1 : 4; uint8_t reserved2 : 8; uint8_t keep0 : 1; uint8_t keep1 : 1; uint8_t keep2 : 1; uint8_t keep3 : 1; uint8_t reserved3 : 4; } __attribute__((__packed__)) bits; } dmac_cher_t; /** * DMAC Channel Handler Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1083 */ typedef union { uint32_t flat; struct { uint8_t dis0 : 1; uint8_t dis1 : 1; uint8_t dis2 : 1; uint8_t dis3 : 1; uint8_t reserved0 : 4; uint8_t res0 : 1; uint8_t res1 : 1; uint8_t res2 : 1; uint8_t res3 : 1; uint8_t reserved1 : 4; uint8_t reserved2 : 8; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } dmac_chdr_t; /** * DMAC Channel Handler Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1084 */ typedef union { uint32_t flat; struct { uint8_t ena0 : 1; uint8_t ena1 : 1; uint8_t ena2 : 1; uint8_t ena3 : 1; uint8_t reserved0 : 4; uint8_t susp0 : 1; uint8_t susp1 : 1; uint8_t susp2 : 1; uint8_t susp3 : 1; uint8_t reserved1 : 4; uint8_t empt0 : 1; uint8_t empt1 : 1; uint8_t empt2 : 1; uint8_t empt3 : 1; uint8_t reserved2 : 4; uint8_t stal0 : 1; uint8_t stal1 : 1; uint8_t stal2 : 1; uint8_t stal3 : 1; uint8_t reserved3 : 4; } __attribute__((__packed__)) bits; } dmac_chsr_t; /** * DMAC Channal x Source Address Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1085 */ typedef union { uint32_t flat; struct { uint32_t saddrx : 32; } __attribute__((__packed__)) bits; } dmac_saddrx_t; /** * DMAC Channal x Destination Address Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1086 */ typedef union { uint32_t flat; struct { uint32_t daddrx : 32; } __attribute__((__packed__)) bits; } dmac_daddrx_t; /** * DMAC Channal x Descriptor Address Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1087 */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 2; uint32_t dscrx : 30; } __attribute__((__packed__)) bits; } dmac_dscrx_t; /** * DMAC Channal x Control A Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1088 */ typedef union { uint32_t flat; struct { uint16_t btsize : 12; uint16_t scsize : 1; uint16_t reserved0 : 3; uint8_t dcsize : 1; uint8_t reserved1 : 3; uint8_t src_width : 2; uint8_t reserved2 : 2; uint8_t dst_width : 2; uint8_t reserved3 : 1; uint8_t done : 1; } __attribute__((__packed__)) bits; } dmac_ctrlax_t; /** * DMAC Channal x Control B Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1090 */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 8; uint8_t resetved1 : 8; uint8_t src_dscr : 1; uint8_t reserved2 : 3; uint8_t dst_dscr : 1; uint8_t fc : 2; uint8_t reserved3 : 1; uint8_t src_incr : 2; uint8_t reserved4 : 2; uint8_t dst_incr : 2; uint8_t ien : 1; uint8_t reserved5 : 1; } __attribute__((__packed__)) bits; } dmac_ctrlbx_t; /** * DMAC Channal x Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1090 */ typedef union { uint32_t flat; struct { uint8_t src_per : 4; uint8_t dst_per : 4; uint8_t reserved0 : 1; uint8_t src_h2sel : 1; uint8_t reserved1 : 3; uint8_t dst_h2sel : 1; uint8_t reserved2 : 2; uint8_t sod : 1; uint8_t reserved3 : 3; uint8_t lock_if : 1; uint8_t lock_b : 1; uint8_t lock_if_l : 1; uint8_t reserved4 : 1; uint8_t ahb_prot : 3; uint8_t reserved5 : 1; uint8_t fifocfg : 2; uint8_t reserved6 : 2; } __attribute__((__packed__)) bits; } dmac_cfgx_t; /** * DMAC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 1072 */ typedef struct dmac { volatile dmac_gcfg_t gcfg; volatile dmac_en_t en; volatile dmac_sreq_t sreq; volatile dmac_creq_t creq; volatile dmac_last_t last; uint32_t reserved0; volatile dmac_ebcier_t ebcier; volatile dmac_ebcidr_t ebcidr; volatile dmac_ebcimr_t ebcimr; volatile dmac_ebcisr_t ebcisr; volatile dmac_cher_t cher; volatile dmac_chdr_t chdr; volatile dmac_chsr_t chsr; uint32_t reserved1; uint32_t reserved2; volatile dmac_saddrx_t saddr0; volatile dmac_daddrx_t daddr0; volatile dmac_dscrx_t dscr0; volatile dmac_ctrlax_t ctrla0; volatile dmac_ctrlbx_t ctrlb0; volatile dmac_cfgx_t cfg0; uint32_t reserved3; uint32_t reserved4; uint32_t reserved5; uint32_t reserved6; volatile dmac_saddrx_t saddr1; volatile dmac_daddrx_t daddr1; volatile dmac_dscrx_t dscr1; volatile dmac_ctrlax_t ctrla1; volatile dmac_ctrlbx_t ctrlb1; volatile dmac_cfgx_t cfg1; uint32_t reserved7; uint32_t reserved8; uint32_t reserved9; uint32_t reserved10; volatile dmac_saddrx_t saddr2; volatile dmac_daddrx_t daddr2; volatile dmac_dscrx_t dscr2; volatile dmac_ctrlax_t ctrla2; volatile dmac_ctrlbx_t ctrlb2; volatile dmac_cfgx_t cfg2; uint32_t reserved11; uint32_t reserved12; uint32_t reserved13; uint32_t reserved14; volatile dmac_saddrx_t saddr3; volatile dmac_daddrx_t daddr3; volatile dmac_dscrx_t dscr3; volatile dmac_ctrlax_t ctrla3; volatile dmac_ctrlbx_t ctrlb3; volatile dmac_cfgx_t cfg3; } __attribute__((__packed__)) dmac_t; volatile dmac_t* DMAC = (volatile dmac_t *) 0x400B0000; // DMAC Base Address //volatile dmac_gcfg_t* SREQ = (volatile dmac_gcfg_t *) 0x400B0008; /* */ /* typedef enum { DMAC_SINGLE_TRANSFER = 0x0, DMAC_BLOCK_TRANSFER = 0x1, DMAC_BURST_BLOCK_TRANSFER = 0x2, DMAC_REPEATED_SINGLE_TRANSFER = 0x4, DMAC_REPEATED_BLOCK_TRANSFER = 0x5, DMAC_REPEATED_BURST_BLOCK_TRANSFER = 0x7 } dmac_transfer_mode_t; */ typedef enum { ONE_DATA_TRANSFERRED = 0x0, FOUR_DATA_TRANSFERRED = 0x1 } dmac_chunk_t; typedef enum { SINGLE_TRANSFER_SIZE_BYTE = 0x0, SINGLE_TRANSFER_SIZE_HALF_WORD = 0x1, SINGLE_TRANSFER_SIZE_WORD = 0x2 } dmac_width_t; typedef enum { MEMORY_TO_MEMORY = 0x0, MEMORY_TO_PERIPHERAL = 0x1, PERIPHERAL_TO_MEMORY = 0x2, PERIPHERAL_TO_PERIPHERAL = 0x3 } dmac_fc_t; typedef enum { ADDRESS_UPDATE_MEMORY = 0x0, ADDRESS_UPDATE_DISABLED = 0x1 } dmac_dscr_t; typedef enum { INCREMENTING_ADDRESS = 0x0, FIXED_ADDRESS = 0x1 } dmac_inc_t; typedef enum { LOCK_MASTER_ARBITOR_CHUNK = 0x0, LOCK_MASTER_ABRITOR_BUFFER = 0x1 } dmac_IFL_t; typedef enum { DATA_ACCESS_USER_ACCESS_NO_BUFFER_NO_CACHE = 0x1, DATA_ACCESS_PRIV_ACCESS_NO_BUFFER_NO_CACHE = 0x3, DATA_ACCESS_USER_ACCESS_BUFFER_NO_CACHE = 0x5, DATA_ACCESS_PRIV_ACCESS_BUFFER_NO_CACHE = 0x7, DATA_ACCESS_USER_ACCESS_NO_BUFFER_CACHE = 0x9, DATA_ACCESS_PRIV_ACCESS_NO_BUFFER_CACHE = 0xB, DATA_ACCESS_USER_ACCESS_BUFFER_CACHE = 0xD, DATA_ACCESS_PRIV_ACCESS_BUFFER_CACHE = 0xF } dmac_ahbprot_t; typedef enum { LARGEST_LENGTH_AHB_BURST_DST = 0x0, SERV_HALF_FIFO = 0x1, SERV_ENOUGH_FIFO = 0x2 } dmac_fifocfg_t; #endif tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/eefc/000077500000000000000000000000001207233610700215305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/eefc/sam3eefchardware.h000066400000000000000000000036541207233610700251150ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #ifndef SAM3UEEFCHARDWARE_H #define SAM3UEEFCHARDWARE_H #include "eefchardware.h" /** * Memory mapping for the EEFC0 and EEFC1 (SAM3U/4E only!) */ volatile eefc_t* EEFC0 = (volatile eefc_t*) 0x400E0800; // EEFC0 Base Address volatile eefc_t* EEFC1 = (volatile eefc_t*) 0x400E0A00; // EEFC1 Base Address #endif // SAM3UEEFCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/000077500000000000000000000000001207233610700217315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmci.nc000066400000000000000000000041511207233610700246740ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed Multimedia Card Interface HPL Interface definitions. * * @author JeongGil Ko * @author Kevin Klues */ interface HplSam3uHsmci { command error_t init(uint32_t **trans_buf); async event void initDone(hsmci_sd_r6_t* rsp, error_t error); async command error_t sendCommand(uint8_t cmd, uint32_t arg); async event void* sendCommandDone(uint8_t cmd, void* rsp, error_t error); async event void txDone(error_t error); async event void rxDone(error_t error); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmciC.nc000066400000000000000000000061211207233610700247760ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed Multimedia Card Interface HPL Configurations. * * @author JeongGil Ko * @author Kevin Klues */ #include configuration HplSam3uHsmciC { provides { interface AsyncStdControl; interface HplSam3uHsmci; } } implementation { components HplSam3uHsmciP, HplNVICC, HplSam3uClockC, HplSam3uGeneralIOC; HplSam3uHsmci = HplSam3uHsmciP; AsyncStdControl = HplSam3uHsmciP; HplSam3uHsmciP.HSMCIInterrupt -> HplNVICC.MCI0Interrupt; HplSam3uHsmciP.HSMCIPinMCCDA -> HplSam3uGeneralIOC.HplPioA4; HplSam3uHsmciP.HSMCIPinMCCK -> HplSam3uGeneralIOC.HplPioA3; HplSam3uHsmciP.HSMCIPinMCDA0 -> HplSam3uGeneralIOC.HplPioA5; HplSam3uHsmciP.HSMCIPinMCDA1 -> HplSam3uGeneralIOC.HplPioA6; HplSam3uHsmciP.HSMCIPinMCDA2 -> HplSam3uGeneralIOC.HplPioA7; HplSam3uHsmciP.HSMCIPinMCDA3 -> HplSam3uGeneralIOC.HplPioA8; HplSam3uHsmciP.HSMCIPinMCDA4 -> HplSam3uGeneralIOC.HplPioC28; HplSam3uHsmciP.HSMCIPinMCDA5 -> HplSam3uGeneralIOC.HplPioC29; HplSam3uHsmciP.HSMCIPinMCDA6 -> HplSam3uGeneralIOC.HplPioC30; HplSam3uHsmciP.HSMCIPinMCDA7 -> HplSam3uGeneralIOC.HplPioC31; HplSam3uHsmciP.HSMCIClockControl -> HplSam3uClockC.MCI0PPCntl; components McuSleepC; HplSam3uHsmciP.HsmciInterruptWrapper -> McuSleepC; components PlatformHsmciConfigC; HplSam3uHsmciP.PlatformHsmciConfig -> PlatformHsmciConfigC; components BusyWaitMicroC; HplSam3uHsmciP.BusyWait -> BusyWaitMicroC; components LedsC; HplSam3uHsmciP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmciP.nc000066400000000000000000000637001207233610700250210ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed Multimedia Card Interface HPL Implementations. * * @author JeongGil Ko * @author Kevin Klues */ #include module HplSam3uHsmciP { provides { interface AsyncStdControl; interface HplSam3uHsmci; } uses { interface Leds; interface Init as PlatformHsmciConfig; interface BusyWait; interface HplSam3PeripheralClockCntl as HSMCIClockControl; interface HplNVICInterruptCntl as HSMCIInterrupt; interface HplSam3GeneralIOPin as HSMCIPinMCCDA; interface HplSam3GeneralIOPin as HSMCIPinMCCK; interface HplSam3GeneralIOPin as HSMCIPinMCDA0; interface HplSam3GeneralIOPin as HSMCIPinMCDA1; interface HplSam3GeneralIOPin as HSMCIPinMCDA2; interface HplSam3GeneralIOPin as HSMCIPinMCDA3; interface HplSam3GeneralIOPin as HSMCIPinMCDA4; interface HplSam3GeneralIOPin as HSMCIPinMCDA5; interface HplSam3GeneralIOPin as HSMCIPinMCDA6; interface HplSam3GeneralIOPin as HSMCIPinMCDA7; interface FunctionWrapper as HsmciInterruptWrapper; } } implementation { #define BLOCK_LENGTH (HSMCI->blkr.bits.blklen) #define WORDS_PER_BLOCK (BLOCK_LENGTH/4) enum { STATE_OFF, STATE_INACTIVE, STATE_IDLE, STATE_READY, STATE_IDENTIFICATION, STATE_STANDBY, STATE_TRANSFER, STATE_SENDING, STATE_RECEIVING, STATE_PROGRAMMING, STATE_DISCONNECT, }; // Protected by state variables norace uint8_t state = STATE_OFF; norace uint8_t cmd_pending = FALSE; norace uint8_t current_cmd = 0; norace uint8_t acmd = 0; norace uint32_t acmd_arg = 0; norace uint32_t rca_addr = 0; norace uint8_t card_type = 0; norace uint32_t rsp_buf[4]; norace uint32_t *rsp_buf_ptr; norace uint32_t words_transferred = 0; norace uint32_t **trans_buf; void configurePins() { // Disable all interrrupts by default HSMCI->idr.flat = -1; // Configure the SD card interrupt call HSMCIInterrupt.configure(IRQ_PRIO_HSMCI); // Set up the SD card pins call HSMCIPinMCCDA.disablePioControl(); call HSMCIPinMCCDA.selectPeripheralA(); call HSMCIPinMCCK.disablePioControl(); call HSMCIPinMCCK.selectPeripheralA(); call HSMCIPinMCDA0.disablePioControl(); call HSMCIPinMCDA0.selectPeripheralA(); call HSMCIPinMCDA1.disablePioControl(); call HSMCIPinMCDA1.selectPeripheralA(); call HSMCIPinMCDA2.disablePioControl(); call HSMCIPinMCDA2.selectPeripheralA(); call HSMCIPinMCDA3.disablePioControl(); call HSMCIPinMCDA3.selectPeripheralA(); call HSMCIPinMCDA4.disablePioControl(); call HSMCIPinMCDA4.selectPeripheralB(); call HSMCIPinMCDA5.disablePioControl(); call HSMCIPinMCDA5.selectPeripheralB(); call HSMCIPinMCDA6.disablePioControl(); call HSMCIPinMCDA6.selectPeripheralB(); call HSMCIPinMCDA7.disablePioControl(); call HSMCIPinMCDA7.selectPeripheralB(); } void unlockConfigRegs() { // set write protection registers HSMCI->wpmr.bits.wp_key = 0x4D4349; // Magic key for unlocking the regs HSMCI->wpmr.bits.wp_en = 0; } void initConfigRegs() { // Enable mci HSMCI->cr.bits.mcien = 1; // Enable power save mode HSMCI->cr.bits.pwsdis = 0; // Set the multiplier for the timeout between block transfers HSMCI->dtor.bits.dtomul = 0x7; // Set timeout between block transfers HSMCI->dtor.bits.dtocyc = 0xF; // Disable all interrupts HSMCI->idr.flat = -1; // Set the clock divide HSMCI->mr.bits.clkdiv = 58; // Set padding value to 0x00, not 0xFF HSMCI->mr.bits.padv = 0; // Disable allowing byte transfers HSMCI->mr.bits.fbyte = 0; // Disable dma HSMCI->dma.bits.dmaen = 0; // Start writing data immediately when appears in FIFO HSMCI->cfg.bits.fifomode = 1; // Require a new read/write to reset an under/overflow HSMCI->cfg.bits.ferrctrl = 0; // Initialize any platform specific settings call PlatformHsmciConfig.init(); } void swReset() { // set sw reset register HSMCI->cr.bits.swrst = 1; } void issueRealACMD(uint8_t cmd, uint32_t arg) { acmd = cmd; acmd_arg = arg; HSMCI->argr.bits.arg = rca_addr; HSMCI->cmdr.flat = AT91C_APP_CMD; } void* sendCommandDone(error_t e) { return signal HplSam3uHsmci.sendCommandDone(current_cmd, rsp_buf_ptr, e); } async command error_t AsyncStdControl.start() { // start clock, start interrupt, start pin call HSMCIClockControl.enable(); return SUCCESS; } async command error_t AsyncStdControl.stop() { // start clock, start interrupt, start pin call HSMCIClockControl.disable(); return SUCCESS; } command error_t HplSam3uHsmci.init(uint32_t **transb) { // Initialize the first tx and rx buffers trans_buf = transb; // Configure all of the data and interrupt pins configurePins(); // Initialize state variables cmd_pending = FALSE; current_cmd = 0; acmd = 0; acmd_arg = 0; rca_addr = 0; state = STATE_OFF; card_type = 0; words_transferred = 0; rsp_buf_ptr = rsp_buf; // Reset the device swReset(); // Unlock and initialize the configuration registers unlockConfigRegs(); initConfigRegs(); // Run the set of commands to switch the SD card // from Card ID mode to Transfer Mode return call HplSam3uHsmci.sendCommand(CMD_PON, 0); } async command error_t HplSam3uHsmci.sendCommand(uint8_t command_number, uint32_t arg){ if(cmd_pending == TRUE) return EBUSY; if(state == STATE_INACTIVE) return FAIL; // Save the current command so we can identify it in the interrupt handler current_cmd = command_number; // Set the command argument HSMCI->argr.bits.arg = arg; // Set the default values for some registers //HSMCI->cfg.bits.hsmode = 0; HSMCI->mr.bits.wrproof = 1; HSMCI->mr.bits.rdproof = 1; // Clear the response buffer for the next command memset(rsp_buf, 0, sizeof(rsp_buf)); /* Card Power On */ if(state == STATE_OFF) { switch(command_number) { case CMD_PON: HSMCI->cmdr.flat = AT91C_POWER_ON_INIT; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } /* Valid Commands from any state except STATE_OFF */ else if(command_number == CMD0) { HSMCI->cmdr.flat = AT91C_GO_IDLE_STATE_CMD; } else if(command_number == CMD15) { HSMCI->cmdr.flat = AT91C_GO_INACTIVE_STATE_CMD; } /* Card Identification Mode */ else if(state == STATE_IDLE) { switch(command_number) { case CMD8: HSMCI->cmdr.flat = AT91C_SEND_IF_COND; break; case ACMD41: issueRealACMD(ACMD41_REAL, arg); break; case ACMD41_REAL: HSMCI->cmdr.flat = AT91C_SD_APP_OP_COND_CMD; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } else if(state == STATE_READY) { switch(command_number) { // case CMD11: // No CMD11 needed on sam3u case CMD2: HSMCI->cmdr.flat = AT91C_ALL_SEND_CID_CMD; break; default: // Notice the return here rather than the break.... } } else if(state == STATE_IDENTIFICATION) { switch(command_number) { case CMD3: HSMCI->cmdr.flat = AT91C_SET_RELATIVE_ADDR_CMD; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } else if(command_number == CMD13) { HSMCI->cmdr.flat = AT91C_SEND_STATUS_CMD; } /* Transfer Mode */ else if(state == STATE_STANDBY) { switch(command_number) { case CMD4: HSMCI->cmdr.flat = AT91C_SET_DSR_CMD; break; case CMD9: HSMCI->cmdr.flat = AT91C_SEND_CSD_CMD; break; case CMD10: HSMCI->cmdr.flat = AT91C_SEND_CID_CMD; break; case CMD3: HSMCI->cmdr.flat = AT91C_SET_RELATIVE_ADDR_CMD; break; case CMD7: HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } else if(state == STATE_TRANSFER) { switch(command_number) { case CMD7: HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD; break; /* Configuration commands */ case CMD16: HSMCI->blkr.bits.blklen = arg; HSMCI->cmdr.flat = AT91C_SET_BLOCKLEN_CMD; break; case CMD32: HSMCI->cmdr.flat = AT91C_TAG_SECTOR_START_CMD; break; case CMD33: HSMCI->cmdr.flat = AT91C_TAG_SECTOR_END_CMD; break; case ACMD6: issueRealACMD(ACMD6_REAL, arg); break; case ACMD42: issueRealACMD(ACMD42_REAL, arg); break; case ACMD23: issueRealACMD(ACMD23_REAL, arg); break; case ACMD6_REAL: HSMCI->sdcr.bits.sdcbus = arg; HSMCI->cmdr.flat = AT91C_SD_SET_BUS_WIDTH_CMD; break; case ACMD42_REAL: HSMCI->cmdr.flat = AT91C_SD_SET_CLR_CARD_DETECT_CMD; break; case ACMD23_REAL: HSMCI->cmdr.flat = AT91C_SD_SET_WR_BLK_ERASE_COUNT_CMD; break; /* Read commands */ case CMD6: HSMCI->cmdr.flat = AT91C_MMC_SWITCH_CMD; break; case CMD17: if(card_type == 3) HSMCI->blkr.bits.blklen = 512; HSMCI->blkr.bits.bcnt = 1; words_transferred = 0; HSMCI->cmdr.flat = AT91C_READ_SINGLE_BLOCK_CMD; break; case CMD18: if(card_type == 3) HSMCI->blkr.bits.blklen = 512; HSMCI->blkr.bits.bcnt = 0; words_transferred = 0; HSMCI->cmdr.flat = AT91C_READ_MULTIPLE_BLOCK_CMD; break; case CMD56R: HSMCI->cmdr.flat = AT91C_GEN_CMD; break; case ACMD13: issueRealACMD(ACMD13_REAL, arg); break; case ACMD22: issueRealACMD(ACMD22_REAL, arg); break; case ACMD51: issueRealACMD(ACMD51_REAL, arg); break; case ACMD13_REAL: HSMCI->cmdr.flat = AT91C_SD_STATUS_CMD; break; case ACMD22_REAL: HSMCI->cmdr.flat = AT91C_SD_SEND_NUM_WR_BLOCKS_CMD; break; case ACMD51_REAL: HSMCI->cmdr.flat = AT91C_SD_SEND_SCR_CMD; break; /* Write commands */ case CMD24: if(card_type == 3) HSMCI->blkr.bits.blklen = 512; HSMCI->blkr.bits.bcnt = 1; words_transferred = 0; HSMCI->cmdr.flat = AT91C_WRITE_BLOCK_CMD; break; case CMD25: if(card_type == 3) HSMCI->blkr.bits.blklen = 512; HSMCI->blkr.bits.bcnt = 0; words_transferred = 0; HSMCI->cmdr.flat = AT91C_WRITE_MULTIPLE_BLOCK_CMD; break; case CMD27: HSMCI->cmdr.flat = AT91C_PROGRAM_CSD_CMD; break; case CMD42: HSMCI->cmdr.flat = AT91C_LOCK_UNLOCK; break; case CMD56W: HSMCI->cmdr.flat = AT91C_GEN_CMD; break; /* Erase commands */ case CMD38: HSMCI->cmdr.flat = AT91C_ERASE_CMD; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } else if(state == STATE_SENDING) { switch(command_number) { case CMD7: HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD; break; case CMD12: HSMCI->cmdr.flat = AT91C_STOP_TRANSMISSION_CMD; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } else if(state == STATE_RECEIVING) { switch(command_number) { case CMD12: HSMCI->cmdr.flat = AT91C_STOP_TRANSMISSION_CMD; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } else if(state == STATE_PROGRAMMING) { switch(command_number) { case CMD7: HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } else if(state == STATE_DISCONNECT) { switch(command_number) { case CMD7: HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD; break; default: // Notice the return here rather than the break.... // We don't want to wait for an interrupt in this case, so just return return EINVAL; } } else return EINVAL; // if the command was valid, set the cmd_pending flag to TRUE // so we can't try and issue another commend in the process cmd_pending = TRUE; // Unmask the cmdrdy interrupt and turn on interrupts HSMCI->ier.bits.cmdrdy = 1; call HSMCIInterrupt.enable(); return SUCCESS; } // Handle events void handler() @spontaneous() { int i; // if(statusError() && (current_cmd != 40)) { // printf("CMD: %d\n", current_cmd); // printStatus(); // } // Disable interrupts while processing the response // They will be reenabled either below (in the case of a long read/write) // or when the next command comes in call HSMCIInterrupt.disable(); cmd_pending = FALSE; // Copy the response buffer so we can pass it back up // Note that the last 8 bits of the rspr as specified in the SD spec are cut off // i.e. the stop bit and the CRC are not included in what is read out of rspr //memcpy(rsp_buf_ptr, (void*)HSMCI->rspr, sizeof(rsp_buf)); for(i=3; i>=0; i--) rsp_buf_ptr[i] = HSMCI->rspr[0].flat; /* Card Power On */ if(state == STATE_OFF) { switch(current_cmd) { case CMD_PON: state = STATE_IDLE; call HplSam3uHsmci.sendCommand(CMD0, 0); return; default: // should never get here!! signal HplSam3uHsmci.initDone(0, EINVAL); return; } } /* Valid Commands from any state except STATE_OFF */ else if(current_cmd == CMD0) { state = STATE_IDLE; call HplSam3uHsmci.sendCommand(CMD8, ((uint32_t)(1<<8) | (0xAA))); return; } else if(current_cmd == CMD15) { state = STATE_INACTIVE; return; } /* Card Identification Mode */ else if(state == STATE_IDLE) { switch(current_cmd) { case CMD8: if(HSMCI->sr.bits.rtoe) { // response time out... // Implies either // 1) Voltage Mismatch for 2.0 or greater cards // 2) Version 1.x SD card // 3) Not an SD card // Send ACMD41 with HCS = 0 card_type = 1; call HplSam3uHsmci.sendCommand(ACMD41, AT91C_MMC_HOST_VOLTAGE_RANGE); } else { // Version 2.0 or later SD card hsmci_sd_r7_t* rsp = (hsmci_sd_r7_t*)rsp_buf_ptr; card_type = 2; // Check that the voltage range and check pattern are correct if((rsp->vrange == 1) && (rsp->cpattern == 0xAA)) { // Send ACMD41 with HCS = 1 call HplSam3uHsmci.sendCommand(ACMD41, (1 << 30) | AT91C_MMC_HOST_VOLTAGE_RANGE); } else { signal HplSam3uHsmci.initDone(0, FAIL); } } return; case ACMD41: call HplSam3uHsmci.sendCommand(acmd, acmd_arg); return; case ACMD41_REAL: if((card_type == 1) && HSMCI->sr.bits.rtoe) { // response time out... // Not an SD card signal HplSam3uHsmci.initDone(0, FAIL); } else { hsmci_sd_r3_t* rsp = (hsmci_sd_r3_t*)rsp_buf_ptr; if(!rsp->ocr.busy) { // If the card is busy // Resend ACMD41 with same argument as before call HplSam3uHsmci.sendCommand(ACMD41, (1 << 30) | AT91C_MMC_HOST_VOLTAGE_RANGE); } else { if(rsp->ocr.ccs) { // The card is high or extended capacity card_type = 3; } // Ignore check of of s18a and s18r becuase we know we set s18r=0 // Call CMD2 state = STATE_READY; call HplSam3uHsmci.sendCommand(CMD2, 0); } } return; default: // should never get here!! signal HplSam3uHsmci.initDone(0, EINVAL); return; } } else if(state == STATE_READY) { switch(current_cmd) { case CMD2: state = STATE_IDENTIFICATION; call HplSam3uHsmci.sendCommand(CMD3, 0); return; default: // should never get here!! signal HplSam3uHsmci.initDone(0, EINVAL); return; } } else if(state == STATE_IDENTIFICATION) { switch(current_cmd) { case CMD3: state = STATE_STANDBY; rca_addr = (((hsmci_sd_r6_t*)rsp_buf_ptr)->rca << 16); signal HplSam3uHsmci.initDone((hsmci_sd_r6_t*)rsp_buf_ptr, SUCCESS); return; default: // should never get here!! signal HplSam3uHsmci.initDone(0, EINVAL); return; } } /* Transfer Mode */ else if(state == STATE_STANDBY) { switch(current_cmd) { case CMD13: case CMD4: case CMD9: case CMD10: case CMD3: // State doesn't change break; case CMD7: state = STATE_TRANSFER; break; default: // Notice the return here rather than the break.... rsp_buf_ptr = sendCommandDone(EINVAL); return; } } else if(state == STATE_TRANSFER) { switch(current_cmd) { case CMD7: state = STATE_STANDBY; break; /* Configuration commands */ case ACMD6: case ACMD42: case ACMD23: call HplSam3uHsmci.sendCommand(acmd, acmd_arg); return; case ACMD6_REAL: case ACMD42_REAL: case ACMD23_REAL: current_cmd -= 1; //Notice order in the .h file case CMD13: case CMD16: case CMD32: case CMD33: // State doesn't change break; /* Read commands */ case ACMD13: case ACMD22: case ACMD51: call HplSam3uHsmci.sendCommand(acmd, acmd_arg); return; case ACMD13_REAL: case ACMD22_REAL: case ACMD51_REAL: current_cmd -= 1; //Notice order in the .h file case CMD6: case CMD17: case CMD18: case CMD56R: // Seems backwards, but is from perspective of card state = STATE_SENDING; HSMCI->ier.bits.rxrdy = 1; call HSMCIInterrupt.enable(); break; /* Write commands */ case CMD24: case CMD25: case CMD27: case CMD42: case CMD56W: // Seems backwards, but is from perspective of card state = STATE_RECEIVING; HSMCI->ier.bits.txrdy = 1; HSMCI->tdr.bits.data = (*trans_buf)[words_transferred]; call HSMCIInterrupt.enable(); break; /* Erase commands */ case CMD38: state = STATE_PROGRAMMING; break; default: // Notice the return here rather than the break.... rsp_buf_ptr = sendCommandDone(EINVAL); return; } } else if(state == STATE_SENDING) { switch(current_cmd) { case CMD7: words_transferred = 0; HSMCI->idr.bits.rxrdy = 1; state = STATE_STANDBY; signal HplSam3uHsmci.rxDone(ECANCEL); break; case CMD12: // Only called in the case of canceling words_transferred = 0; HSMCI->idr.bits.rxrdy = 1; state = STATE_TRANSFER; signal HplSam3uHsmci.rxDone(ECANCEL); return; case CMD17: // Double check we are really ready to receive while(!HSMCI->sr.bits.rxrdy); // Get the next word (*trans_buf)[words_transferred] = HSMCI->rdr.bits.data; words_transferred++; // Once we've gotten a whole block, we're done if(words_transferred == WORDS_PER_BLOCK) { words_transferred = 0; HSMCI->idr.bits.rxrdy = 1; while(!HSMCI->sr.bits.xfrdone); state = STATE_TRANSFER; signal HplSam3uHsmci.rxDone(SUCCESS); } else call HSMCIInterrupt.enable(); return; default: // Notice the return here rather than the break.... rsp_buf_ptr = sendCommandDone(EINVAL); return; } } else if(state == STATE_RECEIVING) { switch(current_cmd) { case CMD12: // Only called when canceling words_transferred = 0; HSMCI->idr.bits.txrdy = 1; state = STATE_PROGRAMMING; signal HplSam3uHsmci.txDone(ECANCEL); return; case CMD24: // Double check we are really ready to transmit while(!HSMCI->sr.bits.txrdy); words_transferred++; // Once we've transferred a whole block we are done if(words_transferred == WORDS_PER_BLOCK) { words_transferred = 0; HSMCI->idr.bits.txrdy = 1; state = STATE_PROGRAMMING; call HplSam3uHsmci.sendCommand(CMD13, 0); return; } HSMCI->tdr.bits.data = (*trans_buf)[words_transferred]; call HSMCIInterrupt.enable(); return; default: // Notice the return here rather than the break.... rsp_buf_ptr = sendCommandDone(EINVAL); return; } } else if(state == STATE_PROGRAMMING) { switch(current_cmd) { case CMD7: state = STATE_DISCONNECT; break; case CMD13: { hsmci_sd_r1_t *r1 = (hsmci_sd_r1_t*)rsp_buf_ptr; if((r1->status & STATUS_PRG) == STATUS_PRG) call HplSam3uHsmci.sendCommand(CMD13, 0); else { // Go back to the transfer state state = STATE_TRANSFER; // Double check that the whole transfer has completed // and signal that it is done. // These commands only valid if transfer just made // For now it is always the case // Eventually we will need to consider CMD20,28,29,38 though while(!HSMCI->sr.bits.xfrdone); signal HplSam3uHsmci.txDone(SUCCESS); } } return; default: // Notice the return here rather than the break.... rsp_buf_ptr = sendCommandDone(EINVAL); return; } } else if(state == STATE_DISCONNECT) { switch(current_cmd) { case CMD7: state = STATE_PROGRAMMING; break; case CMD13: { hsmci_sd_r1_t *r1 = (hsmci_sd_r1_t*)rsp_buf_ptr; if((r1->status & STATUS_DIS) == STATUS_DIS) call HplSam3uHsmci.sendCommand(CMD13, 0); } return; default: // Notice the return here rather than the break.... rsp_buf_ptr = sendCommandDone(EINVAL); return; } } else { rsp_buf_ptr = sendCommandDone(EINVAL); return; } // Do a buffer swap with the upper layer for the response buffer rsp_buf_ptr = sendCommandDone(SUCCESS); } __attribute__((interrupt)) void HsmciIrqHandler() @C() @spontaneous() { call HsmciInterruptWrapper.preamble(); handler(); call HsmciInterruptWrapper.postamble(); } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/SD.nc000066400000000000000000000056541207233610700225730ustar00rootroot00000000000000/* * Copyright (c) 2006, Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * Interface for communciating with an SD card via a standard sd card slot. * * @author Steve Ayer * @author Konrad Lorincz * @date May 2006 */ interface SD { /** * Returns the card size in bytes. * * @return the card size in bytes. */ command uint32_t readCardSize(); /** * Reads 512 bytes from the SD at sector and copies it to bufferPtr * * @param sector the sector on the SD card (in multiples of 512 bytes). * @param bufferPtr pointer to where the SD will copy the data to. Must be 512 bytes. * @return SUCCESS if it was read successfully; FAIL otherwise */ command error_t readBlock(const uint32_t sector, uint8_t * buffer); /** * Writes 512 bytes from the bufferPtr to the SD card * * @param sector the sector on the SD card (in multiples of 512 bytes * where to write the data to). * @param bufferPtr pointer to data to be added. Must be 512 bytes. * @return SUCCESS if it was written successfully; FAIL otherwise */ command error_t writeBlock(const uint32_t sector, uint8_t * buffer); /** * the device has control over the sd card */ async event void available(); /** * the device has lost control of the sd and should cease * attempts to talk to the card */ async event void unavailable(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/SDC.nc000066400000000000000000000041051207233610700226640ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SD Card Interface Configurations. * * @author Kevin Klues */ configuration SDC { provides { interface StdControl; interface SD; } } implementation { components SDP; components Sam3uHsmciC; StdControl = SDP; SD = SDP; enum { RESOURCE_ID = unique(SAM3U_HSMCI_RESOURCE) }; SDP.Sam3uHsmciInit -> Sam3uHsmciC; SDP.Resource -> Sam3uHsmciC.Resource[RESOURCE_ID]; SDP.Sam3uHsmci -> Sam3uHsmciC.Sam3uHsmci[RESOURCE_ID]; components LedsC; SDP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/SDP.nc000066400000000000000000000071631207233610700227100ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SD Card Interface Implementation * @author Kevin Klues */ module SDP { provides { interface StdControl; interface SD; } uses { interface Resource; interface Sam3uHsmciInit; interface Sam3uHsmci; interface Leds; } } implementation { norace int initialized = FALSE; norace volatile bool busy = FALSE; norace error_t trans_error; error_t init() { error_t error; busy = TRUE; error = call Sam3uHsmciInit.init(); if(error == SUCCESS) { while(busy); error = trans_error; signal SD.available(); } else { signal SD.unavailable(); busy = FALSE; } initialized = TRUE; return error; } command error_t StdControl.start() { error_t error = call Resource.immediateRequest(); if(!initialized) return ecombine(error, init()); return error; } command error_t StdControl.stop() { return call Resource.release(); } command uint32_t SD.readCardSize(){ return call Sam3uHsmci.readCardSize(); } command error_t SD.readBlock(uint32_t sector, uint8_t *buffer) { error_t error; if(busy) return EBUSY; busy = TRUE; error = call Sam3uHsmci.readBlock(sector, (uint32_t*)buffer); if(error == SUCCESS) { while(busy); error = trans_error; } else busy = FALSE; return error; } command error_t SD.writeBlock(uint32_t sector, uint8_t *buffer) { error_t error; if(busy) return EBUSY; busy = TRUE; error = call Sam3uHsmci.writeBlock(sector, (uint32_t*)buffer); if(error == SUCCESS) { while(busy); error = trans_error; } else busy = FALSE; return error; } async event void Sam3uHsmciInit.initDone(error_t error) { trans_error = error; busy = FALSE; } async event void Sam3uHsmci.readBlockDone(uint32_t *buf, error_t error) { trans_error = error; busy = FALSE; } async event void Sam3uHsmci.writeBlockDone(uint32_t *buf, error_t error) { trans_error = error; busy = FALSE; } event void Resource.granted() {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmci.nc000066400000000000000000000041121207233610700242250ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed Multimedia Card Interface definitions. * * @author JeongGil Ko * @author Kevin Klues */ interface Sam3uHsmci { async command uint64_t readCardSize(); async command error_t readBlock(uint32_t sector, uint32_t *buffer); async event void readBlockDone(uint32_t *buffer, error_t error); async command error_t writeBlock(uint32_t sector, uint32_t *buffer); async event void writeBlockDone(uint32_t *buffer, error_t error); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciC.nc000066400000000000000000000047021207233610700243350ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed Multimedia Card Interface Configurations. * * @author JeongGil Ko * @author Kevin Klues */ #include configuration Sam3uHsmciC { provides { interface Sam3uHsmciInit @exactlyonce(); interface Resource[uint8_t]; interface Sam3uHsmci[uint8_t]; } } implementation { components Sam3uHsmciP; Sam3uHsmciInit = Sam3uHsmciP; Sam3uHsmci = Sam3uHsmciP; components HplSam3uHsmciC; Sam3uHsmciP.HplSam3uHsmci -> HplSam3uHsmciC; Sam3uHsmciP.ArbiterInfo -> FcfsArbiterC; components new FcfsArbiterC(SAM3U_HSMCI_RESOURCE); components new AsyncStdControlPowerManagerC() as PM; Resource = FcfsArbiterC; PM.ResourceDefaultOwner -> FcfsArbiterC; PM.ArbiterInfo -> FcfsArbiterC; PM.AsyncStdControl -> HplSam3uHsmciC; components LedsC; Sam3uHsmciP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciInit.nc000066400000000000000000000034111207233610700250520ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed Multimedia Card Interface definitions. * * @author Kevin Klues */ interface Sam3uHsmciInit { command error_t init(); async event void initDone(error_t error); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciP.nc000066400000000000000000000136231207233610700243540ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed Multimedia Card Interface Implementations. * @author Kevin Klues */ #include "sam3uhsmcihardware.h" module Sam3uHsmciP { provides { interface Sam3uHsmciInit @exactlyonce(); interface Sam3uHsmci[uint8_t]; } uses { interface ArbiterInfo; interface HplSam3uHsmci; interface Leds; } } implementation { #define BYTES_PER_BLOCK 512 #define WORDS_PER_BLOCK ((BYTES_PER_BLOCK)/4) #define BLOCK_MULTIPLIER (card_type ? 1 : 512) #define CURRENT_OWNER (call ArbiterInfo.userId()) enum { SD_STANDARD_CAP, SD_HIGHEXT_CAP, }; enum { S_INACTIVE, S_IDLE, S_BUSY, }; // Protected by state variables norace uint8_t state = S_INACTIVE; norace uint32_t rca_addr; norace int card_type = SD_STANDARD_CAP; norace uint64_t card_size = 0; norace uint32_t *trans_buf; uint32_t computeV1CardSize(hsmci_sd_r2_t* rsp) { int i,j; uint64_t s = rsp->v1_csd.c_size + 1; for(i=2, j=rsp->v1_csd.c_size_mult + 2; j>1; j--) i <<= 1; s*=i; for(i=2, j=rsp->v1_csd.read_bl_len; j>1; j--) i <<= 1; s*=i; return s; } command error_t Sam3uHsmciInit.init() { if(state != S_INACTIVE) return EALREADY; return call HplSam3uHsmci.init(&trans_buf); } async event void HplSam3uHsmci.initDone(hsmci_sd_r6_t* rsp, error_t error) { if(error == SUCCESS) { rca_addr = rsp->rca << 16; call HplSam3uHsmci.sendCommand(CMD9, rca_addr); } else signal Sam3uHsmciInit.initDone(error); } async command uint64_t Sam3uHsmci.readCardSize[uint8_t id](){ if(state != S_INACTIVE) return card_size; return -1; } async event void* HplSam3uHsmci.sendCommandDone(uint8_t cmd, void* rsp, error_t error) { if(state == S_INACTIVE) { if(error == SUCCESS) { switch(cmd) { case CMD9: { hsmci_sd_r2_t *r2 = (hsmci_sd_r2_t*)rsp; card_type = r2->csd.csd_structure; if(card_type == SD_HIGHEXT_CAP) card_size = (r2->csd.c_size + 1)*BYTES_PER_BLOCK*1024; else card_size = computeV1CardSize(r2); call HplSam3uHsmci.sendCommand(CMD7, rca_addr); break; } case CMD7: call HplSam3uHsmci.sendCommand(ACMD6, SD_STAT_DATA_BUS_WIDTH_4BIT); break; case ACMD6: call HplSam3uHsmci.sendCommand(CMD16, BYTES_PER_BLOCK); break; case CMD16: state = S_IDLE; signal Sam3uHsmciInit.initDone(SUCCESS); break; default: //Should never get here!! } } else signal Sam3uHsmciInit.initDone(error); } else if(error != SUCCESS) { state = S_IDLE; switch(cmd) { case CMD17: signal Sam3uHsmci.readBlockDone[CURRENT_OWNER](trans_buf, error); break; case CMD24: signal Sam3uHsmci.writeBlockDone[CURRENT_OWNER](trans_buf, error); break; default: //Should never get here!! } } return rsp; } async command error_t Sam3uHsmci.readBlock[uint8_t id](uint32_t sector, uint32_t *buffer) { if(CURRENT_OWNER != id) return ERESERVE; if(state == S_IDLE) { error_t e; trans_buf = buffer; state = S_BUSY; e = call HplSam3uHsmci.sendCommand(CMD17, sector*BLOCK_MULTIPLIER); if(e != SUCCESS) state = S_IDLE; return e; } return EBUSY; } async command error_t Sam3uHsmci.writeBlock[uint8_t id](uint32_t sector, uint32_t *buffer) { if(CURRENT_OWNER != id) return ERESERVE; if(state == S_IDLE) { error_t e; trans_buf = buffer; state = S_BUSY; e = call HplSam3uHsmci.sendCommand(CMD24, sector*BLOCK_MULTIPLIER); if(e != SUCCESS) state = S_IDLE; return e; } return EBUSY; } async event void HplSam3uHsmci.txDone(error_t error) { state = S_IDLE; signal Sam3uHsmci.writeBlockDone[CURRENT_OWNER](trans_buf, error); } async event void HplSam3uHsmci.rxDone(error_t error) { state = S_IDLE; signal Sam3uHsmci.readBlockDone[CURRENT_OWNER](trans_buf, error); } async default event void Sam3uHsmci.writeBlockDone[uint8_t id](uint32_t *buf, error_t error) {} async default event void Sam3uHsmci.readBlockDone[uint8_t id](uint32_t *buf, error_t error) {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/hsmci/sam3uhsmcihardware.h000066400000000000000000001146601207233610700257040ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed Multimedia Card Interface register definitions. * * @author JeongGil Ko * @author Kevin Klues */ #ifndef _SAM3UHSMCIHARDWARE_H #define _SAM3UHSMCIHARDWARE_H // Resource definition #define SAM3U_HSMCI_RESOURCE "Sam3uHsmci.Resource" /** * HSMCI Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 880 */ typedef union { uint32_t flat; struct { uint8_t mcien : 1; uint8_t hsmcidis : 1; uint8_t pwsen : 1; uint8_t pwsdis : 1; uint8_t reserved0 : 3; uint8_t swrst : 1; uint8_t reserved1 : 8; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } hsmci_cr_t; /** * HSMCI Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 881 */ typedef union { uint32_t flat; struct { uint8_t clkdiv : 8; uint8_t pwsdiv : 3; uint8_t rdproof : 1; uint8_t wrproof : 1; uint8_t fbyte : 1; uint8_t padv : 1; uint8_t reserved0 : 1; uint16_t blklen : 16; } __attribute__((__packed__)) bits; } hsmci_mr_t; /** * HSMCI Data Timeout Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 883 */ typedef union { uint32_t flat; struct { uint8_t dtocyc : 4; uint8_t dtomul : 3; uint8_t reserved0 : 1; uint8_t reserved1 : 8; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } hsmci_dtor_t; /** * HSMCI SDCard/SDIO Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 884 */ typedef union { uint32_t flat; struct { uint8_t sdcsel : 2; uint8_t reserved0 : 4; uint8_t sdcbus : 2; uint8_t reserved1 : 8; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } hsmci_sdcr_t; /** * HSMCI Argument Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 885 */ typedef union { uint32_t flat; struct { uint32_t arg : 32; } __attribute__((__packed__)) bits; } hsmci_argr_t; /** * HSMCI Command Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 886 */ typedef union { uint32_t flat; struct { uint8_t cmdnb : 6; uint8_t rsptyp : 2; uint8_t spcmd : 3; uint8_t opdcmd : 1; uint8_t maxlat : 1; uint8_t reserved0 : 3; uint8_t trcmd : 2; uint8_t trdir : 1; uint8_t trtyp : 3; uint8_t reserved1 : 2; uint8_t iospcmd : 2; uint8_t atacs : 1; uint8_t boot_ack : 1; uint8_t reserved2 : 4; } __attribute__((__packed__)) bits; } hsmci_cmdr_t; /** * HSMCI Block Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 889 */ typedef union { uint32_t flat; struct { uint32_t bcnt : 16; uint32_t blklen : 16; } __attribute__((__packed__)) bits; } hsmci_blkr_t; /** * HSMCI Completion Signal Timeout Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 890 */ typedef union { uint32_t flat; struct { uint8_t cstocyc : 4; uint8_t cstomul : 3; uint8_t reserved0 : 1; uint8_t reserved1 : 8; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } hsmci_cstor_t; /** * HSMCI Response Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 891 */ typedef union { uint32_t flat; struct { uint32_t rsp : 32; } __attribute__((__packed__)) bits; } hsmci_rspr_t; /** * HSMCI Receive Data Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 892 */ typedef union { uint32_t flat; struct { uint32_t data : 32; } __attribute__((__packed__)) bits; } hsmci_rdr_t; /** * HSMCI Transmit Data Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 893 */ typedef union { uint32_t flat; struct { uint32_t data : 32; } __attribute__((__packed__)) bits; } hsmci_tdr_t; /** * HSMCI Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 894 */ typedef union { uint32_t flat; struct { uint8_t cmdrdy : 1; uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t blke : 1; uint8_t dtip : 1; uint8_t notbusy : 1; uint8_t reserved0 : 2; uint8_t mci_sdioirqa : 1; uint8_t reserved1 : 3; uint8_t sdiowait : 1; uint8_t csrcv : 1; uint8_t reserved2 : 2; uint8_t rinde : 1; uint8_t rdire : 1; uint8_t rcrce : 1; uint8_t rende : 1; uint8_t rtoe : 1; uint8_t dcrce : 1; uint8_t dtoe : 1; uint8_t cstoe : 1; uint8_t blkovre : 1; uint8_t dmadone : 1; uint8_t fifoempty : 1; uint8_t xfrdone : 1; uint8_t ackrcv : 1; uint8_t ackrcve : 1; uint8_t ovre : 1; uint8_t unre : 1; } __attribute__((__packed__)) bits; } hsmci_sr_t; /** * HSMCI Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 898 */ typedef union { uint32_t flat; struct { uint8_t cmdrdy : 1; uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t blke : 1; uint8_t dtip : 1; uint8_t notbusy : 1; uint8_t reserved0 : 2; uint8_t mci_sdioirqa : 1; uint8_t reserved1 : 3; uint8_t sdiowait : 1; uint8_t csrcv : 1; uint8_t reserved2 : 2; uint8_t rinde : 1; uint8_t rdire : 1; uint8_t rcrce : 1; uint8_t rende : 1; uint8_t rtoe : 1; uint8_t dcrce : 1; uint8_t dtoe : 1; uint8_t cstoe : 1; uint8_t blkovre : 1; uint8_t dmadone : 1; uint8_t fifoempty : 1; uint8_t xfrdone : 1; uint8_t ackrcv : 1; uint8_t ackrcve : 1; uint8_t ovre : 1; uint8_t unre : 1; } __attribute__((__packed__)) bits; } hsmci_ier_t; /** * HSMCI Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 900 */ typedef union { uint32_t flat; struct { uint8_t cmdrdy : 1; uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t blke : 1; uint8_t dtip : 1; uint8_t notbusy : 1; uint8_t reserved0 : 2; uint8_t mci_sdioirqa : 1; uint8_t reserved1 : 3; uint8_t sdiowait : 1; uint8_t csrcv : 1; uint8_t reserved2 : 2; uint8_t rinde : 1; uint8_t rdire : 1; uint8_t rcrce : 1; uint8_t rende : 1; uint8_t rtoe : 1; uint8_t dcrce : 1; uint8_t dtoe : 1; uint8_t cstoe : 1; uint8_t blkovre : 1; uint8_t dmadone : 1; uint8_t fifoempty : 1; uint8_t xfrdone : 1; uint8_t ackrcv : 1; uint8_t ackrcve : 1; uint8_t ovre : 1; uint8_t unre : 1; } __attribute__((__packed__)) bits; } hsmci_idr_t; /** * HSMCI Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 902 */ typedef union { uint32_t flat; struct { uint8_t cmdrdy : 1; uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t blke : 1; uint8_t dtip : 1; uint8_t notbusy : 1; uint8_t reserved0 : 2; uint8_t mci_sdioirqa : 1; uint8_t reserved1 : 3; uint8_t sdiowait : 1; uint8_t csrcv : 1; uint8_t reserved2 : 2; uint8_t rinde : 1; uint8_t rdire : 1; uint8_t rcrce : 1; uint8_t rende : 1; uint8_t rtoe : 1; uint8_t dcrce : 1; uint8_t dtoe : 1; uint8_t cstoe : 1; uint8_t blkovre : 1; uint8_t dmadone : 1; uint8_t fifoempty : 1; uint8_t xfrdone : 1; uint8_t ackrcv : 1; uint8_t ackrcve : 1; uint8_t ovre : 1; uint8_t unre : 1; } __attribute__((__packed__)) bits; } hsmci_imr_t; /** * HSMCI DMA Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 904 */ typedef union { uint32_t flat; struct { uint8_t offset : 2; uint8_t reserved0 : 2; uint8_t chksize : 1; uint8_t reserved1 : 3; uint8_t dmaen : 1; uint8_t reserved2 : 3; uint8_t ropt : 1; uint8_t reserved3 : 3; uint16_t reserved4 : 16; } __attribute__((__packed__)) bits; } hsmci_dma_t; /** * HSMCI Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 905 */ typedef union { uint32_t flat; struct { uint8_t fifomode : 1; uint8_t reserved0 : 3; uint8_t ferrctrl : 1; uint8_t reserved1 : 3; uint8_t hsmode : 1; uint8_t reserved2 : 3; uint8_t lsync : 1; uint8_t reserved3 : 3; uint16_t reserved4 : 16; } __attribute__((__packed__)) bits; } hsmci_cfg_t; /** * HSMCI Write Protection Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 906 */ typedef union { uint32_t flat; struct { uint8_t wp_en : 1; uint8_t reserved0 : 7; uint32_t wp_key : 24; } __attribute__((__packed__)) bits; } hsmci_wpmr_t; /** * HSMCI Write Protect Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 907 */ typedef union { uint32_t flat; struct { uint8_t wp_vs : 4; uint8_t reserved0 : 4; uint16_t wp_key : 16; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } hsmci_wpsr_t; /** * HSMCI FIFO Memory Aperture, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 908 */ typedef union { uint32_t flat; struct { uint32_t data : 32; } __attribute__((__packed__)) bits; } hsmci_fifo_t; /** * HSMCI Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 879 */ typedef struct hsmci { volatile hsmci_cr_t cr; // Control Register volatile hsmci_mr_t mr; // Mode Register volatile hsmci_dtor_t dtor; // Data Timeout Register volatile hsmci_sdcr_t sdcr; // SD/SDIO Card Register volatile hsmci_argr_t argr; // Argument Register volatile hsmci_cmdr_t cmdr; // Command Register volatile hsmci_blkr_t blkr; // Block Register volatile hsmci_cstor_t cstor; // Completion Signal Timeout Register volatile hsmci_rspr_t rspr[4]; // Response Registers volatile hsmci_rdr_t rdr; // Receive Data Register volatile hsmci_tdr_t tdr; // Transmit Data Register uint32_t reserved0[2]; // ***Reserved*** volatile hsmci_sr_t sr; // Status Register volatile hsmci_ier_t ier; // Interrupt Enable Register volatile hsmci_idr_t idr; // Interrupt Disable Register volatile hsmci_imr_t imr; // Interrupt Mask Register volatile hsmci_dma_t dma; // DMA Configuration Register volatile hsmci_cfg_t cfg; // Configuration Register uint32_t reserved1[3]; // ***Reserved*** volatile hsmci_wpmr_t wpmr; // Write Protection Mode Register volatile hsmci_wpsr_t wpsr; // Write Portection Status Register uint32_t reserved2[5]; // ***Reserved*** } hsmci_t; /** * Memory mapping for the HSMCI controller */ volatile hsmci_t* HSMCI = (volatile hsmci_t *) 0x40000000; volatile hsmci_fifo_t* hsmci_fifo = (volatile hsmci_fifo_t *) 0x40000200; enum { CMD_PON, CMD0, CMD2, CMD3, CMD4, CMD6, CMD7, CMD8, CMD9, CMD10, CMD12, CMD13, CMD15, CMD16, CMD17, CMD18, CMD19, CMD20, CMD24, CMD25, CMD26, CMD27, CMD28, CMD29, CMD30, CMD32, CMD33, CMD38, CMD42, CMD56R, CMD56W, ACMD6, ACMD6_REAL, ACMD13, ACMD13_REAL, ACMD22, ACMD22_REAL, ACMD23, ACMD23_REAL, ACMD41, ACMD41_REAL, ACMD42, ACMD42_REAL, ACMD51, ACMD51_REAL, }; #define AT91C_MCI_CMDNB (0x3F << 0) // (MCI) Command Number #define AT91C_MCI_RSPTYP (0x3 << 6) // (MCI) Response Type #define AT91C_MCI_RSPTYP_NO (0x0 << 6) // (MCI) No response #define AT91C_MCI_RSPTYP_48 (0x1 << 6) // (MCI) 48-bit response #define AT91C_MCI_RSPTYP_136 (0x2 << 6) // (MCI) 136-bit response #define AT91C_MCI_RSPTYP_R1B (0x3 << 6) // (MCI) R1b response #define AT91C_MCI_SPCMD (0x7 << 8) // (MCI) Special CMD #define AT91C_MCI_SPCMD_NONE (0x0 << 8) // (MCI) Not a special CMD #define AT91C_MCI_SPCMD_INIT (0x1 << 8) // (MCI) Initialization CMD #define AT91C_MCI_SPCMD_SYNC (0x2 << 8) // (MCI) Synchronized CMD #define AT91C_MCI_SPCMD_CE_ATA (0x3 << 8) // (MCI) CE-ATA Completion Signal disable CMD #define AT91C_MCI_SPCMD_IT_CMD (0x4 << 8) // (MCI) Interrupt command #define AT91C_MCI_SPCMD_IT_REP (0x5 << 8) // (MCI) Interrupt response #define AT91C_MCI_OPDCMD (0x1 << 11) // (MCI) Open Drain Command #define AT91C_MCI_OPDCMD_PUSHPULL (0x0 << 11) // (MCI) Push/pull command #define AT91C_MCI_OPDCMD_OPENDRAIN (0x1 << 11) // (MCI) Open drain command #define AT91C_MCI_MAXLAT (0x1 << 12) // (MCI) Maximum Latency for Command to respond #define AT91C_MCI_MAXLAT_5 (0x0 << 12) // (MCI) 5 cycles maximum latency #define AT91C_MCI_MAXLAT_64 (0x1 << 12) // (MCI) 64 cycles maximum latency #define AT91C_MCI_TRCMD (0x3 << 16) // (MCI) Transfer CMD #define AT91C_MCI_TRCMD_NO (0x0 << 16) // (MCI) No transfer #define AT91C_MCI_TRCMD_START (0x1 << 16) // (MCI) Start transfer #define AT91C_MCI_TRCMD_STOP (0x2 << 16) // (MCI) Stop transfer #define AT91C_MCI_TRDIR (0x1 << 18) // (MCI) Transfer Direction #define AT91C_MCI_TRDIR_WRITE (0x0 << 18) // (MCI) Write #define AT91C_MCI_TRDIR_READ (0x1 << 18) // (MCI) Read #define AT91C_MCI_TRTYP (0x7 << 19) // (MCI) Transfer Type #define AT91C_MCI_TRTYP_BLOCK (0x0 << 19) // (MCI) MMC/SDCard Single Block Transfer type #define AT91C_MCI_TRTYP_MULTIPLE (0x1 << 19) // (MCI) MMC/SDCard Multiple Block transfer type #define AT91C_MCI_TRTYP_STREAM (0x2 << 19) // (MCI) MMC Stream transfer type #define AT91C_MCI_TRTYP_SDIO_BYTE (0x4 << 19) // (MCI) SDIO Byte transfer type #define AT91C_MCI_TRTYP_SDIO_BLOCK (0x5 << 19) // (MCI) SDIO Block transfer type #define AT91C_MCI_IOSPCMD (0x3 << 24) // (MCI) SDIO Special Command #define AT91C_MCI_IOSPCMD_NONE (0x0 << 24) // (MCI) NOT a special command #define AT91C_MCI_IOSPCMD_SUSPEND (0x1 << 24) // (MCI) SDIO Suspend Command #define AT91C_MCI_IOSPCMD_RESUME (0x2 << 24) // (MCI) SDIO Resume Command #define AT91C_MCI_ATACS (0x1 << 26) // (MCI) ATA with command completion signal #define AT91C_MCI_ATACS_NORMAL (0x0 << 26) // (MCI) normal operation mode #define AT91C_MCI_ATACS_COMPLETION (0x1 << 26) // (MCI) completion //----------------------------------------------------------------------------- /// OCR Register //----------------------------------------------------------------------------- #define AT91C_VDD_16_17 (1 << 4) #define AT91C_VDD_17_18 (1 << 5) #define AT91C_VDD_18_19 (1 << 6) #define AT91C_VDD_19_20 (1 << 7) #define AT91C_VDD_20_21 (1 << 8) #define AT91C_VDD_21_22 (1 << 9) #define AT91C_VDD_22_23 (1 << 10) #define AT91C_VDD_23_24 (1 << 11) #define AT91C_VDD_24_25 (1 << 12) #define AT91C_VDD_25_26 (1 << 13) #define AT91C_VDD_26_27 (1 << 14) #define AT91C_VDD_27_28 (1 << 15) #define AT91C_VDD_28_29 (1 << 16) #define AT91C_VDD_29_30 (1 << 17) #define AT91C_VDD_30_31 (1 << 18) #define AT91C_VDD_31_32 (1 << 19) #define AT91C_VDD_32_33 (1 << 20) #define AT91C_VDD_33_34 (1 << 21) #define AT91C_VDD_34_35 (1 << 22) #define AT91C_VDD_35_36 (1 << 23) #define AT91C_CARD_POWER_UP_BUSY (1 << 31) #define AT91C_MMC_OCR_BIT2930 (3 << 29) #define AT91C_MMC_HOST_VOLTAGE_RANGE (AT91C_VDD_27_28 +\ AT91C_VDD_28_29 +\ AT91C_VDD_29_30 +\ AT91C_VDD_30_31 +\ AT91C_VDD_31_32 +\ AT91C_VDD_32_33) // Basic Commands (class 0) // // Cmd0 MCI + SPI #define AT91C_POWER_ON_INIT (0 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_INIT \ | AT91C_MCI_OPDCMD) #define AT91C_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE ) // Cmd1 SPI #define AT91C_MMC_SEND_OP_COND_CMD (1 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_OPDCMD) // Cmd2 MCI #define AT91C_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_136 ) // Cmd3 MCI #define AT91C_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) // Cmd4 MCI #define AT91C_SET_DSR_CMD (4 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_NO \ | AT91C_MCI_MAXLAT ) // Cmd6 SD/MMC #define AT91C_MMC_SWITCH_CMD (6 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) #define AT91C_SD_SWITCH_CMD (6 | AT91C_MCI_TRCMD_START \ | AT91C_MCI_TRTYP_BLOCK \ | AT91C_MCI_TRDIR_READ \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) // cmd7 MCI #define AT91C_SEL_DESEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) #define AT91C_SEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) #define AT91C_DESEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_NO \ | AT91C_MCI_MAXLAT ) // Cmd8 MCI + SPI #define AT91C_SEND_IF_COND (8 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) // Cmd9 MCI + SPI #define AT91C_SEND_CSD_CMD (9 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_136 \ | AT91C_MCI_MAXLAT ) // Cmd10 MCI + SPI #define AT91C_SEND_CID_CMD (10 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_136 \ | AT91C_MCI_MAXLAT ) // Cmd12 MCI + SPI #define AT91C_STOP_TRANSMISSION_CMD (12 | AT91C_MCI_TRCMD_STOP \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) // Cmd13 MCI + SPI #define AT91C_SEND_STATUS_CMD (13 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) // Cmd15 MCI #define AT91C_GO_INACTIVE_STATE_CMD (15 | AT91C_MCI_RSPTYP_NO ) // Cmd58 SPI #define AT91C_READ_OCR_CMD (58 | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_MAXLAT ) // Cmd59 SPI #define AT91C_CRC_ON_OFF_CMD (59 | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_MAXLAT ) //*------------------------------------------------ //* Class 2 commands: Block oriented Read commands //*------------------------------------------------ // Cmd8 for MMC #define AT91C_SEND_EXT_CSD_CMD (8 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_OPDCMD_PUSHPULL \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_START \ | AT91C_MCI_TRTYP_BLOCK \ | AT91C_MCI_TRDIR \ | AT91C_MCI_MAXLAT) // Cmd16 #define AT91C_SET_BLOCKLEN_CMD (16 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_MAXLAT ) // Cmd17 #define AT91C_READ_SINGLE_BLOCK_CMD (17 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_START \ | AT91C_MCI_TRTYP_BLOCK \ | AT91C_MCI_TRDIR \ | AT91C_MCI_MAXLAT) // Cmd18 #define AT91C_READ_MULTIPLE_BLOCK_CMD (18 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_START \ | AT91C_MCI_TRTYP_MULTIPLE \ | AT91C_MCI_TRDIR \ | AT91C_MCI_MAXLAT) //*------------------------------------------------ //* Class 4 commands: Block oriented write commands //*------------------------------------------------ // Cmd24 #define AT91C_WRITE_BLOCK_CMD (24 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_START \ | (AT91C_MCI_TRTYP_BLOCK \ & ~(AT91C_MCI_TRDIR)) \ | AT91C_MCI_MAXLAT) // Cmd25 #define AT91C_WRITE_MULTIPLE_BLOCK_CMD (25 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_START \ | (AT91C_MCI_TRTYP_MULTIPLE \ & ~(AT91C_MCI_TRDIR)) \ | AT91C_MCI_MAXLAT) // Cmd27 #define AT91C_PROGRAM_CSD_CMD (27 | AT91C_MCI_RSPTYP_48 ) //*---------------------------------------- //* Class 5 commands: Erase commands //*---------------------------------------- // Cmd32 #define AT91C_TAG_SECTOR_START_CMD (32 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) // Cmd33 #define AT91C_TAG_SECTOR_END_CMD (33 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) // Cmd38 #define AT91C_ERASE_CMD (38 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT ) //*---------------------------------------- //* Class 7 commands: Lock commands //*---------------------------------------- // Cmd42 #define AT91C_LOCK_UNLOCK (42 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) //*----------------------------------------------- // Class 8 commands: Application specific commands //*----------------------------------------------- // Cmd55 #define AT91C_APP_CMD (55 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) // Cmd56 #define AT91C_GEN_CMD (56 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) // ACMD6 #define AT91C_SD_SET_BUS_WIDTH_CMD (6 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) // ACMD13 #define AT91C_SD_STATUS_CMD (13 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_START \ | AT91C_MCI_TRTYP_BLOCK \ | AT91C_MCI_TRDIR_READ \ | AT91C_MCI_MAXLAT) // ACMD22 #define AT91C_SD_SEND_NUM_WR_BLOCKS_CMD (22 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) // ACMD23 #define AT91C_SD_SET_WR_BLK_ERASE_COUNT_CMD (23 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) // ACMD41 #define AT91C_SD_APP_OP_COND_CMD (41 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO ) // ACMD42 #define AT91C_SD_SET_CLR_CARD_DETECT_CMD (42 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_MAXLAT) // ACMD51 #define AT91C_SD_SEND_SCR_CMD (51 | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_TRCMD_START \ | AT91C_MCI_TRDIR_READ \ | AT91C_MCI_TRTYP_BLOCK \ | AT91C_MCI_MAXLAT) //*----------------------------------------------- // SDIO Commands //*----------------------------------------------- // CMD5, R4 #define AT91C_SDIO_SEND_OP_COND (5 | AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ | AT91C_MCI_RSPTYP_48 \ | AT91C_MCI_OPDCMD) // CMD52, R5 #define AT91C_SDIO_IO_RW_DIRECT (52| AT91C_MCI_TRCMD_NO \ | AT91C_MCI_SPCMD_NONE \ //*----------------------------------------------- // Constants //*----------------------------------------------- #define SD_STAT_DATA_BUS_WIDTH_4BIT 0x2 #define SD_STAT_DATA_BUS_WIDTH_1BIT 0x0 #define STATUS_APP_CMD (1 << 5) #define STATUS_SWITCH_ERROR (1 << 7) #define STATUS_READY_FOR_DATA (1 << 8) #define STATUS_IDLE (0 << 9) #define STATUS_READY (1 << 9) #define STATUS_IDENT (2 << 9) #define STATUS_STBY (3 << 9) #define STATUS_TRAN (4 << 9) #define STATUS_DATA (5 << 9) #define STATUS_RCV (6 << 9) #define STATUS_PRG (7 << 9) #define STATUS_DIS (8 << 9) #define STATUS_STATE (0xF << 9) #define STATUS_ERASE_RESET (1 << 13) #define STATUS_WP_ERASE_SKIP (1 << 15) #define STATUS_CIDCSD_OVERWRITE (1 << 16) #define STATUS_OVERRUN (1 << 17) #define STATUS_UNERRUN (1 << 18) #define STATUS_ERROR (1 << 19) #define STATUS_CC_ERROR (1 << 20) #define STATUS_CARD_ECC_FAILED (1 << 21) #define STATUS_ILLEGAL_COMMAND (1 << 22) #define STATUS_COM_CRC_ERROR (1 << 23) #define STATUS_UN_LOCK_FAILED (1 << 24) #define STATUS_CARD_IS_LOCKED (1 << 25) #define STATUS_WP_VIOLATION (1 << 26) #define STATUS_ERASE_PARAM (1 << 27) #define STATUS_ERASE_SEQ_ERROR (1 << 28) #define STATUS_BLOCK_LEN_ERROR (1 << 29) #define STATUS_ADDRESS_MISALIGN (1 << 30) #define STATUS_ADDR_OUT_OR_RANGE (1 << 31) #define STATUS_STOP ( STATUS_CARD_IS_LOCKED \ | STATUS_COM_CRC_ERROR \ | STATUS_ILLEGAL_COMMAND \ | STATUS_CC_ERROR \ | STATUS_ERROR \ | STATUS_STATE \ | STATUS_READY_FOR_DATA ) #define STATUS_WRITE ( STATUS_ADDR_OUT_OR_RANGE \ | STATUS_ADDRESS_MISALIGN \ | STATUS_BLOCK_LEN_ERROR \ | STATUS_WP_VIOLATION \ | STATUS_CARD_IS_LOCKED \ | STATUS_COM_CRC_ERROR \ | STATUS_ILLEGAL_COMMAND \ | STATUS_CC_ERROR \ | STATUS_ERROR \ | STATUS_ERASE_RESET \ | STATUS_STATE \ | STATUS_READY_FOR_DATA ) #define STATUS_READ ( STATUS_ADDR_OUT_OR_RANGE \ | STATUS_ADDRESS_MISALIGN \ | STATUS_BLOCK_LEN_ERROR \ | STATUS_CARD_IS_LOCKED \ | STATUS_COM_CRC_ERROR \ | STATUS_ILLEGAL_COMMAND \ | STATUS_CARD_ECC_FAILED \ | STATUS_CC_ERROR \ | STATUS_ERROR \ | STATUS_ERASE_RESET \ | STATUS_STATE \ | STATUS_READY_FOR_DATA ) #define STATUS_SD_SWITCH ( STATUS_ADDR_OUT_OR_RANGE \ | STATUS_CARD_IS_LOCKED \ | STATUS_COM_CRC_ERROR \ | STATUS_ILLEGAL_COMMAND \ | STATUS_CARD_ECC_FAILED \ | STATUS_CC_ERROR \ | STATUS_ERROR \ | STATUS_UNERRUN \ | STATUS_OVERRUN \ | STATUS_STATE) #define STATUS_MMC_SWITCH ( STATUS_CARD_IS_LOCKED \ | STATUS_COM_CRC_ERROR \ | STATUS_ILLEGAL_COMMAND \ | STATUS_CC_ERROR \ | STATUS_ERROR \ | STATUS_ERASE_RESET \ | STATUS_STATE \ | STATUS_READY_FOR_DATA \ | STATUS_SWITCH_ERROR ) //*----------------------------------------------- // Return Types //*----------------------------------------------- typedef struct hsmci_sd_r1 { uint32_t status : 32; uint32_t cmd_index : 6; } __attribute__((__packed__)) hsmci_sd_r1_t; typedef struct hsmci_sd_r2 { union { struct { uint32_t reserved0 : 1; uint32_t crc7 : 7; uint32_t mdt : 12; uint32_t reserved1 : 4; uint32_t psn : 32; uint32_t prv : 8; uint64_t pnm : 40; uint32_t oid : 16; uint32_t mid : 8; } __attribute__((__packed__)) cid; struct { uint32_t reserved6 : 1; uint32_t crc : 7; uint32_t reserved5 : 2; uint32_t file_format : 2; uint32_t tmp_write_protect : 1; uint32_t perm_write_protect : 1; uint32_t copy : 1; uint32_t file_format_grp : 1; uint32_t reserved4 : 5; uint32_t write_bl_partial : 1; uint32_t write_bl_len : 4; uint32_t r2w_factor : 3; uint32_t reserved3 : 2; uint32_t wp_grp_enable : 1; uint32_t wp_grp_size : 7; uint32_t sector_size : 7; uint32_t erase_blk_en : 1; uint32_t c_size_mult : 3; uint32_t vdd_w_curr_max : 3; uint32_t vdd_w_curr_min : 3; uint32_t vdd_r_curr_max : 3; uint32_t vdd_r_curr_min : 3; uint32_t c_size : 12; uint32_t reserved1 : 2; uint32_t dsr_imp : 1; uint32_t read_blk_misalign : 1; uint32_t write_blk_misalign : 1; uint32_t read_bl_partial : 1; uint32_t read_bl_len : 4; uint32_t ccc : 12; uint32_t tran_speed : 8; uint32_t nsac : 8; uint32_t taac : 8; uint32_t reserved0 : 6; uint32_t csd_structure : 2; } __attribute__((__packed__)) v1_csd; struct { uint32_t reserved6 : 1; uint32_t crc : 7; uint32_t reserved5 : 2; uint32_t file_format : 2; uint32_t tmp_write_protect : 1; uint32_t perm_write_protect : 1; uint32_t copy : 1; uint32_t file_format_grp : 1; uint32_t reserved4 : 5; uint32_t write_bl_partial : 1; uint32_t write_bl_len : 4; uint32_t r2w_factor : 3; uint32_t reserved3 : 2; uint32_t wp_grp_enable : 1; uint32_t wp_grp_size : 7; uint32_t sector_size : 7; uint32_t erase_blk_en : 1; uint32_t reserved2 : 1; uint32_t c_size : 22; uint32_t reserved1 : 6; uint32_t dsr_imp : 1; uint32_t read_blk_misalign : 1; uint32_t write_blk_misalign : 1; uint32_t read_bl_partial : 1; uint32_t read_bl_len : 4; uint32_t ccc : 12; uint32_t tran_speed : 8; uint32_t nsac : 8; uint32_t taac : 8; uint32_t reserved0 : 6; uint32_t csd_structure : 2; } __attribute__((__packed__)) csd; }; } hsmci_sd_r2_t; typedef struct hsmci_sd_r3 { struct { uint32_t reserved0 : 8; uint32_t ocr : 16; uint32_t s18a : 1; uint32_t reserved1 : 4; uint32_t reserved2 : 1; uint32_t ccs : 1; uint32_t busy : 1; } __attribute__((__packed__)) ocr; } hsmci_sd_r3_t; typedef struct hsmci_sd_r6 { uint32_t status : 16; uint32_t rca : 16; } __attribute__((__packed__)) hsmci_sd_r6_t; typedef struct hsmci_sd_r7 { uint32_t cpattern : 8; uint32_t vrange : 4; } __attribute__((__packed__)) hsmci_sd_r7_t; #endif // _SAM3UHSMCIHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/matrix/000077500000000000000000000000001207233610700221325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/matrix/sam3matrixhardware.h000066400000000000000000000101331207233610700261070ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Bus Matrix register definitions. * * @author Thomas Schmid */ #ifndef _SAM3UMATRIXHARDWARE_H #define _SAM3UMATRIXHARDWARE_H #include "matrixhardware.h" /** * Bus Matrix Register definitions, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 339 */ typedef struct matrix { volatile matrix_mcfg_t mcfg0; // master configuration register 0 volatile matrix_mcfg_t mcfg1; // master configuration register 1 volatile matrix_mcfg_t mcfg2; // master configuration register 2 volatile matrix_mcfg_t mcfg3; // master configuration register 3 volatile matrix_mcfg_t mcfg4; // master configuration register 4 uint32_t reserved0[10]; volatile matrix_scfg_t scfg0; // slave confgiruation register 0 volatile matrix_scfg_t scfg1; // slave confgiruation register 1 volatile matrix_scfg_t scfg2; // slave confgiruation register 2 volatile matrix_scfg_t scfg3; // slave confgiruation register 3 volatile matrix_scfg_t scfg4; // slave confgiruation register 4 volatile matrix_scfg_t scfg5; // slave confgiruation register 5 volatile matrix_scfg_t scfg6; // slave confgiruation register 6 volatile matrix_scfg_t scfg7; // slave confgiruation register 7 volatile matrix_scfg_t scfg8; // slave confgiruation register 8 volatile matrix_scfg_t scfg9; // slave confgiruation register 9 uint32_t reserved1[5]; volatile matrix_pras_t pras0; // priority register A for slave 0 uint32_t reserved2; volatile matrix_pras_t pras1; // priority register A for slave 0 uint32_t reserved3; volatile matrix_pras_t pras2; // priority register A for slave 0 uint32_t reserved4; volatile matrix_pras_t pras3; // priority register A for slave 0 uint32_t reserved5; volatile matrix_pras_t pras4; // priority register A for slave 0 uint32_t reserved6; volatile matrix_pras_t pras5; // priority register A for slave 0 uint32_t reserved7; volatile matrix_pras_t pras6; // priority register A for slave 0 uint32_t reserved8; volatile matrix_pras_t pras7; // priority register A for slave 0 uint32_t reserved9; volatile matrix_pras_t pras8; // priority register A for slave 0 uint32_t reserved10; volatile matrix_pras_t pras9; // priority register A for slave 0 uint32_t reserved11[12]; volatile matrix_mrcr_t mrcr; // master remap control register } matrix_t; /** * Memory mapping for the MATRIX */ volatile matrix_t* MATRIX = (volatile matrix_t*) 0x400E0200; // MATRIX Base Address #endif // _SAM3UMATRIXHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/mpu/000077500000000000000000000000001207233610700214275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpu.nc000066400000000000000000000040651207233610700240740ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to the SAM3U MPU. * * @author wanja@cs.fau.de */ #include "sam3umpuhardware.h" interface HplSam3uMpu { async command void enableMpu(); async command void disableMpu(); async command void enableMpuDuringHardFaults(); async command void disableMpuDuringHardFaults(); async command void enableDefaultBackgroundRegion(); async command void disableDefaultBackgroundRegion(); async command void deployRegion(mpu_rbar_t rbar, mpu_rasr_t rasr); async event void mpuFault(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuC.nc000066400000000000000000000036721207233610700242020ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author wanja@cs.fau.de */ configuration HplSam3uMpuC { provides interface HplSam3uMpu; } implementation { components HplSam3uMpuP; HplSam3uMpu = HplSam3uMpuP.HplSam3uMpu; components MainC; MainC.SoftwareInit -> HplSam3uMpuP.Init; components HplNVICC; HplSam3uMpuP.HplNVICCntl -> HplNVICC; components McuSleepC; HplSam3uMpuP.MpuInterruptWrapper -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuP.nc000066400000000000000000000067431207233610700242210ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author wanja@cs.fau.de */ #include "sam3umpuhardware.h" module HplSam3uMpuP { provides interface HplSam3uMpu; provides interface HplSam3uMpuStatus; provides interface Init; uses interface HplNVICCntl; uses interface FunctionWrapper as MpuInterruptWrapper; } implementation { command error_t Init.init() { call HplNVICCntl.enableMemoryProtectionFault(); return SUCCESS; } async command void HplSam3uMpu.enableMpu() { MPU_CTRL->bits.enable = 1; } async command void HplSam3uMpu.disableMpu() { MPU_CTRL->bits.enable = 0; } async command void HplSam3uMpu.enableMpuDuringHardFaults() { MPU_CTRL->bits.hfnmiena = 1; } async command void HplSam3uMpu.disableMpuDuringHardFaults() { MPU_CTRL->bits.hfnmiena = 0; } async command void HplSam3uMpu.enableDefaultBackgroundRegion() { MPU_CTRL->bits.privdefena = 1; } async command void HplSam3uMpu.disableDefaultBackgroundRegion() { MPU_CTRL->bits.privdefena = 0; } async command void HplSam3uMpu.deployRegion(mpu_rbar_t rbar, mpu_rasr_t rasr) { // write registers *MPU_RBAR = rbar; *MPU_RASR = rasr; } __attribute__((interrupt)) void MpuFaultHandler() @C() @spontaneous() { call MpuInterruptWrapper.preamble(); signal HplSam3uMpu.mpuFault(); call MpuInterruptWrapper.postamble(); } async command bool HplSam3uMpuStatus.isStackingFault() { return (MPU_MMFSR->bits.mstkerr == 0x1); } async command bool HplSam3uMpuStatus.isUnstackingFault() { return (MPU_MMFSR->bits.munstkerr == 0x1); } async command bool HplSam3uMpuStatus.isDataAccessFault() { return (MPU_MMFSR->bits.daccviol == 0x1); } async command bool HplSam3uMpuStatus.isInstructionAccessFault() { return (MPU_MMFSR->bits.iaccviol == 0x1); } async command bool HplSam3uMpuStatus.isValidFaultAddress() { return (MPU_MMFSR->bits.mmarvalid == 0x1); } async command void *HplSam3uMpuStatus.getFaultAddress() { return (void *) MPU_MMFAR->bits.address; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuSettings.nc000066400000000000000000000045531207233610700256170ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to the SAM3U MPU settings. * * @author wanja@cs.fau.de */ #include "sam3umpuhardware.h" interface HplSam3uMpuSettings { async command error_t getMpuSettings( uint8_t regionNumber, bool enable, void *baseAddress, uint32_t size, // in bytes (bug: 4 GB not possible with this interface) bool enableInstructionFetch, bool enableReadPrivileged, bool enableWritePrivileged, bool enableReadUnprivileged, bool enableWriteUnprivileged, bool cacheable, // should be turned off for periphery and sys control (definitive guide, p. 213) bool bufferable, // should be turned off for sys control to be strongly ordered (definitive guide, p. 213) uint8_t disabledSubregions, // bit = 1: subregion disabled mpu_rbar_t *rbar, // RBAR register value output mpu_rasr_t *rasr ); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuSettingsC.nc000066400000000000000000000115511207233610700257160ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author wanja@cs.fau.de */ #include "sam3umpuhardware.h" module HplSam3uMpuSettingsC { provides interface HplSam3uMpuSettings; } implementation { async command error_t HplSam3uMpuSettings.getMpuSettings( uint8_t regionNumber, bool enable, void *baseAddress, uint32_t size, // in bytes (bug: 4 GB not possible with this interface) bool enableInstructionFetch, bool enableReadPrivileged, bool enableWritePrivileged, bool enableReadUnprivileged, bool enableWriteUnprivileged, bool cacheable, // should be turned off for periphery and sys control (definitive guide, p. 213) bool bufferable, // should be turned off for sys control to be strongly ordered (definitive guide, p. 213) uint8_t disabledSubregions, // bit = 1: subregion disabled mpu_rbar_t *rbar_param, // RBAR register value output mpu_rasr_t *rasr_param ) { uint8_t sizeField = 0; // size encoded in 5 bits (definitive guide, p. 209) uint32_t sizeIter = size; uint8_t i = 0; mpu_rbar_t rbar; mpu_rasr_t rasr; if (regionNumber > 7) return FAIL; // size has to be greater or equal to 32 if (size < 32) return FAIL; // compute size encoding while (sizeIter != 0) { sizeIter = sizeIter >> 1; sizeField++; } sizeField -= 2; // 32 bytes has to equal b00100 (4) // size has to be power of 2 // compute size from power sizeIter = 2; // = sizeField of 0 for (i = 0; i < sizeField; i++) { sizeIter *= 2; } if (sizeIter != size) return FAIL; // check alignment of base address to size if ((((uint32_t) baseAddress) & (size - 1)) != 0) return FAIL; // program region rbar.flat = (uint32_t) baseAddress; rbar.bits.region = regionNumber; rbar.bits.valid = 1; // region field is valid rasr.flat = 0; rasr.bits.xn = (enableInstructionFetch == TRUE ? 0 : 1); // 1 = instruction fetch disabled rasr.bits.srd = disabledSubregions; rasr.bits.tex = 0; rasr.bits.s = 1; // shareable rasr.bits.c = (cacheable == TRUE ? 1 : 0); // 1 = cacheable rasr.bits.b = (bufferable == TRUE ? 1 : 0); // 1 = bufferable rasr.bits.size = sizeField; rasr.bits.enable = enable; // region enabled or disabled // access permissions (see definitive guide, p. 209) // impossible combinations return FAIL if (enableReadPrivileged == FALSE) { // SV no read -> SV no access, user no access rasr.bits.ap = 0x0; if (enableWritePrivileged == TRUE || enableReadUnprivileged == TRUE || enableWriteUnprivileged == TRUE) return FAIL; } else { // SV read if (enableWritePrivileged == FALSE) { // SV read-only if (enableWriteUnprivileged == TRUE) return FAIL; if (enableReadUnprivileged == FALSE) { // SV read-only, user no access rasr.bits.ap = 0x5; } else { // SV read-only, user read-only rasr.bits.ap = 0x6; } } else { // SV read/write if (enableReadUnprivileged == FALSE) { // SV read/write, user no read -> user no access if (enableWriteUnprivileged == TRUE) return FAIL; rasr.bits.ap = 0x1; } else { // SV read/write, user read if (enableWriteUnprivileged == FALSE) { // SV read/write, user read-only rasr.bits.ap = 0x2; } else { // SV read/write, user read/write rasr.bits.ap = 0x3; } } } } // output register values *rbar_param = rbar; *rasr_param = rasr; return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuStatus.nc000066400000000000000000000036601207233610700253000ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to the status of the SAM3U MPU. * * @author wanja@cs.fau.de */ interface HplSam3uMpuStatus { async command bool isStackingFault(); async command bool isUnstackingFault(); async command bool isDataAccessFault(); async command bool isInstructionAccessFault(); async command bool isValidFaultAddress(); async command void *getFaultAddress(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/mpu/sam3umpuhardware.h000066400000000000000000000144141207233610700250740ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Definitions specific to the SAM3U ARM Cortex-M3 memory protection unit. * * @author wanja@cs.fau.de */ #ifndef SAM3UMPUHARDWARE_H #define SAM3UMPUHARDWARE_H // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 211 typedef union { uint32_t flat; struct { uint8_t separate : 1; // support for unified or separate instruction and data memory maps, always unified on SAM3U uint8_t reserved0 : 7; uint8_t dregion : 8; // number of supported MPU data regions, always 8 on SAM3U uint8_t iregion : 8; // number of supported MPU instruction regions, always 0 on SAM3U uint8_t reserved1 : 8; } bits; } mpu_type_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 212 typedef union { uint32_t flat; struct { uint8_t enable : 1; // enables the MPU uint8_t hfnmiena : 1; // enables MPU operation during hard fault, NMI, and FAULTMASK handlers uint8_t privdefena : 1; // enables privileged access to default memory map uint8_t reserved0 : 5; uint8_t reserved1 : 8; uint8_t reserved2 : 8; uint8_t reserved3 : 8; } bits; } mpu_ctrl_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 214 typedef union { uint32_t flat; struct { uint8_t region : 8; // region referenced by RBAR and RASR registers uint8_t reserved0 : 8; uint8_t reserved1 : 8; uint8_t reserved2 : 8; } bits; } mpu_rnr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 215 typedef union { uint32_t flat; struct { uint8_t region : 4; // MPU region field uint8_t valid : 1; // MPU region number valid bit uint32_t addr : 27; // region base address field, depending on the region size in RASR! } bits; } mpu_rbar_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 216 typedef union { uint32_t flat; struct { uint8_t enable : 1; // region enable bit uint8_t size : 5; // size of the MPU protection region; minimum is 4 (32 B), maximum is 31 (4 GB) uint8_t reserved0 : 2; uint8_t srd : 8; // subregion disable bits; 0 = enabled, 1 = disabled uint8_t b : 1; // bufferable bit uint8_t c : 1; // cacheable bit uint8_t s : 1; // shareable bit uint8_t tex : 3; // type extension field uint8_t reserved1 : 2; uint8_t ap : 3; // access permission field uint8_t reserved2 : 1; uint8_t xn : 1; // instruction access disable bit; 0 = fetches enabled, 1 = fetches disabled uint8_t reserved3 : 3; } bits; } mpu_rasr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 195 typedef union { uint8_t flat; struct { uint8_t iaccviol : 1; // instruction fetch from location that does not permit execution uint8_t daccviol : 1; // load or store at location that does not permit that uint8_t reserved0 : 1; uint8_t munstkerr : 1; // unstack for an exception return caused access violation(s) uint8_t mstkerr : 1; // stacking for an exception entry caused access violation(s) uint8_t reserved1 : 2; uint8_t mmarvalid : 1; // MMAR holds a valid fault address } bits; } mpu_mmfsr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 201 typedef union { uint32_t flat; struct { uint32_t address : 32; // when MMARVALID in MMFSR is set to 1, this holds the address of the location that caused the fault } bits; } mpu_mmfar_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 210 volatile uint32_t* MPU_BASE = (volatile uint32_t *) 0xe000ed90; volatile mpu_type_t* MPU_TYPE = (volatile mpu_type_t *) 0xe000ed90; volatile mpu_ctrl_t* MPU_CTRL = (volatile mpu_ctrl_t *) 0xe000ed94; volatile mpu_rnr_t* MPU_RNR = (volatile mpu_rnr_t *) 0xe000ed98; volatile mpu_rbar_t* MPU_RBAR = (volatile mpu_rbar_t *) 0xe000ed9c; volatile mpu_rasr_t* MPU_RASR = (volatile mpu_rasr_t *) 0xe000eda0; volatile mpu_rbar_t* MPU_RBAR_A1 = (volatile mpu_rbar_t *) 0xe000eda4; volatile mpu_rasr_t* MPU_RASR_A1 = (volatile mpu_rasr_t *) 0xe000eda8; volatile mpu_rbar_t* MPU_RBAR_A2 = (volatile mpu_rbar_t *) 0xe000edac; volatile mpu_rasr_t* MPU_RASR_A2 = (volatile mpu_rasr_t *) 0xe000edb0; volatile mpu_rbar_t* MPU_RBAR_A3 = (volatile mpu_rbar_t *) 0xe000edb4; volatile mpu_rasr_t* MPU_RASR_A3 = (volatile mpu_rasr_t *) 0xe000edb8; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 194 volatile mpu_mmfsr_t* MPU_MMFSR = (volatile mpu_mmfsr_t *) 0xe000ed28; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 175 volatile mpu_mmfar_t* MPU_MMFAR = (volatile mpu_mmfar_t *) 0xe000ed34; #endif // SAM3UMPUHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/nvic/000077500000000000000000000000001207233610700215655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/nvic/HplNVICC.nc000066400000000000000000000151371207233610700234240ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ #include "sam3unvichardware.h" configuration HplNVICC { provides { interface HplNVICCntl; interface Init; interface HplNVICInterruptCntl as SUPCInterrupt; // SUPPLY CONTROLLER interface HplNVICInterruptCntl as RSTCInterrupt; // RESET CONTROLLER interface HplNVICInterruptCntl as RTCInterrupt; // REAL TIME CLOCK interface HplNVICInterruptCntl as RTTInterrupt; // REAL TIME TIMER interface HplNVICInterruptCntl as WDGInterrupt; // WATCHDOG TIMER interface HplNVICInterruptCntl as PMCInterrupt; interface HplNVICInterruptCntl as EFC0Interrupt; interface HplNVICInterruptCntl as EFC1Interrupt; interface HplNVICInterruptCntl as DBGUInterrupt; interface HplNVICInterruptCntl as HSMC4Interrupt; interface HplNVICInterruptCntl as PIOAInterrupt; // PARALLEL IO CONTROLLER A interface HplNVICInterruptCntl as PIOBInterrupt; // PARALLEL IO CONTROLLER B interface HplNVICInterruptCntl as PIOCInterrupt; // PARALLEL IO CONTROLLER C interface HplNVICInterruptCntl as US0Interrupt; // USART 0 interface HplNVICInterruptCntl as US1Interrupt; // USART 1 interface HplNVICInterruptCntl as US2Interrupt; // USART 2 interface HplNVICInterruptCntl as US3Interrupt; // USART 3 interface HplNVICInterruptCntl as MCI0Interrupt; // MULTIMEDIA CARD INTERFACE interface HplNVICInterruptCntl as TWI0Interrupt; interface HplNVICInterruptCntl as TWI1Interrupt; interface HplNVICInterruptCntl as SPI0Interrupt; // SERIAL PERIPHERAL INTERFACE interface HplNVICInterruptCntl as SSC0Interrupt; // SERIAL SYNCHRONOUS CONTROLLER 0 interface HplNVICInterruptCntl as TC0Interrupt; // TIMER COUNTER 0 interface HplNVICInterruptCntl as TC1Interrupt; // TIMER COUNTER 1 interface HplNVICInterruptCntl as TC2Interrupt; // TIMER COUNTER 2 interface HplNVICInterruptCntl as PWMCInterrupt; // PULSE WIDTH MODULATION CONTROLLER interface HplNVICInterruptCntl as ADC12BInterrupt; // 12-BIT ADC CONTROLLER interface HplNVICInterruptCntl as ADCInterrupt; // 10-BIT ADC CONTROLLER interface HplNVICInterruptCntl as HDMAInterrupt; interface HplNVICInterruptCntl as UDPHSInterrupt; // USB DEVICE HIGH SPEED } } implementation { components HplNVICCntlP, new HplNVICInterruptP(AT91C_ID_SUPC) as HSUPC, new HplNVICInterruptP(AT91C_ID_RSTC) as HRSTC, new HplNVICInterruptP(AT91C_ID_RTC) as HRTC, new HplNVICInterruptP(AT91C_ID_RTT) as HRTT, new HplNVICInterruptP(AT91C_ID_WDG) as HWDG, new HplNVICInterruptP(AT91C_ID_PMC) as HPMC, new HplNVICInterruptP(AT91C_ID_EFC0) as HEFC0, new HplNVICInterruptP(AT91C_ID_EFC1) as HEFC1, new HplNVICInterruptP(AT91C_ID_DBGU) as HDBGU, new HplNVICInterruptP(AT91C_ID_HSMC4) as HHSMC4, new HplNVICInterruptP(AT91C_ID_PIOA) as HPIOA, new HplNVICInterruptP(AT91C_ID_PIOB) as HPIOB, new HplNVICInterruptP(AT91C_ID_PIOC) as HPIOC, new HplNVICInterruptP(AT91C_ID_US0) as HUS0, new HplNVICInterruptP(AT91C_ID_US1) as HUS1, new HplNVICInterruptP(AT91C_ID_US2) as HUS2, new HplNVICInterruptP(AT91C_ID_US3) as HUS3, new HplNVICInterruptP(AT91C_ID_MCI0) as HMCI0, new HplNVICInterruptP(AT91C_ID_TWI0) as HTWI0, new HplNVICInterruptP(AT91C_ID_TWI1) as HTWI1, new HplNVICInterruptP(AT91C_ID_SPI0) as HSPI0, new HplNVICInterruptP(AT91C_ID_SSC0) as HSSC0, new HplNVICInterruptP(AT91C_ID_TC0) as HTC0, new HplNVICInterruptP(AT91C_ID_TC1) as HTC1, new HplNVICInterruptP(AT91C_ID_TC2) as HTC2, new HplNVICInterruptP(AT91C_ID_PWMC) as HPWMC, new HplNVICInterruptP(AT91C_ID_ADC12B) as HADC12B, new HplNVICInterruptP(AT91C_ID_ADC) as HADC, new HplNVICInterruptP(AT91C_ID_HDMA) as HHDMA, new HplNVICInterruptP(AT91C_ID_UDPHS) as HUDPHS; HplNVICCntl = HplNVICCntlP; Init = HplNVICCntlP; SUPCInterrupt = HSUPC.Cntl; RSTCInterrupt = HRSTC.Cntl; RTCInterrupt = HRTC.Cntl; RTTInterrupt = HRTT.Cntl; WDGInterrupt = HWDG.Cntl; PMCInterrupt = HPMC.Cntl; EFC0Interrupt = HEFC0.Cntl; EFC1Interrupt = HEFC1.Cntl; DBGUInterrupt = HDBGU.Cntl; HSMC4Interrupt = HHSMC4.Cntl; PIOAInterrupt = HPIOA.Cntl; PIOBInterrupt = HPIOB.Cntl; PIOCInterrupt = HPIOC.Cntl; US0Interrupt = HUS0.Cntl; US1Interrupt = HUS1.Cntl; US2Interrupt = HUS2.Cntl; US3Interrupt = HUS3.Cntl; MCI0Interrupt = HMCI0.Cntl; TWI0Interrupt = HTWI0.Cntl; TWI1Interrupt = HTWI1.Cntl; SPI0Interrupt = HSPI0.Cntl; SSC0Interrupt = HSSC0.Cntl; TC0Interrupt = HTC0.Cntl; TC1Interrupt = HTC1.Cntl; TC2Interrupt = HTC2.Cntl; PWMCInterrupt = HPWMC.Cntl; ADC12BInterrupt = HADC12B.Cntl; ADCInterrupt = HADC.Cntl; HDMAInterrupt = HHDMA.Cntl; UDPHSInterrupt = HUDPHS.Cntl; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/nvic/sam3unvichardware.h000066400000000000000000000111371207233610700253670ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ #ifndef SAM3UNVICHARDWARE_H #define SAM3UNVICHARDWARE_H #include "nvichardware.h" #include "sam3uhardware.h" /// Interrupt sources typedef enum irqn { /****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ /****** AT91SAM3U4 specific Interrupt Numbers *********************************************************/ IROn_SUPC = AT91C_ID_SUPC , // SUPPLY CONTROLLER IROn_RSTC = AT91C_ID_RSTC , // RESET CONTROLLER IROn_RTC = AT91C_ID_RTC , // REAL TIME CLOCK IROn_RTT = AT91C_ID_RTT , // REAL TIME TIMER IROn_WDG = AT91C_ID_WDG , // WATCHDOG TIMER IROn_PMC = AT91C_ID_PMC , // PMC IROn_EFC0 = AT91C_ID_EFC0 , // EFC0 IROn_EFC1 = AT91C_ID_EFC1 , // EFC1 IROn_DBGU = AT91C_ID_DBGU , // DBGU IROn_HSMC4 = AT91C_ID_HSMC4, // HSMC4 IROn_PIOA = AT91C_ID_PIOA , // Parallel IO Controller A IROn_PIOB = AT91C_ID_PIOB , // Parallel IO Controller B IROn_PIOC = AT91C_ID_PIOC , // Parallel IO Controller C IROn_US0 = AT91C_ID_US0 , // USART 0 IROn_US1 = AT91C_ID_US1 , // USART 1 IROn_US2 = AT91C_ID_US2 , // USART 2 IROn_US3 = AT91C_ID_US3 , // USART 3 IROn_MCI0 = AT91C_ID_MCI0 , // Multimedia Card Interface IROn_TWI0 = AT91C_ID_TWI0 , // TWI 0 IROn_TWI1 = AT91C_ID_TWI1 , // TWI 1 IROn_SPI0 = AT91C_ID_SPI0 , // Serial Peripheral Interface IROn_SSC0 = AT91C_ID_SSC0 , // Serial Synchronous Controller 0 IROn_TC0 = AT91C_ID_TC0 , // Timer Counter 0 IROn_TC1 = AT91C_ID_TC1 , // Timer Counter 1 IROn_TC2 = AT91C_ID_TC2 , // Timer Counter 2 IROn_PWMC = AT91C_ID_PWMC , // Pulse Width Modulation Controller IROn_ADCC0 = AT91C_ID_ADC12B, // ADC controller0 IROn_ADCC1 = AT91C_ID_ADC, // ADC controller1 IROn_HDMA = AT91C_ID_HDMA , // HDMA IROn_UDPHS = AT91C_ID_UDPHS // USB Device High Speed } irqn_t; #endif // SAM3UNVICHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/pdc/000077500000000000000000000000001207233610700213745ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/pdc/HplSam3uPdcC.nc000066400000000000000000000057041207233610700241120ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ configuration HplSam3uPdcC { provides interface HplSam3Pdc as UartPdcControl; provides interface HplSam3Pdc as Usart0PdcControl; provides interface HplSam3Pdc as Usart1PdcControl; provides interface HplSam3Pdc as Usart2PdcControl; provides interface HplSam3Pdc as Usart3PdcControl; provides interface HplSam3Pdc as Twi0PdcControl; provides interface HplSam3Pdc as Twi1PdcControl; provides interface HplSam3Pdc as PwmPdcControl; } implementation { enum { UART_BASE = 0x400E0600, USART0_BASE = 0x40090000, USART1_BASE = 0x40094000, USART2_BASE = 0x40098000, USART3_BASE = 0x4009C000, TWI0_BASE = 0x40084000, TWI1_BASE = 0x40088000, PWM_BASE = 0x4008C000 }; components new HplSam3PdcP(UART_BASE) as UartPdc; components new HplSam3PdcP(USART0_BASE) as Usart0Pdc; components new HplSam3PdcP(USART1_BASE) as Usart1Pdc; components new HplSam3PdcP(USART2_BASE) as Usart2Pdc; components new HplSam3PdcP(USART3_BASE) as Usart3Pdc; components new HplSam3PdcP(TWI0_BASE) as Twi0Pdc; components new HplSam3PdcP(TWI1_BASE) as Twi1Pdc; components new HplSam3PdcP(PWM_BASE) as PwmPdc; UartPdcControl = UartPdc; Usart0PdcControl = Usart0Pdc; Usart1PdcControl = Usart1Pdc; Usart2PdcControl = Usart2Pdc; Usart3PdcControl = Usart3Pdc; Twi0PdcControl = Twi0Pdc; Twi1PdcControl = Twi1Pdc; PwmPdcControl = PwmPdc; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/pins/000077500000000000000000000000001207233610700215775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/pins/HplSam3uGeneralIOC.nc000066400000000000000000000740301207233610700254120ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * General-purpose I/O abstraction for the SAM3U. * Includes PIO controllers A, B, C with 32 pins each. * * @author Wanja Hofer */ configuration HplSam3uGeneralIOC { provides { interface GeneralIO as PioA0; interface GeneralIO as PioA1; interface GeneralIO as PioA2; interface GeneralIO as PioA3; interface GeneralIO as PioA4; interface GeneralIO as PioA5; interface GeneralIO as PioA6; interface GeneralIO as PioA7; interface GeneralIO as PioA8; interface GeneralIO as PioA9; interface GeneralIO as PioA10; interface GeneralIO as PioA11; interface GeneralIO as PioA12; interface GeneralIO as PioA13; interface GeneralIO as PioA14; interface GeneralIO as PioA15; interface GeneralIO as PioA16; interface GeneralIO as PioA17; interface GeneralIO as PioA18; interface GeneralIO as PioA19; interface GeneralIO as PioA20; interface GeneralIO as PioA21; interface GeneralIO as PioA22; interface GeneralIO as PioA23; interface GeneralIO as PioA24; interface GeneralIO as PioA25; interface GeneralIO as PioA26; interface GeneralIO as PioA27; interface GeneralIO as PioA28; interface GeneralIO as PioA29; interface GeneralIO as PioA30; interface GeneralIO as PioA31; interface GeneralIO as PioB0; interface GeneralIO as PioB1; interface GeneralIO as PioB2; interface GeneralIO as PioB3; interface GeneralIO as PioB4; interface GeneralIO as PioB5; interface GeneralIO as PioB6; interface GeneralIO as PioB7; interface GeneralIO as PioB8; interface GeneralIO as PioB9; interface GeneralIO as PioB10; interface GeneralIO as PioB11; interface GeneralIO as PioB12; interface GeneralIO as PioB13; interface GeneralIO as PioB14; interface GeneralIO as PioB15; interface GeneralIO as PioB16; interface GeneralIO as PioB17; interface GeneralIO as PioB18; interface GeneralIO as PioB19; interface GeneralIO as PioB20; interface GeneralIO as PioB21; interface GeneralIO as PioB22; interface GeneralIO as PioB23; interface GeneralIO as PioB24; interface GeneralIO as PioB25; interface GeneralIO as PioB26; interface GeneralIO as PioB27; interface GeneralIO as PioB28; interface GeneralIO as PioB29; interface GeneralIO as PioB30; interface GeneralIO as PioB31; interface GeneralIO as PioC0; interface GeneralIO as PioC1; interface GeneralIO as PioC2; interface GeneralIO as PioC3; interface GeneralIO as PioC4; interface GeneralIO as PioC5; interface GeneralIO as PioC6; interface GeneralIO as PioC7; interface GeneralIO as PioC8; interface GeneralIO as PioC9; interface GeneralIO as PioC10; interface GeneralIO as PioC11; interface GeneralIO as PioC12; interface GeneralIO as PioC13; interface GeneralIO as PioC14; interface GeneralIO as PioC15; interface GeneralIO as PioC16; interface GeneralIO as PioC17; interface GeneralIO as PioC18; interface GeneralIO as PioC19; interface GeneralIO as PioC20; interface GeneralIO as PioC21; interface GeneralIO as PioC22; interface GeneralIO as PioC23; interface GeneralIO as PioC24; interface GeneralIO as PioC25; interface GeneralIO as PioC26; interface GeneralIO as PioC27; interface GeneralIO as PioC28; interface GeneralIO as PioC29; interface GeneralIO as PioC30; interface GeneralIO as PioC31; interface GpioInterrupt as InterruptPioA0; interface GpioInterrupt as InterruptPioA1; interface GpioInterrupt as InterruptPioA2; interface GpioInterrupt as InterruptPioA3; interface GpioInterrupt as InterruptPioA4; interface GpioInterrupt as InterruptPioA5; interface GpioInterrupt as InterruptPioA6; interface GpioInterrupt as InterruptPioA7; interface GpioInterrupt as InterruptPioA8; interface GpioInterrupt as InterruptPioA9; interface GpioInterrupt as InterruptPioA10; interface GpioInterrupt as InterruptPioA11; interface GpioInterrupt as InterruptPioA12; interface GpioInterrupt as InterruptPioA13; interface GpioInterrupt as InterruptPioA14; interface GpioInterrupt as InterruptPioA15; interface GpioInterrupt as InterruptPioA16; interface GpioInterrupt as InterruptPioA17; interface GpioInterrupt as InterruptPioA18; interface GpioInterrupt as InterruptPioA19; interface GpioInterrupt as InterruptPioA20; interface GpioInterrupt as InterruptPioA21; interface GpioInterrupt as InterruptPioA22; interface GpioInterrupt as InterruptPioA23; interface GpioInterrupt as InterruptPioA24; interface GpioInterrupt as InterruptPioA25; interface GpioInterrupt as InterruptPioA26; interface GpioInterrupt as InterruptPioA27; interface GpioInterrupt as InterruptPioA28; interface GpioInterrupt as InterruptPioA29; interface GpioInterrupt as InterruptPioA30; interface GpioInterrupt as InterruptPioA31; interface GpioInterrupt as InterruptPioB0; interface GpioInterrupt as InterruptPioB1; interface GpioInterrupt as InterruptPioB2; interface GpioInterrupt as InterruptPioB3; interface GpioInterrupt as InterruptPioB4; interface GpioInterrupt as InterruptPioB5; interface GpioInterrupt as InterruptPioB6; interface GpioInterrupt as InterruptPioB7; interface GpioInterrupt as InterruptPioB8; interface GpioInterrupt as InterruptPioB9; interface GpioInterrupt as InterruptPioB10; interface GpioInterrupt as InterruptPioB11; interface GpioInterrupt as InterruptPioB12; interface GpioInterrupt as InterruptPioB13; interface GpioInterrupt as InterruptPioB14; interface GpioInterrupt as InterruptPioB15; interface GpioInterrupt as InterruptPioB16; interface GpioInterrupt as InterruptPioB17; interface GpioInterrupt as InterruptPioB18; interface GpioInterrupt as InterruptPioB19; interface GpioInterrupt as InterruptPioB20; interface GpioInterrupt as InterruptPioB21; interface GpioInterrupt as InterruptPioB22; interface GpioInterrupt as InterruptPioB23; interface GpioInterrupt as InterruptPioB24; interface GpioInterrupt as InterruptPioB25; interface GpioInterrupt as InterruptPioB26; interface GpioInterrupt as InterruptPioB27; interface GpioInterrupt as InterruptPioB28; interface GpioInterrupt as InterruptPioB29; interface GpioInterrupt as InterruptPioB30; interface GpioInterrupt as InterruptPioB31; interface GpioInterrupt as InterruptPioC0; interface GpioInterrupt as InterruptPioC1; interface GpioInterrupt as InterruptPioC2; interface GpioInterrupt as InterruptPioC3; interface GpioInterrupt as InterruptPioC4; interface GpioInterrupt as InterruptPioC5; interface GpioInterrupt as InterruptPioC6; interface GpioInterrupt as InterruptPioC7; interface GpioInterrupt as InterruptPioC8; interface GpioInterrupt as InterruptPioC9; interface GpioInterrupt as InterruptPioC10; interface GpioInterrupt as InterruptPioC11; interface GpioInterrupt as InterruptPioC12; interface GpioInterrupt as InterruptPioC13; interface GpioInterrupt as InterruptPioC14; interface GpioInterrupt as InterruptPioC15; interface GpioInterrupt as InterruptPioC16; interface GpioInterrupt as InterruptPioC17; interface GpioInterrupt as InterruptPioC18; interface GpioInterrupt as InterruptPioC19; interface GpioInterrupt as InterruptPioC20; interface GpioInterrupt as InterruptPioC21; interface GpioInterrupt as InterruptPioC22; interface GpioInterrupt as InterruptPioC23; interface GpioInterrupt as InterruptPioC24; interface GpioInterrupt as InterruptPioC25; interface GpioInterrupt as InterruptPioC26; interface GpioInterrupt as InterruptPioC27; interface GpioInterrupt as InterruptPioC28; interface GpioInterrupt as InterruptPioC29; interface GpioInterrupt as InterruptPioC30; interface GpioInterrupt as InterruptPioC31; interface GpioCapture as CapturePioA0; interface GpioCapture as CapturePioA1; interface GpioCapture as CapturePioA2; interface GpioCapture as CapturePioA3; interface GpioCapture as CapturePioA4; interface GpioCapture as CapturePioA5; interface GpioCapture as CapturePioA6; interface GpioCapture as CapturePioA7; interface GpioCapture as CapturePioA8; interface GpioCapture as CapturePioA9; interface GpioCapture as CapturePioA10; interface GpioCapture as CapturePioA11; interface GpioCapture as CapturePioA12; interface GpioCapture as CapturePioA13; interface GpioCapture as CapturePioA14; interface GpioCapture as CapturePioA15; interface GpioCapture as CapturePioA16; interface GpioCapture as CapturePioA17; interface GpioCapture as CapturePioA18; interface GpioCapture as CapturePioA19; interface GpioCapture as CapturePioA20; interface GpioCapture as CapturePioA21; interface GpioCapture as CapturePioA22; interface GpioCapture as CapturePioA23; interface GpioCapture as CapturePioA24; interface GpioCapture as CapturePioA25; interface GpioCapture as CapturePioA26; interface GpioCapture as CapturePioA27; interface GpioCapture as CapturePioA28; interface GpioCapture as CapturePioA29; interface GpioCapture as CapturePioA30; interface GpioCapture as CapturePioA31; interface GpioCapture as CapturePioB0; interface GpioCapture as CapturePioB1; interface GpioCapture as CapturePioB2; interface GpioCapture as CapturePioB3; interface GpioCapture as CapturePioB4; interface GpioCapture as CapturePioB5; interface GpioCapture as CapturePioB6; interface GpioCapture as CapturePioB7; interface GpioCapture as CapturePioB8; interface GpioCapture as CapturePioB9; interface GpioCapture as CapturePioB10; interface GpioCapture as CapturePioB11; interface GpioCapture as CapturePioB12; interface GpioCapture as CapturePioB13; interface GpioCapture as CapturePioB14; interface GpioCapture as CapturePioB15; interface GpioCapture as CapturePioB16; interface GpioCapture as CapturePioB17; interface GpioCapture as CapturePioB18; interface GpioCapture as CapturePioB19; interface GpioCapture as CapturePioB20; interface GpioCapture as CapturePioB21; interface GpioCapture as CapturePioB22; interface GpioCapture as CapturePioB23; interface GpioCapture as CapturePioB24; interface GpioCapture as CapturePioB25; interface GpioCapture as CapturePioB26; interface GpioCapture as CapturePioB27; interface GpioCapture as CapturePioB28; interface GpioCapture as CapturePioB29; interface GpioCapture as CapturePioB30; interface GpioCapture as CapturePioB31; interface GpioCapture as CapturePioC0; interface GpioCapture as CapturePioC1; interface GpioCapture as CapturePioC2; interface GpioCapture as CapturePioC3; interface GpioCapture as CapturePioC4; interface GpioCapture as CapturePioC5; interface GpioCapture as CapturePioC6; interface GpioCapture as CapturePioC7; interface GpioCapture as CapturePioC8; interface GpioCapture as CapturePioC9; interface GpioCapture as CapturePioC10; interface GpioCapture as CapturePioC11; interface GpioCapture as CapturePioC12; interface GpioCapture as CapturePioC13; interface GpioCapture as CapturePioC14; interface GpioCapture as CapturePioC15; interface GpioCapture as CapturePioC16; interface GpioCapture as CapturePioC17; interface GpioCapture as CapturePioC18; interface GpioCapture as CapturePioC19; interface GpioCapture as CapturePioC20; interface GpioCapture as CapturePioC21; interface GpioCapture as CapturePioC22; interface GpioCapture as CapturePioC23; interface GpioCapture as CapturePioC24; interface GpioCapture as CapturePioC25; interface GpioCapture as CapturePioC26; interface GpioCapture as CapturePioC27; interface GpioCapture as CapturePioC28; interface GpioCapture as CapturePioC29; interface GpioCapture as CapturePioC30; interface GpioCapture as CapturePioC31; interface HplSam3GeneralIOPin as HplPioA0; interface HplSam3GeneralIOPin as HplPioA1; interface HplSam3GeneralIOPin as HplPioA2; interface HplSam3GeneralIOPin as HplPioA3; interface HplSam3GeneralIOPin as HplPioA4; interface HplSam3GeneralIOPin as HplPioA5; interface HplSam3GeneralIOPin as HplPioA6; interface HplSam3GeneralIOPin as HplPioA7; interface HplSam3GeneralIOPin as HplPioA8; interface HplSam3GeneralIOPin as HplPioA9; interface HplSam3GeneralIOPin as HplPioA10; interface HplSam3GeneralIOPin as HplPioA11; interface HplSam3GeneralIOPin as HplPioA12; interface HplSam3GeneralIOPin as HplPioA13; interface HplSam3GeneralIOPin as HplPioA14; interface HplSam3GeneralIOPin as HplPioA15; interface HplSam3GeneralIOPin as HplPioA16; interface HplSam3GeneralIOPin as HplPioA17; interface HplSam3GeneralIOPin as HplPioA18; interface HplSam3GeneralIOPin as HplPioA19; interface HplSam3GeneralIOPin as HplPioA20; interface HplSam3GeneralIOPin as HplPioA21; interface HplSam3GeneralIOPin as HplPioA22; interface HplSam3GeneralIOPin as HplPioA23; interface HplSam3GeneralIOPin as HplPioA24; interface HplSam3GeneralIOPin as HplPioA25; interface HplSam3GeneralIOPin as HplPioA26; interface HplSam3GeneralIOPin as HplPioA27; interface HplSam3GeneralIOPin as HplPioA28; interface HplSam3GeneralIOPin as HplPioA29; interface HplSam3GeneralIOPin as HplPioA30; interface HplSam3GeneralIOPin as HplPioA31; interface HplSam3GeneralIOPin as HplPioB0; interface HplSam3GeneralIOPin as HplPioB1; interface HplSam3GeneralIOPin as HplPioB2; interface HplSam3GeneralIOPin as HplPioB3; interface HplSam3GeneralIOPin as HplPioB4; interface HplSam3GeneralIOPin as HplPioB5; interface HplSam3GeneralIOPin as HplPioB6; interface HplSam3GeneralIOPin as HplPioB7; interface HplSam3GeneralIOPin as HplPioB8; interface HplSam3GeneralIOPin as HplPioB9; interface HplSam3GeneralIOPin as HplPioB10; interface HplSam3GeneralIOPin as HplPioB11; interface HplSam3GeneralIOPin as HplPioB12; interface HplSam3GeneralIOPin as HplPioB13; interface HplSam3GeneralIOPin as HplPioB14; interface HplSam3GeneralIOPin as HplPioB15; interface HplSam3GeneralIOPin as HplPioB16; interface HplSam3GeneralIOPin as HplPioB17; interface HplSam3GeneralIOPin as HplPioB18; interface HplSam3GeneralIOPin as HplPioB19; interface HplSam3GeneralIOPin as HplPioB20; interface HplSam3GeneralIOPin as HplPioB21; interface HplSam3GeneralIOPin as HplPioB22; interface HplSam3GeneralIOPin as HplPioB23; interface HplSam3GeneralIOPin as HplPioB24; interface HplSam3GeneralIOPin as HplPioB25; interface HplSam3GeneralIOPin as HplPioB26; interface HplSam3GeneralIOPin as HplPioB27; interface HplSam3GeneralIOPin as HplPioB28; interface HplSam3GeneralIOPin as HplPioB29; interface HplSam3GeneralIOPin as HplPioB30; interface HplSam3GeneralIOPin as HplPioB31; interface HplSam3GeneralIOPin as HplPioC0; interface HplSam3GeneralIOPin as HplPioC1; interface HplSam3GeneralIOPin as HplPioC2; interface HplSam3GeneralIOPin as HplPioC3; interface HplSam3GeneralIOPin as HplPioC4; interface HplSam3GeneralIOPin as HplPioC5; interface HplSam3GeneralIOPin as HplPioC6; interface HplSam3GeneralIOPin as HplPioC7; interface HplSam3GeneralIOPin as HplPioC8; interface HplSam3GeneralIOPin as HplPioC9; interface HplSam3GeneralIOPin as HplPioC10; interface HplSam3GeneralIOPin as HplPioC11; interface HplSam3GeneralIOPin as HplPioC12; interface HplSam3GeneralIOPin as HplPioC13; interface HplSam3GeneralIOPin as HplPioC14; interface HplSam3GeneralIOPin as HplPioC15; interface HplSam3GeneralIOPin as HplPioC16; interface HplSam3GeneralIOPin as HplPioC17; interface HplSam3GeneralIOPin as HplPioC18; interface HplSam3GeneralIOPin as HplPioC19; interface HplSam3GeneralIOPin as HplPioC20; interface HplSam3GeneralIOPin as HplPioC21; interface HplSam3GeneralIOPin as HplPioC22; interface HplSam3GeneralIOPin as HplPioC23; interface HplSam3GeneralIOPin as HplPioC24; interface HplSam3GeneralIOPin as HplPioC25; interface HplSam3GeneralIOPin as HplPioC26; interface HplSam3GeneralIOPin as HplPioC27; interface HplSam3GeneralIOPin as HplPioC28; interface HplSam3GeneralIOPin as HplPioC29; interface HplSam3GeneralIOPin as HplPioC30; interface HplSam3GeneralIOPin as HplPioC31; } } implementation { components new HplSam3GeneralIOPioC(0x400e0c00) as PioA, new HplSam3GeneralIOPioC(0x400e0e00) as PioB, new HplSam3GeneralIOPioC(0x400e1000) as PioC; components HplSam3GeneralIOP; PioA.HplPort -> HplSam3GeneralIOP.HplPortA; PioB.HplPort -> HplSam3GeneralIOP.HplPortB; PioC.HplPort -> HplSam3GeneralIOP.HplPortC; components McuSleepC; HplSam3GeneralIOP.PioAInterruptWrapper -> McuSleepC; HplSam3GeneralIOP.PioBInterruptWrapper -> McuSleepC; HplSam3GeneralIOP.PioCInterruptWrapper -> McuSleepC; components HplNVICC, HplSam3uClockC; PioA.PIOIrqControl -> HplNVICC.PIOAInterrupt; PioA.PIOClockControl -> HplSam3uClockC.PIOAPPCntl; PioB.PIOIrqControl -> HplNVICC.PIOBInterrupt; PioB.PIOClockControl -> HplSam3uClockC.PIOBPPCntl; PioC.PIOIrqControl -> HplNVICC.PIOCInterrupt; PioC.PIOClockControl -> HplSam3uClockC.PIOCPPCntl; PioA0 = PioA.Pin0; PioA1 = PioA.Pin1; PioA2 = PioA.Pin2; PioA3 = PioA.Pin3; PioA4 = PioA.Pin4; PioA5 = PioA.Pin5; PioA6 = PioA.Pin6; PioA7 = PioA.Pin7; PioA8 = PioA.Pin8; PioA9 = PioA.Pin9; PioA10 = PioA.Pin10; PioA11 = PioA.Pin11; PioA12 = PioA.Pin12; PioA13 = PioA.Pin13; PioA14 = PioA.Pin14; PioA15 = PioA.Pin15; PioA16 = PioA.Pin16; PioA17 = PioA.Pin17; PioA18 = PioA.Pin18; PioA19 = PioA.Pin19; PioA20 = PioA.Pin20; PioA21 = PioA.Pin21; PioA22 = PioA.Pin22; PioA23 = PioA.Pin23; PioA24 = PioA.Pin24; PioA25 = PioA.Pin25; PioA26 = PioA.Pin26; PioA27 = PioA.Pin27; PioA28 = PioA.Pin28; PioA29 = PioA.Pin29; PioA30 = PioA.Pin30; PioA31 = PioA.Pin31; PioB0 = PioB.Pin0; PioB1 = PioB.Pin1; PioB2 = PioB.Pin2; PioB3 = PioB.Pin3; PioB4 = PioB.Pin4; PioB5 = PioB.Pin5; PioB6 = PioB.Pin6; PioB7 = PioB.Pin7; PioB8 = PioB.Pin8; PioB9 = PioB.Pin9; PioB10 = PioB.Pin10; PioB11 = PioB.Pin11; PioB12 = PioB.Pin12; PioB13 = PioB.Pin13; PioB14 = PioB.Pin14; PioB15 = PioB.Pin15; PioB16 = PioB.Pin16; PioB17 = PioB.Pin17; PioB18 = PioB.Pin18; PioB19 = PioB.Pin19; PioB20 = PioB.Pin20; PioB21 = PioB.Pin21; PioB22 = PioB.Pin22; PioB23 = PioB.Pin23; PioB24 = PioB.Pin24; PioB25 = PioB.Pin25; PioB26 = PioB.Pin26; PioB27 = PioB.Pin27; PioB28 = PioB.Pin28; PioB29 = PioB.Pin29; PioB30 = PioB.Pin30; PioB31 = PioB.Pin31; PioC0 = PioC.Pin0; PioC1 = PioC.Pin1; PioC2 = PioC.Pin2; PioC3 = PioC.Pin3; PioC4 = PioC.Pin4; PioC5 = PioC.Pin5; PioC6 = PioC.Pin6; PioC7 = PioC.Pin7; PioC8 = PioC.Pin8; PioC9 = PioC.Pin9; PioC10 = PioC.Pin10; PioC11 = PioC.Pin11; PioC12 = PioC.Pin12; PioC13 = PioC.Pin13; PioC14 = PioC.Pin14; PioC15 = PioC.Pin15; PioC16 = PioC.Pin16; PioC17 = PioC.Pin17; PioC18 = PioC.Pin18; PioC19 = PioC.Pin19; PioC20 = PioC.Pin20; PioC21 = PioC.Pin21; PioC22 = PioC.Pin22; PioC23 = PioC.Pin23; PioC24 = PioC.Pin24; PioC25 = PioC.Pin25; PioC26 = PioC.Pin26; PioC27 = PioC.Pin27; PioC28 = PioC.Pin28; PioC29 = PioC.Pin29; PioC30 = PioC.Pin30; PioC31 = PioC.Pin31; InterruptPioA0 = PioA.InterruptPin0; InterruptPioA1 = PioA.InterruptPin1; InterruptPioA2 = PioA.InterruptPin2; InterruptPioA3 = PioA.InterruptPin3; InterruptPioA4 = PioA.InterruptPin4; InterruptPioA5 = PioA.InterruptPin5; InterruptPioA6 = PioA.InterruptPin6; InterruptPioA7 = PioA.InterruptPin7; InterruptPioA8 = PioA.InterruptPin8; InterruptPioA9 = PioA.InterruptPin9; InterruptPioA10 = PioA.InterruptPin10; InterruptPioA11 = PioA.InterruptPin11; InterruptPioA12 = PioA.InterruptPin12; InterruptPioA13 = PioA.InterruptPin13; InterruptPioA14 = PioA.InterruptPin14; InterruptPioA15 = PioA.InterruptPin15; InterruptPioA16 = PioA.InterruptPin16; InterruptPioA17 = PioA.InterruptPin17; InterruptPioA18 = PioA.InterruptPin18; InterruptPioA19 = PioA.InterruptPin19; InterruptPioA20 = PioA.InterruptPin20; InterruptPioA21 = PioA.InterruptPin21; InterruptPioA22 = PioA.InterruptPin22; InterruptPioA23 = PioA.InterruptPin23; InterruptPioA24 = PioA.InterruptPin24; InterruptPioA25 = PioA.InterruptPin25; InterruptPioA26 = PioA.InterruptPin26; InterruptPioA27 = PioA.InterruptPin27; InterruptPioA28 = PioA.InterruptPin28; InterruptPioA29 = PioA.InterruptPin29; InterruptPioA30 = PioA.InterruptPin30; InterruptPioA31 = PioA.InterruptPin31; InterruptPioB0 = PioB.InterruptPin0; InterruptPioB1 = PioB.InterruptPin1; InterruptPioB2 = PioB.InterruptPin2; InterruptPioB3 = PioB.InterruptPin3; InterruptPioB4 = PioB.InterruptPin4; InterruptPioB5 = PioB.InterruptPin5; InterruptPioB6 = PioB.InterruptPin6; InterruptPioB7 = PioB.InterruptPin7; InterruptPioB8 = PioB.InterruptPin8; InterruptPioB9 = PioB.InterruptPin9; InterruptPioB10 = PioB.InterruptPin10; InterruptPioB11 = PioB.InterruptPin11; InterruptPioB12 = PioB.InterruptPin12; InterruptPioB13 = PioB.InterruptPin13; InterruptPioB14 = PioB.InterruptPin14; InterruptPioB15 = PioB.InterruptPin15; InterruptPioB16 = PioB.InterruptPin16; InterruptPioB17 = PioB.InterruptPin17; InterruptPioB18 = PioB.InterruptPin18; InterruptPioB19 = PioB.InterruptPin19; InterruptPioB20 = PioB.InterruptPin20; InterruptPioB21 = PioB.InterruptPin21; InterruptPioB22 = PioB.InterruptPin22; InterruptPioB23 = PioB.InterruptPin23; InterruptPioB24 = PioB.InterruptPin24; InterruptPioB25 = PioB.InterruptPin25; InterruptPioB26 = PioB.InterruptPin26; InterruptPioB27 = PioB.InterruptPin27; InterruptPioB28 = PioB.InterruptPin28; InterruptPioB29 = PioB.InterruptPin29; InterruptPioB30 = PioB.InterruptPin30; InterruptPioB31 = PioB.InterruptPin31; InterruptPioC0 = PioC.InterruptPin0; InterruptPioC1 = PioC.InterruptPin1; InterruptPioC2 = PioC.InterruptPin2; InterruptPioC3 = PioC.InterruptPin3; InterruptPioC4 = PioC.InterruptPin4; InterruptPioC5 = PioC.InterruptPin5; InterruptPioC6 = PioC.InterruptPin6; InterruptPioC7 = PioC.InterruptPin7; InterruptPioC8 = PioC.InterruptPin8; InterruptPioC9 = PioC.InterruptPin9; InterruptPioC10 = PioC.InterruptPin10; InterruptPioC11 = PioC.InterruptPin11; InterruptPioC12 = PioC.InterruptPin12; InterruptPioC13 = PioC.InterruptPin13; InterruptPioC14 = PioC.InterruptPin14; InterruptPioC15 = PioC.InterruptPin15; InterruptPioC16 = PioC.InterruptPin16; InterruptPioC17 = PioC.InterruptPin17; InterruptPioC18 = PioC.InterruptPin18; InterruptPioC19 = PioC.InterruptPin19; InterruptPioC20 = PioC.InterruptPin20; InterruptPioC21 = PioC.InterruptPin21; InterruptPioC22 = PioC.InterruptPin22; InterruptPioC23 = PioC.InterruptPin23; InterruptPioC24 = PioC.InterruptPin24; InterruptPioC25 = PioC.InterruptPin25; InterruptPioC26 = PioC.InterruptPin26; InterruptPioC27 = PioC.InterruptPin27; InterruptPioC28 = PioC.InterruptPin28; InterruptPioC29 = PioC.InterruptPin29; InterruptPioC30 = PioC.InterruptPin30; InterruptPioC31 = PioC.InterruptPin31; CapturePioA0 = PioA.CapturePin0; CapturePioA1 = PioA.CapturePin1; CapturePioA2 = PioA.CapturePin2; CapturePioA3 = PioA.CapturePin3; CapturePioA4 = PioA.CapturePin4; CapturePioA5 = PioA.CapturePin5; CapturePioA6 = PioA.CapturePin6; CapturePioA7 = PioA.CapturePin7; CapturePioA8 = PioA.CapturePin8; CapturePioA9 = PioA.CapturePin9; CapturePioA10 = PioA.CapturePin10; CapturePioA11 = PioA.CapturePin11; CapturePioA12 = PioA.CapturePin12; CapturePioA13 = PioA.CapturePin13; CapturePioA14 = PioA.CapturePin14; CapturePioA15 = PioA.CapturePin15; CapturePioA16 = PioA.CapturePin16; CapturePioA17 = PioA.CapturePin17; CapturePioA18 = PioA.CapturePin18; CapturePioA19 = PioA.CapturePin19; CapturePioA20 = PioA.CapturePin20; CapturePioA21 = PioA.CapturePin21; CapturePioA22 = PioA.CapturePin22; CapturePioA23 = PioA.CapturePin23; CapturePioA24 = PioA.CapturePin24; CapturePioA25 = PioA.CapturePin25; CapturePioA26 = PioA.CapturePin26; CapturePioA27 = PioA.CapturePin27; CapturePioA28 = PioA.CapturePin28; CapturePioA29 = PioA.CapturePin29; CapturePioA30 = PioA.CapturePin30; CapturePioA31 = PioA.CapturePin31; CapturePioB0 = PioB.CapturePin0; CapturePioB1 = PioB.CapturePin1; CapturePioB2 = PioB.CapturePin2; CapturePioB3 = PioB.CapturePin3; CapturePioB4 = PioB.CapturePin4; CapturePioB5 = PioB.CapturePin5; CapturePioB6 = PioB.CapturePin6; CapturePioB7 = PioB.CapturePin7; CapturePioB8 = PioB.CapturePin8; CapturePioB9 = PioB.CapturePin9; CapturePioB10 = PioB.CapturePin10; CapturePioB11 = PioB.CapturePin11; CapturePioB12 = PioB.CapturePin12; CapturePioB13 = PioB.CapturePin13; CapturePioB14 = PioB.CapturePin14; CapturePioB15 = PioB.CapturePin15; CapturePioB16 = PioB.CapturePin16; CapturePioB17 = PioB.CapturePin17; CapturePioB18 = PioB.CapturePin18; CapturePioB19 = PioB.CapturePin19; CapturePioB20 = PioB.CapturePin20; CapturePioB21 = PioB.CapturePin21; CapturePioB22 = PioB.CapturePin22; CapturePioB23 = PioB.CapturePin23; CapturePioB24 = PioB.CapturePin24; CapturePioB25 = PioB.CapturePin25; CapturePioB26 = PioB.CapturePin26; CapturePioB27 = PioB.CapturePin27; CapturePioB28 = PioB.CapturePin28; CapturePioB29 = PioB.CapturePin29; CapturePioB30 = PioB.CapturePin30; CapturePioB31 = PioB.CapturePin31; CapturePioC0 = PioC.CapturePin0; CapturePioC1 = PioC.CapturePin1; CapturePioC2 = PioC.CapturePin2; CapturePioC3 = PioC.CapturePin3; CapturePioC4 = PioC.CapturePin4; CapturePioC5 = PioC.CapturePin5; CapturePioC6 = PioC.CapturePin6; CapturePioC7 = PioC.CapturePin7; CapturePioC8 = PioC.CapturePin8; CapturePioC9 = PioC.CapturePin9; CapturePioC10 = PioC.CapturePin10; CapturePioC11 = PioC.CapturePin11; CapturePioC12 = PioC.CapturePin12; CapturePioC13 = PioC.CapturePin13; CapturePioC14 = PioC.CapturePin14; CapturePioC15 = PioC.CapturePin15; CapturePioC16 = PioC.CapturePin16; CapturePioC17 = PioC.CapturePin17; CapturePioC18 = PioC.CapturePin18; CapturePioC19 = PioC.CapturePin19; CapturePioC20 = PioC.CapturePin20; CapturePioC21 = PioC.CapturePin21; CapturePioC22 = PioC.CapturePin22; CapturePioC23 = PioC.CapturePin23; CapturePioC24 = PioC.CapturePin24; CapturePioC25 = PioC.CapturePin25; CapturePioC26 = PioC.CapturePin26; CapturePioC27 = PioC.CapturePin27; CapturePioC28 = PioC.CapturePin28; CapturePioC29 = PioC.CapturePin29; CapturePioC30 = PioC.CapturePin30; CapturePioC31 = PioC.CapturePin31; HplPioA0 = PioA.HplPin0; HplPioA1 = PioA.HplPin1; HplPioA2 = PioA.HplPin2; HplPioA3 = PioA.HplPin3; HplPioA4 = PioA.HplPin4; HplPioA5 = PioA.HplPin5; HplPioA6 = PioA.HplPin6; HplPioA7 = PioA.HplPin7; HplPioA8 = PioA.HplPin8; HplPioA9 = PioA.HplPin9; HplPioA10 = PioA.HplPin10; HplPioA11 = PioA.HplPin11; HplPioA12 = PioA.HplPin12; HplPioA13 = PioA.HplPin13; HplPioA14 = PioA.HplPin14; HplPioA15 = PioA.HplPin15; HplPioA16 = PioA.HplPin16; HplPioA17 = PioA.HplPin17; HplPioA18 = PioA.HplPin18; HplPioA19 = PioA.HplPin19; HplPioA20 = PioA.HplPin20; HplPioA21 = PioA.HplPin21; HplPioA22 = PioA.HplPin22; HplPioA23 = PioA.HplPin23; HplPioA24 = PioA.HplPin24; HplPioA25 = PioA.HplPin25; HplPioA26 = PioA.HplPin26; HplPioA27 = PioA.HplPin27; HplPioA28 = PioA.HplPin28; HplPioA29 = PioA.HplPin29; HplPioA30 = PioA.HplPin30; HplPioA31 = PioA.HplPin31; HplPioB0 = PioB.HplPin0; HplPioB1 = PioB.HplPin1; HplPioB2 = PioB.HplPin2; HplPioB3 = PioB.HplPin3; HplPioB4 = PioB.HplPin4; HplPioB5 = PioB.HplPin5; HplPioB6 = PioB.HplPin6; HplPioB7 = PioB.HplPin7; HplPioB8 = PioB.HplPin8; HplPioB9 = PioB.HplPin9; HplPioB10 = PioB.HplPin10; HplPioB11 = PioB.HplPin11; HplPioB12 = PioB.HplPin12; HplPioB13 = PioB.HplPin13; HplPioB14 = PioB.HplPin14; HplPioB15 = PioB.HplPin15; HplPioB16 = PioB.HplPin16; HplPioB17 = PioB.HplPin17; HplPioB18 = PioB.HplPin18; HplPioB19 = PioB.HplPin19; HplPioB20 = PioB.HplPin20; HplPioB21 = PioB.HplPin21; HplPioB22 = PioB.HplPin22; HplPioB23 = PioB.HplPin23; HplPioB24 = PioB.HplPin24; HplPioB25 = PioB.HplPin25; HplPioB26 = PioB.HplPin26; HplPioB27 = PioB.HplPin27; HplPioB28 = PioB.HplPin28; HplPioB29 = PioB.HplPin29; HplPioB30 = PioB.HplPin30; HplPioB31 = PioB.HplPin31; HplPioC0 = PioC.HplPin0; HplPioC1 = PioC.HplPin1; HplPioC2 = PioC.HplPin2; HplPioC3 = PioC.HplPin3; HplPioC4 = PioC.HplPin4; HplPioC5 = PioC.HplPin5; HplPioC6 = PioC.HplPin6; HplPioC7 = PioC.HplPin7; HplPioC8 = PioC.HplPin8; HplPioC9 = PioC.HplPin9; HplPioC10 = PioC.HplPin10; HplPioC11 = PioC.HplPin11; HplPioC12 = PioC.HplPin12; HplPioC13 = PioC.HplPin13; HplPioC14 = PioC.HplPin14; HplPioC15 = PioC.HplPin15; HplPioC16 = PioC.HplPin16; HplPioC17 = PioC.HplPin17; HplPioC18 = PioC.HplPin18; HplPioC19 = PioC.HplPin19; HplPioC20 = PioC.HplPin20; HplPioC21 = PioC.HplPin21; HplPioC22 = PioC.HplPin22; HplPioC23 = PioC.HplPin23; HplPioC24 = PioC.HplPin24; HplPioC25 = PioC.HplPin25; HplPioC26 = PioC.HplPin26; HplPioC27 = PioC.HplPin27; HplPioC28 = PioC.HplPin28; HplPioC29 = PioC.HplPin29; HplPioC30 = PioC.HplPin30; HplPioC31 = PioC.HplPin31; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/pmc/000077500000000000000000000000001207233610700214055ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/pmc/HplSam3uClockC.nc000066400000000000000000000152551207233610700244520ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * This is the main configuration for the low-layer clock module. * * @author Thomas Schmid */ configuration HplSam3uClockC { provides { interface HplSam3Clock; interface HplSam3PeripheralClockCntl as RTCPCCntl ; interface HplSam3PeripheralClockCntl as RTTPPCntl ; interface HplSam3PeripheralClockCntl as WDGPPCntl ; interface HplSam3PeripheralClockCntl as PMCPPCntl ; interface HplSam3PeripheralClockCntl as EFC0PPCntl ; interface HplSam3PeripheralClockCntl as EFC1PPCntl ; interface HplSam3PeripheralClockCntl as DBGUPPCntl ; interface HplSam3PeripheralClockCntl as HSMC4PPCntl ; interface HplSam3PeripheralClockCntl as PIOAPPCntl ; interface HplSam3PeripheralClockCntl as PIOBPPCntl ; interface HplSam3PeripheralClockCntl as PIOCPPCntl ; interface HplSam3PeripheralClockCntl as US0PPCntl ; interface HplSam3PeripheralClockCntl as US1PPCntl ; interface HplSam3PeripheralClockCntl as US2PPCntl ; interface HplSam3PeripheralClockCntl as US3PPCntl ; interface HplSam3PeripheralClockCntl as MCI0PPCntl ; interface HplSam3PeripheralClockCntl as TWI0PPCntl ; interface HplSam3PeripheralClockCntl as TWI1PPCntl ; interface HplSam3PeripheralClockCntl as SPI0PPCntl ; interface HplSam3PeripheralClockCntl as SSC0PPCntl ; interface HplSam3PeripheralClockCntl as TC0PPCntl ; interface HplSam3PeripheralClockCntl as TC1PPCntl ; interface HplSam3PeripheralClockCntl as TC2PPCntl ; interface HplSam3PeripheralClockCntl as PWMCPPCntl ; interface HplSam3PeripheralClockCntl as ADC12BPPCntl; interface HplSam3PeripheralClockCntl as ADCPPCntl ; interface HplSam3PeripheralClockCntl as HDMAPPCntl ; interface HplSam3PeripheralClockCntl as UDPHSPPCntl ; } } implementation { #define PMC_PC_BASE 0x400e0410 components HplSam3uClockP, new HplSam3PeripheralClockP(AT91C_ID_RTC ,PMC_PC_BASE ) as RTC, new HplSam3PeripheralClockP(AT91C_ID_RTT ,PMC_PC_BASE ) as RTT, new HplSam3PeripheralClockP(AT91C_ID_WDG ,PMC_PC_BASE ) as WDG, new HplSam3PeripheralClockP(AT91C_ID_PMC ,PMC_PC_BASE ) as PMC, new HplSam3PeripheralClockP(AT91C_ID_EFC0 ,PMC_PC_BASE ) as EFC0, new HplSam3PeripheralClockP(AT91C_ID_EFC1 ,PMC_PC_BASE ) as EFC1, new HplSam3PeripheralClockP(AT91C_ID_DBGU ,PMC_PC_BASE ) as DBGU, new HplSam3PeripheralClockP(AT91C_ID_HSMC4 ,PMC_PC_BASE ) as HSMC4, new HplSam3PeripheralClockP(AT91C_ID_PIOA ,PMC_PC_BASE ) as PIOA, new HplSam3PeripheralClockP(AT91C_ID_PIOB ,PMC_PC_BASE ) as PIOB, new HplSam3PeripheralClockP(AT91C_ID_PIOC ,PMC_PC_BASE ) as PIOC, new HplSam3PeripheralClockP(AT91C_ID_US0 ,PMC_PC_BASE ) as US0, new HplSam3PeripheralClockP(AT91C_ID_US1 ,PMC_PC_BASE ) as US1, new HplSam3PeripheralClockP(AT91C_ID_US2 ,PMC_PC_BASE ) as US2, new HplSam3PeripheralClockP(AT91C_ID_US3 ,PMC_PC_BASE ) as US3, new HplSam3PeripheralClockP(AT91C_ID_MCI0 ,PMC_PC_BASE ) as MCI0, new HplSam3PeripheralClockP(AT91C_ID_TWI0 ,PMC_PC_BASE ) as TWI0, new HplSam3PeripheralClockP(AT91C_ID_TWI1 ,PMC_PC_BASE ) as TWI1, new HplSam3PeripheralClockP(AT91C_ID_SPI0 ,PMC_PC_BASE ) as SPI0, new HplSam3PeripheralClockP(AT91C_ID_SSC0 ,PMC_PC_BASE ) as SSC0, new HplSam3PeripheralClockP(AT91C_ID_TC0 ,PMC_PC_BASE ) as TC0, new HplSam3PeripheralClockP(AT91C_ID_TC1 ,PMC_PC_BASE ) as TC1, new HplSam3PeripheralClockP(AT91C_ID_TC2 ,PMC_PC_BASE ) as TC2, new HplSam3PeripheralClockP(AT91C_ID_PWMC ,PMC_PC_BASE ) as PWMC, new HplSam3PeripheralClockP(AT91C_ID_ADC12B,PMC_PC_BASE ) as ADC12B, new HplSam3PeripheralClockP(AT91C_ID_ADC ,PMC_PC_BASE ) as ADC, new HplSam3PeripheralClockP(AT91C_ID_HDMA ,PMC_PC_BASE ) as HDMA, new HplSam3PeripheralClockP(AT91C_ID_UDPHS ,PMC_PC_BASE ) as UDPHS; HplSam3Clock = HplSam3uClockP; RTCPCCntl = RTC.Cntl; RTTPPCntl = RTT.Cntl; WDGPPCntl = WDG.Cntl; PMCPPCntl = PMC.Cntl; EFC0PPCntl = EFC0.Cntl; EFC1PPCntl = EFC1.Cntl; DBGUPPCntl = DBGU.Cntl; HSMC4PPCntl = HSMC4.Cntl; PIOAPPCntl = PIOA.Cntl; PIOBPPCntl = PIOB.Cntl; PIOCPPCntl = PIOC.Cntl; US0PPCntl = US0.Cntl; US1PPCntl = US1.Cntl; US2PPCntl = US2.Cntl; US3PPCntl = US3.Cntl; MCI0PPCntl = MCI0.Cntl; TWI0PPCntl = TWI0.Cntl; TWI1PPCntl = TWI1.Cntl; SPI0PPCntl = SPI0.Cntl; SSC0PPCntl = SSC0.Cntl; TC0PPCntl = TC0.Cntl; TC1PPCntl = TC1.Cntl; TC2PPCntl = TC2.Cntl; PWMCPPCntl = PWMC.Cntl; ADC12BPPCntl= ADC12B.Cntl; ADCPPCntl = ADC.Cntl; HDMAPPCntl = HDMA.Cntl; UDPHSPPCntl = UDPHS.Cntl; components McuSleepC; McuSleepC.HplSam3Clock -> HplSam3uClockP; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/pmc/HplSam3uClockP.nc000066400000000000000000000205001207233610700244540ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * This is a low-level clock component controlling the different clock * systems. * * @author Thomas Schmid * @author Kevin Klues */ #include "sam3upmchardware.h" #include "sam3usupchardware.h" #define CLOCK_TIMEOUT 0xFFFFFFFF module HplSam3uClockP { provides { interface HplSam3Clock; } } implementation { async command error_t HplSam3Clock.slckExternalOsc() { uint32_t timeout = 0; if(SUPC->sr.bits.oscsel == 0) { supc_cr_t cr; cr.flat = 0; // assure it is all zero! cr.bits.xtalsel = 1; cr.bits.key = SUPC_CR_KEY; SUPC->cr = cr; timeout = 0; while (!(SUPC->sr.bits.oscsel) && (timeout++ < CLOCK_TIMEOUT)); } return SUCCESS; } async command error_t HplSam3Clock.slckRCOsc() { uint32_t timeout = 0; if(SUPC->sr.bits.oscsel == 1) { supc_cr_t cr; cr.flat = 0; // assure it is all zero! cr.bits.xtalsel = 0; cr.bits.key = SUPC_CR_KEY; SUPC->cr = cr; timeout = 0; while (!(SUPC->sr.bits.oscsel) && (timeout++ < CLOCK_TIMEOUT)); } return SUCCESS; } inline error_t mckInit(uint8_t speed) { pmc_mor_t mor; pmc_mckr_t mckr; pmc_pllar_t pllar; uint32_t timeout = 0; if(speed == 48) speed = 3; else if(speed == 84) speed = 6; else if(speed == 96) speed = 7; else return FAIL; // Check if MCK source is RC or XT if(PMC->mor.bits.moscsel == 0) { // it is RC, turn on XT mor.flat = 0; // make sure it is zreoed out mor.bits.key = PMC_MOR_KEY; mor.bits.moscxtst = 0x07;//0x3F; // main oscillator startup time mor.bits.moscrcen = 1; // enable the on-chip rc oscillator mor.bits.moscxten = 1; // main crystal oscillator enable PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT)); } // Switch to XT mor.flat = 0; // make sure it is zeroed mor.bits.key = PMC_MOR_KEY; mor.bits.moscxtst = 0x07;//0x3F; mor.bits.moscrcen = 1; mor.bits.moscxten = 1; mor.bits.moscsel = 1; PMC->mor = mor; //timeout = 0; //while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT)); mckr = PMC->mckr; mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); // Initialize PLLA pllar.flat = 0; // make sure it is zeroed out pllar.bits.bit29 = 1; // we always have to do this! pllar.bits.mula = speed; // multiplication is MULA+1 => 12x(speed+1) pllar.bits.pllacount = 0x3F; pllar.bits.diva = 0x1; // divider is bypassed //pllar.bits.stmode = PMC_PLLAR_STMODE_FAST_STARTUP; PMC->pllar = pllar; timeout = 0; while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT)); // Switch to fast clock mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); mckr.bits.pres = PMC_MCKR_PRES_DIV_1; mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); signal HplSam3Clock.mainClockChanged(); return SUCCESS; } async command error_t HplSam3Clock.mckInit48() { return mckInit(48); } async command error_t HplSam3Clock.mckInit84() { return mckInit(84); } async command error_t HplSam3Clock.mckInit96() { return mckInit(96); } inline error_t mckInitRC(uint8_t speed) { pmc_mor_t mor; pmc_mckr_t mckr; pmc_pllar_t pllar; uint32_t timeout = 0; if(speed == 4) speed = 0; else if(speed == 8) speed = 1; else if(speed == 12) speed = 2; else return FAIL; // Check if MCK source is RC or XT if(PMC->mor.bits.moscsel == 1) { // it is XT, turn on RC mor.flat = 0; // make sure it is zreoed out mor.bits.key = PMC_MOR_KEY; mor.bits.moscrcf = speed; // select proper MHz RC mor.bits.moscrcen = 1; // enable the on-chip rc oscillator mor.bits.moscxten = 1; // main crystal oscillator enable PMC->mor = mor; timeout = 0; while (!(PMC->sr.bits.moscrcs) && (timeout++ < CLOCK_TIMEOUT)); } // Switch to RC mor.flat = 0; // make sure it is zeroed mor.bits.key = PMC_MOR_KEY; mor.bits.moscrcf = 3; // select 12 MHz RC mor.bits.moscrcen = 1; mor.bits.moscxten = 1; mor.bits.moscsel = 0; PMC->mor = mor; //timeout = 0; //while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT)); mckr = PMC->mckr; mckr.bits.pres = PMC_MCKR_PRES_DIV_1; mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK; PMC->mckr = mckr; timeout = 0; while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT)); // turn off external clock mor.bits.moscxten = 0; PMC->mor = mor; // Turn off PLL pllar.flat = 0; // make sure it is zeroed out pllar.bits.bit29 = 1; // this always has to be written as 1! PMC->pllar = pllar; signal HplSam3Clock.mainClockChanged(); return SUCCESS; } async command error_t HplSam3Clock.mckInit4RC() { return mckInitRC(4); } async command error_t HplSam3Clock.mckInit8RC() { return mckInitRC(8); } async command error_t HplSam3Clock.mckInit12RC() { return mckInitRC(12); } async command uint32_t HplSam3Clock.getMainClockSpeed() { uint32_t speed = 0; switch(PMC->mckr.bits.css) { case PMC_MCKR_CSS_SLOW_CLOCK: speed = 32; break; case PMC_MCKR_CSS_MAIN_CLOCK: speed = PMC->mcfr.bits.mainf*2048/1000; // 0.48828 corresponds to 16 clock ticks of a 32kHz crystal. break; case PMC_MCKR_CSS_PLLA_CLOCK: if(PMC->pllar.bits.diva != 0) { // note, the PLL multiplier is (mula + 1) speed = PMC->mcfr.bits.mainf*2048/1000 * (PMC->pllar.bits.mula + 1) / PMC->pllar.bits.diva; //speed = PMC->mcfr.bits.mainf*1000/488 * (PMC->pllar.bits.mula + 1) / PMC->pllar.bits.diva; } else speed = 0; break; default: speed = 0; } return speed; } default async event void HplSam3Clock.mainClockChanged(){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/pmc/sam3upmchardware.h000066400000000000000000000206211207233610700250250ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sam3u specific PMC registers * * @author Thomas Schmid */ #ifndef SAM3UPMCHARDWARE_H #define SAM3UPMCHARDWARE_H #include "pmchardware.h" /** * PMC Peripheral Clock Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 485 * 0: no effect * 1: enable corresponding peripheral clock */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 2; uint8_t rtc : 1; // not used after datasheet uint8_t rtt : 1; // not used after datasheet uint8_t wdg : 1; // not used after datasheet uint8_t pmc : 1; // not used after datasheet uint8_t efc0 : 1; // not used after datasheet uint8_t efc1 : 1; // not used after datasheet uint8_t dbgu : 1; uint8_t hsmc4 : 1; uint8_t pioa : 1; uint8_t piob : 1; uint8_t pioc : 1; uint8_t us0 : 1; uint8_t us1 : 1; uint8_t us2 : 1; uint8_t us3 : 1; uint8_t mci0 : 1; uint8_t twi0 : 1; uint8_t twi1 : 1; uint8_t spi0 : 1; uint8_t ssc0 : 1; uint8_t tc0 : 1; uint8_t tc1 : 1; uint8_t tc2 : 1; uint8_t pwmc : 1; uint8_t adc12b : 1; uint8_t adc : 1; uint8_t hdma : 1; uint8_t udphs : 1; uint8_t pid30 : 1; // not used on sam3u uint8_t pid31 : 1; // not use don sam3u } __attribute__((__packed__)) bits; } pmc_pcer_t; /** * PMC Peripheral Clock Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 486 * 0: no effect * 1: disable corresponding peripheral clock */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 2; uint8_t rtc : 1; // not used after datasheet uint8_t rtt : 1; // not used after datasheet uint8_t wdg : 1; // not used after datasheet uint8_t pmc : 1; // not used after datasheet uint8_t efc0 : 1; // not used after datasheet uint8_t efc1 : 1; // not used after datasheet uint8_t dbgu : 1; uint8_t hsmc4 : 1; uint8_t pioa : 1; uint8_t piob : 1; uint8_t pioc : 1; uint8_t us0 : 1; uint8_t us1 : 1; uint8_t us2 : 1; uint8_t us3 : 1; uint8_t mci0 : 1; uint8_t twi0 : 1; uint8_t twi1 : 1; uint8_t spi0 : 1; uint8_t ssc0 : 1; uint8_t tc0 : 1; uint8_t tc1 : 1; uint8_t tc2 : 1; uint8_t pwmc : 1; uint8_t adc12b : 1; uint8_t adc : 1; uint8_t hdma : 1; uint8_t udphs : 1; uint8_t pid30 : 1; // not used on sam3u uint8_t pid31 : 1; // not use don sam3u } __attribute__((__packed__)) bits; } pmc_pcdr_t; /** * PMC Peripheral Clock Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 487 * 0: peripheral clock disabled * 1: peripheral clock enabled */ typedef union { uint32_t flat; struct { uint8_t reserved0 : 2; uint8_t rtc : 1; // not used after datasheet uint8_t rtt : 1; // not used after datasheet uint8_t wdg : 1; // not used after datasheet uint8_t pmc : 1; // not used after datasheet uint8_t efc0 : 1; // not used after datasheet uint8_t efc1 : 1; // not used after datasheet uint8_t dbgu : 1; uint8_t hsmc4 : 1; uint8_t pioa : 1; uint8_t piob : 1; uint8_t pioc : 1; uint8_t us0 : 1; uint8_t us1 : 1; uint8_t us2 : 1; uint8_t us3 : 1; uint8_t mci0 : 1; uint8_t twi0 : 1; uint8_t twi1 : 1; uint8_t spi0 : 1; uint8_t ssc0 : 1; uint8_t tc0 : 1; uint8_t tc1 : 1; uint8_t tc2 : 1; uint8_t pwmc : 1; uint8_t adc12b : 1; uint8_t adc : 1; uint8_t hdma : 1; uint8_t udphs : 1; uint8_t pid30 : 1; // not used on sam3u uint8_t pid31 : 1; // not use don sam3u } __attribute__((__packed__)) bits; } pmc_pcsr_t; /** * PMC UTMI Clock Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 488 */ typedef union { uint32_t flat; struct { uint16_t reserved0: 16; uint8_t upllen : 1; // UTMI PLL enable uint8_t reserved1 : 3; uint8_t upllcount : 4; // UTMI PLL Start-up Time (in number of slow clock cycles times 8 uint8_t reserved2 : 8; } __attribute__((__packed__)) bits; } pmc_uckr_t; typedef struct { volatile pmc_pcer_t pcer; // Peripheral Clock Enable Register volatile pmc_pcdr_t pcdr; // Peripheral Clock Disable Register volatile pmc_pcsr_t pcsr; // Peripheral Clock Status Register } pmc_pc_t; /** * PMC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 481 */ typedef struct pmc { volatile pmc_scer_t scer; // System Clock Enable Register volatile pmc_scdr_t scdr; // System Clock Disable Register volatile pmc_scsr_t scsr; // System Clock Status Register uint32_t reserved0; volatile pmc_pc_t pc; // Peripheral Clock Control Registers volatile pmc_uckr_t uckr; // UTMI Clock Register volatile pmc_mor_t mor; // Main Oscillator Register volatile pmc_mcfr_t mcfr; // Main Clock Frequency Register volatile pmc_pllar_t pllar; // PLLA Register uint32_t reserved1; volatile pmc_mckr_t mckr; // Master Clock Register uint32_t reserved2[3]; volatile pmc_pck_t pck0; // Programmable Clock 0 Register volatile pmc_pck_t pck1; // Programmable Clock 1 Register volatile pmc_pck_t pck2; // Programmable Clock 2 Register uint32_t reserved3[5]; volatile pmc_ier_t ier; // Interrupt Enable Register volatile pmc_idr_t idr; // Interrupt Disable Register volatile pmc_sr_t sr; // Status Register volatile pmc_imr_t imr; // Interrupt Mask Register volatile pmc_fsmr_t fsmr; // Fast Startup Mode Register volatile pmc_fspr_t fspr; // Fast Startup Polarity Register volatile pmc_focr_t focr; // Fault Output Clear Register uint32_t reserved5[26]; volatile pmc_wpmr_t wpmr; // Write Protect Mode Register volatile pmc_wpsr_t wpsr; // Write Protect Status Register } pmc_t; /** * Memory mapping for the PMC */ volatile pmc_t* PMC = (volatile pmc_t *) 0x400E0400; // PMC Base Address #endif //SAM3UPMCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/sam3uhardware.h000066400000000000000000000136021207233610700235470ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Definitions specific to the SAM3U MCU. * Includes interrupt enable/disable routines for nesC. * * @author Wanja Hofer */ #ifndef SAM3U_HARDWARE_H #define SAM3U_HARDWARE_H #include // Peripheral ID definitions for the SAM3U // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 41 #define AT91C_ID_SUPC ( 0) // SUPPLY CONTROLLER #define AT91C_ID_RSTC ( 1) // RESET CONTROLLER #define AT91C_ID_RTC ( 2) // REAL TIME CLOCK #define AT91C_ID_RTT ( 3) // REAL TIME TIMER #define AT91C_ID_WDG ( 4) // WATCHDOG TIMER #define AT91C_ID_PMC ( 5) // PMC #define AT91C_ID_EFC0 ( 6) // EFC0 #define AT91C_ID_EFC1 ( 7) // EFC1 #define AT91C_ID_DBGU ( 8) // DBGU #define AT91C_ID_HSMC4 ( 9) // HSMC4 #define AT91C_ID_PIOA (10) // Parallel IO Controller A #define AT91C_ID_PIOB (11) // Parallel IO Controller B #define AT91C_ID_PIOC (12) // Parallel IO Controller C #define AT91C_ID_US0 (13) // USART 0 #define AT91C_ID_US1 (14) // USART 1 #define AT91C_ID_US2 (15) // USART 2 #define AT91C_ID_US3 (16) // USART 3 #define AT91C_ID_MCI0 (17) // Multimedia Card Interface #define AT91C_ID_TWI0 (18) // TWI 0 #define AT91C_ID_TWI1 (19) // TWI 1 #define AT91C_ID_SPI0 (20) // Serial Peripheral Interface #define AT91C_ID_SSC0 (21) // Serial Synchronous Controller 0 #define AT91C_ID_TC0 (22) // Timer Counter 0 #define AT91C_ID_TC1 (23) // Timer Counter 1 #define AT91C_ID_TC2 (24) // Timer Counter 2 #define AT91C_ID_PWMC (25) // Pulse Width Modulation Controller #define AT91C_ID_ADC12B (26) // 12-bit ADC Controller (ADC12B) #define AT91C_ID_ADC (27) // 10-bit ADC Controller (ADC) #define AT91C_ID_HDMA (28) // HDMA #define AT91C_ID_UDPHS (29) // USB Device High Speed #define SAM3U_PERIPHERALA (0x400e0c00) #define SAM3U_PERIPHERALB (0x400e0e00) #define SAM3U_PERIPHERALC (0x400e1000) #define TOSH_ASSIGN_PIN(name, port, bit) \ static inline void TOSH_SET_##name##_PIN() \ {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x030)) = (1 << bit);} \ static inline void TOSH_CLR_##name##_PIN() \ {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x034)) = (1 << bit);} \ static inline int TOSH_READ_##name##_PIN() \ { \ /* Read bit from Output Status Register */ \ uint32_t currentport = *((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x018)); \ uint32_t currentpin = (currentport & (1 << bit)) >> bit; \ bool isInput = ((currentpin & 1) == 0); \ if (isInput == 1) { \ /* Read bit from Pin Data Status Register */ \ currentport = *((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x03c)); \ currentpin = (currentport & (1 << bit)) >> bit; \ return ((currentpin & 1) == 1); \ } else { \ /* Read bit from Output Data Status Register */ \ currentport = *((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x038)); \ currentpin = (currentport & (1 << bit)) >> bit; \ return ((currentpin & 1) == 1); \ } \ } \ static inline void TOSH_MAKE_##name##_OUTPUT() \ {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x010)) = (1 << bit);} \ static inline void TOSH_MAKE_##name##_INPUT() \ {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x014)) = (1 << bit);} #define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \ static inline void TOSH_SET_##name##_PIN() \ {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x030)) = (1 << bit);} \ static inline void TOSH_CLR_##name##_PIN() \ {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x034)) = (1 << bit);} \ static inline void TOSH_MAKE_##name##_OUTPUT() \ {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x010)) = (1 << bit);} \ #define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\ static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \ static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \ static inline void TOSH_MAKE_##alias##_OUTPUT() {} \ #define TOSH_ALIAS_PIN(alias, connector) \ static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \ static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \ static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \ static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \ #endif // SAM3U_HARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/smc/000077500000000000000000000000001207233610700214105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/smc/sam3smchardware.h000066400000000000000000000077571207233610700246650ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Static Memory Controller Register Definitions * * @author Thomas Schmid */ #ifndef _SAM3USMCHARDWARE_H #define _SAM3USMCHARDWARE_H #include "smchardware.h" /** * SMC TIMINGS Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. */ typedef union { uint32_t flat; struct { uint32_t tclr : 4; // cle to ren low delay uint32_t tadl : 4; // ale to data start uint32_t tar : 4; // ale to ren low delay uint32_t ocms : 1; // off chip memory scrambling enable uint32_t reserved0 : 3; uint32_t trr : 4; // ready to ren low delay uint32_t reserved1 : 4; uint32_t twb : 4; // wen high to ren to busy uint32_t rbnsel : 3; // ready/busy line selection uint32_t nfsel : 1; // nand flash selection } __attribute__((__packed__)) bits; } smc_timings_t; /** * SMC MODE Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary 9/1/09, p. */ typedef union { uint32_t flat; struct { uint32_t read_mode : 1; // read mode uint32_t write_mode : 1; // write mode uint32_t reserved0 : 2; uint32_t exnw_mode : 2; // nwait mode uint32_t reserved1 : 2; uint32_t bat : 1; // byte access type uint32_t reserved2 : 3; uint32_t dbw : 1; // data bus width uint32_t reserved3 : 3; uint32_t tdf_cycles : 4; // data float time uint32_t tdf_mode : 1; // tdf optimization uint32_t reserved4 : 3; uint32_t pmen : 1; // page mode enable (note, not in documentation, but in code at91lib!) uint32_t reserved5 : 3; uint32_t ps : 2; // page mode size (note: not in documentation, but in code at91lib!) uint32_t reserved6 : 3; } __attribute__((__packed__)) bits; } smc_mode_t; typedef struct { volatile smc_setup_t setup; volatile smc_pulse_t pulse; volatile smc_cycle_t cycle; volatile smc_timings_t timings; volatile smc_mode_t mode; } smc_cs_t; volatile smc_cs_t* SMC_CS0 = (volatile smc_cs_t*)0x400E0070; volatile smc_cs_t* SMC_CS1 = (volatile smc_cs_t*)0x400E0084; volatile smc_cs_t* SMC_CS2 = (volatile smc_cs_t*)0x400E0098; volatile smc_cs_t* SMC_CS3 = (volatile smc_cs_t*)0x400E00AC; #endif //_SAM3USMCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/spi/000077500000000000000000000000001207233610700214215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/spi/HilSam3SpiC.nc000066400000000000000000000073451207233610700237730ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SPI Configuration for the SAM3U-EK devkit. Does not use DMA (PDC) at this * point. Byte interface performs busy wait! * * @author Thomas Schmid * @author Kevin Klues */ #include configuration HilSam3SpiC { provides { interface Resource[uint8_t]; interface SpiByte[uint8_t]; interface FastSpiByte[uint8_t]; interface SpiPacket[uint8_t]; interface HplSam3SpiChipSelConfig[uint8_t]; interface HplSam3SpiConfig; } uses { interface Init as SpiChipInit; interface ResourceConfigure[uint8_t]; } } implementation { components RealMainP; RealMainP.PlatformInit -> HilSam3SpiP.Init; components HplSam3SpiC; HplSam3SpiConfig = HplSam3SpiC; HilSam3SpiP.SpiChipInit = SpiChipInit; HilSam3SpiP.HplSam3SpiConfig -> HplSam3SpiC; HilSam3SpiP.HplSam3SpiControl -> HplSam3SpiC; HilSam3SpiP.HplSam3SpiStatus -> HplSam3SpiC; HilSam3SpiP.HplSam3SpiInterrupts -> HplSam3SpiC; HplSam3SpiChipSelConfig[0] = HplSam3SpiC.HplSam3SpiChipSelConfig0; HplSam3SpiChipSelConfig[1] = HplSam3SpiC.HplSam3SpiChipSelConfig1; HplSam3SpiChipSelConfig[2] = HplSam3SpiC.HplSam3SpiChipSelConfig2; HplSam3SpiChipSelConfig[3] = HplSam3SpiC.HplSam3SpiChipSelConfig3; components new FcfsArbiterC(SAM3_SPI_BUS) as ArbiterC; Resource = ArbiterC; ResourceConfigure = ArbiterC; HilSam3SpiP.ArbiterInfo -> ArbiterC; components new AsyncStdControlPowerManagerC() as PM; PM.AsyncStdControl -> HplSam3SpiC; PM.ArbiterInfo -> ArbiterC.ArbiterInfo; PM.ResourceDefaultOwner -> ArbiterC.ResourceDefaultOwner; components HilSam3SpiP; SpiByte = HilSam3SpiP.SpiByte; SpiPacket = HilSam3SpiP.SpiPacket; components new FastSpiSam3C(SAM3_SPI_BUS); FastSpiSam3C.SpiByte -> HilSam3SpiP.SpiByte; FastSpiByte = FastSpiSam3C; components HplSam3uGeneralIOC; HilSam3SpiP.SpiPinMiso -> HplSam3uGeneralIOC.HplPioA13; HilSam3SpiP.SpiPinMosi -> HplSam3uGeneralIOC.HplPioA14; HilSam3SpiP.SpiPinSpck -> HplSam3uGeneralIOC.HplPioA15; components HplNVICC; HilSam3SpiP.SpiIrqControl -> HplNVICC.SPI0Interrupt; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/spi/HplSam3SpiC.nc000066400000000000000000000060051207233610700237720ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * The hardware presentation layer for the SAM3U SPI. * * @author Thomas Schmid */ #include "sam3spihardware.h" configuration HplSam3SpiC { provides { interface AsyncStdControl; interface HplSam3SpiConfig; interface HplSam3SpiControl; interface HplSam3SpiInterrupts; interface HplSam3SpiStatus; interface HplSam3SpiChipSelConfig as HplSam3SpiChipSelConfig0; interface HplSam3SpiChipSelConfig as HplSam3SpiChipSelConfig1; interface HplSam3SpiChipSelConfig as HplSam3SpiChipSelConfig2; interface HplSam3SpiChipSelConfig as HplSam3SpiChipSelConfig3; } } implementation { components HplSam3SpiP; AsyncStdControl = HplSam3SpiP; HplSam3SpiConfig = HplSam3SpiP; HplSam3SpiControl = HplSam3SpiP; HplSam3SpiInterrupts = HplSam3SpiP; HplSam3SpiStatus = HplSam3SpiP; components new HplSam3SpiChipSelP(0x40008030) as CS0, new HplSam3SpiChipSelP(0x40008034) as CS1, new HplSam3SpiChipSelP(0x40008038) as CS2, new HplSam3SpiChipSelP(0x4000803C) as CS3; HplSam3SpiChipSelConfig0 = CS0; HplSam3SpiChipSelConfig1 = CS1; HplSam3SpiChipSelConfig2 = CS2; HplSam3SpiChipSelConfig3 = CS3; components HplSam3uClockC; HplSam3SpiP.SpiClockControl -> HplSam3uClockC.SPI0PPCntl; HplSam3SpiP.ClockConfig -> HplSam3uClockC; components McuSleepC; HplSam3SpiP.SpiInterruptWrapper -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/spi/sam3spihardware.h000066400000000000000000000036151207233610700246740ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Serial Peripheral Interface (SPI) register definitions. * * @author Thomas Schmid */ #ifndef _SAM3SPIHARDWARE_H #define _SAM3SPIHARDWARE_H #include "spihardware.h" /** * Memory mapping for the SPI */ volatile spi_t* SPI = (volatile spi_t *) 0x40008000; // SPI Base Address #endif // _SPIHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/supc/000077500000000000000000000000001207233610700216005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/supc/sam3usupchardware.h000066400000000000000000000034611207233610700254160ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * * @author Thomas Schmid */ #ifndef SAM3USUPCHARDWARE_H #define SAM3USUPCHARDWARE_H #include "supchardware.h" /** * Memory mappin gofr the SUPC */ volatile supc_t* SUPC = (volatile supc_t *) 0x400E1210; #endif //SAM3USUPCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/timer/000077500000000000000000000000001207233610700217465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/timer/HplSam3TCC.nc000066400000000000000000000104061207233610700240720ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Top level configuration of the timer counter peripheral. * * @author Thomas Schmid */ #include configuration HplSam3TCC { provides { interface Init; interface HplSam3TC as TC; interface HplSam3TCChannel as TCH0; interface HplSam3TCChannel as TCH1; interface HplSam3TCChannel as TCH2; interface HplSam3TCCapture as TC0Capture; interface HplSam3TCCompare as TC0CompareA; interface HplSam3TCCompare as TC0CompareB; interface HplSam3TCCompare as TC0CompareC; interface HplSam3TCCapture as TC1Capture; interface HplSam3TCCompare as TC1CompareA; interface HplSam3TCCompare as TC1CompareB; interface HplSam3TCCompare as TC1CompareC; interface HplSam3TCCapture as TC2Capture; interface HplSam3TCCompare as TC2CompareA; interface HplSam3TCCompare as TC2CompareB; interface HplSam3TCCompare as TC2CompareC; } } implementation { components HplNVICC, HplSam3TCEventP, HplSam3uClockC, new HplSam3TCChannelP( TC_CH0_BASE ) as TCCH0, new HplSam3TCChannelP( TC_CH1_BASE ) as TCCH1, new HplSam3TCChannelP( TC_CH2_BASE ) as TCCH2; components McuSleepC; HplSam3TCEventP.TC0InterruptWrapper -> McuSleepC; HplSam3TCEventP.TC1InterruptWrapper -> McuSleepC; HplSam3TCEventP.TC2InterruptWrapper -> McuSleepC; TCH0 = TCCH0; TCH1 = TCCH1; TCH2 = TCCH2; TCCH0.NVICTCInterrupt -> HplNVICC.TC0Interrupt; TCCH0.TimerEvent -> HplSam3TCEventP.TC0Event; TCCH0.TCPClockCntl -> HplSam3uClockC.TC0PPCntl; TCCH0.ClockConfig -> HplSam3uClockC; TCCH1.NVICTCInterrupt -> HplNVICC.TC1Interrupt; TCCH1.TimerEvent -> HplSam3TCEventP.TC1Event; TCCH1.TCPClockCntl -> HplSam3uClockC.TC1PPCntl; TCCH1.ClockConfig -> HplSam3uClockC; TCCH2.NVICTCInterrupt -> HplNVICC.TC2Interrupt; TCCH2.TimerEvent -> HplSam3TCEventP.TC2Event; TCCH2.TCPClockCntl -> HplSam3uClockC.TC2PPCntl; TCCH2.ClockConfig -> HplSam3uClockC; TC0Capture = TCCH0.Capture; TC0CompareA = TCCH0.CompareA; TC0CompareB = TCCH0.CompareB; TC0CompareC = TCCH0.CompareC; TC1Capture = TCCH1.Capture; TC1CompareA = TCCH1.CompareA; TC1CompareB = TCCH1.CompareB; TC1CompareC = TCCH1.CompareC; TC2Capture = TCCH2.Capture; TC2CompareA = TCCH2.CompareA; TC2CompareB = TCCH2.CompareB; TC2CompareC = TCCH2.CompareC; components new HplSam3TCP(TC_BASE); Init = HplSam3TCP; HplSam3TCP.ClockConfig -> HplSam3uClockC; HplSam3TCP.TC0 -> TCCH0; HplSam3TCP.TC1 -> TCCH1; HplSam3TCP.TC2 -> TCCH2; TC = HplSam3TCP; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/timer/HplSam3TCEventP.nc000066400000000000000000000053731207233610700251200ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * SAM3U TC Event dispatcher. * * @author Thomas Schmid */ #include "sam3tchardware.h" module HplSam3TCEventP @safe() { provides { interface HplSam3TCEvent as TC0Event; interface HplSam3TCEvent as TC1Event; interface HplSam3TCEvent as TC2Event; } uses { interface FunctionWrapper as TC0InterruptWrapper; interface FunctionWrapper as TC1InterruptWrapper; interface FunctionWrapper as TC2InterruptWrapper; } } implementation { void TC0IrqHandler() @C() @spontaneous() { call TC0InterruptWrapper.preamble(); signal TC0Event.fired(); call TC0InterruptWrapper.postamble(); } void TC1IrqHandler() @C() @spontaneous() { call TC1InterruptWrapper.preamble(); signal TC1Event.fired(); call TC1InterruptWrapper.postamble(); } void TC2IrqHandler() @C() @spontaneous() { call TC2InterruptWrapper.preamble(); signal TC2Event.fired(); call TC2InterruptWrapper.postamble(); } default async event void TC0Event.fired() {} default async event void TC1Event.fired() {} default async event void TC2Event.fired() {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/timer/sam3rtthardware.h000066400000000000000000000037361207233610700252430ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Real-Time Timer register definitions. * * @author Thomas Schmid */ #ifndef SAM3URTTHARDWARE_H #define SAM3URTTHARDWARE_H #include "rtthardware.h" //#define RTT ((rtt_t *) 0x400E1230) // (RTTC) Base Address // Defined in AT91 ARM Coretx-M3 based Microcontrollers, SAM3U Series, // Preliminary, p. 249 volatile rtt_t* RTT = (volatile rtt_t*) 0x400E1230; #endif // SAM3URTTHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/timer/sam3tchardware.h000066400000000000000000000047361207233610700250410ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Timer Counter register definitions. * * @author Thomas Schmid */ #ifndef SAM3UTCHARDWARE_H #define SAM3UTCHARDWARE_H #include "tchardware.h" /** * TC definition capture mode */ typedef struct { volatile tc_channel_capture_t ch0; uint32_t reserved0[4]; volatile tc_channel_capture_t ch1; uint32_t reserved1[4]; volatile tc_channel_capture_t ch2; uint32_t reserved2[4]; volatile tc_bcr_t bcr; volatile tc_bmr_t bmr; volatile tc_qier_t qier; volatile tc_qidr_t qidr; volatile tc_qimr_t qimr; volatile tc_qisr_t qisr; } tc_t; /** * TC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary 9/1/09, p. 827 */ #define TC_BASE 0x40080000 #define TC_CH0_BASE 0x40080000 #define TC_CH1_BASE 0x40080040 #define TC_CH2_BASE 0x40080080 volatile tc_t* TC = (volatile tc_t*)TC_BASE; #endif //SAM3UTCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/000077500000000000000000000000001207233610700214315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwi.nc000066400000000000000000000130461207233610700240770ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ // This file shows the Hpl level commands. #include interface HplSam3uTwi{ async command void init(); async command void enableClock(); async command void disableClock(); async command void configureTwi(const sam3u_twi_union_config_t* config); /*Control Register Functions*/ async command void setStart(); async command void setStop(); async command void setMaster(); async command void disMaster(); async command void setSlave(); async command void disSlave(); async command void setQuick(); async command void swReset(); /*Master Mode Register Functions*/ async command void setDeviceAddr(uint8_t dadr); async command void setDirection(uint8_t mread); async command void addrSize(uint8_t iadrsz); /*Slave Mode Register Functions*/ async command void setSlaveAddr(uint8_t sadr); /*Internal Addr Register Functions*/ async command void setInternalAddr(uint32_t iadr); /*Clock Waveform Generator Register Functions*/ async command void setClockLowDiv(uint8_t cldiv); async command void setClockHighDiv(uint8_t chdiv); async command void setClockDiv(uint8_t ckdiv); /*Status Register Functions*/ async command twi_sr_t getStatus(); async command uint8_t getTxCompleted(twi_sr_t *sr); async command uint8_t getRxReady(twi_sr_t *sr); async command uint8_t getTxReady(twi_sr_t *sr); async command uint8_t getSlaveRead(twi_sr_t *sr); async command uint8_t getSlaveAccess(twi_sr_t *sr); async command uint8_t getGenCallAccess(twi_sr_t *sr); async command uint8_t getORErr(twi_sr_t *sr); async command uint8_t getNack(twi_sr_t *sr); async command uint8_t getArbLost(twi_sr_t *sr); async command uint8_t getClockWaitState(twi_sr_t *sr); async command uint8_t getEOSAccess(twi_sr_t *sr); async command uint8_t getEndRx(twi_sr_t *sr); async command uint8_t getEndTx(twi_sr_t *sr); async command uint8_t getRxBufFull(twi_sr_t *sr); async command uint8_t getTxBufEmpty(twi_sr_t *sr); /*Interrupt Enable Register Functions*/ async command void setIntTxComp(); async command void setIntRxReady(); async command void setIntTxReady(); async command void setIntSlaveAccess(); async command void setIntGenCallAccess(); async command void setIntORErr(); async command void setIntNack(); async command void setIntArbLost(); async command void setIntClockWaitState(); async command void setIntEOSAccess(); async command void setIntEndRx(); async command void setIntEndTx(); async command void setIntRxBufFull(); async command void setIntTxBufEmpty(); /*Interrupt Disable Register*/ async command void disableAllInterrupts(); async command void disIntTxComp(); async command void disIntRxReady(); async command void disIntTxReady(); async command void disIntSlaveAccess(); async command void disIntGenCallAccess(); async command void disIntORErr(); async command void disIntNack(); async command void disIntArbLost(); async command void disIntClockWaitState(); async command void disIntEOSAccess(); async command void disIntEndRx(); async command void disIntEndTx(); async command void disIntRxBufFull(); async command void disIntTxBufEmpty(); /*Interrupt Mask Register*/ async command uint8_t maskIntTxComp(); async command uint8_t maskIntRxReady(); async command uint8_t maskIntTxReady(); async command uint8_t maskIntSlaveAccess(); async command uint8_t maskIntGenCallAccess(); async command uint8_t maskIntORErr(); async command uint8_t maskIntNack(); async command uint8_t maskIntArbLost(); async command uint8_t maskIntClockWaitState(); async command uint8_t maskIntEOSAccess(); async command uint8_t maskIntEndRx(); async command uint8_t maskIntEndTx(); async command uint8_t maskIntRxBufFull(); async command uint8_t maskIntTxBufEmpty(); /*Receive Holding Register Function*/ async command uint8_t readRxReg(); /*Transmit Holding Register Functions*/ async command void setTxReg(uint8_t buffer); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiC.nc000066400000000000000000000043111207233610700241750ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Kevin Klues */ configuration HplSam3uTwiC { provides { interface HplSam3uTwiInterrupt as HplSam3uTwiInterrupt0; interface HplSam3uTwiInterrupt as HplSam3uTwiInterrupt1; interface HplSam3uTwi as HplSam3uTwi0; interface HplSam3uTwi as HplSam3uTwi1; } } implementation{ enum { CLIENT_ID = unique( SAM3U_HPLTWI_RESOURCE ), }; components HplSam3uTwiP as TwiP; HplSam3uTwiInterrupt0 = TwiP.HplSam3uTwiInterrupt0; HplSam3uTwiInterrupt1 = TwiP.HplSam3uTwiInterrupt1; HplSam3uTwi0 = TwiP.HplSam3uTwi0; HplSam3uTwi1 = TwiP.HplSam3uTwi1; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiImplP.nc000066400000000000000000000757561207233610700250610ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3utwihardware.h" module HplSam3uTwiImplP { provides { interface HplSam3uTwi as HplSam3uTwi0; interface HplSam3uTwi as HplSam3uTwi1; interface HplSam3uTwiInterrupt as Interrupt0; interface HplSam3uTwiInterrupt as Interrupt1; } uses { interface HplNVICInterruptCntl as Twi0Interrupt; interface HplNVICInterruptCntl as Twi1Interrupt; interface HplSam3GeneralIOPin as Twd0Pin; interface HplSam3GeneralIOPin as Twd1Pin; interface HplSam3GeneralIOPin as Twck0Pin; interface HplSam3GeneralIOPin as Twck1Pin; interface HplSam3PeripheralClockCntl as Twi0ClockControl; interface HplSam3PeripheralClockCntl as Twi1ClockControl; interface HplSam3Clock as Twi0ClockConfig; interface HplSam3Clock as Twi1ClockConfig; interface FunctionWrapper as Twi0InterruptWrapper; interface FunctionWrapper as Twi1InterruptWrapper; interface Leds; } } implementation{ void Twi0IrqHandler() @C() @spontaneous() { call Twi0InterruptWrapper.preamble(); signal Interrupt0.fired(); call Twi0InterruptWrapper.postamble(); } void Twi1IrqHandler() @C() @spontaneous() { call Twi1InterruptWrapper.preamble(); signal Interrupt1.fired(); call Twi1InterruptWrapper.postamble(); } async command void HplSam3uTwi0.disableAllInterrupts() { call HplSam3uTwi0.disIntTxComp(); call HplSam3uTwi0.disIntRxReady(); call HplSam3uTwi0.disIntTxReady(); call HplSam3uTwi0.disIntSlaveAccess(); call HplSam3uTwi0.disIntGenCallAccess(); call HplSam3uTwi0.disIntORErr(); call HplSam3uTwi0.disIntNack(); call HplSam3uTwi0.disIntArbLost(); call HplSam3uTwi0.disIntClockWaitState(); call HplSam3uTwi0.disIntEOSAccess(); call HplSam3uTwi0.disIntEndRx(); call HplSam3uTwi0.disIntEndTx(); call HplSam3uTwi0.disIntRxBufFull(); call HplSam3uTwi0.disIntTxBufEmpty(); } async command void HplSam3uTwi1.disableAllInterrupts() { call HplSam3uTwi1.disIntTxComp(); call HplSam3uTwi1.disIntRxReady(); call HplSam3uTwi1.disIntTxReady(); call HplSam3uTwi1.disIntSlaveAccess(); call HplSam3uTwi1.disIntGenCallAccess(); call HplSam3uTwi1.disIntORErr(); call HplSam3uTwi1.disIntNack(); call HplSam3uTwi1.disIntArbLost(); call HplSam3uTwi1.disIntClockWaitState(); call HplSam3uTwi1.disIntEOSAccess(); call HplSam3uTwi1.disIntEndRx(); call HplSam3uTwi1.disIntEndTx(); call HplSam3uTwi1.disIntRxBufFull(); call HplSam3uTwi1.disIntTxBufEmpty(); } async command void HplSam3uTwi0.configureTwi(const sam3u_twi_union_config_t *config){ call Twi0Interrupt.configure(IRQ_PRIO_TWI0); call Twi0Interrupt.enable(); call Twi0ClockControl.enable(); call Twd0Pin.disablePioControl(); call Twd0Pin.selectPeripheralA(); call Twck0Pin.disablePioControl(); call Twck0Pin.selectPeripheralA(); call HplSam3uTwi0.setClockLowDiv((uint8_t)config->cldiv); call HplSam3uTwi0.setClockHighDiv((uint8_t)config->chdiv); call HplSam3uTwi0.setClockDiv((uint8_t)config->ckdiv); call HplSam3uTwi0.disableAllInterrupts(); } async command void HplSam3uTwi0.disableClock(){ call Twi0ClockControl.disable(); } async command void HplSam3uTwi1.disableClock(){ call Twi1ClockControl.disable(); } async command void HplSam3uTwi0.enableClock(){ call Twi0ClockControl.enable(); } async command void HplSam3uTwi1.enableClock(){ call Twi1ClockControl.enable(); } async command void HplSam3uTwi1.configureTwi(const sam3u_twi_union_config_t *config){ call Twi1Interrupt.configure(IRQ_PRIO_TWI1); call Twi1Interrupt.enable(); call Twi1ClockControl.enable(); call Twd1Pin.disablePioControl(); call Twd1Pin.selectPeripheralA(); call Twck1Pin.disablePioControl(); call Twck1Pin.selectPeripheralA(); call HplSam3uTwi1.setClockLowDiv((uint8_t)config->cldiv); call HplSam3uTwi1.setClockHighDiv((uint8_t)config->chdiv); call HplSam3uTwi1.setClockDiv((uint8_t)config->ckdiv); call HplSam3uTwi1.disableAllInterrupts(); } async command void HplSam3uTwi0.init(){ call HplSam3uTwi0.disableAllInterrupts(); } async command void HplSam3uTwi1.init(){ call HplSam3uTwi1.disableAllInterrupts(); } async command void HplSam3uTwi0.setStart(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.start = 1; *CR = cr; } async command void HplSam3uTwi0.setStop(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.stop = 1; *CR = cr; } async command void HplSam3uTwi1.setStart(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.start = 1; *CR = cr; } async command void HplSam3uTwi1.setStop(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.stop = 1; *CR = cr; } async command void HplSam3uTwi0.setMaster(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.msen = 1; *CR = cr; } async command void HplSam3uTwi0.disMaster(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.msdis = 1; *CR = cr; } async command void HplSam3uTwi1.setMaster(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.msen = 1; *CR = cr; } async command void HplSam3uTwi1.disMaster(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.msdis = 1; *CR = cr; } async command void HplSam3uTwi0.setSlave(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.sven = 1; *CR = cr; } async command void HplSam3uTwi0.disSlave(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.svdis = 1; *CR = cr; } async command void HplSam3uTwi1.setSlave(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.sven = 1; *CR = cr; } async command void HplSam3uTwi1.disSlave(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.svdis = 1; *CR = cr; } async command void HplSam3uTwi0.setQuick(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.quick = 1; *CR = cr; } async command void HplSam3uTwi1.setQuick(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.quick = 1; *CR = cr; } async command void HplSam3uTwi0.swReset(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.swrst = 1; *CR = cr; } async command void HplSam3uTwi1.swReset(){ volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0); twi_cr_t cr; cr.bits.swrst = 1; *CR = cr; } async command void HplSam3uTwi0.setDeviceAddr(uint8_t dadr){ volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4); twi_mmr_t mmr = *MMR; mmr.bits.dadr = dadr; *MMR = mmr; } async command void HplSam3uTwi1.setDeviceAddr(uint8_t dadr){ volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI1_BASE_ADDR + 0x4); twi_mmr_t mmr = *MMR; mmr.bits.dadr = dadr; *MMR = mmr; } async command void HplSam3uTwi0.setDirection(uint8_t mread){ volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4); twi_mmr_t mmr = *MMR; mmr.bits.mread = mread; *MMR = mmr; } async command void HplSam3uTwi1.setDirection(uint8_t mread){ volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI1_BASE_ADDR + 0x4); twi_mmr_t mmr = *MMR; mmr.bits.mread = mread; *MMR = mmr; } async command void HplSam3uTwi0.addrSize(uint8_t iadrsz){ volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4); twi_mmr_t mmr = *MMR; mmr.bits.iadrsz = iadrsz; *MMR = mmr; } async command void HplSam3uTwi1.addrSize(uint8_t iadrsz){ volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI1_BASE_ADDR + 0x4); twi_mmr_t mmr = *MMR; mmr.bits.iadrsz = iadrsz; *MMR = mmr; } async command void HplSam3uTwi0.setSlaveAddr(uint8_t sadr){ volatile twi_smr_t* SMR = (volatile twi_smr_t *) (TWI0_BASE_ADDR + 0x8); twi_smr_t smr = *SMR; smr.bits.sadr = sadr; *SMR = smr; } async command void HplSam3uTwi1.setSlaveAddr(uint8_t sadr){ volatile twi_smr_t* SMR = (volatile twi_smr_t *) (TWI1_BASE_ADDR + 0x8); twi_smr_t smr = *SMR; smr.bits.sadr = sadr; *SMR = smr; } async command void HplSam3uTwi0.setInternalAddr(uint32_t iadr){ volatile twi_iadr_t* IADR = (volatile twi_iadr_t *) (TWI0_BASE_ADDR + 0xC); twi_iadr_t iadr_r = *IADR; iadr_r.bits.iadr = iadr; *IADR = iadr_r; } async command void HplSam3uTwi1.setInternalAddr(uint32_t iadr){ volatile twi_iadr_t* IADR = (volatile twi_iadr_t *) (TWI1_BASE_ADDR + 0xC); twi_iadr_t iadr_r = *IADR; iadr_r.bits.iadr = iadr; *IADR = iadr_r; } async command void HplSam3uTwi0.setClockLowDiv(uint8_t cldiv){ volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10); twi_cwgr_t cwgr = *CWGR; cwgr.bits.cldiv = cldiv; *CWGR = cwgr; } async command void HplSam3uTwi1.setClockLowDiv(uint8_t cldiv){ volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI1_BASE_ADDR + 0x10); twi_cwgr_t cwgr = *CWGR; cwgr.bits.cldiv = cldiv; *CWGR = cwgr; } async command void HplSam3uTwi0.setClockHighDiv(uint8_t chdiv){ volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10); twi_cwgr_t cwgr = *CWGR; cwgr.bits.chdiv = chdiv; *CWGR = cwgr; } async command void HplSam3uTwi1.setClockHighDiv(uint8_t chdiv){ volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI1_BASE_ADDR + 0x10); twi_cwgr_t cwgr = *CWGR; cwgr.bits.chdiv = chdiv; *CWGR = cwgr; } async command void HplSam3uTwi0.setClockDiv(uint8_t ckdiv){ volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10); twi_cwgr_t cwgr = *CWGR; cwgr.bits.ckdiv = ckdiv; *CWGR = cwgr; } async command void HplSam3uTwi1.setClockDiv(uint8_t ckdiv){ volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI1_BASE_ADDR + 0x10); twi_cwgr_t cwgr = *CWGR; cwgr.bits.ckdiv = ckdiv; *CWGR = cwgr; } async command twi_sr_t HplSam3uTwi0.getStatus() { return TWI0->sr; } async command uint8_t HplSam3uTwi0.getTxCompleted(twi_sr_t *sr){ return sr->bits.txcomp; } async command uint8_t HplSam3uTwi0.getRxReady(twi_sr_t *sr){ return sr->bits.rxrdy; } async command uint8_t HplSam3uTwi0.getTxReady(twi_sr_t *sr){ return sr->bits.txrdy; } async command uint8_t HplSam3uTwi0.getSlaveRead(twi_sr_t *sr){ return sr->bits.svread; } async command uint8_t HplSam3uTwi0.getSlaveAccess(twi_sr_t *sr){ return sr->bits.svacc; } async command uint8_t HplSam3uTwi0.getGenCallAccess(twi_sr_t *sr){ return sr->bits.gacc; } async command uint8_t HplSam3uTwi0.getORErr(twi_sr_t *sr){ return sr->bits.ovre; } async command uint8_t HplSam3uTwi0.getNack(twi_sr_t *sr){ return sr->bits.nack; } async command uint8_t HplSam3uTwi0.getArbLost(twi_sr_t *sr){ return sr->bits.arblst; } async command uint8_t HplSam3uTwi0.getClockWaitState(twi_sr_t *sr){ return sr->bits.sclws; } async command uint8_t HplSam3uTwi0.getEOSAccess(twi_sr_t *sr){ return sr->bits.eosacc; } async command uint8_t HplSam3uTwi0.getEndRx(twi_sr_t *sr){ return sr->bits.endrx; } async command uint8_t HplSam3uTwi0.getEndTx(twi_sr_t *sr){ return sr->bits.endtx; } async command uint8_t HplSam3uTwi0.getRxBufFull(twi_sr_t *sr){ return sr->bits.rxbuff; } async command uint8_t HplSam3uTwi0.getTxBufEmpty(twi_sr_t *sr){ return sr->bits.txbufe; } async command twi_sr_t HplSam3uTwi1.getStatus() { return TWI1->sr; } async command uint8_t HplSam3uTwi1.getTxCompleted(twi_sr_t *sr){ return sr->bits.txcomp; } async command uint8_t HplSam3uTwi1.getRxReady(twi_sr_t *sr){ return sr->bits.rxrdy; } async command uint8_t HplSam3uTwi1.getTxReady(twi_sr_t *sr){ return sr->bits.txrdy; } async command uint8_t HplSam3uTwi1.getSlaveRead(twi_sr_t *sr){ return sr->bits.svread; } async command uint8_t HplSam3uTwi1.getSlaveAccess(twi_sr_t *sr){ return sr->bits.svacc; } async command uint8_t HplSam3uTwi1.getGenCallAccess(twi_sr_t *sr){ return sr->bits.gacc; } async command uint8_t HplSam3uTwi1.getORErr(twi_sr_t *sr){ return sr->bits.ovre; } async command uint8_t HplSam3uTwi1.getNack(twi_sr_t *sr){ return sr->bits.nack; } async command uint8_t HplSam3uTwi1.getArbLost(twi_sr_t *sr){ return sr->bits.arblst; } async command uint8_t HplSam3uTwi1.getClockWaitState(twi_sr_t *sr){ return sr->bits.sclws; } async command uint8_t HplSam3uTwi1.getEOSAccess(twi_sr_t *sr){ return sr->bits.eosacc; } async command uint8_t HplSam3uTwi1.getEndRx(twi_sr_t *sr){ return sr->bits.endrx; } async command uint8_t HplSam3uTwi1.getEndTx(twi_sr_t *sr){ return sr->bits.endtx; } async command uint8_t HplSam3uTwi1.getRxBufFull(twi_sr_t *sr){ return sr->bits.rxbuff; } async command uint8_t HplSam3uTwi1.getTxBufEmpty(twi_sr_t *sr){ return sr->bits.txbufe; } async command void HplSam3uTwi0.setIntTxComp(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.txcomp = 1; *IER = ier; } async command void HplSam3uTwi0.setIntRxReady(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.rxrdy = 1; *IER = ier; } async command void HplSam3uTwi0.setIntTxReady(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.txrdy = 1; *IER = ier; } async command void HplSam3uTwi0.setIntSlaveAccess(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.svacc = 1; *IER = ier; } async command void HplSam3uTwi0.setIntGenCallAccess(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.gacc = 1; *IER = ier; } async command void HplSam3uTwi0.setIntORErr(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.ovre = 1; *IER = ier; } async command void HplSam3uTwi0.setIntNack(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.nack = 1; *IER = ier; } async command void HplSam3uTwi0.setIntArbLost(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.arblst = 1; *IER = ier; } async command void HplSam3uTwi0.setIntClockWaitState(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.sclws = 1; *IER = ier; } async command void HplSam3uTwi0.setIntEOSAccess(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.eosacc = 1; *IER = ier; } async command void HplSam3uTwi0.setIntEndRx(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.endrx = 1; *IER = ier; } async command void HplSam3uTwi0.setIntEndTx(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.endtx = 1; *IER = ier; } async command void HplSam3uTwi0.setIntRxBufFull(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.rxbuff = 1; *IER = ier; } async command void HplSam3uTwi0.setIntTxBufEmpty(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.txbufe = 1; *IER = ier; } async command void HplSam3uTwi1.setIntTxComp(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.txcomp = 1; *IER = ier; } async command void HplSam3uTwi1.setIntRxReady(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.rxrdy = 1; *IER = ier; } async command void HplSam3uTwi1.setIntTxReady(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.txrdy = 1; *IER = ier; } async command void HplSam3uTwi1.setIntSlaveAccess(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.svacc = 1; *IER = ier; } async command void HplSam3uTwi1.setIntGenCallAccess(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.gacc = 1; *IER = ier; } async command void HplSam3uTwi1.setIntORErr(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.ovre = 1; *IER = ier; } async command void HplSam3uTwi1.setIntNack(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.nack = 1; *IER = ier; } async command void HplSam3uTwi1.setIntArbLost(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.arblst = 1; *IER = ier; } async command void HplSam3uTwi1.setIntClockWaitState(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.sclws = 1; *IER = ier; } async command void HplSam3uTwi1.setIntEOSAccess(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.eosacc = 1; *IER = ier; } async command void HplSam3uTwi1.setIntEndRx(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.endrx = 1; *IER = ier; } async command void HplSam3uTwi1.setIntEndTx(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.endtx = 1; *IER = ier; } async command void HplSam3uTwi1.setIntRxBufFull(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.rxbuff = 1; *IER = ier; } async command void HplSam3uTwi1.setIntTxBufEmpty(){ volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24); twi_ier_t ier; ier.bits.txbufe = 1; *IER = ier; } async command void HplSam3uTwi0.disIntTxComp(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.txcomp = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntRxReady(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.rxrdy = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntTxReady(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.txrdy = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntSlaveAccess(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.svacc = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntGenCallAccess(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.gacc = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntORErr(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.ovre = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntNack(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.nack = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntArbLost(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.arblst = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntClockWaitState(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.sclws = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntEOSAccess(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.eosacc = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntEndRx(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.endrx = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntEndTx(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.endtx = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntRxBufFull(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.rxbuff = 1; *IDR = idr; } async command void HplSam3uTwi0.disIntTxBufEmpty(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.txbufe = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntTxComp(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.txcomp = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntRxReady(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.rxrdy = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntTxReady(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.txrdy = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntSlaveAccess(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.svacc = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntGenCallAccess(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.gacc = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntORErr(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.ovre = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntNack(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.nack = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntArbLost(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.arblst = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntClockWaitState(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.sclws = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntEOSAccess(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.eosacc = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntEndRx(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.endrx = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntEndTx(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.endtx = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntRxBufFull(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.rxbuff = 1; *IDR = idr; } async command void HplSam3uTwi1.disIntTxBufEmpty(){ volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28); twi_idr_t idr; idr.bits.txbufe = 1; *IDR = idr; } async command uint8_t HplSam3uTwi0.maskIntTxComp(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.txcomp; } async command uint8_t HplSam3uTwi0.maskIntRxReady(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.rxrdy; } async command uint8_t HplSam3uTwi0.maskIntTxReady(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.txrdy; } async command uint8_t HplSam3uTwi0.maskIntSlaveAccess(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.svacc; } async command uint8_t HplSam3uTwi0.maskIntGenCallAccess(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.gacc; } async command uint8_t HplSam3uTwi0.maskIntORErr(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.ovre; } async command uint8_t HplSam3uTwi0.maskIntNack(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.nack; } async command uint8_t HplSam3uTwi0.maskIntArbLost(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.arblst; } async command uint8_t HplSam3uTwi0.maskIntClockWaitState(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.sclws; } async command uint8_t HplSam3uTwi0.maskIntEOSAccess(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.eosacc; } async command uint8_t HplSam3uTwi0.maskIntEndRx(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.endrx; } async command uint8_t HplSam3uTwi0.maskIntEndTx(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.endtx; } async command uint8_t HplSam3uTwi0.maskIntRxBufFull(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.rxbuff; } async command uint8_t HplSam3uTwi0.maskIntTxBufEmpty(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C); return IMR->bits.txbufe; } async command uint8_t HplSam3uTwi1.maskIntTxComp(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.txcomp; } async command uint8_t HplSam3uTwi1.maskIntRxReady(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.rxrdy; } async command uint8_t HplSam3uTwi1.maskIntTxReady(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.txrdy; } async command uint8_t HplSam3uTwi1.maskIntSlaveAccess(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.svacc; } async command uint8_t HplSam3uTwi1.maskIntGenCallAccess(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.gacc; } async command uint8_t HplSam3uTwi1.maskIntORErr(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.ovre; } async command uint8_t HplSam3uTwi1.maskIntNack(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.nack; } async command uint8_t HplSam3uTwi1.maskIntArbLost(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.arblst; } async command uint8_t HplSam3uTwi1.maskIntClockWaitState(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.sclws; } async command uint8_t HplSam3uTwi1.maskIntEOSAccess(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.eosacc; } async command uint8_t HplSam3uTwi1.maskIntEndRx(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.endrx; } async command uint8_t HplSam3uTwi1.maskIntEndTx(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.endtx; } async command uint8_t HplSam3uTwi1.maskIntRxBufFull(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.rxbuff; } async command uint8_t HplSam3uTwi1.maskIntTxBufEmpty(){ volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C); return IMR->bits.txbufe; } async command uint8_t HplSam3uTwi0.readRxReg(){ volatile twi_rhr_t* RHR = (volatile twi_rhr_t *) (TWI0_BASE_ADDR + 0x30); return RHR->bits.rxdata; } async command uint8_t HplSam3uTwi1.readRxReg(){ volatile twi_rhr_t* RHR = (volatile twi_rhr_t *) (TWI1_BASE_ADDR + 0x30); return RHR->bits.rxdata; } async command void HplSam3uTwi0.setTxReg(uint8_t buffer){ volatile twi_thr_t* THR = (volatile twi_thr_t *) (TWI0_BASE_ADDR + 0x34); twi_thr_t thr = *THR; thr.bits.txdata = buffer; *THR = thr; } async command void HplSam3uTwi1.setTxReg(uint8_t buffer){ volatile twi_thr_t* THR = (volatile twi_thr_t *) (TWI1_BASE_ADDR + 0x34); twi_thr_t thr = *THR; thr.bits.txdata = buffer; *THR = thr; } async event void Twi0ClockConfig.mainClockChanged(){} async event void Twi1ClockConfig.mainClockChanged(){} default async event void Interrupt0.fired(){} default async event void Interrupt1.fired(){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiInterrupt.nc000066400000000000000000000032361207233610700260140ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ interface HplSam3uTwiInterrupt { async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiP.nc000066400000000000000000000055121207233610700242160ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Kevin Klues */ configuration HplSam3uTwiP { provides interface HplSam3uTwi as HplSam3uTwi0; provides interface HplSam3uTwi as HplSam3uTwi1; provides interface HplSam3uTwiInterrupt as HplSam3uTwiInterrupt0; provides interface HplSam3uTwiInterrupt as HplSam3uTwiInterrupt1; } implementation { components HplSam3uTwiImplP as HplTwiP; HplSam3uTwi0 = HplTwiP.HplSam3uTwi0; HplSam3uTwi1 = HplTwiP.HplSam3uTwi1; HplSam3uTwiInterrupt0 = HplTwiP.Interrupt0; HplSam3uTwiInterrupt1 = HplTwiP.Interrupt1; // make and connect pins/clock/interrupt for this dude components HplNVICC, HplSam3uClockC, HplSam3uGeneralIOC, LedsC, NoLedsC; HplTwiP.Twi0Interrupt -> HplNVICC.TWI0Interrupt; HplTwiP.Twi1Interrupt -> HplNVICC.TWI1Interrupt; HplTwiP.Twi0ClockControl -> HplSam3uClockC.TWI0PPCntl; HplTwiP.Twi1ClockControl -> HplSam3uClockC.TWI1PPCntl; HplTwiP.Twd0Pin -> HplSam3uGeneralIOC.HplPioA9; HplTwiP.Twd1Pin -> HplSam3uGeneralIOC.HplPioA24; HplTwiP.Twck0Pin -> HplSam3uGeneralIOC.HplPioA10; HplTwiP.Twck1Pin -> HplSam3uGeneralIOC.HplPioA25; HplTwiP.Leds -> NoLedsC; components McuSleepC; HplTwiP.Twi0InterruptWrapper -> McuSleepC; HplTwiP.Twi1InterruptWrapper -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiResourceCtrlC.nc000066400000000000000000000040701207233610700265340ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3utwihardware.h" configuration HplSam3uTwiResourceCtrlC { provides interface Resource; provides interface ResourceRequested; uses interface ResourceConfigure; } implementation{ enum { CLIENT_ID = unique( SAM3U_HPLTWI_RESOURCE ), }; components HplSam3uTwiResourceCtrlP as TwiP; Resource = TwiP.Resource[ CLIENT_ID ]; ResourceRequested = TwiP.ResourceRequested[ CLIENT_ID ]; ResourceConfigure = TwiP.ResourceConfigure[ CLIENT_ID ]; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiResourceCtrlP.nc000066400000000000000000000037051207233610700265550ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ configuration HplSam3uTwiResourceCtrlP { provides interface Resource[uint8_t id]; provides interface ResourceRequested[uint8_t id]; uses interface ResourceConfigure[uint8_t id]; } implementation { components new FcfsArbiterC( SAM3U_HPLTWI_RESOURCE ) as Arbiter; Resource = Arbiter; ResourceConfigure = Arbiter; ResourceRequested = Arbiter; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/README000066400000000000000000000006521207233610700223140ustar00rootroot00000000000000Twi Wire Interface (I2C) Implementation for SAM3U @author JeongGil Ko The implementations are based on the preliminary specifications. - The internal address features are not enabled due to the fact that the T2 interfaces do not support these as parameters. It can be easily implemented with Hpl commands. - Needs testing with onboard temperature sensor. The temperature sensor's address is 0x48. tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiC.nc000066400000000000000000000075731207233610700235460ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3utwihardware.h" configuration Sam3uTwiC{ provides interface Resource; provides interface ResourceRequested; provides interface I2CPacket as TwiBasicAddr0; provides interface I2CPacket as TwiBasicAddr1; provides interface ResourceConfigure as Configure0[ uint8_t id ]; provides interface ResourceConfigure as Configure1[ uint8_t id ]; provides interface Sam3uTwiInternalAddress as InternalAddress0; provides interface Sam3uTwiInternalAddress as InternalAddress1; uses interface Sam3uTwiConfigure as TwiConfig0; uses interface Sam3uTwiConfigure as TwiConfig1; } implementation{ enum { CLIENT_ID = unique( SAM3U_TWI_BUS ), }; components Sam3uTwiResourceCtrlC as ResourceCtrl; components HplSam3uTwiResourceCtrlC; Resource = ResourceCtrl.Resource[ CLIENT_ID ]; ResourceRequested = HplSam3uTwiResourceCtrlC; ResourceCtrl.TwiResource[ CLIENT_ID ] -> HplSam3uTwiResourceCtrlC; #ifdef SAM3U_TWI_PDC components new Sam3uTwiPDCP(0) as TwiP0; components new Sam3uTwiPDCP(1) as TwiP1; components HplSam3uPdcC; TwiP0.HplPdc -> HplSam3uPdcC.Twi0PdcControl; TwiP1.HplPdc -> HplSam3uPdcC.Twi1PdcControl; #else components new Sam3uTwiP() as TwiP0; components new Sam3uTwiP() as TwiP1; #endif TwiBasicAddr0 = TwiP0.TwiBasicAddr; TwiBasicAddr1 = TwiP1.TwiBasicAddr; TwiConfig0 = TwiP0.Sam3uTwiConfigure[ CLIENT_ID ]; TwiConfig1 = TwiP1.Sam3uTwiConfigure[ CLIENT_ID ]; InternalAddress0 = TwiP0.InternalAddr; InternalAddress1 = TwiP1.InternalAddr; Configure0 = TwiP0.ResourceConfigure; Configure1 = TwiP1.ResourceConfigure; TwiP0.ResourceConfigure[ CLIENT_ID ] <- HplSam3uTwiResourceCtrlC.ResourceConfigure; TwiP1.ResourceConfigure[ CLIENT_ID ] <- HplSam3uTwiResourceCtrlC.ResourceConfigure; components HplSam3uTwiC as HplTwiC; TwiP0.TwiInterrupt -> HplTwiC.HplSam3uTwiInterrupt0; TwiP1.TwiInterrupt -> HplTwiC.HplSam3uTwiInterrupt1; TwiP0.HplTwi -> HplTwiC.HplSam3uTwi0; TwiP1.HplTwi -> HplTwiC.HplSam3uTwi1; components BusyWaitMicroC; TwiP0.BusyWait -> BusyWaitMicroC; TwiP1.BusyWait -> BusyWaitMicroC; components new AlarmTMicro16C() as Alarm0; components new AlarmTMicro16C() as Alarm1; TwiP0.Alarm -> Alarm0; TwiP1.Alarm -> Alarm1; components LedsC; TwiP0.Leds -> LedsC; TwiP1.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiConfigure.nc000066400000000000000000000033331207233610700252730ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3utwihardware.h" interface Sam3uTwiConfigure { async command const sam3u_twi_union_config_t* getConfig(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiInternalAddress.nc000066400000000000000000000033161207233610700264350ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ interface Sam3uTwiInternalAddress { async command error_t setInternalAddr(uint32_t intAddr, uint8_t size); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiP.nc000066400000000000000000000162531207233610700235560ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko * @author Kevin Klues */ #include #include "sam3utwihardware.h" generic module Sam3uTwiP() { provides { interface I2CPacket as TwiBasicAddr; interface ResourceConfigure[uint8_t id]; interface Sam3uTwiInternalAddress as InternalAddr; } uses { interface BusyWait; interface Sam3uTwiConfigure[ uint8_t id ]; interface HplSam3uTwiInterrupt as TwiInterrupt; interface HplSam3uTwi as HplTwi; interface Alarm; interface Leds; } } implementation { enum { IDLE_STATE, TX_STATE, RX_STATE, }; norace uint8_t STATE = IDLE_STATE; const sam3u_twi_union_config_t sam3u_twi_default_config = { cldiv: 0, chdiv: 0, ckdiv: 0 }; norace i2c_flags_t FLAGS; norace uint16_t ADDR; norace uint8_t INIT_LEN; norace uint8_t* INIT_BUFFER; norace uint8_t READ; norace uint8_t WRITE; norace uint8_t IASIZE = 0; norace uint32_t INTADDR = 0; async command error_t InternalAddr.setInternalAddr(uint32_t intAddr, uint8_t size){ if(STATE == IDLE_STATE) { IASIZE = size; INTADDR = intAddr; return SUCCESS; } return FAIL; } async command void ResourceConfigure.configure[ uint8_t id ]() { const sam3u_twi_union_config_t* ONE config; config = call Sam3uTwiConfigure.getConfig[id](); call HplTwi.configureTwi(config); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { // set a parameter CLEAR! call HplTwi.configureTwi(&sam3u_twi_default_config); } async command error_t TwiBasicAddr.read(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { atomic { if(STATE != IDLE_STATE) return EBUSY; STATE = RX_STATE; } FLAGS = flags; ADDR = addr; INIT_LEN = len; INIT_BUFFER = buf; READ = 0; call HplTwi.getStatus(); if(FLAGS & I2C_START) { call HplTwi.init(); call HplTwi.disSlave(); call HplTwi.setMaster(); call HplTwi.addrSize(IASIZE); call HplTwi.setDeviceAddr((uint8_t)addr); if(IASIZE > 0) call HplTwi.setInternalAddr(INTADDR); call HplTwi.setDirection(1); // read direction call HplTwi.setStart(); } if(INIT_LEN == 1) call HplTwi.setStop(); call HplTwi.setIntNack(); call HplTwi.setIntRxReady(); return SUCCESS; } async command error_t TwiBasicAddr.write(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { atomic { if(STATE != IDLE_STATE) return EBUSY; STATE = TX_STATE; } FLAGS = flags; ADDR = addr; INIT_LEN = len; INIT_BUFFER = buf; WRITE = 0; call HplTwi.getStatus(); if(FLAGS & I2C_START) { call HplTwi.init(); call HplTwi.disSlave(); call HplTwi.setMaster(); call HplTwi.addrSize(IASIZE); call HplTwi.setDeviceAddr((uint8_t)addr); if(IASIZE > 0) call HplTwi.setInternalAddr(INTADDR); call HplTwi.setDirection(0); // write direction } call HplTwi.setTxReg((uint8_t)INIT_BUFFER[WRITE]); call HplTwi.setIntTxReady(); return SUCCESS; } void transferComplete(error_t error) { if(STATE == TX_STATE) { atomic STATE = IDLE_STATE; signal TwiBasicAddr.writeDone(error, ADDR, INIT_LEN, INIT_BUFFER); } else if(STATE == RX_STATE) { atomic STATE = IDLE_STATE; signal TwiBasicAddr.readDone(error, ADDR, INIT_LEN, INIT_BUFFER); } } void handleInterrupt(twi_sr_t *status) { call Leds.led2Toggle(); if(call HplTwi.getNack(status)) { transferComplete(FAIL); } else if(call HplTwi.getRxReady(status)) { INIT_BUFFER[READ] = call HplTwi.readRxReg(); // read out rx buffer READ++; if(READ == INIT_LEN) { call HplTwi.setIntTxComp(); return; } if(READ == (INIT_LEN-1)) { if(FLAGS & I2C_STOP) { call HplTwi.setStop(); } } call HplTwi.setIntRxReady(); } else if(call HplTwi.getTxCompleted(status)) { transferComplete(SUCCESS); } else if(call HplTwi.getTxReady(status)) { WRITE++; if(WRITE == INIT_LEN) { if(FLAGS & I2C_STOP) call HplTwi.setStop(); call HplTwi.setIntTxComp(); } else { call HplTwi.setTxReg((uint8_t)INIT_BUFFER[WRITE]); call HplTwi.setIntTxReady(); } } } async event void TwiInterrupt.fired() { twi_sr_t status; call HplTwi.disableAllInterrupts(); /* NACK errata handling */ /* Do not poll the TWI_SR */ /* Wait 3 x 9 TWCK pulse (max) 2 if IADRR not used, before reading TWI_SR */ /* From 400Khz down to 1Khz, the time to wait will be in us range.*/ // TODO: Fixme // The delay used below is specific fo 100KHz, ned to change it to depend on // the clock frequency actually specified in the configuration call HplTwi.disableClock(); //call Alarm.start(160); call BusyWait.wait(160); status = call HplTwi.getStatus(); call HplTwi.enableClock(); handleInterrupt(&status); } async event void Alarm.fired() { twi_sr_t status; call Leds.led1On(); status = call HplTwi.getStatus(); call HplTwi.enableClock(); handleInterrupt(&status); } default async command const sam3u_twi_union_config_t* Sam3uTwiConfigure.getConfig[uint8_t id]() { return &sam3u_twi_default_config; } default async event void TwiBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){} default async event void TwiBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiPDCP.nc000066400000000000000000000245571207233610700241130ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include #include "sam3utwihardware.h" generic module Sam3uTwiPDCP(uint8_t channel) { provides interface I2CPacket as TwiBasicAddr; provides interface ResourceConfigure[uint8_t id]; provides interface Sam3uTwiInternalAddress as InternalAddr; uses interface Leds; uses interface Sam3uTwiConfigure[ uint8_t id ]; uses interface HplSam3uTwiInterrupt as TwiInterrupt; uses interface HplSam3uTwi as HplTwi; uses interface HplSam3uPdc as HplPdc; } implementation { typedef enum { RX_STATE, TX_STATE, IDLE_STATE, } sam3u_twi_action_state_t; const sam3u_twi_union_config_t sam3u_twi_default_config = { cldiv: 0, chdiv: 0, ckdiv: 0 }; norace sam3u_twi_action_state_t ACTION_STATE = IDLE_STATE; norace uint16_t ADDR; norace uint8_t LEN; norace uint8_t* BUFFER; norace i2c_flags_t FLAGS; norace uint8_t* INIT_BUFFER; norace uint8_t INIT_LEN; norace uint8_t READ; norace uint8_t WRITE; norace uint8_t IASIZE = 0; norace uint32_t INTADDR = 0; void initTwi(){ switch(channel){ case 0: call HplTwi.init0(); break; case 1: call HplTwi.init1(); break; } } async command void InternalAddr.setInternalAddrSize(uint8_t size){ atomic IASIZE = size; } async command void InternalAddr.setInternalAddr(uint32_t intAddr){ atomic INTADDR = intAddr; } async command void ResourceConfigure.configure[ uint8_t id ]() { const sam3u_twi_union_config_t* ONE config; config = call Sam3uTwiConfigure.getConfig[id](); switch(channel){ case 0: call HplTwi.configureTwi0(config); call HplTwi.setInterruptID(id); break; case 1: call HplTwi.configureTwi1(config); call HplTwi.setInterruptID(id); break; } } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { switch(channel){ case 0: call HplTwi.configureTwi0(&sam3u_twi_default_config); break; case 1: call HplTwi.configureTwi1(&sam3u_twi_default_config); break; } } async command error_t TwiBasicAddr.read(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { const sam3u_twi_union_config_t* ONE config; config = call Sam3uTwiConfigure.getConfig[0](); if(ACTION_STATE != RX_STATE){ if(ACTION_STATE != IDLE_STATE){ return EBUSY; } atomic INIT_BUFFER = buf; atomic INIT_LEN = len; atomic ACTION_STATE = RX_STATE; atomic READ = 0; initTwi(); } atomic FLAGS = flags; atomic ADDR = addr; atomic LEN = len; atomic BUFFER = buf; switch(channel){ case 0: call HplTwi.disMaster0(); call HplTwi.disSlave0(); call HplTwi.setMaster0(); //set up PDC registers call HplPdc.setRxPtr(buf); call HplPdc.setRxCounter(len); //set up master read mode call HplTwi.addrSize0(IASIZE); call HplTwi.setDeviceAddr0((uint8_t)addr); // this is for the connected sensor if(IASIZE > 0) call HplTwi.setInternalAddr0(INTADDR); call HplTwi.setDirection0(1); // read direction //enable interrupt for PDC call HplTwi.setIntRxReady0(); //start the read process via pdc if(flags == I2C_START){ if(len == 1) call HplTwi.setStop0(); call HplPdc.enablePdcRx(); call HplTwi.setStart0(); } break; case 1: call HplTwi.disMaster1(); call HplTwi.disSlave1(); call HplTwi.setMaster1(); //set up PDC registers call HplPdc.setRxPtr(buf); call HplPdc.setRxCounter(len); //set up master read mode call HplTwi.addrSize1(IASIZE); call HplTwi.setDeviceAddr1((uint8_t)addr); // this is for the connected sensor if(IASIZE > 0) call HplTwi.setInternalAddr1(INTADDR); call HplTwi.setDirection1(1); // read direction //enable interrupt for PDC call HplTwi.setIntRxReady1(); //start the read process via pdc if(flags == I2C_START){ if(len == 1) call HplTwi.setStop1(); call HplPdc.enablePdcRx(); call HplTwi.setStart1(); } break; } return SUCCESS; } async command error_t TwiBasicAddr.write(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { if(ACTION_STATE != TX_STATE){ if(ACTION_STATE != IDLE_STATE){ return EBUSY; } atomic INIT_BUFFER = buf; atomic INIT_LEN = len; atomic ACTION_STATE = TX_STATE; atomic WRITE = 0; initTwi(); } atomic FLAGS = flags; atomic ADDR = addr; atomic LEN = len; atomic BUFFER = buf; switch(channel){ case 0: call HplPdc.setTxPtr(buf); call HplPdc.setTxCounter(len); call HplTwi.disSlave0(); call HplTwi.setMaster0(); call HplTwi.addrSize0(IASIZE); call HplTwi.setDeviceAddr0((uint8_t)addr); if(IASIZE > 0) call HplTwi.setInternalAddr0(INTADDR); call HplTwi.setDirection0(0); //write direction call HplTwi.setIntTxReady0(); if(flags == I2C_START){ call HplPdc.enablePdcTx(); if(len == 1){ call HplTwi.setIntTxComp0(); call HplTwi.setStop0(); } } break; case 1: call HplPdc.setTxPtr(buf); call HplPdc.setTxCounter(len); call HplTwi.disSlave1(); call HplTwi.setMaster1(); call HplTwi.addrSize1(IASIZE); call HplTwi.setDeviceAddr1((uint8_t)addr); if(IASIZE > 0) call HplTwi.setInternalAddr1(INTADDR); call HplTwi.setDirection1(0); //write direction call HplTwi.setIntTxReady1(); if(flags == I2C_START){ call HplPdc.enablePdcTx(); if(len == 1){ call HplTwi.setIntTxComp1(); call HplTwi.setStop1(); } } break; } return SUCCESS; } async event void TwiInterrupt.fired0(){ if(ACTION_STATE == RX_STATE){ if(call HplPdc.getRxCounter()){ if(call HplPdc.getRxCounter() == 1){ call HplTwi.setStop0(); } }else if(call HplPdc.getRxCounter() == 0){ atomic ACTION_STATE = IDLE_STATE; call HplPdc.disablePdcRx(); signal TwiBasicAddr.readDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER); } }else { // using PDC instead of TWI next block /***/ if(call HplPdc.getTxCounter()){ if(call HplPdc.getTxCounter() == 1){ call HplTwi.setStop0(); atomic ACTION_STATE = IDLE_STATE; call HplTwi.disIntTxReady0(); call HplTwi.disIntTxComp0(); call HplPdc.disablePdcTx(); signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER); } }else if(call HplPdc.getTxCounter() == 0){ atomic ACTION_STATE = IDLE_STATE; call HplTwi.disIntTxReady0(); call HplTwi.disIntTxComp0(); call HplPdc.disablePdcTx(); call Leds.led2Toggle(); signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER); } /***/ /**** WRITE ++; if(INIT_LEN != 1 && WRITE == INIT_LEN){ //if(INIT_LEN != 1 && call HplPdc.getTxCounter() == 0 ){ call HplTwi.disIntTxReady0(); call HplTwi.disIntTxComp0(); //call HplPdc.setTxPtr(INIT_BUFFER); //call HplPdc.setTxCounter(1); //call HplPdc.enablePdcTx(); call HplTwi.setStop0(); call HplPdc.disablePdcTx(); atomic ACTION_STATE = IDLE_STATE; signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER); call Leds.led2Toggle(); }else if( INIT_LEN == 1){ call Leds.led1Toggle(); atomic ACTION_STATE = IDLE_STATE; call HplTwi.disIntTxReady0(); call HplTwi.disIntTxComp0(); call HplPdc.disablePdcTx(); signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER); } ****/ } } async event void TwiInterrupt.fired1(){ if(ACTION_STATE == RX_STATE){ if(call HplPdc.getRxCounter()){ if(call HplPdc.getRxCounter() == 1){ call HplTwi.setStop1(); } }else if(call HplPdc.getRxCounter() == 0){ atomic ACTION_STATE = IDLE_STATE; call HplPdc.disablePdcRx(); signal TwiBasicAddr.readDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER); } }else{ WRITE ++; if(INIT_LEN != 1 && WRITE == INIT_LEN){ call HplTwi.disIntTxReady1(); call HplTwi.disIntTxComp1(); //call HplPdc.setTxPtr(INIT_BUFFER); //call HplPdc.setTxCounter(1); //call HplPdc.enablePdcTx(); call HplTwi.setStop1(); call HplPdc.disablePdcTx(); atomic ACTION_STATE = IDLE_STATE; signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER); call Leds.led0Toggle(); }else if( INIT_LEN == 1){ call Leds.led1Toggle(); atomic ACTION_STATE = IDLE_STATE; call HplTwi.disIntTxReady1(); call HplTwi.disIntTxComp1(); call HplPdc.disablePdcTx(); signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER); } } } default async command const sam3u_twi_union_config_t* Sam3uTwiConfigure.getConfig[uint8_t id]() { return &sam3u_twi_default_config; } default async event void TwiBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){} default async event void TwiBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlC.nc000066400000000000000000000036361207233610700260770ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ configuration Sam3uTwiResourceCtrlC { provides interface Resource[ uint8_t id ]; uses interface Resource as TwiResource[ uint8_t id ]; } implementation { components Sam3uTwiResourceCtrlP as TwiP; components LedsC, NoLedsC; Resource = TwiP.Resource; TwiResource = TwiP.TwiResource; TwiP.Leds -> NoLedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc000066400000000000000000000052131207233610700261050ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * @author JeongGil Ko */ #include "sam3utwihardware.h" module Sam3uTwiResourceCtrlP{ provides interface Resource[ uint8_t id ]; uses interface Resource as TwiResource[ uint8_t id ]; uses interface Leds; } implementation{ async command error_t Resource.immediateRequest[ uint8_t id ]() { return call TwiResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call TwiResource.request[ id ](); } async command bool Resource.isOwner[ uint8_t id ]() { return call TwiResource.isOwner[ id ](); } async command error_t Resource.release[ uint8_t id ]() { return call TwiResource.release[ id ](); } event void TwiResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } default async command error_t TwiResource.request[ uint8_t id ]() { return FAIL; } default async command error_t TwiResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t TwiResource.release[ uint8_t id ]() {return FAIL;} default event void Resource.granted[ uint8_t id ]() {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/twi/sam3utwihardware.h000066400000000000000000000177111207233610700251030ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * TWI register definitions. * * @author JeongGil Ko */ #ifndef _SAM3UTWIHARDWARE_H #define _SAM3UTWIHARDWARE_H /** * TWI Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 665 */ typedef union { uint32_t flat; struct { uint32_t start : 1; uint32_t stop : 1; uint32_t msen : 1; uint32_t msdis : 1; uint32_t sven : 1; uint32_t svdis : 1; uint32_t quick : 1; uint32_t swrst : 1; uint32_t reserved0 : 8; uint32_t reserved1 : 16; } __attribute__((__packed__)) bits; } twi_cr_t; /** * TWI Master Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 667 */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 8; uint32_t iadrsz : 2; uint32_t reserved1 : 2; uint32_t mread : 1; uint32_t reserved2 : 3; uint32_t dadr : 7; uint32_t reserved3 : 1; uint32_t reserved4 : 8; } __attribute__((__packed__)) bits; } twi_mmr_t; /** * TWI Slave Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 668 */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 16; uint32_t sadr : 7; uint32_t reserved1 : 1; uint32_t reserved2 : 8; } __attribute__((__packed__)) bits; } twi_smr_t; /** * TWI Internal Address Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 669 */ typedef union { uint32_t flat; struct { uint32_t iadr : 24; uint32_t reserved0 : 8; } __attribute__((__packed__)) bits; } twi_iadr_t; /** * TWI Clock Waveform Generator Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 670 */ typedef union { uint32_t flat; struct { uint32_t cldiv : 8; uint32_t chdiv : 8; uint32_t ckdiv : 3; uint32_t reserved0 : 5; uint32_t reserved1 : 8; } __attribute__((__packed__)) bits; } twi_cwgr_t; /** * TWI Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 671 */ typedef union { uint32_t flat; struct { uint32_t txcomp : 1; uint32_t rxrdy : 1; uint32_t txrdy : 1; uint32_t svread : 1; uint32_t svacc : 1; uint32_t gacc : 1; uint32_t ovre : 1; uint32_t reserved0 : 1; uint32_t nack : 1; uint32_t arblst : 1; uint32_t sclws : 1; uint32_t eosacc : 1; uint32_t endrx : 1; uint32_t endtx : 1; uint32_t rxbuff : 1; uint32_t txbufe : 1; uint32_t reserved1 : 16; } __attribute__((__packed__)) bits; } twi_sr_t; /** * TWI Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 675 */ typedef union { uint32_t flat; struct { uint32_t txcomp : 1; uint32_t rxrdy : 1; uint32_t txrdy : 1; uint32_t reserved0 : 1; uint32_t svacc : 1; uint32_t gacc : 1; uint32_t ovre : 1; uint32_t reserved1 : 1; uint32_t nack : 1; uint32_t arblst : 1; uint32_t sclws : 1; uint32_t eosacc : 1; uint32_t endrx : 1; uint32_t endtx : 1; uint32_t rxbuff : 1; uint32_t txbufe : 1; uint32_t reserved2 : 16; } __attribute__((__packed__)) bits; } twi_ier_t; /** * TWI Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 676 */ typedef union { uint32_t flat; struct { uint8_t txcomp : 1; uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t reserved0 : 1; uint8_t svacc : 1; uint8_t gacc : 1; uint8_t ovre : 1; uint8_t reserved1 : 1; uint8_t nack : 1; uint8_t arblst : 1; uint8_t sclws : 1; uint8_t eosacc : 1; uint8_t endrx : 1; uint8_t endtx : 1; uint8_t rxbuff : 1; uint8_t txbufe : 1; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } twi_idr_t; /** * TWI Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 677 */ typedef union { uint32_t flat; struct { uint32_t txcomp : 1; uint32_t rxrdy : 1; uint32_t txrdy : 1; uint32_t reserved0 : 1; uint32_t svacc : 1; uint32_t gacc : 1; uint32_t ovre : 1; uint32_t reserved1 : 1; uint32_t nack : 1; uint32_t arblst : 1; uint32_t sclws : 1; uint32_t eosacc : 1; uint32_t endrx : 1; uint32_t endtx : 1; uint32_t rxbuff : 1; uint32_t txbufe : 1; uint32_t reserved2 : 16; } __attribute__((__packed__)) bits; } twi_imr_t; /** * TWI Receive Holding Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 678 */ typedef union { uint32_t flat; struct { uint32_t rxdata : 8; uint32_t reserved0 : 8; uint32_t reserved1 : 16; } __attribute__((__packed__)) bits; } twi_rhr_t; /** * TWI Transmit Holding Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 678 */ typedef union { uint32_t flat; struct { uint32_t txdata : 8; uint32_t reserved0 : 8; uint32_t reserved1 : 16; } __attribute__((__packed__)) bits; } twi_thr_t; /** * TWI Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 664 */ typedef struct twi { volatile twi_cr_t cr; volatile twi_mmr_t mmr; volatile twi_smr_t smr; volatile twi_iadr_t iadr; volatile twi_cwgr_t cwgr; uint32_t reserved0[3]; volatile twi_sr_t sr; volatile twi_ier_t ier; volatile twi_idr_t idr; volatile twi_imr_t imr; volatile twi_rhr_t rhr; volatile twi_thr_t thr; } twi_t; volatile twi_t* TWI0 = (volatile twi_t*) 0x40084000; // base addr for twi0 volatile twi_t* TWI1 = (volatile twi_t*) 0x40088000; // base addr for twi1 #define TWI0_BASE_ADDR 0x40084000 #define TWI1_BASE_ADDR 0x40088000 #define SAM3U_TWI_BUS "SAM3UTWI.Resource" #define SAM3U_HPLTWI_RESOURCE "SAM3UTWI.Resource" typedef struct { unsigned int cldiv :8; unsigned int chdiv :8; unsigned int ckdiv :3; } sam3u_twi_union_config_t; #endif // _SAM3UTWIHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/uart/000077500000000000000000000000001207233610700216015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/uart/HilSam3UartC.nc000066400000000000000000000051301207233610700243210ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Wanja Hofer */ configuration HilSam3UartC { provides { interface StdControl; interface UartByte; interface UartStream; } } implementation { components HilSam3UartP; StdControl = HilSam3UartP; UartByte = HilSam3UartP; UartStream = HilSam3UartP; components HplSam3UartC; HilSam3UartP.HplSam3UartInterrupts -> HplSam3UartC; HilSam3UartP.HplSam3UartStatus -> HplSam3UartC; HilSam3UartP.HplSam3UartControl -> HplSam3UartC; HilSam3UartP.HplSam3UartConfig -> HplSam3UartC; #ifdef THREADS components PlatformInterruptC; HplSam3UartC.PlatformInterrupt -> PlatformInterruptC; #endif components MainC; MainC.SoftwareInit -> HilSam3UartP.Init; components HplNVICC; HilSam3UartP.UartIrqControl -> HplNVICC.DBGUInterrupt; components HplSam3uGeneralIOC; HilSam3UartP.UartPin1 -> HplSam3uGeneralIOC.HplPioA11; HilSam3UartP.UartPin2 -> HplSam3uGeneralIOC.HplPioA12; components HplSam3uClockC; HilSam3UartP.UartClockControl -> HplSam3uClockC.DBGUPPCntl; HilSam3UartP.ClockConfig -> HplSam3uClockC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/uart/sam3uarthardware.h000066400000000000000000000054201207233610700252300ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Definitions specific to the SAM3U UART chip. * * @author Wanja Hofer */ #ifndef SAM3UUARTHARDWARE_H #define SAM3UUARTHARDWARE_H #include "uarthardware.h" // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 667 volatile uint32_t* UART_BASE = (volatile uint32_t *) 0x400e0600; volatile uart_cr_t* UART_CR = (volatile uart_cr_t*) 0x400e0600; // control, wo volatile uart_mr_t* UART_MR = (volatile uart_mr_t*) 0x400e0604; // mode, rw, reset 0x0 volatile uart_ier_t* UART_IER = (volatile uart_ier_t*) 0x400e0608; // interrupt enable, wo volatile uart_idr_t* UART_IDR = (volatile uart_idr_t*) 0x400e060c; // interrupt disable, wo volatile uart_imr_t* UART_IMR = (volatile uart_imr_t*) 0x400e0610; // interrupt mask, ro, reset 0x0 volatile uart_sr_t* UART_SR = (volatile uart_sr_t*) 0x400e0614; // status, ro volatile uart_rhr_t* UART_RHR = (volatile uart_rhr_t*) 0x400e0618; // receive holding, ro, reset 0x0 volatile uart_thr_t* UART_THR = (volatile uart_thr_t*) 0x400e061c; // transmit holding, wo volatile uart_brgr_t* UART_BRGR = (volatile uart_brgr_t*) 0x400e0620; // baud rate generator, rw, reset 0x0 #endif // SAM3UUARTHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/000077500000000000000000000000001207233610700217645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart0C.nc000066400000000000000000000044631207233610700251530ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ configuration HplSam3uUsart0C{ provides interface HplSam3uUsartControl; } implementation{ components HplSam3uUsart0P as UsartP; HplSam3uUsartControl = UsartP.Usart; components HplSam3uGeneralIOC, HplSam3uClockC, HplNVICC; UsartP.USART_CTS0 -> HplSam3uGeneralIOC.HplPioB8; UsartP.USART_RTS0 -> HplSam3uGeneralIOC.HplPioB7; UsartP.USART_RXD0 -> HplSam3uGeneralIOC.HplPioA19; UsartP.USART_SCK0 -> HplSam3uGeneralIOC.HplPioA17; UsartP.USART_TXD0 -> HplSam3uGeneralIOC.HplPioA18; UsartP.USARTClockControl0 -> HplSam3uClockC.US0PPCntl; UsartP.USARTInterrupt0 -> HplNVICC.US1Interrupt; UsartP.ClockConfig -> HplSam3uClockC; components McuSleepC; UsartP.Usart0InterruptWrapper -> McuSleepC; components LedsC; UsartP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart0P.nc000066400000000000000000000212151207233610700251620ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include module HplSam3uUsart0P{ provides interface HplSam3uUsartControl as Usart; uses{ interface HplNVICInterruptCntl as USARTInterrupt0; interface HplSam3GeneralIOPin as USART_CTS0; interface HplSam3GeneralIOPin as USART_RTS0; interface HplSam3GeneralIOPin as USART_RXD0; interface HplSam3GeneralIOPin as USART_SCK0; interface HplSam3GeneralIOPin as USART_TXD0; interface HplSam3PeripheralClockCntl as USARTClockControl0; interface HplSam3Clock as ClockConfig; interface FunctionWrapper as Usart0InterruptWrapper; interface Leds; } } implementation{ #define USART0_BASE_ADDR 0x40090000 enum{ S_READ, S_WRITE, S_IDLE, }; uint8_t STATE; void enableInterruptRead(){ // enables interrupt for read volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART0_BASE_ADDR + 0x8); usart_ier_t ier = *IER; ier.bits.endrx = 1; *IER = ier; } void enableInterruptWrite(){ // enables interrupt for write volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART0_BASE_ADDR + 0x8); usart_ier_t ier = *IER; ier.bits.endtx = 1; *IER = ier; } void disableInterrupt(){ // disable all interrupts volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART0_BASE_ADDR + 0xC); usart_idr_t idr = *IDR; idr.bits.endtx = 1; idr.bits.endrx = 1; *IDR = idr; } command void Usart.init(){ // init pins and clock call USARTInterrupt0.configure(IRQ_PRIO_USART1); call USARTInterrupt0.enable(); call USARTClockControl0.enable(); call USART_CTS0.disablePioControl(); call USART_CTS0.selectPeripheralA(); call USART_RTS0.disablePioControl(); call USART_RTS0.selectPeripheralA(); call USART_RXD0.disablePioControl(); call USART_RXD0.selectPeripheralA(); call USART_SCK0.disablePioControl(); call USART_SCK0.selectPeripheralA(); call USART_TXD0.disablePioControl(); call USART_TXD0.selectPeripheralA(); } command void Usart.configure(uint32_t mode, uint32_t baudrate){ //configure control mode and baud rate volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0); usart_cr_t cr = *CR; volatile usart_mr_t *MR = (volatile usart_mr_t*) (USART0_BASE_ADDR + 0x4); usart_mr_t mr = *MR; volatile usart_brgr_t *BRGR = (volatile usart_brgr_t*) (USART0_BASE_ADDR + 0x20); usart_brgr_t brgr = *BRGR; uint32_t cd; uint32_t masterClock = call ClockConfig.getMainClockSpeed(); cd = (masterClock * 1000 / baudrate) / 16; cr.bits.rsttx = 1; cr.bits.rstrx = 1; cr.bits.rxdis = 1; cr.bits.txdis = 1; *CR = cr; mr = (usart_mr_t) mode; *MR = mr; if(mr.bits.sync_cpha == 0 && mr.bits.over == 0){ // Async mode and no oversampling brgr.bits.fp = 0; brgr.bits.cd = cd; // check 35.7.9 of sam3u specs for other modes *BRGR = brgr; } STATE = S_IDLE; } command void Usart.enableTx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0); usart_cr_t cr; cr.bits.txdis = 0; *CR = cr; cr.bits.txen = 1; *CR = cr; } command void Usart.disableTx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.txdis = 1; *CR = cr; } command void Usart.enableRx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.rxen = 1; *CR = cr; } command void Usart.enableRxInterrupt(){ enableInterruptRead(); } command void Usart.enableTxInterrupt(){ enableInterruptWrite(); } command void Usart.disableRx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.rxdis = 1; *CR = cr; } command error_t Usart.write(uint8_t sync, uint16_t data, uint32_t timeout){ volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART0_BASE_ADDR + 0x1C); usart_thr_t thr = *THR; call Usart.enableTx(); thr.bits.txsynh = sync; thr.bits.txchr = data; *THR = thr; // enable interrupts here! STATE = S_WRITE; enableInterruptWrite(); return SUCCESS; } command error_t Usart.read(uint16_t *data, uint32_t timeout){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART0_BASE_ADDR + 0x18); usart_rhr_t rhr = *RHR; /* if(timeout == 0){ while(csr.bits.rxrdy == 0); }else{ while(csr.bits.rxrdy == 0){ timeout --; if(timeout == 0) return FAIL; } } */ STATE = S_READ; *data = rhr.bits.rxchr; //&recv_data = data; // enable interrupts here! enableInterruptRead(); return SUCCESS; } command bool Usart.isDataAvailable(){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; if(csr.bits.rxrdy != 0) return TRUE; else return FALSE; } command void Usart.setIrdaFilter(uint32_t filter){ volatile usart_if_t *IF = (volatile usart_if_t*) (USART0_BASE_ADDR + 0x4C); usart_if_t if_usart = *IF; if_usart = (usart_if_t) filter; *IF = if_usart; } command error_t Usart.putChar(uint8_t sync, uint16_t data){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART0_BASE_ADDR + 0x1C); usart_thr_t thr = *THR; while(csr.bits.txempty == 0); thr.bits.txsynh = sync; thr.bits.txchr = data; *THR = thr; csr = *CSR; while(csr.bits.txempty == 0); STATE = S_WRITE; // enable interrupts here! enableInterruptWrite(); return SUCCESS; } command bool Usart.isRxReady(){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; if(csr.bits.rxrdy != 0) return FALSE; else return TRUE; } command error_t Usart.getChar(uint16_t *data){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART0_BASE_ADDR + 0x18); usart_rhr_t rhr = *RHR; while(csr.bits.rxrdy == 0); *data = rhr.bits.rxchr; STATE = S_READ; // enable interrupts here! enableInterruptRead(); return SUCCESS; } __attribute__((interrupt)) void Usart1IrqHandler() @C() @spontaneous(){ uint8_t recv_data; atomic { call Usart0InterruptWrapper.preamble(); disableInterrupt(); } if(STATE == S_WRITE && CSR->bits.txrdy){ signal Usart.writeDone(); // tx done }else if(CSR->bits.rxrdy){ atomic recv_data = (uint8_t) RHR->bits.rxchr; signal Usart.readDone(recv_data); } atomic { STATE = S_IDLE; enableInterruptRead(); call Usart0InterruptWrapper.postamble(); } } async event void ClockConfig.mainClockChanged() {}; default event void Usart.writeDone(){} default event void Usart.readDone(uint8_t data){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart1C.nc000066400000000000000000000044661207233610700251570ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ configuration HplSam3uUsart1C{ provides interface HplSam3uUsartControl; } implementation{ components HplSam3uUsart1P as UsartP; HplSam3uUsartControl = UsartP.Usart; components HplSam3uGeneralIOC, HplSam3uClockC, HplNVICC; UsartP.USART_CTS1 -> HplSam3uGeneralIOC.HplPioA23; UsartP.USART_RTS1 -> HplSam3uGeneralIOC.HplPioA22; UsartP.USART_RXD1 -> HplSam3uGeneralIOC.HplPioA21; UsartP.USART_SCK1 -> HplSam3uGeneralIOC.HplPioA24; UsartP.USART_TXD1 -> HplSam3uGeneralIOC.HplPioA20; UsartP.USARTClockControl1 -> HplSam3uClockC.US1PPCntl; UsartP.USARTInterrupt1 -> HplNVICC.US1Interrupt; UsartP.ClockConfig -> HplSam3uClockC; components McuSleepC; UsartP.Usart1InterruptWrapper -> McuSleepC; components LedsC; UsartP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart1P.nc000066400000000000000000000224671207233610700251750ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include module HplSam3uUsart1P{ provides interface HplSam3uUsartControl as Usart; uses{ interface HplNVICInterruptCntl as USARTInterrupt1; interface HplSam3GeneralIOPin as USART_CTS1; interface HplSam3GeneralIOPin as USART_RTS1; interface HplSam3GeneralIOPin as USART_RXD1; interface HplSam3GeneralIOPin as USART_SCK1; interface HplSam3GeneralIOPin as USART_TXD1; interface HplSam3PeripheralClockCntl as USARTClockControl1; interface HplSam3Clock as ClockConfig; interface FunctionWrapper as Usart1InterruptWrapper; interface Leds; } } implementation{ #define USART1_BASE_ADDR 0x40094000 enum{ S_READ, S_WRITE, S_IDLE, }; uint8_t STATE; void enableInterruptRead(){ // enables interrupt for read volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART1_BASE_ADDR + 0x8); usart_ier_t ier = *IER; ier.bits.rxrdy = 1; *IER = ier; } void enableInterruptWrite(){ // enables interrupt for write volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART1_BASE_ADDR + 0x8); usart_ier_t ier = *IER; //ier.flat = 0xFFFFFFFF; ier.bits.txrdy = 1; *IER = ier; } void disableInterrupt(){ // disable all interrupts volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART1_BASE_ADDR + 0xC); usart_idr_t idr = *IDR; idr.bits.txrdy = 1; idr.bits.rxrdy = 1; *IDR = idr; } void disableRxInterrupt(){ volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART1_BASE_ADDR + 0xC); usart_idr_t idr = *IDR; idr.bits.rxrdy = 1; *IDR = idr; } void disableTxInterrupt(){ volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART1_BASE_ADDR + 0xC); usart_idr_t idr = *IDR; idr.bits.txrdy = 1; *IDR = idr; } command void Usart.init(){ // init pins and clock call USART_CTS1.disablePioControl(); call USART_CTS1.selectPeripheralB(); call USART_RTS1.disablePioControl(); call USART_RTS1.selectPeripheralB(); call USART_RXD1.disablePioControl(); call USART_RXD1.selectPeripheralA(); call USART_SCK1.disablePioControl(); call USART_SCK1.selectPeripheralB(); call USART_TXD1.disablePioControl(); call USART_TXD1.selectPeripheralA(); call USARTClockControl1.enable(); } command void Usart.configure(uint32_t mode, uint32_t baudrate){ //configure control mode and baud rate volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0); usart_cr_t cr = *CR; volatile usart_mr_t *MR = (volatile usart_mr_t*) (USART1_BASE_ADDR + 0x4); usart_mr_t mr = *MR; volatile usart_brgr_t *BRGR = (volatile usart_brgr_t*) (USART1_BASE_ADDR + 0x20); usart_brgr_t brgr = *BRGR; uint32_t cd; uint32_t masterClock = call ClockConfig.getMainClockSpeed(); cd = (masterClock * 1000 / baudrate) / 16; cr.bits.rsttx = 1; cr.bits.rstrx = 1; cr.bits.rxdis = 1; cr.bits.txdis = 1; *CR = cr; mr = (usart_mr_t) mode; *MR = mr; if(mr.bits.sync_cpha == 0 && mr.bits.over == 0){ // Async mode and no oversampling brgr.bits.fp = 0; brgr.bits.cd = cd; // check 35.7.9 of sam3u specs for other modes *BRGR = brgr; } call USARTInterrupt1.configure(IRQ_PRIO_USART1); call USARTInterrupt1.enable(); STATE = S_IDLE; } command void Usart.enableTx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0); usart_cr_t cr; cr.bits.txdis = 0; *CR = cr; cr.bits.txen = 1; *CR = cr; } command void Usart.disableTx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.txdis = 1; *CR = cr; } command void Usart.enableRx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.rxen = 1; *CR = cr; call Usart.enableRxInterrupt(); } command void Usart.enableRxInterrupt(){ enableInterruptRead(); } command void Usart.enableTxInterrupt(){ enableInterruptWrite(); } command void Usart.disableRx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.rxdis = 1; *CR = cr; } command error_t Usart.write(uint8_t sync, uint16_t data, uint32_t timeout){ volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART1_BASE_ADDR + 0x1C); usart_thr_t thr = *THR; call Usart.enableTx(); STATE = S_WRITE; thr.bits.txsynh = sync; thr.bits.txchr = data; *THR = thr; enableInterruptWrite(); // enable interrupts here! return SUCCESS; } command error_t Usart.read(uint16_t *data, uint32_t timeout){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART1_BASE_ADDR + 0x18); usart_rhr_t rhr = *RHR; /* if(timeout == 0){ while(csr.bits.rxrdy == 0); }else{ while(csr.bits.txrdy == 0){ timeout --; if(timeout == 0) return FAIL; } } */ STATE = S_READ; *data = rhr.bits.rxchr; //&recv_data = data; // enable interrupts here! //enableInterruptRead(); return SUCCESS; } command bool Usart.isDataAvailable(){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; if(csr.bits.rxrdy != 0) return TRUE; else return FALSE; } command void Usart.setIrdaFilter(uint32_t filter){ volatile usart_if_t *IF = (volatile usart_if_t*) (USART1_BASE_ADDR + 0x4C); usart_if_t if_usart = *IF; if_usart = (usart_if_t) filter; *IF = if_usart; } command error_t Usart.putChar(uint8_t sync, uint16_t data){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART1_BASE_ADDR + 0x1C); usart_thr_t thr = *THR; while(csr.bits.txempty == 0); thr.bits.txsynh = sync; thr.bits.txchr = data; *THR = thr; csr = *CSR; while(csr.bits.txempty == 0); STATE = S_WRITE; // enable interrupts here! enableInterruptWrite(); return SUCCESS; } command bool Usart.isRxReady(){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; if(csr.bits.rxrdy != 0) return FALSE; else return TRUE; } command error_t Usart.getChar(uint16_t *data){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART1_BASE_ADDR + 0x18); usart_rhr_t rhr = *RHR; while(csr.bits.rxrdy == 0); *data = rhr.bits.rxchr; STATE = S_READ; // enable interrupts here! enableInterruptRead(); return SUCCESS; } volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART1_BASE_ADDR + 0x18); volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14); uint16_t recv_data; task void readDoneTask(){ signal Usart.readDone((uint8_t)recv_data); } __attribute__((interrupt)) void Usart1IrqHandler() @C() @spontaneous(){ atomic { call Usart1InterruptWrapper.preamble(); disableInterrupt(); } if(CSR->bits.rxrdy){ atomic recv_data = RHR->bits.rxchr; signal Usart.readDone((uint8_t)recv_data); }else if(STATE == S_WRITE && CSR->bits.txrdy){ signal Usart.writeDone(); // tx done } atomic { STATE = S_IDLE; enableInterruptRead(); call Usart1InterruptWrapper.postamble(); } } async event void ClockConfig.mainClockChanged() {}; default event void Usart.writeDone(){} default event void Usart.readDone(uint8_t data){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart2C.nc000066400000000000000000000044671207233610700251610ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ configuration HplSam3uUsart2C{ provides interface HplSam3uUsartControl; } implementation{ components HplSam3uUsart2P as UsartP; HplSam3uUsartControl = UsartP.Usart; components HplSam3uGeneralIOC, HplSam3uClockC, HplNVICC; UsartP.USART_CTS2 -> HplSam3uGeneralIOC.HplPioB22; UsartP.USART_RTS2 -> HplSam3uGeneralIOC.HplPioB21; UsartP.USART_RXD2 -> HplSam3uGeneralIOC.HplPioA23; UsartP.USART_SCK2 -> HplSam3uGeneralIOC.HplPioA25; UsartP.USART_TXD2 -> HplSam3uGeneralIOC.HplPioA22; UsartP.USARTClockControl2 -> HplSam3uClockC.US2PPCntl; UsartP.USARTInterrupt2 -> HplNVICC.US1Interrupt; UsartP.ClockConfig -> HplSam3uClockC; components McuSleepC; UsartP.Usart2InterruptWrapper -> McuSleepC; components LedsC; UsartP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart2P.nc000066400000000000000000000212151207233610700251640ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include module HplSam3uUsart2P{ provides interface HplSam3uUsartControl as Usart; uses{ interface HplNVICInterruptCntl as USARTInterrupt2; interface HplSam3GeneralIOPin as USART_CTS2; interface HplSam3GeneralIOPin as USART_RTS2; interface HplSam3GeneralIOPin as USART_RXD2; interface HplSam3GeneralIOPin as USART_SCK2; interface HplSam3GeneralIOPin as USART_TXD2; interface HplSam3PeripheralClockCntl as USARTClockControl2; interface HplSam3Clock as ClockConfig; interface FunctionWrapper as Usart2InterruptWrapper; interface Leds; } } implementation{ #define USART2_BASE_ADDR 0x40098000 enum{ S_READ, S_WRITE, S_IDLE, }; uint8_t STATE; void enableInterruptRead(){ // enables interrupt for read volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART2_BASE_ADDR + 0x8); usart_ier_t ier = *IER; ier.bits.endrx = 1; *IER = ier; } void enableInterruptWrite(){ // enables interrupt for write volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART2_BASE_ADDR + 0x8); usart_ier_t ier = *IER; ier.bits.endtx = 1; *IER = ier; } void disableInterrupt(){ // disable all interrupts volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART2_BASE_ADDR + 0xC); usart_idr_t idr = *IDR; idr.bits.endtx = 1; idr.bits.endrx = 1; *IDR = idr; } command void Usart.init(){ // init pins and clock call USARTInterrupt2.configure(IRQ_PRIO_USART2); call USARTInterrupt2.enable(); call USARTClockControl2.enable(); call USART_CTS2.disablePioControl(); call USART_CTS2.selectPeripheralB(); call USART_RTS2.disablePioControl(); call USART_RTS2.selectPeripheralB(); call USART_RXD2.disablePioControl(); call USART_RXD2.selectPeripheralA(); call USART_SCK2.disablePioControl(); call USART_SCK2.selectPeripheralB(); call USART_TXD2.disablePioControl(); call USART_TXD2.selectPeripheralA(); } command void Usart.configure(uint32_t mode, uint32_t baudrate){ //configure control mode and baud rate volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0); usart_cr_t cr = *CR; volatile usart_mr_t *MR = (volatile usart_mr_t*) (USART2_BASE_ADDR + 0x4); usart_mr_t mr = *MR; volatile usart_brgr_t *BRGR = (volatile usart_brgr_t*) (USART2_BASE_ADDR + 0x20); usart_brgr_t brgr = *BRGR; uint32_t cd; uint32_t masterClock = call ClockConfig.getMainClockSpeed(); cd = (masterClock * 1000 / baudrate) / 16; cr.bits.rsttx = 1; cr.bits.rstrx = 1; cr.bits.rxdis = 1; cr.bits.txdis = 1; *CR = cr; mr = (usart_mr_t) mode; *MR = mr; if(mr.bits.sync_cpha == 0 && mr.bits.over == 0){ // Async mode and no oversampling brgr.bits.fp = 0; brgr.bits.cd = cd; // check 35.7.9 of sam3u specs for other modes *BRGR = brgr; } STATE = S_IDLE; } command void Usart.enableTx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0); usart_cr_t cr; cr.bits.txdis = 0; *CR = cr; cr.bits.txen = 1; *CR = cr; } command void Usart.disableTx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.txdis = 1; *CR = cr; } command void Usart.enableRx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.rxen = 1; *CR = cr; } command void Usart.enableRxInterrupt(){ enableInterruptRead(); } command void Usart.enableTxInterrupt(){ enableInterruptWrite(); } command void Usart.disableRx(){ volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0); usart_cr_t cr = *CR; cr.bits.rxdis = 1; *CR = cr; } command error_t Usart.write(uint8_t sync, uint16_t data, uint32_t timeout){ volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART2_BASE_ADDR + 0x1C); usart_thr_t thr = *THR; call Usart.enableTx(); thr.bits.txsynh = sync; thr.bits.txchr = data; *THR = thr; // enable interrupts here! STATE = S_WRITE; enableInterruptWrite(); return SUCCESS; } command error_t Usart.read(uint16_t *data, uint32_t timeout){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART2_BASE_ADDR + 0x18); usart_rhr_t rhr = *RHR; /* if(timeout == 0){ while(csr.bits.rxrdy == 0); }else{ while(csr.bits.txrdy == 0){ timeout --; if(timeout == 0) return FAIL; } } */ STATE = S_READ; *data = rhr.bits.rxchr; //&recv_data = data; // enable interrupts here! enableInterruptRead(); return SUCCESS; } command bool Usart.isDataAvailable(){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; if(csr.bits.rxrdy != 0) return TRUE; else return FALSE; } command void Usart.setIrdaFilter(uint32_t filter){ volatile usart_if_t *IF = (volatile usart_if_t*) (USART2_BASE_ADDR + 0x4C); usart_if_t if_usart = *IF; if_usart = (usart_if_t) filter; *IF = if_usart; } command error_t Usart.putChar(uint8_t sync, uint16_t data){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART2_BASE_ADDR + 0x1C); usart_thr_t thr = *THR; while(csr.bits.txempty == 0); thr.bits.txsynh = sync; thr.bits.txchr = data; *THR = thr; csr = *CSR; while(csr.bits.txempty == 0); STATE = S_WRITE; // enable interrupts here! enableInterruptWrite(); return SUCCESS; } command bool Usart.isRxReady(){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; if(csr.bits.rxrdy != 0) return FALSE; else return TRUE; } command error_t Usart.getChar(uint16_t *data){ volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14); usart_csr_t csr = *CSR; volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART2_BASE_ADDR + 0x18); usart_rhr_t rhr = *RHR; while(csr.bits.rxrdy == 0); *data = rhr.bits.rxchr; STATE = S_READ; // enable interrupts here! enableInterruptRead(); return SUCCESS; } __attribute__((interrupt)) void Usart1IrqHandler() @C() @spontaneous(){ uint8_t recv_data; atomic { call Usart2InterruptWrapper.preamble(); disableInterrupt(); } if(STATE == S_WRITE && CSR->bits.txrdy){ signal Usart.writeDone(); // tx done }else if(CSR->bits.rxrdy){ atomic recv_data = (uint8_t) RHR->bits.rxchr; signal Usart.readDone(recv_data); } atomic { STATE = S_IDLE; enableInterruptRead(); call Usart2InterruptWrapper.postamble(); } } async event void ClockConfig.mainClockChanged() {}; default event void Usart.writeDone(){} default event void Usart.readDone(uint8_t data){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsartControl.nc000066400000000000000000000043651207233610700263320ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ interface HplSam3uUsartControl{ command void init(); command void configure(uint32_t mode, uint32_t baudrate); command void enableTx(); command void disableTx(); command void enableTxInterrupt(); command void enableRx(); command void enableRxInterrupt(); command void disableRx(); command error_t write(uint8_t sync, uint16_t data, uint32_t timeout); command error_t read(uint16_t *data, uint32_t timeout); command bool isDataAvailable(); command void setIrdaFilter(uint32_t filter); command error_t putChar(uint8_t sync, uint16_t data); command bool isRxReady(); command error_t getChar(uint16_t *data); event void writeDone(); event void readDone(uint8_t data); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart.nc000066400000000000000000000036761207233610700243310ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ interface Sam3uUsart{ command void start(uint32_t baud); event void startDone(error_t err); command error_t stop(); event void stopDone(error_t err); command void send(uint8_t data); command void sendStream(void* msg, uint8_t length); command void listen(void* msg, uint8_t length); event void sendDone(error_t error); event void receive(error_t error, uint8_t data); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart0C.nc000066400000000000000000000034621207233610700245050ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ configuration Sam3uUsart0C { provides interface Sam3uUsart; } implementation{ components Sam3uUsart0P, HplSam3uUsart0C; Sam3uUsart = Sam3uUsart0P; Sam3uUsart0P.HplUsart -> HplSam3uUsart0C; components LedsC; Sam3uUsart0P.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart0P.nc000066400000000000000000000074041207233610700245220ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include module Sam3uUsart0P { provides interface Sam3uUsart; uses interface HplSam3uUsartControl as HplUsart; uses interface Leds; } implementation{ uint32_t mode_register = AT91C_US_USMODE_NORMAL | AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT | AT91C_US_CHMODE_NORMAL; bool STREAM = FALSE; uint8_t total_send_length, current_length_position; uint8_t *sending_data_ptr; command void Sam3uUsart.start(uint32_t baud){ call HplUsart.init(); call HplUsart.configure(mode_register, baud); call HplUsart.enableTx(); call HplUsart.enableRx(); signal Sam3uUsart.startDone(SUCCESS); } command error_t Sam3uUsart.stop(){ call HplUsart.disableTx(); call HplUsart.disableRx(); signal Sam3uUsart.stopDone(SUCCESS); } command void Sam3uUsart.sendStream(void* msg, uint8_t length){ // send data byte by byte uint8_t data; total_send_length = length; current_length_position = 0; STREAM = TRUE; sending_data_ptr = msg; data = sending_data_ptr[0]; call HplUsart.write(0, data, 0); } command void Sam3uUsart.send(uint8_t data){ // send data byte by byte STREAM = FALSE; call HplUsart.write(0, data, 0); } command void Sam3uUsart.listen(void* msg, uint8_t length){ } event void HplUsart.writeDone(){ current_length_position ++ ; if(!STREAM){ call Leds.led2Toggle(); signal Sam3uUsart.sendDone(SUCCESS); return; }else { current_length_position ++ ; if(total_send_length > current_length_position){ call HplUsart.write(0, (uint8_t)sending_data_ptr[current_length_position], 0); }else{ STREAM = FALSE; signal Sam3uUsart.sendDone(SUCCESS); return; } } } uint8_t rxdata; task void signalReceive(){ signal Sam3uUsart.receive(SUCCESS, rxdata); } event void HplUsart.readDone(uint8_t data){ rxdata = data; post signalReceive(); } default event void Sam3uUsart.sendDone(error_t error){} default event void Sam3uUsart.receive(error_t error, uint8_t data){} default event void Sam3uUsart.startDone(error_t error){} default event void Sam3uUsart.stopDone(error_t error){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart1C.nc000066400000000000000000000034621207233610700245060ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ configuration Sam3uUsart1C { provides interface Sam3uUsart; } implementation{ components Sam3uUsart1P, HplSam3uUsart1C; Sam3uUsart = Sam3uUsart1P; Sam3uUsart1P.HplUsart -> HplSam3uUsart1C; components LedsC; Sam3uUsart1P.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart1P.nc000066400000000000000000000074531207233610700245270ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include module Sam3uUsart1P { provides interface Sam3uUsart; uses interface HplSam3uUsartControl as HplUsart; uses interface Leds; } implementation{ uint32_t mode_register = AT91C_US_USMODE_NORMAL | AT91C_US_CLKS_CLOCK | AT91C_US_ASYNC | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT | AT91C_US_CHMODE_NORMAL; bool STREAM = FALSE; uint8_t total_send_length, current_length_position; uint8_t *sending_data_ptr; command void Sam3uUsart.start(uint32_t baud){ call HplUsart.init(); call HplUsart.configure(mode_register, baud); call HplUsart.enableTx(); call HplUsart.enableRx(); signal Sam3uUsart.startDone(SUCCESS); } command error_t Sam3uUsart.stop(){ call HplUsart.disableTx(); call HplUsart.disableRx(); signal Sam3uUsart.stopDone(SUCCESS); } command void Sam3uUsart.sendStream(void* msg, uint8_t length){ // send data byte by byte uint8_t data; total_send_length = length; current_length_position = 0; STREAM = TRUE; sending_data_ptr = msg; data = sending_data_ptr[0]; call HplUsart.write(0, data, 0); } command void Sam3uUsart.send(uint8_t data){ // send data byte by byte STREAM = FALSE; call HplUsart.write(0, data, 0); } command void Sam3uUsart.listen(void* msg, uint8_t length){ } event void HplUsart.writeDone(){ current_length_position ++ ; if(!STREAM){ signal Sam3uUsart.sendDone(SUCCESS); return; }else { current_length_position ++ ; if(total_send_length > current_length_position){ call HplUsart.write(0, (uint8_t)sending_data_ptr[current_length_position], 0); }else{ STREAM = FALSE; signal Sam3uUsart.sendDone(SUCCESS); return; } } } uint8_t rxdata; task void signalReceive(){ signal Sam3uUsart.receive(SUCCESS, rxdata); } event void HplUsart.readDone(uint8_t data){ rxdata = data; //signal Sam3uUsart.receive(SUCCESS, data); post signalReceive(); } default event void Sam3uUsart.sendDone(error_t error){} default event void Sam3uUsart.receive(error_t error, uint8_t data){} default event void Sam3uUsart.startDone(error_t error){} default event void Sam3uUsart.stopDone(error_t error){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart2C.nc000066400000000000000000000034621207233610700245070ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ configuration Sam3uUsart2C { provides interface Sam3uUsart; } implementation{ components Sam3uUsart2P, HplSam3uUsart2C; Sam3uUsart = Sam3uUsart2P; Sam3uUsart2P.HplUsart -> HplSam3uUsart2C; components LedsC; Sam3uUsart2P.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart2P.nc000066400000000000000000000073451207233610700245300ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include module Sam3uUsart2P { provides interface Sam3uUsart; uses interface HplSam3uUsartControl as HplUsart; uses interface Leds; } implementation{ uint32_t mode_register = AT91C_US_USMODE_NORMAL | AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT | AT91C_US_CHMODE_NORMAL; bool STREAM = FALSE; uint8_t total_send_length, current_length_position; uint8_t *sending_data_ptr; command void Sam3uUsart.start(uint32_t baud){ call HplUsart.init(); call HplUsart.configure(mode_register, baud); call HplUsart.enableTx(); call HplUsart.enableRx(); signal Sam3uUsart.startDone(SUCCESS); } command error_t Sam3uUsart.stop(){ call HplUsart.disableTx(); call HplUsart.disableRx(); signal Sam3uUsart.stopDone(SUCCESS); } command void Sam3uUsart.sendStream(void* msg, uint8_t length){ // send data byte by byte uint8_t data; total_send_length = length; current_length_position = 0; STREAM = TRUE; sending_data_ptr = msg; data = sending_data_ptr[0]; call HplUsart.write(0, data, 0); } command void Sam3uUsart.send(uint8_t data){ // send data byte by byte STREAM = FALSE; call HplUsart.write(0, data, 0); } command void Sam3uUsart.listen(void* msg, uint8_t length){ } event void HplUsart.writeDone(){ current_length_position ++ ; if(!STREAM){ signal Sam3uUsart.sendDone(SUCCESS); return; }else { current_length_position ++ ; if(total_send_length > current_length_position){ call HplUsart.write(0, (uint8_t)sending_data_ptr[current_length_position], 0); }else{ STREAM = FALSE; signal Sam3uUsart.sendDone(SUCCESS); return; } } } uint8_t rxdata; task void signalReceive(){ signal Sam3uUsart.receive(SUCCESS, rxdata); } event void HplUsart.readDone(uint8_t data){ rxdata = data; post signalReceive(); } default event void Sam3uUsart.sendDone(error_t error){} default event void Sam3uUsart.receive(error_t error, uint8_t data){} default event void Sam3uUsart.startDone(error_t error){} default event void Sam3uUsart.stopDone(error_t error){} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usart/sam3uusarthardware.h000066400000000000000000000354721207233610700257750ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * 12 bit ADC register definitions. * * @author JeongGil Ko */ #ifndef _SAM3UUSARTHARDWARE_H #define _SAM3UUSARTHARDWARE_H typedef union { uint32_t flat; struct { uint8_t reserved0 : 2; uint8_t rstrx : 1; uint8_t rsttx : 1; uint8_t rxen : 1; uint8_t rxdis : 1; uint8_t txen : 1; uint8_t txdis : 1; uint8_t rststa : 1; uint8_t sttbrk : 1; uint8_t stpbrk : 1; uint8_t sttto : 1; uint8_t senda : 1; uint8_t rstit : 1; uint8_t rstnack : 1; uint8_t retto : 1; uint8_t reserved1 : 2; uint8_t rtsen_fcs : 1; uint8_t rtsdis_rcs : 1; uint8_t reserved2 : 4; uint8_t reserved3 : 8; } __attribute__((__packed__)) bits; } usart_cr_t; /* typedef union { uint32_t flat; struct { uint8_t usart_mode : 4; uint8_t usclks : 2; uint8_t chrl : 2; uint8_t sync_cpha : 1; uint8_t par : 3; uint8_t nb_stop : 2; uint8_t chmode : 2; uint8_t msbf_cpol : 1; uint8_t mode9 : 1; uint8_t clko : 1; uint8_t over : 1; uint8_t inack : 1; uint8_t dsnack : 1; uint8_t var_sync : 1; uint8_t invdata : 1; uint8_t max_iteration : 3; uint8_t reserved0 : 1; uint8_t filter : 1; uint8_t man : 1; uint8_t modsync : 1; uint8_t onebit : 1; } __attribute__((__packed__)) bits; } usart_mr_t; */ typedef union { uint32_t flat; struct { uint8_t usart_mode : 4; uint8_t usclks : 2; uint8_t chrl : 2; uint8_t sync_cpha : 1; uint8_t par : 3; uint8_t nb_stop : 2; uint8_t chmode : 2; uint8_t msbf_cpol : 1; uint8_t mode9 : 1; uint8_t clko : 1; uint8_t over : 1; uint8_t inack : 1; uint8_t dsnack : 1; uint8_t var_sync : 1; uint8_t invdata : 1; uint8_t max_iteration : 3; uint8_t reserved0 : 1; uint8_t filter : 1; uint8_t man : 1; uint8_t modsync : 1; uint8_t onebit : 1; } __attribute__((__packed__)) bits; } usart_mr_t; typedef union { uint32_t flat; struct { uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t rxbrk : 1; uint8_t endrx : 1; uint8_t endtx : 1; uint8_t ovre : 1; uint8_t frame : 1; uint8_t pare : 1; uint8_t timeout : 1; uint8_t txempty : 1; uint8_t iter_unre : 1; uint8_t txbufe : 1; uint8_t rxbuff : 1; uint8_t nack : 1; uint8_t reserved0 : 2; uint8_t reserved1 : 3; uint8_t ctsic : 1; uint8_t reserved2 : 4; uint8_t mane : 1; uint8_t reserved3 : 7; } __attribute__((__packed__)) bits; } usart_ier_t; typedef union { uint32_t flat; struct { uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t rxbrk : 1; uint8_t endrx : 1; uint8_t endtx : 1; uint8_t ovre : 1; uint8_t frame : 1; uint8_t pare : 1; uint8_t timeout : 1; uint8_t txempty : 1; uint8_t iter_unre : 1; uint8_t txbufe : 1; uint8_t rxbuff : 1; uint8_t nack : 1; uint8_t reserved0 : 2; uint8_t reserved1 : 3; uint8_t ctsic : 1; uint8_t reserved2 : 4; uint8_t mane : 1; uint8_t reserved3 : 7; } __attribute__((__packed__)) bits; } usart_idr_t; typedef union { uint32_t flat; struct { uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t rxbrk : 1; uint8_t endrx : 1; uint8_t endtx : 1; uint8_t ovre : 1; uint8_t frame : 1; uint8_t pare : 1; uint8_t timeout : 1; uint8_t txempty : 1; uint8_t iter_unre : 1; uint8_t txbufe : 1; uint8_t rxbuff : 1; uint8_t nack : 1; uint8_t reserved0 : 2; uint8_t reserved1 : 3; uint8_t ctsic : 1; uint8_t reserved2 : 4; uint8_t mane : 1; uint8_t reserved3 : 7; } __attribute__((__packed__)) bits; } usart_imr_t; typedef union { uint32_t flat; struct { uint8_t rxrdy : 1; uint8_t txrdy : 1; uint8_t rxbrk : 1; uint8_t endrx : 1; uint8_t endtx : 1; uint8_t ovre : 1; uint8_t frame : 1; uint8_t pare : 1; uint8_t timeout : 1; uint8_t txempty : 1; uint8_t iter_unre : 1; uint8_t txbufe : 1; uint8_t rxbuff : 1; uint8_t nack : 1; uint8_t reserved0 : 2; uint8_t reserved1 : 3; uint8_t ctsic : 1; uint8_t reserved2 : 4; uint8_t manerr : 1; uint8_t reserved3 : 7; } __attribute__((__packed__)) bits; } usart_csr_t; typedef union { uint32_t flat; struct { uint16_t rxchr : 9; uint16_t reserved0 : 6; uint16_t rxsynh : 1; uint16_t reserved1 : 16; } __attribute__((__packed__)) bits; } usart_rhr_t; typedef union { uint32_t flat; struct { uint16_t txchr : 9; uint16_t reserved0 : 6; uint16_t txsynh : 1; uint16_t reserved1 : 16; } __attribute__((__packed__)) bits; } usart_thr_t; typedef union { uint32_t flat; struct { uint16_t cd : 16; uint8_t fp : 1; uint8_t reserved0 : 7; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } usart_brgr_t; typedef union { uint32_t flat; struct { uint16_t to : 16; uint16_t reserved0 : 16; } __attribute__((__packed__)) bits; } usart_rtor_t; typedef union { uint32_t flat; struct { uint8_t tg : 8; uint8_t reserved0 : 8; uint16_t reserved1 : 16; } __attribute__((__packed__)) bits; } usart_ttgr_t; typedef union { uint32_t flat; struct { uint16_t fi_di_ratio : 11; uint16_t reserved0 : 5; uint16_t reserved1 : 16; } __attribute__((__packed__)) bits; } usart_fidi_t; typedef union { uint32_t flat; struct { uint8_t nb_errors : 8; uint8_t reserved0 : 8; uint16_t reserved1 : 16; } __attribute__((__packed__)) bits; } usart_ner_t; typedef union { uint32_t flat; struct { uint8_t irda_filter : 8; uint8_t reserved0 : 8; uint16_t reserved1 : 16; } __attribute__((__packed__)) bits; } usart_if_t; typedef union { uint32_t flat; struct { uint8_t tx_pl : 4; uint8_t reserved0 : 4; uint8_t tx_pp : 2; uint8_t reserved1 : 2; uint8_t tx_mpol : 1; uint8_t reserved2 : 3; uint8_t rx_pl : 4; uint8_t reserved3 : 4; uint8_t rx_pp : 2; uint8_t reserved4 : 2; uint8_t rx_mpol : 1; uint8_t allwaysone : 1; uint8_t drift : 1; uint8_t reserved5 : 1; } __attribute__((__packed__)) bits; } usart_man_t; typedef union { uint32_t flat; struct { uint32_t wpen : 1; uint32_t reserved0 : 7; uint32_t wpkey : 24; } __attribute__((__packed__)) bits; } usart_wpmr_t; typedef union { uint32_t flat; struct { uint8_t wpvs : 1; uint8_t reserved0 : 7; uint16_t wpvsrc : 16; uint8_t reserved1 : 8; } __attribute__((__packed__)) bits; } usart_wpsr_t; typedef union { uint32_t flat; struct { uint16_t version : 12; uint16_t reserved0 : 4; uint16_t mfn : 3; uint16_t reserved1 : 13; } __attribute__((__packed__)) bits; } usart_version_t; typedef struct usart { volatile usart_cr_t cr; volatile usart_mr_t mr; volatile usart_ier_t ier; volatile usart_idr_t idr; volatile usart_imr_t imr; volatile usart_csr_t csr; volatile usart_rhr_t rhr; volatile usart_thr_t thr; volatile usart_brgr_t brgr; volatile usart_rtor_t rtor; volatile usart_ttgr_t ttgr; uint32_t reserved0[5]; volatile usart_fidi_t fidi; volatile usart_ner_t ner; uint32_t reserved1; volatile usart_if_t us_if; volatile usart_man_t man; volatile usart_wpmr_t wpmr; volatile usart_wpsr_t wpsr; uint32_t reserved2[40]; volatile usart_version_t version; } usart_t; volatile usart_t* USART0 = (volatile usart_t *) 0x40090000; volatile usart_t* USART1 = (volatile usart_t *) 0x40094000; volatile usart_t* USART2 = (volatile usart_t *) 0x40098000; volatile usart_t* USART3 = (volatile usart_t *) 0x4009C000; #define AT91C_US_USMODE (0xF << 0) // (USART) Usart mode #define AT91C_US_USMODE_NORMAL (0x0) // (USART) Normal #define AT91C_US_USMODE_RS485 (0x1) // (USART) RS485 #define AT91C_US_USMODE_HWHSH (0x2) // (USART) Hardware Handshaking #define AT91C_US_USMODE_MODEM (0x3) // (USART) Modem #define AT91C_US_USMODE_ISO7816_0 (0x4) // (USART) ISO7816 protocol: T = 0 #define AT91C_US_USMODE_ISO7816_1 (0x6) // (USART) ISO7816 protocol: T = 1 #define AT91C_US_USMODE_IRDA (0x8) // (USART) IrDA #define AT91C_US_USMODE_SWHSH (0xC) // (USART) Software Handshaking #define AT91C_US_CLKS (0x3 << 4) // (USART) Clock Selection (Baud Rate generator Input Clock #define AT91C_US_CLKS_CLOCK (0x0 << 4) // (USART) Clock #define AT91C_US_CLKS_FDIV1 (0x1 << 4) // (USART) fdiv1 #define AT91C_US_CLKS_SLOW (0x2 << 4) // (USART) slow_clock (ARM) #define AT91C_US_CLKS_EXT (0x3 << 4) // (USART) External (SCK) #define AT91C_US_CHRL (0x3 << 6) // (USART) Clock Selection (Baud Rate generator Input Clock #define AT91C_US_CHRL_5_BITS (0x0 << 6) // (USART) Character Length: 5 bits #define AT91C_US_CHRL_6_BITS (0x1 << 6) // (USART) Character Length: 6 bits #define AT91C_US_CHRL_7_BITS (0x2 << 6) // (USART) Character Length: 7 bits #define AT91C_US_CHRL_8_BITS (0x3 << 6) // (USART) Character Length: 8 bits #define AT91C_US_SYNC (0x1 << 8) // (USART) Synchronous Mode Select #define AT91C_US_ASYNC (0x0 << 8) // (USART) Asynchronous Mode Select #define AT91C_US_PAR (0x7 << 9) // (USART) Parity type #define AT91C_US_PAR_EVEN (0x0 << 9) // (USART) Even Parity #define AT91C_US_PAR_ODD (0x1 << 9) // (USART) Odd Parity #define AT91C_US_PAR_SPACE (0x2 << 9) // (USART) Parity forced to 0 (Space) #define AT91C_US_PAR_MARK (0x3 << 9) // (USART) Parity forced to 1 (Mark) #define AT91C_US_PAR_NONE (0x4 << 9) // (USART) No Parity #define AT91C_US_PAR_MULTI_DROP (0x6 << 9) // (USART) Multi-drop mode #define AT91C_US_NBSTOP (0x3 << 12) // (USART) Number of Stop bits #define AT91C_US_NBSTOP_1_BIT (0x0 << 12) // (USART) 1 stop bit #define AT91C_US_NBSTOP_15_BIT (0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits #define AT91C_US_NBSTOP_2_BIT (0x2 << 12) // (USART) 2 stop bits #define AT91C_US_CHMODE (0x3 << 14) // (USART) Channel Mode #define AT91C_US_CHMODE_NORMAL (0x0 << 14) // (USART) Normal Mode: The USART channel operates as an RX/TX USART. #define AT91C_US_CHMODE_AUTO (0x1 << 14) // (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin. #define AT91C_US_CHMODE_LOCAL (0x2 << 14) // (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal. #define AT91C_US_CHMODE_REMOTE (0x3 << 14) // (USART) Remote Loopback: RXD pin is internally connected to TXD pin. #define AT91C_US_MSBF (0x1 << 16) // (USART) Bit Order #define AT91C_US_MODE9 (0x1 << 17) // (USART) 9-bit Character length #define AT91C_US_CKLO (0x1 << 18) // (USART) Clock Output Select #define AT91C_US_OVER (0x1 << 19) // (USART) Over Sampling Mode #define AT91C_US_INACK (0x1 << 20) // (USART) Inhibit Non Acknowledge #define AT91C_US_DSNACK (0x1 << 21) // (USART) Disable Successive NACK #define AT91C_US_VAR_SYNC (0x1 << 22) // (USART) Variable synchronization of command/data sync Start Frame Delimiter #define AT91C_US_MAX_ITER (0x1 << 24) // (USART) Number of Repetitions #define AT91C_US_FILTER (0x1 << 28) // (USART) Receive Line Filter #define AT91C_US_MANMODE (0x1 << 29) // (USART) Manchester Encoder/Decoder Enable #define AT91C_US_MODSYNC (0x1 << 30) // (USART) Manchester Synchronization mode #define AT91C_US_ONEBIT (0x1 << 31) // (USART) Start Frame Delimiter selector #endif // _SAM3UUSARTHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/000077500000000000000000000000001207233610700214175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc000066400000000000000000000126541207233610700263360ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed USB to Serial implementation * * @author Kevin Klues */ #include module Sam3uUsbBufferedSerialP { provides { interface StdControl; interface UartByte; interface UartStream; } uses { interface StdControl as SubStdControl; interface UartStream as SubUartStream; } } implementation { #define WBUF_SIZE 256 #define RBUF_SIZE 256 typedef struct { uint8_t buf[WBUF_SIZE]; uint8_t idx; bool free; } wbuf_t; wbuf_t wbufs[2]; uint8_t cwbuf; wbuf_t *pwbuf; uint8_t rbuf[RBUF_SIZE]; command error_t StdControl.start() { error_t e = call SubStdControl.start(); atomic { cwbuf = 0; pwbuf = NULL; wbufs[0].idx = 0; wbufs[1].idx = 0; wbufs[1].free = TRUE; wbufs[1].free = TRUE; } while(call SubUartStream.receive(rbuf, RBUF_SIZE) != SUCCESS); return e; } command error_t StdControl.stop() { return call SubStdControl.stop(); } async command error_t UartByte.send( uint8_t byte ) { return FAIL; } async command error_t UartByte.receive( uint8_t* byte, uint8_t timeout ) { return FAIL; } // Take a look in HdlcTranslateC to understand the logic here // on determining whether this is the last byte or not bool lastByte(uint8_t byte) { static bool seen_delimiter = FALSE; static uint8_t esc_count = 0; if(!seen_delimiter && (byte == HDLC_FLAG_BYTE)) seen_delimiter = TRUE; else if(seen_delimiter && (byte == HDLC_FLAG_BYTE) && ((esc_count % 2) == 0)) { seen_delimiter = FALSE; esc_count = 0; return TRUE; } if(byte == HDLC_CTLESC_BYTE) esc_count++; else esc_count = 0; return FALSE; } task void sendTask() { wbuf_t *pwbuf_temp; atomic pwbuf_temp = pwbuf; while(call SubUartStream.send(pwbuf_temp->buf, pwbuf_temp->idx) != SUCCESS); } task void byteBufferedTask() { // I know HdlcTranslateC is not checking the value of buf, so just pass NULL signal UartStream.sendDone(NULL, 1, SUCCESS); } async command error_t UartStream.send( uint8_t* buf, uint16_t len ) { // Assumes only called with one byte at a time!! // This is the behaviour of the current serial stack... atomic { wbufs[cwbuf].buf[wbufs[cwbuf].idx++] = buf[0]; if(!lastByte(buf[0])) { // Post a task to signal sendDone back to HdlcTranslateC // Should be OK because of the way send() is always a tail call in this // component, and these are async functions. post byteBufferedTask(); } else { wbufs[cwbuf].free = FALSE; if(!pwbuf) { pwbuf = &(wbufs[cwbuf]); cwbuf = !cwbuf; post byteBufferedTask(); post sendTask(); } } } return SUCCESS; } async event void SubUartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) { atomic { pwbuf->idx = 0; pwbuf->free = TRUE; if(!wbufs[cwbuf].free) { pwbuf = &(wbufs[cwbuf]); cwbuf = !cwbuf; post byteBufferedTask(); post sendTask(); } else { pwbuf = NULL; } } } async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) { return call SubUartStream.receive(buf, len); } async event void SubUartStream.receiveDone( uint8_t *buf, uint16_t len, error_t error ) { while(call SubUartStream.receive(rbuf, RBUF_SIZE) != SUCCESS); signal UartStream.receiveDone(buf, len, error); } async event void SubUartStream.receivedByte( uint8_t byte ) { signal UartStream.receivedByte(byte); } async command error_t UartStream.enableReceiveInterrupt() { return call SubUartStream.enableReceiveInterrupt(); } async command error_t UartStream.disableReceiveInterrupt() { return call SubUartStream.disableReceiveInterrupt(); } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbSerialC.nc000066400000000000000000000047661207233610700246630ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed USB Device Port register definitions. * * @author Kevin Klues */ #include #include configuration Sam3uUsbSerialC { provides { interface StdControl; interface UartStream; interface UartByte; } } implementation { components MainC; components HplNVICC; components HplSam3uClockC; components Sam3uUsbSerialP; components Sam3uUsbBufferedSerialP; components SerialP; StdControl = Sam3uUsbBufferedSerialP; UartStream = Sam3uUsbBufferedSerialP; UartByte = Sam3uUsbBufferedSerialP; Sam3uUsbBufferedSerialP.SubStdControl -> Sam3uUsbSerialP; Sam3uUsbBufferedSerialP.SubUartStream -> Sam3uUsbSerialP; MainC.SoftwareInit -> Sam3uUsbSerialP; Sam3uUsbSerialP.UDPHSInterrupt -> HplNVICC.MCI0Interrupt; Sam3uUsbSerialP.UDPHSClockControl -> HplSam3uClockC.UDPHSPPCntl; components McuSleepC; Sam3uUsbSerialP.UdphsInterruptWrapper -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbSerialP.nc000066400000000000000000000163001207233610700246630ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed USB to Serial implementation * * @author Kevin Klues */ #include module Sam3uUsbSerialP { provides { interface Init; interface StdControl; interface UartStream; } uses { interface HplNVICInterruptCntl as UDPHSInterrupt; interface HplSam3PeripheralClockCntl as UDPHSClockControl; interface FunctionWrapper as UdphsInterruptWrapper; } } implementation { #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include norace struct { volatile bool rlock : 1; volatile bool wlock : 1; } flags; norace uint8_t* rbuf; norace uint8_t* wbuf; norace uint16_t rlen; norace uint16_t wlen; //------------------------------------------------------------------------------ // Callbacks re-implementation //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Invoked when the USB device leaves the Suspended state. By default, /// configures the LEDs. //------------------------------------------------------------------------------ void USBDCallbacks_Resumed(void) @spontaneous() { } //------------------------------------------------------------------------------ /// Invoked when the USB device gets suspended. By default, turns off all LEDs. //------------------------------------------------------------------------------ void USBDCallbacks_Suspended(void) @spontaneous() { } //------------------------------------------------------------------------------ /// Callback invoked when data has been received on the USB. //------------------------------------------------------------------------------ void UsbDataReceived(unsigned int unused, unsigned char status, unsigned int received, unsigned int remaining) @spontaneous() { int i; error_t e = (status == USBD_STATUS_SUCCESS) ? SUCCESS : FAIL; flags.rlock = 0; for(i=0; iuckr.bits.upllcount = 1; // Arbitrary for now... PMC->uckr.bits.upllen = 1; while(!PMC->sr.bits.locku); // Enable udphs UDPHS->ctrl.bits.en_udphs = 1; // BOT driver initialization CDCDSerialDriver_Initialize(); // Connect pull-up, wait for configuration USBD_Connect(); return SUCCESS; } command error_t StdControl.stop() { // Disable the UDPHS clock in the PMC call UDPHSClockControl.disable(); // Disable the UPLL PMC->uckr.bits.upllen = 0; // Disabel udphs UDPHS->ctrl.bits.en_udphs = 0; return SUCCESS; } async command error_t UartStream.send( uint8_t* buf, uint16_t len ) { int e; if(flags.wlock) return EBUSY; flags.wlock = 1; wbuf = buf; wlen = len; e = CDCDSerialDriver_Write(wbuf, wlen, (TransferCallback) UsbDataWritten, 0); if (e != USBD_STATUS_SUCCESS) { flags.wlock = 0; return FAIL; } return SUCCESS; } async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) { int e; if(flags.rlock) return EBUSY; flags.rlock = 1; rbuf = buf; rlen = len; e = CDCDSerialDriver_Read(rbuf, rlen, (TransferCallback) UsbDataReceived, 0); if (e != USBD_STATUS_SUCCESS) { flags.rlock = 0; return FAIL; } return SUCCESS; } async command error_t UartStream.enableReceiveInterrupt() { return SUCCESS; } async command error_t UartStream.disableReceiveInterrupt() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/board/000077500000000000000000000000001207233610700225065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/board/board.h000066400000000000000000000742511207233610700237570ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \dir /// !Purpose /// /// Definition and functions for using AT91SAM3UE-related features, such /// has PIO pins, memories, etc. /// /// !Usage /// -# The code for booting the board is provided by board_cstartup.S and /// board_lowlevel.c. /// -# For using board PIOs, board characteristics (clock, etc.) and external /// components, see board.h. /// -# For manipulating memories (remapping, SDRAM, etc.), see board_memories.h. //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \unit /// !Purpose /// /// Definition of AT91SAM3UE-EK characteristics, AT91SAM3UE-dependant PIOs and /// external components interfacing. /// /// !Usage /// -# For operating frequency information, see "SAM3UE-EK - Operating frequencies". /// -# For using portable PIO definitions, see "SAM3UE-EK - PIO definitions". /// -# Several USB definitions are included here (see "SAM3UE-EK - USB device"). //------------------------------------------------------------------------------ #ifndef BOARD_H #define BOARD_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "chip.h" #include "AT91SAM3U4.h" //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "SAM3UE-EK - Board Description" /// This page lists several definition related to the board description. /// /// !Definitions /// - BOARD_NAME /// Name of the board. #define BOARD_NAME "AT91SAM3U-EK" /// Board definition. #define at91sam3uek // Chip type //#define fpgasimulation //------------------------------------------------------------------------------ #if defined(fpgasimulation) #define PMC_BY_HARD #endif //------------------------------------------------------------------------------ /// \page "SAM3UE-EK - Operating frequencies" /// This page lists several definition related to the board operating frequency /// (when using the initialization done by board_lowlevel.c). /// /// !Definitions /// - BOARD_MAINOSC /// - BOARD_MCK /// Frequency of the board main oscillator. #define BOARD_MAINOSC 12000000 /// Master clock frequency (when using board_lowlevel.c). #if !defined(fpgasimulation) #define BOARD_MCK 48000000 #else #define BOARD_MCK 22579200 #endif #if defined (fpgasimulation) //#define BOARD_ConfigureSdram(...) { } #endif // fpgasimulation //------------------------------------------------------------------------------ // ADC //------------------------------------------------------------------------------ /// ADC clock frequency, at 10-bit resolution (in Hz) #define ADC_MAX_CK_10BIT 5000000 /// Startup time max, return from Idle mode (in s) #define ADC_STARTUP_TIME_MAX 15 /// Track and hold Acquisition Time min (in ns) #define ADC_TRACK_HOLD_TIME_MIN 1200 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "SAM3UE-EK - USB device" /// This page lists constants describing several characteristics (controller /// type, D+ pull-up type, etc.) of the USB device controller of the chip/board. /// /// !Constants /// - BOARD_USB_UDP /// - BOARD_USB_PULLUP_EXTERNAL /// - BOARD_USB_NUMENDPOINTS /// - BOARD_USB_ENDPOINTS_MAXPACKETSIZE /// - BOARD_USB_ENDPOINTS_BANKS /// Chip has a UDP controller. #define BOARD_USB_UDPHS /// Indicates the D+ pull-up is external. #define BOARD_USB_PULLUP_INTERNAL /// Number of endpoints in the USB controller. #define BOARD_USB_NUMENDPOINTS 7 /// Returns the maximum packet size of the given endpoint. #define BOARD_USB_ENDPOINTS_MAXPACKETSIZE(i) (((i == 0)||(i == 3)||(i == 4)) ? 64 :\ (((i == 1)||(i == 2)) ? 512 : 1024)) /// Returns the number of FIFO banks for the given endpoint. #define BOARD_USB_ENDPOINTS_BANKS(i) ((i == 0) ? 1 : ((i == 1) || (i == 2)) ? 2 : 3) /// USB attributes configuration descriptor (bus or self powered, remote wakeup) #define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP //#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "SAM3UE-EK - PIO definitions" /// This pages lists all the pio definitions contained in board.h. The constants /// are named using the following convention: PIN_* for a constant which defines /// a single Pin instance (but may include several PIOs sharing the same /// controller), and PINS_* for a list of Pin instances. /// /// !ADC /// - PIN_ADC0_AD0 /// - PIN_ADC0_AD1 /// - PIN_ADC0_AD2 /// - PIN_ADC0_AD3 /// - PIN_ADC0_AD4 /// - PIN_ADC0_AD5 /// - PIN_ADC0_AD6 /// - PIN_ADC0_AD7 /// - PINS_ADC0 /// /// !CAN /// - PIN_CAN_TRANSCEIVER_RS /// - PIN_CAN1_TRANSCEIVER_TXD /// - PIN_CAN1_TRANSCEIVER_RXD /// - PIN_CAN2_TRANSCEIVER_TXD /// - PIN_CAN2_TRANSCEIVER_RXD /// - PINS_CAN_TRANSCEIVER_TXD /// - PINS_CAN_TRANSCEIVER_RXD /// /// !DBGU /// - PINS_DBGU /// /// !Joystick buttons /// - PIN_JOYSTICK_UP /// - PIN_JOYSTICK_DOWN /// - PIN_JOYSTICK_LEFT /// - PIN_JOYSTICK_RIGHT /// - PIN_JOYSTICK_LCLIC, PIN_JOYSTICK_PUSH /// - PINS_JOYSTICK_MOVE, PINS_JOYSTICK_CLIC, PINS_JOYSTICK /// - JOYSTICK_UP /// - JOYSTICK_DOWN /// - JOYSTICK_LEFT /// - JOYSTICK_RIGHT /// - JOYSTICK_LCLIC, JOYSTICK_PUSH /// /// !EBI /// - PIN_EBI_DATA_BUS /// - PIN_EBI_NCS0 /// - PIN_EBI_NRD /// - PIN_EBI_NWE /// - PIN_EBI_ADDR_BUS /// - PIN_EBI_PSRAM_NBS /// - PIN_EBI_A1 /// - PIN_EBI_LCD_RS /// /// !LEDs /// - PIN_LED_DS1 /// - PIN_LED_DS2 /// - PIN_LED_DS3 /// - PIN_LED_DS4 /// - PINS_LEDS /// - LED_DS1 /// - LED_DS2 /// - LED_DS3 /// - LED_DS4 /// /// !MCI /// - PINS_MCI /// /// !Push buttons /// - PIN_PUSHBUTTON_1 /// - PIN_PUSHBUTTON_2 /// - PIN_PUSHBUTTON_3 /// - PIN_PUSHBUTTON_4 /// - PINS_PUSHBUTTONS /// - PUSHBUTTON_BP1 /// - PUSHBUTTON_BP2 /// - PUSHBUTTON_BP3 /// - PUSHBUTTON_BP4 /// /// !PWMC /// - PIN_PWMC_PWMH0 /// - PIN_PWMC_PWML0 /// - PIN_PWMC_PWMH1 /// - PIN_PWMC_PWML1 /// - PIN_PWMC_PWMH2 /// - PIN_PWMC_PWML2 /// - PIN_PWM_LED0 /// - PIN_PWM_LED1 /// - PIN_PWM_LED2 /// - CHANNEL_PWM_LED0 /// - CHANNEL_PWM_LED1 /// - CHANNEL_PWM_LED2 /// /// !SPI0 /// - PIN_SPI0_MISO /// - PIN_SPI0_MOSI /// - PIN_SPI0_SPCK /// - PINS_SPI0 /// - PIN_SPI0_NPCS3 /// /// !SPI1 /// - PIN_SPI1_MISO /// - PIN_SPI1_MOSI /// - PIN_SPI1_SPCK /// - PINS_SPI1 /// - PIN_SPI1_NPCS3 /// /// ! SSC /// - PIN_SSC_TD /// - PIN_SSC_TK /// - PIN_SSC_TF /// - PINS_SSC_CODEC /// /// ! PCK0 /// - PIN_PCK0 /// /// !TWI /// - PIN_TWI_TWD0 /// - PIN_TWI_TWCK0 /// - PINS_TWI /// /// !USART0 /// - PIN_USART0_RXD /// - PIN_USART0_TXD /// - PIN_USART0_CTS /// - PIN_USART0_RTS /// - PIN_USART0_SCK /// /// !USB /// - PIN_USB_PULLUP /// /// ADC_AD0 pin definition. #define PIN_ADC0_AD0 {1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT} /// ADC_AD1 pin definition. #define PIN_ADC0_AD1 {1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT} /// ADC_AD2 pin definition. #define PIN_ADC0_AD2 {1 << 3, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT} /// ADC_AD3 pin definition. #define PIN_ADC0_AD3 {1 << 4, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT} /// ADC_AD4 pin definition. #define PIN_ADC0_AD4 {1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT} /// ADC_AD5 pin definition. #define PIN_ADC0_AD5 {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT} /// ADC_AD6 pin definition. #define PIN_ADC0_AD6 {1 << 17, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT} /// ADC_AD7 pin definition. #define PIN_ADC0_AD7 {1 << 18, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT} /// Pins ADC #define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7 /// CAN Definition /// RS: Select input for high speed mode or silent mode //#define PIN_CAN_TRANSCEIVER_RS {1<<23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} // ///// TXD: Transmit data input //#define PIN_CAN1_TRANSCEIVER_TXD {1<<27, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} ///// RXD: Receive data output //#define PIN_CAN1_TRANSCEIVER_RXD {1<<26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} /// TXD: Transmit data input //#define PIN_CAN2_TRANSCEIVER_TXD {1<<29, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} ///// RXD: Receive data output //#define PIN_CAN2_TRANSCEIVER_RXD {1<<28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} ///// TXD pins //#define PINS_CAN_TRANSCEIVER_TXD PIN_CAN1_TRANSCEIVER_TXD, PIN_CAN2_TRANSCEIVER_TXD ///// RXD pins //#define PINS_CAN_TRANSCEIVER_RXD PIN_CAN1_TRANSCEIVER_RXD, PIN_CAN2_TRANSCEIVER_RXD /// DBGU pins (DTXD and DRXD) definitions, PA11,12. #define PINS_DBGU {0x00001800, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} /// EBI #define PIN_EBI_DATA_BUS {0xfe01fe00, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}, \ {1 << 6, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP} #define PIN_EBI_NCS0 {1 << 20, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_NRD {1 << 19, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_NWE {1 << 23, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_PSRAM_NBS {1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \ {1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_A1 {1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP} #define PIN_EBI_NCS2 {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_LCD_RS {1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP} /// LED #0 pin definition. #define PIN_LED_0 {1 << 0, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT} /// LED #1 pin definition. #define PIN_LED_1 {1 << 1, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT} /// LED #2 pin definition. #define PIN_LED_2 {1 << 2, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT} /// List of all LEDs definitions. #define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2 ///// MCI pins definition. #define PINS_MCI {0x1f8, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \ {1 << 3, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} /// MCI pin DAT0 (busy) #define PIN_MCI_DAT0 \ {AT91C_PIO_PA5, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_PULLUP} /// MCI pin Card Detect #define PIN_MCI_CD \ {AT91C_PIO_PA25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP} /// Push button #0 definition. #define PIN_PUSHBUTTON_1 {1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEGLITCH | PIO_PULLUP} /// Push button #1 definition. #define PIN_PUSHBUTTON_2 {1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEGLITCH | PIO_PULLUP} /// Push button #2 definition /// List of all push button definitions. #define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2 /// Push button #1 index. #define PUSHBUTTON_BP1 0 /// Push button #2 index. #define PUSHBUTTON_BP2 1 /// Simulated joystick LEFT index. #define JOYSTICK_LEFT 0 /// Simulated joystick RIGHT index. #define JOYSTICK_RIGHT 1 /// PWMC PWM0 pin definition. #define PIN_PWMC_PWMH0 {1 << 0, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_PWMC_PWML0 {1 << 7, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} /// PWMC PWM1 pin definition. #define PIN_PWMC_PWMH1 {1 << 1, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_PWMC_PWML1 {1 << 8, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} /// PWMC PWM2 pin definition. #define PIN_PWMC_PWMH2 {1 << 2, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_PWMC_PWML2 {1 << 9, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} /// PWM pin definition for LED0 #define PIN_PWM_LED0 PIN_PWMC_PWMH0 /// PWM pin definition for LED1 #define PIN_PWM_LED1 PIN_PWMC_PWMH1 /// PWM pin definition for LED2 #define PIN_PWM_LED2 PIN_PWMC_PWMH2 /// PWM channel for LED0 #define CHANNEL_PWM_LED0 0 /// PWM channel for LED1 #define CHANNEL_PWM_LED1 1 /// PWM channel for LED2 #define CHANNEL_PWM_LED2 2 /// SPI0 MISO pin definition. #define PIN_SPI0_MISO {1 << 13, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} /// SPI0 MOSI pin definition. #define PIN_SPI0_MOSI {1 << 14, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} /// SPI0 SPCK pin definition. #define PIN_SPI0_SPCK {1 << 15, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} /// SPI0 chip select 2 pin definition. //#define PIN_SPI0_NPCS2_PC14 {1 << 14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} #define PIN_SPI0_NPCS2_PC14 {1 << 14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_0, PIO_PULLUP} /// List of SPI0 pin definitions (MISO, MOSI & SPCK). #define PINS_SPI0 PIN_SPI0_MISO, PIN_SPI0_MOSI, PIN_SPI0_SPCK /// SSC pins definition. #define PIN_SSC_TD {0x1 << 26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_SSC_TK {0x1 << 28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_SSC_TF {0x1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF /// PCK0 #define PIN_PCK0 {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} /// TWI pins definition. #define TWI_V3XX #define PIN_TWI_TWD0 {0x1 << 9, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_TWI_TWCK0 {0x1 << 10, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0 #define PIN_TWI_TWD1 {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_TWI_TWCK1 {0x1 << 25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1 /// USART0 #define PIN_USART0_RXD {0x1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_USART0_TXD {0x1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_USART0_CTS {0x1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_USART0_RTS {0x1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_USART0_SCK {0x1 << 17, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} /// USART1 #define PIN_USART1_RXD {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_USART1_TXD {0x1 << 20, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_USART1_CTS {0x1 << 23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} #define PIN_USART1_RTS {0x1 << 22, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} #define PIN_USART1_SCK {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} /// USB VBus monitoring pin definition. #define PIN_USB_VBUS {1 << 0, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT} //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "SAM3UE-EK - External components" /// This page lists the definitions related to external on-board components /// located in the board.h file for the AT91SAM3UE-EK. /// /// !AT45 Dataflash Card /// - BOARD_AT45_A_SPI_BASE /// - BOARD_AT45_A_SPI_ID /// - BOARD_AT45_A_SPI_PINS /// - BOARD_AT45_A_SPI /// - BOARD_AT45_A_NPCS /// - BOARD_AT45_A_NPCS_PIN /// /// !AT45 Dataflash (serial onboard DataFlash) /// - BOARD_AT45_B_SPI_BASE /// - BOARD_AT45_B_SPI_ID /// - BOARD_AT45_B_SPI_PINS /// - BOARD_AT45_B_SPI /// - BOARD_AT45_B_NPCS /// - BOARD_AT45_B_NPCS_PIN /// /// !AT26 Serial Flash /// - BOARD_AT26_A_SPI_BASE /// - BOARD_AT26_A_SPI_ID /// - BOARD_AT26_A_SPI_PINS /// - BOARD_AT26_A_SPI /// - BOARD_AT26_A_NPCS /// - BOARD_AT26_A_NPCS_PIN /// /// !SD Card /// - BOARD_SD_MCI_BASE /// - BOARD_SD_MCI_ID /// - BOARD_SD_PINS /// - BOARD_SD_SLOT /// /// !PSRAM /// - BOARD_EBI_PSRAM /// - BOARD_PSRAM_PINS /// - BOARD_LCD_PINS /// Base address of SPI peripheral connected to the dataflash. //#define BOARD_AT45_A_SPI_BASE AT91C_BASE_SPI0 ///// Identifier of SPI peripheral connected to the dataflash. //#define BOARD_AT45_A_SPI_ID AT91C_ID_SPI0 ///// Pins of the SPI peripheral connected to the dataflash. //#define BOARD_AT45_A_SPI_PINS PINS_SPI0 ///// Dataflahs SPI number. //#define BOARD_AT45_A_SPI 0 ///// Chip select connected to the dataflash. //#define BOARD_AT45_A_NPCS 3 ///// Chip select pin connected to the dataflash. //#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3 /// Base address of SPI peripheral connected to the dataflash. //#define BOARD_AT45_B_SPI_BASE AT91C_BASE_SPI1 ///// Identifier of SPI peripheral connected to the dataflash. //#define BOARD_AT45_B_SPI_ID AT91C_ID_SPI1 ///// Pins of the SPI peripheral connected to the dataflash. //#define BOARD_AT45_B_SPI_PINS PINS_SPI1 ///// Dataflahs SPI number. //#define BOARD_AT45_B_SPI 1 ///// Chip select connected to the dataflash. //#define BOARD_AT45_B_NPCS 3 ///// Chip select pin connected to the dataflash. //#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3 /// Base address of SPI peripheral connected to the serialflash. //#define BOARD_AT26_A_SPI_BASE AT91C_BASE_SPI0 ///// Identifier of SPI peripheral connected to the serialflash. //#define BOARD_AT26_A_SPI_ID AT91C_ID_SPI0 ///// Pins of the SPI peripheral connected to the serialflash. //#define BOARD_AT26_A_SPI_PINS PINS_SPI0 ///// Serialflash SPI number. //#define BOARD_AT26_A_SPI 0 ///// Chip select connected to the serialflash. //#define BOARD_AT26_A_NPCS 3 ///// Chip select pin connected to the serialflash. //#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3 /// Base address of the MCI peripheral connected to the SD card. #define BOARD_SD_MCI_BASE AT91C_BASE_MCI0//AT91C_BASE_MCI ///// Peripheral identifier of the MCI connected to the SD card. #define BOARD_SD_MCI_ID AT91C_ID_MCI0 //AT91C_ID_MCI ///// MCI pins that shall be configured to access the SD card. #define BOARD_SD_PINS PINS_MCI #define BOARD_SD_DAT0 PIN_MCI_DAT0 ///// MCI slot to which the SD card is connected to. #define BOARD_SD_SLOT MCI_SD_SLOTA ///// MCI Card Detect pin. #define BOARD_SD_PIN_CD PIN_MCI_CD #define BOARD_EBI_PSRAM 0x60000000 #define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \ PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1 /// Indicates board has an HX8347 external component to manage LCD. #define BOARD_LCD_HX8347 /// LCD pins definition. #define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_LCD_RS, PIN_EBI_NRD, PIN_EBI_NWE, \ PIN_EBI_NCS2 /// Backlight pin definition. #define BOARD_BACKLIGHT_PIN {1 << 19, AT91C_BASE_PIOC, AT91C_ID_PIOC, \ PIO_OUTPUT_0, PIO_DEFAULT} /// Define HX8347 base address. #define BOARD_LCD_BASE 0x62000000 /// Define HX8347 register select signal. #define BOARD_LCD_RS (1 << 1) /// Display width in pixels. #define BOARD_LCD_WIDTH 240 /// Display height in pixels. #define BOARD_LCD_HEIGHT 320 /// Indicates board has an ADS7843 external component to manage Touch Screen #define BOARD_TSC_ADS7843 /// Touchscreen controller IRQ pin definition. #define PIN_TCS_IRQ {AT91C_PIO_PA24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP} /// Touchscreen controller Busy pin definition. #define PIN_TCS_BUSY {AT91C_PIO_PA2, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP} /// Base address of SPI peripheral connected to the touchscreen controller. #define BOARD_TSC_SPI_BASE AT91C_BASE_SPI0 /// Identifier of SPI peripheral connected to the touchscreen controller. #define BOARD_TSC_SPI_ID AT91C_ID_SPI0 /// Pins of the SPI peripheral connected to the touchscreen controller. #define BOARD_TSC_SPI_PINS PINS_SPI0 /// Chip select connected to the touchscreen controller. #define BOARD_TSC_NPCS 2//2 /// Chip select pin connected to the touchscreen controller. #define BOARD_TSC_NPCS_PIN PIN_SPI0_NPCS2_PC14 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "SAM3UE-EK - Memories" /// This page lists definitions related to internal & external on-board memories. /// /// !Embedded Flash /// - BOARD_FLASH_EFC /// Internal SRAM address #define AT91C_ISRAM AT91C_IRAM #define AT91C_ISRAM_SIZE AT91C_IRAM_SIZE #define AT91C_IFLASH (0x80000) #define AT91C_IFLASH_SIZE (0x20000) #define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes #define AT91C_IFLASH_NB_OF_PAGES (512) // Internal FLASH 0 Number of Pages: 512 #define AT91C_IFLASH_LOCK_REGION_SIZE (8192) // Internal FLASH 0 Lock Region Size: 8 Kbytes #define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 32 #if 0 #define AT91C_IFLASH1 (0x100000) #define AT91C_IFLASH1_SIZE (0x20000) #define AT91C_IFLASH1_PAGE_SIZE (256) // Internal FLASH 1 Page Size: 256 bytes #define AT91C_IFLASH1_NB_OF_PAGES (512) // Internal FLASH 1 Number of Pages: 512 #define AT91C_IFLASH1_LOCK_REGION_SIZE (8192) // Internal FLASH 1 Lock Region Size: 8 Kbytes #define AT91C_IFLASH1_NB_OF_LOCK_BITS (16) // Internal FLASH 1 Number of Lock Bits: 32 #endif /// Indicates chip has an EFC. #define AT91C_BASE_EFC AT91C_BASE_EFC0 #define AT91C_EBI_PSRAM (0x60000000) #define BOARD_PSRAM_SIZE (0x100000) // PSRAM size 1MBytes //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "SAM3UE-EK - External components" /// This page lists the definitions related to external on-board components /// located in the board.h file for the SAM3UE-EK. /// /// !ISO7816 /// - PIN_SMARTCARD_CONNECT /// - PIN_ISO7816_RSTMC /// - PINS_ISO7816 /// /// !DMA /// /// - BOARD_MCI_DMA_CHANNEL /// - BOARD_SSC_DMA_CHANNEL /// /// - DMA_HW_SRC_REQ_ID_MCI0 /// - DMA_HW_DEST_REQ_ID_MCI0 /// - DMA_HW_SRC_REQ_ID_MCI1 /// - DMA_HW_DEST_REQ_ID_MCI1 /// /// - BOARD_SD_DMA_HW_SRC_REQ_ID /// - BOARD_SD_DMA_HW_DEST_REQ_ID /// - BOARD_SSC_DMA_HW_SRC_REQ_ID /// - BOARD_SSC_DMA_HW_DEST_REQ_ID /// Smartcard detection pin #define PIN_SMARTCARD_CONNECT {1 << 5, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT} /// PIN used for reset the smartcard #define PIN_ISO7816_RSTMC {1 << 7, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} /// Pins used for connect the smartcard #define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC /// Dma channel number #define BOARD_MCI_DMA_CHANNEL 0 #define BOARD_SSC_DMA_CHANNEL 2 /// MCI0 DMA hardware handshaking ID #define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0 #define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0 /// MCI1 DMA hardware handshaking ID #define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13 #define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13 /// SD DMA hardware handshaking ID #define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0 #define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0 /// SSC DMA hardware handshaking ID #define BOARD_SSC_DMA_HW_SRC_REQ_ID AT91C_HDMA_SRC_PER_3 #define BOARD_SSC_DMA_HW_DEST_REQ_ID AT91C_HDMA_DST_PER_3 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "SAM3UE-EK - Individual chip definition" /// This page lists the definitions related to different chip's definition /// located in the board.h file for the SAM3UE-EK. /// DBGU #define BOARD_DBGU_ID AT91C_ID_DBGU /// Rtc #define BOARD_RTC_ID AT91C_ID_RTC /// Twi eeprom #define BOARD_ID_TWI_EEPROM AT91C_ID_TWI1 #define BOARD_BASE_TWI_EEPROM AT91C_BASE_TWI1 #define BOARD_PINS_TWI_EEPROM PINS_TWI1 /// USART #define BOARD_PIN_USART_RXD PIN_USART1_RXD #define BOARD_PIN_USART_TXD PIN_USART1_TXD #define BOARD_PIN_USART_CTS PIN_USART1_CTS #define BOARD_PIN_USART_RTS PIN_USART1_RTS #define BOARD_USART_BASE AT91C_BASE_US1 #define BOARD_ID_USART AT91C_ID_US1 /// Dummy define SDRAM bus width #define BOARD_SDRAM_BUSWIDTH 32 //------------------------------------------------------------------------------ #define PIN_EBI_NANDOE {1 << 17, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_NANDWE {1 << 18, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_NANDCLE {1 << 22, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} #define PIN_EBI_NANDALE {1 << 21, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} #if defined(CHIP_NAND_CTRL) /// Nandflash chip enable pin definition. #define BOARD_NF_CE_PIN {1 << 12, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /// Nandflash ready/busy pin definition. #define BOARD_NF_RB_PIN {1 << 24, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} /// Nandflash controller peripheral pins definition. #define PINS_NANDFLASH BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, PIN_EBI_NANDWE,\ PIN_EBI_NANDCLE, PIN_EBI_NANDALE, PIN_EBI_DATA_BUS /// Address for transferring command bytes to the nandflash. #define BOARD_NF_COMMAND_ADDR 0x60000000 /// Address for transferring address bytes to the nandflash. #define BOARD_NF_ADDRESS_ADDR 0x61200000 /// Address for transferring data bytes to the nandflash. #define BOARD_NF_DATA_ADDR 0x61000000 #else /// Nandflash controller peripheral pins definition. #define PINS_NANDFLASH PIN_EBI_DATA_BUS, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, PIN_EBI_NANDWE,\ PIN_EBI_NANDCLE, PIN_EBI_NANDALE /// Nandflash chip enable pin definition. #define BOARD_NF_CE_PIN {1 << 12, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} /// Nandflash ready/busy pin definition. #define BOARD_NF_RB_PIN {1 << 24, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_PULLUP} /// Address for transferring command bytes to the nandflash. #define BOARD_NF_COMMAND_ADDR 0x61400000 /// Address for transferring address bytes to the nandflash. #define BOARD_NF_ADDRESS_ADDR 0x61200000 /// Address for transferring data bytes to the nandflash. #define BOARD_NF_DATA_ADDR 0x61000000 #endif #endif //#ifndef BOARD_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/board/board_lowlevel.c000066400000000000000000000215531207233610700256600ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// Provides the low-level initialization function that gets called on chip /// startup. /// /// !Usage /// /// LowLevelInit() is called in #board_cstartup_xxx.c#. //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include //#include "board_memories.h" #include #include //------------------------------------------------------------------------------ // Local definitions //------------------------------------------------------------------------------ // Settings at 48/48MHz #define AT91C_CKGR_MUL_SHIFT 16 #define AT91C_CKGR_OUT_SHIFT 14 #define AT91C_CKGR_PLLCOUNT_SHIFT 8 #define AT91C_CKGR_DIV_SHIFT 0 #define BOARD_OSCOUNT (AT91C_CKGR_MOSCXTST & (0x3F << 8)) #define BOARD_PLLR ((1 << 29) | (0x7 << AT91C_CKGR_MUL_SHIFT) \ | (0x0 << AT91C_CKGR_OUT_SHIFT) |(0x3f << AT91C_CKGR_PLLCOUNT_SHIFT) \ | (0x1 << AT91C_CKGR_DIV_SHIFT)) #define BOARD_MCKR ( AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLLA_CLK) // Define clock timeout #define CLOCK_TIMEOUT 0xFFFFFFFF //------------------------------------------------------------------------------ // Local variables //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Local functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// After POR, at91sam3u device is running on 4MHz internal RC /// At the end of the LowLevelInit procedure MCK = 48MHz PLLA = 96 CPU=48MHz /// Performs the low-level initialization of the chip. This includes EFC, master /// clock, IRQ & watchdog configuration. //------------------------------------------------------------------------------ void LowLevelInit(void) { unsigned int timeout = 0; /* Set 2 WS for Embedded Flash Access ************************************/ AT91C_BASE_EFC0->EFC_FMR = AT91C_EFC_FWS_2WS; AT91C_BASE_EFC1->EFC_FMR = AT91C_EFC_FWS_2WS; /* Watchdog initialization *************************/ AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS; /* Select external slow clock ****************************/ if ((AT91C_BASE_SUPC->SUPC_SR & AT91C_SUPC_SR_OSCSEL_CRYST) != AT91C_SUPC_SR_OSCSEL_CRYST) { AT91C_BASE_SUPC->SUPC_CR = AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL | (0xA5 << 24); timeout = 0; while (!(AT91C_BASE_SUPC->SUPC_SR & AT91C_SUPC_SR_OSCSEL_CRYST) && (timeout++ < CLOCK_TIMEOUT)); } /* Initialize main oscillator ****************************/ if(!(AT91C_BASE_PMC->PMC_MOR & AT91C_CKGR_MOSCSEL)) { AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN; timeout = 0; while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCXTS) && (timeout++ < CLOCK_TIMEOUT)); } /* Switch to moscsel */ AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN | AT91C_CKGR_MOSCSEL; timeout = 0; while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT)); AT91C_BASE_PMC->PMC_MCKR = (AT91C_BASE_PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK; timeout = 0; while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); /* Initialize PLLA */ AT91C_BASE_PMC->PMC_PLLAR = BOARD_PLLR; timeout = 0; while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA) && (timeout++ < CLOCK_TIMEOUT)); /* Initialize UTMI for USB usage */ AT91C_BASE_CKGR->CKGR_UCKR |= (AT91C_CKGR_UPLLCOUNT & (3 << 20)) | AT91C_CKGR_UPLLEN; timeout = 0; while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKU) && (timeout++ < CLOCK_TIMEOUT)); /* Switch to fast clock **********************/ AT91C_BASE_PMC->PMC_MCKR = (BOARD_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK; timeout = 0; while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); AT91C_BASE_PMC->PMC_MCKR = BOARD_MCKR; timeout = 0; while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT)); /* Enable clock for UART ************************/ AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_DBGU); /* Optimize CPU setting for speed */ SetDefaultMaster(1); } ////------------------------------------------------------------------------------ ///// Enable or disable default master access ///// \param enalbe 1 enable defaultMaster settings, 0 disable it. ////------------------------------------------------------------------------------ //void SetDefaultMaster(unsigned char enable) //{ // AT91PS_HMATRIX2 pMatrix = AT91C_BASE_MATRIX; // // // Set default master // if (enable == 1) { // // // Set default master: SRAM0 -> Cortex-M3 System // pMatrix->HMATRIX2_SCFG0 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG0_ARMS | // AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR; // // // Set default master: SRAM1 -> Cortex-M3 System // pMatrix->HMATRIX2_SCFG1 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG1_ARMS | // AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR; // // // Set default master: Internal flash0 -> Cortex-M3 Instruction/Data // pMatrix->HMATRIX2_SCFG3 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG3_ARMC | // AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR; // } else { // // // Clear default master: SRAM0 -> Cortex-M3 System // pMatrix->HMATRIX2_SCFG0 &= (~AT91C_MATRIX_DEFMSTR_TYPE); // // // Clear default master: SRAM1 -> Cortex-M3 System // pMatrix->HMATRIX2_SCFG1 &= (~AT91C_MATRIX_DEFMSTR_TYPE); // // // Clear default master: Internal flash0 -> Cortex-M3 Instruction/Data // pMatrix->HMATRIX2_SCFG3 &= (~AT91C_MATRIX_DEFMSTR_TYPE); // } //} //------------------------------------------------------------------------------ /// Set flash wait state /// \param ws Value of flash wait state //------------------------------------------------------------------------------ void SetFlashWaitState(unsigned char ws) { // Set Wait State for Embedded Flash Access AT91C_BASE_EFC0->EFC_FMR = ((ws << 8) & AT91C_EFC_FWS); AT91C_BASE_EFC1->EFC_FMR = ((ws << 8) & AT91C_EFC_FWS); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/board/board_lowlevel.h000066400000000000000000000050231207233610700256570ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !!!Purpose /// /// Collection of methods for lowlevel. /// //------------------------------------------------------------------------------ #ifndef BOARD_LOWLEVEL_H #define BOARD_LOWLEVEL_H //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern void LowLevelInit(void); extern void SetDefaultMaster(unsigned char enable); extern void SetFlashWaitState(unsigned char ws); #endif // BOARD_LOWLEVEL_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/board/chip.h000066400000000000000000000077361207233610700236170ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// !Purpose /// /// Definition of AT91SAM3U4 characteristics and features /// /// !Usage /// -# For ARM core feature, see "AT91SAM3U4 - ARM core features". /// -# For IP features, see "AT91SAM3U4 - IP features". /// -# For misc, see "AT91SAM3U4 - Misc". //------------------------------------------------------------------------------ #ifndef CHIP_H #define CHIP_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "AT91SAM3U4 - ARM core features" /// This page lists several characteristics related to the ARM core /// //ARM core features /// ARM core definition. #define cortexm3 /// family definition. #define at91sam3u //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "AT91SAM3U4 - IP features" /// This page lists several characteristics related to the embedded IP /// //IP FEATURES // EFC GPNVM number #define CHIP_EFC_NUM_GPNVMS 3 /// Indicates chip has an Enhanced EFC. #define CHIP_FLASH_EEFC // DMA channels number #define CHIP_DMA_CHANNEL_NUM 4 // Indicate chip's MCI interface. #define MCI2_INTERFACE // Indicate chip SSC has DMA interface. #define CHIP_SSC_DMA //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "AT91SAM3U4 - Misc " /// This page lists misc features /// //Misc //------------------------------------------------------------------------------ #endif //#ifndef CHIP_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/board/exceptions.h000066400000000000000000000121611207233610700250410ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* ** This file contains the default exception handlers ** and exception table. */ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ /// Function prototype for exception table items - interrupt handler. //typedef void( *IrqHandler )( void ); typedef void( *IntFunc )( void ); /// Weak attribute #if defined ( __CC_ARM ) #define WEAK __attribute__ ((weak)) #elif defined ( __ICCARM__ ) #define WEAK __weak #elif defined ( __GNUC__ ) #define WEAK __attribute__ ((weak)) #endif //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Exception Handlers //------------------------------------------------------------------------------ extern WEAK void NMI_Handler( void ); extern WEAK void HardFault_Handler( void ); extern WEAK void MemManage_Handler( void ); extern WEAK void BusFault_Handler( void ); extern WEAK void UsageFault_Handler( void ); extern WEAK void SVC_Handler( void ); extern WEAK void DebugMon_Handler( void ); extern WEAK void PendSV_Handler( void ); extern WEAK void SysTick_Handler( void ); void IrqHandlerNotUsed(void); // System Controller extern void SYS_IrqHandler(void); // SUPPLY CONTROLLER extern WEAK void SUPC_IrqHandler(void); // RESET CONTROLLER extern WEAK void RSTC_IrqHandler(void); // REAL TIME CLOCK extern WEAK void RTC_IrqHandler(void); // REAL TIME TIMER extern WEAK void RTT_IrqHandler(void); // WATCHDOG TIMER extern WEAK void WDT_IrqHandler(void); // PMC extern WEAK void PMC_IrqHandler(void); // EFC0 extern WEAK void EFC0_IrqHandler(void); // EFC1 extern WEAK void EFC1_IrqHandler(void); // DBGU extern WEAK void DBGU_IrqHandler(void); // HSMC4 extern WEAK void HSMC4_IrqHandler(void); // Parallel IO Controller A extern WEAK void PIOA_IrqHandler(void); // Parallel IO Controller B extern WEAK void PIOB_IrqHandler(void); // Parallel IO Controller C extern WEAK void PIOC_IrqHandler(void); // USART 0 extern WEAK void USART0_IrqHandler(void); // USART 1 extern WEAK void USART1_IrqHandler(void); // USART 2 extern WEAK void USART2_IrqHandler(void); // USART 3 extern WEAK void USART3_IrqHandler(void); // Multimedia Card Interface extern WEAK void MCI0_IrqHandler(void); // TWI 0 extern WEAK void TWI0_IrqHandler(void); // TWI 1 extern WEAK void TWI1_IrqHandler(void); // Serial Peripheral Interface 0 extern WEAK void SPI0_IrqHandler(void); // Serial Synchronous Controller 0 extern WEAK void SSC0_IrqHandler(void); // Timer Counter 0 extern WEAK void TC0_IrqHandler(void); // Timer Counter 1 extern WEAK void TC1_IrqHandler(void); // Timer Counter 2 extern WEAK void TC2_IrqHandler(void); // PWM Controller extern WEAK void PWM_IrqHandler(void); // ADC controller0 extern WEAK void ADCC0_IrqHandler(void); // ADC controller1 extern WEAK void ADCC1_IrqHandler(void); // HDMA extern WEAK void HDMA_IrqHandler(void); // USB Device High Speed UDP_HS extern WEAK void UDPD_IrqHandler(void); tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/cmsis/000077500000000000000000000000001207233610700225355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/cmsis/core_cm3.c000066400000000000000000000420251207233610700243760ustar00rootroot00000000000000/****************************************************************************** * @file: core_cm3.c * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File * @version: V1.10 * @date: 24. Feb. 2009 *---------------------------------------------------------------------------- * * Copyright (C) 2009 ARM Limited. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * ARM Limited (ARM) is supplying this software for use with Cortex-Mx * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * ******************************************************************************/ #include /* define compiler specific symbols */ #if defined ( __CC_ARM ) #define __ASM __asm /*!< asm keyword for armcc */ #define __INLINE __inline /*!< inline keyword for armcc */ #elif defined ( __ICCARM__ ) #define __ASM __asm /*!< asm keyword for iarcc */ #define __INLINE inline /*!< inline keyword for iarcc. Only avaiable in High optimization mode! */ #define __nop __no_operation /*!< no operation intrinsic in iarcc */ #elif defined ( __GNUC__ ) #define __ASM asm /*!< asm keyword for gcc */ #define __INLINE inline /*!< inline keyword for gcc */ #endif #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ /** * @brief Return the Process Stack Pointer * * @param none * @return uint32_t ProcessStackPointer * * Return the actual process stack pointer */ __ASM uint32_t __get_PSP(void) { mrs r0, psp bx lr } /** * @brief Set the Process Stack Pointer * * @param uint32_t Process Stack Pointer * @return none * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ __ASM void __set_PSP(uint32_t topOfProcStack) { msr psp, r0 bx lr } /** * @brief Return the Main Stack Pointer * * @param none * @return uint32_t Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ __ASM uint32_t __get_MSP(void) { mrs r0, msp bx lr } /** * @brief Set the Main Stack Pointer * * @param uint32_t Main Stack Pointer * @return none * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ __ASM void __set_MSP(uint32_t mainStackPointer) { msr msp, r0 bx lr } /** * @brief Reverse byte order in unsigned short value * * @param uint16_t value to reverse * @return uint32_t reversed value * * Reverse byte order in unsigned short value */ __ASM uint32_t __REV16(uint16_t value) { rev16 r0, r0 bx lr } /** * @brief Reverse byte order in signed short value with sign extension to integer * * @param int16_t value to reverse * @return int32_t reversed value * * Reverse byte order in signed short value with sign extension to integer */ __ASM int32_t __REVSH(int16_t value) { revsh r0, r0 bx lr } #if (__ARMCC_VERSION < 400000) /** * @brief Remove the exclusive lock created by ldrex * * @param none * @return none * * Removes the exclusive lock which is created by ldrex. */ __ASM void __CLREX(void) { clrex } /** * @brief Return the Base Priority value * * @param none * @return uint32_t BasePriority * * Return the content of the base priority register */ __ASM uint32_t __get_BASEPRI(void) { mrs r0, basepri bx lr } /** * @brief Set the Base Priority value * * @param uint32_t BasePriority * @return none * * Set the base priority register */ __ASM void __set_BASEPRI(uint32_t basePri) { msr basepri, r0 bx lr } /** * @brief Return the Priority Mask value * * @param none * @return uint32_t PriMask * * Return the state of the priority mask bit from the priority mask * register */ __ASM uint32_t __get_PRIMASK(void) { mrs r0, primask bx lr } /** * @brief Set the Priority Mask value * * @param uint32_t PriMask * @return none * * Set the priority mask bit in the priority mask register */ __ASM void __set_PRIMASK(uint32_t priMask) { msr primask, r0 bx lr } /** * @brief Return the Fault Mask value * * @param none * @return uint32_t FaultMask * * Return the content of the fault mask register */ __ASM uint32_t __get_FAULTMASK(void) { mrs r0, faultmask bx lr } /** * @brief Set the Fault Mask value * * @param uint32_t faultMask value * @return none * * Set the fault mask register */ __ASM void __set_FAULTMASK(uint32_t faultMask) { msr faultmask, r0 bx lr } /** * @brief Return the Control Register value * * @param none * @return uint32_t Control value * * Return the content of the control register */ __ASM uint32_t __get_CONTROL(void) { mrs r0, control bx lr } /** * @brief Set the Control Register value * * @param uint32_t Control value * @return none * * Set the control register */ __ASM void __set_CONTROL(uint32_t control) { msr control, r0 bx lr } #endif /* __ARMCC_VERSION */ #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ #pragma diag_suppress=Pe940 /** * @brief Return the Process Stack Pointer * * @param none * @return uint32_t ProcessStackPointer * * Return the actual process stack pointer */ uint32_t __get_PSP(void) { __ASM("mrs r0, psp"); __ASM("bx lr"); } /** * @brief Set the Process Stack Pointer * * @param uint32_t Process Stack Pointer * @return none * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ void __set_PSP(uint32_t topOfProcStack) { __ASM("msr psp, r0"); __ASM("bx lr"); } /** * @brief Return the Main Stack Pointer * * @param none * @return uint32_t Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ uint32_t __get_MSP(void) { __ASM("mrs r0, msp"); __ASM("bx lr"); } /** * @brief Set the Main Stack Pointer * * @param uint32_t Main Stack Pointer * @return none * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ void __set_MSP(uint32_t topOfMainStack) { __ASM("msr msp, r0"); __ASM("bx lr"); } /** * @brief Reverse byte order in unsigned short value * * @param uint16_t value to reverse * @return uint32_t reversed value * * Reverse byte order in unsigned short value */ uint32_t __REV16(uint16_t value) { __ASM("rev16 r0, r0"); __ASM("bx lr"); } /** * @brief Reverse bit order of value * * @param uint32_t value to reverse * @return uint32_t reversed value * * Reverse bit order of value */ uint32_t __RBIT(uint32_t value) { __ASM("rbit r0, r0"); __ASM("bx lr"); } /** * @brief LDR Exclusive * * @param uint8_t* address * @return uint8_t value of (*address) * * Exclusive LDR command */ uint8_t __LDREXB(uint8_t *addr) { __ASM("ldrexb r0, [r0]"); __ASM("bx lr"); } /** * @brief LDR Exclusive * * @param uint16_t* address * @return uint16_t value of (*address) * * Exclusive LDR command */ uint16_t __LDREXH(uint16_t *addr) { __ASM("ldrexh r0, [r0]"); __ASM("bx lr"); } /** * @brief LDR Exclusive * * @param uint32_t* address * @return uint32_t value of (*address) * * Exclusive LDR command */ uint32_t __LDREXW(uint32_t *addr) { __ASM("ldrex r0, [r0]"); __ASM("bx lr"); } /** * @brief STR Exclusive * * @param uint8_t *address * @param uint8_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ uint32_t __STREXB(uint8_t value, uint8_t *addr) { __ASM("strexb r0, r0, [r1]"); __ASM("bx lr"); } /** * @brief STR Exclusive * * @param uint16_t *address * @param uint16_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ uint32_t __STREXH(uint16_t value, uint16_t *addr) { __ASM("strexh r0, r0, [r1]"); __ASM("bx lr"); } /** * @brief STR Exclusive * * @param uint32_t *address * @param uint32_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ uint32_t __STREXW(uint32_t value, uint32_t *addr) { __ASM("strex r0, r0, [r1]"); __ASM("bx lr"); } #pragma diag_default=Pe940 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ /** * @brief Return the Process Stack Pointer * * @param none * @return uint32_t ProcessStackPointer * * Return the actual process stack pointer */ uint32_t __get_PSP(void) { uint32_t result=0; __ASM volatile ("MRS %0, psp" : "=r" (result) ); return(result); } /** * @brief Set the Process Stack Pointer * * @param uint32_t Process Stack Pointer * @return none * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ void __set_PSP(uint32_t topOfProcStack) { __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) ); } /** * @brief Return the Main Stack Pointer * * @param none * @return uint32_t Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ uint32_t __get_MSP(void) { uint32_t result=0; __ASM volatile ("MRS %0, msp" : "=r" (result) ); return(result); } /** * @brief Set the Main Stack Pointer * * @param uint32_t Main Stack Pointer * @return none * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ void __set_MSP(uint32_t topOfMainStack) { __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) ); } /** * @brief Return the Base Priority value * * @param none * @return uint32_t BasePriority * * Return the content of the base priority register */ uint32_t __get_BASEPRI(void) { uint32_t result=0; __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); return(result); } /** * @brief Set the Base Priority value * * @param uint32_t BasePriority * @return none * * Set the base priority register */ void __set_BASEPRI(uint32_t value) { __ASM volatile ("MSR basepri, %0" : : "r" (value) ); } /** * @brief Return the Priority Mask value * * @param none * @return uint32_t PriMask * * Return the state of the priority mask bit from the priority mask * register */ uint32_t __get_PRIMASK(void) { uint32_t result=0; __ASM volatile ("MRS %0, primask" : "=r" (result) ); return(result); } /** * @brief Set the Priority Mask value * * @param uint32_t PriMask * @return none * * Set the priority mask bit in the priority mask register */ void __set_PRIMASK(uint32_t priMask) { __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); } /** * @brief Return the Fault Mask value * * @param none * @return uint32_t FaultMask * * Return the content of the fault mask register */ uint32_t __get_FAULTMASK(void) { uint32_t result=0; __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); return(result); } /** * @brief Set the Fault Mask value * * @param uint32_t faultMask value * @return none * * Set the fault mask register */ void __set_FAULTMASK(uint32_t faultMask) { __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); } /** * @brief Reverse byte order in integer value * * @param uint32_t value to reverse * @return uint32_t reversed value * * Reverse byte order in integer value */ uint32_t __REV(uint32_t value) { uint32_t result=0; __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); return(result); } /** * @brief Reverse byte order in unsigned short value * * @param uint16_t value to reverse * @return uint32_t reversed value * * Reverse byte order in unsigned short value */ uint32_t __REV16(uint16_t value) { uint32_t result=0; __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); return(result); } /** * @brief Reverse byte order in signed short value with sign extension to integer * * @param int32_t value to reverse * @return int32_t reversed value * * Reverse byte order in signed short value with sign extension to integer */ int32_t __REVSH(int16_t value) { uint32_t result=0; __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); return(result); } /** * @brief Reverse bit order of value * * @param uint32_t value to reverse * @return uint32_t reversed value * * Reverse bit order of value */ uint32_t __RBIT(uint32_t value) { uint32_t result=0; __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); return(result); } /** * @brief LDR Exclusive * * @param uint8_t* address * @return uint8_t value of (*address) * * Exclusive LDR command */ uint8_t __LDREXB(uint8_t *addr) { uint8_t result=0; __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); return(result); } /** * @brief LDR Exclusive * * @param uint16_t* address * @return uint16_t value of (*address) * * Exclusive LDR command */ uint16_t __LDREXH(uint16_t *addr) { uint16_t result=0; __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); return(result); } /** * @brief LDR Exclusive * * @param uint32_t* address * @return uint32_t value of (*address) * * Exclusive LDR command */ uint32_t __LDREXW(uint32_t *addr) { uint32_t result=0; __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); return(result); } /** * @brief STR Exclusive * * @param uint8_t *address * @param uint8_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ uint32_t __STREXB(uint8_t value, uint8_t *addr) { uint32_t result=0; __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); return(result); } /** * @brief STR Exclusive * * @param uint16_t *address * @param uint16_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ uint32_t __STREXH(uint16_t value, uint16_t *addr) { uint32_t result=0; __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); return(result); } /** * @brief STR Exclusive * * @param uint32_t *address * @param uint32_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ uint32_t __STREXW(uint32_t value, uint32_t *addr) { uint32_t result=0; __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); return(result); } /** * @brief Return the Control Register value * * @param none * @return uint32_t Control value * * Return the content of the control register */ uint32_t __get_CONTROL(void) { uint32_t result=0; __ASM volatile ("MRS %0, control" : "=r" (result) ); return(result); } /** * @brief Set the Control Register value * * @param uint32_t Control value * @return none * * Set the control register */ void __set_CONTROL(uint32_t control) { __ASM volatile ("MSR control, %0" : : "r" (control) ); } #endif tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/cmsis/core_cm3.h000066400000000000000000001246311207233610700244070ustar00rootroot00000000000000/****************************************************************************** * @file: core_cm3.h * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File * @version: V1.10 * @date: 24. Feb. 2009 *---------------------------------------------------------------------------- * * Copyright (C) 2009 ARM Limited. All rights reserved. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * ARM Limited (ARM) is supplying this software for use with Cortex-Mx * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. ******************************************************************************/ #ifndef __CM3_CORE_H__ #define __CM3_CORE_H__ #define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ #define __CM3_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */ #define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ #define __CORTEX_M (0x03) /*!< Cortex core */ /** * Lint configuration \n * ----------------------- \n * * The following Lint messages will be suppressed and not shown: \n * \n * --- Error 10: --- \n * register uint32_t __regBasePri __asm("basepri"); \n * Error 10: Expecting ';' \n * \n * --- Error 530: --- \n * return(__regBasePri); \n * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n * \n * --- Error 550: --- \n * __regBasePri = (basePri & 0x1ff); \n * } \n * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n * \n * --- Error 754: --- \n * uint32_t RESERVED0[24]; \n * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced \n * \n * --- Error 750: --- \n * #define __CM3_CORE_H__ \n * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n * \n * --- Error 528: --- \n * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n * \n * --- Error 751: --- \n * } InterruptType_Type; \n * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n * \n * \n * Note: To re-enable a Message, insert a space before 'lint' * \n * */ /*lint -save */ /*lint -e10 */ /*lint -e530 */ /*lint -e550 */ /*lint -e754 */ /*lint -e750 */ /*lint -e528 */ /*lint -e751 */ #include /* Include standard types */ #if defined (__ICCARM__) #include /* IAR Intrinsics */ #endif #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ #endif /** * IO definitions * * define access restrictions to peripheral registers */ #define __I volatile const /*!< defines 'read only' permissions */ #define __O volatile /*!< defines 'write only' permissions */ #define __IO volatile /*!< defines 'read / write' permissions */ /******************************************************************************* * Register Abstraction ******************************************************************************/ /* System Reset */ #define NVIC_VECTRESET 0 /*!< Vector Reset Bit */ #define NVIC_SYSRESETREQ 2 /*!< System Reset Request */ #define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */ #define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */ /* Core Debug */ #define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */ #define ITM_TCR_ITMENA 1 /*!< ITM enable */ /* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */ typedef struct { __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */ uint32_t RESERVED0[24]; __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */ uint32_t RSERVED1[24]; __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */ uint32_t RESERVED2[24]; __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */ uint32_t RESERVED3[24]; __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */ uint32_t RESERVED4[56]; __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */ uint32_t RESERVED5[644]; __O uint32_t STIR; /*!< Software Trigger Interrupt Register */ } NVIC_Type; /* memory mapping struct for System Control Block */ typedef struct { __I uint32_t CPUID; /*!< CPU ID Base Register */ __IO uint32_t ICSR; /*!< Interrupt Control State Register */ __IO uint32_t VTOR; /*!< Vector Table Offset Register */ __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */ __IO uint32_t SCR; /*!< System Control Register */ __IO uint32_t CCR; /*!< Configuration Control Register */ __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */ __IO uint32_t SHCSR; /*!< System Handler Control and State Register */ __IO uint32_t CFSR; /*!< Configurable Fault Status Register */ __IO uint32_t HFSR; /*!< Hard Fault Status Register */ __IO uint32_t DFSR; /*!< Debug Fault Status Register */ __IO uint32_t MMFAR; /*!< Mem Manage Address Register */ __IO uint32_t BFAR; /*!< Bus Fault Address Register */ __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */ __I uint32_t PFR[2]; /*!< Processor Feature Register */ __I uint32_t DFR; /*!< Debug Feature Register */ __I uint32_t ADR; /*!< Auxiliary Feature Register */ __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */ __I uint32_t ISAR[5]; /*!< ISA Feature Register */ } SCB_Type; /* memory mapping struct for SysTick */ typedef struct { __IO uint32_t CTRL; /*!< SysTick Control and Status Register */ __IO uint32_t LOAD; /*!< SysTick Reload Value Register */ __IO uint32_t VAL; /*!< SysTick Current Value Register */ __I uint32_t CALIB; /*!< SysTick Calibration Register */ } SysTick_Type; /* memory mapping structur for ITM */ typedef struct { __O union { __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */ __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */ __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */ } PORT [32]; /*!< ITM Stimulus Port Registers */ uint32_t RESERVED0[864]; __IO uint32_t TER; /*!< ITM Trace Enable Register */ uint32_t RESERVED1[15]; __IO uint32_t TPR; /*!< ITM Trace Privilege Register */ uint32_t RESERVED2[15]; __IO uint32_t TCR; /*!< ITM Trace Control Register */ uint32_t RESERVED3[29]; __IO uint32_t IWR; /*!< ITM Integration Write Register */ __IO uint32_t IRR; /*!< ITM Integration Read Register */ __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */ uint32_t RESERVED4[43]; __IO uint32_t LAR; /*!< ITM Lock Access Register */ __IO uint32_t LSR; /*!< ITM Lock Status Register */ uint32_t RESERVED5[6]; __I uint32_t PID4; /*!< ITM Product ID Registers */ __I uint32_t PID5; __I uint32_t PID6; __I uint32_t PID7; __I uint32_t PID0; __I uint32_t PID1; __I uint32_t PID2; __I uint32_t PID3; __I uint32_t CID0; __I uint32_t CID1; __I uint32_t CID2; __I uint32_t CID3; } ITM_Type; /* memory mapped struct for Interrupt Type */ typedef struct { uint32_t RESERVED0; __I uint32_t ICTR; /*!< Interrupt Control Type Register */ #if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) __IO uint32_t ACTLR; /*!< Auxiliary Control Register */ #else uint32_t RESERVED1; #endif } InterruptType_Type; /* Memory Protection Unit */ #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) typedef struct { __I uint32_t TYPE; /*!< MPU Type Register */ __IO uint32_t CTRL; /*!< MPU Control Register */ __IO uint32_t RNR; /*!< MPU Region RNRber Register */ __IO uint32_t RBAR; /*!< MPU Region Base Address Register */ __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */ __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */ __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */ __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */ __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */ __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */ __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */ } MPU_Type; #endif /* Core Debug Register */ typedef struct { __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */ __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */ __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */ __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */ } CoreDebug_Type; /* Memory mapping of Cortex-M3 Hardware */ #define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ #define ITM_BASE (0xE0000000) /*!< ITM Base Address */ #define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ #define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ #define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ #define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ #define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ //#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ #define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ #define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ #define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ #endif /******************************************************************************* * Hardware Abstraction Layer ******************************************************************************/ #if defined ( __CC_ARM ) #define __ASM __asm /*!< asm keyword for ARM Compiler */ #define __INLINE __inline /*!< inline keyword for ARM Compiler */ #elif defined ( __ICCARM__ ) #define __ASM __asm /*!< asm keyword for IAR Compiler */ #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ #define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ #elif defined ( __GNUC__ ) #define __ASM asm /*!< asm keyword for GNU Compiler */ #define __INLINE inline /*!< inline keyword for GNU Compiler */ #endif /* ################### Compiler specific Intrinsics ########################### */ #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ /* ARM armcc specific functions */ #define __enable_fault_irq __enable_fiq #define __disable_fault_irq __disable_fiq #define __NOP __nop #define __WFI __wfi #define __WFE __wfe #define __SEV __sev #define __ISB() __isb(0) #define __DSB() __dsb(0) #define __DMB() __dmb(0) #define __REV __rev #define __RBIT __rbit #define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) #define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) #define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) #define __STREXB(value, ptr) __strex(value, ptr) #define __STREXH(value, ptr) __strex(value, ptr) #define __STREXW(value, ptr) __strex(value, ptr) /* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ /* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ /* intrinsic void __enable_irq(); */ /* intrinsic void __disable_irq(); */ /** * @brief Return the Process Stack Pointer * * @param none * @return uint32_t ProcessStackPointer * * Return the actual process stack pointer */ extern uint32_t __get_PSP(void); /** * @brief Set the Process Stack Pointer * * @param uint32_t Process Stack Pointer * @return none * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ extern void __set_PSP(uint32_t topOfProcStack); /** * @brief Return the Main Stack Pointer * * @param none * @return uint32_t Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ extern uint32_t __get_MSP(void); /** * @brief Set the Main Stack Pointer * * @param uint32_t Main Stack Pointer * @return none * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ extern void __set_MSP(uint32_t topOfMainStack); /** * @brief Reverse byte order in unsigned short value * * @param uint16_t value to reverse * @return uint32_t reversed value * * Reverse byte order in unsigned short value */ extern uint32_t __REV16(uint16_t value); /* * @brief Reverse byte order in signed short value with sign extension to integer * * @param int16_t value to reverse * @return int32_t reversed value * * Reverse byte order in signed short value with sign extension to integer */ extern int32_t __REVSH(int16_t value); #if (__ARMCC_VERSION < 400000) /** * @brief Remove the exclusive lock created by ldrex * * @param none * @return none * * Removes the exclusive lock which is created by ldrex. */ extern void __CLREX(void); /** * @brief Return the Base Priority value * * @param none * @return uint32_t BasePriority * * Return the content of the base priority register */ extern uint32_t __get_BASEPRI(void); /** * @brief Set the Base Priority value * * @param uint32_t BasePriority * @return none * * Set the base priority register */ extern void __set_BASEPRI(uint32_t basePri); /** * @brief Return the Priority Mask value * * @param none * @return uint32_t PriMask * * Return the state of the priority mask bit from the priority mask * register */ extern uint32_t __get_PRIMASK(void); /** * @brief Set the Priority Mask value * * @param uint32_t PriMask * @return none * * Set the priority mask bit in the priority mask register */ extern void __set_PRIMASK(uint32_t priMask); /** * @brief Return the Fault Mask value * * @param none * @return uint32_t FaultMask * * Return the content of the fault mask register */ extern uint32_t __get_FAULTMASK(void); /** * @brief Set the Fault Mask value * * @param uint32_t faultMask value * @return none * * Set the fault mask register */ extern void __set_FAULTMASK(uint32_t faultMask); /** * @brief Return the Control Register value * * @param none * @return uint32_t Control value * * Return the content of the control register */ extern uint32_t __get_CONTROL(void); /** * @brief Set the Control Register value * * @param uint32_t Control value * @return none * * Set the control register */ extern void __set_CONTROL(uint32_t control); #else /* (__ARMCC_VERSION >= 400000) */ /** * @brief Remove the exclusive lock created by ldrex * * @param none * @return none * * Removes the exclusive lock which is created by ldrex. */ #define __CLREX __clrex /** * @brief Return the Base Priority value * * @param none * @return uint32_t BasePriority * * Return the content of the base priority register */ static __INLINE uint32_t __get_BASEPRI(void) { register uint32_t __regBasePri __ASM("basepri"); return(__regBasePri); } /** * @brief Set the Base Priority value * * @param uint32_t BasePriority * @return none * * Set the base priority register */ static __INLINE void __set_BASEPRI(uint32_t basePri) { register uint32_t __regBasePri __ASM("basepri"); __regBasePri = (basePri & 0x1ff); } /** * @brief Return the Priority Mask value * * @param none * @return uint32_t PriMask * * Return the state of the priority mask bit from the priority mask * register */ static __INLINE uint32_t __get_PRIMASK(void) { register uint32_t __regPriMask __ASM("primask"); return(__regPriMask); } /** * @brief Set the Priority Mask value * * @param uint32_t PriMask * @return none * * Set the priority mask bit in the priority mask register */ static __INLINE void __set_PRIMASK(uint32_t priMask) { register uint32_t __regPriMask __ASM("primask"); __regPriMask = (priMask); } /** * @brief Return the Fault Mask value * * @param none * @return uint32_t FaultMask * * Return the content of the fault mask register */ static __INLINE uint32_t __get_FAULTMASK(void) { register uint32_t __regFaultMask __ASM("faultmask"); return(__regFaultMask); } /** * @brief Set the Fault Mask value * * @param uint32_t faultMask value * @return none * * Set the fault mask register */ static __INLINE void __set_FAULTMASK(uint32_t faultMask) { register uint32_t __regFaultMask __ASM("faultmask"); __regFaultMask = (faultMask & 1); } /** * @brief Return the Control Register value * * @param none * @return uint32_t Control value * * Return the content of the control register */ static __INLINE uint32_t __get_CONTROL(void) { register uint32_t __regControl __ASM("control"); return(__regControl); } /** * @brief Set the Control Register value * * @param uint32_t Control value * @return none * * Set the control register */ static __INLINE void __set_CONTROL(uint32_t control) { register uint32_t __regControl __ASM("control"); __regControl = control; } #endif /* __ARMCC_VERSION */ #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ /* IAR iccarm specific functions */ #define __enable_irq __enable_interrupt /*!< global Interrupt enable */ #define __disable_irq __disable_interrupt /*!< global Interrupt disable */ static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } static __INLINE void __WFI() { __ASM ("wfi"); } static __INLINE void __WFE() { __ASM ("wfe"); } static __INLINE void __SEV() { __ASM ("sev"); } static __INLINE void __CLREX() { __ASM ("clrex"); } /** * @brief Return the Process Stack Pointer * * @param none * @return uint32_t ProcessStackPointer * * Return the actual process stack pointer */ extern uint32_t __get_PSP(void); /** * @brief Set the Process Stack Pointer * * @param uint32_t Process Stack Pointer * @return none * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ extern void __set_PSP(uint32_t topOfProcStack); /** * @brief Return the Main Stack Pointer * * @param none * @return uint32_t Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ extern uint32_t __get_MSP(void); /** * @brief Set the Main Stack Pointer * * @param uint32_t Main Stack Pointer * @return none * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ extern void __set_MSP(uint32_t topOfMainStack); /** * @brief Reverse byte order in unsigned short value * * @param uint16_t value to reverse * @return uint32_t reversed value * * Reverse byte order in unsigned short value */ extern uint32_t __REV16(uint16_t value); /** * @brief Reverse bit order of value * * @param uint32_t value to reverse * @return uint32_t reversed value * * Reverse bit order of value */ extern uint32_t __RBIT(uint32_t value); /** * @brief LDR Exclusive * * @param uint8_t* address * @return uint8_t value of (*address) * * Exclusive LDR command */ extern uint8_t __LDREXB(uint8_t *addr); /** * @brief LDR Exclusive * * @param uint16_t* address * @return uint16_t value of (*address) * * Exclusive LDR command */ extern uint16_t __LDREXH(uint16_t *addr); /** * @brief LDR Exclusive * * @param uint32_t* address * @return uint32_t value of (*address) * * Exclusive LDR command */ extern uint32_t __LDREXW(uint32_t *addr); /** * @brief STR Exclusive * * @param uint8_t *address * @param uint8_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ extern uint32_t __STREXB(uint8_t value, uint8_t *addr); /** * @brief STR Exclusive * * @param uint16_t *address * @param uint16_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ extern uint32_t __STREXH(uint16_t value, uint16_t *addr); /** * @brief STR Exclusive * * @param uint32_t *address * @param uint32_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ extern uint32_t __STREXW(uint32_t value, uint32_t *addr); /* intrinsic void __set_PRIMASK(); */ /* intrinsic void __get_PRIMASK(); */ /* intrinsic void __set_FAULTMASK(); */ /* intrinsic void __get_FAULTMASK(); */ /* intrinsic uint32_t __REV(uint32_t value); */ /* intrinsic uint32_t __REVSH(uint32_t value); */ /* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ /* intrinsic unsigned long __LDREX(unsigned long *); */ #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ /* GNU gcc specific functions */ static __INLINE void __NOP() { __ASM volatile ("nop"); } static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } static __INLINE void __WFI() { __ASM volatile ("wfi"); } static __INLINE void __WFE() { __ASM volatile ("wfe"); } static __INLINE void __SEV() { __ASM volatile ("sev"); } static __INLINE void __ISB(void *arg) { __ASM volatile ("isb"); } static __INLINE void __DSB(void *arg) { __ASM volatile ("dsb"); } static __INLINE void __DMB(void *arg) { __ASM volatile ("dmb"); } static __INLINE void __CLREX() { __ASM volatile ("clrex"); } /** * @brief Return the Process Stack Pointer * * @param none * @return uint32_t ProcessStackPointer * * Return the actual process stack pointer */ extern uint32_t __get_PSP(void); /** * @brief Set the Process Stack Pointer * * @param uint32_t Process Stack Pointer * @return none * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ extern void __set_PSP(uint32_t topOfProcStack); /** * @brief Return the Main Stack Pointer * * @param none * @return uint32_t Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ extern uint32_t __get_MSP(void); /** * @brief Set the Main Stack Pointer * * @param uint32_t Main Stack Pointer * @return none * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ extern void __set_MSP(uint32_t topOfMainStack); /** * @brief Return the Base Priority value * * @param none * @return uint32_t BasePriority * * Return the content of the base priority register */ extern uint32_t __get_BASEPRI(void); /** * @brief Set the Base Priority value * * @param uint32_t BasePriority * @return none * * Set the base priority register */ extern void __set_BASEPRI(uint32_t basePri); /** * @brief Return the Priority Mask value * * @param none * @return uint32_t PriMask * * Return the state of the priority mask bit from the priority mask * register */ extern uint32_t __get_PRIMASK(void); /** * @brief Set the Priority Mask value * * @param uint32_t PriMask * @return none * * Set the priority mask bit in the priority mask register */ extern void __set_PRIMASK(uint32_t priMask); /** * @brief Return the Fault Mask value * * @param none * @return uint32_t FaultMask * * Return the content of the fault mask register */ extern uint32_t __get_FAULTMASK(void); /** * @brief Set the Fault Mask value * * @param uint32_t faultMask value * @return none * * Set the fault mask register */ extern void __set_FAULTMASK(uint32_t faultMask); /** * @brief Return the Control Register value * * @param none * @return uint32_t Control value * * Return the content of the control register */ extern uint32_t __get_CONTROL(void); /** * @brief Set the Control Register value * * @param uint32_t Control value * @return none * * Set the control register */ extern void __set_CONTROL(uint32_t control); /** * @brief Reverse byte order in integer value * * @param uint32_t value to reverse * @return uint32_t reversed value * * Reverse byte order in integer value */ extern uint32_t __REV(uint32_t value); /** * @brief Reverse byte order in unsigned short value * * @param uint16_t value to reverse * @return uint32_t reversed value * * Reverse byte order in unsigned short value */ extern uint32_t __REV16(uint16_t value); /* * Reverse byte order in signed short value with sign extension to integer * * @param int16_t value to reverse * @return int32_t reversed value * * @brief Reverse byte order in signed short value with sign extension to integer */ extern int32_t __REVSH(int16_t value); /** * @brief Reverse bit order of value * * @param uint32_t value to reverse * @return uint32_t reversed value * * Reverse bit order of value */ extern uint32_t __RBIT(uint32_t value); /** * @brief LDR Exclusive * * @param uint8_t* address * @return uint8_t value of (*address) * * Exclusive LDR command */ extern uint8_t __LDREXB(uint8_t *addr); /** * @brief LDR Exclusive * * @param uint16_t* address * @return uint16_t value of (*address) * * Exclusive LDR command */ extern uint16_t __LDREXH(uint16_t *addr); /** * @brief LDR Exclusive * * @param uint32_t* address * @return uint32_t value of (*address) * * Exclusive LDR command */ extern uint32_t __LDREXW(uint32_t *addr); /** * @brief STR Exclusive * * @param uint8_t *address * @param uint8_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ extern uint32_t __STREXB(uint8_t value, uint8_t *addr); /** * @brief STR Exclusive * * @param uint16_t *address * @param uint16_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ extern uint32_t __STREXH(uint16_t value, uint16_t *addr); /** * @brief STR Exclusive * * @param uint32_t *address * @param uint32_t value to store * @return uint32_t successful / failed * * Exclusive STR command */ extern uint32_t __STREXW(uint32_t value, uint32_t *addr); #endif /* ########################## NVIC functions #################################### */ /** * @brief Set the Priority Grouping in NVIC Interrupt Controller * * @param uint32_t priority_grouping is priority grouping field * @return * * Set the priority grouping field using the required unlock sequence. * The parameter priority_grouping is assigned to the field * SCB->AIRCR [10:8] PRIGROUP field. */ static __INLINE void NVIC_SetPriorityGrouping(uint32_t priority_grouping) { uint32_t reg_value=0; reg_value = SCB->AIRCR; /* read old register configuration */ reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */ reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (priority_grouping << 8))); /* Insert write key and priorty group */ SCB->AIRCR = reg_value; } /** * @brief Enable Interrupt in NVIC Interrupt Controller * * @param IRQn_Type IRQn specifies the interrupt number * @return none * * Enable a device specific interupt in the NVIC interrupt controller. * The interrupt number cannot be a negative value. */ static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) { NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ } /** * @brief Disable the interrupt line for external interrupt specified * * @param IRQn_Type IRQn is the positive number of the external interrupt * @return none * * Disable a device specific interupt in the NVIC interrupt controller. * The interrupt number cannot be a negative value. */ static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) { NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ } /** * @brief Read the interrupt pending bit for a device specific interrupt source * * @param IRQn_Type IRQn is the number of the device specifc interrupt * @return IRQn_Type Number of pending interrupt or zero * * Read the pending register in NVIC and return the number of the * specified interrupt if its status is pending, otherwise it returns * zero. The interrupt number cannot be a negative value. */ static __INLINE IRQn_Type NVIC_GetPendingIRQ(IRQn_Type IRQn) { return((IRQn_Type) (NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))); /* Return Interrupt bit or 'zero' */ } /** * @brief Set the pending bit for an external interrupt * * @param IRQn_Type IRQn is the Number of the interrupt * @return none * * Set the pending bit for the specified interrupt. * The interrupt number cannot be a negative value. */ static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) { NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ } /** * @brief Clear the pending bit for an external interrupt * * @param IRQn_Type IRQn is the Number of the interrupt * @return none * * Clear the pending bit for the specified interrupt. * The interrupt number cannot be a negative value. */ static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) { NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ } /** * @brief Read the active bit for an external interrupt * * @param IRQn_Type IRQn is the Number of the interrupt * @return IRQn_Type Number of pending interrupt or zero * * Read the active register in NVIC and returns the number of the * specified interrupt if its status is active, otherwise it * returns zero. The interrupt number cannot be a negative value. */ static __INLINE IRQn_Type NVIC_GetActive(IRQn_Type IRQn) { return((IRQn_Type)(NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))); /* Return Interruptnumber or 'zero' */ } /** * @brief Set the priority for an interrupt * * @param IRQn_Type IRQn is the Number of the interrupt * @param priority is the priority for the interrupt * @return none * * Set the priority for the specified interrupt. The interrupt * number can be positive to specify an external (device specific) * interrupt, or negative to specify an internal (core) interrupt. \n * * Note: The priority cannot be set for every core interrupt. */ static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, int32_t priority) { if(IRQn < 0) { SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ else { //NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ NVIC->IP[(uint32_t)(IRQn)] = (priority & 0xff); } /* set Priority for device specific Interrupts */ } /** * @brief Read the priority for an interrupt * * @param IRQn_Type IRQn is the Number of the interrupt * @return priority is the priority for the interrupt * * Read the priority for the specified interrupt. The interrupt * number can be positive to specify an external (device specific) * interrupt, or negative to specify an internal (core) interrupt. * * The returned priority value is automatically aligned to the implemented * priority bits of the microcontroller. * * Note: The priority cannot be set for every core interrupt. */ static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) { if(IRQn < 0) { return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ else { return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ } /* ################################## SysTick function ############################################ */ #if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) /* SysTick constants */ #define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */ #define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */ #define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */ #define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */ /** * @brief Initialize and start the SysTick counter and its interrupt. * * @param uint32_t ticks is the number of ticks between two interrupts * @return none * * Initialise the system tick timer and its interrupt and start the * system tick timer / counter in free running mode to generate * periodical interrupts. */ static __INLINE uint32_t SysTick_Config(uint32_t ticks) { if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */ SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */ NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ SysTick->VAL = (0x00); /* Load the SysTick Counter Value */ SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<DEMCR & CoreDebug_DEMCR_TRCENA) && (ITM->TCR & ITM_TCR_ITMENA) && (ITM->TER & (1UL << 0)) ) { while (ITM->PORT[0].u32 == 0); ITM->PORT[0].u8 = (uint8_t) ch; } return (ch); } #endif /*lint -restore */ tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/000077500000000000000000000000001207233610700237355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/000077500000000000000000000000001207233610700246565ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/dbgu.c000066400000000000000000000123141207233610700257440ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "dbgu.h" #include //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Initializes the DBGU with the given parameters, and enables both the /// transmitter and the receiver. The mode parameter contains the value of the /// DBGU_MR register. /// Value DBGU_STANDARD can be used for mode to get the most common configuration /// (i.e. aysnchronous, 8bits, no parity, 1 stop bit, no flow control). /// \param mode Operating mode to configure. /// \param baudrate Desired baudrate (e.g. 115200). /// \param mck Frequency of the system master clock in Hz. //------------------------------------------------------------------------------ void DBGU_Configure( unsigned int mode, unsigned int baudrate, unsigned int mck) { #if defined(cortexm3) // Enable clock for UART AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_DBGU); #endif // Reset & disable receiver and transmitter, disable interrupts AT91C_BASE_DBGU->DBGU_CR = AT91C_US_RSTRX | AT91C_US_RSTTX; AT91C_BASE_DBGU->DBGU_IDR = 0xFFFFFFFF; // Configure baud rate AT91C_BASE_DBGU->DBGU_BRGR = mck / (baudrate * 16); // Configure mode register AT91C_BASE_DBGU->DBGU_MR = mode; // Disable DMA channel AT91C_BASE_DBGU->DBGU_PTCR = AT91C_PDC_RXTDIS | AT91C_PDC_TXTDIS; // Enable receiver and transmitter AT91C_BASE_DBGU->DBGU_CR = AT91C_US_RXEN | AT91C_US_TXEN; } //------------------------------------------------------------------------------ /// Outputs a character on the DBGU line. /// \note This function is synchronous (i.e. uses polling). /// \param c Character to send. //------------------------------------------------------------------------------ void DBGU_PutChar(unsigned char c) { // Wait for the transmitter to be ready while ((AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_TXEMPTY) == 0); // Send character AT91C_BASE_DBGU->DBGU_THR = c; // Wait for the transfer to complete while ((AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_TXEMPTY) == 0); } //------------------------------------------------------------------------------ /// Return 1 if a character can be read in DBGU //------------------------------------------------------------------------------ unsigned int DBGU_IsRxReady() { return (AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_RXRDY); } //------------------------------------------------------------------------------ /// Reads and returns a character from the DBGU. /// \note This function is synchronous (i.e. uses polling). /// \return Character received. //------------------------------------------------------------------------------ unsigned char DBGU_GetChar(void) { while ((AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_RXRDY) == 0); return AT91C_BASE_DBGU->DBGU_RHR; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/dbgu.h000066400000000000000000000073241207233610700257560ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// This module provides definitions and functions for using the Debug Unit /// (DBGU). /// /// It also overloads the fputc(), fputs() & putchar() functions so the printf() /// method outputs its data on the DBGU. This behavior can be suppressed by /// defining NOFPUT during compilation. /// /// !Usage /// /// -# Enable the DBGU pins (see pio & board.h). /// -# Configure the DBGU using DBGU_Configure with the desired operating mode. /// -# Send characters using DBGU_PutChar() or the printf() method. /// -# Receive characters using DBGU_GetChar(). /// /// \note Unless specified, all the functions defined here operate synchronously; /// i.e. they all wait the data is sent/received before returning. //------------------------------------------------------------------------------ #ifndef DBGU_H #define DBGU_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ /// Standard operating mode (asynchronous, 8bit, no parity, 1 stop bit) #define DBGU_STANDARD AT91C_US_PAR_NONE //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ extern void DBGU_Configure( unsigned int mode, unsigned int baudrate, unsigned int mck); extern unsigned char DBGU_GetChar(void); extern void DBGU_PutChar(unsigned char c); extern unsigned int DBGU_IsRxReady(void); #endif //#ifndef DBGU_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/000077500000000000000000000000001207233610700245305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/irq.h000066400000000000000000000073471207233610700255070ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// Methods and definitions for configuring interrupts. /// /// !Usage /// /// -# Configure an interrupt source using IRQ_ConfigureIT /// -# Enable or disable interrupt generation of a particular source with /// IRQ_EnableIT and IRQ_DisableIT. /// /// \note Most of the time, peripheral interrupts must be also configured /// inside the peripheral itself. //------------------------------------------------------------------------------ #ifndef IRQ_H #define IRQ_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include #if defined(cortexm3) #include #endif //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ #if 0 #if defined(cortexm3) #ifdef __NVIC_PRIO_BITS #undef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS ((SCB->AIRCR & 0x700) >> 8) #endif #endif #endif //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ extern void IRQ_ConfigureIT(unsigned int source, unsigned int mode, // mode for AIC, priority for NVIC void( *handler )( void )); // ISR extern void IRQ_EnableIT(unsigned int source); extern void IRQ_DisableIT(unsigned int source); #endif //#ifndef IRQ_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/nvic.c000066400000000000000000000153071207233610700256410ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "board.h" #include "irq.h" #include "exceptions.h" #include /// The index of IRQ handler in the exception table #define NVIC_IRQ_HANDLER_INDEX 16 //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Configures an interrupt in the NVIC. The interrupt is identified by its /// source (AT91C_ID_xxx) and is configured to a specified priority and /// interrupt handler function. priority is the value that will be put in NVIC_IPRx /// and the function address will be set in "ExceptionTable". The parameter priority /// will include the preemptionPriority and the subPriority, where the subPriority /// defined in the B[7:0] of the parameter "priority", and the preemptionPriority defined /// in the B[15:8] of the parameter "priority". /// The interrupt is disabled before configuration, so it is useless /// to do it before calling this function. When NVIC_ConfigureIT returns, the /// interrupt will always be disabled and cleared; it must be enabled by a /// call to NVIC_EnableIT(). /// \param source Interrupt source to configure. /// \param priority Pre-emption priority (B[15:8] )+ subPriority (B[7:0]) /// \param handler Interrupt handler function. //------------------------------------------------------------------------------ void IRQ_ConfigureIT( unsigned int source, //unsigned int preemptionPriority, //unsigned int subPriority, unsigned int priority, IntFunc handler) { unsigned int priGroup = __NVIC_PRIO_BITS; unsigned int nPre = 8 - priGroup; unsigned int nSub = priGroup; unsigned int preemptionPriority; unsigned int subPriority; unsigned int IRQpriority; preemptionPriority = (priority & 0xff00) >> 8; subPriority = (priority & 0xff); // Disable the interrupt first NVIC_DisableIRQ((IRQn_Type)source); // Clear any pending status NVIC_ClearPendingIRQ((IRQn_Type)source); // Configure interrupt handler //if (handler == 0) handler = IrqHandlerNotUsed; // GetExceptionTable()[NVIC_IRQ_HANDLER_INDEX + source] = handler; if (subPriority >= (0x01 << nSub)) subPriority = (0x01 << nSub) - 1; if (preemptionPriority >= (0x01 << nPre)) preemptionPriority = (0x01 << nPre) - 1; IRQpriority = (subPriority | (preemptionPriority << nSub)); NVIC_SetPriority((IRQn_Type)source, IRQpriority); } //------------------------------------------------------------------------------ /// Enables interrupt coming from the given (unique) source (AT91C_ID_xxx). /// \param source Interrupt source to enable. //------------------------------------------------------------------------------ void IRQ_EnableIT(unsigned int source) { NVIC_EnableIRQ((IRQn_Type)source); } //------------------------------------------------------------------------------ /// Disables interrupt coming from the given (unique) source (AT91C_ID_xxx). /// \param source Interrupt source to disable. //------------------------------------------------------------------------------ void IRQ_DisableIT(unsigned int source) { NVIC_DisableIRQ((IRQn_Type)source); } //------------------------------------------------------------------------------ /// Set interrupt pending bit from the given (unique) source (AT91C_ID_xxx). /// \param source Interrupt source to set. //------------------------------------------------------------------------------ void NVIC_SetPending(unsigned int source) { NVIC_SetPendingIRQ((IRQn_Type)source); } //------------------------------------------------------------------------------ /// Clear interrupt pending bit from the given (unique) source (AT91C_ID_xxx). /// \param source Interrupt source to clear. //------------------------------------------------------------------------------ void NVIC_ClrPending(unsigned int source) { NVIC_ClearPendingIRQ((IRQn_Type)source); } #if !defined(USE_CMSIS_on) //------------------------------------------------------------------------------ /// Use the Software Trigger Interrupt Register to pend an interrupt. /// \param source Interrupt source to trigger. //------------------------------------------------------------------------------ void NVIC_Swi(unsigned int source) { AT91C_BASE_NVIC->NVIC_STIR = source; } #endif tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/000077500000000000000000000000001207233610700245245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio.c000066400000000000000000000332571207233610700254710ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "pio.h" #include //------------------------------------------------------------------------------ // Local Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Configures one or more pin(s) of a PIO controller as being controlled by /// peripheral A. Optionally, the corresponding internal pull-up(s) can be /// enabled. /// \param pio Pointer to a PIO controller. /// \param mask Bitmask of one or more pin(s) to configure. /// \param enablePullUp Indicates if the pin(s) internal pull-up shall be /// configured. //------------------------------------------------------------------------------ static void PIO_SetPeripheralA( AT91S_PIO *pio, unsigned int mask, unsigned char enablePullUp) { #if !defined(AT91C_PIOA_ASR) unsigned int abmr; #endif // Disable interrupts on the pin(s) pio->PIO_IDR = mask; // Enable the pull-up(s) if necessary if (enablePullUp) { pio->PIO_PPUER = mask; } else { pio->PIO_PPUDR = mask; } // Configure pin #if defined(AT91C_PIOA_ASR) pio->PIO_ASR = mask; #else abmr = pio->PIO_ABSR; pio->PIO_ABSR &= (~mask & abmr); #endif pio->PIO_PDR = mask; } //------------------------------------------------------------------------------ /// Configures one or more pin(s) of a PIO controller as being controlled by /// peripheral B. Optionally, the corresponding internal pull-up(s) can be /// enabled. /// \param pio Pointer to a PIO controller. /// \param mask Bitmask of one or more pin(s) to configure. /// \param enablePullUp Indicates if the pin(s) internal pull-up shall be /// configured. //------------------------------------------------------------------------------ static void PIO_SetPeripheralB( AT91S_PIO *pio, unsigned int mask, unsigned char enablePullUp) { #if !defined(AT91C_PIOA_BSR) unsigned int abmr; #endif // Disable interrupts on the pin(s) pio->PIO_IDR = mask; // Enable the pull-up(s) if necessary if (enablePullUp) { pio->PIO_PPUER = mask; } else { pio->PIO_PPUDR = mask; } // Configure pin #if defined(AT91C_PIOA_BSR) pio->PIO_BSR = mask; #else abmr = pio->PIO_ABSR; pio->PIO_ABSR = mask | abmr; #endif pio->PIO_PDR = mask; } #if defined(AT91C_PIOA_IFDGSR) //Glitch or Debouncing filter selection supported //------------------------------------------------------------------------------ /// Configures Glitch or Debouncing filter for input /// \param pio Pointer to a PIO controller. /// \param mask Bitmask for filter selection. /// each of 32 bit field, 0 is Glitch, 1 is Debouncing /// \param clkDiv Clock divider if Debouncing select, using the lowest 14 bits /// common for all PIO line of selecting deboucing filter //------------------------------------------------------------------------------ static void PIO_SetFilter( AT91S_PIO *pio, unsigned int filterSel, unsigned int clkDiv) { pio->PIO_DIFSR = filterSel;//set Debouncing, 0 bit field no effect pio->PIO_SCIFSR = ~filterSel;//set Glitch, 0 bit field no effect pio->PIO_SCDR = clkDiv & 0x3FFF;//the lowest 14 bits work } #endif //------------------------------------------------------------------------------ /// Configures one or more pin(s) or a PIO controller as inputs. Optionally, /// the corresponding internal pull-up(s) and glitch filter(s) can be /// enabled. /// \param pio Pointer to a PIO controller. /// \param mask Bitmask indicating which pin(s) to configure as input(s). /// \param enablePullUp Indicates if the internal pull-up(s) must be enabled. /// \param enableFilter Indicates if the glitch filter(s) must be enabled. //------------------------------------------------------------------------------ static void PIO_SetInput( AT91S_PIO *pio, unsigned int mask, unsigned char enablePullUp, unsigned char enableFilter) { // Disable interrupts pio->PIO_IDR = mask; // Enable pull-up(s) if necessary if (enablePullUp) { pio->PIO_PPUER = mask; } else { pio->PIO_PPUDR = mask; } // Enable filter(s) if necessary if (enableFilter) { pio->PIO_IFER = mask; } else { pio->PIO_IFDR = mask; } // Configure pin as input pio->PIO_ODR = mask; pio->PIO_PER = mask; } //------------------------------------------------------------------------------ /// Configures one or more pin(s) of a PIO controller as outputs, with the /// given default value. Optionally, the multi-drive feature can be enabled /// on the pin(s). /// \param pio Pointer to a PIO controller. /// \param mask Bitmask indicating which pin(s) to configure. /// \param defaultValue Default level on the pin(s). /// \param enableMultiDrive Indicates if the pin(s) shall be configured as /// open-drain. /// \param enablePullUp Indicates if the pin shall have its pull-up activated. //------------------------------------------------------------------------------ static void PIO_SetOutput( AT91S_PIO *pio, unsigned int mask, unsigned char defaultValue, unsigned char enableMultiDrive, unsigned char enablePullUp) { // Disable interrupts pio->PIO_IDR = mask; // Enable pull-up(s) if necessary if (enablePullUp) { pio->PIO_PPUER = mask; } else { pio->PIO_PPUDR = mask; } // Enable multi-drive if necessary if (enableMultiDrive) { pio->PIO_MDER = mask; } else { pio->PIO_MDDR = mask; } // Set default value if (defaultValue) { pio->PIO_SODR = mask; } else { pio->PIO_CODR = mask; } // Configure pin(s) as output(s) pio->PIO_OER = mask; pio->PIO_PER = mask; } //------------------------------------------------------------------------------ // Global Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Configures a list of Pin instances, each of which can either hold a single /// pin or a group of pins, depending on the mask value; all pins are configured /// by this function. The size of the array must also be provided and is easily /// computed using PIO_LISTSIZE whenever its length is not known in advance. /// \param list Pointer to a list of Pin instances. /// \param size Size of the Pin list (calculated using PIO_LISTSIZE). /// \return 1 if the pins have been configured properly; otherwise 0. //------------------------------------------------------------------------------ unsigned char PIO_Configure(const Pin *list, unsigned int size) { // Configure pins while (size > 0) { switch (list->type) { case PIO_PERIPH_A: PIO_SetPeripheralA(list->pio, list->mask, (list->attribute & PIO_PULLUP) ? 1 : 0); break; case PIO_PERIPH_B: PIO_SetPeripheralB(list->pio, list->mask, (list->attribute & PIO_PULLUP) ? 1 : 0); break; case PIO_INPUT: AT91C_BASE_PMC->PMC_PCER = 1 << list->id; PIO_SetInput(list->pio, list->mask, (list->attribute & PIO_PULLUP) ? 1 : 0, (list->attribute & PIO_DEGLITCH)? 1 : 0); #if defined(AT91C_PIOA_IFDGSR) //PIO3 with Glitch or Debouncing selection //if glitch input filter enabled, set it if(list->attribute & PIO_DEGLITCH)//Glitch input filter enabled PIO_SetFilter(list->pio, list->inFilter.filterSel, list->inFilter.clkDivider); #endif break; case PIO_OUTPUT_0: case PIO_OUTPUT_1: PIO_SetOutput(list->pio, list->mask, (list->type == PIO_OUTPUT_1), (list->attribute & PIO_OPENDRAIN) ? 1 : 0, (list->attribute & PIO_PULLUP) ? 1 : 0); break; default: return 0; } list++; size--; } return 1; } //------------------------------------------------------------------------------ /// Sets a high output level on all the PIOs defined in the given Pin instance. /// This has no immediate effects on PIOs that are not output, but the PIO /// controller will memorize the value they are changed to outputs. /// \param pin Pointer to a Pin instance describing one or more pins. //------------------------------------------------------------------------------ void PIO_Set(const Pin *pin) { pin->pio->PIO_SODR = pin->mask; } //------------------------------------------------------------------------------ /// Sets a low output level on all the PIOs defined in the given Pin instance. /// This has no immediate effects on PIOs that are not output, but the PIO /// controller will memorize the value they are changed to outputs. /// \param pin Pointer to a Pin instance describing one or more pins. //------------------------------------------------------------------------------ void PIO_Clear(const Pin *pin) { pin->pio->PIO_CODR = pin->mask; } //------------------------------------------------------------------------------ /// Returns 1 if one or more PIO of the given Pin instance currently have a high /// level; otherwise returns 0. This method returns the actual value that is /// being read on the pin. To return the supposed output value of a pin, use /// PIO_GetOutputDataStatus() instead. /// \param pin Pointer to a Pin instance describing one or more pins. /// \return 1 if the Pin instance contains at least one PIO that currently has /// a high level; otherwise 0. //------------------------------------------------------------------------------ unsigned char PIO_Get(const Pin *pin) { unsigned int reg; if ((pin->type == PIO_OUTPUT_0) || (pin->type == PIO_OUTPUT_1)) { reg = pin->pio->PIO_ODSR; } else { reg = pin->pio->PIO_PDSR; } if ((reg & pin->mask) == 0) { return 0; } else { return 1; } } //------------------------------------------------------------------------------ /// Returns 1 if one or more PIO of the given Pin are configured to output a /// high level (even if they are not output). /// To get the actual value of the pin, use PIO_Get() instead. /// \param pin Pointer to a Pin instance describing one or more pins. /// \return 1 if the Pin instance contains at least one PIO that is configured /// to output a high level; otherwise 0. //------------------------------------------------------------------------------ unsigned char PIO_GetOutputDataStatus(const Pin *pin) { if ((pin->pio->PIO_ODSR & pin->mask) == 0) { return 0; } else { return 1; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio.h000066400000000000000000000223501207233610700254660ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !!!Purpose /// /// This file provides a basic API for PIO configuration and usage of /// user-controlled pins. Please refer to the board.h file for a list of /// available pin definitions. /// /// !!!Usage /// /// -# Define a constant pin description array such as the following one, using /// the existing definitions provided by the board.h file if possible: /// \code /// const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD}; /// \endcode /// Alternatively, it is possible to add new pins by provided the full Pin /// structure: /// \code /// // Pin instance to configure PA10 & PA11 as inputs with the internal /// // pull-up enabled. /// const Pin pPins = { /// (1 << 10) | (1 << 11), /// AT91C_BASE_PIOA, /// AT91C_ID_PIOA, /// PIO_INPUT, /// PIO_PULLUP /// }; /// \endcode /// -# Configure a pin array by calling PIO_Configure() with a pointer to the /// array and its size (which is computed using the PIO_LISTSIZE macro). /// -# Change and get the value of a user-controlled pin using the PIO_Set, /// PIO_Clear and PIO_Get methods. /// -# Get the level being currently output by a user-controlled pin configured /// as an output using PIO_GetOutputDataStatus(). //------------------------------------------------------------------------------ #ifndef PIO_H #define PIO_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include //------------------------------------------------------------------------------ // Global Definitions //------------------------------------------------------------------------------ /// The pin is controlled by the associated signal of peripheral A. #define PIO_PERIPH_A 0 /// The pin is controlled by the associated signal of peripheral B. #define PIO_PERIPH_B 1 /// The pin is an input. #define PIO_INPUT 2 /// The pin is an output and has a default level of 0. #define PIO_OUTPUT_0 3 /// The pin is an output and has a default level of 1. #define PIO_OUTPUT_1 4 /// Default pin configuration (no attribute). #define PIO_DEFAULT (0 << 0) /// The internal pin pull-up is active. #define PIO_PULLUP (1 << 0) /// The internal glitch filter is active. #define PIO_DEGLITCH (1 << 1) /// The pin is open-drain. #define PIO_OPENDRAIN (1 << 2) //------------------------------------------------------------------------------ // Global Macros //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Calculates the size of an array of Pin instances. The array must be defined /// locally (i.e. not a pointer), otherwise the computation will not be correct. /// \param pPins Local array of Pin instances. /// \return Number of elements in array. //------------------------------------------------------------------------------ #define PIO_LISTSIZE(pPins) (sizeof(pPins) / sizeof(Pin)) //------------------------------------------------------------------------------ // Global Types //------------------------------------------------------------------------------ typedef struct _ExtIntMode { ///indicate which pin to enable/disable additional Interrupt mode ///each of 32 bit field represents one PIO line. unsigned int itMask; ///select Edge or level interrupt detection source ///each of 32 bit field represents one PIO line, 0 is Edge, 1 is Level unsigned int edgeLvlSel; ///select rising/high or falling/low detection event ///each of 32 bit field represents one PIO line: ///0 is Falling Edge detection event (if selected Edge interrupt /// detection source, or Low Level detection (if selected /// Level interrupt detection source; ///1 is Rising Edge detection(if selected Edge interrupt /// source, or Low Level detection event(if selected Level /// interrupt detection source. unsigned int lowFallOrRiseHighSel; } ExtIntMode; typedef struct _GlitchDeBounceFilter { ///Select Glitch/Debounce filtering for PIO input ///each of 32 bit field represents one PIO line ///0 is Glitch, 1 is Debouncing unsigned int filterSel; ///slow clock divider selection for Debouncing filter unsigned int clkDivider:14; } GlitchDebounceFilter; //------------------------------------------------------------------------------ /// Describes the type and attribute of one PIO pin or a group of similar pins. /// The #type# field can have the following values: /// - PIO_PERIPH_A /// - PIO_PERIPH_B /// - PIO_OUTPUT_0 /// - PIO_OUTPUT_1 /// - PIO_INPUT /// /// The #attribute# field is a bitmask that can either be set to PIO_DEFAULt, /// or combine (using bitwise OR '|') any number of the following constants: /// - PIO_PULLUP /// - PIO_DEGLITCH /// - PIO_OPENDRAIN //------------------------------------------------------------------------------ typedef struct { /// Bitmask indicating which pin(s) to configure. unsigned int mask; /// Pointer to the PIO controller which has the pin(s). AT91S_PIO *pio; /// Peripheral ID of the PIO controller which has the pin(s). unsigned char id; /// Pin type. unsigned char type; /// Pin attribute. unsigned char attribute; #if defined(AT91C_PIOA_AIMMR) ///Additional Interrupt Mode ExtIntMode itMode; #endif #if defined(AT91C_PIOA_IFDGSR) ///Glitch/Debouncing filter GlitchDebounceFilter inFilter; #endif } Pin; //------------------------------------------------------------------------------ // Global Access Macros //------------------------------------------------------------------------------ //Get Glitch input filter enable/disable status #define PIO_GetIFSR(pPin) ((pPin)->pio->PIO_IFSR) //Get Glitch/Deboucing selection status #define PIO_GetIFDGSR(pPin) ((pPin)->pio->PIO_IFDGSR) //Get Additional PIO interrupt mode mask status #define PIO_GetAIMMR(pPin) ((pPin)->pio->PIO_AIMMR) //Get Interrupt status #define PIO_GetISR(pPin) ((pPin)->pio->PIO_ISR) //Get Edge or Level selection status #define PIO_GetELSR(pPin) ((pPin)->pio->PIO_ELSR) //Get Fall/Rise or Low/High selection status #define PIO_GetFRLHSR(pPin) ((pPin)->pio->PIO_FRLHSR) //Get PIO Lock Status #define PIO_GetLockStatus(pPin) ((pPin)->pio->PIO_LOCKSR) //------------------------------------------------------------------------------ // Global Functions //------------------------------------------------------------------------------ extern unsigned char PIO_Configure(const Pin *list, unsigned int size); extern void PIO_Set(const Pin *pin); extern void PIO_Clear(const Pin *pin); extern unsigned char PIO_Get(const Pin *pin); //extern unsigned int PIO_GetISR(const Pin *pin); extern unsigned char PIO_GetOutputDataStatus(const Pin *pin); #endif //#ifndef PIO_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio_it.c000066400000000000000000000413031207233610700261540ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /// Disable traces for this file #undef TRACE_LEVEL #define TRACE_LEVEL 0 //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "pio_it.h" #include "pio.h" #include #include #include #include //------------------------------------------------------------------------------ // Local definitions //------------------------------------------------------------------------------ /// \exclude /// Maximum number of interrupt sources that can be defined. This /// constant can be increased, but the current value is the smallest possible /// that will be compatible with all existing projects. #define MAX_INTERRUPT_SOURCES 7 //------------------------------------------------------------------------------ // Local types //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \exclude /// Describes a PIO interrupt source, including the PIO instance triggering the /// interrupt and the associated interrupt handler. //------------------------------------------------------------------------------ typedef struct { /// Pointer to the source pin instance. const Pin *pPin; /// Interrupt handler. void (*handler)(const Pin *); } InterruptSource; //------------------------------------------------------------------------------ // Local variables //------------------------------------------------------------------------------ /// List of interrupt sources. static InterruptSource pSources[MAX_INTERRUPT_SOURCES]; /// Number of currently defined interrupt sources. static unsigned int numSources; //------------------------------------------------------------------------------ // Local functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Handles all interrupts on the given PIO controller. /// \param id PIO controller ID. /// \param pPio PIO controller base address. //------------------------------------------------------------------------------ static void PioInterruptHandler(unsigned int id, AT91S_PIO *pPio) { unsigned int status; unsigned int i; // Read PIO controller status status = pPio->PIO_ISR; status &= pPio->PIO_IMR; // Check pending events if (status != 0) { TRACE_DEBUG("PIO interrupt on PIO controller #%d\n\r", id); // Find triggering source i = 0; while (status != 0) { // There cannot be an unconfigured source enabled. SANITY_CHECK(i < numSources); // Source is configured on the same controller if (pSources[i].pPin->id == id) { // Source has PIOs whose statuses have changed if ((status & pSources[i].pPin->mask) != 0) { TRACE_DEBUG("Interrupt source #%d triggered\n\r", i); pSources[i].handler(pSources[i].pPin); status &= ~(pSources[i].pPin->mask); } } i++; } } } //------------------------------------------------------------------------------ /// Generic PIO interrupt handler. Single entry point for interrupts coming /// from any PIO controller (PIO A, B, C ...). Dispatches the interrupt to /// the user-configured handlers. //------------------------------------------------------------------------------ void PIO_IT_InterruptHandler(void) { #if defined(AT91C_ID_PIOA) // Treat PIOA interrupts PioInterruptHandler(AT91C_ID_PIOA, AT91C_BASE_PIOA); #endif #if defined(AT91C_ID_PIOB) // Treat PIOB interrupts PioInterruptHandler(AT91C_ID_PIOB, AT91C_BASE_PIOB); #endif #if defined(AT91C_ID_PIOC) // Treat PIOC interrupts PioInterruptHandler(AT91C_ID_PIOC, AT91C_BASE_PIOC); #endif #if defined(AT91C_ID_PIOD) // Treat PIOD interrupts PioInterruptHandler(AT91C_ID_PIOD, AT91C_BASE_PIOD); #endif #if defined(AT91C_ID_PIOE) // Treat PIOE interrupts PioInterruptHandler(AT91C_ID_PIOE, AT91C_BASE_PIOE); #endif #if defined(AT91C_ID_PIOABCD) // Treat PIOABCD interrupts #if !defined(AT91C_ID_PIOA) PioInterruptHandler(AT91C_ID_PIOABCD, AT91C_BASE_PIOA); #endif #if !defined(AT91C_ID_PIOB) PioInterruptHandler(AT91C_ID_PIOABCD, AT91C_BASE_PIOB); #endif #if !defined(AT91C_ID_PIOC) PioInterruptHandler(AT91C_ID_PIOABCD, AT91C_BASE_PIOC); #endif #if !defined(AT91C_ID_PIOD) PioInterruptHandler(AT91C_ID_PIOABCD, AT91C_BASE_PIOD); #endif #endif #if defined(AT91C_ID_PIOABCDE) // Treat PIOABCDE interrupts #if !defined(AT91C_ID_PIOA) PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOA); #endif #if !defined(AT91C_ID_PIOB) PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOB); #endif #if !defined(AT91C_ID_PIOC) PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOC); #endif #if !defined(AT91C_ID_PIOD) PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOD); #endif #if !defined(AT91C_ID_PIOE) PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOE); #endif #endif #if defined(AT91C_ID_PIOCDE) // Treat PIOCDE interrupts #if !defined(AT91C_ID_PIOC) PioInterruptHandler(AT91C_ID_PIOCDE, AT91C_BASE_PIOC); #endif #if !defined(AT91C_ID_PIOD) PioInterruptHandler(AT91C_ID_PIOCDE, AT91C_BASE_PIOD); #endif #if !defined(AT91C_ID_PIOE) PioInterruptHandler(AT91C_ID_PIOCDE, AT91C_BASE_PIOE); #endif #endif } //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Initializes the PIO interrupt management logic. The desired priority of PIO /// interrupts must be provided. Calling this function multiple times result in /// the reset of currently configured interrupts. /// \param priority PIO controller interrupts priority. //------------------------------------------------------------------------------ void PIO_InitializeInterrupts(unsigned int priority) { TRACE_DEBUG("PIO_Initialize()\n\r"); // SANITY_CHECK((priority & ~AT91C_AIC_PRIOR) == 0); // Reset sources numSources = 0; #ifdef AT91C_ID_PIOA // Configure PIO interrupt sources TRACE_DEBUG("PIO_Initialize: Configuring PIOA\n\r"); AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA; AT91C_BASE_PIOA->PIO_ISR; AT91C_BASE_PIOA->PIO_IDR = 0xFFFFFFFF; IRQ_ConfigureIT(AT91C_ID_PIOA, priority, PIO_IT_InterruptHandler); IRQ_EnableIT(AT91C_ID_PIOA); #endif #ifdef AT91C_ID_PIOB TRACE_DEBUG("PIO_Initialize: Configuring PIOB\n\r"); AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOB; AT91C_BASE_PIOB->PIO_ISR; AT91C_BASE_PIOB->PIO_IDR = 0xFFFFFFFF; IRQ_ConfigureIT(AT91C_ID_PIOB, priority, PIO_IT_InterruptHandler); IRQ_EnableIT(AT91C_ID_PIOB); #endif #ifdef AT91C_ID_PIOC TRACE_DEBUG("PIO_Initialize: Configuring PIOC\n\r"); AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOC; AT91C_BASE_PIOC->PIO_ISR; AT91C_BASE_PIOC->PIO_IDR = 0xFFFFFFFF; IRQ_ConfigureIT(AT91C_ID_PIOC, priority, PIO_IT_InterruptHandler); IRQ_EnableIT(AT91C_ID_PIOC); #endif #ifdef AT91C_ID_PIOD TRACE_DEBUG("PIO_Initialize: Configuring PIOD\n\r"); AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOD; AT91C_BASE_PIOC->PIO_ISR; AT91C_BASE_PIOC->PIO_IDR = 0xFFFFFFFF; IRQ_ConfigureIT(AT91C_ID_PIOD, priority, PIO_IT_InterruptHandler); IRQ_EnableIT(AT91C_ID_PIOD); #endif #ifdef AT91C_ID_PIOE TRACE_DEBUG("PIO_Initialize: Configuring PIOE\n\r"); AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOE; AT91C_BASE_PIOC->PIO_ISR; AT91C_BASE_PIOC->PIO_IDR = 0xFFFFFFFF; IRQ_ConfigureIT(AT91C_ID_PIOE, priority, PIO_IT_InterruptHandler); IRQ_EnableIT(AT91C_ID_PIOE); #endif #if defined(AT91C_ID_PIOABCD) // Treat PIOABCD interrupts #if !defined(AT91C_ID_PIOA) \ && !defined(AT91C_ID_PIOB) \ && !defined(AT91C_ID_PIOC) \ && !defined(AT91C_ID_PIOD) TRACE_DEBUG("PIO_Initialize: Configuring PIOABCD\n\r"); AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD; AT91C_BASE_PIOA->PIO_ISR; AT91C_BASE_PIOA->PIO_IDR = 0xFFFFFFFF; IRQ_ConfigureIT(AT91C_ID_PIOABCD, priority, PIO_IT_InterruptHandler); IRQ_EnableIT(AT91C_ID_PIOABCD); #endif #endif #if defined(AT91C_ID_PIOABCDE) // Treat PIOABCDE interrupts #if !defined(AT91C_ID_PIOA) \ && !defined(AT91C_ID_PIOB) \ && !defined(AT91C_ID_PIOC) \ && !defined(AT91C_ID_PIOD) \ && !defined(AT91C_ID_PIOE) TRACE_DEBUG("PIO_Initialize: Configuring PIOABCDE\n\r"); AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCDE; AT91C_BASE_PIOA->PIO_ISR; AT91C_BASE_PIOA->PIO_IDR = 0xFFFFFFFF; IRQ_ConfigureIT(AT91C_ID_PIOABCDE, priority, PIO_IT_InterruptHandler); IRQ_EnableIT(AT91C_ID_PIOABCDE); #endif #endif #if defined(AT91C_ID_PIOCDE) // Treat PIOCDE interrupts #if !defined(AT91C_ID_PIOC) \ && !defined(AT91C_ID_PIOD) \ && !defined(AT91C_ID_PIOE) TRACE_DEBUG("PIO_Initialize: Configuring PIOC\n\r"); AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOCDE; AT91C_BASE_PIOC->PIO_ISR; AT91C_BASE_PIOC->PIO_IDR = 0xFFFFFFFF; IRQ_ConfigureIT(AT91C_ID_PIOCDE, priority, PIO_IT_InterruptHandler); IRQ_EnableIT(AT91C_ID_PIOCDE); #endif #endif } //------------------------------------------------------------------------------ /// Configures a PIO or a group of PIO to generate an interrupt on status /// change. The provided interrupt handler will be called with the triggering /// pin as its parameter (enabling different pin instances to share the same /// handler). /// \param pPin Pointer to a Pin instance. /// \param handler Interrupt handler function pointer. //------------------------------------------------------------------------------ void PIO_ConfigureIt(const Pin *pPin, void (*handler)(const Pin *)) { InterruptSource *pSource; TRACE_DEBUG("PIO_ConfigureIt()\n\r"); SANITY_CHECK(pPin); ASSERT(numSources < MAX_INTERRUPT_SOURCES, "-F- PIO_ConfigureIt: Increase MAX_INTERRUPT_SOURCES\n\r"); // Define new source TRACE_DEBUG("PIO_ConfigureIt: Defining new source #%d.\n\r", numSources); pSource = &(pSources[numSources]); pSource->pPin = pPin; pSource->handler = handler; numSources++; } //------------------------------------------------------------------------------ /// Enables the given interrupt source if it has been configured. The status /// register of the corresponding PIO controller is cleared prior to enabling /// the interrupt. /// \param pPin Interrupt source to enable. //------------------------------------------------------------------------------ void PIO_EnableIt(const Pin *pPin) { TRACE_DEBUG("PIO_EnableIt()\n\r"); SANITY_CHECK(pPin); #ifndef NOASSERT { unsigned int i = 0; unsigned char found = 0; while ((i < numSources) && !found) { if (pSources[i].pPin == pPin) { found = 1; } i++; } ASSERT(found, "-F- PIO_EnableIt: Interrupt source has not been configured\n\r"); } #endif pPin->pio->PIO_ISR; pPin->pio->PIO_IER = pPin->mask; #if defined(AT91C_PIOA_AIMMR) //PIO3 with additional interrupt support //configure additional interrupt mode registers if(pPin->mask&pPin->itMode.itMask) { //enable additional interrupt mode pPin->pio->PIO_AIMER = pPin->itMode.itMask; if(pPin->mask&pPin->itMode.edgeLvlSel) //if bit field of selected pin is 1, set as Level detection source pPin->pio->PIO_LSR = pPin->itMode.edgeLvlSel; else //if bit field of selected pin is 0, set as Edge detection source pPin->pio->PIO_ESR = ~(pPin->itMode.edgeLvlSel); if(pPin->mask&pPin->itMode.lowFallOrRiseHighSel) //if bit field of selected pin is 1, set as Rising Edge/High level detection event pPin->pio->PIO_REHLSR = pPin->itMode.lowFallOrRiseHighSel; else //if bit field of selected pin is 0, set as Falling Edge/Low level detection event pPin->pio->PIO_FELLSR = ~(pPin->itMode.lowFallOrRiseHighSel); } #endif } //------------------------------------------------------------------------------ /// Disables a given interrupt source, with no added side effects. /// \param pPin Interrupt source to disable. //------------------------------------------------------------------------------ void PIO_DisableIt(const Pin *pPin) { SANITY_CHECK(pPin); TRACE_DEBUG("PIO_DisableIt()\n\r"); pPin->pio->PIO_IDR = pPin->mask; #if defined(AT91C_PIOA_AIMMR) if(pPin->mask & pPin->itMode.itMask) //disable additional interrupt mode pPin->pio->PIO_AIMDR = pPin->mask & pPin->itMode.itMask; #endif } #if defined(cortexm3) ////------------------------------------------------------------------------------ ///// Override cortex-m3's default PIOA irq handler ////------------------------------------------------------------------------------ //void PioAIrqHandler(void) @C() @spontaneous() //{ // #if defined(AT91C_ID_PIOA) // // Treat PIOA interrupts // PioInterruptHandler(AT91C_ID_PIOA, AT91C_BASE_PIOA); // #endif //} // ////------------------------------------------------------------------------------ ///// Override cortex-m3's default PIOB irq handler ////------------------------------------------------------------------------------ //void PioBIrqHandler(void) @C() @spontaneous() //{ // #if defined(AT91C_ID_PIOB) // // Treat PIOA interrupts // PioInterruptHandler(AT91C_ID_PIOB, AT91C_BASE_PIOB); // #endif //} // ////------------------------------------------------------------------------------ ///// Override cortex-m3's default PIOC irq handler ////------------------------------------------------------------------------------ //void PioCIrqHandler(void) @C() @spontaneous() //{ // #if defined(AT91C_ID_PIOC) // // Treat PIOA interrupts // PioInterruptHandler(AT91C_ID_PIOC, AT91C_BASE_PIOC); // #endif //} #endif tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio_it.h000066400000000000000000000102071207233610700261600ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !!!Purpose /// /// Configuration and handling of interrupts on PIO status changes. The API /// provided here have several advantages over the traditional PIO interrupt /// configuration approach: /// - It is highly portable /// - It automatically demultiplexes interrupts when multiples pins have been /// configured on a single PIO controller /// - It allows a group of pins to share the same interrupt /// /// However, it also has several minor drawbacks that may prevent from using it /// in particular applications: /// - It enables the clocks of all PIO controllers /// - PIO controllers all share the same interrupt handler, which does the /// demultiplexing and can be slower than direct configuration /// - It reserves space for a fixed number of interrupts, which can be /// increased by modifying the appropriate constant in pio_it.c. /// /// !!!Usage /// /// -# Initialize the PIO interrupt mechanism using PIO_InitializeInterrupts() /// with the desired priority (0 ... 7). /// -# Configure a status change interrupt on one or more pin(s) with /// PIO_ConfigureIt(). /// -# Enable & disable interrupts on pins using PIO_EnableIt() and /// PIO_DisableIt(). //------------------------------------------------------------------------------ #ifndef PIO_IT_H #define PIO_IT_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "pio.h" //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ extern void PIO_InitializeInterrupts(unsigned int priority); extern void PIO_ConfigureIt(const Pin *pPin, void (*handler)(const Pin *)); extern void PIO_EnableIt(const Pin *pPin); extern void PIO_DisableIt(const Pin *pPin); extern void PIO_IT_InterruptHandler(void); #endif //#ifndef PIO_IT_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/000077500000000000000000000000001207233610700245145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/pmc.c000066400000000000000000000173071207233610700254470ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "pmc.h" #include #include #include #ifdef CP15_PRESENT #include #endif #define MASK_STATUS 0x3FFFFFFC //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ #if defined(at91sam7l64) || defined(at91sam7l128) //------------------------------------------------------------------------------ /// Sets the fast wake-up inputs that can get the device out of Wait mode. /// \param inputs Fast wake-up inputs to enable. //------------------------------------------------------------------------------ void PMC_SetFastWakeUpInputs(unsigned int inputs) { SANITY_CHECK((inputs & ~0xFF) == 0); AT91C_BASE_PMC->PMC_FSMR = inputs; } #if !defined(__ICCARM__) __attribute__ ((section (".ramfunc"))) // GCC #endif //------------------------------------------------------------------------------ /// Disables the main oscillator, making the device enter Wait mode. //------------------------------------------------------------------------------ void PMC_DisableMainOscillatorForWaitMode(void) { AT91C_BASE_PMC->PMC_MOR = 0x37 << 16; while ((AT91C_BASE_PMC->PMC_MOR & AT91C_PMC_MAINSELS) != AT91C_PMC_MAINSELS); } #endif #if defined(at91sam7l) //------------------------------------------------------------------------------ /// Disables the main oscillator when NOT running on it. //------------------------------------------------------------------------------ void PMC_DisableMainOscillator(void) { AT91C_BASE_PMC->PMC_MOR = 0x37 << 16; while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MAINSELS) == AT91C_PMC_MAINSELS); } #endif //------------------------------------------------------------------------------ /// Disables the processor clock //------------------------------------------------------------------------------ void PMC_DisableProcessorClock(void) { AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_PCK; while ((AT91C_BASE_PMC->PMC_SCSR & AT91C_PMC_PCK) != AT91C_PMC_PCK); } //------------------------------------------------------------------------------ /// Enables the clock of a peripheral. The peripheral ID (AT91C_ID_xxx) is used /// to identify which peripheral is targetted. /// Note that the ID must NOT be shifted (i.e. 1 << AT91C_ID_xxx). /// \param id Peripheral ID (AT91C_ID_xxx). //------------------------------------------------------------------------------ void PMC_EnablePeripheral(unsigned int id) { SANITY_CHECK(id < 32); if ((AT91C_BASE_PMC->PMC_PCSR & (1 << id)) == (1 << id)) { TRACE_INFO("PMC_EnablePeripheral: clock of peripheral" " %u is already enabled\n\r", id); } else { AT91C_BASE_PMC->PMC_PCER = 1 << id; } } //------------------------------------------------------------------------------ /// Disables the clock of a peripheral. The peripheral ID (AT91C_ID_xxx) is used /// to identify which peripheral is targetted. /// Note that the ID must NOT be shifted (i.e. 1 << AT91C_ID_xxx). /// \param id Peripheral ID (AT91C_ID_xxx). //------------------------------------------------------------------------------ void PMC_DisablePeripheral(unsigned int id) { SANITY_CHECK(id < 32); if ((AT91C_BASE_PMC->PMC_PCSR & (1 << id)) != (1 << id)) { TRACE_INFO("PMC_DisablePeripheral: clock of peripheral" " %u is not enabled\n\r", id); } else { AT91C_BASE_PMC->PMC_PCDR = 1 << id; } } //------------------------------------------------------------------------------ /// Enable all the periph clock via PMC /// (Becareful of the last 2 bits, it is not periph clock) //------------------------------------------------------------------------------ void PMC_EnableAllPeripherals(void) { AT91C_BASE_PMC->PMC_PCER = MASK_STATUS; while( (AT91C_BASE_PMC->PMC_PCSR & MASK_STATUS) != MASK_STATUS); TRACE_INFO("Enable all periph clocks\n\r"); } //------------------------------------------------------------------------------ /// Disable all the periph clock via PMC /// (Becareful of the last 2 bits, it is not periph clock) //------------------------------------------------------------------------------ void PMC_DisableAllPeripherals(void) { AT91C_BASE_PMC->PMC_PCDR = MASK_STATUS; while((AT91C_BASE_PMC->PMC_PCSR & MASK_STATUS) != 0); TRACE_INFO("Disable all periph clocks\n\r"); } //----------------------------------------------------------------------------- /// Get Periph Status //----------------------------------------------------------------------------- unsigned int PMC_IsAllPeriphEnabled(void) { return (AT91C_BASE_PMC->PMC_PCSR == MASK_STATUS); } //----------------------------------------------------------------------------- /// Get Periph Status //----------------------------------------------------------------------------- unsigned int PMC_IsPeriphEnabled(unsigned int id) { return (AT91C_BASE_PMC->PMC_PCSR & (1 << id)); } //------------------------------------------------------------------------------ /// Put the CPU in Idle Mode for lower consumption //------------------------------------------------------------------------------ void PMC_CPUInIdleMode(void) { #ifndef CP15_PRESENT PMC_DisableProcessorClock(); #else AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_PCK; CP15_WaitForInterrupt(); #endif } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/pmc.h000066400000000000000000000057061207233610700254540ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ #ifndef PMC_H #define PMC_H //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ #if defined(at91sam7l64) || defined(at91sam7l128) extern void PMC_SetFastWakeUpInputs(unsigned int inputs); extern void PMC_DisableMainOscillator(void); extern #ifdef __ICCARM__ __ramfunc #endif //__ICCARM__ void PMC_DisableMainOscillatorForWaitMode(void); #endif // at91sam7l64 at91sam7l128 extern void PMC_DisableProcessorClock(void); extern void PMC_EnablePeripheral(unsigned int id); extern void PMC_DisablePeripheral(unsigned int id); extern void PMC_CPUInIdleMode(void); extern void PMC_EnableAllPeripherals(void); extern void PMC_DisableAllPeripherals(void); extern unsigned int PMC_IsAllPeriphEnabled(void); extern unsigned int PMC_IsPeriphEnabled(unsigned int id); #endif //#ifndef PMC_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/tc/000077500000000000000000000000001207233610700243435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/tc/tc.h000066400000000000000000000067741207233610700251400ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// API for configuring and using Timer Counter (TC) peripherals. /// /// !Usage /// -# Optionally, use TC_FindMckDivisor() to let the program find the best /// TCCLKS field value automatically. /// -# Configure a Timer Counter in the desired mode using TC_Configure(). /// -# Start or stop the timer clock using TC_Start() and TC_Stop(). //------------------------------------------------------------------------------ #ifndef TC_H #define TC_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include #if defined(AT91C_ID_TC0) // nothing to do #elif defined(AT91C_ID_TC012) #define AT91C_ID_TC0 AT91C_ID_TC012 #elif defined(AT91C_ID_TC) #define AT91C_ID_TC0 AT91C_ID_TC #else #error Pb define ID_TC #endif //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ extern void TC_Configure(AT91S_TC *pTc, unsigned int mode); extern void TC_Start(AT91S_TC *pTc); extern void TC_Stop(AT91S_TC *pTc); extern unsigned char TC_FindMckDivisor( unsigned int freq, unsigned int mck, unsigned int *div, unsigned int *tcclks); #endif //#ifndef TC_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/000077500000000000000000000000001207233610700250735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/usart.c000066400000000000000000000273401207233610700264030ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "usart.h" #include #include //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Configures an USART peripheral with the specified parameters. /// \param usart Pointer to the USART peripheral to configure. /// \param mode Desired value for the USART mode register (see the datasheet). /// \param baudrate Baudrate at which the USART should operate (in Hz). /// \param masterClock Frequency of the system master clock (in Hz). //------------------------------------------------------------------------------ void USART_Configure(AT91S_USART *usart, unsigned int mode, unsigned int baudrate, unsigned int masterClock) { // Reset and disable receiver & transmitter usart->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; // Configure mode usart->US_MR = mode; // Configure baudrate // Asynchronous, no oversampling if (((mode & AT91C_US_SYNC) == 0) && ((mode & AT91C_US_OVER) == 0)) { usart->US_BRGR = (masterClock / baudrate) / 16; } // TODO other modes } //------------------------------------------------------------------------------ /// Enables or disables the transmitter of an USART peripheral. /// \param usart Pointer to an USART peripheral /// \param enabled If true, the transmitter is enabled; otherwise it is /// disabled. //------------------------------------------------------------------------------ void USART_SetTransmitterEnabled(AT91S_USART *usart, unsigned char enabled) { if (enabled) { usart->US_CR = AT91C_US_TXEN; } else { usart->US_CR = AT91C_US_TXDIS; } } //------------------------------------------------------------------------------ /// Enables or disables the receiver of an USART peripheral /// \param usart Pointer to an USART peripheral /// \param enabled If true, the receiver is enabled; otherwise it is disabled. //------------------------------------------------------------------------------ void USART_SetReceiverEnabled(AT91S_USART *usart, unsigned char enabled) { if (enabled) { usart->US_CR = AT91C_US_RXEN; } else { usart->US_CR = AT91C_US_RXDIS; } } //------------------------------------------------------------------------------ /// Sends one packet of data through the specified USART peripheral. This /// function operates synchronously, so it only returns when the data has been /// actually sent. /// \param usart Pointer to an USART peripheral. /// \param data Data to send including 9nth bit and sync field if necessary (in /// the same format as the US_THR register in the datasheet). /// \param timeOut Time out value (0 = no timeout). //------------------------------------------------------------------------------ void USART_Write( AT91S_USART *usart, unsigned short data, volatile unsigned int timeOut) { if (timeOut == 0) { while ((usart->US_CSR & AT91C_US_TXEMPTY) == 0); } else { while ((usart->US_CSR & AT91C_US_TXEMPTY) == 0) { if (timeOut == 0) { TRACE_ERROR("USART_Write: Timed out.\n\r"); return; } timeOut--; } } usart->US_THR = data; } //------------------------------------------------------------------------------ /// Sends the contents of a data buffer through the specified USART peripheral. /// This function returns immediately (1 if the buffer has been queued, 0 /// otherwise); poll the ENDTX and TXBUFE bits of the USART status register /// to check for the transfer completion. /// \param usart Pointer to an USART peripheral. /// \param buffer Pointer to the data buffer to send. /// \param size Size of the data buffer (in bytes). //------------------------------------------------------------------------------ unsigned char USART_WriteBuffer( AT91S_USART *usart, void *buffer, unsigned int size) { // Check if the first PDC bank is free if ((usart->US_TCR == 0) && (usart->US_TNCR == 0)) { usart->US_TPR = (unsigned int) buffer; usart->US_TCR = size; usart->US_PTCR = AT91C_PDC_TXTEN; return 1; } // Check if the second PDC bank is free else if (usart->US_TNCR == 0) { usart->US_TNPR = (unsigned int) buffer; usart->US_TNCR = size; return 1; } else { return 0; } } //------------------------------------------------------------------------------ /// Reads and return a packet of data on the specified USART peripheral. This /// function operates asynchronously, so it waits until some data has been /// received. /// \param usart Pointer to an USART peripheral. /// \param timeOut Time out value (0 -> no timeout). //------------------------------------------------------------------------------ unsigned short USART_Read( AT91S_USART *usart, volatile unsigned int timeOut) { if (timeOut == 0) { while ((usart->US_CSR & AT91C_US_RXRDY) == 0); } else { while ((usart->US_CSR & AT91C_US_RXRDY) == 0) { if (timeOut == 0) { TRACE_ERROR("USART_Read: Timed out.\n\r"); return 0; } timeOut--; } } return usart->US_RHR; } //------------------------------------------------------------------------------ /// Reads data from an USART peripheral, filling the provided buffer until it /// becomes full. This function returns immediately with 1 if the buffer has /// been queued for transmission; otherwise 0. /// \param usart Pointer to an USART peripheral. /// \param buffer Pointer to the buffer where the received data will be stored. /// \param size Size of the data buffer (in bytes). //------------------------------------------------------------------------------ unsigned char USART_ReadBuffer(AT91S_USART *usart, void *buffer, unsigned int size) { // Check if the first PDC bank is free if ((usart->US_RCR == 0) && (usart->US_RNCR == 0)) { usart->US_RPR = (unsigned int) buffer; usart->US_RCR = size; usart->US_PTCR = AT91C_PDC_RXTEN; return 1; } // Check if the second PDC bank is free else if (usart->US_RNCR == 0) { usart->US_RNPR = (unsigned int) buffer; usart->US_RNCR = size; return 1; } else { return 0; } } //------------------------------------------------------------------------------ /// Returns 1 if some data has been received and can be read from an USART; /// otherwise returns 0. /// \param usart Pointer to an AT91S_USART instance. //------------------------------------------------------------------------------ unsigned char USART_IsDataAvailable(AT91S_USART *usart) { if ((usart->US_CSR & AT91C_US_RXRDY) != 0) { return 1; } else { return 0; } } //------------------------------------------------------------------------------ /// Sets the filter value for the IRDA demodulator. /// \param pUsart Pointer to an AT91S_USART instance. /// \param filter Filter value. //------------------------------------------------------------------------------ void USART_SetIrdaFilter(AT91S_USART *pUsart, unsigned char filter) { SANITY_CHECK(pUsart); pUsart->US_IF = filter; } //------------------------------------------------------------------------------ /// Sends one packet of data through the specified USART peripheral. This /// function operates synchronously, so it only returns when the data has been /// actually sent. /// \param usart Pointer to an USART peripheral. /// \param data Data to send including 9nth bit and sync field if necessary (in /// the same format as the US_THR register in the datasheet). /// \param timeOut Time out value (0 = no timeout). //------------------------------------------------------------------------------ void USART_PutChar( AT91S_USART *usart, unsigned char c) { // Wait for the transmitter to be ready while ((usart->US_CSR & AT91C_US_TXEMPTY) == 0); // Send character usart->US_THR = c; // Wait for the transfer to complete while ((usart->US_CSR & AT91C_US_TXEMPTY) == 0); } //------------------------------------------------------------------------------ /// Return 1 if a character can be read in USART //------------------------------------------------------------------------------ unsigned int USART_IsRxReady(AT91S_USART *usart) { return (usart->US_CSR & AT91C_US_RXRDY); } //------------------------------------------------------------------------------ /// Reads and returns a character from the USART. /// \note This function is synchronous (i.e. uses polling). /// \return Character received. //------------------------------------------------------------------------------ unsigned char USART_GetChar(AT91S_USART *usart) { while ((usart->US_CSR & AT91C_US_RXRDY) == 0); return usart->US_RHR; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/usart.h000066400000000000000000000124501207233610700264040ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \dir /// !Purpose /// /// This module provides several definitions and methods for using an USART /// peripheral. /// /// !Usage /// -# Enable the USART peripheral clock in the PMC. /// -# Enable the required USART PIOs (see pio.h). /// -# Configure the UART by calling USART_Configure. /// -# Enable the transmitter and/or the receiver of the USART using /// USART_SetTransmitterEnabled and USART_SetReceiverEnabled. /// -# Send data through the USART using the USART_Write and /// USART_WriteBuffer methods. /// -# Receive data from the USART using the USART_Read and /// USART_ReadBuffer functions; the availability of data can be polled /// with USART_IsDataAvailable. /// -# Disable the transmitter and/or the receiver of the USART with /// USART_SetTransmitterEnabled and USART_SetReceiverEnabled. //------------------------------------------------------------------------------ #ifndef USART_H #define USART_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USART modes" /// This page lists several common operating modes for an USART peripheral. /// /// !Modes /// - USART_MODE_ASYNCHRONOUS /// - USART_MODE_IRDA /// Basic asynchronous mode, i.e. 8 bits no parity. #define USART_MODE_ASYNCHRONOUS (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE) /// IRDA mode #define USART_MODE_IRDA (AT91C_US_USMODE_IRDA | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_FILTER) //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern void USART_Configure( AT91S_USART *usart, unsigned int mode, unsigned int baudrate, unsigned int masterClock); extern void USART_SetTransmitterEnabled(AT91S_USART *usart, unsigned char enabled); extern void USART_SetReceiverEnabled(AT91S_USART *usart, unsigned char enabled); extern void USART_Write( AT91S_USART *usart, unsigned short data, volatile unsigned int timeOut); extern unsigned char USART_WriteBuffer( AT91S_USART *usart, void *buffer, unsigned int size); extern unsigned short USART_Read( AT91S_USART *usart, volatile unsigned int timeOut); extern unsigned char USART_ReadBuffer( AT91S_USART *usart, void *buffer, unsigned int size); extern unsigned char USART_IsDataAvailable(AT91S_USART *usart); extern void USART_SetIrdaFilter(AT91S_USART *pUsart, unsigned char filter); extern void USART_PutChar(AT91S_USART *usart, unsigned char c); extern unsigned int USART_IsRxReady(AT91S_USART *usart); extern unsigned char USART_GetChar(AT91S_USART *usart); #endif //#ifndef USART_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/sam3uudphshardware.h000066400000000000000000000444111207233610700254060ustar00rootroot00000000000000/* * Copyright (c) 2010 CSIRO Australia * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * High Speed USB Device Port register definitions. * * @author Kevin Klues */ #ifndef _SAM3UUDPHSHARDWARE_H #define _SAM3UUDPHSHARDWARE_H #include // Resource definition #define SAM3U_UDPHS_RESOURCE "Sam3uUdphs.Resource" //Defines needed by Atmel USB framework typedef irqn_t IRQn_Type; /** * UDPHS Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 973 */ typedef union { uint32_t flat; struct { uint32_t dev_addr : 7; uint32_t faddr_en : 1; uint32_t en_udphs : 1; uint32_t detach : 1; uint32_t rewakeup : 1; uint32_t pulld_dis : 1; uint32_t reserved : 20; } __attribute__((__packed__)) bits; } udphs_ctrl_t; /** * UDPHS Frame Number Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 975 */ typedef union { uint32_t flat; struct { uint32_t micro_frame_num : 3; uint32_t frame_number : 11; uint32_t reserved : 17; uint32_t fnum_err : 1; } __attribute__((__packed__)) bits; } udphs_fnum_t; /** * UDPHS Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 976 */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 1; uint32_t det_suspd : 1; uint32_t micro_sof : 1; uint32_t int_sof : 1; uint32_t endreset : 1; uint32_t wake_up : 1; uint32_t endofrsm : 1; uint32_t upstr_res : 1; uint32_t ept_0 : 1; uint32_t ept_1 : 1; uint32_t ept_2 : 1; uint32_t ept_3 : 1; uint32_t ept_4 : 1; uint32_t ept_5 : 1; uint32_t ept_6 : 1; uint32_t reserved1 : 10; uint32_t dma_1 : 1; uint32_t dma_2 : 1; uint32_t dma_3 : 1; uint32_t dma_4 : 1; uint32_t dma_r : 1; uint32_t dma_6 : 1; uint32_t reserved2 : 1; } __attribute__((__packed__)) bits; } udphs_ien_t; /** * UDPHS Interrupt Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 979 */ typedef union { uint32_t flat; struct { uint32_t speed : 1; uint32_t det_suspd : 1; uint32_t micro_sof : 1; uint32_t int_sof : 1; uint32_t endreset : 1; uint32_t wake_up : 1; uint32_t endofrsm : 1; uint32_t upstr_res : 1; uint32_t ept_0 : 1; uint32_t ept_1 : 1; uint32_t ept_2 : 1; uint32_t ept_3 : 1; uint32_t ept_4 : 1; uint32_t ept_5 : 1; uint32_t ept_6 : 1; uint32_t reserved0 : 10; uint32_t dma_1 : 1; uint32_t dma_2 : 1; uint32_t dma_3 : 1; uint32_t dma_4 : 1; uint32_t dma_5 : 1; uint32_t dma_6 : 1; uint32_t reserved1 : 1; } __attribute__((__packed__)) bits; } udphs_intsta_t; /** * UDPHS Clear Interrupt Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 981 */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 1; uint32_t det_suspd : 1; uint32_t micro_sof : 1; uint32_t int_sof : 1; uint32_t endreset : 1; uint32_t wake_up : 1; uint32_t endofrsm : 1; uint32_t upstr_res : 1; uint32_t reserved1 : 24; } __attribute__((__packed__)) bits; } udphs_clrint_t; /** * UDPHS Endpoints Reset Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 982 */ typedef union { uint32_t flat; struct { uint32_t ept_0 : 1; uint32_t ept_1 : 1; uint32_t ept_2 : 1; uint32_t ept_3 : 1; uint32_t ept_4 : 1; uint32_t ept_5 : 1; uint32_t ept_6 : 1; uint32_t reserved : 25; } __attribute__((__packed__)) bits; } udphs_eptrst_t; /** * UDPHS Test Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 983 */ typedef union { uint32_t flat; struct { uint32_t speed_cfg : 2; uint32_t tst_j : 1; uint32_t tst_k : 1; uint32_t tst_pkt : 1; uint32_t opmode2 : 1; uint32_t reserved : 26; } __attribute__((__packed__)) bits; } udphs_tst_t; /** * UDPHS Name1 Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 985 */ typedef union { uint32_t flat; struct { uint32_t ip_name1 : 32; } __attribute__((__packed__)) bits; } udphs_ipname1_t; /** * UDPHS Name2 Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 986 */ typedef union { uint32_t flat; struct { uint32_t ip_name2 : 32; } __attribute__((__packed__)) bits; } udphs_ipname2_t; /** * UDPHS Features Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 987 */ typedef union { uint32_t flat; struct { uint32_t ept_nbr_max : 4; uint32_t dma_channel_nbr : 3; uint32_t dma_b_siz : 1; uint32_t dma_fifo_word_depth : 4; uint32_t fifo_max_size : 3; uint32_t bw_dpram : 1; uint32_t datab16_8 : 1; uint32_t iso_ept_1 : 1; uint32_t iso_ept_2 : 1; uint32_t iso_ept_3 : 1; uint32_t iso_ept_4 : 1; uint32_t iso_ept_5 : 1; uint32_t iso_ept_6 : 1; uint32_t iso_ept_7 : 1; uint32_t iso_ept_8 : 1; uint32_t iso_ept_9 : 1; uint32_t iso_ept_10 : 1; uint32_t iso_ept_11 : 1; uint32_t iso_ept_12 : 1; uint32_t iso_ept_13 : 1; uint32_t iso_ept_14 : 1; uint32_t iso_ept_15 : 1; } __attribute__((__packed__)) bits; } udphs_ipfeatures_t; /** * UDPHS Endpoint Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 989 */ typedef union { uint32_t flat; struct { uint32_t ept_size : 3; uint32_t ept_dir : 1; uint32_t ept_type : 2; uint32_t bk_number : 2; uint32_t nb_trans : 2; uint32_t reserved : 21; uint32_t ept_mapd : 1; } __attribute__((__packed__)) bits; } udphs_eptcfg_t; /** * UDPHS Endpoint Control Enable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 991 */ typedef union { uint32_t flat; struct { uint32_t ept_enabl : 1; uint32_t auto_valid : 1; uint32_t reserved0 : 1; uint32_t intdis_dma : 1; uint32_t nyet_dis : 1; uint32_t reserved1 : 1; uint32_t datax_rx : 1; uint32_t mdata_rx : 1; uint32_t err_ovflw : 1; uint32_t rx_bk_rdy : 1; uint32_t tx_complt : 1; // union { uint32_t tx_pk_rdy : 1; // uint32_t err_trans : 1; // }; // union { uint32_t rx_setup : 1; // uint32_t err_fl_iso : 1; // }; // union { uint32_t stall_snt : 1; // uint32_t err_criso : 1; // uint32_t err_nbtra : 1; // }; // union { uint32_t nak_in : 1; // uint32_t err_flush : 1; // }; uint32_t nak_out : 1; uint32_t reserved2 : 2; uint32_t busy_bank : 1; uint32_t reserved3 : 12; uint32_t shrt_pckt : 1; } __attribute__((__packed__)) bits; } udphs_eptctlenb_t; /** * UDPHS Endpoint Control Disable Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 993 */ typedef union { uint32_t flat; struct { uint32_t ept_disabl : 1; uint32_t auto_valid : 1; uint32_t reserved0 : 1; uint32_t intdis_dma : 1; uint32_t nyet_dis : 1; uint32_t reserved1 : 1; uint32_t datax_rx : 1; uint32_t mdata_rx : 1; uint32_t err_ovflw : 1; uint32_t rx_bk_rdy : 1; uint32_t tx_complt : 1; // union { uint32_t tx_pk_rdy : 1; // uint32_t err_trans : 1; // }; // union { uint32_t rx_setup : 1; // uint32_t err_fl_iso : 1; // }; // union { uint32_t stall_snt : 1; // uint32_t err_criso : 1; // uint32_t err_nbtra : 1; // }; // union { uint32_t nak_in : 1; // uint32_t err_flush : 1; // }; uint32_t nak_out : 1; uint32_t reserved2 : 2; uint32_t busy_bank : 1; uint32_t reserved3 : 12; uint32_t shrt_pckt : 1; } __attribute__((__packed__)) bits; } udphs_eptctldis_t; /** * UDPHS Endpoint Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 995 */ typedef union { uint32_t flat; struct { uint32_t ept_enabl : 1; uint32_t auto_valid : 1; uint32_t reserved0 : 1; uint32_t intdis_dma : 1; uint32_t nyet_dis : 1; uint32_t reserved1 : 1; uint32_t datax_rx : 1; uint32_t mdata_rx : 1; uint32_t err_ovflw : 1; uint32_t rx_bk_rdy : 1; uint32_t tx_complt : 1; // union { uint32_t tx_pk_rdy : 1; // uint32_t err_trans : 1; // }; // union { uint32_t rx_setup : 1; // uint32_t err_fl_iso : 1; // }; // union { uint32_t stall_snt : 1; // uint32_t err_criso : 1; // uint32_t err_nbtra : 1; // }; // union { uint32_t nak_in : 1; // uint32_t err_flush : 1; // }; uint32_t nak_out : 1; uint32_t reserved2 : 2; uint32_t busy_bank : 1; uint32_t reserved3 : 12; uint32_t shrt_pckt : 1; } __attribute__((__packed__)) bits; } udphs_eptctl_t; /** * UDPHS Endpoint Set Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 998 */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 5; uint32_t frcestall : 1; uint32_t reserved1 : 3; uint32_t kill_bank : 1; uint32_t reserved2 : 1; uint32_t tx_pk_rdy : 1; uint32_t reserved3 : 20; } __attribute__((__packed__)) bits; } udphs_eptsetsta_t; /** * UDPHS Endpoint Clear Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 999 */ typedef union { uint32_t flat; struct { uint32_t reserved0 : 5; uint32_t frcestall : 1; uint32_t togglesq : 1; uint32_t reserved1 : 2; uint32_t rx_bk_rdy : 1; uint32_t tx_complt : 1; uint32_t reserved3 : 1; // union { uint32_t rx_setup : 1; // uint32_t err_fl_iso : 1; // }; // union { uint32_t stall_snt : 1; // uint32_t err_nbtra : 1; // }; // union { uint32_t nak_in : 1; // uint32_t err_flush : 1; // }; uint32_t nak_out : 1; uint32_t reserved4 : 16; } __attribute__((__packed__)) bits; } udphs_eptclrsta_t; /** * UDPHS Endpoint Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 999 */ typedef union { uint32_t flat; struct { uint32_t reserved : 5; uint32_t frcestall : 1; uint32_t togglesq_sta : 2; uint32_t err_ovflw : 1; // union { uint32_t rx_bk_rdy : 1; // uint32_t kill_bank : 1; // }; uint32_t tx_complt : 1; // union { uint32_t tx_pk_rdy : 1; // uint32_t err_trans : 1; // }; // union { uint32_t rx_setup : 1; // uint32_t err_fl_iso : 1; // }; // union { uint32_t stall_snt : 1; // uint32_t err_criso : 1; // uint32_t err_nbtra : 1; // }; // union { uint32_t nak_in : 1; // uint32_t err_flush : 1; // }; uint32_t nak_out : 1; // union { uint32_t current_bank : 2; // uint32_t control_dir : 2; // }; uint32_t busy_bank_sta : 2; uint32_t byte_count : 11; uint32_t shrt_pckt : 1; } __attribute__((__packed__)) bits; } udphs_eptsta_t; /** * UDPHS DMA Next Descriptor Address Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1007 */ typedef union { uint32_t flat; struct { uint32_t nxt_dsc_add : 32; } __attribute__((__packed__)) bits; } udphs_dmanxtdsc_t; /** * UDPHS DMA Channel Address Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1008 */ typedef union { uint32_t flat; struct { uint32_t buff_add : 32; } __attribute__((__packed__)) bits; } udphs_dmaaddress_t; /** * UDPHS DMA Channel Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1009 */ typedef union { uint32_t flat; struct { uint32_t chann_enb : 1; uint32_t ldnxt_dsc : 1; uint32_t end_tr_en : 1; uint32_t end_b_en : 1; uint32_t end_tr_it : 1; uint32_t end_buffit : 1; uint32_t desc_ld_it : 1; uint32_t burst_lck : 1; uint32_t reserved : 8; uint32_t buff_length : 16; } __attribute__((__packed__)) bits; } udphs_dmacontrol_t; /** * UDPHS DMA Channel Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 1011 */ typedef union { uint32_t flat; struct { uint32_t chann_enb : 1; uint32_t chann_act : 1; uint32_t reserved0 : 2; uint32_t end_tr_st : 1; uint32_t end_bf_st : 1; uint32_t desc_ldst : 1; uint32_t reserved1 : 9; uint32_t buff_count : 16; } __attribute__((__packed__)) bits; } udphs_dmastatus_t; /** * UDPHS Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 972 */ typedef struct { udphs_eptcfg_t cfg; udphs_eptctlenb_t ctlenb; udphs_eptctldis_t ctldis; udphs_eptctl_t ctl; uint32_t endpoint; udphs_eptsetsta_t setsta; udphs_eptclrsta_t crlsta; udphs_eptsta_t sta; } udphs_ept_t; typedef struct { udphs_dmanxtdsc_t nxtdsc; udphs_dmaaddress_t address; udphs_dmacontrol_t control; udphs_dmastatus_t status; } udphs_dma_t; typedef struct udphs { volatile udphs_ctrl_t ctrl; volatile udphs_fnum_t fnum; uint32_t reserved0[2]; volatile udphs_ien_t ien; volatile udphs_intsta_t intsta; volatile udphs_clrint_t clrint; volatile udphs_eptrst_t eptrst; uint32_t reserved1[48]; //Data sheet range is wrong.... volatile udphs_tst_t tst; uint32_t reserved2[3]; // Data sheet range wrong here too.... volatile udphs_ipname1_t ipname1; volatile udphs_ipname2_t ipname2; volatile udphs_ipfeatures_t ipfeatures; uint32_t reserved3[1]; // Not even listed on data sheet... volatile udphs_ept_t ept[7]; uint32_t reserved4[72]; udphs_dma_t reserved_dma0; volatile udphs_dma_t dma[5]; } udphs_t; /** * Memory mapping for the UDPHS controller */ volatile udphs_t* UDPHS = (volatile udphs_t *) 0x400A4000; // Valid endpoint sizes enum { EPT_SIZE_8, EPT_SIZE_16, EPT_SIZE_32, EPT_SIZE_64, EPT_SIZE_128, EPT_SIZE_256, EPT_SIZE_512, EPT_SIZE_1024, }; // Valid endpoint directions enum { EPT_DIR_OUT, EPT_DIR_IN, #define EPT_DIR_DONTCARE EPT_DIR_OUT }; // Valid endpoint transfer types enum { EPT_CTRL, EPT_ISO, EPT_BULK, EPT_INT, }; #endif tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/000077500000000000000000000000001207233610700222105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/000077500000000000000000000000001207233610700235005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/000077500000000000000000000000001207233610700242315ustar00rootroot00000000000000CDCAbstractControlManagementDescriptor.h000066400000000000000000000113201207233610700337720ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for manipulating CDC abstract control management descriptors. !!!Usage Should be included in a list of USB configuration descriptors. */ #ifndef CDCABSTRACTCONTROLMANAGEMENTDESCRIPTOR_H #define CDCABSTRACTCONTROLMANAGEMENTDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC ACM Capabilities" /// This page lists the capabilities of the CDC ACM. /// /// !Capabilities /// - CDCAbstractControlManagementDescriptor_COMMFEATURE /// - CDCAbstractControlManagementDescriptor_LINE /// - CDCAbstractControlManagementDescriptor_SENDBREAK /// - CDCAbstractControlManagementDescriptor_NETWORKCONNECTION /// Device supports the request combination of SetCommFeature, ClearCommFeature /// and GetCommFeature. #define CDCAbstractControlManagementDescriptor_COMMFEATURE (1 << 0) /// Device supports the request combination of SetLineCoding, GetLineCoding and /// SetControlLineState. #define CDCAbstractControlManagementDescriptor_LINE (1 << 1) /// Device supports the SendBreak request. #define CDCAbstractControlManagementDescriptor_SENDBREAK (1 << 2) /// Device supports the NetworkConnection notification. #define CDCAbstractControlManagementDescriptor_NETWORKCONNECTION (1 << 3) //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// Describes the command supported by the communication interface class /// with the Abstract Control Model subclass code. //------------------------------------------------------------------------------ typedef struct { /// Size of this descriptor in bytes. unsigned char bFunctionLength; /// Descriptor type (CDCDescriptors_INTERFACE). unsigned char bDescriptorType; /// Descriptor subtype (CDCDescriptors_ABSTRACTCONTROLMANAGEMENT). unsigned char bDescriptorSubtype; /// Configuration capabilities. /// \sa "CDC ACM Capabilities". unsigned char bmCapabilities; } __attribute__ ((packed)) CDCAbstractControlManagementDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR #endif //#ifndef CDCABSTRACTCONTROLMANAGEMENTDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCCallManagementDescriptor.h000066400000000000000000000104271207233610700316270ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for managing CDC call management descriptors. !!!Usage Should be included in a list of configuration descriptors for a USB device. */ #ifndef CDCCALLMANAGEMENTDESCRIPTOR_H #define CDCCALLMANAGEMENTDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC CallManagement Capabilities" /// This page lists CDC CallManagement Capabilities. /// /// !Capabilities /// - CDCCallManagementDescriptor_SELFCALLMANAGEMENT /// - CDCCallManagementDescriptor_DATACALLMANAGEMENT /// Device handles call management itself. #define CDCCallManagementDescriptor_SELFCALLMANAGEMENT (1 << 0) /// Device can exchange call management information over a Data class interface. #define CDCCallManagementDescriptor_DATACALLMANAGEMENT (1 << 1) //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// Describes the processing of calls for the communication class interface. //------------------------------------------------------------------------------ typedef struct { /// Size of this descriptor in bytes. unsigned char bFunctionLength; /// Descriptor type (CDCDescriptors_INTERFACE). unsigned char bDescriptorType; /// Descriptor sub-type (CDCDescriptors_CALLMANAGEMENT). unsigned char bDescriptorSubtype; /// Configuration capabilities ("CDC CallManagement Capabilities"). unsigned char bmCapabilities; /// Interface number of the data class interface used for call management /// (optional). unsigned char bDataInterface; } __attribute__ ((packed)) CDCCallManagementDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR #endif //#ifndef CDCCALLMANAGEMENTDESCRIPTOR_H CDCCommunicationInterfaceDescriptor.h000066400000000000000000000064401207233610700333260ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of several constants used when declaring a CDC communication class interface descriptor. */ #ifndef CDCCOMMUNICATIONINTERFACEDESCRIPTOR_H #define CDCCOMMUNICATIONINTERFACEDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Communication Interface Values" /// This page lists the values for CDC Communication Interface Descriptor. /// /// !Values /// - CDCCommunicationInterfaceDescriptor_CLASS /// - CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL /// - CDCCommunicationInterfaceDescriptor_NOPROTOCOL /// Interface class code for a CDC communication class interface. #define CDCCommunicationInterfaceDescriptor_CLASS 0x02 /// Interface subclass code for an Abstract Control Model interface descriptor. #define CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL 0x02 /// Interface protocol code when a CDC communication interface does not /// implemenent any particular protocol. #define CDCCommunicationInterfaceDescriptor_NOPROTOCOL 0x00 //------------------------------------------------------------------------------ #endif //#ifndef CDCCOMMUNICATIONINTERFACEDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCDataInterfaceDescriptor.h000066400000000000000000000061151207233610700314500ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definitions of constants used when declaring a CDC data class interface descriptor. */ #ifndef CDCDATAINTERFACEDESCRIPTOR_H #define CDCDATAINTERFACEDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Data Interface Values" /// This page lists the values for CDC Data Interface Descriptor. /// /// !Values /// - CDCDataInterfaceDescriptor_CLASS /// - CDCDataInterfaceDescriptor_SUBCLASS /// - CDCDataInterfaceDescriptor_NOPROTOCOL /// Interface class code for a data class interface. #define CDCDataInterfaceDescriptor_CLASS 0x0A /// Interface subclass code for a data class interface. #define CDCDataInterfaceDescriptor_SUBCLASS 0x00 /// Protocol code for a data class interface which does not implement any /// particular protocol. #define CDCDataInterfaceDescriptor_NOPROTOCOL 0x00 //------------------------------------------------------------------------------ #endif //#ifndef CDCDATAINTERFACEDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCDeviceDescriptor.h000066400000000000000000000057351207233610700301640ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of several constants used when declaring USB CDC device descriptors. */ #ifndef CDCDEVICEDESCRIPTOR_H #define CDCDEVICEDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Device Descriptor Values" /// This page lists the values for CDC Device Descriptor. /// /// !Values /// - CDCDeviceDescriptor_CLASS /// - CDCDeviceDescriptor_SUBCLASS /// - CDCDeviceDescriptor_PROTOCOL /// Device class code when using the CDC class. #define CDCDeviceDescriptor_CLASS 0x02 /// Device subclass code when using the CDC class. #define CDCDeviceDescriptor_SUBCLASS 0x00 /// Device protocol code when using the CDC class. #define CDCDeviceDescriptor_PROTOCOL 0x00 //------------------------------------------------------------------------------ #endif //#ifndef CDCDEVICEDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCGenericDescriptor.h000066400000000000000000000102251207233610700303270ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of several constants for declaring CDC descriptors. */ #ifndef CDCGENERICDESCRIPTOR_H #define CDCGENERICDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Specification Release Numbers" /// This page list the CDC Spec. Release Numbers. /// /// !Numbers /// - CDCGenericDescriptor_CDC1_10 /// Identify CDC specification version 1.10. #define CDCGenericDescriptor_CDC1_10 0x0110 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Descriptro Types" /// This page lists CDC descriptor types. /// /// !Types /// - CDCGenericDescriptor_INTERFACE /// - CDCGenericDescriptor_ENDPOINT ///Indicates that a CDC descriptor applies to an interface. #define CDCGenericDescriptor_INTERFACE 0x24 /// Indicates that a CDC descriptor applies to an endpoint. #define CDCGenericDescriptor_ENDPOINT 0x25 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Descriptor Subtypes" /// This page lists CDC descriptor sub types /// /// !Types /// - CDCGenericDescriptor_HEADER /// - CDCGenericDescriptor_CALLMANAGEMENT /// - CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT /// - CDCGenericDescriptor_UNION /// Header functional descriptor subtype. #define CDCGenericDescriptor_HEADER 0x00 /// Call management functional descriptor subtype. #define CDCGenericDescriptor_CALLMANAGEMENT 0x01 /// Abstract control management descriptor subtype. #define CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT 0x02 /// Union descriptor subtype. #define CDCGenericDescriptor_UNION 0x06 //------------------------------------------------------------------------------ #endif //#ifndef CDCGENERICDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCGenericRequest.h000066400000000000000000000056261207233610700276520ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Various definitions used for characterizing USB CDC requests. */ #ifndef CDCGENERICREQUEST_H #define CDCGENERICREQUEST_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Request Codes" /// This page lists USB CDC Request Codes. /// /// !Codes /// - CDCGenericRequest_SETLINECODING /// - CDCGenericRequest_GETLINECODING /// - CDCGenericRequest_SETCONTROLLINESTATE /// SetLineCoding request code. #define CDCGenericRequest_SETLINECODING 0x20 /// GetLineCoding request code. #define CDCGenericRequest_GETLINECODING 0x21 /// SetControlLineState request code. #define CDCGenericRequest_SETCONTROLLINESTATE 0x22 //------------------------------------------------------------------------------ #endif //#ifndef CDCGENERICREQUEST_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCHeaderDescriptor.h000066400000000000000000000063301207233610700301450ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of the CDCHeaderDescriptor class. !!!Usage Should be included in a USB configuration descriptor. */ #ifndef CDCHEADERDESCRIPTOR_H #define CDCHEADERDESCRIPTOR_H //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// Marks the beginning of the concatenated set of functional descriptors /// for the interface. //------------------------------------------------------------------------------ typedef struct { /// Size of this descriptor in bytes. unsigned char bFunctionLength; /// Descriptor type (CDCDescriptors_INTERFACE). unsigned char bDescriptorType; /// Descriptor sub-type (CDCDescriptors_HEADER). unsigned char bDescriptorSubtype; /// USB CDC specification release number. unsigned short bcdCDC; } __attribute__ ((packed)) CDCHeaderDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR #endif //#ifndef CDCHEADERDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCLineCoding.c000066400000000000000000000075571207233610700267400ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: CDCLineCoding About: Purpose Implementation of the CDCLineCoding class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "CDCLineCoding.h" #include //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Initializes the bitrate, number of stop bits, parity checking and /// number of data bits of a CDCLineCoding object. /// \param lineCoding Pointer to a CDCLineCoding instance. /// \param bitrate Bitrate of the virtual COM connection. /// \param stopbits Number of stop bits ("CDC LineCoding StopBits"). /// \param parity Parity check type ("CDC LineCoding ParityChecking"). /// \param databits Number of data bits. //------------------------------------------------------------------------------ void CDCLineCoding_Initialize(CDCLineCoding *lineCoding, unsigned int bitrate, unsigned char stopbits, unsigned char parity, unsigned char databits) { ASSERT(stopbits <= CDCLineCoding_TWOSTOPBITS, "CDCLineCoding_Initialize: Invalid stopbits value (%d)\n\r", stopbits); ASSERT(parity <= CDCLineCoding_SPACEPARITY, "CDCLineCoding_Initialize: Invalid parity value (%d)\n\r", parity); ASSERT(((databits >= 5) && (databits <= 8)) || (databits == 16), "CDCLineCoding_Initialize: Invalid databits value (%d)\n\r", databits); lineCoding->dwDTERate = bitrate; lineCoding->bCharFormat = stopbits; lineCoding->bParityType = parity; lineCoding->bDataBits = databits; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCLineCoding.h000066400000000000000000000130531207233610700267310ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Line coding structure used for by the CDC GetLineCoding and SetLineCoding requests. !!!Usage -# Initialize a CDCLineCoding instance using CDCLineCoding_Initialize. -# Send a CDCLineCoding object to the host in response to a GetLineCoding request. -# Receive a CDCLineCoding object from the host after a SetLineCoding request. */ #ifndef CDCLINECODING_H #define CDCLINECODING_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC LineCoding StopBits" /// This page lists Stop Bits for CDC Line Coding. /// /// !Stop bits /// - CDCLineCoding_ONESTOPBIT /// - CDCLineCoding_ONE5STOPBIT /// - CDCLineCoding_TWOSTOPBITS /// The transmission protocol uses one stop bit. #define CDCLineCoding_ONESTOPBIT 0 /// The transmission protocol uses 1.5 stop bit. #define CDCLineCoding_ONE5STOPBIT 1 /// The transmissin protocol uses two stop bits. #define CDCLineCoding_TWOSTOPBITS 2 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC LineCoding ParityCheckings" /// This page lists Parity checkings for CDC Line Coding. /// /// !Parity checking /// - CDCLineCoding_NOPARITY /// - CDCLineCoding_ODDPARITY /// - CDCLineCoding_EVENPARITY /// - CDCLineCoding_MARKPARITY /// - CDCLineCoding_SPACEPARITY /// No parity checking. #define CDCLineCoding_NOPARITY 0 /// Odd parity checking. #define CDCLineCoding_ODDPARITY 1 /// Even parity checking. #define CDCLineCoding_EVENPARITY 2 /// Mark parity checking. #define CDCLineCoding_MARKPARITY 3 /// Space parity checking. #define CDCLineCoding_SPACEPARITY 4 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// Format of the data returned when a GetLineCoding request is received. //------------------------------------------------------------------------------ typedef struct { /// Data terminal rate in bits per second. unsigned int dwDTERate; /// Number of stop bits. /// \sa "CDC LineCoding StopBits". char bCharFormat; /// Type of parity checking used. /// \sa "CDC LineCoding ParityCheckings". char bParityType; /// Number of data bits (5, 6, 7, 8 or 16). char bDataBits; } __attribute__ ((packed)) CDCLineCoding; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern void CDCLineCoding_Initialize(CDCLineCoding *lineCoding, unsigned int bitrate, unsigned char stopbits, unsigned char parity, unsigned char databits); #endif //#ifndef CDCLINECODING_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCSetControlLineStateRequest.c000066400000000000000000000071601207233610700321710ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** CDCSetControlLineStateRequest.c !!!Purpose Implementation of the CDCSetControlLineStateRequest class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "CDCSetControlLineStateRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Notifies if the given request indicates that the DTE signal is present. /// \param request Pointer to a USBGenericRequest instance. /// \return 1 if the DTE signal is present, otherwise 0. //------------------------------------------------------------------------------ unsigned char CDCSetControlLineStateRequest_IsDtePresent( const USBGenericRequest *request) { if ((USBGenericRequest_GetValue(request) & 0x0001) != 0) { return 1; } else { return 0; } } //------------------------------------------------------------------------------ /// Notifies if the given request indicates that the device carrier should /// be activated. /// \param request Pointer to a USBGenericRequest instance. /// \return 1 is the device should activate its carrier, 0 otherwise. //------------------------------------------------------------------------------ unsigned char CDCSetControlLineStateRequest_ActivateCarrier( const USBGenericRequest *request) { if ((USBGenericRequest_GetValue(request) & 0x0002) != 0) { return 1; } else { return 0; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCSetControlLineStateRequest.h000066400000000000000000000053461207233610700322020ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for manipulating SetControlLineState requests. */ #ifndef CDCSETCONTROLLINESTATE_H #define CDCSETCONTROLLINESTATE_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned char CDCSetControlLineStateRequest_IsDtePresent( const USBGenericRequest *request); extern unsigned char CDCSetControlLineStateRequest_ActivateCarrier( const USBGenericRequest *request); #endif //#ifndef CDCSETCONTROLLINESTATE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCUnionDescriptor.h000066400000000000000000000066041207233610700300510ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for manipulating CDC union descriptors. !!!Usage Should be included in the list of USB descriptor used for a device configuration. */ #ifndef CDCUNIONDESCRIPTOR_H #define CDCUNIONDESCRIPTOR_H //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// Describes the relationship between a group of interfaces that can /// be considered to form a functional unit. //------------------------------------------------------------------------------ typedef struct { /// Size of the descriptor in bytes. unsigned char bFunctionLength; /// Descriptor type (CDCDescriptors_INTERFACE). unsigned char bDescriptorType; /// Descriptor subtype (CDCDescriptors_UNION). unsigned char bDescriptorSubtype; /// Number of the master interface for this union. unsigned char bMasterInterface; /// Number of the first slave interface for this union. unsigned char bSlaveInterface0; } __attribute__ ((packed)) CDCUnionDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR #endif //#ifndef CDCUNIONDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/000077500000000000000000000000001207233610700244305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBConfigurationDescriptor.c000066400000000000000000000150721207233610700320210ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBConfigurationDescriptor implementation About: Purpose Implementation of the USBConfigurationDescriptor class. */ //----------------------------------------------------------------------------- // Headers //----------------------------------------------------------------------------- #include "USBConfigurationDescriptor.h" //----------------------------------------------------------------------------- // Exported functions //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- /// Returns the total length of a configuration, i.e. including the /// descriptors following it. /// \param configuration Pointer to a USBConfigurationDescriptor instance. /// \return Total length (in bytes) of the configuration. //----------------------------------------------------------------------------- unsigned int USBConfigurationDescriptor_GetTotalLength( const USBConfigurationDescriptor *config) { return config->wTotalLength; } //----------------------------------------------------------------------------- /// Returns the number of interfaces in a configuration. /// \param configuration Pointer to a USBConfigurationDescriptor instance. /// \return Number of interfaces in configuration. //----------------------------------------------------------------------------- unsigned char USBConfigurationDescriptor_GetNumInterfaces( const USBConfigurationDescriptor *config) { return config->bNumInterfaces; } //----------------------------------------------------------------------------- /// Indicates if the device is self-powered when in a given configuration. /// \param configuration Pointer to a USBConfigurationDescriptor instance. /// \return 1 if the device is self-powered when in the given configuration; /// otherwise 0. //----------------------------------------------------------------------------- unsigned char USBConfigurationDescriptor_IsSelfPowered( const USBConfigurationDescriptor *config) { if ((config->bmAttributes & (1 << 6)) != 0) { return 1; } else { return 0; } } //----------------------------------------------------------------------------- /// Parses the given Configuration descriptor (followed by relevant /// interface, endpoint and class-specific descriptors) into three arrays. /// *Each array must have its size equal or greater to the number of /// descriptors it stores plus one*. A null-value is inserted after the last /// descriptor of each type to indicate the array end. /// /// Note that if the pointer to an array is null (0), nothing is stored in /// it. /// \param configuration Pointer to the start of the whole Configuration /// descriptor. /// \param interfaces Pointer to the Interface descriptor array. /// \param epoints Pointer to the Endpoint descriptor array. /// \param others Pointer to the class-specific descriptor array. //----------------------------------------------------------------------------- void USBConfigurationDescriptor_Parse( const USBConfigurationDescriptor *config, USBInterfaceDescriptor **interfaces, USBEndpointDescriptor **epoints, USBGenericDescriptor **others) { int size; USBGenericDescriptor *descriptor; // Get size of configuration to parse size = USBConfigurationDescriptor_GetTotalLength(config); size -= sizeof(USBConfigurationDescriptor); // Start parsing descriptors descriptor = (USBGenericDescriptor *) config; while (size > 0) { // Get next descriptor descriptor = USBGenericDescriptor_GetNextDescriptor(descriptor); size -= USBGenericDescriptor_GetLength(descriptor); // Store descriptor in correponding array if (USBGenericDescriptor_GetType(descriptor) == USBGenericDescriptor_INTERFACE) { if (interfaces) { *interfaces = (USBInterfaceDescriptor *) descriptor; interfaces++; } } else if (USBGenericDescriptor_GetType(descriptor) == USBGenericDescriptor_ENDPOINT) { if (epoints) { *epoints = (USBEndpointDescriptor *) descriptor; epoints++; } } else if (others) { *others = descriptor; others++; } } // Null-terminate arrays if (interfaces) { *interfaces = 0; } if (epoints) { *epoints = 0; } if (others) { *others = 0; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBConfigurationDescriptor.h000066400000000000000000000151551207233610700320300ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definitions and methods for USB configuration descriptor structures described by the USB specification. !!!Usage -# Declare USBConfigurationDescriptor instance as a part of the configuration descriptors of a USB device. -# To get useful information (field values) from the defined USB device configuration descriptor, use - USBConfigurationDescriptor_GetTotalLength - USBConfigurationDescriptor_GetNumInterfaces - USBConfigurationDescriptor_IsSelfPowered -# To pase the defined USB device configuration descriptor, use - USBConfigurationDescriptor_Parse */ #ifndef USBCONFIGURATIONDESCRIPTOR_H #define USBCONFIGURATIONDESCRIPTOR_H //----------------------------------------------------------------------------- // Headers //----------------------------------------------------------------------------- #include "USBGenericDescriptor.h" #include "USBInterfaceDescriptor.h" #include "USBEndpointDescriptor.h" //----------------------------------------------------------------------------- // Definitions //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- /// \page "USB device Attributes" /// /// This page lists the codes of the usb attributes. /// /// !Attributes /// - USBConfigurationDescriptor_BUSPOWERED_NORWAKEUP /// - USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP /// - USBConfigurationDescriptor_BUSPOWERED_RWAKEUP /// - USBConfigurationDescriptor_SELFPOWERED_RWAKEUP /// - USBConfigurationDescriptor_POWER /// Device is bus-powered and not support remote wake-up. #define USBConfigurationDescriptor_BUSPOWERED_NORWAKEUP 0x80 /// Device is self-powered and not support remote wake-up. #define USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP 0xC0 /// Device is bus-powered and supports remote wake-up. #define USBConfigurationDescriptor_BUSPOWERED_RWAKEUP 0xA0 /// Device is self-powered and supports remote wake-up. #define USBConfigurationDescriptor_SELFPOWERED_RWAKEUP 0xE0 /// Calculates the value of the power consumption field given the value in mA. /// \param power The power consumption value in mA /// \return The value that should be set to the field in descriptor #define USBConfigurationDescriptor_POWER(power) (power / 2) //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Types //----------------------------------------------------------------------------- #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //----------------------------------------------------------------------------- /// USB standard configuration descriptor structure. //----------------------------------------------------------------------------- typedef struct { /// Size of the descriptor in bytes. unsigned char bLength; /// Descriptor type (USBDESC_CONFIGURATION of "USB Descriptor types"). unsigned char bDescriptorType; /// Length of all descriptors returned along with this configuration /// descriptor. unsigned short wTotalLength; /// Number of interfaces in this configuration. unsigned char bNumInterfaces; /// Value for selecting this configuration. unsigned char bConfigurationValue; /// Index of the configuration string descriptor. unsigned char iConfiguration; /// Configuration characteristics. unsigned char bmAttributes; /// Maximum power consumption of the device when in this configuration. unsigned char bMaxPower; } __attribute__ ((packed)) USBConfigurationDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR //----------------------------------------------------------------------------- // Exported functions //----------------------------------------------------------------------------- extern unsigned int USBConfigurationDescriptor_GetTotalLength( const USBConfigurationDescriptor *config); extern unsigned char USBConfigurationDescriptor_GetNumInterfaces( const USBConfigurationDescriptor *config); extern unsigned char USBConfigurationDescriptor_IsSelfPowered( const USBConfigurationDescriptor *config); extern void USBConfigurationDescriptor_Parse( const USBConfigurationDescriptor *config, USBInterfaceDescriptor **interfaces, USBEndpointDescriptor **endpoints, USBGenericDescriptor **others); #endif //#ifndef USBCONFIGURATIONDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBDeviceDescriptor.h000066400000000000000000000115421207233610700304140ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Class for manipulating USB device descriptors. !!!Usage - Declare a USBDeviceDescriptor instance as the device descriptor of a USB device. */ #ifndef USBDEVICEDESCRIPTOR_H #define USBDEVICEDESCRIPTOR_H #include //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB release numbers" /// /// This page lists the codes of USB release numbers. /// /// !Code /// - USBDeviceDescriptor_USB2_00 /// The device supports USB 2.00. #define USBDeviceDescriptor_USB2_00 0x0200 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// USB standard device descriptor structure. //------------------------------------------------------------------------------ typedef struct { /// Size of this descriptor in bytes. unsigned char bLength; /// Descriptor type (USBGenericDescriptor_DEVICE). unsigned char bDescriptorType; /// USB specification release number in BCD format. unsigned short bcdUSB; /// Device class code. unsigned char bDeviceClass; /// Device subclass code. unsigned char bDeviceSubClass; /// Device protocol code. unsigned char bDeviceProtocol; /// Maximum packet size of endpoint 0 (in bytes). unsigned char bMaxPacketSize0; /// Vendor ID. unsigned short idVendor; /// Product ID. unsigned short idProduct; /// Device release number in BCD format. unsigned short bcdDevice; /// Index of the manufacturer string descriptor. unsigned char iManufacturer; /// Index of the product string descriptor. unsigned char iProduct; /// Index of the serial number string descriptor. unsigned char iSerialNumber; /// Number of possible configurations for the device. unsigned char bNumConfigurations; } __attribute__ ((packed)) USBDeviceDescriptor; // GCC #if defined(BOARD_USB_OTGHS) typedef struct { /// Size of this descriptor in bytes. unsigned char bLength; /// Descriptor type (USBGenericDescriptor_OTG). unsigned char bDescriptorType; /// Attribute Fields D72: Reserved D1: HNP support D0: SRP support unsigned char bmAttributes; } __attribute__ ((packed)) USBOtgDescriptor; // GCC #endif #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR #endif //#ifndef USBDEVICEDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBDeviceQualifierDescriptor.h000066400000000000000000000074511207233610700322620ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Class for manipulating USB device qualifier descriptors. !!!Usage - Declare a USBDeviceQualifierDescriptor instance as the device qualifier descriptor of a USB device. */ #ifndef USBDEVICEQUALIFIERDESCRIPTOR_H #define USBDEVICEQUALIFIERDESCRIPTOR_H //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// Alternate device descriptor indicating the capabilities of the device /// in full-speed, if currently in high-speed; or in high-speed, if it is /// currently in full-speed. Only relevant for devices supporting the /// high-speed mode. //------------------------------------------------------------------------------ typedef struct { /// Size of the descriptor in bytes. unsigned char bLength; /// Descriptor type (USBDESC_DEVICE_QUALIFIER or "USB device types"). unsigned char bDescriptorType; /// USB specification release number (in BCD format). unsigned short bcdUSB; /// Device class code. unsigned char bDeviceClass; /// Device subclass code. unsigned char bDeviceSubClass; /// Device protocol code. unsigned char bDeviceProtocol; /// Maximum packet size of endpoint 0. unsigned char bMaxPacketSize0; /// Number of possible configurations for the device. unsigned char bNumConfigurations; /// Reserved. unsigned char bReserved; } __attribute__ ((packed)) USBDeviceQualifierDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR #endif //#ifndef USBDEVICEQUALIFIERDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBEndpointDescriptor.c000066400000000000000000000116711207233610700307730ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBEndpointDescriptor implementation About: Purpose Implementation of the USBEndpointDescriptor class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBEndpointDescriptor.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Returns the number of an endpoint given its descriptor. /// \param endpoint Pointer to a USBEndpointDescriptor instance. /// \return Endpoint number. //------------------------------------------------------------------------------ unsigned char USBEndpointDescriptor_GetNumber( const USBEndpointDescriptor *endpoint) { return endpoint->bEndpointAddress & 0xF; } //------------------------------------------------------------------------------ /// Returns the direction of an endpoint given its descriptor. /// \param endpoint Pointer to a USBEndpointDescriptor instance. /// \return Endpoint direction (see ). //------------------------------------------------------------------------------ unsigned char USBEndpointDescriptor_GetDirection( const USBEndpointDescriptor *endpoint) { if ((endpoint->bEndpointAddress & 0x80) != 0) { return USBEndpointDescriptor_IN; } else { return USBEndpointDescriptor_OUT; } } //------------------------------------------------------------------------------ /// Returns the type of an endpoint given its descriptor. /// \param endpoint Pointer to a USBEndpointDescriptor instance. /// \return Endpoint type (see ). //------------------------------------------------------------------------------ unsigned char USBEndpointDescriptor_GetType( const USBEndpointDescriptor *endpoint) { return endpoint->bmAttributes & 0x3; } //------------------------------------------------------------------------------ /// Returns the maximum size of a packet (in bytes) on an endpoint given /// its descriptor. /// \param endpoint - Pointer to a USBEndpointDescriptor instance. /// \return Maximum packet size of endpoint. //------------------------------------------------------------------------------ unsigned short USBEndpointDescriptor_GetMaxPacketSize( const USBEndpointDescriptor *endpoint) { return endpoint->wMaxPacketSize; } //------------------------------------------------------------------------------ /// Returns the polling interval on an endpoint given its descriptor. /// \param endpoint - Pointer to a USBEndpointDescriptor instance. /// \return Polling interval of endpoint. //------------------------------------------------------------------------------ unsigned char USBEndpointDescriptor_GetInterval( const USBEndpointDescriptor *endpoint) { return endpoint->bInterval; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBEndpointDescriptor.h000066400000000000000000000223421207233610700307750ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for handling USB endpoint descriptors. !!!Usage -# Declare USBEndpointDescriptor instance as a part of the configuration descriptors of a USB device. -# To get useful information (field values) from the defined USB device endpoint descriptor (to configure hardware for endpoints, etc), use - USBEndpointDescriptor_GetNumber - USBEndpointDescriptor_GetDirection - USBEndpointDescriptor_GetType - USBEndpointDescriptor_GetMaxPacketSize */ #ifndef USBENDPOINTDESCRIPTOR_H #define USBENDPOINTDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Endpoint definitions" /// /// This page lists definitions and macro for endpoint descriptors. /// /// - USB Endpoint directions /// - USBEndpointDescriptor_OUT /// - USBEndpointDescriptor_IN /// /// - USB Endpoint types /// - USBEndpointDescriptor_CONTROL /// - USBEndpointDescriptor_ISOCHRONOUS /// - USBEndpointDescriptor_BULK /// - USBEndpointDescriptor_INTERRUPT /// /// - USB Endpoint maximun sizes /// - USBEndpointDescriptor_MAXCTRLSIZE_FS /// - USBEndpointDescriptor_MAXCTRLSIZE_HS /// - USBEndpointDescriptor_MAXBULKSIZE_FS /// - USBEndpointDescriptor_MAXBULKSIZE_HS /// - USBEndpointDescriptor_MAXINTERRUPTSIZE_FS /// - USBEndpointDescriptor_MAXINTERRUPTSIZE_HS /// - USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS /// - USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS /// /// - USB Endpoint address define /// - USBEndpointDescriptor_ADDRESS //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Endpoint directions" /// /// This page lists definitions of USB endpoint directions. /// /// !Directions /// - USBEndpointDescriptor_OUT /// - USBEndpointDescriptor_IN /// Endpoint receives data from the host. #define USBEndpointDescriptor_OUT 0 /// Endpoint sends data to the host. #define USBEndpointDescriptor_IN 1 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Endpoint types" /// /// This page lists definitions of USB endpoint types. /// /// !Types /// - USBEndpointDescriptor_CONTROL /// - USBEndpointDescriptor_ISOCHRONOUS /// - USBEndpointDescriptor_BULK /// - USBEndpointDescriptor_INTERRUPT /// Control endpoint type. #define USBEndpointDescriptor_CONTROL 0 /// Isochronous endpoint type. #define USBEndpointDescriptor_ISOCHRONOUS 1 /// Bulk endpoint type. #define USBEndpointDescriptor_BULK 2 /// Interrupt endpoint type. #define USBEndpointDescriptor_INTERRUPT 3 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Endpoint maximun sizes" /// /// This page lists definitions of USB endpoint maximun sizes. /// /// !Sizes /// - USBEndpointDescriptor_MAXCTRLSIZE_FS /// - USBEndpointDescriptor_MAXCTRLSIZE_HS /// - USBEndpointDescriptor_MAXBULKSIZE_FS /// - USBEndpointDescriptor_MAXBULKSIZE_HS /// - USBEndpointDescriptor_MAXINTERRUPTSIZE_FS /// - USBEndpointDescriptor_MAXINTERRUPTSIZE_HS /// - USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS /// - USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS /// Maximum size for a full-speed control endpoint. #define USBEndpointDescriptor_MAXCTRLSIZE_FS 64 /// Maximum size for a high-speed control endpoint. #define USBEndpointDescriptor_MAXCTRLSIZE_HS 64 /// Maximum size for a full-speed bulk endpoint. #define USBEndpointDescriptor_MAXBULKSIZE_FS 64 /// Maximum size for a high-speed bulk endpoint. #define USBEndpointDescriptor_MAXBULKSIZE_HS 512 /// Maximum size for a full-speed interrupt endpoint. #define USBEndpointDescriptor_MAXINTERRUPTSIZE_FS 64 /// Maximum size for a high-speed interrupt endpoint. #define USBEndpointDescriptor_MAXINTERRUPTSIZE_HS 1024 /// Maximum size for a full-speed isochronous endpoint. #define USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS 1023 /// Maximum size for a high-speed isochronous endpoint. #define USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS 1024 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Endpoint address define" /// /// This page lists macro for USB endpoint address definition. /// /// !Macro /// - USBEndpointDescriptor_ADDRESS /// Calculates the address of an endpoint given its number and direction /// \param direction USB endpoint direction definition /// \param number USB endpoint number /// \return The value used to set the endpoint descriptor based on input number /// and direction #define USBEndpointDescriptor_ADDRESS(direction, number) \ (((direction & 0x01) << 7) | (number & 0xF)) //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// USB standard endpoint descriptor structure. //------------------------------------------------------------------------------ typedef struct { /// Size of the descriptor in bytes. unsigned char bLength; /// Descriptor type (). unsigned char bDescriptorType; /// Address and direction of the endpoint. unsigned char bEndpointAddress; /// Endpoint type and additional characteristics (for isochronous endpoints). unsigned char bmAttributes; /// Maximum packet size (in bytes) of the endpoint. unsigned short wMaxPacketSize; /// Polling rate of the endpoint. unsigned char bInterval; } __attribute__ ((packed)) USBEndpointDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned char USBEndpointDescriptor_GetNumber( const USBEndpointDescriptor *endpoint); extern unsigned char USBEndpointDescriptor_GetDirection( const USBEndpointDescriptor *endpoint); extern unsigned char USBEndpointDescriptor_GetType( const USBEndpointDescriptor *endpoint); extern unsigned short USBEndpointDescriptor_GetMaxPacketSize( const USBEndpointDescriptor *endpoint); extern unsigned char USBEndpointDescriptor_GetInterval( const USBEndpointDescriptor *endpoint); #endif //#ifndef USBENDPOINTDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBFeatureRequest.c000066400000000000000000000066071207233610700301230ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBFeatureRequest implementation About: Purpose Implementation of the USBFeatureRequest class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBFeatureRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Returns the feature selector of a given CLEAR_FEATURE or SET_FEATURE /// request. /// \param request Pointer to a USBGenericRequest instance. /// \return Feature selector. //------------------------------------------------------------------------------ unsigned char USBFeatureRequest_GetFeatureSelector( const USBGenericRequest *request) { return USBGenericRequest_GetValue(request); } //------------------------------------------------------------------------------ /// Indicates the test that the device must undertake following a /// SET_FEATURE request. /// \param request Pointer to a USBGenericRequest instance. /// \return Test selector. //------------------------------------------------------------------------------ unsigned char USBFeatureRequest_GetTestSelector( const USBGenericRequest *request) { return (USBGenericRequest_GetIndex(request) >> 8) & 0xFF; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBFeatureRequest.h000066400000000000000000000135511207233610700301240ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for manipulating CLEAR_FEATURE and SET_FEATURE requests. !!!Usage - To get USB feature request information (field values) from the USBGenericRequest instance, use - USBFeatureRequest_GetFeatureSelector - USBFeatureRequest_GetTestSelector */ #ifndef USBFEATUREREQUEST_H #define USBFEATUREREQUEST_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBGenericRequest.h" //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Feature Request definitions" /// /// This page lists codes of USB Feature Request /// /// - USB Feature selectors /// - USBFeatureRequest_ENDPOINTHALT /// - USBFeatureRequest_DEVICEREMOTEWAKEUP /// - USBFeatureRequest_TESTMODE /// /// - USB Test mode selectors /// - USBFeatureRequest_TESTJ /// - USBFeatureRequest_TESTK /// - USBFeatureRequest_TESTSE0NAK /// - USBFeatureRequest_TESTPACKET /// - USBFeatureRequest_TESTFORCEENABLE /// - USBFeatureRequest_TESTSENDZLP //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Feature selectors" /// /// This page lists codes of USB feature selectors. /// /// !Selectors /// - USBFeatureRequest_ENDPOINTHALT /// - USBFeatureRequest_DEVICEREMOTEWAKEUP /// - USBFeatureRequest_TESTMODE /// Halt feature of an endpoint. #define USBFeatureRequest_ENDPOINTHALT 0 /// Remote wake-up feature of the device. #define USBFeatureRequest_DEVICEREMOTEWAKEUP 1 /// Test mode of the device. #define USBFeatureRequest_TESTMODE 2 /// OTG set feature #define USBFeatureRequest_OTG 0x0B //------------------------------------------------------------------------------ /// On The Go Feature Selectors /// b_hnp_enable 3 /// a_hnp_support 4 /// a_alt_hnp_support 5 #define USBFeatureRequest_OTG_B_HNP_ENABLE 3 #define USBFeatureRequest_OTG_A_HNP_SUPPORT 4 #define USBFeatureRequest_OTG_A_ALT_HNP_SUPPORT 5 //------------------------------------------------------------------------------ /// \page "USB Test mode selectors" /// /// This page lists codes of USB high speed test mode selectors. /// /// !Selectors /// - USBFeatureRequest_TESTJ /// - USBFeatureRequest_TESTK /// - USBFeatureRequest_TESTSE0NAK /// - USBFeatureRequest_TESTPACKET /// - USBFeatureRequest_TESTFORCEENABLE /// - USBFeatureRequest_TESTSENDZLP /// Tests the high-output drive level on the D+ line. #define USBFeatureRequest_TESTJ 1 /// Tests the high-output drive level on the D- line. #define USBFeatureRequest_TESTK 2 /// Tests the output impedance, low-level output voltage and loading /// characteristics. #define USBFeatureRequest_TESTSE0NAK 3 /// Tests rise and fall times, eye patterns and jitter. #define USBFeatureRequest_TESTPACKET 4 /// Tests the hub disconnect detection. #define USBFeatureRequest_TESTFORCEENABLE 5 /// Send a ZLP in Test Mode. #define USBFeatureRequest_TESTSENDZLP 6 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned char USBFeatureRequest_GetFeatureSelector( const USBGenericRequest *request); extern unsigned char USBFeatureRequest_GetTestSelector( const USBGenericRequest *request); #endif //#ifndef USBFEATUREREQUEST_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericDescriptor.c000066400000000000000000000076211207233610700305670ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBGenericDescriptor implementation About: Purpose Implementation of the USBGenericDescriptor class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBGenericDescriptor.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Returns the length of a descriptor. /// \param descriptor Pointer to a USBGenericDescriptor instance. /// \return Length of descriptor in bytes. //------------------------------------------------------------------------------ unsigned int USBGenericDescriptor_GetLength( const USBGenericDescriptor *descriptor) { return descriptor->bLength; } //------------------------------------------------------------------------------ /// Returns the type of a descriptor. /// \param descriptor Pointer to a USBGenericDescriptor instance. /// \return Type of descriptor. //------------------------------------------------------------------------------ unsigned char USBGenericDescriptor_GetType( const USBGenericDescriptor *descriptor) { return descriptor->bDescriptorType; } //------------------------------------------------------------------------------ /// Returns a pointer to the descriptor right after the given one, when /// parsing a Configuration descriptor. /// \param descriptor - Pointer to a USBGenericDescriptor instance. /// \return Pointer to the next descriptor. //------------------------------------------------------------------------------ USBGenericDescriptor *USBGenericDescriptor_GetNextDescriptor( const USBGenericDescriptor *descriptor) { return (USBGenericDescriptor *) (((char *) descriptor) + USBGenericDescriptor_GetLength(descriptor)); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericDescriptor.h000066400000000000000000000132411207233610700305670ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !!!Purpose /// /// Definition of a generic USB descriptor class. /// /// !!!Usage /// /// -# Declare or access USB descriptors by USBGenericDescriptor instance. /// -# To get usful information (field values) from the USB descriptors, use /// - USBGenericDescriptor_GetLength /// - USBGenericDescriptor_GetType /// -# To scan the descriptors, use /// - USBGenericDescriptor_GetNextDescriptor //------------------------------------------------------------------------------ #ifndef USBGENERICDESCRIPTOR_H #define USBGENERICDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Descriptor types" /// /// This page lists the codes of the usb descriptor types /// /// !Types /// - USBGenericDescriptor_DEVICE /// - USBGenericDescriptor_CONFIGURATION /// - USBGenericDescriptor_STRING /// - USBGenericDescriptor_INTERFACE /// - USBGenericDescriptor_ENDPOINT /// - USBGenericDescriptor_DEVICEQUALIFIER /// - USBGenericDescriptor_OTHERSPEEDCONFIGURATION /// - USBGenericDescriptor_INTERFACEPOWER /// - USBGenericDescriptor_OTG /// - USBGenericDescriptor_DEBUG /// - USBGenericDescriptor_INTERFACEASSOCIATION /// Device descriptor type. #define USBGenericDescriptor_DEVICE 1 /// Configuration descriptor type. #define USBGenericDescriptor_CONFIGURATION 2 /// String descriptor type. #define USBGenericDescriptor_STRING 3 /// Interface descriptor type. #define USBGenericDescriptor_INTERFACE 4 /// Endpoint descriptor type. #define USBGenericDescriptor_ENDPOINT 5 /// Device qualifier descriptor type. #define USBGenericDescriptor_DEVICEQUALIFIER 6 /// Other speed configuration descriptor type. #define USBGenericDescriptor_OTHERSPEEDCONFIGURATION 7 /// Interface power descriptor type. #define USBGenericDescriptor_INTERFACEPOWER 8 /// On-The-Go descriptor type. #define USBGenericDescriptor_OTG 9 /// Debug descriptor type. #define USBGenericDescriptor_DEBUG 10 /// Interface association descriptor type. #define USBGenericDescriptor_INTERFACEASSOCIATION 11 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR /// Holds the few fields shared by all USB descriptors. typedef struct { /// Length of the descriptor in bytes. unsigned char bLength; /// Descriptor type. unsigned char bDescriptorType; } __attribute__ ((packed)) USBGenericDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned int USBGenericDescriptor_GetLength( const USBGenericDescriptor *descriptor); extern unsigned char USBGenericDescriptor_GetType( const USBGenericDescriptor *descriptor); extern USBGenericDescriptor *USBGenericDescriptor_GetNextDescriptor( const USBGenericDescriptor *descriptor); #endif //#ifndef USBGENERICDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericRequest.c000066400000000000000000000143071207233610700301000ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBGenericRequest implementation About: Purpose Implementation of the USBGenericRequest class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBGenericRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Returns the type of the given request. /// \param request Pointer to a USBGenericRequest instance. /// \return "USB Request Types" //------------------------------------------------------------------------------ extern unsigned char USBGenericRequest_GetType(const USBGenericRequest *request) { return ((request->bmRequestType >> 5) & 0x3); } //------------------------------------------------------------------------------ /// Returns the request code of the given request. /// \param request Pointer to a USBGenericRequest instance. /// \return Request code. /// \sa "USB Request Codes" //------------------------------------------------------------------------------ unsigned char USBGenericRequest_GetRequest(const USBGenericRequest *request) { return request->bRequest; } //------------------------------------------------------------------------------ /// Returns the wValue field of the given request. /// \param request - Pointer to a USBGenericRequest instance. /// \return Request value. //------------------------------------------------------------------------------ unsigned short USBGenericRequest_GetValue(const USBGenericRequest *request) { return request->wValue; } //------------------------------------------------------------------------------ /// Returns the wIndex field of the given request. /// \param request Pointer to a USBGenericRequest instance. /// \return Request index; //------------------------------------------------------------------------------ unsigned short USBGenericRequest_GetIndex(const USBGenericRequest *request) { return request->wIndex; } //------------------------------------------------------------------------------ /// Returns the expected length of the data phase following a request. /// \param request Pointer to a USBGenericRequest instance. /// \return Length of data phase. //------------------------------------------------------------------------------ unsigned short USBGenericRequest_GetLength(const USBGenericRequest *request) { return request->wLength; } //------------------------------------------------------------------------------ /// Returns the endpoint number targetted by a given request. /// \param request Pointer to a USBGenericRequest instance. /// \return Endpoint number. //------------------------------------------------------------------------------ unsigned char USBGenericRequest_GetEndpointNumber( const USBGenericRequest *request) { return USBGenericRequest_GetIndex(request) & 0xF; } //------------------------------------------------------------------------------ /// Returns the intended recipient of a given request. /// \param request Pointer to a USBGenericRequest instance. /// \return Request recipient. /// \sa "USB Request Recipients" //------------------------------------------------------------------------------ unsigned char USBGenericRequest_GetRecipient(const USBGenericRequest *request) { // Recipient is in bits [0..4] of the bmRequestType field return request->bmRequestType & 0xF; } //------------------------------------------------------------------------------ /// Returns the direction of the data transfer following the given request. /// \param request Pointer to a USBGenericRequest instance. /// \return Transfer direction. /// \sa "USB Request Directions" //------------------------------------------------------------------------------ unsigned char USBGenericRequest_GetDirection(const USBGenericRequest *request) { // Transfer direction is located in bit D7 of the bmRequestType field if ((request->bmRequestType & 0x80) != 0) { return USBGenericRequest_IN; } else { return USBGenericRequest_OUT; } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericRequest.h000066400000000000000000000222341207233610700301030ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of the USBGenericRequest class and its methods. !!!Usage -# Declare or access USB requests by USBGenericRequest instance. -# To get usful information (field values) from the USB requests, use - USBGenericRequest_GetType - USBGenericRequest_GetRequest - USBGenericRequest_GetValue - USBGenericRequest_GetIndex - USBGenericRequest_GetLength - USBGenericRequest_GetEndpointNumber - USBGenericRequest_GetRecipient - USBGenericRequest_GetDirection */ #ifndef USBGENERICREQUEST_H #define USBGENERICREQUEST_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Generic Request definitions" /// /// This page lists the codes of USB generic request. /// /// - USB Request codes /// - USBGenericRequest_GETSTATUS /// - USBGenericRequest_CLEARFEATURE /// - USBGenericRequest_SETFEATURE /// - USBGenericRequest_SETADDRESS /// - USBGenericRequest_GETDESCRIPTOR /// - USBGenericRequest_SETDESCRIPTOR /// - USBGenericRequest_GETCONFIGURATION /// - USBGenericRequest_SETCONFIGURATION /// - USBGenericRequest_GETINTERFACE /// - USBGenericRequest_SETINTERFACE /// - USBGenericRequest_SYNCHFRAME /// /// - USB Request Recipients /// - USBGenericRequest_DEVICE /// - USBGenericRequest_INTERFACE /// - USBGenericRequest_ENDPOINT /// - USBGenericRequest_OTHER /// /// - USB Request Types /// - USBGenericRequest_STANDARD /// - USBGenericRequest_CLASS /// - USBGenericRequest_VENDOR /// /// - USB Request Directions /// - USBGenericRequest_IN /// - USBGenericRequest_OUT //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Request codes" /// /// This page lists the USB generic request codes. /// /// !Codes /// - USBGenericRequest_GETSTATUS /// - USBGenericRequest_CLEARFEATURE /// - USBGenericRequest_SETFEATURE /// - USBGenericRequest_SETADDRESS /// - USBGenericRequest_GETDESCRIPTOR /// - USBGenericRequest_SETDESCRIPTOR /// - USBGenericRequest_GETCONFIGURATION /// - USBGenericRequest_SETCONFIGURATION /// - USBGenericRequest_GETINTERFACE /// - USBGenericRequest_SETINTERFACE /// - USBGenericRequest_SYNCHFRAME /// GET_STATUS request code. #define USBGenericRequest_GETSTATUS 0 /// CLEAR_FEATURE request code. #define USBGenericRequest_CLEARFEATURE 1 /// SET_FEATURE request code. #define USBGenericRequest_SETFEATURE 3 /// SET_ADDRESS request code. #define USBGenericRequest_SETADDRESS 5 /// GET_DESCRIPTOR request code. #define USBGenericRequest_GETDESCRIPTOR 6 /// SET_DESCRIPTOR request code. #define USBGenericRequest_SETDESCRIPTOR 7 /// GET_CONFIGURATION request code. #define USBGenericRequest_GETCONFIGURATION 8 /// SET_CONFIGURATION request code. #define USBGenericRequest_SETCONFIGURATION 9 /// GET_INTERFACE request code. #define USBGenericRequest_GETINTERFACE 10 /// SET_INTERFACE request code. #define USBGenericRequest_SETINTERFACE 11 /// SYNCH_FRAME request code. #define USBGenericRequest_SYNCHFRAME 12 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Request Recipients" /// /// This page lists codes of USB request recipients. /// /// !Recipients /// - USBGenericRequest_DEVICE /// - USBGenericRequest_INTERFACE /// - USBGenericRequest_ENDPOINT /// - USBGenericRequest_OTHER /// Recipient is the whole device. #define USBGenericRequest_DEVICE 0 /// Recipient is an interface. #define USBGenericRequest_INTERFACE 1 /// Recipient is an endpoint. #define USBGenericRequest_ENDPOINT 2 /// Recipient is another entity. #define USBGenericRequest_OTHER 3 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Request Types" /// /// This page lists codes of USB request types. /// /// !Types /// - USBGenericRequest_STANDARD /// - USBGenericRequest_CLASS /// - USBGenericRequest_VENDOR /// Request is standard. #define USBGenericRequest_STANDARD 0 /// Request is class-specific. #define USBGenericRequest_CLASS 1 /// Request is vendor-specific. #define USBGenericRequest_VENDOR 2 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB Request Directions" /// /// This page lists codes of USB request directions. /// /// !Directions /// - USBGenericRequest_IN /// - USBGenericRequest_OUT /// Transfer occurs from device to the host. #define USBGenericRequest_OUT 0 /// Transfer occurs from the host to the device. #define USBGenericRequest_IN 1 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Generic USB SETUP request sent over Control endpoints. //------------------------------------------------------------------------------ typedef struct { /// Type of request /// \sa "USB Request Recipients" /// \sa "USB Request Types" /// \sa "USB Request Directions" unsigned char bmRequestType:8; /// Request code /// \sa "USB Request Codes" unsigned char bRequest:8; /// Request-specific value parameter. unsigned short wValue:16; /// Request-specific index parameter. unsigned short wIndex:16; /// Expected length (in bytes) of the data phase. unsigned short wLength:16; } USBGenericRequest; //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned char USBGenericRequest_GetType( const USBGenericRequest *request); extern unsigned char USBGenericRequest_GetRequest( const USBGenericRequest *request); extern unsigned short USBGenericRequest_GetValue( const USBGenericRequest *request); extern unsigned short USBGenericRequest_GetIndex( const USBGenericRequest *request); extern unsigned short USBGenericRequest_GetLength( const USBGenericRequest *request); extern unsigned char USBGenericRequest_GetEndpointNumber( const USBGenericRequest *request); extern unsigned char USBGenericRequest_GetRecipient( const USBGenericRequest *request); extern unsigned char USBGenericRequest_GetDirection( const USBGenericRequest *request); #endif //#ifndef USBGENERICREQUEST_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGetDescriptorRequest.c000066400000000000000000000072231207233610700313010ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBGetDescriptorRequest implementation About: Purpose Implementation of the USBGetDescriptorRequest class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBGetDescriptorRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Returns the type of the descriptor requested by the host given the /// corresponding GET_DESCRIPTOR request. /// \param request Pointer to a USBGenericDescriptor instance. /// \return Type of the requested descriptor. //------------------------------------------------------------------------------ unsigned char USBGetDescriptorRequest_GetDescriptorType( const USBGenericRequest *request) { // Requested descriptor type is in the high-byte of the wValue field return (USBGenericRequest_GetValue(request) >> 8) & 0xFF; } //------------------------------------------------------------------------------ /// Returns the index of the requested descriptor, given the corresponding /// GET_DESCRIPTOR request. /// \param request Pointer to a USBGenericDescriptor instance. /// \return Index of the requested descriptor. //------------------------------------------------------------------------------ unsigned char USBGetDescriptorRequest_GetDescriptorIndex( const USBGenericRequest *request) { // Requested descriptor index if in the low byte of the wValue field return USBGenericRequest_GetValue(request) & 0xFF; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGetDescriptorRequest.h000066400000000000000000000057631207233610700313150ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of the USBGetDescriptorRequest class. !!!Usage - After a GET_DESCRIPTOR request has been received, retrive the useful values with following functions: - USBGetDescriptorRequest_GetDescriptorType: the descriptor type - USBGetDescriptorRequest_GetDescriptorIndex: the index of the requested descriptor */ #ifndef USBGETDESCRIPTORREQUEST_H #define USBGETDESCRIPTORREQUEST_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBGenericRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned char USBGetDescriptorRequest_GetDescriptorType( const USBGenericRequest *request); extern unsigned char USBGetDescriptorRequest_GetDescriptorIndex( const USBGenericRequest *request); #endif //#ifndef USBGETDESCRIPTORREQUEST_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceDescriptor.h000066400000000000000000000072741207233610700311240ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for manipulating USB interface descriptors. !!!Usage - Declare USBInterfaceDescriptor instance as a part of the configuration descriptors of a USB device. */ #ifndef USBINTERFACEDESCRIPTOR_H #define USBINTERFACEDESCRIPTOR_H //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ #ifdef __ICCARM__ // IAR #pragma pack(1) // IAR #define __attribute__(...) // IAR #endif // IAR //------------------------------------------------------------------------------ /// USB standard interface descriptor structure. //------------------------------------------------------------------------------ typedef struct { /// Size of the descriptor in bytes. unsigned char bLength; /// Descriptor type (USBGenericDescriptor_INTERFACE). unsigned char bDescriptorType; /// Number of the interface in its configuration. unsigned char bInterfaceNumber; /// Value to select this alternate interface setting. unsigned char bAlternateSetting; /// Number of endpoints used by the inteface (excluding endpoint 0). unsigned char bNumEndpoints; /// Interface class code. unsigned char bInterfaceClass; /// Interface subclass code. unsigned char bInterfaceSubClass; /// Interface protocol code. unsigned char bInterfaceProtocol; /// Index of the interface string descriptor. unsigned char iInterface; } __attribute__ ((packed)) USBInterfaceDescriptor; // GCC #ifdef __ICCARM__ // IAR #pragma pack() // IAR #endif // IAR #endif //#ifndef USBINTERFACEDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceRequest.c000066400000000000000000000066641207233610700304330ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBInterfaceRequest About: Purpose Implementation of USBInterfaceRequest class methods. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBInterfaceRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Indicates which interface is targetted by a GET_INTERFACE or /// SET_INTERFACE request. /// \param request Pointer to a USBGenericRequest instance. /// \return Interface number. //------------------------------------------------------------------------------ unsigned char USBInterfaceRequest_GetInterface(const USBGenericRequest *request) { return (USBGenericRequest_GetIndex(request) & 0xFF); } //------------------------------------------------------------------------------ /// Indicates the new alternate setting that the interface targetted by a /// SET_INTERFACE request should use. /// \param request Pointer to a USBGenericRequest instance. /// \return New active setting for the interface. //------------------------------------------------------------------------------ unsigned char USBInterfaceRequest_GetAlternateSetting( const USBGenericRequest *request) { return (USBGenericRequest_GetValue(request) & 0xFF); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceRequest.h000066400000000000000000000060631207233610700304310ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definitions for manipulating SET_INTERFACE and GET_INTERFACE request. !!!Usage -# After a SET_INTERFACE request has been received, retrieve the target interface using USBInterfaceRequest_GetInterface and its new alternate setting with USBInterfaceRequest_GetAlternateSetting. -# After a GET_INTERFACE request has been received, retrieve the target interface using USBInterfaceRequest_GetInterface. */ #ifndef USBINTERFACEREQUEST_H #define USBINTERFACEREQUEST_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBGenericRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned char USBInterfaceRequest_GetInterface( const USBGenericRequest *request); extern unsigned char USBInterfaceRequest_GetAlternateSetting( const USBGenericRequest *request); #endif //#ifndef USBINTERFACEREQUEST_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetAddressRequest.c000066400000000000000000000056341207233610700305700ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBSetAddressRequest implementation About: Purpose Implementation of the USBSetAddressRequest class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBSetAddressRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Returns the address that the device must take in response to a /// SET_ADDRESS request. /// \param request Pointer to a USBGenericRequest instance. /// \return New device address. //------------------------------------------------------------------------------ unsigned char USBSetAddressRequest_GetAddress(const USBGenericRequest *request) { return USBGenericRequest_GetValue(request) & 0x7F; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetAddressRequest.h000066400000000000000000000053431207233610700305720ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for manipulating SET_ADDRESS USB requests. !!!Usage - After a SET_ADDRESS request has been received, retrive the new address value with USBSetAddressRequest_GetAddress. */ #ifndef USBSETADDRESSREQUEST_H #define USBSETADDRESSREQUEST_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBGenericRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned char USBSetAddressRequest_GetAddress( const USBGenericRequest *request); #endif //#ifndef USBSETADDRESSREQUEST_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetConfigurationRequest.c000066400000000000000000000057451207233610700320150ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: USBSetConfigurationRequest implementation About: Purpose Implementation of the USBSetConfigurationRequest class. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBSetConfigurationRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Returns the number of the configuration that should be set in response /// to the given SET_CONFIGURATION request. /// \param request Pointer to a USBGenericRequest instance. /// \return Number of the requested configuration. //------------------------------------------------------------------------------ unsigned char USBSetConfigurationRequest_GetConfiguration( const USBGenericRequest *request) { return USBGenericRequest_GetValue(request); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetConfigurationRequest.h000066400000000000000000000054231207233610700320130ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for the Set Configuration request. !!!Usage - After a SET_CONFIGURATION request has been received, retrive the new configuration value with USBSetConfigurationRequest_GetConfiguration. */ #ifndef USBSETCONFIGURATIONREQUEST_H #define USBSETCONFIGURATIONREQUEST_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBGenericRequest.h" //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern unsigned char USBSetConfigurationRequest_GetConfiguration( const USBGenericRequest *request); #endif //#ifndef USBSETCONFIGURATIONREQUEST_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBStringDescriptor.h000066400000000000000000000070111207233610700304570ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !!!Purpose /// /// Definition of a class for manipulating String descriptors. //------------------------------------------------------------------------------ #ifndef USBSTRINGDESCRIPTOR_H #define USBSTRINGDESCRIPTOR_H //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB String Descriptor definitions" /// /// This page lists the codes and macros for USB string descriptor definition. /// /// !Language IDs /// - USBStringDescriptor_ENGLISH_US /// /// !String Descriptor Length /// - USBStringDescriptor_LENGTH /// /// !ASCII to UNICODE convertion /// - USBStringDescriptor_UNICODE /// Language ID for US english. #define USBStringDescriptor_ENGLISH_US 0x09, 0x04 /// Calculates the length of a string descriptor given the number of ascii /// characters/language IDs in it. /// \param length The ascii format string length. /// \return The actual data length in bytes. #define USBStringDescriptor_LENGTH(length) ((length) * 2 + 2) /// Converts an ascii character to its unicode representation. /// \param ascii The ASCII character to convert /// \return A 2-byte-array for the UNICODE based on given ASCII #define USBStringDescriptor_UNICODE(ascii) (ascii), 0 //------------------------------------------------------------------------------ #endif //#ifndef USBSTRINGDESCRIPTOR_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/000077500000000000000000000000001207233610700234475ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/000077500000000000000000000000001207233610700254555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriver.c000066400000000000000000000312451207233610700306370ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /* Title: CDCDSerialDriver implementation About: Purpose Implementation of the CDCDSerialDriver class methods. */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "CDCDSerialDriver.h" #include "CDCDSerialDriverDescriptors.h" #include #include #include #include #include #include //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// USB driver for a CDC class implementing a virtual COM serial connection. //------------------------------------------------------------------------------ typedef struct { /// Standard USBDDriver instance. USBDDriver usbdDriver; /// Current line coding (baudrate, parity, stop bits). CDCLineCoding lineCoding; /// Indicates if the RS232 carrier is active. unsigned char isCarrierActivated; /// Current serial port states unsigned short serialState; } CDCDSerialDriver; //------------------------------------------------------------------------------ // Internal variables //------------------------------------------------------------------------------ /// Static instance of the CDC serial driver. static CDCDSerialDriver cdcdSerialDriver; //------------------------------------------------------------------------------ // Internal functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Callback function which should be invoked after the data of a /// SetLineCoding request has been retrieved. Sends a zero-length packet /// to the host for acknowledging the request. //------------------------------------------------------------------------------ static void CDCDSerialDriver_SetLineCodingCallback() { USBD_Write(0, 0, 0, 0, 0); } //------------------------------------------------------------------------------ /// Receives new line coding information from the USB host. //------------------------------------------------------------------------------ static void CDCDSerialDriver_SetLineCoding() { TRACE_INFO_WP("sLineCoding "); USBD_Read(0, (void *) &(cdcdSerialDriver.lineCoding), sizeof(CDCLineCoding), (TransferCallback) CDCDSerialDriver_SetLineCodingCallback, 0); } //------------------------------------------------------------------------------ /// Sends the current line coding information to the host through Control /// endpoint 0. //------------------------------------------------------------------------------ static void CDCDSerialDriver_GetLineCoding() { TRACE_INFO_WP("gLineCoding "); USBD_Write(0, (void *) &(cdcdSerialDriver.lineCoding), sizeof(CDCLineCoding), 0, 0); } //------------------------------------------------------------------------------ /// Changes the state of the serial driver according to the information /// sent by the host via a SetControlLineState request, and acknowledges /// the request with a zero-length packet. //------------------------------------------------------------------------------ static void CDCDSerialDriver_SetControlLineState(unsigned char activateCarrier, unsigned char isDTEPresent) { TRACE_INFO_WP( "sControlLineState(%d, %d) ", activateCarrier, isDTEPresent); cdcdSerialDriver.isCarrierActivated = activateCarrier; USBD_Write(0, 0, 0, 0, 0); } //------------------------------------------------------------------------------ // Optional RequestReceived() callback re-implementation //------------------------------------------------------------------------------ #if !defined(NOAUTOCALLBACK) //------------------------------------------------------------------------------ /// Re-implemented callback, invoked when a new USB Request is received. //------------------------------------------------------------------------------ void USBDCallbacks_RequestReceived(const USBGenericRequest *request) { CDCDSerialDriver_RequestHandler(request); } #endif //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Initializes the USB Device CDC serial driver & USBD Driver. //------------------------------------------------------------------------------ void CDCDSerialDriver_Initialize() { TRACE_INFO("CDCDSerialDriver_Initialize\n\r"); // Initialize Abstract Control Model attributes CDCLineCoding_Initialize(&(cdcdSerialDriver.lineCoding), 115200, CDCLineCoding_ONESTOPBIT, CDCLineCoding_NOPARITY, 8); cdcdSerialDriver.isCarrierActivated = 0; cdcdSerialDriver.serialState = 0; // Initialize the standard driver USBDDriver_Initialize(&(cdcdSerialDriver.usbdDriver), &cdcdSerialDriverDescriptors, 0); // Multiple settings for interfaces not supported // Initialize the USB driver USBD_Init(); } //------------------------------------------------------------------------------ /// Handles CDC-specific SETUP requests. Should be called from a /// re-implementation of USBDCallbacks_RequestReceived() method. /// \param Pointer to a USBGenericRequest instance. //------------------------------------------------------------------------------ void CDCDSerialDriver_RequestHandler(const USBGenericRequest *request) { TRACE_INFO_WP("NewReq "); // Handle the request switch (USBGenericRequest_GetRequest(request)) { case CDCGenericRequest_SETLINECODING: CDCDSerialDriver_SetLineCoding(); break; case CDCGenericRequest_GETLINECODING: CDCDSerialDriver_GetLineCoding(); break; case CDCGenericRequest_SETCONTROLLINESTATE: CDCDSerialDriver_SetControlLineState( CDCSetControlLineStateRequest_ActivateCarrier(request), CDCSetControlLineStateRequest_IsDtePresent(request)); break; default: USBDDriver_RequestHandler(&(cdcdSerialDriver.usbdDriver), request); break; } } //------------------------------------------------------------------------------ /// Receives data from the host through the virtual COM port created by /// the CDC device serial driver. This function behaves like USBD_Read. /// \param data Pointer to the data buffer to put received data. /// \param size Size of the data buffer in bytes. /// \param callback Optional callback function to invoke when the transfer /// finishes. /// \param argument Optional argument to the callback function. /// \return USBD_STATUS_SUCCESS if the read operation has been started normally; /// otherwise, the corresponding error code. //------------------------------------------------------------------------------ unsigned char CDCDSerialDriver_Read(void *data, unsigned int size, TransferCallback callback, void *argument) { return USBD_Read(CDCDSerialDriverDescriptors_DATAOUT, data, size, callback, argument); } //------------------------------------------------------------------------------ /// Sends a data buffer through the virtual COM port created by the CDC /// device serial driver. This function behaves exactly like USBD_Write. /// \param data Pointer to the data buffer to send. /// \param size Size of the data buffer in bytes. /// \param callback Optional callback function to invoke when the transfer /// finishes. /// \param argument Optional argument to the callback function. /// \return USBD_STATUS_SUCCESS if the read operation has been started normally; /// otherwise, the corresponding error code. //------------------------------------------------------------------------------ unsigned char CDCDSerialDriver_Write(void *data, unsigned int size, TransferCallback callback, void *argument) { return USBD_Write(CDCDSerialDriverDescriptors_DATAIN, data, size, callback, argument); } //------------------------------------------------------------------------------ /// Returns the current status of the RS-232 line. //------------------------------------------------------------------------------ unsigned short CDCDSerialDriver_GetSerialState() { return cdcdSerialDriver.serialState; } //------------------------------------------------------------------------------ /// Sets the current serial state of the device to the given value. /// \param serialState New device state. //------------------------------------------------------------------------------ void CDCDSerialDriver_SetSerialState(unsigned short serialState) { ASSERT((serialState & 0xFF80) == 0, "CDCDSerialDriver_SetSerialState: Bits D7-D15 are reserved\n\r"); // If new state is different from previous one, send a notification to the // host if (cdcdSerialDriver.serialState != serialState) { cdcdSerialDriver.serialState = serialState; USBD_Write(CDCDSerialDriverDescriptors_NOTIFICATION, &(cdcdSerialDriver.serialState), 2, 0, 0); // Reset one-time flags cdcdSerialDriver.serialState &= ~(CDCDSerialDriver_STATE_OVERRUN | CDCDSerialDriver_STATE_PARITY | CDCDSerialDriver_STATE_FRAMING | CDCDSerialDriver_STATE_RINGSIGNAL | CDCDSerialDriver_STATE_BREAK); } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriver.h000066400000000000000000000120171207233610700306400ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for implementing a USB device CDC serial driver. !!!Usage -# Re-implement the USBDCallbacks_RequestReceived method to pass received requests to CDCDSerialDriver_RequestHandler. *This is automatically done unless the NOAUTOCALLBACK symbol is defined*. -# Initialize the CDC serial and USB drivers using CDCDSerialDriver_Initialize. -# Logically connect the device to the host using USBD_Connect. -# Send serial data to the USB host using CDCDSerialDriver_Write. -# Receive serial data from the USB host using CDCDSerialDriver_Read. */ #ifndef CDCDSERIALDRIVER_H #define CDCDSERIALDRIVER_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include #include //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Serial Port States" /// This page lists the bit map for CDC Serial Port States. /// /// !BitMaps /// - CDCDSerialDriver_STATE_RXDRIVER /// - CDCDSerialDriver_STATE_TXCARRIER /// - CDCDSerialDriver_STATE_BREAK /// - CDCDSerialDriver_STATE_RINGSIGNAL /// - CDCDSerialDriver_STATE_FRAMING /// - CDCDSerialDriver_STATE_PARITY /// - CDCDSerialDriver_STATE_OVERRUN /// Indicates the receiver carrier signal is present. #define CDCDSerialDriver_STATE_RXDRIVER (1 << 0) /// Indicates the transmission carrier signal is present. #define CDCDSerialDriver_STATE_TXCARRIER (1 << 1) /// Indicates a break has been detected. #define CDCDSerialDriver_STATE_BREAK (1 << 2) /// Indicates a ring signal has been detected. #define CDCDSerialDriver_STATE_RINGSIGNAL (1 << 3) /// Indicates a framing error has occured. #define CDCDSerialDriver_STATE_FRAMING (1 << 4) /// Indicates a parity error has occured. #define CDCDSerialDriver_STATE_PARITY (1 << 5) /// Indicates a data overrun error has occured. #define CDCDSerialDriver_STATE_OVERRUN (1 << 6) //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern void CDCDSerialDriver_Initialize(); extern void CDCDSerialDriver_RequestHandler(const USBGenericRequest *request); extern unsigned char CDCDSerialDriver_Write( void *data, unsigned int size, TransferCallback callback, void *argument); extern unsigned char CDCDSerialDriver_Read( void *data, unsigned int size, TransferCallback callback, void *argument); extern unsigned short CDCDSerialDriver_GetSerialState(); extern void CDCDSerialDriver_SetSerialState(unsigned short serialState); #endif //#ifndef CDCSERIALDRIVER_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriverDescriptors.c000066400000000000000000000645671207233610700330760ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "CDCDSerialDriverDescriptors.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Serial Device IDs" /// This page lists the IDs used in the CDC Serial Device Descriptor. /// /// !IDs /// - CDCDSerialDriverDescriptors_PRODUCTID /// - CDCDSerialDriverDescriptors_VENDORID /// - CDCDSerialDriverDescriptors_RELEASE /// Device product ID. #define CDCDSerialDriverDescriptors_PRODUCTID 0x6124 //#define CDCDSerialDriverDescriptors_PRODUCTID 0x6119 /// Device vendor ID (Atmel). #define CDCDSerialDriverDescriptors_VENDORID 0x03EB /// Device release number. #define CDCDSerialDriverDescriptors_RELEASE 0x0100 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Macros //------------------------------------------------------------------------------ /// Returns the minimum between two values. #define MIN(a, b) ((a < b) ? a : b) //------------------------------------------------------------------------------ // Internal structures //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Configuration descriptor list for a device implementing a CDC serial driver. //------------------------------------------------------------------------------ typedef struct { /// Standard configuration descriptor. USBConfigurationDescriptor config; #if defined(BOARD_USB_OTGHS) // OTG descriptor USBOtgDescriptor otgDescriptor; #endif /// Communication interface descriptor. USBInterfaceDescriptor communication; /// CDC header functional descriptor. CDCHeaderDescriptor header; /// CDC call management functional descriptor. CDCCallManagementDescriptor callManagement; /// CDC abstract control management functional descriptor. CDCAbstractControlManagementDescriptor abstractControlManagement; /// CDC union functional descriptor (with one slave interface). CDCUnionDescriptor union1; /// Notification endpoint descriptor. USBEndpointDescriptor notification; /// Data interface descriptor. USBInterfaceDescriptor data; /// Data OUT endpoint descriptor. USBEndpointDescriptor dataOut; /// Data IN endpoint descriptor. USBEndpointDescriptor dataIn; } __attribute__ ((packed)) CDCDSerialDriverConfigurationDescriptors; //------------------------------------------------------------------------------ // Exported variables //------------------------------------------------------------------------------ /// Standard USB device descriptor for the CDC serial driver const USBDeviceDescriptor deviceDescriptor = { sizeof(USBDeviceDescriptor), USBGenericDescriptor_DEVICE, USBDeviceDescriptor_USB2_00, CDCDeviceDescriptor_CLASS, CDCDeviceDescriptor_SUBCLASS, CDCDeviceDescriptor_PROTOCOL, BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0), CDCDSerialDriverDescriptors_VENDORID, CDCDSerialDriverDescriptors_PRODUCTID, CDCDSerialDriverDescriptors_RELEASE, 0, // No string descriptor for manufacturer 1, // Index of product string descriptor is #1 0, // No string descriptor for serial number 1 // Device has 1 possible configuration }; #if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS) /// USB device qualifier descriptor. const USBDeviceQualifierDescriptor qualifierDescriptor = { sizeof(USBDeviceQualifierDescriptor), USBGenericDescriptor_DEVICEQUALIFIER, USBDeviceDescriptor_USB2_00, CDCDeviceDescriptor_CLASS, CDCDeviceDescriptor_SUBCLASS, CDCDeviceDescriptor_PROTOCOL, BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0), 1, // Device has one possible configuration 0 // Reserved }; #endif /// Standard USB configuration descriptor for the CDC serial driver const CDCDSerialDriverConfigurationDescriptors configurationDescriptors = { // Standard configuration descriptor { sizeof(USBConfigurationDescriptor), USBGenericDescriptor_CONFIGURATION, sizeof(CDCDSerialDriverConfigurationDescriptors), 2, // There are two interfaces in this configuration 1, // This is configuration #1 0, // No string descriptor for this configuration BOARD_USB_BMATTRIBUTES, USBConfigurationDescriptor_POWER(100) }, #if defined(BOARD_USB_OTGHS) // OTG descriptor { sizeof(USBOtgDescriptor), USBGenericDescriptor_OTG, USBOTGDescriptor_HNP_SRP }, #endif // Communication class interface standard descriptor { sizeof(USBInterfaceDescriptor), USBGenericDescriptor_INTERFACE, 0, // This is interface #0 0, // This is alternate setting #0 for this interface 1, // This interface uses 1 endpoint CDCCommunicationInterfaceDescriptor_CLASS, CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL, CDCCommunicationInterfaceDescriptor_NOPROTOCOL, 0 // No string descriptor for this interface }, // Class-specific header functional descriptor { sizeof(CDCHeaderDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_HEADER, CDCGenericDescriptor_CDC1_10 }, // Class-specific call management functional descriptor { sizeof(CDCCallManagementDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_CALLMANAGEMENT, CDCCallManagementDescriptor_SELFCALLMANAGEMENT, 0 // No associated data interface }, // Class-specific abstract control management functional descriptor { sizeof(CDCAbstractControlManagementDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT, CDCAbstractControlManagementDescriptor_LINE }, // Class-specific union functional descriptor with one slave interface { sizeof(CDCUnionDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_UNION, 0, // Number of master interface is #0 1 // First slave interface is #1 }, // Notification endpoint standard descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN, CDCDSerialDriverDescriptors_NOTIFICATION), USBEndpointDescriptor_INTERRUPT, MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION), USBEndpointDescriptor_MAXINTERRUPTSIZE_FS), 10 // Endpoint is polled every 10ms }, // Data class interface standard descriptor { sizeof(USBInterfaceDescriptor), USBGenericDescriptor_INTERFACE, 1, // This is interface #1 0, // This is alternate setting #0 for this interface 2, // This interface uses 2 endpoints CDCDataInterfaceDescriptor_CLASS, CDCDataInterfaceDescriptor_SUBCLASS, CDCDataInterfaceDescriptor_NOPROTOCOL, 0 // No string descriptor for this interface }, // Bulk-OUT endpoint standard descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT, CDCDSerialDriverDescriptors_DATAOUT), USBEndpointDescriptor_BULK, 64, // MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT), // USBEndpointDescriptor_MAXBULKSIZE_FS), 0 // Must be 0 for full-speed bulk endpoints }, // Bulk-IN endpoint descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN, CDCDSerialDriverDescriptors_DATAIN), USBEndpointDescriptor_BULK, 64, // MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN), // USBEndpointDescriptor_MAXBULKSIZE_FS), 0 // Must be 0 for full-speed bulk endpoints }, }; /// Language ID string descriptor const unsigned char languageIdStringDescriptor[] = { USBStringDescriptor_LENGTH(1), USBGenericDescriptor_STRING, USBStringDescriptor_ENGLISH_US }; #if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS) /// Other-speed configuration descriptor (when in full-speed). const CDCDSerialDriverConfigurationDescriptors otherSpeedDescriptorsFS = { // Standard configuration descriptor { sizeof(USBConfigurationDescriptor), USBGenericDescriptor_OTHERSPEEDCONFIGURATION, sizeof(CDCDSerialDriverConfigurationDescriptors), 2, // There are two interfaces in this configuration 1, // This is configuration #1 0, // No string descriptor for this configuration BOARD_USB_BMATTRIBUTES, USBConfigurationDescriptor_POWER(100) }, #if defined(BOARD_USB_OTGHS) // OTG descriptor { sizeof(USBOtgDescriptor), USBGenericDescriptor_OTG, USBOTGDescriptor_HNP_SRP }, #endif // Communication class interface standard descriptor { sizeof(USBInterfaceDescriptor), USBGenericDescriptor_INTERFACE, 0, // This is interface #0 0, // This is alternate setting #0 for this interface 1, // This interface uses 1 endpoint CDCCommunicationInterfaceDescriptor_CLASS, CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL, CDCCommunicationInterfaceDescriptor_NOPROTOCOL, 0 // No string descriptor for this interface }, // Class-specific header functional descriptor { sizeof(CDCHeaderDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_HEADER, CDCGenericDescriptor_CDC1_10 }, // Class-specific call management functional descriptor { sizeof(CDCCallManagementDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_CALLMANAGEMENT, CDCCallManagementDescriptor_SELFCALLMANAGEMENT, 0 // No associated data interface }, // Class-specific abstract control management functional descriptor { sizeof(CDCAbstractControlManagementDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT, CDCAbstractControlManagementDescriptor_LINE }, // Class-specific union functional descriptor with one slave interface { sizeof(CDCUnionDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_UNION, 0, // Number of master interface is #0 1 // First slave interface is #1 }, // Notification endpoint standard descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN, CDCDSerialDriverDescriptors_NOTIFICATION), USBEndpointDescriptor_INTERRUPT, MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION), USBEndpointDescriptor_MAXINTERRUPTSIZE_HS), 10 // Endpoint is polled every 10ms }, // Data class interface standard descriptor { sizeof(USBInterfaceDescriptor), USBGenericDescriptor_INTERFACE, 1, // This is interface #1 0, // This is alternate setting #0 for this interface 2, // This interface uses 2 endpoints CDCDataInterfaceDescriptor_CLASS, CDCDataInterfaceDescriptor_SUBCLASS, CDCDataInterfaceDescriptor_NOPROTOCOL, 0 // No string descriptor for this interface }, // Bulk-OUT endpoint standard descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT, CDCDSerialDriverDescriptors_DATAOUT), USBEndpointDescriptor_BULK, 512, // MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT), // USBEndpointDescriptor_MAXBULKSIZE_HS), 0 // Must be 0 for full-speed bulk endpoints }, // Bulk-IN endpoint descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN, CDCDSerialDriverDescriptors_DATAIN), USBEndpointDescriptor_BULK, 512, // MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN), // USBEndpointDescriptor_MAXBULKSIZE_HS), 0 // Must be 0 for full-speed bulk endpoints }, }; /// Configuration descriptor (when in high-speed). const CDCDSerialDriverConfigurationDescriptors configurationDescriptorsHS = { // Standard configuration descriptor { sizeof(USBConfigurationDescriptor), USBGenericDescriptor_CONFIGURATION, sizeof(CDCDSerialDriverConfigurationDescriptors), 2, // There are two interfaces in this configuration 1, // This is configuration #1 0, // No string descriptor for this configuration BOARD_USB_BMATTRIBUTES, USBConfigurationDescriptor_POWER(100) }, #if defined(BOARD_USB_OTGHS) // OTG descriptor { sizeof(USBOtgDescriptor), USBGenericDescriptor_OTG, USBOTGDescriptor_HNP_SRP }, #endif // Communication class interface standard descriptor { sizeof(USBInterfaceDescriptor), USBGenericDescriptor_INTERFACE, 0, // This is interface #0 0, // This is alternate setting #0 for this interface 1, // This interface uses 1 endpoint CDCCommunicationInterfaceDescriptor_CLASS, CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL, CDCCommunicationInterfaceDescriptor_NOPROTOCOL, 0 // No string descriptor for this interface }, // Class-specific header functional descriptor { sizeof(CDCHeaderDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_HEADER, CDCGenericDescriptor_CDC1_10 }, // Class-specific call management functional descriptor { sizeof(CDCCallManagementDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_CALLMANAGEMENT, CDCCallManagementDescriptor_SELFCALLMANAGEMENT, 0 // No associated data interface }, // Class-specific abstract control management functional descriptor { sizeof(CDCAbstractControlManagementDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT, CDCAbstractControlManagementDescriptor_LINE }, // Class-specific union functional descriptor with one slave interface { sizeof(CDCUnionDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_UNION, 0, // Number of master interface is #0 1 // First slave interface is #1 }, // Notification endpoint standard descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN, CDCDSerialDriverDescriptors_NOTIFICATION), USBEndpointDescriptor_INTERRUPT, MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION), USBEndpointDescriptor_MAXINTERRUPTSIZE_HS), 10 // Endpoint is polled every 10ms }, // Data class interface standard descriptor { sizeof(USBInterfaceDescriptor), USBGenericDescriptor_INTERFACE, 1, // This is interface #1 0, // This is alternate setting #0 for this interface 2, // This interface uses 2 endpoints CDCDataInterfaceDescriptor_CLASS, CDCDataInterfaceDescriptor_SUBCLASS, CDCDataInterfaceDescriptor_NOPROTOCOL, 0 // No string descriptor for this interface }, // Bulk-OUT endpoint standard descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT, CDCDSerialDriverDescriptors_DATAOUT), USBEndpointDescriptor_BULK, 512, // MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT), // USBEndpointDescriptor_MAXBULKSIZE_HS), 0 // Must be 0 for full-speed bulk endpoints }, // Bulk-IN endpoint descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN, CDCDSerialDriverDescriptors_DATAIN), USBEndpointDescriptor_BULK, 512, // MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN), // USBEndpointDescriptor_MAXBULKSIZE_HS), 0 // Must be 0 for full-speed bulk endpoints }, }; /// Other-speed configuration descriptor (when in high-speed). const CDCDSerialDriverConfigurationDescriptors otherSpeedDescriptorsHS = { // Standard configuration descriptor { sizeof(USBConfigurationDescriptor), USBGenericDescriptor_OTHERSPEEDCONFIGURATION, sizeof(CDCDSerialDriverConfigurationDescriptors), 2, // There are two interfaces in this configuration 1, // This is configuration #1 0, // No string descriptor for this configuration BOARD_USB_BMATTRIBUTES, USBConfigurationDescriptor_POWER(100) }, #if defined(BOARD_USB_OTGHS) // OTG descriptor { sizeof(USBOtgDescriptor), USBGenericDescriptor_OTG, USBOTGDescriptor_HNP_SRP }, #endif // Communication class interface standard descriptor { sizeof(USBInterfaceDescriptor), USBGenericDescriptor_INTERFACE, 0, // This is interface #0 0, // This is alternate setting #0 for this interface 1, // This interface uses 1 endpoint CDCCommunicationInterfaceDescriptor_CLASS, CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL, CDCCommunicationInterfaceDescriptor_NOPROTOCOL, 0 // No string descriptor for this interface }, // Class-specific header functional descriptor { sizeof(CDCHeaderDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_HEADER, CDCGenericDescriptor_CDC1_10 }, // Class-specific call management functional descriptor { sizeof(CDCCallManagementDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_CALLMANAGEMENT, CDCCallManagementDescriptor_SELFCALLMANAGEMENT, 0 // No associated data interface }, // Class-specific abstract control management functional descriptor { sizeof(CDCAbstractControlManagementDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT, CDCAbstractControlManagementDescriptor_LINE }, // Class-specific union functional descriptor with one slave interface { sizeof(CDCUnionDescriptor), CDCGenericDescriptor_INTERFACE, CDCGenericDescriptor_UNION, 0, // Number of master interface is #0 1 // First slave interface is #1 }, // Notification endpoint standard descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN, CDCDSerialDriverDescriptors_NOTIFICATION), USBEndpointDescriptor_INTERRUPT, MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION), USBEndpointDescriptor_MAXINTERRUPTSIZE_FS), 10 // Endpoint is polled every 10ms }, // Data class interface standard descriptor { sizeof(USBInterfaceDescriptor), USBGenericDescriptor_INTERFACE, 1, // This is interface #1 0, // This is alternate setting #0 for this interface 2, // This interface uses 2 endpoints CDCDataInterfaceDescriptor_CLASS, CDCDataInterfaceDescriptor_SUBCLASS, CDCDataInterfaceDescriptor_NOPROTOCOL, 0 // No string descriptor for this interface }, // Bulk-OUT endpoint standard descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT, CDCDSerialDriverDescriptors_DATAOUT), USBEndpointDescriptor_BULK, 64, // MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT), // USBEndpointDescriptor_MAXBULKSIZE_FS), 0 // Must be 0 for full-speed bulk endpoints }, // Bulk-IN endpoint descriptor { sizeof(USBEndpointDescriptor), USBGenericDescriptor_ENDPOINT, USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN, CDCDSerialDriverDescriptors_DATAIN), USBEndpointDescriptor_BULK, 64, // MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN), // USBEndpointDescriptor_MAXBULKSIZE_FS), 0 // Must be 0 for full-speed bulk endpoints }, }; #endif /// Product string descriptor const unsigned char productStringDescriptor[] = { USBStringDescriptor_LENGTH(13), USBGenericDescriptor_STRING, USBStringDescriptor_UNICODE('A'), USBStringDescriptor_UNICODE('T'), USBStringDescriptor_UNICODE('9'), USBStringDescriptor_UNICODE('1'), USBStringDescriptor_UNICODE('U'), USBStringDescriptor_UNICODE('S'), USBStringDescriptor_UNICODE('B'), USBStringDescriptor_UNICODE('S'), USBStringDescriptor_UNICODE('e'), USBStringDescriptor_UNICODE('r'), USBStringDescriptor_UNICODE('i'), USBStringDescriptor_UNICODE('a'), USBStringDescriptor_UNICODE('l') }; /// List of string descriptors used by the device const unsigned char *stringDescriptors[] = { languageIdStringDescriptor, productStringDescriptor, }; /// List of standard descriptors for the serial driver. USBDDriverDescriptors cdcdSerialDriverDescriptors = { &deviceDescriptor, (USBConfigurationDescriptor *) &(configurationDescriptors), #if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS) &qualifierDescriptor, (USBConfigurationDescriptor *) &(otherSpeedDescriptorsFS), &deviceDescriptor, (USBConfigurationDescriptor *) &(configurationDescriptorsHS), &qualifierDescriptor, (USBConfigurationDescriptor *) &(otherSpeedDescriptorsHS), #else 0, // No full-speed device qualifier descriptor 0, // No full-speed other speed configuration 0, // No high-speed device descriptor 0, // No high-speed configuration descriptor 0, // No high-speed device qualifier descriptor 0, // No high-speed other speed configuration descriptor #endif stringDescriptors, 2 // 2 string descriptors in list }; tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriverDescriptors.h000066400000000000000000000070041207233610700330620ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of the USB descriptors required by a CDC device serial driver. */ #ifndef CDCDSERIALDRIVERDESCRIPTORS_H #define CDCDSERIALDRIVERDESCRIPTORS_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "CDC Serial Endpoints" /// This page lists the endpoints used in CDC Serial Device. /// /// !Endpoints /// - CDCDSerialDriverDescriptors_DATAOUT /// - CDCDSerialDriverDescriptors_DATAIN /// - CDCDSerialDriverDescriptors_NOTIFICATION /// Data OUT endpoint number. #define CDCDSerialDriverDescriptors_DATAOUT 1 /// Data IN endpoint number. #define CDCDSerialDriverDescriptors_DATAIN 2 /// Notification endpoint number. #define CDCDSerialDriverDescriptors_NOTIFICATION 3 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Exported variables //------------------------------------------------------------------------------ /// List of descriptors for a CDC device serial driver. extern USBDDriverDescriptors cdcdSerialDriverDescriptors; #endif //#ifndef CDCDDRIVERDESCRIPTORS_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/drv/000077500000000000000000000000001207233610700262505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/drv/6119.inf000066400000000000000000000062301207233610700273470ustar00rootroot00000000000000; $Id: 6119.inf,v 1.1.2.1 2006/12/05 08:33:25 danielru Exp $ [Version] ; Version section Signature="$Chicago$" ; All Windows versions Class=Ports ; This is a serial port driver ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} ; Associated GUID Provider=%ATMEL% ; Driver is provided by ATMEL DriverVer=09/12/2006,1.1.1.5 ; Driver version 1.1.1.5 published on 23 February 2007 [DestinationDirs] ; DestinationDirs section DefaultDestDir=12 ; Default install directory is \drivers or \IOSubSys [Manufacturer] ; Manufacturer section %ATMEL%=AtmelMfg ; Only one manufacturer (ATMEL), models section is named ; AtmelMfg [AtmelMfg] ; Models section corresponding to ATMEL %USBtoSerialConverter%=USBtoSer.Install,USB\VID_03EB&PID_6119 ; Identifies a device with ATMEL Vendor ID (03EBh) and ; Product ID equal to 6119h. Corresponding Install section ; is named USBtoSer.Install [USBtoSer.Install] ; Install section include=mdmcpq.inf CopyFiles=FakeModemCopyFileSection AddReg=USBtoSer.AddReg ; Registry keys to add are listed in USBtoSer.AddReg [USBtoSer.AddReg] ; AddReg section HKR,,DevLoader,,*ntkern ; HKR,,NTMPDriver,,usbser.sys HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" [USBtoSer.Install.Services] ; Services section AddService=usbser,0x00000002,USBtoSer.AddService ; Assign usbser as the PnP driver for the device [USBtoSer.AddService] ; Service install section DisplayName=%USBSer% ; Name of the serial driver ServiceType=1 ; Service kernel driver StartType=3 ; Driver is started by the PnP manager ErrorControl=1 ; Warn about errors ServiceBinary=%12%\usbser.sys ; Driver filename [Strings] ; Strings section ATMEL="ATMEL Corp." ; String value for the ATMEL symbol USBtoSerialConverter="AT91 USB to Serial Converter" ; String value for the USBtoSerialConverter symbol USBSer="USB Serial Driver" ; String value for the USBSer symboltinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/000077500000000000000000000000001207233610700243775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD.h000066400000000000000000000163701207233610700253140ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !!!Purpose /// /// Collection of methods for using the USB device controller on AT91 /// microcontrollers. /// /// !!!Usage /// /// Please refer to the corresponding application note. /// - "AT91 USB device framework" /// - "USBD API" . "USBD API Methods" //------------------------------------------------------------------------------ #ifndef USBD_H #define USBD_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include #include //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB device API return values" /// /// This page lists the return values of the USB %device driver API /// /// !Return codes /// - USBD_STATUS_SUCCESS /// - USBD_STATUS_LOCKED /// - USBD_STATUS_ABORTED /// - USBD_STATUS_RESET /// Indicates the operation was successful. #define USBD_STATUS_SUCCESS 0 /// Endpoint/device is already busy. #define USBD_STATUS_LOCKED 1 /// Operation has been aborted. #define USBD_STATUS_ABORTED 2 /// Operation has been aborted because the device has been reset. #define USBD_STATUS_RESET 3 /// Operation failed because parameter error #define USBD_STATUS_INVALID_PARAMETER 4 /// Operation failed because HW not supported #define USBD_STATUS_HW_NOT_SUPPORTED 5 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB device states" /// /// This page lists the %device states of the USB %device driver. /// /// !States /// - USBD_STATE_SUSPENDED /// - USBD_STATE_ATTACHED /// - USBD_STATE_POWERED /// - USBD_STATE_DEFAULT /// - USBD_STATE_ADDRESS /// - USBD_STATE_CONFIGURED /// The device is currently suspended. #define USBD_STATE_SUSPENDED 0 /// USB cable is plugged into the device. #define USBD_STATE_ATTACHED 1 /// Host is providing +5V through the USB cable. #define USBD_STATE_POWERED 2 /// Device has been reset. #define USBD_STATE_DEFAULT 3 /// The device has been given an address on the bus. #define USBD_STATE_ADDRESS 4 /// A valid configuration has been selected. #define USBD_STATE_CONFIGURED 5 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "USB device LEDs" /// /// This page lists the LEDs used in the USB %device driver. /// /// !LEDs /// - USBD_LEDPOWER /// - USBD_LEDUSB /// - USBD_LEDOTHER /// LED for indicating that the device is powered. #define USBD_LEDPOWER 0 /// LED for indicating USB activity. #define USBD_LEDUSB 1 /// LED for custom usage. #define USBD_LEDOTHER 2 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Callback used by transfer functions (USBD_Read & USBD_Write) to notify /// that a transaction is complete. //------------------------------------------------------------------------------ typedef void (*TransferCallback)(void *pArg, unsigned char status, unsigned int transferred, unsigned int remaining); //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern void UDPD_IrqHandler(void); extern void USBD_Init(void); extern void USBD_ConfigureSpeed(unsigned char forceFS); extern void USBD_Connect(void); extern void USBD_Disconnect(void); extern char USBD_Write( unsigned char bEndpoint, const void *pData, unsigned int size, TransferCallback callback, void *pArg); extern char USBD_Read( unsigned char bEndpoint, void *pData, unsigned int dLength, TransferCallback fCallback, void *pArg); extern unsigned char USBD_Stall(unsigned char bEndpoint); extern void USBD_Halt(unsigned char bEndpoint); extern void USBD_Unhalt(unsigned char bEndpoint); extern void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor); extern unsigned char USBD_IsHalted(unsigned char bEndpoint); extern void USBD_RemoteWakeUp(void); extern void USBD_SetAddress(unsigned char address); extern void USBD_SetConfiguration(unsigned char cfgnum); extern unsigned char USBD_GetState(void); extern unsigned char USBD_IsHighSpeed(void); extern void USBD_Test(unsigned char bIndex); #endif //#ifndef USBD_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks.h000066400000000000000000000056311207233610700271120ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definitions of callbacks used by the USBD API to notify the user application of incoming events. These functions are declared as 'weak', so they can be re-implemented elsewhere in the application in a transparent way. */ #ifndef USBDCALLBACKS_H #define USBDCALLBACKS_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern void USBDCallbacks_Initialized(void); extern void USBDCallbacks_Reset(void); extern void USBDCallbacks_Suspended(void); extern void USBDCallbacks_Resumed(void); extern void USBDCallbacks_RequestReceived(const USBGenericRequest *request); #endif //#ifndef USBDCALLBACKS_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks_Initialized.c000066400000000000000000000063041207233610700314300ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBDCallbacks.h" #include "USBD.h" #include #include //------------------------------------------------------------------------------ // Exported function //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Invoked after the USB driver has been initialized. By default, configures /// the UDP/UDPHS interrupt. //------------------------------------------------------------------------------ void USBDCallbacks_Initialized(void) { #if defined(BOARD_USB_UDP) // Configure and enable the UDP interrupt IRQ_ConfigureIT(AT91C_ID_UDP, 0, UdphsIrqHandler);//, UDPD_IrqHandler); IRQ_EnableIT(AT91C_ID_UDP); #elif defined(BOARD_USB_UDPHS) // Configure and enable the UDPHS interrupt IRQ_ConfigureIT(AT91C_ID_UDPHS, 0, UdphsIrqHandler);//, UDPD_IrqHandler); IRQ_EnableIT(AT91C_ID_UDPHS); #elif defined(BOARD_USB_OTGHS) IRQ_ConfigureIT(AT91C_ID_OTGHS, 1, UdphsIrqHandler); IRQ_EnableIT(AT91C_ID_OTGHS); #else #error Unsupported controller. #endif } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks_Reset.c000066400000000000000000000050731207233610700302470ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBDCallbacks.h" //------------------------------------------------------------------------------ // Exported function //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Invoked when the USB driver is reset. Does nothing by default. //------------------------------------------------------------------------------ void USBDCallbacks_Reset(void) { // Does nothing } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriver.c000066400000000000000000000700351207233610700264610ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBDDriver.h" #include "USBDDriverCallbacks.h" #include "USBD.h" #include #include #include #include #include #include #include #include #include #include #include #include #include //------------------------------------------------------------------------------ // Local functions //------------------------------------------------------------------------------ #if defined(BOARD_USB_OTGHS) static unsigned char otg_features_supported = 0; #endif //------------------------------------------------------------------------------ /// Send a NULL packet //------------------------------------------------------------------------------ static void TerminateCtrlInWithNull(void *pArg, unsigned char status, unsigned int transferred, unsigned int remaining) { USBD_Write(0, // Endpoint #0 0, // No data buffer 0, // No data buffer (TransferCallback) 0, (void *) 0); } //------------------------------------------------------------------------------ /// Configures the device by setting it into the Configured state and /// initializing all endpoints. /// \param pDriver Pointer to a USBDDriver instance. /// \param cfgnum Configuration number to set. //------------------------------------------------------------------------------ static void SetConfiguration(USBDDriver *pDriver, unsigned char cfgnum) { USBEndpointDescriptor *pEndpoints[BOARD_USB_NUMENDPOINTS+1]; const USBConfigurationDescriptor *pConfiguration; // Use different descriptor depending on device speed if (USBD_IsHighSpeed()) { pConfiguration = pDriver->pDescriptors->pHsConfiguration; } else { pConfiguration = pDriver->pDescriptors->pFsConfiguration; } // Set & save the desired configuration USBD_SetConfiguration(cfgnum); pDriver->cfgnum = cfgnum; // If the configuration is not 0, configure endpoints if (cfgnum != 0) { int i; // Parse configuration to get endpoint descriptors USBConfigurationDescriptor_Parse(pConfiguration, 0, pEndpoints, 0); // Configure endpoints i = 0; while (pEndpoints[i] != 0) { USBD_ConfigureEndpoint(pEndpoints[i]); i++; } } // Should be done before send the ZLP USBDDriverCallbacks_ConfigurationChanged(cfgnum); // Acknowledge the request USBD_Write(0, // Endpoint #0 0, // No data buffer 0, // No data buffer (TransferCallback) 0, (void *) 0); } //------------------------------------------------------------------------------ /// Sends the current configuration number to the host. /// \param pDriver Pointer to a USBDDriver instance. //------------------------------------------------------------------------------ static void GetConfiguration(const USBDDriver *pDriver) { USBD_Write(0, &(pDriver->cfgnum), 1, 0, 0); } //------------------------------------------------------------------------------ /// Sends the current status of the device to the host. /// \param pDriver Pointer to a USBDDriver instance. //------------------------------------------------------------------------------ static void GetDeviceStatus(const USBDDriver *pDriver) { static unsigned short data; const USBConfigurationDescriptor *pConfiguration; data = 0; // Use different configuration depending on device speed if (USBD_IsHighSpeed()) { pConfiguration = pDriver->pDescriptors->pHsConfiguration; } else { pConfiguration = pDriver->pDescriptors->pFsConfiguration; } // Check current configuration for power mode (if device is configured) if (pDriver->cfgnum != 0) { if (USBConfigurationDescriptor_IsSelfPowered(pConfiguration)) { data |= 1; } } // Check if remote wake-up is enabled if (pDriver->isRemoteWakeUpEnabled) { data |= 2; } // Send the device status USBD_Write(0, &data, 2, 0, 0); } //------------------------------------------------------------------------------ /// Sends the current status of an endpoints to the USB host. /// \param bEndpoint Endpoint number. //------------------------------------------------------------------------------ static void GetEndpointStatus(unsigned char bEndpoint) { static unsigned short data; data = 0; // Check if the endpoint exists if (bEndpoint > BOARD_USB_NUMENDPOINTS) { USBD_Stall(0); } else { // Check if the endpoint if currently halted if (USBD_IsHalted(bEndpoint)) { data = 1; } // Send the endpoint status USBD_Write(0, &data, 2, 0, 0); } } //------------------------------------------------------------------------------ /// Sends the requested USB descriptor to the host if available, or STALLs the /// request. /// \param pDriver Pointer to a USBDDriver instance. /// \param type Type of the requested descriptor /// \param idx Index of the requested descriptor. /// \param length Maximum number of bytes to return. //------------------------------------------------------------------------------ static void GetDescriptor( const USBDDriver *pDriver, unsigned char type, unsigned char idx, unsigned int length) { const USBDeviceDescriptor *pDevice; const USBConfigurationDescriptor *pConfiguration; const USBDeviceQualifierDescriptor *pQualifier; const USBConfigurationDescriptor *pOtherSpeed; const USBGenericDescriptor **pStrings = (const USBGenericDescriptor **) pDriver->pDescriptors->pStrings; unsigned char numStrings = pDriver->pDescriptors->numStrings; const USBGenericDescriptor *pString; // Use different set of descriptors depending on device speed if (USBD_IsHighSpeed()) { TRACE_DEBUG("HS "); pDevice = pDriver->pDescriptors->pHsDevice; pConfiguration = pDriver->pDescriptors->pHsConfiguration; pQualifier = pDriver->pDescriptors->pHsQualifier; pOtherSpeed = pDriver->pDescriptors->pHsOtherSpeed; } else { TRACE_DEBUG("FS "); pDevice = pDriver->pDescriptors->pFsDevice; pConfiguration = pDriver->pDescriptors->pFsConfiguration; pQualifier = pDriver->pDescriptors->pFsQualifier; pOtherSpeed = pDriver->pDescriptors->pFsOtherSpeed; } // Check the descriptor type switch (type) { case USBGenericDescriptor_DEVICE: TRACE_INFO_WP("Dev "); // Adjust length and send descriptor if (length > USBGenericDescriptor_GetLength((USBGenericDescriptor *) pDevice)) { length = USBGenericDescriptor_GetLength((USBGenericDescriptor *) pDevice); } USBD_Write(0, pDevice, length, 0, 0); break; case USBGenericDescriptor_CONFIGURATION: TRACE_INFO_WP("Cfg "); // Adjust length and send descriptor if (length > USBConfigurationDescriptor_GetTotalLength(pConfiguration)) { length = USBConfigurationDescriptor_GetTotalLength(pConfiguration); } USBD_Write(0, pConfiguration, length, ((length % pDevice->bMaxPacketSize0) == 0) ? TerminateCtrlInWithNull : 0, 0); break; case USBGenericDescriptor_DEVICEQUALIFIER: TRACE_INFO_WP("Qua "); // Check if descriptor exists if (!pQualifier) { USBD_Stall(0); } else { // Adjust length and send descriptor if (length > USBGenericDescriptor_GetLength((USBGenericDescriptor *) pQualifier)) { length = USBGenericDescriptor_GetLength((USBGenericDescriptor *) pQualifier); } USBD_Write(0, pQualifier, length, 0, 0); } break; case USBGenericDescriptor_OTHERSPEEDCONFIGURATION: TRACE_INFO_WP("OSC "); // Check if descriptor exists if (!pOtherSpeed) { USBD_Stall(0); } else { // Adjust length and send descriptor if (length > USBConfigurationDescriptor_GetTotalLength(pOtherSpeed)) { length = USBConfigurationDescriptor_GetTotalLength(pOtherSpeed); } USBD_Write(0, pOtherSpeed, length, ((length % pDevice->bMaxPacketSize0) == 0) ? TerminateCtrlInWithNull : 0, 0); } break; case USBGenericDescriptor_STRING: TRACE_INFO_WP("Str%d ", idx); // Check if descriptor exists if (idx > numStrings) { USBD_Stall(0); } else { pString = pStrings[idx]; // Adjust length and send descriptor if (length > USBGenericDescriptor_GetLength(pString)) { length = USBGenericDescriptor_GetLength(pString); } USBD_Write(0, pString, length, ((length % pDevice->bMaxPacketSize0) == 0) ? TerminateCtrlInWithNull : 0, 0); } break; default: TRACE_WARNING( "USBDDriver_GetDescriptor: Unknown descriptor type (%d)\n\r", type); USBD_Stall(0); } } //------------------------------------------------------------------------------ /// Sets the active setting of the given interface if the configuration supports /// it; otherwise, the control pipe is STALLed. If the setting of an interface /// changes. /// \parma pDriver Pointer to a USBDDriver instance. /// \parma infnum Interface number. /// \parma setting New active setting for the interface. //------------------------------------------------------------------------------ static void SetInterface( USBDDriver *pDriver, unsigned char infnum, unsigned char setting) { // Make sure alternate settings are supported if (!pDriver->pInterfaces) { USBD_Stall(0); } else { // Change the current setting of the interface and trigger the callback // if necessary if (pDriver->pInterfaces[infnum] != setting) { pDriver->pInterfaces[infnum] = setting; USBDDriverCallbacks_InterfaceSettingChanged(infnum, setting); } // Acknowledge the request USBD_Write(0, 0, 0, 0, 0); } } //------------------------------------------------------------------------------ /// Sends the currently active setting of the given interface to the USB /// host. If alternate settings are not supported, this function STALLs the /// control pipe. /// \param pDriver Pointer to a USBDDriver instance. /// \param infnum Interface number. //------------------------------------------------------------------------------ static void GetInterface( const USBDDriver *pDriver, unsigned char infnum) { // Make sure alternate settings are supported, or STALL the control pipe if (!pDriver->pInterfaces) { USBD_Stall(0); } else { // Sends the current interface setting to the host USBD_Write(0, &(pDriver->pInterfaces[infnum]), 1, 0, 0); } } #if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS) //------------------------------------------------------------------------------ // Performs the selected test on the USB device (high-speed only). // \param test Test selector value. //------------------------------------------------------------------------------ static void USBDDriver_Test(unsigned char test) { TRACE_DEBUG("UDPHS_Test\n\r"); // the lower byte of wIndex must be zero // the most significant byte of wIndex is used to specify the specific test mode switch (test) { case USBFeatureRequest_TESTPACKET: //Test mode Test_Packet: //Upon command, a port must repetitively transmit the following test packet until //the exit action is taken. This enables the testing of rise and fall times, eye //patterns, jitter, and any other dynamic waveform specifications. //The test packet is made up by concatenating the following strings. //(Note: For J/K NRZI data, and for NRZ data, the bit on the left is the first one //transmitted. S indicates that a bit stuff occurs, which inserts an extra NRZI data bit. //* N is used to indicate N occurrences of a string of bits or symbols.) //A port in Test_Packet mode must send this packet repetitively. The inter-packet timing //must be no less than the minimum allowable inter-packet gap as defined in Section 7.1.18 and //no greater than 125 us. // Send ZLP USBD_Test(USBFeatureRequest_TESTSENDZLP); // Tst PACKET USBD_Test(USBFeatureRequest_TESTPACKET); while (1); //break; not reached case USBFeatureRequest_TESTJ: //Test mode Test_J: //Upon command, a ports transceiver must enter the high-speed J state and remain in that //state until the exit action is taken. This enables the testing of the high output drive //level on the D+ line. // Send ZLP USBD_Test(USBFeatureRequest_TESTSENDZLP); // Tst J USBD_Test(USBFeatureRequest_TESTJ); while (1); //break; not reached case USBFeatureRequest_TESTK: //Test mode Test_K: //Upon command, a ports transceiver must enter the high-speed K state and remain in //that state until the exit action is taken. This enables the testing of the high output drive //level on the D- line. // Send a ZLP USBD_Test(USBFeatureRequest_TESTSENDZLP); USBD_Test(USBFeatureRequest_TESTK); while (1); //break; not reached case USBFeatureRequest_TESTSE0NAK: //Test mode Test_SE0_NAK: //Upon command, a ports transceiver must enter the high-speed receive mode //and remain in that mode until the exit action is taken. This enables the testing //of output impedance, low level output voltage, and loading characteristics. //In addition, while in this mode, upstream facing ports (and only upstream facing ports) //must respond to any IN token packet with a NAK handshake (only if the packet CRC is //determined to be correct) within the normal allowed device response time. This enables testing of //the device squelch level circuitry and, additionally, provides a general purpose stimulus/response //test for basic functional testing. USBD_Test(USBFeatureRequest_TESTSE0NAK); // Send a ZLP USBD_Test(USBFeatureRequest_TESTSENDZLP); while (1); //break; not reached default: USBD_Stall( 0 ); break; } // The exit action is to power cycle the device. // The device must be disconnected from the host } #endif //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Initializes a USBDDriver instance with a list of descriptors. If /// interfaces can have multiple alternate settings, an array to store the /// current setting for each interface must be provided. /// \param pDriver Pointer to a USBDDriver instance. /// \param pDescriptors Pointer to a USBDDriverDescriptors instance. /// \param pInterfaces Pointer to an array for storing the current alternate /// setting of each interface (optional). //------------------------------------------------------------------------------ void USBDDriver_Initialize( USBDDriver *pDriver, const USBDDriverDescriptors *pDescriptors, unsigned char *pInterfaces) { pDriver->cfgnum = 0; #if (BOARD_USB_BMATTRIBUTES == USBConfigurationDescriptor_SELFPOWERED_RWAKEUP) \ || (BOARD_USB_BMATTRIBUTES == USBConfigurationDescriptor_BUSPOWERED_RWAKEUP) pDriver->isRemoteWakeUpEnabled = 1; #else pDriver->isRemoteWakeUpEnabled = 0; #endif pDriver->pDescriptors = pDescriptors; pDriver->pInterfaces = pInterfaces; // Initialize interfaces array if not null if (pInterfaces != 0) { memset(pInterfaces, sizeof(pInterfaces), 0); } } //------------------------------------------------------------------------------ /// Handles the given request if it is standard, otherwise STALLs it. /// \param pDriver Pointer to a USBDDriver instance. /// \param pRequest Pointer to a USBGenericRequest instance. //------------------------------------------------------------------------------ void USBDDriver_RequestHandler( USBDDriver *pDriver, const USBGenericRequest *pRequest) { unsigned char cfgnum; unsigned char infnum; unsigned char eptnum; unsigned char setting; unsigned char type; unsigned char idx; unsigned int length; unsigned int address; TRACE_INFO_WP("Std "); // Check request code switch (USBGenericRequest_GetRequest(pRequest)) { case USBGenericRequest_GETDESCRIPTOR: TRACE_INFO_WP("gDesc "); // Send the requested descriptor type = USBGetDescriptorRequest_GetDescriptorType(pRequest); idx = USBGetDescriptorRequest_GetDescriptorIndex(pRequest); length = USBGenericRequest_GetLength(pRequest); GetDescriptor(pDriver, type, idx, length); break; case USBGenericRequest_SETADDRESS: TRACE_INFO_WP("sAddr "); // Sends a zero-length packet and then set the device address address = USBSetAddressRequest_GetAddress(pRequest); USBD_Write(0, 0, 0, (TransferCallback) USBD_SetAddress, (void *) address); break; case USBGenericRequest_SETCONFIGURATION: TRACE_INFO_WP("sCfg "); // Set the requested configuration cfgnum = USBSetConfigurationRequest_GetConfiguration(pRequest); SetConfiguration(pDriver, cfgnum); break; case USBGenericRequest_GETCONFIGURATION: TRACE_INFO_WP("gCfg "); // Send the current configuration number GetConfiguration(pDriver); break; case USBGenericRequest_GETSTATUS: TRACE_INFO_WP("gSta "); // Check who is the recipient switch (USBGenericRequest_GetRecipient(pRequest)) { case USBGenericRequest_DEVICE: TRACE_INFO_WP("Dev "); // Send the device status GetDeviceStatus(pDriver); break; case USBGenericRequest_ENDPOINT: TRACE_INFO_WP("Ept "); // Send the endpoint status eptnum = USBGenericRequest_GetEndpointNumber(pRequest); GetEndpointStatus(eptnum); break; default: TRACE_WARNING( "USBDDriver_RequestHandler: Unknown recipient (%d)\n\r", USBGenericRequest_GetRecipient(pRequest)); USBD_Stall(0); } break; case USBGenericRequest_CLEARFEATURE: TRACE_INFO_WP("cFeat "); // Check which is the requested feature switch (USBFeatureRequest_GetFeatureSelector(pRequest)) { case USBFeatureRequest_ENDPOINTHALT: TRACE_INFO_WP("Hlt "); // Unhalt endpoint and send a zero-length packet USBD_Unhalt(USBGenericRequest_GetEndpointNumber(pRequest)); USBD_Write(0, 0, 0, 0, 0); break; case USBFeatureRequest_DEVICEREMOTEWAKEUP: TRACE_INFO_WP("RmWU "); // Disable remote wake-up and send a zero-length packet pDriver->isRemoteWakeUpEnabled = 0; USBD_Write(0, 0, 0, 0, 0); break; default: TRACE_WARNING( "USBDDriver_RequestHandler: Unknown feature selector (%d)\n\r", USBFeatureRequest_GetFeatureSelector(pRequest)); USBD_Stall(0); } break; case USBGenericRequest_SETFEATURE: TRACE_INFO_WP("sFeat "); // Check which is the selected feature switch (USBFeatureRequest_GetFeatureSelector(pRequest)) { case USBFeatureRequest_DEVICEREMOTEWAKEUP: TRACE_INFO_WP("RmWU "); // Enable remote wake-up and send a ZLP pDriver->isRemoteWakeUpEnabled = 1; USBD_Write(0, 0, 0, 0, 0); break; case USBFeatureRequest_ENDPOINTHALT: TRACE_INFO_WP("Halt "); // Halt endpoint USBD_Halt(USBGenericRequest_GetEndpointNumber(pRequest)); USBD_Write(0, 0, 0, 0, 0); break; #if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS) case USBFeatureRequest_TESTMODE: // 7.1.20 Test Mode Support if ((USBGenericRequest_GetType(pRequest) == USBGenericRequest_DEVICE) && ((USBGenericRequest_GetIndex(pRequest) & 0x000F) == 0)) { // Handle test request USBDDriver_Test(USBFeatureRequest_GetTestSelector(pRequest)); } else { USBD_Stall(0); } break; #endif #if defined(BOARD_USB_OTGHS) case USBFeatureRequest_OTG_B_HNP_ENABLE: TRACE_INFO_WP("OTG_B_HNP_ENABLE "); otg_features_supported |= 1<isRemoteWakeUpEnabled; } #if defined(BOARD_USB_OTGHS) //------------------------------------------------------------------------------ /// Return OTG features supported /// \return the OTG features //------------------------------------------------------------------------------ unsigned char USBDDriver_returnOTGFeatures(void) { return otg_features_supported; } //------------------------------------------------------------------------------ /// Clear OTG features supported /// \return none //------------------------------------------------------------------------------ void USBDDriver_clearOTGFeatures(void) { otg_features_supported = 0; } #endif tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriver.h000066400000000000000000000103721207233610700264640ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose USB Device Driver class definition. !!!Usage -# Instanciate a USBDDriver object and initialize it using USBDDriver_Initialize. -# When a USB SETUP request is received, forward it to the standard driver using USBDDriver_RequestHandler. -# Check the Remote Wakeup setting via USBDDriver_IsRemoteWakeUpEnabled. */ #ifndef USBDDRIVER_H #define USBDDRIVER_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBDDriverDescriptors.h" #include //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// USB device driver structure, holding a list of descriptors identifying /// the device as well as the driver current state. //------------------------------------------------------------------------------ typedef struct { /// List of descriptors used by the device. const USBDDriverDescriptors *pDescriptors; /// Current setting for each interface. unsigned char *pInterfaces; /// Current configuration number (0 -> device is not configured). unsigned char cfgnum; /// Indicates if remote wake up has been enabled by the host. unsigned char isRemoteWakeUpEnabled; #if defined(BOARD_USB_OTGHS) /// Features supported by OTG unsigned char otg_features_supported; #endif } USBDDriver; //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern void USBDDriver_Initialize( USBDDriver *pDriver, const USBDDriverDescriptors *pDescriptors, unsigned char *pInterfaces); extern void USBDDriver_RequestHandler( USBDDriver *pDriver, const USBGenericRequest *pRequest); extern unsigned char USBDDriver_IsRemoteWakeUpEnabled(const USBDDriver *pDriver); #if defined(BOARD_USB_OTGHS) extern unsigned char USBDDriver_returnOTGFeatures(void); extern void USBDDriver_clearOTGFeatures(void); #endif #endif //#ifndef USBDDRIVER_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCallbacks.h000066400000000000000000000056401207233610700302660ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of several callbacks which are triggered by the USB software driver after receiving specific requests. !!!Usage -# Re-implement the USBDDriverCallbacks_ConfigurationChanged callback to know when the hosts changes the active configuration of the device. -# Re-implement the USBDDriverCallbacks_InterfaceSettingChanged callback to get notified whenever the active setting of an interface is changed by the host. */ #ifndef USBDDRIVERCALLBACKS_H #define USBDDRIVERCALLBACKS_H //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ extern void USBDDriverCallbacks_ConfigurationChanged(unsigned char cfgnum); extern void USBDDriverCallbacks_InterfaceSettingChanged(unsigned char iface, unsigned char setting); #endif //#ifndef USBDDRIVERCALLBACKS_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCb_CfgChanged.c000066400000000000000000000053221207233610700307540ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBDDriverCallbacks.h" #include //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Indicates that the current configuration of the device has changed. /// \param cfgnum New device configuration index. //------------------------------------------------------------------------------ void USBDDriverCallbacks_ConfigurationChanged(unsigned char cfgnum) { TRACE_INFO_WP("ConfigurationChanged "); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCb_IfSettingChanged.c000066400000000000000000000054751207233610700321620ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBDDriverCallbacks.h" #include //------------------------------------------------------------------------------ // Global functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Notifies of a change in the currently active setting of an interface. /// \param interface Number of the interface whose setting has changed. /// \param setting New interface setting. //------------------------------------------------------------------------------ void USBDDriverCallbacks_InterfaceSettingChanged( unsigned char iface, unsigned char setting) { TRACE_INFO_WP("InterfaceSettingChanged "); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverDescriptors.h000066400000000000000000000102631207233610700307050ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Definition of a class for declaring USB descriptors required by the device driver. */ #ifndef USBDDRIVERDESCRIPTORS_H #define USBDDRIVERDESCRIPTORS_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include #include #include //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// List of all descriptors used by a USB device driver. Each descriptor can /// be provided in two versions: full-speed and high-speed. Devices which are /// not high-speed capable do not need to provided high-speed descriptors and /// the full-speed qualifier & other speed descriptors. //------------------------------------------------------------------------------ typedef struct { /// Pointer to the full-speed device descriptor. const USBDeviceDescriptor *pFsDevice; /// Pointer to the full-speed configuration descriptor. const USBConfigurationDescriptor *pFsConfiguration; /// Pointer to the full-speed qualifier descriptor. const USBDeviceQualifierDescriptor *pFsQualifier; /// Pointer to the full-speed other speed configuration descriptor. const USBConfigurationDescriptor *pFsOtherSpeed; /// Pointer to the high-speed device descriptor. const USBDeviceDescriptor *pHsDevice; /// Pointer to the high-speed configuration descriptor. const USBConfigurationDescriptor *pHsConfiguration; /// Pointer to the high-speed qualifier descriptor. const USBDeviceQualifierDescriptor *pHsQualifier; /// Pointer to the high-speed other speed configuration descriptor. const USBConfigurationDescriptor *pHsOtherSpeed; /// Pointer to the list of string descriptors. const unsigned char **pStrings; /// Number of string descriptors in list. unsigned char numStrings; } USBDDriverDescriptors; #endif //#ifndef USBDDRIVERDESCRIPTORS_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_OTGHS.c000066400000000000000000001745231207233610700262600ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBD.h" #include "USBDCallbacks.h" #include "USBDDriver.h" #include #include #include #include #include #include #include #include #if defined(BOARD_USB_OTGHS) //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ /// Maximum number of endpoints interrupts. #define NUM_IT_MAX \ (AT91C_BASE_OTGHS->OTGHS_IPFEATURES & AT91C_OTGHS_EPT_NBR_MAX) /// Maximum number of endpoint DMA interrupts #define NUM_IT_MAX_DMA \ ((AT91C_BASE_OTGHS->OTGHS_IPFEATURES & AT91C_OTGHS_DMA_CHANNEL_NBR)>>4) /// Bits that should be shifted to access DMA control bits. #define SHIFT_DMA 24 /// Bits that should be shifted to access interrupt bits. #define SHIFT_INTERUPT 12 /// Compile option, use DMA. Remove this define for not use DMA. #define DMA /// Max size of the FMA FIFO #define DMA_MAX_FIFO_SIZE 32768 #define EPT_VIRTUAL_SIZE 8192 //------------------------------------------------------------------------------ /// \page "Endpoint states" /// This page lists the endpoint states. /// !States // - UDP_ENDPOINT_DISABLED // - UDP_ENDPOINT_HALTED // - UDP_ENDPOINT_IDLE // - UDP_ENDPOINT_SENDING // - UDP_ENDPOINT_RECEIVING /// Endpoint states: Endpoint is disabled #define UDP_ENDPOINT_DISABLED 0 /// Endpoint states: Endpoint is halted (i.e. STALLs every request) #define UDP_ENDPOINT_HALTED 1 /// Endpoint states: Endpoint is idle (i.e. ready for transmission) #define UDP_ENDPOINT_IDLE 2 /// Endpoint states: Endpoint is sending data #define UDP_ENDPOINT_SENDING 3 /// Endpoint states: Endpoint is receiving data #define UDP_ENDPOINT_RECEIVING 4 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Structures //------------------------------------------------------------------------------ /// Describes an ongoing transfer on a UDP endpoint. typedef struct { /// Pointer to a data buffer used for emission/reception. char *pData; /// Number of bytes which have been written into the UDP internal FIFO /// buffers. volatile int buffered; /// Number of bytes which have been sent/received. volatile int transferred; /// Number of bytes which have not been buffered/transferred yet. volatile int remaining; /// Optional callback to invoke when the transfer completes. volatile TransferCallback fCallback; /// Optional argument to the callback function. void *pArgument; } Transfer; //------------------------------------------------------------------------------ /// Describes the state of an endpoint of the UDP controller. //------------------------------------------------------------------------------ typedef struct { /// Current endpoint state. volatile unsigned char state; /// Current reception bank (0 or 1). unsigned char bank; /// Maximum packet size for the endpoint. unsigned short size; /// Describes an ongoing transfer (if current state is either /// or ) Transfer transfer; /// Special case for send a ZLP unsigned char sendZLP; } Endpoint; //------------------------------------------------------------------------------ // Internal variables //------------------------------------------------------------------------------ /// Holds the internal state for each endpoint of the UDP. static Endpoint endpoints[BOARD_USB_NUMENDPOINTS]; /// Device current state. static unsigned char deviceState; /// Indicates the previous device state static unsigned char previousDeviceState; /// 7.1.20 Test Mode Support /// Test codes for the USB HS test mode. static const char test_packet_buffer[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // JKJKJKJK * 9 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, // JJKKJJKK * 8 0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE, // JJJJKKKK * 8 0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, // JJJJJJJKKKKKKK * 8 0x7F,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD, // JJJJJJJK * 8 0xFC,0x7E,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD,0x7E // {JKKKKKKK * 10}, JK }; //------------------------------------------------------------------------------ // Internal Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Enable UDPHS clock //------------------------------------------------------------------------------ static inline void OTGHS_EnableUsbClock( void ) { } //------------------------------------------------------------------------------ /// Disable UDPHS clock //------------------------------------------------------------------------------ static inline void OTGHS_DisableUsbClock( void ) { } //------------------------------------------------------------------------------ /// Enables the transceiver of the USB controller //------------------------------------------------------------------------------ static void OTGHS_EnableTransceiver(void) { AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_OTGPADE; } //------------------------------------------------------------------------------ /// Disables the transceiver of the USB controller associated with the specified /// USB driver //------------------------------------------------------------------------------ static void OTGHS_DisableTransceiver(void) { AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_OTGPADE; } //------------------------------------------------------------------------------ /// Handles a completed transfer on the given endpoint, invoking the /// configured callback if any. /// \param bEndpoint Number of the endpoint for which the transfer has completed. /// \param bStatus Status code returned by the transfer operation //------------------------------------------------------------------------------ static void OTGHS_EndOfTransfer( unsigned char bEndpoint, char bStatus ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Check that endpoint was sending or receiving data if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING) ) { TRACE_DEBUG_WP("Eo"); if(pEndpoint->state == UDP_ENDPOINT_SENDING) { pEndpoint->sendZLP = 0; } // Endpoint returns in Idle state pEndpoint->state = UDP_ENDPOINT_IDLE; // Invoke callback is present if (pTransfer->fCallback != 0) { ((TransferCallback) pTransfer->fCallback) (pTransfer->pArgument, bStatus, pTransfer->transferred, pTransfer->remaining + pTransfer->buffered); } else { TRACE_DEBUG_WP("No callBack\n\r"); } } } //------------------------------------------------------------------------------ /// Transfers a data payload from the current tranfer buffer to the endpoint /// FIFO /// \param bEndpoint Number of the endpoint which is sending data. //------------------------------------------------------------------------------ static void OTGHS_WritePayload( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); char *pFifo; signed int size; unsigned int dCtr; pFifo = (char*)((unsigned int *)AT91C_BASE_OTGHS_EPTFIFO + (EPT_VIRTUAL_SIZE * bEndpoint)); // Get the number of bytes to send size = pEndpoint->size; if (size > pTransfer->remaining) { size = pTransfer->remaining; } // Update transfer descriptor information pTransfer->buffered += size; pTransfer->remaining -= size; // Write packet in the FIFO buffer dCtr = 0; while (size > 0) { pFifo[dCtr] = *(pTransfer->pData); pTransfer->pData++; size--; dCtr++; } } //------------------------------------------------------------------------------ /// Transfers a data payload from an endpoint FIFO to the current transfer buffer /// \param bEndpoint Endpoint number. /// \param wPacketSize Size of received data packet //------------------------------------------------------------------------------ static void OTGHS_ReadPayload( unsigned char bEndpoint, int wPacketSize ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); char *pFifo; unsigned char dBytes=0; pFifo = (char*)((unsigned int *)AT91C_BASE_OTGHS_EPTFIFO + (EPT_VIRTUAL_SIZE * bEndpoint)); // Check that the requested size is not bigger than the remaining transfer if (wPacketSize > pTransfer->remaining) { pTransfer->buffered += wPacketSize - pTransfer->remaining; wPacketSize = pTransfer->remaining; } // Update transfer descriptor information pTransfer->remaining -= wPacketSize; pTransfer->transferred += wPacketSize; // Retrieve packet while (wPacketSize > 0) { *(pTransfer->pData) = pFifo[dBytes]; pTransfer->pData++; wPacketSize--; dBytes++; } } //------------------------------------------------------------------------------ /// Received SETUP packet from endpoint 0 FIFO /// \param pRequest Generic USB SETUP request sent over Control endpoints //------------------------------------------------------------------------------ static void OTGHS_ReadRequest( USBGenericRequest *pRequest ) { unsigned int *pData = (unsigned int *)pRequest; unsigned int fifo; fifo = (AT91C_BASE_OTGHS_EPTFIFO->OTGHS_READEPT0[0]); *pData = fifo; fifo = (AT91C_BASE_OTGHS_EPTFIFO->OTGHS_READEPT0[0]); pData++; *pData = fifo; //TRACE_ERROR("SETUP: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n\r", pData[0],pData[1],pData[2],pData[3],pData[4],pData[5],pData[6],pData[7]); } //------------------------------------------------------------------------------ /// Reset all endpoint transfer descriptors //------------------------------------------------------------------------------ static void OTGHS_ResetEndpoints( void ) { Endpoint *pEndpoint; Transfer *pTransfer; unsigned char bEndpoint; // Reset the transfer descriptor of every endpoint for( bEndpoint = 0; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++ ) { pEndpoint = &(endpoints[bEndpoint]); pTransfer = &(pEndpoint->transfer); // Reset endpoint transfer descriptor pTransfer->pData = 0; pTransfer->transferred = -1; pTransfer->buffered = -1; pTransfer->remaining = -1; pTransfer->fCallback = 0; pTransfer->pArgument = 0; // Reset endpoint state pEndpoint->bank = 0; pEndpoint->state = UDP_ENDPOINT_DISABLED; // Reset ZLP pEndpoint->sendZLP = 0; } } //------------------------------------------------------------------------------ /// Disable all endpoints (except control endpoint 0), aborting current /// transfers if necessary //------------------------------------------------------------------------------ static void OTGHS_DisableEndpoints( void ) { unsigned char bEndpoint; // Disable each endpoint, terminating any pending transfer // Control endpoint 0 is not disabled for( bEndpoint = 1; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++ ) { OTGHS_EndOfTransfer( bEndpoint, USBD_STATUS_ABORTED ); endpoints[bEndpoint].state = UDP_ENDPOINT_DISABLED; } } //------------------------------------------------------------------------------ /// Endpoint interrupt handler. /// Handle IN/OUT transfers, received SETUP packets and STALLing /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ static void OTGHS_EndpointHandler( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); unsigned int status = AT91C_BASE_OTGHS->OTGHS_DEVEPTISR[bEndpoint]; unsigned short wPacketSize; USBGenericRequest request; TRACE_DEBUG_WP("E%d ", bEndpoint); TRACE_DEBUG_WP("st:0x%X ", status); // Handle interrupts // IN packet sent if((AT91C_BASE_OTGHS->OTGHS_DEVEPTIMR[bEndpoint] & AT91C_OTGHS_TXINI) && (status & AT91C_OTGHS_TXINI )) { TRACE_DEBUG_WP("Wr "); // Check that endpoint was in Sending state if( pEndpoint->state == UDP_ENDPOINT_SENDING ) { if (pTransfer->buffered > 0) { pTransfer->transferred += pTransfer->buffered; pTransfer->buffered = 0; } if( ((pTransfer->buffered)==0) &&((pTransfer->transferred)==0) &&((pTransfer->remaining)==0) &&(pEndpoint->sendZLP == 0)) { pEndpoint->sendZLP = 1; } // End of transfer ? if( (pTransfer->remaining > 0) ||(pEndpoint->sendZLP == 1)) { pEndpoint->sendZLP = 2; // Transfer remaining data TRACE_DEBUG_WP(" %d ", pEndpoint->size); // Send next packet OTGHS_WritePayload(bEndpoint); // Send Token IN AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_TXINI; // For a non-control endpoint, the FIFOCON bit must be cleared // to start the transfer if ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]) != AT91C_OTGHS_EPT_TYPE_CTL_EPT) { // Send IN AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_FIFOCON; } } else { TRACE_DEBUG_WP("\n\r0pTransfer->buffered %d \n\r", pTransfer->buffered); TRACE_DEBUG_WP("0pTransfer->transferred %d \n\r", pTransfer->transferred); TRACE_DEBUG_WP("0pTransfer->remaining %d \n\r", pTransfer->remaining); TRACE_DEBUG_WP(" %d ", pTransfer->transferred); // Disable interrupt if this is not a control endpoint if ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]) != AT91C_OTGHS_EPT_TYPE_CTL_EPT) { AT91C_BASE_OTGHS->OTGHS_DEVIDR = 1<OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_TXINI; OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); pEndpoint->sendZLP = 0; } } else { TRACE_DEBUG("Error Wr %d", pEndpoint->sendZLP); } } // OUT packet received if( AT91C_OTGHS_RXOUT == (status & AT91C_OTGHS_RXOUT) ) { // Check that the endpoint is in Receiving state if (pEndpoint->state != UDP_ENDPOINT_RECEIVING) { // Check if an ACK has been received on a Control endpoint if( ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]) == AT91C_OTGHS_EPT_TYPE_CTL_EPT) && (0 == (status & AT91C_OTGHS_BYCT)) ) { // Control endpoint, 0 bytes received // Acknowledge the data and finish the current transfer TRACE_DEBUG_WP("Ack "); AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_RXOUT; AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_RXOUT; //OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); } // Check if the data has been STALLed else if( AT91C_OTGHS_STALL == (status & AT91C_OTGHS_STALL)) { // Discard STALLed data TRACE_DEBUG_WP("Discard "); AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_RXOUT; } else { // NAK the data TRACE_DEBUG_WP("Nak "); AT91C_BASE_OTGHS->OTGHS_DEVIDR = 1<> 20) & 0x7FF); //TRACE_ERROR_WP("out:%d ", wPacketSize); OTGHS_ReadPayload(bEndpoint, wPacketSize); AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_RXOUT; if((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]) != AT91C_OTGHS_EPT_TYPE_CTL_EPT) { AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_FIFOCON; } // Check if the transfer is finished if ((pTransfer->remaining == 0) || (wPacketSize < pEndpoint->size)) { AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_RXOUT; // Disable interrupt if this is not a control endpoint if ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]) != AT91C_OTGHS_EPT_TYPE_CTL_EPT) { AT91C_BASE_OTGHS->OTGHS_DEVIDR = 1<OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_STALL; // If the endpoint is not halted, clear the STALL condition if (pEndpoint->state != UDP_ENDPOINT_HALTED) { TRACE_WARNING("_ " ); AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_STALLRQ; } } // SETUP packet received if( AT91C_OTGHS_RXSTP == (status & AT91C_OTGHS_RXSTP) ) { TRACE_DEBUG_WP("Stp "); // If a transfer was pending, complete it // Handles the case where during the status phase of a control write // transfer, the host receives the device ZLP and ack it, but the ack // is not received by the device if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING)) { OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); } // Copy the setup packet OTGHS_ReadRequest(&request); // Acknowledge setup packet AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_RXSTP; // Forward the request to the upper layer USBDCallbacks_RequestReceived(&request); } } //------------------------------------------------------------------------------ // Interrupt service routine //------------------------------------------------------------------------------ #ifdef DMA //---------------------------------------------------------------------------- /// Endpoint DMA interrupt handler. /// This function (ISR) handles dma interrupts /// \param bEndpoint Index of endpoint //---------------------------------------------------------------------------- static void OTGHS_DmaHandler( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); int justTransferred; unsigned int status; unsigned char result = USBD_STATUS_SUCCESS; status = AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMASTATUS; TRACE_DEBUG_WP("Dma Ept%d ", bEndpoint); // Disable DMA interrupt to avoid receiving 2 interrupts (B_EN and TR_EN) AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL &= ~(AT91C_OTGHS_END_TR_EN | AT91C_OTGHS_END_B_EN); AT91C_BASE_OTGHS->OTGHS_DEVIDR = (1<buffered - ((status & AT91C_OTGHS_BUFF_COUNT) >> 16); pTransfer->transferred += justTransferred; pTransfer->buffered = ((status & AT91C_OTGHS_BUFF_COUNT) >> 16); pTransfer->remaining -= justTransferred; TRACE_DEBUG_WP("\n\r1pTransfer->buffered %d \n\r", pTransfer->buffered); TRACE_DEBUG_WP("1pTransfer->transferred %d \n\r", pTransfer->transferred); TRACE_DEBUG_WP("1pTransfer->remaining %d \n\r", pTransfer->remaining); if( (pTransfer->remaining + pTransfer->buffered) > 0 ) { // Prepare an other transfer if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) { pTransfer->buffered = DMA_MAX_FIFO_SIZE; } else { pTransfer->buffered = pTransfer->remaining; } AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMAADDRESS = (unsigned int)((pTransfer->pData) + (pTransfer->transferred)); // Clear unwanted interrupts AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMASTATUS; // Enable DMA endpoint interrupt AT91C_BASE_OTGHS->OTGHS_DEVIER = (1 << SHIFT_DMA << bEndpoint); // DMA config for receive the good size of buffer, or an error buffer AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = 0; // raz AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = ( ((pTransfer->buffered << 16) & AT91C_OTGHS_BUFF_COUNT) | AT91C_OTGHS_END_TR_EN | AT91C_OTGHS_END_TR_IT | AT91C_OTGHS_END_B_EN | AT91C_OTGHS_END_BUFFIT | AT91C_OTGHS_CHANN_ENB ); } } else if( AT91C_OTGHS_END_TR_ST == (status & AT91C_OTGHS_END_TR_ST) ) { TRACE_DEBUG_WP("EndTransf "); pTransfer->transferred = pTransfer->buffered - ((status & AT91C_OTGHS_BUFF_COUNT) >> 16); pTransfer->remaining = 0; TRACE_DEBUG_WP("\n\r0pTransfer->buffered %d \n\r", pTransfer->buffered); TRACE_DEBUG_WP("0pTransfer->transferred %d \n\r", pTransfer->transferred); TRACE_DEBUG_WP("0pTransfer->remaining %d \n\r", pTransfer->remaining); } else { TRACE_ERROR("OTGHS_DmaHandler: Error (0x%08X)\n\r", status); result = USBD_STATUS_ABORTED; } // Invoke callback if( pTransfer->remaining == 0 ) { TRACE_DEBUG_WP("EOT "); OTGHS_EndOfTransfer(bEndpoint, result); } } #endif //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// USB interrupt handler /// Manages device resume, suspend, end of bus reset. /// Forwards endpoint interrupts to the appropriate handler. //------------------------------------------------------------------------------ void RealUdphsIrqHandler(void) @spontaneous() { unsigned int status; unsigned char numIT; call UdphsInterruptWrapper.preamble(); if (deviceState >= USBD_STATE_POWERED) { //LED_Set(USBD_LEDUSB); //TOSH_SET_GREEN_LED_PIN(); } // Get interrupts status status = AT91C_BASE_OTGHS->OTGHS_SR & AT91C_BASE_OTGHS->OTGHS_CTRL & 0xFF; while (status != 0) { //TRACE_ERROR_WP("~"); if((status&AT91C_OTGHS_VBUSTI)==AT91C_OTGHS_VBUSTI) { TRACE_DEBUG_WP("__VBus\n\r"); USBD_Connect(); // Acknowledge the interrupt AT91C_BASE_OTGHS->OTGHS_SCR = AT91C_OTGHS_VBUSTI; } // Don't treat others interrupt for this time AT91C_BASE_OTGHS->OTGHS_SCR = AT91C_OTGHS_IDT | AT91C_OTGHS_SRP | AT91C_OTGHS_VBERR | AT91C_OTGHS_BCERR | AT91C_OTGHS_ROLEEX | AT91C_OTGHS_HNPERR | AT91C_OTGHS_STO; AT91C_BASE_OTGHS->OTGHS_CTRL &= ~(AT91C_OTGHS_IDT); status = AT91C_BASE_OTGHS->OTGHS_SR & AT91C_BASE_OTGHS->OTGHS_CTRL & 0xFF; } // Get OTG Device interrupts status status = AT91C_BASE_OTGHS->OTGHS_DEVISR & AT91C_BASE_OTGHS->OTGHS_DEVIMR; while (status != 0) { //TRACE_ERROR_WP("="); // Start Of Frame (SOF) if((status&AT91C_OTGHS_SOF)==AT91C_OTGHS_SOF) { TRACE_DEBUG_WP("SOF "); // Invoke the SOF callback //USB_StartOfFrameCallback(); // Acknowledge interrupt AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_SOF; status &= ~AT91C_OTGHS_SOF; } // Suspend // This interrupt is always treated last (hence the '==') else if (status == AT91C_OTGHS_SUSP) { TRACE_DEBUG_WP("S"); // The device enters the Suspended state // MCK + UDPCK must be off // Pull-Up must be connected // Transceiver must be disabled //LED_Clear(USBD_LEDUSB); //TOSH_CLR_GREEN_LED_PIN(); // Enable wakeup AT91C_BASE_OTGHS->OTGHS_DEVIER = AT91C_OTGHS_EORST | AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM; // Acknowledge interrupt AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_SUSP; previousDeviceState = deviceState; deviceState = USBD_STATE_SUSPENDED; OTGHS_DisableTransceiver(); OTGHS_DisableUsbClock(); // Invoke the Suspend callback USBDCallbacks_Suspended(); } // Resume else if( ((status & AT91C_OTGHS_WAKEUP) != 0) // line activity || ((status & AT91C_OTGHS_EORSM) != 0)) { // pc wakeup // Invoke the Resume callback USBDCallbacks_Resumed(); TRACE_DEBUG_WP("R"); OTGHS_EnableUsbClock(); OTGHS_EnableTransceiver(); // The device enters Configured state // MCK + UDPCK must be on // Pull-Up must be connected // Transceiver must be enabled deviceState = previousDeviceState; AT91C_BASE_OTGHS->OTGHS_DEVICR = (AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM | AT91C_OTGHS_SUSP); AT91C_BASE_OTGHS->OTGHS_DEVIER = (AT91C_OTGHS_EORST | AT91C_OTGHS_SUSP); AT91C_BASE_OTGHS->OTGHS_DEVICR = (AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM); AT91C_BASE_OTGHS->OTGHS_DEVIDR = AT91C_OTGHS_WAKEUP; } // End of bus reset else if ((status & AT91C_OTGHS_EORST) == AT91C_OTGHS_EORST) { TRACE_DEBUG_WP("EoB "); // The device enters the Default state deviceState = USBD_STATE_DEFAULT; // MCK + UDPCK are already enabled // Pull-Up is already connected // Transceiver must be enabled // Endpoint 0 must be enabled OTGHS_EnableTransceiver(); USBDDriver_clearOTGFeatures(); // The device leaves the Address & Configured states OTGHS_ResetEndpoints(); OTGHS_DisableEndpoints(); USBD_ConfigureEndpoint(0); // Flush and enable the Suspend interrupt AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_WAKEUP | AT91C_OTGHS_SUSP; //// Enable the Start Of Frame (SOF) interrupt if needed //if (pCallbacks->startOfFrame != 0) //{ // AT91C_BASE_OTGHS->OTGHS_DEVIER |= AT91C_OTGHS_SOF; //} // Invoke the Reset callback USBDCallbacks_Reset(); // Acknowledge end of bus reset interrupt AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_EORST; } // Handle upstream resume interrupt else if (status & AT91C_OTGHS_UPRSM) { TRACE_DEBUG_WP("ExtRes "); // - Acknowledge the IT AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_UPRSM; } // Endpoint interrupts else { #ifndef DMA // Handle endpoint interrupts for (numIT = 0; numIT < NUM_IT_MAX; numIT++) { if ((status & (1 << SHIFT_INTERUPT << numIT)) != 0) { OTGHS_EndpointHandler(numIT); } } #else // Handle endpoint control interrupt if ((status & (1 << SHIFT_INTERUPT << 0)) != 0) { OTGHS_EndpointHandler( 0 ); } else { numIT = 1; while((status&(0x7E<OTGHS_DEVISR & AT91C_BASE_OTGHS->OTGHS_DEVIMR; TRACE_DEBUG_WP("\n\r"); if (status != 0) { TRACE_DEBUG_WP(" - "); } } if (deviceState >= USBD_STATE_POWERED) { //LED_Clear(USBD_LEDUSB); //TOSH_CLR_GREEN_LED_PIN(); } call UdphsInterruptWrapper.postamble(); } void UdphsIrqHandler(void) @C() @spontaneous() { call UdphsInterruptWrapper.preamble(); RealUdphsIrqHandler(); call UdphsInterruptWrapper.postamble(); } //------------------------------------------------------------------------------ /// Configure an endpoint with the provided endpoint descriptor /// \param pDdescriptor Pointer to the endpoint descriptor //------------------------------------------------------------------------------ void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor) { Endpoint *pEndpoint; unsigned char bEndpoint; unsigned char bType; unsigned char bEndpointDir; unsigned char bSizeEpt = 0; // NULL descriptor -> Control endpoint 0 if (pDescriptor == 0) { bEndpoint = 0; pEndpoint = &(endpoints[bEndpoint]); bType = USBEndpointDescriptor_CONTROL; bEndpointDir = 0; pEndpoint->size = BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0); pEndpoint->bank = BOARD_USB_ENDPOINTS_BANKS(0); } else { // The endpoint number bEndpoint = USBEndpointDescriptor_GetNumber(pDescriptor); pEndpoint = &(endpoints[bEndpoint]); // Transfer type: Control, Isochronous, Bulk, Interrupt bType = USBEndpointDescriptor_GetType(pDescriptor); // Direction, ignored for control endpoints bEndpointDir = USBEndpointDescriptor_GetDirection(pDescriptor); pEndpoint->size = USBEndpointDescriptor_GetMaxPacketSize(pDescriptor); pEndpoint->bank = BOARD_USB_ENDPOINTS_BANKS(bEndpoint); } // Abort the current transfer is the endpoint was configured and in // Write or Read state if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING) ) { OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_RESET); } pEndpoint->state = UDP_ENDPOINT_IDLE; // Disable endpoint AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_TXINI | AT91C_OTGHS_RXOUT | AT91C_OTGHS_RXSTP | AT91C_OTGHS_NAKOUT | AT91C_OTGHS_NAKIN | AT91C_OTGHS_OVERFL | AT91C_OTGHS_STALL | AT91C_OTGHS_SHRTPACK | AT91C_OTGHS_MADATA | AT91C_OTGHS_DATAX | AT91C_OTGHS_ERRTRANS | AT91C_OTGHS_NBUSYBK | AT91C_OTGHS_FIFOCON | AT91C_OTGHS_EPDISHDMA | AT91C_OTGHS_NYETDIS | AT91C_OTGHS_STALLRQ; // Reset Endpoint Fifos AT91C_BASE_OTGHS->OTGHS_DEVEPT |= (1<OTGHS_DEVEPT &= ~(1<size <= 8 ) { bSizeEpt = 0; } else if ( pEndpoint->size <= 16 ) { bSizeEpt = 1; } else if ( pEndpoint->size <= 32 ) { bSizeEpt = 2; } else if ( pEndpoint->size <= 64 ) { bSizeEpt = 3; } else if ( pEndpoint->size <= 128 ) { bSizeEpt = 4; } else if ( pEndpoint->size <= 256 ) { bSizeEpt = 5; } else if ( pEndpoint->size <= 512 ) { bSizeEpt = 6; } else if ( pEndpoint->size <= 1024 ) { bSizeEpt = 7; } //else { // sizeEpt = 0; // control endpoint //} // Enable endpoint AT91C_BASE_OTGHS->OTGHS_DEVEPT |= (1<OTGHS_DEVIER = 1<OTGHS_DEVEPTCFG[bEndpoint] = (bSizeEpt << 4) | (bEndpointDir << 8) | (bType << 11) | (((pEndpoint->bank)-1) << 2); if (bType == USBEndpointDescriptor_CONTROL) { AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_RXSTP; } #ifdef DMA else { AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint] |= AT91C_OTGHS_AUTOSW; } #endif AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_NYETDIS;// with nyet //AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_NYETDIS; // without nyet // Check if the configuration is ok AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint] |= AT91C_OTGHS_ALLOC; if((AT91C_BASE_OTGHS->OTGHS_DEVEPTISR[bEndpoint]&AT91C_OTGHS_CFGOK)==0) { TRACE_ERROR("PB bEndpoint: 0x%X\n\r", bEndpoint); TRACE_ERROR("PB bSizeEpt: 0x%X\n\r", bSizeEpt); TRACE_ERROR("PB bEndpointDir: 0x%X\n\r", bEndpointDir); TRACE_ERROR("PB bType: 0x%X\n\r", bType); TRACE_ERROR("PB pEndpoint->bank: 0x%X\n\r", pEndpoint->bank); TRACE_ERROR("PB OTGHS_EPTCFG: 0x%X\n\r", AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]); for(;;); } } //------------------------------------------------------------------------------ /// Sends data through an USB endpoint (IN) /// Sets up the transfer descriptor, write one or two data payloads /// (depending on the number of FIFO banks for the endpoint) and then /// starts the actual transfer. The operation is complete when all /// the data has been sent. /// \param bEndpoint Index of endpoint /// \param *pData Data to be written /// \param dLength Data length to be send /// \param fCallback Callback to be call after the success command /// \param *pArgument Callback argument /// \return USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS //------------------------------------------------------------------------------ char USBD_Write( unsigned char bEndpoint, const void *pData, unsigned int dLength, TransferCallback fCallback, void *pArgument ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); //unsigned char i; //unsigned char * data; // Return if the endpoint is not in IDLE state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { return USBD_STATUS_LOCKED; } TRACE_DEBUG_WP("Write%d(%d) ", bEndpoint, dLength); pEndpoint->sendZLP = 0; // Setup the transfer descriptor pTransfer->pData = (void *) pData; pTransfer->remaining = dLength; pTransfer->buffered = 0; pTransfer->transferred = 0; pTransfer->fCallback = fCallback; pTransfer->pArgument = pArgument; // Send one packet pEndpoint->state = UDP_ENDPOINT_SENDING; #ifdef DMA // Test if endpoint type control if (AT91C_OTGHS_EPT_TYPE_CTL_EPT == (AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])) { #endif // Enable endpoint IT AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_TXINI; #ifdef DMA } else { if( pTransfer->remaining == 0 ) { // DMA not handle ZLP AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_TXINI; // For a non-control endpoint, the FIFOCON bit must be cleared // to start the transfer if ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]) != AT91C_OTGHS_EPT_TYPE_CTL_EPT) { AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_FIFOCON; } AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_TXINI; // Enable endpoint IT AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<remaining > DMA_MAX_FIFO_SIZE ) { // Transfer the max pTransfer->buffered = DMA_MAX_FIFO_SIZE; } else { // Transfer the good size pTransfer->buffered = pTransfer->remaining; } TRACE_DEBUG_WP("\n\r_WR:%d ", pTransfer->remaining ); TRACE_DEBUG_WP("B:%d ", pTransfer->buffered ); TRACE_DEBUG_WP("T:%d ", pTransfer->transferred ); AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMAADDRESS = (unsigned int)(pTransfer->pData); // Clear unwanted interrupts AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMASTATUS; // Enable DMA endpoint interrupt AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = 0; // raz AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = (((pTransfer->buffered<<16)&AT91C_OTGHS_BUFF_LENGTH) | AT91C_OTGHS_END_B_EN | AT91C_OTGHS_END_BUFFIT | AT91C_OTGHS_CHANN_ENB); } } #endif return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Reads incoming data on an USB endpoint (OUT) /// \param bEndpoint Index of endpoint /// \param *pData Data to be readen /// \param dLength Data length to be receive /// \param fCallback Callback to be call after the success command /// \param *pArgument Callback argument /// \return USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS //------------------------------------------------------------------------------ char USBD_Read( unsigned char bEndpoint, void *pData, unsigned int dLength, TransferCallback fCallback, void *pArgument ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Return if the endpoint is not in IDLE state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { return USBD_STATUS_LOCKED; } TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength); //TRACE_ERROR_WP("Read%d(%d) ", bEndpoint, dLength); // Endpoint enters Receiving state pEndpoint->state = UDP_ENDPOINT_RECEIVING; // Set the transfer descriptor pTransfer->pData = pData; pTransfer->remaining = dLength; pTransfer->buffered = 0; pTransfer->transferred = 0; pTransfer->fCallback = fCallback; pTransfer->pArgument = pArgument; #ifdef DMA // Test if endpoint type control if (AT91C_OTGHS_EPT_TYPE_CTL_EPT == (AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])) { #endif // Control endpoint // Enable endpoint IT AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_RXOUT; #ifdef DMA } else { TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength); // Others endpoints (not control) if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) { // Transfer the max pTransfer->buffered = DMA_MAX_FIFO_SIZE; } else { // Transfer the good size pTransfer->buffered = pTransfer->remaining; } AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMAADDRESS = (unsigned int)(pTransfer->pData); // Clear unwanted interrupts AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMASTATUS; // Enable DMA endpoint interrupt AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<remaining ); TRACE_DEBUG_WP("B:%d ", pTransfer->buffered ); TRACE_DEBUG_WP("T:%d ", pTransfer->transferred ); // DMA config AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = 0; // raz AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = (((pTransfer->buffered<<16)&AT91C_OTGHS_BUFF_LENGTH) | AT91C_OTGHS_END_TR_EN | AT91C_OTGHS_END_TR_IT | AT91C_OTGHS_END_B_EN | AT91C_OTGHS_END_BUFFIT | AT91C_OTGHS_CHANN_ENB); } #endif return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Put endpoint into Halt state /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ void USBD_Halt( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); TRACE_INFO("usbd_Halt%d ", bEndpoint); //TRACE_ERROR("usbd_Halt%d ", bEndpoint); // Check that endpoint is enabled and not already in Halt state if( (pEndpoint->state != UDP_ENDPOINT_DISABLED) && (pEndpoint->state != UDP_ENDPOINT_HALTED) ) { TRACE_INFO("Halt%d ", bEndpoint); // Abort the current transfer if necessary OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED); pEndpoint->state = UDP_ENDPOINT_HALTED; // Put endpoint into Halt state AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_STALLRQ; AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_STALL; } } //------------------------------------------------------------------------------ /// Clears the Halt feature on the given endpoint. /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ void USBD_Unhalt( unsigned char bEndpoint ) { unsigned int cfgSav; Endpoint *pEndpoint = &(endpoints[bEndpoint]); // Check if the endpoint is enabled if (pEndpoint->state != UDP_ENDPOINT_DISABLED) { TRACE_DEBUG_WP("Unhalt%d ", bEndpoint); //TRACE_ERROR("Unhalt%d ", bEndpoint); // Return endpoint to Idle state pEndpoint->state = UDP_ENDPOINT_IDLE; cfgSav = AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]; // Reset Endpoint Fifos AT91C_BASE_OTGHS->OTGHS_DEVEPT |= (1<OTGHS_DEVEPT &= ~(1<OTGHS_DEVEPTCFG[bEndpoint] = cfgSav; if((AT91C_BASE_OTGHS->OTGHS_DEVEPTISR[bEndpoint]&AT91C_OTGHS_CFGOK)==0) { TRACE_ERROR("PB bEndpoint: 0x%X\n\r", bEndpoint); for(;;); } // Reset data-toggle AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_RSTDT; // Clear FORCESTALL flag // Disable stall on endpoint AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_STALLRQ; AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_STALL; } } //------------------------------------------------------------------------------ /// Returns the current Halt status of an endpoint. /// \param bEndpoint Index of endpoint /// \return 1 if the endpoint is currently halted; otherwise 0 //------------------------------------------------------------------------------ unsigned char USBD_IsHalted( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); unsigned char status = 0; if (pEndpoint->state == UDP_ENDPOINT_HALTED) { status = 1; } return( status ); } //------------------------------------------------------------------------------ /// IS High Speed device working in High Speed ? /// \return 1 if the device is in High Speed; otherwise 0 (Full Speed) //------------------------------------------------------------------------------ unsigned char USBD_IsHighSpeed( void ) { unsigned char status = 0; if(AT91C_OTGHS_SPEED_SR_HS == (AT91C_BASE_OTGHS->OTGHS_SR & (0x03<<12))) { // High Speed TRACE_DEBUG_WP("High Speed\n\r"); status = 1; } else { TRACE_DEBUG_WP("Full Speed\n\r"); } return( status ); } //------------------------------------------------------------------------------ /// Causes the endpoint to acknowledge the next received packet with a STALL /// handshake. /// Further packets are then handled normally. /// \param bEndpoint Index of endpoint /// \return Operation result code: USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS //------------------------------------------------------------------------------ unsigned char USBD_Stall( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); // Check that endpoint is in Idle state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { TRACE_WARNING("UDP_Stall: Endpoint%d locked\n\r", bEndpoint); return USBD_STATUS_LOCKED; } TRACE_DEBUG_WP("Stall%d ", bEndpoint); AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_STALLRQ; return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Activates a remote wakeup procedure //------------------------------------------------------------------------------ void USBD_RemoteWakeUp(void) { TRACE_DEBUG_WP("Remote WakeUp\n\r"); // Device is currently suspended if (deviceState == USBD_STATE_SUSPENDED) { TRACE_DEBUG_WP("RW\n\r"); OTGHS_EnableUsbClock(); OTGHS_EnableTransceiver(); // Activates a remote wakeup AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_RMWKUP; } // Device is NOT suspended else { TRACE_WARNING("USBD_RemoteWakeUp: Device is not suspended\n\r"); } } //------------------------------------------------------------------------------ /// Sets the device address /// \param address Adress to be set //------------------------------------------------------------------------------ void USBD_SetAddress( unsigned char address ) { TRACE_DEBUG_WP("SetAddr(%d) ", address); // Set address AT91C_BASE_OTGHS->OTGHS_DEVCTRL &= ~(AT91C_OTGHS_UADD); AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= address & AT91C_OTGHS_UADD; AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_ADDEN; // If the address is 0, the device returns to the Default state if (address == 0) { deviceState = USBD_STATE_DEFAULT; } // If the address is non-zero, the device enters the Address state else { deviceState = USBD_STATE_ADDRESS; } } //------------------------------------------------------------------------------ /// Changes the device state from Address to Configured, or from Configured /// to Address. /// This method directly access the last received SETUP packet to decide on /// what to do. /// \param cfgnum configuration number //------------------------------------------------------------------------------ void USBD_SetConfiguration( unsigned char cfgnum ) { TRACE_DEBUG_WP("SetCfg(%d) ", cfgnum); // Check the request if( cfgnum != 0 ) { // Enter Configured state deviceState = USBD_STATE_CONFIGURED; } // If the configuration number is zero, the device goes back to the Address // state else { // Go back to Address state deviceState = USBD_STATE_ADDRESS; // Abort all transfers OTGHS_DisableEndpoints(); } } //------------------------------------------------------------------------------ /// Enables the pull-up on the D+ line to connect the device to the USB. //------------------------------------------------------------------------------ void USBD_Connect( void ) { TRACE_DEBUG_WP("Conn "); #if defined(BOARD_USB_PULLUP_INTERNAL) AT91C_BASE_OTGHS->OTGHS_DEVCTRL &= ~AT91C_OTGHS_DETACH; #else #error "not defined" #endif } //------------------------------------------------------------------------------ /// Disables the pull-up on the D+ line to disconnect the device from the bus. //------------------------------------------------------------------------------ void USBD_Disconnect( void ) { TRACE_DEBUG_WP("Disc "); #if defined(BOARD_USB_PULLUP_INTERNAL) AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_DETACH; #else #error "not defined" #endif // Device returns to the Powered state if (deviceState > USBD_STATE_POWERED) { deviceState = USBD_STATE_POWERED; } } //------------------------------------------------------------------------------ /// Certification test for High Speed device. /// \param bIndex Test to be done //------------------------------------------------------------------------------ void USBD_Test( unsigned char bIndex ) { char *pFifo; unsigned char i; AT91C_BASE_OTGHS->OTGHS_DEVIDR &= ~AT91C_OTGHS_SUSP; AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_SPDCONF_HS; // remove suspend ? switch( bIndex ) { case USBFeatureRequest_TESTPACKET: TRACE_DEBUG_WP("TEST_PACKET "); AT91C_BASE_OTGHS->OTGHS_DEVDMA[1].OTGHS_DEVDMACONTROL = 0; // raz AT91C_BASE_OTGHS->OTGHS_DEVDMA[2].OTGHS_DEVDMACONTROL = 0; // raz // Configure endpoint 2, 64 bytes, direction IN, type BULK, 1 bank AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[2] = AT91C_OTGHS_EPT_SIZE_64 | AT91C_OTGHS_EPT_DIR_IN | AT91C_OTGHS_EPT_TYPE_BUL_EPT | AT91C_OTGHS_BK_NUMBER_1; // Check if the configuration is ok AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[2] |= AT91C_OTGHS_ALLOC; while((AT91C_BASE_OTGHS->OTGHS_DEVEPTISR[2]&AT91C_OTGHS_CFGOK)==0) { } AT91C_BASE_OTGHS->OTGHS_DEVEPT |= AT91C_OTGHS_EPEN2; // Write FIFO pFifo = (char*)((unsigned int *)AT91C_BASE_OTGHS_EPTFIFO + (EPT_VIRTUAL_SIZE * 2)); for( i=0; iOTGHS_DEVCTRL |= AT91C_OTGHS_TSTPCKT; // Send packet AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[2] = AT91C_OTGHS_TXINI; break; case USBFeatureRequest_TESTJ: TRACE_DEBUG_WP("TEST_J "); AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_TSTJ; break; case USBFeatureRequest_TESTK: TRACE_DEBUG_WP("TEST_K "); AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_TSTK; break; case USBFeatureRequest_TESTSE0NAK: TRACE_DEBUG_WP("TEST_SEO_NAK "); AT91C_BASE_OTGHS->OTGHS_DEVIDR = 0xFFFFFFFF; break; case USBFeatureRequest_TESTSENDZLP: //while( 0 != (AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSTA & AT91C_UDPHS_TX_PK_RDY ) ) {} AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[0] = AT91C_OTGHS_TXINI; //while( 0 != (AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSTA & AT91C_UDPHS_TX_PK_RDY ) ) {} TRACE_DEBUG_WP("SEND_ZLP "); break; } TRACE_DEBUG_WP("\n\r"); } //------------------------------------------------------------------------------ /// Initializes the specified USB driver /// This function initializes the current FIFO bank of endpoints, /// configures the pull-up and VBus lines, disconnects the pull-up and /// then trigger the Init callback. //------------------------------------------------------------------------------ void USBD_Init(void) { // forceFS must not be used ! int i; TRACE_DEBUG_WP("USBD Init()\n\r"); // disable Watchdog AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS; // Enable USB macro *AT91C_OTGHS_CTRL |= AT91C_OTGHS_USBECTRL; // Automatic mode speed for device *AT91C_OTGHS_DEVCTRL &= ~AT91C_OTGHS_SPDCONF_FS; // Normal mode *AT91C_OTGHS_DEVCTRL &= ~( AT91C_OTGHS_LS | AT91C_OTGHS_TSTJ | AT91C_OTGHS_TSTK | AT91C_OTGHS_TSTPCKT | AT91C_OTGHS_OPMODE2 ); // Normal mode AT91C_BASE_OTGHS->OTGHS_DEVCTRL = 0; AT91C_BASE_OTGHS->OTGHS_HSTCTRL = 0; // Enable OTG pad *AT91C_OTGHS_CTRL |= AT91C_OTGHS_OTGPADE; // Enable clock OTG pad *AT91C_OTGHS_CTRL &= ~AT91C_OTGHS_FRZCLKCTRL; //Usb_disable(); AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_USBECTRL; AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_OTGPADE; AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_FRZCLKCTRL; //Usb_enable(); AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_USBECTRL; AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_OTGPADE; AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_FRZCLKCTRL; //Usb_select_device(); AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_UIDE; AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_UIMOD; // Device is in the Attached state deviceState = USBD_STATE_SUSPENDED; previousDeviceState = USBD_STATE_POWERED; PMC_EnablePeripheral(AT91C_ID_OTGHS); // Reset endpoint structures OTGHS_ResetEndpoints(); // Enables the USB Clock OTGHS_EnableUsbClock(); //926C // Enable USB macro and clear all other bit AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_USBECTRL; AT91C_BASE_OTGHS->OTGHS_CTRL = AT91C_OTGHS_USBECTRL; // Configure the pull-up on D+ and disconnect it USBD_Disconnect(); // Enable clock OTG pad AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_FRZCLKCTRL; TRACE_DEBUG("AT91C_OTGHS_CTRL: 0x%X\n\r", AT91C_BASE_OTGHS->OTGHS_CTRL ); // Clear General IT AT91C_BASE_OTGHS->OTGHS_SCR = 0x01FF; // Clear OTG Device IT AT91C_BASE_OTGHS->OTGHS_DEVICR = 0xFF; // Clear OTG Host IT AT91C_BASE_OTGHS->OTGHS_HSTICR = 0x7F; // Reset all Endpoints Fifos AT91C_BASE_OTGHS->OTGHS_DEVEPT |= (0x7F<<16); AT91C_BASE_OTGHS->OTGHS_DEVEPT &= ~(0x7F<<16); // Disable all endpoints AT91C_BASE_OTGHS->OTGHS_DEVEPT &= ~0x7F; AT91C_BASE_OTGHS->OTGHS_TSTA2 = 0; // Device is in the Attached state deviceState = USBD_STATE_SUSPENDED; previousDeviceState = USBD_STATE_POWERED; // Automatic mode speed for device AT91C_BASE_OTGHS->OTGHS_DEVCTRL &= ~AT91C_OTGHS_SPDCONF_FS; // Force Full Speed mode for device //*AT91C_OTGHS_DEVCTRL = AT91C_OTGHS_SPDCONF_FS; // Force High Speed mode for device //*AT91C_OTGHS_DEVCTRL = AT91C_OTGHS_SPDCONF_HS; AT91C_BASE_OTGHS->OTGHS_DEVCTRL &= ~( AT91C_OTGHS_LS | AT91C_OTGHS_TSTJ | AT91C_OTGHS_TSTK | AT91C_OTGHS_TSTPCKT | AT91C_OTGHS_OPMODE2 ); // Automatic mode speed for host AT91C_BASE_OTGHS->OTGHS_HSTCTRL &= ~AT91C_OTGHS_SPDCONF_HST_FS; // Force Full Speed mode for host //AT91C_BASE_OTGHS->OTGHS_HSTCTRL = AT91C_OTGHS_SPDCONF_HST_FS; // Force High Speed mode for host //*AT91C_BASE_OTGHS->OTGHS_HSTCTRL = AT91C_OTGHS_SPDCONF_HST_HS; // Enable the UID pin select AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_UIDE; // Enable USB macro AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_USBECTRL; // Enable OTG pad AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_OTGPADE; // Enable clock OTG pad AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_FRZCLKCTRL; // With OR without DMA !!! // Initialization of DMA for( i=1; i<=((AT91C_BASE_OTGHS->OTGHS_IPFEATURES & AT91C_OTGHS_DMA_CHANNEL_NBR)>>4); i++ ) { // RESET endpoint canal DMA: // DMA stop channel command AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMACONTROL = 0; // STOP command // Disable endpoint AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[i] = 0XFFFFFFFF; // Reset endpoint config AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[i] = 0; // Reset DMA channel (Buff count and Control field) AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMACONTROL = 0x02; // NON STOP command // Reset DMA channel 0 (STOP) AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMACONTROL = 0; // STOP command // Clear DMA channel status (read the register for clear it) AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMASTATUS = AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMASTATUS; } // Configure interrupts USBDCallbacks_Initialized(); AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_VBUSTI; TRACE_DEBUG("AT91C_OTGHS_CTRL: 0x%X\n\r", AT91C_BASE_OTGHS->OTGHS_CTRL ); TRACE_DEBUG("AT91C_OTGHS_SR: 0x%X\n\r", AT91C_BASE_OTGHS->OTGHS_SR ); AT91C_BASE_OTGHS->OTGHS_DEVIER = AT91C_OTGHS_WAKEUP; TRACE_DEBUG("NUM_IT_MAX_DMA: 0x%X\n\r", NUM_IT_MAX_DMA ); TRACE_DEBUG("NUM_IT_MAX: 0x%X\n\r", NUM_IT_MAX ); } //------------------------------------------------------------------------------ /// Returns the current state of the USB device. /// \return Device current state. //------------------------------------------------------------------------------ unsigned char USBD_GetState( void ) { return deviceState; } #endif // BOARD_USB_OTGHS tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_UDP.c000066400000000000000000001266211207233610700260200ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ /** \unit !!!Purpose Implementation of USB device functions on a UDP controller. See "USBD API Methods". */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBD.h" #include "USBDCallbacks.h" #include #include #include #include #include #include #if defined(BOARD_USB_UDP) //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "UDP register field values" /// /// This page lists the initialize values of UDP registers. /// /// !Values /// - UDP_RXDATA /// Bit mask for both banks of the UDP_CSR register. #define UDP_RXDATA (AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1) //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "Endpoint states" /// /// This page lists the endpoint states. /// /// !States // - UDP_ENDPOINT_DISABLED // - UDP_ENDPOINT_HALTED // - UDP_ENDPOINT_IDLE // - UDP_ENDPOINT_SENDING // - UDP_ENDPOINT_RECEIVING /// Endpoint states: Endpoint is disabled #define UDP_ENDPOINT_DISABLED 0 /// Endpoint states: Endpoint is halted (i.e. STALLs every request) #define UDP_ENDPOINT_HALTED 1 /// Endpoint states: Endpoint is idle (i.e. ready for transmission) #define UDP_ENDPOINT_IDLE 2 /// Endpoint states: Endpoint is sending data #define UDP_ENDPOINT_SENDING 3 /// Endpoint states: Endpoint is receiving data #define UDP_ENDPOINT_RECEIVING 4 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// \page "UDP_CSR register access" /// /// This page lists the macroes to access UDP CSR register. /// /// !Macros /// - CLEAR_CSR /// - SET_CSR /// Bitmap for all status bits in CSR. #define REG_NO_EFFECT_1_ALL AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 \ |AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP \ |AT91C_UDP_TXCOMP /// Clears the specified bit(s) in the UDP_CSR register. /// \param endpoint The endpoint number of the CSR to process. /// \param flags The bitmap to set to 1. #define SET_CSR(endpoint, flags) \ { \ volatile unsigned int reg; \ reg = AT91C_BASE_UDP->UDP_CSR[endpoint] ; \ reg |= REG_NO_EFFECT_1_ALL; \ reg |= (flags); \ AT91C_BASE_UDP->UDP_CSR[endpoint] = reg; \ while ( (AT91C_BASE_UDP->UDP_CSR[endpoint] & (flags)) != (flags)); \ } /// Sets the specified bit(s) in the UDP_CSR register. /// \param endpoint The endpoint number of the CSR to process. /// \param flags The bitmap to clear to 0. #define CLEAR_CSR(endpoint, flags) \ { \ volatile unsigned int reg; \ reg = AT91C_BASE_UDP->UDP_CSR[endpoint]; \ reg |= REG_NO_EFFECT_1_ALL; \ reg &= ~(flags); \ AT91C_BASE_UDP->UDP_CSR[endpoint] = reg; \ while ( (AT91C_BASE_UDP->UDP_CSR[endpoint] & (flags)) == (flags)); \ } //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Types //------------------------------------------------------------------------------ /// Describes an ongoing transfer on a UDP endpoint. typedef struct { /// Pointer to a data buffer used for emission/reception. char *pData; /// Number of bytes which have been written into the UDP internal FIFO /// buffers. volatile int buffered; /// Number of bytes which have been sent/received. volatile int transferred; /// Number of bytes which have not been buffered/transferred yet. volatile int remaining; /// Optional callback to invoke when the transfer completes. volatile TransferCallback fCallback; /// Optional argument to the callback function. void *pArgument; } Transfer; //------------------------------------------------------------------------------ /// Describes the state of an endpoint of the UDP controller. //------------------------------------------------------------------------------ typedef struct { /// Current endpoint state. volatile unsigned char state; /// Current reception bank (0 or 1). volatile unsigned char bank; /// Maximum packet size for the endpoint. volatile unsigned short size; /// Describes an ongoing transfer (if current state is either /// or ) Transfer transfer; } Endpoint; //------------------------------------------------------------------------------ // Internal variables //------------------------------------------------------------------------------ /// Holds the internal state for each endpoint of the UDP. static Endpoint endpoints[BOARD_USB_NUMENDPOINTS]; /// Device current state. static unsigned char deviceState; /// Indicates the previous device state static unsigned char previousDeviceState; //------------------------------------------------------------------------------ // Internal Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Enables the clock of the UDP peripheral. //------------------------------------------------------------------------------ static inline void UDP_EnablePeripheralClock(void) { AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_UDP; } //------------------------------------------------------------------------------ /// Disables the UDP peripheral clock. //------------------------------------------------------------------------------ static inline void UDP_DisablePeripheralClock(void) { AT91C_BASE_PMC->PMC_PCDR = 1 << AT91C_ID_UDP; } //------------------------------------------------------------------------------ /// Enables the 48MHz USB clock. //------------------------------------------------------------------------------ static inline void UDP_EnableUsbClock(void) { AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP; } //------------------------------------------------------------------------------ /// Disables the 48MHz USB clock. //------------------------------------------------------------------------------ static inline void UDP_DisableUsbClock(void) { AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_UDP; } //------------------------------------------------------------------------------ /// Enables the UDP transceiver. //------------------------------------------------------------------------------ static inline void UDP_EnableTransceiver(void) { AT91C_BASE_UDP->UDP_TXVC &= ~AT91C_UDP_TXVDIS; } //------------------------------------------------------------------------------ /// Disables the UDP transceiver. //------------------------------------------------------------------------------ static inline void UDP_DisableTransceiver(void) { AT91C_BASE_UDP->UDP_TXVC |= AT91C_UDP_TXVDIS; } //------------------------------------------------------------------------------ /// Handles a completed transfer on the given endpoint, invoking the /// configured callback if any. /// \param bEndpoint Number of the endpoint for which the transfer has completed. /// \param bStatus Status code returned by the transfer operation //------------------------------------------------------------------------------ static void UDP_EndOfTransfer(unsigned char bEndpoint, char bStatus) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Check that endpoint was sending or receiving data if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING)) { TRACE_DEBUG_WP("Eo"); // Endpoint returns in Idle state pEndpoint->state = UDP_ENDPOINT_IDLE; // Invoke callback is present if (pTransfer->fCallback != 0) { ((TransferCallback) pTransfer->fCallback) (pTransfer->pArgument, bStatus, pTransfer->transferred, pTransfer->remaining + pTransfer->buffered); } else { TRACE_DEBUG_WP("No callBack\n\r"); } } } //------------------------------------------------------------------------------ /// Clears the correct reception flag (bank 0 or bank 1) of an endpoint /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ static void UDP_ClearRxFlag(unsigned char bEndpoint) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); // Clear flag and change banks if (pEndpoint->bank == 0) { CLEAR_CSR(bEndpoint, AT91C_UDP_RX_DATA_BK0); // Swap bank if in dual-fifo mode if (BOARD_USB_ENDPOINTS_BANKS(bEndpoint) > 1) { pEndpoint->bank = 1; } } else { CLEAR_CSR(bEndpoint, AT91C_UDP_RX_DATA_BK1); pEndpoint->bank = 0; } } //------------------------------------------------------------------------------ /// Transfers a data payload from the current tranfer buffer to the endpoint /// FIFO /// \param bEndpoint Number of the endpoint which is sending data. //------------------------------------------------------------------------------ static void UDP_WritePayload(unsigned char bEndpoint) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); signed int size; // Get the number of bytes to send size = pEndpoint->size; if (size > pTransfer->remaining) { size = pTransfer->remaining; } // Update transfer descriptor information pTransfer->buffered += size; pTransfer->remaining -= size; // Write packet in the FIFO buffer while (size > 0) { AT91C_BASE_UDP->UDP_FDR[bEndpoint] = *(pTransfer->pData); pTransfer->pData++; size--; } } //------------------------------------------------------------------------------ /// Transfers a data payload from an endpoint FIFO to the current transfer buffer /// \param bEndpoint Endpoint number. /// \param wPacketSize Size of received data packet //------------------------------------------------------------------------------ static void UDP_ReadPayload(unsigned char bEndpoint, int wPacketSize) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Check that the requested size is not bigger than the remaining transfer if (wPacketSize > pTransfer->remaining) { pTransfer->buffered += wPacketSize - pTransfer->remaining; wPacketSize = pTransfer->remaining; } // Update transfer descriptor information pTransfer->remaining -= wPacketSize; pTransfer->transferred += wPacketSize; // Retrieve packet while (wPacketSize > 0) { *(pTransfer->pData) = (char) AT91C_BASE_UDP->UDP_FDR[bEndpoint]; pTransfer->pData++; wPacketSize--; } } //------------------------------------------------------------------------------ /// Received SETUP packet from endpoint 0 FIFO /// \param pRequest Generic USB SETUP request sent over Control endpoints //------------------------------------------------------------------------------ static void UDP_ReadRequest(USBGenericRequest *pRequest) { unsigned char *pData = (unsigned char *)pRequest; unsigned int i; // Copy packet for (i = 0; i < 8; i++) { *pData = (unsigned char) AT91C_BASE_UDP->UDP_FDR[0]; pData++; } } //------------------------------------------------------------------------------ /// Reset all endpoint transfer descriptors //------------------------------------------------------------------------------ static void UDP_ResetEndpoints( void ) { Endpoint *pEndpoint; Transfer *pTransfer; unsigned char bEndpoint; // Reset the transfer descriptor of every endpoint for (bEndpoint = 0; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++) { pEndpoint = &(endpoints[bEndpoint]); pTransfer = &(pEndpoint->transfer); // Reset endpoint transfer descriptor pTransfer->pData = 0; pTransfer->transferred = -1; pTransfer->buffered = -1; pTransfer->remaining = -1; pTransfer->fCallback = 0; pTransfer->pArgument = 0; // Reset endpoint state pEndpoint->bank = 0; pEndpoint->state = UDP_ENDPOINT_DISABLED; } } //------------------------------------------------------------------------------ /// Disable all endpoints (except control endpoint 0), aborting current /// transfers if necessary //------------------------------------------------------------------------------ static void UDP_DisableEndpoints( void ) { unsigned char bEndpoint; // Disable each endpoint, terminating any pending transfer // Control endpoint 0 is not disabled for (bEndpoint = 1; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++) { UDP_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED); endpoints[bEndpoint].state = UDP_ENDPOINT_DISABLED; } } //------------------------------------------------------------------------------ /// Checks if an ongoing transfer on an endpoint has been completed. /// \param bEndpoint Endpoint number. /// \return 1 if the current transfer on the given endpoint is complete; /// otherwise 0. //------------------------------------------------------------------------------ static unsigned char UDP_IsTransferFinished(unsigned char bEndpoint) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Check if it is a Control endpoint // -> Control endpoint must always finish their transfer with a zero-length // packet if ((AT91C_BASE_UDP->UDP_CSR[bEndpoint] & AT91C_UDP_EPTYPE) == AT91C_UDP_EPTYPE_CTRL) { return (pTransfer->buffered < pEndpoint->size); } // Other endpoints only need to transfer all the data else { return (pTransfer->buffered <= pEndpoint->size) && (pTransfer->remaining == 0); } } //------------------------------------------------------------------------------ /// Endpoint interrupt handler. /// Handle IN/OUT transfers, received SETUP packets and STALLing /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ static void UDP_EndpointHandler(unsigned char bEndpoint) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); unsigned int status = AT91C_BASE_UDP->UDP_CSR[bEndpoint]; unsigned short wPacketSize; USBGenericRequest request; TRACE_DEBUG_WP("E%d ", bEndpoint); TRACE_DEBUG_WP("st:0x%X ", status); // Handle interrupts // IN packet sent if ((status & AT91C_UDP_TXCOMP) != 0) { TRACE_DEBUG_WP("Wr "); // Check that endpoint was in Sending state if (pEndpoint->state == UDP_ENDPOINT_SENDING) { // End of transfer ? if (UDP_IsTransferFinished(bEndpoint)) { pTransfer->transferred += pTransfer->buffered; pTransfer->buffered = 0; // Disable interrupt if this is not a control endpoint if ((status & AT91C_UDP_EPTYPE) != AT91C_UDP_EPTYPE_CTRL) { AT91C_BASE_UDP->UDP_IDR = 1 << bEndpoint; } UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); CLEAR_CSR(bEndpoint, AT91C_UDP_TXCOMP); } else { // Transfer remaining data TRACE_DEBUG_WP(" %d ", pEndpoint->size); pTransfer->transferred += pEndpoint->size; pTransfer->buffered -= pEndpoint->size; // Send next packet if (BOARD_USB_ENDPOINTS_BANKS(bEndpoint) == 1) { // No double buffering UDP_WritePayload(bEndpoint); SET_CSR(bEndpoint, AT91C_UDP_TXPKTRDY); CLEAR_CSR(bEndpoint, AT91C_UDP_TXCOMP); } else { // Double buffering SET_CSR(bEndpoint, AT91C_UDP_TXPKTRDY); CLEAR_CSR(bEndpoint, AT91C_UDP_TXCOMP); UDP_WritePayload(bEndpoint); } } } else { // Acknowledge interrupt TRACE_ERROR("Error Wr"); CLEAR_CSR(bEndpoint, AT91C_UDP_TXCOMP); } } // OUT packet received if ((status & UDP_RXDATA) != 0) { TRACE_DEBUG_WP("Rd "); // Check that the endpoint is in Receiving state if (pEndpoint->state != UDP_ENDPOINT_RECEIVING) { // Check if an ACK has been received on a Control endpoint if (((status & AT91C_UDP_EPTYPE) == AT91C_UDP_EPTYPE_CTRL) && ((status & AT91C_UDP_RXBYTECNT) == 0)) { // Acknowledge the data and finish the current transfer UDP_ClearRxFlag(bEndpoint); UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); } // Check if the data has been STALLed else if ((status & AT91C_UDP_FORCESTALL) != 0) { // Discard STALLed data TRACE_DEBUG_WP("Discard "); UDP_ClearRxFlag(bEndpoint); } // NAK the data else { TRACE_DEBUG_WP("Nak "); AT91C_BASE_UDP->UDP_IDR = 1 << bEndpoint; } } // Endpoint is in Read state else { // Retrieve data and store it into the current transfer buffer wPacketSize = (unsigned short) (status >> 16); TRACE_DEBUG_WP("%d ", wPacketSize); UDP_ReadPayload(bEndpoint, wPacketSize); UDP_ClearRxFlag(bEndpoint); // Check if the transfer is finished if ((pTransfer->remaining == 0) || (wPacketSize < pEndpoint->size)) { // Disable interrupt if this is not a control endpoint if ((status & AT91C_UDP_EPTYPE) != AT91C_UDP_EPTYPE_CTRL) { AT91C_BASE_UDP->UDP_IDR = 1 << bEndpoint; } UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); } } } // STALL sent if ((status & AT91C_UDP_STALLSENT) != 0) { TRACE_WARNING( "Sta 0x%X [%d] ", status, bEndpoint); // If the endpoint is not halted, clear the STALL condition CLEAR_CSR(bEndpoint, AT91C_UDP_STALLSENT); if (pEndpoint->state != UDP_ENDPOINT_HALTED) { TRACE_WARNING( "_ " ); CLEAR_CSR(bEndpoint, AT91C_UDP_FORCESTALL); } } // SETUP packet received if ((status & AT91C_UDP_RXSETUP) != 0) { TRACE_DEBUG_WP("Stp "); // If a transfer was pending, complete it // Handles the case where during the status phase of a control write // transfer, the host receives the device ZLP and ack it, but the ack // is not received by the device if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING)) { UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); } // Copy the setup packet UDP_ReadRequest(&request); // Set the DIR bit before clearing RXSETUP in Control IN sequence if (USBGenericRequest_GetDirection(&request) == USBGenericRequest_IN) { SET_CSR(bEndpoint, AT91C_UDP_DIR); } // Acknowledge setup packet CLEAR_CSR(bEndpoint, AT91C_UDP_RXSETUP); // Forward the request to the upper layer USBDCallbacks_RequestReceived(&request); } } //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// USB interrupt handler /// Manages device resume, suspend, end of bus reset. /// Forwards endpoint interrupts to the appropriate handler. //------------------------------------------------------------------------------ void RealUdphsIrqHandler() @spontaneous() { unsigned int status; int eptnum = 0; // Get interrupt status // Some interrupts may get masked depending on the device state status = AT91C_BASE_UDP->UDP_ISR; status &= AT91C_BASE_UDP->UDP_IMR; if (deviceState < USBD_STATE_POWERED) { status &= AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM; AT91C_BASE_UDP->UDP_ICR = ~status; } // Return immediately if there is no interrupt to service if (status == 0) { return; } // Toggle USB LED if the device is active if (deviceState >= USBD_STATE_POWERED) { //LED_Set(USBD_LEDUSB); //TOSH_SET_GREEN_LED_PIN(); } // Service interrupts //// Start Of Frame (SOF) //if (ISSET(dStatus, AT91C_UDP_SOFINT)) { // // TRACE_DEBUG("SOF"); // // // Invoke the SOF callback // USB_StartOfFrameCallback(pUsb); // // // Acknowledge interrupt // AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_SOFINT; // dStatus &= ~AT91C_UDP_SOFINT; //} // Suspend // This interrupt is always treated last (hence the '==') if (status == AT91C_UDP_RXSUSP) { TRACE_INFO_WP("Susp "); // Don't do anything if the device is already suspended if (deviceState != USBD_STATE_SUSPENDED) { // The device enters the Suspended state // Enable wakeup AT91C_BASE_UDP->UDP_IER = AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM; // Acknowledge interrupt AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_RXSUSP; // Switch to the Suspended state previousDeviceState = deviceState; deviceState = USBD_STATE_SUSPENDED; // Invoke the Suspended callback USBDCallbacks_Suspended(); UDP_DisableTransceiver(); UDP_DisablePeripheralClock(); UDP_DisableUsbClock(); } } // Resume else if ((status & (AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM)) != 0) { TRACE_INFO_WP("Res "); // Don't do anything if the device was not suspended if (deviceState == USBD_STATE_SUSPENDED) { // The device enters its previous state UDP_EnablePeripheralClock(); UDP_EnableUsbClock(); // Enable the transceiver if the device was past the Default // state deviceState = previousDeviceState; if (deviceState >= USBD_STATE_DEFAULT) { UDP_EnableTransceiver(); // Invoke the Resume callback USBDCallbacks_Resumed(); } } // Clear and disable resume interrupts AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM | AT91C_UDP_RXSUSP; AT91C_BASE_UDP->UDP_IDR = AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM; } // End of bus reset else if ((status & AT91C_UDP_ENDBUSRES) != 0) { TRACE_INFO_WP("EoBRes "); // The device enters the Default state deviceState = USBD_STATE_DEFAULT; UDP_EnableTransceiver(); UDP_ResetEndpoints(); UDP_DisableEndpoints(); USBD_ConfigureEndpoint(0); // Flush and enable the Suspend interrupt AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM | AT91C_UDP_RXSUSP; AT91C_BASE_UDP->UDP_IER = AT91C_UDP_RXSUSP; //// Enable the Start Of Frame (SOF) interrupt if needed //if (pUsb->pCallbacks->startOfFrame != 0) { // // AT91C_BASE_UDP->UDP_IER = AT91C_UDP_SOFINT; //} // Invoke the Reset callback USBDCallbacks_Reset(); // Acknowledge end of bus reset interrupt AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_ENDBUSRES; } // Endpoint interrupts else { while (status != 0) { // Check if endpoint has a pending interrupt if ((status & (1 << eptnum)) != 0) { UDP_EndpointHandler(eptnum); status &= ~(1 << eptnum); if (status != 0) { TRACE_INFO_WP("\n\r - "); } } eptnum++; } } // Toggle LED back to its previous state TRACE_INFO_WP("\n\r"); if (deviceState >= USBD_STATE_POWERED) { //LED_Clear(USBD_LEDUSB); //TOSH_CLR_GREEN_LED_PIN(); } } void UdphsIrqHandler(void) @C() @spontaneous() { call UdphsInterruptWrapper.preamble(); RealUdphsIrqHandler(); call UdphsInterruptWrapper.postamble(); } //------------------------------------------------------------------------------ /// Configures an endpoint according to its Endpoint Descriptor. /// \param pDescriptor Pointer to an Endpoint descriptor. //------------------------------------------------------------------------------ void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor) { Endpoint *pEndpoint; unsigned char bEndpoint; unsigned char bType; unsigned char bEndpointDir; // NULL descriptor -> Control endpoint 0 if (pDescriptor == 0) { bEndpoint = 0; pEndpoint = &(endpoints[bEndpoint]); bType= USBEndpointDescriptor_CONTROL; bEndpointDir = 0; pEndpoint->size = BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0); } else { bEndpoint = USBEndpointDescriptor_GetNumber(pDescriptor); pEndpoint = &(endpoints[bEndpoint]); bType = USBEndpointDescriptor_GetType(pDescriptor); bEndpointDir = USBEndpointDescriptor_GetDirection(pDescriptor); pEndpoint->size = USBEndpointDescriptor_GetMaxPacketSize(pDescriptor); } // Abort the current transfer is the endpoint was configured and in // Write or Read state if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING)) { UDP_EndOfTransfer(bEndpoint, USBD_STATUS_RESET); } pEndpoint->state = UDP_ENDPOINT_IDLE; // Reset Endpoint Fifos AT91C_BASE_UDP->UDP_RSTEP |= (1 << bEndpoint); AT91C_BASE_UDP->UDP_RSTEP &= ~(1 << bEndpoint); // Configure endpoint if (bType != USBEndpointDescriptor_CONTROL) { SET_CSR(bEndpoint, (unsigned int)AT91C_UDP_EPEDS | (bType << 8) | (bEndpointDir << 10)); } else { SET_CSR(bEndpoint, (bType << 8) | (bEndpointDir << 10)); AT91C_BASE_UDP->UDP_IER = (1 << bEndpoint); } TRACE_INFO_WP("CfgEpt%d ", bEndpoint); } //------------------------------------------------------------------------------ /// Sends data through a USB endpoint. Sets up the transfer descriptor, /// writes one or two data payloads (depending on the number of FIFO bank /// for the endpoint) and then starts the actual transfer. The operation is /// complete when all the data has been sent. /// /// *If the size of the buffer is greater than the size of the endpoint /// (or twice the size if the endpoint has two FIFO banks), then the buffer /// must be kept allocated until the transfer is finished*. This means that /// it is not possible to declare it on the stack (i.e. as a local variable /// of a function which returns after starting a transfer). /// /// \param bEndpoint Endpoint number. /// \param pData Pointer to a buffer with the data to send. /// \param dLength Size of the data buffer. /// \param fCallback Optional callback function to invoke when the transfer is /// complete. /// \param pArgument Optional argument to the callback function. /// \return USBD_STATUS_SUCCESS if the transfer has been started; /// otherwise, the corresponding error status code. //------------------------------------------------------------------------------ char USBD_Write( unsigned char bEndpoint, const void *pData, unsigned int dLength, TransferCallback fCallback, void *pArgument ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Check that the endpoint is in Idle state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { return USBD_STATUS_LOCKED; } TRACE_DEBUG_WP("Write%d(%d) ", bEndpoint, dLength); // Setup the transfer descriptor pTransfer->pData = (void *) pData; pTransfer->remaining = dLength; pTransfer->buffered = 0; pTransfer->transferred = 0; pTransfer->fCallback = fCallback; pTransfer->pArgument = pArgument; // Send the first packet pEndpoint->state = UDP_ENDPOINT_SENDING; while((AT91C_BASE_UDP->UDP_CSR[bEndpoint]&AT91C_UDP_TXPKTRDY)==AT91C_UDP_TXPKTRDY); UDP_WritePayload(bEndpoint); SET_CSR(bEndpoint, AT91C_UDP_TXPKTRDY); // If double buffering is enabled and there is data remaining, // prepare another packet if ((BOARD_USB_ENDPOINTS_BANKS(bEndpoint) > 1) && (pTransfer->remaining > 0)) { UDP_WritePayload(bEndpoint); } // Enable interrupt on endpoint AT91C_BASE_UDP->UDP_IER = 1 << bEndpoint; return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Reads incoming data on an USB endpoint This methods sets the transfer /// descriptor and activate the endpoint interrupt. The actual transfer is /// then carried out by the endpoint interrupt handler. The Read operation /// finishes either when the buffer is full, or a short packet (inferior to /// endpoint maximum size) is received. /// /// *The buffer must be kept allocated until the transfer is finished*. /// \param bEndpoint Endpoint number. /// \param pData Pointer to a data buffer. /// \param dLength Size of the data buffer in bytes. /// \param fCallback Optional end-of-transfer callback function. /// \param pArgument Optional argument to the callback function. /// \return USBD_STATUS_SUCCESS if the read operation has been started; /// otherwise, the corresponding error code. //------------------------------------------------------------------------------ char USBD_Read(unsigned char bEndpoint, void *pData, unsigned int dLength, TransferCallback fCallback, void *pArgument) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Return if the endpoint is not in IDLE state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { return USBD_STATUS_LOCKED; } // Endpoint enters Receiving state pEndpoint->state = UDP_ENDPOINT_RECEIVING; TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength); // Set the transfer descriptor pTransfer->pData = pData; pTransfer->remaining = dLength; pTransfer->buffered = 0; pTransfer->transferred = 0; pTransfer->fCallback = fCallback; pTransfer->pArgument = pArgument; // Enable interrupt on endpoint AT91C_BASE_UDP->UDP_IER = 1 << bEndpoint; return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Sets the HALT feature on the given endpoint (if not already in this state). /// \param bEndpoint Endpoint number. //------------------------------------------------------------------------------ void USBD_Halt(unsigned char bEndpoint) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); // Check that endpoint is enabled and not already in Halt state if ((pEndpoint->state != UDP_ENDPOINT_DISABLED) && (pEndpoint->state != UDP_ENDPOINT_HALTED)) { TRACE_DEBUG_WP("Halt%d ", bEndpoint); // Abort the current transfer if necessary UDP_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED); // Put endpoint into Halt state SET_CSR(bEndpoint, AT91C_UDP_FORCESTALL); pEndpoint->state = UDP_ENDPOINT_HALTED; // Enable the endpoint interrupt AT91C_BASE_UDP->UDP_IER = 1 << bEndpoint; } } //------------------------------------------------------------------------------ /// Clears the Halt feature on the given endpoint. /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ void USBD_Unhalt(unsigned char bEndpoint) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); // Check if the endpoint is enabled if (pEndpoint->state != UDP_ENDPOINT_DISABLED) { TRACE_DEBUG_WP("Unhalt%d ", bEndpoint); // Return endpoint to Idle state pEndpoint->state = UDP_ENDPOINT_IDLE; // Clear FORCESTALL flag CLEAR_CSR(bEndpoint, AT91C_UDP_FORCESTALL); // Reset Endpoint Fifos, beware this is a 2 steps operation AT91C_BASE_UDP->UDP_RSTEP |= 1 << bEndpoint; AT91C_BASE_UDP->UDP_RSTEP &= ~(1 << bEndpoint); } } //------------------------------------------------------------------------------ /// Returns the current Halt status of an endpoint. /// \param bEndpoint Index of endpoint /// \return 1 if the endpoint is currently halted; otherwise 0 //------------------------------------------------------------------------------ unsigned char USBD_IsHalted(unsigned char bEndpoint) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); unsigned char status = 0; if (pEndpoint->state == UDP_ENDPOINT_HALTED) { status = 1; } return( status ); } //------------------------------------------------------------------------------ /// Indicates if the device is running in high or full-speed. Always returns 0 /// since UDP does not support high-speed mode. //------------------------------------------------------------------------------ unsigned char USBD_IsHighSpeed(void) { return 0; } //------------------------------------------------------------------------------ /// Causes the given endpoint to acknowledge the next packet it receives /// with a STALL handshake. /// \param bEndpoint Endpoint number. /// \return USBD_STATUS_SUCCESS or USBD_STATUS_LOCKED. //------------------------------------------------------------------------------ unsigned char USBD_Stall(unsigned char bEndpoint) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); // Check that endpoint is in Idle state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { TRACE_WARNING("UDP_Stall: Endpoint%d locked\n\r", bEndpoint); return USBD_STATUS_LOCKED; } TRACE_DEBUG_WP("Stall%d ", bEndpoint); SET_CSR(bEndpoint, AT91C_UDP_FORCESTALL); return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Starts a remote wake-up procedure. //------------------------------------------------------------------------------ void USBD_RemoteWakeUp(void) { UDP_EnablePeripheralClock(); UDP_EnableUsbClock(); UDP_EnableTransceiver(); TRACE_INFO_WP("RWUp "); // Activates a remote wakeup (edge on ESR), then clear ESR AT91C_BASE_UDP->UDP_GLBSTATE |= AT91C_UDP_ESR; AT91C_BASE_UDP->UDP_GLBSTATE &= ~AT91C_UDP_ESR; } //------------------------------------------------------------------------------ /// Sets the device address to the given value. /// \param address New device address. //------------------------------------------------------------------------------ void USBD_SetAddress(unsigned char address) { TRACE_INFO_WP("SetAddr(%d) ", address); // Set address AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN | address; // If the address is 0, the device returns to the Default state if (address == 0) { AT91C_BASE_UDP->UDP_GLBSTATE = 0; deviceState = USBD_STATE_DEFAULT; } // If the address is non-zero, the device enters the Address state else { AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN; deviceState = USBD_STATE_ADDRESS; } } //------------------------------------------------------------------------------ /// Sets the current device configuration. /// \param cfgnum - Configuration number to set. //------------------------------------------------------------------------------ void USBD_SetConfiguration(unsigned char cfgnum) { TRACE_INFO_WP("SetCfg(%d) ", cfgnum); // If the configuration number if non-zero, the device enters the // Configured state if (cfgnum != 0) { // Enter Configured state deviceState = USBD_STATE_CONFIGURED; AT91C_BASE_UDP->UDP_GLBSTATE |= AT91C_UDP_CONFG; } // If the configuration number is zero, the device goes back to the Address // state else { deviceState = USBD_STATE_ADDRESS; AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN; // Abort all transfers UDP_DisableEndpoints(); } } //------------------------------------------------------------------------------ /// Connects the pull-up on the D+ line of the USB. //------------------------------------------------------------------------------ void USBD_Connect(void) { TRACE_DEBUG("Conn "); #if defined(BOARD_USB_PULLUP_EXTERNAL) const Pin pinPullUp = PIN_USB_PULLUP; if (pinPullUp.attribute == PIO_OUTPUT_0) { PIO_Set(&pinPullUp); } else { PIO_Clear(&pinPullUp); } #elif defined(BOARD_USB_PULLUP_INTERNAL) AT91C_BASE_UDP->UDP_TXVC |= AT91C_UDP_PUON; #elif defined(BOARD_USB_PULLUP_MATRIX) AT91C_BASE_MATRIX->MATRIX_USBPCR |= AT91C_MATRIX_USBPCR_PUON; #elif !defined(BOARD_USB_PULLUP_ALWAYSON) #error Unsupported pull-up type. #endif } //------------------------------------------------------------------------------ /// Disconnects the pull-up from the D+ line of the USB. //------------------------------------------------------------------------------ void USBD_Disconnect(void) { TRACE_DEBUG("Disc "); #if defined(BOARD_USB_PULLUP_EXTERNAL) const Pin pinPullUp = PIN_USB_PULLUP; if (pinPullUp.attribute == PIO_OUTPUT_0) { PIO_Clear(&pinPullUp); } else { PIO_Set(&pinPullUp); } #elif defined(BOARD_USB_PULLUP_INTERNAL) AT91C_BASE_UDP->UDP_TXVC &= ~AT91C_UDP_PUON; #elif defined(BOARD_USB_PULLUP_MATRIX) AT91C_BASE_MATRIX->MATRIX_USBPCR &= ~AT91C_MATRIX_USBPCR_PUON; #elif !defined(BOARD_USB_PULLUP_ALWAYSON) #error Unsupported pull-up type. #endif // Device returns to the Powered state if (deviceState > USBD_STATE_POWERED) { deviceState = USBD_STATE_POWERED; } if (previousDeviceState > USBD_STATE_POWERED) { previousDeviceState = USBD_STATE_POWERED; } } //------------------------------------------------------------------------------ /// Initializes the USB driver. //------------------------------------------------------------------------------ void USBD_Init(void) { TRACE_INFO_WP("USBD_Init\n\r"); // Reset endpoint structures UDP_ResetEndpoints(); // Configure the pull-up on D+ and disconnect it #if defined(BOARD_USB_PULLUP_EXTERNAL) const Pin pinPullUp = PIN_USB_PULLUP; PIO_Configure(&pinPullUp, 1); #elif defined(BOARD_USB_PULLUP_INTERNAL) AT91C_BASE_UDP->UDP_TXVC &= ~AT91C_UDP_PUON; #elif defined(BOARD_USB_PULLUP_MATRIX) AT91C_BASE_MATRIX->MATRIX_USBPCR &= ~AT91C_MATRIX_USBPCR_PUON; #elif !defined(BOARD_USB_PULLUP_ALWAYSON) #error Missing pull-up definition. #endif // Device is in the Attached state deviceState = USBD_STATE_SUSPENDED; previousDeviceState = USBD_STATE_POWERED; UDP_EnablePeripheralClock(); UDP_EnableUsbClock(); AT91C_BASE_UDP->UDP_IDR = 0xFE; AT91C_BASE_UDP->UDP_IER = AT91C_UDP_WAKEUP; // Configure interrupts USBDCallbacks_Initialized(); } //------------------------------------------------------------------------------ /// Configure USB Speed, should be invoked before USB attachment. /// \param forceFS Force to use FS mode. //------------------------------------------------------------------------------ void USBD_ConfigureSpeed(unsigned char forceFS) { } //------------------------------------------------------------------------------ /// Returns the current state of the USB device. /// \return Device current state. //------------------------------------------------------------------------------ unsigned char USBD_GetState(void) { return deviceState; } #endif // BOARD_USB_UDP tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_UDPHS.c000066400000000000000000001770161207233610700262570ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "USBD.h" #include "USBDCallbacks.h" #include "USBDDriver.h" #include #include #include #include #include #include #include #include #ifdef BOARD_USB_UDPHS //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ /// Maximum number of endpoints interrupts. #define NUM_IT_MAX \ (AT91C_BASE_UDPHS->UDPHS_IPFEATURES & AT91C_UDPHS_EPT_NBR_MAX) /// Maximum number of endpoint DMA interrupts #define NUM_IT_MAX_DMA \ ((AT91C_BASE_UDPHS->UDPHS_IPFEATURES & AT91C_UDPHS_DMA_CHANNEL_NBR)>>4) /// Bits that should be shifted to access DMA control bits. #define SHIFT_DMA 24 /// Bits that should be shifted to access interrupt bits. #define SHIFT_INTERUPT 8 /// Compile option, use DMA. Remove this define for not use DMA. #define DMA /// Max size of the FMA FIFO #define DMA_MAX_FIFO_SIZE 65536 #define EPT_VIRTUAL_SIZE 16384 //------------------------------------------------------------------------------ /// \page "Endpoint states" /// This page lists the endpoint states. /// !States // - UDP_ENDPOINT_DISABLED // - UDP_ENDPOINT_HALTED // - UDP_ENDPOINT_IDLE // - UDP_ENDPOINT_SENDING // - UDP_ENDPOINT_RECEIVING /// Endpoint states: Endpoint is disabled #define UDP_ENDPOINT_DISABLED 0 /// Endpoint states: Endpoint is halted (i.e. STALLs every request) #define UDP_ENDPOINT_HALTED 1 /// Endpoint states: Endpoint is idle (i.e. ready for transmission) #define UDP_ENDPOINT_IDLE 2 /// Endpoint states: Endpoint is sending data #define UDP_ENDPOINT_SENDING 3 /// Endpoint states: Endpoint is receiving data #define UDP_ENDPOINT_RECEIVING 4 //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Structures //------------------------------------------------------------------------------ /// Describes an ongoing transfer on a UDP endpoint. typedef struct { /// Pointer to a data buffer used for emission/reception. char *pData; /// Number of bytes which have been written into the UDP internal FIFO /// buffers. volatile int buffered; /// Number of bytes which have been sent/received. volatile int transferred; /// Number of bytes which have not been buffered/transferred yet. volatile int remaining; /// Optional callback to invoke when the transfer completes. volatile TransferCallback fCallback; /// Optional argument to the callback function. void *pArgument; } Transfer; //------------------------------------------------------------------------------ /// Describes the state of an endpoint of the UDP controller. //------------------------------------------------------------------------------ typedef struct { /// Current endpoint state. volatile unsigned char state; /// Current reception bank (0 or 1). unsigned char bank; /// Maximum packet size for the endpoint. unsigned short size; /// Describes an ongoing transfer (if current state is either /// or ) Transfer transfer; /// Special case for send a ZLP unsigned char sendZLP; } Endpoint; //------------------------------------------------------------------------------ // Internal variables //------------------------------------------------------------------------------ /// Holds the internal state for each endpoint of the UDP. static Endpoint endpoints[BOARD_USB_NUMENDPOINTS]; /// Device current state. static unsigned char deviceState; /// Indicates the previous device state static unsigned char previousDeviceState; /// 7.1.20 Test Mode Support /// Test codes for the USB HS test mode. static const char test_packet_buffer[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // JKJKJKJK * 9 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, // JJKKJJKK * 8 0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE, // JJJJKKKK * 8 0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, // JJJJJJJKKKKKKK * 8 0x7F,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD, // JJJJJJJK * 8 0xFC,0x7E,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD,0x7E // {JKKKKKKK * 10}, JK }; // Force HS static const unsigned char forceUsbFS = 0; //------------------------------------------------------------------------------ // Internal Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Disables the BIAS of the USB controller //------------------------------------------------------------------------------ static inline void UDPHS_DisableBIAS( void ) { // For CAP9, SAM9RL, HS #if !defined (BOARD_USB_NO_BIAS_COMMAND) AT91C_BASE_PMC->PMC_UCKR &= ~AT91C_CKGR_BIASEN_ENABLED; #endif } //------------------------------------------------------------------------------ /// Enables the BIAS of the USB controller //------------------------------------------------------------------------------ static inline void UDPHS_EnableBIAS( void ) { // For CAP9, SAM9RL, HS #if !defined (BOARD_USB_NO_BIAS_COMMAND) UDPHS_DisableBIAS(); AT91C_BASE_PMC->PMC_UCKR |= AT91C_CKGR_BIASEN_ENABLED; #endif } //------------------------------------------------------------------------------ /// Enable UDPHS clock //------------------------------------------------------------------------------ static inline void UDPHS_EnableUsbClock( void ) { #if !defined (PMC_BY_HARD) AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDPHS); // Enable 480MHZ //AT91C_BASE_CKGR->CKGR_UCKR |= (AT91C_CKGR_PLLCOUNT & (3 << 20)) | AT91C_CKGR_UPLLEN; AT91C_BASE_CKGR->CKGR_UCKR |= ((0xf << 20) & (3 << 20)) | AT91C_CKGR_UPLLEN; // Wait until UTMI PLL is locked while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKU) == 0); #endif } //------------------------------------------------------------------------------ /// Disable UDPHS clock //------------------------------------------------------------------------------ static inline void UDPHS_DisableUsbClock( void ) { #if !defined (PMC_BY_HARD) AT91C_BASE_PMC->PMC_PCDR = (1 << AT91C_ID_UDPHS); // 480MHZ AT91C_BASE_CKGR->CKGR_UCKR &= ~AT91C_CKGR_UPLLEN; #endif } //------------------------------------------------------------------------------ /// Handles a completed transfer on the given endpoint, invoking the /// configured callback if any. /// \param bEndpoint Number of the endpoint for which the transfer has completed. /// \param bStatus Status code returned by the transfer operation //------------------------------------------------------------------------------ static void UDPHS_EndOfTransfer( unsigned char bEndpoint, char bStatus ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Check that endpoint was sending or receiving data if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING) ) { TRACE_DEBUG_WP("Eo"); if(pEndpoint->state == UDP_ENDPOINT_SENDING) { pEndpoint->sendZLP = 0; } // Endpoint returns in Idle state pEndpoint->state = UDP_ENDPOINT_IDLE; // Invoke callback is present if (pTransfer->fCallback != 0) { ((TransferCallback) pTransfer->fCallback) (pTransfer->pArgument, bStatus, pTransfer->transferred, pTransfer->remaining + pTransfer->buffered); } else { TRACE_DEBUG_WP("No callBack\n\r"); } } } //------------------------------------------------------------------------------ /// Clears the correct RX flag in endpoint status register /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ static void UDPHS_ClearRxFlag( unsigned char bEndpoint ) { AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_RX_BK_RDY; } //------------------------------------------------------------------------------ /// Transfers a data payload from the current tranfer buffer to the endpoint /// FIFO /// \param bEndpoint Number of the endpoint which is sending data. //------------------------------------------------------------------------------ static void UDPHS_WritePayload( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); char *pFifo; signed int size; unsigned int dCtr; pFifo = (char*)((unsigned int *)AT91C_BASE_UDPHS_EPTFIFO + (EPT_VIRTUAL_SIZE * bEndpoint)); // Get the number of bytes to send size = pEndpoint->size; if (size > pTransfer->remaining) { size = pTransfer->remaining; } // Update transfer descriptor information pTransfer->buffered += size; pTransfer->remaining -= size; // Write packet in the FIFO buffer dCtr = 0; while (size > 0) { pFifo[dCtr] = *(pTransfer->pData); pTransfer->pData++; size--; dCtr++; } } //------------------------------------------------------------------------------ /// Transfers a data payload from an endpoint FIFO to the current transfer buffer /// \param bEndpoint Endpoint number. /// \param wPacketSize Size of received data packet //------------------------------------------------------------------------------ static void UDPHS_ReadPayload( unsigned char bEndpoint, int wPacketSize ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); char *pFifo; unsigned char dBytes=0; pFifo = (char*)((unsigned int *)AT91C_BASE_UDPHS_EPTFIFO + (EPT_VIRTUAL_SIZE * bEndpoint)); // Check that the requested size is not bigger than the remaining transfer if (wPacketSize > pTransfer->remaining) { pTransfer->buffered += wPacketSize - pTransfer->remaining; wPacketSize = pTransfer->remaining; } // Update transfer descriptor information pTransfer->remaining -= wPacketSize; pTransfer->transferred += wPacketSize; // Retrieve packet while (wPacketSize > 0) { *(pTransfer->pData) = pFifo[dBytes]; pTransfer->pData++; wPacketSize--; dBytes++; } } //------------------------------------------------------------------------------ /// Received SETUP packet from endpoint 0 FIFO /// \param pRequest Generic USB SETUP request sent over Control endpoints //------------------------------------------------------------------------------ static void UDPHS_ReadRequest( USBGenericRequest *pRequest ) { unsigned int *pData = (unsigned int *)pRequest; unsigned int fifo; fifo = (AT91C_BASE_UDPHS_EPTFIFO->UDPHS_READEPT0[0]); *pData = fifo; fifo = (AT91C_BASE_UDPHS_EPTFIFO->UDPHS_READEPT0[0]); pData++; *pData = fifo; //TRACE_ERROR("SETUP: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n\r", pData[0],pData[1],pData[2],pData[3],pData[4],pData[5],pData[6],pData[7]); } //------------------------------------------------------------------------------ /// Reset all endpoint transfer descriptors //------------------------------------------------------------------------------ static void UDPHS_ResetEndpoints( void ) { Endpoint *pEndpoint; Transfer *pTransfer; unsigned char bEndpoint; // Reset the transfer descriptor of every endpoint for( bEndpoint = 0; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++ ) { pEndpoint = &(endpoints[bEndpoint]); pTransfer = &(pEndpoint->transfer); // Reset endpoint transfer descriptor pTransfer->pData = 0; pTransfer->transferred = -1; pTransfer->buffered = -1; pTransfer->remaining = -1; pTransfer->fCallback = 0; pTransfer->pArgument = 0; // Reset endpoint state pEndpoint->bank = 0; pEndpoint->state = UDP_ENDPOINT_DISABLED; // Reset ZLP pEndpoint->sendZLP = 0; } } //------------------------------------------------------------------------------ /// Disable all endpoints (except control endpoint 0), aborting current /// transfers if necessary //------------------------------------------------------------------------------ static void UDPHS_DisableEndpoints( void ) { unsigned char bEndpoint; // Disable each endpoint, terminating any pending transfer // Control endpoint 0 is not disabled for( bEndpoint = 1; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++ ) { UDPHS_EndOfTransfer( bEndpoint, USBD_STATUS_ABORTED ); endpoints[bEndpoint].state = UDP_ENDPOINT_DISABLED; } } //------------------------------------------------------------------------------ /// Endpoint interrupt handler. /// Handle IN/OUT transfers, received SETUP packets and STALLing /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ static void UDPHS_EndpointHandler( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); unsigned int status = AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSTA; unsigned short wPacketSize; USBGenericRequest request; TRACE_DEBUG_WP("E%d ", bEndpoint); TRACE_DEBUG_WP("st:0x%X ", status); // Handle interrupts // IN packet sent if( (AT91C_UDPHS_TX_PK_RDY == (AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTL & AT91C_UDPHS_TX_PK_RDY)) && (0 == (status & AT91C_UDPHS_TX_PK_RDY )) ) { TRACE_DEBUG_WP("Wr "); // Check that endpoint was in Sending state if( pEndpoint->state == UDP_ENDPOINT_SENDING ) { if (pTransfer->buffered > 0) { pTransfer->transferred += pTransfer->buffered; pTransfer->buffered = 0; } if( ((pTransfer->buffered)==0) &&((pTransfer->transferred)==0) &&((pTransfer->remaining)==0) &&(pEndpoint->sendZLP == 0)) { pEndpoint->sendZLP = 1; } // End of transfer ? if( (pTransfer->remaining > 0) ||(pEndpoint->sendZLP == 1)) { pEndpoint->sendZLP = 2; TRACE_DEBUG_WP("\n\r1pTransfer->buffered %d \n\r", pTransfer->buffered); TRACE_DEBUG_WP("1pTransfer->transferred %d \n\r", pTransfer->transferred); TRACE_DEBUG_WP("1pTransfer->remaining %d \n\r", pTransfer->remaining); // Transfer remaining data TRACE_DEBUG_WP(" %d ", pEndpoint->size); // Send next packet UDPHS_WritePayload(bEndpoint); AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSETSTA = AT91C_UDPHS_TX_PK_RDY; } else { TRACE_DEBUG_WP("\n\r0pTransfer->buffered %d \n\r", pTransfer->buffered); TRACE_DEBUG_WP("0pTransfer->transferred %d \n\r", pTransfer->transferred); TRACE_DEBUG_WP("0pTransfer->remaining %d \n\r", pTransfer->remaining); TRACE_DEBUG_WP(" %d ", pTransfer->transferred); // Disable interrupt if this is not a control endpoint if( AT91C_UDPHS_EPT_TYPE_CTL_EPT != (AT91C_UDPHS_EPT_TYPE&(AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG)) ) { AT91C_BASE_UDPHS->UDPHS_IEN &= ~(1<UDPHS_EPT[bEndpoint].UDPHS_EPTCTLDIS = AT91C_UDPHS_TX_PK_RDY; UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); pEndpoint->sendZLP = 0; } } else { TRACE_DEBUG("Error Wr %d", pEndpoint->sendZLP); } } // OUT packet received if( AT91C_UDPHS_RX_BK_RDY == (status & AT91C_UDPHS_RX_BK_RDY) ) { TRACE_DEBUG_WP("Rd "); // Check that the endpoint is in Receiving state if (pEndpoint->state != UDP_ENDPOINT_RECEIVING) { // Check if an ACK has been received on a Control endpoint if( (0 == (AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG & AT91C_UDPHS_EPT_TYPE)) && (0 == (status & AT91C_UDPHS_BYTE_COUNT)) ) { // Control endpoint, 0 bytes received // Acknowledge the data and finish the current transfer TRACE_DEBUG_WP("Ack "); UDPHS_ClearRxFlag(bEndpoint); UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); //todo remove endoftranfer and test } // Check if the data has been STALLed else if( AT91C_UDPHS_FRCESTALL == (status & AT91C_UDPHS_FRCESTALL)) { // Discard STALLed data TRACE_DEBUG_WP("Discard "); UDPHS_ClearRxFlag(bEndpoint); } // NAK the data else { TRACE_DEBUG_WP("Nak "); AT91C_BASE_UDPHS->UDPHS_IEN &= ~(1<>20); TRACE_DEBUG_WP("%d ", wPacketSize); UDPHS_ReadPayload(bEndpoint, wPacketSize); UDPHS_ClearRxFlag(bEndpoint); // Check if the transfer is finished if ((pTransfer->remaining == 0) || (wPacketSize < pEndpoint->size)) { AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLDIS = AT91C_UDPHS_RX_BK_RDY; // Disable interrupt if this is not a control endpoint if( AT91C_UDPHS_EPT_TYPE_CTL_EPT != (AT91C_UDPHS_EPT_TYPE & (AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG)) ) { AT91C_BASE_UDPHS->UDPHS_IEN &= ~(1<UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_STALL_SNT; // If the endpoint is not halted, clear the STALL condition if (pEndpoint->state != UDP_ENDPOINT_HALTED) { TRACE_WARNING( "_ " ); AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_FRCESTALL; } } // SETUP packet received if( AT91C_UDPHS_RX_SETUP == (status & AT91C_UDPHS_RX_SETUP) ) { TRACE_DEBUG_WP("Stp "); // If a transfer was pending, complete it // Handles the case where during the status phase of a control write // transfer, the host receives the device ZLP and ack it, but the ack // is not received by the device if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING)) { UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS); } // Copy the setup packet UDPHS_ReadRequest(&request); // Acknowledge setup packet AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_RX_SETUP; // Forward the request to the upper layer USBDCallbacks_RequestReceived(&request); } } //------------------------------------------------------------------------------ // Interrupt service routine //------------------------------------------------------------------------------ #ifdef DMA //---------------------------------------------------------------------------- /// Endpoint DMA interrupt handler. /// This function (ISR) handles dma interrupts /// \param bEndpoint Index of endpoint //---------------------------------------------------------------------------- static void UDPHS_DmaHandler( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); int justTransferred; unsigned int status; unsigned char result = USBD_STATUS_SUCCESS; status = AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS; TRACE_DEBUG_WP("Dma Ept%d ", bEndpoint); // Disable DMA interrupt to avoid receiving 2 interrupts (B_EN and TR_EN) AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL &= ~(AT91C_UDPHS_END_TR_EN | AT91C_UDPHS_END_B_EN); AT91C_BASE_UDPHS->UDPHS_IEN &= ~(1 << SHIFT_DMA << bEndpoint); if( AT91C_UDPHS_END_BF_ST == (status & AT91C_UDPHS_END_BF_ST) ) { TRACE_DEBUG_WP("EndBuffer "); // BUFF_COUNT holds the number of untransmitted bytes. // BUFF_COUNT is equal to zero in case of good transfer justTransferred = pTransfer->buffered - ((status & AT91C_UDPHS_BUFF_COUNT) >> 16); pTransfer->transferred += justTransferred; pTransfer->buffered = ((status & AT91C_UDPHS_BUFF_COUNT) >> 16); pTransfer->remaining -= justTransferred; TRACE_DEBUG_WP("\n\r1pTransfer->buffered %d \n\r", pTransfer->buffered); TRACE_DEBUG_WP("1pTransfer->transferred %d \n\r", pTransfer->transferred); TRACE_DEBUG_WP("1pTransfer->remaining %d \n\r", pTransfer->remaining); if( (pTransfer->remaining + pTransfer->buffered) > 0 ) { // Prepare an other transfer if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) { pTransfer->buffered = DMA_MAX_FIFO_SIZE; } else { pTransfer->buffered = pTransfer->remaining; } AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMAADDRESS = (unsigned int)((pTransfer->pData) + (pTransfer->transferred)); // Clear unwanted interrupts AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS; // Enable DMA endpoint interrupt AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_DMA << bEndpoint); // DMA config for receive the good size of buffer, or an error buffer AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0; // raz AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = ( ((pTransfer->buffered << 16) & AT91C_UDPHS_BUFF_COUNT) | AT91C_UDPHS_END_TR_EN | AT91C_UDPHS_END_TR_IT | AT91C_UDPHS_END_B_EN | AT91C_UDPHS_END_BUFFIT | AT91C_UDPHS_CHANN_ENB ); } } else if( AT91C_UDPHS_END_TR_ST == (status & AT91C_UDPHS_END_TR_ST) ) { TRACE_DEBUG_WP("EndTransf "); pTransfer->transferred = pTransfer->buffered - ((status & AT91C_UDPHS_BUFF_COUNT) >> 16); pTransfer->remaining = 0; TRACE_DEBUG_WP("\n\r0pTransfer->buffered %d \n\r", pTransfer->buffered); TRACE_DEBUG_WP("0pTransfer->transferred %d \n\r", pTransfer->transferred); TRACE_DEBUG_WP("0pTransfer->remaining %d \n\r", pTransfer->remaining); } else { TRACE_ERROR("UDPHS_DmaHandler: Error (0x%08X)\n\r", status); result = USBD_STATUS_ABORTED; } // Invoke callback if( pTransfer->remaining == 0 ) { TRACE_DEBUG_WP("EOT "); UDPHS_EndOfTransfer(bEndpoint, result); } } #endif //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// USB interrupt handler /// Manages device resume, suspend, end of bus reset. /// Forwards endpoint interrupts to the appropriate handler. //------------------------------------------------------------------------------ void RealUdphsIrqHandler(void) @spontaneous() { unsigned int status; unsigned char numIT; if (deviceState >= USBD_STATE_POWERED) { //LED_Set(USBD_LEDUSB); //TOSH_SET_GREEN_LED_PIN(); } // Get interrupts status status = AT91C_BASE_UDPHS->UDPHS_INTSTA & AT91C_BASE_UDPHS->UDPHS_IEN; // Handle all UDPHS interrupts TRACE_DEBUG_WP("H"); while (status != 0) { // Start Of Frame (SOF) if ((status & AT91C_UDPHS_IEN_SOF) != 0) { TRACE_DEBUG_WP("SOF "); // Invoke the SOF callback //USB_StartOfFrameCallback(pUsb); // Acknowledge interrupt AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_IEN_SOF; status &= ~AT91C_UDPHS_IEN_SOF; } // Suspend // This interrupt is always treated last (hence the '==') else if (status == AT91C_UDPHS_DET_SUSPD) { TRACE_DEBUG_WP("S"); // The device enters the Suspended state // MCK + UDPCK must be off // Pull-Up must be connected // Transceiver must be disabled //LED_Clear(USBD_LEDUSB); //TOSH_CLR_GREEN_LED_PIN(); UDPHS_DisableBIAS(); // Enable wakeup AT91C_BASE_UDPHS->UDPHS_IEN |= AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_ENDOFRSM; AT91C_BASE_UDPHS->UDPHS_IEN &= ~AT91C_UDPHS_DET_SUSPD; // Acknowledge interrupt AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_DET_SUSPD | AT91C_UDPHS_WAKE_UP; previousDeviceState = deviceState; deviceState = USBD_STATE_SUSPENDED; UDPHS_DisableUsbClock(); // Invoke the Suspend callback USBDCallbacks_Suspended(); } // Resume else if( ((status & AT91C_UDPHS_WAKE_UP) != 0) // line activity || ((status & AT91C_UDPHS_ENDOFRSM) != 0)) { // pc wakeup { // Invoke the Resume callback USBDCallbacks_Resumed(); TRACE_DEBUG_WP("R"); UDPHS_EnableUsbClock(); UDPHS_EnableBIAS(); // The device enters Configured state // MCK + UDPCK must be on // Pull-Up must be connected // Transceiver must be enabled deviceState = previousDeviceState; AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_ENDOFRSM | AT91C_UDPHS_DET_SUSPD; AT91C_BASE_UDPHS->UDPHS_IEN |= AT91C_UDPHS_ENDOFRSM | AT91C_UDPHS_DET_SUSPD; AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_ENDOFRSM; AT91C_BASE_UDPHS->UDPHS_IEN &= ~AT91C_UDPHS_WAKE_UP; } } // End of bus reset else if ((status & AT91C_UDPHS_ENDRESET) == AT91C_UDPHS_ENDRESET) { // TRACE_DEBUG_WP("EoB "); // The device enters the Default state deviceState = USBD_STATE_DEFAULT; // MCK + UDPCK are already enabled // Pull-Up is already connected // Transceiver must be enabled // Endpoint 0 must be enabled UDPHS_ResetEndpoints(); UDPHS_DisableEndpoints(); USBD_ConfigureEndpoint(0); // Flush and enable the Suspend interrupt AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_DET_SUSPD; //// Enable the Start Of Frame (SOF) interrupt if needed //if (pCallbacks->startOfFrame != 0) //{ // AT91C_BASE_UDPHS->UDPHS_IEN |= AT91C_UDPHS_IEN_SOF; //} // Invoke the Reset callback USBDCallbacks_Reset(); // Acknowledge end of bus reset interrupt AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_ENDRESET; AT91C_BASE_UDPHS->UDPHS_IEN |= AT91C_UDPHS_DET_SUSPD; } // Handle upstream resume interrupt else if (status & AT91C_UDPHS_UPSTR_RES) { TRACE_DEBUG_WP("ExtRes "); // - Acknowledge the IT AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_UPSTR_RES; } // Endpoint interrupts else { #ifndef DMA // Handle endpoint interrupts for (numIT = 0; numIT < NUM_IT_MAX; numIT++) { if ((status & (1 << SHIFT_INTERUPT << numIT)) != 0) { UDPHS_EndpointHandler(numIT); } } #else // Handle endpoint control interrupt if ((status & (1 << SHIFT_INTERUPT << 0)) != 0) { UDPHS_EndpointHandler( 0 ); } else { numIT = 1; while((status&(0x7E<UDPHS_INTSTA & AT91C_BASE_UDPHS->UDPHS_IEN; TRACE_DEBUG_WP("\n\r"); if (status != 0) { TRACE_DEBUG_WP(" - "); } } if (deviceState >= USBD_STATE_POWERED) { //LED_Clear(USBD_LEDUSB); //TOSH_CLR_GREEN_LED_PIN(); } } void UdphsIrqHandler(void) @C() @spontaneous() { call UdphsInterruptWrapper.preamble(); RealUdphsIrqHandler(); call UdphsInterruptWrapper.postamble(); } //------------------------------------------------------------------------------ /// Configure an endpoint with the provided endpoint descriptor /// \param pDdescriptor Pointer to the endpoint descriptor //------------------------------------------------------------------------------ void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor) { Endpoint *pEndpoint; unsigned char bEndpoint; unsigned char bType; unsigned char bEndpointDir; unsigned char bInterval = 0; unsigned char bSizeEpt = 0; // NULL descriptor -> Control endpoint 0 if (pDescriptor == 0) { bEndpoint = 0; pEndpoint = &(endpoints[bEndpoint]); bType = USBEndpointDescriptor_CONTROL; bEndpointDir = 0; pEndpoint->size = BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0); pEndpoint->bank = BOARD_USB_ENDPOINTS_BANKS(0); } else { // The endpoint number bEndpoint = USBEndpointDescriptor_GetNumber(pDescriptor); pEndpoint = &(endpoints[bEndpoint]); // Transfer type: Control, Isochronous, Bulk, Interrupt bType = USBEndpointDescriptor_GetType(pDescriptor); // Direction, ignored for control endpoints bEndpointDir = USBEndpointDescriptor_GetDirection(pDescriptor); // Interval, for ISO endpoints ONLY bInterval = USBEndpointDescriptor_GetInterval(pDescriptor); if (bInterval > 16) bInterval = 16; pEndpoint->size = USBEndpointDescriptor_GetMaxPacketSize(pDescriptor); pEndpoint->bank = BOARD_USB_ENDPOINTS_BANKS(bEndpoint); } // Abort the current transfer is the endpoint was configured and in // Write or Read state if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING) || (pEndpoint->state == UDP_ENDPOINT_SENDING) ) { UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_RESET); } pEndpoint->state = UDP_ENDPOINT_IDLE; // Disable endpoint AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLDIS = AT91C_UDPHS_SHRT_PCKT | AT91C_UDPHS_BUSY_BANK | AT91C_UDPHS_NAK_OUT | AT91C_UDPHS_NAK_IN | AT91C_UDPHS_STALL_SNT | AT91C_UDPHS_RX_SETUP | AT91C_UDPHS_TX_PK_RDY | AT91C_UDPHS_TX_COMPLT | AT91C_UDPHS_RX_BK_RDY | AT91C_UDPHS_ERR_OVFLW | AT91C_UDPHS_MDATA_RX | AT91C_UDPHS_DATAX_RX | AT91C_UDPHS_NYET_DIS | AT91C_UDPHS_INTDIS_DMA | AT91C_UDPHS_AUTO_VALID | AT91C_UDPHS_EPT_DISABL; // Reset Endpoint Fifos AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_TOGGLESQ | AT91C_UDPHS_FRCESTALL; AT91C_BASE_UDPHS->UDPHS_EPTRST = 1<size <= 8 ) { bSizeEpt = 0; } else if ( pEndpoint->size <= 16 ) { bSizeEpt = 1; } else if ( pEndpoint->size <= 32 ) { bSizeEpt = 2; } else if ( pEndpoint->size <= 64 ) { bSizeEpt = 3; } else if ( pEndpoint->size <= 128 ) { bSizeEpt = 4; } else if ( pEndpoint->size <= 256 ) { bSizeEpt = 5; } else if ( pEndpoint->size <= 512 ) { bSizeEpt = 6; } else if ( pEndpoint->size <= 1024 ) { bSizeEpt = 7; } //else { // sizeEpt = 0; // control endpoint //} // Configure endpoint if (bType == USBEndpointDescriptor_CONTROL) { // Enable endpoint IT for control endpoint AT91C_BASE_UDPHS->UDPHS_IEN |= (1<UDPHS_EPT[bEndpoint].UDPHS_EPTCFG = bSizeEpt | (bEndpointDir << 3) | (bType << 4) | ((pEndpoint->bank) << 6) | (bInterval << 8) ; while( (signed int)AT91C_UDPHS_EPT_MAPD != (signed int)((AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG) & AT91C_UDPHS_EPT_MAPD) ) { // resolved by clearing the reset IT in good place TRACE_ERROR("PB bEndpoint: 0x%X\n\r", bEndpoint); TRACE_ERROR("PB bSizeEpt: 0x%X\n\r", bSizeEpt); TRACE_ERROR("PB bEndpointDir: 0x%X\n\r", bEndpointDir); TRACE_ERROR("PB bType: 0x%X\n\r", bType); TRACE_ERROR("PB pEndpoint->bank: 0x%X\n\r", pEndpoint->bank); TRACE_ERROR("PB UDPHS_EPTCFG: 0x%X\n\r", AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG); for(;;); } if (bType == USBEndpointDescriptor_CONTROL) { AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_RX_BK_RDY | AT91C_UDPHS_RX_SETUP | AT91C_UDPHS_EPT_ENABL; } else { #ifndef DMA AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_EPT_ENABL; #else AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_AUTO_VALID | AT91C_UDPHS_EPT_ENABL; #endif } } //------------------------------------------------------------------------------ /// Sends data through an USB endpoint (IN) /// Sets up the transfer descriptor, write one or two data payloads /// (depending on the number of FIFO banks for the endpoint) and then /// starts the actual transfer. The operation is complete when all /// the data has been sent. /// \param bEndpoint Index of endpoint /// \param *pData Data to be written /// \param dLength Data length to be send /// \param fCallback Callback to be call after the success command /// \param *pArgument Callback argument /// \return USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS //------------------------------------------------------------------------------ char USBD_Write( unsigned char bEndpoint, const void *pData, unsigned int dLength, TransferCallback fCallback, void *pArgument ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Return if the endpoint is not in IDLE state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { return USBD_STATUS_LOCKED; } TRACE_DEBUG_WP("Write%d(%d) ", bEndpoint, dLength); pEndpoint->sendZLP = 0; // Setup the transfer descriptor pTransfer->pData = (void *) pData; pTransfer->remaining = dLength; pTransfer->buffered = 0; pTransfer->transferred = 0; pTransfer->fCallback = fCallback; pTransfer->pArgument = pArgument; // Send one packet pEndpoint->state = UDP_ENDPOINT_SENDING; #ifdef DMA // Test if endpoint type control if(AT91C_UDPHS_EPT_TYPE_CTL_EPT == (AT91C_UDPHS_EPT_TYPE&(AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG))) { #endif // Enable endpoint IT AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_INTERUPT << bEndpoint); AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_TX_PK_RDY; #ifdef DMA } else { if( pTransfer->remaining == 0 ) { // DMA not handle ZLP AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSETSTA = AT91C_UDPHS_TX_PK_RDY; // Enable endpoint IT AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_INTERUPT << bEndpoint); AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_TX_PK_RDY; } else { // Others endpoints (not control) if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) { // Transfer the max pTransfer->buffered = DMA_MAX_FIFO_SIZE; } else { // Transfer the good size pTransfer->buffered = pTransfer->remaining; } TRACE_DEBUG_WP("\n\r_WR:%d ", pTransfer->remaining ); TRACE_DEBUG_WP("B:%d ", pTransfer->buffered ); TRACE_DEBUG_WP("T:%d ", pTransfer->transferred ); AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMAADDRESS = (unsigned int)(pTransfer->pData); // Clear unwanted interrupts AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS; // Enable DMA endpoint interrupt AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_DMA << bEndpoint); // DMA config AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0; // raz AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = ( ((pTransfer->buffered << 16) & AT91C_UDPHS_BUFF_COUNT) | AT91C_UDPHS_END_B_EN | AT91C_UDPHS_END_BUFFIT | AT91C_UDPHS_CHANN_ENB ); } } #endif return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Reads incoming data on an USB endpoint (OUT) /// \param bEndpoint Index of endpoint /// \param *pData Data to be readen /// \param dLength Data length to be receive /// \param fCallback Callback to be call after the success command /// \param *pArgument Callback argument /// \return USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS //------------------------------------------------------------------------------ char USBD_Read( unsigned char bEndpoint, void *pData, unsigned int dLength, TransferCallback fCallback, void *pArgument ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); Transfer *pTransfer = &(pEndpoint->transfer); // Return if the endpoint is not in IDLE state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { return USBD_STATUS_LOCKED; } TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength); // Endpoint enters Receiving state pEndpoint->state = UDP_ENDPOINT_RECEIVING; // Set the transfer descriptor pTransfer->pData = pData; pTransfer->remaining = dLength; pTransfer->buffered = 0; pTransfer->transferred = 0; pTransfer->fCallback = fCallback; pTransfer->pArgument = pArgument; #ifdef DMA // Test if endpoint type control if(AT91C_UDPHS_EPT_TYPE_CTL_EPT == (AT91C_UDPHS_EPT_TYPE&(AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG))) { #endif // Control endpoint // Enable endpoint IT AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_INTERUPT << bEndpoint); AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_RX_BK_RDY; #ifdef DMA } else { TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength); // Others endpoints (not control) if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) { // Transfer the max pTransfer->buffered = DMA_MAX_FIFO_SIZE; } else { // Transfer the good size pTransfer->buffered = pTransfer->remaining; } AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMAADDRESS = (unsigned int)(pTransfer->pData); // Clear unwanted interrupts AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS; // Enable DMA endpoint interrupt AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_DMA << bEndpoint); TRACE_DEBUG_WP("\n\r_RR:%d ", pTransfer->remaining ); TRACE_DEBUG_WP("B:%d ", pTransfer->buffered ); TRACE_DEBUG_WP("T:%d ", pTransfer->transferred ); // DMA config AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0; // raz AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = ( ((pTransfer->buffered << 16) & AT91C_UDPHS_BUFF_COUNT) | AT91C_UDPHS_END_TR_EN | AT91C_UDPHS_END_TR_IT | AT91C_UDPHS_END_B_EN | AT91C_UDPHS_END_BUFFIT | AT91C_UDPHS_CHANN_ENB ); } #endif return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Put endpoint into Halt state /// \param bEndpoint Index of endpoint //------------------------------------------------------------------------------ void USBD_Halt( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); TRACE_INFO("usbd_Halt%d ", bEndpoint); // Check that endpoint is enabled and not already in Halt state if( (pEndpoint->state != UDP_ENDPOINT_DISABLED) && (pEndpoint->state != UDP_ENDPOINT_HALTED) ) { TRACE_INFO("Halt%d ", bEndpoint); // Abort the current transfer if necessary UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED); // Put endpoint into Halt state AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSETSTA = AT91C_UDPHS_FRCESTALL; pEndpoint->state = UDP_ENDPOINT_HALTED; #ifdef DMA // Test if endpoint type control if(AT91C_UDPHS_EPT_TYPE_CTL_EPT == (AT91C_UDPHS_EPT_TYPE&(AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG))) { #endif // Enable the endpoint interrupt AT91C_BASE_UDPHS->UDPHS_IEN |= (1<UDPHS_IEN |= (1<state != UDP_ENDPOINT_DISABLED) { TRACE_DEBUG_WP("Unhalt%d ", bEndpoint); // Return endpoint to Idle state pEndpoint->state = UDP_ENDPOINT_IDLE; // Clear FORCESTALL flag AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_TOGGLESQ | AT91C_UDPHS_FRCESTALL; // Reset Endpoint Fifos AT91C_BASE_UDPHS->UDPHS_EPTRST = (1<state == UDP_ENDPOINT_HALTED) { status = 1; } return( status ); } //------------------------------------------------------------------------------ /// IS High Speed device working in High Speed ? /// \return 1 if the device is in High Speed; otherwise 0 (Full Speed) //------------------------------------------------------------------------------ unsigned char USBD_IsHighSpeed( void ) { unsigned char status = 0; if( AT91C_UDPHS_SPEED == (AT91C_BASE_UDPHS->UDPHS_INTSTA & AT91C_UDPHS_SPEED) ) { // High Speed TRACE_DEBUG_WP("High Speed\n\r"); status = 1; } else { TRACE_DEBUG_WP("Full Speed\n\r"); } return( status ); } //------------------------------------------------------------------------------ /// Causes the endpoint to acknowledge the next received packet with a STALL /// handshake. /// Further packets are then handled normally. /// \param bEndpoint Index of endpoint /// \return Operation result code: USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS //------------------------------------------------------------------------------ unsigned char USBD_Stall( unsigned char bEndpoint ) { Endpoint *pEndpoint = &(endpoints[bEndpoint]); // Check that endpoint is in Idle state if (pEndpoint->state != UDP_ENDPOINT_IDLE) { TRACE_WARNING("UDP_Stall: Endpoint%d locked\n\r", bEndpoint); return USBD_STATUS_LOCKED; } TRACE_DEBUG_WP("Stall%d ", bEndpoint); AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSETSTA = AT91C_UDPHS_FRCESTALL; return USBD_STATUS_SUCCESS; } //------------------------------------------------------------------------------ /// Activates a remote wakeup procedure //------------------------------------------------------------------------------ void USBD_RemoteWakeUp(void) { TRACE_DEBUG_WP("Remote WakeUp\n\r"); // Device is currently suspended if (deviceState == USBD_STATE_SUSPENDED) { TRACE_DEBUG_WP("RW\n\r"); UDPHS_EnableUsbClock(); // Activates a remote wakeup AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_REWAKEUP; while ((AT91C_BASE_UDPHS->UDPHS_CTRL&AT91C_UDPHS_REWAKEUP) == AT91C_UDPHS_REWAKEUP) { TRACE_DEBUG_WP("W"); } UDPHS_EnableBIAS(); } // Device is NOT suspended else { TRACE_WARNING("USBD_RemoteWakeUp: Device is not suspended\n\r"); } } //------------------------------------------------------------------------------ /// Sets the device address /// \param address Adress to be set //------------------------------------------------------------------------------ void USBD_SetAddress( unsigned char address ) { TRACE_DEBUG_WP("SetAddr(%d) ", address); // Set address AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_DEV_ADDR; // RAZ Address AT91C_BASE_UDPHS->UDPHS_CTRL |= address | AT91C_UDPHS_FADDR_EN; // If the address is 0, the device returns to the Default state if (address == 0) { deviceState = USBD_STATE_DEFAULT; } // If the address is non-zero, the device enters the Address state else { deviceState = USBD_STATE_ADDRESS; } } //------------------------------------------------------------------------------ /// Changes the device state from Address to Configured, or from Configured /// to Address. /// This method directly access the last received SETUP packet to decide on /// what to do. /// \param cfgnum configuration number //------------------------------------------------------------------------------ void USBD_SetConfiguration( unsigned char cfgnum ) { TRACE_DEBUG_WP("SetCfg(%d) ", cfgnum); // Check the request if( cfgnum != 0 ) { // Enter Configured state deviceState = USBD_STATE_CONFIGURED; } // If the configuration number is zero, the device goes back to the Address // state else { // Go back to Address state deviceState = USBD_STATE_ADDRESS; // Abort all transfers UDPHS_DisableEndpoints(); } } //------------------------------------------------------------------------------ /// Enables the pull-up on the D+ line to connect the device to the USB. //------------------------------------------------------------------------------ void USBD_Connect( void ) { TRACE_DEBUG_WP("Conn "); #if defined(BOARD_USB_PULLUP_INTERNAL) AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_DETACH; // Pull Up on DP AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_PULLD_DIS; // Disable Pull Down #elif defined(BOARD_USB_PULLUP_INTERNAL_BY_MATRIX) TRACE_DEBUG_WP("PUON 1\n\r"); AT91C_BASE_MATRIX->MATRIX_USBPCR |= AT91C_MATRIX_USBPCR_PUON; #elif defined(BOARD_USB_PULLUP_EXTERNAL) #ifdef PIN_USB_PULLUP const Pin pinPullUp = PIN_USB_PULLUP; if( pinPullUp.attribute == PIO_OUTPUT_0 ) { PIO_Set(&pinPullUp); } else { PIO_Clear(&pinPullUp); } #else #error unsupported now #endif #elif !defined(BOARD_USB_PULLUP_ALWAYSON) #error Unsupported pull-up type. #endif } //------------------------------------------------------------------------------ /// Disables the pull-up on the D+ line to disconnect the device from the bus. //------------------------------------------------------------------------------ void USBD_Disconnect( void ) { TRACE_DEBUG_WP("Disc "); #if defined(BOARD_USB_PULLUP_INTERNAL) AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_DETACH; // detach AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_PULLD_DIS; // Enable Pull Down #elif defined(BOARD_USB_PULLUP_INTERNAL_BY_MATRIX) AT91C_BASE_MATRIX->MATRIX_USBPCR &= ~AT91C_MATRIX_USBPCR_PUON; #elif defined(BOARD_USB_PULLUP_EXTERNAL) #ifdef PIN_USB_PULLUP const Pin pinPullUp = PIN_USB_PULLUP; if (pinPullUp.attribute == PIO_OUTPUT_0) { PIO_Clear(&pinPullUp); } else { PIO_Set(&pinPullUp); } #else #error unsupported now #endif #elif !defined(BOARD_USB_PULLUP_ALWAYSON) #error Unsupported pull-up type. #endif // Device returns to the Powered state if (deviceState > USBD_STATE_POWERED) { deviceState = USBD_STATE_POWERED; } if (previousDeviceState > USBD_STATE_POWERED) { previousDeviceState = USBD_STATE_POWERED; } } //------------------------------------------------------------------------------ /// Certification test for High Speed device. /// \param bIndex Test to be done //------------------------------------------------------------------------------ void USBD_Test( unsigned char bIndex ) { char *pFifo; unsigned char i; AT91C_BASE_UDPHS->UDPHS_IEN &= ~AT91C_UDPHS_DET_SUSPD; // remove suspend for TEST AT91C_BASE_UDPHS->UDPHS_TST |= AT91C_UDPHS_SPEED_CFG_HS; // force High Speed (remove suspend) switch( bIndex ) { case USBFeatureRequest_TESTPACKET: TRACE_DEBUG_WP("TEST_PACKET "); AT91C_BASE_UDPHS->UDPHS_DMA[1].UDPHS_DMACONTROL = 0; AT91C_BASE_UDPHS->UDPHS_DMA[2].UDPHS_DMACONTROL = 0; // Configure endpoint 2, 64 bytes, direction IN, type BULK, 1 bank AT91C_BASE_UDPHS->UDPHS_EPT[2].UDPHS_EPTCFG = AT91C_UDPHS_EPT_SIZE_64 | AT91C_UDPHS_EPT_DIR_IN | AT91C_UDPHS_EPT_TYPE_BUL_EPT | AT91C_UDPHS_BK_NUMBER_1; while( (signed int)(AT91C_BASE_UDPHS->UDPHS_EPT[2].UDPHS_EPTCFG & AT91C_UDPHS_EPT_MAPD) != (signed int)AT91C_UDPHS_EPT_MAPD ) {} AT91C_BASE_UDPHS->UDPHS_EPT[2].UDPHS_EPTCTLENB = AT91C_UDPHS_EPT_ENABL; // Write FIFO pFifo = (char*)((unsigned int *)(AT91C_BASE_UDPHS_EPTFIFO->UDPHS_READEPT0) + (EPT_VIRTUAL_SIZE * 2)); for( i=0; iUDPHS_TST |= AT91C_UDPHS_TST_PKT; // Send packet AT91C_BASE_UDPHS->UDPHS_EPT[2].UDPHS_EPTSETSTA = AT91C_UDPHS_TX_PK_RDY; break; case USBFeatureRequest_TESTJ: TRACE_DEBUG_WP("TEST_J "); AT91C_BASE_UDPHS->UDPHS_TST = AT91C_UDPHS_TST_J; break; case USBFeatureRequest_TESTK: TRACE_DEBUG_WP("TEST_K "); AT91C_BASE_UDPHS->UDPHS_TST = AT91C_UDPHS_TST_K; break; case USBFeatureRequest_TESTSE0NAK: TRACE_DEBUG_WP("TEST_SEO_NAK "); AT91C_BASE_UDPHS->UDPHS_IEN = 0; // for test break; case USBFeatureRequest_TESTSENDZLP: //while( 0 != (AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSTA & AT91C_UDPHS_TX_PK_RDY ) ) {} AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSETSTA = AT91C_UDPHS_TX_PK_RDY; //while( 0 != (AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSTA & AT91C_UDPHS_TX_PK_RDY ) ) {} TRACE_DEBUG_WP("SEND_ZLP "); break; } TRACE_DEBUG_WP("\n\r"); } //------------------------------------------------------------------------------ /// Initializes the specified USB driver /// This function initializes the current FIFO bank of endpoints, /// configures the pull-up and VBus lines, disconnects the pull-up and /// then trigger the Init callback. //------------------------------------------------------------------------------ void USBD_Init(void) { unsigned char i; TRACE_DEBUG_WP("USBD Init()\n\r"); // Reset endpoint structures UDPHS_ResetEndpoints(); // Enables the USB Clock UDPHS_EnableUsbClock(); // Configure the pull-up on D+ and disconnect it #if defined(BOARD_USB_PULLUP_INTERNAL) AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_DETACH; // detach AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_PULLD_DIS; // Disable Pull Down #elif defined(BOARD_USB_PULLUP_INTERNAL_BY_MATRIX) TRACE_DEBUG_WP("PUON 0\n\r"); AT91C_BASE_MATRIX->MATRIX_USBPCR &= ~AT91C_MATRIX_USBPCR_PUON; #elif defined(BOARD_USB_PULLUP_EXTERNAL) #ifdef PIN_USB_PULLUP const Pin pinPullUp = PIN_USB_PULLUP; PIO_Configure(&pinPullUp, 1); if (pinPullUp.attribute == PIO_OUTPUT_0) { PIO_Clear(&pinPullUp); } else { PIO_Set(&pinPullUp); } #else #error unsupported now #endif #elif !defined(BOARD_USB_PULLUP_ALWAYSON) #error Unsupported pull-up type. #endif // Reset and enable IP UDPHS AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_EN_UDPHS; AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_EN_UDPHS; // Enable and disable of the transceiver is automaticaly done by the IP. // With OR without DMA !!! // Initialization of DMA for( i=1; i<=((AT91C_BASE_UDPHS->UDPHS_IPFEATURES & AT91C_UDPHS_DMA_CHANNEL_NBR)>>4); i++ ) { // RESET endpoint canal DMA: // DMA stop channel command AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = 0; // STOP command // Disable endpoint AT91C_BASE_UDPHS->UDPHS_EPT[i].UDPHS_EPTCTLDIS = AT91C_UDPHS_SHRT_PCKT | AT91C_UDPHS_BUSY_BANK | AT91C_UDPHS_NAK_OUT | AT91C_UDPHS_NAK_IN | AT91C_UDPHS_STALL_SNT | AT91C_UDPHS_RX_SETUP | AT91C_UDPHS_TX_PK_RDY | AT91C_UDPHS_TX_COMPLT | AT91C_UDPHS_RX_BK_RDY | AT91C_UDPHS_ERR_OVFLW | AT91C_UDPHS_MDATA_RX | AT91C_UDPHS_DATAX_RX | AT91C_UDPHS_NYET_DIS | AT91C_UDPHS_INTDIS_DMA | AT91C_UDPHS_AUTO_VALID | AT91C_UDPHS_EPT_DISABL; // Clear status endpoint AT91C_BASE_UDPHS->UDPHS_EPT[i].UDPHS_EPTCLRSTA = AT91C_UDPHS_TOGGLESQ | AT91C_UDPHS_FRCESTALL | AT91C_UDPHS_RX_BK_RDY | AT91C_UDPHS_TX_COMPLT | AT91C_UDPHS_RX_SETUP | AT91C_UDPHS_STALL_SNT | AT91C_UDPHS_NAK_IN | AT91C_UDPHS_NAK_OUT; // Reset endpoint config AT91C_BASE_UDPHS->UDPHS_EPT[i].UDPHS_EPTCTLENB = 0; // Reset DMA channel (Buff count and Control field) AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = AT91C_UDPHS_LDNXT_DSC; // NON STOP command // Reset DMA channel 0 (STOP) AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = 0; // STOP command // Clear DMA channel status (read the register for clear it) AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMASTATUS = AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMASTATUS; } AT91C_BASE_UDPHS->UDPHS_TST = forceUsbFS ? AT91C_UDPHS_SPEED_CFG_FS : 0; AT91C_BASE_UDPHS->UDPHS_IEN = 0; AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_UPSTR_RES | AT91C_UDPHS_ENDOFRSM | AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_ENDRESET | AT91C_UDPHS_IEN_SOF | AT91C_UDPHS_MICRO_SOF | AT91C_UDPHS_DET_SUSPD; // Device is in the Attached state deviceState = USBD_STATE_SUSPENDED; previousDeviceState = USBD_STATE_POWERED; // Disable interrupts AT91C_BASE_UDPHS->UDPHS_IEN = AT91C_UDPHS_ENDOFRSM | AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_DET_SUSPD; // Disable USB clocks UDPHS_DisableUsbClock(); // Configure interrupts USBDCallbacks_Initialized(); } //------------------------------------------------------------------------------ /// Configure USB Speed, should be invoked before USB attachment. /// \param forceFS Force to use FS mode. //------------------------------------------------------------------------------ void USBD_ConfigureSpeed(unsigned char forceFS) { if (forceFS) { AT91C_BASE_UDPHS->UDPHS_TST |= AT91C_UDPHS_SPEED_CFG_FS; } else { AT91C_BASE_UDPHS->UDPHS_TST &= ~AT91C_UDPHS_SPEED_CFG_FS; } } //------------------------------------------------------------------------------ /// Returns the current state of the USB device. /// \return Device current state. //------------------------------------------------------------------------------ unsigned char USBD_GetState( void ) { return deviceState; } #endif // BOARD_USB_UDPHS tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/utility/000077500000000000000000000000001207233610700231225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/utility/assert.h000066400000000000000000000113211207233610700245720ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// Definition of the ASSERT() and SANITY_CHECK() macros, which are used for /// runtime condition & parameter verifying. /// /// !Usage /// /// -# Use ASSERT() in your code to check the value of function parameters, /// return values, etc. *Warning:* the ASSERT() condition must not have /// any side-effect; otherwise, the program may not work properly /// anymore when assertions are disabled. /// -# Use SANITY_CHECK() to perform checks with a default error message /// (outputs the file and line number where the error occured). This /// reduces memory overhead caused by assertion error strings. /// -# Initialize the dbgu to see failed assertions at run-time. /// -# Assertions can be entirely disabled by defining the NOASSERT symbol /// at compilation time. //------------------------------------------------------------------------------ #ifndef ASSERT_H #define ASSERT_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include #include "trace.h" //------------------------------------------------------------------------------ // Definitions //------------------------------------------------------------------------------ #if defined(NOASSERT) #define ASSERT(...) #define SANITY_CHECK(...) #else #if (TRACE_LEVEL == 0) /// Checks that the given condition is true, /// otherwise stops the program execution. /// \param condition Condition to verify. #define ASSERT(condition, ...) { \ if (!(condition)) { \ while (1); \ } \ } /// Performs the same duty as the ASSERT() macro /// \param condition Condition to verify. #define SANITY_CHECK(condition) ASSERT(condition, ...) #else /// Checks that the given condition is true, otherwise displays an error /// message and stops the program execution. /// \param condition Condition to verify. #define ASSERT(condition, ...) { \ if (!(condition)) { \ printf("-F- ASSERT: "); \ printf(__VA_ARGS__); \ while (1); \ } \ } #define SANITY_ERROR "Sanity check failed at %s:%d\n\r" /// Performs the same duty as the ASSERT() macro, except a default error /// message is output if the condition is false. /// \param condition Condition to verify. #define SANITY_CHECK(condition) ASSERT(condition, SANITY_ERROR, __FILE__, __LINE__) #endif #endif #endif //#ifndef ASSERT_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/utility/led.c000066400000000000000000000126551207233610700240430ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "led.h" #include #include //------------------------------------------------------------------------------ // Local Variables //------------------------------------------------------------------------------ #ifdef PINS_LEDS static const Pin pinsLeds[] = {PINS_LEDS}; static const unsigned int numLeds = PIO_LISTSIZE(pinsLeds); #endif //------------------------------------------------------------------------------ // Global Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Configures the pin associated with the given LED number. If the LED does /// not exist on the board, the function does nothing. /// \param led Number of the LED to configure. /// \return 1 if the LED exists and has been configured; otherwise 0. //------------------------------------------------------------------------------ unsigned char LED_Configure(unsigned int led) { #ifdef PINS_LEDS // Check that LED exists if (led >= numLeds) { return 0; } // Configure LED return (PIO_Configure(&pinsLeds[led], 1)); #else return 0; #endif } //------------------------------------------------------------------------------ /// Turns the given LED on if it exists; otherwise does nothing. /// \param led Number of the LED to turn on. /// \return 1 if the LED has been turned on; 0 otherwise. //------------------------------------------------------------------------------ unsigned char LED_Set(unsigned int led) { #ifdef PINS_LEDS // Check if LED exists if (led >= numLeds) { return 0; } // Turn LED on if (pinsLeds[led].type == PIO_OUTPUT_0) { PIO_Set(&pinsLeds[led]); } else { PIO_Clear(&pinsLeds[led]); } return 1; #else return 0; #endif } //------------------------------------------------------------------------------ /// Turns a LED off. /// \param led Number of the LED to turn off. /// \param 1 if the LED has been turned off; 0 otherwise. //------------------------------------------------------------------------------ unsigned char LED_Clear(unsigned int led) { #ifdef PINS_LEDS // Check if LED exists if (led >= numLeds) { return 0; } // Turn LED off if (pinsLeds[led].type == PIO_OUTPUT_0) { PIO_Clear(&pinsLeds[led]); } else { PIO_Set(&pinsLeds[led]); } return 1; #else return 0; #endif } //------------------------------------------------------------------------------ /// Toggles the current state of a LED. /// \param led Number of the LED to toggle. /// \return 1 if the LED has been toggled; otherwise 0. //------------------------------------------------------------------------------ unsigned char LED_Toggle(unsigned int led) { #ifdef PINS_LEDS // Check if LED exists if (led >= numLeds) { return 0; } // Toggle LED if (PIO_GetOutputDataStatus(&pinsLeds[led])) { PIO_Clear(&pinsLeds[led]); } else { PIO_Set(&pinsLeds[led]); } return 1; #else return 0; #endif } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/utility/led.h000066400000000000000000000067001207233610700240420ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// Small set of functions for simple and portable LED usage. /// /// !Usage /// /// -# Configure one or more LEDs using LED_Configure and /// LED_ConfigureAll. /// -# Set, clear and toggle LEDs using LED_Set, LED_Clear and /// LED_Toggle. /// /// LEDs are numbered starting from 0; the number of LEDs depend on the /// board being used. All the functions defined here will compile properly /// regardless of whether the LED is defined or not; they will simply /// return 0 when a LED which does not exist is given as an argument. /// Also, these functions take into account how each LED is connected on to /// board; thus, might change the level on the corresponding pin /// to 0 or 1, but it will always light the LED on; same thing for the other /// methods. //------------------------------------------------------------------------------ #ifndef LED_H #define LED_H //------------------------------------------------------------------------------ // Global Functions //------------------------------------------------------------------------------ extern unsigned char LED_Configure(unsigned int led); extern unsigned char LED_Set(unsigned int led); extern unsigned char LED_Clear(unsigned int led); extern unsigned char LED_Toggle(unsigned int led); #endif //#ifndef LED_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/utility/stdio.c000066400000000000000000000374001207233610700244140ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// Implementation of several stdio.h methods, such as printf(), sprintf() and /// so on. This reduces the memory footprint of the binary when using those /// methods, compared to the libc implementation. /// /// !Usage /// /// Adds stdio.c to the list of file to compile for the project. This will /// automatically replace libc methods by the custom ones. //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include #include //------------------------------------------------------------------------------ // Local Definitions //------------------------------------------------------------------------------ // Maximum string size allowed (in bytes). #define MAX_STRING_SIZE 100 //------------------------------------------------------------------------------ // Global Variables //------------------------------------------------------------------------------ // Required for proper compilation. struct _reent r = {0, (FILE *) 0, (FILE *) 1, (FILE *) 0}; struct _reent *_impure_ptr = &r; //------------------------------------------------------------------------------ // Local Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Writes a character inside the given string. Returns 1. // \param pStr Storage string. // \param c Character to write. //------------------------------------------------------------------------------ signed int PutChar(char *pStr, char c) { *pStr = c; return 1; } //------------------------------------------------------------------------------ // Writes a string inside the given string. // Returns the size of the written // string. // \param pStr Storage string. // \param pSource Source string. //------------------------------------------------------------------------------ signed int PutString(char *pStr, const char *pSource) { signed int num = 0; while (*pSource != 0) { *pStr++ = *pSource++; num++; } return num; } //------------------------------------------------------------------------------ // Writes an unsigned int inside the given string, using the provided fill & // width parameters. // Returns the size in characters of the written integer. // \param pStr Storage string. // \param fill Fill character. // \param width Minimum integer width. // \param value Integer value. //------------------------------------------------------------------------------ signed int PutUnsignedInt( char *pStr, char fill, signed int width, unsigned int value) { signed int num = 0; // Take current digit into account when calculating width width--; // Recursively write upper digits if ((value / 10) > 0) { num = PutUnsignedInt(pStr, fill, width, value / 10); pStr += num; } // Write filler characters else { while (width > 0) { PutChar(pStr, fill); pStr++; num++; width--; } } // Write lower digit num += PutChar(pStr, (value % 10) + '0'); return num; } //------------------------------------------------------------------------------ // Writes a signed int inside the given string, using the provided fill & width // parameters. // Returns the size of the written integer. // \param pStr Storage string. // \param fill Fill character. // \param width Minimum integer width. // \param value Signed integer value. //------------------------------------------------------------------------------ signed int PutSignedInt( char *pStr, char fill, signed int width, signed int value) { signed int num = 0; unsigned int absolute; // Compute absolute value if (value < 0) { absolute = -value; } else { absolute = value; } // Take current digit into account when calculating width width--; // Recursively write upper digits if ((absolute / 10) > 0) { if (value < 0) { num = PutSignedInt(pStr, fill, width, -(absolute / 10)); } else { num = PutSignedInt(pStr, fill, width, absolute / 10); } pStr += num; } else { // Reserve space for sign if (value < 0) { width--; } // Write filler characters while (width > 0) { PutChar(pStr, fill); pStr++; num++; width--; } // Write sign if (value < 0) { num += PutChar(pStr, '-'); pStr++; } } // Write lower digit num += PutChar(pStr, (absolute % 10) + '0'); return num; } //------------------------------------------------------------------------------ // Writes an hexadecimal value into a string, using the given fill, width & // capital parameters. // Returns the number of char written. // \param pStr Storage string. // \param fill Fill character. // \param width Minimum integer width. // \param maj Indicates if the letters must be printed in lower- or upper-case. // \param value Hexadecimal value. //------------------------------------------------------------------------------ signed int PutHexa( char *pStr, char fill, signed int width, unsigned char maj, unsigned int value) { signed int num = 0; // Decrement width width--; // Recursively output upper digits if ((value >> 4) > 0) { num += PutHexa(pStr, fill, width, maj, value >> 4); pStr += num; } // Write filler chars else { while (width > 0) { PutChar(pStr, fill); pStr++; num++; width--; } } // Write current digit if ((value & 0xF) < 10) { PutChar(pStr, (value & 0xF) + '0'); } else if (maj) { PutChar(pStr, (value & 0xF) - 10 + 'A'); } else { PutChar(pStr, (value & 0xF) - 10 + 'a'); } num++; return num; } //------------------------------------------------------------------------------ // Global Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Stores the result of a formatted string into another string. Format /// arguments are given in a va_list instance. /// Return the number of characters written. /// \param pStr Destination string. /// \param length Length of Destination string. /// \param pFormat Format string. /// \param ap Argument list. //------------------------------------------------------------------------------ signed int vsnprintf(char *pStr, size_t length, const char *pFormat, va_list ap) { char fill; unsigned char width; signed int num = 0; signed int size = 0; // Clear the string if (pStr) { *pStr = 0; } // Phase string while (*pFormat != 0 && size < length) { // Normal character if (*pFormat != '%') { *pStr++ = *pFormat++; size++; } // Escaped '%' else if (*(pFormat+1) == '%') { *pStr++ = '%'; pFormat += 2; size++; } // Token delimiter else { fill = ' '; width = 0; pFormat++; // Parse filler if (*pFormat == '0') { fill = '0'; pFormat++; } // Parse width while ((*pFormat >= '0') && (*pFormat <= '9')) { width = (width*10) + *pFormat-'0'; pFormat++; } // Check if there is enough space if (size + width > length) { width = length - size; } // Parse type switch (*pFormat) { case 'd': case 'i': num = PutSignedInt(pStr, fill, width, va_arg(ap, signed int)); break; case 'u': num = PutUnsignedInt(pStr, fill, width, va_arg(ap, unsigned int)); break; case 'x': num = PutHexa(pStr, fill, width, 0, va_arg(ap, unsigned int)); break; case 'X': num = PutHexa(pStr, fill, width, 1, va_arg(ap, unsigned int)); break; case 's': num = PutString(pStr, va_arg(ap, char *)); break; case 'c': num = PutChar(pStr, va_arg(ap, unsigned int)); break; default: return EOF; } pFormat++; pStr += num; size += num; } } // NULL-terminated (final \0 is not counted) if (size < length) { *pStr = 0; } else { *(--pStr) = 0; size--; } return size; } //------------------------------------------------------------------------------ /// Stores the result of a formatted string into another string. Format /// arguments are given in a va_list instance. /// Return the number of characters written. /// \param pString Destination string. /// \param length Length of Destination string. /// \param pFormat Format string. /// \param ... Other arguments //------------------------------------------------------------------------------ signed int snprintf(char *pString, size_t length, const char *pFormat, ...) { va_list ap; signed int rc; va_start(ap, pFormat); rc = vsnprintf(pString, length, pFormat, ap); va_end(ap); return rc; } //------------------------------------------------------------------------------ /// Stores the result of a formatted string into another string. Format /// arguments are given in a va_list instance. /// Return the number of characters written. /// \param pString Destination string. /// \param pFormat Format string. /// \param ap Argument list. //------------------------------------------------------------------------------ signed int vsprintf(char *pString, const char *pFormat, va_list ap) { return vsnprintf(pString, MAX_STRING_SIZE, pFormat, ap); } //------------------------------------------------------------------------------ /// Outputs a formatted string on the given stream. Format arguments are given /// in a va_list instance. /// \param pStream Output stream. /// \param pFormat Format string /// \param ap Argument list. //------------------------------------------------------------------------------ signed int vfprintf(FILE *pStream, const char *pFormat, va_list ap) { char pStr[MAX_STRING_SIZE]; char pError[] = "stdio.c: increase MAX_STRING_SIZE\n\r"; // Write formatted string in buffer if (vsprintf(pStr, pFormat, ap) >= MAX_STRING_SIZE) { fputs(pError, stderr); while (1); // Increase MAX_STRING_SIZE } // Display string return fputs(pStr, pStream); } //------------------------------------------------------------------------------ /// Outputs a formatted string on the DBGU stream. Format arguments are given /// in a va_list instance. /// \param pFormat Format string /// \param ap Argument list. //------------------------------------------------------------------------------ signed int vprintf(const char *pFormat, va_list ap) { return vfprintf(stdout, pFormat, ap); } //------------------------------------------------------------------------------ /// Outputs a formatted string on the given stream, using a variable number of /// arguments. /// \param pStream Output stream. /// \param pFormat Format string. //------------------------------------------------------------------------------ signed int fprintf(FILE *pStream, const char *pFormat, ...) { va_list ap; signed int result; // Forward call to vfprintf va_start(ap, pFormat); result = vfprintf(pStream, pFormat, ap); va_end(ap); return result; } //------------------------------------------------------------------------------ /// Outputs a formatted string on the DBGU stream, using a variable number of /// arguments. /// \param pFormat Format string. //------------------------------------------------------------------------------ signed int printf(const char *pFormat, ...) { va_list ap; signed int result; // Forward call to vprintf va_start(ap, pFormat); result = vprintf(pFormat, ap); va_end(ap); return result; } //------------------------------------------------------------------------------ /// Writes a formatted string inside another string. /// \param pStr Storage string. /// \param pFormat Format string. //------------------------------------------------------------------------------ signed int sprintf(char *pStr, const char *pFormat, ...) { va_list ap; signed int result; // Forward call to vsprintf va_start(ap, pFormat); result = vsprintf(pStr, pFormat, ap); va_end(ap); return result; } //------------------------------------------------------------------------------ /// Outputs a string on stdout. /// \param pStr String to output. //------------------------------------------------------------------------------ signed int puts(const char *pStr) { return fputs(pStr, stdout); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/utility/string.c000066400000000000000000000220141207233610700245730ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// Implementation of several methods defined in string.h, for reducing the /// memory footprint when using them (since the whole libc.o file gets included /// even when using a single method). /// /// !Usage /// /// Add string.c to the list of files to compile for the project. This will /// automatically replace standard libc methods by the custom ones. //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include //------------------------------------------------------------------------------ // Global Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Copies data from a source buffer into a destination buffer. The two buffers /// must NOT overlap. Returns the destination buffer. /// \param pDestination Destination buffer. /// \param pSource Source buffer. /// \param num Number of bytes to copy. //------------------------------------------------------------------------------ void * memcpy(void *pDestination, const void *pSource, size_t num) { unsigned char *pByteDestination; unsigned char *pByteSource; unsigned int *pAlignedSource = (unsigned int *) pSource; unsigned int *pAlignedDestination = (unsigned int *) pDestination; // If num is more than 4 bytes, and both dest. and source are aligned, // then copy dwords if ((((unsigned int) pAlignedDestination & 0x3) == 0) && (((unsigned int) pAlignedSource & 0x3) == 0) && (num >= 4)) { while (num >= 4) { *pAlignedDestination++ = *pAlignedSource++; num -= 4; } } // Copy remaining bytes pByteDestination = (unsigned char *) pAlignedDestination; pByteSource = (unsigned char *) pAlignedSource; while (num--) { *pByteDestination++ = *pByteSource++; } return pDestination; } //------------------------------------------------------------------------------ /// Fills a memory region with the given value. Returns a pointer to the /// memory region. /// \param pBuffer Pointer to the start of the memory region to fill /// \param value Value to fill the region with /// \param num Size to fill in bytes //------------------------------------------------------------------------------ void * memset(void *pBuffer, int value, size_t num) { unsigned char *pByteDestination; unsigned int *pAlignedDestination = (unsigned int *) pBuffer; unsigned int alignedValue = (value << 24) | (value << 16) | (value << 8) | value; // Set words if possible if ((((unsigned int) pAlignedDestination & 0x3) == 0) && (num >= 4)) { while (num >= 4) { *pAlignedDestination++ = alignedValue; num -= 4; } } // Set remaining bytes pByteDestination = (unsigned char *) pAlignedDestination; while (num--) { *pByteDestination++ = value; } return pBuffer; } //----------------------------------------------------------------------------- /// Search a character in the given string. /// Returns a pointer to the character location. /// \param pString Pointer to the start of the string to search. /// \param character The character to find. //----------------------------------------------------------------------------- char * strchr(const char *pString, int character) { char * p = (char *)pString; char c = character & 0xFF; while(*p != c) { if (*p == 0) { return 0; } p++; } return p; } //----------------------------------------------------------------------------- /// Return the length of a given string /// \param pString Pointer to the start of the string. //----------------------------------------------------------------------------- size_t strlen(const char *pString) { unsigned int length = 0; while(*pString++ != 0) { length++; } return length; } //----------------------------------------------------------------------------- /// Search a character backword from the end of given string. /// Returns a pointer to the character location. /// \param pString Pointer to the start of the string to search. /// \param character The character to find. //----------------------------------------------------------------------------- char * strrchr(const char *pString, int character) { char *p = 0; while(*pString != 0) { if (*pString++ == character) { p = (char*)pString; } } return p; } //----------------------------------------------------------------------------- /// Copy from source string to destination string /// Return a pointer to the destination string /// \param pDestination Pointer to the destination string. /// \param pSource Pointer to the source string. //----------------------------------------------------------------------------- char * strcpy(char *pDestination, const char *pSource) { char *pSaveDest = pDestination; for(; (*pDestination = *pSource) != 0; ++pSource, ++pDestination); return pSaveDest; } //----------------------------------------------------------------------------- /// Compare the first specified bytes of 2 given strings /// Return 0 if equals /// Return >0 if 1st string > 2nd string /// Return <0 if 1st string < 2nd string /// \param pString1 Pointer to the start of the 1st string. /// \param pString2 Pointer to the start of the 2nd string. /// \param count Number of bytes that should be compared. //----------------------------------------------------------------------------- int strncmp(const char *pString1, const char *pString2, size_t count) { int r; while(count) { r = *pString1 - *pString2; if (r == 0) { if (*pString1 == 0) { break; } pString1++; pString2++; count--; continue; } return r; } return 0; } //----------------------------------------------------------------------------- /// Copy the first number of bytes from source string to destination string /// Return the pointer to the destination string. /// \param pDestination Pointer to the start of destination string. /// \param pSource Pointer to the start of the source string. /// \param count Number of bytes that should be copied. //----------------------------------------------------------------------------- char * strncpy(char *pDestination, const char *pSource, size_t count) { char *pSaveDest = pDestination; while (count) { *pDestination = *pSource; if (*pSource == 0) { break; } pDestination++; pSource++; count--; } return pSaveDest; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/utility/trace.c000066400000000000000000000232431207233610700243700ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include "trace.h" //------------------------------------------------------------------------------ // Internal variables //------------------------------------------------------------------------------ /// Trace level can be set at applet initialization #if !defined(NOTRACE) && (DYN_TRACES == 1) unsigned int traceLevel = TRACE_LEVEL; #endif #ifndef NOFPUT #include #include //------------------------------------------------------------------------------ /// \exclude /// Implementation of fputc using the DBGU as the standard output. Required /// for printf(). /// \param c Character to write. /// \param pStream Output stream. /// \param The character written if successful, or -1 if the output stream is /// not stdout or stderr. //------------------------------------------------------------------------------ signed int fputc(signed int c, FILE *pStream) { if ((pStream == stdout) || (pStream == stderr)) { TRACE_PutChar(c); return c; } else { return EOF; } } //------------------------------------------------------------------------------ /// \exclude /// Implementation of fputs using the DBGU as the standard output. Required /// for printf(). Does NOT currently use the PDC. /// \param pStr String to write. /// \param pStream Output stream. /// \return Number of characters written if successful, or -1 if the output /// stream is not stdout or stderr. //------------------------------------------------------------------------------ signed int fputs(const char *pStr, FILE *pStream) { signed int num = 0; while (*pStr != 0) { if (fputc(*pStr, pStream) == -1) { return -1; } num++; pStr++; } return num; } #undef putchar //------------------------------------------------------------------------------ /// \exclude /// Outputs a character on the DBGU. /// \param c Character to output. /// \return The character that was output. //------------------------------------------------------------------------------ signed int putchar(signed int c) { return fputc(c, stdout); } #endif //#ifndef NOFPUT //------------------------------------------------------------------------------ // Local Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Print char if printable. If not print a point /// \param c char to //------------------------------------------------------------------------------ static void PrintChar(unsigned char c) { if( (/*c >= 0x00 &&*/ c <= 0x1F) || (c >= 0xB0 && c <= 0xDF) ) { printf("."); } else { printf("%c", c); } } //------------------------------------------------------------------------------ // Global Functions //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Displays the content of the given frame on the Trace interface. /// \param pBuffer Pointer to the frame to dump. /// \param size Buffer size in bytes. //------------------------------------------------------------------------------ void TRACE_DumpFrame(unsigned char *pFrame, unsigned int size) { unsigned int i; for (i=0; i < size; i++) { printf("%02X ", pFrame[i]); } printf("\n\r"); } //------------------------------------------------------------------------------ /// Displays the content of the given buffer on the Trace interface. /// \param pBuffer Pointer to the buffer to dump. /// \param size Buffer size in bytes. /// \param address Start address to display //------------------------------------------------------------------------------ void TRACE_DumpMemory( unsigned char *pBuffer, unsigned int size, unsigned int address ) { unsigned int i, j; unsigned int lastLineStart; unsigned char* pTmp; for (i=0; i < (size / 16); i++) { printf("0x%08X: ", address + (i*16)); pTmp = (unsigned char*)&pBuffer[i*16]; for (j=0; j < 4; j++) { printf("%02X%02X%02X%02X ", pTmp[0],pTmp[1],pTmp[2],pTmp[3]); pTmp += 4; } pTmp = (unsigned char*)&pBuffer[i*16]; for (j=0; j < 16; j++) { PrintChar(*pTmp++); } printf("\n\r"); } if( (size%16) != 0) { lastLineStart = size - (size%16); printf("0x%08X: ", address + lastLineStart); for (j= lastLineStart; j < lastLineStart+16; j++) { if( (j!=lastLineStart) && (j%4 == 0) ) { printf(" "); } if(j= '0' && key <= '9' ) { value = (value * 10) + (key - '0'); nbNb++; } else if(key == 0x0D || key == ' ') { if(nbNb == 0) { printf("\n\rWrite a number and press ENTER or SPACE!\n\r"); return 0; } else { printf("\n\r"); *pValue = value; return 1; } } else { printf("\n\r'%c' not a number!\n\r", key); return 0; } } } //------------------------------------------------------------------------------ /// Reads an integer and check the value //------------------------------------------------------------------------------ unsigned char TRACE_GetIntegerMinMax( unsigned int *pValue, unsigned int min, unsigned int max ) { unsigned int value = 0; if( TRACE_GetInteger(&value) == 0) { return 0; } if(value < min || value > max) { printf("\n\rThe number have to be between %d and %d\n\r", min, max); return 0; } printf("\n\r"); *pValue = value; return 1; } //------------------------------------------------------------------------------ /// Reads an hexadecimal number //------------------------------------------------------------------------------ unsigned char TRACE_GetHexa32(unsigned int *pValue) { unsigned char key; unsigned int i = 0; unsigned int value = 0; for(i = 0; i < 8; i++) { key = TRACE_GetChar(); TRACE_PutChar(key); if(key >= '0' && key <= '9' ) { value = (value * 16) + (key - '0'); } else if(key >= 'A' && key <= 'F' ) { value = (value * 16) + (key - 'A' + 10) ; } else if(key >= 'a' && key <= 'f' ) { value = (value * 16) + (key - 'a' + 10) ; } else { printf("\n\rIt is not a hexa character!\n\r"); return 0; } } printf("\n\r"); *pValue = value; return 1; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/usb/utility/trace.h000066400000000000000000000356131207233610700244010ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support * ---------------------------------------------------------------------------- * Copyright (c) 2008, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ //------------------------------------------------------------------------------ /// \unit /// /// !Purpose /// /// Standard output methods for reporting debug information, warnings and /// errors, which can be easily be turned on/off. /// /// !Usage /// -# Initialize the DBGU using TRACE_CONFIGURE() if you intend to eventually /// disable ALL traces; otherwise use DBGU_Configure(). /// -# Uses the TRACE_DEBUG(), TRACE_INFO(), TRACE_WARNING(), TRACE_ERROR() /// TRACE_FATAL() macros to output traces throughout the program. /// -# Each type of trace has a level : Debug 5, Info 4, Warning 3, Error 2 /// and Fatal 1. Disable a group of traces by changing the value of /// TRACE_LEVEL during compilation; traces with a level bigger than TRACE_LEVEL /// are not generated. To generate no trace, use the reserved value 0. /// -# Trace disabling can be static or dynamic. If dynamic disabling is selected /// the trace level can be modified in runtime. If static disabling is selected /// the disabled traces are not compiled. /// /// !Trace level description /// -# TRACE_DEBUG (5): Traces whose only purpose is for debugging the program, /// and which do not produce meaningful information otherwise. /// -# TRACE_INFO (4): Informational trace about the program execution. Should /// enable the user to see the execution flow. /// -# TRACE_WARNING (3): Indicates that a minor error has happened. In most case /// it can be discarded safely; it may even be expected. /// -# TRACE_ERROR (2): Indicates an error which may not stop the program execution, /// but which indicates there is a problem with the code. /// -# TRACE_FATAL (1): Indicates a major error which prevents the program from going /// any further. //------------------------------------------------------------------------------ #ifndef TRACE_H #define TRACE_H //------------------------------------------------------------------------------ // Headers //------------------------------------------------------------------------------ #include #include #include // Select the trace interface // (add usart.o file in makefile if Usart interface is selected) #define TRACE_DBGU 1 //#define TRACE_USART_0 1 //#define TRACE_USART_1 1 //#define TRACE_USART_2 1 #if defined(TRACE_DBGU) #include #else #include #endif //------------------------------------------------------------------------------ // Global Definitions //------------------------------------------------------------------------------ /// Softpack Version #define SOFTPACK_VERSION "1.6" #define TRACE_LEVEL_DEBUG 5 #define TRACE_LEVEL_INFO 4 #define TRACE_LEVEL_WARNING 3 #define TRACE_LEVEL_ERROR 2 #define TRACE_LEVEL_FATAL 1 #define TRACE_LEVEL_NO_TRACE 0 // By default, all traces are output except the debug one. #if !defined(TRACE_LEVEL) #define TRACE_LEVEL TRACE_LEVEL_INFO #endif // By default, trace level is static (not dynamic) #if !defined(DYN_TRACES) #define DYN_TRACES 0 #endif #if defined(NOTRACE) #error "Error: NOTRACE has to be not defined !" #endif #undef NOTRACE #if (DYN_TRACES==0) #if (TRACE_LEVEL == TRACE_LEVEL_NO_TRACE) #define NOTRACE #endif #endif //------------------------------------------------------------------------------ // Global Macros //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ /// Initializes the trace for normal project /// \param mode DBGU mode. /// \param baudrate DBGU baudrate. /// \param mck Master clock frequency. //------------------------------------------------------------------------------ #if defined(TRACE_DBGU) #define TRACE_CONFIGURE(mode, baudrate, mck) { \ const Pin pinsDbgu[] = {PINS_DBGU}; \ PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \ DBGU_Configure(mode, baudrate, mck); \ } #elif defined(TRACE_USART_0) #define TRACE_CONFIGURE(mode, baudrate, mck) { \ const Pin pinsUsart[] = {PIN_USART0_TXD, PIN_USART0_RXD}; \ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;\ AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;\ PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \ USART_Configure(AT91C_BASE_US0,USART_MODE_ASYNCHRONOUS, baudrate, mck); \ USART_SetTransmitterEnabled(AT91C_BASE_US0,1);\ USART_SetReceiverEnabled(AT91C_BASE_US0,1);\ } #elif defined(TRACE_USART_1) #define TRACE_CONFIGURE(mode, baudrate, mck) { \ const Pin pinsUsart[] = {PIN_USART1_TXD, PIN_USART1_RXD}; \ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US1;\ AT91C_BASE_US1->US_IDR = 0xFFFFFFFF;\ PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \ USART_Configure(AT91C_BASE_US1,USART_MODE_ASYNCHRONOUS, baudrate, mck); \ USART_SetTransmitterEnabled(AT91C_BASE_US1,1);\ USART_SetReceiverEnabled(AT91C_BASE_US1,1);\ } #elif defined(TRACE_USART_2) #define TRACE_CONFIGURE(mode, baudrate, mck) { \ const Pin pinsUsart[] = {PIN_USART2_TXD, PIN_USART2_RXD}; \ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US2;\ AT91C_BASE_US2->US_IDR = 0xFFFFFFFF;\ PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \ USART_Configure(AT91C_BASE_US2,USART_MODE_ASYNCHRONOUS, baudrate, mck); \ USART_SetTransmitterEnabled(AT91C_BASE_US2,1);\ USART_SetReceiverEnabled(AT91C_BASE_US2,1);\ } #endif //------------------------------------------------------------------------------ /// Initializes the trace for ISP project /// \param mode DBGU mode. /// \param baudrate DBGU baudrate. /// \param mck Master clock frequency. //------------------------------------------------------------------------------ #if (TRACE_LEVEL==0) && (DYN_TRACES==0) #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) {} #elif defined(TRACE_DBGU) #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \ const Pin pinsDbgu[] = {PINS_DBGU}; \ PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \ DBGU_Configure(mode, baudrate, mck); \ } #elif defined(TRACE_USART_0) #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \ const Pin pinsUsart[] = {PIN_USART0_TXD, PIN_USART0_RXD}; \ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;\ AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;\ PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \ USART_Configure(AT91C_BASE_US0,USART_MODE_ASYNCHRONOUS, baudrate, mck); \ USART_SetTransmitterEnabled(AT91C_BASE_US0,1);\ USART_SetReceiverEnabled(AT91C_BASE_US0,1);\ } #elif defined(TRACE_USART_1) #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \ const Pin pinsUsart[] = {PIN_USART1_TXD, PIN_USART1_RXD}; \ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US1;\ AT91C_BASE_US1->US_IDR = 0xFFFFFFFF;\ PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \ USART_Configure(AT91C_BASE_US1,USART_MODE_ASYNCHRONOUS, baudrate, mck); \ USART_SetTransmitterEnabled(AT91C_BASE_US1,1);\ USART_SetReceiverEnabled(AT91C_BASE_US1,1);\ } #elif defined(TRACE_USART_2) #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \ const Pin pinsUsart[] = {PIN_USART2_TXD, PIN_USART2_RXD}; \ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US2;\ AT91C_BASE_US2->US_IDR = 0xFFFFFFFF;\ PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \ USART_Configure(AT91C_BASE_US2,USART_MODE_ASYNCHRONOUS, baudrate, mck); \ USART_SetTransmitterEnabled(AT91C_BASE_US2,1);\ USART_SetReceiverEnabled(AT91C_BASE_US2,1);\ } #endif //------------------------------------------------------------------------------ /// Macros TRACE_PutChar & TRACE_GetChar & TRACE_IsRxReady //------------------------------------------------------------------------------ #if defined(TRACE_DBGU) #define TRACE_PutChar(c) DBGU_PutChar(c) #define TRACE_GetChar() DBGU_GetChar() #define TRACE_IsRxReady() DBGU_IsRxReady() #elif defined(TRACE_USART_0) #define TRACE_PutChar(c) USART_PutChar(AT91C_BASE_US0, c) #define TRACE_GetChar() USART_GetChar(AT91C_BASE_US0) #define TRACE_IsRxReady() USART_IsRxReady(AT91C_BASE_US0) #elif defined(TRACE_USART_1) #define TRACE_PutChar(c) USART_PutChar(AT91C_BASE_US1, c) #define TRACE_GetChar() USART_GetChar(AT91C_BASE_US1) #define TRACE_IsRxReady() USART_IsRxReady(AT91C_BASE_US1) #elif defined(TRACE_USART_2) #define TRACE_PutChar(c) USART_PutChar(AT91C_BASE_US2, c) #define TRACE_GetChar() USART_GetChar(AT91C_BASE_US2) #define TRACE_IsRxReady() USART_IsRxReady(AT91C_BASE_US2) #endif //------------------------------------------------------------------------------ /// Outputs a formatted string using if the log level is high /// enough. Can be disabled by defining TRACE_LEVEL=0 during compilation. /// \param format Formatted string to output. /// \param ... Additional parameters depending on formatted string. //------------------------------------------------------------------------------ #if defined(NOTRACE) // Empty macro #define TRACE_DEBUG(...) { } #define TRACE_INFO(...) { } #define TRACE_WARNING(...) { } #define TRACE_ERROR(...) { } #define TRACE_FATAL(...) { while(1); } #define TRACE_DEBUG_WP(...) { } #define TRACE_INFO_WP(...) { } #define TRACE_WARNING_WP(...) { } #define TRACE_ERROR_WP(...) { } #define TRACE_FATAL_WP(...) { while(1); } #elif (DYN_TRACES == 1) // Trace output depends on traceLevel value #define TRACE_DEBUG(...) { if (traceLevel >= TRACE_LEVEL_DEBUG) { printf("-D- " __VA_ARGS__); } } #define TRACE_INFO(...) { if (traceLevel >= TRACE_LEVEL_INFO) { printf("-I- " __VA_ARGS__); } } #define TRACE_WARNING(...) { if (traceLevel >= TRACE_LEVEL_WARNING) { printf("-W- " __VA_ARGS__); } } #define TRACE_ERROR(...) { if (traceLevel >= TRACE_LEVEL_ERROR) { printf("-E- " __VA_ARGS__); } } #define TRACE_FATAL(...) { if (traceLevel >= TRACE_LEVEL_FATAL) { printf("-F- " __VA_ARGS__); while(1); } } #define TRACE_DEBUG_WP(...) { if (traceLevel >= TRACE_LEVEL_DEBUG) { printf(__VA_ARGS__); } } #define TRACE_INFO_WP(...) { if (traceLevel >= TRACE_LEVEL_INFO) { printf(__VA_ARGS__); } } #define TRACE_WARNING_WP(...) { if (traceLevel >= TRACE_LEVEL_WARNING) { printf(__VA_ARGS__); } } #define TRACE_ERROR_WP(...) { if (traceLevel >= TRACE_LEVEL_ERROR) { printf(__VA_ARGS__); } } #define TRACE_FATAL_WP(...) { if (traceLevel >= TRACE_LEVEL_FATAL) { printf(__VA_ARGS__); while(1); } } #else // Trace compilation depends on TRACE_LEVEL value #if (TRACE_LEVEL >= TRACE_LEVEL_DEBUG) #define TRACE_DEBUG(...) { printf("-D- " __VA_ARGS__); } #define TRACE_DEBUG_WP(...) { printf(__VA_ARGS__); } #else #define TRACE_DEBUG(...) { } #define TRACE_DEBUG_WP(...) { } #endif #if (TRACE_LEVEL >= TRACE_LEVEL_INFO) #define TRACE_INFO(...) { printf("-I- " __VA_ARGS__); } #define TRACE_INFO_WP(...) { printf(__VA_ARGS__); } #else #define TRACE_INFO(...) { } #define TRACE_INFO_WP(...) { } #endif #if (TRACE_LEVEL >= TRACE_LEVEL_WARNING) #define TRACE_WARNING(...) { printf("-W- " __VA_ARGS__); } #define TRACE_WARNING_WP(...) { printf(__VA_ARGS__); } #else #define TRACE_WARNING(...) { } #define TRACE_WARNING_WP(...) { } #endif #if (TRACE_LEVEL >= TRACE_LEVEL_ERROR) #define TRACE_ERROR(...) { printf("-E- " __VA_ARGS__); } #define TRACE_ERROR_WP(...) { printf(__VA_ARGS__); } #else #define TRACE_ERROR(...) { } #define TRACE_ERROR_WP(...) { } #endif #if (TRACE_LEVEL >= TRACE_LEVEL_FATAL) #define TRACE_FATAL(...) { printf("-F- " __VA_ARGS__); while(1); } #define TRACE_FATAL_WP(...) { printf(__VA_ARGS__); while(1); } #else #define TRACE_FATAL(...) { while(1); } #define TRACE_FATAL_WP(...) { while(1); } #endif #endif //------------------------------------------------------------------------------ // Exported variables //------------------------------------------------------------------------------ // Depending on DYN_TRACES, traceLevel is a modifable runtime variable // or a define #if !defined(NOTRACE) && (DYN_TRACES == 1) extern unsigned int traceLevel; #endif //------------------------------------------------------------------------------ // Global Functions //------------------------------------------------------------------------------ extern void TRACE_DumpFrame(unsigned char *pFrame, unsigned int size); extern void TRACE_DumpMemory(unsigned char *pBuffer, unsigned int size, unsigned int address); extern unsigned char TRACE_GetInteger(unsigned int *pValue); extern unsigned char TRACE_GetIntegerMinMax(unsigned int *pValue, unsigned int min, unsigned int max); extern unsigned char TRACE_GetHexa32(unsigned int *pValue); #endif //#ifndef TRACE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/wdtc/000077500000000000000000000000001207233610700215675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/u/wdtc/sam3wdtchardware.h000066400000000000000000000036121207233610700252050ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Watchdog Timer register definitions. * * @author Thomas Schmid */ #ifndef _SAM3UWDTCHARDWARE_H #define _SAM3UWDTCHARDWARE_H #include "wdtchardware.h" /** * Memory mapping for the WDTC */ volatile wdtc_t* WDTC = (volatile wdtc_t *) 0x400E1250; // WDTC Base Address #endif // _SAM3UWDTCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/000077500000000000000000000000001207233610700213355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc000066400000000000000000000175621207233610700241060ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * UART implementation for the SAM3U chip. Does not use DMA (PDC) at this * point, but does use IRQs for operation. * * @author Wanja Hofer */ #include "sam3uarthardware.h" module HilSam3UartP { provides { interface Init; interface StdControl; interface UartByte; interface UartStream; } uses { interface HplSam3UartControl; interface HplSam3UartInterrupts; interface HplSam3UartStatus; interface HplSam3UartConfig; interface HplNVICInterruptCntl as UartIrqControl; interface HplSam3GeneralIOPin as UartPin1; interface HplSam3GeneralIOPin as UartPin2; interface HplSam3PeripheralClockCntl as UartClockControl; interface HplSam3Clock as ClockConfig; } } implementation { uint8_t *receiveBuffer; // pointer to current receive buffer or 0 if none uint16_t receiveBufferLength; // length of the current receive buffer uint16_t receiveBufferPosition; // position of the next character to receive in the buffer uint8_t *transmitBuffer; // pointer to current transmit buffer or 0 if none uint16_t transmitBufferLength; // length of the current transmit buffer uint16_t transmitBufferPosition; // position of the next character to transmit from the buffer void setClockDivisor() { uint32_t mck; uint16_t cd; mck = call ClockConfig.getMainClockSpeed(); // in kHz (e.g., 48,000) // set to 9,600 baud // baudrate = mck / (cd * 16) // cd = mck / (16 * baudrate) // here: cd = mck / 16 * 1000 / baudrate cd = (uint16_t) (((mck / 16) * 1000) / PLATFORM_BAUDRATE); //call HplSam3UartConfig.setClockDivisor(312); // 9,600 baud with MCK = 48 MHz call HplSam3UartConfig.setClockDivisor(cd); } command error_t Init.init() { // turn off all UART IRQs call HplSam3UartInterrupts.disableAllUartIrqs(); // configure NVIC call UartIrqControl.configure(IRQ_PRIO_UART); call UartIrqControl.enable(); // configure PIO call UartPin1.disablePioControl(); call UartPin1.selectPeripheralA(); call UartPin2.disablePioControl(); call UartPin2.selectPeripheralA(); // configure mode and parity call HplSam3UartConfig.setChannelModeAndParityType(UART_MR_CHMODE_NORMAL, UART_MR_PAR_NONE); // configure baud rate setClockDivisor(); // initialize buffer pointers // important because this determines if UartStream is busy or not receiveBuffer = NULL; transmitBuffer = NULL; return SUCCESS; } async event void ClockConfig.mainClockChanged() { // adapt clock divisor to accommodate for PLATFORM_BAUDRATE setClockDivisor(); } command error_t StdControl.start() { // enable peripheral clock call UartClockControl.enable(); // enable receiver and transmitter call HplSam3UartControl.enableReceiver(); call HplSam3UartControl.enableTransmitter(); // enable receive IRQ call HplSam3UartInterrupts.enableRxrdyIrq(); return SUCCESS; } command error_t StdControl.stop() { // will finish any ongoing receptions and transmissions call HplSam3UartControl.disableReceiver(); call HplSam3UartControl.disableTransmitter(); // disable peripheral clock call UartClockControl.disable(); return SUCCESS; } async command error_t UartStream.enableReceiveInterrupt() { call HplSam3UartInterrupts.enableRxrdyIrq(); return SUCCESS; } async command error_t UartStream.disableReceiveInterrupt() { call HplSam3UartInterrupts.disableRxrdyIrq(); return SUCCESS; } async command error_t UartStream.receive(uint8_t* buffer, uint16_t length) { if (length == 0) { return FAIL; } atomic { if (receiveBuffer != NULL) { return EBUSY; // in the middle of a reception } else { receiveBuffer = buffer; receiveBufferLength = length; receiveBufferPosition = 0; call HplSam3UartInterrupts.enableRxrdyIrq(); } } return SUCCESS; } async event void HplSam3UartInterrupts.receivedByte(uint8_t data) { atomic { if (receiveBuffer != NULL) { // receive into buffer receiveBuffer[receiveBufferPosition] = data; receiveBufferPosition++; if (receiveBufferPosition >= receiveBufferLength) { // buffer is full uint8_t *bufferToSignal = receiveBuffer; atomic { receiveBuffer = NULL; call HplSam3UartInterrupts.disableRxrdyIrq(); } // signal reception of complete buffer signal UartStream.receiveDone(bufferToSignal, receiveBufferLength, SUCCESS); } } else { // signal single byte reception signal UartStream.receivedByte(data); } } } async command error_t UartStream.send(uint8_t *buffer, uint16_t length) { if (length == 0) { return FAIL; } atomic { if (transmitBuffer != NULL) { return EBUSY; } else { transmitBufferLength = length; transmitBuffer = buffer; transmitBufferPosition = 0; // enable ready-to-transmit IRQ call HplSam3UartInterrupts.enableTxrdyIrq(); return SUCCESS; } } } async event void HplSam3UartInterrupts.transmitterReady() { atomic { if (transmitBufferPosition < transmitBufferLength) { // characters to transfer in the buffer call HplSam3UartStatus.setCharToTransmit(transmitBuffer[transmitBufferPosition]); transmitBufferPosition++; } else { // all characters transmitted uint8_t *bufferToSignal = transmitBuffer; transmitBuffer = NULL; call HplSam3UartInterrupts.disableTxrdyIrq(); signal UartStream.sendDone(bufferToSignal, transmitBufferLength, SUCCESS); } } } async command error_t UartByte.send(uint8_t byte) { if (call HplSam3UartInterrupts.isEnabledTxrdyIrq() == TRUE) { return FAIL; // in the middle of a stream transmission } // transmit synchronously call HplSam3UartStatus.setCharToTransmit(byte); while (call HplSam3UartStatus.isTransmitterReady() == FALSE); return SUCCESS; } async command error_t UartByte.receive(uint8_t *byte, uint8_t timeout) { // FIXME timeout currently ignored if (call HplSam3UartInterrupts.isEnabledRxrdyIrq() == TRUE) { return FAIL; // in the middle of a stream reception } // receive synchronously while (call HplSam3UartStatus.isReceiverReady() == FALSE); *byte = call HplSam3UartStatus.getReceivedChar(); return SUCCESS; } default async event void UartStream.sendDone(uint8_t *buffer, uint16_t length, error_t error) {} default async event void UartStream.receivedByte(uint8_t byte) {} default async event void UartStream.receiveDone(uint8_t *buffer, uint16_t length, error_t error) {} } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/HplSam3UartC.nc000066400000000000000000000044011207233610700240640ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "sam3uarthardware.h" /** * The hardware presentation layer for the SAM3U UART. * * @author Wanja Hofer */ configuration HplSam3UartC { provides { interface HplSam3UartConfig; interface HplSam3UartControl; interface HplSam3UartInterrupts; interface HplSam3UartStatus; } #ifdef THREADS uses interface PlatformInterrupt; #endif } implementation { components HplSam3UartP; HplSam3UartConfig = HplSam3UartP; HplSam3UartControl = HplSam3UartP; HplSam3UartInterrupts = HplSam3UartP; HplSam3UartStatus = HplSam3UartP; #ifdef THREADS PlatformInterrupt = HplSam3UartP; #endif components McuSleepC; HplSam3UartP.UartInterruptWrapper -> McuSleepC; } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/HplSam3UartConfig.nc000066400000000000000000000047051207233610700251160ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to configure the SAM3U UART. * * @author Wanja Hofer */ interface HplSam3UartConfig { /** * cd = 0: baud rate generator disabled * cd = 0: baud rate = MCK * cd = 2--65535: baud rate = MCK / (cd * 16) */ async command error_t setClockDivisor(uint16_t cd); /** * Have to be set together since they are in the same register. * * chmode = 0x0/UART_MR_CHMODE_NORMAL: normal * chmode = 0x1/UART_MR_CHMODE_AUTOECHO: automatic echo * chmode = 0x2/UART_MR_CHMODE_LOCALLOOP: local loopback * chmode = 0x3/UART_MR_CHMODE_REMOTELOOP: remote loopback * * par = 0x0/UART_MR_PAR_EVEN: even * par = 0x1/UART_MR_PAR_ODD: odd * par = 0x2/UART_MR_PAR_SPACE: space (forced to 0) * par = 0x3/UART_MR_PAR_MARK: mark (forced to 1) * par = 0x4/UART_MR_PAR_NONE: none */ async command error_t setChannelModeAndParityType(uint8_t chmode, uint8_t par); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/HplSam3UartControl.nc000066400000000000000000000037151207233610700253310ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to control the SAM3U UART. * * @author Wanja Hofer */ interface HplSam3UartControl { async command void resetReceiver(); async command void resetTransmitter(); async command void enableReceiver(); async command void disableReceiver(); async command void enableTransmitter(); async command void disableTransmitter(); async command void resetStatusBits(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/HplSam3UartInterrupts.nc000066400000000000000000000057711207233610700260740ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to control and query SAM3U UART interrupts. * * @author Wanja Hofer */ interface HplSam3UartInterrupts { async event void receivedByte(uint8_t data); async event void transmitterReady(); async command void disableAllUartIrqs(); async command void enableRxrdyIrq(); async command void disableRxrdyIrq(); async command bool isEnabledRxrdyIrq(); async command void enableTxrdyIrq(); async command void disableTxrdyIrq(); async command bool isEnabledTxrdyIrq(); async command void enableEndrxIrq(); async command void disableEndrxIrq(); async command bool isEnabledEndrxIrq(); async command void enableEndtxIrq(); async command void disableEndtxIrq(); async command bool isEnabledEndtxIrq(); async command void enableOvreIrq(); async command void disableOvreIrq(); async command bool isEnabledOvreIrq(); async command void enableFrameIrq(); async command void disableFrameIrq(); async command bool isEnabledFrameIrq(); async command void enablePareIrq(); async command void disablePareIrq(); async command bool isEnabledPareIrq(); async command void enableTxemptyIrq(); async command void disableTxemptyIrq(); async command bool isEnabledTxemptyIrq(); async command void enableTxbufeIrq(); async command void disableTxbufeIrq(); async command bool isEnabledTxbufeIrq(); async command void enableRxbuffIrq(); async command void disableRxbuffIrq(); async command bool isEnabledRxbuffIrq(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/HplSam3UartP.nc000066400000000000000000000217421207233610700241100ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "sam3uarthardware.h" /** * The hardware presentation layer for the SAM3U UART. * * @author Wanja Hofer */ module HplSam3UartP { provides { interface HplSam3UartConfig; interface HplSam3UartControl; interface HplSam3UartInterrupts; interface HplSam3UartStatus; } uses { interface FunctionWrapper as UartInterruptWrapper; #ifdef THREADS interface PlatformInterrupt; #endif } } implementation { /** * cd = 0: baud rate generator disabled * cd = 0: baud rate = MCK * cd = 2--65535: baud rate = MCK / (cd * 16) */ async command error_t HplSam3UartConfig.setClockDivisor(uint16_t cd) { UART_BRGR->bits.cd = cd; return SUCCESS; } /** * chmode = 0x0/UART_MR_CHMODE_NORMAL: normal * chmode = 0x1/UART_MR_CHMODE_AUTOECHO: automatic echo * chmode = 0x2/UART_MR_CHMODE_LOCALLOOP: local loopback * chmode = 0x3/UART_MR_CHMODE_REMOTELOOP: remote loopback * * par = 0x0/UART_MR_PAR_EVEN: even * par = 0x1/UART_MR_PAR_ODD: odd * par = 0x2/UART_MR_PAR_SPACE: space (forced to 0) * par = 0x3/UART_MR_PAR_MARK: mark (forced to 1) * par = 0x4/UART_MR_PAR_NONE: none */ async command error_t HplSam3UartConfig.setChannelModeAndParityType(uint8_t chmode, uint8_t par) { uart_mr_t reg; if (chmode > 0x3) return FAIL; if (par > 0x4) return FAIL; reg.flat = 0; reg.bits.par = par; reg.bits.chmode = chmode; *UART_MR = reg; return SUCCESS; } async command void HplSam3UartInterrupts.disableAllUartIrqs() { call HplSam3UartInterrupts.disableRxrdyIrq(); call HplSam3UartInterrupts.disableTxrdyIrq(); call HplSam3UartInterrupts.disableEndrxIrq(); call HplSam3UartInterrupts.disableEndtxIrq(); call HplSam3UartInterrupts.disableOvreIrq(); call HplSam3UartInterrupts.disableFrameIrq(); call HplSam3UartInterrupts.disablePareIrq(); call HplSam3UartInterrupts.disableTxemptyIrq(); call HplSam3UartInterrupts.disableTxbufeIrq(); call HplSam3UartInterrupts.disableRxbuffIrq(); } async command void HplSam3UartControl.resetReceiver() { UART_CR->bits.rstrx = 1; } async command void HplSam3UartControl.resetTransmitter() { UART_CR->bits.rsttx = 1; } async command void HplSam3UartControl.enableReceiver() { UART_CR->bits.rxen = 1; } async command void HplSam3UartControl.disableReceiver() { UART_CR->bits.rxdis = 1; } async command void HplSam3UartControl.enableTransmitter() { UART_CR->bits.txen = 1; } async command void HplSam3UartControl.disableTransmitter() { UART_CR->bits.txdis = 1; } async command void HplSam3UartControl.resetStatusBits() { UART_CR->bits.rststa = 1; } __attribute__((interrupt)) void UartIrqHandler() @C() @spontaneous() { call UartInterruptWrapper.preamble(); if ((call HplSam3UartInterrupts.isEnabledRxrdyIrq() == TRUE) && (call HplSam3UartStatus.isReceiverReady() == TRUE)) { uint8_t data = call HplSam3UartStatus.getReceivedChar(); signal HplSam3UartInterrupts.receivedByte(data); } if ((call HplSam3UartInterrupts.isEnabledTxrdyIrq() == TRUE) && (call HplSam3UartStatus.isTransmitterReady() == TRUE)) { signal HplSam3UartInterrupts.transmitterReady(); } call UartInterruptWrapper.postamble(); #ifdef THREADS call PlatformInterrupt.postAmble(); #endif } // Rxrdy async command void HplSam3UartInterrupts.enableRxrdyIrq() { UART_IER->bits.rxrdy = 1; } async command void HplSam3UartInterrupts.disableRxrdyIrq() { UART_IDR->bits.rxrdy = 1; } async command bool HplSam3UartInterrupts.isEnabledRxrdyIrq() { return (UART_IMR->bits.rxrdy == 0x1); } // Txrdy async command void HplSam3UartInterrupts.enableTxrdyIrq() { UART_IER->bits.txrdy = 1; } async command void HplSam3UartInterrupts.disableTxrdyIrq() { UART_IDR->bits.txrdy = 1; } async command bool HplSam3UartInterrupts.isEnabledTxrdyIrq() { return (UART_IMR->bits.txrdy == 0x1); } // Endrx async command void HplSam3UartInterrupts.enableEndrxIrq() { UART_IER->bits.endrx = 1; } async command void HplSam3UartInterrupts.disableEndrxIrq() { UART_IDR->bits.endrx = 1; } async command bool HplSam3UartInterrupts.isEnabledEndrxIrq() { return (UART_IMR->bits.endrx == 0x1); } // Endtx async command void HplSam3UartInterrupts.enableEndtxIrq() { UART_IER->bits.endtx = 1; } async command void HplSam3UartInterrupts.disableEndtxIrq() { UART_IDR->bits.endtx = 1; } async command bool HplSam3UartInterrupts.isEnabledEndtxIrq() { return (UART_IMR->bits.endtx == 0x1); } // Ovre async command void HplSam3UartInterrupts.enableOvreIrq() { UART_IER->bits.ovre = 1; } async command void HplSam3UartInterrupts.disableOvreIrq() { UART_IDR->bits.ovre = 1; } async command bool HplSam3UartInterrupts.isEnabledOvreIrq() { return (UART_IMR->bits.ovre == 0x1); } // Frame async command void HplSam3UartInterrupts.enableFrameIrq() { UART_IER->bits.frame = 1; } async command void HplSam3UartInterrupts.disableFrameIrq() { UART_IDR->bits.frame = 1; } async command bool HplSam3UartInterrupts.isEnabledFrameIrq() { return (UART_IMR->bits.frame == 0x1); } // Pare async command void HplSam3UartInterrupts.enablePareIrq() { UART_IER->bits.pare = 1; } async command void HplSam3UartInterrupts.disablePareIrq() { UART_IDR->bits.pare = 1; } async command bool HplSam3UartInterrupts.isEnabledPareIrq() { return (UART_IMR->bits.pare == 0x1); } // Txempty async command void HplSam3UartInterrupts.enableTxemptyIrq() { UART_IER->bits.txempty = 1; } async command void HplSam3UartInterrupts.disableTxemptyIrq() { UART_IDR->bits.txempty = 1; } async command bool HplSam3UartInterrupts.isEnabledTxemptyIrq() { return (UART_IMR->bits.txempty == 0x1); } // Txbufe async command void HplSam3UartInterrupts.enableTxbufeIrq() { UART_IER->bits.txbufe = 1; } async command void HplSam3UartInterrupts.disableTxbufeIrq() { UART_IDR->bits.txbufe = 1; } async command bool HplSam3UartInterrupts.isEnabledTxbufeIrq() { return (UART_IMR->bits.txbufe == 0x1); } // Rxbuff async command void HplSam3UartInterrupts.enableRxbuffIrq() { UART_IER->bits.rxbuff = 1; } async command void HplSam3UartInterrupts.disableRxbuffIrq() { UART_IDR->bits.rxbuff = 1; } async command bool HplSam3UartInterrupts.isEnabledRxbuffIrq() { return (UART_IMR->bits.rxbuff == 0x1); } async command uint8_t HplSam3UartStatus.getReceivedChar() { return UART_RHR->bits.rxchr; } async command void HplSam3UartStatus.setCharToTransmit(uint8_t txchr) { UART_THR->bits.txchr = txchr; } async command bool HplSam3UartStatus.isReceiverReady() { return (UART_SR->bits.rxrdy == 0x1); } async command bool HplSam3UartStatus.isTransmitterReady() { return (UART_SR->bits.txrdy == 0x1); } async command bool HplSam3UartStatus.isEndOfReceiverTransfer() { return (UART_SR->bits.endrx == 0x1); } async command bool HplSam3UartStatus.isEndOfTransmitterTransfer() { return (UART_SR->bits.endtx == 0x1); } async command bool HplSam3UartStatus.isOverrunError() { return (UART_SR->bits.ovre == 0x1); } async command bool HplSam3UartStatus.isFramingError() { return (UART_SR->bits.frame == 0x1); } async command bool HplSam3UartStatus.isParityError() { return (UART_SR->bits.pare == 0x1); } async command bool HplSam3UartStatus.isTransmitterEmpty() { return (UART_SR->bits.txempty == 0x1); } async command bool HplSam3UartStatus.isTransmissionBufferEmpty() { return (UART_SR->bits.txbufe == 0x1); } async command bool HplSam3UartStatus.isReceiveBufferFull() { return (UART_SR->bits.rxbuff == 0x1); } } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/HplSam3UartStatus.nc000066400000000000000000000043161207233610700251720ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to query the status of the SAM3U UART. * * @author Wanja Hofer */ interface HplSam3UartStatus { async command uint8_t getReceivedChar(); async command void setCharToTransmit(uint8_t txchr); async command bool isReceiverReady(); async command bool isTransmitterReady(); async command bool isEndOfReceiverTransfer(); async command bool isEndOfTransmitterTransfer(); async command bool isOverrunError(); async command bool isFramingError(); async command bool isParityError(); async command bool isTransmitterEmpty(); async command bool isTransmissionBufferEmpty(); async command bool isReceiveBufferFull(); } tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/uart/uarthardware.h000066400000000000000000000115461207233610700242060ustar00rootroot00000000000000/* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Definitions specific to the SAM3U UART chip. * * @author Wanja Hofer */ #ifndef UARTHARDWARE_H #define UARTHARDWARE_H // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 668 typedef union { uint32_t flat; struct { uint8_t reserved3 : 2; uint8_t rstrx : 1; // reset receiver uint8_t rsttx : 1; // reset transmitter uint8_t rxen : 1; // receiver enable uint8_t rxdis : 1; // receiver disable uint8_t txen : 1; // transmitter enable uint8_t txdis : 1; // transmitter disable uint8_t rststa : 1; // reset status bits uint8_t reserved2 : 7; uint8_t reserved1 : 8; uint8_t reserved0 : 8; } bits; } uart_cr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 669 typedef union { uint32_t flat; struct { uint8_t reserved4 : 8; uint8_t reserved3 : 1; uint8_t par : 3; // parity type uint8_t reserved2 : 2; uint8_t chmode : 2; // channel mode uint8_t reserved1 : 8; uint8_t reserved0 : 8; } bits; } uart_mr_t; enum { UART_MR_PAR_EVEN = 0x0, UART_MR_PAR_ODD = 0x1, UART_MR_PAR_SPACE = 0x2, UART_MR_PAR_MARK = 0x3, UART_MR_PAR_NONE = 0x4 }; enum { UART_MR_CHMODE_NORMAL = 0x0, UART_MR_CHMODE_AUTOECHO = 0x1, UART_MR_CHMODE_LOCALLOOP = 0x2, UART_MR_CHMODE_REMOTELOOP = 0x3 }; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 670 typedef union { uint32_t flat; struct { uint8_t rxrdy : 1; // receiver ready uint8_t txrdy : 1; // transmitter ready uint8_t reserved5 : 1; uint8_t endrx : 1; // end of receiver transfer uint8_t endtx : 1; // end of transmitter transfer uint8_t ovre : 1; // overrun error uint8_t frame : 1; // framing error uint8_t pare : 1; // parity error uint8_t reserved4 : 1; uint8_t txempty : 1; // transmitter empty uint8_t reserved3 : 1; uint8_t txbufe : 1; // transmission buffer empty uint8_t rxbuff : 1; // receive buffer full uint8_t reserved2 : 3; uint8_t reserved1 : 8; uint8_t reserved0 : 8; } bits; } uart_ier_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 671 typedef uart_ier_t uart_idr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 672 typedef uart_ier_t uart_imr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 673 typedef uart_ier_t uart_sr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 675 typedef union { uint32_t flat; struct { uint8_t rxchr : 8; // received character uint8_t reserved2 : 8; uint8_t reserved1 : 8; uint8_t reserved0 : 8; } bits; } uart_rhr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 675 typedef union { uint32_t flat; struct { uint8_t txchr : 8; // character to be transmitted uint8_t reserved2 : 8; uint8_t reserved1 : 8; uint8_t reserved0 : 8; } bits; } uart_thr_t; // Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 676 typedef union { uint32_t flat; struct { uint16_t cd : 16; // clock divisor uint8_t reserved1 : 8; uint8_t reserved0 : 8; } bits; } uart_brgr_t; #endif // UARTHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/wdtc/000077500000000000000000000000001207233610700213235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/cortex/m3/sam3/wdtc/wdtchardware.h000066400000000000000000000070441207233610700241600ustar00rootroot00000000000000/** * Copyright (c) 2009 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /** * Watchdog Timer register definitions. * * @author Thomas Schmid */ #ifndef _WDTCHARDWARE_H #define _WDTCHARDWARE_H /** * WDTC Control Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 275 */ typedef union { uint32_t flat; struct { uint8_t wdrstt : 1; // watchdog restart uint8_t reserved0 : 7; uint16_t reserved1 : 16; uint8_t key : 8; // password, should be written as 0xA5 } __attribute__((__packed__)) bits; } wdtc_cr_t; #define WDTC_CR_KEY 0xA5 /** * WDTC Mode Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 276 */ typedef union { uint32_t flat; struct { uint16_t wdv : 12; // counter value uint8_t wdfien : 1; // fault interrupt enable uint8_t wdrsten : 1; // reset enable uint8_t wdrproc : 1; // reset processor uint8_t wddis : 1; // watchdog disable uint16_t wdd : 12; // delta value uint8_t wddbghlt : 1; // debug halt uint8_t wdidlehlt : 1; // idle halt uint8_t reserved0 : 2; } __attribute__((__packed__)) bits; } wdtc_mr_t; /** * WDTC Timer Status Register, AT91 ARM Cortex-M3 based Microcontrollers * SAM3U Series, Preliminary, p. 277 */ typedef union { uint32_t flat; struct { uint8_t wdunf : 1; // underflow uint8_t wderr : 1; // error uint8_t reserved0 : 6; uint8_t reserved1 : 8; uint16_t reserved2 : 16; } __attribute__((__packed__)) bits; } wdtc_sr_t; /** * WDTC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U * Series, Preliminary, p. 274 */ typedef struct wdtc { volatile wdtc_cr_t cr; // Control Register volatile wdtc_mr_t mr; // Mode Register volatile wdtc_sr_t sr; // Status Register } wdtc_t; #endif // _WDTCHARDWARE_H tinyos-2.1.2+dfsg/tos/chips/ds2401/000077500000000000000000000000001207233610700166115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/ds2401/CachedIeeeEui64P.nc000066400000000000000000000041421207233610700220300ustar00rootroot00000000000000// $Id: CachedIeeeEui64P.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * Cache an EUI 64 at initialization time and return the cached value for * subsequent queries. */ module CachedIeeeEui64P { uses interface LocalIeeeEui64 as SubIeeeEui64; provides { interface LocalIeeeEui64; interface Init; } } implementation { ieee_eui64_t eui; command error_t Init.init() { atomic eui = call SubIeeeEui64.getId(); return SUCCESS; } command ieee_eui64_t LocalIeeeEui64.getId() { return eui; } } tinyos-2.1.2+dfsg/tos/chips/ds2401/Ds2401.h000066400000000000000000000037011207233610700176400ustar00rootroot00000000000000// $Id: Ds2401.h,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #ifndef DS2401_H #define DS2401_H enum { DS2401_SERIAL_LENGTH = 6, DS2401_DATA_LENGTH = 8 }; typedef union ds2401_serial_t { uint8_t data[DS2401_DATA_LENGTH]; struct { uint8_t family_code; uint8_t serial[DS2401_SERIAL_LENGTH]; uint8_t crc; }; } ds2401_serial_t; #endif // DS2401_H tinyos-2.1.2+dfsg/tos/chips/ds2401/Ds2401ToIeeeEui64C.nc000066400000000000000000000052521207233610700220270ustar00rootroot00000000000000// $Id: Ds2401ToIeeeEui64C.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #include "Ds2401.h" #include "IeeeEui64.h" #include "PlatformIeeeEui64.h" /** * Convert silicon serial ID to IEEE EUI 64, according to Application Note * 186 - Creating Global Identifiers Using 1-Wire Devices from Dallas/Maxim. */ module Ds2401ToIeeeEui64C { uses interface HplDs2401 as Hpl; provides interface LocalIeeeEui64; } implementation { command ieee_eui64_t LocalIeeeEui64.getId() { ds2401_serial_t rom; ieee_eui64_t eui; atomic { call Hpl.read(&rom); } // company ID eui.data[0] = IEEE_EUI64_COMPANY_ID_0; eui.data[1] = IEEE_EUI64_COMPANY_ID_1; eui.data[2] = IEEE_EUI64_COMPANY_ID_2; // 16 bits of the ID is generated by software // could be used for hardware model id and revision, for example eui.data[3] = IEEE_EUI64_SERIAL_ID_0; eui.data[4] = IEEE_EUI64_SERIAL_ID_1; // 24 least significant bits of the serial ID read from the DS2401 eui.data[5] = rom.data[3]; eui.data[6] = rom.data[2]; eui.data[7] = rom.data[1]; return eui; } } tinyos-2.1.2+dfsg/tos/chips/ds2401/HplDs2401.nc000066400000000000000000000040231207233610700204530ustar00rootroot00000000000000// $Id: HplDs2401.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #include "Ds2401.h" /** * Interface to read the 64-bit hardware ID from the DS2401 chip. */ interface HplDs2401 { /** * Read the 64-bit hardware ID (family id, serial, crc) from the DS2401 chip. * @param rom Pointer to a ds2401_serial_t struct, defined in ds2401.h. * @returns SUCCESS on success, an error code otherwise. */ async command error_t read(ds2401_serial_t* rom); } tinyos-2.1.2+dfsg/tos/chips/ds2401/HplDs2401C.nc000066400000000000000000000045311207233610700205620ustar00rootroot00000000000000// $Id: HplDs2401C.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #include "Ds2401.h" /** * HPL for the DS2401 hardware ID chip. */ module HplDs2401C { provides interface HplDs2401 as Hpl; uses interface OneWireMaster as OneWire; } implementation { bool busy = FALSE; async command error_t Hpl.read(ds2401_serial_t* rom) { uint8_t i; if(busy) { return EBUSY; } busy = TRUE; call OneWire.init(); if(call OneWire.reset() != SUCCESS) { call OneWire.release(); busy = FALSE; return EOFF; } call OneWire.writeByte(0x33); for(i=0;idata[i] = call OneWire.readByte(); } // TODO: crc check call OneWire.release(); busy = FALSE; return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/ds2401/OneWireMaster.nc000066400000000000000000000052671207233610700216710ustar00rootroot00000000000000// $Id: OneWireMaster.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * Interface to interact with 1-wire bus devices, as a master on the 1-wire * bus. */ interface OneWireMaster { /** * Initialize bus (pin is input with pullup). */ async command void idle(); /** * Initialize bus, start sourcing current (pin is input with pullup). */ async command void init(); /** * Release bus, stop sourcing current (pin is three-stated input). */ async command void release(); /** * Generate reset signal. * @returns SUCCESS if a client is present, an error_t error value otherwise. */ async command error_t reset(); /** * Write bit 1 to the bus. */ async command void writeOne(); /** * Write bit 0 to the bus. */ async command void writeZero(); /** * Write 8 bits to the bus, LSB first. * @param b the byte to write. */ async command void writeByte(uint8_t b); /** * Read a bit from the bus. */ async command bool readBit(); /** * Read 8 bits from the bus, LSB first. * @returns the byte read. */ async command uint8_t readByte(); } tinyos-2.1.2+dfsg/tos/chips/ds2401/OneWireMasterC.nc000066400000000000000000000104241207233610700217630ustar00rootroot00000000000000// $Id: OneWireMasterC.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * This module is the implementation of an 1-wire bus master. * */ module OneWireMasterC { uses interface GeneralIO as Pin; uses interface BusyWait as BusyWaitMicro; provides interface OneWireMaster as OneWire; } implementation { async command void OneWire.idle() { call Pin.makeInput(); call Pin.set(); // start sourcing current } async command void OneWire.init() { call OneWire.idle(); call BusyWaitMicro.wait(500); // wait at least 500us after bootup } async command void OneWire.release() { call Pin.makeInput(); call Pin.clr(); // stop sourcing current } async command error_t OneWire.reset() { bool clientPresent; // it is assumed that the bus is in idle state here // transmit reset pulse call Pin.makeOutput(); // output low call Pin.clr(); call BusyWaitMicro.wait(500); // must be at least 480us call OneWire.idle(); // input with pullup set // test for present pulse call BusyWaitMicro.wait(80); // presence pulse is sent 18-60us after reset clientPresent = call Pin.get(); // test for presence pulse call BusyWaitMicro.wait(400); // presence pulse is 60-240us long if (clientPresent == 0) { return SUCCESS; } else { return EOFF; } } async command void OneWire.writeOne() { call Pin.makeOutput(); // output low call Pin.clr(); call BusyWaitMicro.wait(8); // must be 1-15us call OneWire.idle(); // input with pullup set call BusyWaitMicro.wait(72); // low time plus idle time must 60-120us } async command void OneWire.writeZero() { call Pin.makeOutput(); // output low call Pin.clr(); call BusyWaitMicro.wait(72); // must be 60-120us call OneWire.idle(); // input with pullup set call BusyWaitMicro.wait(8); // low time plus idle time must 60-120us } async command void OneWire.writeByte(uint8_t b) { uint8_t i; // send out bits, LSB first for(i=0;i<8;i++) { if(b & 0x01) { call OneWire.writeOne(); } else { call OneWire.writeZero(); } b >>= 1; } } async command bool OneWire.readBit() { bool b; call Pin.makeOutput(); // output low call Pin.clr(); call BusyWaitMicro.wait(1); call OneWire.idle(); // input with pullup set call BusyWaitMicro.wait(8); // must be 1-15us b = call Pin.get(); // read pin call BusyWaitMicro.wait(71); // timeslot length must be 60-120us return b; } async command uint8_t OneWire.readByte() { uint8_t i,b=0; // read bits, LSB first for(i=0;i<8;i++) { b >>= 1; b |= call OneWire.readBit() << 7; } return b; } } tinyos-2.1.2+dfsg/tos/chips/ds2745/000077500000000000000000000000001207233610700166245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/ds2745/DS2745.h000066400000000000000000000045351207233610700176340ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Types and definitions for the Dallas DS2745 I2C Battery Monitor * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ #ifndef _DS2745_H #define _DS2745_H #define DS2745_PTR_SC (0x01) #define DS2745_PTR_TEMPMSB (0x0A) #define DS2745_PTR_TEMPLSB (0x0B) #define DS2745_PTR_VOLTMSB (0x0C) #define DS2745_PTR_VOLTLSB (0x0D) #define DS2745_PTR_CURRMSB (0x0E) #define DS2745_PTR_CURRLSB (0x0F) #define DS2745_PTR_ACCURMSB (0x10) #define DS2745_PTR_ACCURLSB (0x11) #define DS2745_PTR_OFFSETBIAS (0x61) #define DS2745_PTR_ACCBIAS (0x62) #define DS2745_SC_PORF (1 << 6) #define DS2745_SC_SMOD (1 << 5) #define DS2745_SC_NBEN (1 << 4) #define DS2745_SC_PIO (1 << 3) #define DS2745_SC_FQ(_x) (((_x) & 0x3)) #endif /* _DS2745_H */ tinyos-2.1.2+dfsg/tos/chips/ds2745/HplDS2745.nc000066400000000000000000000111731207233610700204450ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HplDS2745 is the HPL inteface to the Dallas DS2745 I2C Battery * Monitor. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ interface HplDS2745 { /** * Sets a new value to the DS2745 configuration register. * * @param val the new value to be written * * @return SUCCESS if the set will be performed */ command error_t setConfig( uint8_t val ); /** * Signals the completion of the configuration register set. * * @param error SUCCESS if the set was successful */ async event void setConfigDone( error_t error ); /** * Starts a temperature measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureTemperature(); /** * Presents the result of a temperature measurement. * * @param error SUCCESS if the measurement was successful * @param val the temperature reading */ async event void measureTemperatureDone( error_t error, uint16_t val ); /** * Starts a voltage measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureVoltage(); /** * Presents the result of a voltage measurement. * * @param error SUCCESS if the measurement was successful * @param val the voltage reading */ async event void measureVoltageDone( error_t error, uint16_t val); /** * Starts a current measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureCurrent(); /** * Presents the result of a current measurement. * * @param error SUCCESS if the measurement was successful * @param val the current reading */ async event void measureCurrentDone( error_t error, uint16_t val); /** * Starts an accumulated current measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureAccCurrent(); /** * Presents the result of a accumulated current measurement. * * @param error SUCCESS if the measurement was successful * @param val the accumulated current reading */ async event void measureAccCurrentDone( error_t error, uint16_t val); /** * Initiates setting of the current offset bias value * * @param The signed two's complement bias value. * * @return SUCCESS if the setting will be made */ command error_t setOffsetBias(int8_t val); /** * Signals completion and error, if any, in setting the current * offset bias value. * * @param error SUCCESS if the setting was successful */ async event void setOffsetBiasDone( error_t error ); /** * Initiates setting of the accumulated current offset bias value * * @param The signed two's complement bias value. * * @return SUCCESS if the setting will be made */ command error_t setAccOffsetBias(int8_t val); /** * Signals completion and error, if any, in setting the accumulated * current offset bias value. * * @param error SUCCESS if the setting was successful */ async event void setAccOffsetBiasDone( error_t error ); } tinyos-2.1.2+dfsg/tos/chips/ds2745/HplDS2745LogicP.nc000066400000000000000000000173741207233610700215540ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HplDS2745LogicP is the driver for the Dallas DS2745. It requires an * I2C packet interface and provides the HplTMP175 HPL interface. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ #include "DS2745.h" #include "I2C.h" generic module HplDS2745LogicP(uint16_t devAddr) { provides interface Init; provides interface SplitControl; provides interface HplDS2745; uses interface I2CPacket; } implementation { enum { STATE_IDLE, STATE_STARTING, STATE_STOPPING, STATE_STOPPED, STATE_SETCONFIG, STATE_READTEMP, STATE_READVOLTAGE, STATE_READCURRENT, STATE_READACCCURRENT, STATE_SETBIAS, STATE_SETACCBIAS }; uint8_t mI2CBuffer[4]; uint8_t mState; norace error_t mSSError = SUCCESS; static error_t doReadReg(uint8_t nextState, uint8_t reg) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = reg; error = call I2CPacket.write(I2C_START,devAddr,1,mI2CBuffer); if (error) atomic mState = STATE_IDLE; return error; } static error_t doSetReg(uint8_t nextState, uint8_t reg, uint16_t val) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = reg; mI2CBuffer[1] = val; error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); if (error) atomic mState = STATE_IDLE; return error; } task void StartDone() { atomic mState = STATE_IDLE; signal SplitControl.startDone(mSSError); return; } task void StopDone() { atomic mState = STATE_STOPPED; signal SplitControl.stopDone(mSSError); return; } command error_t Init.init() { mState = STATE_STOPPED; return SUCCESS; } command error_t SplitControl.start() { error_t error = SUCCESS; atomic { if (mState == STATE_STOPPED) { mState = STATE_STARTING; } else { error = EBUSY; } } if (!error) post StartDone(); return error; } command error_t SplitControl.stop() { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = STATE_STOPPING; } else { error = EBUSY; } } if (!error) post StopDone(); return error; } command error_t HplDS2745.setConfig(uint8_t val) { return doSetReg(STATE_SETCONFIG,DS2745_PTR_SC,val); } command error_t HplDS2745.measureTemperature() { return doReadReg(STATE_READTEMP,DS2745_PTR_TEMPMSB); } command error_t HplDS2745.measureVoltage() { return doReadReg(STATE_READVOLTAGE,DS2745_PTR_VOLTMSB); } command error_t HplDS2745.measureCurrent() { return doReadReg(STATE_READCURRENT,DS2745_PTR_CURRMSB); } command error_t HplDS2745.measureAccCurrent() { return doReadReg(STATE_READTEMP,DS2745_PTR_ACCURMSB); } command error_t HplDS2745.setOffsetBias(int8_t val) { return doSetReg(STATE_SETBIAS,DS2745_PTR_OFFSETBIAS,val); } command error_t HplDS2745.setAccOffsetBias(int8_t val) { return doSetReg(STATE_SETACCBIAS,DS2745_PTR_ACCBIAS,val); } async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { uint16_t tempVal; tempVal = buf[0]; tempVal = ((tempVal << 8) | buf[1]); switch (mState) { case STATE_READTEMP: signal HplDS2745.measureTemperatureDone(i2c_error,tempVal); break; case STATE_READVOLTAGE: signal HplDS2745.measureVoltageDone(i2c_error,tempVal); break; case STATE_READCURRENT: signal HplDS2745.measureCurrentDone(i2c_error,tempVal); break; case STATE_READACCCURRENT: signal HplDS2745.measureAccCurrentDone(i2c_error,tempVal); break; default: break; } atomic mState = STATE_IDLE; return; } async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { error_t error = i2c_error; switch (mState) { case STATE_SETCONFIG: atomic mState = STATE_IDLE; signal HplDS2745.setConfigDone(error); break; case STATE_READTEMP: if (error) signal HplDS2745.measureTemperatureDone(error,0); else error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); break; case STATE_READVOLTAGE: if (error) signal HplDS2745.measureVoltageDone(error,0); else error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); break; case STATE_READCURRENT: if (error) signal HplDS2745.measureCurrentDone(error,0); else error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); break; case STATE_READACCCURRENT: if (error) signal HplDS2745.measureAccCurrentDone(error,0); else error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); break; case STATE_SETBIAS: atomic mState = STATE_IDLE; signal HplDS2745.setOffsetBiasDone(error); break; case STATE_SETACCBIAS: atomic mState = STATE_IDLE; signal HplDS2745.setAccOffsetBiasDone(error); break; default: atomic mState = STATE_IDLE; break; } if (error) atomic mState = STATE_IDLE; return; } default event void SplitControl.startDone( error_t error ) { return; } default event void SplitControl.stopDone( error_t error ) { return; } default async event void HplDS2745.setConfigDone(error_t error) {return; } default async event void HplDS2745.measureTemperatureDone( error_t error, uint16_t val ){ return; } default async event void HplDS2745.measureVoltageDone( error_t error, uint16_t val ){ return; } default async event void HplDS2745.measureCurrentDone( error_t error, uint16_t val ){ return; } default async event void HplDS2745.measureAccCurrentDone( error_t error, uint16_t val ){ return; } default async event void HplDS2745.setOffsetBiasDone( error_t error ){ return; } default async event void HplDS2745.setAccOffsetBiasDone(error_t error){ return; } } tinyos-2.1.2+dfsg/tos/chips/ds2782/000077500000000000000000000000001207233610700166255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/ds2782/DS2782.h000066400000000000000000000101271207233610700176300ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Types and definitions for the Dallas DS2782 I2C Battery Monitor * * @author Henrik Makitaavola * @author Phil Buonadonna */ #ifndef _DS2782_H #define _DS2782_H #define DS2782_PTR_SC (0x01) #define DS2782_PTR_TEMPMSB (0x0A) #define DS2782_PTR_TEMPLSB (0x0B) #define DS2782_PTR_VOLTMSB (0x0C) #define DS2782_PTR_VOLTLSB (0x0D) #define DS2782_PTR_CURRMSB (0x0E) #define DS2782_PTR_CURRLSB (0x0F) #define DS2782_PTR_ACCURMSB (0x10) #define DS2782_PTR_ACCURLSB (0x11) #define DS2782_PTR_OFFSETBIAS (0x61) #define DS2782_PTR_ACCBIAS (0x62) #define DS2782_PTR_CONTROL (0x60) #define DS2782_SC_PORF (1 << 6) #define DS2782_SC_SMOD (1 << 5) #define DS2782_SC_NBEN (1 << 4) #define DS2782_SC_PIO (1 << 3) #define DS2782_SC_FQ(_x) (((_x) & 0x3)) #endif /* _DS2782_H */ tinyos-2.1.2+dfsg/tos/chips/ds2782/HplDS2782.nc000066400000000000000000000153301207233610700204460ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HplDS2782 is the HPL inteface to the Dallas DS2782 I2C Battery * Monitor. * * @author Henrik Makitaavola * @author Phil Buonadonna */ interface HplDS2782 { /** * Sets a new value to the DS2782 configuration register. * * @param val the new value to be written * * @return SUCCESS if the set will be performed */ command error_t setConfig( uint8_t val ); /** * Signals the completion of the configuration register set. * * @param error SUCCESS if the set was successful */ async event void setConfigDone( error_t error ); /** * Tells the DS2782 whether or not is is allowed to go into sleep. * * @param allow True allows sleep. * * @return SUCCESS if the set will be performed */ command error_t allowSleep(bool allow); /** * Signals the completion of the sleep call. * * @param error SUCCESS if the set was successful */ async event void allowSleepDone( error_t error ); /** * Starts a temperature measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureTemperature(); /** * Presents the result of a temperature measurement. * * @param error SUCCESS if the measurement was successful * @param val the temperature reading */ async event void measureTemperatureDone( error_t error, uint16_t val ); /** * Starts a voltage measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureVoltage(); /** * Presents the result of a voltage measurement. * * @param error SUCCESS if the measurement was successful * @param val the voltage reading */ async event void measureVoltageDone( error_t error, uint16_t val); /** * Starts a current measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureCurrent(); /** * Presents the result of a current measurement. * * @param error SUCCESS if the measurement was successful * @param val the current reading */ async event void measureCurrentDone( error_t error, uint16_t val); /** * Starts an accumulated current measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureAccCurrent(); /** * Presents the result of a accumulated current measurement. * * @param error SUCCESS if the measurement was successful * @param val the accumulated current reading */ async event void measureAccCurrentDone( error_t error, uint16_t val); /** * Initiates setting of the current offset bias value * * @param The signed two's complement bias value. * * @return SUCCESS if the setting will be made */ command error_t setOffsetBias(int8_t val); /** * Signals completion and error, if any, in setting the current * offset bias value. * * @param error SUCCESS if the setting was successful */ async event void setOffsetBiasDone( error_t error ); /** * Initiates setting of the accumulated current offset bias value * * @param The signed two's complement bias value. * * @return SUCCESS if the setting will be made */ command error_t setAccOffsetBias(int8_t val); /** * Signals completion and error, if any, in setting the accumulated * current offset bias value. * * @param error SUCCESS if the setting was successful */ async event void setAccOffsetBiasDone( error_t error ); } tinyos-2.1.2+dfsg/tos/chips/ds2782/HplDS2782LogicP.nc000066400000000000000000000240001207233610700215360ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HplDS2782LogicP is the driver for the Dallas DS2782. It requires * I2C packet and resource interfaces and provides the HplDS2782 HPL interface. * * @author Henrik Makitaavola * @author Phil Buonadonna */ #include "DS2782.h" #include "I2C.h" generic module HplDS2782LogicP(uint16_t devAddr) { provides interface StdControl; provides interface HplDS2782; uses interface I2CPacket; uses interface Resource as I2CResource; } implementation { enum { STATE_IDLE, STATE_STOPPED, STATE_SETCONFIG, STATE_READTEMP, STATE_READVOLTAGE, STATE_READCURRENT, STATE_READACCCURRENT, STATE_SETBIAS, STATE_SETACCBIAS, STATE_ALLOWSLEEP }; uint8_t mI2CBuffer[4]; uint8_t mState = STATE_STOPPED; bool read; norace error_t mSSError = SUCCESS; static error_t doReadReg(uint8_t nextState, uint8_t reg) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = reg; read = true; error = call I2CResource.request(); if (error) atomic mState = STATE_IDLE; return error; } static error_t doSetReg(uint8_t nextState, uint8_t reg, uint16_t val) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = reg; mI2CBuffer[1] = val; read = false; error = call I2CResource.request(); if (error) atomic mState = STATE_IDLE; return error; } command error_t StdControl.start() { error_t error = SUCCESS; atomic { if (mState == STATE_STOPPED) { mState = STATE_IDLE; } else { error = EBUSY; } } return error; } command error_t StdControl.stop() { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = STATE_STOPPED; } else { error = EBUSY; } } return error; } command error_t HplDS2782.setConfig(uint8_t val) { return doSetReg(STATE_SETCONFIG,DS2782_PTR_SC,val); } command error_t HplDS2782.allowSleep(bool allow) { if (allow) return doSetReg(STATE_ALLOWSLEEP,DS2782_PTR_CONTROL,0x60); else return doSetReg(STATE_ALLOWSLEEP,DS2782_PTR_CONTROL,0x0); } command error_t HplDS2782.measureTemperature() { return doReadReg(STATE_READTEMP,DS2782_PTR_TEMPMSB); } command error_t HplDS2782.measureVoltage() { return doReadReg(STATE_READVOLTAGE,DS2782_PTR_VOLTMSB); } command error_t HplDS2782.measureCurrent() { return doReadReg(STATE_READCURRENT,DS2782_PTR_CURRMSB); } command error_t HplDS2782.measureAccCurrent() { return doReadReg(STATE_READTEMP,DS2782_PTR_ACCURMSB); } command error_t HplDS2782.setOffsetBias(int8_t val) { return doSetReg(STATE_SETBIAS,DS2782_PTR_OFFSETBIAS,val); } command error_t HplDS2782.setAccOffsetBias(int8_t val) { return doSetReg(STATE_SETACCBIAS,DS2782_PTR_ACCBIAS,val); } async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { uint16_t tempVal; tempVal = buf[0]; tempVal = ((tempVal << 8) | buf[1]); atomic switch (mState) { case STATE_READTEMP: signal HplDS2782.measureTemperatureDone(i2c_error,tempVal); break; case STATE_READVOLTAGE: signal HplDS2782.measureVoltageDone(i2c_error,tempVal); break; case STATE_READCURRENT: signal HplDS2782.measureCurrentDone(i2c_error,tempVal); break; case STATE_READACCCURRENT: signal HplDS2782.measureAccCurrentDone(i2c_error,tempVal); break; default: break; } call I2CResource.release(); atomic mState = STATE_IDLE; return; } event void I2CResource.granted() { if (read) { call I2CPacket.write(I2C_START | I2C_STOP,devAddr,1,mI2CBuffer); } else { call I2CPacket.write(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer); } } async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { error_t error = i2c_error; atomic switch (mState) { case STATE_SETCONFIG: call I2CResource.release(); atomic mState = STATE_IDLE; signal HplDS2782.setConfigDone(error); break; case STATE_READTEMP: if (error) signal HplDS2782.measureTemperatureDone(error,0); else error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); break; case STATE_READVOLTAGE: if (error) signal HplDS2782.measureVoltageDone(error,0); else error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); break; case STATE_READCURRENT: if (error) signal HplDS2782.measureCurrentDone(error,0); else error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); break; case STATE_READACCCURRENT: if (error) signal HplDS2782.measureAccCurrentDone(error,0); else error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); break; case STATE_SETBIAS: call I2CResource.release(); atomic mState = STATE_IDLE; signal HplDS2782.setOffsetBiasDone(error); break; case STATE_SETACCBIAS: call I2CResource.release(); atomic mState = STATE_IDLE; signal HplDS2782.setAccOffsetBiasDone(error); break; case STATE_ALLOWSLEEP: call I2CResource.release(); atomic mState = STATE_IDLE; signal HplDS2782.allowSleepDone(error); break; default: call I2CResource.release(); atomic mState = STATE_IDLE; break; } if (error) { call I2CResource.release(); atomic mState = STATE_IDLE; } return; } default async event void HplDS2782.setConfigDone(error_t error) { return; } default async event void HplDS2782.allowSleepDone( error_t error ) { return; } default async event void HplDS2782.measureTemperatureDone( error_t error, uint16_t val ){ return; } default async event void HplDS2782.measureVoltageDone( error_t error, uint16_t val ){ return; } default async event void HplDS2782.measureCurrentDone( error_t error, uint16_t val ){ return; } default async event void HplDS2782.measureAccCurrentDone( error_t error, uint16_t val ){ return; } default async event void HplDS2782.setOffsetBiasDone( error_t error ){ return; } default async event void HplDS2782.setAccOffsetBiasDone(error_t error){ return; } } tinyos-2.1.2+dfsg/tos/chips/lis3l02dq/000077500000000000000000000000001207233610700174115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/lis3l02dq/HalLIS3L02DQAdvanced.nc000066400000000000000000000047101207233610700232250ustar00rootroot00000000000000/* $Id: HalLIS3L02DQAdvanced.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ #include "LIS3L02DQ.h" interface HalLIS3L02DQAdvanced { command error_t setDecimation(uint8_t factor); event void setDecimationDone(error_t error); command error_t enableAxis(bool bX, bool bY, bool bZ); event void enableAxisDone(error_t error); command error_t enableAlert(lis_alertflags_t xFlags, lis_alertflags_t yFlags, lis_alertflags_t zFlags, bool requireAll); event void enableAlertDone(error_t error); command error_t getAlertSource(); event void getAlertSourceDone(error_t error, uint8_t vector); command error_t setTLow(uint8_t val); event void setTLowDone(error_t error); command error_t setTHigh(uint8_t val); event void setTHighDone(error_t error); event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/lis3l02dq/HalLIS3L02DQControlP.nc000066400000000000000000000121141207233610700232550ustar00rootroot00000000000000/* $Id: HalLIS3L02DQControlP.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ #include "LIS3L02DQ.h" module HalLIS3L02DQControlP { provides interface HalLIS3L02DQAdvanced as Advanced; uses interface Resource; uses interface HplLIS3L02DQ as Hpl; } implementation { enum { S_IDLE, S_DECIMATION, S_ENAXIS, S_TLOW, S_THIGH, }; uint8_t state = S_IDLE; uint8_t ctrlReg1Shadow = 0x7; error_t clientResult; uint8_t clientRegAddr; uint8_t clientVal; task void signal_Task() { switch(state) { case S_DECIMATION: state = S_IDLE; call Resource.release(); signal Advanced.setDecimationDone(clientResult); break; case S_ENAXIS: state = S_IDLE; call Resource.release(); signal Advanced.enableAxisDone(clientResult); break; case S_TLOW: state = S_IDLE; call Resource.release(); signal Advanced.setTLowDone(clientResult); break; case S_THIGH: state = S_IDLE; call Resource.release(); signal Advanced.setTHighDone(clientResult); break; default: break; } } event void Resource.granted() { // intentionally left blank } command error_t Advanced.setDecimation(uint8_t factor) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_DECIMATION; ctrlReg1Shadow &= ~LIS3L01DQ_CTRL_REG1_DF(3); ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(factor); call Hpl.setReg(LIS3L02DQ_CTRL_REG1, ctrlReg1Shadow); return SUCCESS; } command error_t Advanced.enableAxis(bool bX, bool bY, bool bZ) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_ENAXIS; ctrlReg1Shadow &= ~LIS3L01DQ_CTRL_REG1_DF(7); // if any of them on, power it on if(bZ || bY || bX) ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_PD(1); // enable all the relevant axes if(bZ) ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_ZEN); if(bY) ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_YEN); if(bX) ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_XEN); call Hpl.setReg(LIS3L02DQ_CTRL_REG1, ctrlReg1Shadow); return SUCCESS; } command error_t Advanced.setTLow(uint8_t val) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_TLOW; call Hpl.setReg(LIS3L02DQ_THS_L, val); return SUCCESS; } command error_t Advanced.setTHigh(uint8_t val) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_THIGH; call Hpl.setReg(LIS3L02DQ_THS_H, val); return SUCCESS; } async event void Hpl.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {} async event void Hpl.alertThreshold() {} async event void Hpl.setRegDone(error_t error, uint8_t regAddr, uint8_t val) { clientResult = error; clientRegAddr = regAddr; clientVal = val; post signal_Task(); } command error_t Advanced.enableAlert(lis_alertflags_t xFlags, lis_alertflags_t yFlags, lis_alertflags_t zFlags, bool requireAll) { return FAIL; } command error_t Advanced.getAlertSource() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/lis3l02dq/HalLIS3L02DQReaderP.nc000066400000000000000000000110541207233610700230410ustar00rootroot00000000000000/* $Id: HalLIS3L02DQReaderP.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ #include "LIS3L02DQ.h" generic module HalLIS3L02DQReaderP() { provides interface Read as AccelX; provides interface Read as AccelY; provides interface Read as AccelZ; uses interface Resource as AccelXResource; uses interface Resource as AccelYResource; uses interface Resource as AccelZResource; uses interface HplLIS3L02DQ as Hpl; } implementation { enum { S_IDLE, S_GET_XL, S_GET_XH, S_GET_YL, S_GET_YH, S_GET_ZL, S_GET_ZH, }; uint8_t state = S_IDLE; uint16_t readResult; uint8_t byteResult; uint8_t errorResult; task void complete_Task() { switch(state) { case S_GET_XL: readResult += byteResult; state = S_IDLE; call AccelXResource.release(); signal AccelX.readDone(errorResult, readResult); break; case S_GET_XH: readResult = (uint16_t) byteResult & 0xF; readResult <<= 8; state = S_GET_XL; call Hpl.getReg(LIS3L02DQ_OUTX_L); break; case S_GET_YL: readResult += byteResult; state = S_IDLE; call AccelYResource.release(); signal AccelY.readDone(errorResult, readResult); break; case S_GET_YH: readResult = (uint16_t) byteResult & 0xF; readResult <<= 8; state = S_GET_YL; call Hpl.getReg(LIS3L02DQ_OUTY_L); break; case S_GET_ZL: readResult += byteResult; state = S_IDLE; call AccelZResource.release(); signal AccelZ.readDone(errorResult, readResult); break; case S_GET_ZH: readResult = (uint16_t) byteResult & 0xF; readResult <<= 8; state = S_GET_ZL; call Hpl.getReg(LIS3L02DQ_OUTZ_L); break; default: break; } } command error_t AccelX.read() { return call AccelXResource.request(); } command error_t AccelY.read() { return call AccelYResource.request(); } command error_t AccelZ.read() { return call AccelZResource.request(); } event void AccelXResource.granted() { errorResult = call Hpl.getReg(LIS3L02DQ_OUTX_H); if (errorResult != SUCCESS) { state = S_GET_XL; post complete_Task(); } state = S_GET_XH; } event void AccelYResource.granted() { errorResult = call Hpl.getReg(LIS3L02DQ_OUTY_H); if (errorResult != SUCCESS) { state = S_GET_YL; post complete_Task(); } state = S_GET_YH; } event void AccelZResource.granted() { errorResult = call Hpl.getReg(LIS3L02DQ_OUTZ_H); if (errorResult != SUCCESS) { state = S_GET_ZL; post complete_Task(); } state = S_GET_ZH; } async event void Hpl.getRegDone(error_t error, uint8_t regAddr, uint8_t val) { errorResult |= error; byteResult = val; post complete_Task(); } async event void Hpl.setRegDone( error_t error , uint8_t regAddr, uint8_t val) { // intentionally left blank } async event void Hpl.alertThreshold() { } } tinyos-2.1.2+dfsg/tos/chips/lis3l02dq/HplLIS3L02DQ.nc000066400000000000000000000040701207233610700216150ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Hpl interface for the ST LIS3L02DQ 3-Axis Accelerometer * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ interface HplLIS3L02DQ { command error_t getReg(uint8_t regAddr); async event void getRegDone( error_t error, uint8_t regAddr, uint8_t val); command error_t setReg( uint8_t regAddr, uint8_t val); async event void setRegDone( error_t error , uint8_t regAddr, uint8_t val); async event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/lis3l02dq/HplLIS3L02DQLogicSPIP.nc000066400000000000000000000134741207233610700232770ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * This module is the driver components for the ST LIS3L02DQ 3-axis * accelerometer in the 4 wire SPI mode. It requires the SPI packet * interface and assumes the ability to manually toggle the chip select * via a GPIO. It provides the HplLIS3L02DQ HPL interface. * * @author Phil Buonadonna * @author Kaisen Lin * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ module HplLIS3L02DQLogicSPIP { provides interface Init; provides interface SplitControl; provides interface HplLIS3L02DQ; uses interface SpiPacket; uses interface GpioInterrupt as InterruptAlert; uses interface GeneralIO as SPIFRM; } implementation { enum { STATE_IDLE, STATE_STARTING, STATE_STOPPING, STATE_STOPPED, STATE_GETREG, STATE_SETREG, STATE_ERROR }; uint8_t mSPIRxBuf[4],mSPITxBuf[4]; uint8_t mState; bool misInited = FALSE; norace error_t mSSError; task void StartDone() { atomic mState = STATE_IDLE; signal SplitControl.startDone(SUCCESS); return; } task void StopDone() { signal SplitControl.stopDone(mSSError); return; } command error_t Init.init() { atomic { if (!misInited) { misInited = TRUE; mState = STATE_STOPPED; } // Control CS pin manually call SPIFRM.makeOutput(); call SPIFRM.set(); } return SUCCESS; } command error_t SplitControl.start() { error_t error = SUCCESS; atomic { if (mState == STATE_STOPPED) { mState = STATE_STARTING; } else { error = EBUSY; } } if (error) return error; mSPITxBuf[0] = LIS3L02DQ_CTRL_REG1; mSPITxBuf[1] = 0; mSPITxBuf[1] = (LIS3L01DQ_CTRL_REG1_PD(1) | LIS3L01DQ_CTRL_REG1_XEN | LIS3L01DQ_CTRL_REG1_YEN | LIS3L01DQ_CTRL_REG1_ZEN); call SPIFRM.clr(); // CS LOW error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2); return error; } command error_t SplitControl.stop() { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = STATE_STOPPING; } else { error = EBUSY; } } if (error) return error; mSPITxBuf[0] = LIS3L02DQ_CTRL_REG1; mSPITxBuf[1] = 0; mSPITxBuf[1] = (LIS3L01DQ_CTRL_REG1_PD(0)); call SPIFRM.clr(); // CS LOW error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2); return error; } command error_t HplLIS3L02DQ.getReg(uint8_t regAddr) { error_t error = SUCCESS; if((regAddr < 0x16) || (regAddr > 0x2F)) { error = EINVAL; return error; } mSPITxBuf[0] = regAddr | (1 << 7); // Set the READ bit mSPIRxBuf[1] = 0; mState = STATE_GETREG; call SPIFRM.clr(); // CS LOW error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2); return error; } command error_t HplLIS3L02DQ.setReg(uint8_t regAddr, uint8_t val) { error_t error = SUCCESS; if((regAddr < 0x16) || (regAddr > 0x2F)) { error = EINVAL; return error; } mSPITxBuf[0] = regAddr; mSPITxBuf[1] = val; mState = STATE_SETREG; error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2); return error; } async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t spi_error ) { error_t error = spi_error; switch (mState) { case STATE_GETREG: mState = STATE_IDLE; call SPIFRM.set(); // CS HIGH signal HplLIS3L02DQ.getRegDone(error, (txBuf[0] & 0x7F) , rxBuf[1]); break; case STATE_SETREG: mState = STATE_IDLE; signal HplLIS3L02DQ.setRegDone(error, (txBuf[0] & 0x7F), txBuf[1]); break; case STATE_STARTING: mState = STATE_IDLE; call SPIFRM.set(); post StartDone(); break; case STATE_STOPPING: mState = STATE_STOPPED; post StopDone(); default: mState = STATE_IDLE; break; } return; } async event void InterruptAlert.fired() { // This alert is decoupled from whatever state the MAX136x is in. // Upper layers must handle dealing with this alert appropriately. signal HplLIS3L02DQ.alertThreshold(); return; } default event void SplitControl.startDone( error_t error ) { return; } default event void SplitControl.stopDone( error_t error ) { return; } default async event void HplLIS3L02DQ.alertThreshold(){ return; } } tinyos-2.1.2+dfsg/tos/chips/lis3l02dq/LIS3L02DQ.h000066400000000000000000000070571207233610700210100ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Types and definitions for the ST LIS3L02DQ 3-axis Accelerometer * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ #ifndef _LIS3L02DQ_H #define _LIS3L02DQ_H #define LIS3L02DQ_OFFSET_X (0x16) #define LIS3L02DQ_OFFSET_Y (0x17) #define LIS3L02DQ_OFFSET_Z (0x18) #define LIS3L02DQ_GAIN_X (0x19) #define LIS3L02DQ_GAIN_Y (0x1A) #define LIS3L02DQ_GAIN_Z (0x1B) #define LIS3L02DQ_CTRL_REG1 (0x20) #define LIS3L02DQ_CTRL_REG2 (0x21) #define LIS3L02DQ_WAKE_UP_CFG (0x23) #define LIS3L02DQ_WAKE_UP_SRC (0x24) #define LIS3L02DQ_WAKE_UP_ACK (0x25) #define LIS3L02DQ_STATUS_REG (0x27) #define LIS3L02DQ_OUTX_L (0x28) #define LIS3L02DQ_OUTX_H (0x29) #define LIS3L02DQ_OUTY_L (0x2A) #define LIS3L02DQ_OUTY_H (0x2B) #define LIS3L02DQ_OUTZ_L (0x2C) #define LIS3L02DQ_OUTZ_H (0x2D) #define LIS3L02DQ_THS_L (0x2E) #define LIS3L02DQ_THS_H (0x2F) #define LIS3L01DQ_CTRL_REG1_PD(_x) (((_x) & 0x3) << 6) #define LIS3L01DQ_CTRL_REG1_DF(_x) (((_x) & 0x3) << 4) #define LIS3L01DQ_CTRL_REG1_ST (1 << 3) #define LIS3L01DQ_CTRL_REG1_ZEN (1 << 2) #define LIS3L01DQ_CTRL_REG1_YEN (1 << 1) #define LIS3L01DQ_CTRL_REG1_XEN (1 << 0) #define LIS3L01DQ_CTRL_REG2_RES (1 << 7) #define LIS3L01DQ_CTRL_REG2_BDU (1 << 6) #define LIS3L01DQ_CTRL_REG2_BLE (1 << 5) #define LIS3L01DQ_CTRL_REG2_BOOT (1 << 4) #define LIS3L01DQ_CTRL_REG2_IEN (1 << 3) #define LIS3L01DQ_CTRL_REG2_DRDY (1 << 2) #define LIS3L01DQ_CTRL_REG2_SIM (1 << 1) #define LIS3L01DQ_CTRL_REG2_DAS (1 << 0) #define LIS3L02DQ_WAKE_UP_CFG_AOI (1 << 7) #define LIS3L02DQ_WAKE_UP_CFG_LIR (1 << 6) #define LIS3L02DQ_WAKE_UP_CFG_ZHIE (1 << 5) #define LIS3L02DQ_WAKE_UP_CFG_ZLIE (1 << 4) #define LIS3L02DQ_WAKE_UP_CFG_YHIE (1 << 3) #define LIS3L02DQ_WAKE_UP_CFG_YLIE (1 << 2) #define LIS3L02DQ_WAKE_UP_CFG_XHIE (1 << 1) #define LIS3L02DQ_WAKE_UP_CFG_XLIE (1 << 0) typedef enum { LIS_AFLAGS_NONE, LIS_AFLAGS_HIGH, LIS_AFLAGS_LOW, LIS_AFLAGS_BOTH } lis_alertflags_t; #endif /* _LIS3L02DQ_H */ tinyos-2.1.2+dfsg/tos/chips/m16c60/000077500000000000000000000000001207233610700166105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/62p/000077500000000000000000000000001207233610700172175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/62p/iom16c62p.h000077500000000000000000003643411207233610700210340ustar00rootroot00000000000000/**************************************************************** KPIT Cummins Infosystems Ltd, Pune, India. 1-April-2006. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. *****************************************************************/ /****************************************************************/ /* M16C/60 62P Include File */ /****************************************************************/ #ifndef __IOM16C62P_H__ #define __IOM16C62P_H__ /*------------------------------------------------------ Processor mode register 0 //0x0004 ------------------------------------------------------*/ union st_pm0 { /* union PM0 */ struct { /* Bit Access */ unsigned char PM0_0:1; /* Processor mode bit 0 */ unsigned char PM0_1:1; /* Processor mode bit 1 */ unsigned char PM0_2:1; /* R/W mode select bit */ unsigned char PM0_3:1; /* Software reset bit */ unsigned char PM0_4:1; /* Multiplexed bus space select bit 0 */ unsigned char PM0_5:1; /* Multiplexed bus space select bit 1 */ unsigned char PM0_6:1; /* Port P40 to P43 function select bit */ unsigned char PM0_7:1; /* BCLK output disable bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Processor mode register 1 //0x0005 ------------------------------------------------------*/ union st_pm1 { /* union PM1 */ struct { /* Bit Access */ unsigned char PM1_0:1; /* CS2 area switching bit */ unsigned char PM1_1:1; /* Port P3_4 to P3_7 function select bit */ unsigned char PM1_2:1; /* Watch dog timer function select bit */ unsigned char PM1_3:1; /* Intermal reserved area expansion bit */ unsigned char PM1_4:1; /* Memory area expansion bit */ unsigned char PM1_5:1; /* Memory area expansion bit */ unsigned char PM1_6:1; /* Reserved bit */ unsigned char PM1_7:1; /* PM17 - Wait bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ System clock control register 0 //0x0006 ------------------------------------------------------*/ union st_cm0 { /* union CM0 */ struct { /* Bit Access */ unsigned char CM0_0:1; /* Clock output function select bit */ unsigned char CM0_1:1; /* Clock output function select bit */ unsigned char CM0_2:1; /* WAIT peripheral function clock stop bit */ unsigned char CM0_3:1; /* Xcin-Xcout drive capacity select bit*/ unsigned char CM0_4:1; /* Port Xc select bit */ unsigned char CM0_5:1; /* Main clock stop bit */ unsigned char CM0_6:1; /* Main clock division select bit 0 */ unsigned char CM0_7:1; /* System clock select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* system clock control register 0 */ /*------------------------------------------------------ System clock control register 1 //0x0007 ------------------------------------------------------*/ union st_cm1 { /* union CM1 */ struct { /* Bit Access */ unsigned char CM1_0:1; /* All clock stop control bit */ unsigned char CM1_1:1; /* Reserved bit always set to 0 */ unsigned char :1; /* Reserved bit always set to 0 */ unsigned char :1; /* Reserved bit always set to 0 */ unsigned char :1; /* Reserved bit always set to 0 */ unsigned char CM1_5:1; /* Xin-Xouts drive capacity select bit */ unsigned char CM1_6:1; /* Main clock division select bit 1 */ unsigned char CM1_7:1; /* Main clock division select bit 1 */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* system clock control register 1 */ /*------------------------------------------------------ Chip select control register //0x0008 ------------------------------------------------------*/ union st_csr { /* union CSR */ struct { /* Bit Access */ unsigned char CS0 :1; /* CS0~ output enable bit */ unsigned char CS1 :1; /* CS1~ output enable bit */ unsigned char CS2 :1; /* CS2~ output enable bit */ unsigned char CS3 :1; /* CS3~ output enable bit */ unsigned char CS0W:1; /* CS0~ wait bit */ unsigned char CS1W:1; /* CS1~ wait bit */ unsigned char CS2W:1; /* CS2~ wait bit */ unsigned char CS3W:1; /* CS3~ wait bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Chip select control register */ /*------------------------------------------------------ Address match interrupt enable register //0x0009 ------------------------------------------------------*/ union st_aier { /* union AIER */ struct { /* Bit Access */ unsigned char AIER0:1; /* Address match interrupt0 enable bit*/ unsigned char AIER1:1; /* Address match interrupt1 enable bit*/ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Address match interrupt enable register */ /*------------------------------------------------------ Protect register //0x000A -----------------------------------------------------*/ union st_prcr { /* union PRCR */ struct { /* Bit Access */ unsigned char PRC0:1; /* Enables writing to system clock control registers 0 & 1 */ unsigned char PRC1:1; /* Enables writing to processor mode registers 0 & 1 */ unsigned char PRC2:1; /* Enables writing to port P9 direction register & SI/Oi control register(i=3,4)*/ unsigned char PRC3:1; /* Enable writting to Power supply detection register 2 and Power supply down detection register */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Protect register */ /*------------------------------------------------------ Data bank register //0x000B ------------------------------------------------------*/ union st_dbr { /* union DBR */ struct { /* Bit Access */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char OFS :1; /* Offset bit */ unsigned char BSR0:1; /* Bank select bit 0 */ unsigned char BSR1:1; /* Bank select bit 1 */ unsigned char BSR2:1; /* Bank select bit 2 */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ } BIT; /* */ unsigned char BYTE; /* Data bank register */ }; /*------------------------------------------------------ Oscillation stop detection register //0x000C ------------------------------------------------------*/ union st_cm2 { /* union CM2 */ struct { /* Bit Access */ unsigned char CM2_0:1; /* Oscillation stop detection bit */ unsigned char CM2_1:1; /* Main clock switch bit */ unsigned char CM2_2:1; /* Oscillation stop detection status */ unsigned char CM2_3:1; /* Clock monitor bit */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char CM2_7:1; /* Operation select bit(when an oscillation stop is detected) */ } BIT; /* */ unsigned char BYTE; /* Oscillation stop detection register */ }; /*------------------------------------------------------ Watchdog timer control register //0x000f -----------------------------------------------------*/ union st_wdc { /* union WDC */ struct { /* Bit Access */ unsigned char B0:1; /* High-order bit of watchdog timer */ unsigned char B1:1; /* High-order bit of watchdog timer */ unsigned char B2:1; /* High-order bit of watchdog timer */ unsigned char B3:1; /* High-order bit of watchdog timer */ unsigned char B4:1; /* High-order bit of watchdog timer */ unsigned char WDC5:1; /* Cold start / warm start discrimination flag */ unsigned char B6:1; /* Reserved bit, must always be 0 */ unsigned char WDC7:1; /* Prescaler select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Watchdog timer control register */ /*------------------------------------------------------ Address match interrupt register 0 //0x0010 -----------------------------------------------------*/ union st_rmad0 { struct{ unsigned char RMAD0L; /* Address match interrupt register 0 low 8 bit */ unsigned char RMAD0M; /* Address match interrupt register 0 mid 8 bit */ unsigned char RMAD0H; /* Address match interrupt register 0 high 8 bit */ unsigned char NC; /* non use */ } BYTE; /* Byte access */ unsigned long DWORD; /* Word Access */ }; /* Address match interrupt register 0 32 bit */ /*------------------------------------------------------ Address match interrupt register 1 //0x0014 -----------------------------------------------------*/ union st_rmad1 { struct{ unsigned char RMAD1L; /* Address match interrupt register 1 low 8 bit */ unsigned char RMAD1M; /* Address match interrupt register 1 mid 8 bit */ unsigned char RMAD1H; /* Address match interrupt register 1 high 8 bit */ unsigned char NC; /* non use */ } BYTE; /* Byte access */ unsigned long DWORD; /* Word Access */ }; /* Address match interrupt register 1 32 bit */ /*------------------------------------------------------ Voltage Detection Register 1 //0x0019 -----------------------------------------------------*/ union st_vcr1 { /* union VCR1 */ struct { /* Bit Access */ unsigned char B0:1; /* Reserved bit,must be 0 */ unsigned char B1:1; /* Reserved bit,must be 0 */ unsigned char B2:1; /* Reserved bit,must be 0 */ unsigned char VC1_3:1; /* Voltage down monitor flag */ unsigned char B4:1; /* Reserved bit,must be 0 */ unsigned char B5:1; /* Reserved bit,must be 0 */ unsigned char B6:1; /* Reserved bit, must always be 0 */ unsigned char B7:1; /* Reserved bit,must be 0 */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Voltage Detection Register 1 */ /*------------------------------------------------------ Voltage Detection Register 2 //0x001A -----------------------------------------------------*/ union st_vcr2 { /* union VCR2 */ struct { /* Bit Access */ unsigned char B0:1; /* Reserved bit,must be 0 */ unsigned char B1:1; /* Reserved bit,must be 0 */ unsigned char B2:1; /* Reserved bit,must be 0 */ unsigned char B3:1; /* Reserved bit,must be 0 */ unsigned char B4:1; /* Reserved bit,must be 0 */ unsigned char B5:1; /* Reserved bit,must be 0 */ unsigned char VC2_6:1; /* Reset area monitor bit */ unsigned char VC2_7:1; /* Voltage down monitor bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Voltage Detection Register 1 */ /*------------------------------------------------------ Chip select expansion control register//0x001B -----------------------------------------------------*/ union st_cse { /* union CSE */ struct { /* Bit Access */ unsigned char CSE00W:1; /* CS0~ wait expansion bit */ unsigned char CSE01W:1; /* CS0~ wait expansion bit */ unsigned char CSE10W:1; /* CS1~ wait expansion bit */ unsigned char CSE11W:1; /* CS1~ wait expansion bit */ unsigned char CSE20W:1; /* CS2~ wait expansion bit */ unsigned char CSE21W:1; /* CS2~ wait expansion bit */ unsigned char CSE30W:1; /* CS3~ wait expansion bit */ unsigned char CSE31W:1; /* CS3~ wait expansion bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Chip select expansion control register */ /*------------------------------------------------------ PLL control register 0 //0x001C -----------------------------------------------------*/ union st_plc0 { /* union */ struct { /* Bit Access */ unsigned char PLC00:1; /* Programmable counter select bit */ unsigned char PLC01:1; /* Programmable counter select bit */ unsigned char PLC02:1; /* Programmable counter select bit */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Reserved bit,set to one */ unsigned char :1; /* Reserved bit,set to zero */ unsigned char :1; /* Reserved bit,set to zero */ unsigned char PLC07:1; /* Operation enable bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* PLL control register 0 */ /*------------------------------------------------------ Processor mode register 2 //0x001E -----------------------------------------------------*/ union st_pm2 { /* union */ struct { /* Bit Access */ unsigned char PM2_0:1; /* Specifying wait when accessing SFR at PLL operation */ unsigned char PM2_1:1; /* System clock protective bit */ unsigned char PM2_2:1; /* WDT count source protective bit */ unsigned char :1; /* Reserved bit,set to zero */ unsigned char :1; /* Reserved bit,set to zero */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Processor mode register 2 */ /*------------------------------------------------------ Power supply down detection register //0x001F -----------------------------------------------------*/ union st_d4int { /* union */ struct { /* Bit Access */ unsigned char D40:1; /* Power supply down detection interrupt enable bit */ unsigned char D41:1; /* STOP mode deactivation control bit */ unsigned char D42:1; /* Power supply change detection flag */ unsigned char D43:1; /* WDT overflow detect flag */ unsigned char DF0:1; /* Sampling clock select bit */ unsigned char DF1:1; /* Sampling clock select bit */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Power supply down detection register */ /*------------------------------------------------------ DMA0 source pointer //0x0020 -----------------------------------------------------*/ union st_sar0 { struct{ unsigned char SAR01; /* DMA0 source pointer low 8 bit */ unsigned char SAR0M; /* DMA0 source pointer mid 8 bit */ unsigned char SAR0H; /* DMA0 source pointer high 8 bit */ unsigned char NC; /* non use */ } BYTE; /* Byte access */ unsigned long DWORD; /* Word Access */ }; /* DMA0 source pointer 32 bit */ /*------------------------------------------------------ DMA1 source pointer //0x0030 -----------------------------------------------------*/ union st_sar1 { struct{ unsigned char SAR11; /* DMA1 source pointer low 8 bit */ unsigned char SAR1M; /* DMA1 source pointer mid 8 bit */ unsigned char SAR1H; /* DMA1 source pointer high 8 bit */ unsigned char NC; /* non use */ } BYTE; /* Byte access */ unsigned long DWORD; /* Word Access */ }; /* DMA1 source pointer 32 bit */ /*------------------------------------------------------ DMA0 destination pointer //0x0024 -----------------------------------------------------*/ union st_dar0 { /* DMA0 destination pointer 32 bit */ struct{ unsigned char DAR0L; /* DMA0 destination pointer low 8 bit */ unsigned char DAR0M; /* DMA0 destination pointer mid 8 bit */ unsigned char DAR0H; /* DMA0 destination pointer high 8 bit */ unsigned char NC; /* non use */ } BYTE; /* Byte access */ unsigned long DWORD; /* Word Access */ }; /*------------------------------------------------------ DMA1 destination pointer //0x0034 -----------------------------------------------------*/ union st_dar1 { /* DMA1 destination pointer 32 bit */ struct{ unsigned char DAR1L; /* DMA1 destination pointer low 8 bit */ unsigned char DAR1M; /* DMA1 destination pointer mid 8 bit */ unsigned char DAR1H; /* DMA1 destination pointer high 8 bit */ unsigned char NC; /* non use */ } BYTE; /* Byte access */ unsigned long DWORD; /* Word Access */ }; /*------------------------------------------------------ DMA0 transfer counter //0x0028 -----------------------------------------------------*/ union st_tcr0 { /* DMA0 transfer counter 16 bit */ struct{ unsigned char TCR0L; /* DMA0 transfer counter low 8 bit */ unsigned char TCR0H; /* DMA0 transfer counter high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ DMA1 transfer counter //0x0038 -----------------------------------------------------*/ union st_tcr1 { /* DMA1 transfer counter 16 bit */ struct{ unsigned char TCR1L; /* DMA1 transfer counter low 8 bit */ unsigned char TCR1H; /* DMA1 transfer counter high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ DMA0 control register //0x002c ------------------------------------------------------*/ union st_dm0con { /* DMA0 control register */ struct{ unsigned char DMBIT:1; /* Transfer unit bit select bit */ unsigned char DMASL:1; /* Repeat transfer mode select bit */ unsigned char DMAS :1; /* DMA request bit */ unsigned char DMAE :1; /* DMA enable bit */ unsigned char DSD :1; /* Source address direction select bit */ unsigned char DAD :1; /* Destination address direction select bit */ unsigned char :1; unsigned char :1; }BIT; unsigned char BYTE; }; /*------------------------------------------------------ DMA1 control register //0x003c ------------------------------------------------------*/ union st_dm1con { /* DMA1 control register union */ struct{ unsigned char DMBIT:1; /* Transfer unit bit select bit */ unsigned char DMASL:1; /* Repeat transfer mode select bit */ unsigned char DMAS :1; /* DMA request bit */ unsigned char DMAE :1; /* DMA enable bit */ unsigned char DSD :1; /* Source address direction select bit */ unsigned char DAD :1; /* Destination address direction select bit */ unsigned char :1; /*Nothing assigned */ unsigned char :1; /*Nothing assigned */ }BIT; unsigned char BYTE; }; union st_icr { /* interrupt control registers */ struct{ unsigned char ILVL0:1; /* Interrupt priority level select bit */ unsigned char ILVL1:1; /* Interrupt priority level select bit */ unsigned char ILVL2:1; /* Interrupt priority level select bit */ unsigned char IR :1; /* Interrupt request bit */ unsigned char POL :1; /* Polarity select bit */ unsigned char :1; /* Reserved bit, set to 0 */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ }BIT; unsigned char BYTE; }; union st_icr1 { /* interrupt control registers */ struct{ unsigned char ILVL0:1; /* Interrupt priority level select bit */ unsigned char ILVL1:1; /* Interrupt priority level select bit */ unsigned char ILVL2:1; /* Interrupt priority level select bit */ unsigned char IR :1; /* Interrupt request bit */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ }BIT; unsigned char BYTE; }; /*------------------------------------------------------ bcnic //0x004a ------------------------------------------------------*/ union st_bcnic { /* interrupt control registers*/ struct{ unsigned char ILVL0_BCNIC:1;/* Interrupt priority level select bit */ unsigned char ILVL1_BCNIC:1;/* Interrupt priority level select bit */ unsigned char ILVL2_BCNIC:1;/* Interrupt priority level select bit */ unsigned char IR_BCNIC :1;/* Interrupt request bit */ unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; }BIT; unsigned char BYTE; }; /*------------------------------------------------------ dm0ic //0x004b ------------------------------------------------------*/ union st_dm0ic { /* interrupt control registers*/ struct{ unsigned char ILVL0_DM0IC:1;/* Interrupt priority level select bit */ unsigned char ILVL1_DM0IC:1;/* Interrupt priority level select bit */ unsigned char ILVL2_DM0IC:1;/* Interrupt priority level select bit */ unsigned char IR_DM0IC :1;/* Interrupt request bit */ unsigned char :1; unsigned char :1; unsigned char :1; unsigned char :1; }BIT; unsigned char BYTE; }; /*------------------------------------------------------ Flash identification register //0x01b4 ------------------------------------------------------*/ union st_fidr { /* Flash identification register */ struct{ unsigned char FIDR0:1; /* Flash identification value */ unsigned char FIDR1:1; /* Flash identification value */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ }BIT; unsigned char BYTE; }; /*------------------------------------------------------ Flash memory control register 1 //0x01b5 ------------------------------------------------------*/ union st_fmr1 { /* Flash identification register */ struct{ unsigned char :1; /* Reserved bit */ unsigned char FMR11:1; /* EW1 mode select bit */ unsigned char :1; /* Reserved bit */ unsigned char :1; /* Reserved bit */ unsigned char :1; /* Reserved bit */ unsigned char :1; /* Reserved bit */ unsigned char FMR16:1; /* Lock bit status flag */ unsigned char :1; /* Reserved bit */ }BIT; unsigned char BYTE; }; /*------------------------------------------------------ Flash memory control register 0 //0x01b7 ------------------------------------------------------*/ union st_fmr0 { /* Flash identification register */ struct{ unsigned char FMR00:1; /* RY/BY~ status flag */ unsigned char FMR01:1; /* EW0 mode select bit */ unsigned char FMR02:1; /* Lock bit disable bit */ unsigned char FMSTP:1; /* Flash memory stop bit */ unsigned char :1; /* Reserved bit */ unsigned char FMR05:1; /* User ROM area select bit */ unsigned char FMR06:1; /* Program status flag */ unsigned char FMR07:1; /* Erase status flag */ }BIT; unsigned char BYTE; }; /*------------------------------------------------------ Address match interrupt register 2 //0x01b8 -----------------------------------------------------*/ union st_rmad2 { struct{ unsigned char RMAD2L; /* Address match interrupt register 2 low 8 bit */ unsigned char RMAD2M; /* Address match interrupt register 2 mid 8 bit */ unsigned char RMAD2H; /* Address match interrupt register 2 high 8 bit */ unsigned char NC; /* non use */ } BYTE; /* Byte access */ unsigned long DWORD; /* Word Access */ }; /* Address match interrupt register 2 32 bit */ /*------------------------------------------------------ Address match interrupt enable register 2 //0x01bb ------------------------------------------------------*/ union st_aier2 { /* Address match interrupt enable register 2 */ struct{ unsigned char AIER20:1; /* Address match interrupt 2 enable bit */ unsigned char AIER21:1; /* Address match interrupt 3 enable bit */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ }BIT; unsigned char BYTE; }; /*------------------------------------------------------ Address match interrupt register 3 //0x01bc -----------------------------------------------------*/ union st_rmad3 { struct{ unsigned char RMAD3L; /* Address match interrupt register 3 low 8 bit */ unsigned char RMAD3M; /* Address match interrupt register 3 mid 8 bit */ unsigned char RMAD3H; /* Address match interrupt register 3 high 8 bit */ unsigned char NC; /* non use */ } BYTE; /* Byte access */ unsigned long DWORD; /* Word Access */ }; /* Address match interrupt register 3 32 bit */ /*------------------------------------------------------ Peripheral clock select register //0x025e ------------------------------------------------------*/ union st_pclkr { /* Peripheral clock select register */ struct{ unsigned char PCLK0 :1; /* TimerA,B clock select bit */ unsigned char PCLK1 :1; /* SI/O clock select bit */ unsigned char :1; /* Reserved bit,set to 0 */ unsigned char :1; /* Reserved bit,set to 0 */ unsigned char :1; /* Reserved bit,set to 0 */ unsigned char :1; /* Reserved bit,set to 0 */ unsigned char :1; /* Reserved bit,set to 0 */ unsigned char :1; /* Reserved bit,set to 0 */ }BIT; unsigned char BYTE; }; /*------------------------------------------------------ Timer B3,4,5 Count start flag //0x0340 ------------------------------------------------------*/ union st_tbsr { /* union tbsr */ struct { /* Bit Access */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char TB3S:1; /* Timer B3 count start flag */ unsigned char TB4S:1; /* Timer B4 count start flag */ unsigned char TB5S:1; /* Timer B5 count start flag */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Timer B3,4,5 Count start flag */ /*------------------------------------------------------ Three-phase PWM control regester 0 //0x0348 ------------------------------------------------------*/ union st_invc0 { /* union invc0 */ struct { /* Bit Access */ unsigned char INV00:1;/* Effective interrupt output polarity select bit */ unsigned char INV01:1;/* Effective interrupt output specification bit */ unsigned char INV02:1;/* Mode select bit */ unsigned char INV03:1;/* Output control bit */ unsigned char INV04:1;/* Positive and negative phases concurrent L output disable function enable bit */ unsigned char INV05:1;/* Positive and negative phases concurrent L output detect flag */ unsigned char INV06:1;/* Modulation mode select bit */ unsigned char INV07:1;/* Software trigger bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Three-phase PWM control regester 1 //0x0349 ------------------------------------------------------*/ union st_invc1 { /* union invc1 */ struct { /* Bit Access */ unsigned char INV10:1;/* Timer Ai start trigger signal select bit */ unsigned char INV11:1;/* Timer A1-1,A2-1,A4-1 control bit */ unsigned char INV12:1;/* Short circuit timer count source select bit*/ unsigned char :1;/* Nothing Assigned */ unsigned char :1;/* Reserved bit (always 0) */ unsigned char :1;/* Nothing Assigned */ unsigned char :1;/* Nothing Assigned */ unsigned char :1;/* Nothing Assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Three-phase output buffer register 0 //0x034a ------------------------------------------------------*/ union st_idb0 { /* union idb0 */ struct { /* Bit Access */ unsigned char DU0 :1;/* U phase output buffer 0 */ unsigned char DUB0:1;/* U~ phase output buffer 0 */ unsigned char DV0 :1;/* V phase output buffer 0 */ unsigned char DVB0:1;/* V~ phase output buffer 0 */ unsigned char DW0 :1;/* W phase output buffer 0 */ unsigned char DWB0:1;/* W~ phase output buffer 0 */ unsigned char :1;/* Nothing Assigned */ unsigned char :1;/* Nothing Assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Three-phase output buffer register 1 //0x034b ------------------------------------------------------*/ union st_idb1 { /* union idb1 */ struct { /* Bit Access */ unsigned char DU1 :1;/* U phase output buffer 1 */ unsigned char DUB1:1;/* U~ phase output buffer 1 */ unsigned char DV1 :1;/* V phase output buffer 1 */ unsigned char DVB1:1;/* V~ phase output buffer 1 */ unsigned char DW1 :1;/* W phase output buffer 1 */ unsigned char DWB1:1;/* W~ phase output buffer 1 */ unsigned char :1;/* Nothing Assigned */ unsigned char :1;/* Nothing Assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*---------------------------------------------------------------------------------- Timer mode registers //0x035b,0x035c,0x035d,0x0396, 0x0397,0x0398,0x0399,0x039a,0x039b,0x039c ---------------------------------------------------------------------------------*/ union st_tmr { /* union tmr */ struct { /* Bit Access */ unsigned char TMOD0:1; /* Operation mode select bit */ unsigned char TMOD1:1; /* Operation mode select bit */ unsigned char MR0 :1; /* Pulse output function select bit */ unsigned char MR1 :1; /* External trigger select bit */ unsigned char MR2 :1; /* Trigger select bit */ unsigned char MR3 :1; /* Must always be "0" in one-shot timer*/ unsigned char TCK0 :1; /* Count source select bit */ unsigned char TCK1 :1; /* Count source select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*------------------------------------------------------ Interrupt request cause select register 2 //0x035e ------------------------------------------------------*/ union st_ifsr2a { /* union ifsr2a */ struct { /* Bit Access */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char IFSR26 :1; /* Interrupt request cause select bit */ unsigned char IFSR27 :1; /* Interrupt request cause select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*------------------------------------------------------ Interrupt request cause select register //0x035f -----------------------------------------------------*/ union st_ifsr { /* union IFSR */ struct { /* Bit Access */ unsigned char IFSR0:1; /* INT0~ interrupt polarity switching bit */ unsigned char IFSR1:1; /* INT1~ interrupt polarity switching bit */ unsigned char IFSR2:1; /* INT2~ interrupt polarity switching bit */ unsigned char IFSR3:1; /* INT3~ interrupt polarity switching bit */ unsigned char IFSR4:1; /* INT4~ interrupt polarity switching bit */ unsigned char IFSR5:1; /* INT5~ interrupt polarity switching bit */ unsigned char IFSR6:1; /* Interrupt request cause select bit */ unsigned char IFSR7:1; /* Interrupt request cause select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ SI/O4 control registers //0x0360 ------------------------------------------------------*/ union st_s4c { /* union S4C */ struct { /* Bit Access */ unsigned char SM40:1; /* Internal synchronous clock select bit */ unsigned char SM41:1; /* Internal synchronous clock select bit */ unsigned char SM42:1; /* Sout4 output disable bit */ unsigned char SM43:1; /* SI/O4 port select bit */ unsigned char SM44:1; /* CLK polarity select bit */ unsigned char SM45:1; /* Transfer direction select bit */ unsigned char SM46:1; /* Synchronous clock select bit */ unsigned char SM47:1; /* Sout4 initial value set bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*------------------------------------------------------ SI/O3 control registers //0x0362 ------------------------------------------------------*/ union st_s3c { /* union S3C */ struct { /* Bit Access */ unsigned char SM30:1; /* Internal synchronous clock select bit */ unsigned char SM31:1; /* Internal synchronous clock select bit */ unsigned char SM32:1; /* Sout3 output disable bit */ unsigned char SM33:1; /* SI/O3 port select bit */ unsigned char SM34:1; /* CLK polarity select bit */ unsigned char SM35:1; /* Transfer direction select bit */ unsigned char SM36:1; /* Synchronous clock select bit */ unsigned char SM37:1; /* Sout3 initial value set bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART0 special mode register 4 //0x036c ------------------------------------------------------*/ union st_u0smr4 { /* union u0smr4 */ struct { /* Bit Access */ unsigned char STAREQ :1; /* Start condition generate bit */ unsigned char RSTAREQ:1; /* Restart condition generate bit */ unsigned char STPREQ :1; /* Stop condition generate bit */ unsigned char STSPSEL:1; /* SCL,SDA output select bit */ unsigned char ACKD :1; /* ACK data bit */ unsigned char ACKC :1; /* ACK data output enable bit */ unsigned char SCLHI :1; /* SCL output stop enable bit */ unsigned char SWC9 :1; /* Final bit L hold enable bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART0 special mode register 3 //0x036d ------------------------------------------------------*/ union st_u0smr3 { /* union u0smr3 */ struct { /* Bit Access */ unsigned char :1; /* Nothing is assigned */ unsigned char CKPH :1; /* Clock phase set bit */ unsigned char :1; /* Nothing is assigned */ unsigned char NODC :1; /* Clock output set bit */ unsigned char :1; /* Nothing is assigned */ unsigned char DL0 :1; /* SDA0(TxD0) digital delay setup bit */ unsigned char DL1 :1; /* SDA0(TxD0) digital delay setup bit */ unsigned char DL2 :1; /* SDA0(TxD0) digital delay setup bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART0 special mode register 2 //0x036e ------------------------------------------------------*/ union st_u0smr2 { /* union u0smr2 */ struct { /* Bit Access */ unsigned char IICM2 :1; /* IIC mode selection bit 2 */ unsigned char CSC :1; /* Clock-synchronous bit */ unsigned char SWC :1; /* SCL wait output bit */ unsigned char ALS :1; /* SDA output stop bit */ unsigned char STAC :1; /* UART0 initialization bit */ unsigned char SWC2 :1; /* SCL wait output bit 2 */ unsigned char SDHI :1; /* SDA output disable bit */ unsigned char :1; /* Nothing is assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART0 special mode register //0x036f ------------------------------------------------------*/ union st_u0smr { /* union u0smr */ struct { /* Bit Access */ unsigned char IICM:1; /* IIC mode selection bit */ unsigned char ABC :1; /* Arbitration lost detecting flag control bit */ unsigned char BBS :1; /* Bus busy flag */ unsigned char :1; /* Reserved bit,set to 0 */ unsigned char ABSC:1; /* Bus collision detect sampling clock select bit */ unsigned char ACSE:1; /* Auto clear function select bit of transmit enable bit */ unsigned char SSS :1; /* Transmit start condition select bit */ unsigned char :1; /* Nothing is assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART1 special mode register 4 //0x0370 ------------------------------------------------------*/ union st_u1smr4 { /* union u1smr4 */ struct { /* Bit Access */ unsigned char STAREQ:1; /* Start condition generate bit */ unsigned char RSTARE:1; /* Restart condition generate bit */ unsigned char STPREQ:1; /* Stop condition generate bit */ unsigned char STSPSE:1; /* SCL,SDA output select bit */ unsigned char ACKD :1; /* ACK data bit */ unsigned char ACKC :1; /* ACK data output enable bit */ unsigned char SCLHI :1; /* SCL output stop enable bit */ unsigned char SWC9 :1; /* Final bit L hold enable bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART1 special mode register 3 //0x0371 ------------------------------------------------------*/ union st_u1smr3 { /* union u1smr3 */ struct { /* Bit Access */ unsigned char :1; /* Nothing is assigned */ unsigned char CKPH :1; /* Clock phase set bit */ unsigned char :1; /* Nothing is assigned */ unsigned char NODC :1; /* Clock output set bit */ unsigned char :1; /* Nothing is assigned */ unsigned char DL0 :1; /* SDA1(TxD1) digital delay setup bit */ unsigned char DL1 :1; /* SDA1(TxD1) digital delay setup bit */ unsigned char DL2 :1; /* SDA1(TxD1) digital delay setup bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART1 special mode register 2 //0x0372 ------------------------------------------------------*/ union st_u1smr2 { /* union u1smr2 */ struct { /* Bit Access */ unsigned char IICM2 :1; /* IIC mode selection bit 2 */ unsigned char CSC :1; /* Clock-synchronous bit */ unsigned char SWC :1; /* SCL wait output bit */ unsigned char ALS :1; /* SDA output stop bit */ unsigned char STAC :1; /* UART0 initialization bit */ unsigned char SWC2 :1; /* SCL wait output bit 2 */ unsigned char SDHI :1; /* SDA output disable bit */ unsigned char :1; /* Nothing is assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART1 special mode register //0x0373 ------------------------------------------------------*/ union st_u1smr { /* union u1smr */ struct { /* Bit Access */ unsigned char IICM:1; /* IIC mode selection bit */ unsigned char ABC :1; /* Arbitration lost detecting flag control bit */ unsigned char BBS :1; /* Bus busy flag */ unsigned char :1; /* Reserved bit,set to 0 */ unsigned char ABSC:1; /* Bus collision detect sampling clock select bit */ unsigned char ACSE:1; /* Auto clear function select bit of transmit enable bit */ unsigned char SSS :1; /* Transmit start condition select bit */ unsigned char :1; /* Nothing is assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART2 special mode register 4 //0x0374 ------------------------------------------------------*/ union st_u2smr4 { /* union u1smr4 */ struct { /* Bit Access */ unsigned char STAREQ:1; /* Start condition generate bit */ unsigned char RSTARE:1; /* Restart condition generate bit */ unsigned char STPREQ:1; /* Stop condition generate bit */ unsigned char STSPSE:1; /* SCL,SDA output select bit */ unsigned char ACKD :1; /* ACK data bit */ unsigned char ACKC :1; /* ACK data output enable bit */ unsigned char SCLHI :1; /* SCL output stop enable bit */ unsigned char SWC9 :1; /* Final bit L hold enable bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART2 special mode register 3 //0x0375 ------------------------------------------------------*/ union st_u2smr3 { /* union U2SMR3 */ struct { /* Bit Access */ unsigned char :1; /* Nothing is assigned */ unsigned char CKPH :1; /* Clock phase set bit */ unsigned char :1; /* Nothing is assigned */ unsigned char NODC :1; /* Clock output set bit */ unsigned char :1; /* Nothing is assigned */ unsigned char DL0 :1; /* SDA digital delay setup bit */ unsigned char DL1 :1; /* SDA digital delay setup bit */ unsigned char DL2 :1; /* SDA digital delay setup bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART2 special mode register 2 //0x0376 ------------------------------------------------------*/ union st_u2smr2 { /* union U2SMR2 */ struct { /* Bit Access */ unsigned char IICM2:1; /* IIC mode selection bit 2 */ unsigned char CSC :1; /* Clock-synchronous bit */ unsigned char SWC :1; /* SCL wait output bit */ unsigned char ALS :1; /* SDA output stop bit */ unsigned char STAC :1; /* UART2 initialization bit */ unsigned char SWC2 :1; /* SCL wait output bit 2 */ unsigned char SDHI :1; /* SDA output disable bit */ unsigned char :1; /* Nothing is assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART2 special mode register //0x0377 ------------------------------------------------------*/ union st_u2smr { /* union U2SMR */ struct { /* Bit Access */ unsigned char IICM :1; /* IIC mode selection bit */ unsigned char ABC :1; /* Arbitration lost detecting flag control bit */ unsigned char BBS :1; /* Reserved bit,set to 0 */ unsigned char :1; /* SCLL sync output enable bit */ unsigned char ABSCS:1; /* Bus collision detect sampling clock select bit */ unsigned char ACSE :1; /* Auto clear function select bit of transmit enable bit */ unsigned char SSS :1; /* Transmit start condition select bit */ unsigned char :1; /* Nothing is assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ UART2 transmit/receive mode register //0x0378 ------------------------------------------------------*/ union st_u2mr { /* union U2MR */ struct { /* Bit Access */ unsigned char SMD0_U2MR :1; /* Serial I/O mode select bit */ unsigned char SMD1_U2MR :1; /* Serial I/O mode select bit */ unsigned char SMD2_U2MR :1; /* Serial I/O mode select bit */ unsigned char CKDIR_U2MR:1; /* Internal/external clock select bit */ unsigned char STPS_U2MR :1; /* Stop bit length select bit */ unsigned char PRY_U2MR :1; /* Odd/even parity select bit */ unsigned char PRYE_U2MR :1; /* Parity enable bit */ unsigned char IOPOL_U2MR:1; /* TxD RxD I/O polarity reverse bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*------------------------------------------------------ UART2 Transmit buffer register 16 bit //0x037a ------------------------------------------------------*/ union st_u2tb { /* UART2 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */ struct{ unsigned char U2TBL; /* UART2 Transmit buffer register low 8 bit */ unsigned char U2TBH; /* UART2 Transmit buffer register high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ UART2 transmit/receive control register 0//0x037c ------------------------------------------------------*/ union st_u2c0 { /* union U2C0 */ struct { /* Bit Access */ unsigned char CLK0 :1; /* BRG count source select bit */ unsigned char CLK1 :1; /* BRG count source select bit */ unsigned char CRS :1; /* CTS~/RTS~ function select bit */ unsigned char TXEPT:1; /* Transmit register empty flag */ unsigned char CRD :1; /* CTS~/RTS~ disable bit */ unsigned char :1; /* Nothing Assigned */ unsigned char CKPOL:1; /* CLK polarity select bit */ unsigned char UFORM:1; /* Transfer format select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* UART2 transmit/receive control register 0*/ /*------------------------------------------------------ UART2 transmit/receive control register 1 //0x037d -----------------------------------------------------*/ union st_u2c1 { /* union U2C1 */ struct { /* Bit Access */ unsigned char TE_U2C1:1; /* Transmit enable bit */ unsigned char TI_U2C1:1; /* Transmit buffer empty flag */ unsigned char RE_U2C1:1; /* Receive enable bit */ unsigned char RI_U2C1:1; /* Receive complete flag */ unsigned char U2IRS :1; /* UART2 transmit interrupt cause select bit*/ unsigned char U2RRM :1; /* UART2 continuous receive mode enable bit */ unsigned char U2LCH :1; /* Data logic select bit */ unsigned char U2ERE :1; /* Error signal output enable bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UART2 transmit/receive control register 1 */ /*------------------------------------------------------ UART2 receive buffer registers //0x037e ------------------------------------------------------*/ union st_u2rb { /* UART2 receive buffer register */ struct { /* Bit Access */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char ABT_U2RB:1; /* Arbitration lost detecting flag */ unsigned char OER_U2RB:1; /* Overrun error flag */ unsigned char FER_U2RB:1; /* Framing error flag */ unsigned char PER_U2RB:1; /* Parity error flag */ unsigned char SUM_U2RB:1; /* Error sum flag */ }BIT; struct{ unsigned char U2RBL; /* Low 8 bit */ unsigned char U2RBH; /* High 8 bit */ }BYTE; unsigned short WORD; }; /*------------------------------------------------------ Count start flag //0x0380 ------------------------------------------------------*/ union st_tabsr { /* union TABSR */ struct { /* Bit Access */ unsigned char TA0S:1; /* Timer A0 count start flag */ unsigned char TA1S:1; /* Timer A1 count start flag */ unsigned char TA2S:1; /* Timer A2 count start flag */ unsigned char TA3S:1; /* Timer A3 count start flag */ unsigned char TA4S:1; /* Timer A4 count start flag */ unsigned char TB0S:1; /* Timer B0 count start flag */ unsigned char TB1S:1; /* Timer B1 count start flag */ unsigned char TB2S:1; /* Timer B2 count start flag */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UART2 transmit/receive control register 1 */ /*------------------------------------------------------ Clock prescaler reset flag //0x0381 ------------------------------------------------------*/ union st_cpsrf { /* union CPSRF */ struct { /* Bit Access */ unsigned char :1; /* */ unsigned char :1; /* */ unsigned char :1; /* */ unsigned char :1; /* */ unsigned char :1; /* */ unsigned char :1; /* */ unsigned char :1; /* */ unsigned char CPSR:1; /* Clock prescaler reset flag */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Watchdog timer start register */ /*------------------------------------------------------ One-shot start flag //0x0382 ------------------------------------------------------*/ union st_onsf { /* union ONSF */ struct { /* Bit Access */ unsigned char TA0OS:1; /* Timer A0 one-shot start flag */ unsigned char TA1OS:1; /* Timer A1 one-shot start flag */ unsigned char TA2OS:1; /* Timer A2 one-shot start flag */ unsigned char TA3OS:1; /* Timer A3 one-shot start flag */ unsigned char TA4OS:1; /* Timer A4 one-shot start flag */ unsigned char TAZIE:1; /* Z phase input enable bit */ unsigned char TA0TGL:1; /* Timer A0 event/trigger select bit */ unsigned char TA0TGH:1; /* Timer A0 event/trigger select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UART2 transmit/receive control register 1 */ /*------------------------------------------------------ Trigger select register //0x0383 ------------------------------------------------------*/ union st_trgsr { /* union TRGSR */ struct { /* Bit Access */ unsigned char TA1TGL:1; /* Timer A1 event/trigger select bit */ unsigned char TA1TGH:1; /* Timer A1 event/trigger select bit */ unsigned char TA2TGL:1; /* Timer A2 event/trigger select bit */ unsigned char TA2TGH:1; /* Timer A2 event/trigger select bit */ unsigned char TA3TGL:1; /* Timer A3 event/trigger select bit */ unsigned char TA3TGH:1; /* Timer A3 event/trigger select bit */ unsigned char TA4TGL:1; /* Timer A4 event/trigger select bit */ unsigned char TA4TGH:1; /* Timer A4 event/trigger select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UART2 transmit/receive control register 1 */ /*------------------------------------------------------ Timer B2 special mode register //0x039e ------------------------------------------------------*/ union st_tb2sc { /* union tb2sc */ struct { /* Bit Access */ unsigned char PWCON :1; /* Timer B2 reload timing switching bit */ unsigned char IVPCR1:1; /* Three phase output port NMI control bit 1 */ unsigned char :1; /* Nothing is assigned */ unsigned char :1; /* Nothing is assigned */ unsigned char :1; /* Nothing is assigned */ unsigned char :1; /* Nothing is assigned */ unsigned char :1; /* Nothing is assigned */ unsigned char :1; /* Nothing is assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UART2 transmit/receive control register 1 */ /*------------------------------------------------------ UART0 transmit/receive mode register //0x03a0 ------------------------------------------------------*/ union st_u0mr { /* union U0MR */ struct { /* Bit Access */ unsigned char SMD0_U0MR :1; /* Serial I/O mode select bit */ unsigned char SMD1_U0MR :1; /* Serial I/O mode select bit */ unsigned char SMD2_U0MR :1; /* Serial I/O mode select bit */ unsigned char CKDIR_U0MR:1; /* Internal/external clock select bit */ unsigned char STPS_U0MR :1; /* Stop bit length select bit */ unsigned char PRY_U0MR :1; /* Odd/even parity select bit */ unsigned char PRYE_U0MR :1; /* Parity enable bit */ unsigned char IOPOL_U0MR :1; /* TxD,RxD I/O polarity reverse bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*------------------------------------------------------ UART0 transmit/receive mode register //0x03a2 ------------------------------------------------------*/ union st_u0tb { /* UART0 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */ struct{ unsigned char U0TBL; /* UART0 Transmit buffer register low 8 bit */ unsigned char U0TBH; /* UART0 Transmit buffer register high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ UARTi transmit/receive control register 0 //0x03a4 ------------------------------------------------------*/ union st_u0c0 { /* union U0C0 */ struct { /* Bit Access */ unsigned char CLK0 :1; /* BRG count source select bit */ unsigned char CLK1 :1; /* BRG count source select bit */ unsigned char CRS :1; /* CTS~/RTS~ function select bit */ unsigned char TXEPT:1; /* Transmit register empty flag */ unsigned char CRD :1; /* CTS~/RTS~ disable bit */ unsigned char NCH :1; /* Data output select bit */ unsigned char CKPOL:1; /* CLK polarity select bit */ unsigned char UFORM:1; /* Transfer format select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UARTi transmit/receive control register 0 */ /*------------------------------------------------------ UART0 transmit/receive control register 1 //0x03a5 ------------------------------------------------------*/ union st_u0c1 { /* union U0C1 */ struct { /* Bit Access */ unsigned char TE :1; /* Transmit enable bit */ unsigned char TI :1; /* Transmit buffer empty flag */ unsigned char RE :1; /* Receive enable bit */ unsigned char RI :1; /* Receive complete flag */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char U0LCH :1; /* Data logic select bit */ unsigned char U0ERE :1; /* Error signal output enable bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UART0 transmit/receive control register 1 */ /*------------------------------------------------------ UART0 receive buffer register //0x03a6 ------------------------------------------------------*/ union st_u0rb { /* UART0 receive buffer register */ struct { /* Bit Access */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char ABT_U0RB:1; /* Arbitration lost detecting flag */ unsigned char OER_U0RB:1; /* Overrun error flag */ unsigned char FER_U0RB:1; /* Framing error flag */ unsigned char PER_U0RB:1; /* Parity error flag */ unsigned char SUM_U0RB:1; /* Error sum flag */ }BIT; struct{ unsigned char U0RBL; /* Low 8 bit */ unsigned char U0RBH; /* High 8 bit */ }BYTE; unsigned short WORD; }; /*------------------------------------------------------ UART1 transmit/receive mode register //0x03a8 ------------------------------------------------------*/ union st_u1mr { /* union U1MR */ struct { /* Bit Access */ unsigned char SMD0_U1MR :1; /* Serial I/O mode select bit */ unsigned char SMD1_U1MR :1; /* Serial I/O mode select bit */ unsigned char SMD2_U1MR :1; /* Serial I/O mode select bit */ unsigned char CKDIR_U1MR :1; /* Internal/external clock select bit */ unsigned char STPS_U1MR :1; /* Stop bit length select bit */ unsigned char PRY_U1MR :1; /* Odd/even parity select bit */ unsigned char PRYE_U1MR :1; /* Parity enable bit */ unsigned char IOPOL_U1MR :1; /* TxD,RxD I/O polarity reverse bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*------------------------------------------------------ UART1 transmit buffer register //0x03aa ------------------------------------------------------*/ union st_u1tb { /* UART1 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */ struct{ unsigned char U1TBL; /* UART1 Transmit buffer register low 8 bit */ unsigned char U1TBH; /* UART1 Transmit buffer register high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ UART1 transmit/receive control register 0 //0x03ac ------------------------------------------------------*/ union st_u1c0 { /* union UCR */ struct { /* Bit Access */ unsigned char CLK0 :1; /* BRG count source select bit */ unsigned char CLK1 :1; /* BRG count source select bit */ unsigned char CRS :1; /* CTS~/RTS~ function select bit */ unsigned char TXEPT:1; /* Transmit register empty flag */ unsigned char CRD :1; /* CTS~/RTS~ disable bit */ unsigned char NCH :1; /* Data output select bit */ unsigned char CKPOL:1; /* CLK polarity select bit */ unsigned char UFORM:1; /* Transfer format select bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UARTi transmit/receive control register 0 */ /*------------------------------------------------------ UART1 transmit/receive control register 1 //0x03ad ------------------------------------------------------*/ union st_u1c1 { /* union U1C1 */ struct { /* Bit Access */ unsigned char TE:1; /* Transmit enable bit */ unsigned char TI:1; /* Transmit buffer empty flag */ unsigned char RE:1; /* Receive enable bit */ unsigned char RI:1; /* Receive complete flag */ unsigned char :1; /* */ unsigned char :1; /* */ unsigned char :1; /* */ unsigned char :1; /* */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UART1 transmit/receive control register 1 */ /*------------------------------------------------------ UART1 receive buffer register //0x03ae ------------------------------------------------------*/ union st_u1rb { /* UART1 receive buffer register */ struct { /* Bit Access */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Receive data */ unsigned char :1; /* Nothing assigned */ unsigned char :1; /* Nothing assigned */ unsigned char ABT_U1RB:1; /* Arbitration lost detecting flag */ unsigned char OER_U1RB:1; /* Overrun error flag */ unsigned char FER_U1RB:1; /* Framing error flag */ unsigned char PER_U1RB:1; /* Parity error flag */ unsigned char SUM_U1RB:1; /* Error sum flag */ }BIT; struct{ unsigned char U1RBL; /* Low 8 bit */ unsigned char U1RBH; /* High 8 bit */ }BYTE; unsigned short WORD; }; /*------------------------------------------------------ UART transmit/receive control register 2 //0x03b0 ------------------------------------------------------*/ union st_ucon { /* union UCON */ struct { /* Bit Access */ unsigned char U0IRS :1; /* UART0 transmit interrupt cause select bit*/ unsigned char U1IRS :1; /* UART1 transmit interrupt cause select bit*/ unsigned char U0RRM :1; /* UART0 continuous receive mode enable bit */ unsigned char U1RRM :1; /* UART1 continuous receive mode enable bit */ unsigned char CLKMD0:1; /* CLK/CLKS select bit 0 */ unsigned char CLKMD1:1; /* CLK/CLKS select bit 1 */ unsigned char RCSP :1; /* Separate CTS~/RTS~ bit */ unsigned char :1; /* */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*UART transmit/receive control register 2 */ /*------------------------------------------------------ DMA0 request cause select register //0x03b8 ------------------------------------------------------*/ union st_dm0sl { /* DMAi request cause select registers */ struct{ unsigned char DSEL0:1;/* DMA request cause select bit */ unsigned char DSEL1:1;/* DMA request cause select bit */ unsigned char DSEL2:1;/* DMA request cause select bit */ unsigned char DSEL3:1;/* DMA request cause select bit */ unsigned char :1; unsigned char :1; unsigned char DMS :1;/* DMA request cause expansion bit */ unsigned char DSR :1;/* Software DMA request bit */ }BIT; unsigned char BYTE; }; /*------------------------------------------------------ DMA1 request cause select register //0x03ba ------------------------------------------------------*/ union st_dm1sl { /* DMAi request cause select registers */ struct{ unsigned char DSEL0:1; /* DMA request cause select bit */ unsigned char DSEL1:1; /* DMA request cause select bit */ unsigned char DSEL2:1; /* DMA request cause select bit */ unsigned char DSEL3:1; /* DMA request cause select bit */ unsigned char :1; unsigned char :1; unsigned char DMS :1; /* DMA request cause expansion bit */ unsigned char DSR :1; /* Software DMA request bit */ }BIT; unsigned char BYTE; }; /*------------------------------------------------------ CRC data register //0x03bc ------------------------------------------------------*/ union st_crcd { /* CRC data register 16 bit */ struct{ unsigned char CRCDL; /* CRC data register low 8 bit */ unsigned char CRCDH; /* CRC data register high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D register 0 //0x03c0 ------------------------------------------------------*/ union st_ad0 { /* A/D register 0 16 bit */ struct{ unsigned char AD0L; /* A/D register 0 low 8 bit */ unsigned char AD0H; /* A/D register 0 high 8 bit */ }BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D register 1 //0x03c2 ------------------------------------------------------*/ union st_ad1 { /* A/D register 1 16 bit */ struct{ unsigned char AD1L; /* A/D register 1 low 8 bit */ unsigned char AD1H; /* A/D register 1 high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D register 2 //0x03c4 ------------------------------------------------------*/ union st_ad2 { /* A/D register 2 16 bit */ struct{ unsigned char AD2L; /* A/D register 2 low 8 bit */ unsigned char AD2H; /* A/D register 2 high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D register 3 //0x03c6 ------------------------------------------------------*/ union st_ad3 { /* A/D register 3 16 bit */ struct{ unsigned char AD3L; /* A/D register 3 low 8 bit */ unsigned char AD3H; /* A/D register 3 high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D register 4 //0x03c8 ------------------------------------------------------*/ union st_ad4 { /* A/D register 4 16 bit */ struct{ unsigned char AD4L; /* A/D register 4 low 8 bit */ unsigned char AD4H; /* A/D register 4 high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D register 5 //0x03ca ------------------------------------------------------*/ union st_ad5 { /* A/D register 5 16 bit */ struct{ unsigned char AD5L; /* A/D register 5 low 8 bit */ unsigned char AD5H; /* A/D register 5 high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D register 6 //0x03cc ------------------------------------------------------*/ union st_ad6 { /* A/D register 6 16 bit */ struct{ unsigned char AD6L; /* A/D register 6 low 8 bit */ unsigned char AD6H; /* A/D register 6 high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D register 7 //0x03ce ------------------------------------------------------*/ union st_ad7 { /* A/D register 7 16 bit */ struct{ unsigned char AD7L; /* A/D register 7 low 8 bit */ unsigned char AD7H; /* A/D register 7 high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; /*------------------------------------------------------ A/D control register 2 //0x03d4 ------------------------------------------------------*/ union st_adcon2 { /* union ADCON2 */ struct { /* Bit Access */ unsigned char SMP :1; /* A/D conversion method select bit */ unsigned char ADGSEL0 :1; /* Reserved bit (Always set to 0 ) */ unsigned char ADGSEL1 :1; /* Reserved bit (Always set to 0 ) */ unsigned char :1; /* Reserved bit (Always set to 0 ) */ unsigned char CKS2 :1; /* Nothing Assigned. */ unsigned char :1; /* Nothing Assigned. */ unsigned char :1; /* Nothing Assigned. */ unsigned char :1; /* Nothing Assigned. */ } BIT; unsigned char BYTE; /* Byte Access */ }; /*------------------------------------------------------ A/D control register 0 //0x03d6 ------------------------------------------------------*/ union st_adcon0 { /* union ADCON0 */ struct { /* Bit Access */ unsigned char CH0 :1; /* Analog input pin select bit */ unsigned char CH1 :1; /* Analog input pin select bit */ unsigned char CH2 :1; /* Analog input pin select bit */ unsigned char MD0 :1; /* A/D operation mode select bit 0 */ unsigned char MD1 :1; /* A/D operation mode select bit 0 */ unsigned char TRG :1; /* Trigger select bit */ unsigned char ADST:1; /* A/D conversion start flag */ unsigned char CKS0:1; /* Frequency select bit 0 */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*A/D control register 0 */ /*------------------------------------------------------ A/D control register 1 //0x03d7 ------------------------------------------------------*/ union st_adcon1 { /* union ADCON1 */ struct { /* Bit Access */ unsigned char SCAN0:1; /* A/D sweep pin select bit */ unsigned char SCAN1:1; /* A/D sweep pin select bit */ unsigned char MD2 :1; /* A/D operation mode select bit 1 */ unsigned char BITS :1; /* 8/10-bit mode select bit */ unsigned char CKS1 :1; /* Frequency select bit 1 */ unsigned char VCUT :1; /* Vref connect bit */ unsigned char OPA0 :1; /* External op-amp connection mode bit */ unsigned char OPA1 :1; /* External op-amp connection mode bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /*A-D control register 1 */ /*------------------------------------------------------ D/A control register //0x03dc ------------------------------------------------------*/ union st_dacon{ /* union DACON */ struct { /* Bit Access */ unsigned char DA0E :1; /* D/A0 output enable bit */ unsigned char DA1E :1; /* D/A1 output enable bit */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* D/A control register */ /*------------------------------------------------------ Port P14 control register //0x03de ------------------------------------------------------*/ union st_pc14{ /* union pc14 */ struct { /* Bit Access */ unsigned char P140 :1; /* Port P14_0 register */ unsigned char P141 :1; /* Port P14_1 register */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ unsigned char pd140:1; /* Port P14_0 direction register */ unsigned char pd141:1; /* Port P14_1 direction register */ unsigned char :1; /* Nothing Assigned */ unsigned char :1; /* Nothing Assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Port P14 control register */ /*------------------------------------------------------ Pull-up control register 3 //0x03df ------------------------------------------------------*/ union st_pur3{ /* union pur3 */ struct { /* Bit Access */ unsigned char PU30:1; /* P11_0 to P11_3 pull-up */ unsigned char PU31:1; /* P11_4 to P11_7 pull-up */ unsigned char PU32:1; /* P12_0 to P12_3 pull-up */ unsigned char PU33:1; /* P12_4 to P12_7 pull-up */ unsigned char PU34:1; /* P13_0 to P13_3 pull-up */ unsigned char PU35:1; /* P13_4 to P13_7 pull-up */ unsigned char PU36:1; /* P14_0,P14_1 pull-up */ unsigned char PU37:1; /* P11 to P14 effective bit */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* Pull-up control register 3 */ /*------------------------------------------------------ Port P0 register //0x03e0 ------------------------------------------------------*/ union st_p0 { /* union P0 */ struct { /* Bit Access */ unsigned char P0_0:1; /* Port P00 register */ unsigned char P0_1:1; /* Port P01 register */ unsigned char P0_2:1; /* Port P02 register */ unsigned char P0_3:1; /* Port P03 register */ unsigned char P0_4:1; /* Port P04 register */ unsigned char P0_5:1; /* Port P05 register */ unsigned char P0_6:1; /* Port P06 register */ unsigned char P0_7:1; /* Port P07 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P1 register //0x03e1 ------------------------------------------------------*/ union st_p1 { /* union P1 */ struct { /* Bit Access */ unsigned char P1_0:1;/* Port P10 register */ unsigned char P1_1:1;/* Port P11 register */ unsigned char P1_2:1;/* Port P12 register */ unsigned char P1_3:1;/* Port P13 register */ unsigned char P1_4:1;/* Port P14 register */ unsigned char P1_5:1;/* Port P15 register */ unsigned char P1_6:1;/* Port P16 register */ unsigned char P1_7:1;/* Port P17 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P0 direction register //0x03e2 ------------------------------------------------------*/ union st_pd0 { /* union PD0 */ struct { /* Bit Access */ unsigned char PD0_0:1;/* Port P00 direction register */ unsigned char PD0_1:1;/* Port P01 direction register */ unsigned char PD0_2:1;/* Port P02 direction register */ unsigned char PD0_3:1;/* Port P03 direction register */ unsigned char PD0_4:1;/* Port P04 direction register */ unsigned char PD0_5:1;/* Port P05 direction register */ unsigned char PD0_6:1;/* Port P06 direction register */ unsigned char PD0_7:1;/* Port P07 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P1 direction register //0x03e3 ------------------------------------------------------*/ union st_pd1 { /* union PD1 */ struct { /* Bit Access */ unsigned char PD1_0:1;/* Port P10 direction register */ unsigned char PD1_1:1;/* Port P11 direction register */ unsigned char PD1_2:1;/* Port P12 direction register */ unsigned char PD1_3:1;/* Port P13 direction register */ unsigned char PD1_4:1;/* Port P14 direction register */ unsigned char PD1_5:1;/* Port P15 direction register */ unsigned char PD1_6:1;/* Port P16 direction register */ unsigned char PD1_7:1;/* Port P17 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P2 register //0x03e4 ------------------------------------------------------*/ union st_p2 { /* union P2 */ struct { /* Bit Access */ unsigned char P2_0:1;/* Port P20 register */ unsigned char P2_1:1;/* Port P21 register */ unsigned char P2_2:1;/* Port P22 register */ unsigned char P2_3:1;/* Port P23 register */ unsigned char P2_4:1;/* Port P24 register */ unsigned char P2_5:1;/* Port P25 register */ unsigned char P2_6:1;/* Port P26 register */ unsigned char P2_7:1;/* Port P27 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P3 register //0x03e5 ------------------------------------------------------*/ union st_p3 { /* union P3 */ struct { /* Bit Access */ unsigned char P3_0:1;/* Port P30 register */ unsigned char P3_1:1;/* Port P31 register */ unsigned char P3_2:1;/* Port P32 register */ unsigned char P3_3:1;/* Port P33 register */ unsigned char P3_4:1;/* Port P34 register */ unsigned char P3_5:1;/* Port P35 register */ unsigned char P3_6:1;/* Port P36 register */ unsigned char P3_7:1;/* Port P37 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P2 direction register //0x03e6 ------------------------------------------------------*/ union st_pd2 { /* union PD2 */ struct { /* Bit Access */ unsigned char PD2_0:1;/* Port P20 direction register */ unsigned char PD2_1:1;/* Port P21 direction register */ unsigned char PD2_2:1;/* Port P22 direction register */ unsigned char PD2_3:1;/* Port P23 direction register */ unsigned char PD2_4:1;/* Port P24 direction register */ unsigned char PD2_5:1;/* Port P25 direction register */ unsigned char PD2_6:1;/* Port P26 direction register */ unsigned char PD2_7:1;/* Port P27 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P3 direction register //0x03e7 ------------------------------------------------------*/ union st_pd3 { /* union PD3 */ struct { /* Bit Access */ unsigned char PD3_0:1;/* Port P30 direction register */ unsigned char PD3_1:1;/* Port P31 direction register */ unsigned char PD3_2:1;/* Port P32 direction register */ unsigned char PD3_3:1;/* Port P33 direction register */ unsigned char PD3_4:1;/* Port P34 direction register */ unsigned char PD3_5:1;/* Port P35 direction register */ unsigned char PD3_6:1;/* Port P36 direction register */ unsigned char PD3_7:1;/* Port P37 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P4 register //0x03e8 ------------------------------------------------------*/ union st_p4 { /* union P4 */ struct { /* Bit Access */ unsigned char P4_0:1;/* Port P40 register */ unsigned char P4_1:1;/* Port P41 register */ unsigned char P4_2:1;/* Port P42 register */ unsigned char P4_3:1;/* Port P43 register */ unsigned char P4_4:1;/* Port P44 register */ unsigned char P4_5:1;/* Port P45 register */ unsigned char P4_6:1;/* Port P46 register */ unsigned char P4_7:1;/* Port P47 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P5 register //0x03e9 ------------------------------------------------------*/ union st_p5 { /* union P5 */ struct { /* Bit Access */ unsigned char P5_0:1;/* Port P50 register */ unsigned char P5_1:1;/* Port P51 register */ unsigned char P5_2:1;/* Port P52 register */ unsigned char P5_3:1;/* Port P53 register */ unsigned char P5_4:1;/* Port P54 register */ unsigned char P5_5:1;/* Port P55 register */ unsigned char P5_6:1;/* Port P56 register */ unsigned char P5_7:1;/* Port P57 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P4 direction register //0x03ea ------------------------------------------------------*/ union st_pd4 { /* union PD4 */ struct { /* Bit Access */ unsigned char PD4_0:1;/* Port P40 direction register */ unsigned char PD4_1:1;/* Port P41 direction register */ unsigned char PD4_2:1;/* Port P42 direction register */ unsigned char PD4_3:1;/* Port P43 direction register */ unsigned char PD4_4:1;/* Port P44 direction register */ unsigned char PD4_5:1;/* Port P45 direction register */ unsigned char PD4_6:1;/* Port P46 direction register */ unsigned char PD4_7:1;/* Port P47 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P5 direction register //0x03eb ------------------------------------------------------*/ union st_pd5 { /* union PD5 */ struct { /* Bit Access */ unsigned char PD5_0:1;/* Port P50 direction register */ unsigned char PD5_1:1;/* Port P51 direction register */ unsigned char PD5_2:1;/* Port P52 direction register */ unsigned char PD5_3:1;/* Port P53 direction register */ unsigned char PD5_4:1;/* Port P54 direction register */ unsigned char PD5_5:1;/* Port P55 direction register */ unsigned char PD5_6:1;/* Port P56 direction register */ unsigned char PD5_7:1;/* Port P57 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P6 register //0x03ec ------------------------------------------------------*/ union st_p6 { /* union P6 */ struct { /* Bit Access */ unsigned char P6_0:1;/* Port P60 register */ unsigned char P6_1:1;/* Port P61 register */ unsigned char P6_2:1;/* Port P62 register */ unsigned char P6_3:1;/* Port P63 register */ unsigned char P6_4:1;/* Port P64 register */ unsigned char P6_5:1;/* Port P65 register */ unsigned char P6_6:1;/* Port P66 register */ unsigned char P6_7:1;/* Port P67 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P7 register //0x03ed ------------------------------------------------------*/ union st_p7 { /* union P7 */ struct { /* Bit Access */ unsigned char P7_0:1;/* Port P70 register */ unsigned char P7_1:1;/* Port P71 register */ unsigned char P7_2:1;/* Port P72 register */ unsigned char P7_3:1;/* Port P73 register */ unsigned char P7_4:1;/* Port P74 register */ unsigned char P7_5:1;/* Port P75 register */ unsigned char P7_6:1;/* Port P76 register */ unsigned char P7_7:1;/* Port P77 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P6 direction register //0x03ee ------------------------------------------------------*/ union st_pd6 { /* union PD6 */ struct { /* Bit Access */ unsigned char PD6_0:1;/* Port P60 direction register */ unsigned char PD6_1:1;/* Port P61 direction register */ unsigned char PD6_2:1;/* Port P62 direction register */ unsigned char PD6_3:1;/* Port P63 direction register */ unsigned char PD6_4:1;/* Port P64 direction register */ unsigned char PD6_5:1;/* Port P65 direction register */ unsigned char PD6_6:1;/* Port P66 direction register */ unsigned char PD6_7:1;/* Port P67 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P7 direction register //0x03ef ------------------------------------------------------*/ union st_pd7 { /* union PD7 */ struct { /* Bit Access */ unsigned char PD7_0:1;/* Port P70 direction register */ unsigned char PD7_1:1;/* Port P71 direction register */ unsigned char PD7_2:1;/* Port P72 direction register */ unsigned char PD7_3:1;/* Port P73 direction register */ unsigned char PD7_4:1;/* Port P74 direction register */ unsigned char PD7_5:1;/* Port P75 direction register */ unsigned char PD7_6:1;/* Port P76 direction register */ unsigned char PD7_7:1;/* Port P77 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P8 register //0x03f0 ------------------------------------------------------*/ union st_p8 { /* union P8 */ struct { /* Bit Access */ unsigned char P8_0:1;/* Port P80 register */ unsigned char P8_1:1;/* Port P81 register */ unsigned char P8_2:1;/* Port P82 register */ unsigned char P8_3:1;/* Port P83 register */ unsigned char P8_4:1;/* Port P84 register */ unsigned char P8_5:1;/* Port P85 register */ unsigned char P8_6:1;/* Port P86 register */ unsigned char P8_7:1;/* Port P87 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P9 register //0x03f1 ------------------------------------------------------*/ union st_p9 { /* union P9 */ struct { /* Bit Access */ unsigned char P9_0:1;/* Port P90 register */ unsigned char P9_1:1;/* Port P91 register */ unsigned char P9_2:1;/* Port P92 register */ unsigned char P9_3:1;/* Port P93 register */ unsigned char P9_4:1;/* Port P94 register */ unsigned char P9_5:1;/* Port P95 register */ unsigned char P9_6:1;/* Port P96 register */ unsigned char P9_7:1;/* Port P97 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P8 direction register //0x03f2 ------------------------------------------------------*/ union st_pd8 { /* union PD8 */ struct { /* Bit Access */ unsigned char PD8_0:1;/* Port P80 direction register */ unsigned char PD8_1:1;/* Port P81 direction register */ unsigned char PD8_2:1;/* Port P82 direction register */ unsigned char PD8_3:1;/* Port P83 direction register */ unsigned char PD8_4:1;/* Port P84 direction register */ unsigned char :1;/* Nothing assigned */ unsigned char PD8_6:1;/* Port P86 direction register */ unsigned char PD8_7:1;/* Port P87 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P9 direction register //0x03f3 ------------------------------------------------------*/ union st_pd9 { /* union PD9 */ struct { /* Bit Access */ unsigned char PD9_0:1;/* Port P90 direction register */ unsigned char PD9_1:1;/* Port P91 direction register */ unsigned char PD9_2:1;/* Port P92 direction register */ unsigned char PD9_3:1;/* Port P93 direction register */ unsigned char PD9_4:1;/* Port P94 direction register */ unsigned char PD9_5:1;/* Port P95 direction register */ unsigned char PD9_6:1;/* Port P96 direction register */ unsigned char PD9_7:1;/* Port P97 direction register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P10 register //0x03f4 ------------------------------------------------------*/ union st_p10 { /* union P10 */ struct { /* Bit Access */ unsigned char P10_0:1;/* Port P100 register */ unsigned char P10_1:1;/* Port P101 register */ unsigned char P10_2:1;/* Port P102 register */ unsigned char P10_3:1;/* Port P103 register */ unsigned char P10_4:1;/* Port P104 register */ unsigned char P10_5:1;/* Port P105 register */ unsigned char P10_6:1;/* Port P106 register */ unsigned char P10_7:1;/* Port P107 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P11 register //0x03f5 ------------------------------------------------------*/ union st_p11 { /* union P11 */ struct { /* Bit Access */ unsigned char P11_0:1;/* Port P110 register */ unsigned char P11_1:1;/* Port P111 register */ unsigned char P11_2:1;/* Port P112 register */ unsigned char P11_3:1;/* Port P113 register */ unsigned char P11_4:1;/* Port P114 register */ unsigned char P11_5:1;/* Port P115 register */ unsigned char P11_6:1;/* Port P116 register */ unsigned char P11_7:1;/* Port P117 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P10 direction register //0x03f6 ------------------------------------------------------*/ union st_pd10 { /* union PD10 */ struct { /* Bit Access */ unsigned char PD10_0:1;/* Port P100 direction register */ unsigned char PD10_1:1;/* Port P101 direction register */ unsigned char PD10_2:1;/* Port P102 direction register */ unsigned char PD10_3:1;/* Port P103 direction register */ unsigned char PD10_4:1;/* Port P104 direction register */ unsigned char PD10_5:1;/* Port P105 direction register */ unsigned char PD10_6:1;/* Port P106 direction register */ unsigned char PD10_7:1;/* Port P107 direction register */ } BIT; /* */ char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P11 direction register //0x03f7 ------------------------------------------------------*/ union st_pd11 { /* union PD11 */ struct { /* Bit Access */ unsigned char PD11_0:1;/* Port P110 direction register */ unsigned char PD11_1:1;/* Port P111 direction register */ unsigned char PD11_2:1;/* Port P112 direction register */ unsigned char PD11_3:1;/* Port P113 direction register */ unsigned char PD11_4:1;/* Port P114 direction register */ unsigned char PD11_5:1;/* Port P115 direction register */ unsigned char PD11_6:1;/* Port P116 direction register */ unsigned char PD11_7:1;/* Port P117 direction register */ } BIT; /* */ char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P12 register //0x03f8 ------------------------------------------------------*/ union st_p12 { /* union P12 */ struct { /* Bit Access */ unsigned char P12_0:1;/* Port P120 register */ unsigned char P12_1:1;/* Port P121 register */ unsigned char P12_2:1;/* Port P122 register */ unsigned char P12_3:1;/* Port P123 register */ unsigned char P12_4:1;/* Port P124 register */ unsigned char P12_5:1;/* Port P125 register */ unsigned char P12_6:1;/* Port P126 register */ unsigned char P12_7:1;/* Port P127 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P13 register //0x03f9 ------------------------------------------------------*/ union st_p13 { /* union P13 */ struct { /* Bit Access */ unsigned char P13_0:1;/* Port P130 register */ unsigned char P13_1:1;/* Port P131 register */ unsigned char P13_2:1;/* Port P132 register */ unsigned char P13_3:1;/* Port P133 register */ unsigned char P13_4:1;/* Port P134 register */ unsigned char P13_5:1;/* Port P135 register */ unsigned char P13_6:1;/* Port P136 register */ unsigned char P13_7:1;/* Port P137 register */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P12 direction register //0x03fa ------------------------------------------------------*/ union st_pd12 { /* union PD12 */ struct { /* Bit Access */ unsigned char PD12_0:1;/* Port P120 direction register */ unsigned char PD12_1:1;/* Port P121 direction register */ unsigned char PD12_2:1;/* Port P122 direction register */ unsigned char PD12_3:1;/* Port P123 direction register */ unsigned char PD12_4:1;/* Port P124 direction register */ unsigned char PD12_5:1;/* Port P125 direction register */ unsigned char PD12_6:1;/* Port P126 direction register */ unsigned char PD12_7:1;/* Port P127 direction register */ } BIT; /* */ char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port P13 direction register //0x03fb ------------------------------------------------------*/ union st_pd13 { /* union PD13 */ struct { /* Bit Access */ unsigned char PD13_0:1;/* Port P130 direction register */ unsigned char PD13_1:1;/* Port P131 direction register */ unsigned char PD13_2:1;/* Port P132 direction register */ unsigned char PD13_3:1;/* Port P133 direction register */ unsigned char PD13_4:1;/* Port P134 direction register */ unsigned char PD13_5:1;/* Port P135 direction register */ unsigned char PD13_6:1;/* Port P136 direction register */ unsigned char PD13_7:1;/* Port P137 direction register */ } BIT; /* */ char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Pull-up control register 0 //0x03fc ------------------------------------------------------*/ union st_pur0 { /* union PUR0 */ struct { /* Bit Access */ unsigned char PU00:1;/* P00 to P03 pull-up */ unsigned char PU01:1;/* P04 to P07 pull-up */ unsigned char PU02:1;/* P10 to P13 pull-up */ unsigned char PU03:1;/* P14 to P17 pull-up */ unsigned char PU04:1;/* P20 to P23 pull-up */ unsigned char PU05:1;/* P24 to P27 pull-up */ unsigned char PU06:1;/* P30 to P33 pull-up */ unsigned char PU07:1;/* P34 to P37 pull-up */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Pull-up control register 1 //0x03fd ------------------------------------------------------*/ union st_pur1 { /* union PUR1 */ struct { /* Bit Access */ unsigned char PU10:1;/* P40 to P43 pull-up */ unsigned char PU11:1;/* P44 to P47 pull-up */ unsigned char PU12:1;/* P50 to P53 pull-up */ unsigned char PU13:1;/* P54 to P57 pull-up */ unsigned char PU14:1;/* P60 to P63 pull-up */ unsigned char PU15:1;/* P64 to P67 pull-up */ unsigned char PU16:1;/* P70 to P73 pull-up (Except P70,P71 ; P70,P71 -> N-channel open drain ports)*/ unsigned char PU17:1;/* P74 to P77 pull-up */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Pull-up control register 2 //0x03fe ------------------------------------------------------*/ union st_pur2 { /* union PUR2 */ struct { /* Bit Access */ unsigned char PU20:1;/* P80 to P83 pull-up */ unsigned char PU21:1;/* P84 to P87 pull-up (Except P85) */ unsigned char PU22:1;/* P90 to P93 pull-up */ unsigned char PU23:1;/* P94 to P97 pull-up */ unsigned char PU24:1;/* P100 to P103 pull-up */ unsigned char PU25:1;/* P104 to P107 pull-up */ unsigned char :1;/* Nothing assigned */ unsigned char :1;/* Nothing assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /*------------------------------------------------------ Port control register //0x03ff ------------------------------------------------------*/ union st_pcr { /* union PCR2 */ struct { /* Bit Access */ unsigned char PCR0:1;/* Port P1 control register */ unsigned char :1;/* Nothing assigned */ unsigned char :1;/* Nothing assigned */ unsigned char :1;/* Nothing assigned */ unsigned char :1;/* Nothing assigned */ unsigned char :1;/* Nothing assigned */ unsigned char :1;/* Nothing assigned */ unsigned char :1;/* Nothing assigned */ } BIT; /* */ unsigned char BYTE; /* Byte Access */ }; /* */ /* Processor mode register 0 */ #define PM0 (*(volatile union st_pm0 *)(0x0004)) /* Processor mode register 1 */ #define PM1 (*(volatile union st_pm1 *)(0x0005)) /* System clock control register 0 */ #define CM0 (*(volatile union st_cm0 *)(0x0006)) /* System clock control register 1 */ #define CM1 (*(volatile union st_cm1 *)(0x0007)) /* Chip select control register */ #define CSR (*(volatile union st_csr *)(0x0008)) /* Address match interrupt enable register */ #define AIER (*(volatile union st_aier *)(0x0009)) /* Protect register */ #define PRCR (*(volatile union st_prcr *)(0x000A)) /* Data bank register */ #define DBR (*(volatile union st_dbr *)(0x000B)) /* Oscillation stop detection register */ #define CM2 (*(volatile union st_cm2 *)(0x000C)) /* Watchdog timer start register */ #define WDTS (*(volatile char *)(0x000E)) /* Watchdog timer control register */ #define WDC (*(volatile union st_wdc *)(0x000F)) /* Address match interrupt register 0 */ #define RMAD0 (*(volatile union st_rmad0 *)(0x0010)) /* Address match interrupt register 1 */ #define RMAD1 (*(volatile union st_rmad1 *)(0x0014)) /* Voltage detection register 1 */ #define VCR1 (*(volatile union st_vcr1 *)(0x0019)) /* Voltage detection register 2 */ #define VCR2 (*(volatile union st_vcr2 *)(0x001A)) /* Chip select expansion control register */ #define CSE (*(volatile union st_cse *)(0x001B)) /* PLC control register 0 */ #define PLC0 (*(volatile union st_plc0 *)(0x001C)) /* Processor mode register 2 */ #define PM2 (*(volatile union st_pm2 *)(0x001E)) /* Power supply down detection register */ #define D4INT (*(volatile union st_d4int *)(0x001F)) /* DMA0 source pointer */ #define SAR0 (*(volatile union st_sar0 *)(0x0020)) /* DMA0 destination pointer */ #define DAR0 (*(volatile union st_dar0 *)(0x0024)) /* DMA0 transfer counter */ #define TCR0 (*(volatile union st_tcr0 *)(0x0028)) /* DMA0 control register */ #define DM0CON (*(volatile union st_dm0con *)(0x002C)) /* DMA1 source pointer */ #define SAR1 (*(volatile union st_sar1 *)(0x0030)) /* DMA1 destination pointer */ #define DAR1 (*(volatile union st_dar1 *)(0x0034)) /* DMA1 transfer counter */ #define TCR1 (*(volatile union st_tcr1 *)(0x0038)) /* DMA1 control register */ #define DM1CON (*(volatile union st_dm1con *)(0x003c)) /* INT3~ interrupt control register */ #define INT3IC (*(volatile union st_icr *)(0x0044)) /* Timer B5 interrupt control register */ #define TB5IC (*(volatile union st_icr1 *)(0x0045)) /* Timer B4 interrupt control register */ #define TB4IC (*(volatile union st_icr1 *)(0x0046)) /* Timer B3 interrupt control register */ #define TB3IC (*(volatile union st_icr1 *)(0x0047)) /* UART1 BUS collision detection interrupt control register */ #define U1BCNIC (*(volatile union st_icr1 *)(0x0046)) /* UART0 BUS collision detection interrupt control register */ #define U0BCNIC (*(volatile union st_icr1 *)(0x0047)) /* SI/O4 interrupt control register */ #define S4IC (*(volatile union st_icr *)(0x0048)) /* SI/O3 interrupt control register */ #define S3IC (*(volatile union st_icr *)(0x0049)) /* INT5~ interrupt control register */ #define INT5IC (*(volatile union st_icr *)(0x0048)) /* INT4~ interrupt control register */ #define INT4IC (*(volatile union st_icr *)(0x0049)) /* Bus collision detection interrupt control register */ #define BCNIC (*(volatile union st_bcnic *)(0x004a)) /* DMA0 interrupt control register */ #define DM0IC (*(volatile union st_dm0ic *)(0x004b)) /* DMA1 interrupt control register */ #define DM1IC (*(volatile union st_icr1 *)(0x004c)) /* Key input interrupt control register */ #define KUPIC (*(volatile union st_icr1 *)(0x004D)) /* A/D conversion interrupt control register */ #define ADIC (*(volatile union st_icr1 *)(0x004E)) /* UART2 transmit interrupt control register */ #define S2TIC (*(volatile union st_icr1 *)(0x004F)) /* UART2 receive interrupt control register */ #define S2RIC (*(volatile union st_icr1 *)(0x0050)) /* UART0 transmit interrupt control register */ #define S0TIC (*(volatile union st_icr1 *)(0x0051)) /* UART0 receive interrupt control register */ #define S0RIC (*(volatile union st_icr1 *)(0x0052)) /* UART1 transmit interrupt control register */ #define S1TIC (*(volatile union st_icr1 *)(0x0053)) /* UART1 receive interrupt control register */ #define S1RIC (*(volatile union st_icr1 *)(0x0054)) /* Timer A0 interrupt control register */ #define TA0IC (*(volatile union st_icr1 *)(0x0055)) /* Timer A1 interrupt control register */ #define TA1IC (*(volatile union st_icr1 *)(0x0056)) /* Timer A2 interrupt control register */ #define TA2IC (*(volatile union st_icr1 *)(0x0057)) /* Timer A3 interrupt control register */ #define TA3IC (*(volatile union st_icr1 *)(0x0058)) /* Timer A4 interrupt control register */ #define TA4IC (*(volatile union st_icr1 *)(0x0059)) /* Timer B0 interrupt control register */ #define TB0IC (*(volatile union st_icr1 *)(0x005A)) /* Timer B1 interrupt control register */ #define TB1IC (*(volatile union st_icr1 *)(0x005B)) /* Timer B2 interrupt control register */ #define TB2IC (*(volatile union st_icr1 *)(0x005C)) /* INT0~ interrupt control register */ #define INT0IC (*(volatile union st_icr *)(0x005D)) /* INT1~ interrupt control register */ #define INT1IC (*(volatile union st_icr *)(0x005E)) /* INT2~ interrupt control register */ #define INT2IC (*(volatile union st_icr *)(0x005F)) /* Flash identification register */ #define FIDR (*(volatile union st_fidr *)(0x01b4)) /* Flash memory control register 1 */ #define FMR1 (*(volatile union st_fmr1 *)(0x01b5)) /* Flash memory control register 0 */ #define FMR0 (*(volatile union st_fmr0 *)(0x01b7)) /* Address match interrupt register 2 */ #define RMAD2 (*(volatile union st_rmad2 *)(0x01b8)) /* Address match interrupt enable register 2 */ #define AIER2 (*(volatile union st_aier2 *)(0x01bb)) /* Address match interrupt register 3 */ #define RMAD3 (*(volatile union st_rmad3 *)(0x01bc)) /* Peripheral clock select register */ #define PCLKR (*(volatile union st_pclkr *)(0x025e)) /* Timer B3,4,5 count start flag */ #define TBSR (*(volatile union st_tbsr *)(0x0340)) /******************************************************** * declare SFR short * ********************************************************/ /*-------------------------------------------------------- Timer registers : Read and write data in 16-bit units. --------------------------------------------------------*/ /* Timer A1-1 register */ #define TA1_1 (*(volatile unsigned short *)(0x0342)) /* Timer A2-1 register */ #define TA2_1 (*(volatile unsigned short *)(0x0344)) /* Timer A4-1 register */ #define TA4_1 (*(volatile unsigned short *)(0x0346)) /* Three-phase PWM control regester 0 */ #define INVC0 (*(volatile union st_invc0 *)(0x0348)) /* Three-phase PWM control register 1 */ #define INVC1 (*(volatile union st_invc1 *)(0x0349)) /* Three-phase output buffer register 0 */ #define IDB0 (*(volatile union st_idb0 *)(0x034a)) /* Three-phase output buffer register 1 */ #define IDB1 (*(volatile union st_idb1 *)(0x034b)) /*------------------------------------------------------ Dead time timer ; Use "MOV" instruction when writing to this register. ------------------------------------------------------*/ /* Dead time timer */ #define DTT (*(volatile unsigned char *)(0x034c)) /*------------------------------------------------------------------ Timer B2 interrupt occurrences frequency set counter ; Use "MOV" instruction when writing to this register. -------------------------------------------------------------------*/ /* Timer B2 interrupt occurrences frequency set counter */ #define ICTB2 (*(volatile unsigned char *)(0x034d)) /* Timer B3 register */ #define TB3 (*(volatile unsigned short *)(0x0350)) /* Timer B4 register */ #define TB4 (*(volatile unsigned short *)(0x0352)) /* Timer B5 register */ #define TB5 (*(volatile unsigned short *)(0x0354)) /* Timer B3 mode register */ #define TB3MR (*(volatile union st_tmr *)(0x035b)) /* Timer B4 mode register */ #define TB4MR (*(volatile union st_tmr *)(0x035c)) /* Timer B5 mode register */ #define TB5MR (*(volatile union st_tmr *)(0x035d)) /* Interrupt request cause select register 2 */ #define IFSR2A (*(volatile union st_ifsr2a *)(0x035e)) /* Interrupt cause select register */ #define IFSR (*(volatile union st_ifsr *)(0x035f)) /* SI/O3i transmit/receive register (i=3,4)*/ #define S3TRR (*(volatile unsigned char *)(0x0360)) /* SI/O3 control register */ #define S3C (*(volatile union st_s3c *)(0x0362)) /* SI/O3 bit rate generator (Use "MOV" instruction when writing to these registers)*/ #define S3BRG (*(volatile unsigned char *)(0x0363)) /* SI/O4 transmit/receive register */ #define S4TRR (*(volatile unsigned char *)(0x0364)) /* SI/O4 control register */ #define S4C (*(volatile union st_s4c *)(0x0366)) /* SI/O4 bit rate generator */ #define S4BRG (*(volatile unsigned char *)(0x0367)) /* UART0 special mode register 4 */ #define U0SMR4 (*(volatile union st_u0smr4 *)(0x036c)) /* UART0 special mode register 3 */ #define U0SMR3 (*(volatile union st_u0smr3 *)(0x036d)) /* UART0 special mode register 2 */ #define U0SMR2 (*(volatile union st_u0smr2 *)(0x036e)) /* UART0 special mode register */ #define U0SMR (*(volatile union st_u0smr *)(0x036f)) /* UART1 special mode register 4 */ #define U1SMR4 (*(volatile union st_u1smr4 *)(0x0370)) /* UART1 special mode register 3 */ #define U1SMR3 (*(volatile union st_u1smr3 *)(0x0371)) /* UART1 special mode register 2 */ #define U1SMR2 (*(volatile union st_u1smr2 *)(0x0372)) /* UART1 special mode register */ #define U1SMR (*(volatile union st_u1smr *)(0x0373)) /* UART2 special mode register 4 */ #define U2SMR4 (*(volatile union st_u2smr4 *)(0x0374)) /* UART2 special mode register 3 */ #define U2SMR3 (*(volatile union st_u2smr3 *)(0x0375)) /* UART2 special mode register 2 */ #define U2SMR2 (*(volatile union st_u2smr2 *)(0x0376)) /* UART2 special mode register */ #define U2SMR (*(volatile union st_u2smr *)(0x0377)) /* UART2 transmit/receive mode register */ #define U2MR (*(volatile union st_u2mr *)(0x0378)) /* UART2 bit rate generator */ #define U2BRG (*(volatile unsigned char *)(0x0379)) /* UART2 transmit buffer register */ #define U2TB (*(volatile union st_u2tb *)(0x037a)) /* UART2 transmit/receive control register 0 */ //#pragma ADDRESS u2c0_addr 037cH #define U2C0 (*(volatile union st_u2c0 *)(0x037c)) /* UART2 transmit/receive control register 1 */ #define U2C1 (*(volatile union st_u2c1 *)(0x037d)) /* UART2 receive buffer register */ #define U2RB (*(volatile union st_u2rb *)(0x037e)) /* Count start flag */ #define TABSR (*(volatile union st_tabsr *)(0x0380)) /* Clock prescaler reset flag */ #define CPSRF (*(volatile union st_cpsrf *)(0x0381)) /* One-shot start flag */ #define ONSF (*(volatile union st_onsf *)(0x0382)) /* Trigger select register */ #define TRGSR (*(volatile union st_trgsr *)(0x0383)) /* Up/down flag (Use "MOV" instruction when writing to this register.)*/ #define UDF (*(volatile unsigned char *)(0x0384)) /* Timer A0 register */ #define TA0 (*(volatile unsigned short *)(0x0386)) /* Timer A1 register */ #define TA1 (*(volatile unsigned short *)(0x0388)) /* Timer A2 register */ #define TA2 (*(volatile unsigned short *)(0x038a)) /* Timer A3 register */ #define TA3 (*(volatile unsigned short *)(0x038c)) /* Timer A4 register */ #define TA4 (*(volatile unsigned short *)(0x038e)) /* Timer B0 register */ #define TB0 (*(volatile unsigned short *)(0x0390)) /* Timer B1 register */ #define TB1 (*(volatile unsigned short *)(0x0392)) /* Timer B2 register */ #define TB2 (*(volatile unsigned short *)(0x0394)) /* Timer A0 mode register */ #define TA0MR (*(volatile union st_tmr *)(0x0396)) /* Timer A1 mode register */ #define TA1MR (*(volatile union st_tmr *)(0x0397)) /* Timer A2 mode register */ #define TA2MR (*(volatile union st_tmr *)(0x0398)) /* Timer A3 mode register */ #define TA3MR (*(volatile union st_tmr *)(0x0399)) /* Timer A4 mode register */ #define TA4MR (*(volatile union st_tmr *)(0x039A)) /* Timer B0 mode register */ #define TB0MR (*(volatile union st_tmr *)(0x039b)) /* Timer B1 mode register */ #define TB1MR (*(volatile union st_tmr *)(0x039c)) /* Timer B2 mode register */ #define TB2MR (*(volatile union st_tmr *)(0x039d)) /* Timer B2 special mode register */ #define TB2SC (*(volatile union st_tb2sc *)(0x039e)) /* UART0 transmit/receive mode register */ #define U0MR (*(volatile union st_u0mr *)(0x03a0)) /* UART0 bit rate generator (Use "MOV" instruction when writing to these registers.)*/ #define U0BRG (*(volatile unsigned char *)(0x03a1)) /* UART0 transmit buffer register */ #define U0TB (*(volatile union st_u0tb *)(0x03a2)) /* UART0 transmit/receive control register 0 */ #define U0C0 (*(volatile union st_u0c0 *)(0x03a4)) /* UART0 transmit/receive control register 1 */ #define U0C1 (*(volatile union st_u0c1 *)(0x03a5)) /* UART0 receive buffer register */ #define U0RB (*(volatile union st_u0rb *)(0x03a6)) /* UART1 transmit/receive mode register */ #define U1MR (*(volatile union st_u1mr *)(0x03a8)) /* UART1 bit rate generator */ #define U1BRG (*(volatile unsigned char *)(0x03a9)) /* UART1 transmit buffer register */ #define U1TB (*(volatile union st_u1tb *)(0x03aa)) /* UART1 transmit/receive control register 0 */ #define U1C0 (*(volatile union st_u1c0 *)(0x03ac)) /* UART1 transmit/receive control register 1 */ #define U1C1 (*(volatile union st_u1c1 *)(0x03ad)) /* UART1 receive buffer register */ #define U1RB (*(volatile union st_u1rb *)(0x03ae)) /* UART transmit/receive control register 2 */ #define UCON (*(volatile union st_ucon *)(0x03b0)) /* DMA0 cause select register */ #define DM0SL (*(volatile union st_dm0sl *)(0x03b8)) /* DMA1 cause select register */ #define DM1SL (*(volatile union st_dm1sl *)(0x03ba)) /* CRC data register */ #define CRCD (*(volatile union st_crcd *)(0x03bc)) /* CRC input register */ #define CRCIN (*(volatile unsigned char *)(0x03be)) /* A/D register 0 */ #define AD0 (*(volatile union st_ad0 *)(0x03c0)) /* A/D register 1 */ #define AD1 (*(volatile union st_ad1 *)(0x03c2)) /* A/D register 2 */ #define AD2 (*(volatile union st_ad2 *)(0x03c4)) /* A/D register 3 */ #define AD3 (*(volatile union st_ad3 *)(0x03c6)) /* A/D register 4 */ #define AD4 (*(volatile union st_ad4 *)(0x03c8)) /* A/D register 5 */ #define AD5 (*(volatile union st_ad5 *)(0x03ca)) /* A/D register 6 */ #define AD6 (*(volatile union st_ad6 *)(0x03cc)) /* A/D register 7 */ #define AD7 (*(volatile union st_ad7 *)(0x03ce)) /* A/D control register 2 */ #define ADCON2 (*(volatile union st_adcon2 *)(0x03d4)) /* A/D control register 0 */ #define ADCON0 (*(volatile union st_adcon0 *)(0x03d6)) /* A/D control register 1 */ #define ADCON1 (*(volatile union st_adcon1 *)(0x03d7)) /* D/A register 0 */ #define DA0 (*(volatile unsigned char *)(0x03d8)) /* D/A register 1 */ #define DA1 (*(volatile unsigned char *)(0x03da)) /* D/A control register */ #define DACON (*(volatile union st_dacon *)(0x03dc)) /* Port P14 control register */ #define PC14 (*(volatile union st_pc14 *)(0x03de)) /* Pull-up control register 3 */ #define PUR3 (*(volatile union st_pur3 *)(0x03df)) /* Port P0 register */ #define P0 (*(volatile union st_p0 *)(0x03e0)) /* Port P1 register */ #define P1 (*(volatile union st_p1 *)(0x03e1)) /* Port P0 direction register */ #define PD0 (*(volatile union st_pd0 *)(0x03e2)) /* Port P1 direction register */ #define PD1 (*(volatile union st_pd1 *)(0x03e3)) /* Port P2 register */ #define P2 (*(volatile union st_p2 *)(0x03e4)) /* Port P3 register */ #define P3 (*(volatile union st_p3 *)(0x03e5)) /* Port P2 direction register */ #define PD2 (*(volatile union st_pd2 *)(0x03e6)) /* Port P3 direction register */ #define PD3 (*(volatile union st_pd3 *)(0x03e7)) /* Port P4 register */ #define P4 (*(volatile union st_p4 *)(0x03e8)) /* Port P5 register */ #define P5 (*(volatile union st_p5 *)(0x03e9)) /* Port P4 direction register */ #define PD4 (*(volatile union st_pd4 *)(0x03ea)) /* Port P5 direction register */ #define PD5 (*(volatile union st_pd5 *)(0x03eb)) /* Port P6 register */ #define P6 (*(volatile union st_p6 *)(0x03ec)) /* Port P7 register */ #define P7 (*(volatile union st_p7 *)(0x03ed)) /* Port P6 direction register */ #define PD6 (*(volatile union st_pd6 *)(0x03ee)) /* Port P7 direction register */ #define PD7 (*(volatile union st_pd7 *)(0x03ef)) /* Port P8 register */ #define P8 (*(volatile union st_p8 *)(0x03f0)) /* Port P9 register */ #define P9 (*(volatile union st_p9 *)(0x03f1)) /* Port P8 direction register */ #define PD8 (*(volatile union st_pd8 *)(0x03f2)) /* Port P9 direction register */ #define PD9 (*(volatile union st_pd9 *)(0x03f3)) /* Port P10 register */ #define P10 (*(volatile union st_p10 *)(0x03f4)) /* Port P11 register */ #define P11 (*(volatile union st_p11 *)(0x03f5)) /* Port P10 direction register */ #define PD10 (*(volatile union st_pd10 *)(0x03f6)) /* Port P11 direction register */ #define PD11 (*(volatile union st_pd11 *)(0x03f7)) /* Port P12 register */ #define P12 (*(volatile union st_p12 *)(0x03f8)) /* Port P13 register */ #define P13 (*(volatile union st_p13 *)(0x03f9)) /* Port P12 direction register */ #define PD12 (*(volatile union st_pd12 *)(0x03fa)) /* Port P13 direction register */ #define PD13 (*(volatile union st_pd13 *)(0x03f7)) /* Pull-up control register 0 */ #define PUR0 (*(volatile union st_pur0 *)(0x03fc)) /* Pull-up control register 1 */ #define PUR1 (*(volatile union st_pur1 *)(0x03fd)) /* Pull-up control register 2 */ #define PUR2 (*(volatile union st_pur2 *)(0x03fe)) /* Port control register */ #define PCR (*(volatile union st_pcr *)(0x03ff)) #endif /* __IOM16C62P_H__ */ tinyos-2.1.2+dfsg/tos/chips/m16c60/62p/m16c60.h000066400000000000000000000040441207233610700203060ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * 62P specific includes and defines in the M16C/60 series. * * @author Henrik Makitaavola */ #ifndef __M16C60_H__ #define __M16C60_H__ #include "iom16c62p.h" /* ADC Precision Settings */ enum { M16c60_ADC_PRECISION_10BIT = 1, M16c60_ADC_PRECISION_8BIT = 0, }; #endif // __M16C60_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/65/000077500000000000000000000000001207233610700170425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/65/iom16c65.h000066400000000000000000005207571207233610700205040ustar00rootroot00000000000000/*--------------------------------------------------------------------------------*/ /* * Copyright (c) 2010 Eistec AB. * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * *--------------------------------------------------------------------------------*/ #ifndef __IOM16C65_H__ #define __IOM16C65_H__ /*--------------------------------------------------------------------------------*/ /* General register definitions */ union register8_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; union register16_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; unsigned char bit8 :1; unsigned char bit9 :1; unsigned char bit10 :1; unsigned char bit11 :1; unsigned char bit12 :1; unsigned char bit13 :1; unsigned char bit14 :1; unsigned char bit15 :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; } BYTES; unsigned short WORD; }; union register32_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; unsigned char bit8 :1; unsigned char bit9 :1; unsigned char bit10 :1; unsigned char bit11 :1; unsigned char bit12 :1; unsigned char bit13 :1; unsigned char bit14 :1; unsigned char bit15 :1; unsigned char bit16 :1; unsigned char bit17 :1; unsigned char bit18 :1; unsigned char bit19 :1; unsigned char bit20 :1; unsigned char bit21 :1; unsigned char bit22 :1; unsigned char bit23 :1; unsigned char bit24 :1; unsigned char bit25 :1; unsigned char bit26 :1; unsigned char bit27 :1; unsigned char bit28 :1; unsigned char bit29 :1; unsigned char bit30 :1; unsigned char bit31 :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; unsigned char BYTE2; unsigned char BYTE3; } BYTES; struct { unsigned short WORD0; unsigned short WORD1; } WORDS; unsigned long dWORD; }; /*--------------------------------------------------------------------------------*/ /* Processor Mode Register 0 */ union pm0_t { struct { unsigned char PM00 :1; unsigned char PM01 :1; unsigned char PM02 :1; unsigned char PM03 :1; unsigned char PM04 :1; unsigned char PM05 :1; unsigned char PM06 :1; unsigned char PM07 :1; } BIT; unsigned char BYTE; }; #define PM0 (*(volatile union pm0_t *)(0x0004)) /*--------------------------------------------------------------------------------*/ /* Processor Mode Register 1 */ union pm1_t { struct { unsigned char PM10 :1; unsigned char PM11 :1; unsigned char PM12 :1; unsigned char PM13 :1; unsigned char PM14 :1; unsigned char PM15 :1; unsigned char bit6 :1; unsigned char PM17 :1; } BIT; unsigned char BYTE; }; #define PM1 (*(volatile union pm1_t *)(0x0005)) /*--------------------------------------------------------------------------------*/ /* System Clock Control Register 0 */ union cm0_t { struct { unsigned char CM00 :1; unsigned char CM01 :1; unsigned char CM02 :1; unsigned char CM03 :1; unsigned char CM04 :1; unsigned char CM05 :1; unsigned char CM06 :1; unsigned char CM07 :1; } BIT; unsigned char BYTE; }; #define CM0 (*(volatile union cm0_t *)(0x0006)) /*--------------------------------------------------------------------------------*/ /* System Clock Control Register 1 */ union cm1_t { struct { unsigned char CM10 :1; unsigned char CM11 :1; unsigned char bit2 :1; unsigned char CM13 :1; unsigned char CM14 :1; unsigned char CM15 :1; unsigned char CM16 :1; unsigned char CM17 :1; } BIT; unsigned char BYTE; }; #define CM1 (*(volatile union cm1_t *)(0x0007)) /*--------------------------------------------------------------------------------*/ /* Chip Select Control Register */ union csr_t { struct { unsigned char CS0 :1; unsigned char CS1 :1; unsigned char CS2 :1; unsigned char CS3 :1; unsigned char CS0W :1; unsigned char CS1W :1; unsigned char CS2W :1; unsigned char CS3W :1; } BIT; unsigned char BYTE; }; #define CSR (*(volatile union csr_t *)(0x0008)) /*--------------------------------------------------------------------------------*/ /* External Area Recovery Cycle Control Register */ union ewr_t { struct { unsigned char EWR0 :1; unsigned char EWR1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define EWR (*(volatile union ewr_t *)(0x0009)) /*--------------------------------------------------------------------------------*/ /* Protect Register */ union prcr_t { struct { unsigned char PRC0 :1; unsigned char PRC1 :1; unsigned char PRC2 :1; unsigned char PRC3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char PRC6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PRCR (*(volatile union prcr_t *)(0x000A)) /*--------------------------------------------------------------------------------*/ /* Data Bank Register */ union dbr_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char OFS :1; unsigned char BSR0 :1; unsigned char BSR1 :1; unsigned char BSR2 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define DBR (*(volatile union dbr_t *)(0x000B)) /*--------------------------------------------------------------------------------*/ /* Oscillation Stop Detection Register */ union cm2_t { struct { unsigned char CM20 :1; unsigned char CM21 :1; unsigned char CM22 :1; unsigned char CM23 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char CM27 :1; } BIT; unsigned char BYTE; }; #define CM2 (*(volatile union cm2_t *)(0x000C)) /*--------------------------------------------------------------------------------*/ /* Program 2 Area Control Register */ union prg2c_t { struct { unsigned char PRG2C0 :1; unsigned char IRON :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PRG2C (*(volatile union prg2c_t *)(0x0010)) /*--------------------------------------------------------------------------------*/ /* External Area Wait Control Expansion Register */ union ewc_t { struct { unsigned char EWC00 :1; unsigned char EWC01 :1; unsigned char EWC10 :1; unsigned char EWC11 :1; unsigned char EWC20 :1; unsigned char EWC21 :1; unsigned char EWC30 :1; unsigned char EWC31 :1; } BIT; unsigned char BYTE; }; #define EWC (*(volatile union ewc_t *)(0x0011)) /*--------------------------------------------------------------------------------*/ /* Peripheral Clock Select Register */ union pclkr_t { struct { unsigned char PCLK0 :1; unsigned char PCLK1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char PCLK5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PCLKR (*(volatile union pclkr_t *)(0x0012)) /*--------------------------------------------------------------------------------*/ /* Clock Prescaler Reset Flag */ union cpsrf_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char CPSR :1; } BIT; unsigned char BYTE; }; #define CPSRF (*(volatile union cpsrf_t *)(0x0015)) /*--------------------------------------------------------------------------------*/ /* Reset Source Determine Register */ union rstfr_t { struct { unsigned char CWR :1; unsigned char HWR :1; unsigned char SWR :1; unsigned char WDR :1; unsigned char LVD1R :1; unsigned char LVD2R :1; unsigned char OSDR :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RSTFR (*(volatile union rstfr_t *)(0x0018)) /*--------------------------------------------------------------------------------*/ /* Voltage Detector 2 Flag Register */ union vcr1_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char VC13 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define VCR1 (*(volatile union vcr1_t *)(0x0019)) /*--------------------------------------------------------------------------------*/ /* Voltage Detector Operation Enable Register */ union vcr2_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char VC25 :1; unsigned char VC26 :1; unsigned char VC27 :1; } BIT; unsigned char BYTE; }; #define VCR2 (*(volatile union vcr2_t *)(0x001A)) /*--------------------------------------------------------------------------------*/ /* Chip Select Expansion Control Register */ union cse_t { struct { unsigned char CSE00W :1; unsigned char CSE01W :1; unsigned char CSE10W :1; unsigned char CSE11W :1; unsigned char CSE20W :1; unsigned char CSE21W :1; unsigned char CSE30W :1; unsigned char CSE31W :1; } BIT; unsigned char BYTE; }; #define CSE (*(volatile union cse_t *)(0x001B)) /*--------------------------------------------------------------------------------*/ /* PLL Control Register 0 */ union plc0_t { struct { unsigned char PLC00 :1; unsigned char PLC01 :1; unsigned char PLC02 :1; unsigned char bit3 :1; unsigned char PLC04 :1; unsigned char PLC05 :1; unsigned char bit6 :1; unsigned char PLC07 :1; } BIT; unsigned char BYTE; }; #define PLC0 (*(volatile union plc0_t *)(0x001C)) /*--------------------------------------------------------------------------------*/ /* Processor Mode Register 2 */ union pm2_t { struct { unsigned char bit0 :1; unsigned char PM21 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char PM24 :1; unsigned char PM25 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PM2 (*(volatile union pm2_t *)(0x001E)) /*--------------------------------------------------------------------------------*/ /* 40 MHz On-Chip Oscillator Control Register 0 */ union fra0_t { struct { unsigned char FRA00 :1; unsigned char FRA01 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define FRA0 (*(volatile union fra0_t *)(0x0022)) /*--------------------------------------------------------------------------------*/ /* Voltage Monitor Function Select Register */ union vwce_t { struct { unsigned char VW12E :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define VWCE (*(volatile union vwce_t *)(0x0026)) /*--------------------------------------------------------------------------------*/ /* Voltage Detector 1 Level Select Register */ union vd1ls_t { struct { unsigned char VD1LS0 :1; unsigned char VD1LS1 :1; unsigned char VD1LS2 :1; unsigned char VD1LS3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define VD1LS (*(volatile union vd1ls_t *)(0x0028)) /*--------------------------------------------------------------------------------*/ /* Voltage Monitor 0 Control Register */ union vw0c_t { struct { unsigned char VW0C0 :1; unsigned char VW0C1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char VW0F0 :1; unsigned char VW0F1 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define VW0C (*(volatile union vw0c_t *)(0x002A)) /*--------------------------------------------------------------------------------*/ /* Voltage Monitor 1 Control Register */ union vw1c_t { struct { unsigned char VW1C0 :1; unsigned char VW1C1 :1; unsigned char VW1C2 :1; unsigned char VW1C3 :1; unsigned char VW1F0 :1; unsigned char VW1F1 :1; unsigned char VW1C6 :1; unsigned char VW1C7 :1; } BIT; unsigned char BYTE; }; #define VW1C (*(volatile union vw1c_t *)(0x002B)) /*--------------------------------------------------------------------------------*/ /* Voltage Monitor 2 Control Register */ union vw2c_t { struct { unsigned char VW2C0 :1; unsigned char VW2C1 :1; unsigned char VW2C2 :1; unsigned char VW2C3 :1; unsigned char VW2F0 :1; unsigned char VW2F1 :1; unsigned char VW2C6 :1; unsigned char VW2C7 :1; } BIT; unsigned char BYTE; }; #define VW2C (*(volatile union vw2c_t *)(0x002C)) /*--------------------------------------------------------------------------------*/ /* Interrupt Control Register 1 */ union icr1_t { struct { unsigned char ILVL0 :1; unsigned char ILVL1 :1; unsigned char ILVL2 :1; unsigned char IR :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; /*--------------------------------------------------------------------------------*/ /* Interrupt Control Register 2 */ union icr2_t { struct { unsigned char ILVL0 :1; unsigned char ILVL1 :1; unsigned char ILVL2 :1; unsigned char IR :1; unsigned char POL :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; /*--------------------------------------------------------------------------------*/ /* INT7 Interrupt Control Register */ #define INT7IC (*(volatile union icr2_t *)(0x0042)) /*--------------------------------------------------------------------------------*/ /* INT6 Interrupt Control Register */ #define INT6IC (*(volatile union icr2_t *)(0x0043)) /*--------------------------------------------------------------------------------*/ /* INT3 Interrupt Control Register */ #define INT3IC (*(volatile union icr2_t *)(0x0044)) /*--------------------------------------------------------------------------------*/ /* Timer B5 Interrupt Control Register */ #define TB5IC (*(volatile union icr1_t *)(0x0045)) /*--------------------------------------------------------------------------------*/ /* Timer B4 Interrupt Control Register */ #define TB4IC (*(volatile union icr1_t *)(0x0046)) /*--------------------------------------------------------------------------------*/ /* UART1 Bus Collision Detection Interrupt Control Register */ #define U1BCNIC (*(volatile union icr1_t *)(0x0046)) /*--------------------------------------------------------------------------------*/ /* Timer B3 Interrupt Control Register */ #define TB3IC (*(volatile union icr1_t *)(0x0047)) /*--------------------------------------------------------------------------------*/ /* UART0 Bus Collision Detection Interrupt Control Register */ #define U0BCNIC (*(volatile union icr1_t *)(0x0047)) /*--------------------------------------------------------------------------------*/ /* SI/O4 Interrupt Control Register */ #define S4IC (*(volatile union icr2_t *)(0x0048)) /*--------------------------------------------------------------------------------*/ /* INT5 Interrupt Control Register */ #define INT5IC (*(volatile union icr2_t *)(0x0048)) /*--------------------------------------------------------------------------------*/ /* SI/O3 Interrupt Control Register */ #define S3IC (*(volatile union icr2_t *)(0x0049)) /*--------------------------------------------------------------------------------*/ /* INT4 Interrupt Control Register */ #define INT4IC (*(volatile union icr2_t *)(0x0049)) /*--------------------------------------------------------------------------------*/ /* UART2 Bus Collision Detection Interrupt Control Register */ #define BCNIC (*(volatile union icr1_t *)(0x004A)) /*--------------------------------------------------------------------------------*/ /* DMA0 Interrupt Control Register */ #define DM0IC (*(volatile union icr1_t *)(0x004B)) /*--------------------------------------------------------------------------------*/ /* DMA1 Interrupt Control Register */ #define DM1IC (*(volatile union icr1_t *)(0x004C)) /*--------------------------------------------------------------------------------*/ /* Key Input Interrupt Control Register */ #define KUPIC (*(volatile union icr1_t *)(0x004D)) /*--------------------------------------------------------------------------------*/ /* A/D Conversion Interrupt Control Register */ #define ADIC (*(volatile union icr1_t *)(0x004E)) /*--------------------------------------------------------------------------------*/ /* UART2 Transmit Interrupt Control Register */ #define S2TIC (*(volatile union icr1_t *)(0x004F)) /*--------------------------------------------------------------------------------*/ /* UART2 Receive Interrupt Control Register */ #define S2RIC (*(volatile union icr1_t *)(0x0050)) /*--------------------------------------------------------------------------------*/ /* UART0 Transmit Interrupt Control Register */ #define S0TIC (*(volatile union icr1_t *)(0x0051)) /*--------------------------------------------------------------------------------*/ /* UART0 Receive Interrupt Control Register */ #define S0RIC (*(volatile union icr1_t *)(0x0052)) /*--------------------------------------------------------------------------------*/ /* UART1 Transmit Interrupt Control Register */ #define S1TIC (*(volatile union icr1_t *)(0x0053)) /*--------------------------------------------------------------------------------*/ /* UART1 Receive Interrupt Control Register */ #define S1RIC (*(volatile union icr1_t *)(0x0054)) /*--------------------------------------------------------------------------------*/ /* Timer A0 Interrupt Control Register */ #define TA0IC (*(volatile union icr1_t *)(0x0055)) /*--------------------------------------------------------------------------------*/ /* Timer A1 Interrupt Control Register */ #define TA1IC (*(volatile union icr1_t *)(0x0056)) /*--------------------------------------------------------------------------------*/ /* Timer A2 Interrupt Control Register */ #define TA2IC (*(volatile union icr1_t *)(0x0057)) /*--------------------------------------------------------------------------------*/ /* Timer A3 Interrupt Control Register */ #define TA3IC (*(volatile union icr1_t *)(0x0058)) /*--------------------------------------------------------------------------------*/ /* Timer A4 Interrupt Control Register */ #define TA4IC (*(volatile union icr1_t *)(0x0059)) /*--------------------------------------------------------------------------------*/ /* Timer B0 Interrupt Control Register */ #define TB0IC (*(volatile union icr1_t *)(0x005A)) /*--------------------------------------------------------------------------------*/ /* Timer B1 Interrupt Control Register */ #define TB1IC (*(volatile union icr1_t *)(0x005B)) /*--------------------------------------------------------------------------------*/ /* Timer B2 Interrupt Control Register */ #define TB2IC (*(volatile union icr1_t *)(0x005C)) /*--------------------------------------------------------------------------------*/ /* INT0 Interrupt Control Register */ #define INT0IC (*(volatile union icr2_t *)(0x005D)) /*--------------------------------------------------------------------------------*/ /* INT1 Interrupt Control Register */ #define INT1IC (*(volatile union icr2_t *)(0x005E)) /*--------------------------------------------------------------------------------*/ /* INT2 Interrupt Control Register */ #define INT2IC (*(volatile union icr2_t *)(0x005F)) /*--------------------------------------------------------------------------------*/ /* DMA2 Interrupt Control Register */ #define DM2IC (*(volatile union icr1_t *)(0x0069)) /*--------------------------------------------------------------------------------*/ /* DMA3 Interrupt Control Register */ #define DM3IC (*(volatile union icr1_t *)(0x006A)) /*--------------------------------------------------------------------------------*/ /* UART5 Bus Collision Detection Interrupt Control Register */ #define U5BCNIC (*(volatile union icr1_t *)(0x006B)) /*--------------------------------------------------------------------------------*/ /* CEC1 Interrupt Control Register */ #define CEC1IC (*(volatile union icr1_t *)(0x006B)) /*--------------------------------------------------------------------------------*/ /* UART5 Transmit Interrupt Control Register */ #define S5TIC (*(volatile union icr1_t *)(0x006C)) /*--------------------------------------------------------------------------------*/ /* CEC2 Interrupt Control Register */ #define CEC2IC (*(volatile union icr1_t *)(0x006C)) /*--------------------------------------------------------------------------------*/ /* UART5 Receive Interrupt Control Register */ #define S5RIC (*(volatile union icr1_t *)(0x006D)) /*--------------------------------------------------------------------------------*/ /* UART6 Bus Collision Detection Interrupt Control Register */ #define U6BCNIC (*(volatile union icr1_t *)(0x006E)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Periodic Interrupt Control Register */ #define RTCTIC (*(volatile union icr1_t *)(0x006E)) /*--------------------------------------------------------------------------------*/ /* UART6 Transmit Interrupt Control Register */ #define S6TIC (*(volatile union icr1_t *)(0x006F)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Compare Interrupt Control Register */ #define RTCCIC (*(volatile union icr1_t *)(0x006F)) /*--------------------------------------------------------------------------------*/ /* UART6 Receive Interrupt Control Register */ #define S6RIC (*(volatile union icr1_t *)(0x0070)) /*--------------------------------------------------------------------------------*/ /* UART7 Bus Collision Detection Interrupt Control Register */ #define U7BCNIC (*(volatile union icr1_t *)(0x0071)) /*--------------------------------------------------------------------------------*/ /* Remote Control Signal Receiver 0 Interrupt Control Register */ #define PMC0IC (*(volatile union icr1_t *)(0x0071)) /*--------------------------------------------------------------------------------*/ /* UART7 Transmit Interrupt Control Register */ #define S7TIC (*(volatile union icr1_t *)(0x0072)) /*--------------------------------------------------------------------------------*/ /* Remote Control Signal Receiver 1 Interrupt Control Register */ #define PMC1IC (*(volatile union icr1_t *)(0x0072)) /*--------------------------------------------------------------------------------*/ /* UART7 Receive Interrupt Control Register */ #define S7RIC (*(volatile union icr1_t *)(0x0073)) /*--------------------------------------------------------------------------------*/ /* I2C-bus Interface Interrupt Control Register */ #define IICIC (*(volatile union icr1_t *)(0x007B)) /*--------------------------------------------------------------------------------*/ /* SCL/SDA Interrupt Control Register */ #define SCLDAIC (*(volatile union icr1_t *)(0x007C)) /*--------------------------------------------------------------------------------*/ /* DMA0 Source Pointer */ #define SAR0 (*(volatile union register32_t *)(0x0180)) /*--------------------------------------------------------------------------------*/ /* DMA0 Destination Pointer */ #define DAR0 (*(volatile union register32_t *)(0x0184)) /*--------------------------------------------------------------------------------*/ /* DMA0 Transfer Counter */ #define TCR0 (*(volatile union register16_t *)(0x0188)) /*--------------------------------------------------------------------------------*/ /* DMA0 Control Register */ union dm0con_t { struct { unsigned char DMBIT :1; unsigned char DMASL :1; unsigned char DMAS :1; unsigned char DMAE :1; unsigned char DSD :1; unsigned char DAD :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define DM0CON (*(volatile union dm0con_t *)(0x018C)) /*--------------------------------------------------------------------------------*/ /* DMA1 Source Pointer */ #define SAR1 (*(volatile union register32_t *)(0x0190)) /*--------------------------------------------------------------------------------*/ /* DMA1 Destination Pointer */ #define DAR1 (*(volatile union register32_t *)(0x0194)) /*--------------------------------------------------------------------------------*/ /* DMA1 Transfer Counter */ #define TCR1 (*(volatile union register16_t *)(0x0198)) /*--------------------------------------------------------------------------------*/ /* DMA1 Control Register */ union dm1con_t { struct { unsigned char DMBIT :1; unsigned char DMASL :1; unsigned char DMAS :1; unsigned char DMAE :1; unsigned char DSD :1; unsigned char DAD :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define DM1CON (*(volatile union dm1con_t *)(0x019C)) /*--------------------------------------------------------------------------------*/ /* DMA2 Source Pointer */ #define SAR2 (*(volatile union register32_t *)(0x01A0)) /*--------------------------------------------------------------------------------*/ /* DMA2 Destination Pointer */ #define DAR2 (*(volatile union register32_t *)(0x01A4)) /*--------------------------------------------------------------------------------*/ /* DMA2 Transfer Counter */ #define TCR2 (*(volatile union register16_t *)(0x01A8)) /*--------------------------------------------------------------------------------*/ /* DMA2 Control Register */ union dm2con_t { struct { unsigned char DMBIT :1; unsigned char DMASL :1; unsigned char DMAS :1; unsigned char DMAE :1; unsigned char DSD :1; unsigned char DAD :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define DM2CON (*(volatile union dm2con_t *)(0x01AC)) /*--------------------------------------------------------------------------------*/ /* DMA3 Source Pointer */ #define SAR3 (*(volatile union register32_t *)(0x01B0)) /*--------------------------------------------------------------------------------*/ /* DMA3 Destination Pointer */ #define DAR3 (*(volatile union register32_t *)(0x01B4)) /*--------------------------------------------------------------------------------*/ /* DMA3 Transfer Counter */ #define TCR3 (*(volatile union register16_t *)(0x01B8)) /*--------------------------------------------------------------------------------*/ /* DMA3 Control Register */ union dm3con_t { struct { unsigned char DMBIT :1; unsigned char DMASL :1; unsigned char DMAS :1; unsigned char DMAE :1; unsigned char DSD :1; unsigned char DAD :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define DM3CON (*(volatile union dm3con_t *)(0x01BC)) /*--------------------------------------------------------------------------------*/ /* Timer B0-1 Register */ #define TB01 (*(volatile union register16_t *)(0x01C0)) /*--------------------------------------------------------------------------------*/ /* Timer B1-1 Register */ #define TB11 (*(volatile union register16_t *)(0x01C2)) /*--------------------------------------------------------------------------------*/ /* Timer B2-1 Register */ #define TB21 (*(volatile union register16_t *)(0x01C4)) /*--------------------------------------------------------------------------------*/ /* Pulse Period/Pulse Width Measurement Mode Function Select Register 1 */ union ppwfs1_t { struct { unsigned char PPWFS10 :1; unsigned char PPWFS11 :1; unsigned char PPWFS12 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PPWFS1 (*(volatile union ppwfs1_t *)(0x01C6)) /*--------------------------------------------------------------------------------*/ /* Timer B Count Source Select Register 0 */ union tbcs0_t { struct { unsigned char TCS0 :1; unsigned char TCS1 :1; unsigned char TCS2 :1; unsigned char TCS3 :1; unsigned char TCS4 :1; unsigned char TCS5 :1; unsigned char TCS6 :1; unsigned char TCS7 :1; } BIT; unsigned char BYTE; }; #define TBCS0 (*(volatile union tbcs0_t *)(0x01C8)) /*--------------------------------------------------------------------------------*/ /* Timer B Count Source Select Register 1 */ union tbcs1_t { struct { unsigned char TCS0 :1; unsigned char TCS1 :1; unsigned char TCS2 :1; unsigned char TCS3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define TBCS1 (*(volatile union tbcs1_t *)(0x01C9)) /*--------------------------------------------------------------------------------*/ /* Timer AB Division Control Register 0 */ union tckdivc0_t { struct { unsigned char TCDIV00 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define TCKDIVC0 (*(volatile union tckdivc0_t *)(0x01CB)) /*--------------------------------------------------------------------------------*/ /* Timer A Count Source Select Register 0 */ union tacs0_t { struct { unsigned char TCS0 :1; unsigned char TCS1 :1; unsigned char TCS2 :1; unsigned char TCS3 :1; unsigned char TCS4 :1; unsigned char TCS5 :1; unsigned char TCS6 :1; unsigned char TCS7 :1; } BIT; unsigned char BYTE; }; #define TACS0 (*(volatile union tacs0_t *)(0x01D0)) /*--------------------------------------------------------------------------------*/ /* Timer A Count Source Select Register 1 */ union tacs1_t { struct { unsigned char TCS0 :1; unsigned char TCS1 :1; unsigned char TCS2 :1; unsigned char TCS3 :1; unsigned char TCS4 :1; unsigned char TCS5 :1; unsigned char TCS6 :1; unsigned char TCS7 :1; } BIT; unsigned char BYTE; }; #define TACS1 (*(volatile union tacs1_t *)(0x01D1)) /*--------------------------------------------------------------------------------*/ /* Timer A Count Source Select Register 2 */ union tacs2_t { struct { unsigned char TCS0 :1; unsigned char TCS1 :1; unsigned char TCS2 :1; unsigned char TCS3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define TACS2 (*(volatile union tacs2_t *)(0x01D2)) /*--------------------------------------------------------------------------------*/ /* 16-Bit Pulse Width Modulation Mode Function Select Register */ union pwmfs_t { struct { unsigned char bit0 :1; unsigned char PWMFS1 :1; unsigned char PWMFS2 :1; unsigned char bit3 :1; unsigned char PWMFS4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PWMFS (*(volatile union pwmfs_t *)(0x01D4)) /*--------------------------------------------------------------------------------*/ /* Timer A Waveform Output Function Select Register */ union tapofs_t { struct { unsigned char POFS0 :1; unsigned char POFS1 :1; unsigned char POFS2 :1; unsigned char POFS3 :1; unsigned char POFS4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define TAPOFS (*(volatile union tapofs_t *)(0x01D5)) /*--------------------------------------------------------------------------------*/ /* Timer A Output Waveform Change Enable Register */ union taow_t { struct { unsigned char bit0 :1; unsigned char TA1OW :1; unsigned char TA2OW :1; unsigned char bit3 :1; unsigned char TA4OW :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define TAOW (*(volatile union taow_t *)(0x01D8)) /*--------------------------------------------------------------------------------*/ /* Three-Phase Protect Control Register */ union tprc_t { struct { unsigned char TPRC0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define TPRC (*(volatile union tprc_t *)(0x01DA)) /*--------------------------------------------------------------------------------*/ /* Timer B3-1 Register */ #define TB31 (*(volatile union register16_t *)(0x01E0)) /*--------------------------------------------------------------------------------*/ /* Timer B4-1 Register */ #define TB41 (*(volatile union register16_t *)(0x01E2)) /*--------------------------------------------------------------------------------*/ /* Timer B5-1 Register */ #define TB51 (*(volatile union register16_t *)(0x01E4)) /*--------------------------------------------------------------------------------*/ /* Pulse Period/Pulse Width Measurement Mode Function Select Register 2 */ union ppwfs2_t { struct { unsigned char PPWFS20 :1; unsigned char PPWFS21 :1; unsigned char PPWFS22 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PPWFS2 (*(volatile union ppwfs2_t *)(0x01E6)) /*--------------------------------------------------------------------------------*/ /* Timer B Count Source Select Register 2 */ union tbcs2_t { struct { unsigned char TCS0 :1; unsigned char TCS1 :1; unsigned char TCS2 :1; unsigned char TCS3 :1; unsigned char TCS4 :1; unsigned char TCS5 :1; unsigned char TCS6 :1; unsigned char TCS7 :1; } BIT; unsigned char BYTE; }; #define TBCS2 (*(volatile union tbcs2_t *)(0x01E8)) /*--------------------------------------------------------------------------------*/ /* Timer B Count Source Select Register 3 */ union tbcs3_t { struct { unsigned char TCS0 :1; unsigned char TCS1 :1; unsigned char TCS2 :1; unsigned char TCS3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define TBCS3 (*(volatile union tbcs3_t *)(0x01E9)) /*--------------------------------------------------------------------------------*/ /* PMC0 Function Select Register 0 */ union pmc0con0_t { struct { unsigned char EN :1; unsigned char SINV :1; unsigned char FIL :1; unsigned char EHOLD :1; unsigned char HDEN :1; unsigned char SDEN :1; unsigned char DRINT0 :1; unsigned char DRINT1 :1; } BIT; unsigned char BYTE; }; #define PMC0CON0 (*(volatile union pmc0con0_t *)(0x01F0)) /*--------------------------------------------------------------------------------*/ /* PMC0 Function Select Register 1 */ union pmc0con1_t { struct { unsigned char TYP0 :1; unsigned char TYP1 :1; unsigned char CSS :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char EXSDEN :1; unsigned char EXHDEN :1; } BIT; unsigned char BYTE; }; #define PMC0CON1 (*(volatile union pmc0con1_t *)(0x01F1)) /*--------------------------------------------------------------------------------*/ /* PMC0 Function Select Register 2 */ union pmc0con2_t { struct { unsigned char ENFLG :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char INFLG :1; unsigned char CEFLG :1; unsigned char CEINT :1; unsigned char PSEL0 :1; unsigned char PSEL1 :1; } BIT; unsigned char BYTE; }; #define PMC0CON2 (*(volatile union pmc0con2_t *)(0x01F2)) /*--------------------------------------------------------------------------------*/ /* PMC0 Function Select Register 3 */ union pmc0con3_t { struct { unsigned char CRE :1; unsigned char CFR :1; unsigned char CST :1; unsigned char PD :1; unsigned char CSRC0 :1; unsigned char CSRC1 :1; unsigned char CDIV0 :1; unsigned char CDIV1 :1; } BIT; unsigned char BYTE; }; #define PMC0CON3 (*(volatile union pmc0con3_t *)(0x01F3)) /*--------------------------------------------------------------------------------*/ /* PMC0 Status Register */ union pmc0sts_t { struct { unsigned char CPFLG :1; unsigned char REFLG :1; unsigned char DRFLG :1; unsigned char BFULFLG :1; unsigned char PTHDFLG :1; unsigned char PTD0FLG :1; unsigned char PTD1FLG :1; unsigned char SDFLG :1; } BIT; unsigned char BYTE; }; #define PMC0STS (*(volatile union pmc0sts_t *)(0x01F4)) /*--------------------------------------------------------------------------------*/ /* PMC0 Interrupt Source Select Register */ union pmc0int_t { struct { unsigned char CPINT :1; unsigned char REINT :1; unsigned char DRINT :1; unsigned char BFULINT :1; unsigned char PTHDINT :1; unsigned char PTDINT :1; unsigned char TIMINT :1; unsigned char SDINT :1; } BIT; unsigned char BYTE; }; #define PMC0INT (*(volatile union pmc0int_t *)(0x01F5)) /*--------------------------------------------------------------------------------*/ /* PMC0 Compare Control Register */ union pmc0cpc_t { struct { unsigned char CPN0 :1; unsigned char CPN1 :1; unsigned char CPN2 :1; unsigned char bit3 :1; unsigned char CPEN :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PMC0CPC (*(volatile union pmc0cpc_t *)(0x01F6)) /*--------------------------------------------------------------------------------*/ /* PMC0 Compare Data Register */ #define PMC0CPD (*(volatile union register8_t *)(0x01F7)) /*--------------------------------------------------------------------------------*/ /* PMC1 Function Select Register 0 */ union pmc1con0_t { struct { unsigned char EN :1; unsigned char SINV :1; unsigned char FIL :1; unsigned char bit3 :1; unsigned char HDEN :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PMC1CON0 (*(volatile union pmc1con0_t *)(0x01F8)) /*--------------------------------------------------------------------------------*/ /* PMC1 Function Select Register 1 */ union pmc1con1_t { struct { unsigned char TYP0 :1; unsigned char TYP1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PMC1CON1 (*(volatile union pmc1con1_t *)(0x01F9)) /*--------------------------------------------------------------------------------*/ /* PMC1 Function Select Register 2 */ union pmc1con2_t { struct { unsigned char ENFLG :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char INFLG :1; unsigned char CEFLG :1; unsigned char CEINT :1; unsigned char PSEL0 :1; unsigned char PSEL1 :1; } BIT; unsigned char BYTE; }; #define PMC1CON2 (*(volatile union pmc1con2_t *)(0x01FA)) /*--------------------------------------------------------------------------------*/ /* PMC1 Function Select Register 3 */ union pmc1con3_t { struct { unsigned char CRE :1; unsigned char CFR :1; unsigned char CST :1; unsigned char PD :1; unsigned char CSRC0 :1; unsigned char CSRC1 :1; unsigned char CDIV0 :1; unsigned char CDIV1 :1; } BIT; unsigned char BYTE; }; #define PMC1CON3 (*(volatile union pmc1con3_t *)(0x01FB)) /*--------------------------------------------------------------------------------*/ /* PMC1 Status Register */ union pmc1sts_t { struct { unsigned char bit0 :1; unsigned char REFLG :1; unsigned char DRFLG :1; unsigned char bit3 :1; unsigned char PTHDFLG :1; unsigned char PTD0FLG :1; unsigned char PTD1FLG :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PMC1STS (*(volatile union pmc1sts_t *)(0x01FC)) /*--------------------------------------------------------------------------------*/ /* PMC1 Interrupt Source Select Register */ union pmc1int_t { struct { unsigned char bit0 :1; unsigned char REINT :1; unsigned char DRINT :1; unsigned char bit3 :1; unsigned char PTHDINT :1; unsigned char PTDINT :1; unsigned char TIMINT :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PMC1INT (*(volatile union register8_t *)(0x01FD)) /*--------------------------------------------------------------------------------*/ /* Interrupt Source Select Register 3 */ union ifsr3a_t { struct { unsigned char IFSR30 :1; unsigned char IFSR31 :1; unsigned char bit2 :1; unsigned char IFSR33 :1; unsigned char IFSR34 :1; unsigned char IFSR35 :1; unsigned char IFSR36 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define IFSR3A (*(volatile union ifsr3a_t *)(0x0205)) /*--------------------------------------------------------------------------------*/ /* Interrupt Source Select Register 2 */ union ifsr2a_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char IFSR22 :1; unsigned char IFSR23 :1; unsigned char IFSR24 :1; unsigned char IFSR25 :1; unsigned char IFSR26 :1; unsigned char IFSR27 :1; } BIT; unsigned char BYTE; }; #define IFSR2A (*(volatile union ifsr2a_t *)(0x0206)) /*--------------------------------------------------------------------------------*/ /* Interrupt Source Select Register */ union ifsr_t { struct { unsigned char IFSR0 :1; unsigned char IFSR1 :1; unsigned char IFSR2 :1; unsigned char IFSR3 :1; unsigned char IFSR4 :1; unsigned char IFSR5 :1; unsigned char IFSR6 :1; unsigned char IFSR7 :1; } BIT; unsigned char BYTE; }; #define IFSR (*(volatile union ifsr_t *)(0x0207)) /*--------------------------------------------------------------------------------*/ /* Address Match Interrupt Enable Register */ union aier_t { struct { unsigned char AIER0 :1; unsigned char AIER1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define AIER (*(volatile union aier_t *)(0x020E)) /*--------------------------------------------------------------------------------*/ /* Address Match Interrupt Enable Register 2 */ union aier2_t { struct { unsigned char AIER20 :1; unsigned char AIER21 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define AIER2 (*(volatile union aier2_t *)(0x020F)) /*--------------------------------------------------------------------------------*/ /* Address Match Interrupt Register 0 */ #define RMAD0 (*(volatile union register32_t *)(0x0210)) /*--------------------------------------------------------------------------------*/ /* Address Match Interrupt Register 1 */ #define RMAD1 (*(volatile union register32_t *)(0x0214)) /*--------------------------------------------------------------------------------*/ /* Address Match Interrupt Register 2 */ #define RMAD2 (*(volatile union register32_t *)(0x0218)) /*--------------------------------------------------------------------------------*/ /* Address Match Interrupt Register 3 */ #define RMAD3 (*(volatile union register32_t *)(0x021C)) /*--------------------------------------------------------------------------------*/ /* Flash Memory Control Register 0 */ union fmr0_t { struct { unsigned char FMR00 :1; unsigned char FMR01 :1; unsigned char FMR02 :1; unsigned char FMSTP :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char FMR06 :1; unsigned char FMR07 :1; } BIT; unsigned char BYTE; }; #define FMR0 (*(volatile union fmr0_t *)(0x0220)) /*--------------------------------------------------------------------------------*/ /* Flash Memory Control Register 1 */ union fmr1_t { struct { unsigned char bit0 :1; unsigned char FMR11 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char FMR16 :1; unsigned char FMR17 :1; } BIT; unsigned char BYTE; }; #define FMR1 (*(volatile union fmr1_t *)(0x0221)) /*--------------------------------------------------------------------------------*/ /* Flash Memory Control Register 2 */ union fmr2_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char FMR22 :1; unsigned char FMR23 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define FMR2 (*(volatile union fmr2_t *)(0x0222)) /*--------------------------------------------------------------------------------*/ /* Flash Memory Control Register 6 */ union fmr6_t { struct { unsigned char FMR60 :1; unsigned char FMR61 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define FMR6 (*(volatile union fmr6_t *)(0x0230)) /*--------------------------------------------------------------------------------*/ /* UART0 Special Mode Register 4 */ union u0smr4_t { struct { unsigned char STAREQ :1; unsigned char RSTAREQ :1; unsigned char STPREQ :1; unsigned char STSPSEL :1; unsigned char ACKD :1; unsigned char ACKC :1; unsigned char SCLHI :1; unsigned char SWC9 :1; } BIT; unsigned char BYTE; }; #define U0SMR4 (*(volatile union u0smr4_t *)(0x0244)) /*--------------------------------------------------------------------------------*/ /* UART0 Special Mode Register 3 */ union u0smr3_t { struct { unsigned char bit0 :1; unsigned char CKPH :1; unsigned char bit2 :1; unsigned char NODC :1; unsigned char bit4 :1; unsigned char DL0 :1; unsigned char DL1 :1; unsigned char DL2 :1; } BIT; unsigned char BYTE; }; #define U0SMR3 (*(volatile union u0smr3_t *)(0x0245)) /*--------------------------------------------------------------------------------*/ /* UART0 Special Mode Register 2 */ union u0smr2_t { struct { unsigned char IICM2 :1; unsigned char CSC :1; unsigned char SWC :1; unsigned char ALS :1; unsigned char STAC :1; unsigned char SWC2 :1; unsigned char SDHI :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U0SMR2 (*(volatile union u0smr2_t *)(0x0246)) /*--------------------------------------------------------------------------------*/ /* UART0 Special Mode Register */ union u0smr_t { struct { unsigned char IICM :1; unsigned char ABC :1; unsigned char BBS :1; unsigned char bit3 :1; unsigned char ABSCS :1; unsigned char ACSE :1; unsigned char SSS :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U0SMR (*(volatile union u0smr_t *)(0x0247)) /*--------------------------------------------------------------------------------*/ /* UART0 Transmit/Receive Mode Register */ union u0mr_t { struct { unsigned char SMD0 :1; unsigned char SMD1 :1; unsigned char SMD2 :1; unsigned char CKDIR :1; unsigned char STPS :1; unsigned char PRY :1; unsigned char PRYE :1; unsigned char IOPOL :1; } BIT; unsigned char BYTE; }; #define U0MR (*(volatile union u0mr_t *)(0x0248)) /*--------------------------------------------------------------------------------*/ /* UART0 Bit Rate Register */ #define U0BRG (*(volatile unsigned char *)(0x0249)) /*--------------------------------------------------------------------------------*/ /* UART0 Transmit Buffer Register */ union st_u0tb { /* UART0 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */ struct{ unsigned char U0TBL; /* UART0 Transmit buffer register low 8 bit */ unsigned char U0TBH; /* UART0 Transmit buffer register high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; #define U0TB (*(volatile union st_u0tb *)(0x024A)) /*--------------------------------------------------------------------------------*/ /* UART0 Transmit/Receive Control Register 0 */ union u0c0_t { struct { unsigned char CLK0 :1; unsigned char CLK1 :1; unsigned char CRS :1; unsigned char TXEPT :1; unsigned char CRD :1; unsigned char NCH :1; unsigned char CKPOL :1; unsigned char UFORM :1; } BIT; unsigned char BYTE; }; #define U0C0 (*(volatile union u0c0_t *)(0x024C)) /*--------------------------------------------------------------------------------*/ /* UART0 Transmit/Receive Control Register 1 */ union u0c1_t { struct { unsigned char TE :1; unsigned char TI :1; unsigned char RE :1; unsigned char RI :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char U0LCH :1; unsigned char U0ERE :1; } BIT; unsigned char BYTE; }; #define U0C1 (*(volatile union u0c1_t *)(0x024D)) /*--------------------------------------------------------------------------------*/ /* UART0 Receive Buffer Register */ union u0rb_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; unsigned char bit8 :1; unsigned char bit9 :1; unsigned char bit10 :1; unsigned char ABT :1; unsigned char OER :1; unsigned char FER :1; unsigned char PER :1; unsigned char SUM :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; } BYTES; struct { unsigned char U0RBL; unsigned char U0RBH; } BYTE; unsigned short WORD; }; #define U0RB (*(volatile union u0rb_t *)(0x024E)) /*--------------------------------------------------------------------------------*/ /* UART Transmit/Receive Control Register 2 */ union ucon_t { struct { unsigned char U0IRS :1; unsigned char U1IRS :1; unsigned char U0RRM :1; unsigned char U1RRM :1; unsigned char CLKMD0 :1; unsigned char CLKMD1 :1; unsigned char RCSP :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define UCON (*(volatile union ucon_t *)(0x0250)) /*--------------------------------------------------------------------------------*/ /* UART Clock Select Register */ union uclksel0_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char OCOSEL0 :1; unsigned char OCOSEL1 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define UCLKSEL0 (*(volatile union uclksel0_t *)(0x0252)) /*--------------------------------------------------------------------------------*/ /* UART1 Special Mode Register 4 */ union u1smr4_t { struct { unsigned char STAREQ :1; unsigned char RSTAREQ :1; unsigned char STPREQ :1; unsigned char STSPSEL :1; unsigned char ACKD :1; unsigned char ACKC :1; unsigned char SCLHI :1; unsigned char SWC9 :1; } BIT; unsigned char BYTE; }; #define U1SMR4 (*(volatile union u1smr4_t *)(0x0254)) /*--------------------------------------------------------------------------------*/ /* UART1 Special Mode Register 3 */ union u1smr3_t { struct { unsigned char bit0 :1; unsigned char CKPH :1; unsigned char bit2 :1; unsigned char NODC :1; unsigned char bit4 :1; unsigned char DL0 :1; unsigned char DL1 :1; unsigned char DL2 :1; } BIT; unsigned char BYTE; }; #define U1SMR3 (*(volatile union u1smr3_t *)(0x0255)) /*--------------------------------------------------------------------------------*/ /* UART1 Special Mode Register 2 */ union u1smr2_t { struct { unsigned char IICM2 :1; unsigned char CSC :1; unsigned char SWC :1; unsigned char ALS :1; unsigned char STAC :1; unsigned char SWC2 :1; unsigned char SDHI :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U1SMR2 (*(volatile union u1smr2_t *)(0x0256)) /*--------------------------------------------------------------------------------*/ /* UART1 Special Mode Register */ union u1smr_t { struct { unsigned char IICM :1; unsigned char ABC :1; unsigned char BBS :1; unsigned char bit3 :1; unsigned char ABSCS :1; unsigned char ACSE :1; unsigned char SSS :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U1SMR (*(volatile union u1smr_t *)(0x0257)) /*--------------------------------------------------------------------------------*/ /* UART1 Transmit/Receive Mode Register */ union u1mr_t { struct { unsigned char SMD0 :1; unsigned char SMD1 :1; unsigned char SMD2 :1; unsigned char CKDIR :1; unsigned char STPS :1; unsigned char PRY :1; unsigned char PRYE :1; unsigned char IOPOL :1; } BIT; unsigned char BYTE; }; #define U1MR (*(volatile union u1mr_t *)(0x0258)) /*--------------------------------------------------------------------------------*/ /* UART1 Bit Rate Register */ #define U1BRG (*(volatile unsigned char *)(0x0259)) /*--------------------------------------------------------------------------------*/ /* UART1 Transmit Buffer Register */ union st_u1tb { /* UART1 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */ struct{ unsigned char U1TBL; /* UART1 Transmit buffer register low 8 bit */ unsigned char U1TBH; /* UART1 Transmit buffer register high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; #define U1TB (*(volatile union st_u1tb *)(0x025A)) /*--------------------------------------------------------------------------------*/ /* UART1 Transmit/Receive Control Register 0 */ union u1c0_t { struct { unsigned char CLK0 :1; unsigned char CLK1 :1; unsigned char CRS :1; unsigned char TXEPT :1; unsigned char CRD :1; unsigned char NCH :1; unsigned char CKPOL :1; unsigned char UFORM :1; } BIT; unsigned char BYTE; }; #define U1C0 (*(volatile union u1c0_t *)(0x025C)) /*--------------------------------------------------------------------------------*/ /* UART1 Transmit/Receive Control Register 1 */ union u1c1_t { struct { unsigned char TE :1; unsigned char TI :1; unsigned char RE :1; unsigned char RI :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char U1LCH :1; unsigned char U1ERE :1; } BIT; unsigned char BYTE; }; #define U1C1 (*(volatile union u1c1_t *)(0x025D)) /*--------------------------------------------------------------------------------*/ /* UART1 Receive Buffer Register */ union u1rb_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; unsigned char bit8 :1; unsigned char bit9 :1; unsigned char bit10 :1; unsigned char ABT :1; unsigned char OER :1; unsigned char FER :1; unsigned char PER :1; unsigned char SUM :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; } BYTES; struct { unsigned char U1RBL; unsigned char U1RBH; } BYTE; unsigned short WORD; }; #define U1RB (*(volatile union u1rb_t *)(0x025E)) /*--------------------------------------------------------------------------------*/ /* UART2 Special Mode Register 4 */ union u2smr4_t { struct { unsigned char STAREQ :1; unsigned char RSTAREQ :1; unsigned char STPREQ :1; unsigned char STSPSEL :1; unsigned char ACKD :1; unsigned char ACKC :1; unsigned char SCLHI :1; unsigned char SWC9 :1; } BIT; unsigned char BYTE; }; #define U2SMR4 (*(volatile union u2smr4_t *)(0x0264)) /*--------------------------------------------------------------------------------*/ /* UART2 Special Mode Register 3 */ union u2smr3_t { struct { unsigned char bit0 :1; unsigned char CKPH :1; unsigned char bit2 :1; unsigned char NODC :1; unsigned char bit4 :1; unsigned char DL0 :1; unsigned char DL1 :1; unsigned char DL2 :1; } BIT; unsigned char BYTE; }; #define U2SMR3 (*(volatile union u2smr3_t *)(0x0265)) /*--------------------------------------------------------------------------------*/ /* UART2 Special Mode Register 2 */ union u2smr2_t { struct { unsigned char IICM2 :1; unsigned char CSC :1; unsigned char SWC :1; unsigned char ALS :1; unsigned char STAC :1; unsigned char SWC2 :1; unsigned char SDHI :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U2SMR2 (*(volatile union u2smr2_t *)(0x0266)) /*--------------------------------------------------------------------------------*/ /* UART2 Special Mode Register */ union u2smr_t { struct { unsigned char IICM :1; unsigned char ABC :1; unsigned char BBS :1; unsigned char bit3 :1; unsigned char ABSCS :1; unsigned char ACSE :1; unsigned char SSS :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U2SMR (*(volatile union u2smr_t *)(0x0267)) /*--------------------------------------------------------------------------------*/ /* UART2 Transmit/Receive Mode Register */ union u2mr_t { struct { unsigned char SMD0 :1; unsigned char SMD1 :1; unsigned char SMD2 :1; unsigned char CKDIR :1; unsigned char STPS :1; unsigned char PRY :1; unsigned char PRYE :1; unsigned char IOPOL :1; } BIT; unsigned char BYTE; }; #define U2MR (*(volatile union u2mr_t *)(0x0268)) /*--------------------------------------------------------------------------------*/ /* UART2 Bit Rate Register */ #define U2BRG (*(volatile unsigned char *)(0x0269)) /*--------------------------------------------------------------------------------*/ /* UART2 Transmit Buffer Register */ union st_u2tb { /* UART2 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */ struct{ unsigned char U2TBL; /* UART2 Transmit buffer register low 8 bit */ unsigned char U2TBH; /* UART2 Transmit buffer register high 8 bit */ } BYTE; /* Byte access */ unsigned short WORD; /* Word Access */ }; #define U2TB (*(volatile union st_u2tb *)(0x026A)) /*--------------------------------------------------------------------------------*/ /* UART2 Transmit/Receive Control Register 0 */ union u2c0_t { struct { unsigned char CLK0 :1; unsigned char CLK1 :1; unsigned char CRS :1; unsigned char TXEPT :1; unsigned char CRD :1; unsigned char NCH :1; unsigned char CKPOL :1; unsigned char UFORM :1; } BIT; unsigned char BYTE; }; #define U2C0 (*(volatile union u2c0_t *)(0x026C)) /*--------------------------------------------------------------------------------*/ /* UART2 Transmit/Receive Control Register 1 */ union u2c1_t { struct { unsigned char TE_U2C1 :1; unsigned char TI_U2C1 :1; unsigned char RE_U2C1 :1; unsigned char RI_U2C1 :1; unsigned char U2IRS :1; unsigned char U2RRM :1; unsigned char U2LCH :1; unsigned char U2ERE :1; } BIT; unsigned char BYTE; }; #define U2C1 (*(volatile union u2c1_t *)(0x026D)) /*--------------------------------------------------------------------------------*/ /* UART2 Receive Buffer Register */ union u2rb_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; unsigned char bit8 :1; unsigned char bit9 :1; unsigned char bit10 :1; unsigned char ABT :1; unsigned char OER :1; unsigned char FER :1; unsigned char PER :1; unsigned char SUM :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; } BYTES; struct { unsigned char U2RBL; unsigned char U2RBH; } BYTE; unsigned short WORD; }; #define U2RB (*(volatile union u2rb_t *)(0x026E)) /*--------------------------------------------------------------------------------*/ /* SI/O3 Transmit/Receive Register */ #define S3TRR (*(volatile union register8_t *)(0x0270)) /*--------------------------------------------------------------------------------*/ /* SI/O3 Control Register */ union s3c_t { struct { unsigned char SM30 :1; unsigned char SM31 :1; unsigned char SM32 :1; unsigned char SM33 :1; unsigned char SM34 :1; unsigned char SM35 :1; unsigned char SM36 :1; unsigned char SM37 :1; } BIT; unsigned char BYTE; }; #define S3C (*(volatile union s3c_t *)(0x0272)) /*--------------------------------------------------------------------------------*/ /* SI/O3 Bit Rate Register */ #define S3BRG (*(volatile union register8_t *)(0x0273)) /*--------------------------------------------------------------------------------*/ /* SI/O4 Transmit/Receive Register */ #define S4TRR (*(volatile union register8_t *)(0x0274)) /*--------------------------------------------------------------------------------*/ /* SI/O4 Control Register */ union s4c_t { struct { unsigned char SM40 :1; unsigned char SM41 :1; unsigned char SM42 :1; unsigned char SM43 :1; unsigned char SM44 :1; unsigned char SM45 :1; unsigned char SM46 :1; unsigned char SM47 :1; } BIT; unsigned char BYTE; }; #define S4C (*(volatile union s4c_t *)(0x0276)) /*--------------------------------------------------------------------------------*/ /* SI/O4 Bit Rate Register */ #define S4BRG (*(volatile union register8_t *)(0x0277)) /*--------------------------------------------------------------------------------*/ /* SI/O3,4 Control Register 2 */ union s34c2_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char SM22 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char SM26 :1; unsigned char SM27 :1; } BIT; unsigned char BYTE; }; #define S34C2 (*(volatile union s34c2_t *)(0x0278)) /*--------------------------------------------------------------------------------*/ /* UART5 Special Mode Register 4 */ union u5smr4_t { struct { unsigned char STAREQ :1; unsigned char RSTAREQ :1; unsigned char STPREQ :1; unsigned char STSPSEL :1; unsigned char ACKD :1; unsigned char ACKC :1; unsigned char SCLHI :1; unsigned char SWC9 :1; } BIT; unsigned char BYTE; }; #define U5SMR4 (*(volatile union u5smr4_t *)(0x0284)) /*--------------------------------------------------------------------------------*/ /* UART5 Special Mode Register 3 */ union u5smr3_t { struct { unsigned char bit0 :1; unsigned char CKPH :1; unsigned char bit2 :1; unsigned char NODC :1; unsigned char bit4 :1; unsigned char DL0 :1; unsigned char DL1 :1; unsigned char DL2 :1; } BIT; unsigned char BYTE; }; #define U5SMR3 (*(volatile union u5smr3_t *)(0x0285)) /*--------------------------------------------------------------------------------*/ /* UART5 Special Mode Register 2 */ union u5smr2_t { struct { unsigned char IICM2 :1; unsigned char CSC :1; unsigned char SWC :1; unsigned char ALS :1; unsigned char STAC :1; unsigned char SWC2 :1; unsigned char SDHI :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U5SMR2 (*(volatile union u5smr2_t *)(0x0286)) /*--------------------------------------------------------------------------------*/ /* UART5 Special Mode Register */ union u5smr_t { struct { unsigned char IICM :1; unsigned char ABC :1; unsigned char BBS :1; unsigned char bit3 :1; unsigned char ABSCS :1; unsigned char ACSE :1; unsigned char SSS :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U5SMR (*(volatile union u5smr_t *)(0x0287)) /*--------------------------------------------------------------------------------*/ /* UART5 Transmit/Receive Mode Register */ union u5mr_t { struct { unsigned char SMD0 :1; unsigned char SMD1 :1; unsigned char SMD2 :1; unsigned char CKDIR :1; unsigned char STPS :1; unsigned char PRY :1; unsigned char PRYE :1; unsigned char IOPOL :1; } BIT; unsigned char BYTE; }; #define U5MR (*(volatile union u5mr_t *)(0x0288)) /*--------------------------------------------------------------------------------*/ /* UART5 Bit Rate Register */ #define U5BRG (*(volatile union register8_t *)(0x0289)) /*--------------------------------------------------------------------------------*/ /* UART5 Transmit Buffer Register */ #define U5TB (*(volatile union register16_t *)(0x028A)) /*--------------------------------------------------------------------------------*/ /* UART5 Transmit/Receive Control Register 0 */ union u5c0_t { struct { unsigned char CLK0 :1; unsigned char CLK1 :1; unsigned char CRS :1; unsigned char TXEPT :1; unsigned char CRD :1; unsigned char NCH :1; unsigned char CKPOL :1; unsigned char UFORM :1; } BIT; unsigned char BYTE; }; #define U5C0 (*(volatile union u5c0_t *)(0x028C)) /*--------------------------------------------------------------------------------*/ /* UART5 Transmit/Receive Control Register 1 */ union u5c1_t { struct { unsigned char TE :1; unsigned char TI :1; unsigned char RE :1; unsigned char RI :1; unsigned char U5IRS :1; unsigned char U5RRM :1; unsigned char U5LCH :1; unsigned char U5ERE :1; } BIT; unsigned char BYTE; }; #define U5C1 (*(volatile union u5c1_t *)(0x028D)) /*--------------------------------------------------------------------------------*/ /* UART5 Receive Buffer Register */ union u5rb_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; unsigned char bit8 :1; unsigned char bit9 :1; unsigned char bit10 :1; unsigned char ABT :1; unsigned char OER :1; unsigned char FER :1; unsigned char PER :1; unsigned char SUM :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; } BYTES; unsigned short WORD; }; #define U5RB (*(volatile union u5rb_t *)(0x028E)) /*--------------------------------------------------------------------------------*/ /* UART6 Special Mode Register 4 */ union u6smr4_t { struct { unsigned char STAREQ :1; unsigned char RSTAREQ :1; unsigned char STPREQ :1; unsigned char STSPSEL :1; unsigned char ACKD :1; unsigned char ACKC :1; unsigned char SCLHI :1; unsigned char SWC9 :1; } BIT; unsigned char BYTE; }; #define U6SMR4 (*(volatile union u6smr4_t *)(0x0294)) /*--------------------------------------------------------------------------------*/ /* UART6 Special Mode Register 3 */ union u6smr3_t { struct { unsigned char bit0 :1; unsigned char CKPH :1; unsigned char bit2 :1; unsigned char NODC :1; unsigned char bit4 :1; unsigned char DL0 :1; unsigned char DL1 :1; unsigned char DL2 :1; } BIT; unsigned char BYTE; }; #define U6SMR3 (*(volatile union u6smr3_t *)(0x0295)) /*--------------------------------------------------------------------------------*/ /* UART6 Special Mode Register 2 */ union u6smr2_t { struct { unsigned char IICM2 :1; unsigned char CSC :1; unsigned char SWC :1; unsigned char ALS :1; unsigned char STAC :1; unsigned char SWC2 :1; unsigned char SDHI :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U6SMR2 (*(volatile union u6smr2_t *)(0x0296)) /*--------------------------------------------------------------------------------*/ /* UART6 Special Mode Register */ union u6smr_t { struct { unsigned char IICM :1; unsigned char ABC :1; unsigned char BBS :1; unsigned char bit3 :1; unsigned char ABSCS :1; unsigned char ACSE :1; unsigned char SSS :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U6SMR (*(volatile union u6smr_t *)(0x0297)) /*--------------------------------------------------------------------------------*/ /* UART6 Transmit/Receive Mode Register */ union u6mr_t { struct { unsigned char SMD0 :1; unsigned char SMD1 :1; unsigned char SMD2 :1; unsigned char CKDIR :1; unsigned char STPS :1; unsigned char PRY :1; unsigned char PRYE :1; unsigned char IOPOL :1; } BIT; unsigned char BYTE; }; #define U6MR (*(volatile union u6mr_t *)(0x0298)) /*--------------------------------------------------------------------------------*/ /* UART6 Bit Rate Register */ #define U6BRG (*(volatile union register8_t *)(0x0299)) /*--------------------------------------------------------------------------------*/ /* UART6 Transmit Buffer Register */ #define U6TB (*(volatile union register16_t *)(0x029A)) /*--------------------------------------------------------------------------------*/ /* UART6 Transmit/Receive Control Register 0 */ union u6c0_t { struct { unsigned char CLK0 :1; unsigned char CLK1 :1; unsigned char CRS :1; unsigned char TXEPT :1; unsigned char CRD :1; unsigned char NCH :1; unsigned char CKPOL :1; unsigned char UFORM :1; } BIT; unsigned char BYTE; }; #define U6C0 (*(volatile union u6c0_t *)(0x029C)) /*--------------------------------------------------------------------------------*/ /* UART6 Transmit/Receive Control Register 1 */ union u6c1_t { struct { unsigned char TE :1; unsigned char TI :1; unsigned char RE :1; unsigned char RI :1; unsigned char U6IRS :1; unsigned char U6RRM :1; unsigned char U6LCH :1; unsigned char U6ERE :1; } BIT; unsigned char BYTE; }; #define U6C1 (*(volatile union u6c1_t *)(0x029D)) /*--------------------------------------------------------------------------------*/ /* UART6 Receive Buffer Register */ union u6rb_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; unsigned char bit8 :1; unsigned char bit9 :1; unsigned char bit10 :1; unsigned char ABT :1; unsigned char OER :1; unsigned char FER :1; unsigned char PER :1; unsigned char SUM :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; } BYTES; unsigned short WORD; }; #define U6RB (*(volatile union u6rb_t *)(0x029E)) /*--------------------------------------------------------------------------------*/ /* UART7 Special Mode Register 4 */ union u7smr4_t { struct { unsigned char STAREQ :1; unsigned char RSTAREQ :1; unsigned char STPREQ :1; unsigned char STSPSEL :1; unsigned char ACKD :1; unsigned char ACKC :1; unsigned char SCLHI :1; unsigned char SWC9 :1; } BIT; unsigned char BYTE; }; #define U7SMR4 (*(volatile union u7smr4_t *)(0x02A4)) /*--------------------------------------------------------------------------------*/ /* UART7 Special Mode Register 3 */ union u7smr3_t { struct { unsigned char bit0 :1; unsigned char CKPH :1; unsigned char bit2 :1; unsigned char NODC :1; unsigned char bit4 :1; unsigned char DL0 :1; unsigned char DL1 :1; unsigned char DL2 :1; } BIT; unsigned char BYTE; }; #define U7SMR3 (*(volatile union u7smr3_t *)(0x02A5)) /*--------------------------------------------------------------------------------*/ /* UART7 Special Mode Register 2 */ union u7smr2_t { struct { unsigned char IICM2 :1; unsigned char CSC :1; unsigned char SWC :1; unsigned char ALS :1; unsigned char STAC :1; unsigned char SWC2 :1; unsigned char SDHI :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U7SMR2 (*(volatile union u7smr2_t *)(0x02A6)) /*--------------------------------------------------------------------------------*/ /* UART7 Special Mode Register */ union u7smr_t { struct { unsigned char IICM :1; unsigned char ABC :1; unsigned char BBS :1; unsigned char bit3 :1; unsigned char ABSCS :1; unsigned char ACSE :1; unsigned char SSS :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define U7SMR (*(volatile union u7smr_t *)(0x02A7)) /*--------------------------------------------------------------------------------*/ /* UART7 Transmit/Receive Mode Register */ union u7mr_t { struct { unsigned char SMD0 :1; unsigned char SMD1 :1; unsigned char SMD2 :1; unsigned char CKDIR :1; unsigned char STPS :1; unsigned char PRY :1; unsigned char PRYE :1; unsigned char IOPOL :1; } BIT; unsigned char BYTE; }; #define U7MR (*(volatile union u7mr_t *)(0x02A8)) /*--------------------------------------------------------------------------------*/ /* UART7 Bit Rate Register */ #define U7BRG (*(volatile union register8_t *)(0x02A9)) /*--------------------------------------------------------------------------------*/ /* UART7 Transmit Buffer Register */ #define U7TB (*(volatile union register16_t *)(0x02AA)) /*--------------------------------------------------------------------------------*/ /* UART7 Transmit/Receive Control Register 0 */ union u7c0_t { struct { unsigned char CLK0 :1; unsigned char CLK1 :1; unsigned char CRS :1; unsigned char TXEPT :1; unsigned char CRD :1; unsigned char NCH :1; unsigned char CKPOL :1; unsigned char UFORM :1; } BIT; unsigned char BYTE; }; #define U7C0 (*(volatile union u7c0_t *)(0x02AC)) /*--------------------------------------------------------------------------------*/ /* UART7 Transmit/Receive Control Register 1 */ union u7c1_t { struct { unsigned char TE :1; unsigned char TI :1; unsigned char RE :1; unsigned char RI :1; unsigned char U7IRS :1; unsigned char U7RRM :1; unsigned char U7LCH :1; unsigned char U7ERE :1; } BIT; unsigned char BYTE; }; #define U7C1 (*(volatile union u7c1_t *)(0x02AD)) /*--------------------------------------------------------------------------------*/ /* UART7 Receive Buffer Register */ union u7rb_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; unsigned char bit8 :1; unsigned char bit9 :1; unsigned char bit10 :1; unsigned char ABT :1; unsigned char OER :1; unsigned char FER :1; unsigned char PER :1; unsigned char SUM :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; } BYTES; unsigned short WORD; }; #define U7RB (*(volatile union u7rb_t *)(0x02AE)) /*--------------------------------------------------------------------------------*/ /* I2C0 Data Shift Register */ #define S00 (*(volatile union register8_t *)(0x02B0)) /*--------------------------------------------------------------------------------*/ /* I2C0 Address Register 0 */ union s0d0_t { struct { unsigned char bit0 :1; unsigned char SAD0 :1; unsigned char SAD1 :1; unsigned char SAD2 :1; unsigned char SAD3 :1; unsigned char SAD4 :1; unsigned char SAD5 :1; unsigned char SAD6 :1; } BIT; unsigned char BYTE; }; #define S0D0 (*(volatile union s0d0_t *)(0x02B2)) /*--------------------------------------------------------------------------------*/ /* I2C0 Control Register 0 */ union s1d0_t { struct { unsigned char BC0 :1; unsigned char BC1 :1; unsigned char BC2 :1; unsigned char ES0 :1; unsigned char ALS :1; unsigned char bit5 :1; unsigned char IHR :1; unsigned char TISS :1; } BIT; unsigned char BYTE; }; #define S1D0 (*(volatile union s1d0_t *)(0x02B3)) /*--------------------------------------------------------------------------------*/ /* I2C0 Clock Control Register */ union s20_t { struct { unsigned char CCR0 :1; unsigned char CCR1 :1; unsigned char CCR2 :1; unsigned char CCR3 :1; unsigned char CCR4 :1; unsigned char FASTMODE :1; unsigned char ACKBIT :1; unsigned char ACKCLK :1; } BIT; unsigned char BYTE; }; #define S20 (*(volatile union s20_t *)(0x02B4)) /*--------------------------------------------------------------------------------*/ /* I2C0 Start/Stop Condition Control Register */ union s2d0_t { struct { unsigned char SSC0 :1; unsigned char SSC1 :1; unsigned char SSC2 :1; unsigned char SSC3 :1; unsigned char SSC4 :1; unsigned char SIP :1; unsigned char SIS :1; unsigned char STSPSEL :1; } BIT; unsigned char BYTE; }; #define S2D0 (*(volatile union s2d0_t *)(0x02B5)) /*--------------------------------------------------------------------------------*/ /* I2C0 Control Register 1 */ union s3d0_t { struct { unsigned char SIM :1; unsigned char WIT :1; unsigned char PED :1; unsigned char PEC :1; unsigned char SDAM :1; unsigned char SCLM :1; unsigned char ICK0 :1; unsigned char ICK1 :1; } BIT; unsigned char BYTE; }; #define S3D0 (*(volatile union s3d0_t *)(0x02B6)) /*--------------------------------------------------------------------------------*/ /* I2C0 Control Register 2 */ union s4d0_t { struct { unsigned char TOE :1; unsigned char TOF :1; unsigned char TOSEL :1; unsigned char ICK2 :1; unsigned char ICK3 :1; unsigned char ICK4 :1; unsigned char MSLAD :1; unsigned char SCPIN :1; } BIT; unsigned char BYTE; }; #define S4D0 (*(volatile union s4d0_t *)(0x02B7)) /*--------------------------------------------------------------------------------*/ /* I2C0 Status Register 0 */ union s10_t { struct { unsigned char LRB :1; unsigned char ADR0 :1; unsigned char AAS :1; unsigned char AL :1; unsigned char PIN :1; unsigned char BB :1; unsigned char TRX :1; unsigned char MST :1; } BIT; unsigned char BYTE; }; #define S10 (*(volatile union s10_t *)(0x02B8)) /*--------------------------------------------------------------------------------*/ /* I2C0 Status Register 1 */ union s11_t { struct { unsigned char AAS0 :1; unsigned char AAS1 :1; unsigned char AAS2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define S11 (*(volatile union s11_t *)(0x02B9)) /*--------------------------------------------------------------------------------*/ /* I2C0 Address Register 1 */ union s0d1_t { struct { unsigned char bit0 :1; unsigned char SAD0 :1; unsigned char SAD1 :1; unsigned char SAD2 :1; unsigned char SAD3 :1; unsigned char SAD4 :1; unsigned char SAD5 :1; unsigned char SAD6 :1; } BIT; unsigned char BYTE; }; #define S0D1 (*(volatile union s0d1_t *)(0x02BA)) /*--------------------------------------------------------------------------------*/ /* I2C0 Address Register 2 */ union s0d2_t { struct { unsigned char bit0 :1; unsigned char SAD0 :1; unsigned char SAD1 :1; unsigned char SAD2 :1; unsigned char SAD3 :1; unsigned char SAD4 :1; unsigned char SAD5 :1; unsigned char SAD6 :1; } BIT; unsigned char BYTE; }; #define S0D2 (*(volatile union s0d2_t *)(0x02BB)) /*--------------------------------------------------------------------------------*/ /* Timer B3/B4/B5 Count Start Flag */ union tbsr_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char TB3S :1; unsigned char TB4S :1; unsigned char TB5S :1; } BIT; unsigned char BYTE; }; #define TBSR (*(volatile union tbsr_t *)(0x0300)) /*--------------------------------------------------------------------------------*/ /* Timer A1-1 Register */ #define TA11 (*(volatile union register16_t *)(0x0302)) /*--------------------------------------------------------------------------------*/ /* Timer A2-1 Register */ #define TA21 (*(volatile union register16_t *)(0x0304)) /*--------------------------------------------------------------------------------*/ /* Timer A4-1 Register */ #define TA41 (*(volatile union register16_t *)(0x0306)) /*--------------------------------------------------------------------------------*/ /* Three-Phase PWM Control Register 0 */ union invc0_t { struct { unsigned char INV00 :1; unsigned char INV01 :1; unsigned char INV02 :1; unsigned char INV03 :1; unsigned char INV04 :1; unsigned char INV05 :1; unsigned char INV06 :1; unsigned char INV07 :1; } BIT; unsigned char BYTE; }; #define INVC0 (*(volatile union invc0_t *)(0x0308)) /*--------------------------------------------------------------------------------*/ /* Three-Phase PWM Control Register 1 */ union invc1_t { struct { unsigned char INV10 :1; unsigned char INV11 :1; unsigned char INV12 :1; unsigned char INV13 :1; unsigned char INV14 :1; unsigned char INV15 :1; unsigned char INV16 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define INVC1 (*(volatile union invc1_t *)(0x0309)) /*--------------------------------------------------------------------------------*/ /* Three-Phase Output Buffer Register 0 */ union idb0_t { struct { unsigned char DU0 :1; unsigned char DUB0 :1; unsigned char DV0 :1; unsigned char DVB0 :1; unsigned char DW0 :1; unsigned char DWB0 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define IDB0 (*(volatile union idb0_t *)(0x030A)) /*--------------------------------------------------------------------------------*/ /* Three-Phase Output Buffer Register 1 */ union idb1_t { struct { unsigned char DU1 :1; unsigned char DUB1 :1; unsigned char DV1 :1; unsigned char DVB1 :1; unsigned char DW1 :1; unsigned char DWB1 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define IDB1 (*(volatile union idb1_t *)(0x030B)) /*--------------------------------------------------------------------------------*/ /* Dead Time Timer */ #define DTT (*(volatile union register8_t *)(0x030C)) /*--------------------------------------------------------------------------------*/ /* Timer B2 Interrupt Generation Frequency Set Counter */ #define ICTB2 (*(volatile union register8_t *)(0x030D)) /*--------------------------------------------------------------------------------*/ /* Position-Data-Retain Function Control Register */ union pdrf_t { struct { unsigned char PDRW :1; unsigned char PDRV :1; unsigned char PDRU :1; unsigned char PDRT :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PDRF (*(volatile union pdrf_t *)(0x030E)) /*--------------------------------------------------------------------------------*/ /* Timer B3 Register */ #define TB3 (*(volatile union register16_t *)(0x0310)) /*--------------------------------------------------------------------------------*/ /* Timer B4 Register */ #define TB4 (*(volatile union register16_t *)(0x0312)) /*--------------------------------------------------------------------------------*/ /* Timer B5 Register */ #define TB5 (*(volatile union register16_t *)(0x0314)) /*--------------------------------------------------------------------------------*/ /* Port Function Control Register */ union pfcr_t { struct { unsigned char PFC0 :1; unsigned char PFC1 :1; unsigned char PFC2 :1; unsigned char PFC3 :1; unsigned char PFC4 :1; unsigned char PFC5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PFCR (*(volatile union pfcr_t *)(0x0318)) /*--------------------------------------------------------------------------------*/ /* Timer B3 Mode Register */ union tb3mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char bit4 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TB3MR (*(volatile union tb3mr_t *)(0x031B)) /*--------------------------------------------------------------------------------*/ /* Timer B4 Mode Register */ union tb4mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char bit4 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TB4MR (*(volatile union tb4mr_t *)(0x031C)) /*--------------------------------------------------------------------------------*/ /* Timer B5 Mode Register */ union tb5mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char bit4 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TB5MR (*(volatile union tb5mr_t *)(0x031D)) /*--------------------------------------------------------------------------------*/ /* Count Start Flag */ union tabsr_t { struct { unsigned char TA0S :1; unsigned char TA1S :1; unsigned char TA2S :1; unsigned char TA3S :1; unsigned char TA4S :1; unsigned char TB0S :1; unsigned char TB1S :1; unsigned char TB2S :1; } BIT; unsigned char BYTE; }; #define TABSR (*(volatile union tabsr_t *)(0x0320)) /*--------------------------------------------------------------------------------*/ /* One-Shot Start Flag */ union onsf_t { struct { unsigned char TA0OS :1; unsigned char TA1OS :1; unsigned char TA2OS :1; unsigned char TA3OS :1; unsigned char TA4OS :1; unsigned char TAZIE :1; unsigned char TA0TGL :1; unsigned char TA0TGH :1; } BIT; unsigned char BYTE; }; #define ONSF (*(volatile union onsf_t *)(0x0322)) /*--------------------------------------------------------------------------------*/ /* Trigger Select Register */ union trgsr_t { struct { unsigned char TA1TGL :1; unsigned char TA1TGH :1; unsigned char TA2TGL :1; unsigned char TA2TGH :1; unsigned char TA3TGL :1; unsigned char TA3TGH :1; unsigned char TA4TGL :1; unsigned char TA4TGH :1; } BIT; unsigned char BYTE; }; #define TRGSR (*(volatile union trgsr_t *)(0x0323)) /*--------------------------------------------------------------------------------*/ /* Up/Down Flag */ union udf_t { struct { unsigned char TA0UD :1; unsigned char TA1UD :1; unsigned char TA2UD :1; unsigned char TA3UD :1; unsigned char TA4UD :1; unsigned char TA2P :1; unsigned char TA3P :1; unsigned char TA4P :1; } BIT; unsigned char BYTE; }; #define UDF (*(volatile unsigned char *)(0x0324)) /*--------------------------------------------------------------------------------*/ /* Timer A0 Register */ #define TA0 (*(volatile union register16_t *)(0x0326)) /*--------------------------------------------------------------------------------*/ /* Timer A1 Register */ #define TA1 (*(volatile union register16_t *)(0x0328)) /*--------------------------------------------------------------------------------*/ /* Timer A2 Register */ #define TA2 (*(volatile union register16_t *)(0x032A)) /*--------------------------------------------------------------------------------*/ /* Timer A3 Register */ #define TA3 (*(volatile union register16_t *)(0x032C)) /*--------------------------------------------------------------------------------*/ /* Timer A4 Register */ #define TA4 (*(volatile union register16_t *)(0x032E)) /*--------------------------------------------------------------------------------*/ /* Timer B0 Register */ #define TB0 (*(volatile union register16_t *)(0x0330)) /*--------------------------------------------------------------------------------*/ /* Timer B1 Register */ #define TB1 (*(volatile union register16_t *)(0x0332)) /*--------------------------------------------------------------------------------*/ /* Timer B2 Register */ #define TB2 (*(volatile union register16_t *)(0x0334)) /*--------------------------------------------------------------------------------*/ /* Timer A0 Mode Register */ union ta0mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char MR2 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TA0MR (*(volatile union ta0mr_t *)(0x0336)) /*--------------------------------------------------------------------------------*/ /* Timer A1 Mode Register */ union ta1mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char MR2 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TA1MR (*(volatile union ta1mr_t *)(0x0337)) /*--------------------------------------------------------------------------------*/ /* Timer A2 Mode Register */ union ta2mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char MR2 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TA2MR (*(volatile union ta2mr_t *)(0x0338)) /*--------------------------------------------------------------------------------*/ /* Timer A3 Mode Register */ union ta3mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char MR2 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TA3MR (*(volatile union ta3mr_t *)(0x0339)) /*--------------------------------------------------------------------------------*/ /* Timer A4 Mode Register */ union ta4mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char MR2 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TA4MR (*(volatile union ta4mr_t *)(0x033A)) /*--------------------------------------------------------------------------------*/ /* Timer B0 Mode Register */ union tb0mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char bit4 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TB0MR (*(volatile union tb0mr_t *)(0x033B)) /*--------------------------------------------------------------------------------*/ /* Timer B1 Mode Register */ union tb1mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char bit4 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TB1MR (*(volatile union tb1mr_t *)(0x033C)) /*--------------------------------------------------------------------------------*/ /* Timer B2 Mode Register */ union tb2mr_t { struct { unsigned char TMOD0 :1; unsigned char TMOD1 :1; unsigned char MR0 :1; unsigned char MR1 :1; unsigned char bit4 :1; unsigned char MR3 :1; unsigned char TCK0 :1; unsigned char TCK1 :1; } BIT; unsigned char BYTE; }; #define TB2MR (*(volatile union tb2mr_t *)(0x033D)) /*--------------------------------------------------------------------------------*/ /* Timer B2 Special Mode Register */ union tb2sc_t { struct { unsigned char PWCON :1; unsigned char IVPCR1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define TB2SC (*(volatile union tb2sc_t *)(0x033E)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Second Data Register */ union rtcsec_t { struct { unsigned char SC00 :1; unsigned char SC01 :1; unsigned char SC02 :1; unsigned char SC03 :1; unsigned char SC10 :1; unsigned char SC11 :1; unsigned char SC12 :1; unsigned char BSY :1; } BIT; unsigned char BYTE; }; #define RTCSEC (*(volatile union rtcsec_t *)(0x0340)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Minute Data Register */ union rtcmin_t { struct { unsigned char MN00 :1; unsigned char MN01 :1; unsigned char MN02 :1; unsigned char MN03 :1; unsigned char MN10 :1; unsigned char MN11 :1; unsigned char MN12 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RTCMIN (*(volatile union rtcmin_t *)(0x0341)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Hour Data Register */ union rtchr_t { struct { unsigned char HR00 :1; unsigned char HR01 :1; unsigned char HR02 :1; unsigned char HR03 :1; unsigned char HR10 :1; unsigned char HR11 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RTCHR (*(volatile union rtchr_t *)(0x0342)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Day Data Register */ union rtcwk_t { struct { unsigned char WK0 :1; unsigned char WK1 :1; unsigned char WK2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RTCWK (*(volatile union rtcwk_t *)(0x0343)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Control Register 1 */ union rtccr1_t { struct { unsigned char bit0 :1; unsigned char TCSTF :1; unsigned char TOENA :1; unsigned char bit3 :1; unsigned char RTCRST :1; unsigned char RTCPM :1; unsigned char H12H24 :1; unsigned char TSTART :1; } BIT; unsigned char BYTE; }; #define RTCCR1 (*(volatile union rtccr1_t *)(0x0344)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Control Register 2 */ union rtccr2_t { struct { unsigned char SEIE :1; unsigned char MNIE :1; unsigned char HRIE :1; unsigned char DYIE :1; unsigned char WKIE :1; unsigned char RTCCMP0 :1; unsigned char RTCCMP2 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RTCCR2 (*(volatile union rtccr2_t *)(0x0345)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Count Source Select Register */ union rtccsr_t { struct { unsigned char RCS0 :1; unsigned char RCS1 :1; unsigned char RCS2 :1; unsigned char RCS3 :1; unsigned char RCS4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RTCCSR (*(volatile union rtccsr_t *)(0x0346)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Second Compare Data Register */ union rtccsec_t { struct { unsigned char SCMP00 :1; unsigned char SCMP01 :1; unsigned char SCMP02 :1; unsigned char SCMP03 :1; unsigned char SCMP10 :1; unsigned char SCMP11 :1; unsigned char SCMP12 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RTCCSEC (*(volatile union rtccsec_t *)(0x0348)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Minute Compare Data Register */ union rtccmin_t { struct { unsigned char MCMP00 :1; unsigned char MCMP01 :1; unsigned char MCMP02 :1; unsigned char MCMP03 :1; unsigned char MCMP10 :1; unsigned char MCMP11 :1; unsigned char MCMP12 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RTCCMIN (*(volatile union rtccmin_t *)(0x0349)) /*--------------------------------------------------------------------------------*/ /* Real-Time Clock Hour Compare Data Register */ union rtcchr_t { struct { unsigned char HCMP00 :1; unsigned char HCMP01 :1; unsigned char HCMP02 :1; unsigned char HCMP03 :1; unsigned char HCMP10 :1; unsigned char HCMP11 :1; unsigned char PMCMP :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define RTCCHR (*(volatile union rtcchr_t *)(0x034A)) /*--------------------------------------------------------------------------------*/ /* CEC Function Control Register 1 */ union cecc1_t { struct { unsigned char CECEN :1; unsigned char CCLK0 :1; unsigned char CCLK1 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define CECC1 (*(volatile union cecc1_t *)(0x0350)) /*--------------------------------------------------------------------------------*/ /* CEC Function Control Register 2 */ union cecc2_t { struct { unsigned char CRRNG :1; unsigned char CTNACK :1; unsigned char CTACKEN :1; unsigned char CRACK :1; unsigned char CTABTS :1; unsigned char CFIL :1; unsigned char CSTRRNG :1; unsigned char CDATRNG :1; } BIT; unsigned char BYTE; }; #define CECC2 (*(volatile union cecc2_t *)(0x0351)) /*--------------------------------------------------------------------------------*/ /* CEC Function Control Register 3 */ union cecc3_t { struct { unsigned char CTXDEN :1; unsigned char CRXDEN :1; unsigned char CREGCLR :1; unsigned char CEOMI :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define CECC3 (*(volatile union cecc3_t *)(0x0352)) /*--------------------------------------------------------------------------------*/ /* CEC Function Control Register 4 */ union cecc4_t { struct { unsigned char CRISE0 :1; unsigned char CRISE1 :1; unsigned char CRISE2 :1; unsigned char CABTEN :1; unsigned char CFALL0 :1; unsigned char CFALL1 :1; unsigned char CREGFLG :1; unsigned char CABTWEN :1; } BIT; unsigned char BYTE; }; #define CECC4 (*(volatile union cecc4_t *)(0x0353)) /*--------------------------------------------------------------------------------*/ /* CEC Flag Register */ union cecflg_t { struct { unsigned char CRFLG :1; unsigned char CTFLG :1; unsigned char CRERRFLG :1; unsigned char CTABTFLG :1; unsigned char CTNACKFLG :1; unsigned char CRD8FLG :1; unsigned char CTD8FLG :1; unsigned char CRSTFLG :1; } BIT; unsigned char BYTE; }; #define CECFLG (*(volatile union cecflg_t *)(0x0354)) /*--------------------------------------------------------------------------------*/ /* CEC Interrupt Source Select Register */ union cisel_t { struct { unsigned char CRISEL0 :1; unsigned char CRISEL1 :1; unsigned char CRISEL2 :1; unsigned char CRISELM :1; unsigned char CTISEL0 :1; unsigned char CTISEL1 :1; unsigned char CTISEL2 :1; unsigned char CRISELS :1; } BIT; unsigned char BYTE; }; #define CISEL (*(volatile union cisel_t *)(0x0355)) /*--------------------------------------------------------------------------------*/ /* CEC Transmit Buffer Register 1 */ #define CCTB1 (*(volatile union register8_t *)(0x0356)) /*--------------------------------------------------------------------------------*/ /* CEC Transmit Buffer Register 2 */ union cctb2_t { struct { unsigned char CCTBE :1; unsigned char CCTBA :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define CCTB2 (*(volatile union cctb2_t *)(0x0357)) /*--------------------------------------------------------------------------------*/ /* CEC Receive Buffer Register 1 */ #define CCRB1 (*(volatile union register8_t *)(0x0358)) /*--------------------------------------------------------------------------------*/ /* CEC Receive Buffer Register 2 */ union ccrb2_t { struct { unsigned char CCRBE :1; unsigned char CCRBAO :1; unsigned char CCRBAI :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define CCRB2 (*(volatile union ccrb2_t *)(0x0359)) /*--------------------------------------------------------------------------------*/ /* CEC Receive Follower Address Set Register 1 */ union cradri1_t { struct { unsigned char CRADRI10 :1; unsigned char CRADRI11 :1; unsigned char CRADRI12 :1; unsigned char CRADRI13 :1; unsigned char CRADRI14 :1; unsigned char CRADRI15 :1; unsigned char CRADRI16 :1; unsigned char CRADRI17 :1; } BIT; unsigned char BYTE; }; #define CRADRI1 (*(volatile union cradri1_t *)(0x035A)) /*--------------------------------------------------------------------------------*/ /* CEC Receive Follower Address Set Register 2 */ union cradri2_t { struct { unsigned char CRADRI20 :1; unsigned char CRADRI21 :1; unsigned char CRADRI22 :1; unsigned char CRADRI23 :1; unsigned char CRADRI24 :1; unsigned char CRADRI25 :1; unsigned char CRADRI26 :1; unsigned char CRADRI27 :1; } BIT; unsigned char BYTE; }; #define CRADRI2 (*(volatile union cradri2_t *)(0x035B)) /*--------------------------------------------------------------------------------*/ /* Pull-Up Control Register 0 */ union pur0_t { struct { unsigned char PU00 :1; unsigned char PU01 :1; unsigned char PU02 :1; unsigned char PU03 :1; unsigned char PU04 :1; unsigned char PU05 :1; unsigned char PU06 :1; unsigned char PU07 :1; } BIT; unsigned char BYTE; }; #define PUR0 (*(volatile union pur0_t *)(0x0360)) /*--------------------------------------------------------------------------------*/ /* Pull-Up Control Register 1 */ union pur1_t { struct { unsigned char PU10 :1; unsigned char PU11 :1; unsigned char PU12 :1; unsigned char PU13 :1; unsigned char PU14 :1; unsigned char PU15 :1; unsigned char PU16 :1; unsigned char PU17 :1; } BIT; unsigned char BYTE; }; #define PUR1 (*(volatile union pur1_t *)(0x0361)) /*--------------------------------------------------------------------------------*/ /* Pull-Up Control Register 2 */ union pur2_t { struct { unsigned char PU20 :1; unsigned char PU21 :1; unsigned char PU22 :1; unsigned char PU23 :1; unsigned char PU24 :1; unsigned char PU25 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PUR2 (*(volatile union pur2_t *)(0x0362)) /*--------------------------------------------------------------------------------*/ /* Pull-Up Control Register 3 */ union pur3_t { struct { unsigned char PU30 :1; unsigned char PU31 :1; unsigned char PU32 :1; unsigned char PU33 :1; unsigned char PU34 :1; unsigned char PU35 :1; unsigned char PU36 :1; unsigned char PU37 :1; } BIT; unsigned char BYTE; }; #define PUR3 (*(volatile union pur3_t *)(0x0363)) /*--------------------------------------------------------------------------------*/ /* Port Control Register */ union pcr_t { struct { unsigned char PCR0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char PCR4 :1; unsigned char PCR5 :1; unsigned char PCR6 :1; unsigned char PCR7 :1; } BIT; unsigned char BYTE; }; #define PCR (*(volatile union pcr_t *)(0x0366)) /*--------------------------------------------------------------------------------*/ /* NMI/SD Digital Filter Register */ union nmidf_t { struct { unsigned char NMIDF0 :1; unsigned char NMIDF1 :1; unsigned char NMIDF2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define NMIDF (*(volatile union nmidf_t *)(0x0369)) /*--------------------------------------------------------------------------------*/ /* PWM Control Register 0 */ union pwmcon0_t { struct { unsigned char PWMSEL0 :1; unsigned char PWMSEL1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char PWMCLK0 :1; unsigned char PWMCLK1 :1; } BIT; unsigned char BYTE; }; #define PWMCON0 (*(volatile union pwmcon0_t *)(0x0370)) /*--------------------------------------------------------------------------------*/ /* PWM0 Prescaler */ #define PWMPRE0 (*(volatile union register8_t *)(0x0372)) /*--------------------------------------------------------------------------------*/ /* PWM0 Register */ #define PWMREG0 (*(volatile union register8_t *)(0x0373)) /*--------------------------------------------------------------------------------*/ /* PWM1 Prescaler */ #define PWMPRE1 (*(volatile union register8_t *)(0x0374)) /*--------------------------------------------------------------------------------*/ /* PWM1 Register */ #define PWMREG1 (*(volatile union register8_t *)(0x0375)) /*--------------------------------------------------------------------------------*/ /* PWM Control Register 1 */ union pwmcon1_t { struct { unsigned char PWMEN0 :1; unsigned char PWMEN1 :1; unsigned char PWMPORT0 :1; unsigned char PWMPORT1 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PWMCON1 (*(volatile union pwmcon1_t *)(0x0376)) /*--------------------------------------------------------------------------------*/ /* Count Source Protection Mode Register */ union cspr_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char CSPRO :1; } BIT; unsigned char BYTE; }; #define CSPR (*(volatile union cspr_t *)(0x037C)) /*--------------------------------------------------------------------------------*/ /* Watchdog Timer Refresh Register */ #define WDTR (*(volatile union register8_t *)(0x037D)) /*--------------------------------------------------------------------------------*/ /* Watchdog Timer Start Register */ #define WDTS (*(volatile union register8_t *)(0x037E)) /*--------------------------------------------------------------------------------*/ /* Watchdog Timer Control Register */ union wdc_t { struct { unsigned char WDC0 :1; unsigned char WDC1 :1; unsigned char WDC2 :1; unsigned char WDC3 :1; unsigned char WDC4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char WDC7 :1; } BIT; unsigned char BYTE; }; #define WDC (*(volatile union wdc_t *)(0x037F)) /*--------------------------------------------------------------------------------*/ /* DMA2 Source Select Register */ union dm2sl_t { struct { unsigned char DSEL0 :1; unsigned char DSEL1 :1; unsigned char DSEL2 :1; unsigned char DSEL3 :1; unsigned char DSEL4 :1; unsigned char bit5 :1; unsigned char DMS :1; unsigned char DSR :1; } BIT; unsigned char BYTE; }; #define DM2SL (*(volatile union dm2sl_t *)(0x0390)) /*--------------------------------------------------------------------------------*/ /* DMA3 Source Select Register */ union dm3sl_t { struct { unsigned char DSEL0 :1; unsigned char DSEL1 :1; unsigned char DSEL2 :1; unsigned char DSEL3 :1; unsigned char DSEL4 :1; unsigned char bit5 :1; unsigned char DMS :1; unsigned char DSR :1; } BIT; unsigned char BYTE; }; #define DM3SL (*(volatile union dm3sl_t *)(0x0392)) /*--------------------------------------------------------------------------------*/ /* DMA0 Source Select Register */ union dm0sl_t { struct { unsigned char DSEL0 :1; unsigned char DSEL1 :1; unsigned char DSEL2 :1; unsigned char DSEL3 :1; unsigned char DSEL4 :1; unsigned char bit5 :1; unsigned char DMS :1; unsigned char DSR :1; } BIT; unsigned char BYTE; }; #define DM0SL (*(volatile union dm0sl_t *)(0x0398)) /*--------------------------------------------------------------------------------*/ /* DMA1 Source Select Register */ union dm1sl_t { struct { unsigned char DSEL0 :1; unsigned char DSEL1 :1; unsigned char DSEL2 :1; unsigned char DSEL3 :1; unsigned char DSEL4 :1; unsigned char bit5 :1; unsigned char DMS :1; unsigned char DSR :1; } BIT; unsigned char BYTE; }; #define DM1SL (*(volatile union dm1sl_t *)(0x039A)) /*--------------------------------------------------------------------------------*/ /* Open-Circuit Detection Assist Function Register */ union ainrst_t { struct { unsigned char bit0 :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char AINRST0 :1; unsigned char AINRST1 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define AINRST (*(volatile union ainrst_t *)(0x03A2)) /*--------------------------------------------------------------------------------*/ /* SFR Snoop Address Register */ union crcsar_t { struct { unsigned char CRCSAR0 :1; unsigned char CRCSAR1 :1; unsigned char CRCSAR2 :1; unsigned char CRCSAR3 :1; unsigned char CRCSAR4 :1; unsigned char CRCSAR5 :1; unsigned char CRCSAR6 :1; unsigned char CRCSAR7 :1; unsigned char CRCSAR8 :1; unsigned char CRCSAR9 :1; unsigned char bit10 :1; unsigned char bit11 :1; unsigned char bit12 :1; unsigned char bit13 :1; unsigned char CRCSR :1; unsigned char CRCSW :1; } BIT; struct { unsigned char BYTE0; unsigned char BYTE1; } BYTES; unsigned short WORD; }; #define CRCSAR (*(volatile union crcsar_t *)(0x03B4)) /*--------------------------------------------------------------------------------*/ /* CRC Data Register */ #define CRCD (*(volatile union register16_t *)(0x03BC)) /*--------------------------------------------------------------------------------*/ /* CRC Input Register */ #define CRCIN (*(volatile union register8_t *)(0x03BE)) /*--------------------------------------------------------------------------------*/ /* CRC Mode Register */ union crcmr_t { struct { unsigned char CRCPS :1; unsigned char bit1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char CRCMS :1; } BIT; unsigned char BYTE; }; #define CRCMR (*(volatile union crcmr_t *)(0x03B6)) /*--------------------------------------------------------------------------------*/ /* A/D Register 0 */ #define AD0 (*(volatile union register16_t *)(0x03C0)) /*--------------------------------------------------------------------------------*/ /* A/D Register 1 */ #define AD1 (*(volatile union register16_t *)(0x03C2)) /*--------------------------------------------------------------------------------*/ /* A/D Register 2 */ #define AD2 (*(volatile union register16_t *)(0x03C4)) /*--------------------------------------------------------------------------------*/ /* A/D Register 3 */ #define AD3 (*(volatile union register16_t *)(0x03C6)) /*--------------------------------------------------------------------------------*/ /* A/D Register 4 */ #define AD4 (*(volatile union register16_t *)(0x03C8)) /*--------------------------------------------------------------------------------*/ /* A/D Register 5 */ #define AD5 (*(volatile union register16_t *)(0x03CA)) /*--------------------------------------------------------------------------------*/ /* A/D Register 6 */ #define AD6 (*(volatile union register16_t *)(0x03CC)) /*--------------------------------------------------------------------------------*/ /* A/D Register 7 */ #define AD7 (*(volatile union register16_t *)(0x03CE)) /*--------------------------------------------------------------------------------*/ /* A/D Control Register 2 */ union adcon2_t { struct { unsigned char bit0 :1; unsigned char ADGSEL0 :1; unsigned char ADGSEL1 :1; unsigned char bit3 :1; unsigned char CKS2 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char CKS3 :1; } BIT; unsigned char BYTE; }; #define ADCON2 (*(volatile union adcon2_t *)(0x03D4)) /*--------------------------------------------------------------------------------*/ /* A/D Control Register 0 */ union adcon0_t { struct { unsigned char CH0 :1; unsigned char CH1 :1; unsigned char CH2 :1; unsigned char MD0 :1; unsigned char MD1 :1; unsigned char TRG :1; unsigned char ADST :1; unsigned char CKS0 :1; } BIT; unsigned char BYTE; }; #define ADCON0 (*(volatile union adcon0_t *)(0x03D6)) /*--------------------------------------------------------------------------------*/ /* A/D Control Register 1 */ union adcon1_t { struct { unsigned char SCAN0 :1; unsigned char SCAN1 :1; unsigned char MD2 :1; unsigned char bit3 :1; unsigned char CKS1 :1; unsigned char ADSTBY :1; unsigned char ADEX0 :1; unsigned char ADEX1 :1; } BIT; unsigned char BYTE; }; #define ADCON1 (*(volatile union adcon1_t *)(0x03D7)) /*--------------------------------------------------------------------------------*/ /* D/A0 Register */ #define DA0 (*(volatile union register8_t *)(0x03D8)) /*--------------------------------------------------------------------------------*/ /* D/A1 Register */ #define DA1 (*(volatile union register8_t *)(0x03DA)) /*--------------------------------------------------------------------------------*/ /* D/A Control Register */ union dacon_t { struct { unsigned char DA0E :1; unsigned char DA1E :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define DACON (*(volatile union dacon_t *)(0x03DC)) /*--------------------------------------------------------------------------------*/ /* Port P0 Register */ union p0_t { struct { unsigned char P0_0 :1; unsigned char P0_1 :1; unsigned char P0_2 :1; unsigned char P0_3 :1; unsigned char P0_4 :1; unsigned char P0_5 :1; unsigned char P0_6 :1; unsigned char P0_7 :1; } BIT; unsigned char BYTE; }; #define P0 (*(volatile union p0_t *)(0x03E0)) /*--------------------------------------------------------------------------------*/ /* Port P1 Register */ union p1_t { struct { unsigned char P1_0 :1; unsigned char P1_1 :1; unsigned char P1_2 :1; unsigned char P1_3 :1; unsigned char P1_4 :1; unsigned char P1_5 :1; unsigned char P1_6 :1; unsigned char P1_7 :1; } BIT; unsigned char BYTE; }; #define P1 (*(volatile union p1_t *)(0x03E1)) /*--------------------------------------------------------------------------------*/ /* Port P0 Direction Register */ union pd0_t { struct { unsigned char PD0_0 :1; unsigned char PD0_1 :1; unsigned char PD0_2 :1; unsigned char PD0_3 :1; unsigned char PD0_4 :1; unsigned char PD0_5 :1; unsigned char PD0_6 :1; unsigned char PD0_7 :1; } BIT; unsigned char BYTE; }; #define PD0 (*(volatile union pd0_t *)(0x03E2)) /*--------------------------------------------------------------------------------*/ /* Port P1 Direction Register */ union pd1_t { struct { unsigned char PD1_0 :1; unsigned char PD1_1 :1; unsigned char PD1_2 :1; unsigned char PD1_3 :1; unsigned char PD1_4 :1; unsigned char PD1_5 :1; unsigned char PD1_6 :1; unsigned char PD1_7 :1; } BIT; unsigned char BYTE; }; #define PD1 (*(volatile union pd1_t *)(0x03E3)) /*--------------------------------------------------------------------------------*/ /* Port P2 Register */ union p2_t { struct { unsigned char P2_0 :1; unsigned char P2_1 :1; unsigned char P2_2 :1; unsigned char P2_3 :1; unsigned char P2_4 :1; unsigned char P2_5 :1; unsigned char P2_6 :1; unsigned char P2_7 :1; } BIT; unsigned char BYTE; }; #define P2 (*(volatile union p2_t *)(0x03E4)) /*--------------------------------------------------------------------------------*/ /* Port P3 Register */ union p3_t { struct { unsigned char P3_0 :1; unsigned char P3_1 :1; unsigned char P3_2 :1; unsigned char P3_3 :1; unsigned char P3_4 :1; unsigned char P3_5 :1; unsigned char P3_6 :1; unsigned char P3_7 :1; } BIT; unsigned char BYTE; }; #define P3 (*(volatile union p3_t *)(0x03E5)) /*--------------------------------------------------------------------------------*/ /* Port P2 Direction Register */ union pd2_t { struct { unsigned char PD2_0 :1; unsigned char PD2_1 :1; unsigned char PD2_2 :1; unsigned char PD2_3 :1; unsigned char PD2_4 :1; unsigned char PD2_5 :1; unsigned char PD2_6 :1; unsigned char PD2_7 :1; } BIT; unsigned char BYTE; }; #define PD2 (*(volatile union pd2_t *)(0x03E6)) /*--------------------------------------------------------------------------------*/ /* Port P3 Direction Register */ union pd3_t { struct { unsigned char PD3_0 :1; unsigned char PD3_1 :1; unsigned char PD3_2 :1; unsigned char PD3_3 :1; unsigned char PD3_4 :1; unsigned char PD3_5 :1; unsigned char PD3_6 :1; unsigned char PD3_7 :1; } BIT; unsigned char BYTE; }; #define PD3 (*(volatile union pd3_t *)(0x03E7)) /*--------------------------------------------------------------------------------*/ /* Port P4 Register */ union p4_t { struct { unsigned char P4_0 :1; unsigned char P4_1 :1; unsigned char P4_2 :1; unsigned char P4_3 :1; unsigned char P4_4 :1; unsigned char P4_5 :1; unsigned char P4_6 :1; unsigned char P4_7 :1; } BIT; unsigned char BYTE; }; #define P4 (*(volatile union p4_t *)(0x03E8)) /*--------------------------------------------------------------------------------*/ /* Port P5 Register */ union p5_t { struct { unsigned char P5_0 :1; unsigned char P5_1 :1; unsigned char P5_2 :1; unsigned char P5_3 :1; unsigned char P5_4 :1; unsigned char P5_5 :1; unsigned char P5_6 :1; unsigned char P5_7 :1; } BIT; unsigned char BYTE; }; #define P5 (*(volatile union p5_t *)(0x03E9)) /*--------------------------------------------------------------------------------*/ /* Port P4 Direction Register */ union pd4_t { struct { unsigned char PD4_0 :1; unsigned char PD4_1 :1; unsigned char PD4_2 :1; unsigned char PD4_3 :1; unsigned char PD4_4 :1; unsigned char PD4_5 :1; unsigned char PD4_6 :1; unsigned char PD4_7 :1; } BIT; unsigned char BYTE; }; #define PD4 (*(volatile union pd4_t *)(0x03EA)) /*--------------------------------------------------------------------------------*/ /* Port P5 Direction Register */ union pd5_t { struct { unsigned char PD5_0 :1; unsigned char PD5_1 :1; unsigned char PD5_2 :1; unsigned char PD5_3 :1; unsigned char PD5_4 :1; unsigned char PD5_5 :1; unsigned char PD5_6 :1; unsigned char PD5_7 :1; } BIT; unsigned char BYTE; }; #define PD5 (*(volatile union pd5_t *)(0x03EB)) /*--------------------------------------------------------------------------------*/ /* Port P6 Register */ union p6_t { struct { unsigned char P6_0 :1; unsigned char P6_1 :1; unsigned char P6_2 :1; unsigned char P6_3 :1; unsigned char P6_4 :1; unsigned char P6_5 :1; unsigned char P6_6 :1; unsigned char P6_7 :1; } BIT; unsigned char BYTE; }; #define P6 (*(volatile union p6_t *)(0x03EC)) /*--------------------------------------------------------------------------------*/ /* Port P7 Register */ union p7_t { struct { unsigned char P7_0 :1; unsigned char P7_1 :1; unsigned char P7_2 :1; unsigned char P7_3 :1; unsigned char P7_4 :1; unsigned char P7_5 :1; unsigned char P7_6 :1; unsigned char P7_7 :1; } BIT; unsigned char BYTE; }; #define P7 (*(volatile union p7_t *)(0x03ED)) /*--------------------------------------------------------------------------------*/ /* Port P6 Direction Register */ union pd6_t { struct { unsigned char PD6_0 :1; unsigned char PD6_1 :1; unsigned char PD6_2 :1; unsigned char PD6_3 :1; unsigned char PD6_4 :1; unsigned char PD6_5 :1; unsigned char PD6_6 :1; unsigned char PD6_7 :1; } BIT; unsigned char BYTE; }; #define PD6 (*(volatile union pd6_t *)(0x03EE)) /*--------------------------------------------------------------------------------*/ /* Port P7 Direction Register */ union pd7_t { struct { unsigned char PD7_0 :1; unsigned char PD7_1 :1; unsigned char PD7_2 :1; unsigned char PD7_3 :1; unsigned char PD7_4 :1; unsigned char PD7_5 :1; unsigned char PD7_6 :1; unsigned char PD7_7 :1; } BIT; unsigned char BYTE; }; #define PD7 (*(volatile union pd7_t *)(0x03EF)) /*--------------------------------------------------------------------------------*/ /* Port P8 Register */ union p8_t { struct { unsigned char P8_0 :1; unsigned char P8_1 :1; unsigned char P8_2 :1; unsigned char P8_3 :1; unsigned char P8_4 :1; unsigned char P8_5 :1; unsigned char P8_6 :1; unsigned char P8_7 :1; } BIT; unsigned char BYTE; }; #define P8 (*(volatile union p8_t *)(0x03F0)) /*--------------------------------------------------------------------------------*/ /* Port P9 Register */ union p9_t { struct { unsigned char P9_0 :1; unsigned char P9_1 :1; unsigned char P9_2 :1; unsigned char P9_3 :1; unsigned char P9_4 :1; unsigned char P9_5 :1; unsigned char P9_6 :1; unsigned char P9_7 :1; } BIT; unsigned char BYTE; }; #define P9 (*(volatile union p9_t *)(0x03F1)) /*--------------------------------------------------------------------------------*/ /* Port P8 Direction Register */ union pd8_t { struct { unsigned char PD8_0 :1; unsigned char PD8_1 :1; unsigned char PD8_2 :1; unsigned char PD8_3 :1; unsigned char PD8_4 :1; unsigned char PD8_5 :1; unsigned char PD8_6 :1; unsigned char PD8_7 :1; } BIT; unsigned char BYTE; }; #define PD8 (*(volatile union pd8_t *)(0x03F2)) /*--------------------------------------------------------------------------------*/ /* Port P9 Direction Register */ union pd9_t { struct { unsigned char PD9_0 :1; unsigned char PD9_1 :1; unsigned char PD9_2 :1; unsigned char PD9_3 :1; unsigned char PD9_4 :1; unsigned char PD9_5 :1; unsigned char PD9_6 :1; unsigned char PD9_7 :1; } BIT; unsigned char BYTE; }; #define PD9 (*(volatile union pd9_t *)(0x03F3)) /*--------------------------------------------------------------------------------*/ /* Port P10 Register */ union p10_t { struct { unsigned char P10_0 :1; unsigned char P10_1 :1; unsigned char P10_2 :1; unsigned char P10_3 :1; unsigned char P10_4 :1; unsigned char P10_5 :1; unsigned char P10_6 :1; unsigned char P10_7 :1; } BIT; unsigned char BYTE; }; #define P10 (*(volatile union p10_t *)(0x03F4)) /*--------------------------------------------------------------------------------*/ /* Port P11 Register */ union p11_t { struct { unsigned char P11_0 :1; unsigned char P11_1 :1; unsigned char P11_2 :1; unsigned char P11_3 :1; unsigned char P11_4 :1; unsigned char P11_5 :1; unsigned char P11_6 :1; unsigned char P11_7 :1; } BIT; unsigned char BYTE; }; #define P11 (*(volatile union p11_t *)(0x03F5)) /*--------------------------------------------------------------------------------*/ /* Port P10 Direction Register */ union pd10_t { struct { unsigned char PD10_0 :1; unsigned char PD10_1 :1; unsigned char PD10_2 :1; unsigned char PD10_3 :1; unsigned char PD10_4 :1; unsigned char PD10_5 :1; unsigned char PD10_6 :1; unsigned char PD10_7 :1; } BIT; unsigned char BYTE; }; #define PD10 (*(volatile union pd10_t *)(0x03F6)) /*--------------------------------------------------------------------------------*/ /* Port P11 Direction Register */ union pd11_t { struct { unsigned char PD11_0 :1; unsigned char PD11_1 :1; unsigned char PD11_2 :1; unsigned char PD11_3 :1; unsigned char PD11_4 :1; unsigned char PD11_5 :1; unsigned char PD11_6 :1; unsigned char PD11_7 :1; } BIT; unsigned char BYTE; }; #define PD11 (*(volatile union pd11_t *)(0x03F7)) /*--------------------------------------------------------------------------------*/ /* Port P12 Register */ union p12_t { struct { unsigned char P12_0 :1; unsigned char P12_1 :1; unsigned char P12_2 :1; unsigned char P12_3 :1; unsigned char P12_4 :1; unsigned char P12_5 :1; unsigned char P12_6 :1; unsigned char P12_7 :1; } BIT; unsigned char BYTE; }; #define P12 (*(volatile union p12_t *)(0x03F8)) /*--------------------------------------------------------------------------------*/ /* Port P13 Register */ union p13_t { struct { unsigned char P13_0 :1; unsigned char P13_1 :1; unsigned char P13_2 :1; unsigned char P13_3 :1; unsigned char P13_4 :1; unsigned char P13_5 :1; unsigned char P13_6 :1; unsigned char P13_7 :1; } BIT; unsigned char BYTE; }; #define P13 (*(volatile union p13_t *)(0x03F9)) /*--------------------------------------------------------------------------------*/ /* Port P12 Direction Register */ union pd12_t { struct { unsigned char PD12_0 :1; unsigned char PD12_1 :1; unsigned char PD12_2 :1; unsigned char PD12_3 :1; unsigned char PD12_4 :1; unsigned char PD12_5 :1; unsigned char PD12_6 :1; unsigned char PD12_7 :1; } BIT; unsigned char BYTE; }; #define PD12 (*(volatile union pd12_t *)(0x03FA)) /*--------------------------------------------------------------------------------*/ /* Port P13 Direction Register */ union pd13_t { struct { unsigned char PD13_0 :1; unsigned char PD13_1 :1; unsigned char PD13_2 :1; unsigned char PD13_3 :1; unsigned char PD13_4 :1; unsigned char PD13_5 :1; unsigned char PD13_6 :1; unsigned char PD13_7 :1; } BIT; unsigned char BYTE; }; #define PD13 (*(volatile union pd13_t *)(0x03FB)) /*--------------------------------------------------------------------------------*/ /* Port P14 Register */ union p14_t { struct { unsigned char P14_0 :1; unsigned char P14_1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define P14 (*(volatile union p14_t *)(0x03FC)) /*--------------------------------------------------------------------------------*/ /* Port P14 Direction Register */ union pd14_t { struct { unsigned char PD14_0 :1; unsigned char PD14_1 :1; unsigned char bit2 :1; unsigned char bit3 :1; unsigned char bit4 :1; unsigned char bit5 :1; unsigned char bit6 :1; unsigned char bit7 :1; } BIT; unsigned char BYTE; }; #define PD14 (*(volatile union pd14_t *)(0x03FE)) /*--------------------------------------------------------------------------------*/ /* PMC0 Header Pattern Set Register (Min) */ #define PMC0HDPMIN (*(volatile union register16_t *)(0xD080)) /*--------------------------------------------------------------------------------*/ /* PMC0 Header Pattern Set Register (Max) */ #define PMC0HDPMAX (*(volatile union register16_t *)(0xD082)) /*--------------------------------------------------------------------------------*/ /* PMC0 Data 0 Pattern Set Register (Min) */ #define PMC0D0PMIN (*(volatile union register8_t *)(0xD084)) /*--------------------------------------------------------------------------------*/ /* PMC0 Data 0 Pattern Set Register (Max) */ #define PMC0D0PMAX (*(volatile union register8_t *)(0xD085)) /*--------------------------------------------------------------------------------*/ /* PMC0 Data 1 Pattern Set Register (Min) */ #define PMC0D1PMIN (*(volatile union register8_t *)(0xD086)) /*--------------------------------------------------------------------------------*/ /* PMC0 Data 1 Pattern Set Register (Max) */ #define PMC0D1PMAX (*(volatile union register8_t *)(0xD087)) /*--------------------------------------------------------------------------------*/ /* PMC0 Measurements Register */ #define PMC0TIM (*(volatile union register16_t *)(0xD088)) /*--------------------------------------------------------------------------------*/ /* PMC0 Counter Value Register */ #define PMC0BC (*(volatile union register16_t *)(0xD08A)) /*--------------------------------------------------------------------------------*/ /* PMC0 Receive Data Store Register 0 */ #define PMC0DAT0 (*(volatile union register8_t *)(0xD08C)) /*--------------------------------------------------------------------------------*/ /* PMC0 Receive Data Store Register 1 */ #define PMC0DAT1 (*(volatile union register8_t *)(0xD08D)) /*--------------------------------------------------------------------------------*/ /* PMC0 Receive Data Store Register 2 */ #define PMC0DAT2 (*(volatile union register8_t *)(0xD08E)) /*--------------------------------------------------------------------------------*/ /* PMC0 Receive Data Store Register 3 */ #define PMC0DAT3 (*(volatile union register8_t *)(0xD08F)) /*--------------------------------------------------------------------------------*/ /* PMC0 Receive Data Store Register 4 */ #define PMC0DAT4 (*(volatile union register8_t *)(0xD090)) /*--------------------------------------------------------------------------------*/ /* PMC0 Receive Data Store Register 5 */ #define PMC0DAT5 (*(volatile union register8_t *)(0xD091)) /*--------------------------------------------------------------------------------*/ /* PMC0 Receive Bit Count Register */ #define PMC0RBIT (*(volatile union register8_t *)(0xD092)) /*--------------------------------------------------------------------------------*/ /* PMC1 Header Pattern Set Register (Min) */ #define PMC1HDPMIN (*(volatile union register16_t *)(0xD094)) /*--------------------------------------------------------------------------------*/ /* PMC1 Header Pattern Set Register (Max) */ #define PMC1HDPMAX (*(volatile union register16_t *)(0xD096)) /*--------------------------------------------------------------------------------*/ /* PMC1 Data 0 Pattern Set Register (Min) */ #define PMC1D0PMIN (*(volatile union register8_t *)(0xD098)) /*--------------------------------------------------------------------------------*/ /* PMC1 Data 0 Pattern Set Register (Max) */ #define PMC1D0PMAX (*(volatile union register8_t *)(0xD099)) /*--------------------------------------------------------------------------------*/ /* PMC1 Data 1 Pattern Set Register (Min) */ #define PMC1D1PMIN (*(volatile union register8_t *)(0xD09A)) /*--------------------------------------------------------------------------------*/ /* PMC1 Data 1 Pattern Set Register (Max) */ #define PMC1D1PMAX (*(volatile union register8_t *)(0xD09B)) /*--------------------------------------------------------------------------------*/ /* PMC1 Measurements Register */ #define PMC1TIM (*(volatile union register16_t *)(0xD09C)) /*--------------------------------------------------------------------------------*/ /* PMC1 Counter Value Register */ #define PMC1BC (*(volatile union register16_t *)(0xD09E)) /*--------------------------------------------------------------------------------*/ #endif /* __IOM16C65_H__ */ tinyos-2.1.2+dfsg/tos/chips/m16c60/65/m16c60.h000066400000000000000000000040001207233610700201210ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * 62P specific includes and defines in the M16C/60 series. * * @author Henrik Makitaavola */ #ifndef __M16C60_H__ #define __M16C60_H__ #include "iom16c65.h" /* ADC Precision Settings */ enum { M16c60_ADC_PRECISION_10BIT = 0, }; #endif // __M16C60_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/McuSleepC.nc000077500000000000000000000042351207233610700207610ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring of TEP 112 (Microcontroller Power Management). * * @author Henrik Makitaavola */ configuration McuSleepC { provides interface McuSleep; provides interface McuPowerState; uses interface McuPowerOverride; } implementation { components McuSleepP, M16c60ControlC; McuSleep = McuSleepP; McuPowerState = McuSleepP; McuSleepP = McuPowerOverride; McuSleepP.M16c60Control -> M16c60ControlC; } tinyos-2.1.2+dfsg/tos/chips/m16c60/McuSleepP.nc000077500000000000000000000043721207233610700210000ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of TEP 112 (Microcontroller Power Management). * * @author Henrik Makitaavola */ module McuSleepP { provides interface McuSleep; provides interface McuPowerState; uses interface McuPowerOverride; uses interface M16c60Control; } implementation { async command void McuSleep.sleep() { call M16c60Control.sleep(); } async command void McuPowerState.update() { } default async command mcu_power_t McuPowerOverride.lowestState() { return M16C60_POWER_STOP; } } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/000077500000000000000000000000001207233610700173375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/Adc.h000077500000000000000000000012271207233610700202040ustar00rootroot00000000000000/* $Id: Adc.h,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * @author David Gay */ #ifndef __ADC_H__ #define __ADC_H__ #include "M16c60Adc.h" /* Read and ReadNow share client ids */ #define UQ_ADC_READ "adc.read" #define UQ_ADC_READNOW UQ_ADC_READ #define UQ_ADC_READSTREAM "adc.readstream" #endif // __ADC_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/AdcP.nc000077500000000000000000000106111207233610700204720ustar00rootroot00000000000000/* $Id: AdcP.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Convert M16c60 HAL A/D interface to the HIL interfaces. * @author Fan Zhang */ #include "Timer.h" module AdcP { provides { interface Read[uint8_t client]; interface ReadNow[uint8_t client]; } uses { interface M16c60AdcSingle; interface M16c60AdcConfig[uint8_t client]; } } implementation { enum { IDLE, ACQUIRE_DATA, ACQUIRE_DATA_NOW, }; /* Resource reservation is required, and it's incorrect to call getData again before dataReady is signaled, so there are no races in correct programs */ norace uint8_t state; norace uint8_t client; norace uint16_t val; uint8_t channel() { return call M16c60AdcConfig.getChannel[client](); } uint8_t precision() { return call M16c60AdcConfig.getPrecision[client](); } uint8_t prescaler() { return call M16c60AdcConfig.getPrescaler[client](); } void sample() { call M16c60AdcSingle.getData(channel(), precision(), prescaler()); } error_t startGet(uint8_t newState, uint8_t newClient) { /* Note: we retry imprecise results in dataReady */ state = newState; client = newClient; sample(); return SUCCESS; } command error_t Read.read[uint8_t c]() { return startGet(ACQUIRE_DATA, c); } async command error_t ReadNow.read[uint8_t c]() { return startGet(ACQUIRE_DATA_NOW, c); } task void acquiredData() { state = IDLE; signal Read.readDone[client](SUCCESS, val); } async event void M16c60AdcSingle.dataReady(uint16_t data, bool precise) { switch (state) { case ACQUIRE_DATA: if (!precise) sample(); else { val = data; post acquiredData(); } break; case ACQUIRE_DATA_NOW: if (!precise) sample(); else { state = IDLE; signal ReadNow.readDone[client](SUCCESS, data); } break; default: break; } } /* Configuration defaults. Read ground fast! ;-) */ default async command uint8_t M16c60AdcConfig.getChannel[uint8_t c]() { return M16c60_ADC_CHL_AN0; } default async command uint8_t M16c60AdcConfig.getPrecision[uint8_t c]() { return M16c60_ADC_PRECISION_10BIT; } default async command uint8_t M16c60AdcConfig.getPrescaler[uint8_t c]() { return M16c60_ADC_PRESCALE_2; } default event void Read.readDone[uint8_t c](error_t e, uint16_t d) { } default async event void ReadNow.readDone[uint8_t c](error_t e, uint16_t d) { } } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/AdcReadClientC.nc000077500000000000000000000022571207233610700224170ustar00rootroot00000000000000/* $Id: AdcReadClientC.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provide, as per TEP101, arbitrated access via a Read interface to the * M16c60 ADC. Users of this component must link it to an * implementation of M16c60AdcConfig which provides the ADC parameters * (channel, etc). * * @author Fan Zhang */ #include "Adc.h" generic configuration AdcReadClientC() { provides interface Read; uses { interface M16c60AdcConfig; interface ResourceConfigure; } } implementation { components WireAdcP, M16c60AdcC; enum { ID = unique(UQ_ADC_READ), HAL_ID = unique(UQ_M16c60ADC_RESOURCE) }; Read = WireAdcP.Read[ID]; M16c60AdcConfig = WireAdcP.M16c60AdcConfig[ID]; WireAdcP.Resource[ID] -> M16c60AdcC.Resource[HAL_ID]; ResourceConfigure = M16c60AdcC.ResourceConfigure[HAL_ID]; } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/AdcReadNowClientC.nc000077500000000000000000000023341207233610700230770ustar00rootroot00000000000000/* $Id: AdcReadNowClientC.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provide, as per TEP101, Resource-based access to the M16c60 ADC via a * ReadNow interface. Users of this component must link it to an * implementation of M16c60AdcConfig which provides the ADC parameters * (channel, etc). * * @author Fan Zhang */ #include "Adc.h" generic configuration AdcReadNowClientC() { provides { interface Resource; interface ReadNow; } uses { interface M16c60AdcConfig; interface ResourceConfigure; } } implementation { components WireAdcP, M16c60AdcC; enum { ID = unique(UQ_ADC_READNOW), HAL_ID = unique(UQ_M16c60ADC_RESOURCE) }; ReadNow = WireAdcP.ReadNow[ID]; M16c60AdcConfig = WireAdcP.M16c60AdcConfig[ID]; Resource = M16c60AdcC.Resource[HAL_ID]; ResourceConfigure = M16c60AdcC.ResourceConfigure[HAL_ID]; } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/AdcReadStreamClientC.nc000077500000000000000000000023611207233610700235670ustar00rootroot00000000000000/* $Id: AdcReadStreamClientC.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provide, as per TEP101, arbitrated access via a ReadStream interface to * the M16c60 ADC. Users of this component must link it to an * implementation of M16c60AdcConfig which provides the ADC parameters * (channel, etc). * * @author Fan Zhang */ #include "Adc.h" generic configuration AdcReadStreamClientC() { provides interface ReadStream; uses { interface M16c60AdcConfig; interface ResourceConfigure; } } implementation { components WireAdcStreamP, M16c60AdcC; enum { ID = unique(UQ_ADC_READSTREAM), HAL_ID = unique(UQ_M16c60ADC_RESOURCE) }; ReadStream = WireAdcStreamP.ReadStream[ID]; M16c60AdcConfig = WireAdcStreamP.M16c60AdcConfig[ID]; WireAdcStreamP.Resource[ID] -> M16c60AdcC.Resource[HAL_ID]; ResourceConfigure = M16c60AdcC.ResourceConfigure[HAL_ID]; } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/AdcStreamP.nc000077500000000000000000000162571207233610700216620ustar00rootroot00000000000000/* $Id: AdcStreamP.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Convert M16c60 HAL A/D interface to the HIL interfaces. * @author Fan Zhang */ #include "Timer.h" module AdcStreamP { provides { interface Init @atleastonce(); interface ReadStream[uint8_t client]; } uses { interface M16c60AdcSingle; interface M16c60AdcConfig[uint8_t client]; //interface M16c60Calibrate; interface Alarm; } } implementation { enum { NSTREAM = uniqueCount(UQ_ADC_READSTREAM) }; /* Resource reservation is required, and it's incorrect to call getData again before dataReady is signaled, so there are no races in correct programs */ norace uint8_t client = NSTREAM; /* Stream data */ struct list_entry_t { uint16_t count; struct list_entry_t * ONE_NOK next; }; struct list_entry_t *bufferQueue[NSTREAM]; struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM]; uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount; norace uint16_t count; norace uint16_t * COUNT_NOK(count) buffer; norace uint16_t * BND_NOK(buffer, buffer+count) pos; norace uint32_t now, period; command error_t Init.init() { uint8_t i; for (i = 0; i != NSTREAM; i++) bufferQueueEnd[i] = &bufferQueue[i]; return SUCCESS; } uint8_t channel() { return call M16c60AdcConfig.getChannel[client](); } uint8_t precision() { return call M16c60AdcConfig.getPrecision[client](); } uint8_t prescaler() { return call M16c60AdcConfig.getPrescaler[client](); } void sample() { call M16c60AdcSingle.getData(channel(), precision(), prescaler()); } command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) { if (n < sizeof(struct list_entry_t)) return ESIZE; atomic { struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf); if (!bufferQueueEnd[c]) // Can't post right now. return FAIL; newEntry->count = n; newEntry->next = NULL; *bufferQueueEnd[c] = newEntry; bufferQueueEnd[c] = &newEntry->next; } return SUCCESS; } task void readStreamDone() { uint8_t c = client; //uint32_t actualPeriod = call M16c60Calibrate.actualMicro(period); uint32_t actualPeriod = period; // fanzha not debug atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](SUCCESS, actualPeriod); } task void readStreamFail() { /* By now, the pending bufferDone has been signaled (see readStream). */ struct list_entry_t *entry; uint8_t c = client; atomic entry = bufferQueue[c]; for (; entry; entry = entry->next){ uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count; signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count); } atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](FAIL, 0); } task void bufferDone() { uint16_t *b, c; atomic { b = lastBuffer; c = lastCount; lastBuffer = NULL; } signal ReadStream.bufferDone[client](SUCCESS, b, c); } void nextAlarm() { call Alarm.startAt(now, period); now += period; } async event void Alarm.fired() { sample(); } command error_t ReadStream.read[uint8_t c](uint32_t usPeriod) { /* The first reading may be imprecise. So we just do a dummy read to get things rolling - this is indicated by setting count to 0 */ buffer = pos = NULL; count = 0; //period = call M16c60Calibrate.calibrateMicro(usPeriod); client = c; sample(); return SUCCESS; } void nextBuffer() { atomic { struct list_entry_t *entry = bufferQueue[client]; if (!entry) { // all done bufferQueueEnd[client] = NULL; // prevent post post readStreamDone(); } else { uint16_t tmp_count; bufferQueue[client] = entry->next; if (!bufferQueue[client]) bufferQueueEnd[client] = &bufferQueue[client]; pos = buffer = NULL; count = entry->count; tmp_count = count; pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry); nextAlarm(); } } } async event void M16c60AdcSingle.dataReady(uint16_t data, bool precise) { if (client == NSTREAM) return; if (count == 0) { now = call Alarm.getNow(); nextBuffer(); } else { *pos++ = data; if (pos == buffer + count) { atomic { if (lastBuffer) { /* We failed to signal bufferDone in time. Fail. */ bufferQueueEnd[client] = NULL; // prevent post post readStreamFail(); return; } else { lastCount = count; lastBuffer = buffer; } } post bufferDone(); nextBuffer(); } else nextAlarm(); } } /* Configuration defaults. Read ground fast! ;-) */ default async command uint8_t M16c60AdcConfig.getChannel[uint8_t c]() { return M16c60_ADC_CHL_AN0; } default async command uint8_t M16c60AdcConfig.getPrecision[uint8_t c]() { return M16c60_ADC_PRECISION_10BIT; } default async command uint8_t M16c60AdcConfig.getPrescaler[uint8_t c]() { return M16c60_ADC_PRESCALE_2; } } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/HplM16c60Adc.nc000077500000000000000000000127521207233610700216230ustar00rootroot00000000000000/// $Id: HplM16c60Adc.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "M16c60Adc.h" /** * HPL interface to the M16c60 A/D conversion subsystem. *

      * conversion when the ADC and ADC interrupt are enabled. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ interface HplM16c60Adc { /** * Read the ADCON0 (ADC control register 0) * @return Current ADCON0 value */ async command M16c60ADCON0_t getADCON0(); /** * Set the ADCON0 (ADC control register 0) * @param adcon0 New ADCON0 value */ async command void setADCON0(M16c60ADCON0_t adcon0); ///////////////////////////////////////////////////////////////////////////////// /** * Read the ADCON1 (ADC control) register * @return Current ADCON1 value */ async command M16c60ADCON1_t getADCON1(); /** * Set the ADCON1 (ADC control) register * @param adcon1 New ADCON1 value */ async command void setADCON1(M16c60ADCON1_t adcon1); ////////////////////////////////////////////////////////////////////////////////// /** * Read the ADCON2 (ADC control) register * @return Current ADCON2 value */ async command M16c60ADCON2_t getADCON2(); /** * Set the ADCON2 (ADC control) register * @param adcon2 New ADCON2 value */ async command void setADCON2(M16c60ADCON2_t adcon2); ///////////////////////////////////////////////////////////////////////////////// /** * Read the latest A/D conversion result * @return A/D value */ async command uint16_t getValue(); /// A/D control utilities. All of these clear any pending A/D interrupt. /** * Enable ADC sampling */ async command void enableAdc(); /** * Disable ADC sampling */ async command void disableAdc(); /** * Enable ADC interrupt */ async command void enableInterruption(); /** * Disable ADC interrupt */ async command void disableInterruption(); /** * Clear the ADC interrupt flag */ async command void resetInterrupt(); /** * Start ADC conversion. If ADC interrupts are enabled, the dataReady event * will be signaled once (in non-continuous mode) or repeatedly (in * continuous mode). */ async command void startConversion(); /** * Enable continuous sampling */ async command void setContinuous(); /** * Disable continuous sampling */ async command void setSingle(); /* A/D status checks */ /** * Is ADC enabled? * @return TRUE if the ADC is enabled, FALSE otherwise */ async command bool isEnabled(); /** * Is A/D conversion in progress? * @return TRUE if the A/D conversion is in progress, FALSE otherwise */ async command bool isStarted(); /** * Is A/D conversion complete? Note that this flag is automatically * cleared when an A/D interrupt occurs. * @return TRUE if the A/D conversion is complete, FALSE otherwise */ async command bool isComplete(); /** * Set ADC precision selection bits * @param scale New ADC prescision. Must be one of the M16c60_ADC_PRECISION_xxx * values from M16c60Adc.h */ async command void setPrecision(uint8_t precision); /** * Set ADC prescaler selection bits * @param scale New ADC prescaler. Must be one of the M16c60_ADC_PRESCALE_xxx * values from M16c60Adc.h */ async command void setPrescaler(uint8_t scale); /** * Cancel A/D conversion and any pending A/D interrupt. Also disables the * ADC interruption (otherwise a sample might start at the next sleep * instruction). This command can assume that the A/D converter is enabled. * @return TRUE if an A/D conversion was in progress or an A/D interrupt * was pending, FALSE otherwise. In single conversion mode, a return * of TRUE implies that the dataReady event will not be signaled. */ async command bool cancel(); /** * A/D interrupt occured * @param data Latest A/D conversion result */ async event void dataReady(uint16_t data); } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/HplM16c60AdcC.nc000077500000000000000000000041671207233610700217270ustar00rootroot00000000000000/// $Id: HplM16c60AdcC.nc,v 1.3 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "M16c60Adc.h" /** * HPL for the M16c60 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ configuration HplM16c60AdcC { provides interface HplM16c60Adc; } implementation { components HplM16c60AdcP, McuSleepC; HplM16c60Adc = HplM16c60AdcP; HplM16c60AdcP.McuPowerState -> McuSleepC; #ifdef THREADS components PlatformInterruptC; HplM16c60AdcP.PlatformInterrupt -> PlatformInterruptC; #endif } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/HplM16c60AdcP.nc000077500000000000000000000150561207233610700217430ustar00rootroot00000000000000/// $Id: HplM16c60AdcP.nc,v 1.3 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "M16c60Adc.h" /** * HPL for the M16c60 A/D conversion susbsystem. * * @author Fan Zhang * */ module HplM16c60AdcP { provides interface HplM16c60Adc; uses interface McuPowerState; #ifdef THREADS uses interface PlatformInterrupt; #define POST_AMBLE() call PlatformInterrupt.postAmble() #else #define POST_AMBLE() #endif } implementation { //=== Direct read of HW registers. ================================= async command M16c60ADCON0_t HplM16c60Adc.getADCON0() { return *(M16c60ADCON0_t*)&ADCON0; } async command M16c60ADCON1_t HplM16c60Adc.getADCON1() { return *(M16c60ADCON1_t*)&ADCON1; } async command M16c60ADCON2_t HplM16c60Adc.getADCON2() { return *(M16c60ADCON2_t*)&ADCON2; } async command uint16_t HplM16c60Adc.getValue() { uint8_t channel = ADCON0.BYTE&0x07; if(channel==0x00){return AD0.WORD;} else if(channel==0x01){return AD1.WORD;} else if(channel==0x02){return AD2.WORD;} else if(channel==0x03){return AD3.WORD;} else if(channel==0x04){return AD4.WORD;} else if(channel==0x05){return AD5.WORD;} else if(channel==0x06){return AD6.WORD;} else {return AD7.WORD;} } DEFINE_UNION_CAST(ADCON02int, M16c60ADCON0_t, uint8_t); // type change from M16c60ADCON0_t to uint8_t DEFINE_UNION_CAST(ADCON12int, M16c60ADCON1_t, uint8_t); DEFINE_UNION_CAST(ADCON22int, M16c60ADCON2_t, uint8_t); //=== Direct write of HW registers. ================================ async command void HplM16c60Adc.setADCON0( M16c60ADCON0_t x ) { ADCON0.BYTE = ADCON02int(x); } async command void HplM16c60Adc.setADCON1( M16c60ADCON1_t x ) { ADCON1.BYTE = ADCON12int(x); } async command void HplM16c60Adc.setADCON2( M16c60ADCON2_t x ) { ADCON2.BYTE = ADCON22int(x); } /* write the precision bit in the ADCON1 register, not supported on all models */ async command void HplM16c60Adc.setPrecision(uint8_t precision){ WRITE_BIT(ADCON1.BYTE, 3, precision); } /* Set ADC prescaler selection bits */ async command void HplM16c60Adc.setPrescaler(uint8_t scale){ if(scale == 0x00){ADCON2.BIT.CKS2=0;ADCON1.BIT.CKS1=0;ADCON0.BIT.CKS0=0;} // fAD/4 prescaler else if(scale == 0x01){ADCON2.BIT.CKS2=0;ADCON1.BIT.CKS1=0;ADCON0.BIT.CKS0=1;} // fAD/2 prescaler else if((scale == 0x02) || (scale == 0x03)){ADCON2.BIT.CKS2=0;ADCON1.BIT.CKS1=1;ADCON0.BIT.CKS0=0;} // fAD prescaler else if(scale == 0x04){ADCON2.BIT.CKS2=1;ADCON1.BIT.CKS1=0;ADCON0.BIT.CKS0=0;} // fAD/12 prescaler else if(scale == 0x05){ADCON2.BIT.CKS2=1;ADCON1.BIT.CKS1=0;ADCON0.BIT.CKS0=1;} // fAD/6 prescaler else if((scale == 0x06) || (scale == 0x07)){ADCON2.BIT.CKS2=1;ADCON1.BIT.CKS1=1;ADCON0.BIT.CKS0=0;} // fAD/3 prescaler } // Individual bit manipulation. These all clear any pending A/D interrupt. async command void HplM16c60Adc.enableAdc() { SET_BIT(ADCON1.BYTE, 5); call McuPowerState.update(); } async command void HplM16c60Adc.disableAdc() { CLR_BIT(ADCON1.BYTE, 5); call McuPowerState.update(); } // A/D conversion interrupt control register is ADIC 2009-2-9 by Fan Zhang async command void HplM16c60Adc.enableInterruption() { ADIC.BIT.ILVL2=0;ADIC.BIT.ILVL1=0;ADIC.BIT.ILVL0=1; } async command void HplM16c60Adc.disableInterruption() { ADIC.BIT.ILVL2=0;ADIC.BIT.ILVL1=0;ADIC.BIT.ILVL0=0; } async command void HplM16c60Adc.startConversion() { ADCON0.BIT.ADST=1; } // ADST=6 async command void HplM16c60Adc.resetInterrupt() { } // Clear the ADC interrupt flag /** * Enable continuous sampling, that is repeat sampling mode */ async command void HplM16c60Adc.setContinuous() { ADCON0.BIT.MD0=0;ADCON0.BIT.MD1=1; } /** * Disable continuous sampling, enable one-shot sampling mode */ async command void HplM16c60Adc.setSingle() { ADCON0.BIT.MD0=0;ADCON0.BIT.MD1=0; } /* A/D status checks */ async command bool HplM16c60Adc.isEnabled(){ // ADCON1 bit 5 controls the ADC, 0 disable connection, 1 connection return READ_BIT(ADCON1.BYTE, 5); } async command bool HplM16c60Adc.isStarted() { return ADCON0.BIT.ADST; } async command bool HplM16c60Adc.isComplete() { // interrupt flag bit return ADIC.BIT.IR; } /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */ default async event void HplM16c60Adc.dataReady(uint16_t done) { } M16C_INTERRUPT_HANDLER(M16C_AD) { uint16_t data = call HplM16c60Adc.getValue(); __nesc_enable_interrupt(); signal HplM16c60Adc.dataReady(data); POST_AMBLE(); } async command bool HplM16c60Adc.cancel() { /* This is tricky */ atomic { /* To cancel a conversion, first turn off ADEN, then turn off ADSC. We also cancel any pending interrupt. Finally we reenable the ADC. */ //ADCON1.VCUT=0; //ADIC.ILVL2=0;ADIC.ILVL1=0;ADIC.ILVL0=0; /* This disable ADC interrupt... */ ADCON0.BIT.ADST=0; //ADCON1.VCUT=1; return TRUE; } } } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/M16c60Adc.h000077500000000000000000000124531207233610700210040ustar00rootroot00000000000000// $Id: M16c60Adc.h,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Martin Turon // @author Hu Siquan #ifndef __H_M16C60ADC_H__ #define __H_M16C60ADC_H__ //================== 8 channel 10-bit ADC ============================== /* Voltage Reference Settings */ enum { M16c60_ADC_VREF_OFF = 0, //!< VR+ = AREF and VR- = GND M16c60_ADC_VREF_AVCC = 1,//!< VR+ = AVcc and VR- = GND }; /* Voltage Reference Settings */ enum { M16c60_ADC_RIGHT_ADJUST = 0, M16c60_ADC_LEFT_ADJUST = 1, }; /* ADC Channel Settings */ enum { M16c60_ADC_CHL_AN0 = 0, M16c60_ADC_CHL_AN1, M16c60_ADC_CHL_AN2, M16c60_ADC_CHL_AN3, M16c60_ADC_CHL_AN4, M16c60_ADC_CHL_AN5, M16c60_ADC_CHL_AN6, M16c60_ADC_CHL_AN7, M16c60_ADC_CHL_AN10 = 8, M16c60_ADC_CHL_AN11, M16c60_ADC_CHL_AN12, M16c60_ADC_CHL_AN13, M16c60_ADC_CHL_AN14, M16c60_ADC_CHL_AN15, M16c60_ADC_CHL_AN16, M16c60_ADC_CHL_AN17, }; /* ADC Control Register 0 */ typedef struct { uint8_t ch012 : 3; //!< Analog Channel and Gain Selection Bits uint8_t md01 : 2; //!< ADC operation mode select bit uint8_t trg : 1; //!< Trigger select bit uint8_t adst : 1; //!< ADC start flag uint8_t cks0 :1; //!< Frequency Selection Bit 0 } M16c60ADCON0_t; /* ADC Control Register 1 */ typedef struct { uint8_t scan01 : 2; //!< ADC scan mode select bit uint8_t md2 : 1; //!< ADC operation mode select bit 1 uint8_t bits : 1; //!< 8/10-bit mode select bit uint8_t cks1 : 1; //!< Frequency select bit 1 uint8_t vcut : 1; //!< Vref connect bit uint8_t opa01 : 2; //!< External op-amp connection mode bit } M16c60ADCON1_t; /* ADC Control Register 2 */ typedef struct { uint8_t smp : 1; //!< ADC method select bit uint8_t adgsel01 : 2; //!< port group select: 00 select P10 group // 01 select NULL // 10 select P0 group // 11 select P2 group uint8_t bit3 : 1; //!< reserved bit (always set to 0) uint8_t cks2 : 1; //!< Frequency select bit 2 uint8_t bit5 : 1; //!< nothing assigned. uint8_t bit6 : 1; //!< nothing assigned. uint8_t bit7 : 1; //!< nothing assigned. } M16c60ADCON2_t; /* ADC Prescaler Settings */ /* Note: each platform must define M16c60_ADC_PRESCALE to the smallest prescaler which guarantees full A/D precision. */ enum { M16c60_ADC_PRESCALE_2 = 1, M16c60_ADC_PRESCALE_3 = 6, M16c60_ADC_PRESCALE_4 = 0, M16c60_ADC_PRESCALE_6 = 5, M16c60_ADC_PRESCALE_12 = 4, // This special value is used to ask the platform for the prescaler // which gives full precision. M16c60_ADC_PRESCALE = 2, }; /* ADC Precision Settings */ // See mcu model header file /* ADC operation mode select bit */ enum { M16c60_ADC_ONESHOT_MODE = 0, M16c60_ADC_REPEAT_MODE, }; /* ADC Enable Settings */ enum { M16c60_ADC_ENABLE_OFF = 0, M16c60_ADC_ENABLE_ON, }; /* ADC Start Conversion Settings */ enum { M16c60_ADC_START_CONVERSION_OFF = 0, M16c60_ADC_START_CONVERSION_ON, }; /* ADC Free Running Select Settings */ enum { M16c60_ADC_FREE_RUNNING_OFF = 0, M16c60_ADC_FREE_RUNNING_ON, }; /* ADC Interrupt Flag Settings */ enum { M16c60_ADC_INT_FLAG_OFF = 0, M16c60_ADC_INT_FLAG_ON, }; /* ADC Interrupt Enable Settings */ enum { M16c60_ADC_INT_ENABLE_OFF = 0, M16c60_ADC_INT_ENABLE_ON, }; typedef uint8_t M16c60_ADCH_t; //!< ADC data register high typedef uint8_t M16c60_ADCL_t; //!< ADC data register low // The resource identifier string for the ADC subsystem #define UQ_M16c60ADC_RESOURCE "M16c60adc.resource" #endif // __H_M16C60ADC_H_ tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/M16c60AdcC.nc000077500000000000000000000054661207233610700212660ustar00rootroot00000000000000/// $Id: M16c60AdcC.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "M16c60Adc.h" /** * HAL for the M16c60 A/D conversion susbsystem. * * @author Hu Siquan * @author David Gay */ configuration M16c60AdcC { provides { interface Resource[uint8_t client]; interface M16c60AdcSingle; interface M16c60AdcMultiple; } uses interface ResourceConfigure[uint8_t client]; } implementation { components M16c60AdcP, HplM16c60AdcC, PlatformC, MainC, new RoundRobinArbiterC(UQ_M16c60ADC_RESOURCE) as AdcArbiter, new AsyncStdControlPowerManagerC() as PM; Resource = AdcArbiter; ResourceConfigure = AdcArbiter; M16c60AdcSingle = M16c60AdcP; M16c60AdcMultiple = M16c60AdcP; PlatformC.SubInit -> M16c60AdcP; M16c60AdcP.HplM16c60Adc -> HplM16c60AdcC; //M16c60AdcP.M16c60Calibrate -> PlatformC; PM.AsyncStdControl -> M16c60AdcP; PM.ResourceDefaultOwner -> AdcArbiter; } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/M16c60AdcConfig.nc000077500000000000000000000022251207233610700222770ustar00rootroot00000000000000/* $Id: M16c60AdcConfig.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include "M16c60Adc.h" /** * Clients of higher level must provide this interface to * specify which channel to sample, and with what parameters. * * @author Fan Zang */ interface M16c60AdcConfig { /** * Obtain channel. * @return The A/D channel to use. Must be one of the M16c60_ADC_CHL_xxx * values from M16c60Adc.h. */ async command uint8_t getChannel(); /** * Obtain precision setting. * @return The number of bits, valid values depend on mcu model. */ async command uint8_t getPrecision(); /** * Obtain prescaler value. * @return The prescaler value to use. Must be one of the * M16c60_ADC_PRESCALE_xxx values from M16c60Adc.h. */ async command uint8_t getPrescaler(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/M16c60AdcMultiple.nc000077500000000000000000000135541207233610700226740ustar00rootroot00000000000000/// $Id: M16c60AdcMultiple.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Hardware Abstraction Layer interface of Atmega128 for acquiring data * from multiple channels using the ATmega128's free-running mode. *

      * Because of the possibility that samples may be imprecise after * switching channels and/or reference voltages, and because there * is a one sample delay on swithcing channels and reference voltages, * M16c60ADCMultiple is complex. Two straightforward uses are: *

        *
      1. Acquire N samples from channel C: *
          *
        1. call getData to start sampling on channel C at the desired rate * (note that the choice of prescalers is very limited, so you * don't have many choices for sampling rate) *
        2. ignore the first dataReady event *
        3. use the results of the next N dataReady() events, return FALSE * on the last one *
        *
      2. Acquire one sample each from channels C1, ..., Cn (this pseudocode * assumes that none of these channels are differential) *
          *
        1. call getData to start sampling on channel C1 *
        2. on the ith dataReady event switch to channel Ci+1 by changing * *newChannel *
        3. the data passed to the ith dataReady event is for channel Ci-1 * (the data from the first dataReady event is ignored) *
        *
      * * @author Hu Siquan * @author David Gay */ #include "M16c60Adc.h" interface M16c60AdcMultiple { /** * Initiates free-running ADC conversions, with the ability to switch * channels and reference-voltage with a one sample delay. * * @param channel Initial A/D conversion channel. The channel can * be changed in the dataReady event, though these changes happen * with a one-sample delay (this is a hardware restriction). * @param refVoltage Initial A/D reference voltage. See the * M16c60_ADC_VREF_xxx constants in M16c60ADC.h. Like the channel, * the reference voltage can be changed in the dataReady event with * a one-sample delay. * @param leftJustify TRUE to place A/D result in high-order bits * (i.e., shifted left by 6 bits), low to place it in the low-order bits * @param prescaler Prescaler value for the A/D conversion clock. If you * specify M16c60_ADC_PRESCALE, a prescaler will be chosen that guarantees * full precision. Other prescalers can be used to get faster conversions. * See the ATmega128 manual for details. * @return TRUE if the conversion will be precise, FALSE if it will be * imprecise (due to a change in reference voltage, or switching to a * differential input channel) */ async command bool getData(uint8_t channel, uint8_t precision, uint8_t prescaler); /** * Returns the next sample in a free-running conversion. Allow the user * to switch channels and/or reference voltages with a one sample delay. * * @param data a 2 byte unsigned data value sampled by the ADC. * @param precise if this conversion was precise, FALSE if it wasn't * (we assume that the second conversion after a change of reference * voltage or after switching to a differential channel is precise) * @param channel Channel this sample was from. * @param newChannel Change this parameter to switch to a new channel * for the second next sample. * @param newRefVoltage Change this parameter to change the reference * voltage for the second next sample. * * @return TRUE to continue sampling, FALSE to stop. */ async event bool dataReady(uint16_t data, bool precise, uint8_t channel, uint8_t *newChannel, uint8_t *newRefVoltage); /* Note: there is no cancel in free-running mode because you cannot tell from a successful (or unsuccessful) cancellation whether there will be another dataReady event. Thus you cannot tell when you can safely reuse the ADC (short of waiting one ADC conversion period, in which case you might as well use the result of dataReady to cancel). */ } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/M16c60AdcP.nc000077500000000000000000000207111207233610700212710ustar00rootroot00000000000000/* $Id: M16c60AdcP.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "M16c60Adc.h" /** * Internal component of the M16c60 A/D HAL. * * @author Fan Zhang */ module M16c60AdcP { provides { interface Init; interface AsyncStdControl; interface M16c60AdcSingle; interface M16c60AdcMultiple; } uses { interface HplM16c60Adc; //interface M16c60Calibrate; } } implementation { /* type change from uint8_t to M16c60ADCON0_t, this function is defined at m16c60hardware.h */ DEFINE_UNION_CAST(int2ADCON0, uint8_t, M16c60ADCON0_t); // DEFINE_UNION_CAST(int2ADCON1, uint8_t, M16c60ADCON1_t); DEFINE_UNION_CAST(int2ADCON2, uint8_t, M16c60ADCON2_t); command error_t Init.init() { atomic { M16c60ADCON0_t adcon_0; M16c60ADCON1_t adcon_1; M16c60ADCON2_t adcon_2; adcon_0 = int2ADCON0(0x00); adcon_0 = int2ADCON0(0x20); adcon_0 = int2ADCON0(0x01); call HplM16c60Adc.setADCON0(adcon_0); call HplM16c60Adc.setADCON1(adcon_1); call HplM16c60Adc.setADCON2(adcon_2); } return SUCCESS; } /* We enable the A/D when start is called, and disable it when stop is called. This drops A/D conversion latency by a factor of two (but increases idle mode power consumption a little). */ async command error_t AsyncStdControl.start() { atomic call HplM16c60Adc.enableAdc(); return SUCCESS; } async command error_t AsyncStdControl.stop() { atomic call HplM16c60Adc.disableAdc(); return SUCCESS; } /* Return TRUE if switching to 'channel' with reference voltage 'refVoltage' will give a precise result (the first sample after changing reference voltage or switching to/between a differential channel is imprecise) */ inline bool isPrecise(uint8_t admux, uint8_t channel, uint8_t refVoltage) { return TRUE; } /** * Indicates a sample has been recorded by the ADC as the result * of a ADC interrupt. * * @param data a 2 byte unsigned data value sampled by the ADC. * @param precise if the conversion precise, FALSE if it wasn't. */ async event void HplM16c60Adc.dataReady(uint16_t data) { /* A single sample. Disable the ADC interrupt to avoid starting a new sample at the next "sleep" instruction. */ call HplM16c60Adc.disableInterruption(); call HplM16c60Adc.disableAdc(); signal M16c60AdcSingle.dataReady(data, TRUE); } /* Start sampling based on request parameters * one-shot mode default * refVoltage default */ void getData(uint8_t channel,uint8_t precision, uint8_t prescaler) { M16c60ADCON0_t adcon0_t; M16c60ADCON1_t adcon1_t; M16c60ADCON2_t adcon2_t; if(channel < M16c60_ADC_CHL_AN10) { adcon2_t.adgsel01 = 0; } else if((channel > M16c60_ADC_CHL_AN7) && (channel <= M16c60_ADC_CHL_AN17)) { adcon2_t.adgsel01 = 2; channel=channel-8; } adcon0_t.ch012 = channel; adcon0_t.md01 = 0; adcon0_t.trg = 0; adcon0_t.adst = M16c60_ADC_START_CONVERSION_ON; adcon1_t.md2 = 0; if(precision == M16c60_ADC_PRECISION_10BIT) // 10-bit mode { adcon1_t.bits = 1; } else { adcon1_t.bits = 0; } adcon1_t.vcut = M16c60_ADC_ENABLE_ON; adcon1_t.opa01 = 0; adcon2_t.smp = 1; // sample and hold if(prescaler == 0x00){adcon2_t.cks2=0;adcon1_t.cks1=0;adcon0_t.cks0=0;} // fAD/4 prescaler else if(prescaler == 0x01){adcon2_t.cks2=0;adcon1_t.cks1=0;adcon0_t.cks0=1;} // fAD/2 prescaler else if((prescaler == 0x02) || (prescaler == 0x03)){adcon2_t.cks2=0;adcon1_t.cks1=1;adcon0_t.cks0=0;} // fAD prescaler else if(prescaler == 0x04){adcon2_t.cks2=1;adcon1_t.cks1=0;adcon0_t.cks0=0;} // fAD/12 prescaler else if(prescaler == 0x05){adcon2_t.cks2=1;adcon1_t.cks1=0;adcon0_t.cks0=1;} // fAD/6 prescaler else if((prescaler == 0x06) || (prescaler == 0x07)){adcon2_t.cks2=1;adcon1_t.cks1=1;adcon0_t.cks0=0;} // fAD/3 prescaler call HplM16c60Adc.enableInterruption(); call HplM16c60Adc.setADCON2(adcon2_t); call HplM16c60Adc.setADCON1(adcon1_t); call HplM16c60Adc.setADCON0(adcon0_t); } async command bool M16c60AdcSingle.getData(uint8_t channel, uint8_t precision, uint8_t prescaler) { atomic { getData(channel, precision, prescaler); return TRUE; } } async command bool M16c60AdcSingle.cancel() { /* There is no M16c60AdcMultiple.cancel, for reasons discussed in that interface */ return call HplM16c60Adc.cancel(); } async command bool M16c60AdcMultiple.getData(uint8_t channel, uint8_t precision, uint8_t prescaler) { atomic { getData(channel, precision, prescaler); return TRUE; } } default async event void M16c60AdcSingle.dataReady(uint16_t data, bool precise) { } default async event bool M16c60AdcMultiple.dataReady(uint16_t data, bool precise, uint8_t channel, uint8_t *newChannel, uint8_t *newRefVoltage) { return FALSE; // stop conversion if we somehow end up here. } } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/M16c60AdcPlatform.nc000066400000000000000000000001371207233610700226530ustar00rootroot00000000000000interface M16c60AdcPlatform { async command void adcOn(); async command void adcOff(); }tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/M16c60AdcSingle.nc000077500000000000000000000074761207233610700223300ustar00rootroot00000000000000/// $Id: M16c60AdcSingle.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Hardware Abstraction Layer interface of M16c60 for acquiring * a one-shot sampling from a channel. * * @author Fan Zhang */ #include "M16c60Adc.h" interface M16c60AdcSingle { /** * Initiates an ADC conversion on a given channel. * * @param channel A/D conversion channel. * @param refVoltage Select reference voltage for A/D conversion. See * the M16c60_ADC_VREF_xxx constants in M16c60ADC.h * @param precision 8 to place A/D result in 8 bits, 10 to place it in * the 10 bits * @param prescaler Prescaler value for the A/D conversion clock. If you * specify M16c60_ADC_PRESCALE, a prescaler will be chosen that guarantees * full precision. Other prescalers can be used to get faster conversions. * See the M16c60 manual for details. * @return TRUE if the conversion will be precise, FALSE if it will be * imprecise (due to a change in refernce voltage, or switching to a * differential input channel) */ async command bool getData(uint8_t channel, uint8_t precision, uint8_t prescaler); /** * Indicates a sample has been recorded by the ADC as the result * of a getData() command. * * @param data a 2 byte unsigned data value sampled by the ADC. * @param precise if the conversion precise, FALSE if it wasn't. This * values matches the result from the getData call. */ async event void dataReady(uint16_t data, bool precise); /** * Cancel an outstanding getData operation. Use with care, to * avoid problems with races between the dataReady event and cancel. * @return TRUE if a conversion was in-progress or an interrupt * was pending. dataReady will not be signaled. FALSE if the * conversion was already complete. dataReady will be (or has * already been) signaled. */ async command bool cancel(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/WireAdcP.nc000077500000000000000000000020631207233610700213230ustar00rootroot00000000000000/* $Id: WireAdcP.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Support component for AdcReadClientC and AdcReadNowClientC. * * @author David Gay */ configuration WireAdcP { provides { interface Read[uint8_t client]; interface ReadNow[uint8_t client]; } uses { interface M16c60AdcConfig[uint8_t client]; interface Resource[uint8_t client]; } } implementation { components M16c60AdcC, AdcP, new ArbitratedReadC(uint16_t) as ArbitrateRead; Read = ArbitrateRead; ReadNow = AdcP; Resource = ArbitrateRead.Resource; M16c60AdcConfig = AdcP; // provide default M16c60AdcConfig interface ArbitrateRead.Service -> AdcP.Read; AdcP.M16c60AdcSingle -> M16c60AdcC; } tinyos-2.1.2+dfsg/tos/chips/m16c60/adc/WireAdcStreamP.nc000077500000000000000000000023051207233610700224760ustar00rootroot00000000000000/* $Id: WireAdcStreamP.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Support component for AdcReadStreamClientC. * * @author Fan Zhang */ #include "Adc.h" configuration WireAdcStreamP { provides interface ReadStream[uint8_t client]; uses { interface M16c60AdcConfig[uint8_t client]; interface Resource[uint8_t client]; } } implementation { components M16c60AdcC, AdcStreamP, PlatformC, MainC, new AlarmMicro32C(), new ArbitratedReadStreamC(uniqueCount(UQ_ADC_READSTREAM), uint16_t) as ArbitrateReadStream; Resource = ArbitrateReadStream; ReadStream = ArbitrateReadStream; M16c60AdcConfig = AdcStreamP; ArbitrateReadStream.Service -> AdcStreamP; AdcStreamP.Init <- MainC; AdcStreamP.M16c60AdcSingle -> M16c60AdcC; //AdcStreamP.M16c60Calibrate -> PlatformC; AdcStreamP.Alarm -> AlarmMicro32C; } tinyos-2.1.2+dfsg/tos/chips/m16c60/bits.h000077500000000000000000000047021207233610700177300ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef __BITS_H__ #define __BITS_H__ #define BIT0 0x1 #define BIT1 0x2 #define BIT2 0x4 #define BIT3 0x8 #define BIT4 0x10 #define BIT5 0x20 #define BIT6 0x40 #define BIT7 0x80 #define BIT8 0x100 #define BIT9 0x200 #define BIT10 0x400 #define BIT11 0x800 #define BIT12 0x1000 #define BIT13 0x2000 #define BIT14 0x4000 #define BIT15 0x8000 #define BIT16 0x10000 #define BIT17 0x20000 #define BIT18 0x40000 #define BIT19 0x80000 #define BIT20 0x100000 #define BIT21 0x200000 #define BIT22 0x400000 #define BIT23 0x800000 #define BIT24 0x1000000 #define BIT25 0x2000000 #define BIT26 0x4000000 #define BIT27 0x8000000 #define BIT28 0x10000000 #define BIT29 0x20000000 #define BIT30 0x40000000 #define BIT31 0x80000000 #endif // __BITS_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/control/000077500000000000000000000000001207233610700202705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/control/M16c60Control.h000066400000000000000000000052471207233610700226660ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This file includes defines to be used together with the control interfaces * for the M16c/60 mcu. * * @author Henrik Makitaavola */ #ifndef __M16C60_CONTROL_H__ #define __M16C60_CONTROL_H__ #define UQ_M16C60_STOP_MODE_CONTROL "UQ_M16C60_STOP_MODE_CONTROL" #define UQ_M16C60_SYSTEM_CLOCK_CONTROL "UQ_M16C60_SYSTEM_CLOCK_CONTROL" /** * Input to SystemClockControl.minSpeed() and * M16c60Control.defaultSystemClock(). */ typedef enum { M16C60_DONT_CARE = 0x0, M16C60_SUB_CLOCK = 0x1, M16C60_MAIN_CLOCK_DIV_0 = 0x2, M16C60_MAIN_CLOCK_DIV_2 = 0x4, M16C60_MAIN_CLOCK_DIV_4 = 0x8, M16C60_MAIN_CLOCK_DIV_8 = 0x9, M16C60_MAIN_CLOCK_DIV_16 = 0xc, M16C60_PLL_CLOCK = 0xd, } M16c60SystemClock; /** * The different PLL multipliers supported by the M16c/60 mcu. */ typedef enum { M16C60_PLL_2 = 0x1, M16C60_PLL_4 = 0x2, M16C60_PLL_6 = 0x3, M16C60_PLL_8 = 0x4 } M16c60PLLMultiplier; #endif // __M16C60_CONTROL_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/control/M16c60Control.nc000077500000000000000000000043461207233610700230410ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to initialize, put the M16c/60 to sleep and default system speed. * * @author Henrik Makitaavola */ #include "M16c60Control.h" interface M16c60Control { /** * Initializes the mcu. */ command error_t init(); /** * Sets the default system clock speed. * * @param def Default system speed ( != M16C60_DONT_CARE) */ command error_t defaultSystemClock(M16c60SystemClock def); /** * Put the mcu to sleep. */ async command void sleep(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/control/M16c60ControlC.nc000077500000000000000000000040651207233610700231420ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring for the M16c60ControlP module. * * @author Henrik Makitaavola */ configuration M16c60ControlC { provides interface M16c60Control; } implementation { components M16c60ControlP, M16c60ControlPlatformC; M16c60Control = M16c60ControlP; M16c60ControlP.PlatformCtrl -> M16c60ControlPlatformC; } tinyos-2.1.2+dfsg/tos/chips/m16c60/control/M16c60ControlP.nc000077500000000000000000000244351207233610700231620ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the Control Interfaces for the M16c/60 mcu. * * @author Henrik Makitaavola */ #include "M16c60Control.h" module M16c60ControlP { provides interface M16c60Control; provides interface StopModeControl[uint8_t client]; provides interface SystemClockControl[uint8_t client]; uses interface M16c60ControlPlatform as PlatformCtrl; } implementation { M16c60SystemClock default_system_clock = M16C60_MAIN_CLOCK_DIV_0; // Default system clock speed M16c60SystemClock system_clock = M16C60_DONT_CARE; uint8_t client_system_clock[uniqueCount(UQ_M16C60_SYSTEM_CLOCK_CONTROL)]; uint8_t num_system_clock_clients = uniqueCount(UQ_M16C60_SYSTEM_CLOCK_CONTROL); // Take +1 incase of rest in the division uint8_t client_allow_stop_mode[(uniqueCount(UQ_M16C60_STOP_MODE_CONTROL)/8) + 1]; uint8_t num_allow_stop_mode_clients = uniqueCount(UQ_M16C60_STOP_MODE_CONTROL); bool update_sleep_mode = false; bool allow_stop_mode = true; // Stop mode enabled/disabled, Default: Enabled. void PLLOn() { uint8_t tmp; uint32_t i; CM0.BYTE = 0x08; // Main clock + Sub clock. CM1.BYTE = 0x20; //Clear previous cpu speed setting. PM2.BYTE = 0x00; // PLL > 16MHz (2 waits). tmp = 0x90 + PLL_MULTIPLIER; PLC0.BYTE = tmp; // PLL ON. // Wait for PLL to become stable (50 ms). // TODO (henrik) Make this more efficient when time allows it.For example // use timers or busy waiting. // Tried busy waiting but tosboot started to include alot of // things that it shouldn't which lead to compile errors. for (i = 0; i < 50000UL * MAIN_CRYSTAL_SPEED; ++i) asm volatile("nop"); CM1.BYTE = 0x22; // PLL as system clock. call PlatformCtrl.PLLOn(); } void PLLOff() { uint8_t tmp; CLR_BIT(CM1.BYTE, 1); // Main clock tmp = 0x10 + PLL_MULTIPLIER; PLC0.BYTE = tmp; // Turn off PLL clock call PlatformCtrl.PLLOff(); } error_t setSystemClock(M16c60SystemClock set_clock) { M16c60SystemClock clock = set_clock; atomic { if (clock == M16C60_DONT_CARE) { clock = default_system_clock; } PRCR.BYTE = BIT1 | BIT0; // Turn off protection for cpu & clock register. if (system_clock == M16C60_PLL_CLOCK) { PLLOff(); } // Set correct system clock speed. if (clock == M16C60_MAIN_CLOCK_DIV_8) { SET_BIT(CM0.BYTE, 6); } else if (clock >= M16C60_MAIN_CLOCK_DIV_0 && clock <= M16C60_MAIN_CLOCK_DIV_16) { // Main clock divided by 0, 2 ,4 or 16 CLR_BIT(CM0.BYTE, 6); // Remove division by 8 CLR_FLAG(CM1.BYTE, (0x3 << 6)); // Clear previous cpu speed setting SET_FLAG(CM1.BYTE, ((clock >> 2) << 6)); // New cpu speed } else if (clock == M16C60_SUB_CLOCK) { SET_BIT(CM0.BYTE, 4); // Sub clock on. SET_BIT(CM0.BYTE, 7); // Sub clock as CPU clock } else if (clock == M16C60_PLL_CLOCK) { PLLOn(); } // TODO(Henrik) Maybe need to wait for a while to make sure that the // crystals are stable? CLR_BIT(CM1.BYTE, 5); // Low drive on Xin-Xout. CLR_BIT(CM0.BYTE, 3); // Low drive on XCin-XCout. PRCR.BYTE = 0; // Turn on protection on all registers. atomic system_clock = set_clock; return SUCCESS; } } error_t updateSystemClock() { M16c60SystemClock clock = M16C60_DONT_CARE; uint8_t i; atomic { for (i = 0; i < num_system_clock_clients; ++i) { if (clock < client_system_clock[i]) { clock = client_system_clock[i]; } } if (clock == system_clock) { return SUCCESS; } return setSystemClock(clock); } } void initPin(volatile uint8_t *port, volatile uint8_t *port_d, uint8_t pin, uint16_t state) { uint8_t inactive = (state >> (pin*2)) & 0x3; // Turn off protection of PD9 PRCR.BYTE = BIT2; switch (inactive) { case M16C_PIN_INACTIVE_DONT_CARE: break; case M16C_PIN_INACTIVE_OUTPUT_LOW: SET_BIT((*port_d), pin); CLR_BIT((*port), pin); break; case M16C_PIN_INACTIVE_OUTPUT_HIGH: SET_BIT((*port_d), pin); SET_BIT((*port), pin); break; case M16C_PIN_INACTIVE_INPUT: CLR_BIT((*port_d), pin); CLR_BIT((*port), pin); break; } PRCR.BYTE = 0; } void initPort(volatile uint8_t *port, volatile uint8_t *port_d, uint16_t state) { initPin(port, port_d, 0, state); initPin(port, port_d, 1, state); initPin(port, port_d, 2, state); initPin(port, port_d, 3, state); initPin(port, port_d, 4, state); initPin(port, port_d, 5, state); initPin(port, port_d, 6, state); initPin(port, port_d, 7, state); } void initPins() { initPort(&P0.BYTE, &PD0.BYTE, PORT_P0_INACTIVE_STATE); initPort(&P1.BYTE, &PD1.BYTE, PORT_P1_INACTIVE_STATE); initPort(&P2.BYTE, &PD2.BYTE, PORT_P2_INACTIVE_STATE); initPort(&P3.BYTE, &PD3.BYTE, PORT_P3_INACTIVE_STATE); initPort(&P4.BYTE, &PD4.BYTE, PORT_P4_INACTIVE_STATE); initPort(&P5.BYTE, &PD5.BYTE, PORT_P5_INACTIVE_STATE); initPort(&P6.BYTE, &PD6.BYTE, PORT_P6_INACTIVE_STATE); initPort(&P7.BYTE, &PD7.BYTE, PORT_P7_INACTIVE_STATE); initPort(&P8.BYTE, &PD8.BYTE, PORT_P8_INACTIVE_STATE); initPort(&P9.BYTE, &PD9.BYTE, PORT_P9_INACTIVE_STATE); initPort(&P10.BYTE, &PD10.BYTE, PORT_P_10_INACTIVE_STATE); } command error_t M16c60Control.init() { uint8_t i; uint8_t tmp; initPins(); PRCR.BYTE = BIT1 | BIT0; // Turn off protection for cpu & clock register. PM0.BYTE = BIT7; // Single Chip mode. No BCLK output. PM1.BYTE = BIT3; // Expand internal memory, no global wait state. PCLKR.BIT.PCLK0 = 1; // Set Timer A and B clock bit to F1 PCLKR.BIT.PCLK1 = 1; // Set Timer A and B clock bit to F1 tmp = 0x10 + PLL_MULTIPLIER; // Prepare PLL multiplier PLC0.BYTE = tmp; // Set PLL multiplier PRCR.BYTE = 0; // Initialize the clock and stop mode control arrays. for (i = 0; i < num_system_clock_clients; ++i) { client_system_clock[i] = M16C60_DONT_CARE; } for (i = 0; i < (num_allow_stop_mode_clients/8) + 1; ++i) { client_allow_stop_mode[i] = 0xFF; } return setSystemClock(M16C60_DONT_CARE); } command error_t M16c60Control.defaultSystemClock( M16c60SystemClock def) { if (def == M16C60_DONT_CARE) { return FAIL; } if (def == default_system_clock || system_clock != M16C60_DONT_CARE) { default_system_clock = def; return SUCCESS; } default_system_clock = def; return setSystemClock(M16C60_DONT_CARE); } void updateSleepMode() { uint8_t i; for (i = 0; i < (num_allow_stop_mode_clients/8) + 1; ++i) { if (client_allow_stop_mode[i] != 0xFF) { allow_stop_mode = false; return; } } allow_stop_mode = true; } void waitMode() { __nesc_enable_interrupt(); asm ("wait"); asm volatile ("" : : : "memory"); __nesc_disable_interrupt(); } void stopMode() { uint8_t cm0_tmp, cm1_tmp; __nesc_enable_interrupt(); PRCR.BYTE = 1; // Turn off protection of system clock control registers CLR_BIT(CM2.BYTE, 0); cm0_tmp = CM0.BYTE; cm1_tmp = CM1.BYTE; CM0.BYTE = 0b00001000; asm("bset 0,0x0007"); // Enter stop mode asm("jmp.b MAIN_A"); asm("MAIN_A:"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile ("" : : : "memory"); __nesc_disable_interrupt(); CM0.BYTE = cm0_tmp; CM1.BYTE = cm1_tmp; PRCR.BIT.PRC0 = 0; // Turn on protection of system clock control registers } async command void M16c60Control.sleep() { atomic if (update_sleep_mode) { updateSleepMode(); } if (allow_stop_mode && system_clock != M16C60_PLL_CLOCK) { stopMode(); } else { waitMode(); } } async command void StopModeControl.allowStopMode[uint8_t client](bool allow) { atomic { WRITE_BIT(client_allow_stop_mode[client >> 3], client % 8, allow); if (allow != allow_stop_mode) { update_sleep_mode = true; } } } command error_t SystemClockControl.minSpeed[uint8_t client]( M16c60SystemClock speed) { atomic client_system_clock[client] = speed; atomic if (system_clock < speed) { return updateSystemClock(); } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/m16c60/control/M16c60ControlPlatform.nc000066400000000000000000000042651207233610700245430ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to signal the platform that the mcu has changed the main clock * speed, PLL is being turned on/off, etc. * Needed so that the platform can take appropriate actions so * that timers can be set to handle the PLL for example. * * @author Henrik Makitaavola */ interface M16c60ControlPlatform { /** * PLL is turned on. */ async command void PLLOn(); /** * PLL is turned off. */ async command void PLLOff(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/control/StopModeControl.nc000066400000000000000000000040761207233610700237140ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface used by components to signal if it * allows the mcu to go into stop mode. * * @author Henrik Makitaavola */ interface StopModeControl { /** * Tells the mcu if it is allowed to go into stop mode. * * @param allow True if stop mode is allowed. */ async command void allowStopMode(bool allow); } tinyos-2.1.2+dfsg/tos/chips/m16c60/control/StopModeControlC.nc000066400000000000000000000042651207233610700240170ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "M16c60Control.h" /** * All components that need to control the mcus sleep * mode should instantiate a component of this configuration. * * @author Henrik Makitaavola */ generic configuration StopModeControlC() { provides interface StopModeControl; } implementation { enum { CLIENT_ID = unique(UQ_M16C60_STOP_MODE_CONTROL), }; components M16c60ControlP; StopModeControl = M16c60ControlP.StopModeControl[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/chips/m16c60/control/SystemClockControl.nc000066400000000000000000000040311207233610700244110ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to control the allowed minimum speed of the mcu. * * @author Henrik Makitaavola */ interface SystemClockControl { /** * Control the minimum speed of the mcu. * * @param speed The allowed minimum speed. */ command error_t minSpeed(M16c60SystemClock speed); } tinyos-2.1.2+dfsg/tos/chips/m16c60/control/SystemClockControlC.nc000066400000000000000000000043231207233610700245200ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "M16c60Control.h" /** * Every component that needs to control the minimum speed * of the mcu should instantiate a new component of this configuration. * * @author Henrik Makitaavola */ generic configuration SystemClockControlC() { provides interface SystemClockControl; } implementation { enum { CLIENT_ID = unique(UQ_M16C60_SYSTEM_CLOCK_CONTROL), }; components M16c60ControlP; SystemClockControl = M16c60ControlP.SystemClockControl[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/chips/m16c60/dac/000077500000000000000000000000001207233610700173375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/dac/HplM16c60Dac.nc000077500000000000000000000012361207233610700216160ustar00rootroot00000000000000/** * HPL interface to the M16c60 D/A converers. * * @author Henrik Makitaavola */ interface HplM16c60Dac { /** * Sets the D/A value. * @param value The new D/A value */ async command void setValue(uint8_t value); /** * Reads the current D/A value. * @return D/A value */ async command uint8_t getValue(); /** * Enables the D/A converter. */ async command void enable(); /** * Disables the D/A converter. */ async command void disable(); /** * Checks the state of the D/A converter. * @return TRUE if the D/A converter is enabled. */ async command bool isEnabled(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/dac/HplM16c60DacC.nc000077500000000000000000000006351207233610700217230ustar00rootroot00000000000000/** * HPL for the M16c60 D/A conversion susbsystem. * * @author Henrik Makitaavola */ configuration HplM16c60DacC { provides interface HplM16c60Dac as Dac0; provides interface HplM16c60Dac as Dac1; } implementation { components new HplM16c60DacP((uint16_t)&DA0, 0) as Dac0_, new HplM16c60DacP((uint16_t)&DA1, 1) as Dac1_; Dac0 = Dac0_; Dac1 = Dac1_; } tinyos-2.1.2+dfsg/tos/chips/m16c60/dac/HplM16c60DacP.nc000077500000000000000000000013511207233610700217340ustar00rootroot00000000000000/** * HPL for the M16c60 A/D conversion susbsystem. * * @author Fan Zhang * */ generic module HplM16c60DacP(uint16_t da_addr, uint8_t da_num) { provides interface HplM16c60Dac; } implementation { #define da (*TCAST(volatile uint8_t* ONE, da_addr)) async command void HplM16c60Dac.setValue(uint8_t value) { da = value; } async command uint8_t HplM16c60Dac.getValue() { return da; } async command void HplM16c60Dac.enable() { SET_BIT(DACON.BYTE, da_num); } async command void HplM16c60Dac.disable() { CLR_BIT(DACON.BYTE, da_num); } async command bool HplM16c60Dac.isEnabled() { return (READ_BIT(DACON.BYTE, da_num) ? true : false); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/interrupts.h000077500000000000000000000072641207233610700212140ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * M16C interrupt id defines. * * @author Per Lindgren * @author Johan Eriksson * @author Johan Nordlander * @author Simon Aittamaa. */ #ifndef M16C_INTERRUPTS_H_ #define M16C_INTERRUPTS_H_ /* Software interrupts - bound to peripheral hardware */ #define M16C_BRK 0 #define M16C_INT3 4 #define M16C_TMRB5 5 #define M16C_TMRB4 6 #define M16C_UART1_BCD 6 #define M16C_TMRB3 7 #define M16C_UART0_BCD 7 #define M16C_INT5 8 #define M16C_SI_O4 8 #define M16C_INT4 9 #define M16C_SI_O3 9 #define M16C_UART2_BCD 10 #define M16C_DMA0 11 #define M16C_DMA1 12 #define M16C_KEY 13 #define M16C_AD 14 #define M16C_UART2_NACK 15 #define M16C_UART2_ACK 16 #define M16C_UART0_NACK 17 #define M16C_UART0_ACK 18 #define M16C_UART1_NACK 19 #define M16C_UART1_ACK 20 #define M16C_TMRA0 21 #define M16C_TMRA1 22 #define M16C_TMRA2 23 #define M16C_TMRA3 24 #define M16C_TMRA4 25 #define M16C_TMRB0 26 #define M16C_TMRB1 27 #define M16C_TMRB2 28 #define M16C_INT0 29 #define M16C_INT1 30 #define M16C_INT2 31 /* Software interrupts - not bound to peripheral hardware */ #define M16C_SINT0 32 #define M16C_SINT1 33 #define M16C_SINT2 34 #define M16C_SINT3 35 #define M16C_SINT4 36 #define M16C_SINT5 37 #define M16C_SINT6 38 #define M16C_SINT7 39 #define M16C_SINT8 40 #define M16C_SINT9 41 #define M16C_SINT10 42 #define M16C_SINT11 43 #define M16C_SINT12 44 #define M16C_SINT13 45 #define M16C_SINT14 46 #define M16C_SINT15 47 #define M16C_SINT16 48 #define M16C_SINT17 49 #define M16C_SINT18 50 #define M16C_SINT19 51 #define M16C_SINT20 52 #define M16C_SINT21 53 #define M16C_SINT22 54 #define M16C_SINT23 55 #define M16C_SINT24 56 #define M16C_SINT25 57 #define M16C_SINT26 58 #define M16C_SINT27 59 #define M16C_SINT28 60 #define M16C_SINT29 61 #define M16C_SINT30 62 #define M16C_SINT31 63 /* Interrupt macro */ #define _M16C_INTERRUPT(id) _vector_##id #define M16C_INTERRUPT(id) \ void __attribute__((interrupt)) _M16C_INTERRUPT(id)(void) #endif tinyos-2.1.2+dfsg/tos/chips/m16c60/m16c60hardware.h000077500000000000000000000145171207233610700214260ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Some M16c/60 needed macros and defines. * * @author Henrik Makitaavola * @author Fan Zhang */ #ifndef __M16C60HARDWARE_H__ #define __M16C60HARDWARE_H__ #include "interrupts.h" #include "m16c60.h" // Include header for mcu model. #include "bits.h" #include "uart/M16c60Uart.h" #include "pins/M16c60Pin.h" #include "adc/M16c60Adc.h" #define true TRUE #define false FALSE //Bit operators using bit number #define _BV(bit) (1 << bit) #define SET_BIT(port, bit) ((port) |= _BV(bit)) #define CLR_BIT(port, bit) ((port) &= ~_BV(bit)) #define READ_BIT(port, bit) (((port) & _BV(bit)) != 0) #define FLIP_BIT(port, bit) ((port) ^= _BV(bit)) #define WRITE_BIT(port, bit, value) \ if (value) SET_BIT((port), (bit)); \ else CLR_BIT((port), (bit)) // Bit operators using bit flag mask #define SET_FLAG(port, flag) ((port) |= (flag)) #define CLR_FLAG(port, flag) ((port) &= ~(flag)) #define READ_FLAG(port, flag) ((port) & (flag)) // We need slightly different defs than M16C_INTERRUPT // for interrupt handlers. #define M16C_INTERRUPT_HANDLER(id) \ M16C_INTERRUPT(id) @atomic_hwevent() @C() typedef float nx_float __attribute__((nx_base_be(afloat))); inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() { float f; memcpy(&f, source, sizeof(float)); return f; } inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() { memcpy(target, &value, sizeof(float)); return value; } // The mov instruction should be used when clearing the interrupt flag. // More information can be found in the manual for the MCU. inline void clear_interrupt(uint16_t interrupt_addr) { atomic { uint8_t tmp = (*TCAST(volatile uint8_t* ONE, interrupt_addr)); CLR_BIT(tmp, 3); asm("mov.w %[interrupt_addr], a0\n\t" "mov.b %[tmp], [a0]" : : [tmp] "r" (tmp) , [interrupt_addr] "r" (interrupt_addr) : "a0"); } } typedef uint8_t mcu_power_t @combine("ecombine"); mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) { return (m1 < m2) ? m1: m2; } enum { M16C60_POWER_WAIT = 1, M16C60_POWER_STOP = 2, }; inline void __nesc_enable_interrupt(void) { asm("fset i"); } inline void __nesc_disable_interrupt(void) { asm("fclr i"); } // Macro to create union casting functions. #define DEFINE_UNION_CAST(func_name, from_type, to_type) \ to_type func_name(from_type x_type) { \ union {from_type f_type; to_type t_type;} c_type = {f_type:x_type}; return c_type.t_type; } typedef uint16_t __nesc_atomic_t; #ifndef NESC_BUILD_BINARY /** * Start atomic section. */ inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() { __nesc_atomic_t result; // Save the flag register (FLG) asm volatile ("stc flg, %0": "=r"(result): : "%flg"); // Disable interrupts __nesc_disable_interrupt(); asm volatile("" : : : "memory"); // ensure atomic section effect visibility return result; } /** * End atomic section. */ inline void __nesc_atomic_end(__nesc_atomic_t original_FLG) @spontaneous() { // Restore the flag register (FLG) asm volatile("" : : : "memory"); // ensure atomic section effect visibility asm volatile ("ldc %0, flg": : "r"(original_FLG): "%flg"); } #endif // If the platform doesnt have defined any main crystal speed it will // get a default value of 16MHz #ifndef MAIN_CRYSTAL_SPEED #define MAIN_CRYSTAL_SPEED 16 /*MHZ*/ #endif // If the PLL_MULTIPLIER is not defined it will be default to M16C60_PLL_2. #ifndef PLL_MULTIPLIER #define PLL_MULTIPLIER M16C60_PLL_2 #endif // Default inactive pin states #ifndef PORT_P0_INACTIVE_STATE #define PORT_P0_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P1_INACTIVE_STATE #define PORT_P1_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P2_INACTIVE_STATE #define PORT_P2_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P3_INACTIVE_STATE #define PORT_P3_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P4_INACTIVE_STATE #define PORT_P4_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P5_INACTIVE_STATE #define PORT_P5_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P6_INACTIVE_STATE #define PORT_P6_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P7_INACTIVE_STATE #define PORT_P7_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P8_INACTIVE_STATE #define PORT_P8_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P9_INACTIVE_STATE #define PORT_P9_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #ifndef PORT_P_10_INACTIVE_STATE #define PORT_P_10_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE #endif #endif // __M16C60HARDWARE_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/000077500000000000000000000000001207233610700175615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60GeneralIOC.nc000077500000000000000000000246621207233610700232710ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Martin Turon */ /** * The HplM16c60GeneralIOC configuration provides GeneralIO interfaces for all * the M16c/60's pins. * * @author Henrik Makitaavola */ configuration HplM16c60GeneralIOC { // provides all the ports as raw ports provides { interface GeneralIO as PortP00; interface GeneralIO as PortP01; interface GeneralIO as PortP02; interface GeneralIO as PortP03; interface GeneralIO as PortP04; interface GeneralIO as PortP05; interface GeneralIO as PortP06; interface GeneralIO as PortP07; interface GeneralIO as PortP10; interface GeneralIO as PortP11; interface GeneralIO as PortP12; interface GeneralIO as PortP13; interface GeneralIO as PortP14; interface GeneralIO as PortP15; interface GeneralIO as PortP16; interface GeneralIO as PortP17; interface GeneralIO as PortP20; interface GeneralIO as PortP21; interface GeneralIO as PortP22; interface GeneralIO as PortP23; interface GeneralIO as PortP24; interface GeneralIO as PortP25; interface GeneralIO as PortP26; interface GeneralIO as PortP27; interface GeneralIO as PortP30; interface GeneralIO as PortP31; interface GeneralIO as PortP32; interface GeneralIO as PortP33; interface GeneralIO as PortP34; interface GeneralIO as PortP35; interface GeneralIO as PortP36; interface GeneralIO as PortP37; interface GeneralIO as PortP40; interface GeneralIO as PortP41; interface GeneralIO as PortP42; interface GeneralIO as PortP43; interface GeneralIO as PortP44; interface GeneralIO as PortP45; interface GeneralIO as PortP46; interface GeneralIO as PortP47; interface GeneralIO as PortP50; interface GeneralIO as PortP51; interface GeneralIO as PortP52; interface GeneralIO as PortP53; interface GeneralIO as PortP54; interface GeneralIO as PortP55; interface GeneralIO as PortP56; interface GeneralIO as PortP57; interface GeneralIO as PortP60; interface GeneralIO as PortP61; interface GeneralIO as PortP62; interface GeneralIO as PortP63; interface GeneralIO as PortP64; interface GeneralIO as PortP65; interface GeneralIO as PortP66; interface GeneralIO as PortP67; interface GeneralIO as PortP70; interface GeneralIO as PortP71; interface GeneralIO as PortP72; interface GeneralIO as PortP73; interface GeneralIO as PortP74; interface GeneralIO as PortP75; interface GeneralIO as PortP76; interface GeneralIO as PortP77; interface GeneralIO as PortP80; interface GeneralIO as PortP81; interface GeneralIO as PortP82; interface GeneralIO as PortP83; interface GeneralIO as PortP84; interface GeneralIO as PortP85; interface GeneralIO as PortP86; interface GeneralIO as PortP87; interface GeneralIO as PortP90; interface GeneralIO as PortP91; interface GeneralIO as PortP92; interface GeneralIO as PortP93; interface GeneralIO as PortP94; interface GeneralIO as PortP95; interface GeneralIO as PortP96; interface GeneralIO as PortP97; interface GeneralIO as PortP100; interface GeneralIO as PortP101; interface GeneralIO as PortP102; interface GeneralIO as PortP103; interface GeneralIO as PortP104; interface GeneralIO as PortP105; interface GeneralIO as PortP106; interface GeneralIO as PortP107; } } implementation { components new HplM16c60GeneralIOPortP((uint16_t)&P0.BYTE, (uint16_t)&PD0.BYTE) as PortP0, new HplM16c60GeneralIOPortP((uint16_t)&P1.BYTE, (uint16_t)&PD1.BYTE) as PortP1, new HplM16c60GeneralIOPortP((uint16_t)&P2.BYTE, (uint16_t)&PD2.BYTE) as PortP2, new HplM16c60GeneralIOPortP((uint16_t)&P3.BYTE, (uint16_t)&PD3.BYTE) as PortP3, new HplM16c60GeneralIOPortP((uint16_t)&P4.BYTE, (uint16_t)&PD4.BYTE) as PortP4, new HplM16c60GeneralIOPortP((uint16_t)&P5.BYTE, (uint16_t)&PD5.BYTE) as PortP5, new HplM16c60GeneralIOPortP((uint16_t)&P6.BYTE, (uint16_t)&PD6.BYTE) as PortP6, new HplM16c60GeneralIOPortP((uint16_t)&P7.BYTE, (uint16_t)&PD7.BYTE) as PortP7, new HplM16c60GeneralIOPortP((uint16_t)&P8.BYTE, (uint16_t)&PD8.BYTE) as PortP8, new HplM16c60GeneralIOPortP((uint16_t)&P9.BYTE, (uint16_t)&PD9.BYTE) as PortP9, new HplM16c60GeneralIOPortP((uint16_t)&P10.BYTE, (uint16_t)&PD10.BYTE) as PortP_10; PortP00 = PortP0.Pin0; PortP01 = PortP0.Pin1; PortP02 = PortP0.Pin2; PortP03 = PortP0.Pin3; PortP04 = PortP0.Pin4; PortP05 = PortP0.Pin5; PortP06 = PortP0.Pin6; PortP07 = PortP0.Pin7; PortP10 = PortP1.Pin0; PortP11 = PortP1.Pin1; PortP12 = PortP1.Pin2; PortP13 = PortP1.Pin3; PortP14 = PortP1.Pin4; PortP15 = PortP1.Pin5; PortP16 = PortP1.Pin6; PortP17 = PortP1.Pin7; PortP20 = PortP2.Pin0; PortP21 = PortP2.Pin1; PortP22 = PortP2.Pin2; PortP23 = PortP2.Pin3; PortP24 = PortP2.Pin4; PortP25 = PortP2.Pin5; PortP26 = PortP2.Pin6; PortP27 = PortP2.Pin7; PortP30 = PortP3.Pin0; PortP31 = PortP3.Pin1; PortP32 = PortP3.Pin2; PortP33 = PortP3.Pin3; PortP34 = PortP3.Pin4; PortP35 = PortP3.Pin5; PortP36 = PortP3.Pin6; PortP37 = PortP3.Pin7; PortP40 = PortP4.Pin0; PortP41 = PortP4.Pin1; PortP42 = PortP4.Pin2; PortP43 = PortP4.Pin3; PortP44 = PortP4.Pin4; PortP45 = PortP4.Pin5; PortP46 = PortP4.Pin6; PortP47 = PortP4.Pin7; PortP50 = PortP5.Pin0; PortP51 = PortP5.Pin1; PortP52 = PortP5.Pin2; PortP53 = PortP5.Pin3; PortP54 = PortP5.Pin4; PortP55 = PortP5.Pin5; PortP56 = PortP5.Pin6; PortP57 = PortP5.Pin7; PortP60 = PortP6.Pin0; PortP61 = PortP6.Pin1; PortP62 = PortP6.Pin2; PortP63 = PortP6.Pin3; PortP64 = PortP6.Pin4; PortP65 = PortP6.Pin5; PortP66 = PortP6.Pin6; PortP67 = PortP6.Pin7; PortP70 = PortP7.Pin0; PortP71 = PortP7.Pin1; PortP72 = PortP7.Pin2; PortP73 = PortP7.Pin3; PortP74 = PortP7.Pin4; PortP75 = PortP7.Pin5; PortP76 = PortP7.Pin6; PortP77 = PortP7.Pin7; PortP80 = PortP8.Pin0; PortP81 = PortP8.Pin1; PortP82 = PortP8.Pin2; PortP83 = PortP8.Pin3; PortP84 = PortP8.Pin4; PortP85 = PortP8.Pin5; PortP86 = PortP8.Pin6; PortP87 = PortP8.Pin7; components new HplM16c60GeneralIOPinPRC2P() as PortP90W, new HplM16c60GeneralIOPinPRC2P() as PortP91W, new HplM16c60GeneralIOPinPRC2P() as PortP92W, new HplM16c60GeneralIOPinPRC2P() as PortP93W, new HplM16c60GeneralIOPinPRC2P() as PortP94W, new HplM16c60GeneralIOPinPRC2P() as PortP95W, new HplM16c60GeneralIOPinPRC2P() as PortP96W, new HplM16c60GeneralIOPinPRC2P() as PortP97W; PortP90W -> PortP9.Pin0; PortP91W -> PortP9.Pin1; PortP92W -> PortP9.Pin2; PortP93W -> PortP9.Pin3; PortP94W -> PortP9.Pin4; PortP95W -> PortP9.Pin5; PortP96W -> PortP9.Pin6; PortP97W -> PortP9.Pin7; PortP90 = PortP90W; PortP91 = PortP91W; PortP92 = PortP92W; PortP93 = PortP93W; PortP94 = PortP94W; PortP95 = PortP95W; PortP96 = PortP96W; PortP97 = PortP97W; PortP100 = PortP_10.Pin0; PortP101 = PortP_10.Pin1; PortP102 = PortP_10.Pin2; PortP103 = PortP_10.Pin3; PortP104 = PortP_10.Pin4; PortP105 = PortP_10.Pin5; PortP106 = PortP_10.Pin6; PortP107 = PortP_10.Pin7; } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60GeneralIOPinP.nc000077500000000000000000000105211207233610700237420ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Generic pin access for pins mapped into I/O space. * * @author Henrik Makitaavola * @author Martin Turon * @author David Gay */ generic module HplM16c60GeneralIOPinP (uint16_t port_addr, uint16_t ddr_addr, uint16_t bit) { provides interface GeneralIO as IO; } implementation { #define port (*TCAST(volatile uint8_t* ONE, port_addr)) #define ddr (*TCAST(volatile uint8_t* ONE, ddr_addr)) inline async command bool IO.get() { return READ_BIT (port, bit); } inline async command void IO.set() { SET_BIT (port, bit); } inline async command void IO.clr() { CLR_BIT (port, bit); } inline async command void IO.toggle() { atomic FLIP_BIT (port, bit); } inline async command void IO.makeInput() { CLR_BIT (ddr, bit); } inline async command bool IO.isInput() { return !READ_BIT(ddr, bit); } inline async command void IO.makeOutput() { SET_BIT (ddr, bit); } inline async command bool IO.isOutput() { return READ_BIT(ddr, bit); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60GeneralIOPinPRC2P.nc000077500000000000000000000054041207233610700243750ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Generic pin access for pins on the P9 port. The PD9 register * is locked by the PRC2 bit in the PRCR register so it needs * to be unlocked before each access. * * @author Henrik Makitaavola */ generic module HplM16c60GeneralIOPinPRC2P() { provides interface GeneralIO as IO; uses interface GeneralIO as Wrap; } implementation { inline async command bool IO.get() { return call Wrap.get(); } inline async command void IO.set() { call Wrap.set(); } inline async command void IO.clr() { call Wrap.clr(); } inline async command void IO.toggle() { call Wrap.toggle(); } inline async command void IO.makeInput() { atomic { PRCR.BYTE = BIT2; call Wrap.makeInput(); } } inline async command bool IO.isInput() { return call Wrap.isInput(); } inline async command void IO.makeOutput() { atomic { PRCR.BYTE = BIT2; call Wrap.makeOutput(); } } inline async command bool IO.isOutput() { return call Wrap.isOutput(); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60GeneralIOPortP.nc000077500000000000000000000110661207233610700241450ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Generic component to expose a full 8-bit port of GPIO pins. * * @author Henrik Makitaavola * @author Martin Turon */ generic configuration HplM16c60GeneralIOPortP(uint16_t port_addr, uint16_t ddr_addr) { // provides all the ports as raw ports provides { interface GeneralIO as Pin0; interface GeneralIO as Pin1; interface GeneralIO as Pin2; interface GeneralIO as Pin3; interface GeneralIO as Pin4; interface GeneralIO as Pin5; interface GeneralIO as Pin6; interface GeneralIO as Pin7; } } implementation { components new HplM16c60GeneralIOPinP (port_addr, ddr_addr, 0) as Bit0, new HplM16c60GeneralIOPinP (port_addr, ddr_addr, 1) as Bit1, new HplM16c60GeneralIOPinP (port_addr, ddr_addr, 2) as Bit2, new HplM16c60GeneralIOPinP (port_addr, ddr_addr, 3) as Bit3, new HplM16c60GeneralIOPinP (port_addr, ddr_addr, 4) as Bit4, new HplM16c60GeneralIOPinP (port_addr, ddr_addr, 5) as Bit5, new HplM16c60GeneralIOPinP (port_addr, ddr_addr, 6) as Bit6, new HplM16c60GeneralIOPinP (port_addr, ddr_addr, 7) as Bit7; Pin0 = Bit0; Pin1 = Bit1; Pin2 = Bit2; Pin3 = Bit3; Pin4 = Bit4; Pin5 = Bit5; Pin6 = Bit6; Pin7 = Bit7; } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60Interrupt.nc000077500000000000000000000106761207233610700233550ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface to control an M16c/60 external pin interrupt. * * @author Henrik Makitaavola * @author Joe Polastre * @author Martin Turon */ interface HplM16c60Interrupt { /** * Enables M16c/60 hardware interrupt on a particular port. */ async command void enable(); /** * Disables M16c/60 hardware interrupt on a particular port. */ async command void disable(); /** * Clears the M16c/60 Interrupt Pending Flag for a particular port. */ async command void clear(); /** * Gets the current value of the input voltage of a port. * * @return TRUE if the pin is set high, FALSE if it is set low. */ async command bool getValue(); /** * Sets whether the edge should be high to low or low to high. * @param TRUE if the interrupt should be triggered on a low to high * edge transition, false for interrupts on a high to low transition. */ async command void edge(bool low_to_high); /** * Sets the edge mode to both edges. */ async command void bothEdges(); /** * Signaled when an interrupt occurs on a port. */ async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60InterruptC.nc000077500000000000000000000112701207233610700234470ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Martin Turon */ /** * This component providing access to all external pin interrupts on M16c/60. * * @author Henrik Makitaavola */ configuration HplM16c60InterruptC { provides { interface HplM16c60Interrupt as Int0; interface HplM16c60Interrupt as Int1; interface HplM16c60Interrupt as Int2; interface HplM16c60Interrupt as Int3; interface HplM16c60Interrupt as Int4; interface HplM16c60Interrupt as Int5; } } implementation { components HplM16c60InterruptSigP as IrqVector, new HplM16c60InterruptPinP((uint16_t)&INT0IC, 0) as IntPin0, new HplM16c60InterruptPinP((uint16_t)&INT1IC, 1) as IntPin1, new HplM16c60InterruptPinP((uint16_t)&INT2IC, 2) as IntPin2, new HplM16c60InterruptPinP((uint16_t)&INT3IC, 3) as IntPin3, new HplM16c60InterruptPinP((uint16_t)&INT4IC, 4) as IntPin4, new HplM16c60InterruptPinP((uint16_t)&INT5IC, 5) as IntPin5; Int0 = IntPin0; Int1 = IntPin1; Int2 = IntPin2; Int3 = IntPin3; Int4 = IntPin4; Int5 = IntPin5; IntPin0.IrqSignal -> IrqVector.IntSig0; IntPin1.IrqSignal -> IrqVector.IntSig1; IntPin2.IrqSignal -> IrqVector.IntSig2; IntPin3.IrqSignal -> IrqVector.IntSig3; IntPin4.IrqSignal -> IrqVector.IntSig4; IntPin5.IrqSignal -> IrqVector.IntSig5; #ifdef THREADS components PlatformInterruptC; IrqVector.PlatformInterrupt -> PlatformInterruptC; #endif } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60InterruptPinP.nc000077500000000000000000000111321207233610700241300ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Martin Turon */ /** * Interrupt interface access for interrupt capable GPIO pins. * * @author Henrik Makitaavola */ generic module HplM16c60InterruptPinP (uint16_t ctrl_addr, uint8_t edgebit) { provides interface HplM16c60Interrupt as Irq; uses interface HplM16c60InterruptSig as IrqSignal; } implementation { #define ctrl (*TCAST(volatile uint8_t * ONE, ctrl_addr)) inline async command bool Irq.getValue() { return READ_BIT(ctrl, 3); } inline async command void Irq.clear() { clear_interrupt(ctrl_addr); } inline async command void Irq.disable() { CLR_BIT(ctrl, 0); } inline async command void Irq.enable() { if (edgebit > 3) { SET_BIT(IFSR.BYTE, (edgebit+2)); } SET_BIT(ctrl, 0); } inline async command void Irq.edge(bool low_to_high) { CLR_BIT(IFSR.BYTE, edgebit); // use edge mode // and select rising vs falling if (low_to_high) { SET_BIT(ctrl, 4); } else { CLR_BIT(ctrl, 4); } } inline async command void Irq.bothEdges() { SET_BIT(IFSR.BYTE, edgebit); CLR_BIT(ctrl, 4); } /** * Forward the external interrupt event. */ async event void IrqSignal.fired() { call Irq.clear(); signal Irq.fired(); } default async event void Irq.fired() { } } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60InterruptSig.nc000077500000000000000000000073431207233610700240150ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface to an M16c/60 external pin interrupt that exposes just the * interrupt vector routine for easy linking to generic components (see * HplM16c60Interrupt for the full interface). * * @author Henrik Makitaavola * @author Martin Turon * @see HplM16c60Interrupt */ interface HplM16c60InterruptSig { /** * Signaled when an interrupt occurs on a pin */ async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/HplM16c60InterruptSigP.nc000077500000000000000000000115511207233610700241310ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Martin Turon */ /** * Interrupt interface access for interrupt capable GPIO pins. * Exposes just the interrupt vector routine for * easy linking to generic components. * * @author Henrik Makitaavola */ module HplM16c60InterruptSigP { provides interface HplM16c60InterruptSig as IntSig0; provides interface HplM16c60InterruptSig as IntSig1; provides interface HplM16c60InterruptSig as IntSig2; provides interface HplM16c60InterruptSig as IntSig3; provides interface HplM16c60InterruptSig as IntSig4; provides interface HplM16c60InterruptSig as IntSig5; #ifdef THREADS uses interface PlatformInterrupt; #define POST_AMBLE() call PlatformInterrupt.postAmble() #else #define POST_AMBLE() #endif } implementation { default async event void IntSig0.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT0) { signal IntSig0.fired(); POST_AMBLE(); } default async event void IntSig1.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT1) { signal IntSig1.fired(); POST_AMBLE(); } default async event void IntSig2.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT2) { signal IntSig2.fired(); POST_AMBLE(); } default async event void IntSig3.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT3) { signal IntSig3.fired(); POST_AMBLE(); } default async event void IntSig4.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT4) { signal IntSig4.fired(); POST_AMBLE(); } default async event void IntSig5.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT5) { signal IntSig5.fired(); POST_AMBLE(); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/M16c60InterruptC.nc000077500000000000000000000111001207233610700227730ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Joe Polastre * @author Martin Turon */ /** * Creates a HIL interrupt component from a M16c/60 interrupt. * * @author Henrik Makitaavola */ generic module M16c60InterruptC() { provides interface GpioInterrupt; uses interface HplM16c60Interrupt; } implementation { async command error_t GpioInterrupt.enableRisingEdge() { atomic { call HplM16c60Interrupt.disable(); call HplM16c60Interrupt.edge(true); call HplM16c60Interrupt.clear(); call HplM16c60Interrupt.enable(); } return SUCCESS; } async command error_t GpioInterrupt.enableFallingEdge() { atomic { call HplM16c60Interrupt.disable(); call HplM16c60Interrupt.edge(false); call HplM16c60Interrupt.enable(); // For some reason we need to clear the interrupt after we enable it // to prevent already pending interrupts. call HplM16c60Interrupt.clear(); } return SUCCESS; } async command error_t GpioInterrupt.disable() { atomic { call HplM16c60Interrupt.disable(); call HplM16c60Interrupt.clear(); } return SUCCESS; } async event void HplM16c60Interrupt.fired() { signal GpioInterrupt.fired(); } default async event void GpioInterrupt.fired() { } } tinyos-2.1.2+dfsg/tos/chips/m16c60/pins/M16c60Pin.h000066400000000000000000000045641207233610700212660ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * M16c60 pin defines and enums. * * @author Henrik Makitaavola */ #ifndef __M16C60_PIN_H__ #define __M16C60_PIN_H__ enum { M16C_PIN_INACTIVE_DONT_CARE = 0, M16C_PIN_INACTIVE_OUTPUT_LOW = 1, M16C_PIN_INACTIVE_OUTPUT_HIGH = 2, M16C_PIN_INACTIVE_INPUT = 3 }; #define M16C_PORT_INACTIVE_STATE(p0, p1, p2, p3, p4, p5, p6, p7) p0 | (p1 << 2) | \ (p2 << 4) | (p3 << 6) | \ (p4 << 8) | (p5 << 10) | \ (p6 << 12) | (p7 << 14) #endif // __M16C60_PIN_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/printf/000077500000000000000000000000001207233610700201125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/printf/m16c60_printf.h000066400000000000000000000204001207233610700225550ustar00rootroot00000000000000/**************************************************************** KPIT Cummins Infosystems Ltd, Pune, India. 1-April-2006. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. *****************************************************************/ /* Written By: Shrirang Khishti . This is a smaller version of printf Positive points about this function 1. Reduces code size considerably ,very useful in embedded applications 2. No malloc calls are used 3. Supports almost all the functionalities of GNU std printf routine. 4. If user dont want float_support in this customized printf just undef macro float_support */ #ifndef __M16C60_PRINTF_H__ #define __M16C60_PRINTF_H__ #include #include #define printf _printf int left_val,right_val; #define condition *format!='f'&&*format!='d'&&*format!='c'&&*format!='s'&&*format!='l'&&*format!='u'&&*format!='\0'&&*format!=' '&&*format!='i'&&*format!='x'&&*format!='X'&&*format!='o'&&*format!='%'&&*format!='p' #define float_support long temp_arr[]={100000,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000}; /** * @fn * @brief * * @param c */ int _putchar(int c) { /* Convert CR to CR/LF */ if (c == '\n') lowlevel_putc('\r'); lowlevel_putc(c); return c; } /** * @fn void _puts(const char *tempStr) * @brief Prints a NULL-erminated string on UART 1 * * @param s The string to output * */ int _puts(const char *s) { while( *s != '\0' ) _putchar(*s++); return 0; } /** * @fn void strrev(char *str) * @brief Reverses a string * * @param str The string to reverse */ void strrev(char *str) { char *temp, c; int len=strlen(str) ; temp = str + len -1; while(str < temp ) { c = *str; *str = *temp; *temp = c; str++; temp--; } } static void print_hex_oct( long int temp_var,int _div,int corr_factor,int ret_val,int sign,int *cntr_val) { unsigned long int i=1,i1,temp=temp_var; int cntr=0,neg_flag=0; char s1[40]; if(sign==1&&temp_var<0) { temp=-temp_var; neg_flag=1; } if(temp==0) s1[cntr++]='0'; while(temp>0) { i1=temp%_div; temp=temp/_div; if(i1<=9) s1[cntr]=i1+'0'; else s1[cntr]=i1+corr_factor-9; cntr++; } while((left_val-(right_val>cntr?right_val:cntr+neg_flag))>0) { _putchar(' '); left_val--; (*cntr_val)++; } while(right_val-cntr>0) { s1[cntr++]='0'; } if(neg_flag==1) s1[cntr++]='-'; s1[cntr]='\0'; strrev(s1); _puts(s1); (*cntr_val)+=strlen(s1); } #ifdef float_support static void float_print(long double f1,long double f2,int multi,int *cntr_val) { int i=1,temp,cntr=0,i1,neg_flag=0; char s1[10]; if(f1<0) { f1=f1*-1; neg_flag=1; f2=f1; } temp=(int)f1; f1=f1-temp; f1=f1*multi; temp=f1; if(temp==0) s1[cntr++]='0'; while(temp>0) { i1=temp%10; temp=temp/10; s1[cntr]=i1+0x30; cntr++; } while(right_val<9&&(right_val -cntr)>0) s1[cntr++]='0'; s1[cntr]='.'; cntr++; temp=(int)f2; if(temp==0) s1[cntr++]='0'; while(temp>0) { i1=temp%10; temp=temp/10; s1[cntr]=i1+0x30; cntr++; } while(left_val-- -cntr>0) { _putchar(' '); (*cntr_val)++; } if(neg_flag==1) s1[cntr++]='-'; s1[cntr]='\0'; cntr--; strrev(s1); _puts(s1); (*cntr_val)+=strlen(s1); neg_flag=0; } #endif // float_support static int format_val(char *temp,long float_flag,int *cntr_val,int flag) { left_val=0; right_val=0; if(*temp=='\0'&&flag==1) { right_val=3; return 0; } while(*temp!='.'&&*temp!='\0') { if(*temp<'0'||*temp>'9') { while(*temp) { _putchar(*temp++); (*cntr_val)++; } return -1; } else left_val=left_val*10+*temp-'0'; temp++; } if(*temp) temp++; else return left_val; while(*temp) { if(*temp<'0'||*temp>'9') { while(*temp) { _putchar(*temp++); (*cntr_val)++; } return -1; } else right_val=right_val*10+*temp-'0'; temp++; } return 0; } /** * @fn int _printf(const char *format, ...) * @brief Prints a formatted string on UART1 * * @param format The string */ int _printf(const char *format, ...) { int format_cntr=0; char temp_str[20]; int return_flag=0,cntr_val; long double f1,f2; char *str_temp; int *cntr=&cntr_val; va_list ap; va_start(ap, format); *cntr=0; while(*format) { temp_str[format_cntr]='\0'; if(*format=='%') { *format++; while(*format==' ') { format++; _putchar(' '); } while(condition) { temp_str[format_cntr++]=*format++; } temp_str[format_cntr]='\0'; if(*format=='%') { _putchar('%'); (*cntr)++; format_cntr=0; format++; continue; } /************** print unsigned ****************/ else if(*format=='u') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) print_hex_oct(va_arg(ap,unsigned int),10,0,return_flag,0,cntr); else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /*********** Print Integer Values **************/ else if(*format=='d'||*format=='i') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) print_hex_oct(va_arg(ap,int),10,0,return_flag,1,cntr); else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /*********** Print hex,Octal values ******************/ else if(*format=='x'||*format=='X'||*format=='o'||*format=='p') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) { if(*format=='x'||*format=='p') print_hex_oct(va_arg(ap,unsigned int),16,0x60,return_flag,0,cntr); else if(*format=='X') print_hex_oct(va_arg(ap,unsigned int),16,0x40,return_flag,0,cntr); else print_hex_oct(va_arg(ap,unsigned int),8,0,return_flag,0,cntr); } else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /************ Character printing ****************88*/ else if(*format=='c') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) { while(return_flag-->1) { _putchar(' '); (*cntr)++; } _putchar(va_arg(ap,int)); (*cntr)+=2; } else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /*************** Print String *****************/ else if(*format=='s') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) { str_temp=va_arg(ap,char*); while((return_flag-- -(int) strlen(str_temp))>0) { _putchar(' '); (*cntr)++; } _puts(str_temp); (*cntr)+=strlen(str_temp); } else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /*************** Print floating point number *****************/ else if(*format=='f'||(*format=='l'&&*(format+1)=='f')) { return_flag=format_val(temp_str,1,cntr,1); if(return_flag!=-1) { if(*format=='l') { f1=va_arg(ap,long double); format+=2; } else { f1=va_arg(ap,double); format++; } f2=f1; #ifdef float_support right_val++; float_print(f1,f2,temp_arr[right_val%10],cntr); #endif } else { _putchar(*format++); (*cntr)++; } format_cntr=0; continue; } else if(*format=='l'&&((*(format+1)=='d')||(*(format+1)=='u'))) { return_flag=format_val(temp_str,0,cntr,0); if((return_flag=-1)&&(*(format+1)=='d')) { print_hex_oct(va_arg(ap,long int),10,0x00,return_flag,1,cntr); } else if((return_flag=-1)&&(*(format+1)=='u')) { print_hex_oct(va_arg(ap,unsigned long int),10,0x00,return_flag,0,cntr); } else { _putchar(*format); _putchar(*(format+1)); (*cntr)+=2; } format+=2; format_cntr=0; continue; } else { _puts(temp_str); format_cntr=0; continue; } } _putchar(*format++); (*cntr)++; } va_end(ap); return cntr_val; } #endif // __M16C60_PRINTF_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/000077500000000000000000000000001207233610700177305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60Timer.nc000077500000000000000000000121301207233610700225730ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Basic interface to the hardware timers on the M16C/60. * This interface provides four major groups of functionality:
        *
      1. Timer Value: get/set current time *
      2. Interrupt event, occurs when the timer under- or overflows. *
      3. Control of Interrupt: enableInterrupt/disableInterrupt/clearInterrupt... *
      4. Timer Initialization: turn on/off clock source *
      * * @author Henrik Makitaavola * @author Martin Turon */ #include "M16c60Timer.h" interface HplM16c60Timer { /** * Turn on the clock. */ async command void on(); /** * Turn off the clock. */ async command void off(); /** * Check if the clock is on. */ async command bool isOn(); /** * Get the current time. * @return the current time. */ async command uint16_t get(); /** * Set the current time. * @param t the time to set. */ async command void set( uint16_t t ); /** * Signalled on timer interrupt. */ async event void fired(); /** * Clear the interrupt flag. */ async command void clearInterrupt(); /** * Enable the interrupts. */ async command void enableInterrupt(); /** * Turns off interrupts. */ async command void disableInterrupt(); /** * Checks if an interrupt has occured. * @return TRUE if interrupt has triggered. */ async command bool testInterrupt(); /** * Checks if interrupts are on. * @return TRUE if interrups are enabled. */ async command bool isInterruptOn(); /** * Turn stop mode on/off while the timer is on. * @param allow If true the mcu can go into stop mode while * timer is on if false the mcu can only use * wait mode while timer is on. */ async command void allowStopMode(bool allow); } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60TimerACtrl.nc000077500000000000000000000047411207233610700235320ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface for controlling the mode of a TimerA. * * @author Henrik Makitaavola */ #include "M16c60Timer.h" interface HplM16c60TimerACtrl { /** * Sets the timer to timer mode. * * @param settings The settings for the timer mode. */ async command void setTimerMode(st_timer settings); /** * Sets the timer to counter mode. * * @param settings The settings for the counter mode. */ async command void setCounterMode(sta_counter settings); /** * Sets the timer to one-shot mode. * * @param settings The settings for the one-shot mode. */ async command void setOneShotMode(sta_one_shot settings); /** * Starts the timer if in one-shot mode. */ async command void oneShotFire(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60TimerACtrlP.nc000077500000000000000000000107631207233610700236530ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the HplM16c60TimerACtrl interface. * * @author Henrik Makitaavola */ #include "M16c60Timer.h" generic module HplM16c60TimerACtrlP (uint8_t timer, uint16_t mode_addr, uint16_t taitg_addr, uint8_t taitg_start_bit) { provides interface HplM16c60TimerACtrl as TimerACtrl; } implementation { #define mode (*TCAST(volatile uint8_t* ONE, mode_addr)) #define taitg (*TCAST(volatile uint8_t* ONE, taitg_addr)) inline void UDFBit(uint16_t bit, uint16_t value) { uint8_t tmp = UDF; WRITE_BIT(tmp, bit, value); // Move tmp variable into UDF (adress 0x0384) asm("mov.b %0,(0x0384)" : : "r"(tmp) ); } inline void setTAiTG(uint8_t flag) { CLR_FLAG(taitg, 0x03 << taitg_start_bit); SET_FLAG(taitg, flag << taitg_start_bit); } async command void TimerACtrl.setTimerMode(st_timer settings) { uint8_t flags = 0; // If timer nr > 1 set "Two-phase pulse signal" bit to zero. if (timer > 1) { UDFBit(timer + 3, 0); } flags = settings.output_pulse << 2 | settings.gate_func << 3 | settings.count_src << 6; mode = flags; } async command void TimerACtrl.setCounterMode(sta_counter settings) { uint8_t flags; uint8_t TAiTG; mode = 1; flags = settings.operation_type << 6; if (settings.two_phase_pulse_mode && timer > 1) { uint8_t tmp = timer; // Used to remove left shift warning // Set flags flags |= 0x04 | settings.two_phase_processing << 7; // If two-phase signal procressing is desired UDF TAiP bit must be set. UDFBit(timer + 3, 1); // Set TAiTGH and TAiTGL in TRGSR to "00b" (TAiIN pin input). if (tmp == 0) tmp = 1; // This line will never be executed because tmp is always > 1 CLR_FLAG(TRGSR.BYTE, 0x03 << ((tmp - 1) * 2)); TAiTG = 0x00; } else { flags |= settings.output_pulse << 2 | settings.count_rising_edge << 3 | settings.up_down_switch << 4; // If two-phase signal procressing is not desired UDF TAiP bit must be cleared. // Note this is only availible for timers A2, A3 and A4 if (timer > 1) { UDFBit(timer + 3, 0); } UDFBit(timer, settings.up_count); TAiTG = settings.event_source; } setTAiTG(TAiTG); mode |= flags; } async command void TimerACtrl.setOneShotMode(sta_one_shot settings) { uint8_t flags; mode = 0x02; flags = settings.output_pulse << 2 | settings.ext_trigger_rising_edge << 3 | settings.trigger << 4 | settings.count_src << 6; setTAiTG(settings.TAiTG_trigger_source); mode |= flags; } async command void TimerACtrl.oneShotFire() { SET_BIT(ONSF.BYTE, timer); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60TimerBCtrl.nc000077500000000000000000000044411207233610700235300ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface for controlling the mode of a TimerB. * Precaution when using timer mode, read M16c60Timer.h for more information. * * @author Henrik Makitaavola */ #include "M16c60Timer.h" interface HplM16c60TimerBCtrl { /** * Sets the timer to timer mode. * * @param settings The settings for the timer mode. */ async command void setTimerMode(st_timer settings); /** * Sets the timer to counter mode. * * @param settings The settings for the counter mode. */ async command void setCounterMode(stb_counter settings); } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60TimerBCtrlP.nc000077500000000000000000000044631207233610700236540ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the HplM16c60TimerBCtrl interface. * * @author Henrik Makitaavola */ #include "M16c60Timer.h" generic module HplM16c60TimerBCtrlP (uint16_t mode_addr) { provides interface HplM16c60TimerBCtrl as TimerBCtrl; } implementation { #define mode (*TCAST(volatile uint8_t* ONE, mode_addr)) async command void TimerBCtrl.setTimerMode(st_timer settings) { mode = settings.count_src << 6; } async command void TimerBCtrl.setCounterMode(stb_counter settings) { mode = 1 | settings.count_polarity << 2 | settings.event_source << 7; } } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60TimerC.nc000077500000000000000000000160561207233610700227110ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interfaces to all the M16c/60 timers and controls. * * @author Henrik Makitaavola */ configuration HplM16c60TimerC { provides { interface HplM16c60Timer as TimerA0; interface HplM16c60Timer as TimerA1; interface HplM16c60Timer as TimerA2; interface HplM16c60Timer as TimerA3; interface HplM16c60Timer as TimerA4; interface HplM16c60TimerACtrl as TimerA0Ctrl; interface HplM16c60TimerACtrl as TimerA1Ctrl; interface HplM16c60TimerACtrl as TimerA2Ctrl; interface HplM16c60TimerACtrl as TimerA3Ctrl; interface HplM16c60TimerACtrl as TimerA4Ctrl; interface HplM16c60Timer as TimerB0; interface HplM16c60Timer as TimerB1; interface HplM16c60Timer as TimerB2; interface HplM16c60Timer as TimerB3; interface HplM16c60Timer as TimerB4; interface HplM16c60Timer as TimerB5; interface HplM16c60TimerBCtrl as TimerB0Ctrl; interface HplM16c60TimerBCtrl as TimerB1Ctrl; interface HplM16c60TimerBCtrl as TimerB2Ctrl; interface HplM16c60TimerBCtrl as TimerB3Ctrl; interface HplM16c60TimerBCtrl as TimerB4Ctrl; interface HplM16c60TimerBCtrl as TimerB5Ctrl; } } implementation { components HplM16c60TimerInterruptP as IrqVector, new HplM16c60TimerP((uint16_t)&TA0, (uint16_t)&TA0IC, (uint16_t)&TABSR, 0) as TimerA0_, new HplM16c60TimerP((uint16_t)&TA1, (uint16_t)&TA1IC, (uint16_t)&TABSR, 1) as TimerA1_, new HplM16c60TimerP((uint16_t)&TA2, (uint16_t)&TA2IC, (uint16_t)&TABSR, 2) as TimerA2_, new HplM16c60TimerP((uint16_t)&TA3, (uint16_t)&TA3IC, (uint16_t)&TABSR, 3) as TimerA3_, new HplM16c60TimerP((uint16_t)&TA4, (uint16_t)&TA4IC, (uint16_t)&TABSR, 4) as TimerA4_, new HplM16c60TimerACtrlP(0, (uint16_t)&TA0MR, (uint16_t)&ONSF, 6) as TimerA0Ctrl_, new HplM16c60TimerACtrlP(1, (uint16_t)&TA1MR, (uint16_t)&TRGSR, 0) as TimerA1Ctrl_, new HplM16c60TimerACtrlP(2, (uint16_t)&TA2MR, (uint16_t)&TRGSR, 2) as TimerA2Ctrl_, new HplM16c60TimerACtrlP(3, (uint16_t)&TA3MR, (uint16_t)&TRGSR, 4) as TimerA3Ctrl_, new HplM16c60TimerACtrlP(4, (uint16_t)&TA4MR, (uint16_t)&TRGSR, 6) as TimerA4Ctrl_, new HplM16c60TimerP((uint16_t)&TB0, (uint16_t)&TB0IC, (uint16_t)&TABSR, 5) as TimerB0_, new HplM16c60TimerP((uint16_t)&TB1, (uint16_t)&TB1IC, (uint16_t)&TABSR, 6) as TimerB1_, new HplM16c60TimerP((uint16_t)&TB2, (uint16_t)&TB2IC, (uint16_t)&TABSR, 7) as TimerB2_, new HplM16c60TimerP((uint16_t)&TB3, (uint16_t)&TB3IC, (uint16_t)&TBSR, 5) as TimerB3_, new HplM16c60TimerP((uint16_t)&TB4, (uint16_t)&TB4IC, (uint16_t)&TBSR, 6) as TimerB4_, new HplM16c60TimerP((uint16_t)&TB5, (uint16_t)&TB5IC, (uint16_t)&TBSR, 7) as TimerB5_, new HplM16c60TimerBCtrlP((uint16_t)&TB0MR) as TimerB0Ctrl_, new HplM16c60TimerBCtrlP((uint16_t)&TB1MR) as TimerB1Ctrl_, new HplM16c60TimerBCtrlP((uint16_t)&TB2MR) as TimerB2Ctrl_, new HplM16c60TimerBCtrlP((uint16_t)&TB3MR) as TimerB3Ctrl_, new HplM16c60TimerBCtrlP((uint16_t)&TB4MR) as TimerB4Ctrl_, new HplM16c60TimerBCtrlP((uint16_t)&TB5MR) as TimerB5Ctrl_, new StopModeControlC() as TimerA0StopModeControl, new StopModeControlC() as TimerA1StopModeControl, new StopModeControlC() as TimerA2StopModeControl, new StopModeControlC() as TimerA3StopModeControl, new StopModeControlC() as TimerA4StopModeControl, new StopModeControlC() as TimerB0StopModeControl, new StopModeControlC() as TimerB1StopModeControl, new StopModeControlC() as TimerB2StopModeControl, new StopModeControlC() as TimerB3StopModeControl, new StopModeControlC() as TimerB4StopModeControl, new StopModeControlC() as TimerB5StopModeControl; TimerA0 = TimerA0_; TimerA1 = TimerA1_; TimerA2 = TimerA2_; TimerA3 = TimerA3_; TimerA4 = TimerA4_; TimerA0_.StopModeControl -> TimerA0StopModeControl; TimerA1_.StopModeControl -> TimerA1StopModeControl; TimerA2_.StopModeControl -> TimerA2StopModeControl; TimerA3_.StopModeControl -> TimerA3StopModeControl; TimerA4_.StopModeControl -> TimerA4StopModeControl; TimerB0 = TimerB0_; TimerB1 = TimerB1_; TimerB2 = TimerB2_; TimerB3 = TimerB3_; TimerB4 = TimerB4_; TimerB5 = TimerB5_; TimerB0_.StopModeControl -> TimerB0StopModeControl; TimerB1_.StopModeControl -> TimerB1StopModeControl; TimerB2_.StopModeControl -> TimerB2StopModeControl; TimerB3_.StopModeControl -> TimerB3StopModeControl; TimerB4_.StopModeControl -> TimerB4StopModeControl; TimerB5_.StopModeControl -> TimerB5StopModeControl; TimerA0_.IrqSignal -> IrqVector.TimerA0; TimerA1_.IrqSignal -> IrqVector.TimerA1; TimerA2_.IrqSignal -> IrqVector.TimerA2; TimerA3_.IrqSignal -> IrqVector.TimerA3; TimerA4_.IrqSignal -> IrqVector.TimerA4; TimerB0_.IrqSignal -> IrqVector.TimerB0; TimerB1_.IrqSignal -> IrqVector.TimerB1; TimerB2_.IrqSignal -> IrqVector.TimerB2; TimerB3_.IrqSignal -> IrqVector.TimerB3; TimerB4_.IrqSignal -> IrqVector.TimerB4; TimerB5_.IrqSignal -> IrqVector.TimerB5; TimerA0Ctrl = TimerA0Ctrl_; TimerA1Ctrl = TimerA1Ctrl_; TimerA2Ctrl = TimerA2Ctrl_; TimerA3Ctrl = TimerA3Ctrl_; TimerA4Ctrl = TimerA4Ctrl_; TimerB0Ctrl = TimerB0Ctrl_; TimerB1Ctrl = TimerB1Ctrl_; TimerB2Ctrl = TimerB2Ctrl_; TimerB3Ctrl = TimerB3Ctrl_; TimerB4Ctrl = TimerB4Ctrl_; TimerB5Ctrl = TimerB5Ctrl_; #ifdef THREADS components PlatformInterruptC; IrqVector.PlatformInterrupt -> PlatformInterruptC; #endif } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60TimerInterrupt.nc000077500000000000000000000037421207233610700245210ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface for interrupt signal from a timer. * * @author Henrik Makitaavola */ interface HplM16c60TimerInterrupt { /** * Signal when an overflow/underflow interrupt occurs on a timer. */ async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60TimerInterruptP.nc000077500000000000000000000102521207233610700246330ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * All timer interrupt vector handlers. * These are wired in HplM16c60TimerC. * * @author Henrik Makitaavola */ module HplM16c60TimerInterruptP { provides interface HplM16c60TimerInterrupt as TimerA0; provides interface HplM16c60TimerInterrupt as TimerA1; provides interface HplM16c60TimerInterrupt as TimerA2; provides interface HplM16c60TimerInterrupt as TimerA3; provides interface HplM16c60TimerInterrupt as TimerA4; provides interface HplM16c60TimerInterrupt as TimerB0; provides interface HplM16c60TimerInterrupt as TimerB1; provides interface HplM16c60TimerInterrupt as TimerB2; provides interface HplM16c60TimerInterrupt as TimerB3; provides interface HplM16c60TimerInterrupt as TimerB4; provides interface HplM16c60TimerInterrupt as TimerB5; #ifdef THREADS uses interface PlatformInterrupt; #define POST_AMBLE() call PlatformInterrupt.postAmble() #else #define POST_AMBLE() #endif } implementation { default async event void TimerA0.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA0) { signal TimerA0.fired(); POST_AMBLE(); } default async event void TimerA1.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA1) { signal TimerA1.fired(); POST_AMBLE(); } default async event void TimerA2.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA2) { signal TimerA2.fired(); POST_AMBLE(); } default async event void TimerA3.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA3) { signal TimerA3.fired(); POST_AMBLE(); } default async event void TimerA4.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA4) { signal TimerA4.fired(); POST_AMBLE(); } default async event void TimerB0.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB0) { signal TimerB0.fired(); POST_AMBLE(); } default async event void TimerB1.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB1) { signal TimerB1.fired(); POST_AMBLE(); } default async event void TimerB2.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB2) { signal TimerB2.fired(); POST_AMBLE(); } default async event void TimerB3.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB3) { signal TimerB3.fired(); POST_AMBLE(); } default async event void TimerB4.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB4) { signal TimerB4.fired(); POST_AMBLE(); } default async event void TimerB5.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB5) { signal TimerB5.fired(); POST_AMBLE(); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/HplM16c60TimerP.nc000077500000000000000000000077121207233610700227250ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of a generic HplM16c60Timer interface. * * @author Henrik Makitaavola */ generic module HplM16c60TimerP (uint16_t timer_addr, uint16_t interrupt_addr, uint16_t start_addr, uint8_t start_bit) { provides interface HplM16c60Timer as Timer; uses interface HplM16c60TimerInterrupt as IrqSignal; uses interface StopModeControl; } implementation { #define timer (*TCAST(volatile uint16_t* ONE, timer_addr)) #define start (*TCAST(volatile uint8_t* ONE, start_addr)) #define interrupt (*TCAST(volatile uint8_t* ONE, interrupt_addr)) bool allow_stop_mode = false; async command uint16_t Timer.get() { return timer; } async command void Timer.set( uint16_t t ) { // If the timer is on it must be turned off, else the value will // only be written to the reload register. atomic { if(call Timer.isOn()) { call Timer.off(); timer = t; call Timer.on(); } else { timer = t; } } } // When the timer is turned on in one-shot mode on TimerA // the timer also needs an trigger event to start counting. async command void Timer.on() { atomic if (!allow_stop_mode) { call StopModeControl.allowStopMode(false); } SET_BIT(start, start_bit); } async command void Timer.off() { CLR_BIT(start, start_bit); atomic if (!allow_stop_mode) { call StopModeControl.allowStopMode(true); } } async command bool Timer.isOn() { return READ_BIT(start, start_bit); } async command void Timer.clearInterrupt() { clear_interrupt(interrupt_addr); } async command void Timer.enableInterrupt() { SET_BIT(interrupt, 0); } async command void Timer.disableInterrupt() { CLR_BIT(interrupt, 0); } async command bool Timer.testInterrupt() { return READ_BIT(interrupt, 3); } async command bool Timer.isInterruptOn() { return READ_BIT(interrupt, 0); } async command void Timer.allowStopMode(bool allow) { allow_stop_mode = allow; } // Forward the timer interrupt event. async event void IrqSignal.fired() { signal Timer.fired(); } default async event void Timer.fired() { } } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/M16c60Alarm16C.nc000077500000000000000000000065131207233610700223650ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Build a TEP102 16bits Alarm from a counter and a M16c60 hardware timers. * Use the counter to get the "current time" and the hw timer to count down the * remaining time for the alarm to be fired. * * @author Henrik Makitaavola */ generic module M16c60Alarm16C(typedef precision_tag) { provides interface Alarm as Alarm @atmostonce(); uses interface HplM16c60Timer as ATimer; // Alarm Timer uses interface Counter; } implementation { uint16_t alarm = 0; async command uint16_t Alarm.getNow() { return call Counter.get(); } async command uint16_t Alarm.getAlarm() { return alarm; } async command bool Alarm.isRunning() { return call ATimer.isInterruptOn(); } async command void Alarm.stop() { atomic { call ATimer.off(); call ATimer.disableInterrupt(); } } async command void Alarm.start( uint16_t dt ) { call Alarm.startAt( call Alarm.getNow(), dt); } async command void Alarm.startAt( uint16_t t0, uint16_t dt ) { atomic { uint16_t now, elapsed, expires; now = call Alarm.getNow(); elapsed = now - t0; if (elapsed >= dt) { expires = 0; } else { expires = dt - elapsed - 1; } call ATimer.off(); call ATimer.set(expires); call ATimer.clearInterrupt(); call ATimer.enableInterrupt(); call ATimer.on(); } } async event void ATimer.fired() { call Alarm.stop(); signal Alarm.fired(); } async event void Counter.overflow() {} } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/M16c60Alarm32C.nc000077500000000000000000000107151207233610700223620ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Build a TEP102 32bit Alarm from a counter and two M16c60 hardware timers. * Use the counter to get the "current time" and the hw timer to count down the * remaining time for the alarm to be fired. * * @author Henrik Makitaavola */ generic module M16c60Alarm32C(typedef precision_tag) { provides interface Alarm as Alarm @atmostonce(); uses interface HplM16c60Timer as ATimerLow; // Alarm Timer low bits uses interface HplM16c60Timer as ATimerHigh; // Alarm Timer high bits uses interface Counter; } implementation { uint32_t alarm = 0; async command uint32_t Alarm.getNow() { return call Counter.get(); } async command uint32_t Alarm.getAlarm() { atomic return alarm; } async command bool Alarm.isRunning() { return call ATimerLow.isInterruptOn() || call ATimerHigh.isInterruptOn(); } async command void Alarm.stop() { atomic { call ATimerLow.off(); call ATimerLow.disableInterrupt(); call ATimerHigh.off(); call ATimerHigh.disableInterrupt(); } } async command void Alarm.start( uint32_t dt ) { call Alarm.startAt( call Alarm.getNow(), dt); } async command void Alarm.startAt( uint32_t t0, uint32_t dt ) { atomic { uint32_t now, elapsed, expires; now = call Alarm.getNow(); elapsed = now - t0; if (elapsed >= dt) { expires = 0; } else { expires = dt - elapsed - 1; } alarm = expires; call Alarm.stop(); if (expires <= 0xFFFF) { call ATimerLow.set((uint16_t)expires); call ATimerLow.clearInterrupt(); call ATimerLow.enableInterrupt(); call ATimerLow.on(); } else { uint16_t high_bits; high_bits = expires >> 16; call ATimerHigh.set(high_bits-1); call ATimerHigh.clearInterrupt(); call ATimerHigh.enableInterrupt(); call ATimerHigh.on(); call ATimerLow.set(0xFFFF); call ATimerLow.on(); } } } async event void ATimerLow.fired() { call Alarm.stop(); signal Alarm.fired(); } async event void ATimerHigh.fired() { atomic { uint16_t remaining; call Alarm.stop(); // All the high bits should have been cleared so only the // low should remain. remaining = (uint16_t)(alarm & 0xFFFF); if (remaining != 0) { call ATimerLow.set(remaining); call ATimerLow.clearInterrupt(); call ATimerLow.enableInterrupt(); call ATimerLow.on(); } else { signal Alarm.fired(); } } } async event void Counter.overflow() {} } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/M16c60Counter16C.nc000077500000000000000000000046601207233610700227510ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Build a TEP102 16bits Counter from an M16c/60 hardware timer. * * @author Henrik Makitaavola */ generic module M16c60Counter16C(typedef precision_tag) { provides interface Counter as Counter; uses interface HplM16c60Timer as Timer; } implementation { async command uint16_t Counter.get() { // The timer counts down so the time needs to be inverted. return (0xFFFF) - call Timer.get(); } async command bool Counter.isOverflowPending() { return call Timer.testInterrupt(); } async command void Counter.clearOverflow() { call Timer.clearInterrupt(); } async event void Timer.fired() { signal Counter.overflow(); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/M16c60Counter32C.nc000077500000000000000000000052121207233610700227410ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Build a TEP102 32 bit Counter from two M16c/60 hardware timers. * * @author Henrik Makitaavola */ generic module M16c60Counter32C(typedef precision_tag) { provides interface Counter as Counter; uses interface HplM16c60Timer as TimerLow; uses interface HplM16c60Timer as TimerHigh; } implementation { async command uint32_t Counter.get() { uint32_t time = 0; atomic { time = (((uint32_t)call TimerHigh.get()) << 16) + call TimerLow.get(); } // The timers count down so the time needs to be inverted. return (0xFFFFFFFF) - time; } async command bool Counter.isOverflowPending() { return call TimerHigh.testInterrupt(); } async command void Counter.clearOverflow() { call TimerHigh.clearInterrupt(); } async event void TimerHigh.fired() { signal Counter.overflow(); } async event void TimerLow.fired() {} } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/M16c60Timer.h000077500000000000000000000126531207233610700217700ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This file contains structures and defines used together with timer * interfaces and control. * * @author Henrik Makitaavola */ #ifndef __M16C60TIMER_H__ #define __M16C60TIMER_H__ /* * Precations when using Timer A1 and Timer A2. * Read hardware manual page 139. * * Precations when using Timer B2. * Read hardware manual page 156. */ enum { TMR_TIMER_MODE, TMR_COUNTER_MODE, TMR_ONE_SHOT_MODE }; /* Timer mode */ typedef struct { uint8_t output_pulse:1; // TAiMR: MR0 . TAiOUT pin is a pulse output pin if bit is set. No effect on TimerB. uint8_t gate_func:2; // TAiMR: MR1, MR2 [ NO_GATE | TAiIN_LOW | TAiIN_HIGH ] . No effect on TimerB. uint8_t count_src:2; // T*iMR: TCK0, TCK1 [ F1_2 | F8 | F32 | FC32 ] } st_timer; // "gate_func" enum { M16C_TMR_TMR_GF_NO_GATE = 0x0, M16C_TMR_TMR_GF_TAiIN_LOW = 0x2, M16C_TMR_TMR_GF_TAiIN_HIGH = 0x3 }; /* TimerA Counter mode */ typedef struct { uint8_t two_phase_pulse_mode:1; // Use two phase mode, only available for timers A2, A3 and A4, will be ignored else. // Flags active in two-phase mode uint8_t two_phase_processing:1; // TAiMR: TCK1 [ NORMAL | MULTIPLY_BY_4 ] Only active for Timer A3. // Flags active when not using two-phase mode. uint8_t output_pulse:1; // TAIMR: MR0 . TAiOUT is N-channel open drain output when bit is set. uint8_t count_rising_edge:1; // TAiMR: MR1 . Active when event_trigger = TAiIN uint8_t up_down_switch:1; // TAiMR: MR2 [ UDF | TAiOUT ] uint8_t up_count:1; // UDF: TAiUD . Active when up_down_switch = UDF uint8_t event_source:2; // ONSF/TRGS: TAiTG [ TAiIN | TB2 | TA_PREV | TA_NEXT ] // Flags active in both modes uint8_t operation_type:1; // TAiMR: TCK0 [ RELOAD | FREE_RUN ] } sta_counter; // "operation_type" enum { M16C_TMR_CTR_OT_RELOAD = 0x0, M16C_TMR_CTR_OT_FREE_RUN = 0x1 }; // "up_down_switch" enum { M16C_TMR_CTR_UDS_UDF = 0x0, M16C_TMR_CTR_UDS_TAiOUT = 0x1 }; // "two_phase_processing" enum { M16C_TMR_CTR_TPP_NORMAL = 0x0, M16C_TMR_CTR_TPP_MULTIPLY_BY_4 = 0x1 }; /* TimerA one shot mode. */ typedef struct { uint8_t output_pulse:1; // TAiMR: MR0 . TAiOUT pin is a pulse output pin if bit is set. uint8_t ext_trigger_rising_edge:1;// TAiMR: MR1 . Trigger on rising edge of input signal to TAiIN if bit is set. Active when TAiTG = 00b. uint8_t trigger:1; // TAiMR: MR2 [ TAiOS | TAiTG ] uint8_t count_src:2; // TAiMR: TCK0, TCK1 [ F1_2 | F8 | F32 | FC32 ] uint8_t TAiTG_trigger_source:2; // ONSF/TRGS: TAiTG [ TAiIN | TB2 | TA_PREV | TA_NEXT ]. Active if trigger = TAiTG } sta_one_shot; // "trigger" enum { M16C_TMRA_OS_T_TAiOS = 0x00, M16C_TMRA_OS_T_TAiTG = 0x01 }; /* TimerB Counter mode. */ typedef struct { uint8_t count_polarity:2; // TBiMR: MR0, MR1 [ EXT_FALLING_EDGE | EXT_RISING_EDGE | EXT_BOTH ] . Effective if event_source = TBiIN. uint8_t event_source:1; // TBiMR: TCK1 [ TBiIN | TBj ] . j = i-1, except j = 2 if i = 0 and j = 5 if i = 3. } stb_counter; // "counter_polarity" enum { M16C_TMRB_CTR_CP_EXT_FALLING_EDGE = 0x0, M16C_TMRB_CTR_CP_EXT_RISING_EDGE = 0x1, M16C_TMRB_CTR_CP_EXT_BOTH = 0x2, }; // "event_source" enum { M16C_TMRB_CTR_ES_TBiIN = 0x0, M16C_TMRB_CTR_ES_TBj = 0x1 }; /* Common settings */ // TimerA One Shot "TAiTG_trigger_source" , TimerA Counter "event_source" enum { M16C_TMRA_TES_TAiIN = 0x0, M16C_TMRA_TES_TB2 = 0x1, M16C_TMRA_TES_TA_PREV = 0x2, M16C_TMRA_TES_TA_NEXT = 0x3 }; // TimerA/B, TimerA One Shot : "count_src" enum { M16C_TMR_CS_F1_2 = 0x0, M16C_TMR_CS_F8 = 0x1, M16C_TMR_CS_F32 = 0x2, M16C_TMR_CS_FC32 = 0x3 }; #endif // __M16C60TMR_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/M16c60TimerAInitC.nc000077500000000000000000000070251207233610700231660ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Initialize an M16c/60 TimerA to a particular mode. Expected to be * used at boot time. * @param mode The desired mode of the timer. * @param count_src Count source if applicable. * * @author Henrik Makitaavola */ #include "M16c60Timer.h" generic module M16c60TimerAInitC(uint8_t mode, uint8_t count_src, uint16_t reload, bool enable_interrupt, bool start, bool allow_stop_mode) { provides interface Init @atleastonce(); uses interface HplM16c60TimerACtrl as TimerCtrl; uses interface HplM16c60Timer as Timer; } implementation { command error_t Init.init() { st_timer timer = {0}; sta_counter counter = {0}; sta_one_shot one_shot = {0}; atomic { call Timer.allowStopMode(allow_stop_mode); if (mode == TMR_TIMER_MODE) { timer.gate_func = M16C_TMR_TMR_GF_NO_GATE; timer.count_src = count_src; call TimerCtrl.setTimerMode(timer); call Timer.set(reload); } else if (mode == TMR_COUNTER_MODE) { // 'tmp' only used for avoiding "large integer // implicitly truncated to unsigned type" warning counter.event_source = count_src; call TimerCtrl.setCounterMode(counter); call Timer.set(reload); } else if (mode == TMR_ONE_SHOT_MODE) { one_shot.trigger = M16C_TMRA_OS_T_TAiOS; one_shot.count_src = count_src; call TimerCtrl.setOneShotMode(one_shot); } if (enable_interrupt) { call Timer.enableInterrupt(); } if (start) { call Timer.on(); } } return SUCCESS; } async event void Timer.fired() {} } tinyos-2.1.2+dfsg/tos/chips/m16c60/timer/M16c60TimerBInitC.nc000077500000000000000000000066031207233610700231700ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Initialize an M16c/60 TimerB to a particular mode. Expected to be * used at boot time. * @param mode The desired mode of the timer. * @param count_src Count source if applicable. * * @author Henrik Makitaavola */ generic module M16c60TimerBInitC(uint8_t mode, uint8_t count_src, uint16_t reload, bool enable_interrupt, bool start, bool allow_stop_mode) { provides interface Init @atleastonce(); uses interface HplM16c60TimerBCtrl as TimerCtrl; uses interface HplM16c60Timer as Timer; } implementation { command error_t Init.init() { uint8_t tmp; error_t ret = SUCCESS; st_timer timer = {0}; stb_counter counter = {0}; atomic { call Timer.allowStopMode(allow_stop_mode); if (mode == TMR_TIMER_MODE) { timer.gate_func = M16C_TMR_TMR_GF_NO_GATE; timer.count_src = count_src; call TimerCtrl.setTimerMode(timer); call Timer.set(reload); } else if (mode == TMR_COUNTER_MODE) { // 'tmp' only used for avoiding "large integer // implicitly truncated to unsigned type" warning tmp = count_src & 1; counter.event_source = tmp; call TimerCtrl.setCounterMode(counter); call Timer.set(reload); } else { ret = FAIL; } if (enable_interrupt) { call Timer.enableInterrupt(); } if (start) { call Timer.on(); } } return ret; } async event void Timer.fired() {} } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/000077500000000000000000000000001207233610700175635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/HplM16c60Uart.nc000077500000000000000000000114201207233610700222620ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HPL interface for a M16c/60 uart. * * @author Henrik Makitaavola * @author Alec Woo * @author Jonathan Hui */ #include "M16c60Uart.h" interface HplM16c60Uart { async command void setMode(m16c60_uart_mode mode); async command void setSpeed(uint8_t speed); async command uint8_t getSpeed(); async command void setCountSource(m16c60_uart_count_source source); async command void setParity(uart_parity_t parity); async command uart_parity_t getParity(); async command void setStopBits(uart_stop_bits_t stop_bits); async command uart_stop_bits_t getStopBits(); async command void enableCTSRTS(); async command void disableCTSRTS(); async command void enableTx(); async command void disableTx(); async command bool isTxEnabled(); async command void enableRx(); async command void disableRx(); async command bool isRxEnabled(); async command void enableTxInterrupt(); async command void disableTxInterrupt(); async command void enableRxInterrupt(); async command void disableRxInterrupt(); async command void tx( uint8_t data ); async command bool isTxEmpty(); async event void txDone(); async command uint8_t rx(); async command bool isRxEmpty(); async event void rxDone(); async command void i2cStart(); async command void i2cStop(); async command void i2cTx(uint8_t byte); async command bool i2cWaitTx(); async command void i2cStartRx(bool nack); async command uint8_t i2cWaitRx(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/HplM16c60UartC.nc000077500000000000000000000150251207233610700223720ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Martin Turon * @author David Gay */ /** * The M16c/60 uart ports. * * @author Henrik Makitaavola */ configuration HplM16c60UartC { provides { interface HplM16c60Uart as HplUart0; interface HplM16c60Uart as HplUart1; interface HplM16c60Uart as HplUart2; } } implementation { components HplM16c60GeneralIOC as IOs, HplM16c60UartInterruptP as Irqs, new HplM16c60UartP(0, (uint16_t)&U0TB.WORD, (uint16_t)&U0RB.BYTE.U0RBL, (uint16_t)&U0BRG, (uint16_t)&U0MR.BYTE, (uint16_t)&U0SMR.BYTE, (uint16_t)&U0SMR2.BYTE, (uint16_t)&U0SMR3.BYTE, (uint16_t)&U0SMR4.BYTE, (uint16_t)&U0C0.BYTE, (uint16_t)&U0C1.BYTE, (uint16_t)&S0TIC.BYTE, (uint16_t)&S0RIC.BYTE, (uint16_t)&U0BCNIC.BYTE) as HplUart0P, new HplM16c60UartP(1, (uint16_t)&U1TB.WORD, (uint16_t)&U1RB.BYTE.U1RBL, (uint16_t)&U1BRG, (uint16_t)&U1MR.BYTE, (uint16_t)&U1SMR.BYTE, (uint16_t)&U1SMR2.BYTE, (uint16_t)&U1SMR3.BYTE, (uint16_t)&U1SMR4.BYTE, (uint16_t)&U1C0.BYTE, (uint16_t)&U1C1.BYTE, (uint16_t)&S1TIC.BYTE, (uint16_t)&S1RIC.BYTE, (uint16_t)&U1BCNIC.BYTE) as HplUart1P, new HplM16c60UartP(2, (uint16_t)&U2TB.WORD, (uint16_t)&U2RB.BYTE.U2RBL, (uint16_t)&U2BRG, (uint16_t)&U2MR.BYTE, (uint16_t)&U2SMR.BYTE, (uint16_t)&U2SMR2.BYTE, (uint16_t)&U2SMR3.BYTE, (uint16_t)&U2SMR4.BYTE, (uint16_t)&U2C0.BYTE, (uint16_t)&U2C1.BYTE, (uint16_t)&S2TIC.BYTE, (uint16_t)&S2RIC.BYTE, (uint16_t)&BCNIC.BYTE) as HplUart2P; components new StopModeControlC() as Uart0StopModeControl, new StopModeControlC() as Uart1StopModeControl, new StopModeControlC() as Uart2StopModeControl; HplUart0 = HplUart0P.HplUart; HplUart0P.TxIO -> IOs.PortP63; HplUart0P.RxIO -> IOs.PortP62; HplUart0P.Irq -> Irqs.Uart0; HplUart0P.StopModeControl -> Uart0StopModeControl; HplUart1 = HplUart1P.HplUart; HplUart1P.TxIO -> IOs.PortP67; HplUart1P.RxIO -> IOs.PortP66; HplUart1P.Irq -> Irqs.Uart1; HplUart1P.StopModeControl -> Uart1StopModeControl; HplUart2 = HplUart2P.HplUart; HplUart2P.TxIO -> IOs.PortP70; HplUart2P.RxIO -> IOs.PortP71; HplUart2P.Irq -> Irqs.Uart2; HplUart2P.StopModeControl -> Uart2StopModeControl; #ifdef THREADS components PlatformInterruptC; Irqs.PlatformInterrupt -> PlatformInterruptC; #endif } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/HplM16c60UartInterrupt.nc000077500000000000000000000040251207233610700242020ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface for interrupt signals from a uart. * * @author Henrik Makitaavola */ interface HplM16c60UartInterrupt { /** * Signal when an tx interrupt occurs. */ async event void tx(); /** * Signal when an rx interrupt occurs. */ async event void rx(); } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/HplM16c60UartInterruptP.nc000077500000000000000000000057741207233610700243360ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * All uart interrupt vector handlers. * These are wired in HplM16c60UartC. * * @author Henrik Makitaavola */ module HplM16c60UartInterruptP { provides interface HplM16c60UartInterrupt as Uart0; provides interface HplM16c60UartInterrupt as Uart1; provides interface HplM16c60UartInterrupt as Uart2; #ifdef THREADS uses interface PlatformInterrupt; #define POST_AMBLE() call PlatformInterrupt.postAmble() #else #define POST_AMBLE() #endif } implementation { default async event void Uart0.tx() { } M16C_INTERRUPT_HANDLER(M16C_UART0_NACK) { signal Uart0.tx(); POST_AMBLE(); } default async event void Uart0.rx() { } M16C_INTERRUPT_HANDLER(M16C_UART0_ACK) { signal Uart0.rx(); POST_AMBLE(); } default async event void Uart1.tx() { } M16C_INTERRUPT_HANDLER(M16C_UART1_NACK) { signal Uart1.tx(); POST_AMBLE(); } default async event void Uart1.rx() { } M16C_INTERRUPT_HANDLER(M16C_UART1_ACK) { signal Uart1.rx(); POST_AMBLE(); } default async event void Uart2.tx() { } M16C_INTERRUPT_HANDLER(M16C_UART2_NACK) { signal Uart2.tx(); POST_AMBLE(); } default async event void Uart2.rx() { } M16C_INTERRUPT_HANDLER(M16C_UART2_ACK) { signal Uart2.rx(); POST_AMBLE(); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/HplM16c60UartP.nc000077500000000000000000000317361207233610700224160ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Martin Turon * @author David Gay */ /** * Generic HPL module for a Uart(0-2) port on the M16c/60 MCU. * When used in I2C mode the rx/tx interrupts are generated on * acks and nacks. * * @author Henrik Makitaavola */ #include "M16c60Uart.h" generic module HplM16c60UartP(uint8_t uartNr, uint16_t tx_addr, uint16_t rx_addr, uint16_t brg_addr, uint16_t mode_addr, uint16_t smode_addr, uint16_t smode2_addr, uint16_t smode3_addr, uint16_t smode4_addr, uint16_t ctrl0_addr, uint16_t ctrl1_addr, uint16_t txInterrupt_addr, uint16_t rxInterrupt_addr, uint16_t bcnic_addr) { provides interface HplM16c60Uart as HplUart; uses interface GeneralIO as TxIO; uses interface GeneralIO as RxIO; uses interface HplM16c60UartInterrupt as Irq; uses interface StopModeControl; } implementation { #define txBuf (*TCAST(volatile uint16_t* ONE, tx_addr)) #define rxBuf (*TCAST(volatile uint8_t* ONE, rx_addr)) #define txInterrupt (*TCAST(volatile uint8_t* ONE, txInterrupt_addr)) #define rxInterrupt (*TCAST(volatile uint8_t* ONE, rxInterrupt_addr)) #define bcnic (*TCAST(volatile uint8_t* ONE, bcnic_addr)) #define brg (*TCAST(volatile uint8_t* ONE, brg_addr)) #define mode (*TCAST(volatile uint8_t* ONE, mode_addr)) #define smode (*TCAST(volatile uint8_t* ONE, smode_addr)) #define smode2 (*TCAST(volatile uint8_t* ONE, smode2_addr)) #define smode3 (*TCAST(volatile uint8_t* ONE, smode3_addr)) #define smode4 (*TCAST(volatile uint8_t* ONE, smode4_addr)) #define ctrl0 (*TCAST(volatile uint8_t* ONE, ctrl0_addr)) #define ctrl1 (*TCAST(volatile uint8_t* ONE, ctrl1_addr)) async command void HplUart.setMode(m16c60_uart_mode set_mode) { mode &= ~(0x7); smode = 0; smode2 = 0; smode3 = 0; smode4 = 0; switch(set_mode) { case M16C60_UART_MODE_UART_8BITS: SET_BIT(mode, 0); SET_BIT(mode, 2); break; case M16C60_UART_MODE_SPI0: SET_BIT(smode3, 1); ctrl0 = 0x90; SET_BIT(mode, 0); break; case M16C60_UART_MODE_SPI1: ctrl0 = 0xD0; SET_BIT(mode, 0); break; case M16C60_UART_MODE_SPI2: SET_BIT(smode3, 1); ctrl0 = 0xD0; SET_BIT(mode, 0); break; case M16C60_UART_MODE_SPI3: ctrl0 = 0x90; SET_BIT(mode, 0); break; case M16C60_UART_MODE_I2C: call TxIO.makeInput(); call RxIO.makeInput(); bcnic = 0; txInterrupt = 0; rxInterrupt = 0; call HplUart.disableCTSRTS(); SET_BIT(ctrl0, 5); CLR_BIT(ctrl0, 6); SET_BIT(ctrl0, 7); SET_BIT(smode, 0); SET_BIT(smode2, 1); SET_BIT(smode4, 4); SET_BIT(smode4, 5); SET_BIT(mode, 1); break; case M16C60_UART_MODE_OFF: call StopModeControl.allowStopMode(true); return; break; } call StopModeControl.allowStopMode(false); } async command void HplUart.setSpeed(uint8_t speed) { brg = speed; } async command uint8_t HplUart.getSpeed() { return brg; } async command void HplUart.setCountSource(m16c60_uart_count_source source) { ctrl0 &= (~0x3); ctrl0 |= source; } async command void HplUart.setParity(uart_parity_t parity) { switch (parity) { case TOS_UART_PARITY_NONE: CLR_BIT(mode, 6); break; case TOS_UART_PARITY_EVEN: SET_BIT(mode, 6); SET_BIT(mode, 5); break; case TOS_UART_PARITY_ODD: SET_BIT(mode, 6); CLR_BIT(mode, 5); break; default: break; } } async command uart_parity_t HplUart.getParity() { if (READ_BIT(mode, 6) && READ_BIT(mode, 5)) { return TOS_UART_PARITY_EVEN; } else if (READ_BIT(mode, 6)) { return TOS_UART_PARITY_ODD; } else { return TOS_UART_PARITY_NONE; } } async command void HplUart.setStopBits(uart_stop_bits_t stop_bits) { switch (stop_bits) { case TOS_UART_STOP_BITS_1: CLR_BIT(mode, 4); break; case TOS_UART_STOP_BITS_2: SET_BIT(mode, 4); break; default: break; } } async command uart_stop_bits_t HplUart.getStopBits() { if (READ_BIT(mode, 4)) { return TOS_UART_STOP_BITS_2; } else { return TOS_UART_STOP_BITS_1; } } async command void HplUart.enableCTSRTS() { CLR_BIT(ctrl0, 4); } async command void HplUart.disableCTSRTS() { SET_BIT(ctrl0, 4); } async command void HplUart.enableTx() { call TxIO.makeOutput(); SET_BIT(ctrl1, 0); } async command void HplUart.disableTx() { while (!READ_BIT(ctrl0, 3)); // If transmitting, wait for it to finish call TxIO.makeInput(); CLR_BIT(ctrl1, 0); } async command bool HplUart.isTxEnabled() { return READ_BIT(ctrl1, 0); } async command void HplUart.enableRx() { call RxIO.makeInput(); SET_BIT(ctrl1, 2); } async command void HplUart.disableRx() { CLR_BIT(ctrl1, 2); } async command bool HplUart.isRxEnabled() { return READ_BIT(ctrl1, 2); } async command void HplUart.enableTxInterrupt() { atomic { clear_interrupt(txInterrupt_addr); SET_BIT(ctrl1, 1); CLR_BIT(UCON.BYTE, uartNr); SET_BIT(txInterrupt, 0); } } async command void HplUart.disableTxInterrupt() { CLR_BIT(txInterrupt, 0); } async command void HplUart.enableRxInterrupt() { atomic { clear_interrupt(rxInterrupt_addr); SET_BIT(rxInterrupt, 0); } } async command void HplUart.disableRxInterrupt() { CLR_BIT(rxInterrupt, 0); } async command bool HplUart.isTxEmpty() { return READ_BIT(ctrl1, 1); } async command bool HplUart.isRxEmpty() { return !READ_BIT(ctrl1, 3); } async command uint8_t HplUart.rx() { return rxBuf; } async command void HplUart.tx(uint8_t data) { txBuf = data; } async event void Irq.rx() { signal HplUart.rxDone(); } async event void Irq.tx() { signal HplUart.txDone(); } // TODO(henrik) Add a event for the BCNIC interrupt. This makes it // possible to generate start and stops async. async command void HplUart.i2cStart() { smode4 = 0x09; // Generate start. while (!READ_BIT(bcnic, 3)); clear_interrupt(bcnic_addr); smode3 = 0x02; // Drive SCL low between byte transfers. smode4 = 0x00; // Enable output on SDA pin. } async command void HplUart.i2cStop() { smode4 = 0x0C; // Generate stop. while (!READ_BIT(bcnic, 3)); clear_interrupt(bcnic_addr); smode3 = 0x00; // Let SCL float while bus is idle. smode4 = 0x30; // Let SDA float while bus is idle. } void clearInterrupts() { clear_interrupt(txInterrupt_addr); clear_interrupt(rxInterrupt_addr); } async command void HplUart.i2cTx(uint8_t byte) { clearInterrupts(); U2TB.WORD = 0x0100 | (uint16_t)byte; // Bit 8 must be high for the slave // to be able to ack. } async command bool HplUart.i2cWaitTx() { while(!READ_BIT(rxInterrupt, 3) && !READ_BIT(txInterrupt, 3)); if (READ_BIT(rxInterrupt, 3)) { clearInterrupts(); return true; } else { clearInterrupts(); return false; } } async command void HplUart.i2cStartRx(bool nack) { if (nack) { txBuf = 0x01FF; } else { txBuf = 0x00FF; } } async command uint8_t HplUart.i2cWaitRx() { while(!READ_BIT(rxInterrupt, 3) && !READ_BIT(txInterrupt, 3)); clearInterrupts(); return rxBuf; } default async event void HplUart.txDone() {} default async event void HplUart.rxDone() {} } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/M16c60I2CC.nc000066400000000000000000000047531207233610700213730ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring for the I2CPacket interfaces for M16C/60. * * @author Henrik Makitaavola */ #include "I2C.h" configuration M16c60I2CC { provides { interface I2CPacket as I2CPacket0; interface AsyncStdControl as I2CPacket0Control; interface I2CPacket as I2CPacket1; interface AsyncStdControl as I2CPacket1Control; interface I2CPacket as I2CPacket2; interface AsyncStdControl as I2CPacket2Control; } } implementation { components new M16c60I2CP() as I2C0, new M16c60I2CP() as I2C1, new M16c60I2CP() as I2C2, HplM16c60UartC as Uart; I2C0.HplUart -> Uart.HplUart0; I2CPacket0 = I2C0; I2CPacket0Control = I2C0; I2C1.HplUart -> Uart.HplUart1; I2CPacket1 = I2C1; I2CPacket1Control = I2C1; I2C2.HplUart -> Uart.HplUart2; I2CPacket2 = I2C2; I2CPacket2Control = I2C2; } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/M16c60I2CP.nc000066400000000000000000000143041207233610700214010ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * I2CPacket interface implementation for a M16c/60 Uart. * * @author Henrik Makitaavola */ #include "I2C.h" generic module M16c60I2CP() { provides interface I2CPacket; provides interface AsyncStdControl; uses interface HplM16c60Uart as HplUart; } implementation { enum { S_OFF, S_IDLE, S_READ_SEND_ADDR, S_READ, S_WRITE, }; norace uint8_t m_state = S_OFF; norace uint8_t* m_data; norace uint8_t m_length; norace uint8_t m_data_pos; norace uint16_t m_addr; norace error_t m_error; norace i2c_flags_t m_flags; void receiveNext(); void writeNext(); void setIdleState() { atomic m_state = S_IDLE; call HplUart.disableTxInterrupt(); call HplUart.disableRxInterrupt(); } async command error_t AsyncStdControl.start() { if (m_state != S_OFF) { return EALREADY; } call HplUart.setMode(M16C60_UART_MODE_I2C); // TODO(henrik) Dont hardcode the speed here. call HplUart.setSpeed((unsigned char)((((float)MAIN_CRYSTAL_SPEED*1000000.0) / (2.0 * (100000.0))) - 0.5)); call HplUart.enableTx(); call HplUart.enableRx(); m_state = S_IDLE; return SUCCESS; } async command error_t AsyncStdControl.stop() { if (m_state == S_OFF) { return EALREADY; } else if (m_state != S_IDLE) { return EBUSY; } call HplUart.setMode(M16C60_UART_MODE_OFF); m_state = S_OFF; return SUCCESS; } async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { if (m_state == S_OFF) { return EOFF; } else if (m_state != S_IDLE) { return EBUSY; } atomic { m_state = S_READ; m_addr = addr; m_flags = flags; m_length = length; m_data = data; m_data_pos = 0; } if (m_flags & I2C_START) { atomic m_state = S_READ_SEND_ADDR; call HplUart.i2cStart(); call HplUart.enableRxInterrupt(); call HplUart.enableTxInterrupt(); call HplUart.i2cTx((addr<<1)+1); } else { call HplUart.enableRxInterrupt(); call HplUart.enableTxInterrupt(); receiveNext(); } return SUCCESS; } void receiveNext() { bool nack = false; if (m_data_pos == m_length) { // Reception is done if (m_flags & I2C_STOP) { call HplUart.i2cStop(); } setIdleState(); signal I2CPacket.readDone(SUCCESS, m_addr, m_data_pos, m_data); return; } else if (m_data_pos == m_length - 1 && !(m_flags & I2C_ACK_END)) { nack = true; } call HplUart.i2cStartRx(nack); } async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { if (m_state == S_OFF) { return EOFF; } else if (m_state != S_IDLE) { return EBUSY; } atomic { m_state = S_WRITE; m_addr = addr; m_flags = flags; m_length = length; m_data = data; m_data_pos = 0; } call HplUart.enableRxInterrupt(); call HplUart.enableTxInterrupt(); if (m_flags & I2C_START) { call HplUart.i2cStart(); call HplUart.i2cTx(addr << 1); } else { writeNext(); } return SUCCESS; } void writeNext() { if (m_data_pos == m_length) { // Sending is done if (m_flags & I2C_STOP) { call HplUart.i2cStop(); } setIdleState(); signal I2CPacket.writeDone(SUCCESS, m_addr, m_data_pos, m_data); } else { atomic call HplUart.i2cTx(m_data[m_data_pos++]); } } void interrupt(bool ack) { switch(m_state) { case S_READ_SEND_ADDR: if (!ack) { setIdleState(); signal I2CPacket.readDone(ENOACK, m_addr, 0, m_data); } else { atomic m_state = S_READ; receiveNext(); } break; case S_READ: m_data[m_data_pos++] = call HplUart.rx(); receiveNext(); break; case S_WRITE: if (!ack) { setIdleState(); signal I2CPacket.writeDone(ENOACK, m_addr, 0, m_data); } else { writeNext(); } break; } } async event void HplUart.txDone() { interrupt(false); } async event void HplUart.rxDone() { interrupt(true); } default async event void I2CPacket.writeDone(error_t e, uint16_t addr, uint8_t length, uint8_t* data) {} default async event void I2CPacket.readDone(error_t e, uint16_t addr, uint8_t length, uint8_t* data) {} } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/M16c60SpiC.nc000066400000000000000000000050621207233610700215430ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring for the Spi interfaces for M16C/60. * * @author Henrik Makitaavola */ configuration M16c60SpiC { provides interface SpiPacket as SpiPacket0; provides interface SpiByte as SpiByte0; provides interface FastSpiByte as FastSpiByte0; provides interface SpiPacket as SpiPacket1; provides interface SpiByte as SpiByte1; provides interface FastSpiByte as FastSpiByte1; provides interface SpiPacket as SpiPacket2; provides interface SpiByte as SpiByte2; provides interface FastSpiByte as FastSpiByte2; } implementation { components HplM16c60UartC as Uarts, new M16c60SpiP() as Spi0, new M16c60SpiP() as Spi1, new M16c60SpiP() as Spi2; Spi0 -> Uarts.HplUart0; SpiPacket0 = Spi0; SpiByte0 = Spi0; FastSpiByte0 = Spi0; Spi1 -> Uarts.HplUart1; SpiPacket1 = Spi1; SpiByte1 = Spi1; FastSpiByte1 = Spi1; Spi2 -> Uarts.HplUart2; SpiPacket2 = Spi2; SpiByte2 = Spi2; FastSpiByte2 = Spi2; } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/M16c60SpiP.nc000066400000000000000000000101111207233610700215470ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Spi interface implementations for a M16c/60 Uart. * * @author Henrik Makitaavola */ generic module M16c60SpiP() { provides { interface SpiPacket; interface SpiByte; interface FastSpiByte; } uses interface HplM16c60Uart as HplUart; } implementation { enum { S_IDLE, S_PACKET, }; uint8_t m_state = S_IDLE; uint8_t* m_tx_buf; int8_t* m_rx_buf; uint8_t m_length; uint8_t m_pos; async command error_t SpiPacket.send(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len ) { atomic { if (m_state != S_IDLE) { return EBUSY; } m_state = S_PACKET; } if (len == 0) { return EINVAL; } atomic { m_rx_buf = rxBuf; m_tx_buf = txBuf; m_length = len; m_pos = 0; } call HplUart.enableRxInterrupt(); atomic call HplUart.tx(m_tx_buf[m_pos]); return SUCCESS; } async event void HplUart.rxDone() { atomic { if (m_state != S_PACKET) { return; } m_rx_buf[m_pos++] = call HplUart.rx(); if (m_pos == m_length) { // Done sending and receiving. call HplUart.disableRxInterrupt(); m_state = S_IDLE; signal SpiPacket.sendDone(m_tx_buf, m_rx_buf, m_length, SUCCESS); } else { call HplUart.tx(m_tx_buf[m_pos]); } } } async event void HplUart.txDone() {} default async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error ) {} async command uint8_t SpiByte.write( uint8_t tx ) { uint8_t tmp = call HplUart.rx(); // Empty rx buf call HplUart.tx(tx); while(call HplUart.isRxEmpty()); return call HplUart.rx(); } async command void FastSpiByte.splitWrite(uint8_t data) { uint8_t tmp = call HplUart.rx(); // Empty rx buf call HplUart.tx(data); } async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) { uint8_t tmp; while(call HplUart.isRxEmpty()); tmp = call HplUart.rx(); call HplUart.tx(data); return tmp; } async command uint8_t FastSpiByte.splitRead() { while(call HplUart.isRxEmpty()); return call HplUart.rx(); } async command uint8_t FastSpiByte.write(uint8_t data) { return call SpiByte.write(data); } } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/M16c60Uart.h000066400000000000000000000053331207233610700214500ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * M16c60 UART typedefs. * * @author Henrik Makitaavola */ #ifndef __M16C60_UART_H__ #define __M16C60_UART_H__ typedef enum { M16C60_UART_MODE_OFF, M16C60_UART_MODE_UART_8BITS, M16C60_UART_MODE_SPI0, M16C60_UART_MODE_SPI1, M16C60_UART_MODE_SPI2, M16C60_UART_MODE_SPI3, M16C60_UART_MODE_I2C, } m16c60_uart_mode; typedef enum { M16C60_UART_COUNT_SOURCE_F1_2 = 0x0, M16C60_UART_COUNT_SOURCE_F8 = 0x1, M16C60_UART_COUNT_SOURCE_F32 = 0x2, } m16c60_uart_count_source; typedef enum { TOS_UART_300, TOS_UART_600, TOS_UART_1200, TOS_UART_2400, TOS_UART_4800, TOS_UART_9600, TOS_UART_19200, TOS_UART_38400, TOS_UART_57600, } uart_speed_t; typedef enum { TOS_UART_OFF, TOS_UART_RONLY, TOS_UART_TONLY, TOS_UART_DUPLEX } uart_duplex_t; typedef enum { TOS_UART_PARITY_NONE, TOS_UART_PARITY_EVEN, TOS_UART_PARITY_ODD } uart_parity_t; typedef enum { TOS_UART_STOP_BITS_1, TOS_UART_STOP_BITS_2 } uart_stop_bits_t; #endif // __M16C60_UART_H__ tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/M16c60UartC.nc000077500000000000000000000110751207233610700217270ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui */ /** * HAL of the M16c/60 uarts. * * @author Henrik Makitaavola */ configuration M16c60UartC { provides interface UartByte as Uart0Byte; provides interface UartStream as Uart0Stream; provides interface UartControl as Uart0Control; provides interface UartByte as Uart1Byte; provides interface UartStream as Uart1Stream; provides interface UartControl as Uart1Control; provides interface UartByte as Uart2Byte; provides interface UartStream as Uart2Stream; provides interface UartControl as Uart2Control; } implementation { components HplM16c60UartC as HplUartC, M16c60UartCounterPlatformC as Counter; components new M16c60UartP() as Uart0P; Uart0Byte = Uart0P; Uart0Stream = Uart0P; Uart0Control = Uart0P; Uart0P.Counter -> Counter; Uart0P.HplUart -> HplUartC.HplUart0; components new M16c60UartP() as Uart1P; Uart1Byte = Uart1P; Uart1Stream = Uart1P; Uart1Control = Uart1P; Uart1P.Counter -> Counter; Uart1P.HplUart -> HplUartC.HplUart1; components new M16c60UartP() as Uart2P; Uart2Byte = Uart2P; Uart2Stream = Uart2P; Uart2Control = Uart2P; Uart2P.Counter -> Counter; Uart2P.HplUart -> HplUartC.HplUart2; } tinyos-2.1.2+dfsg/tos/chips/m16c60/uart/M16c60UartP.nc000077500000000000000000000276521207233610700217540ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * Generic HAL uart for M16c/60. * * @author Henrik Makitaavola * @author Alec Woo * @author Jonathan Hui * @author Philip Levis */ #include #include "M16c60Uart.h" generic module M16c60UartP() { provides interface UartByte; provides interface UartStream; provides interface UartControl; uses interface HplM16c60Uart as HplUart; uses interface Counter; } implementation { #define SPEED_F1_2(baud) (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (16.0 * (float)baud))+ 0.5) - 1.0) #define SPEED_F8(baud) (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (128.0 * (float)baud))+ 0.5) - 1.0) norace uint16_t m_tx_len, m_rx_len; norace uint8_t *m_tx_buf, *m_rx_buf; norace uint16_t m_tx_pos, m_rx_pos; norace uint16_t m_byte_time; norace uint8_t m_rx_intr; norace uint8_t m_tx_intr; norace uart_duplex_t mode = TOS_UART_OFF; norace uart_speed_t speed; async command error_t UartStream.enableReceiveInterrupt() { if (mode == TOS_UART_TONLY || mode == TOS_UART_OFF) { return FAIL; } atomic { m_rx_intr = 3; call HplUart.enableRxInterrupt(); } return SUCCESS; } async command error_t UartStream.disableReceiveInterrupt() { if (mode == TOS_UART_TONLY || mode == TOS_UART_OFF) { return FAIL; } atomic { call HplUart.disableRxInterrupt(); m_rx_intr = 0; } return SUCCESS; } async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) { if (mode == TOS_UART_TONLY || mode == TOS_UART_OFF) { return FAIL; } if ( len == 0 ) { return FAIL; } atomic { if ( m_rx_buf ) { return EBUSY; } m_rx_buf = buf; m_rx_len = len; m_rx_pos = 0; m_rx_intr |= 1; call HplUart.enableRxInterrupt(); } return SUCCESS; } async event void HplUart.rxDone() { if ( m_rx_buf ) { m_rx_buf[ m_rx_pos++ ] = call HplUart.rx(); if ( m_rx_pos >= m_rx_len ) { uint8_t* buf = m_rx_buf; atomic { m_rx_buf = NULL; if(m_rx_intr != 3) { call HplUart.disableRxInterrupt(); m_rx_intr = 0; } } signal UartStream.receiveDone( buf, m_rx_len, SUCCESS ); } } else { signal UartStream.receivedByte( call HplUart.rx() ); } } async command error_t UartStream.send( uint8_t *buf, uint16_t len) { if (mode == TOS_UART_RONLY || mode == TOS_UART_OFF) { return FAIL; } if ( len == 0 ) return FAIL; else if ( m_tx_buf ) return EBUSY; m_tx_len = len; m_tx_buf = buf; m_tx_pos = 0; m_tx_intr = 1; call HplUart.enableTxInterrupt(); call HplUart.tx( buf[ m_tx_pos++ ] ); return SUCCESS; } async event void HplUart.txDone() { if (!m_tx_intr) { return; } if ( m_tx_pos < m_tx_len ) { call HplUart.tx( m_tx_buf[ m_tx_pos++ ] ); } else { uint8_t* buf = m_tx_buf; m_tx_buf = NULL; m_tx_intr = 0; call HplUart.disableTxInterrupt(); signal UartStream.sendDone( buf, m_tx_len, SUCCESS ); } } async command error_t UartByte.send( uint8_t byte ) { if (mode == TOS_UART_RONLY || mode == TOS_UART_OFF) { return FAIL; } if(m_tx_intr) return FAIL; call HplUart.tx( byte ); while ( !call HplUart.isTxEmpty() ); return SUCCESS; } async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout) { uint32_t timeout_micro32 = m_byte_time * timeout + 1; uint16_t timeout_micro; uint16_t start; if (mode == TOS_UART_TONLY || mode == TOS_UART_OFF) { return FAIL; } if(m_rx_intr) { return FAIL; } // The timeout clock is 16 bits and counts in TMicro. So a check to test that // the total timeout value is smaller than 0xffff - is needed. // TODO(henrik) Resolve this by lovering the clock speed used by the uart module // or make it 32 bits. if(timeout_micro32 > 0xFFF0) { timeout_micro = 0xFFF0; } else { timeout_micro = (uint16_t) timeout_micro32; } start = call Counter.get(); while ( call HplUart.isRxEmpty() ) { if ( ( (uint16_t)call Counter.get() - start ) >= timeout_micro ) return FAIL; } *byte = call HplUart.rx(); return SUCCESS; } async command error_t UartControl.setSpeed(uart_speed_t s) { if (mode != TOS_UART_OFF) { return FAIL; } speed = s; switch (speed) { // 138us/byte @ 57600 case TOS_UART_300: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F8); call HplUart.setSpeed(SPEED_F8(300)); m_byte_time = 138 * 192; break; case TOS_UART_600: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F8); call HplUart.setSpeed(SPEED_F8(600)); m_byte_time = 138 * 96; break; case TOS_UART_1200: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F8); call HplUart.setSpeed(SPEED_F8(1200)); m_byte_time = 138 * 48; break; case TOS_UART_2400: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F8); call HplUart.setSpeed(SPEED_F8(2400)); m_byte_time = 138 * 24; break; case TOS_UART_4800: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F8); call HplUart.setSpeed(SPEED_F8(4800)); m_byte_time = 138 * 12; break; case TOS_UART_9600: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F1_2); call HplUart.setSpeed(SPEED_F1_2(9600)); m_byte_time = 138 * 6; break; case TOS_UART_19200: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F1_2); call HplUart.setSpeed(SPEED_F1_2(19200)); m_byte_time = 138 * 3; break; case TOS_UART_38400: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F1_2); call HplUart.setSpeed(SPEED_F1_2(38400u)); m_byte_time = 138 * 1.5; break; case TOS_UART_57600: call HplUart.setCountSource(M16C60_UART_COUNT_SOURCE_F1_2); call HplUart.setSpeed(SPEED_F1_2(57600u)); m_byte_time = 138; break; default: m_byte_time = 0xFFFF; // Set maximum value as default. break; } return SUCCESS; } async command uart_speed_t UartControl.speed() { return speed; } void uartOn() { call HplUart.setMode(M16C60_UART_MODE_UART_8BITS); call HplUart.disableCTSRTS(); } async command error_t UartControl.setDuplexMode(uart_duplex_t duplex) { // Turn everything off call HplUart.disableTxInterrupt(); call HplUart.disableTx(); call HplUart.disableRxInterrupt(); call HplUart.disableRx(); m_rx_intr = 0; m_tx_intr = 0; mode = duplex; switch (duplex) { case TOS_UART_OFF: call HplUart.setMode(M16C60_UART_MODE_OFF); break; case TOS_UART_RONLY: uartOn(); call HplUart.enableRx(); break; case TOS_UART_TONLY: uartOn(); call HplUart.enableTx(); break; case TOS_UART_DUPLEX: uartOn(); call HplUart.enableTx(); call HplUart.enableRx(); break; default: break; } return SUCCESS; } async command uart_duplex_t UartControl.duplexMode() { atomic return mode; } async command error_t UartControl.setParity(uart_parity_t parity) { if (mode != TOS_UART_OFF) { return FAIL; } call HplUart.setParity(parity); return SUCCESS; } async command uart_parity_t UartControl.parity() { return call HplUart.getParity(); } async command error_t UartControl.setStop() { if (mode != TOS_UART_OFF) { return FAIL; } call HplUart.setStopBits(TOS_UART_STOP_BITS_2); return SUCCESS; } async command error_t UartControl.setNoStop() { if (mode != TOS_UART_OFF) { return FAIL; } call HplUart.setStopBits(TOS_UART_STOP_BITS_1); return SUCCESS; } async command bool UartControl.stopBits() { return (call HplUart.getStopBits() == TOS_UART_STOP_BITS_2); } async event void Counter.overflow() {} default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ){} default async event void UartStream.receivedByte( uint8_t byte ){} default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ){} } tinyos-2.1.2+dfsg/tos/chips/max116xx/000077500000000000000000000000001207233610700172715ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/max116xx/HalMAX116xxReaderP.nc000066400000000000000000000111141207233610700227360ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of a Read interface for the HplMAX116xx chips A/D channels. * The read setup and configuration settings must be initialized via * SetSetup and SetConfiguration before a call to Read.read() should be made. * Note that only SCAN[1:0] = 01 and SCAN[1:0] = 11 makes sense. * Channel select bits will be overwritten by the Read interface. * This module works good to be used with ArbitratedReadC. * * @param T The type that is needed to store a A/D value. * ex: uint8_t for MAX11600-MAX11605 and * uint16_t for MAX11612-MAX11617. * @param p_num_channels Number of A/D channels available on the device. * @author Henrik Makitaavola */ #include "HplMAX116xx.h" generic module HalMAX116xxReaderP(typedef T, uint8_t p_num_channels) { provides interface Read[uint8_t ain_id]; provides interface Set as SetSetup; provides interface Set as SetConfiguration; uses interface HplMAX116xx; } implementation { enum { S_IDLE, S_READ, S_READ_DONE }; uint8_t m_state = S_IDLE; T m_value; error_t m_error; uint8_t m_read_adc_channel; max116xx_setup_t m_read_setup; max116xx_configuration_t m_read_configuration; command void SetSetup.set(max116xx_setup_t setup) { m_read_setup = setup; m_read_setup.reg = 1; } command void SetConfiguration.set(max116xx_configuration_t conf) { m_read_configuration = conf; m_read_configuration.reg = 0; } task void signalTask() { m_state = S_IDLE; signal Read.readDone[m_read_adc_channel](m_error, m_value); } command error_t Read.read[uint8_t ain_id]() { if (m_state != S_IDLE) { return EBUSY; } if (ain_id > (p_num_channels - 1)) { return EINVAL; } m_read_configuration.cs = ain_id; m_read_adc_channel = ain_id; if (call HplMAX116xx.setSetupAndConfiguration(m_read_setup, m_read_configuration) == SUCCESS) { m_state = S_READ; return SUCCESS; } else { return FAIL; } } event void HplMAX116xx.setDone(error_t) { if (m_state != S_READ && m_state != S_READ_DONE) { return; } if (m_state == S_READ) { if (call HplMAX116xx.measureChannels(1, &m_value) != SUCCESS) { m_error = FAIL; post signalTask(); } } else if (m_state == S_READ_DONE) { post signalTask(); } } event void HplMAX116xx.measureChannelsDone(error_t e, uint8_t numChannels, T *buf) { if (m_state != S_READ) { return; } m_state = S_READ_DONE; m_error = e; if (m_error != SUCCESS) { post signalTask(); } else { max116xx_setup_t setup; setup.rst = 0; setup.bip_uni = 0; setup.clk = 0; setup.sel = 0; if (call HplMAX116xx.setSetup(setup) != SUCCESS) { m_error = FAIL; post signalTask(); } } } default event void Read.readDone[uint8_t id](error_t e, T val) {} } tinyos-2.1.2+dfsg/tos/chips/max116xx/HplMAX116xx.h000066400000000000000000000042771207233610700213550ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Henrik Makitaavola */ #ifndef __HPLMAX116XX_H__ #define __HPLMAX116XX_H__ // Max116xx setup register members typedef nx_struct max116xx_setup_t { nx_uint8_t reg:1; // Internal driver use only nx_uint8_t sel:3; nx_uint8_t clk:1; nx_uint8_t bip_uni:1; nx_uint8_t rst:1; nx_uint8_t dont_care:1; // Dont care bit } max116xx_setup_t; // Max116xx configuration register members typedef nx_struct max116xx_configuration_t { nx_uint8_t reg:1; // Internal driver use only nx_uint8_t scan:2; nx_uint8_t cs:4; nx_uint8_t sgl_dif:1; } max116xx_configuration_t; #endif // __HPLMAX116XX_H__ tinyos-2.1.2+dfsg/tos/chips/max116xx/HplMAX116xx.nc000066400000000000000000000075711207233610700215260ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface for the Maxim MAX116xx A/D converter chips. * * @param T The type that is needed to store a A/D value. * uint8_t for MAX11600-MAX11605 and uint16_t for * other versions. * @author Henrik Makitaavola */ #include "HplMAX116xx.h" interface HplMAX116xx { /** * Sets the setup register. * * @param setup Register settings. * @return SUCCESS if the regiser will be set. A SUCCESS will * always be followed by a setDone event. */ command error_t setSetup(max116xx_setup_t setup); /** * Sets the configuration register. * * @param conf Register settings. * @param setup Register settings. * @return SUCCESS if the regiser will be set. A SUCCESS will * always be followed by a setDone event. */ command error_t setConfiguration(max116xx_configuration_t conf); /** * Sets both the setup and configuration registers. * * @param setup The setup register settings. * @param conf The configuration register settings. * @return SUCCESS if the regisers will be set. A SUCCESS will * always be followed by a setDone event. */ command error_t setSetupAndConfiguration(max116xx_setup_t setup, max116xx_configuration_t conf); /** * Measuress one or more A/D channels. The parameter values to this command * varies depending on the settings in the setup and configuration * registers. * * @param numChannels The number of A/D channels that should be read. * @param buf Memory where the values should be stored. This must * be big enough to fit all values. * @return SUCCESS if the A/D values will be read. A SUCCESS will * always be followed by a readAdcsDone event. */ command error_t measureChannels(uint8_t numChannels, T* buf); /** * Event signalled after a set of the setup and/or configuration register. * * @param e SUCCESS if the set of the register was successfull. */ event void setDone(error_t e); /** * Event signalled after a reading of one or more A/D channels. * * @param e SUCCESS will the reading was successfull. * @param numChannels Number of A/D channels read. * @param buf memory where the A/D values are stored. */ event void measureChannelsDone(error_t e, uint8_t numChannels, T* buf); } tinyos-2.1.2+dfsg/tos/chips/max116xx/HplMAX116xxP.nc000066400000000000000000000136411207233610700216410ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Generic implementation of the HplMAX116xx interface. * * @param T The type that is needed to store a A/D value. * ex: uint8_t for MAX11600-MAX11605 and * uint16_t for MAX11612-MAX11617. * @param p_addr I2C address of the device. * @param p_num_channels Number of A/D channels available on the device. * @param p_bit_mask Bit mask for the significant bits. * Ex: 0xFF for a 8 bit A/D device and * 0xFFF for a 12 bit A/D device. * @author Henrik Makitaavola */ #include "HplMAX116xx.h" generic module HplMAX116xxP(typedef T, uint8_t p_addr, uint8_t p_num_channels, uint32_t p_bit_mask) // p_bit_mask is 32 bits for future compatibility { provides interface HplMAX116xx; uses { interface Resource as I2CResource; interface I2CPacket as I2C; } } implementation { enum { S_IDLE, S_SET, S_ADC, }; norace error_t m_error; norace uint8_t m_state = S_IDLE; norace uint8_t m_write_buffer[2]; norace uint8_t m_write_length; norace T* m_read_buffer; norace uint8_t m_read_length; void doI2CTask(); bool isIdle() { return m_state == S_IDLE ? true : false; } error_t requestI2C(uint8_t newState) { if (call I2CResource.request() == SUCCESS) { m_state = newState; return SUCCESS; } else { return FAIL; } } task void signalTask() { uint8_t state = m_state; call I2CResource.release(); m_state = S_IDLE; switch(state) { case S_SET: signal HplMAX116xx.setDone(m_error); break; case S_ADC: signal HplMAX116xx.measureChannelsDone(m_error, m_read_length / sizeof(T), m_read_buffer); break; } } error_t set(max116xx_setup_t *setup, max116xx_configuration_t *conf, uint8_t nextState) { m_write_length = 0; if (setup != 0) { m_write_buffer[m_write_length++] = *((uint8_t*)setup); } if (conf != 0) { m_write_buffer[m_write_length++] = *((uint8_t*)conf); } return requestI2C(nextState); } command error_t HplMAX116xx.setSetup(max116xx_setup_t setup) { if (!isIdle()) { return EBUSY; } setup.reg = 1; return set(&setup, 0, S_SET); } command error_t HplMAX116xx.setConfiguration(max116xx_configuration_t conf) { if (!isIdle()) { return EBUSY; } conf.reg = 0; return set(0, &conf, S_SET); } command error_t HplMAX116xx.setSetupAndConfiguration(max116xx_setup_t setup, max116xx_configuration_t conf) { if (!isIdle()) { return EBUSY; } setup.reg = 1; conf.reg = 0; return set(&setup, &conf, S_SET); } command error_t HplMAX116xx.measureChannels(uint8_t numChannels, T *buf) { if (!isIdle()) { return EBUSY; } m_read_length = numChannels*sizeof(T); m_read_buffer = buf; return requestI2C(S_ADC); } async event void I2C.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { m_error = error; post signalTask(); } async event void I2C.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { m_error = error; if (error == SUCCESS) { uint8_t i,j; uint32_t tmp; for (i = 0; i < length/sizeof(T); ++i) { tmp = 0; for (j = 0; j < sizeof(T); ++j) { tmp |= ( (uint32_t)data[i*sizeof(T)+j] << (8 * (sizeof(T)-j-1)) ); } tmp &= p_bit_mask; // A memcpy is needed because if we try to do a cast we will // get a "conversion to non-scalar type requested" error. // Maybe there is a nicer way to do this? memcpy(&m_read_buffer[i], &tmp, sizeof(T)); } } post signalTask(); } event void I2CResource.granted() { doI2CTask(); } void doI2CTask() { switch (m_state) { case S_SET: call I2C.write(I2C_START | I2C_STOP, p_addr, m_write_length, m_write_buffer); break; case S_ADC: call I2C.read(I2C_START | I2C_STOP, p_addr, m_read_length, (uint8_t*)m_read_buffer); break; } } default event void HplMAX116xx.setDone(error_t) {} default event void HplMAX116xx.measureChannelsDone(error_t e, uint8_t numChannels, T *buf) {} } tinyos-2.1.2+dfsg/tos/chips/max116xx/README.txt000066400000000000000000000003041207233610700207640ustar00rootroot00000000000000HPL and HAL implementation for the Maxim Analog-to-Digital Converters MAX116xx series. NOTE: This implementation has only been tested with a MAX11615 chip but should work with other versions to. tinyos-2.1.2+dfsg/tos/chips/max136x/000077500000000000000000000000001207233610700171035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/max136x/HalMAX136xAdvanced.nc000066400000000000000000000051271207233610700225540ustar00rootroot00000000000000/* $Id: HalMAX136xAdvanced.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Kaisen Lin * @author Phil Buonadonna */ #include "MAX136x.h" interface HalMAX136xAdvanced { command error_t setScanMode(max136x_scanflag_t mode, uint8_t chanlow, uint8_t chanhigh); event void setScanModeDone(error_t error); command error_t setMonitorMode(uint8_t chanlow, uint8_t chanhigh, max136x_delayflag_t delay, uint8_t thresholds[12]); event void setMonitorModeDone(error_t error); command error_t setConversionMode(bool bDifferential, bool bBipolar); event void setConversionModeDone(error_t error); command error_t setClock(bool bExtClk); event void setClockDone(error_t error); command error_t setRef(max136x_selflag_t sel, bool bInRefPwr); event void setRefDone(error_t error); command error_t getStatus(); event void getStatusDone(error_t error, uint8_t status, max136x_data_t data); command error_t enableAlert(bool bEnable); event void enableAlertDone(error_t error); event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/max136x/HalMAX136xControlP.nc000066400000000000000000000200401207233610700225760ustar00rootroot00000000000000/* $Id: HalMAX136xControlP.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Kaisen Lin * @author Phil Buonadonna */ #include "MAX136x.h" module HalMAX136xControlP { provides interface HalMAX136xAdvanced; uses interface Resource; uses interface HplMAX136x; } implementation { enum { S_IDLE, S_SETSCANMODE, S_SETMONMODE, S_SETCONVMODE, S_SETCLK, S_SETREF, S_ENALERT, S_GETSTATUS, }; uint8_t state = S_IDLE; uint8_t mI2CBuffer[8]; uint8_t configByteShadow = 0x01; uint8_t setupByteShadow = 0x83; // 0x82 actually, but we want extended monitor write uint8_t monitorByteShadow = 0x0; error_t clientResult; task void alert_Task() { signal HalMAX136xAdvanced.alertThreshold(); } task void signalDone_Task() { switch(state) { case S_SETSCANMODE: state = S_IDLE; call Resource.release(); signal HalMAX136xAdvanced.setScanModeDone(clientResult); break; case S_SETMONMODE: state = S_IDLE; call Resource.release(); signal HalMAX136xAdvanced.setMonitorModeDone(clientResult); break; case S_SETCONVMODE: state = S_IDLE; call Resource.release(); signal HalMAX136xAdvanced.setConversionModeDone(clientResult); break; case S_SETCLK: state = S_IDLE; call Resource.release(); signal HalMAX136xAdvanced.setClockDone(clientResult); break; case S_SETREF: state = S_IDLE; call Resource.release(); signal HalMAX136xAdvanced.setRefDone(clientResult); break; case S_ENALERT: state = S_IDLE; call Resource.release(); signal HalMAX136xAdvanced.enableAlertDone(clientResult); break; case S_GETSTATUS: state = S_IDLE; call Resource.release(); signal HalMAX136xAdvanced.getStatusDone(clientResult, mI2CBuffer[0], 0); break; default: break; } } command error_t HalMAX136xAdvanced.setScanMode(max136x_scanflag_t mode, uint8_t chanlow, uint8_t chanhigh) { // chanlow is always 0 no matter what client says error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_SETSCANMODE; configByteShadow &= ~(MAX136X_CONFIG_SCAN(0x3) | MAX136X_CONFIG_CS(0xF)); configByteShadow |= MAX136X_CONFIG_SCAN(0x0); configByteShadow |= MAX136X_CONFIG_CS(chanhigh); mI2CBuffer[0] = configByteShadow; call HplMAX136x.setConfig(mI2CBuffer, 1); return SUCCESS; } command error_t HalMAX136xAdvanced.setMonitorMode(uint8_t chanlow, uint8_t chanhigh, max136x_delayflag_t delay, uint8_t thresholds[12]) { // chanlow is always 0 no matter what client says uint8_t i; error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_SETMONMODE; configByteShadow &= ~(MAX136X_CONFIG_SCAN(0x3) | MAX136X_CONFIG_CS(0xF)); configByteShadow |= MAX136X_CONFIG_SCAN(0x2); configByteShadow |= MAX136X_CONFIG_CS(chanhigh); monitorByteShadow &= ~MAX136X_MONITOR_DELAY(7); monitorByteShadow |= MAX136X_MONITOR_DELAY(delay); mI2CBuffer[0] = configByteShadow; mI2CBuffer[1] = setupByteShadow; mI2CBuffer[2] = monitorByteShadow; for(i = 0; i < 12; i++) mI2CBuffer[i+3] = thresholds[i]; call HplMAX136x.setConfig(mI2CBuffer, 15); return SUCCESS; } command error_t HalMAX136xAdvanced.setConversionMode(bool bDifferential, bool bBipolar) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_SETCONVMODE; if(bDifferential) configByteShadow &= ~MAX136X_CONFIG_SE; else configByteShadow |= MAX136X_CONFIG_SE; if(bBipolar) setupByteShadow |= MAX136X_SETUP_BIP; else setupByteShadow &= ~MAX136X_SETUP_BIP; mI2CBuffer[0] = configByteShadow; mI2CBuffer[1] = setupByteShadow; call HplMAX136x.setConfig(mI2CBuffer, 2); return SUCCESS; } command error_t HalMAX136xAdvanced.setClock(bool bExtClk) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_SETCLK; if(bExtClk) setupByteShadow |= MAX136X_SETUP_EXTCLK; else setupByteShadow &= ~MAX136X_SETUP_EXTCLK; mI2CBuffer[0] = setupByteShadow; call HplMAX136x.setConfig(mI2CBuffer, 1); return SUCCESS; } command error_t HalMAX136xAdvanced.setRef(max136x_selflag_t sel, bool bInRefPwr) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_SETREF; if(bInRefPwr) setupByteShadow |= MAX136X_SETUP_INTREFOFF; else setupByteShadow &= ~MAX136X_SETUP_INTREFOFF; setupByteShadow &= ~MAX136X_SETUP_REFAIN3SEL(3); setupByteShadow |= MAX136X_SETUP_REFAIN3SEL(sel); mI2CBuffer[0] = setupByteShadow; call HplMAX136x.setConfig(mI2CBuffer, 1); return SUCCESS; } command error_t HalMAX136xAdvanced.getStatus() { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_GETSTATUS; return call HplMAX136x.readStatus(mI2CBuffer, 2); } command error_t HalMAX136xAdvanced.enableAlert(bool bEnable) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_ENALERT; if(bEnable) monitorByteShadow |= MAX136X_MONITOR_INTEN; else monitorByteShadow &= ~MAX136X_MONITOR_INTEN; mI2CBuffer[0] = setupByteShadow; mI2CBuffer[1] = (0xF0 | monitorByteShadow); call HplMAX136x.setConfig(mI2CBuffer, 2); return SUCCESS; } event void Resource.granted() { // intentionally left blank } async event void HplMAX136x.readStatusDone(error_t error, uint8_t* buf) { clientResult = error; post signalDone_Task(); } async event void HplMAX136x.measureChannelsDone( error_t error, uint8_t *buf, uint8_t len ) { /* intentionally left blank */ } async event void HplMAX136x.setConfigDone( error_t error , uint8_t *cfgbuf, uint8_t len) { clientResult = error; post signalDone_Task(); } async event void HplMAX136x.alertThreshold() { post alert_Task(); } } tinyos-2.1.2+dfsg/tos/chips/max136x/HalMAX136xReaderP.nc000066400000000000000000000053761207233610700223770ustar00rootroot00000000000000/* $Id: HalMAX136xReaderP.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Kaisen Lin * @author Phil Buonadonna */ #include "MAX136x.h" generic module HalMAX136xReaderP() { provides interface Read as ADC; uses interface HplMAX136x; uses interface Resource as MAX136xResource; } implementation { uint8_t channelBuf[2]; command error_t ADC.read() { return call MAX136xResource.request(); } event void MAX136xResource.granted() { error_t error; error = call HplMAX136x.measureChannels(channelBuf, 2); if (error) { call MAX136xResource.release(); signal ADC.readDone(error,0); } } async event void HplMAX136x.measureChannelsDone(error_t error, uint8_t *buf, uint8_t len) { uint16_t result = 0; result = buf[0]; result <<= 8; result += buf[1]; call MAX136xResource.release(); signal ADC.readDone(error,result); return; } async event void HplMAX136x.setConfigDone(error_t error, uint8_t *cfgbuf, uint8_t len) { // intentionally left blank } async event void HplMAX136x.alertThreshold() {} async event void HplMAX136x.readStatusDone(error_t error, uint8_t* buf) { } } tinyos-2.1.2+dfsg/tos/chips/max136x/HplMAX136x.nc000066400000000000000000000043111207233610700211370ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Hpl interface for the MAXIM 136x series ADC chips. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ interface HplMAX136x { command error_t measureChannels(uint8_t *buf,uint8_t len); async event void measureChannelsDone( error_t error, uint8_t *buf, uint8_t len ); command error_t setConfig( uint8_t *cfgbuf, uint8_t len); async event void setConfigDone( error_t error , uint8_t *cfgbuf, uint8_t len); command error_t readStatus(uint8_t *buf, uint8_t len); async event void readStatusDone(error_t error, uint8_t *buf); async event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/max136x/HplMAX136xLogicP.nc000066400000000000000000000134251207233610700222430ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * MAX136xLogicP is the driver for the MAXIM 136x series ADC chip. * It requires an I2C packet interface and provides the HplMAX136x HPL * interface. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ #include "I2C.h" generic module HplMAX136xLogicP(uint16_t devAddr) { provides interface Init; provides interface SplitControl; provides interface HplMAX136x; uses interface I2CPacket; uses interface GpioInterrupt as InterruptAlert; uses interface GeneralIO as InterruptPin; } implementation { enum { STATE_IDLE, STATE_STARTING, STATE_STOPPING, STATE_STOPPED, STATE_READCH, STATE_SETCONFIG, STATE_READSTATUS, STATE_ERROR, }; uint8_t mState; bool mStopRequested; norace error_t mSSError; static error_t doWrite(uint8_t nextState, uint8_t *buf, uint8_t len) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; error = call I2CPacket.write(I2C_START | I2C_STOP, devAddr,len,buf); if (error) atomic mState = STATE_IDLE; return error; } static error_t doRead(uint8_t nextState, uint8_t *buf, uint8_t len) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,len,buf); if (error) atomic mState = STATE_IDLE; return error; } task void StartDone() { atomic mState = STATE_IDLE; signal SplitControl.startDone(SUCCESS); return; } task void StopDone() { atomic mState = STATE_STOPPED; signal SplitControl.stopDone(mSSError); return; } command error_t Init.init() { call InterruptPin.makeInput(); call InterruptAlert.enableFallingEdge(); atomic { mStopRequested = FALSE; mState = STATE_STOPPED; } return SUCCESS; } command error_t SplitControl.start() { error_t error = SUCCESS; atomic { if (mState == STATE_STOPPED) { mState = STATE_STARTING; } else { error = EBUSY; } } if (error) return error; return post StartDone(); } command error_t SplitControl.stop() { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = STATE_STOPPING; } else { error = EBUSY; } } if (error) return error; return post StopDone(); } command error_t HplMAX136x.readStatus(uint8_t *buf, uint8_t len) { return doRead(STATE_READSTATUS,buf,len); } command error_t HplMAX136x.measureChannels(uint8_t *buf, uint8_t len) { return doRead(STATE_READCH,buf,len); } command error_t HplMAX136x.setConfig(uint8_t *configbuf, uint8_t len) { return doWrite(STATE_SETCONFIG,configbuf,len); } async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { error_t error = i2c_error; switch (mState) { case STATE_READCH: mState = STATE_IDLE; signal HplMAX136x.measureChannelsDone(error, buf, len); break; case STATE_READSTATUS: mState = STATE_IDLE; signal HplMAX136x.readStatusDone(error, buf); break; default: mState = STATE_IDLE; break; } return; } async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { error_t error = i2c_error; switch (mState) { case STATE_SETCONFIG: mState = STATE_IDLE; signal HplMAX136x.setConfigDone(error,buf,len); break; default: mState = STATE_IDLE; break; } return; } async event void InterruptAlert.fired() { // This alert is decoupled from whatever state the MAX136x is in. // Upper layers must handle dealing with this alert appropriately. signal HplMAX136x.alertThreshold(); return; } default event void SplitControl.startDone( error_t error ) { return; } default event void SplitControl.stopDone( error_t error ) { return; } default async event void HplMAX136x.alertThreshold(){ return; } } tinyos-2.1.2+dfsg/tos/chips/max136x/MAX136x.h000066400000000000000000000056151207233610700203320ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Types and definitions for the Maxim 136x general purpose ADC chip * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $ */ #ifndef _MAX136X_H #define _MAX136X_H #define MAX136X_CONFIG_SCAN(_x) (((_x) & 0x3) << 5) #define MAX136X_CONFIG_CS(_x) (((_x) & 0xF) << 1) #define MAX136X_CONFIG_SE (1 << 0) #define MAX136X_SETUP_REFAIN3SEL(_x) (((_x) & 0x3) << 5) #define MAX136X_SETUP_INTREFOFF (1 << 4) #define MAX136X_SETUP_EXTCLK (1 << 3) #define MAX136X_SETUP_BIP (1 << 2) #define MAX136X_SETUP_NRESET (1 << 1) #define MAX136X_SETUP_MONSETUP (1 << 0) #define MAX136X_MONITOR_DELAY(_x) (((_x) & 0x7) << 1) #define MAX136X_MONITOR_INTEN (1 << 0) typedef uint16_t max136x_data_t; typedef enum { MAX136X_SCAN_RANGE = 0, MAX136X_SCAN_REPEATED = 1, MAX136X_SCAN_SINGLE = 3, } max136x_scanflag_t; typedef enum { MAX136X_SEL_VDDREF, // SEL1 = 0, SEL0 = 0 MAX136X_SEL_EXTREF, // SEL1 = 0, SEL0 = 1 MAX136X_SEL_INTREF_AIN3IN, // SEL1 = 1, SEL0 = 0 MAX136X_SEL_INTREF_AIN3OUT // SEL1 = 1, SEL0 = 1 } max136x_selflag_t; typedef enum { MAX136X_DELAY_133_0, MAX136X_DELAY_66_5, MAX136X_DELAY_33_3, MAX136X_DELAY_16_6, MAX136X_DELAY_8_3, MAX136X_DELAY_4_2, MAX136X_DELAY_2_0, MAX136X_DELAY_1_0 } max136x_delayflag_t; #endif /* _MAX136X_H */ tinyos-2.1.2+dfsg/tos/chips/mcp4728/000077500000000000000000000000001207233610700170005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/mcp4728/HplMCP4728.h000066400000000000000000000040211207233610700205560ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Henrik Makitaavola */ #ifndef __HPLMCP4728_H__ #define __HPLMCP4728_H__ typedef enum { MCP4728_POWER_DOWN_NORMAL = 0, MCP4728_POWER_DOWN_1K_RESISTOR = 1, MCP4728_POWER_DOWN_100K_RESISTOR = 2, MCP4728_POWER_DOWN_500K_RESISTOR = 3, } MCP4728_POWER_DOWN; typedef enum { MCP4728_CHANNEL_A = 0, MCP4728_CHANNEL_B = 1, MCP4728_CHANNEL_C = 2, MCP4728_CHANNEL_D = 3 } MCP4728_CHANNEL; #endif // __HPLMCP4728_H__ tinyos-2.1.2+dfsg/tos/chips/mcp4728/HplMCP4728.nc000066400000000000000000000141241207233610700207340ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Hpl interface for Microchips MCP4728 12bit digital-to-analog converter * chip with EEPROM. * * @author Henrik Makitaavola */ #include "HplMCP4728.h" // TODO(henrik) Add support for reading registers and all commands. interface HplMCP4728 { /** * Checks the status of EEPROM programming activity. * * @return TRUE if there is no EEPROM activity. */ command bool EEPROMisReady(); /** * Sets the LDAC pin. * * @param high TRUE if LDAC should be high, FALSE for low. */ command void setLDAC(bool high); /** * Sets the reference voltage for the D/A channels. * * @return SUCCESS if the references will be set and a * setRefereceDone event will be signaled. */ command error_t setReference(bool a_internal, bool b_internal, bool c_internal, bool d_internal); /** * Event that indicates the status of a setReference call. * * @param e SUCCESS if the references were successfully set. */ event void setRefereceDone(error_t e); /** * Sets the gain on the D/A channels. * * @param a TRUE for gain of 2, * FALSE for gain 1 on channel a. * @param b TRUE for gain of 2, * FALSE for gain 1 on channel b. * @param c TRUE for gain of 2, * FALSE for gain 1 on channel c. * @param d TRUE for gain of 2, * FALSE for gain 1 on channel d. * * @return SUCCESS if the gains will be set and a * setGainDone event will be signaled. */ command error_t setGain(bool a, bool b, bool c, bool d); /** * Event that indicates the status of a setGain call. * * @param e SUCCESS if the gains were successfully set. */ event void setGainDone(error_t e); /** * Sets power-down mode for the D/A channels. * * @return SUCCESS if the modes will be set and a * setPowerDownDone event will be signaled. */ command error_t setPowerDown(MCP4728_POWER_DOWN a, MCP4728_POWER_DOWN b, MCP4728_POWER_DOWN c, MCP4728_POWER_DOWN d); /** * Event that indicates the status of a setPowerDown call. * * @param e SUCCESS if the power down modes were successfully set. */ event void setPowerDownDone(error_t e); /** * Sets output voltage on the D/A channels. The input is the value * that should be written to the register. * * @return SUCCESS if the voltages will be set and a * setOutputVoltageDone event will be signaled. */ command error_t setOutputVoltage(uint16_t a, uint16_t b, uint16_t c, uint16_t d); /** * Event that indicates the status of a setOutputVoltage call. * * @param e SUCCESS if the voltages were successfully set. */ event void setOutputVoltageDone(error_t e); /** * Specifies the settings of a D/A channel and stores the settings * in EEPROM. On SUCCESS a writeDACRegisterAndEEPROM event is signaled. * * @param channel The channel that the settings should be written to. * @param volt The output voltage of the channel. volt is the value * that will be written to the register and EEPROM. * @param internal_vref TRUE for internal- and * FALSE for external reference. * @param power_down Power-Down mode of the channel. * @param gain TRUE for gain of 2 and FALSE for gain 1. * @param upload TRUE if the voltage output should be updated. * * @return SUCCESS if the settings will be set and a * writeDACRegisterAndEEPROMDone event will be signaled. */ command error_t writeDACRegisterAndEEPROM(MCP4728_CHANNEL channel, uint16_t volt, bool internal_vref, MCP4728_POWER_DOWN power_down, bool gain, bool upload); /** * Event that indicates the status of a writeDACRegisterAndEEPROM call. * * @param e SUCCESS if the call were successful. * @param channel The channel that the settings were applied to. */ event void writeDACRegisterAndEEPROMDone(error_t e, MCP4728_CHANNEL channel); } tinyos-2.1.2+dfsg/tos/chips/mcp4728/HplMCP4728P.nc000066400000000000000000000146641207233610700210650ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the Hpl interface for Microchips MCP4728 12bit * digital-to-analog converter chip with EEPROM. * * @param p_addr The I2C address of the device. * * @author Henrik Makitaavola */ #include "HplMCP4728.h" generic module HplMCP4728P(uint8_t p_addr) { provides interface HplMCP4728; provides interface Init; uses { interface Resource as I2CResource; interface I2CPacket as I2C; interface GeneralIO as RDY; interface GeneralIO as LDAC; } } implementation { enum { S_IDLE, S_SET_REF, S_SET_GAIN, S_SET_POWER_DOWN, S_SET_OUTPUT, S_SET_DAC_REGISTER_EEPROM }; norace uint8_t m_state = S_IDLE; norace uint8_t m_buffer[15]; norace uint8_t m_write_length; norace uint8_t m_dac; norace error_t m_error; task void isReady() { if (!call HplMCP4728.EEPROMisReady()) { post isReady(); } else { call I2C.write(I2C_START | I2C_STOP, p_addr, m_write_length, m_buffer); } } bool isIdle() { return m_state == S_IDLE ? true : false; } error_t requestI2C(uint8_t newState) { if (call I2CResource.request() == SUCCESS) { m_state = newState; return SUCCESS; } else { return FAIL; } } task void signalTask() { uint8_t state = m_state; call I2CResource.release(); m_state = S_IDLE; call LDAC.clr(); call LDAC.set(); switch(state) { case S_SET_REF: signal HplMCP4728.setRefereceDone(m_error); break; case S_SET_GAIN: signal HplMCP4728.setGainDone(m_error); break; case S_SET_POWER_DOWN: signal HplMCP4728.setPowerDownDone(m_error); break; case S_SET_OUTPUT: signal HplMCP4728.setOutputVoltageDone(m_error); break; case S_SET_DAC_REGISTER_EEPROM: signal HplMCP4728.writeDACRegisterAndEEPROMDone(m_error, m_dac); break; } } command error_t Init.init() { call RDY.makeInput(); call LDAC.makeOutput(); call LDAC.set(); return SUCCESS; } command bool HplMCP4728.EEPROMisReady() { return call RDY.get(); } command void HplMCP4728.setLDAC(bool high) { if (high) { call LDAC.set(); } else { call LDAC.clr(); } } command error_t HplMCP4728.setReference(bool a_internal, bool b_internal, bool c_internal, bool d_internal) { if (!isIdle()) { return EBUSY; } m_buffer[0] = 0x80 | a_internal << 3 | b_internal << 2 | c_internal << 1 | d_internal; m_write_length = 1; return requestI2C(S_SET_REF); } command error_t HplMCP4728.setGain(bool a, bool b, bool c, bool d) { if (!isIdle()) { return EBUSY; } m_buffer[0] = 0xc0 | a << 3 | b << 2 | c << 1 | d; m_write_length = 1; return requestI2C(S_SET_GAIN); } command error_t HplMCP4728.setPowerDown(MCP4728_POWER_DOWN a, MCP4728_POWER_DOWN b, MCP4728_POWER_DOWN c, MCP4728_POWER_DOWN d) { if (!isIdle()) { return EBUSY; } m_buffer[0] = 0xa0 | a << 2 | b; m_buffer[1] = c << 6 | d << 4; m_write_length = 2; return requestI2C(S_SET_POWER_DOWN); } command error_t HplMCP4728.setOutputVoltage(uint16_t a, uint16_t b, uint16_t c, uint16_t d) { if (!isIdle()) { return EBUSY; } m_buffer[0] = 0x0F & (a >> 8); m_buffer[1] = 0xFF & a; m_buffer[2] = 0x0F & (b >> 8); m_buffer[3] = 0xFF & b; m_buffer[4] = 0x0F & (c >> 8); m_buffer[5] = 0xFF & c; m_buffer[6] = 0x0F & (d >> 8); m_buffer[7] = 0xFF & d; m_write_length = 8; return requestI2C(S_SET_OUTPUT); } command error_t HplMCP4728.writeDACRegisterAndEEPROM(MCP4728_CHANNEL channel, uint16_t volt, bool internal_vref, MCP4728_POWER_DOWN power_down, bool gain,bool upload) { if (!isIdle()) { return EBUSY; } m_dac = channel; m_buffer[0] = 0x58 | channel << 1 | !upload; m_buffer[1] = internal_vref << 7 | power_down << 5 | gain << 4 | 0xF & (volt >> 8); m_buffer[2] = 0xFF & volt; m_write_length = 3; return requestI2C(S_SET_DAC_REGISTER_EEPROM); } async event void I2C.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { m_error = error; post signalTask(); } event void I2CResource.granted() { post isReady(); } async event void I2C.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) {} } tinyos-2.1.2+dfsg/tos/chips/mm74hc595/000077500000000000000000000000001207233610700172365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/mm74hc595/MM74HC595C.nc000066400000000000000000000114261207233610700210310ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, Data, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * This configuration provides 'virtual' output pins using the * mm74hc595 Serial-In Parallel-Out (SIPO) chip from Fairchild Semiconductor. * * This driver expects to find a HPL module called HplMM74HC595PinsC (that should * be implemented for a platform or sensorboard) providing GeneralIO interfaces for * the three physical pins of the MM74HC595 that it uses. * * These virtual output pins are presented as implementing the * GeneralIO interface. Calling GeneralIO.makeOutput() or GeneralIO.makeInput() * has no effect -- these pins are always outputs. * * @author Henri Dubois-Ferriere * */ configuration MM74HC595C { provides interface GeneralIO as VirtualPin0; // Q_A on MM74HC595 datasheet provides interface GeneralIO as VirtualPin1; // Q_B provides interface GeneralIO as VirtualPin2; // Q_C provides interface GeneralIO as VirtualPin3; // Q_D provides interface GeneralIO as VirtualPin4; // Q_E provides interface GeneralIO as VirtualPin5; // Q_F provides interface GeneralIO as VirtualPin6; // Q_G provides interface GeneralIO as VirtualPin7; // Q_H } implementation { components MM74HC595ImplP, HplMM74HC595PinsC; MM74HC595ImplP.Ser -> HplMM74HC595PinsC.Ser; MM74HC595ImplP.Sck -> HplMM74HC595PinsC.Sck; MM74HC595ImplP.Rck -> HplMM74HC595PinsC.Rck; components MainC; MainC.SoftwareInit -> MM74HC595ImplP.Init; components BusyWaitMicroC; MM74HC595ImplP.BusyWait -> BusyWaitMicroC; components new MM74HC595P(0) as VPin0; VPin0.set -> MM74HC595ImplP.set; VPin0.get -> MM74HC595ImplP.get; VPin0.toggle -> MM74HC595ImplP.toggle; VPin0.clr -> MM74HC595ImplP.clr; VirtualPin0 = VPin0; components new MM74HC595P(1) as VPin1; VPin1.set -> MM74HC595ImplP.set; VPin1.get -> MM74HC595ImplP.get; VPin1.toggle -> MM74HC595ImplP.toggle; VPin1.clr -> MM74HC595ImplP.clr; VirtualPin1 = VPin1; components new MM74HC595P(2) as VPin2; VPin2.set -> MM74HC595ImplP.set; VPin2.get -> MM74HC595ImplP.get; VPin2.toggle -> MM74HC595ImplP.toggle; VPin2.clr -> MM74HC595ImplP.clr; VirtualPin2 = VPin2; components new MM74HC595P(3) as VPin3; VPin3.set -> MM74HC595ImplP.set; VPin3.get -> MM74HC595ImplP.get; VPin3.toggle -> MM74HC595ImplP.toggle; VPin3.clr -> MM74HC595ImplP.clr; VirtualPin3 = VPin3; components new MM74HC595P(4) as VPin4; VPin4.set -> MM74HC595ImplP.set; VPin4.get -> MM74HC595ImplP.get; VPin4.toggle -> MM74HC595ImplP.toggle; VPin4.clr -> MM74HC595ImplP.clr; VirtualPin4 = VPin4; components new MM74HC595P(5) as VPin5; VPin5.set -> MM74HC595ImplP.set; VPin5.get -> MM74HC595ImplP.get; VPin5.toggle -> MM74HC595ImplP.toggle; VPin5.clr -> MM74HC595ImplP.clr; VirtualPin5 = VPin5; components new MM74HC595P(6) as VPin6; VPin6.set -> MM74HC595ImplP.set; VPin6.get -> MM74HC595ImplP.get; VPin6.toggle -> MM74HC595ImplP.toggle; VPin6.clr -> MM74HC595ImplP.clr; VirtualPin6 = VPin6; components new MM74HC595P(7) as VPin7; VPin7.set -> MM74HC595ImplP.set; VPin7.get -> MM74HC595ImplP.get; VPin7.toggle -> MM74HC595ImplP.toggle; VPin7.clr -> MM74HC595ImplP.clr; VirtualPin7 = VPin7; } tinyos-2.1.2+dfsg/tos/chips/mm74hc595/MM74HC595ImplP.nc000066400000000000000000000063671207233610700217000ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * mm74hc595 driver internals. * * @author Henri Dubois-Ferriere * */ module MM74HC595ImplP { provides interface Init @atleastonce(); provides async command void set(uint8_t pin); provides async command bool get(uint8_t pin); provides async command void clr(uint8_t pin); provides async command void toggle(uint8_t pin); uses interface GeneralIO as Ser; uses interface GeneralIO as Rck; uses interface GeneralIO as Sck; uses interface BusyWait; } implementation { enum { npins = 8 }; uint8_t state; void writeState() { uint8_t i, s; atomic s = state; call Rck.clr(); for (i = 0; i < npins; i++) { call Sck.clr(); if (s & 0x80) { call Ser.set(); } else { call Ser.clr(); } call Sck.set(); s <<= 1; } call Rck.set(); call Sck.clr(); call Ser.clr(); call Rck.clr(); } command error_t Init.init() { state = 0; call Ser.makeOutput(); call Sck.makeOutput(); call Rck.makeOutput(); call Sck.clr(); call Rck.clr(); call Ser.clr(); writeState(); return SUCCESS; } async command void set(uint8_t pin) { atomic { state |= (1 << pin); writeState(); } } async command bool get(uint8_t pin) { atomic return (state >> pin) & 1; } async command void clr(uint8_t pin) { atomic { state &= ~(1 << pin); writeState(); } } async command void toggle(uint8_t pin) { if (call get(pin)) call clr(pin); else call set(pin); } } tinyos-2.1.2+dfsg/tos/chips/mm74hc595/MM74HC595P.nc000066400000000000000000000051661207233610700210520ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, Data, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * * This is an internal module of the mm74hc595 Serial-In Parallel-Out (SIPO) driver. * Do not wire to this -- use MM74HC595C instead. * */ generic module MM74HC595P(uint8_t outaddr) { provides interface GeneralIO; uses async command void set(uint8_t pin); uses async command bool get(uint8_t pin); uses async command void clr(uint8_t pin); uses async command void toggle(uint8_t pin); } implementation { async command void GeneralIO.set() { call set(outaddr); } async command bool GeneralIO.get() { return call get(outaddr); } async command void GeneralIO.clr() { call clr(outaddr); } async command void GeneralIO.toggle() { call toggle(outaddr); } async command void GeneralIO.makeInput() { } async command void GeneralIO.makeOutput() { } async command bool GeneralIO.isInput() { } async command bool GeneralIO.isOutput() { } } tinyos-2.1.2+dfsg/tos/chips/mma7261qt/000077500000000000000000000000001207233610700173335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/mma7261qt/HplMMA7261QT.h000066400000000000000000000040471207233610700213540ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * MMA7261QT gSelect defines. * * @author Henrik Makitaavola */ #ifndef __HPLMMA7261QT_H__ #define __HPLMMA7261QT_H__ typedef enum mm7261qt_gselect { MMA7261QT_GSELECT_2_5G=0, //most sensitive MMA7261QT_GSELECT_3_3G=1, MMA7261QT_GSELECT_6_7G=2, MMA7261QT_GSELECT_10_0G=3, //least sensitive } mm7261qt_gselect_t; #endif tinyos-2.1.2+dfsg/tos/chips/mma7261qt/HplMMA7261QTControl.nc000066400000000000000000000037101207233610700230620ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * MMA7261QT control interface. * * @author Henrik Makitaavola */ #include "HplMMA7261QT.h" interface HplMMA7261QTControl { async command void on(); async command void off(); async command void gSelect( mm7261qt_gselect_t val); } tinyos-2.1.2+dfsg/tos/chips/mma7261qt/HplMMA7261QTControlC.nc000066400000000000000000000042231207233610700231650ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * MMA7261QT control component. * * @author Henrik Makitaavola */ configuration HplMMA7261QTControlC { provides interface HplMMA7261QTControl; } implementation { components HplMMA7261QTControlP, HplMMA7261QTC; HplMMA7261QTControlP.Sleep -> HplMMA7261QTC.Sleep; HplMMA7261QTControlP.GSelect1 -> HplMMA7261QTC.GSelect1; HplMMA7261QTControlP.GSelect2 -> HplMMA7261QTC.GSelect2; HplMMA7261QTControl = HplMMA7261QTControlP; } tinyos-2.1.2+dfsg/tos/chips/mma7261qt/HplMMA7261QTControlP.nc000066400000000000000000000047711207233610700232120ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * MMA7261QT control. * * @author Henrik Makitaavola */ #include "HplMMA7261QT.h" module HplMMA7261QTControlP { provides interface HplMMA7261QTControl; uses interface GeneralIO as Sleep; uses interface GeneralIO as GSelect1; uses interface GeneralIO as GSelect2; } implementation { async command void HplMMA7261QTControl.on() { call Sleep.set(); call GSelect1.clr(); call GSelect2.clr(); } async command void HplMMA7261QTControl.off() { call GSelect1.clr(); call GSelect2.clr(); call Sleep.clr(); } async command void HplMMA7261QTControl.gSelect( mm7261qt_gselect_t val) { if(val & 1) call GSelect1.set(); else call GSelect1.clr(); if(val & 2) call GSelect2.set(); else call GSelect2.clr(); } } tinyos-2.1.2+dfsg/tos/chips/mma7261qt/HplMMA7261QTReaderC.nc000066400000000000000000000041331207233610700227470ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * MMA7261QT reader. * * @author Henrik Makitaavola */ configuration HplMMA7261QTReaderC { provides interface Read as AccelX; provides interface Read as AccelY; provides interface Read as AccelZ; } implementation { components HplMMA7261QTC; AccelX = HplMMA7261QTC.AccelX; AccelY = HplMMA7261QTC.AccelY; AccelZ = HplMMA7261QTC.AccelZ; } tinyos-2.1.2+dfsg/tos/chips/ms5607/000077500000000000000000000000001207233610700166355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607.h000066400000000000000000000051061207233610700177110ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #ifndef MS5607_H #define MS5607_H typedef struct { uint16_t coefficient[6]; } calibration_t; /* * Precision dependent values: supply current/conversion time: * OSR=4096: 12.5uA/9.04ms * OSR=2048: 6.3uA/4.54ms * OSR=1024: 3.2uA/2.28ms * OSR=512: 1.7uA/1.17ms * OSR=256: 0.9uA/0.6ms */ enum { MS5607_PRESSURE_256=8, //resolution RMS=0.13mbar MS5607_PRESSURE_512=6, //resolution RMS=0.084mbar MS5607_PRESSURE_1024=4, //resolution RMS=0.054mbar MS5607_PRESSURE_2048=2, //resolution RMS=0.036mbar MS5607_PRESSURE_4096=0, //resolution RMS=0.024mbar MS5607_TEMPERATURE_256=8<<4, //resolution RMS=0.012 C MS5607_TEMPERATURE_512=6<<4, //resolution RMS=0.008 C MS5607_TEMPERATURE_1024=4<<4, //resolution RMS=0.005 C MS5607_TEMPERATURE_2048=2<<4, //resolution RMS=0.003 C MS5607_TEMPERATURE_4096=0<<4, //resolution RMS=0.002 C MS5607_PRESSURE_MASK=0x0f, } ms5607_precision; #ifndef MS5607_PRECISION #define MS5607_PRECISION 0 //maximum precision with both sensors #endif #define UQ_MS5607_RESOURCE "Ms5607.ReadResource" #endif tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607ArbitratedC.nc000066400000000000000000000054751207233610700222000ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Ms5607.h" configuration Ms5607ArbitratedC { provides interface Read as ReadTemperature[uint8_t client]; provides interface Read as ReadPressure[uint8_t client]; //You can't use the following interfaces if you're waiting for any readDone //the calibration data stays the same for the same chip, but we do not cache it provides interface ReadRef as ReadCalibration; provides interface Set as SetPrecision; } implementation { components Ms5607C; ReadCalibration=Ms5607C; SetPrecision=Ms5607C; components new ArbitratedReadC(uint32_t) as ArbitratedTemp, new FcfsArbiterC(UQ_MS5607TEMP_RESOURCE) as TempArbiter, new ReadClientP(uint32_t) as TempClient; ReadTemperature=ArbitratedTemp.Read; ArbitratedTemp.Resource->TempArbiter; ArbitratedTemp.Service->TempClient; TempClient.ActualRead->Ms5607C.ReadTemperature; components new ArbitratedReadC(uint32_t) as ArbitratedPress, new FcfsArbiterC(UQ_MS5607PRESS_RESOURCE) as PressArbiter, new ReadClientP(uint32_t) as PressClient; ReadPressure=ArbitratedPress.Read; ArbitratedPress.Resource->PressArbiter; ArbitratedPress.Service->PressClient; PressClient.ActualRead->Ms5607C.ReadPressure; } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607C.nc000066400000000000000000000046141207233610700201700ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ #include "Ms5607.h" configuration Ms5607C { provides interface Read as ReadPressure; provides interface Read as ReadTemperature; //You can't use the following interfaces if you're waiting for any readDone //the calibration data stays the same for the same chip, but we do not cache it provides interface ReadRef as ReadCalibration; provides interface Set as SetPrecision; } implementation { components Ms5607P; ReadPressure = Ms5607P.ReadPressure; ReadTemperature = Ms5607P.ReadTemperature; ReadCalibration = Ms5607P.ReadCalibration; SetPrecision = Ms5607P; components HplMs5607C, new TimerMilliC(), MainC; Ms5607P.I2CPacket -> HplMs5607C; Ms5607P.I2CResource -> HplMs5607C.Resource; Ms5607P.Timer -> TimerMilliC; Ms5607P.BusPowerManager -> HplMs5607C; Ms5607P.Init <- MainC.SoftwareInit; } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607CalibrationC.nc000066400000000000000000000043251207233610700223370ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Ms5607.h" generic configuration Ms5607CalibrationC() { //the calibration data stays the same for the same chip, but we do not cache it provides interface ReadRef as Read; //You can't use the following interface if you're waiting for any readDone provides interface Set as SetPrecision; } implementation { enum { clientid = unique(UQ_MS5607_RESOURCE), }; components Ms5607RawArbiterP, new ResourceReadRefC(calibration_t); SetPrecision=Ms5607RawArbiterP; Read = ResourceReadRefC; ResourceReadRefC.Resource -> Ms5607RawArbiterP.Resource[clientid]; ResourceReadRefC.Service -> Ms5607RawArbiterP.ReadCalibration[clientid]; } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607ConversionDtP.nc000066400000000000000000000047511207233610700225450ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Ms5607.h" generic module Ms5607ConversionDtP(){ uses interface Read as ReadRawTemp; uses interface ReadRef as ReadCalib; provides interface Read; provides interface Get[uint8_t index]; } implementation{ calibration_t calib; bool calibReady=FALSE; command error_t Read.read(){ if(calibReady) return call ReadRawTemp.read(); else return call ReadCalib.read(&calib); } event void ReadCalib.readDone(error_t err, calibration_t *cal){ if(err==SUCCESS){ err = call ReadRawTemp.read(); } if(err!=SUCCESS) signal Read.readDone(err, 0); } event void ReadRawTemp.readDone(error_t err, uint32_t value){ if(err!=SUCCESS) signal Read.readDone(err, 0); else signal Read.readDone(SUCCESS, (value-((uint32_t)calib.coefficient[4]<<8))); } command uint16_t Get.get[uint8_t index](){ return calib.coefficient[index]; } } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607ConversionPressP.nc000066400000000000000000000047221207233610700232700ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ generic module Ms5607ConversionPressP(){ provides interface Read; uses interface Read as ReadDt; uses interface Read as ReadRawPress; uses interface Get[uint8_t index]; } implementation{ int32_t dT; command error_t Read.read(){ return call ReadDt.read(); } event void ReadDt.readDone(error_t err, int32_t value){ if(err==SUCCESS){ dT=value; err=call ReadRawPress.read(); } if(err!=SUCCESS) signal Read.readDone(err, 0); } event void ReadRawPress.readDone(error_t err, uint32_t value){ if(err!=SUCCESS) signal Read.readDone(err, 0); else { int64_t off=((uint64_t)call Get.get[1]()<<17)+(((int64_t)dT*call Get.get[3]())>>6); int64_t sens=((uint32_t)call Get.get[0]()<<16)+(((int64_t)dT*call Get.get[2]())>>7); uint32_t p=((((uint64_t)value*sens)>>21)-off)>>15; signal Read.readDone(SUCCESS, p); } } } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607ConversionTempP.nc000066400000000000000000000037661207233610700231100ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ generic module Ms5607ConversionTempP(){ provides interface Read; uses interface Read as ReadDt; uses interface Get[uint8_t index]; } implementation{ command error_t Read.read(){ return call ReadDt.read(); } event void ReadDt.readDone(error_t err, int32_t value){ if(err==SUCCESS) signal Read.readDone(SUCCESS, 2000+(((int64_t)value*call Get.get[5]())>>23)); else signal Read.readDone(err, 0); } } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607P.nc000066400000000000000000000240471207233610700202070ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo, Andras Biro */ #include "Ms5607.h" //TODO: norace or atomic (state, i2cBuffer) //TODO: testing: SetPrecision module Ms5607P { provides interface Read as ReadTemperature; provides interface Read as ReadPressure; provides interface ReadRef as ReadCalibration; provides interface Set as SetPrecision; provides interface Init; uses interface Timer; uses interface I2CPacket; uses interface Resource as I2CResource; uses interface BusPowerManager; } implementation { enum { MS5607_ADDRESS = 0x77, }; enum { MS5607_ADC_READ = 0x00, MS5607_CONVERT_TEMPERATURE = 0x58, //-0..8, depending on precision (OSR) MS5607_CONVERT_PRESSURE = 0x48, //-0..8, depending on precision (OSR) MS5607_PROM_READ = 0xA0, // +(address << 1) } ms5607_command; enum { MS5607_TIMEOUT_4096=10, MS5607_TIMEOUT_2048=5, MS5607_TIMEOUT_1024=3, MS5607_TIMEOUT_512=2, MS5607_TIMEOUT_256=1, MS5607_TIMEOUT_RESET=3, } ms5607_timeout; //in ms enum { S_OFF = 0, S_IDLE = 1, S_READ_TEMP_CMD = 2, S_READ_TEMP, S_READ_PRESSURE_CMD, S_READ_PRESSURE, S_READ_CALIB_CMD1, S_READ_CALIB_CMD2, S_READ_CALIB_CMD3, S_READ_CALIB_CMD4, S_READ_CALIB_CMD5, S_READ_CALIB_CMD6, S_READ_CALIB, }; norace uint8_t state=S_OFF; norace uint8_t i2cBuffer[3]; norace calibration_t *calib; norace error_t lastError; uint8_t precision=MS5607_PRECISION; command error_t Init.init(){ call BusPowerManager.configure(MS5607_TIMEOUT_RESET, MS5607_TIMEOUT_RESET); return SUCCESS; } command void SetPrecision.set(uint8_t newPrecision){ if(state<=S_IDLE) precision=newPrecision; } task void signalReadDone(){ switch(state){ case S_READ_CALIB_CMD1: case S_READ_CALIB_CMD2: case S_READ_CALIB_CMD3: case S_READ_CALIB_CMD4: case S_READ_CALIB_CMD5: case S_READ_CALIB_CMD6: case S_READ_CALIB:{ state=S_IDLE; call BusPowerManager.releasePower(); signal ReadCalibration.readDone(lastError, calib); }break; case S_READ_PRESSURE_CMD: case S_READ_PRESSURE:{ uint32_t measurment=(*((nx_uint32_t*)i2cBuffer))>>8;//conversion from big-endian state=S_IDLE; call BusPowerManager.releasePower(); signal ReadPressure.readDone(lastError, measurment); }break; case S_READ_TEMP_CMD: case S_READ_TEMP:{ uint32_t measurment=(*((nx_uint32_t*)i2cBuffer))>>8; state=S_IDLE; call BusPowerManager.releasePower(); signal ReadTemperature.readDone(lastError, measurment); }break; } } command error_t ReadTemperature.read(){ uint8_t prevState=state; if(state > S_IDLE) return EBUSY; state=S_READ_TEMP_CMD; call BusPowerManager.requestPower(); if(prevState==S_IDLE) call I2CResource.request(); return SUCCESS; } command error_t ReadPressure.read(){ uint8_t prevState=state; if(state > S_IDLE) return EBUSY; state=S_READ_PRESSURE_CMD; call BusPowerManager.requestPower(); if(prevState==S_IDLE) call I2CResource.request(); return SUCCESS; } command error_t ReadCalibration.read(calibration_t *cal){ uint8_t prevState=state; if(state > S_IDLE) return EBUSY; state=S_READ_CALIB_CMD1; calib=cal; call BusPowerManager.requestPower(); if(prevState==S_IDLE) call I2CResource.request(); return SUCCESS; } event void BusPowerManager.powerOn(){ if(state==S_OFF) state=S_IDLE; else call I2CResource.request(); } event void BusPowerManager.powerOff(){ state=S_OFF; } event void I2CResource.granted(){ uint8_t i2cCond=0; switch(state){ case S_READ_PRESSURE_CMD:{ i2cCond=I2C_START|I2C_STOP; i2cBuffer[0]=MS5607_CONVERT_PRESSURE - (precision & MS5607_PRESSURE_MASK); }break; case S_READ_TEMP_CMD:{ i2cCond=I2C_START|I2C_STOP; i2cBuffer[0]=MS5607_CONVERT_TEMPERATURE - (precision >> 4); }break; case S_READ_PRESSURE: case S_READ_TEMP:{ i2cCond=I2C_START; i2cBuffer[0]=MS5607_ADC_READ; }break; case S_READ_CALIB_CMD1:{ i2cCond=I2C_START; i2cBuffer[0]=MS5607_PROM_READ+(1<<1); }break; } lastError = call I2CPacket.write(i2cCond, MS5607_ADDRESS, 1, i2cBuffer) ; if( lastError != SUCCESS) { call I2CResource.release(); post signalReadDone(); } } task void startTimer(){ //the timeouts are the same for both sensor, so we convert temperature precision to pressure precision uint8_t prec=precision; if(state==S_READ_TEMP_CMD){ state=S_READ_TEMP; prec=prec>>4; }else{ state=S_READ_PRESSURE; prec=prec&MS5607_PRESSURE_MASK; } switch(prec){ case MS5607_PRESSURE_4096: call Timer.startOneShot(MS5607_TIMEOUT_4096); break; case MS5607_PRESSURE_2048: call Timer.startOneShot(MS5607_TIMEOUT_2048); break; case MS5607_PRESSURE_1024: call Timer.startOneShot(MS5607_TIMEOUT_1024); break; case MS5607_PRESSURE_512: call Timer.startOneShot(MS5607_TIMEOUT_512); break; case MS5607_PRESSURE_256: call Timer.startOneShot(MS5607_TIMEOUT_256); break; } } event void Timer.fired(){ call I2CResource.request(); } async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { uint8_t readLength=0; if(error!=SUCCESS){ lastError=error; call I2CResource.release(); post signalReadDone(); return; } switch(state){ //timer starter states case S_READ_PRESSURE_CMD: case S_READ_TEMP_CMD:{ call I2CResource.release(); post startTimer(); return; }break; //read states case S_READ_PRESSURE: case S_READ_TEMP:{ readLength=3; }break; case S_READ_CALIB_CMD1: case S_READ_CALIB_CMD2: case S_READ_CALIB_CMD3: case S_READ_CALIB_CMD4: case S_READ_CALIB_CMD5: case S_READ_CALIB_CMD6:{ readLength=2; }break; } lastError = call I2CPacket.read(I2C_START|I2C_STOP, MS5607_ADDRESS, readLength, i2cBuffer); if( lastError != SUCCESS) { call I2CResource.release(); lastError=FAIL; post signalReadDone(); } } async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { lastError=error; if(error!=SUCCESS){ call I2CResource.release(); post signalReadDone(); return; } switch(state){ case S_READ_PRESSURE: case S_READ_TEMP:{ call I2CResource.release(); post signalReadDone(); return; }break; case S_READ_CALIB_CMD6:{ call I2CResource.release(); calib->coefficient[5]=*((nx_uint16_t*)data);//data from the sensor is big endian post signalReadDone(); return; }break; case S_READ_CALIB_CMD1:{ calib->coefficient[0]=*((nx_uint16_t*)data);//data from the sensor is big endian state=S_READ_CALIB_CMD2; i2cBuffer[0]=MS5607_PROM_READ+(2<<1); }break; case S_READ_CALIB_CMD2:{ calib->coefficient[1]=*((nx_uint16_t*)data);//data from the sensor is big endian state=S_READ_CALIB_CMD3; i2cBuffer[0]=MS5607_PROM_READ+(3<<1); }break; case S_READ_CALIB_CMD3:{ calib->coefficient[2]=*((nx_uint16_t*)data);//data from the sensor is big endian state=S_READ_CALIB_CMD4; i2cBuffer[0]=MS5607_PROM_READ+(4<<1); }break; case S_READ_CALIB_CMD4:{ calib->coefficient[3]=*((nx_uint16_t*)data);//data from the sensor is big endian state=S_READ_CALIB_CMD5; i2cBuffer[0]=MS5607_PROM_READ+(5<<1); }break; case S_READ_CALIB_CMD5:{ calib->coefficient[4]=*((nx_uint16_t*)data);//data from the sensor is big endian state=S_READ_CALIB_CMD6; i2cBuffer[0]=MS5607_PROM_READ+(6<<1); }break; } //read the next calibration constant lastError = call I2CPacket.write(I2C_START, MS5607_ADDRESS, 1, i2cBuffer); if( lastError != SUCCESS) { call I2CResource.release(); post signalReadDone(); } } default event void ReadCalibration.readDone(error_t err, calibration_t *data){}; default event void ReadPressure.readDone(error_t err, uint32_t data){}; default event void ReadTemperature.readDone(error_t err, uint32_t data){}; } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607PressureC.nc000066400000000000000000000044271207233610700217230ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ generic configuration Ms5607PressureC(){ provides interface Read; //You can't use the following interfaces if you're waiting for any readDone provides interface Set as SetPrecision; } implementation{ components new Ms5607RawTemperatureC(), new Ms5607CalibrationC(), new Ms5607RawPressureC(), new Ms5607ConversionPressP(), new Ms5607ConversionDtP(); Read=Ms5607ConversionPressP.Read; SetPrecision=Ms5607RawPressureC; Ms5607ConversionPressP.Get -> Ms5607ConversionDtP; Ms5607ConversionPressP.ReadDt -> Ms5607ConversionDtP; Ms5607ConversionPressP.ReadRawPress -> Ms5607RawPressureC; Ms5607ConversionDtP.ReadRawTemp -> Ms5607RawTemperatureC; Ms5607ConversionDtP.ReadCalib -> Ms5607CalibrationC; } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607RawArbiterP.nc000066400000000000000000000047761207233610700222010ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Ms5607.h" configuration Ms5607RawArbiterP { provides interface Read as ReadTemperature[uint8_t client]; provides interface Read as ReadPressure[uint8_t client]; provides interface ReadRef as ReadCalibration[uint8_t client]; provides interface Resource[uint8_t client]; provides interface Set as SetPrecision; } implementation { components Ms5607C, new FcfsArbiterC(UQ_MS5607_RESOURCE); SetPrecision=Ms5607C; Resource=FcfsArbiterC; components new ReadClientP(uint32_t) as ReadTempClient; ReadTemperature = ReadTempClient; ReadTempClient.ActualRead -> Ms5607C.ReadTemperature; components new ReadClientP(uint32_t) as ReadPresClient; ReadPressure = ReadPresClient; ReadPresClient.ActualRead -> Ms5607C.ReadPressure; components new ReadRefClientP(calibration_t) as ReadCalibClient; ReadCalibration = ReadCalibClient; ReadCalibClient.ActualRead -> Ms5607C.ReadCalibration; } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607RawPressureC.nc000066400000000000000000000041371207233610700223730ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Ms5607.h" generic configuration Ms5607RawPressureC() { provides interface Read; //You can't use the following interface if you're waiting for any readDone provides interface Set as SetPrecision; } implementation { enum { clientid = unique(UQ_MS5607_RESOURCE), }; components Ms5607RawArbiterP, new ResourceReadC(uint32_t); SetPrecision=Ms5607RawArbiterP; Read = ResourceReadC; ResourceReadC.Resource -> Ms5607RawArbiterP.Resource[clientid]; ResourceReadC.Service -> Ms5607RawArbiterP.ReadPressure[clientid]; } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607RawTemperatureC.nc000066400000000000000000000041451207233610700230570ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Ms5607.h" generic configuration Ms5607RawTemperatureC() { provides interface Read; //You can't use the following interface if you're waiting for any readDone provides interface Set as SetPrecision; } implementation { enum { clientid = unique(UQ_MS5607_RESOURCE), }; components Ms5607RawArbiterP, new ResourceReadC(uint32_t); SetPrecision=Ms5607RawArbiterP; Read = ResourceReadC; ResourceReadC.Resource -> Ms5607RawArbiterP.Resource[clientid]; ResourceReadC.Service -> Ms5607RawArbiterP.ReadTemperature[clientid]; } tinyos-2.1.2+dfsg/tos/chips/ms5607/Ms5607TemperatureC.nc000066400000000000000000000043011207233610700223770ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ generic configuration Ms5607TemperatureC(){ provides interface Read; //You can't use the following interfaces if you're waiting for any readDone provides interface Set as SetPrecision; } implementation{ components new Ms5607RawTemperatureC(), new Ms5607CalibrationC(), new Ms5607ConversionDtP(), new Ms5607ConversionTempP(); Read=Ms5607ConversionTempP.Read; SetPrecision=Ms5607RawTemperatureC; Ms5607ConversionTempP.Get -> Ms5607ConversionDtP; Ms5607ConversionTempP.ReadDt -> Ms5607ConversionDtP; Ms5607ConversionDtP.ReadRawTemp -> Ms5607RawTemperatureC; Ms5607ConversionDtP.ReadCalib -> Ms5607CalibrationC; } tinyos-2.1.2+dfsg/tos/chips/ms5607/ReadRefClientP.nc000066400000000000000000000040471207233610700217530ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ generic module ReadRefClientP(typedef type){ provides interface ReadRef[uint8_t client]; uses interface ReadRef as ActualRead; } implementation{ uint8_t client; command error_t ReadRef.read[uint8_t cl](type* readData){ client = cl; return call ActualRead.read(readData); } event void ActualRead.readDone(error_t result, type* value) { signal ReadRef.readDone[client](result, value); } default event void ReadRef.readDone[uint8_t cl](error_t result, type* value){} } tinyos-2.1.2+dfsg/tos/chips/ms5607/ResourceReadC.nc000066400000000000000000000030741207233610700216510ustar00rootroot00000000000000/* $Id: ArbitratedReadC.nc,v 1.6 2008-06-26 04:39:14 regehr Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implement arbitrated access to a Read interface, based on an * underlying arbitrated Resource interface. * * Note that this code does not deal with unexpected events: it assumes * that all events it receives are in response to commands that it * made. See tos/chips/atm128/adc for an example of using ArbitratedReadC * in a safe way. * * @param width_t Width of the underlying Read interface. * * @author David Gay */ generic module ResourceReadC(typedef width_t) @safe() { provides interface Read; uses { interface Read as Service; interface Resource; } } implementation { command error_t Read.read() { return call Resource.request(); } event void Resource.granted() { call Service.read(); } event void Service.readDone(error_t result, width_t data) { call Resource.release(); signal Read.readDone(result, data); } default async command error_t Resource.request() { return FAIL; } default async command error_t Resource.release() { return FAIL; } default event void Read.readDone(error_t result, width_t data) { } default command error_t Service.read() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/ms5607/ResourceReadRefC.nc000066400000000000000000000032411207233610700223020ustar00rootroot00000000000000/* $Id: ArbitratedReadC.nc,v 1.6 2008-06-26 04:39:14 regehr Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implement arbitrated access to a Read interface, based on an * underlying arbitrated Resource interface. * * Note that this code does not deal with unexpected events: it assumes * that all events it receives are in response to commands that it * made. See tos/chips/atm128/adc for an example of using ArbitratedReadC * in a safe way. * * @param width_t Width of the underlying Read interface. * * @author David Gay */ generic module ResourceReadRefC(typedef width_t) @safe() { provides interface ReadRef; uses { interface ReadRef as Service; interface Resource; } } implementation { width_t* currentVal; command error_t ReadRef.read(width_t* val) { currentVal=val; return call Resource.request(); } event void Resource.granted() { call Service.read(currentVal); } event void Service.readDone(error_t result, width_t* data) { call Resource.release(); signal ReadRef.readDone(result, data); } default async command error_t Resource.request() { return FAIL; } default async command error_t Resource.release() { return FAIL; } default event void ReadRef.readDone(error_t result, width_t* data) { } default command error_t Service.read(width_t* data) { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/msp430/000077500000000000000000000000001207233610700167225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/McuSleepC.nc000066400000000000000000000113241207233610700210650ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Implementation of TEP 112 (Microcontroller Power Management) for * the MSP430. Code for low power calculation copied from older * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp. * * * @author Philip Levis * @author Vlado Handziski * @author Joe Polastre * @author Cory Sharp * @date October 26, 2005 * @see Please refer to TEP 112 for more information about this component and its * intended use. * */ module McuSleepC @safe() { provides { interface McuSleep; interface McuPowerState; } uses { interface McuPowerOverride; } } implementation { bool dirty = TRUE; mcu_power_t powerState = MSP430_POWER_ACTIVE; /* Note that the power values are maintained in an order * based on their active components, NOT on their values.*/ // NOTE: This table should be in progmem. const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = { 0, // ACTIVE SR_CPUOFF, // LPM0 SR_SCG0+SR_CPUOFF, // LPM1 SR_SCG1+SR_CPUOFF, // LPM2 SR_SCG1+SR_SCG0+SR_CPUOFF, // LPM3 SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF, // LPM4 }; mcu_power_t getPowerState() { mcu_power_t pState = MSP430_POWER_LPM4; // TimerA, USART0, USART1 check if ((((TACCTL0 & CCIE) || (TACCTL1 & CCIE) || (TACCTL2 & CCIE)) && ((TACTL & TASSEL_3) == TASSEL_2)) || ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) || ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1)) #ifdef __msp430_have_usart0_with_i2c // registers end in "nr" to prevent nesC race condition detection || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) && (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C)) #endif ) pState = MSP430_POWER_LPM1; #ifdef __msp430_have_adc12 // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE if (ADC12CTL0 & ADC12ON){ if (ADC12CTL1 & ADC12SSEL_2){ // sample or conversion operation with MCLK or SMCLK if (ADC12CTL1 & ADC12SSEL_1) pState = MSP430_POWER_LPM1; else pState = MSP430_POWER_ACTIVE; } else if ((ADC12CTL1 & SHS0) && ((TACTL & TASSEL_3) == TASSEL_2)){ // Timer A is used as sample-and-hold source and SMCLK sources Timer A // (Timer A interrupts are always disabled when it is used by the // ADC subsystem, that's why the Timer check above is not enough) pState = MSP430_POWER_LPM1; } } #endif return pState; } void computePowerState() { powerState = mcombine(getPowerState(), call McuPowerOverride.lowestState()); } async command void McuSleep.sleep() { uint16_t temp; if (dirty) { computePowerState(); //dirty = 0; } temp = msp430PowerBits[powerState] | SR_GIE; __asm__ __volatile__( "bis %0, r2" : : "m" (temp) ); // All of memory may change at this point... asm volatile ("" : : : "memory"); __nesc_disable_interrupt(); } async command void McuPowerState.update() { atomic dirty = 1; } default async command mcu_power_t McuPowerOverride.lowestState() { return MSP430_POWER_LPM4; } } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/000077500000000000000000000000001207233610700176145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/AdcP.nc000066400000000000000000000151751207233610700207560ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.8 $ * $Date: 2008-06-27 18:05:23 $ * @author: Jan Hauer * ======================================================================== */ module AdcP @safe() { provides { interface Read as Read[uint8_t client]; interface ReadNow as ReadNow[uint8_t client]; interface Resource as ResourceReadNow[uint8_t client]; } uses { // for Read only: interface Resource as ResourceRead[uint8_t client]; // for ReadNow only: interface Resource as SubResourceReadNow[uint8_t client]; // for Read and ReadNow: interface AdcConfigure as Config[uint8_t client]; interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client]; } } implementation { enum { STATE_READ, STATE_READNOW, STATE_READNOW_INVALID_CONFIG, }; // Resource interface / arbiter makes norace declaration safe norace uint8_t state; norace uint8_t owner; norace uint16_t value; error_t configure(uint8_t client) { error_t result = EINVAL; const msp430adc12_channel_config_t * ONE config; config = call Config.getConfiguration[client](); if (config->inch != INPUT_CHANNEL_NONE) result = call SingleChannel.configureSingle[client](config); return result; } command error_t Read.read[uint8_t client]() { return call ResourceRead.request[client](); } event void ResourceRead.granted[uint8_t client]() { // signalled only for Read.read() error_t result = configure(client); if (result == SUCCESS){ state = STATE_READ; result = call SingleChannel.getData[client](); } else { call ResourceRead.release[client](); signal Read.readDone[client](result, 0); } } async command error_t ResourceReadNow.request[uint8_t nowClient]() { return call SubResourceReadNow.request[nowClient](); } event void SubResourceReadNow.granted[uint8_t nowClient]() { if (configure(nowClient) == SUCCESS) state = STATE_READNOW; else state = STATE_READNOW_INVALID_CONFIG; signal ResourceReadNow.granted[nowClient](); } async command error_t ResourceReadNow.immediateRequest[uint8_t nowClient]() { error_t result = call SubResourceReadNow.immediateRequest[nowClient](); if (result == SUCCESS){ result = configure(nowClient); if (result == SUCCESS) state = STATE_READNOW; } return result; } async command error_t ResourceReadNow.release[uint8_t nowClient]() { return call SubResourceReadNow.release[nowClient](); } async command bool ResourceReadNow.isOwner[uint8_t nowClient]() { return call SubResourceReadNow.isOwner[nowClient](); } async command error_t ReadNow.read[uint8_t nowClient]() { if (state == STATE_READNOW_INVALID_CONFIG) return EINVAL; else return call SingleChannel.getData[nowClient](); } void task readDone() { call ResourceRead.release[owner](); signal Read.readDone[owner](SUCCESS, value); } async event error_t SingleChannel.singleDataReady[uint8_t client](uint16_t data) { switch (state) { case STATE_READ: owner = client; value = data; post readDone(); break; case STATE_READNOW: signal ReadNow.readDone[client](SUCCESS, data); break; default: // error ! break; } return SUCCESS; } async event uint16_t* SingleChannel.multipleDataReady[uint8_t client]( uint16_t *buf, uint16_t numSamples) { // error ! return 0; } default async command error_t ResourceRead.request[uint8_t client]() { return FAIL; } default async command error_t ResourceRead.immediateRequest[uint8_t client]() { return FAIL; } default async command error_t ResourceRead.release[uint8_t client]() { return FAIL; } default async command bool ResourceRead.isOwner[uint8_t client]() { return FALSE; } default event void Read.readDone[uint8_t client]( error_t result, uint16_t val ){} default async command error_t SubResourceReadNow.release[uint8_t nowClient](){ return FAIL;} default async command error_t SubResourceReadNow.request[uint8_t nowClient](){ return FAIL; } default async command bool SubResourceReadNow.isOwner[uint8_t client]() { return FALSE; } default event void ResourceReadNow.granted[uint8_t nowClient](){} default async event void ReadNow.readDone[uint8_t client]( error_t result, uint16_t val ){} default async command error_t SubResourceReadNow.immediateRequest[uint8_t nowClient]() { return FAIL; } default async command error_t SingleChannel.getData[uint8_t client]() { return EINVAL; } const msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; default async command const msp430adc12_channel_config_t* Config.getConfiguration[uint8_t client]() { return &defaultConfig; } default async command error_t SingleChannel.configureSingle[uint8_t client]( const msp430adc12_channel_config_t *config){ return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/AdcReadClientC.nc000066400000000000000000000060231207233610700226640ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:06 $ * @author: Jan Hauer * ======================================================================== */ /** * This component virtualizes the HIL of ADC12 on MSP430. A client must wire * AdcConfigure to a component that returns the client's adc * configuration data. * * @author Jan Hauer * @see Please refer to the README.txt and TEP 101 for more information about * this component and its intended use. */ #include generic configuration AdcReadClientC() { provides interface Read; uses interface AdcConfigure; } implementation { components AdcP, #ifdef REF_VOLT_AUTO_CONFIGURE // if the client configuration requires a stable // reference voltage, the reference voltage generator // is automatically enabled new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient; #else new Msp430Adc12ClientC() as Msp430AdcClient; #endif enum { CLIENT = unique(ADCC_SERVICE), }; Read = AdcP.Read[CLIENT]; AdcConfigure = AdcP.Config[CLIENT]; AdcP.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel; AdcP.ResourceRead[CLIENT] -> Msp430AdcClient.Resource; #ifdef REF_VOLT_AUTO_CONFIGURE AdcConfigure = Msp430AdcClient.AdcConfigure; #endif } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/AdcReadNowClientC.nc000066400000000000000000000061651207233610700233570ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:07 $ * @author: Jan Hauer * ======================================================================== */ /** * This component virtualizes the HIL of ADC12 on MSP430. A client must wire * AdcConfigure to a component that returns the client's adc * configuration data. * * @author Jan Hauer * @see Please refer to the README.txt and TEP 101 for more information about * this component and its intended use. */ #include generic configuration AdcReadNowClientC() { provides { interface Resource; interface ReadNow; } uses interface AdcConfigure; } implementation { components AdcP, #ifdef REF_VOLT_AUTO_CONFIGURE // if the client configuration requires a stable // reference voltage, the reference voltage generator // is automatically enabled new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient; #else new Msp430Adc12ClientC() as Msp430AdcClient; #endif enum { CLIENT = unique(ADCC_SERVICE), }; ReadNow = AdcP.ReadNow[CLIENT]; AdcConfigure = AdcP.Config[CLIENT]; AdcP.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel; Resource = AdcP.ResourceReadNow[CLIENT]; AdcP.SubResourceReadNow[CLIENT] -> Msp430AdcClient.Resource; #ifdef REF_VOLT_AUTO_CONFIGURE AdcConfigure = Msp430AdcClient.AdcConfigure; #endif } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/AdcReadStreamClientC.nc000066400000000000000000000061321207233610700240410ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2008-04-07 09:41:55 $ * @author: Jan Hauer * ======================================================================== */ /** * This component virtualizes the HIL of ADC12 on MSP430. A client must wire * AdcConfigure to a component that returns the client's adc * configuration data. * * @author Jan Hauer * @see Please refer to the README.txt and TEP 101 for more information about * this component and its intended use. */ #include generic configuration AdcReadStreamClientC() { provides interface ReadStream; uses interface AdcConfigure; } implementation { components WireAdcStreamP, #ifdef REF_VOLT_AUTO_CONFIGURE // if the client configuration requires a stable // reference voltage, the reference voltage generator // is automatically enabled new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient; AdcConfigure = Msp430AdcClient.AdcConfigure; #else new Msp430Adc12ClientC() as Msp430AdcClient; #endif enum { RSCLIENT = unique(ADCC_READ_STREAM_SERVICE), }; ReadStream = WireAdcStreamP.ReadStream[RSCLIENT]; AdcConfigure = WireAdcStreamP.AdcConfigure[RSCLIENT]; WireAdcStreamP.Resource[RSCLIENT] -> Msp430AdcClient.Resource; WireAdcStreamP.Msp430Adc12SingleChannel[RSCLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel; } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/AdcStreamP.nc000066400000000000000000000222121207233610700221200ustar00rootroot00000000000000/* $Id: AdcStreamP.nc,v 1.6 2008-11-10 14:56:12 janhauer Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Convert MSP430 HAL A/D interface to the HIL interfaces (adapted atmega code). * @author David Gay * @author Jan Hauer */ #include "Timer.h" module AdcStreamP @safe() { provides { interface Init @atleastonce(); interface ReadStream[uint8_t client]; } uses { interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client]; interface AdcConfigure[uint8_t client]; interface Alarm; } } implementation { enum { NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE) }; /* Resource reservation is required, and it's incorrect to call getData again before dataReady is signaled, so there are no races in correct programs */ norace uint8_t client = NSTREAM; /* Stream data */ struct list_entry_t { uint16_t count; struct list_entry_t * ONE_NOK next; }; struct list_entry_t *bufferQueue[NSTREAM]; struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM]; uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount; norace uint16_t count; norace uint16_t * COUNT_NOK(count) buffer; norace uint16_t * BND_NOK(buffer, buffer+count) pos; norace uint32_t now, period; norace bool periodModified; command error_t Init.init() { uint8_t i; for (i = 0; i != NSTREAM; i++) bufferQueueEnd[i] = &bufferQueue[i]; return SUCCESS; } void sampleSingle() { call SingleChannel.getData[client](); } error_t postBuffer(uint8_t c, uint16_t *buf, uint16_t n) { if (n < sizeof(struct list_entry_t)) return ESIZE; atomic { struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf); if (!bufferQueueEnd[c]) // Can't post right now. return FAIL; newEntry->count = n; newEntry->next = NULL; *bufferQueueEnd[c] = newEntry; bufferQueueEnd[c] = &newEntry->next; } return SUCCESS; } command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) { return postBuffer(c, buf, n); } task void readStreamDone() { uint8_t c = client; uint32_t actualPeriod = period; if (periodModified) actualPeriod = period - (period % 1000); atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](SUCCESS, actualPeriod); } task void readStreamFail() { /* By now, the pending bufferDone has been signaled (see readStream). */ struct list_entry_t *entry; uint8_t c = client; atomic entry = bufferQueue[c]; for (; entry; entry = entry->next) { uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count; signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count); } atomic { bufferQueue[c] = NULL; bufferQueueEnd[c] = &bufferQueue[c]; } client = NSTREAM; signal ReadStream.readDone[c](FAIL, 0); } task void bufferDone() { uint16_t *b, c; atomic { b = lastBuffer; c = lastCount; lastBuffer = NULL; } signal ReadStream.bufferDone[client](SUCCESS, b, c); } void nextAlarm() { call Alarm.startAt(now, period); now += period; } async event void Alarm.fired() { sampleSingle(); } error_t nextBuffer(bool startNextAlarm) { atomic { struct list_entry_t *entry = bufferQueue[client]; if (!entry) { // all done bufferQueueEnd[client] = NULL; // prevent post post readStreamDone(); return FAIL; } else { uint16_t tmp_count; bufferQueue[client] = entry->next; if (!bufferQueue[client]) bufferQueueEnd[client] = &bufferQueue[client]; pos = buffer = NULL; count = entry->count; tmp_count = count; pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry); if (startNextAlarm) nextAlarm(); return SUCCESS; } } } void nextMultiple(uint8_t c) { if (nextBuffer(FALSE) == SUCCESS){ msp430adc12_channel_config_t config = *call AdcConfigure.getConfiguration[c](); config.sampcon_ssel = SAMPCON_SOURCE_SMCLK; // assumption: SMCLK runs at 1 MHz config.sampcon_id = SAMPCON_CLOCK_DIV_1; if (call SingleChannel.configureMultiple[c]( &config, pos, count, period) == SUCCESS) call SingleChannel.getData[c](); else { postBuffer(c, pos, count); post readStreamFail(); } } } command error_t ReadStream.read[uint8_t c](uint32_t usPeriod) { if (usPeriod & 0xFFFF0000){ // "manual" sampling period = usPeriod / 1000; periodModified = TRUE; client = c; now = call Alarm.getNow(); call SingleChannel.configureSingle[c](call AdcConfigure.getConfiguration[c]()); if (nextBuffer(FALSE) == SUCCESS) sampleSingle(); } else { period = usPeriod; periodModified = FALSE; client = c; nextMultiple(c); } return SUCCESS; } async event error_t SingleChannel.singleDataReady[uint8_t streamClient](uint16_t data) { if (client == NSTREAM) return FAIL; if (count == 0) { now = call Alarm.getNow(); nextBuffer(TRUE); } else { *pos++ = data; if (pos == buffer + count) { atomic { if (lastBuffer) { /* We failed to signal bufferDone in time. Fail. */ bufferQueueEnd[client] = NULL; // prevent post post readStreamFail(); return FAIL; } else { lastCount = count; lastBuffer = buffer; } } post bufferDone(); nextBuffer(TRUE); } else nextAlarm(); } return FAIL; } async event uint16_t* SingleChannel.multipleDataReady[uint8_t streamClient]( uint16_t *buf, uint16_t length) { atomic { if (lastBuffer) { /* We failed to signal bufferDone in time. Fail. */ bufferQueueEnd[client] = NULL; // prevent post post readStreamFail(); return 0; } else { lastBuffer = buffer; lastCount = pos - buffer; } } post bufferDone(); nextMultiple(streamClient); return 0; } const msp430adc12_channel_config_t defaultConfig = { inch: SUPPLY_VOLTAGE_HALF_CHANNEL, sref: REFERENCE_VREFplus_AVss, ref2_5v: REFVOLT_LEVEL_1_5, adc12ssel: SHT_SOURCE_ACLK, adc12div: SHT_CLOCK_DIV_1, sht: SAMPLE_HOLD_4_CYCLES, sampcon_ssel: SAMPCON_SOURCE_SMCLK, sampcon_id: SAMPCON_CLOCK_DIV_1 }; default async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration[uint8_t c]() { return &defaultConfig; } default async command error_t SingleChannel.configureMultiple[uint8_t c]( const msp430adc12_channel_config_t *config, uint16_t b[], uint16_t numSamples, uint16_t jiffies) { return FAIL; } default async command error_t SingleChannel.getData[uint8_t c]() { return FAIL; } default async command error_t SingleChannel.configureSingle[uint8_t c]( const msp430adc12_channel_config_t *config){ return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/HplAdc12.nc000066400000000000000000000105261207233610700214400ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2008-05-22 17:45:00 $ * @author: Jan Hauer * ======================================================================== */ /** * The HplAdc12 interface exports low-level access to the ADC12 registers * of the MSP430 MCU. * * @author Jan Hauer * @see Please refer to TEP 101 for more information about this component and its * intended use. */ #include interface HplAdc12 { /** * Sets the ADC12 control register ADC12CTL0. * @param control0 ADC12CTL0 register data. **/ async command void setCtl0(adc12ctl0_t control0); /** * Sets the ADC12 control register ADC12CTL1. * @param control1 ADC12CTL1 register data. **/ async command void setCtl1(adc12ctl1_t control1); /** * Returns the ADC12 control register ADC12CTL0. * @return ADC12CTL0 **/ async command adc12ctl0_t getCtl0(); /** Returns the ADC12 control register ADC12CTL1. * @return ADC12CTL1 **/ async command adc12ctl1_t getCtl1(); /** * Sets the ADC12 conversion memory control register ADC12MCTLx. * @param idx The register index (the 'x' in ADC12MCTLx) [0..15] * @param memControl ADC12MCTLx register data. */ async command void setMCtl(uint8_t idx, adc12memctl_t memControl); /** * Returns the ADC12 conversion memory control register ADC12MCTLx. * @param idx The register index (the 'x' in ADC12MCTLx) [0..15] * @return memControl ADC12MCTLx register data. */ async command adc12memctl_t getMCtl(uint8_t idx); /** * Returns the ADC12 conversion memory register ADC12MEMx. * @param idx The register index (the 'x' in ADC12MEMx) [0..15] * @return ADC12MEMx */ async command uint16_t getMem(uint8_t idx); /** * Sets the ADC12 interrupt enable register, ADC12IE. * @param mask Bitmask (0 means interrupt disabled, 1 menas interrupt enabled) */ async command void setIEFlags(uint16_t mask); /** * Returns the ADC12 interrupt enable register, ADC12IE. * @return ADC12IE */ async command uint16_t getIEFlags(); /** * Resets the ADC12 interrupt flag register, ADC12IFG. */ async command void resetIFGs(); /** * Signals a conversion result. * @param iv ADC12 interrupt vector value 0x6, 0x8, ... , 0x24 */ async event void conversionDone(uint16_t iv); /** * Returns the ADC12 BUSY flag. * @return ADC12BUSY */ async command bool isBusy(); /** * Stops a conversion. */ async command void stopConversion(); /** * Starts a conversion. */ async command void startConversion(); /** * Enables conversion (sets the ENC bit). */ async command void enableConversion(); } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/HplAdc12P.nc000066400000000000000000000103331207233610700215540ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.9 $ * $Date: 2009-10-17 11:48:33 $ * @author: Jan Hauer * ======================================================================== */ /** * The HplAdc12 interface exports low-level access to the ADC12 registers * of the MSP430 MCU. * * @author Jan Hauer * @see Please refer to TEP 101 for more information about this component and its * intended use. */ module HplAdc12P { provides interface HplAdc12; } implementation { MSP430REG_NORACE(ADC12CTL0); MSP430REG_NORACE(ADC12CTL1); MSP430REG_NORACE(ADC12IFG); MSP430REG_NORACE(ADC12IE); MSP430REG_NORACE(ADC12IV); DEFINE_UNION_CAST(int2adc12ctl0,adc12ctl0_t,uint16_t) DEFINE_UNION_CAST(int2adc12ctl1,adc12ctl1_t,uint16_t) DEFINE_UNION_CAST(adc12ctl0cast2int,uint16_t,adc12ctl0_t) DEFINE_UNION_CAST(adc12ctl1cast2int,uint16_t,adc12ctl1_t) DEFINE_UNION_CAST(adc12memctl2int,uint8_t,adc12memctl_t) DEFINE_UNION_CAST(int2adc12memctl,adc12memctl_t,uint8_t) async command void HplAdc12.setCtl0(adc12ctl0_t control0){ ADC12CTL0 = adc12ctl0cast2int(control0); } async command void HplAdc12.setCtl1(adc12ctl1_t control1){ ADC12CTL1 = adc12ctl1cast2int(control1); } async command adc12ctl0_t HplAdc12.getCtl0(){ return int2adc12ctl0(ADC12CTL0); } async command adc12ctl1_t HplAdc12.getCtl1(){ return int2adc12ctl1(ADC12CTL1); } async command void HplAdc12.setMCtl(uint8_t i, adc12memctl_t memCtl){ ADC12MCTL[i] = adc12memctl2int(memCtl); } async command adc12memctl_t HplAdc12.getMCtl(uint8_t i){ return int2adc12memctl(ADC12MCTL[i]); } async command uint16_t HplAdc12.getMem(uint8_t i){ return ADC12MEM[i]; } async command void HplAdc12.setIEFlags(uint16_t mask){ ADC12IE = mask; } async command uint16_t HplAdc12.getIEFlags(){ return ADC12IE; } async command void HplAdc12.resetIFGs(){ ADC12IV = 0; ADC12IFG = 0; } async command void HplAdc12.startConversion(){ ADC12CTL0 |= ADC12ON; ADC12CTL0 |= (ADC12SC + ENC); } async command void HplAdc12.stopConversion(){ // stop conversion mode immediately, conversion data is unreliable uint16_t ctl1 = ADC12CTL1; ADC12CTL1 &= ~(CONSEQ0 | CONSEQ1); ADC12CTL0 &= ~(ADC12SC + ENC); ADC12CTL0 &= ~(ADC12ON); ADC12CTL1 |= (ctl1 & (CONSEQ0 | CONSEQ1)); } async command void HplAdc12.enableConversion(){ ADC12CTL0 |= ENC; } async command bool HplAdc12.isBusy(){ return (ADC12CTL1 & ADC12BUSY); } TOSH_SIGNAL(ADC12_VECTOR) { signal HplAdc12.conversionDone(ADC12IV); } } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12.h000066400000000000000000000222011207233610700215230ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2007-06-25 15:47:14 $ * @author: Jan Hauer * ======================================================================== */ #ifndef MSP430ADC12_H #define MSP430ADC12_H #include "Msp430RefVoltGenerator.h" #define ADC12_TIMERA_ENABLED #define ADC12_P6PIN_AUTO_CONFIGURE #define ADC12_CHECK_ARGS //#define ADC12_ONLY_WITH_DMA // for HIL clients #define REF_VOLT_AUTO_CONFIGURE typedef struct { // see README.txt unsigned int inch: 4; // input channel unsigned int sref: 3; // reference voltage unsigned int ref2_5v: 1; // reference voltage level unsigned int adc12ssel: 2; // clock source sample-hold-time unsigned int adc12div: 3; // clock divider sample-hold-time unsigned int sht: 4; // sample-hold-time unsigned int sampcon_ssel: 2; // clock source sampcon signal unsigned int sampcon_id: 2; // clock divider sampcon unsigned int : 0; // align to a word boundary } msp430adc12_channel_config_t; typedef struct { // see README.txt volatile unsigned inch: 4, // input channel sref: 3, // reference voltage eos: 1; // end of sequence flag } __attribute__ ((packed)) adc12memctl_t; enum inch_enum { // see device specific data sheet which pin Ax is mapped to INPUT_CHANNEL_A0 = 0, // input channel A0 INPUT_CHANNEL_A1 = 1, // input channel A1 INPUT_CHANNEL_A2 = 2, // input channel A2 INPUT_CHANNEL_A3 = 3, // input channel A3 INPUT_CHANNEL_A4 = 4, // input channel A4 INPUT_CHANNEL_A5 = 5, // input channel A5 INPUT_CHANNEL_A6 = 6, // input channel A6 INPUT_CHANNEL_A7 = 7, // input channel A7 EXTERNAL_REF_VOLTAGE_CHANNEL = 8, // VeREF+ (input channel 8) REF_VOLTAGE_NEG_TERMINAL_CHANNEL = 9, // VREF-/VeREF- (input channel 9) TEMPERATURE_DIODE_CHANNEL = 10, // Temperature diode (input channel 10) SUPPLY_VOLTAGE_HALF_CHANNEL = 11, // (AVcc-AVss)/2 (input channel 11-15) INPUT_CHANNEL_NONE = 12 // illegal (identifies invalid settings) }; enum sref_enum { REFERENCE_AVcc_AVss = 0, // VR+ = AVcc and VR-= AVss REFERENCE_VREFplus_AVss = 1, // VR+ = VREF+ and VR-= AVss REFERENCE_VeREFplus_AVss = 2, // VR+ = VeREF+ and VR-= AVss REFERENCE_AVcc_VREFnegterm = 4, // VR+ = AVcc and VR-= VREF-/VeREF- REFERENCE_VREFplus_VREFnegterm = 5, // VR+ = VREF+ and VR-= VREF-/VeREF- REFERENCE_VeREFplus_VREFnegterm = 6 // VR+ = VeREF+ and VR-= VREF-/VeREF- }; enum ref2_5v_enum { REFVOLT_LEVEL_1_5 = 0, // reference voltage of 1.5 V REFVOLT_LEVEL_2_5 = 1, // reference voltage of 2.5 V REFVOLT_LEVEL_NONE = 0, // if e.g. AVcc is chosen }; enum adc12ssel_enum { SHT_SOURCE_ADC12OSC = 0, // ADC12OSC SHT_SOURCE_ACLK = 1, // ACLK SHT_SOURCE_MCLK = 2, // MCLK SHT_SOURCE_SMCLK = 3 // SMCLK }; enum adc12div_enum { SHT_CLOCK_DIV_1 = 0, // ADC12 clock divider of 1 SHT_CLOCK_DIV_2 = 1, // ADC12 clock divider of 2 SHT_CLOCK_DIV_3 = 2, // ADC12 clock divider of 3 SHT_CLOCK_DIV_4 = 3, // ADC12 clock divider of 4 SHT_CLOCK_DIV_5 = 4, // ADC12 clock divider of 5 SHT_CLOCK_DIV_6 = 5, // ADC12 clock divider of 6 SHT_CLOCK_DIV_7 = 6, // ADC12 clock divider of 7 SHT_CLOCK_DIV_8 = 7, // ADC12 clock divider of 8 }; enum sht_enum { SAMPLE_HOLD_4_CYCLES = 0, // sampling duration is 4 clock cycles SAMPLE_HOLD_8_CYCLES = 1, // ... SAMPLE_HOLD_16_CYCLES = 2, SAMPLE_HOLD_32_CYCLES = 3, SAMPLE_HOLD_64_CYCLES = 4, SAMPLE_HOLD_96_CYCLES = 5, SAMPLE_HOLD_128_CYCLES = 6, SAMPLE_HOLD_192_CYCLES = 7, SAMPLE_HOLD_256_CYCLES = 8, SAMPLE_HOLD_384_CYCLES = 9, SAMPLE_HOLD_512_CYCLES = 10, SAMPLE_HOLD_768_CYCLES = 11, SAMPLE_HOLD_1024_CYCLES = 12 }; enum sampcon_ssel_enum { SAMPCON_SOURCE_TACLK = 0, // Timer A clock source is (external) TACLK SAMPCON_SOURCE_ACLK = 1, // Timer A clock source ACLK SAMPCON_SOURCE_SMCLK = 2, // Timer A clock source SMCLK SAMPCON_SOURCE_INCLK = 3, // Timer A clock source is (external) INCLK }; enum sampcon_id_enum { SAMPCON_CLOCK_DIV_1 = 0, // SAMPCON clock divider of 1 SAMPCON_CLOCK_DIV_2 = 1, // SAMPCON clock divider of 2 SAMPCON_CLOCK_DIV_4 = 2, // SAMPCON clock divider of 4 SAMPCON_CLOCK_DIV_8 = 3, // SAMPCON clock divider of 8 }; // The unique string for allocating ADC resource interfaces #define MSP430ADC12_RESOURCE "Msp430Adc12C.Resource" // The unique string for accessing HAL2 #define ADCC_SERVICE "AdcC.Service" // The unique string for accessing HAL2 via ReadStream #define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client" #ifdef __MSP430_TI_HEADERS__ //#if __GNUC__ >= 4 // "The bitfield structures that overlay peripheral registers are not part of // mspgcc in the future; the recommended way of accessing those fields is to // use the masks defined in the TI headers." // (http://www.millennium.berkeley.edu/pipermail/tinyos-devel/2011-March/004804.html) // // Until the ADC driver is updated our temporary workaround is to re-define the // bitfield structures and continue using them when accessing peripheral // registers via the DEFINE_UNION_CAST (the same is done in the MSP430 Timer // and USART drivers). It has been verified that the definitions of the ADC12 // flags has not changed over the different MSP430 chip variants that have an // ADC12, i.e. using common structs is safe (verified for the header files // installed via package msp430mcu-tinyos version 20110613-20110821). // (http://mail.millennium.berkeley.edu/pipermail/tinyos-2.0wg/2011-August/003861.html) typedef struct { volatile unsigned adc12sc:1, enc:1, adc12tovie:1, adc12ovie:1, adc12on:1, refon:1, r2_5v:1, msc:1, sht0:4, sht1:4; volatile unsigned int : 0; // align to word boundary (saves significant amount of code) } __attribute__ ((packed)) adc12ctl0_t; typedef struct { volatile unsigned adc12busy:1, conseq:2, adc12ssel:2, adc12div:3, issh:1, shp:1, shs:2, cstartadd:4; volatile unsigned int : 0; // align to word boundary (saves significant amount of code) } __attribute__ ((packed)) adc12ctl1_t; #else /* Test for GCC bug (bitfield access) - only version 3.2.3 is known to be stable */ #define GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__ * 10 + __GNUC_PATCHLEVEL__) #if GCC_VERSION == 332 #error "This msp430-gcc version (3.3.2) is known to contain a bug when accessing bitfield structs." #elif GCC_VERSION != 323 #warning "This version of msp430-gcc might contain a bug when accessing bitfield structs (version 3.2.3 is safe - anything else is on your own risk)" #endif #endif #if !defined(__msp430_have_adc12) && !defined(__MSP430_HAS_ADC12__) #error Target msp430 device does not have ADC12 module #endif #endif tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12ClientAutoDMAC.nc000066400000000000000000000053411207233610700243170ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.7 $ * $Date: 2008-06-11 00:42:13 $ * @author: Jan Hauer * ======================================================================== */ /** * This component virtualizes access to the HAL of the MSP430 ADC12. ADC * conversion results are copied using DMA. * * @author Jan Hauer * * @see Please refer to the README.txt and TEP 101 for more information about * this component and its intended use. */ #include generic configuration Msp430Adc12ClientAutoDMAC() { provides { interface Resource; interface Msp430Adc12SingleChannel; interface Msp430Adc12Overflow; } } implementation { components Msp430DmaC, Msp430Adc12DMAP, Msp430Adc12P, Msp430Adc12DMAWireC; enum { ID = unique(MSP430ADC12_RESOURCE), }; Resource = Msp430Adc12P.Resource[ID]; Msp430Adc12SingleChannel = Msp430Adc12DMAP.SingleChannel[ID]; Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID]; Msp430Adc12DMAP.SubSingleChannel[ID] -> Msp430Adc12P.SingleChannel[ID]; Msp430Adc12DMAP.AsyncAdcControl[ID] -> Msp430Adc12P.DMAExtension[ID]; } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12ClientAutoDMA_RVGC.nc000066400000000000000000000061751207233610700250430ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.8 $ $Date: 2008-06-11 00:42:13 $ @author: Jan Hauer * * ======================================================================== */ /** * This component virtualizes access to the HAL of the MSP430 ADC12. ADC * conversion results are copied using DMA and reference voltage is enabled as * required by the configuration. * * @author Jan Hauer * * @see Please refer to the README.txt and TEP 101 for more information about * this component and its intended use. */ #include generic configuration Msp430Adc12ClientAutoDMA_RVGC() { provides { interface Resource; interface Msp430Adc12SingleChannel; interface Msp430Adc12Overflow; } uses interface AdcConfigure; } implementation { components Msp430Adc12P, Msp430RefVoltArbiterP, Msp430Adc12DMAWireC; enum { ID = unique(MSP430ADC12_RESOURCE), }; Resource = Msp430RefVoltArbiterP.ClientResource[ID]; Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID]; Msp430RefVoltArbiterP.AdcResource[ID] -> Msp430Adc12P.Resource[ID]; components new Msp430Adc12ConfAlertC(); AdcConfigure = Msp430Adc12ConfAlertC.ConfUp; Msp430RefVoltArbiterP.Config[ID] -> Msp430Adc12ConfAlertC.ConfSub; components Msp430DmaC, Msp430Adc12DMAP; Msp430Adc12SingleChannel = Msp430Adc12DMAP.SingleChannel[ID]; Msp430Adc12DMAP.SubSingleChannel[ID] -> Msp430Adc12P.SingleChannel[ID]; Msp430Adc12DMAP.AsyncAdcControl[ID] -> Msp430Adc12P.DMAExtension[ID]; } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12ClientAutoRVGC.nc000066400000000000000000000057301207233610700243560ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.8 $ $Date: 2008-06-11 00:42:13 $ @author: Jan Hauer * * ======================================================================== */ /** * This component virtualizes access to the HAL of the MSP430 ADC12. * Reference voltage is enabled automatically as required by the configuration. * * @author Jan Hauer * * @see Please refer to the README.txt and TEP 101 for more information about * this component and its intended use. */ #include generic configuration Msp430Adc12ClientAutoRVGC() { provides { interface Resource; interface Msp430Adc12SingleChannel; interface Msp430Adc12MultiChannel; interface Msp430Adc12Overflow; } uses interface AdcConfigure; } implementation { components Msp430Adc12P, Msp430RefVoltArbiterP; enum { ID = unique(MSP430ADC12_RESOURCE), }; Resource = Msp430RefVoltArbiterP.ClientResource[ID]; Msp430Adc12SingleChannel = Msp430Adc12P.SingleChannel[ID]; Msp430Adc12MultiChannel = Msp430Adc12P.MultiChannel[ID]; Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID]; Msp430RefVoltArbiterP.AdcResource[ID] -> Msp430Adc12P.Resource[ID]; components new Msp430Adc12ConfAlertC(); AdcConfigure = Msp430Adc12ConfAlertC.ConfUp; Msp430RefVoltArbiterP.Config[ID] -> Msp430Adc12ConfAlertC.ConfSub; } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12ClientC.nc000066400000000000000000000051021207233610700231370ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2008-06-11 00:42:13 $ * @author: Jan Hauer * ======================================================================== */ /** * This component virtualizes access to the HAL of the MSP430 ADC12. * * @author Jan Hauer * * @see Please refer to the README.txt and TEP 101 for more information about * this component and its intended use. */ #include generic configuration Msp430Adc12ClientC() { provides { interface Resource; interface Msp430Adc12SingleChannel; interface Msp430Adc12MultiChannel; interface Msp430Adc12Overflow; } } implementation { components Msp430Adc12P; enum { ID = unique(MSP430ADC12_RESOURCE), }; Resource = Msp430Adc12P.Resource[ID]; Msp430Adc12SingleChannel = Msp430Adc12P.SingleChannel[ID]; Msp430Adc12MultiChannel = Msp430Adc12P.MultiChannel[ID]; Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID]; } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12ConfAlertC.nc000066400000000000000000000046751207233610700236140ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ $Date: 2008-06-11 00:42:13 $ @author: Jan Hauer * * ======================================================================== */ /** * The only purpose of this component is to generate a nesC warning * if someone has wired to Msp430Adc12ClientAutoRVGC or * Msp430Adc12ClientAutoDMA_RVGC and forgotten to wire to AdcConfigure. * (nesC optimizes all of its code away). * * @author: Jan Hauer */ #include generic module Msp430Adc12ConfAlertC() { provides interface AdcConfigure as ConfSub; uses interface AdcConfigure as ConfUp; } implementation { async command const msp430adc12_channel_config_t* ConfSub.getConfiguration() { return call ConfUp.getConfiguration(); } } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc000066400000000000000000000160421207233610700223440ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2008-06-23 20:25:15 $ * @author: Jan Hauer * ======================================================================== */ #include #include module Msp430Adc12DMAP @safe() { provides { interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; } uses { interface Msp430DmaControl as DMAControl; interface Msp430DmaChannel as DMAChannel; interface Msp430Adc12SingleChannel as SubSingleChannel[uint8_t id]; interface AsyncStdControl as AsyncAdcControl[uint8_t id]; } } implementation { enum { MULTIPLE_SINGLE, MULTIPLE_REPEAT, MULTIPLE_SINGLE_AGAIN, }; // norace declarations are safe here, because Msp430Adc12P.nc implements // a lock mechanism which guarantees that no two clients can access the ADC // and the module variables below are only changed after the lock was acquired norace uint8_t client; norace uint8_t mode; norace uint16_t *buffer; norace uint16_t numSamples; async command error_t SingleChannel.configureSingle[uint8_t id]( const msp430adc12_channel_config_t *config) { // don't use DMA for single conversions return call SubSingleChannel.configureSingle[id](config); } async command error_t SingleChannel.configureSingleRepeat[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t jiffies) { // don't use DMA for single conversions return call SubSingleChannel.configureSingleRepeat[id](config, jiffies); } error_t configure(uint8_t id, const msp430adc12_channel_config_t *config, uint16_t *buf, uint16_t length, uint16_t jiffies, uint8_t _mode) { // for multiple samples single-channel repat-conversion mode // is used, because then there is only one interrupt at the // the end of the whole sequence and DMA has done all the copying error_t result = call SubSingleChannel.configureSingleRepeat[id](config, jiffies); if (result == SUCCESS){ call DMAControl.init(); call DMAControl.setFlags(ENABLE_NMI, NOT_ROUND_ROBIN, ON_FETCH); call DMAChannel.setupTransfer( DMA_SINGLE_TRANSFER, DMA_TRIGGER_ADC12IFGx, DMA_EDGE_SENSITIVE, (void*) ADC12MEM_, buf, length, DMA_WORD, DMA_WORD, DMA_ADDRESS_UNCHANGED, DMA_ADDRESS_INCREMENTED ); call DMAChannel.startTransfer(); client = id; mode = _mode; buffer = buf; numSamples = length; call AsyncAdcControl.start[id](); } return result; } async command error_t SingleChannel.configureMultiple[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t *buf, uint16_t length, uint16_t jiffies) { return configure(id, config, buf, length, jiffies, MULTIPLE_SINGLE); } async command error_t SingleChannel.configureMultipleRepeat[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t *buf, uint8_t length, uint16_t jiffies) { return configure(id, config, buf, length, jiffies, MULTIPLE_REPEAT); } async command error_t SingleChannel.getData[uint8_t id]() { if (mode == MULTIPLE_SINGLE_AGAIN) call DMAChannel.repeatTransfer((void*) ADC12MEM_, buffer, numSamples); return call SubSingleChannel.getData[id](); } async event error_t SubSingleChannel.singleDataReady[uint8_t id](uint16_t data) { // forward (only signalled if not in DMA mode) return signal SingleChannel.singleDataReady[id](data); } async event uint16_t* SubSingleChannel.multipleDataReady[uint8_t id](uint16_t buf[], uint16_t num) { // will never get here return 0; } async event void DMAChannel.transferDone(error_t success) { uint8_t oldMode = mode; uint16_t *new_buffer; if (oldMode != MULTIPLE_REPEAT){ call AsyncAdcControl.stop[client](); mode = MULTIPLE_SINGLE_AGAIN; } new_buffer = signal SingleChannel.multipleDataReady[client](buffer, numSamples); if (oldMode == MULTIPLE_REPEAT) { if (new_buffer) { buffer = new_buffer; call DMAChannel.repeatTransfer((void*) ADC12MEM_, buffer, numSamples); } else call AsyncAdcControl.stop[client](); } } default async command error_t SubSingleChannel.configureSingle[uint8_t id]( const msp430adc12_channel_config_t *config) { return FAIL; } default async command error_t SubSingleChannel.configureSingleRepeat[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t jiffies) { return FAIL; } default async command error_t SubSingleChannel.configureMultiple[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t buf[], uint16_t num, uint16_t jiffies) { return FAIL; } default async command error_t SubSingleChannel.configureMultipleRepeat[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t buf[], uint8_t num, uint16_t jiffies) { return FAIL; } default async command error_t SubSingleChannel.getData[uint8_t id]() { return FAIL;} default async event error_t SingleChannel.singleDataReady[uint8_t id]( uint16_t data) { return FAIL; } default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id]( uint16_t buf[], uint16_t num) { return 0;} default async command error_t AsyncAdcControl.stop[uint8_t id]() { return FAIL; } default async command error_t AsyncAdcControl.start[uint8_t id]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12DMAWireC.nc000066400000000000000000000040701207233610700231540ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-04-07 09:41:55 $ * @author: Jan Hauer * ======================================================================== */ configuration Msp430Adc12DMAWireC { } implementation { components Msp430DmaC, Msp430Adc12DMAP; Msp430Adc12DMAP.DMAControl -> Msp430DmaC.Control; Msp430Adc12DMAP.DMAChannel -> Msp430DmaC.Channel2; #warning Accessing DMA.channel2 for ADC12 } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc000066400000000000000000000511341207233610700226450ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.14 $ * $Date: 2008-11-10 14:56:12 $ * @author: Jan Hauer * ======================================================================== */ #include module Msp430Adc12ImplP @safe() { provides { interface Init; interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; interface Msp430Adc12Overflow as Overflow[uint8_t id]; interface AsyncStdControl as DMAExtension[uint8_t id]; } uses { interface ArbiterInfo as ADCArbiterInfo; interface HplAdc12; interface Msp430Timer as TimerA;; interface Msp430TimerControl as ControlA0; interface Msp430TimerControl as ControlA1; interface Msp430Compare as CompareA0; interface Msp430Compare as CompareA1; interface HplMsp430GeneralIO as Port60; interface HplMsp430GeneralIO as Port61; interface HplMsp430GeneralIO as Port62; interface HplMsp430GeneralIO as Port63; interface HplMsp430GeneralIO as Port64; interface HplMsp430GeneralIO as Port65; interface HplMsp430GeneralIO as Port66; interface HplMsp430GeneralIO as Port67; } } implementation { #ifdef ADC12_TIMERA_ENABLED #warning Accessing TimerA for ADC12 #endif enum { SINGLE_DATA = 1, SINGLE_DATA_REPEAT = 2, MULTIPLE_DATA = 4, MULTIPLE_DATA_REPEAT = 8, MULTI_CHANNEL = 16, CONVERSION_MODE_MASK = 0x1F, ADC_BUSY = 32, /* request pending */ USE_TIMERA = 64, /* TimerA used for SAMPCON signal */ ADC_OVERFLOW = 128, }; uint8_t state; /* see enum above */ uint16_t resultBufferLength; /* length of buffer */ uint16_t *COUNT_NOK(resultBufferLength) resultBufferStart; uint16_t resultBufferIndex; /* offset into buffer */ uint8_t numChannels; /* number of channels (multi-channel conversion) */ uint8_t clientID; /* ID of client that called getData() */ command error_t Init.init() { adc12ctl0_t ctl0; atomic { // stop any ongoing conversion (conversion data -if any- is unreliable) call HplAdc12.stopConversion(); // clear pending interrupt flags (potential relict from SW reset / PUC) call HplAdc12.resetIFGs(); ctl0 = call HplAdc12.getCtl0(); ctl0.adc12tovie = 1; ctl0.adc12ovie = 1; call HplAdc12.setCtl0(ctl0); } return SUCCESS; } void prepareTimerA(uint16_t interval, uint16_t csSAMPCON, uint16_t cdSAMPCON) { #ifdef ADC12_TIMERA_ENABLED msp430_compare_control_t ccResetSHI = { ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; call TimerA.setMode(MSP430TIMER_STOP_MODE); call TimerA.clear(); call TimerA.disableEvents(); call TimerA.setClockSource(csSAMPCON); call TimerA.setInputDivider(cdSAMPCON); call ControlA0.setControl(ccResetSHI); call CompareA0.setEvent(interval-1); call CompareA1.setEvent((interval-1)/2); #endif } void startTimerA() { #ifdef ADC12_TIMERA_ENABLED msp430_compare_control_t ccSetSHI = { ccifg : 0, cov : 0, out : 1, cci : 0, ccie : 0, outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; msp430_compare_control_t ccResetSHI = { ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; msp430_compare_control_t ccRSOutmod = { ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0, outmod : 7, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 }; // manually trigger first conversion, then switch to Reset/set conversionMode call ControlA1.setControl(ccResetSHI); call ControlA1.setControl(ccSetSHI); //call ControlA1.setControl(ccResetSHI); call ControlA1.setControl(ccRSOutmod); call TimerA.setMode(MSP430TIMER_UP_MODE); // go! #endif } void configureAdcPin( uint8_t inch ) { #ifdef ADC12_P6PIN_AUTO_CONFIGURE switch (inch) { case 0: call Port60.selectModuleFunc(); call Port60.makeInput(); break; case 1: call Port61.selectModuleFunc(); call Port61.makeInput(); break; case 2: call Port62.selectModuleFunc(); call Port62.makeInput(); break; case 3: call Port63.selectModuleFunc(); call Port63.makeInput(); break; case 4: call Port64.selectModuleFunc(); call Port64.makeInput(); break; case 5: call Port65.selectModuleFunc(); call Port65.makeInput(); break; case 6: call Port66.selectModuleFunc(); call Port66.makeInput(); break; case 7: call Port67.selectModuleFunc(); call Port67.makeInput(); break; } #endif } void resetAdcPin( uint8_t inch ) { #ifdef ADC12_P6PIN_AUTO_CONFIGURE switch (inch) { case 0: call Port60.selectIOFunc(); break; case 1: call Port61.selectIOFunc(); break; case 2: call Port62.selectIOFunc(); break; case 3: call Port63.selectIOFunc(); break; case 4: call Port64.selectIOFunc(); break; case 5: call Port65.selectIOFunc(); break; case 6: call Port66.selectIOFunc(); break; case 7: call Port67.selectIOFunc(); break; } #endif } async command error_t SingleChannel.configureSingle[uint8_t id]( const msp430adc12_channel_config_t *config) { error_t result = ERESERVE; #ifdef ADC12_CHECK_ARGS if (!config) return EINVAL; #endif atomic { if (state & ADC_BUSY) return EBUSY; if (call ADCArbiterInfo.userId() == id){ adc12ctl1_t ctl1 = { adc12busy: 0, conseq: 0, adc12ssel: config->adc12ssel, adc12div: config->adc12div, issh: 0, shp: 1, shs: 0, cstartadd: 0 }; adc12memctl_t memctl = { inch: config->inch, sref: config->sref, eos: 1 }; adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); ctl0.msc = 1; ctl0.sht0 = config->sht; ctl0.sht1 = config->sht; state = SINGLE_DATA; call HplAdc12.setCtl0(ctl0); call HplAdc12.setCtl1(ctl1); call HplAdc12.setMCtl(0, memctl); call HplAdc12.setIEFlags(0x01); result = SUCCESS; } } return result; } async command error_t SingleChannel.configureSingleRepeat[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t jiffies) { error_t result = ERESERVE; #ifdef ADC12_CHECK_ARGS #ifndef ADC12_TIMERA_ENABLED if (jiffies>0) return EINVAL; #endif if (!config || jiffies == 1 || jiffies == 2) return EINVAL; #endif atomic { if (state & ADC_BUSY) return EBUSY; if (call ADCArbiterInfo.userId() == id) { adc12ctl1_t ctl1 = { adc12busy: 0, conseq: 2, adc12ssel: config->adc12ssel, adc12div: config->adc12div, issh: 0, shp: 1, shs: (jiffies == 0) ? 0 : 1, cstartadd: 0 }; adc12memctl_t memctl = { inch: config->inch, sref: config->sref, eos: 1 }; adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); ctl0.msc = (jiffies == 0) ? 1 : 0; ctl0.sht0 = config->sht; ctl0.sht1 = config->sht; state = SINGLE_DATA_REPEAT; call HplAdc12.setCtl0(ctl0); call HplAdc12.setCtl1(ctl1); call HplAdc12.setMCtl(0, memctl); call HplAdc12.setIEFlags(0x01); if (jiffies){ state |= USE_TIMERA; prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id); } result = SUCCESS; } } return result; } async command error_t SingleChannel.configureMultiple[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t *buf, uint16_t length, uint16_t jiffies) { error_t result = ERESERVE; #ifdef ADC12_CHECK_ARGS #ifndef ADC12_TIMERA_ENABLED if (jiffies>0) return EINVAL; #endif if (!config || !buf || !length || jiffies == 1 || jiffies == 2) return EINVAL; #endif atomic { if (state & ADC_BUSY) return EBUSY; if (call ADCArbiterInfo.userId() == id){ adc12ctl1_t ctl1 = { adc12busy: 0, conseq: (length > 16) ? 3 : 1, adc12ssel: config->adc12ssel, adc12div: config->adc12div, issh: 0, shp: 1, shs: (jiffies == 0) ? 0 : 1, cstartadd: 0 }; adc12memctl_t memctl = { inch: config->inch, sref: config->sref, eos: 0 }; uint16_t i, mask = 1; adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); ctl0.msc = (jiffies == 0) ? 1 : 0; ctl0.sht0 = config->sht; ctl0.sht1 = config->sht; state = MULTIPLE_DATA; resultBufferStart = NULL; resultBufferLength = length; resultBufferStart = buf; resultBufferIndex = 0; call HplAdc12.setCtl0(ctl0); call HplAdc12.setCtl1(ctl1); for (i=0; i<(length-1) && i < 15; i++) call HplAdc12.setMCtl(i, memctl); memctl.eos = 1; call HplAdc12.setMCtl(i, memctl); call HplAdc12.setIEFlags(mask << i); if (jiffies){ state |= USE_TIMERA; prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id); } result = SUCCESS; } } return result; } async command error_t SingleChannel.configureMultipleRepeat[uint8_t id]( const msp430adc12_channel_config_t *config, uint16_t *buf, uint8_t length, uint16_t jiffies) { error_t result = ERESERVE; #ifdef ADC12_CHECK_ARGS #ifndef ADC12_TIMERA_ENABLED if (jiffies>0) return EINVAL; #endif if (!config || !buf || !length || length > 16 || jiffies == 1 || jiffies == 2) return EINVAL; #endif atomic { if (state & ADC_BUSY) return EBUSY; if (call ADCArbiterInfo.userId() == id){ adc12ctl1_t ctl1 = { adc12busy: 0, conseq: 3, adc12ssel: config->adc12ssel, adc12div: config->adc12div, issh: 0, shp: 1, shs: (jiffies == 0) ? 0 : 1, cstartadd: 0 }; adc12memctl_t memctl = { inch: config->inch, sref: config->sref, eos: 0 }; uint16_t i, mask = 1; adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); ctl0.msc = (jiffies == 0) ? 1 : 0; ctl0.sht0 = config->sht; ctl0.sht1 = config->sht; state = MULTIPLE_DATA_REPEAT; resultBufferStart = NULL; resultBufferLength = length; resultBufferStart = buf; resultBufferIndex = 0; call HplAdc12.setCtl0(ctl0); call HplAdc12.setCtl1(ctl1); for (i=0; i<(length-1) && i < 15; i++) call HplAdc12.setMCtl(i, memctl); memctl.eos = 1; call HplAdc12.setMCtl(i, memctl); call HplAdc12.setIEFlags(mask << i); if (jiffies){ state |= USE_TIMERA; prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id); } result = SUCCESS; } } return result; } async command error_t SingleChannel.getData[uint8_t id]() { atomic { if (call ADCArbiterInfo.userId() == id){ if ((state & MULTIPLE_DATA_REPEAT) && !resultBufferStart) return EINVAL; if (state & ADC_BUSY) return EBUSY; state |= ADC_BUSY; clientID = id; configureAdcPin((call HplAdc12.getMCtl(0)).inch); call HplAdc12.startConversion(); if (state & USE_TIMERA) startTimerA(); return SUCCESS; } } return FAIL; } async command error_t MultiChannel.configure[uint8_t id]( const msp430adc12_channel_config_t *config, adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buf, uint16_t numSamples, uint16_t jiffies) { error_t result = ERESERVE; #ifdef ADC12_CHECK_ARGS #ifndef ADC12_TIMERA_ENABLED if (jiffies>0) return EINVAL; #endif if (!config || !memctl || !numMemctl || numMemctl > 15 || !numSamples || !buf || jiffies == 1 || jiffies == 2 || numSamples % (numMemctl+1) != 0) return EINVAL; #endif atomic { if (state & ADC_BUSY) return EBUSY; if (call ADCArbiterInfo.userId() == id){ adc12ctl1_t ctl1 = { adc12busy: 0, conseq: (numSamples > numMemctl+1) ? 3 : 1, adc12ssel: config->adc12ssel, adc12div: config->adc12div, issh: 0, shp: 1, shs: (jiffies == 0) ? 0 : 1, cstartadd: 0 }; adc12memctl_t firstMemctl = { inch: config->inch, sref: config->sref, eos: 0 }; uint16_t i, mask = 1; adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); ctl0.msc = (jiffies == 0) ? 1 : 0; ctl0.sht0 = config->sht; ctl0.sht1 = config->sht; state = MULTI_CHANNEL; resultBufferStart = NULL; resultBufferLength = numSamples; resultBufferStart = buf; resultBufferIndex = 0; numChannels = numMemctl+1; call HplAdc12.setCtl0(ctl0); call HplAdc12.setCtl1(ctl1); call HplAdc12.setMCtl(0, firstMemctl); for (i=0; i<(numMemctl-1) && i < 14; i++){ memctl[i].eos = 0; call HplAdc12.setMCtl(i+1, memctl[i]); } memctl[i].eos = 1; call HplAdc12.setMCtl(i+1, memctl[i]); call HplAdc12.setIEFlags(mask << (i+1)); if (jiffies){ state |= USE_TIMERA; prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id); } result = SUCCESS; } } return result; } async command error_t MultiChannel.getData[uint8_t id]() { uint8_t i; atomic { if (call ADCArbiterInfo.userId() == id){ if (!resultBufferStart) return EINVAL; if (state & ADC_BUSY) return EBUSY; state |= ADC_BUSY; clientID = id; for (i=0; i 16) length = 16; else length = resultBufferLength - resultBufferIndex; do { *resultBuffer++ = call HplAdc12.getMem(i); } while (++i < length); resultBufferIndex += length; if (overflow || resultBufferLength == resultBufferIndex){ stopConversion(); resultBuffer -= resultBufferIndex; k = resultBufferIndex - length; resultBufferIndex = 0; signal SingleChannel.multipleDataReady[clientID](resultBuffer, overflow ? k : resultBufferLength); } else if (resultBufferLength - resultBufferIndex > 15) return; else { // last sequence < 16 samples adc12memctl_t memctl = call HplAdc12.getMCtl(0); memctl.eos = 1; call HplAdc12.setMCtl(resultBufferLength - resultBufferIndex, memctl); } } break; case MULTIPLE_DATA_REPEAT: { uint8_t i = 0; resultBuffer = resultBufferStart; do { *resultBuffer++ = call HplAdc12.getMem(i); } while (++i < resultBufferLength); resultBufferStart = signal SingleChannel.multipleDataReady[clientID]( resultBuffer-resultBufferLength, overflow ? 0 : resultBufferLength); if (!resultBufferStart) stopConversion(); break; } #endif default: stopConversion(); break; } // switch } default async event error_t SingleChannel.singleDataReady[uint8_t id](uint16_t data) { return FAIL; } default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id]( uint16_t *buf, uint16_t numSamples) { return 0; } default async event void MultiChannel.dataReady[uint8_t id](uint16_t *buffer, uint16_t numSamples) {}; default async event void Overflow.memOverflow[uint8_t id](){} default async event void Overflow.conversionTimeOverflow[uint8_t id](){} } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12MultiChannel.nc000066400000000000000000000114731207233610700242110ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2009-12-03 17:36:13 $ * @author: Jan Hauer * ======================================================================== */ /** * This interface provides access to the ADC12 on the level of HAL. It can be * used to sample up to 16 (different) ADC channels. It separates between * configuration and data collection: every time a client has been granted * access to the ADC subsystem (via the Resource interface), it first has to * configure the ADC. Afterwards the client may call getData() more than once * without reconfiguring the ADC in between (if the client has not released the * ADC via the Resource interface), i.e.

      * * configure() -> ( getData() -> dataReady() )* * * @author Jan Hauer */ #include "Msp430Adc12.h" interface Msp430Adc12MultiChannel { /** * Configures the ADC to perform conversion(s) on multiple channels. Any * previous configuration will be overwritten. If SUCCESS is returned * calling getData() will start the conversion immediately and a * dataReady() event will be signalled with the conversion * result when the conversion has finished. * * @param config Main ADC12 configuration and configuration of the first * channel * * @param memctl List of additional channels and respective reference * voltages * * @param numMemctl Number of entries in the list * * @param buffer Buffer to store the conversion results, it must have * numSamples entries. Results will be stored in the order the channels where * specified. * * @param numSamples Total number of samples. Note: numSamples % * (numMemctl+1) must be zero. For example, to sample every channel twice use * numSamples = (numMemctl+1) * 2 * * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" * and input divider "sampcon_id". Samples are taken equally-spaced in * time iterating round-robin over the channels (different channels are * not sampled simultaneously but one after another). * * @return SUCCESS means that the ADC was configured successfully and * getData() can be called to start the conversion. */ async command error_t configure(const msp430adc12_channel_config_t *config, adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buffer, uint16_t numSamples, uint16_t jiffies); /** * Starts sampling the adc channels using the configuration as specified by * the last call to configure(). * * @return SUCCESS means that the conversion was started successfully and an * event dataReady() will be signalled. Otherwise no event will be signalled. */ async command error_t getData(); /** * Conversion results are ready. Results are stored in the buffer in the * order the channels where specified in the configure() * command, i.e. every (numMemctl+1)-th entry maps to the same channel. * * @param buffer Conversion results (lower 12 bit are valid, respectively). * @param numSamples Number of results stored in buffer */ async event void dataReady(uint16_t *buffer, uint16_t numSamples); } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12Overflow.nc000066400000000000000000000043231207233610700234250ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2006-12-12 18:23:07 $ * @author: Jan Hauer * ======================================================================== */ /** * Signals an ADC12MEMx overflow or conversion time overflow condition to the * client. * * @author Jan Hauer */ #include "Msp430Adc12.h" interface Msp430Adc12Overflow { /** * An ADC12MEMx overflow condition has occured. */ async event void memOverflow(); /** * A conversion time overflow condition has occured. */ async event void conversionTimeOverflow(); } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12P.nc000066400000000000000000000067671207233610700220370ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.7 $ * $Date: 2008-05-15 23:57:13 $ * @author: Jan Hauer * ======================================================================== */ #include configuration Msp430Adc12P { provides { interface Resource[uint8_t id]; interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; interface Msp430Adc12Overflow as Overflow[uint8_t id]; interface AsyncStdControl as DMAExtension[uint8_t id]; } } implementation { components Msp430Adc12ImplP, HplAdc12P, MainC, new SimpleRoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter; Resource = Arbiter; SingleChannel = Msp430Adc12ImplP.SingleChannel; MultiChannel= Msp430Adc12ImplP.MultiChannel; Overflow = Msp430Adc12ImplP.Overflow; DMAExtension = Msp430Adc12ImplP.DMAExtension; Msp430Adc12ImplP.Init <- MainC; Msp430Adc12ImplP.ADCArbiterInfo -> Arbiter; Msp430Adc12ImplP.HplAdc12 -> HplAdc12P; #ifdef ADC12_P6PIN_AUTO_CONFIGURE components HplMsp430GeneralIOC; Msp430Adc12ImplP.Port60 -> HplMsp430GeneralIOC.Port60; Msp430Adc12ImplP.Port61 -> HplMsp430GeneralIOC.Port61; Msp430Adc12ImplP.Port62 -> HplMsp430GeneralIOC.Port62; Msp430Adc12ImplP.Port63 -> HplMsp430GeneralIOC.Port63; Msp430Adc12ImplP.Port64 -> HplMsp430GeneralIOC.Port64; Msp430Adc12ImplP.Port65 -> HplMsp430GeneralIOC.Port65; Msp430Adc12ImplP.Port66 -> HplMsp430GeneralIOC.Port66; Msp430Adc12ImplP.Port67 -> HplMsp430GeneralIOC.Port67; #endif #ifdef ADC12_TIMERA_ENABLED components Msp430TimerC; Msp430Adc12ImplP.TimerA -> Msp430TimerC.TimerA; Msp430Adc12ImplP.ControlA0 -> Msp430TimerC.ControlA0; Msp430Adc12ImplP.ControlA1 -> Msp430TimerC.ControlA1; Msp430Adc12ImplP.CompareA0 -> Msp430TimerC.CompareA0; Msp430Adc12ImplP.CompareA1 -> Msp430TimerC.CompareA1; #endif } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc000066400000000000000000000277501207233610700243450ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2008-06-27 18:05:23 $ * @author: Jan Hauer * ======================================================================== */ /** * * This interface provides access to the ADC12 on the level of HAL. It can be * used to sample a single adc channel once or repeatedly (one event is * signalled per conversion result) or perform multiple conversions for a * single channel once or repeatedly (one event is signalled per multiple * conversion results). It cannot be used to sample different adc channels with * a single command (use the Msp430Adc12MultiChannel interface instead). * Sampling a channel requires calling a sequence of two commands, configureX() * and getData(), where X is either 'Single', 'SingleRepeat', 'Multiple' or * 'MultipleRepeat'. Conversion results will be signalled by the * dataReadySingle() or dataReadyMultiple() event, depending on the previous * configuration, i.e. there are four possible sequences: * *

      configureSingle() -> ( getData() -> singleDataReady() )* *

      configureSingleRepeat() -> ( getData() -> singleDataReady() )* *

      configureMultiple() -> ( getData() -> multipleDataReady() )* *

      configureMultipleRepeat() -> getData() -> multipleDataReady() * *

      where configureX() and getData() are commands called by the client and * singleDataReady() and multipleDataReady() are events signalled back to the * client by the adc subsystem. Note that a configuration is valid until the * client reconfigures or releases the ADC (using the Resource interface), * except for configureMultipleRepeat(), which is only valid for a single call * to getData(). This means that after a successful configuration with, for * example, configureSingle() the client may call getData() more than once * without reconfiguring the ADC in between (if the client has not released the * ADC via the Resource interface). * * @author Jan Hauer */ #include "Msp430Adc12.h" interface Msp430Adc12SingleChannel { /** * Configures the ADC to perform a single conversion. Any previous * configuration will be overwritten. If SUCCESS is returned calling * getData() will start the conversion immediately and a * singleDataReady() event will be signalled with the conversion * result when the conversion has finished. * * @param config ADC12 configuration data. * * @return SUCCESS means that the ADC was configured successfully and * getData() can be called to start the conversion. */ async command error_t configureSingle(const msp430adc12_channel_config_t *ONE config); /** * Configures the ADC for repeated single channel conversion mode. Any * previous configuration will be overwritten. If SUCCESS is returned calling * getData() will start sampling the adc channel periodically * (the first conversion is started immediately). The sampling period is * specified by the jiffies parameter, which defines the time * between successive conversions in terms of clock ticks of clock source * "sampcon_ssel" and clock input divider "sampcon_id" as specified in the * config parameter. If jiffies is zero successive conversions * are performed as quickly as possible. Conversion result are signalled * until the client returns FAIL in the * singleDataReady() event handler. * * @param config ADC12 configuration data. * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" and * input divider "sampcon_id". * * @return SUCCESS means that the ADC was configured successfully and * getData() can be called to start with the first conversion. */ async command error_t configureSingleRepeat(const msp430adc12_channel_config_t *ONE config, uint16_t jiffies); /** * Configures the ADC for sampling a channel numSamples times * with a given sampling period. Any previous configuration will be * overwritten. In contrast to the configureSingleRepeat() * command, this configuration means that only one event will be signalled * after all samples have been taken (which is useful for high-frequency * sampling). If SUCCESS is returned calling getData() will * start sampling the adc channel numSamples times and the first * conversion is started immediately. Conversion results are stored in a * buffer allocated by the client (the buffer * parameter). The sampling period is specified by the jiffies * parameter, which defines the time between successive conversions in terms * of clock ticks of clock source "sampcon_ssel" and clock input divider * "sampcon_id" as specified in the config parameter. If jiffies * is zero successive conversions are performed as quickly as possible. After * numSamples conversions an event * multipleDataReady() is signalled with the conversion results. * * @param config ADC12 configuration data. * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" * and input divider "sampcon_id". * @param buffer The user-allocated buffer in which the conversion results * will be stored. It must have at least numSamples entries, * i.e. it must have a size of at least numSamples * 2 byte. * @param numSamples Number of adc samples * * @return SUCCESS means that the ADC was configured successfully and * getData() can be called to start with the first conversion. */ async command error_t configureMultiple( const msp430adc12_channel_config_t *ONE config, uint16_t *COUNT(numSamples) buffer, uint16_t numSamples, uint16_t jiffies); /** * * Configures the ADC for sampling a channel multiple times repeatedly. Any * previous configuration will be overwritten. In contrast to the * configureSingleRepeat() command this configuration means that * an event with numSamples conversion results will be * signalled, where 0 < numSamples <= 16. In contrast to the * configureMultiple() command, this configuration means that * numSamples conversion results will be signalled repeatedly * until the client returns FAIL in the * multipleDataReady() event handler. * * If configureMultipleRepeat() returns SUCCESS calling * getData() will start the the first conversion immediately. * The sampling period is specified by the jiffies parameter, * which defines the time between successive conversions in terms of clock * ticks of clock source "sampcon_ssel" and clock input divider "sampcon_id" * as specified in the config parameter. If jiffies is zero * successive conversions are performed as quickly as possible. After * numSamples conversions an event * multipleDataReady() is signalled with numSamples * conversion results. If the client returns SUCCESS in the * multipleDataReady() event handler, numSamples * new conversions will be performed, otherwise not. * * @param config ADC12 configuration data. * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" * and input divider "sampcon_id". * @param buffer The user-allocated buffer in which the conversion results * will be stored. It must have at least numSamples entries, * i.e. it must have a size of at least numSamples * 2 byte. * @param numSamples Number of adc samples to take, 0 < * numSamples <= 16 * * @return SUCCESS means that the ADC was configured successfully and * getData() can be called to start with the first conversion. */ async command error_t configureMultipleRepeat(const msp430adc12_channel_config_t *ONE config, uint16_t *COUNT(numSamples) buffer, uint8_t numSamples, uint16_t jiffies); /** * Starts sampling an adc channel using the configuration as specified by * the last call to any of the four available configuration commands. * * @return SUCCESS means that the conversion was started successfully and an * event singleDataReady() or multipleDataReady() will be signalled * (depending on the previous configuration). Otherwise no such event will be * signalled. */ async command error_t getData(); /** * A single ADC conversion result is ready. If the ADC was configured with * the configureSingle() command, then the return value is * ignored. If the ADC was configured with the * configureSingleRepeat() command then the return value tells * whether another conversion should be performed (SUCCESS()) or * not (FAIL). * * @param data Conversion result (lower 12 bit). * * @return If this event is signalled as response to a call to * configureSingleRepeat() then SUCCESS results in * another sampling and FAIL stops the repeated sampling. * Otherwise the return value is ignored. */ async event error_t singleDataReady(uint16_t data); /** * Multiple ADC conversion results are ready. If the ADC was configured * with the configureMultiple() command, then the return value * is ignored. If the ADC was configured with the * configureMultipleRepeat() command then the returned pointer * defines where to store the next numSamples * conversion results (the client must make sure that the buffer is big * enough!). Returning a null pointer means that the repeated conversion * mode will be stopped. * * @param buffer Conversion results (lower 12 bit are valid, respectively). * @param numSamples Number of samples stored in buffer * * @return * A null pointer stops a repeated conversion mode. Any non-zero value is * interpreted as the next buffer, which must have at least * numSamples entries. The return value is ignored if the ADC * was configured with configureMultiple(). */ async event uint16_t * COUNT_NOK(numSamples) multipleDataReady(uint16_t *COUNT(numSamples) buffer, uint16_t numSamples); } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc000066400000000000000000000150671207233610700247120ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universität Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universität Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2007-04-05 13:42:36 $ * @author: Jan Hauer * ======================================================================== */ module Msp430RefVoltArbiterImplP { provides interface Resource as ClientResource[uint8_t client]; uses { interface Resource as AdcResource[uint8_t client]; interface SplitControl as RefVolt_1_5V; interface SplitControl as RefVolt_2_5V; interface AdcConfigure as Config[uint8_t client]; } } implementation { enum { NO_OWNER = 0xFF, }; norace uint8_t syncOwner = NO_OWNER; bool ref2_5v; task void switchOff(); async command error_t ClientResource.request[uint8_t client]() { return call AdcResource.request[client](); } async command error_t ClientResource.immediateRequest[uint8_t client]() { const msp430adc12_channel_config_t* settings = call Config.getConfiguration[client](); if (settings->sref == REFERENCE_VREFplus_AVss || settings->sref == REFERENCE_VREFplus_VREFnegterm) // always fails, because of the possible start-up delay (and async-sync transition) return FAIL; else { return call AdcResource.immediateRequest[client](); } } event void AdcResource.granted[uint8_t client]() { const msp430adc12_channel_config_t* settings = call Config.getConfiguration[client](); if (settings->sref == REFERENCE_VREFplus_AVss || settings->sref == REFERENCE_VREFplus_VREFnegterm){ error_t started; if (syncOwner != NO_OWNER){ // very rare case, which can only occur // if no FIFO task scheduler // is used (see comment below) call AdcResource.release[client](); call AdcResource.request[client](); return; } syncOwner = client; if (settings->ref2_5v == REFVOLT_LEVEL_1_5) { ref2_5v = FALSE; started = call RefVolt_1_5V.start(); } else { ref2_5v = TRUE; started = call RefVolt_2_5V.start(); } if (started != SUCCESS){ syncOwner = NO_OWNER; call AdcResource.release[client](); call AdcResource.request[client](); } } else signal ClientResource.granted[client](); } event void RefVolt_1_5V.startDone(error_t error) { if (syncOwner != NO_OWNER){ // assumption: a client which has called request() must // not call release() before it gets the granted() signal ClientResource.granted[syncOwner](); } } event void RefVolt_2_5V.startDone(error_t error) { if (syncOwner != NO_OWNER){ // assumption: a client which has called request() must // not call release() before it gets the granted() signal ClientResource.granted[syncOwner](); } } async command error_t ClientResource.release[uint8_t client]() { error_t error; if (syncOwner == client) post switchOff(); error = call AdcResource.release[client](); // If syncOwner == client then now there is an inconsistency between // the state of syncOwner and the actual owner of the Resource // (which is not owned by anyone, because it was just released). // The switchOff() task will resolve this incosistency, but a // client can call ClientResource.request() before this task is // posted. However, since Resource.granted is signalled in task context, // with a FIFO task scheduler we can be sure that switchOff() will // always be executed before the next Resource.granted event is // signalled. Unfortunately "TinyOS components MUST NOT assume a // FIFO policy" (TEP106), that's why there is some additional check // in AdcResource.granted above. return error; } task void switchOff() { error_t stopped; // update internal state if (syncOwner != NO_OWNER){ if (ref2_5v) stopped = call RefVolt_2_5V.stop(); else stopped = call RefVolt_1_5V.stop(); if (stopped == SUCCESS) syncOwner = NO_OWNER; else post switchOff(); } } event void RefVolt_1_5V.stopDone(error_t error) { } event void RefVolt_2_5V.stopDone(error_t error) { } async command bool ClientResource.isOwner[uint8_t client]() { return call AdcResource.isOwner[client](); } default event void ClientResource.granted[uint8_t client](){} default async command error_t AdcResource.request[uint8_t client]() { return FAIL; } default async command error_t AdcResource.immediateRequest[uint8_t client]() { return FAIL; } default async command bool AdcResource.isOwner[uint8_t client]() { return FALSE; } default async command error_t AdcResource.release[uint8_t client](){return FAIL;} const msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; default async command const msp430adc12_channel_config_t* Config.getConfiguration[uint8_t client]() { return &defaultConfig; } } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430RefVoltArbiterP.nc000066400000000000000000000070741207233610700240670ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universität Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universität Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:07 $ * @author: Jan Hauer * ======================================================================== */ /** * This component is meant to intercept requests to the Resource * interface on their way to the adc arbiter. It checks whether the client's * adc configuration requires the internal reference voltage generator of the * MSP430 to be enabled during the conversion by inspecting the client's * configuration data (using the AdcConfigure interface). If so it * makes sure that Resource.granted() is held back until the reference voltage * is stable. Clients SHOULD NOT wire to Msp430RefVoltArbiterP but * to the Resource interface provided by * Msp430Adc12ClientAutoRVGC. * * @author Jan Hauer */ configuration Msp430RefVoltArbiterP { provides interface Resource as ClientResource[uint8_t client]; uses { interface Resource as AdcResource[uint8_t client]; interface AdcConfigure as Config[uint8_t client]; } } implementation { components Msp430RefVoltGeneratorP, Msp430RefVoltArbiterImplP, new TimerMilliC() as SwitchOnDelayTimer, new TimerMilliC() as SwitchOffDelayTimer, new TimerMilliC() as SwitchOffSettleTimer, HplAdc12P; ClientResource = Msp430RefVoltArbiterImplP.ClientResource; AdcResource = Msp430RefVoltArbiterImplP.AdcResource; Config = Msp430RefVoltArbiterImplP; Msp430RefVoltArbiterImplP.RefVolt_1_5V -> Msp430RefVoltGeneratorP.RefVolt_1_5V; Msp430RefVoltArbiterImplP.RefVolt_2_5V -> Msp430RefVoltGeneratorP.RefVolt_2_5V; Msp430RefVoltGeneratorP.SwitchOnTimer -> SwitchOnDelayTimer; Msp430RefVoltGeneratorP.SwitchOffTimer -> SwitchOffDelayTimer; Msp430RefVoltGeneratorP.SwitchOffSettleTimer -> SwitchOffSettleTimer; Msp430RefVoltGeneratorP.HplAdc12 -> HplAdc12P; } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430RefVoltGenerator.h000066400000000000000000000056511207233610700241330ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2007-03-14 18:14:06 $ * @author: Jan Hauer * ======================================================================== */ #ifndef REFVOLTGENERATOR_H #define REFVOLTGENERATOR_H // Time for generator to become stable (in ms) - don't change. #define MSP430_REFVOLT_STABILIZE_INTERVAL 17 // Delay before generator is actually switched off after it has been stopped // (in ms). This avoids having to wait another 17 ms in case the generator is // needed again shortly after it has been stopped. #ifndef MSP430_REFVOLT_SWITCHOFF_INTERVAL #define MSP430_REFVOLT_SWITCHOFF_INTERVAL 20 #endif // The two values below depend on the external capacitor CVREF+ (cf. msp430fxxx // datasheet). The values have been measured on the tinynode platform, which // applies the TI's reference design (platforms that don't follow this design // may want to update the values). // Time (in ms) for reference voltage to drop from 2.5v to 1.5v #ifndef MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL #define MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL 70 #endif // Time (in ms) for reference voltage to drop from 2.5v to 1.5v after being disabled #ifndef MSP430_REFVOLT_DROP_2_5_TO_1_5_INTERVAL #define MSP430_REFVOLT_DROP_2_5_TO_1_5_INTERVAL 2048 #endif #endif tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/Msp430RefVoltGeneratorP.nc000066400000000000000000000221121207233610700244130ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universität Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universität Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-03-11 09:42:25 $ * @author: Jan Hauer * ======================================================================== */ module Msp430RefVoltGeneratorP { provides { interface SplitControl as RefVolt_1_5V; interface SplitControl as RefVolt_2_5V; } uses { interface HplAdc12; interface Timer as SwitchOnTimer; interface Timer as SwitchOffTimer; interface Timer as SwitchOffSettleTimer; } } implementation { typedef enum { // DO NOT CHANGE ANY OF THE CONSTANTS BELOW! GENERATOR_OFF = 0, REFERENCE_1_5V_STABLE = 1, REFERENCE_2_5V_STABLE = 2, REFERENCE_1_5V_ON_PENDING = 3, REFERENCE_2_5V_ON_PENDING = 4, REFERENCE_1_5V_OFF_PENDING = 5, REFERENCE_2_5V_OFF_PENDING = 6, } state_t; state_t m_state; /***************** Prototypes ****************/ error_t switchOn(uint8_t level); error_t switchOff(); void signalStartDone(state_t state, error_t result); void signalStopDone(state_t state, error_t result); error_t start(state_t targetState); error_t stop(state_t nextState); /***************** SplitControl Commands ****************/ command error_t RefVolt_1_5V.start() { return start(REFERENCE_1_5V_STABLE); } command error_t RefVolt_2_5V.start() { return start(REFERENCE_2_5V_STABLE); } command error_t RefVolt_1_5V.stop() { return stop(REFERENCE_1_5V_OFF_PENDING); } command error_t RefVolt_2_5V.stop() { return stop(REFERENCE_2_5V_OFF_PENDING); } error_t start(state_t targetState){ error_t result; if (m_state == REFERENCE_1_5V_STABLE || m_state == REFERENCE_2_5V_STABLE) { if (targetState == m_state) { result = EALREADY; } else if ((result = switchOn(targetState)) == SUCCESS) { if (m_state==REFERENCE_1_5V_STABLE) { // targetState==REFERENCE_2_5V_STABLE m_state = REFERENCE_2_5V_ON_PENDING; call SwitchOnTimer.startOneShot(MSP430_REFVOLT_STABILIZE_INTERVAL); } else { m_state = REFERENCE_1_5V_ON_PENDING; call SwitchOnTimer.startOneShot(MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL); } } } else if (m_state == GENERATOR_OFF) { if ((result = switchOn(targetState)) == SUCCESS) { if (targetState==REFERENCE_1_5V_STABLE && call SwitchOffSettleTimer.isRunning()) { call SwitchOnTimer.startOneShot(MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL); } else call SwitchOnTimer.startOneShot(MSP430_REFVOLT_STABILIZE_INTERVAL); call SwitchOffSettleTimer.stop(); m_state = targetState + 2; // +2 turns "XXX_STABLE" state into a "XXX_ON_PENDING" state } } else if (m_state == REFERENCE_1_5V_OFF_PENDING || m_state == REFERENCE_2_5V_OFF_PENDING) { if ((result = switchOn(targetState)) == SUCCESS) { // there is a pending stop() call state_t oldState = m_state; call SwitchOffTimer.stop(); signalStopDone(oldState, FAIL); if (targetState==m_state-4) { m_state=targetState; signalStartDone(targetState, SUCCESS); } else if (m_state==REFERENCE_1_5V_OFF_PENDING) { m_state = REFERENCE_2_5V_ON_PENDING; call SwitchOnTimer.startOneShot(MSP430_REFVOLT_STABILIZE_INTERVAL); } else { m_state = REFERENCE_1_5V_ON_PENDING; call SwitchOnTimer.startOneShot(MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL); } } } else if (m_state == targetState + 2) // starting already? result = SUCCESS; else result = EBUSY; return result; } error_t stop(state_t nextState){ error_t result; if (m_state == GENERATOR_OFF) result = EALREADY; else if (m_state == REFERENCE_1_5V_STABLE || m_state == REFERENCE_2_5V_STABLE) { result = SUCCESS; m_state = nextState; // m_state becomes a "XXX_OFF_PENDING" state call SwitchOffTimer.startOneShot(MSP430_REFVOLT_SWITCHOFF_INTERVAL); } else if (m_state == REFERENCE_1_5V_ON_PENDING || m_state == REFERENCE_2_5V_ON_PENDING) { if ((result = switchOff()) == SUCCESS) { // there is a pending start() call state_t oldState = m_state; call SwitchOnTimer.stop(); m_state = GENERATOR_OFF; signalStartDone(oldState, FAIL); signalStopDone(nextState, SUCCESS); } } else if (m_state == nextState) // stopping already? result = SUCCESS; else result = EBUSY; return result; } void signalStartDone(state_t state, error_t result){ if (state == REFERENCE_1_5V_STABLE || state == REFERENCE_1_5V_ON_PENDING) signal RefVolt_1_5V.startDone(result); else signal RefVolt_2_5V.startDone(result); } void signalStopDone(state_t state, error_t result){ if (state == REFERENCE_1_5V_STABLE || state == REFERENCE_1_5V_OFF_PENDING) signal RefVolt_1_5V.stopDone(result); else signal RefVolt_2_5V.stopDone(result); } /***************** Timer Events ******************/ event void SwitchOnTimer.fired() { switch (m_state) { case REFERENCE_1_5V_ON_PENDING: m_state = REFERENCE_1_5V_STABLE; signal RefVolt_1_5V.startDone(SUCCESS); break; case REFERENCE_2_5V_ON_PENDING: m_state = REFERENCE_2_5V_STABLE; signal RefVolt_2_5V.startDone(SUCCESS); break; default: return; } } event void SwitchOffTimer.fired() { switch (m_state) { case REFERENCE_1_5V_OFF_PENDING: if (switchOff() == SUCCESS){ m_state = GENERATOR_OFF; signal RefVolt_1_5V.stopDone(SUCCESS); } else { call SwitchOffTimer.startOneShot(MSP430_REFVOLT_SWITCHOFF_INTERVAL); } break; case REFERENCE_2_5V_OFF_PENDING: if (switchOff() == SUCCESS) { m_state = GENERATOR_OFF; signal RefVolt_2_5V.stopDone(SUCCESS); call SwitchOffSettleTimer.startOneShot(MSP430_REFVOLT_DROP_2_5_TO_1_5_INTERVAL); } else { call SwitchOffTimer.startOneShot(MSP430_REFVOLT_SWITCHOFF_INTERVAL); } break; default: break; } } event void SwitchOffSettleTimer.fired() {} /**************** HplAdc12 Events ***************/ async event void HplAdc12.conversionDone(uint16_t iv) { } /**************** Functions ****************/ error_t switchOn(uint8_t level) { atomic { if (call HplAdc12.isBusy()) { return EBUSY; } else { adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); ctl0.enc = 0; call HplAdc12.setCtl0(ctl0); ctl0.refon = 1; // This is why we don't change the enum at the top ctl0.r2_5v = level - 1; call HplAdc12.setCtl0(ctl0); return SUCCESS; } } } error_t switchOff() { atomic { if (call HplAdc12.isBusy()) { return EBUSY; } else { adc12ctl0_t ctl0 = call HplAdc12.getCtl0(); ctl0.enc = 0; call HplAdc12.setCtl0(ctl0); ctl0.refon = 0; call HplAdc12.setCtl0(ctl0); return SUCCESS; } } } /***************** Defaults ****************/ default event void RefVolt_1_5V.startDone(error_t error){} default event void RefVolt_2_5V.startDone(error_t error){} default event void RefVolt_1_5V.stopDone(error_t error){} default event void RefVolt_2_5V.stopDone(error_t error){} } tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/README.txt000066400000000000000000000210061207233610700213110ustar00rootroot00000000000000The implementation of the 12-bit ADC stack on the MSP430 is in compliance with TEP 101 (tinyos-2.x/doc/txt/tep101.txt) and provides virtualized access to the ADC12 by seven different components: AdcReadClientC, AdcReadNowClientC, AdcReadStreamClientC, Msp430Adc12ClientC, Msp430Adc12ClientAutoDMAC, Msp430Adc12ClientAutoRVGC and Msp430Adc12ClientAutoDMA_RVGC. A client component may wire to any of these components and it SHOULD NOT wire to any other components in 'tinyos-2.x/tos/chips/msp430/adc12'. This document explains the difference between the seven components. 1. HIL ==================================================================== A platform-independent application (an application like 'Oscilloscope' that is supposed to run on, for example, the 'telosb' and 'micaz' platform at the same time) cannot wire to an MSP430-specific interface like Msp430Adc12SingleChannel (there is no MSP430 on micaz). Instead such an application may access the MSP430 ADC through any of the three following components: * AdcReadClientC: to read single ADC values * AdcReadNowClientC: to read single ADC values asynchronously (fast) * AdcReadStreamClientC: to read multiple ADC values These components are less efficient than the MSP430-specific ADC components (described below), but they provide standard TinyOS interfaces for reading ADC values. Thus, if a client component does not care so much about efficiency but rather about portability it should wire to any of these components. 2. HAL ==================================================================== An application that is written for an MSP430-based platform like 'eyesIFX' or 'telosb' can access the ADC12 in a more efficient way via two interfaces: (1) the Msp430Adc12SingleChannel allows to perform one or more ADC conversions on a single channel with a specified sampling frequency and (2) the Msp430Adc12MultiChannel allows to sample a group of up to 16 different ADC channels. On the MSP430 two additional hardware modules may play a role when the ADC12 is used: the internal reference voltage generator and the DMA controller. The voltage generator outputs stabilized voltage of 1.5 V or 2.5 V, which may be used as reference voltage in the conversion process. Whether the internal reference voltage generator should be enabled during the conversion is platform-specific (e.g. the light sensor on the 'eyesIFX' requires a stable reference voltage). When an application requires a stable reference voltage during the sampling process it should wire to the Msp430Adc12ClientAutoRVGC component. This assures that when the app is signalled the Resource.granted() event the reference voltage generator outputs a stable voltage (the level is defined in the configuration data supplied by the application). There are two more things to note: first, the generator is not switched off immediately, when the client calls Resource.release(), but only after some pre-defined interval (see Msp430RefVoltGenerator.h). This can avoid a power-up delay when multiple clients are present. Second, one must not forget to wire the AdcConfigure interface to the Msp430Adc12ClientAutoRVGC or Msp430Adc12ClientAutoDMA_RVGC component in addition to configuring the ADC through the Msp430Adc12SingleChannel interface (a nesC warning will be signalled). The DMA controller can be used to copy conversion data from the ADC registers to the application buffer. DMA is only present on MSP430x15x and MSP430x16x devices. When an application wants to use the DMA it can wire to the Msp430Adc12ClientAutoDMAC component and then conversion results are transferred using DMA. Both, enabling the reference generator and using the DMA, therefore happens transparent to the app. There are four possible combinations reflected by the following components that an MSP430-based application may wire to: * Msp430Adc12ClientC: no DMA, no automatic reference voltage * Msp430Adc12ClientAutoRVGC: automatic reference voltage, but no DMA * Msp430Adc12ClientAutoDMAC: DMA, but no automatic reference voltage * Msp430Adc12ClientAutoDMA_RVGC: DMA and automatic reference voltage Currently Msp430Adc12MultiChannel is only provided by the first two components. I/O PINs -------------------------------------------------------------------- During a conversion the respective ADC port pin (ports 6.0 - 6.7) must be configured such that the peripheral module function is selected and the port pin is switched to input direction. By default, for every client this is done **automatically** in the ADC stack (Msp430Adc12ImplP), i.e. just before the conversion starts the respective pin is switched to peripheral module function and input direction and immediately after the conversion has finished it is switched to I/O function mode. To disable this feature please comment out the "ADC12_P6PIN_AUTO_CONFIGURE" macro in Msp430Adc12.h. Configuration for single channel conversions -------------------------------------------------------------------- The msp430adc12_channel_config_t struct holds all information needed to configure the ADC12 for single channel conversions. The flags come from the following MSP430 registers: ADC12CTL0, ADC12CTL1, ADC12MCTLx and TACTL and are named according to the "MSP430x1xx Family User's Guide". Their meaning is as follows: .inch: ADC12 input channel (ADC12MCTLx register). An (external) input channel maps to one of msp430's A0-A7 pins (see device specific data sheet). .sref: reference voltage (ADC12MCTLx register). If REFERENCE_VREFplus_AVss or REFERENCE_VREFplus_VREFnegterm is chosen AND the client wires to the Msp430Adc12ClientAutoRVGC or Msp430Adc12ClientAutoDMA_RVGC component then the reference voltage generator has automatically been enabled to the voltage level defined by the "ref2_5v" flag (see below) when the Resource.granted() event is signalled to the client. Otherwise this flag is ignored. .ref2_5v: Reference generator voltage level (ADC12CTL0 register). See "sref". .adc12ssel: ADC12 clock source select for the sample-hold-time (ADC12CTL1 register). In combination the "adc12ssel", "adc12div" and "sht" define the sample-hold-time: "adc12ssel" defines the clock source, "adc12div" defines the ADC12 clock divider and "sht" define the time expressed in jiffies. (the sample-hold-time depends on the resistence of the attached sensor, and is calculated using to the formula in section 17.2.4 of the user guide) .adc12div: ADC12 clock divider (ADC12CTL1 register). See "adc12ssel". .sht: Sample-and-hold time (ADC12CTL1 register). See "adc12ssel". .sampcon_ssel: Clock source for the sampling period (TASSEL for TimerA). When an ADC client specifies a non-zero "jiffies" parameter (using the Msp430Adc12SingleChannel.configureX commands), the ADC implementation will automatically configure TimerA to be sourced from "sampcon_ssel" with an input divider of "sampcon_id". During the sampling process TimerA will be used to trigger a single (Msp430Adc12SingleChannel interface) or a sequence of (Msp430Adc12MultiChannel interface) conversions every "jiffies" clock ticks. .sampcon_id: Input divider for "sampcon_ssel" (IDx in TACTL register, TimerA). See "sampcon_ssel". Example: Assuming that SMCLK runs at 1 (binary) MHz the following code snippet performs 2048 ADC conversions on channel A2 with a sampling frequency of 4096 Hz. The sampling period is defined by the combination of SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 and a "jiffies" parameter of (2^20 / 4096) = (1048576 / 4096) = = 256 jiffies. #define NUM_SAMPLES 2048 uint16_t buffer[NUM_SAMPLES]; const msp430adc12_channel_config_t config = { INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_NONE, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }; event void Boot.booted() { call Resource.request(); } event void Resource.granted() { error_t result; result = call SingleChannel.configureMultiple(&config, buffer, NUM_SAMPLES, 256); if (result == SUCCESS) call SingleChannel.getData(); } async event uint16_t* SingleChannel.multipleDataReady(uint16_t *buf, uint16_t length) { // buffer contains conversion results } 3. Implementation ==================================================================== The ADC12 stack is located at tinyos-2.x/tos/chips/msp430/adc12. Sensor wrappers for the msp430 internal sensors are in tinyos-2.x/tos/chips/msp430/sensors, an HAL test app can be found in tinyos-2.x/apps/tests/msp430/Adc12. ----- $Date: 2008/04/07 09:41:55 $ @author: Jan Hauer tinyos-2.1.2+dfsg/tos/chips/msp430/adc12/WireAdcStreamP.nc000066400000000000000000000023651207233610700227560ustar00rootroot00000000000000/* $Id: WireAdcStreamP.nc,v 1.1 2008-04-07 09:41:55 janhauer Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Support component for AdcReadStreamClientC. * * @author David Gay * @author Jan Hauer */ #include "Msp430Adc12.h" configuration WireAdcStreamP { provides interface ReadStream[uint8_t client]; uses { interface AdcConfigure[uint8_t client]; interface Msp430Adc12SingleChannel[uint8_t client]; interface Resource[uint8_t client]; } } implementation { components AdcStreamP, MainC, new AlarmMilli32C() as Alarm, new ArbitratedReadStreamC(uniqueCount(ADCC_READ_STREAM_SERVICE), uint16_t) as ArbitrateReadStream; ReadStream = ArbitrateReadStream; AdcConfigure = AdcStreamP; Resource = ArbitrateReadStream; ArbitrateReadStream.Service -> AdcStreamP; AdcStreamP.Init <- MainC; Msp430Adc12SingleChannel = AdcStreamP.SingleChannel; AdcStreamP.Alarm -> Alarm; } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/000077500000000000000000000000001207233610700174635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/dma/HplMsp430DmaC.nc000066400000000000000000000051721207233610700221710ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Ben Greenstein * @author Jonathan Hui * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ */ configuration HplMsp430DmaC { provides interface HplMsp430DmaControl as Control; provides interface HplMsp430DmaChannel as Channel0; provides interface HplMsp430DmaChannel as Channel1; provides interface HplMsp430DmaChannel as Channel2; } implementation { components HplMsp430DmaP; components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_, DMA0SZ_, DMA0TSEL_MASK, DMA0TSEL_SHIFT ) as Dma0; components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_, DMA1SZ_, DMA1TSEL_MASK, DMA1TSEL_SHIFT ) as Dma1; components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_, DMA2SZ_, DMA2TSEL_MASK, DMA2TSEL_SHIFT ) as Dma2; Control = HplMsp430DmaP; Channel0 = Dma0; Channel1 = Dma1; Channel2 = Dma2; Dma0.Interrupt -> HplMsp430DmaP; Dma1.Interrupt -> HplMsp430DmaP; Dma2.Interrupt -> HplMsp430DmaP; } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/HplMsp430DmaChannel.nc000066400000000000000000000066601207233610700233620ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ interface HplMsp430DmaChannel { async command error_t setTrigger(dma_trigger_t trigger); async command void clearTrigger(); async command void setSingleMode(); async command void setBlockMode(); async command void setBurstMode(); async command void setRepeatedSingleMode(); async command void setRepeatedBlockMode(); async command void setRepeatedBurstMode(); async command void setSrcNoIncrement(); async command void setSrcDecrement(); async command void setSrcIncrement(); async command void setDstNoIncrement(); async command void setDstDecrement(); async command void setDstIncrement(); async command void setWordToWord(); async command void setByteToWord(); async command void setWordToByte(); async command void setByteToByte(); async command void setEdgeSensitive(); async command void setLevelSensitive(); async command void enableDMA(); async command void disableDMA(); async command void enableInterrupt() ; async command void disableInterrupt() ; async command bool interruptPending(); async command bool aborted(); async command void triggerDMA(); async command void setSrc(void *saddr); async command void setDst(void *daddr); async command void setSize(uint16_t sz); async command void setState(dma_channel_state_t s, dma_channel_trigger_t t, void* src, void* dest, uint16_t size); async command void setStateRaw(uint16_t state, uint16_t trigger, void* src, void* dest, uint16_t size); async command dma_channel_state_t getState(); async command void* getSource(); async command void* getDestination(); async command uint16_t getSize(); async command dma_channel_trigger_t getTrigger(); async command void reset(); async event void transferDone(error_t success); } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/HplMsp430DmaControl.nc000066400000000000000000000041151207233610700234230ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ #include "Msp430Dma.h" interface HplMsp430DmaControl { async command void setOnFetch(); async command void clearOnFetch(); async command void setRoundRobin(); async command void clearRoundRobin(); async command void setENNMI(); async command void clearENNMI(); async command void setState(dma_state_t s); async command dma_state_t getState(); async command void reset(); } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc000066400000000000000000000034041207233610700237770ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ interface HplMsp430DmaInterrupt { async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/HplMsp430DmaP.nc000066400000000000000000000062131207233610700222030ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $ */ module HplMsp430DmaP { provides interface HplMsp430DmaControl as DmaControl; provides interface HplMsp430DmaInterrupt as Interrupt; } implementation { MSP430REG_NORACE( DMACTL0 ); MSP430REG_NORACE( DMACTL1 ); // X1 family share the same interrupt vector with DAC, X2 family has its own #if defined(DACDMA_VECTOR) #define XX_DMA_VECTOR_XX DACDMA_VECTOR #elif defined(DMA_VECTOR) #define XX_DMA_VECTOR_XX DMA_VECTOR #else #error "DMA VECTOR not defined for cpu selected" #endif TOSH_SIGNAL( XX_DMA_VECTOR_XX ) { signal Interrupt.fired(); } async command void DmaControl.setOnFetch(){ DMACTL1 |= DMAONFETCH; } async command void DmaControl.clearOnFetch(){ DMACTL1 &= ~DMAONFETCH; } async command void DmaControl.setRoundRobin(){ DMACTL1 |= ROUNDROBIN; } async command void DmaControl.clearRoundRobin(){ DMACTL1 &= ~ROUNDROBIN; } async command void DmaControl.setENNMI(){ DMACTL1 |= ENNMI; } async command void DmaControl.clearENNMI(){ DMACTL1 &= ~ENNMI; } async command void DmaControl.setState(dma_state_t s){ DMACTL1 = *(int*)&s; } async command dma_state_t DmaControl.getState(){ dma_state_t s; s = *(dma_state_t*)&DMACTL1; return s; } async command void DmaControl.reset(){ DMACTL0 = 0; DMACTL1 = 0; } } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/HplMsp430DmaXP.nc000066400000000000000000000160631207233610700223370ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre * @author Mark Hays * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ */ generic module HplMsp430DmaXP( uint16_t DMAxCTL_addr, uint16_t DMAxSA_addr, uint16_t DMAxDA_addr, uint16_t DMAxSZ_addr, uint16_t DMAxTSEL_mask, uint16_t DMAxTSEL_shift ) @safe() { provides interface HplMsp430DmaChannel as DMA; uses interface HplMsp430DmaInterrupt as Interrupt; } implementation { MSP430REG_NORACE( DMACTL0 ); #define DMAxCTL (*(volatile TYPE_DMA0CTL*)DMAxCTL_addr) #define DMAxSA (*(volatile TYPE_DMA0SA*)DMAxSA_addr) #define DMAxDA (*(volatile TYPE_DMA0DA*)DMAxDA_addr) #define DMAxSZ (*(volatile TYPE_DMA0SZ*)DMAxSZ_addr) async event void Interrupt.fired() { error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS; if ( DMAxCTL & DMAIFG ) { DMAxCTL &= ~DMAIFG; DMAxCTL &= ~DMAABORT; signal DMA.transferDone( error ); } } async error_t command DMA.setTrigger( dma_trigger_t trigger ) { if ( DMAxCTL & DMAEN ) return FAIL; DMACTL0 = ( ( DMACTL0 & ~DMAxTSEL_mask ) | ( ( trigger << DMAxTSEL_shift ) & DMAxTSEL_mask ) ); return SUCCESS; } async command void DMA.clearTrigger() { DMACTL0 &= ~DMAxTSEL_mask; } async command void DMA.setSingleMode() { DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); DMAxCTL |= DMA_SINGLE_TRANSFER; } async command void DMA.setBlockMode() { DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); DMAxCTL |= DMA_BLOCK_TRANSFER; } async command void DMA.setBurstMode() { DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); DMAxCTL |= DMA_BURST_BLOCK_TRANSFER; } async command void DMA.setRepeatedSingleMode() { DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); DMAxCTL |= DMA_REPEATED_SINGLE_TRANSFER; } async command void DMA.setRepeatedBlockMode() { DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); DMAxCTL |= DMA_REPEATED_BLOCK_TRANSFER; } async command void DMA.setRepeatedBurstMode() { DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 ); DMAxCTL |= DMA_REPEATED_BURST_BLOCK_TRANSFER; } async command void DMA.setSrcNoIncrement() { DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); DMAxCTL |= DMA_ADDRESS_UNCHANGED; } async command void DMA.setSrcDecrement() { DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); DMAxCTL |= DMA_ADDRESS_DECREMENTED; } async command void DMA.setSrcIncrement() { DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 ); DMAxCTL |= DMA_ADDRESS_INCREMENTED; } async command void DMA.setDstNoIncrement() { DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); DMAxCTL |= DMA_ADDRESS_UNCHANGED; } async command void DMA.setDstDecrement() { DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); DMAxCTL |= DMA_ADDRESS_DECREMENTED; } async command void DMA.setDstIncrement() { DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 ); DMAxCTL |= DMA_ADDRESS_INCREMENTED; } async command void DMA.setWordToWord() { DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); DMAxCTL |= DMASWDW; } async command void DMA.setByteToWord() { DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); DMAxCTL |= DMASBDW; } async command void DMA.setWordToByte() { DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); DMAxCTL |= DMASWDB; } async command void DMA.setByteToByte() { DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE); DMAxCTL |= DMASBDB; } async command void DMA.setEdgeSensitive() { DMAxCTL &= ~DMALEVEL; } async command void DMA.setLevelSensitive() { DMAxCTL |= DMALEVEL; } async command void DMA.enableDMA() { DMAxCTL |= DMAEN; } async command void DMA.disableDMA() { DMAxCTL &= ~DMAEN; } async command void DMA.enableInterrupt() { DMAxCTL |= DMAIE; } async command void DMA.disableInterrupt() { DMAxCTL &= ~DMAIE; } async command bool DMA.interruptPending() { return !!( DMAxCTL & DMAIFG ); } async command bool DMA.aborted() { return !!( DMAxCTL & DMAABORT ); } async command void DMA.triggerDMA() { DMAxCTL |= DMAREQ; } async command void DMA.setSrc( void *saddr ) { DMAxSA = (uint16_t)saddr; } async command void DMA.setDst( void *daddr ) { DMAxDA = (uint16_t)daddr; } async command void DMA.setSize( uint16_t sz ) { DMAxSZ = sz; } async command void DMA.setState( dma_channel_state_t s, dma_channel_trigger_t t, void* src, void* dest, uint16_t size ) { call DMA.setStateRaw( *(uint16_t*)&s, *(uint16_t*)&t, src, dest, size); } async command void DMA.setStateRaw( uint16_t s, uint16_t t, void* src, void* dest, uint16_t size ) { DMAxSA = (uint16_t)src; DMAxDA = (uint16_t)dest; DMAxSZ = size; call DMA.setTrigger((dma_trigger_t) t); DMAxCTL = s; } async command dma_channel_state_t DMA.getState() { dma_channel_state_t s = *(dma_channel_state_t*) &DMAxCTL; return s; } async command void* DMA.getSource() { return (void*)DMAxSA; } async command void* DMA.getDestination() { return (void*)DMAxDA; } async command uint16_t DMA.getSize() { return DMAxSZ; } async command dma_channel_trigger_t DMA.getTrigger() { dma_channel_trigger_t t; t.trigger = ( DMACTL0 & DMAxTSEL_mask ) >> DMAxTSEL_shift; return t; } async command void DMA.reset() { DMAxCTL = 0; DMAxSA = 0; DMAxDA = 0; DMAxSZ = 0; } } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/Msp430Dma.h000066400000000000000000000131421207233610700212450ustar00rootroot00000000000000/** * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the COPYRIGHT HOLDERS nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDERS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Ben Greenstein * @author Jonathan Hui * @author Mark Hays * @author Xavier Orduna * $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $ */ #ifndef MSP430DMA_H #define MSP430DMA_H // General stuff enum { DMA_CHANNELS = 3 }; enum { DMA_CHANNEL0 = 0, DMA_CHANNEL1 = 1, DMA_CHANNEL2 = 2, DMA_CHANNEL_UNKNOWN = 3 }; enum { DMA_CHANNEL_AVAILABLE = 0, DMA_CHANNEL_IN_USE = 1 }; //////////////////////////////////////// // Per-channel fields in DMACTL0 enum { DMA0TSEL_SHIFT = 0, DMA1TSEL_SHIFT = 4, DMA2TSEL_SHIFT = 8, DMATSEL_MASK = (uint16_t)0xf, DMA0TSEL_MASK = ( 0xf ), DMA1TSEL_MASK = ( 0xf0 ), DMA2TSEL_MASK = ( 0xf00 ), }; // Per-field (channel) in DMACTL0 typedef enum { DMA_TRIGGER_DMAREQ = 0x0, // software trigger DMA_TRIGGER_TACCR2 = 0x1, DMA_TRIGGER_TBCCR2 = 0x2, #if defined(__msp430x261x) DMA_TRIGGER_UCA0RXIFG = 0x3, // RX on USCIA0 (UART/SPI) DMA_TRIGGER_UCA0TXIFG = 0x4, // TX on USCIA0 (UART/SPI) #else DMA_TRIGGER_URXIFG0 = 0x3, // RX on USART0 (UART/SPI) DMA_TRIGGER_UTXIFG0 = 0x4, // TX on USART0 (UART/SPI) #endif DMA_TRIGGER_DAC12IFG = 0x5, // DAC12_0CTL DAC12IFG bit DMA_TRIGGER_ADC12IFGx = 0x6, DMA_TRIGGER_TACCR0 = 0x7, // CCIFG bit DMA_TRIGGER_TBCCR0 = 0x8, // CCIFG bit #if defined(__msp430x261x) DMA_TRIGGER_UCB0RXIFG = 0x9, // RX on USCIB0 (UART/SPI) DMA_TRIGGER_UCB0TXIFG = 0xa, // TX on USCIB0 (UART/SPI) #else DMA_TRIGGER_URXIFG1 = 0x9, // RX on USART1 (UART/SPI) DMA_TRIGGER_UTXIFG1 = 0xa, // TX on USART1 (UART/SPI) #endif DMA_TRIGGER_MULT = 0xb, // Hardware Multiplier Ready DMA_TRIGGER_DMAxIFG = 0xe, // DMA0IFG triggers DMA channel 1 // DMA1IFG triggers DMA channel 2 // DMA2IFG triggers DMA channel 0 DMA_TRIGGER_DMAE0 = 0xf // External Trigger DMAE0 } dma_trigger_t; typedef struct dma_channel_trigger_s { unsigned int trigger : 4; unsigned int reserved : 12; } __attribute__ ((packed)) dma_channel_trigger_t; //////////////////////////////////////// // Bits in DMACTL1 enum { DISABLE_NMI = 0, ENABLE_NMI = 1, }; enum { NOT_ROUND_ROBIN = 0, ROUND_ROBIN = 1, }; enum { NOT_ON_FETCH = 0, ON_FETCH = 1, }; typedef struct dma_state_s { unsigned int enableNMI : 1; unsigned int roundRobin : 1; unsigned int onFetch : 1; unsigned int reserved : 13; } __attribute__ ((packed)) dma_state_t; //////////////////////////////////////// // Stuff in DMAxCTL // DMADTx enum { DMADT_SHIFT = 12, DMADT_MASK = 0x7, }; typedef enum { DMA_SINGLE_TRANSFER = 0x0, DMA_BLOCK_TRANSFER = 0x1, DMA_BURST_BLOCK_TRANSFER = 0x2, DMA_REPEATED_SINGLE_TRANSFER = 0x4, DMA_REPEATED_BLOCK_TRANSFER = 0x5, DMA_REPEATED_BURST_BLOCK_TRANSFER = 0x7 } dma_transfer_mode_t; // DMA{SRC,DST}INCRx enum { DMASRCINCR_SHIFT = 8, DMADSTINCR_SHIFT = 10, DMAINCR_MASK = 0x3, }; typedef enum { DMA_ADDRESS_UNCHANGED = 0x0, DMA_ADDRESS_DECREMENTED = 0x2, DMA_ADDRESS_INCREMENTED = 0x3 } dma_incr_t; typedef enum { DMA_WORD = 0x0, DMA_BYTE = 0x1 } dma_byte_t; // DMALEVEL typedef enum { DMA_EDGE_SENSITIVE = 0x0, DMA_LEVEL_SENSITIVE = 0x1 } dma_level_t; typedef struct dma_channel_state_s { unsigned int request : 1; unsigned int abort : 1; unsigned int interruptEnable : 1; unsigned int interruptFlag : 1; unsigned int enable : 1; unsigned int level : 1; /* or edge- triggered */ unsigned int srcByte : 1; /* or word */ unsigned int dstByte : 1; unsigned int srcIncrement : 2; /* or no-increment, decrement */ unsigned int dstIncrement : 2; unsigned int transferMode : 3; unsigned int reserved2 : 1; } __attribute__ ((packed)) dma_channel_state_t; #endif tinyos-2.1.2+dfsg/tos/chips/msp430/dma/Msp430DmaC.nc000066400000000000000000000060131207233610700215200ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the HAL level component for the MSP430 DMA module. * This configuration provides the available DMA channels through the * MSP430DMA parameterized interface. If more channels are requested * than available through unique("DMA"), there will be no mapping for * that channel and compilation will fail. * * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ configuration Msp430DmaC { provides interface Msp430DmaControl as Control; provides interface Msp430DmaChannel as Channel0; provides interface Msp430DmaChannel as Channel1; provides interface Msp430DmaChannel as Channel2; } implementation { components HplMsp430DmaC as HplDmaC; components new Msp430DmaChannelP() as Channel0P; Channel0 = Channel0P; Channel0P.HplChannel -> HplDmaC.Channel0; components new Msp430DmaChannelP() as Channel1P; Channel1 = Channel1P; Channel1P.HplChannel -> HplDmaC.Channel1; components new Msp430DmaChannelP() as Channel2P; Channel2 = Channel2P; Channel2P.HplChannel -> HplDmaC.Channel2; components Msp430DmaControlP as ControlP; Control = ControlP; ControlP.HplControl -> HplDmaC; ControlP.HplChannel0 -> HplDmaC.Channel0; ControlP.HplChannel1 -> HplDmaC.Channel1; ControlP.HplChannel2 -> HplDmaC.Channel2; } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/Msp430DmaChannel.nc000066400000000000000000000076361207233610700227220ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @author Joe Polastre * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ #include "Msp430Dma.h" interface Msp430DmaChannel { /** * Setup a transfer using explicit argument (most robust and simple * mechanism and recommended for novice users) * * See MSP430DMA.h for parameter options */ async command error_t setupTransfer( dma_transfer_mode_t transfer_mode, dma_trigger_t trigger, dma_level_t level, void *src_addr, void *dst_addr, uint16_t size, dma_byte_t src_byte, dma_byte_t dst_byte, dma_incr_t src_incr, dma_incr_t dst_incr ); /** * Raw interface for setting up a DMA transfer. This function is * intended to provide as much raw performance as possible but * sacrifices type checking in the process. Recommended ONLY for * advanced users that have very intricate knowledge of the MSP430 * DMA module described in the user's guide. * * @param state The control register value, as specified by * dma_control_state_t in MSP430DMA.h * @param trigger The trigger for the DMA transfer. Should be one * of the options from dma_trigger_t in MSP430DMA.h * @param src Pointer to the source address * @param dest Pointer to the destination address * @param size Size of the DMA transfer * * See MSP430DMA.h for parameter options */ async command void setupTransferRaw( uint16_t state, uint16_t trigger, void* src, void* dest, int size ); /** * Enable the DMA module. Equivalent to setting the DMA enable bit. * This function does not force a transfer. */ async command error_t startTransfer(); /** * Repeat a DMA transfer using previous settings but new pointers * and transfer size. Automatically starts the transfer (sets the * enable bit). */ async command error_t repeatTransfer( void *src_addr, void *dst_addr, uint16_t size ); /** * Trigger a DMA transfer using software */ async command error_t softwareTrigger(); /** * Stop a DMA transfer in progress */ async command error_t stopTransfer(); /** * Notification that the transfer has completed */ async event void transferDone(error_t success); } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/Msp430DmaChannelP.nc000066400000000000000000000103751207233610700230340ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ #include "Msp430Dma.h" generic module Msp430DmaChannelP() { provides interface Msp430DmaChannel as Channel; uses interface HplMsp430DmaChannel as HplChannel; } implementation { norace dma_channel_state_t gChannelState; norace dma_channel_trigger_t gChannelTrigger; async command void Channel.setupTransferRaw( uint16_t s, uint16_t t, void* src, void* dest, int size ) { call HplChannel.setStateRaw( s, t, src, dest, size ); } async command error_t Channel.setupTransfer( dma_transfer_mode_t transfer_mode, dma_trigger_t trigger, dma_level_t level, void *src_addr, void *dst_addr, uint16_t size, dma_byte_t src_byte, dma_byte_t dst_byte, dma_incr_t src_incr, dma_incr_t dst_incr ) { gChannelState.request = 0; gChannelState.abort = 0; gChannelState.interruptEnable = 1; gChannelState.interruptFlag = 0; gChannelState.enable = 0; /* don't start an xfer */ gChannelState.level = level; gChannelState.srcByte = src_byte; gChannelState.dstByte = dst_byte; gChannelState.srcIncrement = src_incr; gChannelState.dstIncrement = dst_incr; gChannelState.transferMode = transfer_mode; gChannelTrigger.trigger = trigger; call HplChannel.setState( gChannelState, gChannelTrigger, src_addr, dst_addr, size ); return SUCCESS; } async command error_t Channel.startTransfer() { call HplChannel.enableDMA(); return SUCCESS; } async command error_t Channel.repeatTransfer( void *src_addr, void *dst_addr, uint16_t size ) { call HplChannel.setSrc( src_addr ); call HplChannel.setDst(dst_addr); call HplChannel.setSize(size); call HplChannel.enableDMA(); return SUCCESS; } async command error_t Channel.softwareTrigger() { if (gChannelTrigger.trigger != DMA_TRIGGER_DMAREQ) return FAIL; call HplChannel.triggerDMA(); return SUCCESS; } async command error_t Channel.stopTransfer() { if ( gChannelState.transferMode != DMA_BURST_BLOCK_TRANSFER || gChannelState.transferMode != DMA_REPEATED_BURST_BLOCK_TRANSFER) return FAIL; call HplChannel.disableDMA(); return SUCCESS; } async event void HplChannel.transferDone( error_t error ) { signal Channel.transferDone( error ); } default async event void Channel.transferDone( error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/Msp430DmaControl.nc000066400000000000000000000035651207233610700227670ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ #include "Msp430Dma.h" interface Msp430DmaControl { async command void init(); async command void setFlags( bool enable_nmi, bool round_robin, bool on_fetch); } tinyos-2.1.2+dfsg/tos/chips/msp430/dma/Msp430DmaControlP.nc000066400000000000000000000057161207233610700231070ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $ */ #include "Msp430Dma.h" module Msp430DmaControlP { provides interface Msp430DmaControl as Control; uses interface HplMsp430DmaControl as HplControl; uses interface HplMsp430DmaChannel as HplChannel0; uses interface HplMsp430DmaChannel as HplChannel1; uses interface HplMsp430DmaChannel as HplChannel2; } implementation { async command void Control.init() { call HplControl.reset(); call HplChannel0.reset(); call HplChannel1.reset(); call HplChannel2.reset(); } async command void Control.setFlags( bool enable_nmi, bool round_robin, bool on_fetch ) { // NOTE: on_fetch must be true when dst addr is flash if (enable_nmi) call HplControl.setENNMI(); else call HplControl.clearENNMI(); if (round_robin) call HplControl.setRoundRobin(); else call HplControl.clearRoundRobin(); if (on_fetch) call HplControl.setOnFetch(); else call HplControl.clearOnFetch(); } async event void HplChannel0.transferDone( error_t error ) {} async event void HplChannel1.transferDone( error_t error ) {} async event void HplChannel2.transferDone( error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/msp430hardware.h000066400000000000000000000374171207233610700216530ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // @author Vlado Handziski // @author Joe Polastre // @author Cory Sharp #ifndef _H_msp430hardware_h #define _H_msp430hardware_h #if defined(__MSPGCC__) /* mspgcc */ #include #include #else /* __MSPGCC__ */ /* old mspgcc3, forked mspgcc4 */ #include #include #endif /* __MSPGCC__ */ #include "msp430regtypes.h" #ifdef __MSP430_TI_HEADERS__ /* TI's msp430 headers define FAIL to be 0x80 in the flash module. * I'd prefer that it match the value assigned to it in the * TinyError.h. */ #undef FAIL /* Accommodate old gcc alias */ #define MC_STOP MC__STOP /* Port registers in MSP430 chips have two naming conventions: by * number (e.g., P1IN), and by letter (e.g. PAIN). The numeric-named * registers provide 8-bit values, while the alpha-named registers * provide 16-bit values. * * The headers for certain chips define numeric-named registers. * * In a very few cases, both numeric-named and alpha-named registers * are defined. By inspection, this occurs only for PAIN, which * combines P7IN (at the address of PAIN) and P8IN (at 1+&PAIN); and * for PBIN, which combines P9IN (at the address of PBIN) and P10IN * (at 1+&PBIN). * * In more recent chips, only alpha-named registers are provided. * Since the current TinyOS MSP430 port interface assumes 8-bit * registers, by convention we map numeric-named registers to the * alpha-named registers beginning with PAIN==P1IN. */ #if defined(__MSP430_HAS_PORTA__) || defined(__MSP430_HAS_PORTA_R__) #if (! defined(P1IN_)) && (defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)) #define P1IN_ (uint16_t)(PAIN_) #define P1OUT_ (uint16_t)(PAOUT_) #define P1DIR_ (uint16_t)(PADIR_) #define P1SEL_ (uint16_t)(PASEL_) #if defined(__MSP430_HAS_PORT1_R__) #define P1REN_ (uint16_t)(PAREN_) #endif /* __MSP430_HAS_PORT1_R__ */ #endif /* __MSP430_HAS_PORT1__ */ #if (! defined(P2IN_)) && (defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)) #define P2IN_ (uint16_t)(PAIN_+1) #define P2OUT_ (uint16_t)(PAOUT_+1) #define P2DIR_ (uint16_t)(PADIR_+1) #define P2SEL_ (uint16_t)(PASEL_+1) #if defined(__MSP430_HAS_PORT2_R__) #define P2REN_ (uint16_t)(PAREN_+1) #endif /* __MSP430_HAS_PORT2_R__ */ #endif /* __MSP430_HAS_PORT2__ */ #endif /* __MSP430_HAS_PORTA__ */ #if defined(__MSP430_HAS_PORTB__) || defined(__MSP430_HAS_PORTB_R__) #if (! defined(P3IN_)) && (defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)) #define P3IN_ (uint16_t)(PBIN_) #define P3OUT_ (uint16_t)(PBOUT_) #define P3DIR_ (uint16_t)(PBDIR_) #define P3SEL_ (uint16_t)(PBSEL_) #if defined(__MSP430_HAS_PORT3_R__) #define P3REN_ (uint16_t)(PBREN_) #endif /* __MSP430_HAS_PORT3_R__ */ #endif /* __MSP430_HAS_PORT3__ */ #if (! defined(P4IN_)) && (defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)) #define P4IN_ (uint16_t)(PBIN_+1) #define P4OUT_ (uint16_t)(PBOUT_+1) #define P4DIR_ (uint16_t)(PBDIR_+1) #define P4SEL_ (uint16_t)(PBSEL_+1) #if defined(__MSP430_HAS_PORT4_R__) #define P4REN_ (uint16_t)(PBREN_+1) #endif /* __MSP430_HAS_PORT4_R__ */ #endif /* __MSP430_HAS_PORT4__ */ #endif /* __MSP430_HAS_PORTB__ */ #if defined(__MSP430_HAS_PORTC__) || defined(__MSP430_HAS_PORTC_R__) #if (! defined(P5IN_)) && (defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)) #define P5IN_ (uint16_t)(PCIN_) #define P5OUT_ (uint16_t)(PCOUT_) #define P5DIR_ (uint16_t)(PCDIR_) #define P5SEL_ (uint16_t)(PCSEL_) #if defined(__MSP430_HAS_PORT5_R__) #define P5REN_ (uint16_t)(PCREN_) #endif /* __MSP430_HAS_PORT5_R__ */ #endif /* __MSP430_HAS_PORT5__ */ #if (! defined(P6IN_)) && (defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)) #define P6IN_ (uint16_t)(PCIN_+1) #define P6OUT_ (uint16_t)(PCOUT_+1) #define P6DIR_ (uint16_t)(PCDIR_+1) #define P6SEL_ (uint16_t)(PCSEL_+1) #if defined(__MSP430_HAS_PORT6_R__) #define P6REN_ (uint16_t)(PCREN_+1) #endif /* __MSP430_HAS_PORT6_R__ */ #endif /* __MSP430_HAS_PORT6__ */ #endif /* __MSP430_HAS_PORTC__ */ #if defined(__MSP430_HAS_PORTD__) || defined(__MSP430_HAS_PORTD_R__) #if (! defined(P7IN_)) && (defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__)) #define P7IN_ (uint16_t)(PDIN_) #define P7OUT_ (uint16_t)(PDOUT_) #define P7DIR_ (uint16_t)(PDDIR_) #define P7SEL_ (uint16_t)(PDSEL_) #if defined(__MSP430_HAS_PORT7_R__) #define P7REN_ (uint16_t)(PDREN_) #endif /* __MSP430_HAS_PORT7_R__ */ #endif /* __MSP430_HAS_PORT7__ */ #if (! defined(P8IN_)) && (defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__)) #define P8IN_ (uint16_t)(PDIN_+1) #define P8OUT_ (uint16_t)(PDOUT_+1) #define P8DIR_ (uint16_t)(PDDIR_+1) #define P8SEL_ (uint16_t)(PDSEL_+1) #if defined(__MSP430_HAS_PORT8_R__) #define P8REN_ (uint16_t)(PDREN_+1) #endif /* __MSP430_HAS_PORT8_R__ */ #endif /* __MSP430_HAS_PORT8__ */ #endif /* __MSP430_HAS_PORTD__ */ #if defined(__MSP430_HAS_PORTE__) || defined(__MSP430_HAS_PORTE_R__) #if (! defined(P9IN_)) && (defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__)) #define P9IN_ (uint16_t)(PEIN_) #define P9OUT_ (uint16_t)(PEOUT_) #define P9DIR_ (uint16_t)(PEDIR_) #define P9SEL_ (uint16_t)(PESEL_) #if defined(__MSP430_HAS_PORT9_R__) #define P9REN_ (uint16_t)(PEREN_) #endif /* __MSP430_HAS_PORT9_R__ */ #endif /* __MSP430_HAS_PORT9__ */ #if (! defined(P10IN_)) && (defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__)) #define P10IN_ (uint16_t)(PEIN_+1) #define P10OUT_ (uint16_t)(PEOUT_+1) #define P10DIR_ (uint16_t)(PEDIR_+1) #define P10SEL_ (uint16_t)(PESEL_+1) #if defined(__MSP430_HAS_PORT10_R__) #define P10REN_ (uint16_t)(PEREN_+1) #endif /* __MSP430_HAS_PORT10_R__ */ #endif /* __MSP430_HAS_PORT10__ */ #endif /* __MSP430_HAS_PORTE__ */ #if defined(__MSP430_HAS_PORTF__) || defined(__MSP430_HAS_PORTF_R__) #if (! defined(P11IN_)) && (defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__)) #define P11IN_ (uint16_t)(PFIN_) #define P11OUT_ (uint16_t)(PFOUT_) #define P11DIR_ (uint16_t)(PFDIR_) #define P11SEL_ (uint16_t)(PFSEL_) #if defined(__MSP430_HAS_PORT11_R__) #define P11REN_ (uint16_t)(PFREN_) #endif /* __MSP430_HAS_PORT11_R__ */ #endif /* __MSP430_HAS_PORT11__ */ #if (! defined(P12IN_)) && (defined(__MSP430_HAS_PORT12__) || defined(__MSP430_HAS_PORT12_R__)) #define P12IN_ (uint16_t)(PFIN_+1) #define P12OUT_ (uint16_t)(PFOUT_+1) #define P12DIR_ (uint16_t)(PFDIR_+1) #define P12SEL_ (uint16_t)(PFSEL_+1) #if defined(__MSP430_HAS_PORT12_R__) #define P12REN_ (uint16_t)(PFREN_+1) #endif /* __MSP430_HAS_PORT12_R__ */ #endif /* __MSP430_HAS_PORT12__ */ #endif /* __MSP430_HAS_PORTF__ */ #endif /* __MSP430_TI_HEADERS__ */ // CPU memory-mapped register access will cause nesc to issue race condition // warnings. Race conditions are a significant conern when accessing CPU // memory-mapped registers, because they can change even while interrupts // are disabled. This means that the standard nesc tools for resolving race // conditions, atomic statements that disable interrupt handling, do not // resolve CPU register race conditions. So, CPU registers access must be // treated seriously and carefully. // The macro MSP430REG_NORACE allows individual modules to internally // redeclare CPU registers as norace, eliminating nesc's race condition // warnings for their access. This macro should only be used after the // specific CPU register use has been verified safe and correct. Example // use: // // module MyLowLevelModule // { // // ... // } // implementation // { // MSP430REG_NORACE(TACCTL0); // // ... // } #undef norace #define MSP430REG_NORACE_EXPAND(type,name,addr) \ norace static volatile type name asm(#addr) #define MSP430REG_NORACE3(type,name,addr) \ MSP430REG_NORACE_EXPAND(type,name,addr) // MSP430REG_NORACE and MSP430REG_NORACE2 presume naming conventions among // type, name, and addr, which are defined in the local header // msp430regtypes.h and mspgcc's header io.h and its children. #define MSP430REG_NORACE2(rename,name) \ MSP430REG_NORACE3(TYPE_##name,rename,name##_) #define MSP430REG_NORACE(name) \ MSP430REG_NORACE3(TYPE_##name,name,name##_) // Avoid the type-punned pointer warnings from gcc 3.3, which are warning about // creating potentially broken object code. Union casts are the appropriate work // around. Unfortunately, they require a function definiton. #define DEFINE_UNION_CAST(func_name,to_type,from_type) \ to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f:x}; return c.t; } // redefine ugly defines from msp-gcc #ifndef DONT_REDEFINE_SR_FLAGS #undef C #undef Z #undef N #undef V #undef GIE #undef CPUOFF #undef OSCOFF #undef SCG0 #undef SCG1 #undef LPM0_bits #undef LPM1_bits #undef LPM2_bits #undef LPM3_bits #undef LPM4_bits #define SR_C 0x0001 #define SR_Z 0x0002 #define SR_N 0x0004 #define SR_V 0x0100 #define SR_GIE 0x0008 #define SR_CPUOFF 0x0010 #define SR_OSCOFF 0x0020 #define SR_SCG0 0x0040 #define SR_SCG1 0x0080 #define LPM0_bits SR_CPUOFF #define LPM1_bits SR_SCG0+SR_CPUOFF #define LPM2_bits SR_SCG1+SR_CPUOFF #define LPM3_bits SR_SCG1+SR_SCG0+SR_CPUOFF #define LPM4_bits SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF #endif//DONT_REDEFINE_SR_FLAGS #ifdef interrupt #undef interrupt #endif #ifdef wakeup #undef wakeup #endif #ifdef signal #undef signal #endif // Re-definitions for safe tinyOS // These rely on io.h being included at the top of this file // thus pulling the affected header files before the re-definitions #ifdef SAFE_TINYOS #undef ADC12MEM #define ADC12MEM TCAST(int* ONE, ADC12MEM_) /* ADC12 Conversion Memory (for C) */ #undef ADC12MCTL #define ADC12MCTL TCAST(char * ONE, ADC12MCTL_) #endif // define platform constants that can be changed for different compilers // these are all msp430-gcc specific (add as necessary) #if defined(__msp430_headers_adc10_h) || defined(__MSP430_HAS_ADC10__) #define __msp430_have_adc10 #endif #if defined(__msp430_headers_adc12_h) || defined(__MSP430_HAS_ADC12__) #define __msp430_have_adc12 #endif // backwards compatibility to older versions of the header files #ifdef __MSP430_HAS_I2C__ #define __msp430_have_usart0_with_i2c #endif // I2CBusy flag is not defined by current MSP430-GCC #ifdef __msp430_have_usart0_with_i2c #ifndef I2CBUSY #define I2CBUSY (0x01 << 5) #endif MSP430REG_NORACE2(U0CTLnr,U0CTL); MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL); MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL); #endif // The signal attribute has opposite meaning in msp430-gcc than in avr-gcc #define TOSH_SIGNAL(signame) \ void sig_##signame() __attribute__((interrupt (signame), wakeup)) @C() // TOSH_INTERRUPT allows nested interrupts #define TOSH_INTERRUPT(signame) \ void isr_##signame() __attribute__((interrupt (signame), signal, wakeup)) @C() #define SET_FLAG(port, flag) ((port) |= (flag)) #define CLR_FLAG(port, flag) ((port) &= ~(flag)) #define READ_FLAG(port, flag) ((port) & (flag)) // TOSH_ASSIGN_PIN creates functions that are effectively marked as // "norace". This means race conditions that result from their use will not // be detectde by nesc. #define TOSH_ASSIGN_PIN_HEX(name, port, hex) \ void TOSH_SET_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \ void TOSH_CLR_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r &= ~hex; } \ void TOSH_TOGGLE_##name##_PIN() @safe(){ MSP430REG_NORACE2(r,P##port##OUT); r ^= hex; } \ uint8_t TOSH_READ_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##IN); return (r & hex); } \ void TOSH_MAKE_##name##_OUTPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r |= hex; } \ void TOSH_MAKE_##name##_INPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r &= ~hex; } \ void TOSH_SEL_##name##_MODFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r |= hex; } \ void TOSH_SEL_##name##_IOFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r &= ~hex; } #define TOSH_ASSIGN_PIN(name, port, bit) \ TOSH_ASSIGN_PIN_HEX(name,port,(1<<(bit))) typedef uint8_t mcu_power_t @combine("mcombine"); mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() { return (m1 < m2) ? m1: m2; } enum { MSP430_POWER_ACTIVE = 0, MSP430_POWER_LPM0 = 1, MSP430_POWER_LPM1 = 2, MSP430_POWER_LPM2 = 3, MSP430_POWER_LPM3 = 4, MSP430_POWER_LPM4 = 5 }; void __nesc_disable_interrupt(void) @safe() { dint(); nop(); } void __nesc_enable_interrupt(void) @safe() { eint(); } typedef bool __nesc_atomic_t; __nesc_atomic_t __nesc_atomic_start(void); void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts); #ifndef NESC_BUILD_BINARY /* @spontaneous() functions should not be included when NESC_BUILD_BINARY is #defined, to avoid duplicate functions definitions when binary components are used. Such functions do need a prototype in all cases, though. */ __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe() { __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0); __nesc_disable_interrupt(); asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ return result; } void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe() { asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ if( reenable_interrupts ) __nesc_enable_interrupt(); } #endif /* Floating-point network-type support. These functions must convert to/from a 32-bit big-endian integer that follows the layout of Java's java.lang.float.floatToRawIntBits method. Conveniently, for the MSP430 family, this is a straight byte copy... */ typedef float nx_float __attribute__((nx_base_be(afloat))); inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() { float f; memcpy(&f, source, sizeof(float)); return f; } inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() { memcpy(target, &value, sizeof(float)); return value; } /* Support for chips with configurable resistors on digital inputs. These * are denoted with __MSP430_HAS_PORT1_R__ and similar defines. */ enum { MSP430_PORT_RESISTOR_INVALID, /**< Hardware does not support resistor control, or pin is output */ MSP430_PORT_RESISTOR_OFF, /**< Resistor disabled */ MSP430_PORT_RESISTOR_PULLDOWN, /**< Pulldown resistor enabled */ MSP430_PORT_RESISTOR_PULLUP, /**< Pullup resistor enabled */ }; #endif//_H_msp430hardware_h tinyos-2.1.2+dfsg/tos/chips/msp430/msp430regtypes.h000066400000000000000000000421261207233610700217110ustar00rootroot00000000000000 /** * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Cory Sharp * @author Xavier Orduna * @author Eric B. Decker */ #ifndef _H_msp430regtypes_h #define _H_msp430regtypes_h /* To generate the primary contents of this file seen below, in mspgcc/msp430/include/, execute the following command: find . | xargs perl -ne ' BEGIN { %t = qw(b uint8_t w uint16_t); } if( /\bsfr([bw])\s*\(\s*(\w+)/ && length($2) > 1 ) { $r{$2} = $t{$1}; print "#define TYPE_$2 $t{$1}\n" if /\bsfr([bw])\s*\(\s*(\w+)/; } elsif( /^#define\s+(\w+)\s+(\w+)\s+$/ ) { print "#define TYPE_$1 $r{$2}\n" if $r{$2}; } ' | sort -u */ #define TYPE_ACTL uint16_t #define TYPE_ADAT uint16_t #define TYPE_ADC10AE uint8_t #define TYPE_ADC10CTL0 uint16_t #define TYPE_ADC10CTL1 uint16_t #define TYPE_ADC10DTC0 uint8_t #define TYPE_ADC10DTC1 uint8_t #define TYPE_ADC10MEM uint16_t #define TYPE_ADC10SA uint16_t #define TYPE_ADC12CTL0 uint16_t #define TYPE_ADC12CTL1 uint16_t #define TYPE_ADC12IE uint16_t #define TYPE_ADC12IFG uint16_t #define TYPE_ADC12IV uint16_t #define TYPE_ADC12MCTL0 uint8_t #define TYPE_ADC12MCTL1 uint8_t #define TYPE_ADC12MCTL10 uint8_t #define TYPE_ADC12MCTL11 uint8_t #define TYPE_ADC12MCTL12 uint8_t #define TYPE_ADC12MCTL13 uint8_t #define TYPE_ADC12MCTL14 uint8_t #define TYPE_ADC12MCTL15 uint8_t #define TYPE_ADC12MCTL2 uint8_t #define TYPE_ADC12MCTL3 uint8_t #define TYPE_ADC12MCTL4 uint8_t #define TYPE_ADC12MCTL5 uint8_t #define TYPE_ADC12MCTL6 uint8_t #define TYPE_ADC12MCTL7 uint8_t #define TYPE_ADC12MCTL8 uint8_t #define TYPE_ADC12MCTL9 uint8_t #define TYPE_ADC12MEM0 uint16_t #define TYPE_ADC12MEM1 uint16_t #define TYPE_ADC12MEM10 uint16_t #define TYPE_ADC12MEM11 uint16_t #define TYPE_ADC12MEM12 uint16_t #define TYPE_ADC12MEM13 uint16_t #define TYPE_ADC12MEM14 uint16_t #define TYPE_ADC12MEM15 uint16_t #define TYPE_ADC12MEM2 uint16_t #define TYPE_ADC12MEM3 uint16_t #define TYPE_ADC12MEM4 uint16_t #define TYPE_ADC12MEM5 uint16_t #define TYPE_ADC12MEM6 uint16_t #define TYPE_ADC12MEM7 uint16_t #define TYPE_ADC12MEM8 uint16_t #define TYPE_ADC12MEM9 uint16_t #define TYPE_AEN uint16_t #define TYPE_AIN uint16_t #define TYPE_BCSCTL1 uint8_t #define TYPE_BCSCTL2 uint8_t #define TYPE_BCSCTL3 uint8_t #define TYPE_BTCNT1 uint8_t #define TYPE_BTCNT2 uint8_t #define TYPE_BTCTL uint8_t #define TYPE_CACTL1 uint8_t #define TYPE_CACTL2 uint8_t #define TYPE_CALBC1_1MHZ uint8_t #define TYPE_CALBC1_8MHZ uint8_t #define TYPE_CALBC1_12MHZ uint8_t #define TYPE_CALBC1_16MHZ uint8_t #define TYPE_CALDCO_1MHZ uint8_t #define TYPE_CALDCO_8MHZ uint8_t #define TYPE_CALDCO_12MHZ uint8_t #define TYPE_CALDCO_16MHZ uint8_t #define TYPE_CAPD uint8_t #define TYPE_CBCTL uint8_t #define TYPE_CCR0 uint16_t #define TYPE_CCR1 uint16_t #define TYPE_CCR2 uint16_t #define TYPE_CCTL0 uint16_t #define TYPE_CCTL1 uint16_t #define TYPE_CCTL2 uint16_t #define TYPE_DAC12CTL0 uint16_t #define TYPE_DAC12IFG uint16_t #define TYPE_DAC12_0CTL uint16_t #define TYPE_DAC12_0DAT uint16_t #define TYPE_DAC12_1CTL uint16_t #define TYPE_DAC12_1DAT uint16_t #define TYPE_DCOCTL uint8_t #define TYPE_DMA0CTL uint16_t #define TYPE_DMA0DAL uint16_t #define TYPE_DMA0DA uint16_t #define TYPE_DMA0SAL uint16_t #define TYPE_DMA0SA uint16_t #define TYPE_DMA0SZ uint16_t #define TYPE_DMA1CTL uint16_t #define TYPE_DMA1DAL uint16_t #define TYPE_DMA1DA uint16_t #define TYPE_DMA1SAL uint16_t #define TYPE_DMA1SA uint16_t #define TYPE_DMA1SZ uint16_t #define TYPE_DMA2CTL uint16_t #define TYPE_DMA2DAL uint16_t #define TYPE_DMA2DA uint16_t #define TYPE_DMA2SAL uint16_t #define TYPE_DMA2SA uint16_t #define TYPE_DMA2SZ uint16_t #define TYPE_DMACTL0 uint16_t #define TYPE_DMACTL1 uint16_t #define TYPE_EPCTL uint8_t #define TYPE_ESPCTL uint16_t #define TYPE_FCTL1 uint16_t #define TYPE_FCTL2 uint16_t #define TYPE_FCTL3 uint16_t #define TYPE_FLL_CTL0 uint8_t #define TYPE_FLL_CTL1 uint8_t #define TYPE_I2CDCTL uint8_t #define TYPE_I2CDR uint8_t #define TYPE_I2CDRB uint8_t #define TYPE_I2CDRW uint16_t #define TYPE_I2CIE uint8_t #define TYPE_I2CIFG uint8_t #define TYPE_I2CIV uint16_t #define TYPE_I2CNDAT uint8_t #define TYPE_I2COA uint16_t #define TYPE_I2CPSC uint8_t #define TYPE_I2CSA uint16_t #define TYPE_I2CSCLH uint8_t #define TYPE_I2CSCLL uint8_t #define TYPE_I2CTCTL uint8_t #define TYPE_IE1 uint8_t #define TYPE_IE2 uint8_t #define TYPE_IFG1 uint8_t #define TYPE_IFG2 uint8_t #define TYPE_LCDACTL uint8_t #define TYPE_LCDAPCTL0 uint8_t #define TYPE_LCDAPCTL1 uint8_t #define TYPE_LCDAVCTL0 uint8_t #define TYPE_LCDAVCTL1 uint8_t #define TYPE_LCDCTL uint8_t #define TYPE_LCDM1 uint8_t #define TYPE_LCDM10 uint8_t #define TYPE_LCDM11 uint8_t #define TYPE_LCDM12 uint8_t #define TYPE_LCDM13 uint8_t #define TYPE_LCDM14 uint8_t #define TYPE_LCDM15 uint8_t #define TYPE_LCDM16 uint8_t #define TYPE_LCDM17 uint8_t #define TYPE_LCDM18 uint8_t #define TYPE_LCDM19 uint8_t #define TYPE_LCDM2 uint8_t #define TYPE_LCDM20 uint8_t #define TYPE_LCDM3 uint8_t #define TYPE_LCDM4 uint8_t #define TYPE_LCDM5 uint8_t #define TYPE_LCDM6 uint8_t #define TYPE_LCDM7 uint8_t #define TYPE_LCDM8 uint8_t #define TYPE_LCDM9 uint8_t #define TYPE_LCDMA uint8_t #define TYPE_LCDMB uint8_t #define TYPE_LCDMC uint8_t #define TYPE_LCDMD uint8_t #define TYPE_LCDME uint8_t #define TYPE_LCDMF uint8_t #define TYPE_MAC uint16_t #define TYPE_MACS uint16_t #define TYPE_MBCTL uint16_t #define TYPE_MBIN0 uint16_t #define TYPE_MBIN1 uint16_t #define TYPE_MBOUT0 uint16_t #define TYPE_MBOUT1 uint16_t #define TYPE_ME1 uint8_t #define TYPE_ME2 uint8_t #define TYPE_MPY uint16_t #define TYPE_MPYS uint16_t #define TYPE_OA0CTL0 uint8_t #define TYPE_OA0CTL1 uint8_t #define TYPE_OA1CTL0 uint8_t #define TYPE_OA1CTL1 uint8_t #define TYPE_OA2CTL0 uint8_t #define TYPE_OA2CTL1 uint8_t #define TYPE_OP2 uint16_t #define TYPE_PORT_OUT uint8_t #define TYPE_PORT_IN uint8_t #define TYPE_PORT_DIR uint8_t #define TYPE_PORT_SEL uint8_t #define TYPE_PORT_REN uint8_t #define TYPE_P0DIR uint8_t #define TYPE_P0IE uint8_t #define TYPE_P0IES uint8_t #define TYPE_P0IFG uint8_t #define TYPE_P0IN uint8_t #define TYPE_P0OUT uint8_t #define TYPE_P1DIR uint8_t #define TYPE_P1IE uint8_t #define TYPE_P1IES uint8_t #define TYPE_P1IFG uint8_t #define TYPE_P1IN uint8_t #define TYPE_P1OUT uint8_t #define TYPE_P1SEL uint8_t #define TYPE_P1REN uint8_t #define TYPE_P2DIR uint8_t #define TYPE_P2IE uint8_t #define TYPE_P2IES uint8_t #define TYPE_P2IFG uint8_t #define TYPE_P2IN uint8_t #define TYPE_P2OUT uint8_t #define TYPE_P2SEL uint8_t #define TYPE_P2REN uint8_t #define TYPE_P3DIR uint8_t #define TYPE_P3IN uint8_t #define TYPE_P3OUT uint8_t #define TYPE_P3SEL uint8_t #define TYPE_P3REN uint8_t #define TYPE_P4DIR uint8_t #define TYPE_P4IN uint8_t #define TYPE_P4OUT uint8_t #define TYPE_P4SEL uint8_t #define TYPE_P4REN uint8_t #define TYPE_P5DIR uint8_t #define TYPE_P5IN uint8_t #define TYPE_P5OUT uint8_t #define TYPE_P5SEL uint8_t #define TYPE_P5REN uint8_t #define TYPE_P6DIR uint8_t #define TYPE_P6IN uint8_t #define TYPE_P6OUT uint8_t #define TYPE_P6SEL uint8_t #define TYPE_P6REN uint8_t #define TYPE_P7DIR uint8_t #define TYPE_P7IN uint8_t #define TYPE_P7OUT uint8_t #define TYPE_P7SEL uint8_t #define TYPE_P8DIR uint8_t #define TYPE_P8IN uint8_t #define TYPE_P8OUT uint8_t #define TYPE_P8SEL uint8_t #define TYPE_P9DIR uint8_t #define TYPE_P9IN uint8_t #define TYPE_P9OUT uint8_t #define TYPE_P9SEL uint8_t /* PAIN differs from 2618 MCU and there's no PBIN */ #ifdef notdef #define TYPE_PAIN uint8_t #define TYPE_PBIN uint8_t #endif #define TYPE_RESHI uint16_t #define TYPE_RESLO uint16_t #define TYPE_RET0 uint16_t #define TYPE_RET1 uint16_t #define TYPE_RET10 uint16_t #define TYPE_RET11 uint16_t #define TYPE_RET12 uint16_t #define TYPE_RET13 uint16_t #define TYPE_RET14 uint16_t #define TYPE_RET15 uint16_t #define TYPE_RET16 uint16_t #define TYPE_RET17 uint16_t #define TYPE_RET18 uint16_t #define TYPE_RET19 uint16_t #define TYPE_RET2 uint16_t #define TYPE_RET20 uint16_t #define TYPE_RET21 uint16_t #define TYPE_RET22 uint16_t #define TYPE_RET23 uint16_t #define TYPE_RET24 uint16_t #define TYPE_RET25 uint16_t #define TYPE_RET26 uint16_t #define TYPE_RET27 uint16_t #define TYPE_RET28 uint16_t #define TYPE_RET29 uint16_t #define TYPE_RET3 uint16_t #define TYPE_RET30 uint16_t #define TYPE_RET31 uint16_t #define TYPE_RET4 uint16_t #define TYPE_RET5 uint16_t #define TYPE_RET6 uint16_t #define TYPE_RET7 uint16_t #define TYPE_RET8 uint16_t #define TYPE_RET9 uint16_t #define TYPE_RTCCTL uint8_t #define TYPE_RTCDAY uint8_t #define TYPE_RTCDOW uint8_t #define TYPE_RTCHOUR uint8_t #define TYPE_RTCMIN uint8_t #define TYPE_RTCMON uint8_t #define TYPE_RTCNT1 uint8_t #define TYPE_RTCNT2 uint8_t #define TYPE_RTCNT3 uint8_t #define TYPE_RTCNT4 uint8_t #define TYPE_RTCSEC uint8_t #define TYPE_RTCTL uint8_t #define TYPE_RTCYEARH uint8_t #define TYPE_RTCYEARL uint8_t #define TYPE_RXBUF uint8_t #define TYPE_RXBUF0 uint8_t #define TYPE_RXBUF1 uint8_t #define TYPE_RXBUF_0 uint8_t #define TYPE_RXBUF_1 uint8_t #define TYPE_SCFI0 uint8_t #define TYPE_SCFI1 uint8_t #define TYPE_SCFQCTL uint8_t #define TYPE_SD16AE uint8_t #define TYPE_SD16CCTL0 uint16_t #define TYPE_SD16CCTL1 uint16_t #define TYPE_SD16CCTL2 uint16_t #define TYPE_SD16CONF0 uint8_t #define TYPE_SD16CONF1 uint8_t #define TYPE_SD16CTL uint16_t #define TYPE_SD16INCTL0 uint8_t #define TYPE_SD16INCTL1 uint8_t #define TYPE_SD16INCTL2 uint8_t #define TYPE_SD16IV uint16_t #define TYPE_SD16MEM0 uint16_t #define TYPE_SD16MEM1 uint16_t #define TYPE_SD16MEM2 uint16_t #define TYPE_SD16PRE0 uint8_t #define TYPE_SD16PRE1 uint8_t #define TYPE_SD16PRE2 uint8_t #define TYPE_SIFCNT uint16_t #define TYPE_SIFCTL0 uint16_t #define TYPE_SIFCTL1 uint16_t #define TYPE_SIFCTL2 uint16_t #define TYPE_SIFCTL3 uint16_t #define TYPE_SIFCTL4 uint16_t #define TYPE_SIFDACR0 uint16_t #define TYPE_SIFDACR1 uint16_t #define TYPE_SIFDACR2 uint16_t #define TYPE_SIFDACR3 uint16_t #define TYPE_SIFDACR4 uint16_t #define TYPE_SIFDACR5 uint16_t #define TYPE_SIFDACR6 uint16_t #define TYPE_SIFDACR7 uint16_t #define TYPE_SIFDEBUG uint16_t #define TYPE_SIFTPSMV uint16_t #define TYPE_SIFTSM0 uint16_t #define TYPE_SIFTSM1 uint16_t #define TYPE_SIFTSM10 uint16_t #define TYPE_SIFTSM11 uint16_t #define TYPE_SIFTSM12 uint16_t #define TYPE_SIFTSM13 uint16_t #define TYPE_SIFTSM14 uint16_t #define TYPE_SIFTSM15 uint16_t #define TYPE_SIFTSM16 uint16_t #define TYPE_SIFTSM17 uint16_t #define TYPE_SIFTSM18 uint16_t #define TYPE_SIFTSM19 uint16_t #define TYPE_SIFTSM2 uint16_t #define TYPE_SIFTSM20 uint16_t #define TYPE_SIFTSM21 uint16_t #define TYPE_SIFTSM22 uint16_t #define TYPE_SIFTSM23 uint16_t #define TYPE_SIFTSM3 uint16_t #define TYPE_SIFTSM4 uint16_t #define TYPE_SIFTSM5 uint16_t #define TYPE_SIFTSM6 uint16_t #define TYPE_SIFTSM7 uint16_t #define TYPE_SIFTSM8 uint16_t #define TYPE_SIFTSM9 uint16_t #define TYPE_SUMEXT uint16_t #define TYPE_SVSCTL uint8_t #define TYPE_SWCTL uint8_t #define TYPE_TA0CCR0 uint16_t #define TYPE_TA0CCR1 uint16_t #define TYPE_TA0CCR2 uint16_t #define TYPE_TA0CCTL0 uint16_t #define TYPE_TA0CCTL1 uint16_t #define TYPE_TA0CCTL2 uint16_t #define TYPE_TA0CTL uint16_t #define TYPE_TA0IV uint16_t #define TYPE_TA0R uint16_t #define TYPE_TA1CCR0 uint16_t #define TYPE_TA1CCR1 uint16_t #define TYPE_TA1CCR2 uint16_t #define TYPE_TA1CCR3 uint16_t #define TYPE_TA1CCR4 uint16_t #define TYPE_TA1CCTL0 uint16_t #define TYPE_TA1CCTL1 uint16_t #define TYPE_TA1CCTL2 uint16_t #define TYPE_TA1CCTL3 uint16_t #define TYPE_TA1CCTL4 uint16_t #define TYPE_TA1CTL uint16_t #define TYPE_TA1IV uint16_t #define TYPE_TACCR0 uint16_t #define TYPE_TACCR1 uint16_t #define TYPE_TACCR2 uint16_t #define TYPE_TACCTL0 uint16_t #define TYPE_TACCTL1 uint16_t #define TYPE_TACCTL2 uint16_t #define TYPE_TACTL uint16_t #define TYPE_TAIV uint16_t #define TYPE_TAR uint16_t #define TYPE_TAR1 uint16_t #define TYPE_TBCCR0 uint16_t #define TYPE_TBCCR1 uint16_t #define TYPE_TBCCR2 uint16_t #define TYPE_TBCCR3 uint16_t #define TYPE_TBCCR4 uint16_t #define TYPE_TBCCR5 uint16_t #define TYPE_TBCCR6 uint16_t #define TYPE_TBCCTL0 uint16_t #define TYPE_TBCCTL1 uint16_t #define TYPE_TBCCTL2 uint16_t #define TYPE_TBCCTL3 uint16_t #define TYPE_TBCCTL4 uint16_t #define TYPE_TBCCTL5 uint16_t #define TYPE_TBCCTL6 uint16_t #define TYPE_TBCTL uint16_t #define TYPE_TBIV uint16_t #define TYPE_TBR uint16_t #define TYPE_TCCTL uint8_t #define TYPE_TLV_ADC12_1_LEN uint8_t #define TYPE_TLV_ADC12_1_TAG uint8_t #define TYPE_TLV_CHECKSUM uint16_t #define TYPE_TLV_DCO_30_LEN uint8_t #define TYPE_TLV_DCO_30_TAG uint8_t #define TYPE_TPCNT1 uint8_t #define TYPE_TPCNT2 uint8_t #define TYPE_TPCTL uint8_t #define TYPE_TPD uint8_t #define TYPE_TPE uint8_t #define TYPE_TXBUF uint8_t #define TYPE_TXBUF0 uint8_t #define TYPE_TXBUF1 uint8_t #define TYPE_TXBUF_0 uint8_t #define TYPE_TXBUF_1 uint8_t #define TYPE_U0BR0 uint8_t #define TYPE_U0BR1 uint8_t #define TYPE_U0CTL uint8_t #define TYPE_U0MCTL uint8_t #define TYPE_U0RCTL uint8_t #define TYPE_U0RXBUF uint8_t #define TYPE_U0TCTL uint8_t #define TYPE_U0TXBUF uint8_t #define TYPE_U1BR0 uint8_t #define TYPE_U1BR1 uint8_t #define TYPE_U1CTL uint8_t #define TYPE_U1MCTL uint8_t #define TYPE_U1RCTL uint8_t #define TYPE_U1RXBUF uint8_t #define TYPE_U1TCTL uint8_t #define TYPE_U1TXBUF uint8_t #define TYPE_UBR0 uint8_t #define TYPE_UBR00 uint8_t #define TYPE_UBR01 uint8_t #define TYPE_UBR0_0 uint8_t #define TYPE_UBR0_1 uint8_t #define TYPE_UBR1 uint8_t #define TYPE_UBR10 uint8_t #define TYPE_UBR11 uint8_t #define TYPE_UBR1_0 uint8_t #define TYPE_UBR1_1 uint8_t #define TYPE_UC0IE uint8_t #define TYPE_UC0IFG uint8_t #define TYPE_UC1IE uint8_t #define TYPE_UC1IFG uint8_t #define TYPE_UCA0ABCTL uint8_t #define TYPE_UCA0BR0 uint8_t #define TYPE_UCA0BR1 uint8_t #define TYPE_UCA0CTL0 uint8_t #define TYPE_UCA0CTL1 uint8_t #define TYPE_UCA0IRRCTL uint8_t #define TYPE_UCA0IRTCTL uint8_t #define TYPE_UCA0MCTL uint8_t #define TYPE_UCA0RXBUF uint8_t #define TYPE_UCA0STAT uint8_t #define TYPE_UCA0TXBUF uint8_t #define TYPE_UCA1ABCTL uint8_t #define TYPE_UCA1BR0 uint8_t #define TYPE_UCA1BR1 uint8_t #define TYPE_UCA1CTL0 uint8_t #define TYPE_UCA1CTL1 uint8_t #define TYPE_UCA1IRRCTL uint8_t #define TYPE_UCA1IRTCTL uint8_t #define TYPE_UCA1MCTL uint8_t #define TYPE_UCA1RXBUF uint8_t #define TYPE_UCA1STAT uint8_t #define TYPE_UCA1TXBUF uint8_t #define TYPE_UCB0BR0 uint8_t #define TYPE_UCB0BR1 uint8_t #define TYPE_UCB0CTL0 uint8_t #define TYPE_UCB0CTL1 uint8_t #define TYPE_UCB0I2CIE uint8_t #define TYPE_UCB0I2COA uint16_t #define TYPE_UCB0I2CSA uint16_t #define TYPE_UCB0RXBUF uint8_t #define TYPE_UCB0STAT uint8_t #define TYPE_UCB0TXBUF uint8_t #define TYPE_UCB1BR0 uint8_t #define TYPE_UCB1BR1 uint8_t #define TYPE_UCB1CTL0 uint8_t #define TYPE_UCB1CTL1 uint8_t #define TYPE_UCB1I2CIE uint8_t #define TYPE_UCB1I2COA uint16_t #define TYPE_UCB1I2CSA uint16_t #define TYPE_UCB1RXBUF uint8_t #define TYPE_UCB1STAT uint8_t #define TYPE_UCB1TXBUF uint8_t #define TYPE_UCTL uint8_t #define TYPE_UCTL0 uint8_t #define TYPE_UCTL1 uint8_t #define TYPE_UCTL_0 uint8_t #define TYPE_UCTL_1 uint8_t #define TYPE_UMCTL uint8_t #define TYPE_UMCTL0 uint8_t #define TYPE_UMCTL1 uint8_t #define TYPE_UMCTL_0 uint8_t #define TYPE_UMCTL_1 uint8_t #define TYPE_URCTL uint8_t #define TYPE_URCTL0 uint8_t #define TYPE_URCTL1 uint8_t #define TYPE_URCTL_0 uint8_t #define TYPE_URCTL_1 uint8_t #define TYPE_USICKCTL uint8_t #define TYPE_USICNT uint8_t #define TYPE_USICTL0 uint8_t #define TYPE_USICTL1 uint8_t #define TYPE_USICTL uint16_t #define TYPE_USISRH uint8_t #define TYPE_USISRL uint8_t #define TYPE_USISR uint16_t #define TYPE_UTCTL uint8_t #define TYPE_UTCTL0 uint8_t #define TYPE_UTCTL1 uint8_t #define TYPE_UTCTL_0 uint8_t #define TYPE_UTCTL_1 uint8_t #define TYPE_WDTCTL uint16_t #endif //_H_msp430regtypes_h tinyos-2.1.2+dfsg/tos/chips/msp430/pins/000077500000000000000000000000001207233610700176735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/pins/HplMsp430GeneralIO.nc000066400000000000000000000066131207233610700234030ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL for the TI MSP430 family of microprocessors. This provides an * abstraction for general-purpose I/O. * * @author Cory Sharp * @author Peter Bigot */ #include "TinyError.h" interface HplMsp430GeneralIO { /** * Set pin to high. */ async command void set(); /** * Set pin to low. */ async command void clr(); /** * Toggle pin status. */ async command void toggle(); /** * Get the port status that contains the pin. * * @return Status of the port that contains the given pin. The x'th * pin on the port will be represented in the x'th bit. */ async command uint8_t getRaw(); /** * Read pin value. * * @return TRUE if pin is high, FALSE otherwise. */ async command bool get(); /** * Set pin direction to input. */ async command void makeInput(); async command bool isInput(); /** * Set pin direction to output. */ async command void makeOutput(); async command bool isOutput(); /** * Set pin for module specific functionality. */ async command void selectModuleFunc(); async command bool isModuleFunc(); /** * Set pin for I/O functionality. */ async command void selectIOFunc(); async command bool isIOFunc(); /** * Set pin pullup / pull down resistor mode. * @param mode One of the MSP430_PORT_RESISTOR_* values * @return EINVAL if invalid mode or pin does not support resistor configuration; * FAIL if pin is not an input; * SUCCESS if pin supports resistor configuration, is an input, and mode is valid */ async command error_t setResistor(uint8_t mode); /** * Get the pin pullup / pulldown resistor mode. * * @return one of the MSP430_PORT_RESISTOR_* values */ async command uint8_t getResistor(); } tinyos-2.1.2+dfsg/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc000066400000000000000000000645071207233610700235140ustar00rootroot00000000000000/** * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL for the TI MSP430 family of microprocessors. This provides an * abstraction for general-purpose I/O. * * @author Joe Polastre * @author Xavier Orduna * @author Peter A. Bigot * @author Eric B. Decker */ configuration HplMsp430GeneralIOC { // provides all the ports as raw ports #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) provides interface HplMsp430GeneralIO as Port10; provides interface HplMsp430GeneralIO as Port11; provides interface HplMsp430GeneralIO as Port12; provides interface HplMsp430GeneralIO as Port13; provides interface HplMsp430GeneralIO as Port14; provides interface HplMsp430GeneralIO as Port15; provides interface HplMsp430GeneralIO as Port16; provides interface HplMsp430GeneralIO as Port17; #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) provides interface HplMsp430GeneralIO as Port20; provides interface HplMsp430GeneralIO as Port21; provides interface HplMsp430GeneralIO as Port22; provides interface HplMsp430GeneralIO as Port23; provides interface HplMsp430GeneralIO as Port24; provides interface HplMsp430GeneralIO as Port25; provides interface HplMsp430GeneralIO as Port26; provides interface HplMsp430GeneralIO as Port27; #endif #if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) provides interface HplMsp430GeneralIO as Port30; provides interface HplMsp430GeneralIO as Port31; provides interface HplMsp430GeneralIO as Port32; provides interface HplMsp430GeneralIO as Port33; provides interface HplMsp430GeneralIO as Port34; provides interface HplMsp430GeneralIO as Port35; provides interface HplMsp430GeneralIO as Port36; provides interface HplMsp430GeneralIO as Port37; #endif #if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__) provides interface HplMsp430GeneralIO as Port40; provides interface HplMsp430GeneralIO as Port41; provides interface HplMsp430GeneralIO as Port42; provides interface HplMsp430GeneralIO as Port43; provides interface HplMsp430GeneralIO as Port44; provides interface HplMsp430GeneralIO as Port45; provides interface HplMsp430GeneralIO as Port46; provides interface HplMsp430GeneralIO as Port47; #endif #if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) provides interface HplMsp430GeneralIO as Port50; provides interface HplMsp430GeneralIO as Port51; provides interface HplMsp430GeneralIO as Port52; provides interface HplMsp430GeneralIO as Port53; provides interface HplMsp430GeneralIO as Port54; provides interface HplMsp430GeneralIO as Port55; provides interface HplMsp430GeneralIO as Port56; provides interface HplMsp430GeneralIO as Port57; #endif #if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__) provides interface HplMsp430GeneralIO as Port60; provides interface HplMsp430GeneralIO as Port61; provides interface HplMsp430GeneralIO as Port62; provides interface HplMsp430GeneralIO as Port63; provides interface HplMsp430GeneralIO as Port64; provides interface HplMsp430GeneralIO as Port65; provides interface HplMsp430GeneralIO as Port66; provides interface HplMsp430GeneralIO as Port67; #endif // provides special ports explicitly // this section of HplMsp430GeneralIOC supports the F14x series #ifdef __msp430x14x provides interface HplMsp430GeneralIO as STE0; provides interface HplMsp430GeneralIO as SIMO0; provides interface HplMsp430GeneralIO as SOMI0; provides interface HplMsp430GeneralIO as UCLK0; provides interface HplMsp430GeneralIO as UTXD0; provides interface HplMsp430GeneralIO as URXD0; provides interface HplMsp430GeneralIO as STE1; provides interface HplMsp430GeneralIO as SIMO1; provides interface HplMsp430GeneralIO as SOMI1; provides interface HplMsp430GeneralIO as UCLK1; provides interface HplMsp430GeneralIO as UTXD1; provides interface HplMsp430GeneralIO as URXD1; provides interface HplMsp430GeneralIO as ADC0; provides interface HplMsp430GeneralIO as ADC1; provides interface HplMsp430GeneralIO as ADC2; provides interface HplMsp430GeneralIO as ADC3; provides interface HplMsp430GeneralIO as ADC4; provides interface HplMsp430GeneralIO as ADC5; provides interface HplMsp430GeneralIO as ADC6; provides interface HplMsp430GeneralIO as ADC7; #endif // this section of HplMsp430GeneralIOC supports the F16x series #ifdef __msp430x16x provides interface HplMsp430GeneralIO as STE0; provides interface HplMsp430GeneralIO as SIMO0; provides interface HplMsp430GeneralIO as SDA; provides interface HplMsp430GeneralIO as SOMI0; provides interface HplMsp430GeneralIO as UCLK0; provides interface HplMsp430GeneralIO as SCL; provides interface HplMsp430GeneralIO as UTXD0; provides interface HplMsp430GeneralIO as URXD0; provides interface HplMsp430GeneralIO as STE1; provides interface HplMsp430GeneralIO as SIMO1; provides interface HplMsp430GeneralIO as SOMI1; provides interface HplMsp430GeneralIO as UCLK1; provides interface HplMsp430GeneralIO as UTXD1; provides interface HplMsp430GeneralIO as URXD1; provides interface HplMsp430GeneralIO as ADC0; provides interface HplMsp430GeneralIO as ADC1; provides interface HplMsp430GeneralIO as ADC2; provides interface HplMsp430GeneralIO as ADC3; provides interface HplMsp430GeneralIO as ADC4; provides interface HplMsp430GeneralIO as ADC5; provides interface HplMsp430GeneralIO as ADC6; provides interface HplMsp430GeneralIO as ADC7; provides interface HplMsp430GeneralIO as DAC0; provides interface HplMsp430GeneralIO as DAC1; provides interface HplMsp430GeneralIO as SVSIN; provides interface HplMsp430GeneralIO as SVSOUT; #endif #if defined(__msp430x261x) || defined(__msp430x26x) provides interface HplMsp430GeneralIO as UCA0CLK; provides interface HplMsp430GeneralIO as UCA0STE; provides interface HplMsp430GeneralIO as UCA0TXD; provides interface HplMsp430GeneralIO as UCA0RXD; provides interface HplMsp430GeneralIO as UCA0SIMO; provides interface HplMsp430GeneralIO as UCA0SOMI; provides interface HplMsp430GeneralIO as UCB0CLK; provides interface HplMsp430GeneralIO as UCB0STE; provides interface HplMsp430GeneralIO as UCB0SIMO; provides interface HplMsp430GeneralIO as UCB0SOMI; provides interface HplMsp430GeneralIO as UCB0SDA; provides interface HplMsp430GeneralIO as UCB0SCL; provides interface HplMsp430GeneralIO as UCA1CLK; provides interface HplMsp430GeneralIO as UCA1STE; provides interface HplMsp430GeneralIO as UCA1TXD; provides interface HplMsp430GeneralIO as UCA1RXD; provides interface HplMsp430GeneralIO as UCA1SIMO; provides interface HplMsp430GeneralIO as UCA1SOMI; provides interface HplMsp430GeneralIO as UCB1CLK; provides interface HplMsp430GeneralIO as UCB1STE; provides interface HplMsp430GeneralIO as UCB1SIMO; provides interface HplMsp430GeneralIO as UCB1SOMI; provides interface HplMsp430GeneralIO as UCB1SDA; provides interface HplMsp430GeneralIO as UCB1SCL; provides interface HplMsp430GeneralIO as ADC0; provides interface HplMsp430GeneralIO as ADC1; provides interface HplMsp430GeneralIO as ADC2; provides interface HplMsp430GeneralIO as ADC3; provides interface HplMsp430GeneralIO as ADC4; provides interface HplMsp430GeneralIO as ADC5; provides interface HplMsp430GeneralIO as ADC6; provides interface HplMsp430GeneralIO as ADC7; provides interface HplMsp430GeneralIO as DAC0; provides interface HplMsp430GeneralIO as DAC1; provides interface HplMsp430GeneralIO as SVSIN; provides interface HplMsp430GeneralIO as SVSOUT; #endif #ifdef __msp430x241x provides interface HplMsp430GeneralIO as UCA0CLK; provides interface HplMsp430GeneralIO as UCA0STE; provides interface HplMsp430GeneralIO as UCA0TXD; provides interface HplMsp430GeneralIO as UCA0RXD; provides interface HplMsp430GeneralIO as UCA0SIMO; provides interface HplMsp430GeneralIO as UCA0SOMI; provides interface HplMsp430GeneralIO as UCB0CLK; provides interface HplMsp430GeneralIO as UCB0STE; provides interface HplMsp430GeneralIO as UCB0SIMO; provides interface HplMsp430GeneralIO as UCB0SOMI; provides interface HplMsp430GeneralIO as UCB0SDA; provides interface HplMsp430GeneralIO as UCB0SCL; provides interface HplMsp430GeneralIO as UCA1CLK; provides interface HplMsp430GeneralIO as UCA1STE; provides interface HplMsp430GeneralIO as UCA1TXD; provides interface HplMsp430GeneralIO as UCA1RXD; provides interface HplMsp430GeneralIO as UCA1SIMO; provides interface HplMsp430GeneralIO as UCA1SOMI; provides interface HplMsp430GeneralIO as UCB1CLK; provides interface HplMsp430GeneralIO as UCB1STE; provides interface HplMsp430GeneralIO as UCB1SIMO; provides interface HplMsp430GeneralIO as UCB1SOMI; provides interface HplMsp430GeneralIO as UCB1SDA; provides interface HplMsp430GeneralIO as UCB1SCL; provides interface HplMsp430GeneralIO as ADC0; provides interface HplMsp430GeneralIO as ADC1; provides interface HplMsp430GeneralIO as ADC2; provides interface HplMsp430GeneralIO as ADC3; provides interface HplMsp430GeneralIO as ADC4; provides interface HplMsp430GeneralIO as ADC5; provides interface HplMsp430GeneralIO as ADC6; provides interface HplMsp430GeneralIO as ADC7; provides interface HplMsp430GeneralIO as SVSIN; provides interface HplMsp430GeneralIO as SVSOUT; #endif #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) provides interface HplMsp430GeneralIO as CBOUT0; provides interface HplMsp430GeneralIO as TA0CLK; provides interface HplMsp430GeneralIO as CBOUT1; provides interface HplMsp430GeneralIO as TA1CLK; provides interface HplMsp430GeneralIO as ACLK; provides interface HplMsp430GeneralIO as SMCLK; provides interface HplMsp430GeneralIO as RTCCLK; provides interface HplMsp430GeneralIO as ADC12CLK; provides interface HplMsp430GeneralIO as DMAE0; provides interface HplMsp430GeneralIO as SVMOUT; provides interface HplMsp430GeneralIO as TA0CCR0A; provides interface HplMsp430GeneralIO as TA0CCR1A; provides interface HplMsp430GeneralIO as TA0CCR2A; provides interface HplMsp430GeneralIO as TA0CCR3A; provides interface HplMsp430GeneralIO as TA0CCR4A; provides interface HplMsp430GeneralIO as TA1CCR0A; provides interface HplMsp430GeneralIO as TA1CCR1A; provides interface HplMsp430GeneralIO as TA1CCR2A; provides interface HplMsp430GeneralIO as UCA0RXD; provides interface HplMsp430GeneralIO as UCA0SOMI; provides interface HplMsp430GeneralIO as UCA0TXD; provides interface HplMsp430GeneralIO as UCA0SIMO; provides interface HplMsp430GeneralIO as UCA0CLK; provides interface HplMsp430GeneralIO as UCB0STE; provides interface HplMsp430GeneralIO as UCB0SOMI; provides interface HplMsp430GeneralIO as UCB0SCL; provides interface HplMsp430GeneralIO as UCB0SIMO; provides interface HplMsp430GeneralIO as UCB0SDA; provides interface HplMsp430GeneralIO as UCB0CLK; provides interface HplMsp430GeneralIO as UCA0STE; provides interface HplMsp430GeneralIO as RFGDO0; provides interface HplMsp430GeneralIO as RFGDO1; provides interface HplMsp430GeneralIO as RFGDO2; #if defined(__cc430x513x) || defined(__cc430x613x) provides interface HplMsp430GeneralIO as ADC0; provides interface HplMsp430GeneralIO as ADC1; provides interface HplMsp430GeneralIO as ADC2; provides interface HplMsp430GeneralIO as ADC3; provides interface HplMsp430GeneralIO as ADC4; provides interface HplMsp430GeneralIO as ADC5; #if defined(__cc430x613x) provides interface HplMsp430GeneralIO as ADC6; provides interface HplMsp430GeneralIO as ADC7; #endif /* cc430x613x */ #endif /* cc430x513x || cc430x613x */ #endif /* cc430x513x || cc430x612x || cc430x613x */ } implementation { components #if defined(__MSP430_HAS_PORT1_R__) new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 0) as P10, new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 1) as P11, new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 2) as P12, new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 3) as P13, new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 4) as P14, new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 5) as P15, new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 6) as P16, new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 7) as P17, #elif defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 0) as P10, new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 1) as P11, new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 2) as P12, new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 3) as P13, new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 4) as P14, new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 5) as P15, new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 6) as P16, new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 7) as P17, #endif #if defined(__MSP430_HAS_PORT2_R__) new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 0) as P20, new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 1) as P21, new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 2) as P22, new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 3) as P23, new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 4) as P24, new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 5) as P25, new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 6) as P26, new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 7) as P27, #elif defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 0) as P20, new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 1) as P21, new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 2) as P22, new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 3) as P23, new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 4) as P24, new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 5) as P25, new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 6) as P26, new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 7) as P27, #endif #if defined(__MSP430_HAS_PORT3_R__) new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 0) as P30, new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 1) as P31, new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 2) as P32, new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 3) as P33, new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 4) as P34, new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 5) as P35, new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 6) as P36, new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 7) as P37, #elif defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 0) as P30, new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 1) as P31, new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 2) as P32, new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 3) as P33, new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 4) as P34, new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 5) as P35, new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 6) as P36, new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 7) as P37, #endif #if defined(__MSP430_HAS_PORT4_R__) new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 0) as P40, new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 1) as P41, new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 2) as P42, new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 3) as P43, new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 4) as P44, new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 5) as P45, new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 6) as P46, new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 7) as P47, #elif defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 0) as P40, new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 1) as P41, new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 2) as P42, new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 3) as P43, new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 4) as P44, new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 5) as P45, new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 6) as P46, new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 7) as P47, #endif #if defined(__MSP430_HAS_PORT5_R__) new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 0) as P50, new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 1) as P51, new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 2) as P52, new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 3) as P53, new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 4) as P54, new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 5) as P55, new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 6) as P56, new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 7) as P57, #elif defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 0) as P50, new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 1) as P51, new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 2) as P52, new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 3) as P53, new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 4) as P54, new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 5) as P55, new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 6) as P56, new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 7) as P57, #endif #if defined(__MSP430_HAS_PORT6_R__) new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 0) as P60, new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 1) as P61, new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 2) as P62, new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 3) as P63, new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 4) as P64, new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 5) as P65, new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 6) as P66, new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 7) as P67, #elif defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 0) as P60, new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 1) as P61, new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 2) as P62, new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 3) as P63, new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 4) as P64, new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 5) as P65, new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 6) as P66, new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 7) as P67, #endif PlatformC; // dummy to end unknown sequence #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) Port10 = P10; Port11 = P11; Port12 = P12; Port13 = P13; Port14 = P14; Port15 = P15; Port16 = P16; Port17 = P17; #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) Port20 = P20; Port21 = P21; Port22 = P22; Port23 = P23; Port24 = P24; Port25 = P25; Port26 = P26; Port27 = P27; #endif #if defined(__msp430_have_port3) || defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__) Port30 = P30; Port31 = P31; Port32 = P32; Port33 = P33; Port34 = P34; Port35 = P35; Port36 = P36; Port37 = P37; #endif #if defined(__msp430_have_port4) || defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__) Port40 = P40; Port41 = P41; Port42 = P42; Port43 = P43; Port44 = P44; Port45 = P45; Port46 = P46; Port47 = P47; #endif #if defined(__msp430_have_port5) || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__) Port50 = P50; Port51 = P51; Port52 = P52; Port53 = P53; Port54 = P54; Port55 = P55; Port56 = P56; Port57 = P57; #endif #if defined(__msp430_have_port6) || defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__) Port60 = P60; Port61 = P61; Port62 = P62; Port63 = P63; Port64 = P64; Port65 = P65; Port66 = P66; Port67 = P67; #endif #ifdef __msp430x14x STE0 = P30; SIMO0 = P31; SOMI0 = P32; UCLK0 = P33; UTXD0 = P34; URXD0 = P35; STE1 = P50; SIMO1 = P51; SOMI1 = P52; UCLK1 = P53; UTXD1 = P36; URXD1 = P37; ADC0 = P60; ADC1 = P61; ADC2 = P62; ADC3 = P63; ADC4 = P64; ADC5 = P65; ADC6 = P66; ADC7 = P67; #endif #ifdef __msp430x16x STE0 = P30; SIMO0 = P31; SDA = P31; SOMI0 = P32; UCLK0 = P33; SCL = P33; UTXD0 = P34; URXD0 = P35; STE1 = P50; SIMO1 = P51; SOMI1 = P52; UCLK1 = P53; UTXD1 = P36; URXD1 = P37; ADC0 = P60; ADC1 = P61; ADC2 = P62; ADC3 = P63; ADC4 = P64; ADC5 = P65; ADC6 = P66; ADC7 = P67; DAC0 = P66; DAC1 = P67; SVSIN = P67; SVSOUT = P57; #endif #if defined(__msp430x261x) || defined(__msp430x26x) UCA0CLK = P30; UCA0STE = P33; UCA0TXD = P34; UCA0RXD = P35; UCA0SIMO = P34; UCA0SOMI = P35; UCB0CLK = P33; UCB0STE = P30; UCB0SIMO = P31; UCB0SOMI = P32; UCB0SDA = P31; UCB0SCL = P32; UCA1CLK = P50; UCA1STE = P53; UCA1TXD = P36; UCA1RXD = P37; UCA1SIMO = P36; UCA1SOMI = P37; UCB1CLK = P53; UCB1STE = P50; UCB1SIMO = P51; UCB1SOMI = P52; UCB1SDA = P51; UCB1SCL = P52; ADC0 = P60; ADC1 = P61; ADC2 = P62; ADC3 = P63; ADC4 = P64; ADC5 = P65; ADC6 = P66; ADC7 = P67; DAC0 = P66; DAC1 = P67; SVSIN = P67; SVSOUT = P57; #endif #if defined(__cc430x513x) || defined(__cc430x612x) || defined(__cc430x613x) /* Terminal functions mapped to port mapping mnemonics, per data * sheet table 3 */ RFGDO0 = P10; // default out RFGDO2 = P11; // default out UCB0SOMI = P12; // default in/out UCB0SCL = P12; // default in/out UCB0SIMO = P13; // default in/out UCB0SDA = P13; // default in/out UCB0CLK = P14; // default in/out UCA0STE = P14; // default in/out UCA0RXD = P15; // default in/out UCA0SOMI = P15; // default in/out UCA0TXD = P16; // default in/out UCA0SIMO = P16; // default in/out UCA0CLK = P17; // default in/out UCB0STE = P17; // default in/out CBOUT1 = P20; // default out TA1CLK = P20; // default in TA1CCR0A = P21; // default in/out TA1CCR1A = P22; // default in/out TA1CCR2A = P23; // default in/out RTCCLK = P24; // default out SVMOUT = P25; // default out ACLK = P26; // default out ADC12CLK = P27; // default out DMAE0 = P27; // default in CBOUT0 = P30; // default out TA0CLK = P30; // default in TA0CCR0A = P31; // defalut in/out TA0CCR1A = P32; // defalut in/out TA0CCR2A = P33; // defalut in/out TA0CCR3A = P34; // defalut in/out TA0CCR4A = P35; // defalut in/out RFGDO1 = P36; // default out SMCLK = P37; // default out // MCLK unassigned // MODCLK undefined // ANALOG unassigned #if defined(__cc430x513x) || defined(__cc430x613x) ADC0 = P20; // secondary ADC1 = P21; // secondary ADC2 = P22; // secondary ADC3 = P23; // secondary ADC4 = P24; // secondary ADC5 = P25; // secondary #if defined(__cc430x613x) ADC6 = P26; // secondary ADC7 = P27; // secondary #endif /* cc430x613x */ #endif /* cc430x513x || cc430x613x */ #endif /* cc430x513x || cc430x612x || cc430x613x */ } tinyos-2.1.2+dfsg/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc000066400000000000000000000064161207233610700235240ustar00rootroot00000000000000 /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Joe Polastre */ #include "msp430regtypes.h" generic module HplMsp430GeneralIOP( unsigned int port_in_addr, unsigned int port_out_addr, unsigned int port_dir_addr, unsigned int port_sel_addr, uint8_t pin ) @safe() { provides interface HplMsp430GeneralIO as IO; } implementation { #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* ONE, port_in_addr)) #define PORTx (*TCAST(volatile TYPE_PORT_OUT* ONE, port_out_addr)) #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* ONE, port_dir_addr)) #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* ONE, port_sel_addr)) async command void IO.set() { atomic PORTx |= (0x01 << pin); } async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); } async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); } async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); } async command bool IO.get() { return (call IO.getRaw() != 0); } async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); } async command bool IO.isInput() { return (PORTxDIR & (0x01 << pin)) == 0; } async command void IO.makeOutput() { atomic PORTxDIR |= (0x01 << pin); } async command bool IO.isOutput() { return (PORTxDIR & (0x01 << pin)) != 0; } async command void IO.selectModuleFunc() { atomic PORTxSEL |= (0x01 << pin); } async command bool IO.isModuleFunc() { return (PORTxSEL & (0x01< */ #include "msp430regtypes.h" generic module HplMsp430GeneralIORenP( unsigned int port_in_addr, unsigned int port_out_addr, unsigned int port_dir_addr, unsigned int port_sel_addr, unsigned int port_ren_addr, uint8_t pin ) @safe() { provides interface HplMsp430GeneralIO as IO; } implementation { #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* ONE, port_in_addr)) #define PORTx (*TCAST(volatile TYPE_PORT_OUT* ONE, port_out_addr)) #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* ONE, port_dir_addr)) #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* ONE, port_sel_addr)) #define PORTxREN (*TCAST(volatile TYPE_PORT_REN* ONE, port_ren_addr)) async command void IO.set() { atomic PORTx |= (0x01 << pin); } async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); } async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); } async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); } async command bool IO.get() { return (call IO.getRaw() != 0); } async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); } async command bool IO.isInput() { return (PORTxDIR & (0x01 << pin)) == 0; } async command void IO.makeOutput() { atomic PORTxDIR |= (0x01 << pin); } async command bool IO.isOutput() { return (PORTxDIR & (0x01 << pin)) != 0; } async command void IO.selectModuleFunc() { atomic PORTxSEL |= (0x01 << pin); } async command bool IO.isModuleFunc() { return (PORTxSEL & (0x01<> 0) & 1; return b; } async command bool Port11.getValue() { bool b; atomic b=(P1IN >> 1) & 1; return b; } async command bool Port12.getValue() { bool b; atomic b=(P1IN >> 2) & 1; return b; } async command bool Port13.getValue() { bool b; atomic b=(P1IN >> 3) & 1; return b; } async command bool Port14.getValue() { bool b; atomic b=(P1IN >> 4) & 1; return b; } async command bool Port15.getValue() { bool b; atomic b=(P1IN >> 5) & 1; return b; } async command bool Port16.getValue() { bool b; atomic b=(P1IN >> 6) & 1; return b; } async command bool Port17.getValue() { bool b; atomic b=(P1IN >> 7) & 1; return b; } async command void Port10.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 0); else P1IES |= (1 << 0); } } async command void Port11.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 1); else P1IES |= (1 << 1); } } async command void Port12.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 2); else P1IES |= (1 << 2); } } async command void Port13.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 3); else P1IES |= (1 << 3); } } async command void Port14.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 4); else P1IES |= (1 << 4); } } async command void Port15.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 5); else P1IES |= (1 << 5); } } async command void Port16.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 6); else P1IES |= (1 << 6); } } async command void Port17.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 7); else P1IES |= (1 << 7); } } #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) TOSH_SIGNAL(PORT2_VECTOR) { volatile int n = P2IFG & P2IE; if (n & (1 << 0)) { signal Port20.fired(); return; } if (n & (1 << 1)) { signal Port21.fired(); return; } if (n & (1 << 2)) { signal Port22.fired(); return; } if (n & (1 << 3)) { signal Port23.fired(); return; } if (n & (1 << 4)) { signal Port24.fired(); return; } if (n & (1 << 5)) { signal Port25.fired(); return; } if (n & (1 << 6)) { signal Port26.fired(); return; } if (n & (1 << 7)) { signal Port27.fired(); return; } } default async event void Port20.fired() { call Port20.clear(); } default async event void Port21.fired() { call Port21.clear(); } default async event void Port22.fired() { call Port22.clear(); } default async event void Port23.fired() { call Port23.clear(); } default async event void Port24.fired() { call Port24.clear(); } default async event void Port25.fired() { call Port25.clear(); } default async event void Port26.fired() { call Port26.clear(); } default async event void Port27.fired() { call Port27.clear(); } async command void Port20.enable() { P2IE |= (1 << 0); } async command void Port21.enable() { P2IE |= (1 << 1); } async command void Port22.enable() { P2IE |= (1 << 2); } async command void Port23.enable() { P2IE |= (1 << 3); } async command void Port24.enable() { P2IE |= (1 << 4); } async command void Port25.enable() { P2IE |= (1 << 5); } async command void Port26.enable() { P2IE |= (1 << 6); } async command void Port27.enable() { P2IE |= (1 << 7); } async command void Port20.disable() { P2IE &= ~(1 << 0); } async command void Port21.disable() { P2IE &= ~(1 << 1); } async command void Port22.disable() { P2IE &= ~(1 << 2); } async command void Port23.disable() { P2IE &= ~(1 << 3); } async command void Port24.disable() { P2IE &= ~(1 << 4); } async command void Port25.disable() { P2IE &= ~(1 << 5); } async command void Port26.disable() { P2IE &= ~(1 << 6); } async command void Port27.disable() { P2IE &= ~(1 << 7); } async command void Port20.clear() { P2IFG &= ~(1 << 0); } async command void Port21.clear() { P2IFG &= ~(1 << 1); } async command void Port22.clear() { P2IFG &= ~(1 << 2); } async command void Port23.clear() { P2IFG &= ~(1 << 3); } async command void Port24.clear() { P2IFG &= ~(1 << 4); } async command void Port25.clear() { P2IFG &= ~(1 << 5); } async command void Port26.clear() { P2IFG &= ~(1 << 6); } async command void Port27.clear() { P2IFG &= ~(1 << 7); } async command bool Port20.getValue() { bool b; atomic b=(P2IN >> 0) & 1; return b; } async command bool Port21.getValue() { bool b; atomic b=(P2IN >> 1) & 1; return b; } async command bool Port22.getValue() { bool b; atomic b=(P2IN >> 2) & 1; return b; } async command bool Port23.getValue() { bool b; atomic b=(P2IN >> 3) & 1; return b; } async command bool Port24.getValue() { bool b; atomic b=(P2IN >> 4) & 1; return b; } async command bool Port25.getValue() { bool b; atomic b=(P2IN >> 5) & 1; return b; } async command bool Port26.getValue() { bool b; atomic b=(P2IN >> 6) & 1; return b; } async command bool Port27.getValue() { bool b; atomic b=(P2IN >> 7) & 1; return b; } async command void Port20.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 0); else P2IES |= (1 << 0); } } async command void Port21.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 1); else P2IES |= (1 << 1); } } async command void Port22.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 2); else P2IES |= (1 << 2); } } async command void Port23.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 3); else P2IES |= (1 << 3); } } async command void Port24.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 4); else P2IES |= (1 << 4); } } async command void Port25.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 5); else P2IES |= (1 << 5); } } async command void Port26.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 6); else P2IES |= (1 << 6); } } async command void Port27.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 7); else P2IES |= (1 << 7); } } #endif } tinyos-2.1.2+dfsg/tos/chips/msp430/pins/Msp430GpioC.nc000066400000000000000000000050551207233610700221320ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the general-purpose I/O abstraction * for the TI MSP430 microcontroller. * * @author Joe Polastre * @see Please refer to TEP 117 for more information about this component and its * intended use. */ generic module Msp430GpioC() @safe() { provides interface GeneralIO; uses interface HplMsp430GeneralIO as HplGeneralIO; } implementation { async command void GeneralIO.set() { call HplGeneralIO.set(); } async command void GeneralIO.clr() { call HplGeneralIO.clr(); } async command void GeneralIO.toggle() { call HplGeneralIO.toggle(); } async command bool GeneralIO.get() { return call HplGeneralIO.get(); } async command void GeneralIO.makeInput() { call HplGeneralIO.makeInput(); } async command bool GeneralIO.isInput() { return call HplGeneralIO.isInput(); } async command void GeneralIO.makeOutput() { call HplGeneralIO.makeOutput(); } async command bool GeneralIO.isOutput() { return call HplGeneralIO.isOutput(); } } tinyos-2.1.2+dfsg/tos/chips/msp430/pins/Msp430InterruptC.nc000066400000000000000000000051631207233610700232300ustar00rootroot00000000000000 /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the GPIO interrupt abstraction for * the TI MSP430 microcontroller. * * @author Jonathan Hui * @author Joe Polastre * @see Please refer to TEP 117 for more information about this component and its * intended use. */ generic module Msp430InterruptC() @safe() { provides interface GpioInterrupt as Interrupt; uses interface HplMsp430Interrupt as HplInterrupt; } implementation { error_t enable( bool rising ) { atomic { call Interrupt.disable(); call HplInterrupt.edge( rising ); call HplInterrupt.enable(); } return SUCCESS; } async command error_t Interrupt.enableRisingEdge() { return enable( TRUE ); } async command error_t Interrupt.enableFallingEdge() { return enable( FALSE ); } async command error_t Interrupt.disable() { atomic { call HplInterrupt.disable(); call HplInterrupt.clear(); } return SUCCESS; } async event void HplInterrupt.fired() { call HplInterrupt.clear(); signal Interrupt.fired(); } } tinyos-2.1.2+dfsg/tos/chips/msp430/sensors/000077500000000000000000000000001207233610700204165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/sensors/Msp430InternalTemperatureC.nc000066400000000000000000000046541207233610700257550ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Msp430InternalTemperatureC is the temperature sensor available on * the msp430-based platforms. * * To convert from ADC counts to temperature, convert to voltage by * dividing by 4096 and multiplying by Vref (1.5V). Then subtract * 0.986 from voltage and divide by 0.00355 to get degrees C. * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:10 $ */ generic configuration Msp430InternalTemperatureC() { provides interface Read; provides interface ReadStream; } implementation { components new AdcReadClientC(); Read = AdcReadClientC; components new AdcReadStreamClientC(); ReadStream = AdcReadStreamClientC; components Msp430InternalTemperatureP; AdcReadClientC.AdcConfigure -> Msp430InternalTemperatureP; AdcReadStreamClientC.AdcConfigure -> Msp430InternalTemperatureP; } tinyos-2.1.2+dfsg/tos/chips/msp430/sensors/Msp430InternalTemperatureP.nc000066400000000000000000000042441207233610700257650ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "Msp430Adc12.h" module Msp430InternalTemperatureP { provides interface AdcConfigure; } implementation { const msp430adc12_channel_config_t config = { inch: TEMPERATURE_DIODE_CHANNEL, sref: REFERENCE_VREFplus_AVss, ref2_5v: REFVOLT_LEVEL_1_5, adc12ssel: SHT_SOURCE_ACLK, adc12div: SHT_CLOCK_DIV_1, sht: SAMPLE_HOLD_4_CYCLES, sampcon_ssel: SAMPCON_SOURCE_SMCLK, sampcon_id: SAMPCON_CLOCK_DIV_1 }; async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/tos/chips/msp430/sensors/Msp430InternalVoltageC.nc000066400000000000000000000050231207233610700250500ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Msp430InternalVoltageC is the voltage sensor available on the * msp430-based platforms. * * To convert from ADC counts to actual voltage, divide by 4096 and * multiply by 3. * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:10 $ */ generic configuration Msp430InternalVoltageC() { provides interface Read; provides interface ReadStream; provides interface Resource; provides interface ReadNow; } implementation { components new AdcReadClientC(); Read = AdcReadClientC; components new AdcReadStreamClientC(); ReadStream = AdcReadStreamClientC; components Msp430InternalVoltageP; AdcReadClientC.AdcConfigure -> Msp430InternalVoltageP; AdcReadStreamClientC.AdcConfigure -> Msp430InternalVoltageP; components new AdcReadNowClientC(); Resource = AdcReadNowClientC; ReadNow = AdcReadNowClientC; AdcReadNowClientC.AdcConfigure -> Msp430InternalVoltageP; } tinyos-2.1.2+dfsg/tos/chips/msp430/sensors/Msp430InternalVoltageP.nc000066400000000000000000000042421207233610700250670ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "Msp430Adc12.h" module Msp430InternalVoltageP { provides interface AdcConfigure; } implementation { const msp430adc12_channel_config_t config = { inch: SUPPLY_VOLTAGE_HALF_CHANNEL, sref: REFERENCE_VREFplus_AVss, ref2_5v: REFVOLT_LEVEL_1_5, adc12ssel: SHT_SOURCE_ACLK, adc12div: SHT_CLOCK_DIV_1, sht: SAMPLE_HOLD_4_CYCLES, sampcon_ssel: SAMPCON_SOURCE_SMCLK, sampcon_id: SAMPCON_CLOCK_DIV_1 }; async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/000077500000000000000000000000001207233610700200425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Alarm32khz16C.nc000066400000000000000000000043271207233610700225620ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Alarm32khzC is the alarm for async 32khz alarms * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic configuration Alarm32khz16C() { provides interface Init; provides interface Alarm; } implementation { components new Msp430Timer32khzC() as Msp430Timer; components new Msp430AlarmC(T32khz) as Msp430Alarm; Init = Msp430Alarm; Alarm = Msp430Alarm; Msp430Alarm.Msp430Timer -> Msp430Timer; Msp430Alarm.Msp430TimerControl -> Msp430Timer; Msp430Alarm.Msp430Compare -> Msp430Timer; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Alarm32khz32C.nc000066400000000000000000000043061207233610700225550ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Alarm32khzC is the alarm for async 32khz alarms * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic configuration Alarm32khz32C() { provides interface Init; provides interface Alarm; } implementation { components new Alarm32khz16C() as AlarmC; components Counter32khz32C as Counter; components new TransformAlarmC(T32khz,uint32_t,T32khz,uint16_t,0) as Transform; Init = AlarmC; Alarm = Transform; Transform.AlarmFrom -> AlarmC; Transform.Counter -> Counter; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/AlarmMicro16C.nc000066400000000000000000000037741207233610700226770ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ generic configuration AlarmMicro16C() { provides interface Init; provides interface Alarm; } implementation { components new Msp430TimerMicroC() as Msp430Timer; components new Msp430AlarmC(TMicro) as Msp430Alarm; Init = Msp430Alarm; Alarm = Msp430Alarm; Msp430Alarm.Msp430Timer -> Msp430Timer; Msp430Alarm.Msp430TimerControl -> Msp430Timer; Msp430Alarm.Msp430Compare -> Msp430Timer; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/AlarmMilli16C.nc000066400000000000000000000043261207233610700226660ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * AlarmMilliC is the alarm for async millisecond alarms * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic configuration AlarmMilli16C() { provides interface Init; provides interface Alarm; } implementation { components new Alarm32khz16C() as AlarmFrom; components CounterMilli16C as Counter; components new TransformAlarmC(TMilli,uint16_t,T32khz,uint16_t,5) as Transform; Init = AlarmFrom; Alarm = Transform; Transform.AlarmFrom -> AlarmFrom; Transform.Counter -> Counter; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/AlarmMilli32C.nc000066400000000000000000000043261207233610700226640ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * AlarmMilliC is the alarm for async millisecond alarms * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic configuration AlarmMilli32C() { provides interface Init; provides interface Alarm; } implementation { components new Alarm32khz16C() as AlarmFrom; components CounterMilli32C as Counter; components new TransformAlarmC(TMilli,uint32_t,T32khz,uint16_t,5) as Transform; Init = AlarmFrom; Alarm = Transform; Transform.AlarmFrom -> AlarmFrom; Transform.Counter -> Counter; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/AlarmSecond16C.nc000066400000000000000000000035061207233610700230320ustar00rootroot00000000000000 /* "Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement * is hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." */ /** * AlarmSecondC is the alarm for async one-second alarms * * @author Cory Sharp * @author Peter A. Bigot * @see Please refer to TEP 102 for more information about this component and its * intended use. * @note TSecond is an extension to TEP 102 with the obvious semantics. */ generic configuration AlarmSecond16C() { provides interface Init; provides interface Alarm; } implementation { components new Alarm32khz16C() as AlarmFrom; components CounterSecond16C as Counter; components new TransformAlarmC(TSecond,uint16_t,T32khz,uint16_t,15) as Transform; Init = AlarmFrom; Alarm = Transform; Transform.AlarmFrom -> AlarmFrom; Transform.Counter -> Counter; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/AlarmSecond32C.nc000066400000000000000000000035051207233610700230270ustar00rootroot00000000000000/* "Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement * is hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." */ /** * AlarmSecondC is the alarm for async one-second alarms * * @author Cory Sharp * @author Peter A. Bigot * @see Please refer to TEP 102 for more information about this component and its * intended use. * @note TSecond is an extension to TEP 102 with the obvious semantics. */ generic configuration AlarmSecond32C() { provides interface Init; provides interface Alarm; } implementation { components new Alarm32khz16C() as AlarmFrom; components CounterSecond32C as Counter; components new TransformAlarmC(TSecond,uint32_t,T32khz,uint16_t,15) as Transform; Init = AlarmFrom; Alarm = Transform; Transform.AlarmFrom -> AlarmFrom; Transform.Counter -> Counter; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/BusyWait32khzC.nc000066400000000000000000000040231207233610700231170ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration BusyWait32khzC { provides interface BusyWait; } implementation { components new BusyWaitCounterC(T32khz,uint16_t) , Msp430Counter32khzC ; BusyWait = BusyWaitCounterC; BusyWaitCounterC.Counter -> Msp430Counter32khzC; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/BusyWaitMicroC.nc000066400000000000000000000040231207233610700232270ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration BusyWaitMicroC { provides interface BusyWait; } implementation { components new BusyWaitCounterC(TMicro,uint16_t) , Msp430CounterMicroC ; BusyWait = BusyWaitCounterC; BusyWaitCounterC.Counter -> Msp430CounterMicroC; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Counter32khz16C.nc000066400000000000000000000037661207233610700231530ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Counter32khz16C provides at 16-bit counter at 32768 ticks per second. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration Counter32khz16C { provides interface Counter; } implementation { components Msp430Counter32khzC as CounterFrom; Counter = CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Counter32khz32C.nc000066400000000000000000000041721207233610700231410ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Counter32khz32C provides at 32-bit counter at 32768 ticks per second. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration Counter32khz32C { provides interface Counter; } implementation { components Msp430Counter32khzC as CounterFrom; components new TransformCounterC(T32khz,uint32_t,T32khz,uint16_t,0,uint16_t) as Transform; Counter = Transform; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/CounterMicro32C.nc000066400000000000000000000032531207233610700232500ustar00rootroot00000000000000 /* "Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement * is hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." */ /** * CounterMicro32C provides at 32-bit counter at 1048576 ticks per second. * * @author Cory Sharp * @author Peter A. Bigot * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration CounterMicro32C { provides interface Counter; } implementation { components Msp430CounterMicroC as CounterFrom; components new TransformCounterC(TMicro,uint32_t,TMicro,uint16_t,0,uint32_t) as Transform; Counter = Transform.Counter; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/CounterMilli16C.nc000066400000000000000000000042041207233610700232440ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * CounterMilli16C provides at 16-bit counter at 1024 ticks per second. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration CounterMilli16C { provides interface Counter; } implementation { components Msp430Counter32khzC as CounterFrom; components new TransformCounterC(TMilli,uint16_t,T32khz,uint16_t,5,uint8_t) as Transform; Counter = Transform.Counter; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/CounterMilli32C.nc000066400000000000000000000042051207233610700232430ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * CounterMilli32C provides at 32-bit counter at 1024 ticks per second. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration CounterMilli32C { provides interface Counter; } implementation { components Msp430Counter32khzC as CounterFrom; components new TransformCounterC(TMilli,uint32_t,T32khz,uint16_t,5,uint32_t) as Transform; Counter = Transform.Counter; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/CounterSecond16C.nc000066400000000000000000000033631207233610700234160ustar00rootroot00000000000000/* "Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement * is hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." */ /** * CounterSecond16C provides at 16-bit counter at one ticks per second. * * @author Cory Sharp * @author Peter A. Bigot * @see Please refer to TEP 102 for more information about this component and its * intended use. * @note TSecond is an extension to TEP 102 with the obvious semantics. */ configuration CounterSecond16C { provides interface Counter; } implementation { components Msp430Counter32khzC as CounterFrom; components new TransformCounterC(TSecond,uint16_t,T32khz,uint16_t,15,uint16_t) as Transform; Counter = Transform.Counter; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/CounterSecond32C.nc000066400000000000000000000033631207233610700234140ustar00rootroot00000000000000 /* "Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement * is hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." */ /** * CounterSecond32C provides at 32-bit counter at one tick per second. * * @author Cory Sharp * @author Peter A. Bigot * @see Please refer to TEP 102 for more information about this component and its * intended use. * @note TSecond is an extension to TEP 102 with the obvious semantics. */ configuration CounterSecond32C { provides interface Counter; } implementation { components Msp430Counter32khzC as CounterFrom; components new TransformCounterC(TSecond,uint32_t,T32khz,uint16_t,15,uint32_t) as Transform; Counter = Transform.Counter; Transform.CounterFrom -> CounterFrom; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/GpioCaptureC.nc000066400000000000000000000054371207233610700227220ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui * @author Joe Polastre */ generic module GpioCaptureC() @safe() { provides interface GpioCapture as Capture; uses interface Msp430TimerControl; uses interface Msp430Capture; uses interface HplMsp430GeneralIO as GeneralIO; } implementation { error_t enableCapture( uint8_t mode ) { atomic { call Msp430TimerControl.disableEvents(); call GeneralIO.selectModuleFunc(); call Msp430TimerControl.clearPendingInterrupt(); call Msp430Capture.clearOverflow(); call Msp430TimerControl.setControlAsCapture( mode ); call Msp430TimerControl.enableEvents(); } return SUCCESS; } async command error_t Capture.captureRisingEdge() { return enableCapture( MSP430TIMER_CM_RISING ); } async command error_t Capture.captureFallingEdge() { return enableCapture( MSP430TIMER_CM_FALLING ); } async command void Capture.disable() { atomic { call Msp430TimerControl.disableEvents(); call GeneralIO.selectIOFunc(); } } async event void Msp430Capture.captured( uint16_t time ) { call Msp430TimerControl.clearPendingInterrupt(); call Msp430Capture.clearOverflow(); signal Capture.captured( time ); } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/HilTimerMilliC.nc000066400000000000000000000050411207233610700231730ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HilTimerMilliC provides a parameterized interface to a virtualized * millisecond timer. TimerMilliC in tos/system/ uses this component to * allocate new timers. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration HilTimerMilliC { provides interface Init; provides interface Timer as TimerMilli[ uint8_t num ]; provides interface LocalTime; } implementation { components new AlarmMilli32C(); components new AlarmToTimerC(TMilli); components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI)); components new CounterToLocalTimeC(TMilli); components CounterMilli32C; Init = AlarmMilli32C; TimerMilli = VirtualizeTimerC; LocalTime = CounterToLocalTimeC; VirtualizeTimerC.TimerFrom -> AlarmToTimerC; AlarmToTimerC.Alarm -> AlarmMilli32C; CounterToLocalTimeC.Counter -> CounterMilli32C; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/LocalTimeHybridMicroC.nc000066400000000000000000000040551207233610700245000ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #include #include configuration LocalTimeHybridMicroC { provides interface LocalTime; } implementation { components Msp430HybridAlarmCounterC; components new TransformCounterC(TMicro, uint32_t, T2ghz, uint32_t, 11, uint32_t); components new CounterToLocalTimeC(TMicro); LocalTime = CounterToLocalTimeC; CounterToLocalTimeC.Counter -> TransformCounterC; TransformCounterC.CounterFrom -> Msp430HybridAlarmCounterC; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/LocalTimeMicroC.nc000066400000000000000000000041511207233610700233330ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #include configuration LocalTimeMicroC { provides interface LocalTime; } implementation { #ifndef DISABLE_HYBRID_MICRO components LocalTimeHybridMicroC; LocalTime = LocalTimeHybridMicroC; #else components Msp430CounterMicroC; components new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t, 0, uint32_t); components new CounterToLocalTimeC(TMicro); LocalTime = CounterToLocalTimeC; CounterToLocalTimeC.Counter -> TransformCounterC; TransformCounterC.CounterFrom -> Msp430CounterMicroC; #endif } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430AlarmC.nc000066400000000000000000000070351207233610700224370ustar00rootroot00000000000000//$Id: Msp430AlarmC.nc,v 1.6 2010-06-29 22:07:45 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Msp430Alarm is a generic component that wraps the MSP430 HPL timers and * compares into a TinyOS Alarm. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic module Msp430AlarmC(typedef frequency_tag) @safe() { provides interface Init; provides interface Alarm as Alarm; uses interface Msp430Timer; uses interface Msp430TimerControl; uses interface Msp430Compare; } implementation { command error_t Init.init() { call Msp430TimerControl.disableEvents(); call Msp430TimerControl.setControlAsCompare(); return SUCCESS; } async command void Alarm.start( uint16_t dt ) { call Alarm.startAt( call Alarm.getNow(), dt ); } async command void Alarm.stop() { call Msp430TimerControl.disableEvents(); } async event void Msp430Compare.fired() { call Msp430TimerControl.disableEvents(); signal Alarm.fired(); } async command bool Alarm.isRunning() { return call Msp430TimerControl.areEventsEnabled(); } async command void Alarm.startAt( uint16_t t0, uint16_t dt ) { atomic { uint16_t now = call Msp430Timer.get(); uint16_t elapsed = now - t0; if( elapsed >= dt ) { call Msp430Compare.setEventFromNow(2); } else { uint16_t remaining = dt - elapsed; if( remaining <= 2 ) call Msp430Compare.setEventFromNow(2); else call Msp430Compare.setEvent( now+remaining ); } call Msp430TimerControl.clearPendingInterrupt(); call Msp430TimerControl.enableEvents(); } } async command uint16_t Alarm.getNow() { return call Msp430Timer.get(); } async command uint16_t Alarm.getAlarm() { return call Msp430Compare.getEvent(); } async event void Msp430Timer.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430Capture.nc000066400000000000000000000061241207233610700227010ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Joe Polastre */ #include "Msp430Timer.h" interface Msp430Capture { /** * Reads the value of the last capture event in TxCCRx */ async command uint16_t getEvent(); /** * Set the edge that the capture should occur * * @param cm Capture Mode for edge capture. * enums exist for: * MSP430TIMER_CM_NONE is no capture. * MSP430TIMER_CM_RISING is rising edge capture. * MSP430TIMER_CM_FALLING is a falling edge capture. * MSP430TIMER_CM_BOTH captures on both rising and falling edges. */ async command void setEdge(uint8_t cm); /** * Determine if a capture overflow is pending. * * @return TRUE if the capture register has overflowed */ async command bool isOverflowPending(); /** * Clear the capture overflow flag for when multiple captures occur */ async command void clearOverflow(); /** * Set whether the capture should occur synchronously or asynchronously. * TinyOS default is synchronous captures. * WARNING: if the capture signal is asynchronous to the timer clock, * it could case a race condition (see Timer documentation * in MSP430F1xx user guide) * @param synchronous TRUE to synchronize the timer capture with the * next timer clock instead of occurring asynchronously. */ async command void setSynchronous(bool synchronous); /** * Signalled when an event is captured. * * @param time The time of the capture event */ async event void captured(uint16_t time); } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430ClockC.nc000066400000000000000000000036351207233610700224400ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ configuration Msp430ClockC { provides interface Init; provides interface Msp430ClockInit; } implementation { components Msp430ClockP, Msp430TimerC, McuSleepC; Init = Msp430ClockP; Msp430ClockInit = Msp430ClockP; McuSleepC.McuPowerOverride -> Msp430ClockP; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430ClockInit.nc000066400000000000000000000037561207233610700231650ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp * @author Vlado Handziski */ interface Msp430ClockInit { event void setupDcoCalibrate(); event void initClocks(); event void initTimerA(); event void initTimerB(); command void defaultSetupDcoCalibrate(); command void defaultInitClocks(); command void defaultInitTimerA(); command void defaultInitTimerB(); } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430ClockP.nc000066400000000000000000000150171207233610700224520ustar00rootroot00000000000000//$Id: Msp430ClockP.nc,v 1.9 2010-06-29 22:07:45 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp * @author Vlado Handziski */ #include #include "Msp430Timer.h" module Msp430ClockP @safe() { provides interface Init; provides interface Msp430ClockInit; provides interface McuPowerOverride; } implementation { MSP430REG_NORACE(IE1); MSP430REG_NORACE(TACTL); MSP430REG_NORACE(TAIV); MSP430REG_NORACE(TBCTL); MSP430REG_NORACE(TBIV); enum { ACLK_CALIB_PERIOD = 8, TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD, }; async command mcu_power_t McuPowerOverride.lowestState() { return MSP430_POWER_LPM3; } command void Msp430ClockInit.defaultSetupDcoCalibrate() { // --- setup --- TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0 TBCTL = TBSSEL0 | MC1; BCSCTL1 = XT2OFF | RSEL2; BCSCTL2 = 0; TBCCTL0 = CM0; } command void Msp430ClockInit.defaultInitClocks() { // BCSCTL1 // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK // .XTS = 0; set low frequency mode for LXFT1 // .DIVA = 0; set the divisor on ACLK to 1 // .RSEL, do not modify BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0)); // BCSCTL2 // .SELM = 0; select DCOCLK as source for MCLK // .DIVM = 0; set the divisor of MCLK to 1 // .SELS = 0; select DCOCLK as source for SCLK // .DIVS = 2; set the divisor of SCLK to 4 // .DCOR = 0; select internal resistor for DCO BCSCTL2 = DIVS1; // IE1.OFIE = 0; no interrupt for oscillator fault CLR_FLAG( IE1, OFIE ); } command void Msp430ClockInit.defaultInitTimerA() { TAR = 0; // TACTL // .TACLGRP = 0; each TACL group latched independently // .CNTL = 0; 16-bit counter // .TASSEL = 2; source SMCLK = DCO/4 // .ID = 0; input divisor of 1 // .MC = 0; initially disabled // .TACLR = 0; reset timer A // .TAIE = 1; enable timer A interrupts TACTL = TASSEL1 | TAIE; } command void Msp430ClockInit.defaultInitTimerB() { TBR = 0; // TBCTL // .TBCLGRP = 0; each TBCL group latched independently // .CNTL = 0; 16-bit counter // .TBSSEL = 1; source ACLK // .ID = 0; input divisor of 1 // .MC = 0; initially disabled // .TBCLR = 0; reset timer B // .TBIE = 1; enable timer B interrupts TBCTL = TBSSEL0 | TBIE; } default event void Msp430ClockInit.setupDcoCalibrate() { call Msp430ClockInit.defaultSetupDcoCalibrate(); } default event void Msp430ClockInit.initClocks() { call Msp430ClockInit.defaultInitClocks(); } default event void Msp430ClockInit.initTimerA() { call Msp430ClockInit.defaultInitTimerA(); } default event void Msp430ClockInit.initTimerB() { call Msp430ClockInit.defaultInitTimerB(); } void startTimerA() { // TACTL.MC = 2; continuous mode TACTL = MC1 | (TACTL & ~(MC1|MC0)); } void stopTimerA() { //TACTL.MC = 0; stop timer B TACTL = TACTL & ~(MC1|MC0); } void startTimerB() { // TBCTL.MC = 2; continuous mode TBCTL = MC1 | (TBCTL & ~(MC1|MC0)); } void stopTimerB() { //TBCTL.MC = 0; stop timer B TBCTL = TBCTL & ~(MC1|MC0); } void set_dco_calib( int calib ) { BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07); DCOCTL = calib & 0xff; } uint16_t test_calib_busywait_delta( int calib ) { int8_t aclk_count = 2; uint16_t dco_prev = 0; uint16_t dco_curr = 0; set_dco_calib( calib ); while( aclk_count-- > 0 ) { TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt TBCCTL0 &= ~CCIFG; // clear pending interrupt while( (TBCCTL0 & CCIFG) == 0 ); // busy wait dco_prev = dco_curr; dco_curr = TAR; } return dco_curr - dco_prev; } // busyCalibrateDCO // Should take about 9ms if ACLK_CALIB_PERIOD=8. // DCOCTL and BCSCTL1 are calibrated when done. void busyCalibrateDco() { // --- variables --- int calib; int step; // --- calibrate --- // Binary search for RSEL,DCO,DCOMOD. // It's okay that RSEL isn't monotonic. for( calib=0,step=0x800; step!=0; step>>=1 ) { // if the step is not past the target, commit it if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA ) calib |= step; } // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0 if( (calib & 0x0e0) == 0x0e0 ) calib &= ~0x01f; set_dco_calib( calib ); } command error_t Init.init() { // Reset timers and clear interrupt vectors TACTL = TACLR; TAIV = 0; TBCTL = TBCLR; TBIV = 0; atomic { signal Msp430ClockInit.setupDcoCalibrate(); busyCalibrateDco(); signal Msp430ClockInit.initClocks(); signal Msp430ClockInit.initTimerA(); signal Msp430ClockInit.initTimerB(); startTimerA(); startTimerB(); } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430Compare.nc000066400000000000000000000036471207233610700226730ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ #include "Msp430Timer.h" interface Msp430Compare { async command uint16_t getEvent(); async command void setEvent( uint16_t time ); async command void setEventFromPrev( uint16_t delta ); async command void setEventFromNow( uint16_t delta ); async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430Counter32khzC.nc000066400000000000000000000041441207233610700237020ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Msp430Counter32khC provides the standard 32khz counter for the MSP430. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration Msp430Counter32khzC { provides interface Counter as Msp430Counter32khz; } implementation { components Msp430TimerC; components new Msp430CounterC(T32khz) as Counter; Msp430Counter32khz = Counter; Counter.Msp430Timer -> Msp430TimerC.TimerB; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430CounterC.nc000066400000000000000000000046021207233610700230170ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Msp430Counter is a generic component that wraps the MSP430 HPL timers into a * TinyOS Counter. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ generic module Msp430CounterC( typedef frequency_tag ) @safe() { provides interface Counter as Counter; uses interface Msp430Timer; } implementation { async command uint16_t Counter.get() { return call Msp430Timer.get(); } async command bool Counter.isOverflowPending() { return call Msp430Timer.isOverflowPending(); } async command void Counter.clearOverflow() { call Msp430Timer.clearOverflow(); } async event void Msp430Timer.overflow() { signal Counter.overflow(); } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430CounterMicroC.nc000066400000000000000000000041571207233610700240160ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Msp430Counter32khC provides the standard 32khz counter for the MSP430. * * @author Cory Sharp * @see Please refer to TEP 102 for more information about this component and its * intended use. */ configuration Msp430CounterMicroC { provides interface Counter as Msp430CounterMicro; } implementation { components Msp430TimerC , new Msp430CounterC(TMicro) as Counter ; Msp430CounterMicro = Counter; Counter.Msp430Timer -> Msp430TimerC.TimerA; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430DcoCalibC.nc000066400000000000000000000035321207233610700230410ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ configuration Msp430DcoCalibC { } implementation { components Msp430DcoCalibP, Msp430TimerC; Msp430DcoCalibP.TimerMicro -> Msp430TimerC.TimerA; Msp430DcoCalibP.Timer32khz -> Msp430TimerC.TimerB; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430DcoCalibP.nc000066400000000000000000000055301207233610700230560ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ #error "Msp430DcoCalibP is broken and will incorrectly adjust TimerA because it does not take into account MCU sleep." module Msp430DcoCalibP { uses interface Msp430Timer as TimerMicro; uses interface Msp430Timer as Timer32khz; } implementation { uint16_t m_prev; enum { TARGET_DELTA = 2048, // number of 32khz ticks during 65536 ticks at 1mhz MAX_DEVIATION = 7, // about 0.35% error }; // this gets executed 32 times a second async event void TimerMicro.overflow() { uint16_t now = call Timer32khz.get(); uint16_t delta = now - m_prev; m_prev = now; if( delta > (TARGET_DELTA+MAX_DEVIATION) ) { // too many 32khz ticks means the DCO is running too slow, speed it up if( DCOCTL < 0xe0 ) { DCOCTL++; } else if( (BCSCTL1 & 7) < 7 ) { BCSCTL1++; DCOCTL = 96; } } else if( delta < (TARGET_DELTA-MAX_DEVIATION) ) { // too few 32khz ticks means the DCO is running too fast, slow it down if( DCOCTL > 0 ) { DCOCTL--; } else if( (BCSCTL1 & 7) > 0 ) { BCSCTL1--; DCOCTL = 128; } } } async event void Timer32khz.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430DcoSpec.h000066400000000000000000000045371207233610700224530ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Specify the target cpu clock speed of your platform by overriding this file. * * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some * platforms have an external high frequency oscilator to generate the SMCLK * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These * oscillators provide metric frequencies, but may not run in power down * modes. Here, we need to switch the SMCLK source, which is easier if * the external and thd DCO source frequency are the same. * * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ #ifndef MS430DCOSPEC_H #define MS430DCOSPEC_H #define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz #define ACLK_KHZ 32 // the ACLK rate in binary kHz #endif tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430HybridAlarmCounter.h000066400000000000000000000034011207233610700246560ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #ifndef __MSP430HYBRIDALARMCOUNTER_H__ #define __MSP430HYBRIDALARMCOUNTER_H__ typedef struct T2ghz { uint8_t dummy; } T2ghz; #endif /* __MSP430HYBRIDALARMCOUNTER_H__ */tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430HybridAlarmCounterC.nc000066400000000000000000000045451207233610700251440ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #include configuration Msp430HybridAlarmCounterC { provides { interface Counter as Counter2ghz; interface Alarm as Alarm2ghz; } } implementation { components Msp430HybridAlarmCounterP ,McuSleepC ,Msp430CounterMicroC ,Msp430Counter32khzC ,new Alarm32khz16C() ,new AlarmMicro16C() ; Msp430HybridAlarmCounterP.Counter32khz -> Msp430Counter32khzC; Msp430HybridAlarmCounterP.CounterMicro -> Msp430CounterMicroC; Msp430HybridAlarmCounterP.Alarm32khz -> Alarm32khz16C; Msp430HybridAlarmCounterP.AlarmMicro -> AlarmMicro16C; Msp430HybridAlarmCounterP.McuPowerOverride <- McuSleepC; Msp430HybridAlarmCounterP.Counter2ghz = Counter2ghz; Msp430HybridAlarmCounterP.Alarm2ghz = Alarm2ghz; }tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430HybridAlarmCounterP.nc000066400000000000000000000167001207233610700251550ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ module Msp430HybridAlarmCounterP { uses { interface Counter as CounterMicro; interface Counter as Counter32khz; interface Alarm as AlarmMicro; interface Alarm as Alarm32khz; } provides { interface McuPowerOverride; interface Counter as Counter2ghz; interface Alarm as Alarm2ghz; } } implementation { norace uint32_t fireTime; /*------------------------- UTILITY FUNCTIONS -------------------------*/ inline uint16_t now32khz() { return call Counter32khz.get(); } inline uint16_t nowMicro() { return call CounterMicro.get(); } // return all three clock readings inline void now(uint16_t* t32khz, uint16_t* tMicro, uint32_t* t2ghz) { uint16_t eMicro; atomic { // now from 32khz *t32khz = now32khz(); // now from Micro *tMicro = nowMicro(); // wait until the 32khz clock ticks while(*t32khz == now32khz()); } // elapsed time since entering this function in Micro eMicro = nowMicro() - *tMicro; // hi byte of hybrid time is 32khz tick *t2ghz = (uint32_t)(*t32khz) << 16; // adjust with the elapsed micro time *t2ghz -= (uint32_t)eMicro << 11 ; } inline uint32_t now2ghz() { uint16_t t32khz, tMicro; uint32_t t2ghz; now(&t32khz, &tMicro, &t2ghz); return t2ghz; } /*------------------------- COUNTER -------------------------*/ /** * Return counter value. May take up to 32us to complete. * @return Current counter value. */ async command uint32_t Counter2ghz.get() { return now2ghz(); } /** * Return TRUE if an overflow event will occur after the outermost atomic * block is exits. FALSE otherwise. * @return Counter pending overflow status. */ async command bool Counter2ghz.isOverflowPending() { return call Counter32khz.isOverflowPending(); } /** * Cancel a pending overflow interrupt. */ async command void Counter2ghz.clearOverflow() { return call Counter32khz.clearOverflow(); } /** * T2ghz timer overflows when T32khz timer does. */ async event void Counter32khz.overflow() { signal Counter2ghz.overflow(); } async event void CounterMicro.overflow() {} default async event void Counter2ghz.overflow() {} /*------------------------- ALARM -------------------------*/ /** * Set a single-short alarm to some time units in the future. Replaces * any current alarm time. Equivalent to start(getNow(), dt). The * fired will be signaled when the alarm expires. * * @param dt Time until the alarm fires. */ async command void Alarm2ghz.start(uint32_t dt) { uint16_t tMicro, t32khz; uint32_t t2ghz; // read all clocks now(&t32khz, &tMicro, &t2ghz); // stop running alarms call Alarm2ghz.stop(); // absolute time of requested firing fireTime = t2ghz + dt; // if dt is close (less than 32 32khz ticks), set up Micro alarm if(dt < (1024ULL << 11)) { call AlarmMicro.startAt(tMicro, dt >> 11); } else { // set up 32khz alarm 8 ticks before it's time call Alarm32khz.startAt(t32khz, (dt >> 16) - 8); } } async event void Alarm32khz.fired() { uint16_t tMicro, t32khz; uint32_t t2ghz, dt; // read all clocks now(&t32khz, &tMicro, &t2ghz); // compute time to firing dt = fireTime - t2ghz; call AlarmMicro.startAt(tMicro, dt >> 11); } async event void AlarmMicro.fired() { // signal Alarm2ghz.fired signal Alarm2ghz.fired(); } /** * Cancel an alarm. Note that the fired event may have * already been signaled (even if your code has not yet started * executing). */ async command void Alarm2ghz.stop() { call Alarm32khz.stop(); call AlarmMicro.stop(); } default async event void Alarm2ghz.fired() {} /** * Check if alarm is running. Note that a FALSE return does not indicate * that the fired event will not be signaled (it may have * already started executing, but not reached your code yet). * * @return TRUE if the alarm is still running. */ async command bool Alarm2ghz.isRunning() { return call Alarm32khz.isRunning() || call AlarmMicro.isRunning(); } /** * Set a single-short alarm to time t0+dt. Replaces any current alarm * time. The fired will be signaled when the alarm expires. * Alarms set in the past will fire "soon". * *

      Because the current time may wrap around, it is possible to use * values of t0 greater than the getNow's result. These * values represent times in the past, i.e., the time at which getNow() * would last of returned that value. * * @param t0 Base time for alarm. * @param dt Alarm time as offset from t0. */ async command void Alarm2ghz.startAt(uint32_t t0, uint32_t dt) { uint16_t tMicro, t32khz; uint32_t t2ghz; // read all clocks now(&t32khz, &tMicro, &t2ghz); // stop running alarms call Alarm2ghz.stop(); // absolute time of requested firing fireTime = t0 + dt; // time till requested firing dt = fireTime - t2ghz; // if dt is close (less than 32 32khz ticks), set up Micro alarm if(dt < (1024ULL << 11)) { call AlarmMicro.startAt(tMicro, dt >> 11); } else { // set up 32khz alarm 8 ticks before it's time call Alarm32khz.startAt(t32khz, (dt >> 16) - 8); } } /** * Return the current time. * @return Current time. */ async command uint32_t Alarm2ghz.getNow(){ return now2ghz(); } /** * Return the time the currently running alarm will fire or the time that * the previously running alarm was set to fire. * @return Alarm time. */ async command uint32_t Alarm2ghz.getAlarm() { return fireTime; } async command mcu_power_t McuPowerOverride.lowestState() { if(call AlarmMicro.isRunning()) return MSP430_POWER_LPM0; // does LPM1 increase jitter??? else return MSP430_POWER_LPM3; } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430Timer.h000066400000000000000000000077511207233610700222140ustar00rootroot00000000000000//$Id: Msp430Timer.h,v 1.5 2010-06-29 22:07:45 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp #ifndef _H_Msp430Timer_h #define _H_Msp430Timer_h enum { MSP430TIMER_CM_NONE = 0, MSP430TIMER_CM_RISING = 1, MSP430TIMER_CM_FALLING = 2, MSP430TIMER_CM_BOTH = 3, MSP430TIMER_STOP_MODE = 0, MSP430TIMER_UP_MODE = 1, MSP430TIMER_CONTINUOUS_MODE = 2, MSP430TIMER_UPDOWN_MODE = 3, MSP430TIMER_TACLK = 0, MSP430TIMER_TBCLK = 0, MSP430TIMER_ACLK = 1, MSP430TIMER_SMCLK = 2, MSP430TIMER_INCLK = 3, MSP430TIMER_CLOCKDIV_1 = 0, MSP430TIMER_CLOCKDIV_2 = 1, MSP430TIMER_CLOCKDIV_4 = 2, MSP430TIMER_CLOCKDIV_8 = 3, }; typedef struct { int ccifg : 1; // capture/compare interrupt flag int cov : 1; // capture overflow flag int out : 1; // output value int cci : 1; // capture/compare input value int ccie : 1; // capture/compare interrupt enable int outmod : 3; // output mode int cap : 1; // 1=capture mode, 0=compare mode int clld : 2; // compare latch load int scs : 1; // synchronize capture source int ccis : 2; // capture/compare input select: 0=CCIxA, 1=CCIxB, 2=GND, 3=VCC int cm : 2; // capture mode: 0=none, 1=rising, 2=falling, 3=both } msp430_compare_control_t; typedef struct { int taifg : 1; // timer A interrupt flag int taie : 1; // timer A interrupt enable int taclr : 1; // timer A clear: resets TAR, .id, and .mc int _unused0 : 1; // unused int mc : 2; // mode control: 0=stop, 1=up, 2=continuous, 3=up/down int id : 2; // input divisor: 0=/1, 1=/2, 2=/4, 3=/8 int tassel : 2; // timer A source select: 0=TxCLK, 1=ACLK, 2=SMCLK, 3=INCLK int _unused1 : 6; // unused } msp430_timer_a_control_t; typedef struct { int tbifg : 1; // timer B interrupt flag int tbie : 1; // timer B interrupt enable int tbclr : 1; // timer B clear: resets TAR, .id, and .mc int _unused0 : 1; // unused int mc : 2; // mode control: 0=stop, 1=up, 2=continuous, 3=up/down int id : 2; // input divisor: 0=/1, 1=/2, 2=/4, 3=/8 int tbssel : 2; // timer B source select: 0=TxCLK, 1=ACLK, 2=SMCLK, 3=INCLK int _unused1 : 1; // unused int cntl : 2; // counter length: 0=16-bit, 1=12-bit, 2=10-bit, 3=8-bit int tbclgrp : 2; // tbclx group: 0=independent, 1=0/12/34/56, 2=0/123/456, 3=all int _unused2 : 1; // unused } msp430_timer_b_control_t; #endif//_H_Msp430Timer_h tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430Timer.nc000066400000000000000000000045221207233610700223560ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp * @author Jan Hauer */ //@author Cory Sharp //@author Jan Hauer #include "Msp430Timer.h" interface Msp430Timer { async command uint16_t get(); async command bool isOverflowPending(); async command void clearOverflow(); async event void overflow(); async command void setMode( int mode ); async command int getMode(); async command void clear(); async command void enableEvents(); async command void disableEvents(); async command void setClockSource( uint16_t clockSource ); async command void setInputDivider( uint16_t inputDivider ); // partial timer management, add more commands here as appropriate } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430Timer32khzC.nc000066400000000000000000000040711207233610700233420ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ generic configuration Msp430Timer32khzC() { provides interface Msp430Timer; provides interface Msp430TimerControl; provides interface Msp430Compare; } implementation { components Msp430Timer32khzMapC as Map; enum { ALARM_ID = unique("Msp430Timer32khzMapC") }; Msp430Timer = Map.Msp430Timer[ ALARM_ID ]; Msp430TimerControl = Map.Msp430TimerControl[ ALARM_ID ]; Msp430Compare = Map.Msp430Compare[ ALARM_ID ]; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430Timer32khzMapC.nc000066400000000000000000000064161207233610700240050ustar00rootroot00000000000000//$Id: Msp430Timer32khzMapC.nc,v 1.5 2010-06-29 22:07:45 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz * hardware timers on the MSP430 that are available for compile time allocation * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. * * Platforms based on the MSP430 are encouraged to copy in and override this * file, presenting only the hardware timers that are available for allocation * on that platform. * * @author Cory Sharp */ configuration Msp430Timer32khzMapC { provides interface Msp430Timer[ uint8_t id ]; provides interface Msp430TimerControl[ uint8_t id ]; provides interface Msp430Compare[ uint8_t id ]; } implementation { components Msp430TimerC; Msp430Timer[0] = Msp430TimerC.TimerB; Msp430TimerControl[0] = Msp430TimerC.ControlB0; Msp430Compare[0] = Msp430TimerC.CompareB0; Msp430Timer[1] = Msp430TimerC.TimerB; Msp430TimerControl[1] = Msp430TimerC.ControlB1; Msp430Compare[1] = Msp430TimerC.CompareB1; Msp430Timer[2] = Msp430TimerC.TimerB; Msp430TimerControl[2] = Msp430TimerC.ControlB2; Msp430Compare[2] = Msp430TimerC.CompareB2; Msp430Timer[3] = Msp430TimerC.TimerB; Msp430TimerControl[3] = Msp430TimerC.ControlB3; Msp430Compare[3] = Msp430TimerC.CompareB3; Msp430Timer[4] = Msp430TimerC.TimerB; Msp430TimerControl[4] = Msp430TimerC.ControlB4; Msp430Compare[4] = Msp430TimerC.CompareB4; Msp430Timer[5] = Msp430TimerC.TimerB; Msp430TimerControl[5] = Msp430TimerC.ControlB5; Msp430Compare[5] = Msp430TimerC.CompareB5; Msp430Timer[6] = Msp430TimerC.TimerB; Msp430TimerControl[6] = Msp430TimerC.ControlB6; Msp430Compare[6] = Msp430TimerC.CompareB6; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430TimerC.nc000066400000000000000000000155121207233610700224620ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ configuration Msp430TimerC { provides interface Msp430Timer as TimerA; provides interface Msp430TimerControl as ControlA0; provides interface Msp430TimerControl as ControlA1; provides interface Msp430TimerControl as ControlA2; provides interface Msp430Compare as CompareA0; provides interface Msp430Compare as CompareA1; provides interface Msp430Compare as CompareA2; provides interface Msp430Capture as CaptureA0; provides interface Msp430Capture as CaptureA1; provides interface Msp430Capture as CaptureA2; provides interface Msp430Timer as TimerB; provides interface Msp430TimerControl as ControlB0; provides interface Msp430TimerControl as ControlB1; provides interface Msp430TimerControl as ControlB2; provides interface Msp430TimerControl as ControlB3; provides interface Msp430TimerControl as ControlB4; provides interface Msp430TimerControl as ControlB5; provides interface Msp430TimerControl as ControlB6; provides interface Msp430Compare as CompareB0; provides interface Msp430Compare as CompareB1; provides interface Msp430Compare as CompareB2; provides interface Msp430Compare as CompareB3; provides interface Msp430Compare as CompareB4; provides interface Msp430Compare as CompareB5; provides interface Msp430Compare as CompareB6; provides interface Msp430Capture as CaptureB0; provides interface Msp430Capture as CaptureB1; provides interface Msp430Capture as CaptureB2; provides interface Msp430Capture as CaptureB3; provides interface Msp430Capture as CaptureB4; provides interface Msp430Capture as CaptureB5; provides interface Msp430Capture as CaptureB6; } implementation { components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE, TASSEL0, TASSEL1, FALSE ) as Msp430TimerA , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE, TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0 , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1 , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2 , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0 , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1 , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2 , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3 , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4 , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5 , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6 , Msp430TimerCommonP as Common ; // Timer A TimerA = Msp430TimerA.Timer; Msp430TimerA.Overflow -> Msp430TimerA.Event[5]; Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0; Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1; // Timer A0 ControlA0 = Msp430TimerA0.Control; CompareA0 = Msp430TimerA0.Compare; CaptureA0 = Msp430TimerA0.Capture; Msp430TimerA0.Timer -> Msp430TimerA.Timer; Msp430TimerA0.Event -> Msp430TimerA.Event[0]; // Timer A1 ControlA1 = Msp430TimerA1.Control; CompareA1 = Msp430TimerA1.Compare; CaptureA1 = Msp430TimerA1.Capture; Msp430TimerA1.Timer -> Msp430TimerA.Timer; Msp430TimerA1.Event -> Msp430TimerA.Event[1]; // Timer A2 ControlA2 = Msp430TimerA2.Control; CompareA2 = Msp430TimerA2.Compare; CaptureA2 = Msp430TimerA2.Capture; Msp430TimerA2.Timer -> Msp430TimerA.Timer; Msp430TimerA2.Event -> Msp430TimerA.Event[2]; // Timer B TimerB = Msp430TimerB.Timer; Msp430TimerB.Overflow -> Msp430TimerB.Event[7]; Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0; Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1; // Timer B0 ControlB0 = Msp430TimerB0.Control; CompareB0 = Msp430TimerB0.Compare; CaptureB0 = Msp430TimerB0.Capture; Msp430TimerB0.Timer -> Msp430TimerB.Timer; Msp430TimerB0.Event -> Msp430TimerB.Event[0]; // Timer B1 ControlB1 = Msp430TimerB1.Control; CompareB1 = Msp430TimerB1.Compare; CaptureB1 = Msp430TimerB1.Capture; Msp430TimerB1.Timer -> Msp430TimerB.Timer; Msp430TimerB1.Event -> Msp430TimerB.Event[1]; // Timer B2 ControlB2 = Msp430TimerB2.Control; CompareB2 = Msp430TimerB2.Compare; CaptureB2 = Msp430TimerB2.Capture; Msp430TimerB2.Timer -> Msp430TimerB.Timer; Msp430TimerB2.Event -> Msp430TimerB.Event[2]; // Timer B3 ControlB3 = Msp430TimerB3.Control; CompareB3 = Msp430TimerB3.Compare; CaptureB3 = Msp430TimerB3.Capture; Msp430TimerB3.Timer -> Msp430TimerB.Timer; Msp430TimerB3.Event -> Msp430TimerB.Event[3]; // Timer B4 ControlB4 = Msp430TimerB4.Control; CompareB4 = Msp430TimerB4.Compare; CaptureB4 = Msp430TimerB4.Capture; Msp430TimerB4.Timer -> Msp430TimerB.Timer; Msp430TimerB4.Event -> Msp430TimerB.Event[4]; // Timer B5 ControlB5 = Msp430TimerB5.Control; CompareB5 = Msp430TimerB5.Compare; CaptureB5 = Msp430TimerB5.Capture; Msp430TimerB5.Timer -> Msp430TimerB.Timer; Msp430TimerB5.Event -> Msp430TimerB.Event[5]; // Timer B6 ControlB6 = Msp430TimerB6.Control; CompareB6 = Msp430TimerB6.Compare; CaptureB6 = Msp430TimerB6.Capture; Msp430TimerB6.Timer -> Msp430TimerB.Timer; Msp430TimerB6.Event -> Msp430TimerB.Event[6]; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430TimerCapComP.nc000066400000000000000000000117161207233610700235640ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ #include "Msp430Timer.h" generic module Msp430TimerCapComP( uint16_t TxCCTLx_addr, uint16_t TxCCRx_addr ) @safe() { provides interface Msp430TimerControl as Control; provides interface Msp430Compare as Compare; provides interface Msp430Capture as Capture; uses interface Msp430Timer as Timer; uses interface Msp430TimerEvent as Event; } implementation { #define TxCCTLx (*TCAST(volatile TYPE_TACCTL0* ONE, TxCCTLx_addr)) #define TxCCRx (*TCAST(volatile TYPE_TACCR0* ONE, TxCCRx_addr)) typedef msp430_compare_control_t cc_t; DEFINE_UNION_CAST(CC2int,uint16_t,cc_t) DEFINE_UNION_CAST(int2CC,cc_t,uint16_t) uint16_t compareControl() { cc_t x = { cm : 1, // capture on rising edge ccis : 0, // capture/compare input select clld : 0, // TBCL1 loads on write to TBCCR1 cap : 0, // compare mode ccie : 0, // capture compare interrupt enable }; return CC2int(x); } uint16_t captureControl(uint8_t l_cm) { cc_t x = { cm : l_cm & 0x03, // capture on none, rising, falling or both edges ccis : 0, // capture/compare input select clld : 0, // TBCL1 loads on write to TBCCR1 cap : 1, // compare mode scs : 0, // non synchronous capture mode ccie : 0, // capture compare interrupt enable }; return CC2int(x); } async command cc_t Control.getControl() { return int2CC(TxCCTLx); } async command bool Control.isInterruptPending() { return TxCCTLx & CCIFG; } async command void Control.clearPendingInterrupt() { CLR_FLAG(TxCCTLx,CCIFG); } async command void Control.setControl( cc_t x ) { TxCCTLx = CC2int(x); } async command void Control.setControlAsCompare() { TxCCTLx = compareControl(); } async command void Control.setControlAsCapture( uint8_t cm ) { TxCCTLx = captureControl( cm ); } async command void Capture.setEdge(uint8_t cm) { cc_t t = call Control.getControl(); t.cm = cm & 0x03; TxCCTLx = CC2int(t); } async command void Capture.setSynchronous( bool sync ) { if( sync ) SET_FLAG( TxCCTLx, SCS ); else CLR_FLAG( TxCCTLx, SCS ); } async command void Control.enableEvents() { SET_FLAG( TxCCTLx, CCIE ); } async command void Control.disableEvents() { CLR_FLAG( TxCCTLx, CCIE ); } async command bool Control.areEventsEnabled() { return READ_FLAG( TxCCTLx, CCIE ); } async command uint16_t Compare.getEvent() { return TxCCRx; } async command uint16_t Capture.getEvent() { return TxCCRx; } async command void Compare.setEvent( uint16_t x ) { TxCCRx = x; } async command void Compare.setEventFromPrev( uint16_t x ) { TxCCRx += x; } async command void Compare.setEventFromNow( uint16_t x ) { TxCCRx = call Timer.get() + x; } async command bool Capture.isOverflowPending() { return READ_FLAG( TxCCTLx, COV ); } async command void Capture.clearOverflow() { CLR_FLAG( TxCCTLx, COV ); } async event void Event.fired() { if( (call Control.getControl()).cap ) signal Capture.captured( call Capture.getEvent() ); else signal Compare.fired(); } default async event void Capture.captured( uint16_t n ) { } default async event void Compare.fired() { } async event void Timer.overflow() { } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430TimerCommonP.nc000066400000000000000000000010331207233610700236410ustar00rootroot00000000000000 module Msp430TimerCommonP @safe() { provides interface Msp430TimerEvent as VectorTimerA0; provides interface Msp430TimerEvent as VectorTimerA1; provides interface Msp430TimerEvent as VectorTimerB0; provides interface Msp430TimerEvent as VectorTimerB1; } implementation { TOSH_SIGNAL(TIMERA0_VECTOR) { signal VectorTimerA0.fired(); } TOSH_SIGNAL(TIMERA1_VECTOR) { signal VectorTimerA1.fired(); } TOSH_SIGNAL(TIMERB0_VECTOR) { signal VectorTimerB0.fired(); } TOSH_SIGNAL(TIMERB1_VECTOR) { signal VectorTimerB1.fired(); } } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430TimerControl.nc000066400000000000000000000046571207233610700237300ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp * @author Joe Polastre */ #include "Msp430Timer.h" interface Msp430TimerControl { async command msp430_compare_control_t getControl(); async command bool isInterruptPending(); async command void clearPendingInterrupt(); async command void setControl(msp430_compare_control_t control); async command void setControlAsCompare(); /** * Sets the timer in capture mode. * @param cm configures the capture to occur on none, rising, falling or rising_and_falling edges * Msp430Timer.h has convenience definitions: * MSP430TIMER_CM_NONE, MSP430TIMER_CM_RISING, MSP430TIMER_CM_FALLING, MSP430TIMER_CM_BOTH */ async command void setControlAsCapture(uint8_t cm); async command void enableEvents(); async command void disableEvents(); async command bool areEventsEnabled(); } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430TimerEvent.nc000066400000000000000000000033111207233610700233530ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ interface Msp430TimerEvent { async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430TimerMicroC.nc000066400000000000000000000040011207233610700234430ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ generic configuration Msp430TimerMicroC() { provides interface Msp430Timer; provides interface Msp430TimerControl; provides interface Msp430Compare; } implementation { components Msp430TimerMicroMapC as Map; enum { ALARM_ID = unique("Msp430TimerMicroMapC") }; Msp430Timer = Map.Msp430Timer[ ALARM_ID ]; Msp430TimerControl = Map.Msp430TimerControl[ ALARM_ID ]; Msp430Compare = Map.Msp430Compare[ ALARM_ID ]; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430TimerMicroMapC.nc000066400000000000000000000043401207233610700241070ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ configuration Msp430TimerMicroMapC { provides interface Msp430Timer[ uint8_t id ]; provides interface Msp430TimerControl[ uint8_t id ]; provides interface Msp430Compare[ uint8_t id ]; } implementation { components Msp430TimerC; Msp430Timer[0] = Msp430TimerC.TimerA; Msp430TimerControl[0] = Msp430TimerC.ControlA0; Msp430Compare[0] = Msp430TimerC.CompareA0; Msp430Timer[1] = Msp430TimerC.TimerA; Msp430TimerControl[1] = Msp430TimerC.ControlA1; Msp430Compare[1] = Msp430TimerC.CompareA1; Msp430Timer[2] = Msp430TimerC.TimerA; Msp430TimerControl[2] = Msp430TimerC.ControlA2; Msp430Compare[2] = Msp430TimerC.CompareA2; } tinyos-2.1.2+dfsg/tos/chips/msp430/timer/Msp430TimerP.nc000066400000000000000000000100161207233610700224710ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ #include "msp430regtypes.h" generic module Msp430TimerP( uint16_t TxIV_addr, uint16_t TxR_addr, uint16_t TxCTL_addr, uint16_t TxIFG, uint16_t TxCLR, uint16_t TxIE, uint16_t TxSSEL0, uint16_t TxSSEL1, bool isClockSourceAsync ) @safe() { provides interface Msp430Timer as Timer; provides interface Msp430TimerEvent as Event[uint8_t n]; uses interface Msp430TimerEvent as Overflow; uses interface Msp430TimerEvent as VectorTimerX0; uses interface Msp430TimerEvent as VectorTimerX1; } implementation { #define TxIV (*TCAST(volatile TYPE_TAIV* ONE, TxIV_addr)) #define TxR (*TCAST(volatile TYPE_TAR* ONE, TxR_addr)) #define TxCTL (*TCAST(volatile TYPE_TACTL* ONE, TxCTL_addr)) async command uint16_t Timer.get() { // CSS 10 Feb 2006: Brano Kusy notes MSP430 User's Guide, Section 12.2.1, // Note says reading a counter may return garbage if its clock source is // async. The noted work around is to take a majority vote. if( isClockSourceAsync ) { atomic { uint16_t t0; uint16_t t1=TxR; do { t0=t1; t1=TxR; } while( t0 != t1 ); return t1; } } else { return TxR; } } async command bool Timer.isOverflowPending() { return TxCTL & TxIFG; } async command void Timer.clearOverflow() { CLR_FLAG(TxCTL,TxIFG); } async command void Timer.setMode( int mode ) { TxCTL = (TxCTL & ~(MC1|MC0)) | ((mode<<4) & (MC1|MC0)); } async command int Timer.getMode() { return (TxCTL & (MC1|MC0)) >> 4; } async command void Timer.clear() { TxCTL |= TxCLR; } async command void Timer.enableEvents() { TxCTL |= TxIE; } async command void Timer.disableEvents() { TxCTL &= ~TxIE; } async command void Timer.setClockSource( uint16_t clockSource ) { TxCTL = (TxCTL & ~(TxSSEL0|TxSSEL1)) | ((clockSource << 8) & (TxSSEL0|TxSSEL1)); } async command void Timer.setInputDivider( uint16_t inputDivider ) { TxCTL = (TxCTL & ~(ID0|ID1)) | ((inputDivider << 6) & (ID0|ID1)); } async event void VectorTimerX0.fired() { signal Event.fired[0](); } async event void VectorTimerX1.fired() { uint8_t n = TxIV; signal Event.fired[ n >> 1 ](); } async event void Overflow.fired() { signal Timer.overflow(); } default async event void Timer.overflow() { } default async event void Event.fired[uint8_t n]() { } } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/000077500000000000000000000000001207233610700200605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430I2C.nc000066400000000000000000000054001207233610700223310ustar00rootroot00000000000000 #include interface HplMsp430I2C { async command bool isI2C(); async command void clearModeI2C(); async command void setModeI2C( msp430_i2c_union_config_t* config ); // U0CTL async command void setMasterMode(); async command void setSlaveMode(); async command void enableI2C(); async command void disableI2C(); // I2CTCTL async command bool getWordMode(); async command void setWordMode( bool mode ); async command bool getRepeatMode(); async command void setRepeatMode( bool mode ); async command uint8_t getClockSource(); async command void setClockSource( uint8_t src ); async command bool getTransmitReceiveMode(); async command void setTransmitMode(); async command void setReceiveMode(); async command bool getStartByte(); async command void setStartByte(); async command bool getStopBit(); async command void setStopBit(); async command bool getStartBit(); async command void setStartBit(); // I2CDR async command uint8_t getData(); async command void setData( uint8_t data ); // I2CNDAT async command uint8_t getTransferByteCount(); async command void setTransferByteCount( uint8_t count ); // I2CPSC async command uint8_t getClockPrescaler(); async command void setClockPrescaler( uint8_t scaler ); // I2CSCLH and I2CSCLL async command uint16_t getShiftClock(); async command void setShiftClock( uint16_t shift ); // I2COA async command uint16_t getOwnAddress(); async command void setOwnAddress( uint16_t addr ); // I2CSA async command uint16_t getSlaveAddress(); async command void setSlaveAddress( uint16_t addr ); // I2CIE async command void disableStartDetect(); async command void enableStartDetect(); async command void disableGeneralCall(); async command void enableGeneralCall(); async command void disableTransmitReady(); async command void enableTransmitReady(); async command void disableReceiveReady(); async command void enableReceiveReady(); async command void disableAccessReady(); async command void enableAccessReady(); async command void disableOwnAddress(); async command void enableOwnAddress(); async command void disableNoAck(); async command void enableNoAck(); async command void disableArbitrationLost(); async command void enableArbitrationLost(); // I2CIFG async command bool isStartDetectPending(); async command bool isGeneralCallPending(); async command bool isTransmitReadyPending(); async command bool isReceiveReadyPending(); async command bool isAccessReadyPending(); async command bool isOwnAddressPending(); async command bool isNoAckPending(); async command bool isArbitrationLostPending(); // I2CIV async command uint8_t getIV(); } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430I2C0C.nc000066400000000000000000000005741207233610700225230ustar00rootroot00000000000000 configuration HplMsp430I2C0C { provides interface HplMsp430I2C; } implementation { components HplMsp430I2C0P as HplI2CP; HplMsp430I2C = HplI2CP; components HplMsp430Usart0P as HplUsartP; HplUsartP.HplI2C -> HplI2CP; HplI2CP.HplUsart -> HplUsartP; components HplMsp430GeneralIOC as GIO; HplI2CP.SIMO -> GIO.SIMO0; HplI2CP.UCLK -> GIO.UCLK0; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430I2C0P.nc000066400000000000000000000176411207233610700225430ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-06-24 05:32:31 $ */ module HplMsp430I2C0P @safe() { provides interface HplMsp430I2C as HplI2C; uses interface HplMsp430Usart as HplUsart; uses interface HplMsp430GeneralIO as SIMO; uses interface HplMsp430GeneralIO as UCLK; } implementation { MSP430REG_NORACE(U0CTL); MSP430REG_NORACE(I2CTCTL); MSP430REG_NORACE(I2CDR); MSP430REG_NORACE(I2CSA); MSP430REG_NORACE(I2CIE); async command bool HplI2C.isI2C() { atomic return ((U0CTL & I2C) && (U0CTL & SYNC) && (U0CTL & I2CEN)); } async command void HplI2C.clearModeI2C() { atomic { U0CTL &= ~(I2C | SYNC | I2CEN); call HplUsart.resetUsart(TRUE); } } async command void HplI2C.setModeI2C( msp430_i2c_union_config_t* config ) { call HplUsart.resetUsart(TRUE); call HplUsart.disableUart(); call HplUsart.disableSpi(); call SIMO.makeInput(); call SIMO.selectModuleFunc(); call UCLK.makeInput(); call UCLK.selectModuleFunc(); atomic { U0CTL &= ~(I2C | I2CEN | SYNC); U0CTL = SWRST; U0CTL |= SYNC | I2C; U0CTL &= ~I2CEN; U0CTL = (config->i2cRegisters.uctl | (I2C | SYNC)) & ~I2CEN; I2CTCTL = 0x01; // resetting I2CTCTL first, // before configuring it, // for some reason causes the I2C module to // work after SPI has been used (Issue 14) I2CTCTL = config->i2cRegisters.i2ctctl; I2CPSC = config->i2cRegisters.i2cpsc; I2CSCLH = config->i2cRegisters.i2csclh; I2CSCLL = config->i2cRegisters.i2cscll; I2COA = config->i2cRegisters.i2coa; U0CTL |= I2CEN; } } // U0CTL async command void HplI2C.setMasterMode() { U0CTL |= MST; } async command void HplI2C.setSlaveMode() { U0CTL &= ~MST; } async command void HplI2C.enableI2C() { U0CTL |= I2CEN; } async command void HplI2C.disableI2C() { U0CTL &= ~I2CEN; } // I2CTCTL async command bool HplI2C.getWordMode() { return ( I2CTCTL & I2CWORD ) != 0; } async command void HplI2C.setWordMode( bool mode ) { I2CTCTL |= ( mode & 0x1 ) << 7; } async command bool HplI2C.getRepeatMode() { return ( I2CTCTL & I2CRM ) != 0; } async command void HplI2C.setRepeatMode( bool mode ) { I2CTCTL |= ( mode & 0x1 ) << 6;; } async command uint8_t HplI2C.getClockSource() { return ( I2CTCTL >> 4 ) & 0x3;; } async command void HplI2C.setClockSource( uint8_t src ) { atomic I2CTCTL = ( ( src & 0x3 ) << 4 ) | I2CTCTL; } async command bool HplI2C.getTransmitReceiveMode() { return ( I2CTCTL & I2CTRX ) != 0; } async command void HplI2C.setTransmitMode() { I2CTCTL |= I2CTRX; } async command void HplI2C.setReceiveMode() { I2CTCTL &= ~I2CTRX; } async command bool HplI2C.getStartByte() { return (I2CTCTL & I2CSTB) != 0; } async command void HplI2C.setStartByte() { I2CTCTL |= I2CSTB; } async command bool HplI2C.getStopBit() { return (I2CTCTL & I2CSTP) != 0; } async command void HplI2C.setStopBit() { I2CTCTL |= I2CSTP; } async command bool HplI2C.getStartBit() { return (I2CTCTL & I2CSTT) != 0; } async command void HplI2C.setStartBit() { I2CTCTL |= I2CSTT; } // I2CDR async command uint8_t HplI2C.getData() { return I2CDR; } async command void HplI2C.setData( uint8_t v ) { I2CDR = v; } // I2CNDAT async command uint8_t HplI2C.getTransferByteCount() { return I2CNDAT; } async command void HplI2C.setTransferByteCount( uint8_t v ) { I2CNDAT = v; } // I2CPSC async command uint8_t HplI2C.getClockPrescaler() { return I2CPSC; } async command void HplI2C.setClockPrescaler( uint8_t v ) { I2CPSC = v; } // I2CSCLH and I2CSCLL async command uint16_t HplI2C.getShiftClock() { uint16_t shift; atomic { shift = I2CSCLH; shift <<= 8; shift |= I2CSCLL; } return shift; } async command void HplI2C.setShiftClock( uint16_t shift ) { atomic { I2CSCLH = shift >> 8; I2CSCLL = shift; } } // I2COA async command uint16_t HplI2C.getOwnAddress() { return I2COA; } async command void HplI2C.setOwnAddress( uint16_t addr ) { I2COA = addr; } // I2CSA async command uint16_t HplI2C.getSlaveAddress() { return I2CSA; } async command void HplI2C.setSlaveAddress( uint16_t addr ) { I2CSA = addr; } // I2CIE async command void HplI2C.disableStartDetect() { I2CIE &= ~STTIE; } async command void HplI2C.enableStartDetect() { I2CIE |= STTIE; } async command void HplI2C.disableGeneralCall() { I2CIE &= ~GCIE; } async command void HplI2C.enableGeneralCall() { I2CIE |= GCIE; } async command void HplI2C.disableTransmitReady() { I2CIE &= ~TXRDYIE; } async command void HplI2C.enableTransmitReady() { I2CIE |= TXRDYIE; } async command void HplI2C.disableReceiveReady() { I2CIE &= ~RXRDYIE; } async command void HplI2C.enableReceiveReady() { I2CIE |= RXRDYIE; } async command void HplI2C.disableAccessReady() { I2CIE &= ~ARDYIE; } async command void HplI2C.enableAccessReady() { I2CIE |= ARDYIE; } async command void HplI2C.disableOwnAddress() { I2CIE &= ~OAIE; } async command void HplI2C.enableOwnAddress() { I2CIE |= OAIE; } async command void HplI2C.disableNoAck() { I2CIE &= ~NACKIE; } async command void HplI2C.enableNoAck() { I2CIE |= NACKIE; } async command void HplI2C.disableArbitrationLost() { I2CIE &= ~ALIE; } async command void HplI2C.enableArbitrationLost() { I2CIE |= ALIE; } // I2CIFG async command bool HplI2C.isStartDetectPending() { return ( I2CIFG & STTIFG ) != 0; } async command bool HplI2C.isGeneralCallPending() { return ( I2CIFG & GCIFG ) != 0; } async command bool HplI2C.isTransmitReadyPending() { return ( I2CIFG & TXRDYIFG ) != 0; } async command bool HplI2C.isReceiveReadyPending() { return ( I2CIFG & RXRDYIFG ) != 0; } async command bool HplI2C.isAccessReadyPending() { return ( I2CIFG & ARDYIFG ) != 0; } async command bool HplI2C.isOwnAddressPending() { return ( I2CIFG & OAIFG ) != 0; } async command bool HplI2C.isNoAckPending() { return ( I2CIFG & NACKIFG ) != 0; } async command bool HplI2C.isArbitrationLostPending() { return ( I2CIFG & ALIFG ) != 0; } // I2CIV async command uint8_t HplI2C.getIV() { return I2CIV; } } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430I2CInterrupts.nc000066400000000000000000000033641207233610700244400ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $ */ interface HplMsp430I2CInterrupts { async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430Usart.nc000066400000000000000000000144041207233610700230560ustar00rootroot00000000000000/* * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Byte-level interface to control a USART. *

      The USART can be switched to SPI- or UART-mode. The interface follows * the convention of being stateless, thus a higher layer has to maintain * state information. I.e. calling tx will transmit a byte of * data in the mode (SPI or UART) the USART has been set to before. * * @author Vlado Handziski (handzisk@tkn.tu-berlin.de) * @author Jan Hauer (hauer@tkn.tu-berlin.de) * @author Joe Polastre * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $ */ #include "msp430usart.h" interface HplMsp430Usart { /** * Sets the UxCTL Control Register */ async command void setUctl(msp430_uctl_t control); /** * Reads the UxCTL Control Register */ async command msp430_uctl_t getUctl(); /** * Sets the UxTCTL Transmit Control Register */ async command void setUtctl(msp430_utctl_t control); /** * Reads the UxTCTL Transmit Control Register */ async command msp430_utctl_t getUtctl(); /** * Sets the UxRCTL Receive Control Register */ async command void setUrctl(msp430_urctl_t control); /** * Reads the UxRCTL Receive Control Register */ async command msp430_urctl_t getUrctl(); /** * Sets the UxBR0 and UxBR1 Baud Rate Control Registers */ async command void setUbr(uint16_t ubr); /** * Reads the UxBR0 and UxBR1 Baud Rate Control Registers */ async command uint16_t getUbr(); /** * Sets the UxMCTL Modulation Control Register */ async command void setUmctl(uint8_t umctl); /** * Reads the UxMCTL Modulation Control Register */ async command uint8_t getUmctl(); async command void resetUsart(bool reset); /** * Returns an enum value corresponding to the current mode of the * USART module. */ async command msp430_usartmode_t getMode(); /** * Returns TRUE if the USART has Uart TX mode enabled */ async command bool isUartTx(); /** * Returns TRUE if the USART has Uart RX mode enabled */ async command bool isUartRx(); /** * Returns TRUE if the USART is set to Uart mode (both RX and TX) */ async command bool isUart(); /** * Enables both the Rx and the Tx Uart modules. */ async command void enableUart(); /** * Disables both the Rx and the Tx Uart modules. */ async command void disableUart(); /** * Enables the Uart TX functionality of the USART module. */ async command void enableUartTx(); /** * Disables the Uart TX module. */ async command void disableUartTx(); /** * Enables the Uart RX functionality of the USART module. */ async command void enableUartRx(); /** * Disables the Uart RX module. */ async command void disableUartRx(); /** * Enables the USART when in Spi mode. */ async command void enableSpi(); /** * Disables the USART when in Spi mode. */ async command void disableSpi(); /** * Returns TRUE if the USART is set to Spi mode */ async command bool isSpi(); /** * Switches USART to Spi mode. */ async command void setModeSpi(msp430_spi_union_config_t* config); /** * Switches USART to Uart mode (RX and TX enabled) * Interrupts disabled by default. */ async command void setModeUart(msp430_uart_union_config_t* config); /* Dis/enabling of UTXIFG / URXIFG */ async command void disableRxIntr(); async command void disableTxIntr(); async command void disableIntr(); async command void enableRxIntr(); async command void enableTxIntr(); async command void enableIntr(); /** * TRUE if TX interrupt pending, flag must be cleared explicitly */ async command bool isTxIntrPending(); /** * TRUE if RX interrupt pending, flag must be cleared explicitly */ async command bool isRxIntrPending(); /** * Clears RX interrupt pending flag */ async command void clrRxIntr(); /** * Clears TX interrupt pending flag */ async command void clrTxIntr(); /** * Clears both TX and RX interrupt pending flags */ async command void clrIntr(); /** * SUCCESS if the TX buffer is empty and all of the bits have been * shifted out */ async command bool isTxEmpty(); /** * Transmit a byte of data. When the transmission is completed, * txDone is generated. Only then a new byte may be * transmitted, otherwise the previous byte will be overwritten. * The mode of transmission (Uart or Spi) depends on the current * state of the USART, which must be managed by a higher layer. * * @return SUCCESS always. */ async command void tx(uint8_t data); /** * Get current value from RX-buffer. * * @return SUCCESS always. */ async command uint8_t rx(); } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430Usart0C.nc000066400000000000000000000076111207233610700232430ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An HPL abstraction of USART0 on the MSP430. * * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ */ #include "msp430usart.h" configuration HplMsp430Usart0C { provides interface HplMsp430Usart; provides interface HplMsp430UsartInterrupts; provides interface HplMsp430I2CInterrupts; } implementation { components HplMsp430Usart0P as HplUsartP; HplMsp430Usart = HplUsartP; HplMsp430UsartInterrupts = HplUsartP; HplMsp430I2CInterrupts = HplUsartP; components HplMsp430GeneralIOC as GIO; HplUsartP.SIMO -> GIO.SIMO0; HplUsartP.SOMI -> GIO.SOMI0; HplUsartP.UCLK -> GIO.UCLK0; HplUsartP.URXD -> GIO.URXD0; HplUsartP.UTXD -> GIO.UTXD0; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430Usart0P.nc000066400000000000000000000255541207233610700232660ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usart.h" /** * Implementation of USART0 lowlevel functionality - stateless. * Setting a mode will by default disable USART-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui * @author: Vlado Handziski * @author: Joe Polastre * @author: Philipp Huppertz * @version $Revision: 1.8 $ $Date: 2010-06-04 22:30:21 $ */ module HplMsp430Usart0P @safe() { provides interface HplMsp430Usart as Usart; provides interface HplMsp430UsartInterrupts as Interrupts; provides interface HplMsp430I2CInterrupts as I2CInterrupts; uses interface HplMsp430I2C as HplI2C; uses interface HplMsp430GeneralIO as SIMO; uses interface HplMsp430GeneralIO as SOMI; uses interface HplMsp430GeneralIO as UCLK; uses interface HplMsp430GeneralIO as URXD; uses interface HplMsp430GeneralIO as UTXD; } implementation { MSP430REG_NORACE(IE1); MSP430REG_NORACE(ME1); MSP430REG_NORACE(IFG1); MSP430REG_NORACE(U0TCTL); MSP430REG_NORACE(U0RCTL); MSP430REG_NORACE(U0TXBUF); TOSH_SIGNAL(UART0RX_VECTOR) { uint8_t temp = U0RXBUF; signal Interrupts.rxDone(temp); } TOSH_SIGNAL(UART0TX_VECTOR) { if ( call HplI2C.isI2C() ) signal I2CInterrupts.fired(); else signal Interrupts.txDone(); } async command void Usart.setUctl(msp430_uctl_t control) { U0CTL=uctl2int(control); } async command msp430_uctl_t Usart.getUctl() { return int2uctl(U0CTL); } async command void Usart.setUtctl(msp430_utctl_t control) { U0TCTL=utctl2int(control); } async command msp430_utctl_t Usart.getUtctl() { return int2utctl(U0TCTL); } async command void Usart.setUrctl(msp430_urctl_t control) { U0RCTL=urctl2int(control); } async command msp430_urctl_t Usart.getUrctl() { return int2urctl(U0RCTL); } async command void Usart.setUbr(uint16_t control) { atomic { U0BR0 = control & 0x00FF; U0BR1 = (control >> 8) & 0x00FF; } } async command uint16_t Usart.getUbr() { return (U0BR1 << 8) + U0BR0; } async command void Usart.setUmctl(uint8_t control) { U0MCTL=control; } async command uint8_t Usart.getUmctl() { return U0MCTL; } async command void Usart.resetUsart(bool reset) { if (reset) { U0CTL = SWRST; } else { CLR_FLAG(U0CTL, SWRST); } } async command bool Usart.isSpi() { atomic { return (U0CTL & SYNC) && (ME1 & USPIE0); } } async command bool Usart.isUart() { atomic { return !(U0CTL & SYNC) && ((ME1 & UTXE0) && (ME1 & URXE0)); } } async command bool Usart.isUartTx() { atomic { return !(U0CTL & SYNC) && (ME1 & UTXE0); } } async command bool Usart.isUartRx() { atomic { return !(U0CTL & SYNC) && (ME1 & URXE0); } } async command msp430_usartmode_t Usart.getMode() { if (call Usart.isUart()) return USART_UART; else if (call Usart.isUartRx()) return USART_UART_RX; else if (call Usart.isUartTx()) return USART_UART_TX; else if (call Usart.isSpi()) return USART_SPI; else if (call HplI2C.isI2C()) return USART_I2C; else return USART_NONE; } async command void Usart.enableUart() { atomic{ call UTXD.selectModuleFunc(); call URXD.selectModuleFunc(); } ME1 |= (UTXE0 | URXE0); // USART0 UART module enable } async command void Usart.disableUart() { atomic { ME1 &= ~(UTXE0 | URXE0); // USART0 UART module enable call UTXD.selectIOFunc(); call URXD.selectIOFunc(); } } async command void Usart.enableUartTx() { call UTXD.selectModuleFunc(); ME1 |= UTXE0; // USART0 UART Tx module enable } async command void Usart.disableUartTx() { ME1 &= ~UTXE0; // USART0 UART Tx module enable call UTXD.selectIOFunc(); } async command void Usart.enableUartRx() { call URXD.selectModuleFunc(); ME1 |= URXE0; // USART0 UART Rx module enable } async command void Usart.disableUartRx() { ME1 &= ~URXE0; // USART0 UART Rx module disable call URXD.selectIOFunc(); } async command void Usart.enableSpi() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } ME1 |= USPIE0; // USART0 SPI module enable } async command void Usart.disableSpi() { atomic { ME1 &= ~USPIE0; // USART0 SPI module disable call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configSpi(msp430_spi_union_config_t* config) { // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST; U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U0TCTL = config->spiRegisters.utctl; call Usart.setUbr(config->spiRegisters.ubr); call Usart.setUmctl(0x00); } async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call HplI2C.clearModeI2C(); call Usart.disableUart(); configSpi(config); call Usart.enableSpi(); call Usart.resetUsart(FALSE); call Usart.clrIntr(); call Usart.disableIntr(); } return; } void configUart(msp430_uart_union_config_t* config) { U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U0TCTL = config->uartRegisters.utctl; U0RCTL = config->uartRegisters.urctl; call Usart.setUbr(config->uartRegisters.ubr); call Usart.setUmctl(config->uartRegisters.umctl); } async command void Usart.setModeUart(msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call HplI2C.clearModeI2C(); call Usart.disableSpi(); configUart(config); if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) { call Usart.enableUart(); } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) { call Usart.disableUartTx(); call Usart.enableUartRx(); } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){ call Usart.disableUartRx(); call Usart.enableUartTx(); } else { call Usart.disableUart(); } call Usart.resetUsart(FALSE); call Usart.clrIntr(); call Usart.disableIntr(); } return; } async command bool Usart.isTxIntrPending(){ if (IFG1 & UTXIFG0){ return TRUE; } return FALSE; } async command bool Usart.isTxEmpty(){ if (U0TCTL & TXEPT) { return TRUE; } return FALSE; } async command bool Usart.isRxIntrPending(){ if (IFG1 & URXIFG0){ return TRUE; } return FALSE; } async command void Usart.clrTxIntr(){ IFG1 &= ~UTXIFG0; } async command void Usart.clrRxIntr() { IFG1 &= ~URXIFG0; } async command void Usart.clrIntr() { IFG1 &= ~(UTXIFG0 | URXIFG0); } async command void Usart.disableRxIntr() { IE1 &= ~URXIE0; } async command void Usart.disableTxIntr() { IE1 &= ~UTXIE0; } async command void Usart.disableIntr() { IE1 &= ~(UTXIE0 | URXIE0); } async command void Usart.enableRxIntr() { atomic { IFG1 &= ~URXIFG0; IE1 |= URXIE0; } } async command void Usart.enableTxIntr() { atomic { IFG1 &= ~UTXIFG0; IE1 |= UTXIE0; } } async command void Usart.enableIntr() { atomic { IFG1 &= ~(UTXIFG0 | URXIFG0); IE1 |= (UTXIE0 | URXIE0); } } async command void Usart.tx(uint8_t data) { U0TXBUF = data; } async command uint8_t Usart.rx() { return U0RXBUF; } default async event void I2CInterrupts.fired() {} default async command bool HplI2C.isI2C() { return FALSE; } default async command void HplI2C.clearModeI2C() {}; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430Usart1C.nc000066400000000000000000000075721207233610700232520ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An HPL abstraction of USART1 on the MSP430. * * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $ */ #include "msp430usart.h" configuration HplMsp430Usart1C { provides interface AsyncStdControl; provides interface HplMsp430Usart; provides interface HplMsp430UsartInterrupts; } implementation { components HplMsp430Usart1P as HplUsartP; components HplMsp430GeneralIOC as GIO; AsyncStdControl = HplUsartP; HplMsp430Usart = HplUsartP; HplMsp430UsartInterrupts = HplUsartP; HplUsartP.SIMO -> GIO.SIMO1; HplUsartP.SOMI -> GIO.SOMI1; HplUsartP.UCLK -> GIO.UCLK1; HplUsartP.URXD -> GIO.URXD1; HplUsartP.UTXD -> GIO.UTXD1; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430Usart1P.nc000066400000000000000000000247561207233610700232720ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usart.h" /** * Implementation of USART1 lowlevel functionality - stateless. * Setting a mode will by default disable USART-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui * @author: Vlado Handziski * @author: Joe Polastre * @version $Revision: 1.7 $ $Date: 2010-06-04 22:30:21 $ */ module HplMsp430Usart1P { provides interface AsyncStdControl; provides interface HplMsp430Usart as Usart; provides interface HplMsp430UsartInterrupts as Interrupts; uses interface HplMsp430GeneralIO as SIMO; uses interface HplMsp430GeneralIO as SOMI; uses interface HplMsp430GeneralIO as UCLK; uses interface HplMsp430GeneralIO as URXD; uses interface HplMsp430GeneralIO as UTXD; } implementation { MSP430REG_NORACE(IE2); MSP430REG_NORACE(ME2); MSP430REG_NORACE(IFG2); MSP430REG_NORACE(U1TCTL); MSP430REG_NORACE(U1RCTL); MSP430REG_NORACE(U1TXBUF); TOSH_SIGNAL(UART1RX_VECTOR) { uint8_t temp = U1RXBUF; signal Interrupts.rxDone(temp); } TOSH_SIGNAL(UART1TX_VECTOR) { signal Interrupts.txDone(); } async command error_t AsyncStdControl.start() { return SUCCESS; } async command error_t AsyncStdControl.stop() { call Usart.disableSpi(); call Usart.disableUart(); return SUCCESS; } async command void Usart.setUctl(msp430_uctl_t control) { U1CTL=uctl2int(control); } async command msp430_uctl_t Usart.getUctl() { return int2uctl(U1CTL); } async command void Usart.setUtctl(msp430_utctl_t control) { U1TCTL=utctl2int(control); } async command msp430_utctl_t Usart.getUtctl() { return int2utctl(U1TCTL); } async command void Usart.setUrctl(msp430_urctl_t control) { U1RCTL=urctl2int(control); } async command msp430_urctl_t Usart.getUrctl() { return int2urctl(U1RCTL); } async command void Usart.setUbr(uint16_t control) { atomic { U1BR0 = control & 0x00FF; U1BR1 = (control >> 8) & 0x00FF; } } async command uint16_t Usart.getUbr() { return (U1BR1 << 8) + U1BR0; } async command void Usart.setUmctl(uint8_t control) { U1MCTL=control; } async command uint8_t Usart.getUmctl() { return U1MCTL; } async command void Usart.resetUsart(bool reset) { if (reset) U1CTL = SWRST; else CLR_FLAG(U1CTL, SWRST); } async command bool Usart.isSpi() { atomic { return (U1CTL & SYNC) && (ME2 & USPIE1); } } async command bool Usart.isUart() { atomic { return !(U1CTL & SYNC) && ((ME2 & UTXE1) && (ME2 & URXE1)); } } async command bool Usart.isUartTx() { atomic { return !(U1CTL & SYNC) && (ME2 & UTXE1); } } async command bool Usart.isUartRx() { atomic { return !(U1CTL & SYNC) && (ME2 & URXE1); } } async command msp430_usartmode_t Usart.getMode() { if (call Usart.isUart()) return USART_UART; else if (call Usart.isUartRx()) return USART_UART_RX; else if (call Usart.isUartTx()) return USART_UART_TX; else if (call Usart.isSpi()) return USART_SPI; else return USART_NONE; } async command void Usart.enableUart() { atomic{ call UTXD.selectModuleFunc(); call URXD.selectModuleFunc(); } ME2 |= (UTXE1 | URXE1); // USART1 UART module enable } async command void Usart.disableUart() { atomic { ME2 &= ~(UTXE1 | URXE1); // USART1 UART module enable call UTXD.selectIOFunc(); call URXD.selectIOFunc(); } } async command void Usart.enableUartTx() { call UTXD.selectModuleFunc(); ME2 |= UTXE1; // USART1 UART Tx module enable } async command void Usart.disableUartTx() { ME2 &= ~UTXE1; // USART1 UART Tx module enable call UTXD.selectIOFunc(); } async command void Usart.enableUartRx() { call URXD.selectModuleFunc(); ME2 |= URXE1; // USART1 UART Rx module enable } async command void Usart.disableUartRx() { ME2 &= ~URXE1; // USART1 UART Rx module disable call URXD.selectIOFunc(); } async command void Usart.enableSpi() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } ME2 |= USPIE1; // USART1 SPI module enable } async command void Usart.disableSpi() { atomic { ME2 &= ~USPIE1; // USART1 SPI module disable call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configSpi(msp430_spi_union_config_t* config) { U1CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U1TCTL = config->spiRegisters.utctl; call Usart.setUbr(config->spiRegisters.ubr); call Usart.setUmctl(0x00); } async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call Usart.disableUart(); configSpi(config); call Usart.enableSpi(); call Usart.resetUsart(FALSE); call Usart.clrIntr(); call Usart.disableIntr(); } return; } void configUart(msp430_uart_union_config_t* config) { U1CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U1TCTL = config->uartRegisters.utctl; U1RCTL = config->uartRegisters.urctl; call Usart.setUbr(config->uartRegisters.ubr); call Usart.setUmctl(config->uartRegisters.umctl); } async command void Usart.setModeUart(msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call Usart.disableSpi(); configUart(config); if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) { call Usart.enableUart(); } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) { call Usart.disableUartTx(); call Usart.enableUartRx(); } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){ call Usart.disableUartRx(); call Usart.enableUartTx(); } else { call Usart.disableUart(); } call Usart.resetUsart(FALSE); call Usart.clrIntr(); call Usart.disableIntr(); } return; } async command bool Usart.isTxIntrPending(){ if (IFG2 & UTXIFG1){ return TRUE; } return FALSE; } async command bool Usart.isTxEmpty(){ if (U1TCTL & TXEPT) { return TRUE; } return FALSE; } async command bool Usart.isRxIntrPending(){ if (IFG2 & URXIFG1){ return TRUE; } return FALSE; } async command void Usart.clrTxIntr(){ IFG2 &= ~UTXIFG1; } async command void Usart.clrRxIntr() { IFG2 &= ~URXIFG1; } async command void Usart.clrIntr() { IFG2 &= ~(UTXIFG1 | URXIFG1); } async command void Usart.disableRxIntr() { IE2 &= ~URXIE1; } async command void Usart.disableTxIntr() { IE2 &= ~UTXIE1; } async command void Usart.disableIntr() { IE2 &= ~(UTXIE1 | URXIE1); } async command void Usart.enableRxIntr() { atomic { IFG2 &= ~URXIFG1; IE2 |= URXIE1; } } async command void Usart.enableTxIntr() { atomic { IFG2 &= ~UTXIFG1; IE2 |= UTXIE1; } } async command void Usart.enableIntr() { atomic { IFG2 &= ~(UTXIFG1 | URXIFG1); IE2 |= (UTXIE1 | URXIE1); } } async command void Usart.tx(uint8_t data) { U1TXBUF = data; } async command uint8_t Usart.rx() { return U1RXBUF; } } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/HplMsp430UsartInterrupts.nc000066400000000000000000000043631207233610700251610ustar00rootroot00000000000000/* * Copyright (c) 2004-2005, Technische Universität Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universität Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Byte-level interface to control a USART. *

      The USART can be switched to SPI- or UART-mode. The interface follows * the convention of being stateless, thus a higher layer has to maintain * state information. * * @author Jan Hauer (hauer@tkn.tu-berlin.de) * @author Joe Polastre * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $ */ #include "msp430usart.h" interface HplMsp430UsartInterrupts { /** * A byte of data is about to be transmitted, ie. the TXBuffer is * empty and ready to accept next byte. */ async event void txDone(); /** * A byte of data has been received. */ async event void rxDone(uint8_t data); } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430I2C0P.nc000066400000000000000000000046721207233610700220770ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $ */ configuration Msp430I2C0P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[uint8_t id ]; provides interface I2CPacket as I2CBasicAddr; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430I2CConfigure[ uint8_t id ]; uses interface HplMsp430I2CInterrupts as I2CInterrupts; } implementation { components Msp430I2CP as I2CP; Resource = I2CP.Resource; ResourceConfigure = I2CP.ResourceConfigure; Msp430I2CConfigure = I2CP.Msp430I2CConfigure; I2CBasicAddr = I2CP.I2CBasicAddr; UsartResource = I2CP.UsartResource; I2CInterrupts = I2CP.I2CInterrupts; components HplMsp430I2C0C as HplI2CC; I2CP.HplI2C -> HplI2CC; components LedsC as Leds; I2CP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430I2CC.nc000066400000000000000000000046621207233610700220010ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $ */ #include #include "msp430usart.h" generic configuration Msp430I2CC() { provides interface Resource; provides interface ResourceRequested; provides interface I2CPacket as I2CBasicAddr; uses interface Msp430I2CConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_I2CO_BUS ), }; components Msp430I2C0P as I2CP; Resource = I2CP.Resource[ CLIENT_ID ]; I2CBasicAddr = I2CP.I2CBasicAddr; Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ]; components new Msp430Usart0C() as UsartC; ResourceRequested = UsartC; I2CP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure; I2CP.UsartResource[ CLIENT_ID ] -> UsartC.Resource; I2CP.I2CInterrupts -> UsartC.HplMsp430I2CInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430I2CConfigure.nc000066400000000000000000000035751207233610700235420ustar00rootroot00000000000000/* * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface used by Msp430I2C clients to reconfigure the I2C before use * @author Vlado Handziski * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $ */ #include "msp430usart.h" interface Msp430I2CConfigure { async command msp430_i2c_union_config_t* getConfig(); } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430I2CP.nc000066400000000000000000000140501207233610700220060ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $ */ #include module Msp430I2CP { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface I2CPacket as I2CBasicAddr; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430I2CConfigure[ uint8_t id ]; uses interface HplMsp430I2C as HplI2C; uses interface HplMsp430I2CInterrupts as I2CInterrupts; uses interface Leds; } implementation { MSP430REG_NORACE(I2CIE); enum { TIMEOUT = 64, }; norace uint8_t* m_buf; norace uint8_t m_len; norace uint8_t m_pos; norace i2c_flags_t m_flags; void nextRead(); void nextWrite(); void signalDone( error_t error ); async command error_t Resource.immediateRequest[ uint8_t id ]() { return call UsartResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call UsartResource.request[ id ](); } async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } async command error_t Resource.release[ uint8_t id ]() { return call UsartResource.release[ id ](); } async command void ResourceConfigure.configure[ uint8_t id ]() { call HplI2C.setModeI2C(call Msp430I2CConfigure.getConfig[id]()); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call HplI2C.clearModeI2C(); } event void UsartResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() {return FAIL;} default event void Resource.granted[ uint8_t id ]() {} default async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { return &msp430_i2c_default_config; } async command error_t I2CBasicAddr.read( i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { m_buf = buf; m_len = len; m_flags = flags; m_pos = 0; call HplI2C.setMasterMode(); call HplI2C.setReceiveMode(); call HplI2C.setSlaveAddress( addr ); call HplI2C.enableReceiveReady(); call HplI2C.enableAccessReady(); call HplI2C.enableNoAck(); if ( flags & I2C_START ) call HplI2C.setStartBit(); else nextRead(); return SUCCESS; } async command error_t I2CBasicAddr.write( i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { m_buf = buf; m_len = len; m_flags = flags; m_pos = 0; call HplI2C.setMasterMode(); call HplI2C.setTransmitMode(); call HplI2C.setSlaveAddress( addr ); call HplI2C.enableTransmitReady(); call HplI2C.enableAccessReady(); call HplI2C.enableNoAck(); if ( flags & I2C_START ) call HplI2C.setStartBit(); else nextWrite(); return SUCCESS; } async event void I2CInterrupts.fired() { int i = 0; switch( call HplI2C.getIV() ) { case 0x04: if ( I2CDCTL & I2CBB ) call HplI2C.setStopBit(); while( I2CDCTL & I2CBUSY ); signalDone( FAIL ); break; case 0x08: while( (I2CDCTL & I2CBUSY) ) { if ( i++ >= TIMEOUT ) { signalDone( FAIL ); return; } } signalDone( SUCCESS ); break; case 0x0A: nextRead(); break; case 0x0C: nextWrite(); break; default: break; } } void nextRead() { m_buf[ m_pos++ ] = call HplI2C.getData(); if ( m_pos == m_len ) { if ( m_flags & I2C_STOP ) call HplI2C.setStopBit(); else signalDone( SUCCESS ); } } void nextWrite() { if ( ( m_pos == m_len - 1 ) && ( m_flags & I2C_STOP ) ) { call HplI2C.setStopBit(); } else if ( m_pos == m_len ) { signalDone( SUCCESS ); return; } call HplI2C.setData( m_buf[ m_pos++ ] ); } void signalDone( error_t error ) { I2CIE = 0; if ( call HplI2C.getTransmitReceiveMode() ) signal I2CBasicAddr.writeDone( error, I2CSA, m_len, m_buf ); else signal I2CBasicAddr.readDone( error, I2CSA, m_len, m_buf ); } default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430Spi0C.nc000066400000000000000000000110211207233610700222220ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * An implementation of the SPI on USART0 for the MSP430. The current * implementation defaults not using the DMA and performing the SPI * transfers in software. To utilize the DMA, use Msp430SpiDma0P in * place of Msp430SpiNoDma0P. * * @author Jonathan Hui * @author Mark Hays * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $ */ #include "msp430usart.h" generic configuration Msp430Spi0C() { provides interface Resource; provides interface ResourceRequested; provides interface SpiByte; #ifndef ENABLE_SPI0_DMA provides interface FastSpiByte; #endif provides interface SpiPacket; uses interface Msp430SpiConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_SPIO_BUS ), }; #ifdef ENABLE_SPI0_DMA #warning "Enabling SPI DMA on USART0" components Msp430SpiDma0P as SpiP; #else components Msp430SpiNoDma0P as SpiP; #endif Resource = SpiP.Resource[ CLIENT_ID ]; SpiByte = SpiP.SpiByte; #ifndef ENABLE_SPI0_DMA FastSpiByte = SpiP.FastSpiByte; #endif SpiPacket = SpiP.SpiPacket[ CLIENT_ID ]; Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ]; components new Msp430Usart0C() as UsartC; ResourceRequested = UsartC; SpiP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure; SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource; SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430Spi1C.nc000066400000000000000000000110211207233610700222230ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * An implementation of the SPI on USART0 for the MSP430. The current * implementation defaults not using the DMA and performing the SPI * transfers in software. To utilize the DMA, use Msp430SpiDma0P in * place of Msp430SpiNoDma0P. * * @author Jonathan Hui * @author Mark Hays * @version $Revision: 1.9 $ $Date: 2010-06-29 22:07:45 $ */ #include "msp430usart.h" generic configuration Msp430Spi1C() { provides interface Resource; provides interface ResourceRequested; provides interface SpiByte; #ifndef ENABLE_SPI1_DMA provides interface FastSpiByte; #endif provides interface SpiPacket; uses interface Msp430SpiConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_SPI1_BUS ), }; #ifdef ENABLE_SPI1_DMA #warning "Enabling SPI DMA on USART1" components Msp430SpiDma1P as SpiP; #else components Msp430SpiNoDma1P as SpiP; #endif Resource = SpiP.Resource[ CLIENT_ID ]; SpiByte = SpiP.SpiByte; #ifndef ENABLE_SPI1_DMA FastSpiByte = SpiP.FastSpiByte; #endif SpiPacket = SpiP.SpiPacket[ CLIENT_ID ]; Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ]; components new Msp430Usart1C() as UsartC; ResourceRequested = UsartC; SpiP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure; SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource; SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430SpiConfigure.nc000066400000000000000000000035751207233610700237200ustar00rootroot00000000000000/* * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface used by Msp430Spi clients to reconfigure the SPI before use * @author Vlado Handziski * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $ */ #include "msp430usart.h" interface Msp430SpiConfigure { async command msp430_spi_union_config_t* getConfig(); } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430SpiDma0P.nc000066400000000000000000000054501207233610700226720ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Mark Hays * @version $Revision: 1.5 $ $Date: 2007-11-08 21:34:42 $ */ configuration Msp430SpiDma0P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface SpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430SpiConfigure[ uint8_t id ]; uses interface HplMsp430UsartInterrupts as UsartInterrupts; } implementation { #include "Msp430Dma.h" components new Msp430SpiDmaP(IFG1_, U0TXBUF_, UTXIFG0, (uint16_t) DMA_TRIGGER_UTXIFG0, U0RXBUF_, URXIFG0, (uint16_t) DMA_TRIGGER_URXIFG0) as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; SpiByte = SpiP.SpiByte; SpiPacket = SpiP.SpiPacket; UsartResource = SpiP.UsartResource; UsartInterrupts = SpiP.UsartInterrupts; components HplMsp430Usart0C as UsartC; SpiP.Usart -> UsartC; components Msp430DmaC as DmaC; SpiP.DmaChannel1 -> DmaC.Channel1; SpiP.DmaChannel2 -> DmaC.Channel2; components LedsC as Leds; SpiP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430SpiDma1P.nc000066400000000000000000000054461207233610700227000ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Mark Hays * @version $Revision: 1.5 $ $Date: 2007-11-08 21:34:42 $ */ configuration Msp430SpiDma1P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[uint8_t id]; provides interface SpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430SpiConfigure[ uint8_t id ]; uses interface HplMsp430UsartInterrupts as UsartInterrupts; } implementation { #include "Msp430Dma.h" components new Msp430SpiDmaP(IFG2_, U1TXBUF_, UTXIFG1, (uint16_t) DMA_TRIGGER_UTXIFG1, U1RXBUF_, URXIFG1, (uint16_t) DMA_TRIGGER_URXIFG1) as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; SpiByte = SpiP.SpiByte; SpiPacket = SpiP.SpiPacket; UsartResource = SpiP.UsartResource; UsartInterrupts = SpiP.UsartInterrupts; components HplMsp430Usart1C as UsartC; SpiP.Usart -> UsartC; components Msp430DmaC as DmaC; SpiP.DmaChannel1 -> DmaC.Channel1; SpiP.DmaChannel2 -> DmaC.Channel2; components LedsC as Leds; SpiP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430SpiDmaP.nc000066400000000000000000000142011207233610700226040ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Mark Hays * @author Roman Lim * @version $Revision: 1.6 $ $Date: 2008-02-28 17:28:12 $ */ generic module Msp430SpiDmaP( uint16_t IFG_addr, uint16_t TXBUF_addr, uint8_t TXIFG, uint16_t TXTRIG, uint16_t RXBUF_addr, uint8_t RXIFG, uint16_t RXTRIG ) { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface SpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Msp430DmaChannel as DmaChannel1; uses interface Msp430DmaChannel as DmaChannel2; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430SpiConfigure[uint8_t id ]; uses interface HplMsp430Usart as Usart; uses interface HplMsp430UsartInterrupts as UsartInterrupts; uses interface Leds; } implementation { #define IFG (*(volatile uint8_t*)IFG_addr) uint8_t* m_tx_buf; uint8_t* m_rx_buf; uint16_t m_len; uint8_t m_client; uint8_t m_dump; void signalDone( error_t error ); task void signalDone_task(); async command error_t Resource.immediateRequest[ uint8_t id ]() { return call UsartResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call UsartResource.request[ id ](); } async command error_t Resource.release[ uint8_t id ]() { return call UsartResource.release[ id ](); } async command void ResourceConfigure.configure[ uint8_t id ]() { call Usart.setModeSpi(call Msp430SpiConfigure.getConfig[id]()); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usart.resetUsart(TRUE); call Usart.disableSpi(); call Usart.resetUsart(FALSE); } event void UsartResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return &msp430_spi_default_config; } default event void Resource.granted[ uint8_t id ]() {} async command uint8_t SpiByte.write( uint8_t tx ) { call Usart.tx( tx ); while( !call Usart.isRxIntrPending() ); call Usart.clrRxIntr(); return call Usart.rx(); } async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len ) { atomic { m_client = id; m_tx_buf = tx_buf; m_rx_buf = rx_buf; m_len = len; } if ( len ) { // clear the interrupt flags IFG &= ~( TXIFG | RXIFG ); // set up the RX xfer call DmaChannel1.setupTransfer(DMA_SINGLE_TRANSFER, RXTRIG, DMA_EDGE_SENSITIVE, (void *) RXBUF_addr, rx_buf ? rx_buf : &m_dump, len, DMA_BYTE, DMA_BYTE, DMA_ADDRESS_UNCHANGED, rx_buf ? DMA_ADDRESS_INCREMENTED : DMA_ADDRESS_UNCHANGED); // this doesn't start a transfer; it simply enables the channel call DmaChannel1.startTransfer(); // set up the TX xfer call DmaChannel2.setupTransfer(DMA_SINGLE_TRANSFER, TXTRIG, DMA_EDGE_SENSITIVE, tx_buf, (void *) TXBUF_addr, len, DMA_BYTE, DMA_BYTE, DMA_ADDRESS_INCREMENTED, DMA_ADDRESS_UNCHANGED); // this doesn't start a transfer; it simply enables the channel call DmaChannel2.startTransfer(); // pong the tx flag to get things rolling IFG |= TXIFG; } else { post signalDone_task(); } return SUCCESS; } task void signalDone_task() { atomic signalDone( SUCCESS ); } async event void DmaChannel1.transferDone( error_t error ) { signalDone( error ); } async event void DmaChannel2.transferDone( error_t error ) {} void signalDone( error_t error ) { signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, error ); } async event void UsartInterrupts.txDone() {} async event void UsartInterrupts.rxDone( uint8_t data ) {} default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430SpiNoDma0P.nc000066400000000000000000000102031207233610700231570ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * @author Jonathan Hui * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $ */ configuration Msp430SpiNoDma0P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[uint8_t id ]; provides interface SpiByte; provides interface FastSpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430SpiConfigure[ uint8_t id ]; uses interface HplMsp430UsartInterrupts as UsartInterrupts; } implementation { components new Msp430SpiNoDmaP() as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; SpiByte = SpiP.SpiByte; FastSpiByte = SpiP.FastSpiByte; SpiPacket = SpiP.SpiPacket; UsartResource = SpiP.UsartResource; UsartInterrupts = SpiP.UsartInterrupts; components HplMsp430Usart0C as UsartC; SpiP.Usart -> UsartC; components LedsC as Leds; SpiP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430SpiNoDma1P.nc000066400000000000000000000102031207233610700231600ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * @author Jonathan Hui * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $ */ configuration Msp430SpiNoDma1P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[uint8_t id ]; provides interface SpiByte; provides interface FastSpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430SpiConfigure[ uint8_t id ]; uses interface HplMsp430UsartInterrupts as UsartInterrupts; } implementation { components new Msp430SpiNoDmaP() as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; SpiByte = SpiP.SpiByte; FastSpiByte = SpiP.FastSpiByte; SpiPacket = SpiP.SpiPacket; UsartResource = SpiP.UsartResource; UsartInterrupts = SpiP.UsartInterrupts; components HplMsp430Usart1C as UsartC; SpiP.Usart -> UsartC; components LedsC as Leds; SpiP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc000066400000000000000000000176441207233610700231170ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * @author Jonathan Hui * @author Jan Hauer (bugfix in continueOp()) * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $ */ generic module Msp430SpiNoDmaP() { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface SpiByte; provides interface FastSpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430SpiConfigure[ uint8_t id ]; uses interface HplMsp430Usart as Usart; uses interface HplMsp430UsartInterrupts as UsartInterrupts; uses interface Leds; } implementation { enum { SPI_ATOMIC_SIZE = 2, }; norace uint16_t m_len; norace uint8_t* COUNT_NOK(m_len) m_tx_buf; norace uint8_t* COUNT_NOK(m_len) m_rx_buf; norace uint16_t m_pos; norace uint8_t m_client; void signalDone(); task void signalDone_task(); async command error_t Resource.immediateRequest[ uint8_t id ]() { return call UsartResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call UsartResource.request[ id ](); } async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } async command error_t Resource.release[ uint8_t id ]() { return call UsartResource.release[ id ](); } async command void ResourceConfigure.configure[ uint8_t id ]() { call Usart.setModeSpi(call Msp430SpiConfigure.getConfig[id]()); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usart.resetUsart(TRUE); call Usart.disableSpi(); call Usart.resetUsart(FALSE); } event void UsartResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } async command uint8_t SpiByte.write( uint8_t tx ) { uint8_t byte; // we are in spi mode which is configured to have turned off interrupts //call Usart.disableRxIntr(); call Usart.tx( tx ); while( !call Usart.isRxIntrPending() ); call Usart.clrRxIntr(); byte = call Usart.rx(); //call Usart.enableRxIntr(); return byte; } inline async command void FastSpiByte.splitWrite(uint8_t data) { call Usart.tx( data ); } inline async command uint8_t FastSpiByte.splitRead() { while( !call Usart.isRxIntrPending() ); return call Usart.rx(); } inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) { uint8_t b; while( !call Usart.isRxIntrPending() ); b = call Usart.rx(); while( !call Usart.isTxIntrPending() ); call Usart.tx( data ); return b; } inline async command uint8_t FastSpiByte.write(uint8_t data) { call FastSpiByte.splitWrite( data ); return call FastSpiByte.splitRead(); } default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return &msp430_spi_default_config; } default event void Resource.granted[ uint8_t id ]() {} void continueOp() { uint8_t end; uint8_t tmp; atomic { call Usart.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); end = m_pos + SPI_ATOMIC_SIZE; if ( end > m_len ) end = m_len; while ( ++m_pos < end ) { while( !call Usart.isRxIntrPending() ); tmp = call Usart.rx(); if ( m_rx_buf ) m_rx_buf[ m_pos - 1 ] = tmp; call Usart.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); } } } async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len ) { m_client = id; m_tx_buf = tx_buf; m_rx_buf = rx_buf; m_len = len; m_pos = 0; if ( len ) { call Usart.enableRxIntr(); continueOp(); } else { post signalDone_task(); } return SUCCESS; } task void signalDone_task() { atomic signalDone(); } async event void UsartInterrupts.rxDone( uint8_t data ) { if ( m_rx_buf ) m_rx_buf[ m_pos-1 ] = data; if ( m_pos < m_len ) continueOp(); else { call Usart.disableRxIntr(); signalDone(); } } void signalDone() { signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, SUCCESS ); } async event void UsartInterrupts.txDone() {} default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430Uart0C.nc000066400000000000000000000052131207233610700224100ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An implementation of the UART on USART0 for the MSP430. * @author Vlado Handziski * @author Jonathan Hui * @author Eric B. Decker * @version $Revision: 1.6 $ $Date: 2008-05-21 22:11:57 $ */ #include "msp430usart.h" generic configuration Msp430Uart0C() { provides interface Resource; provides interface ResourceRequested; provides interface UartStream; provides interface UartByte; uses interface Msp430UartConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_UARTO_BUS ), }; components Msp430Uart0P as UartP; Resource = UartP.Resource[ CLIENT_ID ]; UartStream = UartP.UartStream[ CLIENT_ID ]; UartByte = UartP.UartByte[ CLIENT_ID ]; Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; components new Msp430Usart0C() as UsartC; ResourceRequested = UsartC; UartP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure; UartP.UsartResource[ CLIENT_ID ] -> UsartC.Resource; UartP.UsartInterrupts[ CLIENT_ID ] -> UsartC.HplMsp430UsartInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430Uart0P.nc000066400000000000000000000052761207233610700224360ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Vlado Handziski * @author Eric B. Decker * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $ */ configuration Msp430Uart0P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface UartStream[ uint8_t id ]; provides interface UartByte[ uint8_t id ]; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430UartConfigure[ uint8_t id ]; uses interface HplMsp430UsartInterrupts as UsartInterrupts[ uint8_t id ]; } implementation { components new Msp430UartP() as UartP; Resource = UartP.Resource; ResourceConfigure = UartP.ResourceConfigure; Msp430UartConfigure = UartP.Msp430UartConfigure; UartStream = UartP.UartStream; UartByte = UartP.UartByte; UsartResource = UartP.UsartResource; UsartInterrupts = UartP.UsartInterrupts; components HplMsp430Usart0C as UsartC; UartP.Usart -> UsartC; components Counter32khz16C as CounterC; UartP.Counter -> CounterC; components LedsC as Leds; UartP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430Uart1C.nc000066400000000000000000000052131207233610700224110ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An implementation of the UART on USART1 for the MSP430. * @author Vlado Handziski * @author Jonathan Hui * @author Eric B. Decker * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $ */ #include "msp430usart.h" generic configuration Msp430Uart1C() { provides interface Resource; provides interface ResourceRequested; provides interface UartStream; provides interface UartByte; uses interface Msp430UartConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_UART1_BUS ), }; components Msp430Uart1P as UartP; Resource = UartP.Resource[ CLIENT_ID ]; UartStream = UartP.UartStream[ CLIENT_ID ]; UartByte = UartP.UartByte[ CLIENT_ID ];; Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; components new Msp430Usart1C() as UsartC; ResourceRequested = UsartC; UartP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure; UartP.UsartResource[ CLIENT_ID ] -> UsartC.Resource; UartP.UsartInterrupts[ CLIENT_ID ] -> UsartC.HplMsp430UsartInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430Uart1P.nc000066400000000000000000000053061207233610700224310ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Vlado Handziski * @author Eric B. Decker * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $ */ configuration Msp430Uart1P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface UartStream[ uint8_t id ]; provides interface UartByte[ uint8_t id ]; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430UartConfigure[ uint8_t id ]; uses interface HplMsp430UsartInterrupts as UsartInterrupts[ uint8_t id ]; } implementation { components new Msp430UartP() as UartP; Resource = UartP.Resource; ResourceConfigure = UartP.ResourceConfigure; Msp430UartConfigure = UartP.Msp430UartConfigure; UartStream = UartP.UartStream; UartByte = UartP.UartByte; UsartResource = UartP.UsartResource; UsartInterrupts = UartP.UsartInterrupts; components HplMsp430Usart1C as UsartC; UartP.Usart -> UsartC; components Counter32khz16C as CounterC; UartP.Counter -> CounterC; components LedsC as Leds; UartP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430UartConfigure.nc000066400000000000000000000036011207233610700240660ustar00rootroot00000000000000/* * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface used by Msp430Uart clients to reconfigure the UART before use * @author Vlado Handziski * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $ */ #include "msp430usart.h" interface Msp430UartConfigure { async command msp430_uart_union_config_t* getConfig(); } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430UartP.nc000066400000000000000000000164661207233610700223610ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Vlado Handziski * @author Eric B. Decker * @version $Revision: 1.7 $ $Date: 2008-06-04 05:31:15 $ */ #include generic module Msp430UartP() { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface UartStream[ uint8_t id ]; provides interface UartByte[ uint8_t id ]; uses interface Resource as UsartResource[ uint8_t id ]; uses interface Msp430UartConfigure[ uint8_t id ]; uses interface HplMsp430Usart as Usart; uses interface HplMsp430UsartInterrupts as UsartInterrupts[ uint8_t id ]; uses interface Counter; uses interface Leds; } implementation { norace uint16_t m_tx_len, m_rx_len; norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; norace uint16_t m_tx_pos, m_rx_pos; norace uint8_t m_byte_time; norace uint8_t current_owner; async command error_t Resource.immediateRequest[ uint8_t id ]() { return call UsartResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call UsartResource.request[ id ](); } async command bool Resource.isOwner[ uint8_t id ]() { return call UsartResource.isOwner[ id ](); } async command error_t Resource.release[ uint8_t id ]() { if (call UsartResource.isOwner[id]() == FALSE) return FAIL; if ( m_rx_buf || m_tx_buf ) return EBUSY; return call UsartResource.release[ id ](); } async command void ResourceConfigure.configure[ uint8_t id ]() { msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); m_byte_time = config->uartConfig.ubr / 2; call Usart.setModeUart(config); call Usart.enableIntr(); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usart.resetUsart(TRUE); call Usart.disableIntr(); call Usart.disableUart(); /* leave the usart in reset */ //call Usart.resetUsart(FALSE); // this shouldn't be called. } event void UsartResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } async command error_t UartStream.enableReceiveInterrupt[ uint8_t id ]() { if (call UsartResource.isOwner[id]() == FALSE) return FAIL; call Usart.enableRxIntr(); return SUCCESS; } async command error_t UartStream.disableReceiveInterrupt[ uint8_t id ]() { if (call UsartResource.isOwner[id]() == FALSE) return FAIL; call Usart.disableRxIntr(); return SUCCESS; } async command error_t UartStream.receive[ uint8_t id ]( uint8_t* buf, uint16_t len ) { if (call UsartResource.isOwner[id]() == FALSE) return FAIL; if ( len == 0 ) return FAIL; atomic { if ( m_rx_buf ) return EBUSY; m_rx_buf = buf; m_rx_len = len; m_rx_pos = 0; } return SUCCESS; } async event void UsartInterrupts.rxDone[uint8_t id]( uint8_t data ) { if ( m_rx_buf ) { m_rx_buf[ m_rx_pos++ ] = data; if ( m_rx_pos >= m_rx_len ) { uint8_t* buf = m_rx_buf; m_rx_buf = NULL; signal UartStream.receiveDone[id]( buf, m_rx_len, SUCCESS ); } } else { signal UartStream.receivedByte[id]( data ); } } async command error_t UartStream.send[ uint8_t id ]( uint8_t* buf, uint16_t len ) { if (call UsartResource.isOwner[id]() == FALSE) return FAIL; if ( len == 0 ) return FAIL; else if ( m_tx_buf ) return EBUSY; m_tx_buf = buf; m_tx_len = len; m_tx_pos = 0; current_owner = id; call Usart.tx( buf[ m_tx_pos++ ] ); return SUCCESS; } async event void UsartInterrupts.txDone[uint8_t id]() { if(current_owner != id) { uint8_t* buf = m_tx_buf; m_tx_buf = NULL; signal UartStream.sendDone[id]( buf, m_tx_len, FAIL ); } else if ( m_tx_pos < m_tx_len ) { call Usart.tx( m_tx_buf[ m_tx_pos++ ] ); } else { uint8_t* buf = m_tx_buf; m_tx_buf = NULL; signal UartStream.sendDone[id]( buf, m_tx_len, SUCCESS ); } } async command error_t UartByte.send[ uint8_t id ]( uint8_t data ) { if (call UsartResource.isOwner[id]() == FALSE) return FAIL; call Usart.clrTxIntr(); call Usart.disableTxIntr (); call Usart.tx( data ); while( !call Usart.isTxIntrPending() ); call Usart.clrTxIntr(); call Usart.enableTxIntr(); return SUCCESS; } async command error_t UartByte.receive[ uint8_t id ]( uint8_t* byte, uint8_t timeout ) { uint16_t timeout_micro = m_byte_time * timeout + 1; uint16_t start; if (call UsartResource.isOwner[id]() == FALSE) return FAIL; start = call Counter.get(); while( !call Usart.isRxIntrPending() ) { if ( ( call Counter.get() - start ) >= timeout_micro ) return FAIL; } *byte = call Usart.rx(); return SUCCESS; } async event void Counter.overflow() {} default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; } default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; } default async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() { return &msp430_uart_default_config; } default event void Resource.granted[ uint8_t id ]() {} default async event void UartStream.sendDone[ uint8_t id ](uint8_t* buf, uint16_t len, error_t error) {} default async event void UartStream.receivedByte[ uint8_t id ](uint8_t byte) {} default async event void UartStream.receiveDone[ uint8_t id ]( uint8_t* buf, uint16_t len, error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430Usart0C.nc000066400000000000000000000054451207233610700226020ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Provides an interface for USART0 on the MSP430. * * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $ */ generic configuration Msp430Usart0C() { provides interface Resource; provides interface ResourceRequested; provides interface ArbiterInfo; provides interface HplMsp430Usart; provides interface HplMsp430UsartInterrupts; provides interface HplMsp430I2CInterrupts; #ifdef __msp430_have_usart0_with_i2c provides interface HplMsp430I2C; #endif uses interface ResourceConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_HPLUSART0_RESOURCE ), }; components Msp430UsartShare0P as UsartShareP; Resource = UsartShareP.Resource[ CLIENT_ID ]; ResourceRequested = UsartShareP.ResourceRequested[ CLIENT_ID ]; ResourceConfigure = UsartShareP.ResourceConfigure[ CLIENT_ID ]; ArbiterInfo = UsartShareP.ArbiterInfo; HplMsp430UsartInterrupts = UsartShareP.Interrupts[ CLIENT_ID ]; HplMsp430I2CInterrupts = UsartShareP.I2CInterrupts[ CLIENT_ID ]; components HplMsp430Usart0C as HplUsartC; HplMsp430Usart = HplUsartC; #ifdef __msp430_have_usart0_with_i2c components HplMsp430I2C0C as HplI2CC; HplMsp430I2C = HplI2CC; #endif } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430Usart1C.nc000066400000000000000000000050341207233610700225750ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Provides an interface for USART1 on the MSP430. * * @author Vlado Handziski * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $ */ generic configuration Msp430Usart1C() { provides interface Resource; provides interface ResourceRequested; provides interface ArbiterInfo; provides interface HplMsp430Usart; provides interface HplMsp430UsartInterrupts; uses interface ResourceConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_HPLUSART1_RESOURCE ), }; components Msp430UsartShare1P as UsartShareP; Resource = UsartShareP.Resource[ CLIENT_ID ]; ResourceRequested = UsartShareP.ResourceRequested[ CLIENT_ID ]; ResourceConfigure = UsartShareP.ResourceConfigure[ CLIENT_ID ]; ArbiterInfo = UsartShareP.ArbiterInfo; HplMsp430UsartInterrupts = UsartShareP.Interrupts[ CLIENT_ID ]; components HplMsp430Usart1C as UsartC; HplMsp430Usart = UsartC; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430UsartShare0P.nc000066400000000000000000000050261207233610700235750ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $ */ configuration Msp430UsartShare0P { provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ]; provides interface HplMsp430I2CInterrupts as I2CInterrupts[ uint8_t id ]; provides interface Resource[ uint8_t id ]; provides interface ResourceRequested[ uint8_t id ]; provides interface ArbiterInfo; uses interface ResourceConfigure[ uint8_t id ]; } implementation { components new Msp430UsartShareP() as UsartShareP; Interrupts = UsartShareP; I2CInterrupts = UsartShareP; components new FcfsArbiterC( MSP430_HPLUSART0_RESOURCE ) as ArbiterC; Resource = ArbiterC; ResourceRequested = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; UsartShareP.ArbiterInfo -> ArbiterC; components HplMsp430Usart0C as HplUsartC; UsartShareP.RawInterrupts -> HplUsartC; UsartShareP.RawI2CInterrupts -> HplUsartC; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430UsartShare1P.nc000066400000000000000000000051151207233610700235750ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Vlado Handziski * @author Jonathan Hui * @version $Revision: 1.6 $ $Date: 2008-05-21 22:11:57 $ */ configuration Msp430UsartShare1P { provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ]; provides interface Resource[ uint8_t id ]; provides interface ResourceRequested[ uint8_t id ]; provides interface ArbiterInfo; uses interface ResourceConfigure[ uint8_t id ]; } implementation { components new Msp430UsartShareP() as UsartShareP; Interrupts = UsartShareP; UsartShareP.RawInterrupts -> UsartC; components new FcfsArbiterC( MSP430_HPLUSART1_RESOURCE ) as ArbiterC; Resource = ArbiterC; ResourceRequested = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; UsartShareP.ArbiterInfo -> ArbiterC; components new AsyncStdControlPowerManagerC() as PowerManagerC; PowerManagerC.ResourceDefaultOwner -> ArbiterC; components HplMsp430Usart1C as UsartC; PowerManagerC.AsyncStdControl -> UsartC; } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/Msp430UsartShareP.nc000066400000000000000000000053221207233610700235140ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-06-26 04:39:08 $ */ generic module Msp430UsartShareP() @safe() { provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ]; provides interface HplMsp430I2CInterrupts as I2CInterrupts[ uint8_t id ]; uses interface HplMsp430UsartInterrupts as RawInterrupts; uses interface HplMsp430I2CInterrupts as RawI2CInterrupts; uses interface ArbiterInfo; } implementation { async event void RawInterrupts.txDone() { if ( call ArbiterInfo.inUse() ) signal Interrupts.txDone[ call ArbiterInfo.userId() ](); } async event void RawInterrupts.rxDone( uint8_t data ) { if ( call ArbiterInfo.inUse() ) signal Interrupts.rxDone[ call ArbiterInfo.userId() ]( data ); } async event void RawI2CInterrupts.fired() { if ( call ArbiterInfo.inUse() ) signal I2CInterrupts.fired[ call ArbiterInfo.userId() ](); } default async event void Interrupts.txDone[ uint8_t id ]() {} default async event void Interrupts.rxDone[ uint8_t id ]( uint8_t data ) {} default async event void I2CInterrupts.fired[ uint8_t id ]() {} } tinyos-2.1.2+dfsg/tos/chips/msp430/usart/msp430usart.h000066400000000000000000000274501207233610700223460ustar00rootroot00000000000000/* * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Vlado Handziski * @author Philipp Huppertz */ #ifndef _H_Msp430Usart_h #define _H_Msp430Usart_h #define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource" #define MSP430_SPIO_BUS "Msp430Spi0.Resource" #define MSP430_UARTO_BUS "Msp430Uart0.Resource" #define MSP430_I2CO_BUS "Msp430I2C0.Resource" #define MSP430_HPLUSART1_RESOURCE "Msp430Usart1.Resource" #define MSP430_SPI1_BUS "Msp430Spi1.Resource" #define MSP430_UART1_BUS "Msp430Uart1.Resource" typedef enum { USART_NONE = 0, USART_UART = 1, USART_UART_TX = 2, USART_UART_RX = 3, USART_SPI = 4, USART_I2C = 5 } msp430_usartmode_t; typedef struct { unsigned int swrst: 1; //Software reset (0=operational; 1=reset) unsigned int mm: 1; //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol) unsigned int sync: 1; //Synchronous mode (0=UART; 1=SPI/I2C) unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver) unsigned int clen: 1; //Character length (0=7-bit data; 1=8-bit data) unsigned int spb: 1; //Stop bits (0=one stop bit; 1=two stop bits) unsigned int pev: 1; //Parity select (0=odd; 1=even) unsigned int pena: 1; //Parity enable (0=disabled; 1=enabled) } __attribute__ ((packed)) msp430_uctl_t ; typedef struct { unsigned int txept:1; //Transmitter empty (0=busy; 1=TX buffer empty or SWRST=1) unsigned int stc:1; //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled) unsigned int txwake: 1; //Transmiter wake (0=next char is data; 1=next char is address) unsigned int urxse: 1; //Receive start-edge detection (0=disabled; 1=enabled) unsigned int ssel: 2; //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK) unsigned int ckpl: 1; //Clock polarity (0=normal; 1=inverted) unsigned int ckph:1; //Clock phase (0=normal; 1=half-cycle delayed) } __attribute__ ((packed)) msp430_utctl_t; typedef struct { unsigned int rxerr: 1; //Receive error (0=no errors; 1=error detected) unsigned int rxwake: 1; //Receive wake-up (0=received data; 1=received an address) unsigned int urxwie: 1; //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx) unsigned int urxeie: 1; //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set) unsigned int brk:1; //Break detect (0=no break; 1=break occured) unsigned int oe:1; //Overrun error (0=no error; 1=overrun error) unsigned int pe:1; //Parity error (0=no error; 1=parity error) unsigned int fe:1; //Framing error (0=no error; 1=low stop bit) } __attribute__ ((packed)) msp430_urctl_t; DEFINE_UNION_CAST(uctl2int,uint8_t,msp430_uctl_t) DEFINE_UNION_CAST(int2uctl,msp430_uctl_t,uint8_t) DEFINE_UNION_CAST(utctl2int,uint8_t,msp430_utctl_t) DEFINE_UNION_CAST(int2utctl,msp430_utctl_t,uint8_t) DEFINE_UNION_CAST(urctl2int,uint8_t,msp430_urctl_t) DEFINE_UNION_CAST(int2urctl,msp430_urctl_t,uint8_t) typedef struct { unsigned int ubr: 16; //Clock division factor (>=0x0002) unsigned int :1; unsigned int mm: 1; //Master mode (0=slave; 1=master) unsigned int :1; unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver) unsigned int clen: 1; //Character length (0=7-bit data; 1=8-bit data) unsigned int: 3; unsigned int:1; unsigned int stc: 1; //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled) unsigned int:2; unsigned int ssel: 2; //Clock source (00=external UCLK [slave]; 01=ACLK [master]; 10=SMCLK [master] 11=SMCLK [master]); unsigned int ckpl: 1; //Clock polarity (0=inactive is low && data at rising edge; 1=inverted) unsigned int ckph: 1; //Clock phase (0=normal; 1=half-cycle delayed) unsigned int :0; } msp430_spi_config_t; typedef struct { uint16_t ubr; uint8_t uctl; uint8_t utctl; } msp430_spi_registers_t; typedef union { msp430_spi_config_t spiConfig; msp430_spi_registers_t spiRegisters; } msp430_spi_union_config_t; msp430_spi_union_config_t msp430_spi_default_config = { { ubr : 0x0002, ssel : 0x02, clen : 1, listen : 0, mm : 1, ckph : 1, ckpl : 0, stc : 1 } }; /** The calculations were performed using the msp-uart.pl script: msp-uart.pl -- calculates the uart registers for MSP430 Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org **/ typedef enum { //32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x94, UBR_32KHZ_1800=0x0012, UMCTL_32KHZ_1800=0x84, UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x6D, UBR_32KHZ_4800=0x0006, UMCTL_32KHZ_4800=0x77, UBR_32KHZ_9600=0x0003, UMCTL_32KHZ_9600=0x29, // (Warning: triggers MSP430 errata US14) UBR_1MHZ_1200=0x0369, UMCTL_1MHZ_1200=0x7B, UBR_1MHZ_1800=0x0246, UMCTL_1MHZ_1800=0x55, UBR_1MHZ_2400=0x01B4, UMCTL_1MHZ_2400=0xDF, UBR_1MHZ_4800=0x00DA, UMCTL_1MHZ_4800=0xAA, UBR_1MHZ_9600=0x006D, UMCTL_1MHZ_9600=0x44, UBR_1MHZ_19200=0x0036, UMCTL_1MHZ_19200=0xB5, UBR_1MHZ_38400=0x001B, UMCTL_1MHZ_38400=0x94, UBR_1MHZ_57600=0x0012, UMCTL_1MHZ_57600=0x84, UBR_1MHZ_76800=0x000D, UMCTL_1MHZ_76800=0x6D, UBR_1MHZ_115200=0x0009, UMCTL_1MHZ_115200=0x10, UBR_1MHZ_230400=0x0004, UMCTL_1MHZ_230400=0x55, } msp430_uart_rate_t; typedef struct { unsigned int ubr:16; //Baud rate (use enum msp430_uart_rate_t for predefined rates) unsigned int umctl: 8; //Modulation (use enum msp430_uart_rate_t for predefined rates) unsigned int :1; unsigned int mm: 1; //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol) unsigned int :1; unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver) unsigned int clen: 1; //Character length (0=7-bit data; 1=8-bit data) unsigned int spb: 1; //Stop bits (0=one stop bit; 1=two stop bits) unsigned int pev: 1; //Parity select (0=odd; 1=even) unsigned int pena: 1; //Parity enable (0=disabled; 1=enabled) unsigned int :0; unsigned int :3; unsigned int urxse: 1; //Receive start-edge detection (0=disabled; 1=enabled) unsigned int ssel: 2; //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK) unsigned int ckpl: 1; //Clock polarity (0=normal; 1=inverted) unsigned int :1; unsigned int :2; unsigned int urxwie: 1; //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx) unsigned int urxeie: 1; //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set) unsigned int :4; unsigned int :0; unsigned int utxe:1; // 1:enable tx module unsigned int urxe:1; // 1:enable rx module } msp430_uart_config_t; typedef struct { uint16_t ubr; uint8_t umctl; uint8_t uctl; uint8_t utctl; uint8_t urctl; uint8_t ume; } msp430_uart_registers_t; typedef union { msp430_uart_config_t uartConfig; msp430_uart_registers_t uartRegisters; } msp430_uart_union_config_t; msp430_uart_union_config_t msp430_uart_default_config = { { utxe : 1, urxe : 1, ubr : UBR_1MHZ_57600, umctl : UMCTL_1MHZ_57600, ssel : 0x02, pena : 0, pev : 0, spb : 0, clen : 1, listen : 0, mm : 0, ckpl : 0, urxse : 0, urxeie : 1, urxwie : 0, utxe : 1, urxe : 1 } }; typedef struct { unsigned int i2cstt: 1; // I2CSTT Bit 0 START bit. (0=No action; 1=Send START condition) unsigned int i2cstp: 1; // I2CSTP Bit 1 STOP bit. (0=No action; 1=Send STOP condition) unsigned int i2cstb: 1; // I2CSTB Bit 2 Start byte. (0=No action; 1=Send START condition and start byte (01h)) unsigned int i2cctrx: 1; //I2CTRX Bit 3 I2C transmit. (0=Receive mode; 1=Transmit mode) pin. unsigned int i2cssel: 2; // I2C clock source select. (00=No clock; 01=ACLK; 10=SMCLK; 11=SMCLK) unsigned int i2ccrm: 1; // I2C repeat mode unsigned int i2cword: 1; // I2C word mode. Selects byte(=0) or word(=1) mode for the I2C data register. } __attribute__ ((packed)) msp430_i2ctctl_t; DEFINE_UNION_CAST(i2ctctl2int,uint8_t,msp430_i2ctctl_t) DEFINE_UNION_CAST(int2i2ctctl,msp430_i2ctctl_t,uint8_t) typedef struct { unsigned int :1; unsigned int mst: 1; //Master mode (0=slave; 1=master) unsigned int :1; unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver) unsigned int xa: 1; //Extended addressing (0=7-bit addressing; 1=8-bit addressing) unsigned int :1; unsigned int txdmaen: 1; //DMA to TX (0=disabled; 1=enabled) unsigned int rxdmaen: 1; //RX to DMA (0=disabled; 1=enabled) unsigned int :4; unsigned int i2cssel: 2; //Clock source (00=disabled; 01=ACLK; 10=SMCLK; 11=SMCLK) unsigned int i2crm: 1; //Repeat mode (0=use I2CNDAT; 1=count in software) unsigned int i2cword: 1; //Word mode (0=byte mode; 1=word mode) unsigned int i2cpsc: 8; //Clock prescaler (values >0x04 not recomended) unsigned int i2csclh: 8; //High period (high period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc) unsigned int i2cscll: 8; //Low period (low period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc) unsigned int i2coa : 10; // Own address register. unsigned int :6; } msp430_i2c_config_t; typedef struct { uint8_t uctl; uint8_t i2ctctl; uint8_t i2cpsc; uint8_t i2csclh; uint8_t i2cscll; uint16_t i2coa; } msp430_i2c_registers_t; typedef union { msp430_i2c_config_t i2cConfig; msp430_i2c_registers_t i2cRegisters; } msp430_i2c_union_config_t; msp430_i2c_union_config_t msp430_i2c_default_config = { { rxdmaen : 0, txdmaen : 0, xa : 0, listen : 0, mst : 1, i2cword : 0, i2crm : 1, i2cssel : 0x2, i2cpsc : 0, i2csclh : 0x3, i2cscll : 0x3, i2coa : 0, } }; typedef uint8_t uart_speed_t; typedef uint8_t uart_parity_t; typedef uint8_t uart_duplex_t; enum { TOS_UART_1200 = 0, TOS_UART_1800 = 1, TOS_UART_2400 = 2, TOS_UART_4800 = 3, TOS_UART_9600 = 4, TOS_UART_19200 = 5, TOS_UART_38400 = 6, TOS_UART_57600 = 7, TOS_UART_76800 = 8, TOS_UART_115200 = 9, TOS_UART_230400 = 10 }; enum { TOS_UART_OFF, TOS_UART_RONLY, TOS_UART_TONLY, TOS_UART_DUPLEX }; enum { TOS_UART_PARITY_NONE, TOS_UART_PARITY_EVEN, TOS_UART_PARITY_ODD }; #endif//_H_Msp430Usart_h tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/000077500000000000000000000000001207233610700200235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/000077500000000000000000000000001207233610700207665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA.nc000066400000000000000000000116761207233610700237020ustar00rootroot00000000000000/* * Copyright (c) 2010 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Byte-level interface to control Usci based modules (MSP430X), msp430f2618 etc. * USCI_A supports Uart, SPI, and irDA modes. USCI_B SPI and I2C. Stateless * interface modeled after HplMsp430Usart of the MSP430 family. * * @author Vlado Handziski (handzisk@tkn.tu-berlin.de) * @author Jan Hauer (hauer@tkn.tu-berlin.de) * @author Joe Polastre * @author Xavier Orduna * @author Eric B. Decker * * see msp430usci.h for basic definitions. * See TI MSP430x2xx Family User's Guide SLAU144E for details. */ #include "msp430usci.h" interface HplMsp430UsciA { /* UCxxCTL0 */ async command void setUctl0(msp430_uctl0_t control); async command msp430_uctl0_t getUctl0(); /* UCxxCTL1 */ async command void setUctl1(msp430_uctl1_t control); async command msp430_uctl1_t getUctl1(); /* UCxxBR1 UCxxBR0 */ async command void setUbr(uint16_t ubr); async command uint16_t getUbr(); /* UCxxMCTL */ async command void setUmctl(uint8_t umctl); async command uint8_t getUmctl(); /* * access usci status registers. yes there are control * bits in the status register. */ /* UCxxSTAT */ async command void setUstat(uint8_t ustat); async command uint8_t getUstat(); /* * resetUsci() - reset or unreset module port * * reset: TRUE (set UCSWRST) * FALSE (unset UCSWRST), let the port run */ async command void resetUsci(bool reset); /* * return enum indicating what mode the usci port in in. */ async command msp430_uscimode_t getMode(); /* * configure or deconfigure gpio pins for SPI mode * * switches io pins between port and module function. */ async command void enableSpi(); async command void disableSpi(); /* * Returns TRUE if the Usci is in SPI mode */ async command bool isSpi(); /* * configure usci as spi using config. * leaves interrupts disabled. */ async command void setModeSpi(msp430_spi_union_config_t* config); /* Interrupt control */ async command void disableRxIntr(); async command void disableTxIntr(); async command void disableIntr(); async command void enableRxIntr(); async command void enableTxIntr(); async command void enableIntr(); async command bool isTxIntrPending(); async command bool isRxIntrPending(); async command void clrTxIntr(); async command void clrRxIntr(); async command void clrIntr(); async command bool isTxEmpty(); /** * Transmit a byte of data. When the transmission is completed, * txDone is generated. Only then a new byte may be * transmitted, otherwise the previous byte will be overwritten. */ async command void tx(uint8_t data); /** * Get current value from RX-buffer. * * return: byte received. */ async command uint8_t rx(); /* * Returns TRUE if the Usci is in Uart mode */ async command bool isUart(); /* * configure or deconfigure gpio pins for UART mode * * switches io pins between port and module function. */ async command void enableUart(); async command void disableUart(); /* * configure usci as uart using config. * leaves interrupts disabled. */ async command void setModeUart(msp430_uart_union_config_t* config); } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0C.nc000066400000000000000000000047321207233610700240600ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An HPL abstraction of USCIA0 on the MSP430X. * * @author Jonathan Hui * @author Joe Polastre * @author Xavier Orduna */ #include "msp430usci.h" #define USING_USCIA0 1 configuration HplMsp430UsciA0C { provides interface HplMsp430UsciA; provides interface HplMsp430UsciInterrupts; } implementation { components HplMsp430UsciA0P as HplUsciP; HplMsp430UsciA = HplUsciP; HplMsp430UsciInterrupts = HplUsciP; components HplMsp430GeneralIOC as GIO; HplUsciP.SIMO -> GIO.UCA0SIMO; HplUsciP.SOMI -> GIO.UCA0SOMI; HplUsciP.UCLK -> GIO.UCA0CLK; HplUsciP.URXD -> GIO.UCA0RXD; HplUsciP.UTXD -> GIO.UCA0TXD; components HplMsp430UsciAB0RawInterruptsP as UsciRawInterrupts; HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciA; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA0P.nc000066400000000000000000000203701207233610700240710ustar00rootroot00000000000000/* * Copyright (c) 2010-2011, Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006, Arch Rock Corporation * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usci.h" /* * Implementation of usci A0 (uart or spi) low level functionality - stateless. * Setting a mode will by default disable USCI-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui * @author: Vlado Handziski * @author: Joe Polastre * @author: Philipp Huppertz * @author: Xavier Orduna * @author: Eric B. Decker * * A0, A1: uart, spi, irda. * B0, B1: spi, i2c. * * This module interfaces to usciA0: uart or spi. */ module HplMsp430UsciA0P @safe() { provides { interface HplMsp430UsciA as Usci; interface HplMsp430UsciInterrupts as Interrupts; } uses { interface HplMsp430GeneralIO as SIMO; interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as UCLK; interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; } } implementation { MSP430REG_NORACE(IE2); MSP430REG_NORACE(IFG2); MSP430REG_NORACE(UCA0CTL0); MSP430REG_NORACE(UCA0CTL1); MSP430REG_NORACE(UCA0TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); } async event void UsciRawInterrupts.txDone() { signal Interrupts.txDone(); } /* Control registers */ async command void Usci.setUctl0(msp430_uctl0_t control) { UCA0CTL0 = uctl02int(control); } async command msp430_uctl0_t Usci.getUctl0() { return int2uctl0(UCA0CTL0); } async command void Usci.setUctl1(msp430_uctl1_t control) { UCA0CTL1 = uctl12int(control); } async command msp430_uctl1_t Usci.getUctl1() { return int2uctl1(UCA0CTL0); } async command void Usci.setUbr(uint16_t control) { atomic { UCA0BR0 = control & 0x00FF; UCA0BR1 = (control >> 8) & 0x00FF; } } async command uint16_t Usci.getUbr() { return (UCA0BR1 << 8) + UCA0BR0; } async command void Usci.setUmctl(uint8_t control) { UCA0MCTL=control; } async command uint8_t Usci.getUmctl() { return UCA0MCTL; } async command void Usci.setUstat(uint8_t control) { UCA0STAT = control; } async command uint8_t Usci.getUstat() { return UCA0STAT; } /* Operations */ async command void Usci.resetUsci(bool reset) { if (reset) SET_FLAG(UCA0CTL1, UCSWRST); else CLR_FLAG(UCA0CTL1, UCSWRST); } bool isSpi() { msp430_uctl0_t tmp; tmp = int2uctl0(UCA0CTL0); return (tmp.ucsync && tmp.ucmode != 3); } bool isI2C() { msp430_uctl0_t tmp; tmp = int2uctl0(UCA0CTL0); return (tmp.ucsync && tmp.ucmode == 3); } bool isUart() { msp430_uctl0_t tmp; tmp = int2uctl0(UCA0CTL0); return (tmp.ucsync == 0); } async command bool Usci.isSpi() { return isSpi(); } async command msp430_uscimode_t Usci.getMode() { if (isSpi()) return USCI_SPI; if (isI2C()) return USCI_I2C; if (isUart()) return USCI_UART; else return USCI_NONE; } async command void Usci.enableSpi() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } } async command void Usci.disableSpi() { atomic { call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configSpi(msp430_spi_union_config_t* config) { UCA0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCA0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); call Usci.setUmctl(0); /* MCTL <- 0 if spi */ } async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { atomic { call Usci.disableIntr(); call Usci.clrIntr(); call Usci.resetUsci(TRUE); call Usci.enableSpi(); configSpi(config); call Usci.resetUsci(FALSE); } } async command bool Usci.isTxIntrPending(){ if (IFG2 & UCA0TXIFG) return TRUE; return FALSE; } async command bool Usci.isRxIntrPending(){ if (IFG2 & UCA0RXIFG) return TRUE; return FALSE; } async command void Usci.clrTxIntr(){ IFG2 &= ~UCA0TXIFG; } async command void Usci.clrRxIntr() { IFG2 &= ~UCA0RXIFG; } async command void Usci.clrIntr() { IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); } async command void Usci.disableRxIntr() { IE2 &= ~UCA0RXIE; } async command void Usci.disableTxIntr() { IE2 &= ~UCA0TXIE; } async command void Usci.disableIntr() { IE2 &= ~(UCA0TXIE | UCA0RXIE); } async command void Usci.enableRxIntr() { atomic { IFG2 &= ~UCA0RXIFG; IE2 |= UCA0RXIE; } } async command void Usci.enableTxIntr() { atomic { IFG2 &= ~UCA0TXIFG; IE2 |= UCA0TXIE; } } async command void Usci.enableIntr() { atomic { IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); IE2 |= (UCA0TXIE | UCA0RXIE); } } /* * Returns true if the transmit path is empty. * * in the usart hardware there was a seperate bit that indicated * both parts of the transmitter path were empty. The TXBUF and * the outgoing shift register. * * Unfortunately, TI changed this in the USCI h/w to a single busy * bit that indcates that either the tx or the rx path is busy. * So if the transmitter is idle but we are receiving a character * then we still think the transmitter is busy. TI sucks. */ async command bool Usci.isTxEmpty() { if (UCA0STAT & UCBUSY) return FALSE; return TRUE; } async command void Usci.tx(uint8_t data) { UCA0TXBUF = data; } async command uint8_t Usci.rx() { return UCA0RXBUF; } async command bool Usci.isUart() { return isUart(); } async command void Usci.enableUart() { atomic { call UTXD.selectModuleFunc(); call URXD.selectModuleFunc(); } } async command void Usci.disableUart() { atomic { call UTXD.selectIOFunc(); call URXD.selectIOFunc(); } } void configUart(msp430_uart_union_config_t* config) { UCA0CTL1 = (config->uartRegisters.uctl1 | UCSWRST); UCA0CTL0 = config->uartRegisters.uctl0; /* ucsync should be off */ call Usci.setUbr(config->uartRegisters.ubr); call Usci.setUmctl(config->uartRegisters.umctl); } async command void Usci.setModeUart(msp430_uart_union_config_t* config) { atomic { call Usci.disableIntr(); call Usci.clrIntr(); call Usci.resetUsci(TRUE); call Usci.enableUart(); configUart(config); call Usci.resetUsci(FALSE); } } } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1C.nc000066400000000000000000000047311207233610700240600ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * An HPL abstraction of USCIA1 on the MSP430X. * * @author Jonathan Hui * @author Joe Polastre * @author Xavier Orduna */ #include "msp430usci.h" #define USING_USCIA1 1 configuration HplMsp430UsciA1C { provides interface HplMsp430UsciA; provides interface HplMsp430UsciInterrupts; } implementation { components HplMsp430UsciA1P as HplUsciP; HplMsp430UsciA = HplUsciP; HplMsp430UsciInterrupts = HplUsciP; components HplMsp430GeneralIOC as GIO; HplUsciP.SIMO -> GIO.UCA1SIMO; HplUsciP.SOMI -> GIO.UCA1SOMI; HplUsciP.UCLK -> GIO.UCA1CLK; HplUsciP.URXD -> GIO.UCA1RXD; HplUsciP.UTXD -> GIO.UCA1TXD; components HplMsp430UsciAB1RawInterruptsP as UsciRawInterrupts; HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciA; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciA1P.nc000066400000000000000000000204271207233610700240750ustar00rootroot00000000000000/* * Copyright (c) 2010-2011, Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006, Arch Rock Corporation * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usci.h" /* * Implementation of usci A1 (uart or spi) low level functionality - stateless. * Setting a mode will by default disable USCI-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui * @author: Vlado Handziski * @author: Joe Polastre * @author: Philipp Huppertz * @author: Xavier Orduna * @author: Eric B. Decker * * A0, A1: uart, spi, irda. * B0, B1: spi, i2c. * * This module interfaces to usciA1: uart or spi. */ module HplMsp430UsciA1P @safe() { provides { interface HplMsp430UsciA as Usci; interface HplMsp430UsciInterrupts as Interrupts; } uses { interface HplMsp430GeneralIO as SIMO; interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as UCLK; interface HplMsp430GeneralIO as URXD; interface HplMsp430GeneralIO as UTXD; interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; } } implementation { MSP430REG_NORACE(UC1IE); MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCA1CTL0); MSP430REG_NORACE(UCA1CTL1); MSP430REG_NORACE(UCA1TXBUF); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); } async event void UsciRawInterrupts.txDone() { signal Interrupts.txDone(); } /* Control registers */ async command void Usci.setUctl0(msp430_uctl0_t control) { UCA1CTL0 = uctl02int(control); } async command msp430_uctl0_t Usci.getUctl0() { return int2uctl0(UCA1CTL0); } async command void Usci.setUctl1(msp430_uctl1_t control) { UCA1CTL1 = uctl12int(control); } async command msp430_uctl1_t Usci.getUctl1() { return int2uctl1(UCA1CTL0); } async command void Usci.setUbr(uint16_t control) { atomic { UCA1BR0 = control & 0x00FF; UCA1BR1 = (control >> 8) & 0x00FF; } } async command uint16_t Usci.getUbr() { return (UCA1BR1 << 8) + UCA1BR0; } async command void Usci.setUmctl(uint8_t control) { UCA1MCTL=control; } async command uint8_t Usci.getUmctl() { return UCA1MCTL; } async command void Usci.setUstat(uint8_t control) { UCA1STAT = control; } async command uint8_t Usci.getUstat() { return UCA1STAT; } /* Operations */ async command void Usci.resetUsci(bool reset) { if (reset) SET_FLAG(UCA1CTL1, UCSWRST); else CLR_FLAG(UCA1CTL1, UCSWRST); } bool isSpi() { msp430_uctl0_t tmp; tmp = int2uctl0(UCA1CTL0); return (tmp.ucsync && tmp.ucmode != 3); } async command bool Usci.isSpi() { return isSpi(); } bool isI2C() { msp430_uctl0_t tmp; tmp = int2uctl0(UCA1CTL0); return (tmp.ucsync && tmp.ucmode == 3); } bool isUart() { msp430_uctl0_t tmp; tmp = int2uctl0(UCA1CTL0); return (tmp.ucsync == 0); } async command msp430_uscimode_t Usci.getMode() { if (isSpi()) return USCI_SPI; if (isI2C()) return USCI_I2C; if (isUart()) return USCI_UART; else return USCI_NONE; } async command void Usci.enableSpi() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } } async command void Usci.disableSpi() { atomic { call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configSpi(msp430_spi_union_config_t* config) { UCA1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCA1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); call Usci.setUmctl(0); /* MCTL <- 0 if spi */ } async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { atomic { call Usci.disableIntr(); call Usci.clrIntr(); call Usci.resetUsci(TRUE); call Usci.enableSpi(); configSpi(config); call Usci.resetUsci(FALSE); } } async command bool Usci.isTxIntrPending(){ if (UC1IFG & UCA1TXIFG) return TRUE; return FALSE; } async command bool Usci.isRxIntrPending(){ if (UC1IFG & UCA1RXIFG) return TRUE; return FALSE; } async command void Usci.clrTxIntr(){ UC1IFG &= ~UCA1TXIFG; } async command void Usci.clrRxIntr() { UC1IFG &= ~UCA1RXIFG; } async command void Usci.clrIntr() { UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); } async command void Usci.disableRxIntr() { UC1IE &= ~UCA1RXIE; } async command void Usci.disableTxIntr() { UC1IE &= ~UCA1TXIE; } async command void Usci.disableIntr() { UC1IE &= ~(UCA1TXIE | UCA1RXIE); } async command void Usci.enableRxIntr() { atomic { UC1IFG &= ~UCA1RXIFG; UC1IE |= UCA1RXIE; } } async command void Usci.enableTxIntr() { atomic { UC1IFG &= ~UCA1TXIFG; UC1IE |= UCA1TXIE; } } async command void Usci.enableIntr() { atomic { UC1IFG &= ~(UCA1TXIFG | UCA1RXIFG); UC1IE |= (UCA1TXIE | UCA1RXIE); } } /* * Returns true if the transmit path is empty. * * in the usart hardware there was a seperate bit that indicated * both parts of the transmitter path were empty. The TXBUF and * the outgoing shift register. * * Unfortunately, TI changed this in the USCI h/w to a single busy * bit that indcates that either the tx or the rx path is busy. * So if the transmitter is idle but we are receiving a character * then we still think the transmitter is busy. TI sucks. */ async command bool Usci.isTxEmpty() { if (UCA1STAT & UCBUSY) return FALSE; return TRUE; } async command void Usci.tx(uint8_t data) { UCA1TXBUF = data; } async command uint8_t Usci.rx() { return UCA1RXBUF; } async command bool Usci.isUart() { return isUart(); } async command void Usci.enableUart() { atomic { call UTXD.selectModuleFunc(); call URXD.selectModuleFunc(); } } async command void Usci.disableUart() { atomic { call UTXD.selectIOFunc(); call URXD.selectIOFunc(); } } void configUart(msp430_uart_union_config_t* config) { UCA1CTL1 = (config->uartRegisters.uctl1 | UCSWRST); UCA1CTL0 = config->uartRegisters.uctl0; /* ucsync should be off */ call Usci.setUbr(config->uartRegisters.ubr); call Usci.setUmctl(config->uartRegisters.umctl); } async command void Usci.setModeUart(msp430_uart_union_config_t* config) { atomic { call Usci.disableIntr(); call Usci.clrIntr(); call Usci.resetUsci(TRUE); call Usci.enableUart(); configUart(config); call Usci.resetUsci(FALSE); } } } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciAB0RawInterruptsP.nc000066400000000000000000000053111207233610700267430ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * An HPL abstraction for USCI A/B shared vector interrupt on the MSP430X. * * @author Xavier Orduna * @author Eric B. Decker */ #include "msp430usci.h" module HplMsp430UsciAB0RawInterruptsP @safe() { provides interface HplMsp430UsciRawInterrupts as UsciA; provides interface HplMsp430UsciRawInterrupts as UsciB; } implementation{ TOSH_SIGNAL(USCIAB0RX_VECTOR) { uint8_t temp; if (IFG2 & UCA0RXIFG){ temp = UCA0RXBUF; signal UsciA.rxDone(temp); } if (IFG2 & UCB0RXIFG){ temp = UCB0RXBUF; signal UsciB.rxDone(temp); } } TOSH_SIGNAL(USCIAB0TX_VECTOR) { if ((IFG2 & UCA0TXIFG) | (IFG2 & UCA0RXIFG)){ signal UsciA.txDone(); } if ((IFG2 & UCB0TXIFG) | (IFG2 & UCB0RXIFG)){ signal UsciB.txDone(); } } /* default handlers */ default async event void UsciA.txDone(){ return; } default async event void UsciA.rxDone(uint8_t temp){ return; } default async event void UsciB.txDone(){ return; } default async event void UsciB.rxDone(uint8_t temp){ return; } } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciAB1RawInterruptsP.nc000066400000000000000000000053261207233610700267520ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * An HPL abstraction for USCI A/B shared vector interrupt on the MSP430X. * * @author Xavier Orduna * @author Eric B. Decker */ #include "msp430usci.h" module HplMsp430UsciAB1RawInterruptsP @safe() { provides interface HplMsp430UsciRawInterrupts as UsciA; provides interface HplMsp430UsciRawInterrupts as UsciB; } implementation { TOSH_SIGNAL(USCIAB1RX_VECTOR) { uint8_t temp; if (UC1IFG & UCA1RXIFG){ temp = UCA1RXBUF; signal UsciA.rxDone(temp); } if (UC1IFG & UCB1RXIFG){ temp = UCB1RXBUF; signal UsciB.rxDone(temp); } } TOSH_SIGNAL(USCIAB1TX_VECTOR) { if ((UC1IFG & UCA1TXIFG) | (UC1IFG & UCA1RXIFG)){ signal UsciA.txDone(); } if ((UC1IFG & UCB1TXIFG) | (UC1IFG & UCB1RXIFG)){ signal UsciB.txDone(); } } /* default handlers */ default async event void UsciA.txDone(){ return; } default async event void UsciA.rxDone(uint8_t temp){ return; } default async event void UsciB.txDone(){ return; } default async event void UsciB.rxDone(uint8_t temp){ return; } } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB.nc000066400000000000000000000142361207233610700236760ustar00rootroot00000000000000/* * Copyright (c) 2010-2011, Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Byte-level interface to control Usci based modules (MSP430X), msp430f2618 etc. * USCI_B supports SPI and i2c modes. Stateless interface modeled after * HplMsp430Usart of the MSP430 family. * * @author Vlado Handziski (handzisk@tkn.tu-berlin.de) * @author Jan Hauer (hauer@tkn.tu-berlin.de) * @author Joe Polastre * @author Xavier Orduna * @author Eric B. Decker * * see msp430usci.h for basic definitions. * See TI MSP430x2xx Family User's Guide SLAU144E for details. */ #include "msp430usci.h" interface HplMsp430UsciB { /* UCxxCTL0 */ async command void setUctl0(msp430_uctl0_t control); async command msp430_uctl0_t getUctl0(); /* UCxxCTL1 */ async command void setUctl1(msp430_uctl1_t control); async command msp430_uctl1_t getUctl1(); /* UCxxBR1 UCxxBR0 */ async command void setUbr(uint16_t ubr); async command uint16_t getUbr(); /* * access usci status registers. yes there are control * bits in the status register. */ /* UCxxSTAT */ async command void setUstat(uint8_t ustat); async command uint8_t getUstat(); /* * resetUsci() - reset or unreset module port * * reset: TRUE (set UCSWRST) * FALSE (unset UCSWRST), let the port run */ async command void resetUsci(bool reset); /* * return enum indicating what mode the usci port in in. */ async command msp430_uscimode_t getMode(); /* Interrupt control */ async command void disableRxIntr(); async command void disableTxIntr(); async command void disableIntr(); async command void enableRxIntr(); async command void enableTxIntr(); async command void enableIntr(); async command bool isTxIntrPending(); async command bool isRxIntrPending(); async command void clrTxIntr(); async command void clrRxIntr(); async command void clrIntr(); /** * Transmit a byte of data. When the transmission is completed, * txDone is generated. Only then a new byte may be * transmitted, otherwise the previous byte will be overwritten. */ async command void tx(uint8_t data); /** * Get current value from RX-buffer. * * return: byte received. */ async command uint8_t rx(); /*********************************************************************** * * SPI Mode interface * ***********************************************************************/ /* * configure or deconfigure gpio pins for SPI mode * * switches io pins between port and module function. */ async command void enableSpi(); async command void disableSpi(); /* * Returns TRUE if the Usci is in SPI mode */ async command bool isSpi(); /* * configure usci as spi using config. * leaves interrupts disabled. */ async command void setModeSpi(msp430_spi_union_config_t* config); /*********************************************************************** * * I2C Mode interface * ***********************************************************************/ /* * Returns TRUE if the Usci is in i2c mode */ async command bool isI2C(); async command void enableI2C(); async command void disableI2C(); /* * configure usci as i2c using config. * leaves interrupts disabled. */ async command void setModeI2C( msp430_i2c_union_config_t* config ); /* control which direction the bus is in */ async command void setTransmitMode(); async command void setReceiveMode(); /* h/w bits for controlling what to send next when master */ async command void setTXNACK(); async command void setTXStop(); async command void setTXStart(); async command uint16_t getOwnAddress(); async command void setOwnAddress( uint16_t addr ); /* GeneralCall Response control, set/clear */ async command void clearGeneralCall(); async command void setGeneralCall(); /* set master/slave mode, i2c */ async command void setSlaveMode(); async command void setMasterMode(); /* get bits of uctl1 in i2c mode */ async command bool getStopBit(); async command bool getTransmitReceiveMode(); /* when master the SLA (slave address register says who we are talking to. */ async command uint16_t getSlaveAddress(); async command void setSlaveAddress(uint16_t addr); async command void disableNACKInt(); async command void enableNACKInt(); async command void disableStopInt(); async command void enableStopInt(); async command void disableStartInt(); async command void enableStartInt(); async command void disableArbLostInt(); async command void enableArbLostInt(); } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0C.nc000066400000000000000000000047231207233610700240610ustar00rootroot00000000000000/* * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * An HPL abstraction of USCIB0 on the MSP430. * * @author Jonathan Hui * @author Joe Polastre * @author Xavier Orduna * @author Eric B. Decker */ #include "msp430usci.h" configuration HplMsp430UsciB0C { provides { interface HplMsp430UsciB; interface HplMsp430UsciInterrupts; } } implementation { components HplMsp430UsciB0P as HplUsciP; HplMsp430UsciB = HplUsciP; HplMsp430UsciInterrupts = HplUsciP; components HplMsp430GeneralIOC as GIO; HplUsciP.SIMO -> GIO.UCB0SIMO; HplUsciP.SOMI -> GIO.UCB0SOMI; HplUsciP.UCLK -> GIO.UCB0CLK; components HplMsp430UsciAB0RawInterruptsP as UsciRawInterrupts; HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciB; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB0P.nc000066400000000000000000000236771207233610700241070ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usci.h" /* * Implementation of USCIB0 lowlevel functionality - stateless. * Setting a mode will by default disable USCIB0 interrupts. * * @author: Jan Hauer * @author: Jonathan Hui * @author: Vlado Handziski * @author: Joe Polastre * @author: Philipp Huppertz * @author: Xavier Orduna * @author: Eric B. Decker * @author: Jordi Soucheiron * * A0, A1: uart, spi, irda. * B0, B1: spi, i2c. * * This module interfaces to usciB0: spi or i2c. */ module HplMsp430UsciB0P @safe() { provides { interface HplMsp430UsciB as Usci; interface HplMsp430UsciInterrupts as Interrupts; } uses { interface HplMsp430GeneralIO as SIMO; interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as UCLK; interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; } } implementation { MSP430REG_NORACE(IE2); MSP430REG_NORACE(IFG2); MSP430REG_NORACE(UCB0CTL0); MSP430REG_NORACE(UCB0CTL1); MSP430REG_NORACE(UCB0RXBUF); MSP430REG_NORACE(UCB0TXBUF); MSP430REG_NORACE(UCB0I2COA); MSP430REG_NORACE(UCB0I2CIE); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); } async event void UsciRawInterrupts.txDone() { signal Interrupts.txDone(); } /* Control registers */ async command void Usci.setUctl0(msp430_uctl0_t control) { UCB0CTL0 = uctl02int(control); } async command msp430_uctl0_t Usci.getUctl0() { return int2uctl0(UCB0CTL0); } async command void Usci.setUctl1(msp430_uctl1_t control) { UCB0CTL1 = uctl12int(control); } async command msp430_uctl1_t Usci.getUctl1() { return int2uctl1(UCB0CTL1); } async command void Usci.setUbr(uint16_t control) { atomic { UCB0BR0 = control & 0x00FF; UCB0BR1 = (control >> 8) & 0x00FF; } } async command uint16_t Usci.getUbr() { return (UCB0BR1 << 8) + UCB0BR0; } async command void Usci.setUstat(uint8_t control) { UCB0STAT = control; } async command uint8_t Usci.getUstat() { return UCB0STAT; } /* Operations */ async command void Usci.resetUsci(bool reset) { if (reset) SET_FLAG(UCB0CTL1, UCSWRST); else CLR_FLAG(UCB0CTL1, UCSWRST); } bool isSpi() { msp430_uctl0_t tmp; tmp = int2uctl0(UCB0CTL0); return (tmp.ucsync && tmp.ucmode != 3); } bool isI2C() { msp430_uctl0_t tmp; tmp = int2uctl0(UCB0CTL0); return (tmp.ucsync && tmp.ucmode == 3); } async command bool Usci.isSpi() { return isSpi(); } async command msp430_uscimode_t Usci.getMode() { if (isSpi()) return USCI_SPI; if (isI2C()) return USCI_I2C; return USCI_NONE; } async command void Usci.enableSpi() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } } async command void Usci.disableSpi() { atomic { call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configSpi(msp430_spi_union_config_t* config) { UCB0CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB0CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); } async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { atomic { call Usci.disableIntr(); call Usci.clrIntr(); call Usci.resetUsci(TRUE); call Usci.enableSpi(); configSpi(config); call Usci.resetUsci(FALSE); } } async command bool Usci.isTxIntrPending(){ if (IFG2 & UCB0TXIFG) return TRUE; return FALSE; } async command bool Usci.isRxIntrPending() { if (IFG2 & UCB0RXIFG) return TRUE; return FALSE; } async command void Usci.clrTxIntr(){ IFG2 &= ~UCB0TXIFG; } async command void Usci.clrRxIntr() { IFG2 &= ~UCB0RXIFG; } async command void Usci.clrIntr() { IFG2 &= ~(UCB0TXIFG | UCB0RXIFG); } async command void Usci.disableRxIntr() { IE2 &= ~UCB0RXIE; } async command void Usci.disableTxIntr() { IE2 &= ~UCB0TXIE; } async command void Usci.disableIntr() { IE2 &= ~(UCB0TXIE | UCB0RXIE); } async command void Usci.enableRxIntr() { atomic { IFG2 &= ~UCB0RXIFG; IE2 |= UCB0RXIE; } } async command void Usci.enableTxIntr() { atomic { IFG2 &= ~UCB0TXIFG; IE2 |= UCB0TXIE; } } async command void Usci.enableIntr() { atomic { IFG2 &= ~(UCB0TXIFG | UCB0RXIFG); IE2 |= (UCB0TXIE | UCB0RXIE); } } async command void Usci.tx(uint8_t data) { UCB0TXBUF = data; } async command uint8_t Usci.rx() { return UCB0RXBUF; } /* * i2c operations */ async command bool Usci.isI2C(){ return isI2C(); } async command void Usci.enableI2C() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } } async command void Usci.disableI2C() { atomic { call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configI2C(msp430_i2c_union_config_t* config) { UCB0CTL1 = (config->i2cRegisters.uctl1 | UCSWRST); UCB0CTL0 = (config->i2cRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->i2cRegisters.ubr); UCB0I2COA = config->i2cRegisters.ui2coa; UCB0I2CSA = 0; UCB0I2CIE = 0; } async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { atomic { call Usci.disableIntr(); call Usci.clrIntr(); call Usci.resetUsci(TRUE); call Usci.enableI2C(); configI2C(config); call Usci.resetUsci(FALSE); } } async command uint16_t Usci.getOwnAddress(){ return (UCB0I2COA & ~UCGCEN); } async command void Usci.setOwnAddress( uint16_t addr ){ UCB0I2COA &= UCGCEN; UCB0I2COA |= (addr & ~UCGCEN); } /* * commands subsummed into config structure. * * setMasterMode, setSlaveMode, getTransmitReceiveMode, setTransmitMode, * setReceiveMode, getStopBit, setStopBit, getStartBit, * setStartBit, * * the get commands can be replaced by .getUctl0 etc. * * similar things should be done for the other registers. It keeps things * simple and consise. */ /* set direction of the bus */ async command void Usci.setTransmitMode() { UCB0CTL1 |= UCTR; } async command void Usci.setReceiveMode() { UCB0CTL1 &= ~UCTR; } /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ async command void Usci.setTXNACK() { UCB0CTL1 |= UCTXNACK; } async command void Usci.setTXStop() { UCB0CTL1 |= UCTXSTP; } async command void Usci.setTXStart() { UCB0CTL1 |= UCTXSTT; } /* set whether to respond to GeneralCall. */ async command void Usci.clearGeneralCall() { UCB0I2COA &= ~UCGCEN; } async command void Usci.setGeneralCall() { UCB0I2COA |= UCGCEN; } /* set master/slave mode, i2c */ async command void Usci.setSlaveMode() { UCB0CTL0 |= UCMST; } async command void Usci.setMasterMode() { UCB0CTL0 &= ~UCMST; } /* get stop bit in i2c mode */ async command bool Usci.getStopBit() { return (UCB0CTL1 & UCTXSTP); } async command bool Usci.getTransmitReceiveMode() { return (UCB0CTL1 & UCTR); } /* get/set Slave Address, i2cSA */ async command uint16_t Usci.getSlaveAddress() { return UCB0I2CSA; } async command void Usci.setSlaveAddress( uint16_t addr ) { UCB0I2CSA = addr; } /* enable/disable NACK interrupt */ async command void Usci.disableNACKInt() { UCB0I2CIE &= ~UCNACKIE; } async command void Usci.enableNACKInt() { UCB0I2CIE |= UCNACKIE; } /* enable/disable stop condition interrupt */ async command void Usci.disableStopInt() { UCB0I2CIE &= ~UCSTPIE; } async command void Usci.enableStopInt() { UCB0I2CIE |= UCSTPIE; } /* enable/disable start condition interrupt */ async command void Usci.disableStartInt() { UCB0I2CIE &= ~UCSTTIE; } async command void Usci.enableStartInt() { UCB0I2CIE |= UCSTTIE; } /* enable/disable arbitration lost interrupt */ async command void Usci.disableArbLostInt() { UCB0I2CIE &= ~UCALIE; } async command void Usci.enableArbLostInt() { UCB0I2CIE |= UCALIE; } } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1C.nc000066400000000000000000000050211207233610700240520ustar00rootroot00000000000000/* * Copyright (c) 2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * An HPL abstraction of USCIB1 on the MSP430. * * @author Jonathan Hui * @author Joe Polastre * @author Xavier Orduna * @author Eric B. Decker */ #include "msp430usci.h" configuration HplMsp430UsciB1C { provides { interface HplMsp430UsciB; interface HplMsp430UsciInterrupts; } } implementation { components HplMsp430UsciB1P as HplUsciP; HplMsp430UsciB = HplUsciP; HplMsp430UsciInterrupts = HplUsciP; components HplMsp430GeneralIOC as GIO; HplUsciP.SIMO -> GIO.UCB1SIMO; HplUsciP.SOMI -> GIO.UCB1SOMI; HplUsciP.UCLK -> GIO.UCB1CLK; HplUsciP.USDA -> GIO.UCB1SDA; HplUsciP.USCL -> GIO.UCB1SCL; components HplMsp430UsciAB1RawInterruptsP as UsciRawInterrupts; HplUsciP.UsciRawInterrupts -> UsciRawInterrupts.UsciB; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciB1P.nc000066400000000000000000000242521207233610700240760ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usci.h" /* * Implementation of Usci_B1 (spi or i2c) lowlevel functionality - stateless. * Setting a mode will by default disable USCI-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui * @author: Vlado Handziski * @author: Joe Polastre * @author: Philipp Huppertz * @author: Xavier Orduna * @author: Eric B. Decker * @author: Jordi Soucheiron * * A0, A1: uart, spi, irda. * B0, B1: spi, i2c. * * This module interfaces to usciB1: spi or i2c. */ module HplMsp430UsciB1P @safe() { provides { interface HplMsp430UsciB as Usci; interface HplMsp430UsciInterrupts as Interrupts; } uses { interface HplMsp430GeneralIO as SIMO; interface HplMsp430GeneralIO as SOMI; interface HplMsp430GeneralIO as UCLK; interface HplMsp430GeneralIO as USDA; interface HplMsp430GeneralIO as USCL; interface HplMsp430UsciRawInterrupts as UsciRawInterrupts; } } implementation { MSP430REG_NORACE(UC1IE); MSP430REG_NORACE(UC1IFG); MSP430REG_NORACE(UCB1CTL0); MSP430REG_NORACE(UCB1CTL1); MSP430REG_NORACE(UCB1RXBUF); MSP430REG_NORACE(UCB1TXBUF); MSP430REG_NORACE(UCB1I2COA); MSP430REG_NORACE(UCB1I2CIE); async event void UsciRawInterrupts.rxDone(uint8_t temp) { signal Interrupts.rxDone(temp); } async event void UsciRawInterrupts.txDone() { signal Interrupts.txDone(); } /* Control registers */ async command void Usci.setUctl0(msp430_uctl0_t control) { UCB1CTL0 = uctl02int(control); } async command msp430_uctl0_t Usci.getUctl0() { return int2uctl0(UCB1CTL0); } async command void Usci.setUctl1(msp430_uctl1_t control) { UCB1CTL1 = uctl12int(control); } async command msp430_uctl1_t Usci.getUctl1() { return int2uctl1(UCB1CTL1); } async command void Usci.setUbr(uint16_t control) { atomic { UCB1BR0 = control & 0x00FF; UCB1BR1 = (control >> 8) & 0x00FF; } } async command uint16_t Usci.getUbr() { return (UCB1BR1 << 8) + UCB1BR0; } async command void Usci.setUstat(uint8_t control) { UCB1STAT = control; } async command uint8_t Usci.getUstat() { return UCB1STAT; } /* Operations */ async command void Usci.resetUsci(bool reset) { if (reset) SET_FLAG(UCB1CTL1, UCSWRST); else CLR_FLAG(UCB1CTL1, UCSWRST); } bool isSpi() { msp430_uctl0_t tmp; tmp = int2uctl0(UCB1CTL0); return (tmp.ucsync && tmp.ucmode != 3); } bool isI2C() { msp430_uctl0_t tmp; tmp = int2uctl0(UCB1CTL0); return (tmp.ucsync && tmp.ucmode == 3); } async command bool Usci.isSpi() { return isSpi(); } async command msp430_uscimode_t Usci.getMode() { if (isSpi()) return USCI_SPI; if (isI2C()) return USCI_I2C; return USCI_NONE; } async command void Usci.enableSpi() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } } async command void Usci.disableSpi() { atomic { call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configSpi(msp430_spi_union_config_t* config) { UCB1CTL1 = (config->spiRegisters.uctl1 | UCSWRST); UCB1CTL0 = (config->spiRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->spiRegisters.ubr); } async command void Usci.setModeSpi(msp430_spi_union_config_t* config) { atomic { call Usci.disableIntr(); call Usci.clrIntr(); call Usci.resetUsci(TRUE); call Usci.enableSpi(); configSpi(config); call Usci.resetUsci(FALSE); } } async command bool Usci.isTxIntrPending(){ if (UC1IFG & UCB1TXIFG) return TRUE; return FALSE; } async command bool Usci.isRxIntrPending() { if (UC1IFG & UCB1RXIFG) return TRUE; return FALSE; } async command void Usci.clrTxIntr(){ UC1IFG &= ~UCB1TXIFG; } async command void Usci.clrRxIntr() { UC1IFG &= ~UCB1RXIFG; } async command void Usci.clrIntr() { UC1IFG &= ~(UCB1TXIFG | UCB1RXIFG); } async command void Usci.disableRxIntr() { UC1IE &= ~UCB1RXIE; } async command void Usci.disableTxIntr() { UC1IE &= ~UCB1TXIE; } async command void Usci.disableIntr() { UC1IE &= ~(UCB1TXIE | UCB1RXIE); } async command void Usci.enableRxIntr() { atomic { UC1IFG &= ~UCB1RXIFG; UC1IE |= UCB1RXIE; } } async command void Usci.enableTxIntr() { atomic { UC1IFG &= ~UCB1TXIFG; UC1IE |= UCB1TXIE; } } async command void Usci.enableIntr() { atomic { UC1IFG &= ~(UCB1TXIFG | UCB1RXIFG); UC1IE |= (UCB1TXIE | UCB1RXIE); } } async command void Usci.tx(uint8_t data) { UCB1TXBUF = data; } async command uint8_t Usci.rx() { return UCB1RXBUF; } /* * i2c operations */ async command bool Usci.isI2C(){ return isI2C(); } async command void Usci.enableI2C() { atomic { #ifdef PLATFORM_Z1 /* Dirty, needs fixing */ P5OUT &= ~0x06; P5REN &= ~0x06; P5OUT |= 0x06; P5REN |= 0x06; #endif call USDA.selectModuleFunc(); call USCL.selectModuleFunc(); } } async command void Usci.disableI2C() { atomic { call USDA.selectIOFunc(); call USCL.selectIOFunc(); } } void configI2C(msp430_i2c_union_config_t* config) { UCB1CTL1 = (config->i2cRegisters.uctl1 | UCSWRST); UCB1CTL0 = (config->i2cRegisters.uctl0 | UCSYNC); call Usci.setUbr(config->i2cRegisters.ubr); UCB1I2COA = config->i2cRegisters.ui2coa; UCB1I2CSA = 0; UCB1I2CIE = 0; } async command void Usci.setModeI2C( msp430_i2c_union_config_t* config ) { atomic { call Usci.disableIntr(); call Usci.clrIntr(); call Usci.resetUsci(TRUE); call Usci.enableI2C(); configI2C(config); call Usci.resetUsci(FALSE); } } async command uint16_t Usci.getOwnAddress(){ return UCB1I2COA & ~UCGCEN; } async command void Usci.setOwnAddress( uint16_t addr ){ UCB1I2COA &= UCGCEN; UCB1I2COA |= (addr & ~UCGCEN); } /* * commands subsummed into config structure. * * setMasterMode, setSlaveMode, getTransmitReceiveMode, setTransmitMode, * setReceiveMode, getStopBit, setStopBit, getStartBit, * setStartBit, * * the get commands can be replaced by .getUctl0 etc. * * similar things should be done for the other registers. It keeps things * simple and consise. */ /* set direction of the bus */ async command void Usci.setTransmitMode() { UCB1CTL1 |= UCTR; } async command void Usci.setReceiveMode() { UCB1CTL1 &= ~UCTR; } /* transmit a NACK, Stop condition, or Start condition, automatically cleared */ async command void Usci.setTXNACK() { UCB1CTL1 |= UCTXNACK; } async command void Usci.setTXStop() { UCB1CTL1 |= UCTXSTP; } async command void Usci.setTXStart() { UCB1CTL1 |= UCTXSTT; } /* set whether to respond to GeneralCall. */ async command void Usci.clearGeneralCall() { UCB1I2COA &= ~UCGCEN; } async command void Usci.setGeneralCall() { UCB1I2COA |= UCGCEN; } /* set master/slave mode, i2c */ async command void Usci.setSlaveMode() { UCB1CTL0 |= UCMST; } async command void Usci.setMasterMode() { UCB1CTL0 &= ~UCMST; } /* get stop bit in i2c mode */ async command bool Usci.getStopBit() { return (UCB1CTL1 & UCTXSTP); } async command bool Usci.getTransmitReceiveMode() { return (UCB1CTL1 & UCTR); } /* get/set Slave Address, i2cSA */ async command uint16_t Usci.getSlaveAddress() { atomic { return UCB1I2CSA; } } async command void Usci.setSlaveAddress( uint16_t addr ) { atomic { UCB1I2CSA = addr; } } /* enable/disable NACK interrupt */ async command void Usci.disableNACKInt() { UCB1I2CIE &= ~UCNACKIE; } async command void Usci.enableNACKInt() { UCB1I2CIE |= UCNACKIE; } /* enable/disable stop condition interrupt */ async command void Usci.disableStopInt() { UCB1I2CIE &= ~UCSTPIE; } async command void Usci.enableStopInt() { UCB1I2CIE |= UCSTPIE; } /* enable/disable start condition interrupt */ async command void Usci.disableStartInt() { UCB1I2CIE &= ~UCSTTIE; } async command void Usci.enableStartInt() { UCB1I2CIE |= UCSTTIE; } /* enable/disable arbitration lost interrupt */ async command void Usci.disableArbLostInt() { UCB1I2CIE &= ~UCALIE; } async command void Usci.enableArbLostInt() { UCB1I2CIE |= UCALIE; } } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciInterrupts.nc000066400000000000000000000043231207233610700256700ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2004-2005, Technische Universität Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Byte-level interface to control a USCI. *

      The USCI can be switched to SPI, UART or I2C mode. The interface follows * the convention of being stateless, thus a higher layer has to maintain * state information. * * @author Jan Hauer (hauer@tkn.tu-berlin.de) * @author Joe Polastre */ #include "msp430usci.h" interface HplMsp430UsciInterrupts { /** * A byte of data is about to be transmitted, ie. the TXBuffer is * empty and ready to accept next byte. */ async event void txDone(); /* * A byte of data has been received. */ async event void rxDone(uint8_t data); } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/HplMsp430UsciRawInterrupts.nc000066400000000000000000000043211207233610700263400ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2004-2005, Technische Universität Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Byte-level interface to control a USART. *

      The USCI can be switched to SPI- or UART-mode. The interface follows * the convention of being stateless, thus a higher layer has to maintain * state information. * * @author Jan Hauer (hauer@tkn.tu-berlin.de) * @author Joe Polastre */ #include "msp430usci.h" interface HplMsp430UsciRawInterrupts { /* * A byte of data is about to be transmitted, ie. the TXBuffer is * empty and ready to accept next byte. */ async event void txDone(); /* * A byte of data has been received. */ async event void rxDone(uint8_t data); } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430I2C1C.nc000066400000000000000000000050041207233610700227570ustar00rootroot00000000000000/** * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ #include #include "msp430usci.h" generic configuration Msp430I2C1C() { provides interface Resource; provides interface ResourceRequested; provides interface I2CPacket as I2CBasicAddr; uses interface Msp430I2CConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_I2C1_BUS ), }; components Msp430I2C1P as I2CP; Resource = I2CP.Resource[ CLIENT_ID ]; I2CBasicAddr = I2CP.I2CBasicAddr; Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ]; components new Msp430UsciB1C() as UsciC; ResourceRequested = UsciC; I2CP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; I2CP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; I2CP.Interrupts -> UsciC.HplMsp430UsciInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430I2C1P.nc000066400000000000000000000047321207233610700230030ustar00rootroot00000000000000/** * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDERS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ */ configuration Msp430I2C1P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[uint8_t id ]; provides interface I2CPacket as I2CBasicAddr; uses interface Resource as UsciResource[ uint8_t id ]; uses interface Msp430I2CConfigure[ uint8_t id ]; uses interface HplMsp430UsciInterrupts as Interrupts; } implementation { components new Msp430I2CP() as I2CP; Resource = I2CP.Resource; ResourceConfigure = I2CP.ResourceConfigure; Msp430I2CConfigure = I2CP.Msp430I2CConfigure; I2CBasicAddr = I2CP.I2CBasicAddr; UsciResource = I2CP.UsciResource; Interrupts = I2CP.Interrupts; components HplMsp430UsciB1C as UsciC; I2CP.UsciB -> UsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430I2CConfigure.nc000066400000000000000000000036401207233610700244410ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface used by Msp430I2C clients to reconfigure the I2C before use * @author Vlado Handziski * @author Xavier Orduna */ #include "msp430usci.h" interface Msp430I2CConfigure { async command msp430_i2c_union_config_t* getConfig(); } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430I2CP.nc000066400000000000000000000163601207233610700227220ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui * @author Xavier Orduña * @author Jordi Soucheiron * @author Eric B. Decker */ #include generic module Msp430I2CP() { provides { interface Resource[ uint8_t id ]; interface ResourceConfigure[ uint8_t id ]; interface I2CPacket as I2CBasicAddr; } uses { interface Resource as UsciResource[ uint8_t id ]; interface Msp430I2CConfigure[ uint8_t id ]; interface HplMsp430UsciB as UsciB; interface HplMsp430UsciInterrupts as Interrupts; } } implementation { enum { /* Due to different versions of msp430-gcc toolchain this value has * been incremented (200 in v.3.2.3, 800 in v.4.5.3), it is currently * functional but this has to be addressed */ TIMEOUT = 1200, }; norace uint8_t* m_buf; norace uint8_t m_len; norace uint8_t m_pos; norace i2c_flags_t m_flags; void nextRead(); void nextWrite(); void signalDone( error_t error ); async command error_t Resource.immediateRequest[ uint8_t id ]() { return call UsciResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call UsciResource.request[ id ](); } async command uint8_t Resource.isOwner[ uint8_t id ]() { return call UsciResource.isOwner[ id ](); } async command error_t Resource.release[ uint8_t id ]() { return call UsciResource.release[ id ](); } async command void ResourceConfigure.configure[ uint8_t id ]() { call UsciB.setModeI2C(call Msp430I2CConfigure.getConfig[id]()); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call UsciB.disableI2C(); } event void UsciResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() {return FAIL;} default event void Resource.granted[ uint8_t id ]() {} default async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() { return (msp430_i2c_union_config_t *) &msp430_i2c_default_config; } async command error_t I2CBasicAddr.read( i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { uint16_t i = 0; m_buf = buf; m_len = len; m_flags = flags; m_pos = 0; call UsciB.setReceiveMode(); call UsciB.setSlaveAddress(addr); call UsciB.enableRxIntr(); if ( flags & I2C_START ) { while(call UsciB.getStopBit()){ if(i>=TIMEOUT) { return EBUSY; } i++; } call UsciB.setTXStart(); } else { nextRead(); } return SUCCESS; } async command error_t I2CBasicAddr.write( i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) { uint16_t i = 0; m_buf = buf; m_len = len; m_flags = flags; m_pos = 0; while((call UsciB.getUstat()) & UCBBUSY) { if(i>=TIMEOUT) { return FAIL; } i++; } call UsciB.setTransmitMode(); call UsciB.setSlaveAddress(addr); call UsciB.enableTxIntr(); if ( flags & I2C_START ) { while(call UsciB.getStopBit()){ if(i>=TIMEOUT) { return EBUSY; } i++; } i=0; while((call UsciB.getUstat()) & UCBBUSY) { if(i>=TIMEOUT) { return FAIL; } i++; } call UsciB.setTXStart(); } else { nextWrite(); } return SUCCESS; } void nextRead() { uint16_t i=0; #ifdef USCI_X2XXX_DELAY for(i=0xffff;i!=0;i--) asm("nop"); //software delay (aprox 25msec on z1) #endif if ( m_pos == m_len ) { if ( m_flags & I2C_STOP ) { call UsciB.setTXStop(); while(!call UsciB.getStopBit()){ if(i>=TIMEOUT) { signalDone( EBUSY ); return; } i++; } signalDone( SUCCESS ); } else { signalDone( SUCCESS ); } } else { m_buf[ m_pos++ ] = call UsciB.rx(); } } void nextWrite() { uint16_t i = 0; #ifdef USCI_X2XXX_DELAY for(i=0xffff;i!=0;i--) asm("nop"); //software delay (aprox 25msec on z1) #endif if ( ( m_pos == m_len) && ( m_flags & I2C_STOP ) ) { call UsciB.setTXStop(); while(call UsciB.getStopBit()){ if(i>=TIMEOUT) { signalDone( EBUSY ); return; } i++; } signalDone( SUCCESS ); } else { if((call UsciB.getUstat()) == ( UCBBUSY | UCNACKIFG | UCSCLLOW)) { signal I2CBasicAddr.writeDone( FAIL, call UsciB.getSlaveAddress(), m_len, m_buf ); return; } call UsciB.tx( m_buf[ m_pos++ ] ); } } async event void Interrupts.txDone(){ call UsciB.clrTxIntr(); if (call UsciB.getTransmitReceiveMode()) nextWrite(); else nextRead(); } async event void Interrupts.rxDone(uint8_t data){ call UsciB.clrRxIntr(); if (call UsciB.getTransmitReceiveMode()) nextWrite(); else nextRead(); } void signalDone(error_t error) { call UsciB.clrIntr(); call UsciB.disableIntr(); if (call UsciB.getTransmitReceiveMode()) signal I2CBasicAddr.writeDone(error, call UsciB.getSlaveAddress(), m_len, m_buf); else signal I2CBasicAddr.readDone(error, call UsciB.getSlaveAddress(), m_len, m_buf); } default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430SpiB0C.nc000066400000000000000000000054461207233610700232500ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * SpiB0: SPI/USCI_B0. Defaults to no DMA, sw SPI implementation. * To utilize the DMA, via Msp430SpiB0DmaP define ENABLE_SPIB0_DMA. * * @author Jonathan Hui * @author Mark Hays * @author Xavier Orduna * @author Eric B. Decker */ #include "msp430usci.h" generic configuration Msp430SpiB0C() { provides { interface Resource; interface ResourceRequested; interface SpiByte; interface SpiPacket; } uses interface Msp430SpiConfigure; } implementation { enum { CLIENT_ID = unique(MSP430_SPI0_BUS), }; #ifdef ENABLE_SPIB0_DMA #warning "Enabling SPI DMA on USCIB0" components Msp430SpiDmaB0P as SpiP; #else components Msp430SpiNoDmaB0P as SpiP; #endif Resource = SpiP.Resource[CLIENT_ID]; SpiByte = SpiP.SpiByte; SpiPacket = SpiP.SpiPacket[CLIENT_ID]; Msp430SpiConfigure = SpiP.Msp430SpiConfigure[CLIENT_ID]; components new Msp430UsciB0C() as UsciC; ResourceRequested = UsciC; SpiP.ResourceConfigure[CLIENT_ID] <- UsciC.ResourceConfigure; SpiP.UsciResource[CLIENT_ID] -> UsciC.Resource; SpiP.UsciInterrupts -> UsciC.HplMsp430UsciInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430SpiConfigure.nc000066400000000000000000000036401207233610700246170ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface used by Msp430Spi clients to reconfigure the SPI before use * @author Vlado Handziski * @author Xavier Orduna */ #include "msp430usci.h" interface Msp430SpiConfigure { async command msp430_spi_union_config_t* getConfig(); } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaB0P.nc000066400000000000000000000056061207233610700237050ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Mark Hays * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2007/11/08 21:34:42 $ */ configuration Msp430SpiDmaB0P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface SpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Resource as UsciResource[ uint8_t id ]; uses interface Msp430SpiConfigure[ uint8_t id ]; uses interface HplMsp430UsciInterrupts as UsciInterrupts; } implementation { #include "Msp430Dma.h" components new Msp430SpiDmaBP(IFG2_, UCB0TXBUF_, UCB0TXIFG, (uint16_t) DMA_TRIGGER_UCB0TXIFG, UCB0RXBUF_, UCB0RXIFG, (uint16_t) DMA_TRIGGER_UCB0RXIFG) as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; SpiByte = SpiP.SpiByte; SpiPacket = SpiP.SpiPacket; UsciResource = SpiP.UsciResource; UsciInterrupts = SpiP.UsciInterrupts; components HplMsp430UsciB0C as UsciC; SpiP.Usci -> UsciC; components Msp430DmaC as DmaC; SpiP.DmaChannel1 -> DmaC.Channel1; SpiP.DmaChannel2 -> DmaC.Channel2; components LedsC as Leds; SpiP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430SpiDmaBP.nc000066400000000000000000000143071207233610700236230ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Mark Hays * @author Roman Lim * @author Xavier Orduna * @version $Revision: 1.6 $ $Date: 2008/02/28 17:28:12 $ */ generic module Msp430SpiDmaBP( uint16_t IFG_addr, uint16_t TXBUF_addr, uint8_t TXIFG, uint16_t TXTRIG, uint16_t RXBUF_addr, uint8_t RXIFG, uint16_t RXTRIG ) { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface SpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Msp430DmaChannel as DmaChannel1; uses interface Msp430DmaChannel as DmaChannel2; uses interface Resource as UsciResource[ uint8_t id ]; uses interface Msp430SpiConfigure[uint8_t id ]; uses interface HplMsp430UsciB as Usci; uses interface HplMsp430UsciInterrupts as UsciInterrupts; uses interface Leds; } implementation { #define IFG (*(volatile uint8_t*)IFG_addr) uint8_t* m_tx_buf; uint8_t* m_rx_buf; uint16_t m_len; uint8_t m_client; uint8_t m_dump; void signalDone( error_t error ); task void signalDone_task(); async command error_t Resource.immediateRequest[ uint8_t id ]() { return call UsciResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call UsciResource.request[ id ](); } async command error_t Resource.release[ uint8_t id ]() { return call UsciResource.release[ id ](); } async command void ResourceConfigure.configure[ uint8_t id ]() { call Usci.setModeSpi(call Msp430SpiConfigure.getConfig[id]()); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usci.resetUsci(TRUE); call Usci.disableSpi(); call Usci.resetUsci(FALSE); } event void UsciResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } async command uint8_t Resource.isOwner[ uint8_t id ]() { return call UsciResource.isOwner[ id ](); } default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return &msp430_spi_default_config; } default event void Resource.granted[ uint8_t id ]() {} async command uint8_t SpiByte.write( uint8_t tx ) { call Usci.tx( tx ); while( !call Usci.isRxIntrPending() ); call Usci.clrRxIntr(); return call Usci.rx(); } async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len ) { atomic { m_client = id; m_tx_buf = tx_buf; m_rx_buf = rx_buf; m_len = len; } if ( len ) { // clear the interrupt flags IFG &= ~( TXIFG | RXIFG ); // set up the RX xfer call DmaChannel1.setupTransfer(DMA_SINGLE_TRANSFER, RXTRIG, DMA_EDGE_SENSITIVE, (void *) RXBUF_addr, rx_buf ? rx_buf : &m_dump, len, DMA_BYTE, DMA_BYTE, DMA_ADDRESS_UNCHANGED, rx_buf ? DMA_ADDRESS_INCREMENTED : DMA_ADDRESS_UNCHANGED); // this doesn't start a transfer; it simply enables the channel call DmaChannel1.startTransfer(); // set up the TX xfer call DmaChannel2.setupTransfer(DMA_SINGLE_TRANSFER, TXTRIG, DMA_EDGE_SENSITIVE, tx_buf, (void *) TXBUF_addr, len, DMA_BYTE, DMA_BYTE, DMA_ADDRESS_INCREMENTED, DMA_ADDRESS_UNCHANGED); // this doesn't start a transfer; it simply enables the channel call DmaChannel2.startTransfer(); // pong the tx flag to get things rolling IFG |= TXIFG; } else { post signalDone_task(); } return SUCCESS; } task void signalDone_task() { atomic signalDone( SUCCESS ); } async event void DmaChannel1.transferDone( error_t error ) { signalDone( error ); } async event void DmaChannel2.transferDone( error_t error ) {} void signalDone( error_t error ) { signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, error ); } async event void UsciInterrupts.txDone() {} async event void UsciInterrupts.rxDone( uint8_t data ) {} default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaB0P.nc000066400000000000000000000050751207233610700242020ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ */ configuration Msp430SpiNoDmaB0P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[uint8_t id ]; provides interface SpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Resource as UsciResource[ uint8_t id ]; uses interface Msp430SpiConfigure[ uint8_t id ]; uses interface HplMsp430UsciInterrupts as UsciInterrupts; } implementation { components new Msp430SpiNoDmaBP() as SpiP; Resource = SpiP.Resource; ResourceConfigure = SpiP.ResourceConfigure; Msp430SpiConfigure = SpiP.Msp430SpiConfigure; SpiByte = SpiP.SpiByte; SpiPacket = SpiP.SpiPacket; UsciResource = SpiP.UsciResource; UsciInterrupts = SpiP.UsciInterrupts; components HplMsp430UsciB0C as UsciC; SpiP.Usci -> UsciC; components LedsC as Leds; SpiP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430SpiNoDmaBP.nc000066400000000000000000000134131207233610700241150ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Jan Hauer (bugfix in continueOp()) * @author Xavier Orduna * @version $Revision: 1.6 $ $Date: 2008/06/16 07:31:21 $ */ generic module Msp430SpiNoDmaBP() { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface SpiByte; provides interface SpiPacket[ uint8_t id ]; uses interface Resource as UsciResource[ uint8_t id ]; uses interface Msp430SpiConfigure[ uint8_t id ]; uses interface HplMsp430UsciB as Usci; uses interface HplMsp430UsciInterrupts as UsciInterrupts; uses interface Leds; } implementation { enum { SPI_ATOMIC_SIZE = 2, }; norace uint16_t m_len; norace uint8_t* COUNT_NOK(m_len) m_tx_buf; norace uint8_t* COUNT_NOK(m_len) m_rx_buf; norace uint16_t m_pos; norace uint8_t m_client; void signalDone(); task void signalDone_task(); async command error_t Resource.immediateRequest[ uint8_t id ]() { return call UsciResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call UsciResource.request[ id ](); } async command uint8_t Resource.isOwner[ uint8_t id ]() { return call UsciResource.isOwner[ id ](); } async command error_t Resource.release[ uint8_t id ]() { return call UsciResource.release[ id ](); } async command void ResourceConfigure.configure[ uint8_t id ]() { call Usci.setModeSpi(call Msp430SpiConfigure.getConfig[id]()); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usci.resetUsci(TRUE); call Usci.disableSpi(); call Usci.resetUsci(FALSE); } event void UsciResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } async command uint8_t SpiByte.write( uint8_t tx ) { uint8_t byte; // we are in spi mode which is configured to have turned off interrupts //call Usart.disableRxIntr(); call Usci.tx( tx ); while( !call Usci.isRxIntrPending() ); call Usci.clrRxIntr(); byte = call Usci.rx(); //call Usart.enableRxIntr(); return byte; } default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() { return (msp430_spi_union_config_t*) &msp430_spi_default_config; } default event void Resource.granted[ uint8_t id ]() {} void continueOp() { uint8_t end; uint8_t tmp; atomic { call Usci.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); end = m_pos + SPI_ATOMIC_SIZE; if ( end > m_len ) end = m_len; while ( ++m_pos < end ) { while( !call Usci.isRxIntrPending() ); tmp = call Usci.rx(); if ( m_rx_buf ) m_rx_buf[ m_pos - 1 ] = tmp; call Usci.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 ); } } } async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len ) { m_client = id; m_tx_buf = tx_buf; m_rx_buf = rx_buf; m_len = len; m_pos = 0; if ( len ) { call Usci.enableRxIntr(); continueOp(); } else { post signalDone_task(); } return SUCCESS; } task void signalDone_task() { atomic signalDone(); } async event void UsciInterrupts.rxDone( uint8_t data ) { if ( m_rx_buf ) m_rx_buf[ m_pos-1 ] = data; if ( m_pos < m_len ) continueOp(); else { call Usci.disableRxIntr(); signalDone(); } } void signalDone() { signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, SUCCESS ); } async event void UsciInterrupts.txDone() {} default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430Uart0C.nc000066400000000000000000000053341207233610700233220ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An implementation of the UART on USCIA0 for the MSP430. * @author Vlado Handziski * @author Jonathan Hui * @author Eric B. Decker * @author Xavier Orduna * @version $Revision: 1.6 $ $Date: 2008/05/21 22:11:57 $ */ #include "msp430usci.h" generic configuration Msp430Uart0C() { provides interface Resource; provides interface ResourceRequested; provides interface UartStream; provides interface UartByte; uses interface Msp430UartConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_UART0_BUS ), }; components Msp430Uart0P as UartP; Resource = UartP.Resource[ CLIENT_ID ]; UartStream = UartP.UartStream[ CLIENT_ID ]; UartByte = UartP.UartByte[ CLIENT_ID ]; Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; components new Msp430UsciA0C() as UsciC; ResourceRequested = UsciC; UartP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; UartP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; UartP.UsciInterrupts[ CLIENT_ID ] -> UsciC.HplMsp430UsciInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430Uart0P.nc000066400000000000000000000054161207233610700233400ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Vlado Handziski * @author Eric B. Decker * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ configuration Msp430Uart0P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface UartStream[ uint8_t id ]; provides interface UartByte[ uint8_t id ]; uses interface Resource as UsciResource[ uint8_t id ]; uses interface Msp430UartConfigure[ uint8_t id ]; uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; } implementation { components new Msp430UartP() as UartP; Resource = UartP.Resource; ResourceConfigure = UartP.ResourceConfigure; Msp430UartConfigure = UartP.Msp430UartConfigure; UartStream = UartP.UartStream; UartByte = UartP.UartByte; UsciResource = UartP.UsciResource; UsciInterrupts = UartP.UsciInterrupts; components HplMsp430UsciA0C as UsciC; UartP.Usci -> UsciC; components Counter32khz16C as CounterC; UartP.Counter -> CounterC; components LedsC as Leds; UartP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430Uart1C.nc000066400000000000000000000053341207233610700233230ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An implementation of the UART on USCIA1 for the MSP430. * @author Vlado Handziski * @author Jonathan Hui * @author Eric B. Decker * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ #include "msp430usci.h" generic configuration Msp430Uart1C() { provides interface Resource; provides interface ResourceRequested; provides interface UartStream; provides interface UartByte; uses interface Msp430UartConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_UART1_BUS ), }; components Msp430Uart1P as UartP; Resource = UartP.Resource[ CLIENT_ID ]; UartStream = UartP.UartStream[ CLIENT_ID ]; UartByte = UartP.UartByte[ CLIENT_ID ]; Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ]; components new Msp430UsciA1C() as UsciC; ResourceRequested = UsciC; UartP.ResourceConfigure[ CLIENT_ID ] <- UsciC.ResourceConfigure; UartP.UsciResource[ CLIENT_ID ] -> UsciC.Resource; UartP.UsciInterrupts[ CLIENT_ID ] -> UsciC.HplMsp430UsciInterrupts; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430Uart1P.nc000066400000000000000000000054261207233610700233420ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Vlado Handziski * @author Eric B. Decker * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ configuration Msp430Uart1P { provides interface Resource[ uint8_t id ]; provides interface ResourceConfigure[ uint8_t id ]; provides interface UartStream[ uint8_t id ]; provides interface UartByte[ uint8_t id ]; uses interface Resource as UsciResource[ uint8_t id ]; uses interface Msp430UartConfigure[ uint8_t id ]; uses interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; } implementation { components new Msp430UartP() as UartP; Resource = UartP.Resource; ResourceConfigure = UartP.ResourceConfigure; Msp430UartConfigure = UartP.Msp430UartConfigure; UartStream = UartP.UartStream; UartByte = UartP.UartByte; UsciResource = UartP.UsciResource; UsciInterrupts = UartP.UsciInterrupts; components HplMsp430UsciA1C as UsciC; UartP.Usci -> UsciC; components Counter32khz16C as CounterC; UartP.Counter -> CounterC; components LedsC as Leds; UartP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UartConfigure.nc000066400000000000000000000036411207233610700250000ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Interface used by Msp430Uart clients to reconfigure the UART before use * * @author Vlado Handziski * @author Xavier Orduna */ #include "msp430usci.h" interface Msp430UartConfigure { async command msp430_uart_union_config_t* getConfig(); } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UartP.nc000066400000000000000000000164451207233610700232640ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Jonathan Hui * @author Vlado Handziski * @author Eric B. Decker * @author Xavier Orduna */ #include generic module Msp430UartP() { provides { interface Resource[ uint8_t id ]; interface ResourceConfigure[ uint8_t id ]; interface UartStream[ uint8_t id ]; interface UartByte[ uint8_t id ]; } uses { interface Resource as UsciResource[ uint8_t id ]; interface Msp430UartConfigure[ uint8_t id ]; interface HplMsp430UsciA as Usci; interface HplMsp430UsciInterrupts as UsciInterrupts[ uint8_t id ]; interface Counter; interface Leds; } } implementation { norace uint16_t m_tx_len, m_rx_len; norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf; norace uint16_t m_tx_pos, m_rx_pos; norace uint8_t m_byte_time; norace uint8_t current_owner; async command error_t Resource.immediateRequest[ uint8_t id ]() { return call UsciResource.immediateRequest[ id ](); } async command error_t Resource.request[ uint8_t id ]() { return call UsciResource.request[ id ](); } async command uint8_t Resource.isOwner[ uint8_t id ]() { return call UsciResource.isOwner[ id ](); } async command error_t Resource.release[ uint8_t id ]() { if (call UsciResource.isOwner[id]() == FALSE) return FAIL; if ( m_rx_buf || m_tx_buf ) return EBUSY; return call UsciResource.release[ id ](); } async command void ResourceConfigure.configure[ uint8_t id ]() { msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id](); m_byte_time = config->uartConfig.ubr / 2; //pot donar problemes call Usci.setModeUart(config); call Usci.enableIntr(); } async command void ResourceConfigure.unconfigure[ uint8_t id ]() { call Usci.resetUsci(TRUE); call Usci.disableIntr(); call Usci.disableUart(); } event void UsciResource.granted[ uint8_t id ]() { signal Resource.granted[ id ](); } async command error_t UartStream.enableReceiveInterrupt[ uint8_t id ]() { if (call UsciResource.isOwner[id]() == FALSE) return FAIL; call Usci.enableRxIntr(); return SUCCESS; } async command error_t UartStream.disableReceiveInterrupt[ uint8_t id ]() { if (call UsciResource.isOwner[id]() == FALSE) return FAIL; call Usci.disableRxIntr(); return SUCCESS; } async command error_t UartStream.receive[ uint8_t id ]( uint8_t* buf, uint16_t len ) { if (call UsciResource.isOwner[id]() == FALSE) return FAIL; if ( len == 0 ) return FAIL; atomic { if ( m_rx_buf ) return EBUSY; m_rx_buf = buf; m_rx_len = len; m_rx_pos = 0; } return SUCCESS; } async event void UsciInterrupts.rxDone[uint8_t id]( uint8_t data ) { //call Usci.clrRxIntr(); if ( m_rx_buf ) { m_rx_buf[ m_rx_pos++ ] = data; if ( m_rx_pos >= m_rx_len ) { uint8_t* buf = m_rx_buf; m_rx_buf = NULL; signal UartStream.receiveDone[id]( buf, m_rx_len, SUCCESS ); } } else { signal UartStream.receivedByte[id]( data ); } } async command error_t UartStream.send[ uint8_t id ]( uint8_t* buf, uint16_t len ) { if (call UsciResource.isOwner[id]() == FALSE) return FAIL; if ( len == 0 ) return FAIL; else if ( m_tx_buf ) return EBUSY; m_tx_buf = buf; m_tx_len = len; m_tx_pos = 0; current_owner = id; call Usci.tx( buf[ m_tx_pos++ ] ); return SUCCESS; } async event void UsciInterrupts.txDone[uint8_t id]() { call Usci.clrTxIntr(); if(current_owner != id) { uint8_t* buf = m_tx_buf; m_tx_buf = NULL; signal UartStream.sendDone[id]( buf, m_tx_len, FAIL ); } else if ( m_tx_pos < m_tx_len ) { call Usci.tx( m_tx_buf[ m_tx_pos++ ] ); } else { uint8_t* buf = m_tx_buf; m_tx_buf = NULL; signal UartStream.sendDone[id]( buf, m_tx_len, SUCCESS ); } } async command error_t UartByte.send[ uint8_t id ]( uint8_t data ) { if (call UsciResource.isOwner[id]() == FALSE) return FAIL; call Usci.clrTxIntr(); call Usci.disableTxIntr (); call Usci.tx( data ); while( !call Usci.isTxIntrPending() ); call Usci.clrTxIntr(); call Usci.enableTxIntr(); return SUCCESS; } async command error_t UartByte.receive[ uint8_t id ]( uint8_t* byte, uint8_t timeout ) { uint16_t timeout_micro = m_byte_time * timeout + 1; uint16_t start; if (call UsciResource.isOwner[id]() == FALSE) return FAIL; start = call Counter.get(); while( !call Usci.isRxIntrPending() ) { if ( ( call Counter.get() - start ) >= timeout_micro ) return FAIL; } *byte = call Usci.rx(); return SUCCESS; } async event void Counter.overflow() {} default async command error_t UsciResource.isOwner[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.request[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.immediateRequest[ uint8_t id ]() { return FAIL; } default async command error_t UsciResource.release[ uint8_t id ]() { return FAIL; } default async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() { return (msp430_uart_union_config_t *) &msp430_uart_default_config; } default event void Resource.granted[ uint8_t id ]() {} default async event void UartStream.sendDone[ uint8_t id ](uint8_t* buf, uint16_t len, error_t error) {} default async event void UartStream.receivedByte[ uint8_t id ](uint8_t byte) {} default async event void UartStream.receiveDone[ uint8_t id ]( uint8_t* buf, uint16_t len, error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciA0C.nc000066400000000000000000000051031207233610700234050ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Provides an interface for USART0 on the MSP430. * * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ generic configuration Msp430UsciA0C() { provides interface Resource; provides interface ResourceRequested; provides interface ArbiterInfo; provides interface HplMsp430UsciA; provides interface HplMsp430UsciInterrupts; uses interface ResourceConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_HPLUSCIA0_RESOURCE ), }; components Msp430UsciShareA0P as UsciShareP; Resource = UsciShareP.Resource[ CLIENT_ID ]; ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; ArbiterInfo = UsciShareP.ArbiterInfo; HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; components HplMsp430UsciA0C as HplUsciC; HplMsp430UsciA = HplUsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciA1C.nc000066400000000000000000000051031207233610700234060ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Provides an interface for USART0 on the MSP430. * * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ generic configuration Msp430UsciA1C() { provides interface Resource; provides interface ResourceRequested; provides interface ArbiterInfo; provides interface HplMsp430UsciA; provides interface HplMsp430UsciInterrupts; uses interface ResourceConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_HPLUSCIA1_RESOURCE ), }; components Msp430UsciShareA1P as UsciShareP; Resource = UsciShareP.Resource[ CLIENT_ID ]; ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; ArbiterInfo = UsciShareP.ArbiterInfo; HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; components HplMsp430UsciA1C as HplUsciC; HplMsp430UsciA = HplUsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciB0C.nc000066400000000000000000000051031207233610700234060ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Provides an interface for USART0 on the MSP430. * * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ generic configuration Msp430UsciB0C() { provides interface Resource; provides interface ResourceRequested; provides interface ArbiterInfo; provides interface HplMsp430UsciB; provides interface HplMsp430UsciInterrupts; uses interface ResourceConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_HPLUSCIB0_RESOURCE ), }; components Msp430UsciShareB0P as UsciShareP; Resource = UsciShareP.Resource[ CLIENT_ID ]; ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; ArbiterInfo = UsciShareP.ArbiterInfo; HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; components HplMsp430UsciB0C as HplUsciC; HplMsp430UsciB = HplUsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciB1C.nc000066400000000000000000000047511207233610700234170ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Provides an interface for USART0 on the MSP430. * * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ generic configuration Msp430UsciB1C() { provides interface Resource; provides interface ResourceRequested; provides interface ArbiterInfo; provides interface HplMsp430UsciB; provides interface HplMsp430UsciInterrupts; uses interface ResourceConfigure; } implementation { enum { CLIENT_ID = unique( MSP430_HPLUSCIB1_RESOURCE ), }; components Msp430UsciShareB1P as UsciShareP; Resource = UsciShareP.Resource[ CLIENT_ID ]; ResourceRequested = UsciShareP.ResourceRequested[ CLIENT_ID ]; ResourceConfigure = UsciShareP.ResourceConfigure[ CLIENT_ID ]; ArbiterInfo = UsciShareP.ArbiterInfo; HplMsp430UsciInterrupts = UsciShareP.Interrupts[ CLIENT_ID ]; components HplMsp430UsciB1C as HplUsciC; HplMsp430UsciB = HplUsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciShareA0P.nc000066400000000000000000000047201207233610700244110ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ configuration Msp430UsciShareA0P { provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; provides interface Resource[ uint8_t id ]; provides interface ResourceRequested[ uint8_t id ]; provides interface ArbiterInfo; uses interface ResourceConfigure[ uint8_t id ]; } implementation { components new Msp430UsciShareP() as UsciShareP; Interrupts = UsciShareP; components new FcfsArbiterC( MSP430_HPLUSCIA0_RESOURCE ) as ArbiterC; Resource = ArbiterC; ResourceRequested = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; UsciShareP.ArbiterInfo -> ArbiterC; components HplMsp430UsciA0C as HplUsciC; UsciShareP.RawInterrupts -> HplUsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciShareA1P.nc000066400000000000000000000046471207233610700244220ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ configuration Msp430UsciShareA1P { provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; provides interface Resource[ uint8_t id ]; provides interface ResourceRequested[ uint8_t id ]; provides interface ArbiterInfo; uses interface ResourceConfigure[ uint8_t id ]; } implementation { components new Msp430UsciShareP() as UsciShareP; Interrupts = UsciShareP; components new FcfsArbiterC( MSP430_HPLUSCIA1_RESOURCE ) as ArbiterC; Resource = ArbiterC; ResourceRequested = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; UsciShareP.ArbiterInfo -> ArbiterC; components HplMsp430UsciA1C as HplUsciC; UsciShareP.RawInterrupts -> HplUsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciShareB0P.nc000066400000000000000000000047201207233610700244120ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ configuration Msp430UsciShareB0P { provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; provides interface Resource[ uint8_t id ]; provides interface ResourceRequested[ uint8_t id ]; provides interface ArbiterInfo; uses interface ResourceConfigure[ uint8_t id ]; } implementation { components new Msp430UsciShareP() as UsciShareP; Interrupts = UsciShareP; components new FcfsArbiterC( MSP430_HPLUSCIB0_RESOURCE ) as ArbiterC; Resource = ArbiterC; ResourceRequested = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; UsciShareP.ArbiterInfo -> ArbiterC; components HplMsp430UsciB0C as HplUsciC; UsciShareP.RawInterrupts -> HplUsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciShareB1P.nc000066400000000000000000000047201207233610700244130ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.5 $ $Date: 2008/05/21 22:11:57 $ */ configuration Msp430UsciShareB1P { provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; provides interface Resource[ uint8_t id ]; provides interface ResourceRequested[ uint8_t id ]; provides interface ArbiterInfo; uses interface ResourceConfigure[ uint8_t id ]; } implementation { components new Msp430UsciShareP() as UsciShareP; Interrupts = UsciShareP; components new FcfsArbiterC( MSP430_HPLUSCIB1_RESOURCE ) as ArbiterC; Resource = ArbiterC; ResourceRequested = ArbiterC; ResourceConfigure = ArbiterC; ArbiterInfo = ArbiterC; UsciShareP.ArbiterInfo -> ArbiterC; components HplMsp430UsciB1C as HplUsciC; UsciShareP.RawInterrupts -> HplUsciC; } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/Msp430UsciShareP.nc000066400000000000000000000047111207233610700242300ustar00rootroot00000000000000/** * Copyright (c) 2009-2010 DEXMA SENSORS SL * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author Xavier Orduna * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $ */ generic module Msp430UsciShareP() @safe() { provides interface HplMsp430UsciInterrupts as Interrupts[ uint8_t id ]; uses interface HplMsp430UsciInterrupts as RawInterrupts; uses interface ArbiterInfo; } implementation { async event void RawInterrupts.txDone() { if ( call ArbiterInfo.inUse() ) signal Interrupts.txDone[ call ArbiterInfo.userId() ](); } async event void RawInterrupts.rxDone( uint8_t data ) { if ( call ArbiterInfo.inUse() ) signal Interrupts.rxDone[ call ArbiterInfo.userId() ]( data ); } default async event void Interrupts.txDone[ uint8_t id ]() {} default async event void Interrupts.rxDone[ uint8_t id ]( uint8_t data ) {} } tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/PrintfUART.h000066400000000000000000000312061207233610700230770ustar00rootroot00000000000000/** * Copyright (c) 2009 DEXMA SENSORS SL * Copyright (c) 2008 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Writes printf like output to the UART. * This works only on the AVR and MSP430 Microcontrollers! *

      * Note: For AVR we explicitly place the print statements in ROM; for * MSP430 this is done by default! For AVR, if we don't place it * explicitely in ROM, the statements will go in RAM, which will * quickly cause a descent size program to run out of RAM. By default * it doesn't disable the interupts; disabling the interupts when * writing to the UART, slows down/makes the mote quite unresponsive, * and can lead to problems! If you wish to disable all printfs to * the UART, then comment the flag: PRINTFUART_ENABLED. * 

       * How to use:
 *   // (0) In your Makefile, define PRINTFUART_ENABLED
 *   CFLAGS += -DPRINTFUART_ENABLED
 *   // (1) Call printfUART_init() from your initialization function 
 *   //     to initialize the UART
 *   printfUART_init();
 *   // (2) Set your UART client to the correct baud rate.  Look at 
 *   //     the comments in printfUART_init(), to figure out what 
 *   //     baud to use for your particular mote
 *
 *   // (3) Send printf statements like this:
 *   printfUART("Hello World, we are in year= %u\n", 2004);
 *   printfUART("Printing uint32_t variable, value= %lu\n", 4294967295);
 *
 * Examples and caveats:
 *   // (1) - Must use curly braces in single section statements.  
 *            (Look in the app.c to see why -- hint: it's a macro)
 *   if (x < 3)
 *       {printfUART("The value of x is %i\n", x);}
 *   // (2) - Otherwise it more or less works like regular printf
 *   printfUART("\nThe value of x=%u, and y=%u\n", x, y); 
 *
      * 
      URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack
      * @author Konrad Lorincz * @author Xavier Orduña * @author Jordi Soucheiron */ #ifndef PRINTFZ1_H #define PRINTFZ1_H #ifndef PRINTFUART_H #define PRINTFUART_H #include #include #warning including printfZ1 // ------------------------------------------------------------------- #ifdef PRINTFUART_ENABLED #define DEBUGBUF_SIZE 256 char debugbuf[DEBUGBUF_SIZE]; char debugbufROMtoRAM[DEBUGBUF_SIZE]; #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) #define printfUART(__format...) { \ static const char strROM[] PROGMEM = __format; \ strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM); \ sprintf(debugbuf, debugbufROMtoRAM); \ writedebug(); \ } #else // assume MSP430 architecture (e.g. TelosA, TelosB, etc.) #define printfUART(__format...) { \ sprintf(debugbuf, __format); \ writedebug(); \ } #define printfz1(__format...) { \ snprintf(debugbuf,DEBUGBUF_SIZE, __format); \ writedebug(); \ } #endif #else #define printfz1(X, args...) dbg("printf", X, ## args) #define printfUART(X, args...) dbg("printf", X, ## args) // #define printfUART(__format...) {} void printfz1_init() {} void printfUART_init() {} #endif #define NOprintfUART(__format...) // ------------------------------------------------------------------- #ifdef PRINTFUART_ENABLED /** * Initialize the UART port. Call this from your startup routine. */ #define printfz1_init() {atomic printfUART_init_private();} #define printfUART_init() {atomic printfUART_init_private();} void printfUART_init_private() { #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) // 56K baud outp(0,UBRR0H); outp(15, UBRR0L); //set baud rate outp((1< = STDRXD = ALT2(in) GPIO<47> = STDTXD = ALT1(out) *********/ //atomic{ //configure the GPIO Alt functions and directions _GPIO_setaltfn(46,2); // STD_RXD _GPIO_setaltfn(47,1); // STD_TXD _GPDR(46) &= ~_GPIO_bit(46); // input _GPDR(47) |= _GPIO_bit(47); // output STLCR |=LCR_DLAB; //turn on DLAB so we can change the divisor STDLL = 8; //configure to 115200; STDLH = 0; STLCR &= ~(LCR_DLAB); //turn off DLAB STLCR |= 0x3; //configure to 8 bits STMCR &= ~MCR_LOOP; STMCR |= MCR_OUT2; STIER |= IER_RAVIE; STIER |= IER_TIE; STIER |= IER_UUE; //enable the UART //STMCR |= MCR_AFE; //Auto flow control enabled; //STMCR |= MCR_RTS; STFCR |= FCR_TRFIFOE; //enable the fifos // call Interrupt.allocate(); // call Interrupt.enable(); //configure all the interrupt stuff //make sure that the interrupt causes an IRQ not an FIQ // __REG(0x40D00008) &= ~(1<<21); //configure the priority as IPR1 //__REG(0x40D00020) = (1<<31 | 21); //unmask the interrupt //__REG(0x40D00004) |= (1<<21); CKEN |= CKEN5_STUART; //enable the UART's clk #else #if defined(PLATFORM_Z1) P3SEL |= 0x30; // P3.4,5 = USCI_A1 TXD/RXD UCA0CTL1 |= UCSSEL_2; // CLK = ACLK UCA0BR0 = 0x45; // 32kHz/9600 = 3.41 UCA0BR1 = 0x00; // UCA0MCTL = UCBRS1 + UCBRS0; // Modulation UCBRSx = 3 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** #else // assume TelosA, TelosB, etc. // Variabel baud // To change the baud rate, see /tos/platform/msp430/msp430baudrates.h uint8_t source = SSEL_SMCLK; uint16_t baudrate = 0x0012; // UBR_SMCLK_57600=0x0012 uint8_t mctl = 0x84; // UMCTL_SMCLK_57600=0x84 //uint16_t baudrate = 0x0009; // UBR_SMCLK_115200=0x0009 //uint8_t mctl = 0x10; // UMCTL_SMCLK_115200=0x10 uint16_t l_br = 0; uint8_t l_mctl = 0; uint8_t l_ssel = 0; TOSH_SEL_UTXD1_MODFUNC(); TOSH_SEL_URXD1_MODFUNC(); UCTL1 = SWRST; UCTL1 |= CHAR; // 8-bit char, UART-mode U1RCTL &= ~URXEIE; // even erroneous characters trigger interrupts UCTL1 = SWRST; UCTL1 |= CHAR; // 8-bit char, UART-mode if (l_ssel & 0x80) { U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); U1TCTL |= (l_ssel & 0x7F); } else { U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz } if ((l_mctl != 0) || (l_br != 0)) { U1BR0 = l_br & 0x0FF; U1BR1 = (l_br >> 8) & 0x0FF; U1MCTL = l_mctl; } else { U1BR0 = 0x03; // 9600 baud U1BR1 = 0x00; U1MCTL = 0x4A; } ME2 &= ~USPIE1; // USART1 SPI module disable ME2 |= (UTXE1 | URXE1); // USART1 UART module enable U1CTL &= ~SWRST; IFG2 &= ~(UTXIFG1 | URXIFG1); IE2 &= ~(UTXIE1 | URXIE1); // interrupt disabled //async command void USARTControl.setClockSource(uint8_t source) { // atomic { l_ssel = source | 0x80; U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3); U1TCTL |= (l_ssel & 0x7F); // } //} //async command void USARTControl.setClockRate(uint16_t baudrate, uint8_t mctl) { //atomic { l_br = baudrate; l_mctl = mctl; U1BR0 = baudrate & 0x0FF; U1BR1 = (baudrate >> 8) & 0x0FF; U1MCTL = mctl; //} //} //async command result_t USARTControl.enableRxIntr(){ //atomic { IFG2 &= ~URXIFG1; IE2 |= URXIE1; //} //return SUCCESS; //} //async command result_t USARTControl.enableTxIntr(){ //atomic { IFG2 &= ~UTXIFG1; IE2 |= UTXIE1; //} //return SUCCESS; //} #endif #endif #endif #endif } #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) #else #if defined(PLATFORM_IMOTE2) #else #if defined(PLATFORM_Z1) #else // assume AVR architecture (e.g. TelosA, TelosB) bool isTxIntrPending() { if (U1TCTL & TXEPT) { return TRUE; } return FALSE; } #endif #endif #endif /** * Outputs a char to the UART. */ void UARTPutChar(char c) { if (c == '\n') UARTPutChar('\r'); #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) loop_until_bit_is_set(UCSR0A, UDRE); outb(UDR0,c); #else #if defined(PLATFORM_IMOTE2) STTHR = c; #else #if defined(PLATFORM_Z1) while (!(IFG2&UCA0TXIFG)); atomic UCA0TXBUF = c; #else // assume AVR architecture (e.g. TelosA, TelosB) U1TXBUF = c; while( !isTxIntrPending() ) continue; #endif #endif #endif } /** * Outputs the entire debugbuf to the UART, or until it encounters '\0'. */ void writedebug() { uint16_t i = 0; while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE) UARTPutChar(debugbuf[i++]); } #endif // PRINTFUART_ENABLED // ------------------------------------------------------------------- #if 0 // -------------------------------------------------------------- #define assertUART(x) if (!(x)) { __assertUART(__FILE__, __LINE__); } void __assertUART(const char* file, int line) { printfUART("ASSERT FAILED: file= %s, lineNbr= %i\n", file, line); // for some reason, CLR means on TOSH_MAKE_RED_LED_OUTPUT(); TOSH_MAKE_YELLOW_LED_OUTPUT(); TOSH_MAKE_GREEN_LED_OUTPUT(); TOSH_CLR_RED_LED_PIN(); TOSH_CLR_YELLOW_LED_PIN(); TOSH_CLR_GREEN_LED_PIN(); exit(1); } // -------------------------------------------------------------- #endif #endif // PRINTFUART_H #endif // PRINTFZ1_H tinyos-2.1.2+dfsg/tos/chips/msp430/x2xxx/usci/msp430usci.h000066400000000000000000000325401207233610700230550ustar00rootroot00000000000000/* * Copyright (c) 2010-2011 Eric B. Decker * Copyright (c) 2009-2010 DEXMA SENSORS SL * All rights reserved. * * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Vlado Handziski * @author Philipp Huppertz * @author Xavier Orduna * @author Eric B. Decker * @author Jordi Soucheiron * * Support the x2 version of the USCI for the TI MSPx2xx (see TI MSP430x2xx * Users guide slau144e). */ #ifndef _H_MSP430USCI_H #define _H_MSP430USCI_H /* * The MSP430X architecture at least the msp430f2618 family * has a total of four ports that can be used independently * usciA0, A1 (uart, spi) and usciB0, B1 (i2c, spi only). * * We set the resources up so multiple use of a given port * can be arbritrated. * * UART0 -> usciA0 SPI2 -> usciA0 * UART1 -> usciA1 SPI3 -> usciA1 * SPI0 -> usciB0 I2C0 * SPI1 -> usciB1 I2C1 * * spi2,3 are mapped to usciA0,A1 because the typical * configuration is to use dual uarts and dual spis * so the less used configuration maps as 2 and 3. */ //USCI A0, A1: UART, SPI #define MSP430_HPLUSCIA0_RESOURCE "Msp430UsciA0.Resource" #define MSP430_HPLUSCIA1_RESOURCE "Msp430UsciA1.Resource" #define MSP430_UART0_BUS MSP430_HPLUSCIA0_RESOURCE #define MSP430_UART1_BUS MSP430_HPLUSCIA1_RESOURCE #define MSP430_SPI2_BUS MSP430_HPLUSCIA0_RESOURCE #define MSP430_SPI3_BUS MSP430_HPLUSCIA1_RESOURCE //USCI B0, B1: SPI, I2C #define MSP430_HPLUSCIB0_RESOURCE "Msp430UsciB0.Resource" #define MSP430_HPLUSCIB1_RESOURCE "Msp430UsciB1.Resource" #define MSP430_SPI0_BUS MSP430_HPLUSCIB0_RESOURCE #define MSP430_SPI1_BUS MSP430_HPLUSCIB1_RESOURCE #define MSP430_I2C0_BUS MSP430_HPLUSCIB0_RESOURCE #define MSP430_I2C1_BUS MSP430_HPLUSCIB1_RESOURCE typedef enum { USCI_NONE = 0, USCI_UART = 1, USCI_SPI = 2, USCI_I2C = 3 } msp430_uscimode_t; /************************************************************************************************************ * * UART mode definitions * */ /* * UCAxCTL0, UART control 0, uart mode */ typedef struct { unsigned int ucsync : 1; // Synchronous mode enable (0=Asynchronous; 1:Synchronous) unsigned int ucmode : 2; // USCI Mode (00=UART Mode; 01=Idle-Line; 10=Addres-Bit; 11=UART Mode, auto baud rate detection) unsigned int ucspb : 1; // Stop bit select. Number of stop bits (0=One stop bit; 1=Two stop bits) unsigned int uc7bit : 1; // Charactaer lenght, (0=8-bit data; 1=7-bit data) unsigned int ucmsb : 1; // endian. Direction of the rx and tx shift (0=LSB first, 1=MSB first) unsigned int ucpar : 1; // Parity Select (0=odd parity; 1=Even parity) unsigned int ucpen : 1; // Parity enable (0=Parity disable; 1=Parity enabled) } __attribute__ ((packed)) msp430_uctl0_t ; /* * UCAxCTL1, UART control 1, uart mode */ typedef struct { unsigned int ucswrst : 1; //Software reset enable (0=disabled; 1=enabled) unsigned int uctxbrk : 1; //Transmit break. (0 = no brk; 1 = tx break next frame unsigned int uctxaddr : 1; //Transmit address. (0=next frame transmitted is data; 1=next frame transmitted is an address) unsigned int ucdorm : 1; //Dormant. (0 = not dormant; 1 = Dormant, only some chars will set UCAxRXIFG) unsigned int ucbrkie : 1; //rx break interrupt -enable, 1 = enabled unsigned int ucrxeie : 1; //rx error interrupt-enable unsigned int ucssel : 2; //USCI clock source select: (00=UCKL; 01=ACLK; 10=SMCLK; 11=SMCLK } __attribute__ ((packed)) msp430_uctl1_t ; //converts from typedefstructs to uint8_t DEFINE_UNION_CAST(uctl02int,uint8_t,msp430_uctl0_t) DEFINE_UNION_CAST(int2uctl0,msp430_uctl0_t,uint8_t) DEFINE_UNION_CAST(uctl12int,uint8_t,msp430_uctl1_t) DEFINE_UNION_CAST(int2uctl1,msp430_uctl1_t,uint8_t) /* * The usci/uart baud rate mechanism is significantly different * than the msp430 usart uart. See section 15.3.9 of the TI * MSP430x2xx Family User's Guide, slau144e for details. * * For 32768Hz and 1048576Hz, we use UCOS16=0. * For higher cpu dco speeds we use oversampling, UCOS16=1. */ typedef enum { UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x04, UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x0c, UBR_32KHZ_4800=0x0006, UMCTL_32KHZ_4800=0x0e, UBR_32KHZ_9600=0x0003, UMCTL_32KHZ_9600=0x06, UBR_1048MHZ_9600=0x006D, UMCTL_1048MHZ_9600=0x04, UBR_1048MHZ_19200=0x0036, UMCTL_1048MHZ_19200=0x0a, UBR_1048MHZ_38400=0x001B, UMCTL_1048MHZ_38400=0x04, UBR_1048MHZ_57600=0x0012, UMCTL_1048MHZ_57600=0x0c, UBR_1048MHZ_115200=0x0009, UMCTL_1048MHZ_115200=0x02, UBR_1048MHZ_128000=0x0008, UMCTL_1048MHZ_128000=0x02, UBR_1048MHZ_256000=0x0004, UMCTL_1048MHZ_230400=0x02, /* 1MHz = 1000000 Hz, 4MHz 4000000, 8MHz 8000000 * 16MHz 16000000. use UCOS16 for oversampling, * use both UCBRF and UCBRS. * * Settings for 1MHz, 8Mhz, and 16MHz are taken from * a table on page 15-22 of slau144e. */ UBR_1MHZ_9600=0x6, UMCTL_1MHZ_9600=0x81, UBR_1MHZ_19200=0x3, UMCTL_1MHZ_19200=0x41, UBR_1MHZ_57600=0x1, UMCTL_1MHZ_57600=0x0F, UBR_8MHZ_4800=0x68, UMCTL_8MHZ_4800=0x31, UBR_8MHZ_9600=0x34, UMCTL_8MHZ_9600=0x11, UBR_8MHZ_19200=0x1A, UMCTL_8MHZ_19200=0x11, UBR_8MHZ_38400=0x0D, UMCTL_8MHZ_38400=0x01, UBR_8MHZ_57600=0x08, UMCTL_8MHZ_57600=0xB1, UBR_8MHZ_115200=0x04, UMCTL_8MHZ_115200=0x3B, UBR_8MHZ_230400=0x02, UMCTL_8MHZ_230400=0x27, UBR_16MHZ_4800=0xD0, UMCTL_16MHZ_4800=0x51, UBR_16MHZ_9600=0x68, UMCTL_16MHZ_9600=0x31, UBR_16MHZ_19200=0x34, UMCTL_16MHZ_19200=0x11, UBR_16MHZ_38400=0x1A, UMCTL_16MHZ_38400=0x11, UBR_16MHZ_57600=0x11, UMCTL_16MHZ_57600=0x61, UBR_16MHZ_115200=0x8, UMCTL_16MHZ_115200=0xB1, UBR_16MHZ_230400=0x4, UMCTL_16MHZ_230400=0x3B, } msp430_uart_rate_t; typedef struct { unsigned int ubr: 16; // Baud rate (use enum msp430_uart_rate_t for predefined rates) unsigned int umctl: 8; // Modulation (use enum msp430_uart_rate_t for predefined rates) /* start of ctl0 */ unsigned int : 1; // ucsync, should be 0 for uart unsigned int ucmode: 2; // mode: 00 - uart, 01 - Idle, 10 - addr bit, 11 - auto baud. unsigned int ucspb: 1; // stop: 0 - one, 1 - two unsigned int uc7bit: 1; // 7 or 8 bit unsigned int : 1; // msb or lsb first, 0 says lsb, uart should be 0 unsigned int ucpar: 1; // par, 0 odd, 1 even unsigned int ucpen: 1; // par enable, 0 disabled /* start of ctl1 */ unsigned int : 5; // not specified, defaults to 0. unsigned int ucrxeie: 1; // rx err int enable unsigned int ucssel: 2; // clock select, 00 uclk, 01 aclk, 10/11 smclk /* ume, not a control register, backward compatible with usart? * should be okay to nuke. Is this actually used? */ unsigned int utxe:1; // 1:enable tx module unsigned int urxe:1; // 1:enable rx module } msp430_uart_config_t; typedef struct { uint16_t ubr; uint8_t umctl; uint8_t uctl0; uint8_t uctl1; uint8_t ume; } msp430_uart_registers_t; typedef union { msp430_uart_config_t uartConfig; msp430_uart_registers_t uartRegisters; } msp430_uart_union_config_t; const msp430_uart_union_config_t msp430_uart_default_config = { { ubr : UBR_8MHZ_115200, umctl : UMCTL_8MHZ_115200, ucmode : 0, // uart ucspb : 0, // one stop uc7bit : 0, // 8 bit ucpar : 0, // odd parity (but no parity) ucpen : 0, // parity disabled ucrxeie : 0, // err int off ucssel : 2, // smclk utxe : 1, // enable tx urxe : 1, // enable rx } }; /************************************************************************************************************ * * SPI mode definitions * */ typedef struct { unsigned int ubr : 16; // Clock division factor (> = 1) /* ctl0 */ unsigned int : 1; // ucsync, forced to 1 by initilization code. unsigned int ucmode : 2; // 00 3pin spi, 01 4pin ste ah, 10 ste al, 11 i2c unsigned int ucmst : 1; // 0 slave, 1 master unsigned int uc7bit : 1; // 0 8 bit, 1 7 bit. unsigned int ucmsb : 1; // 0 lsb first, 1 msb first unsigned int ucckpl : 1; // 0 inactive low, 1 inactive high unsigned int ucckph : 1; // 0 tx rising uclk, captured falling // 1 captured rising, sent falling edge. /* ctl1 */ unsigned int : 1; // ucswrst, forced to 1 on init unsigned int : 5; // unused. unsigned int ucssel : 2; // BRCLK src, 00 NA, 01 ACLK, 10/11 SMCLK } msp430_spi_config_t; typedef struct { uint16_t ubr; uint8_t uctl0; uint8_t uctl1; } msp430_spi_registers_t; typedef union { msp430_spi_config_t spiConfig; msp430_spi_registers_t spiRegisters; } msp430_spi_union_config_t; const msp430_spi_union_config_t msp430_spi_default_config = { { ubr : 2, /* smclk/2 */ ucmode : 0, /* 3 pin, no ste */ ucmst : 1, /* master */ uc7bit : 0, /* 8 bit */ ucmsb : 1, /* msb first, compatible with msp430 usart */ ucckpl : 0, /* inactive state low */ ucckph : 1, /* data captured on rising, changed falling */ ucssel : 2, /* smclk */ } }; /************************************************************************************************************ * * I2C mode definitions * */ typedef struct { unsigned int : 1; // Sync mode enable, 1 = sync, must be 1 for i2c unsigned int ucmode : 2; // 11 for i2c unsigned int ucmst : 1; // 0 slave, 1 master unsigned int : 1; // unused unsigned int ucmm : 1; // multi master mode unsigned int ucsla10 : 1; // slave addr 7 or 10 bit unsigned int uca10 : 1; // own addr 7 or 10 bit } __attribute__ ((packed)) msp430_i2cctl0_t ; DEFINE_UNION_CAST(i2cctl02int,uint8_t,msp430_i2cctl0_t) DEFINE_UNION_CAST(int2i2cctl0,msp430_i2cctl0_t,uint8_t) typedef struct { unsigned int ucswrst : 1; // Software reset (1 = reset) unsigned int uctxstt : 1; // Transmit start in master. unsigned int uctxstp : 1; // Transmit stop in master. unsigned int uctxnack : 1; // transmit nack unsigned int uctr : 1; // 0 rx, 1 tx unsigned int : 1; // unused unsigned int ucssel : 2; // USCI clock source: (00 UCLKI; 01 ACLK; 10/11 SMCLK } __attribute__ ((packed)) msp430_i2cctl1_t ; typedef struct { uint16_t ubr : 16; /* baud rate divisor */ /* ctl0 */ uint8_t : 1; /* ucsync, forced to 1 by init code */ uint8_t ucmode : 2; /* mode, must be 3 for i2c */ uint8_t ucmst : 1; /* master if 1 */ uint8_t : 1; /* unused */ uint8_t ucmm : 1; /* mult-master mode */ uint8_t ucsla10 : 1; /* slave addr 10 bits vs. 7 */ uint8_t uca10 : 1; /* own addressing mode 10 bits vs. 7 */ /* ctl1 */ uint8_t : 1; /* software reset */ uint8_t : 1; /* gen tx start */ uint8_t : 1; /* gen tx stop */ uint8_t : 1; /* gen nack */ uint8_t uctr : 1; /* tx/rx mode, 1 = tx */ uint8_t : 1; /* unused */ uint8_t ucssel : 2; /* clock src, 00 uclk, 01 aclk, 10/11 smclk */ /* own addr */ uint16_t i2coa : 10; /* own address */ uint8_t : 5; /* unused */ uint8_t ucgcen : 1; /* general call response enable */ } msp430_i2c_config_t; typedef struct { uint16_t ubr; /* 16 bit baud rate */ uint8_t uctl0; /* control word 0 */ uint8_t uctl1; /* control word 1 */ uint16_t ui2coa; /* own address, ucgcen */ } msp430_i2c_registers_t; typedef union { msp430_i2c_config_t i2cConfig; msp430_i2c_registers_t i2cRegisters; } msp430_i2c_union_config_t; const msp430_i2c_union_config_t msp430_i2c_default_config = { { ubr : 2, /* smclk/2 */ ucmode : 3, /* i2c mode */ ucmst : 1, /* master */ ucmm : 0, /* single master */ ucsla10 : 1, /* 10 bit slave */ uca10 : 1, /* 10 bit us */ uctr : 1, /* tx mode to start */ ucssel : 2, /* smclk */ i2coa : 1, /* our address is 1 */ ucgcen : 1, /* respond to general call */ } }; #endif /* _H_MSP430USCI_H */ tinyos-2.1.2+dfsg/tos/chips/pxa27x/000077500000000000000000000000001207233610700170255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/HplPXA27xInterrupt.nc000066400000000000000000000055401207233610700227250ustar00rootroot00000000000000// $Id: HplPXA27xInterrupt.nc,v 1.6 2008-06-11 00:46:23 razvanm Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /** * This interface supports the core peripheral interrupts of the PXA27X * processor. * It is usually parameterized based on the Peripheral ID (PPID) of the * interrupt signal. * ARM interrupt levels (IRQ/FIQ) are established by wiring. * Priorities are established by a static table (TOSH_IRP_TABLE) * * Components implementing this interface are expected to provide reentrant * (i.e. atomic) semantics. * * @author: Philip Buonadonna */ interface HplPXA27xInterrupt { /** * Allocates a given peripheral interrupt with the PXA27X interrupt manager. * Specifically, it establishes the interrupt level (IRQ or FIQ) and the * priority. */ async command error_t allocate(); /** * Enables a periperhal interrupt. */ async command void enable(); /** * Disables a peripheral interrupt. */ async command void disable(); /** * The peripheral interrupt event. */ async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/HplPXA27xInterruptCntl.nc000066400000000000000000000043051207233610700235440ustar00rootroot00000000000000// $Id: HplPXA27xInterruptCntl.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This interface provides access to the ICCR functionality of * the PXA27x interrupt controller. * * Refer to the PXA27x Developers Guide for more information. * * @author: Philip Buonadonna */ interface HplPXA27xInterruptCntl { /** * Sets the ICCR DIM bit of the PXA27x interrupt controller * * @param flag TRUE to set the DIM bit, FALSE to clear * */ async command void setICCR_DIM(bool flag); /** * Gets the value of the ICCR DIM bit. * * @return value TRUE if set, FALSE if clear. */ async command bool getICCR_DIM(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/HplPXA27xInterruptM.nc000066400000000000000000000135511207233610700230430ustar00rootroot00000000000000// $Id: HplPXA27xInterruptM.nc,v 1.6 2008-06-11 00:46:23 razvanm Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Phil Buonadonna * * Edits: Josh Herbach * Revised: 09/02/2005 */ module HplPXA27xInterruptM { provides { interface HplPXA27xInterrupt as PXA27xIrq[uint8_t id]; interface HplPXA27xInterruptCntl; } } implementation { uint32_t getICHP() { uint32_t val; asm volatile ("mrc p6,0,%0,c5,c0,0\n\t":"=r" (val)); return val; } /* Core PXA27X interrupt dispatch vectors */ /* DO NOT change the name of these functions */ void hplarmv_irq() __attribute__ ((interrupt ("IRQ"))) @C() @atomic_hwevent() { uint32_t IRQPending; IRQPending = getICHP(); // Determine which interrupt to service IRQPending >>= 16; // Right justify to the IRQ portion while (IRQPending & (1 << 15)) { uint8_t PeripheralID = (IRQPending & 0x3f); // Get rid of the Valid bit signal PXA27xIrq.fired[PeripheralID](); // Handler is responsible for clearing interrupt IRQPending = getICHP(); // Determine which interrupt to service IRQPending >>= 16; // Right justify to the IRQ portion } return; } void hplarmv_fiq() __attribute__ ((interrupt ("FIQ"))) @C() @atomic_hwevent() { } static uint8_t usedPriorities = 0; /* Helper functions */ /* NOTE: Read-back of all register writes is necessary to ensure the data latches */ error_t allocate(uint8_t id, bool level, uint8_t priority) { uint32_t tmp; error_t error = FAIL; atomic{ uint8_t i; if(usedPriorities == 0){//assumed that the table will have some entries uint8_t PriorityTable[40], DuplicateTable[40]; for(i = 0; i < 40; i++){ DuplicateTable[i] = PriorityTable[i] = 0xFF; } for(i = 0; i < 40; i++) if(TOSH_IRP_TABLE[i] != 0xff){ if(PriorityTable[TOSH_IRP_TABLE[i]] != 0xFF)/*duplicate priorities in the table, mark for later fixing*/ DuplicateTable[i] = PriorityTable[TOSH_IRP_TABLE[i]]; else PriorityTable[TOSH_IRP_TABLE[i]] = i; } //compress table for(i = 0; i < 40; i++){ if(PriorityTable[i] != 0xff){ PriorityTable[usedPriorities] = PriorityTable[i]; if(i != usedPriorities) PriorityTable[i] = 0xFF; usedPriorities++; } } for(i = 0; i < 40; i++) if(DuplicateTable[i] != 0xFF){ uint8_t j, ExtraTable[40]; for(j = 0; DuplicateTable[i] != PriorityTable[j]; j++); memcpy(ExtraTable + j + 1, PriorityTable + j, usedPriorities - j); memcpy(PriorityTable + j + 1, ExtraTable + j + 1, usedPriorities - j); PriorityTable[j] = i; usedPriorities++; } for(i = 0; i < usedPriorities; i++){ IPR(i) = (IPR_VALID | PriorityTable[i]); tmp = IPR(i); } } if (id < 34){ if(priority == 0xff){ priority = usedPriorities; usedPriorities++; IPR(priority) = (IPR_VALID | (id)); tmp = IPR(priority); } if (level) { _ICLR(id) |= _PPID_Bit(id); tmp = _ICLR(id); } error = SUCCESS; } } return error; } void enable(uint8_t id) { uint32_t tmp; atomic { if (id < 34) { _ICMR(id) |= _PPID_Bit(id); tmp = _ICMR(id); } } return; } void disable(uint8_t id) { uint32_t tmp; atomic { if (id < 34) { _ICMR(id) &= ~(_PPID_Bit(id)); tmp = _ICMR(id); } } return; } /* Interface implementation */ async command error_t PXA27xIrq.allocate[uint8_t id]() { return allocate(id, FALSE, TOSH_IRP_TABLE[id]); } async command void PXA27xIrq.enable[uint8_t id]() { enable(id); return; } async command void PXA27xIrq.disable[uint8_t id]() { disable(id); return; } async command void HplPXA27xInterruptCntl.setICCR_DIM(bool flag) { if (flag) { ICCR |= ICCR_DIM; } else { ICCR = 0; } return; } async command bool HplPXA27xInterruptCntl.getICCR_DIM() { bool result = FALSE; if (ICCR & ICCR_DIM) { result = TRUE; } return result; } default async event void PXA27xIrq.fired[uint8_t id]() { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/McuSleepC.nc000066400000000000000000000045771207233610700212040ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Implementation of TEP 112 (Microcontroller Power Management) for * the Intel Xscale PXA27x * * 
       *  $Id: McuSleepC.nc,v 1.5 2008-07-23 17:25:42 idgay Exp $
 *
      * * @author Philip Buonadonna * */ module McuSleepC { provides { interface McuSleep; interface McuPowerState; } uses { interface McuPowerOverride; } } implementation { async command void McuSleep.sleep() { // Put idle into here. asm volatile ( "mcr p14,0,%0,c7,c0,0" : : "r" (PWRMODE_M_IDLE) ); __nesc_enable_interrupt(); // All of memory may change at this point... asm volatile ("" : : : "memory"); __nesc_disable_interrupt(); return; } async command void McuPowerState.update() { return; } default async command mcu_power_t McuPowerOverride.lowestState() { return 0; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/arm_defs.h000066400000000000000000000050721207233610700207620ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Philip Buonadonna * * */ #ifndef _ARM_DEFS_H #define _ARM_DEFS_H #define ARM_CPSR_MODE_MASK (0x0000001F) #define ARM_CPSR_INT_MASK (0x000000C0) #define ARM_CPSR_COND_MASK (0xF8000000) #define ARM_CPSR_MODE_USR (0x10) #define ARM_CPSR_MODE_FIQ (0x11) #define ARM_CPSR_MODE_IRQ (0x12) #define ARM_CPSR_MODE_SVC (0x13) #define ARM_CPSR_MODE_ABT (0x17) #define ARM_CPSR_MODE_UND (0x1B) #define ARM_CPSR_MODE_SYS (0x1F) #define ARM_CPSR_BIT_N (1 << 31) #define ARM_CPSR_BIT_Z (1 << 30) #define ARM_CPSR_BIT_C (1 << 29) #define ARM_CPSR_BIT_V (1 << 28) #define ARM_CPSR_BIT_Q (1 << 27) #define ARM_CPSR_BIT_I (1 << 7) #define ARM_CPSR_BIT_F (1 << 6) #define ARM_CPRS_BIT_T (1 << 5) #endif /*_ARM_DEFS_H */ tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/000077500000000000000000000000001207233610700175665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/HplPXA27XQuickCaptInt.nc000066400000000000000000000056131207233610700237720ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2005 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Description - PXA27X Quick Capture Interface. * * @author Konrad Lorincz * @version 1.0, August 10, 2005 */ /** * Modified and ported to tinyos-2.x. * * @author Brano Kusy * @version October 25, 2007 */ interface HplPXA27XQuickCaptInt { command error_t init(uint8_t color); command void enable(); command error_t setImageSize(uint16_t sizeX, uint16_t sizeY, uint8_t colorType); command void initDMA(uint32_t num_bytes, void *buf); async command void disableQuick(); async command void startDMA(); // Events/Interrupts command void enableStartOfFrame(); command void disableStartOfFrame(); /*new*/ async event void startOfFrame(); command void enableEndOfFrame(); async event void endOfFrame(); command void enableEndOfLine(); async event void endOfLine(); command void enableRecvDataAvailable(); async event void recvDataAvailable(uint8_t channel); command void enableFIFOOverrun(); async event void fifoOverrun(uint8_t channel); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/HplPXA27XQuickCaptIntC.nc000066400000000000000000000054741207233610700241020ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2005 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring for the PXA27X Quick Capture Interface. * * @author Konrad Lorincz * @version 1.0 - September 10, 2005 */ /** * Modified and ported to tinyos-2.x. * * @author Brano Kusy (branislav.kusy@gmail.com) * @version October 25, 2007 */ #include "PXA27XQuickCaptInt.h" configuration HplPXA27XQuickCaptIntC { provides interface HplPXA27XQuickCaptInt; } implementation { components HplPXA27XQuickCaptIntM; HplPXA27XQuickCaptInt = HplPXA27XQuickCaptIntM; components HplPXA27xInterruptM; HplPXA27XQuickCaptIntM.PPID_CIF_Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_CIF]; components HplPXA27xDMAC; HplPXA27XQuickCaptIntM.pxa_dma -> HplPXA27xDMAC.HplPXA27xDMAChnl[CIF_CHAN]; components dmaArrayC; HplPXA27XQuickCaptIntM.dmaArray -> dmaArrayC; components GeneralIOC; HplPXA27XQuickCaptIntM.LED_PIN -> GeneralIOC.GeneralIO[106]; //A40-29 components LedsC; HplPXA27XQuickCaptIntM.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/HplPXA27XQuickCaptIntM.nc000066400000000000000000000305251207233610700241070ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2005 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring for the PXA27X Quick Capture Interface. * * @author Konrad Lorincz * @version 1.0 - September 10, 2005 */ /** * Modified and ported to tinyos-2.x. * * @author Brano Kusy (branislav.kusy@gmail.com) * @version October 25, 2007 */ #include "PXA27XQuickCaptInt.h" #include "DMA.h" #include "dmaArray.h" module HplPXA27XQuickCaptIntM { provides interface HplPXA27XQuickCaptInt; uses interface HplPXA27xInterrupt as PPID_CIF_Irq; uses interface Leds; uses interface GeneralIO as LED_PIN; uses interface dmaArray; uses interface HplPXA27xDMAChnl as pxa_dma; } implementation { DescArray descArray; void CIF_configurePins(); void CIF_init(uint8_t color){ CIF_configurePins(); //atomic enabledInterrupts = 0; CKEN |= CKEN24_CIF; // enable the CIF clock call PPID_CIF_Irq.allocate(); // generate an CIF interrupt call PPID_CIF_Irq.enable(); // enable the CIF interrupt mask // ------------------------------------------------------ // (1) - Disable the CIF interface call HplPXA27XQuickCaptInt.disableQuick(); // (2) - Set the timing/clocks // a. Have the mote supply the MCLK to the camera sensor CICR4 = CICR4_DIV(CICR4, 1); // Set the MCLK clock rate to 15 MHz CICR4 |= CICR4_MCLK_EN; //was: CICR4 = CICR4_DIV(CICR4, 2); // Set the MCLK clock rate to 15 MHz // b. Have the camera suply the PCLK to the mote CICR4 |= CICR4_PCLK_EN; // c. Set the synchronization signals to be active low //was: CICR4 |= CICR4_HSP; // HREF is active-low? //was: CICR4 |= CICR4_VSP; // VSYNC is active-low // it seems we use active VSP and HSP // (3) - Set the data format (nbr pixels, color space, encoding, etc.) //was: CICR1 = CICR1_DW(CICR1, 4); // Data Width: 10 bits wide data from the sensor //was: CICR1 = CICR1_COLOR_SP(CICR1, 0); // Color Space: Raw //was: CICR1 = CICR1_RAW_BPP(CICR1, 2); // Raw bits per pixel: 10 //was: CICR3 = CICR3_LPF(CICR3, (1024-1)); // lines per frame (rows): 1024 //was: CICR1 = CICR1_PPL(CICR1, (1280-1)); // pixels per line (cols): 1280 CICR1 = CICR1_DW(CICR1, 2); // Data Width: 8 bits wide data from the sensor CICR1 = CICR1_RGB_BPP(CICR1, 2); // RGB bits per pixel: 16 CICR1 = CICR1_RAW_BPP(CICR1, 0); // RAW bits per pixel: 8 CICR3 = CICR3_LPF(CICR3, (240-1)); // lines per frame (height): 240 if (color == COLOR_RGB565) { CICR1 = CICR1_PPL(CICR1, (320-1)); // pixels per line (width): 320 CICR1 = CICR1_COLOR_SP(CICR1, 1); // Color Space: RGB } else { CICR1 = CICR1_PPL(CICR1, (2*320-1)); // pixels per line (width): 320 CICR1 = CICR1_COLOR_SP(CICR1, 0); // Color Space: RAW (default) } // (4) - FIFO DMA threshold level CIFR = CIFR_THL_0(CIFR, 0); // 96 bytes of more in FIFO 0 causea a DMA request // (5) - Initialize the DMA //CIF_InitDMA(); // (6) - Enable the CIF with DMA //was: CIF_setAndEnableCICR0(CICR0 | CICR0_DMA_EN); //new: all CICR0 bits should be set with a single command CICR0 = ((CICR0 | CICR0_DMA_EN) & ~(CICR0_SOFM)) & ~(CICR0_EOFM); } void CIF_setAndEnableCICR0(uint32_t data) { call HplPXA27XQuickCaptInt.disableQuick(); CICR0 = (data | CICR0_EN); } command error_t HplPXA27XQuickCaptInt.init(uint8_t color) { CIF_init(color); return SUCCESS; } command void HplPXA27XQuickCaptInt.enable() { uint32_t tempCICR0 = CICR0; tempCICR0 |= CICR0_EN; tempCICR0 &= ~(CICR0_DIS); //new CICR0 = tempCICR0; } async command void HplPXA27XQuickCaptInt.disableQuick() { CICR0 &= ~(CICR0_EN); CISR |= CISR_CQD; } async command void HplPXA27XQuickCaptInt.startDMA() { atomic{ uint32_t dcsr = call pxa_dma.getDCSR(); call pxa_dma.setMap(DMAREQ_CIF_RECV_0); call pxa_dma.setDALGNbit(1); dcsr &= ~(DCSR_RUN); dcsr &= ~(DCSR_NODESCFETCH); call pxa_dma.setDCSR(dcsr); call pxa_dma.setDDADR((uint32_t)call dmaArray.array_get(&descArray, 0) ); call pxa_dma.setDCSR((call pxa_dma.getDCSR()) | DCSR_RUN ); } } command error_t HplPXA27XQuickCaptInt.setImageSize(uint16_t sizeX, uint16_t sizeY, uint8_t colorType) { if (sizeX > 2048 || sizeY > 2048) return FAIL; // (1) - Set the Quick Capture Interface Size //was: call HplPXA27XQuickCaptInt.disableQuick(); CICR3 = CICR3_LPF(CICR3, (sizeY-1)); //was: CICR1 = CICR1_PPL(CICR1, (sizeX-1)); if (colorType == COLOR_RGB565) CICR1 = CICR1_PPL(CICR1, (sizeX-1)); else CICR1 = CICR1_PPL(CICR1, (2*sizeX-1)); //was: call HplPXA27XQuickCaptInt.enable(); // (2) - Set the DMA transfer size //was: nbrBytesToTransfer = sizeX*sizeY*2; // each pixel is 2 bytes return SUCCESS; } command void HplPXA27XQuickCaptInt.initDMA(uint32_t num_bytes, void *buf) //CIF_InitDMA() { call dmaArray.init(&descArray, num_bytes, CIBR0_ADDR, buf); } command void HplPXA27XQuickCaptInt.disableStartOfFrame() {CIF_setAndEnableCICR0(CICR0 | CICR0_SOFM);} command void HplPXA27XQuickCaptInt.enableStartOfFrame() {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_SOFM));} command void HplPXA27XQuickCaptInt.enableEndOfFrame() {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_EOFM));} command void HplPXA27XQuickCaptInt.enableEndOfLine() {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_EOLM));} command void HplPXA27XQuickCaptInt.enableRecvDataAvailable() {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_RDAVM));} command void HplPXA27XQuickCaptInt.enableFIFOOverrun() {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_FOM));} default async event void HplPXA27XQuickCaptInt.startOfFrame() { return;} default async event void HplPXA27XQuickCaptInt.endOfFrame() { return;} default async event void HplPXA27XQuickCaptInt.endOfLine() { return;} default async event void HplPXA27XQuickCaptInt.recvDataAvailable(uint8_t channel) { return;} default async event void HplPXA27XQuickCaptInt.fifoOverrun(uint8_t channel) { return;} async event void PPID_CIF_Irq.fired() { //atomic{printfUART(">>>>>>>>>>>>>>> PPID_CIF_Irq.fired() >>>>>>>>>>>\n", "");} volatile uint32_t tempCISR; atomic { tempCISR = CISR; } // Start-Of-Frame if ((tempCISR & CISR_SOF) && (~(CICR0) & CICR0_SOFM)) { atomic CISR |= CISR_SOF; signal HplPXA27XQuickCaptInt.startOfFrame(); // this disables CIF after the current frame capture is done CICR0 |= CICR0_DIS; } // End-Of-Frame if ((tempCISR & CISR_EOF) && (~(CICR0) & CICR0_EOFM)) { atomic CISR |= CISR_EOF; signal HplPXA27XQuickCaptInt.endOfFrame(); return; } // End-Of-Line if ((tempCISR & CISR_EOL) && (~(CICR0) & CICR0_EOLM)) { atomic CISR |= CISR_EOL; signal HplPXA27XQuickCaptInt.endOfLine(); } // Receive-Data-Available if (~(CICR0) & CICR0_RDAVM) { if (tempCISR & CISR_RDAV_2) { // channel 2 atomic CISR |= CISR_RDAV_2; signal HplPXA27XQuickCaptInt.recvDataAvailable(2); } if (tempCISR & CISR_RDAV_1) { // channel 1 atomic CISR |= CISR_RDAV_1; signal HplPXA27XQuickCaptInt.recvDataAvailable(1); } if (tempCISR & CISR_RDAV_0) { // channel 0 atomic CISR |= CISR_RDAV_0; signal HplPXA27XQuickCaptInt.recvDataAvailable(0); } } // FIFO Overrun if (~(CICR0) & CICR0_FOM) { if (tempCISR & CISR_IFO_2) { // channel 2 atomic CISR |= CISR_IFO_2; signal HplPXA27XQuickCaptInt.fifoOverrun(2); } if (tempCISR & CISR_IFO_1) { // channel 1 atomic CISR |= CISR_IFO_1; signal HplPXA27XQuickCaptInt.fifoOverrun(1); } if (tempCISR & CISR_IFO_0) { // channel 0 atomic CISR |= CISR_IFO_0; signal HplPXA27XQuickCaptInt.fifoOverrun(0); } } } void CIF_configurePins() { // (1) - Configure the GPIO Alt functions and direction // --- Template ---- //_GPIO_setaltfn(PIN, PIN_ALTFN); //_GPDR(PIN) &= ~_GPIO_bit(PIN); // input //_GPDR(PIN) |= _GPIO_bit(PIN); // output // ----------------- _GPIO_setaltfn(PIN_CIF_MCLK, PIN_CIF_MCLK_ALTFN); _GPIO_setaltfn(PIN_CIF_PCLK, PIN_CIF_PCLK_ALTFN); _GPIO_setaltfn(PIN_CIF_FV, PIN_CIF_FV_ALTFN); _GPIO_setaltfn(PIN_CIF_LV, PIN_CIF_LV_ALTFN); _GPIO_setaltfn(PIN_CIF_DD0, PIN_CIF_DD0_ALTFN); _GPIO_setaltfn(PIN_CIF_DD1, PIN_CIF_DD1_ALTFN); _GPIO_setaltfn(PIN_CIF_DD2, PIN_CIF_DD2_ALTFN); _GPIO_setaltfn(PIN_CIF_DD3, PIN_CIF_DD3_ALTFN); _GPIO_setaltfn(PIN_CIF_DD4, PIN_CIF_DD4_ALTFN); _GPIO_setaltfn(PIN_CIF_DD5, PIN_CIF_DD5_ALTFN); _GPIO_setaltfn(PIN_CIF_DD6, PIN_CIF_DD6_ALTFN); _GPIO_setaltfn(PIN_CIF_DD7, PIN_CIF_DD7_ALTFN); GPDR(PIN_CIF_MCLK) |= _GPIO_bit(PIN_CIF_MCLK); // output (if sensor is master) GPDR(PIN_CIF_PCLK) &= ~_GPIO_bit(PIN_CIF_PCLK); // input (if sensor is master) GPDR(PIN_CIF_FV) &= ~_GPIO_bit(PIN_CIF_FV); // input (if sensor is master) GPDR(PIN_CIF_LV) &= ~_GPIO_bit(PIN_CIF_LV); // input (if sensor is master) GPDR(PIN_CIF_DD0) &= ~_GPIO_bit(PIN_CIF_DD0); // input GPDR(PIN_CIF_DD1) &= ~_GPIO_bit(PIN_CIF_DD1); // input GPDR(PIN_CIF_DD2) &= ~_GPIO_bit(PIN_CIF_DD2); // input GPDR(PIN_CIF_DD3) &= ~_GPIO_bit(PIN_CIF_DD3); // input GPDR(PIN_CIF_DD4) &= ~_GPIO_bit(PIN_CIF_DD4); // input GPDR(PIN_CIF_DD5) &= ~_GPIO_bit(PIN_CIF_DD5); // input GPDR(PIN_CIF_DD6) &= ~_GPIO_bit(PIN_CIF_DD6); // input GPDR(PIN_CIF_DD7) &= ~_GPIO_bit(PIN_CIF_DD7); // input } async event void pxa_dma.interruptDMA(){ call pxa_dma.setDCMD(0); call pxa_dma.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR); } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/PXA27XQuickCaptInt.h000066400000000000000000000127401207233610700231540ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2005 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Konrad Lorincz * @version 1.0, August 15, 2005 */ /** * @brief Ported to TOS2 * @author Brano Kusy (branislav.kusy@gmail.com) */ #ifndef PXA27XQuickCaptInt_H #define PXA27XQuickCaptInt_H /******************************************************************************/ // Configure the GPIO Alt functions and directions // Note: // - In Sensor Master-Parallel mode, CIF_FV and CIF_LV are set to INPUTS // - In Sensor Slave-Parallel mode, CIF_FV and CIF_LV are set to OUTPUTS // Configure the GPIO Alt Functions and Directions // --- Template ---- // _GPIO_setaltfn(PIN, PIN_ALTFN); // _GPDR(PIN) &= ~_GPIO_bit(PIN); // input // _GPDR(PIN) |= _GPIO_bit(PIN); // output // ----------------- /******************************************************************************/ // (1) - Define the Pin mappings (options are listed as #define PIN_CIF_MCLK 53 // <23,O,1> <42,O,3> <53,O,2> #define PIN_CIF_MCLK_ALTFN 2 #define PIN_CIF_PCLK 54 // <26,I,2> <45,I,3> <54,I,3> #define PIN_CIF_PCLK_ALTFN 3 #define PIN_CIF_FV 84 // <24,I,1> <24,O,1> <43,I,3> <43,O,3> <84,I,3> <84,O,3> #define PIN_CIF_FV_ALTFN 3 #define PIN_CIF_LV 85 // <25,I,1> <25,O,1> <44,I,3> <44,O,3> <85,I,3> <85,O,3> #define PIN_CIF_LV_ALTFN 3 #define PIN_CIF_DD0 81 // <27,I,3> <47,I,1> <81,I,2> <98,I,2> #define PIN_CIF_DD0_ALTFN 2 // SSPEXTCLK STD_TXD BB_OB_DAT0 FF_RTS // CIF_DD0 KP_DKIN5 // GPIO27_LED_B #define PIN_CIF_DD1 55 // <55,I,1> <105,I,1> <114*,I,1> #define PIN_CIF_DD1_ALTFN 1 // BB_IB_DAT1 KP_MKOUT2 CC2420_FIFO // NPREG UVS0 #define PIN_CIF_DD2 51 // <51,I,1> <104,I,1> <116*,I,1> #define PIN_CIF_DD2_ALTFN 1 // BB_OB_DAT3 KP_MKOUT1 CC2420_CCA // U_DET #define PIN_CIF_DD3 50 // <50,I,1> <103,I,1> <115*,I,2> #define PIN_CIF_DD3_ALTFN 1 // BB_OB_DAT2 KP_MKOUT0 CC2420_VREG_EN // NPIOR U_EN #define PIN_CIF_DD4 52 // <52,I,1> <83,I,3> <90,I,3> <95,I,2> #define PIN_CIF_DD4_ALTFN 1 // BB_OB_CLK BB_IB_CLK NURST KP_DKIN2 // GPIO95_LED_R #define PIN_CIF_DD5 48 // <48,I,1> <82,I,3> <91,I,3> <94,I,2> #define PIN_CIF_DD5_ALTFN 1 // BB_OB_DAT1 BB_IB_DAT0 UCLK KP_DKIN1 // GPIO94_D_CARD #define PIN_CIF_DD6 17 // <17,I,2> <93,I,2> #define PIN_CIF_DD6_ALTFN 2 // CIF_DD6 KP_DKIN0 // PWM_OUT_1 GPIO93_D_CARD #define PIN_CIF_DD7 12 // <12,I,2> <108,I,1> #define PIN_CIF_DD7_ALTFN 2 // CIF_DD7 KP_MKOUT5 // 48MHz //#define PIN_CIF_DD8 107 // <107,I,1> //#define PIN_CIF_DD8_ALTFN 1 // CIF_DD8 // KP_MKOUT4 //#define PIN_CIF_DD9 106 // <106,I,1> //#define PIN_CIF_DD9_ALTFN 1 // CIF_DD9 // =================================================================== #define CIF_CHAN (11) #define CIBR0_ADDR (0x50000028) #define CICR0_DIS (1 << 27) /* Quick Capture Interface Disable */ #endif tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/dmaArray.h000066400000000000000000000053001207233610700214750ustar00rootroot00000000000000/* * Copyright (c) 2005 Yale University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * 3. All advertising materials mentioning features or use of this * software must display the following acknowledgement: * This product includes software developed by the Embedded Networks * and Applications Lab (ENALAB) at Yale University. * 4. Neither the name of the University nor that of the Laboratory * may be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY YALE UNIVERSITY AND CONTRIBUTORS ``AS IS'' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ /** * @brief dma array operations * @author Andrew Barton-Sweeney (abs@cs.yale.edu) * @author Thiago Teixeira */ /** * Modified and ported to tinyos-2.x. * * @author Brano Kusy (branislav.kusy@gmail.com) * @version October 25, 2007 */ #ifndef _DMA_ARRAY_H #define _DMA_ARRAY_H typedef struct { uint32_t DDADR; uint32_t DSADR; uint32_t DTADR; uint32_t DCMD; } DMADescriptor_t; #define MAX_DESC_TRANSFER 8184 // max is 8K-1, CIF requires a multiple of 8 //8192 // ---------------------------------------------- #define DescArray_NBR_DESC 100//8 #define DescArray_BYTE_ALLIGNMENT 16 #define DescArray_BUFFER_SIZE (DescArray_NBR_DESC*sizeof(DMADescriptor_t) + DescArray_BYTE_ALLIGNMENT) typedef struct DescArray { uint8_t data[DescArray_BUFFER_SIZE]; // The data is alligned from data[baseIndex] } DescArray; #endif //_DMA_ARRAY_H tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/dmaArray.nc000066400000000000000000000060131207233610700216500ustar00rootroot00000000000000/* * Copyright (c) 2005 Yale University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * 3. All advertising materials mentioning features or use of this * software must display the following acknowledgement: * This product includes software developed by the Embedded Networks * and Applications Lab (ENALAB) at Yale University. * 4. Neither the name of the University nor that of the Laboratory * may be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY YALE UNIVERSITY AND CONTRIBUTORS ``AS IS'' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ /** * @brief dma array operations * @author Andrew Barton-Sweeney (abs@cs.yale.edu) * @author Thiago Teixeira */ /** * Modified and ported to tinyos-2.x. * * @author Brano Kusy (branislav.kusy@gmail.com) * @version October 25, 2007 */ #include "DMA.h" interface dmaArray{ async command uint32_t array_getBaseIndex(DescArray *DAPtr); async command DMADescriptor_t* array_get(DescArray *DAPtr, uint8_t descIndex); command void init(DescArray *DAPtr, uint32_t num_bytes, uint32_t sourceAddr, void *buf); command void setSourceAddr(DMADescriptor_t* descPtr, uint32_t val); command void setTargetAddr(DMADescriptor_t* descPtr, uint32_t val); command void enableSourceAddrIncrement(DMADescriptor_t* descPtr, bool enable); command void enableTargetAddrIncrement(DMADescriptor_t* descPtr, bool enable); command void enableSourceFlowControl(DMADescriptor_t* descPtr, bool enable); command void enableTargetFlowControl(DMADescriptor_t* descPtr, bool enable); command void setMaxBurstSize(DMADescriptor_t* descPtr, DMAMaxBurstSize_t size); command void setTransferLength(DMADescriptor_t* descPtr, uint16_t length); command void setTransferWidth(DMADescriptor_t* descPtr, DMATransferWidth_t width); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/dmaArrayC.nc000066400000000000000000000043021207233610700217520ustar00rootroot00000000000000/* * Copyright (c) 2005 Yale University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * 3. All advertising materials mentioning features or use of this * software must display the following acknowledgement: * This product includes software developed by the Embedded Networks * and Applications Lab (ENALAB) at Yale University. * 4. Neither the name of the University nor that of the Laboratory * may be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY YALE UNIVERSITY AND CONTRIBUTORS ``AS IS'' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ /** * @brief dma array operations * @author Andrew Barton-Sweeney (abs@cs.yale.edu) * @author Thiago Teixeira */ /** * Modified and ported to tinyos-2.x. * * @author Brano Kusy (branislav.kusy@gmail.com) * @version October 25, 2007 */ configuration dmaArrayC{ provides interface dmaArray; } implementation { components dmaArrayM; dmaArray = dmaArrayM; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/cif/dmaArrayM.nc000066400000000000000000000154371207233610700217770ustar00rootroot00000000000000/* * Copyright (c) 2005 Yale University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * 3. All advertising materials mentioning features or use of this * software must display the following acknowledgement: * This product includes software developed by the Embedded Networks * and Applications Lab (ENALAB) at Yale University. * 4. Neither the name of the University nor that of the Laboratory * may be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY YALE UNIVERSITY AND CONTRIBUTORS ``AS IS'' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ /** * @brief dma array operations * @author Andrew Barton-Sweeney (abs@cs.yale.edu) * @author Thiago Teixeira */ /** * Modified and ported to tinyos-2.x. * * @author Brano Kusy (branislav.kusy@gmail.com) * @version October 25, 2007 */ module dmaArrayM{ provides interface dmaArray; } implementation { async command uint32_t dmaArray.array_getBaseIndex(DescArray *DAPtr) { uint32_t addr = (uint32_t) (&DAPtr->data[0]); return DescArray_BYTE_ALLIGNMENT - (addr % DescArray_BYTE_ALLIGNMENT); } async command DMADescriptor_t* dmaArray.array_get(DescArray *DAPtr, uint8_t descIndex) { uint32_t baseIndex = call dmaArray.array_getBaseIndex(DAPtr); return (DMADescriptor_t*)&DAPtr->data[baseIndex + descIndex*sizeof(DMADescriptor_t)]; } command void dmaArray.init(DescArray *DAPtr, uint32_t num_bytes, uint32_t sourceAddr, void *buf) { uint8_t i = 0; DMADescriptor_t* descPtr = NULL; //was: uint32_t bytesLeftToSchedule = nbrBytesToTransfer; uint32_t bytesLeftToSchedule = num_bytes; uint32_t image_data = (uint32_t) buf; for (i = 0; bytesLeftToSchedule > 0; ++i) { descPtr = call dmaArray.array_get(DAPtr, i); call dmaArray.setSourceAddr(descPtr, sourceAddr); //was: call dmaArray.setTargetAddr(descPtr, &image.data[ i*(MAX_DESC_TRANSFER/4) ]); call dmaArray.setTargetAddr(descPtr, image_data + i*MAX_DESC_TRANSFER ); call dmaArray.enableSourceAddrIncrement(descPtr, FALSE); call dmaArray.enableTargetAddrIncrement(descPtr, TRUE); call dmaArray.enableSourceFlowControl(descPtr, TRUE); call dmaArray.enableTargetFlowControl(descPtr, FALSE); call dmaArray.setMaxBurstSize(descPtr, 3); // burst size: can be 8, 16, or 32 bytes call dmaArray.setTransferWidth(descPtr, 3); // peripheral width for DMA transactions from CIF is always 8-bytes, regardless of DCMD[WIDTH] if (bytesLeftToSchedule >= MAX_DESC_TRANSFER) { call dmaArray.setTransferLength(descPtr, MAX_DESC_TRANSFER); // 16*8 *2 =256 bytes // must be an integer multiple of 8-bytes bytesLeftToSchedule -= MAX_DESC_TRANSFER; } else { call dmaArray.setTransferLength(descPtr, bytesLeftToSchedule); bytesLeftToSchedule = 0; } // continue running the next descriptor descPtr->DDADR = (uint32_t)call dmaArray.array_get(DAPtr, i+1); } // Set the stop bit for the last descriptor descPtr->DDADR |= DDADR_STOP; } command void dmaArray.setSourceAddr(DMADescriptor_t* descPtr, uint32_t val) { atomic{ descPtr->DSADR = val; } } command void dmaArray.setTargetAddr(DMADescriptor_t* descPtr, uint32_t val) { atomic{ descPtr->DTADR = val; } } command void dmaArray.enableSourceAddrIncrement(DMADescriptor_t* descPtr, bool enable) { atomic{ descPtr->DCMD = (enable == TRUE) ? descPtr->DCMD | DCMD_INCSRCADDR : descPtr->DCMD & ~DCMD_INCSRCADDR; } } command void dmaArray.enableTargetAddrIncrement(DMADescriptor_t* descPtr, bool enable) { atomic{ descPtr->DCMD = (enable == TRUE) ? descPtr->DCMD | DCMD_INCTRGADDR : descPtr->DCMD & ~DCMD_INCTRGADDR; } } command void dmaArray.enableSourceFlowControl(DMADescriptor_t* descPtr, bool enable) { atomic{descPtr->DCMD = (enable == TRUE) ? descPtr->DCMD | DCMD_FLOWSRC : descPtr->DCMD & ~DCMD_FLOWSRC;} } command void dmaArray.enableTargetFlowControl(DMADescriptor_t* descPtr, bool enable) { atomic{descPtr->DCMD = (enable == TRUE) ? descPtr->DCMD | DCMD_FLOWTRG : descPtr->DCMD & ~DCMD_FLOWTRG;} } command void dmaArray.setMaxBurstSize(DMADescriptor_t* descPtr, DMAMaxBurstSize_t size) { if(size >= DMA_BURST_SIZE_8BYTES && size <= DMA_BURST_SIZE_32BYTES){ //if(size >= DMA_BURST_SIZE_8BYTES && size <= DMA_BURST_SIZE_32BYTES){ atomic{ //clear it out since otherwise |'ing doesn't work so well descPtr->DCMD &= ~DCMD_MAXSIZE; descPtr->DCMD |= DCMD_SIZE(size); } } } command void dmaArray.setTransferLength(DMADescriptor_t* descPtr, uint16_t length) { uint16_t currentLength; currentLength = (length < MAX_DESC_TRANSFER) ? length : MAX_DESC_TRANSFER; //was: currentLength = (length<8192) ? length: 8190; atomic{ descPtr->DCMD &= ~DCMD_MAXLEN; descPtr->DCMD |= DCMD_LEN(currentLength); } } command void dmaArray.setTransferWidth(DMADescriptor_t* descPtr, DMATransferWidth_t width) { atomic{ //clear it out since otherwise |'ing doesn't work so well descPtr->DCMD &= ~DCMD_MAXWIDTH; descPtr->DCMD |= DCMD_WIDTH(width); } } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/000077500000000000000000000000001207233610700175665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/DMA.h000066400000000000000000000036631207233610700203500ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ #ifndef _DMA_H #define _DMA_H typedef uint8_t DMAPeripheralID_t; typedef uint8_t DMAPriority_t; typedef enum { DMA_BURST_SIZE_8BYTES, DMA_BURST_SIZE_16BYTES, DMA_BURST_SIZE_32BYTES, } DMAMaxBurstSize_t; typedef enum { DMA_WIDTH_1BYTE, DMA_WIDTH_2BYTES, DMA_WIDTH_4BYTES, } DMATransferWidth_t; #endif /* _DMA_H */ tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HalPXA27xDMAChannel.nc000066400000000000000000000047211207233610700233450ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ #include "DMA.h" interface HalPXA27xDMAChannel { command error_t requestChannel(DMAPeripheralID_t peripheralID, DMAPriority_t priority, bool permanent); event error_t requestChannelDone(); command error_t returnChannel(DMAPeripheralID_t peripheralID); command error_t setSourceAddr(uint32_t val); command error_t setTargetAddr(uint32_t val); command error_t enableSourceAddrIncrement(bool enable); command error_t enableTargetAddrIncrement(bool enable); command error_t enableSourceFlowControl(bool enable); command error_t enableTargetFlowControl(bool enable); command error_t setMaxBurstSize(DMAMaxBurstSize_t size); command error_t setTransferLength(uint16_t length); command error_t setTransferWidth(DMATransferWidth_t width); command error_t run(bool InterruptEn); command error_t stop(); async event void Interrupt(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HalPXA27xDMAChannelC.nc000066400000000000000000000036621207233610700234530ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ configuration HalPXA27xDMAChannelC { provides interface HalPXA27xDMAChannel[uint8_t chnl]; } implementation { components HplPXA27xDMAC, HalPXA27xDMAChannelM; HalPXA27xDMAChannel = HalPXA27xDMAChannelM; HalPXA27xDMAChannelM.HplPXA27xDMAChnl -> HplPXA27xDMAC; HalPXA27xDMAChannelM.HplPXA27xDMACntl -> HplPXA27xDMAC; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HalPXA27xDMAChannelM.nc000066400000000000000000000160001207233610700234530ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ #include "DMA.h" module HalPXA27xDMAChannelM { provides interface HalPXA27xDMAChannel[uint8_t chnl]; uses interface HplPXA27xDMACntl; uses interface HplPXA27xDMAChnl[uint8_t chnl]; } implementation { uint8_t requestedChannel; task void reqCompleteTask() { signal HalPXA27xDMAChannel.requestChannelDone[requestedChannel](); } command error_t HalPXA27xDMAChannel.requestChannel[uint8_t chnl](DMAPeripheralID_t peripheralID, DMAPriority_t priority, bool permanent) { // priority is decided based on which channel you pick (PXADEV 5-4) // permanent? nothing lasts forever my friend uint32_t valDRCMR; valDRCMR = call HplPXA27xDMACntl.getDRCMR(peripheralID) | DRCMR_MAPVLD; valDRCMR = valDRCMR & ~DRCMR_CHLNUM(0x1F); valDRCMR |= DRCMR_CHLNUM(chnl); call HplPXA27xDMACntl.setDRCMR(peripheralID, valDRCMR); requestedChannel = chnl; post reqCompleteTask(); return SUCCESS; } command error_t HalPXA27xDMAChannel.returnChannel[uint8_t chnl](DMAPeripheralID_t peripheralID) { // modified interface to require peripheralID, this isn't virtualized uint32_t valDRCMR; valDRCMR = call HplPXA27xDMACntl.getDRCMR(peripheralID) & ~DRCMR_MAPVLD; call HplPXA27xDMACntl.setDRCMR(peripheralID, valDRCMR); return SUCCESS; } command error_t HalPXA27xDMAChannel.setSourceAddr[uint8_t chnl](uint32_t val) { call HplPXA27xDMAChnl.setDSADR[chnl](val); return SUCCESS; } command error_t HalPXA27xDMAChannel.setTargetAddr[uint8_t chnl](uint32_t val) { call HplPXA27xDMAChnl.setDTADR[chnl](val); return SUCCESS; } command error_t HalPXA27xDMAChannel.enableSourceAddrIncrement[uint8_t chnl](bool enable) { uint32_t valDCMD; valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl](); valDCMD = (enable) ? (valDCMD | DCMD_INCSRCADDR) : (valDCMD & ~DCMD_INCSRCADDR); call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD); return SUCCESS; } command error_t HalPXA27xDMAChannel.enableTargetAddrIncrement[uint8_t chnl](bool enable) { uint32_t valDCMD; valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl](); valDCMD = (enable) ? (valDCMD | DCMD_INCTRGADDR) : (valDCMD & ~DCMD_INCTRGADDR); call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD); return SUCCESS; } command error_t HalPXA27xDMAChannel.enableSourceFlowControl[uint8_t chnl](bool enable) { uint32_t valDCMD; valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl](); valDCMD = (enable) ? (valDCMD | DCMD_FLOWSRC) : (valDCMD & ~DCMD_FLOWSRC); call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD); return SUCCESS; } command error_t HalPXA27xDMAChannel.enableTargetFlowControl[uint8_t chnl](bool enable) { uint32_t valDCMD; valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl](); valDCMD = (enable) ? (valDCMD | DCMD_FLOWTRG) : (valDCMD & ~DCMD_FLOWTRG); call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD); return SUCCESS; } command error_t HalPXA27xDMAChannel.setMaxBurstSize[uint8_t chnl](DMAMaxBurstSize_t size) { uint32_t valDCMD; valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl](); valDCMD &= ~DCMD_BURST32; // zero the bits first switch(size) { case DMA_BURST_SIZE_8BYTES: valDCMD |= DCMD_BURST8; break; case DMA_BURST_SIZE_16BYTES: valDCMD |= DCMD_BURST16; break; case DMA_BURST_SIZE_32BYTES: valDCMD |= DCMD_BURST32; break; default: return FAIL; } call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD); return SUCCESS; } command error_t HalPXA27xDMAChannel.setTransferLength[uint8_t chnl](uint16_t length) { uint32_t valDCMD; valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl](); if(length > DCMD_MAXLEN) return FAIL; valDCMD &= ~DCMD_MAXLEN; // zero the bits first valDCMD |= DCMD_LEN(length); call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD); return SUCCESS; } command error_t HalPXA27xDMAChannel.setTransferWidth[uint8_t chnl](DMATransferWidth_t width) { uint32_t valDCMD; valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl](); valDCMD &= ~DCMD_WIDTH4; // zero the bits first switch(width) { case DMA_WIDTH_1BYTE: valDCMD |= DCMD_WIDTH1; break; case DMA_WIDTH_2BYTES: valDCMD |= DCMD_WIDTH2; break; case DMA_WIDTH_4BYTES: valDCMD |= DCMD_WIDTH4; break; default: return FAIL; } call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD); return SUCCESS; } command error_t HalPXA27xDMAChannel.run[uint8_t chnl](bool InterruptEn) { uint32_t valDCSR; uint32_t valDCMD; valDCSR = call HplPXA27xDMAChnl.getDCSR[chnl](); valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl](); valDCMD = (InterruptEn) ? valDCMD | DCMD_ENDIRQEN : valDCSR & ~DCMD_ENDIRQEN; call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD); call HplPXA27xDMAChnl.setDCSR[chnl](valDCSR | DCSR_RUN | DCSR_NODESCFETCH); return SUCCESS; } command error_t HalPXA27xDMAChannel.stop[uint8_t chnl]() { uint32_t valDCSR; valDCSR = call HplPXA27xDMAChnl.getDCSR[chnl](); call HplPXA27xDMAChnl.setDCSR[chnl](valDCSR & ~DCSR_RUN); return SUCCESS; } async event void HplPXA27xDMAChnl.interruptDMA[uint8_t chnl]() { // might want to clear interrupt first // ... signal HalPXA27xDMAChannel.Interrupt[chnl](); } default async event void HalPXA27xDMAChannel.Interrupt[uint8_t chnl]() { } default event error_t HalPXA27xDMAChannel.requestChannelDone[uint8_t chnl]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HplPXA27xDMAC.nc000066400000000000000000000076471207233610700222100ustar00rootroot00000000000000/* $Id: HplPXA27xDMAC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration HplPXA27xDMAC { provides { interface HplPXA27xDMACntl; interface HplPXA27xDMAChnl[uint8_t chnl]; } } implementation { components HplPXA27xDMAM; components HplPXA27xInterruptM; components PlatformP; HplPXA27xDMACntl = HplPXA27xDMAM; HplPXA27xDMAChnl[0] = HplPXA27xDMAM.HplPXA27xDMAChnl[0]; HplPXA27xDMAChnl[1] = HplPXA27xDMAM.HplPXA27xDMAChnl[1]; HplPXA27xDMAChnl[2] = HplPXA27xDMAM.HplPXA27xDMAChnl[2]; HplPXA27xDMAChnl[3] = HplPXA27xDMAM.HplPXA27xDMAChnl[3]; HplPXA27xDMAChnl[4] = HplPXA27xDMAM.HplPXA27xDMAChnl[4]; HplPXA27xDMAChnl[5] = HplPXA27xDMAM.HplPXA27xDMAChnl[5]; HplPXA27xDMAChnl[6] = HplPXA27xDMAM.HplPXA27xDMAChnl[6]; HplPXA27xDMAChnl[7] = HplPXA27xDMAM.HplPXA27xDMAChnl[7]; HplPXA27xDMAChnl[8] = HplPXA27xDMAM.HplPXA27xDMAChnl[8]; HplPXA27xDMAChnl[9] = HplPXA27xDMAM.HplPXA27xDMAChnl[9]; HplPXA27xDMAChnl[10] = HplPXA27xDMAM.HplPXA27xDMAChnl[10]; HplPXA27xDMAChnl[11] = HplPXA27xDMAM.HplPXA27xDMAChnl[11]; HplPXA27xDMAChnl[12] = HplPXA27xDMAM.HplPXA27xDMAChnl[12]; HplPXA27xDMAChnl[13] = HplPXA27xDMAM.HplPXA27xDMAChnl[13]; HplPXA27xDMAChnl[14] = HplPXA27xDMAM.HplPXA27xDMAChnl[14]; HplPXA27xDMAChnl[15] = HplPXA27xDMAM.HplPXA27xDMAChnl[15]; HplPXA27xDMAChnl[16] = HplPXA27xDMAM.HplPXA27xDMAChnl[16]; HplPXA27xDMAChnl[17] = HplPXA27xDMAM.HplPXA27xDMAChnl[17]; HplPXA27xDMAChnl[18] = HplPXA27xDMAM.HplPXA27xDMAChnl[18]; HplPXA27xDMAChnl[19] = HplPXA27xDMAM.HplPXA27xDMAChnl[19]; HplPXA27xDMAChnl[20] = HplPXA27xDMAM.HplPXA27xDMAChnl[20]; HplPXA27xDMAChnl[21] = HplPXA27xDMAM.HplPXA27xDMAChnl[21]; HplPXA27xDMAChnl[22] = HplPXA27xDMAM.HplPXA27xDMAChnl[22]; HplPXA27xDMAChnl[23] = HplPXA27xDMAM.HplPXA27xDMAChnl[23]; HplPXA27xDMAChnl[24] = HplPXA27xDMAM.HplPXA27xDMAChnl[24]; HplPXA27xDMAChnl[25] = HplPXA27xDMAM.HplPXA27xDMAChnl[25]; HplPXA27xDMAChnl[26] = HplPXA27xDMAM.HplPXA27xDMAChnl[26]; HplPXA27xDMAChnl[27] = HplPXA27xDMAM.HplPXA27xDMAChnl[27]; HplPXA27xDMAChnl[28] = HplPXA27xDMAM.HplPXA27xDMAChnl[28]; HplPXA27xDMAChnl[29] = HplPXA27xDMAM.HplPXA27xDMAChnl[29]; HplPXA27xDMAChnl[30] = HplPXA27xDMAM.HplPXA27xDMAChnl[30]; HplPXA27xDMAChnl[31] = HplPXA27xDMAM.HplPXA27xDMAChnl[31]; HplPXA27xDMAM.Init <- PlatformP.InitL1; HplPXA27xDMAM.DMAIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_DMAC]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HplPXA27xDMAChnl.nc000066400000000000000000000102351207233610700226750ustar00rootroot00000000000000/* $Id: HplPXA27xDMAChnl.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Phil Buonadonna * Authors: Robbie Adler */ interface HplPXA27xDMAChnl { async command error_t setMap(uint8_t dev); async command void setDALGNbit(bool flag); async command bool getDALGNbit(); async command bool getDINTbit(); async command void setDCSR(uint32_t val); async command uint32_t getDCSR(); async command void setDCMD(uint32_t val); async command uint32_t getDCMD(); async command void setDDADR(uint32_t val); async command uint32_t getDDADR(); async command void setDSADR(uint32_t val); async command uint32_t getDSADR(); async command void setDTADR(uint32_t val); async command uint32_t getDTADR(); async event void interruptDMA(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HplPXA27xDMACntl.nc000066400000000000000000000045501207233610700227140ustar00rootroot00000000000000/* $Id: HplPXA27xDMACntl.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * * Authors: Phil Buonadonna * */ interface HplPXA27xDMACntl { async command void setDRCMR(uint8_t peripheral, uint8_t chnl); async command uint8_t getDRCMR(uint8_t peripheral); async command void setDALGN(uint32_t val); async command uint32_t getDALGN(uint32_t val); async command void setDPCSR(uint32_t val); async command uint32_t getDPSCR(); async command void setDRQSR0(uint32_t val); async command uint32_t getDRQSR0(); async command void setDRQSR1(uint32_t val); async command uint32_t getDRQSR1(); async command void setDRQSR2(uint32_t val); async command uint32_t getDRQSR2(); async command uint32_t getDINT(); async command void setFLYCNFG(uint32_t val); async command uint32_t getFLYCNFG(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HplPXA27xDMAInfo.nc000066400000000000000000000050051207233610700227030ustar00rootroot00000000000000/* $Id: HplPXA27xDMAInfo.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * This interface is to be PROVIDED by peripheral HPL components that * are DMA-able. It is used to provide information to higher level * components (e.g. HalX) that may implement higher level peripheral * functions using DMA. * * Instantiate the interface multiple times according to how many * I/O addresses a peripheral has that may be assigned to a DMA * src/tgt address register. * * Authors: Phil Buonadonna * */ interface HplPXA27xDMAInfo { /** * Returns a single DMAable address for a peripheral. * * @return addr The 32 bit address of the peripheral register * of interest. */ async command uint32_t getAddr(); /** * Returns the DMA map index that is associated with the getAddr() * function. * * @return index The DMA map register index that is associated with * the getAddr function. */ async command uint8_t getMapIndex(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HplPXA27xDMAInfoC.nc000066400000000000000000000041311207233610700230050ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ // Example (STUART RX): // peripheral = 19 (Request to Channel Map register in PXA Dev Manual) // baseAddr = &STRBR (DMA address) // Example (STUART TX): // peripheral = 20 // baseAddr = &STTHR generic module HplPXA27xDMAInfoC(uint8_t peripheral, uint32_t baseAddr) { provides interface HplPXA27xDMAInfo; } implementation { async command uint32_t HplPXA27xDMAInfo.getAddr() { return baseAddr; } async command uint8_t HplPXA27xDMAInfo.getMapIndex() { return peripheral; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/dma/HplPXA27xDMAM.nc000066400000000000000000000123501207233610700222050ustar00rootroot00000000000000/* $Id: HplPXA27xDMAM.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ module HplPXA27xDMAM { provides { interface Init; interface HplPXA27xDMACntl; interface HplPXA27xDMAChnl[uint8_t chnl]; } uses { interface HplPXA27xInterrupt as DMAIrq; } } implementation { command error_t Init.init() { call DMAIrq.allocate(); call DMAIrq.enable(); return SUCCESS; } async command void HplPXA27xDMACntl.setDRCMR(uint8_t peripheral, uint8_t val) { DRCMR(peripheral) = val; } async command uint8_t HplPXA27xDMACntl.getDRCMR(uint8_t peripheral) { return DRCMR(peripheral);} async command void HplPXA27xDMACntl.setDALGN(uint32_t val) {DALGN = val;} async command uint32_t HplPXA27xDMACntl.getDALGN(uint32_t val) {return DALGN; } async command void HplPXA27xDMACntl.setDPCSR(uint32_t val) {DPCSR = val; } async command uint32_t HplPXA27xDMACntl.getDPSCR() {return DPCSR; } async command void HplPXA27xDMACntl.setDRQSR0(uint32_t val) {DRQSR0 = val; } async command uint32_t HplPXA27xDMACntl.getDRQSR0() {return DRQSR0; } async command void HplPXA27xDMACntl.setDRQSR1(uint32_t val) {DRQSR1 = val; } async command uint32_t HplPXA27xDMACntl.getDRQSR1() {return DRQSR1; } async command void HplPXA27xDMACntl.setDRQSR2(uint32_t val) {DRQSR2 = val; } async command uint32_t HplPXA27xDMACntl.getDRQSR2() {return DRQSR2; } async command uint32_t HplPXA27xDMACntl.getDINT() {return DINT; } async command void HplPXA27xDMACntl.setFLYCNFG(uint32_t val) {FLYCNFG = val; } async command uint32_t HplPXA27xDMACntl.getFLYCNFG() {return FLYCNFG; } async command error_t HplPXA27xDMAChnl.setMap[uint8_t chnl](uint8_t dev) { call HplPXA27xDMACntl.setDRCMR(dev,(DRCMR_MAPVLD | DRCMR_CHLNUM(chnl))); return SUCCESS; } async command void HplPXA27xDMAChnl.setDALGNbit[uint8_t chnl](bool flag) { if (flag) { DALGN |= (1 << chnl); } else { DALGN &= ~(1 << chnl); } return; } async command bool HplPXA27xDMAChnl.getDALGNbit[uint8_t chnl]() { return ((DALGN & (1 << chnl)) != 0); } async command bool HplPXA27xDMAChnl.getDINTbit[uint8_t chnl]() { return ((DINT & (1 << chnl)) != 0); } async command void HplPXA27xDMAChnl.setDCSR[uint8_t chnl](uint32_t val) { // uint32_t cycles; //_pxa27x_perf_clear(); DCSR(chnl) = val; //_pxa27x_perf_get(cycles); } async command uint32_t HplPXA27xDMAChnl.getDCSR[uint8_t chnl]() {return DCSR(chnl); } async command void HplPXA27xDMAChnl.setDCMD[uint8_t chnl](uint32_t val) {DCMD(chnl) = val; } async command uint32_t HplPXA27xDMAChnl.getDCMD[uint8_t chnl]() {return DCMD(chnl); } async command void HplPXA27xDMAChnl.setDDADR[uint8_t chnl](uint32_t val) {DDADR(chnl) = val; } async command uint32_t HplPXA27xDMAChnl.getDDADR[uint8_t chnl]() {return DDADR(chnl); } async command void HplPXA27xDMAChnl.setDSADR[uint8_t chnl](uint32_t val) {DSADR(chnl) = val; } async command uint32_t HplPXA27xDMAChnl.getDSADR[uint8_t chnl]() {return DSADR(chnl); } async command void HplPXA27xDMAChnl.setDTADR[uint8_t chnl](uint32_t val) {DTADR(chnl) = val; } async command uint32_t HplPXA27xDMAChnl.getDTADR[uint8_t chnl]() {return DTADR(chnl); } async event void DMAIrq.fired() { uint32_t IntReg; uint8_t chnl; IntReg = call HplPXA27xDMACntl.getDINT(); while (IntReg) { chnl = 31 - _pxa27x_clzui(IntReg); signal HplPXA27xDMAChnl.interruptDMA[chnl](); IntReg &= ~(1 << chnl); } return; } default async event void HplPXA27xDMAChnl.interruptDMA[uint8_t chnl]() { call HplPXA27xDMAChnl.setDCMD[chnl](0); call HplPXA27xDMAChnl.setDCSR[chnl](DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR); } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/000077500000000000000000000000001207233610700177635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/GeneralIOC.nc000066400000000000000000000045711207233610700222240ustar00rootroot00000000000000// $Id: GeneralIOC.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ //@author Phil Buonadonna configuration GeneralIOC { provides { interface GeneralIO[uint8_t pin]; interface HalPXA27xGpioInterrupt[uint8_t pin]; interface GpioInterrupt[uint8_t pin]; } } implementation { components HalPXA27xGeneralIOM; components HplPXA27xGPIOC; GeneralIO = HalPXA27xGeneralIOM; HalPXA27xGpioInterrupt = HalPXA27xGeneralIOM; GpioInterrupt = HalPXA27xGeneralIOM; HalPXA27xGeneralIOM.HplPXA27xGPIOPin -> HplPXA27xGPIOC; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HalPXA27xGeneralIOM.nc000066400000000000000000000121471207233610700235730ustar00rootroot00000000000000// $Id: HalPXA27xGeneralIOM.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ //@author Phil Buonadonna module HalPXA27xGeneralIOM { provides { interface GeneralIO[uint8_t pin]; interface HalPXA27xGpioInterrupt[uint8_t pin]; interface GpioInterrupt[uint8_t pin]; } uses { interface HplPXA27xGPIOPin[uint8_t pin]; } } implementation { async command void GeneralIO.set[uint8_t pin]() { atomic call HplPXA27xGPIOPin.setGPSRbit[pin](); return; } async command void GeneralIO.clr[uint8_t pin]() { atomic call HplPXA27xGPIOPin.setGPCRbit[pin](); return; } async command void GeneralIO.toggle[uint8_t pin]() { atomic { if (call HplPXA27xGPIOPin.getGPLRbit[pin]()) { call HplPXA27xGPIOPin.setGPCRbit[pin](); } else { call HplPXA27xGPIOPin.setGPSRbit[pin](); } } return; } async command bool GeneralIO.get[uint8_t pin]() { bool result; result = call HplPXA27xGPIOPin.getGPLRbit[pin](); return result; } async command void GeneralIO.makeInput[uint8_t pin]() { atomic call HplPXA27xGPIOPin.setGPDRbit[pin](FALSE); return; } async command bool GeneralIO.isInput[uint8_t pin]() { bool result; result = !call HplPXA27xGPIOPin.getGPLRbit[pin](); return result; } async command void GeneralIO.makeOutput[uint8_t pin]() { atomic call HplPXA27xGPIOPin.setGPDRbit[pin](TRUE); return; } async command bool GeneralIO.isOutput[uint8_t pin]() { bool result; result = call HplPXA27xGPIOPin.getGPDRbit[pin](); return result; } async command error_t HalPXA27xGpioInterrupt.enableRisingEdge[uint8_t pin]() { atomic { call HplPXA27xGPIOPin.setGRERbit[pin](TRUE); call HplPXA27xGPIOPin.setGFERbit[pin](FALSE); } return SUCCESS; } async command error_t HalPXA27xGpioInterrupt.enableFallingEdge[uint8_t pin]() { atomic { call HplPXA27xGPIOPin.setGRERbit[pin](FALSE); call HplPXA27xGPIOPin.setGFERbit[pin](TRUE); } return SUCCESS; } async command error_t HalPXA27xGpioInterrupt.enableBothEdge[uint8_t pin]() { atomic { call HplPXA27xGPIOPin.setGRERbit[pin](TRUE); call HplPXA27xGPIOPin.setGFERbit[pin](TRUE); } return SUCCESS; } async command error_t HalPXA27xGpioInterrupt.disable[uint8_t pin]() { atomic { call HplPXA27xGPIOPin.setGRERbit[pin](FALSE); call HplPXA27xGPIOPin.setGFERbit[pin](FALSE); call HplPXA27xGPIOPin.clearGEDRbit[pin](); } return SUCCESS; } async command error_t GpioInterrupt.enableRisingEdge[uint8_t pin]() { return call HalPXA27xGpioInterrupt.enableRisingEdge[pin](); } async command error_t GpioInterrupt.enableFallingEdge[uint8_t pin]() { return call HalPXA27xGpioInterrupt.enableFallingEdge[pin](); } async command error_t GpioInterrupt.disable[uint8_t pin]() { return call HalPXA27xGpioInterrupt.disable[pin](); } async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]() { call HplPXA27xGPIOPin.clearGEDRbit[pin](); signal HalPXA27xGpioInterrupt.fired[pin](); signal GpioInterrupt.fired[pin](); return; } default async event void HalPXA27xGpioInterrupt.fired[uint8_t pin]() { return; } default async event void GpioInterrupt.fired[uint8_t pin]() { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HalPXA27xGpioCapture.nc000066400000000000000000000042551207233610700240740ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * Variant of the GpioCapture interface that provides a capture * on 'BOTH'. * * @author Phil Buonadonna */ interface HalPXA27xGpioCapture { /** * Enable an edge based timer capture event. * * @return Whether the timer capture has been enabled. */ async command error_t captureRisingEdge(); async command error_t captureFallingEdge(); async command error_t captureBothEdge(); /** * Fired when an edge interrupt occurs. * * @param val The value of the 32kHz timer. */ async event void captured(uint16_t time); /** * Disable further captures. */ async command void disable(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HalPXA27xGpioInterrupt.nc000066400000000000000000000046131207233610700244630ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * Variant of the standard GpioInterrupt interface that provides a * 'BOTH' trigger. * * @author Phil Buonadonna * */ interface HalPXA27xGpioInterrupt { /** * Enable an edge based interrupt. Calls to these functions are * not cumulative: only the transition type of the last called * function will be monitored for. * * * @return SUCCESS if the interrupt has been enabled */ async command error_t enableRisingEdge(); async command error_t enableFallingEdge(); async command error_t enableBothEdge(); /** * Diables an edge interrupt or capture interrupt * * @return SUCCESS if the interrupt has been disabled */ async command error_t disable(); /** * Fired when an edge interrupt occurs. * * NOTE: Interrupts keep running until "disable()" is called */ async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureC.nc000066400000000000000000000043251207233610700242120ustar00rootroot00000000000000// $Id: HalPXA27xSoftCaptureC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Emulates GPIO capture functionality using HalPXA27xGpioInterrupt and the * standard 32khz counter. Provides a method to capture on BOTH edges of * a GPIO transition * * @author Phil Buonadonna */ generic configuration HalPXA27xSoftCaptureC() { provides interface HalPXA27xGpioCapture; uses interface HalPXA27xGpioInterrupt; } implementation { components new HalPXa27xSoftCaptureP(); components Counter32khzC; HalPXA27xGpioCapture = HalPXA27xSoftCaptureP; HalPXA27xGpioInterrupt = HalPXA27xSoftCaptureP; HalPXA27xSoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureP.nc000066400000000000000000000056001207233610700242240ustar00rootroot00000000000000// $Id: HalPXA27xSoftCaptureP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Emulates GPIO capture functionality using GpioInterrupt and the * standard 32khz counter. Provides a method to capture on BOTH edges of * a GPIO transition. * * @author Phil Buonadonna */ generic module HalPXA27xSoftCaptureP () { provides interface HalPXA27xGpioCapture; uses { interface HalPXA27xGpioInterrupt; interface Counter as Counter32khz32; } } implementation { async command error_t HalPXA27xGpioCapture.captureRisingEdge() { return (call HalPXA27xGpioInterrupt.enableRisingEdge()); } async command error_t HalPXA27xGpioCapture.captureFallingEdge() { return (call HalPXA27xGpioInterrupt.enableFallingEdge()); } async command error_t HalPXA27xGpioCapture.captureBothEdge() { return (call HalPXA27xGpioInterrupt.enableBothEdge()); } async command void HalPXA27xGpioCapture.disable() { call HalPXA27xGpioInterrupt.disable(); return; } async event void HalPXA27xGpioInterrupt.fired() { uint16_t captureTime; captureTime = (uint16_t) call Counter32khz32.get(); signal HalPXA27xGpioCapture.captured(captureTime); return; } async event void Counter32khz32.overflow() { return; } default async event void HalPXA27xGpioCapture.captured(uint16_t time) { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HplPXA27xGPIO.nc000066400000000000000000000122731207233610700224260ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This interface provides direct access to the PXA27x GPIO controller * registers. It is meant as an alternative to the 'per-pin' interface * where the pin abstraction may not be convienient. The event provided is * called at every signal of the underlying first-level interrupt component * and NOT on a per-pin basis. * * Commands in this interface are named according to the following scheme: * set(uint32_t val); * get(); * where is the register as defined in the PXA27x Developers * Guide: General-Purpose IO Controller. * * This interface is NOT intended to be parameterized. * * @author Phil Buonadonna */ interface HplPXA27xGPIO { async command void setGPLR0(uint32_t val); async command uint32_t getGPLR0(); async command void setGPLR1(uint32_t val); async command uint32_t getGPLR1(); async command void setGPLR2(uint32_t val); async command uint32_t getGPLR2(); async command void setGPLR3(uint32_t val); async command uint32_t getGPLR3(); async command void setGPDR0(uint32_t val); async command uint32_t getGPDR0(); async command void setGPDR1(uint32_t val); async command uint32_t getGPDR1(); async command void setGPDR2(uint32_t val); async command uint32_t getGPDR2(); async command void setGPDR3(uint32_t val); async command uint32_t getGPDR3(); async command void setGPSR0(uint32_t val); async command uint32_t getGPSR0(); async command void setGPSR1(uint32_t val); async command uint32_t getGPSR1(); async command void setGPSR2(uint32_t val); async command uint32_t getGPSR2(); async command void setGPSR3(uint32_t val); async command uint32_t getGPSR3(); async command void setGPCR0(uint32_t val); async command uint32_t getGPCR0(); async command void setGPCR1(uint32_t val); async command uint32_t getGPCR1(); async command void setGPCR2(uint32_t val); async command uint32_t getGPCR2(); async command void setGPCR3(uint32_t val); async command uint32_t getGPCR3(); async command void setGRER0(uint32_t val); async command uint32_t getGRER0(); async command void setGRER1(uint32_t val); async command uint32_t getGRER1(); async command void setGRER2(uint32_t val); async command uint32_t getGRER2(); async command void setGRER3(uint32_t val); async command uint32_t getGRER3(); async command void setGFER0(uint32_t val); async command uint32_t getGFER0(); async command void setGFER1(uint32_t val); async command uint32_t getGFER1(); async command void setGFER2(uint32_t val); async command uint32_t getGFER2(); async command void setGFER3(uint32_t val); async command uint32_t getGFER3(); async command void setGEDR0(uint32_t val); async command uint32_t getGEDR0(); async command void setGEDR1(uint32_t val); async command uint32_t getGEDR1(); async command void setGEDR2(uint32_t val); async command uint32_t getGEDR2(); async command void setGEDR3(uint32_t val); async command uint32_t getGEDR3(); async command void setGAFR0_L(uint32_t val); async command uint32_t getGAFR0_L(); async command void setGAFR0_U(uint32_t val); async command uint32_t getGAFR0_U(); async command void setGAFR1_L(uint32_t val); async command uint32_t getGAFR1_L(); async command void setGAFR1_U(uint32_t val); async command uint32_t getGAFR1_U(); async command void setGAFR2_L(uint32_t val); async command uint32_t getGAFR2_L(); async command void setGAFR2_U(uint32_t val); async command uint32_t getGAFR2_U(); async command void setGAFR3_L(uint32_t val); async command uint32_t getGAFR3_L(); async command void setGAFR3_U(uint32_t val); async command uint32_t getGAFR3_U(); async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HplPXA27xGPIOC.nc000066400000000000000000000041511207233610700225250ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ configuration HplPXA27xGPIOC { provides { interface HplPXA27xGPIOPin[uint8_t pin]; interface HplPXA27xGPIO; } } implementation { components HplPXA27xGPIOM; components HplPXA27xInterruptM; components PlatformP; HplPXA27xGPIOPin = HplPXA27xGPIOM; HplPXA27xGPIO = HplPXA27xGPIOM; HplPXA27xGPIOM.Init <- PlatformP.InitL1; HplPXA27xGPIOM.GPIOIrq0 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_0]; HplPXA27xGPIOM.GPIOIrq1 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_1]; HplPXA27xGPIOM.GPIOIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_X]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HplPXA27xGPIOM.nc000066400000000000000000000255531207233610700225500ustar00rootroot00000000000000// $Id: HplPXA27xGPIOM.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ //@author Phil Buonadonna module HplPXA27xGPIOM { provides { interface Init; interface HplPXA27xGPIOPin[uint8_t pin]; interface HplPXA27xGPIO; } uses { interface HplPXA27xInterrupt as GPIOIrq0; interface HplPXA27xInterrupt as GPIOIrq1; interface HplPXA27xInterrupt as GPIOIrq; // GPIO 2 - 120 only } } implementation { bool gfInitialized = FALSE; command error_t Init.init() { bool isInited; atomic { isInited = gfInitialized; gfInitialized = TRUE; } if (!isInited) { call GPIOIrq0.allocate(); call GPIOIrq1.allocate(); call GPIOIrq.allocate(); call GPIOIrq0.enable(); call GPIOIrq1.enable(); call GPIOIrq.enable(); } return SUCCESS; } async command bool HplPXA27xGPIOPin.getGPLRbit[uint8_t pin]() { return ((GPLR(pin) & _GPIO_bit(pin)) != 0); } async command void HplPXA27xGPIOPin.setGPDRbit[uint8_t pin](bool dir) { if (dir) { GPDR(pin) |= _GPIO_bit(pin); } else { GPDR(pin) &= ~(_GPIO_bit(pin)); } return; } async command bool HplPXA27xGPIOPin.getGPDRbit[uint8_t pin]() { return ((GPDR(pin) & _GPIO_bit(pin)) != 0); } async command void HplPXA27xGPIOPin.setGPSRbit[uint8_t pin]() { GPSR(pin) = _GPIO_bit(pin); return; } async command void HplPXA27xGPIOPin.setGPCRbit[uint8_t pin]() { GPCR(pin) = _GPIO_bit(pin); return; } async command void HplPXA27xGPIOPin.setGRERbit[uint8_t pin](bool flag) { if (flag) { GRER(pin) |= _GPIO_bit(pin); } else { GRER(pin) &= ~(_GPIO_bit(pin)); } return; } async command bool HplPXA27xGPIOPin.getGRERbit[uint8_t pin]() { return ((GRER(pin) & _GPIO_bit(pin)) != 0); } async command void HplPXA27xGPIOPin.setGFERbit[uint8_t pin](bool flag) { if (flag) { GFER(pin) |= _GPIO_bit(pin); } else { GFER(pin) &= ~(_GPIO_bit(pin)); } return; } async command bool HplPXA27xGPIOPin.getGFERbit[uint8_t pin]() { return ((GFER(pin) & _GPIO_bit(pin)) != 0); } async command bool HplPXA27xGPIOPin.getGEDRbit[uint8_t pin]() { return ((GEDR(pin) & _GPIO_bit(pin)) != 0); } async command bool HplPXA27xGPIOPin.clearGEDRbit[uint8_t pin]() { bool flag; flag = ((GEDR(pin) & _GPIO_bit(pin)) != 0); GEDR(pin) = _GPIO_bit(pin); return flag; } async command void HplPXA27xGPIOPin.setGAFRpin[uint8_t pin](uint8_t func) { func &= 0x3; _GPIO_setaltfn(pin,func); return; } async command uint8_t HplPXA27xGPIOPin.getGAFRpin[uint8_t pin]() { return (_GPIO_getaltfun(pin)); } default async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]() { call HplPXA27xGPIOPin.clearGEDRbit[pin](); return; } async command void HplPXA27xGPIO.setGPLR0(uint32_t val) {GPLR0 = val;} async command uint32_t HplPXA27xGPIO.getGPLR0() {return GPLR0;} async command void HplPXA27xGPIO.setGPLR1(uint32_t val) {GPLR1 = val;} async command uint32_t HplPXA27xGPIO.getGPLR1() {return GPLR1;} async command void HplPXA27xGPIO.setGPLR2(uint32_t val) {GPLR2 = val;} async command uint32_t HplPXA27xGPIO.getGPLR2() {return GPLR2;} async command void HplPXA27xGPIO.setGPLR3(uint32_t val) {GPLR3 = val;} async command uint32_t HplPXA27xGPIO.getGPLR3() {return GPLR3;} async command void HplPXA27xGPIO.setGPDR0(uint32_t val) {GPDR0 = val;} async command uint32_t HplPXA27xGPIO.getGPDR0() {return GPDR0;} async command void HplPXA27xGPIO.setGPDR1(uint32_t val) {GPDR1 = val;} async command uint32_t HplPXA27xGPIO.getGPDR1() {return GPDR1;} async command void HplPXA27xGPIO.setGPDR2(uint32_t val) {GPDR2 = val;} async command uint32_t HplPXA27xGPIO.getGPDR2() {return GPDR2;} async command void HplPXA27xGPIO.setGPDR3(uint32_t val) {GPDR3 = val;} async command uint32_t HplPXA27xGPIO.getGPDR3() {return GPDR3;} async command void HplPXA27xGPIO.setGPSR0(uint32_t val) {GPSR0 = val;} async command uint32_t HplPXA27xGPIO.getGPSR0() {return GPSR0;} async command void HplPXA27xGPIO.setGPSR1(uint32_t val) {GPSR1 = val;} async command uint32_t HplPXA27xGPIO.getGPSR1() {return GPSR1;} async command void HplPXA27xGPIO.setGPSR2(uint32_t val) {GPSR2 = val;} async command uint32_t HplPXA27xGPIO.getGPSR2() {return GPSR2;} async command void HplPXA27xGPIO.setGPSR3(uint32_t val) {GPSR3 = val;} async command uint32_t HplPXA27xGPIO.getGPSR3() {return GPSR3;} async command void HplPXA27xGPIO.setGPCR0(uint32_t val) {GPCR0 = val;} async command uint32_t HplPXA27xGPIO.getGPCR0() {return GPCR0;} async command void HplPXA27xGPIO.setGPCR1(uint32_t val) {GPCR1 = val;} async command uint32_t HplPXA27xGPIO.getGPCR1() {return GPCR1;} async command void HplPXA27xGPIO.setGPCR2(uint32_t val) {GPCR2 = val;} async command uint32_t HplPXA27xGPIO.getGPCR2() {return GPCR2;} async command void HplPXA27xGPIO.setGPCR3(uint32_t val) {GPCR3 = val;} async command uint32_t HplPXA27xGPIO.getGPCR3() {return GPCR3;} async command void HplPXA27xGPIO.setGRER0(uint32_t val) {GRER0 = val;} async command uint32_t HplPXA27xGPIO.getGRER0() {return GRER0;} async command void HplPXA27xGPIO.setGRER1(uint32_t val) {GRER1 = val;} async command uint32_t HplPXA27xGPIO.getGRER1() {return GRER1;} async command void HplPXA27xGPIO.setGRER2(uint32_t val) {GRER2 = val;} async command uint32_t HplPXA27xGPIO.getGRER2() {return GRER2;} async command void HplPXA27xGPIO.setGRER3(uint32_t val) {GRER3 = val;} async command uint32_t HplPXA27xGPIO.getGRER3() {return GRER3;} async command void HplPXA27xGPIO.setGFER0(uint32_t val) {GFER0 = val;} async command uint32_t HplPXA27xGPIO.getGFER0() {return GFER0;} async command void HplPXA27xGPIO.setGFER1(uint32_t val) {GFER1 = val;} async command uint32_t HplPXA27xGPIO.getGFER1() {return GFER1;} async command void HplPXA27xGPIO.setGFER2(uint32_t val) {GFER2 = val;} async command uint32_t HplPXA27xGPIO.getGFER2() {return GFER2;} async command void HplPXA27xGPIO.setGFER3(uint32_t val) {GFER3 = val;} async command uint32_t HplPXA27xGPIO.getGFER3() {return GFER3;} async command void HplPXA27xGPIO.setGEDR0(uint32_t val) {GEDR0 = val;} async command uint32_t HplPXA27xGPIO.getGEDR0() {return GEDR0;} async command void HplPXA27xGPIO.setGEDR1(uint32_t val) {GEDR1 = val;} async command uint32_t HplPXA27xGPIO.getGEDR1() {return GEDR1;} async command void HplPXA27xGPIO.setGEDR2(uint32_t val) {GEDR2 = val;} async command uint32_t HplPXA27xGPIO.getGEDR2() {return GEDR2;} async command void HplPXA27xGPIO.setGEDR3(uint32_t val) {GEDR3 = val;} async command uint32_t HplPXA27xGPIO.getGEDR3() {return GEDR3;} async command void HplPXA27xGPIO.setGAFR0_L(uint32_t val) {GAFR0_L = val;} async command uint32_t HplPXA27xGPIO.getGAFR0_L() {return GAFR0_L;} async command void HplPXA27xGPIO.setGAFR0_U(uint32_t val) {GAFR0_U = val;} async command uint32_t HplPXA27xGPIO.getGAFR0_U() {return GAFR0_U;} async command void HplPXA27xGPIO.setGAFR1_L(uint32_t val) {GAFR1_L = val;} async command uint32_t HplPXA27xGPIO.getGAFR1_L() {return GAFR1_L;} async command void HplPXA27xGPIO.setGAFR1_U(uint32_t val) {GAFR1_U = val;} async command uint32_t HplPXA27xGPIO.getGAFR1_U() {return GAFR1_U;} async command void HplPXA27xGPIO.setGAFR2_L(uint32_t val) {GAFR2_L = val;} async command uint32_t HplPXA27xGPIO.getGAFR2_L() {return GAFR2_L;} async command void HplPXA27xGPIO.setGAFR2_U(uint32_t val) {GAFR2_U = val;} async command uint32_t HplPXA27xGPIO.getGAFR2_U() {return GAFR2_U;} async command void HplPXA27xGPIO.setGAFR3_L(uint32_t val) {GAFR3_L = val;} async command uint32_t HplPXA27xGPIO.getGAFR3_L() {return GAFR3_L;} async command void HplPXA27xGPIO.setGAFR3_U(uint32_t val) {GAFR3_U = val;} async command uint32_t HplPXA27xGPIO.getGAFR3_U() {return GAFR3_U;} default async event void HplPXA27xGPIO.fired() { return; } async event void GPIOIrq.fired() { uint32_t DetectReg; uint8_t pin; signal HplPXA27xGPIO.fired(); // Mask off GPIO 0 and 1 (handled by direct IRQs) atomic DetectReg = (GEDR0 & ~((1<<1) | (1<<0))); while (DetectReg) { pin = 31 - _pxa27x_clzui(DetectReg); signal HplPXA27xGPIOPin.interruptGPIOPin[pin](); DetectReg &= ~(1 << pin); } atomic DetectReg = GEDR1; while (DetectReg) { pin = 31 - _pxa27x_clzui(DetectReg); signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+32)](); DetectReg &= ~(1 << pin); } atomic DetectReg = GEDR2; while (DetectReg) { pin = 31 - _pxa27x_clzui(DetectReg); signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+64)](); DetectReg &= ~(1 << pin); } atomic DetectReg = GEDR3; while (DetectReg) { pin = 31 - _pxa27x_clzui(DetectReg); signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+96)](); DetectReg &= ~(1 << pin); } return; } async event void GPIOIrq0.fired() { signal HplPXA27xGPIOPin.interruptGPIOPin[0](); } async event void GPIOIrq1.fired() { signal HplPXA27xGPIOPin.interruptGPIOPin[1](); } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/gpio/HplPXA27xGPIOPin.nc000066400000000000000000000111551207233610700230730ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This interface provides a 'per-pin' abstraction for the PXA27x * GPIO system. It is parameterized by the specific GPIO Pin number * of the PXA27x. * * @author Phil Buonadonna */ interface HplPXA27xGPIOPin { /** * Returns the logic state of a GPIO Pin. * * @return bool TRUE if logic '1', FALSE if logic '0' */ async command bool getGPLRbit(); /** * Configures the direction of a GPIO pin. * * @param dir TRUE to configure as an output, FALSE to configure as an input. */ async command void setGPDRbit(bool dir); /** * Get's the current pin direction configuration. * * @return bool TRUE if configured as an output, FALSE if configured * as an input. */ async command bool getGPDRbit(); /** * Sets a GPIO pin configured as an output to a HIGH state. * */ async command void setGPSRbit(); /** * Sets a GPIO pin configured as an output to a LOW state. * */ async command void setGPCRbit(); /** * Enables/Disables events on the rising edge of a GPIO pin * signal. Calls to this function are independent of calls * to 'setFallingEDEnable()' * * @param flag TRUE to enable rising edge detection, FASLE to * disable. * */ async command void setGRERbit(bool flag); /** * Returns the status of rising edge detection. * * @return val TRUE if rising edge detection is enable, FALSE * otherwise. */ async command bool getGRERbit(); /** * Enables/Disables events on the falling edge of a GPIO pin * signal. Calls to this function are independent of calls to * 'setRisingEDEnable()' * * @param flag TRUE to enable falling edge detection, FASLE to * disable. */ async command void setGFERbit(bool flag); /** * Returns the status of falling edge detection. * * @return val TRUE if falling edge detection is enable, FALSE * otherwise. */ async command bool getGFERbit(); /** * Indicates wether an edge detection event is pending for GPIO Pin * * @return val TRUE if an event is pending. */ async command bool getGEDRbit(); /** * Clears the edge detection event status. * * @return val TRUE if there was a pending event prior to clearing, * FALSE otherwise. */ async command bool clearGEDRbit(); /** * Sets the GPIO pin to one of it's alternate peripheral functions. * Refer to the PXA27x Developers Manual for information on available * alternate functions. * * @param func An integer between 0 and 3 indicating the desired * pin alternate function. */ async command void setGAFRpin(uint8_t func); /** * Returns the current alternate function selected for the GPIO pin. * * @return val An integer between 0 and 3 indicated the current * alternate function. */ async command uint8_t getGAFRpin(); /** * The pin edge detection event. Signalled when a rising/falling edge * occurs on the PIN and the respective edge detect enable is set. * The default event DOES NOT clear any pending requests. * */ async event void interruptGPIOPin(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/i2c/000077500000000000000000000000001207233610700175025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterC.nc000066400000000000000000000044371207233610700232270ustar00rootroot00000000000000/* $Id: HalPXA27xI2CMasterC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This Hal module implements the TinyOS 2.0 I2CPacket interface over * the PXA27x I2C Hpl * * @author Phil Buonadonna */ #include generic configuration HalPXA27xI2CMasterC(bool fast_mode) { provides interface I2CPacket; uses interface HplPXA27xGPIOPin as I2CSCL; uses interface HplPXA27xGPIOPin as I2CSDA; } implementation { components new HalPXA27xI2CMasterP(fast_mode); components HplPXA27xI2CC; components PlatformP; I2CPacket = HalPXA27xI2CMasterP; HalPXA27xI2CMasterP.Init <- PlatformP.InitL2; HalPXA27xI2CMasterP.I2C -> HplPXA27xI2CC.I2C; I2CSCL = HalPXA27xI2CMasterP.I2CSCL; I2CSDA = HalPXA27xI2CMasterP.I2CSDA; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterP.nc000066400000000000000000000210371207233610700232370ustar00rootroot00000000000000/* $Id: HalPXA27xI2CMasterP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This Hal module implements the TinyOS 2.0 I2CPacket interface over * the PXA27x I2C Hpl * * @author Phil Buonadonna */ #include generic module HalPXA27xI2CMasterP(bool fast_mode) { provides interface Init; provides interface I2CPacket; uses interface HplPXA27xI2C as I2C; uses interface HplPXA27xGPIOPin as I2CSCL; uses interface HplPXA27xGPIOPin as I2CSDA; } implementation { // These states don't necessarily reflect the state of the I2C bus, rather the state of this // module WRT an operation. I.E. the module might be in STATE_IDLE, but the I2C bus still // held by the master for a continued read. enum { I2C_STATE_IDLE, I2C_STATE_READSTART, I2C_STATE_READ, I2C_STATE_READEND, I2C_STATE_WRITE, I2C_STATE_WRITEEND, I2C_STATE_ERROR }; uint8_t mI2CState; uint16_t mCurTargetAddr; uint8_t *mCurBuf, mCurBufLen, mCurBufIndex; i2c_flags_t mCurFlags; uint32_t mBaseICRFlags; static void readNextByte() { if (mCurBufIndex >= (mCurBufLen - 1)) { atomic { mI2CState = I2C_STATE_READEND; } if (mCurFlags & I2C_STOP) { call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_ACKNAK | ICR_TB | ICR_STOP)); } else if (mCurFlags & I2C_ACK_END) { call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_TB)); } else { call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_ACKNAK | ICR_TB)); } } else { atomic { mI2CState = I2C_STATE_READ; } call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_TB)); } return; } static void writeNextByte() { if (mCurBufIndex >= mCurBufLen) { atomic { mI2CState = I2C_STATE_WRITEEND; } if (mCurFlags & I2C_STOP) { call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_TB | ICR_ITEIE | ICR_STOP)); } else { call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_ITEIE | ICR_TB)); } } else { call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_ITEIE |ICR_TB)); } return; } static error_t startI2CTransact(uint8_t nextState, uint16_t addr, uint8_t length, uint8_t *data, i2c_flags_t flags, bool bRnW) { error_t error = SUCCESS; uint8_t tmpAddr; if ((data == NULL) || (length == 0)) { return EINVAL; } atomic { if (mI2CState == I2C_STATE_IDLE) { mI2CState = nextState; mCurTargetAddr = addr; mCurBuf = data; mCurBufLen = length; mCurBufIndex = 0; mCurFlags = flags; } else { error = EBUSY; } } if (error) { return error; } if (flags & I2C_START) { tmpAddr = (bRnW) ? 0x1 : 0x0; tmpAddr |= ((addr << 1) & 0xFE); call I2C.setIDBR(tmpAddr); call I2C.setICR( mBaseICRFlags | ICR_ITEIE | ICR_TB | ICR_START); } else if (bRnW) { atomic { readNextByte(); } } else { atomic { writeNextByte(); } } return error; } task void handleReadError() { call I2C.setISAR(0x7F0); call I2C.setICR(mBaseICRFlags | ICR_MA); call I2C.setICR(ICR_UR); call I2C.setICR(mBaseICRFlags); atomic { mI2CState = I2C_STATE_IDLE; signal I2CPacket.readDone(FAIL,mCurTargetAddr,mCurBufLen,mCurBuf); } return; } task void handleWriteError() { call I2C.setISAR(0x7F0); call I2C.setICR(mBaseICRFlags | ICR_MA); call I2C.setICR(ICR_UR); call I2C.setICR(mBaseICRFlags); atomic { mI2CState = I2C_STATE_IDLE; signal I2CPacket.writeDone(FAIL,mCurTargetAddr,mCurBufLen,mCurBuf); } return; } command error_t Init.init() { atomic { mBaseICRFlags = (fast_mode) ? (ICR_FM | ICR_BEIE | ICR_IUE | ICR_SCLE) : (ICR_BEIE | ICR_IUE | ICR_SCLE); call I2CSCL.setGAFRpin(I2C_SCL_ALTFN); call I2CSCL.setGPDRbit(TRUE); call I2CSDA.setGAFRpin(I2C_SDA_ALTFN); call I2CSDA.setGPDRbit(TRUE); mI2CState = I2C_STATE_IDLE; call I2C.setISAR(0); call I2C.setICR(mBaseICRFlags | ICR_ITEIE | ICR_DRFIE); } return SUCCESS; } async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { error_t error = SUCCESS; if ((flags & I2C_ACK_END) && (flags & I2C_STOP)) { error = EINVAL; return error; } if (flags & I2C_START) { error = startI2CTransact(I2C_STATE_READSTART,addr,length,data,flags,TRUE); } else { error = startI2CTransact(I2C_STATE_READ,addr,length,data,flags,TRUE); } return error; } async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) { error_t error = SUCCESS; error = startI2CTransact(I2C_STATE_WRITE,addr,length,data,flags,FALSE); return error; } async event void I2C.interruptI2C() { uint32_t valISR; // PXA27x Devel Guide is wrong. You have to write to the ISR to clear the bits. valISR = call I2C.getISR(); call I2C.setISR(ISR_ITE | ISR_IRF); // turn off DRFIE and ITEIE //call I2C.setICR((call I2C.getICR()) & ~(ICR_DRFIE | ICR_ITEIE)); //call I2C.setICR(mBaseICRFlags); switch (mI2CState) { case I2C_STATE_IDLE: // Should never get here. Reset all pending interrupts. break; case I2C_STATE_READSTART: if (valISR & (ISR_BED | ISR_ALD)) { mI2CState = I2C_STATE_ERROR; post handleReadError(); break; } readNextByte(); break; case I2C_STATE_READ: if (valISR & (ISR_BED | ISR_ALD)) { mI2CState = I2C_STATE_ERROR; post handleReadError(); break; } mCurBuf[mCurBufIndex] = call I2C.getIDBR(); mCurBufIndex++; readNextByte(); break; case I2C_STATE_READEND: if (valISR & (ISR_BED | ISR_ALD)) { mI2CState = I2C_STATE_ERROR; post handleReadError(); break; } mCurBuf[mCurBufIndex] = call I2C.getIDBR(); mI2CState = I2C_STATE_IDLE; signal I2CPacket.readDone(SUCCESS,mCurTargetAddr,mCurBufLen,mCurBuf); break; case I2C_STATE_WRITE: if (valISR & (ISR_BED | ISR_ALD)) { mI2CState = I2C_STATE_ERROR; post handleWriteError(); break; } call I2C.setIDBR(mCurBuf[mCurBufIndex]); mCurBufIndex++; writeNextByte(); break; case I2C_STATE_WRITEEND: if (valISR & (ISR_BED | ISR_ALD)) { mI2CState = I2C_STATE_ERROR; post handleWriteError(); break; } mI2CState= I2C_STATE_IDLE; //call I2C.setICR(call I2C.getICR() & ~I2C_STOP); call I2C.setICR(mBaseICRFlags); signal I2CPacket.writeDone(SUCCESS,mCurTargetAddr,mCurBufLen,mCurBuf); break; default: break; } return; } default async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { return; } default async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { return; } async event void I2CSDA.interruptGPIOPin() {} async event void I2CSCL.interruptGPIOPin() {} } tinyos-2.1.2+dfsg/tos/chips/pxa27x/i2c/HplPXA27xI2C.nc000066400000000000000000000041341207233610700217610ustar00rootroot00000000000000/* $Id: HplPXA27xI2C.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * The PXA27x I2C HPL interface. * * @author Phil Buonadonna */ interface HplPXA27xI2C { async command uint32_t getIBMR(); async command void setIDBR(uint32_t val); async command uint32_t getIDBR(); async command void setICR(uint32_t val); async command uint32_t getICR(); async command void setISR(uint32_t val); async command uint32_t getISR(); async command void setISAR(uint32_t val); async command uint32_t getISAR(); async event void interruptI2C(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/i2c/HplPXA27xI2CC.nc000066400000000000000000000037251207233610700220710ustar00rootroot00000000000000/* $Id: HplPXA27xI2CC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadona */ configuration HplPXA27xI2CC { provides interface HplPXA27xI2C as I2C; } implementation { components new HplPXA27xI2CP(0); components HplPXA27xInterruptM; components PlatformP; I2C = HplPXA27xI2CP; HplPXA27xI2CP.Init <- PlatformP.InitL1; HplPXA27xI2CP.I2CIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_I2C]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/i2c/HplPXA27xI2CP.nc000066400000000000000000000077731207233610700221150ustar00rootroot00000000000000/* $Id: HplPXA27xI2CP.nc,v 1.6 2008-09-08 03:10:23 regehr Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * The Private Hpl Interface for the I2C components. Handles enabling of the * clock for the interface. It DOES NOT affect the I2C_IUE bit of the ICR * register. * * @param dev The I2C to use. 0 = Standard I2c, 1 = Power I2C * * @author Phil Buonadonna */ generic module HplPXA27xI2CP(uint8_t dev) { provides interface Init; provides interface HplPXA27xI2C as I2C; uses interface HplPXA27xInterrupt as I2CIrq; } implementation { bool m_fInit = FALSE; command error_t Init.init() { bool isInited; atomic { isInited = m_fInit; m_fInit = TRUE; } if (!isInited) { switch(dev) { case 0: CKEN |= CKEN14_I2C; ICR = 0; break; case 1: CKEN |= CKEN15_PMI2C; PICR = 0; break; default: break; } call I2CIrq.allocate(); call I2CIrq.enable(); } return SUCCESS; } async command uint32_t I2C.getIBMR() { switch(dev) { case 0: return IBMR; break; case 1: return PIBMR; break; default: return 0; } } async command void I2C.setIDBR(uint32_t val) { switch(dev) { case 0: IDBR = val; break; case 1: PIDBR = val; break; default: break; } return; } async command uint32_t I2C.getIDBR() { switch(dev) { case 0: return IDBR; case 1: return PIDBR; default: return 0; } } async command void I2C.setICR(uint32_t val) { switch(dev) { case 0: ICR = val; break; case 1: PICR = val; break; default: break; } return; } async command uint32_t I2C.getICR() { switch(dev) { case 0: return ICR; case 1: return PICR; default: return 0; } } async command void I2C.setISR(uint32_t val) { switch(dev) { case 0: ISR = val; break; case 1: PISR = val; break; default: break; } } async command uint32_t I2C.getISR() { switch(dev) { case 0: return ISR; case 1: return PISR; default: return 0; } } async command void I2C.setISAR(uint32_t val) { switch(dev) { case 0: ISAR = val; break; case 1: PISAR = val; break; default: break; } return; } async command uint32_t I2C.getISAR() { switch(dev) { case 0: return ISAR; break; case 1: return PISAR; break; default: return 0; } } async event void I2CIrq.fired() { signal I2C.interruptI2C(); return; } default async event void I2C.interruptI2C() { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/i2c/HplPXA27xPI2CC.nc000066400000000000000000000036651207233610700222140ustar00rootroot00000000000000/* $Id: HplPXA27xPI2CC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ configuration HplPXA27xPI2CC { provides interface HplPXA27xI2C as I2C; } implementation { components new HplPXA27xI2CP(1); components HplPXA27xInterruptM; components PlatformP; I2C = HplPXA27xI2CP; HplPXA27xI2CP.Init <- PlatformP.InitL1; HplPXA27xI2CP.I2CIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_PWR_I2C]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/inttypes.h000066400000000000000000000005261207233610700210600ustar00rootroot00000000000000#ifndef __INTTYPES_H_ #define __INTTYPES_H_ typedef signed char int8_t; typedef unsigned char uint8_t; typedef short int16_t; typedef unsigned short uint16_t; typedef int int32_t; typedef unsigned int uint32_t; typedef long long int64_t; typedef unsigned long long uint64_t; typedef int32_t intptr_t; typedef uint32_t uintptr_t; #endif tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/000077500000000000000000000000001207233610700174275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/Flash.nc000066400000000000000000000055271207233610700210170ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /** * Interface for writing and erasing in flash memory * * Author: Josh Herbach * Revision: 1.0 * Date: 09/02/2005 */ interface Flash { /** * Writes numBytes of the buffer data to the address in flash specified * by addr. This function will only set bits low for the bytes it is * supposed to write to.If addr connot be written to for any reason returns * FAIL, otherwise returns SUCCESS. * * @returns SUCCESS or FAIL. */ command error_t write(uint32_t addr, uint8_t* data, uint32_t numBytes); /** * Erases the block of flash that contains addr, setting all bits to 1. * If this function fails for any reason it will return FAIL, otherwise * SUCCESS. * * @returns SUCCESS or FAIL. */ command error_t erase(uint32_t addr); /** * Reads len number of bytes into buf, starting at addr. If addr * cannot be read for any reason returns FAIL, otherwise returns * SUCCESS. */ command error_t read(uint32_t addr, uint8_t* buf, uint32_t len); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/FlashC.nc000066400000000000000000000003441207233610700211120ustar00rootroot00000000000000/* * Author: Josh Herbach * Revision: 1.0 * Date: 09/02/2005 */ configuration FlashC { provides interface Flash; } implementation { components Main, FlashM; Main.StdControl -> FlashM; Flash = FlashM; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/HalP30C.nc000066400000000000000000000035251207233610700210500ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * P30 Hal component * * @author Kaisen Lin * @author Phil Buonadonna */ configuration HalP30C { provides interface Flash; } implementation { components HalP30P, HplP30P, MainC; Flash = HalP30P; MainC.SoftwareInit -> HalP30P; HalP30P.HplP30 -> HplP30P; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/HalP30P.nc000066400000000000000000000160731207233610700210670ustar00rootroot00000000000000/* * Author: Josh Herbach * Revision: 1.0 * Date: 09/02/2005 */ module HalP30P { provides interface Init; provides interface Flash; //does not allow writing into FLASH_PROTECTED_REGION uses interface HplP30; } implementation { #include enum { FLASH_STATE_READ_INACTIVE, FLASH_STATE_PROGRAM, FLASH_STATE_ERASE, FLASH_STATE_READ_ACTIVE }; uint8_t FlashPartitionState[FLASH_PARTITION_COUNT]; uint8_t init = 0, programBufferSupported = 2, currBlock = 0; command error_t Init.init() { int i = 0; if(init != 0) return SUCCESS; init = 1; for(i = 0; i < FLASH_PARTITION_COUNT; i++) FlashPartitionState[i] = FLASH_STATE_READ_INACTIVE; return SUCCESS; } uint16_t writeHelper(uint32_t addr, uint8_t* data, uint32_t numBytes, uint8_t prebyte, uint8_t postbyte){ uint32_t i = 0, j = 0, k = 0; error_t status; uint16_t buffer[FLASH_PROGRAM_BUFFER_SIZE]; if(numBytes == 0) return FAIL; if(addr % 2 == 1){ status = call HplP30.progWord(addr - 1, prebyte | (data[i] << 8)); i++; if(status != SUCCESS) return FAIL; } if(addr % 2 == numBytes % 2){ if(programBufferSupported == 1) for(; i < numBytes; i = k){ for(j = 0, k = i; k < numBytes && j < FLASH_PROGRAM_BUFFER_SIZE; j++, k+=2) buffer[j] = data[k] | (data[k + 1] << 8); status = call HplP30.progBuffer(addr + i, buffer, j); if(status != SUCCESS) return FAIL; } else for(; i < numBytes; i+=2){ status = call HplP30.progWord(addr + i, (data[i + 1] << 8) | data[i]); if(status != SUCCESS) return FAIL; } } else{ if(programBufferSupported == 1) for(; i < numBytes - 1; i = k){ for(j = 0, k = i; k < numBytes - 1 && j < FLASH_PROGRAM_BUFFER_SIZE; j++, k+=2) buffer[j] = data[k] | (data[k + 1] << 8); status = call HplP30.progBuffer(addr + i, buffer, j); if(status != SUCCESS) return FAIL; } else for(; i < numBytes - 1; i+=2){ status = call HplP30.progWord(addr + i, (data[i + 1] << 8) | data[i]); if(status != SUCCESS) return FAIL; } status = call HplP30.progWord(addr + i, data[i] | (postbyte << 8)); if(status != SUCCESS) return FAIL; } return SUCCESS; } void writeExitHelper(uint32_t addr, uint32_t numBytes){ uint32_t i = 0; for(i = addr / FLASH_PARTITION_SIZE; i < (numBytes + addr) / FLASH_PARTITION_SIZE; i++) FlashPartitionState[i] = FLASH_STATE_READ_INACTIVE; } command error_t Flash.write(uint32_t addr, uint8_t* data, uint32_t numBytes) { uint32_t i; uint16_t status; uint8_t blocklen; uint32_t blockAddr = (addr / P30_BLOCK_SIZE) * P30_BLOCK_SIZE; if(addr + numBytes > 0x02000000) //not in the flash memory space return FAIL; if(addr < FLASH_PROTECTED_REGION) return FAIL; for(i = 0; i < FLASH_PARTITION_COUNT; i++) if(i != addr / FLASH_PARTITION_SIZE && FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE && FlashPartitionState[i] != FLASH_STATE_READ_ACTIVE) return FAIL; for(i = addr / FLASH_PARTITION_SIZE; i < (numBytes + addr) / FLASH_PARTITION_SIZE; i++) if(FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE) return FAIL; for(i = addr / FLASH_PARTITION_SIZE; i < (numBytes + addr) / FLASH_PARTITION_SIZE; i++) FlashPartitionState[i] = FLASH_STATE_PROGRAM; atomic{ for(blocklen = 0, i = blockAddr; i < addr + numBytes; i += P30_BLOCK_SIZE, blocklen++) call HplP30.blkUnlock(i); //unlock(i); if(programBufferSupported == 2){ uint16_t testBuf[1]; if(addr % 2 == 0){ testBuf[0] = data[0] | ((*((uint8_t *)(addr + 1))) << 8); status = call HplP30.progBuffer(addr, testBuf, 1); } else{ testBuf[0] = *((uint8_t *)(addr - 1)) | (data[0] << 8); status = call HplP30.progBuffer(addr - 1, testBuf, 1); } if(status != SUCCESS) programBufferSupported = 0; else programBufferSupported = 1; } } if(blocklen == 1){ atomic status = writeHelper(addr,data,numBytes,0xFF,0xFF); if(status == FAIL){ writeExitHelper(addr, numBytes); return FAIL; } } else{ uint32_t bytesLeft = numBytes; atomic status = writeHelper(addr,data, blockAddr + P30_BLOCK_SIZE - addr,0xFF,0xFF); if(status == FAIL){ writeExitHelper(addr, numBytes); return FAIL; } bytesLeft = numBytes - (P30_BLOCK_SIZE - (addr - blockAddr)); for(i = 1; i < blocklen - 1; i++){ atomic status = writeHelper(blockAddr + i * P30_BLOCK_SIZE, (uint8_t *)(data + numBytes - bytesLeft), P30_BLOCK_SIZE,0xFF,0xFF); bytesLeft -= P30_BLOCK_SIZE; if(status == FAIL){ writeExitHelper(addr, numBytes); return FAIL; } } atomic status = writeHelper(blockAddr + i * P30_BLOCK_SIZE, data + (numBytes - bytesLeft), bytesLeft, 0xFF,0xFF); if(status == FAIL){ writeExitHelper(addr, numBytes); return FAIL; } } writeExitHelper(addr, numBytes); return SUCCESS; } command error_t Flash.erase(uint32_t addr){ uint16_t status, i; uint32_t j; if(addr > 0x02000000) //not in the flash memory space return FAIL; if(addr < FLASH_PROTECTED_REGION) return FAIL; addr = (addr / P30_BLOCK_SIZE) * P30_BLOCK_SIZE; for(i = 0; i < FLASH_PARTITION_COUNT; i++) if(i != addr / FLASH_PARTITION_SIZE && FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE && FlashPartitionState[i] != FLASH_STATE_READ_ACTIVE) return FAIL; if(FlashPartitionState[addr / FLASH_PARTITION_SIZE] != FLASH_STATE_READ_INACTIVE) return FAIL; FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_ERASE; for(j = 0; j < P30_BLOCK_SIZE; j++){ uint32_t tempCheck = *(uint32_t *)(addr + j); if(tempCheck != 0xFFFFFFFF) break; if(j == P30_BLOCK_SIZE - 1){ FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_READ_INACTIVE; return SUCCESS; } } atomic{ call HplP30.blkUnlock(addr); // status = eraseFlash(addr); status = call HplP30.blkErase(addr); } FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_READ_INACTIVE; if(status != SUCCESS) return FAIL; return SUCCESS; } // WARNING: Check the endien of this command error_t Flash.read(uint32_t addr, uint8_t* buf, uint32_t len) { error_t status; uint8_t databyte; /* uint16_t dataword; while(len > 1) { atomic { status = call HplP30.readWordBurst(addr, &dataword); } if(status != SUCCESS) return FAIL; *((uint16_t*) buf) = dataword; addr += 2; buf += 2; len -= 2; } if(len == 1) { atomic { status = call HplP30.readWordBurst(addr, &dataword); } if(status != SUCCESS) return FAIL; *buf = (uint8_t) dataword; } */ while(len > 0) { atomic { status = call HplP30.readByteBurst(addr, &databyte); } if(status != SUCCESS) return FAIL; *buf = databyte; addr += 1; buf += 1; len -= 1; } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/HplP30.nc000066400000000000000000000041311207233610700207560ustar00rootroot00000000000000/* $Id: HplP30.nc,v 1.4 2006-12-12 18:23:12 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna */ interface HplP30 { async command error_t progWord(uint32_t addr, uint16_t word); async command error_t progBuffer(uint32_t addr, uint16_t *data, uint8_t len); async command error_t blkErase(uint32_t blkaddr); async command error_t blkLock(uint32_t blkaddr); async command error_t blkUnlock(uint32_t blkaddr); async command error_t readByteBurst(uint32_t addr, uint8_t* bytex); async command error_t readWordBurst(uint32_t addr, uint16_t* word); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/HplP30P.nc000066400000000000000000000112131207233610700210750ustar00rootroot00000000000000/* $Id: HplP30P.nc,v 1.4 2006-12-12 18:23:12 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ #include module HplP30P { provides interface HplP30; } implementation { volatile uint16_t * devBaseAddress = (uint16_t *)(0x0); async command error_t HplP30.progWord(uint32_t addr, uint16_t word) { volatile uint16_t *blkAddress = (uint16_t *)addr; uint32_t result; *devBaseAddress = P30_READ_CLRSTATUS; *blkAddress = P30_WRITE_WORDPRGSETUP; *blkAddress = word; do { result = *blkAddress; } while ((result & P30_SR_DWS) == 0); *blkAddress = P30_READ_READARRAY; if (result & (P30_SR_PS | P30_SR_VPPS | P30_SR_BLS)) { return FAIL; } return SUCCESS; } async command error_t HplP30.progBuffer(uint32_t addr, uint16_t *data, uint8_t len) { volatile uint16_t *blkAddress = (uint16_t *)addr; uint32_t i,result; error_t error = SUCCESS; if (len <= 0) { error = EINVAL; goto done; } *devBaseAddress = P30_READ_CLRSTATUS; *blkAddress = P30_WRITE_BUFPRG; result = *blkAddress; if ((result & P30_SR_DWS) == 0) { error = FAIL; goto cleanup; } *blkAddress = len-1; for (i=0;i HalP30C; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/P30BlockP.nc000066400000000000000000000137021207233610700214110ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ #include #include module P30BlockP { provides interface BlockRead as Read[ storage_volume_t block ]; provides interface BlockWrite as Write[ storage_volume_t block ]; uses interface Leds; uses interface Flash; } implementation { typedef enum { S_IDLE, S_READ, S_WRITE, S_ERASE, S_CRC, S_SYNC, } p30_block_state_t; norace p30_block_state_t m_state = S_IDLE; storage_volume_t clientId = 0xff; storage_addr_t clientAddr; void* clientBuf; storage_len_t clientLen; error_t clientResult; /* * This is a helper function to translate from the client address * space to the underlying HalP30 address space. This is necessary * because HAL provides a flat 32MB interface. */ uint32_t xlateAddr(storage_volume_t b, storage_addr_t addr) { return P30_VMAP[b].base * FLASH_PARTITION_SIZE + addr; } task void signalDoneTask() { switch(m_state) { case S_WRITE: m_state = S_IDLE; signal Write.writeDone[clientId](clientAddr, clientBuf, clientLen, clientResult); break; case S_SYNC: m_state = S_IDLE; signal Write.syncDone[clientId](SUCCESS); break; case S_ERASE: m_state = S_IDLE; signal Write.eraseDone[clientId](clientResult); break; case S_READ: m_state = S_IDLE; signal Read.readDone[clientId](clientAddr, clientBuf, clientLen, clientResult); break; default: break; } } /* * Translate the address to a physical flash address and do the * write. */ command error_t Write.write[ storage_volume_t b ]( storage_addr_t addr, void* buf, storage_len_t len ) { uint32_t physAddr; if(m_state != S_IDLE) return EBUSY; // error check if(addr + len > P30_VMAP[b].size * FLASH_PARTITION_SIZE) return EINVAL; clientId = b; clientAddr = addr; clientBuf = buf; clientLen = len; m_state = S_WRITE; physAddr = xlateAddr(b, addr); clientResult = call Flash.write(physAddr, (uint8_t*) buf, len); post signalDoneTask(); return SUCCESS; } /* * Sync doesn't really do anything because Intel PXA is * write-through. */ command error_t Write.sync[ storage_volume_t b ]() { m_state = S_SYNC; clientId = b; post signalDoneTask(); return SUCCESS; } /* * Because each 2MB partition is divided into 128k erasable pieces, * we must go through and erase all of them. */ command error_t Write.erase[ storage_volume_t b ]() { uint32_t physAddr; uint32_t blocks; if(m_state != S_IDLE) return EBUSY; clientId = b; m_state = S_ERASE; physAddr = xlateAddr(b,0); for(blocks = ((P30_VMAP[b].size)*FLASH_PARTITION_SIZE)/P30_BLOCK_SIZE; blocks > 0; blocks--) { clientResult = call Flash.erase(physAddr); if(clientResult != SUCCESS) break; physAddr += P30_BLOCK_SIZE; } post signalDoneTask(); return SUCCESS; } /* * Translate the address to a physical flash address and do the * read. */ command error_t Read.read[ storage_volume_t b ]( storage_addr_t addr, void* buf, storage_len_t len ) { uint32_t physAddr; if(m_state != S_IDLE) return FAIL; clientId = b; clientAddr = addr; clientBuf = buf; clientLen = len; m_state = S_READ; physAddr = xlateAddr(b,addr); call Flash.read((uint32_t) physAddr, (uint8_t*) buf, (uint32_t) len); post signalDoneTask(); return SUCCESS; } command error_t Read.computeCrc[ storage_volume_t b ]( storage_addr_t addr, storage_len_t len, uint16_t crc) { m_state = S_CRC; clientId = b; post signalDoneTask(); return SUCCESS; } command storage_len_t Read.getSize[ storage_volume_t b]() { return P30_VMAP[b].size * FLASH_PARTITION_SIZE; } default event void Write.writeDone[ storage_volume_t b ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {} default event void Write.eraseDone[ storage_volume_t b ]( error_t error ) {} default event void Write.syncDone[ storage_volume_t b ]( error_t error ) {} default event void Read.readDone[ storage_volume_t b ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {} default event void Read.computeCrcDone[ storage_volume_t b ]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error ) {} } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/P30ConfigC.nc000066400000000000000000000036441207233610700215530ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ configuration P30ConfigC { provides interface ConfigStorage[ storage_volume_t volume ]; provides interface Mount[ storage_volume_t volume ]; } implementation { components P30ConfigP, MainC; ConfigStorage = P30ConfigP.Config; Mount = P30ConfigP.Mount; components HalP30C; P30ConfigP.Flash -> HalP30C; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/P30ConfigP.nc000066400000000000000000000234231207233610700215650ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ #include #include module P30ConfigP { provides interface ConfigStorage as Config[ storage_volume_t v ]; provides interface Mount[ storage_volume_t v ]; uses interface Flash; uses interface Leds; } implementation { /* * These are some macros for convenience. Essentially it is cutting * a 2MB chunk into a two pieces. The size of the two pieces is * hardcoded by C_PARTITION_sIZE. It must be a multiple of * P30_BLOCK_SIZE because that is the erasable size. The bigger you * make the C_PARTITION_SIZE, the longer commits will take because * it must erase all the blocks inside. On the other hand, a larger * C_PARTITION_SIZE will give you a larger address space. v is the * parameterized interface that is used in the context of these * macros. */ #define C_PARTITION_SIZE (P30_BLOCK_SIZE*1) #define C_PARTITION_0 (P30_VMAP[v].base * FLASH_PARTITION_SIZE) #define C_PARTITION_1 (P30_VMAP[v].base * FLASH_PARTITION_SIZE + C_PARTITION_SIZE) typedef uint32_t version_t; enum { /* * WARNING: AT45DB has a RAM buffer that allows writes to occur * without actually writing to flash. We simulate this because it * makes rewrites a lot simpler. However, this essentially takes * RAM overhead. However, Configstores are relatively small and * the Intel PXA has a lot of main memory, so we do it anyway. */ BUFFER_SIZE = 2048, INVALID_VERSION = 0xFFFFFFFF, NUM_VOLS = _V_NUMVOLS_, //uniqueCount( "pxa27xp30.Volume" ), }; typedef enum { S_IDLE, S_MOUNT, S_READ, S_WRITE, S_COMMIT, } p30_config_state_t; norace p30_config_state_t m_state = S_IDLE; /* * Each instantiation of a Configstore must keep certain state. This * includes the current version of the page and the active address * within that page since we are splitting it into two pieces. Each * Configstore must also have its own RAM buffer for concurrent * operations. */ uint32_t currentVersion[NUM_VOLS]; uint32_t activeBaseAddr[NUM_VOLS]; uint8_t workBuf[BUFFER_SIZE*NUM_VOLS]; storage_volume_t clientId = 0xff; storage_addr_t clientAddr; void* clientBuf; storage_len_t clientLen; error_t clientResult; task void signalDoneTask() { switch(m_state) { case S_MOUNT: m_state = S_IDLE; signal Mount.mountDone[clientId](clientResult); break; case S_WRITE: m_state = S_IDLE; signal Config.writeDone[clientId](clientAddr, clientBuf, clientLen, clientResult); break; case S_COMMIT: m_state = S_IDLE; signal Config.commitDone[clientId](SUCCESS); break; case S_READ: m_state = S_IDLE; signal Config.readDone[clientId](clientAddr, clientBuf, clientLen, clientResult); break; default: break; } } /* * Erase a config partition. It may be more than one P30 block size, * so erase multiple times. */ void eraseConfigPartition(uint32_t base) { uint32_t blocks; for(blocks = C_PARTITION_SIZE / P30_BLOCK_SIZE; blocks > 0; blocks--) { call Flash.erase(base); base += P30_BLOCK_SIZE; } } /* * Read the data directly from the RAM buffer into the client * buffer... Might be read from Flash depending on semantics */ command error_t Config.read[storage_volume_t v](storage_addr_t addr, void* buf, storage_len_t len) { uint32_t i; clientId = v; clientAddr = addr; clientBuf = buf; clientLen = len; m_state = S_READ; /* for(i = addr; i < addr + len; i++) { ((uint8_t*)buf)[i-addr] = workBuf[(v*BUFFER_SIZE)+i]; } */ call Flash.read(activeBaseAddr[v] + addr, (uint8_t*) buf, len); post signalDoneTask(); return SUCCESS; } /* * Writes the client data into the given address in the RAM * buffer. Data is not actually written to flash until the user * commits. */ command error_t Config.write[storage_volume_t v](storage_addr_t addr, void* buf, storage_len_t len) { uint32_t i; clientId = v; clientAddr = addr; clientBuf = buf; clientLen = len; // error check if(addr + len > BUFFER_SIZE) return FAIL; // out of my artificial bounds m_state = S_WRITE; for(i = addr; i < addr + len; i++) workBuf[(v*BUFFER_SIZE)+i] = ((uint8_t*)buf)[i-addr]; clientResult = SUCCESS; post signalDoneTask(); return SUCCESS; } /* * Determine which partition to write to based on the current one * that is active. Also update the version number. Version numbers * are 0, 1, 2, or 3 and wraps around. Write the RAM buffer out * first BEFORE writing the the new version number. After the * version number is written, the active config is now atomically * switched. Then update any other in memory metadata. */ command error_t Config.commit[storage_volume_t v]() { uint32_t destBaseAddr; if(activeBaseAddr[v] == C_PARTITION_0) destBaseAddr = C_PARTITION_1; else destBaseAddr = C_PARTITION_0; m_state = S_COMMIT; clientId = v; clientResult = SUCCESS; currentVersion[v] = (currentVersion[v] + 1) % 4; // erase target flash area before writing to it eraseConfigPartition(destBaseAddr); // write RAM buffer out call Flash.write(destBaseAddr, (uint8_t*) &workBuf[v*BUFFER_SIZE], BUFFER_SIZE); call Flash.write(destBaseAddr + C_PARTITION_SIZE - sizeof(version_t), (uint8_t*) ¤tVersion[v], sizeof(version_t)); activeBaseAddr[v] = destBaseAddr; post signalDoneTask(); return SUCCESS; } /* * The only metadata that needs to be saved is a version * number. Thus you get the whole partition minus the version number * in terms of space. */ command storage_len_t Config.getSize[storage_volume_t v]() { return C_PARTITION_SIZE - sizeof(version_t); } command bool Config.valid[storage_volume_t v]() { return TRUE; } /* * When a Configstore is mounted, it must do some initial * book-keeping work. It first reads from the two pieces two * determine, which one is the actual active one. Afterwards, we * read from flash into the RAM buffer or else subsequent reads will * not work. */ command error_t Mount.mount[storage_volume_t v]() { version_t v0; version_t v1; m_state = S_MOUNT; clientResult = SUCCESS; clientId = v; currentVersion[v] = INVALID_VERSION; // read version #s from both sectors and determine new one // pick among 0 1 2 3 FFFF call Flash.read(C_PARTITION_0 + C_PARTITION_SIZE - sizeof(version_t), (uint8_t*)&v0, sizeof(version_t)); call Flash.read(C_PARTITION_1 + C_PARTITION_SIZE - sizeof(version_t), (uint8_t*)&v1, sizeof(version_t)); // this logic in this could probably be simplified if(v0 == INVALID_VERSION && v1 == INVALID_VERSION) { // clean partition activeBaseAddr[v] = C_PARTITION_0; currentVersion[v] = 0; } else if(v1 == INVALID_VERSION) { // use v0 activeBaseAddr[v] = C_PARTITION_0; currentVersion[v] = v0; } else if(v0 == INVALID_VERSION) { // use v1 activeBaseAddr[v] = C_PARTITION_1; currentVersion[v] = v1; } else if((v0 + 1) % 4 == v1) { // use v1 activeBaseAddr[v] = C_PARTITION_1; currentVersion[v] = v1; } else if((v1 + 1) % 4 == v0) { // use v0 activeBaseAddr[v] = C_PARTITION_0; currentVersion[v] = v0; } else { // corrupted? erase both, might want to improve this later eraseConfigPartition(C_PARTITION_0); eraseConfigPartition(C_PARTITION_1); currentVersion[v] = 0; } // read into RAM buffer call Flash.read(activeBaseAddr[v], (uint8_t*)&workBuf[v*BUFFER_SIZE], BUFFER_SIZE); post signalDoneTask(); return SUCCESS; } default event void Config.readDone[storage_volume_t v](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void Config.writeDone[storage_volume_t v](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void Config.commitDone[storage_volume_t v](error_t error) {} default event void Mount.mountDone[storage_volume_t v](error_t error) {} } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/P30LogC.nc000066400000000000000000000037421207233610700210660ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ configuration P30LogC { provides interface LogWrite as Write[ storage_volume_t volume ]; provides interface LogRead as Read[ storage_volume_t volume ]; uses interface Get as Circular[ storage_volume_t block ]; } implementation { components P30LogP; P30LogP = Write; P30LogP = Read; P30LogP = Circular; components HalP30C; P30LogP.Flash -> HalP30C; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/P30LogCircularP.nc000066400000000000000000000034371207233610700225710ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ generic module P30LogCircularP( bool IS_CIRCULAR ) { provides interface Get as Circular; } implementation { command bool Circular.get() { return IS_CIRCULAR; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/P30LogP.nc000066400000000000000000000444061207233610700211050ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ #include #include module P30LogP { provides interface LogRead as Read[ storage_volume_t block ]; provides interface LogWrite as Write[ storage_volume_t block ]; uses interface Leds; uses interface Flash; uses interface Get as Circular[ storage_volume_t block ]; } implementation { #define SEEK_BEGINNING (0x0) #define SEEK_EOL (0xFFFFFFFF) #define L_BASE_BLOCK(_x) (P30_VMAP[_x].base * FLASH_PARTITION_SIZE) #define L_PARTITIONS(_x) ((P30_VMAP[_x].size * FLASH_PARTITION_SIZE) / P30_BLOCK_SIZE) #define L_FULL_RECORD_SIZE (sizeof(record_data_t) + sizeof(record_meta_t)) #define L_RECORD_DATA_SIZE 256 #define L_MAX_RECORDS_PER_BLOCK (P30_BLOCK_SIZE / L_FULL_RECORD_SIZE) // page meta counts as one record // _a = blockId (from parameterized interface), _b = page, _c = record #define L_RAW_OFFSET(_a,_b,_c) (L_BASE_BLOCK(_a) + (_b * P30_BLOCK_SIZE) + (_c * L_FULL_RECORD_SIZE)) enum { INVALID_VERSION = 0xFFFFFFFF, NUM_VOLS = _V_NUMVOLS_, //uniqueCount("pxa27xp30.Volume"), }; enum { PAGE_START = 0x0000, PAGE_USED = 0xFFF0, PAGE_AVAILABLE = 0xFFFF, }; typedef struct page_meta_t { uint16_t header; } page_meta_t; enum { RECORD_VALID = 0x0000, RECORD_INVALID = 0xFFF0, RECORD_EMPTY = 0xFFFF, }; typedef struct record_meta_t { uint16_t status; uint16_t length; } record_meta_t; typedef struct record_data_t { uint8_t data[L_RECORD_DATA_SIZE]; } record_data_t; typedef enum { S_IDLE, S_READ, S_APPEND, S_SYNC, S_ERASE, S_SEEK, } p30_log_state_t; norace p30_log_state_t m_state = S_IDLE; storage_volume_t clientId = 0xff; void* clientBuf; storage_len_t clientLen; error_t clientResult; uint32_t firstBlock[NUM_VOLS]; // 0-15 for 2 MB uint32_t lastBlock[NUM_VOLS]; // 0-15 for 2 MB uint32_t nextFreeRecord[NUM_VOLS]; // 0-X depending on data size storage_cookie_t readCookieOffset[NUM_VOLS]; // this is a raw offset bool gbOverwriteOccured = FALSE; /* This shuffles all the blocks when we run out of space. We have to * do it in a special order so crash recovery is possible. We also * have to write special bytes so we can rewrite to areas without * doing a complete erase. */ void shuffleBlocks(storage_volume_t block) { page_meta_t pageMeta; uint32_t pageCounter; // 1. set the last block to USED, if it's already USED or START, then no effect pageMeta.header = PAGE_USED; call Flash.write(L_RAW_OFFSET(block, lastBlock[block], 0), (uint8_t*) &pageMeta, sizeof(page_meta_t)); // 2. if lastBlock + 1 is free, then set it as last block and the first record is free pageCounter = (lastBlock[block] + 1) % L_PARTITIONS(block); call Flash.read(L_RAW_OFFSET(block, pageCounter, 0), (uint8_t*) &pageMeta, sizeof(page_meta_t)); if(pageMeta.header == PAGE_AVAILABLE) { nextFreeRecord[block] = 1; lastBlock[block] = pageCounter; } else { call Flash.erase(L_RAW_OFFSET(block, firstBlock[block], 0)); pageCounter = (firstBlock[block] + 1) % L_PARTITIONS(block); pageMeta.header = PAGE_START; call Flash.write(L_RAW_OFFSET(block, pageCounter, 0), (uint8_t*) &pageMeta, sizeof(page_meta_t)); nextFreeRecord[block] = 1; lastBlock[block] = firstBlock[block]; firstBlock[block] = pageCounter; gbOverwriteOccured = TRUE; } } /* * Converts a cookie to a page/record/offset tuple */ void cookieToTuple(uint32_t cookie, storage_volume_t block, uint32_t *page, uint32_t *record, uint32_t *offset) { uint32_t mypage; uint32_t myrecord; uint32_t myoffset; mypage = (cookie - L_BASE_BLOCK(block)) / P30_BLOCK_SIZE; cookie = (cookie - L_BASE_BLOCK(block)) % P30_BLOCK_SIZE; myrecord = cookie / L_FULL_RECORD_SIZE; myoffset = (cookie % L_FULL_RECORD_SIZE) - sizeof(record_meta_t); *page = mypage; *record = myrecord; *offset = myoffset; } /* * Ideally, Logstorage would require a mount too, but it doesn't so * it's a total hack. Before any operation, we have to check if a * mount occurred. Mount initializes the your logblock. */ uint8_t mountBits[NUM_VOLS]; void myMount(storage_volume_t block) { page_meta_t pageMeta; record_meta_t recordMeta; uint32_t pageCounter; uint32_t recordCounter; uint32_t freePages = 0; if(mountBits[block] != 0) return; // scan all 128k pages for page meta // annoying corner case of all free pages, write the first page as START for(pageCounter = 0; pageCounter < L_PARTITIONS(block); pageCounter++) { call Flash.read(L_RAW_OFFSET(block, pageCounter, 0), (uint8_t*)&pageMeta, sizeof(page_meta_t)); if(pageMeta.header == PAGE_AVAILABLE) freePages++; } if(freePages == L_PARTITIONS(block)) { pageMeta.header = PAGE_START; call Flash.write(L_RAW_OFFSET(block, 0, 0), (uint8_t*) &pageMeta, sizeof(page_meta_t)); } // if we find a START page, then we are done for(pageCounter = 0; pageCounter < L_PARTITIONS(block); pageCounter++) { call Flash.read(L_RAW_OFFSET(block, pageCounter, 0), (uint8_t*)&pageMeta, sizeof(page_meta_t)); if(pageMeta.header == PAGE_START) { firstBlock[block] = pageCounter; break; } } // if we didn't find a START page, first page is right after AVAILABLE if(pageCounter == L_PARTITIONS(block)) { for(pageCounter = 0; pageCounter < L_PARTITIONS(block); pageCounter++) { call Flash.read(L_RAW_OFFSET(block, pageCounter, 0), (uint8_t*)&pageMeta, sizeof(page_meta_t)); if(pageMeta.header == PAGE_AVAILABLE) { pageCounter = (pageCounter + 1) % L_PARTITIONS(block); firstBlock[block] = pageCounter; // mark that block as a START block pageMeta.header = PAGE_START; call Flash.write(L_RAW_OFFSET(block, pageCounter, 0), (uint8_t*) &pageMeta, sizeof(page_meta_t)); break; } } } // now we scan for next free record location pageCounter = firstBlock[block]; for(recordCounter = 1; recordCounter < L_MAX_RECORDS_PER_BLOCK; recordCounter++) { call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter), (uint8_t*) &recordMeta, sizeof(record_meta_t)); if(recordMeta.status == RECORD_EMPTY) { nextFreeRecord[block] = recordCounter; lastBlock[block] = pageCounter; break; } } // Didn't find a free record in the START block, search the first FREE block if(recordCounter == L_MAX_RECORDS_PER_BLOCK) { for(pageCounter = 0; pageCounter < L_PARTITIONS(block); pageCounter++) { call Flash.read(L_RAW_OFFSET(block, pageCounter, 0), (uint8_t*)&pageMeta, sizeof(page_meta_t)); if(pageMeta.header == PAGE_AVAILABLE) { for(recordCounter = 1; recordCounter < L_MAX_RECORDS_PER_BLOCK; recordCounter++) { call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter), (uint8_t*) &recordMeta, sizeof(record_meta_t)); if(recordMeta.status == RECORD_EMPTY) { lastBlock[block] = pageCounter; nextFreeRecord[block] = recordCounter; goto mount_complete; } } } } // if here, you didn't find the last block, it must be right before the START block // special case the wrap around if(firstBlock[block] == 0) lastBlock[block] = L_PARTITIONS(block) - 1; else lastBlock[block] = firstBlock[block] - 1; // that last block must be full, so shuffle it shuffleBlocks(block); } mount_complete: readCookieOffset[block] = SEEK_BEGINNING; mountBits[block] = 1; } task void signalDoneTask() { switch(m_state) { case S_APPEND: m_state = S_IDLE; signal Write.appendDone[clientId](clientBuf, clientLen, gbOverwriteOccured, clientResult); gbOverwriteOccured = FALSE; break; case S_SYNC: m_state = S_IDLE; signal Write.syncDone[clientId](SUCCESS); break; case S_ERASE: m_state = S_IDLE; signal Write.eraseDone[clientId](clientResult); break; case S_READ: m_state = S_IDLE; signal Read.readDone[clientId](clientBuf, clientLen, clientResult); break; case S_SEEK: m_state = S_IDLE; signal Read.seekDone[clientId](SUCCESS); break; default: break; } } /* * Invariant should be that everytime after an append completes, * nextFreeRecord should point to a valid free record slot. Uses * nextFreeRecord to append. */ command error_t Write.append[ storage_volume_t block ](void* buf, storage_len_t len) { record_meta_t recordMeta; myMount(block); // error check if(len > L_RECORD_DATA_SIZE) return EINVAL; // if non circular log, fail if((!call Circular.get[block]()) && (lastBlock[block] == (L_PARTITIONS(block) - 1)) && (nextFreeRecord[block] == (L_MAX_RECORDS_PER_BLOCK - 1))) return FAIL; m_state = S_APPEND; clientId = block; clientBuf = buf; clientLen = len; // if you try to log 0, just immediately succeed, this really shouldn't happen if(len == 0) { clientResult = SUCCESS; post signalDoneTask(); return SUCCESS; } // if readCookie was on SEEK_EOL, adjust it back to here if(readCookieOffset[block] == SEEK_EOL) readCookieOffset[block] = L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]) + sizeof(record_meta_t); // use next free record, write the INVALID, write the data, write the VALID recordMeta.status = RECORD_INVALID; recordMeta.length = len; call Flash.write(L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]), (uint8_t*) &recordMeta, sizeof(record_meta_t)); call Flash.write(L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]) + sizeof(record_meta_t), (uint8_t*) buf, len); recordMeta.status = RECORD_VALID; call Flash.write(L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]), (uint8_t*) &recordMeta, sizeof(record_meta_t)); nextFreeRecord[block]++; // see if you need to adjust blocks or shuffle if(nextFreeRecord[block] == L_MAX_RECORDS_PER_BLOCK) shuffleBlocks(block); clientResult = SUCCESS; post signalDoneTask(); return SUCCESS; } /* * We use nextFreeRecord to get the cookie */ command storage_cookie_t Write.currentOffset[ storage_volume_t block ]() { myMount(block); return L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]) + sizeof(record_meta_t); } /* * First we erase all the log data blocks so that they can be * reused. Then we zero the cookies and then write them to our * partitions like the append operation. If we crash in the middle, * you may have to erase again. However, if an erase does fail, at * least all your data will still be there, so that you can try * again. */ command error_t Write.erase[storage_volume_t block]() { uint32_t i; for(i = 0; i < L_PARTITIONS(block); i++) { call Flash.erase(L_BASE_BLOCK(block) + (i * P30_BLOCK_SIZE)); } mountBits[block] = 0; myMount(block); // ... starting block implicitly written by mount m_state = S_ERASE; clientId = block; clientResult = SUCCESS; post signalDoneTask(); return SUCCESS; } /* * Sync does nothing really because unlike the AT45DB, Intel P30 * writes directly through. */ command error_t Write.sync[storage_volume_t block]() { myMount(block); m_state = S_SYNC; clientId = block; clientResult = SUCCESS; post signalDoneTask(); return SUCCESS; } /* * Sanity check the read cookie and adjust for any other special * cookies. Because you can seek to the byte, must it is saved in * flash as records, you have to do a lot of tricky seeking, but * it's done here. Also has to handle any pages that are spilled * over. */ command error_t Read.read[ storage_volume_t block ](void* buf, storage_len_t len) { record_meta_t recordMeta; uint32_t recordCounter; uint32_t pageCounter; uint32_t offset; clientId = block; clientBuf = buf; clientResult = SUCCESS; myMount(block); m_state = S_READ; if(len == 0 || readCookieOffset[block] == SEEK_EOL) { clientResult = SUCCESS; clientLen = 0; post signalDoneTask(); return SUCCESS; } // adjust SEEK_BEGINNING to a real offset if(readCookieOffset[block] == SEEK_BEGINNING) { readCookieOffset[block] = L_RAW_OFFSET(block, firstBlock[block], 1) + sizeof(record_meta_t); } // convert the cookie to something useful cookieToTuple(readCookieOffset[block], block, &pageCounter, &recordCounter, &offset); // sanity check readCookie call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter), (uint8_t*) &recordMeta, sizeof(record_meta_t)); if((recordMeta.status == RECORD_VALID) && (offset > len)) { readCookieOffset[block] = L_RAW_OFFSET(block, firstBlock[block], 0) + sizeof(record_meta_t); cookieToTuple(readCookieOffset[block], block, &pageCounter, &recordCounter, &offset); } clientLen = 0; // reset how much actually read and count up while(len != 0) { call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter), (uint8_t*) &recordMeta, sizeof(record_meta_t)); if(recordMeta.status == RECORD_INVALID) { goto advance_counter; } if(recordMeta.status == RECORD_EMPTY) { readCookieOffset[block] = SEEK_EOL; post signalDoneTask(); return SUCCESS; } // read partial block and finish if(len < recordMeta.length + offset) { call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter) + offset + sizeof(record_meta_t), buf, len); offset = len; buf = buf + len; len = 0; } else { call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter) + offset + sizeof(record_meta_t), buf, recordMeta.length - offset); clientLen = clientLen + recordMeta.length - offset; len -= recordMeta.length - offset; buf = buf + recordMeta.length - offset; offset = 0; advance_counter: recordCounter++; if((recordCounter >= L_MAX_RECORDS_PER_BLOCK) && (pageCounter == lastBlock[block])) { readCookieOffset[block] = SEEK_EOL; post signalDoneTask(); return SUCCESS; } // need to adjust page possibly if spills // also need to check if reached end of log (lastBlock[block] or RECORD_AVAILABLE) if(recordCounter >= L_MAX_RECORDS_PER_BLOCK) { pageCounter = (pageCounter + 1) % L_PARTITIONS(block); recordCounter = 1; } } } readCookieOffset[block] = L_RAW_OFFSET(block, pageCounter, recordCounter) + sizeof(record_meta_t) + offset; post signalDoneTask(); return SUCCESS; } command storage_cookie_t Read.currentOffset[ storage_volume_t block ]() { myMount(block); return readCookieOffset[block]; } /* * Just set the cookie. If you seek into an invalid area, just set * it at SEEK_BEGINNING. */ command error_t Read.seek[ storage_volume_t block ](storage_cookie_t offset) { uint32_t page; uint32_t record; uint32_t recordOffset; record_meta_t recordMeta; myMount(block); clientId = block; clientResult = SUCCESS; m_state = S_SEEK; readCookieOffset[block] = offset; post signalDoneTask(); return SUCCESS; } /* * Go through all the pages, if it's a free page, count whatever is * available left. Add them all up. */ command storage_len_t Read.getSize[ storage_volume_t block ]() { storage_len_t len = 0; uint32_t i; uint32_t j; page_meta_t pageMeta; record_meta_t recordMeta; myMount(block); for(i = 0; i < L_PARTITIONS(block); i++) { call Flash.read(L_RAW_OFFSET(block, i, j), (uint8_t*) &pageMeta, sizeof(page_meta_t)); if(pageMeta.header != PAGE_AVAILABLE) { len = len + (sizeof(record_data_t) * L_MAX_RECORDS_PER_BLOCK); continue; } for(j = 1; j < L_MAX_RECORDS_PER_BLOCK; j++) { call Flash.read(L_RAW_OFFSET(block, i, j), (uint8_t*) &recordMeta, sizeof(record_meta_t)); if(recordMeta.status == RECORD_EMPTY) { len = len + ((L_MAX_RECORDS_PER_BLOCK - j) * sizeof(record_meta_t)); break; } } } return len; } default event void Read.readDone[ storage_volume_t block ](void* buf, storage_len_t len, error_t error) {} default event void Read.seekDone[ storage_volume_t block ](error_t error) {} default event void Write.appendDone[ storage_volume_t block ](void* buf, storage_len_t len, bool recordsLost, error_t error) {} default event void Write.eraseDone[ storage_volume_t block ](error_t error) {} default event void Write.syncDone[ storage_volume_t block ](error_t error) {} default command bool Circular.get[ uint8_t id ]() { return FALSE; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/p30/Storage_chip.h000066400000000000000000000035321207233610700222120ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ #ifndef __STORAGE_CHIP_H__ #define __STORAGE_CHIP_H__ typedef uint8_t storage_volume_t; typedef uint8_t storage_block_t; typedef uint8_t storage_log_t; typedef uint8_t storage_config_t; #endif tinyos-2.1.2+dfsg/tos/chips/pxa27x/pxa27x_registers.h000066400000000000000000003273511207233610700224310ustar00rootroot00000000000000// $Id: pxa27x_registers.h,v 1.5 2008-06-11 00:46:23 razvanm Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Phil Buonadonna * * Edits: Josh Herbach, Konrad Lorincz * Revised: 09/19/2005 */ #ifndef _PXA27X_REGISTER_H #define _PXA27X_REGISTER_H #define _PXAREG(_addr) (*((volatile uint32_t *)(_addr))) #define _PXAREG_OFFSET(_addr,_off) (_PXAREG((uint32_t)(_addr) + (uint32_t)(_off))) /******************************************************************************/ /* Memory Controller */ /******************************************************************************/ #define MDCNFG _PXAREG(0x48000000) /* SDRAM Configuration register 6-43 */ #define MDREFR _PXAREG(0x48000004) /* SDRAM Refresh Control register 6-53 */ #define MSC0 _PXAREG(0x48000008) /* Static Memory Control register 0 6-63 */ #define MSC1 _PXAREG(0x4800000C) /* Static Memory Control register 1 6-63 */ #define MSC2 _PXAREG(0x48000010) /* Static Memory Control register 2 6-63 */ #define MECR _PXAREG(0x48000014) /* Expansion Memory (PC Card/CompactFlash) Bus Configuration register 6-79 */ #define SXCNFG _PXAREG(0x4800001C) /* Synchronous Static Memory Configuration register 6-58 */ #define FLYCNFG _PXAREG(0x48000020) /* Fly-by DMA DVAL<1:0> polarities 5-39 */ #define MCMEM0 _PXAREG(0x48000028) /* PC Card Interface Common Memory Space Socket 0 Timing Configuration register 6-77 */ #define MCMEM1 _PXAREG(0x4800002C) /* PC Card Interface Common Memory Space Socket 1 Timing Configuration register 6-77 */ #define MCATT0 _PXAREG(0x48000030) /* PC Card Interface Attribute Space Socket 0 Timing Configuration register 6-77 */ #define MCATT1 _PXAREG(0x48000034) /* PC Card Interface Attribute Space Socket 1 Timing Configuration register 6-77 */ #define MCIO0 _PXAREG(0x48000038) /* PC Card Interface I/o Space Socket 0 Timing Configuration register 6-78 */ #define MCIO1 _PXAREG(0x4800003C) /* PC Card Interface I/o Space Socket 1 Timing Configuration register 6-78 */ #define MDMRS _PXAREG(0x48000040) /* SDRAM Mode Register Set Configuration register 6-49 */ #define BOOT_DEF _PXAREG(0x48000044) /* Boot Time Default Configuration register 6-75 */ #define ARB_CNTL _PXAREG(0x48000048) /* Arbiter Control register 29-2 */ #define BSCNTR0 _PXAREG(0x4800004C) /* System Memory Buffer Strength Control register 0 6-81 */ #define BSCNTR1 _PXAREG(0x48000050) /* System Memory Buffer Strength Control register 1 6-82 */ #define LCDBSCNTR _PXAREG(0x48000054) /* LCD Buffer Strength Control register 7-102 */ #define MDMRSLP _PXAREG(0x48000058) /* Special Low Power SDRAM Mode Register Set Configuration register 6-51 */ #define BSCNTR2 _PXAREG(0x4800005C) /* System Memory Buffer Strength Control register 2 6-83 */ #define BSCNTR3 _PXAREG(0x48000060) /* System Memory Buffer Strength Control register 3 6-84 */ #define SA1110 _PXAREG(0x48000064) /* SA-1110 Compatibility Mode for Static Memory register 6-70 */ /* MDCNFG Bit Defs */ #define MDCNFG_MDENX (1 << 31) #define MDCNFG_DCACX2 (1 << 30) #define MDCNFG_DSA1110_2 (1 << 28) #define MDCNFG_DADDR2 (1 << 26) #define MDCNFG_DTC2(_x) (((_x) & 0x3) << 24) #define MDCNFG_DNB2 (1 << 23) #define MDCNFG_DRAC2(_x) (((_x) & 0x3) << 21) #define MDCNFG_DCAC2(_x) (((_x) & 0x3) << 19) #define MDCNFG_DWID2 (1 << 18) #define MDCNFG_DE3 (1 << 17) #define MDCNFG_DE2 (1 << 16) #define MDCNFG_STACK1 (1 << 15) #define MDCNFG_DCACX0 (1 << 14) #define MDCNFG_STACK0 (1 << 13) #define MDCNFG_DSA1110_0 (1 << 12) #define MDCNFG_DADDR0 (1 << 10) #define MDCNFG_DTC0(_x) (((_x) & 0x3) << 8) #define MDCNFG_DNB0 (1 << 7) #define MDCNFG_DRAC0(_x) (((_x) & 0x3) << 5) #define MDCNFG_DCAC0(_x) (((_x) & 0x3) << 3) #define MDCNFG_DWID0 (1 << 2) #define MDCNFG_DE1 (1 << 1) #define MDCNFG_DE0 (1 << 0) #define MDCNFG_SETALWAYS ((1 << 27) | (1 << 11)) /* MDREFR Bit Defs */ #define MDREFR_ALTREFA (1 << 31) /* */ #define MDREFR_ALTREFB (1 << 30) /* */ #define MDREFR_K0DB4 (1 << 29) /* */ #define MDREFR_K2FREE (1 << 25) /* */ #define MDREFR_K1FREE (1 << 24) /* */ #define MDREFR_K0FREE (1 << 23) /* */ #define MDREFR_SLFRSH (1 << 22) /* */ #define MDREFR_APD (1 << 20) /* */ #define MDREFR_K2DB2 (1 << 19) /* */ #define MDREFR_K2RUN (1 << 18) /* */ #define MDREFR_K1DB2 (1 << 17) /* */ #define MDREFR_K1RUN (1 << 16) /* */ #define MDREFR_E1PIN (1 << 15) /* */ #define MDREFR_K0DB2 (1 << 14) /* */ #define MDREFR_K0RUN (1 << 13) /* */ #define MDREFR_DRI(_x) ((_x) & 0xfff) /* */ /* MSCx Bit Defs */ #define MSC_RBUFF135 (1 << 31) /* Return Data Buff vs. Streaming nCS 1,3 or 5 */ #define MSC_RRR135(_x) (((_x) & (0x7)) << 28) /* ROM/SRAM Recovery Time nCS 1,3 or 5 */ #define MSC_RDN135(_x) (((_x) & (0x7)) << 24) /* ROM Delay Next Access nCS 1,3 or 5 */ #define MSC_RDF135(_x) (((_x) & (0x7)) << 20) /* ROM Delay First Access nCS 1,3 or 5 */ #define MSC_RBW135 (1 << 19) /* ROM Bus Width nCS 1,3 or 5 */ #define MSC_RT135(_x) (((_x) & (0x7)) << 16) /* ROM Type nCS 1,3 or 5 */ #define MSC_RBUFF024 (1 << 15) /* Return Data Buff vs. Streaming nCS 0,2 or 4 */ #define MSC_RRR024(_x) (((_x) & (0x7)) << 12) /* ROM/SRAM Recover Time nCS 0,2 or 4 */ #define MSC_RDN024(_x) (((_x) & (0x7)) << 8) /* ROM Delay Next Access nCS 0,2 or 4 */ #define MSC_RDF024(_x) (((_x) & (0x7)) << 4) /* ROM Delay First Access nCS 0,2 or 4 */ #define MSC_RBW024 (1 << 3) /* ROM Bus Width nCS 0,2 or 4 */ #define MSC_RT024(_x) (((_x) & (0x7)) << 0) /* ROM Type nCS 0,2 or 4 */ /* SXCNFG Bit defs */ #define SXCNFG_SXEN0 (1) #define SXCNFG_SXEN1 (1<<1) #define SXCNFG_SXCL0(_x) (((_x) & 0x7) << 2) #define SXCNFG_SXTP0(_x) (((_x) & 0x3) << 12) #define SXCNFG_SXCLEXT0 (1<<15) /* ARB_CNTL Bit defs */ #define ARB_CNTL_DMA_SLV_PARK (1 << 31) #define ARB_CNTL_CI_PARK (1 << 30) #define ARB_CNTL_EX_MEM_PARK (1 << 29) #define ARB_CNTL_INT_MEM_PARK (1 << 28) #define ARB_CNTL_USB_PARK (1 << 27) #define ARB_CNTL_LCD_PARK (1 << 26) #define ARB_CNTL_DMA_PARK (1 << 25) #define ARB_CNTL_CORE_PARK (1 << 24) #define ARB_CNTL_LOCK_FLAG (1 << 23) #define ARB_CNTL_LCD_WT(_wt) (((_wt) & 0xF) << 8) #define ARB_CNTL_DMA_WT(_wt) (((_wt) & 0xF) << 4) #define ARB_CNTL_CORE_WT(_wt) (((_wt) & 0xF) << 0) /* SA1110 Bit defs */ #define SA1110_SXSTACK(_x) (((_x) & 0x3) << 12) /******************************************************************************/ /* LCD Controller */ /******************************************************************************/ #define LCCR0 _PXAREG(0x44000000) /* LCD Controller Control register 0 7-56 */ #define LCCR1 _PXAREG(0x44000004) /* LCD Controller Control register 1 7-64 */ #define LCCR2 _PXAREG(0x44000008) /* LCD Controller Control register 2 7-66 */ #define LCCR3 _PXAREG(0x4400000C) /* LCD Controller Control register 3 7-69 */ #define LCCR4 _PXAREG(0x44000010) /* LCD Controller Control register 4 7-74 */ #define LCCR5 _PXAREG(0x44000014) /* LCD Controller Control register 5 7-77 */ #define FBR0 _PXAREG(0x44000020) /* DMA Channel 0 Frame Branch register 7-101 */ #define FBR1 _PXAREG(0x44000024) /* DMA Channel 1 Frame Branch register 7-101 */ #define FBR2 _PXAREG(0x44000028) /* DMA Channel 2 Frame Branch register 7-101 */ #define FBR3 _PXAREG(0x4400002C) /* DMA Channel 3 Frame Branch register 7-101 */ #define FBR4 _PXAREG(0x44000030) /* DMA Channel 4 Frame Branch register 7-101 */ #define LCSR1 _PXAREG(0x44000034) /* LCD Controller Status register 1 7-109 */ #define LCSR0 _PXAREG(0x44000038) /* LCD Controller Status register 0 7-104 */ #define LIIDR _PXAREG(0x4400003C) /* LCD Controller Interrupt ID register 7-116 */ #define TRGBR _PXAREG(0x44000040) /* TMED RGB Seed register 7-97 */ #define TCR _PXAREG(0x44000044) /* TMED Control register 7-98 */ #define OVL1C1 _PXAREG(0x44000050) /* Overlay 1 Control register 1 7-90 */ #define OVL1C2 _PXAREG(0x44000060) /* Overlay 1 Control register 2 7-91 */ #define OVL2C1 _PXAREG(0x44000070) /* Overlay 2 Control register 1 7-92 */ #define OVL2C2 _PXAREG(0x44000080) /* Overlay 2 Control register 2 7-94 */ #define CCR _PXAREG(0x44000090) /* Cursor Control register 7-95 */ #define CMDCR _PXAREG(0x44000100) /* Command Control register 7-96 */ #define PRSR _PXAREG(0x44000104) /* Panel Read Status register 7-103 */ #define FBR5 _PXAREG(0x44000110) /* DMA Channel 5 Frame Branch register 7-101 */ #define FBR6 _PXAREG(0x44000114) /* DMA Channel 6 Frame Branch register 7-101 */ #define FDADR0 _PXAREG(0x44000200) /* DMA Channel 0 Frame Descriptor Address register 7-100 */ #define FSADR0 _PXAREG(0x44000204) /* DMA Channel 0 Frame Source Address register 7-117 */ #define FIDR0 _PXAREG(0x44000208) /* DMA Channel 0 Frame ID register 7-117 */ #define LDCMD0 _PXAREG(0x4400020C) /* LCD DMA Channel 0 Command register 7-118 */ #define FDADR1 _PXAREG(0x44000210) /* DMA Channel 1 Frame Descriptor Address register 7-100 */ #define FSADR1 _PXAREG(0x44000214) /* DMA Channel 1 Frame Source Address register 7-117 */ #define FIDR1 _PXAREG(0x44000218) /* DMA Channel 1 Frame ID register 7-117 */ #define LDCMD1 _PXAREG(0x4400021C) /* LCD DMA Channel 1 Command register 7-118 */ #define FDADR2 _PXAREG(0x44000220) /* DMA Channel 2 Frame Descriptor Address register 7-100 */ #define FSADR2 _PXAREG(0x44000224) /* DMA Channel 2 Frame Source Address register 7-117 */ #define FIDR2 _PXAREG(0x44000228) /* DMA Channel 2 Frame ID register 7-117 */ #define LDCMD2 _PXAREG(0x4400022C) /* LCD DMA Channel 2 Command register 7-118 */ #define FDADR3 _PXAREG(0x44000230) /* DMA Channel 3 Frame Descriptor Address register 7-100 */ #define FSADR3 _PXAREG(0x44000234) /* DMA Channel 3 Frame Source Address register 7-117 */ #define FIDR3 _PXAREG(0x44000238) /* DMA Channel 3 Frame ID register 7-117 */ #define LDCMD3 _PXAREG(0x4400023C) /* LCD DMA Channel 3 Command register 7-118 */ #define FDADR4 _PXAREG(0x44000240) /* DMA Channel 4 Frame Descriptor Address register 7-100 */ #define FSADR4 _PXAREG(0x44000244) /* DMA Channel 4 Frame Source Address register 7-117 */ #define FIDR4 _PXAREG(0x44000248) /* DMA Channel 4 Frame ID register 7-117 */ #define LDCMD4 _PXAREG(0x4400024C) /* LCD DMA Channel 4 Command register 7-118 */ #define FDADR5 _PXAREG(0x44000250) /* DMA Channel 5 Frame Descriptor Address register 7-100 */ #define FSADR5 _PXAREG(0x44000254) /* DMA Channel 5 Frame Source Address register 7-117 */ #define FIDR5 _PXAREG(0x44000258) /* DMA Channel 5 Frame ID register 7-117 */ #define LDCMD5 _PXAREG(0x4400025C) /* LCD DMA Channel 5 Command register 7-118 */ #define FDADR6 _PXAREG(0x44000260) /* DMA Channel 6 Frame Descriptor Address register 7-100 */ #define FSADR6 _PXAREG(0x44000264) /* DMA Channel 6 Frame Source Address register 7-117 */ #define FIDR6 _PXAREG(0x44000268) /* DMA Channel 6 Frame ID register 7-117 */ #define LDCMD6 _PXAREG(0x4400026C) /* LCD DMA Channel 6 Command register 7-118 */ #define LCDBSCNTR _PXAREG(0x48000054) /* LCD Buffer Strength Control register 7-102 */ /******************************************************************************/ /* USB Host Controller */ /******************************************************************************/ #define UHCREV _PXAREG(0x4C000000) /* UHC HCI Spec Revision register 20-10 */ #define UHCHCON _PXAREG(0x4C000004) /* UHC Host Control register 20-10 */ #define UHCCOMS _PXAREG(0x4C000008) /* UHC Command Status register 20-14 */ #define UHCINTS _PXAREG(0x4C00000C) /* UHC Interrupt Status register 20-16 */ #define UHCINTE _PXAREG(0x4C000010) /* UHC Interrupt Enable register 20-18 */ #define UHCINTD _PXAREG(0x4C000014) /* UHC Interrupt Disable register 20-20 */ #define UHCHCCA _PXAREG(0x4C000018) /* UHC Host Controller Communication Area register 20-21 */ #define UHCPCED _PXAREG(0x4C00001C) /* UHC Period Current Endpoint Descriptor register 20-21 */ #define UHCCHED _PXAREG(0x4C000020) /* UHC Control Head Endpoint Descriptor register 20-22 */ #define UHCCCED _PXAREG(0x4C000024) /* UHC Control Current Endpoint Descriptor register 20-22 */ #define UHCBHED _PXAREG(0x4C000028) /* UHC Bulk Head Endpoint Descriptor register 20-23 */ #define UHCBCED _PXAREG(0x4C00002C) /* UHC Bulk Current Endpoint Descriptor register 20-24 */ #define UHCDHEAD _PXAREG(0x4C000030) /* UHC Done Head register 20-25 */ #define UHCFMI _PXAREG(0x4C000034) /* UHC Frame Interval register 20-26 */ #define UHCFMR _PXAREG(0x4C000038) /* UHC Frame Remaining register 20-27 */ #define UHCFMN _PXAREG(0x4C00003C) /* UHC Frame Number register 20-28 */ #define UHCPERS _PXAREG(0x4C000040) /* UHC Periodic Start register 20-29 */ #define UHCLST _PXAREG(0x4C000044) /* UHC Low-Speed Threshold register 20-30 */ #define UHCRHDA _PXAREG(0x4C000048) /* UHC Root Hub Descriptor A register 20-31 */ #define UHCRHDB _PXAREG(0x4C00004C) /* UHC Root Hub Descriptor B register 20-33 */ #define UHCRHS _PXAREG(0x4C000050) /* UHC Root Hub Status register 20-34 */ #define UHCRHPS1 _PXAREG(0x4C000054) /* UHC Root Hub Port 1 Status register 20-35 */ #define UHCRHPS2 _PXAREG(0x4C000058) /* UHC Root Hub Port 2 Status register 20-35 */ #define UHCRHPS3 _PXAREG(0x4C00005C) /* UHC Root Hub Port 3 Status register 20-35 */ #define UHCSTAT _PXAREG(0x4C000060) /* UHC Status register 20-39 */ #define UHCHR _PXAREG(0x4C000064) /* UHC Reset register 20-41 */ #define UHCHIE _PXAREG(0x4C000068) /* UHC Interrupt Enable register 20-44 */ #define UHCHIT _PXAREG(0x4C00006C) /* UHC Interrupt Test register 20-45 */ /******************************************************************************/ /* Quick Capture Interface */ /******************************************************************************/ #define CICR0 _PXAREG(0x50000000) /* Quick Capture Interface Control register 0 27-24 */ #define CICR1 _PXAREG(0x50000004) /* Quick Capture Interface Control register 1 27-28 */ #define CICR2 _PXAREG(0x50000008) /* Quick Capture Interface Control register 2 27-32 */ #define CICR3 _PXAREG(0x5000000C) /* Quick Capture Interface Control register 3 27-33 */ #define CICR4 _PXAREG(0x50000010) /* Quick Capture Interface Control register 4 27-34 */ #define CISR _PXAREG(0x50000014) /* Quick Capture Interface Status register 27-37 */ #define CIFR _PXAREG(0x50000018) /* Quick Capture Interface FIFO Control register 27-40 */ #define CITOR _PXAREG(0x5000001C) /* Quick Capture Interface Time-Out register 27-37 */ #define CIBR0 _PXAREG(0x50000028) /* Quick Capture Interface Receive Buffer register 0 (Channel 0) 27-42 */ #define CIBR1 _PXAREG(0x50000030) /* Quick Capture Interface Receive Buffer register 1 (Channel 1) 27-42 */ #define CIBR2 _PXAREG(0x50000038) /* Quick Capture Interface Receive Buffer register 2 (Channel 2) 27-42 */ /* Quick Capture Interface - Control Register 0 */ #define CICR0_DMA_EN (1 << 31) /* DMA Request Enable */ #define CICR0_EN (1 << 28) /* Quick Capture Interface Enable (and Quick Disable) */ #define CICR0_TOM (1 << 9) /* Time-Out Interrupt Mask */ #define CICR0_RDAVM (1 << 8) /* Receive-Data-Available Interrupt Mask */ #define CICR0_FEM (1 << 7) /* FIFO-Empty Interrupt Mask */ #define CICR0_EOLM (1 << 6) /* End-of-Line Interrupt Mask */ #define CICR0_SOFM (1 << 2) /* Start-of-Frame Interrupt Mask */ #define CICR0_EOFM (1 << 1) /* End-of-Frame Interrupt Mask */ #define CICR0_FOM (1 << 0) /* FIFO Overrun Interrupt Mask */ /* Quick Capture Interface - Control Register 1 */ #define CICR1_TBIT (1 << 31) /* Transparency Bit */ #define CICR1_RGBT_CONV(_data,_x) ((_data & ~(0x7 << 29)) | (_x << 29)) /* RGBT Conversion */ #define CICR1_PPL(_data,_x) ((_data & ~(0x7ff << 15)) | (_x << 15)) /* Pixels per Line */ #define CICR1_RGB_CONV(_data,_x) ((_data & ~(0x7 << 12)) | (_x << 12)) /* RGB Bits per Pixel Conversion */ #define CICR1_RGB_F (1 << 11) /* RGB Format */ #define CICR1_YCBCR_F (1 << 10) /* YCbCr Format */ #define CICR1_RGB_BPP(_data,_x) ((_data & ~(0x7 << 7)) | (_x << 7)) /* RGB Bits per Pixel */ #define CICR1_RAW_BPP(_data,_x) ((_data & ~(0x3 << 5)) | (_x << 5)) /* Raw Bits per Pixel */ #define CICR1_COLOR_SP(_data,_x) ((_data & ~(0x3 << 3)) | (_x << 3)) /* Color Space */ #define CICR1_DW(_data,_x) ((_data & ~(0x7 << 0)) | (_x << 0)) /* Data Width */ /* Quick Capture Interface - Control Register 3 */ #define CICR3_LPF(_data,_x) ((_data & ~(0x7ff << 0)) | (_x << 0)) /* Lines per Frame */ /* Quick Capture Interface - Control Register 4 */ #define CICR4_PCLK_EN (1 << 23) /* Pixel Clock Enable */ #define CICR4_HSP (1 << 21) /* Horizontal Sync Polarity */ #define CICR4_VSP (1 << 20) /* Vertical Sync Polarity */ #define CICR4_MCLK_EN (1 << 19) /* MCLK Enable */ #define CICR4_DIV(_data,_x) ((_data & ~(0xff << 0)) | (_x << 0)) /* Clock Divisor */ /* Quick Capture Interface - Status Register */ #define CISR_FTO (1 << 15) /* FIFO Time-Out */ #define CISR_RDAV_2 (1 << 14) /* Channel 2 Receive Data Available */ #define CISR_RDAV_1 (1 << 13) /* Channel 1 Receive Data Available */ #define CISR_RDAV_0 (1 << 12) /* Channel 0 Receive Data Available */ #define CISR_FEMPTY_2 (1 << 11) /* Channel 2 FIFO Empty */ #define CISR_FEMPTY_1 (1 << 10) /* Channel 1 FIFO Empty */ #define CISR_FEMPTY_0 (1 << 9) /* Channel 0 FIFO Empty */ #define CISR_EOL (1 << 8) /* End-of-Line */ #define CISR_PAR_ERR (1 << 7) /* Parity Error */ #define CISR_CQD (1 << 6) /* Quick Campture Interface Quick Dissable */ #define CISR_CDD (1 << 5) /* Quick Campture Interface Quick Dissable Done */ #define CISR_SOF (1 << 4) /* Start-of-Frame */ #define CISR_EOF (1 << 3) /* End-of-Frame */ #define CISR_IFO_2 (1 << 2) /* FIFO Overrun for Channel 2 */ #define CISR_IFO_1 (1 << 1) /* FIFO Overrun for Channel 1 */ #define CISR_IFO_0 (1 << 0) /* FIFO Overrun for Channel 0 */ /* Quick Capture Interface - FIFO Control Register */ #define CIFR_FLVL0(_data,_x) ((_data & ~(0xff << 8)) | (_x << 8)) /* FIFO 0 Level: value from 0-128 indicates the number of bytes */ #define CIFR_THL_0(_data,_x) ((_data & ~(0x3 << 4)) | (_x << 4)) /* Threshold Level for Channel 0 FIFO */ #define CIFR_RESETF (1 << 3) /* Reset input FIFOs */ /******************************************************************************/ /* DMA Controller */ /******************************************************************************/ #define DCSR0 _PXAREG(0x40000000) /* DMA Control/Status register for Channel 0 5-41 */ #define DCSR1 _PXAREG(0x40000004) /* DMA Control/Status register for Channel 1 5-41 */ #define DCSR2 _PXAREG(0x40000008) /* DMA Control/Status register for Channel 2 5-41 */ #define DCSR3 _PXAREG(0x4000000C) /* DMA Control/Status register for Channel 3 5-41 */ #define DCSR4 _PXAREG(0x40000010) /* DMA Control/Status register for Channel 4 5-41 */ #define DCSR5 _PXAREG(0x40000014) /* DMA Control/Status register for Channel 5 5-41 */ #define DCSR6 _PXAREG(0x40000018) /* DMA Control/Status register for Channel 6 5-41 */ #define DCSR7 _PXAREG(0x4000001C) /* DMA Control/Status register for Channel 7 5-41 */ #define DCSR8 _PXAREG(0x40000020) /* DMA Control/Status register for Channel 8 5-41 */ #define DCSR9 _PXAREG(0x40000024) /* DMA Control/Status register for Channel 9 5-41 */ #define DCSR10 _PXAREG(0x40000028) /* DMA Control/Status register for Channel 10 5-41 */ #define DCSR11 _PXAREG(0x4000002C) /* DMA Control/Status register for Channel 11 5-41 */ #define DCSR12 _PXAREG(0x40000030) /* DMA Control/Status register for Channel 12 5-41 */ #define DCSR13 _PXAREG(0x40000034) /* DMA Control/Status register for Channel 13 5-41 */ #define DCSR14 _PXAREG(0x40000038) /* DMA Control/Status register for Channel 14 5-41 */ #define DCSR15 _PXAREG(0x4000003C) /* DMA Control/Status register for Channel 15 5-41 */ #define DCSR16 _PXAREG(0x40000040) /* DMA Control/Status register for Channel 16 5-41 */ #define DCSR17 _PXAREG(0x40000044) /* DMA Control/Status register for Channel 17 5-41 */ #define DCSR18 _PXAREG(0x40000048) /* DMA Control/Status register for Channel 18 5-41 */ #define DCSR19 _PXAREG(0x4000004C) /* DMA Control/Status register for Channel 19 5-41 */ #define DCSR20 _PXAREG(0x40000050) /* DMA Control/Status register for Channel 20 5-41 */ #define DCSR21 _PXAREG(0x40000054) /* DMA Control/Status register for Channel 21 5-41 */ #define DCSR22 _PXAREG(0x40000058) /* DMA Control/Status register for Channel 22 5-41 */ #define DCSR23 _PXAREG(0x4000005C) /* DMA Control/Status register for Channel 23 5-41 */ #define DCSR24 _PXAREG(0x40000060) /* DMA Control/Status register for Channel 24 5-41 */ #define DCSR25 _PXAREG(0x40000064) /* DMA Control/Status register for Channel 25 5-41 */ #define DCSR26 _PXAREG(0x40000068) /* DMA Control/Status register for Channel 26 5-41 */ #define DCSR27 _PXAREG(0x4000006C) /* DMA Control/Status register for Channel 27 5-41 */ #define DCSR28 _PXAREG(0x40000070) /* DMA Control/Status register for Channel 28 5-41 */ #define DCSR29 _PXAREG(0x40000074) /* DMA Control/Status register for Channel 29 5-41 */ #define DCSR30 _PXAREG(0x40000078) /* DMA Control/Status register for Channel 30 5-41 */ #define DCSR31 _PXAREG(0x4000007C) /* DMA Control/Status register for Channel 31 5-41 */ #define DALGN _PXAREG(0x400000A0) /* DMA Alignment register 5-49 */ #define DPCSR _PXAREG(0x400000A4) /* DMA Programmed I/O Control Status register 5-51 */ #define DRQSR0 _PXAREG(0x400000E0) /* DMA DREQ<0> Status register 5-40 */ #define DRQSR1 _PXAREG(0x400000E4) /* DMA DREQ<1> Status register 5-40 */ #define DRQSR2 _PXAREG(0x400000E8) /* DMA DREQ<2> Status register 5-40 */ #define DINT _PXAREG(0x400000F0) /* DMA Interrupt register 5-48 */ #define DRCMR0 _PXAREG(0x40000100) /* Request to Channel Map register for DREQ<0> (companion chip request 0) 5-31 */ #define DRCMR1 _PXAREG(0x40000104) /* Request to Channel Map register for DREQ<1> (companion chip request 1) 5-31 */ #define DRCMR2 _PXAREG(0x40000108) /* Request to Channel Map register for I2S receive request 5-31 */ #define DRCMR3 _PXAREG(0x4000010C) /* Request to Channel Map register for I2S transmit request 5-31 */ #define DRCMR4 _PXAREG(0x40000110) /* Request to Channel Map register for BTUART receive request 5-31 */ #define DRCMR5 _PXAREG(0x40000114) /* Request to Channel Map register for BTUART transmit request. 5-31 */ #define DRCMR6 _PXAREG(0x40000118) /* Request to Channel Map register for FFUART receive request 5-31 */ #define DRCMR7 _PXAREG(0x4000011C) /* Request to Channel Map register for FFUART transmit request 5-31 */ #define DRCMR8 _PXAREG(0x40000120) /* Request to Channel Map register for AC 97 microphone request 5-31 */ #define DRCMR9 _PXAREG(0x40000124) /* Request to Channel Map register for AC 97 modem receive request 5-31 */ #define DRCMR10 _PXAREG(0x40000128) /* Request to Channel Map register for AC 97 modem transmit request 5-31 */ #define DRCMR11 _PXAREG(0x4000012C) /* Request to Channel Map register for AC 97 audio receive request 5-31 */ #define DRCMR12 _PXAREG(0x40000130) /* Request to Channel Map register for AC 97 audio transmit request 5-31 */ #define DRCMR13 _PXAREG(0x40000134) /* Request to Channel Map register for SSP1 receive request 5-31 */ #define DRCMR14 _PXAREG(0x40000138) /* Request to Channel Map register for SSP1 transmit request 5-31 */ #define DRCMR15 _PXAREG(0x4000013C) /* Request to Channel Map register for SSP2 receive request 5-31 */ #define DRCMR16 _PXAREG(0x40000140) /* Request to Channel Map register for SSP2 transmit request 5-31 */ #define DRCMR17 _PXAREG(0x40000144) /* Request to Channel Map register for ICP receive request 5-31 */ #define DRCMR18 _PXAREG(0x40000148) /* Request to Channel Map register for ICP transmit request 5-31 */ #define DRCMR19 _PXAREG(0x4000014C) /* Request to Channel Map register for STUART receive request 5-31 */ #define DRCMR20 _PXAREG(0x40000150) /* Request to Channel Map register for STUART transmit request 5-31 */ #define DRCMR21 _PXAREG(0x40000154) /* Request to Channel Map register for MMC/SDIO receive request 5-31 */ #define DRCMR22 _PXAREG(0x40000158) /* Request to Channel Map register for MMC/SDIO transmit request 5-31 */ #define DRCMR24 _PXAREG(0x40000160) /* Request to Channel Map register for USB endpoint 0 request 5-31 */ #define DRCMR25 _PXAREG(0x40000164) /* Request to Channel Map register for USB endpoint A request 5-31 */ #define DRCMR26 _PXAREG(0x40000168) /* Request to Channel Map register for USB endpoint B request 5-31 */ #define DRCMR27 _PXAREG(0x4000016C) /* Request to Channel Map register for USB endpoint C request 5-31 */ #define DRCMR28 _PXAREG(0x40000170) /* Request to Channel Map register for USB endpoint D request 5-31 */ #define DRCMR29 _PXAREG(0x40000174) /* Request to Channel Map register for USB endpoint E request 5-31 */ #define DRCMR30 _PXAREG(0x40000178) /* Request to Channel Map register for USB endpoint F request 5-31 */ #define DRCMR31 _PXAREG(0x4000017C) /* Request to Channel Map register for USB endpoint G request 5-31 */ #define DRCMR32 _PXAREG(0x40000180) /* Request to Channel Map register for USB endpoint H request 5-31 */ #define DRCMR33 _PXAREG(0x40000184) /* Request to Channel Map register for USB endpoint I request 5-31 */ #define DRCMR34 _PXAREG(0x40000188) /* Request to Channel Map register for USB endpoint J request 5-31 */ #define DRCMR35 _PXAREG(0x4000018C) /* Request to Channel Map register for USB endpoint K request 5-31 */ #define DRCMR36 _PXAREG(0x40000190) /* Request to Channel Map register for USB endpoint L request 5-31 */ #define DRCMR37 _PXAREG(0x40000194) /* Request to Channel Map register for USB endpoint M request 5-31 */ #define DRCMR38 _PXAREG(0x40000198) /* Request to Channel Map register for USB endpoint N request 5-31 */ #define DRCMR39 _PXAREG(0x4000019C) /* Request to Channel Map register for USB endpoint P request 5-31 */ #define DRCMR40 _PXAREG(0x400001A0) /* Request to Channel Map register for USB endpoint Q request 5-31 */ #define DRCMR41 _PXAREG(0x400001A4) /* Request to Channel Map register for USB endpoint R request 5-31 */ #define DRCMR42 _PXAREG(0x400001A8) /* Request to Channel Map register for USB endpoint S request 5-31 */ #define DRCMR43 _PXAREG(0x400001AC) /* Request to Channel Map register for USB endpoint T request 5-31 */ #define DRCMR44 _PXAREG(0x400001B0) /* Request to Channel Map register for USB endpoint U request 5-31 */ #define DRCMR45 _PXAREG(0x400001B4) /* Request to Channel Map register for USB endpoint V request 5-31 */ #define DRCMR46 _PXAREG(0x400001B8) /* Request to Channel Map register for USB endpoint W request 5-31 */ #define DRCMR47 _PXAREG(0x400001BC) /* Request to Channel Map register for USB endpoint X request 5-31 */ #define DRCMR48 _PXAREG(0x400001C0) /* Request to Channel Map register for MSL receive request 1 5-31 */ #define DRCMR49 _PXAREG(0x400001C4) /* Request to Channel Map register for MSL transmit request 1 5-31 */ #define DRCMR50 _PXAREG(0x400001C8) /* Request to Channel Map register for MSL receive request 2 5-31 */ #define DRCMR51 _PXAREG(0x400001CC) /* Request to Channel Map register for MSL transmit request 2 5-31 */ #define DRCMR52 _PXAREG(0x400001D0) /* Request to Channel Map register for MSL receive request 3 5-31 */ #define DRCMR53 _PXAREG(0x400001D4) /* Request to Channel Map register for MSL transmit request 3 5-31 */ #define DRCMR54 _PXAREG(0x400001D8) /* Request to Channel Map register for MSL receive request 4 5-31 */ #define DRCMR55 _PXAREG(0x400001DC) /* Request to Channel Map register for MSL transmit request 4 5-31 */ #define DRCMR56 _PXAREG(0x400001E0) /* Request to Channel Map register for MSL receive request 5 5-31 */ #define DRCMR57 _PXAREG(0x400001E4) /* Request to Channel Map register for MSL transmit request 5 5-31 */ #define DRCMR58 _PXAREG(0x400001E8) /* Request to Channel Map register for MSL receive request 6 5-31 */ #define DRCMR59 _PXAREG(0x400001EC) /* Request to Channel Map register for MSL transmit request 6 5-31 */ #define DRCMR60 _PXAREG(0x400001F0) /* Request to Channel Map register for MSL receive request 7 5-31 */ #define DRCMR61 _PXAREG(0x400001F4) /* Request to Channel Map register for MSL transmit request 7 5-31 */ #define DRCMR62 _PXAREG(0x400001F8) /* Request to Channel Map register for USIM receive request 5-31 */ #define DRCMR63 _PXAREG(0x400001FC) /* Request to Channel Map register for USIM transmit request 5-31 */ #define DDADR0 _PXAREG(0x40000200) /* DMA Descriptor Address register for Channel 0 5-32 */ #define DSADR0 _PXAREG(0x40000204) /* DMA Source Address register for Channel 0 5-33 */ #define DTADR0 _PXAREG(0x40000208) /* DMA Target Address register for Channel 0 5-34 */ #define DCMD0 _PXAREG(0x4000020C) /* DMA Command Address register for Channel 0 5-35 */ #define DDADR1 _PXAREG(0x40000210) /* DMA Descriptor Address register for Channel 1 5-32 */ #define DSADR1 _PXAREG(0x40000214) /* DMA Source Address register for Channel 1 5-33 */ #define DTADR1 _PXAREG(0x40000218) /* DMA Target Address register for Channel 1 5-34 */ #define DCMD1 _PXAREG(0x4000021C) /* DMA Command Address register for Channel 1 5-35 */ #define DDADR2 _PXAREG(0x40000220) /* DMA Descriptor Address register for Channel 2 5-32 */ #define DSADR2 _PXAREG(0x40000224) /* DMA Source Address register for Channel 2 5-33 */ #define DTADR2 _PXAREG(0x40000228) /* DMA Target Address register for Channel 2 5-34 */ #define DCMD2 _PXAREG(0x4000022C) /* DMA Command Address register for Channel 2 5-35 */ #define DDADR3 _PXAREG(0x40000230) /* DMA Descriptor Address register for Channel 3 5-32 */ #define DSADR3 _PXAREG(0x40000234) /* DMA Source Address register for Channel 3 5-33 */ #define DTADR3 _PXAREG(0x40000238) /* DMA Target Address register for Channel 3 5-34 */ #define DCMD3 _PXAREG(0x4000023C) /* DMA Command Address register for Channel 3 5-35 */ #define DDADR4 _PXAREG(0x40000240) /* DMA Descriptor Address register for Channel 4 5-32 */ #define DSADR4 _PXAREG(0x40000244) /* DMA Source Address register for Channel 4 5-33 */ #define DTADR4 _PXAREG(0x40000248) /* DMA Target Address register for Channel 4 5-34 */ #define DCMD4 _PXAREG(0x4000024C) /* DMA Command Address register for Channel 4 5-35 */ #define DDADR5 _PXAREG(0x40000250) /* DMA Descriptor Address register for Channel 5 5-32 */ #define DSADR5 _PXAREG(0x40000254) /* DMA Source Address register for Channel 5 5-33 */ #define DTADR5 _PXAREG(0x40000258) /* DMA Target Address register for Channel 5 5-34 */ #define DCMD5 _PXAREG(0x4000025C) /* DMA Command Address register for Channel 5 5-35 */ #define DDADR6 _PXAREG(0x40000260) /* DMA Descriptor Address register for Channel 6 5-32 */ #define DSADR6 _PXAREG(0x40000264) /* DMA Source Address register for Channel 6 5-33 */ #define DTADR6 _PXAREG(0x40000268) /* DMA Target Address register for Channel 6 5-34 */ #define DCMD6 _PXAREG(0x4000026C) /* DMA Command Address register for Channel 6 5-35 */ #define DDADR7 _PXAREG(0x40000270) /* DMA Descriptor Address register for Channel 7 5-32 */ #define DSADR7 _PXAREG(0x40000274) /* DMA Source Address register for Channel 7 5-33 */ #define DTADR7 _PXAREG(0x40000278) /* DMA Target Address register for Channel 7 5-34 */ #define DCMD7 _PXAREG(0x4000027C) /* DMA Command Address register for Channel 7 5-35 */ #define DDADR8 _PXAREG(0x40000280) /* DMA Descriptor Address register for Channel 8 5-32 */ #define DSADR8 _PXAREG(0x40000284) /* DMA Source Address register for Channel 8 5-33 */ #define DTADR8 _PXAREG(0x40000288) /* DMA Target Address register for Channel 8 5-34 */ #define DCMD8 _PXAREG(0x4000028C) /* DMA Command Address register for Channel 8 5-35 */ #define DDADR9 _PXAREG(0x40000290) /* DMA Descriptor Address register for Channel 9 5-32 */ #define DSADR9 _PXAREG(0x40000294) /* DMA Source Address register for Channel 9 5-33 */ #define DTADR9 _PXAREG(0x40000298) /* DMA Target Address register for Channel 9 5-34 */ #define DCMD9 _PXAREG(0x4000029C) /* DMA Command Address register for Channel 9 5-35 */ #define DDADR10 _PXAREG(0x400002A0) /* DMA Descriptor Address register for Channel 10 5-32 */ #define DSADR10 _PXAREG(0x400002A4) /* DMA Source Address register for Channel 10 5-33 */ #define DTADR10 _PXAREG(0x400002A8) /* DMA Target Address register for Channel 10 5-34 */ #define DCMD10 _PXAREG(0x400002AC) /* DMA Command Address register for Channel 10 5-35 */ #define DDADR11 _PXAREG(0x400002B0) /* DMA Descriptor Address register for Channel 11 5-32 */ #define DSADR11 _PXAREG(0x400002B4) /* DMA Source Address register for Channel 11 5-33 */ #define DTADR11 _PXAREG(0x400002B8) /* DMA Target Address register for Channel 11 5-34 */ #define DCMD11 _PXAREG(0x400002BC) /* DMA Command Address register for Channel 11 5-35 */ #define DDADR12 _PXAREG(0x400002C0) /* DMA Descriptor Address register for Channel 12 5-32 */ #define DSADR12 _PXAREG(0x400002C4) /* DMA Source Address register for Channel 12 5-33 */ #define DTADR12 _PXAREG(0x400002C8) /* DMA Target Address register for Channel 12 5-34 */ #define DCMD12 _PXAREG(0x400002CC) /* DMA Command Address register for Channel 12 5-35 */ #define DDADR13 _PXAREG(0x400002D0) /* DMA Descriptor Address register for Channel 13 5-32 */ #define DSADR13 _PXAREG(0x400002D4) /* DMA Source Address register for Channel 13 5-33 */ #define DTADR13 _PXAREG(0x400002D8) /* DMA Target Address register for Channel 13 5-34 */ #define DCMD13 _PXAREG(0x400002DC) /* DMA Command Address register for Channel 13 5-35 */ #define DDADR14 _PXAREG(0x400002E0) /* DMA Descriptor Address register for Channel 14 5-32 */ #define DSADR14 _PXAREG(0x400002E4) /* DMA Source Address register for Channel 14 5-33 */ #define DTADR14 _PXAREG(0x400002E8) /* DMA Target Address register for Channel 14 5-34 */ #define DCMD14 _PXAREG(0x400002EC) /* DMA Command Address register for Channel 14 5-35 */ #define DDADR15 _PXAREG(0x400002F0) /* DMA Descriptor Address register for Channel 15 5-32 */ #define DSADR15 _PXAREG(0x400002F4) /* DMA Source Address register for Channel 15 5-33 */ #define DTADR15 _PXAREG(0x400002F8) /* DMA Target Address register for Channel 15 5-34 */ #define DCMD15 _PXAREG(0x400002FC) /* DMA Command Address register for Channel 15 5-35 */ #define DDADR16 _PXAREG(0x40000300) /* DMA Descriptor Address register for Channel 16 5-32 */ #define DSADR16 _PXAREG(0x40000304) /* DMA Source Address register for Channel 16 5-33 */ #define DTADR16 _PXAREG(0x40000308) /* DMA Target Address register for Channel 16 5-34 */ #define DCMD16 _PXAREG(0x4000030C) /* DMA Command Address register for Channel 16 5-35 */ #define DDADR17 _PXAREG(0x40000310) /* DMA Descriptor Address register for Channel 17 5-32 */ #define DSADR17 _PXAREG(0x40000314) /* DMA Source Address register for Channel 17 5-33 */ #define DTADR17 _PXAREG(0x40000318) /* DMA Target Address register for Channel 17 5-34 */ #define DCMD17 _PXAREG(0x4000031C) /* DMA Command Address register for Channel 17 5-35 */ #define DDADR18 _PXAREG(0x40000320) /* DMA Descriptor Address register for Channel 18 5-32 */ #define DSADR18 _PXAREG(0x40000324) /* DMA Source Address register for Channel 18 5-33 */ #define DTADR18 _PXAREG(0x40000328) /* DMA Target Address register for Channel 18 5-34 */ #define DCMD18 _PXAREG(0x4000032C) /* DMA Command Address register for Channel 18 5-35 */ #define DDADR19 _PXAREG(0x40000330) /* DMA Descriptor Address register for Channel 19 5-32 */ #define DSADR19 _PXAREG(0x40000334) /* DMA Source Address register for Channel 19 5-33 */ #define DTADR19 _PXAREG(0x40000338) /* DMA Target Address register for Channel 19 5-34 */ #define DCMD19 _PXAREG(0x4000033C) /* DMA Command Address register for Channel 19 5-35 */ #define DDADR20 _PXAREG(0x40000340) /* DMA Descriptor Address register for Channel 20 5-32 */ #define DSADR20 _PXAREG(0x40000344) /* DMA Source Address register for Channel 20 5-33 */ #define DTADR20 _PXAREG(0x40000348) /* DMA Target Address register for Channel 20 5-34 */ #define DCMD20 _PXAREG(0x4000034C) /* DMA Command Address register for Channel 20 5-35 */ #define DDADR21 _PXAREG(0x40000350) /* DMA Descriptor Address register for Channel 21 5-32 */ #define DSADR21 _PXAREG(0x40000354) /* DMA Source Address register for Channel 21 5-33 */ #define DTADR21 _PXAREG(0x40000358) /* DMA Target Address register for Channel 21 5-34 */ #define DCMD21 _PXAREG(0x4000035C) /* DMA Command Address register for Channel 21 5-35 */ #define DDADR22 _PXAREG(0x40000360) /* DMA Descriptor Address register for Channel 22 5-32 */ #define DSADR22 _PXAREG(0x40000364) /* DMA Source Address register for Channel 22 5-33 */ #define DTADR22 _PXAREG(0x40000368) /* DMA Target Address register for Channel 22 5-34 */ #define DCMD22 _PXAREG(0x4000036C) /* DMA Command Address register for Channel 22 5-35 */ #define DDADR23 _PXAREG(0x40000370) /* DMA Descriptor Address register for Channel 23 5-32 */ #define DSADR23 _PXAREG(0x40000374) /* DMA Source Address register for Channel 23 5-33 */ #define DTADR23 _PXAREG(0x40000378) /* DMA Target Address register for Channel 23 5-34 */ #define DCMD23 _PXAREG(0x4000037C) /* DMA Command Address register for Channel 23 5-35 */ #define DDADR24 _PXAREG(0x40000380) /* DMA Descriptor Address register for Channel 24 5-32 */ #define DSADR24 _PXAREG(0x40000384) /* DMA Source Address register for Channel 24 5-33 */ #define DTADR24 _PXAREG(0x40000388) /* DMA Target Address register for Channel 24 5-34 */ #define DCMD24 _PXAREG(0x4000038C) /* DMA Command Address register for Channel 24 5-35 */ #define DDADR25 _PXAREG(0x40000390) /* DMA Descriptor Address register for Channel 25 5-32 */ #define DSADR25 _PXAREG(0x40000394) /* DMA Source Address register for Channel 25 5-33 */ #define DTADR25 _PXAREG(0x40000398) /* DMA Target Address register for Channel 25 5-34 */ #define DCMD25 _PXAREG(0x4000039C) /* DMA Command Address register for Channel 25 5-35 */ #define DDADR26 _PXAREG(0x400003A0) /* DMA Descriptor Address register for Channel 26 5-32 */ #define DSADR26 _PXAREG(0x400003A4) /* DMA Source Address register for Channel 26 5-33 */ #define DTADR26 _PXAREG(0x400003A8) /* DMA Target Address register for Channel 26 5-34 */ #define DCMD26 _PXAREG(0x400003AC) /* DMA Command Address register for Channel 26 5-35 */ #define DDADR27 _PXAREG(0x400003B0) /* DMA Descriptor Address register for Channel 27 5-32 */ #define DSADR27 _PXAREG(0x400003B4) /* DMA Source Address register for Channel 27 5-33 */ #define DTADR27 _PXAREG(0x400003B8) /* DMA Target Address register for Channel 27 5-34 */ #define DCMD27 _PXAREG(0x400003BC) /* DMA Command Address register for Channel 27 5-35 */ #define DDADR28 _PXAREG(0x400003C0) /* DMA Descriptor Address register for Channel 28 5-32 */ #define DSADR28 _PXAREG(0x400003C4) /* DMA Source Address register for Channel 28 5-33 */ #define DTADR28 _PXAREG(0x400003C8) /* DMA Target Address register for Channel 28 5-34 */ #define DCMD28 _PXAREG(0x400003CC) /* DMA Command Address register for Channel 28 5-35 */ #define DDADR29 _PXAREG(0x400003D0) /* DMA Descriptor Address register for Channel 29 5-32 */ #define DSADR29 _PXAREG(0x400003D4) /* DMA Source Address register for Channel 29 5-33 */ #define DTADR29 _PXAREG(0x400003D8) /* DMA Target Address register for Channel 29 5-34 */ #define DCMD29 _PXAREG(0x400003DC) /* DMA Command Address register for Channel 29 5-35 */ #define DDADR30 _PXAREG(0x400003E0) /* DMA Descriptor Address register for Channel 30 5-32 */ #define DSADR30 _PXAREG(0x400003E4) /* DMA Source Address register for Channel 30 5-33 */ #define DTADR30 _PXAREG(0x400003E8) /* DMA Target Address register for Channel 30 5-34 */ #define DCMD30 _PXAREG(0x400003EC) /* DMA Command Address register for Channel 30 5-35 */ #define DDADR31 _PXAREG(0x400003F0) /* DMA Descriptor Address register for Channel 31 5-32 */ #define DSADR31 _PXAREG(0x400003F4) /* DMA Source Address register for Channel 31 5-33 */ #define DTADR31 _PXAREG(0x400003F8) /* DMA Target Address register for Channel 31 5-34 */ #define DCMD31 _PXAREG(0x400003FC) /* DMA Command Address register for Channel 31 5-35 */ #define DRCMR64 _PXAREG(0x40001100) /* Request to Channel Map register for Memory Stick receive request 5-31 */ #define DRCMR65 _PXAREG(0x40001104) /* Request to Channel Map register for Memory Stick transmit request 5-31 */ #define DRCMR66 _PXAREG(0x40001108) /* Request to Channel Map register for SSP3 receive request 5-31 */ #define DRCMR67 _PXAREG(0x4000110C) /* Request to Channel Map register for SSP3 transmit request 5-31 */ #define DRCMR68 _PXAREG(0x40001110) /* Request to Channel Map register for Quick Capture Interface Receive Request 0 5-31 */ #define DRCMR69 _PXAREG(0x40001114) /* Request to Channel Map register for Quick Capture Interface Receive Request 1 5-31 */ #define DRCMR70 _PXAREG(0x40001118) /* Request to Channel Map register for Quick Capture Interface Receive Request 2 5-31 */ #define DRCMR74 _PXAREG(0x40001128) /* Request to Channel Map register for DREQ<2> (companion chip request 2) 5-31 */ #define FLYCNFG _PXAREG(0x48000020) /* Fly-by DMA DVAL<1:0> polarities 5-39 */ // DMA Register shortcuts #define DCSR(_ch) _PXAREG_OFFSET(&DCSR0,((_ch) << 2)) #define DRQSR(_line) _PXAREG_OFFSET(&DRQSR0,((_line) << 2)) #define DRCMR(_dev) *(((_dev) < 63) ? (&_PXAREG_OFFSET(&DRCMR0, (((_dev) & 0x3f) << 2))) \ : (&_PXAREG_OFFSET(&DRCMR64,(((_dev) & 0x3f) << 2)))) #define DDADR(_ch) _PXAREG_OFFSET(&DDADR0,((_ch) << 4)) #define DSADR(_ch) _PXAREG_OFFSET(&DSADR0,((_ch) << 4)) #define DTADR(_ch) _PXAREG_OFFSET(&DTADR0,((_ch) << 4)) #define DCMD(_ch) _PXAREG_OFFSET(&DCMD0,((_ch) << 4)) #define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */ #define DDADR_STOP (1 << 0) /* Stop (read / write) */ #define DRCMR_MAPVLD (1 << 7) /* Map Valid Channel */ #define DRCMR_CHLNUM(_ch) ((_ch) & 0x1f) #define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ #define DCSR_NODESCFETCH (1 << 30) /* No-Descriptor Fetch (read / write) */ #define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enabled */ #define DCSR_EORIRQEN (1 << 28) /* End-of-Receive Interrupt Enable */ #define DCSR_EORJMPEN (1 << 27) /* Jump to Next Descriptor on EOR */ #define DCSR_EORSTOPEN (1 << 26) /* Stop Channel on EOR */ #define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ #define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ #define DCSR_RASIRQEN (1 << 23) /* Request After Channel Stoopped Interrupt Enable */ #define DCSR_MASKRUN (1 << 22) /* Mask Run */ #define DCSR_CMPST (1 << 10) /* Descriptor Compare Status */ #define DCSR_EORINT (1 << 9) /* End of Recieve */ #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ #define DCSR_RASINTR (1 << 4) /* Request After Channel Stopped */ #define DCSR_STOPINTR (1 << 3) /* Stop Interrupt */ #define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ #define DCSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write) */ #define DRQSR_CLR (1 << 8) /* Clear Pending Requests */ #define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ #define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ #define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ #define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ #define DCMD_CMPEN (1 << 25) /* Descriptor Compare Enable */ #define DCMD_ADDRMODE (1 << 23) /* Addressing Mode */ #define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ #define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ #define DCMD_FLYBYS (1 << 20) /* Fly-By Source */ #define DCMD_FLYBYT (1 << 19) /* Fly-By Target */ #define DCMD_BURST8 (1 << 16) /* 8 byte burst */ #define DCMD_BURST16 (2 << 16) /* 16 byte burst */ #define DCMD_BURST32 (3 << 16) /* 32 byte burst */ #define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ #define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ #define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ #define DCMD_SIZE(_x) (((_x) & 0x3)<<16) /* Burst Size */ #define DCMD_MAXSIZE DCMD_SIZE(3) #define DCMD_WIDTH(_x) (((_x) & 0x3)<<14) /* Peripheral Width */ #define DCMD_MAXWIDTH DCMD_WIDTH(3) #define DCMD_LEN(_x) (((_x) & 0x1fff)) /* Length of transfer (0 for descriptor ops) */ #define DCMD_MAXLEN DCMD_LEN(0x1fff) #define DMAREQ_DREQ0 (0) #define DMAREQ_DREQ1 (1) #define DMAREQ_I2S_RECV (2) #define DMAREQ_I2S_XMT (3) #define DMAREQ_BTUART_RECV (4) #define DMAREQ_BTUART_XMT (5) #define DMAREQ_FFUAR_RECV (6) #define DMAREQ_FFUART_XMT (7) #define DMAREQ_AC97_MICR (8) #define DMAREQ_AC97_MODEM_RECV (9) #define DMAREQ_AC97_MODEM_XMT (10) #define DMAREQ_AC97_AUDIO_RECV (11) #define DMAREQ_AC97_AUDIO_XMT (12) #define DMAREQ_SSP1_RECV (13) #define DMAREQ_SSP1_XMT (14) #define DMAREQ_SSP2_RECV (15) #define DMAREQ_SSP2_XMT (16) #define DMAREQ_ICP_RECV (17) #define DMAREQ_ICP_XMT (18) #define DMAREQ_STUART_RECV (19) #define DMAREQ_STUART_XMT (20) #define DMAREQ_MMCSDIO_RECV (21) #define DMAREQ_MMCSDIO_XMT (22) #define DMAREQ_USB_EP_0 (24) #define DMAREQ_USB_EP_A (25) #define DMAREQ_USB_EP_B (26) #define DMAREQ_USB_EP_C (27) #define DMAREQ_USB_EP_D (28) #define DMAREQ_USB_EP_E (29) #define DMAREQ_USB_EP_F (30) #define DMAREQ_USB_EP_G (31) #define DMAREQ_USB_EP_H (32) #define DMAREQ_USB_EP_I (33) #define DMAREQ_USB_EP_J (34) #define DMAREQ_USB_EP_K (35) #define DMAREQ_USB_EP_L (36) #define DMAREQ_USB_EP_M (37) #define DMAREQ_USB_EP_N (38) #define DMAREQ_USB_EP_P (39) #define DMAREQ_USB_EP_Q (40) #define DMAREQ_USB_EP_R (41) #define DMAREQ_USB_EP_S (42) #define DMAREQ_USB_EP_T (43) #define DMAREQ_USB_EP_U (44) #define DMAREQ_USB_EP_V (45) #define DMAREQ_USB_EP_W (46) #define DMAREQ_USB_EP_X (47) #define DMAREQ_MSL_RECV_1 (48) #define DMAREQ_MSL_XMT_1 (49) #define DMAREQ_MSL_RECV_2 (50) #define DMAREQ_MSL_XMT_2 (51) #define DMAREQ_MSL_RECV_3 (52) #define DMAREQ_MSL_XMT_3 (53) #define DMAREQ_MSL_RECV_4 (54) #define DMAREQ_MSL_XMT_4 (55) #define DMAREQ_MSL_RECV_5 (56) #define DMAREQ_MSL_XMT_5 (57) #define DMAREQ_MSL_RECV_6 (58) #define DMAREQ_MSL_XMT_6 (59) #define DMAREQ_MSL_RECV_7 (60) #define DMAREQ_MSL_XMT_7 (61) #define DMAREQ_USIM_RECV (62) #define DMAREQ_USIM_XMT (63) #define DMAREQ_MEMSTICK_RECV (64) #define DMAREQ_MEMSTICK_XMT (65) #define DMAREQ_SSP3_RECV (66) #define DMAREQ_SSP3_XMT (67) #define DMAREQ_CIF_RECV_0 (68) #define DMAREQ_CIF_RECV_1 (69) #define DMAREQ_CIF_RECV_2 (70) #define DMAREQ_DREQ2 (74) /******************************************************************************/ /* Full-Function UART */ /******************************************************************************/ #define FFRBR _PXAREG(0x40100000) /* Receive Buffer register 10-13 */ #define FFTHR _PXAREG(0x40100000) /* Transmit Holding register 10-14 */ #define FFDLL _PXAREG(0x40100000) /* Divisor Latch register, low byte 10-14 */ #define FFIER _PXAREG(0x40100004) /* Interrupt Enable register 10-15 */ #define FFDLH _PXAREG(0x40100004) /* Divisor Latch register, high byte 10-14 */ #define FFIIR _PXAREG(0x40100008) /* Interrupt ID register 10-17 */ #define FFFCR _PXAREG(0x40100008) /* FIFO Control register 10-19 */ #define FFLCR _PXAREG(0x4010000C) /* Line Control register 10-25 */ #define FFMCR _PXAREG(0x40100010) /* Modem Control register 10-29 */ #define FFLSR _PXAREG(0x40100014) /* Line Status register 10-26 */ #define FFMSR _PXAREG(0x40100018) /* Modem Status register 10-31 */ #define FFSPR _PXAREG(0x4010001C) /* Scratch Pad register 10-33 */ #define FFISR _PXAREG(0x40100020) /* Infrared Select register 10-33 */ #define FFFOR _PXAREG(0x40100024) /* Receive FIFO Occupancy register 10-22 */ #define FFABR _PXAREG(0x40100028) /* Auto-baud Control register 10-23 */ #define FFACR _PXAREG(0x4010002C) /* Auto-baud Count register 10-24 */ /******************************************************************************/ /* Bluetooth UART */ /******************************************************************************/ #define BTRBR _PXAREG(0x40200000) /* Receive Buffer register 10-13 */ #define BTTHR _PXAREG(0x40200000) /* Transmit Holding register 10-14 */ #define BTDLL _PXAREG(0x40200000) /* Divisor Latch register, low byte 10-14 */ #define BTIER _PXAREG(0x40200004) /* Interrupt Enable register 10-15 */ #define BTDLH _PXAREG(0x40200004) /* Divisor Latch register, high byte 10-14 */ #define BTIIR _PXAREG(0x40200008) /* Interrupt ID register 10-17 */ #define BTFCR _PXAREG(0x40200008) /* FIFO Control register 10-19 */ #define BTLCR _PXAREG(0x4020000C) /* Line Control register 10-25 */ #define BTMCR _PXAREG(0x40200010) /* Modem Control register 10-29 */ #define BTLSR _PXAREG(0x40200014) /* Line Status register 10-26 */ #define BTMSR _PXAREG(0x40200018) /* Modem Status register 10-31 */ #define BTSPR _PXAREG(0x4020001C) /* Scratch Pad register 10-33 */ #define BTISR _PXAREG(0x40200020) /* Infrared Select register 10-33 */ #define BTFOR _PXAREG(0x40200024) /* Receive FIFO Occupancy register 10-22 */ #define BTABR _PXAREG(0x40200028) /* Auto-Baud Control register 10-23 */ #define BTACR _PXAREG(0x4020002C) /* Auto-Baud Count register 10-24 */ #define IER_DMAE (1 << 7) /* DMA Requests Enable */ #define IER_UUE (1 << 6) /* UART Unit Enable */ #define IER_NRZE (1 << 5) /* NRZ coding Enable */ #define IER_RTIOE (1 << 4) /* Receiver Time Out Interrupt Enable */ #define IER_MIE (1 << 3) /* Modem Interrupt Enable */ #define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */ #define IER_TIE (1 << 1) /* Transmit Data request Interrupt Enable */ #define IER_RAVIE (1 << 0) /* Receiver Data Available Interrupt Enable */ #define IIR_FIFOES1 (1 << 7) /* FIFO Mode Enable Status */ #define IIR_FIFOES0 (1 << 6) /* FIFO Mode Enable Status */ #define IIR_TOD (1 << 3) /* Time Out Detected */ #define IIR_IID_MASK (0x3 << 1) /* Interrupt Source Encoded */ #define IIR_IP (1 << 0) /* Interrupt Pending (active low) */ #define FCR_ITL(_x) ((_x) << 6) /* Interrupt Trigger Level */ #define FCR_BUS (1 << 5) /* 32-Bit Peripheral Bus */ #define FCR_TRAIL (1 << 4) /* Trailing Bytes */ #define FCR_TIL (1 << 3) /* Transmitter Interrupt Level */ #define FCR_RESETTF (1 << 2) /* Reset Transmitter FIFO */ #define FCR_RESETRF (1 << 1) /* Reset Receiver FIFO */ #define FCR_TRFIFOE (1 << 0) /* Transmit and Receive FIFO Enable */ #define ABR_ABT (1 << 3) /* Auto-Baud Rate Calculation */ #define ABR_ABUP (1 << 2) /* Auto-Baud Programmer */ #define ABR_ABLIE (1 << 1) /* Auto-Baud Interrupt */ #define ABR_ABE (1 << 0) /* Auto-Baud Enable */ #define LCR_DLAB (1 << 7) /* Divisor Latch Access */ #define LCR_SB (1 << 6) /* Set Break */ #define LCR_STKYP (1 << 5) /* Sticky Parity */ #define LCR_EPS (1 << 4) /* Even Parity Select */ #define LCR_PEN (1 << 3) /* Parity Enable */ #define LCR_STB (1 << 2) /* Stop Bit */ #define LCR_WLS(_x) ((_x) << 0) /* Word Length Select */ #define LSR_FIFOE (1 << 7) /* FIFO Error Status */ #define LSR_TEMT (1 << 6) /* Transmitter Empty */ #define LSR_TDRQ (1 << 5) /* Transmit Data Request */ #define LSR_BI (1 << 4) /* Break Interrupt */ #define LSR_FE (1 << 3) /* Framing Error */ #define LSR_PE (1 << 2) /* Parity Error */ #define LSR_OE (1 << 1) /* Overrun Error */ #define LSR_DR (1 << 0) /* Data Ready */ #define MCR_AFE (1 << 5) /* Auto-Flow Control Enable */ #define MCR_LOOP (1 << 4) /* Loopback Mode */ #define MCR_OUT2 (1 << 3) /* OUT2 Signal control */ #define MCR_OUT1 (1 << 2) /* Test Bit */ #define MCR_RTS (1 << 1) /* Request to Send */ #define MCR_DTR (1 << 0) /* Data Terminal Ready */ #define MSR_DCD (1 << 7) /* Data Carrier Detect */ #define MSR_RI (1 << 6) /* Ring Indicator */ #define MSR_DSR (1 << 5) /* Data Set Ready */ #define MSR_CTS (1 << 4) /* Clear To Send */ #define MSR_DDCD (1 << 3) /* Delta Data Carrier Detect */ #define MSR_TERI (1 << 2) /* Trailing Edge Ring Indicator */ #define MSR_DDSR (1 << 1) /* Delta Data Set Ready */ #define MSR_DCTS (1 << 0) /* Delta Clear To Send */ #define ISR_RXPL (1 << 4) /* Receive Data Polarity */ #define ISR_TXPL (1 << 3) /* Transmit Data Polarity */ #define ISR_XMODE (1 << 2) /* Transmit Pulse Width Select */ #define ISR_RCVEIR (1 << 1) /* Receiver SIR Enable */ #define ISR_XMITIR (1 << 0) /* Transmitter SIR Enable */ /******************************************************************************/ /* Standard I2C */ /******************************************************************************/ #define IBMR _PXAREG(0x40301680) /* I2C Bus Monitor register 9-30 */ #define IDBR _PXAREG(0x40301688) /* I2C Data Buffer register 9-29 */ #define ICR _PXAREG(0x40301690) /* I2C Control register 9-23 */ #define ISR _PXAREG(0x40301698) /* I2C Status register 9-26 */ #define ISAR _PXAREG(0x403016A0) /* I2C Slave Address register 9-28 */ /* I2C - Control Register */ #define ICR_FM (1 << 15) /* Fast Mode */ #define ICR_UR (1 << 14) /* Unit Reset */ #define ICR_SADIE (1 << 13) /* Slave Address Detected Interrupt Enable */ #define ICR_ALDIE (1 << 12) /* Arbitratino Loss Detected Interrupt Enable */ #define ICR_SSDIE (1 << 11) /* Slave STOP Detected Interrupt Enable */ #define ICR_BEIE (1 << 10) /* Bus Error Interrupt Enable */ #define ICR_DRFIE (1 << 9) /* DBR Receive Full Interupt Enable */ #define ICR_ITEIE (1 << 8) /* IDBR Transmit Empty Interrupt Enable */ #define ICR_GCD (1 << 7) /* General Call Disable */ #define ICR_IUE (1 << 6) /* I2C Unit Enable */ #define ICR_SCLE (1 << 5) /* SCL Enable */ #define ICR_MA (1 << 4) /* Master Abort */ #define ICR_TB (1 << 3) /* Transfer Byte */ #define ICR_ACKNAK (1 << 2) /* Positive/Negative Acknowledge */ #define ICR_STOP (1 << 1) /* Stop */ #define ICR_START (1 << 0) /* Start */ /* I2C - Status Register */ #define ISR_BED (1 << 10) /* Bus Error Detected */ #define ISR_SAD (1 << 9) /* Slave Address Detected */ #define ISR_GCAD (1 << 8) /* General Call Address Detected */ #define ISR_IRF (1 << 7) /* IDBR Receive Full */ #define ISR_ITE (1 << 6) /* IDBR Transmit Empty */ #define ISR_ALD (1 << 5) /* Arbitration Loss Detection */ #define ISR_SSD (1 << 4) /* Slave STOP Detected */ #define ISR_IBB (1 << 3) /* I2C Bus Busy */ #define ISR_UB (1 << 2) /* Unit Busy */ #define ISR_ACKNAK (1 << 1) /* Ack/Nack Status */ #define ISR_RWM (1 << 0) /* Read/Write Mode */ /* I2C - Bus Monitor Register */ #define IBMR_SCL (1 << 1) /* Continousely reflects the value of the SCL pin */ #define IBMR_SDA (1 << 0) /* Continousely reflects the value of the SDA pin */ /******************************************************************************/ /* I2S Controller */ /******************************************************************************/ #define SACR0 _PXAREG(0x40400000) /* Serial Audio Global Control register 14-10 */ #define SACR1 _PXAREG(0x40400004) /* Serial Audio I2S/MSB-Justified Control register 14-13 */ #define SASR0 _PXAREG(0x4040000C) /* Serial Audio I2S/MSB-Justified Interface and FIFO Status register 14-14 */ #define SAIMR _PXAREG(0x40400014) /* Serial Audio Interrupt Mask register 14-18 */ #define SAICR _PXAREG(0x40400018) /* Serial Audio Interrupt Clear register 14-17 */ #define SADIV _PXAREG(0x40400060) /* Audio Clock Divider register 14-16 */ #define SADR _PXAREG(0x40400080) /* Serial Audio Data register (TX and RX FIFO access register). 14-18 */ /******************************************************************************/ /* USB Client Controller */ /******************************************************************************/ #define UDCCR _PXAREG(0x40600000) /* UDC Control register 12-31 */ #define UDCICR0 _PXAREG(0x40600004) /* UDC Interrupt Control register 0 12-35 */ #define UDCICR1 _PXAREG(0x40600008) /* UDC Interrupt Control register 1 12-35 */ #define UDCISR0 _PXAREG(0x4060000C) /* UDC Interrupt Status register 0 12-49 */ #define UDCISR1 _PXAREG(0x40600010) /* UDC Interrupt Status register 1 12-49 */ #define UDCFNR _PXAREG(0x40600014) /* UDC Frame Number register 12-52 */ #define UDCOTGICR _PXAREG(0x40600018) /* UDC OTG Interrupt Control register 12-35 */ #define UDCOTGISR _PXAREG(0x4060001C) /* UDC OTG Interrupt Status register 12-49 */ #define UP2OCR _PXAREG(0x40600020) /* USB Port 2 Output Control register 12-41 */ #define UP3OCR _PXAREG(0x40600024) /* USB Port 3 Output Control register 12-47 */ #define UDCCSR0 _PXAREG(0x40600100) /* UDC Control/Status register-Endpoint 0 12-53 */ #define UDCCSRA _PXAREG(0x40600104) /* UDC Control/Status register-Endpoint A 12-56 */ #define UDCCSRB _PXAREG(0x40600108) /* UDC Control/Status register-Endpoint B 12-56 */ #define UDCCSRC _PXAREG(0x4060010C) /* UDC Control/Status register-Endpoint C 12-56 */ #define UDCCSRD _PXAREG(0x40600110) /* UDC Control/Status register-Endpoint D 12-56 */ #define UDCCSRE _PXAREG(0x40600114) /* UDC Control/Status register-Endpoint E 12-56 */ #define UDCCSRF _PXAREG(0x40600118) /* UDC Control/Status register-Endpoint F 12-56 */ #define UDCCSRG _PXAREG(0x4060011C) /* UDC Control/Status register-Endpoint G 12-56 */ #define UDCCSRH _PXAREG(0x40600120) /* UDC Control/Status register-Endpoint H 12-56 */ #define UDCCSRI _PXAREG(0x40600124) /* UDC Control/Status register-Endpoint I 12-56 */ #define UDCCSRJ _PXAREG(0x40600128) /* UDC Control/Status register-Endpoint J 12-56 */ #define UDCCSRK _PXAREG(0x4060012C) /* UDC Control/Status register-Endpoint K 12-56 */ #define UDCCSRL _PXAREG(0x40600130) /* UDC Control/Status register-Endpoint L 12-56 */ #define UDCCSRM _PXAREG(0x40600134) /* UDC Control/Status register-Endpoint M 12-56 */ #define UDCCSRN _PXAREG(0x40600138) /* UDC Control/Status register-Endpoint N 12-56 */ #define UDCCSRP _PXAREG(0x4060013C) /* UDC Control/Status register-Endpoint P 12-56 */ #define UDCCSRQ _PXAREG(0x40600140) /* UDC Control/Status register-Endpoint Q 12-56 */ #define UDCCSRR _PXAREG(0x40600144) /* UDC Control/Status register-Endpoint R 12-56 */ #define UDCCSRS _PXAREG(0x40600148) /* UDC Control/Status register-Endpoint S 12-56 */ #define UDCCSRT _PXAREG(0x4060014C) /* UDC Control/Status register-Endpoint T 12-56 */ #define UDCCSRU _PXAREG(0x40600150) /* UDC Control/Status register-Endpoint U 12-56 */ #define UDCCSRV _PXAREG(0x40600154) /* UDC Control/Status register-Endpoint V 12-56 */ #define UDCCSRW _PXAREG(0x40600158) /* UDC Control/Status register-Endpoint W 12-56 */ #define UDCCSRX _PXAREG(0x4060015C) /* UDC Control/Status register-Endpoint X 12-56 */ #define UDCBCR0 _PXAREG(0x40600200) /* UDC Byte Count register-Endpoint 0 12-62 */ #define UDCBCRA _PXAREG(0x40600204) /* UDC Byte Count register-Endpoint A 12-62 */ #define UDCBCRB _PXAREG(0x40600208) /* UDC Byte Count register-Endpoint B 12-62 */ #define UDCBCRC _PXAREG(0x4060020C) /* UDC Byte Count register-Endpoint C 12-62 */ #define UDCBCRD _PXAREG(0x40600210) /* UDC Byte Count register-Endpoint D 12-62 */ #define UDCBCRE _PXAREG(0x40600214) /* UDC Byte Count register-Endpoint E 12-62 */ #define UDCBCRF _PXAREG(0x40600218) /* UDC Byte Count register-Endpoint F 12-62 */ #define UDCBCRG _PXAREG(0x4060021C) /* UDC Byte Count register-Endpoint G 12-62 */ #define UDCBCRH _PXAREG(0x40600220) /* UDC Byte Count register-Endpoint H 12-62 */ #define UDCBCRI _PXAREG(0x40600224) /* UDC Byte Count register-Endpoint I 12-62 */ #define UDCBCRJ _PXAREG(0x40600228) /* UDC Byte Count register-Endpoint J 12-62 */ #define UDCBCRK _PXAREG(0x4060022C) /* UDC Byte Count register-Endpoint K 12-62 */ #define UDCBCRL _PXAREG(0x40600230) /* UDC Byte Count register-Endpoint L 12-62 */ #define UDCBCRM _PXAREG(0x40600234) /* UDC Byte Count register-Endpoint M 12-62 */ #define UDCBCRN _PXAREG(0x40600238) /* UDC Byte Count register-Endpoint N 12-62 */ #define UDCBCRP _PXAREG(0x4060023C) /* UDC Byte Count register-Endpoint P 12-62 */ #define UDCBCRQ _PXAREG(0x40600240) /* UDC Byte Count register-Endpoint Q 12-62 */ #define UDCBCRR _PXAREG(0x40600244) /* UDC Byte Count register-Endpoint R 12-62 */ #define UDCBCRS _PXAREG(0x40600248) /* UDC Byte Count register-Endpoint S 12-62 */ #define UDCBCRT _PXAREG(0x4060024C) /* UDC Byte Count register-Endpoint T 12-62 */ #define UDCBCRU _PXAREG(0x40600250) /* UDC Byte Count register-Endpoint U 12-62 */ #define UDCBCRV _PXAREG(0x40600254) /* UDC Byte Count register-Endpoint V 12-62 */ #define UDCBCRW _PXAREG(0x40600258) /* UDC Byte Count register-Endpoint W 12-62 */ #define UDCBCRX _PXAREG(0x4060025C) /* UDC Byte Count register-Endpoint X 12-62 */ #define UDCDR0 _PXAREG(0x40600300) /* UDC Data register-Endpoint 0 12-62 */ #define UDCDRA _PXAREG(0x40600304) /* UDC Data register-Endpoint A 12-62 */ #define UDCDRB _PXAREG(0x40600308) /* UDC Data register-Endpoint B 12-62 */ #define UDCDRC _PXAREG(0x4060030C) /* UDC Data register-Endpoint C 12-62 */ #define UDCDRD _PXAREG(0x40600310) /* UDC Data register-Endpoint D 12-62 */ #define UDCDRE _PXAREG(0x40600314) /* UDC Data register-Endpoint E 12-62 */ #define UDCDRF _PXAREG(0x40600318) /* UDC Data register-Endpoint F 12-62 */ #define UDCDRG _PXAREG(0x4060031C) /* UDC Data register-Endpoint G 12-62 */ #define UDCDRH _PXAREG(0x40600320) /* UDC Data register-Endpoint H 12-62 */ #define UDCDRI _PXAREG(0x40600324) /* UDC Data register-Endpoint I 12-62 */ #define UDCDRJ _PXAREG(0x40600328) /* UDC Data register-Endpoint J 12-62 */ #define UDCDRK _PXAREG(0x4060032C) /* UDC Data register-Endpoint K 12-62 */ #define UDCDRL _PXAREG(0x40600330) /* UDC Data register-Endpoint L 12-62 */ #define UDCDRM _PXAREG(0x40600334) /* UDC Data register-Endpoint M 12-62 */ #define UDCDRN _PXAREG(0x40600338) /* UDC Data register-Endpoint N 12-62 */ #define UDCDRP _PXAREG(0x4060033C) /* UDC Data register-Endpoint P 12-62 */ #define UDCDRQ _PXAREG(0x40600340) /* UDC Data register-Endpoint Q 12-62 */ #define UDCDRR _PXAREG(0x40600344) /* UDC Data register-Endpoint R 12-62 */ #define UDCDRS _PXAREG(0x40600348) /* UDC Data register-Endpoint S 12-62 */ #define UDCDRT _PXAREG(0x4060034C) /* UDC Data register-Endpoint T 12-62 */ #define UDCDRU _PXAREG(0x40600350) /* UDC Data register-Endpoint U 12-62 */ #define UDCDRV _PXAREG(0x40600354) /* UDC Data register-Endpoint V 12-62 */ #define UDCDRW _PXAREG(0x40600358) /* UDC Data register-Endpoint W 12-62 */ #define UDCDRX _PXAREG(0x4060035C) /* UDC Data register-Endpoint X 12-62 */ #define UDCCRA _PXAREG(0x40600404) /* UDC Configuration register-Endpoint A 12-64 */ #define UDCCRB _PXAREG(0x40600408) /* UDC Configuration register-Endpoint B 12-64 */ #define UDCCRC _PXAREG(0x4060040C) /* UDC Configuration register-Endpoint C 12-64 */ #define UDCCRD _PXAREG(0x40600410) /* UDC Configuration register-Endpoint D 12-64 */ #define UDCCRE _PXAREG(0x40600414) /* UDC Configuration register-Endpoint E 12-64 */ #define UDCCRF _PXAREG(0x40600418) /* UDC Configuration register-Endpoint F 12-64 */ #define UDCCRG _PXAREG(0x4060041C) /* UDC Configuration register-Endpoint G 12-64 */ #define UDCCRH _PXAREG(0x40600420) /* UDC Configuration register-Endpoint H 12-64 */ #define UDCCRI _PXAREG(0x40600424) /* UDC Configuration register-Endpoint I 12-64 */ #define UDCCRJ _PXAREG(0x40600428) /* UDC Configuration register-Endpoint J 12-64 */ #define UDCCRK _PXAREG(0x4060042C) /* UDC Configuration register-Endpoint K 12-64 */ #define UDCCRL _PXAREG(0x40600430) /* UDC Configuration register-Endpoint L 12-64 */ #define UDCCRM _PXAREG(0x40600434) /* UDC Configuration register-Endpoint M 12-64 */ #define UDCCRN _PXAREG(0x40600438) /* UDC Configuration register-Endpoint N 12-64 */ #define UDCCRP _PXAREG(0x4060043C) /* UDC Configuration register-Endpoint P 12-64 */ #define UDCCRQ _PXAREG(0x40600440) /* UDC Configuration register-Endpoint Q 12-64 */ #define UDCCRR _PXAREG(0x40600444) /* UDC Configuration register-Endpoint R 12-64 */ #define UDCCRS _PXAREG(0x40600448) /* UDC Configuration register-Endpoint S 12-64 */ #define UDCCRT _PXAREG(0x4060044C) /* UDC Configuration register-Endpoint T 12-64 */ #define UDCCRU _PXAREG(0x40600450) /* UDC Configuration register-Endpoint U 12-64 */ #define UDCCRV _PXAREG(0x40600454) /* UDC Configuration register-Endpoint V 12-64 */ #define UDCCRW _PXAREG(0x40600458) /* UDC Configuration register-Endpoint W 12-64 */ #define UDCCRX _PXAREG(0x4060045C) /* UDC Configuration register-Endpoint X 12-64 */ /* UDCCR register */ #define UDCCR_UDE (1 << 0) /* UDC Enable */ /******************************************************************************/ /* Standard UART */ /******************************************************************************/ #define STRBR _PXAREG(0x40700000) /* Receive Buffer register 10-13 */ #define STTHR _PXAREG(0x40700000) /* Transmit Holding register 10-14 */ #define STDLL _PXAREG(0x40700000) /* Divisor Latch register, low byte 10-14 */ #define STIER _PXAREG(0x40700004) /* Interrupt Enable register 10-15 */ #define STDLH _PXAREG(0x40700004) /* Divisor Latch register, high byte 10-14 */ #define STIIR _PXAREG(0x40700008) /* Interrupt ID register 10-17 */ #define STFCR _PXAREG(0x40700008) /* FIFO Control register 10-19 */ #define STLCR _PXAREG(0x4070000C) /* Line Control register 10-25 */ #define STMCR _PXAREG(0x40700010) /* Modem Control register 10-29 */ #define STLSR _PXAREG(0x40700014) /* Line Status register 10-26 */ #define STMSR _PXAREG(0x40700018) /* Modem Status register 10-31 */ #define STSPR _PXAREG(0x4070001C) /* Scratch Pad register 10-33 */ #define STISR _PXAREG(0x40700020) /* Infrared Select register 10-33 */ #define STFOR _PXAREG(0x40700024) /* Receive FIFO Occupancy register 10-22 */ #define STABR _PXAREG(0x40700028) /* Auto-Baud Control register 10-23 */ #define STACR _PXAREG(0x4070002C) /* Auto-Baud Count register 10-24 */ /******************************************************************************/ /* Infrared Communications Port */ /******************************************************************************/ #define ICCR0 _PXAREG(0x40800000) /* FICP Control register 0 11-10 */ #define ICCR1 _PXAREG(0x40800004) /* FICP Control register 1 11-13 */ #define ICCR2 _PXAREG(0x40800008) /* FICP Control register 2 11-14 */ #define ICDR _PXAREG(0x4080000C) /* FICP Data register 11-15 */ #define ICSR0 _PXAREG(0x40800014) /* FICP Status register 0 11-16 */ #define ICSR1 _PXAREG(0x40800018) /* FICP Status register 1 11-18 */ #define ICFOR _PXAREG(0x4080001C) /* FICP FIFO Occupancy Status register 11-19 */ /******************************************************************************/ /* Real-Time Clock */ /******************************************************************************/ #define RCNR _PXAREG(0x40900000) /* RTC Counter register 21-24 */ #define RTAR _PXAREG(0x40900004) /* RTC Alarm register 21-19 */ #define RTSR _PXAREG(0x40900008) /* RTC Status register 21-17 */ #define RTTR _PXAREG(0x4090000C) /* RTC Timer Trim register 21-16 */ #define RDCR _PXAREG(0x40900010) /* RTC Day Counter register 21-24 */ #define RYCR _PXAREG(0x40900014) /* RTC Year Counter register 21-25 */ #define RDAR1 _PXAREG(0x40900018) /* RTC Wristwatch Day Alarm register 1 21-20 */ #define RYAR1 _PXAREG(0x4090001C) /* RTC Wristwatch Year Alarm register 1 21-21 */ #define RDAR2 _PXAREG(0x40900020) /* RTC Wristwatch Day Alarm register 2 21-20 */ #define RYAR2 _PXAREG(0x40900024) /* RTC Wristwatch Year Alarm register 2 21-21 */ #define SWCR _PXAREG(0x40900028) /* RTC Stopwatch Counter register 21-26 */ #define SWAR1 _PXAREG(0x4090002C) /* RTC Stopwatch Alarm register 1 21-22 */ #define SWAR2 _PXAREG(0x40900030) /* RTC Stopwatch Alarm register 2 21-22 */ #define RTCPICR _PXAREG(0x40900034) /* RTC Periodic Interrupt Counter register 21-27 */ #define PIAR _PXAREG(0x40900038) /* RTC Periodic Interrupt Alarm register 21-23 */ /* RTSR */ #define RTSR_PICE (1 << 15) /* periodic interrupt count enable */ #define RTSR_PIALE (1 << 14) /* periodic interrupt alarm enable */ #define RTSR_PIAL (1 << 13) /* periodic interrupt alarm status */ #define RTSR_SWCE (1 << 12) /* stopwatch count enable */ #define RTSR_SWALE2 (1 << 11) /* stopwatch alarm 2 enable */ #define RTSR_SWAL2 (1 << 10) /* stopwatch alarm 2 status */ #define RTSR_SWALE1 (1 << 9) /* stopwatch alarm 1 enable */ #define RTSR_SWAL1 (1 << 8) /* stopwatch alarm 1 status */ #define RTSR_RDALE2 (1 << 7) /* wristwatch alarm 2 enable */ #define RTSR_RDAL2 (1 << 6) /* wristwatch alarm 2 status */ #define RTSR_RDALE1 (1 << 5) /* wristwatch alarm 1 enable */ #define RTSR_RDAL1 (1 << 4) /* wristwatch alarm 1 status */ #define RTSR_HZE (1 << 3) /* HZ interrupt enable */ #define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ #define RTSR_HZ (1 << 1) /* HZ rising edge detected */ #define RTSR_AL (1 << 0) /* RTC alarm detected */ /******************************************************************************/ /* OS Timers */ /******************************************************************************/ #define OSMR0 _PXAREG(0x40A00000) /* OS Timer Match 0 register 22-15 */ #define OSMR1 _PXAREG(0x40A00004) /* OS Timer Match 1 register 22-15 */ #define OSMR2 _PXAREG(0x40A00008) /* OS Timer Match 2 register 22-15 */ #define OSMR3 _PXAREG(0x40A0000C) /* OS Timer Match 3 register 22-15 */ #define OSCR0 _PXAREG(0x40A00010) /* OS Timer Counter 0 register 22-17 */ #define OSSR _PXAREG(0x40A00014) /* OS Timer Status register (used for all counters) 22-18 */ #define OWER _PXAREG(0x40A00018) /* OS Timer Watchdog Enable register 22-16 */ #define OIER _PXAREG(0x40A0001C) /* OS Timer Interrupt Enable register (used for all counters) 22-16 */ #define OSNR _PXAREG(0x40A00020) /* OS Timer Snapshot register 22-19 */ #define OSCR4 _PXAREG(0x40A00040) /* OS Timer Counter 4-11 registers 22-17 */ #define OSCR5 _PXAREG(0x40A00044) #define OSCR6 _PXAREG(0x40A00048) #define OSCR7 _PXAREG(0x40A0004C) #define OSCR8 _PXAREG(0x40A00050) #define OSCR9 _PXAREG(0x40A00054) #define OSCR10 _PXAREG(0x40A00058) #define OSCR11 _PXAREG(0x40A0005C) #define OSMR4 _PXAREG(0x40A00080) /* OS Timer Match 4-11 registers 22-15 */ #define OSMR5 _PXAREG(0x40A00084) #define OSMR6 _PXAREG(0x40A00088) #define OSMR7 _PXAREG(0x40A0008C) #define OSMR8 _PXAREG(0x40A00090) #define OSMR9 _PXAREG(0x40A00094) #define OSMR10 _PXAREG(0x40A00098) #define OSMR11 _PXAREG(0x40A0009C) #define OMCR4 _PXAREG(0x40A000C0) /* OS Match Control 4-7 registers 22-9 */ #define OMCR5 _PXAREG(0x40A000C4) #define OMCR6 _PXAREG(0x40A000C8) #define OMCR7 _PXAREG(0x40A000CC) #define OMCR8 _PXAREG(0x40A000D0) /* OS Match Control 8 register 22-11 */ #define OMCR9 _PXAREG(0x40A000D4) /* OS Match Control 9 register 22-13 */ #define OMCR10 _PXAREG(0x40A000D8) /* OS Match Control 10 register 22-11 */ #define OMCR11 _PXAREG(0x40A000DC) /* OS Match Control 11 register 22-13 */ // OS Timer Register Shortcuts #define OSCR(_ch) *(((_ch) == 0) ? (&OSCR0) : (&_PXAREG_OFFSET(&OSCR4,(((_ch) - 4) << 2)))) #define OSMR(_ch) *(((_ch) < 4) ? (&_PXAREG_OFFSET(&OSMR0,((_ch) << 2))) \ : (&_PXAREG_OFFSET(&OSMR4,(((_ch) - 4) << 2)))) #define OMCR(_ch) _PXAREG_OFFSET(&OMCR4,(((_ch) - 4) << 2)) #define OMCR_N (1 << 9) /* Channel 9 & 11 Snapshot Mode */ #define OMCR_C (1 << 7) /* Channel 4-7 Match Against */ #define OMCR_P (1 << 6) /* Periodic Timer */ #define OMCR_S_NONE (0 << 4) /* No External Sync */ #define OMCR_S_EXT_SYNC_0 (1 << 4) /* Ext Sync Reset OSCRx on rising edge EXT_SYNC<0> */ #define OMCR_S_EXT_SYNC_1 (2 << 4) /* Ext Sync Reset OSCRx on rising edge EXT_SYNC<1> */ #define OMCR_R (1 << 3) /* Match Reset on match */ #define OMCR_CRES(_x) ((((_x) & 0x8) << 5) | (((_x) & 0x7) << 0)) /* Match counter resolution */ #define OWER_WME (1 << 0) /* Watchdog Match Enable */ #define OIER_E11 (1 << 11) /* Interrupt enable channel 11 */ #define OIER_E10 (1 << 10) /* Interrupt enable channel 10 */ #define OIER_E9 (1 << 9) /* Interrupt enable channel 9 */ #define OIER_E8 (1 << 8) /* Interrupt enable channel 8 */ #define OIER_E7 (1 << 7) /* Interrupt enable channel 7 */ #define OIER_E6 (1 << 6) /* Interrupt enable channel 6 */ #define OIER_E5 (1 << 5) /* Interrupt enable channel 5 */ #define OIER_E4 (1 << 4) /* Interrupt enable channel 4 */ #define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ #define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ #define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ #define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ #define OSSR_M11 (1 << 11) /* Match status channel 11 */ #define OSSR_M10 (1 << 10) /* Match status channel 10 */ #define OSSR_M9 (1 << 9) /* Match status channel 9 */ #define OSSR_M8 (1 << 8) /* Match status channel 8 */ #define OSSR_M7 (1 << 7) /* Match status channel 7 */ #define OSSR_M6 (1 << 6) /* Match status channel 6 */ #define OSSR_M5 (1 << 5) /* Match status channel 5 */ #define OSSR_M4 (1 << 4) /* Match status channel 4 */ #define OSSR_M3 (1 << 3) /* Match status channel 3 */ #define OSSR_M2 (1 << 2) /* Match status channel 2 */ #define OSSR_M1 (1 << 1) /* Match status channel 1 */ #define OSSR_M0 (1 << 0) /* Match status channel 0 */ /******************************************************************************/ /* Pulse-Width Modulation */ /******************************************************************************/ #define PWMCR0 _PXAREG(0x40B00000) /* PWM 0 Control register 23-7 */ #define PWMDCR0 _PXAREG(0x40B00004) /* PWM 0 Duty Cycle register 23-8 */ #define PWMPCR0 _PXAREG(0x40B00008) /* PWM 0 Period register 23-9 */ #define PWMCR2 _PXAREG(0x40B00010) /* PWM 2 Control register 23-7 */ #define PWMDCR2 _PXAREG(0x40B00014) /* PWM 2 Duty Cycle register 23-8 */ #define PWMPCR2 _PXAREG(0x40B00018) /* PWM 2 Period register 23-9 */ #define PWMCR1 _PXAREG(0x40C00000) /* PWM 1 Control register 23-7 */ #define PWMDCR1 _PXAREG(0x40C00004) /* PWM 1 Duty Cycle register 23-8 */ #define PWMPCR1 _PXAREG(0x40C00008) /* PWM 1 Period register 23-9 */ #define PWMCR3 _PXAREG(0x40C00010) /* PWM 3 Control register 23-7 */ #define PWMDCR3 _PXAREG(0x40C00014) /* PWM 3 Duty Cycle register 23-8 */ #define PWMPCR3 _PXAREG(0x40C00018) /* PWM 3 Period register 23-9 */ /******************************************************************************/ /* Interrupt Controller */ /******************************************************************************/ #define ICIP _PXAREG(0x40D00000) /* Interrupt Controller IRQ Pending register 25-11 */ #define ICMR _PXAREG(0x40D00004) /* Interrupt Controller Mask register 25-20 */ #define ICLR _PXAREG(0x40D00008) /* Interrupt Controller Level register 25-24 */ #define ICFP _PXAREG(0x40D0000C) /* Interrupt Controller FIQ Pending register 25-15 */ #define ICPR _PXAREG(0x40D00010) /* Interrupt Controller Pending register 25-6 */ #define ICCR _PXAREG(0x40D00014) /* Interrupt Controller Control register 25-27 */ #define ICHP _PXAREG(0x40D00018) /* Interrupt Controller Highest Priority register 25-30 */ #define IPR(_x) _PXAREG_OFFSET(0x40D0001C,(((_x) & 0x1F) << 2)) /* Interupt Priority Registers 25-29 */ #define ICIP2 _PXAREG(0x40D0009C) /* Interrupt Controller IRQ Pending register 2 25-10 */ #define ICMR2 _PXAREG(0x40D000A0) /* Interrupt Controller Mask register 2 25-23 */ #define ICLR2 _PXAREG(0x40D000A4) /* Interrupt Controller Level register 2 25-27 */ #define ICFP2 _PXAREG(0x40D000A8) /* Interrupt Controller FIQ Pending register 2 25-19 */ #define ICPR2 _PXAREG(0x40D000AC) /* Interrupt Controller Pending register 2 25-6 */ #define IPR_VALID (1 << 31) #define ICCR_DIM (1 << 0) // Interrupt Controller Shortcuts // Argument _id is a peripheral ID number #define _PPID_Bit(_id) (1 << ((_id) & 0x1f)) #define _ICIP(_id) *(((_id) & 0x20) ? (&ICIP2) : (&ICIP)) #define _ICMR(_id) *(((_id) & 0x20) ? (&ICMR2) : (&ICMR)) #define _ICLR(_id) *(((_id) & 0x20) ? (&ICLR2) : (&ICLR)) #define _ICFP(_id) *(((_id) & 0x20) ? (&ICFP2) : (&ICFP)) #define _ICPR(_id) *(((_id) & 0x20) ? (&ICPR2) : (&ICPR)) // Peripheral IDs #define PPID_CIF (33) /* Quick Capture Interface */ #define PPID_RTC_AL (31) /* RTC Alarm */ #define PPID_RTC_HZ (30) /* RTC 1 Hz Clock */ #define PPID_OST_3 (29) /* OS Timer 3 */ #define PPID_OST_2 (28) /* OS Timer 2 */ #define PPID_OST_1 (27) /* OS Timer 1 */ #define PPID_OST_0 (26) /* OS Timer 0 */ #define PPID_DMAC (25) /* DMA Controller */ #define PPID_SSP1 (24) /* SSP 1 */ #define PPID_MMC (23) /* Flash Card Interface/MMC */ #define PPID_FFUART (22) /* FFUART */ #define PPID_BTUART (21) /* BTUART */ #define PPID_STUART (20) /* STUART */ #define PPID_ICP (19) /* Infrared Comm. Port*/ #define PPID_I2C (18) /* I2C */ #define PPID_LCD (17) /* LCD */ #define PPID_SSP2 (16) /* SSP 2 */ #define PPID_USIM (15) /* SmartCard Interface */ #define PPID_AC97 (14) /* AC '97 */ #define PPID_I2S (13) /* I2S */ #define PPID_PMU (12) /* Performance Monitor */ #define PPID_USBC (11) /* USB Client */ #define PPID_GPIO_X (10) /* GPIO except GPIO<1> or GPIO<0> */ #define PPID_GPIO_1 (9) /* GPIO<1> */ #define PPID_GPIO_0 (8) /* GPIO<0> */ #define PPID_OST_4_11 (7) /* OS Timer Channel 4 - 11 */ #define PPID_PWR_I2C (6) /* Power I2C */ #define PPID_MEM_STK (5) /* Memory Stick*/ #define PPID_KEYPAD (4) /* Keypad */ #define PPID_USBH1 (3) /* USB Host 1 */ #define PPID_USBH2 (2) /* USB Host 2 */ #define PPID_MSL (1) /* MSL */ #define PPID_SSP3 (0) /* SSP 3 */ /******************************************************************************/ /* General-Purpose I/O (GPIO) Controller */ /******************************************************************************/ #define GPLR0 _PXAREG(0x40E00000) /* GPIO Pin-Level register GPIO<31:0> 24-28 */ #define GPLR1 _PXAREG(0x40E00004) /* GPIO Pin-Level register GPIO<63:32> 24-28 */ #define GPLR2 _PXAREG(0x40E00008) /* GPIO Pin-Level register GPIO<95:64> 24-28 */ #define GPDR0 _PXAREG(0x40E0000C) /* GPIO Pin Direction register GPIO<31:0> 24-11 */ #define GPDR1 _PXAREG(0x40E00010) /* GPIO Pin Direction register GPIO<63:32> 24-11 */ #define GPDR2 _PXAREG(0x40E00014) /* GPIO Pin Direction register GPIO<95:64> 24-11 */ #define GPSR0 _PXAREG(0x40E00018) /* GPIO Pin Output Set register GPIO<31:0> 24-14 */ #define GPSR1 _PXAREG(0x40E0001C) /* GPIO Pin Output Set register GPIO<63:32> 24-14 */ #define GPSR2 _PXAREG(0x40E00020) /* GPIO Pin Output Set register GPIO<95:64> 24-14 */ #define GPCR0 _PXAREG(0x40E00024) /* GPIO Pin Output Clear register GPIO<31:0> 24-14 */ #define GPCR1 _PXAREG(0x40E00028) /* GPIO Pin Output Clear register GPIO <63:32> 24-14 */ #define GPCR2 _PXAREG(0x40E0002C) /* GPIO pin Output Clear register GPIO <95:64> 24-14 */ #define GRER0 _PXAREG(0x40E00030) /* GPIO Rising-Edge Detect Enable register GPIO<31:0> 24-18 */ #define GRER1 _PXAREG(0x40E00034) /* GPIO Rising-Edge Detect Enable register GPIO<63:32> 24-18 */ #define GRER2 _PXAREG(0x40E00038) /* GPIO Rising-Edge Detect Enable register GPIO<95:64> 24-18 */ #define GFER0 _PXAREG(0x40E0003C) /* GPIO Falling-Edge Detect Enable register GPIO<31:0> 24-18 */ #define GFER1 _PXAREG(0x40E00040) /* GPIO Falling-Edge Detect Enable register GPIO<63:32> 24-18 */ #define GFER2 _PXAREG(0x40E00044) /* GPIO Falling-Edge Detect Enable register GPIO<95:64> 24-18 */ #define GEDR0 _PXAREG(0x40E00048) /* GPIO Edge Detect Status register GPIO<31:0> 24-30 */ #define GEDR1 _PXAREG(0x40E0004C) /* GPIO Edge Detect Status register GPIO<63:32> 24-30 */ #define GEDR2 _PXAREG(0x40E00050) /* GPIO Edge Detect Status register GPIO<95:64> 24-30 */ #define GAFR0_L _PXAREG(0x40E00054) /* GPIO Alternate Function register GPIO<15:0> 24-23 */ #define GAFR0_U _PXAREG(0x40E00058) /* GPIO Alternate Function register GPIO<31:16> 24-23 */ #define GAFR1_L _PXAREG(0x40E0005C) /* GPIO Alternate Function register GPIO<47:32> 24-23 */ #define GAFR1_U _PXAREG(0x40E00060) /* GPIO Alternate Function register GPIO<63:48> 24-23 */ #define GAFR2_L _PXAREG(0x40E00064) /* GPIO Alternate Function register GPIO<79:64> 24-23 */ #define GAFR2_U _PXAREG(0x40E00068) /* GPIO Alternate Function register GPIO <95:80> 24-23 */ #define GAFR3_L _PXAREG(0x40E0006C) /* GPIO Alternate Function register GPIO<111:96> 24-23 */ #define GAFR3_U _PXAREG(0x40E00070) /* GPIO Alternate Function register GPIO<120:112> 24-23 */ #define GPLR3 _PXAREG(0x40E00100) /* GPIO Pin-Level register GPIO<120:96> 24-28 */ #define GPDR3 _PXAREG(0x40E0010C) /* GPIO Pin Direction register GPIO<120:96> 24-11 */ #define GPSR3 _PXAREG(0x40E00118) /* GPIO Pin Output Set register GPIO<120:96> 24-14 */ #define GPCR3 _PXAREG(0x40E00124) /* GPIO Pin Output Clear register GPIO<120:96> 24-14 */ #define GRER3 _PXAREG(0x40E00130) /* GPIO Rising-Edge Detect Enable register GPIO<120:96> 24-18 */ #define GFER3 _PXAREG(0x40E0013C) /* GPIO Falling-Edge Detect Enable register GPIO<120:96> 24-18 */ #define GEDR3 _PXAREG(0x40E00148) /* GPIO Edge Detect Status register GPIO<120:96> 24-18 */ // GPIO Shortcuts #define GPLR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPLR0, ((_gpio) & 0x60) >> 3)) : (&GPLR3)) #define GPDR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPDR0, ((_gpio) & 0x60) >> 3)) : (&GPDR3)) #define GPSR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPSR0, ((_gpio) & 0x60) >> 3)) : (&GPSR3)) #define GPCR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPCR0, ((_gpio) & 0x60) >> 3)) : (&GPCR3)) #define GRER(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GRER0, ((_gpio) & 0x60) >> 3)) : (&GRER3)) #define GFER(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GFER0, ((_gpio) & 0x60) >> 3)) : (&GFER3)) #define GEDR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GEDR0, ((_gpio) & 0x60) >> 3)) : (&GEDR3)) #define GAFR(_gpio) (_PXAREG_OFFSET(0x40E00054, ((_gpio) & 0x70) >> 2)) // These provide the correct bit/function placement in a SINGLE register #define _GPIO_bit(_gpio) (1 << ((_gpio) & 0x1f)) #define _GPIO_fn(_gpio,_fn) ((_fn) << (((_gpio) & 0x0f) << 1)) #define _GPIO_setaltfn(_gp,_fn) \ GAFR((_gp)) = ((GAFR((_gp)) & ~(_GPIO_fn((_gp),3))) | (_GPIO_fn((_gp),(_fn)))) #define _GPIO_getaltfun(_gp) \ ((GAFR((_gp)) & (_GPIO_fn((_gp),0x3))) >> (((_gp) & 0x0f) << 1)) #define GPIO_OUT 1 #define GPIO_IN 0 #define _PXA_setaltfn(_gp,_fn,_dir) \ { GPDR(_gp) = (_dir==GPIO_OUT)? (GPDR(_gp) | _GPIO_bit(_gp)) : (GPDR(_gp) & ~_GPIO_bit(_gp)); _GPIO_setaltfn(_gp,_fn);} #define _PXA_setgpio(_gp) \ {GPSR(_gp) = _GPIO_bit(_gp);} #define _PXA_clrgpio(_gp) \ {GPCR(_gp) = _GPIO_bit(_gp);} /******************************************************************************/ /* Power Manager and Reset Control */ /******************************************************************************/ #define PMCR _PXAREG(0x40F00000) /* Power Manager Control register 3-67 */ #define PSSR _PXAREG(0x40F00004) /* Power Manager Sleep Status register 3-69 */ #define PSPR _PXAREG(0x40F00008) /* Power Manager Scratch Pad register 3-72 */ #define PWER _PXAREG(0x40F0000C) /* Power Manager Wake-Up Enable register 3-73 */ #define PRER _PXAREG(0x40F00010) /* Power Manager Rising-Edge Detect Enable register 3-76 */ #define PFER _PXAREG(0x40F00014) /* Power Manager Falling-Edge Detect Enable register 3-77 */ #define PEDR _PXAREG(0x40F00018) /* Power Manager Edge-Detect Status register 3-78 */ #define PCFR _PXAREG(0x40F0001C) /* Power Manager General Configuration register 3-79 */ #define PGSR0 _PXAREG(0x40F00020) /* Power Manager GPIO Sleep State register for GPIO<31:0> 3-82 */ #define PGSR1 _PXAREG(0x40F00024) /* Power Manager GPIO Sleep State register for GPIO<63:32> 3-82 */ #define PGSR2 _PXAREG(0x40F00028) /* Power Manager GPIO Sleep State register for GPIO<95:64> 3-82 */ #define PGSR3 _PXAREG(0x40F0002C) /* Power Manager GPIO Sleep State register for GPIO<120:96> 3-82 */ #define RCSR _PXAREG(0x40F00030) /* Reset Controller Status register 3-83 */ #define PSLR _PXAREG(0x40F00034) /* Power Manager Sleep Configuration register 3-84 */ #define PSTR _PXAREG(0x40F00038) /* Power Manager Standby Configuration register 3-87 */ #define PVCR _PXAREG(0x40F00040) /* Power Manager Voltage Change Control register 3-88 */ #define PUCR _PXAREG(0x40F0004C) /* Power Manager USIM Card Control/Status register 3-89 */ #define PKWR _PXAREG(0x40F00050) /* Power Manager Keyboard Wake-Up Enable register 3-91 */ #define PKSR _PXAREG(0x40F00054) /* Power Manager Keyboard Level-Detect Status register 3-92 */ #define PCMD(_x) _PXAREG_OFFSET(0x40F00080,((_x) << 2)) /* Power Manager I2C Command Register File */ #define PMCR_INTRS (1 << 5) /* Interrupt Status */ #define PMCR_IAS (1 << 4) /* Interrupt/Abort Select */ #define PMCR_VIDAS (1 << 3) /* Imprecise-Data-Abort Status for nVDD_FAULT */ #define PMCR_VIDAE (1 << 2) /* Imprecise-Data-Abort Enable for nVDD_FAULT */ #define PMCR_BIDAS (1 << 1) /* Imprecise-Data-Abort Status for nBATT_FAULT */ #define PMCR_BIDAE (1 << 0) /* Imprecise-Data-Abort Enable for nBATT_FAULT */ #define PSSR_OTGPH (1 << 6) /* OTG Peripheral Control Hold */ #define PSSR_RDH (1 << 5) /* Read Disable Hold */ #define PSSR_PH (1 << 4) /* Peripheral Control Hold */ #define PSSR_STS (1 << 3) /* Standby Mode Status */ #define PSSR_VFS (1 << 2) /* VDD Fault Status */ #define PSSR_BFS (1 << 1) /* Battery Fault Status */ #define PSSR_SSS (1 << 0) /* Software Sleep Status */ #define PWER_WERTC (1 << 31) /* Wake-up Enable for RTC Standby, Sleep or Deep-Sleep Mode */ #define PWER_WEP1 (1 << 30) /* Wake-up Enable for PI Power Domain Standby or Deep-Sleep Mode */ #define PWER_WEUSBH2 (1 << 28) /* Wake-up Enable for USB Host Port 2 Standby or Sleep Mode */ #define PWER_WEUSBH1 (1 << 27) /* Wake-up Enable for USB Host Port 1 Standby or Sleep Mode */ #define PWER_WEUSBC (1 << 26) /* Wake-up Enable for USB Client Port Standby or Sleep Mode */ #define PWER_WBB (1 << 25) /* Wake-up Enable for a Rising Edge from MSL or Sleep Mode */ #define PWER_WE35 (1 << 24) /* Wake-up Enable for GPIO<35> for Standby or Sleep Mode */ #define PWER_WEUSIM (1 << 23) /* Wake-up Enable for Rising or Falling Edge from UDET for Standby or Sleep Mode */ #define PWER_WEMUX3_GPIO31 (1 << 19) /* Wake-up Enable due to GPIO<31> for Standby and Sleep Modes */ #define PWER_WEMUX3_GPIO113 (2 << 19) /* Wake-up Enable due to GPIO<113> for Standby and Sleep Modes */ #define PWER_WEMUX2_GPIO38 (0x2 << 16) /* Wake-up Enable due to GPIO<38> for Standby and Sleep Modes */ #define PWER_WEMUX2_GPIO53 (0x3 << 16) /* Wake-up Enable due to GPIO<53> for Standby and Sleep Modes */ #define PWER_WEMUX2_GPIO40 (0x4 << 16) /* Wake-up Enable due to GPIO<40> for Standby and Sleep Modes */ #define PWER_WEMUX2_GPIO36 (0x5 << 15) /* Wake-up Enable due to GPIO<36> for Standby and Sleep Modes */ #define PWER_WE15 (1 << 15) /* Wake-up Enables for GPIO for Standby or Sleep Mode */ #define PWER_WE14 (1 << 14) #define PWER_WE13 (1 << 13) #define PWER_WE12 (1 << 12) #define PWER_WE11 (1 << 11) #define PWER_WE10 (1 << 10) #define PWER_WE9 (1 << 9) #define PWER_WE4 (1 << 4) #define PWER_WE3 (1 << 3) #define PWER_WE1 (1 << 1) #define PWER_WE0 (1 << 0) #define PRER_RE1 (1 << 1) #define PFER_RE1 (1 << 1) #define PCFR_RO (1 << 15) /* RDH Override */ #define PCFR_PO (1 << 14) /* PH Override */ #define PCFR_GPROD (1 << 12) /* GPIO nRESET_OUT Disable */ #define PCFR_L1_EN (1 << 11) /* Sleep MOde/Deep-Sleep Linear Regulator Enable */ #define PCFR_FVC (1 << 10) /* Frequency/Voltage Change */ #define PCFR_DC_EN (1 << 7) /* Sleep/Deep-sleep DC-DC Converter Enable */ #define PCFR_PI2C_EN (1 << 6) /* Power Manager I2C Enable */ #define PCFR_GPR_EN (1 << 4) /* nRESET_GPIO Pin Enable */ #define PCFR_FS (1 << 2) /* Float Static Chip Selects During Sleep Mode */ #define PCFR_FP (1 << 1) /* Float PC Card Pins During Sleep or Deep-Sleep Mode */ #define PCFR_OPDE (1 << 0) /* 13MHz Processor Oscillator Power-Down Enable */ #define RCSR_GPR (1 << 3) /* GPIO Reset */ #define RCSR_SMR (1 << 2) /* Sleep Mode */ #define RCSR_WDR (1 << 1) /* Watchdog Reset */ #define RCSR_HWR (1 << 0) /* Hardware Reset */ #define PCMD_MBC (1 << 12) /* Multi-Byte Command */ #define PCMD_DCE (1 << 11) /* Delay Command Execution */ #define PCMD_LC (1 << 10) /* Last command */ #define PCMD_SQC_CONT (0 << 8) /* Sequence Configuration Continue */ #define PCMD_SQC_PAUSE (1 << 8) /* Sequence Configuration Pause */ #define PCMD_DATA(_x) (((_x) & 0xFF)) /* Command Data */ #define PSLR_SYS_DEL(_x) (((_x) & 0xf) << 28) /* High voltage ramp delay */ #define PSLR_PWR_DEL(_x) (((_x) & 0xf) << 24) /* Low voltage ramp delay */ #define PSLR_PSSD (1 << 23) /* Shorten wake-up delay */ #define PSLR_IVF (1 << 22) /* Ignore VDD_FAULT */ #define PSLR_SL_ROD (1 << 20) /* Don't assert nRESET_OUT */ #define PSLR_SL_R3 (1 << 11) /* SRAM bank 3 retains state */ #define PSLR_SL_R2 (1 << 10) /* SRAM bank 2 retains state */ #define PSLR_SL_R1 (1 << 9) /* SRAM bank 1 retains state */ #define PSLR_SL_R0 (1 << 8) /* SRAM bank 0 retains state */ #define PSLR_SL_PI(_x) (((_x) & 0x3) << 2) /* PI power domain */ #define PWRMODE_M_NORMAL (0) #define PWRMODE_M_IDLE (1) #define PWRMODE_M_STANDBY (2) #define PWRMODE_M_SLEEP (3) #define PWRMODE_M_DEEPSLEEP (4) #define PWRMODE_VC (1 << 3) /* Voltage Change */ /******************************************************************************/ /* Power Manager I2C */ /******************************************************************************/ #define PIBMR _PXAREG(0x40F00180) /* Power Manager I2C Bus Monitor register 9-30 */ #define PIDBR _PXAREG(0x40F00188) /* Power Manager I2C Data Buffer register 9-29 */ #define PICR _PXAREG(0x40F00190) /* Power Manager I2C Control register 9-23 */ #define PISR _PXAREG(0x40F00198) /* Power Manager I2C Status register 9-26 */ #define PISAR _PXAREG(0x40F001A0) /* Power Manager I2C Slave Address register 9-28 */ /******************************************************************************/ /* Synchronous Serial Port 1 */ /******************************************************************************/ #define SSCR0_1 _PXAREG(0x41000000) /* SSP 1 Control register 0 8-25 */ #define SSCR1_1 _PXAREG(0x41000004) /* SSP 1 Control register 1 8-29 */ #define SSSR_1 _PXAREG(0x41000008) /* SSP 1 Status register 8-43 */ #define SSITR_1 _PXAREG(0x4100000C) /* SSP 1 Interrupt Test register 8-42 */ #define SSDR_1 _PXAREG(0x41000010) /* SSP 1 Data Write register/Data Read register 8-48 */ #define SSTO_1 _PXAREG(0x41000028) /* SSP 1 Time-Out register 8-41 */ #define SSPSP_1 _PXAREG(0x4100002C) /* SSP 1 Programmable Serial Protocol 8-39 */ #define SSTSA_1 _PXAREG(0x41000030) /* SSP1 TX Timeslot Active register 8-48 */ #define SSRSA_1 _PXAREG(0x41000034) /* SSP1 RX Timeslot Active register 8-49 */ #define SSTSS_1 _PXAREG(0x41000038) /* SSP1 Timeslot Status register 8-50 */ #define SSACD_1 _PXAREG(0x4100003C) /* SSP1 Audio Clock Divider register 8-51 */ // SSP Bit positions. THESE ARE ALSO VALID FOR SSP2 AND SSP3 #define SSCR0_MOD (1 << 31) /* Mode Network Mode Enable */ #define SSCR0_ACS (1 << 30) /* Audio Clock Select */ #define SSCR0_FRDC(_x) (((_x) & 0x7) << 24) /* Frame Rate Divider Control value */ #define SSCR0_TIM (1 << 23) /* Transmit FIFO underrun interrupt mask */ #define SSCR0_RIM (1 << 22) /* Receive FIFO overrun interrupt mask */ #define SSCR0_NCS (1 << 21) /* Network Clock select */ #define SSCR0_EDSS (1 << 20) /* Extended Data Size select */ #define SSCR0_SCR(_x) (((_x) & 0xFFF) << 8) /* Serial Clock Rate */ #define SSCR0_SSE (1 << 7) /* Synchronous Serial Enable */ #define SSCR0_ECS (1 << 6) /* External Clock select */ #define SSCR0_FRF(_x) (((_x) & 0x3) << 4) /* Frame Format */ #define SSCR0_DSS(_x) (((_x) & 0xF) << 0) /* Data Size Select */ #define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable on Last Phase */ #define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */ #define SSCR1_EBCEI (1 << 29) /* Enable Bit Count Error Interrupt */ #define SSCR1_SCFR (1 << 28) /* Slave clock Free Running */ #define SSCR1_ECRA (1 << 27) /* Enable Clock Request A */ #define SSCR1_ECRB (1 << 26) /* Enable Clock Request B */ #define SSCR1_SCLKDIR (1 << 25) /* SSPSCLKx Direction */ #define SSCR1_SFRMDIR (1 << 24) /* SSP Frame Direction */ #define SSCR1_RWOT (1 << 23) /* Receive Without Transmit */ #define SSCR1_TRAIL (1 << 22) /* Trailing Byte DMA based */ #define SSCR1_TSRE (1 << 21) /* Transmit Service Req Enable */ #define SSCR1_RSRE (1 << 20) /* Receive Service Req. Enable */ #define SSCR1_TINTE (1 << 19) /* Receiver Time-Out Interupt Enable */ #define SSCR1_PINTE (1 << 18) /* Peripheral Trailing Byte Interrupt Enable */ #define SSCR1_IFS (1 << 16) /* Invert Frame Signal */ #define SSCR1_STRF (1 << 15) /* Select FIFO for EFWR */ #define SSCR1_EFWR (1 << 14) /* Enable FIFO Write-Read */ #define SSCR1_RFT(_x) (((_x) & 0xF) << 10) /* Receive FIFO Threshold */ #define SSCR1_TFT(_x) (((_x) & 0xF) << 6) /* Transmit FIFO Threshold */ #define SSCR1_MWDS (1 << 5) /* Microwire Transmit Data Size */ #define SSCR1_SPH (1 << 4) /* Motorola SPI SSPSCLKx Phase */ #define SSCR1_SPO (1 << 3) /* Motorola SPI SSPSCLKx Polarity */ #define SSCR1_LBM (1 << 2) /* Loop-back mode */ #define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */ #define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */ #define SSSR_BCE (1 << 23) /* Bit Count Error */ #define SSSR_CSS (1 << 22) /* Clock Synch Status */ #define SSSR_TUR (1 << 21) /* Transmit FIFO Underrun */ #define SSSR_EOC (1 << 20) /* End of Chain */ #define SSSR_TINT (1 << 19) /* Time-out Interrupt */ #define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ #define SSSR_RFL ((0xf) << 12) /* RX FIFO Level */ #define SSSR_TFL ((0xf) << 8) /* TX FIFO Level */ #define SSSR_ROR (1 << 7) /* RX FIFO Overrun */ #define SSSR_RFS (1 << 6) /* Receive FIFO Service */ #define SSSR_TFS (1 << 5) /* Transmit FIFO Service */ #define SSSR_BSY (1 << 4) /* SSP Port Busy */ #define SSSR_RNE (1 << 3) /* RX FIFO Not Empty */ #define SSSR_TNF (1 << 2) /* TX FIFO Not Full */ #define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */ #define SSPSP_DMYSTOP(_x) (((_x) & 0x3) << 23) /* Dummy Stop */ #define SSPSP_SFRMWDTH(_x) (((_x) & 0x3F) << 16) /* Serial Frame width*/ #define SSPSP_SFRMDLY(_x) (((_x) & 0x7F) << 9) /* Serial Frame delay*/ #define SSPSP_DMYSTRT(_x) (((_x) & 0x3) << 7) /* Dummy Start*/ #define SSPSP_STRTDLY(_x) (((_x) & 0x7) << 4) /* Start Delay*/ #define SSPSP_ETDS (1 << 3) /* End-of-Transfer Data State*/ #define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */ #define SSPSP_SCMODE(_x) (((_x) & 0x3)) /* Serial Bit-Rate Clock mode*/ #define SSACD_ACPS(_x) (((_x) & 0x7) << 4) /* Audio Clock PLL Select */ #define SSACD_SCDB (1 << 3) /* Audio Clock PLL Select */ #define SSACD_ACDS(_x) (((_x) & 0x7)) /* Audio Clock Divider Select */ /******************************************************************************/ /* MultiMediaCard/SD/SDIO Controller */ /******************************************************************************/ #define MMC_STRPCL _PXAREG(0x41100000) /* MMC Clock Start/Stop register 15-28 */ #define MMC_STAT _PXAREG(0x41100004) /* MMC Status register 15-28 */ #define MMC_CLKRT _PXAREG(0x41100008) /* MMC Clock Rate register 15-30 */ #define MMC_SPI _PXAREG(0x4110000C) /* MMC SPI Mode register 15-30 */ #define MMC_CMDAT _PXAREG(0x41100010) /* MMC Command/Data register 15-31 */ #define MMC_RESTO _PXAREG(0x41100014) /* MMC Response Time-Out register 15-33 */ #define MMC_RDTO _PXAREG(0x41100018) /* MMC Read Time-Out register 15-33 */ #define MMC_BLKLEN _PXAREG(0x4110001C) /* MMC Block Length register 15-34 */ #define MMC_NUMBLK _PXAREG(0x41100020) /* MMC Number of Blocks register 15-34 */ #define MMC_PRTBUF _PXAREG(0x41100024) /* MMC Buffer Partly Full register 15-35 */ #define MMC_I_MASK _PXAREG(0x41100028) /* MMC Interrupt Mask register 15-35 */ #define MMC_I_REG _PXAREG(0x4110002C) /* MMC Interrupt Request register 15-37 */ #define MMC_CMD _PXAREG(0x41100030) /* MMC Command register 15-40 */ #define MMC_ARGH _PXAREG(0x41100034) /* MMC Argument High register 15-40 */ #define MMC_ARGL _PXAREG(0x41100038) /* MMC Argument Low register 15-41 */ #define MMC_RES _PXAREG(0x4110003C) /* MMC Response FIFO 15-41 */ #define MMC_RXFIFO _PXAREG(0x41100040) /* MMC Receive FIFO 15-41 */ #define MMC_TXFIFO _PXAREG(0x41100044) /* MMC Transmit FIFO 15-42 */ #define MMC_RDWAIT _PXAREG(0x41100048) /* MMC RD_WAIT register 15-42 */ #define MMC_BLKS_REM _PXAREG(0x4110004C) /* MMC Blocks Remaining register 15-43 */ /******************************************************************************/ /* Clocks Manager */ /******************************************************************************/ #define CCCR _PXAREG(0x41300000) /* Core Clock Configuration register 3-94 */ #define CKEN _PXAREG(0x41300004) /* Clock Enable register 3-97 */ #define OSCC _PXAREG(0x41300008) /* Oscillator Configuration register 3-98 */ #define CCSR _PXAREG(0x4130000C) /* Core Clock Status register 3-100 */ #define CCCR_CPDIS (1 << 31) /* Core PLL Output Disable */ #define CCCR_PPDIS (1 << 30) /* Peripheral PLL Output Disable */ #define CCCR_LCD_26 (1 << 27) /* LCD Clock Frequency in Deep-Idle or 13M Mode */ #define CCCR_PLL_EARLY_EN (1 << 26) /* Early PLL Enable */ #define CCCR_A (1 << 25) /* Alt. Setting for Memory Controller Clock */ #define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ #define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ #define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ #define CCCR_2N(_x) (((_x) & 0xf) << 7) #define CCCR_L(_x) (((_x) & 0x1f)) #define CKEN24_CIF (1 << 24) /* CIF Unit Clock Enable */ #define CKEN23_SSP1 (1 << 23) /* SSP1 Unit Clock Enable */ #define CKEN22_MEMC (1 << 22) /* Memory Controller */ #define CKEN21_MEMS (1 << 21) /* Memory Stick Host Controller */ #define CKEN20_IMEM (1 << 20) /* Internal Memory Clock Enable */ #define CKEN19_KEYP (1 << 19) /* Keypad Interface Clock Enable */ #define CKEN18_USIM (1 << 18) /* USIM Unit Clock Enable */ #define CKEN17_MSL (1 << 17) /* MSL Inteface Unit Enable */ #define CKEN16_LCD (1 << 16) /* LCD Unit Clock Enable */ #define CKEN15_PMI2C (1 << 15) /* Pomer Manager I2C Unit Clock Enable */ #define CKEN14_I2C (1 << 14) /* I2C Unit Clock Enable */ #define CKEN13_IR (1 << 13) /* Infrared Port Clock Enable */ #define CKEN12_MMC (1 << 12) /* MMC Unit Clock Enable */ #define CKEN11_USBC (1 << 11) /* USB Unit Clock Enable */ #define CKEN10_USBH (1 << 10) /* USB Unit Clock Enable */ #define CKEN9_OST (1 << 9) /* USB Unit Clock Enable */ #define CKEN8_I2S (1 << 8) /* I2S Unit Clock Enable */ #define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */ #define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */ #define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */ #define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */ #define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */ #define CKEN2_AC97 (1 << 2) /* AC97 Unit Clock Enable */ #define CKEN1_PWM1 (1 << 1) /* PWM1 Clock Enable */ #define CKEN0_PWM0 (1 << 0) /* PWM0 Clock Enable */ #define OSCC_OSD(_x) (((_x) & 0x3) << 5) /* Processor Oscillator Stabilization Delay */ #define OSCC_CRI (1 << 4) /* Clock Request Input Status */ #define OSCC_PIO_EN (1 << 3) /* 13-MHz Processor Oscillator Output Enable */ #define OSCC_TOUT_EN (1 << 2) /* Timekeeping (32.768kHz) Oscillator Output Enable */ #define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ #define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ #define CCSR_CPDIS_S (1 << 31) /* Core PLL Output Disable Status */ #define CCSR_PPDIS_S (1 << 30) /* Peripheral PLL Output Disable Status */ #define CCSR_CPLCK (1 << 29) /* Core PLL Lock */ #define CCSR_PPLCK (1 << 28) /* Peripheral PLL Lock */ #define CCSR_2N_S_MASK (0x7 << 7) #define CCSR_L_S_MASK (0x1f << 0) #define CLKCFG_T (1 << 0) /* Turbo mode */ #define CLKCFG_F (1 << 1) /* Frequency change */ #define CLKCFG_HT (1 << 2) /* Half-turbo Mode */ #define CLKCFG_B (1 << 3) /* Fast-bus mode */ /******************************************************************************/ /* Mobile Scalable Link (MSL) Interface */ /******************************************************************************/ #define BBFIFO1 _PXAREG(0x41400004) /* MSL Channel 1 Receive/Transmit FIFO register 16-13 */ #define BBFIFO2 _PXAREG(0x41400008) /* MSL Channel 2 Receive/Transmit FIFO register 16-13 */ #define BBFIFO3 _PXAREG(0x4140000C) /* MSL Channel 3 Receive/Transmit FIFO register 16-13 */ #define BBFIFO4 _PXAREG(0x41400010) /* MSL Channel 4 Receive/Transmit FIFO register 16-13 */ #define BBFIFO5 _PXAREG(0x41400014) /* MSL Channel 5 Receive/Transmit FIFO register 16-13 */ #define BBFIFO6 _PXAREG(0x41400018) /* MSL Channel 6 Receive/Transmit FIFO register 16-13 */ #define BBFIFO7 _PXAREG(0x4140001C) /* MSL Channel 7 Receive/Transmit FIFO register 16-13 */ #define BBCFG1 _PXAREG(0x41400044) /* MSL Channel 1 Configuration register 16-15 */ #define BBCFG2 _PXAREG(0x41400048) /* MSL Channel 2 Configuration register 16-15 */ #define BBCFG3 _PXAREG(0x4140004C) /* MSL Channel 3 Configuration register 16-15 */ #define BBCFG4 _PXAREG(0x41400050) /* MSL Channel 4 Configuration register 16-15 */ #define BBCFG5 _PXAREG(0x41400054) /* MSL Channel 5 Configuration register 16-15 */ #define BBCFG6 _PXAREG(0x41400058) /* MSL Channel 6 Configuration register 16-15 */ #define BBCFG7 _PXAREG(0x4140005C) /* MSL Channel 7 Configuration register 16-15 */ #define BBSTAT1 _PXAREG(0x41400084) /* MSL Channel 1 Status register 16-19 */ #define BBSTAT2 _PXAREG(0x41400088) /* MSL Channel 2 Status register 16-19 */ #define BBSTAT3 _PXAREG(0x4140008C) /* MSL Channel 3 Status register 16-19 */ #define BBSTAT4 _PXAREG(0x41400090) /* MSL Channel 4 Status register 16-19 */ #define BBSTAT5 _PXAREG(0x41400094) /* MSL Channel 5 Status register 16-19 */ #define BBSTAT6 _PXAREG(0x41400098) /* MSL Channel 6 Status register 16-19 */ #define BBSTAT7 _PXAREG(0x4140009C) /* MSL Channel 7 Status register 16-19 */ #define BBEOM1 _PXAREG(0x414000C4) /* MSL Channel 1 EOM register 16-22 */ #define BBEOM2 _PXAREG(0x414000C8) /* MSL Channel 2 EOM register 16-22 */ #define BBEOM3 _PXAREG(0x414000CC) /* MSL Channel 3 EOM register 16-22 */ #define BBEOM4 _PXAREG(0x414000D0) /* MSL Channel 4 EOM register 16-22 */ #define BBEOM5 _PXAREG(0x414000D4) /* MSL Channel 5 EOM register 16-22 */ #define BBEOM6 _PXAREG(0x414000D8) /* MSL Channel 6 EOM register 16-22 */ #define BBEOM7 _PXAREG(0x414000DC) /* MSL Channel 7 EOM register 16-22 */ #define BBIID _PXAREG(0x41400108) /* MSL Interrupt ID register 16-23 */ #define BBFREQ _PXAREG(0x41400110) /* MSL Transmit Frequency Select register 10-6 */ #define BBWAIT _PXAREG(0x41400114) /* MSL Wait Count register 16-24 */ #define BBCST _PXAREG(0x41400118) /* MSL Clock Stop Time register 16-25 */ #define BBWAKE _PXAREG(0x41400140) /* MSL Wake-Up register 16-26 */ #define BBITFC _PXAREG(0x41400144) /* MSL Interface Width register 10-6 */ /******************************************************************************/ /* Keypad Interface */ /******************************************************************************/ #define KPC _PXAREG(0x41500000) /* Keypad Interface Control register 18-12 */ #define KPDK _PXAREG(0x41500008) /* Keypad Interface Direct Key register 18-16 */ #define KPREC _PXAREG(0x41500010) /* Keypad Interface Rotary Encoder Count register 18-17 */ #define KPMK _PXAREG(0x41500018) /* Keypad Interface Matrix Key register 18-18 */ #define KPAS _PXAREG(0x41500020) /* Keypad Interface Automatic Scan register 18-18 */ #define KPASMKP0 _PXAREG(0x41500028) /* Keypad Interface Automatic Scan Multiple Keypress register 0 18-20 */ #define KPASMKP1 _PXAREG(0x41500030) /* Keypad Interface Automatic Scan Multiple Keypress register 1 18-20 */ #define KPASMKP2 _PXAREG(0x41500038) /* Keypad Interface Automatic Scan Multiple Keypress register 2 18-20 */ #define KPASMKP3 _PXAREG(0x41500040) /* Keypad Interface Automatic Scan Multiple Keypress register 3 18-20 */ #define KPKDI _PXAREG(0x41500048) /* Keypad Interface Key Debounce Interval register 18-23 */ /******************************************************************************/ /* Universal Subscriber ID (USIM) Interface */ /******************************************************************************/ #define RBR _PXAREG(0x41600000) /* USIM Receive Buffer register 19-18 */ #define THR _PXAREG(0x41600004) /* USIM Transmit Holding register 19-19 */ #define IER _PXAREG(0x41600008) /* USIM Interrupt Enable register 19-20 */ #define IIR _PXAREG(0x4160000C) /* USIM Interrupt Identification register 19-22 */ #define FCR _PXAREG(0x41600010) /* USIM FIFO Control register 19-24 */ #define FSR _PXAREG(0x41600014) /* USIM FIFO Status register 19-26 */ #define ECR _PXAREG(0x41600018) /* USIM Error Control register 19-27 */ #define LCR _PXAREG(0x4160001C) /* USIM Line Control register 19-29 */ #define USCCR _PXAREG(0x41600020) /* USIM Card Control register 19-31 */ #define LSR _PXAREG(0x41600024) /* USIM Line Status register 19-32 */ #define EGTR _PXAREG(0x41600028) /* USIM Extra Guard Time register 19-34 */ #define BGTR _PXAREG(0x4160002C) /* USIM Block Guard Time register 19-34 */ #define TOR _PXAREG(0x41600030) /* USIM Time-Out register 19-35 */ #define CLKR _PXAREG(0x41600034) /* USIM Clock register 19-36 */ #define DLR _PXAREG(0x41600038) /* USIM Divisor Latch register 19-37 */ #define FLR _PXAREG(0x4160003C) /* USIM Factor Latch register 19-37 */ #define CWTR _PXAREG(0x41600040) /* USIM Character Waiting Time register 19-38 */ #define BWTR _PXAREG(0x41600044) /* USIM Block Waiting Time register 19-39 */ /******************************************************************************/ /* Synchronous Serial Port 2 */ /******************************************************************************/ #define SSCR0_2 _PXAREG(0x41700000) /* SSP2 Control register 0 8-25 */ #define SSCR1_2 _PXAREG(0x41700004) /* SSP 2 Control register 1 8-29 */ #define SSSR_2 _PXAREG(0x41700008) /* SSP 2 Status register 8-43 */ #define SSITR_2 _PXAREG(0x4170000C) /* SSP 2 Interrupt Test register 8-42 */ #define SSDR_2 _PXAREG(0x41700010) /* SSP 2 Data Write register/Data Read register 8-48 */ #define SSTO_2 _PXAREG(0x41700028) /* SSP 2 Time-Out register 8-41 */ #define SSPSP_2 _PXAREG(0x4170002C) /* SSP 2 Programmable Serial Protocol 8-39 */ #define SSTSA_2 _PXAREG(0x41700030) /* SSP2 TX Timeslot Active register 8-48 */ #define SSRSA_2 _PXAREG(0x41700034) /* SSP2 RX Timeslot Active register 8-49 */ #define SSTSS_2 _PXAREG(0x41700038) /* SSP2 Timeslot Status register 8-50 */ #define SSACD_2 _PXAREG(0x4170003C) /* SSP2 Audio Clock Divider register 8-51 */ /******************************************************************************/ /* Memory Stick Host Controller */ /******************************************************************************/ #define MSCMR _PXAREG(0x41800000) /* MSHC Command register 17-8 */ #define MSCRSR _PXAREG(0x41800004) /* MSHC Control and Status register 17-9 */ #define MSINT _PXAREG(0x41800008) /* MSHC Interrupt and Status register 17-10 */ #define MSINTEN _PXAREG(0x4180000C) /* MSHC Interrupt Enable register 17-11 */ #define MSCR2 _PXAREG(0x41800010) /* MSHC Control register 2 17-12 */ #define MSACD _PXAREG(0x41800014) /* MSHC ACD Command register 17-13 */ #define MSRXFIFO _PXAREG(0x41800018) /* MSHC Receive FIFO register 17-14 */ #define MSTXFIFO _PXAREG(0x4180001C) /* MSHC Transmit FIFO register 17-15 */ /******************************************************************************/ /* Synchronous Serial Port 3 */ /******************************************************************************/ #define SSCR0_3 _PXAREG(0x41900000) /* SSP 3 Control register 0 8-25 */ #define SSCR1_3 _PXAREG(0x41900004) /* SSP 3 Control register 1 8-29 */ #define SSSR_3 _PXAREG(0x41900008) /* SSP 3 Status register 8-43 */ #define SSITR_3 _PXAREG(0x4190000C) /* SSP 3 Interrupt Test register 8-42 */ #define SSDR_3 _PXAREG(0x41900010) /* SSP 3 Data Write register/Data Read register 8-48 */ #define SSTO_3 _PXAREG(0x41900028) /* SSP 3 Time-Out register 8-41 */ #define SSPSP_3 _PXAREG(0x4190002C) /* SSP 3 Programmable Serial Protocol 8-39 */ #define SSTSA_3 _PXAREG(0x41900030) /* SSP TX Timeslot Active register 8-48 */ #define SSRSA_3 _PXAREG(0x41900034) /* SSP RX Timeslot Active register 8-49 */ #define SSTSS_3 _PXAREG(0x41900038) /* SSP Timeslot Status register 8-50 */ #define SSACD_3 _PXAREG(0x4190003C) /* SSP Audio Clock Divider register 8-51 */ #endif /* _PXA27X_REGISTER_H */ tinyos-2.1.2+dfsg/tos/chips/pxa27x/pxa27x_util.s000066400000000000000000000203711207233610700214020ustar00rootroot00000000000000 .macro CPWAIT Rd MRC P15, 0, \Rd, C2, C0, 0 @ arbitrary read of CP15 into register Rd MOV \Rd, \Rd @ wait for it (foward dependency) SUB PC, PC, #4 @ branch to next instruction .endm .macro ALLOCATE Rd MCR P15, 0, \Rd, C7, C2, 5 @ perform line allocation based on Rd .endm @@@@@@@@@@@@@@@@@@@@@@@@@ @ to create an assembly function that confirms to AAPCS (or so I think ;o) @ .func function name @ STMFD R13!, {R4 - R12, LR}..alternatively STMFD R13!, {registers used, LR} @ {function body} @ LDMFD R13!, {R4 - R12, PC}...must match above with LR replaced by PC @ .endfunc @@@@@@@@@@@@@@@@@@@@@@@@@@ @whether WT or WB is used is determined in mmu_table.s .extern MMUTable .equ MEMORY_CONFIG_BASE,(0x48000000) .equ FLASH_SYNC_value, (0x25C3<<1) @ Value to set flash into burst 16 sync mode @.equ FLASH_SYNC_value, (0x25C2<<1) @ Value to set flash into burst 8 sync mode .equ FLASH_WRITE,(0x0060) @ Code for writing to flash .equ FLASH_READSTATUS,(0x0070) @ Code for reading status .equ FLASH_WCONF,(0x0003) @ Code to confirm write to flash .equ FLASH_READ,(0x00FF) @ Code to place flash in read mode .equ SXCNFG_sync_value,(0x7011) @ SXCNFG value for burst16 sync flash operation @ .equ SXCNFG_sync_value,(0x6011) @ SXCNFG value for burst8 sync flash operation .equ SXCNFG_offset,(0x1c) .global initMMU .global initSyncFlash .global enableICache .global enableDCache .global disableDCache .global invalidateDCache .global cleanDCache .global globalCleanAndInvalidateDCache initSyncFlash: @this function MUST be called after the ICACHE is initialized to work correctly!!! @also, the DCache being on in WB mode will possibly cause this to randomly FAIL! .func initSyncFlash STMFD R13!, {R4 - R7, LR} ldr r1, =MEMORY_CONFIG_BASE @ Memory config register base ldr r2, =FLASH_SYNC_value @ Value to set into flash RCR register ldr r3, =FLASH_WRITE @ Write to flash instruction ldr r4, =FLASH_WCONF @ Write to flash confirm instruction ldr r5, =FLASH_READ @ Load "read array" mode command ldr r6, =0x0 @ Boot ROM Flash Base address ldr r7, =SXCNFG_sync_value @ SXCNFG Magic number for now b goSyncFlash @align on cache line so that we fetch the next 8 instructions... .align 5 goSyncFlash: @ Now program everything into the Flash and SXCNFG registers str r7, [r1, #SXCNFG_offset] @ Update PXA27x SXCNFG register strh r3, [r2] @ Yes, the data is on the address bus! strh r4, [r2] @ Confirm the write to the RCR strh r5, [r6] @ Place flash back in read mode ldrh r5, [r6] @ Create a data dependency stall to guarantee write nop @ go to the end of the cache line nop nop LDMFD R13!, {R4 - R7, PC} .endfunc @assembly routine to init our MMU initMMU: .func initMMU MRC P15,0,R0,C3,C0,0 @read the domain register into R0 ORR R0, R0, #0xFF @make sure that we completely enable domain 0 MCR P15,0,R0,C3,C0,0 @write the domain register CPWAIT R0 @be anal and make sure it completes @time to setup the page table base register @LDR R0, =MMUTable @move the table we want into R0 MCR P15, 0, R0, C2, C0 @save it CPWAIT R0 @wait it @time to enable the MMU! MRC P15,0,R0,C1,C0,0 @get CP15 register 1 ORR R0, R0, #0x1 @set the MMU enable bit MCR P15,0,R0,C1,C0,0 @save it CPWAIT R0 @wait it MOV PC, LR .endfunc enableICache: .func enableICache @icache section @globally unlock the icache MCR P15, 0, R0, C9, C1, 1 CPWAIT R0 @globally unlock the itlb MCR P15, 0, R0, C10, C4, 1 CPWAIT R0 @invalidate just the icache and BTB....write to P15 C7, C5, 0 MCR P15, 0, R0, C7, C5, 0 CPWAIT R0 @invalidate the iTLB...write to P15 C8, C5, 0 MCR P15, 0, R0, c8, c5, 0 @save it CPWAIT R0 @wait it @Enable instruction cache MRC P15, 0, R0, C1, C0, 0 @get CP15 register 1 ORR R0, R0, #0x1000 @set the icache bit MCR P15, 0, R0, C1, C0, 0 @wait it CPWAIT R0 @enable the BTB MRC P15, 0, R0, C1, C0, 0 @get CP15 register 1 ORR R0, R0, #0x800 @set the btb enable bit MCR P15, 0, R0, C1, C0, 0 @save it CPWAIT R0 @wait it MOV PC, LR .endfunc enableDCache: .func enableDCache @globally unlock the dtlb MCR P15, 0, R0, c10, c8, 1 CPWAIT R0 @globally unlock the dcache MCR P15, 0, R0, C9, c2, 1 CPWAIT R0 @first invalidate dcache and mini-dcache MCR P15, 0, R0, C7, C6, 0 CPWAIT R0 @invalidate the dTLB...write to P15 C8, C6, 0 MCR P15, 0, R0, C8, C6, 0 @save it CPWAIT R0 @wait it @ now, enable data cache MCR P15, 0, R0, C7, C10, 4 @drain write buffer MRC P15, 0, R0, C1, C0, 0 @get CP15 register 1 ORR R0, R0, #0x4 @set the dcache enable bit MCR P15, 0, R0, C1, C0, 0 @save it CPWAIT R0 @wait it MOV PC, LR .endfunc disableDCache: .func disableDCache @since caching might be WB or WT for a given line, need to invalidate/flush dcache to ensure coherency @globally unlock the dcache STMFD R13!, {R0, LR} MCR P15, 0, R0, C9, c2, 1 CPWAIT R0 @globally clean and invalidate the cache bl globalCleanAndInvalidateDCache @ now, disable data cache MCR P15, 0, R0, C7, C10, 4 @drain write buffer MRC P15, 0, R0, C1, C0, 0 @get CP15 register 1 BIC R0, R0, #0x4 @clear the dcache enable bit MCR P15, 0, R0, C1, C0, 0 @save it CPWAIT R0 @wait it LDMFD R13!, {R0, LR} .endfunc @function to invalidate the DCCache for a given Buffer @funtion take 2 parameters @R0 = base virtual address to evict @R1 = number of bytes to evict...cache line is 32 bytes invalidateDCache: .func invalidateDCache CMPS R1,#0 @check that we're greater than 0 MOVLE PC, LR @return if not invalidateDCacheLoop: MCR P15, 0, R0, C7, C6, 1 @invalidate this line SUBS R1, R1, #32 @subtract out 32 w/CPSR update ADD R0, R0, #32 @add 32 to the address w/o CPSR update BGT invalidateDCacheLoop @rerun if subtract is greater than MOV PC, LR .endfunc @function to clean the DCCache for a given Buffer @if a line is dirty, it will be cleaned...i.e. written back to memory in WB mode @funtion take 2 parameters @R0 = base virtual address to evict @R1 = number of bytes to evict...cache line is 32 bytes cleanDCache: .func cleanDCache CMPS R1,#0 @check that we're greater than 0 MOVLE PC, LR @return if not cleanDCacheLoop: MCR P15, 0, R0, C7, C10, 1 @clean this line SUBS R1, R1, #32 @subtract out 32 w/CPSR update ADD R0, R0, #32 @add 32 to the address w/o CPSR update BGT cleanDCacheLoop @rerun if subtract is greater than MCR P15, 0, R0, C7, C10, 4 @drain write buffer CPWAIT R0 @wait it MOV PC, LR .endfunc @Global Clean/Invalidate THE DATA CACHE @R1 contains the virtual address of a region of cacheable memory reserved for @this clean operation @R0 is the loop count; Iterate 1024 times which is the number of lines in the @data cache globalCleanAndInvalidateDCache: .func globalCleanAndInvalidateDCache @note, this function assumes that we will NEVER have anything physical at @address 0x04000000 corresponds to static chip select 1 STMFD R13!, {R0 - R3, LR} LDR R1, =0x04000000 MOV R0, #1024 LOOP1: ALLOCATE R1 @ Allocate a line at the virtual address @ specified by R1. SUBS R0, R0, #1 @ Decrement loop count ADD R1, R1, #32 @ Increment the address in R1 to the next cache line BNE LOOP1 @Clean the Mini-data Cache @ Cant use line-allocate command, so cycle 2KB of unused data through. @ R2 contains the virtual address of a region of cacheable memory reserved for @ cleaning the Mini-data Cache @ R0 is the loop count; Iterate 64 times which is the number of lines in the @ Mini-data Cache. @note, this function assumes that we will NEVER have anything physical at @address 0x05000000 corresponds to static chip select 1 LDR R2, =0x05000000 MOV R0, #64 LOOP2: SUBS R0, R0, #1 @ Decrement loop count LDR R3,[R2],#32 @ Load and increment to next cache line BNE LOOP2 @ Invalidate the data cache and mini-data cache MCR P15, 0, R0, C7, C6, 0 LDMFD R13!, {R0 - R3, PC} .endfunc .end tinyos-2.1.2+dfsg/tos/chips/pxa27x/pxa27xhardware.h000066400000000000000000000135711207233610700220540ustar00rootroot00000000000000// $Id: pxa27xhardware.h,v 1.8 2010-06-29 22:07:45 scipio Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * * Copyright (c) 2000-2002 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * * Authors: Philip Buonadonna * * Edits: Josh Herbach * Revised: 09/02/2005 */ #ifndef PXA27X_HARDWARE_H #define PXA27X_HARDWARE_H #include "arm_defs.h" #include "pxa27x_registers.h" #define _pxa27x_perf_clear() {asm volatile ("mcr p14,0,%0,c0,c1,0\n\t"::"r" (0x5));} #define _pxa27x_perf_get(_x) {asm volatile ("mrc p14,0,%0,c1,c1,0":"=r" (_x));} // External utility functions extern void enableICache(); extern void initSyncFlash(); inline uint32_t _pxa27x_clzui(uint32_t i) { uint32_t count; asm volatile ("clz %0,%1": "=r" (count) : "r" (i)); return count; } typedef uint32_t __nesc_atomic_t; //NOTE...at the moment, these functions will ONLY disable the IRQ...FIQ is left alone inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() { uint32_t result = 0; uint32_t temp = 0; asm volatile ( "mrs %0,CPSR\n\t" "orr %1,%2,%4\n\t" "msr CPSR_cf,%3" : "=r" (result) , "=r" (temp) : "0" (result) , "1" (temp) , "i" (ARM_CPSR_INT_MASK) ); asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ return result; } inline void __nesc_atomic_end(__nesc_atomic_t oldState) @spontaneous() { uint32_t statusReg = 0; //make sure that we only mess with the INT bit asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */ oldState &= ARM_CPSR_INT_MASK; asm volatile ( "mrs %0,CPSR\n\t" "bic %0, %1, %2\n\t" "orr %0, %1, %3\n\t" "msr CPSR_c, %1" : "=r" (statusReg) : "0" (statusReg),"i" (ARM_CPSR_INT_MASK), "r" (oldState) ); return; } inline void __nesc_enable_interrupt() { uint32_t statusReg = 0; asm volatile ( "mrs %0,CPSR\n\t" "bic %0,%1,#0xc0\n\t" "msr CPSR_c, %1" : "=r" (statusReg) : "0" (statusReg) ); return; } inline void __nesc_disable_interrupt() { uint32_t statusReg = 0; asm volatile ( "mrs %0,CPSR\n\t" "orr %0,%1,#0xc0\n\t" "msr CPSR_c,%1\n\t" : "=r" (statusReg) : "0" (statusReg) ); return; } inline void __nesc_atomic_sleep() { /* * Atomically enable interrupts and sleep , * LN : FOR NOW SLEEP IS DISABLED will be adding this functionality shortly */ __nesc_enable_interrupt(); return; } typedef uint8_t mcu_power_t @combine("mcombine"); /** Combine function. */ mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) { return (m1 < m2)? m1: m2; } #endif //TOSH_HARDWARE_H tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/000077500000000000000000000000001207233610700176325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xPSPDMAC.nc000066400000000000000000000050101207233610700225760ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ generic configuration HalPXA27xSpiDMAC(uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides interface Init; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; provides interface HalPXA27xSSPCntl; uses { interface HplPXA27xSSP as SSP; interface HplPXA27xDMAChnl as RxDMA; interface HplPXA27xDMAChnl as TxDMA; interface HplPXA27xDMAInfo as SSPRxDMAInfo; interface HplPXA27xDMAInfo as SSPTxDMAInfo; } } implementation { components new HalPXA27xSpiDMAM(3, valSCR, valDSS, enableRWOT); components HalPXA27xSSPControlP; Init = HalPXA27xSpiSSPM; SpiByte = HalPXA27xSpiSSPM; SpiPacket = HalPXA27xSpiSSPM; HalPXA27xSSPCntl = HalPXA27xSSPControlP; SSP = HalPXA27xSpiSSPM; SSP = HalPXA27xSSPControlP; RxDMA = HalPXA27xSpiDMAM; TxDMA = HalPXA27xSpiDMAM; SSPRxDMAInfo = HalPXA27xSpiDMAM; SSPTxDMAInfo = HalPXA27xSpiDMAM; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xPSPPioC.nc000066400000000000000000000043151207233610700227330ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ generic configuration HalPXA27xSpiPioC(uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides interface Init; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; provides interface HalPXA27xSSPCntl; uses interface HplPXA27xSSP as SSP; } implementation { components new HalPXA27xSpiPioM(3, valSCR, valDSS, enableRWOT); components HalPXA27xSSPControlP; Init = HalPXA27xSpiPioM; SpiByte = HalPXA27xSpiPioM; SpiPacket = HalPXA27xSpiPioM; HalPXA27xSSPCntl = HalPXA27xSSPControlP; SSP = HalPXA27xSpiPioM; SSP = HalPXA27xSSPControlP; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xSSPCntl.nc000066400000000000000000000106541207233610700230070ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ #include "SSP.h" interface HalPXA27xSSPCntl { /** *configure the port to be Master of SCLK * *@param enable: port is master of SCLK if TRUE, slave if FALSE * *@return FAIL if error, SUCCESS otherwise */ command error_t setMasterSCLK(bool enable); /** *configure the port to be Master of SFRM * *@param enable: port is master of SFRM if TRUE, slave if FALSE * *@return FAIL if error, SUCCESS otherwise */ command error_t setMasterSFRM(bool enable); /** *configure the port to be in ReceiveWithoutTransmit mode * *@param enable: port only receives if TRUE, slave if FALSE * *@return FAIL if error, SUCCESS otherwise */ command error_t setReceiveWithoutTransmit(bool enable); /** *configure the port to be in SPI, SSP, Microwire, or PSP modes * *@param format: format to use...see SSP.h for encodings * *@return FAIL if error, SUCCESS otherwise */ command error_t setSSPFormat(SSPFrameFormat_t format); /** *configure how many bits wide the port should consider 1 sample * *@param width: bits to use * *@return FAIL if error, SUCCESS otherwise */ command error_t setDataWidth(SSPDataWidth_t width); /** *configure the port to invert the SFRM signal * *@param enable: invert the signal if TRUE, don't invert if FALSE * *@return FAIL if error, SUCCESS otherwise */ command error_t enableInvertedSFRM(bool enable); /** *configure the depth of the RX FIFO at which point an interrupt is generated * *@param level: fifo level...see SSP.h for encodings * *@return FAIL if error, SUCCESS otherwise */ command error_t setRxFifoLevel(SSPFifoLevel_t level); /** *configure the depth of the TX FIFO at which point an interrupt is generated * *@param level: fifo level...see SSP.h for encodings * *@return FAIL if error, SUCCESS otherwise */ command error_t setTxFifoLevel(SSPFifoLevel_t level); /** *configure the width of microwire commands * *@param size: 8 bit or 16 bit commands...see SSP.h for encodings * *@return FAIL if error, SUCCESS otherwise */ command error_t setMicrowireTxSize(SSPMicrowireTxSize_t size); /************************************ *clk specific configuration routines ************************************/ /** *configure the clock divider for the port. * *@param clkdivider: divider for the port...clk will be 13M/(clkdivider) * *@return FAIL if error, SUCCESS otherwise */ command error_t setClkRate(uint16_t clkdivider); /** *configure the Clk Mode of the port. * *@param mode: SSP_NORMALMODE for normal operation, SSP_NETWORKMODE for * network mode * *@return FAIL if error, SUCCESS otherwise */ command error_t setClkMode(SSPClkMode_t mode); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xSSPControlP.nc000066400000000000000000000120201207233610700236340ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Kaisen Lin * @author Phil Buonadonna */ #include "SSP.h" module HalPXA27xSSPControlP { provides interface HalPXA27xSSPCntl; uses interface HplPXA27xSSP as SSP; } implementation { command error_t HalPXA27xSSPCntl.setMasterSCLK(bool enable) { uint32_t valSSCR1; valSSCR1 = call SSP.getSSCR1() & ~SSCR1_SCLKDIR; if(!enable) valSSCR1 |= SSCR1_SCLKDIR; call SSP.setSSCR1(valSSCR1); return SUCCESS; } command error_t HalPXA27xSSPCntl.setMasterSFRM(bool enable) { uint32_t valSSCR1; valSSCR1 = call SSP.getSSCR1() & ~SSCR1_SFRMDIR; if(!enable) valSSCR1 |= SSCR1_SFRMDIR; call SSP.setSSCR1(valSSCR1); return SUCCESS; } command error_t HalPXA27xSSPCntl.setReceiveWithoutTransmit(bool enable) { uint32_t valSSCR1; valSSCR1 = call SSP.getSSCR1() & ~SSCR1_RWOT; if(enable) valSSCR1 |= SSCR1_RWOT; call SSP.setSSCR1(valSSCR1); return SUCCESS; } command error_t HalPXA27xSSPCntl.setSSPFormat(SSPFrameFormat_t format) { uint32_t valSSCR0; valSSCR0 = call SSP.getSSCR0() & ~SSCR0_FRF(3); call SSP.setSSCR0(valSSCR0 | SSCR0_FRF(format)); return SUCCESS; } command error_t HalPXA27xSSPCntl.setDataWidth(SSPDataWidth_t width) { uint8_t bitEDSS; uint32_t valSSCR0; if(width < 4) return EINVAL; // width + 1 = bits to use, don't forget to adjust! width -= 1; bitEDSS = width & 0x10; // keep bit 4 width = width & 0xF; // keep bits 0-3 valSSCR0 = call SSP.getSSCR0() & ~SSCR0_DSS(0xF) & ~SSCR0_EDSS; if(bitEDSS) valSSCR0 |= SSCR0_EDSS; valSSCR0 |= SSCR0_DSS(width); call SSP.setSSCR0(valSSCR0); return SUCCESS; } command error_t HalPXA27xSSPCntl.enableInvertedSFRM(bool enable) { uint32_t valSSCR1; valSSCR1 = call SSP.getSSCR1() & ~SSCR1_IFS; if(!enable) valSSCR1 |= SSCR1_IFS; call SSP.setSSCR1(valSSCR1); return SUCCESS; } command error_t HalPXA27xSSPCntl.setRxFifoLevel(SSPFifoLevel_t level) { uint32_t valSSCR1; valSSCR1 = call SSP.getSSCR1() & ~SSCR1_RFT(0xF); call SSP.setSSCR1(valSSCR1 | SSCR1_RFT(level)); return SUCCESS; } command error_t HalPXA27xSSPCntl.setTxFifoLevel(SSPFifoLevel_t level) { uint32_t valSSCR1; valSSCR1 = call SSP.getSSCR1() & ~SSCR1_TFT(0xF); call SSP.setSSCR1(valSSCR1 | SSCR1_TFT(level)); return SUCCESS; } command error_t HalPXA27xSSPCntl.setMicrowireTxSize(SSPMicrowireTxSize_t size) { uint32_t valSSCR1; valSSCR1 = call SSP.getSSCR1(); if(size == UWIRE_16BIT) valSSCR1 |= SSCR1_MWDS; else if(size == UWIRE_8BIT) valSSCR1 &= ~ SSCR1_MWDS; else return FAIL; call SSP.setSSCR1(valSSCR1); return SUCCESS; } command error_t HalPXA27xSSPCntl.setClkRate(uint16_t clkdivider) { uint32_t valSSCR0; clkdivider -= 1; // check PXA Dev Manual for why to do this valSSCR0 = call SSP.getSSCR0() & ~SSCR0_SCR(0xFFF); valSSCR0 |= SSCR0_SCR(clkdivider); call SSP.setSSCR0(valSSCR0); return SUCCESS; } command error_t HalPXA27xSSPCntl.setClkMode(SSPClkMode_t mode) { uint32_t valSSCR0; valSSCR0 = call SSP.getSSCR0(); if(mode == SSP_NETWORKMODE) valSSCR0 |= SSCR0_NCS; else if(mode == SSP_NORMALMODE) valSSCR0 &= ~SSCR0_NCS; else return FAIL; call SSP.setSSCR0(valSSCR0); return SUCCESS; } async event void SSP.interruptSSP() { // intentionally left blank, not supposed to handle interrupts } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xSSPDMAC.nc000066400000000000000000000050101207233610700226010ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ generic configuration HalPXA27xSpiDMAC(uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides interface Init; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; provides interface HalPXA27xSSPCntl; uses { interface HplPXA27xSSP as SSP; interface HplPXA27xDMAChnl as RxDMA; interface HplPXA27xDMAChnl as TxDMA; interface HplPXA27xDMAInfo as SSPRxDMAInfo; interface HplPXA27xDMAInfo as SSPTxDMAInfo; } } implementation { components new HalPXA27xSpiDMAM(1, valSCR, valDSS, enableRWOT); components HalPXA27xSSPControlP; Init = HalPXA27xSpiDMAM; SpiByte = HalPXA27xSpiDMAM; SpiPacket = HalPXA27xSpiDMAM; HalPXA27xSSPCntl = HalPXA27xSSPControlP; SSP = HalPXA27xSpiDMAM; SSP = HalPXA27xSSPControlP; RxDMA = HalPXA27xSpiDMAM; TxDMA = HalPXA27xSpiDMAM; SSPRxDMAInfo = HalPXA27xSpiDMAM; SSPTxDMAInfo = HalPXA27xSpiDMAM; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xSSPPioC.nc000066400000000000000000000043151207233610700227360ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ generic configuration HalPXA27xSpiPioC(uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides interface Init; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; provides interface HalPXA27xSSPCntl; uses interface HplPXA27xSSP as SSP; } implementation { components new HalPXA27xSpiPioM(1, valSCR, valDSS, enableRWOT); components HalPXA27xSSPControlP; Init = HalPXA27xSpiPioM; SpiByte = HalPXA27xSpiPioM; SpiPacket = HalPXA27xSpiPioM; HalPXA27xSSPCntl = HalPXA27xSSPControlP; SSP = HalPXA27xSpiPioM; SSP = HalPXA27xSSPControlP; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAC.nc000066400000000000000000000050561207233610700227010ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ generic configuration HalPXA27xSpiDMAC(uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides interface Init; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; provides interface HalPXA27xSSPCntl; uses { interface HplPXA27xSSP as SSP; interface HplPXA27xDMAChnl as RxDMA; interface HplPXA27xDMAChnl as TxDMA; interface HplPXA27xDMAInfo as SSPRxDMAInfo; interface HplPXA27xDMAInfo as SSPTxDMAInfo; } } implementation { components new HalPXA27xSpiDMAM(0, valSCR, valDSS, enableRWOT); components HalPXA27xSSPControlP; Init = HalPXA27xSpiDMAM; SpiByte = HalPXA27xSpiDMAM; SpiPacket = HalPXA27xSpiDMAM; HalPXA27xSSPCntl = HalPXA27xSSPControlP; SSP = HalPXA27xSpiDMAM; SSP = HalPXA27xSSPControlP; RxDMA = HalPXA27xSpiDMAM.RxDMA; TxDMA = HalPXA27xSpiDMAM.TxDMA; SSPRxDMAInfo = HalPXA27xSpiDMAM.SSPRxDMAInfo; SSPTxDMAInfo = HalPXA27xSpiDMAM.SSPTxDMAInfo; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAM.nc000066400000000000000000000146661207233610700227220ustar00rootroot00000000000000/* $Id: HalPXA27xSpiDMAM.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Implements the TOS 2.0 SpiByte and SpiPacket interfaces for the PXA27x. * It assumes the Motorola Serial Peripheral Interface format. * Uses DMA for the packet based transfers. * * @param valSCR The value for the SCR field in the SSCR0 register of the * associated SSP peripheral. * * @param valDSS The value for the DSS field in the SSCR0 register of the * associated SSP peripheral. * * @author Phil Buonadonna */ generic module HalPXA27xSpiDMAM(uint8_t valFRF, uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides { interface Init; interface SpiByte; interface SpiPacket[uint8_t instance]; } uses { interface HplPXA27xSSP as SSP; interface HplPXA27xDMAChnl as RxDMA; interface HplPXA27xDMAChnl as TxDMA; interface HplPXA27xDMAInfo as SSPRxDMAInfo; interface HplPXA27xDMAInfo as SSPTxDMAInfo; } } implementation { // The BitBuckets need to be 8 bytes. norace unsigned long long txBitBucket, rxBitBucket; //norace uint8_t ucBitBucket[0x10000]; //norace uint32_t txBitBucket, rxBitBucket; uint8_t *txCurrentBuf, *rxCurrentBuf; uint8_t instanceCurrent; uint32_t lenCurrent; command error_t Init.init() { //txBitBucket = (uint32_t)((uint32_t)&ullBitBucket[1] * ~0x7); //rxBitBucket = txBitBucket + 8; //rxBitBucket = txBitBucket = (uint32_t)&ucBitBucket[0]; txCurrentBuf = rxCurrentBuf = NULL; lenCurrent = 0 ; instanceCurrent = 0; call SSP.setSSCR1((SSCR1_TRAIL | SSCR1_RFT(8) | SSCR1_TFT(8))); call SSP.setSSTO(3500); call SSP.setSSCR0(SSCR0_SCR(valSCR) | SSCR0_SSE | SSCR0_FRF(valFRF) | SSCR0_DSS(valDSS) ); call TxDMA.setMap(call SSPTxDMAInfo.getMapIndex()); call RxDMA.setMap(call SSPRxDMAInfo.getMapIndex()); call TxDMA.setDALGNbit(TRUE); call RxDMA.setDALGNbit(TRUE); return SUCCESS; } async command uint8_t SpiByte.write(uint8_t tx) { volatile uint32_t tmp; volatile uint8_t val; #if 1 while ((call SSP.getSSSR()) & SSSR_RNE) { tmp = call SSP.getSSDR(); } #endif call SSP.setSSDR(tx); while ((call SSP.getSSSR()) & SSSR_BSY); val = call SSP.getSSDR(); return val; } async command error_t SpiPacket.send[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { uint32_t tmp; uint32_t txAddr,rxAddr; uint32_t txDMAFlags, rxDMAFlags; error_t error = FAIL; #if 1 while ((call SSP.getSSSR()) & SSSR_RNE) { tmp = call SSP.getSSDR(); } #endif atomic { txCurrentBuf = txBuf; rxCurrentBuf = rxBuf; lenCurrent = len; instanceCurrent = instance; } txDMAFlags = (DCMD_FLOWTRG | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_LEN(len)); rxDMAFlags = (DCMD_FLOWSRC | DCMD_ENDIRQEN | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_LEN(len)); if (rxBuf == NULL) { rxAddr = (uint32_t)&rxBitBucket; } else { rxAddr = (uint32_t)rxBuf; rxDMAFlags |= DCMD_INCTRGADDR; } if (txBuf == NULL) { txAddr = (uint32_t)&txBitBucket; } else { txAddr = (uint32_t)txBuf; txDMAFlags |= DCMD_INCSRCADDR; } call RxDMA.setDCSR(DCSR_NODESCFETCH | DCSR_EORIRQEN | DCSR_EORINT); call RxDMA.setDSADR(call SSPRxDMAInfo.getAddr()); call RxDMA.setDTADR(rxAddr); call RxDMA.setDCMD(rxDMAFlags); call TxDMA.setDCSR(DCSR_NODESCFETCH); call TxDMA.setDSADR(txAddr); call TxDMA.setDTADR(call SSPTxDMAInfo.getAddr()); call TxDMA.setDCMD(txDMAFlags); call SSP.setSSSR(SSSR_TINT); call SSP.setSSCR1((call SSP.getSSCR1()) | SSCR1_RSRE | SSCR1_TSRE); call RxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH | DCSR_EORIRQEN); call TxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH); error = SUCCESS; return error; } async event void RxDMA.interruptDMA() { uint8_t *txBuf,*rxBuf; uint8_t instance; uint32_t len; atomic { instance = instanceCurrent; len = lenCurrent; txBuf = txCurrentBuf; rxBuf = rxCurrentBuf; lenCurrent = 0; } call RxDMA.setDCMD(0); call RxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR); signal SpiPacket.sendDone[instance](txBuf,rxBuf,len,SUCCESS); return; } async event void TxDMA.interruptDMA() { // The transmit side should NOT generate an interrupt. call TxDMA.setDCMD(0); call TxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR); return; } async event void SSP.interruptSSP() { // For this Hal, we should never get here normally // Perhaps we should signal any weird errors? For now, just clear the interrupts call SSP.setSSSR(SSSR_BCE | SSSR_TUR | SSSR_EOC | SSSR_TINT | SSSR_PINT | SSSR_ROR ); return; } default async event void SpiPacket.sendDone[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error) { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xSpiPioC.nc000066400000000000000000000043151207233610700230240ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ generic configuration HalPXA27xSpiPioC(uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides interface Init; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; provides interface HalPXA27xSSPCntl; uses interface HplPXA27xSSP as SSP; } implementation { components new HalPXA27xSpiPioM(0, valSCR, valDSS, enableRWOT); components HalPXA27xSSPControlP; Init = HalPXA27xSpiPioM; SpiByte = HalPXA27xSpiPioM; SpiPacket = HalPXA27xSpiPioM; HalPXA27xSSPCntl = HalPXA27xSSPControlP; SSP = HalPXA27xSpiPioM; SSP = HalPXA27xSSPControlP; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xSpiPioM.nc000066400000000000000000000141001207233610700230270ustar00rootroot00000000000000/* $Id: HalPXA27xSpiPioM.nc,v 1.6 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Implements the TOS 2.0 SpiByte and SpiPacket interfaces for the PXA27x. * Provides master mode communication for a variety of frame formats, speeds * and data sizes. * * @param valFRF The frame format to use. * * @param valSCR The value for the SSP clock rate. * * @param valDSS The value for the DSS field in the SSCR0 register of the * associated SSP peripheral. * * @param enableRWOT Enables Receive without transmit mode. Used only for * the SpiPacket interface. If the txBuf parameter of SpiPacket.send is null * the implementation will continuously clock in data without regard to the * contents of the TX FIFO. This is different from the spec for the interface * which requires that the transmitter send zeros (0) for this case. * * @author Phil Buonadonna * @author Miklos Maroti, Brano Kusy */ generic module HalPXA27xSpiPioM(uint8_t valFRF, uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides { interface Init; interface SpiByte; interface SpiPacket[uint8_t instance]; } uses { interface HplPXA27xSSP as SSP; } } implementation { enum{ FLAGS_SSCR0 = SSCR0_SCR(valSCR) | SSCR0_FRF(/*0*/valFRF) | SSCR0_DSS(valDSS), FLAGS_SSCR1 = 0 }; // The BitBuckets need to be 8 bytes. norace unsigned long long txBitBucket, rxBitBucket; norace uint8_t *txCurrentBuf, *rxCurrentBuf, *txPtr, *rxPtr; norace uint8_t txInc, rxInc; norace uint8_t instanceCurrent; uint32_t lenCurrent, lenRemain; command error_t Init.init() { txBitBucket = 0, rxBitBucket = 0; txCurrentBuf = rxCurrentBuf = NULL; lenCurrent = 0 ; instanceCurrent = 0; atomic lenRemain = 0; call SSP.setSSCR1(FLAGS_SSCR1); call SSP.setSSTO(3500 /*96*8*/); call SSP.setSSCR0(FLAGS_SSCR0); call SSP.setSSCR0(FLAGS_SSCR0 | SSCR0_SSE); return SUCCESS; } async command uint8_t SpiByte.write(uint8_t tx) { volatile uint8_t val; #if 1 while ((call SSP.getSSSR()) & SSSR_RNE) { call SSP.getSSDR(); } #endif call SSP.setSSDR(tx); while ((call SSP.getSSSR()) & SSSR_BSY); val = call SSP.getSSDR(); return val; } async command error_t SpiPacket.send[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) { uint32_t i; #if 1 while ((call SSP.getSSSR()) & SSSR_RNE) { call SSP.getSSDR(); } #endif txCurrentBuf = txBuf; rxCurrentBuf = rxBuf; atomic lenCurrent = lenRemain = len; instanceCurrent = instance; if (rxBuf == NULL) { rxPtr = (uint8_t *)&rxBitBucket; rxInc = 0; } else { rxPtr = rxBuf; rxInc = 1; } if (txBuf == NULL) { txPtr = (uint8_t *)&txBitBucket; txInc = 0; } else { txPtr = txBuf; txInc = 1; } if ((txBuf == NULL) && (enableRWOT == TRUE)) { call SSP.setSSCR0(FLAGS_SSCR0); call SSP.setSSCR1(FLAGS_SSCR1 | SSCR1_RWOT); call SSP.setSSCR0(FLAGS_SSCR0 | SSCR0_SSE); while (len > 0) { while (!(call SSP.getSSSR() & SSSR_RNE)); *rxPtr = call SSP.getSSDR(); rxPtr += rxInc; len--; } call SSP.setSSCR0(FLAGS_SSCR0); call SSP.setSSCR1(FLAGS_SSCR1); call SSP.setSSCR0(FLAGS_SSCR0 | SSCR0_SSE); } else { uint8_t burst = (len < 16) ? len : 16; for (i = 0;i < burst; i++) { call SSP.setSSDR(*txPtr); txPtr += txInc; } call SSP.setSSCR1(FLAGS_SSCR1 | SSCR1_TINTE | SSCR1_RIE); } return SUCCESS; } async event void SSP.interruptSSP() { uint32_t i, uiStatus, uiFifoLevel; uint32_t burst; uiStatus = call SSP.getSSSR(); call SSP.setSSSR(SSSR_TINT); uiFifoLevel = (((uiStatus & SSSR_RFL) >> 12) | 0xF) + 1; uiFifoLevel = (uiFifoLevel > lenRemain) ? lenRemain : uiFifoLevel; if( !(uiStatus & SSSR_RNE)) return; for (i = 0; i < uiFifoLevel; i++) { *rxPtr = call SSP.getSSDR(); rxPtr += rxInc; } atomic { lenRemain -= uiFifoLevel; burst = (lenRemain < 16) ? lenRemain : 16; } if (burst > 0) { for (i = 0;i < burst;i++) { call SSP.setSSDR(*txPtr); txPtr += txInc; } } else { uint32_t len = lenCurrent; call SSP.setSSCR1(FLAGS_SSCR1); lenCurrent = 0; signal SpiPacket.sendDone[instanceCurrent](txCurrentBuf, rxCurrentBuf,len,SUCCESS); } return; } default async event void SpiPacket.sendDone[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error) { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xuWireDMAC.nc000066400000000000000000000050101207233610700232270ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ generic configuration HalPXA27xSpiDMAC(uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides interface Init; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; provides interface HalPXA27xSSPCntl; uses { interface HplPXA27xSSP as SSP; interface HplPXA27xDMAChnl as RxDMA; interface HplPXA27xDMAChnl as TxDMA; interface HplPXA27xDMAInfo as SSPRxDMAInfo; interface HplPXA27xDMAInfo as SSPTxDMAInfo; } } implementation { components new HalPXA27xSpiDMAM(2, valSCR, valDSS, enableRWOT); components HalPXA27xSSPControlP; Init = HalPXA27xSpiDMAM; SpiByte = HalPXA27xSpiDMAM; SpiPacket = HalPXA27xSpiDMAM; HalPXA27xSSPCntl = HalPXA27xSSPControlP; SSP = HalPXA27xSpiDMAM; SSP = HalPXA27xSSPControlP; RxDMA = HalPXA27xSpiDMAM; TxDMA = HalPXA27xSpiDMAM; SSPRxDMAInfo = HalPXA27xSpiDMAM; SSPTxDMAInfo = HalPXA27xSpiDMAM; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HalPXA27xuWirePioC.nc000066400000000000000000000043151207233610700233640ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ generic configuration HalPXA27xSpiPioC(uint8_t valSCR, uint8_t valDSS, bool enableRWOT) { provides interface Init; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; provides interface HalPXA27xSSPCntl; uses interface HplPXA27xSSP as SSP; } implementation { components new HalPXA27xSpiPioM(2, valSCR, valDSS, enableRWOT); components HalPXA27xSSPControlP; Init = HalPXA27xSpiPioM; SpiByte = HalPXA27xSpiPioM; SpiPacket = HalPXA27xSpiPioM; HalPXA27xSSPCntl = HalPXA27xSSPControlP; SSP = HalPXA27xSpiPioM; SSP = HalPXA27xSSPControlP; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HplPXA27xSSP.nc000066400000000000000000000051431207233610700222020ustar00rootroot00000000000000/* $Id: HplPXA27xSSP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ interface HplPXA27xSSP { async command void setSSCR0(uint32_t val); async command uint32_t getSSCR0(); async command void setSSCR1(uint32_t val); async command uint32_t getSSCR1(); async command void setSSSR(uint32_t val); async command uint32_t getSSSR(); async command void setSSITR(uint32_t val); async command uint32_t getSSITR(); async command void setSSDR(uint32_t val); async command uint32_t getSSDR(); async command void setSSTO(uint32_t val); async command uint32_t getSSTO(); async command void setSSPSP(uint32_t val); async command uint32_t getSSPSP(); async command void setSSTSA(uint32_t val); async command uint32_t getSSTSA(); async command void setSSRSA(uint32_t val); async command uint32_t getSSRSA(); async command void setSSTSS(uint32_t val); async command uint32_t getSSTSS(); async command void setSSACD(uint32_t val); async command uint32_t getSSACD(); async event void interruptSSP(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HplPXA27xSSP1C.nc000066400000000000000000000043241207233610700223660ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration HplPXA27xSSP1C { provides { interface HplPXA27xSSP; interface HplPXA27xDMAInfo as SSPRxDMAReg; interface HplPXA27xDMAInfo as SSPTxDMAReg; } } implementation { components HplPXA27xSSPP; components HplPXA27xInterruptM; components PlatformP; HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[1]; components new HplPXA27xDMAInfoC(13, (uint32_t)&SSDR_1) as SSPRxDMA; components new HplPXA27xDMAInfoC(14, (uint32_t)&SSDR_1) as SSPTxDMA; SSPRxDMAReg = SSPRxDMA; SSPTxDMAReg = SSPTxDMA; HplPXA27xSSPP.Init[1] <- PlatformP.InitL1; HplPXA27xSSPP.SSP1Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_SSP1]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HplPXA27xSSP2C.nc000066400000000000000000000043241207233610700223670ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration HplPXA27xSSP2C { provides { interface HplPXA27xSSP; interface HplPXA27xDMAInfo as SSPRxDMAReg; interface HplPXA27xDMAInfo as SSPTxDMAReg; } } implementation { components HplPXA27xSSPP; components HplPXA27xInterruptM; components PlatformP; HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[2]; components new HplPXA27xDMAInfoC(15, (uint32_t)&SSDR_2) as SSPRxDMA; components new HplPXA27xDMAInfoC(16, (uint32_t)&SSDR_2) as SSPTxDMA; SSPRxDMAReg = SSPRxDMA; SSPTxDMAReg = SSPTxDMA; HplPXA27xSSPP.Init[2] <- PlatformP.InitL1; HplPXA27xSSPP.SSP2Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_SSP2]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HplPXA27xSSP3C.nc000066400000000000000000000043321207233610700223670ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration HplPXA27xSSP3C { provides { interface HplPXA27xSSP; interface HplPXA27xDMAInfo as SSPRxDMAInfo; interface HplPXA27xDMAInfo as SSPTxDMAInfo; } } implementation { components HplPXA27xSSPP; components HplPXA27xInterruptM; components PlatformP; HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[3]; components new HplPXA27xDMAInfoC(66, (uint32_t)&SSDR_3) as SSPRxDMA; components new HplPXA27xDMAInfoC(67, (uint32_t)&SSDR_3) as SSPTxDMA; SSPRxDMAInfo = SSPRxDMA; SSPTxDMAInfo = SSPTxDMA; HplPXA27xSSPP.Init[3] <- PlatformP.InitL1; HplPXA27xSSPP.SSP3Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_SSP3]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/HplPXA27xSSPP.nc000066400000000000000000000176571207233610700223370ustar00rootroot00000000000000/* $Id: HplPXA27xSSPP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ module HplPXA27xSSPP { provides { interface Init[uint8_t chnl]; interface HplPXA27xSSP[uint8_t chnl]; } uses { interface HplPXA27xInterrupt as SSP1Irq; interface HplPXA27xInterrupt as SSP2Irq; interface HplPXA27xInterrupt as SSP3Irq; } } implementation { command error_t Init.init[uint8_t chnl]() { error_t error = SUCCESS; switch (chnl) { case 1: CKEN |= CKEN23_SSP1; call SSP1Irq.enable(); break; case 2: CKEN |= CKEN3_SSP2; call SSP2Irq.enable(); break; case 3: CKEN |= CKEN4_SSP3; //call SSP3Irq.allocate(); call SSP3Irq.enable(); break; default: error = FAIL; break; } return error; } async command void HplPXA27xSSP.setSSCR0[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSCR0_1 = val; break; case 2: SSCR0_2 = val; break; case 3: SSCR0_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSCR0[uint8_t chnl]() { switch (chnl) { case 1: return SSCR0_1; break; case 2: return SSCR0_2; break; case 3: return SSCR0_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSCR1[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSCR1_1 = val; break; case 2: SSCR1_2 = val; break; case 3: SSCR1_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSCR1[uint8_t chnl]() { switch (chnl) { case 1: return SSCR1_1; break; case 2: return SSCR1_2; break; case 3: return SSCR1_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSSR[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSSR_1 = val; break; case 2: SSSR_2 = val; break; case 3: SSSR_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSSR[uint8_t chnl]() { switch (chnl) { case 1: return SSSR_1; break; case 2: return SSSR_2; break; case 3: return SSSR_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSITR[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSITR_1 = val; break; case 2: SSITR_2 = val; break; case 3: SSITR_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSITR[uint8_t chnl]() { switch (chnl) { case 1: return SSITR_1; break; case 2: return SSITR_2; break; case 3: return SSITR_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSDR[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSDR_1 = val; break; case 2: SSDR_2 = val; break; case 3: SSDR_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSDR[uint8_t chnl]() { switch (chnl) { case 1: return SSDR_1; break; case 2: return SSDR_2; break; case 3: return SSDR_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSTO[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSTO_1 = val; break; case 2: SSTO_2 = val; break; case 3: SSTO_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSTO[uint8_t chnl]() { switch (chnl) { case 1: return SSTO_1; break; case 2: return SSTO_2; break; case 3: return SSTO_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSPSP[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSPSP_1 = val; break; case 2: SSPSP_2 = val; break; case 3: SSPSP_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSPSP[uint8_t chnl]() { switch (chnl) { case 1: return SSPSP_1; break; case 2: return SSPSP_2; break; case 3: return SSPSP_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSTSA[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSTSA_1 = val; break; case 2: SSTSA_2 = val; break; case 3: SSTSA_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSTSA[uint8_t chnl]() { switch (chnl) { case 1: return SSTSA_1; break; case 2: return SSTSA_2; break; case 3: return SSTSA_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSRSA[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSRSA_1 = val; break; case 2: SSRSA_2 = val; break; case 3: SSRSA_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSRSA[uint8_t chnl]() { switch (chnl) { case 1: return SSRSA_1; break; case 2: return SSRSA_2; break; case 3: return SSRSA_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSTSS[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSTSS_1 = val; break; case 2: SSTSS_2 = val; break; case 3: SSTSS_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSTSS[uint8_t chnl]() { switch (chnl) { case 1: return SSTSS_1; break; case 2: return SSTSS_2; break; case 3: return SSTSS_3; break; default: return 0; } } async command void HplPXA27xSSP.setSSACD[uint8_t chnl](uint32_t val) { switch (chnl) { case 1: SSACD_1 = val; break; case 2: SSACD_2 = val; break; case 3: SSACD_3 = val; break; default: break; } return; } async command uint32_t HplPXA27xSSP.getSSACD[uint8_t chnl]() { switch (chnl) { case 1: return SSACD_1; break; case 2: return SSACD_2; break; case 3: return SSACD_3; break; default: return 0; } } default async event void HplPXA27xSSP.interruptSSP[uint8_t chnl]() { call HplPXA27xSSP.setSSSR[chnl](SSSR_BCE | SSSR_TUR | SSSR_EOC | SSSR_TINT | SSSR_PINT | SSSR_ROR ); return; } async event void SSP1Irq.fired() { signal HplPXA27xSSP.interruptSSP[1](); } async event void SSP2Irq.fired() { signal HplPXA27xSSP.interruptSSP[2](); } async event void SSP3Irq.fired() { signal HplPXA27xSSP.interruptSSP[3](); } default async command void SSP1Irq.enable() {return;} default async command void SSP2Irq.enable() {return;} default async command void SSP3Irq.enable() {return;} } tinyos-2.1.2+dfsg/tos/chips/pxa27x/ssp/SSP.h000066400000000000000000000037311207233610700204540ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Kaisen Lin * @author Phil Buonadonna */ #ifndef _SSP_H #define _SSP_H typedef enum { SSP_FORMAT_SPI = 0, SSP_FORMAT_TISSP, SSP_FORMAT_UWIRE, SSP_FORMAT_PSP, } SSPFrameFormat_t; typedef uint8_t SSPDataWidth_t; typedef uint8_t SSPFifoLevel_t; typedef enum { UWIRE_8BIT, UWIRE_16BIT, } SSPMicrowireTxSize_t; typedef enum { SSP_NORMALMODE, SSP_NETWORKMODE, } SSPClkMode_t; #endif /* _SSP_H */ tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/000077500000000000000000000000001207233610700201455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/Alarm32khzC.nc000066400000000000000000000041041207233610700225070ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ generic configuration Alarm32khzC() { provides interface Init; provides interface Alarm as Alarm32khz32; } implementation { components new HalPXA27xAlarmM(T32khz,1) as PhysAlarm32khz; components HalPXA27xOSTimerMapC; enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")}; Init = PhysAlarm32khz; Alarm32khz32 = PhysAlarm32khz; PhysAlarm32khz.OSTInit -> HalPXA27xOSTimerMapC.Init; PhysAlarm32khz.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/AlarmMilliC.nc000066400000000000000000000041051207233610700226150ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ generic configuration AlarmMilliC() { provides interface Init; provides interface Alarm as AlarmMilli32; } implementation { components new HalPXA27xAlarmM(TMilli,2) as PhysAlarmMilli; components HalPXA27xOSTimerMapC; enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")}; Init = PhysAlarmMilli; AlarmMilli32 = PhysAlarmMilli; PhysAlarmMilli.OSTInit -> HalPXA27xOSTimerMapC.Init; PhysAlarmMilli.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/BusyWait32khzC.nc000066400000000000000000000040731207233610700232270ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This configuration piggybacks off of the TOS 2.0 Counter32khzC component. * This component manages initialization of the underlying Timer components. * * @author Phil Buonadonna */ configuration BusyWait32khzC { provides interface BusyWait as BusyWait32khz16; } implementation { components new HalPXA27xBusyWaitPM(T32khz,397) as PXA27xBusyWait32khz; components HplPXA27xOSTimerC; BusyWait32khz16 = PXA27xBusyWait32khz.BusyWait; PXA27xBusyWait32khz.OST -> HplPXA27xOSTimerC.OST0; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/BusyWaitMicroC.nc000066400000000000000000000041271207233610700233370ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Implements the BusyWaitMicroC timer component. This component * instantiates a new Counter with Microsecond precision and * binds it to the BusyWait interface via PXA27xBusyWaitP * * @author Phil Buonadonna */ configuration BusyWaitMicroC { provides interface BusyWait as BusyWaitMicro16; } implementation { components new HalPXA27xBusyWaitM(TMicro,13) as PXA27xBusyWaitMicro; components HplPXA27xOSTimerC; BusyWaitMicro16 = PXA27xBusyWaitMicro.BusyWait; PXA27xBusyWaitMicro.OST -> HplPXA27xOSTimerC.OST0; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/Counter32khz32C.nc000066400000000000000000000044261207233610700232460ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ configuration Counter32khz32C { provides interface Counter as Counter32khz32; provides interface LocalTime as LocalTime32khz; } implementation { components new HalPXA27xCounterM(T32khz,1) as PhysCounter32khz32; components HalPXA27xOSTimerMapC; components PlatformP; enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")}; Counter32khz32 = PhysCounter32khz32.Counter; LocalTime32khz = PhysCounter32khz32.LocalTime; // Wire the initialization to the platform init routine PlatformP.InitL0 -> PhysCounter32khz32.Init; PhysCounter32khz32.OSTInit -> HalPXA27xOSTimerMapC.Init; PhysCounter32khz32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/Counter32khzC.nc000066400000000000000000000044241207233610700230770ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ configuration Counter32khzC { provides interface Counter as Counter32khz32; provides interface LocalTime as LocalTime32khz; } implementation { components new HalPXA27xCounterM(T32khz,1) as PhysCounter32khz32; components HalPXA27xOSTimerMapC; components PlatformP; enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")}; Counter32khz32 = PhysCounter32khz32.Counter; LocalTime32khz = PhysCounter32khz32.LocalTime; // Wire the initialization to the platform init routine PlatformP.InitL0 -> PhysCounter32khz32.Init; PhysCounter32khz32.OSTInit -> HalPXA27xOSTimerMapC.Init; PhysCounter32khz32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/CounterMilliC.nc000066400000000000000000000044241207233610700232040ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ configuration CounterMilliC { provides interface Counter as CounterMilli32; provides interface LocalTime as LocalTimeMilli; } implementation { components new HalPXA27xCounterM(TMilli,2) as PhysCounterMilli32; components HalPXA27xOSTimerMapC; components PlatformP; enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")}; CounterMilli32 = PhysCounterMilli32.Counter; LocalTimeMilli = PhysCounterMilli32.LocalTime; // Wire the initialization to the plaform init routine PlatformP.InitL0 -> PhysCounterMilli32.Init; PhysCounterMilli32.OSTInit -> HalPXA27xOSTimerMapC.Init; PhysCounterMilli32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xAlarmM.nc000066400000000000000000000103711207233610700232010ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ // @author Phil Buonadonna #include "Timer.h" generic module HalPXA27xAlarmM(typedef frequency_tag, uint8_t resolution) { provides { interface Init; interface Alarm as Alarm; } uses { interface Init as OSTInit; interface HplPXA27xOSTimer as OSTChnl; } } implementation { bool mfRunning; uint32_t mMinDeltaT; task void lateAlarm() { atomic { mfRunning = FALSE; signal Alarm.fired(); } } command error_t Init.init() { call OSTInit.init(); // Continue on match, Non-periodic, w/ given resolution atomic { mfRunning = FALSE; switch (resolution) { case 1: // 1/32768 second mMinDeltaT = 10; break; case 2: // 1 ms mMinDeltaT = 1; break; case 3: // 1 s mMinDeltaT = 1; break; case 4: // 1 us mMinDeltaT = 300; break; default: // External mMinDeltaT = 0; break; } call OSTChnl.setOMCR(OMCR_C | OMCR_P | OMCR_CRES(resolution)); call OSTChnl.setOSCR(0); } return SUCCESS; } async command void Alarm.start( uint32_t dt ) { uint32_t t0,t1,tf; //uint32_t cycles; bool bPending; if (dt < mMinDeltaT) dt = mMinDeltaT; atomic { //_pxa27x_perf_clear(); t0 = call OSTChnl.getOSCR(); tf = t0 + dt; call OSTChnl.setOIERbit(TRUE); call OSTChnl.setOSMR(tf); //_pxa27x_perf_get(cycles); mfRunning = TRUE; t1 = call OSTChnl.getOSCR(); bPending = call OSTChnl.getOSSRbit(); if ((dt <= (t1 - t0)) && !(bPending)) { call OSTChnl.setOIERbit(FALSE); post lateAlarm(); } } return; } async command void Alarm.stop() { atomic { call OSTChnl.setOIERbit(FALSE); mfRunning = FALSE; } return; } async command bool Alarm.isRunning() { bool flag; atomic flag = mfRunning; return flag; } async command void Alarm.startAt( uint32_t t0, uint32_t dt ) { uint32_t tf,t1; bool bPending; tf = t0 + dt; atomic { call OSTChnl.setOIERbit(TRUE); call OSTChnl.setOSMR(tf); mfRunning = TRUE; t1 = call OSTChnl.getOSCR(); bPending = call OSTChnl.getOSSRbit(); if ((dt <= (t1 - t0)) && !(bPending)) { call OSTChnl.setOIERbit(FALSE); post lateAlarm(); } } return; } async command uint32_t Alarm.getNow() { return call OSTChnl.getOSCR(); } async command uint32_t Alarm.getAlarm() { return call OSTChnl.getOSMR(); } async event void OSTChnl.fired() { call OSTChnl.clearOSSRbit(); call OSTChnl.setOIERbit(FALSE); mfRunning = FALSE; signal Alarm.fired(); return; } default async event void Alarm.fired() { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xBusyWaitM.nc000066400000000000000000000050601207233610700237130ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This private component provides a 16-bit BusyWait interface * of a given precision over OS Timer channel 0 * * @param precision_tag A type tag mapped to the set precision * * @param val4xScale A value to scale the underlying counter by. * The passed in parameter is given by the equation * val4xScale = (3.25 MHz/) * 4 * and rounded to the nearest integer. * Example: Counter precision of 32.768 kHz would have * a val4xScale of 397 * * @author Phil Buonadonna * */ generic module HalPXA27xBusyWaitM(typedef precision_tag, uint16_t val4xScale) { provides interface BusyWait; uses interface HplPXA27xOSTimer as OST; } implementation { async command void BusyWait.wait(uint16_t dt) { uint32_t dCounts; atomic { uint32_t t0 = call OST.getOSCR(); dCounts = (dt * 4) * val4xScale; dCounts >>= 2; while (((call OST.getOSCR()) - t0) < dCounts); } } async event void OST.fired() { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xCounterM.nc000066400000000000000000000063101207233610700235620ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Implements a TOS 2.0 Counter on the PXA27x HPL. The PXA27x does not * have an explicit overflow notification. We emulate one by using * the associated match register set to 0. This requires we initialize * the counter to 1 to avoid a false notification at startup. * * @author Phil Buonadonna */ #include "Timer.h" generic module HalPXA27xCounterM(typedef frequency_tag, uint8_t resolution) { provides { interface Init; interface Counter as Counter; interface LocalTime as LocalTime; } uses { interface Init as OSTInit; interface HplPXA27xOSTimer as OSTChnl; } } implementation { command error_t Init.init() { call OSTInit.init(); // Continue on match, Non-periodic, w/ given resolution atomic { call OSTChnl.setOMCR(OMCR_C | OMCR_P | OMCR_CRES(resolution)); call OSTChnl.setOSMR(0); call OSTChnl.setOSCR(1); call OSTChnl.clearOSSRbit(); call OSTChnl.setOIERbit(TRUE); } return SUCCESS; } async command uint32_t Counter.get() { uint32_t cntr; cntr = call OSTChnl.getOSCR(); return cntr; } async command bool Counter.isOverflowPending() { bool flag; atomic flag = call OSTChnl.getOSSRbit(); return flag; } async command void Counter.clearOverflow() { atomic call OSTChnl.clearOSSRbit(); } async event void OSTChnl.fired() { call OSTChnl.clearOSSRbit(); signal Counter.overflow(); return; } async command uint32_t LocalTime.get() { uint32_t cntr; cntr = call OSTChnl.getOSCR(); return cntr; } default async event void Counter.overflow() { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xOSTimerMapC.nc000066400000000000000000000043741207233610700241210ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This components maps requested timer resources connected using the * 'PXA27xOSTimer.Resource' flag to physical timer resource of the PXA27x. * * @author Phil Buonadonna * */ configuration HalPXA27xOSTimerMapC { provides { interface Init; interface HplPXA27xOSTimer as OSTChnl[uint8_t id]; } } implementation { components HplPXA27xOSTimerC; Init = HplPXA27xOSTimerC; OSTChnl[0] = HplPXA27xOSTimerC.OST4; OSTChnl[1] = HplPXA27xOSTimerC.OST5; OSTChnl[2] = HplPXA27xOSTimerC.OST6; OSTChnl[3] = HplPXA27xOSTimerC.OST7; OSTChnl[4] = HplPXA27xOSTimerC.OST8; OSTChnl[5] = HplPXA27xOSTimerC.OST9; OSTChnl[6] = HplPXA27xOSTimerC.OST10; OSTChnl[7] = HplPXA27xOSTimerC.OST11; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xSleep.nc000066400000000000000000000060021207233610700230740ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * This interfaces provides HAL level sleep functionality for the PXA27x. * * @author Kaisen Lin * @author Phil Buonadonna * */ interface HalPXA27xSleep { /** * Sleep for a given number of milliseconds. Only standard * sleep mode is used. This function supports * sleep times up to 65534ms. Larger sleep durations must * use one of the other methods. * * @param time Sleep duration in milliseconds up to 65534. * */ async command void sleepMillis(uint16_t time); /** * Sleep for a given number of seconds up to 62859 sec. * If the function is passed a value greater than 62859, it * will default to the maximum. For sleep durations greater * than 30 secs, the processor will be placed into deep sleep * mode. Otherwise standard sleep mode is used. * * @param time Sleep duration in seconds. * */ async command void sleepSeconds(uint32_t time); /** * Sleep for a given number of minutes up to 1439 min. Deep * sleep mode is used. If the function is passed a value * greater than 1439, it will default to the maximum. * * @param time Sleep duration in minutes. */ async command void sleepMinutes(uint32_t time); /** * Sleep for a given number of hours up to 23 hours. Deep * sleep mode is used. If the function is passed a value * greater than 23, it will default to the maximum. * * @param time Sleep duration in hours */ async command void sleepHours(uint16_t time); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xSleepC.nc000066400000000000000000000037171207233610700232110ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ configuration HalPXA27xSleepC { provides interface HalPXA27xSleep; } implementation { components HalPXA27xSleepM; HalPXA27xSleep = HalPXA27xSleepM; components HplPXA27xRTCM, HplPXA27xPowerM; HalPXA27xSleepM.HplPXA27xRTC -> HplPXA27xRTCM; HalPXA27xSleepM.HplPXA27xPower -> HplPXA27xPowerM; components LedsC; HalPXA27xSleepM.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xSleepM.nc000066400000000000000000000073061207233610700232210ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ module HalPXA27xSleepM { provides interface HalPXA27xSleep; uses interface HplPXA27xRTC; uses interface HplPXA27xPower; uses interface Leds; } implementation { void doSleep(uint32_t swRegVal, bool useDeepSleep) { int i; call HplPXA27xPower.setPWER(PWER_WERTC); // let it wrap around itself if necessary call HplPXA27xRTC.setSWCR(0); call HplPXA27xRTC.setSWAR1(swRegVal); // minutes call HplPXA27xRTC.setSWAR2(0x00FFFFFF); for(i = 0; i < 10; i++); // spin for a bit call HplPXA27xRTC.setRTSR(RTSR_SWCE); for(i = 0; i < 5000; i++); // spin for a bit if (useDeepSleep) { call HplPXA27xPower.setPWRMode(PWRMODE_M_DEEPSLEEP); // this call never returns } else { call HplPXA27xPower.setPWRMode(PWRMODE_M_SLEEP); // this call never returns } } async command void HalPXA27xSleep.sleepMillis(uint16_t time) { int i; call HplPXA27xPower.setPWER(PWER_WERTC); // let it wrap around itself if necessary call HplPXA27xRTC.setPIAR(time); // implicitly resets RTCPICR for(i = 0; i < 10; i++); // spin for a bit call HplPXA27xRTC.setRTSR(RTSR_PICE); for(i = 0; i < 5000; i++); // spin for a bit call HplPXA27xPower.setPWRMode(PWRMODE_M_SLEEP); // this call never returns } async command void HalPXA27xSleep.sleepSeconds(uint32_t time) { uint32_t hrs = time / 3600; uint32_t mins = (time / 60) % 60; uint32_t secs = time % 60; uint32_t swReg; if (hrs > 23) { hrs = 23; mins = 59; secs = 59; } swReg = ((hrs << 19) | (mins << 13) | (secs << 7)); doSleep(swReg); return; } async command void HalPXA27xSleep.sleepMinutes(uint32_t time) { uint32_t hrs = time / 60; uint32_t mins = time % 60; uint32_t swReg; if (hrs > 23) { hrs = 23; mins = 59; } swReg = ((hrs << 19) | (mins << 13)); doSleep(swReg); return; } async command void HalPXA27xSleep.sleepHours(uint16_t time) { uint32_t hrs = time; uint32_t swReg; if (hrs > 23) { hrs = 23; } swReg = (hrs << 19); doSleep(swReg); return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xWatchdog.nc000066400000000000000000000043501207233610700235700ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ interface HalPXA27xWatchdog { /** * Enable the watchdog resource with the given timeout interval. * This function may be called multiple times to reset the timeout * interval. However, the watchdog function itself is sticky and * will remain enabled until system reset. * * @param interval The timeout interval in untis of 3.25MHZ clock cycle * ticks. * */ async command void enable(uint32_t interval); /** * Tickle/reset the watchdog counter. This function must be * called on a regular basis to prevent the watchdog from resetting the * system. * */ async command void tickle(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xWatchdogC.nc000066400000000000000000000037031207233610700236740ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ module HalPXA27xWatchdogC { provides interface HalPXA27xWatchdog; } implementation { components HplPXA27xOSTimerC; components HalPXA27xWatchdogM; HalPXA27xWatchdog = HalPXA27xWatchdogM; HalPXA27xWatchdogM.HplPXA27xOSTimerWatchdog -> HplPXA27xOSTimerC.OSTWDCntl; HalPXA27xWatchdogM.HplPXA27xOSTimer -> HplPXA27xOSTimerC.OST0M3; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HalPXA27xWatchdogM.nc000066400000000000000000000050001207233610700236760ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ module HalPXA27xWatchdogM { provides interface HalPXA27xWatchdog; uses interface HplPXA27xOSTimerWatchdog; uses interface HplPXA27xOSTimer; } implementation { uint32_t gResetInterval; async command void HalPXA27xWatchdog.enable(uint32_t interval) { uint32_t curMatch; atomic { gResetInterval = interval; curMatch = call HplPXA27xOSTimer.getOSCR(); curMatch = (curMatch + gResetInterval) % 0xFFFFFFFF; call HplPXA27xOSTimer.setOSMR(curMatch); call HplPXA27xOSTimerWatchdog.enableWatchdog(); } } async command void HalPXA27xWatchdog.tickle() { uint32_t curMatch; atomic { curMatch = call HplPXA27xOSTimer.getOSCR(); curMatch = (curMatch + gResetInterval) % 0xFFFFFFFF; call HplPXA27xOSTimer.setOSMR(curMatch); } } // This won't ever get called. Rather, the system will reset. async event void HplPXA27xOSTimer.fired() {} } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HplPXA27xOSTimer.nc000066400000000000000000000110711207233610700233670ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This interface exposes a single OS Timer channel * on the PXA27x processor. Each channel includes a counter register * (OSCRx), a match register (OSMRx), a match control register (OMCRx) * and support for events on each channel. * * Do not confuse this HPL interface with the generic 'Timer' interface * provided by TOS 2.x. They are completely different. * * Channels 0 thru 3 are the PXA25x compatibility timers. There are NO * match control register for these channels. * Calls to getOSCR/setOSCR for channels 1 thru 3 are remmaped to OSCR0. * * There may be additional configured inter-dependencies between the timer * channels. Refer to the PXA27x Developer's Guide for more information. * * @author Phil Buonadonna */ interface HplPXA27xOSTimer { /** * Set/initialize the counter register (OSCRx) for the channel * * @param val Desired value to initialize/reset the counter register to. * */ async command void setOSCR(uint32_t val); /** * Get the current counter register (OSCRx) value for the channel. * * @return value The 32-bit value of the counter register. */ async command uint32_t getOSCR(); /** * Set the match register (OSMRx) for the channel. * * @param val The desired 32-bit match value. */ async command void setOSMR(uint32_t val); /** * Get the current match register (OSMRx) value for the channel. * * @return value The 32-bit value of the match register. */ async command uint32_t getOSMR(); /** * Set the timer channel match control register (OMCRx). * * @param val The desired OMCR value. */ async command void setOMCR(uint32_t val); /** * Get the current channel match control register (OMCRx) setting. * * @return value The current OMCR value. */ async command uint32_t getOMCR(); /** * Returns the bit value of the OSSR register corresponding to the * channel. Indicates if a match event has ocurred. * * @return flag TRUE if an event is signaled (OSSR.M{n} is set). * FALSE otherwise * * */ async command bool getOSSRbit(); /** * Clears the bit position of the OSSR register corresponding to the * channel. Returns the value of the bit before clearing. * * @return flag TRUE if an event is signaled (OSSR.M{n} set) prior * to clearing. FALSE otherwise. */ async command bool clearOSSRbit(); /** * Sets the OIER bit corresponding to the timer match channel. * * @param flag TRUE to set the OIER bit, FALSE to clear. */ async command void setOIERbit(bool flag); /** * Returns the setting of the OIER bit corresponding to the timer * match channel. * * @return flag TRUE if set, FALSE if not set. */ async command bool getOIERbit(); /** * Get the snapshot register (OSNR) value. * Any parameterization of this function is ignored. */ async command uint32_t getOSNR(); /** * Timer channel interrupt. Fired when the channel match register matches * configured */ async event void fired(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HplPXA27xOSTimerC.nc000066400000000000000000000063001207233610700234710ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ configuration HplPXA27xOSTimerC { provides { interface Init; interface HplPXA27xOSTimer as OST0; interface HplPXA27xOSTimer as OST0M1; interface HplPXA27xOSTimer as OST0M2; interface HplPXA27xOSTimer as OST0M3; interface HplPXA27xOSTimer as OST4; interface HplPXA27xOSTimer as OST5; interface HplPXA27xOSTimer as OST6; interface HplPXA27xOSTimer as OST7; interface HplPXA27xOSTimer as OST8; interface HplPXA27xOSTimer as OST9; interface HplPXA27xOSTimer as OST10; interface HplPXA27xOSTimer as OST11; interface HplPXA27xOSTimerWatchdog as OSTWDCntl; } } implementation { components HplPXA27xOSTimerM, HplPXA27xInterruptM; Init = HplPXA27xOSTimerM; OST0 = HplPXA27xOSTimerM.PXA27xOST[0]; OST0M1 = HplPXA27xOSTimerM.PXA27xOST[1]; OST0M2 = HplPXA27xOSTimerM.PXA27xOST[2]; OST0M3 = HplPXA27xOSTimerM.PXA27xOST[3]; OST4 = HplPXA27xOSTimerM.PXA27xOST[4]; OST5 = HplPXA27xOSTimerM.PXA27xOST[5]; OST6 = HplPXA27xOSTimerM.PXA27xOST[6]; OST7 = HplPXA27xOSTimerM.PXA27xOST[7]; OST8 = HplPXA27xOSTimerM.PXA27xOST[8]; OST9 = HplPXA27xOSTimerM.PXA27xOST[9]; OST10 = HplPXA27xOSTimerM.PXA27xOST[10]; OST11 = HplPXA27xOSTimerM.PXA27xOST[11]; OSTWDCntl = HplPXA27xOSTimerM.PXA27xWD; HplPXA27xOSTimerM.OST0Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_0]; HplPXA27xOSTimerM.OST1Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_1]; HplPXA27xOSTimerM.OST2Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_2]; HplPXA27xOSTimerM.OST3Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_3]; HplPXA27xOSTimerM.OST4_11Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_4_11]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HplPXA27xOSTimerM.nc000066400000000000000000000130131207233610700235020ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ module HplPXA27xOSTimerM { provides { interface Init; interface HplPXA27xOSTimer as PXA27xOST[uint8_t chnl_id]; interface HplPXA27xOSTimerWatchdog as PXA27xWD; } uses { interface HplPXA27xInterrupt as OST0Irq; interface HplPXA27xInterrupt as OST1Irq; interface HplPXA27xInterrupt as OST2Irq; interface HplPXA27xInterrupt as OST3Irq; interface HplPXA27xInterrupt as OST4_11Irq; } } implementation { bool gfInitialized = FALSE; void DispatchOSTInterrupt(uint8_t id) { signal PXA27xOST.fired[id](); return; } command error_t Init.init() { bool initflag; atomic { initflag = gfInitialized; gfInitialized = TRUE; } if (!initflag) { OIER = 0x0UL; OSSR = 0xFFFFFFFF; // Clear all status bits. call OST0Irq.allocate(); call OST1Irq.allocate(); call OST2Irq.allocate(); call OST3Irq.allocate(); call OST4_11Irq.allocate(); call OST0Irq.enable(); call OST1Irq.enable(); call OST2Irq.enable(); call OST3Irq.enable(); call OST4_11Irq.enable(); } return SUCCESS; } async command void PXA27xOST.setOSCR[uint8_t chnl_id](uint32_t val) { uint8_t remap_id; remap_id = ((chnl_id < 4) ? (0) : (chnl_id)); OSCR(remap_id) = val; return; } async command uint32_t PXA27xOST.getOSCR[uint8_t chnl_id]() { uint8_t remap_id; uint32_t val; remap_id = ((chnl_id < 4) ? (0) : (chnl_id)); val = OSCR(remap_id); return val; } async command void PXA27xOST.setOSMR[uint8_t chnl_id](uint32_t val) { OSMR(chnl_id) = val; return; } async command uint32_t PXA27xOST.getOSMR[uint8_t chnl_id]() { uint32_t val; val = OSMR(chnl_id); return val; } async command void PXA27xOST.setOMCR[uint8_t chnl_id](uint32_t val) { if (chnl_id > 3) { OMCR(chnl_id) = val; } return; } async command uint32_t PXA27xOST.getOMCR[uint8_t chnl_id]() { uint32_t val = 0; if (chnl_id > 3) { val = OMCR(chnl_id); } return val; } async command bool PXA27xOST.getOSSRbit[uint8_t chnl_id]() { bool bFlag = FALSE; if (((OSSR) & (1 << chnl_id)) != 0) { bFlag = TRUE; } return bFlag; } async command bool PXA27xOST.clearOSSRbit[uint8_t chnl_id]() { bool bFlag = FALSE; if (((OSSR) & (1 << chnl_id)) != 0) { bFlag = TRUE; } // Clear the bit value OSSR = (1 << chnl_id); return bFlag; } async command void PXA27xOST.setOIERbit[uint8_t chnl_id](bool flag) { if (flag == TRUE) { OIER |= (1 << chnl_id); } else { OIER &= ~(1 << chnl_id); } return; } async command bool PXA27xOST.getOIERbit[uint8_t chnl_id]() { return ((OIER & (1 << chnl_id)) != 0); } async command uint32_t PXA27xOST.getOSNR[uint8_t chnl_id]() { uint32_t val; val = OSNR; return val; } async command void PXA27xWD.enableWatchdog() { OWER = OWER_WME; } // All interrupts are funneled through DispatchOSTInterrupt. // This should not have any impact on performance and simplifies // the software implementation. async event void OST0Irq.fired() { DispatchOSTInterrupt(0); } async event void OST1Irq.fired() { DispatchOSTInterrupt(1); } async event void OST2Irq.fired() { DispatchOSTInterrupt(2); } async event void OST3Irq.fired() { DispatchOSTInterrupt(3); } async event void OST4_11Irq.fired() { uint32_t statusReg; uint8_t chnl; statusReg = OSSR; statusReg &= ~(OSSR_M3 | OSSR_M2 | OSSR_M1 | OSSR_M0); while (statusReg) { chnl = 31 - _pxa27x_clzui(statusReg); DispatchOSTInterrupt(chnl); statusReg &= ~(1 << chnl); } return; } default async event void PXA27xOST.fired[uint8_t chnl_id]() { call PXA27xOST.setOIERbit[chnl_id](FALSE); call PXA27xOST.clearOSSRbit[chnl_id](); return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HplPXA27xOSTimerWatchdog.nc000066400000000000000000000036561207233610700250620ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * This interface exposes the watchdog control of the PXA27x OS Timer * * Refer to the PXA27x Developer's Guide for more information. * * @author Phil Buonadonna */ interface HplPXA27xOSTimerWatchdog { /** * Enable the timer-based watchdog reset feature. * Once enabled, this feature may only be disabled by a reset. */ async command void enableWatchdog(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HplPXA27xPower.nc000066400000000000000000000034301207233610700231410ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ /* * Code to access some power management registers */ interface HplPXA27xPower { async command void setPWER(uint32_t val); async command void setPWRMode(uint8_t val); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HplPXA27xPowerM.nc000066400000000000000000000037561207233610700232710ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ module HplPXA27xPowerM { provides interface HplPXA27xPower; } implementation { async command void HplPXA27xPower.setPWER(uint32_t val) { PWER = val; } async command void HplPXA27xPower.setPWRMode(uint8_t val) { val = val & 0xF; asm volatile ( "mcr p14,0,%0,c7,c0,0" : : "r" (val) ); __nesc_enable_interrupt(); __nesc_disable_interrupt(); } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HplPXA27xRTC.nc000066400000000000000000000040071207233610700224760ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ /* * Code to access some RTC registers */ interface HplPXA27xRTC { async command void setRTCPICR(uint16_t val); async command uint16_t getRTCPICR(); async command void setPIAR(uint16_t val); async command uint16_t getPIAR(); async command void setRTSR(uint16_t val); async command void setSWAR1(uint32_t val); async command void setSWAR2(uint32_t val); async command void setSWCR(uint32_t val); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/timer/HplPXA27xRTCM.nc000066400000000000000000000043711207233610700226170ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ module HplPXA27xRTCM { provides interface HplPXA27xRTC; } implementation { async command void HplPXA27xRTC.setRTCPICR(uint16_t val) { RTCPICR = val; } async command uint16_t HplPXA27xRTC.getRTCPICR() { return RTCPICR; } async command void HplPXA27xRTC.setPIAR(uint16_t val) { PIAR = val; } async command uint16_t HplPXA27xRTC.getPIAR() { return PIAR; } async command void HplPXA27xRTC.setRTSR(uint16_t val) { RTSR = val; } async command void HplPXA27xRTC.setSWAR1(uint32_t val) { SWAR1 = val; } async command void HplPXA27xRTC.setSWAR2(uint32_t val) { SWAR2 = val; } async command void HplPXA27xRTC.setSWCR(uint32_t val) { SWCR = val; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/000077500000000000000000000000001207233610700200005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/HalPXA27xSerialCntl.nc000066400000000000000000000045661207233610700237340ustar00rootroot00000000000000/* $Id: HalPXA27xSerialCntl.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna */ #include "pxa27x_serial.h" interface HalPXA27xSerialCntl { /** * Modify runtime port parameters * * @param baudrate The integer value of baudrate * @param databits The Number of data bits * @param partiy Values of EVEN,ODD or NONE * @param stopbits Values of 1 or 2 * @param flow_cntl TRUE to enable hardware flow control * * @return SUCCESS if parameters successfully applied. FAIL otherwise */ async command error_t configPort(uint32_t baudrate, uint8_t databits, uart_parity_t parity, uint8_t stopbits, bool flow_cntl); /** * Flush the port FIFOs * * @return SUCCESS if flushed, FAIL otherwise. */ async command error_t flushPort(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc000066400000000000000000000324001207233610700232170ustar00rootroot00000000000000/* $Id: HalPXA27xSerialP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /** * Implements the UartByte, UartStream and HalPXA27xSerialPacket interface * for a PXA27x UART. * * * @param defaultRate Default baud rate for the serial port. * * * @author Phil Buonadonna */ #include "pxa27x_serial.h" generic module HalPXA27xSerialP(uint32_t defaultRate) { provides { interface Init; interface StdControl; interface UartByte; interface UartStream; interface HalPXA27xSerialPacket; interface HalPXA27xSerialCntl; } uses { interface Init as UARTInit; interface HplPXA27xUART as UART; interface HplPXA27xDMAChnl as RxDMA; interface HplPXA27xDMAChnl as TxDMA; interface HplPXA27xDMAInfo as UARTRxDMAInfo; interface HplPXA27xDMAInfo as UARTTxDMAInfo; } } implementation { uint8_t *txCurrentBuf, *rxCurrentBuf; uint32_t txCurrentLen, rxCurrentLen, rxCurrentIdx; uint32_t gulFCRShadow; bool gbUsingUartStreamSendIF = FALSE; bool gbUsingUartStreamRcvIF = FALSE; bool gbRcvByteEvtEnabled = TRUE; command error_t Init.init() { error_t error = SUCCESS; atomic { call UARTInit.init(); txCurrentBuf = rxCurrentBuf = NULL; gbUsingUartStreamSendIF = FALSE; gbUsingUartStreamRcvIF = FALSE; gbRcvByteEvtEnabled = TRUE; gulFCRShadow = (FCR_TRFIFOE | FCR_ITL(0)); // FIFO Mode, 1 byte Rx threshold } call TxDMA.setMap(call UARTTxDMAInfo.getMapIndex()); call RxDMA.setMap(call UARTRxDMAInfo.getMapIndex()); call TxDMA.setDALGNbit(TRUE); call RxDMA.setDALGNbit(TRUE); error = call HalPXA27xSerialCntl.configPort(defaultRate,8,NONE,1,FALSE); atomic {call UART.setFCR(gulFCRShadow);} return error; } command error_t StdControl.start() { atomic { call UART.setIER(IER_UUE | IER_RAVIE); } return SUCCESS; } command error_t StdControl.stop() { atomic { call UART.setIER(0); } return SUCCESS; } async command error_t UartByte.send(uint8_t data) { atomic call UART.setTHR(data); while ((call UART.getLSR() & LSR_TEMT) == 0); return SUCCESS; } async command error_t UartByte.receive( uint8_t *data, uint8_t timeout) { error_t error = FAIL; uint8_t t; for (t = 0; t < timeout; t++) { if (call UART.getLSR() & LSR_DR) { *data = call UART.getRBR(); error = SUCCESS; break; } } return error; } async command error_t UartStream.send( uint8_t* buf, uint16_t len ) { error_t error; atomic gbUsingUartStreamSendIF = TRUE; error = call HalPXA27xSerialPacket.send(buf,len); if (error) { atomic gbUsingUartStreamSendIF = FALSE; } return error; } async command error_t UartStream.enableReceiveInterrupt() { error_t error = SUCCESS; atomic { if (rxCurrentBuf == NULL) { call UART.setIER(call UART.getIER() | IER_RAVIE); } gbRcvByteEvtEnabled = TRUE; } return SUCCESS; } async command error_t UartStream.disableReceiveInterrupt() { atomic { // Check to make sure a short stream/packet call isn't in progress if ((rxCurrentBuf == NULL) || (rxCurrentLen >= 8)) { call UART.setIER(call UART.getIER() & ~IER_RAVIE); } gbRcvByteEvtEnabled = FALSE; } return SUCCESS; } async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) { error_t error; atomic gbUsingUartStreamRcvIF = TRUE; error = call HalPXA27xSerialPacket.receive(buf,len,0); if (error) { atomic gbUsingUartStreamRcvIF = FALSE; } return error; } async command error_t HalPXA27xSerialPacket.send(uint8_t *buf, uint16_t len) { uint32_t txAddr; uint32_t DMAFlags; error_t error = SUCCESS; atomic { if (txCurrentBuf == NULL) { txCurrentBuf = buf; txCurrentLen = len; } else { error = FAIL; } } if (error) return error; if (len < 8) { uint16_t i; // Use PIO. Invariant: FIFO is empty atomic { gulFCRShadow |= FCR_TIL; call UART.setFCR(gulFCRShadow); } for (i = 0;i < len;i++) { call UART.setTHR(buf[i]); } atomic call UART.setIER(call UART.getIER() | IER_TIE); } else { // Use DMA DMAFlags = (DCMD_FLOWTRG | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_ENDIRQEN | DCMD_LEN(len) ); txAddr = (uint32_t) buf; DMAFlags |= DCMD_INCSRCADDR; call TxDMA.setDCSR(DCSR_NODESCFETCH); call TxDMA.setDSADR(txAddr); call TxDMA.setDTADR(call UARTTxDMAInfo.getAddr()); call TxDMA.setDCMD(DMAFlags); atomic { call UART.setIER(call UART.getIER() | IER_DMAE); } call TxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH); } return error; } async command error_t HalPXA27xSerialPacket.receive(uint8_t *buf, uint16_t len, uint16_t timeout) { uint32_t rxAddr; uint32_t DMAFlags; error_t error = SUCCESS; atomic { if (rxCurrentBuf == NULL) { rxCurrentBuf = buf; rxCurrentLen = len; rxCurrentIdx = 0; } else { error = FAIL; } } if (error) return error; if (len < 8) { // Use PIO. Invariant: FIFO is empty atomic { gulFCRShadow = ((gulFCRShadow & ~(FCR_ITL(3))) | FCR_ITL(0)); call UART.setFCR(gulFCRShadow); call UART.setIER(call UART.getIER() | IER_RAVIE); } } else { // Use DMA DMAFlags = (DCMD_FLOWSRC | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_ENDIRQEN | DCMD_LEN(len) ); rxAddr = (uint32_t) buf; DMAFlags |= DCMD_INCTRGADDR; call RxDMA.setDCSR(DCSR_NODESCFETCH); call RxDMA.setDTADR(rxAddr); call RxDMA.setDSADR(call UARTRxDMAInfo.getAddr()); call RxDMA.setDCMD(DMAFlags); atomic { gulFCRShadow = ((gulFCRShadow & ~(FCR_ITL(3))) | FCR_ITL(1)); call UART.setFCR(gulFCRShadow); call UART.setIER((call UART.getIER() & ~IER_RAVIE) | IER_DMAE); } call RxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH); } return error; } void DispatchStreamRcvSignal() { uint8_t *pBuf = rxCurrentBuf; uint16_t len = rxCurrentLen; rxCurrentBuf = NULL; if (gbUsingUartStreamRcvIF) { gbUsingUartStreamRcvIF = FALSE; signal UartStream.receiveDone(pBuf, len, SUCCESS); } else { pBuf = signal HalPXA27xSerialPacket.receiveDone(pBuf, len, SUCCESS); if (pBuf) { call HalPXA27xSerialPacket.receive(pBuf,len,0); } } return; } void DispatchStreamSendSignal() { uint8_t *pBuf = txCurrentBuf; uint16_t len = txCurrentLen; txCurrentBuf = NULL; if (gbUsingUartStreamSendIF) { gbUsingUartStreamSendIF = FALSE; signal UartStream.sendDone(pBuf, len, SUCCESS); } else { pBuf = signal HalPXA27xSerialPacket.sendDone(pBuf, len, SUCCESS); if (pBuf) { call HalPXA27xSerialPacket.send(pBuf,len); } } return; } async event void RxDMA.interruptDMA() { call RxDMA.setDCMD(0); call RxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR); DispatchStreamRcvSignal(); if (gbRcvByteEvtEnabled) call UART.setIER(call UART.getIER() | IER_RAVIE); return; } async event void TxDMA.interruptDMA() { call TxDMA.setDCMD(0); call TxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR); DispatchStreamSendSignal(); return; } async command error_t HalPXA27xSerialCntl.configPort(uint32_t baudrate, uint8_t databits, uart_parity_t parity, uint8_t stopbits, bool flow_cntl) { uint32_t uiDivisor; uint32_t valLCR = 0; uint32_t valMCR = MCR_OUT2; uiDivisor = 921600/baudrate; // Check for invalid baud rate divisor value. // XXX - Eventually could use '0' to imply auto rate detection if ((uiDivisor & 0xFFFF0000) || (uiDivisor == 0)) { return EINVAL; } if ((databits > 8 || databits < 5)) { return EINVAL; } valLCR |= LCR_WLS((databits-5)); switch (parity) { case EVEN: valLCR |= LCR_EPS; // Fall through to enable case ODD: valLCR |= LCR_PEN; break; case NONE: break; default: return EINVAL; break; } if ((stopbits > 2) || (stopbits < 1)) { return EINVAL; } else if (stopbits == 2) { valLCR |= LCR_STB; } if (flow_cntl) { valMCR |= MCR_AFE; } atomic { call UART.setDLL((uiDivisor & 0xFF)); call UART.setDLH(((uiDivisor >> 8) & 0xFF)); call UART.setLCR(valLCR); call UART.setMCR(valMCR); } return SUCCESS; } async command error_t HalPXA27xSerialCntl.flushPort() { atomic { call UART.setFCR(gulFCRShadow | FCR_RESETTF | FCR_RESETRF); } return SUCCESS; } async event void UART.interruptUART() { uint8_t error, intSource; uint8_t ucByte; intSource = call UART.getIIR(); intSource &= IIR_IID_MASK; intSource = intSource >> 1; switch (intSource) { case 0: // MODEM STATUS break; case 1: // TRANSMIT FIFO call UART.setIER(call UART.getIER() & ~IER_TIE); DispatchStreamSendSignal(); break; case 2: // RECEIVE FIFO data available while (call UART.getLSR() & LSR_DR) { ucByte = call UART.getRBR(); if (rxCurrentBuf != NULL) { rxCurrentBuf[rxCurrentIdx] = ucByte; rxCurrentIdx++; if (rxCurrentIdx >= rxCurrentLen) DispatchStreamRcvSignal(); } else if (gbRcvByteEvtEnabled) { signal UartStream.receivedByte(ucByte); } } break; case 3: // ERROR error = call UART.getLSR(); break; default: break; } return; } default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) { return; } default async event void UartStream.receivedByte(uint8_t data) { return; } default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ) { return; } default async event uint8_t* HalPXA27xSerialPacket.sendDone(uint8_t *buf, uint16_t len, uart_status_t status) { return NULL; } default async event uint8_t* HalPXA27xSerialPacket.receiveDone(uint8_t *buf, uint16_t len, uart_status_t status) { return NULL; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/HalPXA27xSerialPacket.nc000066400000000000000000000067441207233610700242430ustar00rootroot00000000000000/* $Id: HalPXA27xSerialPacket.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna */ #include "pxa27x_serial.h" interface HalPXA27xSerialPacket { /** * Begin transmission of a UART stream. If SUCCESS is returned, * sendDone will be signalled when transmission is * complete. * * @param buf Buffer for bytes to send. * @param len Number of bytes to send. * @return SUCCESS if request was accepted, FAIL otherwise. */ async command error_t send(uint8_t *buf, uint16_t len); /** * Signal completion of sending a stream. * * @param buf Bytes sent. * @param len Number of bytes sent. * @param status UART error status. * * @return buf A pointer to a new buffer of equal length * as in the original send call that is to be transmitted (chained * send). Set to NULL to end further transmissions. */ async event uint8_t *sendDone(uint8_t *buf, uint16_t len, uart_status_t status); /** * Begin reception of a UART stream. If SUCCESS is returned, * receiveDone will be signalled when reception is * complete. * * @param buf Buffer for received bytes. * @param len Number of bytes to receive. * @param timeout Timeout, in milliseconds, for receive operation * * @return SUCCESS if request was accepted, FAIL otherwise. */ async command error_t receive(uint8_t *buf, uint16_t len, uint16_t timeout); /** * Signal completion of receiving a stream. * * @param buf Buffer for bytes received. * @param len Number of bytes received. * @param status UART error status * * @return buf A pointer to a new buffer of equal or greater length * as in the original receive call in which it intiate a * new packet reception (chained receive). Set to NULL to terminate further * reception. */ async event uint8_t *receiveDone(uint8_t *buf, uint16_t len, uart_status_t status); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/HplPXA27xBTUARTC.nc000066400000000000000000000037631207233610700230150ustar00rootroot00000000000000/* $Id: HplPXA27xBTUARTC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration HplPXA27xBTUARTC { provides interface Init; provides interface HplPXA27xUART as BTUART; } implementation { components new HplPXA27xUARTP((uint32_t)&BTRBR); components HplPXA27xInterruptM; Init = HplPXA27xUARTP; BTUART = HplPXA27xUARTP.UART; HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_BTUART]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/HplPXA27xFFUARTC.nc000066400000000000000000000037631207233610700230030ustar00rootroot00000000000000/* $Id: HplPXA27xFFUARTC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration HplPXA27xFFUARTC { provides interface Init; provides interface HplPXA27xUART as FFUART; } implementation { components new HplPXA27xUARTP((uint32_t)&FFRBR); components HplPXA27xInterruptM; Init = HplPXA27xUARTP; FFUART = HplPXA27xUARTP.UART; HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_FFUART]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc000066400000000000000000000037631207233610700230360ustar00rootroot00000000000000/* $Id: HplPXA27xSTUARTC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration HplPXA27xSTUARTC { provides interface Init; provides interface HplPXA27xUART as STUART; } implementation { components new HplPXA27xUARTP((uint32_t)&STRBR); components HplPXA27xInterruptM; Init = HplPXA27xUARTP; STUART = HplPXA27xUARTP.UART; HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_STUART]; } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/HplPXA27xUART.nc000066400000000000000000000055271207233610700224640ustar00rootroot00000000000000/* $Id: HplPXA27xUART.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Interface to access UART peripheral register on the PXA27x. Function * names are based on the common portion of the names outlined in * the PXA27x Developers Guide. * * @author Phil Buonadonna */ interface HplPXA27xUART { async command uint32_t getRBR(); async command void setTHR(uint32_t val); async command void setDLL(uint32_t val); async command uint32_t getDLL(); async command void setDLH(uint32_t val); async command uint32_t getDLH(); async command void setIER(uint32_t val); async command uint32_t getIER(); async command uint32_t getIIR(); async command void setFCR(uint32_t val); async command void setLCR(uint32_t val); async command uint32_t getLCR(); async command void setMCR(uint32_t val); async command uint32_t getMCR(); async command uint32_t getLSR(); async command uint32_t getMSR(); async command void setSPR(uint32_t val); async command uint32_t getSPR(); async command void setISR(uint32_t val); async command uint32_t getISR(); async command void setFOR(uint32_t val); async command uint32_t getFOR(); async command void setABR(uint32_t val); async command uint32_t getABR(); async command uint32_t getACR(); async event void interruptUART(); } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/HplPXA27xUARTP.nc000066400000000000000000000122561207233610700226010ustar00rootroot00000000000000/* $Id: HplPXA27xUARTP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Provides low-level initialization, 1st level interrupt dispatch and register * access for the different uarts. It is a generic that's bound to * the particular UART upon creation. * * @param baseaddr. The base address of the associated uart. One of * &FFRBR, &BTRBR or &STRBR. * This component automatically handles setting of the DLAB bit for * divisor register access (DLL and DLH) * * @author Phil Buonadonna */ #include "PXA27X_UARTREG.h" generic module HplPXA27xUARTP(uint32_t base_addr) { provides interface Init; provides interface HplPXA27xUART as UART; uses interface HplPXA27xInterrupt as UARTIrq; } implementation { bool m_fInit = FALSE; command error_t Init.init() { bool isInited; atomic { isInited = m_fInit; m_fInit = TRUE; } if (!isInited) { switch (base_addr) { case (0x40100000): CKEN |= CKEN6_FFUART; break; case (0x40200000): CKEN |= CKEN7_BTUART; break; case (0x40700000): CKEN |= CKEN5_STUART; break; default: break; } call UARTIrq.allocate(); call UARTIrq.enable(); UARTLCR(base_addr) |= LCR_DLAB; UARTDLL(base_addr) = 0x04; UARTDLH(base_addr) = 0x00; UARTLCR(base_addr) &= ~LCR_DLAB; } return SUCCESS; } async command uint32_t UART.getRBR() { return UARTRBR(base_addr); } async command void UART.setTHR(uint32_t val) { UARTTHR(base_addr) = val; } async command void UART.setDLL(uint32_t val) { UARTLCR(base_addr) |= LCR_DLAB; UARTDLL(base_addr) = val; UARTLCR(base_addr) &= ~LCR_DLAB; } async command uint32_t UART.getDLL() { uint32_t val; UARTLCR(base_addr) |= LCR_DLAB; val = UARTDLL(base_addr); UARTLCR(base_addr) &= ~LCR_DLAB; return val; } async command void UART.setDLH(uint32_t val) { UARTLCR(base_addr) |= LCR_DLAB; UARTDLH(base_addr) = val; UARTLCR(base_addr) &= ~LCR_DLAB; } async command uint32_t UART.getDLH() { uint32_t val; UARTLCR(base_addr) |= LCR_DLAB; val = UARTDLH(base_addr); UARTLCR(base_addr) &= ~LCR_DLAB; return val; } async command void UART.setIER(uint32_t val) { UARTIER(base_addr) = val; } async command uint32_t UART.getIER() { return UARTIER(base_addr); } async command uint32_t UART.getIIR() { return UARTIIR(base_addr); } async command void UART.setFCR(uint32_t val) { UARTFCR(base_addr) = val; } async command void UART.setLCR(uint32_t val) { UARTLCR(base_addr) = val; } async command uint32_t UART.getLCR() { return UARTLCR(base_addr); } async command void UART.setMCR(uint32_t val) { UARTMCR(base_addr) = val; } async command uint32_t UART.getMCR() { return UARTMCR(base_addr); } async command uint32_t UART.getLSR() { return UARTLSR(base_addr); } async command uint32_t UART.getMSR() { return UARTMSR(base_addr); } async command void UART.setSPR(uint32_t val) { UARTSPR(base_addr) = val; } async command uint32_t UART.getSPR() { return UARTSPR(base_addr); } async command void UART.setISR(uint32_t val) { UARTISR(base_addr) = val; } async command uint32_t UART.getISR() { return UARTISR(base_addr); } async command void UART.setFOR(uint32_t val) { UARTFOR(base_addr) = val; } async command uint32_t UART.getFOR() { return UARTFOR(base_addr); } async command void UART.setABR(uint32_t val) { UARTABR(base_addr) = val; } async command uint32_t UART.getABR() { return UARTABR(base_addr); } async command uint32_t UART.getACR() { return UARTACR(base_addr); } async event void UARTIrq.fired () { signal UART.interruptUART(); } default async event void UART.interruptUART() { return; } } tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/PXA27X_UARTREG.h000066400000000000000000000050611207233610700222750ustar00rootroot00000000000000/* $Id: PXA27X_UARTREG.h,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * Helper macros to make programming the HplPXA27xUARTP component easier */ #ifndef _PXA27X_UARTREG_H #define _PXA27X_UARTREG_H #define UARTRBR(_base) _PXAREG_OFFSET(_base,0) #define UARTTHR(_base) _PXAREG_OFFSET(_base,0) #define UARTIER(_base) _PXAREG_OFFSET(_base,0x04) #define UARTIIR(_base) _PXAREG_OFFSET(_base,0x08) #define UARTFCR(_base) _PXAREG_OFFSET(_base,0x08) #define UARTLCR(_base) _PXAREG_OFFSET(_base,0x0C) #define UARTMCR(_base) _PXAREG_OFFSET(_base,0x10) #define UARTLSR(_base) _PXAREG_OFFSET(_base,0x14) #define UARTMSR(_base) _PXAREG_OFFSET(_base,0x18) #define UARTSPR(_base) _PXAREG_OFFSET(_base,0x1C) #define UARTISR(_base) _PXAREG_OFFSET(_base,0x20) #define UARTFOR(_base) _PXAREG_OFFSET(_base,0x24) #define UARTABR(_base) _PXAREG_OFFSET(_base,0x28) #define UARTACR(_base) _PXAREG_OFFSET(_base,0x2C) #define UARTDLL(_base) _PXAREG_OFFSET(_base,0) #define UARTDLH(_base) _PXAREG_OFFSET(_base,0x04) #endif /* _PXA27X_UARTREG_H */ tinyos-2.1.2+dfsg/tos/chips/pxa27x/uart/pxa27x_serial.h000066400000000000000000000035061207233610700226450ustar00rootroot00000000000000/* $Id: pxa27x_serial.h,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ #ifndef _pxa27x_serial_h #define _pxa27x_serial_h typedef uint8_t uart_status_t; // ??? if this is supposed to be a uint8_t typedef enum { EVEN, ODD, NONE } uart_parity_t; #endif /* _pxa27x_serial_h */ tinyos-2.1.2+dfsg/tos/chips/rf212/000077500000000000000000000000001207233610700165305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/rf212/README000066400000000000000000000023521207233610700174120ustar00rootroot00000000000000 The RF212 radio driver has the following configuration options. Some of these are set in the platforms/xxx/chips/rf212/RadioConfig.h header file, see the meshbean900 platform for example, others can be set in your Makefile. RF212_TRX_CTRL_0_VALUE: This is the value of the TRX_CTRL_0 register which configures the output pin currents and the CLKM clock: RF212_CCA_MODE_VALUE: This is the default value of the CCA_MODE field in the PHY_CC_CCA register which is used to configure the default mode of the clear channel assesment RF212_CCA_THRES_VALUE: This is the value of the CCA_THRES register that controls the energy levels used for clear channel assesment. RF212_DEF_RFPOWER: This is the default value of the TX_PWR field of the PHY_TX_PWR register. This can be cahanged via the PacketTransmitPower interface provided by the RF212ActiveMessageC. RF212_DEF_CHANNEL: This is the default value of the CHANNEL field of the PHY_CC_CCA register. This can be cahanged via the RadioChannel interface provided by the RF212ActiveMessageC. RF212_RSSI_ENERGY: If you define this, then the content of the RF212_PHY_ED_LEVEL is queried instead of the RSSI value for eahc incoming message. This value can be obtained with the PacketRSSI interface. tinyos-2.1.2+dfsg/tos/chips/rf212/RF212ActiveMessageC.nc000066400000000000000000000064001207233610700223520ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #ifdef IEEE154FRAMES_ENABLED #error "You cannot use ActiveMessageC with IEEE154FRAMES_ENABLED defined" #endif configuration RF212ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RF212RadioC as RadioC; SplitControl = RadioC; AMSend = RadioC; Receive = RadioC.Receive; Snoop = RadioC.Snoop; SendNotifier = RadioC; ReceiveDefault = RadioC.ReceiveDefault; SnoopDefault = RadioC.SnoopDefault; Packet = RadioC.PacketForActiveMessage; AMPacket = RadioC; PacketAcknowledgements = RadioC; LowPowerListening = RadioC; PacketLink = RadioC; RadioChannel = RadioC; PacketLinkQuality = RadioC.PacketLinkQuality; PacketTransmitPower = RadioC.PacketTransmitPower; PacketRSSI = RadioC.PacketRSSI; LinkPacketMetadata = RadioC; LocalTimeRadio = RadioC; PacketTimeStampMilli = RadioC; PacketTimeStampRadio = RadioC; } tinyos-2.1.2+dfsg/tos/chips/rf212/RF212DriverConfig.nc000066400000000000000000000050541207233610700221140ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface RF212DriverConfig { /** * Returns the length of a dummy header to align the payload properly. */ async command uint8_t headerLength(message_t* msg); /** * Returns the maximum length of the PHY payload including the * length field but not counting the FCF field. */ async command uint8_t maxPayloadLength(); /** * Returns the length of a dummy metadata section to align the * metadata section properly. */ async command uint8_t metadataLength(message_t* msg); /** * Gets the number of bytes we should read before the RadioReceive.header * event is fired. If the length of the packet is less than this amount, * then that event is fired earlier. The header length must be at least one. */ async command uint8_t headerPreloadLength(); /** * Returns TRUE if before sending this message we should make sure that * the channel is clear via a very basic (and quick) RSSI check. */ async command bool requiresRssiCca(message_t* msg); } tinyos-2.1.2+dfsg/tos/chips/rf212/RF212DriverLayer.h000066400000000000000000000127151207233610700216140ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __RF212DRIVERLAYER_H__ #define __RF212DRIVERLAYER_H__ typedef nx_struct rf212_header_t { nxle_uint8_t length; } rf212_header_t; typedef struct rf212_metadata_t { uint8_t lqi; union { uint8_t power; uint8_t rssi; }; } rf212_metadata_t; enum rf212_registers_enum { RF212_TRX_STATUS = 0x01, RF212_TRX_STATE = 0x02, RF212_TRX_CTRL_0 = 0x03, RF212_TRX_CTRL_1 = 0x04, RF212_PHY_TX_PWR = 0x05, RF212_PHY_RSSI = 0x06, RF212_PHY_ED_LEVEL = 0x07, RF212_PHY_CC_CCA = 0x08, RF212_CCA_THRES = 0x09, RF212_TRX_CTRL_2 = 0x0C, RF212_IRQ_MASK = 0x0E, RF212_IRQ_STATUS = 0x0F, RF212_VREG_CTRL = 0x10, RF212_BATMON = 0x11, RF212_XOSC_CTRL = 0x12, RF212_PLL_CF = 0x1A, RF212_PLL_DCU = 0x1B, RF212_PART_NUM = 0x1C, RF212_VERSION_NUM = 0x1D, RF212_MAN_ID_0 = 0x1E, RF212_MAN_ID_1 = 0x1F, RF212_SHORT_ADDR_0 = 0x20, RF212_SHORT_ADDR_1 = 0x21, RF212_PAN_ID_0 = 0x22, RF212_PAN_ID_1 = 0x23, RF212_IEEE_ADDR_0 = 0x24, RF212_IEEE_ADDR_1 = 0x25, RF212_IEEE_ADDR_2 = 0x26, RF212_IEEE_ADDR_3 = 0x27, RF212_IEEE_ADDR_4 = 0x28, RF212_IEEE_ADDR_5 = 0x29, RF212_IEEE_ADDR_6 = 0x2A, RF212_IEEE_ADDR_7 = 0x2B, RF212_XAH_CTRL = 0x2C, RF212_CSMA_SEED_0 = 0x2D, RF212_CSMA_SEED_1 = 0x2E, }; enum rf212_trx_status_enums { RF212_CCA_DONE = 1 << 7, RF212_CCA_STATUS = 1 << 6, RF212_TRX_STATUS_MASK = 0x1F, RF212_P_ON = 0, RF212_BUSY_RX = 1, RF212_BUSY_TX = 2, RF212_RX_ON = 6, RF212_TRX_OFF = 8, RF212_PLL_ON = 9, RF212_SLEEP = 15, RF212_BUSY_RX_AACK = 17, RF212_BUSR_TX_ARET = 18, RF212_RX_AACK_ON = 22, RF212_TX_ARET_ON = 25, RF212_RX_ON_NOCLK = 28, RF212_AACK_ON_NOCLK = 29, RF212_BUSY_RX_AACK_NOCLK = 30, RF212_STATE_TRANSITION_IN_PROGRESS = 31, }; enum rf212_trx_state_enums { RF212_TRAC_STATUS_MASK = 0xE0, RF212_TRAC_SUCCESS = 0, RF212_TRAC_SUCCESS_DATA_PENDING = 1 << 5, RF212_TRAC_SUCCESS_WAIT_FOR_ACK = 2 << 5, RF212_TRAC_CHANNEL_ACCESS_FAILURE = 3 << 5, RF212_TRAC_NO_ACK = 5 << 5, RF212_TRAC_INVALID = 7 << 5, RF212_TRX_CMD_MASK = 0x1F, RF212_NOP = 0, RF212_TX_START = 2, RF212_FORCE_TRX_OFF = 3, }; enum rf212_trx_data_modes { RF212_DATA_MODE_BPSK_20 = 0x00, RF212_DATA_MODE_BPSK_40 = 0x04, RF212_DATA_MODE_OQPSK_SIN_RC_100 = 0x08, RF212_DATA_MODE_OQPSK_SIN_RC_200 = 0x09, RF212_DATA_MODE_OQPSK_SIN_RC_400_SCR = 0x2A, RF212_DATA_MODE_OQPSK_SIN_RC_400 = 0x0A, RF212_DATA_MODE_OQPSK_SIN_250 = 0x0C, RF212_DATA_MODE_OQPSK_SIN_500 = 0x0D, RF212_DATA_MODE_OQPSK_SIN_1000_SCR = 0x2E, RF212_DATA_MODE_OQPSK_SIN_1000 = 0x0E, RF212_DATA_MODE_OQPSK_RC_250 = 0x1C, RF212_DATA_MODE_OQPSK_RC_500 = 0x1D, RF212_DATA_MODE_OQPSK_RC_1000_SCR = 0x3E, RF212_DATA_MODE_OQPSK_RC_1000 = 0x1E, RF212_DATA_MODE_DEFAULT = 0x00, // BPSK_20 }; enum rf212_phy_rssi_enums { RF212_RX_CRC_VALID = 1 << 7, RF212_RSSI_MASK = 0x1F, }; enum rf212_phy_cc_cca_enums { RF212_CCA_REQUEST = 1 << 7, RF212_CCA_MODE_0 = 0 << 5, RF212_CCA_MODE_1 = 1 << 5, RF212_CCA_MODE_2 = 2 << 5, RF212_CCA_MODE_3 = 3 << 5, RF212_CHANNEL_DEFAULT = 11, RF212_CHANNEL_MASK = 0x1F, }; enum rf212_irq_register_enums { RF212_IRQ_BAT_LOW = 1 << 7, RF212_IRQ_TRX_UR = 1 << 6, RF212_IRQ_AMI = 1 << 5, RF212_IRQ_CCA_ED_DONE = 1 << 4, RF212_IRQ_TRX_END = 1 << 3, RF212_IRQ_RX_START = 1 << 2, RF212_IRQ_PLL_UNLOCK = 1 << 1, RF212_IRQ_PLL_LOCK = 1 << 0, }; enum rf212_batmon_enums { RF212_BATMON_OK = 1 << 5, RF212_BATMON_VHR = 1 << 4, RF212_BATMON_VTH_MASK = 0x0F, }; enum rf212_vreg_ctrl_enums { RF212_AVREG_EXT = 1 << 7, RF212_AVDD_OK = 1 << 6, RF212_DVREG_EXT = 1 << 3, RF212_DVDD_OK = 1 << 2, }; enum rf212_xosc_ctrl_enums { RF212_XTAL_MODE_OFF = 0 << 4, RF212_XTAL_MODE_EXTERNAL = 4 << 4, RF212_XTAL_MODE_INTERNAL = 15 << 4, }; enum rf212_spi_command_enums { RF212_CMD_REGISTER_READ = 0x80, RF212_CMD_REGISTER_WRITE = 0xC0, RF212_CMD_REGISTER_MASK = 0x3F, RF212_CMD_FRAME_READ = 0x20, RF212_CMD_FRAME_WRITE = 0x60, RF212_CMD_SRAM_READ = 0x00, RF212_CMD_SRAM_WRITE = 0x40, }; #endif//__RF212DRIVERLAYER_H__ tinyos-2.1.2+dfsg/tos/chips/rf212/RF212DriverLayerC.nc000066400000000000000000000075431207233610700220730ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include configuration RF212DriverLayerC { provides { interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface Alarm; } uses { interface RF212DriverConfig as Config; interface PacketTimeStamp; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface RadioAlarm; } } implementation { components RF212DriverLayerP, HplRF212C, BusyWaitMicroC, TaskletC, MainC; RadioState = RF212DriverLayerP; RadioSend = RF212DriverLayerP; RadioReceive = RF212DriverLayerP; RadioCCA = RF212DriverLayerP; RadioPacket = RF212DriverLayerP; LocalTimeRadio = HplRF212C; Config = RF212DriverLayerP; PacketTransmitPower = RF212DriverLayerP.PacketTransmitPower; TransmitPowerFlag = RF212DriverLayerP.TransmitPowerFlag; PacketRSSI = RF212DriverLayerP.PacketRSSI; RSSIFlag = RF212DriverLayerP.RSSIFlag; PacketTimeSyncOffset = RF212DriverLayerP.PacketTimeSyncOffset; TimeSyncFlag = RF212DriverLayerP.TimeSyncFlag; PacketLinkQuality = RF212DriverLayerP.PacketLinkQuality; PacketTimeStamp = RF212DriverLayerP.PacketTimeStamp; LinkPacketMetadata = RF212DriverLayerP; RF212DriverLayerP.LocalTime -> HplRF212C; Alarm = HplRF212C.Alarm; RadioAlarm = RF212DriverLayerP.RadioAlarm; RF212DriverLayerP.SELN -> HplRF212C.SELN; RF212DriverLayerP.SpiResource -> HplRF212C.SpiResource; RF212DriverLayerP.FastSpiByte -> HplRF212C; RF212DriverLayerP.SLP_TR -> HplRF212C.SLP_TR; RF212DriverLayerP.RSTN -> HplRF212C.RSTN; RF212DriverLayerP.IRQ -> HplRF212C.IRQ; RF212DriverLayerP.Tasklet -> TaskletC; RF212DriverLayerP.BusyWait -> BusyWaitMicroC; #ifdef RADIO_DEBUG components DiagMsgC; RF212DriverLayerP.DiagMsg -> DiagMsgC; #endif MainC.SoftwareInit -> RF212DriverLayerP.SoftwareInit; components RealMainP; RealMainP.PlatformInit -> RF212DriverLayerP.PlatformInit; } tinyos-2.1.2+dfsg/tos/chips/rf212/RF212DriverLayerP.nc000066400000000000000000000643121207233610700221050ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Andras Biro */ #include #include #include #include #include module RF212DriverLayerP { provides { interface Init as PlatformInit @exactlyonce(); interface Init as SoftwareInit @exactlyonce(); interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; } uses { interface GeneralIO as SELN; interface Resource as SpiResource; interface FastSpiByte; interface GeneralIO as SLP_TR; interface GeneralIO as RSTN; interface GpioCapture as IRQ; interface BusyWait; interface LocalTime; interface RF212DriverConfig as Config; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface PacketTimeStamp; interface Tasklet; interface RadioAlarm; #ifdef RADIO_DEBUG interface DiagMsg; #endif } } implementation { rf212_header_t* getHeader(message_t* msg) { return ((void*)msg) + call Config.headerLength(msg); } void* getPayload(message_t* msg) { return ((void*)msg) + call RadioPacket.headerLength(msg); } rf212_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } /*----------------- STATE -----------------*/ tasklet_norace uint8_t state; enum { STATE_P_ON = 0, STATE_SLEEP = 1, STATE_SLEEP_2_TRX_OFF = 2, STATE_TRX_OFF = 3, STATE_TRX_OFF_2_RX_ON = 4, STATE_RX_ON = 5, STATE_BUSY_TX_2_RX_ON = 6, }; tasklet_norace uint8_t cmd; enum { CMD_NONE = 0, // the state machine has stopped CMD_TURNOFF = 1, // goto SLEEP state CMD_STANDBY = 2, // goto TRX_OFF state CMD_TURNON = 3, // goto RX_ON state CMD_TRANSMIT = 4, // currently transmitting a message CMD_RECEIVE = 5, // currently receiving a message CMD_CCA = 6, // performing clear chanel assesment CMD_CHANNEL = 7, // changing the channel CMD_SIGNAL_DONE = 8, // signal the end of the state transition CMD_DOWNLOAD = 9, // download the received message }; norace bool radioIrq; tasklet_norace uint8_t txPower; tasklet_norace uint8_t channel; tasklet_norace message_t* rxMsg; message_t rxMsgBuffer; uint16_t capturedTime; // the current time when the last interrupt has occured tasklet_norace uint8_t rssiClear; tasklet_norace uint8_t rssiBusy; /*----------------- REGISTER -----------------*/ inline void writeRegister(uint8_t reg, uint8_t value) { RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & RF212_CMD_REGISTER_MASK) ); call SELN.clr(); call FastSpiByte.splitWrite(RF212_CMD_REGISTER_WRITE | reg); call FastSpiByte.splitReadWrite(value); call FastSpiByte.splitRead(); call SELN.set(); } inline uint8_t readRegister(uint8_t reg) { RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & RF212_CMD_REGISTER_MASK) ); call SELN.clr(); call FastSpiByte.splitWrite(RF212_CMD_REGISTER_READ | reg); call FastSpiByte.splitReadWrite(0); reg = call FastSpiByte.splitRead(); call SELN.set(); return reg; } /*----------------- ALARM -----------------*/ // TODO: these constants are depending on the (changable) physical layer enum { TX_SFD_DELAY = (uint16_t)(177 * RADIO_ALARM_MICROSEC), RX_SFD_DELAY = (uint16_t)(8 * RADIO_ALARM_MICROSEC), }; tasklet_async event void RadioAlarm.fired() { } /*----------------- INIT -----------------*/ command error_t PlatformInit.init() { call SELN.makeOutput(); call SELN.set(); call SLP_TR.makeOutput(); call SLP_TR.clr(); call RSTN.makeOutput(); call RSTN.set(); rxMsg = &rxMsgBuffer; // these are just good approximates rssiClear = 0; rssiBusy = 90; return SUCCESS; } command error_t SoftwareInit.init() { // for powering up the radio return call SpiResource.request(); } void resetRadio() { //TODO: all waiting should be optimized in this function call BusyWait.wait(15); call RSTN.clr(); call SLP_TR.clr(); call BusyWait.wait(15); call RSTN.set(); writeRegister(RF212_TRX_CTRL_0, RF212_TRX_CTRL_0_VALUE); writeRegister(RF212_TRX_STATE, RF212_TRX_OFF); //this is way too much (should be done in around 200us), but 510 seemd too short, and it happens quite rarely call BusyWait.wait(1000); writeRegister(RF212_IRQ_MASK, RF212_IRQ_TRX_UR | RF212_IRQ_PLL_LOCK | RF212_IRQ_TRX_END | RF212_IRQ_RX_START | RF212_IRQ_CCA_ED_DONE); // update register values if different from default if( RF212_CCA_THRES_VALUE != 0x77 ) writeRegister(RF212_CCA_THRES, RF212_CCA_THRES_VALUE); if( RF212_DEF_RFPOWER != 0x60 ) writeRegister(RF212_PHY_TX_PWR, RF212_DEF_RFPOWER); if( RF212_TRX_CTRL_2_VALUE != RF212_DATA_MODE_DEFAULT ) writeRegister(RF212_TRX_CTRL_2, RF212_TRX_CTRL_2_VALUE); writeRegister(RF212_PHY_CC_CCA, RF212_CCA_MODE_VALUE | channel); state = STATE_TRX_OFF; } void initRadio() { call BusyWait.wait(510); call RSTN.clr(); call SLP_TR.clr(); call BusyWait.wait(6); call RSTN.set(); writeRegister(RF212_TRX_CTRL_0, RF212_TRX_CTRL_0_VALUE); writeRegister(RF212_TRX_STATE, RF212_TRX_OFF); call BusyWait.wait(510); writeRegister(RF212_IRQ_MASK, RF212_IRQ_TRX_UR | RF212_IRQ_PLL_LOCK | RF212_IRQ_TRX_END | RF212_IRQ_RX_START | RF212_IRQ_CCA_ED_DONE); // update register values if different from default if( RF212_CCA_THRES_VALUE != 0x77 ) writeRegister(RF212_CCA_THRES, RF212_CCA_THRES_VALUE); if( RF212_DEF_RFPOWER != 0x60 ) writeRegister(RF212_PHY_TX_PWR, RF212_DEF_RFPOWER); if( RF212_TRX_CTRL_2_VALUE != RF212_DATA_MODE_DEFAULT ) writeRegister(RF212_TRX_CTRL_2, RF212_TRX_CTRL_2_VALUE); txPower = RF212_DEF_RFPOWER; channel = RF212_DEF_CHANNEL & RF212_CHANNEL_MASK; writeRegister(RF212_PHY_CC_CCA, RF212_CCA_MODE_VALUE | channel); call SLP_TR.set(); state = STATE_SLEEP; } /*----------------- SPI -----------------*/ event void SpiResource.granted() { call SELN.makeOutput(); call SELN.set(); if( state == STATE_P_ON ) { initRadio(); call SpiResource.release(); } else call Tasklet.schedule(); } bool isSpiAcquired() { if( call SpiResource.isOwner() ) return TRUE; if( call SpiResource.immediateRequest() == SUCCESS ) { call SELN.makeOutput(); call SELN.set(); return TRUE; } call SpiResource.request(); return FALSE; } /*----------------- CHANNEL -----------------*/ tasklet_async command uint8_t RadioState.getChannel() { return channel; } tasklet_async command error_t RadioState.setChannel(uint8_t c) { c &= RF212_CHANNEL_MASK; if( cmd != CMD_NONE ) return EBUSY; else if( channel == c ) return EALREADY; channel = c; cmd = CMD_CHANNEL; call Tasklet.schedule(); return SUCCESS; } inline void changeChannel() { RADIO_ASSERT( cmd == CMD_CHANNEL ); RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON ); if( isSpiAcquired() ) { writeRegister(RF212_PHY_CC_CCA, RF212_CCA_MODE_VALUE | channel); if( state == STATE_RX_ON ) state = STATE_TRX_OFF_2_RX_ON; else cmd = CMD_SIGNAL_DONE; } } /*----------------- TURN ON/OFF -----------------*/ inline void changeState() { if( (cmd == CMD_STANDBY || cmd == CMD_TURNON) && state == STATE_SLEEP && isSpiAcquired()) { RADIO_ASSERT( ! radioIrq ); call IRQ.captureRisingEdge(); state = STATE_SLEEP_2_TRX_OFF; call SLP_TR.clr(); } else if( cmd == CMD_TURNON && state == STATE_TRX_OFF && isSpiAcquired() ) { // setChannel was ignored in SLEEP because the SPI was not working, so do it here writeRegister(RF212_PHY_CC_CCA, RF212_CCA_MODE_VALUE | channel); writeRegister(RF212_TRX_STATE, RF212_RX_ON); state = STATE_TRX_OFF_2_RX_ON; } else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) && state == STATE_RX_ON && isSpiAcquired() ) { call IRQ.disable(); writeRegister(RF212_TRX_STATE, RF212_FORCE_TRX_OFF); state = STATE_TRX_OFF; } if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF ) { readRegister(RF212_IRQ_STATUS); // clear the interrupt register call SLP_TR.set(); state = STATE_SLEEP; cmd = CMD_SIGNAL_DONE; } else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF ) cmd = CMD_SIGNAL_DONE; } tasklet_async command error_t RadioState.turnOff() { if( cmd != CMD_NONE ) return EBUSY; else if( state == STATE_SLEEP ) return EALREADY; cmd = CMD_TURNOFF; call Tasklet.schedule(); return SUCCESS; } tasklet_async command error_t RadioState.standby() { if( cmd != CMD_NONE ) return EBUSY; else if( state == STATE_TRX_OFF ) return EALREADY; cmd = CMD_STANDBY; call Tasklet.schedule(); return SUCCESS; } tasklet_async command error_t RadioState.turnOn() { if( cmd != CMD_NONE ) return EBUSY; else if( state == STATE_RX_ON ) return EALREADY; cmd = CMD_TURNON; call Tasklet.schedule(); return SUCCESS; } default tasklet_async event void RadioState.done() { } /*----------------- TRANSMIT -----------------*/ tasklet_async command error_t RadioSend.send(message_t* msg) { uint16_t time; uint8_t length; uint8_t* data; uint8_t header; uint32_t time32; void* timesync; if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq ) return EBUSY; length = call PacketTransmitPower.isSet(msg) ? call PacketTransmitPower.get(msg) : RF212_DEF_RFPOWER; if( length != txPower ) { txPower = length; writeRegister(RF212_PHY_TX_PWR, txPower); } if( call Config.requiresRssiCca(msg) && (readRegister(RF212_PHY_RSSI) & RF212_RSSI_MASK) > ((rssiClear + rssiBusy) >> 3) ) return EBUSY; writeRegister(RF212_TRX_STATE, RF212_PLL_ON); // do something useful, just to wait a little timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; time32 = call LocalTime.get(); // we have missed an incoming message in this short amount of time if( (readRegister(RF212_TRX_STATUS) & RF212_TRX_STATUS_MASK) != RF212_PLL_ON ) { RADIO_ASSERT( (readRegister(RF212_TRX_STATUS) & RF212_TRX_STATUS_MASK) == RF212_BUSY_RX ); writeRegister(RF212_TRX_STATE, RF212_RX_ON); return EBUSY; } atomic { call SLP_TR.set(); time = call RadioAlarm.getNow(); } call SLP_TR.clr(); RADIO_ASSERT( ! radioIrq ); call SELN.clr(); call FastSpiByte.splitWrite(RF212_CMD_FRAME_WRITE); data = getPayload(msg); length = getHeader(msg)->length; // length | data[0] ... data[length-3] | automatically generated FCS call FastSpiByte.splitReadWrite(length); // the FCS is atomatically generated (2 bytes), but the rf212 needs two dummy bytes, otherwise it will generate a TRX_UR interrupt // length -= 2; header = call Config.headerPreloadLength(); if( header > length ) header = length; length -= header; // first upload the header to gain some time do { call FastSpiByte.splitReadWrite(*(data++)); } while( --header != 0 ); time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32); if( timesync != 0 ) *(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32; while( length-- != 0 ) call FastSpiByte.splitReadWrite(*(data++)); // wait for the SPI transfer to finish call FastSpiByte.splitRead(); call SELN.set(); /* * There is a very small window (~1 microsecond) when the RF212 went * into PLL_ON state but was somehow not properly initialized because * of an incoming message and could not go into BUSY_TX. I think the * radio can even receive a message, and generate a TRX_UR interrupt * because of concurrent access, but that message probably cannot be * recovered. * * TODO: this needs to be verified, and make sure that the chip is * not locked up in this case. */ // go back to RX_ON state when finished writeRegister(RF212_TRX_STATE, RF212_RX_ON); if( timesync != 0 ) *(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32; call PacketTimeStamp.set(msg, time32); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { length = getHeader(msg)->length; call DiagMsg.chr('t'); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(call LocalTime.get()); call DiagMsg.int8(length); call DiagMsg.hex8s(getPayload(msg), length-2); call DiagMsg.send(); } #endif // wait for the TRX_END interrupt state = STATE_BUSY_TX_2_RX_ON; cmd = CMD_TRANSMIT; return SUCCESS; } default tasklet_async event void RadioSend.sendDone(error_t error) { } default tasklet_async event void RadioSend.ready() { } /*----------------- CCA -----------------*/ tasklet_async command error_t RadioCCA.request() { if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() ) return EBUSY; cmd = CMD_CCA; writeRegister(RF212_PHY_CC_CCA, RF212_CCA_REQUEST | RF212_CCA_MODE_VALUE | channel); return SUCCESS; } default tasklet_async event void RadioCCA.done(error_t error) { } /*----------------- RECEIVE -----------------*/ inline void downloadMessage() { uint8_t length; bool crcValid = FALSE; call SELN.clr(); call FastSpiByte.write(RF212_CMD_FRAME_READ); // read the length byte length = call FastSpiByte.write(0); // if correct length if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 ) { uint8_t read; uint8_t* data; // initiate the reading call FastSpiByte.splitWrite(0); data = getPayload(rxMsg); getHeader(rxMsg)->length = length; // we do not store the CRC field length -= 2; read = call Config.headerPreloadLength(); if( length < read ) read = length; length -= read; do { *(data++) = call FastSpiByte.splitReadWrite(0); } while( --read != 0 ); if( signal RadioReceive.header(rxMsg) ) { while( length-- != 0 ) *(data++) = call FastSpiByte.splitReadWrite(0); call FastSpiByte.splitReadWrite(0); // two CRC bytes call FastSpiByte.splitReadWrite(0); call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitReadWrite(0)); call FastSpiByte.splitReadWrite(0); // ED crcValid = call FastSpiByte.splitRead() & RF212_RX_CRC_VALID; // RX_STATUS } else call FastSpiByte.splitRead(); // finish the SPI transfer } call SELN.set(); state = STATE_RX_ON; #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { length = getHeader(rxMsg)->length; call DiagMsg.chr('r'); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(call LocalTime.get()); call DiagMsg.int8(crcValid ? length : -length); call DiagMsg.hex8s(getPayload(rxMsg), length - 2); call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1); call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0); call DiagMsg.send(); } #endif cmd = CMD_NONE; // signal only if it has passed the CRC check if( crcValid ) rxMsg = signal RadioReceive.receive(rxMsg); } /*----------------- IRQ -----------------*/ async event void IRQ.captured(uint16_t time) { RADIO_ASSERT( ! radioIrq ); atomic { capturedTime = time; radioIrq = TRUE; } call Tasklet.schedule(); } void serviceRadio() { if( isSpiAcquired() ) { uint16_t time; uint32_t time32; uint8_t irq; uint8_t temp; atomic time = capturedTime; radioIrq = FALSE; irq = readRegister(RF212_IRQ_STATUS); //this is really bad, but unfortunatly sometimes happens (e.g. radio receives a message while turning on). can't found better solution than reset if(irq == 0 ){ RADIO_ASSERT(FALSE); if (cmd == CMD_TURNON){ resetRadio(); //CMD_TURNON will be restarted at the tasklet when serviceRadio returns } else RADIO_ASSERT(FALSE); /* * We don't care (yet) with CHANNEL, CCA, RECEIVE and TRANSMIT, mostly becouse all of them needs to turn the radio back on, which needs PLL_LOCK irq, * but we don't want to signal RadioState.done() * However it seems most problems happens when turning on the radio */ return; } #ifdef RADIO_DEBUG // TODO: handle this interrupt if( irq & RF212_IRQ_TRX_UR ) { if( call DiagMsg.record() ) { call DiagMsg.str("assert ur"); call DiagMsg.uint16(call LocalTime.get()); call DiagMsg.hex8(readRegister(RF212_TRX_STATUS)); call DiagMsg.hex8(readRegister(RF212_TRX_STATE)); call DiagMsg.hex8(irq); call DiagMsg.uint8(state); call DiagMsg.uint8(cmd); call DiagMsg.send(); } } #endif #ifdef RF212_RSSI_ENERGY if( irq & RF212_IRQ_TRX_END ) { if( irq == RF212_IRQ_TRX_END || (irq == (RF212_IRQ_RX_START | RF212_IRQ_TRX_END) && cmd == CMD_NONE) ) call PacketRSSI.set(rxMsg, readRegister(RF212_PHY_ED_LEVEL)); else call PacketRSSI.clear(rxMsg); } #endif if ( irq & RF212_IRQ_CCA_ED_DONE) { if( state == STATE_SLEEP_2_TRX_OFF ) state = STATE_TRX_OFF; else if( cmd == CMD_CCA ) { uint8_t cca; RADIO_ASSERT( state == STATE_RX_ON ); cmd = CMD_NONE; cca = readRegister(RF212_TRX_STATUS); // sometimes we don't handle yet the RX_START interrupt, but we're already receiving. // It's all right though, CCA reports busy as it should. RADIO_ASSERT( (cca & RF212_TRX_STATUS_MASK) == RF212_RX_ON || (cca & RF212_TRX_STATUS_MASK) == RF212_BUSY_RX); signal RadioCCA.done( (cca & RF212_CCA_DONE) ? ((cca & RF212_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL ); } else if( state != STATE_RX_ON ) //if we receive a message during CCA, we will still get this interrupt, but we're already reported FAIL at RX_START RADIO_ASSERT(FALSE); } // This should be OK now, since we enable the interrupts in SLEEP state, before changing to TRX_OFF // // sometimes we miss a PLL lock interrupt after turn on // if( cmd == CMD_TURNON || cmd == CMD_CHANNEL ) // { // RADIO_ASSERT( irq & RF212_IRQ_PLL_LOCK ); // RADIO_ASSERT( state == STATE_TRX_OFF_2_RX_ON ); // // state = STATE_RX_ON; // cmd = CMD_SIGNAL_DONE; // } else if( irq & RF212_IRQ_PLL_LOCK ) { RADIO_ASSERT( state == STATE_TRX_OFF_2_RX_ON ); if( cmd == CMD_TURNON || cmd == CMD_CHANNEL ) { state = STATE_RX_ON; cmd = CMD_SIGNAL_DONE; } else RADIO_ASSERT( FALSE ); } if( irq & RF212_IRQ_RX_START ) { if( cmd == CMD_CCA ) { cmd = CMD_NONE; signal RadioCCA.done(FAIL); } if( cmd == CMD_NONE ) { RADIO_ASSERT( state == STATE_RX_ON ); // the most likely place for busy channel, with no TRX_END interrupt if( irq == RF212_IRQ_RX_START ) { temp = readRegister(RF212_PHY_RSSI) & RF212_RSSI_MASK; rssiBusy += temp - (rssiBusy >> 2); #ifndef RF212_RSSI_ENERGY call PacketRSSI.set(rxMsg, temp); } else { call PacketRSSI.clear(rxMsg); #endif } /* * The timestamp corresponds to the first event which could not * have been a PLL_LOCK because then cmd != CMD_NONE, so we must * have received a message (and could also have received the * TRX_END interrupt in the mean time, but that is fine. Also, * we could not be after a transmission, because then cmd = * CMD_TRANSMIT. */ if( irq == RF212_IRQ_RX_START ) // just to be cautious { time32 = call LocalTime.get(); time32 += (int16_t)(time - RX_SFD_DELAY) - (int16_t)(time32); call PacketTimeStamp.set(rxMsg, time32); } else call PacketTimeStamp.clear(rxMsg); cmd = CMD_RECEIVE; } else RADIO_ASSERT( cmd == CMD_TURNOFF ); } if( irq & RF212_IRQ_TRX_END ) { if( cmd == CMD_TRANSMIT ) { RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON ); state = STATE_RX_ON; cmd = CMD_NONE; signal RadioSend.sendDone(SUCCESS); // TODO: we could have missed a received message RADIO_ASSERT( ! (irq & RF212_IRQ_RX_START) ); } else if( cmd == CMD_RECEIVE ) { RADIO_ASSERT( state == STATE_RX_ON ); // the most likely place for clear channel (hope to avoid acks) rssiClear += (readRegister(RF212_PHY_RSSI) & RF212_RSSI_MASK) - (rssiClear >> 2); cmd = CMD_DOWNLOAD; } else RADIO_ASSERT(FALSE); } } } default tasklet_async event bool RadioReceive.header(message_t* msg) { return TRUE; } default tasklet_async event message_t* RadioReceive.receive(message_t* msg) { return msg; } /*----------------- TASKLET -----------------*/ task void releaseSpi() { call SpiResource.release(); } tasklet_async event void Tasklet.run() { if( radioIrq ) serviceRadio(); if( cmd != CMD_NONE ) { if( cmd == CMD_DOWNLOAD ) downloadMessage(); else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON ) changeState(); else if( cmd == CMD_CHANNEL ) changeChannel(); if( cmd == CMD_SIGNAL_DONE ) { cmd = CMD_NONE; signal RadioState.done(); } } if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq ) signal RadioSend.ready(); if( cmd == CMD_NONE ) post releaseSpi(); } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg) { return call Config.headerLength(msg) + sizeof(rf212_header_t); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return getHeader(msg)->length - 2; } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { RADIO_ASSERT( 1 <= length && length <= 125 ); RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); // we add the length of the CRC, which is automatically generated getHeader(msg)->length = length + 2; } async command uint8_t RadioPacket.maxPayloadLength() { RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf212_header_t) <= 125 ); return call Config.maxPayloadLength() - sizeof(rf212_header_t); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call Config.metadataLength(msg) + sizeof(rf212_metadata_t); } async command void RadioPacket.clear(message_t* msg) { // all flags are automatically cleared } /*----------------- PacketTransmitPower -----------------*/ async command bool PacketTransmitPower.isSet(message_t* msg) { return call TransmitPowerFlag.get(msg); } async command uint8_t PacketTransmitPower.get(message_t* msg) { return getMeta(msg)->power; } async command void PacketTransmitPower.clear(message_t* msg) { call TransmitPowerFlag.clear(msg); } async command void PacketTransmitPower.set(message_t* msg, uint8_t value) { call TransmitPowerFlag.set(msg); getMeta(msg)->power = value; } /*----------------- PacketRSSI -----------------*/ async command bool PacketRSSI.isSet(message_t* msg) { return call RSSIFlag.get(msg); } async command uint8_t PacketRSSI.get(message_t* msg) { return getMeta(msg)->rssi; } async command void PacketRSSI.clear(message_t* msg) { call RSSIFlag.clear(msg); } async command void PacketRSSI.set(message_t* msg, uint8_t value) { // just to be safe if the user fails to clear the packet call TransmitPowerFlag.clear(msg); call RSSIFlag.set(msg); getMeta(msg)->rssi = value; } /*----------------- PacketTimeSyncOffset -----------------*/ async command bool PacketTimeSyncOffset.isSet(message_t* msg) { return call TimeSyncFlag.get(msg); } async command uint8_t PacketTimeSyncOffset.get(message_t* msg) { return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t); } async command void PacketTimeSyncOffset.clear(message_t* msg) { call TimeSyncFlag.clear(msg); } async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value) { // we do not store the value, the time sync field is always the last 4 bytes RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value ); call TimeSyncFlag.set(msg); } /*----------------- PacketLinkQuality -----------------*/ async command bool PacketLinkQuality.isSet(message_t* msg) { return TRUE; } async command uint8_t PacketLinkQuality.get(message_t* msg) { return getMeta(msg)->lqi; } async command void PacketLinkQuality.clear(message_t* msg) { } async command void PacketLinkQuality.set(message_t* msg, uint8_t value) { getMeta(msg)->lqi = value; } /*----------------- LinkPacketMetadata -----------------*/ async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { return call PacketLinkQuality.get(msg) > 200; } } tinyos-2.1.2+dfsg/tos/chips/rf212/RF212Ieee154MessageC.nc000066400000000000000000000061661207233610700222510ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #ifdef TFRAMES_ENABLED #error "You cannot use Ieee154MessageC with TFRAMES_ENABLED defined" #endif configuration RF212Ieee154MessageC { provides { interface SplitControl; interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier; interface Ieee154Packet; interface Packet; interface Resource as SendResource[uint8_t clint]; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RF212RadioC; SplitControl = RF212RadioC; Ieee154Send = RF212RadioC.Ieee154Send; Ieee154Receive = RF212RadioC.Ieee154Receive; SendNotifier = RF212RadioC.Ieee154Notifier; Packet = RF212RadioC.PacketForIeee154Message; Ieee154Packet = RF212RadioC; SendResource = RF212RadioC; PacketAcknowledgements = RF212RadioC; LowPowerListening = RF212RadioC; PacketLink = RF212RadioC; RadioChannel = RF212RadioC; PacketLinkQuality = RF212RadioC.PacketLinkQuality; PacketTransmitPower = RF212RadioC.PacketTransmitPower; PacketRSSI = RF212RadioC.PacketRSSI; LocalTimeRadio = RF212RadioC; PacketTimeStampMilli = RF212RadioC; PacketTimeStampRadio = RF212RadioC; } tinyos-2.1.2+dfsg/tos/chips/rf212/RF212Radio.h000066400000000000000000000051041207233610700204140ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __RF212RADIO_H__ #define __RF212RADIO_H__ #include #include #include #include #include #include #include #include #include typedef nx_struct rf212packet_header_t { rf212_header_t rf212; ieee154_simple_header_t ieee154; #ifndef TFRAMES_ENABLED network_header_t network; #endif #ifndef IEEE154FRAMES_ENABLED activemessage_header_t am; #endif } rf212packet_header_t; typedef nx_struct rf212packet_footer_t { // the time stamp is not recorded here, time stamped messaged cannot have max length } rf212packet_footer_t; typedef struct rf212packet_metadata_t { #ifdef LOW_POWER_LISTENING lpl_metadata_t lpl; #endif #ifdef PACKET_LINK link_metadata_t link; #endif timestamp_metadata_t timestamp; flags_metadata_t flags; rf212_metadata_t rf212; } rf212packet_metadata_t; #endif//__RF212RADIO_H__ tinyos-2.1.2+dfsg/tos/chips/rf212/RF212RadioC.nc000066400000000000000000000232271207233610700206760ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include configuration RF212RadioC { provides { interface SplitControl; #ifndef IEEE154FRAMES_ENABLED interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet as PacketForActiveMessage; #endif #ifndef TFRAMES_ENABLED interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier as Ieee154Notifier; interface Resource as SendResource[uint8_t clint]; interface Ieee154Packet; interface Packet as PacketForIeee154Message; #endif interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; #ifdef TRAFFIC_MONITOR interface TrafficMonitor; #endif interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { #define UQ_METADATA_FLAGS "UQ_RF212_METADATA_FLAGS" #define UQ_RADIO_ALARM "UQ_RF212_RADIO_ALARM" // -------- RadioP components RF212RadioP as RadioP; #ifdef RADIO_DEBUG components AssertC; #endif RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC; RadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; RadioP.PacketTimeStamp -> TimeStampingLayerC; RadioP.RF212Packet -> RadioDriverLayerC; // -------- RadioAlarm components new RadioAlarmC(); RadioAlarmC.Alarm -> RadioDriverLayerC; // -------- Active Message #ifndef IEEE154FRAMES_ENABLED components new ActiveMessageLayerC(); ActiveMessageLayerC.Config -> RadioP; ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC; ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive; ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket; AMSend = ActiveMessageLayerC; Receive = ActiveMessageLayerC.Receive; Snoop = ActiveMessageLayerC.Snoop; SendNotifier = ActiveMessageLayerC; AMPacket = ActiveMessageLayerC; PacketForActiveMessage = ActiveMessageLayerC; ReceiveDefault = ActiveMessageLayerC.ReceiveDefault; SnoopDefault = ActiveMessageLayerC.SnoopDefault; #endif // -------- Automatic RadioSend Resource #ifndef IEEE154FRAMES_ENABLED #ifndef TFRAMES_ENABLED components new AutoResourceAcquireLayerC(); AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)]; #else components new DummyLayerC() as AutoResourceAcquireLayerC; #endif AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend; #endif // -------- RadioSend Resource #ifndef TFRAMES_ENABLED components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC; SendResource = SendResourceC; // -------- Ieee154 Message components new Ieee154MessageLayerC(); Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC; Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send; Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive; Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet; Ieee154Send = Ieee154MessageLayerC; Ieee154Receive = Ieee154MessageLayerC; Ieee154Notifier = Ieee154MessageLayerC; Ieee154Packet = Ieee154PacketLayerC; PacketForIeee154Message = Ieee154MessageLayerC; #endif // -------- Tinyos Network components new TinyosNetworkLayerC(); TinyosNetworkLayerC.SubSend -> UniqueLayerC; TinyosNetworkLayerC.SubReceive -> PacketLinkLayerC; TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC; // -------- IEEE 802.15.4 Packet components new Ieee154PacketLayerC(); Ieee154PacketLayerC.SubPacket -> PacketLinkLayerC; // -------- UniqueLayer Send part (wired twice) components new UniqueLayerC(); UniqueLayerC.Config -> RadioP; UniqueLayerC.SubSend -> PacketLinkLayerC; // -------- Packet Link components new PacketLinkLayerC(); PacketLink = PacketLinkLayerC; PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC; PacketLinkLayerC -> LowPowerListeningLayerC.Send; PacketLinkLayerC -> LowPowerListeningLayerC.Receive; PacketLinkLayerC -> LowPowerListeningLayerC.RadioPacket; // -------- Low Power Listening #ifdef LOW_POWER_LISTENING #warning "*** USING LOW POWER LISTENING LAYER" components new LowPowerListeningLayerC(); LowPowerListeningLayerC.Config -> RadioP; LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC; #else components new LowPowerListeningDummyC() as LowPowerListeningLayerC; #endif LowPowerListeningLayerC.SubControl -> MessageBufferLayerC; LowPowerListeningLayerC.SubSend -> MessageBufferLayerC; LowPowerListeningLayerC.SubReceive -> MessageBufferLayerC; LowPowerListeningLayerC.SubPacket -> TimeStampingLayerC; SplitControl = LowPowerListeningLayerC; LowPowerListening = LowPowerListeningLayerC; // -------- MessageBuffer components new MessageBufferLayerC(); MessageBufferLayerC.RadioSend -> CollisionAvoidanceLayerC; MessageBufferLayerC.RadioReceive -> UniqueLayerC; MessageBufferLayerC.RadioState -> TrafficMonitorLayerC; RadioChannel = MessageBufferLayerC; // -------- UniqueLayer receive part (wired twice) UniqueLayerC.SubReceive -> CollisionAvoidanceLayerC; // -------- CollisionAvoidance #ifdef SLOTTED_MAC components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC; #else components new RandomCollisionLayerC() as CollisionAvoidanceLayerC; #endif CollisionAvoidanceLayerC.Config -> RadioP; CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC; CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC; CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; // -------- SoftwareAcknowledgement components new SoftwareAckLayerC(); SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; PacketAcknowledgements = SoftwareAckLayerC; SoftwareAckLayerC.Config -> RadioP; SoftwareAckLayerC.SubSend -> CsmaLayerC; SoftwareAckLayerC.SubReceive -> CsmaLayerC; // -------- Carrier Sense components new DummyLayerC() as CsmaLayerC; CsmaLayerC.Config -> RadioP; CsmaLayerC -> TrafficMonitorLayerC.RadioSend; CsmaLayerC -> TrafficMonitorLayerC.RadioReceive; CsmaLayerC -> RadioDriverLayerC.RadioCCA; // -------- TimeStamping components new TimeStampingLayerC(); TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC; TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC; PacketTimeStampRadio = TimeStampingLayerC; PacketTimeStampMilli = TimeStampingLayerC; TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; // -------- MetadataFlags components new MetadataFlagsLayerC(); MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC; // -------- Traffic Monitor #ifdef TRAFFIC_MONITOR components new TrafficMonitorLayerC(); TrafficMonitor = TrafficMonitorLayerC; #else components new DummyLayerC() as TrafficMonitorLayerC; #endif TrafficMonitorLayerC.Config -> RadioP; TrafficMonitorLayerC -> RadioDriverLayerC.RadioSend; TrafficMonitorLayerC -> RadioDriverLayerC.RadioReceive; TrafficMonitorLayerC -> RadioDriverLayerC.RadioState; // -------- Driver components RF212DriverLayerC as RadioDriverLayerC; RadioDriverLayerC.Config -> RadioP; RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC; PacketTransmitPower = RadioDriverLayerC.PacketTransmitPower; PacketLinkQuality = RadioDriverLayerC.PacketLinkQuality; PacketRSSI = RadioDriverLayerC.PacketRSSI; LinkPacketMetadata = RadioDriverLayerC; LocalTimeRadio = RadioDriverLayerC; RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; } tinyos-2.1.2+dfsg/tos/chips/rf212/RF212RadioP.nc000066400000000000000000000245431207233610700207150ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Andras Biro */ #include #include #include module RF212RadioP { provides { interface RF212DriverConfig; interface SoftwareAckConfig; interface UniqueConfig; interface CsmaConfig; interface TrafficMonitorConfig; interface RandomCollisionConfig; interface SlottedCollisionConfig; interface ActiveMessageConfig; interface DummyConfig; #ifdef LOW_POWER_LISTENING interface LowPowerListeningConfig; #endif } uses { interface Ieee154PacketLayer; interface RadioAlarm; interface RadioPacket as RF212Packet; interface PacketTimeStamp; } } implementation { inline uint8_t getSymbolTime() { switch( RF212_TRX_CTRL_2_VALUE ) { case RF212_DATA_MODE_BPSK_20: return 50; case RF212_DATA_MODE_BPSK_40: return 25; case RF212_DATA_MODE_OQPSK_SIN_RC_100: case RF212_DATA_MODE_OQPSK_SIN_RC_200: case RF212_DATA_MODE_OQPSK_SIN_RC_400_SCR: case RF212_DATA_MODE_OQPSK_SIN_RC_400: return 40; case RF212_DATA_MODE_OQPSK_SIN_250: case RF212_DATA_MODE_OQPSK_RC_250: case RF212_DATA_MODE_OQPSK_SIN_500: case RF212_DATA_MODE_OQPSK_RC_500: case RF212_DATA_MODE_OQPSK_SIN_1000_SCR: case RF212_DATA_MODE_OQPSK_SIN_1000: case RF212_DATA_MODE_OQPSK_RC_1000_SCR: case RF212_DATA_MODE_OQPSK_RC_1000: return 16; } } inline bool isBpsk() { switch( RF212_TRX_CTRL_2_VALUE ) { case RF212_DATA_MODE_BPSK_20: case RF212_DATA_MODE_BPSK_40: return TRUE; default: return FALSE; } } /*----------------- RF212DriverConfig -----------------*/ async command uint8_t RF212DriverConfig.headerLength(message_t* msg) { return offsetof(message_t, data) - sizeof(rf212packet_header_t); } async command uint8_t RF212DriverConfig.maxPayloadLength() { return sizeof(rf212packet_header_t) + TOSH_DATA_LENGTH; } async command uint8_t RF212DriverConfig.metadataLength(message_t* msg) { return 0; } async command uint8_t RF212DriverConfig.headerPreloadLength() { // we need the fcf, dsn, destpan and dest return 7; } async command bool RF212DriverConfig.requiresRssiCca(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- SoftwareAckConfig -----------------*/ async command bool SoftwareAckConfig.requiresAckWait(message_t* msg) { return call Ieee154PacketLayer.requiresAckWait(msg); } async command bool SoftwareAckConfig.isAckPacket(message_t* msg) { return call Ieee154PacketLayer.isAckFrame(msg); } async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack) { return call Ieee154PacketLayer.verifyAckReply(data, ack); } async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack) { call Ieee154PacketLayer.setAckRequired(msg, ack); } async command bool SoftwareAckConfig.requiresAckReply(message_t* msg) { return call Ieee154PacketLayer.requiresAckReply(msg); } async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack) { call Ieee154PacketLayer.createAckReply(data, ack); } // 802.15.4 standard: // =aTurnaroundTime+phySHRDuration+6*phySymbolsPerOctet // =12s + phySymbolsPerOctet + 6o * phySymbolsPerOctet // SHR: BPSK: 40; OQPSK: 10 // phySymbolsPerOctet: BPSK: 8; OQPSK: 2 // plus we add a constant for safety #ifndef SOFTWAREACK_TIMEOUT_PLUS #define SOFTWAREACK_TIMEOUT_PLUS 1000 #endif async command uint16_t SoftwareAckConfig.getAckTimeout() { #ifndef SOFTWAREACK_TIMEOUT if(isBpsk()) return ((12+40+6*8) * getSymbolTime() + SOFTWAREACK_TIMEOUT_PLUS) * RADIO_ALARM_MICROSEC; else return ((12+10+6*2) * getSymbolTime() + SOFTWAREACK_TIMEOUT_PLUS) * RADIO_ALARM_MICROSEC; #else return (uint16_t)(SOFTWAREACK_TIMEOUT * RADIO_ALARM_MICROSEC); #endif } tasklet_async command void SoftwareAckConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- UniqueConfig -----------------*/ async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg) { return call Ieee154PacketLayer.getDSN(msg); } async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn) { call Ieee154PacketLayer.setDSN(msg, dsn); } async command am_addr_t UniqueConfig.getSender(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } tasklet_async command void UniqueConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- ActiveMessageConfig -----------------*/ command am_addr_t ActiveMessageConfig.destination(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg); } command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setDestAddr(msg, addr); } command am_addr_t ActiveMessageConfig.source(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setSrcAddr(msg, addr); } command am_group_t ActiveMessageConfig.group(message_t* msg) { return call Ieee154PacketLayer.getDestPan(msg); } command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp) { call Ieee154PacketLayer.setDestPan(msg, grp); } command error_t ActiveMessageConfig.checkFrame(message_t* msg) { if( ! call Ieee154PacketLayer.isDataFrame(msg) ) call Ieee154PacketLayer.createDataFrame(msg); return SUCCESS; } /*----------------- CsmaConfig -----------------*/ async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- TrafficMonitorConfig -----------------*/ async command uint16_t TrafficMonitorConfig.getBytes(message_t* msg) { // pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes) return call RF212Packet.payloadLength(msg) + 6; } /*----------------- RandomCollisionConfig -----------------*/ // 802.15.4 constants: // aUnitBackoffPeriod: 20 symbol // macMinBE:0..5 (8), default 3 // but we don't care about the standard yet, just converted the rf230 lpl timeouts to SymbolTime base async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(10 * 8 * getSymbolTime() * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(50 * 8 * getSymbolTime() * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(100 * 8 * getSymbolTime() * RADIO_ALARM_MICROSEC); } // 802.15.4 standard: SIFS (no ack requested): 12 symbol; LIFS (ack requested): 40 symbol async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg) { uint16_t time; // TODO: maybe we should use the embedded timestamp of the message time = call RadioAlarm.getNow(); // estimated response time (download the message, etc) is 5-8 bytes if( call Ieee154PacketLayer.requiresAckReply(msg) ) time += (uint16_t)(40 * getSymbolTime() * RADIO_ALARM_MICROSEC); else time += (uint16_t)(12 * getSymbolTime() * RADIO_ALARM_MICROSEC); return time; } tasklet_async event void RadioAlarm.fired() { } /*----------------- SlottedCollisionConfig -----------------*/ async command uint16_t SlottedCollisionConfig.getInitialDelay() { return 300; } async command uint8_t SlottedCollisionConfig.getScheduleExponent() { return 1 + RADIO_ALARM_MILLI_EXP; } async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg) { // TODO: check if the timestamp is correct return call PacketTimeStamp.timestamp(msg); } async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg) { // the preamble (4 bytes), SFD (1 byte), plus two extra for safety return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC); } async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg) { return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC); } /*----------------- Dummy -----------------*/ async command void DummyConfig.nothing() { } /*----------------- LowPowerListening -----------------*/ #ifdef LOW_POWER_LISTENING command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR; } command bool LowPowerListeningConfig.ackRequested(message_t* msg) { return call Ieee154PacketLayer.getAckRequired(msg); } command uint16_t LowPowerListeningConfig.getListenLength() { switch(getSymbolTime()){ case 50: { return 38; }; case 40: { return 24; }; case 25:{ return 20; }; case 16:{ return 12; } default:{ return getSymbolTime(); } } } #endif } tinyos-2.1.2+dfsg/tos/chips/rf212/RF212TimeSyncMessageC.nc000066400000000000000000000063461207233610700227030ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include configuration RF212TimeSyncMessageC { provides { interface SplitControl; interface Receive[uint8_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketTimeStamp as PacketTimeStampRadio; interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components RF212ActiveMessageC as ActiveMessageC, new TimeSyncMessageLayerC(); SplitControl = ActiveMessageC; AMPacket = TimeSyncMessageLayerC; Receive = TimeSyncMessageLayerC.Receive; Snoop = TimeSyncMessageLayerC.Snoop; Packet = TimeSyncMessageLayerC; PacketAcknowledgements = ActiveMessageC; LowPowerListening = ActiveMessageC; PacketTimeStampRadio = ActiveMessageC; TimeSyncAMSendRadio = TimeSyncMessageLayerC; TimeSyncPacketRadio = TimeSyncMessageLayerC; PacketTimeStampMilli = ActiveMessageC; TimeSyncAMSendMilli = TimeSyncMessageLayerC; TimeSyncPacketMilli = TimeSyncMessageLayerC; TimeSyncMessageLayerC.PacketTimeStampRadio -> ActiveMessageC; TimeSyncMessageLayerC.PacketTimeStampMilli -> ActiveMessageC; components RF212DriverLayerC as DriverLayerC; TimeSyncMessageLayerC.LocalTimeRadio -> DriverLayerC; TimeSyncMessageLayerC.PacketTimeSyncOffset -> DriverLayerC.PacketTimeSyncOffset; } tinyos-2.1.2+dfsg/tos/chips/rf230/000077500000000000000000000000001207233610700165305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/rf230/README000066400000000000000000000046201207233610700174120ustar00rootroot00000000000000 The RF230 radio driver has the following configuration options. Some of these are set in the platforms/xxx/chips/rf230/RadioConfig.h header file, see the IRIS platform for example, others can be set in your Makefile. RF230_TRX_CTRL_0_VALUE: This is the value of the TRX_CTRL_0 register which configures the output pin currents and the CLKM clock: RF230_CCA_MODE_VALUE: This is the default value of the CCA_MODE field in the PHY_CC_CCA register which is used to configure the default mode of the clear channel assesment RF230_CCA_THRES_VALUE: This is the value of the CCA_THRES register that controls the energy levels used for clear channel assesment. RF230_DEF_RFPOWER: This is the default value of the TX_PWR field of the PHY_TX_PWR register. This can be cahanged via the PacketTransmitPower interface provided by the RF230ActiveMessageC. RF230_DEF_CHANNEL: This is the default value of the CHANNEL field of the PHY_CC_CCA register. This can be cahanged via the RadioChannel interface provided by the RF230ActiveMessageC. RF230_CRCBYTE_COMMAND: This is the command used to calculate the CRC for the RF230 chip, since it does not support hardware CRC checking (in rev A). RF230_SLOW_SPI: Define this if your microcontroller SPI interface is slower then 250 kbit/s. This delays the start of transmission to when the header is at least uploaded into the TX buffer. RF230_RSSI_ENERGY: If you define this, then the content of the RF230_PHY_ED_LEVEL is queried instead of the RSSI value for eahc incoming message. This value can be obtained with the PacketRSSI interface. RF230_HARDWARE_ACK If you define this, then the radio stack will use hardware acknowledgements and address recognition. In particular, you will not be able to snoop on onther messages. The load on the CPU is reduced, you should be able to send more messages under heavy load. Note, that the PacketRSSI interface will return the energy level (and not the rssi value) of received packet. RF230_HWACK_SLOPPY_TIMESTAMP If you define this, then the code that calculates the time stamp of the SFD from a single interrupt at the end of the message reception will not use floating point computation, which will be faster but less precise. RF230_BACKOFF_MIN RF230_BACKOFF_INIT RF230_BACKOFF_CONG The minimum backoff time, the initial backoff time, and the cognestion backoff time in microseconds for the random CSMA/CA algorithm. See the RF230RadioP.nc. tinyos-2.1.2+dfsg/tos/chips/rf230/RF230ActiveMessageC.nc000066400000000000000000000064001207233610700223520ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #ifdef IEEE154FRAMES_ENABLED #error "You cannot use ActiveMessageC with IEEE154FRAMES_ENABLED defined" #endif configuration RF230ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RF230RadioC as RadioC; SplitControl = RadioC; AMSend = RadioC; Receive = RadioC.Receive; Snoop = RadioC.Snoop; SendNotifier = RadioC; ReceiveDefault = RadioC.ReceiveDefault; SnoopDefault = RadioC.SnoopDefault; Packet = RadioC.PacketForActiveMessage; AMPacket = RadioC; PacketAcknowledgements = RadioC; LowPowerListening = RadioC; PacketLink = RadioC; RadioChannel = RadioC; PacketLinkQuality = RadioC.PacketLinkQuality; PacketTransmitPower = RadioC.PacketTransmitPower; PacketRSSI = RadioC.PacketRSSI; LinkPacketMetadata = RadioC; LocalTimeRadio = RadioC; PacketTimeStampMilli = RadioC; PacketTimeStampRadio = RadioC; } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230DriverConfig.nc000066400000000000000000000050541207233610700221140ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface RF230DriverConfig { /** * Returns the length of a dummy header to align the payload properly. */ async command uint8_t headerLength(message_t* msg); /** * Returns the maximum length of the PHY payload including the * length field but not counting the FCF field. */ async command uint8_t maxPayloadLength(); /** * Returns the length of a dummy metadata section to align the * metadata section properly. */ async command uint8_t metadataLength(message_t* msg); /** * Gets the number of bytes we should read before the RadioReceive.header * event is fired. If the length of the packet is less than this amount, * then that event is fired earlier. The header length must be at least one. */ async command uint8_t headerPreloadLength(); /** * Returns TRUE if before sending this message we should make sure that * the channel is clear via a very basic (and quick) RSSI check. */ async command bool requiresRssiCca(message_t* msg); } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230DriverHwAckC.nc000066400000000000000000000077751207233610700220230ustar00rootroot00000000000000/* * Copyright (c) 2009, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include configuration RF230DriverHwAckC { provides { interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface Alarm; interface PacketAcknowledgements; } uses { interface RF230DriverConfig as Config; interface PacketTimeStamp; interface Ieee154PacketLayer; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface PacketFlag as AckReceivedFlag; interface RadioAlarm; } } implementation { components RF230DriverHwAckP as DriverLayerP, HplRF230C, BusyWaitMicroC, TaskletC, MainC, ActiveMessageAddressC; RadioState = DriverLayerP; RadioSend = DriverLayerP; RadioReceive = DriverLayerP; RadioCCA = DriverLayerP; RadioPacket = DriverLayerP; LocalTimeRadio = HplRF230C; Config = DriverLayerP; PacketTransmitPower = DriverLayerP.PacketTransmitPower; TransmitPowerFlag = DriverLayerP.TransmitPowerFlag; PacketRSSI = DriverLayerP.PacketRSSI; RSSIFlag = DriverLayerP.RSSIFlag; PacketTimeSyncOffset = DriverLayerP.PacketTimeSyncOffset; TimeSyncFlag = DriverLayerP.TimeSyncFlag; PacketLinkQuality = DriverLayerP.PacketLinkQuality; PacketTimeStamp = DriverLayerP.PacketTimeStamp; LinkPacketMetadata = DriverLayerP; DriverLayerP.LocalTime -> HplRF230C; Alarm = HplRF230C.Alarm; RadioAlarm = DriverLayerP.RadioAlarm; DriverLayerP.SELN -> HplRF230C.SELN; DriverLayerP.SpiResource -> HplRF230C.SpiResource; DriverLayerP.FastSpiByte -> HplRF230C; DriverLayerP.SLP_TR -> HplRF230C.SLP_TR; DriverLayerP.RSTN -> HplRF230C.RSTN; DriverLayerP.IRQ -> HplRF230C.IRQ; DriverLayerP.Tasklet -> TaskletC; DriverLayerP.BusyWait -> BusyWaitMicroC; #ifdef RADIO_DEBUG components DiagMsgC; DriverLayerP.DiagMsg -> DiagMsgC; #endif MainC.SoftwareInit -> DriverLayerP.SoftwareInit; components RealMainP; RealMainP.PlatformInit -> DriverLayerP.PlatformInit; AckReceivedFlag = DriverLayerP.AckReceivedFlag; DriverLayerP.ActiveMessageAddress -> ActiveMessageAddressC; PacketAcknowledgements = DriverLayerP; Ieee154PacketLayer = DriverLayerP; } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230DriverHwAckP.nc000066400000000000000000000617151207233610700220320ustar00rootroot00000000000000/* * Copyright (c) 2009, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include #include #include #include module RF230DriverHwAckP { provides { interface Init as PlatformInit @exactlyonce(); interface Init as SoftwareInit @exactlyonce(); interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; interface PacketAcknowledgements; } uses { interface GeneralIO as SELN; interface Resource as SpiResource; interface FastSpiByte; interface GeneralIO as SLP_TR; interface GeneralIO as RSTN; interface GpioCapture as IRQ; interface BusyWait; interface LocalTime; interface RF230DriverConfig as Config; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface PacketTimeStamp; interface Tasklet; interface RadioAlarm; interface PacketFlag as AckReceivedFlag; interface Ieee154PacketLayer; interface ActiveMessageAddress; #ifdef RADIO_DEBUG interface DiagMsg; #endif } } implementation { rf230_header_t* getHeader(message_t* msg) { return ((void*)msg) + call Config.headerLength(msg); } void* getPayload(message_t* msg) { return ((void*)msg) + call RadioPacket.headerLength(msg); } rf230_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } /*----------------- STATE -----------------*/ tasklet_norace uint8_t state; enum { STATE_P_ON = 0, STATE_SLEEP = 1, STATE_SLEEP_2_TRX_OFF = 2, STATE_TRX_OFF = 3, STATE_TRX_OFF_2_RX_ON = 4, STATE_RX_ON = 5, STATE_BUSY_TX_2_RX_ON = 6, }; tasklet_norace uint8_t cmd; enum { CMD_NONE = 0, // the state machine has stopped CMD_TURNOFF = 1, // goto SLEEP state CMD_STANDBY = 2, // goto TRX_OFF state CMD_TURNON = 3, // goto RX_ON state CMD_TRANSMIT = 4, // currently transmitting a message CMD_CCA = 6, // performing clear chanel assesment CMD_CHANNEL = 7, // changing the channel CMD_SIGNAL_DONE = 8, // signal the end of the state transition CMD_DOWNLOAD = 9, // download the received message }; norace bool radioIrq; tasklet_norace uint8_t txPower; tasklet_norace uint8_t channel; tasklet_norace message_t* rxMsg; message_t rxMsgBuffer; uint16_t capturedTime; // the current time when the last interrupt has occured /*----------------- REGISTER -----------------*/ inline void writeRegister(uint8_t reg, uint8_t value) { RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) ); call SELN.clr(); call FastSpiByte.splitWrite(RF230_CMD_REGISTER_WRITE | reg); call FastSpiByte.splitReadWrite(value); call FastSpiByte.splitRead(); call SELN.set(); } inline uint8_t readRegister(uint8_t reg) { RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) ); call SELN.clr(); call FastSpiByte.splitWrite(RF230_CMD_REGISTER_READ | reg); call FastSpiByte.splitReadWrite(0); reg = call FastSpiByte.splitRead(); call SELN.set(); return reg; } /*----------------- ALARM -----------------*/ enum { SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC), PLL_CALIBRATION_TIME = (uint16_t)(180 * RADIO_ALARM_MICROSEC), CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC), // 8 undocumented delay, 128 for CSMA, 16 for delay, 5*32 for preamble and SFD TX_SFD_DELAY = (uint16_t)((8 + 128 + 16 + 5*32) * RADIO_ALARM_MICROSEC), // 32 for frame length, 16 for delay RX_SFD_DELAY = (uint16_t)((32 + 16) * RADIO_ALARM_MICROSEC), }; tasklet_async event void RadioAlarm.fired() { if( state == STATE_SLEEP_2_TRX_OFF ) state = STATE_TRX_OFF; else if( state == STATE_TRX_OFF_2_RX_ON ) { RADIO_ASSERT( cmd == CMD_TURNON || cmd == CMD_CHANNEL ); state = STATE_RX_ON; cmd = CMD_SIGNAL_DONE; } else if( cmd == CMD_CCA ) { uint8_t cca; RADIO_ASSERT( state == STATE_RX_ON ); cmd = CMD_NONE; cca = readRegister(RF230_TRX_STATUS); RADIO_ASSERT( (cca & RF230_TRX_STATUS_MASK) == RF230_RX_AACK_ON ); signal RadioCCA.done( (cca & RF230_CCA_DONE) ? ((cca & RF230_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL ); } else RADIO_ASSERT(FALSE); // make sure the rest of the command processing is called call Tasklet.schedule(); } /*----------------- INIT -----------------*/ command error_t PlatformInit.init() { call SELN.makeOutput(); call SELN.set(); call SLP_TR.makeOutput(); call SLP_TR.clr(); call RSTN.makeOutput(); call RSTN.set(); rxMsg = &rxMsgBuffer; return SUCCESS; } command error_t SoftwareInit.init() { // for powering up the radio return call SpiResource.request(); } void initRadio() { uint16_t temp; call BusyWait.wait(510); call RSTN.clr(); call SLP_TR.clr(); call BusyWait.wait(6); call RSTN.set(); writeRegister(RF230_TRX_CTRL_0, RF230_TRX_CTRL_0_VALUE); writeRegister(RF230_TRX_STATE, RF230_TRX_OFF); call BusyWait.wait(510); writeRegister(RF230_IRQ_MASK, RF230_IRQ_TRX_UR | RF230_IRQ_TRX_END ); writeRegister(RF230_CCA_THRES, RF230_CCA_THRES_VALUE); writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | (RF230_DEF_RFPOWER & RF230_TX_PWR_MASK)); txPower = RF230_DEF_RFPOWER & RF230_TX_PWR_MASK; channel = RF230_DEF_CHANNEL & RF230_CHANNEL_MASK; writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel); writeRegister(RF230_XAH_CTRL, 0); writeRegister(RF230_CSMA_SEED_1, 0); temp = call ActiveMessageAddress.amGroup(); writeRegister(RF230_PAN_ID_0, temp); writeRegister(RF230_PAN_ID_1, temp >> 8); call SLP_TR.set(); state = STATE_SLEEP; } /*----------------- SPI -----------------*/ event void SpiResource.granted() { call SELN.makeOutput(); call SELN.set(); if( state == STATE_P_ON ) { initRadio(); call SpiResource.release(); } else call Tasklet.schedule(); } bool isSpiAcquired() { if( call SpiResource.isOwner() ) return TRUE; if( call SpiResource.immediateRequest() == SUCCESS ) { call SELN.makeOutput(); call SELN.set(); return TRUE; } call SpiResource.request(); return FALSE; } /*----------------- CHANNEL -----------------*/ tasklet_async command uint8_t RadioState.getChannel() { return channel; } tasklet_async command error_t RadioState.setChannel(uint8_t c) { c &= RF230_CHANNEL_MASK; if( cmd != CMD_NONE ) return EBUSY; else if( channel == c ) return EALREADY; channel = c; cmd = CMD_CHANNEL; call Tasklet.schedule(); return SUCCESS; } inline void changeChannel() { RADIO_ASSERT( cmd == CMD_CHANNEL ); RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON ); if( isSpiAcquired() && call RadioAlarm.isFree() ) { writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel); if( state == STATE_RX_ON ) { call RadioAlarm.wait(PLL_CALIBRATION_TIME); state = STATE_TRX_OFF_2_RX_ON; } else cmd = CMD_SIGNAL_DONE; } } /*----------------- TURN ON/OFF -----------------*/ inline void changeState() { if( (cmd == CMD_STANDBY || cmd == CMD_TURNON) && state == STATE_SLEEP && call RadioAlarm.isFree() ) { call SLP_TR.clr(); call RadioAlarm.wait(SLEEP_WAKEUP_TIME); state = STATE_SLEEP_2_TRX_OFF; } else if( cmd == CMD_TURNON && state == STATE_TRX_OFF && isSpiAcquired() && call RadioAlarm.isFree() ) { uint16_t temp; RADIO_ASSERT( ! radioIrq ); readRegister(RF230_IRQ_STATUS); // clear the interrupt register call IRQ.captureRisingEdge(); // setChannel was ignored in SLEEP because the SPI was not working, so do it here writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel); temp = call ActiveMessageAddress.amAddress(); writeRegister(RF230_SHORT_ADDR_0, temp); writeRegister(RF230_SHORT_ADDR_1, temp >> 8); call RadioAlarm.wait(PLL_CALIBRATION_TIME); writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON); state = STATE_TRX_OFF_2_RX_ON; } else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) && state == STATE_RX_ON && isSpiAcquired() ) { writeRegister(RF230_TRX_STATE, RF230_FORCE_TRX_OFF); call IRQ.disable(); radioIrq = FALSE; state = STATE_TRX_OFF; } if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF ) { call SLP_TR.set(); state = STATE_SLEEP; cmd = CMD_SIGNAL_DONE; } else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF ) cmd = CMD_SIGNAL_DONE; } tasklet_async command error_t RadioState.turnOff() { if( cmd != CMD_NONE ) return EBUSY; else if( state == STATE_SLEEP ) return EALREADY; cmd = CMD_TURNOFF; call Tasklet.schedule(); return SUCCESS; } tasklet_async command error_t RadioState.standby() { if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) ) return EBUSY; else if( state == STATE_TRX_OFF ) return EALREADY; cmd = CMD_STANDBY; call Tasklet.schedule(); return SUCCESS; } tasklet_async command error_t RadioState.turnOn() { if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) ) return EBUSY; else if( state == STATE_RX_ON ) return EALREADY; cmd = CMD_TURNON; call Tasklet.schedule(); return SUCCESS; } default tasklet_async event void RadioState.done() { } task void changeAddress() { call Tasklet.suspend(); if( isSpiAcquired() ) { uint16_t temp = call ActiveMessageAddress.amAddress(); writeRegister(RF230_SHORT_ADDR_0, temp); writeRegister(RF230_SHORT_ADDR_1, temp >> 8); } else post changeAddress(); call Tasklet.resume(); } async event void ActiveMessageAddress.changed() { post changeAddress(); } /*----------------- TRANSMIT -----------------*/ tasklet_norace message_t* txMsg; tasklet_async command error_t RadioSend.send(message_t* msg) { uint16_t time; uint8_t length; uint8_t* data; uint8_t header; uint32_t time32; void* timesync; if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq ) return EBUSY; length = (call PacketTransmitPower.isSet(msg) ? call PacketTransmitPower.get(msg) : RF230_DEF_RFPOWER) & RF230_TX_PWR_MASK; if( length != txPower ) { txPower = length; writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | txPower); } writeRegister(RF230_TRX_STATE, RF230_TX_ARET_ON); // do something useful, just to wait a little time32 = call LocalTime.get(); timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; // we have missed an incoming message in this short amount of time if( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) != RF230_TX_ARET_ON ) { RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_BUSY_RX_AACK ); writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON); return EBUSY; } #ifndef RF230_SLOW_SPI atomic { call SLP_TR.set(); time = call RadioAlarm.getNow(); } call SLP_TR.clr(); #endif RADIO_ASSERT( ! radioIrq ); call SELN.clr(); call FastSpiByte.splitWrite(RF230_CMD_FRAME_WRITE); data = getPayload(msg); length = getHeader(msg)->length; // length | data[0] ... data[length-3] | automatically generated FCS call FastSpiByte.splitReadWrite(length); // the FCS is atomatically generated (2 bytes) length -= 2; header = call Config.headerPreloadLength(); if( header > length ) header = length; length -= header; // first upload the header to gain some time do { call FastSpiByte.splitReadWrite(*(data++)); } while( --header != 0 ); #ifdef RF230_SLOW_SPI atomic { call SLP_TR.set(); time = call RadioAlarm.getNow(); } call SLP_TR.clr(); #endif time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32); if( timesync != 0 ) *(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32; while( length-- != 0 ) call FastSpiByte.splitReadWrite(*(data++)); // wait for the SPI transfer to finish call FastSpiByte.splitRead(); call SELN.set(); /* * There is a very small window (~1 microsecond) when the RF230 went * into PLL_ON state but was somehow not properly initialized because * of an incoming message and could not go into BUSY_TX. I think the * radio can even receive a message, and generate a TRX_UR interrupt * because of concurrent access, but that message probably cannot be * recovered. * * TODO: this needs to be verified, and make sure that the chip is * not locked up in this case. */ // go back to RX_ON state when finished writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON); if( timesync != 0 ) *(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32; call PacketTimeStamp.set(msg, time32); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { length = getHeader(msg)->length; call DiagMsg.chr('t'); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.int8(length); call DiagMsg.hex8s(getPayload(msg), length - 2); call DiagMsg.send(); } #endif // wait for the TRX_END interrupt txMsg = msg; state = STATE_BUSY_TX_2_RX_ON; cmd = CMD_TRANSMIT; return SUCCESS; } default tasklet_async event void RadioSend.sendDone(error_t error) { } default tasklet_async event void RadioSend.ready() { } /*----------------- CCA -----------------*/ tasklet_async command error_t RadioCCA.request() { if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() ) return EBUSY; // see Errata B7 of the datasheet // writeRegister(RF230_TRX_STATE, RF230_PLL_ON); // writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON); writeRegister(RF230_PHY_CC_CCA, RF230_CCA_REQUEST | RF230_CCA_MODE_VALUE | channel); call RadioAlarm.wait(CCA_REQUEST_TIME); cmd = CMD_CCA; return SUCCESS; } default tasklet_async event void RadioCCA.done(error_t error) { } /*----------------- RECEIVE -----------------*/ inline void downloadMessage() { uint8_t length; bool crcValid = FALSE; call SELN.clr(); call FastSpiByte.write(RF230_CMD_FRAME_READ); // read the length byte length = call FastSpiByte.write(0); // if correct length if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 ) { uint8_t read; uint8_t* data; // initiate the reading call FastSpiByte.splitWrite(0); data = getPayload(rxMsg); getHeader(rxMsg)->length = length; // we do not store the CRC field length -= 2; read = call Config.headerPreloadLength(); if( length < read ) read = length; length -= read; do { *(data++) = call FastSpiByte.splitReadWrite(0); } while( --read != 0 ); if( signal RadioReceive.header(rxMsg) ) { while( length-- != 0 ) *(data++) = call FastSpiByte.splitReadWrite(0); call FastSpiByte.splitReadWrite(0); // two CRC bytes call FastSpiByte.splitReadWrite(0); call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitRead()); // we should have no other incoming message or buffer underflow crcValid = ! radioIrq; } else call FastSpiByte.splitRead(); // finish the SPI transfer } call SELN.set(); if( crcValid && call PacketTimeStamp.isValid(rxMsg) ) { uint32_t time32 = call PacketTimeStamp.timestamp(rxMsg); length = getHeader(rxMsg)->length; /* * If you hate floating point arithmetics and do not care of up to 400 microsecond time stamping errors, * then define RF230_HWACK_SLOPPY_TIMESTAMP, which will be significantly faster. */ #ifdef RF230_HWACK_SLOPPY_TIMESTAMP time32 -= (uint16_t)(RX_SFD_DELAY) + ((uint16_t)(length) << (RADIO_ALARM_MILLI_EXP - 5)); #else time32 -= (uint16_t)(RX_SFD_DELAY) + (uint16_t)(32.0 * RADIO_ALARM_MICROSEC * (uint16_t)length); #endif call PacketTimeStamp.set(rxMsg, time32); } #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { length = getHeader(rxMsg)->length; call DiagMsg.chr('r'); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.int8(crcValid ? length : -length); call DiagMsg.hex8s(getPayload(rxMsg), length - 2); call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1); call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0); call DiagMsg.send(); } #endif state = STATE_RX_ON; cmd = CMD_NONE; // signal only if it has passed the CRC check if( crcValid ) rxMsg = signal RadioReceive.receive(rxMsg); } /*----------------- IRQ -----------------*/ async event void IRQ.captured(uint16_t time) { RADIO_ASSERT( ! radioIrq ); atomic { capturedTime = time; radioIrq = TRUE; } call Tasklet.schedule(); } void serviceRadio() { if( isSpiAcquired() ) { uint16_t time; uint32_t time32; uint8_t irq; uint8_t temp; atomic time = capturedTime; radioIrq = FALSE; irq = readRegister(RF230_IRQ_STATUS); #ifdef RADIO_DEBUG // TODO: handle this interrupt if( irq & RF230_IRQ_TRX_UR ) { if( call DiagMsg.record() ) { call DiagMsg.str("assert ur"); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.hex8(readRegister(RF230_TRX_STATUS)); call DiagMsg.hex8(readRegister(RF230_TRX_STATE)); call DiagMsg.hex8(irq); call DiagMsg.uint8(state); call DiagMsg.uint8(cmd); call DiagMsg.send(); } } #endif if( irq & RF230_IRQ_TRX_END ) { if( cmd == CMD_TRANSMIT ) { RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON ); temp = readRegister(RF230_TRX_STATE) & RF230_TRAC_STATUS_MASK; if( call Ieee154PacketLayer.getAckRequired(txMsg) ) call AckReceivedFlag.setValue(txMsg, temp != RF230_TRAC_NO_ACK); state = STATE_RX_ON; cmd = CMD_NONE; signal RadioSend.sendDone(temp != RF230_TRAC_CHANNEL_ACCESS_FAILURE ? SUCCESS : EBUSY); // TODO: we could have missed a received message RADIO_ASSERT( ! (irq & RF230_IRQ_RX_START) ); } else if( cmd == CMD_NONE ) { RADIO_ASSERT( state == STATE_RX_ON ); if( irq == RF230_IRQ_TRX_END ) { call PacketRSSI.set(rxMsg, readRegister(RF230_PHY_ED_LEVEL)); // TODO: compensate for packet transmission time when downloading time32 = call LocalTime.get(); time32 += (int16_t)(time) - (int16_t)(time32); call PacketTimeStamp.set(rxMsg, time32); } else { call PacketRSSI.clear(rxMsg); call PacketTimeStamp.clear(rxMsg); } cmd = CMD_DOWNLOAD; } else RADIO_ASSERT(FALSE); } } } default tasklet_async event bool RadioReceive.header(message_t* msg) { return TRUE; } default tasklet_async event message_t* RadioReceive.receive(message_t* msg) { return msg; } /*----------------- TASKLET -----------------*/ task void releaseSpi() { call SpiResource.release(); } tasklet_async event void Tasklet.run() { if( radioIrq ) serviceRadio(); if( cmd != CMD_NONE ) { if( cmd == CMD_DOWNLOAD ) downloadMessage(); else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON ) changeState(); else if( cmd == CMD_CHANNEL ) changeChannel(); if( cmd == CMD_SIGNAL_DONE ) { cmd = CMD_NONE; signal RadioState.done(); } } if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq ) signal RadioSend.ready(); if( cmd == CMD_NONE ) post releaseSpi(); } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg) { return call Config.headerLength(msg) + sizeof(rf230_header_t); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return getHeader(msg)->length - 2; } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { RADIO_ASSERT( 1 <= length && length <= 125 ); RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); // we add the length of the CRC, which is automatically generated getHeader(msg)->length = length + 2; } async command uint8_t RadioPacket.maxPayloadLength() { RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf230_header_t) <= 125 ); return call Config.maxPayloadLength() - sizeof(rf230_header_t); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call Config.metadataLength(msg) + sizeof(rf230_metadata_t); } async command void RadioPacket.clear(message_t* msg) { // all flags are automatically cleared } /*----------------- PacketTransmitPower -----------------*/ async command bool PacketTransmitPower.isSet(message_t* msg) { return call TransmitPowerFlag.get(msg); } async command uint8_t PacketTransmitPower.get(message_t* msg) { return getMeta(msg)->power; } async command void PacketTransmitPower.clear(message_t* msg) { call TransmitPowerFlag.clear(msg); } async command void PacketTransmitPower.set(message_t* msg, uint8_t value) { call TransmitPowerFlag.set(msg); getMeta(msg)->power = value; } /*----------------- PacketRSSI -----------------*/ async command bool PacketRSSI.isSet(message_t* msg) { return call RSSIFlag.get(msg); } async command uint8_t PacketRSSI.get(message_t* msg) { return getMeta(msg)->rssi; } async command void PacketRSSI.clear(message_t* msg) { call RSSIFlag.clear(msg); } async command void PacketRSSI.set(message_t* msg, uint8_t value) { // just to be safe if the user fails to clear the packet call TransmitPowerFlag.clear(msg); call RSSIFlag.set(msg); getMeta(msg)->rssi = value; } /*----------------- PacketTimeSyncOffset -----------------*/ async command bool PacketTimeSyncOffset.isSet(message_t* msg) { return call TimeSyncFlag.get(msg); } async command uint8_t PacketTimeSyncOffset.get(message_t* msg) { return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t); } async command void PacketTimeSyncOffset.clear(message_t* msg) { call TimeSyncFlag.clear(msg); } async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value) { // we do not store the value, the time sync field is always the last 4 bytes RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value ); call TimeSyncFlag.set(msg); } /*----------------- PacketLinkQuality -----------------*/ async command bool PacketLinkQuality.isSet(message_t* msg) { return TRUE; } async command uint8_t PacketLinkQuality.get(message_t* msg) { return getMeta(msg)->lqi; } async command void PacketLinkQuality.clear(message_t* msg) { } async command void PacketLinkQuality.set(message_t* msg, uint8_t value) { getMeta(msg)->lqi = value; } /*----------------- PacketAcknowledgements -----------------*/ async command error_t PacketAcknowledgements.requestAck(message_t* msg) { call Ieee154PacketLayer.setAckRequired(msg, TRUE); return SUCCESS; } async command error_t PacketAcknowledgements.noAck(message_t* msg) { call Ieee154PacketLayer.setAckRequired(msg, FALSE); return SUCCESS; } async command bool PacketAcknowledgements.wasAcked(message_t* msg) { return call AckReceivedFlag.get(msg); } /*----------------- LinkPacketMetadata -----------------*/ async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { return call PacketLinkQuality.get(msg) > 200; } } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230DriverLayer.h000066400000000000000000000113771207233610700216170ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __RF230DRIVERLAYER_H__ #define __RF230DRIVERLAYER_H__ typedef nx_struct rf230_header_t { nxle_uint8_t length; } rf230_header_t; typedef struct rf230_metadata_t { uint8_t lqi; union { uint8_t power; uint8_t rssi; }; } rf230_metadata_t; enum rf230_registers_enum { RF230_TRX_STATUS = 0x01, RF230_TRX_STATE = 0x02, RF230_TRX_CTRL_0 = 0x03, RF230_PHY_TX_PWR = 0x05, RF230_PHY_RSSI = 0x06, RF230_PHY_ED_LEVEL = 0x07, RF230_PHY_CC_CCA = 0x08, RF230_CCA_THRES = 0x09, RF230_IRQ_MASK = 0x0E, RF230_IRQ_STATUS = 0x0F, RF230_VREG_CTRL = 0x10, RF230_BATMON = 0x11, RF230_XOSC_CTRL = 0x12, RF230_PLL_CF = 0x1A, RF230_PLL_DCU = 0x1B, RF230_PART_NUM = 0x1C, RF230_VERSION_NUM = 0x1D, RF230_MAN_ID_0 = 0x1E, RF230_MAN_ID_1 = 0x1F, RF230_SHORT_ADDR_0 = 0x20, RF230_SHORT_ADDR_1 = 0x21, RF230_PAN_ID_0 = 0x22, RF230_PAN_ID_1 = 0x23, RF230_IEEE_ADDR_0 = 0x24, RF230_IEEE_ADDR_1 = 0x25, RF230_IEEE_ADDR_2 = 0x26, RF230_IEEE_ADDR_3 = 0x27, RF230_IEEE_ADDR_4 = 0x28, RF230_IEEE_ADDR_5 = 0x29, RF230_IEEE_ADDR_6 = 0x2A, RF230_IEEE_ADDR_7 = 0x2B, RF230_XAH_CTRL = 0x2C, RF230_CSMA_SEED_0 = 0x2D, RF230_CSMA_SEED_1 = 0x2E, }; enum rf230_trx_register_enums { RF230_CCA_DONE = 1 << 7, RF230_CCA_STATUS = 1 << 6, RF230_TRX_STATUS_MASK = 0x1F, RF230_P_ON = 0, RF230_BUSY_RX = 1, RF230_BUSY_TX = 2, RF230_RX_ON = 6, RF230_TRX_OFF = 8, RF230_PLL_ON = 9, RF230_SLEEP = 15, RF230_BUSY_RX_AACK = 17, RF230_BUSR_TX_ARET = 18, RF230_RX_AACK_ON = 22, RF230_TX_ARET_ON = 25, RF230_RX_ON_NOCLK = 28, RF230_AACK_ON_NOCLK = 29, RF230_BUSY_RX_AACK_NOCLK = 30, RF230_STATE_TRANSITION_IN_PROGRESS = 31, RF230_TRAC_STATUS_MASK = 0xE0, RF230_TRAC_SUCCESS = 0, RF230_TRAC_SUCCESS_DATA_PENDING = 1 << 5, RF230_TRAC_CHANNEL_ACCESS_FAILURE = 3 << 5, RF230_TRAC_NO_ACK = 5 << 5, RF230_TRAC_INVALID = 7 << 5, RF230_TRX_CMD_MASK = 0x1F, RF230_NOP = 0, RF230_TX_START = 2, RF230_FORCE_TRX_OFF = 3, }; enum rf230_phy_register_enums { RF230_TX_AUTO_CRC_ON = 1 << 7, RF230_TX_PWR_MASK = 0x0F, RF230_RSSI_MASK = 0x1F, RF230_CCA_REQUEST = 1 << 7, RF230_CCA_MODE_0 = 0 << 5, RF230_CCA_MODE_1 = 1 << 5, RF230_CCA_MODE_2 = 2 << 5, RF230_CCA_MODE_3 = 3 << 5, RF230_CHANNEL_DEFAULT = 11, RF230_CHANNEL_MASK = 0x1F, RF230_CCA_CS_THRES_SHIFT = 4, RF230_CCA_ED_THRES_SHIFT = 0, }; enum rf230_irq_register_enums { RF230_IRQ_BAT_LOW = 1 << 7, RF230_IRQ_TRX_UR = 1 << 6, RF230_IRQ_TRX_END = 1 << 3, RF230_IRQ_RX_START = 1 << 2, RF230_IRQ_PLL_UNLOCK = 1 << 1, RF230_IRQ_PLL_LOCK = 1 << 0, }; enum rf230_control_register_enums { RF230_AVREG_EXT = 1 << 7, RF230_AVDD_OK = 1 << 6, RF230_DVREG_EXT = 1 << 3, RF230_DVDD_OK = 1 << 2, RF230_BATMON_OK = 1 << 5, RF230_BATMON_VHR = 1 << 4, RF230_BATMON_VTH_MASK = 0x0F, RF230_XTAL_MODE_OFF = 0 << 4, RF230_XTAL_MODE_EXTERNAL = 4 << 4, RF230_XTAL_MODE_INTERNAL = 15 << 4, }; enum rf230_pll_register_enums { RF230_PLL_CF_START = 1 << 7, RF230_PLL_DCU_START = 1 << 7, }; enum rf230_spi_command_enums { RF230_CMD_REGISTER_READ = 0x80, RF230_CMD_REGISTER_WRITE = 0xC0, RF230_CMD_REGISTER_MASK = 0x3F, RF230_CMD_FRAME_READ = 0x20, RF230_CMD_FRAME_WRITE = 0x60, RF230_CMD_SRAM_READ = 0x00, RF230_CMD_SRAM_WRITE = 0x40, }; #endif//__RF230DRIVERLAYER_H__ tinyos-2.1.2+dfsg/tos/chips/rf230/RF230DriverLayerC.nc000066400000000000000000000073521207233610700220710ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include configuration RF230DriverLayerC { provides { interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface Alarm; } uses { interface RF230DriverConfig as Config; interface PacketTimeStamp; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface RadioAlarm; } } implementation { components RF230DriverLayerP as DriverLayerP, HplRF230C, BusyWaitMicroC, TaskletC, MainC; RadioState = DriverLayerP; RadioSend = DriverLayerP; RadioReceive = DriverLayerP; RadioCCA = DriverLayerP; RadioPacket = DriverLayerP; LocalTimeRadio = HplRF230C; Config = DriverLayerP; PacketTransmitPower = DriverLayerP.PacketTransmitPower; TransmitPowerFlag = DriverLayerP.TransmitPowerFlag; PacketRSSI = DriverLayerP.PacketRSSI; RSSIFlag = DriverLayerP.RSSIFlag; PacketTimeSyncOffset = DriverLayerP.PacketTimeSyncOffset; TimeSyncFlag = DriverLayerP.TimeSyncFlag; PacketLinkQuality = DriverLayerP.PacketLinkQuality; PacketTimeStamp = DriverLayerP.PacketTimeStamp; LinkPacketMetadata = DriverLayerP; DriverLayerP.LocalTime -> HplRF230C; Alarm = HplRF230C.Alarm; RadioAlarm = DriverLayerP.RadioAlarm; DriverLayerP.SELN -> HplRF230C.SELN; DriverLayerP.SpiResource -> HplRF230C.SpiResource; DriverLayerP.FastSpiByte -> HplRF230C; DriverLayerP.SLP_TR -> HplRF230C.SLP_TR; DriverLayerP.RSTN -> HplRF230C.RSTN; DriverLayerP.IRQ -> HplRF230C.IRQ; DriverLayerP.Tasklet -> TaskletC; DriverLayerP.BusyWait -> BusyWaitMicroC; #ifdef RADIO_DEBUG components DiagMsgC; DriverLayerP.DiagMsg -> DiagMsgC; #endif MainC.SoftwareInit -> DriverLayerP.SoftwareInit; components RealMainP; RealMainP.PlatformInit -> DriverLayerP.PlatformInit; } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230DriverLayerP.nc000066400000000000000000000612701207233610700221050ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Branislav Kusy (bugfixes) */ #include #include #include #include #include module RF230DriverLayerP { provides { interface Init as PlatformInit @exactlyonce(); interface Init as SoftwareInit @exactlyonce(); interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface PacketField as PacketTimeSyncOffset; interface PacketField as PacketLinkQuality; interface LinkPacketMetadata; } uses { interface GeneralIO as SELN; interface Resource as SpiResource; interface FastSpiByte; interface GeneralIO as SLP_TR; interface GeneralIO as RSTN; interface GpioCapture as IRQ; interface BusyWait; interface LocalTime; interface RF230DriverConfig as Config; interface PacketFlag as TransmitPowerFlag; interface PacketFlag as RSSIFlag; interface PacketFlag as TimeSyncFlag; interface PacketTimeStamp; interface Tasklet; interface RadioAlarm; #ifdef RADIO_DEBUG interface DiagMsg; #endif } } implementation { rf230_header_t* getHeader(message_t* msg) { return ((void*)msg) + call Config.headerLength(msg); } void* getPayload(message_t* msg) { return ((void*)msg) + call RadioPacket.headerLength(msg); } rf230_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } /*----------------- STATE -----------------*/ tasklet_norace uint8_t state; enum { STATE_P_ON = 0, STATE_SLEEP = 1, STATE_SLEEP_2_TRX_OFF = 2, STATE_TRX_OFF = 3, STATE_TRX_OFF_2_RX_ON = 4, STATE_RX_ON = 5, STATE_BUSY_TX_2_RX_ON = 6, }; tasklet_norace uint8_t cmd; enum { CMD_NONE = 0, // the state machine has stopped CMD_TURNOFF = 1, // goto SLEEP state CMD_STANDBY = 2, // goto TRX_OFF state CMD_TURNON = 3, // goto RX_ON state CMD_TRANSMIT = 4, // currently transmitting a message CMD_RECEIVE = 5, // currently receiving a message CMD_CCA = 6, // performing clear chanel assesment CMD_CHANNEL = 7, // changing the channel CMD_SIGNAL_DONE = 8, // signal the end of the state transition CMD_DOWNLOAD = 9, // download the received message }; norace bool radioIrq; tasklet_norace uint8_t txPower; tasklet_norace uint8_t channel; tasklet_norace message_t* rxMsg; message_t rxMsgBuffer; uint16_t capturedTime; // the current time when the last interrupt has occured tasklet_norace uint8_t rssiClear; tasklet_norace uint8_t rssiBusy; /*----------------- REGISTER -----------------*/ inline void writeRegister(uint8_t reg, uint8_t value) { RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) ); call SELN.clr(); call FastSpiByte.splitWrite(RF230_CMD_REGISTER_WRITE | reg); call FastSpiByte.splitReadWrite(value); call FastSpiByte.splitRead(); call SELN.set(); } inline uint8_t readRegister(uint8_t reg) { RADIO_ASSERT( call SpiResource.isOwner() ); RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) ); call SELN.clr(); call FastSpiByte.splitWrite(RF230_CMD_REGISTER_READ | reg); call FastSpiByte.splitReadWrite(0); reg = call FastSpiByte.splitRead(); call SELN.set(); return reg; } /*----------------- ALARM -----------------*/ enum { SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC), CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC), TX_SFD_DELAY = (uint16_t)(176 * RADIO_ALARM_MICROSEC), RX_SFD_DELAY = (uint16_t)(8 * RADIO_ALARM_MICROSEC), }; tasklet_async event void RadioAlarm.fired() { if( state == STATE_SLEEP_2_TRX_OFF ) state = STATE_TRX_OFF; else if( cmd == CMD_CCA ) { uint8_t cca; RADIO_ASSERT( state == STATE_RX_ON ); cmd = CMD_NONE; cca = readRegister(RF230_TRX_STATUS); RADIO_ASSERT( (cca & RF230_TRX_STATUS_MASK) == RF230_RX_ON ); signal RadioCCA.done( (cca & RF230_CCA_DONE) ? ((cca & RF230_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL ); } else RADIO_ASSERT(FALSE); // make sure the rest of the command processing is called call Tasklet.schedule(); } /*----------------- INIT -----------------*/ command error_t PlatformInit.init() { call SELN.makeOutput(); call SELN.set(); call SLP_TR.makeOutput(); call SLP_TR.clr(); call RSTN.makeOutput(); call RSTN.set(); rxMsg = &rxMsgBuffer; // these are just good approximates rssiClear = 0; rssiBusy = 90; return SUCCESS; } command error_t SoftwareInit.init() { // for powering up the radio return call SpiResource.request(); } void initRadio() { call BusyWait.wait(510); call RSTN.clr(); call SLP_TR.clr(); call BusyWait.wait(6); call RSTN.set(); writeRegister(RF230_TRX_CTRL_0, RF230_TRX_CTRL_0_VALUE); writeRegister(RF230_TRX_STATE, RF230_TRX_OFF); call BusyWait.wait(510); writeRegister(RF230_IRQ_MASK, RF230_IRQ_TRX_UR | RF230_IRQ_PLL_LOCK | RF230_IRQ_TRX_END | RF230_IRQ_RX_START); writeRegister(RF230_CCA_THRES, RF230_CCA_THRES_VALUE); writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | (RF230_DEF_RFPOWER & RF230_TX_PWR_MASK)); txPower = RF230_DEF_RFPOWER & RF230_TX_PWR_MASK; channel = RF230_DEF_CHANNEL & RF230_CHANNEL_MASK; writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel); call SLP_TR.set(); state = STATE_SLEEP; } /*----------------- SPI -----------------*/ event void SpiResource.granted() { call SELN.makeOutput(); call SELN.set(); if( state == STATE_P_ON ) { initRadio(); call SpiResource.release(); } else call Tasklet.schedule(); } bool isSpiAcquired() { if( call SpiResource.isOwner() ) return TRUE; if( call SpiResource.immediateRequest() == SUCCESS ) { call SELN.makeOutput(); call SELN.set(); return TRUE; } call SpiResource.request(); return FALSE; } /*----------------- CHANNEL -----------------*/ tasklet_async command uint8_t RadioState.getChannel() { return channel; } tasklet_async command error_t RadioState.setChannel(uint8_t c) { c &= RF230_CHANNEL_MASK; if( cmd != CMD_NONE ) return EBUSY; else if( channel == c ) return EALREADY; channel = c; cmd = CMD_CHANNEL; call Tasklet.schedule(); return SUCCESS; } inline void changeChannel() { RADIO_ASSERT( cmd == CMD_CHANNEL ); RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON ); if( isSpiAcquired() ) { writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel); if( state == STATE_RX_ON ) state = STATE_TRX_OFF_2_RX_ON; else cmd = CMD_SIGNAL_DONE; } } /*----------------- TURN ON/OFF -----------------*/ inline void changeState() { if( (cmd == CMD_STANDBY || cmd == CMD_TURNON) && state == STATE_SLEEP && call RadioAlarm.isFree() ) { call SLP_TR.clr(); call RadioAlarm.wait(SLEEP_WAKEUP_TIME); state = STATE_SLEEP_2_TRX_OFF; } else if( cmd == CMD_TURNON && state == STATE_TRX_OFF && isSpiAcquired() ) { RADIO_ASSERT( ! radioIrq ); readRegister(RF230_IRQ_STATUS); // clear the interrupt register call IRQ.captureRisingEdge(); // setChannel was ignored in SLEEP because the SPI was not working, so do it here writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel); writeRegister(RF230_TRX_STATE, RF230_RX_ON); state = STATE_TRX_OFF_2_RX_ON; #ifdef RADIO_DEBUG_PARTNUM if( call DiagMsg.record() ) { call DiagMsg.str("partnum"); call DiagMsg.hex8(readRegister(RF230_PART_NUM)); call DiagMsg.hex8(readRegister(RF230_VERSION_NUM)); call DiagMsg.hex8(readRegister(RF230_MAN_ID_0)); call DiagMsg.hex8(readRegister(RF230_MAN_ID_1)); call DiagMsg.send(); } #endif } else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) && state == STATE_RX_ON && isSpiAcquired() ) { writeRegister(RF230_TRX_STATE, RF230_FORCE_TRX_OFF); call IRQ.disable(); radioIrq = FALSE; state = STATE_TRX_OFF; } if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF ) { call SLP_TR.set(); state = STATE_SLEEP; cmd = CMD_SIGNAL_DONE; } else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF ) cmd = CMD_SIGNAL_DONE; } tasklet_async command error_t RadioState.turnOff() { if( cmd != CMD_NONE ) return EBUSY; else if( state == STATE_SLEEP ) return EALREADY; cmd = CMD_TURNOFF; call Tasklet.schedule(); return SUCCESS; } tasklet_async command error_t RadioState.standby() { if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) ) return EBUSY; else if( state == STATE_TRX_OFF ) return EALREADY; cmd = CMD_STANDBY; call Tasklet.schedule(); return SUCCESS; } tasklet_async command error_t RadioState.turnOn() { if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) ) return EBUSY; else if( state == STATE_RX_ON ) return EALREADY; cmd = CMD_TURNON; call Tasklet.schedule(); return SUCCESS; } default tasklet_async event void RadioState.done() { } /*----------------- TRANSMIT -----------------*/ tasklet_async command error_t RadioSend.send(message_t* msg) { uint16_t time; uint8_t length; uint8_t* data; uint8_t header; uint32_t time32; void* timesync; if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq ) return EBUSY; length = (call PacketTransmitPower.isSet(msg) ? call PacketTransmitPower.get(msg) : RF230_DEF_RFPOWER) & RF230_TX_PWR_MASK; if( length != txPower ) { txPower = length; writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | txPower); } if( call Config.requiresRssiCca(msg) && (readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK) > ((rssiClear + rssiBusy) >> 3) ) return EBUSY; writeRegister(RF230_TRX_STATE, RF230_PLL_ON); // do something useful, just to wait a little time32 = call LocalTime.get(); timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0; // we have missed an incoming message in this short amount of time if( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) != RF230_PLL_ON ) { RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_BUSY_RX ); writeRegister(RF230_TRX_STATE, RF230_RX_ON); return EBUSY; } #ifndef RF230_SLOW_SPI atomic { call SLP_TR.set(); time = call RadioAlarm.getNow(); } call SLP_TR.clr(); #endif RADIO_ASSERT( ! radioIrq ); call SELN.clr(); call FastSpiByte.splitWrite(RF230_CMD_FRAME_WRITE); data = getPayload(msg); length = getHeader(msg)->length; // length | data[0] ... data[length-3] | automatically generated FCS call FastSpiByte.splitReadWrite(length); // the FCS is atomatically generated (2 bytes) length -= 2; header = call Config.headerPreloadLength(); if( header > length ) header = length; length -= header; // first upload the header to gain some time do { call FastSpiByte.splitReadWrite(*(data++)); } while( --header != 0 ); #ifdef RF230_SLOW_SPI atomic { call SLP_TR.set(); time = call RadioAlarm.getNow(); } call SLP_TR.clr(); #endif time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32); if( timesync != 0 ) *(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32; while( length-- != 0 ) call FastSpiByte.splitReadWrite(*(data++)); // wait for the SPI transfer to finish call FastSpiByte.splitRead(); call SELN.set(); /* * There is a very small window (~1 microsecond) when the RF230 went * into PLL_ON state but was somehow not properly initialized because * of an incoming message and could not go into BUSY_TX. I think the * radio can even receive a message, and generate a TRX_UR interrupt * because of concurrent access, but that message probably cannot be * recovered. * * TODO: this needs to be verified, and make sure that the chip is * not locked up in this case. */ // go back to RX_ON state when finished writeRegister(RF230_TRX_STATE, RF230_RX_ON); if( timesync != 0 ) *(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32; call PacketTimeStamp.set(msg, time32); #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { length = getHeader(msg)->length; call DiagMsg.chr('t'); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.int8(length); call DiagMsg.hex8s(getPayload(msg), length - 2); call DiagMsg.send(); } #endif // wait for the TRX_END interrupt state = STATE_BUSY_TX_2_RX_ON; cmd = CMD_TRANSMIT; return SUCCESS; } default tasklet_async event void RadioSend.sendDone(error_t error) { } default tasklet_async event void RadioSend.ready() { } /*----------------- CCA -----------------*/ tasklet_async command error_t RadioCCA.request() { if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() ) return EBUSY; // see Errata B7 of the datasheet // writeRegister(RF230_TRX_STATE, RF230_PLL_ON); // writeRegister(RF230_TRX_STATE, RF230_RX_ON); writeRegister(RF230_PHY_CC_CCA, RF230_CCA_REQUEST | RF230_CCA_MODE_VALUE | channel); call RadioAlarm.wait(CCA_REQUEST_TIME); cmd = CMD_CCA; return SUCCESS; } default tasklet_async event void RadioCCA.done(error_t error) { } /*----------------- RECEIVE -----------------*/ inline void downloadMessage() { uint8_t length; uint16_t crc; call SELN.clr(); call FastSpiByte.write(RF230_CMD_FRAME_READ); // read the length byte length = call FastSpiByte.write(0); // if correct length if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 ) { uint8_t read; uint8_t* data; // initiate the reading call FastSpiByte.splitWrite(0); data = getPayload(rxMsg); getHeader(rxMsg)->length = length; crc = 0; // we do not store the CRC field length -= 2; read = call Config.headerPreloadLength(); if( length < read ) read = length; length -= read; do { crc = RF230_CRCBYTE_COMMAND(crc, *(data++) = call FastSpiByte.splitReadWrite(0)); } while( --read != 0 ); if( signal RadioReceive.header(rxMsg) ) { while( length-- != 0 ) crc = RF230_CRCBYTE_COMMAND(crc, *(data++) = call FastSpiByte.splitReadWrite(0)); crc = RF230_CRCBYTE_COMMAND(crc, call FastSpiByte.splitReadWrite(0)); crc = RF230_CRCBYTE_COMMAND(crc, call FastSpiByte.splitReadWrite(0)); call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitRead()); } else { call FastSpiByte.splitRead(); // finish the SPI transfer crc = 1; } } else crc = 1; call SELN.set(); state = STATE_RX_ON; #ifdef RADIO_DEBUG_MESSAGES if( call DiagMsg.record() ) { length = getHeader(rxMsg)->length; call DiagMsg.chr('r'); call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.int8(crc == 0 ? length : -length); call DiagMsg.hex8s(getPayload(rxMsg), length - 2); call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1); call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0); call DiagMsg.send(); } #endif cmd = CMD_NONE; // signal only if it has passed the CRC check if( crc == 0 ) rxMsg = signal RadioReceive.receive(rxMsg); } /*----------------- IRQ -----------------*/ async event void IRQ.captured(uint16_t time) { RADIO_ASSERT( ! radioIrq ); atomic { capturedTime = time; radioIrq = TRUE; } call Tasklet.schedule(); } void serviceRadio() { if( isSpiAcquired() ) { uint16_t time; uint32_t time32; uint8_t irq; uint8_t temp; atomic time = capturedTime; radioIrq = FALSE; irq = readRegister(RF230_IRQ_STATUS); #ifdef RADIO_DEBUG // TODO: handle this interrupt if( irq & RF230_IRQ_TRX_UR ) { if( call DiagMsg.record() ) { call DiagMsg.str("assert ur"); call DiagMsg.uint16(call RadioAlarm.getNow()); call DiagMsg.hex8(readRegister(RF230_TRX_STATUS)); call DiagMsg.hex8(readRegister(RF230_TRX_STATE)); call DiagMsg.hex8(irq); call DiagMsg.uint8(state); call DiagMsg.uint8(cmd); call DiagMsg.send(); } } #endif #ifdef RF230_RSSI_ENERGY if( irq & RF230_IRQ_TRX_END ) { if( irq == RF230_IRQ_TRX_END || (irq == (RF230_IRQ_RX_START | RF230_IRQ_TRX_END) && cmd == CMD_NONE) ) call PacketRSSI.set(rxMsg, readRegister(RF230_PHY_ED_LEVEL)); else call PacketRSSI.clear(rxMsg); } #endif // sometimes we miss a PLL lock interrupt after turn on if( cmd == CMD_TURNON || cmd == CMD_CHANNEL ) { RADIO_ASSERT( irq & RF230_IRQ_PLL_LOCK ); RADIO_ASSERT( state == STATE_TRX_OFF_2_RX_ON ); state = STATE_RX_ON; cmd = CMD_SIGNAL_DONE; } else if( irq & RF230_IRQ_PLL_LOCK ) { RADIO_ASSERT( cmd == CMD_TRANSMIT ); RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON ); } if( irq & RF230_IRQ_RX_START ) { if( cmd == CMD_CCA ) { signal RadioCCA.done(FAIL); cmd = CMD_NONE; } if( cmd == CMD_NONE ) { RADIO_ASSERT( state == STATE_RX_ON ); // the most likely place for busy channel, with no TRX_END interrupt if( irq == RF230_IRQ_RX_START ) { temp = readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK; rssiBusy += temp - (rssiBusy >> 2); #ifndef RF230_RSSI_ENERGY call PacketRSSI.set(rxMsg, temp); } else { call PacketRSSI.clear(rxMsg); #endif } /* * The timestamp corresponds to the first event which could not * have been a PLL_LOCK because then cmd != CMD_NONE, so we must * have received a message (and could also have received the * TRX_END interrupt in the mean time, but that is fine. Also, * we could not be after a transmission, because then cmd = * CMD_TRANSMIT. */ if( irq == RF230_IRQ_RX_START ) // just to be cautious { time32 = call LocalTime.get(); time32 += (int16_t)(time - RX_SFD_DELAY) - (int16_t)(time32); call PacketTimeStamp.set(rxMsg, time32); } else call PacketTimeStamp.clear(rxMsg); cmd = CMD_RECEIVE; } else RADIO_ASSERT( cmd == CMD_TURNOFF ); } if( irq & RF230_IRQ_TRX_END ) { if( cmd == CMD_TRANSMIT ) { RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON ); state = STATE_RX_ON; cmd = CMD_NONE; signal RadioSend.sendDone(SUCCESS); // TODO: we could have missed a received message RADIO_ASSERT( ! (irq & RF230_IRQ_RX_START) ); } else if( cmd == CMD_RECEIVE ) { RADIO_ASSERT( state == STATE_RX_ON ); // the most likely place for clear channel (hope to avoid acks) rssiClear += (readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK) - (rssiClear >> 2); cmd = CMD_DOWNLOAD; } else RADIO_ASSERT(FALSE); } } } default tasklet_async event bool RadioReceive.header(message_t* msg) { return TRUE; } default tasklet_async event message_t* RadioReceive.receive(message_t* msg) { return msg; } /*----------------- TASKLET -----------------*/ task void releaseSpi() { call SpiResource.release(); } tasklet_async event void Tasklet.run() { if( radioIrq ) serviceRadio(); if( cmd != CMD_NONE ) { if( cmd == CMD_DOWNLOAD ) downloadMessage(); else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON ) changeState(); else if( cmd == CMD_CHANNEL ) changeChannel(); if( cmd == CMD_SIGNAL_DONE ) { cmd = CMD_NONE; signal RadioState.done(); } } if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq ) signal RadioSend.ready(); if( cmd == CMD_NONE ) post releaseSpi(); } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg) { return call Config.headerLength(msg) + sizeof(rf230_header_t); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return getHeader(msg)->length - 2; } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { RADIO_ASSERT( 1 <= length && length <= 125 ); RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) ); // we add the length of the CRC, which is automatically generated getHeader(msg)->length = length + 2; } async command uint8_t RadioPacket.maxPayloadLength() { RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf230_header_t) <= 125 ); return call Config.maxPayloadLength() - sizeof(rf230_header_t); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call Config.metadataLength(msg) + sizeof(rf230_metadata_t); } async command void RadioPacket.clear(message_t* msg) { // all flags are automatically cleared } /*----------------- PacketTransmitPower -----------------*/ async command bool PacketTransmitPower.isSet(message_t* msg) { return call TransmitPowerFlag.get(msg); } async command uint8_t PacketTransmitPower.get(message_t* msg) { return getMeta(msg)->power; } async command void PacketTransmitPower.clear(message_t* msg) { call TransmitPowerFlag.clear(msg); } async command void PacketTransmitPower.set(message_t* msg, uint8_t value) { call TransmitPowerFlag.set(msg); getMeta(msg)->power = value; } /*----------------- PacketRSSI -----------------*/ async command bool PacketRSSI.isSet(message_t* msg) { return call RSSIFlag.get(msg); } async command uint8_t PacketRSSI.get(message_t* msg) { return getMeta(msg)->rssi; } async command void PacketRSSI.clear(message_t* msg) { call RSSIFlag.clear(msg); } async command void PacketRSSI.set(message_t* msg, uint8_t value) { // just to be safe if the user fails to clear the packet call TransmitPowerFlag.clear(msg); call RSSIFlag.set(msg); getMeta(msg)->rssi = value; } /*----------------- PacketTimeSyncOffset -----------------*/ async command bool PacketTimeSyncOffset.isSet(message_t* msg) { return call TimeSyncFlag.get(msg); } async command uint8_t PacketTimeSyncOffset.get(message_t* msg) { return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t); } async command void PacketTimeSyncOffset.clear(message_t* msg) { call TimeSyncFlag.clear(msg); } async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value) { // we do not store the value, the time sync field is always the last 4 bytes RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value ); call TimeSyncFlag.set(msg); } /*----------------- PacketLinkQuality -----------------*/ async command bool PacketLinkQuality.isSet(message_t* msg) { return TRUE; } async command uint8_t PacketLinkQuality.get(message_t* msg) { return getMeta(msg)->lqi; } async command void PacketLinkQuality.clear(message_t* msg) { } async command void PacketLinkQuality.set(message_t* msg, uint8_t value) { getMeta(msg)->lqi = value; } /*----------------- LinkPacketMetadata -----------------*/ async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { return call PacketLinkQuality.get(msg) > 200; } } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230Ieee154MessageC.nc000066400000000000000000000061661207233610700222510ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #ifdef TFRAMES_ENABLED #error "You cannot use Ieee154MessageC with TFRAMES_ENABLED defined" #endif configuration RF230Ieee154MessageC { provides { interface SplitControl; interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier; interface Ieee154Packet; interface Packet; interface Resource as SendResource[uint8_t clint]; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RF230RadioC; SplitControl = RF230RadioC; Ieee154Send = RF230RadioC.Ieee154Send; Ieee154Receive = RF230RadioC.Ieee154Receive; SendNotifier = RF230RadioC.Ieee154Notifier; Packet = RF230RadioC.PacketForIeee154Message; Ieee154Packet = RF230RadioC; SendResource = RF230RadioC; PacketAcknowledgements = RF230RadioC; LowPowerListening = RF230RadioC; PacketLink = RF230RadioC; RadioChannel = RF230RadioC; PacketLinkQuality = RF230RadioC.PacketLinkQuality; PacketTransmitPower = RF230RadioC.PacketTransmitPower; PacketRSSI = RF230RadioC.PacketRSSI; LocalTimeRadio = RF230RadioC; PacketTimeStampMilli = RF230RadioC; PacketTimeStampRadio = RF230RadioC; } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230Radio.h000066400000000000000000000051041207233610700204140ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __RF230RADIO_H__ #define __RF230RADIO_H__ #include #include #include #include #include #include #include #include #include typedef nx_struct rf230packet_header_t { rf230_header_t rf230; ieee154_simple_header_t ieee154; #ifndef TFRAMES_ENABLED network_header_t network; #endif #ifndef IEEE154FRAMES_ENABLED activemessage_header_t am; #endif } rf230packet_header_t; typedef nx_struct rf230packet_footer_t { // the time stamp is not recorded here, time stamped messaged cannot have max length } rf230packet_footer_t; typedef struct rf230packet_metadata_t { #ifdef LOW_POWER_LISTENING lpl_metadata_t lpl; #endif #ifdef PACKET_LINK link_metadata_t link; #endif timestamp_metadata_t timestamp; flags_metadata_t flags; rf230_metadata_t rf230; } rf230packet_metadata_t; #endif//__RF230RADIO_H__ tinyos-2.1.2+dfsg/tos/chips/rf230/RF230RadioC.nc000066400000000000000000000243541207233610700207000ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include configuration RF230RadioC { provides { interface SplitControl; #ifndef IEEE154FRAMES_ENABLED interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet as PacketForActiveMessage; #endif #ifndef TFRAMES_ENABLED interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier as Ieee154Notifier; interface Resource as SendResource[uint8_t clint]; interface Ieee154Packet; interface Packet as PacketForIeee154Message; #endif interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; #ifdef TRAFFIC_MONITOR interface TrafficMonitor; #endif interface RadioChannel; interface PacketField as PacketLinkQuality; interface PacketField as PacketTransmitPower; interface PacketField as PacketRSSI; interface LinkPacketMetadata; interface LocalTime as LocalTimeRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { #define UQ_METADATA_FLAGS "UQ_RF230_METADATA_FLAGS" #define UQ_RADIO_ALARM "UQ_RF230_RADIO_ALARM" // -------- RadioP components RF230RadioP as RadioP; #ifdef RADIO_DEBUG components AssertC; #endif RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC; RadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; RadioP.PacketTimeStamp -> TimeStampingLayerC; RadioP.RF230Packet -> RadioDriverLayerC; // -------- RadioAlarm components new RadioAlarmC(); RadioAlarmC.Alarm -> RadioDriverLayerC; // -------- Active Message #ifndef IEEE154FRAMES_ENABLED components new ActiveMessageLayerC(); ActiveMessageLayerC.Config -> RadioP; ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC; ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive; ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket; AMSend = ActiveMessageLayerC; Receive = ActiveMessageLayerC.Receive; Snoop = ActiveMessageLayerC.Snoop; SendNotifier = ActiveMessageLayerC; AMPacket = ActiveMessageLayerC; PacketForActiveMessage = ActiveMessageLayerC; ReceiveDefault = ActiveMessageLayerC.ReceiveDefault; SnoopDefault = ActiveMessageLayerC.SnoopDefault; #endif // -------- Automatic RadioSend Resource #ifndef IEEE154FRAMES_ENABLED #ifndef TFRAMES_ENABLED components new AutoResourceAcquireLayerC(); AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)]; #else components new DummyLayerC() as AutoResourceAcquireLayerC; #endif AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend; #endif // -------- RadioSend Resource #ifndef TFRAMES_ENABLED components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC; SendResource = SendResourceC; // -------- Ieee154 Message components new Ieee154MessageLayerC(); Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC; Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send; Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive; Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet; Ieee154Send = Ieee154MessageLayerC; Ieee154Receive = Ieee154MessageLayerC; Ieee154Notifier = Ieee154MessageLayerC; Ieee154Packet = Ieee154PacketLayerC; PacketForIeee154Message = Ieee154MessageLayerC; #endif // -------- Tinyos Network components new TinyosNetworkLayerC(); TinyosNetworkLayerC.SubSend -> UniqueLayerC; TinyosNetworkLayerC.SubReceive -> PacketLinkLayerC; TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC; // -------- IEEE 802.15.4 Packet components new Ieee154PacketLayerC(); Ieee154PacketLayerC.SubPacket -> PacketLinkLayerC; // -------- UniqueLayer Send part (wired twice) components new UniqueLayerC(); UniqueLayerC.Config -> RadioP; UniqueLayerC.SubSend -> PacketLinkLayerC; // -------- Packet Link components new PacketLinkLayerC(); PacketLink = PacketLinkLayerC; #ifdef RF230_HARDWARE_ACK PacketLinkLayerC.PacketAcknowledgements -> RadioDriverLayerC; #else PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC; #endif PacketLinkLayerC -> LowPowerListeningLayerC.Send; PacketLinkLayerC -> LowPowerListeningLayerC.Receive; PacketLinkLayerC -> LowPowerListeningLayerC.RadioPacket; // -------- Low Power Listening #ifdef LOW_POWER_LISTENING #warning "*** USING LOW POWER LISTENING LAYER" components new LowPowerListeningLayerC(); LowPowerListeningLayerC.Config -> RadioP; #ifdef RF230_HARDWARE_ACK LowPowerListeningLayerC.PacketAcknowledgements -> RadioDriverLayerC; #else LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC; #endif #else components new LowPowerListeningDummyC() as LowPowerListeningLayerC; #endif LowPowerListeningLayerC.SubControl -> MessageBufferLayerC; LowPowerListeningLayerC.SubSend -> MessageBufferLayerC; LowPowerListeningLayerC.SubReceive -> MessageBufferLayerC; LowPowerListeningLayerC.SubPacket -> TimeStampingLayerC; SplitControl = LowPowerListeningLayerC; LowPowerListening = LowPowerListeningLayerC; // -------- MessageBuffer components new MessageBufferLayerC(); MessageBufferLayerC.RadioSend -> CollisionAvoidanceLayerC; MessageBufferLayerC.RadioReceive -> UniqueLayerC; MessageBufferLayerC.RadioState -> TrafficMonitorLayerC; RadioChannel = MessageBufferLayerC; // -------- UniqueLayer receive part (wired twice) UniqueLayerC.SubReceive -> CollisionAvoidanceLayerC; // -------- CollisionAvoidance #ifdef SLOTTED_MAC components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC; #else components new RandomCollisionLayerC() as CollisionAvoidanceLayerC; #endif CollisionAvoidanceLayerC.Config -> RadioP; CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC; CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC; CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; // -------- SoftwareAcknowledgement #ifndef RF230_HARDWARE_ACK components new SoftwareAckLayerC(); SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; PacketAcknowledgements = SoftwareAckLayerC; #else components new DummyLayerC() as SoftwareAckLayerC; #endif SoftwareAckLayerC.Config -> RadioP; SoftwareAckLayerC.SubSend -> CsmaLayerC; SoftwareAckLayerC.SubReceive -> CsmaLayerC; // -------- Carrier Sense components new DummyLayerC() as CsmaLayerC; CsmaLayerC.Config -> RadioP; CsmaLayerC -> TrafficMonitorLayerC.RadioSend; CsmaLayerC -> TrafficMonitorLayerC.RadioReceive; CsmaLayerC -> RadioDriverLayerC.RadioCCA; // -------- TimeStamping components new TimeStampingLayerC(); TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC; TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC; PacketTimeStampRadio = TimeStampingLayerC; PacketTimeStampMilli = TimeStampingLayerC; TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; // -------- MetadataFlags components new MetadataFlagsLayerC(); MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC; // -------- Traffic Monitor #ifdef TRAFFIC_MONITOR components new TrafficMonitorLayerC(); TrafficMonitor = TrafficMonitorLayerC; #else components new DummyLayerC() as TrafficMonitorLayerC; #endif TrafficMonitorLayerC.Config -> RadioP; TrafficMonitorLayerC -> RadioDriverLayerC.RadioSend; TrafficMonitorLayerC -> RadioDriverLayerC.RadioReceive; TrafficMonitorLayerC -> RadioDriverLayerC.RadioState; // -------- Driver #ifdef RF230_HARDWARE_ACK components RF230DriverHwAckC as RadioDriverLayerC; PacketAcknowledgements = RadioDriverLayerC; RadioDriverLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC; RadioDriverLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; #else components RF230DriverLayerC as RadioDriverLayerC; #endif RadioDriverLayerC.Config -> RadioP; RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC; PacketTransmitPower = RadioDriverLayerC.PacketTransmitPower; PacketLinkQuality = RadioDriverLayerC.PacketLinkQuality; PacketRSSI = RadioDriverLayerC.PacketRSSI; LinkPacketMetadata = RadioDriverLayerC; LocalTimeRadio = RadioDriverLayerC; RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)]; RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)]; } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230RadioP.nc000066400000000000000000000226321207233610700207120ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include #include module RF230RadioP { provides { interface RF230DriverConfig; interface SoftwareAckConfig; interface UniqueConfig; interface CsmaConfig; interface TrafficMonitorConfig; interface RandomCollisionConfig; interface SlottedCollisionConfig; interface ActiveMessageConfig; interface DummyConfig; #ifdef LOW_POWER_LISTENING interface LowPowerListeningConfig; #endif } uses { interface Ieee154PacketLayer; interface RadioAlarm; interface RadioPacket as RF230Packet; interface PacketTimeStamp; } } implementation { /*----------------- RF230DriverConfig -----------------*/ async command uint8_t RF230DriverConfig.headerLength(message_t* msg) { return offsetof(message_t, data) - sizeof(rf230packet_header_t); } async command uint8_t RF230DriverConfig.maxPayloadLength() { return sizeof(rf230packet_header_t) + TOSH_DATA_LENGTH; } async command uint8_t RF230DriverConfig.metadataLength(message_t* msg) { return 0; } async command uint8_t RF230DriverConfig.headerPreloadLength() { // we need the fcf, dsn, destpan and dest return 7; } async command bool RF230DriverConfig.requiresRssiCca(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- SoftwareAckConfig -----------------*/ async command bool SoftwareAckConfig.requiresAckWait(message_t* msg) { return call Ieee154PacketLayer.requiresAckWait(msg); } async command bool SoftwareAckConfig.isAckPacket(message_t* msg) { return call Ieee154PacketLayer.isAckFrame(msg); } async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack) { return call Ieee154PacketLayer.verifyAckReply(data, ack); } async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack) { call Ieee154PacketLayer.setAckRequired(msg, ack); } async command bool SoftwareAckConfig.requiresAckReply(message_t* msg) { return call Ieee154PacketLayer.requiresAckReply(msg); } async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack) { call Ieee154PacketLayer.createAckReply(data, ack); } #ifndef SOFTWAREACK_TIMEOUT #define SOFTWAREACK_TIMEOUT 1000 #endif async command uint16_t SoftwareAckConfig.getAckTimeout() { return (uint16_t)(SOFTWAREACK_TIMEOUT * RADIO_ALARM_MICROSEC); } tasklet_async command void SoftwareAckConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- UniqueConfig -----------------*/ async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg) { return call Ieee154PacketLayer.getDSN(msg); } async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn) { call Ieee154PacketLayer.setDSN(msg, dsn); } async command am_addr_t UniqueConfig.getSender(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } tasklet_async command void UniqueConfig.reportChannelError() { #ifdef TRAFFIC_MONITOR // signal TrafficMonitorConfig.channelError(); #endif } /*----------------- ActiveMessageConfig -----------------*/ command am_addr_t ActiveMessageConfig.destination(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg); } command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setDestAddr(msg, addr); } command am_addr_t ActiveMessageConfig.source(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr) { call Ieee154PacketLayer.setSrcAddr(msg, addr); } command am_group_t ActiveMessageConfig.group(message_t* msg) { return call Ieee154PacketLayer.getDestPan(msg); } command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp) { call Ieee154PacketLayer.setDestPan(msg, grp); } command error_t ActiveMessageConfig.checkFrame(message_t* msg) { if( ! call Ieee154PacketLayer.isDataFrame(msg) ) call Ieee154PacketLayer.createDataFrame(msg); return SUCCESS; } /*----------------- CsmaConfig -----------------*/ async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg) { return call Ieee154PacketLayer.isDataFrame(msg); } /*----------------- TrafficMonitorConfig -----------------*/ async command uint16_t TrafficMonitorConfig.getBytes(message_t* msg) { // pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes) return call RF230Packet.payloadLength(msg) + 6; } /*----------------- RandomCollisionConfig -----------------*/ /* * We try to use the same values as in CC2420 * * CC2420_MIN_BACKOFF = 10 jiffies = 320 microsec * CC2420_BACKOFF_PERIOD = 10 jiffies * initial backoff = 0x1F * CC2420_BACKOFF_PERIOD = 310 jiffies = 9920 microsec * congestion backoff = 0x7 * CC2420_BACKOFF_PERIOD = 70 jiffies = 2240 microsec */ #ifndef LOW_POWER_LISTENING #ifndef RF230_BACKOFF_MIN #define RF230_BACKOFF_MIN 320 #endif async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(RF230_BACKOFF_MIN * RADIO_ALARM_MICROSEC); } #ifndef RF230_BACKOFF_INIT #define RF230_BACKOFF_INIT 4960 // instead of 9920 #endif async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(RF230_BACKOFF_INIT * RADIO_ALARM_MICROSEC); } #ifndef RF230_BACKOFF_CONG #define RF230_BACKOFF_CONG 2240 #endif async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(RF230_BACKOFF_CONG * RADIO_ALARM_MICROSEC); } #endif async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg) { uint16_t time; // TODO: maybe we should use the embedded timestamp of the message time = call RadioAlarm.getNow(); // estimated response time (download the message, etc) is 5-8 bytes if( call Ieee154PacketLayer.requiresAckReply(msg) ) time += (uint16_t)(32 * (-5 + 16 + 11 + 5) * RADIO_ALARM_MICROSEC); else time += (uint16_t)(32 * (-5 + 5) * RADIO_ALARM_MICROSEC); return time; } tasklet_async event void RadioAlarm.fired() { } /*----------------- SlottedCollisionConfig -----------------*/ async command uint16_t SlottedCollisionConfig.getInitialDelay() { return 300; } async command uint8_t SlottedCollisionConfig.getScheduleExponent() { return 1 + RADIO_ALARM_MILLI_EXP; } async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg) { // TODO: check if the timestamp is correct return call PacketTimeStamp.timestamp(msg); } async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg) { // the preamble (4 bytes), SFD (1 byte), plus two extra for safety return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC); } async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg) { return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC); } /*----------------- Dummy -----------------*/ async command void DummyConfig.nothing() { } /*----------------- LowPowerListening -----------------*/ #ifdef LOW_POWER_LISTENING command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR; } command bool LowPowerListeningConfig.ackRequested(message_t* msg) { return call Ieee154PacketLayer.getAckRequired(msg); } command uint16_t LowPowerListeningConfig.getListenLength() { return 5; } async command uint16_t RandomCollisionConfig.getMinimumBackoff() { return (uint16_t)(320 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg) { return (uint16_t)(1600 * RADIO_ALARM_MICROSEC); } async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg) { return (uint16_t)(3200 * RADIO_ALARM_MICROSEC); } #endif } tinyos-2.1.2+dfsg/tos/chips/rf230/RF230TimeSyncMessageC.nc000066400000000000000000000064741207233610700227050ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include configuration RF230TimeSyncMessageC { provides { interface SplitControl; interface Receive[uint8_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketTimeStamp as PacketTimeStampRadio; interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components RF230ActiveMessageC as ActiveMessageC, new TimeSyncMessageLayerC(); SplitControl = ActiveMessageC; AMPacket = TimeSyncMessageLayerC; Receive = TimeSyncMessageLayerC.Receive; Snoop = TimeSyncMessageLayerC.Snoop; Packet = TimeSyncMessageLayerC; PacketAcknowledgements = ActiveMessageC; LowPowerListening = ActiveMessageC; PacketTimeStampRadio = ActiveMessageC; TimeSyncAMSendRadio = TimeSyncMessageLayerC; TimeSyncPacketRadio = TimeSyncMessageLayerC; PacketTimeStampMilli = ActiveMessageC; TimeSyncAMSendMilli = TimeSyncMessageLayerC; TimeSyncPacketMilli = TimeSyncMessageLayerC; TimeSyncMessageLayerC.PacketTimeStampRadio -> ActiveMessageC; TimeSyncMessageLayerC.PacketTimeStampMilli -> ActiveMessageC; #ifdef RF230_HARDWARE_ACK components RF230DriverHwAckC as DriverLayerC; #else components RF230DriverLayerC as DriverLayerC; #endif TimeSyncMessageLayerC.LocalTimeRadio -> DriverLayerC; TimeSyncMessageLayerC.PacketTimeSyncOffset -> DriverLayerC.PacketTimeSyncOffset; } tinyos-2.1.2+dfsg/tos/chips/sht11/000077500000000000000000000000001207233610700166345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/sht11/HalSht11Advanced.nc000066400000000000000000000036421207233610700221360ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ interface HalSht11Advanced { command error_t getVoltageStatus(); event void getVoltageStatusDone(error_t error, bool isLow); command error_t setHeater(bool isOn); event void setHeaterDone(error_t error); command error_t setResolution(bool resolution); event void setResolutionDone(error_t error); } tinyos-2.1.2+dfsg/tos/chips/sht11/HalSht11ControlP.nc000066400000000000000000000104561207233610700221720ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * * @author Kaisen Lin * @author Phil Buonadonna */ #include "SensirionSht11.h" module HalSht11ControlP { provides interface HalSht11Advanced; uses interface SensirionSht11; uses interface Resource; } implementation { enum { S_IDLE, S_GETVOLT, S_SETHEAT, S_SETRES, }; uint8_t state = S_IDLE; uint8_t statusRegisterShadow = 0x0; error_t clientResult; error_t clientVal; task void signal_Task() { switch(state) { case S_GETVOLT: state = S_IDLE; call Resource.release(); signal HalSht11Advanced.getVoltageStatusDone(clientResult, clientVal & SHT11_STATUS_LOW_BATTERY_BIT); break; case S_SETHEAT: state = S_IDLE; call Resource.release(); signal HalSht11Advanced.setHeaterDone(clientResult); break; case S_SETRES: state = S_IDLE; call Resource.release(); signal HalSht11Advanced.setResolutionDone(clientResult); break; default: break; } } command error_t HalSht11Advanced.getVoltageStatus() { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_GETVOLT; call SensirionSht11.readStatusReg(); return SUCCESS; } command error_t HalSht11Advanced.setHeater(bool isOn) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_SETHEAT; if(isOn) statusRegisterShadow |= SHT11_STATUS_HEATER_ON_BIT; else statusRegisterShadow &= ~SHT11_STATUS_HEATER_ON_BIT; call SensirionSht11.writeStatusReg(statusRegisterShadow); return SUCCESS; } command error_t HalSht11Advanced.setResolution(bool resolution) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_SETRES; if(resolution) statusRegisterShadow |= SHT11_STATUS_LOW_RES_BIT; else statusRegisterShadow &= ~SHT11_STATUS_LOW_RES_BIT; call SensirionSht11.writeStatusReg(statusRegisterShadow); return SUCCESS; } event void SensirionSht11.readStatusRegDone( error_t result, uint8_t val ) { clientResult = result; clientVal = val; post signal_Task(); } event void SensirionSht11.writeStatusRegDone( error_t result ) { clientResult = result; post signal_Task(); } event void Resource.granted() { /* intentionally left blank */ } event void SensirionSht11.resetDone( error_t result ) {} event void SensirionSht11.measureTemperatureDone( error_t result, uint16_t val ) {} event void SensirionSht11.measureHumidityDone( error_t result, uint16_t val ) {} } tinyos-2.1.2+dfsg/tos/chips/sht11/SensirionSht11.h000066400000000000000000000036411207233610700216030ustar00rootroot00000000000000#ifndef SENSIRIONSHT11_H #define SENSIRIONSHT11_H /* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * * @author Gilman Tolle */ enum { SHT11_TEMPERATURE_BITS = 14, SHT11_HUMIDITY_BITS = 12, }; enum { SHT11_STATUS_LOW_RES_BIT = 1 << 0, SHT11_STATUS_NO_RELOAD_BIT = 1 << 1, SHT11_STATUS_HEATER_ON_BIT = 1 << 2, SHT11_STATUS_LOW_BATTERY_BIT = 1 << 6, } sht_bits_t; #endif tinyos-2.1.2+dfsg/tos/chips/sht11/SensirionSht11.nc000066400000000000000000000072571207233610700217630ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * SensirionSht11 is the rich interface to the Sensirion SHT11 * temperature/humidity sensor. * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ interface SensirionSht11 { /** * Resets the sensor. * * @return SUCCESS if the sensor will be reset */ command error_t reset(); /** * Signals that the sensor has been reset. * * @param result SUCCESS if the reset succeeded */ event void resetDone( error_t result ); /** * Starts a temperature measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureTemperature(); /** * Presents the result of a temperature measurement. * * @param result SUCCESS if the measurement was successful * @param val the temperature reading */ event void measureTemperatureDone( error_t result, uint16_t val ); /** * Starts a humidity measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureHumidity(); /** * Presents the result of a humidity measurement. * * @param result SUCCESS if the measurement was successful * @param val the humidity reading */ event void measureHumidityDone( error_t result, uint16_t val ); /** * Reads the current contents of the SHT11 status and control * register. See the datasheet for interpretation of this register. * * @return SUCCESS if the read will be performed */ command error_t readStatusReg(); /** * Presents the value of the status register. * * @param result SUCCESS if the read succeeded * @param val the value of the register */ event void readStatusRegDone( error_t result, uint8_t val ); /** * Writes a new value to the SHT11 status and control register. * * @param val the new value to be written * * @return SUCCESS if the write will be performed */ command error_t writeStatusReg( uint8_t val ); /** * Signals the completion of the status register write. * * @param result SUCCESS if the write was successful */ event void writeStatusRegDone( error_t result ); } tinyos-2.1.2+dfsg/tos/chips/sht11/SensirionSht11LogicP.nc000066400000000000000000000250051207233610700230500ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "Timer.h" #include "SensirionSht11.h" /** * SensirionSht11LogicP contains the actual driver logic needed to * read from the Sensirion SHT11 temperature/humidity sensor. It * depends on 2 underlying GeneralIO interfaces, one for the data pin * and one for the clock pin, and one underlying GpioInterrupt. It * provides the HAL-level SensirionSht11 interface. It's generic, so * you can instantiate it multiple times if you have more than one * Sensirion SHT11 attached to a node. * *

      * This code assumes that the MCU clock is less than 10 MHz. If you * ever run this on a faster MCU, you'll need to insert a lot of * waits to keep the Sensirion happy. * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ generic module SensirionSht11LogicP() { provides interface SensirionSht11[ uint8_t client ]; uses interface GeneralIO as DATA; uses interface GeneralIO as CLOCK; uses interface GpioInterrupt as InterruptDATA; uses interface Timer; uses interface Leds; } implementation { typedef enum { CMD_MEASURE_TEMPERATURE = 0x3, CMD_MEASURE_HUMIDITY = 0x5, CMD_READ_STATUS = 0x7, CMD_WRITE_STATUS = 0x6, CMD_SOFT_RESET = 0x1E, } sht_cmd_t; enum { TIMEOUT_RESET = 11, TIMEOUT_14BIT = 330, TIMEOUT_12BIT = 250, //70, TIMEOUT_8BIT = 250, //15, } sht_timeout_t; bool on = TRUE; bool busy = FALSE; uint8_t status = 0; sht_cmd_t cmd; uint8_t newStatus; bool writeFail = FALSE; uint8_t currentClient; error_t performCommand(); void initPins(); void resetDevice(); void transmissionStart(); void sendCommand(uint8_t _cmd); void writeByte(uint8_t byte); error_t waitForResponse(); void enableInterrupt(); uint8_t readByte(); void ack(); void endTransmission(); task void readSensor(); task void signalStatusDone(); command error_t SensirionSht11.reset[ uint8_t client ]() { if ( !on ) { return EOFF; } if ( busy ) { return EBUSY; } else { busy = TRUE; } cmd = CMD_SOFT_RESET; currentClient = client; return performCommand(); } command error_t SensirionSht11.measureTemperature[ uint8_t client ]() { if ( !on ) { return EOFF; } if ( busy ) { return EBUSY; } else { busy = TRUE; } cmd = CMD_MEASURE_TEMPERATURE; currentClient = client; return performCommand(); } command error_t SensirionSht11.measureHumidity[ uint8_t client ]() { if ( !on ) { return EOFF; } if ( busy ) { return EBUSY; } else { busy = TRUE; } cmd = CMD_MEASURE_HUMIDITY; currentClient = client; return performCommand(); } /* FIXME: these don't seem to work */ command error_t SensirionSht11.readStatusReg[ uint8_t client ]() { if ( !on ) { return EOFF; } if ( busy ) { return EBUSY; } else { busy = TRUE; } cmd = CMD_READ_STATUS; currentClient = client; return performCommand(); } /* FIXME: these don't seem to work */ command error_t SensirionSht11.writeStatusReg[ uint8_t client ]( uint8_t val ) { if ( !on ) { return EOFF; } if ( busy ) { return EBUSY; } else { busy = TRUE; } cmd = CMD_WRITE_STATUS; newStatus = val; currentClient = client; return performCommand(); } // performCommand() returns both error_t and status reg -- fortunately, error_t is 8bit error_t performCommand() { initPins(); resetDevice(); transmissionStart(); cmd &= 0x1F; // clear the first 3 address bits to 000 sendCommand(cmd); if ( waitForResponse() != SUCCESS ) { busy = FALSE; return FAIL; } switch(cmd) { case CMD_SOFT_RESET: call Timer.startOneShot( TIMEOUT_RESET ); break; case CMD_MEASURE_TEMPERATURE: enableInterrupt(); if ( status & SHT11_STATUS_LOW_RES_BIT ) { call Timer.startOneShot( TIMEOUT_12BIT ); } else { call Timer.startOneShot( TIMEOUT_14BIT ); } break; case CMD_MEASURE_HUMIDITY: enableInterrupt(); if ( status & SHT11_STATUS_LOW_RES_BIT ) { call Timer.startOneShot( TIMEOUT_8BIT ); } else { call Timer.startOneShot( TIMEOUT_12BIT ); } break; case CMD_READ_STATUS: { uint8_t tempStatus; uint8_t crc; tempStatus = readByte(); crc = readByte(); endTransmission(); status = tempStatus; // FIXME: need to check CRC! post signalStatusDone(); } case CMD_WRITE_STATUS: writeByte( newStatus ); if ( waitForResponse() != SUCCESS ) { writeFail = TRUE; } else { status = newStatus; } post signalStatusDone(); } // leave the device busy...we're waiting for an interrupt return SUCCESS; } void initPins() { call CLOCK.makeOutput(); call CLOCK.clr(); call DATA.makeInput(); call DATA.set(); call InterruptDATA.disable(); } void resetDevice() { uint8_t i; call DATA.makeOutput(); call DATA.set(); call CLOCK.clr(); for( i = 0; i < 9; i++ ) { call CLOCK.set(); call CLOCK.clr(); } } void transmissionStart() { call DATA.makeOutput(); call DATA.set(); call CLOCK.clr(); call CLOCK.set(); call DATA.clr(); call CLOCK.clr(); call CLOCK.set(); call DATA.set(); call CLOCK.clr(); } void sendCommand(uint8_t _cmd) { writeByte(_cmd); } void writeByte(uint8_t byte) { uint8_t i; for( i = 0; i < 8; i++ ) { if ( byte & 0x80 ) call DATA.set(); else call DATA.clr(); byte = byte << 1; call CLOCK.set(); call CLOCK.clr(); } } error_t waitForResponse() { call DATA.makeInput(); call DATA.set(); call CLOCK.set(); if (call DATA.get()) { // the device didn't pull the DATA line low // the command wasn't received or acknowledged return FAIL; } call CLOCK.clr(); return SUCCESS; } void enableInterrupt() { call DATA.makeInput(); call DATA.set(); call InterruptDATA.enableFallingEdge(); } event void Timer.fired() { switch(cmd) { case CMD_SOFT_RESET: // driver has waited long enough for device to reset busy = FALSE; signal SensirionSht11.resetDone[currentClient]( SUCCESS ); break; case CMD_MEASURE_TEMPERATURE: // timeout expired with no data interrupt busy = FALSE; signal SensirionSht11.measureTemperatureDone[currentClient]( FAIL, 0 ); break; case CMD_MEASURE_HUMIDITY: // timeout expired with no data interrupt busy = FALSE; signal SensirionSht11.measureHumidityDone[currentClient]( FAIL, 0 ); break; default: // we're in an unexpected state. what to do? break; } } async event void InterruptDATA.fired() { call InterruptDATA.disable(); post readSensor(); } task void readSensor() { uint16_t data = 0; uint8_t crc = 0; if ( busy == FALSE ) { // the interrupt was received after the timeout. // we've already signaled FAIL to the client, so just give up. return; } call Timer.stop(); data = readByte() << 8; data |= readByte(); crc = readByte(); endTransmission(); switch( cmd ) { case CMD_MEASURE_TEMPERATURE: busy = FALSE; signal SensirionSht11.measureTemperatureDone[currentClient]( SUCCESS, data ); break; case CMD_MEASURE_HUMIDITY: busy = FALSE; signal SensirionSht11.measureHumidityDone[currentClient]( SUCCESS, data ); break; default: break; // unknown command - shouldn't reach here } } uint8_t readByte() { uint8_t byte = 0; uint8_t i; for( i = 0; i < 8; i++ ) { call CLOCK.set(); if (call DATA.get()) byte |= 1; if (i != 7) byte = byte << 1; call CLOCK.clr(); } ack(); return byte; } void ack() { call DATA.makeOutput(); call DATA.clr(); call CLOCK.set(); call CLOCK.clr(); call DATA.makeInput(); call DATA.set(); } void endTransmission() { call DATA.makeOutput(); call DATA.set(); call CLOCK.set(); call CLOCK.clr(); } task void signalStatusDone() { bool _writeFail = writeFail; switch( cmd ) { case CMD_READ_STATUS: busy = FALSE; signal SensirionSht11.readStatusRegDone[currentClient]( SUCCESS, status ); break; case CMD_WRITE_STATUS: busy = FALSE; writeFail = FALSE; signal SensirionSht11.writeStatusRegDone[currentClient]( (_writeFail ? FAIL : SUCCESS) ); break; default: // shouldn't happen. break; } } default event void SensirionSht11.resetDone[uint8_t client]( error_t result ) { } default event void SensirionSht11.measureTemperatureDone[uint8_t client]( error_t result, uint16_t val ) { } default event void SensirionSht11.measureHumidityDone[uint8_t client]( error_t result, uint16_t val ) { } default event void SensirionSht11.readStatusRegDone[uint8_t client]( error_t result, uint8_t val ) { } default event void SensirionSht11.writeStatusRegDone[uint8_t client]( error_t result ) { } } tinyos-2.1.2+dfsg/tos/chips/sht11/SensirionSht11ReaderP.nc000066400000000000000000000103331207233610700232130ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * SensirionSht11ReaderP transforms the HAL-level SensirionSht11 * interface into a pair of SID Read interfaces, one for the * temperature sensor and one for the humidity sensor. It acquires the * underlying resource before executing each read, enabling * arbitrated access. * * @author Gilman Tolle * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $ */ #include generic module SensirionSht11ReaderP() { provides interface DeviceMetadata as TemperatureMetadata; provides interface Read as Temperature; provides interface DeviceMetadata as HumidityMetadata; provides interface Read as Humidity; uses interface Resource as TempResource; uses interface Resource as HumResource; uses interface SensirionSht11 as Sht11Temp; uses interface SensirionSht11 as Sht11Hum; } implementation { command uint8_t TemperatureMetadata.getSignificantBits() { return SHT11_TEMPERATURE_BITS; } command error_t Temperature.read() { call TempResource.request(); return SUCCESS; } event void TempResource.granted() { error_t result; if ((result = call Sht11Temp.measureTemperature()) != SUCCESS) { call TempResource.release(); signal Temperature.readDone( result, 0 ); } } event void Sht11Temp.measureTemperatureDone( error_t result, uint16_t val ) { call TempResource.release(); signal Temperature.readDone( result, val ); } command uint8_t HumidityMetadata.getSignificantBits() { return SHT11_HUMIDITY_BITS; } command error_t Humidity.read() { call HumResource.request(); return SUCCESS; } event void HumResource.granted() { error_t result; if ((result = call Sht11Hum.measureHumidity()) != SUCCESS) { call HumResource.release(); signal Humidity.readDone( result, 0 ); } } event void Sht11Hum.measureHumidityDone( error_t result, uint16_t val ) { call HumResource.release(); signal Humidity.readDone( result, val ); } event void Sht11Temp.resetDone( error_t result ) { } event void Sht11Temp.measureHumidityDone( error_t result, uint16_t val ) { } event void Sht11Temp.readStatusRegDone( error_t result, uint8_t val ) { } event void Sht11Temp.writeStatusRegDone( error_t result ) { } event void Sht11Hum.resetDone( error_t result ) { } event void Sht11Hum.measureTemperatureDone( error_t result, uint16_t val ) { } event void Sht11Hum.readStatusRegDone( error_t result, uint8_t val ) { } event void Sht11Hum.writeStatusRegDone( error_t result ) { } default event void Temperature.readDone( error_t result, uint16_t val ) { } default event void Humidity.readDone( error_t result, uint16_t val ) { } } tinyos-2.1.2+dfsg/tos/chips/sht21/000077500000000000000000000000001207233610700166355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/sht21/Sht21.h000066400000000000000000000036441207233610700177160ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ #ifndef SHT21_H #define SHT21_H enum { RESOLUTION_12_14BIT = 0x00, //humidity _ , temperature _ RESOLUTION_8_12BIT = 0x01, RESOLUTION_10_13BIT = 0x80, RESOLUTION_11_11BIT = 0x81, } Sht21Resolution; #define UQ_SHT21HUMI_RESOURCE "Sht21Humidity.ReadResource" #define UQ_SHT21TEMP_RESOURCE "Sht21Temperature.ReadResource" #endif tinyos-2.1.2+dfsg/tos/chips/sht21/Sht21ArbitratedC.nc000066400000000000000000000047311207233610700221720ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Sht21.h" configuration Sht21ArbitratedC { provides interface Read as ReadTemperature[uint8_t client]; provides interface Read as ReadHumidity[uint8_t client]; } implementation { components Sht21C; components new ArbitratedReadC(uint16_t) as ArbitratedTemp, new FcfsArbiterC(UQ_SHT21TEMP_RESOURCE) as TempArbiter, new ReadClientP(uint16_t) as TempClient; ReadTemperature=ArbitratedTemp.Read; ArbitratedTemp.Resource->TempArbiter; ArbitratedTemp.Service->TempClient; TempClient.ActualRead->Sht21C.Temperature; components new ArbitratedReadC(uint16_t) as ArbitratedHumi, new FcfsArbiterC(UQ_SHT21HUMI_RESOURCE) as HumiArbiter, new ReadClientP(uint16_t) as HumiClient; ReadHumidity=ArbitratedHumi.Read; ArbitratedHumi.Resource->HumiArbiter; ArbitratedHumi.Service->HumiClient; HumiClient.ActualRead->Sht21C.Humidity; }tinyos-2.1.2+dfsg/tos/chips/sht21/Sht21C.nc000066400000000000000000000040011207233610700201560ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo, Andras Biro */ configuration Sht21C { provides interface Read as Temperature; provides interface Read as Humidity; } implementation { components Sht21P, MainC, new TimerMilliC(); Temperature = Sht21P.Temperature; Humidity = Sht21P.Humidity; Sht21P.Timer -> TimerMilliC; Sht21P.Init <- MainC.SoftwareInit; components HplSht21C; Sht21P.I2CPacket -> HplSht21C; Sht21P.I2CResource -> HplSht21C; Sht21P.BusPowerManager->HplSht21C; } tinyos-2.1.2+dfsg/tos/chips/sht21/Sht21P.nc000066400000000000000000000151131207233610700202010ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo, Andras Biro */ #include "Sht21.h" module Sht21P { provides interface Read as Temperature; provides interface Read as Humidity; uses interface I2CPacket; uses interface Timer; uses interface Resource as I2CResource; uses interface BusPowerManager; provides interface Init; } implementation { enum { SHT21_TRIGGER_T_MEASUREMENT_HOLD_MASTER = 0xE3, SHT21_TRIGGER_RH_MEASUREMENT_HOLD_MASTER = 0xE5, SHT21_TRIGGER_T_MEASUREMENT_NO_HOLD_MASTER = 0xF3, SHT21_TRIGGER_RH_MEASUREMENT_NO_HOLD_MASTER = 0xF5, SHT21_WRITE_USER_REGISTER = 0xE6, SHT21_READ_USER_REGISTER = 0xE7, SHT21_SOFT_RESET = 0xFE, } Sht21Command; enum { SHT21_HEATER_ON = 0x04, SHT21_HEATER_OFF = 0x00, } Sht21Heater; enum { SHT21_I2C_ADDRESS = 64, } Sht21Header; enum { SHT21_TIMEOUT_14BIT = 85, SHT21_TIMEOUT_13BIT = 43, SHT21_TIMEOUT_12BIT = 22, SHT21_TIMEOUT_11BIT = 11, SHT21_TIMEOUT_10BIT = 6, SHT21_TIMEOUT_8BIT = 3, SHT21_TIMEOUT_RESET = 15, } Sht21Timeout; uint8_t i2cBuffer[2]; norace error_t lastError; enum { S_OFF = 0, S_IDLE, S_READ_TEMP_CMD, S_READ_TEMP, S_READ_HUMIDITY_CMD, S_READ_HUMIDITY, }; uint8_t state = S_OFF; bool otherSensorRequested=FALSE; command error_t Init.init(){ call BusPowerManager.configure(SHT21_TIMEOUT_RESET,SHT21_TIMEOUT_RESET); return SUCCESS; } command error_t Temperature.read() { uint8_t prevState=state; if(!otherSensorRequested && (state==S_READ_HUMIDITY || state==S_READ_HUMIDITY_CMD)){ otherSensorRequested=TRUE; return SUCCESS; } else if(state==S_READ_TEMP || state==S_READ_TEMP_CMD) return EBUSY; state=S_READ_TEMP_CMD; call BusPowerManager.requestPower(); if(prevState==S_IDLE) call I2CResource.request(); return SUCCESS; } command error_t Humidity.read() { uint8_t prevState=state; if(!otherSensorRequested && (state==S_READ_TEMP || state==S_READ_TEMP_CMD)){ otherSensorRequested=TRUE; return SUCCESS; } else if(state==S_READ_HUMIDITY || state==S_READ_HUMIDITY_CMD) return EBUSY; state = S_READ_HUMIDITY_CMD; call BusPowerManager.requestPower(); if(prevState==S_IDLE) call I2CResource.request(); return SUCCESS; } event void BusPowerManager.powerOn(){ if(state==S_OFF) state=S_IDLE; else call I2CResource.request(); } event void BusPowerManager.powerOff(){ state=S_OFF; } inline error_t sendCommand(){ switch(state){ case S_READ_TEMP: case S_READ_HUMIDITY: return call I2CPacket.read(I2C_START | I2C_STOP, SHT21_I2C_ADDRESS, 2, i2cBuffer); break; case S_READ_TEMP_CMD: i2cBuffer[0]=SHT21_TRIGGER_T_MEASUREMENT_NO_HOLD_MASTER; break; case S_READ_HUMIDITY_CMD: i2cBuffer[0]=SHT21_TRIGGER_RH_MEASUREMENT_NO_HOLD_MASTER; break; } return call I2CPacket.write(I2C_START, SHT21_I2C_ADDRESS, 1, i2cBuffer); } task void signalReadDone() { uint16_t result=(i2cBuffer[0]<<8)+(i2cBuffer[1]&0xfc); uint8_t signalState=state; //restore state, *Requested variables, release bus if(otherSensorRequested){ if(state==S_READ_HUMIDITY) state = S_READ_TEMP; else state = S_READ_HUMIDITY; otherSensorRequested=FALSE; } else { state=S_IDLE; call I2CResource.release(); call BusPowerManager.releasePower(); } //signaling if(signalState == S_READ_TEMP) { signal Temperature.readDone(lastError, result); } if(signalState == S_READ_HUMIDITY){ signal Humidity.readDone(lastError, result); } //run *Requested operations if(state==S_READ_HUMIDITY||state==S_READ_TEMP){ lastError = sendCommand(); if(lastError != SUCCESS) post signalReadDone(); } } event void I2CResource.granted() { lastError = sendCommand(); if(lastError != SUCCESS){ post signalReadDone(); } } task void startTimer(){ switch(state){ case S_READ_TEMP_CMD: state=S_READ_TEMP; call Timer.startOneShot(SHT21_TIMEOUT_14BIT); break; case S_READ_HUMIDITY_CMD: state=S_READ_HUMIDITY; call Timer.startOneShot(SHT21_TIMEOUT_12BIT); break; } } async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { call I2CResource.release(); if(error==SUCCESS){ post startTimer(); } else { lastError=error; post signalReadDone(); } } event void Timer.fired() { call I2CResource.request(); } async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) { lastError=error; post signalReadDone(); } default event void Temperature.readDone(error_t error, uint16_t val) {} default event void Humidity.readDone(error_t error, uint16_t val) {} } tinyos-2.1.2+dfsg/tos/chips/sht21/Sht21RawHumidityC.nc000066400000000000000000000034021207233610700223510ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Sht21.h" generic configuration Sht21RawHumidityC() { provides interface Read; } implementation { components Sht21ArbitratedC; Read=Sht21ArbitratedC.ReadHumidity[unique(UQ_SHT21HUMI_RESOURCE)]; }tinyos-2.1.2+dfsg/tos/chips/sht21/Sht21RawTemperatureC.nc000066400000000000000000000034111207233610700230520ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * - Neither the name of University of Szeged nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Andras Biro */ #include "Sht21.h" generic configuration Sht21RawTemperatureC() { provides interface Read; } implementation { components Sht21ArbitratedC; Read=Sht21ArbitratedC.ReadTemperature[unique(UQ_SHT21TEMP_RESOURCE)]; }tinyos-2.1.2+dfsg/tos/chips/stm25p/000077500000000000000000000000001207233610700170265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/stm25p/BlockStorageC.nc000066400000000000000000000050051207233610700220320ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the block storage abstraction from TEP103 for the * ST M25P serial code flash. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ #include "Stm25p.h" generic configuration BlockStorageC( volume_id_t volume_id ) { provides interface BlockRead; provides interface BlockWrite; provides interface StorageMap; } implementation { enum { BLOCK_ID = unique( "Stm25p.Block" ), VOLUME_ID = unique( "Stm25p.Volume" ), }; components Stm25pBlockP as BlockP; BlockRead = BlockP.Read[ BLOCK_ID ]; BlockWrite = BlockP.Write[ BLOCK_ID ]; StorageMap = BlockP.StorageMap[ BLOCK_ID ]; components Stm25pSectorC as SectorC; BlockP.ClientResource[ BLOCK_ID ] -> SectorC.ClientResource[ VOLUME_ID ]; BlockP.Sector[ BLOCK_ID ] -> SectorC.Sector[ VOLUME_ID ]; components new Stm25pBinderP( volume_id ) as BinderP; BinderP.Volume -> SectorC.Volume[ VOLUME_ID ]; } tinyos-2.1.2+dfsg/tos/chips/stm25p/ConfigStorageC.nc000066400000000000000000000047221207233610700222120ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the config storage abstraction from TEP103 for * the ST M25P serial code flash. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ #include generic configuration ConfigStorageC( volume_id_t volume_id ) { provides interface Mount; provides interface ConfigStorage; } implementation { enum { CONFIG_ID = unique( "Stm25p.Config" ), VOLUME_ID = unique( "Stm25p.Volume" ), }; components Stm25pConfigP as ConfigP; Mount = ConfigP.Mount[ CONFIG_ID ]; ConfigStorage = ConfigP.Config[ CONFIG_ID ]; components Stm25pSectorC as SectorC; ConfigP.ClientResource[ CONFIG_ID ] -> SectorC.ClientResource[ VOLUME_ID ]; ConfigP.Sector[ CONFIG_ID ] -> SectorC.Sector[ VOLUME_ID ]; components new Stm25pBinderP( volume_id ) as BinderP; BinderP.Volume -> SectorC.Volume[ VOLUME_ID ]; } tinyos-2.1.2+dfsg/tos/chips/stm25p/LogStorageC.nc000066400000000000000000000053671207233610700215340ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the log storage abstraction from TEP103 for the * ST M25P serial code flash. This is a record-based implementation, * meaning all successful appendeds will survive crash-style * failure. Note that appends are limited to a maximum of 254 bytes at * a time. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ #include generic configuration LogStorageC( volume_id_t volume_id, bool circular ) { provides interface LogRead; provides interface LogWrite; } implementation { enum { LOG_ID = unique( "Stm25p.Log" ), VOLUME_ID = unique( "Stm25p.Volume" ), }; components Stm25pLogP as LogP; LogRead = LogP.Read[ LOG_ID ]; LogWrite = LogP.Write[ LOG_ID ]; components Stm25pSectorC as SectorC; LogP.ClientResource[ LOG_ID ] -> SectorC.ClientResource[ VOLUME_ID ]; LogP.Sector[ LOG_ID ] -> SectorC.Sector[ VOLUME_ID ]; components new Stm25pBinderP( volume_id ) as BinderP; BinderP.Volume -> SectorC.Volume[ VOLUME_ID ]; components new Stm25pLogConfigP( circular ) as ConfigP; LogP.Circular[ LOG_ID ] -> ConfigP; components MainC; MainC.SoftwareInit -> LogP; } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25p.h000066400000000000000000000043251207233610700202750ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ #ifndef __STM25P_H__ #define __STM25P_H__ #include "Storage.h" typedef storage_addr_t stm25p_addr_t; typedef storage_len_t stm25p_len_t; enum { STM25P_NUM_SECTORS = 16, STM25P_SECTOR_SIZE_LOG2 = 16, STM25P_SECTOR_SIZE = 1L << STM25P_SECTOR_SIZE_LOG2, STM25P_SECTOR_MASK = 0xffff, STM25P_PAGE_SIZE_LOG2 = 8, STM25P_PAGE_SIZE = 1 << STM25P_PAGE_SIZE_LOG2, STM25P_PAGE_MASK = STM25P_PAGE_SIZE - 1, STM25P_INVALID_ADDRESS = 0xffffffff, }; typedef struct stm25p_volume_info_t { uint8_t base; uint8_t size; } stm25p_volume_info_t; #endif tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pBinderP.nc000066400000000000000000000035561207233610700217170ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ generic module Stm25pBinderP( volume_id_t volume ) { uses interface Stm25pVolume as Volume; } implementation { async event volume_id_t Volume.getVolumeId() { return volume; } } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pBlockP.nc000066400000000000000000000172221207233610700215410ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ module Stm25pBlockP { provides interface BlockRead as Read[ uint8_t id ]; provides interface BlockWrite as Write[ uint8_t id ]; provides interface StorageMap[ uint8_t id ]; uses interface Stm25pSector as Sector[ uint8_t id ]; uses interface Resource as ClientResource[ uint8_t id ]; uses interface Leds; } implementation { enum { NUM_BLOCKS = uniqueCount( "Stm25p.Block" ), }; typedef enum { S_IDLE, S_READ, S_CRC, S_WRITE, S_SYNC, S_ERASE, } stm25p_block_req_t; typedef struct stm25p_block_state_t { storage_addr_t addr; void* buf; storage_len_t len; stm25p_block_req_t req; } stm25p_block_state_t; stm25p_block_state_t m_block_state[ NUM_BLOCKS ]; stm25p_block_state_t m_req; error_t newRequest( uint8_t client ); void signalDone( uint8_t id, uint16_t crc, error_t error ); command storage_addr_t StorageMap.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return call Sector.getPhysicalAddress[ id ]( addr ); } command storage_len_t Read.getSize[ uint8_t id ]() { return ( (storage_len_t)call Sector.getNumSectors[ id ]() << STM25P_SECTOR_SIZE_LOG2 ); } command error_t Read.read[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len ) { m_req.req = S_READ; m_req.addr = addr; m_req.buf = buf; m_req.len = len; return newRequest( id ); } command error_t Read.computeCrc[ uint8_t id ]( storage_addr_t addr, storage_len_t len, uint16_t crc ) { m_req.req = S_CRC; m_req.addr = addr; m_req.buf = (void*)crc; m_req.len = len; return newRequest( id ); } command error_t Write.write[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len ) { m_req.req = S_WRITE; m_req.addr = addr; m_req.buf = buf; m_req.len = len; return newRequest( id ); } command error_t Write.sync[ uint8_t id ]() { m_req.req = S_SYNC; return newRequest( id ); } command error_t Write.erase[ uint8_t id ]() { m_req.req = S_ERASE; return newRequest( id ); } error_t newRequest( uint8_t client ) { if ( m_block_state[ client ].req != S_IDLE ) return FAIL; call ClientResource.request[ client ](); m_block_state[ client ] = m_req; return SUCCESS; } event void ClientResource.granted[ uint8_t id ]() { switch( m_block_state[ id ].req ) { case S_READ: call Sector.read[ id ]( m_block_state[ id ].addr, m_block_state[ id ].buf, m_block_state[ id ].len ); break; case S_CRC: call Sector.computeCrc[ id ]( (uint16_t)m_block_state[ id ].buf, m_block_state[ id ].addr, m_block_state[ id ].len ); break; case S_WRITE: call Sector.write[ id ]( m_block_state[ id ].addr, m_block_state[ id ].buf, m_block_state[ id ].len ); break; case S_ERASE: call Sector.erase[ id ]( 0, call Sector.getNumSectors[ id ]() ); break; case S_SYNC: signalDone( id, 0, SUCCESS ); break; case S_IDLE: break; } } event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) { signalDone( id, 0, error ); } event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ){ signalDone( id, 0, error ); } event void Sector.eraseDone[ uint8_t id ]( uint8_t sector, uint8_t num_sectors, error_t error ) { signalDone( id, 0, error ); } event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ) { signalDone( id, crc, error ); } void signalDone( uint8_t id, uint16_t crc, error_t error ) { stm25p_block_req_t req = m_block_state[ id ].req; call ClientResource.release[ id ](); m_block_state[ id ].req = S_IDLE; switch( req ) { case S_READ: signal Read.readDone[ id ]( m_block_state[ id ].addr, m_block_state[ id ].buf, m_block_state[ id ].len, error ); break; case S_CRC: signal Read.computeCrcDone[ id ]( m_block_state[ id ].addr, m_block_state[ id ].len, crc, error ); break; case S_WRITE: signal Write.writeDone[ id ]( m_block_state[ id ].addr, m_block_state[ id ].buf, m_block_state[ id ].len, error ); break; case S_SYNC: signal Write.syncDone[ id ]( error ); break; case S_ERASE: signal Write.eraseDone[ id ]( error ); break; case S_IDLE: break; } } default event void Read.readDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {} default event void Read.computeCrcDone[ uint8_t id ]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error ) {} default event void Write.writeDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {} default event void Write.eraseDone[ uint8_t id ]( error_t error ) {} default event void Write.syncDone[ uint8_t id ]( error_t error ) {} default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; } default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; } default command error_t Sector.read[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { return FAIL; } default command error_t Sector.write[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { return FAIL; } default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; } default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; } default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; } default async command error_t ClientResource.release[ uint8_t id ]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pConfigP.nc000066400000000000000000000325111207233610700217120ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ #include module Stm25pConfigP { provides interface Mount[ uint8_t client ]; provides interface ConfigStorage as Config[ uint8_t client ]; uses interface Stm25pSector as Sector[ uint8_t client ]; uses interface Resource as ClientResource[ uint8_t client ]; uses interface Leds; } implementation { enum { NUM_CLIENTS = uniqueCount( "Stm25p.Config" ), CONFIG_SIZE = 2048, CHUNK_SIZE_LOG2 = 8, CHUNK_SIZE = 1 << CHUNK_SIZE_LOG2, NUM_CHUNKS = CONFIG_SIZE / CHUNK_SIZE, BUF_SIZE = 16, INVALID_VERSION = -1, }; enum { S_IDLE, S_MOUNT, S_READ, S_WRITE, S_COMMIT, }; typedef struct { uint16_t addr; void* buf; uint16_t len; uint8_t req; } config_state_t; config_state_t m_config_state[ NUM_CLIENTS ]; config_state_t m_req; typedef struct { uint16_t chunk_addr[ NUM_CHUNKS ]; uint16_t write_addr; int16_t version; uint8_t cur_sector; bool valid : 1; } config_info_t; config_info_t m_config_info[ NUM_CLIENTS ]; typedef struct { int32_t version; uint16_t crc; } config_metadata_t; config_metadata_t m_metadata[ 2 ]; uint8_t m_buf[ BUF_SIZE ]; uint16_t m_chunk; uint16_t m_offset; enum { S_COPY_BEFORE, S_COPY_AFTER, }; uint8_t m_meta_state; error_t newRequest( uint8_t client ); void continueMount( uint8_t id ); void continueWrite( uint8_t id ); void continueCommit( uint8_t id ); void signalDone( uint8_t id, error_t error ); command error_t Mount.mount[ uint8_t client ]() { if ( call Sector.getNumSectors[ client ]() != 2 ) return ESIZE; m_req.req = S_MOUNT; return newRequest( client ); } command error_t Config.read[ uint8_t client ]( storage_addr_t addr, void* buf, storage_len_t len ) { if ( !m_config_info[ client ].valid ) return FAIL; m_req.req = S_READ; m_req.addr = addr; m_req.buf = buf; m_req.len = len; return newRequest( client ); } command error_t Config.write[ uint8_t client ]( storage_addr_t addr, void* buf, storage_len_t len ) { m_req.req = S_WRITE; m_req.addr = addr; m_req.buf = buf; m_req.len = len; return newRequest( client ); } command error_t Config.commit[ uint8_t client ]() { m_req.req = S_COMMIT; return newRequest( client ); } command storage_len_t Config.getSize[ uint8_t client ]() { return CONFIG_SIZE; } command bool Config.valid[ uint8_t client ]() { return m_config_info[ client ].valid; } error_t newRequest( uint8_t client ) { if ( m_config_state[ client ].req != S_IDLE ) return EBUSY; call ClientResource.request[ client ](); m_config_state[ client ] = m_req; return SUCCESS; } stm25p_addr_t calcAddr( uint8_t id, uint16_t addr, bool current ) { stm25p_addr_t result = addr; if ( !(current ^ m_config_info[ id ].cur_sector) ) result += STM25P_SECTOR_SIZE; return result; } event void ClientResource.granted[ uint8_t id ]() { m_chunk = 0; m_offset = 0; switch( m_config_state[ id ].req ) { case S_IDLE: break; case S_MOUNT: continueMount( id ); break; case S_READ: call Sector.read[ id ]( calcAddr( id, m_config_state[ id ].addr, TRUE ), m_config_state[ id ].buf, m_config_state[ id ].len ); break; case S_WRITE: m_meta_state = S_COPY_BEFORE; m_chunk = m_config_state[ id ].addr >> CHUNK_SIZE_LOG2; continueWrite( id ); break; case S_COMMIT: continueCommit( id ); break; } } void continueMount( uint8_t id ) { uint32_t addr = 0; uint8_t cur_sector = 0; int i; switch( m_chunk ) { case 1: addr = STM25P_SECTOR_SIZE; // fall through case 0: addr += STM25P_SECTOR_SIZE - sizeof( config_metadata_t ); call Sector.read[ id ]( addr, (uint8_t*)&m_metadata[ m_chunk ], sizeof( config_metadata_t ) ); break; case 3: addr = STM25P_SECTOR_SIZE; // fall through case 2: call Sector.computeCrc[ id ]( 0, addr, CONFIG_SIZE ); break; case 4: if ( m_metadata[ 0 ].version != INVALID_VERSION || m_metadata[ 1 ].version != INVALID_VERSION ) { m_config_info[ id ].valid = TRUE; if ( m_metadata[ 0 ].version == INVALID_VERSION ) cur_sector = 1; else if ( m_metadata[ 1 ].version == INVALID_VERSION ) cur_sector = 0; else cur_sector = (( m_metadata[1].version - m_metadata[0].version ) > 0); } m_config_info[ id ].cur_sector = cur_sector; m_config_info[ id ].version = m_metadata[ cur_sector ].version; call Sector.erase[ id ]( !cur_sector, 1 ); break; case 5: // initialize chunk addrs for ( i = 0; i < NUM_CHUNKS; i++ ) m_config_info[ id ].chunk_addr[ i ] = i << CHUNK_SIZE_LOG2; m_config_info[ id ].write_addr = CONFIG_SIZE; signalDone( id, SUCCESS ); break; } m_chunk++; } event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) { switch ( m_config_state[ id ].req ) { case S_IDLE: break; case S_MOUNT: continueMount( id ); break; case S_READ: signalDone( id, error ); break; case S_WRITE: addr = calcAddr( id, m_config_info[ id ].write_addr, FALSE ); call Sector.write[ id ]( addr, buf, len ); break; case S_COMMIT: addr = ((uint16_t)m_chunk << CHUNK_SIZE_LOG2) + m_offset; addr = calcAddr( id, addr, FALSE ); call Sector.write[ id ]( addr, buf, len ); break; } } void continueWrite( uint8_t id ) { config_state_t* state = &m_config_state[ id ]; config_info_t* info = &m_config_info[ id ]; uint8_t chunk = m_chunk + (m_offset / CHUNK_SIZE); uint8_t offset = m_offset & 0xff; uint32_t addr; uint16_t len; // compute addr for copy addr = info->chunk_addr[ chunk ] + offset; addr = calcAddr( id, addr, info->chunk_addr[ chunk ] < CONFIG_SIZE ); switch( m_meta_state ) { case S_COPY_BEFORE: // copy old data before if ( offset < (uint8_t)state->addr ) { len = (uint8_t)state->addr - offset; if ( len > sizeof( m_buf ) ) len = sizeof( m_buf ); call Sector.read[ id ]( addr, m_buf, len ); } // write new data else if ( offset == (uint8_t)state->addr ) { addr = calcAddr( id, info->write_addr, FALSE ); len = state->len; call Sector.write[ id ]( addr, state->buf, len ); m_meta_state = S_COPY_AFTER; } break; case S_COPY_AFTER: // copy old data after if ( offset != 0 ) { len = CHUNK_SIZE - offset; if ( len > sizeof( m_buf ) ) len = sizeof( m_buf ); call Sector.read[ id ]( addr, m_buf, len ); } // all done, update chunk addrs else { info->write_addr -= m_offset; for ( chunk = 0; chunk < m_offset / CHUNK_SIZE; chunk++ ) { info->chunk_addr[ m_chunk+chunk ] = info->write_addr; info->write_addr += CHUNK_SIZE; } signalDone( id, SUCCESS ); } break; } } event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ){ switch( m_config_state[ id ].req ) { case S_WRITE: m_config_info[ id ].write_addr += len; m_offset += len; continueWrite( id ); break; case S_COMMIT: m_offset += len; continueCommit( id ); break; } } event void Sector.eraseDone[ uint8_t id ]( uint8_t sector, uint8_t num_sectors, error_t error ) { if ( m_config_state[ id ].req == S_MOUNT ) continueMount( id ); else continueCommit( id ); } void continueCommit( uint8_t id ) { config_info_t* info = &m_config_info[ id ]; uint32_t addr; uint16_t len; int i; // check if time to copy next chunk if ( m_offset >= CHUNK_SIZE ) { m_chunk++; m_offset = 0; } // copy data if ( m_chunk < NUM_CHUNKS ) { // compute addr for copy addr = info->chunk_addr[ m_chunk ] + m_offset; addr = calcAddr( id, addr, info->chunk_addr[ m_chunk ] < CONFIG_SIZE ); len = sizeof( m_buf ); call Sector.read[ id ]( addr, m_buf, len ); } // compute crc else if ( m_chunk == NUM_CHUNKS ) { addr = calcAddr( 0, 0, FALSE ); call Sector.computeCrc[ id ]( 0, addr, CONFIG_SIZE ); m_chunk++; } // swap and erase other sector else if ( m_chunk == NUM_CHUNKS + 1 ) { info->cur_sector ^= 1; info->write_addr = CONFIG_SIZE; // initialize chunks for ( i = 0; i < NUM_CHUNKS; i++ ) info->chunk_addr[ i ] = (uint16_t)i << CHUNK_SIZE_LOG2; call Sector.erase[ id ]( !info->cur_sector, 1 ); m_chunk++; } // signal done else { m_config_info[ id ].valid = TRUE; signalDone( id, SUCCESS ); } } event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ) { // mount if ( m_config_state[ id ].req == S_MOUNT ) { uint8_t chunk = addr >> STM25P_SECTOR_SIZE_LOG2; if ( m_metadata[ chunk ].crc != crc ) m_metadata[ chunk ].version = INVALID_VERSION; continueMount( id ); } // commit else { bool cur_sector = m_config_info[ id ].cur_sector; m_config_info[ id ].version++; m_metadata[ !cur_sector ].version = m_config_info[ id ].version; m_metadata[ !cur_sector ].crc = crc; addr += STM25P_SECTOR_SIZE - sizeof( config_metadata_t ); call Sector.write[ id ]( addr, (uint8_t*)&m_metadata[ !cur_sector ], sizeof( config_metadata_t ) ); } } void signalDone( uint8_t id, error_t error ) { uint8_t req = m_config_state[ id ].req; call ClientResource.release[ id ](); m_config_state[ id ].req = S_IDLE; switch( req ) { case S_MOUNT: signal Mount.mountDone[ id ]( error ); break; case S_READ: signal Config.readDone[ id ]( m_config_state[ id ].addr, m_config_state[ id ].buf, m_config_state[ id ].len, error ); break; case S_WRITE: signal Config.writeDone[ id ]( m_config_state[ id ].addr, m_config_state[ id ].buf, m_config_state[ id ].len, error ); break; case S_COMMIT: signal Config.commitDone[ id ]( error ); break; } } default event void Mount.mountDone[ uint8_t id ]( error_t error ) {} default event void Config.readDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {} default event void Config.writeDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {} default event void Config.commitDone[ uint8_t id ]( error_t error ) {} default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; } default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; } default command error_t Sector.read[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; } default command error_t Sector.write[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; } default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; } default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; } default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; } default async command error_t ClientResource.release[ uint8_t id ]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pLogConfigP.nc000066400000000000000000000035471207233610700223630ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $ */ generic module Stm25pLogConfigP( bool IS_CIRCULAR ) { provides interface Get as Circular; } implementation { command bool Circular.get() { return IS_CIRCULAR; } } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pLogP.nc000066400000000000000000000375341207233610700212400ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.9 $ $Date: 2009-12-23 02:28:47 $ */ #include module Stm25pLogP { provides interface Init; provides interface LogRead as Read[ uint8_t id ]; provides interface LogWrite as Write[ uint8_t id ]; uses interface Stm25pSector as Sector[ uint8_t id ]; uses interface Resource as ClientResource[ uint8_t id ]; uses interface Get as Circular[ uint8_t id ]; uses interface Leds; } implementation { enum { NUM_LOGS = uniqueCount( "Stm25p.Log" ), BLOCK_SIZE = 4096, BLOCK_SIZE_LOG2 = 12, BLOCK_MASK = BLOCK_SIZE - 1, BLOCKS_PER_SECTOR = STM25P_SECTOR_SIZE / BLOCK_SIZE, MAX_RECORD_SIZE = 254, INVALID_HEADER = 0xff, }; typedef enum { S_IDLE, S_READ, S_SEEK, S_ERASE, S_APPEND, S_SYNC, } stm25p_log_req_t; typedef struct stm25p_log_state_t { storage_cookie_t cookie; void* buf; uint8_t len; stm25p_log_req_t req; } stm25p_log_state_t; typedef struct stm25p_log_info_t { stm25p_addr_t read_addr; stm25p_addr_t remaining; stm25p_addr_t write_addr; } stm25p_log_info_t; stm25p_log_state_t m_log_state[ NUM_LOGS ]; stm25p_log_state_t m_req; stm25p_log_info_t m_log_info[ NUM_LOGS ]; stm25p_addr_t m_addr; bool m_records_lost; uint8_t m_header; uint8_t m_len; typedef enum { S_SEARCH_BLOCKS, S_SEARCH_RECORDS, S_SEARCH_SEEK, S_HEADER, S_DATA, } stm25p_log_rw_state_t; stm25p_log_rw_state_t m_rw_state; error_t newRequest( uint8_t client ); void continueReadOp( uint8_t client ); void continueAppendOp( uint8_t client ); void signalDone( uint8_t id, error_t error ); command error_t Init.init() { int i; for ( i = 0; i < NUM_LOGS; i++ ) { m_log_info[ i ].read_addr = STM25P_INVALID_ADDRESS; m_log_info[ i ].write_addr = 0; } return SUCCESS; } command error_t Read.read[ uint8_t id ]( void* buf, storage_len_t len ) { m_req.req = S_READ; m_req.buf = buf; m_req.len = len; m_len = len; return newRequest( id ); } command error_t Read.seek[ uint8_t id ]( storage_addr_t cookie ) { if ( cookie > m_log_info[ id ].write_addr ) return FAIL; m_req.req = S_SEEK; m_req.cookie = cookie; return newRequest( id ); } command storage_cookie_t Read.currentOffset[ uint8_t id ]() { return m_log_info[ id ].read_addr; } command storage_cookie_t Read.getSize[ uint8_t id ]() { return ( (storage_len_t)call Sector.getNumSectors[ id ]() << STM25P_SECTOR_SIZE_LOG2 ); } command storage_cookie_t Write.currentOffset[ uint8_t id ]() { return m_log_info[ id ].write_addr; } command error_t Write.erase[ uint8_t id ]() { m_req.req = S_ERASE; return newRequest( id ); } command error_t Write.append[ uint8_t id ]( void* buf, storage_len_t len ) { uint16_t bytes_left = (uint16_t)m_log_info[ id ].write_addr % BLOCK_SIZE; bytes_left = BLOCK_SIZE - bytes_left; // don't allow appends larger than maximum record size if ( len > MAX_RECORD_SIZE ) return EINVAL; // move to next block if current block doesn't have enough space if ( sizeof( m_header ) + len > bytes_left ) m_log_info[ id ].write_addr += bytes_left; // if log is not circular, make sure it doesn't grow too large if ( !call Circular.get[ id ]() && ( (uint8_t)(m_log_info[ id ].write_addr >> STM25P_SECTOR_SIZE_LOG2) >= call Sector.getNumSectors[ id ]() ) ) return ESIZE; m_records_lost = FALSE; m_req.req = S_APPEND; m_req.buf = buf; m_req.len = len; return newRequest( id ); } command error_t Write.sync[ uint8_t id ]() { m_req.req = S_SYNC; return newRequest( id ); } error_t newRequest( uint8_t client ) { if ( m_log_state[ client ].req != S_IDLE ) return FAIL; call ClientResource.request[ client ](); m_log_state[ client ] = m_req; return SUCCESS; } uint8_t calcSector( uint8_t client, stm25p_addr_t addr ) { uint8_t sector = call Sector.getNumSectors[ client ](); return (uint8_t)(( addr >> STM25P_SECTOR_SIZE_LOG2 ) % sector); } stm25p_addr_t calcAddr( uint8_t client, stm25p_addr_t addr ) { stm25p_addr_t result = calcSector( client, addr ); result <<= STM25P_SECTOR_SIZE_LOG2; result |= addr & STM25P_SECTOR_MASK; return result; } event void ClientResource.granted[ uint8_t id ]() { // log never used, need to find start and end of log if ( m_log_info[ id ].read_addr == STM25P_INVALID_ADDRESS && m_log_state[ id ].req != S_ERASE ) { m_rw_state = S_SEARCH_BLOCKS; call Sector.read[ id ]( 0, (uint8_t*)&m_addr, sizeof( m_addr ) ); } // start and end of log known, do the requested operation else { switch( m_log_state[ id ].req ) { case S_READ: m_rw_state = (m_log_info[ id ].remaining) ? S_DATA : S_HEADER; continueReadOp( id ); break; case S_SEEK: { // make sure the cookie is still within the range of valid data uint8_t numSectors = call Sector.getNumSectors[ id ](); uint8_t readSector = (m_log_state[ id ].cookie >> STM25P_SECTOR_SIZE_LOG2); uint8_t writeSector = ((m_log_info[ id ].write_addr-1)>>STM25P_SECTOR_SIZE_LOG2)+1; // if cookie is overwritten, advance to beginning of log if ( (writeSector - readSector) > numSectors ) { m_log_state[ id ].cookie = (storage_cookie_t)(writeSector-numSectors) <= m_log_info[ client ].write_addr ) { signalDone( client, SUCCESS ); return; } buf = &m_header; len = sizeof( m_header ); if ( m_rw_state == S_DATA ) { // if header is invalid, move to next block if ( m_header == INVALID_HEADER ) { m_rw_state = S_HEADER; read_addr += BLOCK_SIZE; read_addr &= ~BLOCK_MASK; } else { buf = m_log_state[ client ].buf + m_log_state[ client ].len - m_len; // truncate if record is shorter than requested length if ( m_log_info[ client ].remaining < m_len ) len = m_log_info[ client ].remaining; else len = m_len; } } // if on block boundary if ( !((uint16_t)read_addr & BLOCK_MASK ) ) read_addr += sizeof( m_addr ); m_log_info[ client ].read_addr = read_addr; call Sector.read[ client ]( calcAddr( client, read_addr ), buf, len ); } event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) { stm25p_log_info_t* log_info = &m_log_info[ id ]; // searching for the first and last log blocks switch( m_rw_state ) { case S_SEARCH_BLOCKS: { uint16_t block = addr >> BLOCK_SIZE_LOG2; // record potential starting and ending addresses if ( m_addr != STM25P_INVALID_ADDRESS ) { if ( m_addr < log_info->read_addr ) log_info->read_addr = m_addr; if ( m_addr > log_info->write_addr ) log_info->write_addr = m_addr; } // move on to next log block if (++block < (call Sector.getNumSectors[ id ]()*BLOCKS_PER_SECTOR)) { addr += BLOCK_SIZE; call Sector.read[ id ]( addr, (uint8_t*)&m_addr, sizeof( m_addr ) ); } // if log is empty, continue operation else if ( log_info->read_addr == STM25P_INVALID_ADDRESS ) { log_info->read_addr = 0; log_info->write_addr = 0; signal ClientResource.granted[ id ](); } // search for last record else { log_info->write_addr += sizeof( m_addr ); m_rw_state = S_SEARCH_RECORDS; call Sector.read[ id ]( calcAddr(id, log_info->write_addr), &m_header, sizeof( m_header ) ); } } break; case S_SEARCH_RECORDS: { // searching for the last log record to write uint16_t cur_block = log_info->write_addr >> BLOCK_SIZE_LOG2; uint16_t new_block = ( log_info->write_addr + sizeof( m_header ) + m_header ) >> BLOCK_SIZE_LOG2; // if header is valid and is on same block, move to next record if ( m_header != INVALID_HEADER && cur_block == new_block ) { log_info->write_addr += sizeof( m_header ) + m_header; call Sector.read[ id ]( calcAddr( id, log_info->write_addr ), &m_header, sizeof( m_header ) ); } // found last record else { signal ClientResource.granted[ id ](); } } break; case S_SEARCH_SEEK: { // searching for last log record to read log_info->read_addr += sizeof( m_header ) + m_header; // if not yet at cookie, keep searching if ( log_info->read_addr < m_log_state[ id ].cookie ) { call Sector.read[ id ]( calcAddr(id, log_info->read_addr), &m_header, sizeof( m_header ) ); } // at or passed cookie, stop else { log_info->remaining = log_info->read_addr - m_log_state[ id ].cookie; log_info->read_addr = m_log_state[ id ].cookie; signalDone( id, error ); } } break; case S_HEADER: { // if header is invalid, move to next block if ( m_header == INVALID_HEADER ) { log_info->read_addr += BLOCK_SIZE; log_info->read_addr &= ~BLOCK_MASK; } else { log_info->read_addr += sizeof( m_header ); log_info->remaining = m_header; m_rw_state = S_DATA; } continueReadOp( id ); } break; case S_DATA: { log_info->read_addr += len; log_info->remaining -= len; m_len -= len; m_rw_state = S_HEADER; continueReadOp( id ); break; } } } void continueAppendOp( uint8_t client ) { stm25p_addr_t write_addr = m_log_info[ client ].write_addr; void* buf; uint8_t len; if ( !(uint16_t)write_addr ) { m_records_lost = TRUE; call Sector.erase[ client ]( calcSector( client, write_addr ), 1 ); } else { if ( !((uint16_t)write_addr & BLOCK_MASK) ) { buf = &m_log_info[ client ].write_addr; len = sizeof( m_addr ); } else if ( m_rw_state == S_HEADER ) { buf = &m_log_state[ client ].len; len = sizeof( m_log_state[ client ].len ); } else { buf = m_log_state[ client ].buf; len = m_log_state[ client ].len; } call Sector.write[ client ]( calcAddr( client, write_addr ), buf, len ); } } event void Sector.eraseDone[ uint8_t id ]( uint8_t sector, uint8_t num_sectors, error_t error ) { if ( m_log_state[ id ].req == S_ERASE ) { m_log_info[ id ].read_addr = 0; m_log_info[ id ].write_addr = 0; signalDone( id, error ); } else { // advance read pointer if write pointer has gone too far ahead // (the log could have cycled around) stm25p_addr_t volume_size = STM25P_SECTOR_SIZE * ( call Sector.getNumSectors[ id ]() - 1 ); if ( m_log_info[ id ].write_addr > volume_size ) { stm25p_addr_t read_addr = m_log_info[ id ].write_addr - volume_size; if ( m_log_info[ id ].read_addr < read_addr ) m_log_info[ id ].read_addr = read_addr; } m_addr = m_log_info[ id ].write_addr; call Sector.write[ id ]( calcAddr( id, m_addr ), (uint8_t*)&m_addr, sizeof( m_addr ) ); } } event void Sector.writeDone[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len, error_t error ) { m_log_info[ id ].write_addr += len; if ( m_rw_state == S_HEADER ) { if ( len == sizeof( m_header ) ) m_rw_state = S_DATA; continueAppendOp( id ); } else { signalDone( id, error ); } } void signalDone( uint8_t id, error_t error ) { stm25p_log_req_t req = m_log_state[ id ].req; void* buf = m_log_state[ id ].buf; storage_len_t len = m_log_state[ id ].len; call ClientResource.release[ id ](); m_log_state[ id ].req = S_IDLE; switch( req ) { case S_IDLE: break; case S_READ: signal Read.readDone[ id ]( buf, len - m_len, error ); break; case S_SEEK: signal Read.seekDone[ id ]( error ); break; case S_ERASE: signal Write.eraseDone[ id ]( error ); break; case S_APPEND: signal Write.appendDone[ id ]( buf, len, m_records_lost, error ); break; case S_SYNC: signal Write.syncDone[ id ]( error ); break; } } event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ) {} default event void Read.readDone[ uint8_t id ]( void* data, storage_len_t len, error_t error ) {} default event void Read.seekDone[ uint8_t id ]( error_t error ) {} default event void Write.eraseDone[ uint8_t id ]( error_t error ) {} default event void Write.appendDone[ uint8_t id ]( void* data, storage_len_t len, bool recordsLost, error_t error ) {} default event void Write.syncDone[ uint8_t id ]( error_t error ) {} default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; } default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; } default command error_t Sector.read[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; } default command error_t Sector.write[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; } default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; } default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; } default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; } default async command error_t ClientResource.release[ uint8_t id ]() { return FAIL; } default command bool Circular.get[ uint8_t id ]() { return FALSE; } } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pOffC.nc000066400000000000000000000036501207233610700212040ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ configuration Stm25pOffC { provides interface Init as Stm25pOff; } implementation { components Stm25pOffP; Stm25pOff = Stm25pOffP; components HplStm25pSpiC as SpiC; Stm25pOffP.SpiResource -> SpiC; Stm25pOffP.SpiByte -> SpiC; components HplStm25pPinsC as PinsC; Stm25pOffP.CSN -> PinsC.CSN; Stm25pOffP.Hold -> PinsC.Hold; } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pOffP.nc000066400000000000000000000044541207233610700212240ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Zsolt Szabo */ module Stm25pOffP { provides interface Init as Stm25pOff; uses interface Resource as SpiResource; uses interface GeneralIO as CSN; uses interface GeneralIO as Hold; uses interface SpiByte; } implementation { command error_t Stm25pOff.init() { if(!uniqueCount("Stm25pOn")) call SpiResource.request(); return SUCCESS; } event void SpiResource.granted() { //we get the granted event if the real driver asks for the resource if(!uniqueCount("Stm25pOn")) { call CSN.makeOutput(); call Hold.makeOutput(); call CSN.clr(); call Hold.clr(); call SpiByte.write(0xb9);//deep sleep call CSN.set(); call Hold.set(); call SpiResource.release(); } } } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pSector.nc000066400000000000000000000125571207233610700216340ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HAL for the ST M25P family of serial code flash chips. This * provides a sector level abstraction to perform basic * operations. Upon completion of a write/erase operation, all data is * committed to non-volatile storage. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $ */ #include "Stm25p.h" interface Stm25pSector { /** * Get the physical address of a volume address. * * @return The physical address corresponding to the volume address. */ command stm25p_addr_t getPhysicalAddress( stm25p_addr_t addr ); /** * Get the number of sectors in the volume. */ command uint8_t getNumSectors(); /** * Read data from the flash chip. On SUCCESS, the * readDone event will be signalled when the operation * is complete. * * @param addr within volume to read data from. * @param buf pointer to read buffer. * @param len number of bytes to read. * @return SUCCESS if request was accepted, FAIL otherwise. */ command error_t read( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ); /** * Signals when the read operation is complete. * * @param addr within the volume that data was read from. * @param buf pointer to buffer that data was placed. * @param len number of bytes read. * @param error notification of how the operation went. */ event void readDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ); /** * Write data to the flash chip. On SUCCESS, the * writeDone event will be signalled when the operation * is complete. * * @param addr within volume to write data to. * @param buf pointer to data buffer. * @param len number of bytes to write. * @return SUCCESS if request was accepted, FAIL otherwise. */ command error_t write( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ); /** * Signals when the write operation is complete. * * @param addr within the volume that data was written to. * @param buf pointer to data buffer. * @param len number of bytes written. * @param error notification of how the operation went. */ event void writeDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ); /** * Erase a number of sectors. On SUCCESS, the eraseDone * event will be signalled when the operation completes. * * @param sector within volume to begin erasing. * @param num_sectors number of sectors to erase. * @return SUCCESS if request was accepted, FAIL otherwise. */ command error_t erase( uint8_t sector, uint8_t num_sectors ); /** * Signals when the erase operation is complete. * * @param sector within volume that erasing begain. * @param num_sectors number of sectors erased. * @param error notification of how the operation went. */ event void eraseDone( uint8_t sector, uint8_t num_sectors, error_t error ); /** * Compute CRC for some contiguous data. On SUCCESS, the * computeCrcDone event will be signalled when the * operation completes. * * @param crc the crc value to start with. * @param addr within the volume to begin crc computation. * @param len number of bytes to compute crc over. * @return SUCCESS if the request was accepted, FAIL otherwise. */ command error_t computeCrc( uint16_t crc, stm25p_addr_t addr, stm25p_len_t len ); /** * Signals when the crc computation is complete. * * @param addr within the volume that the crc computation began at. * @param len number of bytes that the crc was computed over. * @param crc the resulting crc value * @param error notification of how the operation went. */ event void computeCrcDone( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ); } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pSectorC.nc000066400000000000000000000051331207233610700217270ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the sector storage absraction for the ST M25P * serial code flash. * * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2007-02-04 19:55:17 $ */ configuration Stm25pSectorC { provides interface Resource as ClientResource[ uint8_t id ]; provides interface Stm25pSector as Sector[ uint8_t id ]; provides interface Stm25pVolume as Volume[ uint8_t id ]; } implementation { components MainC; components Stm25pSectorP as SectorP; ClientResource = SectorP; Sector = SectorP; Volume = SectorP; components new FcfsArbiterC( "Stm25p.Volume" ) as ArbiterC; SectorP.Stm25pResource -> ArbiterC; components new SplitControlDeferredPowerManagerC( 1024 ) as PowerManagerC; PowerManagerC.SplitControl -> SectorP; PowerManagerC.ResourceDefaultOwner -> ArbiterC; PowerManagerC.ArbiterInfo -> ArbiterC; components Stm25pSpiC as SpiC; SectorP.SpiResource -> SpiC; SectorP.Spi -> SpiC; MainC.SoftwareInit -> SpiC; components LedsC as Leds; SectorP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pSectorP.nc000066400000000000000000000205261207233610700217470ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2007-12-22 08:11:51 $ */ #include #include module Stm25pSectorP { provides interface SplitControl; provides interface Resource as ClientResource[ uint8_t id ]; provides interface Stm25pSector as Sector[ uint8_t id ]; provides interface Stm25pVolume as Volume[ uint8_t id ]; uses interface Resource as Stm25pResource[ uint8_t id ]; uses interface Resource as SpiResource; uses interface Stm25pSpi as Spi; uses interface Leds; } implementation { enum { NO_CLIENT = 0xff, }; typedef enum { S_IDLE, S_READ, S_WRITE, S_ERASE, S_CRC, } stm25p_sector_state_t; norace stm25p_sector_state_t m_state; typedef enum { S_NONE, S_START, S_STOP, } stm25p_power_state_t; norace stm25p_power_state_t m_power_state; norace uint8_t m_client; norace stm25p_addr_t m_addr; norace stm25p_len_t m_len; norace stm25p_len_t m_cur_len; norace uint8_t* m_buf; norace error_t m_error; norace uint16_t m_crc; void bindVolume(); void signalDone( error_t error ); task void signalDone_task(); command error_t SplitControl.start() { error_t error = call SpiResource.request(); if ( error == SUCCESS ) m_power_state = S_START; return error; } command error_t SplitControl.stop() { error_t error = call SpiResource.request(); if ( error == SUCCESS ) m_power_state = S_STOP; return error; } async command error_t ClientResource.request[ uint8_t id ]() { return call Stm25pResource.request[ id ](); } async command error_t ClientResource.immediateRequest[ uint8_t id ]() { return FAIL; } async command error_t ClientResource.release[ uint8_t id ]() { if ( m_client == id ) { m_state = S_IDLE; m_client = NO_CLIENT; call SpiResource.release(); call Stm25pResource.release[ id ](); return SUCCESS; } return FAIL; } event void Stm25pResource.granted[ uint8_t id ]() { m_client = id; call SpiResource.request(); } uint8_t getVolumeId( uint8_t client ) { return signal Volume.getVolumeId[ client ](); } event void SpiResource.granted() { error_t error; stm25p_power_state_t power_state = m_power_state; m_power_state = S_NONE; if ( power_state == S_START ) { error = call Spi.powerUp(); call SpiResource.release(); signal SplitControl.startDone( error ); return; } else if ( power_state == S_STOP ) { error = call Spi.powerDown(); call SpiResource.release(); signal SplitControl.stopDone( error ); return; } signal ClientResource.granted[ m_client ](); } async command bool ClientResource.isOwner[ uint8_t id ]() { return call Stm25pResource.isOwner[id](); } stm25p_addr_t physicalAddr( uint8_t id, stm25p_addr_t addr ) { return addr + ( (stm25p_addr_t)STM25P_VMAP[ getVolumeId( id ) ].base << STM25P_SECTOR_SIZE_LOG2 ); } stm25p_len_t calcWriteLen( stm25p_addr_t addr ) { stm25p_len_t len = STM25P_PAGE_SIZE - ( addr & STM25P_PAGE_MASK ); return ( m_cur_len < len ) ? m_cur_len : len; } command stm25p_addr_t Sector.getPhysicalAddress[ uint8_t id ]( stm25p_addr_t addr ) { return physicalAddr( id, addr ); } command uint8_t Sector.getNumSectors[ uint8_t id ]() { return STM25P_VMAP[ getVolumeId( id ) ].size; } command error_t Sector.read[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { m_state = S_READ; m_addr = addr; m_buf = buf; m_len = len; return call Spi.read( physicalAddr( id, addr ), buf, len ); } async event void Spi.readDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) { signalDone( error ); } command error_t Sector.write[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { m_state = S_WRITE; m_addr = addr; m_buf = buf; m_len = m_cur_len = len; return call Spi.pageProgram( physicalAddr( id, addr ), buf, calcWriteLen( addr ) ); } async event void Spi.pageProgramDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) { addr += len; buf += len; m_cur_len -= len; if ( !m_cur_len ) signalDone( SUCCESS ); else call Spi.pageProgram( addr, buf, calcWriteLen( addr ) ); } command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { m_state = S_ERASE; m_addr = sector; m_len = num_sectors; m_cur_len = 0; return call Spi.sectorErase( STM25P_VMAP[ getVolumeId(id) ].base + m_addr + m_cur_len ); } async event void Spi.sectorEraseDone( uint8_t sector, error_t error ) { if ( ++m_cur_len < m_len ) call Spi.sectorErase( STM25P_VMAP[getVolumeId(m_client)].base + m_addr + m_cur_len ); else signalDone( error ); } command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, stm25p_addr_t addr, stm25p_len_t len ) { m_state = S_CRC; m_addr = addr; m_len = len; return call Spi.computeCrc( crc, physicalAddr( id, addr ), m_len ); } async event void Spi.computeCrcDone( uint16_t crc, stm25p_addr_t addr, stm25p_len_t len, error_t error ) { m_crc = crc; signalDone( SUCCESS ); } async event void Spi.bulkEraseDone( error_t error ) { } void signalDone( error_t error ) { m_error = error; post signalDone_task(); } task void signalDone_task() { switch( m_state ) { case S_IDLE: signal ClientResource.granted[ m_client ](); break; case S_READ: signal Sector.readDone[ m_client ]( m_addr, m_buf, m_len, m_error ); break; case S_CRC: signal Sector.computeCrcDone[ m_client ]( m_addr, m_len, m_crc, m_error ); break; case S_WRITE: signal Sector.writeDone[ m_client ]( m_addr, m_buf, m_len, m_error ); break; case S_ERASE: signal Sector.eraseDone[ m_client ]( m_addr, m_len, m_error ); break; default: break; } } default event void ClientResource.granted[ uint8_t id ]() {} default event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) {} default event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) {} default event void Sector.eraseDone[ uint8_t id ]( uint8_t sector, uint8_t num_sectors, error_t error ) {} default event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ) {} default async event volume_id_t Volume.getVolumeId[ uint8_t id ]() { return 0xff; } } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pSpi.nc000066400000000000000000000130151207233610700211160ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * SPI abstraction for the ST M25P family of serial code flash chips. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $ */ interface Stm25pSpi { /** * Put chip into deep power down mode. * * @return SUCCESS if the request completed successfully, FAIL * otherwise. */ async command error_t powerDown(); /** * Release chip from power down mode. * * @return SUCCESS if the request completed successfully, FAIL * otherwise. */ async command error_t powerUp(); /** * Initiate a read operation. On SUCCESS, the readDone * event will be signalled when the operation completes. * * @param addr the physical address to start at. * @param buf pointer to data buffer. * @param len number of bytes to read. * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t read( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ); /** * Signals the completion of a read operation. * * @param addr the starting physical address. * @param buf pointer to data buffer. * @param len number of bytes read. * @param error notification of how the operation went. */ async event void readDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ); /** * Initiate a crc computation. On SUCCESS, the * computeCrcDone event will be signalled when the * operation completes. * * @param crc starting crc value. * @param addr the starting physical address. * @param len the number of bytes to do crc computation over. * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t computeCrc( uint16_t crc, stm25p_addr_t addr, stm25p_len_t len ); /** * Signals the completion of a crc computation operation. * * @param crc resulting crc value. * @param addr the starting physical address. * @param len the number of bytes the crc was computed over. * @param error notification of how the operation went. */ async event void computeCrcDone( uint16_t crc, stm25p_addr_t addr, stm25p_len_t len, error_t error ); /** * Initiate a page program. On SUCCESS, the * pageProgramDone event will be signalled when the * operation completes. * * @param addr starting physical address. * @param buf pointer to data buffer. * @param len number of bytes to write. * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t pageProgram( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ); /** * Signal the completion of a page program operation. * * @param addr starting physical address. * @param buf pointer to data buffer. * @param len number of bytes to write. * @param error notification of how the operation went. */ async event void pageProgramDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ); /** * Initiate a sector erase. On SUCCESS, the * sectorEraseDone event will be signalled when the * operation completes. * * @param sector physical sector to erase. * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t sectorErase( uint8_t sector ); /** * Signals the completion of a sector erase operation. * * @param sector physical sector erased * @param error notification of how the operation went. */ async event void sectorEraseDone( uint8_t sector, error_t error ); /** * Initiate a bulk erase. On SUCCESS, the bulkEraseDone * event will be signalled when the operation completes. * * @return SUCCESS if the request was accepted, FAIL otherwise. */ async command error_t bulkErase(); /** * Signals the completion of a bulk erase operation. * * @param error notification of how the operation went. */ async event void bulkEraseDone( error_t error ); } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pSpiC.nc000066400000000000000000000043701207233610700212250ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the SPI bus abstraction for the ST M25P serial * code flash. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $ */ configuration Stm25pSpiC { provides interface Init; provides interface Resource; provides interface Stm25pSpi; } implementation { components Stm25pSpiP as SpiP; Init = SpiP; Resource = SpiP.ClientResource; Stm25pSpi = SpiP; components HplStm25pSpiC as SpiC; SpiP.SpiResource -> SpiC; SpiP.SpiByte -> SpiC; SpiP.SpiPacket -> SpiC; components HplStm25pPinsC as PinsC; SpiP.CSN -> PinsC.CSN; SpiP.Hold -> PinsC.Hold; components LedsC as Leds; SpiP.Leds -> Leds; } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pSpiP.nc000066400000000000000000000163461207233610700212500ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $ */ #include "crc.h" module Stm25pSpiP { provides interface Init; provides interface Resource as ClientResource; provides interface Stm25pSpi as Spi; uses interface Resource as SpiResource; uses interface GeneralIO as CSN; uses interface GeneralIO as Hold; uses interface SpiByte; uses interface SpiPacket; uses interface Leds; } implementation { enum { CRC_BUF_SIZE = 16, }; typedef enum { S_READ = 0x03, S_PAGE_PROGRAM = 0x02, S_SECTOR_ERASE = 0xd8, S_BULK_ERASE = 0xc7, S_WRITE_ENABLE = 0x06, S_POWER_ON = 0xab, S_DEEP_SLEEP = 0xb9, S_READ_STATUS = 0x05, } stm25p_cmd_t; enum { // this disables the Stm25pOff component STM25PON = unique("Stm25pOn") }; norace uint8_t m_cmd[ 4 ]; norace bool m_is_writing = FALSE; norace bool m_computing_crc = FALSE; bool m_init=FALSE; norace stm25p_addr_t m_addr; norace uint8_t* m_buf; norace stm25p_len_t m_len; norace stm25p_addr_t m_cur_addr; norace stm25p_len_t m_cur_len; norace uint8_t m_crc_buf[ CRC_BUF_SIZE ]; norace uint16_t m_crc; error_t newRequest( bool write, stm25p_len_t cmd_len ); void signalDone( error_t error ); uint8_t sendCmd( uint8_t cmd, uint8_t len ) { uint8_t tmp = 0; int i; call CSN.clr(); for ( i = 0; i < len; i++ ) tmp = call SpiByte.write( cmd ); call CSN.set(); return tmp; } command error_t Init.init() { call CSN.makeOutput(); call Hold.makeOutput(); call CSN.set(); call Hold.set(); if(call SpiResource.request()==SUCCESS) m_init=TRUE; //otherwise we can't put the chip to deep sleep return SUCCESS; } async command error_t ClientResource.request() { return call SpiResource.request(); } async command error_t ClientResource.immediateRequest() { return call SpiResource.immediateRequest(); } async command error_t ClientResource.release() { return call SpiResource.release(); } async command bool ClientResource.isOwner() { return call SpiResource.isOwner(); } stm25p_len_t calcReadLen() { return ( m_cur_len < CRC_BUF_SIZE ) ? m_cur_len : CRC_BUF_SIZE; } async command error_t Spi.powerDown() { sendCmd( S_DEEP_SLEEP, 1 ); return SUCCESS; } async command error_t Spi.powerUp() { sendCmd( S_POWER_ON, 5 ); return SUCCESS; } async command error_t Spi.read( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { m_cmd[ 0 ] = S_READ; m_addr = addr; m_buf = buf; m_len = len; return newRequest( FALSE, 4 ); } async command error_t Spi.computeCrc( uint16_t crc, stm25p_addr_t addr, stm25p_len_t len ) { m_computing_crc = TRUE; m_crc = crc; m_addr = m_cur_addr = addr; m_len = m_cur_len = len; return call Spi.read( addr, m_crc_buf, calcReadLen() ); } async command error_t Spi.pageProgram( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { m_cmd[ 0 ] = S_PAGE_PROGRAM; m_addr = addr; m_buf = buf; m_len = len; return newRequest( TRUE, 4 ); } async command error_t Spi.sectorErase( uint8_t sector ) { m_cmd[ 0 ] = S_SECTOR_ERASE; m_addr = (stm25p_addr_t)sector << STM25P_SECTOR_SIZE_LOG2; return newRequest( TRUE, 4 ); } async command error_t Spi.bulkErase() { m_cmd[ 0 ] = S_BULK_ERASE; return newRequest( TRUE, 1 ); } error_t newRequest( bool write, stm25p_len_t cmd_len ) { m_cmd[ 1 ] = m_addr >> 16; m_cmd[ 2 ] = m_addr >> 8; m_cmd[ 3 ] = m_addr; if ( write ) sendCmd( S_WRITE_ENABLE, 1 ); call CSN.clr(); call SpiPacket.send( m_cmd, NULL, cmd_len ); return SUCCESS; } void releaseAndRequest() { call SpiResource.release(); call SpiResource.request(); } async event void SpiPacket.sendDone( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) { int i; switch( m_cmd[ 0 ] ) { case S_READ: if ( tx_buf == m_cmd ) { call SpiPacket.send( NULL, m_buf, m_len ); break; } else if ( m_computing_crc ) { for ( i = 0; i < len; i++ ) m_crc = crcByte( m_crc, m_crc_buf[ i ] ); m_cur_addr += len; m_cur_len -= len; if ( m_cur_len ) { call SpiPacket.send( NULL, m_crc_buf, calcReadLen() ); break; } } call CSN.set(); signalDone( SUCCESS ); break; case S_PAGE_PROGRAM: if ( tx_buf == m_cmd ) { call SpiPacket.send( m_buf, NULL, m_len ); break; } // fall through case S_SECTOR_ERASE: case S_BULK_ERASE: call CSN.set(); m_is_writing = TRUE; releaseAndRequest(); break; default: break; } } event void SpiResource.granted() { if (m_init) { m_init=FALSE; call Spi.powerDown(); call SpiResource.release(); } else if ( !m_is_writing ) signal ClientResource.granted(); else if ( sendCmd( S_READ_STATUS, 2 ) & 0x1 ) releaseAndRequest(); else signalDone( SUCCESS ); } void signalDone( error_t error ) { m_is_writing = FALSE; switch( m_cmd[ 0 ] ) { case S_READ: if ( m_computing_crc ) { m_computing_crc = FALSE; signal Spi.computeCrcDone( m_crc, m_addr, m_len, error ); } else { signal Spi.readDone( m_addr, m_buf, m_len, error ); } break; case S_PAGE_PROGRAM: signal Spi.pageProgramDone( m_addr, m_buf, m_len, error ); break; case S_SECTOR_ERASE: signal Spi.sectorEraseDone( m_addr >> STM25P_SECTOR_SIZE_LOG2, error ); break; case S_BULK_ERASE: signal Spi.bulkEraseDone( error ); break; } } } tinyos-2.1.2+dfsg/tos/chips/stm25p/Stm25pVolume.nc000066400000000000000000000036431207233610700216400ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Abstraction to provide the id of a volume. * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $ */ #include "Stm25p.h" interface Stm25pVolume { /** * Signals a request to provide the id of a volume. * * @return the id of the volume. */ async event volume_id_t getVolumeId(); } tinyos-2.1.2+dfsg/tos/chips/stm25p/StorageMap.nc000066400000000000000000000037571207233610700214260ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An abstraction to map volume addresses to physical addresses. * * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2007-04-02 05:03:07 $ */ #include "Stm25p.h" interface StorageMap { /** * Get the physical address of a volume address. * * @param addr the volume addres. * @return the physical address. */ command storage_addr_t getPhysicalAddress( storage_addr_t addr ); } tinyos-2.1.2+dfsg/tos/chips/stm25p/Storage_chip.h000066400000000000000000000033461207233610700216140ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $ */ #ifndef __STORAGE_CHIP_H__ #define __STORAGE_CHIP_H__ #endif tinyos-2.1.2+dfsg/tos/chips/tda5250/000077500000000000000000000000001207233610700167605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/tda5250/ClkDiv.nc000066400000000000000000000050071207233610700204600ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $Revision: 1.1 $ * $Date: 2007-03-10 22:01:58 $ */ /** * This radio provides a clock divider output that can be used to drive * a high frequency clock of an micro processor. * @author: Andreas Koepke */ interface ClkDiv { /** * this event signals that the clkdiv delivers a stable signal */ async event void startDone(); /** * this event signals that the clkdiv will stop to deliver a stable signal */ async event void stopping(); /** * From now on, never switch the clkdiv off -- consumes more energy! * This command may take a while until it takes effect. */ // command void alwaysOnMode(); /** * Return to default mode: clkdiv is switched on when the radio demands * it, other components will get the start/stop events and hence know what * is going on now. */ // command void sporadicMode(); } tinyos-2.1.2+dfsg/tos/chips/tda5250/HplTda5250Config.nc000066400000000000000000000354671207233610700221370ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * @author: Kevin Klues (klues@tkn.tu-berlin.de) * ======================================================================== */ #include "tda5250Const.h" /** * This interface provides commands and events for configureing the radio modes. * * @author Kevin Klues */ interface HplTda5250Config { /** * Resets all Radio Registers to default values. * The default values can be found in tda5250RegDefaults.h */ async command void reset(); /** * Set the data slicer to use the RC integrator. * The data slicer is an analog-to-digital converter for the radio data. * When using RC integrator the mean value of the analog data is used * to convert the analog data to a Bit. */ async command void UseRCIntegrator(); /** * Set the data slicer to use the Peak Detector. * The data slicer is an analog-to-digital converter for the radio data. * When using peak detector the peak value of the analog data is used * to convert the analog data to a Bit. */ async command void UsePeakDetector(); /** * Powers the radio down. */ async command void PowerDown(); /** * Powers the radio up. */ async command void PowerUp(); /** * Switch radio to test operation. * FIXME: Whatever this means... */ async command void RunInTestMode(); /** * Switches the radio to normal operation. */ async command void RunInNormalMode(); /** * Control the radio Tx and Rx mode externally. */ async command void ControlRxTxExternally(); /** * Control the radio Tx and Rx mode internally. */ async command void ControlRxTxInternally(); /** * Use FSK modulation. * * @param pos_shift Capacitor value for positive shift. * @param neg_shift Capacitor value for negative shift. */ async command void UseFSK(tda5250_cap_vals_t pos_shift, tda5250_cap_vals_t neg_shift); /** * Use ASK mosulation. * * @param pos_shift Capacitor value for positive shift. (FIXME: makes sense?) */ async command void UseASK(tda5250_cap_vals_t pos_shift); /** * Disables internal clock during power down. */ async command void SetClockOffDuringPowerDown(); /** * Enables internal clock during power down. */ async command void SetClockOnDuringPowerDown(); /** * Enables inverting the radio data. */ async command void InvertData(); /** * Disables inverting radio data. */ async command void DontInvertData(); /** * Use the RSSI data valid detection. * For the data valid detection 3 thresholds must be defined. * The data is only considered valid if the RSSI is greater than RSSI threshold * and the data rate is between the lower and upper data rate threshold. * * @param value The RSSI threshold for valid data. * @param lower_bound Lower data rate threshold. * @param upper_bound Upper data rate threshold. */ async command void UseRSSIDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound); /** * Use the Vcc data valid detection. * For the data valid detection 3 thresholds must be defined. * The data is only considered valid if the voltage is greater than voltage threshold * and the data rate is between the lower and upper data rate threshold. * * @param value The voltage threshold for valid data. * @param lower_bound Lower data rate threshold. * @param upper_bound Upper data rate threshold. */ async command void UseVCCDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound); /** * Use the data valid detection. * This means that the receiving data is checked either by RSSI data valid detection or * by Vcc data valid detection if it is actual data and no noise. */ async command void UseDataValidDetection(); /** Do not use data valid detection. * This means that it is assumed that the receiving data is * always valid data. * It is absolutely necessary to * set the RSSI-ADC (and the Window counter) into continuous mode. */ async command void UseDataAlwaysValid(); /** * Sets the ADC to continious mode. * Analog sampling data is taken continously. */ async command void ADCContinuousMode(); /** * Sets the ADC to one shot mode. * The sampling data is taken in one shot. */ async command void ADCOneShotMode(); /** * Sets the data calid detection in continous mode. */ async command void DataValidContinuousMode(); /** * Sets the data calid detection in one shot mode. */ async command void DataValidOneShotMode(); /** * Sets the low noise amplifier to high gain */ async command void HighLNAGain(); /** * Sets the low noise amplifier to low gain */ async command void LowLNAGain(); /** * Enables the receiver when in TIMER_MODE or SELF_POLLING_MODE. */ async command void EnableReceiverInTimedModes(); /** * Disables the receiver when in TIMER_MODE or SELF_POLLING_MODE. */ async command void DisableReceiverInTimedModes(); /** * Use high transmit power. */ async command void UseHighTxPower(); /** * Use low transmit power. */ async command void UseLowTxPower(); /** * Tune the nominal frequency with a Bipolar FET. * * @param ramp_time Ramp time. * @param cap_val Capacitor value. */ async command void TuneNomFreqWithBipolarFET(tda5250_bipolar_fet_ramp_times_t ramp_time, tda5250_cap_vals_t cap_val); /** * Tune the nominal frequency with a FET * * @param cap_val Capacitor value. */ async command void TuneNomFreqWithFET(tda5250_cap_vals_t cap_val); /** * Set the mode of the radio to SlaveMode. */ async command void SetSlaveMode(); /** * Set the mode of the radio to TimerMode. * * @param on_time The time (ms) the radio is on. * @param off_time The time (ms) the radio is off. */ async command void SetTimerMode(float on_time, float off_time); /** * Resets the timers set in SetTimerMode(). */ async command void ResetTimerMode(); /** * Set the mode of the radio to SetSelfPollingMode. * * @param on_time The time (ms) the radio is on. * @param off_time The time (ms) the radio is off. */ async command void SetSelfPollingMode(float on_time, float off_time); /** * Reset the timers set in SetSelfPollingMode. */ async command void ResetSelfPollingMode(); /** * Set the contents of the LPF register with the Low pass filter * * @param data_cutoff LowPassFilter characteristics. For recognized values see tda5250Const.h */ async command void SetLowPassFilter(tda5250_data_cutoff_freqs_t data_cutoff); /** * Set the contents of the LPF register with the IQ filter value. * * @param iq_cutoff IQ filter characteristics. For recognized values see tda5250Const.h */ async command void SetIQFilter(tda5250_iq_cutoff_freqs_t iq_cutoff); /** * Set the on time time of the radio. * This only makes sense when radio is in TIMER or SELF_POLLING Mode. * * @param time The time (ms) the radio is on. */ async command void SetOnTime_ms(float time); /** * Set the off time time of the radio. * This only makes sense when radio is in TIMER or SELF_POLLING Mode. * * @param time The time (ms) the radio is off. */ async command void SetOffTime_ms(float time); /** * Initialzes the CLK_DIV so that SetRadioClock(tda5250_clock_out_freqs_t freq) * can be used. */ async command void UseSetClock(); /** * Sets the CLK_DIV to specified output. UseSetClock() must be called before! * Available frequencies given in TDA5250ClockFreq_t struct in tda5250Const.h. * * @param freq The new clock frequency (see tda5250.h). */ async command void SetRadioClock(tda5250_clock_out_freqs_t freq); /** * Sets the CLK_DIV to 18Mhz output. */ async command void Use18MHzClock(); /** * Sets the CLK_DIV to 32Khz output. */ async command void Use32KHzClock(); /** * Sets the CLK_DIV to use window count as output. */ async command void UseWindowCountAsClock(); /** * Set the value on the attached Potentiometer * for the RF Power setting. * * @param RF Power. */ async command void SetRFPower(uint8_t value); /** * Sets the RSSI threshold for internal evaluation. * * @param RSSI threshold value. */ async command void SetRSSIThreshold(uint8_t value); /** * Sets the threshold values for internal evaluation. * (FIXME: what threshold is set with this?) * * @param value Threshold value. */ async command void SetVCCOver5Threshold(uint8_t value); /** * Sets the lower data rate threshold for data valid detection. * * @param Lower data rate threshold value. */ async command void SetLowerDataRateThreshold(uint16_t value); /** * Sets the upper data rate threshold for data valid detection. * * @param Upper data rate threshold value. */ async command void SetUpperDataRateThreshold(uint16_t value); /** * Gets the currnet RSSI value. * * @return Current RSSI. */ async command uint8_t GetRSSIValue(); /** * Gets the current status of the ADC select feedback Bit. * The ADC select feedback Bit is "0" if the ADC is connected to * a resistor network dividing the Vcc voltage by 5. * The ADC select feedback Bit is "1" if the ADC is connected to * the RSSI voltage. * * @return "0" if ADC connected to Vcc/5. * "1" if ADC connected to RSSI voltage. */ async command uint8_t GetADCSelectFeedbackBit(); /** * Gets the current status of the ADC Power down feedback Bit. * The ADC Power down feedback Bit is "0" if ADC power is up. * It is "1" if ADC power is down. * * @return "0" if ADC power is up * "1" otherwise. */ async command uint8_t GetADCPowerDownFeedbackBit(); /** * Checks if the data rate is less than the lower threshold set by * SetLowerDataRateThreshold(uint16_t value). * * @return TRUE if data rate is less than lower threshold * FALSE otherwise. */ async command bool IsDataRateLessThanLowerThreshold(); /** * Checks if the data rate is between the lower threshold set by * SetLowerDataRateThreshold(uint16_t value) and upper threshold set by * SetUpperDataRateThreshold(uint16_t value). * * @return TRUE if data rate is between the lower and upper threshold * FALSE otherwise. */ async command bool IsDataRateBetweenThresholds(); /** * Checks if the data rate is less than the upper threshold set by * SetUpperDataRateThreshold(uint16_t value). * * @return TRUE if data rate is less than upper threshold * FALSE otherwise. */ async command bool IsDataRateLessThanUpperThreshold(); /** * Checks if the data rate is less than half of the lower threshold set by * SetLowerDataRateThreshold(uint16_t value). * * @return TRUE if data rate is less than half of the lower threshold * FALSE otherwise. */ async command bool IsDataRateLessThanHalfOfLowerThreshold(); /** * Checks if the data rate is between the halves of the lower threshold set by * SetLowerDataRateThreshold(uint16_t value) and the upper threshold set by * SetUpperDataRateThreshold(uint16_t value). * * @return TRUE if the data rate is between the halves of the lower and upper threshold * FALSE otherwise. */ async command bool IsDataRateBetweenHalvesOfThresholds(); /** * Checks if the data rate is half of the upper threshold set by * SetUpperDataRateThreshold(uint16_t value). * * @return TRUE if data rate is less than half of the upper threshold * FALSE otherwise. */ async command bool IsDataRateLessThanHalfOfUpperThreshold(); /** * Checks if the current RSSI equals the threshold set * with SetRSSIThreshold(uint8_t value). * * @return TRUE if RSSI equals the threshold value * FALSE otherwise. */ async command bool IsRSSIEqualToThreshold(); /** * Checks if the current RSSI is graeter than the threshold set * with SetRSSIThreshold(uint8_t value). * * @return TRUE if RSSI greater than threshold value * FALSE otherwise. */ async command bool IsRSSIGreaterThanThreshold(); /** * Checks if the Tx Rx and Sleep radiomodes can be set via pin. * This only concerns SetTxMode(), SetRxMode() and SetSleepMode(). * * @return TRUE if radiomodes can be set via pin * FALSE otherwise. */ async command bool IsTxRxPinControlled(); /** * Switches the radio to TxMode when in SLAVE_MODE */ async command void SetTxMode(); /** * Switches the radio to RxMode when in SLAVE_MODE */ async command void SetRxMode(); /** * Switches the radio to SleepMode when in SLAVE_MODE */ async command void SetSleepMode(); /** * Notification of interrupt when in * TimerMode or SelfPollingMode. */ async event void PWDDDInterrupt(); } tinyos-2.1.2+dfsg/tos/chips/tda5250/HplTda5250ConfigC.nc000066400000000000000000000067701207233610700222350ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * Controlling the TDA5250 at the HPL layer. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ #include "tda5250Const.h" #include "tda5250RegDefaultSettings.h" #include "tda5250RegTypes.h" configuration HplTda5250ConfigC { provides { interface Init; interface HplTda5250Config; interface Resource as Resource; } } implementation { components HplTda5250ConfigP , Tda5250RegistersC , Tda5250RadioIOC , Tda5250RadioInterruptC ; Init = HplTda5250ConfigP; Init = Tda5250RegistersC; Resource = Tda5250RegistersC.Resource; HplTda5250Config = HplTda5250ConfigP; HplTda5250ConfigP.CONFIG -> Tda5250RegistersC.CONFIG; HplTda5250ConfigP.FSK -> Tda5250RegistersC.FSK; HplTda5250ConfigP.XTAL_TUNING -> Tda5250RegistersC.XTAL_TUNING; HplTda5250ConfigP.LPF -> Tda5250RegistersC.LPF; HplTda5250ConfigP.ON_TIME -> Tda5250RegistersC.ON_TIME; HplTda5250ConfigP.OFF_TIME -> Tda5250RegistersC.OFF_TIME; HplTda5250ConfigP.COUNT_TH1 -> Tda5250RegistersC.COUNT_TH1; HplTda5250ConfigP.COUNT_TH2 -> Tda5250RegistersC.COUNT_TH2; HplTda5250ConfigP.RSSI_TH3 -> Tda5250RegistersC.RSSI_TH3; HplTda5250ConfigP.RF_POWER -> Tda5250RegistersC.RF_POWER; HplTda5250ConfigP.CLK_DIV -> Tda5250RegistersC.CLK_DIV; HplTda5250ConfigP.XTAL_CONFIG -> Tda5250RegistersC.XTAL_CONFIG; HplTda5250ConfigP.BLOCK_PD -> Tda5250RegistersC.BLOCK_PD; HplTda5250ConfigP.STATUS -> Tda5250RegistersC.STATUS; HplTda5250ConfigP.ADC -> Tda5250RegistersC.ADC; HplTda5250ConfigP.ASKNFSK -> Tda5250RadioIOC.Tda5250RadioPASKNFSK; HplTda5250ConfigP.PWDDD -> Tda5250RadioIOC.Tda5250RadioPWDDD; HplTda5250ConfigP.TXRX -> Tda5250RadioIOC.Tda5250RadioTXRX; HplTda5250ConfigP.PWDDDInterrupt -> Tda5250RadioInterruptC; } tinyos-2.1.2+dfsg/tos/chips/tda5250/HplTda5250ConfigP.nc000066400000000000000000000457131207233610700222520ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2008-06-13 13:40:59 $ * ======================================================================== */ /** * HplTda5250ConfigP module * * @author Kevin Klues (klues@tkn.tu-berlin.de) * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de) */ module HplTda5250ConfigP { provides { interface Init; interface HplTda5250Config; } uses { interface Tda5250WriteReg as CONFIG; interface Tda5250WriteReg as FSK; interface Tda5250WriteReg as XTAL_TUNING; interface Tda5250WriteReg as LPF; interface Tda5250WriteReg as ON_TIME; interface Tda5250WriteReg as OFF_TIME; interface Tda5250WriteReg as COUNT_TH1; interface Tda5250WriteReg as COUNT_TH2; interface Tda5250WriteReg as RSSI_TH3; interface Tda5250WriteReg as RF_POWER; interface Tda5250WriteReg as CLK_DIV; interface Tda5250WriteReg as XTAL_CONFIG; interface Tda5250WriteReg as BLOCK_PD; interface Tda5250ReadReg as STATUS; interface Tda5250ReadReg as ADC; interface GeneralIO as ASKNFSK; interface GeneralIO as TXRX; interface GeneralIO as PWDDD; interface GpioInterrupt as PWDDDInterrupt; } } implementation { /**************************************************************************************************** ** ** ** ** ** Important !!! Only function marked with << tested >> are potentially working! ** ** ** ** ** *****************************************************************************************************/ /**************************************************************** Global Variables Declared *****************************************************************/ norace uint16_t currentConfig = TDA5250_REG_DEFAULT_SETTING_CONFIG; uint8_t currentClockDiv; norace uint8_t currentLpf = TDA5250_REG_DEFAULT_SETTING_LPF; /**************************************************************** async commands Implemented *****************************************************************/ /** * Initializes the Radio, setting up all Pin configurations * to the MicroProcessor that is driving it and resetting * all Registers to their default values * * @return always returns SUCCESS */ command error_t Init.init() { // setting pins to output call TXRX.makeOutput(); call PWDDD.makeOutput(); // initializing pin values call TXRX.set(); call PWDDD.clr(); return SUCCESS; } /** * Reset all Radio Registers to the default values as defined * in the tda5250RegDefaults.h file * << tested >> */ async command void HplTda5250Config.reset() { //Keep three state variables to know current value of //config register, ClockDiv, and Lpf register atomic { currentConfig = TDA5250_REG_DEFAULT_SETTING_CONFIG; currentClockDiv = TDA5250_REG_DEFAULT_SETTING_CLK_DIV; currentLpf = TDA5250_REG_DEFAULT_SETTING_LPF; } call CONFIG.set(TDA5250_REG_DEFAULT_SETTING_CONFIG); call FSK.set(TDA5250_REG_DEFAULT_SETTING_FSK); call XTAL_TUNING.set(TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING); call LPF.set(TDA5250_REG_DEFAULT_SETTING_LPF); call ON_TIME.set(TDA5250_REG_DEFAULT_SETTING_ON_TIME); call OFF_TIME.set(TDA5250_REG_DEFAULT_SETTING_OFF_TIME); call COUNT_TH1.set(TDA5250_REG_DEFAULT_SETTING_COUNT_TH1); call COUNT_TH2.set(TDA5250_REG_DEFAULT_SETTING_COUNT_TH2); call RSSI_TH3.set(TDA5250_REG_DEFAULT_SETTING_RSSI_TH3); call CLK_DIV.set(TDA5250_REG_DEFAULT_SETTING_CLK_DIV); call XTAL_CONFIG.set(TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG); call BLOCK_PD.set(TDA5250_REG_DEFAULT_SETTING_BLOCK_PD); } async command void HplTda5250Config.SetLowPassFilter(tda5250_data_cutoff_freqs_t data_cutoff){ currentLpf = (((data_cutoff << 4) | (currentLpf & 0x0F))); call LPF.set(currentLpf); } async command void HplTda5250Config.SetIQFilter(tda5250_iq_cutoff_freqs_t iq_cutoff){ currentLpf = (((iq_cutoff & 0x0F) | (currentLpf & 0xF0))); call LPF.set(currentLpf); } async command void HplTda5250Config.UseRCIntegrator() { currentConfig = CONFIG_SLICER_RC_INTEGRATOR(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.UsePeakDetector() { currentConfig = CONFIG_SLICER_PEAK_DETECTOR(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.PowerDown() { currentConfig = CONFIG_ALL_PD_POWER_DOWN(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.PowerUp() { currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.RunInTestMode() { currentConfig = CONFIG_TESTMODE_TESTMODE(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.RunInNormalMode() { currentConfig = CONFIG_TESTMODE_NORMAL(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.ControlRxTxExternally() { currentConfig = CONFIG_CONTROL_TXRX_EXTERNAL(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.ControlRxTxInternally() { currentConfig = CONFIG_CONTROL_TXRX_REGISTER(currentConfig); call CONFIG.set(currentConfig); } /* << tested >> */ async command void HplTda5250Config.UseFSK(tda5250_cap_vals_t pos_shift, tda5250_cap_vals_t neg_shift) { currentConfig = CONFIG_ASK_NFSK_FSK(currentConfig); if(currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER) { call CONFIG.set(currentConfig); } else { call ASKNFSK.clr(); } call FSK.set(((uint16_t)((((uint16_t)pos_shift) << 8) + neg_shift))); } /* << tested >> */ async command void HplTda5250Config.UseASK(tda5250_cap_vals_t value) { currentConfig = CONFIG_ASK_NFSK_ASK(currentConfig); if(currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER) { call CONFIG.set(currentConfig); } else { call ASKNFSK.set(); } call FSK.set((((uint16_t)value) << 8)); } async command void HplTda5250Config.SetClockOffDuringPowerDown() { currentConfig = CONFIG_CLK_EN_OFF(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.SetClockOnDuringPowerDown() { currentConfig = CONFIG_CLK_EN_ON(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.InvertData() { currentConfig = CONFIG_RX_DATA_INV_YES(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.DontInvertData() { currentConfig = CONFIG_RX_DATA_INV_NO(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.UseRSSIDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound) { currentConfig = CONFIG_D_OUT_IFVALID(currentConfig); call CONFIG.set(currentConfig); call COUNT_TH1.set(lower_bound); call COUNT_TH2.set(upper_bound); call RSSI_TH3.set(0xC0 | value); } async command void HplTda5250Config.UseVCCDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound) { currentConfig = CONFIG_D_OUT_IFVALID(currentConfig); call CONFIG.set(currentConfig); call COUNT_TH1.set(lower_bound); call COUNT_TH2.set(upper_bound); call RSSI_TH3.set(0x3F & value); } async command void HplTda5250Config.UseDataValidDetection() { currentConfig = CONFIG_D_OUT_IFVALID(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.UseDataAlwaysValid() { currentConfig = CONFIG_D_OUT_ALWAYS(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.ADCContinuousMode() { currentConfig = CONFIG_ADC_MODE_CONT(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.ADCOneShotMode() { currentConfig = CONFIG_ADC_MODE_ONESHOT(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.DataValidContinuousMode() { currentConfig = CONFIG_F_COUNT_MODE_CONT(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.DataValidOneShotMode() { currentConfig = CONFIG_F_COUNT_MODE_ONESHOT(currentConfig); call CONFIG.set(currentConfig); } /* <> */ async command void HplTda5250Config.HighLNAGain() { currentConfig = CONFIG_LNA_GAIN_HIGH(currentConfig); call CONFIG.set(currentConfig); } /* <> */ async command void HplTda5250Config.LowLNAGain() { currentConfig = CONFIG_LNA_GAIN_LOW(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.EnableReceiverInTimedModes() { currentConfig = CONFIG_EN_RX_ENABLE(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.DisableReceiverInTimedModes() { currentConfig = CONFIG_EN_RX_DISABLE(currentConfig); call CONFIG.set(currentConfig); } /* <> */ async command void HplTda5250Config.UseHighTxPower() { currentConfig = CONFIG_PA_PWR_HIGHTX(currentConfig); call CONFIG.set(currentConfig); } /* <> */ async command void HplTda5250Config.UseLowTxPower() { currentConfig = CONFIG_PA_PWR_LOWTX(currentConfig); call CONFIG.set(currentConfig); } async command void HplTda5250Config.TuneNomFreqWithBipolarFET(tda5250_bipolar_fet_ramp_times_t ramp_time, tda5250_cap_vals_t cap_val) { call XTAL_CONFIG.set(ramp_time); call XTAL_CONFIG.set(((uint16_t)cap_val) & 0x003F); } async command void HplTda5250Config.TuneNomFreqWithFET(tda5250_cap_vals_t cap_val) { call XTAL_CONFIG.set(0x00); call XTAL_CONFIG.set(((uint16_t)cap_val) & 0x003F); } /* <> */ async command void HplTda5250Config.SetRFPower(uint8_t value) { call RF_POWER.set(value); } /** Set the mode of the radio The choices are SLAVE_MODE, TIMER_MODE, SELF_POLLING_MODE */ /* << tested >> */ async command void HplTda5250Config.SetSlaveMode() { call PWDDDInterrupt.disable(); call PWDDD.makeOutput(); call PWDDD.clr(); currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig); currentConfig = CONFIG_MODE_2_SLAVE(currentConfig); // SetSlaveMode() is always called in conjunction with another function that writes the config... // call CONFIG.set(currentConfig); } async command void HplTda5250Config.SetTimerMode(float on_time, float off_time) { call PWDDD.clr(); call ON_TIME.set(TDA5250_CONVERT_TIME(on_time)); call OFF_TIME.set(TDA5250_CONVERT_TIME(off_time)); currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig); currentConfig = CONFIG_MODE_2_TIMER(currentConfig); call CONFIG.set(currentConfig); call TXRX.set(); call PWDDD.makeInput(); call PWDDDInterrupt.enableFallingEdge(); } async command void HplTda5250Config.ResetTimerMode() { call PWDDD.clr(); currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig); currentConfig = CONFIG_MODE_2_TIMER(currentConfig); call CONFIG.set(currentConfig); call PWDDD.makeInput(); call PWDDDInterrupt.enableFallingEdge(); } async command void HplTda5250Config.SetSelfPollingMode(float on_time, float off_time) { call PWDDD.clr(); call ON_TIME.set(TDA5250_CONVERT_TIME(on_time)); call OFF_TIME.set(TDA5250_CONVERT_TIME(off_time)); currentConfig = CONFIG_MODE_1_SELF_POLLING(currentConfig); call CONFIG.set(currentConfig); call TXRX.set(); call PWDDD.makeInput(); call PWDDDInterrupt.enableFallingEdge(); } async command void HplTda5250Config.ResetSelfPollingMode() { call PWDDD.clr(); currentConfig = CONFIG_MODE_1_SELF_POLLING(currentConfig); call CONFIG.set(currentConfig); call TXRX.set(); call PWDDD.makeInput(); call PWDDDInterrupt.enableFallingEdge(); } /** Set the on time and off time of the radio (Only makes sense when in TIMER or SELF_POLLING Mode) */ async command void HplTda5250Config.SetOnTime_ms(float time) { call ON_TIME.set(TDA5250_CONVERT_TIME(time)); } async command void HplTda5250Config.SetOffTime_ms(float time) { call OFF_TIME.set(TDA5250_CONVERT_TIME(time)); } /** Set the frequency that the CLK_DIV outputs (Available frequencies given in Tda5250ClockFreq_t struct) */ async command void HplTda5250Config.UseSetClock() { currentClockDiv &= 0x0F; call CLK_DIV.set(currentClockDiv); } async command void HplTda5250Config.Use18MHzClock() { currentClockDiv |= 0x10; currentClockDiv &= 0x1F; call CLK_DIV.set(currentClockDiv); } async command void HplTda5250Config.Use32KHzClock() { currentClockDiv |= 0x20; currentClockDiv &= 0x2F; call CLK_DIV.set(currentClockDiv); } async command void HplTda5250Config.UseWindowCountAsClock() { currentClockDiv |= 0x30; call CLK_DIV.set(currentClockDiv); } async command void HplTda5250Config.SetRadioClock(tda5250_clock_out_freqs_t freq) { currentClockDiv = (currentClockDiv & 0x30) + freq; call CLK_DIV.set(currentClockDiv); } /** Sets the threshold Values for internal evaluation */ /* <> */ async command void HplTda5250Config.SetRSSIThreshold(uint8_t value) { call RSSI_TH3.set(0xC0 | value); } async command void HplTda5250Config.SetVCCOver5Threshold(uint8_t value) { call RSSI_TH3.set(0x3F & value); } async command void HplTda5250Config.SetLowerDataRateThreshold(uint16_t value) { call COUNT_TH1.set(value); } async command void HplTda5250Config.SetUpperDataRateThreshold(uint16_t value) { call COUNT_TH2.set(value); } /** Get parts of certain registers according to their logical functionality */ async command uint8_t HplTda5250Config.GetRSSIValue() { return (0x3F & call ADC.get()); } async command uint8_t HplTda5250Config.GetADCSelectFeedbackBit() { return ((0x40 & call ADC.get()) >> 6); } async command uint8_t HplTda5250Config.GetADCPowerDownFeedbackBit() { return ((0x80 & call ADC.get()) >> 7); } async command bool HplTda5250Config.IsDataRateLessThanLowerThreshold() { if((0x80 & call STATUS.get()) == TRUE) return TRUE; return FALSE; } async command bool HplTda5250Config.IsDataRateBetweenThresholds() { if((0x40 & call STATUS.get()) == TRUE) return TRUE; return FALSE; } async command bool HplTda5250Config.IsDataRateLessThanUpperThreshold() { if((0x20 & call STATUS.get()) == TRUE) return TRUE; return FALSE; } async command bool HplTda5250Config.IsDataRateLessThanHalfOfLowerThreshold() { if((0x10 & call STATUS.get()) == TRUE) return TRUE; return FALSE; } async command bool HplTda5250Config.IsDataRateBetweenHalvesOfThresholds() { if((0x08 & call STATUS.get()) == TRUE) return TRUE; return FALSE; } async command bool HplTda5250Config.IsDataRateLessThanHalfOfUpperThreshold() { if((0x04 & call STATUS.get()) == TRUE) return TRUE; return FALSE; } async command bool HplTda5250Config.IsRSSIEqualToThreshold() { if((0x02 & call STATUS.get()) == TRUE) return TRUE; return FALSE; } async command bool HplTda5250Config.IsRSSIGreaterThanThreshold() { if((0x01 & call STATUS.get()) == TRUE) return TRUE; return FALSE; } /** Switches radio between states when in SLAVE_MODE */ /* << tested >> */ async command void HplTda5250Config.SetTxMode() { currentConfig = CONFIG_RX_NTX_TX(currentConfig); currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig); if (currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER) { call CONFIG.set(currentConfig); } else { call TXRX.clr(); call PWDDD.clr(); } } /* << tested >> */ async command void HplTda5250Config.SetRxMode() { currentConfig = CONFIG_RX_NTX_RX(currentConfig); currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig); if (currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER) { call CONFIG.set(currentConfig); } else { call TXRX.set(); call PWDDD.clr(); } } /* << tested >> */ async command void HplTda5250Config.SetSleepMode() { currentConfig = CONFIG_ALL_PD_POWER_DOWN(currentConfig); call PWDDD.makeOutput(); call PWDDD.set(); } async command bool HplTda5250Config.IsTxRxPinControlled() { return (currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER); } /**************************************************************** Events Implemented ************************************************/ /** Interrupt Signal on PWD_DD pin in TIMER_MODE and SELF_POLLING_MODE */ async event void PWDDDInterrupt.fired() { signal HplTda5250Config.PWDDDInterrupt(); } default async event void HplTda5250Config.PWDDDInterrupt() {} } tinyos-2.1.2+dfsg/tos/chips/tda5250/HplTda5250Data.nc000066400000000000000000000064011207233610700215650ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * Interface for sending and receiving bytes of data over the TDA5250 Radio. * This interface lets you receive and send bytes of data. * In conjunction to this the HplTda5250DataControl interface is used to * switch between receiving and sending. * * @see HplTda5250DataControl * @author Kevin Klues (klues@tkn.tu-berlin.de) */ interface HplTda5250Data { /** * Transmit a byte of data over the radio. * Before you call this command you must switch * the radio to Tx mode via the HplTda5250DataControl * interface. * @param data The data byte to be transmitted. * @return SUCCESS Byte successfully transmitted. FAIL Byte could not be transmitted. */ async command error_t tx(uint8_t data); /** * Signalled when the next byte can be made ready to transmit. * Receiving such an event does not guarantee that the previous * byte has already been transmitted, just that the next one can * now be handed over for transmission. */ async event void txReady(); /** * Command for querying whether any bytes are still waiting to be transmitted. * * @return TRUE if all bytes are trasnmitted * FALSE otherwise. */ //async command bool isTxDone(); /** * Signaled when a byte of data has been received from the radio. * Before you call this command you must switch * the radio to Rx mode via the HplTda5250DataControl * interface. * @param data The data byte received. */ async event void rxDone(uint8_t data); } tinyos-2.1.2+dfsg/tos/chips/tda5250/HplTda5250DataC.nc000066400000000000000000000052261207233610700216740ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * Controlling the TDA5250 at the HPL layer. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ configuration HplTda5250DataC { provides { interface Init; interface HplTda5250Data; interface HplTda5250DataControl; interface ResourceRequested; interface Resource as Resource; } } implementation { components HplTda5250DataP, Tda5250RadioIOC, HplTda5250DataIOC; Init = HplTda5250DataP; Resource = HplTda5250DataP.Resource; ResourceRequested = HplTda5250DataP.ResourceRequested; HplTda5250Data = HplTda5250DataP; HplTda5250DataControl = HplTda5250DataP; HplTda5250DataP.DATA -> Tda5250RadioIOC.Tda5250RadioDATA; HplTda5250DataP.Uart -> HplTda5250DataIOC.UartStream; HplTda5250DataP.UartDataControl -> HplTda5250DataIOC.UartDataControl; HplTda5250DataP.UartResource -> HplTda5250DataIOC.Resource; HplTda5250DataP.UartResourceRequested -> HplTda5250DataIOC.ResourceRequested; } tinyos-2.1.2+dfsg/tos/chips/tda5250/HplTda5250DataControl.nc000066400000000000000000000012221207233610700231220ustar00rootroot00000000000000 /** * Interface for controlling the data interface of the TDA5250 Radio. * This interface lets you switch between Tx and Rx. * In conjunction to this the HplTda5250Data interface * is used for the actual receiving and sending of data. * * @see HplTda5250Data * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de) */ interface HplTda5250DataControl { /** * Sets the radio to transmit. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t setToTx(); /** * Sets the radio to receive. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t setToRx(); } tinyos-2.1.2+dfsg/tos/chips/tda5250/HplTda5250DataP.nc000066400000000000000000000105131207233610700217040ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * HplTda5250DataP module * * @author Philipp Hupertz (huppertz@tkn.tu-berlin.de) * @author Kevin Klues (klues@tkn.tu-berlin.de) */ module HplTda5250DataP { provides { interface Init; interface HplTda5250Data; interface HplTda5250DataControl; interface Resource; interface ResourceRequested; } uses { interface GeneralIO as DATA; interface UartStream as Uart; interface HplTda5250DataControl as UartDataControl; interface Resource as UartResource; interface ResourceRequested as UartResourceRequested; } } implementation { /** * Initializes the Radio, setting up all Pin configurations * to the MicroProcessor that is driving it * * @return always returns SUCCESS */ command error_t Init.init() { call DATA.makeOutput(); call DATA.clr(); //Make Rx default call DATA.makeInput(); return SUCCESS; } async command error_t Resource.request() { return call UartResource.request(); } async command error_t Resource.immediateRequest() { if(call UartResource.immediateRequest() == EBUSY) { return EBUSY; } return SUCCESS; } async command error_t Resource.release() { return call UartResource.release(); } async command bool Resource.isOwner() { return call UartResource.isOwner(); } event void UartResource.granted() { signal Resource.granted(); } async event void UartResourceRequested.requested() { signal ResourceRequested.requested(); } async event void UartResourceRequested.immediateRequested() { signal ResourceRequested.immediateRequested(); } async command error_t HplTda5250Data.tx(uint8_t data) { if(call UartResource.isOwner() == FALSE) return FAIL; return call Uart.send(&data, 1); } async event void Uart.sendDone( uint8_t* buf, uint16_t len, error_t error ) { if(call UartResource.isOwner() == FALSE) return; signal HplTda5250Data.txReady(); } async event void Uart.receivedByte( uint8_t data ) { if(call UartResource.isOwner() == FALSE) return; signal HplTda5250Data.rxDone(data); } async event void Uart.receiveDone( uint8_t* buf, uint16_t len, error_t error ) {} async command error_t HplTda5250DataControl.setToTx() { call UartDataControl.setToTx(); return SUCCESS; } async command error_t HplTda5250DataControl.setToRx() { call UartDataControl.setToRx(); return SUCCESS; } default event void Resource.granted() {} default async event void HplTda5250Data.txReady() {} default async event void HplTda5250Data.rxDone(uint8_t data) {} } tinyos-2.1.2+dfsg/tos/chips/tda5250/RfPower.nc000066400000000000000000000032361207233610700206720ustar00rootroot00000000000000/* -*- mode: c++ -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ interface RfPower { async command error_t set(uint8_t setting); } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250ActiveMessageC.nc000066400000000000000000000063731207233610700231030ustar00rootroot00000000000000// $Id: Tda5250ActiveMessageC.nc,v 1.7 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: Tda5250ActiveMessageC.nc,v 1.7 2010-06-29 22:07:46 scipio Exp $ * */ /** * * The Active Message layer for the TDA5250 radio. This configuration * just layers the AM dispatch (Tda5250ActiveMessageP) on top of the * underlying TDA5250 radio packet. * * @author Philip Levis * @author Vlado Handziski (TDA5250 modifications) * @date July 20 2005 */ #include "Timer.h" configuration Tda5250ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Packet; interface PacketAcknowledgements; interface Tda5250Packet; } } implementation { components Tda5250ActiveMessageP as AM, RadioDataLinkC as Radio; components ActiveMessageAddressC as Address; SplitControl = Radio; Packet = Radio; PacketAcknowledgements = Radio; Tda5250Packet = AM; AMSend = AM; Receive = AM.Receive; Snoop = AM.Snoop; AMPacket = AM; AM.SubSend -> Radio.Send; AM.SubReceive -> Radio.Receive; AM.SubPacket -> Radio.Packet; AM.amAddress -> Address; } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250ActiveMessageP.nc000066400000000000000000000135421207233610700231140ustar00rootroot00000000000000// -*- mode:c++; indent-tabs-mode: nil -*- $Id: Tda5250ActiveMessageP.nc,v 1.11 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: Tda5250ActiveMessageP.nc,v 1.11 2010-06-29 22:07:46 scipio Exp $ * */ /** * @author Philip Levis * @author Vlado Handziski (TDA5250 modifications) * @date July 20 2005 */ module Tda5250ActiveMessageP { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Tda5250Packet; } uses { interface Send as SubSend; interface Receive as SubReceive; interface Packet as SubPacket; command am_addr_t amAddress(); } } implementation { tda5250_header_t* getHeader( message_t* msg ) { return (tda5250_header_t*)( msg->data - sizeof(tda5250_header_t) ); } tda5250_metadata_t* getMetadata(message_t* amsg) { return (tda5250_metadata_t*)((uint8_t*)amsg->footer + sizeof(message_radio_footer_t)); } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { tda5250_header_t* header = getHeader(msg); header->type = id; header->dest = addr; header->src = call amAddress(); return call SubSend.send(msg, len); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } event void SubSend.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call SubPacket.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call SubPacket.getPayload(m, len); } /* Receiving a packet */ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { if (call AMPacket.isForMe(msg)) { return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); } else { return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); } } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { tda5250_header_t* header = getHeader(amsg); return header->dest; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { tda5250_header_t* header = getHeader(amsg); header->dest = addr; } command am_addr_t AMPacket.source(message_t* amsg) { tda5250_header_t* header = getHeader(amsg); return header->src; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { tda5250_header_t* header = getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { tda5250_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t type) { tda5250_header_t* header = getHeader(amsg); header->type = type; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { return; } command am_group_t AMPacket.group(message_t* msg) { return TOS_AM_GROUP; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } async command uint8_t Tda5250Packet.getSnr(message_t* msg) { return getMetadata(msg)->strength; } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250Control.nc000066400000000000000000000104471207233610700216750ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * @author: Kevin Klues (klues@tkn.tu-berlin.de) * ======================================================================== */ #include "tda5250Control.h" /** * This interface provides commands and events for controlling the radio modes. * * @author: Kevin Klues (klues@tkn.tu-berlin.de) * */ interface Tda5250Control { /** * Switches radio to TimerMode. * * @param on_time Sets the time (ms) the radio is on. * @param off_time Sets the time (ms) the radio is off. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t TimerMode(float on_time, float off_time); /** * Resets the timers set in TimerMode(). * * @return SUCCESS on success * FAIL otherwise. */ async command error_t ResetTimerMode(); /** * Switches radio to SelfPollingMode. * * @param on_time Sets the time (ms) the radio is on. * @param off_time Sets the time (ms) the radio is off. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t SelfPollingMode(float on_time, float off_time); /** * Resets the timers set in SelfPollingMode(float, float). * * @return SUCCESS on success * FAIL otherwise. */ async command error_t ResetSelfPollingMode(); /** * Switches radio to TxMode. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t TxMode(); /** * Switches radio to RxMode. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t RxMode(); /** * Switches radio to SleepMode. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t SleepMode(); /** * Notification that radio mode is switched to TimerModeDone. */ async event void TimerModeDone(); /** * Notification that radio mode is switched to SelfPollingMode. */ async event void SelfPollingModeDone(); /** * Notification that radio mode is switched to TxMode. */ async event void TxModeDone(); /** * Notification that radio mode is switched to RxMode. */ async event void RxModeDone(); /** * Notification that the rssi is stable. */ async event void RssiStable(); /** * Notification that radio mode is switched to SleepMode. */ async event void SleepModeDone(); /** * Notification of interrupt when in * TimerMode or SelfPollingMode. */ async event void PWDDDInterrupt(); } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250Packet.nc000066400000000000000000000035601207233610700214620ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $Revision: 1.1 $ * $Date: 2007-07-24 12:22:42 $ */ /** * Access the specific fields of this radio * @author: Andreas Koepke */ #include "message.h" interface Tda5250Packet { async command uint8_t getSnr(message_t* msg); } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250RadioC.nc000066400000000000000000000057401207233610700214160ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.7 $ * $Date: 2008-06-17 16:53:50 $ * ======================================================================== */ /** * Controlling the Tda5250 at the Hpl layer. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ #include "tda5250Const.h" #include "tda5250RegDefaultSettings.h" #include "tda5250RegTypes.h" configuration Tda5250RadioC { provides { interface SplitControl; interface Tda5250Control; interface ResourceRequested; interface RadioByteComm; interface ClkDiv; } } implementation { components Tda5250RadioP , HplTda5250ConfigC , HplTda5250DataC , new Alarm32khz16C() as DelayTimer , MainC; MainC.SoftwareInit -> HplTda5250ConfigC; MainC.SoftwareInit -> HplTda5250DataC; MainC.SoftwareInit -> Tda5250RadioP; Tda5250Control = Tda5250RadioP; ResourceRequested = Tda5250RadioP; RadioByteComm = Tda5250RadioP; SplitControl = Tda5250RadioP; ClkDiv = Tda5250RadioP; Tda5250RadioP.DelayTimer -> DelayTimer; Tda5250RadioP.ConfigResource -> HplTda5250ConfigC; Tda5250RadioP.DataResource -> HplTda5250DataC; Tda5250RadioP.DataResourceRequested -> HplTda5250DataC; Tda5250RadioP.HplTda5250Config -> HplTda5250ConfigC; Tda5250RadioP.HplTda5250Data -> HplTda5250DataC; Tda5250RadioP.HplTda5250DataControl -> HplTda5250DataC; } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250RadioP.nc000066400000000000000000000376031207233610700214360ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.9 $ * $Date: 2008-06-18 01:25:54 $ * @author: Kevin Klues (klues@tkn.tu-berlin.de) * ======================================================================== */ #include "tda5250Const.h" /* * Controlling the Tda5250 * * Switch modes and initialize. * * @author Kevin Klues * @author Philipp Huppertz * @author Andreas Koepke */ #include "Timer.h" module Tda5250RadioP { provides { interface Init; interface SplitControl; interface Tda5250Control; interface RadioByteComm; interface ResourceRequested; interface ClkDiv; #ifdef LNDW interface RfPower; #endif } uses { interface HplTda5250Config; interface HplTda5250Data; interface HplTda5250DataControl; interface Resource as ConfigResource; interface Resource as DataResource; interface ResourceRequested as DataResourceRequested; interface Alarm as DelayTimer; } } implementation { typedef enum { TRANSMITTER_DELAY, RECEIVER_DELAY, RSSISTABLE_DELAY } delayTimer_t; delayTimer_t delayTimer; // current Mode of the Timer (RssiStable, TxSetupTime, RxSetupTime) radioMode_t radioMode; // Current Mode of the Radio float onTime, offTime; #ifdef LNDW norace bool rfpowerdirty = FALSE; norace uint8_t rfpower = INITIAL_RF_POWER; task void setRfPower() { uint8_t rp, rd; atomic { rp = rfpower; rd = rfpowerdirty; } if(rd) { if(call ConfigResource.immediateRequest() == SUCCESS) { call HplTda5250Config.SetRFPower(rp); atomic rfpowerdirty = FALSE; } else { post setRfPower(); } } } #endif /**************** Radio Init *****************/ command error_t Init.init() { radioMode = RADIO_MODE_OFF; return SUCCESS; } /**************** Radio Start *****************/ task void startDoneTask() { signal ClkDiv.startDone(); signal SplitControl.startDone(SUCCESS); } command error_t SplitControl.start() { radioMode_t mode; atomic mode = radioMode; if(mode == RADIO_MODE_OFF) { atomic radioMode = RADIO_MODE_ON_TRANSITION; return call ConfigResource.request(); } return FAIL; } /**************** Radio Stop *****************/ task void stopDoneTask() { signal SplitControl.stopDone(SUCCESS); } command error_t SplitControl.stop(){ atomic radioMode = RADIO_MODE_OFF_TRANSITION; return call ConfigResource.request(); } /* radioBusy * This function checks whether the radio is busy * so as to decide whether it can perform some operation or not. */ bool radioBusy() { switch(radioMode) { case RADIO_MODE_OFF: case RADIO_MODE_ON_TRANSITION: case RADIO_MODE_OFF_TRANSITION: case RADIO_MODE_TX_TRANSITION: case RADIO_MODE_RX_TRANSITION: case RADIO_MODE_TIMER_TRANSITION: case RADIO_MODE_SELF_POLLING_TRANSITION: case RADIO_MODE_SLEEP_TRANSITION: return TRUE; default: return FALSE; } } void switchConfigResource() { radioMode_t mode; atomic mode = radioMode; switch(mode) { case RADIO_MODE_ON_TRANSITION: call HplTda5250Config.reset(); call HplTda5250Config.SetRFPower(INITIAL_RF_POWER); // call HplTda5250Config.SetClockOnDuringPowerDown(); call ConfigResource.release(); atomic radioMode = RADIO_MODE_ON; post startDoneTask(); break; case RADIO_MODE_OFF_TRANSITION: signal ClkDiv.stopping(); call HplTda5250Config.SetSleepMode(); call ConfigResource.release(); atomic radioMode = RADIO_MODE_OFF; post stopDoneTask(); break; case RADIO_MODE_SLEEP_TRANSITION: signal ClkDiv.stopping(); call HplTda5250Config.SetSlaveMode(); call HplTda5250Config.SetSleepMode(); atomic radioMode = RADIO_MODE_SLEEP; signal Tda5250Control.SleepModeDone(); #ifdef LNDW if(rfpowerdirty) post setRfPower(); #endif break; case RADIO_MODE_TX_TRANSITION: call HplTda5250Config.SetSlaveMode(); call HplTda5250Config.SetTxMode(); if (!(call HplTda5250Config.IsTxRxPinControlled())) call ConfigResource.release(); atomic delayTimer = TRANSMITTER_DELAY; call DelayTimer.start(TDA5250_TRANSMITTER_SETUP_TIME); break; case RADIO_MODE_RX_TRANSITION: call HplTda5250Config.SetSlaveMode(); call HplTda5250Config.SetRxMode(); if (!(call HplTda5250Config.IsTxRxPinControlled())) call ConfigResource.release(); atomic delayTimer = RECEIVER_DELAY; call DelayTimer.start(TDA5250_RECEIVER_SETUP_TIME); break; case RADIO_MODE_TIMER_TRANSITION: call HplTda5250Config.SetTimerMode(onTime, offTime); call ConfigResource.release(); atomic radioMode = RADIO_MODE_TIMER; signal Tda5250Control.TimerModeDone(); break; case RADIO_MODE_SELF_POLLING_TRANSITION: call HplTda5250Config.SetSelfPollingMode(onTime, offTime); call ConfigResource.release(); atomic radioMode = RADIO_MODE_SELF_POLLING; signal Tda5250Control.SelfPollingModeDone(); break; default: break; } } event void ConfigResource.granted() { switchConfigResource(); } void switchDataResource() { radioMode_t mode; atomic mode = radioMode; switch(mode) { case RADIO_MODE_TX_TRANSITION: atomic radioMode = RADIO_MODE_TX; signal Tda5250Control.TxModeDone(); break; case RADIO_MODE_RX_TRANSITION: atomic radioMode = RADIO_MODE_RX; signal Tda5250Control.RxModeDone(); break; default: break; } } event void DataResource.granted() { switchDataResource(); } // information for higher layers that the DataResource has been requested async event void DataResourceRequested.requested() { signal ResourceRequested.requested(); } async event void DataResourceRequested.immediateRequested() { signal ResourceRequested.immediateRequested(); } /** Set the mode of the radio The choices are TIMER_MODE, SELF_POLLING_MODE */ async command error_t Tda5250Control.TimerMode(float on_time, float off_time) { radioMode_t mode; atomic { if(radioBusy() == FALSE) { radioMode = RADIO_MODE_TIMER_TRANSITION; onTime = on_time; offTime = off_time; } mode = radioMode; } if(radioMode == RADIO_MODE_TIMER_TRANSITION) { call DataResource.release(); if (call ConfigResource.immediateRequest() == SUCCESS) { switchConfigResource(); } else { call ConfigResource.request(); } return SUCCESS; } return FAIL; } async command error_t Tda5250Control.ResetTimerMode() { radioMode_t mode; atomic { if(radioBusy() == FALSE) { radioMode = RADIO_MODE_TIMER_TRANSITION; } mode = radioMode; } if(radioMode == RADIO_MODE_TIMER_TRANSITION) { call DataResource.release(); if (call ConfigResource.immediateRequest() == SUCCESS) { switchConfigResource(); } else { call ConfigResource.request(); } return SUCCESS; } return FAIL; } async command error_t Tda5250Control.SelfPollingMode(float on_time, float off_time) { radioMode_t mode; atomic { if(radioBusy() == FALSE) { radioMode = RADIO_MODE_SELF_POLLING_TRANSITION; onTime = on_time; offTime = off_time; } mode = radioMode; } if(radioMode == RADIO_MODE_SELF_POLLING_TRANSITION) { call DataResource.release(); if (call ConfigResource.immediateRequest() == SUCCESS) { switchConfigResource(); } else { call ConfigResource.request(); } return SUCCESS; } return FAIL; } async command error_t Tda5250Control.ResetSelfPollingMode() { radioMode_t mode; atomic { if(radioBusy() == FALSE) { radioMode = RADIO_MODE_SELF_POLLING_TRANSITION; } mode = radioMode; } if(radioMode == RADIO_MODE_SELF_POLLING_TRANSITION) { call DataResource.release(); if (call ConfigResource.immediateRequest() == SUCCESS) { switchConfigResource(); } else { call ConfigResource.request(); } return SUCCESS; } return FAIL; } async command error_t Tda5250Control.SleepMode() { radioMode_t mode; atomic{ if(radioBusy() == FALSE) { radioMode = RADIO_MODE_SLEEP_TRANSITION; } mode = radioMode; } if(mode == RADIO_MODE_SLEEP_TRANSITION) { call DataResource.release(); switchConfigResource(); return SUCCESS; } return FAIL; } async command error_t Tda5250Control.TxMode() { radioMode_t mode; atomic { if(radioBusy() == FALSE) { radioMode = RADIO_MODE_TX_TRANSITION; } mode = radioMode; } if(mode == RADIO_MODE_TX_TRANSITION) { call DataResource.release(); call HplTda5250DataControl.setToTx(); if (call HplTda5250Config.IsTxRxPinControlled()) { switchConfigResource(); } else { if (call ConfigResource.immediateRequest() == SUCCESS) { switchConfigResource(); } else { call ConfigResource.request(); } } return SUCCESS; } return FAIL; } async command error_t Tda5250Control.RxMode() { radioMode_t mode; atomic { if(radioBusy() == FALSE) { radioMode = RADIO_MODE_RX_TRANSITION; } mode = radioMode; } if(mode == RADIO_MODE_RX_TRANSITION) { call DataResource.release(); call HplTda5250DataControl.setToRx(); if (call HplTda5250Config.IsTxRxPinControlled()) { switchConfigResource(); } else { if (call ConfigResource.immediateRequest() == SUCCESS) { switchConfigResource(); } else { call ConfigResource.request(); } } return SUCCESS; } return FAIL; } async event void HplTda5250Data.txReady() { signal RadioByteComm.txByteReady(SUCCESS); } async event void HplTda5250Data.rxDone(uint8_t data) { signal RadioByteComm.rxByteReady(data); } async event void HplTda5250Config.PWDDDInterrupt() { signal Tda5250Control.PWDDDInterrupt(); } async command void RadioByteComm.txByte(uint8_t data) { error_t error = call HplTda5250Data.tx(data); if(error != SUCCESS) { signal RadioByteComm.txByteReady(error); } } async command bool RadioByteComm.isTxDone() { //return call HplTda5250Data.isTxDone(); return TRUE; } /* Generate events (these are no interrupts */ async event void DelayTimer.fired() { delayTimer_t delay; atomic { delay = delayTimer; } switch (delay) { case RSSISTABLE_DELAY : signal Tda5250Control.RssiStable(); break; case RECEIVER_DELAY : signal ClkDiv.startDone(); delayTimer = RSSISTABLE_DELAY; call DelayTimer.start(TDA5250_RSSI_STABLE_TIME-TDA5250_RECEIVER_SETUP_TIME); if (call DataResource.immediateRequest() == SUCCESS) { switchDataResource(); } else { call DataResource.request(); } break; case TRANSMITTER_DELAY : signal ClkDiv.startDone(); if (call DataResource.immediateRequest() == SUCCESS) { switchDataResource(); } else { call DataResource.request(); } break; } } default async event void ResourceRequested.requested() { } default async event void ResourceRequested.immediateRequested() { } default async event void Tda5250Control.TimerModeDone(){ } default async event void Tda5250Control.SelfPollingModeDone(){ } default async event void Tda5250Control.RxModeDone(){ } default async event void Tda5250Control.TxModeDone(){ } default async event void Tda5250Control.SleepModeDone(){ } default async event void Tda5250Control.PWDDDInterrupt() { } default async event void RadioByteComm.rxByteReady(uint8_t data) { } default async event void RadioByteComm.txByteReady(error_t error) { } default async event void ClkDiv.startDone() { } default async event void ClkDiv.stopping() { } #ifdef LNDW async command error_t RfPower.set(uint8_t setting) { atomic { rfpower = setting; rfpowerdirty = TRUE; } return SUCCESS; } #endif } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250ReadReg.nc000066400000000000000000000042521207233610700215630ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * Allows reading of a specified register. See "tda5250RegTypes.h". * ReadReg is parameterized by the register it uses. * * @param reg_type Defines the register to read from. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ interface Tda5250ReadReg { /** * Reads from the paramterized register. * * @return Data content of the register. */ async command reg_type get(); } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250RegComm.nc000066400000000000000000000050641207233610700216050ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /** * Interface for writing and reading bytes to and from the Tda5250 Radio * registers. * * @author: Kevin Klues (klues@tkn.tu-berlin.de) */ interface Tda5250RegComm { /** * Transmit a byte of data to a given register. * * @param address The address of the register to write to. * @param data The 8-bit data value to write to the register. * * @return always SUCCESS. */ async command error_t writeByte(uint8_t address, uint8_t data); /** * Transmit a word of data to a given register. * * @param address The address of the register to write to. * @param data The 16-bit data value to write to the register. * * @return always SUCCESS. */ async command error_t writeWord(uint8_t address, uint16_t data); /** * Read a byte of data from a given register. * * @param address The address of the register to read from. * * @return The 16-bit data value read from the register. */ async command uint8_t readByte(uint8_t address); } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250RegCommP.nc000066400000000000000000000071761207233610700217330ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * @author Kevin Klues (klues@tkn.tu-berlin.de) * ======================================================================== */ module Tda5250RegCommP { provides { interface Init; interface Tda5250RegComm; interface Resource; } uses { interface GeneralIO as BusM; interface Resource as SpiResource; interface SpiByte; } } implementation { command error_t Init.init() { // setting pins to output call BusM.makeOutput(); //initializing pin values call BusM.set(); //Use SPI for writing to Regs return SUCCESS; } async command error_t Resource.request() { return call SpiResource.request(); } async command error_t Resource.immediateRequest() { if(call SpiResource.immediateRequest() == EBUSY) return EBUSY; return SUCCESS; } async command bool Resource.isOwner() { return call SpiResource.isOwner(); } async command error_t Resource.release() { return call SpiResource.release(); } event void SpiResource.granted() { signal Resource.granted(); } async command error_t Tda5250RegComm.writeByte(uint8_t address, uint8_t data) { if(call SpiResource.isOwner() == FALSE) { return FAIL; } call SpiByte.write(address); call SpiByte.write(data); return SUCCESS; } async command error_t Tda5250RegComm.writeWord(uint8_t address, uint16_t data) { if(call SpiResource.isOwner() == FALSE) return FAIL; call SpiByte.write(address); call SpiByte.write(((uint8_t) (data >> 8))); call SpiByte.write(((uint8_t) data)); return SUCCESS; } async command uint8_t Tda5250RegComm.readByte(uint8_t address){ if(call SpiResource.isOwner() == FALSE) return 0x00; call SpiByte.write(address); // FIXME: Put SIMO/SOMI in input return call SpiByte.write(0x00); } } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250RegistersC.nc000066400000000000000000000102271207233610700223230ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * Provides access to the registers of the tda5250 radio. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ configuration Tda5250RegistersC { provides { interface Init; interface Resource; interface Tda5250WriteReg as CONFIG; interface Tda5250WriteReg as FSK; interface Tda5250WriteReg as XTAL_TUNING; interface Tda5250WriteReg as LPF; interface Tda5250WriteReg as ON_TIME; interface Tda5250WriteReg as OFF_TIME; interface Tda5250WriteReg as COUNT_TH1; interface Tda5250WriteReg as COUNT_TH2; interface Tda5250WriteReg as RSSI_TH3; interface Tda5250WriteReg as RF_POWER; interface Tda5250WriteReg as CLK_DIV; interface Tda5250WriteReg as XTAL_CONFIG; interface Tda5250WriteReg as BLOCK_PD; interface Tda5250ReadReg as STATUS; interface Tda5250ReadReg as ADC; } } implementation { components Tda5250RegistersP , Tda5250RadioIOC , Tda5250RegCommC ; Init = Tda5250RegistersP; Init = Tda5250RegCommC; Resource = Tda5250RegCommC; CONFIG = Tda5250RegistersP.CONFIG; FSK = Tda5250RegistersP.FSK; XTAL_TUNING = Tda5250RegistersP.XTAL_TUNING; LPF = Tda5250RegistersP.LPF; ON_TIME = Tda5250RegistersP.ON_TIME; OFF_TIME = Tda5250RegistersP.OFF_TIME; COUNT_TH1 = Tda5250RegistersP.COUNT_TH1; COUNT_TH2 = Tda5250RegistersP.COUNT_TH2; RSSI_TH3 = Tda5250RegistersP.RSSI_TH3; RF_POWER = Tda5250RegistersP.RF_POWER; CLK_DIV = Tda5250RegistersP.CLK_DIV; XTAL_CONFIG = Tda5250RegistersP.XTAL_CONFIG; BLOCK_PD = Tda5250RegistersP.BLOCK_PD; STATUS = Tda5250RegistersP.STATUS; ADC = Tda5250RegistersP.ADC; Tda5250RegistersP.Pot -> Tda5250RegCommC; Tda5250RegistersP.Tda5250RegComm -> Tda5250RegCommC; Tda5250RegistersP.ENTDA -> Tda5250RadioIOC.Tda5250RadioENTDA; } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250RegistersP.nc000066400000000000000000000127241207233610700223440ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * Tda5250RegistersP Module * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ module Tda5250RegistersP { provides { interface Init; interface Tda5250WriteReg as CONFIG; interface Tda5250WriteReg as FSK; interface Tda5250WriteReg as XTAL_TUNING; interface Tda5250WriteReg as LPF; interface Tda5250WriteReg as ON_TIME; interface Tda5250WriteReg as OFF_TIME; interface Tda5250WriteReg as COUNT_TH1; interface Tda5250WriteReg as COUNT_TH2; interface Tda5250WriteReg as RSSI_TH3; interface Tda5250WriteReg as RF_POWER; interface Tda5250WriteReg as CLK_DIV; interface Tda5250WriteReg as XTAL_CONFIG; interface Tda5250WriteReg as BLOCK_PD; interface Tda5250ReadReg as STATUS; interface Tda5250ReadReg as ADC; } uses { interface Tda5250RegComm; interface Pot; interface GeneralIO as ENTDA; } } implementation { error_t writeByte(uint8_t addr, uint16_t data) { error_t result; call ENTDA.clr(); result = call Tda5250RegComm.writeByte(addr, data); call ENTDA.set(); return result; } error_t writeWord(uint8_t addr, uint16_t data) { error_t result; call ENTDA.clr(); result = call Tda5250RegComm.writeWord(addr, data); call ENTDA.set(); return result; } uint8_t readByte(uint8_t addr) { uint8_t result; call ENTDA.clr(); result = call Tda5250RegComm.readByte(addr); call ENTDA.set(); return result; } command error_t Init.init() { // setting pins to output call ENTDA.makeOutput(); // initializing pin values call ENTDA.set(); return SUCCESS; } async command error_t CONFIG.set(uint16_t data) { return writeWord(TDA5250_REG_ADDR_CONFIG, data); }; async command error_t FSK.set(uint16_t data) { return writeWord(TDA5250_REG_ADDR_FSK, data); }; async command error_t XTAL_TUNING.set(uint16_t data) { return writeWord(TDA5250_REG_ADDR_XTAL_TUNING, data); }; async command error_t LPF.set(uint8_t data) { return writeByte(TDA5250_REG_ADDR_LPF, data); }; async command error_t ON_TIME.set(uint16_t data) { return writeWord(TDA5250_REG_ADDR_ON_TIME, data); }; async command error_t OFF_TIME.set(uint16_t data) { return writeWord(TDA5250_REG_ADDR_OFF_TIME, data); }; async command error_t COUNT_TH1.set(uint16_t data) { return writeWord(TDA5250_REG_ADDR_COUNT_TH1, data); }; async command error_t COUNT_TH2.set(uint16_t data) { return writeWord(TDA5250_REG_ADDR_COUNT_TH2, data); }; async command error_t RSSI_TH3.set(uint8_t data) { return writeByte(TDA5250_REG_ADDR_RSSI_TH3, data); }; async command error_t RF_POWER.set(uint8_t data) { return call Pot.set(data); }; async command error_t CLK_DIV.set(uint8_t data) { return writeByte(TDA5250_REG_ADDR_CLK_DIV, data); }; async command error_t XTAL_CONFIG.set(uint8_t data) { return writeByte(TDA5250_REG_ADDR_XTAL_CONFIG, data); }; async command error_t BLOCK_PD.set(uint16_t data) { return writeWord(TDA5250_REG_ADDR_BLOCK_PD, data); }; async command uint8_t STATUS.get() { return readByte(TDA5250_REG_ADDR_STATUS); }; async command uint8_t ADC.get() { return readByte(TDA5250_REG_ADDR_ADC); }; } tinyos-2.1.2+dfsg/tos/chips/tda5250/Tda5250WriteReg.nc000066400000000000000000000043561207233610700220070ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * Allows writing to a specified register. See "tda5250RegTypes.h". * WriteReg is parameterized by the register it uses. * * @param reg_type Defines the register to write to. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ interface Tda5250WriteReg { /** * Writes to the parametrized register. * * @param v Data written to the register. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t set(reg_type v); } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/000077500000000000000000000000001207233610700175205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/ChannelCongestion.nc000066400000000000000000000037561207233610700234560ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface of MAC to inform any interested party on current congestion state * in radio neighborhood. * @author Andreas Koepke (koepke at tkn.tu-berlin.de) */ interface ChannelCongestion { /** * signal current congestion level. There are 5 levels, 0 means no * congestion, 5 means high congestion */ async event void congestionEvent(uint8_t level); } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/CsmaMacC.nc000066400000000000000000000070401207233610700214520ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Configuration for the CsmaMac. * * @author: Kevin Klues (klues@tkn.tu-berlin.de) * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de) */ // #define MAC_DEBUG configuration CsmaMacC { provides { interface SplitControl; interface MacSend; interface MacReceive; interface Packet; } uses { interface PhySend as PacketSend; interface PhyReceive as PacketReceive; interface Packet as SubPacket; interface Tda5250Control; interface UartPhyControl; interface RadioTimeStamping; } } implementation { components Tda5250RadioC, CsmaMacP, RssiFixedThresholdCMC as Cca, new Alarm32khz16C() as Timer, new TimerMilliC() as ReRxTimer, DuplicateC, TimeDiffC, LocalTimeC, RandomLfsrC #ifdef MAC_DEBUG ,PlatformLedsC #endif ; SplitControl = CsmaMacP; MacSend = CsmaMacP; MacReceive = CsmaMacP; Tda5250Control = CsmaMacP; UartPhyControl = CsmaMacP; RadioTimeStamping = CsmaMacP; CsmaMacP = Packet; CsmaMacP = SubPacket; CsmaMacP = PacketSend; CsmaMacP = PacketReceive; CsmaMacP.CcaStdControl -> Cca.StdControl; CsmaMacP.ChannelMonitor -> Cca.ChannelMonitor; CsmaMacP.ChannelMonitorData -> Cca.ChannelMonitorData; CsmaMacP.ChannelMonitorControl -> Cca.ChannelMonitorControl; CsmaMacP.RssiAdcResource -> Cca.RssiAdcResource; components ActiveMessageAddressC; CsmaMacP.amAddress -> ActiveMessageAddressC; CsmaMacP.Random -> RandomLfsrC; CsmaMacP.RadioResourceRequested -> Tda5250RadioC.ResourceRequested; CsmaMacP.Timer -> Timer; CsmaMacP.ReRxTimer -> ReRxTimer; CsmaMacP.Duplicate -> DuplicateC; CsmaMacP.TimeDiff16 -> TimeDiffC; CsmaMacP.LocalTime32kHz -> LocalTimeC; #ifdef MACM_DEBUG components new SerialDebugC() as SD; CsmaMacP.SerialDebug -> SD; #endif } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/CsmaMacP.nc000066400000000000000000000635001207233610700214720ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include "radiopacketfunctions.h" #include "flagfunctions.h" #include "PacketAck.h" /** * An implementation of a Csma Mac. * * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * @author: Kevin Klues (klues@tkn.tu-berlin.de) * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de) */ // #define MACM_DEBUG // debug... module CsmaMacP { provides { interface SplitControl; interface MacSend; interface MacReceive; interface Packet; } uses { interface StdControl as CcaStdControl; interface PhySend as PacketSend; interface PhyReceive as PacketReceive; interface RadioTimeStamping; interface Tda5250Control as RadioModes; interface ResourceRequested as RadioResourceRequested; interface UartPhyControl; interface Packet as SubPacket; interface ChannelMonitor; interface ChannelMonitorControl; interface ChannelMonitorData; interface Resource as RssiAdcResource; interface Random; interface Timer as ReRxTimer; interface Duplicate; interface TimeDiff16; interface Alarm as Timer; async command am_addr_t amAddress(); interface LocalTime as LocalTime32kHz; #ifdef MACM_DEBUG interface SerialDebug; #endif } } implementation { /****** debug vars & defs & functions ***********************/ #ifdef MACM_DEBUG void sdDebug(uint16_t p) { call SerialDebug.putPlace(p); }; #else void sdDebug(uint16_t p) {}; #endif /******* constants and type definitions *********************/ enum { BYTE_TIME=ENCODED_32KHZ_BYTE_TIME, // phy encoded PREAMBLE_BYTE_TIME=TDA5250_32KHZ_BYTE_TIME, // no coding PHY_HEADER_TIME=6*PREAMBLE_BYTE_TIME, // 6 Phy Preamble TIME_CORRECTION=TDA5250_32KHZ_BYTE_TIME+2, // difference between txSFD and rxSFD SUB_HEADER_TIME=PHY_HEADER_TIME + sizeof(tda5250_header_t)*BYTE_TIME, SUB_FOOTER_TIME=2*BYTE_TIME, // 2 bytes crc MAXTIMERVALUE=0xFFFF, // helps to compute backoff DATA_DETECT_TIME=17, RX_SETUP_TIME=102, // time to set up receiver TX_SETUP_TIME=58, // time to set up transmitter ADDED_DELAY = 30, RX_ACK_TIMEOUT=RX_SETUP_TIME + PHY_HEADER_TIME + 2*ADDED_DELAY, TX_GAP_TIME=RX_ACK_TIMEOUT + TX_SETUP_TIME + 33, MAX_SHORT_RETRY=7, MAX_LONG_RETRY=4, BACKOFF_MASK=0xFFF, // minimum time around one packet time MIN_PREAMBLE_BYTES=2, TOKEN_ACK_FLAG = 64, TOKEN_ACK_MASK = 0x3f, INVALID_SNR = 0xffff }; /**************** Module Global Variables *****************/ /* state vars & defs */ typedef enum { CCA, // clear channel assessment CCA_ACK, SW_RX, // switch to receive RX, // rx mode done, listening & waiting for packet SW_RX_ACK, RX_ACK, RX_ACK_P, RX_P, SW_TX, TX, SW_TX_ACK, TX_ACK, INIT } macState_t; /* flags */ typedef enum { RSSI_STABLE = 1, RESUME_BACKOFF = 2, CANCEL_SEND = 4, CCA_PENDING = 8 } flags_t; /* Packet vars */ message_t* txBufPtr = NULL; message_t ackMsg; uint8_t txLen; uint8_t shortRetryCounter = 0; uint8_t longRetryCounter = 0; unsigned checkCounter; macState_t macState = INIT; uint8_t flags = 0; uint8_t seqNo; uint16_t restLaufzeit; uint16_t rssiValue = 0; uint32_t rxTime = 0; /****** Secure switching of radio modes ***/ task void SetRxModeTask(); task void SetTxModeTask(); task void ReleaseAdcTask() { macState_t ms; atomic ms = macState; if(isFlagSet(&flags, CCA_PENDING)) { post ReleaseAdcTask(); } else { if((ms > CCA) && (ms != INIT) && call RssiAdcResource.isOwner()) { call RssiAdcResource.release(); } } } void setRxMode(); void setTxMode(); void requestAdc() { if(macState != INIT) { call RssiAdcResource.immediateRequest(); } else { call RssiAdcResource.request(); } } void setRxMode() { rssiValue = INVALID_SNR; if(call RadioModes.RxMode() == FAIL) { post SetRxModeTask(); } if(macState == INIT) { requestAdc(); } else { post ReleaseAdcTask(); } } task void SetRxModeTask() { atomic { if((macState == SW_RX) || (macState == SW_RX_ACK) || (macState == INIT)) setRxMode(); } } void setTxMode() { clearFlag(&flags, RSSI_STABLE); if(call RadioModes.TxMode() == FAIL) { post SetTxModeTask(); } post ReleaseAdcTask(); } task void SetTxModeTask() { atomic { if((macState == SW_TX) || (macState == SW_TX_ACK)) setTxMode(); } } /**************** Helper functions ********/ task void postponeReRx() { call ReRxTimer.startOneShot(5000); } uint16_t backoff(uint8_t counter) { uint16_t mask = BACKOFF_MASK >> (MAX_LONG_RETRY - counter); return (call Random.rand16() & mask); } void interruptBackoffTimer() { if(call Timer.isRunning()) { restLaufzeit = call TimeDiff16.computeDelta(call Timer.getAlarm(), call Timer.getNow()); call Timer.stop(); if(restLaufzeit > BACKOFF_MASK) { restLaufzeit = call Random.rand16() & 0xFF; } setFlag(&flags, RESUME_BACKOFF); } } void storeStrength(message_t *m) { if(rssiValue != INVALID_SNR) { (getMetadata(m))->strength = rssiValue; } else { if(call RssiAdcResource.isOwner()) { (getMetadata(m))->strength = call ChannelMonitorData.readSnr(); } else { (getMetadata(m))->strength = 1; } } } void signalSendDone(error_t error) { message_t *m; error_t e = error; atomic { m = txBufPtr; txBufPtr = 0; txLen = 0; longRetryCounter = 0; shortRetryCounter = 0; if(isFlagSet(&flags, CANCEL_SEND)) { e = ECANCEL; } storeStrength(m); clearFlag(&flags, CANCEL_SEND); } signal MacSend.sendDone(m, e); } void updateLongRetryCounters() { longRetryCounter++; shortRetryCounter = 1; if(longRetryCounter > MAX_LONG_RETRY) { sdDebug(13); getMetadata(txBufPtr)->ack = WAS_NOT_ACKED; signalSendDone(FAIL); } } void updateRetryCounters() { shortRetryCounter++; if(shortRetryCounter > MAX_SHORT_RETRY) { longRetryCounter++; shortRetryCounter = 1; if(longRetryCounter > MAX_LONG_RETRY) { getMetadata(txBufPtr)->ack = WAS_NOT_ACKED; signalSendDone(FAIL); } } } void computeBackoff() { if(!isFlagSet(&flags, RESUME_BACKOFF)) { setFlag(&flags, RESUME_BACKOFF); restLaufzeit = backoff(longRetryCounter); updateRetryCounters(); sdDebug(92); } } bool isNewMsg(message_t* msg) { return call Duplicate.isNew(getHeader(msg)->src, getHeader(msg)->dest, (getHeader(msg)->token) & TOKEN_ACK_MASK); } void rememberMsg(message_t* msg) { call Duplicate.remember(getHeader(msg)->src, getHeader(msg)->dest, (getHeader(msg)->token) & TOKEN_ACK_MASK); } void checkSend() { if((txBufPtr != NULL) && (macState == RX) && (!call Timer.isRunning())) { macState = CCA; checkCounter = 0; requestAdc(); call Timer.start(DATA_DETECT_TIME); sdDebug(170); } else { sdDebug(171); post ReleaseAdcTask(); } } bool needsAckRx(message_t* msg) { bool rVal = FALSE; uint8_t token; if(getHeader(msg)->dest < AM_BROADCAST_ADDR) { token = getHeader(msg)->token; if(isFlagSet(&token, ACK_REQUESTED)) rVal = TRUE; } return rVal; } bool needsAckTx(message_t* msg) { bool rVal = FALSE; if(getHeader(msg)->dest < AM_BROADCAST_ADDR) { if((getMetadata(msg)->ack == ACK_REQUESTED) || (getMetadata(msg)->ack != NO_ACK_REQUESTED)) { rVal = TRUE; } } return rVal; } void prepareAck(message_t* msg) { uint8_t rToken = getHeader(msg)->token & TOKEN_ACK_MASK; setFlag(&rToken, TOKEN_ACK_FLAG); getHeader(&ackMsg)->token = rToken; getHeader(&ackMsg)->src = call amAddress(); getHeader(&ackMsg)->dest = getHeader(msg)->src; getHeader(&ackMsg)->type = getHeader(msg)->type; } bool msgIsForMe(message_t* msg) { if(getHeader(msg)->dest == AM_BROADCAST_ADDR) return TRUE; if(getHeader(msg)->dest == call amAddress()) return TRUE; return FALSE; } bool ackIsForMe(message_t* msg) { uint8_t localToken = seqNo; setFlag(&localToken, TOKEN_ACK_FLAG); if((getHeader(msg)->dest == call amAddress()) && (localToken == getHeader(msg)->token)) return TRUE; return FALSE; } bool isControl(message_t* m) { uint8_t token = getHeader(m)->token; return isFlagSet(&token, TOKEN_ACK_FLAG); } /**************** SplitControl *****************/ task void StartDoneTask() { atomic { macState = RX; call UartPhyControl.setNumPreambles(MIN_PREAMBLE_BYTES); } post ReleaseAdcTask(); signal SplitControl.startDone(SUCCESS); } command error_t SplitControl.start() { call CcaStdControl.start(); atomic { macState = INIT; setRxMode(); sdDebug(1); } return SUCCESS; } task void StopDone() { atomic { if (macState != RX) { post StopDone(); sdDebug(2); } else { sdDebug(3); call Timer.stop(); txBufPtr = NULL; macState = INIT; shortRetryCounter = 0; longRetryCounter = 0; flags = 0; signal SplitControl.stopDone(SUCCESS); } } } command error_t SplitControl.stop() { call CcaStdControl.stop(); sdDebug(4); post StopDone(); return SUCCESS; } /****** Packet interface ********************/ command void Packet.clear(message_t* msg) { call SubPacket.clear(msg); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg,len); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength(); } command void* Packet.getPayload(message_t* msg, uint8_t len) { return call SubPacket.getPayload(msg, len); } /****** Radio(Mode) events *************************/ async event void RadioModes.RssiStable() { atomic { setFlag(&flags, RSSI_STABLE); if(macState == INIT) { sdDebug(11); if(call RssiAdcResource.isOwner()) { call ChannelMonitorControl.updateNoiseFloor(); } } else { sdDebug(12); } } } async event void RadioModes.RxModeDone() { post postponeReRx(); atomic { if(macState == SW_RX) { sdDebug(21); macState = RX; if(isFlagSet(&flags, RESUME_BACKOFF)) { clearFlag(&flags, RESUME_BACKOFF); call Timer.start(restLaufzeit); } else { call Timer.start(backoff(longRetryCounter)); } } else if(macState == SW_RX_ACK) { sdDebug(22); macState = RX_ACK; } else if(macState == INIT) { sdDebug(24); } else { sdDebug(25); } } } async event void RadioModes.TxModeDone() { post postponeReRx(); atomic { if(macState == SW_TX) { sdDebug(30); if(txBufPtr) { macState = TX; if(call PacketSend.send(txBufPtr, txLen) == SUCCESS) { sdDebug(31); } else { sdDebug(32); } } } else if(macState == SW_TX_ACK) { macState = TX_ACK; if(call PacketSend.send(&ackMsg, 0) == SUCCESS) { sdDebug(53); } else { sdDebug(54); } } else { sdDebug(33); } } } /****** MacSend events *************************/ async command error_t MacSend.send(message_t* msg, uint8_t len) { error_t err = SUCCESS; atomic { if((shortRetryCounter == 0) && (txBufPtr == NULL) && (macState != INIT)) { sdDebug(40); shortRetryCounter = 1; longRetryCounter = 1; txBufPtr = msg; txLen = len; sdDebug(10); sdDebug(len); seqNo++; if(seqNo >= TOKEN_ACK_FLAG) seqNo = 1; getHeader(msg)->token = seqNo; if(needsAckTx(msg)) getHeader(msg)->token |= ACK_REQUESTED; if(macState != RX_P) checkSend(); } else { sdDebug(41); err = EBUSY; } } return err; } async command error_t MacSend.cancel(message_t* msg) { error_t err = SUCCESS; if((shortRetryCounter != 0) && (txBufPtr == msg) && (macState != TX) && (macState != RX_ACK) && (macState != SW_RX_ACK)) { sdDebug(50); shortRetryCounter = 0; txBufPtr = NULL; txLen = 0; signal MacSend.sendDone(msg, ECANCEL); } else { sdDebug(51); err = FAIL; } return err; } /****** PacketSerializer events **********************/ async event void PacketReceive.receiveDetected() { rssiValue = INVALID_SNR; if(macState <= RX_ACK) { sdDebug(60); interruptBackoffTimer(); if(macState == CCA) computeBackoff(); } if(macState <= RX) { sdDebug(61); macState = RX_P; requestAdc(); } else if(macState <= RX_ACK) { sdDebug(62); macState = RX_ACK_P; } else if(macState == INIT) { sdDebug(63); } else { post ReleaseAdcTask(); sdDebug(64); } } async event message_t* PacketReceive.receiveDone(message_t* msg, void* payload, uint8_t len, error_t error) { message_t* m = msg; bool isCnt; macState_t action = RX; if(macState == RX_P) { if(error == SUCCESS) { sdDebug(82); isCnt = isControl(msg); if(msgIsForMe(msg)) { if(!isCnt) { storeStrength(msg); if(isNewMsg(m)) { m = signal MacReceive.receiveDone(msg); rememberMsg(m); } if(needsAckRx(msg)) { sdDebug(87); action = CCA_ACK; } else { sdDebug(88); } } else { sdDebug(89); } } else { sdDebug(90); } } else { sdDebug(91); } } else if(macState == RX_ACK_P) { if(error == SUCCESS) { if(ackIsForMe(msg)) { sdDebug(92); (getMetadata(txBufPtr))->ack = WAS_ACKED; signalSendDone(SUCCESS); } else { sdDebug(93); updateLongRetryCounters(); } } else { if(call Timer.isRunning()) { sdDebug(94); action = RX_ACK; } else { sdDebug(95); if(needsAckTx(txBufPtr)) { updateLongRetryCounters(); } else { signalSendDone(SUCCESS); } } } } else if(macState == INIT) { action = INIT; } if(action == CCA_ACK) { prepareAck(msg); macState = CCA_ACK; call Timer.start(RX_SETUP_TIME - TX_SETUP_TIME + ADDED_DELAY); } else if(action == RX_ACK) { macState = RX_ACK; } else if(action == RX) { macState = RX; if(isFlagSet(&flags, RESUME_BACKOFF)) { clearFlag(&flags, RESUME_BACKOFF); call Timer.start(restLaufzeit); } else { call Timer.start(backoff(longRetryCounter)); } } else if(action == TX) { macState = SW_TX; setTxMode(); } else if(action == INIT) { } else { sdDebug(94); } post ReleaseAdcTask(); return m; } async event void PacketSend.sendDone(message_t* msg, error_t error) { if(macState == TX) { if(needsAckTx(msg)) { sdDebug(97); macState = SW_RX_ACK; call Timer.start(RX_ACK_TIMEOUT); } else { sdDebug(99); signalSendDone(error); macState = SW_RX; } setRxMode(); } else if(macState == TX_ACK) { macState = SW_RX; setRxMode(); } post ReleaseAdcTask(); } /****** Timer ******************************/ void checkOnBusy() { if(macState == CCA) { computeBackoff(); macState = RX; requestAdc(); sdDebug(150); if(!call Timer.isRunning()) call Timer.start(TX_GAP_TIME >> 1); } else if(macState == RX) { if(!call Timer.isRunning()) call Timer.start(TX_GAP_TIME + backoff(0)); } } void checkOnIdle() { if(macState == RX) { checkSend(); } else if(macState == CCA) { checkCounter++; if(checkCounter < 3) { sdDebug(158); call Timer.start((TX_GAP_TIME + backoff(0))>>1); requestAdc(); } else { call Timer.stop(); sdDebug(159); macState = SW_TX; setTxMode(); } } } async event void Timer.fired() { sdDebug(100); if(macState == CCA) { if((!call RssiAdcResource.isOwner()) || (call ChannelMonitor.start() != SUCCESS)) { if(call UartPhyControl.isBusy()) { sdDebug(101); checkOnBusy(); } else { sdDebug(102); checkOnIdle(); } } else { setFlag(&flags, CCA_PENDING); } } else if(macState == RX_ACK) { if(needsAckTx(txBufPtr)) { sdDebug(103); updateLongRetryCounters(); macState = RX; call Timer.start(backoff(longRetryCounter)); } else { sdDebug(104); } } else if(macState == CCA_ACK) { sdDebug(160); macState = SW_TX_ACK; setTxMode(); } else if((macState == RX_ACK_P) || (macState == RX_P)) { sdDebug(108); } else if(macState == INIT) { sdDebug(109); post StartDoneTask(); } else { sdDebug(110); checkSend(); } } /****** ChannelMonitor events *********************/ async event void ChannelMonitor.channelBusy() { clearFlag(&flags, CCA_PENDING); sdDebug(120); checkOnBusy(); } async event void ChannelMonitor.channelIdle() { clearFlag(&flags, CCA_PENDING); sdDebug(121); checkOnIdle(); } /****** ChannelMonitorControl events **************/ event void ChannelMonitorControl.updateNoiseFloorDone() { if(macState == INIT) { sdDebug(122); post StartDoneTask(); } else { sdDebug(124); } } /***** ChannelMonitorData events ******************/ async event void ChannelMonitorData.getSnrDone(int16_t data) { atomic if((macState == RX_P) || (macState == RX_ACK_P)) rssiValue = data; post ReleaseAdcTask(); } /***** unused Radio Modes events **************************/ async event void RadioModes.TimerModeDone() {} async event void RadioModes.SleepModeDone() { atomic setRxMode(); } async event void RadioModes.SelfPollingModeDone() {} async event void RadioModes.PWDDDInterrupt() {} event void ReRxTimer.fired() { atomic { if((macState == RX) && (call RadioModes.SleepMode() == SUCCESS)) { // ok } else { post postponeReRx(); } } } /***** abused TimeStamping events **************************/ async event void RadioTimeStamping.receivedSFD( uint16_t time ) { if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr(); if(macState == RX_P) { rxTime = call LocalTime32kHz.get(); call ChannelMonitor.rxSuccess(); } } async event void RadioTimeStamping.transmittedSFD( uint16_t time, message_t* p_msg ) { if((macState == TX) && (p_msg == txBufPtr)) { // to do } } /***** Rssi Resource events ******************/ event void RssiAdcResource.granted() { macState_t ms; atomic ms = macState; if((ms == INIT) && isFlagSet(&flags, RSSI_STABLE)) { sdDebug(145); call ChannelMonitorControl.updateNoiseFloor(); } else { sdDebug(146); call RssiAdcResource.release(); } } /***** RadioData Resource events **************/ async event void RadioResourceRequested.requested() { atomic { /* This gives other devices the chance to get the Resource because RxMode implies a new arbitration round. */ if (macState == RX) setRxMode(); } } // we don't care about urgent Resource requestes async event void RadioResourceRequested.immediateRequested() {} } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/Duplicate.h000066400000000000000000000037751207233610700216170ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * constants and definitions for duplicate detector * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ #ifndef DUPLICATE_H #define DUPLICATE_H typedef struct known_t { am_addr_t src; am_addr_t dest; uint8_t seqno; uint8_t age; } known_t; enum { TABLE_ENTRIES=16, MAX_AGE=0xff, AGE_INTERVALL = 1024, // every second increase the age of the messages }; #endif tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/Duplicate.nc000066400000000000000000000041111207233610700217510ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Keep information for the MAC protocols to suppress duplicates. * @author Andreas Koepke (koepke at tkn.tu-berlin.de) */ interface Duplicate { /** check whether this message is a new message, does not store anything */ async command bool isNew(am_addr_t src, am_addr_t dest, uint8_t seqno); /** remember the fingerprint of this message, stores/updates the information */ async command void remember(am_addr_t src, am_addr_t dest, uint8_t seqno); } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/DuplicateC.nc000066400000000000000000000043301207233610700220570ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Helper component for MAC protocols to suppress duplicates * To do: turn it into a generic? * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ #include "Duplicate.h" configuration DuplicateC { provides { interface Duplicate; } } implementation { components MainC; components new TimerMilliC() as Timer; components DuplicateP; Duplicate = DuplicateP; DuplicateP.Timer -> Timer; // make information soft state MainC.SoftwareInit -> DuplicateP; #ifdef DUPLICATE_DEBUG components new SerialDebugC() as SD; DuplicateP.SerialDebug -> SD; #endif } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/DuplicateP.nc000066400000000000000000000111271207233610700220760ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Helper component for MAC protocols to suppress duplicates * To do: turn it into a generic? * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ module DuplicateP { provides { interface Duplicate; interface Init; } uses { interface Timer as Timer; #ifdef DUPLICATE_DEBUG interface SerialDebug; #endif } } implementation { known_t knownTable[TABLE_ENTRIES]; #ifdef DUPLICATE_DEBUG void sdDebug(uint16_t p) { call SerialDebug.putPlace(p); } known_t dupOldest; unsigned last; task void dump() { sdDebug(3000 + last); sdDebug(dupOldest.src); sdDebug(dupOldest.dest); sdDebug(dupOldest.seqno); sdDebug(dupOldest.age); sdDebug(4000); sdDebug(knownTable[last].src); sdDebug(knownTable[last].dest); sdDebug(knownTable[last].seqno); sdDebug(knownTable[last].age); sdDebug(5000); } #else void sdDebug(uint16_t p) {}; #endif /** helper functions */ task void ageMsgsTask() { unsigned i; for(i = 0; i < TABLE_ENTRIES; i++) { atomic { if(knownTable[i].age < MAX_AGE) ++knownTable[i].age; } } } unsigned findOldest() { unsigned i; unsigned oldIndex = 0; unsigned age = knownTable[oldIndex].age; for(i = 1; i < TABLE_ENTRIES; i++) { if(age < knownTable[i].age) { oldIndex = i; age = knownTable[i].age; } } return oldIndex; } /*** duplicate interface */ async command bool Duplicate.isNew(am_addr_t src, am_addr_t dest, uint8_t seqno) { bool rVal = TRUE; unsigned i; for(i=0; i < TABLE_ENTRIES; i++) { if((knownTable[i].age < MAX_AGE) && (src == knownTable[i].src) && (dest == knownTable[i].dest) && (seqno == knownTable[i].seqno)) { knownTable[i].age = 0; rVal = FALSE; break; } } sdDebug(100 + rVal); sdDebug(200 + i); return rVal; } async command void Duplicate.remember(am_addr_t src, am_addr_t dest, uint8_t seqno) { unsigned oldest = findOldest(); #ifdef DUPLICATE_DEBUG dupOldest = knownTable[oldest]; last = oldest; post dump(); #endif knownTable[oldest].src = src; knownTable[oldest].dest = dest; knownTable[oldest].seqno = seqno; knownTable[oldest].age = 0; post ageMsgsTask(); } /** helper interfaces */ event void Timer.fired() { call Timer.startOneShot(AGE_INTERVALL); post ageMsgsTask(); } command error_t Init.init(){ uint8_t i; for(i = 0; i < TABLE_ENTRIES; i++) { atomic { knownTable[i].age = MAX_AGE; } } call Timer.startOneShot(AGE_INTERVALL); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/RedMac.h000066400000000000000000000042421207233610700210260ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * packet headers for RedMac primitive messages * - Author -------------------------------------------------------------- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ #ifndef RED_MAC_H #define RED_MAC_H typedef nx_struct red_mac_header_t { nx_uint8_t repetitionCounter; nx_uint32_t time; // processing delay of message } red_mac_header_t; #define RELIABLE_MCAST_MIN_ADDR 0xE000 #endif tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/RedMacC.nc000066400000000000000000000104761207233610700213100ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * low power nonpersistent CSMA MAC, rendez-vous via redundantly sent packets * - Author -------------------------------------------------------------- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ // #define REDMAC_DEBUG #ifdef REDMAC_PERFORMANCE #include #endif configuration RedMacC { provides { interface SplitControl; interface MacSend; interface MacReceive; interface Packet; interface Sleeptime; interface ChannelCongestion; #ifdef MAC_EVAL interface MacEval; #endif } uses { interface PhySend as PacketSend; interface PhyReceive as PacketReceive; interface Packet as SubPacket; interface Tda5250Control; interface UartPhyControl; interface RadioTimeStamping; } } implementation { components MainC, RedMacP, RssiFixedThresholdCMC as Cca, new Alarm32khz16C() as Timer, new Alarm32khz16C() as SampleTimer, RandomLfsrC, LocalTimeC, DuplicateC, TimeDiffC; components ActiveMessageAddressC; RedMacP.amAddress -> ActiveMessageAddressC; MainC.SoftwareInit -> RedMacP; SplitControl = RedMacP; MacSend = RedMacP; MacReceive = RedMacP; Tda5250Control = RedMacP; UartPhyControl = RedMacP; RadioTimeStamping = RedMacP; ChannelCongestion = RedMacP; RedMacP = PacketSend; RedMacP = PacketReceive; RedMacP = SubPacket; RedMacP = Packet; RedMacP = Sleeptime; RedMacP.CcaStdControl -> Cca.StdControl; RedMacP.ChannelMonitor -> Cca.ChannelMonitor; RedMacP.ChannelMonitorData -> Cca.ChannelMonitorData; RedMacP.ChannelMonitorControl -> Cca.ChannelMonitorControl; RedMacP.RssiAdcResource -> Cca.RssiAdcResource; MainC.SoftwareInit -> RandomLfsrC; RedMacP.Random -> RandomLfsrC; RedMacP.Timer -> Timer; RedMacP.SampleTimer -> SampleTimer; RedMacP.LocalTime32kHz -> LocalTimeC; RedMacP.Duplicate -> DuplicateC; RedMacP.TimeDiff16 -> TimeDiffC; RedMacP.TimeDiff32 -> TimeDiffC; /* components PlatformLedsC; RedMacP.Led0 -> PlatformLedsC.Led0; RedMacP.Led1 -> PlatformLedsC.Led1; RedMacP.Led2 -> PlatformLedsC.Led2; RedMacP.Led3 -> PlatformLedsC.Led3; */ #ifdef MAC_EVAL MacEval = RedMacP; #endif #ifdef REDMAC_DEBUG components new SerialDebugC() as SD; RedMacP.SerialDebug -> SD; #endif #ifdef REDMAC_PERFORMANCE components new PerformanceC() as Perf; RedMacP.Performance -> Perf; #endif #ifdef DELTATIMEDEBUG components DeltaTraceC; RedMacP.DeltaTrace -> DeltaTraceC; #endif } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/RedMacP.nc000066400000000000000000001254561207233610700213320ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * low power nonpersistent CSMA MAC, rendez-vous via redundantly sent packets * - Author -------------------------------------------------------------- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ #include "radiopacketfunctions.h" #include "flagfunctions.h" #include "PacketAck.h" #include "RedMac.h" #ifdef DELTATIMEDEBUG #include "DeltaTrace.h" #endif module RedMacP { provides { interface Init; interface SplitControl; interface MacSend; interface MacReceive; interface Packet; interface Sleeptime; interface Teamgeist; interface ChannelCongestion; #ifdef MAC_EVAL interface MacEval; #endif } uses { interface StdControl as CcaStdControl; interface PhySend as PacketSend; interface PhyReceive as PacketReceive; interface RadioTimeStamping; interface Tda5250Control as RadioModes; interface UartPhyControl; interface ChannelMonitor; interface ChannelMonitorControl; interface ChannelMonitorData; interface Resource as RssiAdcResource; interface Random; interface Packet as SubPacket; interface Alarm as Timer; interface Alarm as SampleTimer; interface LocalTime as LocalTime32kHz; interface Duplicate; interface TimeDiff16; interface TimeDiff32; async command am_addr_t amAddress(); /* interface GeneralIO as Led0; interface GeneralIO as Led1; interface GeneralIO as Led2; interface GeneralIO as Led3; */ #ifdef REDMAC_DEBUG interface SerialDebug; #endif #ifdef REDMAC_PERFORMANCE interface Performance; #endif #ifdef DELTATIMEDEBUG interface DeltaTrace; #endif } } implementation { /****** MAC State machine *********************************/ typedef enum { RX, RX_ACK, CCA, CCA_ACK, RX_P, RX_ACK_P, SLEEP, TX, TX_ACK, INIT, STOP } macState_t; macState_t macState; /****** debug vars & defs & functions ***********************/ #ifdef REDMAC_DEBUG void sdDebug(uint16_t p) { call SerialDebug.putPlace(p); } uint8_t repCounter; #else void sdDebug(uint16_t p) {}; #endif #ifdef REDMAC_PERFORMANCE PfmTxMsg_t txStat; PfmRxMsg_t rxStat; #endif /**************** Module Global Constants *****************/ enum { BYTE_TIME=ENCODED_32KHZ_BYTE_TIME, // phy encoded PREAMBLE_BYTE_TIME=TDA5250_32KHZ_BYTE_TIME, // no coding PHY_HEADER_TIME=6*PREAMBLE_BYTE_TIME, // 6 Phy Preamble TIME_CORRECTION=TDA5250_32KHZ_BYTE_TIME+2, // difference between txSFD and rxSFD SUB_HEADER_TIME=PHY_HEADER_TIME + sizeof(message_header_t)*BYTE_TIME, SUB_FOOTER_TIME=2*BYTE_TIME, // 2 bytes crc // DEFAULT_SLEEP_TIME=1625, #ifndef DEFAULT_SLEEP_TIME DEFAULT_SLEEP_TIME=2048, // DEFAULT_SLEEP_TIME=4096, // DEFAULT_SLEEP_TIME=8192, // DEFAULT_SLEEP_TIME=16384, // DEFAULT_SLEEP_TIME=32768U, // DEFAULT_SLEEP_TIME=65535U, #endif DATA_DETECT_TIME=17, RX_SETUP_TIME=102, // time to set up receiver TX_SETUP_TIME=58, // time to set up transmitter ADDED_DELAY = 30, RX_ACK_TIMEOUT = RX_SETUP_TIME + PHY_HEADER_TIME + ADDED_DELAY + 30, TX_GAP_TIME = RX_ACK_TIMEOUT + TX_SETUP_TIME + 33, // the duration of a send ACK ACK_DURATION = SUB_HEADER_TIME + SUB_FOOTER_TIME, NAV_FACTOR = 4, #ifndef MAC_EVAL MAX_SHORT_RETRY=9, MAX_LONG_RETRY=3, ADD_NAV = 2, INCREASE_BACKOFF = TRUE, #endif TOKEN_ACK_FLAG = 64, TOKEN_ACK_MASK = 0x3f, INVALID_SNR = 0xffff, // PREAMBLE_LONG = 5, // PREAMBLE_SHORT = 2, // reduced minimal backoff ZERO_BACKOFF_MASK = 0xff }; #ifdef MAC_EVAL uint8_t MAX_SHORT_RETRY = 9; uint8_t MAX_LONG_RETRY = 3; uint8_t ADD_NAV = 4; bool INCREASE_BACKOFF = TRUE; #endif #ifdef DELTATIMEDEBUG DeltaTrace_t dTrace; #endif /**************** Module Global Variables *****************/ /* flags */ typedef enum { SWITCHING = 1, RSSI_STABLE = 2, UNHANDLED_PACKET = 4, MESSAGE_PREPARED = 8, RESUME_BACKOFF = 16, CANCEL_SEND = 32, ACTION_DETECTED = 64, TEAMGEIST_ACTIVE=128 } flags_t; uint8_t flags = 0; uint8_t checkCounter = 0; uint8_t shortRetryCounter = 0; uint8_t longRetryCounter = 0; uint16_t networkSleeptime = DEFAULT_SLEEP_TIME; uint16_t localSleeptime = DEFAULT_SLEEP_TIME; uint16_t rssiValue = 0; uint32_t restLaufzeit = 0; uint32_t rxTime = 0; am_id_t teamgeistType = 0; uint8_t congestionLevel = 0; message_t *txBufPtr = NULL; uint16_t txLen = 0; red_mac_header_t *txMacHdr = NULL; uint16_t seqNo; message_t ackMsg; uint16_t MIN_BACKOFF_MASK; /****** Secure switching of radio modes ***/ void interruptBackoffTimer(); task void SetRxModeTask(); task void SetTxModeTask(); task void SetSleepModeTask(); task void ReleaseAdcTask() { bool release = FALSE; atomic { if((macState >= SLEEP) && call RssiAdcResource.isOwner()) { release = TRUE; } } if(release) call RssiAdcResource.release(); } void requestAdc() { if(!call RssiAdcResource.isOwner()) { call RssiAdcResource.immediateRequest(); } } void setRxMode() { setFlag(&flags, SWITCHING); clearFlag(&flags, RSSI_STABLE); // sdDebug(10); checkCounter = 0; rssiValue = INVALID_SNR; if(call RadioModes.RxMode() == FAIL) { post SetRxModeTask(); } else { #ifdef REDMAC_PERFORMANCE call Performance.macRxMode(); #endif } requestAdc(); } task void SetRxModeTask() { atomic { if(isFlagSet(&flags, SWITCHING) && ((macState <= CCA) || (macState == INIT))) setRxMode(); } } void setSleepMode() { // sdDebug(20); clearFlag(&flags, RSSI_STABLE); post ReleaseAdcTask(); setFlag(&flags, SWITCHING); if(call RadioModes.SleepMode() == FAIL) { post SetSleepModeTask(); } else { #ifdef REDMAC_PERFORMANCE call Performance.macSleepMode(); #endif } } task void SetSleepModeTask() { atomic if(isFlagSet(&flags, SWITCHING) && ((macState == SLEEP) || (macState == STOP))) setSleepMode(); } void setTxMode() { post ReleaseAdcTask(); // sdDebug(30); clearFlag(&flags, RSSI_STABLE); setFlag(&flags, SWITCHING); if(call RadioModes.TxMode() == FAIL) { post SetTxModeTask(); } else { #ifdef REDMAC_PERFORMANCE call Performance.macTxMode(); #endif } } task void SetTxModeTask() { atomic { if(isFlagSet(&flags, SWITCHING) && ((macState == TX) || (macState == TX_ACK))) setTxMode(); } } /**************** Helper functions ************************/ void computeBackoff(); void checkSend() { if((shortRetryCounter) && (txBufPtr != NULL) && (isFlagSet(&flags, MESSAGE_PREPARED)) && (macState == SLEEP) && (!isFlagSet(&flags, RESUME_BACKOFF)) && (!call Timer.isRunning())) { // sdDebug(40); macState = CCA; checkCounter = 0; setRxMode(); } /* else { if(txBufPtr) // sdDebug(41); if(shortRetryCounter) // sdDebug(42); if(isFlagSet(&flags, MESSAGE_PREPARED)) // sdDebug(43); if(txBufPtr) { if(macState == SLEEP) // sdDebug(44); if(!isFlagSet(&flags, RESUME_BACKOFF)) // sdDebug(45); if(!call Timer.isRunning()) // sdDebug(46); } } */ } uint32_t backoff(uint8_t counter) { uint32_t rVal = call Random.rand16() & MIN_BACKOFF_MASK; if(!INCREASE_BACKOFF) counter = 1; return (rVal << counter) + ZERO_BACKOFF_MASK; } bool needsAckTx(message_t* msg) { bool rVal = FALSE; if(getHeader(msg)->dest < AM_BROADCAST_ADDR) { if(getMetadata(msg)->ack != NO_ACK_REQUESTED) { rVal = TRUE; } } return rVal; } bool needsAckRx(message_t* msg, uint8_t *level) { bool rVal = FALSE; am_addr_t dest = getHeader(msg)->dest; uint8_t token; uint16_t snr = 1; if(dest < AM_BROADCAST_ADDR) { if(dest < RELIABLE_MCAST_MIN_ADDR) { token = getHeader(msg)->token; if(isFlagSet(&token, ACK_REQUESTED)) { rVal = TRUE; } } else { if(isFlagSet(&flags, TEAMGEIST_ACTIVE) && (getHeader(msg)->type == teamgeistType)) { if(rssiValue != INVALID_SNR) snr = rssiValue; *level = 2; rVal = signal Teamgeist.needsAck(msg, getHeader(msg)->src, getHeader(msg)->dest, snr); } } } return rVal; } task void PrepareMsgTask() { message_t *msg; uint8_t length; red_mac_header_t *macHdr; uint16_t sT; atomic { msg = txBufPtr; length = txLen; sT = networkSleeptime; } if(msg == NULL) return; macHdr = (red_mac_header_t *)call SubPacket.getPayload(msg, sizeof(red_mac_header_t)); macHdr->repetitionCounter = sT/(length * BYTE_TIME + SUB_HEADER_TIME + SUB_FOOTER_TIME + TX_GAP_TIME) + 1; atomic { if((longRetryCounter > 1) && isFlagSet(&flags, TEAMGEIST_ACTIVE) && (getHeader(msg)->type == teamgeistType)) { getHeader(msg)->dest = signal Teamgeist.getDestination(msg, longRetryCounter - 1); } getHeader(msg)->token = seqNo; if(needsAckTx(msg)) getHeader(msg)->token |= ACK_REQUESTED; txMacHdr = macHdr; setFlag(&flags, MESSAGE_PREPARED); if((macState == SLEEP) && (!call Timer.isRunning()) && (!isFlagSet(&flags, RESUME_BACKOFF))) { if((longRetryCounter == 1) && (getHeader(msg)->dest != AM_BROADCAST_ADDR)) { call Timer.start((call Random.rand16() >> 3) & ZERO_BACKOFF_MASK); } else { sdDebug(332); sdDebug(macHdr->repetitionCounter); call Timer.start(backoff(longRetryCounter)); } } #ifdef REDMAC_PERFORMANCE txStat.type = getHeader(msg)->type; txStat.to = getHeader(msg)->dest; txStat.token = getHeader(msg)->token; txStat.maxRepCounter = macHdr->repetitionCounter; txStat.creationTime = getMetadata(msg)->time; #endif getMetadata(msg)->maxRepetitions = macHdr->repetitionCounter; } } void storeStrength(message_t *m) { if(rssiValue != INVALID_SNR) { (getMetadata(m))->strength = rssiValue; } else { if(call RssiAdcResource.isOwner()) { (getMetadata(m))->strength = call ChannelMonitorData.readSnr(); } else { (getMetadata(m))->strength = 1; } } } bool prepareRepetition() { bool repeat; atomic { if(isFlagSet(&flags, CANCEL_SEND)) { repeat = txMacHdr->repetitionCounter = 0; } else { repeat = txMacHdr->repetitionCounter; txMacHdr->repetitionCounter--; } } return repeat; } void signalSendDone(error_t error) { message_t *m; error_t e = error; // sdDebug(50); atomic { m = txBufPtr; txBufPtr = NULL; txLen = 0; #ifdef REDMAC_PERFORMANCE txStat.repCounter = txMacHdr->repetitionCounter; txStat.longRetry = longRetryCounter; txStat.shortRetry = shortRetryCounter; #endif longRetryCounter = 0; shortRetryCounter = 0; storeStrength(m); if(isFlagSet(&flags, CANCEL_SEND)) { e = ECANCEL; } clearFlag(&flags, MESSAGE_PREPARED); clearFlag(&flags, CANCEL_SEND); } // sdDebug(3000 + e); // sdDebug(4000 + getHeader(m)->type); signal MacSend.sendDone(m, e); #ifdef REDMAC_PERFORMANCE txStat.success = e; txStat.strength = getMetadata(m)->strength; call Performance.macTxMsgStats(&txStat); #endif } void updateRetryCounters() { shortRetryCounter++; if(shortRetryCounter > MAX_SHORT_RETRY) { longRetryCounter++; shortRetryCounter = 1; if(longRetryCounter > MAX_LONG_RETRY) { // sdDebug(60); signalSendDone(FAIL); } } } void updateLongRetryCounters() { atomic { clearFlag(&flags, MESSAGE_PREPARED); longRetryCounter++; shortRetryCounter = 1; if(longRetryCounter > MAX_LONG_RETRY) { // sdDebug(70); signalSendDone(FAIL); } else { post PrepareMsgTask(); } } } bool ackIsForMe(message_t* msg) { uint8_t localToken = seqNo; setFlag(&localToken, TOKEN_ACK_FLAG); if((getHeader(msg)->dest == call amAddress()) && (localToken == getHeader(msg)->token)) return TRUE; return FALSE; } void interruptBackoffTimer() { if(call Timer.isRunning()) { restLaufzeit = call TimeDiff16.computeDelta(call Timer.getAlarm(), call Timer.getNow()); call Timer.stop(); if(restLaufzeit > MIN_BACKOFF_MASK << MAX_LONG_RETRY) { restLaufzeit = call Random.rand16() & ZERO_BACKOFF_MASK; } setFlag(&flags, RESUME_BACKOFF); } } void computeBackoff() { if(!isFlagSet(&flags, RESUME_BACKOFF)) { setFlag(&flags, RESUME_BACKOFF); restLaufzeit = backoff(longRetryCounter); updateRetryCounters(); } } bool msgIsForMe(message_t* msg) { if(getHeader(msg)->dest == AM_BROADCAST_ADDR) return TRUE; if(getHeader(msg)->dest == call amAddress()) return TRUE; if(getHeader(msg)->dest >= RELIABLE_MCAST_MIN_ADDR) return TRUE; return FALSE; } bool isControl(message_t* m) { uint8_t token = getHeader(m)->token; return isFlagSet(&token, TOKEN_ACK_FLAG); } bool isNewMsg(message_t* msg) { return call Duplicate.isNew(getHeader(msg)->src, getHeader(msg)->dest, (getHeader(msg)->token) & TOKEN_ACK_MASK); } void rememberMsg(message_t* msg) { call Duplicate.remember(getHeader(msg)->src, getHeader(msg)->dest, (getHeader(msg)->token) & TOKEN_ACK_MASK); } void prepareAck(message_t* msg) { uint8_t rToken = getHeader(msg)->token & TOKEN_ACK_MASK; setFlag(&rToken, TOKEN_ACK_FLAG); getHeader(&ackMsg)->token = rToken; getHeader(&ackMsg)->src = call amAddress(); getHeader(&ackMsg)->dest = getHeader(msg)->src; getHeader(&ackMsg)->type = getHeader(msg)->type; #ifdef REDMAC_DEBUG repCounter = ((red_mac_header_t *) call SubPacket.getPayload(msg, sizeof(red_mac_header_t)))->repetitionCounter; #endif } uint32_t calcGeneratedTime(red_mac_header_t *m) { uint32_t lt = rxTime - m->time - TIME_CORRECTION; #ifdef DELTATIMEDEBUG dTrace.now = rxTime; dTrace.msgTime = lt; dTrace.delta = m->time; call DeltaTrace.traceRx(&dTrace); #endif return lt; } /**************** Init ************************/ command error_t Init.init(){ atomic { macState = INIT; seqNo = call Random.rand16() % TOKEN_ACK_FLAG; for(MIN_BACKOFF_MASK = 1; MIN_BACKOFF_MASK < networkSleeptime; ) { MIN_BACKOFF_MASK = (MIN_BACKOFF_MASK << 1) + 1; } MIN_BACKOFF_MASK >>= 2; } #ifdef REDMAC_DEBUG call SerialDebug.putShortDesc("RedMacP"); #endif return SUCCESS; } /**************** SplitControl *****************/ task void StartDoneTask() { // sdDebug(90); atomic { call SampleTimer.start(localSleeptime); macState = SLEEP; setFlag(&flags, TEAMGEIST_ACTIVE); teamgeistType = signal Teamgeist.observedAMType(); } signal SplitControl.startDone(SUCCESS); } command error_t SplitControl.start() { call CcaStdControl.start(); atomic { macState = INIT; setRxMode(); // sdDebug(100); } return SUCCESS; } task void StopDoneTask() { call Init.init(); // sdDebug(110); signal SplitControl.stopDone(SUCCESS); } command error_t SplitControl.stop() { call CcaStdControl.stop(); call Timer.stop(); call SampleTimer.stop(); atomic { if((macState == SLEEP) && isFlagSet(&flags, SWITCHING)) { macState = STOP; // sdDebug(120); } else { macState = STOP; setSleepMode(); // sdDebug(121); } } return SUCCESS; } /****** Packet interface ********************/ command void Packet.clear(message_t* msg) { call SubPacket.clear(msg); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(red_mac_header_t); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg,len + sizeof(red_mac_header_t)); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(red_mac_header_t); } command void* Packet.getPayload(message_t* msg, uint8_t len) { nx_uint8_t *payload = (nx_uint8_t *)call SubPacket.getPayload(msg, len + sizeof(red_mac_header_t)); return (void*)(payload + sizeof(red_mac_header_t)); } /****** Radio(Mode) events *************************/ async event void RadioModes.RssiStable() { setFlag(&flags, RSSI_STABLE); if((macState == RX) || (macState == CCA)) { call Timer.start(DATA_DETECT_TIME); // sdDebug(130); } else if(macState == RX_P) { // sdDebug(131); if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr(); } else if(macState == RX_ACK) { } else if(macState == RX_ACK_P) { } else if(macState == INIT) { // sdDebug(133); if(call RssiAdcResource.isOwner()) { call ChannelMonitorControl.updateNoiseFloor(); } else { call RssiAdcResource.request(); } } else if(macState == STOP) { // sdDebug(134); } else { // sdDebug(135); } } async event void RadioModes.RxModeDone() { atomic { clearFlag(&flags, SWITCHING); if((macState == RX) || (macState == RX_ACK) || (macState == CCA) || (macState == INIT) || (macState == STOP)) { // sdDebug(140); if(macState != RX_ACK) requestAdc(); } else { // sdDebug(141); } } } async event void RadioModes.TxModeDone() { // sdDebug(150); atomic { clearFlag(&flags, SWITCHING); if(macState == TX) { setFlag(&flags, ACTION_DETECTED); if(call PacketSend.send(txBufPtr, txLen) == SUCCESS) { // sdDebug(151); } else { // sdDebug(152); } } else if(macState == TX_ACK) { if(call PacketSend.send(&ackMsg, 0) == SUCCESS) { // sdDebug(153); } else { // sdDebug(154); } } else { // sdDebug(155); } } } async event void RadioModes.SleepModeDone() { // sdDebug(160); atomic { clearFlag(&flags, SWITCHING); if(isFlagSet(&flags, ACTION_DETECTED)) { if(congestionLevel < 5) congestionLevel++; } else { if(congestionLevel > 0) congestionLevel--; } // if(congestionLevel > 3) // sdDebug(2000 + congestionLevel); if(macState == SLEEP) { // sdDebug(161); if(!call Timer.isRunning()) { // sdDebug(162); if(isFlagSet(&flags, RESUME_BACKOFF)) { // sdDebug(164); clearFlag(&flags, RESUME_BACKOFF); call Timer.start(restLaufzeit); restLaufzeit = 0; } else { // sdDebug(165); checkSend(); } } } else if(macState == STOP) { // sdDebug(168); post StopDoneTask(); } signal ChannelCongestion.congestionEvent(congestionLevel); } } /****** MacSend events *************************/ async command error_t MacSend.send(message_t* msg, uint8_t len) { error_t err = SUCCESS; atomic { if((shortRetryCounter == 0) && (txBufPtr == NULL)) { clearFlag(&flags, MESSAGE_PREPARED); // sdDebug(5000 + getHeader(msg)->type); shortRetryCounter = 1; longRetryCounter = 1; txBufPtr = msg; txLen = len + sizeof(red_mac_header_t); seqNo++; if(seqNo >= TOKEN_ACK_FLAG) seqNo = 1; #ifdef REDMAC_PERFORMANCE txStat.payloadLength = txLen; txStat.interfaceTime = call LocalTime32kHz.get(); #endif } else { // sdDebug(171); err = EBUSY; } } if(err == SUCCESS) { post PrepareMsgTask(); } return err; } async command error_t MacSend.cancel(message_t* msg) { error_t err = FAIL; atomic { if(msg == txBufPtr) { // sdDebug(320); setFlag(&flags, CANCEL_SEND); shortRetryCounter = MAX_SHORT_RETRY + 2; longRetryCounter = MAX_LONG_RETRY + 2; if(macState == SLEEP) { // sdDebug(321); signalSendDone(ECANCEL); } else { // sdDebug(322); } // sdDebug(1000 + macState); err = SUCCESS; } else { // sdDebug(323); // sdDebug(1100 + macState); } } return err; } /****** PacketSerializer events **********************/ async event void PacketReceive.receiveDetected() { rssiValue = INVALID_SNR; setFlag(&flags, ACTION_DETECTED); call ChannelMonitor.rxSuccess(); if(macState <= CCA_ACK) { if(macState == CCA) { computeBackoff(); #ifdef REDMAC_PERFORMANCE call Performance.macDetectedOnCca(); #endif } if(macState != RX_ACK) { macState = RX_P; } else { macState = RX_ACK_P; } } else if(macState == INIT) { // sdDebug(180); setFlag(&flags, UNHANDLED_PACKET); } } async event message_t* PacketReceive.receiveDone(message_t* msg, void* payload, uint8_t len, error_t error) { message_t *m = msg; macState_t action = STOP; uint32_t nav = 0; uint8_t level = 0; bool isCnt; #ifdef REDMAC_PERFORMANCE rxStat.duplicate = PERF_UNKNOWN; rxStat.repCounter = 0xff; #endif // sdDebug(190); if(macState == RX_P) { // sdDebug(191); if(error == SUCCESS) { // sdDebug(192); isCnt = isControl(msg); if(msgIsForMe(msg)) { if(!isCnt) { // sdDebug(193); if(isNewMsg(msg)) { #ifdef REDMAC_PERFORMANCE rxStat.duplicate = PERF_NEW_MSG; #endif // sdDebug(194); storeStrength(msg); #ifdef DELTATIMEDEBUG dTrace.sender = getHeader(msg)->src; #endif getMetadata(msg)->sfdtime = rxTime; getMetadata(msg)->time = calcGeneratedTime((red_mac_header_t*) payload); getMetadata(msg)->ack = WAS_NOT_ACKED; m = signal MacReceive.receiveDone(msg); // assume a buffer swap -- if buffer is not swapped, assume that the // message was not successfully delivered to upper layers if(m != msg) { // sdDebug(195); rememberMsg(msg); } else { // sdDebug(196); action = RX; #ifdef REDMAC_PERFORMANCE call Performance.macQueueFull(); #endif } } else { #ifdef REDMAC_PERFORMANCE rxStat.duplicate = PERF_REPEATED_MSG; #endif } if(needsAckRx(msg, &level) && (action != RX)) { action = CCA_ACK; if(level == 2) { getMetadata(msg)->ack = WAS_ACKED; } } else { // sdDebug(198); if(action != RX) { nav = ((red_mac_header_t*)payload)->repetitionCounter * (SUB_HEADER_TIME + getHeader(msg)->length*BYTE_TIME + SUB_FOOTER_TIME + RX_ACK_TIMEOUT + TX_SETUP_TIME) + ACK_DURATION; action = SLEEP; } } } else { // sdDebug(199); action = RX; } } else { // sdDebug(200); action = SLEEP; if(!isCnt) { nav = ((red_mac_header_t*)payload)->repetitionCounter * (SUB_HEADER_TIME + getHeader(msg)->length*BYTE_TIME + SUB_FOOTER_TIME + RX_ACK_TIMEOUT + TX_SETUP_TIME) + ACK_DURATION; } } } else { // sdDebug(201); action = SLEEP; } } else if(macState == RX_ACK_P) { if(error == SUCCESS) { if(ackIsForMe(msg)) { // sdDebug(202); getMetadata(txBufPtr)->ack = WAS_ACKED; getMetadata(txBufPtr)->repetitions = txMacHdr->repetitionCounter; if(isFlagSet(&flags, TEAMGEIST_ACTIVE) && (getHeader(txBufPtr)->type == teamgeistType)) { signal Teamgeist.gotAck(txBufPtr, getHeader(msg)->src, getMetadata(txBufPtr)->strength); } // sdDebug(203); signalSendDone(SUCCESS); // sdDebug(30000 + getHeader(msg)->src); action = SLEEP; } else { // sdDebug(203); updateLongRetryCounters(); // this will eventually schedule the right backoff macState = SLEEP; // so much traffic is going on -- take a nap setSleepMode(); action = INIT; // a difficult way to say: do nothing } } else { if(call Timer.isRunning()) { // sdDebug(204); action = RX_ACK; } else { // sdDebug(205); updateLongRetryCounters(); action = RX; } } } else { // sdDebug(206); action = INIT; } if(action == CCA_ACK) { macState = CCA_ACK; if(call Random.rand16() & 2) { call Timer.start(RX_SETUP_TIME - TX_SETUP_TIME + 16 - level*8 + ADDED_DELAY); } else { macState = TX_ACK; call Timer.start(RX_SETUP_TIME - TX_SETUP_TIME + 16); } prepareAck(msg); } else if(action == RX_ACK) { macState = RX_ACK; } else if(action == RX) { macState = RX; checkCounter = 0; call Timer.start(DATA_DETECT_TIME); } else if(action == SLEEP) { macState = SLEEP; if(isFlagSet(&flags, RESUME_BACKOFF)) { nav = nav*(uint32_t)ADD_NAV/(uint32_t)NAV_FACTOR; if(nav > restLaufzeit) restLaufzeit += nav; } else { setFlag(&flags, RESUME_BACKOFF); restLaufzeit = call Random.rand16() & ZERO_BACKOFF_MASK; } setSleepMode(); } else if(action == INIT) { clearFlag(&flags, UNHANDLED_PACKET); } else { // sdDebug(207); } #ifdef REDMAC_PERFORMANCE if(error == SUCCESS) { rxStat.type = getHeader(msg)->type; rxStat.from = getHeader(msg)->src; rxStat.to = getHeader(msg)->dest; rxStat.token = getHeader(msg)->token; if(!isControl(msg)) rxStat.repCounter = ((red_mac_header_t*)payload)->repetitionCounter; rxStat.payloadLength = len; rxStat.strength = rssiValue; rxStat.creationTime = getMetadata(msg)->time; call Performance.macRxStats(&rxStat); } #endif return m; } async event void PacketSend.sendDone(message_t* msg, error_t error) { if(macState == TX) { macState = RX_ACK; setRxMode(); call Timer.start(RX_ACK_TIMEOUT); // sdDebug(220); checkCounter = 0; } else if(macState == TX_ACK) { checkCounter = 0; macState = SLEEP; setSleepMode(); // macState = RX; // setRxMode(); // sdDebug(221); #ifdef REDMAC_DEBUG // sdDebug(40000U + repCounter); #endif } } /***** TimeStamping stuff **************************/ async event void RadioTimeStamping.receivedSFD( uint16_t time ) { if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr(); if(macState == RX_P) { rxTime = call LocalTime32kHz.get(); call ChannelMonitor.rxSuccess(); } } async event void RadioTimeStamping.transmittedSFD( uint16_t time, message_t* p_msg ) { if((macState == TX) && (p_msg == txBufPtr)) { #ifdef DELTATIMEDEBUG dTrace.now = call LocalTime32kHz.get(); dTrace.msgTime = getMetadata(p_msg)->time; dTrace.delta = call TimeDiff32.computeDelta(dTrace.now, dTrace.msgTime); txMacHdr->time = dTrace.delta; call DeltaTrace.traceTx(&dTrace); getMetadata(p_msg)->sfdtime = dTrace.now; #else getMetadata(p_msg)->sfdtime = call LocalTime32kHz.get(); txMacHdr->time = call TimeDiff32.computeDelta(getMetadata(p_msg)->sfdtime, getMetadata(p_msg)->time); #endif } } /****** Timer ******************************/ void checkOnBusy() { setFlag(&flags, ACTION_DETECTED); if((macState == RX) || (macState == CCA) || (macState == CCA_ACK)) { if(macState == CCA) { computeBackoff(); #ifdef REDMAC_PERFORMANCE call Performance.macBusyOnCca(); #endif } requestAdc(); // sdDebug(230); macState = RX; checkCounter = 0; call Timer.start(TX_GAP_TIME>>1); } } void checkOnIdle() { if(macState == RX) { checkCounter++; if(checkCounter >= 3) { // sdDebug(240); macState = SLEEP; setSleepMode(); } else { // sdDebug(241); call Timer.start(TX_GAP_TIME >> 1); requestAdc(); } } else if(macState == CCA) { checkCounter++; if(checkCounter < 3) { // sdDebug(242); call Timer.start(TX_GAP_TIME >> 1); requestAdc(); } else { // sdDebug(243); macState = TX; setTxMode(); #ifdef REDMAC_PERFORMANCE call Performance.macIdleOnCca(); txStat.txModeTime = call LocalTime32kHz.get(); #endif } } else if(macState == CCA_ACK) { // sdDebug(244); macState = TX_ACK; setTxMode(); // sdDebug(20000 + getHeader(&ackMsg)->dest); #ifdef REDMAC_PERFORMANCE call Performance.macTxAckStats(getHeader(&ackMsg)->type, getHeader(&ackMsg)->dest, getHeader(&ackMsg)->token); #endif } } async event void Timer.fired() { // sdDebug(250); if((macState == RX) || (macState == CCA) || (macState == CCA_ACK)) { if((!call RssiAdcResource.isOwner()) || (call ChannelMonitor.start() != SUCCESS)) { if(call UartPhyControl.isBusy()) { // sdDebug(251); checkOnBusy(); } else { // sdDebug(252); checkOnIdle(); } } } else if(macState == RX_ACK) { if(prepareRepetition()) { // sdDebug(253); macState = TX; setTxMode(); } else { if(needsAckTx(txBufPtr)) { // sdDebug(254); #ifdef REDMAC_PERFORMANCE call Performance.macAckTimeout(); #endif updateLongRetryCounters(); } else { // sdDebug(255); signalSendDone(SUCCESS); } macState = SLEEP; setSleepMode(); } } else if(macState == TX_ACK) { setTxMode(); // sdDebug(10000 + getHeader(&ackMsg)->dest); } else if(macState == SLEEP) { if(isFlagSet(&flags, SWITCHING)) { // sdDebug(256); call Timer.start(call Random.rand16() & 0x0f); } else { if(isFlagSet(&flags, RESUME_BACKOFF)) { // sdDebug(261); clearFlag(&flags, RESUME_BACKOFF); call Timer.start(restLaufzeit); restLaufzeit = 0; } else { // sdDebug(262); checkSend(); } } } else if((macState == RX_ACK_P) || (macState == RX_P)) { // sdDebug(258); } else if(macState == INIT) { // sdDebug(259); post StartDoneTask(); } else { // sdDebug(260); } } /****** SampleTimer ******************************/ async event void SampleTimer.fired() { call SampleTimer.start(localSleeptime); // sdDebug(270); if((macState == SLEEP) && (!isFlagSet(&flags, SWITCHING))) { clearFlag(&flags, ACTION_DETECTED); interruptBackoffTimer(); macState = RX; // sdDebug(271); setRxMode(); call Timer.stop(); } } /***** Sleeptime **********************************/ async command void Sleeptime.setLocalSleeptime(uint16_t sT) { atomic localSleeptime = sT; } async command uint16_t Sleeptime.getLocalSleeptime() { uint16_t st; atomic st = localSleeptime; return st; } async command void Sleeptime.setNetworkSleeptime(uint16_t sT) { atomic { networkSleeptime = sT; for(MIN_BACKOFF_MASK = 1; MIN_BACKOFF_MASK < sT; ) { MIN_BACKOFF_MASK = (MIN_BACKOFF_MASK << 1) + 1; } MIN_BACKOFF_MASK >>= 3; } } async command uint16_t Sleeptime.getNetworkSleeptime() { uint16_t st; atomic st = networkSleeptime; return st; } /****** ChannelMonitor events *********************/ async event void ChannelMonitor.channelBusy() { // sdDebug(280); checkOnBusy(); } async event void ChannelMonitor.channelIdle() { // sdDebug(281); checkOnIdle(); } /****** ChannelMonitorControl events **************/ event void ChannelMonitorControl.updateNoiseFloorDone() { if(macState == INIT) { // sdDebug(290); call Timer.start(call Random.rand16() % localSleeptime); setSleepMode(); } else { // sdDebug(291); } } /***** ChannelMonitorData events ******************/ async event void ChannelMonitorData.getSnrDone(int16_t data) { atomic if((macState == RX_P) || (macState == RX_ACK_P)) rssiValue = data; } /***** Rssi Resource events ******************/ event void RssiAdcResource.granted() { macState_t ms; atomic ms = macState; if(ms < SLEEP) { // sdDebug(300); } else if(ms == INIT) { // sdDebug(301); call ChannelMonitorControl.updateNoiseFloor(); } else { // sdDebug(302); post ReleaseAdcTask(); } } /***** default Teamgeist events **************************/ default event am_id_t Teamgeist.observedAMType() { clearFlag(&flags, TEAMGEIST_ACTIVE); return teamgeistType; } default async event bool Teamgeist.needsAck(message_t *msg, am_addr_t src, am_addr_t dest, uint16_t snr) { clearFlag(&flags, TEAMGEIST_ACTIVE); return TRUE; } default async event uint8_t Teamgeist.estimateForwarders(message_t *msg) { return 1; } default async event am_addr_t Teamgeist.getDestination(message_t *msg, uint8_t retryCounter) { return getHeader(msg)->dest; } default async event void Teamgeist.gotAck(message_t *msg, am_addr_t ackSender, uint16_t snr) { } default async event void ChannelCongestion.congestionEvent(uint8_t level) {} /***** Mac Eval *******************************************/ #ifdef MAC_EVAL async command void MacEval.setBackoffMask(uint16_t mask) { atomic MIN_BACKOFF_MASK = mask; } async command void MacEval.increaseBackoff(bool value) { atomic INCREASE_BACKOFF = value; } async command void MacEval.addNav(uint8_t value) { atomic ADD_NAV = value; } async command void MacEval.setLongRetry(uint8_t lr) { atomic MAX_LONG_RETRY = lr; } async command void MacEval.setShortRetry(uint8_t sr) { atomic MAX_SHORT_RETRY = sr; } #endif /***** unused Radio Modes events **************************/ async event void RadioModes.TimerModeDone() {} async event void RadioModes.SelfPollingModeDone() {} async event void RadioModes.PWDDDInterrupt() {} } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/Sleeptime.nc000066400000000000000000000053431207233610700217760ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface to control the duty cycle of the MAC * @author Andreas Koepke (koepke at tkn.tu-berlin.de) */ interface Sleeptime { /** * set the sleep time of the MAC in units of a 32kHz clock, the setting * takes effect on the next wakeup. * * Caution 1: To avoid synchroninization of the wake up times, some * additional randomization can be necessary, esp. when * switching from shorter to longer sleep times. * Caution 2: The local sleep time must be equal or shorter than the * network sleep time */ async command void setLocalSleeptime(uint16_t sT); /** * which sleep time is in effect? */ async command uint16_t getLocalSleeptime(); /** * set the expected sleep time of the network -- this defines how long this * node will attempt to wake up a remote node. * Caution: The local sleep time must be equal or shorter than the * network sleep time */ async command void setNetworkSleeptime(uint16_t sT); /** * how long do we expect our neighbors to sleep? */ async command uint16_t getNetworkSleeptime(); } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/SpeckMacDC.nc000066400000000000000000000105451207233610700217440ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * low power nonpersistent CSMA MAC, rendez-vous via redundantly sent packets * - Author -------------------------------------------------------------- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ // #define SPECKMAC_DEBUG #ifdef SPECKMAC_PERFORMANCE #include #endif configuration SpeckMacDC { provides { interface SplitControl; interface MacSend; interface MacReceive; interface Packet; interface Sleeptime; interface ChannelCongestion; #ifdef MAC_EVAL interface MacEval; #endif } uses { interface PhySend as PacketSend; interface PhyReceive as PacketReceive; interface Packet as SubPacket; interface Tda5250Control; interface UartPhyControl; interface RadioTimeStamping; } } implementation { components MainC, SpeckMacDP, RssiFixedThresholdCMC as Cca, new Alarm32khz16C() as Timer, new Alarm32khz16C() as SampleTimer, RandomLfsrC, LocalTimeC, DuplicateC, TimeDiffC; components ActiveMessageAddressC; SpeckMacDP.amAddress -> ActiveMessageAddressC; MainC.SoftwareInit -> SpeckMacDP; SplitControl = SpeckMacDP; MacSend = SpeckMacDP; MacReceive = SpeckMacDP; Tda5250Control = SpeckMacDP; UartPhyControl = SpeckMacDP; RadioTimeStamping = SpeckMacDP; ChannelCongestion = SpeckMacDP; SpeckMacDP = PacketSend; SpeckMacDP = PacketReceive; SpeckMacDP = SubPacket; SpeckMacDP = Packet; SpeckMacDP = Sleeptime; SpeckMacDP.CcaStdControl -> Cca.StdControl; SpeckMacDP.ChannelMonitor -> Cca.ChannelMonitor; SpeckMacDP.ChannelMonitorData -> Cca.ChannelMonitorData; SpeckMacDP.ChannelMonitorControl -> Cca.ChannelMonitorControl; SpeckMacDP.RssiAdcResource -> Cca.RssiAdcResource; MainC.SoftwareInit -> RandomLfsrC; SpeckMacDP.Random -> RandomLfsrC; SpeckMacDP.Timer -> Timer; SpeckMacDP.SampleTimer -> SampleTimer; SpeckMacDP.LocalTime32kHz -> LocalTimeC; SpeckMacDP.Duplicate -> DuplicateC; SpeckMacDP.TimeDiff16 -> TimeDiffC; SpeckMacDP.TimeDiff32 -> TimeDiffC; /* components PlatformLedsC; SpeckMacDP.Led0 -> PlatformLedsC.Led0; SpeckMacDP.Led1 -> PlatformLedsC.Led1; SpeckMacDP.Led2 -> PlatformLedsC.Led2; SpeckMacDP.Led3 -> PlatformLedsC.Led3; */ #ifdef MAC_EVAL MacEval = SpeckMacDP; #endif #ifdef SPECKMAC_DEBUG components new SerialDebugC() as SD; SpeckMacDP.SerialDebug -> SD; #endif #ifdef SPECKMAC_PERFORMANCE components new PerformanceC() as Perf; SpeckMacDP.Performance -> Perf; #endif } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/SpeckMacDP.nc000066400000000000000000001104701207233610700217570ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * low power nonpersistent CSMA MAC, rendez-vous via redundantly sent packets * - Author -------------------------------------------------------------- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ #include "radiopacketfunctions.h" #include "flagfunctions.h" #include "PacketAck.h" #include "RedMac.h" module SpeckMacDP { provides { interface Init; interface SplitControl; interface MacSend; interface MacReceive; interface Packet; interface Sleeptime; interface ChannelCongestion; #ifdef MAC_EVAL interface MacEval; #endif } uses { interface StdControl as CcaStdControl; interface PhySend as PacketSend; interface PhyReceive as PacketReceive; interface RadioTimeStamping; interface Tda5250Control as RadioModes; interface UartPhyControl; interface ChannelMonitor; interface ChannelMonitorControl; interface ChannelMonitorData; interface Resource as RssiAdcResource; interface Random; interface Packet as SubPacket; interface Alarm as Timer; interface Alarm as SampleTimer; interface LocalTime as LocalTime32kHz; interface Duplicate; interface TimeDiff16; interface TimeDiff32; async command am_addr_t amAddress(); /* interface GeneralIO as Led0; interface GeneralIO as Led1; interface GeneralIO as Led2; interface GeneralIO as Led3; */ #ifdef SPECKMAC_DEBUG interface SerialDebug; #endif #ifdef SPECKMAC_PERFORMANCE interface Performance; #endif } } implementation { /****** MAC State machine *********************************/ typedef enum { RX, RX_ACK, CCA, CCA_ACK, RX_P, RX_ACK_P, SLEEP, TX, TX_ACK, INIT, STOP } macState_t; macState_t macState; /****** debug vars & defs & functions ***********************/ #ifdef SPECKMAC_DEBUG void sdDebug(uint16_t p) { call SerialDebug.putPlace(p); } uint8_t repCounter; #else void sdDebug(uint16_t p) {}; #endif #ifdef SPECKMAC_PERFORMANCE macTxStat_t txStat; macRxStat_t rxStat; #endif /**************** Module Global Constants *****************/ enum { BYTE_TIME=ENCODED_32KHZ_BYTE_TIME, // phy encoded PREAMBLE_BYTE_TIME=TDA5250_32KHZ_BYTE_TIME, // no coding PHY_HEADER_TIME=6*PREAMBLE_BYTE_TIME, // 6 Phy Preamble TIME_CORRECTION=TDA5250_32KHZ_BYTE_TIME+2, // difference between txSFD and rxSFD SUB_HEADER_TIME=PHY_HEADER_TIME + sizeof(message_header_t)*BYTE_TIME, SUB_FOOTER_TIME=2*BYTE_TIME, // 2 bytes crc #ifndef DEFAULT_SLEEP_TIME DEFAULT_SLEEP_TIME=1625, // DEFAULT_SLEEP_TIME=3250, // DEFAULT_SLEEP_TIME=6500, // DEFAULT_SLEEP_TIME=8192, // DEFAULT_SLEEP_TIME=16384, // DEFAULT_SLEEP_TIME=32768U, // DEFAULT_SLEEP_TIME=65535U, #endif DATA_DETECT_TIME=17, RX_SETUP_TIME=102, // time to set up receiver TX_SETUP_TIME=58, // time to set up transmitter ADDED_DELAY = 30, RX_ACK_TIMEOUT = RX_SETUP_TIME + PHY_HEADER_TIME + ADDED_DELAY + 30, TX_GAP_TIME = RX_ACK_TIMEOUT + TX_SETUP_TIME + 33, // the duration of a send ACK ACK_DURATION = SUB_HEADER_TIME + SUB_FOOTER_TIME, NAV_FACTOR = 4, #ifndef MAC_EVAL MAX_SHORT_RETRY=9, MAX_LONG_RETRY=3, ADD_NAV = 4, INCREASE_BACKOFF = TRUE, #endif TOKEN_ACK_FLAG = 64, TOKEN_ACK_MASK = 0x3f, INVALID_SNR = 0xffff, // PREAMBLE_LONG = 5, // PREAMBLE_SHORT = 2, // reduced minimal backoff ZERO_BACKOFF_MASK = 0xff }; /**************** Module Global Variables *****************/ #ifdef MAC_EVAL uint8_t MAX_SHORT_RETRY = 9; uint8_t MAX_LONG_RETRY = 3; uint8_t ADD_NAV = 4; bool INCREASE_BACKOFF = TRUE; #endif /* flags */ typedef enum { SWITCHING = 1, RSSI_STABLE = 2, UNHANDLED_PACKET = 4, MESSAGE_PREPARED = 8, RESUME_BACKOFF = 16, CANCEL_SEND = 32, ACTION_DETECTED = 64, } flags_t; uint8_t flags = 0; uint8_t checkCounter = 0; uint8_t shortRetryCounter = 0; uint8_t longRetryCounter = 0; uint16_t networkSleeptime = DEFAULT_SLEEP_TIME; uint16_t localSleeptime = DEFAULT_SLEEP_TIME; uint16_t rssiValue = 0; uint32_t restLaufzeit = 0; uint32_t rxTime = 0; uint8_t congestionLevel = 0; message_t *txBufPtr = NULL; uint16_t txLen = 0; red_mac_header_t *txMacHdr = NULL; uint16_t seqNo; message_t ackMsg; uint16_t MIN_BACKOFF_MASK; /****** Secure switching of radio modes ***/ void interruptBackoffTimer(); task void SetRxModeTask(); task void SetTxModeTask(); task void SetSleepModeTask(); task void ReleaseAdcTask() { bool release = FALSE; atomic { if((macState >= SLEEP) && call RssiAdcResource.isOwner()) { release = TRUE; } } if(release) call RssiAdcResource.release(); } void requestAdc() { if(!call RssiAdcResource.isOwner()) { call RssiAdcResource.immediateRequest(); } } void setRxMode() { setFlag(&flags, SWITCHING); clearFlag(&flags, RSSI_STABLE); checkCounter = 0; rssiValue = INVALID_SNR; if(call RadioModes.RxMode() == FAIL) { post SetRxModeTask(); } else { #ifdef SPECKMAC_PERFORMANCE call Performance.macRxMode(); #endif } requestAdc(); } task void SetRxModeTask() { atomic { if(isFlagSet(&flags, SWITCHING) && ((macState <= CCA) || (macState == INIT))) setRxMode(); } } void setSleepMode() { clearFlag(&flags, RSSI_STABLE); post ReleaseAdcTask(); setFlag(&flags, SWITCHING); if(call RadioModes.SleepMode() == FAIL) { post SetSleepModeTask(); } else { #ifdef SPECKMAC_PERFORMANCE call Performance.macSleepMode(); #endif } } task void SetSleepModeTask() { atomic if(isFlagSet(&flags, SWITCHING) && ((macState == SLEEP) || (macState == STOP))) setSleepMode(); } void setTxMode() { post ReleaseAdcTask(); clearFlag(&flags, RSSI_STABLE); setFlag(&flags, SWITCHING); if(call RadioModes.TxMode() == FAIL) { post SetTxModeTask(); } else { #ifdef SPECKMAC_PERFORMANCE call Performance.macTxMode(); #endif } } task void SetTxModeTask() { atomic { if(isFlagSet(&flags, SWITCHING) && ((macState == TX) || (macState == TX_ACK))) setTxMode(); } } /**************** Helper functions ************************/ void computeBackoff(); void checkSend() { if((shortRetryCounter) && (txBufPtr != NULL) && (isFlagSet(&flags, MESSAGE_PREPARED)) && (macState == SLEEP) && (!isFlagSet(&flags, RESUME_BACKOFF)) && (!call Timer.isRunning())) { macState = CCA; checkCounter = 0; setRxMode(); } } uint32_t backoff(uint8_t counter) { uint32_t rVal = call Random.rand16() & MIN_BACKOFF_MASK; if(!INCREASE_BACKOFF) counter = 1; return (rVal << counter) + ZERO_BACKOFF_MASK; } bool needsAckTx(message_t* msg) { bool rVal = FALSE; if(getHeader(msg)->dest < AM_BROADCAST_ADDR) { if(getMetadata(msg)->ack != NO_ACK_REQUESTED) { rVal = TRUE; } } return rVal; } bool needsAckRx(message_t* msg) { bool rVal = FALSE; am_addr_t dest = getHeader(msg)->dest; uint8_t token; if(dest < AM_BROADCAST_ADDR) { token = getHeader(msg)->token; if(isFlagSet(&token, ACK_REQUESTED)) { rVal = TRUE; } } return rVal; } task void PrepareMsgTask() { message_t *msg; uint8_t length; red_mac_header_t *macHdr; uint16_t sT; atomic { msg = txBufPtr; length = txLen; sT = networkSleeptime; } if(msg == NULL) return; macHdr = (red_mac_header_t *)call SubPacket.getPayload(msg, sizeof(red_mac_header_t)); macHdr->repetitionCounter = sT/(length * BYTE_TIME + SUB_HEADER_TIME + SUB_FOOTER_TIME) + 1; atomic { getHeader(msg)->token = seqNo; if(needsAckTx(msg)) getHeader(msg)->token |= ACK_REQUESTED; txMacHdr = macHdr; setFlag(&flags, MESSAGE_PREPARED); if(macState == SLEEP) { } else { } if(!call Timer.isRunning()) { } else { } if(!isFlagSet(&flags, RESUME_BACKOFF)) { } else { } if((macState == SLEEP) && (!call Timer.isRunning()) && (!isFlagSet(&flags, RESUME_BACKOFF))) { if((longRetryCounter == 1) && (getHeader(msg)->dest != AM_BROADCAST_ADDR)) { call Timer.start((call Random.rand16() >> 3) & ZERO_BACKOFF_MASK); } else { call Timer.start(backoff(longRetryCounter)); } } #ifdef SPECKMAC_PERFORMANCE txStat.type = getHeader(msg)->type; txStat.to = getHeader(msg)->dest; txStat.token = getHeader(msg)->token; txStat.maxRepCounter = macHdr->repetitionCounter; txStat.creationTime = getMetadata(msg)->time; #endif getMetadata(msg)->maxRepetitions = macHdr->repetitionCounter; } } void storeStrength(message_t *m) { if(rssiValue != INVALID_SNR) { (getMetadata(m))->strength = rssiValue; } else { if(call RssiAdcResource.isOwner()) { (getMetadata(m))->strength = call ChannelMonitorData.readSnr(); } else { (getMetadata(m))->strength = 1; } } } bool prepareRepetition() { bool repeat; atomic { if(isFlagSet(&flags, CANCEL_SEND)) { repeat = txMacHdr->repetitionCounter = 0; } else { repeat = txMacHdr->repetitionCounter; txMacHdr->repetitionCounter--; } } return repeat; } void signalSendDone(error_t error) { message_t *m; error_t e = error; atomic { m = txBufPtr; txBufPtr = NULL; txLen = 0; #ifdef SPECKMAC_PERFORMANCE txStat.repCounter = txMacHdr->repetitionCounter; txStat.longRetry = longRetryCounter; txStat.shortRetry = shortRetryCounter; #endif longRetryCounter = 0; shortRetryCounter = 0; storeStrength(m); if(isFlagSet(&flags, CANCEL_SEND)) { e = ECANCEL; } clearFlag(&flags, MESSAGE_PREPARED); clearFlag(&flags, CANCEL_SEND); } signal MacSend.sendDone(m, e); #ifdef SPECKMAC_PERFORMANCE txStat.success = e; txStat.strength = getMetadata(m)->strength; call Performance.macTxMsgStats(&txStat); #endif } void updateRetryCounters() { shortRetryCounter++; if(shortRetryCounter > MAX_SHORT_RETRY) { longRetryCounter++; shortRetryCounter = 1; if(longRetryCounter > MAX_LONG_RETRY) { signalSendDone(FAIL); } } } void updateLongRetryCounters() { atomic { clearFlag(&flags, MESSAGE_PREPARED); longRetryCounter++; shortRetryCounter = 1; if(longRetryCounter > MAX_LONG_RETRY) { signalSendDone(FAIL); } else { post PrepareMsgTask(); } } } bool ackIsForMe(message_t* msg) { uint8_t localToken = seqNo; setFlag(&localToken, TOKEN_ACK_FLAG); if((getHeader(msg)->dest == call amAddress()) && (localToken == getHeader(msg)->token)) return TRUE; return FALSE; } void interruptBackoffTimer() { if(call Timer.isRunning()) { restLaufzeit = call TimeDiff16.computeDelta(call Timer.getAlarm(), call Timer.getNow()); call Timer.stop(); if(restLaufzeit > MIN_BACKOFF_MASK << MAX_LONG_RETRY) { restLaufzeit = call Random.rand16() & ZERO_BACKOFF_MASK; } setFlag(&flags, RESUME_BACKOFF); } } void computeBackoff() { if(!isFlagSet(&flags, RESUME_BACKOFF)) { setFlag(&flags, RESUME_BACKOFF); restLaufzeit = backoff(longRetryCounter); updateRetryCounters(); } } bool msgIsForMe(message_t* msg) { if(getHeader(msg)->dest == AM_BROADCAST_ADDR) return TRUE; if(getHeader(msg)->dest == call amAddress()) return TRUE; if(getHeader(msg)->dest >= RELIABLE_MCAST_MIN_ADDR) return TRUE; return FALSE; } bool isControl(message_t* m) { uint8_t token = getHeader(m)->token; return isFlagSet(&token, TOKEN_ACK_FLAG); } bool isNewMsg(message_t* msg) { return call Duplicate.isNew(getHeader(msg)->src, getHeader(msg)->dest, (getHeader(msg)->token) & TOKEN_ACK_MASK); } void rememberMsg(message_t* msg) { call Duplicate.remember(getHeader(msg)->src, getHeader(msg)->dest, (getHeader(msg)->token) & TOKEN_ACK_MASK); } void prepareAck(message_t* msg) { uint8_t rToken = getHeader(msg)->token & TOKEN_ACK_MASK; setFlag(&rToken, TOKEN_ACK_FLAG); getHeader(&ackMsg)->token = rToken; getHeader(&ackMsg)->src = call amAddress(); getHeader(&ackMsg)->dest = getHeader(msg)->src; getHeader(&ackMsg)->type = getHeader(msg)->type; #ifdef SPECKMAC_DEBUG repCounter = ((red_mac_header_t *) call SubPacket.getPayload(msg, sizeof(red_mac_header_t)))->repetitionCounter; #endif } uint32_t calcGeneratedTime(red_mac_header_t *m) { return rxTime - m->time - TIME_CORRECTION; } /**************** Init ************************/ command error_t Init.init(){ atomic { macState = INIT; seqNo = call Random.rand16() % TOKEN_ACK_FLAG; for(MIN_BACKOFF_MASK = 1; MIN_BACKOFF_MASK < networkSleeptime; ) { MIN_BACKOFF_MASK = (MIN_BACKOFF_MASK << 1) + 1; } MIN_BACKOFF_MASK >>= 2; if(MIN_BACKOFF_MASK < 0x3ff) MIN_BACKOFF_MASK=0x3ff; } #ifdef SPECKMAC_DEBUG call SerialDebug.putShortDesc("SpeckMacP"); #endif return SUCCESS; } /**************** SplitControl *****************/ task void StartDoneTask() { atomic { call SampleTimer.start(localSleeptime); macState = SLEEP; sdDebug(60); } signal SplitControl.startDone(SUCCESS); } command error_t SplitControl.start() { call CcaStdControl.start(); atomic { macState = INIT; setRxMode(); } sdDebug(10); return SUCCESS; } task void StopDoneTask() { call Init.init(); signal SplitControl.stopDone(SUCCESS); } command error_t SplitControl.stop() { call CcaStdControl.stop(); call Timer.stop(); call SampleTimer.stop(); atomic { if((macState == SLEEP) && isFlagSet(&flags, SWITCHING)) { macState = STOP; } else { macState = STOP; setSleepMode(); } } return SUCCESS; } /****** Packet interface ********************/ command void Packet.clear(message_t* msg) { call SubPacket.clear(msg); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(red_mac_header_t); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg,len + sizeof(red_mac_header_t)); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(red_mac_header_t); } command void* Packet.getPayload(message_t* msg, uint8_t len) { nx_uint8_t *payload = (nx_uint8_t *)call SubPacket.getPayload(msg, len + sizeof(red_mac_header_t)); return (void*)(payload + sizeof(red_mac_header_t)); } /****** Radio(Mode) events *************************/ async event void RadioModes.RssiStable() { setFlag(&flags, RSSI_STABLE); if((macState == RX) || (macState == CCA)) { call Timer.start(DATA_DETECT_TIME); } else if(macState == RX_P) { if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr(); } else if(macState == RX_ACK) { // if(call RssiAdcResource.isOwner()) call ChannelMonitor.start(); } else if(macState == RX_ACK_P) { } else if(macState == INIT) { if(call RssiAdcResource.isOwner()) { sdDebug(20); call ChannelMonitorControl.updateNoiseFloor(); } else { sdDebug(21); call RssiAdcResource.request(); } } else if(macState == STOP) { } else { } } async event void RadioModes.RxModeDone() { atomic { clearFlag(&flags, SWITCHING); if((macState == RX) || (macState == RX_ACK) || (macState == CCA) || (macState == INIT) || (macState == STOP)) { if(macState != RX_ACK) requestAdc(); } else { } } } async event void RadioModes.TxModeDone() { atomic { clearFlag(&flags, SWITCHING); if(macState == TX) { setFlag(&flags, ACTION_DETECTED); if(call PacketSend.send(txBufPtr, txLen) == SUCCESS) { } else { } } else if(macState == TX_ACK) { if(call PacketSend.send(&ackMsg, 0) == SUCCESS) { } else { } } else { } } } async event void RadioModes.SleepModeDone() { atomic { clearFlag(&flags, SWITCHING); if(isFlagSet(&flags, ACTION_DETECTED)) { if(congestionLevel < 5) congestionLevel++; } else { if(congestionLevel > 0) congestionLevel--; } if(macState == SLEEP) { if(!call Timer.isRunning()) { if(isFlagSet(&flags, RESUME_BACKOFF)) { clearFlag(&flags, RESUME_BACKOFF); call Timer.start(restLaufzeit); restLaufzeit = 0; } else { checkSend(); } } } else if(macState == STOP) { post StopDoneTask(); } signal ChannelCongestion.congestionEvent(congestionLevel); } } /****** MacSend events *************************/ async command error_t MacSend.send(message_t* msg, uint8_t len) { error_t err = SUCCESS; atomic { if((shortRetryCounter == 0) && (txBufPtr == NULL)) { clearFlag(&flags, MESSAGE_PREPARED); shortRetryCounter = 1; longRetryCounter = 1; txBufPtr = msg; txLen = len + sizeof(red_mac_header_t); seqNo++; if(seqNo >= TOKEN_ACK_FLAG) seqNo = 1; #ifdef SPECKMAC_PERFORMANCE txStat.payloadLength = txLen; txStat.interfaceTime = call LocalTime32kHz.get(); #endif } else { err = EBUSY; } } if(err == SUCCESS) { post PrepareMsgTask(); } return err; } async command error_t MacSend.cancel(message_t* msg) { error_t err = FAIL; atomic { if(msg == txBufPtr) { setFlag(&flags, CANCEL_SEND); shortRetryCounter = MAX_SHORT_RETRY + 2; longRetryCounter = MAX_LONG_RETRY + 2; if(macState == SLEEP) { signalSendDone(ECANCEL); } else { } err = SUCCESS; } else { } } return err; } /****** PacketSerializer events **********************/ async event void PacketReceive.receiveDetected() { rssiValue = INVALID_SNR; setFlag(&flags, ACTION_DETECTED); call ChannelMonitor.rxSuccess(); if(macState <= CCA_ACK) { if(macState == CCA) { computeBackoff(); #ifdef SPECKMAC_PERFORMANCE call Performance.macDetectedOnCca(); #endif } if(macState != RX_ACK) { macState = RX_P; } else { macState = RX_ACK_P; } } else if(macState == INIT) { setFlag(&flags, UNHANDLED_PACKET); } } async event message_t* PacketReceive.receiveDone(message_t* msg, void* payload, uint8_t len, error_t error) { message_t *m = msg; macState_t action = STOP; uint32_t nav = 0; bool isCnt; #ifdef SPECKMAC_PERFORMANCE rxStat.duplicate = PERF_UNKNOWN; rxStat.repCounter = 0xff; #endif if(macState == RX_P) { if(error == SUCCESS) { isCnt = isControl(msg); if(msgIsForMe(msg)) { if(!isCnt) { if(isNewMsg(msg)) { #ifdef SPECKMAC_PERFORMANCE rxStat.duplicate = PERF_NEW_MSG; #endif storeStrength(msg); getMetadata(msg)->sfdtime = rxTime; getMetadata(msg)->time = calcGeneratedTime((red_mac_header_t*) payload); getMetadata(msg)->ack = WAS_NOT_ACKED; m = signal MacReceive.receiveDone(msg); // assume a buffer swap -- if buffer is not swapped, assume that the // message was not successfully delivered to upper layers if(m != msg) { rememberMsg(msg); } else { action = RX; #ifdef SPECKMAC_PERFORMANCE call Performance.macQueueFull(); #endif } } #ifdef SPECKMAC_PERFORMANCE else { rxStat.duplicate = PERF_REPEATED_MSG; } #endif if(needsAckRx(msg) && (action != RX)) { if(((red_mac_header_t*)payload)->repetitionCounter == 0) { action = CCA_ACK; } else { action = RX; } } else { if(action != RX) { nav = ((red_mac_header_t*)payload)->repetitionCounter * (SUB_HEADER_TIME + getHeader(msg)->length*BYTE_TIME + SUB_FOOTER_TIME) + RX_ACK_TIMEOUT + TX_SETUP_TIME + ACK_DURATION; action = SLEEP; } } } else { action = RX; } } else { action = SLEEP; if(!isCnt) { nav = ((red_mac_header_t*)payload)->repetitionCounter * (SUB_HEADER_TIME + getHeader(msg)->length*BYTE_TIME + SUB_FOOTER_TIME) + RX_ACK_TIMEOUT + TX_SETUP_TIME + ACK_DURATION; } } } else { action = SLEEP; } } else if(macState == RX_ACK_P) { if(error == SUCCESS) { if(ackIsForMe(msg)) { storeStrength(msg); getMetadata(txBufPtr)->ack = WAS_ACKED; getMetadata(txBufPtr)->repetitions = txMacHdr->repetitionCounter; signalSendDone(SUCCESS); action = SLEEP; } else { updateLongRetryCounters(); // this will eventually schedule the right backoff macState = SLEEP; // so much traffic is going on -- take a nap setSleepMode(); action = INIT; // a difficult way to say: do nothing } } else { if(call Timer.isRunning()) { action = RX_ACK; } else { updateLongRetryCounters(); action = RX; } } } else { action = INIT; } if(action == CCA_ACK) { macState = TX_ACK; call Timer.start(RX_SETUP_TIME - TX_SETUP_TIME + 16); prepareAck(msg); } else if(action == RX_ACK) { macState = RX_ACK; } else if(action == RX) { macState = RX; checkCounter = 0; call Timer.start(DATA_DETECT_TIME); } else if(action == SLEEP) { macState = SLEEP; if(isFlagSet(&flags, RESUME_BACKOFF)) { if(nav > restLaufzeit) { if(nav > restLaufzeit) restLaufzeit += ((uint32_t)ADD_NAV*nav/NAV_FACTOR); } } else { setFlag(&flags, RESUME_BACKOFF); restLaufzeit = call Random.rand16() & ZERO_BACKOFF_MASK; } setSleepMode(); } else if(action == INIT) { clearFlag(&flags, UNHANDLED_PACKET); } else { } #ifdef SPECKMAC_PERFORMANCE if(error == SUCCESS) { rxStat.type = getHeader(msg)->type; rxStat.from = getHeader(msg)->src; rxStat.to = getHeader(msg)->dest; rxStat.token = getHeader(msg)->token; if(!isControl(msg)) rxStat.repCounter = ((red_mac_header_t*)payload)->repetitionCounter; rxStat.payloadLength = len; rxStat.strength = rssiValue; rxStat.creationTime = getMetadata(msg)->time; call Performance.macRxStats(&rxStat); } #endif return m; } async event void PacketSend.sendDone(message_t* msg, error_t error) { if(macState == TX) { if(prepareRepetition()) { call PacketSend.send(txBufPtr, txLen); } else { macState = RX_ACK; setRxMode(); call Timer.start(RX_ACK_TIMEOUT); checkCounter = 0; } } else if(macState == TX_ACK) { checkCounter = 0; macState = RX; setRxMode(); #ifdef SPECKMAC_DEBUG #endif } } /***** TimeStamping stuff **************************/ async event void RadioTimeStamping.receivedSFD( uint16_t time ) { if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr(); if(macState == RX_P) { rxTime = call LocalTime32kHz.get(); call ChannelMonitor.rxSuccess(); } } async event void RadioTimeStamping.transmittedSFD(uint16_t time, message_t* p_msg ) { if((macState == TX) && (p_msg == txBufPtr)) { getMetadata(p_msg)->sfdtime = call LocalTime32kHz.get(); txMacHdr->time = call TimeDiff32.computeDelta(getMetadata(p_msg)->sfdtime, getMetadata(p_msg)->time); } } /****** Timer ******************************/ void checkOnBusy() { setFlag(&flags, ACTION_DETECTED); if((macState == RX) || (macState == CCA) || (macState == CCA_ACK)) { if(macState == CCA) { computeBackoff(); #ifdef SPECKMAC_PERFORMANCE call Performance.macBusyOnCca(); #endif } requestAdc(); macState = RX; checkCounter = 0; call Timer.start(TX_GAP_TIME>>1); } } void checkOnIdle() { if(macState == RX) { checkCounter++; if(checkCounter < 2) { call Timer.start(DATA_DETECT_TIME); requestAdc(); } else { macState = SLEEP; setSleepMode(); } } else if(macState == CCA) { checkCounter++; if(checkCounter < 3) { call Timer.start(TX_GAP_TIME >> 1); requestAdc(); } else { macState = TX; setTxMode(); #ifdef SPECKMAC_PERFORMANCE call Performance.macIdleOnCca(); txStat.txModeTime = call LocalTime32kHz.get(); #endif } } } async event void Timer.fired() { if((macState == RX) || (macState == CCA) || (macState == CCA_ACK)) { if((!call RssiAdcResource.isOwner()) || (call ChannelMonitor.start() != SUCCESS)) { if(call UartPhyControl.isBusy()) { checkOnBusy(); } else { checkOnIdle(); } } } else if(macState == RX_ACK) { if(needsAckTx(txBufPtr)) { #ifdef SPECKMAC_PERFORMANCE call Performance.macAckTimeout(); #endif updateLongRetryCounters(); } else { signalSendDone(SUCCESS); } macState = SLEEP; setSleepMode(); } else if(macState == TX_ACK) { setTxMode(); } else if(macState == SLEEP) { if(isFlagSet(&flags, SWITCHING)) { call Timer.start(call Random.rand16() & 0x0f); } else { if(isFlagSet(&flags, RESUME_BACKOFF)) { clearFlag(&flags, RESUME_BACKOFF); call Timer.start(restLaufzeit); restLaufzeit = 0; } else { checkSend(); } } } else if((macState == RX_ACK_P) || (macState == RX_P)) { } else if(macState == INIT) { post StartDoneTask(); sdDebug(50); } else { } } /****** SampleTimer ******************************/ async event void SampleTimer.fired() { call SampleTimer.start(localSleeptime); if((macState == SLEEP) && (!isFlagSet(&flags, SWITCHING))) { clearFlag(&flags, ACTION_DETECTED); interruptBackoffTimer(); macState = RX; setRxMode(); call Timer.stop(); } } /***** Sleeptime **********************************/ async command void Sleeptime.setLocalSleeptime(uint16_t sT) { atomic localSleeptime = sT; } async command uint16_t Sleeptime.getLocalSleeptime() { uint16_t st; atomic st = localSleeptime; return st; } async command void Sleeptime.setNetworkSleeptime(uint16_t sT) { atomic { networkSleeptime = sT; for(MIN_BACKOFF_MASK = 1; MIN_BACKOFF_MASK < sT; ) { MIN_BACKOFF_MASK = (MIN_BACKOFF_MASK << 1) + 1; } MIN_BACKOFF_MASK >>= 3; } } async command uint16_t Sleeptime.getNetworkSleeptime() { uint16_t st; atomic st = networkSleeptime; return st; } /****** ChannelMonitor events *********************/ async event void ChannelMonitor.channelBusy() { checkOnBusy(); } async event void ChannelMonitor.channelIdle() { checkOnIdle(); } /****** ChannelMonitorControl events **************/ event void ChannelMonitorControl.updateNoiseFloorDone() { if(macState == INIT) { call Timer.start(call Random.rand16() % localSleeptime); setSleepMode(); sdDebug(40); } else { } } /***** ChannelMonitorData events ******************/ async event void ChannelMonitorData.getSnrDone(int16_t data) { atomic if((macState == RX_P) || (macState == RX_ACK_P)) rssiValue = data; } /***** Rssi Resource events ******************/ event void RssiAdcResource.granted() { macState_t ms; atomic ms = macState; if(ms < SLEEP) { } else if(ms == INIT) { sdDebug(30); call ChannelMonitorControl.updateNoiseFloor(); } else { post ReleaseAdcTask(); } } /***** Mac Eval *******************************************/ #ifdef MAC_EVAL async command void MacEval.setBackoffMask(uint16_t mask) { atomic MIN_BACKOFF_MASK = mask; } async command void MacEval.increaseBackoff(bool value) { atomic INCREASE_BACKOFF = value; } async command void MacEval.addNav(bool value) { atomic ADD_NAV = value; } async command void MacEval.setLongRetry(uint8_t lr) { atomic MAX_LONG_RETRY = lr; } async command void MacEval.setShortRetry(uint8_t sr) { atomic MAX_SHORT_RETRY = sr; } #endif /***** unused events **************************/ default async event void ChannelCongestion.congestionEvent(uint8_t level) {} /***** unused Radio Modes events **************************/ async event void RadioModes.TimerModeDone() {} async event void RadioModes.SelfPollingModeDone() {} async event void RadioModes.PWDDDInterrupt() {} } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/Teamgeist.nc000066400000000000000000000054671207233610700220000ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface that helps the MAC to cooperate with the routing * @author Andreas Koepke (koepke at tkn.tu-berlin.de) */ interface Teamgeist { /** * Get the AM type of the messages that are jointly routed by the MAC and * the routing layer. Only for these messages the MAC tries to access the * routing layer. */ event am_id_t observedAMType(); /** * The MAC layer uses this function to ask the routing protocol whether it * should acknowledge and thus propose himself as a forwarder. */ async event bool needsAck(message_t *msg, am_addr_t src, am_addr_t dest, uint16_t snr); /** * Sending the message to the original destination did not work. * Ask for a different one. */ async event am_addr_t getDestination(message_t *msg, uint8_t retryCounter); /** * Information on the ACK. */ async event void gotAck(message_t *msg, am_addr_t ackSender, uint16_t snr); /** * The MAC layer uses this function to ask the routing protocol how many * potential forwarders there are. This may not give a precise number, but * a rough estimate. */ async event uint8_t estimateForwarders(message_t *msg); } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/TimeDiff.nc000066400000000000000000000036741207233610700215430ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Manipulate time differences, with overflow checking * @author: Andreas Koepke (koepke@tkn.tu-berlin.de */ interface TimeDiff { /** compute delta of two times (now - past), checks for overflow assuming that now is always > past */ async command uint32_t computeDelta(uint32_t time_now, uint32_t time_past); } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/TimeDiff16.nc000066400000000000000000000036761207233610700217140ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Manipulate time differences, with overflow checking * @author: Andreas Koepke (koepke@tkn.tu-berlin.de */ interface TimeDiff16 { /** compute delta of two times (now - past), checks for overflow assuming that now is always > past */ async command uint16_t computeDelta(uint16_t time_now, uint16_t time_past); } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/TimeDiff32.nc000066400000000000000000000036761207233610700217120ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Manipulate time differences, with overflow checking * @author: Andreas Koepke (koepke@tkn.tu-berlin.de */ interface TimeDiff32 { /** compute delta of two times (now - past), checks for overflow assuming that now is always > past */ async command uint32_t computeDelta(uint32_t time_now, uint32_t time_past); } tinyos-2.1.2+dfsg/tos/chips/tda5250/mac/TimeDiffC.nc000066400000000000000000000046771207233610700216520ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of timediff interface * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ module TimeDiffC { provides { interface TimeDiff32; interface TimeDiff16; } } implementation { async command uint32_t TimeDiff32.computeDelta(uint32_t time_now, uint32_t time_past) { uint32_t rval; if(time_now >= time_past) { rval = time_now - time_past; } else { rval = (uint32_t)(-1) - time_past + time_now; } return rval; } async command uint16_t TimeDiff16.computeDelta(uint16_t time_now, uint16_t time_past) { uint16_t rval; if(time_now >= time_past) { rval = time_now - time_past; } else { rval = (uint16_t)(-1) - time_past + time_now; } return rval; } } tinyos-2.1.2+dfsg/tos/chips/tda5250/tda5250Const.h000066400000000000000000000354361207233610700212370ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * tda5250Const Header File * Defines constants and macros for use with the TDA5250 Radio * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ #ifndef TDA5250CONST_H #define TDA5250CONST_H // List of valid output frequencies for clock typedef enum { CLOCK_OUT_FREQ_NINE_MHZ = 0x00, CLOCK_OUT_FREQ_FOUR_POINT_FIVE_MHZ = 0x01, CLOCK_OUT_FREQ_THREE_MHZ = 0x02, CLOCK_OUT_FREQ_TWO_POINT_TWO_FIVE_MHZ = 0x03, CLOCK_OUT_FREQ_ONE_POINT_EIGHT_MHZ = 0x04, CLOCK_OUT_FREQ_ONE_POINT_FIVE_MHZ = 0x05, CLOCK_OUT_FREQ_ONE_POINT_TWO_EIGHT_MHZ = 0x06, CLOCK_OUT_FREQ_ONE_POINT_ONE_TWO_FIVE_MHZ = 0x07, CLOCK_OUT_FREQ_ONE_MHZ = 0x08, CLOCK_OUT_FREQ_POINT_NINE_MHZ = 0x09, CLOCK_OUT_FREQ_POINT_EIGHT_TWO_MHZ = 0x0A, CLOCK_OUT_FREQ_POINT_SEVEN_FIVE_MHZ = 0x0B, CLOCK_OUT_FREQ_POINT_SIX_NINE_MHZ = 0x0C, CLOCK_OUT_FREQ_POINT_SIX_FOUR_MHZ = 0x0D, CLOCK_OUT_FREQ_POINT_SIX_MHZ = 0x0E, CLOCK_OUT_FREQ_POINT_FIVE_SIX_MHZ = 0x0F, CLOCK_OUT_FREQ_THIRTY_TWO_KHZ = 0x80, CLOCK_OUT_FREQ_WINDOW_COUNT_COMPLETE = 0xC0 } tda5250_clock_out_freqs_t; //List of valid cutoff frequencies for the IQ Filter typedef enum { DATA_CUTOFF_FREQ_FIVE_KHZ = 0x00, DATA_CUTOFF_FREQ_SEVEN_KHZ = 0x01, DATA_CUTOFF_FREQ_NINE_KHZ = 0x02, DATA_CUTOFF_FREQ_ELEVEN_KHZ = 0x03, DATA_CUTOFF_FREQ_FOURTEEN_KHZ = 0x04, DATA_CUTOFF_FREQ_EIGHTEEN_KHZ = 0x05, DATA_CUTOFF_FREQ_TWENTY_THREE_KHZ = 0x06, DATA_CUTOFF_FREQ_TWENTY_EIGHT_KHZ = 0x07, DATA_CUTOFF_FREQ_THIRTY_TWO_KHZ = 0x08, DATA_CUTOFF_FREQ_THIRTY_NINE_KHZ = 0x09, DATA_CUTOFF_FREQ_FOURTY_NINE_KHZ = 0x0A, DATA_CUTOFF_FREQ_FIFTY_FIVE_KHZ = 0x0B, DATA_CUTOFF_FREQ_SIXTY_FOUR_KHZ = 0x0C, DATA_CUTOFF_FREQ_SEVENTY_THREE_KHZ = 0x0D, DATA_CUTOFF_FREQ_EIGHTY_SIX_KHZ = 0x0E, DATA_CUTOFF_FREQ_ONE_HUNDRED_TWO_KHZ = 0x0F } tda5250_data_cutoff_freqs_t; //List of valid cutoff frequencies for the Lowpass //data filter typedef enum { IQ_CUTOFF_FREQ_THREE_HUNDRED_FIFTY_KHZ = 0x01, IQ_CUTOFF_FREQ_TWO_HUNDRED_FIFTY_KHZ = 0x02, IQ_CUTOFF_FREQ_TWO_HUNDRED_KHZ = 0x03, IQ_CUTOFF_FREQ_ONE_HUNDRED_FIFTY_KHZ = 0x04, IQ_CUTOFF_FREQ_ONE_HUNDRED_KHZ = 0x05, IQ_CUTOFF_FREQ_FIFTY_KHZ = 0x06 } tda5250_iq_cutoff_freqs_t; //List of valid capacitor values for tuning the nominal //frequency setting typedef enum { CAP_VAL_ZERO_F = 0x00, CAP_VAL_TWO_HUNDRED_FIFTY_FF = 0x01, CAP_VAL_FIVE_HUNDRED_FIFTY_FF = 0x02, CAP_VAL_SEVEN_HUNDRED_FIFTY_FF = 0x03, CAP_VAL_ONE_PF = 0x04, CAP_VAL_ONE_POINT_TWO_FIVE_PF = 0x05, CAP_VAL_ONE_POINT_FIVE_PF = 0x06, CAP_VAL_ONE_POINT_SEVEN_FIVE_PF = 0x07, CAP_VAL_TWO_PF = 0x08, CAP_VAL_TWO_POINT_TWO_FIVE_PF = 0x09, CAP_VAL_TWO_POINT_FIVE_PF = 0x0A, CAP_VAL_TWO_POINT_SEVEN_FIVE_PF = 0x0B, CAP_VAL_THREE_PF = 0x0C, CAP_VAL_THREE_POINT_TWO_FIVE_PF = 0x0D, CAP_VAL_THREE_POINT_FIVE_PF = 0x0E, CAP_VAL_THREE_POINT_SEVEN_FIVE_PF = 0x0F, CAP_VAL_FOUR_PF = 0x10, CAP_VAL_FOUR_POINT_TWO_FIVE_PF = 0x11, CAP_VAL_FOUR_POINT_FIVE_PF = 0x12, CAP_VAL_FOUR_POINT_SEVEN_FIVE_PF = 0x13, CAP_VAL_FIVE_PF = 0x14, CAP_VAL_FIVE_POINT_TWO_FIVE_PF = 0x15, CAP_VAL_FIVE_POINT_FIVE_PF = 0x16, CAP_VAL_FIVE_POINT_SEVEN_FIVE_PF = 0x17, CAP_VAL_SIX_PF = 0x18, CAP_VAL_SIX_POINT_TWO_FIVE_PF = 0x19, CAP_VAL_SIX_POINT_FIVE_PF = 0x1A, CAP_VAL_SIX_POINT_SEVEN_FIVE_PF = 0x1B, CAP_VAL_SEVEN_PF = 0x1C, CAP_VAL_SEVEN_POINT_TWO_FIVE_PF = 0x1D, CAP_VAL_SEVEN_POINT_FIVE_PF = 0x1E, CAP_VAL_SEVEN_POINT_SEVEN_FIVE_PF = 0x1F, CAP_VAL_EIGHT_PF = 0x10, CAP_VAL_EIGHT_POINT_TWO_FIVE_PF = 0x11, CAP_VAL_EIGHT_POINT_FIVE_PF = 0x12, CAP_VAL_EIGHT_POINT_SEVEN_FIVE_PF = 0x13, CAP_VAL_NINE_PF = 0x14, CAP_VAL_NINE_POINT_TWO_FIVE_PF = 0x15, CAP_VAL_NINE_POINT_FIVE_PF = 0x16, CAP_VAL_NINE_POINT_SEVEN_FIVE_PF = 0x17, CAP_VAL_TEN_PF = 0x18, CAP_VAL_TEN_POINT_TWO_FIVE_PF = 0x19, CAP_VAL_TEN_POINT_FIVE_PF = 0x1A, CAP_VAL_TEN_POINT_SEVEN_FIVE_PF = 0x1B, CAP_VAL_ELEVEN_PF = 0x1C, CAP_VAL_ELEVEN_POINT_TWO_FIVE_PF = 0x1D, CAP_VAL_ELEVEN_POINT_FIVE_PF = 0x1E, CAP_VAL_ELEVEN_POINT_SEVEN_FIVE_PF = 0x1F, CAP_VAL_TWELVE_PF = 0x10, CAP_VAL_TWELVE_POINT_TWO_FIVE_PF = 0x11, CAP_VAL_TWELVE_POINT_FIVE_PF = 0x12, CAP_VAL_TWELVE_POINT_SEVEN_FIVE_PF = 0x13, CAP_VAL_THIRTEEN_PF = 0x14, CAP_VAL_THIRTEEN_POINT_TWO_FIVE_PF = 0x15, CAP_VAL_THIRTEEN_POINT_FIVE_PF = 0x16, CAP_VAL_THIRTEEN_POINT_SEVEN_FIVE_PF = 0x17, CAP_VAL_FOURTEEN_PF = 0x18, CAP_VAL_FOURTEEN_POINT_TWO_FIVE_PF = 0x19, CAP_VAL_FOURTEEN_POINT_FIVE_PF = 0x1A, CAP_VAL_FOURTEEN_POINT_SEVEN_FIVE_PF = 0x1B, CAP_VAL_FIFTEEN_PF = 0x1C, CAP_VAL_FIFTEEN_POINT_TWO_FIVE_PF = 0x1D, CAP_VAL_FIFTEEN_POINT_FIVE_PF = 0x1E, CAP_VAL_FIFTEEN_POINT_SEVEN_FIVE_PF = 0x1F } tda5250_cap_vals_t; //List of valid times for Bipolar Ramp typedef enum { BIPOLAR_FET_RAMP_TIME_LESS_THAN_TWO_MS = 0x01, BIPOLAR_FET_RAMP_TIME_FOUR_MS = 0x03, BIPOLAR_FET_RAMP_TIME_EIGHT_MS = 0x05, BIPOLAR_FET_RAMP_TIME_TWELVE_MS = 0x07 } tda5250_bipolar_fet_ramp_times_t; #define TDA5250_RECEIVE_FREQUENCY 868.3 // kHz #define TDA5250_OSCILLATOR_FREQUENCY ((3.0/4.0) * TDA5250_RECEIVE_FREQUENCY) // kHz #define TDA5250_INTERMEDIATE_FREQUENCY ((3.0) * TDA5250_RECEIVE_FREQUENCY) // kHz #define TDA5250_INTERNAL_OSC_FREQUENCY 32.768 //kHz #define TDA5250_CLOCK_OUT_BASE_FREQUENCY 18089.6 //kHz #define TDA5250_CONSTANT_FOR_FREQ_TO_TH_VALUE 2261 //khz of integer for 18089.6/2/4 #define TDA5250_CONVERT_TIME(time) ((uint16_t)(0xFFFF - ((time*TDA5250_INTERNAL_OSC_FREQUENCY)))) #define TDA5250_CONVERT_FREQ_TO_TH_VALUE(freq, clock_freq) \ ((TDA5250_CONSTANT_FOR_FREQ_TO_TH_VALUE/(clock_freq*freq))*1000) #define TDA5250_SYSTEM_SETUP_TIME (12000/TDA5250_INTERNAL_OSC_FREQUENCY) //12000us #define TDA5250_RECEIVER_SETUP_TIME (2860/TDA5250_INTERNAL_OSC_FREQUENCY) // 2860us #define TDA5250_DATA_DETECTION_SETUP_TIME (3380/TDA5250_INTERNAL_OSC_FREQUENCY) // 3380us #define TDA5250_RSSI_STABLE_TIME (3380/TDA5250_INTERNAL_OSC_FREQUENCY) // 3380us #define TDA5250_CLOCK_OUT_SETUP_TIME (500/TDA5250_INTERNAL_OSC_FREQUENCY) // 500us #define TDA5250_TRANSMITTER_SETUP_TIME (1430/TDA5250_INTERNAL_OSC_FREQUENCY) // 1430us #define TDA5250_XTAL_STARTUP_TIME (500/TDA5250_INTERNAL_OSC_FREQUENCY) // 500us // Subaddresses of data registers write #define TDA5250_REG_ADDR_CONFIG 0x00 #define TDA5250_REG_ADDR_FSK 0x01 #define TDA5250_REG_ADDR_XTAL_TUNING 0x02 #define TDA5250_REG_ADDR_LPF 0x03 #define TDA5250_REG_ADDR_ON_TIME 0x04 #define TDA5250_REG_ADDR_OFF_TIME 0x05 #define TDA5250_REG_ADDR_COUNT_TH1 0x06 #define TDA5250_REG_ADDR_COUNT_TH2 0x07 #define TDA5250_REG_ADDR_RSSI_TH3 0x08 #define TDA5250_REG_ADDR_CLK_DIV 0x0D #define TDA5250_REG_ADDR_XTAL_CONFIG 0x0E #define TDA5250_REG_ADDR_BLOCK_PD 0x0F // Subaddresses of data registers read #define TDA5250_REG_ADDR_STATUS 0x80 #define TDA5250_REG_ADDR_ADC 0x81 // Mask Values for write registers (16 or 8 bit) /************* Apply these masks by & with original */ #define MASK_CONFIG_SLICER_RC_INTEGRATOR 0x7FFF #define MASK_CONFIG_ALL_PD_NORMAL 0xBFFF #define MASK_CONFIG_TESTMODE_NORMAL 0xDFFF #define MASK_CONFIG_CONTROL_TXRX_EXTERNAL 0xEFFF #define MASK_CONFIG_ASK_NFSK_FSK 0xF7FF #define MASK_CONFIG_RX_NTX_TX 0xFBFF #define MASK_CONFIG_CLK_EN_OFF 0xFDFF #define MASK_CONFIG_RX_DATA_INV_NO 0xFEFF #define MASK_CONFIG_D_OUT_IFVALID 0xFF7F #define MASK_CONFIG_ADC_MODE_ONESHOT 0xFFBF #define MASK_CONFIG_F_COUNT_MODE_ONESHOT 0xFFDF #define MASK_CONFIG_LNA_GAIN_LOW 0xFFEF #define MASK_CONFIG_EN_RX_DISABLE 0xFFF7 #define MASK_CONFIG_MODE_2_SLAVE 0xFFFB #define MASK_CONFIG_MODE_1_SLAVE_TIMER 0xFFFD #define MASK_CONFIG_PA_PWR_LOWTX 0xFFFE /************* Apply these masks by | with original */ #define MASK_CONFIG_SLICER_PEAK_DETECTOR 0x8000 #define MASK_CONFIG_ALL_PD_POWER_DOWN 0x4000 #define MASK_CONFIG_TESTMODE_TESTMODE 0x2000 #define MASK_CONFIG_CONTROL_TXRX_REGISTER 0x1000 #define MASK_CONFIG_ASK_NFSK_ASK 0x0800 #define MASK_CONFIG_RX_NTX_RX 0x0400 #define MASK_CONFIG_CLK_EN_ON 0x0200 #define MASK_CONFIG_RX_DATA_INV_YES 0x0100 #define MASK_CONFIG_D_OUT_ALWAYS 0x0080 #define MASK_CONFIG_ADC_MODE_CONT 0x0040 #define MASK_CONFIG_F_COUNT_MODE_CONT 0x0020 #define MASK_CONFIG_LNA_GAIN_HIGH 0x0010 #define MASK_CONFIG_EN_RX_ENABLE 0x0008 #define MASK_CONFIG_MODE_2_TIMER 0x0004 #define MASK_CONFIG_MODE_1_SELF_POLLING 0x0002 #define MASK_CONFIG_PA_PWR_HIGHTX 0x0001 // Mask Values for write registers (16 or 8 bit) /************* Apply these masks by & with original */ #define CONFIG_SLICER_RC_INTEGRATOR(config) (config & 0x7FFF) #define CONFIG_ALL_PD_NORMAL(config) (config & 0xBFFF) #define CONFIG_TESTMODE_NORMAL(config) (config & 0xDFFF) #define CONFIG_CONTROL_TXRX_EXTERNAL(config) (config & 0xEFFF) #define CONFIG_ASK_NFSK_FSK(config) (config & 0xF7FF) #define CONFIG_RX_NTX_TX(config) (config & 0xFBFF) #define CONFIG_CLK_EN_OFF(config) (config & 0xFDFF) #define CONFIG_RX_DATA_INV_NO(config) (config & 0xFEFF) #define CONFIG_D_OUT_IFVALID(config) (config & 0xFF7F) #define CONFIG_ADC_MODE_ONESHOT(config) (config & 0xFFBF) #define CONFIG_F_COUNT_MODE_ONESHOT(config) (config & 0xFFDF) #define CONFIG_LNA_GAIN_LOW(config) (config & 0xFFEF) #define CONFIG_EN_RX_DISABLE(config) (config & 0xFFF7) #define CONFIG_MODE_2_SLAVE(config) (config & 0xFFFB) #define CONFIG_MODE_1_SLAVE_OR_TIMER(config) (config & 0xFFFD) #define CONFIG_PA_PWR_LOWTX(config) (config & 0xFFFE) #define XTAL_CONFIG_FET(xtal) (xtal & 0xFE) #define XTAL_CONFIG_FSK_RAMP0_FALSE(xtal) (xtal & 0xFB) #define XTAL_CONFIG_FSK_RAMP1_FALSE(xtal) (xtal & 0xFD) /************* Apply these masks by | with original */ #define CONFIG_SLICER_PEAK_DETECTOR(config) (config | 0x8000) #define CONFIG_ALL_PD_POWER_DOWN(config) (config | 0x4000) #define CONFIG_TESTMODE_TESTMODE(config) (config | 0x2000) #define CONFIG_CONTROL_TXRX_REGISTER(config) (config | 0x1000) #define CONFIG_ASK_NFSK_ASK(config) (config | 0x0800) #define CONFIG_RX_NTX_RX(config) (config | 0x0400) #define CONFIG_CLK_EN_ON(config) (config | 0x0200) #define CONFIG_RX_DATA_INV_YES(config) (config | 0x0100) #define CONFIG_D_OUT_ALWAYS(config) (config | 0x0080) #define CONFIG_ADC_MODE_CONT(config) (config | 0x0040) #define CONFIG_F_COUNT_MODE_CONT(config) (config | 0x0020) #define CONFIG_LNA_GAIN_HIGH(config) (config | 0x0010) #define CONFIG_EN_RX_ENABLE(config) (config | 0x0008) #define CONFIG_MODE_2_TIMER(config) (config | 0x0004) #define CONFIG_MODE_1_SELF_POLLING(config) (config | 0x0002) #define CONFIG_PA_PWR_HIGHTX(config) (config | 0x0001) #define XTAL_CONFIG_BIPOLAR(xtal) (xtal | 0x01) #define XTAL_CONFIG_FSK_RAMP0_TRUE(xtal) (xtal | 0x04) #define XTAL_CONFIG_FSK_RAMP1_TRUE(xtal) (xtal | 0x02) #endif //TDA5250CONST_H tinyos-2.1.2+dfsg/tos/chips/tda5250/tda5250Control.h000066400000000000000000000050331207233610700215570ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * Macros for configuring the TDA5250. * - Revision ------------------------------------------------------------ * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * Author: Kevin Klues (klues@tkn.tu-berlin.de) * ======================================================================== */ #ifndef TDA5250CONTROL_H #define TDA5250CONTROL_H typedef enum { RADIO_MODE_ON_TRANSITION, RADIO_MODE_ON, RADIO_MODE_OFF_TRANSITION, RADIO_MODE_OFF, RADIO_MODE_TX_TRANSITION, RADIO_MODE_TX, RADIO_MODE_RX_TRANSITION, RADIO_MODE_RX, RADIO_MODE_CCA_TRANSITION, RADIO_MODE_CCA, RADIO_MODE_TIMER_TRANSITION, RADIO_MODE_TIMER, RADIO_MODE_SELF_POLLING_TRANSITION, RADIO_MODE_SELF_POLLING, RADIO_MODE_SLEEP_TRANSITION, RADIO_MODE_SLEEP } radioMode_t; #define INIT_RSSI_THRESHOLD 26 #define TH1_VALUE 0x0000 #define TH2_VALUE 0xFFFF #endif //TDA5250CONTROL_H tinyos-2.1.2+dfsg/tos/chips/tda5250/tda5250RegDefaultsSettings.h000066400000000000000000000054231207233610700240700ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * tda5250RegDefaultSettings Header File * Defines the default values of the registers for the TDA5250 Radio * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ #ifndef TDA5250REGDEFAULTSETTINGS_H #define TDA5250REGDEFAULTSETTINGS_H // Default values of data registers #define TDA5250_REG_DEFAULT_SETTING_CONFIG 0x04F9 #define TDA5250_REG_DEFAULT_SETTING_FSK 0x0A0C #define TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING 0x0012 #define TDA5250_REG_DEFAULT_SETTING_LPF 0x18 #define TDA5250_REG_DEFAULT_SETTING_ON_TIME 0xFEC0 #define TDA5250_REG_DEFAULT_SETTING_OFF_TIME 0xF380 #define TDA5250_REG_DEFAULT_SETTING_COUNT_TH1 0x0000 #define TDA5250_REG_DEFAULT_SETTING_COUNT_TH2 0x0001 #define TDA5250_REG_DEFAULT_SETTING_RSSI_TH3 0xFF #define TDA5250_REG_DEFAULT_SETTING_CLK_DIV 0x08 #define TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG 0x01 #define TDA5250_REG_DEFAULT_SETTING_BLOCK_PD 0xFFFF #endif //TDA5250REGDEFAULTSETTINGS_H tinyos-2.1.2+dfsg/tos/chips/tda5250/tda5250RegTypes.h000066400000000000000000000056131207233610700217050ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:13 $ * ======================================================================== */ /** * tda5250RegTypes Header File * Defines the register types for the registers on the TDA5250 Radio * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ #ifndef TDA5250REGTYPES_H #define TDA5250REGTYPES_H //Macro for receiving an address and figuring out its type #define TDA5250_REG_TYPE(addr) TDA5250_REG_TYPE_#addr // Default values of data registers #define TDA5250_REG_TYPE_CONFIG uint16_t #define TDA5250_REG_TYPE_FSK uint16_t #define TDA5250_REG_TYPE_XTAL_TUNING uint16_t #define TDA5250_REG_TYPE_LPF uint8_t #define TDA5250_REG_TYPE_ON_TIME uint16_t #define TDA5250_REG_TYPE_OFF_TIME uint16_t #define TDA5250_REG_TYPE_COUNT_TH1 uint16_t #define TDA5250_REG_TYPE_COUNT_TH2 uint16_t #define TDA5250_REG_TYPE_RSSI_TH3 uint8_t #define TDA5250_REG_TYPE_RF_POWER uint8_t #define TDA5250_REG_TYPE_CLK_DIV uint8_t #define TDA5250_REG_TYPE_XTAL_CONFIG uint8_t #define TDA5250_REG_TYPE_BLOCK_PD uint16_t #define TDA5250_REG_TYPE_STATUS uint8_t #define TDA5250_REG_TYPE_ADC uint8_t #endif //TDA5250REGTYPES_H tinyos-2.1.2+dfsg/tos/chips/tda5250/tda5250_message.h000066400000000000000000000020141207233610700217160ustar00rootroot00000000000000#ifndef TDA5250_MESSAGE_H #define TDA5250_MESSAGE_H #include "AM.h" #include "PacketAck.h" /* * highest bit of token set: this message is ACK and not intended for the * upper layers. Token is used for alternating bit like duplicate detection, * and set by the sender in [0,127] intervall. The receiver reflects the * token in the Ack, with the highest bit set. */ typedef nx_struct tda5250_header_t { nx_uint8_t length; nx_am_addr_t src; nx_am_addr_t dest; nx_am_id_t type; nx_uint8_t token; } tda5250_header_t; typedef nx_struct tda5250_footer_t { nxle_uint16_t crc; } tda5250_footer_t; typedef nx_struct tda5250_metadata_t { nx_uint16_t strength; nx_uint8_t ack; /* local time when message was generated */ nx_uint32_t time; /* time of sfd generation */ nx_uint32_t sfdtime; nx_uint8_t sendSecurityMode; nx_uint8_t receiveSecurityMode; /* some meta information that allows to compute a density */ nx_uint8_t maxRepetitions; nx_uint8_t repetitions; } tda5250_metadata_t; #endif tinyos-2.1.2+dfsg/tos/chips/tmp102/000077500000000000000000000000001207233610700167175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/tmp102/SimpleTMP102C.nc000066400000000000000000000044031207233610700214020ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Implementation of a simple read interface for the TMP102 temperature * sensor built-in Zolertia Z1 motes * * @author: Xavier Orduna * @author: Jordi Soucheiron */ generic configuration SimpleTMP102C() { provides interface Read; } implementation { components SimpleTMP102P; Read = SimpleTMP102P; components new TimerMilliC() as TimerSensor; SimpleTMP102P.TimerSensor -> TimerSensor; components new TimerMilliC() as TimerFail; SimpleTMP102P.TimerFail -> TimerFail; components new Msp430I2C1C() as I2C; SimpleTMP102P.Resource -> I2C; SimpleTMP102P.ResourceRequested -> I2C; SimpleTMP102P.I2CBasicAddr -> I2C; } tinyos-2.1.2+dfsg/tos/chips/tmp102/SimpleTMP102P.nc000066400000000000000000000076161207233610700214300ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Implementation of a simple read interface for the TMP102 temperature * sensor built-in Zolertia Z1 motes, returns value in celsius degrees * multiplied by 10, only 1 digit accuracy. * * @author: Xavier Orduna * @author: Jordi Soucheiron */ #include "TMP102.h" module SimpleTMP102P { provides interface Read; uses { interface Timer as TimerSensor; interface Timer as TimerFail; interface Resource; interface ResourceRequested; interface I2CPacket as I2CBasicAddr; } } implementation { uint16_t temp; uint8_t pointer; uint8_t temperaturebuff[2]; uint16_t tmpaddr; norace uint8_t tempcmd; task void calculateTemp(){ uint16_t tmp = temp; #ifdef Z1_TMP102_CELSIUS if(tmp > 2047) tmp -= (1<<12); atomic tmp *= 0.625; #endif signal Read.readDone(SUCCESS, tmp); } command error_t Read.read(){ atomic P5DIR |= 0x01; atomic P5OUT |= 0x01; call TimerSensor.startOneShot(100); //call TimerFail.startOneShot(1024); return SUCCESS; } event void TimerSensor.fired() { call Resource.request(); } event void TimerFail.fired() { signal Read.readDone(SUCCESS, 0); } event void Resource.granted(){ error_t error; pointer = TMP102_TEMPREG; tempcmd = TMP_READ_TMP; error= call I2CBasicAddr.write((I2C_START | I2C_STOP), TMP102_ADDRESS, 1, &pointer); if(error){ call Resource.release(); signal Read.readDone(error, 0); } } async event void I2CBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ if(call Resource.isOwner()) { uint16_t tmp; for(tmp=0;tmp<0xffff;tmp++); //delay call Resource.release(); tmp = data[0]; tmp = tmp << 8; tmp = tmp + data[1]; tmp = tmp >> 4; atomic temp = tmp; post calculateTemp(); } } async event void I2CBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t *data){ if(call Resource.isOwner()){ error_t e; e = call I2CBasicAddr.read((I2C_START | I2C_STOP), TMP102_ADDRESS, 2, temperaturebuff); if(e){ call Resource.release(); signal Read.readDone(error, 0); } } } async event void ResourceRequested.requested(){ } async event void ResourceRequested.immediateRequested(){ } } tinyos-2.1.2+dfsg/tos/chips/tmp102/TMP102.h000066400000000000000000000036371207233610700177640ustar00rootroot00000000000000/* * Copyright (c) 2009 DEXMA SENSORS SL * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Implementation of a simple read interface for the TMP102 temperature * sensor built-in Zolertia Z1 motes * * @author: Xavier Orduna * @author: Jordi Soucheiron */ #ifndef TMP102_H #define TMP102_H #define TMP102_ADDRESS 0x48 #define TMP102_TEMPREG 0x00 #define TMP_READ_TMP 1 #endif tinyos-2.1.2+dfsg/tos/chips/tmp175/000077500000000000000000000000001207233610700167315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/tmp175/HalTMP175Advanced.nc000066400000000000000000000046451207233610700222340ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HalTMP175Advanced is the HAL control interface for the TI TMP175 * Digital Temperature Sensor. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ #include "TMP175.h" interface HalTMP175Advanced { command error_t setThermostatMode(bool useInt); event void setThermostatModeDone(error_t error); command error_t setPolarity(bool polarity); event void setPolarityDone(error_t error); command error_t setFaultQueue(tmp175_fqd_t depth); event void setFaultQueueDone(error_t error); command error_t setResolution(tmp175_res_t res); event void setResolutionDone(error_t error); command error_t setTLow(uint16_t val); event void setTLowDone(error_t error); command error_t setTHigh(uint16_t val); event void setTHighDone(error_t error); event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/tmp175/HalTMP175ControlP.nc000066400000000000000000000166711207233610700222710ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HalTMP175ControlP device specific Hal interfaces for the TI TMP175 Chip. * * Note that only the data path uses split phase resource arbitration * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ module HalTMP175ControlP { provides interface HalTMP175Advanced; uses interface HplTMP175; uses interface Resource as TMP175Resource; } implementation { enum { STATE_SET_MODE, STATE_SET_POLARITY, STATE_SET_FQ, STATE_SET_RES, STATE_NONE, STATE_SET_TLOW, STATE_SET_THIGH, }; uint8_t mState = STATE_NONE; uint8_t mConfigRegVal = 0; error_t mHplError; task void complete_Alert() { signal HalTMP175Advanced.alertThreshold(); } static error_t setCfg(uint8_t nextState, uint32_t val) { error_t error; mState = nextState; error = call HplTMP175.setConfigReg(val); if (error) { call TMP175Resource.release(); } else { mConfigRegVal = val; } return error; } static error_t setThresh(uint8_t nextState, uint32_t val) { error_t error; mState = nextState; if(mState == STATE_SET_TLOW) error = call HplTMP175.setTLowReg(val << 4); else error = call HplTMP175.setTHighReg(val << 4); if (error) { call TMP175Resource.release(); } return error; } command error_t HalTMP175Advanced.setThermostatMode(bool useInt) { error_t error; uint8_t newRegVal; error = call TMP175Resource.immediateRequest(); if (error) { return error; } newRegVal = (useInt) ? (mConfigRegVal | TMP175_CFG_TM) : (mConfigRegVal & ~TMP175_CFG_TM); error = setCfg(STATE_SET_MODE, newRegVal); return error; } command error_t HalTMP175Advanced.setPolarity(bool polarity) { error_t error; uint8_t newRegVal; error = call TMP175Resource.immediateRequest(); if (error) { return error; } newRegVal = (polarity) ? (mConfigRegVal | TMP175_CFG_POL) : (mConfigRegVal & ~TMP175_CFG_POL); error = setCfg(STATE_SET_POLARITY, newRegVal); return error; } command error_t HalTMP175Advanced.setFaultQueue(tmp175_fqd_t depth) { error_t error; uint8_t newRegVal; if ((uint8_t)depth > 3) { error = EINVAL; return error; } error = call TMP175Resource.immediateRequest(); if (error) { return error; } newRegVal = (mConfigRegVal & ~TMP175_CFG_FQ(3)) | (TMP175_CFG_FQ(depth)); error = setCfg(STATE_SET_FQ, newRegVal); return error; } command error_t HalTMP175Advanced.setResolution(tmp175_res_t res) { error_t error; uint8_t newRegVal; if ((uint8_t)res > 3) { error = EINVAL; return error; } error = call TMP175Resource.immediateRequest(); if (error) { return error; } newRegVal = (mConfigRegVal & ~TMP175_CFG_RES(3)) | (TMP175_CFG_RES(res)); error = setCfg(STATE_SET_RES, newRegVal); return error; } command error_t HalTMP175Advanced.setTLow(uint16_t val) { error_t error; error = call TMP175Resource.immediateRequest(); if (error) { return error; } error = setThresh(STATE_SET_TLOW, val); if (error) { call TMP175Resource.release(); } return error; } command error_t HalTMP175Advanced.setTHigh(uint16_t val) { error_t error; error = call TMP175Resource.immediateRequest(); if (error) { return error; } error = setThresh(STATE_SET_THIGH, val); if (error) { call TMP175Resource.release(); } return error; } task void handleConfigReg() { error_t lasterror; atomic lasterror = mHplError; call TMP175Resource.release(); switch (mState) { case STATE_SET_MODE: mState = STATE_NONE; signal HalTMP175Advanced.setThermostatModeDone(lasterror); break; case STATE_SET_POLARITY: mState = STATE_NONE; signal HalTMP175Advanced.setPolarityDone(lasterror); break; case STATE_SET_FQ: mState = STATE_NONE; signal HalTMP175Advanced.setFaultQueueDone(lasterror); break; case STATE_SET_RES: mState = STATE_NONE; signal HalTMP175Advanced.setResolutionDone(lasterror); break; default: break; } //mState = STATE_NONE; return; } task void handleTReg() { error_t lasterror; atomic lasterror = mHplError; call TMP175Resource.release(); switch (mState) { case STATE_SET_TLOW: mState = STATE_NONE; signal HalTMP175Advanced.setTLowDone(lasterror); break; case STATE_SET_THIGH: mState = STATE_NONE; signal HalTMP175Advanced.setTHighDone(lasterror); break; default: mState = STATE_NONE; break; } //mState = STATE_NONE; } event void TMP175Resource.granted() { // intentionally left blank } async event void HplTMP175.setConfigRegDone(error_t error) { mHplError = error; post handleConfigReg(); return; } async event void HplTMP175.setTLowRegDone(error_t error) { mHplError = error; post handleTReg(); } async event void HplTMP175.setTHighRegDone(error_t error) { mHplError = error; post handleTReg(); } async event void HplTMP175.alertThreshold() { post complete_Alert(); } async event void HplTMP175.measureTemperatureDone(error_t error, uint16_t val) { // intentionally left blank } default event void HalTMP175Advanced.setTHighDone(error_t error) { return; } default event void HalTMP175Advanced.setThermostatModeDone(error_t error){ return; } default event void HalTMP175Advanced.setPolarityDone(error_t error){ return; } default event void HalTMP175Advanced.setFaultQueueDone(error_t error){ return; } default event void HalTMP175Advanced.setResolutionDone(error_t error){ return; } default event void HalTMP175Advanced.setTLowDone(error_t error){ return; } default event void HalTMP175Advanced.alertThreshold(){ return; } } tinyos-2.1.2+dfsg/tos/chips/tmp175/HalTMP175ReaderP.nc000066400000000000000000000061311207233610700220410ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HalTMP175ReaderP provides the service level HIL and device * specific Hal interfaces for the TI TMP175 Chip. * * Note that only the data path uses split phase resource arbitration * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ generic module HalTMP175ReaderP() { provides interface Read as Temperature; uses interface HplTMP175; uses interface Resource as TMP175Resource; } implementation { enum { STATE_SET_MODE, STATE_SET_POLARITY, STATE_SET_FQ, STATE_SET_RES, STATE_NONE }; uint8_t mState = STATE_NONE; uint8_t mConfigRegVal = 0; error_t mHplError; command error_t Temperature.read() { return call TMP175Resource.request(); } event void TMP175Resource.granted() { error_t error; error = call HplTMP175.measureTemperature(); if (error) { call TMP175Resource.release(); signal Temperature.readDone(error,0); } return; } async event void HplTMP175.measureTemperatureDone(error_t tmp175_error, uint16_t val) { call TMP175Resource.release(); signal Temperature.readDone(tmp175_error,(val >> 4)); return; } // intentionally left empty async event void HplTMP175.setTLowRegDone(error_t error) {} async event void HplTMP175.setTHighRegDone(error_t error) {} async event void HplTMP175.setConfigRegDone(error_t error) {} async event void HplTMP175.alertThreshold() {} default event void Temperature.readDone(error_t error, uint16_t val) {return ;} } tinyos-2.1.2+dfsg/tos/chips/tmp175/HplTMP175.nc000066400000000000000000000055041207233610700206200ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HplTMP175 is the HPL inteface to the Texas Instrument TMP175 * Digital Temperature Sensor. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ interface HplTMP175 { /** * Starts a temperature measurement. * * @return SUCCESS if the measurement will be made */ command error_t measureTemperature(); /** * Presents the result of a temperature measurement. * * @param error SUCCESS if the measurement was successful * @param val the temperature reading */ async event void measureTemperatureDone( error_t error, uint16_t val ); /** * Sets a new value to the TMP175 configuration register. * * @param val the new value to be written * * @return SUCCESS if the set will be performed */ command error_t setConfigReg( uint8_t val ); /** * Signals the completion of the configuration register set. * * @param error SUCCESS if the set was successful */ async event void setConfigRegDone( error_t error ); command error_t setTLowReg(uint16_t val); async event void setTLowRegDone(error_t error); command error_t setTHighReg(uint16_t val); async event void setTHighRegDone(error_t error); async event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/tmp175/HplTMP175LogicP.nc000066400000000000000000000167541207233610700217270ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HplTMP175LogicP is the driver for the TI TMP175. It requires an * I2C packet interface and provides the HplTMP175 HPL interface. * This module DOES NOT apply any specific configuration to the GpioInterrupt * pin associated with the theshold alerts. This must be handled by an * outside configuration/module according to the host platform. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ #include "TMP175.h" #include "I2C.h" generic module HplTMP175LogicP(uint16_t devAddr) { provides interface Init; provides interface SplitControl; provides interface HplTMP175; uses interface I2CPacket; uses interface GpioInterrupt as AlertInterrupt; uses interface GeneralIO as InterruptPin; } implementation { enum { STATE_IDLE, STATE_STARTING, STATE_STOPPING, STATE_STOPPED, STATE_READTEMP, STATE_SETCONFIG, STATE_SETTHIGH, STATE_SETTLOW, }; bool mfPtrReset; uint8_t mI2CBuffer[4]; uint8_t mState; uint8_t mConfigRegVal; norace error_t mSSError; static error_t doSetReg(uint8_t nextState, uint8_t reg, uint8_t val) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = reg; mI2CBuffer[1] = val; error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer); if (error) atomic mState = STATE_IDLE; return error; } static error_t doSetRegWord(uint8_t nextState, uint8_t reg, uint16_t val) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = reg; mI2CBuffer[1] = (val >> 8) & 0xFF; mI2CBuffer[2] = val & 0xFF; error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,3,mI2CBuffer); if (error) atomic mState = STATE_IDLE; return error; } task void StartDone() { atomic mState = STATE_IDLE; signal SplitControl.startDone(mSSError); return; } task void StopDone() { atomic mState = STATE_STOPPED; signal SplitControl.stopDone(mSSError); return; } command error_t Init.init() { // careful! this can be changed via polarity I believe call InterruptPin.makeInput(); call AlertInterrupt.enableRisingEdge(); mfPtrReset = FALSE; mConfigRegVal = 0; mState = STATE_STOPPED; return SUCCESS; } command error_t SplitControl.start() { error_t error = SUCCESS; atomic { if (mState == STATE_STOPPED) { mState = STATE_IDLE; } else { error = EBUSY; } } if (error) return error; return doSetReg(STATE_STARTING,TMP175_PTR_CFG,(mConfigRegVal & ~TMP175_CFG_SD)); } command error_t SplitControl.stop() { return doSetReg(STATE_STOPPING,TMP175_PTR_CFG,(mConfigRegVal | TMP175_CFG_SD)); } command error_t HplTMP175.measureTemperature() { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = STATE_READTEMP; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = mI2CBuffer[1] = 0; error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,2,mI2CBuffer); if (error) atomic mState = STATE_IDLE; return error; } command error_t HplTMP175.setConfigReg( uint8_t val ){ return doSetReg(STATE_SETCONFIG,TMP175_PTR_CFG,val); } command error_t HplTMP175.setTLowReg(uint16_t val){ return doSetRegWord(STATE_SETTLOW,TMP175_PTR_TLOW,val); } command error_t HplTMP175.setTHighReg(uint16_t val){ return doSetRegWord(STATE_SETTHIGH,TMP175_PTR_THIGH,val); } async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { uint16_t tempVal; switch (mState) { case STATE_READTEMP: tempVal = buf[0]; tempVal = ((tempVal << 8) | buf[1]); mState = STATE_IDLE; signal HplTMP175.measureTemperatureDone(i2c_error,tempVal); break; default: break; } return; } async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { error_t error = i2c_error; if (mfPtrReset) { mfPtrReset = FALSE; switch (mState) { case STATE_STARTING: mSSError = error; post StartDone(); break; case STATE_STOPPING: mSSError = error; post StopDone(); break; case STATE_READTEMP: // Should never get here. break; case STATE_SETCONFIG: mState = STATE_IDLE; signal HplTMP175.setConfigRegDone(error); break; case STATE_SETTHIGH: mState = STATE_IDLE; signal HplTMP175.setTHighRegDone(error); break; case STATE_SETTLOW: mState = STATE_IDLE; signal HplTMP175.setTLowRegDone(error); break; default: mState = STATE_IDLE; break; } } else { // Reset the PTR register back to the temperature register mI2CBuffer[0] = TMP175_PTR_TEMP; mfPtrReset = TRUE; call I2CPacket.write(I2C_START | I2C_STOP, devAddr,1,mI2CBuffer); } return; } async event void AlertInterrupt.fired() { // This alert is decoupled from whatever state the TMP175 is in. // Upper layers must handle dealing with this alert appropriately. signal HplTMP175.alertThreshold(); return; } default event void SplitControl.startDone( error_t error ) { return; } default event void SplitControl.stopDone( error_t error ) { return; } default async event void HplTMP175.measureTemperatureDone( error_t error, uint16_t val ){ return; } default async event void HplTMP175.setConfigRegDone( error_t error ){ return; } default async event void HplTMP175.setTHighRegDone(error_t error){ return; } default async event void HplTMP175.setTLowRegDone(error_t error){ return; } default async event void HplTMP175.alertThreshold(){ return; } } tinyos-2.1.2+dfsg/tos/chips/tmp175/TMP175.h000066400000000000000000000045331207233610700200040ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Types and definitions for the TI TMP175 * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ #ifndef _TMP175_H #define _TMP175_H #define TMP175_PTR_TEMP (0x0) #define TMP175_PTR_CFG (0x1) #define TMP175_PTR_TLOW (0x2) #define TMP175_PTR_THIGH (0x3) #define TMP175_CFG_OS (1 << 7) #define TMP175_CFG_RES(_x) (((_x) & 0x3) << 5) #define TMP175_CFG_FQ(_x) (((_x) & 0x3) << 3) #define TMP175_CFG_POL (1 << 2) #define TMP175_CFG_TM (1 << 1) #define TMP175_CFG_SD (1 << 0) typedef enum { TMP175_FQD_1 = 0, TMP175_FQD_2 = 1, TMP175_FQD_4 = 2, TMP175_FQD_6 = 3 } tmp175_fqd_t; typedef enum { TMP175_RES_9BIT, TMP175_RES_10BIT, TMP175_RES_11BIT, TMP175_RES_12BIT } tmp175_res_t; #endif /* _TMP175_H */ tinyos-2.1.2+dfsg/tos/chips/tsl2561/000077500000000000000000000000001207233610700170145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/tsl2561/HalTsl2561Advanced.nc000066400000000000000000000043771207233610700225040ustar00rootroot00000000000000/* $Id: HalTsl2561Advanced.nc,v 1.4 2006-12-12 18:23:14 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Kaisen Lin * @author Phil Buonadonna */ interface HalTsl2561Advanced { command error_t setGain(bool gainHigh); event void setGainDone(error_t error); command error_t setIntegration(uint8_t val); event void setIntegrationDone(error_t error); command error_t setPersistence(uint8_t val); event void setPersistenceDone(error_t error); command error_t setTLow(uint16_t val); event void setTLowDone(error_t error); command error_t setTHigh(uint16_t val); event void setTHighDone(error_t error); command error_t enableAlert(bool enable); event void enableAlertDone(error_t error); event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/tsl2561/HalTsl2561ControlP.nc000066400000000000000000000161771207233610700225400ustar00rootroot00000000000000/* $Id: HalTsl2561ControlP.nc,v 1.4 2006-12-12 18:23:14 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Kaisen Lin * @author Phil Buonadonna */ #include "TSL256x.h" module HalTsl2561ControlP { provides interface HalTsl2561Advanced; uses interface Resource; uses interface HplTSL256x; } implementation { enum { S_IDLE = 0, S_GAIN, S_INTEG, S_PERSIST, S_TLOW, S_THIGH, S_ENALERT, }; uint8_t state = S_IDLE; error_t clientResult; uint8_t timingRegisterShadow = 0x02; uint8_t iControlRegisterShadow = 0x0; task void complete_Alert() { signal HalTsl2561Advanced.alertThreshold(); } task void complete_Task() { switch(state) { case S_GAIN: state = S_IDLE; call Resource.release(); signal HalTsl2561Advanced.setGainDone(clientResult); break; case S_INTEG: state = S_IDLE; call Resource.release(); signal HalTsl2561Advanced.setIntegrationDone(clientResult); break; case S_PERSIST: state = S_IDLE; call Resource.release(); signal HalTsl2561Advanced.setPersistenceDone(clientResult); break; case S_TLOW: state = S_IDLE; call Resource.release(); signal HalTsl2561Advanced.setTLowDone(clientResult); break; case S_THIGH: state = S_IDLE; call Resource.release(); signal HalTsl2561Advanced.setTHighDone(clientResult); break; case S_ENALERT: state = S_IDLE; call Resource.release(); signal HalTsl2561Advanced.enableAlertDone(clientResult); break; default: break; } } command error_t HalTsl2561Advanced.setGain(bool gainHigh) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_GAIN; if(gainHigh) timingRegisterShadow |= TSL256X_TIMING_GAIN; else timingRegisterShadow &= ~TSL256X_TIMING_GAIN; call HplTSL256x.setTIMING(timingRegisterShadow); return SUCCESS; } command error_t HalTsl2561Advanced.setIntegration(uint8_t val) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_INTEG; timingRegisterShadow |= TSL256X_TIMING_MANUAL; timingRegisterShadow |= TSL256X_TIMING_INTEG(val); call HplTSL256x.setTIMING(timingRegisterShadow); return SUCCESS; } command error_t HalTsl2561Advanced.setPersistence(uint8_t val) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_PERSIST; iControlRegisterShadow &= ~TSL256X_INTERRUPT_PERSIST(0xF); iControlRegisterShadow |= TSL256X_INTERRUPT_PERSIST(val); call HplTSL256x.setINTERRUPT(iControlRegisterShadow); return SUCCESS; } command error_t HalTsl2561Advanced.setTLow(uint16_t val) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_TLOW; call HplTSL256x.setTHRESHLOW(val); return SUCCESS; } command error_t HalTsl2561Advanced.setTHigh(uint16_t val) { error_t status; if(state != S_IDLE) return FAIL; status = call Resource.immediateRequest(); if(status != SUCCESS) return status; state = S_THIGH; call HplTSL256x.setTHRESHHIGH(val); return SUCCESS; } command error_t HalTsl2561Advanced.enableAlert(bool enable) { error_t status; if(state != S_IDLE) return FAIL; state = S_ENALERT; iControlRegisterShadow &= ~TSL256X_INTERRUPT_INTR(3); // strip off interrupt select if(enable) iControlRegisterShadow |= TSL256X_INTERRUPT_INTR(1); status = call Resource.immediateRequest(); if(status != SUCCESS) { status = call Resource.request(); return status; } else { call HplTSL256x.setINTERRUPT(iControlRegisterShadow); } return SUCCESS; } event void Resource.granted() { // Only use Queued requests for alertEnable if (state == S_ENALERT) { call HplTSL256x.setINTERRUPT(iControlRegisterShadow); } return; } async event void HplTSL256x.setTIMINGDone(error_t error) { clientResult = error; post complete_Task(); } async event void HplTSL256x.setINTERRUPTDone(error_t error) { clientResult = error; post complete_Task(); } async event void HplTSL256x.setTHRESHLOWDone(error_t error) { clientResult = error; post complete_Task(); } async event void HplTSL256x.setTHRESHHIGHDone(error_t error) { clientResult = error; post complete_Task(); } async event void HplTSL256x.alertThreshold() { post complete_Alert(); } // stubs async event void HplTSL256x.getIDDone(error_t error, uint8_t idval) {} // intentionally left empty async event void HplTSL256x.setCONTROLDone(error_t error) {} async event void HplTSL256x.measureCh0Done(error_t error, uint16_t val) {} async event void HplTSL256x.measureCh1Done(error_t error, uint16_t val) {} // default stuff /* default event void HalTsl2561Advanced.setGainDone(error_t error) {} default event void HalTsl2561Advanced.setIntegrationDone(error_t error) {} default event void HalTsl2561Advanced.setPersistenceDone(error_t error) {} default event void HalTsl2561Advanced.setTLowDone(error_t error) {} default event void HalTsl2561Advanced.setTHighDone(error_t error) {} default event void HalTsl2561Advanced.enableAlertDone(error_t error) {} default event void HalTsl2561Advanced.alertThreshold() {} */ } tinyos-2.1.2+dfsg/tos/chips/tsl2561/HalTsl2561ReaderP.nc000066400000000000000000000101201207233610700223000ustar00rootroot00000000000000/* $Id: HalTsl2561ReaderP.nc,v 1.4 2006-12-12 18:23:14 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Kaisen Lin * @author Phil Buonadonna */ // someone better power this up via SplitControl generic module HalTsl2561ReaderP() { provides interface Read as BroadbandPhoto; provides interface Read as IRPhoto; uses interface Resource as BroadbandResource; uses interface Resource as IRResource; uses interface HplTSL256x; } implementation { enum { S_OFF = 0, S_READY, S_READ_BB, S_READ_IR, }; norace uint8_t m_state = S_READY; error_t m_error; uint16_t m_val; task void signalDone_task() { switch(m_state) { case S_READ_BB: m_state = S_READY; call BroadbandResource.release(); signal BroadbandPhoto.readDone(m_error, m_val); break; case S_READ_IR: m_state = S_READY; call IRResource.release(); signal IRPhoto.readDone(m_error, m_val); break; default: m_state = S_READY; break; } } command error_t BroadbandPhoto.read() { error_t status; if(m_state != S_READY) return FAIL; status = call BroadbandResource.request(); return status; } command error_t IRPhoto.read() { error_t status; if(m_state != S_READY) return FAIL; status = call IRResource.request(); return status; } event void BroadbandResource.granted() { error_t result; result = call HplTSL256x.measureCh0(); if(result != SUCCESS) { call BroadbandResource.release(); signal BroadbandPhoto.readDone(result, 0); } } event void IRResource.granted() { error_t result; result = call HplTSL256x.measureCh1(); if(result != SUCCESS) { call IRResource.release(); signal IRPhoto.readDone(result, 0); } } async event void HplTSL256x.measureCh0Done(error_t error, uint16_t val) { m_state = S_READ_BB; m_error = error; m_val = val; post signalDone_task(); } async event void HplTSL256x.measureCh1Done(error_t error, uint16_t val) { m_state = S_READ_IR; m_error = error; m_val = val; post signalDone_task(); } async event void HplTSL256x.setCONTROLDone(error_t error) {} async event void HplTSL256x.setTIMINGDone(error_t error) {} async event void HplTSL256x.setTHRESHLOWDone(error_t error) {} async event void HplTSL256x.setTHRESHHIGHDone(error_t error) {} async event void HplTSL256x.setINTERRUPTDone(error_t error) {} async event void HplTSL256x.getIDDone(error_t error, uint8_t idval) {} async event void HplTSL256x.alertThreshold() {} } tinyos-2.1.2+dfsg/tos/chips/tsl2561/HplTSL2561LogicP.nc000066400000000000000000000226041207233610700220640ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * TSL2561LogicP is the driver for the Taos TSL2561, the I2C variant * of the Taos TSL256x line. * It requires an I2C packet interface and provides the * TSL256x HPL interface. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ #include "TSL256x.h" #include "I2C.h" generic module HplTSL2561LogicP(uint16_t devAddr) { provides interface Init; provides interface SplitControl; provides interface HplTSL256x; uses interface I2CPacket; uses interface GpioInterrupt as InterruptAlert; uses interface Leds; uses interface GeneralIO as InterruptPin; } implementation { enum { STATE_IDLE, STATE_STARTING, STATE_STOPPING, STATE_STOPPED, STATE_READCH0, STATE_READCH1, STATE_SETCONTROL, STATE_SETTIMING, STATE_SETLOW, STATE_SETHIGH, STATE_SETINTERRUPT, STATE_READID, STATE_CLRINTERRUPTS, STATE_ERROR }; bool interruptBit; // determine if I2C write was to clear an interrupt uint8_t mI2CBuffer[4]; uint8_t mState; norace error_t mSSError; static error_t doWriteReg(uint8_t nextState, uint8_t reg, uint16_t val, uint8_t size) { error_t error = SUCCESS; atomic { if ((mState == STATE_IDLE) || (mState == STATE_STARTING)) { mState = nextState; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = (TSL256X_COMMAND_CMD | reg); mI2CBuffer[1] = (uint8_t)(val & 0xFF); mI2CBuffer[2] = (uint8_t)((val >> 8) & 0xFF); error = call I2CPacket.write(I2C_START | I2C_STOP,devAddr,(size + 1),mI2CBuffer); if (error) atomic mState = STATE_IDLE; return error; } static error_t doReadPrep(uint8_t nextState, uint8_t reg) { error_t error = SUCCESS; atomic { if (mState == STATE_IDLE) { mState = nextState; } else { error = EBUSY; } } if (error) return error; mI2CBuffer[0] = (TSL256X_COMMAND_CMD | reg ); error = call I2CPacket.write(I2C_START,devAddr,1,mI2CBuffer); if (error) atomic mState = STATE_IDLE; return error; } static error_t clearInterrupt() { error_t error; mI2CBuffer[0] = (TSL256X_COMMAND_CMD | TSL256X_COMMAND_CLEAR); error = call I2CPacket.write(I2C_START | I2C_STOP, devAddr, 1, mI2CBuffer); if (error == SUCCESS) interruptBit = TRUE; return error; } task void StartDone() { signal SplitControl.startDone(mSSError); return; } task void StopDone() { signal SplitControl.stopDone(mSSError); return; } command error_t Init.init() { call InterruptPin.makeInput(); call InterruptAlert.enableFallingEdge(); mState = STATE_STOPPED; interruptBit = FALSE; return SUCCESS; } command error_t SplitControl.start() { error_t error = SUCCESS; atomic { if (mState == STATE_STOPPED) { mState = STATE_STARTING; } else { error = EBUSY; } } if (error) return error; return doWriteReg(STATE_STARTING,(TSL256X_COMMAND_CLEAR | TSL256X_PTR_CONTROL), (TSL256X_CONTROL_POWER_ON),1); } command error_t SplitControl.stop() { return doWriteReg(STATE_STOPPING,(TSL256X_COMMAND_CLEAR | TSL256X_PTR_CONTROL), (TSL256X_CONTROL_POWER_OFF),1); } command error_t HplTSL256x.measureCh0() { return doReadPrep(STATE_READCH0,TSL256X_PTR_DATA0LOW); } command error_t HplTSL256x.measureCh1() { return doReadPrep(STATE_READCH1,TSL256X_PTR_DATA1LOW); } command error_t HplTSL256x.setCONTROL(uint8_t val) { return doWriteReg(STATE_SETCONTROL,TSL256X_PTR_CONTROL,val,1); } command error_t HplTSL256x.setTIMING(uint8_t val) { return doWriteReg(STATE_SETTIMING,TSL256X_PTR_TIMING,val,1); } command error_t HplTSL256x.setTHRESHLOW(uint16_t val) { // As it turns out, you have to use the SMB Write Word flag to use this command return doWriteReg(STATE_SETLOW,(TSL256X_COMMAND_WORD | TSL256X_PTR_THRESHLOWLOW),val,2); } command error_t HplTSL256x.setTHRESHHIGH(uint16_t val) { // As it turns out, you have to use the SMB Write Word flag to use this command return doWriteReg(STATE_SETHIGH,(TSL256X_COMMAND_WORD | TSL256X_PTR_THRESHHIGHLOW),val,2); } command error_t HplTSL256x.setINTERRUPT(uint8_t val) { return doWriteReg(STATE_SETINTERRUPT,(TSL256X_COMMAND_CLEAR | TSL256X_PTR_INTERRUPT),val,1); } command error_t HplTSL256x.getID() { return doReadPrep(STATE_READID,TSL256X_PTR_ID); } async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { uint16_t tempVal; error_t error = i2c_error; switch (mState) { case STATE_READCH0: tempVal = buf[1]; tempVal = ((tempVal << 8) | buf[0]); mState = STATE_IDLE; signal HplTSL256x.measureCh0Done(error,tempVal); break; case STATE_READCH1: tempVal = buf[1]; tempVal = ((tempVal << 8) | buf[0]); mState = STATE_IDLE; signal HplTSL256x.measureCh1Done(error,tempVal); break; case STATE_READID: mState = STATE_IDLE; signal HplTSL256x.getIDDone(error,buf[0]); break; default: mState = STATE_IDLE; break; } return; } async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) { error_t error = i2c_error; switch (mState) { case STATE_STARTING: mSSError = error; mState = STATE_IDLE; post StartDone(); break; case STATE_STOPPING: mSSError = error; mState = STATE_STOPPED; post StopDone(); break; case STATE_READCH0: error = call I2CPacket.read(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer); break; case STATE_READCH1: error = call I2CPacket.read(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer); break; case STATE_SETCONTROL: mState = STATE_IDLE; signal HplTSL256x.setCONTROLDone(error); break; case STATE_SETTIMING: mState = STATE_IDLE; signal HplTSL256x.setTIMINGDone(error); break; case STATE_SETINTERRUPT: mState = STATE_IDLE; signal HplTSL256x.setINTERRUPTDone(error); break; case STATE_SETHIGH: mState = STATE_IDLE; signal HplTSL256x.setTHRESHHIGHDone(error); break; case STATE_SETLOW: mState = STATE_IDLE; signal HplTSL256x.setTHRESHLOWDone(error); break; case STATE_READID: error = call I2CPacket.read(I2C_STOP,devAddr,1,mI2CBuffer); break; default: mState = STATE_IDLE; break; } return; } async event void InterruptAlert.fired() { // This alert is decoupled from whatever state the TSL2561 is in. // Upper layers must handle dealing with this alert appropriately. signal HplTSL256x.alertThreshold(); // need to clear interrupt, this is dangerous... // if you get interrupted while someone is reading... // ... the I2C bus may become inconsistent? //clearInterrupt(); return; } default event void SplitControl.startDone( error_t error ) { return; } default event void SplitControl.stopDone( error_t error ) { return; } default async event void HplTSL256x.measureCh0Done( error_t error, uint16_t val ){ return; } default async event void HplTSL256x.measureCh1Done( error_t error, uint16_t val ){ return; } default async event void HplTSL256x.setCONTROLDone( error_t error ){ return; } default async event void HplTSL256x.setTIMINGDone(error_t error){ return; } default async event void HplTSL256x.setTHRESHLOWDone(error_t error){ return;} default async event void HplTSL256x.setTHRESHHIGHDone(error_t error){ return; } default async event void HplTSL256x.setINTERRUPTDone(error_t error){ return;} default async event void HplTSL256x.getIDDone(error_t error, uint8_t idval){ return; } default async event void HplTSL256x.alertThreshold(){ return; } } tinyos-2.1.2+dfsg/tos/chips/tsl2561/HplTSL256x.nc000066400000000000000000000051421207233610700210730ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * HplTSL256x is the Hpl inteface to the Taos TSL256x series * Light-to-Digital converters. * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ interface HplTSL256x { command error_t measureCh0(); async event void measureCh0Done( error_t error, uint16_t val ); command error_t measureCh1(); async event void measureCh1Done( error_t error, uint16_t val ); command error_t setCONTROL( uint8_t val ); async event void setCONTROLDone( error_t error ); command error_t setTIMING( uint8_t val ); async event void setTIMINGDone( error_t error ); command error_t setTHRESHLOW(uint16_t val); async event void setTHRESHLOWDone(error_t error); command error_t setTHRESHHIGH(uint16_t val); async event void setTHRESHHIGHDone(error_t error); command error_t setINTERRUPT(uint8_t val); async event void setINTERRUPTDone(error_t error); command error_t getID(); async event void getIDDone(error_t error, uint8_t idval); async event void alertThreshold(); } tinyos-2.1.2+dfsg/tos/chips/tsl2561/TSL256x.h000066400000000000000000000053671207233610700202670ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in so1urce and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Types and definitions for the Taos TSL256x sensor * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ #ifndef _TSL256X_H #define _TSL256X_H #define TSL256X_PTR_CONTROL (0x0) #define TSL256X_PTR_TIMING (0x1) #define TSL256X_PTR_THRESHLOWLOW (0x2) #define TSL256X_PTR_THRESHLOWHIGH (0x3) #define TSL256X_PTR_THRESHHIGHLOW (0x4) #define TSL256X_PTR_THRESHHIGHIGH (0x5) #define TSL256X_PTR_INTERRUPT (0x6) #define TSL256X_PTR_CRC (0x8) #define TSL256X_PTR_ID (0xA) #define TSL256X_PTR_DATA0LOW (0xC) #define TSL256X_PTR_DATA0HIGH (0xD) #define TSL256X_PTR_DATA1LOW (0xE) #define TSL256X_PTR_DATA1HIGH (0xF) #define TSL256X_COMMAND_CMD (1<<7) #define TSL256X_COMMAND_CLEAR (1<<6) #define TSL256X_COMMAND_WORD (1<<5) #define TSL256X_COMMAND_BLOCK (1<<4) #define TSL256X_COMMAND_ADDRESS(_x) ((_x) & 0xF) #define TSL256X_CONTROL_POWER_ON (0x3) #define TSL256X_CONTROL_POWER_OFF (0x0) #define TSL256X_TIMING_GAIN (1<<4) #define TSL256X_TIMING_MANUAL (1<<3) #define TSL256X_TIMING_INTEG(_x) ((_x) & 0x3) #define TSL256X_INTERRUPT_INTR(_x) (((_x) & 0x3) << 4) #define TSL256X_INTERRUPT_PERSIST(_x) ((_x) & 0xF) #endif /* _TSL256X_H */ tinyos-2.1.2+dfsg/tos/chips/xe1205/000077500000000000000000000000001207233610700166205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/xe1205/AckSendReceive.nc000066400000000000000000000001611207233610700217530ustar00rootroot00000000000000interface AckSendReceive { command void setAckPayload(uint16_t _pl); command uint16_t getAckPayload(); } tinyos-2.1.2+dfsg/tos/chips/xe1205/CsmaControl.nc000066400000000000000000000001501207233610700213620ustar00rootroot00000000000000interface CsmaControl { async command void enableCca(); async command void disableCca(); } tinyos-2.1.2+dfsg/tos/chips/xe1205/LPLControl.nc000066400000000000000000000001151207233610700211270ustar00rootroot00000000000000 interface LPLControl { async command void setMode(uint8_t mode); } tinyos-2.1.2+dfsg/tos/chips/xe1205/LowPowerListening.nc000066400000000000000000000113271207233610700226010ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Low Power Listening interface * * @author David Moss * @author Jonathan Hui */ interface LowPowerListening { /** * Set this this node's radio sleep interval, in milliseconds. * Once every interval, the node will sleep and perform an Rx check * on the radio. Setting the sleep interval to 0 will keep the radio * always on. * * This is the equivalent of setting the local duty cycle rate. * * @param sleepIntervalMs the length of this node's Rx check interval, in [ms] */ command void setLocalSleepInterval(uint16_t sleepIntervalMs); /** * @return the local node's sleep interval, in [ms] */ command uint16_t getLocalSleepInterval(); /** * Set this node's radio duty cycle rate, in units of [percentage*100]. * For example, to get a 0.05% duty cycle, * * call LowPowerListening.setDutyCycle(5); // or equivalently... * call LowPowerListening.setDutyCycle(00005); // for better readability? * * * For a 100% duty cycle (always on), * * call LowPowerListening.setDutyCycle(10000); * * * This is the equivalent of setting the local sleep interval explicitly. * * @param dutyCycle The duty cycle percentage, in units of [percentage*100] */ command void setLocalDutyCycle(uint16_t dutyCycle); /** * @return this node's radio duty cycle rate, in units of [percentage*100] */ command uint16_t getLocalDutyCycle(); /** * Configure this outgoing message so it can be transmitted to a neighbor mote * with the specified Rx sleep interval. * @param msg Pointer to the message that will be sent * @param sleepInterval The receiving node's sleep interval, in [ms] */ command void setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs); /** * @return the destination node's sleep interval configured in this message */ command uint16_t getRxSleepInterval(message_t *msg); /** * Configure this outgoing message so it can be transmitted to a neighbor mote * with the specified Rx duty cycle rate. * Duty cycle is in units of [percentage*100], i.e. 0.25% duty cycle = 25. * * @param msg Pointer to the message that will be sent * @param dutyCycle The duty cycle of the receiving mote, in units of * [percentage*100] */ command void setRxDutyCycle(message_t *msg, uint16_t dutyCycle); /** * @return the destination node's duty cycle configured in this message * in units of [percentage*100] */ command uint16_t getRxDutyCycle(message_t *msg); /** * Convert a duty cycle, in units of [percentage*100], to * the sleep interval of the mote in milliseconds * @param dutyCycle The duty cycle in units of [percentage*100] * @return The equivalent sleep interval, in units of [ms] */ command uint16_t dutyCycleToSleepInterval(uint16_t dutyCycle); /** * Convert a sleep interval, in units of [ms], to a duty cycle * in units of [percentage*100] * @param sleepInterval The sleep interval in units of [ms] * @return The duty cycle in units of [percentage*100] */ command uint16_t sleepIntervalToDutyCycle(uint16_t sleepInterval); } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205.h000066400000000000000000000137351207233610700176260ustar00rootroot00000000000000/* * Copyright (c) 2005, Ecole Polytechnique Federale de Lausanne (EPFL) * and Shockfish SA, Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * and Shockfish SA, nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * XE1205 constants and helper macros and functions. * */ /** * @author Henri Dubois-Ferriere * @author Remy Blank * */ #ifndef _XE1205CONST_H #define _XE1205CONST_H #include "AM.h" typedef nx_struct xe1205_header_t { nx_am_addr_t dest; nx_am_addr_t source; nx_am_id_t type; nx_am_group_t group; nx_uint8_t ack; } xe1205_header_t; typedef nx_struct xe1205_footer_t { #ifdef LOW_POWER_LISTENING nx_uint16_t rxInterval; #endif nxle_uint16_t crc; } xe1205_footer_t; typedef nx_struct xe1205_metadata_t { nx_uint8_t length; nx_uint8_t strength; } xe1205_metadata_t; /* * Register address generators. */ #define XE1205_WRITE(register_) (((register_) << 1) | 0x01) #define XE1205_READ(register_) (((register_) << 1) | 0x41) /** * Register addresses. */ enum xe1205_register_enums { MCParam_0 = 0, MCParam_1 = 1, MCParam_2 = 2, MCParam_3 = 3, MCParam_4 = 4, IrqParam_5 = 5, IrqParam_6 = 6, TXParam_7 = 7, RXParam_8 = 8, RXParam_9 = 9, RXParam_10 = 10, RXParam_11 = 11, RXParam_12 = 12, Pattern_13 = 13, Pattern_14 = 14, Pattern_15 = 15, Pattern_16 = 16, OscParam_17 = 17, OscParam_18 = 18, TParam_19 = 19, TParam_21 = 21, TParam_22 = 22, XE1205_RegCount }; #ifndef TOSH_DATA_LENGTH #define TOSH_DATA_LENGTH 28 #endif enum { xe1205_mtu=TOSH_DATA_LENGTH + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t) }; enum { data_pattern = 0x893456, ack_pattern = 0x123fed }; typedef enum { rx_irq0_none=0, rx_irq0_write_byte=1, rx_irq0_nFifoEmpty=2, rx_irq0_Pattern=3, } xe1205_rx_irq0_src_t; typedef enum xe1205_rx_irq1_src_t { rx_irq1_none=0, rx_irq1_FifoFull=1, rx_irq1_Rssi=2 } xe1205_rx_irq1_src_t; // In TX, IRQ0 is always mapped to nFifoEmpty typedef enum { tx_irq1_FifoFull=0, tx_irq1_TxStopped=1 } xe1205_tx_irq1_src_t; typedef enum { xe1205_channelpreset_868mhz=0, xe1205_channelpreset_869mhz=1, xe1205_channelpreset_870mhz=2, xe1205_channelpreset_433mhz=3, xe1205_channelpreset_434mhz=4, xe1205_channelpreset_435mhz=5, } xe1205_channelpreset_t; typedef enum { xe1205_txpower_0dbm=0, xe1205_txpower_5dbm=1, xe1205_txpower_10dbm=2, xe1205_txpower_15dbm=3 } xe1205_txpower_t; typedef enum { xe1205_bitrate_152340=152340U, xe1205_bitrate_76170=76170U, xe1205_bitrate_50780=50780U, xe1205_bitrate_38085=38085U, // xe1205_bitrate_30468=30468, // xe1205_bitrate_19042=19042, // xe1205_bitrate_12695=12695, // xe1205_bitrate_8017=8017, // xe1205_bitrate_4760=4760 } xe1205_bitrate_t; /** * Receiver modes. */ enum { XE1205_LnaModeA = 0, XE1205_LnaModeB = 1 }; /** * Radio Transition times. * See Table 4 of the XE1205 data sheet. */ enum xe1205_transition_time_enums { XE1205_Standby_to_RX_Time = 700, // RX wakeup time (us), with quartz oscillator enabled XE1205_TX_to_RX_Time = 500, // RX wakeup time (us), with freq. synthesizer enabled XE1205_Standby_to_TX_Time = 250, // TX wakeup time (us), with quartz oscillator enabled XE1205_RX_to_TX_Time = 100, // TX wakeup time (us), with freq. synthesizer enabled XE1205_FS_Wakeup_Time = 200, // Frequency synthesizer wakeup time XE1205_Sleep_to_Standby_Time = 1000 // Quartz oscillator wakeup time ( xxx 7ms for 3rd overtone????) }; // xxx merge into above enum but check enum { XE1205_Sleep_to_RX_Time = XE1205_Sleep_to_Standby_Time + XE1205_Standby_to_RX_Time, XE1205_Sleep_to_TX_Time = XE1205_Sleep_to_Standby_Time + XE1205_Standby_to_TX_Time }; enum { RSSI_BELOW_110 = 0, RSSI_110_TO_105 = 1, RSSI_105_TO_100 = 2, RSSI_100_TO_95 = 3, RSSI_95_TO_90 = 4, RSSI_90_TO_85 = 5, RSSI_ABOVE_85 = 6 }; uint8_t const rssiTab[] = { RSSI_BELOW_110, // 0b0000 RSSI_110_TO_105, // 0b0001 RSSI_105_TO_100, // 0b0010 RSSI_100_TO_95, // 0b0011 RSSI_95_TO_90, // 0b0100 * RSSI_95_TO_90, // 0b0101 * RSSI_95_TO_90, // 0b0110 * RSSI_95_TO_90, // 0b0111 RSSI_90_TO_85, // 0b1000 * RSSI_90_TO_85, // 0b1001 * RSSI_90_TO_85, // 0b1010 * RSSI_90_TO_85, // 0b1011 RSSI_ABOVE_85, // 0b1100 * RSSI_ABOVE_85, // 0b1101 * RSSI_ABOVE_85, // 0b1110 * RSSI_ABOVE_85 // 0b1111 // (*) : 'inconsistent' pairs }; #endif /* _XE1205CONST_H */ tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205ActiveMessageC.nc000066400000000000000000000060341207233610700225350ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ configuration XE1205ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Packet; interface PacketAcknowledgements; #ifdef LOW_POWER_LISTENING interface LowPowerListening; #endif } } implementation { components XE1205SendReceiveC; Packet = XE1205SendReceiveC; PacketAcknowledgements = XE1205SendReceiveC; components XE1205ActiveMessageP; #ifdef LOW_POWER_LISTENING components XE1205LowPowerListeningC as Lpl; LowPowerListening = Lpl; XE1205ActiveMessageP.SubSend -> Lpl.Send; XE1205ActiveMessageP.SubReceive -> Lpl.Receive; SplitControl = Lpl; #else XE1205ActiveMessageP.Packet -> XE1205SendReceiveC; XE1205ActiveMessageP.SubSend -> XE1205SendReceiveC.Send; XE1205ActiveMessageP.SubReceive -> XE1205SendReceiveC.Receive; SplitControl = XE1205SendReceiveC; #endif AMPacket = XE1205ActiveMessageP; AMSend = XE1205ActiveMessageP; Receive = XE1205ActiveMessageP.Receive; Snoop = XE1205ActiveMessageP.Snoop; components ActiveMessageAddressC; XE1205ActiveMessageP.amAddress -> ActiveMessageAddressC; components XE1205IrqConfC, XE1205PatternConfC, XE1205PhyRssiConfC; } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205ActiveMessageP.nc000066400000000000000000000122241207233610700225500ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ module XE1205ActiveMessageP { uses interface Packet; uses interface Send as SubSend; uses interface Receive as SubReceive; uses command am_addr_t amAddress(); provides interface AMSend[am_id_t id]; provides interface AMPacket; provides interface Receive[am_id_t id]; provides interface Receive as Snoop[am_id_t id]; } implementation { // xxx - this is replicated in ActiveMessageP. // put in XE1205.h? xe1205_header_t* getHeader( message_t* msg ) { return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) ); } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* msg) { xe1205_header_t* header = getHeader(msg); return header->dest; } command void AMPacket.setDestination(message_t* msg, am_addr_t addr) { xe1205_header_t* header = getHeader(msg); header->dest = addr; } command am_addr_t AMPacket.source(message_t* msg) { xe1205_header_t* header = getHeader(msg); return header->source; } command void AMPacket.setSource(message_t* msg, am_addr_t addr) { xe1205_header_t* header = getHeader(msg); header->source = addr; } command bool AMPacket.isForMe(message_t* msg) { return (call AMPacket.destination(msg) == call AMPacket.address() || call AMPacket.destination(msg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* msg) { xe1205_header_t* header = getHeader(msg); return header->type; } command void AMPacket.setType(message_t* msg, am_id_t type) { xe1205_header_t* header = getHeader(msg); header->type = type; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { xe1205_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.group(message_t* msg) { xe1205_header_t* header = getHeader(msg); return header->group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { xe1205_header_t* header = getHeader(msg); header->type = id; header->dest = addr; header->source = call AMPacket.address(); header->group = TOS_AM_GROUP; return call SubSend.send(msg, len); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } event void SubSend.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) __attribute__ ((noinline)) { if (call AMPacket.isForMe(msg)) { return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); } else { return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); } } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205CsmaP.nc000066400000000000000000000164741207233610700207260ustar00rootroot00000000000000/* Copyright (c) 2007 Shockfish SA * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Maxime Muller * */ #include "XE1205.h" #include "XE1205LowPowerListening.h" #define MAX(X,Y) X>Y ? X:Y module XE1205CsmaP { provides { interface Init @atleastonce(); interface SplitControl @atleastonce(); interface Send; interface Receive; interface CsmaControl; interface LPLControl; interface CsmaBackoff[am_id_t amId]; } uses { interface SplitControl as SubControl; interface Receive as SubReceive; interface Send as SubSend; interface XE1205PhyRssi as Rssi; interface XE1205PhyConf as RadioConf; interface Timer as BackoffTimer; interface Random; } } implementation { enum { RADIO_DISABLED, RADIO_IDLE, RADIO_RX, RADIO_TX, }; uint8_t rState; uint8_t rxRssi; uint8_t clrRssi; norace uint8_t rssiSampleCnt; bool enableCCA; message_t * txMsg; uint8_t txLen; enum { RSSI_RX = 0, RSSI_CLR = 1, }; uint16_t MA_LENGTH = 8; uint8_t MAX_RSSI_SAMPLE = 4; norace float RSSI_RX_MA; norace float RSSI_CLR_MA; /* * function prototypes */ task void readRssi(); task void send(); command error_t Init.init() { rssiSampleCnt=0; rState = RADIO_DISABLED; RSSI_RX_MA = RSSI_ABOVE_85; RSSI_CLR_MA = RSSI_90_TO_85; return SUCCESS; } command error_t SplitControl.start() { return call SubControl.start(); } event void SubControl.startDone(error_t err) { if (err!=SUCCESS) { atomic { if (rState == RADIO_TX) signal Send.sendDone(txMsg,FAIL); else signal SplitControl.startDone(err); } } else { atomic { if (rState == RADIO_TX) { if(enableCCA==TRUE) { if(SUCCESS != post readRssi()) { signal Send.sendDone(txMsg,FAIL); } return; } else { post send(); return; if (SUCCESS != post send()) { signal Send.sendDone(txMsg,FAIL); return; } } } signal SplitControl.startDone(err); } } } command error_t SplitControl.stop() { return call SubControl.stop(); } event void SubControl.stopDone(error_t err) { atomic { if (rState == RADIO_RX) // LPL: shutdown if no activity if (err==SUCCESS) rState = RADIO_IDLE; } signal SplitControl.stopDone(err); } void updateRssiMA(uint8_t maType, uint8_t value) { switch (maType) { case RSSI_CLR: if((float)value < MAX(RSSI_RX_MA,RSSI_CLR_MA)) RSSI_CLR_MA = (RSSI_CLR_MA*(MA_LENGTH - 1)+ value )/(MA_LENGTH); break; case RSSI_RX: RSSI_RX_MA = (RSSI_RX_MA*(MA_LENGTH - 1)+ value )/(MA_LENGTH); break; default: break; } } event message_t *SubReceive.receive(message_t* msg, void* payload, uint8_t len){ uint8_t strgth = ((xe1205_metadata_t*)((uint8_t*)msg->footer + sizeof(xe1205_footer_t)))->strength; updateRssiMA(RSSI_RX, strgth); return signal Receive.receive(msg, payload, len); } command error_t Send.send(message_t* msg, uint8_t len) { error_t err; atomic { switch (rState) { case RADIO_DISABLED: return EOFF; default: rState = RADIO_TX; atomic txMsg = msg; atomic txLen = len; err = call SubControl.start(); return err; } } } task void send() { if (SUCCESS != call SubSend.send(txMsg, txLen)) { atomic rState = RADIO_IDLE; signal Send.sendDone(txMsg, FAIL); } } event void SubSend.sendDone(message_t *msg, error_t err) { atomic rState = RADIO_IDLE; signal Send.sendDone(msg, err); } command void* Send.getPayload(message_t* m,uint8_t len) { return m->data; } command uint8_t Send.maxPayloadLength() { return TOSH_DATA_LENGTH; } command error_t Send.cancel( message_t* p_msg ) { return FAIL; } task void readRssi() { if(SUCCESS!=call Rssi.getRssi()) { atomic { if (rState == RADIO_TX) { signal Send.sendDone(txMsg, FAIL); } else { signal SplitControl.startDone(FAIL); } } } } event void BackoffTimer.fired() { rssiSampleCnt = 0; if(SUCCESS != post send()) { atomic rState = RADIO_IDLE; signal Send.sendDone(txMsg,FAIL); } } async event void Rssi.rssiDone(uint8_t val) { updateRssiMA(RSSI_CLR, val); atomic { if (rState == RADIO_DISABLED) { rState = RADIO_IDLE; signal SplitControl.startDone(SUCCESS); return; } } // RX for LPL only atomic { if (rState == RADIO_RX) { if (RSSI_CLR_MA >= (float)val) { // go back to sleep call SubControl.stop(); return; } else // tell lpl layer we have some activity signal SplitControl.startDone(SUCCESS); } // TX if (rState == RADIO_TX) { rssiSampleCnt++; if ( RSSI_RX_MA >= (float)val || RSSI_CLR_MA >= (float)val || !enableCCA) { // it's a go if (enableCCA) { call BackoffTimer.startOneShot(signal CsmaBackoff.initial[((xe1205_header_t*)(txMsg->data - sizeof(xe1205_header_t)))->type](txMsg)); } else post send(); return; } else if (enableCCA && rssiSampleCnt < MAX_RSSI_SAMPLE) { post readRssi(); } else { call BackoffTimer.startOneShot(signal CsmaBackoff.congestion[((xe1205_header_t*)(txMsg->data - sizeof(xe1205_header_t)))->type](txMsg)); } } } } async command void LPLControl.setMode(uint8_t mode) { switch (mode) { case RX: atomic { if(rState!=RADIO_TX) rState = RADIO_RX; } break; case IDLE: atomic rState = RADIO_IDLE; default: return; } } async command void CsmaControl.enableCca() { atomic enableCCA = TRUE; } async command void CsmaControl.disableCca() { atomic enableCCA = FALSE; } default async event uint16_t CsmaBackoff.initial[am_id_t amId](message_t *m) { return (call Random.rand16() & 0x07) + 1; } default async event uint16_t CsmaBackoff.congestion[am_id_t amId](message_t *m) { return (call Random.rand16() & 0xF) + 1; } } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205CsmaRadioC.nc000066400000000000000000000051661207233610700216640ustar00rootroot00000000000000/* Copyright (c) 2007 Shockfish SA * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Maxime Muller * */ #include "message.h" #include "XE1205.h" configuration XE1205CsmaRadioC { provides { interface SplitControl; interface Send; interface Receive; interface Packet; interface CsmaControl; interface CsmaBackoff[am_id_t amId]; interface PacketAcknowledgements; interface LPLControl; } } implementation { components XE1205CsmaP as CsmaP; components XE1205SendReceiveP as SendReceive; components XE1205PhyP; components new TimerMilliC() as BackoffTimerC; components MainC, RandomC,ActiveMessageC, ActiveMessageAddressC; MainC.SoftwareInit -> CsmaP; Send = CsmaP; Receive = CsmaP; Packet = SendReceive; PacketAcknowledgements = SendReceive; SplitControl = CsmaP; CsmaControl = CsmaP; CsmaBackoff = CsmaP; LPLControl = CsmaP; CsmaP.SubControl -> SendReceive.SplitControl; CsmaP.SubReceive -> SendReceive.Receive; CsmaP.SubSend -> SendReceive.Send; CsmaP.Rssi -> XE1205PhyP.XE1205PhyRssi; CsmaP.BackoffTimer -> BackoffTimerC; CsmaP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205Fifo.nc000066400000000000000000000060771207233610700206040ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Interface for access to the XE1205 radio Fifo. * * @author Henri Dubois-Ferriere */ interface XE1205Fifo { /** * Write a sequence of data bytes to the output FIFO. * Care must be taken not to overflow the FIFO (16 bytes). * If call returns SUCCESS, writeDone will be signalled upon completion. * * @param data a pointer to the send buffer. * @param length number of bytes written. * @return SUCCESS if the request was accepted for transfer */ async command error_t write(uint8_t* data, uint8_t length); /** * Signals the completion of the previous write operation. * * @param error SUCCESS if the operation completed successfully, FAIL * otherwise */ async event void writeDone(error_t error); /** * Read a sequence of data bytes from the input FIFO. * The FIFO level is not checked, and care must be taken not to underflow * the FIFO (16 bytes). * * @param data a pointer to the receive buffer. * @param length number of bytes to read. * @return SUCCESS if the request was accepted for transfer */ async command error_t read(uint8_t* data, uint8_t length); /** * Signals the completion of the previous write operation. * * @param error SUCCESS if the operation completed successfully, FAIL * otherwise */ async event void readDone(error_t error ); } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205LowPowerListening.h000066400000000000000000000041151207233610700231720ustar00rootroot00000000000000/* Copyright (c) 2007 Shockfish SA * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Maxime Muller * */ #ifndef XE1205LOWPOWERLISTENING_H #define XE1205LOWPOWERLISTENING_H /** * Amount of time, in milliseconds, to keep the radio on after * a successful receive addressed to this node */ #ifndef DELAY_AFTER_RECEIVE #define DELAY_AFTER_RECEIVE 20 #endif /** * Value used to indicate the message being sent should be transmitted * one time */ #ifndef ONE_MESSAGE #define ONE_MESSAGE 0 #endif #ifndef DEFAULT_DUTY_PERIOD #define DEFAULT_DUTY_PERIOD 80 #endif enum { IDLE = 0, RX = 1, }; #endif tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205LowPowerListeningC.nc000066400000000000000000000031011207233610700234400ustar00rootroot00000000000000 configuration XE1205LowPowerListeningC { provides { interface SplitControl; interface Send; interface Receive; interface LowPowerListening; // interface CsmaBackoff[am_id_t amId]; } } implementation { components MainC, XE1205ActiveMessageC, XE1205LowPowerListeningP, /*XE1205CsmaP as*/ XE1205CsmaRadioC, RandomC; components new TimerMilliC() as SendTimeoutC; components new TimerMilliC() as OnTimerC; components new TimerMilliC() as OffTimerC; Send = XE1205LowPowerListeningP; Receive = XE1205LowPowerListeningP; SplitControl = XE1205LowPowerListeningP; LowPowerListening = XE1205LowPowerListeningP; // CsmaBackoff = XE1205LowPowerListeningP; MainC.SoftwareInit -> XE1205LowPowerListeningP; //XE1205LowPowerListeningP.LowPowerListening -> XE1205CsmaRadioC; XE1205LowPowerListeningP.SubControl -> XE1205CsmaRadioC; XE1205LowPowerListeningP.CsmaControl -> XE1205CsmaRadioC; // XE1205LowPowerListeningP.SubBackoff -> XE1205CsmaRadioC; XE1205LowPowerListeningP.SubSend -> XE1205CsmaRadioC.Send; XE1205LowPowerListeningP.SubReceive -> XE1205CsmaRadioC.Receive; XE1205LowPowerListeningP.AMPacket -> XE1205ActiveMessageC; XE1205LowPowerListeningP.PacketAcknowledgements -> XE1205ActiveMessageC;// XE1205CsmaRadioC; XE1205LowPowerListeningP.SendTimeout -> SendTimeoutC; XE1205LowPowerListeningP.OnTimer -> OnTimerC; XE1205LowPowerListeningP.OffTimer -> OffTimerC; XE1205LowPowerListeningP.Random -> RandomC; XE1205LowPowerListeningP.LPLControl -> XE1205CsmaRadioC.LPLControl; } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205LowPowerListeningP.nc000066400000000000000000000226001207233610700234620ustar00rootroot00000000000000/* Copyright (c) 2007 Shockfish SA * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Maxime Muller * */ #include "XE1205LowPowerListening.h" module XE1205LowPowerListeningP { provides { interface Init; interface SplitControl; interface Send; interface Receive; interface LowPowerListening; } uses { interface LPLControl; interface SplitControl as SubControl; interface CsmaControl; interface Send as SubSend; interface Receive as SubReceive; interface AMPacket; interface PacketAcknowledgements; interface Timer as SendTimeout; interface Timer as OnTimer; interface Timer as OffTimer; interface Random; } } implementation { message_t * curTxMsg; uint8_t curTxMsgLength; uint8_t seqNo; uint8_t lastSeqNo; uint8_t txSeqNo; uint16_t sleepInterval; uint16_t sleepTime; bool fromSplitStart = FALSE; bool fromSplitStop = FALSE; typedef enum { RADIO_INIT, RADIO_ON, RADIO_OFF, RADIO_TX, } lpl_state_t; lpl_state_t rState; void sendDone(error_t err); xe1205_header_t* getHeader( message_t* msg ) { return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) ); } xe1205_footer_t* getFooter(message_t* msg) { return (xe1205_footer_t*)(msg->footer); } command error_t Init.init() { sleepTime = DEFAULT_DUTY_PERIOD; atomic rState = RADIO_INIT; txSeqNo = call Random.rand16()&0xFE; return SUCCESS; } command error_t SplitControl.start() { // start dutyCycling if (rState == RADIO_OFF || rState == RADIO_INIT) { if (SUCCESS==call SubControl.start()) { fromSplitStart = TRUE; return SUCCESS; } } return FAIL; } event void SubControl.startDone(error_t err) { if(err==SUCCESS) { if(sleepTime > 0) {// keep radio on for a while call OffTimer.stop(); call OnTimer.startOneShot(DELAY_AFTER_RECEIVE); } if (sleepTime == 0) // radio always on call LPLControl.setMode(IDLE); atomic rState = RADIO_ON; if (fromSplitStart) { fromSplitStart=FALSE; signal SplitControl.startDone(err); } } else { call SubControl.start(); } } command error_t SplitControl.stop() { fromSplitStop = TRUE; return call SubControl.stop(); } event void SubControl.stopDone(error_t err) { if(!err) { if (rState == RADIO_ON) { if (call OnTimer.isRunning()) { call OnTimer.stop(); } } atomic rState = RADIO_OFF; if (fromSplitStop==FALSE) { call OffTimer.startOneShot(sleepTime); } else { fromSplitStop = FALSE; signal SplitControl.startDone(err); } } else call OffTimer.startOneShot(sleepTime); } event void OffTimer.fired() { if (SUCCESS==call SubControl.start()) { if (sleepTime > 0) call LPLControl.setMode(RX); if (sleepTime == 0) // radio always on call LPLControl.setMode(IDLE); } else call OffTimer.startOneShot(sleepTime); } event void OnTimer.fired() { // switch off the radio if(sleepTime > 0) if (SUCCESS != call SubControl.stop()) { // retry call OnTimer.startOneShot(DELAY_AFTER_RECEIVE); } } task void sendPkt() { if(SUCCESS != call SubSend.send(curTxMsg,curTxMsgLength)) { call LPLControl.setMode(IDLE); call OffTimer.startOneShot(sleepTime); sendDone(FAIL); } } /* * send commands */ command error_t Send.send(message_t *msg, uint8_t len) { if (rState == RADIO_INIT) return EOFF; else { call OffTimer.stop(); call OnTimer.stop(); atomic rState = RADIO_TX; curTxMsg = msg; curTxMsgLength = len; if(call LowPowerListening.getRxSleepInterval(curTxMsg) > ONE_MESSAGE) { txSeqNo+=0x02; if (AM_BROADCAST_ADDR != call AMPacket.destination(curTxMsg)) { getHeader(curTxMsg)->ack = txSeqNo|0x01; } else getHeader(curTxMsg)->ack = txSeqNo&0xFE; call CsmaControl.enableCca(); if(SUCCESS==post sendPkt()) { call SendTimeout.startOneShot(call LowPowerListening.getRxSleepInterval(curTxMsg) * 2); return SUCCESS; } else { call SendTimeout.stop(); call LPLControl.setMode(IDLE); call OffTimer.startOneShot(sleepTime); return FAIL; } } else { call LPLControl.setMode(IDLE); call OffTimer.startOneShot(sleepTime); return FAIL; } } } event void SendTimeout.fired() { atomic { if (rState == RADIO_TX) // let sendDone occur rState = RADIO_ON; } call OffTimer.startOneShot(DELAY_AFTER_RECEIVE); } void sendDone(error_t err) { atomic { if (rState == RADIO_TX) rState = RADIO_ON; } if(err!=FAIL) call SubControl.stop(); signal Send.sendDone(curTxMsg, err); } event void SubSend.sendDone(message_t *msg, error_t err) { if(rState == RADIO_TX && call SendTimeout.isRunning()) { if ( AM_BROADCAST_ADDR != call AMPacket.destination(msg) && err==SUCCESS) { call SendTimeout.stop(); sendDone(err); } else { // ack timeout or bcast msg call CsmaControl.disableCca(); if(SUCCESS!=post sendPkt()) { sendDone(FAIL); } } } else { sendDone(err); } } command error_t Send.cancel(message_t *msg) { if(curTxMsg == msg) { atomic rState = RADIO_ON; return SUCCESS; } return FAIL; } command uint8_t Send.maxPayloadLength() { return call SubSend.maxPayloadLength(); } command void *Send.getPayload(message_t* msg, uint8_t len) { return call SubSend.getPayload(msg,len); } /* * Receive commands */ event message_t *SubReceive.receive(message_t *msg,void *payload, uint8_t len) { if ((getHeader(msg)->ack & 0xFE ) == lastSeqNo && call AMPacket.destination(msg) == AM_BROADCAST_ADDR) { return msg; } else { lastSeqNo = getHeader(msg)->ack & 0xFE; if(!call SendTimeout.isRunning()) { // catched a packet between pktSend call OffTimer.startOneShot(DELAY_AFTER_RECEIVE); } return signal Receive.receive(msg,payload,len); } } uint16_t getActualDutyCycle(uint16_t dutyCycle) { if(dutyCycle > 10000) { return 10000; } else if(dutyCycle == 0) { return 1; } return dutyCycle; } command void LowPowerListening.setLocalSleepInterval(uint16_t sTime) { if(sleepTime == 0 && sTime >0) { call LPLControl.setMode(RX); call OnTimer.startOneShot(DELAY_AFTER_RECEIVE); } sleepTime = sTime; } command uint16_t LowPowerListening.getLocalSleepInterval() { return sleepTime; } command void LowPowerListening.setLocalDutyCycle(uint16_t d) { return call LowPowerListening.setLocalSleepInterval(call LowPowerListening.dutyCycleToSleepInterval(d)); } command uint16_t LowPowerListening.getLocalDutyCycle() { return call LowPowerListening.sleepIntervalToDutyCycle(sleepTime); } command void LowPowerListening.setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs) { xe1205_footer_t *footer = getFooter(msg); footer->rxInterval = sleepIntervalMs; } command uint16_t LowPowerListening.getRxSleepInterval(message_t *msg) { xe1205_footer_t *footer = getFooter(msg); if (footer->rxInterval >= 0) return sleepTime; else return -(footer->rxInterval + 1); } command void LowPowerListening.setRxDutyCycle(message_t *msg, uint16_t dCycle) { getFooter(msg)->rxInterval = call LowPowerListening.dutyCycleToSleepInterval(dCycle); } command uint16_t LowPowerListening.getRxDutyCycle(message_t *msg) { return call LowPowerListening.sleepIntervalToDutyCycle(getFooter(msg)->rxInterval); } command uint16_t LowPowerListening.dutyCycleToSleepInterval(uint16_t dCycle) { dCycle = getActualDutyCycle(dCycle); if(dCycle == 10000) { return 0; } return (DELAY_AFTER_RECEIVE * (10000 - dCycle)) / dCycle; } command uint16_t LowPowerListening.sleepIntervalToDutyCycle(uint16_t sInterval) { if(sInterval == 0) { return 10000; } return getActualDutyCycle((DELAY_AFTER_RECEIVE * 10000) / (sInterval + DELAY_AFTER_RECEIVE)); } } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205PacketC.nc000066400000000000000000000040561207233610700212260ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ #include "message.h" configuration XE1205PacketC { provides interface AMPacket; provides interface Packet; } implementation { components XE1205PacketP; AMPacket = XE1205PacketP; Packet = XE1205PacketP; components ActiveMessageAddressC; XE1205PacketP.amAddress -> ActiveMessageAddressC; } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205SendReceiveC.nc000066400000000000000000000047041207233610700222130ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ configuration XE1205SendReceiveC { provides interface Send; provides interface Packet; provides interface PacketAcknowledgements; provides interface AckSendReceive; provides interface SplitControl @atleastonce(); provides interface Receive; } implementation { components XE1205SendReceiveP; Send = XE1205SendReceiveP; Receive = XE1205SendReceiveP; Packet = XE1205SendReceiveP; PacketAcknowledgements = XE1205SendReceiveP; AckSendReceive = XE1205SendReceiveP; SplitControl = XE1205SendReceiveP; components XE1205PhyC; XE1205SendReceiveP.XE1205PhyRxTx -> XE1205PhyC; XE1205SendReceiveP.XE1205PhyRssi -> XE1205PhyC; XE1205SendReceiveP.PhySplitControl -> XE1205PhyC; } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205SendReceiveP.nc000066400000000000000000000345531207233610700222350ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ module XE1205SendReceiveP { provides interface Send; provides interface Packet; provides interface PacketAcknowledgements; provides interface Receive; provides interface AckSendReceive; provides interface SplitControl @atleastonce(); uses interface XE1205PhyRxTx; uses interface XE1205PhyRssi; uses interface SplitControl as PhySplitControl; } implementation { #include "crc.h" #include "xe1205debug.h" #define min(X, Y) ((X) < (Y) ? (X) : (Y)) enum { PKT_CODE = 0, ACK_CODE = 1 }; // Phy header definition. This is not seen by anything above us. typedef nx_struct xe1205_phy_header_t { nx_uint8_t whitening; nx_uint8_t length; } xe1205_phy_header_t; typedef struct ackMsg_t { uint16_t pl; } ackMsg_t; xe1205_phy_header_t txPhyHdr; norace xe1205_phy_header_t rxPhyHdr; // we don't accept an incoming packet until previous one has been copied into local buf norace message_t ackMsg; norace message_t *ackMsgPtr = &ackMsg; norace message_t *txMsgSendDonePtr=NULL; norace message_t *txMsgPtr=NULL; // message under transmission (non-null until after sendDone). norace uint8_t _len; norace char txBuf[16]; // buffer used to pass outgoing bytes to Phy norace uint8_t *rxBufPtr=NULL; // pointer to raw frame received from Phy message_t rxMsg; // for rx path buffer swapping with upper modules message_t *rxMsgPtr=&rxMsg; norace uint8_t txIndex, txLen; // State for packet transmissions norace uint16_t txRunningCRC; // Crc for outgoing pkts is computed incrementally norace uint8_t txWhiteByte; norace bool sendingAck=FALSE; uint16_t ackPayload; bool warmUp=FALSE; uint8_t const pktPreamble[] = { 0x55, 0x55, 0x55, (data_pattern >> 16) & 0xff, (data_pattern >> 8) & 0xff, data_pattern & 0xff }; uint8_t const ackPreamble[] = { 0x55, 0x55, 0x55, (ack_pattern >> 16) & 0xff, (ack_pattern >> 8) & 0xff, ack_pattern & 0xff }; task void signalPacketReceived(); error_t sendRadioOn(uint8_t preamble); xe1205_header_t* getHeader( message_t* msg ) { return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) ); } xe1205_footer_t* getFooter(message_t* msg) { return (xe1205_footer_t*)(msg->footer); } xe1205_metadata_t* getMetadata(message_t* msg) { return (xe1205_metadata_t*)((uint8_t*)msg->footer + sizeof(xe1205_footer_t)); } command void AckSendReceive.setAckPayload(uint16_t _pl) { ackPayload = _pl; } command uint16_t AckSendReceive.getAckPayload() { return ackPayload; } command uint8_t Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command void* Send.getPayload(message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } task void sendDoneTask() { txMsgSendDonePtr = txMsgPtr; txMsgPtr=NULL; signal Send.sendDone(txMsgSendDonePtr, SUCCESS); } task void sendDoneFailTask() { txMsgSendDonePtr = txMsgPtr; txMsgPtr=NULL; signal Send.sendDone(txMsgSendDonePtr, FAIL); } task void sendDoneNoAckTask() { txMsgSendDonePtr = txMsgPtr; txMsgPtr=NULL; signal Send.sendDone(txMsgSendDonePtr, ENOACK); } command error_t SplitControl.start() { error_t err; err = call PhySplitControl.start(); return err; } command error_t SplitControl.stop() { error_t err; // One could also argue that this is split phase so should cope and do the right thing. // Or one could argue that whatever the phy is doing underneath just gets interrupted. if (call XE1205PhyRxTx.busy()) return EBUSY; err = call PhySplitControl.stop(); txMsgPtr=NULL; rxBufPtr = NULL; return err; } event void PhySplitControl.startDone(error_t error) { if (txMsgPtr!=NULL) { sendRadioOn(PKT_CODE); } else { if (warmUp==TRUE) { post sendDoneFailTask(); } } warmUp=FALSE; signal SplitControl.startDone(error); } event void PhySplitControl.stopDone(error_t error) { signal SplitControl.stopDone(error); } task void sendAck() { atomic { ((xe1205_metadata_t*)((uint8_t*)ackMsgPtr->footer + sizeof(xe1205_footer_t)))->length = sizeof(ackMsg_t); ((xe1205_header_t*)(&ackMsg.data - sizeof(xe1205_header_t)))->group = \ (getHeader((message_t*)rxMsgPtr))->group; ((xe1205_header_t*)(ackMsgPtr->data - sizeof(xe1205_header_t)))->type = \ ((xe1205_header_t*)(rxMsgPtr->data - sizeof(xe1205_header_t)))->type; ((xe1205_header_t*)(ackMsgPtr->data - sizeof(xe1205_header_t)))->dest = \ ((xe1205_header_t*)(rxMsgPtr->data - sizeof(xe1205_header_t)))->source; ((xe1205_header_t*)(ackMsgPtr->data - sizeof(xe1205_header_t)))->source = TOS_NODE_ID; ((ackMsg_t*)(ackMsgPtr->data))->pl = ackPayload; txMsgPtr = ackMsgPtr; } _len = sizeof(ackMsg_t); sendRadioOn(ACK_CODE); } command error_t Send.cancel(message_t* msg) { /* Cancel is unsupported for now. */ return FAIL; } void checkCrcAndUnwhiten(uint8_t* msg, uint8_t white, uint8_t len) { uint16_t crc = 0; uint8_t i, b; uint8_t* uwPtr ; atomic uwPtr= (uint8_t*) getHeader(rxMsgPtr); for(i = 0; i < sizeof(xe1205_header_t) + len + offsetof(xe1205_footer_t,crc) ; i++) { b = msg[i] ^ white; uwPtr[i] = b; crc = crcByte(crc, b); } atomic { getFooter(rxMsgPtr)->crc = (crc == (msg[i] | (msg[i+1] << 8))); } } inline void updateCRCAndWhiten(char* src, char* dst, uint8_t len) { uint8_t i; for(i=0; i < len; i++) { txRunningCRC = crcByte(txRunningCRC, src[i]); dst[i] = src[i] ^ txWhiteByte; } } error_t sendRadioOn(uint8_t preamble) { error_t err; txWhiteByte++; txPhyHdr.whitening = txWhiteByte; txPhyHdr.length = _len; txRunningCRC=0; getMetadata(txMsgPtr)->length = _len; if ((((xe1205_header_t*)( (uint8_t*)txMsgPtr->data - sizeof(xe1205_header_t)))->ack & 0x01)==0x01) { call XE1205PhyRxTx.enableAck(TRUE); } txIndex = min(sizeof(xe1205_header_t) + _len + sizeof(xe1205_footer_t), sizeof(txBuf) - sizeof(pktPreamble) - sizeof(xe1205_phy_header_t)); txLen = _len + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t); if (txIndex == txLen - 1) txIndex--; // don't send a single last byte switch (preamble) { case PKT_CODE: memcpy(txBuf, pktPreamble, sizeof(pktPreamble)); memcpy(txBuf + sizeof(pktPreamble), &txPhyHdr, sizeof(txPhyHdr)); break; case ACK_CODE: sendingAck=TRUE; memcpy(txBuf, ackPreamble, sizeof(ackPreamble)); memcpy(txBuf + sizeof(pktPreamble), &txPhyHdr, sizeof(txPhyHdr)); break; } if (txIndex == txLen) { // slap on CRC if we're already at end of packet updateCRCAndWhiten((char*) getHeader(txMsgPtr), txBuf + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t), sizeof(xe1205_header_t) + _len); txBuf[sizeof(pktPreamble) + sizeof(xe1205_phy_header_t) + txLen - 2] = txRunningCRC & 0xff; txBuf[sizeof(pktPreamble) + sizeof(xe1205_phy_header_t) + txLen - 1] = txRunningCRC >> 8; } else { updateCRCAndWhiten((char*) getHeader(txMsgPtr), txBuf + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t), txIndex); } // note that the continue send can come in before this instruction returns . err = call XE1205PhyRxTx.sendFrame(txBuf, txIndex + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t)); if (err != SUCCESS) { if (preamble==PKT_CODE) post sendDoneFailTask(); txMsgPtr = NULL; } return err; } command error_t Send.send(message_t* msg, uint8_t len) { atomic { if (txMsgPtr){ return EBUSY;} if (msg==NULL) { return FAIL;} if (call XE1205PhyRxTx.busy()==TRUE){ return EBUSY;} if (call XE1205PhyRxTx.off()) { txMsgPtr = msg; _len = len; if(call PhySplitControl.start()==SUCCESS) { warmUp=TRUE; return SUCCESS; } else {txMsgPtr=NULL;return EOFF;} } txMsgPtr = msg; _len = len; } return sendRadioOn(PKT_CODE); } async event char* XE1205PhyRxTx.continueSend(uint8_t* len) __attribute__ ((noinline)) { uint8_t curIndex = txIndex; uint8_t l = min(txLen - txIndex, sizeof(txBuf)); if (txIndex + l == txLen - 1) l--; // don't send a single last byte *len = l; if (!l) return NULL; txIndex += l; // if we're at end of packet, slap on CRC if (txIndex == txLen) { updateCRCAndWhiten(&((char*) (getHeader(txMsgPtr)))[curIndex], txBuf, l - 2); txBuf[l - 2] = txRunningCRC & 0xff; txBuf[l - 1] = txRunningCRC >> 8; } else { updateCRCAndWhiten(((char*) getHeader(txMsgPtr)) + curIndex, txBuf, l); } return txBuf; } uint8_t sendDones = 0; async event void XE1205PhyRxTx.sendFrameDone(error_t err) __attribute__ ((noinline)) { sendDones++; if(sendingAck==FALSE) { switch (err) { case SUCCESS: if (post sendDoneTask() != SUCCESS) xe1205check(2, FAIL); break; case ENOACK: if(post sendDoneNoAckTask() !=SUCCESS) xe1205check(2, FAIL); break; default: if (post sendDoneFailTask() != SUCCESS) xe1205check(2, FAIL); } } else { txMsgPtr = NULL; sendingAck=FALSE; post signalPacketReceived(); } } command void Packet.clear(message_t* msg) { memset(getHeader(msg), 0, sizeof(xe1205_header_t)); memset(getFooter(msg), 0, sizeof(xe1205_footer_t)); memset(getMetadata(msg), 0, sizeof(xe1205_metadata_t)); } command uint8_t Packet.payloadLength(message_t* msg) { return getMetadata(msg)->length; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { getMetadata(msg)->length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command void* Packet.getPayload(message_t* msg, uint8_t len) { if (len <= TOSH_DATA_LENGTH) { return (void*)msg->data; } else { return NULL; } } async command error_t PacketAcknowledgements.requestAck(message_t* msg) { (getHeader(msg))-> ack |= 0x01; return SUCCESS; } async command error_t PacketAcknowledgements.noAck(message_t* msg) { (getHeader(msg))-> ack &= 0xFE; return SUCCESS; } async command bool PacketAcknowledgements.wasAcked(message_t* msg) { return (getHeader(msg))-> ack & 0x01; } default event void Send.sendDone(message_t* msg, error_t error) { } async event uint8_t XE1205PhyRxTx.rxFrameBegin(char* data, uint8_t len) __attribute__ ((noinline)) { uint8_t datalen; memcpy(&rxPhyHdr, data, sizeof(xe1205_phy_header_t)); datalen = rxPhyHdr.length; if (datalen > TOSH_DATA_LENGTH || rxBufPtr) return len; return datalen + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t) + sizeof(xe1205_phy_header_t); } task void signalPacketReceived() { atomic { getMetadata((message_t*) rxMsgPtr)->length = rxPhyHdr.length; rxBufPtr = NULL; rxMsgPtr = signal Receive.receive(rxMsgPtr, rxMsgPtr->data, getMetadata(rxMsgPtr)->length); } } uint32_t nrxmsgs; async event void XE1205PhyRxTx.rxFrameEnd(char* data, uint8_t len, error_t status) __attribute__ ((noinline)) { if (status != SUCCESS){ return;} if (rxBufPtr) return; // this could happen whenever rxFrameBegin was called with rxBufPtr still active rxBufPtr = (data + sizeof(xe1205_phy_header_t)); checkCrcAndUnwhiten(rxBufPtr, rxPhyHdr.whitening, rxPhyHdr.length); if (!getFooter(rxMsgPtr)->crc) { atomic rxBufPtr = NULL; return; } getMetadata((message_t*) rxMsgPtr)->strength = call XE1205PhyRssi.readRxRssi(); getMetadata((message_t*) rxMsgPtr)->length = rxPhyHdr.length; if ((getHeader((message_t*)rxMsgPtr))->dest == TOS_NODE_ID && (((getHeader((message_t*)rxMsgPtr))->ack)& 0x01)==1) { post sendAck(); } else { post signalPacketReceived(); } } async event void XE1205PhyRxTx.rxAckEnd(char* data, uint8_t len, error_t status) __attribute__ ((noinline)) { sendingAck=FALSE; if (status != SUCCESS) { post sendDoneNoAckTask(); return; } if (rxBufPtr) { post sendDoneNoAckTask(); return; // this could happen whenever rxFrameBegin was called with rxBufPtr still active } rxBufPtr = (data + sizeof(xe1205_phy_header_t)); checkCrcAndUnwhiten(rxBufPtr, rxPhyHdr.whitening, rxPhyHdr.length); if (!getFooter(rxMsgPtr)->crc) { post sendDoneNoAckTask(); atomic rxBufPtr = NULL; return; } getMetadata((message_t*) rxMsgPtr)->strength = call XE1205PhyRssi.readRxRssi(); getMetadata((message_t*) rxMsgPtr)->length = rxPhyHdr.length; if ((getHeader((message_t*)rxMsgPtr))->dest == TOS_NODE_ID) { post sendDoneTask(); } else { post sendDoneNoAckTask(); } atomic rxBufPtr = NULL; } async event void XE1205PhyRssi.rssiDone(uint8_t _rssi) { } } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205SpiC.nc000066400000000000000000000100031207233610700205370ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of basic SPI primitives for the Semtech/Xemics XE1205 radio. * * @author Jonathan Hui * @author Henri Dubois-Ferriere * @version $Revision: 1.5 $ $Date: 2007-07-13 15:54:08 $ */ #include "XE1205.h" generic configuration XE1205SpiC() { provides interface Resource; // registers provides interface XE1205Register as MCParam0; provides interface XE1205Register as MCParam1; provides interface XE1205Register as MCParam2; provides interface XE1205Register as MCParam3; provides interface XE1205Register as MCParam4; provides interface XE1205Register as IrqParam5; provides interface XE1205Register as IrqParam6; provides interface XE1205Register as TXParam7; provides interface XE1205Register as RXParam8; provides interface XE1205Register as RXParam9; provides interface XE1205Register as RXParam10; provides interface XE1205Register as RXParam11; provides interface XE1205Register as RXParam12; provides interface XE1205Register as Pattern13; provides interface XE1205Register as Pattern14; provides interface XE1205Register as Pattern15; provides interface XE1205Register as Pattern16; provides interface XE1205Register as OscParam17; provides interface XE1205Register as OscParam18; provides interface XE1205Register as TParam19; provides interface XE1205Register as TParam21; provides interface XE1205Register as TParam22; // fifos provides interface XE1205Fifo; } implementation { enum { CLIENT_ID = unique( "XE1205Spi.Resource" ), }; components XE1205SpiP as Spi; Resource = Spi.Resource[ CLIENT_ID ]; // registers MCParam0 = Spi.Reg[ MCParam_0 ]; MCParam1 = Spi.Reg[ MCParam_1 ]; MCParam2 = Spi.Reg[ MCParam_2 ]; MCParam3 = Spi.Reg[ MCParam_3 ]; MCParam4 = Spi.Reg[ MCParam_4 ]; IrqParam5 = Spi.Reg[ IrqParam_5 ]; IrqParam6 = Spi.Reg[ IrqParam_6 ]; TXParam7 = Spi.Reg[ TXParam_7 ]; RXParam8 = Spi.Reg[ RXParam_8 ]; RXParam9 = Spi.Reg[ RXParam_9 ]; RXParam10 = Spi.Reg[ RXParam_10 ]; RXParam11 = Spi.Reg[ RXParam_11 ]; RXParam12 = Spi.Reg[ RXParam_12 ]; Pattern13 = Spi.Reg[ Pattern_13 ]; Pattern14 = Spi.Reg[ Pattern_14 ]; Pattern15 = Spi.Reg[ Pattern_15 ]; Pattern16 = Spi.Reg[ Pattern_16 ]; OscParam17 = Spi.Reg[ OscParam_17 ]; OscParam18 = Spi.Reg[ OscParam_18 ]; TParam19 = Spi.Reg[ TParam_19 ]; TParam21 = Spi.Reg[ TParam_21 ]; TParam22 = Spi.Reg[ TParam_22 ]; XE1205Fifo = Spi.Fifo; } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205SpiImplP.nc000066400000000000000000000166701207233610700214160ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * @author Jonathan Hui * @author Henri Dubois-Ferriere * @version $Revision: 1.5 $ $Date: 2007-07-13 15:54:08 $ */ module XE1205SpiImplP { provides interface XE1205Fifo as Fifo @atmostonce(); provides interface XE1205Register as Reg[uint8_t id]; provides interface Init @atleastonce(); provides interface Resource[ uint8_t id ]; uses interface Resource as SpiResource; uses interface GeneralIO as NssDataPin; uses interface GeneralIO as NssConfigPin; uses interface SpiByte; uses interface SpiPacket; } implementation { #include "xe1205debug.h" enum { RESOURCE_COUNT = uniqueCount( "XE1205Spi.Resource" ), NO_HOLDER = 0xff, }; bool m_resource_busy = FALSE; uint8_t m_requests = 0; uint8_t m_holder = NO_HOLDER; command error_t Init.init() { call NssDataPin.makeOutput(); call NssConfigPin.makeOutput(); call NssDataPin.set(); call NssConfigPin.set(); return SUCCESS; } async command error_t Resource.request[ uint8_t id ]() { atomic { if ( m_resource_busy ) m_requests |= 1 << id; else { m_holder = id; m_resource_busy = TRUE; call SpiResource.request(); } } return SUCCESS; } async command error_t Resource.immediateRequest[ uint8_t id ]() { error_t error; atomic { if ( m_resource_busy ) return EBUSY; error = call SpiResource.immediateRequest(); if ( error == SUCCESS ) { m_holder = id; m_resource_busy = TRUE; } xe1205check(9, error); } return error; } async command error_t Resource.release[ uint8_t id ]() { uint8_t i; atomic { if ( m_holder != id ) { xe1205check(11, 1); return FAIL; } m_holder = NO_HOLDER; call SpiResource.release(); if ( !m_requests ) { m_resource_busy = FALSE; } else { for ( i = m_holder + 1; ; i++ ) { if ( i >= RESOURCE_COUNT ) i = 0; if ( m_requests & ( 1 << i ) ) { m_holder = i; m_requests &= ~( 1 << i ); call SpiResource.request(); return SUCCESS; } } } return SUCCESS; } } async command bool Resource.isOwner[ uint8_t id ]() { atomic return (m_holder == id); } event void SpiResource.granted() { uint8_t holder; atomic holder = m_holder; signal Resource.granted[ holder ](); } default event void Resource.granted[ uint8_t id ]() { } async command error_t Fifo.write(uint8_t* data, uint8_t length) __attribute__ ((noinline)){ #if 0 if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE) xe1205check(8, 1); #endif call SpiPacket.send(data, NULL, length); return SUCCESS; } async event void SpiPacket.sendDone(uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error) { #if 0 if (call NssConfigPin.get() != TRUE) xe1205check(4, 1); if (call NssDataPin.get() != FALSE) xe1205check(12, 1); #endif TOSH_SET_NSS_DATA_PIN(); if (tx_buf) { signal Fifo.writeDone(error); } else signal Fifo.readDone(error); } async command error_t Fifo.read(uint8_t* data, uint8_t length) { error_t status; #if 0 if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE) xe1205check(5, 1); #endif TOSH_CLR_NSS_DATA_PIN(); status = call SpiPacket.send(NULL, data, length); if (status != SUCCESS) { xe1205check(3, status); call NssDataPin.set(); return status; } return SUCCESS; } async command void Reg.read[uint8_t addr](uint8_t* data) { #if 1 if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE) xe1205check(6, 1); #endif call NssDataPin.set(); call NssConfigPin.clr(); call SpiByte.write(XE1205_READ(addr)); *data = call SpiByte.write(0); call NssConfigPin.set(); } async command void Reg.write[uint8_t addr](uint8_t data) { #if 1 if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE) xe1205check(7, 1); #endif call NssDataPin.set(); call NssConfigPin.clr(); call SpiByte.write(XE1205_WRITE(addr)); call SpiByte.write(data); call NssConfigPin.set(); } default async event void Fifo.readDone(error_t error) {} default async event void Fifo.writeDone(error_t error) {} } tinyos-2.1.2+dfsg/tos/chips/xe1205/XE1205SpiP.nc000066400000000000000000000100401207233610700205550ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * @author Jonathan Hui * @author Henri Dubois-Ferriere * @version $Revision: 1.5 $ $Date: 2007-07-13 15:54:08 $ */ configuration XE1205SpiP { provides interface Resource[ uint8_t id ]; provides interface XE1205Fifo as Fifo; provides interface XE1205Register as Reg[ uint8_t id ]; } implementation { components XE1205SpiImplP as SpiP; Resource = SpiP; Fifo = SpiP; Reg = SpiP; components new HplXE1205SpiC(); SpiP.SpiResource -> HplXE1205SpiC; SpiP.SpiByte -> HplXE1205SpiC; SpiP.SpiPacket -> HplXE1205SpiC; components MainC; MainC.SoftwareInit -> SpiP; components HplXE1205PinsC; SpiP.NssConfigPin -> HplXE1205PinsC.NssConfigPin; SpiP.NssDataPin -> HplXE1205PinsC.NssDataPin; components new Msp430GpioC() as DPin; } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/000077500000000000000000000000001207233610700175455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205IrqConf.nc000066400000000000000000000071331207233610700222010ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Interface for control of interrupt-related functions * on the XE1205 radio. * * The current 2.x XE1205 driver is only intended for use of the radio in * buffered mode - therefore IRQ settings for non-buffered mode are not exposed. * * @author Henri Dubois-Ferriere */ interface XE1205IrqConf { #include "XE1205.h" /* * Set IRQ0 sources in Rx mode. * * @param src IRQ source. * @return SUCCESS if configuration done ok, error status otherwise. * */ async command error_t setRxIrq0Source(xe1205_rx_irq0_src_t src); /* * Set IRQ1 sources in Rx mode. * * @param src IRQ source. * @return SUCCESS if configuration done ok, error status otherwise. * */ async command error_t setRxIrq1Source(xe1205_rx_irq1_src_t src); /* * Set IRQ1 source in Tx mode. * * @param haveResource: if TRUE, bus is assumed to be already owned by the caller. * @param src IRQ source. * @return SUCCESS if configuration done ok, error status otherwise. * */ async command error_t setTxIrq1Source(xe1205_tx_irq1_src_t src); /** * Clear FIFO overrun flag. * * @param haveResource: if TRUE, bus is assumed to be already owned by the caller. * @return SUCCESS if operation done ok, error status otherwise. * */ async command error_t clearFifoOverrun(bool haveResource); /** * Get FIFO overrun flag. * * @param haveResource: if TRUE, bus is assumed to be already owned by the caller. * @param fifooverun will be written with 1 if the FIFO overran, 0 else. * @return SUCCESS if operation done ok, error status otherwise. * */ async command error_t getFifoOverrun(bool haveResource, bool* fifooverrun); /** * Arm the pattern detector (clear Start_detect flag). * * @return SUCCESS if operation done ok, error status otherwise. * */ async command error_t armPatternDetector(bool haveResource); } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205IrqConfC.nc000066400000000000000000000043001207233610700222750ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Implementation of XE1205IrqConf interface. * * @author Henri Dubois-Ferriere */ configuration XE1205IrqConfC { provides interface XE1205IrqConf; } implementation { components XE1205IrqConfP; components MainC; MainC.SoftwareInit -> XE1205IrqConfP.Init; components new XE1205SpiC(); XE1205IrqConfP.SpiResource -> XE1205SpiC; XE1205IrqConfP.IrqParam5 -> XE1205SpiC.IrqParam5; XE1205IrqConfP.IrqParam6 -> XE1205SpiC.IrqParam6; XE1205IrqConf = XE1205IrqConfP; } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205IrqConfP.nc000066400000000000000000000142321207233610700223170ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * Implementation of XE1205IrqConf interface. * * @author Henri Dubois-Ferriere */ module XE1205IrqConfP { provides interface XE1205IrqConf; provides interface Init @atleastonce(); uses interface XE1205Register as IrqParam5; uses interface XE1205Register as IrqParam6; uses interface Resource as SpiResource; } implementation { #include "xe1205debug.h" // norace is ok because protected by the isOwner() calls norace uint8_t irqparam5; norace uint8_t irqparam6; task void initTask() { atomic { xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled call IrqParam5.write(0x59); // IRQ0: Write_byte, IRQ1: fifofull, Tx_IRQ: TX_stopped. call IrqParam6.write(0x54); // fill fifo on pattern, clear pattern detect bit, start transmission when fifo not empty // no irq interrupt irqparam5=0x59; irqparam6=0x54; call SpiResource.release(); } } command error_t Init.init() { post initTask(); return SUCCESS; } event void SpiResource.granted() { } /* * Set IRQ0 sources in Rx mode. * @param src may be one of: irq_write_byte, irq_nFifoEmpty, or irq_Pattern. */ async command error_t XE1205IrqConf.setRxIrq0Source(xe1205_rx_irq0_src_t src) { error_t status; if (src > 3) return EINVAL; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(2, status); if (status != SUCCESS) return status; irqparam5 &= ~(3 << 6); irqparam5 |= (src << 6); call IrqParam5.write(irqparam5); call SpiResource.release(); return SUCCESS; } /* * Set IRQ1 sources in Rx mode. * @param src may be one of: irq_Rssi or irq_FifoFull. */ async command error_t XE1205IrqConf.setRxIrq1Source(xe1205_rx_irq1_src_t src) { error_t status; if (src > 2) return EINVAL; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(3, status); if (status != SUCCESS) return status; irqparam5 &= ~(3 << 4); irqparam5 |= (src << 4); call IrqParam5.write(irqparam5); call SpiResource.release(); return SUCCESS; } /* * Set IRQ1 sources in Tx mode. * @param src my be one of: irq_FifoFull or irq_TxStopped. */ async command error_t XE1205IrqConf.setTxIrq1Source(xe1205_tx_irq1_src_t src) { error_t status; if (src > 1) return EINVAL; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(4, status); if (status != SUCCESS) return status; irqparam5 &= ~(1 << 3); irqparam5 |= (src << 3); call IrqParam5.write(irqparam5); call SpiResource.release(); return SUCCESS; } void clearFifoOverrun() { irqparam5 |= 1; call IrqParam5.write(irqparam5); } /** * Clear FIFO overrun flag. */ async command error_t XE1205IrqConf.clearFifoOverrun(bool haveResource) { error_t status; if (haveResource) { clearFifoOverrun(); } else { if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); clearFifoOverrun(); call SpiResource.release(); } return SUCCESS; } bool getFifoOverrun() { uint8_t reg; call IrqParam5.read(®); return reg & 1; } async command error_t XE1205IrqConf.getFifoOverrun(bool haveResource, bool* fifooverrun) { error_t status; if (haveResource) { *fifooverrun = getFifoOverrun(); } else { if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(5, status); if (status != SUCCESS) return status; *fifooverrun = getFifoOverrun(); call SpiResource.release(); } return SUCCESS; } void armPatternDetector() { irqparam6 |= (1 << 6); call IrqParam6.write(irqparam6); } /** * Arm the pattern detector (clear Start_detect flag). */ async command error_t XE1205IrqConf.armPatternDetector(bool haveResource) { error_t status; if (haveResource) { armPatternDetector(); } else { if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(5, status); if (status != SUCCESS) return status; armPatternDetector(); call SpiResource.release(); } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205PatternConf.nc000066400000000000000000000057701207233610700230700ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Interface for preamble detection settings * on the XE1205 radio. * * @author Henri Dubois-Ferriere */ interface XE1205PatternConf { /** * Set the length of the preamble searched by the XE1205 * pattern detection module. * * @param len patten length (1 <= len <= 4) * @return SUCCESS if operation done ok, error status otherwise */ async command error_t setDetectLen(uint8_t len); /** * Load a preamble pattern into the XE1205 pattern detection module. * * @param pattern pointer to pattern bytes. * @param len pattern length (1 <= len <= 4). Note that this may be larger * than value set using setPatternLength; in this case the extra bytes * are programmed into the radio but ignored by the pattern detection stage. * @return SUCCESS if operation done ok, error status otherwise */ async command error_t loadPattern(uint8_t* pattern, uint8_t len); async command error_t loadDataPatternHasBus(); async command error_t loadAckPatternHasBus(); /** * Set the number of bit errors accepted by the XE1205 * pattern detection module. * * @param nerrors max. number of errors accepted (0 <= len <= 3) * @return SUCCESS if operation done ok, error status otherwise */ async command error_t setDetectErrorTol(uint8_t nerrors); } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205PatternConfC.nc000066400000000000000000000046221207233610700231660ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Implementation of XE1205PatternConf interface. * * @author Henri Dubois-Ferriere */ configuration XE1205PatternConfC { provides interface XE1205PatternConf; } implementation { components XE1205PatternConfP; components MainC; MainC.SoftwareInit -> XE1205PatternConfP.Init; components new XE1205SpiC(); XE1205PatternConfP.SpiResource -> XE1205SpiC; XE1205PatternConfP.RXParam10 -> XE1205SpiC.RXParam10; XE1205PatternConfP.Pattern13 -> XE1205SpiC.Pattern13; XE1205PatternConfP.Pattern14 -> XE1205SpiC.Pattern14; XE1205PatternConfP.Pattern15 -> XE1205SpiC.Pattern15; XE1205PatternConfP.Pattern16 -> XE1205SpiC.Pattern16; XE1205PatternConf = XE1205PatternConfP; } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205PatternConfP.nc000066400000000000000000000117131207233610700232020ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Implementation of XE1205PatternConf interface. * * @author Henri Dubois-Ferriere */ module XE1205PatternConfP { provides interface XE1205PatternConf; provides interface Init @atleastonce(); uses interface Resource as SpiResource; uses interface XE1205Register as RXParam10; uses interface XE1205Register as Pattern13; uses interface XE1205Register as Pattern14; uses interface XE1205Register as Pattern15; uses interface XE1205Register as Pattern16; } implementation { #include "xe1205debug.h" task void initTask() { atomic { xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled call RXParam10.write(0x10 | 2 << 2); // pattern detection enabled, error tolerance=0, pattern length 3 call Pattern13.write((data_pattern >> 16) & 0xff); call Pattern14.write((data_pattern >> 8) & 0xff); call Pattern15.write(data_pattern & 0xff); call SpiResource.release(); } } command error_t Init.init() { post initTask(); return SUCCESS; } event void SpiResource.granted() { } async command error_t XE1205PatternConf.setDetectLen(uint8_t len) { uint8_t reg; error_t status; if (len == 0 || len > 4) return EINVAL; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(2, status); if (status != SUCCESS) return status; call RXParam10.read(®); reg &= ~(3 << 2); reg |= (len << 2); call RXParam10.write(reg); call SpiResource.release(); return SUCCESS; } async command error_t XE1205PatternConf.loadDataPatternHasBus() { call Pattern13.write((data_pattern >> 16) & 0xff); call Pattern14.write((data_pattern >> 8) & 0xff); call Pattern15.write(data_pattern & 0xff); return SUCCESS; } async command error_t XE1205PatternConf.loadAckPatternHasBus() { call Pattern13.write((ack_pattern >> 16) & 0xff); call Pattern14.write((ack_pattern >> 8) & 0xff); call Pattern15.write(ack_pattern & 0xff); return SUCCESS; } async command error_t XE1205PatternConf.loadPattern(uint8_t* pattern, uint8_t len) { error_t status; if (len == 0 || len > 4) return EINVAL; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(3, status); if (status != SUCCESS) return status; call Pattern13.write(*pattern++); if (len == 1) goto done; call Pattern14.write(*pattern++); if (len == 2) goto done; call Pattern15.write(*pattern++); if (len == 3) goto done; call Pattern16.write(*pattern); done: call SpiResource.release(); return SUCCESS; } async command error_t XE1205PatternConf.setDetectErrorTol(uint8_t nerrors) { uint8_t reg; error_t status; if (nerrors > 3) return EINVAL; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(4, status); if (status != SUCCESS) return status; call RXParam10.read(®); reg &= ~(0x03); reg |= nerrors; call RXParam10.write(reg); call SpiResource.release(); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205PhyConf.nc000066400000000000000000000057521207233610700222130ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Interface for physical parameter settings (bw, bitrate, power) * on the XE1205 radio. * * @author Henri Dubois-Ferriere */ interface XE1205PhyConf { #include "XE1205.h" /** * Tune the XE1205 to operate on a preset channel. * * @param preset Channel index as defined in XE1205.h * @return SUCCESS if configuration done ok, error status otherwise. */ command error_t tunePreset(xe1205_channelpreset_t preset); /** * Set the output power of the XE1205. * * @param pow Power index as defined in XE1205.h * @return SUCCESS if configuration done ok, error status otherwise. */ async command error_t setRFPower(xe1205_txpower_t txpow); /** * Set the raw communication bitrate. The frequency deviation and receiver * filter bandwidth are also set to appropriate values for the bitrate. Advanced users * can still override the freq. dev and bw values with the individual functions below. * * @param value_ Bitrate (min 1190 bps, max 152340 bps) * @return SUCCESS if configuration done ok, error status otherwise. */ command error_t setBitrate(xe1205_bitrate_t bitrate); /** * Get the time (in us) to send/receive a byte at current bit rate. * * @return time (in us). */ async command uint16_t getByteTime_us(); } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205PhyRssiConfC.nc000066400000000000000000000051741207233610700231550ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Implementation of XE1205RssiConf and XE1205PhyConf interfaces. * * @author Henri Dubois-Ferriere */ configuration XE1205PhyRssiConfC { provides interface XE1205PhyConf; provides interface XE1205RssiConf; } implementation { components XE1205PhyRssiConfP; components MainC; MainC.SoftwareInit -> XE1205PhyRssiConfP.Init; components new XE1205SpiC(); XE1205PhyRssiConfP.SpiResource -> XE1205SpiC; XE1205PhyRssiConfP.MCParam0 -> XE1205SpiC.MCParam0; XE1205PhyRssiConfP.MCParam1 -> XE1205SpiC.MCParam1; XE1205PhyRssiConfP.MCParam2 -> XE1205SpiC.MCParam2; XE1205PhyRssiConfP.MCParam3 -> XE1205SpiC.MCParam3; XE1205PhyRssiConfP.MCParam4 -> XE1205SpiC.MCParam4; XE1205PhyRssiConfP.TXParam7 -> XE1205SpiC.TXParam7; XE1205PhyRssiConfP.RXParam8 -> XE1205SpiC.RXParam8; XE1205PhyRssiConfP.RXParam9 -> XE1205SpiC.RXParam9; XE1205PhyConf = XE1205PhyRssiConfP; XE1205RssiConf = XE1205PhyRssiConfP; } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205PhyRssiConfP.nc000066400000000000000000000254671207233610700232010ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * Implementation of XE1205PhyConf and XE1205RssiConf interfaces. * These are implemented jointly because the rssi measure period depends * on the frequency deviation (which itself depends on bitrate). * * @author Henri Dubois-Ferriere */ module XE1205PhyRssiConfP { provides interface XE1205PhyConf; provides interface XE1205RssiConf; provides interface Init @atleastonce(); uses interface Resource as SpiResource; uses interface XE1205Register as MCParam0; uses interface XE1205Register as MCParam1; uses interface XE1205Register as MCParam2; uses interface XE1205Register as MCParam3; uses interface XE1205Register as MCParam4; uses interface XE1205Register as TXParam7; uses interface XE1205Register as RXParam8; uses interface XE1205Register as RXParam9; } implementation { #include "xe1205debug.h" /* * Default settings for initial parameters. */ #ifndef XE1205_BITRATE_DEFAULT #define XE1205_BITRATE_DEFAULT 76170 #endif //xxx/make this computed as a fun of XE1205_BITRATE_DEFAULT #ifndef XE1205_FREQDEV_DEFAULT #define XE1205_FREQDEV_DEFAULT 100000 #endif /* * Register calculation helper macros. */ #define XE1205_FREQ(value_) (((value_) * 100) / 50113L) #define XE1205_EFFECTIVE_FREQ(value_) (((int32_t)((int16_t)(value_)) * 50113L) / 100) #define XE1205_FREQ_DEV_HI(value_) ((XE1205_FREQ(value_) >> 8) & 0x01) #define XE1205_FREQ_DEV_LO(value_) (XE1205_FREQ(value_) & 0xff) #define XE1205_FREQ_HI(value_) ((XE1205_FREQ(value_) >> 8) & 0xff) #define XE1205_FREQ_LO(value_) (XE1205_FREQ(value_) & 0xff) #define XE1205_BIT_RATE(value_) ((152340L / (value_) - 1) & 0x7f) #define XE1205_EFFECTIVE_BIT_RATE(value_) (152340L / ((value_) + 1)) /** * Frequency bands. */ enum xe1205_freq_bands { XE1205_Band_434 = 434000000, XE1205_Band_869 = 869000000, XE1205_Band_915 = 915000000 }; // this value is the time between rssi measurement updates, plus a buffer time. // we keep it cached for fast access during packet reception uint16_t rssi_period_us; // time to xmit/receive a byte at current bitrate uint16_t byte_time_us; // norace is ok because protected by the isOwner() calls norace uint8_t rxparam9 = 0xff; norace uint8_t txparam7 = 0xff; // returns appropriate baseband filter in khz bw for given bitrate in bits/sec. uint16_t baseband_bw_from_bitrate(uint32_t bitrate) { return (bitrate * 400) /152340; } // returns appropriate freq. deviation for given bitrate in bits/sec. uint32_t freq_dev_from_bitrate(uint32_t bitrate) { return (bitrate * 6) / 5; } // returns xe1205 encoding of baseband bandwidth in appropriate bit positions // for writing into rxparam7 register uint8_t baseband_bw_rxparam7_bits(uint16_t bbw_khz) { if(bbw_khz <= 10) { return 0x00; } else if(bbw_khz <= 20) { return 0x20; } else if(bbw_khz <= 40) { return 0x40; } else if(bbw_khz <= 200) { return 0x60; } else if(bbw_khz <= 400) { return 0x10; } else return 0x10; } // returns the period (in us) between two successive rssi measurements // (see xemics data sheet 4.2.3.4), as a function of frequency deviation uint16_t rssi_meas_time(uint32_t freqdev_hz) { if (freqdev_hz > 20000) // at 152kbps, equiv to 2 byte times, at 76kbps, equiv to 1 byte time, at 38kbps equiv to 4 bits, etc return 100; else if (freqdev_hz > 10000) // at 9.6kbps, equiv to 4 byte times. return 200; else if (freqdev_hz > 7000) return 300; else if (freqdev_hz > 5000) // at 4.8kbps, equiv to 4 byte times. return 400; else return 500; // at 1200, equiv to 13 byte times. } task void initTask() { atomic { byte_time_us = 8000000 / XE1205_BITRATE_DEFAULT; rssi_period_us = rssi_meas_time(XE1205_FREQDEV_DEFAULT) + 10; xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled call TXParam7.write(0x00); // tx power 0dbm, normal modulation & bitsync, no flitering txparam7=0; call MCParam0.write(0x3c | XE1205_FREQ_DEV_HI(XE1205_FREQDEV_DEFAULT)); // buffered mode, transceiver select using SW(0:1), Data output, 868mhz band, call MCParam1.write(XE1205_FREQ_DEV_LO(XE1205_FREQDEV_DEFAULT)); call MCParam2.write(XE1205_BIT_RATE(XE1205_BITRATE_DEFAULT)); call MCParam3.write(XE1205_FREQ_HI(-1000000)); // 869mhz - 1mhz = 868mhz (preset 0) call MCParam4.write(XE1205_FREQ_LO(-1000000)); call RXParam8.write(baseband_bw_rxparam7_bits(baseband_bw_from_bitrate(XE1205_BITRATE_DEFAULT)) | 0x0a); // calibrate & init baseband filter each time bbw changes call RXParam9.write(0x00); // rssi off by default, fei off rxparam9=0; call SpiResource.release(); } } command error_t Init.init() { post initTask(); return SUCCESS; } event void SpiResource.granted() { } error_t tuneManual(uint32_t freq) { uint32_t bandCenter; uint8_t mcp0reg; uint16_t mcp34reg; error_t status; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(2, status); if (status != SUCCESS) return status; call MCParam0.read(&mcp0reg); mcp0reg &= ~0x6; if ((freq >= (XE1205_Band_434 + XE1205_EFFECTIVE_FREQ(0x8000))) && (freq <= (XE1205_Band_434 + XE1205_EFFECTIVE_FREQ(0x7fff)))) { mcp0reg |= (1 << 1); bandCenter = XE1205_Band_434; } else if ((freq >= (XE1205_Band_869 + XE1205_EFFECTIVE_FREQ(0x8000))) && (freq <= (XE1205_Band_869 + XE1205_EFFECTIVE_FREQ(0x7fff)))) { mcp0reg |= (2 << 1); bandCenter = XE1205_Band_869; } else if ((freq >= (XE1205_Band_915+ XE1205_EFFECTIVE_FREQ(0x8000))) && (freq <= (XE1205_Band_915 + XE1205_EFFECTIVE_FREQ(0x7fff)))) { mcp0reg |= (3 << 1); bandCenter = XE1205_Band_915; } else { call SpiResource.release(); return EINVAL; } mcp34reg = XE1205_FREQ(freq - bandCenter); call MCParam0.write(mcp0reg); call MCParam3.write(mcp34reg >> 8); call MCParam4.write(mcp34reg & 0xff); call SpiResource.release(); return SUCCESS; } command error_t XE1205PhyConf.tunePreset(xe1205_channelpreset_t preset) { switch(preset) { case xe1205_channelpreset_868mhz: return tuneManual(868000000); case xe1205_channelpreset_869mhz: return tuneManual(869000000); case xe1205_channelpreset_870mhz: return tuneManual(870000000); case xe1205_channelpreset_433mhz: return tuneManual(433000000); case xe1205_channelpreset_434mhz: return tuneManual(434000000); case xe1205_channelpreset_435mhz: return tuneManual(435000000); default: return FAIL; } } async command error_t XE1205PhyConf.setRFPower(xe1205_txpower_t txpow) { error_t status; if (txpow > xe1205_txpower_15dbm) return EINVAL; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(3, status); if (status != SUCCESS) return status; txparam7 &= ~(3 << 6); txparam7 |= (txpow << 6); call TXParam7.write(txparam7); call SpiResource.release(); return SUCCESS; } command error_t XE1205PhyConf.setBitrate(xe1205_bitrate_t bitrate) { uint16_t bbw; uint32_t freqdev; uint8_t rxp8reg, mcp0reg, mcp1reg, mcp2reg; error_t status; if (bitrate < xe1205_bitrate_38085 || bitrate > xe1205_bitrate_152340) return EINVAL; if (call SpiResource.isOwner()) return EBUSY; status = call SpiResource.immediateRequest(); xe1205check(4, status); if (status != SUCCESS) return status; // receiver bandwidth call RXParam8.read(&rxp8reg); bbw = baseband_bw_from_bitrate(bitrate); rxp8reg &= ~0x70; rxp8reg |= baseband_bw_rxparam7_bits(bbw); // frequency deviation freqdev = freq_dev_from_bitrate(bitrate); rssi_period_us = rssi_meas_time(freqdev) + 10; call MCParam0.read(&mcp0reg); mcp0reg &= ~0x01; mcp0reg |= XE1205_FREQ_DEV_HI(freqdev); mcp1reg = XE1205_FREQ_DEV_LO(freqdev); mcp2reg = XE1205_BIT_RATE(bitrate); call RXParam8.write(rxp8reg); call MCParam0.write(mcp0reg); call MCParam1.write(mcp1reg); call MCParam2.write(mcp2reg);; atomic byte_time_us = 8000000 / bitrate; call SpiResource.release(); return SUCCESS; } async command uint16_t XE1205PhyConf.getByteTime_us() { return byte_time_us; } async command error_t XE1205RssiConf.setRssiMode(bool on) { // must have bus if (on) rxparam9 |= 0x80; else rxparam9 &= ~0x80; call RXParam9.write(rxparam9); return SUCCESS; } async command uint16_t XE1205RssiConf.getRssiMeasurePeriod_us() { return rssi_period_us; } async command error_t XE1205RssiConf.setRssiRange(bool high) { // must have bus if (high) { rxparam9 |= 0x40; } else { rxparam9 &= ~0x40; } call RXParam9.write(rxparam9); return SUCCESS; } async command error_t XE1205RssiConf.getRssi(uint8_t* rssi) { // must have bus call RXParam9.read(rssi); *rssi = (*rssi >> 4) & 0x03; return SUCCESS; } } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205Register.nc000066400000000000000000000044251207233610700224250ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Interface for access to registers onthe XE1205 radio. * * @author Henri Dubois-Ferriere */ /** * * @author Henri Dubois-Ferriere */ #include "XE1205.h" interface XE1205Register { /** * Read a data word from the register. * * @param data pointer to place the register value. * @return status byte from the read. */ async command void read(uint8_t* data); /** * Write a data word to the register. * * @param data value to write to register. * @return status byte from the write. */ async command void write(uint8_t data); } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/XE1205RssiConf.nc000066400000000000000000000056541207233610700223740ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /** * Interface for Rssi settings and measurements * on the XE1205 radio. * * @author Henri Dubois-Ferriere */ interface XE1205RssiConf { /** * Enable RSSI measurements. * * @param on: 1 to enable, 0 to disable * @return SUCCESS if operation done ok, error status otherwise */ async command error_t setRssiMode(bool on); /** * Return the returns the period (in us) between two successive rssi measurements, * taking into account the current setting of the frequency deviation. * * @return rssi measure period. */ async command uint16_t getRssiMeasurePeriod_us(); /** * Set RSSI measurement points to low/high values at * * @param high: 1 for high range (-95, -90, -85 dBm) * 0 for low range (-110, -105, -100 dBm) * @return SUCCESS if operation done ok, error status otherwise */ async command error_t setRssiRange(bool high); /** * Read RSSI value in 2 bits. RSSI block should be enabled before calling this. * * @param rssi Pointer to byte where rssi will be written. * @return SUCCESS if operation done ok, error status otherwise * (in which case *rssi should not be used). */ async command error_t getRssi(uint8_t* rssi); } tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/registers.html000066400000000000000000000040671207233610700224510ustar00rootroot00000000000000 XE1205 Registers in TinyOS 2.x driver
      Register Initialized Read Written
      MCParam0 PhyRssiConfP PhyRssiConfP PhyRssiConfP
      MCParam1 PhyRssiConfP PhyRssiConfP PhyRssiConfP
      MCParam2 PhyRssiConfP PhyRssiConfP PhyRssiConfP
      MCParam3 PhyRssiConfP PhyRssiConfP PhyRssiConfP
      MCParam4 PhyRssiConfP PhyRssiConfP PhyRssiConfP
      IrqParam5 IrqConfP IrqConfP IrqConfP
      IrqParam6 IrqConfP IrqConfP IrqConfP
      TXParam7 PhyRssiConfP PhyRssiConfP PhyRssiConfP
      RXParam8 PhyRssiConfP PhyRssiConfP PhyRssiConfP
      RXParam9 PhyRssiConfP PhyRssiConfP PhyRssiConfP
      RXParam10 PatternConfP PatternConfP PatternConfP
      RXParam11 - - -
      RXParam12 - - -
      Pattern13 - - PatternConfP
      Pattern14 - - PatternConfP
      Pattern15 - - PatternConfP
      Pattern16 - - PatternConfP
      OscParam17 - - -
      OscParam18 - - -
      TParam19 - - -
      TParam21 - - -
      TParam22 - - -
      tinyos-2.1.2+dfsg/tos/chips/xe1205/conf/registers.txt000066400000000000000000000030541207233610700223170ustar00rootroot00000000000000 Changeable registers: name | Addr | (a)sync | r/w(*) | Interface | init -------------------------------------------------------------------------------------------------- freq_dev | 0[0], 1[0-7] | ? | r/w | XE1205PhyConf | bitrate | 2[0-6] | ? | r/w | XE1205PhyConf | freq_lo | 3[0-7],4[0-7] | ? | r/w | XE1205PhyConf | rx_irq_0 | 5[6-7] | async | w | XE1205IrqConf | rx_irq_1 | 5[4-5] | async | w | XE1205IrqConf | tx_irq_1 | 5[3] | async | w | XE1205IrqConf | fifooverun | 5[0] | async | w | XE1205IrqConf | start_detect | 6[6] | async | w | XE1205IrqConf | power | 7[6-7] | ? | r/w | XE1205PhyConf | bw | 8[4-6] | same as | w | XE1205PhyConf | | bitrate | | | rssi | 9[7] | async | w | XE1205RssiConf | rssi_range | 9[6] | async | r/w | XE1205RssiConf | rssi_out | 9[4-5] | async | r | XE1205RssiConf | pattern | 10[4] | ? | w | XE1205PatternConf | * pat_size | 10[2-3] | async | w | XE1205PatternConf | pat_tol | 10[0-1] | ? | w | XE1205PatternConf | reg_pattern | 13-16 | async | w | XE1205PatternConf | (*) (at higher levels, reads my be cached) tinyos-2.1.2+dfsg/tos/chips/xe1205/crc.h000066400000000000000000000103771207233610700175500ustar00rootroot00000000000000// $Id: crc.h,v 1.6 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef CRC_H #define CRC_H uint16_t const ccitt_crc16_table[256] = { 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint16_t crcByte(uint16_t fcs, uint8_t c) { fcs = ccitt_crc16_table[(fcs >> 8 ^ c) & 0xffU] ^ (fcs << 8); return fcs; } #endif tinyos-2.1.2+dfsg/tos/chips/xe1205/phy/000077500000000000000000000000001207233610700174205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/chips/xe1205/phy/XE1205PhyC.nc000066400000000000000000000062041207233610700213540ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ configuration XE1205PhyC { provides interface XE1205PhyRxTx; provides interface XE1205PhyRssi; provides interface SplitControl; } implementation { components XE1205PhyP; components XE1205PhySwitchC; XE1205PhyP.XE1205PhySwitch -> XE1205PhySwitchC; components new XE1205SpiC(); XE1205PhyP.XE1205Fifo -> XE1205SpiC; XE1205PhyP.SpiResourceRX -> XE1205SpiC; components new XE1205SpiC() as SpiTX; XE1205PhyP.SpiResourceTX -> SpiTX; components new XE1205SpiC() as SpiConfig; XE1205PhyP.SpiResourceConfig -> SpiConfig; components new XE1205SpiC() as SpiRSSI; XE1205PhyP.SpiResourceRssi -> SpiRSSI; components HplXE1205InterruptsC; XE1205PhyP.Interrupt0 -> HplXE1205InterruptsC.Interrupt0; XE1205PhyP.Interrupt1 -> HplXE1205InterruptsC.Interrupt1; XE1205PhyRxTx = XE1205PhyP; SplitControl = XE1205PhyP; XE1205PhyRssi = XE1205PhyP; components MainC; MainC.SoftwareInit -> XE1205PhyP.Init; components XE1205PatternConfC; XE1205PhyP.XE1205PatternConf -> XE1205PatternConfC; components XE1205IrqConfC; XE1205PhyP.XE1205IrqConf -> XE1205IrqConfC; components XE1205PhyRssiConfC; XE1205PhyP.XE1205RssiConf -> XE1205PhyRssiConfC; components new Alarm32khz16C(); XE1205PhyP.Alarm32khz16 -> Alarm32khz16C.Alarm; #if 0 components new Msp430GpioC() as DpinM, HplMsp430GeneralIOC; DpinM -> HplMsp430GeneralIOC.Port41; XE1205PhyP.Dpin -> DpinM; #endif } tinyos-2.1.2+dfsg/tos/chips/xe1205/phy/XE1205PhyP.nc000066400000000000000000000371631207233610700214010ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ #include "Timer.h" module XE1205PhyP { provides interface XE1205PhyRxTx; provides interface XE1205PhyRssi; provides interface Init @atleastonce(); provides interface SplitControl @atleastonce(); uses interface Resource as SpiResourceTX; uses interface Resource as SpiResourceRX; uses interface Resource as SpiResourceConfig; uses interface Resource as SpiResourceRssi; uses interface XE1205PhySwitch; uses interface XE1205IrqConf; uses interface XE1205Fifo; uses interface XE1205RssiConf; uses interface XE1205PatternConf; uses interface GpioInterrupt as Interrupt0; uses interface GpioInterrupt as Interrupt1; uses interface Alarm as Alarm32khz16; #if 0 uses interface GeneralIO as Dpin; #endif } implementation { #include "xe1205debug.h" char* txBuf = NULL; uint8_t rxFrameIndex = 0; uint8_t rxFrameLen = 0; uint8_t nextTxLen=0; uint8_t nextRxLen; // Bugfix 29.1.2010: Plus 2 Bytes for the xe1205_phy_header_t // defined in XE1205SendReceiveP.nc // This is just a hack to make it work, this entire code needs // to be cleaned up & documented! char rxFrame[xe1205_mtu + 2]; uint8_t headerLen = 4; uint16_t stats_rxOverruns; enum { RSSI_RANGE_LOW=1, RSSI_RANGE_HIGH=2, RSSI_OFF=0, }; uint8_t rssiRange = RSSI_OFF; norace uint8_t rssiL,rssiH; uint8_t * rLow = &rssiL; uint8_t * rHigh = &rssiH; bool enableAck = FALSE; typedef enum { // remember to update busy() and off(), start(), stop() if states are added RADIO_LISTEN=0, RADIO_RX_HEADER=1, RADIO_RX_PACKET=2, RADIO_RX_PACKET_LAST=3, RADIO_TX=4, RADIO_SLEEP=5, RADIO_STARTING=6, RADIO_RSSI=7, RADIO_RX_ACK=8, RADIO_TX_ACK=9 } phy_state_t; phy_state_t state = RADIO_SLEEP; void armPatternDetect(); //////////////////////////////////////////////////////////////////////////////////// // // jiffy/microseconds/bytetime conversion functions. // //////////////////////////////////////////////////////////////////////////////////// // 1 jiffie = 1/32768 = 30.52us; // we approximate to 32us for quicker computation and also to account for interrupt/processing overhead. inline uint32_t usecs_to_jiffies(uint32_t usecs) { return usecs >> 5; } command error_t Init.init() { #if 0 call Dpin.makeOutput(); #endif call XE1205PhySwitch.sleepMode(); call XE1205PhySwitch.antennaOff(); return SUCCESS; } task void startDone() { signal SplitControl.startDone(SUCCESS); } event void SpiResourceTX.granted() { } event void SpiResourceRX.granted() { } event void SpiResourceConfig.granted() { armPatternDetect(); call SpiResourceConfig.release(); atomic { if (state == RADIO_STARTING){ post startDone(); } if (state == RADIO_RX_ACK) { enableAck=FALSE; signal XE1205PhyRxTx.sendFrameDone(FAIL); } state = RADIO_LISTEN; call Interrupt0.enableRisingEdge(); } } event void SpiResourceRssi.granted() { } task void stopDone() { signal SplitControl.stopDone(SUCCESS); } command error_t SplitControl.start() { atomic { if (state == RADIO_LISTEN){ post startDone(); return SUCCESS;} if (state != RADIO_SLEEP) return EBUSY; state = RADIO_STARTING; } call XE1205PhySwitch.rxMode(); call XE1205PhySwitch.antennaRx(); call Alarm32khz16.start(usecs_to_jiffies(XE1205_Sleep_to_RX_Time)); return SUCCESS; } command error_t SplitControl.stop() { atomic { if (!call XE1205PhyRxTx.busy()) { call XE1205PhySwitch.sleepMode(); call XE1205PhySwitch.antennaOff(); state = RADIO_SLEEP; call Interrupt0.disable(); call Interrupt1.disable(); post stopDone(); return SUCCESS; } else return FAIL; } } default event void SplitControl.startDone(error_t error) { } default event void SplitControl.stopDone(error_t error) { } default async event void XE1205PhyRssi.rssiDone(uint8_t _rssi) { } async command bool XE1205PhyRxTx.busy() { atomic return (state != RADIO_LISTEN && state != RADIO_SLEEP); } async command bool XE1205PhyRxTx.off() { atomic return (state == RADIO_SLEEP || state == RADIO_STARTING); } async command void XE1205PhyRxTx.enableAck(bool onOff) { atomic enableAck = onOff; } void armPatternDetect() { // small chance of a pattern arriving right after we arm, // and IRQ0 hasn't been enabled yet, so we would miss the interrupt // xxx maybe this can also be addressed with periodic timer? call XE1205IrqConf.armPatternDetector(TRUE); call XE1205IrqConf.clearFifoOverrun(TRUE); } async command void XE1205PhyRxTx.setRxHeaderLen(uint8_t l) { if (l > 8) l = 8; if (!l) return; headerLen = l; } async command uint8_t XE1205PhyRxTx.getRxHeaderLen() { return headerLen; } void computeNextRxLength() { uint8_t n = rxFrameLen - rxFrameIndex; // for timesync and such, we want the end of the packet to coincide with a fifofull event, // so that we know precisely when last byte was received if (n > 16) { if (n < 32) nextRxLen = n - 15; else nextRxLen = 15; } else { nextRxLen = n; } } async command uint8_t XE1205PhyRssi.readRxRssi() { return rssiTab[(rssiH<<2) |rssiL]; } task void rssiDone() { signal XE1205PhyRssi.rssiDone( rssiTab[(rssiH<<2) |rssiL]); } void readRssi() { if(rssiRange ==RSSI_RANGE_LOW ) { rssiRange = RSSI_RANGE_HIGH; call XE1205RssiConf.getRssi(rLow); call XE1205RssiConf.setRssiRange(TRUE); call Alarm32khz16.start(usecs_to_jiffies(call XE1205RssiConf.getRssiMeasurePeriod_us())); } else { call XE1205RssiConf.getRssi(rHigh); call XE1205RssiConf.setRssiMode(FALSE); if(state == RADIO_RSSI) { armPatternDetect(); call SpiResourceRssi.release(); call Interrupt0.enableRisingEdge(); atomic state = RADIO_LISTEN; signal XE1205PhyRssi.rssiDone( rssiTab[(rssiH<<2) |rssiL]); } else { // go on with rx of packet call Alarm32khz16.start(3000); } rssiRange = RSSI_OFF; } } error_t getRssi() { error_t err; err = call XE1205RssiConf.setRssiMode(TRUE); err = ecombine(err,call XE1205RssiConf.setRssiRange(FALSE)); rssiRange=RSSI_RANGE_LOW; call Alarm32khz16.start(usecs_to_jiffies(call XE1205RssiConf.getRssiMeasurePeriod_us())); return err; } async command error_t XE1205PhyRssi.getRssi() { error_t err; atomic { if (state != RADIO_LISTEN&&rssiRange==RSSI_OFF) return EBUSY; if (call XE1205PhyRxTx.off()) { return EOFF; } if(call SpiResourceRssi.immediateRequest() != SUCCESS) { return FAIL; } err=getRssi(); if (SUCCESS ==err) { state = RADIO_RSSI; } return err; } } async command error_t XE1205PhyRxTx.sendFrame(char* data, uint8_t frameLen) __attribute__ ((noinline)) { error_t status; if (frameLen < 6) return EINVAL; atomic { if (state == RADIO_SLEEP) return EOFF; if (call XE1205PhyRxTx.busy()) return EBUSY; if (frameLen == 0 || frameLen > xe1205_mtu + 7) return EINVAL; // 7 = 4 preamble + 3 sync call XE1205PhySwitch.txMode(); // it takes 100us to switch from rx to tx, ie less than one byte at 76kbps call Interrupt0.disable(); status = call SpiResourceTX.immediateRequest(); xe1205check(3, status); if (status != SUCCESS) { call XE1205PhySwitch.rxMode(); call SpiResourceConfig.request(); return status; } call XE1205PhySwitch.antennaTx(); state = RADIO_TX; } call XE1205Fifo.write(data, frameLen); atomic { txBuf = signal XE1205PhyRxTx.continueSend(&nextTxLen); } if (nextTxLen) { call Interrupt0.enableFallingEdge(); } else { call Interrupt0.disable(); call Interrupt1.enableRisingEdge(); } // cannot happen with current SPI implementation (at least with NoDma) #if 0 if (status != SUCCESS) { xe1205error(8, status); call XE1205PhySwitch.rxMode(); call XE1205PhySwitch.antennaRx(); call XE1205PatternConf.loadDataPatternHasBus(); armPatternDetect(); call SpiResourceTX.release(); atomic { call Interrupt0.enableRisingEdge(); state = RADIO_LISTEN; } return status; } #endif return SUCCESS; } uint16_t rxByte=0; /** * In transmit: nTxFifoEmpty. (ie after the last byte has been *read out of the fifo*) * In receive: write_byte. */ async event void Interrupt0.fired() __attribute__ ((noinline)) { error_t status; switch (state) { case RADIO_RX_ACK: call Alarm32khz16.stop(); case RADIO_LISTEN: rxByte=1; atomic state = RADIO_RX_HEADER; status = call SpiResourceRX.immediateRequest(); atomic { if (status != SUCCESS) { state = RADIO_LISTEN; call Interrupt0.disable(); // because pattern detector won't be rearmed right away call SpiResourceConfig.request(); return; } } call Alarm32khz16.start(3000); return; case RADIO_RX_HEADER: rxByte++; if (rxByte == 2) { call Alarm32khz16.start(3000); } if (rxByte == headerLen + 1) { call Interrupt0.disable(); call XE1205Fifo.read(rxFrame, headerLen); call Interrupt1.enableRisingEdge(); } return; case RADIO_TX: call Interrupt0.disable(); // avoid spurious IRQ0s from nTxFifoEmpty rebounding briefly after first byte is written. // note that we should really wait till writedone() to re-enable either interrupt. call XE1205Fifo.write(txBuf, nextTxLen); txBuf = signal XE1205PhyRxTx.continueSend(&nextTxLen); if (nextTxLen) { call Interrupt0.enableFallingEdge(); } else { call Interrupt0.disable(); call Interrupt1.enableRisingEdge(); } return; case RADIO_RSSI: // trigged while getting rssi call Interrupt0.disable(); // because pattern detector won't be rearmed right away return; default: return; } } /** * In transmit: TxStopped. (ie after the last byte has been *sent*) * In receive: Fifofull. */ async event void Interrupt1.fired() __attribute__ ((noinline)) { switch (state) { case RADIO_RX_PACKET: call Interrupt1.disable(); // in case it briefly goes back to full just after we read first byte call XE1205Fifo.read(&rxFrame[rxFrameIndex], nextRxLen); rxFrameIndex += nextRxLen; computeNextRxLength(); if (nextRxLen==0) { state = RADIO_RX_PACKET_LAST; } return; case RADIO_RX_HEADER: // somehow the FIFO has filled before we finished reading the header bytes call Interrupt1.disable(); call Alarm32khz16.stop(); signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL); call XE1205PatternConf.loadDataPatternHasBus(); armPatternDetect(); call SpiResourceRX.release(); atomic { call Interrupt0.enableRisingEdge(); state = RADIO_LISTEN; } return; case RADIO_TX: call Interrupt1.disable(); call XE1205PhySwitch.rxMode(); call XE1205PhySwitch.antennaRx(); if (enableAck==FALSE) { call XE1205PatternConf.loadDataPatternHasBus(); armPatternDetect(); signal XE1205PhyRxTx.sendFrameDone(SUCCESS); call SpiResourceTX.release(); atomic { call Interrupt0.enableRisingEdge(); state = RADIO_LISTEN; } } else { call XE1205PatternConf.loadAckPatternHasBus(); armPatternDetect(); call SpiResourceTX.release(); call Alarm32khz16.start(usecs_to_jiffies(8000)); atomic { call Interrupt0.enableRisingEdge(); state = RADIO_RX_ACK; } } return; default: return; } } async event void XE1205Fifo.readDone(error_t error) { switch(state) { case RADIO_RX_HEADER: rxFrameLen = signal XE1205PhyRxTx.rxFrameBegin(rxFrame, headerLen); if (rxFrameLen <= headerLen) { call Interrupt1.disable(); call Alarm32khz16.stop(); signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL); call XE1205PatternConf.loadDataPatternHasBus(); armPatternDetect(); call SpiResourceRX.release(); atomic { state = RADIO_LISTEN; call Interrupt0.enableRisingEdge(); } return; } atomic { if(rssiRange==RSSI_OFF) { getRssi(); } } rxFrameIndex = headerLen; computeNextRxLength(); state = RADIO_RX_PACKET; return; case RADIO_RX_PACKET_LAST: call Alarm32khz16.stop(); atomic { call XE1205PatternConf.loadDataPatternHasBus(); armPatternDetect(); state = RADIO_LISTEN; call Interrupt0.enableRisingEdge(); call SpiResourceRX.release(); } if( enableAck == FALSE) { signal XE1205PhyRxTx.rxFrameEnd(rxFrame, rxFrameLen + headerLen, SUCCESS); } else { enableAck = FALSE; signal XE1205PhyRxTx.rxAckEnd(rxFrame, rxFrameLen + headerLen, SUCCESS); } return; case RADIO_RX_PACKET: call Interrupt1.enableRisingEdge(); return; default: xe1205check(10, FAIL); return; } } async event void XE1205Fifo.writeDone(error_t error) __attribute__ ((noinline)) { } async event void Alarm32khz16.fired() { switch(state) { case RADIO_STARTING: call SpiResourceConfig.request(); return; case RADIO_LISTEN: case RADIO_RX_HEADER: case RADIO_RX_PACKET: if (rssiRange!=RSSI_OFF) { readRssi(); return; } stats_rxOverruns++; signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL); call XE1205PatternConf.loadDataPatternHasBus(); armPatternDetect(); call SpiResourceRX.release(); atomic { state = RADIO_LISTEN; call Interrupt0.enableRisingEdge(); } return; case RADIO_RSSI: readRssi(); return; case RADIO_RX_ACK: // ack timeout enableAck = FALSE; call SpiResourceRX.immediateRequest(); signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL); call XE1205PatternConf.loadDataPatternHasBus(); armPatternDetect(); call SpiResourceRX.release(); atomic { state = RADIO_LISTEN; call Interrupt0.enableRisingEdge(); } signal XE1205PhyRxTx.sendFrameDone(ENOACK); return; default: return; } } } tinyos-2.1.2+dfsg/tos/chips/xe1205/phy/XE1205PhyRssi.nc000066400000000000000000000002301207233610700221030ustar00rootroot00000000000000interface XE1205PhyRssi { async command error_t getRssi(); async command uint8_t readRxRssi(); async event void rssiDone(uint8_t _rssi); } tinyos-2.1.2+dfsg/tos/chips/xe1205/phy/XE1205PhyRxTx.nc000066400000000000000000000112601207233610700220750ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ interface XE1205PhyRxTx { /** * Send a buffer. This call will be followed up with continueSend() events * (see below) until the client module indicates that there is nothing left to send. * * @param data a pointer to an array of bytes to send * @param len length of the array (6 <= len <= 16) * @return error SUCCESS if the operation initiated successfully, otherwise EOFF, EBUSY, EINVAL, or FAIL. * */ async command error_t sendFrame(char* data, uint8_t len); /** * Signalled by the Phy layer to fetch more bytes to send. * * @param len pointer to length field indicating number of bytes in next send. If 0, nothing more to send. * @return pointer to bytes to be sent. If NULL, nothing more to send. * */ async event char* continueSend(uint8_t* len); /** * Signalled after the last buffer has been sent, where the 'last buffer' is the one following which * the client module returned NULL to continueSendBuf(). * */ async event void sendFrameDone(error_t err); /** * Receive a frame header. This is called when 'len' bytes have been received after * detecting a preamble, where 'len' is the value set by calling setRxHeaderLen. * * The client should return the total number to read in this frame (which can be * equal to len, for example if this frame is a short ack code). * * @param data pointer to frame header * @param len length of frame header * @return total number of bytes in this frame (including header bytes). * */ async event uint8_t rxFrameBegin(char* data, uint8_t len); /** * Signalled at end of a frame reception. * * @param data pointer to frame (at first byte of header) * @param len length of frame * @param status SUCCESS if packet received ok, ERROR if packet reception was aborted. * */ async event void rxFrameEnd(char* data, uint8_t len, error_t status); /** * Signalled at end of a Ack reception. * * @param data pointer to Ack (at first byte of header) * @param len length of the Ack * @param status SUCCESS if packet received ok, ERROR if packet reception was aborted. * */ async event void rxAckEnd(char* data, uint8_t len, error_t status); /** * Set header size, ie number of bytes at start of packet to be read and passed along * with the rxFrameBegin() event. * * @param len length of header, 2 <= len <= 8 * */ async command void setRxHeaderLen(uint8_t len); /** * Get the current header size. * * @return header size * */ async command uint8_t getRxHeaderLen(); /** * Check busy/idle state of phy. * * @return TRUE if phy is sending or receiving a packet, FALSE otherwise. * */ async command bool busy(); /** * Check on/off state of phy. * * @return TRUE if phy is idle, standby, starting, or stopping, FALSE otherwise. * */ async command bool off(); async command void enableAck(bool onOff); } tinyos-2.1.2+dfsg/tos/chips/xe1205/phy/XE1205PhySwitch.nc000066400000000000000000000047671207233610700224470ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * Interface for phy mode switches on XE1205 radio. * * @author Henri Dubois-Ferriere * */ interface XE1205PhySwitch { /** * Power down the XE1205. */ async command void sleepMode(); /** * Set the XE1205 to standby mode, i.e. oscillator running but everything else disabled. */ async command void standbyMode(); /** * Set the XE1205 to receive mode. */ async command void rxMode(); /** * Set the XE1205 to transmit mode. */ async command void txMode(); /** * Disconnect the antenna from both receiver and transmitter. */ async command void antennaOff(); /** * Connect the antenna to the receiver. */ async command void antennaRx(); /** * Connect the antenna to the transmitter. */ async command void antennaTx(); } tinyos-2.1.2+dfsg/tos/chips/xe1205/phy/XE1205PhySwitchC.nc000066400000000000000000000046711207233610700225440ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ configuration XE1205PhySwitchC { provides interface XE1205PhySwitch; } implementation { components XE1205PhySwitchP; XE1205PhySwitch = XE1205PhySwitchP; components HplXE1205PinsC; XE1205PhySwitchP.AntSelTXPin -> HplXE1205PinsC.AntSelTXPin; XE1205PhySwitchP.AntSelRXPin -> HplXE1205PinsC.AntSelRXPin; XE1205PhySwitchP.DataPin -> HplXE1205PinsC.DataPin; XE1205PhySwitchP.ModeSel0Pin -> HplXE1205PinsC.ModeSel0Pin; XE1205PhySwitchP.ModeSel1Pin -> HplXE1205PinsC.ModeSel1Pin; XE1205PhySwitchP.Irq0Pin -> HplXE1205PinsC.Irq0Pin; XE1205PhySwitchP.Irq1Pin -> HplXE1205PinsC.Irq1Pin; components MainC; MainC.SoftwareInit -> XE1205PhySwitchP.Init; } tinyos-2.1.2+dfsg/tos/chips/xe1205/phy/XE1205PhySwitchP.nc000066400000000000000000000071561207233610700225620ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ module XE1205PhySwitchP { provides interface XE1205PhySwitch; provides interface Init @atleastonce(); uses interface GeneralIO as AntSelTXPin; uses interface GeneralIO as AntSelRXPin; uses interface GeneralIO as DataPin; // only used in continuous mode, not currently supported uses interface GeneralIO as ModeSel0Pin; uses interface GeneralIO as ModeSel1Pin; uses interface GeneralIO as Irq0Pin; uses interface GeneralIO as Irq1Pin; } implementation { command error_t Init.init() { call ModeSel0Pin.makeOutput(); call ModeSel1Pin.makeOutput(); call AntSelTXPin.makeOutput(); call AntSelRXPin.makeOutput(); call DataPin.makeOutput(); call XE1205PhySwitch.standbyMode(); return SUCCESS; } async command void XE1205PhySwitch.sleepMode() { call ModeSel0Pin.clr(); call ModeSel1Pin.clr(); call Irq0Pin.makeOutput(); call Irq1Pin.makeOutput(); call DataPin.makeOutput(); } async command void XE1205PhySwitch.standbyMode() { call ModeSel0Pin.set(); call ModeSel1Pin.set(); call Irq0Pin.makeOutput(); call Irq1Pin.makeOutput(); call DataPin.makeOutput(); } async command void XE1205PhySwitch.rxMode() { call Irq0Pin.makeInput(); call Irq1Pin.makeInput(); call DataPin.makeInput(); call ModeSel0Pin.set(); call ModeSel1Pin.clr(); } async command void XE1205PhySwitch.txMode() { call Irq0Pin.makeInput(); call Irq1Pin.makeInput(); call DataPin.makeOutput(); call ModeSel1Pin.set(); call ModeSel0Pin.clr(); } async command void XE1205PhySwitch.antennaOff() { call AntSelRXPin.clr(); call AntSelTXPin.clr(); } async command void XE1205PhySwitch.antennaRx() { call AntSelRXPin.set(); call AntSelTXPin.clr(); } async command void XE1205PhySwitch.antennaTx() { call AntSelRXPin.clr(); call AntSelTXPin.set(); } } tinyos-2.1.2+dfsg/tos/chips/xe1205/xe1205debug.h000066400000000000000000000006571207233610700207340ustar00rootroot00000000000000uint8_t var; uint16_t lasterr; void xe1205error(uint8_t loc, uint8_t value_) __attribute__ ((noinline)) { // this is just to make sure the compiler doesn't optimize // out calls to this function, since we use it as a gdb breakpoint atomic var += value_ + loc; } void xe1205check(uint8_t loc, error_t err) __attribute__ ((noinline)) { if (err != SUCCESS) { atomic lasterr = loc; xe1205error(loc, err); } } tinyos-2.1.2+dfsg/tos/interfaces/000077500000000000000000000000001207233610700167115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/interfaces/AMPacket.nc000066400000000000000000000165541207233610700206730ustar00rootroot00000000000000// $Id: AMPacket.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The Active Message accessors, which provide the AM local address and * functionality for querying packets. Active Messages are a single-hop * communication protocol. Therefore, fields such as source and destination * represent the single-hop source and destination. Multihop sources and * destinations are defined by the corresponding multihop protocol (if any). * Also see the Packet interface. * * @author Philip Levis * @date January 18 2005 * @see Packet * @see AMSend * @see TEP 116: Packet Protocols */ #include #include interface AMPacket { /** * Return the node's active message address associated with this AM stack. * @return The address */ command am_addr_t address(); /** * Return the AM address of the destination of the AM packet. * If amsg is not an AM packet, the results of this command * are undefined. * @param 'message_t* ONE amsg' the packet * @return the destination address of the packet. */ command am_addr_t destination(message_t* amsg); /** * Return the AM address of the source of the AM packet. * If amsg is not an AM packet, the results of this command * are undefined. * @param 'message_t* ONE amsg' the packet * @return the source address of the packet. */ command am_addr_t source(message_t* amsg); /** * Set the AM address of the destination field of the AM packet. As * the AM address is set as part of sending with the AMSend * interface, this command is not used for sending packets. Rather, * it is used when a component, such as a queue, needs to buffer a * request to send. The component can save the destination address * and then recover it when actually sending. If amsg is * not an AM packet, the results of this command are undefined. * * @param 'message_t* ONE amsg' the packet * @param addr the address */ command void setDestination(message_t* amsg, am_addr_t addr); /** * Set the AM address of the source field of the AM packet. As * the AM address is set as part of sending with the AMSend * interface, this command is not used for sending packets. Rather, * it is used when a component, such as a queue, needs to buffer a * request to send. The component can save the source address * and then recover it when actually sending. As an AM layer generally * sets the source address to be the local address, this interface * is not commonly used except when a system is bypassing the AM * layer (e.g., a protocol bridge). If amsg is * not an AM packet, the results of this command are undefined. * * @param 'message_t* ONE amsg' the packet * @param addr the address */ command void setSource(message_t* amsg, am_addr_t addr); /** * Return whether amsg is destined for this mote. This is * partially a shortcut for testing whether the return value of * destination and address are the same. It * may, however, include additional logic. For example, there * may be an AM broadcast address: destination will return * the broadcast address, but address will still be * the mote's local address. If amsg is not an AM packet, * the results of this command are undefined. * * @param 'message_t* ONE amsg' the packet * @return whether the packet is addressed to this AM stack */ command bool isForMe(message_t* amsg); /** * Return the AM type of the AM packet. * If amsg is not an AM packet, the results of this command * are undefined. * * @param 'message_t* ONE amsg' the packet * @return the AM type */ command am_id_t type(message_t* amsg); /** * Set the AM type of the AM packet. As the AM type is set as part * of sending with the AMSend interface, this command is not used * for sending packets. Instead, it is used when a component, such * as a queue, needs to buffer a request to send. The component can * save the AM type in the packet then recover it when actually * sending. If amsg is not an AM packet, the results of * this command are undefined. * * @param 'message_t* ONE amsg' the packet * @param t the AM type */ command void setType(message_t* amsg, am_id_t t); /** * Get the AM group of the AM packet. The AM group is a logical * identifier that distinguishes sets of nodes which may share * a physical communication medium but wish to not communicate. * The AM group logically separates the sets of nodes. When * a node sends a packet, it fills in its AM group, and typically * nodes only receive packets whose AM group field matches their * own. * * @param 'message_t* ONE amsg' the packet * @return the AM group of this packet */ command am_group_t group(message_t* amsg); /** * Set the AM group field of a packet. Note that most data link * stacks will set this field automatically on a send request, which * may overwrite changes made with this command. * * @param 'message_t* ONE amsg' the packet * @param group the packet's new AM group value */ command void setGroup(message_t* amsg, am_group_t grp); /** * Provides the current AM group of this communication interface. * * @return The AM group. */ command am_group_t localGroup(); } tinyos-2.1.2+dfsg/tos/interfaces/AMSend.nc000066400000000000000000000125261207233610700203500ustar00rootroot00000000000000// $Id: AMSend.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** The basic active message message sending interface. Also see * Packet, Receive, and Send. * * @author Philip Levis * @date January 5 2005 * @see Packet * @see AMPacket * @see Receive * @see TEP 116: Packet Protocols */ #include #include #include interface AMSend { /** * Send a packet with a data payload of len to address * addr. To determine the maximum available size, use the * Packet interface of the component providing AMSend. If send * returns SUCCESS, then the component will signal the sendDone * event in the future; if send returns an error, it will not * signal the event. Note that a component may accept a send * request which it later finds it cannot satisfy; in this case, it * will signal sendDone with error code. * * @param addr address to which to send the packet * @param 'message_t* ONE msg' the packet * @param len the length of the data in the packet payload * @return SUCCESS if the request to send succeeded and a * sendDone will be signaled later, EBUSY if the * abstraction cannot send now but will be able to * later, or FAIL if the communication layer is not * in a state that can send (e.g., off). * @see sendDone */ command error_t send(am_addr_t addr, message_t* msg, uint8_t len); /** * Cancel a requested transmission. Returns SUCCESS if the * transmission was canceled properly (not sent in its * entirety). Note that the component may not know * if the send was successfully canceled, if the radio is * handling much of the logic; in this case, a component * should be conservative and return an appropriate error code. * A successful call to cancel must always result in a * sendFailed event, and never a sendSucceeded event. * * @param 'message_t* ONE msg' the packet whose transmission should be cancelled. * @return SUCCESS if the transmission was cancelled, FAIL otherwise. * @see sendDone */ command error_t cancel(message_t* msg); /** * Signaled in response to an accepted send request. msg is * the message buffer sent, and error indicates whether * the send was successful. * * @param 'message_t* ONE msg' the packet which was submitted as a send request * @param error SUCCESS if it was sent successfully, FAIL if it was not, * ECANCEL if it was cancelled * @see send * @see cancel */ event void sendDone(message_t* msg, error_t error); /** * Return the maximum payload length that this communication layer * can provide. This command behaves identically to * Packet.maxPayloadLength and is included in this * interface as a convenience. * * @return the maximum payload length */ command uint8_t maxPayloadLength(); /** * Return a pointer to a protocol's payload region in a packet. * This command behaves identically to Packet.getPayload * (minus the length parameter) and is included in this interface * as a convenience. * * @param 'message_t* ONE msg' the packet * @return 'void* COUNT(len)' the payload of the packet */ command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/interfaces/ActiveMessageAddress.nc000066400000000000000000000043121207233610700232610ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ #include "AM.h" /** * @author Phil Levis * @author David Moss */ interface ActiveMessageAddress { /** * Set the active message address of this node * @param group The node's group ID * @param addr The node's active message address */ async command void setAddress(am_group_t group, am_addr_t addr); /** * @return the active message address of this node */ async command am_addr_t amAddress(); /** * @return the group address of this node */ async command am_group_t amGroup(); /** * Notification that the address or group settings changed. */ async event void changed(); } tinyos-2.1.2+dfsg/tos/interfaces/AdcConfigure.nc000066400000000000000000000052261207233610700215710ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:14 $ * @author: Jan Hauer * ======================================================================== */ /** * This interface is intended to be provided by an ADC client and used by the * ADC subsystem to retrieve the client's ADC configuration. * * @author Jan Hauer * @see Please refer to TEP 101 for more information about this interface and * its intended use. */ interface AdcConfigure { /** * Returns the configuration of an ADC client. adc_config_t is * a hardware specific data type that contains all information necessary to * configure the respective ADC hardware for the client. A client MUST always * return the same configuration and, if configuration data is passed as a * pointer, the ADC subsystem (HIL component) MUST NOT reference it after the * return of this command. * * @return chip specific configuration. */ async command adc_config_t getConfiguration(); } tinyos-2.1.2+dfsg/tos/interfaces/ArbiterInfo.nc000066400000000000000000000105311207233610700214370ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2010-06-29 22:07:46 $ * ======================================================================== */ /** * Please refer to TEP 108 for more information about this interface and its * intended use.

      * * The ArbiterInfo interface allows a component to query the current * status of an arbiter. It must be provided by ALL arbiter implementations, * and can be used for a variety of different purposes. Normally it will be * used in conjunction with the Resource interface for performing run time * checks on access rights to a particular shared resource. * * @author Kevin Klues (klueska@cs.wustl.edu) */ interface ArbiterInfo { /** * Check whether a resource is currently allocated. * * @return TRUE If the resource being arbitrated is currently allocated * to any of its users
      * FALSE Otherwise. */ async command bool inUse(); /** * Get the id of the client currently using a resource. * * @return Id of the current owner of the resource
      * 0xFF if no one currently owns the resource */ async command uint8_t userId(); } tinyos-2.1.2+dfsg/tos/interfaces/AsyncStdControl.nc000066400000000000000000000107031207233610700223250ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:46 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this interface and its * intended use.

      * * This is the asynchronous counterpart to the StdContol interface. It * should be used for switching between the on and off power states of * the component providing it. This interface differs from the * StdControl interface only in the fact that any of its commands can * be called from asynchronous context. * * @author Joe Polastre * @author Kevin Klues (klueska@cs.wustl.edu) */ interface AsyncStdControl { /** * Start this component and all of its subcomponents. * * @return SUCCESS if the component was either already on or was * successfully turned on
      * FAIL otherwise */ async command error_t start(); /** * Stop the component and any pertinent subcomponents (not all * subcomponents may be turned off due to wakeup timers, etc.). * * @return SUCCESS if the component was either already off or was * successfully turned off
      * FAIL otherwise */ async command error_t stop(); } tinyos-2.1.2+dfsg/tos/interfaces/BigQueue.nc000066400000000000000000000064511207233610700207470ustar00rootroot00000000000000/* $Id: BigQueue.nc,v 1.2 2007-09-19 17:29:17 klueska Exp $ */ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to a FIFO list (queue) that contains items * of a specific type. The queue has a maximum size. * * @author Philip Levis * @author Kyle Jamieson * @date $Date: 2007-09-19 17:29:17 $ */ interface BigQueue { /** * Returns if the queue is empty. * * @return Whether the queue is empty. */ command bool empty(); /** * The number of elements currently in the queue. * Always less than or equal to maxSize(). * * @return The number of elements in the queue. */ command uint16_t size(); /** * The maximum number of elements the queue can hold. * * @return The maximum queue size. */ command uint16_t maxSize(); /** * Get the head of the queue without removing it. If the queue * is empty, the return value is undefined. * * @return The head of the queue. */ command t head(); /** * Remove the head of the queue. If the queue is empty, the return * value is undefined. * * @return The head of the queue. */ command t dequeue(); /** * Enqueue an element to the tail of the queue. * * @param newVal - the element to enqueue * @return SUCCESS if the element was enqueued successfully, FAIL * if it was not enqueued. */ command error_t enqueue(t newVal); /** * Return the nth element of the queue without dequeueing it, * where 0 is the head of the queue and (size - 1) is the tail. * If the element requested is larger than the current queue size, * the return value is undefined. * * @param index - the index of the element to return * @return the requested element in the queue. */ command t element(uint16_t idx); } tinyos-2.1.2+dfsg/tos/interfaces/BitVector.nc000066400000000000000000000052631207233610700211420ustar00rootroot00000000000000//$Id: BitVector.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to a bit vector. * * @author Cory Sharp */ interface BitVector { /** * Clear all bits in the vector. */ async command void clearAll(); /** * Set all bits in the vector. */ async command void setAll(); /** * Read a bit from the vector. * @param bitnum Bit to read. * @return Bit value. */ async command bool get(uint16_t bitnum); /** * Set a bit in the vector. * @param bitnum Bit to set. */ async command void set(uint16_t bitnum); /** * Set a bit in the vector. * @param bitnum Bit to clear. */ async command void clear(uint16_t bitnum); /** * Toggle a bit in the vector. * @param bitnum Bit to toggle. */ async command void toggle(uint16_t bitnum); /** * Write a bit in the vector. * @param bitnum Bit to clear. * @param value New bit value. */ async command void assign(uint16_t bitnum, bool value); /** * Return bit vector length. * @return Bit vector length. */ async command uint16_t size(); } tinyos-2.1.2+dfsg/tos/interfaces/BlockRead.nc000066400000000000000000000075461207233610700210750ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Read interface for the block storage abstraction described in * TEP103. * * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:25 $ */ #include "Storage.h" interface BlockRead { /** * Initiate a read operation within a given volume. On SUCCESS, the * readDone event will signal completion of the * operation. * * @param addr starting address to begin reading. * @param 'void* COUNT(len) buf' buffer to place read data. * @param len number of bytes to read. * @return *

    1. SUCCESS if the request was accepted, *
    2. EINVAL if the parameters are invalid *
    3. EBUSY if a request is already being processed. */ command error_t read(storage_addr_t addr, void* buf, storage_len_t len); /** * Signals the completion of a read operation. * * @param addr starting address of read. * @param 'void* COUNT(len) buf' buffer where read data was placed. * @param len number of bytes read. * @param error SUCCESS if the operation was successful, FAIL if * it failed */ event void readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error); /** * Initiate a crc computation. On SUCCESS, the * computeCrcDone event will signal completion of the * operation. * * @param addr starting address. * @param len the number of bytes to compute the crc over. * @parm crc initial CRC value * @return *
    4. SUCCESS if the request was accepted, *
    5. EINVAL if the parameters are invalid *
    6. EBUSY if a request is already being processed. */ command error_t computeCrc(storage_addr_t addr, storage_len_t len, uint16_t crc); /** * Signals the completion of a crc computation. * * @param addr stating address. * @param len number of bytes the crc was computed over. * @param crc the resulting crc value. * @param error SUCCESS if the operation was successful, FAIL if * it failed */ event void computeCrcDone(storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error); /** * Report the usable volume size in bytes (this may be different than * the actual volume size because of metadata overheads). * @return Volume size. */ command storage_len_t getSize(); } tinyos-2.1.2+dfsg/tos/interfaces/BlockWrite.nc000066400000000000000000000101151207233610700212760ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Write interface for the block storage abstraction described in * TEP103. * * @author Jonathan Hui * @version $Revision: 1.6 $ $Date: 2008-06-04 03:00:25 $ */ #include "Storage.h" interface BlockWrite { /** * Initiate a write operation within a given volume. On SUCCESS, the * writeDone event will signal completion of the * operation. *

      * Between two erases, no byte may be written more than once. * * @param addr starting address to begin write. * @param 'void* COUNT(len) buf' buffer to write data from. * @param len number of bytes to write. * @return *

    7. SUCCESS if the request was accepted, *
    8. EINVAL if the parameters are invalid *
    9. EBUSY if a request is already being processed. */ command error_t write(storage_addr_t addr, void* buf, storage_len_t len); /** * Signals the completion of a write operation. However, data is not * guaranteed to survive a power-cycle unless a sync operation has * been completed. * * @param addr starting address of write. * @param 'void* COUNT(len) buf' buffer that written data was read from. * @param len number of bytes written. * @param error SUCCESS if the operation was successful, FAIL if * it failed */ event void writeDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error); /** * Initiate an erase operation. On SUCCESS, the * eraseDone event will signal completion of the * operation. * * @return *
    10. SUCCESS if the request was accepted, *
    11. EBUSY if a request is already being processed. */ command error_t erase(); /** * Signals the completion of an erase operation. * * @param error SUCCESS if the operation was successful, FAIL if * it failed */ event void eraseDone(error_t error); /** * Initiate a sync operation to finalize writes to the volume. A * sync operation must be issued to ensure that data is stored in * non-volatile storage. On SUCCES, the syncDone event * will signal completion of the operation. * * @return *
    12. SUCCESS if the request was accepted, *
    13. EBUSY if a request is already being processed. */ command error_t sync(); /** * Signals the completion of a sync operation. All written data is * flushed to non-volatile storage after this event. * * @param error SUCCESS if the operation was successful, FAIL if * it failed */ event void syncDone(error_t error); } tinyos-2.1.2+dfsg/tos/interfaces/Boot.nc000066400000000000000000000047551207233610700201510ustar00rootroot00000000000000// $Id: Boot.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Interface that notifies components when TinyOS has booted * (initialized all of its components), as discussed in TEP 107. * * @author Philip Levis * @date January 5 2005 */ interface Boot { /** * Signaled when the system has booted successfully. Components can * assume the system has been initialized properly. Services may * need to be started to work, however. * * @see StdControl * @see SplitConrol * @see TEP 107: Boot Sequence */ event void booted(); } tinyos-2.1.2+dfsg/tos/interfaces/Cache.nc000066400000000000000000000046411207233610700202430ustar00rootroot00000000000000/* * Copyright (c) 2006 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * A data item cache. The cache does not own the items it caches: * there is no allocation/deallocation policy, or notification of * eviction. Correspondingly, using references (pointers) as data * items can be difficult. * * @author Rodrigo Fonseca * @author Philip Levis */ interface Cache { /** * Inserts an item in the cache, evicting if necessary. * An atomic lookup after insert should return true. * * @param item - the data item to insert. */ command void insert(t item); /** * Return whether the data item is in the cache. * * @param item - the data item to query * @return Whether the item is in the cache. */ command bool lookup(t item); /** * Flush the cache of all entries. * */ command void flush(); } tinyos-2.1.2+dfsg/tos/interfaces/CoAPClient.nc000066400000000000000000000103301207233610700211510ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include typedef uint8_t method_t; interface CoAPClient { /** * Sends a new CoAP request. * * The CoAP library handles PDU retransmissions automatically. * If/when a response is received, @c request_done will be called. * Only a single CoAP request can be handled at a time. * * @param dest Address of CoAP server to send the request to. * @param method CoAP method type (COAP_REQUEST_GET, COAP_REQUEST_PUT). * @param optlist All CoAP options to include, ordered correctly. * @param len Payload length, if the request will have a payload. * @param data Payload data. May be NULL if len is zero. * @returns SUCCESS if the request is sent. */ command error_t request(struct sockaddr_in6 *dest, method_t method, coap_list_t *optlist, uint16_t len, void *data); /** * Similar to @c request, but can handle large payloads in the request via * the CoAP block mechanism. * * Payload data is requested as-needed via the @c streamed_next_block event. * * Not yet implemented. * * TODO: Implement! * * @param dest Address of CoAP server to send the request to. * @param method CoAP method type (COAP_REQUEST_GET, COAP_REQUEST_PUT). * @param optlist All CoAP options to include, ordered correctly. * @returns SUCCESS if the request is sent. */ command error_t streamed_request(struct sockaddr_in6 *dest, method_t method, coap_list_t *optlist); /** * Called in response to a @c streamed_request to obtain payload data. * * @param blockno The payload block number. * @param len On entry set to the desired payload block length. When the end * of the payload data is reached, @c len must be set to the length of the * final block. Returning less payload data than requested is not permitted * except for the final block. * @param data Receives the pointer to the next block of payload data. * @returns SUCCESS if the payload data block could be provided. */ event error_t streamed_next_block(uint16_t blockno, uint16_t *len, void **data); /** * Called when a response is received. * * TODO: Implement support for CoAP block responses. * * @param code The CoAP response code (in 3.5 packed format). * @param mediatype Response payload media type, if applicable. * @param len The length of any payload data, or zero if no response payload. * @param data Response payload data, if any. * @param more If set, the response is using block transfer and there are * further data blocks expected. The final block does not have this flag * set. */ event void request_done(uint8_t code, uint8_t mediatype, uint16_t len, void *data, bool more); } tinyos-2.1.2+dfsg/tos/interfaces/CoAPServer.nc000066400000000000000000000040751207233610700212120ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "tinyos_coap_resources.h" interface CoAPServer { /* * bind a local address. */ command error_t bind(uint16_t port); /* * register the .wellknown/core resource */ command error_t registerWellknownCore(); /* * register a TinyOS resource with libcoap */ command error_t registerResource(char uri[MAX_URI_LENGTH], unsigned int uri_length, unsigned char mediatype, unsigned int writable, unsigned int splitphase, unsigned int immediately); } tinyos-2.1.2+dfsg/tos/interfaces/ConfigStorage.nc000066400000000000000000000134671207233610700220000ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Read interface for the log storage abstraction described in * TEP103. * * @author Jonathan Hui * @author David Gay * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:25 $ */ #include "Storage.h" interface ConfigStorage { /** * Initiate a read operation within a given volume. On SUCCESS, the * readDone event will signal completion of the * operation. The data read is the contents of the config volume * as of the last commit operation. * * @param addr starting address to begin reading. * @param 'void* COUNT(len) buf' buffer to place read data. * @param len number of bytes to read. * @return *
    14. SUCCESS if the request was accepted, *
    15. EINVAL if the parameters are invalid *
    16. EOFF if the volume has not been mounted *
    17. EBUSY if a request is already being processed. *
    18. FAIL if the volume does not contain valid data * (see valid) */ command error_t read(storage_addr_t addr, void* buf, storage_len_t len); /** * Signals the completion of a read operation. * * @param addr starting address of read. * @param 'void* COUNT(len) buf' buffer where read data was placed. * @param len number of bytes read. * @param error SUCCESS if the operation was successful, FAIL if * it failed */ event void readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error); /** * Initiate a write operation within a given volume. On SUCCESS, the * writeDone event will signal completion of the * operation. * * @param addr starting address to begin write. * @param 'void* COUNT(len) buf' buffer to write data from. * @param len number of bytes to write. * @return *
    19. SUCCESS if the request was accepted, *
    20. EINVAL if the parameters are invalid *
    21. EOFF if the volume has not been mounted *
    22. EBUSY if a request is already being processed. */ command error_t write(storage_addr_t addr, void* buf, storage_len_t len); /** * Signals the completion of a write operation. However, data is not * guaranteed to survive a power-cycle unless a commit operation has * been completed. * * @param addr starting address of write. * @param 'void* COUNT(len) buf' buffer that written data was read from. * @param len number of bytes written. * @param error SUCCESS if the operation was successful, FAIL if * it failed */ event void writeDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error); /** * Initiate a commit operation and finialize any additional writes to the * volume. A commit operation must be issued to ensure that data is * stored in non-volatile storage. On SUCCES, the commitDone * event will signal completion of the operation. * * @return *
    23. SUCCESS if the request was accepted, *
    24. EBUSY if a request is already being processed. *
    25. EOFF if the volume has not been mounted */ command error_t commit(); /** * Signals the completion of a commit operation. All written data is * flushed to non-volatile storage after this event. * * @param error SUCCESS if the operation was successful, FAIL if * it failed */ event void commitDone(error_t error); /** * Report the usable volume size in bytes (this may be significantly * different from the actual volume size, e.g., it's approximately * half the volume size on the AT45DB implementation). * * @return Volume size. The result is undefined if the volume hasn't * been mounted. */ command storage_len_t getSize(); /** * Report whether this config volume contains valid data. Committing * a volume makes it valid. * * @return TRUE if the volume contains valid data, FALSE otherwise. The * result is undefined if the volume hasn't been mounted. */ command bool valid(); } tinyos-2.1.2+dfsg/tos/interfaces/Crc.nc000066400000000000000000000047671207233610700177600ustar00rootroot00000000000000/* * * Copyright (c) 2000-2007 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Compute the CRC-16 value of a byte array. * * @author Jonathan Hui * @author David Moss */ interface Crc { /** * Compute the CRC-16 value of a byte array. * * @param 'void* COUNT(len) buf' A pointer to the buffer over which to compute CRC. * @param len The length of the buffer over which to compute CRC. * @return The CRC-16 value. */ async command uint16_t crc16(void* buf, uint8_t len); /** * Compute a generic CRC-16 using a given seed. Used to compute CRC's * of discontinuous data. * * @param startCrc An initial CRC value to begin with * @param 'void* COUNT(len) buf' A pointer to a buffer of data * @param len The length of the buffer * @return The CRC-16 value. */ async command uint16_t seededCrc16(uint16_t startCrc, void *buf, uint8_t len); } tinyos-2.1.2+dfsg/tos/interfaces/CsmaBackoff.nc000066400000000000000000000044471207233610700214030ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface for MAC Backoff values from the radio stack. * Allows application to change the backoff on a per packet basis. * Only used if congestion control is enabled. * * @author Joe Polastre */ interface CsmaBackoff { /** * Return initial backoff time before attempting to send message m. The * units are radio dependent. * @param 'message_t* ONE m' * @return Initial backoff time */ async event uint16_t initial(message_t* m); /** * Return backoff time after message m could not be send due to congestion. * The units are raio dependent. * @param 'message_t* ONE m' * @return Backoff time after congestion */ async event uint16_t congestion(message_t* m); } tinyos-2.1.2+dfsg/tos/interfaces/DeviceMetadata.nc000066400000000000000000000035521207233610700221000ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * DeviceMetadata is a way to obtain information about a generic data * access device represented by a SID. See TEP109 and TEP114 for details. * * @author Gilman Tolle * @version $Revision: 1.1 $ */ interface DeviceMetadata { command uint8_t getSignificantBits(); } tinyos-2.1.2+dfsg/tos/interfaces/FastSpiByte.nc000066400000000000000000000061251207233610700214340ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ /** * This is a natural extension of the SpiByte interface which allows fast * data transfers comparable to the SpiStream interface. You may want to * use the following code sequence to write a buffer as fast as possible * * uint8_t *data; * uint8_t *response; * * // start the first byte * call FastSpiByte.splitWrite(data[0]); * for(i = 1; i < length; ++i) { * // finish the previous one and write the next one * response[i-1] = call FastSpiByte.splitReadWrite(data[i]); * } * // finish the last byte * response[length-1] = call FastSpiByte.splitRead(); * * You can also do some useful computation (like calculate a CRC) while the * hardware is sending the byte. */ interface FastSpiByte { /** * Starts a split-phase SPI data transfer with the given data. * A splitRead/splitReadWrite command must follow this command even * if the result is unimportant. */ async command void splitWrite(uint8_t data); /** * Finishes the split-phase SPI data transfer by waiting till * the write command comletes and returning the received data. */ async command uint8_t splitRead(); /** * This command first reads the SPI register and then writes * there the new data, then returns. */ async command uint8_t splitReadWrite(uint8_t data); /** * This is the standard SpiByte.write command but a little * faster as we should not need to adjust the power state there. * (To be consistent, this command could have be named splitWriteRead). */ async command uint8_t write(uint8_t data); } tinyos-2.1.2+dfsg/tos/interfaces/GeneralIO.nc000066400000000000000000000037011207233610700210410ustar00rootroot00000000000000// $Id: GeneralIO.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Joe Polastre */ interface GeneralIO { async command void set(); async command void clr(); async command void toggle(); async command bool get(); async command void makeInput(); async command bool isInput(); async command void makeOutput(); async command bool isOutput(); } tinyos-2.1.2+dfsg/tos/interfaces/Get.nc000066400000000000000000000043421207233610700177550ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The Get interface is intended for synchronous reading of small * values. The type of the value is given as a template * argument. Generally, these values are backed by memory or * computation. Because no error code is included, the get() call must * be guaranteed to succeed. * *

      * See TEP114 - SIDs: Source and Sink Independent Drivers for details. * * @param val_t the type of the object that will be returned * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ interface Get { /** * Retrieves a value of type val_t. * * @return the value itself */ command val_t get(); } tinyos-2.1.2+dfsg/tos/interfaces/GetNow.nc000066400000000000000000000043701207233610700204420ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-10 14:41:42 $ * @author Jan Hauer * ======================================================================== */ /** * Similar to the Get interface (see TEP 114) this interface can be * used for reading small values, but in contrast to the Get interface * the value is read asynchronously. * * @param data_type the type of the object that will be returned */ interface GetNow { /** * Returns a value of type data_type. * * @return the value itself */ async command data_type getNow(); } tinyos-2.1.2+dfsg/tos/interfaces/GetSet.nc000066400000000000000000000047121207233610700204320ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The GetSet interface is intended for synchronous reading and * writing of small values. The type of the value is given as a * template argument. Generally, these values are backed by memory or * computation. Because no error code is included, both calls must be * guaranteed to succeed. This interface should be used when a single * logical unit supports both getting and setting. * *

      * See TEP114 - SIDs: Source and Sink Independent Drivers for details. * * @param val_t the type of the object that will be stored * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ interface GetSet { /** * Retrieves a value of type val_t. * * @return the value itself */ command val_t get(); /** * Stores a value of type val_t. * * @param val the value to be stored */ command void set( val_t val ); } tinyos-2.1.2+dfsg/tos/interfaces/GpioCapture.nc000066400000000000000000000044751207233610700214670ustar00rootroot00000000000000// $Id: GpioCapture.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface for microcontroller-independent 32kHz timer capture events. * * @author Jonathan Hui * @author Philip Levis * @author Joe Polastre * @date September 30 2005 * */ #include "TinyError.h" interface GpioCapture { /** * Enable an edge based timer capture event. * * @return Whether the timer capture has been enabled. */ async command error_t captureRisingEdge(); async command error_t captureFallingEdge(); /** * Fired when an edge interrupt occurs. * * @param val The value of the 32kHz timer. */ async event void captured(uint16_t time); /** * Disable further captures. */ async command void disable(); } tinyos-2.1.2+dfsg/tos/interfaces/GpioInterrupt.nc000066400000000000000000000047371207233610700220610ustar00rootroot00000000000000// $Id: GpioInterrupt.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui * @author Joe Polastre * Revision: $Revision: 1.5 $ * * Provides a microcontroller-independent presentation of interrupts */ interface GpioInterrupt { /** * Enable an edge based interrupt. Calls to these functions are * not cumulative: only the transition type of the last called function * will be monitored for. * * * @return SUCCESS if the interrupt has been enabled */ async command error_t enableRisingEdge(); async command error_t enableFallingEdge(); /** * Diables an edge interrupt or capture interrupt * * @return SUCCESS if the interrupt has been disabled */ async command error_t disable(); /** * Fired when an edge interrupt occurs. * * NOTE: Interrupts keep running until "disable()" is called */ async event void fired(); } tinyos-2.1.2+dfsg/tos/interfaces/I2CPacket.nc000066400000000000000000000120121207233610700207340ustar00rootroot00000000000000// $Id: I2CPacket.nc,v 1.7 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * I2C Packet/buffer interface for sending data over the I2C bus. * The address, length, and buffer must be specified. The I2C bus then * has control of that buffer and returns it when the operation has * completed. The I2CPacket interface supports master-mode communication * and provides for multiple repeated STARTs and multiple reads/writes * within the same START transaction. * The interface is typed according to the address size supported by * the master hardware. Masters capable of supporting extended (10-bit) * I2C addressing MUST export both types. Applications should use the * smallest address size to ensure best portability. * * @param addr_size A type indicating the slave address size. Supported * values are TI2CExtdAddr (for 10-bit addressing) and TI2CBasicAddr (7-bit * addressing). * * @author Joe Polastre * @author Phil Buonadonna * @author Jonathan Hui * @author Phil Levis * Revision: $Revision: 1.7 $ */ #include interface I2CPacket { /** * Perform an I2C read operation * * @param flags Flags that may be logical ORed and defined by: * I2C_START - The START condition is transmitted at the beginning * of the packet if set. * I2C_STOP - The STOP condition is transmitted at the end of the * packet if set. * I2C_ACK_END - ACK the last byte if set. Otherwise NACK last byte. This * flag cannot be used with the I2C_STOP flag. * @param addr The slave device address. Only used if I2C_START is set. * @param length Length, in bytes, to be read * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read into * * @return SUCCESS if bus available and request accepted. */ async command error_t read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data); /** * Perform an I2C write operation * * @param flags Flags that may be logical ORed and defined by: * I2C_START - The START condition is transmitted at the beginning * of the packet if set. * I2C_STOP - The STOP condition is transmitted at the end of the * packet if set. * @param addr The slave device address. Only used if I2C_START is set. * @param length Length, in bytes, to be read * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read into * * @return SUCCESS if bus available and request accepted. */ async command error_t write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data); /** * Notification that the read operation has completed * * @param addr The slave device address * @param length Length, in bytes, read * @param 'uint8_t* COUNT(length) data' Pointer to the received data buffer * @param success SUCCESS if transfer completed without error. */ async event void readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data); /** * Notification that the write operation has completed * * @param addr The slave device address * @param length Length, in bytes, written * @param 'uint8_t* COUNT(length) data' Pointer to the data buffer written * @param success SUCCESS if transfer completed without error. */ async event void writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data); } tinyos-2.1.2+dfsg/tos/interfaces/Ieee154Packet.nc000066400000000000000000000041341207233610700214660ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include interface Ieee154Packet { command ieee154_saddr_t address(); command ieee154_saddr_t destination(message_t* msg); command ieee154_saddr_t source(message_t* msg); command void setDestination(message_t* msg, ieee154_saddr_t addr); command void setSource(message_t* msg, ieee154_saddr_t addr); command bool isForMe(message_t* msg); command ieee154_panid_t pan(message_t* msg); command void setPan(message_t* msg, ieee154_panid_t grp); command ieee154_panid_t localPan(); } tinyos-2.1.2+dfsg/tos/interfaces/Ieee154Send.nc000066400000000000000000000114021207233610700211440ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include #include #include /* * * The only change from the AMSend interface is that instead of * sending to an AMID, we now send to a ieee154_saddr_t. * */ interface Ieee154Send { /** * Send a packet with a data payload of len to address * addr. To determine the maximum available size, use the * Packet interface of the component providing AMSend. If send * returns SUCCESS, then the component will signal the sendDone * event in the future; if send returns an error, it will not * signal the event. Note that a component may accept a send * request which it later finds it cannot satisfy; in this case, it * will signal sendDone with error code. * * @param addr address to which to send the packet * @param msg the packet * @param len the length of the data in the packet payload * @return SUCCESS if the request to send succeeded and a * sendDone will be signaled later, EBUSY if the * abstraction cannot send now but will be able to * later, or FAIL if the communication layer is not * in a state that can send (e.g., off). * @see sendDone */ command error_t send(ieee154_saddr_t addr, message_t* msg, uint8_t len); /** * Cancel a requested transmission. Returns SUCCESS if the * transmission was canceled properly (not sent in its * entirety). Note that the component may not know * if the send was successfully canceled, if the radio is * handling much of the logic; in this case, a component * should be conservative and return an appropriate error code. * A successful call to cancel must always result in a * sendFailed event, and never a sendSucceeded event. * * @param msg the packet whose transmission should be cancelled. * @return SUCCESS if the transmission was cancelled, FAIL otherwise. * @see sendDone */ command error_t cancel(message_t* msg); /** * Signaled in response to an accepted send request. msg is * the message buffer sent, and error indicates whether * the send was successful. * * @param msg the packet which was submitted as a send request * @param error SUCCESS if it was sent successfully, FAIL if it was not, * ECANCEL if it was cancelled * @see send * @see cancel */ event void sendDone(message_t* msg, error_t error); /** * Return the maximum payload length that this communication layer * can provide. This command behaves identically to * Packet.maxPayloadLength and is included in this * interface as a convenience. * * @return the maximum payload length */ command uint8_t maxPayloadLength(); /** * Return a pointer to a protocol's payload region in a packet. * This command behaves identically to Packet.getPayload * (minus the length parameter) and is included in this interface * as a convenience. * * @param msg the packet * @return the payload of the packet */ command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/interfaces/Init.nc000066400000000000000000000047341207233610700201460ustar00rootroot00000000000000// $Id: Init.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** The basic synchronous initialization interface. * * @author Philip Levis * @date January 17 2005 */ #include "TinyError.h" interface Init { /** * Initialize this component. Initialization should not assume that * any component is running: init() cannot call any commands besides * those that initialize other components. * * @return SUCCESS if initialized properly, FAIL otherwise. * @see TEP 107: Boot Sequence * */ command error_t init(); } tinyos-2.1.2+dfsg/tos/interfaces/Intercept.nc000066400000000000000000000017331207233610700211740ustar00rootroot00000000000000/** * Allows protocol layers above the routing layer to perform data * aggregation or make application-specific decisions on whether to * forward via the return value of the forward event. * * @author Philip Levis * @author Kyle Jamieson * @version $Id: Intercept.nc,v 1.6 2008-06-04 03:00:26 regehr Exp $ * @see TEP 116: Packet Protocols, TEP 119: Collection */ #include #include interface Intercept { /** * Signals that a message has been received, which is supposed to be * forwarded to another destination. * * @param 'message_t* ONE msg' The complete message received. * * @param 'void* COUNT(len) payload' The payload portion of the packet for this * protocol layer. * * @param len The length of the payload buffer. * * @return TRUE indicates the packet should be forwarded, FALSE * indicates that it should not be forwarded. * */ event bool forward(message_t* msg, void* payload, uint8_t len); } tinyos-2.1.2+dfsg/tos/interfaces/InternalFlash.nc000066400000000000000000000056711207233610700217760ustar00rootroot00000000000000/* * * Copyright (c) 2000-2007 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * A generic interface to read from and write to the internal flash of * a microcontroller. * * @author Jonathan Hui * @author Prabal Dutta (Port to T2) */ interface InternalFlash { /** * Read size bytes starting from addr and * return them in buf. * * @param addr A pointer to the starting address from which to read. * @param 'void* COUNT(size) buf' A pointer to the buffer into which read bytes are * placed. * @param size The number of bytes to read. * @return SUCCESS if the bytes were successfully read. * FAIL if the call could not be completed. */ command error_t read(void* addr, void* buf, uint16_t size); /** * Write size bytes from buf into internal * flash starting at addr. * * @param addr A pointer to the starting address to which to write. * @param 'void* COUNT(size) buf' A pointer to the buffer from which bytes are read. * @param size The number of bytes to write. * @return SUCCESS if the bytes were successfully written. * FAIL if the call could not be completed. */ command error_t write(void* addr, void* buf, uint16_t size); } tinyos-2.1.2+dfsg/tos/interfaces/Led.nc000066400000000000000000000043101207233610700177350ustar00rootroot00000000000000/* * Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** An interface to control a single LED. * * Provides the ability to turn on, turn off, and toggle an LED. * * Implementations of this interface are provided by the LedC * component, both as positional names (Led0) and by color (Green). * * @author Peter A. Bigot */ interface Led { /** Turn the LED on. */ async command void on (); /** Turn the LED off. */ async command void off (); /** Turn the LED on or off, depending on parameter. * @param turn_on if TRUE, turn LED on; otherwise turn LED off */ async command void set (bool turn_on); /** Toggle the LED. */ async command void toggle (); } tinyos-2.1.2+dfsg/tos/interfaces/Leds.nc000066400000000000000000000111071207233610700201220ustar00rootroot00000000000000// $Id: Leds.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2005-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Commands for controlling three LEDs. A platform can provide this * interface if it has more than or fewer than three LEDs. In the * former case, these commands refer to the first three LEDs. In the * latter case, some of the commands are null operations, and the set * of non-null operations must be contiguous and start at Led1. That * is, on platforms with 2 LEDs, LED 3's commands are null operations, * while on platforms with 1 LED, LED 2 and LED 3's commands are null * opertations. * * @author Joe Polastre * @author Philip Levis */ #include "Leds.h" interface Leds { /** * Turn on LED 0. The color of this LED depends on the platform. */ async command void led0On(); /** * Turn off LED 0. The color of this LED depends on the platform. */ async command void led0Off(); /** * Toggle LED 0; if it was off, turn it on, if was on, turn it off. * The color of this LED depends on the platform. */ async command void led0Toggle(); /** * Turn on LED 1. The color of this LED depends on the platform. */ async command void led1On(); /** * Turn off LED 1. The color of this LED depends on the platform. */ async command void led1Off(); /** * Toggle LED 1; if it was off, turn it on, if was on, turn it off. * The color of this LED depends on the platform. */ async command void led1Toggle(); /** * Turn on LED 2. The color of this LED depends on the platform. */ async command void led2On(); /** * Turn off LED 2. The color of this LED depends on the platform. */ async command void led2Off(); /** * Toggle LED 2; if it was off, turn it on, if was on, turn it off. * The color of this LED depends on the platform. */ async command void led2Toggle(); /** * Get the current LED settings as a bitmask. Each bit corresponds to * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression * will determine whether LED 2 is on: * * 

       (call Leds.get() & LEDS_LED2)
      * * This command supports up to 8 LEDs; if a platform has fewer, then * those LEDs should always be off (their bit is zero). Also see * set(). * * @return a bitmask describing which LEDs are on and which are off */ async command uint8_t get(); /** * Set the current LED configuration using a bitmask. Each bit * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example, * this statement will configure the LEDs so LED 0 and LED 2 are on: * * 
       call Leds.set(LEDS_LED0 | LEDS_LED2);
      * * This statement will turn LED 1 on if it was not already: * * 
      call Leds.set(call Leds.get() | LEDS_LED1);
      * * @param val a bitmask describing the on/off settings of the LEDs */ async command void set(uint8_t val); } tinyos-2.1.2+dfsg/tos/interfaces/LibCoAP.nc000066400000000000000000000037141207233610700204510ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include interface LibCoAP { /* * */ command coap_tid_t send(coap_context_t *ctx, struct sockaddr_in6 *dst, coap_pdu_t *pdu, int free_pdu); /* * */ command error_t bind(uint16_t port); /* * */ event void read(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta); } tinyos-2.1.2+dfsg/tos/interfaces/LinkPacketMetadata.nc000066400000000000000000000042101207233610700227160ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This interface provides metadata associated with a link layer packet. * @author Philip Levis */ interface LinkPacketMetadata { /** * Return true if the channel during this packet had high quality (few bit errors). * A good rule of thumb for "high quality" is that the channel quality * would enable MTU packets to have a reception rate of 90% or greater. * * @param 'message_t* ONE msg' A received packet during which the channel was measured. * @return Whether the channel had high quality. */ async command bool highChannelQuality(message_t* msg); } tinyos-2.1.2+dfsg/tos/interfaces/LocalIeeeEui64.nc000066400000000000000000000037021207233610700216740ustar00rootroot00000000000000// $Id: LocalIeeeEui64.nc,v 1.2 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai * Author: Gilman Tolle, Jonathan Hui (TEP 122) */ #include "IeeeEui64.h" /** * Interface to read the 64-bit IEEE EUI. * */ interface LocalIeeeEui64 { /** * Get the 64-bit IEEE EUI. * @returns the 64-bit IEEE EUI type, defined in tos/types/IeeeEui64.h */ command ieee_eui64_t getId(); } tinyos-2.1.2+dfsg/tos/interfaces/LogRead.nc000066400000000000000000000117061207233610700205550ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Read interface for the log storage abstraction described in * TEP103. * * @author Jonathan Hui * @author David Gay * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:29 $ */ #include "Storage.h" interface LogRead { /** * Initiate a read operation from the current position within a given log * volume. On SUCCESS, the readDone event will signal * completion of the operation. * * @param 'void* COUNT(len) buf' buffer to place read data. * @param len number of bytes to read. * @return *
    26. SUCCESS if the request was accepted, *
    27. EBUSY if a request is already being processed. */ command error_t read(void* buf, storage_len_t len); /** * Signals the completion of a read operation. The current read position is * advanced by len bytes. * * @param addr starting address of read. * @param 'void* COUNT(len) buf' buffer where read data was placed. * @param len number of bytes read - this may be less than requested * (even equal to 0) if the end of the log was reached * @param error SUCCESS if read was possible, FAIL otherwise */ event void readDone(void* buf, storage_len_t len, error_t error); /** * Return a "cookie" representing the current read offset within the * log. This cookie can be used in a subsequent seek operation to * return to the same place in the log (if it hasn't been overwritten). * * @return Cookie representing current offset. * SEEK_BEGINNING will be returned if:
        *
      • a write in a circular log overwrote the previous read position *
      • seek was passed a cookie representing a position before the * current beginning of a circular log *
      * Note that SEEK_BEGINNING can also be returned at * other times (just after erasing a log, etc). */ command storage_cookie_t currentOffset(); /** * Set the read position in the log, using a cookie returned by the * currentOffset commands of LogRead or * LogWrite, or the special value SEEK_BEGINNING. * * If the specified position has been overwritten, the read position * will be set to the beginning of the log. * * @return *
    28. SUCCESS if the request was accepted, *
    29. EBUSY if a request is already being processed. */ command error_t seek(storage_cookie_t offset); /** * Report success of seek operation. If SUCCESS is returned, * the read position has been changed as requested. If other values are * returned, the read position is undefined. * * @param error SUCCESS if the seek was succesful, EINVAL if the cookie * was invalid and FAIL for other errors. */ event void seekDone(error_t error); /** * Report approximate log capacity in bytes. Note that use of * sync, failures and general overhead may reduce the number * of bytes available to the log. * * @return Volume size. */ command storage_len_t getSize(); } tinyos-2.1.2+dfsg/tos/interfaces/LogWrite.nc000066400000000000000000000106761207233610700210010ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Write interface for the log storage abstraction described in * TEP103. * * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:29 $ */ #include "Storage.h" interface LogWrite { /** * Append data to a given volume. On SUCCESS, the appendDone * event will signal completion of the operation. * * @param 'void* COUNT(len) buf' buffer to write data from. * @param len number of bytes to write. * @return *
    30. SUCCESS if the request was accepted, *
    31. EINVAL if the request is invalid (len too large). *
    32. EBUSY if a request is already being processed. */ command error_t append(void* buf, storage_len_t len); /** * Signals the completion of an append operation. However, data is not * guaranteed to survive a power-cycle unless a commit operation has * been completed. * * @param 'void* COUNT(len) buf' buffer that written data was read from. * @param len number of bytes actually written (valid even in case of error) * @param records_lost TRUE if this append destroyed some old records from * the beginning of the log (only possible for circular logs). * @param error SUCCESS if append was possible, ESIZE if the (linear) log * is full and FAIL for other errors. */ event void appendDone(void* buf, storage_len_t len, bool recordsLost, error_t error); /** * Return a "cookie" representing the current append offset within the * log. This cookie can be used in a subsequent seek operation (see * LogRead to start reading from this place in the log (if * it hasn't been overwritten). * * The current write position is not known before the first read, append, * seek, erase or sync. * * @return Cookie representing current offset. */ command storage_cookie_t currentOffset(); /** * Initiate an erase operation. On SUCCESS, the * eraseDone event will signal completion of the * operation. * * @return *
    33. SUCCESS if the request was accepted, *
    34. EBUSY if a request is already being processed. */ command error_t erase(); /** * Signals the completion of an erase operation. * * @param error SUCCESS if the log was erased, FAIL otherwise. */ event void eraseDone(error_t error); /** * Ensure all writes are present on flash, and that failure in subsequent * writes cannot cause loss of earlier writes. On SUCCES, the * commitDone event will signal completion of the operation. * * @return *
    35. SUCCESS if the request was accepted, *
    36. EBUSY if a request is already being processed. */ command error_t sync(); /** * Signals the successful or unsuccessful completion of a sync operation. * * @param error SUCCESS if the log was synchronised, FAIL otherwise. */ event void syncDone(error_t error); } tinyos-2.1.2+dfsg/tos/interfaces/LowPowerListening.nc000066400000000000000000000055661207233610700227020ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Low Power Listening interface * * @author Jonathan Hui * @author David Moss */ #include "message.h" interface LowPowerListening { /** * Set this this node's radio wakeup interval, in milliseconds. After * each interval, the node will wakeup and check for radio activity. * * Note: The wakeup interval can be set to 0 to indicate that the radio * should stay on all the time but in order to get a startDone this * should only be done when the duty-cycling is off (after a stopDone). * * @param intervalMs the length of this node's Rx check interval, in [ms] */ command void setLocalWakeupInterval(uint16_t intervalMs); /** * @return the local node's wakeup interval, in [ms] */ command uint16_t getLocalWakeupInterval(); /** * Configure this outgoing message so it can be transmitted to a neighbor mote * with the specified wakeup interval. * @param 'message_t* ONE msg' Pointer to the message that will be sent * @param intervalMs The receiving node's wakeup interval, in [ms] */ command void setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs); /** * @param 'message_t* ONE msg' * @return the destination node's wakeup interval configured in this message */ command uint16_t getRemoteWakeupInterval(message_t *msg); } tinyos-2.1.2+dfsg/tos/interfaces/McuPowerOverride.nc000066400000000000000000000051611207233610700224770ustar00rootroot00000000000000/// $Id: McuPowerOverride.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $ /** * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface to allow high-level components to set a lower bound for a * microcontroller's low power state. This is sometimes necessary, * e.g., if a very low power state has a long wakeup latency that will * violate application timing requirements. TEP 112 describes how * TinyOS incorporates this information when the Scheduler tells * the MCU to enter a low power state. * * @author Philip Levis * @date Oct 26, 2005 * @see TEP 112: Microconroller Power Management */ #include "hardware.h" interface McuPowerOverride { /** * Called when computing the low power state, in order to allow * a high-level component to institute a lower bound. Because * this command originates deep within the basic TinyOS scheduling * mechanisms, it should be used very sparingly. Refer to TEP 112 for * details. * * @return the lowest power state the system can enter to meet the * requirements of this component */ async command mcu_power_t lowestState(); } tinyos-2.1.2+dfsg/tos/interfaces/McuPowerState.nc000066400000000000000000000043161207233610700220010ustar00rootroot00000000000000/// $Id: McuPowerState.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $ /** * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface to instruct TinyOS that the low-power state of the MCU * may have changed. TEP 112 describes how an MCU computes this state * and how the Scheduler uses this interface to manage system power * draw. * * @author Philip Levis * @date Oct 26, 2005 * @see TEP 112: Microcontroller Power Management */ interface McuPowerState { /** * Called by any component to tell TinyOS that the MCU low * power state may have changed. Generally, this should be * called whenever a peripheral/timer is started/stopped. */ async command void update(); } tinyos-2.1.2+dfsg/tos/interfaces/McuSleep.nc000066400000000000000000000071001207233610700207460ustar00rootroot00000000000000/// $Id: McuSleep.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $ /** * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to instruct the MCU to enter a low power state. TEP112 * describes how an MCU computes this state and how the Scheduler uses * this interface to manage system power draw. * * @author Philip Levis * @author Martin Turon * @date Oct 26, 2005 * */ interface McuSleep { /** Called by the scheduler to put the MCU to sleep. */ async command void sleep(); } tinyos-2.1.2+dfsg/tos/interfaces/Mount.nc000066400000000000000000000023051207233610700203350ustar00rootroot00000000000000/* Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Mount a volume. * * @author David Gay * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ interface Mount { /** * Mount a particular volume. This must be done before the volume's * first use. mountDone will be signaled if SUCCESS is * returned. * @return SUCCESS if mount request is accepted, FAIL if mount has * already been attempted. */ command error_t mount(); /** * Report success or failure of mount operation. If the mount failed, * no operation should be perfomed on the volume. Note that success * should not be used to indicate that the volume contains valid data, * rather failure indicates some major internal problem that prevents * the volume from being used. * * @param error SUCCESS if the mount succeeded, FAIL otherwise. */ event void mountDone(error_t error); } tinyos-2.1.2+dfsg/tos/interfaces/MultiLed.nc000066400000000000000000000055371207233610700207640ustar00rootroot00000000000000/* * Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** An interface to control a series of LEDs. * * Allows use of a series of LEDs as a visual binary register. Bit i * of the value is a 1 iff LED i is on. * * This interface is generically implemented by the LedC component. * * @author Peter A. Bigot */ interface MultiLed { /** Read the value represented by the on status of the LEDs. */ async command unsigned int get (); /** Set the LEDs to represent the given value. */ async command void set (unsigned int val); /** Invoke the Led.on() function for the specified LED. * @param led_id Position of LED to turn on, starting with LED 0 */ async command void on (unsigned int led_id); /** Invoke the Led.off() function for the specified LED. * @param led_id Position of LED to turn on, starting with LED 0 */ async command void off (unsigned int led_id); /** Invoke the Led.set() function for the specified LED. * @param led_id Position of LED to turn on, starting with LED 0 * @param turn_on if TRUE, turn LED on; otherwise turn it off */ async command void setSingle (unsigned int led_id, bool turn_on); /** Invoke the Led.toggle() function for the specified LED. * @param led_id Position of LED to turn on, starting with LED 0 */ async command void toggle (unsigned int led_id); } tinyos-2.1.2+dfsg/tos/interfaces/Notify.nc000066400000000000000000000056031207233610700205070ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The Notify interface is intended for delivery of values from * self-triggered devices, at relatively low rates. For example, a * driver for a motion detector or a switch might provide this * interface. The type of the value is given as a template * argument. Generally, these values are backed by memory or * computation. Because no error code is included, both calls must be * guaranteed to succeed. This interface should be used when a single * logical unit supports both getting and setting. * *

      * See TEP114 - SIDs: Source and Sink Independent Drivers for details. * * @param val_t the type of the object that will be stored * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ interface Notify { /** * Enables delivery of notifications from the device to the calling * generic client component. * * @return SUCCESS if notifications were enabled */ command error_t enable(); /** * Disables delivery of notifications from the device to the calling * generic client component. * * @return SUCCESS if notifications were disabled */ command error_t disable(); /** * Signals the arrival of a new value from the device. * * @param val the value arriving from the device */ event void notify( val_t val ); } tinyos-2.1.2+dfsg/tos/interfaces/Packet.nc000066400000000000000000000120541207233610700204440ustar00rootroot00000000000000// $Id: Packet.nc,v 1.9 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The basic message data type accessors. Protocols may use * additional packet interfaces for their protocol specific * data/metadata. * * @author Philip Levis * @date January 5 2005 * @see TEP 116: Packet Protocols */ #include interface Packet { /** * Clear out this packet. Note that this is a deep operation and * total operation: calling clear() on any layer will completely * clear the packet for reuse. * @param 'message_t* ONE msg' the packet to clear */ command void clear(message_t* msg); /** * Return the length of the payload of msg. This value may be less * than what maxPayloadLength() returns, if the packet is smaller than * the MTU. If a communication component does not support variably * sized data regions, then payloadLength() will always return * the same value as maxPayloadLength(). * * @param 'message_t* ONE msg' the packet to examine * @return the length of its current payload */ command uint8_t payloadLength(message_t* msg); /** * Set the length field of the packet. This value is not checked * for validity (e.g., if it is larger than the maximum payload * size). This command is not used when sending packets, as calls * to send include a length parameter. Rather, it is used by * components, such as queues, that need to buffer requests to * send. This command allows the component to store the length * specified in the request and later recover it when actually * sending. * * @param 'message_t* ONE msg' the packet * @param len the value to set its length field to */ command void setPayloadLength(message_t* msg, uint8_t len); /** * Return the maximum payload length that this communication layer * can provide. Note that, depending on protocol fields, a given * request to send a packet may not be able to send the maximum * payload length (e.g., if there are variable length * fields). Protocols may provide specialized interfaces for these * circumstances. * * @return the maximum size payload allowed by this layer */ command uint8_t maxPayloadLength(); /** * Return a pointer to a protocol's payload region in a packet. * If the caller intends to write to the payload region then * the len parameter must reflect the maximum required * length. If the caller (only) wants to read from the payload * region, then len may be set to the value of * payloadLength(). If the payload region is smaller than * len this command returns NULL. The offset where * the payload region starts within a packet is fixed, i.e. for * a given msg this command will always return the same * pointer or NULL. * * @param 'message_t* ONE msg' the packet * @param len the length of payload required * @return 'void* COUNT_NOK(len)' a pointer to the packet's data payload for this layer * or NULL if len is too big */ command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/interfaces/PacketAcknowledgements.nc000066400000000000000000000065331207233610700236640ustar00rootroot00000000000000/* * Copyright (c) 2000-2006 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * This interface allows a component to enable or disable acknowledgments * on a per-packet basis. * * @author Jonathan Hui * @author Philip Levis * @author Joe Polastre * @date June 21 2006 */ interface PacketAcknowledgements { /** * Tell a protocol that when it sends this packet, it should use synchronous * acknowledgments. * The acknowledgment is synchronous as the caller can check whether the * ack was received through the wasAcked() command as soon as a send operation * completes. * * @param 'message_t* ONE msg' - A message which should be acknowledged when transmitted. * @return SUCCESS if acknowledgements are enabled, EBUSY * if the communication layer cannot enable them at this time, FAIL * if it does not support them. */ async command error_t requestAck( message_t* msg ); /** * Tell a protocol that when it sends this packet, it should not use * synchronous acknowledgments. * * @param 'message_t* ONE msg' - A message which should not be acknowledged when transmitted. * @return SUCCESS if acknowledgements are disabled, EBUSY * if the communication layer cannot disable them at this time, FAIL * if it cannot support unacknowledged communication. */ async command error_t noAck( message_t* msg ); /** * Tell a caller whether or not a transmitted packet was acknowledged. * If acknowledgments on the packet had been disabled through noAck(), * then the return value is undefined. If a packet * layer does not support acknowledgements, this command must return always * return FALSE. * * @param 'message_t* ONE msg' - A transmitted message. * @return Whether the packet was acknowledged. * */ async command bool wasAcked(message_t* msg); } tinyos-2.1.2+dfsg/tos/interfaces/PacketLink.nc000066400000000000000000000051321207233610700212610ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author David Moss * @author Jon Wyant */ interface PacketLink { /** * Set the maximum number of times attempt message delivery * Default is 0 * @param 'message_t* ONE msg' * @param maxRetries the maximum number of attempts to deliver * the message */ command void setRetries(message_t *msg, uint16_t maxRetries); /** * Set a delay between each retry attempt * @param msg * @param retryDelay the delay betweeen retry attempts, in milliseconds */ command void setRetryDelay(message_t *msg, uint16_t retryDelay); /** * @param 'message_t* ONE msg' * @return the maximum number of retry attempts for this message */ command uint16_t getRetries(message_t *msg); /** * @param 'message_t* ONE msg' * @return the delay between retry attempts in ms for this message */ command uint16_t getRetryDelay(message_t *msg); /** * @param 'message_t* ONE msg' * @return TRUE if the message was delivered. */ command bool wasDelivered(message_t *msg); } tinyos-2.1.2+dfsg/tos/interfaces/PacketTimeStamp.nc000066400000000000000000000064521207233610700222750ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface PacketTimeStamp { /** * @param 'message_t *ONE msg' Message to examine. * * Returns TRUE if the time stamp of the message is valid. Under special * circumstances the radio chip might not be able to correctly assign a * precise time value to an incoming packet (e.g. under very heavy traffic * multiple interrupts can occur before they could be serviced, and even * if capture registers are used, it is not possible to get the time stamp * for the first or last unserviced event), in which case the time stamp * value should not be used. It is recommended that the isValid command be * called from the receive or sendDone event handler. */ async command bool isValid(message_t* msg); /** * @param 'message_t *ONE msg' Message to get timestamp from. * * Return the time stamp for the given message. Please check with the * isValid command if this value can be relied upon. If this command is * called after transmission, then the transmit time of the packet * is returned (the time when the frame synchronization byte was * transmitted). If this command is called after the message is received, * the tne receive time of the message is returned. It is recommended that * the timestamp command be called only from the receive or sendDone event * handler. */ async command size_type timestamp(message_t* msg); /** * @param 'message_t *ONE msg' Message to modify. * * Sets the isValid flag to FALSE. */ async command void clear(message_t* msg); /** * @param 'message_t *ONE msg' Message to modify. * * Sets the isValid flag to TRUE and the time stamp value to the * specified value. */ async command void set(message_t* msg, size_type value); } tinyos-2.1.2+dfsg/tos/interfaces/ParameterInit.nc000066400000000000000000000052541207233610700220050ustar00rootroot00000000000000// $Id: ParameterInit.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * A synchronous initialization interface that takes a single parameter. * * @author Philip Levis * @date June 6 2005 * @see TEP 107: Boot Sequence */ #include "TinyError.h" interface ParameterInit { /** * Initialize this component. Initialization should not assume that * any component is running: init() cannot call any commands besides * those that initialize other components. This command behaves * identically to Init.init, except that it takes a parameter. * * @param param the initialization parameter * @return SUCCESS if initialized properly, FAIL otherwise. */ command error_t init(parameter param); } tinyos-2.1.2+dfsg/tos/interfaces/Pool.nc000066400000000000000000000066731207233610700201600ustar00rootroot00000000000000/* $Id: Pool.nc,v 1.5 2008-06-04 03:00:31 regehr Exp $ */ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An allocation pool of a specific type memory objects. * The Pool allows components to allocate (get) * and deallocate (put) elements. The pool * does not require that deallocations be items which were * originally allocated. E.g., a program can create two * pools of the same type and pass items between them. * This allows, for example, a component to allocate a pool * of message buffers and freely buffer swap them on * Receive.receive events. * * @author Philip Levis * @author Kyle Jamieson * @date $Date: 2008-06-04 03:00:31 $ */ interface Pool { /** * Returns whether there any elements remaining in the pool. * If empty returns TRUE, then get will return * NULL. If empty returns FALSE, then get will * return a pointer to an object. * * @return Whether the pool is empty. */ command bool empty(); /** * Returns how many elements are in the pool. If size * returns 0, empty() will return TRUE. If size returns * a non-zero value, empty() will return FALSE. The * return value of size is always <e; the return * value of maxSize(). * * @return How many elements are in the pool. */ command uint8_t size(); /** * Returns the maximum number of elements in the pool * (the size of a full pool). * * @return Maximum size. */ command uint8_t maxSize(); /** * Deallocate an object, putting it back into the pool. * * @param 't* ONE newVal' * @return SUCCESS if the entry was put in successfully, FAIL * if the pool is full. */ command error_t put(t* newVal); /** * Allocate an element from the pool. * * @return 't* ONE_NOK' A pointer if the pool is not empty, NULL if * the pool is empty. */ command t* get(); } tinyos-2.1.2+dfsg/tos/interfaces/Queue.nc000066400000000000000000000064771207233610700203350ustar00rootroot00000000000000/* $Id: Queue.nc,v 1.5 2008-06-04 03:00:31 regehr Exp $ */ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to a FIFO list (queue) that contains items * of a specific type. The queue has a maximum size. * * @author Philip Levis * @author Kyle Jamieson * @date $Date: 2008-06-04 03:00:31 $ */ interface Queue { /** * Returns if the queue is empty. * * @return Whether the queue is empty. */ command bool empty(); /** * The number of elements currently in the queue. * Always less than or equal to maxSize(). * * @return The number of elements in the queue. */ command uint8_t size(); /** * The maximum number of elements the queue can hold. * * @return The maximum queue size. */ command uint8_t maxSize(); /** * Get the head of the queue without removing it. If the queue * is empty, the return value is undefined. * * @return 't ONE' The head of the queue. */ command t head(); /** * Remove the head of the queue. If the queue is empty, the return * value is undefined. * * @return 't ONE' The head of the queue. */ command t dequeue(); /** * Enqueue an element to the tail of the queue. * * @param 't ONE newVal' - the element to enqueue * @return SUCCESS if the element was enqueued successfully, FAIL * if it was not enqueued. */ command error_t enqueue(t newVal); /** * Return the nth element of the queue without dequeueing it, * where 0 is the head of the queue and (size - 1) is the tail. * If the element requested is larger than the current queue size, * the return value is undefined. * * @param index - the index of the element to return * @return 't ONE' the requested element in the queue. */ command t element(uint8_t idx); } tinyos-2.1.2+dfsg/tos/interfaces/README000066400000000000000000000000161207233610700175660ustar00rootroot00000000000000Update this. tinyos-2.1.2+dfsg/tos/interfaces/RadioTimeStamping.nc000066400000000000000000000051131207233610700226130ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface for receiving time stamp information from the radio. * This information is also embedded in packet metadata. * * @author Jonathan Hui * @author Philip Levis * @author Joe Polastre * @date October 10 2005 * */ interface RadioTimeStamping { /** * Provides the time at which start of frame delimiter has been * transmitted: units are in terms of a 32kHz clock. * @param 'message_t* ONE p_msg' */ async event void transmittedSFD( uint16_t time, message_t* p_msg ); /** * Provides the time at which start of frame delimiter was received: * units are in terms of a 32kHz clock. NOTE that receiving * a receivedSFD() event does NOT mean that a packet will be * received; the transmission may stop, become corrupted, or be * filtered by the physical or link layers. The number of rxSFD * events will always be great than or equal to the number of * Receive message events. */ async event void receivedSFD( uint16_t time ); } tinyos-2.1.2+dfsg/tos/interfaces/Random.nc000066400000000000000000000040751207233610700204610ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface for generating 16-bit and 32-bit random numbers. * * @author Barbara Hohlt * @date March 1 2005 */ interface Random { /** * Produces a 32-bit pseudorandom number. * @return Returns the 32-bit pseudorandom number. */ async command uint32_t rand32(); /** * Produces a 32-bit pseudorandom number. * @return Returns low 16 bits of the pseudorandom number. */ async command uint16_t rand16(); } tinyos-2.1.2+dfsg/tos/interfaces/Read.nc000066400000000000000000000047351207233610700201170ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The Read interface is intended for split-phase low-rate or * high-latency reading of small values. The type of the value is * given as a template argument. Because this interface is * split-phase, these values may be backed by hardware, or a * long-running computation. * *

      * See TEP114 - SIDs: Source and Sink Independent Drivers for details. * * @param val_t the type of the object that will be returned * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $ */ interface Read { /** * Initiates a read of the value. * * @return SUCCESS if a readDone() event will eventually come back. */ command error_t read(); /** * Signals the completion of the read(). * * @param result SUCCESS if the read() was successful * @param val the value that has been read */ event void readDone( error_t result, val_t val ); } tinyos-2.1.2+dfsg/tos/interfaces/ReadNow.nc000066400000000000000000000053201207233610700205720ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The ReadNow interface is intended for split-phase low-latency * reading of small values. The type of the value is given as a * template argument. Because this interface is split-phase, these * values may be backed by hardware. Providers of this interface * should also provide a Resource interface, and this interface should * only be used after the resource has been acquired. Otherwise, the * low-latency requirement may be impossible to meet. * *

      * This interface has the same calling semantics as the Read interface * described in TEP 114, except that it is async. * * @param val_t the type of the object that will be returned * * @author Gilman Tolle * @version $Revision: 1.5 $ $Date: 2008-06-16 18:58:51 $ */ interface ReadNow { /** * Initiates a read of the value. * * @return SUCCESS if a readDone() event will eventually come back. */ async command error_t read(); /** * Signals the completion of the read(). * * @param result SUCCESS if the read() was successful * @param val the value that has been read */ async event void readDone( error_t result, val_t val ); } tinyos-2.1.2+dfsg/tos/interfaces/ReadRef.nc000066400000000000000000000054521207233610700205510ustar00rootroot00000000000000/** * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The ReadRef interface is intended for split-phase low-rate or * high-latency reading of large values. The type of the value is * given as a template argument. When a value is too large to be * comfortably passed on the stack, the caller should allocate space * for the value and pass the pointer to read(). When the readDone() * comes back, the space will be filled with the new value. * *

      * See TEP114 - SIDs: Source and Sink Independent Drivers for details. * * @param val_t the type of the object that will be returned * * @author Gilman Tolle * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:31 $ */ interface ReadRef { /** * Initiates a read of the value. * * @param 'val_t* ONE val' a pointer to space that will be filled by the value * * @return SUCCESS if a readDone() event will eventually come back. */ command error_t read( val_t* val ); /** * Signals the completion of the read(). The returned pointer will * be the same as the original pointer passed to read(). * * @param result SUCCESS if the read() was successful * @param 'val_t* ONE val' a pointer to the value that has been read */ event void readDone( error_t result, val_t* val ); } tinyos-2.1.2+dfsg/tos/interfaces/ReadResource.nc000066400000000000000000000034151207233610700216210ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ interface ReadResource { command int get(coap_tid_t id); event void getDone(error_t result, coap_tid_t id, uint8_t asyn_message, uint8_t* val, size_t buflen); event void getDoneDeferred(coap_tid_t id); } tinyos-2.1.2+dfsg/tos/interfaces/ReadStream.nc000066400000000000000000000105061207233610700212640ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The ReadStream interface is intended for buffered high data rate * reading, usually from sensor devices. The type of the values being * read is given as a template argument. * *

      To use this interface, allocate one or more buffers in your own * space. Then, call postBuffer to pass these buffers into the * device. Call read() to begin the sampling process. The buffers will * be filled in the order originally posted, and a bufferDone() event * will be signaled once each buffer has been filled with data. At any * time while the read() is running, you may post new buffers to be * filled. If the lower layer finishes signaling readDone() and then * finds that no more buffers have been posted, it will consider the * read to be finished, and signal readDone(). * *

      * See TEP114 - SIDs: Source and Sink Independent Drivers for details. * * @param val_t the type of the object that will be returned * * @author Gilman Tolle * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:31 $ */ interface ReadStream { /** * Passes a buffer to the device, and indicates how many values * should be placed into the buffer. Make sure your count doesn't * overrun the buffer. * * @param 'val_t* COUNT(count) buf' a pointer to the buffer * @param count the number of values the buffer should hold * * @return SUCCESS if the post was successful */ command error_t postBuffer(val_t* buf, uint16_t count); /** * Directs the device to start filling buffers by sampling with the * specified period. * * @param usPeriod the between-sample period in microseconds * * @return SUCCESS if the reading process began */ command error_t read(uint32_t usPeriod); /** * Signalled when a previously posted buffer has been filled by the * device. In the event of a read error, result will not equal * SUCCESS, and the buffer will be filled with zeroes. * * @param result SUCCESS if the buffer was filled without errors * @param 'val_t* COUNT(count) buf' a pointer to the buffer that has been filled * @param count the number of values actually read */ event void bufferDone(error_t result, val_t* buf, uint16_t count); /** * Signalled when a buffer has been filled but no more buffers have * been posted. In the event of a read error, all previously posted * buffers will have their bufferDone() event signalled, and then * this event will be signalled with a non-SUCCESS argument. * * @param result SUCCESS if all buffers were filled without errors * @param usActualPeriod Actual sampling period used - may be different * from period requested at read time. Undefined if result != SUCCESS. */ event void readDone(error_t result, uint32_t usActualPeriod); } tinyos-2.1.2+dfsg/tos/interfaces/Receive.nc000066400000000000000000000064341207233610700206240ustar00rootroot00000000000000// $Id: Receive.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The basic message reception interface. * * @author Philip Levis * @date November 16, 2004 * @see Packet * @see Send * @see TEP 116: Packet Protocols */ #include #include interface Receive { /** * Receive a packet buffer, returning a buffer for the signaling * component to use for the next reception. The return value * can be the same as msg, as long as the handling * component copies out the data it needs. * * Note that misuse of this interface is one of the most * common bugs in TinyOS code. For example, if a component both calls a * send on the passed message and returns it, then it is possible * the buffer will be reused before the send occurs, overwriting * the component's data. This would cause the mote to possibly * instead send a packet it most recently received. * * @param 'message_t* ONE msg' the receied packet * @param 'void* COUNT(len) payload' a pointer to the packet's payload * @param len the length of the data region pointed to by payload * @return 'message_t* ONE' a packet buffer for the stack to use for the next * received packet. */ event message_t* receive(message_t* msg, void* payload, uint8_t len); } tinyos-2.1.2+dfsg/tos/interfaces/Resource.nc000066400000000000000000000125651207233610700210330ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Please refer to TEP 108 for more information about this interface and its * intended use.

      * * The Resource interface can be used to gain access to * shared resources. It is always offered as a parameterized * interface, and its users gain access to the resource through some * predefined arbitration policy. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.6 $ * @date $Date: 2010-06-29 22:07:46 $ */ interface Resource { /** * Request access to a shared resource. You must call release() * when you are done with it. * * @return SUCCESS When a request has been accepted. The granted() * event will be signaled once you have control of the * resource.
      * EBUSY You have already requested this resource and a * granted event is pending */ async command error_t request(); /** * Request immediate access to a shared resource. You must call release() * when you are done with it. * * @return SUCCESS When a request has been accepted.
      * FAIL The request cannot be fulfilled */ async command error_t immediateRequest(); /** * You are now in control of the resource. */ event void granted(); /** * Release a shared resource you previously acquired. * * @return SUCCESS The resource has been released
      * FAIL You tried to release but you are not the * owner of the resource * * @note This command should never be called between putting in a request * and waiting for a granted event. Doing so will result in a * potential race condition. There are ways to guarantee that no * race will occur, but they are clumsy and overly complicated. * Since it doesn't logically make since to be calling * release before receiving a granted event, * we have opted to keep thing simple and warn you about the potential * race. */ async command error_t release(); /** * Check if the user of this interface is the current * owner of the Resource * @return TRUE It is the owner
      * FALSE It is not the owner */ async command bool isOwner(); } tinyos-2.1.2+dfsg/tos/interfaces/ResourceConfigure.nc000066400000000000000000000052311207233610700226650ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:46 $ * ======================================================================== * */ /** * Please refer to TEP 108 for more information about this interface and its * intended use.

      * * This interface is provided by a Resource arbiter in order to allow * users of a shared resource to configure that resource just before being * granted access to it. It will always be parameterized along side * a parameterized Resource interface, with the ids from one mapping directly * onto the ids of the other. * * @author Kevin Klues (klueska@cs.wustl.edu) */ interface ResourceConfigure { /** * Used to configure a resource just before being granted access to it. * Must always be used in conjuntion with the Resource interface. */ async command void configure(); /** * Used to unconfigure a resource just before releasing it. * Must always be used in conjuntion with the Resource interface. */ async command void unconfigure(); } tinyos-2.1.2+dfsg/tos/interfaces/ResourceDefaultOwner.nc000066400000000000000000000062361207233610700233510ustar00rootroot00000000000000/* * Copyright (c) 2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Please refer to TEP 108 for more information about this interface and its * intended use.

      * * @author Kevin Klues (klues@tkn.tu-berlin.edu) * @version $ $ * @date $Date: 2007-02-04 20:06:42 $ */ interface ResourceDefaultOwner { /** * Event sent to the resource controller giving it control whenever a resource * goes idle. That is to say, whenever no one currently owns the resource, * and there are no more pending requests */ async event void granted(); /** * Release control of the resource * * @return SUCCESS The resource has been released and pending requests * can resume.
      * FAIL You tried to release but you are not the * owner of the resource */ async command error_t release(); /** * Check if the user of this interface is the current * owner of the Resource * * @return TRUE It is the owner
      * FALSE It is not the owner */ async command bool isOwner(); /** * This event is signalled whenever the user of this interface * currently has control of the resource, and another user requests * it through the Resource.request() command. You may want to * consider releasing a resource based on this event */ async event void requested(); /** * This event is signalled whenever the user of this interface * currently has control of the resource, and another user requests * it through the Resource.immediateRequest() command. You may * want to consider releasing a resource based on this event */ async event void immediateRequested(); } tinyos-2.1.2+dfsg/tos/interfaces/ResourceQueue.nc000066400000000000000000000056631207233610700220410ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * A queue interface for managing client ids when performing resource * arbitration. A single slot in the queue is guaranteed to each resource * client, with the actual queing policy determined by the implementation * of the interface. * * @author Kevin Klues * @date $Date: 2010-06-29 22:07:46 $ */ #include "Resource.h" interface ResourceQueue { /** * Check to see if the queue is empty. * * @return TRUE if the queue is empty.
      * FALSE if there is at least one entry in the queue */ async command bool isEmpty(); /** * Check to see if a given client id has already been enqueued * and is waiting to be processed. * * @return TRUE if the client id is in the queue.
      * FALSE if it does not */ async command bool isEnqueued(resource_client_id_t id); /** * Retreive the client id of the next resource in the queue. * If the queue is empty, the return value is undefined. * * @return The client id at the head of the queue. */ async command resource_client_id_t dequeue(); /** * Enqueue a client id * * @param clientId - the client id to enqueue * @return SUCCESS if the client id was enqueued successfully
      * EBUSY if it has already been enqueued. */ async command error_t enqueue(resource_client_id_t id); } tinyos-2.1.2+dfsg/tos/interfaces/ResourceRequested.nc000066400000000000000000000051121207233610700227030ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Please refer to TEP 108 for more information about this interface and its * intended use.

      * * The ResourceRequested interface can be used in conjunction with the * Resource interface in order to receive events based on other users * requests. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.5 $ * @date $Date: 2010-06-29 22:07:46 $ */ interface ResourceRequested { /** * This event is signalled whenever the user of this interface * currently has control of the resource, and another user requests * it through the Resource.request() command. You may want to * consider releasing a resource based on this event */ async event void requested(); /** * This event is signalled whenever the user of this interface * currently has control of the resource, and another user requests * it through the Resource.immediateRequest() command. You may * want to consider releasing a resource based on this event */ async event void immediateRequested(); } tinyos-2.1.2+dfsg/tos/interfaces/Scheduler.nc000066400000000000000000000053611207233610700211560ustar00rootroot00000000000000// $Id: Scheduler.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The interface to a TinyOS task scheduler. * * @author Philip Levis * @date January 19 2005 * @see TEP 106: Tasks and Schedulers * @see TEP 107: Boot Sequence */ interface Scheduler { /** * Initialize the scheduler. */ command void init(); /** * Run the next task if one is waiting, otherwise return immediately. * * @return whether a task was run -- TRUE indicates a task * ran, FALSE indicates there was no task to run. */ command bool runNextTask(); /** * Enter an infinite task-running loop. Put the MCU into a low power * state when the processor is idle (task queue empty, waiting for * interrupts). This call never returns. */ command void taskLoop(); } tinyos-2.1.2+dfsg/tos/interfaces/Send.nc000066400000000000000000000122251207233610700201260ustar00rootroot00000000000000// $Id: Send.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The basic address-free message sending interface. * * @author Philip Levis * @date January 5 2005 * @see Packet * @see Receive */ #include #include interface Send { /** * Send a packet with a data payload of len. To determine * the maximum available size, use the Packet interface of the * component providing Send. If send returns SUCCESS, then the * component will signal the sendDone event in the future; if send * returns an error, it will not signal sendDone. Note that a * component may accept a send request which it later finds it * cannot satisfy; in this case, it will signal sendDone with an * appropriate error code. * * @param 'message_t* ONE msg' the packet to send * @param len the length of the packet payload * @return SUCCESS if the request was accepted and will issue * a sendDone event, EBUSY if the component cannot accept * the request now but will be able to later, FAIL * if the stack is in a state that cannot accept requests * (e.g., it's off). */ command error_t send(message_t* msg, uint8_t len); /** * Cancel a requested transmission. Returns SUCCESS if the * transmission was cancelled properly (not sent in its * entirety). Note that the component may not know * if the send was successfully cancelled, if the radio is * handling much of the logic; in this case, a component * should be conservative and return an appropriate error code. * * @param 'message_t* ONE msg' the packet whose transmission should be cancelled * @return SUCCESS if the packet was successfully cancelled, FAIL * otherwise */ command error_t cancel(message_t* msg); /** * Signaled in response to an accepted send request. msg * is the sent buffer, and error indicates whether the * send was succesful, and if not, the cause of the failure. * * @param 'message_t* ONE msg' the message which was requested to send * @param error SUCCESS if it was transmitted successfully, FAIL if * it was not, ECANCEL if it was cancelled via cancel */ event void sendDone(message_t* msg, error_t error); /** * Return the maximum payload length that this communication layer * can provide. This command behaves identically to * Packet.maxPayloadLength and is included in this * interface as a convenience. * * @return the maximum payload length */ command uint8_t maxPayloadLength(); /** * Return a pointer to a protocol's payload region in a packet which * at least a certain length. If the payload region is smaller than * the len parameter, then getPayload returns NULL. This command * behaves identicallt to Packet.getPayload and is * included in this interface as a convenience. * * @param 'message_t* ONE msg' the packet * @return 'void* COUNT_NOK(len)' a pointer to the packet's payload */ command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/interfaces/SendNotifier.nc000066400000000000000000000047201207233610700216270ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * The radio stack notifies the entire system that it is about to send * a packet. Other modules in the system can call back within this event * to modify the packet's metadata. For example, we can setup a module * in the system to make every CTP data packet send with low power listening * enabled: * * event void SendNotifier.aboutToSend[AM_COLLECTION_DATA](uint8_t dest, * message_t *msg) { * call LowPowerListening.setRxSleepInterval(msg, 512); * } * * @author David Moss */ #include "message.h" #include "AM.h" interface SendNotifier { /** * The system is about to send this message. Fill in any last modifications * and the message will be sent. * * @param dest The destination address of the messsage * @param 'message_t* ONE msg' The message about to be transmitted */ event void aboutToSend(am_addr_t dest, message_t *msg); } tinyos-2.1.2+dfsg/tos/interfaces/Set.nc000066400000000000000000000043601207233610700177710ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The Set interface is intended for synchronous writing of small * values. The type of the value is given as a template * argument. Generally, these values are backed by memory or * computation. Because no error code is included, the set() call must * be guaranteed to succeed. * *

      * See TEP114 - SIDs: Source and Sink Independent Drivers for details. * * @param val_t the type of the object that will be stored * * @author Gilman Tolle * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:15 $ */ interface Set { /** * Stores a value of type val_t. * * @param val the value to be stored */ command void set( val_t val ); } tinyos-2.1.2+dfsg/tos/interfaces/SetNow.nc000066400000000000000000000045231207233610700204560ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-10 14:41:42 $ * @author Jan Hauer * ======================================================================== */ /** * Similar to the Set interface (see TEP 114) this interface can be * used for storing small values, but in contrast to the Set interface * the value is stored asynchronously. * * @param data_type the type of the object that will be stored */ interface SetNow { /** * Stores a value of type data_type. * * @param val the value to be stored * @return SUCCESS if the value was stored, * FAIL otherwise */ async command error_t setNow(data_type val); } tinyos-2.1.2+dfsg/tos/interfaces/SpiByte.nc000066400000000000000000000037551207233610700206240ustar00rootroot00000000000000// $Id: SpiByte.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui * @author Joe Polastre */ interface SpiByte { /** * Synchronous transmit and receive (can be in interrupt context) * @param tx Byte to transmit * @param rx Received byte is stored here. */ async command uint8_t write( uint8_t tx ); } tinyos-2.1.2+dfsg/tos/interfaces/SpiPacket.nc000066400000000000000000000075141207233610700211250ustar00rootroot00000000000000// $Id: SpiPacket.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SPI Packet/buffer interface for sending data over an SPI bus. This * interface provides a split-phase send command which can be used for * sending, receiving or both. It is a "send" command because reading * from the SPI requires writing bytes. The send call allows NULL * parameters for receive or send only operations. This interface is * for buffer based transfers where the microcontroller is the master * (clocking) device. * * Often, an SPI bus must first be acquired using a Resource interface * before sending commands with SPIPacket. In the case of multiple * devices attached to a single SPI bus, chip select pins are often also * used. * * @author Philip Levis * @author Jonathan Hui * @author Joe Polastre * Revision: $Revision: 1.8 $ */ interface SpiPacket { /** * Send a message over the SPI bus. * * @param 'uint8_t* COUNT_NOK(len) txBuf' A pointer to the buffer to send over the bus. If this * parameter is NULL, then the SPI will send zeroes. * @param 'uint8_t* COUNT_NOK(len) rxBuf' A pointer to the buffer where received data should * be stored. If this parameter is NULL, then the SPI will * discard incoming bytes. * @param len Length of the message. Note that non-NULL rxBuf and txBuf * parameters must be AT LEAST as large as len, or the SPI * will overflow a buffer. * * @return SUCCESS if the request was accepted for transfer */ async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len ); /** * Notification that the send command has completed. * * @param 'uint8_t* COUNT_NOK(len) txBuf' The buffer used for transmission * @param 'uint8_t* COUNT_NOK(len) rxBuf' The buffer used for reception * @param len The request length of the transfer, but not necessarily * the number of bytes that were actually transferred * @param error SUCCESS if the operation completed successfully, FAIL * otherwise */ async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error ); } tinyos-2.1.2+dfsg/tos/interfaces/SplitControl.nc000066400000000000000000000137671207233610700217050ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:46 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this interface and its * intended use.

      * * This is the split-phase counterpart to the StdContol interface. It * should be used for switching between the on and off power states of * the component providing it. For each start() or * stop() command, if the command returns SUCCESS, then a * corresponding startDone() or stopDone() event * must be signalled. * * @author Joe Polastre * @author Kevin Klues (klueska@cs.wustl.edu) */ interface SplitControl { /** * Start this component and all of its subcomponents. Return * values of SUCCESS will always result in a startDone() * event being signalled. * * @return SUCCESS if the device is already in the process of * starting or the device was off and the device is now ready to turn * on. After receiving this return value, you should expect a * startDone event in the near future.
      * EBUSY if the component is in the middle of powering down * i.e. a stop() command has been called, * and a stopDone() event is pending
      * EALREADY if the device is already on
      * FAIL Otherwise */ command error_t start(); /** * Notify caller that the component has been started and is ready to * receive other commands. * * @param error -- SUCCESS if the component was successfully * turned on, FAIL otherwise */ event void startDone(error_t error); /** * Start this component and all of its subcomponents. Return * values of SUCCESS will always result in a startDone() * event being signalled. * * @return SUCCESS if the device is already in the process of * stopping or the device was on and the device is now ready to turn * off. After receiving this return value, you should expect a * stopDone event in the near future.
      * EBUSY if the component is in the middle of powering up * i.e. a start() command has been called, * and a startDone() event is pending
      * EALREADY if the device is already off
      * FAIL Otherwise */ command error_t stop(); /** * Notify caller that the component has been stopped. * * @param error -- SUCCESS if the component was successfully * turned off, FAIL otherwise */ event void stopDone(error_t error); } tinyos-2.1.2+dfsg/tos/interfaces/State.nc000066400000000000000000000046601207233610700203210ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * State machine interface * @author David Moss - dmm@rincon.com */ interface State { /** * This will allow a state change so long as the current * state is S_IDLE. * @return SUCCESS if the state is change, FAIL if it isn't */ async command error_t requestState(uint8_t reqState); /** * Force the state machine to go into a certain state, * regardless of the current state it's in. */ async command void forceState(uint8_t reqState); /** * Set the current state back to S_IDLE */ async command void toIdle(); /** * @return TRUE if the state machine is in S_IDLE */ async command bool isIdle(); /** * @return TRUE if the state machine is in the given state */ async command bool isState(uint8_t myState); /** * Get the current state */ async command uint8_t getState(); } tinyos-2.1.2+dfsg/tos/interfaces/StdControl.nc000066400000000000000000000106461207233610700213350ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:46 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this interface and its * intended use.

      * * This interface is used to switch between * the on and off power states of the component providing it. A call to the * start() command is a request to switch a component into the * on state, and a call to the stop() is a request to switch a * component into the off state. * * @author Joe Polastre * @author Kevin Klues (klueska@cs.wustl.edu) */ interface StdControl { /** * Start this component and all of its subcomponents. * * @return SUCCESS if the component was either already on or was * successfully turned on
      * FAIL otherwise */ command error_t start(); /** * Stop the component and any pertinent subcomponents (not all * subcomponents may be turned off due to wakeup timers, etc.). * * @return SUCCESS if the component was either already off or was * successfully turned off
      * FAIL otherwise */ command error_t stop(); } tinyos-2.1.2+dfsg/tos/interfaces/SystemLowPowerListening.nc000066400000000000000000000004051207233610700240720ustar00rootroot00000000000000interface SystemLowPowerListening { command void setDefaultRemoteWakeupInterval(uint16_t intervalMs); command void setDelayAfterReceive(uint16_t intervalMs); command uint16_t getDefaultRemoteWakeupInterval(); command uint16_t getDelayAfterReceive(); } tinyos-2.1.2+dfsg/tos/interfaces/TaskBasic.nc000066400000000000000000000057741207233610700211140ustar00rootroot00000000000000// $Id: TaskBasic.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $ /* * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The basic TinyOS task interface. Components generally do not wire to * this interface: the nesC compiler handles it automatically through the * post and task keywords. * * @author Philip Levis * @date January 12, 2005 * @see TEP 106: Tasks and Schedulers */ #include "TinyError.h" interface TaskBasic { /** * Post this task to the TinyOS scheduler. At some later time, * depending on the scheduling policy, the scheduler will signal the * run() event. * * @return SUCCESS if task was successfuly * posted; the semantics of a non-SUCCESS return value depend on the * implementation of this interface (the class of task). */ async command error_t postTask(); /** * Event from the scheduler to run this task. Following the TinyOS * concurrency model, the codes invoked from run() signals * execute atomically with respect to one another, but can be * preempted by async commands/events. */ event void runTask(); } tinyos-2.1.2+dfsg/tos/interfaces/TimeSyncAMSend.nc000066400000000000000000000110501207233610700220130ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philip Levis * @author Miklos Maroti * * @see TimeSyncPacket */ #include #include #include interface TimeSyncAMSend { /** * This command sends a regular message just like AMSend.send, but * it also performs sender-receiver time synchronization. The event_time * parameter holds the time of some event as expressed in the local clock of * the sender. The receiver can obtain the time of this event (expressed in its * own local time) via the TimeSyncPacket interface. * * @param addr address to which to send the packet * @param msg the packet * @param len the length of the data in the packet payload * @param event_time the synchronization point to be transfered with the message * @return SUCCESS if the request to send succeeded and a * sendDone will be signaled later, EBUSY if the * abstraction cannot send now but will be able to * later, or FAIL if the communication layer is not * in a state that can send (e.g., off). * @see sendDone */ command error_t send(am_addr_t addr, message_t* msg, uint8_t len, size_type event_time); /** * Cancel a requested transmission. Returns SUCCESS if the * transmission was canceled properly (not sent in its * entirety). Note that the component may not know * if the send was successfully canceled, if the radio is * handling much of the logic; in this case, a component * should be conservative and return an appropriate error code. * A successful call to cancel must always result in a * sendFailed event, and never a sendSucceeded event. * * @param msg the packet whose transmission should be cancelled. * @return SUCCESS if the transmission was cancelled, FAIL otherwise. * @see sendDone */ command error_t cancel(message_t* msg); /** * Signaled in response to an accepted send request. msg is * the message buffer sent, and error indicates whether * the send was successful. * * @param msg the packet which was submitted as a send request * @param error SUCCESS if it was sent successfully, FAIL if it was not, * ECANCEL if it was cancelled * @see send * @see cancel */ event void sendDone(message_t* msg, error_t error); /** * Return the maximum payload length that this communication layer * can provide. This command behaves identically to * Packet.maxPayloadLength and is included in this * interface as a convenience. * * @return the maximum payload length */ command uint8_t maxPayloadLength(); /** * Return a pointer to a protocol's payload region in a packet. * This command behaves identically to Packet.getPayload * (minus the length parameter) and is included in this interface * as a convenience. * * @param msg the packet * @return the payload of the packet */ command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/interfaces/TimeSyncPacket.nc000066400000000000000000000051741207233610700221250ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "message.h" interface TimeSyncPacket { /** * Returns TRUE if the value returned by getTime can be trusted. * Under certain circumstances the received message cannot be properly * time stamped, so the sender-receiver synchronization cannot be finished * on the receiver side. In this case, this command returns FALSE. * This command MUST BE called only on the receiver side and only for * messages transmitted via the TimeSyncSend interface. It is recommended * that this command be called from the receive event handler. */ command bool isValid(message_t* msg); /** * This command should be called by the receiver of a message. The time * of the synchronization event is returned as expressed in the local * clock of the caller. This command MUST BE called only on the receiver * side and only for messages transmitted via the TimeSyncSend interface. * It is recommended that this command be called from the receive event * handler. */ command size_type eventTime(message_t* msg); } tinyos-2.1.2+dfsg/tos/interfaces/UartByte.nc000066400000000000000000000044341207233610700207770ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:35 $ */ interface UartByte { /** * Send a single uart byte. The call blocks until it is ready to * accept another byte for sending. * * @param byte The byte to send. * @return SUCCESS if byte was sent, FAIL otherwise. */ async command error_t send( uint8_t byte ); /** * Receive a single uart byte. The call blocks until a byte is * received. * * @param 'uint8_t* ONE byte' Where to place received byte. * @param timeout How long in byte times to wait. * @return SUCCESS if a byte was received, FAIL if timed out. */ async command error_t receive( uint8_t* byte, uint8_t timeout ); } tinyos-2.1.2+dfsg/tos/interfaces/UartControl.nc000066400000000000000000000106571207233610700215200ustar00rootroot00000000000000/* $Id: UartControl.nc,v 1.2 2009-09-14 00:25:59 scipio Exp $ */ /* * Copyright (c) 2009 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * A hardware-independent (HIL) interface for configuring a UART. * Allows setting speed, parity bits, stop bits, and duplex mode. * Parameters are generally TinyOS enum constants, defined within a * chip's header files, such that using an unsupported setting * will reference an undefined constant and lead to a compilation * error. * * @author Philip Levis * @date $Date: 2009-09-14 00:25:59 $ */ interface UartControl { /** Set the UART speed for both reception and transmission. * This command should be called only when both reception * and transmission are disabled, either through a power interface * or setDuplexMode(). The parameter is a constant of the * form TOS_UART_XX, where XX is the speed, such as * TOS_UART_57600. Different platforms support different speeds. * A compilation error on the constant indicates the platform * does not support that speed. * * @param speed The UART speed to change to. */ async command error_t setSpeed(uart_speed_t speed); /** * Returns the current UART speed. */ async command uart_speed_t speed(); /** * Set the duplex mode of the UART. Valid modes are * TOS_UART_OFF, TOS_UART_RONLY, TOS_UART_TONLY, and * TOS_UART_DUPLEX. Some platforms may support only * a subset of these modes: trying to use an unsupported * mode is a compile-time error. The duplex mode setting * affects what kinds of interrupts the UART will issue. * * @param duplex The duplex mode to change to. */ async command error_t setDuplexMode(uart_duplex_t duplex); /** * Return the current duplex mode. */ async command uart_duplex_t duplexMode(); /** * Set whether UART bytes have even parity bits, odd * parity bits, or no parity bits. This command should * only be called when both the receive and transmit paths * are disabled, either through a power control interface * or setDuplexMode. Valid parity settings are * TOS_UART_PARITY_NONE, TOS_UART_PARITY_EVEN, * and TOS_UART_PARITY_ODD. * * @param parity The parity mode to change to. */ async command error_t setParity(uart_parity_t parity); /** * Return the current parity mode. */ async command uart_parity_t parity(); /** * Enable stop bits. This command should only be called * when both the receive and transmits paths are disabled, * either through a power control interface or setDuplexMode. */ async command error_t setStop(); /** * Disable stop bits. This command should only be called * when both the receive and transmits paths are disabled, * either through a power control interface or setDuplexMode. */ async command error_t setNoStop(); /** * Returns whether stop bits are enabled. */ async command bool stopBits(); } tinyos-2.1.2+dfsg/tos/interfaces/UartStream.nc000066400000000000000000000071741207233610700213330ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:35 $ */ interface UartStream { /** * Begin transmission of a UART stream. If SUCCESS is returned, * sendDone will be signalled when transmission is * complete. * * @param 'uint8_t* COUNT(len) buf' Buffer for bytes to send. * @param len Number of bytes to send. * @return SUCCESS if request was accepted, FAIL otherwise. */ async command error_t send( uint8_t* buf, uint16_t len ); /** * Signal completion of sending a stream. * * @param 'uint8_t* COUNT(len) buf' Bytes sent. * @param len Number of bytes sent. * @param error SUCCESS if the transmission was successful, FAIL otherwise. */ async event void sendDone( uint8_t* buf, uint16_t len, error_t error ); /** * Enable the receive byte interrupt. The receive event * is signalled each time a byte is received. * * @return SUCCESS if interrupt was enabled, FAIL otherwise. */ async command error_t enableReceiveInterrupt(); /** * Disable the receive byte interrupt. * * @return SUCCESS if interrupt was disabled, FAIL otherwise. */ async command error_t disableReceiveInterrupt(); /** * Signals the receipt of a byte. * * @param byte The byte received. */ async event void receivedByte( uint8_t byte ); /** * Begin reception of a UART stream. If SUCCESS is returned, * receiveDone will be signalled when reception is * complete. * * @param 'uint8_t* COUNT(len) buf' Buffer for received bytes. * @param len Number of bytes to receive. * @return SUCCESS if request was accepted, FAIL otherwise. */ async command error_t receive( uint8_t* buf, uint16_t len ); /** * Signal completion of receiving a stream. * * @param 'uint8_t* COUNT(len) buf' Buffer for bytes received. * @param len Number of bytes received. * @param error SUCCESS if the reception was successful, FAIL otherwise. */ async event void receiveDone( uint8_t* buf, uint16_t len, error_t error ); } tinyos-2.1.2+dfsg/tos/interfaces/WriteResource.nc000066400000000000000000000034171207233610700220420ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ interface WriteResource { command int put(uint8_t *val, size_t buflen, coap_tid_t id); event void putDone(error_t result, coap_tid_t id, uint8_t asyn_message); event void putDoneDeferred(coap_tid_t id); } tinyos-2.1.2+dfsg/tos/lib/000077500000000000000000000000001207233610700153345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/byte_radio/000077500000000000000000000000001207233610700174555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/byte_radio/ChannelMonitor.nc000066400000000000000000000047351207233610700227300ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * This interface is an abstraction of Clear Channel Assessment (CCA) in byte radios. * It provides commands and events to perform CCA. * * @see ChannelMonitorControl * @see ChannelMonitorData * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ interface ChannelMonitor { /** * Start observing the channel. * Either the event channelBusy() or channelIdle() will be indicated. * * @return SUCCESS on success * FAIL otherwise. */ async command error_t start(); /** * Indicates that the channel is busy. */ async event void channelBusy(); /** * Indicates that the channel is idle. */ async event void channelIdle(); /** * Tells the channel monitor that the last busy event * actually indicated a message. */ async command void rxSuccess(); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/ChannelMonitorControl.nc000066400000000000000000000043051207233610700242620ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * This control interface is used by byte radio CCA components based on RSSI * valid detection with a floating threshold. * * @see ChannelMonitor * @see ChannelMonitorData * * @author Kevin Klues (klues@tkn.tu-berlin.de) * @author Andreas Koepke (koepke@tkn.tu-berlin.de) */ interface ChannelMonitorControl { /** * Update the noise floor. * * @return SUCCESS if the noise floor can be updated * FAIL otherwise. */ async command error_t updateNoiseFloor(); /** * Indicates that the noisefloor has been updated. */ event void updateNoiseFloorDone(); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/ChannelMonitorData.nc000066400000000000000000000060341207233610700235140ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * This interface is used by byte radio CCA components based on RSSI * valid detection with a floating threshold. * * It provides commands and events to read the Signal to Noise Ratio * (SNR) and noisefloor of the radio channel. * * @see ChannelMonitor * @see ChannelMonitorControl * * @author Kevin Klues (klues@tkn.tu-berlin.de) * @author Andreas Koepke (koepke@tkn.tu-berlin.de) */ interface ChannelMonitorData { /** * Sets the gradient for the conversion of mV and dB. * * @param grad This is calculated as grad = mV/dB */ async command void setGradient(int16_t grad); /** * Returns the currently used gradient to convert between * dB and mV. * * @return The currently used gradient. */ async command int16_t getGradient(); /** * Starts the SNR measurement * * @returns SUCCESS on success * FAIL otherwise. */ async command error_t getSnr(); /** * Returns the SNR value in dB. * * @param snr The SNR value in dB. */ async event void getSnrDone(int16_t snr); /** * try to be lucky: read anything stored as the rssi and * make a crude and fast conversion to an snr value */ async command uint16_t readSnr(); /** * Get the noisefloor in mV. * * @return The noisefloor in mV. */ async command uint16_t getNoiseFloor(); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/LinkLayerC.nc000066400000000000000000000050251207233610700217760ustar00rootroot00000000000000/* * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * This is the configuration for a really simple link layer. * * @author Kevin Klues (klues@tkn.tu-berlin.de) * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de) */ configuration LinkLayerC { provides { interface SplitControl; interface Send; interface Receive; interface PacketAcknowledgements; } uses { interface SplitControl as MacSplitControl; interface SplitControl as RadioSplitControl; interface MacSend as SendDown; interface MacReceive as ReceiveLower; interface Packet; } } implementation { components LinkLayerP as Llc, MainC; MainC.SoftwareInit -> Llc; SplitControl = Llc; MacSplitControl = Llc.MacSplitControl; RadioSplitControl = Llc.RadioSplitControl; Send = Llc.Send; Receive = Llc.Receive; Packet = Llc.Packet; PacketAcknowledgements = Llc; ReceiveLower = Llc.ReceiveLower; SendDown = Llc.SendDown; } tinyos-2.1.2+dfsg/tos/lib/byte_radio/LinkLayerP.nc000066400000000000000000000167111207233610700220170ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include "radiopacketfunctions.h" #include "message.h" #include "PacketAck.h" /** * This is the implementation of a really simple link layer. * * @author Andreas Koepke */ module LinkLayerP { provides { interface Init; interface SplitControl; interface Receive; interface Send; interface PacketAcknowledgements; } uses { interface SplitControl as MacSplitControl; interface SplitControl as RadioSplitControl; interface MacSend as SendDown; interface MacReceive as ReceiveLower; interface Packet; } } implementation { /* Tx/Rx buffers & pointers */ message_t* txBufPtr; message_t* rxBufPtr; message_t rxBuf; /* state vars */ error_t splitStateError; // state of SplitControl interfaces bool rxBusy; // blocks an incoming packet if the rxBuffer is in use // #define LLCM_DEBUG /**************** Helper functions ******/ void signalFailure() { #ifdef LLCM_DEBUG atomic { for(;;) { ; } } #endif } /**************** Init *****************/ command error_t Init.init(){ atomic { rxBufPtr = &rxBuf; txBufPtr = 0; splitStateError = EOFF; rxBusy = FALSE; } return SUCCESS; } /**************** Start *****************/ void checkStartDone(error_t error) { atomic { if ( (splitStateError == SUCCESS) && (error == SUCCESS) ) { signal SplitControl.startDone(SUCCESS); } else if ( (error == SUCCESS) && (splitStateError == EOFF) ) { splitStateError = SUCCESS; } else { signal SplitControl.startDone(FAIL); } } } event void MacSplitControl.startDone(error_t error) { checkStartDone(error); } event void RadioSplitControl.startDone(error_t error) { checkStartDone(error); } command error_t SplitControl.start() { call MacSplitControl.start(); call RadioSplitControl.start(); return SUCCESS; } /**************** Stop *****************/ void checkStopDone(error_t error) { atomic { if ( (splitStateError == EOFF) && (error == SUCCESS) ) { signal SplitControl.stopDone(SUCCESS); } else if ( (error == SUCCESS) && (splitStateError == SUCCESS) ) { splitStateError = EOFF; } else { signal SplitControl.stopDone(FAIL); } } } event void MacSplitControl.stopDone(error_t error) { checkStopDone(error); } event void RadioSplitControl.stopDone(error_t error) { checkStopDone(error); } command error_t SplitControl.stop(){ call MacSplitControl.stop(); call RadioSplitControl.stop(); return SUCCESS; } /**************** Send ****************/ task void SendDoneSuccessTask() { message_t* txPtr; atomic txPtr = txBufPtr; signal Send.sendDone(txPtr, SUCCESS); } task void SendDoneCancelTask() { message_t* txPtr; atomic txPtr = txBufPtr; signal Send.sendDone(txPtr, ECANCEL); } task void SendDoneFailTask() { message_t* txPtr; atomic txPtr = txBufPtr; signal Send.sendDone(txPtr, FAIL); } command error_t Send.send(message_t *msg, uint8_t len) { if(getMetadata(msg)->ack != NO_ACK_REQUESTED) { // ensure reasonable value getMetadata(msg)->ack = ACK_REQUESTED; } return call SendDown.send(msg, len); } command error_t Send.cancel(message_t* msg) { return call SendDown.cancel(msg); } command uint8_t Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command void* Send.getPayload(message_t* msg, uint8_t len) { return call Packet.getPayload(msg, len); } async event void SendDown.sendDone(message_t* msg, error_t error) { atomic { txBufPtr = msg; } if (error == SUCCESS) { post SendDoneSuccessTask(); } else if (error == ECANCEL) { post SendDoneCancelTask(); } else { post SendDoneFailTask(); } } /*************** Receive ***************/ task void ReceiveTask() { void *payload; uint8_t len; message_t* tmpMsgPtr; atomic { len = call Packet.payloadLength(rxBufPtr); payload = call Packet.getPayload(rxBufPtr, len); tmpMsgPtr = rxBufPtr; } tmpMsgPtr = signal Receive.receive(tmpMsgPtr, payload , len); atomic { rxBufPtr = tmpMsgPtr; rxBusy = FALSE; } } async event message_t* ReceiveLower.receiveDone(message_t* msg) { message_t* msgPtr; atomic { if (rxBusy) { msgPtr = msg; } else { rxBusy = TRUE; msgPtr = rxBufPtr; rxBufPtr = msg; post ReceiveTask(); } } return msgPtr; } /*************** default events ***********/ /* for lazy buggers who do not want to do something with a packet */ default event void Send.sendDone(message_t* sent, error_t success) { } default event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { return msg; } /* PacketAcknowledgements interface */ async command error_t PacketAcknowledgements.requestAck(message_t* msg) { getMetadata(msg)->ack = ACK_REQUESTED; return SUCCESS; } async command error_t PacketAcknowledgements.noAck(message_t* msg) { getMetadata(msg)->ack = NO_ACK_REQUESTED; return SUCCESS; } async command bool PacketAcknowledgements.wasAcked(message_t* msg) { bool rVal = FALSE; if(getMetadata(msg)->ack == WAS_ACKED) rVal = TRUE; return rVal; } } tinyos-2.1.2+dfsg/tos/lib/byte_radio/MacReceive.nc000066400000000000000000000053711207233610700220100ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include /** * This interface is similar to the Receive interface. * * The interface provides one event in async context which indicates that * a packet was received. It Is provided by the MAC layer ofi * a byte radio. * * @see Receive * * @author Philipp Huppertz */ interface MacReceive { /** * Receive a packet buffer, returning a buffer for the signaling * component to use for the next reception. The return value * can be the same as msg, as long as the handling * component copies out the data it needs. * * Note that misuse of this interface is one of the most * common bugs in TinyOS code. For example, if a component both calls a * send on the passed message and returns it, then it is possible * the buffer will be reused before the send occurs, overwriting * the component's data. This would cause the mote to possibly * instead send a packet it most recently received. * * @param msg the received packet * @return a packet buffer for the stack to use for the next * received packet. */ async event message_t* receiveDone(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/MacSend.nc000066400000000000000000000073241207233610700213170ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include #include /** * This interface is similar to the Send interface. * * It provides the same basic functionality as the Send interface in async * context. It is provided by the MAC layer of byte radios. * * @see Send * * @author Philipp Huppertz */ interface MacSend { /** * Send a packet with a data payload of len. To determine * the maximum available size, use the Packet interface of the * component providing Send. If send returns SUCCESS, then the * component will signal the sendDone event in the future; if send * returns an error, it will not signal sendDone. Note that a * component may accept a send request which it later finds it * cannot satisfy; in this case, it will signal sendDone with an * appropriate error code. * * @param msg the packet to send * @param len the length of the packet payload * @return SUCCESS if the request was accepted and will issue * a sendDone event, EBUSY if the component cannot accept * the request now but will be able to later, FAIL * if the stack is in a state that cannot accept requests * (e.g., it's off). */ async command error_t send(message_t* msg, uint8_t len); /** * Cancel a requested transmission. Returns SUCCESS if the * transmission was cancelled properly (not sent at all) * * @param msg the packet whose transmission should be cancelled * @return SUCCESS if the packet was successfully cancelled, FAIL * otherwise */ async command error_t cancel(message_t* msg); /** * Signaled in response to an accepted send request. msg * is the sent buffer, and error indicates whether the * send was succesful, and if not, the cause of the failure. * * @param msg the message which was requested to send * @param error SUCCESS if it was transmitted successfully, FAIL if * it was not, ECANCEL if it was cancelled via cancel */ async event void sendDone(message_t* msg, error_t error); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/PacketAck.h000066400000000000000000000042571207233610700214640ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * provide constants for packet ack interface * - Author -------------------------------------------------------------- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ #ifndef PACKET_ACK_H #define PACKET_ACK_H /* #define NO_ACK_REQUESTED 1 #define WAS_ACKED 2 #define ACK_REQUESTED 128 */ typedef enum { NO_ACK_REQUESTED = 1, WAS_ACKED, WAS_NOT_ACKED, ACK_REQUESTED = 128U } packet_ack_t; #endif tinyos-2.1.2+dfsg/tos/lib/byte_radio/PacketSerializerP.nc000066400000000000000000000175771207233610700234010ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.9 $ * $Date: 2010-01-27 14:42:10 $ * ======================================================================== */ #include "crc.h" #include "message.h" #include "radiopacketfunctions.h" /** * This module in conjunction with the UartPhyC turns byte streams * into packtes. * * @see UartPhyC * * @author Kevin Klues * @author Philipp Huppertz */ module PacketSerializerP { provides { interface PhySend; interface PhyReceive; interface Packet; interface RadioTimeStamping; } uses { interface RadioByteComm; interface PhyPacketTx; interface PhyPacketRx; #ifdef PACKETSERIALIZER_DEBUG interface SerialDebug; #endif } } implementation { #ifdef PACKETSERIALIZER_DEBUG void sdDebug(uint16_t p) { call SerialDebug.putPlace(p); } #else void sdDebug(uint16_t p) {}; #endif /* Module Global Variables */ message_t rxMsg; // rx message buffer message_t *rxBufPtr = &rxMsg; // pointer to rx buffer message_t *txBufPtr = NULL; // pointer to tx buffer uint16_t crc = 0; // CRC value of either the current incoming or outgoing packet uint8_t byteCnt = 0; // index into current datapacket /* Local Function Declarations */ void TransmitNextByte(); void ReceiveNextByte(uint8_t data); typedef enum { SFD_OFFSET = sizeof(message_header_t) - sizeof(message_radio_header_t) + 2 } pserializer_constants_t; /*- Radio Send */ async command error_t PhySend.send(message_t* msg, uint8_t len) { atomic { crc = 0; txBufPtr = msg; // assume "right (LSB) aligned" unions -- highly compiler and platform specific byteCnt = sizeof(message_header_t) - sizeof(message_radio_header_t); getHeader(msg)->length = len; sdDebug(4000 + getHeader(msg)->token); } call PhyPacketTx.sendHeader(); return SUCCESS; } async event void PhyPacketTx.sendHeaderDone() { TransmitNextByte(); } async event void RadioByteComm.txByteReady(error_t error) { if(error == SUCCESS) { TransmitNextByte(); } else { signal PhySend.sendDone(txBufPtr, FAIL); } } void TransmitNextByte() { if(byteCnt < sizeof(message_header_t) + getHeader(txBufPtr)->length) { // transmit the data part uint8_t* buf = (uint8_t *)(txBufPtr); crc = crcByte(crc, buf[byteCnt]); call RadioByteComm.txByte(buf[byteCnt]); byteCnt++; if(byteCnt == SFD_OFFSET) { signal RadioTimeStamping.transmittedSFD(0, txBufPtr); } } else if(byteCnt == sizeof(message_header_t) + getHeader(txBufPtr)->length) { call RadioByteComm.txByte(crc); byteCnt++; } else if(byteCnt == sizeof(message_header_t) + getHeader(txBufPtr)->length + 1) { call RadioByteComm.txByte(crc >> 8); byteCnt++; } else { call PhyPacketTx.sendFooter(); } } async event void PhyPacketTx.sendFooterDone() { sdDebug(6000 + getHeader(txBufPtr)->token); signal PhySend.sendDone((message_t*)txBufPtr, SUCCESS); } /* Radio Receive */ async event void PhyPacketRx.recvHeaderDone(error_t error) { if(error == SUCCESS) { byteCnt = sizeof(message_header_t) - sizeof(message_radio_header_t); getHeader(rxBufPtr)->length = sizeof(message_radio_header_t); crc = 0; signal PhyReceive.receiveDetected(); } } async event void RadioByteComm.rxByteReady(uint8_t data) { ReceiveNextByte(data); } async event void PhyPacketRx.recvFooterDone(error_t error) { // we care about wrong crc in this layer if(!getFooter(rxBufPtr)->crc) { error = FAIL; } else { } byteCnt = 0; rxBufPtr = signal PhyReceive.receiveDone(rxBufPtr, rxBufPtr->data, getHeader(rxBufPtr)->length, error); } /* Receive the next Byte from the USART */ void ReceiveNextByte(uint8_t data) { uint8_t* buf = (uint8_t *)(rxBufPtr); buf[byteCnt++] = data; if(byteCnt <= sizeof(message_header_t) + getHeader(rxBufPtr)->length) { crc = crcByte(crc, data); if(byteCnt == SFD_OFFSET) { signal RadioTimeStamping.receivedSFD(0); } else if(byteCnt == sizeof(message_header_t) + getHeader(rxBufPtr)->length) { byteCnt = offsetof(message_t, footer) + offsetof(message_radio_footer_t, crc); } if(getHeader(rxBufPtr)->length > TOSH_DATA_LENGTH) { getFooter(rxBufPtr)->crc = 0; call PhyPacketRx.recvFooter(); } } else if(byteCnt >= offsetof(message_t, footer) + offsetof(message_radio_footer_t, crc) + sizeof(crc)) { message_radio_footer_t* footer = getFooter(rxBufPtr); footer->crc = (footer->crc == crc); call PhyPacketRx.recvFooter(); sdDebug(5000 + getHeader(rxBufPtr)->token); } } /* Packet interface */ command void Packet.clear(message_t* msg) { memset(msg, 0, sizeof(message_t)); } command uint8_t Packet.payloadLength(message_t* msg) { return (getHeader(msg))->length; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { getHeader(msg)->length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command void* Packet.getPayload(message_t* msg, uint8_t len) { if (len <= TOSH_DATA_LENGTH) { return (void*)msg->data; } else { return NULL; } } // Default events for radio send/receive coordinators do nothing. // Be very careful using these, or you'll break the stack. default async event void RadioTimeStamping.transmittedSFD(uint16_t time, message_t* msgBuff) { } default async event void RadioTimeStamping.receivedSFD(uint16_t time) { } } tinyos-2.1.2+dfsg/tos/lib/byte_radio/PhyPacketRx.nc000066400000000000000000000051261207233610700222050ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:28 $ * ======================================================================== */ /** * Physical Packet Receive Interface for byte radios. * Commands and events provided by the Radio Interface * to communicate with upper layers about the status of a * received packet. * * @author Kevin Klues */ interface PhyPacketRx { /** * Notification that a packet header was received. * * @param error Will be SUCCESS if a packet header has been received FAIL * otherwise. */ async event void recvHeaderDone(error_t error); /** * Start receiving the packet footer. */ async command void recvFooter(); /** * Notification that the the packet footer was received. * * @param error Will be SUCCESS if a packet incl. footer was received. * It will be FAIL if the packet was not fully received (timeout). */ async event void recvFooterDone(error_t error); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/PhyPacketTx.nc000066400000000000000000000047001207233610700222040ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:28 $ * ======================================================================== */ /** * Physical Packet Transmission Interface for byte radios. * Commands and events provided by the Physical Layer * to communicate with upper layers about the status of a * packet that is being transmitted. * * @author Kevin Klues */ interface PhyPacketTx { /** * Start sending a new packet header. */ async command void sendHeader(); /** * Notification that the packet header was sent. * */ async event void sendHeaderDone(); /** * Start sending the packet footer. */ async command void sendFooter(); /** * Notification that the the packet footer was sent. * */ async event void sendFooterDone(); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/PhyReceive.nc000066400000000000000000000064231207233610700220470ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include /** * This interface is similar to the Receive interface. * * The interface provides two events in async context which indicate that * a packet is detected or was received. It is provided by the Phy layer * of byte radios. * * @see Receive * * @author Philipp Huppertz */ interface PhyReceive { /** * Receive a packet buffer, returning a buffer for the signaling * component to use for the next reception. The return value * can be the same as msg, as long as the handling * component copies out the data it needs. The msg may * be invalid when error is not SUCCESS ! * * Note that misuse of this interface is one of the most * common bugs in TinyOS code. For example, if a component both calls a * send on the passed message and returns it, then it is possible * the buffer will be reused before the send occurs, overwriting * the component's data. This would cause the mote to possibly * instead send a packet it most recently received. * * @param msg the received packet * @param payload a pointer to the packet's payload * @param len the length of the data region pointed to by payload * @param error FAIL if the packet was corrupted (e.g. wrong crc) * @return a packet buffer for the stack to use for the next * received packet. */ async event message_t* receiveDone(message_t* msg, void* payload, uint8_t len, error_t error); /** * Indicates that a packet has been detected. This means that the packet's physical header * (preamble bytes + sync byte + SFD byte) was received. * */ async event void receiveDetected(); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/PhySend.nc000066400000000000000000000064631207233610700213620ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include #include /** * This interface is similar to the Send interface. * * This interface provides the basic functionality of the Send interface * in async context. It is provided by the Phy Layer. * * @see Send * * @author Philipp Huppertz */ interface PhySend { /** * Send a packet with a data payload of len. To determine * the maximum available size, use the Packet interface of the * component providing Send. If send returns SUCCESS, then the * component will signal the sendDone event in the future; if send * returns an error, it will not signal sendDone. Note that a * component may accept a send request which it later finds it * cannot satisfy; in this case, it will signal sendDone with an * appropriate error code. * * @param msg the packet to send * @param len the length of the packet payload * @return SUCCESS if the request was accepted and will issue * a sendDone event, EBUSY if the component cannot accept * the request now but will be able to later, FAIL * if the stack is in a state that cannot accept requests * (e.g., it's off). */ async command error_t send(message_t* msg, uint8_t len); /** * Signaled in response to an accepted send request. msg * is the sent buffer, and error indicates whether the * send was succesful, and if not, the cause of the failure. * * @param msg the message which was requested to send * @param error SUCCESS if it was transmitted successfully, FAIL if * it was not. */ async event void sendDone(message_t* msg, error_t error); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/RadioByteComm.nc000066400000000000000000000061351207233610700225020ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * A byte-level communication interface for byte radios. * It signals byte receptions and * provides a split-phased byte send interface. txByteReady states * that the component can accept another byte in its queue to send, * while txDone states that the send queue has been emptied. * * @author Jason Hill * @author David Gay * @author Philip Levis */ interface RadioByteComm { /** * Transmits a byte over the radio. * * @param data The byte to be transmitted. */ async command void txByte(uint8_t data); /** * Notification that the radio is ready to receive another byte. * * @param data The byte read from the radio. */ async event void rxByteReady(uint8_t data); /** * Notification that the bus is ready to transmit/queue another byte. * * @param error Success Notification of the successful transmission of the last byte. */ async event void txByteReady(error_t error); /** * Check to see if the transmission is done and the queue is empty * * @return TRUE if the queue is empty and no more bytes will be sent. * FALSE if bytes remain in the queue. */ async command bool isTxDone(); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/UartPhyControl.nc000066400000000000000000000052711207233610700227410ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * This interface provides commands to control the structure of * transmitted (physical) packets and provides commands and events * to control the physical layer of byte radios. * * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de) */ interface UartPhyControl { /** * Sets the number of transmitted preamble bytes. * * @param numPreambleBytes the numbeof preamble bytes. * * @return SUCCESS if it could be set (no current receiving/transmitting) FALSE otherwise. */ async command error_t setNumPreambles(uint16_t numPreambleBytes); /** * Sets the timeout after the byte-stream is considered dead if no more * bytes occur on the sending or receiving side. This means isBusy() * returns FALSE. * * @param byteTimeout timeout in ms. * * @return SUCCESS if it could be set (no current receiving/transmitting) * FALSE otherwise. */ command error_t setByteTimeout(uint8_t byteTimeout); /** * Tests if the UartPhy is busy with sending or receiving a packet. * * @return TRUE if active * FALSE otherwise. */ async command bool isBusy(); } tinyos-2.1.2+dfsg/tos/lib/byte_radio/flagfunctions.h000066400000000000000000000043601207233610700224730ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * some helper functions that ease dealing with flags in a bit field * - Author -------------------------------------------------------------- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ #ifndef FLAG_FUNCTIONS_H #define FLAG_FUNCTIONS_H void setFlag(uint8_t *which, uint8_t pos) { (*which) |= pos; } void clearFlag(uint8_t *which, uint8_t pos) { (*which) = (*which) & (~pos); } bool isFlagSet(const uint8_t *which, uint8_t pos) { return (*which) & pos; } #endif tinyos-2.1.2+dfsg/tos/lib/byte_radio/manchester.h000066400000000000000000000066071207233610700217700ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * provide functions to encode/decode a manchester stream * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:28 $ * @author Andreas Koepke * ======================================================================== */ const uint8_t nibbleToManchesterByte[] = { 0x55, 0x56, 0x59, 0x5a, 0x65, 0x66, 0x69, 0x6a, 0x95, 0x96, 0x99, 0x9a, 0xa5, 0xa6, 0xa9, 0xaa }; const uint8_t manchesterByteToNibble[] = { 0x0, 0x1, 0xff, 0xff, 0x2, 0x3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x4, 0x5, 0xff, 0xff, 0x6, 0x7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8, 0x9, 0xff, 0xff, 0xa, 0xb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc, 0xd, 0xff, 0xff, 0xe, 0xf }; uint8_t manchesterEncodeNibble(uint8_t nib) { return nibbleToManchesterByte[nib]; } uint8_t manchesterDecodeByte(uint8_t b) { uint8_t dec; if(b < 0x55) { dec = 0xff; } else if(b > 0xaa) { dec = 0xff; } else { dec = manchesterByteToNibble[b - 0x55]; } return dec; } tinyos-2.1.2+dfsg/tos/lib/byte_radio/radiopacketfunctions.h000066400000000000000000000051351207233610700240510ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * Platformindependant packet structure accessor functions * - Author -------------------------------------------------------------- * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de) * ======================================================================== */ #ifndef RADIO_PACKET_FUNCTIONS_H #define RADIO_PACKET_FUNCTIONS_H #include "message.h" /* Packet structure accessor functions * note: platform-independant radiostructures are called message_radio_header_t & message_radio_footer_t */ message_radio_header_t* getHeader(message_t* amsg) { return (message_radio_header_t*)(amsg->data - sizeof(message_radio_header_t)); } message_radio_footer_t* getFooter(message_t* amsg) { return (message_radio_footer_t*)(amsg->footer); } message_radio_metadata_t* getMetadata(message_t* amsg) { return (message_radio_metadata_t*)((uint8_t*)amsg->footer + sizeof(message_radio_footer_t)); } #endif tinyos-2.1.2+dfsg/tos/lib/byte_radio/shellsort.h000066400000000000000000000007321207233610700216470ustar00rootroot00000000000000/*integriert shellsort Algorithmus*/ /*shellsort aufsteigend sortierend aus Kernighan Ritchie (S.61)*/ #ifndef __SHELLSORT_H__ #define __SHELLSORT_H__ void shellsort(uint16_t basis[] , uint16_t size) { int gap, i, j, temp; for (gap = size/2; gap > 0; gap /= 2) for (i = gap; i < size; i++) for (j = i-gap; j >= 0 && basis[j] > basis[j+gap]; j-=gap) { temp = basis[j]; basis[j] = basis[j+gap]; basis[j+gap] = temp; } } #endif /* __SHELLSORT_H__ */ tinyos-2.1.2+dfsg/tos/lib/diagmsg/000077500000000000000000000000001207233610700167475ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/diagmsg/Assert.h000066400000000000000000000035161207233610700203660ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __ASSERT_H__ #define __ASSERT_H__ #ifdef ASSERT_NONE #define ASSERT(COND) for(;0;) #else void assert(bool condition, const char* file, uint16_t line); #define ASSERT(COND) assert(COND, __FILE__, __LINE__) #endif #endif//__ASSERT_H__ tinyos-2.1.2+dfsg/tos/lib/diagmsg/AssertC.nc000066400000000000000000000033731207233610700206430ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration AssertC { } implementation { #ifndef ASSERT_NONE components AssertP, DiagMsgC, LedsC; AssertP.DiagMsg -> DiagMsgC; AssertP.Leds -> LedsC; #endif } tinyos-2.1.2+dfsg/tos/lib/diagmsg/AssertP.nc000066400000000000000000000043051207233610700206540ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ module AssertP { uses { interface DiagMsg; interface Leds; } } implementation { void assert(bool condition, const char* file, uint16_t line) __attribute__((noinline)) @C() @spontaneous() { if( ! condition ) { #ifdef ASSERT_LEDON call Leds.led0On(); #endif if( call DiagMsg.record() ) { uint8_t del = 0; uint8_t len = 0; while( file[len] != 0 ) { if( file[len] == '\\' || file[len] == '/' ) del = len + 1; ++len; } file += del; call DiagMsg.str("assert"); call DiagMsg.str(file); call DiagMsg.uint16(line); call DiagMsg.send(); } } } } tinyos-2.1.2+dfsg/tos/lib/diagmsg/DiagMsg.nc000066400000000000000000000101231207233610700206010ustar00rootroot00000000000000/* * Copyright (c) 2002-2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ /** * The DiagMsg interface allows messages to be sent back to the base station * containing several values and their type information, like in * printf(...). The base station must be connected to a PC using * a serial cable. On the PC a Java application (net.tinyos.util.DiagMsg) * decodes the message and displays its content using the correct type * information. See the implementation for the format of the message. */ interface DiagMsg { /** * Initiates the recording of a new DiagMsg. It returns FALSE if * the component is busy recording or sending another message. */ async command bool record(); /** * Adds a new value to the end of the message. If the message * cannot hold more information, then the new value is simply dropped. */ async command void int8(int8_t value); async command void uint8(uint8_t value); async command void hex8(uint8_t value); async command void int16(int16_t value); async command void uint16(uint16_t value); async command void hex16(uint16_t value); async command void int32(int32_t value); async command void int64(int64_t value); async command void uint64(uint64_t value); async command void uint32(uint32_t value); async command void hex32(uint32_t value); async command void real(float value); async command void chr(char value); /** * Adds an array of values to the end of the message. * The maximum length of the array is 15. * If the message cannot hold all elements of the array, * then no value is stored. */ async command void int8s(const int8_t *value, uint8_t len); async command void uint8s(const uint8_t *value, uint8_t len); async command void hex8s(const uint8_t *value, uint8_t len); async command void int16s(const int16_t *value, uint8_t len); async command void uint16s(const uint16_t *value, uint8_t len); async command void hex16s(const uint16_t *value, uint8_t len); async command void int32s(const int32_t *value, uint8_t len); async command void uint32s(const uint32_t *value, uint8_t len); async command void hex32s(const uint32_t *value, uint8_t len); async command void int64s(const int64_t *value, uint8_t len); async command void uint64s(const uint64_t *value, uint8_t len); async command void reals(const float *value, uint8_t len); async command void chrs(const char *value, uint8_t len); /** * This is a shorthand method for chrs */ async command void str(const char* value); /** * Initiates the sending of the recorded message. */ async command void send(); } tinyos-2.1.2+dfsg/tos/lib/diagmsg/DiagMsgC.nc000066400000000000000000000041241207233610700207100ustar00rootroot00000000000000/* * Copyright (c) 2002-2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration DiagMsgC { provides interface DiagMsg; } implementation { #ifdef DIAGMSG_NONE components NoDiagMsgC; DiagMsg = NoDiagMsgC; #else enum { AM_DIAG_MSG = 0xB1, }; components DiagMsgP; DiagMsg = DiagMsgP.DiagMsg; #ifdef DIAGMSG_RADIO components new AMSenderC(AM_DIAG_MSG); #else components new SerialAMSenderC(AM_DIAG_MSG) as AMSenderC; #ifdef DIAGMSG_SERIAL_START components SerialStartC; #endif #endif DiagMsgP.AMSend -> AMSenderC; DiagMsgP.Packet -> AMSenderC; #endif } tinyos-2.1.2+dfsg/tos/lib/diagmsg/DiagMsgP.nc000066400000000000000000000201761207233610700207320ustar00rootroot00000000000000/* * Copyright (c) 2002-2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include module DiagMsgP { provides { interface DiagMsg; } uses { interface AMSend; interface Packet; } } #ifndef DIAGMSG_BASE_STATION #define DIAGMSG_BASE_STATION AM_BROADCAST_ADDR #endif #ifndef DIAGMSG_RETRY_COUNT #define DIAGMSG_RETRY_COUNT 2 #endif #ifndef DIAGMSG_RECORDED_MSGS #define DIAGMSG_RECORDED_MSGS 10 #endif implementation { enum { STATE_READY = 1, STATE_RECORDING_FIRST = 2, // recording the first 4-bit descriptor STATE_RECORDING_SECOND = 3, // recording the second 4-bit descriptor STATE_MSG_FULL = 4, STATE_BUFFER_FULL = 5, }; norace volatile uint8_t state = STATE_READY; // the state of the recording message_t msgs[DIAGMSG_RECORDED_MSGS]; // circular buffer of messages norace message_t *recording = msgs; // the message that is beeing or going to be recorded message_t *sending = 0; // the message that is beeing sent, or the null pointer norace uint8_t nextData; // points to the next unsued byte norace uint8_t prevType; // points to the type descriptor norace uint8_t retries; // number of remaining retries // two type fields are stored in on byte enum { TYPE_END = 0, TYPE_INT8 = 1, TYPE_UINT8 = 2, TYPE_HEX8 = 3, TYPE_INT16 = 4, TYPE_UINT16 = 5, TYPE_HEX16 = 6, TYPE_INT32 = 7, TYPE_UINT32 = 8, TYPE_HEX32 = 9, TYPE_FLOAT = 10, TYPE_CHAR = 11, TYPE_INT64 = 12, TYPE_UINT64 = 13, TYPE_ARRAY = 15, }; /* The format of the payload is as follows: Each value has an associated data type descriptor. The descriptor takes 4-bits, and two descriptors are packed into one byte. The double-descriptor is followed by the data bytes needed to store the corresponding value. Two sample layouts are: [D2, D1] [V1] ... [V1] [V2] ... [V2] [D2, D1] [V1] ... [V1] [V2] ... [V2] [0, D3] [V3] ... [V3] where D1, D2, D3 denotes the data type descriptors, and V1, V2 and V3 denotes the bytes where the corresponding values are stored. If there is an odd number of data descriptors, then a zero data descriptor TYPE_END is inserted. Each data type (except arrays) uses a fixed number of bytes to store the value. For arrays, the first byte of the array holds the data type of the array (higer 4 bits) and the length of the array (lower 4 bits). The actual data follows this first byte. */ async command bool DiagMsg.record() { atomic { // currently recording or no more space if( state != STATE_READY ) return FALSE; state = STATE_RECORDING_FIRST; nextData = 0; } return TRUE; } /** * Allocates space in the message for size bytes * and sets the type information to type. * Returns the index in msg.data where the data * should be stored or -1 if no more space is avaliable. */ int8_t allocate(uint8_t size, uint8_t type) { int8_t ret = -1; if( state == STATE_RECORDING_FIRST ) { if( nextData + 1 + size <= TOSH_DATA_LENGTH ) { state = STATE_RECORDING_SECOND; prevType = nextData++; ((uint8_t*) &(recording->data))[prevType] = type; ret = nextData; nextData += size; } else state = STATE_MSG_FULL; } else if( state == STATE_RECORDING_SECOND ) { if( nextData + size <= TOSH_DATA_LENGTH ) { state = STATE_RECORDING_FIRST; ((uint8_t*) &(recording->data))[prevType] += (type << 4); ret = nextData; nextData += size; } else state = STATE_MSG_FULL; } return ret; } void copyData(uint8_t size, uint8_t type2, const void* data) { int8_t start = allocate(size, type2); if( start >= 0 ) memcpy(&(recording->data[start]), data, size); } void copyArray(uint8_t size, uint8_t type2, const void* data, uint8_t len) { int8_t start; if( len > 15 ) len = 15; start = allocate(size*len + 1, TYPE_ARRAY); if( start >= 0 ) { recording->data[start] = (type2 << 4) + len; memcpy(&(recording->data[start + 1]), data, size*len); } } #define IMPLEMENT(NAME, TYPE, TYPE2) \ async command void DiagMsg.NAME(TYPE value) { copyData(sizeof(TYPE), TYPE2, &value); } \ async command void DiagMsg.NAME##s(const TYPE *value, uint8_t len) { copyArray(sizeof(TYPE), TYPE2, value, len); } IMPLEMENT(int8, int8_t, TYPE_INT8) IMPLEMENT(uint8, uint8_t, TYPE_UINT8) IMPLEMENT(hex8, uint8_t, TYPE_HEX8) IMPLEMENT(int16, int16_t, TYPE_INT16) IMPLEMENT(uint16, uint16_t, TYPE_UINT16) IMPLEMENT(hex16, uint16_t, TYPE_HEX16) IMPLEMENT(int32, int32_t, TYPE_INT32) IMPLEMENT(uint32, uint32_t, TYPE_UINT32) IMPLEMENT(hex32, uint32_t, TYPE_HEX32) IMPLEMENT(int64, int64_t, TYPE_INT64) IMPLEMENT(uint64, uint64_t, TYPE_UINT64) IMPLEMENT(real, float, TYPE_FLOAT) IMPLEMENT(chr, char, TYPE_CHAR) async command void DiagMsg.str(const char* str) { int8_t len = 0; while( str[len] != 0 && len < 15 ) ++len; call DiagMsg.chrs(str, len); } // TODO: this is a hack because setPayloadLength should be async inline void setPayloadLength(message_t* msg, uint8_t length) { (*(uint8_t*) &(msg->header)) = length; } inline uint8_t getPayloadLength(message_t* msg) { return *(uint8_t*) &(msg->header); } task void send() { message_t* msg; atomic msg = sending; // if the stack is not started, then drop the message // (cannot spin with tasks becasue we might be in software or hardware init) if( call AMSend.send(DIAGMSG_BASE_STATION, msg, getPayloadLength(msg)) != SUCCESS ) atomic sending = 0; } // calculates the next message_t pointer in the msgs circular buffer static inline message_t* nextPointer(message_t* ptr) { if( ++ptr >= msgs + DIAGMSG_RECORDED_MSGS ) return msgs; else return ptr; } async command void DiagMsg.send() { // no message recorded if( state == STATE_READY ) return; // store the length setPayloadLength(recording, nextData); atomic { if( sending == 0 ) { sending = recording; retries = DIAGMSG_RETRY_COUNT; post send(); } recording = nextPointer(recording); if( recording == sending ) state = STATE_BUFFER_FULL; else state = STATE_READY; } } event void AMSend.sendDone(message_t* p, error_t error) { atomic { // retry if not successful if( error != SUCCESS && --retries > 0 ) post send(); else { p = nextPointer(sending); if( p != recording ) { sending = p; retries = DIAGMSG_RETRY_COUNT; post send(); } else { sending = 0; if( state == STATE_BUFFER_FULL ) { state = STATE_READY; if( call DiagMsg.record() ) { call DiagMsg.str("DiagMsgOverflow"); call DiagMsg.send(); } } } } } } } tinyos-2.1.2+dfsg/tos/lib/diagmsg/NoDiagMsgC.nc000066400000000000000000000047241207233610700212130ustar00rootroot00000000000000/* * Copyright (c) 2003-2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ module NoDiagMsgC { provides interface DiagMsg; } implementation { async command bool DiagMsg.record() { return FALSE; } #define IMPLEMENT(NAME, TYPE, TYPE2) \ async command void DiagMsg.NAME(TYPE value) { } \ async command void DiagMsg.NAME##s(const TYPE *value, uint8_t len) { } IMPLEMENT(int8, int8_t, TYPE_INT8) IMPLEMENT(uint8, uint8_t, TYPE_UINT8) IMPLEMENT(hex8, uint8_t, TYPE_HEX8) IMPLEMENT(int16, int16_t, TYPE_INT16) IMPLEMENT(uint16, uint16_t, TYPE_UINT16) IMPLEMENT(hex16, uint16_t, TYPE_HEX16) IMPLEMENT(int32, int32_t, TYPE_INT32) IMPLEMENT(uint32, uint32_t, TYPE_UINT32) IMPLEMENT(hex32, uint32_t, TYPE_HEX32) IMPLEMENT(int64, int64_t, TYPE_INT64) IMPLEMENT(uint64, uint64_t, TYPE_UINT64) IMPLEMENT(real, float, TYPE_FLOAT) IMPLEMENT(chr, char, TYPE_CHAR) async command void DiagMsg.str(const char* str) { } async command void DiagMsg.send() { } } tinyos-2.1.2+dfsg/tos/lib/diagmsg/README000066400000000000000000000062161207233610700176340ustar00rootroot00000000000000DiagMsg: Author/Contact: miklos.maroti@vanderbilt.edu (Miklos Maroti, ISIS, Vanderbilt) DESCRIPTION: The DiagMsg component allows messages to be sent back to the base station containing several diagnostic or debugging values together with their type information. The base station must run the GenericBase or TOSBase application which forwards all messages to a PC connected to the base station. A java programm (java net.tinyos.util.DiagMsg) displays the messages on the screen according to the formating rules contained in the message. The following data types are supported: 1,2, 4 and 8 byte long signed, unsigned and hexadecimal integers, characters, floating point numbers, strings and arrays of the previous types (of length up to 15). Each field requires an additional 4 bit type descriptor. USAGE: When you want to report some data, write code something like this: if( call DiagMsg.record() ) { call DiagMsg.str("test"); call DiagMsg.uint8(17); call DiagMsg.int16(1973); call DiagMsg.real(12.345); call DiagMsg.chr('Z'); call DiagMsg.uint32(123456789); call DiagMsg.send(); } The DiagMsg component will record the message and will send it as soon as possible. You can record up to 29 bytes of data in a single message. Each field uses and additional 4-bit type descriptor. For arrays, including strings, there is an additional 1-byte length descriptor as well. The diag message above, for example, uses 5+1+1+2+4+1+4+7*0.5 = 21.5 that is 22 bytes. If the message cannot hold more fields, then additional fields will be silently ignored. THE JAVA PROGRAM: The java program (DiagMsgs) displays each DiagMsg in a line. The program can connect to a SerialForward application, or can use the serial port directly. ASSERT: A separate component (AssertC) provides an ASSERT macro that can be used to signal error conditions with a DiagMsg. You have to include the AssertC component only once in your application, and where ever you want to use the ASSERT macro you need to include only the Assert.h header file. TUNABLE PARAMETERS: The DiagMsg component can be configured by defining the following values in your Makefile: DIAGMSG_NONE: Turns off sending diagmessage completely DIAGMSG_RADIO: By default all diag messages are sent over the serial line, this will reroute them to the radio DIAGMSG_SERIAL_START: By default the DiagMsgC component does not turn on the serial stack. Either you have to explicitely start the serial stack before diag messgaes can be sent, or you can define this value in your Makefile, and the SerialStartC component will be automatically incuded. DIAGMSG_BASE_STATION: The node ID of the base station or 0xFFFF to broadcast the message. The default value is to broadcast the message. DIAGMSG_RETRY_COUNT: The DiagMsg component will retry messages this many times before dropping them. The base station must acknowledge them (this is done automatically). DIAGMSG_RECORDED_MSGS: The DiagMsg component keeps an internal buffer of this many messages. This allows sending several small messages without waiting for their completion. ASSERT_NONE: Disables assertion checking ASSERT_LEDON: Turns on LED0 when an assert fails. tinyos-2.1.2+dfsg/tos/lib/fragpool/000077500000000000000000000000001207233610700171455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPool.nc000066400000000000000000000122521207233610700220660ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Support for a memory pool that fragments a large block into * arbitrarily sized smaller blocks based on need. * * The use case is buffer management for arbitrarily-sized messages, * such as HDLC frames received. A client requests a block of memory, * fills part of it, then returns the remainder to the pool. It may * then request a new block, while the newly received message is * processed. Ultimately, the fragment is released back to the pool. * The largest available fragment is returned for each request. * * @author Peter A. Bigot */ interface FragmentPool { /** Size of the pool, in bytes */ async command unsigned int poolSize (); /** Number of slots for the pool * * This imposes an upper limit on the number of fragments allowed. */ async command unsigned int slotCount (); /** Get the longest available fragment in the pool. * * @note No error checking is done on the pointers passed to this * method. You must provide addresses for both the start and the * end fragment pointer. * * @param start Pointer to where the start of the fragment should be * written. The address will be 16-bit aligned. The stored value * is valid only when this function returns SUCCESS. * * @param end Pointer to where the end of the fragment should be * written. This is the offset at which writing is no longer * permitted. The stored value is valid only when this function * returns SUCCESS. * * @param minimum_size Minimum size, in bytes, that is useful to * the caller. If the largest available fragment is not at least * this size, returns ENOMEM. * * @return SUCCESS if a fragment is available. ENOMEM if no * fragments are available. start and end are updated only if this * returns SUCCESS. */ async command error_t request (uint8_t** start, uint8_t** end, unsigned int minimum_size); /** Release part of a previously allocated fragment. * * Note that a lack of available slots may prevent the fragment from * being split, so there is no guarantee that the remainder of the * fragment is available for re-use. If it is, available() will be * signaled. If it is not, the entire fragment remains allocated * until it is released. * * @param start Pointer to the fragment start. Must be a value * previously returned by request but which has not been released or * frozen. * * @param end Pointer to the first byte of the released portion of * the fragment. * * @return SUCCESS in absence of an error, whether or not the * remainder of the fragment could be made available. EINVAL if the * provided start does not correspond to a fragment, or if the end * is outside the fragment. */ async command error_t freeze (const uint8_t* start, const uint8_t* end); /** Release the fragment at the given address. * * @param start The address returned as start from a previous * request that has not been released. * * @return SUCCESS if the fragment was freed. EINVAL if the start * address does not correspond to a fragment. EALREADY if the * fragment had already been released. */ async command error_t release (const uint8_t* start); /** Notification that a new fragment is available. * * Clients that require a minimum buffer length in order to function * may link to this event to be notified when a candidate is * created. * * @param length The number of bytes in the newly released * fragment. */ async event void available (unsigned int length); } tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPoolC.nc000066400000000000000000000055661207233610700222030ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "FragmentPoolImpl.h" /** Allocate a block of memory that can be partioned into individual * fragments. * * There is no limit on the duration that a fragment may be held, nor * any assumption on the order in which fragments are released. * Requests will fail only if the entire pool is in use. * * @param POOL_SIZE_B the number of bytes in the fragmentable buffer. * This must be a multiple of two, to preserve 16-bit alignment. It's * not checked in the code, so don't be a goober and ignore this * requirement. * * @param FRAGMENT_COUNT the maximum number of fragments * * @author Peter A. Bigot */ generic configuration FragmentPoolC (unsigned int POOL_SIZE_B, unsigned int FRAGMENT_COUNT) { provides { interface FragmentPool; #if TEST_FRAGMENT_POOL interface FragmentPoolStorage; #endif /* TEST_FRAGMENT_POOL */ } } implementation { enum { POOL_ID = unique(UQ_FRAGMENT_POOL) }; components new FragmentPoolStorageP(POOL_ID, POOL_SIZE_B, FRAGMENT_COUNT); components FragmentPoolImplC; FragmentPoolImplC.FragmentPoolStorage[POOL_ID] -> FragmentPoolStorageP; FragmentPool = FragmentPoolImplC.FragmentPool[POOL_ID]; #if TEST_FRAGMENT_POOL FragmentPoolStorage = FragmentPoolStorageP; #endif /* TEST_FRAGMENT_POOL */ } tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPoolImpl.h000066400000000000000000000055601207233610700225430ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #ifndef _FRAGMENT_POOL_IMPL_H_ #define _FRAGMENT_POOL_IMPL_H_ /** The code used for unique identifiers for fragment pool */ #define UQ_FRAGMENT_POOL "Unique.FragmentPool" /** Type used for a fragment pool identifier. * * @note The test and validation infrastructure assumes this can take * negative values, so don't make it unsigned. */ typedef int fragment_pool_id_t; /** Structure used to represent a signal fragment of a pool. The * implementation maintains an array of these. The following * invariants hold: * * + the start address of the pool is the start address of the first * fragment * * + the sum of the absolute values of the fragment lengths equals the * size of the pool * * + if the length of fragment i is zero, the length of all following * fragments is zero * * + if the length of a fragment i is positive, the length of fragment * i+1 is non-positive (adjacent free fragments are merged) */ typedef struct FragmentPoolSlot_t { /** Pointer to the start of the fragment. Undefined if the slot * is not in use. */ uint8_t* start; /** Length of the fragment. If negative, the fragment is in use. * If zero, the slot is not in use. If positive, the fragment is * available. */ int length; } FragmentPoolSlot_t; #endif /* _FRAGMENT_POOL_IMPL_H_ */ tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPoolImpl.nc000066400000000000000000000037411207233610700227130ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "FragmentPoolImpl.h" /** Internal interface used to communicate specific pool data to the * infrastructure. * * @author Peter A. Bigot */ interface FragmentPoolImpl { /** Return a pointer to the array of slots for a specific pool */ async command FragmentPoolSlot_t* slots (); /** Return the number of slots for a specific pool */ async command unsigned int slotCount (); } tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPoolImplC.nc000066400000000000000000000045421207233610700230160ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "FragmentPoolImpl.h" /** Configuration that links together all the pools with the pool * management implementation. * * @author Peter A. Bigot */ configuration FragmentPoolImplC { provides { interface FragmentPool[fragment_pool_id_t]; #if TEST_FRAGMENT_POOL interface FragmentPoolTest; #endif /* TEST_FRAGMENT_POOL */ } uses { interface FragmentPoolStorage[fragment_pool_id_t]; } } implementation { enum { NUM_POOLS = uniqueCount(UQ_FRAGMENT_POOL) }; components new FragmentPoolImplP(NUM_POOLS); FragmentPool = FragmentPoolImplP; FragmentPoolStorage = FragmentPoolImplP; #if TEST_FRAGMENT_POOL FragmentPoolTest = FragmentPoolImplP; #endif /* TEST_FRAGMENT_POOL */ components MainC; MainC.SoftwareInit -> FragmentPoolImplP; } tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPoolImplP.nc000066400000000000000000000277021207233610700230360ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Module to implement management of all fragment pools. * * @param NUM_POOLS The total number of pools allocated throughout the * system. * * @author Peter A. Bigot */ generic module FragmentPoolImplP (unsigned int NUM_POOLS) { provides { interface Init; interface FragmentPool[fragment_pool_id_t]; #if TEST_FRAGMENT_POOL interface FragmentPoolTest; #endif /* TEST_FRAGMENT_POOL */ } uses { interface FragmentPoolStorage[fragment_pool_id_t]; } } implementation { /** Information on a specific pool */ typedef struct FragmentPool_t { /** Where the slot array for the pool got placed */ FragmentPoolSlot_t* slots; /** The number of slots in the pool */ unsigned int slot_count; } FragmentPool_t; /** Data for all pools. The slots array contents of each structure * must be maintained atomically. */ FragmentPool_t pools__[NUM_POOLS]; #if TEST_FRAGMENT_POOL async command unsigned int FragmentPoolTest.numPools () { return sizeof(pools__) / sizeof(*pools__); } async command FragmentPoolSlot_t* FragmentPoolTest.slots (fragment_pool_id_t pid) { return pools__[pid].slots; } async command unsigned int FragmentPoolTest.slotCount (fragment_pool_id_t pid) { return pools__[pid].slot_count; } async command uint8_t* FragmentPoolTest.pool (fragment_pool_id_t pid) { return call FragmentPoolStorage.pool[pid](); } async command unsigned int FragmentPoolTest.poolSize (fragment_pool_id_t pid) { return call FragmentPoolStorage.poolSize[pid](); } #endif /* TEST_FRAGMENT_POOL */ bool initialized__; void initialize__ () { if (! initialized__) { int pid; /* Extract the individual pool data. Note that each pool can be a * different size, and have a different number of slots. This * code relies on zero-init of pools__ to maintain the slot * invariants. */ for (pid = 0; pid < NUM_POOLS; ++pid) { FragmentPool_t* pp = pools__ + pid; pp->slots = call FragmentPoolStorage.slots[pid](); pp->slot_count = call FragmentPoolStorage.slotCount[pid](); if (0 < pp->slot_count) { pp->slots[0].start = call FragmentPoolStorage.pool[pid](); pp->slots[0].length = call FragmentPoolStorage.poolSize[pid](); } } initialized__ = TRUE; } } #define CHECK_INITIALIZED__() atomic do { if (! initialized__) { initialize__(); } } while (0) command error_t Init.init () { atomic initialize__(); return SUCCESS; } default async command fragment_pool_id_t FragmentPoolStorage.id[ fragment_pool_id_t pid] () { return -1; } default async command uint8_t* FragmentPoolStorage.pool[ fragment_pool_id_t pid] () { return 0; } default async command unsigned int FragmentPoolStorage.poolSize[ fragment_pool_id_t pid] () { return 0; } default async command FragmentPoolSlot_t* FragmentPoolStorage.slots[ fragment_pool_id_t pid] () { return 0; } default async command unsigned int FragmentPoolStorage.slotCount[ fragment_pool_id_t pid] () { return 0; } default async event void FragmentPool.available[ fragment_pool_id_t pid] (unsigned int length) { } async command unsigned int FragmentPool.poolSize[ fragment_pool_id_t pid] () { return call FragmentPoolStorage.poolSize[pid](); } async command unsigned int FragmentPool.slotCount[ fragment_pool_id_t pid] () { return call FragmentPoolStorage.slotCount[pid](); } #if DEBUG_FRAGMENT_POOL void validatePool__ (fragment_pool_id_t pid) { FragmentPoolSlot_t* sp = pools_[pid].slots; FragmentPoolSlot_t* spe = sp + pools_[pid].slot_count; unsigned int size = 0; while (sp < spe) { size += abs(sp->length); ++sp; } if (call FragmentPoolStorage.poolSize[pid]() != size) { DisplayCode_lock(15); } } #else #define validatePool__(_p) ((void)0) #endif async command error_t FragmentPool.request[fragment_pool_id_t pid] (uint8_t** start, uint8_t** end, unsigned int minimum_size) { FragmentPoolSlot_t* sp; FragmentPoolSlot_t* spe; FragmentPoolSlot_t* bsp; unsigned int bsp_length; atomic { CHECK_INITIALIZED__(); sp = pools__[pid].slots; spe = sp + pools__[pid].slot_count; /* Find the longest open fragment in the pool that's at least * the requested size. */ bsp = 0; bsp_length = minimum_size; while (sp < spe) { if ((0 < sp->length) && (bsp_length <= sp->length)) { bsp = sp; bsp_length = sp->length; } ++sp; } /* If no satisfactory fragment is available, return failure. */ if (! bsp) { return ENOMEM; } /* Store the return values and mark the fragment in use */ *start = bsp->start; *end = bsp->start + bsp->length; bsp->length = - bsp->length; validatePool__(pid); } // end atomic return SUCCESS; } #if DEBUG_FRAGMENT_POOL volatile const uint8_t* start__; volatile const uint8_t* end__; volatile FragmentPoolSlot_t slots__[8]; #endif async command error_t FragmentPool.freeze[fragment_pool_id_t pid] (const uint8_t* start, const uint8_t* end) { FragmentPoolSlot_t* sp; FragmentPoolSlot_t* spe; unsigned int free_length; bool need_release = FALSE; //CHECK_INITIALIZED__(); sp = pools__[pid].slots; spe = sp + pools__[pid].slot_count; atomic { uint8_t* fep; #if DEBUG_FRAGMENT_POOL start__ = start; end__ = end; memcpy(slots__, pools_[pid].slots, pools_[pid].slot_count * sizeof(*slots__)); #endif while ((sp < spe) && (start != sp->start)) { ++sp; } if (sp == spe) { return EINVAL; } /* Get a pointer to the end of the original fragment */ fep = sp->start - sp->length; if ((end < sp->start) || (fep < end)) { // end not within fragment: error return EINVAL; } /* Determine how many bytes are potentially released. If it's * an odd number, decrement it to ensure fragment sizes are * multiples of two. */ free_length = fep - end; if (1 & free_length) { --free_length; } if (sp->start == end) { // Releasing whole thing; just use that implementation // (outside atomic block) need_release = TRUE; goto post_atomic; } if ((0 == free_length) || ((sp+1) == spe)) { // Entire fragment remains frozen; or, there're no slots to // merge to: short exit return SUCCESS; } if (0 < sp[1].length) { /* The following fragment is free, we can adjust its start to * merge it with the released portion without using any * additional slots. */ sp->length += free_length; ++sp; sp->start -= free_length; sp->length += free_length; } else { if (0 > sp[1].length) { /* Next slot holds a frozen fragment. We'll need to shift * it and everything that follows up one slot. If there are * no unused slots at the end, we just leave this fragment * fully allocated. */ if (0 != spe[-1].length) { // Last slot is used: no room to shift return SUCCESS; } /* Shift spe down to point to the first unused slot above * sp+1 (which we know is used) */ while (((sp+2) < spe) && (0 == spe[-1].length)) { --spe; } memmove(sp+2, sp+1, (spe - (sp+1)) * sizeof(*sp)); } sp->length += free_length; sp[1].start = sp->start - sp->length; ++sp; sp->length = free_length; } free_length = sp->length; post_atomic: validatePool__(pid); /*FALLTHRU*/ } /* atomic */ if (need_release) { return call FragmentPool.release[pid](start); } signal FragmentPool.available[pid](free_length); return SUCCESS; } async command error_t FragmentPool.release[fragment_pool_id_t pid] (const uint8_t* start) { FragmentPoolSlot_t* sp; FragmentPoolSlot_t* spe; FragmentPoolSlot_t* bsp; FragmentPoolSlot_t* asp; unsigned int merged_length; //CHECK_INITIALIZED__(); sp = pools__[pid].slots; spe = sp + pools__[pid].slot_count; atomic { /* Scan for the fragment at the given address. */ while ((sp < spe) && (start != sp->start)) { ++sp; } /* Two ways to fail: we didn't find the fragment, or the fragment * isn't in use. They're both catastrophic: one is a user * failure, the other may be either a user or an infrastructure * failure. Give the user a chance to identify the problem. */ if (sp == spe) { return EINVAL; } if (0 <= sp->length) { return EALREADY; } /* Release the fragment */ sp->length = -sp->length; /* See whether we can merge with the slot below and/or above * this one. */ bsp = asp = sp; if ((pools__[pid].slots < bsp) && (0 < bsp[-1].length)) { --bsp; } if (((asp+1) < spe) && (0 < asp[1].length)) { ++asp; } /* bsp points to the slot holding the start of the merged * fragment. asp points to the last slot that can be aggregated * into the merged fragment. If they aren't the same, there are * dead slots we can re-use. Shift the active slots above asp * down to above bsp, and reset the state of the rest. */ sp = bsp; if (bsp < asp) { int num_freed_slots = asp - bsp; /* Aggregate the lengths from the intervening slots into the first * one. */ asp = bsp; while (asp++ < (bsp + num_freed_slots)) { bsp->length += asp->length; } /* Keep copying until we've hit the upper bound or an unused * slot */ while (asp < spe) { asp[-num_freed_slots] = *asp; if (0 == asp->length) { break; } ++asp; } /* Mark unused the slots we freed */ bsp = asp - num_freed_slots; while (bsp < asp) { bsp->length = 0; ++bsp; } } merged_length = sp->length; validatePool__(pid); } // end atomic signal FragmentPool.available[pid](merged_length); return SUCCESS; } #undef CHECK_INITIALIZED__ } tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPoolStorage.nc000066400000000000000000000046411207233610700234160ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "FragmentPoolImpl.h" /** Provide the core configuration information for a specific pool. * * This interface allows each pool to have a different buffer size and * number of available slots. On software initialization, the overall * pool manager collects the basic information for each pool and * initializes the data structures. * * @author Peter A. Bigot */ interface FragmentPoolStorage { /** The identifier for the pool; debug use only */ async command fragment_pool_id_t id (); /** Address of the start of the pool */ async command uint8_t* pool (); /** Size of the pool, in bytess */ async command unsigned int poolSize (); /** Pointer to the array of slots for the pool */ async command FragmentPoolSlot_t* slots (); /** Number of slots for the pool */ async command unsigned int slotCount (); } tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPoolStorageP.nc000066400000000000000000000053421207233610700235350ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "FragmentPoolImpl.h" /** The module that reserves storage for the pool. * * @param POOL_SIZE_B the number of bytes in the fragmentable buffer * @param FRAGMENT_COUNT the maximum number of fragments * * @author Peter A. Bigot */ generic module FragmentPoolStorageP (fragment_pool_id_t POOL_ID, unsigned int POOL_SIZE_B, unsigned int FRAGMENT_COUNT) { provides interface FragmentPoolStorage; } implementation { /** The pool buffer. Aligned to 16-bits. */ uint16_t pool[(1 + POOL_SIZE_B) / 2]; /** Information on fragmentation of the buffer */ FragmentPoolSlot_t slots[FRAGMENT_COUNT]; // = { { (uint8_t*)pool, sizeof(pool) } }; async command fragment_pool_id_t FragmentPoolStorage.id () { return POOL_ID; } async command uint8_t* FragmentPoolStorage.pool () { return (uint8_t*)pool; } async command unsigned int FragmentPoolStorage.poolSize () { return sizeof(pool); } async command FragmentPoolSlot_t* FragmentPoolStorage.slots () { return slots; } async command unsigned int FragmentPoolStorage.slotCount () { return sizeof(slots) / sizeof(*slots); } } tinyos-2.1.2+dfsg/tos/lib/fragpool/FragmentPoolTest.nc000066400000000000000000000054211207233610700227260ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "FragmentPoolImpl.h" /** Back-end interface for white-box testing of implementation. * * Provides low-level access to the internals of FragmentPoolImplP so * that we can externally verify maintenance of the slot invariants * and retrieve other information that is not normally necessary in * client modules. * * @author Peter A. Bigot */ interface FragmentPoolTest { /** The number of pools supported by the system */ async command unsigned int numPools (); /** Access the slot data for a given pool. * * @param pid The pool id for which the first slot is requested */ async command FragmentPoolSlot_t* slots (fragment_pool_id_t pid); /** Provide the number of slots in the given pool. * * @param pid The pool id for which the slot count is requested */ async command unsigned int slotCount (fragment_pool_id_t pid); /** Access the buffer for a given pool. * * @param pid The pool id for which the buffer is requested */ async command uint8_t* pool (fragment_pool_id_t pid); /** Provide the size of the given pool. * * @param pid The pool id for which the pool size is requested */ async command unsigned int poolSize (fragment_pool_id_t pid); } tinyos-2.1.2+dfsg/tos/lib/fragpool/README.txt000066400000000000000000000015471207233610700206520ustar00rootroot00000000000000Introduction to FragmentPoolC This utility provides support for a memory pool that fragments a large block into arbitrarily sized smaller blocks based on need. The use case is buffer management for arbitrarily-sized messages, such as HDLC frames received. A client requests a block of memory, fills part of it, then returns the remainder to the pool. It may then request a new block, while the newly received message is processed. Ultimately, the fragment is released back to the pool. The largest available fragment is returned for each request. The size of the buffer and the number of fragments that can be simultaneously supported are individually configurable for each pool. There is no limit on the duration that a fragment may be held, nor any assumption on the order in which fragments are released. Requests will fail only if the entire pool is in use. tinyos-2.1.2+dfsg/tos/lib/fragpool/tests/000077500000000000000000000000001207233610700203075ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/fragpool/tests/Basic/000077500000000000000000000000001207233610700213305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/fragpool/tests/Basic/Makefile000066400000000000000000000002151207233610700227660ustar00rootroot00000000000000COMPONENT = TestAppC PFLAGS += -DTEST_FRAGMENT_POOL PFLAGS += -I$(TOSDIR)/lib/fragpool PFLAGS += -I$(TOSDIR)/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/tos/lib/fragpool/tests/Basic/TestAppC.nc000066400000000000000000000040361207233610700233400ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Unit test for the behavior of the FragmentPool infrastructure. * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP; components MainC; TestP.Boot -> MainC; components new FragmentPoolC(1024, 10); TestP.FragmentPool -> FragmentPoolC; TestP.FragmentPoolStorage -> FragmentPoolC; components FragmentPoolImplC; TestP.FragmentPoolTest -> FragmentPoolImplC; #include } tinyos-2.1.2+dfsg/tos/lib/fragpool/tests/Basic/TestP.nc000066400000000000000000000477401207233610700227250ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include module TestP { uses { interface Boot; interface FragmentPool; interface FragmentPoolStorage; interface FragmentPoolTest; } #include } implementation { #include #ifndef MAX_SLOTS #define MAX_SLOTS (20) #endif /* MAX_SLOTS */ /** Length of the fragment from the most recent * FragmentPool.available() event. Normally set to -1 to indicate * no fragments have been released. */ int fragmentLength_; uint8_t* fragments_[MAX_SLOTS]; unsigned int fragmentLengths_[MAX_SLOTS]; async event void FragmentPool.available (unsigned int length) { fragmentLength_ = length; } int verifyPoolIntegrity (fragment_pool_id_t pid, const char* tag) { FragmentPoolSlot_t* slots = call FragmentPoolTest.slots(pid); unsigned int slot_count = call FragmentPoolTest.slotCount(pid); uint8_t* pool = call FragmentPoolTest.pool(pid); unsigned int pool_size = call FragmentPoolTest.poolSize(pid); uint8_t* pp = pool; unsigned int size = 0; int sid = 0; int used_fragments = 0; printf("Verifying integrity of pool %d for %s\r\n", pid, tag); while (sid < slot_count) { FragmentPoolSlot_t* sp = slots + sid; //printf(" SLOT[%d] : %p %d\r\n", sid, sp->start, sp->length); /* Stop on unused slot */ if (0 == sp->length) { break; } /* Fragment should start at proper address */ ASSERT_EQUAL_PTR(pp, sp->start); /* Adjust next fragment address and total length */ if (0 < sp->length) { /* Fragment is available */ pp += sp->length; size += sp->length; if (0 < sid) { /* Previous fragment must be in use */ ASSERT_TRUE(0 > slots[sid-1].length); } if ((sid+1) < slot_count) { /* Next slot must not be available */ ASSERT_TRUE(0 >= slots[sid+1].length); } } else { // (0 > sp->length) /* Fragment is in use */ ++used_fragments; pp -= sp->length; size -= sp->length; } ++sid; } /* Entire pool must be accounted for in fragments */ ASSERT_EQUAL(pool_size, size); /* Remainder of pool slots must be marked unused */ while (sid < slot_count) { FragmentPoolSlot_t* sp = slots + sid; //printf(" SLOT[%d] : UNUSED %p %d\r\n", sid, sp->start, sp->length); ASSERT_EQUAL(0, sp->length); // ASSERT_EQUAL_PTR(0, sp->start); ++sid; } printf("done Verifying integrity of pool %d for %s; %d fragments in use\r\n", pid, tag, used_fragments); /* Return the number of fragments that were in use */ return used_fragments; } void verifyPoolAvailable (fragment_pool_id_t pid, const char* tag) { int n; printf("Verifying pool %d is completely available at %s\r\n", pid, tag); n = verifyPoolIntegrity(pid, tag); ASSERT_EQUAL(0, n); printf("done Verifying pool %d is completely available at %s\r\n", pid, tag); } void testPoolCount () { ASSERT_EQUAL(1, call FragmentPoolTest.numPools()); ASSERT_EQUAL(call FragmentPoolTest.slotCount(0), call FragmentPoolStorage.slotCount()); } void testPoolInit () { fragment_pool_id_t pid; pid = call FragmentPoolTest.numPools(); while (0 <= --pid) { FragmentPoolSlot_t* slots = call FragmentPoolTest.slots(pid); int slot_count = call FragmentPoolTest.slotCount(pid); int sid = 0; ASSERT_EQUAL_PTR(slots[sid].start, call FragmentPoolStorage.pool()); ASSERT_TRUE(0 == (1 & ((uint16_t)slots[sid].start))); ASSERT_EQUAL(slots[sid].length, call FragmentPoolStorage.poolSize()); ASSERT_TRUE(0 == (1 & slots[sid].length)); while (++sid < slot_count) { ASSERT_EQUAL_PTR(slots[sid].start, 0); ASSERT_EQUAL(slots[sid].length, 0); } } ASSERT_EQUAL(call FragmentPool.poolSize(), call FragmentPoolStorage.poolSize()); ASSERT_EQUAL(call FragmentPool.slotCount(), call FragmentPoolStorage.slotCount()); } void testPool0Params () { printf("Pool id %d ; addr %p ; size %u ; slots %p ; slotCount %u\r\n", call FragmentPoolStorage.id(), call FragmentPoolStorage.pool(), call FragmentPoolStorage.poolSize(), call FragmentPoolStorage.slots(), call FragmentPoolStorage.slotCount()); ASSERT_EQUAL(0, call FragmentPoolStorage.id()); ASSERT_EQUAL(1024, call FragmentPoolStorage.poolSize()); ASSERT_EQUAL(10, call FragmentPoolStorage.slotCount()); } void testSingleAlloc () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); FragmentPoolSlot_t* slots = call FragmentPoolTest.slots(pid); //unsigned int slot_count = call FragmentPoolTest.slotCount(pid); uint8_t* pool = call FragmentPoolStorage.pool(); unsigned int pool_size = call FragmentPoolStorage.poolSize(); uint8_t* start; uint8_t* end; uint8_t* start2; uint8_t* end2; error_t rc; verifyPoolAvailable(pid, "testSingleAlloc.pre"); rc = call FragmentPool.request(&start, &end, 0); /* Returned fragment equals entire pool */ ASSERT_EQUAL(SUCCESS, rc); ASSERT_EQUAL_PTR(pool, start); ASSERT_EQUAL_PTR(start + pool_size, end); /* One slot, all in use */ ASSERT_EQUAL_PTR(pool, slots[0].start); ASSERT_EQUAL(- pool_size, slots[0].length); ASSERT_EQUAL_PTR(0, slots[1].start); ASSERT_EQUAL(0, slots[1].length); /* Can't allocate another fragment */ rc = call FragmentPool.request(&start2, &end2, 0); ASSERT_EQUAL(ENOMEM, rc); /* Release the fragment */ fragmentLength_ = -1; rc = call FragmentPool.release(start); ASSERT_EQUAL(SUCCESS, rc); ASSERT_EQUAL(pool_size, fragmentLength_); /* One slot, available */ ASSERT_EQUAL_PTR(pool, slots[0].start); ASSERT_EQUAL(pool_size, slots[0].length); ASSERT_EQUAL_PTR(0, slots[1].start); ASSERT_EQUAL(0, slots[1].length); verifyPoolAvailable(pid, "testSingleAlloc.post"); } void testDoubleAlloc () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); FragmentPoolSlot_t* slots = call FragmentPoolTest.slots(pid); //unsigned int slot_count = call FragmentPoolTest.slotCount(pid); uint8_t* pool = call FragmentPoolStorage.pool(); unsigned int pool_size = call FragmentPoolStorage.poolSize(); uint8_t* start; uint8_t* end; unsigned int length; int rv; error_t rc; verifyPoolAvailable(pid, "testDoubleAlloc.init"); rc = call FragmentPool.request(&start, &end, 0); /* Returned fragment equals entire pool */ ASSERT_EQUAL(SUCCESS, rc); ASSERT_EQUAL_PTR(pool, start); ASSERT_EQUAL_PTR(start + pool_size, end); /* One slot, all in use */ rv = verifyPoolIntegrity(pid, "testDoubleAlloc.post1"); ASSERT_EQUAL(1, rv); /* Freeze half the pool */ length = (end - start) / 2; fragmentLength_ = -1; rc = call FragmentPool.freeze(start, start + length); ASSERT_EQUAL(SUCCESS, rc); ASSERT_EQUAL(length, fragmentLength_); rv = verifyPoolIntegrity(pid, "testDoubleAlloc.postRel1"); ASSERT_EQUAL(1, rv); ASSERT_EQUAL(pool_size - length, slots[1].length); ASSERT_EQUAL_PTR(pool + length, slots[1].start); /* Release the frozen half */ fragmentLength_ = -1; rc = call FragmentPool.release(start); ASSERT_EQUAL(SUCCESS, rc); ASSERT_EQUAL(pool_size, fragmentLength_); // merged fragment is entire pool verifyPoolAvailable(pid, "testDoubleAlloc.done"); } // Check that we cannot allocate more fragments than there are // slots, even if there is space available. void testOverPartition () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); unsigned int slot_count = call FragmentPoolTest.slotCount(pid); unsigned int pool_size = call FragmentPoolStorage.poolSize(); char tag[16]; error_t rc; int length = 0; int sid; int n; uint8_t* start; uint8_t* end; ASSERT_TRUE(slot_count <= MAX_SLOTS); verifyPoolAvailable(pid, "testOverPartition.init"); sid = 0; while (sid < slot_count) { rc = call FragmentPool.request(&start, &end, 0); ASSERT_EQUAL(SUCCESS, rc); sprintf(tag, "tOP %d req", sid); verifyPoolIntegrity(pid, tag); fragments_[sid] = start; ++sid; fragmentLength_ = -1; rc = call FragmentPool.freeze(start, start + 2*sid); ASSERT_EQUAL(SUCCESS, rc); if (sid < slot_count) { length += 2*sid; ASSERT_EQUAL(fragmentLength_, pool_size - length); } else { // No slots to partition last fragment ASSERT_EQUAL(fragmentLength_, -1); } sprintf(tag, "tOP %d frz", sid); n = verifyPoolIntegrity(pid, tag); ASSERT_EQUAL(sid, n); } rc = call FragmentPool.request(&start, &end, 0); ASSERT_EQUAL(ENOMEM, rc); verifyPoolIntegrity(pid, "tOP.denied"); while (0 <= --sid) { fragmentLength_ = -1; rc = call FragmentPool.release(fragments_[sid]); sprintf(tag, "tOP %d rel", sid); verifyPoolIntegrity(pid, tag); ASSERT_EQUAL(fragmentLength_, pool_size - length); length -= 2*sid; } verifyPoolAvailable(pid, "testOverPartition.done"); } int partitionPool (uint8_t** fragments, fragment_pool_id_t pid, int num_fragments) { unsigned int slot_count = call FragmentPoolTest.slotCount(pid); unsigned int pool_size = call FragmentPoolStorage.poolSize(); uint8_t* start = 0; uint8_t* end; int sid; int per_fragment_length; error_t rc; int n; if (num_fragments > slot_count) { num_fragments = slot_count; } per_fragment_length = pool_size / num_fragments; for (sid = 0; sid < num_fragments; ++sid) { if (0 < sid) { rc = call FragmentPool.freeze(start, start + per_fragment_length); ASSERT_EQUAL(SUCCESS, rc); fragmentLengths_[sid-1] = per_fragment_length; } rc = call FragmentPool.request(&start, &end, 0); ASSERT_EQUAL(SUCCESS, rc); fragments_[sid] = start; } fragmentLengths_[sid-1] = pool_size - (num_fragments - 1) * per_fragment_length; n = verifyPoolIntegrity(pid, "partitionPool"); ASSERT_EQUAL(num_fragments, n); return num_fragments; } void testFreezeMisuse () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); uint8_t* pool = call FragmentPoolStorage.pool(); unsigned int pool_size = call FragmentPoolStorage.poolSize(); int length; uint8_t* start; uint8_t* end; error_t rc; // pass invalid start pointer verifyPoolAvailable(pid, "testFreezeMisuse.init"); rc = call FragmentPool.freeze(pool, pool + pool_size); ASSERT_EQUAL(EINVAL, rc); rc = call FragmentPool.freeze(pool + 4, pool + 8); ASSERT_EQUAL(EINVAL, rc); rc = call FragmentPool.request(&start, &end, 0); ASSERT_EQUAL(SUCCESS, rc); length = 1 + pool_size / 4; // end not in fragment rc = call FragmentPool.freeze(start, start - 4); ASSERT_EQUAL(EINVAL, rc); rc = call FragmentPool.freeze(start, end + 4); ASSERT_EQUAL(EINVAL, rc); // end equals fragment end rc = call FragmentPool.freeze(start, end); ASSERT_EQUAL(SUCCESS, rc); // end equals start rc = call FragmentPool.freeze(start, start); ASSERT_EQUAL(SUCCESS, rc); verifyPoolAvailable(pid, "testFreezeMisuse.freezeStart"); } // test full and partial slot usage void testForwardReleaseFull () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); unsigned int slot_count = call FragmentPoolTest.slotCount(pid); int num_fragments = partitionPool(fragments_, pid, slot_count); char tag[16]; int sid; error_t rc; int n; ASSERT_EQUAL(slot_count, num_fragments); for (sid = 0; sid < num_fragments; ++sid) { sprintf(tag, "tFRF.%d", sid); n = verifyPoolIntegrity(pid, tag); ASSERT_EQUAL(num_fragments - sid, n); rc = call FragmentPool.release(fragments_[sid]); ASSERT_EQUAL(SUCCESS, rc); } verifyPoolAvailable(pid, "tFRF.done"); } void testBackwardReleaseFull () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); unsigned int slot_count = call FragmentPoolTest.slotCount(pid); int num_fragments = partitionPool(fragments_, pid, slot_count); char tag[16]; int rsid; int sid; error_t rc; int n; ASSERT_EQUAL(slot_count, num_fragments); for (rsid = 0; rsid < num_fragments; ++rsid) { sid = num_fragments - rsid - 1; sprintf(tag, "tBRF.%d", rsid); n = verifyPoolIntegrity(pid, tag); ASSERT_EQUAL(num_fragments - rsid, n); rc = call FragmentPool.release(fragments_[sid]); ASSERT_EQUAL(SUCCESS, rc); } verifyPoolAvailable(pid, "tFRF.done"); } void testMiddleRelease () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); unsigned int slot_count = call FragmentPoolTest.slotCount(pid); int num_fragments = partitionPool(fragments_, pid, slot_count); char tag[16]; int nfreed; int sid; error_t rc; int n; ASSERT_EQUAL(slot_count, num_fragments); nfreed = 0; // Release the odd-numbered fragments nfreed = 0; for (sid = 1; sid < num_fragments; sid += 2) { sprintf(tag, "tMR.%d", sid); rc = call FragmentPool.release(fragments_[sid]); fragments_[sid] = 0; ++nfreed; n = verifyPoolIntegrity(pid, tag); ASSERT_EQUAL(num_fragments - nfreed, n); } n = verifyPoolIntegrity(pid, "tMR.evenRel"); ASSERT_EQUAL(slot_count / 2, n); // Release fragment 2. This merges with 1 and 3 already released. fragmentLength_ = -1; rc = call FragmentPool.release(fragments_[2]); ASSERT_EQUAL(SUCCESS, rc); fragments_[2] = 0; ++nfreed; ASSERT_EQUAL(fragmentLength_, fragmentLengths_[1] + fragmentLengths_[2] + fragmentLengths_[3]); n = verifyPoolIntegrity(pid, "tMR.2"); ASSERT_EQUAL(num_fragments - nfreed, n); // Release the remaining fragments for (sid = 0; sid < num_fragments; ++sid) { if (0 == fragments_[sid]) { continue; } sprintf(tag, "tMR.%d", sid); rc = call FragmentPool.release(fragments_[sid]); ASSERT_EQUAL(SUCCESS, rc); ++nfreed; n = verifyPoolIntegrity(pid, tag); ASSERT_EQUAL(num_fragments - nfreed, n); } verifyPoolAvailable(pid, "tFRF.done"); } void testAlignment () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); FragmentPoolSlot_t* slots = call FragmentPoolTest.slots(pid); error_t rc; uint8_t* start; uint8_t* end; rc = call FragmentPool.request(&start, &end, 0); ASSERT_TRUE(0 == (1 & ((uint16_t)start))); ASSERT_TRUE(0 == (1 & ((uint16_t)end))); rc = call FragmentPool.freeze(start, start + 3); ASSERT_EQUAL_PTR(start, slots[0].start); ASSERT_EQUAL(-4, slots[0].length); ASSERT_EQUAL_PTR(start+4, slots[1].start); rc = call FragmentPool.release(start); } void testMiddleFreeze () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); unsigned int slot_count = call FragmentPoolTest.slotCount(pid); int num_fragments = partitionPool(fragments_, pid, slot_count); int rsid; error_t rc; ASSERT_EQUAL(slot_count, num_fragments); verifyPoolIntegrity(pid, "mf1"); /* Release slot 2 */ rc = call FragmentPool.release(fragments_[2]); fragments_[2] = 0; ASSERT_EQUAL(SUCCESS, rc); /* Freeze slot 1 */ rc = call FragmentPool.freeze(fragments_[1], fragments_[1] + 5); ASSERT_EQUAL(SUCCESS, rc); verifyPoolIntegrity(pid, "mf2"); for (rsid = 0; rsid < num_fragments; ++rsid) { if (fragments_[rsid]) { rc = call FragmentPool.release(fragments_[rsid]); } } verifyPoolAvailable(pid, "mf3"); } void testMinimumSize () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); unsigned int slot_count = call FragmentPoolTest.slotCount(pid); int num_fragments = partitionPool(fragments_, pid, slot_count); uint8_t* start; uint8_t* end; int frag_size; int rsid; error_t rc; ASSERT_EQUAL(slot_count, num_fragments); verifyPoolIntegrity(pid, "mf1"); /* Release slot 2 */ fragmentLength_ = -1; rc = call FragmentPool.release(fragments_[2]); ASSERT_EQUAL(SUCCESS, rc); ASSERT_TRUE(0 < fragmentLength_); frag_size = fragmentLength_ + 3; rc = call FragmentPool.request(&start, &end, frag_size); ASSERT_EQUAL(ENOMEM, rc); rc = call FragmentPool.release(fragments_[3]); ASSERT_EQUAL(SUCCESS, rc); ASSERT_TRUE(frag_size < fragmentLength_); rc = call FragmentPool.request(&start, &end, frag_size); ASSERT_EQUAL(SUCCESS, rc); rc = call FragmentPool.release(start); ASSERT_EQUAL(SUCCESS, rc); verifyPoolIntegrity(pid, "mf2"); for (rsid = 0; rsid < num_fragments; ++rsid) { if (fragments_[rsid]) { rc = call FragmentPool.release(fragments_[rsid]); } } verifyPoolAvailable(pid, "mf3"); } void testDoubleFreezeInternal () { fragment_pool_id_t pid = call FragmentPoolStorage.id(); unsigned int slot_count = call FragmentPoolTest.slotCount(pid); int num_fragments = partitionPool(fragments_, pid, slot_count); uint8_t* start; uint8_t* end; int frag_size; int rsid; error_t rc; /* Set up so the first N-1 slots are used, with the last one * empty */ call FragmentPool.release(fragments_[slot_count-1]); call FragmentPool.release(fragments_[slot_count-2]); rc = call FragmentPool.request(&start, &end, 0); verifyPoolIntegrity(pid, "dfi1"); /* Now reduce the size of the second-to-last active slot */ call FragmentPool.freeze(fragments_[slot_count-3], fragments_[slot_count-3] + 5); verifyPoolIntegrity(pid, "dfi2"); call FragmentPool.release(start); for (rsid = 0; rsid < num_fragments; ++rsid) { if (fragments_[rsid]) { rc = call FragmentPool.release(fragments_[rsid]); } } verifyPoolAvailable(pid, "dfiend"); } event void Boot.booted () { printf("Starting test of FragmentPool\r\n"); testPoolCount(); testPoolInit(); verifyPoolIntegrity(call FragmentPoolStorage.id(), "begin"); testPool0Params(); testSingleAlloc(); testDoubleAlloc(); testOverPartition(); testFreezeMisuse(); testForwardReleaseFull(); testBackwardReleaseFull(); testMiddleRelease(); testAlignment(); testMiddleFreeze(); testMinimumSize(); testDoubleFreezeInternal(); verifyPoolIntegrity(call FragmentPoolStorage.id(), "end"); ALL_TESTS_PASSED(); } } tinyos-2.1.2+dfsg/tos/lib/ftsp/000077500000000000000000000000001207233610700163105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ftsp/GlobalTime.nc000066400000000000000000000061321207233610700206530ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ #include "Timer.h" interface GlobalTime { /** * Returns the current local time of this mote. */ async command uint32_t getLocalTime(); /** * Reads the current global time. This method is a combination * of getLocalTime and local2Global. * @return SUCCESS if this mote is synchronized, FAIL otherwise. */ async command error_t getGlobalTime(uint32_t *time); /** * Converts the local time given in time into the * corresponding global time and stores this again in * time. The following equation is used to compute the * conversion: * * globalTime = localTime + offset + skew * (localTime - syncPoint) * * The skew is normalized to 0.0 (1.0 is subtracted) to increase the * machine precision. The syncPoint value is periodically updated to * increase the machine precision of the floating point arithmetic and * also to allow time wrap. * * @return SUCCESS if this mote is synchronized, FAIL otherwise. */ async command error_t local2Global(uint32_t *time); /** * Converts the global time given in time into the * correspoding local time and stores this again in * time. This method performs the inverse of the * local2Global transformation. * * @return SUCCESS if this mote is synchronized, FAIL otherwise. */ async command error_t global2Local(uint32_t *time); } tinyos-2.1.2+dfsg/tos/lib/ftsp/TimeSync32kC.nc000077500000000000000000000063341207233610700210210ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti, Brano Kusy, Janos Sallai * Date last modified: 3/17/03 * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) * Adapted for 32kHz and LPL: 6/16/09 by Thomas Schmid (thomas.schmid@ucla.edu) */ #include "TimeSyncMsg.h" configuration TimeSync32kC { uses interface Boot; provides interface Init; provides interface StdControl; provides interface GlobalTime; //interfaces for extra functionality: need not to be wired provides interface TimeSyncInfo; provides interface TimeSyncMode; provides interface TimeSyncNotify; } implementation { components new TimeSyncP(T32khz) as TimeSyncP; GlobalTime = TimeSyncP; StdControl = TimeSyncP; Init = TimeSyncP; Boot = TimeSyncP; TimeSyncInfo = TimeSyncP; TimeSyncMode = TimeSyncP; TimeSyncNotify = TimeSyncP; components TimeSyncMessageC as ActiveMessageC; TimeSyncP.RadioControl -> ActiveMessageC; TimeSyncP.Send -> ActiveMessageC.TimeSyncAMSend32khz[TIMESYNC_AM_FTSP]; TimeSyncP.Receive -> ActiveMessageC.Receive[TIMESYNC_AM_FTSP]; TimeSyncP.TimeSyncPacket -> ActiveMessageC; components Counter32khz32C, new CounterToLocalTimeC(T32khz) as LocalTime32khzC; LocalTime32khzC.Counter -> Counter32khz32C; TimeSyncP.LocalTime -> LocalTime32khzC; components new TimerMilliC() as TimerC; TimeSyncP.Timer -> TimerC; components RandomC; TimeSyncP.Random -> RandomC; #if defined(TIMESYNC_LEDS) components LedsC; #else components NoLedsC as LedsC; #endif TimeSyncP.Leds -> LedsC; #ifdef LOW_POWER_LISTENING TimeSyncP.LowPowerListening -> ActiveMessageC; #endif } tinyos-2.1.2+dfsg/tos/lib/ftsp/TimeSyncC.nc000066400000000000000000000060271207233610700204750ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti, Brano Kusy, Janos Sallai * Date last modified: 3/17/03 * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ #include "TimeSyncMsg.h" configuration TimeSyncC { uses interface Boot; provides interface Init; provides interface StdControl; provides interface GlobalTime; //interfaces for extra fcionality: need not to be wired provides interface TimeSyncInfo; provides interface TimeSyncMode; provides interface TimeSyncNotify; } implementation { components new TimeSyncP(TMilli); GlobalTime = TimeSyncP; StdControl = TimeSyncP; Init = TimeSyncP; Boot = TimeSyncP; TimeSyncInfo = TimeSyncP; TimeSyncMode = TimeSyncP; TimeSyncNotify = TimeSyncP; components TimeSyncMessageC as ActiveMessageC; TimeSyncP.RadioControl -> ActiveMessageC; TimeSyncP.Send -> ActiveMessageC.TimeSyncAMSendMilli[TIMESYNC_AM_FTSP]; TimeSyncP.Receive -> ActiveMessageC.Receive[TIMESYNC_AM_FTSP]; TimeSyncP.TimeSyncPacket -> ActiveMessageC; components LocalTimeMilliC; TimeSyncP.LocalTime -> LocalTimeMilliC; components new TimerMilliC() as TimerC; TimeSyncP.Timer -> TimerC; components RandomC; TimeSyncP.Random -> RandomC; #if defined(TIMESYNC_LEDS) components LedsC; #else components NoLedsC as LedsC; #endif TimeSyncP.Leds -> LedsC; #ifdef LOW_POWER_LISTENING TimeSyncP.LowPowerListening -> ActiveMessageC; #endif } tinyos-2.1.2+dfsg/tos/lib/ftsp/TimeSyncInfo.nc000066400000000000000000000052751207233610700212120ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ interface TimeSyncInfo { /** * Returns current offset of the local time wrt global time. */ async command uint32_t getOffset(); /** * Returns current skew of the local time wrt global time. * This value is normalized to 0.0 (1.0 is subtracted) to get maximum * representation precision. */ async command float getSkew(); /** * Returns the local time of the last synchronization point. This * value is close to the current local time and updated when a new * time synchronization message arrives. */ async command uint32_t getSyncPoint(); /** * Returns the current root to which this node is synchronized. */ async command uint16_t getRootID(); /** * Returns the latest seq number seen from the current root. */ async command uint8_t getSeqNum(); /** * Returns the number of entries stored currently in the * regerssion table. */ async command uint8_t getNumEntries(); /** * Returns the value of heartBeats variable. */ async command uint8_t getHeartBeats(); } tinyos-2.1.2+dfsg/tos/lib/ftsp/TimeSyncMode.nc000066400000000000000000000046501207233610700211770ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ /** * the time sync module can work in two modes: * - TS_TIMER_MODE (default): TS msgs sent period. from the timer * - TS_USER_MODE: TS msgs sent only when explic. asked by user * via TimeSyncMode.send() command, TimeSync.Timer * is stopped in this mode */ interface TimeSyncMode { /** * Sets the current mode of the TimeSync module. * returns FAIL if didn't succeed */ command error_t setMode(uint8_t mode); /** * Gets the current mode of the TimeSync module. */ command uint8_t getMode(); /** * command to send out time synchronization message. * returns FAIL if TimeSync not in TS_USER_MODE */ command error_t send(); } tinyos-2.1.2+dfsg/tos/lib/ftsp/TimeSyncMsg.h000066400000000000000000000053331207233610700206670ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ #if defined(TIMESYNCMSG_H) #else #define TIMESYNCMSG_H typedef nx_struct TimeSyncMsg { nx_uint16_t rootID; // the node id of the synchronization root nx_uint16_t nodeID; // the node if of the sender nx_uint8_t seqNum; // sequence number for the root /* * After TEP 133, the message timestamp contains the difference between * event time and the time the message was actually sent out. TimeSyncP * sends the local time associated with this globalTime to the * TimeStamping mechanism, which then calculates the difference. * * On the receiving side, the difference is applied to the local * timestamp. The receiving timestamp thus represents the time on the * receiving clock when the remote globalTime was taken. */ nx_uint32_t globalTime; //just for convenience nx_uint32_t localTime; } TimeSyncMsg; enum { TIMESYNC_AM_FTSP = 0x3E, TIMESYNCMSG_LEN = sizeof(TimeSyncMsg) - sizeof(nx_uint32_t), TS_TIMER_MODE = 0, // see TimeSyncMode interface TS_USER_MODE = 1, // see TimeSyncMode interface }; #endif tinyos-2.1.2+dfsg/tos/lib/ftsp/TimeSyncNotify.nc000066400000000000000000000041101207233610700215520ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu) * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ /** * time sync module (TimeSyncM) provides notification of arriving * and transmitted time-sync msgs through TimeSyncNotify interface: */ interface TimeSyncNotify { /** * fired when time-sync msg is received and accepted */ event void msg_received(); /** * fired when time-sync msg is sent by TimeSyncM or the sending did not * succeed */ event void msg_sent(); } tinyos-2.1.2+dfsg/tos/lib/ftsp/TimeSyncP.nc000066400000000000000000000371701207233610700205150ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu), Janos Sallai * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) */ #include "TimeSyncMsg.h" generic module TimeSyncP(typedef precision_tag) { provides { interface Init; interface StdControl; interface GlobalTime; //interfaces for extra functionality: need not to be wired interface TimeSyncInfo; interface TimeSyncMode; interface TimeSyncNotify; } uses { interface Boot; interface SplitControl as RadioControl; interface TimeSyncAMSend as Send; interface Receive; interface Timer; interface Random; interface Leds; interface TimeSyncPacket; interface LocalTime as LocalTime; #ifdef LOW_POWER_LISTENING interface LowPowerListening; #endif } } implementation { #ifndef TIMESYNC_RATE #define TIMESYNC_RATE 10 #endif enum { MAX_ENTRIES = 8, // number of entries in the table BEACON_RATE = TIMESYNC_RATE, // how often send the beacon msg (in seconds) ROOT_TIMEOUT = 5, //time to declare itself the root if no msg was received (in sync periods) IGNORE_ROOT_MSG = 4, // after becoming the root ignore other roots messages (in send period) ENTRY_VALID_LIMIT = 4, // number of entries to become synchronized ENTRY_SEND_LIMIT = 3, // number of entries to send sync messages ENTRY_THROWOUT_LIMIT = 500, // if time sync error is bigger than this clear the table }; typedef struct TableItem { uint8_t state; uint32_t localTime; int32_t timeOffset; // globalTime - localTime } TableItem; enum { ENTRY_EMPTY = 0, ENTRY_FULL = 1, }; TableItem table[MAX_ENTRIES]; uint8_t tableEntries; enum { STATE_IDLE = 0x00, STATE_PROCESSING = 0x01, STATE_SENDING = 0x02, STATE_INIT = 0x04, }; uint8_t state, mode; /* We do linear regression from localTime to timeOffset (globalTime - localTime). This way we can keep the slope close to zero (ideally) and represent it as a float with high precision. timeOffset - offsetAverage = skew * (localTime - localAverage) timeOffset = offsetAverage + skew * (localTime - localAverage) globalTime = localTime + offsetAverage + skew * (localTime - localAverage) */ float skew; uint32_t localAverage; int32_t offsetAverage; uint8_t numEntries; // the number of full entries in the table message_t processedMsgBuffer; message_t* processedMsg; message_t outgoingMsgBuffer; TimeSyncMsg* outgoingMsg; uint8_t heartBeats; // the number of sucessfully sent messages // since adding a new entry with lower beacon id than ours async command uint32_t GlobalTime.getLocalTime() { return call LocalTime.get(); } async command error_t GlobalTime.getGlobalTime(uint32_t *time) { *time = call GlobalTime.getLocalTime(); return call GlobalTime.local2Global(time); } error_t is_synced() { if (numEntries>=ENTRY_VALID_LIMIT || outgoingMsg->rootID==TOS_NODE_ID) return SUCCESS; else return FAIL; } async command error_t GlobalTime.local2Global(uint32_t *time) { *time += offsetAverage + (int32_t)(skew * (int32_t)(*time - localAverage)); return is_synced(); } async command error_t GlobalTime.global2Local(uint32_t *time) { uint32_t approxLocalTime = *time - offsetAverage; *time = approxLocalTime - (int32_t)(skew * (int32_t)(approxLocalTime - localAverage)); return is_synced(); } void calculateConversion() { float newSkew = skew; uint32_t newLocalAverage; int32_t newOffsetAverage; int32_t localAverageRest; int32_t offsetAverageRest; int64_t localSum; int64_t offsetSum; int8_t i; for(i = 0; i < MAX_ENTRIES && table[i].state != ENTRY_FULL; ++i) ; if( i >= MAX_ENTRIES ) // table is empty return; /* We use a rough approximation first to avoid time overflow errors. The idea is that all times in the table should be relatively close to each other. */ newLocalAverage = table[i].localTime; newOffsetAverage = table[i].timeOffset; localSum = 0; localAverageRest = 0; offsetSum = 0; offsetAverageRest = 0; while( ++i < MAX_ENTRIES ) if( table[i].state == ENTRY_FULL ) { /* This only works because C ISO 1999 defines the signe for modulo the same as for the Dividend! */ localSum += (int32_t)(table[i].localTime - newLocalAverage) / tableEntries; localAverageRest += (table[i].localTime - newLocalAverage) % tableEntries; offsetSum += (int32_t)(table[i].timeOffset - newOffsetAverage) / tableEntries; offsetAverageRest += (table[i].timeOffset - newOffsetAverage) % tableEntries; } newLocalAverage += localSum + localAverageRest / tableEntries; newOffsetAverage += offsetSum + offsetAverageRest / tableEntries; localSum = offsetSum = 0; for(i = 0; i < MAX_ENTRIES; ++i) if( table[i].state == ENTRY_FULL ) { int32_t a = table[i].localTime - newLocalAverage; int32_t b = table[i].timeOffset - newOffsetAverage; localSum += (int64_t)a * a; offsetSum += (int64_t)a * b; } if( localSum != 0 ) newSkew = (float)offsetSum / (float)localSum; atomic { skew = newSkew; offsetAverage = newOffsetAverage; localAverage = newLocalAverage; numEntries = tableEntries; } } void clearTable() { int8_t i; for(i = 0; i < MAX_ENTRIES; ++i) table[i].state = ENTRY_EMPTY; atomic numEntries = 0; } uint8_t numErrors=0; void addNewEntry(TimeSyncMsg *msg) { int8_t i, freeItem = -1, oldestItem = 0; uint32_t age, oldestTime = 0; int32_t timeError; // clear table if the received entry's been inconsistent for some time timeError = msg->localTime; call GlobalTime.local2Global((uint32_t*)(&timeError)); timeError -= msg->globalTime; if( (is_synced() == SUCCESS) && (timeError > ENTRY_THROWOUT_LIMIT || timeError < -ENTRY_THROWOUT_LIMIT)) { if (++numErrors>3) clearTable(); return; // don't incorporate a bad reading } tableEntries = 0; // don't reset table size unless you're recounting numErrors = 0; for(i = 0; i < MAX_ENTRIES; ++i) { age = msg->localTime - table[i].localTime; //logical time error compensation if( age >= 0x7FFFFFFFL ) table[i].state = ENTRY_EMPTY; if( table[i].state == ENTRY_EMPTY ) freeItem = i; else ++tableEntries; if( age >= oldestTime ) { oldestTime = age; oldestItem = i; } } if( freeItem < 0 ) freeItem = oldestItem; else ++tableEntries; table[freeItem].state = ENTRY_FULL; table[freeItem].localTime = msg->localTime; table[freeItem].timeOffset = msg->globalTime - msg->localTime; } void task processMsg() { TimeSyncMsg* msg = (TimeSyncMsg*)(call Send.getPayload(processedMsg, sizeof(TimeSyncMsg))); if( msg->rootID < outgoingMsg->rootID && //after becoming the root, a node ignores messages that advertise the old root (it may take //some time for all nodes to timeout and discard the old root) !(heartBeats < IGNORE_ROOT_MSG && outgoingMsg->rootID == TOS_NODE_ID) ){ outgoingMsg->rootID = msg->rootID; outgoingMsg->seqNum = msg->seqNum; } else if( outgoingMsg->rootID == msg->rootID && (int8_t)(msg->seqNum - outgoingMsg->seqNum) > 0 ) { outgoingMsg->seqNum = msg->seqNum; } else goto exit; call Leds.led0Toggle(); if( outgoingMsg->rootID < TOS_NODE_ID ) heartBeats = 0; addNewEntry(msg); calculateConversion(); signal TimeSyncNotify.msg_received(); exit: state &= ~STATE_PROCESSING; } event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { #ifdef TIMESYNC_DEBUG // this code can be used to simulate multiple hopsf uint8_t incomingID = (uint8_t)((TimeSyncMsg*)payload)->nodeID; int8_t diff = (incomingID & 0x0F) - (TOS_NODE_ID & 0x0F); if( diff < -1 || diff > 1 ) return msg; diff = (incomingID & 0xF0) - (TOS_NODE_ID & 0xF0); if( diff < -16 || diff > 16 ) return msg; #endif if( (state & STATE_PROCESSING) == 0 && call TimeSyncPacket.isValid(msg)) { message_t* old = processedMsg; processedMsg = msg; ((TimeSyncMsg*)(payload))->localTime = call TimeSyncPacket.eventTime(msg); state |= STATE_PROCESSING; post processMsg(); return old; } return msg; } task void sendMsg() { uint32_t localTime, globalTime; globalTime = localTime = call GlobalTime.getLocalTime(); call GlobalTime.local2Global(&globalTime); // we need to periodically update the reference point for the root // to avoid wrapping the 32-bit (localTime - localAverage) value if( outgoingMsg->rootID == TOS_NODE_ID ) { if( (int32_t)(localTime - localAverage) >= 0x20000000 ) { atomic { localAverage = localTime; offsetAverage = globalTime - localTime; } } } else if( heartBeats >= ROOT_TIMEOUT ) { heartBeats = 0; //to allow ROOT_SWITCH_IGNORE to work outgoingMsg->rootID = TOS_NODE_ID; ++(outgoingMsg->seqNum); // maybe set it to zero? } outgoingMsg->globalTime = globalTime; #ifdef LOW_POWER_LISTENING call LowPowerListening.setRemoteWakeupInterval(&outgoingMsgBuffer, LPL_INTERVAL); #endif // we don't send time sync msg, if we don't have enough data if( numEntries < ENTRY_SEND_LIMIT && outgoingMsg->rootID != TOS_NODE_ID ){ ++heartBeats; state &= ~STATE_SENDING; } else if( call Send.send(AM_BROADCAST_ADDR, &outgoingMsgBuffer, TIMESYNCMSG_LEN, localTime ) != SUCCESS ){ state &= ~STATE_SENDING; signal TimeSyncNotify.msg_sent(); } } event void Send.sendDone(message_t* ptr, error_t error) { if (ptr != &outgoingMsgBuffer) return; if(error == SUCCESS) { ++heartBeats; call Leds.led1Toggle(); if( outgoingMsg->rootID == TOS_NODE_ID ) ++(outgoingMsg->seqNum); } state &= ~STATE_SENDING; signal TimeSyncNotify.msg_sent(); } void timeSyncMsgSend() { if( outgoingMsg->rootID == 0xFFFF && ++heartBeats >= ROOT_TIMEOUT ) { outgoingMsg->seqNum = 0; outgoingMsg->rootID = TOS_NODE_ID; } if( outgoingMsg->rootID != 0xFFFF && (state & STATE_SENDING) == 0 ) { state |= STATE_SENDING; post sendMsg(); } } event void Timer.fired() { if (mode == TS_TIMER_MODE) { timeSyncMsgSend(); } else call Timer.stop(); } command error_t TimeSyncMode.setMode(uint8_t mode_){ if (mode_ == TS_TIMER_MODE){ call Timer.startPeriodic((uint32_t)(896U+(call Random.rand16()&0xFF)) * BEACON_RATE); } else call Timer.stop(); mode = mode_; return SUCCESS; } command uint8_t TimeSyncMode.getMode(){ return mode; } command error_t TimeSyncMode.send(){ if (mode == TS_USER_MODE){ timeSyncMsgSend(); return SUCCESS; } return FAIL; } command error_t Init.init() { atomic{ skew = 0.0; localAverage = 0; offsetAverage = 0; }; clearTable(); atomic outgoingMsg = (TimeSyncMsg*)call Send.getPayload(&outgoingMsgBuffer, sizeof(TimeSyncMsg)); outgoingMsg->rootID = 0xFFFF; processedMsg = &processedMsgBuffer; state = STATE_INIT; return SUCCESS; } event void Boot.booted() { call RadioControl.start(); call StdControl.start(); } command error_t StdControl.start() { heartBeats = 0; outgoingMsg->nodeID = TOS_NODE_ID; call TimeSyncMode.setMode(TS_TIMER_MODE); return SUCCESS; } command error_t StdControl.stop() { call Timer.stop(); return SUCCESS; } async command float TimeSyncInfo.getSkew() { return skew; } async command uint32_t TimeSyncInfo.getOffset() { return offsetAverage; } async command uint32_t TimeSyncInfo.getSyncPoint() { return localAverage; } async command uint16_t TimeSyncInfo.getRootID() { return outgoingMsg->rootID; } async command uint8_t TimeSyncInfo.getSeqNum() { return outgoingMsg->seqNum; } async command uint8_t TimeSyncInfo.getNumEntries() { return numEntries; } async command uint8_t TimeSyncInfo.getHeartBeats() { return heartBeats; } default event void TimeSyncNotify.msg_received(){} default event void TimeSyncNotify.msg_sent(){} event void RadioControl.startDone(error_t error){} event void RadioControl.stopDone(error_t error){} } tinyos-2.1.2+dfsg/tos/lib/ftsp/TimeSyncTRadioC.nc000077500000000000000000000064301207233610700216010ustar00rootroot00000000000000/* * Copyright (c) 2002, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti, Brano Kusy, Janos Sallai * Date last modified: 3/17/03 * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com) * Adapted for 32kHz and LPL: 6/16/09 by Thomas Schmid (thomas.schmid@ucla.edu) * Adapted for TRadio: 2/21/11 by Thomas Schmid */ #include "TimeSyncMsg.h" #include "RadioConfig.h" configuration TimeSyncTRadioC { uses interface Boot; provides interface Init; provides interface StdControl; provides interface GlobalTime; //interfaces for extra functionality: need not to be wired provides interface TimeSyncInfo; provides interface TimeSyncMode; provides interface TimeSyncNotify; } implementation { components new TimeSyncP(TRadio) as TimeSyncP; GlobalTime = TimeSyncP; StdControl = TimeSyncP; Init = TimeSyncP; Boot = TimeSyncP; TimeSyncInfo = TimeSyncP; TimeSyncMode = TimeSyncP; TimeSyncNotify = TimeSyncP; components TimeSyncMessageC as ActiveMessageC; TimeSyncP.RadioControl -> ActiveMessageC; TimeSyncP.Send -> ActiveMessageC.TimeSyncAMSendRadio[TIMESYNC_AM_FTSP]; TimeSyncP.Receive -> ActiveMessageC.Receive[TIMESYNC_AM_FTSP]; TimeSyncP.TimeSyncPacket -> ActiveMessageC; components CounterRadio32C, new CounterToLocalTimeC(TRadio) as LocalTimeC; LocalTimeC.Counter -> CounterRadio32C; TimeSyncP.LocalTime -> LocalTimeC; components new TimerMilliC() as TimerC; TimeSyncP.Timer -> TimerC; components RandomC; TimeSyncP.Random -> RandomC; #if defined(TIMESYNC_LEDS) components LedsC; #else components NoLedsC as LedsC; #endif TimeSyncP.Leds -> LedsC; #ifdef LOW_POWER_LISTENING TimeSyncP.LowPowerListening -> ActiveMessageC; #endif } tinyos-2.1.2+dfsg/tos/lib/gpio/000077500000000000000000000000001207233610700162725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/gpio/SoftCaptureC.nc000066400000000000000000000045461207233610700211670ustar00rootroot00000000000000// $Id: SoftCaptureC.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /** * Emulates GPIO capture functionality using GpioInterrupt and the * standard 32khz counter * * @author Phil Buonadonna */ generic configuration SoftCaptureC() { provides interface GpioCapture; uses interface GpioInterrupt; } implementation { components new SoftCaptureP(); components Counter32khzC; GpioCapture = SoftCaptureP; GpioInterrupt = SoftCaptureP; SoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32; } tinyos-2.1.2+dfsg/tos/lib/gpio/SoftCaptureP.nc000066400000000000000000000055761207233610700212100ustar00rootroot00000000000000// $Id: SoftCaptureP.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /** * Emulates GPIO capture functionality using GpioInterrupt and the * standard 32khz counter * * @author Phil Buonadonna */ generic module SoftCaptureP () { provides interface GpioCapture; uses { interface GpioInterrupt; interface Counter as Counter32khz32; } } implementation { async command error_t GpioCapture.captureRisingEdge() { return (call GpioInterrupt.enableRisingEdge()); } async command error_t GpioCapture.captureFallingEdge() { return (call GpioInterrupt.enableFallingEdge()); } async command void GpioCapture.disable() { call GpioInterrupt.disable(); return; } async event void GpioInterrupt.fired() { uint16_t captureTime; captureTime = (uint16_t) call Counter32khz32.get(); signal GpioCapture.captured(captureTime); return; } async event void Counter32khz32.overflow() { return; } default async event void GpioCapture.captured(uint16_t time) { return; } } tinyos-2.1.2+dfsg/tos/lib/gpio/SoftIrqC.nc000066400000000000000000000042301207233610700203050ustar00rootroot00000000000000/** * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Martin Turon * * $Id: SoftIrqC.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $ */ /** * Software emulation of external interrupt pin. */ generic configuration SoftIrqC (uint8_t interval) { provides { interface Interrupt; // interrupt interface to emulate } uses { interface GeneralIO; // pin to poll for irq } } implementation { components new SoftIrqP(interval), new TimerMilliC() as IrqTimer; Interrupt = SoftIrqP; GeneralIO = SoftIrqP; SoftIrqP.IrqTimer -> IrqTimer; // strap into an OSKI system timer } tinyos-2.1.2+dfsg/tos/lib/gpio/SoftIrqP.nc000066400000000000000000000064671207233610700203400ustar00rootroot00000000000000/** * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Matt Miller, Crossbow * @author Martin Turon, Crossbow * * $Id: SoftIrqP.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $ */ /** * Interrupt emulation interface access for GPIO pins. * * @param interval How often to check soft irq pin in msec */ generic module SoftIrqP (uint8_t interval) { provides interface Interrupt as SoftIrq; uses { interface Timer as IrqTimer; interface GeneralIO as IrqPin; } } implementation { norace struct { uint8_t final : 1; uint8_t last : 1; } state; // ************* SoftIrq Interrupt handlers and dispatch ************* /** * Enable an edge interrupt on a SoftIrq pin that is not capable of * external hardware INTERRUPT. Best we can do is poll periodically * and monitor line level changes */ async command error_t SoftIrq.startWait(bool low_to_high) { atomic { state.final = low_to_high; } // save state we await state.last = call IrqPin.get(); // get current state call IrqTimer.startOneShotNow(interval); // wait interval in msec return SUCCESS; } /** * Timer Event fired so now check SoftIrq pin level */ event void IrqTimer.fired() { uint8_t l_state = call IrqPin.get(); if ((state.last != state.final) && (state.final == l_state)) { // If we found an edge, fire SoftIrq! signal SoftIrq.fired(); } // Otherwise, restart timer and try again state.last = l_state; return call IrqTimer.startOneShotNow(interval); } /** * disables Irq interrupts */ async command error_t SoftIrq.disable() { call IrqTimer.stop(); return SUCCESS; } //default async event void SoftIrq.fired() { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/mac/000077500000000000000000000000001207233610700160745ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/000077500000000000000000000000001207233610700171225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/ActiveMessageC.nc000066400000000000000000000112471207233610700222740ustar00rootroot00000000000000/* * Copyright (c) 2011, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== * Author(s): Jan Hauer * ======================================================================== */ /* The Active Message abstraction on top of the TKN15.4 MAC. Take a look at the * top of TKN154ActiveMessageP.nc to understand the approach (and issues). **/ // Disable scanning (MLME_SCAN will not work): #define IEEE154_SCAN_DISABLED // Disable promiscuous mode (PromiscuousMode.start() will not work): #define IEEE154_PROMISCUOUS_MODE_DISABLED // Disable association (MLME_ASSOCIATE will not work): #define IEEE154_ASSOCIATION_DISABLED // Disable association (MLME_DISASSOCIATE will not work): #define IEEE154_DISASSOCIATION_DISABLED // Disable coordinator realignment (MLME_ORPHAN will not work): #define IEEE154_COORD_REALIGNMENT_DISABLED // Disable transmission of broadcasts from coordinator to devices: #define IEEE154_COORD_BROADCAST_DISABLED // Disable indirect transmissions (MCPS_DATA.request with TX_OPTIONS_INDIRECT will not work): #define IEEE154_INDIRECT_TX_DISABLED // Disallow next higher layer to switch to receive mode (MLME_RX_ENABLE will fail): #define IEEE154_RXENABLE_DISABLED // Set the MAC Tx queue sizes to minimum (one DATA frame): #ifdef TXCONTROL_POOL_SIZE #undef TXCONTROL_POOL_SIZE #endif #define TXCONTROL_POOL_SIZE 0 #ifdef TXFRAME_POOL_SIZE #undef TXFRAME_POOL_SIZE #endif #define TXFRAME_POOL_SIZE 1 #ifdef CAP_TX_QUEUE_SIZE #undef CAP_TX_QUEUE_SIZE #endif #define CAP_TX_QUEUE_SIZE 1 #if defined(LOW_POWER_LISTENING) // If LOW_POWER_LISTENING is defined, then AMSenderC() instantiates an LplAMSenderC // instead of a DirectAMSenderC(). Currently we only support a DirectAMSenderC(). #error "LOW_POWER_LISTENING must not be defined when TKN15.4 MAC is used!" #endif configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; // The following interface may be useful to access more metadata // (RSSI, LQI, timestamp) of a frame interface IEEE154Frame; /* interface PacketTimeStamp as PacketTimeStamp32khz;*/ /* interface PacketTimeStamp as PacketTimeStampMilli;*/ /* interface LowPowerListening;*/ } } implementation { components TKN154ActiveMessageP as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; Snoop = AM.Snoop; AMPacket = AM; Packet = AM; PacketAcknowledgements = AM; /* LowPowerListening = AM;*/ /* PacketTimeStamp32khz = AM;*/ /* PacketTimeStampMilli = AM;*/ components ActiveMessageAddressC; AM.ActiveMessageAddress -> ActiveMessageAddressC; components new StateC(); AM.SplitControlState -> StateC; components Ieee802154NonBeaconEnabledC as MAC; IEEE154Frame = MAC; AM.MLME_RESET -> MAC; AM.MCPS_DATA -> MAC; AM.MLME_SET -> MAC; AM.MLME_GET -> MAC; AM.Frame-> MAC; AM.SubPacket -> MAC.Packet; components LedsC; AM.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/AssociateP.nc000066400000000000000000000334211207233610700215020ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.9 $ * $Date: 2009-12-14 12:50:06 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" module AssociateP { provides { interface Init; interface MLME_ASSOCIATE; interface MLME_COMM_STATUS; } uses { interface FrameRx as AssociationRequestRx; interface FrameTx as AssociationRequestTx; interface FrameExtracted as AssociationResponseExtracted; interface FrameTx as AssociationResponseTx; interface DataRequest; interface Timer as ResponseTimeout; interface Pool as TxFramePool; interface Pool as TxControlPool; interface MLME_GET; interface MLME_SET; interface FrameUtility; interface IEEE154Frame as Frame; interface Get as LocalExtendedAddress; } } implementation { enum { S_IDLE = 0xFF, }; uint8_t m_payloadAssocRequest[2]; uint8_t m_payloadAssocResponse[MAX_PENDING_ASSOC_RESPONSES][4]; uint8_t m_coordAddrMode; uint8_t m_assocRespStatus; uint16_t m_shortAddress; bool m_associationOngoing; command error_t Init.init() { uint8_t i; call ResponseTimeout.stop(); m_payloadAssocRequest[0] = S_IDLE; m_coordAddrMode = 0; m_associationOngoing = FALSE; for (i=0; iSecurityLevel) status = IEEE154_UNSUPPORTED_SECURITY; else if (ChannelPage != IEEE154_SUPPORTED_CHANNELPAGE || LogicalChannel > 26 || !(IEEE154_SUPPORTED_CHANNELS & ((uint32_t) 1 << LogicalChannel)) || (CoordAddrMode != ADDR_MODE_SHORT_ADDRESS && CoordAddrMode != ADDR_MODE_EXTENDED_ADDRESS)) status = IEEE154_INVALID_PARAMETER; else if (m_associationOngoing || !(txFrame = call TxFramePool.get())) status = IEEE154_TRANSACTION_OVERFLOW; else if (!(txControl = call TxControlPool.get())) { call TxFramePool.put(txFrame); status = IEEE154_TRANSACTION_OVERFLOW; } if (status == IEEE154_SUCCESS) { m_assocRespStatus = IEEE154_NO_DATA; m_shortAddress = 0xFFFF; call MLME_SET.phyCurrentChannel(LogicalChannel); call MLME_SET.macPANId(CoordPANID); m_coordAddrMode = CoordAddrMode; if (CoordAddrMode == ADDR_MODE_SHORT_ADDRESS) call MLME_SET.macCoordShortAddress(CoordAddress.shortAddress); else call MLME_SET.macCoordExtendedAddress(CoordAddress.extendedAddress); txFrame->header = &txControl->header; txFrame->metadata = &txControl->metadata; srcAddress.extendedAddress = call LocalExtendedAddress.get(); txFrame->headerLen = call FrameUtility.writeHeader( txFrame->header->mhr, CoordAddrMode, CoordPANID, &CoordAddress, ADDR_MODE_EXTENDED_ADDRESS, 0xFFFF, &srcAddress, 0); txFrame->header->mhr[MHR_INDEX_FC1] = FC1_ACK_REQUEST | FC1_FRAMETYPE_CMD; txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED | (CoordAddrMode == ADDR_MODE_SHORT_ADDRESS ? FC2_DEST_MODE_SHORT : FC2_DEST_MODE_EXTENDED); m_payloadAssocRequest[0] = CMD_FRAME_ASSOCIATION_REQUEST; m_payloadAssocRequest[1] = *((uint8_t*) &CapabilityInformation); txFrame->payload = m_payloadAssocRequest; txFrame->payloadLen = 2; m_associationOngoing = TRUE; if ((status = call AssociationRequestTx.transmit(txFrame)) != IEEE154_SUCCESS) { m_associationOngoing = FALSE; call TxFramePool.put(txFrame); call TxControlPool.put(txControl); } } dbg_serial("AssociationP", "MLME_ASSOCIATE.request -> result: %lu\n", (uint32_t) status); return status; } event void AssociationRequestTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(txFrame); if (status != IEEE154_SUCCESS) { dbg_serial("AssociationP", "transmitDone() failed!\n"); m_associationOngoing = FALSE; signal MLME_ASSOCIATE.confirm(0xFFFF, status, 0); } else { // we expect a response from the coordinator within "macResponseWaitTime" call ResponseTimeout.startOneShot(call MLME_GET.macResponseWaitTime()*IEEE154_aBaseSuperframeDuration); dbg_serial("AssociationP", "transmitDone() ok, waiting for %lu\n", (uint32_t) (call MLME_GET.macResponseWaitTime() * IEEE154_aBaseSuperframeDuration)); } } event message_t* AssociationResponseExtracted.received(message_t* frame, ieee154_txframe_t *txFrame) { uint8_t *payload = (uint8_t *) &frame->data; ieee154_macShortAddress_t shortAddress = *((nxle_uint16_t*) (payload + 1)); ieee154_association_status_t assocRespStatus = *(payload + 3); if (m_associationOngoing) { call ResponseTimeout.stop(); m_associationOngoing = FALSE; if (assocRespStatus == IEEE154_ASSOCIATION_SUCCESSFUL) { call MLME_SET.macShortAddress(shortAddress); if ((call MLME_GET.macCoordShortAddress() != IEEE154_DEFAULT_COORDSHORTADDRESS) && (call Frame.getSrcAddrMode(frame) == ADDR_MODE_EXTENDED_ADDRESS)) { ieee154_address_t coordExtendedAddress; call Frame.getSrcAddr(frame, &coordExtendedAddress); call MLME_SET.macCoordExtendedAddress(coordExtendedAddress.extendedAddress); } } else call MLME_SET.macPANId(0xFFFF); signal MLME_ASSOCIATE.confirm( call MLME_GET.macShortAddress(), assocRespStatus, NULL); dbg_serial("AssociationP", "confirm, status: %lu, my new address: 0x%lx\n", (uint32_t) assocRespStatus, (uint32_t) shortAddress); } return frame; } event void ResponseTimeout.fired() { uint8_t coordAddress[8]; nxle_uint16_t *shortAddress = (nxle_uint16_t*) coordAddress; if (!m_associationOngoing) return; // have not yet received an AssociationResponse within "macResponseWaitTime", // -> we explicitly poll the coordinator now dbg_serial("AssociationP", "Polling the coordinator for an AssociationResponse now...\n"); if (m_coordAddrMode == ADDR_MODE_SHORT_ADDRESS) *shortAddress = call MLME_GET.macCoordShortAddress(); else call FrameUtility.copyCoordExtendedAddressLE(coordAddress); if (call DataRequest.poll(m_coordAddrMode, call MLME_GET.macPANId(), coordAddress, ADDR_MODE_EXTENDED_ADDRESS) != IEEE154_SUCCESS) { signal DataRequest.pollDone(); // this will signal FAIL to the next higher layer dbg_serial("AssociationP", "Poll failed (locally)...\n"); } } event void DataRequest.pollDone() { if (m_associationOngoing) { // our explicit poll did not result in an AssociationResponse, give up... call ResponseTimeout.stop(); m_associationOngoing = FALSE; call MLME_SET.macPANId(0xFFFF); signal MLME_ASSOCIATE.confirm(0xFFFF, IEEE154_NO_DATA, 0); dbg_serial("AssociationP", "No AssociationResponse after polling...\n"); } } /* ------------------- MLME_ASSOCIATE Response ------------------- */ event message_t* AssociationRequestRx.received(message_t* frame) { uint8_t *payload = (uint8_t *) &frame->data; ieee154_address_t srcAddress; if (call Frame.getSrcAddrMode(frame) == ADDR_MODE_EXTENDED_ADDRESS && call Frame.getSrcAddr(frame, &srcAddress) == SUCCESS) signal MLME_ASSOCIATE.indication(srcAddress.extendedAddress, *((ieee154_CapabilityInformation_t*) (payload + 1)), 0); return frame; } command ieee154_status_t MLME_ASSOCIATE.response ( uint64_t deviceAddress, uint16_t assocShortAddress, ieee154_association_status_t status, ieee154_security_t *security) { uint8_t i; ieee154_status_t txStatus = IEEE154_SUCCESS; ieee154_txframe_t *txFrame; ieee154_txcontrol_t *txControl; ieee154_address_t srcAddress; for (i=0; iSecurityLevel) txStatus = IEEE154_UNSUPPORTED_SECURITY; else if (i == MAX_PENDING_ASSOC_RESPONSES || !(txFrame = call TxFramePool.get())) txStatus = IEEE154_TRANSACTION_OVERFLOW; else if (!(txControl = call TxControlPool.get())) { call TxFramePool.put(txFrame); txStatus = IEEE154_TRANSACTION_OVERFLOW; } else { txFrame->header = &txControl->header; txFrame->metadata = &txControl->metadata; txFrame->payload = m_payloadAssocResponse[i]; srcAddress.extendedAddress = call LocalExtendedAddress.get(); txFrame->headerLen = call FrameUtility.writeHeader( txFrame->header->mhr, ADDR_MODE_EXTENDED_ADDRESS, call MLME_GET.macPANId(), (ieee154_address_t*) &deviceAddress, ADDR_MODE_EXTENDED_ADDRESS, call MLME_GET.macPANId(), &srcAddress, 1); txFrame->header->mhr[MHR_INDEX_FC1] = FC1_ACK_REQUEST | FC1_FRAMETYPE_CMD | FC1_PAN_ID_COMPRESSION; txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED | FC2_DEST_MODE_EXTENDED; txFrame->payload[0] = CMD_FRAME_ASSOCIATION_RESPONSE; *((nxle_uint16_t*) &txFrame->payload[1]) = assocShortAddress; txFrame->payload[3] = status; txFrame->payloadLen = 4; if ((txStatus = call AssociationResponseTx.transmit(txFrame)) != IEEE154_SUCCESS) { txFrame->payload[0] = S_IDLE; call TxFramePool.put(txFrame); call TxControlPool.put(txControl); } } return txStatus; } event void AssociationResponseTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { ieee154_address_t srcAddress, deviceAddress; srcAddress.extendedAddress = call LocalExtendedAddress.get(); if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT) deviceAddress.shortAddress = *((nxle_uint16_t*) (&(txFrame->header->mhr[MHR_INDEX_ADDRESS]) + 2)); else call FrameUtility.convertToNative(&deviceAddress.extendedAddress, (&(txFrame->header->mhr[MHR_INDEX_ADDRESS]) + 2)); txFrame->payload[0] = S_IDLE; call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(txFrame); signal MLME_COMM_STATUS.indication(call MLME_GET.macPANId(), ADDR_MODE_EXTENDED_ADDRESS, srcAddress, ADDR_MODE_EXTENDED_ADDRESS, deviceAddress, status, 0); } /* ------------------- Defaults ------------------- */ default event void MLME_ASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security) {} default event void MLME_ASSOCIATE.confirm ( uint16_t AssocShortAddress, uint8_t status, ieee154_security_t *security) {} default event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security) {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/BackupP.nc000066400000000000000000000043331207233610700207740ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-16 18:00:22 $ * @author Jan Hauer * ======================================================================== */ generic module BackupP(typedef backup_t) { provides { interface SetNow as Store; interface GetNow as Retrieve; } } implementation { backup_t m_backup; async command error_t Store.setNow(backup_t* backup) { memcpy(&m_backup, backup, sizeof(backup_t)); return SUCCESS; } async command backup_t* Retrieve.getNow() { return &m_backup; } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/BeaconRequestRxP.nc000066400000000000000000000152241207233610700226420ustar00rootroot00000000000000/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-05-28 09:52:54 $ * @author: Jasper Buesch * ======================================================================== */ #include "TKN154_MAC.h" #include "TKN154.h" module BeaconRequestRxP { provides { interface Init as Reset; interface IEEE154TxBeaconPayload; } uses { interface FrameRx as BeaconRequestRx; interface FrameTx as BeaconRequestResponseTx; interface MLME_GET; interface FrameUtility; interface IEEE154Frame as Frame; } } implementation { /* variables that describe the beacon (payload) */ norace ieee154_txframe_t m_beaconFrame; ieee154_header_t m_header; ieee154_metadata_t m_metadata; uint8_t m_beaconPayloadLen; uint8_t m_payload[IEEE154_aMaxBeaconPayloadLength]; /* ------------------- Init ------------------- */ command error_t Reset.init() { m_beaconPayloadLen = 0; m_beaconFrame.header = &m_header; m_beaconFrame.headerLen = 0; m_beaconFrame.payload = m_payload; m_beaconFrame.payloadLen = 4; // first 4 bytes belong to superframe- & gts-fields m_beaconFrame.metadata = &m_metadata; dbg_serial("BeaconRequestResponderP","Init()\n"); return SUCCESS; } /* ------------------- Beacon-Request Response ------------------- */ task void sendBeaconTask(){ call BeaconRequestResponseTx.transmit(&m_beaconFrame); } event message_t* BeaconRequestRx.received(message_t* frame) { uint8_t offset = 0; ieee154_macShortAddress_t shortAddress = call MLME_GET.macShortAddress(); bool isShortAddr; shortAddress = call MLME_GET.macShortAddress(); isShortAddr = (shortAddress != 0xFFFE); m_beaconFrame.header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_BEACON; m_beaconFrame.header->mhr[MHR_INDEX_FC2] = isShortAddr ? FC2_SRC_MODE_SHORT : FC2_SRC_MODE_EXTENDED; offset = MHR_INDEX_ADDRESS; *((nxle_uint16_t*) &m_beaconFrame.header->mhr[offset]) = call MLME_GET.macPANId(); offset += sizeof(ieee154_macPANId_t); if (isShortAddr) { *((nxle_uint16_t*) &m_beaconFrame.header->mhr[offset]) = shortAddress; offset += sizeof(ieee154_macShortAddress_t); } else { call FrameUtility.copyLocalExtendedAddressLE(&m_beaconFrame.header->mhr[offset]); offset += 8; } m_beaconFrame.headerLen = offset; // Superframe-spec m_payload[BEACON_INDEX_SF_SPEC1] = 0xff; // beacon- and superframe order always 15 in nonbeacon-enabled mode m_payload[BEACON_INDEX_SF_SPEC2] = 0x00; if (call MLME_GET.macPanCoordinator() == TRUE) m_payload[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_PAN_COORD; if (call MLME_GET.macAssociationPermit() == TRUE) m_payload[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_ASSOCIATION_PERMIT; if (call MLME_GET.macBattLifeExt() == TRUE) m_payload[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_BATT_LIFE_EXT; // GTS-spec m_payload[BEACON_INDEX_GTS_SPEC] = 0; // Pending-Address-spec (behind empty single-byte GTS field) m_payload[BEACON_INDEX_GTS_SPEC + 1] = 0; signal IEEE154TxBeaconPayload.aboutToTransmit(); post sendBeaconTask(); return frame; } event void BeaconRequestResponseTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status){ signal IEEE154TxBeaconPayload.beaconTransmitted(); } /* ----------------------- Beacon Payload ----------------------- */ command error_t IEEE154TxBeaconPayload.setBeaconPayload(void *beaconPayload, uint8_t length) { dbg_serial("BeaconRequestResponderP","IEEE154TxBeaconPayload.setBeaconPayload\n\n"); if (length < IEEE154_aMaxBeaconPayloadLength){ memcpy(&m_payload[4], beaconPayload, length); m_beaconFrame.payloadLen = 4 + length; signal IEEE154TxBeaconPayload.setBeaconPayloadDone(beaconPayload, length); return SUCCESS; } else return ESIZE; } command const void* IEEE154TxBeaconPayload.getBeaconPayload(){ return &m_payload[4]; // the first four bytes are non-user bytes } command uint8_t IEEE154TxBeaconPayload.getBeaconPayloadLength(){ return m_beaconFrame.payloadLen - 4; // Beacon-Payload in NonBeaconed mode at least 4 bytes (non-user payload) } command error_t IEEE154TxBeaconPayload.modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength){ uint16_t totalLen = offset + bufferLength; if (totalLen > IEEE154_aMaxBeaconPayloadLength || call IEEE154TxBeaconPayload.getBeaconPayloadLength() < totalLen) return ESIZE; else { memcpy(&m_payload[4+offset], buffer, bufferLength); signal IEEE154TxBeaconPayload.modifyBeaconPayloadDone(offset, buffer , bufferLength); } return SUCCESS; } default event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) {} default event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) {} default event void IEEE154TxBeaconPayload.aboutToTransmit() {} default event void IEEE154TxBeaconPayload.beaconTransmitted() {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/BeaconSynchronizeP.nc000066400000000000000000000502621207233610700232140ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.11 $ * $Date: 2009-12-14 12:50:06 $ * @author Jan Hauer * ======================================================================== */ /** * This module is responsible for periodic beacon tracking in a * beacon-enabled PAN. */ #include "TKN154_MAC.h" module BeaconSynchronizeP { provides { interface Init as Reset; interface MLME_SYNC; interface MLME_BEACON_NOTIFY; interface MLME_SYNC_LOSS; interface SuperframeStructure as IncomingSF; interface GetNow as IsTrackingBeacons; interface SplitControl as TrackSingleBeacon; } uses { interface MLME_GET; interface MLME_SET; interface FrameUtility; interface IEEE154BeaconFrame as BeaconFrame; interface Alarm as TrackAlarm; interface RadioRx as BeaconRx; interface RadioOff; interface DataRequest; interface FrameRx as CoordRealignmentRx; interface TransferableResource as RadioToken; interface TimeCalc; interface IEEE154Frame as Frame; interface Leds; } } implementation { /* state variables */ norace uint8_t m_state; norace uint8_t m_numBeaconsMissed; /* temporary buffers for the MLME-SYNC parameters */ uint8_t m_updateLogicalChannel; bool m_updateTrackBeacon; /* variables that describe the current beacon configuration */ norace ieee154_macBeaconOrder_t m_beaconOrder; norace uint32_t m_dt; norace uint32_t m_lastBeaconRxTime; message_t m_beacon; norace message_t *m_beaconPtr = &m_beacon; /* variables that describe the latest superframe */ norace uint32_t m_sfSlotDuration; norace bool m_framePendingBit; norace uint8_t m_numCapSlots; norace uint8_t m_numGtsSlots; norace uint16_t m_battLifeExtDuration; uint8_t m_gtsField[1+1+3*7]; enum { RX_PREPARE = 0x00, RX_RECEIVING = 0x01, RX_RADIO_OFF = 0x02, RX_FIRST_SCAN= 0x03, RX_MASK = 0x03, MODE_INACTIVE = 0x00, MODE_TRACK_SINGLE = 0x04, MODE_TRACK_CONTINUOUS = 0x08, MODE_MASK = 0x0C, BEACON_RECEIVED = 0x10, UPDATE_PENDING = 0x20, INTERNAL_REQUEST = 0x40, EXTERNAL_REQUEST = 0x80, }; /* function/task prototypes */ void trackNextBeacon(); uint32_t getBeaconInterval(ieee154_macBeaconOrder_t BO); task void processBeaconTask(); task void signalGrantedTask(); /* accessing/manipulating the current state */ void setBeaconReceived() { m_state |= BEACON_RECEIVED; } void resetBeaconReceived() { m_state &= ~BEACON_RECEIVED; } bool wasBeaconReceived() { return (m_state & BEACON_RECEIVED) ? TRUE : FALSE; } void setUpdatePending() { m_state |= UPDATE_PENDING; } void resetUpdatePending() { m_state &= ~UPDATE_PENDING; } bool isUpdatePending() { return (m_state & UPDATE_PENDING) ? TRUE : FALSE; } void setInternalRequest() { m_state |= INTERNAL_REQUEST; } void resetInternalRequest() { m_state &= ~INTERNAL_REQUEST; } bool isInternalRequest() { return (m_state & INTERNAL_REQUEST) ? TRUE : FALSE; } void setExternalRequest() { m_state |= EXTERNAL_REQUEST; } void resetExternalRequest() { m_state &= ~EXTERNAL_REQUEST; } bool isExternalRequest() { return (m_state & EXTERNAL_REQUEST) ? TRUE : FALSE; } uint8_t getMode() { return (m_state & MODE_MASK); } void setMode(uint8_t mode) { m_state &= ~MODE_MASK; m_state |= (mode & MODE_MASK); } uint8_t getRxState() { return (m_state & RX_MASK); } void setRxState(uint8_t state) { m_state &= ~RX_MASK; m_state |= (state & RX_MASK); } command error_t Reset.init() { // Reset this component - will only be called while we're not owning the token if (call IsTrackingBeacons.getNow() || (isUpdatePending() && isExternalRequest() && m_updateTrackBeacon)) signal MLME_SYNC_LOSS.indication( IEEE154_BEACON_LOSS, call MLME_GET.macPANId(), call MLME_GET.phyCurrentChannel(), call MLME_GET.phyCurrentPage(), NULL); if (isInternalRequest()) signal TrackSingleBeacon.startDone(FAIL); resetUpdatePending(); resetInternalRequest(); resetExternalRequest(); setMode(MODE_INACTIVE); return SUCCESS; } /* ----------------------- MLME-SYNC ----------------------- */ /* * Allows to synchronize with the beacons from a coordinator. */ command ieee154_status_t MLME_SYNC.request ( uint8_t logicalChannel, uint8_t channelPage, bool trackBeacon) { error_t status = IEEE154_SUCCESS; uint32_t supportedChannels = IEEE154_SUPPORTED_CHANNELS; uint32_t currentChannelBit = 1; currentChannelBit <<= logicalChannel; if (!(currentChannelBit & supportedChannels) || (call MLME_GET.macPANId() == 0xFFFF) || (channelPage != IEEE154_SUPPORTED_CHANNELPAGE) || !IEEE154_BEACON_ENABLED_PAN) status = IEEE154_INVALID_PARAMETER; else { m_updateTrackBeacon = trackBeacon; m_updateLogicalChannel = logicalChannel; setExternalRequest(); setUpdatePending(); call RadioToken.request(); } dbg_serial("BeaconSynchronizeP", "MLME_SYNC.request -> result: %lu\n", (uint32_t) status); return status; } event void RadioToken.granted() { if (isUpdatePending()) { dbg_serial("BeaconSynchronizeP", "Updating configuration...\n"); if (m_updateTrackBeacon) setMode(MODE_TRACK_CONTINUOUS); else setMode(MODE_TRACK_SINGLE); call MLME_SET.phyCurrentChannel(m_updateLogicalChannel); m_beaconOrder = call MLME_GET.macBeaconOrder(); m_dt = getBeaconInterval(m_beaconOrder); m_numBeaconsMissed = IEEE154_aMaxLostBeacons; // will be reset when first beacon is received resetUpdatePending(); setRxState(RX_FIRST_SCAN); } trackNextBeacon(); } async event void RadioToken.transferredFrom(uint8_t clientFrom) { dbg_serial("BeaconSynchronizeP", "Got token (transferred).\n"); if (isUpdatePending()) post signalGrantedTask(); else trackNextBeacon(); } task void signalGrantedTask() { signal RadioToken.granted(); } void trackNextBeacon() { bool missed = FALSE; if (getMode() == MODE_INACTIVE) { // nothing to do, just give up the token dbg_serial("BeaconSynchronizeP", "Stop tracking.\n"); call RadioToken.release(); return; } if (getRxState() != RX_FIRST_SCAN) { dbg_serial("BeaconSynchronizeP","Token.transferred(), expecting beacon in %lu symbols.\n", (uint32_t) ((m_lastBeaconRxTime + m_dt) - call TrackAlarm.getNow())); // we have received at least one previous beacon, get ready for the next setRxState(RX_PREPARE); while (call TimeCalc.hasExpired(m_lastBeaconRxTime, m_dt)) { // missed a beacon! dbg_serial("BeaconSynchronizeP", "Missed a beacon, expected it: %lu, now: %lu\n", m_lastBeaconRxTime + m_dt, call TrackAlarm.getNow()); missed = TRUE; m_dt += getBeaconInterval(m_beaconOrder); m_numBeaconsMissed++; } if (m_numBeaconsMissed >= IEEE154_aMaxLostBeacons) { dbg_serial("BeaconSynchronizeP", "Missed too many beacons.\n"); post processBeaconTask(); return; } if (missed) { // let other components get a chance to use the radio call RadioToken.request(); dbg_serial("BeaconSynchronizeP", "Skipping a beacon.\n"); call RadioToken.release(); return; } } if (call RadioOff.isOff()) signal RadioOff.offDone(); else if (call RadioOff.off() != SUCCESS) ASSERT(0); } async event void RadioOff.offDone() { uint32_t delay = IEEE154_RADIO_RX_DELAY + IEEE154_MAX_BEACON_JITTER(m_beaconOrder); if (getRxState() == RX_FIRST_SCAN) { // initial scan: switch to Rx immediately call BeaconRx.enableRx(0, 0); } else if (getRxState() == RX_PREPARE) { if (!call TimeCalc.hasExpired(m_lastBeaconRxTime - delay, m_dt)) call TrackAlarm.startAt(m_lastBeaconRxTime - delay, m_dt); else signal TrackAlarm.fired(); } else { post processBeaconTask(); } } async event void BeaconRx.enableRxDone() { uint32_t dt; uint8_t previousState = getRxState(); setRxState(RX_RECEIVING); switch (previousState) { case RX_FIRST_SCAN: // "To acquire beacon synchronization, a device shall enable its // receiver and search for at most [aBaseSuperframeDuration * (2^n + 1)] // symbols, where n is the value of macBeaconOrder [...] Once the number // of missed beacons reaches aMaxLostBeacons, the MLME shall notify the // next higher layer." (Sect. 7.5.4.1) dt = (((uint32_t) 1 << m_beaconOrder) + (uint32_t) 1) * (uint32_t) IEEE154_aBaseSuperframeDuration * (uint32_t) IEEE154_aMaxLostBeacons; call TrackAlarm.start(dt); dbg_serial("BeaconSynchronizeP","Rx enabled, expecting first beacon within next %lu symbols.\n", dt); break; case RX_PREPARE: dt = m_dt + IEEE154_MAX_BEACON_LISTEN_TIME(m_beaconOrder); call TrackAlarm.startAt(m_lastBeaconRxTime, dt); dbg_serial("BeaconSynchronizeP","Rx enabled, expecting beacon within next %lu symbols.\n", (uint32_t) ((m_lastBeaconRxTime + dt) - call TrackAlarm.getNow())); break; default: ASSERT(0); break; } } async event void TrackAlarm.fired() { if (getRxState() == RX_PREPARE) { // enable Rx uint32_t maxBeaconJitter = IEEE154_MAX_BEACON_JITTER(m_beaconOrder); if (maxBeaconJitter > m_dt) maxBeaconJitter = m_dt; // receive immediately call BeaconRx.enableRx(m_lastBeaconRxTime, m_dt - maxBeaconJitter); } else { // disable Rx error_t error = call RadioOff.off(); ASSERT(getRxState() == RX_RECEIVING && error == SUCCESS); } } event message_t* BeaconRx.received(message_t *frame) { if (wasBeaconReceived()) { dbg_serial("BeaconSynchronizeP", "Got another beacon! -> ignoring it ...\n"); return frame; } else if (!call FrameUtility.isBeaconFromCoord(frame)) { dbg_serial("BeaconSynchronizeP", "Got a beacon, but not from my coordinator.\n"); return frame; } else { message_t *tmp = m_beaconPtr; setBeaconReceived(); m_beaconPtr = frame; dbg_serial("BeaconSynchronizeP", "Got beacon, timestamp: %lu, now: %lu\n", ((ieee154_metadata_t*) m_beaconPtr->metadata)->timestamp, (uint32_t) call TrackAlarm.getNow()); if (getRxState() == RX_RECEIVING) { call TrackAlarm.stop(); // may fail call RadioOff.off(); // may fail } return tmp; } } task void processBeaconTask() { // task will be executed after every (un)successful attempt to track a beacon bool wasInternalRequest = isInternalRequest(); if (wasBeaconReceived() && !call Frame.isTimestampValid(m_beaconPtr)) { dbg_serial("BeaconSynchronizeP", "Received beacon has invalid timestamp, discarding it!\n"); resetBeaconReceived(); } if (getMode() == MODE_TRACK_SINGLE) setMode(MODE_INACTIVE); // we're done with a single shot resetInternalRequest(); // whether we next release the token or pass it to the CAP // component, we want it back (because we decide later // whether we'll actually stop tracking the beacon in future) call RadioToken.request(); if (!wasBeaconReceived()) { resetBeaconReceived(); // buffer ready m_numBeaconsMissed += 1; m_dt += getBeaconInterval(m_beaconOrder); dbg_serial("BeaconSynchronizeP", "Missed a beacon (total missed: %lu).\n", (uint32_t) m_numBeaconsMissed); if (wasInternalRequest) { // note: if it only was an internal request, the // mode was reset above already (SINGLE_SHOT) signal TrackSingleBeacon.startDone(FAIL); } if (isExternalRequest() && m_numBeaconsMissed >= IEEE154_aMaxLostBeacons) { resetExternalRequest(); setMode(MODE_INACTIVE); dbg_serial("BeaconSynchronizeP", "MLME_SYNC_LOSS!\n"); signal MLME_SYNC_LOSS.indication( IEEE154_BEACON_LOSS, call MLME_GET.macPANId(), call MLME_GET.phyCurrentChannel(), call MLME_GET.phyCurrentPage(), NULL); } call RadioToken.release(); } else { // received the beacon! uint8_t *payload = (uint8_t *) m_beaconPtr->data; ieee154_macAutoRequest_t autoRequest = call MLME_GET.macAutoRequest(); uint8_t pendAddrSpecOffset = 3 + (((payload[2] & 7) > 0) ? 1 + (payload[2] & 7) * 3: 0); // skip GTS uint8_t pendAddrSpec = payload[pendAddrSpecOffset]; uint8_t *beaconPayload = payload + pendAddrSpecOffset + 1; uint8_t beaconPayloadSize = call BeaconFrame.getBeaconPayloadLength(m_beaconPtr); uint8_t pendingAddrMode = ADDR_MODE_NOT_PRESENT; uint8_t *mhr = MHR(m_beaconPtr); uint8_t frameLen = ((uint8_t*) m_beaconPtr)[0] & FRAMECTL_LENGTH_MASK; uint8_t gtsFieldLength; uint32_t timestamp = call Frame.getTimestamp(m_beaconPtr); dbg_serial("BeaconSynchronizeP", "Got beacon, bsn: %lu, offset to last: %lu\n", (uint32_t) mhr[MHR_INDEX_SEQNO], (uint32_t) (timestamp - m_lastBeaconRxTime)); m_numBeaconsMissed = 0; m_numGtsSlots = payload[BEACON_INDEX_GTS_SPEC] & GTS_DESCRIPTOR_COUNT_MASK; gtsFieldLength = 1 + ((m_numGtsSlots > 0) ? 1 + m_numGtsSlots * 3: 0); m_lastBeaconRxTime = timestamp; m_numCapSlots = ((payload[BEACON_INDEX_SF_SPEC2] & SF_SPEC2_FINAL_CAPSLOT_MASK) >> SF_SPEC2_FINAL_CAPSLOT_OFFSET) + 1; m_sfSlotDuration = (((uint32_t) 1) << ((payload[BEACON_INDEX_SF_SPEC1] & SF_SPEC1_SO_MASK) >> SF_SPEC1_SO_OFFSET)) * IEEE154_aBaseSlotDuration; memcpy(m_gtsField, &payload[BEACON_INDEX_GTS_SPEC], gtsFieldLength); // check for battery life extension if (payload[BEACON_INDEX_SF_SPEC2] & SF_SPEC2_BATT_LIFE_EXT) { // BLE is active; calculate the time offset from slot0 m_battLifeExtDuration = IEEE154_SHR_DURATION + frameLen * IEEE154_SYMBOLS_PER_OCTET; if (frameLen > IEEE154_aMaxSIFSFrameSize) m_battLifeExtDuration += call MLME_GET.macMinLIFSPeriod(); else m_battLifeExtDuration += call MLME_GET.macMinSIFSPeriod(); m_battLifeExtDuration = m_battLifeExtDuration + call MLME_GET.macBattLifeExtPeriods() * 20; } else m_battLifeExtDuration = 0; m_framePendingBit = mhr[MHR_INDEX_FC1] & FC1_FRAME_PENDING ? TRUE : FALSE; m_beaconOrder = (payload[BEACON_INDEX_SF_SPEC1] & SF_SPEC1_BO_MASK) >> SF_SPEC1_BO_OFFSET; m_dt = getBeaconInterval(m_beaconOrder); dbg_serial("BeaconSynchronizeP", "Handing over to CAP.\n"); call RadioToken.transferTo(RADIO_CLIENT_DEVICECAP); if (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK) beaconPayload += (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK) * 2; if (pendAddrSpec & PENDING_ADDRESS_EXT_MASK) beaconPayload += ((pendAddrSpec & PENDING_ADDRESS_EXT_MASK) >> 4) * 8; // check for pending data (once we signal MLME_BEACON_NOTIFY we cannot // touch this frame anymore!) if (autoRequest) pendingAddrMode = call BeaconFrame.isLocalAddrPending(m_beaconPtr); if (pendingAddrMode != ADDR_MODE_NOT_PRESENT) { // the coord has pending data uint8_t CoordAddrMode; uint16_t CoordPANId; uint8_t *CoordAddress; uint8_t SrcAddrMode = pendingAddrMode; if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT) CoordAddrMode = ADDR_MODE_SHORT_ADDRESS; else CoordAddrMode = ADDR_MODE_EXTENDED_ADDRESS; CoordAddress = &(mhr[MHR_INDEX_ADDRESS+2]); CoordPANId = *((nxle_uint16_t*) &(mhr[MHR_INDEX_ADDRESS])); call DataRequest.poll(CoordAddrMode, CoordPANId, CoordAddress, SrcAddrMode); } if (!autoRequest || beaconPayloadSize) m_beaconPtr = signal MLME_BEACON_NOTIFY.indication(m_beaconPtr); resetBeaconReceived(); // buffer ready } dbg_serial_flush(); } command error_t TrackSingleBeacon.start() { // Track a single beacon now dbg_serial("BeaconSynchronizeP", "Internal request.\n"); setInternalRequest(); call RadioToken.request(); if (!isUpdatePending()) { m_updateLogicalChannel = call MLME_GET.phyCurrentChannel(); m_updateTrackBeacon = FALSE; setUpdatePending(); } return SUCCESS; } command error_t TrackSingleBeacon.stop() { // we will stop automatically after beacon was tracked/not found return FAIL; } /* ----------------------- SF Structure, etc. ----------------------- */ async command uint32_t IncomingSF.sfStartTime() { return m_lastBeaconRxTime; } async command uint32_t IncomingSF.sfSlotDuration() { return m_sfSlotDuration; } async command uint8_t IncomingSF.numCapSlots() { return m_numCapSlots; } async command uint8_t IncomingSF.numGtsSlots() { return m_numGtsSlots; } async command uint16_t IncomingSF.battLifeExtDuration() { return m_battLifeExtDuration; } async command const uint8_t* IncomingSF.gtsFields() { return m_gtsField; } async command uint16_t IncomingSF.guardTime() { return IEEE154_MAX_BEACON_JITTER(m_beaconOrder) + IEEE154_RADIO_RX_DELAY; } async command bool IncomingSF.isBroadcastPending() { return m_framePendingBit; } async command uint32_t IncomingSF.beaconInterval() { return getBeaconInterval(m_beaconOrder); } async command bool IsTrackingBeacons.getNow() { return (getMode() == MODE_TRACK_CONTINUOUS); } uint32_t getBeaconInterval(ieee154_macBeaconOrder_t BO) { if (BO >= 15) BO = 14; return (((uint32_t) 1 << BO) * (uint32_t) IEEE154_aBaseSuperframeDuration); } event void DataRequest.pollDone() {} default event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame) {return frame;} default event void MLME_SYNC_LOSS.indication ( ieee154_status_t lossReason, uint16_t panID, uint8_t logicalChannel, uint8_t channelPage, ieee154_security_t *security) {} event message_t* CoordRealignmentRx.received(message_t* frame) { uint8_t *payload = call Frame.getPayload(frame); ieee154_macPANId_t panID = *(nxle_uint16_t*) &payload[1]; if (panID == call MLME_GET.macPANId()) signal MLME_SYNC_LOSS.indication( IEEE154_REALIGNMENT, // LossReason panID, // PANId payload[5], // LogicalChannel, call Frame.getPayloadLength(frame) == 9 ? payload[8] : call MLME_GET.phyCurrentPage(), NULL); return frame; } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/BeaconTransmitP.nc000066400000000000000000001036031207233610700225000ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.12 $ * $Date: 2010-01-05 16:41:16 $ * @author Jan Hauer * ======================================================================== */ /** * This module is responsible for periodic beacon transmission in a * beacon-enabled PAN. */ #include "TKN154_MAC.h" #include "TKN154_PHY.h" module BeaconTransmitP { provides { interface Init as Reset; interface MLME_START; interface IEEE154TxBeaconPayload; interface SuperframeStructure as OutgoingSF; interface GetNow as IsSendingBeacons; } uses { interface Notify as GtsSpecUpdated; interface Notify as PendingAddrSpecUpdated; interface Notify as PIBUpdate[uint8_t attributeID]; interface Alarm as BeaconSendAlarm; interface Timer as BeaconPayloadUpdateTimer; interface RadioOff; interface RadioTx as BeaconTx; interface MLME_GET; interface MLME_SET; interface TransferableResource as RadioToken; interface FrameTx as RealignmentBeaconEnabledTx; interface FrameTx as RealignmentNonBeaconEnabledTx; interface FrameRx as BeaconRequestRx; interface WriteBeaconField as GtsInfoWrite; interface WriteBeaconField as PendingAddrWrite; interface FrameUtility; interface GetNow as IsTrackingBeacons; interface SuperframeStructure as IncomingSF; interface Set as SetMacSuperframeOrder; interface Set as SetMacBeaconTxTime; interface Set as SetMacPanCoordinator; interface GetSet as GetSetRealignmentFrame; interface GetNow as IsBroadcastReady; interface TimeCalc; interface Random; interface Leds; } } implementation { /* state variables */ norace uint8_t m_requestBitmap; norace uint8_t m_txState; uint8_t m_payloadState; norace bool m_txOneBeaconImmediately; /* variables that describe the current superframe configuration */ norace uint32_t m_startTime; norace uint8_t m_beaconOrder; norace uint8_t m_superframeOrder; norace uint32_t m_beaconInterval; norace uint32_t m_previousBeaconInterval; norace uint32_t m_dt; norace uint32_t m_lastBeaconTxTime; norace ieee154_macBattLifeExtPeriods_t m_battLifeExtPeriods; /* variables that describe the latest superframe */ norace uint32_t m_sfSlotDuration; norace bool m_framePendingBit; norace uint8_t m_numCapSlots; norace uint8_t m_numGtsSlots; norace uint16_t m_battLifeExtDuration; uint8_t m_gtsField[1+1+3*7]; /* variables that describe the beacon (payload) */ norace ieee154_txframe_t m_beaconFrame; ieee154_header_t m_header; ieee154_metadata_t m_metadata; void *m_updateBeaconPayload; uint8_t m_updateBeaconOffset; uint8_t m_updateBeaconLength; uint8_t m_beaconPayloadLen; uint8_t m_pendingAddrLen; uint8_t m_pendingGtsLen; /* buffers for the parameters of the MLME-START request */ uint16_t m_updatePANId; uint8_t m_updateLogicalChannel; uint32_t m_updateStartTime; norace uint8_t m_updateBeaconOrder; uint8_t m_updateSuperframeOrder; bool m_updatePANCoordinator; bool m_updateBatteryLifeExtension; enum { MAX_BEACON_PAYLOAD_SIZE = IEEE154_aMaxBeaconOverhead + IEEE154_aMaxBeaconPayloadLength, REQUEST_UPDATE_SF = 0x01, REQUEST_REALIGNMENT = 0x02, REQUEST_CONFIRM_PENDING = 0x04, REQUEST_REALIGNMENT_DONE_PENDING = 0x08, MODIFIED_SF_SPEC = 0x01, MODIFIED_GTS_FIELD = 0x02, MODIFIED_PENDING_ADDR_FIELD = 0x04, MODIFIED_SPECS_MASK = 0x0F, MODIFIED_BEACON_PAYLOAD = 0x10, MODIFIED_BEACON_PAYLOAD_NEW = 0x20, MODIFIED_BEACON_PAYLOAD_MASK = 0xF0, S_TX_IDLE = 0, S_TX_LOCKED = 1, S_TX_WAITING = 2, }; uint8_t m_payload[MAX_BEACON_PAYLOAD_SIZE]; /* function/task prototypes */ task void txDoneTask(); task void signalStartConfirmSuccessTask(); void nextRound(); void prepareBeaconTransmission(); void continueStartRequest(); void finishRealignment(ieee154_txframe_t *frame, ieee154_status_t status); command error_t Reset.init() { // reset this component, will only be called while we're not owning the token // TODO: check to signal MLME_START.confirm ? call MLME_SET.macBSN(call Random.rand16()); m_beaconFrame.header = &m_header; m_beaconFrame.headerLen = 0; m_beaconFrame.payload = m_payload; m_beaconFrame.payloadLen = 0; m_beaconFrame.metadata = &m_metadata; m_updateBeaconPayload = NULL; m_updateBeaconLength = 0; m_requestBitmap = m_payloadState = m_txState = 0; m_beaconPayloadLen = m_pendingAddrLen = m_pendingGtsLen = 0; m_gtsField[0] = 0; m_numCapSlots = 0; m_numGtsSlots = 0; m_beaconOrder = 15; call BeaconPayloadUpdateTimer.stop(); call BeaconSendAlarm.stop(); return SUCCESS; } /* ----------------------- MLME-START ----------------------- */ /* "The MLME-START.request primitive allows the PAN coordinator to initiate a * new PAN or to begin using a new superframe configuration. This primitive may * also be used by a device already associated with an existing PAN to begin * using a new superframe configuration." (IEEE 802.15.4-2006 Sect. 7.1.14.1) **/ command ieee154_status_t MLME_START.request ( uint16_t panID, uint8_t logicalChannel, uint8_t channelPage, uint32_t startTime, uint8_t beaconOrder, uint8_t superframeOrder, bool panCoordinator, bool batteryLifeExtension, bool coordRealignment, ieee154_security_t *coordRealignSecurity, ieee154_security_t *beaconSecurity) { ieee154_status_t status = IEEE154_SUCCESS; ieee154_macShortAddress_t shortAddress = call MLME_GET.macShortAddress(); // check parameters if ((coordRealignSecurity && coordRealignSecurity->SecurityLevel) || (beaconSecurity && beaconSecurity->SecurityLevel)) status = IEEE154_UNSUPPORTED_SECURITY; else if (shortAddress == 0xFFFF) status = IEEE154_NO_SHORT_ADDRESS; else if (logicalChannel > 26 || beaconOrder > 15 || (channelPage != IEEE154_SUPPORTED_CHANNELPAGE) || !(IEEE154_SUPPORTED_CHANNELS & ((uint32_t) 1 << logicalChannel)) || (superframeOrder > beaconOrder)) status = IEEE154_INVALID_PARAMETER; else if (startTime && !call IsTrackingBeacons.getNow()) status = IEEE154_TRACKING_OFF; else if (startTime & 0xFF000000) status = IEEE154_INVALID_PARAMETER; else if (m_requestBitmap & (REQUEST_CONFIRM_PENDING | REQUEST_UPDATE_SF)) status = IEEE154_TRANSACTION_OVERFLOW; else { // New configuration *will* be put in operation, we'll buffer // the parameters now, and continue once we get the token. if (panCoordinator) startTime = 0; // start immediately if (beaconOrder == 15) superframeOrder = 15; // beaconless PAN m_updatePANId = panID; m_updateLogicalChannel = logicalChannel; m_updateStartTime = startTime; m_updateBeaconOrder = beaconOrder; m_updateSuperframeOrder = superframeOrder; m_updatePANCoordinator = panCoordinator; m_updateBatteryLifeExtension = batteryLifeExtension; m_requestBitmap = (REQUEST_CONFIRM_PENDING | REQUEST_UPDATE_SF); // lock if (coordRealignment) m_requestBitmap |= REQUEST_REALIGNMENT; if (m_beaconOrder == 15) { // We're not already transmitting beacons, i.e. we have to request the token // (otherwise we'd get the token "automatically" for the next scheduled beacon). call RadioToken.request(); } // We'll continue the MLME_START operation in continueStartRequest() once we have the token } dbg_serial("BeaconTransmitP", "MLME_START.request -> result: %lu\n", (uint32_t) status); return status; } void continueStartRequest() { uint8_t offset; ieee154_macShortAddress_t shortAddress; bool isShortAddr; // (1) coord realignment? if (m_requestBitmap & REQUEST_REALIGNMENT) { ieee154_txframe_t *realignmentFrame = call GetSetRealignmentFrame.get(); m_requestBitmap &= ~REQUEST_REALIGNMENT; if (realignmentFrame == NULL) { // allocation failed! m_requestBitmap = 0; signal MLME_START.confirm(IEEE154_TRANSACTION_OVERFLOW); return; } // set the payload portion of the realignmentFrame // (the header fields are already set correctly) realignmentFrame->payload[0] = CMD_FRAME_COORDINATOR_REALIGNMENT; *((nxle_uint16_t*) &realignmentFrame->payload[1]) = m_updatePANId; *((nxle_uint16_t*) &realignmentFrame->payload[3]) = call MLME_GET.macShortAddress(); realignmentFrame->payload[5] = m_updateLogicalChannel; *((nxle_uint16_t*) &realignmentFrame->payload[6]) = 0xFFFF; realignmentFrame->payloadLen = 8; if (m_beaconOrder < 15) { // we're already transmitting beacons; the realignment frame // must be sent (broadcast) after the next beacon if (call RealignmentBeaconEnabledTx.transmit(realignmentFrame) != IEEE154_SUCCESS) { m_requestBitmap = 0; call GetSetRealignmentFrame.set(realignmentFrame); signal MLME_START.confirm(IEEE154_TRANSACTION_OVERFLOW); } else { // The realignment frame will be transmitted immediately after // the next beacon - the result will be signalled in // RealignmentBeaconEnabledTx.transmitDone(). Only then the superframe // structure is updated and MLME_START.confirm signalled. m_requestBitmap |= REQUEST_REALIGNMENT_DONE_PENDING; // lock } } else { // send realignment frame in unslotted csma-ca now if (call RealignmentNonBeaconEnabledTx.transmit(realignmentFrame) != IEEE154_SUCCESS) { m_requestBitmap = 0; call GetSetRealignmentFrame.set(realignmentFrame); signal MLME_START.confirm(IEEE154_TRANSACTION_OVERFLOW); } else { // A realignment frame will be transmitted now, the result will // be signalled in RealignmentNonBeaconEnabledTx.transmitDone(). Only // then the superframe structure is updated and MLME_START.confirm // signalled. m_requestBitmap |= REQUEST_REALIGNMENT_DONE_PENDING; // lock } } return; } // (2) update internal state m_startTime = m_updateStartTime; m_txOneBeaconImmediately = FALSE; m_previousBeaconInterval = 0; m_beaconOrder = m_updateBeaconOrder; if (m_beaconOrder < 15) { m_beaconInterval = ((uint32_t) 1 << m_beaconOrder) * IEEE154_aBaseSuperframeDuration; } else { m_beaconInterval = 0; } m_superframeOrder = m_updateSuperframeOrder; if (m_startTime) // schedule outgoing beacon relative to incoming beacon; here we calculate // the last time we would have sent a beacon (simplifies the code below) m_lastBeaconTxTime = call IncomingSF.sfStartTime() + m_startTime - m_beaconInterval; else { // no StartTime defined by next higher layer - but // if a realignment frame was transmitted, the next // beacon tx time must take the old BI into consideration if (m_requestBitmap & REQUEST_REALIGNMENT_DONE_PENDING) m_previousBeaconInterval = m_beaconInterval; else m_txOneBeaconImmediately = TRUE; } m_dt = m_beaconInterval; m_battLifeExtPeriods = call MLME_GET.macBattLifeExtPeriods(); m_txState = S_TX_IDLE; // (3) update PIB call MLME_SET.macBeaconOrder(m_beaconOrder); call SetMacSuperframeOrder.set(m_superframeOrder); call MLME_SET.macPANId(m_updatePANId); call MLME_SET.phyCurrentChannel(m_updateLogicalChannel); if (m_beaconOrder < 15) call MLME_SET.macBattLifeExt(m_updateBatteryLifeExtension); call SetMacPanCoordinator.set(m_updatePANCoordinator); // (4) assemble beacon header and payload shortAddress = call MLME_GET.macShortAddress(); isShortAddr = (shortAddress != 0xFFFE); m_beaconFrame.header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_BEACON; m_beaconFrame.header->mhr[MHR_INDEX_FC2] = isShortAddr ? FC2_SRC_MODE_SHORT : FC2_SRC_MODE_EXTENDED; m_beaconFrame.header->mhr[MHR_INDEX_SEQNO] = call MLME_GET.macBSN() + 1; offset = MHR_INDEX_ADDRESS; *((nxle_uint16_t*) &m_beaconFrame.header->mhr[offset]) = m_updatePANId; offset += sizeof(ieee154_macPANId_t); if (isShortAddr) { *((nxle_uint16_t*) &m_beaconFrame.header->mhr[offset]) = shortAddress; offset += sizeof(ieee154_macShortAddress_t); } else { call FrameUtility.copyLocalExtendedAddressLE(&m_beaconFrame.header->mhr[offset]); offset += 8; } m_beaconFrame.headerLen = offset; m_payloadState |= MODIFIED_SPECS_MASK; // update beacon payload signal BeaconPayloadUpdateTimer.fired(); // assemble initial beacon payload if (m_beaconOrder < 15) { // beacon-enabled PAN, signal confirm after next // beacon has been transmitted (see MSC, Fig. 38) m_requestBitmap = REQUEST_CONFIRM_PENDING; } else { // beaconless PAN, we're done m_requestBitmap = 0; signal MLME_START.confirm(IEEE154_SUCCESS); } } task void signalGrantedTask() { signal RadioToken.granted(); } event void RadioToken.granted() { dbg_serial("BeaconSynchronizeP","Token granted.\n"); if (m_requestBitmap & REQUEST_REALIGNMENT_DONE_PENDING) { // very unlikely: we have not yet received a done() // event after sending out a realignment frame dbg_serial("BeaconTransmitP", "Realignment pending (request: %lu) !\n", (uint32_t) m_requestBitmap); post signalGrantedTask(); // spin return; } else if (m_requestBitmap & REQUEST_UPDATE_SF) { dbg_serial("BeaconTransmitP","Putting new superframe spec into operation\n"); m_requestBitmap &= ~REQUEST_UPDATE_SF; continueStartRequest(); } nextRound(); } void nextRound() { if (call RadioOff.isOff()) prepareBeaconTransmission(); else ASSERT(call RadioOff.off() == SUCCESS); // will continue in prepareBeaconTransmission() } async event void RadioToken.transferredFrom(uint8_t fromClientID) { dbg_serial("BeaconTransmitP","Token transferred, will Tx beacon in %lu\n", (uint32_t) ((m_lastBeaconTxTime + m_dt) - call BeaconSendAlarm.getNow())); if (m_requestBitmap & (REQUEST_REALIGNMENT_DONE_PENDING | REQUEST_UPDATE_SF)) post signalGrantedTask(); // need to be in sync context else nextRound(); } async event void RadioOff.offDone() { prepareBeaconTransmission(); } void prepareBeaconTransmission() { if (m_txState == S_TX_LOCKED) { // have not had time to finish processing the last sent beacon dbg_serial("BeaconTransmitP", "Token was returned too fast!\n"); post signalGrantedTask(); } else if (m_beaconOrder == 15) { // we're not sending any beacons!? dbg_serial("BeaconTransmitP", "Stop sending beacons.\n"); call RadioToken.release(); } else { // get ready for next beacon transmission atomic { uint32_t delay = IEEE154_RADIO_TX_DELAY; m_txState = S_TX_WAITING; if (m_txOneBeaconImmediately) { // transmit the beacon now dbg_serial("BeaconTransmitP", "Sending a beacon immediately.\n"); signal BeaconSendAlarm.fired(); return; } else if (m_startTime != 0) { // The outgoing superframe (our beacon transmission) has to be scheduled relative // to an incoming superframe (from our coordinator). The standard says that this // should be done only for the initial beacon tranmission, but we do it for // every transmission, because otherwise we'll run into problems (overlapping // superframes) due to clock drift eventually if (call IsTrackingBeacons.getNow()) { // we calculate the "ideal" time of our last transmitted beacon // relative to the last incoming beacon uint32_t idealLastTxTime = call IncomingSF.sfStartTime() + m_startTime - m_beaconInterval; // only if the offset between ideal and the actual last beacon transmission // is close (i.e. could have been an effect of clock drift), we replace the // timestamp of the actual transmission with that one of the ideal beacon time; // max. clock drift per node is +- 40 ppm, we need to consider +- 80 ppm; // max. clock drift is a function of the BO; we take two discrete values to // cover the "lower" BO (max. 1ms drift) and "upper" BO (max. 24 ms drift) // this could be done more granular one day ... uint32_t maxAllowedOffset = (m_beaconOrder > 9) ? 1488 : 62; uint32_t jitter; if ( (jitter = idealLastTxTime - m_lastBeaconTxTime) < maxAllowedOffset || (jitter = m_lastBeaconTxTime - idealLastTxTime) < maxAllowedOffset) { m_lastBeaconTxTime = idealLastTxTime; dbg_serial("BeaconTransmitP", "Scheduling beacon relative to last Rx beacon (correcting a jitter of: %lu), updated TxTime %lu\n", (uint32_t) jitter, (uint32_t) m_lastBeaconTxTime); } else { // we don't touch m_lastBeaconTxTime! dbg_serial("BeaconTransmitP", "Jitter too large (missed an incoming beacon?)! %lu vs. %lu\n", idealLastTxTime, m_lastBeaconTxTime); } } } else if (m_previousBeaconInterval != 0) { // a new sf spec was put into operation, after a realignment frame // broadcast; the next beacon time should still be calculated using the // old BI (one last time) dbg_serial("BeaconTransmitP", "Sending beacon after realignment dt=%lu.\n", m_previousBeaconInterval); m_dt = m_previousBeaconInterval; m_previousBeaconInterval = 0; if (m_requestBitmap & REQUEST_CONFIRM_PENDING) { // only now the next higher layer is to be informed m_requestBitmap &= ~REQUEST_CONFIRM_PENDING; post signalStartConfirmSuccessTask(); } } // The next beacon should be transmitted at time m_lastBeaconTxTime + m_dt, where m_dt // is typically the beacon interval. First we check if we're still in time. while (call TimeCalc.hasExpired(m_lastBeaconTxTime, m_dt)) { // too late, we need to skip a beacon! dbg_serial("BeaconTransmitP", "Skipping a beacon: scheduled=%lu, now=%lu.\n", (uint32_t) m_lastBeaconTxTime + m_dt, (uint32_t) call BeaconSendAlarm.getNow()); m_dt += m_beaconInterval; } if (!call TimeCalc.hasExpired(m_lastBeaconTxTime - delay, m_dt)) { // don't load the beacon frame in the radio just yet - rather set a timer and // give the next higher layer the chance to modify the beacon payload call BeaconSendAlarm.startAt(m_lastBeaconTxTime - delay, m_dt); } else signal BeaconSendAlarm.fired(); } } } task void signalStartConfirmSuccessTask() { signal MLME_START.confirm(SUCCESS); } async event void BeaconSendAlarm.fired() { // start/schedule beacon transmission m_txState = S_TX_LOCKED; if (call IsBroadcastReady.getNow()) m_beaconFrame.header->mhr[MHR_INDEX_FC1] |= FC1_FRAME_PENDING; else m_beaconFrame.header->mhr[MHR_INDEX_FC1] &= ~FC1_FRAME_PENDING; if (m_txOneBeaconImmediately) { m_txOneBeaconImmediately = FALSE; m_dt = 0; } call BeaconTx.transmit(&m_beaconFrame, m_lastBeaconTxTime, m_dt); dbg_serial("BeaconTransmitP","Beacon Tx scheduled for %lu\n", m_lastBeaconTxTime + m_dt); } async event void BeaconTx.transmitDone(ieee154_txframe_t *frame, error_t result) { // The beacon frame was transmitted, i.e. the CAP has just started // update the state then pass the token on to the next component uint8_t gtsFieldLength; uint32_t timestamp = ((ieee154_metadata_t*) frame->metadata)->timestamp; ASSERT(result == SUCCESS); // must succeed, we're sending without CCA or ACK request if (timestamp != IEEE154_INVALID_TIMESTAMP) { dbg_serial("BeaconTransmitP", "Beacon Tx (bsn: %lu), offset to last %lu\n", (uint32_t) frame->header->mhr[MHR_INDEX_SEQNO], (uint32_t) (timestamp - m_lastBeaconTxTime)); m_lastBeaconTxTime = timestamp; m_dt = m_beaconInterval; // transmit the next beacon at m_lastBeaconTxTime + m_dt } else { // Timestamp is invalid; this is bad. We need the beacon timestamp for the // slotted CSMA-CA, because it defines the slot reference time. We can't use this superframe dbg_serial("BeaconTransmitP", "Invalid timestamp!\n"); m_dt += m_beaconInterval; call RadioToken.request(); call RadioToken.release(); return; } // update superframe-related variables m_numGtsSlots = (frame->payload[BEACON_INDEX_GTS_SPEC] & GTS_DESCRIPTOR_COUNT_MASK) >> GTS_DESCRIPTOR_COUNT_OFFSET; gtsFieldLength = 1 + ((m_numGtsSlots > 0) ? 1 + m_numGtsSlots * 3: 0); m_numCapSlots = ((frame->payload[BEACON_INDEX_SF_SPEC2] & SF_SPEC2_FINAL_CAPSLOT_MASK) >> SF_SPEC2_FINAL_CAPSLOT_OFFSET) + 1; m_sfSlotDuration = (((uint32_t) 1) << ((frame->payload[BEACON_INDEX_SF_SPEC1] & SF_SPEC1_SO_MASK) >> SF_SPEC1_SO_OFFSET)) * (uint32_t) IEEE154_aBaseSlotDuration; if (frame->header->mhr[MHR_INDEX_FC1] & FC1_FRAME_PENDING) m_framePendingBit = TRUE; else m_framePendingBit = FALSE; memcpy(m_gtsField, &frame->payload[BEACON_INDEX_GTS_SPEC], gtsFieldLength); if (frame->payload[BEACON_INDEX_SF_SPEC2] & SF_SPEC2_BATT_LIFE_EXT) { // BLE is active; calculate the time offset from slot 0 m_battLifeExtDuration = IEEE154_SHR_DURATION + (frame->headerLen + frame->payloadLen + 2) * IEEE154_SYMBOLS_PER_OCTET; if (frame->headerLen + frame->payloadLen + 2 > IEEE154_aMaxSIFSFrameSize) m_battLifeExtDuration += IEEE154_MIN_LIFS_PERIOD; else m_battLifeExtDuration += IEEE154_MIN_SIFS_PERIOD; m_battLifeExtDuration = m_battLifeExtDuration + m_battLifeExtPeriods * 20; } else m_battLifeExtDuration = 0; // we pass on the token now, but make a reservation to get it back // to transmit the next beacon (at the start of the next superframe) call RadioToken.request(); call RadioToken.transferTo(RADIO_CLIENT_COORDBROADCAST); post txDoneTask(); } task void txDoneTask() { call MLME_SET.macBSN(m_beaconFrame.header->mhr[MHR_INDEX_SEQNO]); m_beaconFrame.header->mhr[MHR_INDEX_SEQNO] += 1; // may be overwritten by the next higher layer call SetMacBeaconTxTime.set(m_lastBeaconTxTime); // start of slot0, ie. first preamble byte of beacon call BeaconPayloadUpdateTimer.startOneShotAt(m_lastBeaconTxTime, (m_beaconInterval>BEACON_PAYLOAD_UPDATE_INTERVAL) ? (m_beaconInterval - BEACON_PAYLOAD_UPDATE_INTERVAL): 0); if (m_requestBitmap & REQUEST_CONFIRM_PENDING) { m_requestBitmap &= ~REQUEST_CONFIRM_PENDING; signal MLME_START.confirm(IEEE154_SUCCESS); } m_txState = S_TX_IDLE; signal IEEE154TxBeaconPayload.beaconTransmitted(); dbg_serial_flush(); } /* ----------------------- Beacon Payload ----------------------- */ /* * All access to the payload fields in the beacon happen * through a set of temporary variables/flags, and just before * the frame is loaded into the radio these changes are * written into the actual payload portion of the beacon frame. */ command error_t IEEE154TxBeaconPayload.setBeaconPayload(void *beaconPayload, uint8_t length) { if (length > IEEE154_aMaxBeaconPayloadLength) return ESIZE; else { if (m_payloadState & MODIFIED_BEACON_PAYLOAD) return EBUSY; m_updateBeaconPayload = beaconPayload; m_updateBeaconLength = length; m_updateBeaconOffset = 0; m_payloadState |= (MODIFIED_BEACON_PAYLOAD | MODIFIED_BEACON_PAYLOAD_NEW); } return SUCCESS; } command const void* IEEE154TxBeaconPayload.getBeaconPayload() { return &m_payload[IEEE154_aMaxBeaconOverhead]; } command uint8_t IEEE154TxBeaconPayload.getBeaconPayloadLength() { return m_beaconFrame.payloadLen - (m_pendingAddrLen + m_pendingGtsLen + 2); } command error_t IEEE154TxBeaconPayload.modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength) { uint16_t totalLen = offset + bufferLength; if (totalLen > IEEE154_aMaxBeaconPayloadLength || call IEEE154TxBeaconPayload.getBeaconPayloadLength() < totalLen) return ESIZE; else { if (m_payloadState & MODIFIED_BEACON_PAYLOAD) return EBUSY; m_updateBeaconPayload = buffer; m_updateBeaconOffset = offset; m_updateBeaconLength = bufferLength; m_payloadState |= MODIFIED_BEACON_PAYLOAD; } return SUCCESS; } event void PIBUpdate.notify[uint8_t attributeID](const void* attributeValue) { switch (attributeID) { case IEEE154_macAssociationPermit: atomic m_payloadState |= MODIFIED_SF_SPEC; break; case IEEE154_macGTSPermit: atomic m_payloadState |= MODIFIED_GTS_FIELD; break; default: break; } } event void PendingAddrSpecUpdated.notify(bool val) { atomic m_payloadState |= MODIFIED_PENDING_ADDR_FIELD; } event void GtsSpecUpdated.notify(bool val) { atomic m_payloadState |= MODIFIED_GTS_FIELD; } uint8_t getNumGtsSlots(uint8_t *gtsInfoField) { uint8_t i, num=0; for (i=0; i<((gtsInfoField[0] & GTS_DESCRIPTOR_COUNT_MASK) >> GTS_DESCRIPTOR_COUNT_OFFSET); i++) num += ((gtsInfoField[4+i*3] & GTS_LENGTH_MASK) >> GTS_LENGTH_OFFSET); return num; } event void BeaconPayloadUpdateTimer.fired() { // in this order the MAC payload is updated: // (1) pending addresses // (2) GTS spec // (3) SF spec // (4) beacon payload (if there's enough time) uint8_t len=0, *beaconSpecs = &m_payload[IEEE154_aMaxBeaconOverhead]; // going backwards uint8_t beaconPayloadUpdated = 0, numGtsSlots = m_numGtsSlots; atomic { if (m_txState == S_TX_LOCKED) { dbg_serial("BeaconTransmitP", "BeaconPayloadUpdateTimer fired too late!\n"); return; // too late ! } // (1) update pending addresses if (m_payloadState & MODIFIED_PENDING_ADDR_FIELD) { len = call PendingAddrWrite.write(beaconSpecs-1, beaconSpecs-m_payload); beaconSpecs -= len; if (len != m_pendingAddrLen) { m_pendingAddrLen = len; m_payloadState |= MODIFIED_SPECS_MASK; // need to rewrite specs before } } else beaconSpecs -= m_pendingAddrLen; // (2) update GTS spec if (m_payloadState & MODIFIED_GTS_FIELD) { len = call GtsInfoWrite.write(beaconSpecs-1, beaconSpecs-m_payload); beaconSpecs -= len; numGtsSlots = getNumGtsSlots(beaconSpecs); if (len != m_pendingGtsLen || ((15-numGtsSlots) != m_numCapSlots-1)) { m_pendingGtsLen = len; m_payloadState |= MODIFIED_SPECS_MASK; // need to rewrite specs before } } else beaconSpecs -= m_pendingGtsLen; // (3) update SF spec beaconSpecs -= 2; // sizeof SF Spec if (m_payloadState & MODIFIED_SF_SPEC) { beaconSpecs[BEACON_INDEX_SF_SPEC1] = (m_beaconOrder << SF_SPEC1_BO_OFFSET) | (m_superframeOrder << SF_SPEC1_SO_OFFSET); beaconSpecs[BEACON_INDEX_SF_SPEC2] = 0; if (call MLME_GET.macAssociationPermit()) beaconSpecs[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_ASSOCIATION_PERMIT; if (call MLME_GET.macPanCoordinator()) beaconSpecs[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_PAN_COORD; beaconSpecs[BEACON_INDEX_SF_SPEC2] |= ((15-numGtsSlots) & SF_SPEC2_FINAL_CAPSLOT_MASK); } m_beaconFrame.payloadLen = (m_pendingAddrLen + m_pendingGtsLen + 2) + m_beaconPayloadLen; m_beaconFrame.payload = beaconSpecs; m_payloadState &= ~MODIFIED_SPECS_MASK; // clear flags } // end atomic (give BeaconSendAlarm.fired() the chance to execute) signal IEEE154TxBeaconPayload.aboutToTransmit(); m_beaconFrame.header->mhr[MHR_INDEX_SEQNO] = call MLME_GET.macBSN() + 1; atomic { // (4) try to update beacon payload if (m_txState == S_TX_LOCKED) { dbg_serial("BeaconTransmitP", "Not enough time for beacon payload update!\n"); return; // too late ! } if (m_payloadState & MODIFIED_BEACON_PAYLOAD) { memcpy(&m_payload[IEEE154_aMaxBeaconOverhead + m_updateBeaconOffset], m_updateBeaconPayload, m_updateBeaconLength); beaconPayloadUpdated = (m_payloadState & MODIFIED_BEACON_PAYLOAD_MASK); if (beaconPayloadUpdated & MODIFIED_BEACON_PAYLOAD_NEW) m_beaconPayloadLen = m_updateBeaconOffset + m_updateBeaconLength; } m_beaconFrame.payloadLen = (m_pendingAddrLen + m_pendingGtsLen + 2) + m_beaconPayloadLen; m_payloadState &= ~MODIFIED_BEACON_PAYLOAD_MASK; } if (beaconPayloadUpdated) { if ((beaconPayloadUpdated & MODIFIED_BEACON_PAYLOAD_NEW)) signal IEEE154TxBeaconPayload.setBeaconPayloadDone(m_updateBeaconPayload, m_updateBeaconLength); else signal IEEE154TxBeaconPayload.modifyBeaconPayloadDone(m_updateBeaconOffset, m_updateBeaconPayload, m_updateBeaconLength); } } /* ----------------------- Realignment ----------------------- */ /* In beaconenabled mode a realignment frame is broadcast in the CAP * immediately after the beacon was transmitted. In non-beaconenabled mode a * realignment frame is sent using unslotted CSMA. In both cases, if the * transmission was successful, the superframe spec should be updated now. **/ event void RealignmentBeaconEnabledTx.transmitDone(ieee154_txframe_t *frame, ieee154_status_t status) { finishRealignment(frame, status); } event void RealignmentNonBeaconEnabledTx.transmitDone(ieee154_txframe_t *frame, ieee154_status_t status) { finishRealignment(frame, status); } void finishRealignment(ieee154_txframe_t *frame, ieee154_status_t status) { call GetSetRealignmentFrame.set(frame); if (status == IEEE154_SUCCESS) { continueStartRequest(); m_requestBitmap &= ~REQUEST_REALIGNMENT_DONE_PENDING; // unlock // signal confirm where we calculate the next beacon transmission time } else { m_requestBitmap = 0; signal MLME_START.confirm(status); } } /* ----------------------- BeaconRequest ----------------------- */ event message_t* BeaconRequestRx.received(message_t* frame) { if (m_beaconOrder == 15) { // transmit the beacon frame using unslotted CSMA-CA // TODO } return frame; } /* ----------------------- SF Structure, etc. ----------------------- */ async command uint32_t OutgoingSF.sfStartTime() { return m_lastBeaconTxTime; } async command uint32_t OutgoingSF.sfSlotDuration() { return m_sfSlotDuration; } async command uint8_t OutgoingSF.numCapSlots() { return m_numCapSlots; } async command uint8_t OutgoingSF.numGtsSlots() { return m_numGtsSlots; } async command uint16_t OutgoingSF.battLifeExtDuration() { return m_battLifeExtDuration; } async command const uint8_t* OutgoingSF.gtsFields() { return m_gtsField; } async command uint16_t OutgoingSF.guardTime() { return IEEE154_MAX_BEACON_JITTER(m_beaconOrder) + IEEE154_RADIO_TX_DELAY; } async command bool OutgoingSF.isBroadcastPending() { return m_framePendingBit; } async command uint32_t OutgoingSF.beaconInterval() { return ((uint32_t) 1 << m_beaconOrder) * IEEE154_aBaseSuperframeDuration; } async command bool IsSendingBeacons.getNow() { return (m_beaconOrder < 15) || ((m_requestBitmap & REQUEST_CONFIRM_PENDING) && m_updateBeaconOrder < 15); } default event void MLME_START.confirm(ieee154_status_t status) {} default event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) {} default event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) {} default event void IEEE154TxBeaconPayload.aboutToTransmit() {} default event void IEEE154TxBeaconPayload.beaconTransmitted() {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/CoordBroadcastP.nc000066400000000000000000000116771207233610700224710ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2009-03-24 12:56:46 $ * @author Jan Hauer * ======================================================================== */ /* This component is responsible for sending broadcast frames from * a coordinator to devices. **/ #include "TKN154_MAC.h" module CoordBroadcastP { provides { interface Init as Reset; interface FrameTx as BroadcastDataFrame; interface FrameTx as RealignmentTx; interface GetNow as IsBroadcastReady; } uses { interface Queue; interface FrameTxNow as CapTransmitNow; interface TransferableResource as RadioToken; interface SuperframeStructure as OutgoingSF; } } implementation { norace bool m_lock; norace ieee154_txframe_t *m_realignmentFrame; norace ieee154_txframe_t *m_queueHead; norace ieee154_txframe_t *m_transmittedFrame; norace ieee154_status_t m_status; task void transmitNowDoneTask(); command error_t Reset.init() { while (call Queue.size()) signal BroadcastDataFrame.transmitDone(call Queue.dequeue(), IEEE154_TRANSACTION_OVERFLOW); if (m_realignmentFrame) signal RealignmentTx.transmitDone(m_realignmentFrame, IEEE154_TRANSACTION_OVERFLOW); m_realignmentFrame = m_queueHead = m_transmittedFrame = NULL; m_lock = FALSE; return SUCCESS; } command ieee154_status_t BroadcastDataFrame.transmit(ieee154_txframe_t *txFrame) { if (call Queue.enqueue(txFrame) != SUCCESS) return IEEE154_TRANSACTION_OVERFLOW; atomic { if (m_queueHead == NULL) m_queueHead = call Queue.head(); } return IEEE154_SUCCESS; } command ieee154_status_t RealignmentTx.transmit(ieee154_txframe_t *frame) { atomic { if (!m_realignmentFrame) { m_realignmentFrame = frame; return IEEE154_SUCCESS; } else return IEEE154_TRANSACTION_OVERFLOW; } } async command bool IsBroadcastReady.getNow() { if (m_lock) return FALSE; else return (m_realignmentFrame != NULL || m_queueHead != NULL); } async event void RadioToken.transferredFrom(uint8_t fromClient) { // CAP has started - are there any broadcast frames to be transmitted? if (call OutgoingSF.isBroadcastPending()) { ieee154_txframe_t *broadcastFrame = m_realignmentFrame; if (broadcastFrame == NULL) broadcastFrame = m_queueHead; ASSERT(broadcastFrame != NULL); m_lock = TRUE; call CapTransmitNow.transmitNow(broadcastFrame); } call RadioToken.transferTo(RADIO_CLIENT_COORDCAP); } async event void CapTransmitNow.transmitNowDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { m_transmittedFrame = txFrame; m_status = status; post transmitNowDoneTask(); } task void transmitNowDoneTask() { if (!m_lock) return; if (m_transmittedFrame == m_realignmentFrame) { m_realignmentFrame = NULL; signal RealignmentTx.transmitDone(m_transmittedFrame, m_status); } else if (m_transmittedFrame == m_queueHead) { call Queue.dequeue(); if (call Queue.empty()) m_queueHead = NULL; else m_queueHead = call Queue.head(); signal BroadcastDataFrame.transmitDone(m_transmittedFrame, m_status); } m_lock = FALSE; } event void RadioToken.granted(){ ASSERT(0); } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/CoordCfpP.nc000066400000000000000000000464101207233610700212700ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ #include "TKN154_MAC.h" #include "GTS.h" module CoordCfpP { provides { interface Init; interface WriteBeaconField as GtsInfoWrite; interface FrameTx as CfpTx; interface Purge; interface FrameRx; interface Notify as GtsSpecUpdated; interface MLME_GTS; } uses { interface TransferableResource as RadioToken; interface Alarm as CfpSlotAlarm; interface Alarm as CfpEndAlarm; interface SuperframeStructure as OutgoingSF; interface RadioTx; interface RadioRx; interface RadioOff; interface MLME_GET; interface MLME_SET; interface FrameRx as GtsRequestRx; interface IEEE154Frame as Frame; } } implementation { uint8_t m_slotNumber; uint8_t m_gtsStartSlot; uint32_t m_numGtsSlots; uint32_t m_numCapSlots; uint32_t m_cfpSlotDuration; uint32_t m_cfpDurationn; uint32_t m_capDuration; norace gtsInfoEntryType m_gtsDatabase[GTS_MAX_SLOTS]; gtsInfoEntryType m_expiredDesc; gtsDescriptorType m_savedDescriptor; gtsSlotElementType m_gtsSlotList[GTS_MAX_SLOTS]; //maps messages in the GTS buffer to each gts slot uint8_t m_gtsDescriptorCount; uint8_t m_gtsDirections; uint8_t m_gts_schedule[IEEE154_aNumSuperframeSlots]; //the GTS schedule that relates a slot with the corresponding GTS slot number uint8_t m_gtsSlotNumber; gtsBufferType m_gtsSendBuffer; gtsSlotElementType *gtsTXSlotListPtr; uint8_t m_currentTxGts; uint8_t m_reqPending; uint8_t m_beaconCounter; task void startCoordGtsSend(); task void removeGtsDescTask(); task void gtsExpirationManagementTask(); task void signalGtsTrasmitDoneTask(); error_t m_txResult; ieee154_txframe_t *m_transmitedFrame; uint8_t computeExpirationTime (ieee154_macBeaconOrder_t BO) { uint8_t expon; uint8_t gtsExpirationTime; if (BO < 9) { expon=8-BO; if (expon == 0) gtsExpirationTime=2; else { expon--; gtsExpirationTime=2 * (2< 0) { m_gtsDatabase[i].startingSlot=0; //set starting slot to 0 signal GtsSpecUpdated.notify(TRUE); return GTS_OP_SUCCESS; } } return GTS_OP_FAILED; } } gts_op_status_t removeGts (uint8_t gtsLength, uint8_t direction, uint16_t address) { uint8_t i; uint8_t removedLength=0; uint8_t removedSSlot=0; uint8_t removedGtsId=0; uint8_t slotFound=0; //search for the slot for (i=0; i 0) { removedLength=m_gtsDatabase[i].length; removedSSlot=m_gtsDatabase[i].startingSlot; removedGtsId=m_gtsDatabase[i].gtsId; m_gtsDatabase[i].gtsId=0; m_gtsDatabase[i].startingSlot=0; m_gtsDatabase[i].length=0; m_gtsDatabase[i].direction=0; m_gtsDatabase[i].devAddress=0; m_gtsDatabase[i].expiration=0; slotFound=1; } } if (slotFound) { //adjust table if (m_gtsDescriptorCount > 1 && removedGtsId < m_gtsDescriptorCount) { for (i=removedGtsId-1; i=m_gtsStartSlot; i--) { m_gts_schedule[i]=m_gts_schedule[i-removedLength]-1; if (m_gts_schedule[i] > 16) m_gts_schedule[i]=255; } m_gtsStartSlot=m_gtsStartSlot+removedLength; signal GtsSpecUpdated.notify(TRUE); m_reqPending=0; return GTS_OP_SUCCESS; } else { //failed ot remove m_reqPending=0; return GTS_OP_FAILED; } } gts_op_status_t addGts (uint8_t gtsLength, uint8_t direction, uint16_t address) { uint8_t i; if (m_gtsDescriptorCount >= GTS_MAX_SLOTS) { m_reqPending=0; return GTS_OP_FAILED; } //check if the address already exists in the GTS list for (i=0 ; i < GTS_MAX_SLOTS; i++) { if ( m_gtsDatabase[i].devAddress == address && m_gtsDatabase[i].direction == direction && m_gtsDatabase[i].gtsId > 0) { m_reqPending=0; return GTS_OP_FAILED; } } m_gtsStartSlot-=gtsLength; m_gtsDatabase[m_gtsDescriptorCount].gtsId=m_gtsDescriptorCount+1; m_gtsDatabase[m_gtsDescriptorCount].startingSlot=m_gtsStartSlot; m_gtsDatabase[m_gtsDescriptorCount].length=gtsLength; m_gtsDatabase[m_gtsDescriptorCount].direction=direction; m_gtsDatabase[m_gtsDescriptorCount].devAddress=address; m_gtsDatabase[m_gtsDescriptorCount].expiration=0x00; for (i=m_gtsStartSlot; iheader->mhr[MHR_INDEX_ADDRESS+2])) | ((data->header->mhr[MHR_INDEX_ADDRESS+3]) << 8); for (i=0 ; i < GTS_MAX_SLOTS ; i++) { //SEARCH FOR A VALID GTS if ( m_gtsDatabase[i].devAddress == dstAddr && m_gtsDatabase[i].direction == GTS_RX_DIRECTION && m_gtsDatabase[i].gtsId != 0) { gtsAvailableIndex=m_gtsSendBuffer.availableGtsIndex[m_gtsSendBuffer.availableGtsIndexCount]; m_gtsSendBuffer.availableGtsIndexCount --; m_gtsSendBuffer.frame[gtsAvailableIndex]=data; m_gtsSlotList[i].elementCount ++; m_gtsSlotList[i].gtsFrameIndex[m_gtsSlotList[i].elementIn]=gtsAvailableIndex; m_gtsSlotList[i].elementIn ++; status=1; } } if (!status) atomic signal CfpTx.transmitDone(data, IEEE154_INVALID_GTS); } return IEEE154_SUCCESS; } command ieee154_status_t Purge.purge (uint8_t msduHandle) { // request to purge a frame (triggered by MCPS_DATA.purge()) return IEEE154_INVALID_HANDLE; } async event void RadioToken.transferredFrom (uint8_t fromClient) { // the CFP has started, this component now owns the token - atomic{ uint16_t guardTime=call OutgoingSF.guardTime(); m_cfpSlotDuration = (uint32_t) call OutgoingSF.sfSlotDuration(); m_numCapSlots=(uint32_t) call OutgoingSF.numCapSlots(); m_numGtsSlots=16-m_numCapSlots; m_cfpDurationn=(uint32_t) m_numGtsSlots * m_cfpSlotDuration; m_capDuration=m_numCapSlots * m_cfpSlotDuration; m_slotNumber=(uint8_t) m_numCapSlots; call CfpEndAlarm.startAt(call OutgoingSF.sfStartTime(), m_capDuration+m_cfpDurationn-guardTime); call CfpSlotAlarm.startAt(call OutgoingSF.sfStartTime(), m_capDuration); } if (m_reqPending == 2) { m_beaconCounter++; if (m_beaconCounter > IEEE154_aGTSDescPersistenceTime-1) { post removeGtsDescTask(); } } post gtsExpirationManagementTask(); } async event void CfpEndAlarm.fired () { call CfpEndAlarm.stop(); call CfpSlotAlarm.stop(); //Transfer token #ifndef IEEE154_BEACON_SYNC_DISABLED call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE); #else call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT); #endif } async event void CfpSlotAlarm.fired () { m_gtsSlotNumber=m_gts_schedule[m_slotNumber]; //check schedule for the gts slot number if (m_gtsSlotNumber<=GTS_MAX_SLOTS ) { if (m_gtsDatabase[m_gtsSlotNumber].direction == GTS_RX_DIRECTION && m_gtsDatabase[m_gtsSlotNumber].gtsId != 0) { call RadioOff.off(); atomic if (m_gtsSlotNumber <= GTS_MAX_SLOTS ) post startCoordGtsSend(); } else if (m_gtsDatabase[m_gtsSlotNumber].direction == GTS_TX_DIRECTION && m_gtsDatabase[m_gtsSlotNumber].gtsId != 0) { call RadioRx.enableRx(0, 0); } } if (m_slotNumber < IEEE154_aNumSuperframeSlots-1) call CfpSlotAlarm.startAt(call OutgoingSF.sfStartTime(), m_cfpSlotDuration*(m_slotNumber+1)); else { call CfpSlotAlarm.stop(); } m_slotNumber++; } async event void RadioOff.offDone () {} event message_t* GtsRequestRx.received (message_t* frame) { uint8_t *payload=(uint8_t *) &frame->data; error_t status=0; ieee154_address_t srcAddress; uint8_t gtsCharacteristics = *(payload+1); atomic if (!m_reqPending) { m_reqPending=1; call Frame.getSrcAddr(frame, &srcAddress); if (GtsGetReqType(gtsCharacteristics) == GTS_ALOC_REQ) //allocation request status = addGts(GtsGetLength(gtsCharacteristics), GtsGetDirection(gtsCharacteristics), srcAddress.shortAddress); else if (GtsGetReqType(gtsCharacteristics) == GTS_DEALOC_REQ) status=removeGts(GtsGetLength(gtsCharacteristics), GtsGetDirection(gtsCharacteristics), srcAddress.shortAddress); if (status == 1) { signal MLME_GTS.indication ( srcAddress.shortAddress, gtsCharacteristics, 0); } m_reqPending=0; } return (frame); } command uint8_t GtsInfoWrite.write (uint8_t *lastBytePtr, uint8_t maxlen) { uint8_t ind=0; uint8_t slot; if (maxlen == 0) return 0; else { if (m_gtsDescriptorCount) { m_gtsDirections=0; for (slot=0; slot<7;slot++) { if (m_gtsDatabase[slot].gtsId != 0 && m_gtsDatabase[slot].devAddress!=0x0000) { lastBytePtr[-ind]=GtsSetDescriptor(m_gtsDatabase[slot].startingSlot, m_gtsDatabase[slot].length); ind++; lastBytePtr[-ind]=m_gtsDatabase[slot].devAddress >> 8; ind++; lastBytePtr[-ind]=m_gtsDatabase[slot].devAddress; ind++; if ( m_gtsDatabase[slot].direction == GTS_RX_DIRECTION ) m_gtsDirections=m_gtsDirections | (1 << slot); } } lastBytePtr[-ind]=m_gtsDirections; ind++; } lastBytePtr[-ind]=GtsSetSpecification(m_gtsDescriptorCount, 1); return ind+1; } } task void signalGtsTrasmitDoneTask() { atomic { signal CfpTx.transmitDone(m_transmitedFrame, m_txResult); //transmitted a frame and got ack: reset slot expiration counter m_gtsDatabase[m_gtsSlotNumber].expiration=0; } //continue transmitting m_gtsSendBuffer.availableGtsIndexCount++; m_gtsSendBuffer.availableGtsIndex[m_gtsSendBuffer.availableGtsIndexCount]= gtsTXSlotListPtr->gtsFrameIndex[gtsTXSlotListPtr->elementOut]; gtsTXSlotListPtr->elementCount--; if (gtsTXSlotListPtr->elementOut++ >= GTS_SEND_BUFFER_SIZE) gtsTXSlotListPtr->elementOut=0; if ( gtsTXSlotListPtr->elementCount > 0) post startCoordGtsSend(); } async event void RadioTx.transmitDone ( ieee154_txframe_t *frame, error_t result) { atomic { m_txResult=result; m_transmitedFrame=frame; } post signalGtsTrasmitDoneTask(); } async event void RadioRx.enableRxDone(){} event message_t* RadioRx.received(message_t *frame) { //received a frame: reset slot expiration counter atomic m_gtsDatabase[m_gtsSlotNumber].expiration=0; return signal FrameRx.received(frame); } event void RadioToken.granted() { ASSERT(0); // should never happen, because we never call RadioToken.request() } command ieee154_status_t MLME_GTS.requestFromPAN ( uint8_t GtsCharacteristics, uint16_t DeviceAddress, ieee154_security_t *security ) { //This is used in case the Coordinator whishes to deallocate a gts error_t status=0; if (!m_reqPending) { m_reqPending=2; if (GtsGetReqType(GtsCharacteristics) == GTS_DEALOC_REQ) status=removeGtsFromPAN(GtsGetLength(GtsCharacteristics), GtsGetDirection(GtsCharacteristics), DeviceAddress); if (status == GTS_OP_SUCCESS) { signal MLME_GTS.indication ( DeviceAddress, GtsCharacteristics, 0); m_reqPending=2; m_savedDescriptor.gtsCharacteristics=GtsCharacteristics; m_savedDescriptor.devAddress=DeviceAddress; } else{ m_reqPending=0; } } } task void startCoordGtsSend () { atomic{ if (m_gtsSlotNumber<=GTS_MAX_SLOTS) { gtsTXSlotListPtr=&m_gtsSlotList[m_gtsSlotNumber]; m_currentTxGts=m_gtsSlotNumber; if (gtsTXSlotListPtr->elementCount > 0) { ieee154_macDSN_t dsn = call MLME_GET.macDSN(); ieee154_txframe_t* gtsFrame = m_gtsSendBuffer.frame[gtsTXSlotListPtr->gtsFrameIndex[gtsTXSlotListPtr->elementOut]]; gtsFrame->header->mhr[MHR_INDEX_SEQNO]=dsn; call MLME_SET.macDSN(dsn+1); call RadioTx.transmit(gtsFrame,0, 0); } } } } task void removeGtsDescTask () { atomic{ if (removeGts(GtsGetLength(m_savedDescriptor.gtsCharacteristics), GtsGetDirection(m_savedDescriptor.gtsCharacteristics), m_savedDescriptor.devAddress)) { m_reqPending=0; m_beaconCounter=0; } } } task void gtsExpirationManagementTask() { uint8_t desc; uint8_t gtsExpTime; //Increase expiration counters and check expiration gtsExpTime=computeExpirationTime(call MLME_GET.macBeaconOrder()); for (desc=0; desc < GTS_MAX_SLOTS; desc++) { atomic if (m_gtsDatabase[desc].gtsId) { if (m_gtsDatabase[desc].expiration++ >= gtsExpTime-1) { //deallocate gts m_reqPending=1; removeGts(m_gtsDatabase[desc].length,m_gtsDatabase[desc].direction, m_gtsDatabase[desc].devAddress); m_reqPending=0; } } } } command ieee154_status_t MLME_GTS.request ( uint8_t GtsCharacteristics, ieee154_security_t *security ){} command error_t GtsSpecUpdated.enable () {return FAIL;} command error_t GtsSpecUpdated.disable () {return FAIL;} default event void GtsSpecUpdated.notify (bool val) {return;} default event void MLME_GTS.indication ( uint16_t DeviceAddress, uint8_t GtsCharacteristics, ieee154_security_t *security ){} default event void MLME_GTS.confirm ( uint8_t GtsCharacteristics, ieee154_status_t status ){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/CoordRealignmentP.nc000066400000000000000000000200111207233610700230120ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-06-02 08:40:12 $ * @author Jan Hauer * ======================================================================== */ /* "The coordinator realignment command is sent by the PAN coordinator or a * coordinator either following the reception of an orphan notification command * from a device that is recognized to be on its PAN or when any of its PAN * configuration attributes change due to the receipt of an MLME-START.request * primitive." IEEE 802.15.4-2006, Sec. 7.3.8 **/ #include "TKN154_MAC.h" module CoordRealignmentP { provides { interface Init; interface MLME_ORPHAN; interface MLME_COMM_STATUS; interface GetSet as GetSetRealignmentFrame; } uses { interface FrameTx as CoordRealignmentTx; interface FrameRx as OrphanNotificationRx; interface FrameUtility; interface MLME_GET; interface IEEE154Frame as Frame; interface Pool as TxFramePool; interface Pool as TxControlPool; interface Get as LocalExtendedAddress; } } implementation { enum { ORPHAN_RESPONSE, BEACON_REALIGNMENT, }; uint8_t m_payload[9]; bool m_busy = FALSE; void destroyRealignmentFrame(ieee154_txframe_t *frame); ieee154_txframe_t *newRealignmentFrame(uint8_t type, ieee154_address_t *dstAddress); command error_t Init.init() { return SUCCESS; } command ieee154_txframe_t* GetSetRealignmentFrame.get() { ieee154_address_t bcastAddr; bcastAddr.shortAddress = 0xFFFF; return newRealignmentFrame(BEACON_REALIGNMENT, &bcastAddr); } command void GetSetRealignmentFrame.set(ieee154_txframe_t* frame) { destroyRealignmentFrame(frame); } event message_t* OrphanNotificationRx.received(message_t* frame) { ieee154_address_t srcAddress; if (call Frame.getSrcAddrMode(frame) == ADDR_MODE_EXTENDED_ADDRESS && call Frame.getSrcAddr(frame, &srcAddress) == SUCCESS) signal MLME_ORPHAN.indication ( srcAddress.extendedAddress, NULL); return frame; } command ieee154_status_t MLME_ORPHAN.response ( uint64_t OrphanAddress, uint16_t ShortAddress, bool AssociatedMember, ieee154_security_t *security) { ieee154_txframe_t *txFrame; ieee154_status_t txStatus; ieee154_address_t dstAddress; dstAddress.extendedAddress = OrphanAddress; if (!AssociatedMember) txStatus = IEEE154_SUCCESS; else if (m_busy || (txFrame = newRealignmentFrame(ORPHAN_RESPONSE, &dstAddress)) == NULL) txStatus = IEEE154_TRANSACTION_OVERFLOW; else { m_busy = TRUE; txFrame->payload[0] = CMD_FRAME_COORDINATOR_REALIGNMENT; *((nxle_uint16_t*) &txFrame->payload[1]) = call MLME_GET.macPANId(); *((nxle_uint16_t*) &txFrame->payload[3]) = call MLME_GET.macShortAddress(); txFrame->payload[5] = call MLME_GET.phyCurrentChannel(); *((nxle_uint16_t*) &txFrame->payload[6]) = ShortAddress; txFrame->payloadLen = 8; if ((txStatus = call CoordRealignmentTx.transmit(txFrame)) != IEEE154_SUCCESS) { m_busy = FALSE; destroyRealignmentFrame(txFrame); } } return txStatus; } ieee154_txframe_t *newRealignmentFrame(uint8_t type, ieee154_address_t *dstAddress) { ieee154_txframe_t *txFrame = NULL; ieee154_txcontrol_t *txControl; uint8_t dstAddrMode; ieee154_address_t srcAddress; if ((txFrame = call TxFramePool.get()) != NULL) { if ((txControl = call TxControlPool.get()) == NULL) { call TxFramePool.put(txFrame); txFrame = NULL; } else { txFrame->header = &txControl->header; txFrame->metadata = &txControl->metadata; txFrame->payload = m_payload; txFrame->header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_CMD; txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED; if (type == ORPHAN_RESPONSE) { txFrame->header->mhr[MHR_INDEX_FC2] |= FC2_DEST_MODE_EXTENDED; dstAddrMode = ADDR_MODE_EXTENDED_ADDRESS; txFrame->header->mhr[MHR_INDEX_FC1] |= FC1_ACK_REQUEST; } else { txFrame->header->mhr[MHR_INDEX_FC2] |= FC2_DEST_MODE_SHORT; dstAddrMode = ADDR_MODE_SHORT_ADDRESS; } srcAddress.extendedAddress = call LocalExtendedAddress.get(); txFrame->headerLen = call FrameUtility.writeHeader( txFrame->header->mhr, dstAddrMode, 0xFFFF, dstAddress, ADDR_MODE_EXTENDED_ADDRESS, call MLME_GET.macPANId(), &srcAddress, FALSE); } } return txFrame; } void destroyRealignmentFrame(ieee154_txframe_t *frame) { call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) frame->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(frame); } event void CoordRealignmentTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { uint8_t *mhr = MHR(txFrame); ieee154_address_t dstAddr; ieee154_address_t srcAddr; if (m_busy) { call FrameUtility.convertToNative(&dstAddr.extendedAddress, &mhr[MHR_INDEX_ADDRESS+2]); call FrameUtility.convertToNative(&srcAddr.extendedAddress, &mhr[MHR_INDEX_ADDRESS+2+8+2]); signal MLME_COMM_STATUS.indication ( *((nxle_uint16_t*) &txFrame->payload[1]), // PANId ADDR_MODE_EXTENDED_ADDRESS, // SrcAddrMode srcAddr, ADDR_MODE_EXTENDED_ADDRESS, // DstAddrMode dstAddr, status, NULL); call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(txFrame); m_busy = FALSE; } } default event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security) {} default event void MLME_ORPHAN.indication ( uint64_t OrphanAddress, ieee154_security_t *security) {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/DataP.nc000066400000000000000000000237141207233610700204440ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2009-04-28 14:12:03 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" module DataP { provides { interface Init; interface MCPS_DATA; interface MCPS_PURGE; } uses { interface FrameRx as CoordCapRx; interface FrameTx as DeviceCapTx; interface FrameTx as CoordCapTx; interface FrameTx as BroadcastTx; interface FrameRx as DeviceCapRx; interface Pool as TxFramePool; interface FrameTx as DeviceCfpTx; interface FrameTx as CoordCfpTx; interface FrameTx as IndirectTx; interface FrameRx as CoordCfpRx; interface FrameRx as DeviceCfpRx; interface FrameUtility; interface Purge as PurgeDirect; interface Purge as PurgeIndirect; interface Purge as PurgeGtsDevice; interface Purge as PurgeGtsCoord; interface MLME_GET; interface Leds; interface Packet; interface IEEE154Frame as Frame; interface Get as LocalExtendedAddress; } } implementation { message_t* dataReceived(message_t* frame); void finishTxTransaction(ieee154_txframe_t *txFrame, ieee154_status_t status); command error_t Init.init() { return SUCCESS; } command ieee154_status_t MCPS_DATA.request ( message_t *frame, uint8_t payloadLen, uint8_t msduHandle, uint8_t txOptions) { uint8_t srcAddrMode = call Frame.getSrcAddrMode(frame); uint8_t dstAddrMode = call Frame.getDstAddrMode(frame); ieee154_address_t dstAddr; ieee154_status_t txStatus; ieee154_txframe_t *txFrame; uint8_t sfType=0; uint8_t *mhr, mhrLen = call Frame.getHeaderLength(frame); if (payloadLen > call Packet.maxPayloadLength() || mhrLen + payloadLen + 2 > IEEE154_aMaxPHYPacketSize) // extra 2 for MAC footer (CRC) txStatus = IEEE154_INVALID_PARAMETER; else if ((!srcAddrMode && !dstAddrMode) || (srcAddrMode > ADDR_MODE_EXTENDED_ADDRESS || dstAddrMode > ADDR_MODE_EXTENDED_ADDRESS) || (srcAddrMode == ADDR_MODE_RESERVED || dstAddrMode == ADDR_MODE_RESERVED)) txStatus = IEEE154_INVALID_ADDRESS; else if (!(txFrame = call TxFramePool.get())) txStatus = IEEE154_TRANSACTION_OVERFLOW; else { // construct the DATA frame txFrame->header = &((message_header_t*) frame->header)->ieee154; txFrame->payload = (uint8_t*) frame->data; txFrame->metadata = &((message_metadata_t*) frame->metadata)->ieee154; txFrame->payloadLen = payloadLen; mhr = txFrame->header->mhr; txFrame->headerLen = mhrLen; mhr[MHR_INDEX_FC1] &= ~(FC1_FRAMETYPE_MASK | FC1_FRAME_PENDING | FC1_ACK_REQUEST); mhr[MHR_INDEX_FC1] |= FC1_FRAMETYPE_DATA; if (txOptions & TX_OPTIONS_ACK) mhr[MHR_INDEX_FC1] |= FC1_ACK_REQUEST; mhr[MHR_INDEX_FC2] &= ~FC2_FRAME_VERSION_MASK; if (payloadLen > IEEE154_aMaxMACSafePayloadSize) mhr[MHR_INDEX_FC2] |= FC2_FRAME_VERSION_1; txFrame->handle = msduHandle; // in case a node is both, coordinator and device (e.g. in a // cluster-tree topology), it has to be decided whether the frame // is to be sent in the incoming or outgoing superframe (sf); // we do this by comparing the destination address to the // coordinator address in the PIB, if they match the frame is // sent in the incoming sf otherwise in the outgoing sf call Frame.getDstAddr(frame, &dstAddr); if (dstAddrMode == ADDR_MODE_SHORT_ADDRESS) { if (dstAddr.shortAddress == call MLME_GET.macCoordShortAddress()) sfType = INCOMING_SUPERFRAME; else sfType = OUTGOING_SUPERFRAME; } else if (dstAddrMode == ADDR_MODE_EXTENDED_ADDRESS) { if (dstAddr.extendedAddress == call MLME_GET.macCoordExtendedAddress()) sfType = INCOMING_SUPERFRAME; else sfType = OUTGOING_SUPERFRAME; } else if (dstAddrMode == ADDR_MODE_NOT_PRESENT) // to PAN Coord sfType = INCOMING_SUPERFRAME; // GTS? if (txOptions & TX_OPTIONS_GTS) { if (sfType == INCOMING_SUPERFRAME) txStatus = call DeviceCfpTx.transmit(txFrame); else txStatus = call CoordCfpTx.transmit(txFrame); // indirect transmission? } else if ((txOptions & TX_OPTIONS_INDIRECT) && (dstAddrMode >= ADDR_MODE_SHORT_ADDRESS)) { if (dstAddrMode == ADDR_MODE_SHORT_ADDRESS && dstAddr.shortAddress == 0xFFFF) { mhr[MHR_INDEX_FC1] &= ~FC1_ACK_REQUEST; txStatus = call BroadcastTx.transmit(txFrame); } else txStatus = call IndirectTx.transmit(txFrame); // transmission in the CAP } else if (sfType == INCOMING_SUPERFRAME) txStatus = call DeviceCapTx.transmit(txFrame); else txStatus = call CoordCapTx.transmit(txFrame); if (txStatus != IEEE154_SUCCESS) { call TxFramePool.put(txFrame); } } return txStatus; } command ieee154_status_t MCPS_PURGE.request ( uint8_t msduHandle) { if (call PurgeDirect.purge(msduHandle) == IEEE154_SUCCESS || call PurgeIndirect.purge(msduHandle) == IEEE154_SUCCESS || call PurgeGtsDevice.purge(msduHandle) == IEEE154_SUCCESS || call PurgeGtsCoord.purge(msduHandle) == IEEE154_SUCCESS) return IEEE154_SUCCESS; else return IEEE154_INVALID_HANDLE; } event void PurgeDirect.purgeDone(ieee154_txframe_t *data, ieee154_status_t status) { finishTxTransaction(data, status); } event void PurgeIndirect.purgeDone(ieee154_txframe_t *data, ieee154_status_t status) { finishTxTransaction(data, status); } event void PurgeGtsDevice.purgeDone(ieee154_txframe_t *data, ieee154_status_t status) { finishTxTransaction(data, status); } event void PurgeGtsCoord.purgeDone(ieee154_txframe_t *data, ieee154_status_t status) { finishTxTransaction(data, status); } event message_t* CoordCfpRx.received(message_t* frame) { return dataReceived(frame); } event message_t* DeviceCfpRx.received(message_t* frame) { return dataReceived(frame); } event message_t* CoordCapRx.received(message_t* frame) { return dataReceived(frame); } event message_t* DeviceCapRx.received(message_t* frame) { return dataReceived(frame); } message_t* dataReceived(message_t* frame) { return signal MCPS_DATA.indication(frame); } void finishTxTransaction(ieee154_txframe_t *txFrame, ieee154_status_t status) { uint8_t handle = txFrame->handle; uint32_t txTime = txFrame->metadata->timestamp; message_t *msg = (message_t*) ((uint8_t*) txFrame->header - offsetof(message_t, header)); call TxFramePool.put(txFrame); signal MCPS_DATA.confirm(msg, handle, status, txTime); } event void BroadcastTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { finishTxTransaction(txFrame, status); } event void DeviceCapTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { finishTxTransaction(txFrame, status); } event void CoordCapTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { finishTxTransaction(txFrame, status); } event void DeviceCfpTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { finishTxTransaction(txFrame, status); } event void CoordCfpTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { finishTxTransaction(txFrame, status); } event void IndirectTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { finishTxTransaction(txFrame, status); } default event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp) {} default event message_t* MCPS_DATA.indication(message_t* frame) { return frame; } default command ieee154_status_t DeviceCfpTx.transmit(ieee154_txframe_t *data) {return IEEE154_INVALID_GTS;} default command ieee154_status_t BroadcastTx.transmit(ieee154_txframe_t *data) {return IEEE154_INVALID_PARAMETER;} default command ieee154_status_t CoordCfpTx.transmit(ieee154_txframe_t *data) {return IEEE154_INVALID_GTS;} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/DebugC.nc000066400000000000000000000042131207233610700205750ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-25 16:47:49 $ * @author: Jan Hauer * ======================================================================== */ #define NEW_PRINTF_SEMANTICS #include "printf.h" configuration DebugC { } implementation { components DebugP, LedsC, MainC; DebugP.Boot -> MainC; DebugP.Leds -> LedsC; components PrintfC; components SerialStartC; #if defined(PLATFORM_TELOSB) components UserButtonC; DebugP.ButtonPressed -> UserButtonC; #endif } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/DebugP.nc000066400000000000000000000116151207233610700206160ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-04-17 14:47:09 $ * @author: Jan Hauer * ======================================================================== */ #include "printf.h" #if defined(PLATFORM_TELOSB) #include #endif module DebugP { uses { interface Boot; interface Leds; #if defined(PLATFORM_TELOSB) interface Notify as ButtonPressed; #endif } } implementation { enum { MAX_LEN_FUNNAME = 50, MAX_LEN_FILENAME = 50, NUM_LIST_ENTRIES = 20, }; typedef struct { const char *filename; uint16_t line; const char *format; uint32_t param[2]; } debug_list_entry_t; norace debug_list_entry_t m_list[NUM_LIST_ENTRIES]; norace uint8_t m_head; norace uint8_t m_tail; norace bool m_overflow; uint16_t m_assertCounter; norace uint16_t m_assertLine; norace char m_assertFilename[MAX_LEN_FILENAME]; norace char m_assertFunction[MAX_LEN_FUNNAME]; event void Boot.booted() { #if defined(PLATFORM_TELOSB) call ButtonPressed.enable(); #endif } #if defined(PLATFORM_TELOSB) event void ButtonPressed.notify( button_state_t val ) { dbg_serial_flush(); } #endif task void assertFailTask() { if (m_assertCounter == 0) { printf("Assert failed: File: %s, line: %d, function: %s.\n", m_assertFilename, m_assertLine, m_assertFunction); printfflush(); } if (m_assertCounter++ < 3000) { call Leds.led0On(); call Leds.led1On(); call Leds.led2On(); } else { call Leds.led0Off(); call Leds.led1Off(); call Leds.led2Off(); } if (m_assertCounter > 6000) m_assertCounter = 0; post assertFailTask(); } void tkn154_assert(bool val, const char *filename, uint16_t line, const char *func) @C() @spontaneous() { if (!val) { if (m_assertLine == 0) { // only catch the first failure, output it periodically m_assertLine = line; strncpy(m_assertFilename, filename, MAX_LEN_FILENAME); strncpy(m_assertFunction, func, MAX_LEN_FUNNAME); post assertFailTask(); } } } void tkn154_dbg_serial(const char *filename, uint16_t line, ...) @C() @spontaneous() { // This function must be fast: we just copy the strings and // output them later in the flush-function if ((m_head + 1) % NUM_LIST_ENTRIES != m_tail) { va_list argp; m_list[m_head].filename = filename; m_list[m_head].line = line; va_start(argp, line); m_list[m_head].format = va_arg(argp, char*); m_list[m_head].param[0] = va_arg(argp, uint32_t); m_list[m_head].param[1] = va_arg(argp, uint32_t); va_end(argp); m_head = (m_head + 1) % NUM_LIST_ENTRIES; } else m_overflow = TRUE; } task void serialFlushTask() { if (m_overflow) printf("SERIAL OVERFLOW!\n"); if (m_head != m_tail) { printf("%s:%d:", m_list[m_tail].filename, m_list[m_tail].line); printf(m_list[m_tail].format, m_list[m_tail].param[0], m_list[m_tail].param[1]); atomic { if (++m_tail >= NUM_LIST_ENTRIES) m_tail = 0; } } if (m_head != m_tail) post serialFlushTask(); printfflush(); } void tkn154_dbg_serial_flush() @C() @spontaneous() { post serialFlushTask(); } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/DeviceCfpP.nc000066400000000000000000000350741207233610700214250ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ #include "TKN154_MAC.h" #include "GTS.h" module DeviceCfpP { provides { interface Init; interface FrameTx as CfpTx; interface Purge; interface FrameRx; interface MLME_GTS; } uses { interface TransferableResource as RadioToken; interface Alarm as CfpSlotAlarm; interface Alarm as CfpEndAlarm; interface SuperframeStructure as IncomingSF; interface RadioTx; interface RadioRx; interface RadioOff; interface MLME_GET; interface MLME_SET; interface FrameTx as GTSrequestTx; interface Pool as TxFramePool; interface Pool as TxControlPool; interface FrameUtility; } } implementation { uint8_t m_gtsReqCharacteristics; uint8_t m_gtsCharacteristics; uint16_t m_gtsSlotAddress; uint8_t m_gtsReqPending; uint8_t m_gtsBeaconCounter; uint8_t m_gtsField[1+1+3*7]; gtsBufferType m_gtsSendBuffer; uint8_t m_slotNumber; uint8_t m_gtsTxStartSlot; uint8_t m_gtsTxEndSlot; uint8_t m_gtsRxStartSlot; uint8_t m_gtsRxEndSlot; uint32_t m_numGtsSlots; uint32_t m_numCapSlots; uint32_t m_cfpSlotDuration; uint32_t m_cfpDuration; uint32_t m_capDuration; uint8_t m_gtsTXON; uint8_t m_gtsRXON; uint8_t m_gtsSlotDir; uint8_t m_payload_GTS_Request[2]; uint8_t m_GtsOnTXSlot; ieee154_macShortAddress_t m_myAddress; ieee154_txframe_t *m_frameDone; task void startGtsSend(); task void signalGtsConfirmSuccessTask(); task void signalGtsConfirmDeniedTask(); task void signalCfpTxDone(); task void signalGtsConfirmNoAddressTask(); task void signalGtsIndicationTask(); task void signalGtsConfirmNoDataTask(); void initGtsBuffer() { int i=0; atomic for(i=0;i<7;i++) { m_gtsSendBuffer.gtsSendBufferCount = 0x00; m_gtsSendBuffer.gtsSendBufferMsgIn = 0x00; m_gtsSendBuffer.gtsSendBufferMsgOut = 0x00; } } uint8_t GtsSetCharacteristics(uint8_t gtsLength, uint8_t gtsDirection, uint8_t characteristicType) { return ( (gtsLength << 0) | (gtsDirection << 4) | (characteristicType << 5)); } uint8_t GtsGetReqType(uint8_t gtsCharacteristics) { if ( (gtsCharacteristics & 0x20) == 0x20) return GTS_ALOC_REQ; else return GTS_DEALOC_REQ; } command error_t Init.init() { atomic{ m_gtsReqPending=0; m_gtsBeaconCounter=0; m_gtsTXON=0; m_gtsRXON=0; m_GtsOnTXSlot=0; } initGtsBuffer(); return SUCCESS; } command ieee154_status_t MLME_GTS.request ( uint8_t GtsCharacteristics, ieee154_security_t *security ) { ieee154_status_t status = IEEE154_SUCCESS; ieee154_txframe_t *txFrame=0; ieee154_txcontrol_t *txControl=0; ieee154_address_t srcAddress; ieee154_macDSN_t dsn = call MLME_GET.macDSN(); ieee154_address_t DeviceAddress; atomic m_gtsCharacteristics=GtsCharacteristics; if (security && security->SecurityLevel) status = IEEE154_UNSUPPORTED_SECURITY; atomic { m_myAddress=srcAddress.shortAddress=call MLME_GET.macShortAddress(); if ( srcAddress.shortAddress==0xFFFF || srcAddress.shortAddress==0xFFFE) { post signalGtsConfirmNoAddressTask(); status=IEEE154_NO_SHORT_ADDRESS; } else if (!(txFrame=call TxFramePool.get())) status=IEEE154_TRANSACTION_OVERFLOW; else if (!(txControl=call TxControlPool.get())) { call TxFramePool.put(txFrame); status=IEEE154_TRANSACTION_OVERFLOW; } } atomic { if (status==IEEE154_SUCCESS) { // construct the frame txFrame->header=&txControl->header; txFrame->metadata=&txControl->metadata; txFrame->header->mhr[MHR_INDEX_FC1]=FC1_ACK_REQUEST | FC1_FRAMETYPE_CMD; txFrame->header->mhr[MHR_INDEX_FC2]=FC2_SRC_MODE_SHORT; txFrame->header->mhr[MHR_INDEX_SEQNO]=dsn; call MLME_SET.macDSN(dsn+1); txFrame->headerLen=call FrameUtility.writeHeader( txFrame->header->mhr, ADDR_MODE_NOT_PRESENT, call MLME_GET.macPANId(), &DeviceAddress, ADDR_MODE_SHORT_ADDRESS, call MLME_GET.macPANId(), &srcAddress, 0); m_payload_GTS_Request[0]=CMD_FRAME_GTS_REQUEST; m_payload_GTS_Request[1]=GtsCharacteristics; txFrame->payload=m_payload_GTS_Request; txFrame->payloadLen=2; status=call GTSrequestTx.transmit(txFrame); m_gtsReqCharacteristics=GtsCharacteristics; } if (status != IEEE154_SUCCESS) { call TxFramePool.put(txFrame); call TxControlPool.put(txControl); } else m_gtsReqPending=1; } return status; } command ieee154_status_t CfpTx.transmit(ieee154_txframe_t *data) { atomic{ if (m_gtsTXON==1) { //if there is a TX gts and gts mechanism is on for this device // request to send a frame in a GTS slot (triggered by MCPS_DATA.request()) gtsBufferType* gtsSendBufferPtr = &m_gtsSendBuffer; gtsSendBufferPtr->frame[gtsSendBufferPtr->gtsSendBufferMsgIn] = data; gtsSendBufferPtr->gtsSendBufferMsgIn++; gtsSendBufferPtr->gtsSendBufferCount++; if (gtsSendBufferPtr->gtsSendBufferMsgIn==GTS_SEND_BUFFER_SIZE) gtsSendBufferPtr->gtsSendBufferMsgIn=0; if (m_GtsOnTXSlot) post startGtsSend(); return IEEE154_SUCCESS; } else return IEEE154_INVALID_GTS; } } command ieee154_status_t Purge.purge(uint8_t msduHandle) { // request to purge a frame (triggered by MCPS_DATA.purge()) return IEEE154_INVALID_HANDLE; } async event void RadioToken.transferredFrom(uint8_t fromClient) { // the CFP has started, this component now owns the token - const uint8_t* gtsFieldPtr; uint8_t gtsFieldLength; uint8_t GTS_FIELD_INDEX=0; uint8_t numGts; uint16_t gtsSlotAddress; uint8_t i, DIR_MASK; uint16_t guardTime=call IncomingSF.guardTime(); m_cfpSlotDuration=(uint32_t) call IncomingSF.sfSlotDuration(); m_numCapSlots=(uint32_t) call IncomingSF.numCapSlots(); m_numGtsSlots=16-m_numCapSlots; m_cfpDuration=(uint32_t) m_numGtsSlots * m_cfpSlotDuration; m_capDuration=m_numCapSlots * m_cfpSlotDuration; m_slotNumber=(uint8_t) m_numCapSlots-1; call CfpEndAlarm.startAt(call IncomingSF.sfStartTime(), m_capDuration+m_cfpDuration-guardTime); //process gts gtsFieldPtr=call IncomingSF.gtsFields(); gtsFieldLength=1 + ((call IncomingSF.numGtsSlots() > 0) ? 1 + call IncomingSF.numGtsSlots() * 3: 0); memcpy(m_gtsField, gtsFieldPtr, gtsFieldLength); numGts=(m_gtsField[0] & GTS_DESCRIPTOR_COUNT_MASK); m_gtsSlotDir=m_gtsField[1]; GTS_FIELD_INDEX=2; m_gtsTXON=0; m_gtsRXON=0; for (i=numGts; i>0; i--) { gtsSlotAddress= ( m_gtsField[GTS_FIELD_INDEX] | m_gtsField[GTS_FIELD_INDEX+1] << 8 ); DIR_MASK=(0x01 << (i-1)); if (gtsSlotAddress == m_myAddress) { if ((m_gtsSlotDir & DIR_MASK) == GTS_TX_DIRECTION) {//TX gts m_gtsTXON=1;//gts slots on m_gtsTxStartSlot=m_gtsField[GTS_FIELD_INDEX+2] & 0x0f; m_gtsTxEndSlot=m_gtsTxStartSlot+((m_gtsField[GTS_FIELD_INDEX+2] & 0xf0) >> 4); m_gtsCharacteristics=GtsSetCharacteristics(m_gtsTxEndSlot-m_gtsTxStartSlot, 0, 1); m_gtsSlotAddress=gtsSlotAddress; if (m_gtsTxStartSlot == 0) { m_gtsTXON=0; if (m_gtsReqPending == 1) { post signalGtsConfirmDeniedTask(); m_gtsReqPending=0; } else { post signalGtsIndicationTask(); } } if (m_gtsReqPending && m_gtsCharacteristics == m_gtsReqCharacteristics) { post signalGtsConfirmSuccessTask(); m_gtsReqPending=0; m_gtsBeaconCounter=0; } } else { //RX gts m_gtsRXON=1; m_gtsRxStartSlot=m_gtsField[GTS_FIELD_INDEX+2] & 0x0f ; m_gtsRxEndSlot=m_gtsRxStartSlot+((m_gtsField[GTS_FIELD_INDEX+2] & 0xf0) >> 4); m_gtsCharacteristics=GtsSetCharacteristics(m_gtsRxEndSlot-m_gtsRxStartSlot, 1, 1); m_gtsSlotAddress=gtsSlotAddress; if (m_gtsRxStartSlot == 0) { m_gtsRXON=0; if (m_gtsReqPending == 1) { post signalGtsConfirmDeniedTask(); m_gtsReqPending=0; } else { post signalGtsIndicationTask(); } } if (m_gtsReqPending && m_gtsCharacteristics == m_gtsReqCharacteristics) { post signalGtsConfirmSuccessTask(); m_gtsReqPending=0; m_gtsBeaconCounter=0; } } } GTS_FIELD_INDEX+=3; } if (m_gtsReqPending) { if (m_gtsBeaconCounter++ > IEEE154_aGTSDescPersistenceTime) { post signalGtsConfirmNoDataTask(); m_gtsReqPending=0; m_gtsBeaconCounter=0; } } call CfpSlotAlarm.startAt(call IncomingSF.sfStartTime(), m_capDuration); } task void signalGtsConfirmNoAddressTask() { atomic signal MLME_GTS.confirm(m_gtsCharacteristics,IEEE154_NO_SHORT_ADDRESS); } task void signalGtsConfirmSuccessTask() { atomic signal MLME_GTS.confirm(m_gtsReqCharacteristics,IEEE154_SUCCESS); } task void signalGtsConfirmNoDataTask() { atomic signal MLME_GTS.confirm(m_gtsReqCharacteristics,IEEE154_NO_DATA); } task void signalGtsConfirmDeniedTask() {; atomic signal MLME_GTS.confirm(m_gtsReqCharacteristics,IEEE154_DENIED); } task void signalGtsIndicationTask() { atomic signal MLME_GTS.indication(m_gtsSlotAddress, m_gtsCharacteristics,0); } task void startGtsSend() { ieee154_txframe_t* gtsFrame; ieee154_macDSN_t dsn = call MLME_GET.macDSN(); atomic{ if (m_slotNumber >= m_gtsTxStartSlot && m_slotNumber header->mhr[MHR_INDEX_SEQNO]=dsn; call MLME_SET.macDSN(dsn+1); call RadioTx.transmit(gtsFrame,0, 0); } } } task void signalCfpTxDone() { atomic signal CfpTx.transmitDone(m_frameDone, IEEE154_SUCCESS); } async event void CfpEndAlarm.fired() { call CfpEndAlarm.stop(); call CfpSlotAlarm.stop(); m_GtsOnTXSlot=0; #ifndef IEEE154_BEACON_TX_DISABLED call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT); #else call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE); #endif } async event void CfpSlotAlarm.fired() { m_slotNumber++; if (m_slotNumber >= m_gtsTxStartSlot && m_slotNumber 0 ) { call RadioOff.off(); m_GtsOnTXSlot=1; post startGtsSend(); } else if (m_slotNumber >= m_gtsRxStartSlot && m_slotNumber 0) post startGtsSend(); } } async event void RadioRx.enableRxDone(){} event message_t* RadioRx.received(message_t *frame) { // signal it to responsible client component return signal FrameRx.received(frame); } event void RadioToken.granted() { ASSERT(0); // should never happen, because we never call RadioToken.request() } event void GTSrequestTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { atomic{ call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(txFrame); if (GtsGetReqType(m_gtsReqCharacteristics)==GTS_DEALOC_REQ) { post signalGtsConfirmSuccessTask(); m_gtsReqPending=0; } } } command ieee154_status_t MLME_GTS.requestFromPAN ( //Only for PAN Coordinator use uint8_t GtsCharacteristics, uint16_t DeviceAddress, ieee154_security_t *security ){} default event void MLME_GTS.indication ( uint16_t DeviceAddress, uint8_t GtsCharacteristics, ieee154_security_t *security ){} default event void MLME_GTS.confirm ( uint8_t GtsCharacteristics, ieee154_status_t status ){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/DisassociateP.nc000066400000000000000000000252551207233610700222100ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2009-10-16 12:25:45 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" module DisassociateP { provides { interface Init; interface MLME_DISASSOCIATE; } uses { interface FrameTx as DisassociationIndirectTx; interface FrameTx as DisassociationDirectTx; interface FrameTx as DisassociationToCoord; interface FrameRx as DisassociationDirectRxFromCoord; interface FrameExtracted as DisassociationExtractedFromCoord; interface FrameRx as DisassociationRxFromDevice; interface Pool as TxFramePool; interface Pool as TxControlPool; interface MLME_GET; interface MLME_SET; interface FrameUtility; interface IEEE154Frame as Frame; interface Get as LocalExtendedAddress; } } implementation { enum { S_IDLE = 0xFF, }; uint8_t m_payloadDisassocRequest[2]; uint8_t m_coordAddrMode; bool m_disAssociationOngoing; void resetPanValuesInPib(); command error_t Init.init() { m_payloadDisassocRequest[0] = S_IDLE; m_coordAddrMode = 0; m_disAssociationOngoing = FALSE; return SUCCESS; } /* ------------------- MLME_DISASSOCIATE (initiating) ------------------- */ command ieee154_status_t MLME_DISASSOCIATE.request ( uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, bool TxIndirect, ieee154_security_t *security) { ieee154_status_t status = IEEE154_SUCCESS; ieee154_txframe_t *txFrame=0; ieee154_txcontrol_t *txControl=0; ieee154_address_t srcAddress; if (security && security->SecurityLevel) status = IEEE154_UNSUPPORTED_SECURITY; else if (call MLME_GET.macPANId() != DevicePANID || (DeviceAddrMode != ADDR_MODE_SHORT_ADDRESS && DeviceAddrMode != ADDR_MODE_EXTENDED_ADDRESS)) status = IEEE154_INVALID_PARAMETER; else if (m_disAssociationOngoing || !(txFrame = call TxFramePool.get())) status = IEEE154_TRANSACTION_OVERFLOW; else if (!(txControl = call TxControlPool.get())) { call TxFramePool.put(txFrame); status = IEEE154_TRANSACTION_OVERFLOW; } if (status == IEEE154_SUCCESS) { txFrame->header = &txControl->header; txFrame->metadata = &txControl->metadata; srcAddress.extendedAddress = call LocalExtendedAddress.get(); txFrame->headerLen = call FrameUtility.writeHeader( txFrame->header->mhr, DeviceAddrMode, call MLME_GET.macPANId(), &DeviceAddress, ADDR_MODE_EXTENDED_ADDRESS, call MLME_GET.macPANId(), &srcAddress, TRUE); txFrame->header->mhr[MHR_INDEX_FC1] = FC1_ACK_REQUEST | FC1_FRAMETYPE_CMD | FC1_PAN_ID_COMPRESSION; txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED | (DeviceAddrMode == ADDR_MODE_SHORT_ADDRESS ? FC2_DEST_MODE_SHORT : FC2_DEST_MODE_EXTENDED); m_payloadDisassocRequest[0] = CMD_FRAME_DISASSOCIATION_NOTIFICATION; m_payloadDisassocRequest[1] = DisassociateReason; txFrame->payload = m_payloadDisassocRequest; txFrame->payloadLen = 2; m_disAssociationOngoing = TRUE; if ((DeviceAddrMode == ADDR_MODE_SHORT_ADDRESS && DeviceAddress.shortAddress == call MLME_GET.macCoordShortAddress()) || (DeviceAddrMode == ADDR_MODE_EXTENDED_ADDRESS && DeviceAddress.extendedAddress == call MLME_GET.macCoordExtendedAddress())) { status = call DisassociationToCoord.transmit(txFrame); } else if (TxIndirect) { status = call DisassociationIndirectTx.transmit(txFrame); } else { status = call DisassociationDirectTx.transmit(txFrame); } if (status != IEEE154_SUCCESS) { m_disAssociationOngoing = FALSE; call TxFramePool.put(txFrame); call TxControlPool.put(txControl); } } dbg_serial("DisassociateP", "MLME_DISASSOCIATE.request -> result: %lu\n", (uint32_t) status); return status; } event void DisassociationToCoord.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { // transmitted a disassociation notification to our coordinator uint8_t *mhr = MHR(data), srcAddrOffset = 7; uint8_t DeviceAddrMode = (mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) >> FC2_SRC_MODE_OFFSET; uint16_t DevicePANID = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS]))); ieee154_address_t DeviceAddress; if ((mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED) srcAddrOffset += 6; call FrameUtility.convertToNative(&DeviceAddress.extendedAddress, &mhr[srcAddrOffset]); call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) data->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(data); dbg_serial("DisassociateP", "transmitDone() -> result: %lu\n", (uint32_t) status); m_disAssociationOngoing = FALSE; // "[...] even if the acknowledgment is not received, // the device should consider itself disassociated." (Sect. 7.5.3.2) if (status == IEEE154_SUCCESS || status == IEEE154_NO_ACK) resetPanValuesInPib(); signal MLME_DISASSOCIATE.confirm(status, DeviceAddrMode, DevicePANID, DeviceAddress); } event void DisassociationIndirectTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { signal DisassociationDirectTx.transmitDone(data, status); } event void DisassociationDirectTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { // transmitted a disassociation notification to a device uint8_t *mhr = MHR(data), dstAddrOffset = 5; uint8_t DeviceAddrMode = (mhr[1] & FC2_DEST_MODE_MASK) >> FC2_DEST_MODE_OFFSET; uint16_t DevicePANID = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS]))); ieee154_address_t DeviceAddress; call FrameUtility.convertToNative(&DeviceAddress.extendedAddress, &mhr[dstAddrOffset]); call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) data->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(data); dbg_serial("DisassociateP", "transmitDone() -> result: %lu\n", (uint32_t) status); m_disAssociationOngoing = FALSE; // "[...] even if the acknowledgment is not received, // the device should consider itself disassociated." (Sect. 7.5.3.2) if (status == IEEE154_SUCCESS || status == IEEE154_NO_ACK) resetPanValuesInPib(); signal MLME_DISASSOCIATE.confirm(status, DeviceAddrMode, DevicePANID, DeviceAddress); } /* ------------------- MLME_DISASSOCIATE (receiving) ------------------- */ event message_t* DisassociationDirectRxFromCoord.received(message_t* frame) { // received a disassociation notification from the coordinator (direct tx) ieee154_address_t address; address.extendedAddress = call LocalExtendedAddress.get(); signal MLME_DISASSOCIATE.indication(address.extendedAddress, frame->data[1], NULL); return frame; } event message_t* DisassociationExtractedFromCoord.received(message_t* frame, ieee154_txframe_t *txFrame) { // received a disassociation notification from the coordinator (indirect transmission) return signal DisassociationDirectRxFromCoord.received(frame); } event message_t* DisassociationRxFromDevice.received(message_t* frame) { // received a disassociation notification from the device ieee154_address_t address; if (call Frame.getSrcAddrMode(frame) == ADDR_MODE_EXTENDED_ADDRESS && call Frame.getSrcAddr(frame, &address) == SUCCESS) signal MLME_DISASSOCIATE.indication(address.extendedAddress, frame->data[1], NULL); dbg_serial("DisassociateP", "Received disassociation request from %lx\n", (uint32_t) address.shortAddress); return frame; } void resetPanValuesInPib() { // "An associated device shall disassociate itself by removing // all references to the PAN; the MLME shall set macPANId, // macShortAddress, macAssociatedPANCoord, macCoordShortAddress // and macCoordExtended- Address to the default values." (Sect. 7.5.3.2) call MLME_SET.macPANId(IEEE154_DEFAULT_PANID); call MLME_SET.macShortAddress(IEEE154_DEFAULT_SHORTADDRESS); call MLME_SET.macAssociatedPANCoord(IEEE154_DEFAULT_ASSOCIATEDPANCOORD); call MLME_SET.macCoordShortAddress(IEEE154_DEFAULT_COORDSHORTADDRESS); call MLME_SET.macCoordExtendedAddress(0); } /* ------------------- Defaults ------------------- */ default event void MLME_DISASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, ieee154_security_t *security) {} default event void MLME_DISASSOCIATE.confirm ( ieee154_status_t status, uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress) {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/DispatchQueueP.nc000066400000000000000000000127771207233610700223460ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-12-14 12:50:06 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" generic module DispatchQueueP() { provides { interface Init as Reset; interface FrameTx[uint8_t client]; interface FrameRx as FrameExtracted[uint8_t client]; interface Purge; } uses { interface Queue; interface FrameTx as FrameTxCsma; interface FrameRx as SubFrameExtracted; } } implementation { task void txTask(); bool m_state; uint8_t m_client; enum { TX_DONE_PENDING = 0x01, RESET_PENDING = 0x02, }; bool isTxDonePending() { return (m_state & TX_DONE_PENDING) ? TRUE : FALSE; } void setTxDonePending() { m_state |= TX_DONE_PENDING; } void resetTxDonePending() { m_state &= ~TX_DONE_PENDING; } bool isResetPending() { return (m_state & RESET_PENDING) ? TRUE : FALSE; } void setResetPending() { m_state |= RESET_PENDING; } void resetResetPending() { m_state &= ~RESET_PENDING; } command error_t Reset.init() { setResetPending(); while (call Queue.size()) { ieee154_txframe_t *txFrame = call Queue.dequeue(); signal FrameTx.transmitDone[txFrame->client](txFrame, IEEE154_TRANSACTION_OVERFLOW); } resetResetPending(); return SUCCESS; } command ieee154_status_t FrameTx.transmit[uint8_t client](ieee154_txframe_t *txFrame) { txFrame->client = client; if (isResetPending() || call Queue.enqueue(txFrame) != SUCCESS) return IEEE154_TRANSACTION_OVERFLOW; else { post txTask(); return IEEE154_SUCCESS; } } task void txTask() { if (!isTxDonePending() && call Queue.size()) { ieee154_txframe_t *txFrame = call Queue.head(); if (txFrame->headerLen == 0) { // was purged call Queue.dequeue(); signal Purge.purgeDone(txFrame, IEEE154_SUCCESS); post txTask(); } m_client = txFrame->client; setTxDonePending(); if (call FrameTxCsma.transmit(txFrame) != IEEE154_SUCCESS) resetTxDonePending(); } } event void FrameTxCsma.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { resetTxDonePending(); if (!call Queue.size()) return; // all frames were spooled out (reset) call Queue.dequeue(); signal FrameTx.transmitDone[txFrame->client](txFrame, status); if (IEEE154_BEACON_ENABLED_PAN && status == IEEE154_NO_BEACON) { // this means that we lost sync -> spool out all queued frames while (call Queue.size()) { ieee154_txframe_t *frame = call Queue.dequeue(); signal FrameTx.transmitDone[frame->client](frame, IEEE154_NO_BEACON); } } post txTask(); } event message_t* SubFrameExtracted.received(message_t* frame) { // this event is signalled when a frame has been received // in response to a data request command frame. The transmitDone // event will be signalled later return signal FrameExtracted.received[m_client](frame); } default event void FrameTx.transmitDone[uint8_t client](ieee154_txframe_t *txFrame, ieee154_status_t status) {} command ieee154_status_t Purge.purge(uint8_t msduHandle) { uint8_t qSize = call Queue.size(), i; // must never purge the first element (element 0), because it was already handed down to // the dispatcher (we don't own it anymore), all others may be purged. for (i=1; iheader->mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_DATA) && txFrame->handle == msduHandle) { txFrame->headerLen = 0; // mark as invalid return IEEE154_SUCCESS; } } return IEEE154_INVALID_HANDLE; } default event void Purge.purgeDone(ieee154_txframe_t *txFrame, ieee154_status_t status) {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/DispatchSlottedCsmaP.nc000066400000000000000000000705341207233610700234770ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.8 $ * $Date: 2009-12-14 12:50:06 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" /** * This module is responsible for the transmission/reception of DATA and * COMMAND frames in the CAP of beacon-enabled PANs. Its main tasks are * initialization of the parameters of the slotted CSMA-CA algorithm (NB, BE, * etc.), initiating retransmissions and dealing with broadcast transmissions. * It does not implement the actual CSMA-CA algorithm, because due to its * timing requirements the CSMA-CA algorithm is not part of the MAC * implementation but of the chip-specific radio driver. * * This module does slightly different things depending on whether it is the * CAP for an outgoing superframe (sfDirection = OUTGOING_SUPERFRAME), i.e. the * CAP from the perspective of a coordinator after it has transmitted its own * beacon; or for an incoming superframe (sfDirection = INCOMING_SUPERFRAME), * i.e. the CAP from the perspective of a device after it has received a * beacon from its coordinator. For example, in the CAP a coordinator will * typically listen for incoming frames from the devices, and a device will * typically switch the radio off unless it has a frame to transmit. */ generic module DispatchSlottedCsmaP(uint8_t sfDirection) { provides { interface Init as Reset; interface FrameTx as FrameTx; interface FrameRx as FrameRx[uint8_t frameType]; interface FrameExtracted as FrameExtracted[uint8_t frameType]; interface FrameTxNow as BroadcastTx; interface Notify as WasRxEnabled; } uses { interface Alarm as CapEndAlarm; interface Alarm as BLEAlarm; interface Alarm as RxWaitAlarm; interface TransferableResource as RadioToken; interface ResourceRequested as RadioTokenRequested; interface SuperframeStructure; interface GetNow as IsRadioTokenRequested; interface GetNow as IsRxEnableActive; interface Get as GetIndirectTxFrame; interface Notify as RxEnableStateChange; interface GetNow as IsTrackingBeacons; interface Notify as PIBUpdateMacRxOnWhenIdle; interface FrameUtility; interface SlottedCsmaCa; interface RadioRx; interface RadioOff; interface MLME_GET; interface MLME_SET; interface TimeCalc; interface Leds; interface SetNow as FrameBackup; interface GetNow as FrameRestore; interface SplitControl as TrackSingleBeacon; interface MLME_SYNC_LOSS; } } implementation { typedef enum { SWITCH_OFF, WAIT_FOR_RXDONE, WAIT_FOR_TXDONE, DO_NOTHING, } next_state_t; typedef enum { INDIRECT_TX_ALARM, BROADCAST_ALARM, NO_ALARM, } rx_alarm_t; enum { COORD_ROLE = (sfDirection == OUTGOING_SUPERFRAME), DEVICE_ROLE = !COORD_ROLE, RADIO_CLIENT_CFP = COORD_ROLE ? RADIO_CLIENT_COORDCFP : RADIO_CLIENT_DEVICECFP, }; /* state / frame management */ norace bool m_lock; norace bool m_resume; norace ieee154_txframe_t *m_currentFrame; norace ieee154_txframe_t *m_bcastFrame; norace ieee154_txframe_t *m_lastFrame; norace uint16_t m_remainingBackoff; ieee154_macRxOnWhenIdle_t macRxOnWhenIdle; /* variables for the slotted CSMA-CA */ norace ieee154_csma_t m_csma; norace ieee154_macMaxBE_t m_BE; norace ieee154_macMaxCSMABackoffs_t m_macMaxCSMABackoffs; norace ieee154_macMaxBE_t m_macMaxBE; norace ieee154_macMaxFrameRetries_t m_macMaxFrameRetries; norace ieee154_status_t m_txStatus; norace uint32_t m_transactionTime; norace bool m_indirectTxPending = FALSE; norace bool m_broadcastRxPending; norace ieee154_macMaxFrameTotalWaitTime_t m_macMaxFrameTotalWaitTime; /* function / task prototypes */ void stopAllAlarms(); next_state_t tryReceive(); next_state_t tryTransmit(); next_state_t trySwitchOff(); void backupCurrentFrame(); void restoreFrameFromBackup(); void updateState(); void setCurrentFrame(ieee154_txframe_t *frame); void signalTxBroadcastDone(ieee154_txframe_t *frame, ieee154_status_t error); task void signalTxDoneTask(); task void setupTxBroadcastTask(); task void wasRxEnabledTask(); #ifdef TKN154_DEBUG enum { HEADER_STR_LEN = 27, DBG_STR_SIZE = 250, }; norace uint16_t m_dbgNumEntries; norace char m_dbgStr[HEADER_STR_LEN + DBG_STR_SIZE] = "updateState() transitions: "; void dbg_push_state(uint8_t state) { if (m_dbgNumEntries < DBG_STR_SIZE-3) m_dbgStr[HEADER_STR_LEN + m_dbgNumEntries++] = '0' + state; } void dbg_flush_state() { m_dbgStr[HEADER_STR_LEN + m_dbgNumEntries++] = '\n'; m_dbgStr[HEADER_STR_LEN + m_dbgNumEntries++] = 0; dbg_serial("DispatchSlottedCsmaP",m_dbgStr); m_dbgNumEntries = 0; } #else #define dbg_push_state(X) #define dbg_flush_state() #endif error_t reset(error_t error) { if (call RadioToken.isOwner()) // internal error! this must not happen! return FAIL; if (m_currentFrame) signal FrameTx.transmitDone(m_currentFrame, error); if (m_lastFrame) signal FrameTx.transmitDone(m_lastFrame, error); if (m_bcastFrame) signalTxBroadcastDone(m_bcastFrame, error); m_currentFrame = m_lastFrame = m_bcastFrame = NULL; m_macMaxFrameTotalWaitTime = call MLME_GET.macMaxFrameTotalWaitTime(); stopAllAlarms(); return SUCCESS; } command error_t Reset.init() { return reset(IEEE154_TRANSACTION_OVERFLOW); } event void MLME_SYNC_LOSS.indication ( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security ) { // we lost sync to the coordinator -> spool out current packet reset(IEEE154_NO_BEACON); } async event void RadioToken.transferredFrom(uint8_t fromClient) { // we got the token, i.e. CAP has just started uint32_t capDuration = (uint32_t) call SuperframeStructure.numCapSlots() * (uint32_t) call SuperframeStructure.sfSlotDuration(); uint16_t guardTime = call SuperframeStructure.guardTime(); dbg_serial("DispatchSlottedCsmaP", "Got token, remaining CAP time: %lu\n", call SuperframeStructure.sfStartTime() + capDuration - guardTime - call CapEndAlarm.getNow()); if (capDuration < guardTime) { // CAP is too short to do anything useful dbg_serial("DispatchSlottedCsmaP", "CAP too short!\n"); call RadioToken.transferTo(RADIO_CLIENT_CFP); return; } else { capDuration -= guardTime; if (DEVICE_ROLE) m_broadcastRxPending = call SuperframeStructure.isBroadcastPending(); else { // COORD_ROLE if (m_bcastFrame != NULL) { // we have to transmit a broadcast frame immediately; this // may require to a backup of the previously active frame // and a reinitializing the CSMA parameters -> will do it // in task context and then continue m_lock = TRUE; post setupTxBroadcastTask(); dbg_serial("DispatchSlottedCsmaP", "Preparing broadcast...\n"); } } call CapEndAlarm.startAt(call SuperframeStructure.sfStartTime(), capDuration); if (call SuperframeStructure.battLifeExtDuration() > 0) { dbg_serial("DispatchSlottedCsmaP", "battLifeExtDuration enabled!\n"); call BLEAlarm.startAt(call SuperframeStructure.sfStartTime(), call SuperframeStructure.battLifeExtDuration()); } } updateState(); } command ieee154_status_t FrameTx.transmit(ieee154_txframe_t *frame) { if (m_currentFrame != NULL) { // we've not finished transmitting the current frame yet dbg_serial("DispatchSlottedCsmaP", "Overflow\n"); return IEEE154_TRANSACTION_OVERFLOW; } else { setCurrentFrame(frame); /* dbg_serial("DispatchSlottedCsmaP", "New frame to transmit, DSN: %lu\n", (uint32_t) MHR(frame)[MHR_INDEX_SEQNO]);*/ // a beacon must be found before transmitting in a beacon-enabled PAN if (DEVICE_ROLE && !call IsTrackingBeacons.getNow()) { call TrackSingleBeacon.start(); dbg_serial("DispatchSlottedCsmaP", "Tracking single beacon now\n"); // we'll get the Token after a beacon was found or a SYNC_LOSS event // if none was found during the next aBaseSuperframeDuration*(2n+1) symbols } updateState(); return IEEE154_SUCCESS; } } event void TrackSingleBeacon.startDone(error_t error) { if (error != SUCCESS) // beacon could not be tracked reset(IEEE154_NO_BEACON); // else: we'll get the RadioToken and continue as usual ... } task void setupTxBroadcastTask() { ieee154_macDSN_t tmp; ieee154_txframe_t *oldFrame = m_currentFrame; if (COORD_ROLE) { if (m_bcastFrame != NULL) { // broadcasts should be transmitted *immediately* after the beacon, // which may interrupt a pending transmit operation from the previous // CAP; back up the last active frame configuration (may be none) // and restore it after the broadcast frame has been transmitted; // do this through interfaces and don't wire them for DEVICE_ROLE, // so we don't waste the RAM of devices backupCurrentFrame(); setCurrentFrame(m_bcastFrame); if (oldFrame) { // now the sequence number are out of order... swap them back tmp = m_bcastFrame->header->mhr[MHR_INDEX_SEQNO]; m_bcastFrame->header->mhr[MHR_INDEX_SEQNO] = oldFrame->header->mhr[MHR_INDEX_SEQNO]; oldFrame->header->mhr[MHR_INDEX_SEQNO] = tmp; } } } m_lock = FALSE; updateState(); } void setCurrentFrame(ieee154_txframe_t *frame) { ieee154_macDSN_t dsn = call MLME_GET.macDSN(); frame->header->mhr[MHR_INDEX_SEQNO] = dsn++; call MLME_SET.macDSN(dsn); m_csma.NB = 0; m_csma.macMaxCsmaBackoffs = m_macMaxCSMABackoffs = call MLME_GET.macMaxCSMABackoffs(); m_csma.macMaxBE = m_macMaxBE = call MLME_GET.macMaxBE(); m_csma.BE = call MLME_GET.macMinBE(); if (call MLME_GET.macBattLifeExt() && m_csma.BE > 2) m_csma.BE = 2; m_BE = m_csma.BE; if (COORD_ROLE && call GetIndirectTxFrame.get() == frame) m_macMaxFrameRetries = 0; // this is an indirect transmissions (never retransmit) else m_macMaxFrameRetries = call MLME_GET.macMaxFrameRetries(); m_transactionTime = IEEE154_SHR_DURATION + (frame->headerLen + frame->payloadLen + 2) * IEEE154_SYMBOLS_PER_OCTET; // extra 2 for CRC if (frame->header->mhr[MHR_INDEX_FC1] & FC1_ACK_REQUEST) m_transactionTime += (IEEE154_aTurnaroundTime + IEEE154_aUnitBackoffPeriod + 11 * IEEE154_SYMBOLS_PER_OCTET); // 11 byte for the ACK PPDU // if (frame->headerLen + frame->payloadLen > IEEE154_aMaxSIFSFrameSize) // m_transactionTime += call MLME_GET.macMinLIFSPeriod(); // else // m_transactionTime += call MLME_GET.macMinSIFSPeriod(); m_macMaxFrameTotalWaitTime = call MLME_GET.macMaxFrameTotalWaitTime(); m_currentFrame = frame; } void stopAllAlarms() { call CapEndAlarm.stop(); if (DEVICE_ROLE) call RxWaitAlarm.stop(); call BLEAlarm.stop(); } /** * The updateState() function is called whenever something happened that * might require a state transition; it implements a lock mechanism (m_lock) * to prevent race conditions. Whenever the lock is set a "done"-event (from * the SlottedCsmaCa/RadioRx/RadioOff interface) is pending and will "soon" * unset the lock (and then updateState() will called again). The * updateState() function decides about the next state by checking a list of * possible current states ordered by priority, e.g. it first always checks * whether the CAP is still active. Calling this function more than necessary * can do no harm. */ void updateState() { uint32_t capDuration; next_state_t next; atomic { // long atomics are bad... but in this block, once the/ current state has // been determined only one branch will/ be taken (there are no loops) if (m_lock || !call RadioToken.isOwner()) return; m_lock = TRUE; // lock capDuration = (uint32_t) call SuperframeStructure.numCapSlots() * (uint32_t) call SuperframeStructure.sfSlotDuration(); // Check 1: has the CAP finished? if ((call TimeCalc.hasExpired(call SuperframeStructure.sfStartTime(), capDuration - call SuperframeStructure.guardTime()) || !call CapEndAlarm.isRunning())) { dbg_push_state(1); if (call RadioOff.isOff()) { stopAllAlarms(); // may still fire, but is locked through isOwner() if (DEVICE_ROLE && m_indirectTxPending) signal RxWaitAlarm.fired(); m_broadcastRxPending = FALSE; if (COORD_ROLE && m_bcastFrame) { // didn't manage to transmit a broadcast restoreFrameFromBackup(); signalTxBroadcastDone(m_bcastFrame, IEEE154_CHANNEL_ACCESS_FAILURE); m_bcastFrame = NULL; } m_lock = FALSE; // unlock dbg_flush_state(); dbg_serial("DispatchSlottedCsmaP", "Handing over to CFP.\n"); call RadioToken.transferTo(RADIO_CLIENT_CFP); return; } else next = SWITCH_OFF; } // Check 2: should a broadcast frame be received/transmitted // immediately at the start of CAP? else if (DEVICE_ROLE && m_broadcastRxPending) { // receive a broadcast from coordinator dbg_push_state(2); next = tryReceive(); } else if (COORD_ROLE && m_bcastFrame) { dbg_push_state(2); next = tryTransmit(); } // Check 3: was an indirect transmission successfully started // and are we now waiting for a frame from the coordinator? else if (DEVICE_ROLE && m_indirectTxPending) { dbg_push_state(3); next = tryReceive(); } // Check 4: is some other operation (like MLME-SCAN or MLME-RESET) pending? else if (call IsRadioTokenRequested.getNow()) { dbg_push_state(4); if (call RadioOff.isOff()) { stopAllAlarms(); // may still fire, but is locked through isOwner() // nothing more to do... just release the Token m_lock = FALSE; // unlock dbg_serial("DispatchSlottedCsmaP", "Token requested: Handing over to CFP.\n"); call RadioToken.release(); return; } else next = SWITCH_OFF; } // Check 5: is battery life extension (BLE) active and // has the BLE period expired? else if (call SuperframeStructure.battLifeExtDuration() > 0 && call TimeCalc.hasExpired(call SuperframeStructure.sfStartTime(), call SuperframeStructure.battLifeExtDuration()) && !call IsRxEnableActive.getNow() && !macRxOnWhenIdle) { dbg_push_state(5); next = trySwitchOff(); } // Check 6: is there a frame ready to transmit? else if (m_currentFrame != NULL) { dbg_push_state(6); next = tryTransmit(); } // Check 7: should we be in receive mode? else if (COORD_ROLE || call IsRxEnableActive.getNow() || macRxOnWhenIdle) { dbg_push_state(7); next = tryReceive(); if (next == DO_NOTHING) { // if there was an active MLME_RX_ENABLE.request then we'll // inform the next higher layer that radio is now in Rx mode post wasRxEnabledTask(); } } // Check 8: just make sure the radio is switched off else { dbg_push_state(8); next = trySwitchOff(); } // if there is nothing to do, then we must clear the lock if (next == DO_NOTHING) m_lock = FALSE; } // atomic // put next state in operation (possibly keeping the lock) switch (next) { case SWITCH_OFF: ASSERT(call RadioOff.off() == SUCCESS); break; case WAIT_FOR_RXDONE: break; case WAIT_FOR_TXDONE: break; case DO_NOTHING: break; } } next_state_t tryTransmit() { // tries to transmit m_currentFrame uint32_t capDuration = (uint32_t) call SuperframeStructure.numCapSlots() * (uint32_t) call SuperframeStructure.sfSlotDuration(); next_state_t next; if (!call RadioOff.isOff()) next = SWITCH_OFF; else { uint32_t dtMax = capDuration - call SuperframeStructure.guardTime() - m_transactionTime; // round to backoff boundary dtMax = dtMax + (IEEE154_aUnitBackoffPeriod - (dtMax % IEEE154_aUnitBackoffPeriod)); if (dtMax > capDuration) dtMax = 0; if (call SuperframeStructure.battLifeExtDuration() > 0) { // battery life extension uint16_t bleLen = call SuperframeStructure.battLifeExtDuration(); if (bleLen < dtMax) dtMax = bleLen; } if (call TimeCalc.hasExpired(call SuperframeStructure.sfStartTime(), dtMax)) next = DO_NOTHING; // frame doesn't fit in the remaining CAP else { error_t res; res = call SlottedCsmaCa.transmit(m_currentFrame, &m_csma, call SuperframeStructure.sfStartTime(), dtMax, m_resume, m_remainingBackoff); /* dbg_serial("DispatchSlottedCsmaP", "SlottedCsmaCa.transmit() -> %lu\n", (uint32_t) res);*/ next = WAIT_FOR_TXDONE; // this will NOT clear the lock } } return next; } next_state_t tryReceive() { next_state_t next; if (call RadioRx.isReceiving()) next = DO_NOTHING; else if (!call RadioOff.isOff()) next = SWITCH_OFF; else { call RadioRx.enableRx(0, 0); next = WAIT_FOR_RXDONE; } return next; } next_state_t trySwitchOff() { next_state_t next; if (call RadioOff.isOff()) next = DO_NOTHING; else next = SWITCH_OFF; return next; } async event void RadioOff.offDone() { m_lock = FALSE; updateState(); } async event void RadioRx.enableRxDone() { if (DEVICE_ROLE && (m_indirectTxPending || m_broadcastRxPending)) call RxWaitAlarm.start(m_macMaxFrameTotalWaitTime); m_lock = FALSE; updateState(); } async event void CapEndAlarm.fired() { dbg_serial("DispatchSlottedCsmaP", "CapEndAlarm.fired()\n"); updateState(); } async event void BLEAlarm.fired() { updateState();} event void RxEnableStateChange.notify(bool whatever) { updateState();} event void PIBUpdateMacRxOnWhenIdle.notify( const void* val ) { atomic macRxOnWhenIdle = *((ieee154_macRxOnWhenIdle_t*) val); updateState(); } async event void RxWaitAlarm.fired() { if (DEVICE_ROLE && (m_indirectTxPending || m_broadcastRxPending)) atomic { if (m_indirectTxPending) { m_indirectTxPending = FALSE; post signalTxDoneTask(); } else if (m_broadcastRxPending) { m_broadcastRxPending = FALSE; updateState(); } } } async event void SlottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, uint16_t remainingBackoff, error_t result) { bool done = TRUE; /* dbg_serial("DispatchSlottedCsmaP", "SlottedCsmaCa.transmitDone() -> %lu\n", (uint32_t) result);*/ m_resume = FALSE; switch (result) { case SUCCESS: // frame was successfully transmitted, if ACK was requested // then a matching ACK was successfully received as well m_txStatus = IEEE154_SUCCESS; if (DEVICE_ROLE && frame->payload[0] == CMD_FRAME_DATA_REQUEST && ((frame->header->mhr[MHR_INDEX_FC1]) & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_CMD) { // this was a data request frame m_txStatus = IEEE154_NO_DATA; // pessimistic if (ackPendingFlag) { // the coordinator has data for us; switch to Rx // to complete the indirect transmission m_indirectTxPending = TRUE; m_lastFrame = m_currentFrame; m_currentFrame = NULL; ASSERT(call RadioRx.enableRx(0, 0) == SUCCESS); return; } } break; case FAIL: // The CSMA-CA algorithm failed: the frame was not transmitted, // because channel was never idle m_txStatus = IEEE154_CHANNEL_ACCESS_FAILURE; break; case ENOACK: // frame was transmitted, but we didn't receive an ACK (although // we requested an one). note: coordinator never retransmits an // indirect transmission (see above) if (m_macMaxFrameRetries > 0) { // retransmit: reinitialize CSMA-CA parameters done = FALSE; m_csma.NB = 0; m_csma.macMaxCsmaBackoffs = m_macMaxCSMABackoffs; m_csma.macMaxBE = m_macMaxBE; m_csma.BE = m_BE; m_macMaxFrameRetries -= 1; } else m_txStatus = IEEE154_NO_ACK; break; case EINVAL: // DEBUG!!! dbg_serial("DispatchSlottedCsmaP", "EINVAL returned by transmitDone()!\n"); // fall through case ERETRY: // frame was not transmitted, because the transaction does not // fit in the remaining CAP (in beacon-enabled PANs only) dbg_serial("DispatchSlottedCsmaP", "Transaction didn't fit, current BE: %lu\n", (uint32_t) csma->BE); m_resume = TRUE; m_remainingBackoff = remainingBackoff; done = FALSE; m_lock = FALSE; // debug! problem: if CAP endalarm has fired it's a deadlock! if (!call CapEndAlarm.isRunning()) updateState(); return; break; default: ASSERT(0); break; } if (COORD_ROLE && frame == m_bcastFrame) { // always signal result of broadcast transmissions immediately restoreFrameFromBackup(); signalTxBroadcastDone(m_bcastFrame, (!done) ? IEEE154_CHANNEL_ACCESS_FAILURE : m_txStatus); m_bcastFrame = NULL; } else if (done) { m_lastFrame = m_currentFrame; m_currentFrame = NULL; post signalTxDoneTask(); } m_lock = FALSE; updateState(); } task void signalTxDoneTask() { ieee154_txframe_t *lastFrame = m_lastFrame; ieee154_status_t status = m_txStatus; m_indirectTxPending = FALSE; m_lastFrame = NULL; // only now can the next transmission can begin if (lastFrame) { /* dbg_serial("DispatchSlottedCsmaP", "Transmit done, DSN: %lu, result: 0x%lx\n", */ /* (uint32_t) MHR(lastFrame)[MHR_INDEX_SEQNO], (uint32_t) status);*/ signal FrameTx.transmitDone(lastFrame, status); } updateState(); } event message_t* RadioRx.received(message_t* frame) { // received a frame -> find out frame type and // signal it to responsible client component uint8_t *payload = (uint8_t *) frame->data; uint8_t *mhr = MHR(frame); uint8_t frameType = mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK; if (frameType == FC1_FRAMETYPE_CMD) frameType += payload[0]; dbg_serial("DispatchSlottedCsmaP", "Received frame, DSN: %lu, type: 0x%lu\n", (uint32_t) mhr[MHR_INDEX_SEQNO], (uint32_t) frameType); atomic { if (DEVICE_ROLE && (m_indirectTxPending || m_broadcastRxPending)) { message_t* frameBuf; call RxWaitAlarm.stop(); // TODO: check the following: // is this frame from our coordinator? hmm... we cannot say/ with // certainty, because we might only know either the coordinator // extended or short address (and the frame could/ have been sent // with the other addressing mode) ?? m_txStatus = IEEE154_SUCCESS; if (m_indirectTxPending) frameBuf = signal FrameExtracted.received[frameType](frame, m_lastFrame); // indirect tx from coord else frameBuf = signal FrameRx.received[frameType](frame); // broadcast from coordinator signal RxWaitAlarm.fired(); return frameBuf; } else return signal FrameRx.received[frameType](frame); } } void backupCurrentFrame() { ieee154_cap_frame_backup_t backup = {m_transactionTime, m_currentFrame, m_csma}; call FrameBackup.setNow(&backup); } void restoreFrameFromBackup() { ieee154_cap_frame_backup_t *backup = call FrameRestore.getNow(); if (backup != NULL) { m_currentFrame = backup->frame; memcpy(&m_csma, &backup->csma, sizeof(ieee154_csma_t)); m_transactionTime = backup->transactionTime; } } async command ieee154_status_t BroadcastTx.transmitNow(ieee154_txframe_t *frame) { // if this command is called then it is (MUST be) called only just before // the token is transferred to this component and it is then called // only once per CAP (max. one broadcast is allowed after a beacon // transmission) atomic { if (!call RadioToken.isOwner() && m_bcastFrame == NULL) { m_bcastFrame = frame; return IEEE154_SUCCESS; } else { ASSERT(0); return IEEE154_TRANSACTION_OVERFLOW; } } } void signalTxBroadcastDone(ieee154_txframe_t *frame, ieee154_status_t error) { signal BroadcastTx.transmitNowDone(frame, error); } task void wasRxEnabledTask() { signal WasRxEnabled.notify(TRUE); } event void RadioToken.granted() { ASSERT(0); // should never happen } default event void FrameTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) {} default event message_t* FrameRx.received[uint8_t client](message_t* data) {return data;} default async command bool IsRxEnableActive.getNow() {return FALSE;} default async command void RxWaitAlarm.start(uint32_t dt) {ASSERT(0);} default async command void RxWaitAlarm.stop() {ASSERT(0);} default async command void RxWaitAlarm.startAt(uint32_t t0, uint32_t dt) {ASSERT(0);} default async command bool SuperframeStructure.isBroadcastPending() { return FALSE;} default async event void BroadcastTx.transmitNowDone(ieee154_txframe_t *frame, ieee154_status_t status) {} default event message_t* FrameExtracted.received[uint8_t client](message_t* msg, ieee154_txframe_t *txFrame) {return msg;} default async command error_t FrameBackup.setNow(ieee154_cap_frame_backup_t* val) {return FAIL;} default async command ieee154_cap_frame_backup_t* FrameRestore.getNow() {return NULL;} event void TrackSingleBeacon.stopDone(error_t error){} default command error_t TrackSingleBeacon.start() {if (DEVICE_ROLE) ASSERT(0); return SUCCESS;} command error_t WasRxEnabled.enable() {return FAIL;} command error_t WasRxEnabled.disable() {return FAIL;} async event void RadioTokenRequested.requested(){ updateState(); } async event void RadioTokenRequested.immediateRequested(){ updateState(); } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/DispatchUnslottedCsmaP.nc000066400000000000000000000445011207233610700240350ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.10 $ * $Date: 2009-05-18 12:54:10 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" /** * This module is responsible for the transmission/reception of DATA and * COMMAND frames in a nonbeacon-enabled PAN. Its main tasks are initialization * of the parameters of the unslotted CSMA-CA algorithm (NB, BE, etc.), * initiating retransmissions and managing requests for enabling the receiver * for a finite period of time. It does not implement the actual CSMA-CA * algorithm, because due to its timing requirements the CSMA-CA algorithm is * not part of the MAC implementation but of the chip-specific radio driver. */ module DispatchUnslottedCsmaP { provides { interface Init as Reset; interface MLME_START; interface FrameTx as FrameTx; interface FrameRx as FrameRx[uint8_t frameType]; interface FrameExtracted as FrameExtracted[uint8_t frameType]; interface Notify as WasRxEnabled; } uses { interface Timer as IndirectTxWaitTimer; interface TransferableResource as RadioToken; interface ResourceRequested as RadioTokenRequested; interface GetNow as IsRadioTokenRequested; interface GetNow as IsRxEnableActive; interface Set as SetMacSuperframeOrder; interface Set as SetMacPanCoordinator; interface Get as GetIndirectTxFrame; interface Notify as RxEnableStateChange; interface Notify as PIBUpdateMacRxOnWhenIdle; interface FrameUtility; interface UnslottedCsmaCa; interface RadioRx; interface RadioOff; interface MLME_GET; interface MLME_SET; interface TimeCalc; interface Leds; } } implementation { typedef enum { SWITCH_OFF, WAIT_FOR_RXDONE, WAIT_FOR_TXDONE, DO_NOTHING, } next_state_t; typedef enum { INDIRECT_TX_ALARM, NO_ALARM, } rx_alarm_t; /* state / frame management */ norace bool m_lock; norace bool m_resume; norace ieee154_txframe_t *m_currentFrame; norace ieee154_txframe_t *m_lastFrame; norace ieee154_macRxOnWhenIdle_t m_macRxOnWhenIdle; /* variables for the unslotted CSMA-CA */ norace ieee154_csma_t m_csma; norace ieee154_macMaxBE_t m_BE; norace ieee154_macMaxCSMABackoffs_t m_macMaxCSMABackoffs; norace ieee154_macMaxBE_t m_macMaxBE; norace ieee154_macMaxFrameRetries_t m_macMaxFrameRetries; norace ieee154_status_t m_txStatus; norace uint32_t m_transactionTime; norace bool m_indirectTxPending = FALSE; /* function / task prototypes */ next_state_t tryReceive(); next_state_t tryTransmit(); next_state_t trySwitchOff(); void backupCurrentFrame(); void restoreFrameFromBackup(); void updateState(); void setCurrentFrame(ieee154_txframe_t *frame); void signalTxBroadcastDone(ieee154_txframe_t *frame, ieee154_status_t error); task void signalTxDoneTask(); task void wasRxEnabledTask(); task void startIndirectTxTimerTask(); task void signalStartConfirmTask(); command error_t Reset.init() { if (m_currentFrame) signal FrameTx.transmitDone(m_currentFrame, IEEE154_TRANSACTION_OVERFLOW); if (m_lastFrame) signal FrameTx.transmitDone(m_lastFrame, IEEE154_TRANSACTION_OVERFLOW); m_currentFrame = m_lastFrame = NULL; call IndirectTxWaitTimer.stop(); return SUCCESS; } command ieee154_status_t MLME_START.request ( uint16_t panID, uint8_t logicalChannel, uint8_t channelPage, uint32_t startTime, uint8_t beaconOrder, uint8_t superframeOrder, bool panCoordinator, bool batteryLifeExtension, bool coordRealignment, ieee154_security_t *coordRealignSecurity, ieee154_security_t *beaconSecurity) { ieee154_status_t status; ieee154_macShortAddress_t shortAddress = call MLME_GET.macShortAddress(); // check parameters if ((coordRealignSecurity && coordRealignSecurity->SecurityLevel) || (beaconSecurity && beaconSecurity->SecurityLevel)) status = IEEE154_UNSUPPORTED_SECURITY; else if (shortAddress == 0xFFFF) status = IEEE154_NO_SHORT_ADDRESS; else if (logicalChannel > 26 || (channelPage != IEEE154_SUPPORTED_CHANNELPAGE) || !(IEEE154_SUPPORTED_CHANNELS & ((uint32_t) 1 << logicalChannel))) status = IEEE154_INVALID_PARAMETER; else if (beaconOrder != 15) status = IEEE154_INVALID_PARAMETER; else { call MLME_SET.macPANId(panID); call MLME_SET.phyCurrentChannel(logicalChannel); call MLME_SET.macBeaconOrder(beaconOrder); call SetMacPanCoordinator.set(panCoordinator); //TODO: check realignment post signalStartConfirmTask(); status = IEEE154_SUCCESS; } dbg_serial("DispatchUnslottedCsmaP", "MLME_START.request -> result: %lu\n", (uint32_t) status); dbg_serial_flush(); return status; } task void signalStartConfirmTask() { signal MLME_START.confirm(IEEE154_SUCCESS); } command ieee154_status_t FrameTx.transmit(ieee154_txframe_t *frame) { if (m_currentFrame != NULL) { // we've not finished transmitting the current frame yet dbg_serial("DispatchUnslottedCsmaP", "Overflow\n"); return IEEE154_TRANSACTION_OVERFLOW; } else { setCurrentFrame(frame); if (call RadioToken.isOwner()) updateState(); else call RadioToken.request(); return IEEE154_SUCCESS; } } event void RadioToken.granted() { updateState(); } void setCurrentFrame(ieee154_txframe_t *frame) { if (frame->header->mhr[MHR_INDEX_FC1] != FC1_FRAMETYPE_BEACON) { // set the sequence number for command/data frame ieee154_macDSN_t dsn = call MLME_GET.macDSN(); frame->header->mhr[MHR_INDEX_SEQNO] = dsn++; call MLME_SET.macDSN(dsn); } else { // set the sequence number for beacon frame ieee154_macBSN_t bsn = call MLME_GET.macBSN(); frame->header->mhr[MHR_INDEX_SEQNO] = bsn++; call MLME_SET.macBSN(bsn); } m_csma.NB = 0; m_csma.macMaxCsmaBackoffs = m_macMaxCSMABackoffs = call MLME_GET.macMaxCSMABackoffs(); m_csma.macMaxBE = m_macMaxBE = call MLME_GET.macMaxBE(); m_csma.BE = call MLME_GET.macMinBE(); if (call MLME_GET.macBattLifeExt() && m_csma.BE > 2) m_csma.BE = 2; m_BE = m_csma.BE; if (call GetIndirectTxFrame.get() == frame) m_macMaxFrameRetries = 0; // this is an indirect transmissions (never retransmit) else m_macMaxFrameRetries = call MLME_GET.macMaxFrameRetries(); m_transactionTime = IEEE154_SHR_DURATION + (frame->headerLen + frame->payloadLen + 2) * IEEE154_SYMBOLS_PER_OCTET; // extra 2 for CRC if (frame->header->mhr[MHR_INDEX_FC1] & FC1_ACK_REQUEST) m_transactionTime += (IEEE154_aTurnaroundTime + IEEE154_aUnitBackoffPeriod + 11 * IEEE154_SYMBOLS_PER_OCTET); // 11 byte for the ACK PPDU // if (frame->headerLen + frame->payloadLen > IEEE154_aMaxSIFSFrameSize) // m_transactionTime += call MLME_GET.macMinLIFSPeriod(); // else // m_transactionTime += call MLME_GET.macMinSIFSPeriod(); m_currentFrame = frame; } /** * The updateState() function is called whenever some event happened that * might require a state transition; it implements a lock mechanism (m_lock) * to prevent race conditions. Whenever the lock is set a "done"-event (from * a RadioTx/RadioRx/RadioOff interface) is pending and will "soon" unset the * lock (and then updateState() will called again). The updateState() * function decides about the next state by checking a list of possible * current states ordered by priority. Calling this function more than * necessary can do no harm. */ void updateState() { next_state_t next; atomic { // long atomics are bad... but in this block, once the // current state has been determined only one branch will // be taken (there are no loops) if (m_lock || !call RadioToken.isOwner()) return; m_lock = TRUE; // lock // Check 1: was an indirect transmission successfully started // and are we now waiting for a frame from the coordinator? if (m_indirectTxPending) { next = tryReceive(); } // Check 2: is some other operation (like MLME-SCAN or MLME-RESET) pending? else if (call IsRadioTokenRequested.getNow()) { if (call RadioOff.isOff()) { // nothing more to do... just release the Token dbg_serial("DispatchUnslottedCsmaP", "Token requested: releasing it.\n"); call RadioToken.request(); // we want it back afterwards ... m_lock = FALSE; // unlock call RadioToken.release(); return; } else next = SWITCH_OFF; } // Check 3: is there a frame ready to transmit? else if (m_currentFrame != NULL) { next = tryTransmit(); } // Check 4: should we be in receive mode? else if (call IsRxEnableActive.getNow() || m_macRxOnWhenIdle) { next = tryReceive(); if (next == DO_NOTHING) { // if there was an active MLME_RX_ENABLE.request then we'll // inform the next higher layer that radio is now in Rx mode post wasRxEnabledTask(); } } // Check 5: just make sure the radio is switched off else { next = trySwitchOff(); if (next == DO_NOTHING) { // nothing more to do... just release the Token m_lock = FALSE; // unlock dbg_serial("DispatchUnslottedCsmaP", "Releasing token\n"); call RadioToken.release(); return; } } // if there is nothing to do, then we must clear the lock if (next == DO_NOTHING) m_lock = FALSE; } // atomic // put next state in operation (possibly keeping the lock) switch (next) { case SWITCH_OFF: ASSERT(call RadioOff.off() == SUCCESS); break; case WAIT_FOR_RXDONE: break; case WAIT_FOR_TXDONE: break; case DO_NOTHING: break; } } next_state_t tryTransmit() { // tries to transmit m_currentFrame next_state_t next; if (!call RadioOff.isOff()) next = SWITCH_OFF; else { error_t res; res = call UnslottedCsmaCa.transmit(m_currentFrame, &m_csma); dbg_serial("DispatchUnslottedCsmaP", "UnslottedCsmaCa.transmit() -> %lu\n", (uint32_t) res); next = WAIT_FOR_TXDONE; // this will NOT clear the lock } return next; } next_state_t tryReceive() { next_state_t next; if (call RadioRx.isReceiving()) next = DO_NOTHING; else if (!call RadioOff.isOff()) next = SWITCH_OFF; else { call RadioRx.enableRx(0, 0); next = WAIT_FOR_RXDONE; } return next; } next_state_t trySwitchOff() { next_state_t next; if (call RadioOff.isOff()) next = DO_NOTHING; else next = SWITCH_OFF; return next; } async event void RadioOff.offDone() { m_lock = FALSE; updateState(); } async event void RadioRx.enableRxDone() { if (m_indirectTxPending) // indirect transmission, now waiting for data post startIndirectTxTimerTask(); m_lock = FALSE; updateState(); } event void RxEnableStateChange.notify(bool whatever) { if (!call RadioToken.isOwner()) call RadioToken.request(); else updateState(); } event void PIBUpdateMacRxOnWhenIdle.notify( const void* val ) { atomic m_macRxOnWhenIdle = *((ieee154_macRxOnWhenIdle_t*) val); signal RxEnableStateChange.notify(TRUE); } event void IndirectTxWaitTimer.fired() { atomic { if (m_indirectTxPending) { m_indirectTxPending = FALSE; post signalTxDoneTask(); } } } task void startIndirectTxTimerTask() { call IndirectTxWaitTimer.startOneShot(call MLME_GET.macMaxFrameTotalWaitTime()); } async event void UnslottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result) { bool done = TRUE; dbg_serial("DispatchUnslottedCsmaP", "UnslottedCsmaCa.transmitDone() -> %lu\n", (uint32_t) result); m_resume = FALSE; switch (result) { case SUCCESS: // frame was successfully transmitted, if ACK was requested // then a matching ACK was successfully received as well m_txStatus = IEEE154_SUCCESS; if (frame->payload[0] == CMD_FRAME_DATA_REQUEST && ((frame->header->mhr[MHR_INDEX_FC1]) & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_CMD) { // this was a data request frame m_txStatus = IEEE154_NO_DATA; // pessimistic if (ackPendingFlag) { // the coordinator has data for us; switch to Rx // to complete the indirect transmission m_indirectTxPending = TRUE; m_lastFrame = m_currentFrame; m_currentFrame = NULL; ASSERT(call RadioRx.enableRx(0, 0) == SUCCESS); return; } } break; case FAIL: // The CSMA-CA algorithm failed: the frame was not transmitted, // because channel was never idle m_txStatus = IEEE154_CHANNEL_ACCESS_FAILURE; break; case ENOACK: // frame was transmitted, but we didn't receive an ACK (although // we requested an one). note: coordinator never retransmits an // indirect transmission (see above) if (m_macMaxFrameRetries > 0) { // retransmit: reinitialize CSMA-CA parameters done = FALSE; m_csma.NB = 0; m_csma.macMaxCsmaBackoffs = m_macMaxCSMABackoffs; m_csma.macMaxBE = m_macMaxBE; m_csma.BE = m_BE; m_macMaxFrameRetries -= 1; } else m_txStatus = IEEE154_NO_ACK; break; default: ASSERT(0); break; } if (done) { m_lastFrame = m_currentFrame; m_currentFrame = NULL; post signalTxDoneTask(); } m_lock = FALSE; updateState(); dbg_serial_flush(); } task void signalTxDoneTask() { ieee154_txframe_t *lastFrame = m_lastFrame; ieee154_status_t status = m_txStatus; m_indirectTxPending = FALSE; m_lastFrame = NULL; // only now the next transmission can begin if (lastFrame) { dbg_serial("DispatchUnslottedCsmaP", "Transmit done, DSN: %lu, result: 0x%lx\n", (uint32_t) MHR(lastFrame)[MHR_INDEX_SEQNO], (uint32_t) status); signal FrameTx.transmitDone(lastFrame, status); } updateState(); } event message_t* RadioRx.received(message_t* frame) { // received a frame -> find out frame type and // signal it to responsible client component uint8_t *payload = (uint8_t *) frame->data; uint8_t *mhr = MHR(frame); uint8_t frameType = mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK; if (frameType == FC1_FRAMETYPE_CMD) frameType += payload[0]; atomic { if (m_indirectTxPending) { message_t* frameBuf; call IndirectTxWaitTimer.stop(); // TODO: check! //if (frame->payloadLen) // is this frame from our coordinator? hmm... we cannot say // with certainty, because we might only know either the // coordinator extended or short address (and the frame could // have been sent with the other addressing mode) ?? m_txStatus = IEEE154_SUCCESS; frameBuf = signal FrameExtracted.received[frameType](frame, m_lastFrame); signal IndirectTxWaitTimer.fired(); return frameBuf; } else return signal FrameRx.received[frameType](frame); } } task void wasRxEnabledTask() { signal WasRxEnabled.notify(TRUE); } default event void FrameTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) {} default event message_t* FrameRx.received[uint8_t client](message_t* data) {return data;} default async command bool IsRxEnableActive.getNow() {return FALSE;} default event message_t* FrameExtracted.received[uint8_t client](message_t* msg, ieee154_txframe_t *txFrame) {return msg;} command error_t WasRxEnabled.enable() {return FAIL;} command error_t WasRxEnabled.disable() {return FAIL;} default event void MLME_START.confirm(ieee154_status_t status) {} async event void RadioToken.transferredFrom(uint8_t fromClientID) {ASSERT(0);} async event void RadioTokenRequested.requested(){ updateState(); } async event void RadioTokenRequested.immediateRequested(){ updateState(); } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/GTS.h000066400000000000000000000060151207233610700177320ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ #ifndef __GTS_H #define __GTS_H #define GTS_PERMIT_ENABLED 0x80 #define GTS_MAX_SLOTS 7 #define GTS_TX_DIRECTION 0 #define GTS_RX_DIRECTION 1 #define GTS_ALOC_REQ 1 #define GTS_DEALOC_REQ 0 #define GTS_SEND_BUFFER_SIZE 10 typedef enum gts_op_status { GTS_OP_FAILED =0, GTS_OP_SUCCESS = 1, } gts_op_status_t; typedef struct { uint8_t gtsCharacteristics; uint16_t devAddress; } gtsDescriptorType; typedef struct { uint8_t gtsId; uint8_t startingSlot; uint8_t length; uint8_t direction; uint16_t devAddress; uint8_t expiration; } gtsInfoEntryType; //GTS entry (used in the PAN coordinator) typedef struct { uint8_t gtsId; uint8_t startingSlot; uint8_t length; uint16_t devAddress; uint8_t persistenceTime; } gtsInfoEntryType_null; typedef struct { uint8_t elementCount; uint8_t elementIn; uint8_t elementOut; uint8_t gtsFrameIndex[GTS_SEND_BUFFER_SIZE]; } gtsSlotElementType; typedef struct { ieee154_txframe_t *frame[GTS_SEND_BUFFER_SIZE]; uint8_t availableGtsIndex[GTS_SEND_BUFFER_SIZE]; uint8_t availableGtsIndexCount; uint8_t gtsSendBufferCount; uint8_t gtsSendBufferMsgIn; uint8_t gtsSendBufferMsgOut; } gtsBufferType; #endif tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/InactivePeriodP.nc000066400000000000000000000137741207233610700225050ustar00rootroot00000000000000/* * Copyright (c) 2010, KTH Royal Institute of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * - Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright notice, this * list of conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. * * - Neither the name of the Royal Institute of Technology nor the names of its * contributors may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. */ /** * The component InactivePeriodP owns the radio token during the inactive period in * nodes in beacon-enabled networks. It powers the radio down and restarts it before * handing over the radio token to the beacon reception/transmission component. * Depending on the actual radio, powering it down may result in less energy * consumption than idle, e.g. for the CC2420 powering down means disabling the * crystal oscillator, which saves a significant amount energy compard to the * idle state. * * @author João Faria * @author Aitor Hernandez * @author Jan Hauer */ #include "TKN154_MAC.h" generic module InactivePeriodP(uint8_t sfDirection) { uses { interface TransferableResource as RadioToken; interface Alarm as Alarm; interface SplitControl as RadioControl; interface SuperframeStructure as SF; interface GetNow as IsEmbedded; interface RadioOff; interface MLME_GET; interface TimeCalc; } } implementation { #ifndef IEEE154_RADIO_POWERUP_TIME async event void RadioToken.transferredFrom(uint8_t fromClient) { dbg_serial("InactivePeriodP", "Power down disabled, transferring token\n"); if (sfDirection == OUTGOING_SUPERFRAME) { call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE); } else { call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT); } } async event void RadioOff.offDone() { ASSERT(0);} event void RadioControl.stopDone(error_t result) { } event void RadioControl.startDone(error_t result) { } async event void Alarm.fired() { ASSERT(0);} event void RadioToken.granted() { ASSERT(0);} #else task void offDoneTask(); task void firedTask(); void transferToken() { dbg_serial("InactivePeriodP", "Transferring token\n"); if (sfDirection == OUTGOING_SUPERFRAME) { call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE); } else { call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT); } } uint32_t maxDt() { return call SF.beaconInterval() - IEEE154_RADIO_POWERUP_TIME - call SF.guardTime(); } bool tooLate() { if (call IsEmbedded.getNow()) { // we have a situation where there is an incoming and outgoing superframe // (scenario as indicated in 802.15.4-2006 Fig. 67), so the inactive period // is not "inactive", we should not power down (TODO: we might power down // for a smaller amount of time, the time in between two superframes) return TRUE; } else return call TimeCalc.hasExpired(call SF.sfStartTime(), maxDt()); } async event void RadioToken.transferredFrom(uint8_t fromClient) { if (tooLate()) { dbg_serial("InactivePeriodP", "Got token: Not enough time to powerdown %lu, %lu.\n", (uint32_t) call SF.beaconInterval(), maxDt()); transferToken(); } else { error_t error = call RadioOff.off(); dbg_serial("InactivePeriodP", "Got token, switching radio off: %lu (%lu)\n", (uint32_t) error, call Alarm.getNow()); if (error == EALREADY) signal RadioOff.offDone(); else if (error != SUCCESS) transferToken(); } } async event void RadioOff.offDone() { post offDoneTask(); } task void offDoneTask() { dbg_serial("InactivePeriodP", "Trying to power radio down\n"); if (tooLate() || call RadioControl.stop() != SUCCESS) /* Disable the radio chip, voltage reg, oscillator, mm */ transferToken(); } event void RadioControl.stopDone(error_t result) { // NOTE: RadioControl is fanning out, so we have to check if we // are the actual client that is owning the radio (or if someone // else has called RadioControl.stop). if (call RadioToken.isOwner()) { dbg_serial("InactivePeriodP", "Radio powered down: %lu\n", (uint32_t) result); call Alarm.startAt(call SF.sfStartTime(), maxDt()); } } async event void Alarm.fired() { post firedTask(); } task void firedTask() { dbg_serial("InactivePeriodP", "Powering radio up again (%lu)\n", call Alarm.getNow()); call RadioControl.start(); } event void RadioControl.startDone(error_t error) { // comment at RadioControl.stopDone() applies here as well if (call RadioToken.isOwner()) { dbg_serial("InactivePeriodP", "Done: radio powered up (%lu)\n", call Alarm.getNow()); transferToken(); } } event void RadioToken.granted() { ASSERT(0);} #endif } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/IndirectTxP.nc000066400000000000000000000353631207233610700216530ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.10 $ * $Date: 2010-02-04 16:31:15 $ * @author Jan Hauer * @author: Jasper Buesch * ======================================================================== */ module IndirectTxP { provides { interface Init as Reset; interface FrameTx[uint8_t client]; interface WriteBeaconField as PendingAddrWrite; interface Notify as PendingAddrSpecUpdated; interface Get as GetIndirectTxFrame; interface Purge; } uses { interface FrameTx as CoordCapTx; interface FrameRx as DataRequestRx; interface MLME_GET; interface IEEE154Frame; interface Timer as IndirectTxTimeout; interface TimeCalc; interface Leds; } } implementation { enum { SEND_THIS_FRAME = 0x80, NUM_MAX_PENDING = 7, }; ieee154_txframe_t *m_txFrameTable[NUM_MAX_PENDING]; ieee154_txframe_t *m_pendingTxFrame; uint8_t m_client; uint8_t m_numTableEntries; uint8_t m_numShortPending; uint8_t m_numExtPending; ieee154_txframe_t m_emptyDataFrame; ieee154_metadata_t m_emptyDataFrameMetadata; ieee154_header_t m_emptyDataFrameHeader; task void tryCoordCapTxTask(); void tryCoordCapTx(); void transmitEmptyDataFrame(message_t* dataRequestFrame); command error_t Reset.init() { uint8_t i; // CAP/Queue component is always reset first, i.e. there // should be no outstanding frames call IndirectTxTimeout.stop(); for (i=0; iclient](m_txFrameTable[i], IEEE154_TRANSACTION_OVERFLOW); for (i=0; ihandle == msduHandle) && (m_client != m_txFrameTable[i]->client) ){ ieee154_txframe_t *purgedFrame; purgedFrame = m_txFrameTable[i]; m_txFrameTable[i] = NULL; m_numTableEntries -= 1; signal Purge.purgeDone(purgedFrame, IEEE154_PURGED); return IEEE154_SUCCESS; } } return IEEE154_INVALID_HANDLE; } command uint8_t PendingAddrWrite.write(uint8_t *lastBytePtr, uint8_t maxlen) { // writes the pending addr field (inside the beacon frame) // we go "backwards", i.e. start with the extended addresses, // then the short addresses, then the "Pending Address Specification" uint8_t i, j, k; uint8_t numShort, numExt; nxle_uint16_t *shortAddrPtr; ieee154_txframe_t *txFrame; numExt = 0; for (i=0; iheader->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED) { uint8_t *curExtAddrPtr = &(txFrame->header->mhr[MHR_INDEX_ADDRESS + sizeof(ieee154_macPANId_t)]); k = 0; // search for duplicate dest. address for (j=0; jheader->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT) { nxle_uint16_t shortAddr; shortAddr = *((nxle_uint16_t*) &txFrame->header->mhr[MHR_INDEX_ADDRESS + sizeof(ieee154_macPANId_t)]); for (j=0; j= NUM_MAX_PENDING) { dbg_serial("IndirectTxP", "Overflow\n"); return IEEE154_TRANSACTION_OVERFLOW; } txFrame->client = client; txFrame->metadata->timestamp = call IndirectTxTimeout.getNow(); for (i=0; iheader->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT) m_numShortPending++; else if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED) m_numExtPending++; if (!call IndirectTxTimeout.isRunning()) call IndirectTxTimeout.startOneShot(getPersistenceTimeSymbols()); dbg_serial("IndirectTxP", "Preparing a transmission.\n"); signal PendingAddrSpecUpdated.notify(TRUE); return IEEE154_SUCCESS; } event message_t* DataRequestRx.received(message_t* frame) { uint8_t i, j, srcAddressMode, dstAddressMode, *src; uint8_t *mhr = MHR(frame); uint8_t destMode = (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK); ieee154_txframe_t *dataResponseFrame = NULL; // received a data request frame from a device // have we got some pending data for it ? srcAddressMode = (mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK); if (!(srcAddressMode & FC2_SRC_MODE_SHORT)) return frame; // no source address src = mhr + MHR_INDEX_ADDRESS; if (destMode == FC2_DEST_MODE_SHORT) src += 4; else if (destMode == FC2_DEST_MODE_EXTENDED) src += 10; if (!((mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) && (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT))) src += 2; for (i=0; iheader->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK); if ((dstAddressMode << 4) != srcAddressMode) continue; else { // we know: dstAddressMode IN [2,3] uint8_t *dst = &(m_txFrameTable[i]->header->mhr[MHR_INDEX_ADDRESS]) + 2; uint8_t len = ((srcAddressMode == FC2_SRC_MODE_SHORT) ? 2 : 8); for (j=0; jheader->mhr[MHR_INDEX_FC1] |= FC1_FRAME_PENDING; } } } } if (dataResponseFrame != NULL) { // found a matching frame, mark it for transmission dbg_serial("IndirectTxP", "We have data for this device, trying to transmit...\n"); dataResponseFrame->client |= SEND_THIS_FRAME; post tryCoordCapTxTask(); } else { dbg_serial("IndirectTxP", "We don't have data for this device, sending an empty frame...\n"); transmitEmptyDataFrame(frame); } return frame; } void transmitEmptyDataFrame(message_t* dataRequestFrame) { // the cast in the next line is dangerous -> this is only a temporary workaround! // (until the new T2 message buffer abstraction is available) message_t *emptyDataMsg = (message_t *) m_emptyDataFrame.header; ieee154_address_t dstAddr; uint16_t dstPanID; if (m_emptyDataFrame.client != 0) return; // locked (already transmitting an empty data frame) if (call IEEE154Frame.getSrcAddr(dataRequestFrame, &dstAddr) != IEEE154_SUCCESS || call IEEE154Frame.getSrcPANId(dataRequestFrame, &dstPanID) != IEEE154_SUCCESS) return; call IEEE154Frame.setAddressingFields(emptyDataMsg, call IEEE154Frame.getDstAddrMode(dataRequestFrame), // will become srcAddrMode call IEEE154Frame.getSrcAddrMode(dataRequestFrame), // will become dstAddrMode dstPanID, &dstAddr, NULL //security ); MHR(&m_emptyDataFrame)[MHR_INDEX_FC1] |= FC1_FRAMETYPE_DATA; m_emptyDataFrame.headerLen = call IEEE154Frame.getHeaderLength(emptyDataMsg); m_emptyDataFrame.client = 1; // lock if (call CoordCapTx.transmit(&m_emptyDataFrame) != IEEE154_SUCCESS) m_emptyDataFrame.client = 0; // unlock } void tryCoordCapTx() { // iterate over the queued frames and transmit them in the CAP // (if they are marked for transmission) uint8_t i; if (m_pendingTxFrame == NULL && m_numTableEntries) { for (i=0; iclient & SEND_THIS_FRAME)) { m_pendingTxFrame = m_txFrameTable[i]; m_client = m_txFrameTable[i]->client; if (call CoordCapTx.transmit(m_txFrameTable[i]) == IEEE154_SUCCESS) { dbg_serial("IndirectTxP", "Started a transmission.\n"); } else { m_pendingTxFrame = NULL; post tryCoordCapTxTask(); } return; // done - wait for txDone } } } task void tryCoordCapTxTask() { tryCoordCapTx(); } event void IndirectTxTimeout.fired() { // a transaction has expired uint32_t now = call IndirectTxTimeout.getNow(), dt=0; uint32_t persistenceTime = getPersistenceTimeSymbols(); uint8_t i; for (i=0; imetadata->timestamp, persistenceTime)) { ieee154_txframe_t *txFrame = m_txFrameTable[i]; txFrame->client &= ~SEND_THIS_FRAME; m_txFrameTable[i] = NULL; m_numTableEntries -= 1; if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT) m_numShortPending--; else if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED) m_numExtPending--; signal FrameTx.transmitDone[txFrame->client](txFrame, IEEE154_TRANSACTION_EXPIRED); signal PendingAddrSpecUpdated.notify(TRUE); } else if (call TimeCalc.timeElapsed(m_txFrameTable[i]->metadata->timestamp, now) > dt) { dt = call TimeCalc.timeElapsed(m_txFrameTable[i]->metadata->timestamp, now); } } if (dt != 0) { if (dt > persistenceTime) dt = persistenceTime; call IndirectTxTimeout.startOneShot(persistenceTime - dt); } } event void CoordCapTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { uint8_t i; // TODO: if CSMA-CA algorithm failed, then frame shall still remain in transaction queue dbg_serial("IndirectTxP", "transmitDone(), status: %lu\n", (uint32_t) status); if (txFrame == &m_emptyDataFrame) { m_emptyDataFrame.client = 0; // unlock return; } for (i=0; iclient = m_client; txFrame->client &= ~SEND_THIS_FRAME; m_numTableEntries -= 1; if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT) m_numShortPending--; else if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED) m_numExtPending--; signal FrameTx.transmitDone[txFrame->client](txFrame, status); post tryCoordCapTxTask(); } command ieee154_txframe_t* GetIndirectTxFrame.get() { return m_pendingTxFrame;} command error_t PendingAddrSpecUpdated.enable() {return FAIL;} command error_t PendingAddrSpecUpdated.disable() {return FAIL;} default event void PendingAddrSpecUpdated.notify( bool val ) {return;} default event void FrameTx.transmitDone[uint8_t client](ieee154_txframe_t *txFrame, ieee154_status_t status) {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/Makefile.include000066400000000000000000000045641207233610700222150ustar00rootroot00000000000000# Make sure that TinyOS Makerules has been included *before* including # this Makefile, because it expands the PLATFORM variable, which we need TKN154_PLATFORM_INCLUDE ?= $(TOSDIR)/platforms/$(PLATFORM)/mac/tkn154/Makefile.include TKN154_EXTRAS += $(wildcard $(TOSDIR)/lib/mac/tkn154/extras/*.extra) CFLAGS += -I$(TOSDIR)/lib/mac/tkn154 \ -I$(TOSDIR)/lib/mac/tkn154/dummies \ -I$(TOSDIR)/lib/mac/tkn154/interfaces/MCPS \ -I$(TOSDIR)/lib/mac/tkn154/interfaces/MLME \ -I$(TOSDIR)/lib/mac/tkn154/interfaces/private \ -I$(TOSDIR)/lib/mac/tkn154/interfaces/public # Whenever platforms have identical configuration we don't need to put copies of # Makefile.include under "platforms/$(PLATFORM)/mac/tkn154/", intead we make a # redirect to the Makefile.include here: # The shimmer2 platform configuration is identical to telosb ifeq ($(findstring $(PLATFORM),shimmer2), shimmer2) TKN154_PLATFORM_INCLUDE = $(TOSDIR)/platforms/telosb/mac/tkn154/Makefile.include endif # The shimmer2r platform configuration is identical to telosb ifeq ($(findstring $(PLATFORM),shimmer2r), shimmer2r) TKN154_PLATFORM_INCLUDE = $(TOSDIR)/platforms/telosb/mac/tkn154/Makefile.include endif #################################### Extras #################################### # legacy ifdef IEEE154_EXTENDED_ADDRESS $(error To set the extended address of a device to X pass 'extaddr,X' to the make system (e.g. "make telosb extaddr,0x012345")) endif # legacy ifdef TKN154_DEBUG $(error To enable debug mode pass 'tkn154debug' to the make system (e.g. "make telosb tkn154debug")) endif # Pull in our extras (note we cannot use TOSMAKE_PATH, because it has already # been parsed), so we do it "manually" ourselves now $(foreach file,$(TKN154_EXTRAS),$(if $(filter $(call names,$(file)),$(GOALS)),$(eval include $(file)))) ############################### Platform include ############################### # 1. check whether target is "clean" ifneq ($(strip $(foreach g,$(GOALS),$(findstring $(g),clean))),) # do nothing (Makerules' default clean branch will be executed) # 2. check whether the platform is supported, by testing if file # TKN154_PLATFORM_INCLUDE exists else ifeq ($(strip $(wildcard $(TKN154_PLATFORM_INCLUDE))),) $(error The target platform is not supported by the TKN15.4 MAC) else # 3. platform is supported: now include the platform-specific # TKN15.4 Makefile include $(TKN154_PLATFORM_INCLUDE) endif tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/PibP.nc000066400000000000000000001162631207233610700203070ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Date: 2009-09-08 09:04:43 $ * @author Jan Hauer * ======================================================================== */ /** * This component maintains the PIB (PAN Information Base) attributes and * provides interfaces for accessing fields in a MAC frame. */ #include "TKN154.h" #include "TKN154_PIB.h" #include "TKN154_PHY.h" module PibP { provides { interface Init as LocalInit; interface MLME_RESET; interface MLME_GET; interface MLME_SET; interface Set as SetMacSuperframeOrder; interface Set as SetMacBeaconTxTime; interface Set as SetMacPanCoordinator; interface FrameUtility; interface IEEE154Frame as Frame; interface IEEE154BeaconFrame as BeaconFrame; interface Get as GetLocalExtendedAddress; interface GetNow as IsRadioTokenRequested; interface Notify as PIBUpdate[uint8_t PIBAttributeID]; interface Packet; interface TimeCalc; } uses { interface Get as PromiscuousModeGet; interface Init as DispatchReset; interface Init as DispatchQueueReset; interface Init as MacReset; interface SplitControl as RadioControl; interface Random; interface TransferableResource as RadioToken; interface RadioOff; interface LocalTime; } } implementation { ieee154_PIB_t m_pib; uint8_t m_numResetClientPending; bool m_setDefaultPIB; norace uint8_t m_resetSpin; #ifdef IEEE154_EXTENDED_ADDRESS const uint64_t m_aExtendedAddressLE = IEEE154_EXTENDED_ADDRESS; #else norace uint64_t m_aExtendedAddressLE; #endif task void radioControlStopTask(); void updateMacMaxFrameTotalWaitTime(); void resetAttributesToDefault(); bool isLocalExtendedAddress(uint8_t *addrLE); bool isCoordExtendedAddress(uint8_t *addrLE); uint8_t getPendAddrSpecOffset(uint8_t *macPayloadField); task void resetSpinTask(); command error_t LocalInit.init() { #ifndef IEEE154_EXTENDED_ADDRESS m_aExtendedAddressLE = (((uint64_t) call Random.rand32() ) << 32 ) | call Random.rand32(); #endif resetAttributesToDefault(); return SUCCESS; } void resetAttributesToDefault() { m_pib.phyCurrentChannel = IEEE154_DEFAULT_CURRENTCHANNEL; m_pib.phyTransmitPower = (IEEE154_TXPOWER_TOLERANCE | (IEEE154_DEFAULT_TRANSMITPOWER_dBm & 0x3F)); m_pib.phyCCAMode = IEEE154_DEFAULT_CCAMODE; m_pib.phyCurrentPage = IEEE154_DEFAULT_CURRENTPAGE; m_pib.macAssociatedPANCoord = IEEE154_DEFAULT_ASSOCIATEDPANCOORD; m_pib.macAssociationPermit = IEEE154_DEFAULT_ASSOCIATIONPERMIT; m_pib.macAutoRequest = IEEE154_DEFAULT_AUTOREQUEST; m_pib.macBattLifeExt = IEEE154_DEFAULT_BATTLIFEEXT; m_pib.macBattLifeExtPeriods = IEEE154_DEFAULT_BATTLIFEEXTPERIODS; m_pib.macBeaconPayloadLength = IEEE154_DEFAULT_BEACONPAYLOADLENGTH; m_pib.macBeaconOrder = IEEE154_DEFAULT_BEACONORDER; m_pib.macBeaconTxTime = IEEE154_DEFAULT_BEACONTXTIME; m_pib.macBSN = 0xFF & (call Random.rand16()); // macCoordExtendedAddress: default is undefined m_pib.macCoordShortAddress = IEEE154_DEFAULT_COORDSHORTADDRESS; m_pib.macDSN = 0xFF & (call Random.rand16()); m_pib.macGTSPermit = IEEE154_DEFAULT_GTSPERMIT; m_pib.macMaxBE = IEEE154_DEFAULT_MAXBE; m_pib.macMaxCSMABackoffs = IEEE154_DEFAULT_MAXCSMABACKOFFS; m_pib.macMaxFrameRetries = IEEE154_DEFAULT_MAXFRAMERETRIES; m_pib.macMinBE = IEEE154_DEFAULT_MINBE; m_pib.macPANId = IEEE154_DEFAULT_PANID; m_pib.macPromiscuousMode = IEEE154_DEFAULT_PROMISCUOUSMODE; m_pib.macResponseWaitTime = IEEE154_DEFAULT_RESPONSEWAITTIME; m_pib.macRxOnWhenIdle = IEEE154_DEFAULT_RXONWHENIDLE; m_pib.macSecurityEnabled = IEEE154_DEFAULT_SECURITYENABLED; m_pib.macShortAddress = IEEE154_DEFAULT_SHORTADDRESS; m_pib.macSuperframeOrder = IEEE154_DEFAULT_SUPERFRAMEORDER; m_pib.macTransactionPersistenceTime = IEEE154_DEFAULT_TRANSACTIONPERSISTENCETIME; m_pib.macPanCoordinator = IEEE154_DEFAULT_MACPANCOORDINATOR; updateMacMaxFrameTotalWaitTime(); } void updateMacMaxFrameTotalWaitTime() { // using equation 14 on page 160 ieee154_macMinBE_t macMinBE = m_pib.macMinBE; ieee154_macMaxBE_t macMaxBE = m_pib.macMaxBE; ieee154_macMaxCSMABackoffs_t macMaxCSMABackoffs = m_pib.macMaxCSMABackoffs; uint8_t m = macMaxBE - macMinBE, k; uint32_t waitTime = 0; if (macMaxCSMABackoffs < m) m = macMaxCSMABackoffs; waitTime = (((uint16_t) 1 << macMaxBE) - 1) * (macMaxCSMABackoffs - m); if (m) { k = 0; while (k != m) { waitTime += ((uint16_t) 1 << (macMinBE+k)); k += 1; } } waitTime *= IEEE154_aUnitBackoffPeriod; waitTime += call MLME_GET.phyMaxFrameDuration(); m_pib.macMaxFrameTotalWaitTime = waitTime; } command ieee154_status_t MLME_RESET.request(bool SetDefaultPIB) { // resetting the complete stack is not so easy... // first we acquire the Token (get exclusive radio access), then we switch off // the radio and reset all MAC components, starting from the ones that might // still have any frames queued / allocated to get them flushed out. While we // own the Token all other components are "inactive" (and there are no pending // Alarms!), but there can still be pending Timers/tasks -> we stop all Timers // through MacReset.init() and then spin a few tasks in between to get // everything "flushed out" ieee154_status_t status = IEEE154_SUCCESS; if (call PromiscuousModeGet.get()) status = IEEE154_TRANSACTION_OVERFLOW; // must first cancel promiscuous mode! else { m_setDefaultPIB = SetDefaultPIB; m_resetSpin = 5; call RadioToken.request(); } dbg_serial("PibP", "MLME_RESET.request(%lu) -> result: %lu\n", (uint32_t) SetDefaultPIB, (uint32_t) status); return status; } event void RadioToken.granted() { if (call RadioOff.off() != SUCCESS) signal RadioOff.offDone(); } async event void RadioOff.offDone() { post radioControlStopTask(); } task void radioControlStopTask() { error_t result = call RadioControl.stop(); if (result == EALREADY) signal RadioControl.stopDone(SUCCESS); else ASSERT(result == SUCCESS); } event void RadioControl.stopDone(error_t result) { // NOTE: RadioControl is fanning out, so we have to check if we // are the actual client that is owning the radio (or if someone // else has called RadioControl.stop). if (call RadioToken.isOwner()) { ASSERT(result == SUCCESS); call DispatchReset.init(); // resets the dispatch component(s), spools out frames call DispatchQueueReset.init(); // resets the dispatch queue component(s), spools out frames call MacReset.init(); // resets the remaining components post resetSpinTask(); } } task void resetSpinTask() { m_resetSpin -= 1; if (m_resetSpin != 0) { post resetSpinTask(); return; } ASSERT(call RadioControl.start() == SUCCESS); } async command token_requested_t IsRadioTokenRequested.getNow(){ return m_resetSpin != 0; } event void RadioControl.startDone(error_t error) { // comment at RadioControl.stopDone() applies here as well if (call RadioToken.isOwner()) { if (m_setDefaultPIB) resetAttributesToDefault(); signal PIBUpdate.notify[IEEE154_phyCurrentChannel](&m_pib.phyCurrentChannel); signal PIBUpdate.notify[IEEE154_macShortAddress](&m_pib.macShortAddress); signal PIBUpdate.notify[IEEE154_macPANId](&m_pib.macPANId); signal PIBUpdate.notify[IEEE154_phyCCAMode](&m_pib.phyCCAMode); signal PIBUpdate.notify[IEEE154_phyTransmitPower](&m_pib.phyTransmitPower); signal PIBUpdate.notify[IEEE154_phyCurrentPage](&m_pib.phyCurrentPage); signal PIBUpdate.notify[IEEE154_macPanCoordinator](&m_pib.macPanCoordinator); call RadioToken.release(); signal MLME_RESET.confirm(IEEE154_SUCCESS); } } /* ----------------------- MLME-GET ----------------------- */ command ieee154_phyCurrentChannel_t MLME_GET.phyCurrentChannel() { return m_pib.phyCurrentChannel;} command ieee154_phyChannelsSupported_t MLME_GET.phyChannelsSupported() { return IEEE154_SUPPORTED_CHANNELS;} command ieee154_phyTransmitPower_t MLME_GET.phyTransmitPower() { return m_pib.phyTransmitPower;} command ieee154_phyCCAMode_t MLME_GET.phyCCAMode() { return m_pib.phyCCAMode;} command ieee154_phyCurrentPage_t MLME_GET.phyCurrentPage() { return m_pib.phyCurrentPage;} command ieee154_phyMaxFrameDuration_t MLME_GET.phyMaxFrameDuration() { return IEEE154_MAX_FRAME_DURATION;} command ieee154_phySHRDuration_t MLME_GET.phySHRDuration() { return IEEE154_SHR_DURATION;} command ieee154_phySymbolsPerOctet_t MLME_GET.phySymbolsPerOctet() { return IEEE154_SYMBOLS_PER_OCTET;} command ieee154_macAckWaitDuration_t MLME_GET.macAckWaitDuration() { return IEEE154_ACK_WAIT_DURATION;} command ieee154_macAssociationPermit_t MLME_GET.macAssociationPermit() { return m_pib.macAssociationPermit;} command ieee154_macAutoRequest_t MLME_GET.macAutoRequest() { return m_pib.macAutoRequest;} command ieee154_macBattLifeExt_t MLME_GET.macBattLifeExt() { return m_pib.macBattLifeExt;} command ieee154_macBattLifeExtPeriods_t MLME_GET.macBattLifeExtPeriods() { return m_pib.macBattLifeExtPeriods;} command ieee154_macBeaconOrder_t MLME_GET.macBeaconOrder() { return m_pib.macBeaconOrder;} command ieee154_macBeaconTxTime_t MLME_GET.macBeaconTxTime() { return m_pib.macBeaconTxTime;} command ieee154_macBSN_t MLME_GET.macBSN() { return m_pib.macBSN;} command ieee154_macCoordExtendedAddress_t MLME_GET.macCoordExtendedAddress() { return m_pib.macCoordExtendedAddress;} command ieee154_macCoordShortAddress_t MLME_GET.macCoordShortAddress() { return m_pib.macCoordShortAddress;} command ieee154_macDSN_t MLME_GET.macDSN() { return m_pib.macDSN;} command ieee154_macGTSPermit_t MLME_GET.macGTSPermit() { return m_pib.macGTSPermit;} command ieee154_macMaxCSMABackoffs_t MLME_GET.macMaxCSMABackoffs() { return m_pib.macMaxCSMABackoffs;} command ieee154_macMinBE_t MLME_GET.macMinBE() { return m_pib.macMinBE;} command ieee154_macPANId_t MLME_GET.macPANId() { return m_pib.macPANId;} command ieee154_macPromiscuousMode_t MLME_GET.macPromiscuousMode() { return call PromiscuousModeGet.get();} command ieee154_macRxOnWhenIdle_t MLME_GET.macRxOnWhenIdle() { return m_pib.macRxOnWhenIdle;} command ieee154_macShortAddress_t MLME_GET.macShortAddress() { return m_pib.macShortAddress;} command ieee154_macSuperframeOrder_t MLME_GET.macSuperframeOrder() { return m_pib.macSuperframeOrder;} command ieee154_macTransactionPersistenceTime_t MLME_GET.macTransactionPersistenceTime() { return m_pib.macTransactionPersistenceTime;} command ieee154_macAssociatedPANCoord_t MLME_GET.macAssociatedPANCoord() { return m_pib.macAssociatedPANCoord;} command ieee154_macMaxBE_t MLME_GET.macMaxBE() { return m_pib.macMaxBE;} command ieee154_macMaxFrameTotalWaitTime_t MLME_GET.macMaxFrameTotalWaitTime() { return m_pib.macMaxFrameTotalWaitTime;} command ieee154_macMaxFrameRetries_t MLME_GET.macMaxFrameRetries() { return m_pib.macMaxFrameRetries;} command ieee154_macResponseWaitTime_t MLME_GET.macResponseWaitTime() { return m_pib.macResponseWaitTime;} command ieee154_macSyncSymbolOffset_t MLME_GET.macSyncSymbolOffset() { return IEEE154_SYNC_SYMBOL_OFFSET;} command ieee154_macTimestampSupported_t MLME_GET.macTimestampSupported() { return IEEE154_TIMESTAMP_SUPPORTED;} command ieee154_macSecurityEnabled_t MLME_GET.macSecurityEnabled() { return m_pib.macSecurityEnabled;} command ieee154_macMinLIFSPeriod_t MLME_GET.macMinLIFSPeriod() { return IEEE154_MIN_LIFS_PERIOD;} command ieee154_macMinSIFSPeriod_t MLME_GET.macMinSIFSPeriod() { return IEEE154_MIN_SIFS_PERIOD;} command ieee154_macPanCoordinator_t MLME_GET.macPanCoordinator() { return m_pib.macPanCoordinator;} /* ----------------------- MLME-SET ----------------------- */ command ieee154_status_t MLME_SET.phyCurrentChannel(ieee154_phyCurrentChannel_t value) { uint32_t i = 1; uint8_t k = value; while (i && k) { i <<= 1; k -= 1; } if (!(IEEE154_SUPPORTED_CHANNELS & i)) return IEEE154_INVALID_PARAMETER; m_pib.phyCurrentChannel = value; signal PIBUpdate.notify[IEEE154_phyCurrentChannel](&m_pib.phyCurrentChannel); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.phyTransmitPower(ieee154_phyTransmitPower_t value) { m_pib.phyTransmitPower = (value & 0x3F); signal PIBUpdate.notify[IEEE154_phyTransmitPower](&m_pib.phyTransmitPower); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.phyCCAMode(ieee154_phyCCAMode_t value) { if (value < 1 || value > 3) return IEEE154_INVALID_PARAMETER; m_pib.phyCCAMode = value; signal PIBUpdate.notify[IEEE154_phyCCAMode](&m_pib.phyCCAMode); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.phyCurrentPage(ieee154_phyCurrentPage_t value) { if (value > 31) return IEEE154_INVALID_PARAMETER; m_pib.phyCurrentPage = value; signal PIBUpdate.notify[IEEE154_phyCurrentPage](&m_pib.phyCurrentPage); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macAssociationPermit(ieee154_macAssociationPermit_t value) { m_pib.macAssociationPermit = value; signal PIBUpdate.notify[IEEE154_macAssociationPermit](&m_pib.macAssociationPermit); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macAutoRequest(ieee154_macAutoRequest_t value) { m_pib.macAutoRequest = value; signal PIBUpdate.notify[IEEE154_macAutoRequest](&m_pib.macAutoRequest); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macBattLifeExt(ieee154_macBattLifeExt_t value) { m_pib.macBattLifeExt = value; signal PIBUpdate.notify[IEEE154_macBattLifeExt](&m_pib.macBattLifeExt); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macBattLifeExtPeriods(ieee154_macBattLifeExtPeriods_t value) { if (value < 6 || value > 41) return IEEE154_INVALID_PARAMETER; m_pib.macBattLifeExtPeriods = value; signal PIBUpdate.notify[IEEE154_macBattLifeExtPeriods](&m_pib.macBattLifeExtPeriods); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macBeaconOrder(ieee154_macBeaconOrder_t value) { if (value > 15) return IEEE154_INVALID_PARAMETER; m_pib.macBeaconOrder = value; signal PIBUpdate.notify[IEEE154_macBeaconOrder](&m_pib.macBeaconOrder); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macBSN(ieee154_macBSN_t value) { m_pib.macBSN = value; signal PIBUpdate.notify[IEEE154_macBSN](&m_pib.macBSN); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macCoordExtendedAddress(ieee154_macCoordExtendedAddress_t value) { m_pib.macCoordExtendedAddress = value; signal PIBUpdate.notify[IEEE154_macCoordExtendedAddress](&m_pib.macCoordExtendedAddress); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macCoordShortAddress(ieee154_macCoordShortAddress_t value) { m_pib.macCoordShortAddress = value; signal PIBUpdate.notify[IEEE154_macCoordShortAddress](&m_pib.macCoordShortAddress); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macDSN(ieee154_macDSN_t value) { m_pib.macDSN = value; signal PIBUpdate.notify[IEEE154_macDSN](&m_pib.macDSN); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macGTSPermit(ieee154_macGTSPermit_t value) { m_pib.macGTSPermit = value; signal PIBUpdate.notify[IEEE154_macGTSPermit](&m_pib.macGTSPermit); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macMaxCSMABackoffs(ieee154_macMaxCSMABackoffs_t value) { if (value > 5) return IEEE154_INVALID_PARAMETER; m_pib.macMaxCSMABackoffs = value; updateMacMaxFrameTotalWaitTime(); signal PIBUpdate.notify[IEEE154_macMaxCSMABackoffs](&m_pib.macMaxCSMABackoffs); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macMinBE(ieee154_macMinBE_t value) { if (value > m_pib.macMaxBE) return IEEE154_INVALID_PARAMETER; m_pib.macMinBE = value; updateMacMaxFrameTotalWaitTime(); signal PIBUpdate.notify[IEEE154_macMinBE](&m_pib.macMinBE); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macPANId(ieee154_macPANId_t value) { m_pib.macPANId = value; signal PIBUpdate.notify[IEEE154_macPANId](&m_pib.macPANId); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macRxOnWhenIdle(ieee154_macRxOnWhenIdle_t value) { m_pib.macRxOnWhenIdle = value; signal PIBUpdate.notify[IEEE154_macRxOnWhenIdle](&m_pib.macRxOnWhenIdle); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macShortAddress(ieee154_macShortAddress_t value) { m_pib.macShortAddress = value; signal PIBUpdate.notify[IEEE154_macShortAddress](&m_pib.macShortAddress); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macTransactionPersistenceTime(ieee154_macTransactionPersistenceTime_t value) { m_pib.macTransactionPersistenceTime = value; signal PIBUpdate.notify[IEEE154_macTransactionPersistenceTime](&m_pib.macTransactionPersistenceTime); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macAssociatedPANCoord(ieee154_macAssociatedPANCoord_t value) { m_pib.macAssociatedPANCoord = value; signal PIBUpdate.notify[IEEE154_macAssociatedPANCoord](&m_pib.macAssociatedPANCoord); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macMaxBE(ieee154_macMaxBE_t value) { if (value < 3 || value > 8) return IEEE154_INVALID_PARAMETER; m_pib.macMaxBE = value; updateMacMaxFrameTotalWaitTime(); signal PIBUpdate.notify[IEEE154_macMaxBE](&m_pib.macMaxBE); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macMaxFrameTotalWaitTime(ieee154_macMaxFrameTotalWaitTime_t value) { // equation 14 on page 160 defines how macMaxFrameTotalWaitTime is calculated; // its value depends only on other PIB attributes and constants - why does the standard // allow setting it by the next higher layer ?? m_pib.macMaxFrameTotalWaitTime = value; signal PIBUpdate.notify[IEEE154_macMaxFrameTotalWaitTime](&m_pib.macMaxFrameTotalWaitTime); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macMaxFrameRetries(ieee154_macMaxFrameRetries_t value) { if (value > 7) return IEEE154_INVALID_PARAMETER; m_pib.macMaxFrameRetries = value; signal PIBUpdate.notify[IEEE154_macMaxFrameRetries](&m_pib.macMaxFrameRetries); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macResponseWaitTime(ieee154_macResponseWaitTime_t value) { if (value < 2 || value > 64) return IEEE154_INVALID_PARAMETER; m_pib.macResponseWaitTime = value; signal PIBUpdate.notify[IEEE154_macResponseWaitTime](&m_pib.macResponseWaitTime); return IEEE154_SUCCESS; } command ieee154_status_t MLME_SET.macSecurityEnabled(ieee154_macSecurityEnabled_t value) { return IEEE154_UNSUPPORTED_ATTRIBUTE; } // Read-only attributes (writable only by MAC components) command void SetMacSuperframeOrder.set( ieee154_macSuperframeOrder_t value) { m_pib.macSuperframeOrder = value; signal PIBUpdate.notify[IEEE154_macSuperframeOrder](&m_pib.macSuperframeOrder); } command void SetMacBeaconTxTime.set( ieee154_macBeaconTxTime_t value) { m_pib.macBeaconTxTime = value; signal PIBUpdate.notify[IEEE154_macBeaconTxTime](&m_pib.macBeaconTxTime); } command void SetMacPanCoordinator.set( ieee154_macPanCoordinator_t value) { m_pib.macPanCoordinator = value; signal PIBUpdate.notify[IEEE154_macPanCoordinator](&m_pib.macPanCoordinator); } /* ----------------------- TimeCalc ----------------------- */ async command uint32_t TimeCalc.timeElapsed(uint32_t t0, uint32_t t1) { // t0 occured before t1, what is the delta? if (t0 <= t1) return t1 - t0; else return ~(t0 - t1) + 1; } async command bool TimeCalc.hasExpired(uint32_t t0, uint32_t dt) { // t0 is in the past, what about t0+dt? uint32_t now = call LocalTime.get(), elapsed; if (now >= t0) elapsed = now - t0; else elapsed = ~(t0 - now) + 1; return (elapsed >= dt); } /* ----------------------- Frame Access ----------------------- */ command void Packet.clear(message_t* msg) { message_header_t* header = (message_header_t*) msg->header; message_metadata_t* metadata = (message_metadata_t*) msg->metadata; header->ieee154.length = 0; memset( header->ieee154.mhr, 0x0, MHR_MAX_LEN); memset( &metadata->ieee154, 0x0, sizeof(ieee154_metadata_t)); } command uint8_t Packet.payloadLength(message_t* msg) { return ((message_header_t*) msg->header)->ieee154.length; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { ((message_header_t*) msg->header)->ieee154.length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command void* Packet.getPayload(message_t* msg, uint8_t len) { return msg->data; } async command uint8_t FrameUtility.writeHeader( uint8_t* mhr, uint8_t DstAddrMode, uint16_t DstPANId, ieee154_address_t* DstAddr, uint8_t SrcAddrMode, uint16_t SrcPANId, const ieee154_address_t* SrcAddr, bool PANIDCompression) { uint8_t offset = MHR_INDEX_ADDRESS; if (DstAddrMode == ADDR_MODE_SHORT_ADDRESS || DstAddrMode == ADDR_MODE_EXTENDED_ADDRESS) { *((nxle_uint16_t*) &mhr[offset]) = DstPANId; offset += 2; if (DstAddrMode == ADDR_MODE_SHORT_ADDRESS) { *((nxle_uint16_t*) &mhr[offset]) = DstAddr->shortAddress; offset += 2; } else { call FrameUtility.convertToLE(&mhr[offset], &DstAddr->extendedAddress); offset += 8; } } if (SrcAddrMode == ADDR_MODE_SHORT_ADDRESS || SrcAddrMode == ADDR_MODE_EXTENDED_ADDRESS) { if (DstPANId != SrcPANId || !PANIDCompression) { *((nxle_uint16_t*) &mhr[offset]) = SrcPANId; offset += 2; } if (SrcAddrMode == ADDR_MODE_SHORT_ADDRESS) { *((nxle_uint16_t*) &mhr[offset]) = SrcAddr->shortAddress; offset += 2; } else { call FrameUtility.convertToLE(&mhr[offset], &SrcAddr->extendedAddress); offset += 8; } } return offset; } command bool FrameUtility.isBeaconFromCoord(message_t *frame) { uint8_t offset = MHR_INDEX_ADDRESS; uint8_t *mhr = MHR(frame); if ((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON) return FALSE; // not a beacon frame if (!(mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK)) return FALSE; // source address information missing if (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) return FALSE; // beacons don't include dest address if ((*(nxle_uint16_t*) (&mhr[offset])) != m_pib.macPANId) return FALSE; // wrong PAN ID offset += 2; if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT) { if ((*(nxle_uint16_t*) (&mhr[offset])) != m_pib.macCoordShortAddress) return FALSE; } else if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_EXTENDED) { if (!isCoordExtendedAddress(mhr + offset)) return FALSE; } return TRUE; } async command error_t FrameUtility.getMHRLength(uint8_t fcf1, uint8_t fcf2, uint8_t *len) { uint8_t idCompression; uint8_t offset = MHR_INDEX_ADDRESS; if (fcf1 & FC1_SECURITY_ENABLED) return FAIL; // not supported idCompression = (fcf1 & FC1_PAN_ID_COMPRESSION); if (fcf2 & 0x08) { // short or ext. address offset += 4; // pan id + short address if (fcf2 & 0x04) // ext. address offset += 6; // diff to short address } if (fcf2 & 0x80) { // short or ext. address offset += 2; if (!idCompression) offset += 2; if (fcf2 & 0x40) // ext. address offset += 6; // diff to short address } *len = offset; return SUCCESS; } command error_t Frame.setAddressingFields(message_t* frame, uint8_t srcAddrMode, uint8_t dstAddrMode, uint16_t dstPANId, ieee154_address_t *dstAddr, ieee154_security_t *security) { uint8_t *mhr = MHR(frame); ieee154_address_t srcAddress; ieee154_macPANId_t srcPANId = call MLME_GET.macPANId(); if (security && security->SecurityLevel) return FAIL; // not implemented mhr[MHR_INDEX_FC2] &= ~(FC2_DEST_MODE_MASK | FC2_SRC_MODE_MASK); mhr[MHR_INDEX_FC2] |= dstAddrMode << FC2_DEST_MODE_OFFSET; mhr[MHR_INDEX_FC2] |= srcAddrMode << FC2_SRC_MODE_OFFSET; if (srcAddrMode == ADDR_MODE_SHORT_ADDRESS) srcAddress.shortAddress = call MLME_GET.macShortAddress(); else srcAddress.extendedAddress = call GetLocalExtendedAddress.get(); if (dstAddrMode >= ADDR_MODE_SHORT_ADDRESS && srcAddrMode >= ADDR_MODE_SHORT_ADDRESS && dstPANId == srcPANId) mhr[MHR_INDEX_FC1] |= FC1_PAN_ID_COMPRESSION; else mhr[MHR_INDEX_FC1] &= ~FC1_PAN_ID_COMPRESSION; call FrameUtility.writeHeader( mhr, dstAddrMode, dstPANId, dstAddr, srcAddrMode, srcPANId, &srcAddress, (mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) ? TRUE: FALSE); return SUCCESS; } command uint8_t Frame.getFrameType(message_t* frame) { uint8_t *mhr = MHR(frame); return (mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK); } command void* Frame.getHeader(message_t* frame) { uint8_t *mhr = MHR(frame); return (void*) &(mhr[MHR_INDEX_FC1]); } command uint8_t Frame.getHeaderLength(message_t* frame) { uint8_t len; uint8_t *mhr = MHR(frame); call FrameUtility.getMHRLength(mhr[0], mhr[1], &len); return len; } command void* Frame.getPayload(message_t* frame) { uint8_t *payload = (uint8_t *) frame->data; return payload; } command uint8_t Frame.getPayloadLength(message_t* frame) { uint8_t len = ((ieee154_header_t*) frame->header)->length & FRAMECTL_LENGTH_MASK; return len; } command uint32_t Frame.getTimestamp(message_t* frame) { ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata; return metadata->timestamp; } command bool Frame.isTimestampValid(message_t* frame) { ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata; if (metadata->timestamp == IEEE154_INVALID_TIMESTAMP) return FALSE; else return TRUE; } command uint8_t Frame.getDSN(message_t* frame) { uint8_t *mhr = MHR(frame); return mhr[MHR_INDEX_SEQNO]; } command uint8_t Frame.getLinkQuality(message_t* frame) { ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata; return metadata->linkQuality; } command int8_t Frame.getRSSI(message_t* frame) { ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata; return metadata->rssi; } command uint8_t Frame.getSrcAddrMode(message_t* frame) { uint8_t *mhr = MHR(frame); return (mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) >> FC2_SRC_MODE_OFFSET; } command error_t Frame.getSrcAddr(message_t* frame, ieee154_address_t *address) { uint8_t *mhr = MHR(frame); uint8_t offset = MHR_INDEX_ADDRESS; uint8_t destMode = (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK); if (!(mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_SHORT)) return FAIL; if (destMode == FC2_DEST_MODE_SHORT) offset += 4; else if (destMode == FC2_DEST_MODE_EXTENDED) offset += 10; if (!((mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) && (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT))) offset += 2; if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT) address->shortAddress = *((nxle_uint16_t*) (&(mhr[offset]))); else call FrameUtility.convertToNative(&address->extendedAddress, (&(mhr[offset]))); return SUCCESS; } command error_t Frame.getSrcPANId(message_t* frame, uint16_t *PANID) { uint8_t *mhr = MHR(frame); uint8_t offset = MHR_INDEX_ADDRESS; uint8_t destMode = (mhr[1] & FC2_DEST_MODE_MASK); if (!(mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_SHORT)) return FAIL; if (destMode == FC2_DEST_MODE_SHORT) offset += 4; else if (destMode == FC2_DEST_MODE_EXTENDED) offset += 10; if ((mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) && (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT)) *PANID = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS]))); else if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT) *PANID = *((nxle_uint16_t*) (&(mhr[offset]))); else *PANID = *((nxle_uint16_t*) (&(mhr[offset]))); return SUCCESS; } command uint8_t Frame.getDstAddrMode(message_t* frame) { uint8_t *mhr = MHR(frame); return (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) >> FC2_DEST_MODE_OFFSET; } command error_t Frame.getDstAddr(message_t* frame, ieee154_address_t *address) { uint8_t *mhr = MHR(frame); if (!(mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT)) return FAIL; if ((mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT) address->shortAddress = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS]) + 2)); else call FrameUtility.convertToNative(&address->extendedAddress, (&(mhr[MHR_INDEX_ADDRESS]) + 2)); return SUCCESS; } command error_t Frame.getDstPANId(message_t* frame, uint16_t *PANID) { uint8_t *mhr = MHR(frame); if (!(mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT)) return FAIL; *PANID = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS]))); return SUCCESS; } command bool Frame.wasPromiscuousModeEnabled(message_t* frame) { return (((ieee154_header_t*) frame->header)->length & FRAMECTL_PROMISCUOUS) ? TRUE : FALSE; } command bool Frame.hasStandardCompliantHeader(message_t* frame) { uint8_t *mhr = MHR(frame); if (((mhr[0] & FC1_FRAMETYPE_MASK) > 0x03) || ((mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == 0x04) || ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == 0x40) || #ifndef IEEE154_SECURITY_ENABLED ((mhr[0] & FC1_SECURITY_ENABLED)) || #endif (mhr[MHR_INDEX_FC2] & FC2_FRAME_VERSION_2)) return FALSE; else return TRUE; } /* ----------------------- Beacon Frame Access ----------------------- */ uint8_t getPendAddrSpecOffset(uint8_t *macPayloadField) { uint8_t gtsDescriptorCount = macPayloadField[BEACON_INDEX_GTS_SPEC] & GTS_DESCRIPTOR_COUNT_MASK; return BEACON_INDEX_GTS_SPEC + 1 + ((gtsDescriptorCount > 0) ? 1 + gtsDescriptorCount * 3: 0); } command error_t BeaconFrame.getPendAddrSpec(message_t* frame, uint8_t* pendAddrSpec) { uint8_t *mhr = MHR(frame); if (((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON)) return FAIL; else { uint8_t *payload = (uint8_t *) frame->data; uint8_t pendAddrSpecOffset = getPendAddrSpecOffset(payload); *pendAddrSpec = payload[pendAddrSpecOffset]; return SUCCESS; } } command error_t BeaconFrame.getPendAddr(message_t* frame, uint8_t addrMode, ieee154_address_t buffer[], uint8_t bufferSize) { uint8_t *mhr = MHR(frame); uint8_t *payload = (uint8_t *) frame->data; uint8_t pendAddrSpecOffset = getPendAddrSpecOffset(payload); uint8_t pendAddrSpec = payload[pendAddrSpecOffset], i; if (((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON)) return FAIL; if (addrMode == ADDR_MODE_SHORT_ADDRESS) { for (i=0; i<(pendAddrSpec & PENDING_ADDRESS_SHORT_MASK) && i> 4) && idata; uint8_t pendAddrSpecOffset = getPendAddrSpecOffset(payload); uint8_t pendAddrSpec = payload[pendAddrSpecOffset], i; ieee154_macShortAddress_t shortAddress = call MLME_GET.macShortAddress(); if (((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON)) return ADDR_MODE_NOT_PRESENT; for (i=0; i<(pendAddrSpec & PENDING_ADDRESS_SHORT_MASK); i++) if (*((nxle_uint16_t*) (payload + pendAddrSpecOffset + 1 + 2*i)) == shortAddress) return ADDR_MODE_SHORT_ADDRESS; for (i=0; i<((pendAddrSpec & PENDING_ADDRESS_EXT_MASK) >> 4); i++) if (isLocalExtendedAddress(((payload + pendAddrSpecOffset + 1 + (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK)*2 + 8*i)))) return ADDR_MODE_EXTENDED_ADDRESS; return ADDR_MODE_NOT_PRESENT; } command void* BeaconFrame.getBeaconPayload(message_t* frame) { uint8_t *mhr = MHR(frame); uint8_t *payload = (uint8_t *) frame->data; if ((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_BEACON) { uint8_t pendAddrSpecOffset = getPendAddrSpecOffset(payload); uint8_t pendAddrSpec = payload[pendAddrSpecOffset]; payload += (pendAddrSpecOffset + 1); if (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK) payload += (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK) * 2; if (pendAddrSpec & PENDING_ADDRESS_EXT_MASK) payload += ((pendAddrSpec & PENDING_ADDRESS_EXT_MASK) >> 4) * 8; } return payload; } command uint8_t BeaconFrame.getBeaconPayloadLength(message_t* frame) { uint8_t *mhr = MHR(frame); uint8_t len = ((ieee154_header_t*) frame->header)->length & FRAMECTL_LENGTH_MASK; if ((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_BEACON) { uint8_t *payload = call BeaconFrame.getBeaconPayload(frame); len = len - (payload - (uint8_t *) frame->data); } return len; } command uint8_t BeaconFrame.getBSN(message_t* frame) { return call Frame.getDSN(frame); } command error_t BeaconFrame.parsePANDescriptor( message_t *frame, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_PANDescriptor_t *pdescriptor) { uint8_t *mhr = MHR(frame); uint8_t offset; ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata; if ((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON || (((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) != FC2_SRC_MODE_SHORT) && ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) != FC2_SRC_MODE_EXTENDED))) return FAIL; pdescriptor->CoordAddrMode = (mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) >> FC2_SRC_MODE_OFFSET; offset = MHR_INDEX_ADDRESS; pdescriptor->CoordPANId = *((nxle_uint16_t*) &mhr[offset]); offset += sizeof(ieee154_macPANId_t); if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT) pdescriptor->CoordAddress.shortAddress = *((nxle_uint16_t*) &mhr[offset]); else call FrameUtility.convertToNative(&pdescriptor->CoordAddress.extendedAddress, &mhr[offset]); pdescriptor->LogicalChannel = LogicalChannel; pdescriptor->ChannelPage = ChannelPage; ((uint8_t*) &pdescriptor->SuperframeSpec)[0] = frame->data[BEACON_INDEX_SF_SPEC1]; // little endian ((uint8_t*) &pdescriptor->SuperframeSpec)[1] = frame->data[BEACON_INDEX_SF_SPEC2]; pdescriptor->GTSPermit = (frame->data[BEACON_INDEX_GTS_SPEC] & GTS_SPEC_PERMIT) ? 1 : 0; pdescriptor->LinkQuality = metadata->linkQuality; pdescriptor->TimeStamp = metadata->timestamp; #ifndef IEEE154_SECURITY_ENABLED pdescriptor->SecurityFailure = IEEE154_SUCCESS; pdescriptor->SecurityLevel = 0; pdescriptor->KeyIdMode = 0; pdescriptor->KeySource = 0; pdescriptor->KeyIndex = 0; #else #error Implementation of BeaconFrame.parsePANDescriptor() needs to be adapted! #endif return SUCCESS; } /* ----------------------- FrameUtility, etc. ----------------------- */ command uint64_t GetLocalExtendedAddress.get() { return m_aExtendedAddressLE; } async command void FrameUtility.convertToLE(uint8_t *destLE, const uint64_t *src) { uint8_t i; uint64_t srcCopy = *src; for (i=0; i<8; i++) { destLE[i] = srcCopy; srcCopy >>= 8; } } async command void FrameUtility.convertToNative(uint64_t *dest, const uint8_t *srcLE) { // on msp430 nxle_uint64_t doesn't work, this is a workaround uint32_t lower = *((nxle_uint32_t*) srcLE); uint64_t upper = *((nxle_uint32_t*) (srcLE+4)); *dest = (upper << 32) + lower; } async command void FrameUtility.copyLocalExtendedAddressLE(uint8_t *destLE) { call FrameUtility.convertToLE(destLE, &m_aExtendedAddressLE); } command void FrameUtility.copyCoordExtendedAddressLE(uint8_t *destLE) { call FrameUtility.convertToLE(destLE, &m_pib.macCoordExtendedAddress); } bool isLocalExtendedAddress(uint8_t *addrLE) { uint64_t dest; call FrameUtility.convertToNative(&dest, addrLE); return dest == m_aExtendedAddressLE; } bool isCoordExtendedAddress(uint8_t *addrLE) { uint64_t dest; call FrameUtility.convertToNative(&dest, addrLE); return dest == m_pib.macCoordExtendedAddress; } default event void PIBUpdate.notify[uint8_t PIBAttributeID](const void* PIBAttributeValue) {} command error_t PIBUpdate.enable[uint8_t PIBAttributeID]() {return FAIL;} command error_t PIBUpdate.disable[uint8_t PIBAttributeID]() {return FAIL;} async event void RadioToken.transferredFrom(uint8_t fromClient){ASSERT(0);} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/PollP.nc000066400000000000000000000213321207233610700204730ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2010-01-05 16:41:16 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" module PollP { provides { interface Init; interface MLME_POLL; interface FrameRx as DataRx; interface DataRequest as DataRequest[uint8_t client]; } uses { interface FrameTx as PollTx; interface FrameExtracted as DataExtracted; interface FrameUtility; interface Pool as TxFramePool; interface Pool as TxControlPool; interface MLME_GET; interface Get as LocalExtendedAddress; } } implementation { enum { HANDLE_MLME_POLL_REQUEST = 0xFF, HANDLE_MLME_POLL_SUCCESS = 0xFE, }; int m_numPending; uint8_t m_dataRequestCmdID = CMD_FRAME_DATA_REQUEST; void assembleDataRequestFrame( uint8_t destAddrMode, uint16_t destPANId, uint8_t* DstAddr, uint8_t srcAddrMode, ieee154_txframe_t *txFrame); command error_t Init.init() { m_numPending = 0; return SUCCESS; } command ieee154_status_t MLME_POLL.request ( uint8_t coordAddrMode, uint16_t coordPANID, ieee154_address_t coordAddress, ieee154_security_t *security) { ieee154_txframe_t *txFrame; ieee154_txcontrol_t *txControl; uint8_t srcAddrMode = 2; ieee154_status_t status = IEEE154_SUCCESS; uint8_t coordAddressLE[8]; // little endian is what we want nxle_uint16_t *shortAddress = (nxle_uint16_t*) coordAddressLE; if (security && security->SecurityLevel) status = IEEE154_UNSUPPORTED_SECURITY; else if (coordAddrMode < 2 || coordAddrMode > 3 || coordPANID == 0xFFFF) status = IEEE154_INVALID_PARAMETER; else if (!(txFrame = call TxFramePool.get())) // none of the predefined return value really fits status = IEEE154_TRANSACTION_OVERFLOW; else if (!(txControl = call TxControlPool.get())) { call TxFramePool.put(txFrame); status = IEEE154_TRANSACTION_OVERFLOW; } else { txFrame->header = &txControl->header; txFrame->metadata = &txControl->metadata; if (coordAddrMode == ADDR_MODE_SHORT_ADDRESS) *shortAddress = coordAddress.shortAddress; else call FrameUtility.convertToLE(coordAddressLE, &coordAddress.extendedAddress); txFrame->handle = HANDLE_MLME_POLL_REQUEST; if (call MLME_GET.macShortAddress() >= 0xFFFE) srcAddrMode = 3; assembleDataRequestFrame(coordAddrMode, coordPANID, coordAddressLE, srcAddrMode, txFrame); if ((status = call PollTx.transmit(txFrame)) != IEEE154_SUCCESS) { call TxFramePool.put(txFrame); call TxControlPool.put(txControl); status = IEEE154_TRANSACTION_OVERFLOW; } else m_numPending++; } dbg_serial("PollP", "MLME_POLL.request -> result: %lu\n", (uint32_t) status); return status; } command ieee154_status_t DataRequest.poll[uint8_t client](uint8_t CoordAddrMode, uint16_t CoordPANId, uint8_t *CoordAddressLE, uint8_t srcAddrMode) { ieee154_txframe_t *txFrame; ieee154_txcontrol_t *txControl; ieee154_status_t status = IEEE154_TRANSACTION_OVERFLOW; dbg_serial("PollP", "Internal Poll\n"); if (client == SYNC_POLL_CLIENT && m_numPending != 0) { // no point in auto-requesting if user request is pending signal DataRequest.pollDone[client](); return IEEE154_SUCCESS; } else if ((txFrame = call TxFramePool.get()) != NULL) { if ((txControl = call TxControlPool.get()) != NULL) { txFrame->header = &txControl->header; txFrame->metadata = &txControl->metadata; txFrame->handle = client; assembleDataRequestFrame(CoordAddrMode, CoordPANId, CoordAddressLE, srcAddrMode, txFrame); if ((status = call PollTx.transmit(txFrame)) != IEEE154_SUCCESS) { call TxControlPool.put(txControl); call TxFramePool.put(txFrame); dbg_serial("PollP", "Tx Overflow\n"); } else m_numPending++; } else { call TxFramePool.put(txFrame); } } dbg_serial("PollP", "Status %lu, numPending: %lu\n", (uint32_t) status, (uint32_t) m_numPending); if (status != IEEE154_SUCCESS) signal DataRequest.pollDone[client](); return status; } void assembleDataRequestFrame(uint8_t destAddrMode, uint16_t destPANId, uint8_t* destAddrPtrLE, uint8_t srcAddrMode, ieee154_txframe_t *txFrame) { // destAddrPtrLE points to an address in little-endian format ! ieee154_address_t srcAddress; uint8_t *mhr; uint16_t srcPANId; ieee154_address_t DstAddr; srcPANId = call MLME_GET.macPANId(); memcpy(&DstAddr, destAddrPtrLE, destAddrMode == 2 ? 2 : 8); mhr = txFrame->header->mhr; mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_CMD | FC1_ACK_REQUEST; if (destAddrMode >= 2 && srcAddrMode >= 2 && destPANId == srcPANId) mhr[MHR_INDEX_FC1] |= FC1_PAN_ID_COMPRESSION; mhr[MHR_INDEX_FC2] = destAddrMode << FC2_DEST_MODE_OFFSET; mhr[MHR_INDEX_FC2] |= srcAddrMode << FC2_SRC_MODE_OFFSET; if (srcAddrMode == 2) srcAddress.shortAddress = call MLME_GET.macShortAddress(); else srcAddress.extendedAddress = call LocalExtendedAddress.get(); txFrame->headerLen = call FrameUtility.writeHeader( txFrame->header->mhr, destAddrMode, destPANId, &DstAddr, srcAddrMode, srcPANId, &srcAddress, (mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) ? TRUE: FALSE); txFrame->payload = &m_dataRequestCmdID; txFrame->payloadLen = 1; } event message_t* DataExtracted.received(message_t* frame, ieee154_txframe_t *txFrame) { if (!txFrame) { dbg_serial("PollP", "Internal error\n"); return frame; } else dbg_serial("PollP", "Extracted data successfully\n"); if (txFrame->handle == HANDLE_MLME_POLL_REQUEST) signal MLME_POLL.confirm(IEEE154_SUCCESS); else signal DataRequest.pollDone[txFrame->handle](); txFrame->handle = HANDLE_MLME_POLL_SUCCESS; // mark as processed // TODO: check if pending bit is set (then initiate another POLL) return signal DataRx.received(frame); } event void PollTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { dbg_serial("PollP", "transmitDone()\n"); m_numPending--; if (txFrame->handle != HANDLE_MLME_POLL_SUCCESS) { // didn't receive a DATA frame from the coordinator if (status == IEEE154_SUCCESS) // TODO: can this happen if a frame other than DATA was extracted? status = IEEE154_NO_DATA; if (txFrame->handle == HANDLE_MLME_POLL_REQUEST) signal MLME_POLL.confirm(status); else signal DataRequest.pollDone[txFrame->handle](); } call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(txFrame); } default event void MLME_POLL.confirm(ieee154_status_t status) {} default event void DataRequest.pollDone[uint8_t client]() {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/PromiscuousModeP.nc000066400000000000000000000112341207233610700227220ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2009-03-24 12:56:46 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" module PromiscuousModeP { provides { interface Init; interface SplitControl as PromiscuousMode; interface Get as PromiscuousModeGet; interface FrameRx; interface GetNow as IsRadioTokenRequested; } uses { interface TransferableResource as RadioToken; interface RadioRx as PromiscuousRx; interface RadioOff; interface Set as RadioPromiscuousMode; } } implementation { norace enum promiscuous_state { S_STOPPING, S_STOPPED, S_STARTING, S_STARTED, } m_state; command error_t Init.init() { m_state = S_STOPPED; return SUCCESS; } /* ----------------------- Promiscuous Mode ----------------------- */ command bool PromiscuousModeGet.get() { return (m_state == S_STARTED); } command error_t PromiscuousMode.start() { error_t result = FAIL; if (m_state == S_STOPPED) { m_state = S_STARTING; call RadioToken.request(); result = SUCCESS; } dbg_serial("PromiscuousModeP", "PromiscuousMode.start -> result: %lu\n", (uint32_t) result); return result; } event void RadioToken.granted() { call RadioPromiscuousMode.set(TRUE); if (call RadioOff.isOff()) signal RadioOff.offDone(); else call RadioOff.off(); } task void signalStartDoneTask() { m_state = S_STARTED; dbg_serial("PromiscuousModeP", "Promiscuous mode enabled.\n"); signal PromiscuousMode.startDone(SUCCESS); } async event void PromiscuousRx.enableRxDone() { post signalStartDoneTask(); } event message_t* PromiscuousRx.received(message_t *frame) { if (m_state == S_STARTED) { ((ieee154_header_t*) frame->header)->length |= FRAMECTL_PROMISCUOUS; return signal FrameRx.received(frame); } else return frame; } command error_t PromiscuousMode.stop() { error_t result = FAIL; if (m_state == S_STARTED) { m_state = S_STOPPING; call RadioOff.off(); result = SUCCESS; } dbg_serial("PromiscuousModeP", "PromiscuousMode.stop -> result: %lu\n", (uint32_t) result); return result; } task void continueStopTask() { call RadioPromiscuousMode.set(FALSE); m_state = S_STOPPED; call RadioToken.release(); dbg_serial("PromiscuousModeP", "Promiscuous mode disabled.\n"); signal PromiscuousMode.stopDone(SUCCESS); } async event void RadioOff.offDone() { if (m_state == S_STARTING) { call PromiscuousRx.enableRx(0, 0); } else post continueStopTask(); } async command token_requested_t IsRadioTokenRequested.getNow(){ return m_state == S_STARTING; } default event void PromiscuousMode.startDone(error_t error) {} default event void PromiscuousMode.stopDone(error_t error) {} async event void RadioToken.transferredFrom(uint8_t clientFrom){ASSERT(0);} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/README.txt000066400000000000000000000112341207233610700206210ustar00rootroot00000000000000 This directory contains "TKN15.4", a platform-independent IEEE 802.15.4-2006 MAC implementation. The core implementation is platform-independent, but in order to use the code on a TinyOS 2 platform, the platform must provide (1) a suitable radio driver, (2) Alarms/Timers with symbol precision and (3) some "platform glue" code (defining guard times, etc.). Currently the supported platforms are: telosb, shimmer2(r) and micaz (note: because these platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard -- 62.500 Hz, +-40 ppm in the 2.4 GHz band -- the timing in beacon-enabled mode is not fully standard compliant). The implementation also includes an AM layer, so it can be used underneath TinyOS routing protocols such as CTP (take a look at apps/tests/tkn154/README.txt). As of July 13, 2011 the MAC also includes the IEEE 802.15.4-2006 GTS services; this part of the implementation was contributed by CISTER/ISEP, Polytechnic Institute of Porto. Status (last updated Dec. 23, 2011) ----------------------------------- Missing functionality: - security services - PAN ID conflict notification/resolution - indirect transmissions: frames are not kept in transaction queue in case CSMA-CA algorithm fails Known Issues: - resetting the MAC during operation (via MLME_RESET) has not been sufficiently tested - if initial beacon Tx timestamp is invalid, the coordinator will hang - frame pending flags are (need to be) set in the ACK headers - transmitting coordinator realignment frames has not been tested - during an ongoing CSMA-CA transmission incoming frames are ignored - on a beacon-enabled PAN: if the device cannot find the beacon the DATA frame is not transmitted (but it should be transmitted using unslotted CSMA-CA, see Sect. 7.5.6.1 "Transmission") - ACK timestamps are invalid (relevant only in promiscuous mode) Implementation -------------- MAC implementation: tos/lib/mac/tkn154 MAC interfaces: tos/lib/mac/tkn154/interfaces CC2420 driver: tos/chips/cc2420_tkn154 TelosB "platform glue" code: tos/platforms/telosb/mac/tkn154 micaZ "platform glue" code: tos/platforms/micaz/mac/tkn154 (Shimmer2(r) platforms reuse the telosb configuration this is triggered via tos/lib/mac/tkn154/Makefile.include) Example applications: apps/tests/tkn154 Note: TEP3 recommends that interface names "should be mixed case, starting upper case". To match the syntax used in the IEEE 802.15.4 standard the interfaces provided by the MAC to the next higher layer deviate from this convention (they are all caps, e.g. MLME_START). Documentation ------------- A technical report on TKN15.4 is available here: http://www.tkn.tu-berlin.de/publications/papers/TKN154.pdf TKN15.4 is the basis for the implementation of the TinyOS 15.4 WG: http://www.tinyos.net/scoop/special/working_group_tinyos_154 Copyright --------- This work was supported by the European Commision within the 6th Framework Programme ICT Project ANGEL (Reference: 033506) and within the 7th Framework Programme ICT Project CONET (Reference: 224053). Author: Jan-Hinrich Hauer /* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/RadioClientC.nc000066400000000000000000000051001207233610700217400ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2009-05-14 13:20:35 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" generic configuration RadioClientC(uint8_t clientID) { provides { interface RadioOff; interface RadioRx; interface RadioTx; interface SlottedCsmaCa; interface UnslottedCsmaCa; interface TransferableResource as RadioToken; interface ResourceRequested as RadioTokenRequested; } } implementation { components RadioControlP; RadioRx = RadioControlP.RadioRx[clientID]; RadioTx = RadioControlP.RadioTx[clientID]; RadioOff = RadioControlP.RadioOff[clientID]; SlottedCsmaCa = RadioControlP.SlottedCsmaCa[clientID]; UnslottedCsmaCa = RadioControlP.UnslottedCsmaCa[clientID]; RadioToken = RadioControlP.TransferableResource[clientID]; RadioTokenRequested = RadioControlP.ResourceRequested[clientID]; } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/RadioControlImplP.nc000066400000000000000000000157241207233610700230160ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2010-01-05 16:41:16 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" module RadioControlImplP { provides { interface RadioRx as MacRx[uint8_t client]; interface RadioTx as MacTx[uint8_t client]; interface SlottedCsmaCa as SlottedCsmaCa[uint8_t client]; interface UnslottedCsmaCa as UnslottedCsmaCa[uint8_t client]; interface RadioOff as MacRadioOff[uint8_t client]; } uses { interface ArbiterInfo; interface RadioRx as PhyRx; interface RadioTx as PhyTx; interface SlottedCsmaCa as PhySlottedCsmaCa; interface UnslottedCsmaCa as PhyUnslottedCsmaCa; interface RadioOff as PhyRadioOff; interface Get as RadioPromiscuousMode; interface Leds; } } implementation { /* ----------------------- RadioRx ----------------------- */ async command error_t MacRx.enableRx[uint8_t client](uint32_t t0, uint32_t dt) { if (client == call ArbiterInfo.userId()) return call PhyRx.enableRx(t0, dt); else { ASSERT(0); return IEEE154_TRANSACTION_OVERFLOW; } } async event void PhyRx.enableRxDone() { signal MacRx.enableRxDone[call ArbiterInfo.userId()](); } event message_t* PhyRx.received(message_t *msg) { uint8_t *mhr = MHR(msg); dbg_serial("RadioControlImplP", "Received frame, DSN: %lu, type: 0x%lu\n", (uint32_t) mhr[MHR_INDEX_SEQNO], (uint32_t) mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK); if (((mhr[1] & FC2_FRAME_VERSION_MASK) > FC2_FRAME_VERSION_1) && (!call RadioPromiscuousMode.get())) return msg; #ifndef IEEE154_SECURITY_ENABLED if ((mhr[0] & FC1_SECURITY_ENABLED) && (!call RadioPromiscuousMode.get())) return msg; #endif return signal MacRx.received[call ArbiterInfo.userId()](msg); } async command bool MacRx.isReceiving[uint8_t client]() { if (client == call ArbiterInfo.userId()) return call PhyRx.isReceiving(); else { ASSERT(0); return FAIL; } } default async event void MacRx.enableRxDone[uint8_t client]() { ASSERT(0); } default event message_t* MacRx.received[uint8_t client](message_t *frame) { ASSERT(0); return frame; } /* ----------------------- RadioTx ----------------------- */ async command error_t MacTx.transmit[uint8_t client](ieee154_txframe_t *frame, uint32_t t0, uint32_t dt) { if (client == call ArbiterInfo.userId()) return call PhyTx.transmit(frame, t0, dt); else { ASSERT(0); return IEEE154_TRANSACTION_OVERFLOW; } } async event void PhyTx.transmitDone(ieee154_txframe_t *frame, error_t result) { signal MacTx.transmitDone[call ArbiterInfo.userId()](frame, result); } default async event void MacTx.transmitDone[uint8_t client](ieee154_txframe_t *frame, error_t result) { ASSERT(0); } /* ----------------------- Unslotted CSMA ----------------------- */ async command error_t UnslottedCsmaCa.transmit[uint8_t client](ieee154_txframe_t *frame, ieee154_csma_t *csma) { if (client == call ArbiterInfo.userId()) return call PhyUnslottedCsmaCa.transmit(frame, csma); else { ASSERT(0); return IEEE154_TRANSACTION_OVERFLOW; } } async event void PhyUnslottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result) { signal UnslottedCsmaCa.transmitDone[call ArbiterInfo.userId()]( frame, csma, ackPendingFlag, result); } default async event void UnslottedCsmaCa.transmitDone[uint8_t client]( ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result) { ASSERT(0); } /* ----------------------- Slotted CSMA ----------------------- */ async command error_t SlottedCsmaCa.transmit[uint8_t client](ieee154_txframe_t *frame, ieee154_csma_t *csma, uint32_t slot0Time, uint32_t dtMax, bool resume, uint16_t remainingBackoff) { if (client == call ArbiterInfo.userId()) return call PhySlottedCsmaCa.transmit(frame, csma, slot0Time, dtMax, resume, remainingBackoff); else { ASSERT(0); return IEEE154_TRANSACTION_OVERFLOW; } } async event void PhySlottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, uint16_t remainingBackoff, error_t result) { signal SlottedCsmaCa.transmitDone[call ArbiterInfo.userId()]( frame, csma, ackPendingFlag, remainingBackoff, result); } default async event void SlottedCsmaCa.transmitDone[uint8_t client]( ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, uint16_t remainingBackoff, error_t result) { ASSERT(0); } /* ----------------------- RadioOff ----------------------- */ async command error_t MacRadioOff.off[uint8_t client]() { if (client == call ArbiterInfo.userId()) return call PhyRadioOff.off(); else { ASSERT(0); return EBUSY; } } async event void PhyRadioOff.offDone() { signal MacRadioOff.offDone[call ArbiterInfo.userId()](); } async command bool MacRadioOff.isOff[uint8_t client]() { if (client == call ArbiterInfo.userId()) return call PhyRadioOff.isOff(); else return EBUSY; } default async event void MacRadioOff.offDone[uint8_t client]() { ASSERT(0); } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/RadioControlP.nc000066400000000000000000000070001207233610700221600ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-24 12:56:46 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" configuration RadioControlP { provides { interface RadioRx as RadioRx[uint8_t client]; interface RadioTx as RadioTx[uint8_t client]; interface SlottedCsmaCa as SlottedCsmaCa[uint8_t client]; interface UnslottedCsmaCa as UnslottedCsmaCa[uint8_t client]; interface RadioOff as RadioOff[uint8_t client]; interface TransferableResource[uint8_t id]; interface ResourceRequested[uint8_t id]; } uses { interface RadioRx as PhyRx; interface RadioTx as PhyTx; interface SlottedCsmaCa as PhySlottedCsmaCa; interface UnslottedCsmaCa as PhyUnslottedCsmaCa; interface RadioOff as PhyRadioOff; interface Get as RadioPromiscuousMode; interface ResourceConfigure[uint8_t id]; interface Leds; } } implementation { components RadioControlImplP; RadioRx = RadioControlImplP.MacRx; RadioTx = RadioControlImplP.MacTx; SlottedCsmaCa = RadioControlImplP.SlottedCsmaCa; UnslottedCsmaCa = RadioControlImplP.UnslottedCsmaCa; RadioOff = RadioControlImplP.MacRadioOff; PhyRx = RadioControlImplP.PhyRx; PhyTx = RadioControlImplP.PhyTx; PhySlottedCsmaCa = RadioControlImplP.PhySlottedCsmaCa; PhyUnslottedCsmaCa = RadioControlImplP.PhyUnslottedCsmaCa; PhyRadioOff = RadioControlImplP.PhyRadioOff; RadioPromiscuousMode = RadioControlImplP; Leds = RadioControlImplP; components MainC; components new RoundRobinResourceQueueC(uniqueCount(IEEE802154_RADIO_RESOURCE)) as Queue; components new SimpleTransferArbiterP() as Arbiter; MainC.SoftwareInit -> Queue; TransferableResource = Arbiter; ResourceRequested = Arbiter; RadioControlImplP.ArbiterInfo -> Arbiter; ResourceConfigure = Arbiter; Arbiter.Queue -> Queue; } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/RxEnableP.nc000066400000000000000000000157361207233610700213000ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2009-03-04 18:31:29 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" module RxEnableP { provides { interface Init as Reset; interface MLME_RX_ENABLE; interface GetNow as IsRxEnableActive; interface Notify as RxEnableStateChange; } uses { interface Timer as RxEnableTimer; interface Get as IsMacPanCoordinator; interface SuperframeStructure as IncomingSuperframeStructure; interface SuperframeStructure as OutgoingSuperframeStructure; interface GetNow as IsTrackingBeacons; interface GetNow as IsSendingBeacons; interface Notify as WasRxEnabled; interface TimeCalc; } } implementation { uint32_t m_rxOnDuration; uint32_t m_rxOnOffset; uint32_t m_rxOnAnchor; norace bool m_isRxEnabled; bool m_confirmPending; command error_t Reset.init() { if (m_confirmPending) { m_confirmPending = FALSE; signal MLME_RX_ENABLE.confirm(IEEE154_SUCCESS); } m_isRxEnabled = FALSE; call RxEnableTimer.stop(); return SUCCESS; } /* ----------------------- MLME-RX-ENABLE ----------------------- */ command ieee154_status_t MLME_RX_ENABLE.request ( bool DeferPermit, uint32_t RxOnTime, uint32_t RxOnDuration) { ieee154_status_t status = IEEE154_SUCCESS; uint32_t lastBeaconTime=0; uint32_t beaconInterval=0; if (m_confirmPending) status = IEEE154_TRANSACTION_OVERFLOW; else if (IEEE154_BEACON_ENABLED_PAN && RxOnTime > 0xFFFFFF) status = IEEE154_INVALID_PARAMETER; else if (RxOnDuration > 0xFFFFFF) status = IEEE154_INVALID_PARAMETER; else if (IEEE154_BEACON_ENABLED_PAN) { if (call IsSendingBeacons.getNow() && call IsMacPanCoordinator.get()) { // for OUTGOING SUPERFRAME lastBeaconTime = call OutgoingSuperframeStructure.sfStartTime(); beaconInterval = call OutgoingSuperframeStructure.sfSlotDuration() * 16; } else if (call IsTrackingBeacons.getNow()) { // for INCOMING SUPERFRAME lastBeaconTime = call IncomingSuperframeStructure.sfStartTime(); beaconInterval = call IncomingSuperframeStructure.sfSlotDuration() * 16; } if (beaconInterval == 0) status = IEEE154_PAST_TIME; // we're not even sending/receiving beacons else if (RxOnTime+RxOnDuration >= beaconInterval) status = IEEE154_ON_TIME_TOO_LONG; else if (call TimeCalc.hasExpired(lastBeaconTime, RxOnTime - IEEE154_aTurnaroundTime)) { if (!DeferPermit) status = IEEE154_PAST_TIME; else { // defer to next beacon RxOnTime += beaconInterval; } } if (status == IEEE154_SUCCESS) { m_rxOnAnchor = lastBeaconTime; m_rxOnOffset = RxOnTime; } } else { // this is a nonbeacon-enabled PAN m_rxOnAnchor = call RxEnableTimer.getNow(); m_rxOnOffset = 0; } if (status == IEEE154_SUCCESS) { m_rxOnDuration = RxOnDuration; m_isRxEnabled = FALSE; m_confirmPending = TRUE; call RxEnableTimer.startOneShotAt(m_rxOnAnchor, m_rxOnOffset); signal RxEnableStateChange.notify(TRUE); } dbg_serial("RxEnableP", "MLME_RX_ENABLE.request -> result: %lu\n", (uint32_t) status); return status; } event void RxEnableTimer.fired() { if (!m_isRxEnabled) { m_isRxEnabled = TRUE; call RxEnableTimer.startOneShotAt(m_rxOnAnchor, m_rxOnOffset + m_rxOnDuration); } else { m_isRxEnabled = FALSE; if (m_confirmPending) { // this means we tried to enable rx, but never succeeded, because // there were "other responsibilities" - but is SUCCESS really // an appropriate error code in this case? m_confirmPending = FALSE; dbg_serial("RxEnableP", "never actually managed to switch to Rx mode\n"); signal MLME_RX_ENABLE.confirm(IEEE154_SUCCESS); } } signal RxEnableStateChange.notify(TRUE); dbg_serial_flush(); } async command bool IsRxEnableActive.getNow() { return m_isRxEnabled; } event void WasRxEnabled.notify(bool val) { if (m_isRxEnabled && m_confirmPending) { m_confirmPending = FALSE; signal MLME_RX_ENABLE.confirm(IEEE154_SUCCESS); } dbg_serial("RxEnableP", "Radio is now (%lu) in Rx\n", (uint32_t) call RxEnableTimer.getNow()); dbg_serial_flush(); } command error_t RxEnableStateChange.enable() {return FAIL;} command error_t RxEnableStateChange.disable() {return FAIL;} default event void MLME_RX_ENABLE.confirm(ieee154_status_t status) {} default async command uint32_t IncomingSuperframeStructure.sfStartTime() {return 0;} default async command uint32_t IncomingSuperframeStructure.sfSlotDuration() {return 0;} default async command uint32_t OutgoingSuperframeStructure.sfStartTime() {return 0;} default async command uint32_t OutgoingSuperframeStructure.sfSlotDuration() {return 0;} default async command bool IsTrackingBeacons.getNow() { return FALSE;} default async command bool IsSendingBeacons.getNow() { return FALSE;} default command ieee154_macPanCoordinator_t IsMacPanCoordinator.get() { return FALSE;} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/ScanP.nc000066400000000000000000000425141207233610700204560ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.12 $ * $Date: 2009-06-02 08:40:12 $ * @author Jan Hauer * ======================================================================== */ /** * This module is responsible for channel scanning. */ #include "TKN154_MAC.h" module ScanP { provides { interface Init; interface MLME_SCAN; interface MLME_BEACON_NOTIFY; interface GetNow as IsRadioTokenRequested; } uses { interface MLME_GET; interface MLME_SET; interface EnergyDetection; interface RadioOff; interface RadioRx; interface RadioTx; interface IEEE154Frame as Frame; interface IEEE154BeaconFrame as BeaconFrame; interface Timer as ScanTimer; interface Pool as TxFramePool; interface Pool as TxControlPool; interface TransferableResource as RadioToken; interface FrameUtility; interface Leds; } } implementation { enum { MAX_PAYLOAD_SIZE = 1, LAST_CHANNEL = 26, }; #define INVALID_CHANNEL_BITMASK 0xFC000000L ieee154_txframe_t *m_txFrame = NULL; uint8_t m_payload[MAX_PAYLOAD_SIZE]; uint8_t m_scanType; uint32_t m_scanChannels; norace uint8_t m_currentChannelNum; bool m_terminateScan; void* m_resultList; uint8_t m_resultListNumEntries; uint8_t m_resultIndex; ieee154_macPANId_t m_PANID; norace uint32_t m_scanDuration; norace bool m_busy = FALSE; void nextIteration(); void continueScanRequest(); task void startTimerTask(); task void nextIterationTask(); command error_t Init.init() { // triggered by MLME_RESET; Note: Init will not be called // while this component owns the RadioToken, so the worst case is // that a MLME_SCAN was accepted (returned IEEE154_SUCCESS) // but the RadioToken.granted() has not been signalled if (m_busy) { m_terminateScan = TRUE; nextIteration(); // signals confirm and resets state } return SUCCESS; } /* ----------------------- MLME-SCAN ----------------------- */ /* "The MLME-SCAN.request primitive is used to initiate a channel scan over a * given list of channels. A device can use a channel scan to measure the * energy on the channel, search for the coordinator with which it associated, * or search for all coordinators transmitting beacon frames within the POS of * the scanning device." (IEEE 802.15.4-2006 Sect. 7.1.11.1) **/ command ieee154_status_t MLME_SCAN.request ( uint8_t ScanType, uint32_t ScanChannels, uint8_t ScanDuration, uint8_t ChannelPage, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList, ieee154_security_t *security) { ieee154_status_t status = IEEE154_SUCCESS; ieee154_phyChannelsSupported_t supportedChannels = call MLME_GET.phyChannelsSupported(); ieee154_txcontrol_t *txControl = NULL; if (m_busy) { status = IEEE154_SCAN_IN_PROGRESS; } else if (security && security->SecurityLevel) { status = IEEE154_UNSUPPORTED_SECURITY; } if ((ScanType > 3) || (ScanType < 3 && ScanDuration > 14) || (ChannelPage != IEEE154_SUPPORTED_CHANNELPAGE) || !(supportedChannels & ScanChannels) || ((ScanType != ORPHAN_SCAN) && ((EnergyDetectListNumEntries && PANDescriptorListNumEntries) || (EnergyDetectList != NULL && PANDescriptorList != NULL) || (EnergyDetectListNumEntries && EnergyDetectList == NULL) || (PANDescriptorListNumEntries && PANDescriptorList == NULL)))) { status = IEEE154_INVALID_PARAMETER; } else if ((ScanType == ACTIVE_SCAN || ScanType == ORPHAN_SCAN) && ((m_txFrame = call TxFramePool.get()) == NULL)) { status = IEEE154_TRANSACTION_OVERFLOW; } else if ((ScanType == ACTIVE_SCAN || ScanType == ORPHAN_SCAN) && ((txControl = call TxControlPool.get()) == NULL)) { call TxFramePool.put(m_txFrame); m_txFrame = NULL; status = IEEE154_TRANSACTION_OVERFLOW; } else { if (m_txFrame != NULL){ m_txFrame->header = &txControl->header; m_txFrame->payload = m_payload; m_txFrame->metadata = &txControl->metadata; } m_busy = TRUE; m_scanType = ScanType; m_scanChannels = ScanChannels; m_scanDuration = (((uint32_t) 1 << ScanDuration) + 1) * IEEE154_aBaseSuperframeDuration; m_PANID = call MLME_GET.macPANId(); m_currentChannelNum = 0; m_terminateScan = FALSE; m_resultIndex = 0; if (ScanType == ENERGY_DETECTION_SCAN) { m_resultList = EnergyDetectList; m_resultListNumEntries = EnergyDetectListNumEntries; } else { m_resultList = PANDescriptorList; m_resultListNumEntries = PANDescriptorListNumEntries; } if (m_resultList == NULL) m_resultListNumEntries = 0; call RadioToken.request(); } dbg_serial("ScanP", "MLME_SCAN.request -> result: %lu\n", (uint32_t) status); return status; } event void RadioToken.granted() { if (call RadioOff.isOff()) continueScanRequest(); else { error_t e = call RadioOff.off(); ASSERT(e == SUCCESS); } // will continue in continueScanRequest() } task void continueScanRequestTask() { continueScanRequest(); } void continueScanRequest() { uint8_t i; ieee154_macPANId_t bcastPANID = 0xFFFF; ieee154_macDSN_t dsn = call MLME_GET.macDSN(); if (!m_busy) { call RadioToken.release(); return; } switch (m_scanType) { case ACTIVE_SCAN: // beacon request frame m_txFrame->header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_CMD; m_txFrame->header->mhr[MHR_INDEX_FC2] = FC2_DEST_MODE_SHORT; m_txFrame->header->mhr[MHR_INDEX_SEQNO] = dsn; call MLME_SET.macDSN(dsn+1); for (i=0; i<4; i++) // broadcast dest PAN ID + broadcast dest addr m_txFrame->header->mhr[MHR_INDEX_ADDRESS + i] = 0xFF; m_txFrame->headerLen = 7; m_payload[0] = CMD_FRAME_BEACON_REQUEST; m_txFrame->payloadLen = 1; // fall through case PASSIVE_SCAN: call MLME_SET.macPANId(bcastPANID); break; case ORPHAN_SCAN: // orphan notification frame m_scanDuration = call MLME_GET.macResponseWaitTime() * IEEE154_aBaseSuperframeDuration; m_txFrame->header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_CMD | FC1_PAN_ID_COMPRESSION; m_txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED | FC2_DEST_MODE_SHORT; m_txFrame->header->mhr[MHR_INDEX_SEQNO] = dsn; call MLME_SET.macDSN(dsn+1); for (i=0; i<4; i++) // broadcast dest PAN ID + broadcast dest addr m_txFrame->header->mhr[MHR_INDEX_ADDRESS + i] = 0xFF; call FrameUtility.copyLocalExtendedAddressLE((uint8_t*) &(m_txFrame->header->mhr[MHR_INDEX_ADDRESS + i])); m_txFrame->headerLen = 15; m_payload[0] = CMD_FRAME_ORPHAN_NOTIFICATION; m_txFrame->payloadLen = 1; break; } nextIteration(); } void nextIteration() { ieee154_phyChannelsSupported_t supportedChannels = call MLME_GET.phyChannelsSupported(); uint32_t currentChannelBit = (uint32_t) 1 << m_currentChannelNum; error_t radioStatus = SUCCESS; if (!m_terminateScan){ while (m_currentChannelNum <= LAST_CHANNEL && !(m_scanChannels & currentChannelBit & supportedChannels)){ m_currentChannelNum++; currentChannelBit <<= 1; } } if (m_currentChannelNum <= LAST_CHANNEL && !m_terminateScan) { // scan the next channel call MLME_SET.phyCurrentChannel(m_currentChannelNum); dbg_serial("ScanP", "Scanning channel %lu...\n", (uint32_t) m_currentChannelNum); switch (m_scanType) { case PASSIVE_SCAN: radioStatus = call RadioRx.enableRx(0, 0); break; case ACTIVE_SCAN: // fall through case ORPHAN_SCAN: radioStatus = call RadioTx.transmit(m_txFrame, 0, 0); break; case ENERGY_DETECTION_SCAN: radioStatus = call EnergyDetection.start(m_scanDuration); break; } ASSERT(radioStatus == SUCCESS); } else { // we're done ieee154_status_t result = IEEE154_SUCCESS; uint32_t unscannedChannels = 0; if (m_terminateScan){ // Scan operation terminated because the max. // number of PAN descriptors/ED samples was reached. // Check if there are channels that were unscanned. // In active/passive scan we consider a channel // unscanned if it was not completely scanned. if (m_scanType == PASSIVE_SCAN || m_scanType == ACTIVE_SCAN) currentChannelBit >>= 1; // last (partially) scanned channel while (!(currentChannelBit & INVALID_CHANNEL_BITMASK) && (m_scanChannels & currentChannelBit)){ unscannedChannels |= currentChannelBit; currentChannelBit <<= 1; } if (unscannedChannels) // some channels were not (completely) scanned result = IEEE154_LIMIT_REACHED; } else if (m_scanType != ENERGY_DETECTION_SCAN && !m_resultIndex) result = IEEE154_NO_BEACON; if (m_scanType == PASSIVE_SCAN || m_scanType == ACTIVE_SCAN) call MLME_SET.macPANId(m_PANID); if (m_txFrame != NULL) { call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) m_txFrame->header - offsetof(ieee154_txcontrol_t, header))); call TxFramePool.put(m_txFrame); } m_txFrame = NULL; if (call RadioToken.isOwner()) call RadioToken.release(); m_busy = FALSE; dbg_serial("ScanP", "MLME_SCAN.confirm()\n"); signal MLME_SCAN.confirm ( result, m_scanType, IEEE154_SUPPORTED_CHANNELPAGE, unscannedChannels, (m_scanType == ENERGY_DETECTION_SCAN) ? m_resultIndex : 0, (m_scanType == ENERGY_DETECTION_SCAN) ? (int8_t*) m_resultList : NULL, ((m_scanType == ACTIVE_SCAN || m_scanType == PASSIVE_SCAN) && call MLME_GET.macAutoRequest()) ? m_resultIndex : 0, ((m_scanType == ACTIVE_SCAN || m_scanType == PASSIVE_SCAN) && call MLME_GET.macAutoRequest()) ? (ieee154_PANDescriptor_t*) m_resultList : NULL); } dbg_serial_flush(); } async event void RadioRx.enableRxDone() { post startTimerTask(); } /* ----------------------- EnergyDetection ----------------------- */ event void EnergyDetection.done(error_t status, int8_t EnergyLevel) { if (status == SUCCESS && m_resultListNumEntries) ((uint8_t*) m_resultList)[m_resultIndex++] = EnergyLevel; if (m_resultIndex == m_resultListNumEntries) m_terminateScan = TRUE; // done if (call RadioOff.off() == EALREADY) signal RadioOff.offDone(); } /* ----------------------- Active/Orphan scan ----------------------- */ async event void RadioTx.transmitDone(ieee154_txframe_t *frame, error_t result) { error_t e = call RadioRx.enableRx(0, 0); ASSERT(e == SUCCESS); } /* -------- Receive events (for Active/Passive/Orphan scan) -------- */ event message_t* RadioRx.received(message_t *frame) { if (!m_busy) return frame; if (m_scanType == ORPHAN_SCAN) { uint8_t *payload = call Frame.getPayload(frame); if (!m_resultIndex) if ((MHR(frame)[0] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_CMD && payload[0] == CMD_FRAME_COORDINATOR_REALIGNMENT) { // Sect. 7.5.4.3: "the device shall update its MAC PIB with the PAN // information contained in the coordinator realignment command" call MLME_SET.macPANId( *((nxle_uint16_t*) &payload[1]) ); call MLME_SET.macCoordShortAddress( *((nxle_uint16_t*) &payload[3]) ); call MLME_SET.phyCurrentChannel( *((nxle_uint16_t*) &payload[5]) ); call MLME_SET.macShortAddress( *((nxle_uint16_t*) &payload[6]) ); m_resultIndex++; dbg_serial("ScanP", "Received coordinator realignment frame.\n"); m_terminateScan = TRUE; call ScanTimer.stop(); call RadioOff.off(); } } else if ((((ieee154_header_t*) frame->header)->mhr[0] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_BEACON) { // PASSIVE_SCAN / ACTIVE_SCAN: // A beacon frame containing a non-empty payload is always signalled // to the next higher layer (regardless of the value of macAutoRequest); // when macAutoRequest is set to TRUE, then the beacon is always // stored in the PAN Descriptor list (see 7.1.11.2.1 - Table 68) if (!call MLME_GET.macAutoRequest()) return signal MLME_BEACON_NOTIFY.indication (frame); else if (m_resultIndex >= m_resultListNumEntries) { m_terminateScan = TRUE; call ScanTimer.stop(); call RadioOff.off(); } else if (call BeaconFrame.parsePANDescriptor( frame, m_currentChannelNum, IEEE154_SUPPORTED_CHANNELPAGE, &((ieee154_PANDescriptor_t*) m_resultList)[m_resultIndex]) == SUCCESS) { // check uniqueness: PAN ID and source address must // not be found in a previously received beacon uint8_t i; ieee154_PANDescriptor_t* descriptor = (ieee154_PANDescriptor_t*) m_resultList; dbg_serial("ScanP", "Received beacon, source: 0x%lx, channel: %lu.\n", (uint32_t) descriptor[m_resultIndex].CoordAddress.shortAddress, (uint32_t) m_currentChannelNum); for (i=0; i 0) return signal MLME_BEACON_NOTIFY.indication (frame); } // PASSIVE_SCAN / ACTIVE_SCAN return frame; } /* ----------------------- Common ----------------------- */ task void startTimerTask() { call ScanTimer.startOneShot(m_scanDuration); } event void ScanTimer.fired() { if (call RadioToken.isOwner()) call RadioOff.off(); } async event void RadioOff.offDone() { if (m_currentChannelNum == 0) post continueScanRequestTask(); else { m_currentChannelNum++; post nextIterationTask(); } } task void nextIterationTask() { nextIteration(); } async command token_requested_t IsRadioTokenRequested.getNow(){ return m_busy;} async event void RadioToken.transferredFrom(uint8_t id){ ASSERT(0);} default event message_t* MLME_BEACON_NOTIFY.indication (message_t *beaconFrame) {return beaconFrame;} default event void MLME_SCAN.confirm ( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList) {} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc000066400000000000000000000135771207233610700240500ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Please refer to TEP 108 for more information about this component and its * intended use.

      * * This component provides the Resource, ArbiterInfo, and ResourceRequested * interfaces and uses the ResourceConfigure interface as * described in TEP 108. It provides arbitration to a shared resource. * An queue is used to keep track of which users have put * in requests for the resource. Upon the release of the resource by one * of these users, the queue is checked and the next user * that has a pending request will ge granted control of the resource. If * there are no pending requests, then the resource becomes idle and any * user can put in a request and immediately receive access to the * Resource. * * @author Kevin Klues (klues@tkn.tu-berlin.de) * @author Philip Levis * @author: Jan Hauer (added TransferableResource interface) */ generic module SimpleTransferArbiterP() { provides { interface TransferableResource as Resource[uint8_t id]; interface ResourceRequested[uint8_t id]; interface ArbiterInfo; } uses { interface ResourceConfigure[uint8_t id]; interface ResourceQueue as Queue; } } implementation { enum {RES_IDLE = 0, RES_GRANTING = 1, RES_BUSY = 2}; enum {NO_RES = 0xFF}; uint8_t state = RES_IDLE; norace uint8_t resId = NO_RES; norace uint8_t reqResId; task void grantedTask(); async command error_t Resource.request[uint8_t id]() { signal ResourceRequested.requested[resId](); atomic { if(state == RES_IDLE) { state = RES_GRANTING; reqResId = id; post grantedTask(); return SUCCESS; } return call Queue.enqueue(id); } } async command error_t Resource.immediateRequest[uint8_t id]() { signal ResourceRequested.immediateRequested[resId](); atomic { if(state == RES_IDLE) { state = RES_BUSY; resId = id; call ResourceConfigure.configure[resId](); return SUCCESS; } return FAIL; } } async command error_t Resource.release[uint8_t id]() { bool released = FALSE; atomic { if(state == RES_BUSY && resId == id) { if(call Queue.isEmpty() == FALSE) { reqResId = call Queue.dequeue(); state = RES_GRANTING; post grantedTask(); } else { resId = NO_RES; state = RES_IDLE; } released = TRUE; } } if(released == TRUE) { call ResourceConfigure.unconfigure[id](); return SUCCESS; } return FAIL; } async command error_t Resource.transferTo[uint8_t fromID](uint8_t toID) { atomic { if (call ArbiterInfo.userId() == fromID) { call ResourceConfigure.unconfigure[fromID](); call ResourceConfigure.configure[resId](); resId = toID; signal Resource.transferredFrom[toID](fromID); // consider moving this outside the atomic return SUCCESS; } } return FAIL; } /** Check if the Resource is currently in use */ async command bool ArbiterInfo.inUse() { atomic { if (state == RES_IDLE) return FALSE; } return TRUE; } /** Returns the current user of the Resource. If there is no current user, the return value will be 0xFF */ async command uint8_t ArbiterInfo.userId() { atomic { if(state != RES_BUSY) return NO_RES; return resId; } } /** * Returns whether you are the current owner of the resource or not */ async command bool Resource.isOwner[uint8_t id]() { atomic { if(resId == id && state == RES_BUSY) return TRUE; else return FALSE; } } task void grantedTask() { atomic { resId = reqResId; state = RES_BUSY; } call ResourceConfigure.configure[resId](); signal Resource.granted[resId](); } //Default event/command handlers default event void Resource.granted[uint8_t id]() { } default async event void ResourceRequested.requested[uint8_t id]() { } default async event void ResourceRequested.immediateRequested[uint8_t id]() { } default async command void ResourceConfigure.configure[uint8_t id]() { } default async command void ResourceConfigure.unconfigure[uint8_t id]() { } default async event void Resource.transferredFrom[uint8_t id](uint8_t c) { } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/TKN154.h000066400000000000000000000302361207233610700201650ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-09-14 12:17:18 $ * @author Jan Hauer * ======================================================================== */ #ifndef __TKN154_H #define __TKN154_H /**************************************************** * IEEE 802.15.4 Enumerations */ typedef enum ieee154_status { IEEE154_SUCCESS = 0x00, IEEE154_BEACON_LOSS = 0xE0, IEEE154_CHANNEL_ACCESS_FAILURE = 0xE1, IEEE154_COUNTER_ERROR = 0xDB, IEEE154_DENIED = 0xE2, IEEE154_DISABLE_TRX_FAILURE = 0xE3, IEEE154_FRAME_TOO_LONG = 0xE5, IEEE154_IMPROPER_KEY_TYPE = 0xDC, IEEE154_IMPROPER_SECURITY_LEVEL = 0xDD, IEEE154_INVALID_ADDRESS = 0xF5, IEEE154_INVALID_GTS = 0xE6, IEEE154_INVALID_HANDLE = 0xE7, IEEE154_INVALID_INDEX = 0xF9, IEEE154_INVALID_PARAMETER = 0xE8, IEEE154_LIMIT_REACHED = 0xFA, IEEE154_NO_ACK = 0xE9, IEEE154_NO_BEACON = 0xEA, IEEE154_NO_DATA = 0xEB, IEEE154_NO_SHORT_ADDRESS = 0xEC, IEEE154_ON_TIME_TOO_LONG = 0xF6, IEEE154_OUT_OF_CAP = 0xED, IEEE154_PAN_ID_CONFLICT = 0xEE, IEEE154_PAST_TIME = 0xF7, IEEE154_READ_ONLY = 0xFB, IEEE154_REALIGNMENT = 0xEF, IEEE154_SCAN_IN_PROGRESS = 0xFC, IEEE154_SECURITY_ERROR = 0xE4, //FAILED_SECURITY_CHECK = 0xE4 //802.15.4_2003 IEEE154_SUPERFRAME_OVERLAP = 0xFD, IEEE154_TRACKING_OFF = 0xF8, IEEE154_TRANSACTION_EXPIRED = 0xF0, IEEE154_TRANSACTION_OVERFLOW = 0xF1, IEEE154_TX_ACTIVE = 0xF2, IEEE154_UNAVAILABLE_KEY = 0xF3, IEEE154_UNSUPPORTED_ATTRIBUTE = 0xF4, IEEE154_UNSUPPORTED_LEGACY = 0xDE, IEEE154_UNSUPPORTED_SECURITY = 0xDF, IEEE154_PURGED = 0xDA, // custom attribute } ieee154_status_t; typedef enum ieee154_association_status { IEEE154_ASSOCIATION_SUCCESSFUL = 0x00, IEEE154_PAN_AT_CAPACITY = 0x01, IEEE154_ACCESS_DENIED = 0x02 } ieee154_association_status_t; typedef enum ieee154_disassociation_reason { IEEE154_COORDINATOR_WISHES_DEVICE_TO_LEAVE = 0x01, IEEE154_DEVICE_WISHES_TO_LEAVE = 0x02 } ieee154_disassociation_reason_t; typedef union ieee154_address { // Whether this is a short or extended address // depends on the respective addressing mode uint16_t shortAddress; uint64_t extendedAddress; } ieee154_address_t; typedef struct ieee154_security { // Whether the first 0, 4 or 8 byte of KeySource // are valid depends on the KeyIdMode parameter uint8_t SecurityLevel; uint8_t KeyIdMode; uint8_t KeySource[8]; uint8_t KeyIndex; } ieee154_security_t; typedef nx_struct { nxle_uint8_t AlternatePANCoordinator :1; nxle_uint8_t DeviceType :1; nxle_uint8_t PowerSource :1; nxle_uint8_t ReceiverOnWhenIdle :1; nxle_uint8_t Reserved :2; nxle_uint8_t SecurityCapability :1; nxle_uint8_t AllocateAddress :1; } ieee154_CapabilityInformation_t; typedef nx_struct { nxle_uint8_t BeaconOrder :4; nxle_uint8_t SuperframeOrder :4; nxle_uint8_t FinalCAPSlot :4; nxle_uint8_t BatteryLifeExtension :1; nxle_uint8_t Reserved :1; nxle_uint8_t PANCoordinator :1; nxle_uint8_t AssociationPermit :1; } ieee154_SuperframeSpec_t; typedef struct ieee154_PANDescriptor { uint8_t CoordAddrMode; uint16_t CoordPANId; ieee154_address_t CoordAddress; uint8_t LogicalChannel; uint8_t ChannelPage; ieee154_SuperframeSpec_t SuperframeSpec; bool GTSPermit; uint8_t LinkQuality; uint32_t TimeStamp; ieee154_status_t SecurityFailure; uint8_t SecurityLevel; uint8_t KeyIdMode; uint64_t KeySource; uint8_t KeyIndex; } ieee154_PANDescriptor_t; enum { // Values for the PANType parameter of the MLME_RESET.request primitive BEACON_ENABLED_PAN, NONBEACON_ENABLED_PAN, // Values for the TxOptions parameter of MCPS_DATA.request() TX_OPTIONS_ACK = 0x01, TX_OPTIONS_GTS = 0x02, TX_OPTIONS_INDIRECT = 0x04, // Values for Destination/Source Addressing Mode (MCPS_DATA.request(), etc.) ADDR_MODE_NOT_PRESENT = 0x00, ADDR_MODE_RESERVED = 0x01, ADDR_MODE_SHORT_ADDRESS = 0x02, ADDR_MODE_EXTENDED_ADDRESS = 0x03, // ScanType parameter for MLME-SCAN primitive ENERGY_DETECTION_SCAN = 0x00, ACTIVE_SCAN = 0x01, PASSIVE_SCAN = 0x02, ORPHAN_SCAN = 0x03, // Frame types FRAMETYPE_BEACON = 0x00, FRAMETYPE_DATA = 0x01, FRAMETYPE_ACK = 0x02, FRAMETYPE_CMD = 0x03, }; /**************************************************** * typedefs PIB value types */ typedef uint8_t ieee154_phyCurrentChannel_t; typedef uint32_t ieee154_phyChannelsSupported_t; typedef uint8_t ieee154_phyTransmitPower_t; typedef uint8_t ieee154_phyCCAMode_t; typedef uint8_t ieee154_phyCurrentPage_t; typedef uint16_t ieee154_phyMaxFrameDuration_t; typedef uint8_t ieee154_phySHRDuration_t; typedef uint8_t ieee154_phySymbolsPerOctet_t; typedef uint8_t ieee154_macAckWaitDuration_t; typedef bool ieee154_macAssociatedPANCoord_t; typedef bool ieee154_macAssociationPermit_t; typedef bool ieee154_macAutoRequest_t; typedef bool ieee154_macBattLifeExt_t; typedef uint8_t ieee154_macBattLifeExtPeriods_t; typedef uint8_t* ieee154_macBeaconPayload_t; typedef uint8_t ieee154_macBeaconPayloadLength_t; typedef uint8_t ieee154_macBeaconOrder_t; typedef uint32_t ieee154_macBeaconTxTime_t; typedef uint8_t ieee154_macBSN_t; typedef uint64_t ieee154_macCoordExtendedAddress_t; typedef uint16_t ieee154_macCoordShortAddress_t; typedef uint8_t ieee154_macDSN_t; typedef bool ieee154_macGTSPermit_t; typedef uint8_t ieee154_macMaxBE_t; typedef uint8_t ieee154_macMaxCSMABackoffs_t; typedef uint32_t ieee154_macMaxFrameTotalWaitTime_t; typedef uint8_t ieee154_macMaxFrameRetries_t; typedef uint8_t ieee154_macMinBE_t; typedef uint8_t ieee154_macMinLIFSPeriod_t; typedef uint8_t ieee154_macMinSIFSPeriod_t; typedef uint16_t ieee154_macPANId_t; typedef bool ieee154_macPromiscuousMode_t; typedef uint8_t ieee154_macResponseWaitTime_t; typedef bool ieee154_macRxOnWhenIdle_t; typedef bool ieee154_macSecurityEnabled_t; typedef uint16_t ieee154_macShortAddress_t; typedef uint8_t ieee154_macSuperframeOrder_t; typedef uint16_t ieee154_macSyncSymbolOffset_t; typedef bool ieee154_macTimestampSupported_t; typedef uint16_t ieee154_macTransactionPersistenceTime_t; // own typedefs typedef bool ieee154_macPanCoordinator_t; // When security is implemented the following line should be commented out #define IEEE154_SECURITY_DISABLED /**************************************************** * Flags for disabling MAC functionality (to save program memory) */ // Disable scanning (MLME_SCAN will fail): // #define IEEE154_SCAN_DISABLED // // Disable beacon tracking (MLME_SYNC will fail): // #define IEEE154_BEACON_SYNC_DISABLED // // Disable beacon transmission (MLME_START will fail): // #define IEEE154_BEACON_TX_DISABLED // // Disable promiscuous mode (PromiscuousMode.start() will fail): // #define IEEE154_PROMISCUOUS_MODE_DISABLED // // Disallow next higher layer to switch to receive mode (MLME_RX_ENABLE will fail): // #define IEEE154_RXENABLE_DISABLED // // Disable association (MLME_ASSOCIATE will fail): // #define IEEE154_ASSOCIATION_DISABLED // // Disable association (MLME_DISASSOCIATE will fail): // #define IEEE154_DISASSOCIATION_DISABLED // // Disable coordinator realignment (MLME_ORPHAN will fail): // #define IEEE154_COORD_REALIGNMENT_DISABLED // // Disable transmission of broadcasts from coordinator to devices: // #define IEEE154_COORD_BROADCAST_DISABLED // Disable indirect transmissions (MCPS_DATA.request with TX_OPTIONS_INDIRECT // and MLME_POLL will fail): // #define IEEE154_INDIRECT_TX_DISABLED // Disables support for active message layer frame format (saves some RAM) // #define TKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED // Disable powerdown of the radio during inactive period (only relevant in // beacon-enabled mode), i.e. radio will remain idle and use more energy. This // would make sense, e.g. if BO=SO, because then there is no inactive period. // #define IEEE154_INACTIVE_PERIOD_POWERDOWN_DISABLED /**************************************************** * Static memory allocation for Queue/Pool */ // Command frames that are generated by the MAC in response to a user request // (such as MLME_ASSOCIATE.request()) are not statically allocated. Instead, // there is a pool of TXFRAME_POOL_SIZE frames shared among all MAC components, // i.e. the following macro defines an upper limit on the number of COMMAND // frames that the MAC may have instantiate in parallel. #ifndef TXCONTROL_POOL_SIZE #define TXCONTROL_POOL_SIZE 3 #endif // The MAC uses its own structure to represent frames that are to be // transmitted (e.g. this structure encapsulates the message_t). It is not // statically allocated, but a pool of those structure is shared among all MAC // components. The structure is used to encapsulate both, DATA and COMMAND // frames, so TXFRAME_POOL_SIZE should be at least TXCONTROL_POOL_SIZE, because // the MAC needs one such structure per each COMMAND frame it generates. If // you want to modify the number of DATA frames that the MAC can queue (by // default at least 1, see below "+ 1") before transmission then this is the // variable you need to change. #ifndef TXFRAME_POOL_SIZE #define TXFRAME_POOL_SIZE (TXCONTROL_POOL_SIZE + 1) #endif // The number of frames that the MAC can queue before they are transmitted // using (un-)slotted CSMA/CA algorithm. #ifndef CAP_TX_QUEUE_SIZE #define CAP_TX_QUEUE_SIZE TXFRAME_POOL_SIZE #endif // The number of indirect transmissions the MAC can queue (TX_OPTIONS_INDIRECT // flag was passed to MCPS_DATA.request()). #ifndef MAX_PENDING_ASSOC_RESPONSES #define MAX_PENDING_ASSOC_RESPONSES 7 #endif enum { // PHY sublayer constant needed to calculate mpdu size IEEE154_aMaxPHYPacketSize = 127, }; #endif // __TKN154_H tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/TKN154ActiveMessageP.nc000066400000000000000000000474531207233610700231300ustar00rootroot00000000000000/* * Copyright (c) 2011, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== * Author(s): Jan Hauer * ======================================================================== */ #include "AM.h" #include "TKN154.h" #include "TKN154_MAC.h" /* This module implements the Active Message abstraction over the * nonbeacon-enabled variant of the IEEE 802.15.4 MAC. Currently, when this * module is enabled (via SplitControl.start()) it makes sure that radio is * always in receive mode (unless we're transmitting), i.e. the * LowPowerListening interface is not yet implemented and the duty cycle is * 100%. * * The IEEE 802.15.4 frame format is different from the frame format used in * TinyOS. This module transparently converts between the two, to make both * sides happy: the upper layer in TinyOS will see the actual AM payload * starting at message_t->data, which allows briding between interfaces (so * apps like Oscilloscope are working). And before passing frames down to the * 15.4 MAC we make sure the AM type (and network byte) are moved to the MAC * payload portion (at message_t->data). This workaround and involves extra * memmoves, and will disappear once TinyOS introduces a new message buffer * abstraction. * * There are some TinyOS/CC2420 macros that are supported (e.g. set via CFLAGS * in the Makefile): TFRAMES_ENABLED, CC2420_DEF_CHANNEL, * CC2420_NO_ADDRESS_RECOGNITION, CC2420_NO_ACKNOWLEDGEMENTS **/ module TKN154ActiveMessageP { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; /* interface PacketTimeStamp as PacketTimeStamp32khz;*/ /* interface PacketTimeStamp as PacketTimeStampMilli;*/ /* interface LowPowerListening;*/ } uses { interface MLME_RESET; interface MCPS_DATA; interface MLME_SET; interface MLME_GET; interface IEEE154Frame as Frame; interface ActiveMessageAddress; interface Packet as SubPacket; interface State as SplitControlState; interface Leds; } } implementation { #ifdef TKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED // When TKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED is defined this component cannot // work, because it relies on some extra struct members which are disabled in // that case -> Make sure TKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED is not defined! #error "TKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED must not be defined if AM is used!" #endif enum { S_IDLE, S_STOPPED, S_STARTING, S_STARTED, S_STOPPING, }; enum { MAX_RX_ON_TIME = 0xFFFFFF, ADDRESS_NOT_PRESENT = 0, #ifndef TFRAMES_ENABLED PAYLOAD_OFFSET = 2, // 1 byte each for I-Frame byte + AM type #else PAYLOAD_OFFSET = 1, // 1 byte for AM type #endif T2_6LOWPAN_NETWORK_ID = 0x3f, // The 6LowPAN NALP ID for a TinyOS network (TEP 125) FC1_RESERVED_BIT = 0x80, FC2_RESERVED_BIT = 0x01, }; void updateLocalAddresses(); error_t status2Error(ieee154_status_t status) { switch (status) { case IEEE154_SUCCESS: return SUCCESS; case IEEE154_FRAME_TOO_LONG: return ESIZE; case IEEE154_NO_ACK: return ENOACK; break; case IEEE154_TRANSACTION_OVERFLOW: return EBUSY; case IEEE154_PURGED: return ECANCEL; case IEEE154_CHANNEL_ACCESS_FAILURE: // fall through default: return status; } } ieee154_header_t *getIeee154Header(message_t* m) { uint8_t *p = call Frame.getHeader(m); ieee154_header_t *header = (ieee154_header_t *) (p - offsetof(ieee154_header_t, mhr)); return header; } /**************** Functions dealing with ACKs ****************/ void setAckRequest(message_t *msg) { // We don't use Frame.getHeader() because this function // will be called from async context ieee154_header_t *hdr = (ieee154_header_t *) msg; uint8_t *fcf1 = &(((uint8_t*) hdr->mhr)[MHR_INDEX_FC1]); *fcf1 |= FC1_ACK_REQUEST; } void clearAckRequest(message_t *msg) { ieee154_header_t *hdr = (ieee154_header_t *) msg; uint8_t *fcf1 = &(((uint8_t*) hdr->mhr)[MHR_INDEX_FC1]); *fcf1 &= ~FC1_ACK_REQUEST; } bool isAckRequested(message_t *msg) { uint8_t *fcf1 = &(((uint8_t*) call Frame.getHeader(msg))[MHR_INDEX_FC1]); return (*fcf1 & FC1_ACK_REQUEST) ? TRUE : FALSE; } // We need to remember if a packet was acknowledeged, and use a // reserved flag in the 802.15.4 MAC header for that purpose bool wasAcked(message_t *msg) { ieee154_header_t *hdr = (ieee154_header_t *) msg; uint8_t *fcf2 = &(((uint8_t*) hdr->mhr)[MHR_INDEX_FC2]); return (*fcf2 & FC2_RESERVED_BIT) ? TRUE : FALSE; } void setWasAcked(message_t *msg) { uint8_t *fcf2 = &(((uint8_t*) call Frame.getHeader(msg))[MHR_INDEX_FC2]); *fcf2 |= FC2_RESERVED_BIT; } void clearWasAcked(message_t *msg) { uint8_t *fcf2 = &(((uint8_t*) call Frame.getHeader(msg))[MHR_INDEX_FC2]); *fcf2 &= ~FC2_RESERVED_BIT; } /***************** SplitControl & related commands ****************/ command error_t SplitControl.start() { if (call SplitControlState.requestState(S_STARTING) == SUCCESS) { error_t result = status2Error(call MLME_RESET.request(TRUE)); if (result != SUCCESS) call SplitControlState.toIdle(); return result; } else if (call SplitControlState.isState(S_STARTED)) { return EALREADY; } else if (call SplitControlState.isState(S_STARTING)) { return SUCCESS; } return EBUSY; } event void MLME_RESET.confirm(ieee154_status_t status) { error_t result = status2Error(status); if (result == SUCCESS) { // The MAC has been reset - we first set some radio parameters // in the way that the next TinyOS higher layer expects it // (as a reference we use the CC2420 stack) call MLME_SET.macDSN(0); // always start with seqno 0 (not random) updateLocalAddresses(); // sets source and PAN addresses #ifdef CC2420_DEF_CHANNEL call MLME_SET.phyCurrentChannel(CC2420_DEF_CHANNEL); #else call MLME_SET.phyCurrentChannel(26); #endif call MLME_SET.macAutoRequest(FALSE); call MLME_SET.macRxOnWhenIdle(TRUE); call SplitControlState.forceState(S_STARTED); signal SplitControl.startDone(SUCCESS); } if (result != SUCCESS) { // something went wrong -> reset state, signal error to upper layer if (call SplitControlState.isState(S_STARTING)) call SplitControlState.toIdle(); signal SplitControl.startDone(result); } else { // will continue in MLME_RX_ENABLE.confirm and signal startDone() there } } command error_t SplitControl.stop() { // The 15.4 MAC doesn't provide a stop command - instead we disable Rx and // switch state (MLME_RESET would be executed during next SplitControl.start()) if (call SplitControlState.isState(S_STARTED)) { call SplitControlState.forceState(S_IDLE); call MLME_SET.macRxOnWhenIdle(FALSE); signal SplitControl.stopDone(SUCCESS); return SUCCESS; } else if(call SplitControlState.isState(S_STOPPED)) { return EALREADY; } else if(call SplitControlState.isState(S_STOPPING)) { return SUCCESS; } return EBUSY; } void updateLocalAddresses() { call MLME_SET.macPANId(call ActiveMessageAddress.amGroup()); call MLME_SET.macShortAddress(call ActiveMessageAddress.amAddress()); } task void updateLocalAddressTask() { updateLocalAddresses(); } async event void ActiveMessageAddress.changed() { post updateLocalAddressTask(); } /***************** AMSend Commands ****************/ command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { uint8_t *p = call Frame.getPayload(msg); ieee154_address_t destAddr; uint8_t txOptions = 0; ieee154_status_t status; ieee154_header_t *header = getIeee154Header(msg); dbg_serial("TKN154ActiveMessageP", "AMSend.send AM_ID = %lu, addr = %lu\n", (uint32_t) id, (uint32_t) addr); dbg_serial_flush(); if (!call SplitControlState.isState(S_STARTED)) return EOFF; if (len > call AMSend.maxPayloadLength[id]()) return ESIZE; // Shift the payload and add the AM type + network byte, because in the // IEEE 802.15.4 these are part of the MAC payload, rather than MAC header // (as which message_t treats them). We do this, because we want to // support bridging between interfaces e.g. radio/serial. memmove(p + PAYLOAD_OFFSET, p, len); header->type = p[PAYLOAD_OFFSET-1] = header->type; #ifndef TFRAMES_ENABLED header->network = p[PAYLOAD_OFFSET-2] = T2_6LOWPAN_NETWORK_ID; #endif // We intentionally overwrite some previously set MAC header fields to // mimic the behavior of the standard CC2420 driver in TinyOS destAddr.shortAddress = addr; call Frame.setAddressingFields(msg, ADDR_MODE_SHORT_ADDRESS, ADDR_MODE_SHORT_ADDRESS, call ActiveMessageAddress.amGroup(), &destAddr, NULL); if (isAckRequested(msg) && addr != AM_BROADCAST_ADDR) txOptions = TX_OPTIONS_ACK; status = call MCPS_DATA.request(msg, len + PAYLOAD_OFFSET, 0, txOptions); dbg_serial("TKN154ActiveMessageP", "AMSend.send[%lu], status: %lx\n", (uint32_t) id, (uint32_t) status); dbg_serial_flush(); return status2Error(status); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { // We don't support cancel(). There is the MCPS_PURGE interface, but it // would require that the next higher layer keeps track of the 'msduHandle' // and there's no such concept in TinyOS ... return FAIL; } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } /***************** AMPacket Commands ****************/ command am_addr_t AMPacket.address() { return call ActiveMessageAddress.amAddress(); } command am_addr_t AMPacket.destination(message_t* msg) { ieee154_address_t address; if (call Frame.getDstAddr(msg, &address) != SUCCESS) address.shortAddress = ADDRESS_NOT_PRESENT; // not present return address.shortAddress; } command void AMPacket.setSource(message_t* msg, am_addr_t addr) { // The 15.4 MAC doesn't allow to set the source address of a packet // explicitly, instead it will automatically set it to 'macShortAddress' // when the frame is passed down (Tx path) via MCPS_DATA.request(). // The next higher layer may still want to use setSource() and source() // to store some temporary data. We use a fixed offset, because the // TinyOS frame format is fixed... nxle_uint16_t *src = (nxle_uint16_t*) &(((uint8_t*) call Frame.getHeader(msg))[MHR_INDEX_ADDRESS + 4]); *src = addr; } command am_addr_t AMPacket.source(message_t* msg) { // see comment for AMPacket.setSource() return *((nxle_uint16_t*) &(((uint8_t*) call Frame.getHeader(msg))[MHR_INDEX_ADDRESS + 4])); } command void AMPacket.setDestination(message_t* msg, am_addr_t addr) { ieee154_address_t dstAddr; uint16_t panID = ADDRESS_NOT_PRESENT; // default call Frame.getDstPANId(msg, &panID); dstAddr.shortAddress = addr; call Frame.setAddressingFields(msg, ADDR_MODE_SHORT_ADDRESS, ADDR_MODE_SHORT_ADDRESS, panID, &dstAddr, NULL); } command bool AMPacket.isForMe(message_t* msg) { return (call AMPacket.destination(msg) == call AMPacket.address() || call AMPacket.destination(msg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* msg) { ieee154_header_t *header = getIeee154Header(msg); return header->type; } command void AMPacket.setType(message_t* msg, am_id_t type) { ieee154_header_t *header = getIeee154Header(msg); header->type = type; } command am_group_t AMPacket.group(message_t* msg) { uint16_t panID = ADDRESS_NOT_PRESENT; // default (if not set) call Frame.getDstPANId(msg, &panID); return panID; } command void AMPacket.setGroup(message_t* msg, am_group_t grp) { ieee154_address_t dstAddr; dstAddr.shortAddress = call AMPacket.destination(msg); call Frame.setAddressingFields(msg, call Frame.getSrcAddrMode(msg), call Frame.getDstAddrMode(msg), grp, &dstAddr, NULL); } command am_group_t AMPacket.localGroup() { return call ActiveMessageAddress.amGroup(); } async command error_t PacketAcknowledgements.requestAck( message_t* msg ) { setAckRequest(msg); return SUCCESS; } async command error_t PacketAcknowledgements.noAck( message_t* msg ) { clearAckRequest(msg); return SUCCESS; } async command bool PacketAcknowledgements.wasAcked(message_t* msg) { return wasAcked(msg); } /***************** Packet interface ****************/ command void Packet.clear(message_t* msg) { call SubPacket.clear(msg); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg, len); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg); } command uint8_t Packet.maxPayloadLength() { uint8_t len = call SubPacket.maxPayloadLength(); // TinyOS uses a static header of 9 byte. The maximum allowed // MAC payload is then 116. The MAC would signal an error later // (when you call MCPS_DATA.request()), which we must avoid... if (len > 116) len = 116; else if (len < PAYLOAD_OFFSET) return 0; // Reserve one (or two) byte for the AM type and network ID // (they are part of the IEEE 802.15.4 MAC payload, not header!) len -= PAYLOAD_OFFSET; return len; } command void* Packet.getPayload(message_t* msg, uint8_t len) { if (len > call Packet.maxPayloadLength()) return NULL; else return call Frame.getPayload(msg); } /***************** Timestamping ****************/ // TODO -> the Frame.getTimestamp() command will return a 62.5 KHz timestamp // which must be converted to 32 KHz or milli LocalTime. /* async command bool PacketTimeStamp32khz.isValid(message_t* msg);*/ /* async command uint32_t PacketTimeStamp32khz.timestamp(message_t* msg);*/ /* async command void PacketTimeStamp32khz.clear(message_t* msg);*/ /* async command void PacketTimeStamp32khz.set(message_t* msg, uint32_t value);*/ /* async command bool PacketTimeStampMilli.isValid(message_t* msg);*/ /* async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg);*/ /* async command void PacketTimeStampMilli.clear(message_t* msg);*/ /* async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value);*/ /***************** MCPS_DATA events ****************/ event void MCPS_DATA.confirm(message_t *frame, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp) { void *payload = call Frame.getPayload(frame); uint8_t payloadLength = call Frame.getPayloadLength(frame); // Remember if this packet was acked because we might need this info later // (PacketAcknowledgements.wasAcked()): it was acked if the ACK_REQUEST // flag was set and the MCPS_DATA.confirm eventpacket had a status code // IEEE154_SUCCESS. if (isAckRequested(frame) && status == IEEE154_SUCCESS) setWasAcked(frame); else clearWasAcked(frame); // revert the memmove we did in MCPS_DATA.request() above memmove(payload, payload + PAYLOAD_OFFSET, payloadLength - PAYLOAD_OFFSET); call Packet.setPayloadLength(frame, payloadLength - PAYLOAD_OFFSET); dbg_serial("TKN154ActiveMessageP", "AMSend.sendDone[%lu], status: %lu\n", (uint32_t) call AMPacket.type(frame), (uint32_t) status); dbg_serial("TKN154ActiveMessageP", "... TxTime: %lu (valid: %lu)\n", Timestamp, (uint32_t) call Frame.isTimestampValid(frame)); signal AMSend.sendDone[call AMPacket.type(frame)](frame, status2Error(status)); dbg_serial_flush(); } event message_t* MCPS_DATA.indication ( message_t* frame ) { void *payload = call Frame.getPayload(frame); uint8_t payloadLen = call Frame.getPayloadLength(frame); ieee154_header_t *header = getIeee154Header(frame); // We have to be a bit careful here, because the MAC will accept frames that // in TinyOS a next higher layer does not expect -> filter those out if (!call Frame.hasStandardCompliantHeader(frame) || call Frame.getFrameType(frame) != 1) // must be a DATA frame return frame; header->type = ((uint8_t*) payload)[PAYLOAD_OFFSET-1]; #ifndef TFRAMES_ENABLED header->network = ((uint8_t*) payload)[PAYLOAD_OFFSET-2]; #endif // Shift the payload and add the AM type + network byte, because in the // IEEE 802.15.4 these are part of the MAC payload, rather than MAC header // (as which message_t treats them). We do this, because we want to // support bridging between interfaces e.g. radio/serial. payloadLen -= PAYLOAD_OFFSET; memmove(payload, payload + PAYLOAD_OFFSET, payloadLen); call Packet.setPayloadLength(frame, payloadLen); dbg_serial("TKN154ActiveMessageP", "MCPS_DATA.indication, AMtype: %lu, payloadlen: %lu\n", (uint32_t) call AMPacket.type(frame), (uint32_t) payloadLen); dbg_serial("TKN154ActiveMessageP", "... RxTime: %lu (valid: %lu)\n", (uint32_t) call Frame.getTimestamp(frame), (uint32_t) call Frame.isTimestampValid(frame)); dbg_serial_flush(); if (call AMPacket.isForMe(frame)) return signal Receive.receive[call AMPacket.type(frame)](frame, call AMSend.getPayload[call AMPacket.type(frame)](frame,0), payloadLen); else return signal Snoop.receive[call AMPacket.type(frame)](frame, call AMSend.getPayload[call AMPacket.type(frame)](frame,0), payloadLen); } /***************** Misc. / defaults ****************/ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/TKN154BeaconEnabledP.nc000066400000000000000000000562321207233610700230450ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Jan Hauer */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" #include "TKN154_PIB.h" #define IEEE154_BEACON_ENABLED_PAN TRUE configuration TKN154BeaconEnabledP { provides { /* MCPS-SAP */ interface MCPS_DATA; interface MCPS_PURGE; interface Packet; /* MLME-SAP */ interface MLME_ASSOCIATE; interface MLME_BEACON_NOTIFY; interface MLME_COMM_STATUS; interface MLME_DISASSOCIATE; interface MLME_GET; interface MLME_GTS; interface MLME_ORPHAN; interface MLME_POLL; interface MLME_RESET; interface MLME_RX_ENABLE; interface MLME_SCAN; interface MLME_SET; interface MLME_START; interface MLME_SYNC; interface MLME_SYNC_LOSS; interface Notify as PIBUpdate[uint8_t attributeID]; interface IEEE154Frame; interface IEEE154BeaconFrame; interface IEEE154TxBeaconPayload; interface SplitControl as PromiscuousMode; interface Get as GetLocalExtendedAddress; interface TimeCalc; interface FrameUtility; } uses { interface RadioRx; interface RadioTx; interface RadioOff; interface SlottedCsmaCa; interface EnergyDetection; interface SplitControl as PhySplitControl; interface Set as RadioPromiscuousMode; interface Alarm as Alarm1; interface Alarm as Alarm2; interface Alarm as Alarm3; interface Alarm as Alarm4; interface Alarm as Alarm5; interface Alarm as Alarm6; interface Alarm as Alarm7; interface Alarm as Alarm8; interface Alarm as Alarm9; interface Alarm as Alarm10; interface Alarm as Alarm11; interface Alarm as Alarm12; interface Alarm as Alarm13; interface Timer as Timer1; interface Timer as Timer2; interface Timer as Timer3; interface Timer as Timer4; interface Timer as Timer5; interface LocalTime; interface Random; interface Leds; } } implementation { components DataP, PibP, RadioControlP, #ifndef IEEE154_INDIRECT_TX_DISABLED IndirectTxP, PollP, #else NoIndirectTxP as IndirectTxP, NoPollP as PollP, #endif #ifndef IEEE154_SCAN_DISABLED ScanP, #else NoScanP as ScanP, #endif #ifndef IEEE154_ASSOCIATION_DISABLED AssociateP, #else NoAssociateP as AssociateP, #endif #ifndef IEEE154_DISASSOCIATION_DISABLED DisassociateP, #else NoDisassociateP as DisassociateP, #endif #ifndef IEEE154_BEACON_SYNC_DISABLED BeaconSynchronizeP, new DispatchQueueP() as DeviceCapQueue, new DispatchSlottedCsmaP(INCOMING_SUPERFRAME) as DeviceCap, #else NoBeaconSynchronizeP as BeaconSynchronizeP, new NoDispatchQueueP() as DeviceCapQueue, new NoDispatchSlottedCsmaP(INCOMING_SUPERFRAME) as DeviceCap, #endif #ifndef IEEE154_BEACON_TX_DISABLED BeaconTransmitP, new DispatchQueueP() as CoordCapQueue, new DispatchSlottedCsmaP(OUTGOING_SUPERFRAME) as CoordCap, #else NoBeaconTransmitP as BeaconTransmitP, new NoDispatchQueueP() as CoordCapQueue, new NoDispatchSlottedCsmaP(OUTGOING_SUPERFRAME) as CoordCap, #endif new InactivePeriodP(INCOMING_SUPERFRAME) as DeviceInactivePeriod, new InactivePeriodP(OUTGOING_SUPERFRAME) as CoordInactivePeriod, #ifndef IEEE154_RXENABLE_DISABLED RxEnableP, #else NoRxEnableP as RxEnableP, #endif #ifndef IEEE154_PROMISCUOUS_MODE_DISABLED PromiscuousModeP, #else NoPromiscuousModeP as PromiscuousModeP, #endif #ifndef IEEE154_COORD_REALIGNMENT_DISABLED CoordRealignmentP, #else NoCoordRealignmentP as CoordRealignmentP, #endif #ifndef IEEE154_COORD_BROADCAST_DISABLED CoordBroadcastP, #else NoCoordBroadcastP as CoordBroadcastP, #endif #if defined(IEEE154_GTS_COORD_ENABLED) && defined(IEEE154_GTS_DEVICE_ENABLED) #error "You must not define both IEEE154_GTS_COORD_ENABLED and IEEE154_GTS_DEVICE_ENABLED!" #endif #ifdef IEEE154_GTS_COORD_ENABLED CoordCfpP as CoordCfp, #else NoCoordCfpP as CoordCfp, #endif #ifdef IEEE154_GTS_DEVICE_ENABLED DeviceCfpP as DeviceCfp, #else NoDeviceCfpP as DeviceCfp, #endif new PoolC(ieee154_txframe_t, TXFRAME_POOL_SIZE) as TxFramePoolP, new PoolC(ieee154_txcontrol_t, TXCONTROL_POOL_SIZE) as TxControlPoolP, new QueueC(ieee154_txframe_t*, CAP_TX_QUEUE_SIZE) as DeviceCapQueueC, new QueueC(ieee154_txframe_t*, CAP_TX_QUEUE_SIZE) as CoordCapQueueC, new QueueC(ieee154_txframe_t*, CAP_TX_QUEUE_SIZE) as BroadcastQueueC; components MainC; /* MCPS */ MCPS_DATA = DataP; MCPS_PURGE = DataP; /* MLME */ MLME_START = BeaconTransmitP; MLME_ASSOCIATE = AssociateP; MLME_DISASSOCIATE = DisassociateP; MLME_BEACON_NOTIFY = BeaconSynchronizeP; MLME_BEACON_NOTIFY = ScanP; MLME_COMM_STATUS = AssociateP; MLME_COMM_STATUS = CoordRealignmentP; MLME_GET = PibP; MLME_ORPHAN = CoordRealignmentP; MLME_POLL = PollP; MLME_RESET = PibP; MLME_RX_ENABLE = RxEnableP; MLME_SCAN = ScanP; MLME_SET = PibP; MLME_SYNC = BeaconSynchronizeP; MLME_SYNC_LOSS = BeaconSynchronizeP; #ifdef IEEE154_GTS_COORD_ENABLED MLME_GTS = CoordCfp; #else MLME_GTS = DeviceCfp; #endif IEEE154Frame = PibP; IEEE154BeaconFrame = PibP; PromiscuousMode = PromiscuousModeP; GetLocalExtendedAddress = PibP.GetLocalExtendedAddress; IEEE154TxBeaconPayload = BeaconTransmitP; Packet = PibP; TimeCalc = PibP; FrameUtility = PibP; /* ----------------------- Scanning (MLME-SCAN) ----------------------- */ components new RadioClientC(RADIO_CLIENT_SCAN) as ScanRadioClient; PibP.MacReset -> ScanP; ScanP.MLME_GET -> PibP; ScanP.MLME_SET -> PibP.MLME_SET; ScanP.EnergyDetection = EnergyDetection; ScanP.RadioRx -> ScanRadioClient; ScanP.RadioTx -> ScanRadioClient; ScanP.Frame -> PibP; ScanP.BeaconFrame -> PibP; ScanP.RadioOff -> ScanRadioClient; ScanP.ScanTimer = Timer1; ScanP.TxFramePool -> TxFramePoolP; ScanP.TxControlPool -> TxControlPoolP; ScanP.RadioToken -> ScanRadioClient; ScanP.Leds = Leds; ScanP.FrameUtility -> PibP; /* ----------------- Beacon Transmission (MLME-START) ----------------- */ components new RadioClientC(RADIO_CLIENT_BEACONTRANSMIT) as BeaconTxRadioClient; PibP.MacReset -> BeaconTransmitP; BeaconTransmitP.PIBUpdate[IEEE154_macAssociationPermit] -> PibP.PIBUpdate[IEEE154_macAssociationPermit]; BeaconTransmitP.PIBUpdate[IEEE154_macGTSPermit] -> PibP.PIBUpdate[IEEE154_macGTSPermit]; BeaconTransmitP.BeaconSendAlarm = Alarm1; BeaconTransmitP.BeaconPayloadUpdateTimer = Timer2; BeaconTransmitP.RadioOff -> BeaconTxRadioClient; BeaconTransmitP.BeaconTx -> BeaconTxRadioClient; BeaconTransmitP.MLME_SET -> PibP.MLME_SET; BeaconTransmitP.MLME_GET -> PibP; BeaconTransmitP.SetMacSuperframeOrder -> PibP.SetMacSuperframeOrder; BeaconTransmitP.SetMacBeaconTxTime -> PibP.SetMacBeaconTxTime; BeaconTransmitP.SetMacPanCoordinator -> PibP.SetMacPanCoordinator; BeaconTransmitP.RadioToken -> BeaconTxRadioClient; BeaconTransmitP.RealignmentBeaconEnabledTx -> CoordBroadcastP.RealignmentTx; BeaconTransmitP.RealignmentNonBeaconEnabledTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; BeaconTransmitP.BeaconRequestRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_BEACON_REQUEST]; BeaconTransmitP.GtsInfoWrite -> CoordCfp.GtsInfoWrite; BeaconTransmitP.PendingAddrSpecUpdated -> IndirectTxP.PendingAddrSpecUpdated; BeaconTransmitP.PendingAddrWrite -> IndirectTxP.PendingAddrWrite; BeaconTransmitP.GtsSpecUpdated -> CoordCfp.GtsSpecUpdated; BeaconTransmitP.FrameUtility -> PibP.FrameUtility; BeaconTransmitP.IsTrackingBeacons -> BeaconSynchronizeP.IsTrackingBeacons; BeaconTransmitP.IncomingSF -> BeaconSynchronizeP.IncomingSF; BeaconTransmitP.GetSetRealignmentFrame -> CoordRealignmentP; BeaconTransmitP.IsBroadcastReady -> CoordBroadcastP.IsBroadcastReady; BeaconTransmitP.TimeCalc -> PibP; BeaconTransmitP.Random = Random; BeaconTransmitP.Leds = Leds; /* ------------------ Beacon Tracking (MLME-SYNC) ------------------ */ components new RadioClientC(RADIO_CLIENT_BEACONSYNCHRONIZE) as SyncRadioClient; PibP.MacReset -> BeaconSynchronizeP; BeaconSynchronizeP.MLME_SET -> PibP.MLME_SET; BeaconSynchronizeP.MLME_GET -> PibP; BeaconSynchronizeP.TrackAlarm = Alarm2; BeaconSynchronizeP.FrameUtility -> PibP; BeaconSynchronizeP.Frame -> PibP; BeaconSynchronizeP.BeaconFrame -> PibP; BeaconSynchronizeP.BeaconRx -> SyncRadioClient; BeaconSynchronizeP.RadioOff -> SyncRadioClient; BeaconSynchronizeP.DataRequest -> PollP.DataRequest[SYNC_POLL_CLIENT]; BeaconSynchronizeP.RadioToken -> SyncRadioClient; BeaconSynchronizeP.TimeCalc -> PibP; BeaconSynchronizeP.CoordRealignmentRx -> DeviceCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_COORDINATOR_REALIGNMENT]; BeaconSynchronizeP.Leds = Leds; /* -------------------- Association (MLME-ASSOCIATE) -------------------- */ PibP.MacReset -> AssociateP; AssociateP.AssociationRequestRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_ASSOCIATION_REQUEST]; AssociateP.AssociationRequestTx -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; AssociateP.AssociationResponseExtracted -> DeviceCap.FrameExtracted[FC1_FRAMETYPE_CMD + CMD_FRAME_ASSOCIATION_RESPONSE]; AssociateP.AssociationResponseTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)]; AssociateP.DataRequest -> PollP.DataRequest[ASSOCIATE_POLL_CLIENT]; AssociateP.ResponseTimeout = Timer3; AssociateP.TxFramePool -> TxFramePoolP; AssociateP.TxControlPool -> TxControlPoolP; AssociateP.MLME_GET -> PibP; AssociateP.MLME_SET -> PibP.MLME_SET; AssociateP.FrameUtility -> PibP; AssociateP.Frame -> PibP; AssociateP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress; /* --------------- Disassociation (MLME-DISASSOCIATE) --------------- */ PibP.MacReset -> DisassociateP; DisassociateP.DisassociationIndirectTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)]; DisassociateP.DisassociationDirectTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; DisassociateP.DisassociationToCoord -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; DisassociateP.DisassociationDirectRxFromCoord -> DeviceCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION]; DisassociateP.DisassociationExtractedFromCoord -> DeviceCap.FrameExtracted[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION]; DisassociateP.DisassociationRxFromDevice -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION]; DisassociateP.TxFramePool -> TxFramePoolP; DisassociateP.TxControlPool -> TxControlPoolP; DisassociateP.MLME_GET -> PibP; DisassociateP.MLME_SET -> PibP; DisassociateP.FrameUtility -> PibP; DisassociateP.Frame -> PibP; DisassociateP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress; /* ------------------ Data Transmission (MCPS-DATA) ------------------- */ DataP.CoordCapRx -> CoordCap.FrameRx[FC1_FRAMETYPE_DATA]; DataP.DeviceCapTx -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; DataP.CoordCapTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; DataP.DeviceCapRx -> PollP.DataRx; DataP.DeviceCapRx -> PromiscuousModeP.FrameRx; DataP.DeviceCapRx -> DeviceCap.FrameRx[FC1_FRAMETYPE_DATA]; DataP.TxFramePool -> TxFramePoolP; DataP.BroadcastTx -> CoordBroadcastP.BroadcastDataFrame; DataP.DeviceCfpTx -> DeviceCfp.CfpTx; DataP.CoordCfpTx -> CoordCfp.CfpTx; DataP.DeviceCfpRx -> DeviceCfp.FrameRx; DataP.CoordCfpRx -> CoordCfp.FrameRx; DataP.IndirectTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)]; DataP.FrameUtility -> PibP; DataP.Frame -> PibP; DataP.PurgeDirect -> DeviceCapQueue; DataP.PurgeIndirect -> IndirectTxP; DataP.PurgeGtsDevice -> DeviceCfp; DataP.PurgeGtsCoord -> CoordCfp; DataP.MLME_GET -> PibP; DataP.Packet -> PibP; DataP.Leds = Leds; /* ------------------------ Polling (MLME-POLL) ----------------------- */ PibP.MacReset -> PollP; PollP.PollTx -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; PollP.DataExtracted -> DeviceCap.FrameExtracted[FC1_FRAMETYPE_DATA]; PollP.FrameUtility -> PibP; PollP.TxFramePool -> TxFramePoolP; PollP.TxControlPool -> TxControlPoolP; PollP.MLME_GET -> PibP; PollP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress; /* ---------------------- Indirect transmission ----------------------- */ PibP.MacReset -> IndirectTxP; IndirectTxP.CoordCapTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; IndirectTxP.DataRequestRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DATA_REQUEST]; IndirectTxP.MLME_GET -> PibP; IndirectTxP.IEEE154Frame -> PibP; IndirectTxP.IndirectTxTimeout = Timer4; IndirectTxP.TimeCalc -> PibP; IndirectTxP.Leds = Leds; /* ---------------------------- Realignment --------------------------- */ PibP.MacReset -> CoordRealignmentP; CoordRealignmentP.CoordRealignmentTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; CoordRealignmentP.OrphanNotificationRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_ORPHAN_NOTIFICATION]; CoordRealignmentP.FrameUtility -> PibP; CoordRealignmentP.Frame -> PibP; CoordRealignmentP.TxFramePool -> TxFramePoolP; CoordRealignmentP.TxControlPool -> TxControlPoolP; CoordRealignmentP.MLME_GET -> PibP; CoordRealignmentP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress; /* ---------------------------- Broadcasts ---------------------------- */ components new RadioClientC(RADIO_CLIENT_COORDBROADCAST) as CoordBroadcastRadioClient; PibP.MacReset -> CoordBroadcastP; CoordBroadcastP.RadioToken -> CoordBroadcastRadioClient; CoordBroadcastP.OutgoingSF -> BeaconTransmitP.OutgoingSF; CoordBroadcastP.CapTransmitNow -> CoordCap.BroadcastTx; CoordBroadcastP.Queue -> BroadcastQueueC; /* --------------------- CAP (incoming superframe) -------------------- */ PibP.DispatchQueueReset -> DeviceCapQueue; DeviceCapQueue.Queue -> DeviceCapQueueC; DeviceCapQueue.FrameTxCsma -> DeviceCap; PibP.DispatchQueueReset -> CoordCapQueue; CoordCapQueue.Queue -> CoordCapQueueC; CoordCapQueue.FrameTxCsma -> CoordCap; components new RadioClientC(RADIO_CLIENT_DEVICECAP) as DeviceCapRadioClient; PibP.DispatchReset -> DeviceCap; DeviceCap.CapEndAlarm = Alarm3; DeviceCap.BLEAlarm = Alarm4; DeviceCap.RxWaitAlarm = Alarm5; DeviceCap.RadioToken -> DeviceCapRadioClient; DeviceCap.RadioTokenRequested -> DeviceCapRadioClient; DeviceCap.SuperframeStructure -> BeaconSynchronizeP.IncomingSF; DeviceCap.IsRxEnableActive -> RxEnableP.IsRxEnableActive; DeviceCap.IsRadioTokenRequested -> PibP.IsRadioTokenRequested; // fan out... DeviceCap.IsRadioTokenRequested -> PromiscuousModeP.IsRadioTokenRequested; DeviceCap.IsRadioTokenRequested -> ScanP.IsRadioTokenRequested; DeviceCap.GetIndirectTxFrame -> IndirectTxP; DeviceCap.RxEnableStateChange -> RxEnableP.RxEnableStateChange; DeviceCap.IsTrackingBeacons -> BeaconSynchronizeP.IsTrackingBeacons; DeviceCap.PIBUpdateMacRxOnWhenIdle -> PibP.PIBUpdate[IEEE154_macRxOnWhenIdle]; DeviceCap.FrameUtility -> PibP; DeviceCap.SlottedCsmaCa -> DeviceCapRadioClient; DeviceCap.RadioRx -> DeviceCapRadioClient; DeviceCap.RadioOff -> DeviceCapRadioClient; DeviceCap.MLME_GET -> PibP; DeviceCap.MLME_SET -> PibP.MLME_SET; DeviceCap.TimeCalc -> PibP; DeviceCap.Leds = Leds; DeviceCap.TrackSingleBeacon -> BeaconSynchronizeP.TrackSingleBeacon; DeviceCap.MLME_SYNC_LOSS -> BeaconSynchronizeP; /* ---------------------- CAP (outgoing superframe) ------------------- */ components new RadioClientC(RADIO_CLIENT_COORDCAP) as CoordCapRadioClient, new BackupP(ieee154_cap_frame_backup_t); PibP.DispatchReset -> CoordCap; CoordCap.CapEndAlarm = Alarm6; CoordCap.BLEAlarm = Alarm7; CoordCap.RadioToken -> CoordCapRadioClient; CoordCap.RadioTokenRequested -> CoordCapRadioClient; CoordCap.SuperframeStructure -> BeaconTransmitP.OutgoingSF; CoordCap.IsRxEnableActive -> RxEnableP.IsRxEnableActive; CoordCap.IsRadioTokenRequested -> PibP.IsRadioTokenRequested; // fan out... CoordCap.IsRadioTokenRequested -> PromiscuousModeP.IsRadioTokenRequested; CoordCap.IsRadioTokenRequested -> ScanP.IsRadioTokenRequested; CoordCap.GetIndirectTxFrame -> IndirectTxP; CoordCap.RxEnableStateChange -> RxEnableP.RxEnableStateChange; CoordCap.IsTrackingBeacons -> BeaconSynchronizeP.IsTrackingBeacons; CoordCap.PIBUpdateMacRxOnWhenIdle -> PibP.PIBUpdate[IEEE154_macRxOnWhenIdle]; CoordCap.FrameUtility -> PibP; CoordCap.SlottedCsmaCa -> CoordCapRadioClient; CoordCap.RadioRx -> CoordCapRadioClient; CoordCap.RadioOff -> CoordCapRadioClient; CoordCap.MLME_GET -> PibP; CoordCap.MLME_SET -> PibP.MLME_SET; CoordCap.TimeCalc -> PibP; CoordCap.Leds = Leds; CoordCap.FrameBackup -> BackupP; CoordCap.FrameRestore -> BackupP; /* -------------------- GTS (incoming superframe) --------------------- */ components new RadioClientC(RADIO_CLIENT_DEVICECFP) as DeviceCfpRadioClient; PibP.MacReset -> DeviceCfp; DeviceCfp.RadioToken -> DeviceCfpRadioClient; DeviceCfp.IncomingSF -> BeaconSynchronizeP.IncomingSF; DeviceCfp.CfpSlotAlarm = Alarm8; DeviceCfp.CfpEndAlarm = Alarm9; DeviceCfp.RadioTx -> DeviceCfpRadioClient; DeviceCfp.RadioRx -> DeviceCfpRadioClient; DeviceCfp.RadioOff -> DeviceCfpRadioClient; DeviceCfp.MLME_GET -> PibP; DeviceCfp.MLME_SET -> PibP.MLME_SET; DeviceCfp.GTSrequestTx -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)]; DeviceCfp.TxFramePool -> TxFramePoolP; DeviceCfp.TxControlPool -> TxControlPoolP; DeviceCfp.FrameUtility -> PibP; /* -------------------- GTS (outgoing superframe) --------------------- */ components new RadioClientC(RADIO_CLIENT_COORDCFP) as CoordCfpRadioClient; PibP.MacReset -> CoordCfp; CoordCfp.RadioToken -> CoordCfpRadioClient; CoordCfp.OutgoingSF -> BeaconTransmitP.OutgoingSF; CoordCfp.CfpSlotAlarm = Alarm10; CoordCfp.CfpEndAlarm = Alarm11; CoordCfp.RadioTx -> CoordCfpRadioClient; CoordCfp.RadioRx -> CoordCfpRadioClient; CoordCfp.RadioOff -> CoordCfpRadioClient; CoordCfp.MLME_GET -> PibP; CoordCfp.MLME_SET -> PibP.MLME_SET; CoordCfp.GtsRequestRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_GTS_REQUEST]; CoordCfp.Frame -> PibP; /* --------------- Inactive Period (incoming superframe) -------------- */ components new RadioClientC(RADIO_CLIENT_DEVICE_INACTIVE_PERIOD) as DeviceInactivePeriodClient; DeviceInactivePeriod.RadioToken -> DeviceInactivePeriodClient; DeviceInactivePeriod.Alarm = Alarm12; DeviceInactivePeriod.RadioControl = PhySplitControl; DeviceInactivePeriod.SF -> BeaconSynchronizeP.IncomingSF; DeviceInactivePeriod.IsEmbedded -> BeaconTransmitP.IsSendingBeacons; DeviceInactivePeriod.RadioOff -> DeviceInactivePeriodClient; DeviceInactivePeriod.MLME_GET -> PibP; DeviceInactivePeriod.TimeCalc -> PibP; /* --------------- Inactive Period (outgoing superframe) -------------- */ components new RadioClientC(RADIO_CLIENT_COORD_INACTIVE_PERIOD) as CoordInactivePeriodClient; CoordInactivePeriod.RadioToken -> CoordInactivePeriodClient; CoordInactivePeriod.Alarm = Alarm13; CoordInactivePeriod.RadioControl = PhySplitControl; CoordInactivePeriod.SF -> BeaconTransmitP.OutgoingSF; CoordInactivePeriod.IsEmbedded -> BeaconSynchronizeP.IsTrackingBeacons; CoordInactivePeriod.RadioOff -> CoordInactivePeriodClient; CoordInactivePeriod.MLME_GET -> PibP; CoordInactivePeriod.TimeCalc -> PibP; /* -------------------------- promiscuous mode ------------------------ */ components new RadioClientC(RADIO_CLIENT_PROMISCUOUSMODE) as PromiscuousModeRadioClient; PibP.MacReset -> PromiscuousModeP; PromiscuousModeP.RadioToken -> PromiscuousModeRadioClient; PromiscuousModeP.PromiscuousRx -> PromiscuousModeRadioClient; PromiscuousModeP.RadioOff -> PromiscuousModeRadioClient; PromiscuousModeP.RadioPromiscuousMode = RadioPromiscuousMode; /* --------------------------- MLME-RX-ENABLE ------------------------ */ PibP.MacReset -> RxEnableP; RxEnableP.IncomingSuperframeStructure -> BeaconSynchronizeP; RxEnableP.OutgoingSuperframeStructure -> BeaconTransmitP; RxEnableP.IsTrackingBeacons -> BeaconSynchronizeP.IsTrackingBeacons; RxEnableP.IsSendingBeacons-> BeaconTransmitP.IsSendingBeacons; RxEnableP.TimeCalc -> PibP.TimeCalc; RxEnableP.WasRxEnabled -> DeviceCap.WasRxEnabled; RxEnableP.WasRxEnabled -> CoordCap.WasRxEnabled; RxEnableP.RxEnableTimer = Timer5; /* ------------------------------- PIB -------------------------------- */ components new RadioClientC(RADIO_CLIENT_PIB) as PibRadioClient; PIBUpdate = PibP; MainC.SoftwareInit -> PibP.LocalInit; PibP.RadioControl = PhySplitControl; PibP.Random = Random; PibP.PromiscuousModeGet -> PromiscuousModeP; PibP.LocalTime = LocalTime; PibP.RadioToken -> PibRadioClient; PibP.RadioOff -> PibRadioClient; /* ------------------------- Radio Control ---------------------------- */ RadioControlP.PhyTx = RadioTx; RadioControlP.PhySlottedCsmaCa = SlottedCsmaCa; RadioControlP.PhyRx = RadioRx; RadioControlP.PhyRadioOff = RadioOff; RadioControlP.RadioPromiscuousMode -> PromiscuousModeP; RadioControlP.Leds = Leds; } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/TKN154NonBeaconEnabledP.nc000066400000000000000000000324511207233610700235150ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.10 $ * $Date: 2009-10-16 12:25:46 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" #include "TKN154_PIB.h" #define IEEE154_BEACON_ENABLED_PAN FALSE configuration TKN154NonBeaconEnabledP { provides { /* MCPS-SAP */ interface MCPS_DATA; interface MCPS_PURGE; interface Packet; /* MLME-SAP */ interface MLME_ASSOCIATE; interface MLME_BEACON_NOTIFY; interface MLME_COMM_STATUS; interface MLME_DISASSOCIATE; interface MLME_GET; interface MLME_ORPHAN; interface MLME_POLL; interface MLME_RESET; interface MLME_RX_ENABLE; interface MLME_SCAN; interface MLME_SET; interface MLME_START; interface Notify as PIBUpdate[uint8_t attributeID]; interface IEEE154Frame; interface IEEE154BeaconFrame; interface IEEE154TxBeaconPayload; interface SplitControl as PromiscuousMode; interface Get as GetLocalExtendedAddress; interface TimeCalc; interface FrameUtility; } uses { interface RadioRx; interface RadioTx; interface RadioOff; interface UnslottedCsmaCa; interface EnergyDetection; interface SplitControl as PhySplitControl; interface Set as RadioPromiscuousMode; interface Timer as Timer1; interface Timer as Timer2; interface Timer as Timer3; interface Timer as Timer4; interface Timer as Timer5; interface LocalTime; interface Random; interface Leds; } } implementation { components DataP, PibP, RadioControlP, DispatchUnslottedCsmaP as DispatchP, #if CAP_TX_QUEUE_SIZE == 1 new NoDispatchQueueP() as DispatchQueueP, #else new DispatchQueueP() as DispatchQueueP, #endif #ifndef IEEE154_INDIRECT_TX_DISABLED IndirectTxP, PollP, #else NoIndirectTxP as IndirectTxP, NoPollP as PollP, #endif #ifndef IEEE154_SCAN_DISABLED ScanP, BeaconRequestRxP, #else NoScanP as ScanP, NoBeaconRequestRxP as BeaconRequestRxP, #endif #ifndef IEEE154_ASSOCIATION_DISABLED AssociateP, #else NoAssociateP as AssociateP, #endif #ifndef IEEE154_DISASSOCIATION_DISABLED DisassociateP, #else NoDisassociateP as DisassociateP, #endif #ifndef IEEE154_RXENABLE_DISABLED RxEnableP, #else NoRxEnableP as RxEnableP, #endif #ifndef IEEE154_PROMISCUOUS_MODE_DISABLED PromiscuousModeP, #else NoPromiscuousModeP as PromiscuousModeP, #endif #ifndef IEEE154_COORD_REALIGNMENT_DISABLED CoordRealignmentP, #else NoCoordRealignmentP as CoordRealignmentP, #endif new PoolC(ieee154_txframe_t, TXFRAME_POOL_SIZE) as TxFramePoolP, new PoolC(ieee154_txcontrol_t, TXCONTROL_POOL_SIZE) as TxControlPoolP, new QueueC(ieee154_txframe_t*, CAP_TX_QUEUE_SIZE) as DispatchQueueC; components MainC; /* MCPS */ MCPS_DATA = DataP; MCPS_PURGE = DataP; /* MLME */ MLME_START = DispatchP; MLME_ASSOCIATE = AssociateP; MLME_DISASSOCIATE = DisassociateP; MLME_BEACON_NOTIFY = ScanP; MLME_COMM_STATUS = AssociateP; MLME_COMM_STATUS = CoordRealignmentP; MLME_GET = PibP; MLME_ORPHAN = CoordRealignmentP; MLME_POLL = PollP; MLME_RESET = PibP; MLME_RX_ENABLE = RxEnableP; MLME_SCAN = ScanP; MLME_SET = PibP; IEEE154Frame = PibP; IEEE154BeaconFrame = PibP; IEEE154TxBeaconPayload = BeaconRequestRxP; PromiscuousMode = PromiscuousModeP; GetLocalExtendedAddress = PibP.GetLocalExtendedAddress; Packet = PibP; TimeCalc = PibP; FrameUtility = PibP; /* ----------------------- Scanning (MLME-SCAN) ----------------------- */ components new RadioClientC(RADIO_CLIENT_SCAN) as ScanRadioClient; PibP.MacReset -> ScanP; ScanP.MLME_GET -> PibP; ScanP.MLME_SET -> PibP.MLME_SET; ScanP.EnergyDetection = EnergyDetection; ScanP.RadioRx -> ScanRadioClient; ScanP.RadioTx -> ScanRadioClient; ScanP.Frame -> PibP; ScanP.BeaconFrame -> PibP; ScanP.RadioOff -> ScanRadioClient; ScanP.ScanTimer = Timer1; ScanP.TxFramePool -> TxFramePoolP; ScanP.TxControlPool -> TxControlPoolP; ScanP.RadioToken -> ScanRadioClient; ScanP.Leds = Leds; ScanP.FrameUtility -> PibP; /* -------------------- Responding to Active Scans --------------------- */ PibP.MacReset -> BeaconRequestRxP; BeaconRequestRxP.BeaconRequestRx -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_BEACON_REQUEST]; BeaconRequestRxP.BeaconRequestResponseTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; BeaconRequestRxP.MLME_GET -> PibP; BeaconRequestRxP.FrameUtility -> PibP; BeaconRequestRxP.Frame -> PibP; /* -------------------- Association (MLME-ASSOCIATE) -------------------- */ PibP.MacReset -> AssociateP; AssociateP.AssociationRequestRx -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_ASSOCIATION_REQUEST]; AssociateP.AssociationRequestTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; AssociateP.AssociationResponseExtracted -> DispatchP.FrameExtracted[FC1_FRAMETYPE_CMD + CMD_FRAME_ASSOCIATION_RESPONSE]; AssociateP.AssociationResponseTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)]; AssociateP.DataRequest -> PollP.DataRequest[ASSOCIATE_POLL_CLIENT]; AssociateP.ResponseTimeout = Timer2; AssociateP.TxFramePool -> TxFramePoolP; AssociateP.TxControlPool -> TxControlPoolP; AssociateP.MLME_GET -> PibP; AssociateP.MLME_SET -> PibP.MLME_SET; AssociateP.FrameUtility -> PibP; AssociateP.Frame -> PibP; AssociateP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress; /* --------------- Disassociation (MLME-DISASSOCIATE) --------------- */ PibP.MacReset -> DisassociateP; DisassociateP.DisassociationIndirectTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)]; DisassociateP.DisassociationDirectTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; DisassociateP.DisassociationToCoord -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; DisassociateP.DisassociationExtractedFromCoord -> DispatchP.FrameExtracted[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION]; DisassociateP.DisassociationRxFromDevice -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION]; DisassociateP.TxFramePool -> TxFramePoolP; DisassociateP.TxControlPool -> TxControlPoolP; DisassociateP.MLME_GET -> PibP; DisassociateP.MLME_SET -> PibP; DisassociateP.FrameUtility -> PibP; DisassociateP.Frame -> PibP; DisassociateP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress; /* ------------------ Data Transmission (MCPS-DATA) ------------------- */ DataP.DeviceCapTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; DataP.CoordCapTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; DataP.DeviceCapRx -> PollP.DataRx; DataP.DeviceCapRx -> PromiscuousModeP.FrameRx; DataP.DeviceCapRx -> DispatchP.FrameRx[FC1_FRAMETYPE_DATA]; DataP.TxFramePool -> TxFramePoolP; DataP.IndirectTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)]; DataP.FrameUtility -> PibP; DataP.Frame -> PibP; DataP.PurgeDirect -> DispatchQueueP; DataP.PurgeIndirect -> IndirectTxP; DataP.MLME_GET -> PibP; DataP.Packet -> PibP; DataP.Leds = Leds; /* ------------------------ Polling (MLME-POLL) ----------------------- */ PibP.MacReset -> PollP; PollP.PollTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; PollP.DataExtracted -> DispatchP.FrameExtracted[FC1_FRAMETYPE_DATA]; PollP.FrameUtility -> PibP; PollP.TxFramePool -> TxFramePoolP; PollP.TxControlPool -> TxControlPoolP; PollP.MLME_GET -> PibP; PollP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress; /* ---------------------- Indirect transmission ----------------------- */ PibP.MacReset -> IndirectTxP; IndirectTxP.CoordCapTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; IndirectTxP.DataRequestRx -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DATA_REQUEST]; IndirectTxP.MLME_GET -> PibP; IndirectTxP.IEEE154Frame -> PibP; IndirectTxP.IndirectTxTimeout = Timer3; IndirectTxP.TimeCalc -> PibP; IndirectTxP.Leds = Leds; /* ---------------------------- Realignment --------------------------- */ PibP.MacReset -> CoordRealignmentP; CoordRealignmentP.CoordRealignmentTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)]; CoordRealignmentP.OrphanNotificationRx -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_ORPHAN_NOTIFICATION]; CoordRealignmentP.FrameUtility -> PibP; CoordRealignmentP.Frame -> PibP; CoordRealignmentP.TxFramePool -> TxFramePoolP; CoordRealignmentP.TxControlPool -> TxControlPoolP; CoordRealignmentP.MLME_GET -> PibP; CoordRealignmentP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress; /* --------------------- DispatchP -------------------- */ PibP.DispatchReset -> DispatchP; PibP.DispatchQueueReset -> DispatchQueueP; DispatchQueueP.Queue -> DispatchQueueC; DispatchQueueP.FrameTxCsma -> DispatchP; components new RadioClientC(unique(IEEE802154_RADIO_RESOURCE)) as DispatchRadioClient; PibP.DispatchReset -> DispatchP; DispatchP.IndirectTxWaitTimer = Timer4; DispatchP.RadioToken -> DispatchRadioClient; DispatchP.SetMacSuperframeOrder -> PibP.SetMacSuperframeOrder; DispatchP.SetMacPanCoordinator -> PibP.SetMacPanCoordinator; DispatchP.IsRxEnableActive -> RxEnableP.IsRxEnableActive; DispatchP.RadioTokenRequested -> DispatchRadioClient; DispatchP.IsRadioTokenRequested -> PibP.IsRadioTokenRequested; // fan out... DispatchP.IsRadioTokenRequested -> PromiscuousModeP.IsRadioTokenRequested; DispatchP.IsRadioTokenRequested -> ScanP.IsRadioTokenRequested; DispatchP.GetIndirectTxFrame -> IndirectTxP; DispatchP.RxEnableStateChange -> RxEnableP.RxEnableStateChange; DispatchP.PIBUpdateMacRxOnWhenIdle -> PibP.PIBUpdate[IEEE154_macRxOnWhenIdle]; DispatchP.FrameUtility -> PibP; DispatchP.UnslottedCsmaCa -> DispatchRadioClient; DispatchP.RadioRx -> DispatchRadioClient; DispatchP.RadioOff -> DispatchRadioClient; DispatchP.MLME_GET -> PibP; DispatchP.MLME_SET -> PibP.MLME_SET; DispatchP.TimeCalc -> PibP; DispatchP.Leds = Leds; /* -------------------------- promiscuous mode ------------------------ */ components new RadioClientC(RADIO_CLIENT_PROMISCUOUSMODE) as PromiscuousModeRadioClient; PibP.MacReset -> PromiscuousModeP; PromiscuousModeP.RadioToken -> PromiscuousModeRadioClient; PromiscuousModeP.PromiscuousRx -> PromiscuousModeRadioClient; PromiscuousModeP.RadioOff -> PromiscuousModeRadioClient; PromiscuousModeP.RadioPromiscuousMode = RadioPromiscuousMode; /* --------------------------- MLME-RX-ENABLE ------------------------ */ PibP.MacReset -> RxEnableP; RxEnableP.TimeCalc -> PibP.TimeCalc; RxEnableP.WasRxEnabled -> DispatchP.WasRxEnabled; RxEnableP.RxEnableTimer = Timer5; /* ------------------------------- PIB -------------------------------- */ components new RadioClientC(RADIO_CLIENT_PIB) as PibRadioClient; PIBUpdate = PibP; MainC.SoftwareInit -> PibP.LocalInit; PibP.RadioControl = PhySplitControl; PibP.Random = Random; PibP.PromiscuousModeGet -> PromiscuousModeP; PibP.LocalTime = LocalTime; PibP.RadioToken -> PibRadioClient; PibP.RadioOff -> PibRadioClient; /* ------------------------- Radio Control ---------------------------- */ RadioControlP.PhyTx = RadioTx; RadioControlP.PhyUnslottedCsmaCa = UnslottedCsmaCa; RadioControlP.PhyRx = RadioRx; RadioControlP.PhyRadioOff = RadioOff; RadioControlP.RadioPromiscuousMode -> PromiscuousModeP; RadioControlP.Leds = Leds; } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/TKN154_MAC.h000066400000000000000000000330611207233610700206440ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Date: 2009-05-28 09:52:54 $ * @author Jan Hauer * ======================================================================== */ #ifndef __TKN154_MAC_H #define __TKN154_MAC_H #include "TKN154.h" #include "TKN154_PHY.h" #include "TKN154_platform.h" /**************************************************** * IEEE 802.15.4 PAN information base identifiers **/ enum { // PHY Sublayer PIB IEEE154_phyCurrentChannel = 0x00, IEEE154_phyChannelsSupported = 0x01, IEEE154_phyTransmitPower = 0x02, IEEE154_phyCCAMode = 0x03, IEEE154_phyCurrentPage = 0x04, IEEE154_phyMaxFrameDuration = 0x05, IEEE154_phySHRDuration = 0x06, IEEE154_phySymbolsPerOctet = 0x07, // MAC Sublayer PIB IEEE154_macAckWaitDuration = 0x40, IEEE154_macAssociatedPANCoord = 0x56, IEEE154_macAssociationPermit = 0x41, IEEE154_macAutoRequest = 0x42, IEEE154_macBattLifeExt = 0x43, IEEE154_macBattLifeExtPeriods = 0x44, IEEE154_macBeaconPayload = 0x45, IEEE154_macBeaconPayloadLength = 0x46, IEEE154_macBeaconOrder = 0x47, IEEE154_macBeaconTxTime = 0x48, IEEE154_macBSN = 0x49, IEEE154_macCoordExtendedAddress = 0x4A, IEEE154_macCoordShortAddress = 0x4B, IEEE154_macDSN = 0x4C, IEEE154_macGTSPermit = 0x4D, IEEE154_macMaxBE = 0x57, IEEE154_macMaxCSMABackoffs = 0x4E, IEEE154_macMaxFrameTotalWaitTime = 0x58, IEEE154_macMaxFrameRetries = 0x59, IEEE154_macMinBE = 0x4F, IEEE154_macMinLIFSPeriod = 0xA0, IEEE154_macMinSIFSPeriod = 0xA1, IEEE154_macPANId = 0x50, IEEE154_macPromiscuousMode = 0x51, IEEE154_macResponseWaitTime = 0x5A, IEEE154_macRxOnWhenIdle = 0x52, IEEE154_macSecurityEnabled = 0x5D, IEEE154_macShortAddress = 0x53, IEEE154_macSuperframeOrder = 0x54, IEEE154_macSyncSymbolOffset = 0x5B, IEEE154_macTimestampSupported = 0x5C, IEEE154_macTransactionPersistenceTime = 0x55, // custom attributes (not present in the standard PIB) IEEE154_macPanCoordinator = 0xF0, }; enum { // MAC header indices MHR_INDEX_FC1 = 0, MHR_INDEX_FC2 = 1, MHR_INDEX_SEQNO = 2, MHR_INDEX_ADDRESS = 3, MHR_MAX_LEN = 23, // Frame Control field in MHR FC1_FRAMETYPE_BEACON = 0x00, FC1_FRAMETYPE_DATA = 0x01, FC1_FRAMETYPE_ACK = 0x02, FC1_FRAMETYPE_CMD = 0x03, FC1_FRAMETYPE_MASK = 0x07, FC1_SECURITY_ENABLED = 0x08, FC1_FRAME_PENDING = 0x10, FC1_ACK_REQUEST = 0x20, FC1_PAN_ID_COMPRESSION = 0x40, FC2_DEST_MODE_SHORT = 0x08, FC2_DEST_MODE_EXTENDED = 0x0c, FC2_DEST_MODE_MASK = 0x0c, FC2_DEST_MODE_OFFSET = 2, FC2_SRC_MODE_SHORT = 0x80, FC2_SRC_MODE_EXTENDED = 0xc0, FC2_SRC_MODE_MASK = 0xc0, FC2_SRC_MODE_OFFSET = 6, FC2_FRAME_VERSION_1 = 0x10, FC2_FRAME_VERSION_2 = 0x20, FC2_FRAME_VERSION_MASK = 0x30, }; /** some unique strings */ #define SYNC_POLL_CLIENT unique("PollP.client") #define ASSOCIATE_POLL_CLIENT unique("PollP.client") #define CAP_TX_CLIENT "CapQueueP.FrameTx.client" #define INDIRECT_TX_CLIENT "IndirectTx.client" #define IEEE802154_RADIO_RESOURCE "RadioRxTxP.resource" enum { // The following identfiers map to components that access the radio // via RadioClientC(). They are used as parameters for RadioClientC(), // the TransferableResource.transferTo() command and in // the TransferableResource.transferredFrom() event RADIO_CLIENT_SCAN = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_PIB = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_PROMISCUOUSMODE = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_BEACONTRANSMIT = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_COORDBROADCAST = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_COORDCAP = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_COORDCFP = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_COORD_INACTIVE_PERIOD = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_BEACONSYNCHRONIZE = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_DEVICECAP = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_DEVICECFP = unique(IEEE802154_RADIO_RESOURCE), RADIO_CLIENT_DEVICE_INACTIVE_PERIOD = unique(IEEE802154_RADIO_RESOURCE), }; enum { // parameter for the generic DispatchSlottedCsmaP OUTGOING_SUPERFRAME, INCOMING_SUPERFRAME, }; /**************************************************** * Default time-related constants for beacon-enabled PANs, * these may be overridden by platform-specific constants. * */ #ifndef IEEE154_MAX_BEACON_JITTER // will start to listen for a beacon MAX_BEACON_JITTER_TIME(BO) symbols // before its expected arrival, where BO is the current beacon order // (here --by default-- BO is ignored) #define IEEE154_MAX_BEACON_JITTER(BO) 20 #endif #ifndef IEEE154_MAX_BEACON_LISTEN_TIME // maximum time to listen for a beacon after its expected arrival, // before it is declared as missed #define IEEE154_MAX_BEACON_LISTEN_TIME(BO) (128 * IEEE154_SYMBOLS_PER_OCTET + IEEE154_MAX_BEACON_JITTER(BO)) #endif typedef struct { uint8_t length; // top bit denotes -> promiscuous mode uint8_t mhr[MHR_MAX_LEN]; #ifndef TKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED // This is a workaround: both, network and AM ID, are actually part of the // MAC payload, but in the TinyOS world they are part of the header. To // support bridging between between radio and serial stack above AM layer // we will let it look like TinyOS expects it to look like, which involves // some extra overhead in our AM layer (a memmove) as well as adding the // one (or two) struct members below. #ifndef TFRAMES_ENABLED /** I-Frame 6LowPAN interoperability byte */ uint8_t network; #endif /** Active Message identifier */ uint8_t type; #endif } ieee154_header_t; typedef nx_struct { nx_uint32_t timestamp; nx_int8_t rssi; nx_uint8_t linkQuality; } ieee154_metadata_t; typedef struct { ieee154_header_t *header; uint8_t *payload; ieee154_metadata_t *metadata; uint8_t headerLen; uint8_t payloadLen; uint8_t client; uint8_t handle; } ieee154_txframe_t; typedef struct { ieee154_header_t header; ieee154_metadata_t metadata; } ieee154_txcontrol_t; typedef struct ieee154_csma { uint8_t BE; // initial backoff exponent uint8_t macMaxBE; // maximum backoff exponent uint8_t macMaxCsmaBackoffs; // maximum number of allowed backoffs uint8_t NB; // number of backoff during current transmission } ieee154_csma_t; typedef struct { uint32_t transactionTime; ieee154_txframe_t *frame; ieee154_csma_t csma; } ieee154_cap_frame_backup_t; #define MHR(x) (((ieee154_header_t*) (x)->header)->mhr) // COMMAND frames enum { CMD_FRAME_ASSOCIATION_REQUEST = 1, CMD_FRAME_ASSOCIATION_RESPONSE = 2, CMD_FRAME_DISASSOCIATION_NOTIFICATION = 3, CMD_FRAME_DATA_REQUEST = 4, CMD_FRAME_PAN_ID_CONFLICT_NOTIFICATION = 5, CMD_FRAME_ORPHAN_NOTIFICATION = 6, CMD_FRAME_BEACON_REQUEST = 7, CMD_FRAME_COORDINATOR_REALIGNMENT = 8, CMD_FRAME_GTS_REQUEST = 9 }; enum { // MAC payload fields inside a beacon frame BEACON_INDEX_SF_SPEC1 = 0, BEACON_INDEX_SF_SPEC2 = 1, BEACON_INDEX_GTS_SPEC = 2, SF_SPEC1_BO_MASK = 0x0F, SF_SPEC1_BO_OFFSET = 0, SF_SPEC1_SO_MASK = 0xF0, SF_SPEC1_SO_OFFSET = 4, SF_SPEC2_FINAL_CAPSLOT_MASK = 0x0F, SF_SPEC2_FINAL_CAPSLOT_OFFSET = 0, SF_SPEC2_BATT_LIFE_EXT = 0x10, SF_SPEC2_PAN_COORD = 0x40, SF_SPEC2_ASSOCIATION_PERMIT = 0x80, GTS_DESCRIPTOR_COUNT_MASK = 0x07, GTS_DESCRIPTOR_COUNT_OFFSET = 0, GTS_LENGTH_MASK = 0xF0, GTS_LENGTH_OFFSET = 4, GTS_SPEC_PERMIT = 0x80, PENDING_ADDRESS_SHORT_MASK = 0x07, PENDING_ADDRESS_EXT_MASK = 0x70, }; enum { // PHY sublayer constants IEEE154_aTurnaroundTime = 12, FRAMECTL_LENGTH_MASK = 0x7F, // "length" member in ieee154_header_t FRAMECTL_PROMISCUOUS = 0x80, // "length" member in ieee154_header_t }; #define IEEE154_SUPPORTED_CHANNELPAGE (IEEE154_SUPPORTED_CHANNELS >> 27) enum { // MAC sublayer constants IEEE154_aNumSuperframeSlots = 16, IEEE154_aMaxMPDUUnsecuredOverhead = 25, IEEE154_aMinMPDUOverhead = 9, IEEE154_aBaseSlotDuration = 60, IEEE154_aBaseSuperframeDuration = (IEEE154_aBaseSlotDuration * IEEE154_aNumSuperframeSlots), IEEE154_aGTSDescPersistenceTime = 4, IEEE154_aMaxBeaconOverhead = 75, IEEE154_aMaxBeaconPayloadLength = (IEEE154_aMaxPHYPacketSize - IEEE154_aMaxBeaconOverhead), IEEE154_aMaxLostBeacons = 4, IEEE154_aMaxMACSafePayloadSize = (IEEE154_aMaxPHYPacketSize - IEEE154_aMaxMPDUUnsecuredOverhead), IEEE154_aMaxMACPayloadSize = (IEEE154_aMaxPHYPacketSize - IEEE154_aMinMPDUOverhead), IEEE154_aMaxSIFSFrameSize = 18, IEEE154_aMinCAPLength = 440, IEEE154_aUnitBackoffPeriod = 20, }; // combine function for IsRadioTokenRequested (GetNow) interface typedef bool token_requested_t __attribute__((combine(rcombine))); token_requested_t rcombine(token_requested_t r1, token_requested_t r2) { return r1 || r2; } #ifdef TKN154_DEBUG /****************************************************************** * ATTENTION! Debugging over serial is a lot of overhead. To * keep it simple, here are the rules you have to follow when * using the dbg_serial() macro: * * - dbg_serial() is used like dbg(), i.e. you pass it at least * two strings, the first one describing the component/file, * the second is a format string (like in printf()) * - following the second string, there may be zero up to * two parameters -- these must be (cast to) uint32_t and * the format specifier must be "%lu", e.g. * dbg_serial("MyComponentP", "Value: %lu\n", (uint32_t) val); * - both strings must be constants (pointers always valid) * - no data is sent over serial, unless dbg_serial_flush() is * called; try to call it when the system is idle or at least * when no time-critical operations are pending; on TelosB * you can also press the user button to trigger a flush * - on the PC use the printf java client to display the debug * output (see tinyos-2.x/apps/tests/TestPrintf/README.txt); * the output format is component:line-in-source-code:text * * The ASSERT(X) macro is used to test for errors. If X evaluates * to zero, then 3 leds start blinking simulataneously (about 2Hz) * and the node *continuously* outputs over serial the filename/line * where the (first) ASSERT has failed. This means, even if your * TelosB was not attached to your PC while the ASSERT failed you * can typically still pull the information out later. * * When TKN154_DEBUG is not defined (which is the default), then * dbg_serial() maps to dbg(), i.e. is completely removed unless * the platform is TOSSIM, and in the ASSERT(X) statement X is * evaluated/executed, but the result is ignored. **/ /* -> functions are defined in DebugP.nc */ void tkn154_assert(bool val, const char *filename, uint16_t line, const char *func); void tkn154_dbg_serial(const char *filename, uint16_t line, ...); void tkn154_dbg_serial_flush(); #define ASSERT(X) tkn154_assert(X, __FILE__,__LINE__,__FUNCTION__) #define dbg_serial(m, ...) tkn154_dbg_serial(m, __LINE__,__VA_ARGS__) #define dbg_serial_flush() tkn154_dbg_serial_flush() #else // Note: in an ASSERT(X) the X must always be evaluated/executed! #define ASSERT(X) while(!(X)){ break;} #define dbg_serial(m, ...) dbg(m, __VA_ARGS__) #define dbg_serial_flush() #endif #endif // __TKN154_MAC_H tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/TKN154_PIB.h000066400000000000000000000176221207233610700206630ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Date: 2009-03-04 18:31:37 $ * @author Torsten Halbhuebner * @author Jan Hauer * ======================================================================== */ #ifndef __TKN154_PIB_H #define __TKN154_PIB_H /**************************************************** * IEEE 802.15.4 PAN information base (PIB) */ typedef struct ieee154_PIB { /** bool types */ // 0x41 ieee154_macAssociationPermit_t macAssociationPermit; // 0x42 ieee154_macAutoRequest_t macAutoRequest; // 0x43 ieee154_macBattLifeExt_t macBattLifeExt; // 0x4D ieee154_macGTSPermit_t macGTSPermit; // 0x51 ieee154_macPromiscuousMode_t macPromiscuousMode; // 0x52 ieee154_macRxOnWhenIdle_t macRxOnWhenIdle; // 0x56 ieee154_macAssociatedPANCoord_t macAssociatedPANCoord; // 0x5D ieee154_macSecurityEnabled_t macSecurityEnabled; // custom attribute ieee154_macPanCoordinator_t macPanCoordinator; /** uint8_t types */ // 0x00 ieee154_phyCurrentChannel_t phyCurrentChannel; // 0x02 ieee154_phyTransmitPower_t phyTransmitPower; // 0x03 ieee154_phyCCAMode_t phyCCAMode; // 0x04 ieee154_phyCurrentPage_t phyCurrentPage; // 0x44 ieee154_macBattLifeExtPeriods_t macBattLifeExtPeriods; // 0x46 ieee154_macBeaconPayloadLength_t macBeaconPayloadLength; // 0x47 ieee154_macBeaconOrder_t macBeaconOrder; // 0x49 ieee154_macBSN_t macBSN; // 0x4C ieee154_macDSN_t macDSN; // 0x4E ieee154_macMaxCSMABackoffs_t macMaxCSMABackoffs; // 0x4F ieee154_macMinBE_t macMinBE; // 0x54 ieee154_macSuperframeOrder_t macSuperframeOrder; // 0x57 ieee154_macMaxBE_t macMaxBE; // 0x59 ieee154_macMaxFrameRetries_t macMaxFrameRetries; // 0x5a ieee154_macResponseWaitTime_t macResponseWaitTime; /** larger than uint8_t types */ // 0x4B ieee154_macCoordShortAddress_t macCoordShortAddress; // 0x50 ieee154_macPANId_t macPANId; // 0x53 ieee154_macShortAddress_t macShortAddress; // 0x55 ieee154_macTransactionPersistenceTime_t macTransactionPersistenceTime; // TODO: check type ieee154_macMaxFrameTotalWaitTime_t macMaxFrameTotalWaitTime; ieee154_macBeaconTxTime_t macBeaconTxTime; // 0x4A ieee154_macCoordExtendedAddress_t macCoordExtendedAddress; } ieee154_PIB_t; // PHY PIB default attributes #ifndef IEEE154_DEFAULT_CURRENTCHANNEL #define IEEE154_DEFAULT_CURRENTCHANNEL 26 #endif #ifndef IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE0 #define IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE0 0x07FFF800 #endif #ifndef IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE1 #define IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE1 0 #endif #ifndef IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE2 #define IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE2 0 #endif #ifndef IEEE154_DEFAULT_CCAMODE #define IEEE154_DEFAULT_CCAMODE 3 #endif #ifndef IEEE154_DEFAULT_CURRENTPAGE #define IEEE154_DEFAULT_CURRENTPAGE 0 #endif #ifndef IEEE154_DEFAULT_TRANSMITPOWER_dBm #define IEEE154_DEFAULT_TRANSMITPOWER_dBm 0 #endif // MAC PIB default attributes #ifndef IEEE154_DEFAULT_ASSOCIATEDPANCOORD #define IEEE154_DEFAULT_ASSOCIATEDPANCOORD FALSE #endif #ifndef IEEE154_DEFAULT_ASSOCIATIONPERMIT #define IEEE154_DEFAULT_ASSOCIATIONPERMIT FALSE #endif #ifndef IEEE154_DEFAULT_AUTOREQUEST #define IEEE154_DEFAULT_AUTOREQUEST TRUE #endif #ifndef IEEE154_DEFAULT_BATTLIFEEXT #define IEEE154_DEFAULT_BATTLIFEEXT FALSE #endif #ifndef IEEE154_DEFAULT_BATTLIFEEXTPERIODS #define IEEE154_DEFAULT_BATTLIFEEXTPERIODS 6 #endif #ifndef IEEE154_DEFAULT_BEACONPAYLOAD #define IEEE154_DEFAULT_BEACONPAYLOAD NULL #endif #ifndef IEEE154_DEFAULT_BEACONPAYLOADLENGTH #define IEEE154_DEFAULT_BEACONPAYLOADLENGTH 0 #endif #ifndef IEEE154_DEFAULT_BEACONORDER #define IEEE154_DEFAULT_BEACONORDER 15 #endif #ifndef IEEE154_DEFAULT_BEACONTXTIME #define IEEE154_DEFAULT_BEACONTXTIME 0 #endif #ifndef IEEE154_DEFAULT_COORDSHORTADDRESS #define IEEE154_DEFAULT_COORDSHORTADDRESS 0xFFFF #endif #ifndef IEEE154_DEFAULT_GTSPERMIT #define IEEE154_DEFAULT_GTSPERMIT TRUE #endif #ifndef IEEE154_DEFAULT_MAXBE #define IEEE154_DEFAULT_MAXBE 5 #endif #ifndef IEEE154_DEFAULT_MAXCSMABACKOFFS #define IEEE154_DEFAULT_MAXCSMABACKOFFS 4 #endif #ifndef IEEE154_DEFAULT_MAXFRAMETOTALWAITTIME #define IEEE154_DEFAULT_MAXFRAMETOTALWAITTIME 2626 #endif #ifndef IEEE154_DEFAULT_MAXFRAMERETRIES #define IEEE154_DEFAULT_MAXFRAMERETRIES 3 #endif #ifndef IEEE154_DEFAULT_MINBE #define IEEE154_DEFAULT_MINBE 3 #endif #ifndef IEEE154_DEFAULT_MINLIFSPERIOD #define IEEE154_DEFAULT_MINLIFSPERIOD 40 #endif #ifndef IEEE154_DEFAULT_MINSIFSPERIOD #define IEEE154_DEFAULT_MINSIFSPERIOD 12 #endif #ifndef IEEE154_DEFAULT_PANID #define IEEE154_DEFAULT_PANID 0xFFFF #endif #ifndef IEEE154_DEFAULT_PROMISCUOUSMODE #define IEEE154_DEFAULT_PROMISCUOUSMODE FALSE #endif #ifndef IEEE154_DEFAULT_RESPONSEWAITTIME #define IEEE154_DEFAULT_RESPONSEWAITTIME 32 #endif #ifndef IEEE154_DEFAULT_RXONWHENIDLE #define IEEE154_DEFAULT_RXONWHENIDLE FALSE #endif #ifndef IEEE154_DEFAULT_SECURITYENABLED #define IEEE154_DEFAULT_SECURITYENABLED FALSE #endif #ifndef IEEE154_DEFAULT_SHORTADDRESS #define IEEE154_DEFAULT_SHORTADDRESS 0xFFFF #endif #ifndef IEEE154_DEFAULT_SUPERFRAMEORDER #define IEEE154_DEFAULT_SUPERFRAMEORDER 15 #endif #ifndef IEEE154_DEFAULT_SYNCSYMBOLOFFSET #define IEEE154_DEFAULT_SYNCSYMBOLOFFSET 0 #endif #ifndef IEEE154_DEFAULT_TIMESTAMPSUPPORTED #define IEEE154_DEFAULT_TIMESTAMPSUPPORTED TRUE #endif #ifndef IEEE154_DEFAULT_TRANSACTIONPERSISTENCETIME #define IEEE154_DEFAULT_TRANSACTIONPERSISTENCETIME 0x01F4 #endif #ifndef IEEE154_DEFAULT_MACPANCOORDINATOR #define IEEE154_DEFAULT_MACPANCOORDINATOR FALSE #endif #define IEEE154_INVALID_TIMESTAMP (0xffffffff) #endif // __TKN154_PIB_H tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/000077500000000000000000000000001207233610700205655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoAssociateP.nc000066400000000000000000000121431207233610700234400ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:39 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for AssociateP. */ #include "TKN154_MAC.h" module NoAssociateP { provides { interface Init; interface MLME_ASSOCIATE; interface MLME_COMM_STATUS; } uses { interface FrameRx as AssociationRequestRx; interface FrameTx as AssociationRequestTx; interface FrameExtracted as AssociationResponseExtracted; interface FrameTx as AssociationResponseTx; interface DataRequest; interface Timer as ResponseTimeout; interface Pool as TxFramePool; interface Pool as TxControlPool; interface MLME_GET; interface MLME_SET; interface FrameUtility; interface IEEE154Frame as Frame; interface Get as LocalExtendedAddress; } } implementation { command error_t Init.init() { return SUCCESS; } /* ------------------- MLME_ASSOCIATE Request ------------------- */ command ieee154_status_t MLME_ASSOCIATE.request ( uint8_t LogicalChannel, uint8_t ChannelPage, uint8_t CoordAddrMode, uint16_t CoordPANID, ieee154_address_t CoordAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ) { return IEEE154_TRANSACTION_OVERFLOW; } event void AssociationRequestTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { } event void ResponseTimeout.fired() { } event message_t* AssociationResponseExtracted.received(message_t* frame, ieee154_txframe_t *txFrame) { return frame; } event void DataRequest.pollDone() { } /* ------------------- MLME_ASSOCIATE Response ------------------- */ event message_t* AssociationRequestRx.received(message_t* frame) { return frame; } command ieee154_status_t MLME_ASSOCIATE.response ( uint64_t deviceAddress, uint16_t assocShortAddress, ieee154_association_status_t status, ieee154_security_t *security ) { return IEEE154_TRANSACTION_OVERFLOW; } event void AssociationResponseTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { } /* ------------------- Defaults ------------------- */ default event void MLME_ASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ){} default event void MLME_ASSOCIATE.confirm ( uint16_t AssocShortAddress, uint8_t status, ieee154_security_t *security ){} default event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security ){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoBeaconRequestRxP.nc000066400000000000000000000057241207233610700246060ustar00rootroot00000000000000/* * Copyright (c) 2009, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-05-28 09:52:54 $ * @author: Jasper Buesch * ======================================================================== */ /** Empty placeholder component for BeaconRequestRxP. */ #include "TKN154_MAC.h" #include "TKN154.h" module NoBeaconRequestRxP { provides { interface Init as Reset; interface IEEE154TxBeaconPayload; } uses { interface FrameRx as BeaconRequestRx; interface FrameTx as BeaconRequestResponseTx; interface MLME_GET; interface FrameUtility; interface IEEE154Frame as Frame; } } implementation { command error_t Reset.init() { return SUCCESS; } event message_t* BeaconRequestRx.received(message_t* frame) { return frame; } event void BeaconRequestResponseTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status){ } /* ----------------------- Beacon Payload ----------------------- */ command error_t IEEE154TxBeaconPayload.setBeaconPayload(void *beaconPayload, uint8_t length) { return EOFF; } command const void* IEEE154TxBeaconPayload.getBeaconPayload(){ return NULL; } command uint8_t IEEE154TxBeaconPayload.getBeaconPayloadLength(){ return 0; } command error_t IEEE154TxBeaconPayload.modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength){ return EOFF; } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoBeaconSynchronizeP.nc000066400000000000000000000111761207233610700251550ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2009-03-24 12:56:47 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for BeaconSynchronizeP. */ #include "TKN154_MAC.h" module NoBeaconSynchronizeP { provides { interface Init as Reset; interface MLME_SYNC; interface MLME_BEACON_NOTIFY; interface MLME_SYNC_LOSS; interface SuperframeStructure as IncomingSF; interface GetNow as IsTrackingBeacons; interface StdControl as TrackSingleBeacon; } uses { interface MLME_GET; interface MLME_SET; interface FrameUtility; interface IEEE154BeaconFrame as BeaconFrame; interface Alarm as TrackAlarm; interface RadioRx as BeaconRx; interface RadioOff; interface DataRequest; interface FrameRx as CoordRealignmentRx; interface TransferableResource as RadioToken; interface TimeCalc; interface IEEE154Frame as Frame; interface Leds; } } implementation { command error_t Reset.init() { return SUCCESS; } command ieee154_status_t MLME_SYNC.request ( uint8_t logicalChannel, uint8_t channelPage, bool trackBeacon) { return IEEE154_TRANSACTION_OVERFLOW; } event void RadioToken.granted() { } async event void RadioToken.transferredFrom(uint8_t fromClient) { call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT); } async event void RadioOff.offDone() { } async event void BeaconRx.enableRxDone() { } async event void TrackAlarm.fired() { } event message_t* BeaconRx.received(message_t *frame) { return frame; } command error_t TrackSingleBeacon.start() { return FAIL; } command error_t TrackSingleBeacon.stop() { return FAIL; } /* ----------------------- SF Structure, etc. ----------------------- */ async command uint32_t IncomingSF.sfStartTime() { return 0; } async command uint32_t IncomingSF.sfSlotDuration() { return 0; } async command uint8_t IncomingSF.numCapSlots() { return 0; } async command uint8_t IncomingSF.numGtsSlots() { return 0; } async command uint16_t IncomingSF.battLifeExtDuration() { return 0; } async command const uint8_t* IncomingSF.gtsFields() { return NULL; } async command uint16_t IncomingSF.guardTime() { return 0; } async command bool IncomingSF.isBroadcastPending() { return 0; } async command uint32_t IncomingSF.beaconInterval() { return 0;} async command bool IsTrackingBeacons.getNow() { return 0; } event void DataRequest.pollDone(){} default event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame){return frame;} default event void MLME_SYNC_LOSS.indication ( ieee154_status_t lossReason, uint16_t panID, uint8_t logicalChannel, uint8_t channelPage, ieee154_security_t *security){} event message_t* CoordRealignmentRx.received(message_t* frame) { return frame; } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoBeaconTransmitP.nc000066400000000000000000000140451207233610700244410ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.8 $ * $Date: 2009-12-14 16:46:49 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for BeaconTransmitP. */ #include "TKN154_MAC.h" #include "TKN154_PHY.h" module NoBeaconTransmitP { provides { interface Init as Reset; interface MLME_START; interface IEEE154TxBeaconPayload; interface SuperframeStructure as OutgoingSF; interface GetNow as IsSendingBeacons; } uses { interface Notify as GtsSpecUpdated; interface Notify as PendingAddrSpecUpdated; interface Notify as PIBUpdate[uint8_t attributeID]; interface Alarm as BeaconSendAlarm; interface Timer as BeaconPayloadUpdateTimer; interface RadioOff; interface RadioTx as BeaconTx; interface MLME_GET; interface MLME_SET; interface TransferableResource as RadioToken; interface FrameTx as RealignmentBeaconEnabledTx; interface FrameTx as RealignmentNonBeaconEnabledTx; interface FrameRx as BeaconRequestRx; interface WriteBeaconField as GtsInfoWrite; interface WriteBeaconField as PendingAddrWrite; interface FrameUtility; interface GetNow as IsTrackingBeacons; interface SuperframeStructure as IncomingSF; interface Set as SetMacSuperframeOrder; interface Set as SetMacBeaconTxTime; interface Set as SetMacPanCoordinator; interface GetSet as GetSetRealignmentFrame; interface GetNow as IsBroadcastReady; interface TimeCalc; interface Random; interface Leds; } } implementation { command error_t Reset.init() { return SUCCESS; } command ieee154_status_t MLME_START.request ( uint16_t panID, uint8_t logicalChannel, uint8_t channelPage, uint32_t startTime, uint8_t beaconOrder, uint8_t superframeOrder, bool panCoordinator, bool batteryLifeExtension, bool coordRealignment, ieee154_security_t *coordRealignSecurity, ieee154_security_t *beaconSecurity) { return IEEE154_TRANSACTION_OVERFLOW; } event void RadioToken.granted() { } async event void RadioToken.transferredFrom(uint8_t from) { call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE); } async event void RadioOff.offDone() { } async event void BeaconSendAlarm.fired() {} async event void BeaconTx.transmitDone(ieee154_txframe_t *frame, error_t result){} command error_t IEEE154TxBeaconPayload.setBeaconPayload(void *beaconPayload, uint8_t length) { return ESIZE; } command const void* IEEE154TxBeaconPayload.getBeaconPayload() { return NULL; } command uint8_t IEEE154TxBeaconPayload.getBeaconPayloadLength() {return 0; } command error_t IEEE154TxBeaconPayload.modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength) { return ESIZE; } event void PIBUpdate.notify[uint8_t attributeID](const void* attributeValue) { } event void PendingAddrSpecUpdated.notify(bool val) { } event void GtsSpecUpdated.notify(bool val) { } event void BeaconPayloadUpdateTimer.fired() { } event void RealignmentBeaconEnabledTx.transmitDone(ieee154_txframe_t *frame, ieee154_status_t status) { } event void RealignmentNonBeaconEnabledTx.transmitDone(ieee154_txframe_t *frame, ieee154_status_t status) { } event message_t* BeaconRequestRx.received(message_t* frame) { return frame; } async command uint32_t OutgoingSF.sfStartTime() {return 0;} async command uint32_t OutgoingSF.sfSlotDuration() {return 0;} async command uint8_t OutgoingSF.numCapSlots() {return 0;} async command uint8_t OutgoingSF.numGtsSlots() {return 0;} async command uint16_t OutgoingSF.battLifeExtDuration() {return 0;} async command const uint8_t* OutgoingSF.gtsFields() {return NULL;} async command uint16_t OutgoingSF.guardTime() {return 0;} async command bool OutgoingSF.isBroadcastPending() {return FALSE;} async command uint32_t OutgoingSF.beaconInterval() { return 0;} async command bool IsSendingBeacons.getNow() {return FALSE;} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoCoordBroadcastP.nc000066400000000000000000000060521207233610700244200ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-24 12:56:47 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for CoordBroadcastP. */ #include "TKN154_MAC.h" module NoCoordBroadcastP { provides { interface Init as Reset; interface FrameTx as BroadcastDataFrame; interface FrameTx as RealignmentTx; interface GetNow as IsBroadcastReady; } uses { interface Queue; interface FrameTxNow as CapTransmitNow; interface TransferableResource as RadioToken; interface GetNow as BeaconFramePendingBit; interface SuperframeStructure as OutgoingSF; interface Leds; } } implementation { command error_t Reset.init() { return SUCCESS; } command ieee154_status_t BroadcastDataFrame.transmit(ieee154_txframe_t *txFrame) { return IEEE154_TRANSACTION_OVERFLOW; } command ieee154_status_t RealignmentTx.transmit(ieee154_txframe_t *frame) { return IEEE154_TRANSACTION_OVERFLOW; } async command bool IsBroadcastReady.getNow() { return FALSE; } async event void RadioToken.transferredFrom(uint8_t fromClient) { call RadioToken.transferTo(RADIO_CLIENT_COORDCAP); } async event void CapTransmitNow.transmitNowDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { } event void RadioToken.granted(){ } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoCoordCfpP.nc000066400000000000000000000160221207233610700232240ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.7 $ * $Date: 2009-03-24 12:56:47 $ * @author Jan Hauer * ======================================================================== */ /* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ /** * The contention free period (CFP) in beacon mode, a.k.a. GTS, is not yet * implemented - this is only an empty placeholder. In contrast to the CAP * component the GTS component for an incoming superframe will probably be very * different from the GTS for an outgoing superframe. That is why there are two * separate placeholder components (DeviceCfpP and CoordCfpP) instead of one * generic CfpP component. This component would deal with the GTS for an * outgoing superframe, i.e. from the perspective of a coordinator. */ #include "TKN154_MAC.h" module NoCoordCfpP { provides { interface Init; interface WriteBeaconField as GtsInfoWrite; interface FrameTx as CfpTx; interface Purge; interface FrameRx; interface Notify as GtsSpecUpdated; interface MLME_GTS; } uses { interface TransferableResource as RadioToken; interface Alarm as CfpSlotAlarm; interface Alarm as CfpEndAlarm; interface SuperframeStructure as OutgoingSF; interface RadioTx; interface RadioRx; interface RadioOff; interface MLME_GET; interface MLME_SET; interface FrameRx as GtsRequestRx; interface IEEE154Frame as Frame; } } implementation { command error_t Init.init() { return SUCCESS; } command ieee154_status_t CfpTx.transmit(ieee154_txframe_t *data) { return IEEE154_INVALID_GTS; } command ieee154_status_t Purge.purge(uint8_t msduHandle) { // request to purge a frame (triggered by MCPS_DATA.purge()) return IEEE154_INVALID_HANDLE; } async event void RadioToken.transferredFrom(uint8_t fromClient) { #ifndef IEEE154_BEACON_SYNC_DISABLED call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE); #else call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT); #endif } async event void CfpEndAlarm.fired() {} async event void CfpSlotAlarm.fired() {} async event void RadioOff.offDone() {} event message_t* GtsRequestRx.received(message_t* frame) { return(frame); } command uint8_t GtsInfoWrite.write(uint8_t *lastBytePtr, uint8_t maxlen) { if (maxlen == 0) return 0; else { lastBytePtr[0] = 0; // GTS Specifications return 1; } } async event void RadioTx.transmitDone( ieee154_txframe_t *frame, error_t result) {} async event void RadioRx.enableRxDone(){} event message_t* RadioRx.received(message_t *frame) { return signal FrameRx.received(frame); } event void RadioToken.granted() { ASSERT(0); // should never happen, because we never call RadioToken.request() } command ieee154_status_t MLME_GTS.request ( uint8_t GtsCharacteristics, ieee154_security_t *security ) { //This is used in case the Coordinator whishes to deallocate a gts } command ieee154_status_t MLME_GTS.requestFromPAN ( //Only for PAN Coordinator use uint8_t GtsCharacteristics, uint16_t DeviceAddress, ieee154_security_t *security ){} command error_t GtsSpecUpdated.enable() {return FAIL;} command error_t GtsSpecUpdated.disable() {return FAIL;} default event void GtsSpecUpdated.notify( bool val ) {return;} default event void MLME_GTS.indication ( uint16_t DeviceAddress, uint8_t GtsCharacteristics, ieee154_security_t *security ){} default event void MLME_GTS.confirm ( uint8_t GtsCharacteristics, ieee154_status_t status ){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoCoordRealignmentP.nc000066400000000000000000000074271207233610700247720ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:40 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for CoordRealignmentP. */ #include "TKN154_MAC.h" module NoCoordRealignmentP { provides { interface Init; interface MLME_ORPHAN; interface MLME_COMM_STATUS; interface GetSet as GetSetRealignmentFrame; } uses { interface FrameTx as CoordRealignmentTx; interface FrameRx as OrphanNotificationRx; interface FrameUtility; interface MLME_GET; interface IEEE154Frame as Frame; interface Pool as TxFramePool; interface Pool as TxControlPool; interface Get as LocalExtendedAddress; } } implementation { command error_t Init.init() { return SUCCESS; } command ieee154_txframe_t* GetSetRealignmentFrame.get() { return NULL; } command void GetSetRealignmentFrame.set(ieee154_txframe_t* frame) { } event message_t* OrphanNotificationRx.received(message_t* frame) { return frame; } command ieee154_status_t MLME_ORPHAN.response ( uint64_t OrphanAddress, uint16_t ShortAddress, bool AssociatedMember, ieee154_security_t *security ) { return IEEE154_TRANSACTION_OVERFLOW; } event void CoordRealignmentTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { } default event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security ){} default event void MLME_ORPHAN.indication ( uint64_t OrphanAddress, ieee154_security_t *security ){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoDeviceCfpP.nc000066400000000000000000000152401207233610700233560ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.7 $ * $Date: 2009-03-24 12:56:47 $ * @author Jan Hauer * ======================================================================== */ /* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ /** * The contention free period (CFP) in beacon mode, a.k.a. GTS, is not yet * implemented - this is only an empty placeholder. In contrast to the CAP * component the GTS component for an incoming superframe will probably be very * different from the GTS for an outgoing superframe. That is why there are two * separate placeholder components (DeviceCfpP and CoordCfpP) instead of one * generic CfpP component. This component would deal with the GTS for an * incoming superframe, i.e. from the perspective of a device. */ #include "TKN154_MAC.h" module NoDeviceCfpP { provides { interface Init; interface FrameTx as CfpTx; interface Purge; interface FrameRx; interface MLME_GTS; } uses { interface TransferableResource as RadioToken; interface Alarm as CfpSlotAlarm; interface Alarm as CfpEndAlarm; interface SuperframeStructure as IncomingSF; interface RadioTx; interface RadioRx; interface RadioOff; interface MLME_GET; interface MLME_SET; interface FrameTx as GTSrequestTx; interface Pool as TxFramePool; interface Pool as TxControlPool; interface FrameUtility; } } implementation { command error_t Init.init() { return SUCCESS; } command ieee154_status_t MLME_GTS.requestFromPAN ( uint8_t GtsCharacteristics, uint16_t DeviceAddress, ieee154_security_t *security ) { return IEEE154_INVALID_GTS; } command ieee154_status_t MLME_GTS.request ( uint8_t GtsCharacteristics, ieee154_security_t *security ) { return IEEE154_INVALID_GTS; } command ieee154_status_t CfpTx.transmit(ieee154_txframe_t *data) { return IEEE154_INVALID_GTS; } command ieee154_status_t Purge.purge(uint8_t msduHandle) { // request to purge a frame (triggered by MCPS_DATA.purge()) return IEEE154_INVALID_HANDLE; } async event void RadioToken.transferredFrom(uint8_t fromClient) { #ifndef IEEE154_BEACON_TX_DISABLED call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT); #else call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE); #endif } async event void CfpEndAlarm.fired() {} async event void CfpSlotAlarm.fired() {} async event void RadioOff.offDone() {} async event void RadioTx.transmitDone( ieee154_txframe_t *frame, error_t result) {} async event void RadioRx.enableRxDone(){} event message_t* RadioRx.received(message_t *frame) { // signal it to responsible client component return signal FrameRx.received(frame); } event void RadioToken.granted() { ASSERT(0); // should never happen, because we never call RadioToken.request() } event void GTSrequestTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) {} default event void MLME_GTS.indication ( uint16_t DeviceAddress, uint8_t GtsCharacteristics, ieee154_security_t *security ){} default event void MLME_GTS.confirm ( uint8_t GtsCharacteristics, ieee154_status_t status ){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoDisassociateP.nc000066400000000000000000000107701207233610700241440ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-10-16 16:18:29 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for DisassociateP. */ #include "TKN154_MAC.h" module NoDisassociateP { provides { interface Init; interface MLME_DISASSOCIATE; } uses { interface FrameTx as DisassociationIndirectTx; interface FrameTx as DisassociationDirectTx; interface FrameTx as DisassociationToCoord; interface FrameRx as DisassociationDirectRxFromCoord; interface FrameExtracted as DisassociationExtractedFromCoord; interface FrameRx as DisassociationRxFromDevice; interface Pool as TxFramePool; interface Pool as TxControlPool; interface MLME_GET; interface MLME_SET; interface FrameUtility; interface IEEE154Frame as Frame; interface Get as LocalExtendedAddress; } } implementation { command error_t Init.init() { return SUCCESS; } /* ------------------- MLME_DISASSOCIATE (initiating) ------------------- */ command ieee154_status_t MLME_DISASSOCIATE.request ( uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, bool TxIndirect, ieee154_security_t *security ) { return IEEE154_TRANSACTION_OVERFLOW; } event void DisassociationToCoord.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { } event void DisassociationIndirectTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { } event void DisassociationDirectTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { } /* ------------------- MLME_DISASSOCIATE (receiving) ------------------- */ event message_t* DisassociationDirectRxFromCoord.received(message_t* frame) { return frame; } event message_t* DisassociationExtractedFromCoord.received(message_t* frame, ieee154_txframe_t *txFrame) { return frame; } event message_t* DisassociationRxFromDevice.received(message_t* frame) { return frame; } /* ------------------- Defaults ------------------- */ default event void MLME_DISASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, ieee154_security_t *security ){} default event void MLME_DISASSOCIATE.confirm ( ieee154_status_t status, uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress ){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoDispatchQueueP.nc000066400000000000000000000064771207233610700243060ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-03-05 10:07:14 $ * @author Jan Hauer * ======================================================================== */ /** Placeholder component for DispatchQueueP: frames are forwarded immediately * without queuing, i.e. this component is not a "dead end" like most other * placeholders.*/ #include "TKN154_MAC.h" generic module NoDispatchQueueP() { provides { interface Init as Reset; interface FrameTx[uint8_t client]; interface FrameRx as FrameExtracted[uint8_t client]; interface Purge; } uses { interface Queue; interface FrameTx as FrameTxCsma; interface FrameRx as SubFrameExtracted; } } implementation { uint8_t m_client; command error_t Reset.init() { return SUCCESS; } command ieee154_status_t FrameTx.transmit[uint8_t client](ieee154_txframe_t *txFrame) { ieee154_status_t status; txFrame->client = client; status = call FrameTxCsma.transmit(txFrame); if (status == IEEE154_SUCCESS) m_client = client; return status; } event void FrameTxCsma.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { signal FrameTx.transmitDone[txFrame->client](txFrame, status); } event message_t* SubFrameExtracted.received(message_t* frame) { return signal FrameExtracted.received[m_client](frame); } default event void FrameTx.transmitDone[uint8_t client](ieee154_txframe_t *txFrame, ieee154_status_t status){} command ieee154_status_t Purge.purge(uint8_t msduHandle) { return IEEE154_INVALID_HANDLE; } default event void Purge.purgeDone(ieee154_txframe_t *txFrame, ieee154_status_t status){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoDispatchSlottedCsmaP.nc000066400000000000000000000121121207233610700254230ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2009-10-27 11:29:15 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for DispatchSlottedCsmaP. */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" generic module NoDispatchSlottedCsmaP(uint8_t sfDirection) { provides { interface Init as Reset; interface FrameTx as FrameTx; interface FrameRx as FrameRx[uint8_t frameType]; interface FrameExtracted as FrameExtracted[uint8_t frameType]; interface FrameTxNow as BroadcastTx; interface Notify as WasRxEnabled; } uses { interface Alarm as CapEndAlarm; interface Alarm as BLEAlarm; interface Alarm as RxWaitAlarm; interface GetNow as IsRadioTokenRequested; interface TransferableResource as RadioToken; interface ResourceRequested as RadioTokenRequested; interface SuperframeStructure; interface GetNow as IsRxEnableActive; interface Get as GetIndirectTxFrame; interface Notify as RxEnableStateChange; interface GetNow as IsTrackingBeacons; interface Notify as PIBUpdateMacRxOnWhenIdle; interface FrameUtility; interface SlottedCsmaCa; interface RadioRx; interface RadioOff; interface MLME_GET; interface MLME_SET; interface TimeCalc; interface Leds; interface SetNow as FrameBackup; interface GetNow as FrameRestore; interface StdControl as TrackSingleBeacon; interface MLME_SYNC_LOSS; } } implementation { enum { COORD_ROLE = (sfDirection == OUTGOING_SUPERFRAME), DEVICE_ROLE = !COORD_ROLE, RADIO_CLIENT_CFP = COORD_ROLE ? RADIO_CLIENT_COORDCFP : RADIO_CLIENT_DEVICECFP, }; command error_t Reset.init() { return SUCCESS; } async event void RadioToken.transferredFrom(uint8_t c) { call RadioToken.transferTo(RADIO_CLIENT_CFP); } command ieee154_status_t FrameTx.transmit(ieee154_txframe_t *frame) { return IEEE154_TRANSACTION_OVERFLOW; } async event void RadioOff.offDone(){ } async event void RadioRx.enableRxDone(){} async event void CapEndAlarm.fired(){ } async event void BLEAlarm.fired(){ } event void RxEnableStateChange.notify(bool whatever){ } async event void RxWaitAlarm.fired(){ } async event void SlottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, uint16_t remainingBackoff, error_t result) { } event message_t* RadioRx.received(message_t* frame) { return frame; } async command ieee154_status_t BroadcastTx.transmitNow(ieee154_txframe_t *frame) { return IEEE154_TRANSACTION_OVERFLOW;} event void RadioToken.granted() { } command error_t WasRxEnabled.enable(){return FAIL;} command error_t WasRxEnabled.disable(){return FAIL;} event void PIBUpdateMacRxOnWhenIdle.notify( const void* val ) {} async event void RadioTokenRequested.requested(){ } async event void RadioTokenRequested.immediateRequested(){ } event void MLME_SYNC_LOSS.indication ( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security ){ } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoIndirectTxP.nc000066400000000000000000000062621207233610700236070ustar00rootroot00000000000000/* * Copyright (c) 2011, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== * Author(s): Jan Hauer * ======================================================================== */ /** Empty placeholder component for IndirectTxP. */ module NoIndirectTxP { provides { interface Init as Reset; interface FrameTx[uint8_t client]; interface WriteBeaconField as PendingAddrWrite; interface Notify as PendingAddrSpecUpdated; interface Get as GetIndirectTxFrame; interface Purge; } uses { interface FrameTx as CoordCapTx; interface FrameRx as DataRequestRx; interface MLME_GET; interface IEEE154Frame; interface Timer as IndirectTxTimeout; interface TimeCalc; interface Leds; } } implementation { command error_t Reset.init() { return SUCCESS; } command ieee154_status_t Purge.purge(uint8_t msduHandle) { return IEEE154_INVALID_HANDLE; } command uint8_t PendingAddrWrite.write(uint8_t *lastBytePtr, uint8_t maxlen) { *lastBytePtr = 0; return 1; } command ieee154_status_t FrameTx.transmit[uint8_t client](ieee154_txframe_t *txFrame) { return IEEE154_TRANSACTION_OVERFLOW; } event message_t* DataRequestRx.received(message_t* frame) { return frame; } event void IndirectTxTimeout.fired() { } event void CoordCapTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { } command ieee154_txframe_t* GetIndirectTxFrame.get() { return NULL;} command error_t PendingAddrSpecUpdated.enable() {return FAIL;} command error_t PendingAddrSpecUpdated.disable() {return FAIL;} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoPollP.nc000066400000000000000000000062261207233610700224400ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2010-01-05 16:41:16 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for PollP. */ #include "TKN154_MAC.h" module NoPollP { provides { interface Init; interface MLME_POLL; interface FrameRx as DataRx; interface DataRequest as DataRequest[uint8_t client]; } uses { interface FrameTx as PollTx; interface FrameExtracted as DataExtracted; interface FrameUtility; interface Pool as TxFramePool; interface Pool as TxControlPool; interface MLME_GET; interface Get as LocalExtendedAddress; } } implementation { command error_t Init.init() { return SUCCESS; } command ieee154_status_t MLME_POLL.request ( uint8_t coordAddrMode, uint16_t coordPANID, ieee154_address_t coordAddress, ieee154_security_t *security) { return IEEE154_TRANSACTION_OVERFLOW; } command ieee154_status_t DataRequest.poll[uint8_t client](uint8_t CoordAddrMode, uint16_t CoordPANId, uint8_t *CoordAddressLE, uint8_t srcAddrMode) { return IEEE154_TRANSACTION_OVERFLOW; } event message_t* DataExtracted.received(message_t* frame, ieee154_txframe_t *txFrame) { return frame; } event void PollTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { } } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoPromiscuousModeP.nc000066400000000000000000000062401207233610700246630ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2010-02-04 16:31:15 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for PromiscuousModeP. */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" module NoPromiscuousModeP { provides { interface Init; interface SplitControl as PromiscuousMode; interface Get as PromiscuousModeGet; interface FrameRx; interface GetNow as IsRadioTokenRequested; } uses { interface TransferableResource as RadioToken; interface RadioRx as PromiscuousRx; interface RadioOff; interface Set as RadioPromiscuousMode; } } implementation { command error_t Init.init() { return SUCCESS; } /* ----------------------- Promiscuous Mode ----------------------- */ command bool PromiscuousModeGet.get() { return FALSE; } command error_t PromiscuousMode.start() { return FAIL; } event void RadioToken.granted() { ASSERT(0);} event message_t* PromiscuousRx.received(message_t *frame) { return frame; } async event void PromiscuousRx.enableRxDone(){} command error_t PromiscuousMode.stop() { return FAIL; } async event void RadioOff.offDone() { } default event void PromiscuousMode.startDone(error_t error){} default event void PromiscuousMode.stopDone(error_t error){} async command token_requested_t IsRadioTokenRequested.getNow(){ return FALSE;} async event void RadioToken.transferredFrom(uint8_t clientFrom){ASSERT(0);} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoRxEnableP.nc000066400000000000000000000064401207233610700232300ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:40 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for RxEnableP. */ #include "TKN154_PHY.h" #include "TKN154_MAC.h" module NoRxEnableP { provides { interface Init; interface MLME_RX_ENABLE; interface GetNow as IsRxEnableActive; interface Notify as RxEnableStateChange; } uses { interface Timer as RxEnableTimer; interface Get as IsMacPanCoordinator; interface GetNow as IsTrackingBeacons; interface GetNow as IsSendingBeacons; interface SuperframeStructure as IncomingSuperframeStructure; interface SuperframeStructure as OutgoingSuperframeStructure; interface Notify as WasRxEnabled; interface TimeCalc; } } implementation { command error_t Init.init() { return SUCCESS; } /* ----------------------- MLME-RX-ENABLE ----------------------- */ command ieee154_status_t MLME_RX_ENABLE.request ( bool DeferPermit, uint32_t RxOnTime, uint32_t RxOnDuration ) { return IEEE154_TRANSACTION_OVERFLOW; } event void RxEnableTimer.fired() {} async command bool IsRxEnableActive.getNow() { return FALSE; } event void WasRxEnabled.notify( bool val ) { } command error_t RxEnableStateChange.enable(){return FAIL;} command error_t RxEnableStateChange.disable(){return FAIL;} default event void MLME_RX_ENABLE.confirm(ieee154_status_t status){} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/dummies/NoScanP.nc000066400000000000000000000074751207233610700224250ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2009-03-24 12:56:47 $ * @author Jan Hauer * ======================================================================== */ /** Empty placeholder component for ScanP. */ #include "TKN154_MAC.h" module NoScanP { provides { interface Init; interface MLME_SCAN; interface MLME_BEACON_NOTIFY; interface GetNow as IsRadioTokenRequested; } uses { interface MLME_GET; interface MLME_SET; interface EnergyDetection; interface RadioOff; interface RadioRx; interface RadioTx; interface IEEE154Frame as Frame; interface IEEE154BeaconFrame as BeaconFrame; interface Timer as ScanTimer; interface Pool as TxFramePool; interface Pool as TxControlPool; interface TransferableResource as RadioToken; interface FrameUtility; interface Leds; } } implementation { command error_t Init.init() { return SUCCESS;} command ieee154_status_t MLME_SCAN.request ( uint8_t ScanType, uint32_t ScanChannels, uint8_t ScanDuration, uint8_t ChannelPage, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList, ieee154_security_t *security ) { return IEEE154_TRANSACTION_OVERFLOW; } event void RadioToken.granted() { ASSERT(0); } event void EnergyDetection.done(error_t status, int8_t EnergyLevel){} async event void RadioRx.enableRxDone(){} event message_t* RadioRx.received(message_t *frame) { return frame; } async event void RadioTx.transmitDone(ieee154_txframe_t *frame, error_t result){} event void ScanTimer.fired() { } async event void RadioOff.offDone() { } async event void RadioToken.transferredFrom(uint8_t fromClient){ASSERT(0);} async command token_requested_t IsRadioTokenRequested.getNow(){ return FALSE;} } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/extras/000077500000000000000000000000001207233610700204305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/extras/extaddr.extra000066400000000000000000000002711207233610700231300ustar00rootroot00000000000000ifeq ($(EXTADDR),) $(error To set an extended address X pass 'extaddr,X' to the make system (e.g. "make telosb extaddr,0x012345")) endif PFLAGS += -DIEEE154_EXTENDED_ADDRESS=$(EXTADDR) tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/extras/tkn154debug.extra000066400000000000000000000001361207233610700235320ustar00rootroot00000000000000CFLAGS += -DTKN154_DEBUG CFLAGS += -I$(TOSDIR)/lib/printf CFLAGS += -DPRINTF_BUFFER_SIZE=1000 tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/000077500000000000000000000000001207233610700212455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MCPS/000077500000000000000000000000001207233610700220075ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MCPS/MCPS_DATA.nc000066400000000000000000000105521207233610700236670ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:40 $ * @author: Jan Hauer * ======================================================================== */ /** * The MCPS-DATA.request primitive requests the transfer of a data SPDU (i.e., * MSDU) from a local SSCS entity to a single peer SSCS entity. (IEEE * 802.15.4-2006, Sect. 7.1.1) */ #include "TKN154.h" #include interface MCPS_DATA { /** * "Requests to transfer a data SPDU (i.e., MSDU) from a local SSCS * entity to a single peer SSCS entity." (IEEE 802.15.4-2006, Sec. * 7.1.1.1) * * The source/destination addressing mode, destination PAN * identifier, destination address, the payload and (optionally) the * security mode/key are part of the frame and must have * been set (through the IEEE154Frame interface) before * calling this command. * * If this command returns IEEE154_SUCCESS, then the confirm event * will be signalled in the future; otherwise, the confirm event * will not be signalled. * * @param frame The frame to send * @param payloadLen The length of the frame payload * @param msduHandle Handle associated with the frame * @param TxOptions Bitwised OR transmission options * * @return IEEE154_SUCCESS if the request succeeded and only * then the confirm() event will be signalled; * an appropriate error code otherwise * @see confirm */ command ieee154_status_t request ( message_t *frame, uint8_t payloadLen, uint8_t msduHandle, uint8_t TxOptions ); /** * Reports the result of a request to transfer a frame to a peer * SSCS entity. * * @param frame The frame which was requested to be sent * @param msduHandle The handle associated with the frame * @param status The status of the last MSDU transmission * @param timestamp Time of transmission (invalid if status * is not IEEE154_SUCCESS) */ event void confirm ( message_t *frame, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp ); /** * Indicates the arrival of a frame. Use the IEEE154Frame * interface to get the payload, source/destination addresses, DSN * and other information associated with this frame. * * @return A frame buffer for the stack to use for the next received frame */ event message_t* indication ( message_t* frame ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MCPS/MCPS_PURGE.nc000066400000000000000000000050361207233610700240410ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:40 $ * @author: Jan Hauer * ======================================================================== */ /** * The MCPS-PURGE.request primitive allows the next higher layer to purge an * MSDU from the transaction queue. (IEEE 802.15.4-2006, Sect. 7.1.1) */ #include "TKN154.h" interface MCPS_PURGE { /** * Requests to purge a frame from the transaction queue. The result * will be returned immediately (there is no confirm event for this * command). * * @param msduHandle The handle of the frame to be purged from the * transaction queue * * @return IEEE154_SUCCESS if the request succeeded, an * appropriate error code otherwise */ command ieee154_status_t request ( uint8_t msduHandle ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/000077500000000000000000000000001207233610700217775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_ASSOCIATE.nc000066400000000000000000000132411207233610700244470ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:40 $ * @author: Jan Hauer * ======================================================================== */ /** * MLME-SAP association primitives define how a device becomes * associated with a PAN. (IEEE 802.15.4-2006, Sect. 7.1.3) */ #include "TKN154.h" interface MLME_ASSOCIATE { /** * Requests to associate with a PAN. * * @param LogicalChannel The logical channel on which to attempt * association * @param ChannelPage The channel page on which to attempt association * @param CoordAddrMode The coordinator addressing mode * @param CoordPANID The 16 bit PAN identifier of the coordinator * @param CoordAddress Individual device address of the coordinator as * per the CoordAddrMode * @param CapabilityInformation Specifies the operational capabilities * of the associating device * @param security The security options (NULL means security is * disabled) * * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * @see confirm */ command ieee154_status_t request ( uint8_t LogicalChannel, uint8_t ChannelPage, uint8_t CoordAddrMode, uint16_t CoordPANID, ieee154_address_t CoordAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ); /** * Notification that a device has requested to associate with this PAN. * * @param DeviceAddress the 64-bit address of the requesting device * @param CapabilityInformation Specifies the operational capabilities * of the associating device * @param security The security options (NULL means security is * disabled) */ event void indication ( uint64_t DeviceAddress, ieee154_CapabilityInformation_t CapabilityInformation, ieee154_security_t *security ); /** * Sends a response to a device that requested to associate with this PAN. * * @param DeviceAddress The 64-bit address of the device to respond to * @param AssocShortAddress The short device address allocated by the * coordinator on successful allocation. * @param status The status of the association attempt * @param security The security options (NULL means security is * disabled) * * @return IEEE154_SUCCESS if the request succeeded and an indication event * will be signalled through the MLME_COMM_STATUS interface later, * an appropriate error code otherwise (no MLME_COMM_STATUS.indication * event will be signalled in this case) */ command ieee154_status_t response ( uint64_t DeviceAddress, uint16_t AssocShortAddress, ieee154_association_status_t status, ieee154_security_t *security ); /** * Confirms an association attempt. * * @param AssocShortAddress The short device address allocated by the * coordinator on successful association * @param status The status of the association attempt * @param security The security options, NULL means security is * disabled */ event void confirm ( uint16_t AssocShortAddress, uint8_t status, ieee154_security_t *security ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_BEACON_NOTIFY.nc000066400000000000000000000052531207233610700251570ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:40 $ * @author: Jan Hauer * ======================================================================== */ /** * The MLME-SAP beacon notification primitive defines how a device may be * notified when a beacon is received during normal operating conditions. * (IEEE 802.15.4-2006, Sect. 7.1.5) */ #include "TKN154.h" #include interface MLME_BEACON_NOTIFY { /** * A beacon frame has been received. This event is signalled only if * either the PIB attribute macAutoRequest is set to FALSE * or the beacon payload is not empty. * * The beacon parameters can be accessed through the * IEEE154BeaconFrame interface. The IEEE154Frame * interface can be used to inspect the addressing fields in the MAC * header. * * @param beacon The beacon frame * * @return A frame buffer for the stack to use for the next received frame */ event message_t* indication ( message_t *beaconFrame ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_COMM_STATUS.nc000066400000000000000000000063151207233610700247760ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:40 $ * @author: Jan Hauer * ======================================================================== */ /** * The MLME-SAP communication status primitive defines how the MLME * communicates to the next higher layer about transmission status, * when the transmission was instigated by a response primitive, and * about security errors on incoming packets. (IEEE 802.15.4-2006, * Sect. 7.1.12) */ #include "TKN154.h" interface MLME_COMM_STATUS { /** * Allows the MLME to indicate a communications status. * * @param PanID The 16-bit PAN identifier of the device from which the * frame was received or to which the frame was being sent * @param SrcAddrMode The source addressing mode * @param SrcAddr Individual device address of the source as per SrcAddrMode * @param DstAddrMode The destination addressing mode * @param DstAddr Individual device address of the destination * as per DstAddrMode * @param status The communications status * @param security The security options, NULL means security is * disabled */ event void indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_DISASSOCIATE.nc000066400000000000000000000116571207233610700250200ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:42 $ * @author: Jan Hauer * ======================================================================== */ /** * The MLME-SAP disassociation primitives define how a device can * disassociate from a PAN. (IEEE 802.15.4-2006, Sect. 7.1.4) */ #include "TKN154.h" interface MLME_DISASSOCIATE { /** * Requests disassociation from a PAN. * * @param DeviceAddrMode The addressing mode of the device to which to send * the disassociation notification command. * @param DevicePANID The PAN identifier of the device to which to send the * disassociation notification command. * @param DeviceAddress The address of the device to which to send the * disassociation notification command * @param DisassociateReason The reason for the disassociation * @param TxIndirect TRUE if disassociation notification command is to be sent * indirectly * @param security The security options (NULL means security is * disabled) * * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * @see confirm */ command ieee154_status_t request ( uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, bool TxIndirect, ieee154_security_t *security ); /** * Signals that a device has requested disassociation from this PAN. * * @param DeviceAddress the 64-bit address of the requesting device * @param DisassociateReason Reason for the disassociation * @param security The security options (NULL means security is * disabled) */ event void indication ( uint64_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, ieee154_security_t *security ); /** * Confirmsn a disassociation attempt. * * @param status The status of the disassociation attempt * @param DeviceAddrMode The addressing mode of the device that has either * requested disassociation or been instructed to * disassociate by its coordinator. * @param DevicePANID The PAN identifier of the device that has either * requested disassociation or been instructed to * disassociate by its coordinator. * @param DeviceAddress The address of the device that has either requested * disassociation or been instructed to disassociate * by its coordinator. */ event void confirm ( ieee154_status_t status, uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_GET.nc000066400000000000000000000154161207233610700235610ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * This interface allows to read attribute values from the PHY/MAC PIB. * Instead of passing the PIB attribute identifier, there is a separate * command per attribute (and there are no confirm events). * * NOTE: for the attributes macBeaconPayload (0x45) and * macBeaconPayloadLength (0x46) use the * IEEE154TxBeaconPayload interface; for promiscuous mode * there is a separate (SplitControl) interface. */ #include "TKN154.h" interface MLME_GET { /** @return PIB attribute phyCurrentChannel (0x00) */ command ieee154_phyCurrentChannel_t phyCurrentChannel(); /** @return PIB attribute phyChannelsSupported (0x01) */ command ieee154_phyChannelsSupported_t phyChannelsSupported(); /** @return PIB attribute phyTransmitPower (0x02) */ command ieee154_phyTransmitPower_t phyTransmitPower(); /** @return PIB attribute phyCCAMode (0x03) */ command ieee154_phyCCAMode_t phyCCAMode(); /** @return PIB attribute phyCurrentPage (0x04) */ command ieee154_phyCurrentPage_t phyCurrentPage(); /** @return PIB attribute phyMaxFrameDuration (0x05) */ command ieee154_phyMaxFrameDuration_t phyMaxFrameDuration(); /** @return PIB attribute phySHRDuration (0x06) */ command ieee154_phySHRDuration_t phySHRDuration(); /** @return PIB attribute phySymbolsPerOctet (0x07) */ command ieee154_phySymbolsPerOctet_t phySymbolsPerOctet(); /** @return PIB attribute macAckWaitDuration (0x40) */ command ieee154_macAckWaitDuration_t macAckWaitDuration(); /** @return PIB attribute macAssociationPermit (0x41) */ command ieee154_macAssociationPermit_t macAssociationPermit(); /** @return PIB attribute macAutoRequest (0x42) */ command ieee154_macAutoRequest_t macAutoRequest(); /** @return PIB attribute macBattLifeExt (0x43) */ command ieee154_macBattLifeExt_t macBattLifeExt(); /** @return PIB attribute macBattLifeExtPeriods (0x44) */ command ieee154_macBattLifeExtPeriods_t macBattLifeExtPeriods(); /* macBeaconPayload (0x45) and macBeaconPayloadLength (0x46) are read * through the IEEE154TxBeaconPayload interface. */ /** @return PIB attribute macBeaconOrder (0x47) */ command ieee154_macBeaconOrder_t macBeaconOrder(); /** @return PIB attribute macBeaconTxTime (0x48) */ command ieee154_macBeaconTxTime_t macBeaconTxTime(); /** @return PIB attribute macBSN (0x49) */ command ieee154_macBSN_t macBSN(); /** @return PIB attribute macCoordExtendedAddress (0x4A) */ command ieee154_macCoordExtendedAddress_t macCoordExtendedAddress(); /** @return PIB attribute macCoordShortAddress (0x4B) */ command ieee154_macCoordShortAddress_t macCoordShortAddress(); /** @return PIB attribute macDSN (0x4C) */ command ieee154_macDSN_t macDSN(); /** @return PIB attribute macGTSPermit (0x4D) */ command ieee154_macGTSPermit_t macGTSPermit(); /** @return PIB attribute macMaxCSMABackoffs (0x4E) */ command ieee154_macMaxCSMABackoffs_t macMaxCSMABackoffs(); /** @return PIB attribute macMinBE (0x4F) */ command ieee154_macMinBE_t macMinBE(); /** @return PIB attribute macPANId (0x50) */ command ieee154_macPANId_t macPANId(); /** @return PIB attribute macPromiscuousMode (0x51) */ command ieee154_macPromiscuousMode_t macPromiscuousMode(); /** @return PIB attribute macRxOnWhenIdle (0x52) */ command ieee154_macRxOnWhenIdle_t macRxOnWhenIdle(); /** @return PIB attribute macShortAddress (0x53) */ command ieee154_macShortAddress_t macShortAddress(); /** @return PIB attribute macSuperframeOrder (0x54) */ command ieee154_macSuperframeOrder_t macSuperframeOrder(); /** @return PIB attribute macTransactionPersistenceTime (0x55) */ command ieee154_macTransactionPersistenceTime_t macTransactionPersistenceTime(); /** @return PIB attribute macAssociatedPANCoord (0x56) */ command ieee154_macAssociatedPANCoord_t macAssociatedPANCoord(); /** @return PIB attribute macMaxBE (0x57) */ command ieee154_macMaxBE_t macMaxBE(); /** @return PIB attribute macMaxFrameTotalWaitTime (0x58) */ command ieee154_macMaxFrameTotalWaitTime_t macMaxFrameTotalWaitTime(); /** @return PIB attribute macMaxFrameRetries (0x59) */ command ieee154_macMaxFrameRetries_t macMaxFrameRetries(); /** @return PIB attribute macResponseWaitTime (0x5A) */ command ieee154_macResponseWaitTime_t macResponseWaitTime(); /** @return PIB attribute macSyncSymbolOffset (0x5B) */ command ieee154_macSyncSymbolOffset_t macSyncSymbolOffset(); /** @return PIB attribute macTimestampSupported (0x5C) */ command ieee154_macTimestampSupported_t macTimestampSupported(); /** @return PIB attribute macSecurityEnabled (0x5D) */ command ieee154_macSecurityEnabled_t macSecurityEnabled(); /** @return PIB attribute macMinLIFSPeriod */ command ieee154_macMinLIFSPeriod_t macMinLIFSPeriod(); /** @return PIB attribute macMinSIFSPeriod */ command ieee154_macMinSIFSPeriod_t macMinSIFSPeriod(); /** @return custom attribute macPanCoordinator */ command ieee154_macPanCoordinator_t macPanCoordinator(); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_GTS.nc000066400000000000000000000116471207233610700236010ustar00rootroot00000000000000/* * Copyright (c) 2010, CISTER/ISEP - Polytechnic Institute of Porto * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * * * * @author Ricardo Severino * @author Stefano Tennina * ======================================================================== */ /** * The MLME-SAP GTS management primitives define how GTSs are * requested and maintained. A device wishing to use these primitives * and GTSs in general will already be tracking the beacons of its PAN * coordinator. (IEEE 802.15.4-2006, Sect. 7.1.7) */ #include "TKN154.h" interface MLME_GTS { /** * Request allocation of a new GTS or deallocation * * @param GtsCharacteristics The characteristics of the GTS request * @param security The security options (NULL means security is * disabled) * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * @see confirm */ command ieee154_status_t request ( uint8_t GtsCharacteristics, ieee154_security_t *security ); /** * Request deallocation of a device's GTS slot by the PAN coordinator. * * This command extends the standard primitives to allow a PAN coordinator to * specify the address of the device, whose GTS should be deallocated. This * information is not provided in the regular MLME_GTS.request interface, but * it is required when the next higher layer on the PAN coordinator wants to * specify whose device's slot should be deallocated. * * @param GtsCharacteristics The characteristics of the GTS request * @param DeviceAddress Short address of the device, whose GTS is to * be deallocated * @param security The security options (NULL means security is * disabled) * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * @see confirm */ command ieee154_status_t requestFromPAN ( uint8_t GtsCharacteristics, uint16_t DeviceAddress, ieee154_security_t *security); /** * Reports the results of a request to allocate a new GTS or * deallocate an existing GTS * * @param GtsCharacteristics The characteristics of the GTS request * @param status The status of the GTS request */ event void confirm ( uint8_t GtsCharacteristics, ieee154_status_t status ); /** * Indicates that a GTS has been allocated or that a previously allocated * GTS has been deallocated * * All pointers are valid only until the return of this event. * * @param DeviceAddress Short address of the device that has been allocated * or deallocated a GTS * @param GtsCharacteristics The characteristics of the GTS request * @param security The security options, NULL means security is * disabled */ event void indication ( uint16_t DeviceAddress, uint8_t GtsCharacteristics, ieee154_security_t *security ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_ORPHAN.nc000066400000000000000000000100611207233610700241200ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * MLME-SAP orphan notification primitives define how a coordinator * can issue a notification of an orphaned device. (IEEE 802.15.4-2006, * Sect. 7.1.8) */ #include "TKN154.h" interface MLME_ORPHAN { /** * Allows the MLME of a coordinator to notify the next higher layer of the * presence of an orphaned device * * @param OrphanAddress The 64-bit extended address of the orphaned device * @param security The security options (NULL means security is * disabled) */ event void indication ( uint64_t OrphanAddress, ieee154_security_t *security ); /** * Allows the next higher layer of a coordinator to respond to the * indication primitive * * @param OrphanAddres The 64-bit extended address of the orphaned device * @param ShortAddress The 16-bit short address allocated to the orphaned * device if it is associated with this coordinator. The * special short address 0xfffe indicates that no short * address was allocated, and the device will use its * 64-bit extended address in all communications. If the * device was not associated with this coordinator, this * field will contain the value 0xffff and be ignored on * receipt. * @param AssociatedMember TRUE if the orphaned device is associated * with this coordinator * @param security The security options (NULL means security is * disabled) * @return IEEE154_SUCCESS if the request succeeded and an indication event * will be signalled through the MLME_COMM_STATUS interface later, * otherwise an appropriate error code (no MLME_COMM_STATUS.indication * event will be signalled in this case) */ command ieee154_status_t response ( uint64_t OrphanAddres, uint16_t ShortAddress, bool AssociatedMember, ieee154_security_t *security ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_POLL.nc000066400000000000000000000064141207233610700237060ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * MLME-SAP polling primitives define how to request data from a * coordinator. (IEEE 802.15.4-2006, Sect. 7.1.16) */ #include "TKN154.h" interface MLME_POLL { /** * Prompts the device to request data from the coordinator. * * @param CoordAddrMode The addressing mode of the coordinator to which * the poll is intended * @param CoordPANID The PAN identifier of the coordinator to which the * poll is intended * @param CoordAddress The address of the coordinator to which the * poll is intended * @param security The security options (NULL means security is * disabled) * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * @see confirm */ command ieee154_status_t request ( uint8_t CoordAddrMode, uint16_t CoordPANID, ieee154_address_t CoordAddress, ieee154_security_t *security ); /** * Reports the results of a request to poll the coordinator for data * * @param status The status of the data request */ event void confirm ( ieee154_status_t status ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_RESET.nc000066400000000000000000000071701207233610700240220ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * MLME-SAP reset primitives specify how to reset the MAC sublayer to * its default values. (IEEE 802.15.4-2006, Sect. 7.1.9) */ #include "TKN154.h" interface MLME_RESET { /** * Allows the next higher layer to request that the MLME performs a * reset operation. This command initializes the MAC and must be * called at least once before the MAC can be used. * * Two things are important: * (1) This command will fail while promiscuous mode is enabled * (promiscuous mode is controlled through a separate SplitControl * interface). (2) While the MLME_RESET.confirm is pending the next * higher layer MUST NOT call any MAC commands; if there are any * other pending request the MAC will signal their corresponding confirm * events before MLME_RESET.confirm is signalled (with a status code of * IEEE154_TRANSACTION_OVERFLOW). * * @param SetDefaultPIB If TRUE, the MAC sublayer is reset and all MAC PIB * attributes are set to their default values. If * FALSE, the MAC sublayer is reset but all MAC PIB * attributes retain their values prior to the * generation of the reset primitive. * * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * */ command ieee154_status_t request ( bool SetDefaultPIB ); /** * Reports the results of the reset operation * * @param status The status of the reset operation */ event void confirm ( ieee154_status_t status ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_RX_ENABLE.nc000066400000000000000000000066501207233610700245010ustar00rootroot00000000000000 /* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * MLME-SAP receiver state primitives define how a device can enable * or disable the receiver at a given time. (IEEE 802.15.4-2006, Sect. * 7.1.10) */ #include "TKN154.h" interface MLME_RX_ENABLE { /** * Allows the next higher layer to request that the receiver is * enabled for a finite period of time * * @param DeferPermit TRUE if the receiver enable can be deferred until * during the next superframe if the requested time has * already passed * @param RxOnTime The number of symbols from the start of the superframe * before the receiver is to be enabled. The precision * of this value is a minimum of 20 bits. This parameter * is ignored for nonbeacon-enabled PANs * @param RxOnDuration The number of symbols for which the receiver * is to be enabled * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * @see confirm */ command ieee154_status_t request ( bool DeferPermit, uint32_t RxOnTime, uint32_t RxOnDuration ); /** * Reports the results of the attempt to enable the receiver * * @param status The status of the receiver enable request */ event void confirm ( ieee154_status_t status ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_SCAN.nc000066400000000000000000000145631207233610700236700ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * MLME-SAP scan primitives define how a device can determine the * energy usage or the presence or absence of PANs in a communications * channel. (IEEE 802.15.4-2006, Sect. 7.1.10) */ #include "TKN154.h" interface MLME_SCAN { /** * Initializes a channel scan over a given list of channels. * * If the PIB attribute macAutoRequest is set to FALSE, then * for each received beacon a PAN descriptor is signalled to the next higher * layer through a separate MLME_BEACON_NOTIFY.indication() * event; otherwise the result of the channel scan is stored in a user * allocated buffer, either EnergyDetectList or * PANDescriptorList depending on ScanType, and the * buffer is returned when the scan is completed. * * Both of the parameters EnergyDetectList and * PANDescriptorList may be NULL, but at least one of them * must be NULL. * * @param ScanType The type of scan performed: ENERGY_DETECTION_SCAN, * ACTIVE_SCAN, PASSIVE_SCAN or ORPHAN_SCAN * @param ScanChannels The 27 LSBs indicate which channels are to be * scanned (1 = scan, 0 = don't scan) * @param ScanDuration Value used to calculate the length of time to * spend scanning each channel for ED, active, and * passive scans. This parameter is ignored for * orphan scans. * @param ChannelPage The channel page on which to perform the scan * @param EnergyDetectListNumEntries The number of entries in the * EnergyDetectList. * @param EnergyDetectList An empty buffer (allocated by the caller) * to store the result of the energy measurements * or NULL if the result should not be stored * @param PANDescriptorListNumEntries The number of entries in the * PANDescriptorList. * @param PANDescriptorList An empty buffer (allocated by the caller) * to store the result of the active/passive scan * or NULL if the result should not be stored * @param security The security options (NULL means security is * disabled) * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * @see confirm */ command ieee154_status_t request ( uint8_t ScanType, uint32_t ScanChannels, uint8_t ScanDuration, uint8_t ChannelPage, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList, ieee154_security_t *security ); /** * Reports the results of the channel scan request, returning * the buffers passed in the request command. * * @param status The status of the scan request * @param ScanType The type of scan performed * @param ChannelPage The channel page on which the scan * was performed (see 6.1.2). * @param UnscannedChannels The 27 LSBs indicate which channels are not * scanned (0 = scanned, 1 = not scanned) * @param EnergyDetectNumResults The number of valid entries in the * EnergyDetectList. * @param EnergyDetectList The buffer list of energy measurements, one for * each channel searched during an ED scan @param PANDescriptorListNumResults The number of valid entries in the * PANDescriptorList. * @param PANDescriptorList The list of PAN descriptors, one for each * unique beacon found during an active or passive scan */ event void confirm ( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectNumResults, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumResults, ieee154_PANDescriptor_t* PANDescriptorList ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_SET.nc000066400000000000000000000250761207233610700236000ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * This interface allows to set attribute values in the PHY/MAC PIB. * Instead of passing the PIB attribute identifier, there is a separate * command per attribute (and there are no confirm events). * * NOTE: for the attributes macBeaconPayload (0x45) and * macBeaconPayloadLength (0x46) use the * IEEE154TxBeaconPayload interface; for promiscuous mode * there is a separate (SplitControl) interface. */ #include "TKN154.h" interface MLME_SET { /** @param value new PIB attribute value for phyCurrentChannel (0x00) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t phyCurrentChannel(ieee154_phyCurrentChannel_t value); /** @param value new PIB attribute value for phyTransmitPower (0x02) * (2 MSBs are ignored) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t phyTransmitPower(ieee154_phyTransmitPower_t value); /** @param value new PIB attribute value for phyCCAMode (0x03) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t phyCCAMode(ieee154_phyCCAMode_t value); /** @param value new PIB attribute value for phyCurrentPage (0x04) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t phyCurrentPage(ieee154_phyCurrentPage_t value); /** @param value new PIB attribute value for macAssociationPermit (0x41) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macAssociationPermit(ieee154_macAssociationPermit_t value); /** @param value new PIB attribute value for macAutoRequest (0x42) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macAutoRequest(ieee154_macAutoRequest_t value); /** @param value new PIB attribute value for macBattLifeExt (0x43) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macBattLifeExt(ieee154_macBattLifeExt_t value); /** @param value new PIB attribute value for macBattLifeExtPeriods (0x44) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macBattLifeExtPeriods(ieee154_macBattLifeExtPeriods_t value); /* macBeaconPayload (0x45) and macBeaconPayloadLength (0x46) are set * through the IEEE154TxBeaconPayload interface. */ /** @param value new PIB attribute value for macBeaconOrder (0x47) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macBeaconOrder(ieee154_macBeaconOrder_t value); /** @param value new PIB attribute value for macBSN (0x49) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macBSN(ieee154_macBSN_t value); /** @param value new PIB attribute value for macCoordExtendedAddress (0x4A) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macCoordExtendedAddress(ieee154_macCoordExtendedAddress_t value); /** @param value new PIB attribute value for macCoordShortAddress (0x4B) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macCoordShortAddress(ieee154_macCoordShortAddress_t value); /** @param value new PIB attribute value for macDSN (0x4C) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macDSN(ieee154_macDSN_t value); /** @param value new PIB attribute value for macGTSPermit (0x4D) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macGTSPermit(ieee154_macGTSPermit_t value); /** @param value new PIB attribute value for macMaxCSMABackoffs (0x4E) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macMaxCSMABackoffs(ieee154_macMaxCSMABackoffs_t value); /** @param value new PIB attribute value for macMinBE (0x4F) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macMinBE(ieee154_macMinBE_t value); /** @param value new PIB attribute value for macPANId (0x50) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macPANId(ieee154_macPANId_t value); /* macPromiscuousMode (0x51) is (re-)set through the * PromiscuousMode (SplitControl) interface. */ /** @param value new PIB attribute value for macRxOnWhenIdle (0x52) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macRxOnWhenIdle(ieee154_macRxOnWhenIdle_t value); /** @param value new PIB attribute value for macShortAddress (0x53) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macShortAddress(ieee154_macShortAddress_t value); /** @param value new PIB attribute value for macTransactionPersistenceTime (0x55) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macTransactionPersistenceTime(ieee154_macTransactionPersistenceTime_t value); /** @param value new PIB attribute value for macAssociatedPANCoord (0x56) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macAssociatedPANCoord(ieee154_macAssociatedPANCoord_t value); /** @param value new PIB attribute value for macMaxBE (0x57) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macMaxBE(ieee154_macMaxBE_t value); /** @param value new PIB attribute value for macMaxFrameTotalWaitTime (0x58) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macMaxFrameTotalWaitTime(ieee154_macMaxFrameTotalWaitTime_t value); /** @param value new PIB attribute value for macMaxFrameRetries (0x59) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macMaxFrameRetries(ieee154_macMaxFrameRetries_t value); /** @param value new PIB attribute value for macResponseWaitTime (0x5A) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macResponseWaitTime(ieee154_macResponseWaitTime_t value); /** @param value new PIB attribute value for macSecurityEnabled (0x5D) * @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if * parameter value is out of valid range and PIB was not updated */ command ieee154_status_t macSecurityEnabled(ieee154_macSecurityEnabled_t value); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_START.nc000066400000000000000000000132201207233610700240260ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-04-17 14:47:09 $ * @author Jan Hauer * ======================================================================== */ /** * MLME-SAP start primitives define how an FFD can request to start * using a new superframe configuration in order to initiate a PAN, * begin transmitting beacons on an already existing PAN, thus * facilitating device discovery, or to stop transmitting beacons. * (IEEE 802.15.4-2006, Sect. 7.1.14) */ #include "TKN154.h" interface MLME_START { /** * Requests to start using a new superframe configuration. * * @param PANId The PAN identifier to be used by the device * @param LogicalChannel The logical channel on which to start transmitting * beacons * @param ChannelPage The channel page on which to begin using the new * superframe configuration. * @param StartTime The time at which to begin transmitting beacons. If this * parameter is equal to 0x000000, beacon transmissions * will begin immediately. Otherwise, the specified time is * relative to the received beacon of the coordinator with * which the device synchronizes. * This parameter is ignored if either the beaconOrder * parameter has a value of 15 or the panCoordinator * parameter is TRUE.The time is specified in symbols and * is rounded to a backoff slot boundary. This is a 24-bit * value, and the precision of this value shall be a * minimum of 20 bits, with the lowest 4 bits being the * least significant. * @param BeaconOrder The beacon order of the superframe * @param SuperframeOrder The superframe order of the superframe * @param PanCoordinator If TRUE, the device will become the PAN coordinator * of a new PAN. If FALSE, the device will begin * transmitting beacons on the PAN with which it * is associated * @param BatteryLifeExtension If TRUE, the receiver of the beaconing * device is disabled after the IFS period * @param CoordRealignment TRUE if a coordinator realignment command is to * be transmitted prior to changing the superframe * configuration * @param coordRealignSecurity The security options for the coordinator * realignment command (NULL means security * is disabled) * @param beaconSecurity The security options for beacon frames * (NULL means security is disabled) * * @return IEEE154_SUCCESS if the request succeeded and a confirm event * will be signalled, an appropriate error code otherwise * (no confirm event will be signalled in this case) * @see confirm */ command ieee154_status_t request ( uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, uint32_t StartTime, uint8_t BeaconOrder, uint8_t SuperframeOrder, bool PanCoordinator, bool BatteryLifeExtension, bool CoordRealignment, ieee154_security_t *coordRealignSecurity, ieee154_security_t *beaconSecurity ); /** * Signalled in response to a successful request. * Reports the results of the attempt to start using a new superframe * configuration * * @param status The result of the attempt to start using an * updated superframe configuration */ event void confirm ( ieee154_status_t status ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_SYNC.nc000066400000000000000000000062541207233610700237160ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * MLME-SAP synchronization primitives define how synchronization with * a coordinator may be achieved and how a loss of synchronization is * communicated to the next higher layer. (IEEE 802.15.4-2006, Sect. * 7.1.15) */ interface MLME_SYNC { /** * Requests to synchronize with the coordinator by acquiring and, if * specified, tracking its beacons. * * @param LogicalChannel Logical channel on which to attempt coordinator * synchronization * @param ChannelPage The channel page on which to attempt coordinator * synchronization. * @param TrackBeacon TRUE if the MLME is to synchronize with the next * beacon and attempt to track all future beacons. * FALSE if the MLME is to synchronize with only the * next beacon. * @return IEEE154_SUCCESS if the request succeeded and the device * is now trying to acquire synchronization with the coordinator. * Note: the MLME_SYNC_LOSS interface is used to signal * when synchronization was lost (or never acquired) */ command ieee154_status_t request ( uint8_t LogicalChannel, uint8_t ChannelPage, bool TrackBeacon ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/MLME/MLME_SYNC_LOSS.nc000066400000000000000000000060571207233610700245570ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ /** * MLME-SAP synchronization primitives define how synchronization with * a coordinator may be achieved and how a loss of synchronization is * communicated to the next higher layer. (IEEE 802.15.4-2006, Sect. * 7.1.15) */ #include "TKN154.h" interface MLME_SYNC_LOSS { /** * Indicates the loss of synchronization with a coordinator * * @param lossReason The reason that synchronization was lost * @param PANId The PAN identifier with which the device lost * synchronization or to which it was realigned. * @param LogicalChannel The logical channel on which the device lost synchronization or to which it was realigned. * @param ChannelPage The channel page on which the device lost * synchronization or to which it was realigned. * @param security The security options, NULL means security is * disabled. */ event void indication ( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security ); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/000077500000000000000000000000001207233610700227175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/DataRequest.nc000066400000000000000000000047441207233610700254740ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-16 18:00:32 $ * @author Jan Hauer * ======================================================================== */ interface DataRequest { /** * Sends a data request frame to the coordinator. * * @param CoordAddrMode coordinator address mode * @param CoordPANId coordinator PAN ID * @param CoordAddressLE points to coordinator address stored in * little endian format * @param SrcAddrMode source address mode * @returns IEEE154_SUCCESS if a data request frame will be transmitted and * only then pollDone will be signalled. **/ command ieee154_status_t poll(uint8_t CoordAddrMode, uint16_t CoordPANId, uint8_t *CoordAddressLE, uint8_t SrcAddrMode); /** * Signalled in response to a successful poll command **/ event void pollDone(); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/EnergyDetection.nc000066400000000000000000000054131207233610700263340ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:42 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" interface EnergyDetection { /** * Requests to measure the energy level on the current channel; the * measurement should last for duration symbols and the * maximum energy level is signalled through the done * event. * * @param duration Duration of the energy detection measurement * (in symbol time) * @return SUCCESS if the request was accepted and only then * the done event will be signalled, FAIL otherwise **/ command error_t start(uint32_t duration); /** * Signalled in response to a call to start; * returns the maximum energy measured on the channel over the * specified period of time. * * @param status SUCCESS if the measurement succeeded * and only then EnergyLevel is valid, FAIL * otherwise * @param EnergyLevel The maximum energy on the channel **/ event void done(error_t status, int8_t EnergyLevel); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/FrameExtracted.nc000066400000000000000000000043031207233610700261370ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-16 18:00:32 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" interface FrameExtracted { /** * A frame was extracted from the coordinator. * * @param rxFrame The frame received from the coordinator * @param txFrame The data request frame sent to the coordinator * @return A frame buffer for the stack to use for the next received frame **/ event message_t* received(message_t* rxFrame, ieee154_txframe_t *txFrame); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/FrameRx.nc000066400000000000000000000041201207233610700246020ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2009-03-04 18:31:44 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" interface FrameRx { /** * Received a frame. * * @param frame the received frame * @return a buffer to be used by the stack for the next * incoming frame */ event message_t* received(message_t* frame); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/FrameTx.nc000066400000000000000000000045761207233610700246230ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:44 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" interface FrameTx { /** * Transmits a frame. * * @param txFrame the frame to transmit * @return IEEE154_SUCCESS if the request was accepted and * only then transmitDone() will be signalled */ command ieee154_status_t transmit(ieee154_txframe_t *txFrame); /** * Signals the completion of the transmission of a frame. * * @param txFrame the frame that was transmitted * @param status the result of the transmission */ event void transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/FrameTxNow.nc000066400000000000000000000046231207233610700253000ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:44 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" interface FrameTxNow { /** * Transmits a frame. * * @param txFrame the frame to transmit * @return IEEE154_SUCCESS if the request was accepted and * only then transmitDone() will be signalled */ async command ieee154_status_t transmitNow(ieee154_txframe_t *frame); /** * Signals the completion of the transmission of a frame. * * @param txFrame the frame that was transmitted * @param status the result of the transmission */ async event void transmitNowDone(ieee154_txframe_t *frame, ieee154_status_t status); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/FrameUtility.nc000066400000000000000000000060421207233610700256610ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ $Date: 2008-06-16 18:00:33 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154.h" interface FrameUtility { /* Writes the addressing fields in the MAC header of a frame * and returns number of bytes in the MAC header.*/ async command uint8_t writeHeader( uint8_t* mhr, uint8_t DstAddrMode, uint16_t DstPANId, ieee154_address_t* DstAddr, uint8_t SrcAddrMode, uint16_t SrcPANId, const ieee154_address_t* SrcAddr, bool PANIDCompression); /* Determines the lenght of the MAC header depending on the frame control field*/ async command error_t getMHRLength(uint8_t fcf1, uint8_t fcf2, uint8_t *len); /* Returns TRUE if source address is the current coordinator and * src PAN is current PAN */ command bool isBeaconFromCoord(message_t *frame); /* writes the local extended address in little endian format */ async command void copyLocalExtendedAddressLE(uint8_t *destLE); /* writes the coordinator's extended address in little endian format */ command void copyCoordExtendedAddressLE(uint8_t *destLE); /* converts a uint64_t to little endian */ async command void convertToLE(uint8_t *destLE, const uint64_t *srcNative); /* converts little endian to a uint64_t */ async command void convertToNative(uint64_t *destNative, const uint8_t *srcLE); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/Purge.nc000066400000000000000000000040171207233610700243250ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-16 18:00:33 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154.h" interface Purge { /* purges a frame from the transaction queue */ command ieee154_status_t purge(uint8_t msduHandle); event void purgeDone(ieee154_txframe_t *txFrame, ieee154_status_t status); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/RadioOff.nc000066400000000000000000000052041207233610700247330ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:44 $ * @author Jan Hauer * ======================================================================== */ interface RadioOff { /** * Disables the transceiver and changes the radio state to RADIO_OFF. This * command will succeed only if the current state of the radio is RECEIVING. * * @return SUCCESS if the command was accepted and the offDone() * event will be signalled; EALREADY if the radio is already switched off, * i.e. in state RADIO_OFF; FAIL if the radio was not switched of because * the current state is not RECEIVING. */ async command error_t off(); /** * Signalled in response to a successful call to off(). The radio is * now in the state RADIO_OFF. **/ async event void offDone(); /** * Tells whether the radio is in state RADIO_OFF. * * @return TRUE if the radio is in the state RADIO_OFF, FALSE otherwise */ async command bool isOff(); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/RadioRx.nc000066400000000000000000000073341207233610700246200ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:44 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_platform.h" interface RadioRx { /** * Switches the radio to receive mode at time t0 + dt or immediately * if t0 + dt lies in the past. Analogous to the Timer * interface t0 is interpreted as a time in the past. Consequently, * if dt = 0 then the radio is always switched to receive mode * immediately. This command will fail, if the radio is currently not in * state RADIO_OFF. Once the radio is in receive mode an event * enableRxDone will be signalled. * * @param t0 Reference time for receive operation * * @param dt A positive offset relative to t0. * * @return SUCCESS if the command was accepted and only then the * enableRxDone() event will be signalled; FAIL, if the command was * not accepted, because the radio is currently not in the state RADIO_OFF. */ async command error_t enableRx(uint32_t t0, uint32_t dt); /** * Signalled in response to a successful call to enableRx(). This * event is completing the enableRx() operation, the radio is now in * the state RECEIVING. It will stay in receive mode until it is switched off * through the RadioOff interface. Received frames will be signalled * through the received() event. **/ async event void enableRxDone(); /** * Tells whether the radio is in state RECEIVING, i.e. in receive * mode. * * @return TRUE if the radio is in the state RECEIVING, FALSE otherwise */ async command bool isReceiving(); /** * A frame was received and passed the filters described in * IEEE 802.15.4-2006 Sec. 7.5.6.2 ("Reception and rejection"). * * @param frame The received frame * * @return a buffer to be used by the driver for the next * incoming frame */ event message_t* received(message_t *frame); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/RadioTx.nc000066400000000000000000000100561207233610700246150ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:44 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" #include "TKN154_platform.h" interface RadioTx { /** * Transmits a frame at time t0 + dt or immediately if t0 + * dt lies in the past. The frame is transmitted regardless of the * channel condition (without prior CCA). Analogous to the Timer * interface t0 is interpreted as a time in the past. If * dt is zero then the frame is transmitted immediately. This * command will fail, if the radio is currently not in state RADIO_OFF. * * Iff the ACK_REQUESTED flag is set in the frame's header a successful * transmission will include an acknowledgement from the destination; then, * the callee will perform the necessary steps for receiving this * acknowledgement following the specification in IEEE 802.15.4-2006 Sect. * 7.5.6.4. * * @param frame The frame to transmit * * @param t0 Reference time for transmission * * @param dt A positive offset relative to t0 * * @return SUCCESS if the transmission was triggered successfully and only * then transmitDone() will be signalled; FAIL, if the command was * not accepted, because the radio is currently not in the state RADIO_OFF; * EINVAL if frame or a pointer therein is invalid, or the length * of the frame is invalid */ async command error_t transmit(ieee154_txframe_t *frame, uint32_t t0, uint32_t dt); /** * Signalled in response to a call to transmit() and completing * the transmission of a frame. The radio is now back in state RADIO_OFF. * The time of the transmission -- the point in time when the first bit of the * PPDU was transmitted -- is given by timestamp. Since the * frame was transmitted without CCA the transmission can only have * failed if no acknowledgement was received although one was requested. * * @param frame The frame that was transmitted. * * @param result SUCCESS if the frame was transmitted (and a matching * acknowledgement was received, if requested); ENOACK if the frame was * transmitted, but no matching acknowledgement was received although one * was requested **/ async event void transmitDone(ieee154_txframe_t *frame, error_t result); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/SlottedCsmaCa.nc000066400000000000000000000135551207233610700257400ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-03-04 18:31:45 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" #include "TKN154_PHY.h" interface SlottedCsmaCa { /** * Transmits a frame using the slotted CSMA-CA algorithm as specified in IEEE * 802.15.4-2006 standard Sect. 7.5.1.4. This command will fail if the * current state of the radio is not RADIO_OFF. The initial CSMA-CA * parameters are passed as a parameter and may be modified by the callee. * The caller must not access csma until the transmitDone * event has been signalled. * * slot0Time defines the beginning of the first slot in the CAP. * Any transmission must commence on a backoff slot boundary relative to * slot0Time. The last possible time for transmission is defined by * slot0Time+dtMax. If the transmission cannot commence at or before * slot0Time+dtMax then an event transmitDone() with error * code ERETRY will be signalled and csma will reflect the current * state of the CSMA-CA algorithm. The caller can then resume the * transmission of this frame in the next CAP based on the * remainingBackoff passed in the transmitDone() event, by * setting resume to TRUE in the transmit() call. * * Iff the ACK_REQUESTED flag is set in the frame's header a successful * transmission will include an acknowledgement from the destination; then, * the callee will perform the necessary steps for receiving this * acknowledgement following the specification in IEEE 802.15.4-2006 Sect. * 7.5.6.4. * * @param frame The frame to transmit. * * @param csma Initial parameters for the slotted CSMA-CA algorithm. * * @param slot0Time Reference time for the backoff slot boundaries * * @param dtMax slot0Time+dtMax is the last time the frame may be * transmitted. * * @param resume TRUE means that the initial backoff is defined by the * remainingBackoff parameter, FALSE means the * remainingBackoff is to be ignored. * * @param remainingBackoff initial backoff (ignored if resume * is FALSE. * * @return SUCCESS if the slotted CSMA-CA was triggered successfully; * EINVAL if frame or a pointer therein is invalid; FAIL otherwise. */ async command error_t transmit(ieee154_txframe_t *frame, ieee154_csma_t *csma, uint32_t slot0Time, uint32_t dtMax, bool resume, uint16_t remainingBackoff); /** * Signalled in response to a call to transmit(). This event * completes the transmit operation. A transmission failed if either * the channel was never idle during any of the macMaxCsmaBackoffs+1 * transmission attempts, if no acknowledgement was received although one was * requested or if the frame could not be transmitted before the specified * deadline (slot0Time+dtMax). * * @param frame The frame that was to be transmitted. * * @param csma Parameters for the slotted CSMA-CA algorithm; this pointer is * identical to the one passed to the transmit command, the content, * however, may have changed. * * @param ackPendingFlag TRUE if an acknowledgement was received and the * "pending" flag is set in the header of the ACK frame, FALSE otherwise * (this is typically only relevant for indirect transmissions) * * @param remainingBackoff Only valid if result = ERETRY, and * then it describes the remaining backoff time (in symbols) to be used * for the transmission of the frame in the following CAP. * * @result result SUCCESS if the the frame was transmitted (and a matching * acknowledgement was received, if requested); FAIL if the CSMA-CA algorithm * failed because NB > macMaxCsmaBackoffs; ERETRY if the frame could not be * transmitted because transmission would have started later than * slot0Time+dtMax */ async event void transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, uint16_t remainingBackoff, error_t result); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/SuperframeStructure.nc000066400000000000000000000100231207233610700272670ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-03-04 18:31:45 $ * @author Jan Hauer * ======================================================================== */ /* A superframe is bounded by beacons and divided into 16 equally-sized slots, * which are part of either CAP or CFP (GTS). This interface can be used to * determine the various parameters of a superframe, for example the begin of * the inactive period would be calculated as: * * sfStartTime + (numCapSlot + numGtsSlots) * sfSlotDuration * **/ interface SuperframeStructure { /** * Returns the absolute time (in symbols) when the superframe started, * i.e. the timestamp of the beacon marking the first slot. * * @returns superframe start time **/ async command uint32_t sfStartTime(); /** * Duration (in symbols) of a single superframe slot. * Zero means, the CAP is not valid (no valid beacon was received). * * @returns superframe slot duration **/ async command uint32_t sfSlotDuration(); /** * Number of CAP slots. * * @returns number of CAP slots **/ async command uint8_t numCapSlots(); /** * Number of GTS slots. * * @returns number of GTS slots **/ async command uint8_t numGtsSlots(); /** * Duration of the battery life extension period (in symbols), * Zero means battery life extension is not used (disabled). * * @returns duration of the battery life extension period, * zero means battery life extension is disabled **/ async command uint16_t battLifeExtDuration(); /** * Returns a pointer to the content of the GTS fields of the * last received/transmitted beacon. * * @returns GTS fields **/ async command const uint8_t* gtsFields(); /** * The last "guardTime" symbols of CAP/CFP should not be used, * i.e. transmission/reception should stop "guardTime" symbols * before the actual end of the CAP/CFP. * * @returns guard time **/ async command uint16_t guardTime(); /** * Tells whether the frame pending bit is set in the header * of the beacon frame. * * @returns TRUE is frame pending bit in beacon header is set, FALSE otherwise **/ async command bool isBroadcastPending(); /** * The beacon interval (in symbols) in which the superframe is embedded. * * @returns beacon interval **/ async command uint32_t beaconInterval(); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/TimeCalc.nc000066400000000000000000000043731207233610700247310ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-16 18:00:34 $ * @author Jan Hauer * ======================================================================== */ interface TimeCalc { /** * Returns the interval between time t1 and time t0 assuming * that t0 happened before t1. * @return interval between t1 and t0 */ async command uint32_t timeElapsed(uint32_t t0, uint32_t t1); /** * Assuming that t0 lies in the past, this command returns TRUE * iff t0+dt lies also in the past. * @return TRUE if t0+dt is later than "now" */ async command bool hasExpired(uint32_t t0, uint32_t dt); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/TransferableResource.nc000066400000000000000000000142031207233610700273610ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * This interface is the same as the standard Resource * interface, except that it has one new command transferTo() * and one new event transferred(), which allow to pass * the resource from one component to another. * * @author Jan Hauer */ interface TransferableResource { /** * Request access to a shared resource. You must call release() * when you are done with it. * * @return SUCCESS When a request has been accepted. The granted() * event will be signaled once you have control of the * resource.
      * EBUSY You have already requested this resource and a * granted event is pending */ async command error_t request(); /** * Request immediate access to a shared resource. You must call release() * when you are done with it. * * @return SUCCESS When a request has been accepted.
      * FAIL The request cannot be fulfilled */ async command error_t immediateRequest(); /** * You are now in control of the resource. */ event void granted(); /** * Transfers ownership of a resource to another client, which will in turn * be signalled the transferred() event. This command may override * the default queueing policy. * * @param dstClient The identifier of the client to transfer the resource to. * * @return SUCCESS If ownership has been transferred; FAIL if ownership has * not been transferred, because the caller is not owner of the resource or * a client with the identifer dstClient is not present. */ async command error_t transferTo(uint8_t dstClient); /** * Another client transferred ownership of the resource to you by calling * the transfer() command, i.e. you are now in control of the resource. * * @param srcClient The identifier of the client that transferred the resource to you. */ async event void transferredFrom(uint8_t srcClient); /** * Release a shared resource you previously acquired. * * @return SUCCESS The resource has been released
      * FAIL You tried to release but you are not the * owner of the resource * * @note This command should never be called between putting in a request * and waiting for a granted event. Doing so will result in a * potential race condition. There are ways to guarantee that no * race will occur, but they are clumsy and overly complicated. * Since it doesn't logically make since to be calling * release before receiving a granted event, * we have opted to keep thing simple and warn you about the potential * race. */ async command error_t release(); /** * Check if the user of this interface is the current * owner of the Resource * @return TRUE It is the owner
      * FALSE It is not the owner */ async command bool isOwner(); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/UnslottedCsmaCa.nc000066400000000000000000000106721207233610700263000ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2009-03-04 18:31:45 $ * @author Jan Hauer * ======================================================================== */ #include "TKN154_MAC.h" #include "TKN154_platform.h" interface UnslottedCsmaCa { /** * Transmits a frame using the unslotted CSMA-CA algorithm as specified in * IEEE 802.15.4-2006 standard Sect. 7.5.1.4. This command will fail if the * current state of the radio is not RADIO_OFF. The initial CSMA-CA parameters * are passed as a parameter and may be modified by the callee. The caller * must not access csma until the transmitDone event * has been signalled. * * Iff the ACK_REQUESTED flag is set in the frame's header a successful * transmission will include an acknowledgement from the destination; * then, the callee will perform the necessary steps for receiving this * acknowledgement following the specification in IEEE 802.15.4-2006 * Sect. 7.5.6.4. * * @param frame The frame to transmit. * * @param csma Parameters for the unslotted CSMA-CA algorithm. * * @return SUCCESS if the unslotted CSMA-CA algorithm was triggered * successfully; EINVAL if frame or a pointer therein is invalid; * FAIL if the radio is not in state RADIO_OFF. */ async command error_t transmit(ieee154_txframe_t *frame, ieee154_csma_t *csma); /** * Signalled in response to a call to transmit(). This event completes * the transmit operation. If the transmission succeeded then * the time of the transmission -- the point in time when the first bit of the * PPDU was transmitted -- will be stored in the metadata field of the frame. * A transmission failed if either all CCA operation(s) failed (including * backoffs, i.e. NB > macMaxCsmaBackoffs) or if no acknowledgement was received * although one was requested. * * @param frame The frame that was to be transmitted. * * @param csma Parameters for the unslotted CSMA-CA algorithm; this * pointer is identical to the one passed to the transmit command, * the content, however, may have changed. * * @param ackPendingFlag TRUE if an acknowledgement was received and the * "pending" flag is set in the header of the ACK frame, FALSE otherwise * (this is typically only relevant for indirect transmissions) * * @param result SUCCESS if the frame was transmitted (and a matching * acknowledgement was received, if requested); ENOACK if the frame was * transmitted, but no matching acknowledgement was received, although one * was requested; FAIL if the CSMA-CA algorithm failed because * NB > macMaxCsmaBackoffs. */ async event void transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/private/WriteBeaconField.nc000066400000000000000000000050371207233610700264140ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. - Redistributions in * binary form must reproduce the above copyright notice, this list of * conditions and the following disclaimer in the documentation and/or other * materials provided with the distribution. - Neither the name of the * Technische Universitaet Berlin nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-16 18:00:34 $ * @author Jan Hauer * ======================================================================== */ interface WriteBeaconField { /** * Writes a field inside a beacon frame (either "GTS fields" * or "Pending address field", see Fig. 44). IMPORTANT: * the pointer lastBytePtr points to the address of * the last byte that the callee may write. E.g. assume * we want to write a GTS information field of total 4 byte, * the "GTS Specification" byte would be written at lastBytePtr[-3], * the "GTS Directions" field at at lastBytePtr[-2] and so on. * * @param lastBytePtr Address of last byte to write * * @param maxlen Maximum number of bytes that may be written * * @return The number of bytes that have actually been written */ command uint8_t write(uint8_t *lastBytePtr, uint8_t maxlen); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/public/000077500000000000000000000000001207233610700225235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/public/IEEE154BeaconFrame.nc000066400000000000000000000137021207233610700260740ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-09-07 15:29:20 $ * @author Jan Hauer * ======================================================================== */ /** * The IEEE154BeaconFrame interface allows to access the content of a beacon * frame. */ #include interface IEEE154BeaconFrame { /** * Reads the Pending Address Specification of a beacon frame. * * @param frame the beacon frame * @param pendAddrSpec a pointer to where the Pending Address * Specification should be written * @return FAIL if the frame is not a beacon frame, * SUCCESS otherwise */ command error_t getPendAddrSpec(message_t* frame, uint8_t* pendAddrSpec); /** * Reads the Pending Addresses of a given type (short or extended) from a * beacon frame. * * @param frame the beacon frame * @param addrMode the address mode of the sought addresses, either * ADDR_MODE_SHORT_ADDRESS or ADDR_MODE_EXTENDED_ADDRESS * @param buffer a pointer to an array of "bufferSize" addresses * @param bufferSize number of address entries in the buffer * * @return FAIL if the frame is not a beacon frame, * SUCCESS otherwise */ command error_t getPendAddr(message_t* frame, uint8_t addrMode, ieee154_address_t buffer[], uint8_t bufferSize); /** * Determines whether the local macShortAddress or aExtendedAddress * (as currently registered in the PIB) is part of the pending * address list of a beacon. * * @param frame the beacon frame * * @return ADDR_MODE_NOT_PRESENT if the frame is not a beacon * beacon frame, or the local address is not part of * the pending address list, * ADDR_MODE_SHORT_ADDRESS if the local macShortAddress * is part of the pending address list, * ADDR_MODE_EXTENDED_ADDRESS if the local aExtendedAddress * is part of the pending address list */ command uint8_t isLocalAddrPending(message_t* frame); /** * Parses the PAN Descriptor of a beacon frame. Since a frame * does not include information about the channel that it was * received on this information must be provided by the caller. * * @param frame the beacon frame * @param LogicalChannel will be written to PANDescriptor->LogicalChannel * @param ChannelPage will be written to PANDescriptor->ChannelPage * @param PANDescriptor a pointer to a PAN Descriptor, that will hold * the PAN Descriptor as parsed of the beacon frame * @param bufferSize number of address entries in the buffer * * @return SUCCESS if the frame is a valid beacon frame and the * PANDescriptor was successfully parsed, FAIL * otherwise */ command error_t parsePANDescriptor(message_t *frame, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_PANDescriptor_t *pdescriptor); /** * Returns a pointer to the beacon payload. * * @param frame the beacon frame * @return a pointer to the beacon payload, or, if the * frame is not a beacon frame, a pointer to * the MAC payload. If the frame was received * while in promiscuous mode, then this command * returns a pointer to the first byte of the MHR. */ command void* getBeaconPayload(message_t* frame); /** * Returns the length of the beacon payload portion of the frame * (in byte). * * @param frame the frame * @return the length (in byte) of the frame's beacon payload * portion, or, if the frame is not a beacon frame * the length of the MAC payload. If the frame * was received while in promiscuous mode, then * this command returns the length of MHR + MAC Payload. */ command uint8_t getBeaconPayloadLength(message_t* frame); /** * Returns the (beacon) sequence number of the frame. * * @param frame the frame * @return sequence number of the frame */ command uint8_t getBSN(message_t* frame); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/public/IEEE154Frame.nc000066400000000000000000000236551207233610700247740ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:46 $ * @author Jan Hauer * ======================================================================== */ /** * The IEEE154Frame interface allows to access the content of a IEEE 802.15.4 * frame. */ #include #include interface IEEE154Frame { /** * Returns the source addressing mode of the frame. * * @param frame the frame * @return source addressing mode of the frame; either * ADDR_MODE_NOT_PRESENT, ADDR_MODE_RESERVED, * ADDR_MODE_SHORT_ADDRESS or ADDR_MODE_EXTENDED_ADDRESS */ command uint8_t getSrcAddrMode(message_t* frame); /** * Reads the source address (to be interpreted * as specified by the source addressing mode) of the frame. * * @param frame the frame * @param address a pointer to where the source address * will be written * @return SUCCESS, if the source address is present * and was written to "address", * FAIL otherwise (source address remains * unmodified) */ command error_t getSrcAddr(message_t* frame, ieee154_address_t *address); /** * Reads the source PAN identifier of the frame. * * @param frame the frame * @param PANID a pointer to where the source PAN identifier * will be written * @return SUCCESS, if the source PAN identifier is present * and was written to "PANID", * FAIL otherwise (PANID remains unmodified) */ command error_t getSrcPANId(message_t* frame, uint16_t* PANID); /** * Returns the destination addressing mode of the frame. * * @param frame the frame * @return destination addressing mode of the frame; either * ADDR_MODE_NOT_PRESENT, ADDR_MODE_RESERVED, * ADDR_MODE_SHORT_ADDRESS or ADDR_MODE_EXTENDED_ADDRESS */ command uint8_t getDstAddrMode(message_t* frame); /** * Reads the destination address (to be interpreted * as specified by the destination addressing mode) of the frame. * * @param frame the frame * @param address a pointer to where the destination address * will be written * @return SUCCESS, if the destination address is present * and was written to "address", * FAIL otherwise (destination address * remains unmodified) */ command error_t getDstAddr(message_t* frame, ieee154_address_t *address); /** * Reads the destination PAN identifier of the frame. * * @param PANID a pointer to where the destination * PAN identifier should be written * @param frame the frame * @return SUCCESS, if the destination PAN identifier * is present and was copied to "PANID", * FAIL otherwise (PANID remains unmodified) */ command error_t getDstPANId(message_t* frame, uint16_t* PANID); /** * Sets the addressing fields in the MAC header of a frame. The source * PAN identifier and the source address will be set automatically, their * values depend on the SrcAddrMode parameter: if * SrcAddrMode is a short or extended address, then * the current PIB attributes macShortAddress or * aExtendedAddress and macPANId are used. * * @param frame the frame * @param srcAddrMode the source addressing mode * @param dstAddrMode the destination addressing mode * @param dstPANID the 16 bit PAN identifier of the destination * @param dstAddr individual device address of the destination as per * the dstAddrMode * @param security the security options (NULL means security is * disabled) * * @return SUCCESS if the addressing fields where written, * FAIL if an incorrect addressing mode was specified */ command error_t setAddressingFields(message_t* frame, uint8_t SrcAddrMode, uint8_t DstAddrMode, uint16_t DstPANID, ieee154_address_t *DstAddr, ieee154_security_t *security); /** * Returns a pointer to the MAC payload portion of a frame. * * @param frame the frame * @return a pointer to the frame's payload */ command void* getPayload(message_t* frame); /** * Returns the length of the MAC payload portion of the frame (in byte). * * @param frame the frame * @return the length of the frame's payload (in byte) */ command uint8_t getPayloadLength(message_t* frame); /** * Returns the point in time when the first bit (of the PHY preamble) of the * frame was received or transmitted. Time is expressed in symbols as local * time (which can also be accessed via the LocalTime interface * provided by your platform, e.g. * tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzC). If * isTimestampValid() returns FALSE then the timestamp is not valid * and must be ignored. * * @param frame the frame * @return timestamp of the frame */ command uint32_t getTimestamp(message_t* frame); /** * Tells whether the timestamp is valid. * * @return TRUE if timestamp is valid, FALSE otherwise. */ command bool isTimestampValid(message_t* frame); /** * Returns the sequence number of the frame. * * @param frame the frame * @return sequence number of the frame */ command uint8_t getDSN(message_t* frame); /** * Returns the link quality level of a received frame, where * "link quality level" is defined in Sect. 6.9.8 of the * IEEE 802.15.4-2006 standard. For the CC2420 radio it is * identical with the LQI. * * @param frame the frame * @return link quality level */ command uint8_t getLinkQuality(message_t* frame); /** * Returns the average RSSI (in dBm) of a received frame. The * IEEE 802.15.4-2006 standard does not specify that a radio * must provide RSSI, so this command is optional: if a * radio does not provide per-frame RSSI then this call will * return a value of +127. * * @param frame the frame * @return RSSI */ command int8_t getRSSI(message_t* frame); /** * Returns the type of the frame * BEACON=0, DATA=1, ACK=2, COMMAND=3. * * Note: For beacon frames one can use the IEEE154BeaconFrame * interface to inspect additional fields of the frame. * * @param frame the frame * @return the type of the frame */ command uint8_t getFrameType(message_t* frame); /** * Returns a pointer to the MAC header (i.e. to the first byte of * the Frame Control field). * * @param frame the frame * @return a pointer to the frame's header */ command void* getHeader(message_t* frame); /** * Returns the length of the MAC header. * * @param frame the frame * @return the length of the MAC header (in byte) */ command uint8_t getHeaderLength(message_t* frame); /** * Tells whether or not the frame was received while * promiscuous mode was enabled. * * @param frame the frame * @return TRUE if frame was received while in promiscuous * mode, FALSE otherwise */ command bool wasPromiscuousModeEnabled(message_t* frame); /** * Tells whether or not the frame has a standard compliant * IEEE 802.15.4 header - this will only be relevant for frames * received while in promiscuous mode, because then no filtering * (except CRC check) was applied. Note: if this command returns * FALSE, then all other commands in this interface (except * wasPromiscuousModeEnabled()) and the * IEEE154BeaconFrame interface return undefined values! * * @param frame the frame * @return TRUE if frame has a standard compliant header, * FALSE otherwise */ command bool hasStandardCompliantHeader(message_t* frame); } tinyos-2.1.2+dfsg/tos/lib/mac/tkn154/interfaces/public/IEEE154TxBeaconPayload.nc000066400000000000000000000137261207233610700267550ustar00rootroot00000000000000/* * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2009-03-04 18:31:46 $ * @author Jan Hauer * ======================================================================== */ /** * The IEEE154TxBeaconPayload interface allows to access the payload portion of * the beacon frame that is periodically transmitted by a coordinator in a * beacon-enabled PAN. This interface replaces the MLME-SET command for the PIB * attribute values 0x45 (macBeaconPayload) and 0x46 (macBeaconPayloadLength). */ #include interface IEEE154TxBeaconPayload { /** * Sets the beacon payload portion for all subsequently transmitted beacons. * This command replaces the MLME-SET command for the PIB attribute values * 0x45 (macBeaconPayload) and 0x46 (macBeaconPayloadLength). The * setBeaconPayloadDone() event will be signalled when the * beacon payload has been set -- until then beaconPayload must * not be modified. * * @param beaconPayload the new beacon payload * @param length the length of the new beacon payload (in byte) * * @return EBUSY if another transaction is pending, ESIZE if length is too big, * SUCCESS otherwise (and only then the setBeaconPayloadDone event * will be signalled) */ command error_t setBeaconPayload(void *beaconPayload, uint8_t length); /** * Signalled in response to a setBeaconPayload() request. * Indicates that the beacon payload has been copied and returns the * ownership of the buffer to the next higher layer. * * @param beaconPayload the beaconPayload passed in the * setBeaconPayload() command * @param length the length passed in the * setBeaconPayload() command */ event void setBeaconPayloadDone(void *beaconPayload, uint8_t length); /** * Returns a pointer to the current beacon payload. * * @return the current beacon payload */ command const void* getBeaconPayload(); /** * Returns the length of the current beacon payload (in byte). * * @return length of the current beacon payload */ command uint8_t getBeaconPayloadLength(); /** * Replaces (overwrites) a portion of the current beacon payload. Whenever * possible, to minimize overhead, the next higher layer should prefer this * command over the setBeaconPayload() command. The * modifyBeaconPayloadDone() event will be signalled when the beacon * payload has been updated -- until then buffer must not be * modified. * * @param offset offset into the current beacon payload * @param buffer the buffer to be written * @param length the length of the buffer * * @return EBUSY if another transaction is pending, ESIZE if offset+length is * too big, SUCCESS otherwise (and only then the * modifyBeaconPayloadDone event will be signalled) */ command error_t modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength); /** * Signalled in response to a modifyBeaconPayload() request. * Indicates that the beacon payload has been updated. * * @param offset the offset passed in the * modifyBeaconPayload() command * @param buffer the buffer passed in the * modifyBeaconPayload() command * @param bufferLength the bufferLength passed in the * modifyBeaconPayload() command */ event void modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength); /** * Indicates that a beacon frame will be transmitted "soon" and now is a good * time to update the beacon payload (if desired). * * The usual policy is that (1) this event is signalled before every beacon * transmission, and (2) that a subsequent call to setPayload * will still update the beacon payload portion of this beacon. However, * because of tight timing constraints in beacon-enabled mode neither can be * guaranteed! */ event void aboutToTransmit(); /** * Indicates that a beacon frame has been transmitted (the * getBeaconPayload command can be used to inspect the * beacon payload). */ event void beaconTransmitted(); } tinyos-2.1.2+dfsg/tos/lib/net/000077500000000000000000000000001207233610700161225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/4bitle/000077500000000000000000000000001207233610700173055ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/4bitle/LinkEstimator.h000066400000000000000000000103431207233610700222440ustar00rootroot00000000000000/* $Id: LinkEstimator.h,v 1.5 2010-06-29 22:07:47 scipio Exp $ */ /* * Copyright (c) 2006 University of Southern California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef LINK_ESITIMATOR_H #define LINK_ESITIMATOR_H /* @ author Omprakash Gnawali @ Created: June 08, 2006 */ // Number of entries in the neighbor table #define NEIGHBOR_TABLE_SIZE 10 // Masks for the flag field in the link estimation header enum { // use last four bits to keep track of // how many footer entries there are NUM_ENTRIES_FLAG = 15, }; // The first byte of each outgoing packet is a control byte // Bits 4..7 reserved for routing and other protocols // Bits 0..3 is used by the link estimator to encode the // number of linkest entries in the packet // link estimator header added to // every message passing through the link estimator typedef nx_struct linkest_header { nx_uint8_t flags; nx_uint8_t seq; } linkest_header_t; // for outgoing link estimator message // so that we can compute bi-directional quality typedef nx_struct neighbor_stat_entry { nx_am_addr_t ll_addr; nx_uint8_t inquality; } neighbor_stat_entry_t; // we put the above neighbor entry in the footer typedef nx_struct linkest_footer { neighbor_stat_entry_t neighborList[1]; } linkest_footer_t; // Flags for the neighbor table entry enum { VALID_ENTRY = 0x1, // A link becomes mature after BLQ_PKT_WINDOW // packets are received and an estimate is computed MATURE_ENTRY = 0x2, // Flag to indicate that this link has received the // first sequence number INIT_ENTRY = 0x4, // The upper layer has requested that this link be pinned // Useful if we don't want to lose the root from the table PINNED_ENTRY = 0x8 }; // neighbor table entry typedef struct neighbor_table_entry { // link layer address of the neighbor am_addr_t ll_addr; // last beacon sequence number received from this neighbor uint8_t lastseq; // number of beacons received after last beacon estimator update // the update happens every BLQ_PKT_WINDOW beacon packets uint8_t rcvcnt; // number of beacon packets missed after last beacon estimator update uint8_t failcnt; // flags to describe the state of this entry uint8_t flags; // inbound qualities in the range [1..255] // 1 bad, 255 good uint8_t inquality; // ETX for the link to this neighbor. This is the quality returned to // the users of the link estimator uint16_t etx; // Number of data packets successfully sent (ack'd) to this neighbor // since the last data estimator update round. This update happens // every DLQ_PKT_WINDOW data packets uint8_t data_success; // The total number of data packets transmission attempt to this neighbor // since the last data estimator update round. uint8_t data_total; } neighbor_table_entry_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/4bitle/LinkEstimator.nc000066400000000000000000000060371207233610700224220ustar00rootroot00000000000000/* $Id: LinkEstimator.nc,v 1.3 2010-06-29 22:07:47 scipio Exp $ */ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** Provides an additive quality measure for a neighbor. The * provided quality increases when the true link quality increases. * @author Rodrigo Fonseca * @author Omprakash Gnawali * @date $Date: 2010-06-29 22:07:47 $ */ /* Quality of a link is defined by the implementor of this interface. * It could be ETX, PRR, etc. */ interface LinkEstimator { /* get link quality for link to the neighbor */ command uint16_t getLinkQuality(uint16_t neighbor); /* insert this neighbor into the neighbor table */ command error_t insertNeighbor(am_addr_t neighbor); /* pin a neighbor so that it does not get evicted */ command error_t pinNeighbor(am_addr_t neighbor); /* pin a neighbor so that it does not get evicted */ command error_t unpinNeighbor(am_addr_t neighbor); /* called when an acknowledgement is received; sign of a successful data transmission; to update forward link quality */ command error_t txAck(am_addr_t neighbor); /* called when an acknowledgement is not received; could be due to data pkt or acknowledgement loss; to update forward link quality */ command error_t txNoAck(am_addr_t neighbor); /* called when the parent changes; clear state about data-driven link quality */ command error_t clearDLQ(am_addr_t neighbor); /* signal when this neighbor is evicted from the neighbor table */ event void evicted(am_addr_t neighbor); } tinyos-2.1.2+dfsg/tos/lib/net/4bitle/LinkEstimatorC.nc000066400000000000000000000036501207233610700225230ustar00rootroot00000000000000/* $Id: LinkEstimatorC.nc,v 1.2 2010-06-29 22:07:47 scipio Exp $ */ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** The public component of the link estimator that provides the * quality to and from a neighbor * * @author Rodrigo Fonseca * @date $Date: 2010-06-29 22:07:47 $ */ configuration LinkEstimatorC { provides { interface LinkEstimator; } } tinyos-2.1.2+dfsg/tos/lib/net/4bitle/LinkEstimatorP.nc000066400000000000000000000530061207233610700225400ustar00rootroot00000000000000/* $Id: LinkEstimatorP.nc,v 1.19 2010-06-29 22:07:47 scipio Exp $ */ /* * Copyright (c) 2006 University of Southern California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* @ author Omprakash Gnawali @ Created: April 24, 2006 */ #include "./LinkEstimator.h" module LinkEstimatorP { provides { interface StdControl; interface AMSend as Send; interface Receive; interface LinkEstimator; interface Init; interface Packet; interface CompareBit; } uses { interface AMSend; interface AMPacket as SubAMPacket; interface Packet as SubPacket; interface Receive as SubReceive; interface LinkPacketMetadata; interface Random; } } implementation { // configure the link estimator and some constants enum { // If the etx estimate is below this threshold // do not evict a link EVICT_ETX_THRESHOLD = 65, // if received sequence number if larger than the last sequence // number by this gap, we reinitialize the link MAX_PKT_GAP = 10, BEST_ETX = 10, INVALID_RVAL = 0xff, INVALID_NEIGHBOR_ADDR = 0xff, // if we don't know the link quality, we need to return a value so // large that it will not be used to form paths VERY_LARGE_ETX_VALUE = 0xffff, // decay the link estimate using this alpha // we use a denominator of 10, so this corresponds to 0.2 ALPHA = 9, // number of packets to wait before computing a new // DLQ (Data-driven Link Quality) DLQ_PKT_WINDOW = 5, // number of beacons to wait before computing a new // BLQ (Beacon-driven Link Quality) BLQ_PKT_WINDOW = 3, // largest ETX value that we feed into the link quality EWMA // a value of 70 corresponds to having to make six transmissions // to successfully receive one acknowledgement LARGE_ETX_VALUE = 70 }; // keep information about links from the neighbors neighbor_table_entry_t NeighborTable[NEIGHBOR_TABLE_SIZE]; // link estimation sequence, increment every time a beacon is sent uint8_t linkEstSeq = 0; // if there is not enough room in the packet to put all the neighbor table // entries, in order to do round robin we need to remember which entry // we sent in the last beacon uint8_t prevSentIdx = 0; // get the link estimation header in the packet linkest_header_t* getHeader(message_t* m) { return (linkest_header_t*)call SubPacket.getPayload(m, sizeof(linkest_header_t)); } // get the link estimation footer (neighbor entries) in the packet linkest_footer_t* getFooter(message_t* m, uint8_t len) { // To get a footer at offset "len", the payload must be len + sizeof large. return (linkest_footer_t*)(len + (uint8_t *)call Packet.getPayload(m,len + sizeof(linkest_footer_t))); } // add the link estimation header (seq no) and link estimation // footer (neighbor entries) in the packet. Call just before sending // the packet. uint8_t addLinkEstHeaderAndFooter(message_t *msg, uint8_t len) { uint8_t newlen; linkest_header_t * ONE hdr; linkest_footer_t * ONE footer; uint8_t i, j, k; uint8_t maxEntries, newPrevSentIdx; dbg("LI", "newlen1 = %d\n", len); hdr = getHeader(msg); footer = getFooter(msg, len); maxEntries = ((call SubPacket.maxPayloadLength() - len - sizeof(linkest_header_t)) / sizeof(linkest_footer_t)); // Depending on the number of bits used to store the number // of entries, we can encode up to NUM_ENTRIES_FLAG using those bits if (maxEntries > NUM_ENTRIES_FLAG) { maxEntries = NUM_ENTRIES_FLAG; } dbg("LI", "Max payload is: %d, maxEntries is: %d\n", call SubPacket.maxPayloadLength(), maxEntries); j = 0; newPrevSentIdx = 0; for (i = 0; i < NEIGHBOR_TABLE_SIZE && j < maxEntries; i++) { uint8_t neighborCount; neighbor_stat_entry_t * COUNT(neighborCount) neighborLists; if(maxEntries <= NEIGHBOR_TABLE_SIZE) neighborCount = maxEntries; else neighborCount = NEIGHBOR_TABLE_SIZE; neighborLists = TCAST(neighbor_stat_entry_t * COUNT(neighborCount), footer->neighborList); k = (prevSentIdx + i + 1) % NEIGHBOR_TABLE_SIZE; if ((NeighborTable[k].flags & VALID_ENTRY) && (NeighborTable[k].flags & MATURE_ENTRY)) { neighborLists[j].ll_addr = NeighborTable[k].ll_addr; neighborLists[j].inquality = NeighborTable[k].inquality; newPrevSentIdx = k; dbg("LI", "Loaded on footer: %d %d %d\n", j, neighborLists[j].ll_addr, neighborLists[j].inquality); j++; } } prevSentIdx = newPrevSentIdx; hdr->seq = linkEstSeq++; hdr->flags = 0; hdr->flags |= (NUM_ENTRIES_FLAG & j); newlen = sizeof(linkest_header_t) + len + j*sizeof(linkest_footer_t); dbg("LI", "newlen2 = %d\n", newlen); return newlen; } // initialize the given entry in the table for neighbor ll_addr void initNeighborIdx(uint8_t i, am_addr_t ll_addr) { neighbor_table_entry_t *ne; ne = &NeighborTable[i]; ne->ll_addr = ll_addr; ne->lastseq = 0; ne->rcvcnt = 0; ne->failcnt = 0; ne->flags = (INIT_ENTRY | VALID_ENTRY); ne->inquality = 0; ne->etx = 0; } // find the index to the entry for neighbor ll_addr uint8_t findIdx(am_addr_t ll_addr) { uint8_t i; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { if (NeighborTable[i].flags & VALID_ENTRY) { if (NeighborTable[i].ll_addr == ll_addr) { return i; } } } return INVALID_RVAL; } // find an empty slot in the neighbor table uint8_t findEmptyNeighborIdx() { uint8_t i; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { if (NeighborTable[i].flags & VALID_ENTRY) { } else { return i; } } return INVALID_RVAL; } // find the index to the worst neighbor if the eetx // estimate is greater than the given threshold uint8_t findWorstNeighborIdx(uint8_t thresholdETX) { uint8_t i, worstNeighborIdx; uint16_t worstETX, thisETX; worstNeighborIdx = INVALID_RVAL; worstETX = 0; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { if (!(NeighborTable[i].flags & VALID_ENTRY)) { dbg("LI", "Invalid so continuing\n"); continue; } if (!(NeighborTable[i].flags & MATURE_ENTRY)) { dbg("LI", "Not mature, so continuing\n"); continue; } if (NeighborTable[i].flags & PINNED_ENTRY) { dbg("LI", "Pinned entry, so continuing\n"); continue; } thisETX = NeighborTable[i].etx; if (thisETX >= worstETX) { worstNeighborIdx = i; worstETX = thisETX; } } if (worstETX >= thresholdETX) { return worstNeighborIdx; } else { return INVALID_RVAL; } } // find the index to a random entry that is // valid but not pinned uint8_t findRandomNeighborIdx() { uint8_t i; uint8_t cnt; uint8_t num_eligible_eviction; num_eligible_eviction = 0; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { if (NeighborTable[i].flags & VALID_ENTRY) { if (NeighborTable[i].flags & PINNED_ENTRY || NeighborTable[i].flags & MATURE_ENTRY) { } else { num_eligible_eviction++; } } } if (num_eligible_eviction == 0) { return INVALID_RVAL; } cnt = call Random.rand16() % num_eligible_eviction; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { if (!NeighborTable[i].flags & VALID_ENTRY) continue; if (NeighborTable[i].flags & PINNED_ENTRY || NeighborTable[i].flags & MATURE_ENTRY) continue; if (cnt-- == 0) return i; } return INVALID_RVAL; } // update the ETX estimator // called when new beacon estimate is done // also called when new DEETX estimate is done void updateETX(neighbor_table_entry_t *ne, uint16_t newEst) { ne->etx = (ALPHA * ne->etx + (10 - ALPHA) * newEst)/10; } // update data driven ETX void updateDETX(neighbor_table_entry_t *ne) { uint16_t estETX; if (ne->data_success == 0) { // if there were no successful packet transmission in the // last window, our current estimate is the number of failed // transmissions estETX = ne->data_total * 10; } else { estETX = (10 * ne->data_total) / ne->data_success; ne->data_success = 0; ne->data_total = 0; } updateETX(ne, estETX); } // ETX (Expected number of Transmission) // computeETX returns ETX*10 uint16_t computeETX(uint8_t q1) { uint16_t q; if (q1 > 0) { q = 2500 / q1; if (q > 250) { q = VERY_LARGE_ETX_VALUE; } return q; } else { return VERY_LARGE_ETX_VALUE; } } // update the inbound link quality by // munging receive, fail count since last update void updateNeighborTableEst(am_addr_t n) { uint8_t i, totalPkt; neighbor_table_entry_t *ne; uint8_t newEst; uint8_t minPkt; minPkt = BLQ_PKT_WINDOW; dbg("LI", "%s\n", __FUNCTION__); for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { ne = &NeighborTable[i]; if (ne->ll_addr == n) { if (ne->flags & VALID_ENTRY) { dbg("LI", "Making link: %d mature\n", i); totalPkt = ne->rcvcnt + ne->failcnt; if (!(ne->flags & MATURE_ENTRY)) { newEst = (250UL * ne->rcvcnt) / totalPkt; ne->inquality = newEst; ne->etx = computeETX(ne->inquality); } ne->flags |= MATURE_ENTRY; dbg("LI", "MinPkt: %d, totalPkt: %d\n", minPkt, totalPkt); newEst = (250UL * ne->rcvcnt) / totalPkt; dbg("LI,LITest", " %hu: %hhu -> %hhu", ne->ll_addr, ne->inquality, (ALPHA * ne->inquality + (10-ALPHA) * newEst)/10); ne->inquality = (ALPHA * ne->inquality + (10-ALPHA) * newEst)/10; ne->rcvcnt = 0; ne->failcnt = 0; updateETX(ne, computeETX(ne->inquality)); } else { dbg("LI", " - entry %i is invalid.\n", (int)i); } } } } // we received seq from the neighbor in idx // update the last seen seq, receive and fail count // refresh the age void updateNeighborEntryIdx(uint8_t idx, uint8_t seq) { uint8_t packetGap; if (NeighborTable[idx].flags & INIT_ENTRY) { dbg("LI", "Init entry update\n"); NeighborTable[idx].flags &= ~INIT_ENTRY; } packetGap = seq - NeighborTable[idx].lastseq; dbg("LI", "updateNeighborEntryIdx: prevseq %d, curseq %d, gap %d\n", NeighborTable[idx].lastseq, seq, packetGap); NeighborTable[idx].lastseq = seq; NeighborTable[idx].rcvcnt++; if (packetGap > 0) { NeighborTable[idx].failcnt += packetGap - 1; } if (packetGap > MAX_PKT_GAP) { initNeighborIdx(idx, NeighborTable[idx].ll_addr); NeighborTable[idx].lastseq = seq; NeighborTable[idx].rcvcnt = 1; } else if (((NeighborTable[idx].rcvcnt + NeighborTable[idx].failcnt) >= BLQ_PKT_WINDOW) || (packetGap >= BLQ_PKT_WINDOW)) { updateNeighborTableEst(NeighborTable[idx].ll_addr); } } // print the neighbor table. for debugging. void print_neighbor_table() { uint8_t i; neighbor_table_entry_t *ne; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { ne = &NeighborTable[i]; if (ne->flags & VALID_ENTRY) { dbg("LI,LITest", "%d:%d inQ=%d, rcv=%d, fail=%d, Q=%d\n", i, ne->ll_addr, ne->inquality, ne->rcvcnt, ne->failcnt, computeETX(ne->inquality)); } } } // print the packet. for debugging. void print_packet(message_t* msg, uint8_t len) { uint8_t i; uint8_t* b; b = (uint8_t *)msg->data; for(i=0; idata_success++; ne->data_total++; if (ne->data_total >= DLQ_PKT_WINDOW) { updateDETX(ne); } return SUCCESS; } // called when an acknowledgement is not received; could be due to // data pkt or acknowledgement loss; to update forward link quality command error_t LinkEstimator.txNoAck(am_addr_t neighbor) { neighbor_table_entry_t *ne; uint8_t nidx = findIdx(neighbor); if (nidx == INVALID_RVAL) { return FAIL; } ne = &NeighborTable[nidx]; ne->data_total++; if (ne->data_total >= DLQ_PKT_WINDOW) { updateDETX(ne); } return SUCCESS; } // called when the parent changes; clear state about data-driven link quality command error_t LinkEstimator.clearDLQ(am_addr_t neighbor) { neighbor_table_entry_t *ne; uint8_t nidx = findIdx(neighbor); if (nidx == INVALID_RVAL) { return FAIL; } ne = &NeighborTable[nidx]; ne->data_total = 0; ne->data_success = 0; return SUCCESS; } // user of link estimator calls send here // slap the header and footer before sending the message command error_t Send.send(am_addr_t addr, message_t* msg, uint8_t len) { uint8_t newlen; newlen = addLinkEstHeaderAndFooter(msg, len); dbg("LITest", "%s packet of length %hhu became %hhu\n", __FUNCTION__, len, newlen); dbg("LI", "Sending seq: %d\n", linkEstSeq); print_packet(msg, newlen); return call AMSend.send(addr, msg, newlen); } // done sending the message that originated by // the user of this component event void AMSend.sendDone(message_t* msg, error_t error ) { signal Send.sendDone(msg, error); } // cascade the calls down command uint8_t Send.cancel(message_t* msg) { return call AMSend.cancel(msg); } command uint8_t Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command void* Send.getPayload(message_t* msg, uint8_t len) { return call Packet.getPayload(msg, len); } // called when link estimator generator packet or // packets from upper layer that are wired to pass through // link estimator is received void processReceivedMessage(message_t* ONE msg, void* COUNT_NOK(len) payload, uint8_t len) { uint8_t nidx; uint8_t num_entries; dbg("LI", "LI receiving packet, buf addr: %x\n", payload); print_packet(msg, len); if (call SubAMPacket.destination(msg) == AM_BROADCAST_ADDR) { linkest_header_t* hdr = getHeader(msg); am_addr_t ll_addr; ll_addr = call SubAMPacket.source(msg); dbg("LI", "Got seq: %d from link: %d\n", hdr->seq, ll_addr); num_entries = hdr->flags & NUM_ENTRIES_FLAG; print_neighbor_table(); // update neighbor table with this information // find the neighbor // if found // update the entry // else // find an empty entry // if found // initialize the entry // else // find a bad neighbor to be evicted // if found // evict the neighbor and init the entry // else // we can not accommodate this neighbor in the table nidx = findIdx(ll_addr); if (nidx != INVALID_RVAL) { dbg("LI", "Found the entry so updating\n"); updateNeighborEntryIdx(nidx, hdr->seq); } else { nidx = findEmptyNeighborIdx(); if (nidx != INVALID_RVAL) { dbg("LI", "Found an empty entry\n"); initNeighborIdx(nidx, ll_addr); NeighborTable[nidx].lastseq = hdr->seq; updateNeighborEntryIdx(nidx, hdr->seq); } else { nidx = findWorstNeighborIdx(EVICT_ETX_THRESHOLD); if (nidx != INVALID_RVAL) { dbg("LI", "Evicted neighbor %d at idx %d\n", NeighborTable[nidx].ll_addr, nidx); signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr); initNeighborIdx(nidx, ll_addr); } else { dbg("LI", "No room in the table\n"); /* if the white bit is set, lets ask the router if the path through this link is better than at least one known path - if so lets insert this link into the table. */ if (call LinkPacketMetadata.highChannelQuality(msg)) { if (signal CompareBit.shouldInsert(msg, call Packet.getPayload(msg, call Packet.payloadLength(msg)), call Packet.payloadLength(msg))) { nidx = findRandomNeighborIdx(); if (nidx != INVALID_RVAL) { signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr); initNeighborIdx(nidx, ll_addr); } } } } } } } } // new messages are received here // update the neighbor table with the header // and footer in the message // then signal the user of this component event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { dbg("LI", "Received upper packet. Will signal up\n"); processReceivedMessage(msg, payload, len); return signal Receive.receive(msg, call Packet.getPayload(msg, call Packet.payloadLength(msg)), call Packet.payloadLength(msg)); } command void Packet.clear(message_t* msg) { call SubPacket.clear(msg); } // subtract the space occupied by the link estimation // header and footer from the incoming payload size command uint8_t Packet.payloadLength(message_t* msg) { linkest_header_t *hdr; hdr = getHeader(msg); return call SubPacket.payloadLength(msg) - sizeof(linkest_header_t) - sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags); } // account for the space used by header and footer // while setting the payload length command void Packet.setPayloadLength(message_t* msg, uint8_t len) { linkest_header_t *hdr; hdr = getHeader(msg); call SubPacket.setPayloadLength(msg, len + sizeof(linkest_header_t) + sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags)); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(linkest_header_t); } // application payload pointer is just past the link estimation header command void* Packet.getPayload(message_t* msg, uint8_t len) { void* payload = call SubPacket.getPayload(msg, len + sizeof(linkest_header_t)); if (payload != NULL) { payload += sizeof(linkest_header_t); } return payload; } } tinyos-2.1.2+dfsg/tos/lib/net/6lowpan/000077500000000000000000000000001207233610700175105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/6lowpan/IP.h000066400000000000000000000032101207233610700201650ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef __IP_H__ #define __IP_H__ typedef struct { uint8_t addr[16]; } ip6_addr_t; #endif // __IP_H__ tinyos-2.1.2+dfsg/tos/lib/net/6lowpan/IP.nc000066400000000000000000000070221207233610700203430ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * This interface design was inspired Andrew Christian's port * of Adam Dunkel's uIP to TinyOS 1.x. The original interface file * is distributed under the following copyrights: * * Copyright (c) 2005 Hewlett-Packard Company * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of the Hewlett-Packard Company nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * /* * IP address interface. * */ #include "IP.h" interface IP { command void getAddress(ip6_addr_t *addr); command void setAddress(const ip6_addr_t *addr); command void setAddressAutoconf(const ip6_addr_t *addr); } tinyos-2.1.2+dfsg/tos/lib/net/6lowpan/IPC.nc000066400000000000000000000053351207233610700204530ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "IP.h" #include "IP_internal.h" #include "message.h" #ifdef ENABLE_PRINTF_DEBUG #include "printf.h" #endif /* ENABLE_PRINTF_DEBUG */ configuration IPC { provides { interface SplitControl as IPControl; interface IP; interface UDPClient[uint8_t i]; } } implementation { components IPP; components ActiveMessageC as AM; //TODO: need at least 2 pkts for ND components new PoolC(lowpan_pkt_t, SEND_PKTS) as SendPktPool; components new PoolC(app_data_t, FRAG_BUFS) as AppDataPool; components new PoolC(frag_info_t, FRAG_BUFS*FRAGS_PER_DATAGRAM) as FragInfoPool; components new TimerMilliC() as Timer; components LedsC; IPControl = IPP; UDPClient = IPP.UDPClient; IP = IPP.IP; IPP.MessageControl -> AM; IPP.Receive -> AM.Receive[AM_IP_MSG]; IPP.AMSend -> AM.AMSend[AM_IP_MSG]; IPP.Packet -> AM; IPP.AMPacket -> AM; IPP.SendPktPool -> SendPktPool; IPP.AppDataPool -> AppDataPool; IPP.FragInfoPool -> FragInfoPool; IPP.Leds -> LedsC; IPP.Timer -> Timer; #ifdef ENABLE_PRINTF_DEBUG components PrintfC; IPP.PrintfControl -> PrintfC; IPP.PrintfFlush -> PrintfC; #endif /* ENABLE_PRINTF_DEBUG */ } tinyos-2.1.2+dfsg/tos/lib/net/6lowpan/IPP.nc000066400000000000000000001731351207233610700204740ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Parts of the 6lowpan implementation design were inspired Andrew * Christian's port of Adam Dunkel's uIP to TinyOS 1.x. This work is * distributed under the following copyrights: * * Copyright (c) 2001-2003, Adam Dunkels. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2005, Hewlett-Packard Company * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of the Hewlett-Packard Company nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * The actual implementaion of the 6lowpan/IPv6 stack lives in this file. */ #include "IP.h" #include "IP_internal.h" #include "message.h" #ifdef ENABLE_PRINTF_DEBUG #include "printf.h" #endif /* ENABLE_PRINTF_DEBUG */ module IPP { provides { interface SplitControl as IPControl; interface IP; interface UDPClient[uint8_t i]; } uses { interface Timer as Timer; interface Pool as SendPktPool; interface Pool as AppDataPool; interface Pool as FragInfoPool; interface SplitControl as MessageControl; interface Receive; interface AMSend; interface Packet; interface AMPacket; #ifdef ENABLE_PRINTF_DEBUG interface PrintfFlush; interface SplitControl as PrintfControl; #endif /* ENABLE_PRINTF_DEBUG */ interface Leds; } } implementation { /* global variables */ enum { COUNT_UDP_CLIENT = uniqueCount("UDPClient"), COUNT_UDP_CONNS = COUNT_UDP_CLIENT }; ip6_addr_t global_addr; ip6_addr_t linklocal_addr; uint16_t g_dgram_tag = 0; uint16_t uip_len, uip_slen; uint8_t uip_flags; /* The uip_flags variable is used for communication between the TCP/IP stack and the application program. */ message_t g_msg; // AM for sending lowpan_pkt_t rx_pkt; // packet used for receiving //struct lowpan_pkt send_pkt[SEND_PKTS]; // packets to be sent lowpan_pkt_t *send_queue; // packets to be sent - queue frag_buf_t frag_bufs[FRAG_BUFS]; // fragment reassembly buffers struct udp_conn udp_conns[COUNT_UDP_CONNS]; static uint16_t lastport; /* Keeps track of the last port used for a new connection. */ static int g_send_pending = 0; // Pre-declare // clear all fields, set app_data = NULL void lowpan_pkt_clear(lowpan_pkt_t *pkt); int ip6_addr_cmp(const ip6_addr_t *a, const ip6_addr_t *b); static void dump_serial_packet(const unsigned char *packet, const int len); /*---------------------------------------------------------------------------*/ /* from http://www.nabble.com/memcpy-assumes-16-bit-alignment--t712619.html */ void * my_memcpy(void *dst0, const void *src0, size_t len) { char *dst = (char *)dst0; const char *src = (const char *)src0; void *ret = dst0; for (; len > 0; len--) *dst++ = *src++; return ret; } /* * Use this function for copying/setting/memset() 16-bit values * on the MSP430 !!! * * The mspgcc compiler geenrates broken code when doing memset with 16 * bit values, i.e. things go wrong if they are not aligned at 16-bit * boundaries. See * http://www.nabble.com/msp430-gcc-generating-unaligned-access.-t2261862.html * and page 25 in http://www.eecs.harvard.edu/~konrad/projects/motetrack/mspgcc-manual-20031127.pdf for details. */ /* use when DST may be UNALIGNED */ inline void set_16t(void *dst, uint16_t val) { *((uint8_t*)dst) = *((uint8_t*)&val); *(((uint8_t*)dst)+1) = *(((uint8_t*)&val)+1); //memcpy((uint8_t*)dst, (uint8_t*)&val, sizeof(uint8_t)); //memcpy(((uint8_t*)dst)+1, ((uint8_t*)&val)+1, sizeof(uint8_t)); } /* use when SRC may be UNALIGNED */ inline uint16_t get_16t(void *val) { uint16_t tmp; *((uint8_t*)&tmp) = *((uint8_t*)val); *(((uint8_t*)&tmp)+1) = *(((uint8_t*)val)+1); //memcpy((uint8_t*)&tmp, (uint8_t*)val, sizeof(uint8_t)); //memcpy(((uint8_t*)&tmp)+1, ((uint8_t*)val)+1, sizeof(uint8_t)); return tmp; } inline uint16_t htons( uint16_t val ) { // The MSB is little-endian; network order is big return ((val & 0xff) << 8) | ((val & 0xff00) >> 8); } inline uint16_t ntohs( uint16_t val ) { // The MSB is little-endian; network order is big return ((val & 0xff) << 8) | ((val & 0xff00) >> 8); } inline void htonl( uint32_t val, uint8_t *dest ) { dest[0] = (val & 0xff000000) >> 24; dest[1] = (val & 0x00ff0000) >> 16; dest[2] = (val & 0x0000ff00) >> 8; dest[3] = (val & 0x000000ff); } inline uint32_t ntohl( uint8_t *src ) { return (((uint32_t) src[0]) << 24) | (((uint32_t) src[1]) << 16) | (((uint32_t) src[2]) << 8) | (((uint32_t) src[3])); } /* inline void uip_pack_ipaddr( ip6_addr_t *addr, uint8_t *new_addr) { memcpy(addr, new_addr, sizeof(addr)); } // Unpack the IP address into an array of octet inline void uip_unpack_ipaddr( uint8_t *in, uint8_t *out ) { memcpy(out, in, sizeof(ip6_addr_t)); } */ /*---------------------------------------------------------------------------*/ /* This should be optimized for aligned and unaligned case */ static uint16_t ip_chksum(const uint8_t *buf, uint16_t len, uint16_t acc) { uint16_t v; for (; len > 1; len -= 2) { v = (((uint16_t) buf[1]) << 8) | ((uint16_t) buf[0]); if ( (acc += v) < v ) acc++; buf += 2; } // add an odd byte (note we pad with 0) if (len) { v = (uint16_t) buf[0]; if ( (acc += v) < v ) acc++; } return acc; } /* * IPv6 checksum of the pseudo-header (RFC 2460, Sec 8.1) * src_addr and dst_addr are in nerwork byte order * len is in host byte order (will internally be converted) */ static uint16_t ipv6_chksum(const ip6_addr_t* src_addr, const ip6_addr_t* dst_addr, const uint8_t next_header, const uint16_t upper_layer_len, uint16_t acc) { uint16_t tmp; /* source address */ acc = ip_chksum((const uint8_t *) src_addr, sizeof(*src_addr), acc); /* destination address */ acc = ip_chksum((const uint8_t *) dst_addr, sizeof(*dst_addr), acc); /* upper-layer packet length */ tmp = htons(upper_layer_len); acc = ip_chksum((const uint8_t *) &tmp, sizeof(tmp), acc); /* next header */ tmp = htons(next_header); acc = ip_chksum((const uint8_t *) &tmp, sizeof(tmp), acc); return acc; } /* same as above, but including the uppel-layer buffer */ static uint16_t ipv6_chksum_data(const ip6_addr_t* src_addr, const ip6_addr_t* dst_addr, const uint8_t next_header, const uint8_t *data, uint16_t data_len, uint16_t acc) { /* upper-layer payload */ acc = ip_chksum(data, data_len, acc); return ipv6_chksum(src_addr, dst_addr, next_header, data_len, acc); } /*---------------------------------------------------------------------------*/ bool ipv6_addr_is_zero(const ip6_addr_t *addr) { int i; for (i=0;i<16;i++) { if (addr->addr[i]) { return FALSE; } } return TRUE; } bool ipv6_addr_is_linklocal_unicast(const ip6_addr_t *addr) { if ( addr->addr[0] == 0xFE && addr->addr[1] == 0x80 && addr->addr[2] == 0 && addr->addr[3] == 0 && addr->addr[4] == 0 && addr->addr[5] == 0 && addr->addr[6] == 0 && addr->addr[7] == 0 ) return TRUE; else return FALSE; } //TODO: prepend pan_id once we have a proper 802.15.4 stack void ipv6_iface_id_from_am_addr(am_addr_t am_addr, uint8_t *host_part) { memset(host_part, 0, 6); host_part[4] = 0xFF; host_part[5] = 0xFE; host_part += 6; set_16t(host_part, htons(am_addr)); } void ipv6_iface_id_from_hw_addr(hw_addr_t *hw_addr, uint8_t *host_part) { if (hw_addr->type == HW_ADDR_SHORT) { memset(host_part, 0, 6); host_part[4] = 0xFF; host_part[5] = 0xFE; host_part[7] = hw_addr->addr_short[0]; host_part[8] = hw_addr->addr_short[1]; //ipv6_iface_id_from_am_addr(hw_addr->addr_short, host_part); } else { //TODO } } bool ipv6_addr_is_linklocal_multicast(const ip6_addr_t *addr) { if (addr->addr[0] == 0xFF && addr->addr[1] == 0x02) return TRUE; else return FALSE; } bool ipv6_addr_is_linklocal(const ip6_addr_t *addr) { return (ipv6_addr_is_linklocal_unicast(addr) || ipv6_addr_is_linklocal_multicast(addr)); } bool ipv6_addr_is_linklocal_allnodes(const ip6_addr_t *addr) { //TODO: interface-local addr FF01::1 if ( addr->addr[0] == 0xFF && addr->addr[1] == 0x02 && addr->addr[2] == 0 && addr->addr[3] == 0 && addr->addr[4] == 0 && addr->addr[5] == 0 && addr->addr[6] == 0 && addr->addr[7] == 0 && addr->addr[8] == 0 && addr->addr[9] == 0 && addr->addr[10] == 0 && addr->addr[11] == 0 && addr->addr[12] == 0 && addr->addr[13] == 0 && addr->addr[14] == 0 && addr->addr[15] == 0x01 ) return TRUE; else return FALSE; } bool ipv6_addr_is_solicited_node_multicast_prefix(const ip6_addr_t *addr) { // Solicited-Node Address: FF02:0:0:0:0:1:FFXX:XXXX // Solicited-Node multicast address are computed as a function of a // node's unicast and anycast addresses. A Solicited-Node multicast // address is formed by taking the low-order 24 bits of an address // (unicast or anycast) and appending those bits to the prefix // FF02:0:0:0:0:1:FF00::/104 resulting in a multicast address in the // range // FF02:0:0:0:0:1:FF00:0000 // to // FF02:0:0:0:0:1:FFFF:FFFF if ( addr->addr[0] == 0xFF && addr->addr[1] == 0x02 && addr->addr[2] == 0 && addr->addr[3] == 0 && addr->addr[4] == 0 && addr->addr[5] == 0 && addr->addr[6] == 0 && addr->addr[7] == 0 && addr->addr[8] == 0 && addr->addr[9] == 0 && addr->addr[10] == 0 && addr->addr[11] == 0x01 && addr->addr[12] == 0xFF ) return TRUE; else return FALSE; } uint8_t cmp_ipv6_addr(const ip6_addr_t *addr1, const ip6_addr_t *addr2) { return memcmp(addr1, addr2, sizeof(ip6_addr_t)); } uint8_t ipv6_addr_is_for_me(const ip6_addr_t *addr) { //TODO: loopback addr (::1) //TODO: interface-local addr FF01::1 if (cmp_ipv6_addr(addr, &global_addr) == 0 || cmp_ipv6_addr(addr, &linklocal_addr) == 0 || ipv6_addr_is_linklocal_allnodes(addr) || (ipv6_addr_is_solicited_node_multicast_prefix(addr) && (((addr->addr[13] == global_addr.addr[13]) && (addr->addr[14] == global_addr.addr[14]) && (addr->addr[15] == global_addr.addr[15]) ) || ((addr->addr[13] == linklocal_addr.addr[13]) && (addr->addr[14] == linklocal_addr.addr[14]) && (addr->addr[15] == linklocal_addr.addr[15]) ) ) ) ) return 1; else return 0; } /* determine the right src_addr given a dst_addr */ ip6_addr_t * determine_src_ipv6_addr(const ip6_addr_t *dst_addr) { if (ipv6_addr_is_linklocal(dst_addr)) { return &linklocal_addr; } else { return &global_addr; } } uint8_t cmp_hw_addr(const hw_addr_t *addr1, const hw_addr_t *addr2) { // for short addresses compare only the first two bytes if (addr1->type == HW_ADDR_SHORT && addr2->type == HW_ADDR_SHORT) { return memcmp(addr1->addr_short, addr2->addr_short, 2); } else { return memcmp(addr1, addr2, sizeof(hw_addr_t)); } } uint8_t hw_addr_is_broadcat(const hw_addr_t *hw_addr) { if (hw_addr->type == HW_ADDR_SHORT && hw_addr->addr_short[0] == 0xFF && hw_addr->addr_short[1] == 0xFF) return 1; // TODO: long address else return 0; } uint8_t hw_addr_is_for_me(const hw_addr_t *addr) { am_addr_t am_addr = call AMPacket.address(); if (hw_addr_is_broadcat(addr) || (addr->addr_short[0] == (uint8_t) am_addr && addr->addr_short[1] == (uint8_t) (am_addr >> 8)) ) return 1; else return 0; } /*---------------------------------------------------------------------------*/ void increment_g_dgram_tag() { uint16_t tmp = ntohs(g_dgram_tag); if (tmp == 0xFFFF) tmp = 0; else tmp++; g_dgram_tag = htons(tmp); } void lowpan_pkt_clear(lowpan_pkt_t *pkt) { memset(pkt, 0, sizeof(*pkt)); pkt->header_begin = pkt->header + sizeof(pkt->header); } /* void frag_buf_clear(frag_buf_t *frag_buf) { memset(frag_buf, 0, sizeof(*frag_buf)); frag_buf->buf_begin = frag_buf->buf; } */ frag_buf_t * find_fragment(hw_addr_t *hw_src_addr, hw_addr_t *hw_dst_addr, uint16_t dgram_size, uint16_t dgram_tag) { int i; for (i = 0; i< FRAG_BUFS; i++) { //printf("find_frag\n"); if (frag_bufs[i].frag_timeout != FRAG_FREE) { //printf("find: [%d] %d\n", i, frag_bufs[i].frag_timeout); /* printf("find: tag: 0x%04X, size: %d\n", get_16t(&frag_bufs[i].dgram_tag), ntohs(get_16t(&frag_bufs[i].dgram_size))); */ if ( get_16t(&(frag_bufs[i].dgram_tag)) == dgram_tag && get_16t(&(frag_bufs[i].dgram_size)) == dgram_size && cmp_hw_addr(&frag_bufs[i].hw_src_addr, hw_src_addr) == 0 && cmp_hw_addr(&frag_bufs[i].hw_dst_addr, hw_dst_addr) == 0 ) { return &(frag_bufs[i]); } } else { //printf("find: [%d] FREE\n", i); } } return NULL; } void free_frag_list(frag_info_t *p) { frag_info_t *q; while (p) { q = p->next; call FragInfoPool.put(p); p = q; } } /*---------------------------------------------------------------------------*/ void ip_init() { //int i; lastport = 1024; memset(udp_conns, 0, sizeof(udp_conns)); //memset(&global_addr, 0, sizeof(global_addr)); memset(&linklocal_addr, 0, sizeof(linklocal_addr)); memset(frag_bufs, 0, sizeof(frag_bufs)); /* for(i=0;i= 32000) { lastport = 4096; } for (c = 0; c < COUNT_UDP_CONNS; ++c) { if (udp_conns[c].lport == lastport) { goto again; } } return lastport; } /* ========================= IPv6 - output ================================= */ task void sendTask() { lowpan_pkt_t *pkt = send_queue; struct lowpan_frag_hdr *frag_hdr; uint8_t *payload; uint8_t frame_len; uint8_t len; /* length of the fragment just being sent * excluding the 6lowpan optional headers */ uint8_t remaining_len; /* how much more data can we fit * into this fragment */ uint8_t *tmp_cpy_buf; /* simplifies memcpy */ uint8_t tmp_cpy_len; /* simplifies memcpy */ if (!pkt || g_send_pending) { return; } //len = pkt->header_len + pkt->app_data_len - pkt->dgram_offset*8; if (pkt->header_len + pkt->app_data_len <= LINK_DATA_MTU) { /* fragmentation not needed */ frame_len = pkt->header_len + pkt->app_data_len; /* prepare the AM */ call Packet.clear(&g_msg); call Packet.setPayloadLength(&g_msg, frame_len); payload = call Packet.getPayload(&g_msg, frame_len); // memset(payload, 0 , payload_len); // should check payload_len here /* copy header */ if (pkt->header_begin && pkt->header_len) memcpy(payload, pkt->header_begin, pkt->header_len); payload += pkt->header_len; /* copy app_data */ if (pkt->app_data_begin && pkt->app_data_len) memcpy(payload, pkt->app_data_begin, pkt->app_data_len); } else { /* do fragmentation */ if (pkt->dgram_offset == 0) { /* first fragment */ increment_g_dgram_tag(); set_16t(&pkt->dgram_size, htons(pkt->header_len + pkt->app_data_len)); /* align fragment length at an 8-byte multiple */ len = LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr); len -= len%8; frame_len = len + sizeof(struct lowpan_frag_hdr); } else { /* subsequent fragment */ if (pkt->header_len + pkt->app_data_len - pkt->dgram_offset*8 <= LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr) - sizeof(uint8_t)) { /* last fragment -- does not have to be aligned * at an 8-byte multiple */ len = pkt->header_len + pkt->app_data_len - pkt->dgram_offset*8; } else { /* align fragment length at an 8-byte multiple */ len = LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr) - sizeof(uint8_t); len -= len%8; } frame_len = len + sizeof(struct lowpan_frag_hdr) + sizeof(uint8_t); } /* prepare the AM */ call Packet.clear(&g_msg); call Packet.setPayloadLength(&g_msg,frame_len); payload = call Packet.getPayload(&g_msg, frame_len); remaining_len = frame_len; if (remaining_len != frame_len) { //TODO: report an error #ifdef ENABLE_PRINTF_DEBUG printf("payload length does not match requested length\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; } /* fill in the fragment header */ frag_hdr = (struct lowpan_frag_hdr *) payload; set_16t(&frag_hdr->dgram_size, pkt->dgram_size); set_16t(&frag_hdr->dgram_tag, g_dgram_tag); payload += sizeof(struct lowpan_frag_hdr); remaining_len -= sizeof(struct lowpan_frag_hdr); if (pkt->dgram_offset == 0) { /* first fragment */ frag_hdr->dispatch |= DISPATCH_FIRST_FRAG; } else { /* subsequent fragment */ frag_hdr->dispatch |= DISPATCH_SUBSEQ_FRAG; *payload = pkt->dgram_offset; payload += sizeof(uint8_t); } /* copy header */ if (pkt->header_begin && pkt->header_len && pkt->header_len > pkt->dgram_offset*8 /* don't copy the header if offset is beyond it*/ ) { /* determine what has to be copied */ tmp_cpy_buf = pkt->header_begin + pkt->dgram_offset*8; tmp_cpy_len = min(pkt->header_len - pkt->dgram_offset*8, remaining_len); /* copy it */ memcpy(payload, tmp_cpy_buf, tmp_cpy_len); payload += tmp_cpy_len; remaining_len -= tmp_cpy_len; } /* copy app_data */ if (remaining_len && pkt->app_data_begin && pkt->app_data_len ) { /* determine what has to be copied */ if (pkt->dgram_offset*8 > pkt->header_len) { tmp_cpy_buf = pkt->app_data_begin + pkt->dgram_offset*8 - pkt->header_len; } else { /* header has been copied only now, offset not yet updated */ tmp_cpy_buf = pkt->app_data_begin; } tmp_cpy_len = min(remaining_len, pkt->app_data_len - (pkt->dgram_offset*8 - pkt->header_len)); /* copy it */ memcpy(payload, tmp_cpy_buf, tmp_cpy_len); payload += tmp_cpy_len; remaining_len -= tmp_cpy_len; } /* update the offset - in 8-byte multiples */ pkt->dgram_offset += len/8; if (len%8) { /* last fragment with a special length */ pkt->dgram_offset++; } } /* send the AM */ g_send_pending = 1; call AMSend.send(AM_BROADCAST_ADDR, &g_msg, frame_len); //call AMSend.send(0x12, &g_msg, frame_len); } event void AMSend.sendDone(message_t* msg, error_t error) { uint16_t len; lowpan_pkt_t *pkt = send_queue; g_send_pending = 0; if (!send_queue) { // somethign really went wrong... return; } len = pkt->header_len + pkt->app_data_len; if (len <= LINK_DATA_MTU || pkt->dgram_offset*8 >= len){ /* packet has been completely sent, we can move on to the next one */ /* UDPClient.sendDone notification */ if (send_queue->notify_num != LOWPAN_PKT_NO_NOTIFY) { signal UDPClient.sendDone[send_queue->notify_num - 1] (SUCCESS, send_queue->app_data); } /* deallocation of app_data (fragment reassembly buffer) */ if (send_queue->app_data_dealloc == APP_DATA_DEALLOC_TRUE && send_queue->app_data) { call AppDataPool.put((app_data_t*) send_queue->app_data); send_queue->app_data = NULL; } pkt = send_queue->next; call SendPktPool.put(send_queue); send_queue = pkt; } if (send_queue) { post sendTask(); } } void ipv6_output_uncompressed(lowpan_pkt_t *pkt, const uint8_t next_header) { struct ip6_hdr *hdr; lowpan_pkt_t *p; pkt->header_begin -= sizeof(struct ip6_hdr); pkt->header_len += sizeof(struct ip6_hdr); hdr = (struct ip6_hdr *) pkt->header_begin; /* fill in the IPv6 header */ hdr->vtc = IPV6_VERSION; /* IPv6 version */ /* payload length */ set_16t(&hdr->plen, htons(pkt->header_len + pkt->app_data_len - sizeof(struct ip6_hdr))); hdr->nxt_hdr = next_header; hdr->hlim = IP_HOP_LIMIT; /* hop limit */ memcpy(&hdr->src_addr, &pkt->ip_src_addr, sizeof(hdr->src_addr)); memcpy(&hdr->dst_addr, &pkt->ip_dst_addr, sizeof(hdr->dst_addr)); /* set 6lowpan dispatch value */ pkt->header_begin -= sizeof(uint8_t); pkt->header_len += sizeof(uint8_t); *(pkt->header_begin) = DISPATCH_UNCOMPRESSED_IPV6; //TODO: check if neighbor is information available // if yes // fill in hw_addr // append to send_queue // else // append to neighbor_queue // request ND, add an entry into the neighbor table /* append pkt to send queue */ if(!send_queue) { send_queue = pkt; } else { for(p=send_queue; p->next; p=p->next); p->next = pkt; } /* schedule sendTask */ post sendTask(); } /* determines length of the inline carried fields for the HC1 encoding * the return value is the number of bits, bot bytes !!! */ int get_hc1_length(uint8_t hc1_enc) { int len = 0; /* Hop Limit always carried inline */ len += 8; /* source IP address */ if ((hc1_enc & HC1_SRC_PREFIX_MASK) == HC1_SRC_PREFIX_INLINE) len += 64; if ((hc1_enc & HC1_SRC_IFACEID_MASK) == HC1_SRC_IFACEID_INLINE) len += 64; /* destination IP address */ if ((hc1_enc & HC1_DST_PREFIX_MASK) == HC1_DST_PREFIX_INLINE) len += 64; if ((hc1_enc & HC1_DST_IFACEID_MASK) == HC1_DST_IFACEID_INLINE) len += 64; /* Traffic Class and Flow Label */ if ((hc1_enc & HC1_TCFL_MASK) == HC1_TCFL_INLINE) len += 24; /* Next Header */ if ((hc1_enc & HC1_NEXTHDR_MASK) == HC1_NEXTHDR_INLINE) len += 8; return len; } void ipv6_compressed_output(lowpan_pkt_t *pkt, const uint8_t next_header, uint8_t hc2_enc, bool hc2_present) { lowpan_pkt_t *p; uint8_t hc1_enc = 0; /* HC2 compression */ if (hc2_present) { hc1_enc |= HC1_HC2_PRESENT; } else { hc1_enc |= HC1_HC2_NONE; } /* next header */ switch (next_header) { case NEXT_HEADER_UDP: hc1_enc |= HC1_NEXTHDR_UDP; break; case NEXT_HEADER_ICMP6: hc1_enc |= HC1_NEXTHDR_ICMP; break; case NEXT_HEADER_TCP: hc1_enc |= HC1_NEXTHDR_TCP; break; default: hc1_enc |= HC1_NEXTHDR_INLINE; pkt->header_begin -= sizeof(next_header); pkt->header_len += sizeof(next_header); *(pkt->header_begin) = next_header; break; } /* we're always sending packets with TC anf FL zero */ hc1_enc |= HC1_TCFL_ZERO; /* destination address interface identifier */ hc1_enc |= HC1_DST_IFACEID_INLINE; pkt->header_begin -= 8; pkt->header_len += 8; memcpy(pkt->header_begin, ((void*)&(pkt->ip_dst_addr)) + 8, 8); /* destination address prefix */ if (ipv6_addr_is_linklocal_unicast(&pkt->ip_dst_addr)) { hc1_enc |= HC1_DST_PREFIX_LINKLOCAL; } else { hc1_enc |= HC1_DST_PREFIX_INLINE; pkt->header_begin -= 8; pkt->header_len += 8; memcpy(pkt->header_begin, &(pkt->ip_dst_addr), 8); } /* source address interface identifier */ hc1_enc |= HC1_SRC_IFACEID_INLINE; pkt->header_begin -= 8; pkt->header_len += 8; memcpy(pkt->header_begin, ((void*)&(pkt->ip_src_addr)) + 8, 8); /* source address prefix */ if (ipv6_addr_is_linklocal_unicast(&pkt->ip_src_addr)) { hc1_enc |= HC1_SRC_PREFIX_LINKLOCAL; } else { hc1_enc |= HC1_SRC_PREFIX_INLINE; pkt->header_begin -= 8; pkt->header_len += 8; memcpy(pkt->header_begin, &(pkt->ip_src_addr), 8); } /* Hop Limit */ pkt->header_begin -= sizeof(uint8_t); pkt->header_len += sizeof(uint8_t); *pkt->header_begin = IP_HOP_LIMIT; /* HC2 encoding field */ if (hc2_present) { pkt->header_begin -= sizeof(uint8_t); pkt->header_len += sizeof(uint8_t); *(pkt->header_begin) = hc2_enc; } /* HC1 encoding field */ pkt->header_begin -= sizeof(uint8_t); pkt->header_len += sizeof(uint8_t); *(pkt->header_begin) = hc1_enc; /* set 6lowpan dispatch value */ pkt->header_begin -= sizeof(uint8_t); pkt->header_len += sizeof(uint8_t); *(pkt->header_begin) = DISPATCH_COMPRESSED_IPV6; /* append pkt to send queue */ if(!send_queue) { send_queue = pkt; } else { for(p=send_queue; p->next; p=p->next); p->next = pkt; } /* schedule sendTask */ post sendTask(); } void icmpv6_output(lowpan_pkt_t *pkt, uint8_t type, uint8_t code) { struct icmp6_hdr *hdr; uint16_t cksum = 0; /* fill in the source address if not set */ if (ipv6_addr_is_zero(&pkt->ip_src_addr)) { memcpy(&pkt->ip_src_addr, determine_src_ipv6_addr(&pkt->ip_dst_addr), sizeof(pkt->ip_src_addr)); } /* fill in the ICMPv6 header */ pkt->header_begin -= sizeof(struct icmp6_hdr); pkt->header_len += sizeof(struct icmp6_hdr); hdr = (struct icmp6_hdr *) pkt->header_begin; hdr->type = type; hdr->code = code; /* calculate the checksum */ set_16t(&hdr->cksum, 0); cksum = ipv6_chksum(&pkt->ip_src_addr, &pkt->ip_dst_addr, NEXT_HEADER_ICMP6, pkt->header_len + pkt->app_data_len, cksum); cksum = ip_chksum((void*)hdr, sizeof(struct icmp6_hdr), cksum); cksum = ip_chksum(pkt->app_data_begin, pkt->app_data_len, cksum); cksum = ~cksum; set_16t(&hdr->cksum, cksum); ipv6_compressed_output(pkt, NEXT_HEADER_ICMP6, 0, FALSE); } error_t udp_uncompressed_output(void* buf, uint16_t len, const ip6_addr_t *src_addr, const ip6_addr_t *dst_addr, uint16_t src_port, uint16_t dst_port, uint8_t udp_client_num) { struct udp_hdr *hdr; lowpan_pkt_t *pkt; uint16_t cksum = 0; if (!dst_addr) return FAIL; pkt = call SendPktPool.get(); if (!pkt) return FAIL; lowpan_pkt_clear(pkt); /* set the UDPCliemt number to allow for signalling sendDone */ pkt->notify_num = udp_client_num; /* set application data */ pkt->app_data = buf; pkt->app_data_begin = buf; pkt->app_data_len = len; /* set IP addresses */ memcpy(&pkt->ip_dst_addr, dst_addr, sizeof(pkt->ip_dst_addr)); if (src_addr) { memcpy(&pkt->ip_src_addr, src_addr, sizeof(pkt->ip_src_addr)); } else { memcpy(&pkt->ip_src_addr, determine_src_ipv6_addr(dst_addr), sizeof(pkt->ip_src_addr)); } /* fill in the UDP header */ pkt->header_begin -= sizeof(struct udp_hdr); pkt->header_len += sizeof(struct udp_hdr); hdr = (struct udp_hdr *) pkt->header_begin; /* src port */ set_16t(&hdr->srcport, src_port); /* dst port */ set_16t(&hdr->dstport, dst_port); /* length */ set_16t(&hdr->len,htons(len + sizeof(struct udp_hdr))); /* checksum */ set_16t(&hdr->chksum, 0); cksum = ip_chksum((uint8_t*) hdr, sizeof(struct udp_hdr), cksum); cksum = ipv6_chksum(&pkt->ip_dst_addr, &pkt->ip_src_addr, NEXT_HEADER_UDP, sizeof(struct udp_hdr) + len, cksum); cksum = ip_chksum(buf, len, cksum); if (cksum != 0xFFFF) { cksum = ~cksum; } set_16t(&hdr->chksum, cksum); ipv6_compressed_output(pkt, NEXT_HEADER_UDP, 0, FALSE); return SUCCESS; } error_t udp_compressed_output(void* buf, uint16_t len, const ip6_addr_t *src_addr, const ip6_addr_t *dst_addr, uint16_t src_port, uint16_t dst_port, uint8_t udp_client_num) { lowpan_pkt_t *pkt; uint16_t cksum = 0; uint16_t hc2_enc = 0; uint16_t udp_len = htons(len + sizeof(struct udp_hdr)); if (!dst_addr) return FAIL; pkt = call SendPktPool.get(); if (!pkt) return FAIL; lowpan_pkt_clear(pkt); /* set the UDPCliemt number to allow for signalling sendDone */ pkt->notify_num = udp_client_num; /* set application data */ pkt->app_data = buf; pkt->app_data_begin = buf; pkt->app_data_len = len; /* set IP addresses */ memcpy(&pkt->ip_dst_addr, dst_addr, sizeof(pkt->ip_dst_addr)); if (src_addr) { memcpy(&pkt->ip_src_addr, src_addr, sizeof(pkt->ip_src_addr)); } else { memcpy(&pkt->ip_src_addr, determine_src_ipv6_addr(dst_addr), sizeof(pkt->ip_src_addr)); } /* Checksum */ cksum = 0; cksum = ip_chksum((void*) &src_port, sizeof(src_port), cksum); cksum = ip_chksum((void*) &dst_port, sizeof(src_port), cksum); cksum = ip_chksum((void*) &udp_len, sizeof(udp_len), cksum); cksum = ipv6_chksum(&pkt->ip_dst_addr, &pkt->ip_src_addr, NEXT_HEADER_UDP, sizeof(struct udp_hdr) + len, cksum); cksum = ip_chksum(buf, len, cksum); if (cksum != 0xFFFF) { cksum = ~cksum; } /* HC_UDP encoding */ /* Checksum */ pkt->header_begin -= sizeof(cksum); pkt->header_len += sizeof(cksum); set_16t(pkt->header_begin, cksum); /* Length */ //hc2_enc |= HC2_UDP_LEN_COMPR; hc2_enc |= HC2_UDP_LEN_INLINE; pkt->header_begin -= sizeof(udp_len); pkt->header_len += sizeof(udp_len); set_16t(pkt->header_begin, udp_len); /* Destination Port */ hc2_enc |= HC2_UDP_DST_PORT_INLINE; pkt->header_begin -= sizeof(dst_port); pkt->header_len += sizeof(dst_port); set_16t(pkt->header_begin, dst_port); /* Source Port */ hc2_enc |= HC2_UDP_SRC_PORT_INLINE; pkt->header_begin -= sizeof(src_port); pkt->header_len += sizeof(src_port); set_16t(pkt->header_begin, src_port); ipv6_compressed_output(pkt, NEXT_HEADER_UDP, hc2_enc, TRUE); return SUCCESS; } /* ========================== IPv6 - input ================================= */ void icmpv6_input(uint8_t* buf, uint16_t len) { lowpan_pkt_t *pkt; struct icmp6_hdr *hdr = (struct icmp6_hdr *)buf; /* Compute and check the IP header checksum. */ if (ipv6_chksum_data(&rx_pkt.ip_src_addr, &rx_pkt.ip_dst_addr, NEXT_HEADER_ICMP6, buf, len, 0) != 0xffff) { #ifdef ENABLE_PRINTF_DEBUG printf("icmpv6_input(): checksum failed\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ call Leds.led0Toggle(); return; } buf += sizeof(struct icmp6_hdr); len -= sizeof(struct icmp6_hdr); switch (hdr->type) { case ICMP_TYPE_ECHO_REQUEST: /* ICMP code has to be 0 */ if (hdr->code != 0) { return; } call Leds.led2Toggle(); /* send back an ICMP ECHO REPLY */ /* allocate a packet for the reply */ pkt = call SendPktPool.get(); if (!pkt) { #ifdef ENABLE_PRINTF_DEBUG printf("icmpv6_input() - failed to alloc pkt\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; } lowpan_pkt_clear(pkt); /* copy/set ICMP data */ if (rx_pkt.app_data) { /* fragment reassembly took place - ICMP data is in app_data buf */ pkt->app_data = rx_pkt.app_data; pkt->app_data_begin = buf; pkt->app_data_len = len; pkt->app_data_dealloc = rx_pkt.app_data_dealloc; rx_pkt.app_data_dealloc = APP_DATA_DEALLOC_FALSE; rx_pkt.app_data = NULL; } else { /* there is no app_data buf, everything fits into the header buf */ pkt->header_begin -= len; my_memcpy(pkt->header_begin, buf, len); pkt->app_data_begin = pkt->header_begin; pkt->app_data_len = len; } /* set destination address */ memcpy(&pkt->ip_dst_addr, &rx_pkt.ip_src_addr, sizeof(pkt->ip_dst_addr)); // source address determined automatically icmpv6_output(pkt, ICMP_TYPE_ECHO_REPLY, 0); break; case ICMP_TYPE_ECHO_REPLY: break; } } /* UDP input processing. */ void udp_input(uint8_t* buf, uint16_t len) { struct udp_conn *conn; int c; struct udp_hdr *hdr = (struct udp_hdr *)buf; /* Compute and check the IP header checksum. */ if (ipv6_chksum_data(&rx_pkt.ip_src_addr, &rx_pkt.ip_dst_addr, NEXT_HEADER_UDP, buf, len, 0) != 0xffff) { #ifdef ENABLE_PRINTF_DEBUG printf("udp_input(): checksum failed\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ call Leds.led0Toggle(); return; } if (htons(len) != hdr->len) { #ifdef ENABLE_PRINTF_DEBUG printf("length check failed\n"); printf("reported length: %d\n", len); printf("UDP header len: %d\n", ntohs(hdr->len)); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; } /* Scan the list of UDP sockets and look for one that is accepting this port */ for (c = 0, conn = udp_conns; c < COUNT_UDP_CONNS; c++, conn++) { /* printf("lport: 0x%X\n", conn->lport); printf("rport: 0x%X\n", conn->rport); printf("conn->ripaddr: "); dump_serial_packet(&(conn->ripaddr), sizeof(ip6_addr_t)); printf("src_addr: "); dump_serial_packet(src_addr, sizeof(ip6_addr_t)); */ if ( (conn->lport != 0 && conn->lport == hdr->dstport) && (conn->rport == 0 || conn->rport == hdr->srcport) && (ipv6_addr_is_zero(&(conn->ripaddr)) || (cmp_ipv6_addr(&conn->ripaddr, &rx_pkt.ip_src_addr) == 0)) ) goto udp_match_found; } #ifdef ENABLE_PRINTF_DEBUG printf("udp_input(): no connection matched - dropping UDP packet\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; udp_match_found: len -= sizeof(struct udp_hdr); if (len > 0) { signal UDPClient.receive[c](&rx_pkt.ip_src_addr, ntohs(hdr->srcport), buf+sizeof(struct udp_hdr), len); } } void udp_input_compressed(uint8_t* buf, uint16_t len, uint8_t hc2_enc) { struct udp_conn *conn; int c; uint16_t src_port; uint16_t dst_port; uint16_t chksum; uint16_t tmp_chksum; uint16_t tmp_len; /* UDP Source Port */ if ((hc2_enc & HC2_UDP_SRC_PORT_MASK) == HC2_UDP_SRC_PORT_INLINE) { src_port = get_16t(buf); buf += sizeof(src_port); len -= sizeof(src_port); } else { //TODO return; } /* UDP Destination Port */ if ((hc2_enc & HC2_UDP_DST_PORT_MASK) == HC2_UDP_DST_PORT_INLINE) { dst_port = get_16t(buf); buf += sizeof(dst_port); len -= sizeof(dst_port); } else { //TODO return; } /* UDP Length */ if ((hc2_enc & HC2_UDP_LEN_MASK) == HC2_UDP_LEN_INLINE) { /* check the length */ if (ntohs(get_16t(buf)) != len + sizeof(uint16_t)*2) { #ifdef ENABLE_PRINTF_DEBUG printf("length check failed\n"); printf("reported length: %d\n", len + sizeof(uint16_t)*2); printf("UDP header len: %d\n", ntohs(get_16t(buf))); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; } buf += sizeof(uint16_t); len -= sizeof(uint16_t); } /* Checksum */ chksum = get_16t(buf); buf += sizeof(chksum); len -= sizeof(chksum); /* --- end of decompression --- */ /* Compute and check the IP header checksum. */ tmp_chksum = 0; /* IPv6 pseaudo header */ tmp_chksum = ipv6_chksum(&rx_pkt.ip_src_addr, &rx_pkt.ip_dst_addr, NEXT_HEADER_UDP, /* len is only app data, so add UDP header * length to get the length for chksum */ len + sizeof(struct udp_hdr), tmp_chksum); /* UDP header */ tmp_len = htons(len + sizeof(struct udp_hdr)); tmp_chksum = ip_chksum((void*) &src_port, sizeof(src_port), tmp_chksum); tmp_chksum = ip_chksum((void*) &dst_port, sizeof(src_port), tmp_chksum); tmp_chksum = ip_chksum((void*) &chksum, sizeof(chksum), tmp_chksum); tmp_chksum = ip_chksum((void*) &tmp_len, sizeof(len), tmp_chksum); /* UDP payload - application data */ tmp_chksum = ip_chksum(buf, len, tmp_chksum); if (tmp_chksum != 0xffff) { #ifdef ENABLE_PRINTF_DEBUG printf("udp_input_compressed(): checksum failed\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ call Leds.led0Toggle(); return; } // printf("udp_input_compressed()\n"); // printf("src_port: 0x%X\n", src_port); // printf("dst_port: 0x%X\n", dst_port); // printf("len (app_data): %d\n", len); // call PrintfFlush.flush(); /* Scan the list of UDP sockets and look for one that is accepting this port */ for (c = 0, conn = udp_conns; c < COUNT_UDP_CONNS; c++, conn++) { /* printf("lport: 0x%X\n", conn->lport); printf("rport: 0x%X\n", conn->rport); printf("conn->ripaddr: "); dump_serial_packet(&(conn->ripaddr), sizeof(ip6_addr_t)); printf("src_addr: "); dump_serial_packet(&rx_pkt.ip_src_addr, sizeof(ip6_addr_t)); */ if ( (conn->lport != 0 && conn->lport == dst_port) && (conn->rport == 0 || conn->rport == src_port) && (ipv6_addr_is_zero(&(conn->ripaddr)) || (cmp_ipv6_addr(&conn->ripaddr, &rx_pkt.ip_src_addr) == 0)) ) goto udp_match_found; } #ifdef ENABLE_PRINTF_DEBUG printf("udp_input_compressed(): "\ "no connection matched - dropping UDP packet\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; udp_match_found: if (len > 0) { signal UDPClient.receive[c](&rx_pkt.ip_src_addr, ntohs(src_port), buf, len); } } /* processed the IPv6 header (uncompressed) */ void ipv6_input_uncompressed(uint8_t* buf, uint16_t len) { struct ip6_hdr *hdr = (struct ip6_hdr *) buf; /* check the version */ if ((hdr->vtc & IPV6_VERSION_MASK) != 0x60) { #ifdef ENABLE_PRINTF_DEBUG printf("IP version check failed (%X)\n", hdr->vtc & IPV6_VERSION_MASK); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; } /* Hop Limit */ if (! hdr->hlim) { /* Hop Limit reached zero */ #ifdef ENABLE_PRINTF_DEBUG printf("Hop Limit reached zero\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; } /* check dst IP address */ if (! ipv6_addr_is_for_me(&hdr->dst_addr)) { return; } /* Check the size of the packet. If the size reported to us in * uip_len doesn't match the size reported in the IP header, there * has been a transmission error and we drop the packet. */ if ( hdr->plen != htons(len - sizeof(struct ip6_hdr))) { #ifdef ENABLE_PRINTF_DEBUG printf("length check failed\n"); printf("l2 reported length: %d\n", len - sizeof(struct ip6_hdr)); printf("IPv6 header plen: %d (network byte order: 0x%X\n", ntohs(hdr->plen), hdr->plen); //((hdr->plen & 0xff00) >> 8) & ((hdr->plen & 0xff) << 8)); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; } /* copy IP addresses to rx_pkt */ memcpy(&rx_pkt.ip_src_addr, &(hdr->src_addr), sizeof(rx_pkt.ip_src_addr)); memcpy(&rx_pkt.ip_dst_addr, &(hdr->dst_addr), sizeof(rx_pkt.ip_dst_addr)); /* multipex on next header */ switch (hdr->nxt_hdr) { case NEXT_HEADER_ICMP6: icmpv6_input(buf + sizeof(struct ip6_hdr), len - sizeof(struct ip6_hdr)); break; case NEXT_HEADER_UDP: udp_input(buf + sizeof(struct ip6_hdr), len - sizeof(struct ip6_hdr)); break; /* case NEXT_HEADER_TCP: break; */ default: #ifdef ENABLE_PRINTF_DEBUG printf("unknown IPv6 next header: 0x%X\n", hdr->nxt_hdr); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ break; } } /* processed the IPv6 header (uncompressed) */ void ipv6_input_compressed(uint8_t* buf, uint16_t len) { struct ip6_hdr *ip_hdr = (struct ip6_hdr *) buf; uint8_t hc1_enc; uint8_t hc2_enc = 0; uint8_t next_header; /* printf("nxt_hdr: 0x%X\n", hdr->nxt_hdr); dump_serial_packet(buf, len); call PrintfFlush.flush(); */ hc1_enc = *buf; buf += sizeof(hc1_enc); len -= sizeof(hc1_enc); /* HC2 encoding follows HC1 encoding */ if ((hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT) { hc2_enc = *buf; buf += sizeof(hc2_enc); len -= sizeof(hc2_enc); } /* Hop Limit */ if (*buf) { buf += sizeof(ip_hdr->hlim); len -= sizeof(ip_hdr->hlim); } else { /* Hop Limit reached zero */ return; } /* source IP address */ if ((hc1_enc & HC1_SRC_PREFIX_MASK) == HC1_SRC_PREFIX_INLINE) { memcpy(&rx_pkt.ip_src_addr, buf, sizeof(rx_pkt.ip_src_addr)/2); buf += sizeof(rx_pkt.ip_src_addr)/2; len -= sizeof(rx_pkt.ip_src_addr)/2; } else { /* linl-local prefix */ memset(&rx_pkt.ip_src_addr, 0, sizeof(rx_pkt.ip_src_addr)/2); rx_pkt.ip_src_addr.addr[0] = 0xFE; rx_pkt.ip_src_addr.addr[1] = 0x80; } if ((hc1_enc & HC1_SRC_IFACEID_MASK) == HC1_SRC_IFACEID_INLINE) { memcpy(((void*)&rx_pkt.ip_src_addr) + sizeof(rx_pkt.ip_src_addr)/2, buf, sizeof(rx_pkt.ip_src_addr)/2); buf += sizeof(rx_pkt.ip_src_addr)/2; len -= sizeof(rx_pkt.ip_src_addr)/2; } /* destination IP address */ if ((hc1_enc & HC1_DST_PREFIX_MASK) == HC1_DST_PREFIX_INLINE) { memcpy(&rx_pkt.ip_dst_addr, buf, sizeof(rx_pkt.ip_dst_addr)/2); buf += sizeof(rx_pkt.ip_dst_addr)/2; len -= sizeof(rx_pkt.ip_dst_addr)/2; } else { /* linl-local prefix */ memset(&rx_pkt.ip_dst_addr, 0, sizeof(rx_pkt.ip_dst_addr)/2); rx_pkt.ip_dst_addr.addr[0] = 0xFE; rx_pkt.ip_dst_addr.addr[1] = 0x80; } if ((hc1_enc & HC1_DST_IFACEID_MASK) == HC1_DST_IFACEID_INLINE) { memcpy(((void*)&rx_pkt.ip_dst_addr) + sizeof(rx_pkt.ip_dst_addr)/2, buf, sizeof(rx_pkt.ip_dst_addr)/2); buf += sizeof(rx_pkt.ip_dst_addr)/2; len -= sizeof(rx_pkt.ip_dst_addr)/2; } /* check dst IP address */ if (! ipv6_addr_is_for_me(&rx_pkt.ip_dst_addr)) { /* printf("IP address check failed\n"); dump_serial_packet(hdr->dst_addr.addr, sizeof(hdr->dst_addr.addr)); call PrintfFlush.flush(); */ return; } /* Traffic Class and Flow Label */ if ((hc1_enc & HC1_TCFL_MASK) == HC1_TCFL_INLINE) { //TODO return; } /* Next Header */ switch (hc1_enc & HC1_NEXTHDR_MASK) { case HC1_NEXTHDR_INLINE: next_header = *buf; buf += sizeof(uint8_t); len -= sizeof(uint8_t); break; case HC1_NEXTHDR_UDP: next_header = NEXT_HEADER_UDP; break; case HC1_NEXTHDR_ICMP: next_header = NEXT_HEADER_ICMP6; break; case HC1_NEXTHDR_TCP: next_header = NEXT_HEADER_TCP; break; default: #ifdef ENABLE_PRINTF_DEBUG printf("unknown next header HC1 encoding\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ return; } /* multipex on the next header */ switch (next_header) { case NEXT_HEADER_ICMP6: icmpv6_input(buf, len); break; case NEXT_HEADER_UDP: /* HC_UDP compression */ if ((hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT && (hc1_enc & HC1_NEXTHDR_MASK) == HC1_NEXTHDR_UDP) { udp_input_compressed(buf, len, hc2_enc); break; } else { udp_input(buf, len); break; } /* case NEXT_HEADER_TCP: break; */ default: #ifdef ENABLE_PRINTF_DEBUG printf("unknown IPv6 next header: 0x%X\n", next_header); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ break; } } /* call the right fct for processing the IPv6 header */ void layer3_input(uint8_t *buf, uint16_t len) { uint8_t *dispatch = buf; buf++; len--; /* uncompressed IPv6 */ if (*dispatch == DISPATCH_UNCOMPRESSED_IPV6) { ipv6_input_uncompressed(buf, len); } /* LOWPAN_HC1 compressed IPv6 */ else if (*dispatch == DISPATCH_COMPRESSED_IPV6) { //call Leds.led1Toggle(); return ipv6_input_compressed(buf, len); } /* unknown dispatch value if we got here */ else { //TODO: report an error } } /* process the optional 6lowpan headers */ void TRUSTEDBLOCK lowpan_input(uint8_t* buf, uint8_t len ) { uint8_t *dispatch; struct lowpan_broadcast_hdr *bc_hdr; struct lowpan_frag_hdr *frag_hdr; int i; frag_buf_t *frag; uint16_t dgram_tag; uint16_t dgram_size; uint8_t dgram_offset; frag_info_t *p; frag_info_t **q; uint8_t last_frag; dispatch = buf; /* --- 6lowpan optional headers --- */ /* Mesh Addressing header */ if ( (*dispatch & DISPATCH_MESH_MASK) == DISPATCH_MESH) { // check if we're the final recipient in the mesh addressing header buf++; len--; /* Hops Left */ if ((*dispatch & 0x0F) == 0) { goto discard_packet; } /* Final Destination Address */ if (*dispatch & DISPATCH_MESH_F_FLAG) { rx_pkt.hw_dst_addr.type = HW_ADDR_LONG; memcpy(&rx_pkt.hw_dst_addr.addr_long, buf, sizeof(rx_pkt.hw_dst_addr.addr_long)); buf += sizeof(rx_pkt.hw_dst_addr.addr_long); len -= sizeof(rx_pkt.hw_dst_addr.addr_long); } else { rx_pkt.hw_dst_addr.type = HW_ADDR_SHORT; memcpy(&rx_pkt.hw_dst_addr.addr_short, buf, sizeof(rx_pkt.hw_dst_addr.addr_short)); buf += sizeof(rx_pkt.hw_dst_addr.addr_short); len -= sizeof(rx_pkt.hw_dst_addr.addr_short); } /* check if we're the recipient */ if (! hw_addr_is_for_me(&rx_pkt.hw_dst_addr)) { // TODO: if mesh forwarding enabled, then forward goto discard_packet; } /* Originator Address */ if (*dispatch & DISPATCH_MESH_O_FLAG) { rx_pkt.hw_src_addr.type = HW_ADDR_LONG; memcpy(&rx_pkt.hw_src_addr.addr_long, buf, sizeof(rx_pkt.hw_src_addr.addr_long)); buf += sizeof(rx_pkt.hw_src_addr.addr_long); len -= sizeof(rx_pkt.hw_src_addr.addr_long); } else { rx_pkt.hw_src_addr.type = HW_ADDR_SHORT; memcpy(rx_pkt.hw_src_addr.addr_short, buf, sizeof(rx_pkt.hw_src_addr.addr_short)); buf += sizeof(rx_pkt.hw_src_addr.addr_short); len -= sizeof(rx_pkt.hw_src_addr.addr_short); } dispatch = buf; } if (*dispatch == DISPATCH_BC0) { /* Broadcast header */ bc_hdr = (struct lowpan_broadcast_hdr *) buf; // do something usefull with bc_hdr->seq_no... buf += (sizeof(struct lowpan_broadcast_hdr)); len -= (sizeof(struct lowpan_broadcast_hdr)); dispatch = buf; } /* fragment header */ if ((*dispatch & DISPATCH_FRAG_MASK) == DISPATCH_FIRST_FRAG || (*dispatch & DISPATCH_FRAG_MASK) == DISPATCH_SUBSEQ_FRAG ) { frag_hdr = (struct lowpan_frag_hdr *) buf; buf += sizeof(struct lowpan_frag_hdr); len -= sizeof(struct lowpan_frag_hdr); /* collect information about the fragment */ dgram_tag = get_16t(&frag_hdr->dgram_tag); //dgram_size = get_16t(&frag_hdr->dgram_size); //dgram_size &= htons(0x07FF); dgram_size = frag_hdr->dgram_size8[1]; dgram_size += (frag_hdr->dgram_size8[0] & 0x07) << 8; dgram_size = htons(dgram_size); if ((*dispatch & DISPATCH_FRAG_MASK) == DISPATCH_SUBSEQ_FRAG) { dgram_offset = *buf; buf += 1; len -= 1; } else { dgram_offset = 0; } #ifdef ENABLE_PRINTF_DEBUG printf("off: %d\n", dgram_offset); #endif /* ENABLE_PRINTF_DEBUG */ /* printf("off: %d, f_b[%d] %d\n", dgram_offset, 0, frag_bufs[0].frag_timeout); */ frag = find_fragment(&rx_pkt.hw_src_addr, &rx_pkt.hw_dst_addr, dgram_size, dgram_tag); /* if (frag) { printf("frag found\n"); } else { printf("frag NOT found\n"); } */ if (frag) { /* fragment reassembly buffer found */ /* check for overlap */ //TODO: ENABLE THIS PART !!! // for (p = frag->frag_list; p; p=p->next) { // if (dgram_offset == p->offset){ // if (len == p->len) { // /* same offset, same len => discard this duplicate */ // goto discard_packet; // } else { // /* same offset, but different len */ // goto frag_overlap; // } // } else if (dgram_offset > p->offset // && dgram_offset < p->offset + p->len/8 // ) { // /* offset inside another frag*/ // goto frag_overlap; // } // } /* no overlap found */ //printf("frag found: %d\n", frag->frag_timeout); goto frag_reassemble; } else { /* fragment reassembly buffer not found - set up a new one */ // no match found -- need a new frag_buf_t for (i = 0; i< FRAG_BUFS; i++) { if (frag_bufs[i].frag_timeout == FRAG_FREE && call AppDataPool.empty() == FALSE) { frag = &frag_bufs[i]; set_16t(&frag->dgram_tag, get_16t(&frag_hdr->dgram_tag)); set_16t(&frag->dgram_size, dgram_size); memcpy(&frag->hw_src_addr, &rx_pkt.hw_src_addr, sizeof(frag->hw_src_addr)); memcpy(&frag->hw_dst_addr, &rx_pkt.hw_dst_addr, sizeof(frag->hw_dst_addr)); frag->frag_timeout = FRAG_TIMEOUT; frag->buf = (uint8_t *) call AppDataPool.get(); frag->frag_list = NULL; /* printf("new frag_buf[%d] %d\n", i, frag_bufs[i].frag_timeout); printf("frag pool size: %d\n", call FragInfoPool.size()); call PrintfFlush.flush(); */ goto frag_reassemble; } } // no free slot for reassembling fragments #ifdef ENABLE_PRINTF_DEBUG printf("no free slot - discarding frag\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ goto discard_packet; } frag_overlap: /* overlap - discard previous frags * and restart fragment reassembly */ free_frag_list(frag->frag_list); frag->frag_list = NULL; frag->frag_timeout = FRAG_TIMEOUT; goto frag_reassemble; frag_reassemble: /* printf("tag: 0x%04X, size: %d, off: %d, t: %d\n", get_16t(&frag->dgram_tag), ntohs(get_16t(&frag->dgram_size)), dgram_offset, frag->frag_timeout); //printf("f_b[%d] %d\n", 0, frag_bufs[0].frag_timeout); if (dgram_offset > 0) { call PrintfFlush.flush(); } */ /* copy buf data */ //if (dgram_offset*8 + len <= sizeof(frag->buf)) { if (dgram_offset*8 + len <= FRAG_BUF_SIZE) { memcpy(frag->buf + (dgram_offset*8), buf, len); } else { call Leds.led0Toggle(); } /* update frag_info */ p = call FragInfoPool.get(); if (!p) { //out of memory - fragment reassembly failing //TODO call Leds.led0Toggle(); #ifdef ENABLE_PRINTF_DEBUG printf("FAILED to alloc frag_info_t\n"); call PrintfFlush.flush(); #endif /* ENABLE_PRINTF_DEBUG */ } else { p->offset = dgram_offset; p->len = len; /* insert frag_info into the orderer list */ if (frag->frag_list) { for(q = &(frag->frag_list); (*q)->next; q=&((*q)->next)) { if (p->offset > (*q)->offset) { break; } } p->next = *q; *q = p; } else { p->next = frag->frag_list; frag->frag_list = p; } } #ifdef ENABLE_PRINTF_DEBUG if (dgram_offset > 20) { printf("frag_list:\n"); //ntohs(get_16t(&frag->dgram_tag)), //ntohs(get_16t(&frag->dgram_size))); for (p=frag->frag_list;p;p=p->next) { printf("off: %d, len: %d\n", p->offset, p->len); } call PrintfFlush.flush(); } #endif /* ENABLE_PRINTF_DEBUG */ /* check if this is not the last fragment */ if (!dgram_offset) { /* the first fragment cannot be the last one */ last_frag = 0; } else { last_frag=1; dgram_offset = ntohs(dgram_size)/8; for(p=frag->frag_list; p && dgram_offset; p=p->next) { //debug("dgram_offset: %d, p->offset: %d, p->len: %d\n", // dgram_offset, p->offset, p->len); if (p->offset + p->len/8 != dgram_offset) { //debug("offset mismatch - not the last fragment\n"); last_frag = 0; break; } dgram_offset = p->offset; } } if (last_frag) { call Leds.led1Toggle(); /* prepare the complete packet to be passed up*/ lowpan_pkt_clear(&rx_pkt); rx_pkt.app_data = frag->buf; rx_pkt.app_data_dealloc = APP_DATA_DEALLOC_TRUE; rx_pkt.header_begin = frag->buf; rx_pkt.header_len = ntohs(dgram_size); //debug("dumping reassembled datagram...\n"); //dump_serial_packet(pkt->buf_begin, pkt->len); /* pass up the packet */ layer3_input(rx_pkt.header_begin, rx_pkt.header_len); /* deallocate all fragment info */ free_frag_list(frag->frag_list); frag->frag_list = NULL; frag->frag_timeout = FRAG_FREE; if (rx_pkt.app_data_dealloc == APP_DATA_DEALLOC_TRUE && rx_pkt.app_data) { /* deallocate the frag_buf */ call AppDataPool.put((app_data_t *) rx_pkt.app_data); } } else { /* packet not yet complete */ return; } dispatch = buf; } else { /* no fragmentation */ /* pass up the complete packet */ lowpan_pkt_clear(&rx_pkt); rx_pkt.header_begin = buf; rx_pkt.header_len = len; layer3_input(buf, len); } discard_packet: // deallocate pkt // update stats } /* Receive an AM from the lower layer */ event TRUSTEDBLOCK message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { am_addr_t am_addr; //call Leds.led0Toggle(); /* 802.15.4 source address */ rx_pkt.hw_src_addr.type = HW_ADDR_SHORT; am_addr = call AMPacket.source(msg); memcpy(&rx_pkt.hw_src_addr.addr_short, &am_addr, sizeof(am_addr_t)); /* 802.15.4 destination address */ rx_pkt.hw_dst_addr.type = HW_ADDR_SHORT; am_addr = call AMPacket.destination(msg); memcpy(&rx_pkt.hw_dst_addr.addr_short, &am_addr, sizeof(am_addr_t)); lowpan_input(payload, len); return msg; } /****************************************** * Interface StdControl ******************************************/ command error_t IPControl.start() { #ifdef ENABLE_PRINTF_DEBUG call PrintfControl.start(); #endif /* ENABLE_PRINTF_DEBUG */ ip_init(); linklocal_addr.addr[0] = 0xfe; linklocal_addr.addr[1] = 0x80; ipv6_iface_id_from_am_addr(call AMPacket.address(), &(linklocal_addr.addr[8])); //set_16t((uint16_t *)&(linklocal_addr.addr[14]), am_addr); call MessageControl.start(); return SUCCESS; } event void MessageControl.startDone(error_t err) { if (err == SUCCESS) { signal IPControl.startDone(err); call Timer.startPeriodic(1024); /* fire every second */ } else { call MessageControl.start(); } } command error_t IPControl.stop() { call MessageControl.stop(); call Timer.stop(); #ifdef ENABLE_PRINTF_DEBUG call PrintfControl.stop(); #endif /* ENABLE_PRINTF_DEBUG */ return SUCCESS; } event void MessageControl.stopDone(error_t err) { signal IPControl.stopDone(err); } /****************************************** * IP Interface ******************************************/ command void IP.getAddress(ip6_addr_t *addr) { addr = &global_addr; //uip_unpack_ipaddr( uip_global_addr, addr->addr ); } command void IP.setAddress(const ip6_addr_t *addr) { memcpy(&global_addr, addr, sizeof(*addr)); //uip_pack_ipaddr(uip_global_addr,octet1,octet2,octet3,octet4); } command void IP.setAddressAutoconf(const ip6_addr_t *addr) { memcpy(&global_addr, addr, sizeof(*addr)); ipv6_iface_id_from_am_addr(call AMPacket.address(), &(global_addr.addr[8])); //set_16t((uint16_t *)&(global_addr.addr[14]), am_addr); } /***************************** * UDP functions *****************************/ command error_t UDPClient.listen[uint8_t num](uint16_t port) { if (port) { memset(&udp_conns[num].ripaddr, 0, sizeof(udp_conns[num].ripaddr)); set_16t(&udp_conns[num].lport, htons(port)); } else { set_16t(&udp_conns[num].lport, 0); } return SUCCESS; } command error_t UDPClient.connect[uint8_t num](const ip6_addr_t *addr, const uint16_t port) { struct udp_conn *conn = &udp_conns[num]; if (addr && port) { memcpy(&conn->ripaddr, addr, sizeof(conn->ripaddr)); set_16t(&conn->rport, htons(port)); } else { memset(&conn->ripaddr, 0 , sizeof(conn->ripaddr)); set_16t(&conn->rport, 0); } return SUCCESS; } command error_t UDPClient.sendTo[uint8_t num](const ip6_addr_t *addr, uint16_t port, const uint8_t *buf, uint16_t len) { if (udp_conns[num].lport == 0) { set_16t(&udp_conns[num].lport, htons(udp_assign_port())); } return udp_compressed_output(buf, len, NULL, addr, udp_conns[num].lport, htons(port), num+1); } command error_t UDPClient.send[uint8_t num]( const uint8_t *buf, uint16_t len ) { if (udp_conns[num].rport == 0 || ipv6_addr_is_zero(&udp_conns[num].ripaddr)) return FAIL; return call UDPClient.sendTo[num](&(udp_conns[num].ripaddr), udp_conns[num].rport, buf, len); } default event void UDPClient.sendDone[uint8_t num](error_t result, void* buf) { } default event void UDPClient.receive[uint8_t num](const ip6_addr_t *addr, uint16_t port, uint8_t *buf, uint16_t len) { } /****************************************** * Printf Timer ******************************************/ #ifdef ENABLE_PRINTF_DEBUG event void PrintfFlush.flushDone(error_t error) {} event void PrintfControl.startDone(error_t error) {} event void PrintfControl.stopDone(error_t error) {} static void dump_serial_packet(const unsigned char *packet, const int len) { int i; printf("len: %d\n", len); //call PrintfFlush.flush(); if (!packet) { printf("packet is NULL"); } else { for (i = 0; i < len; i++) printf("%02x ", packet[i]); } printf("\n"); //call PrintfFlush.flush(); } #endif /* ENABLE_PRINTF_DEBUG */ #ifndef ENABLE_PRINTF_DEBUG static void dump_serial_packet(const unsigned char *packet, const int len) {} #endif /* ENABLE_PRINTF_DEBUG */ /****************************************** * Interface Timer ******************************************/ event void Timer.fired() { int i=0; /* heartbeat led */ //call Leds.led0Toggle(); /* discard timed-out and not yet assembled fragmented packet */ for (i=0;i 0) { frag_bufs[i].frag_timeout--; } else { /* fragment reassembly timed out */ frag_bufs[i].frag_timeout = FRAG_FREE; free_frag_list(frag_bufs[i].frag_list); if (frag_bufs[i].buf) { call AppDataPool.put((app_data_t *) frag_bufs[i].buf); } //call Leds.led0Toggle(); } } } //TODO: check for timed-out ND request and resend/give up and mark as such //TODO: check outgoing pkts queue and schedule ND or sending /* counter++; if (locked) { return; } else { //Packet.clear(&test_packet); uint8_t* data=(uint8_t*) call Packet.getPayload(&test_packet,NULL); if (call Packet.maxPayloadLength() < 1) { return; } data[0] = counter; call AMPacket.setSource(&test_packet, 0x14); if (call AMSend.send(3, &test_packet, 1) == SUCCESS) { // if (call AMSend.send(AM_BROADCAST_ADDR, &test_packet, sizeof(test_serial_msg_t)) == SUCCESS) { locked = TRUE; } } */ } } tinyos-2.1.2+dfsg/tos/lib/net/6lowpan/IP_internal.h000066400000000000000000000321221207233610700220650ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * The structures are based on the ones from FreeBSD header files * in /usr/include/netinet6/, which are distributed unred the following * copyright: * * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the project nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * Copyright (c) 1982, 1986, 1990, 1993 * The Regents of the University of California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Header file for the 6lowpan/IPv6 stack. */ #ifndef __IP_INTERNAL_H__ #define __IP_INTERNAL_H__ enum { HW_ADDR_SHORT, HW_ADDR_LONG }; typedef struct hw_addr { uint8_t type; // HW_ADDR_SHORT | HW_ADDR_LONG union { uint8_t addr_short[2]; uint8_t addr_long[8]; }; } hw_addr_t; /* number of packets in SendPktPool */ #define SEND_PKTS 1 /* number of fragment reassembly buffers */ #define FRAG_BUFS 1 /* timeout for discarding a fragment reassembly buffer * 60 seconds max in 6lowpan draft */ #define FRAG_TIMEOUT 10 /* number of fragments per reassembled datagram */ #define FRAGS_PER_DATAGRAM 15 /* fragment reassembmly buffer size */ #define FRAG_BUF_SIZE 1280 /* default IPv6 Hop Limit for outgoing packets (except Neighbor Discovery) */ #define IP_HOP_LIMIT 64 #define LOWPAN_MTU 1280 #define LOWPAN_OVERHEAD 17 // 16 bytes opt. headers and 1 byte dispatch #define LINK_DATA_MTU 100 // 802.15.4 space left after the 802.15.4 header: 128 - xx = 102 bytes max /* size of app_data buffer */ #define LOWPAN_APP_DATA_LEN FRAG_BUF_SIZE /* maximum length of 6lowpan headers */ //#define LOWPAN_HEADER_LEN 49 #define LOWPAN_HEADER_LEN 102 /* flag marking an unused fragment reassembly buffer/structure */ #define FRAG_FREE 0xFF /* 6lowpan dispatch values */ #define DISPATCH_UNCOMPRESSED_IPV6 0x41 #define DISPATCH_COMPRESSED_IPV6 0x42 #define DISPATCH_FIRST_FRAG 0xC0 #define DISPATCH_SUBSEQ_FRAG 0xE0 #define DISPATCH_FRAG_MASK 0xF8 #define DISPATCH_BC0 0x50 #define DISPATCH_MESH 0x80 #define DISPATCH_MESH_MASK 0xC0 #define DISPATCH_MESH_O_FLAG 0x20 #define DISPATCH_MESH_F_FLAG 0x10 #define DISPATCH_MESH_HOPSLEFT_MASK 0x0F enum { /* lowpan_pkt_t.app_data_dealloc */ APP_DATA_DEALLOC_FALSE=0, APP_DATA_DEALLOC_TRUE=1, /* lowpan_pkt_t.notify_num */ LOWPAN_PKT_NO_NOTIFY = 0, /* HC1 encoding */ HC1_SRC_PREFIX_MASK = 0x80, HC1_SRC_PREFIX_LINKLOCAL = 0x80, HC1_SRC_PREFIX_INLINE = 0, HC1_SRC_IFACEID_MASK = 0x40, HC1_SRC_IFACEID_COMRP = 0x40, HC1_SRC_IFACEID_INLINE = 0, HC1_DST_PREFIX_MASK = 0x20, HC1_DST_PREFIX_LINKLOCAL = 0x20, HC1_DST_PREFIX_INLINE = 0, HC1_DST_IFACEID_MASK = 0x10, HC1_DST_IFACEID_COMRP = 0x10, HC1_DST_IFACEID_INLINE = 0, HC1_TCFL_MASK = 0x08, HC1_TCFL_ZERO = 0x08, HC1_TCFL_INLINE = 0, HC1_NEXTHDR_MASK = 0x06, HC1_NEXTHDR_INLINE = 0, HC1_NEXTHDR_UDP = 0x02, HC1_NEXTHDR_ICMP = 0x04, HC1_NEXTHDR_TCP = 0x06, HC1_HC2_MASK = 0x01, HC1_HC2_PRESENT = 0x01, HC1_HC2_NONE = 0, HC2_UDP_P_VALUE = 0x61616, HC2_UDP_SRC_PORT_MASK = 0x80, HC2_UDP_SRC_PORT_COMPR = 0x80, HC2_UDP_SRC_PORT_INLINE = 0, HC2_UDP_DST_PORT_MASK = 0x40, HC2_UDP_DST_PORT_COMPR = 0x40, HC2_UDP_DST_PORT_INLINE = 0, HC2_UDP_LEN_MASK = 0x20, HC2_UDP_LEN_COMPR = 0x20, HC2_UDP_LEN_INLINE = 0 }; /* used for fragment reassembly */ typedef struct _frag_info_t { uint8_t offset; uint8_t len; struct _frag_info_t *next; } frag_info_t; /* used for fragment reassembly */ typedef struct _app_data_t { uint8_t buf[LOWPAN_MTU]; } app_data_t; /* used for fragment reassembly */ typedef struct _frag_buf_t { uint8_t *buf; /* usually a pointer to app_data_t */ hw_addr_t hw_src_addr; hw_addr_t hw_dst_addr; uint16_t dgram_tag; /* network byte order */ uint16_t dgram_size; /* host byte order */ uint8_t frag_timeout; /* discarded when zero is reached * FRAG_FREE means not used at the moment */ frag_info_t *frag_list; /* sorted by offset in decreasing order */ } frag_buf_t; /* * sending - application provides app_data and clears app_data_dealloc * - a pointer to app_data is returned in sendDone to do deallocation * receiving with fragment reassembly * - IPP provides app_data and sets app_data_dealloc * - header_begin is set to point into app_data * and the received packet is put into app_data * receiving without fragment reassembly * - the complete 802.15.4 frame is put into header * (802.15.4 header is left out) and heade_begin points into header */ typedef struct _lowpan_pkt_t { /* buffers */ uint8_t *app_data; /* buffer for application data */ uint16_t app_data_len; /* how much data is in the buffer */ uint8_t *app_data_begin; /* start of the data in the buffer */ uint8_t app_data_dealloc; /* shall IPC deallocate the app_data buffer? /* APP_DATA_DEALLOC_FALSE | APP_DATA_DEALLOC_TRUE */ uint8_t header[LINK_DATA_MTU]; /* buffer for the header (tx) * or unfragmented 802.15.4 frame (rx) */ uint16_t header_len; /* how much data is in the buffer */ uint8_t *header_begin; /* start of the data in the buffer */ /* fragmentation */ uint16_t dgram_tag; /* network byte order */ uint16_t dgram_size; /* host byte order */ uint8_t dgram_offset; /* offset where next fragment starts (tx) * (in multiples of 8 bytes) */ /* IP addresses */ ip6_addr_t ip_src_addr; /* needed for ND and usefull elsewhere */ ip6_addr_t ip_dst_addr; /* both IP addresses filled in by ipv6*_input */ /* 802.15.4 addresses */ hw_addr_t hw_src_addr; hw_addr_t hw_dst_addr; /* 802.15.4 MAC addresses * needed for fragment identification * needed for 6lowpan IPv6 header decompression * contains mesh header entries if applicable */ /* to notify app with sendDone */ uint8_t notify_num; /* num of UDPClient + 1, 0 means o not notify */ struct _lowpan_pkt_t *next; } lowpan_pkt_t; enum { FRAG_NONE = 0, FRAG_6LOWPAN = 1, FRAG_IPV6 = 2, ND_DONE = 0, ND_TODO = 1, ND_SENT = 2, }; struct lowpan_mesh_hdr { uint8_t dispatch; // dispatch and flags // address length depends on flags in dispatch }; struct lowpan_broadcast_hdr { uint8_t dispatch; uint8_t seq_no; // sequence number }; struct lowpan_frag_hdr { union { uint8_t dispatch; uint16_t dgram_size; uint8_t dgram_size8[2]; }; uint16_t dgram_tag; }; /* * Definition for internet protocol version 6. * RFC 2460 */ struct ip6_hdr { union { uint8_t vtc; /* 4 bits version, 8 bits class label*/ uint32_t flow; /* 20 bits flow label at the end */ }; uint16_t plen; /* payload length */ uint8_t nxt_hdr; /* next header */ uint8_t hlim; /* hop limit */ ip6_addr_t src_addr; /* source address */ ip6_addr_t dst_addr; /* destination address */ } /* __attribute__((packed))*/; #define IPV6_VERSION 0x60 #define IPV6_VERSION_MASK 0xf0 /* * Extension Headers */ struct ip6_ext { uint8_t ip6e_nxt; uint8_t ip6e_len; }; struct icmp6_hdr { uint8_t type; /* type field */ uint8_t code; /* code field */ uint16_t cksum; /* checksum field */ }; enum { ICMP_TYPE_ECHO_DEST_UNREACH = 1, ICMP_TYPE_ECHO_PKT_TOO_BIG = 129, ICMP_TYPE_ECHO_TIME_EXCEEDED = 129, ICMP_TYPE_ECHO_PARAM_PROBLEM = 129, ICMP_TYPE_ECHO_REQUEST = 128, ICMP_TYPE_ECHO_REPLY = 129, ICMP_TYPE_NEIGHBOR_SOL = 135, ICMP_TYPE_NEIGHBOR_ADV = 136, ICMP_NEIGHBOR_HOPLIMIT = 255 }; /* * Udp protocol header. * Per RFC 768, September, 1981. */ struct udp_hdr { uint16_t srcport; /* source port */ uint16_t dstport; /* destination port */ uint16_t len; /* udp length */ uint16_t chksum; /* udp checksum */ }; enum { //NEXT_HEADER_ICMP = 1, NEXT_HEADER_TCP = 6, NEXT_HEADER_UDP = 17, NEXT_HEADER_ICMP6 = 58 }; struct udp_conn { ip6_addr_t ripaddr; /* IP address of the remote peer. */ uint16_t lport; /* local port number (network byte order) */ uint16_t rport; /* remote port number (network byte order) */ }; /* // from uip-1.0/uip/uip-neighbor.c */ /* #define NEIGHBOR_MAX_TIME 128 */ /* #ifndef NEIGHBOR_ENTRIES */ /* #define NEIGHBOR_ENTRIES 8 */ /* #endif */ /* struct neighbor_entry { */ /* ip6_addr_t ip_addr; */ /* struct hw_addr hw_addr; */ /* uint8_t time; */ /* }; */ /* struct neighbor_entry neighbor_entries[NEIGHBOR_ENTRIES]; */ #endif /* __IP_INTERNAL_H__ */ tinyos-2.1.2+dfsg/tos/lib/net/6lowpan/README000066400000000000000000000075441207233610700204020ustar00rootroot00000000000000 A 6lowpan implementation for TinyOS 2.x This is a 6lowpan implementation for TinyOS 2.x. Mesh Addressing and Broadcast headers are parsed, but no mesh-networking/multi-hopping is implemented. 6lowpan fragmentation and fragment reassembly is fully supported. The 6lowpan-specified HC1 compression of the IPv6 header and the HC_UDP compression of the UDP header are supported as well as handling of the uncompressed headers. The implementation can respond to ICMP echo requests and handles communication over the UDP protocol. It has been tested on the TelosB and MicaZ hardware platforms. In addition a 6lowpan-translating daemon has been implemented to allow a linux PC to use a mote as an 802.15.4 interface. Shortcomings and missing features: * 6lowpan payload is sent as Active Message payload. This means that the 802.15.4 payload is prefixed with the 1-byte AM Type field. * non-zero Traffic Class and Flow Label are not supported by the current HC1 implementation * UDP port numbers compression is not supported and port numbers are always sent in full by the current HC_UDP compression * Neighbor Discovery has not been implemented and link local broadcasts are used instead. * Not all fragments of a datagram seem to be always received by the mote. A workaround is to add a usleep(10000) before sending subsequent fragments in the serial_tun daemon on the PC. * The mspgcc compiler generates broken code using 16-bit values not aligned at 16-bit boundaries. See http://www.nabble.com/msp430-gcc-generating-unaligned-access.-t2261862.html and page 25 in http://www.eecs.harvard.edu/~konrad/projects/motetrack/ mspgcc-manual-20031127.pdf for details. This seems to only happen with packed structs, where some elements cannot be aligned. For example, a struct with an 8-bit, 16-bit, 8-bit and 16-bit value in the given order. As the struct is packed, one of the 16-bit values can be aligned at a 16-bit boundary. The current workaround is to force 8-bit operations for cases where this can happen. This is done by the set_16t(), get_16t() functions. In cases where unaligned accesses could happen, these functions have to be used. More details can be found in http://www.inf.ethz.ch/personal/mharvan/docs/msc-thesis.pdf or by reading the source code. USAGE - MOTE The 6lowpan/IPv6 stack is implemented in the IPP module. Applications should use the IPC component which takes care of wiring the necessary components. The stack offers the UDPClient interface to application wishing to exchange UDP datagrams. Replying to ICMP echo requests is done by the 6lowpan stack. The stack support two IPv6 addresses: * a global address * a link-local address The link-local address is assigned using an interface identifier computed from the Active Message address of the mote. This is almost like the stateless autoconfiguration, but Duplicate Address Detection or Router Solicitations are not implemented. The global address can be set manually with IPC.setAddress(). Alternatively, only the prefix of the global address can be set with IPC.setAddressAutoconf() and the suffix will be generated from the Active Message address of the mote. A sample application using the 6lowpan stack is in apps/6lowpancli. USAGE - PC To interact with a 6lowpan mote from a PC, a mote flashed with the BaseStation application (apps/BaseStation) has to be attached to the PC. Note that the application has to be built with CFLAGS += -D'TOSH_DATA_LENGTH=102'. Furthermore, the serial_tun daemon (support/sdk/c/6lowpan/serial_tun/) has to run on the PC. Afterwards, ping6 and nc6 should work for talking to the motes. Debugging output with printf over USB can be enabled with CFLAGS="-D'ENABLE_PRINTF_DEBUG=1' To minimize memory usage, i.e. disable everything (at the moment only the UDP cli) to determine minimum RAM/ROM requirements, use CFLAGS="-D'MINIMIZE_MEMORY=1'tinyos-2.1.2+dfsg/tos/lib/net/6lowpan/UDPClient.nc000066400000000000000000000115721207233610700216270ustar00rootroot00000000000000/* * Copyright (c) 2007 Matus Harvan * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * The name of the author may not be used to endorse or promote * products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * This file is based on Andrew Christian's UDPClient interface from * the uIP port to TinyOS 1.x, which is distributed under the * following licence: * * Copyright (c) 2005 Hewlett-Packard Company * All rights reserved * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of the Hewlett-Packard Company nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Parameterized interface for creating a UDP client or server */ #include "IP.h" interface UDPClient { /** * 'Listening' to a socket binds the local port to a fixed number and allows * the socket to receive packets. If you call send or sendto on an unbound * socket, a dynamic local port is assigned. Pass 0 to unbind the port. */ command error_t listen( uint16_t port ); // Start listening to a port /** * 'Connecting' a UDP socket fixes the remote address and port. Once fixed, * you can send datagrams with the 'send' command. You can un-fix the socket * by passing NULL as the argument. */ command error_t connect(const ip6_addr_t *addr, const uint16_t port); /** * Send a datagram to a remote host. Call 'connect' on a socket before * calling 'send'. If a local port has not yet been assigned, a dynamic * one will be assigned by these commands. Both commands are asynchronous * and will generate the 'sendDone' event once the datagram has been sent. */ command error_t sendTo(const ip6_addr_t *addr, uint16_t port, const uint8_t *buf, uint16_t len ); command error_t send(const uint8_t *buf, uint16_t len ); /** * The previous send or sendTo command has completed. */ event void sendDone(error_t result, void* buf); /** * A datagram has been received. Datagrams are only received on sockets * that have had 'listen' called to assign a local port, or have used * the 'send' or 'sendTo' command. */ event void receive(const ip6_addr_t *addr, uint16_t port, uint8_t *buf, uint16_t len ); } tinyos-2.1.2+dfsg/tos/lib/net/CollectionDebug.nc000066400000000000000000000070701207233610700215120ustar00rootroot00000000000000/* $Id: CollectionDebug.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $*/ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * The CollectionDebug is an interface for sending debugging events to * a logging infrastructure. An implementer can choose to send the event * information to different destinations. Primary examples can include: *

        *
      • logging to the UART, in case of a testbed of network-connected * nodes; *
      • logging to flash, if the logs are to be retrieved later *
      • logging to the standard output, in the case of TOSSIM. *
      * * The interface does not specify in what format the log is to be produced, * or if other information, like timestamps, should be added, and this is * up to the implementer. * * Some commands are generic, like Event, EventSimple, and EventDbg, while others * are for more specific events related to collection, like EventRoute and EventMsg. * * @author Rodrigo Fonseca * @author Kyle Jamieson * @date $Date: 2010-06-29 22:07:47 $ */ interface CollectionDebug { /* Log the occurrence of an event of type type */ command error_t logEvent(uint8_t type); /* Log the occurrence of an event and a single parameter */ command error_t logEventSimple(uint8_t type, uint16_t arg); /* Log the occurrence of an event and 3 16bit parameters */ command error_t logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3); /* Log the occurrence of an event related to forwarding a message. * This is intended to allow following the same message as it goes from one * hop to the next */ command error_t logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node); /* Log the occurrence of an event related to a route update message, * such as a node receiving a route, updating its own route information, * or looking at a particular entry in its routing table. */ command error_t logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric); } tinyos-2.1.2+dfsg/tos/lib/net/CollectionDebugMsg.h000066400000000000000000000046571207233610700220200ustar00rootroot00000000000000#ifndef _COLLECTION_UART_MSG #define _COLLECTION_UART_MSG #include "AM.h" //Comment format -> :meaning:args enum { NET_C_DEBUG_STARTED = 0xDE, NET_C_FE_MSG_POOL_EMPTY = 0x10, //::no args NET_C_FE_SEND_QUEUE_FULL = 0x11, //::no args NET_C_FE_NO_ROUTE = 0x12, //::no args NET_C_FE_SUBSEND_OFF = 0x13, NET_C_FE_SUBSEND_BUSY = 0x14, NET_C_FE_BAD_SENDDONE = 0x15, NET_C_FE_QENTRY_POOL_EMPTY = 0x16, NET_C_FE_SUBSEND_SIZE = 0x17, NET_C_FE_LOOP_DETECTED = 0x18, NET_C_FE_SEND_BUSY = 0x19, NET_C_FE_SENDQUEUE_EMPTY = 0x50, NET_C_FE_PUT_MSGPOOL_ERR = 0x51, NET_C_FE_PUT_QEPOOL_ERR = 0x52, NET_C_FE_GET_MSGPOOL_ERR = 0x53, NET_C_FE_GET_QEPOOL_ERR = 0x54, NET_C_FE_SENT_MSG = 0x20, //:app. send :msg uid, origin, next_hop NET_C_FE_RCV_MSG = 0x21, //:next hop receive:msg uid, origin, last_hop NET_C_FE_FWD_MSG = 0x22, //:fwd msg :msg uid, origin, next_hop NET_C_FE_DST_MSG = 0x23, //:base app. recv :msg_uid, origin, last_hop NET_C_FE_SENDDONE_FAIL = 0x24, NET_C_FE_SENDDONE_WAITACK = 0x25, NET_C_FE_SENDDONE_FAIL_ACK_SEND = 0x26, NET_C_FE_SENDDONE_FAIL_ACK_FWD = 0x27, NET_C_FE_DUPLICATE_CACHE = 0x28, //dropped duplicate packet seen in cache NET_C_FE_DUPLICATE_QUEUE = 0x29, //dropped duplicate packet seen in queue NET_C_FE_DUPLICATE_CACHE_AT_SEND = 0x2A, //dropped duplicate packet seen in cache NET_C_TREE_NO_ROUTE = 0x30, //: :no args NET_C_TREE_NEW_PARENT = 0x31, //: :parent_id, hopcount, metric NET_C_TREE_ROUTE_INFO = 0x32, //:periodic:parent_id, hopcount, metric NET_C_TREE_SENT_BEACON = 0x33, NET_C_TREE_RCV_BEACON = 0x34, NET_C_DBG_1 = 0x40, //:any :uint16_t a NET_C_DBG_2 = 0x41, //:any :uint16_t a, b, c NET_C_DBG_3 = 0x42, //:any :uint16_t a, b, c }; typedef nx_struct CollectionDebugMsg { nx_uint8_t type; nx_union { nx_uint16_t arg; nx_struct { nx_uint16_t msg_uid; nx_am_addr_t origin; nx_am_addr_t other_node; } msg; nx_struct { nx_am_addr_t parent; nx_uint8_t hopcount; nx_uint16_t metric; } route_info; nx_struct { nx_uint16_t a; nx_uint16_t b; nx_uint16_t c; } dbg; } data; nx_uint16_t seqno; } CollectionDebugMsg; #endif tinyos-2.1.2+dfsg/tos/lib/net/CollectionId.nc000066400000000000000000000037121207233610700210170ustar00rootroot00000000000000/* $Id: CollectionId.nc,v 1.4 2006-12-12 18:23:28 vlahan Exp $ */ /* * Copyright (c) 2006 Massachusetts Institute of Technology (MIT). * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Massachusetts Institute of Technology nor * the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * MASSACHUSETTS INSITIUTE OF TECHNOLOGY OR ITS CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Interface for fetching the collection ID associated with a * collection sender instance. * * @author Kyle Jamieson * @date $Date: 2006-12-12 18:23:28 $ */ #include "Collection.h" interface CollectionId { command collection_id_t fetch(); } tinyos-2.1.2+dfsg/tos/lib/net/CollectionIdP.nc000066400000000000000000000041131207233610700211330ustar00rootroot00000000000000/* $Id: CollectionIdP.nc,v 1.4 2006-12-12 18:23:28 vlahan Exp $ */ /* * Copyright (c) 2006 Massachusetts Institute of Technology (MIT). * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Massachusetts Institute of Technology nor * the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * MASSACHUSETTS INSITIUTE OF TECHNOLOGY OR ITS CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Interface for fetching the collection ID associated with a * collection sender instance. * * @author Kyle Jamieson * @date $Date: 2006-12-12 18:23:28 $ */ #include "Collection.h" generic module CollectionIdP(collection_id_t collectid) { provides interface CollectionId; } implementation { command collection_id_t CollectionId.fetch() { return collectid; } } tinyos-2.1.2+dfsg/tos/lib/net/CollectionPacket.nc000066400000000000000000000042021207233610700216650ustar00rootroot00000000000000/* $Id: CollectionPacket.nc,v 1.4 2006-12-12 18:23:28 vlahan Exp $ */ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Philip Levis * @author Kyle Jamieson * @date $Date: 2006-12-12 18:23:28 $ */ #include #include interface CollectionPacket { command am_addr_t getOrigin(message_t* msg); command void setOrigin(message_t* msg, am_addr_t addr); command collection_id_t getType(message_t* msg); command void setType(message_t* msg, collection_id_t id); command uint8_t getSequenceNumber(message_t* msg); command void setSequenceNumber(message_t* msg, uint8_t seqno); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/000077500000000000000000000000001207233610700173275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/AutoStarterC.nc000066400000000000000000000035341207233610700222360ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ configuration AutoStarterC { uses interface SplitControl; } implementation { components MainC, AutoStarterP; SplitControl = AutoStarterP; AutoStarterP.Boot -> MainC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/AutoStarterP.nc000066400000000000000000000037041207233610700222520ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ module AutoStarterP { uses { interface Boot; interface SplitControl; } } implementation { event void Boot.booted() { call SplitControl.start(); } event void SplitControl.startDone(error_t error) { } event void SplitControl.stopDone(error_t error) { } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BitVecUtils.h000066400000000000000000000041221207233610700216740ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Provides generic methods for manipulating bit vectors. * * @author Jonathan Hui */ #ifndef __BITVEC_UTILS_H__ #define __BITVEC_UTILS_H__ #define BIT_GET(x, i) ((x) & (1 << (i))) #define BIT_SET(x, i) ((x) | (1 << (i))) #define BIT_CLEAR(x, i) ((x) & ~(1 << (i))) #define BITVEC_GET(x, i) (BIT_GET((x)[(i)/8], (i)%8)) #define BITVEC_SET(x, i) ((x)[(i)/8] = BIT_SET((x)[(i)/8], (i)%8)) #define BITVEC_CLEAR(x, i) ((x)[(i)/8] = BIT_CLEAR((x)[(i)/8], (i)%8)) #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BitVecUtils.nc000066400000000000000000000057171207233610700220600ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Provides generic methods for manipulating bit vectors. * * @author Jonathan Hui */ interface BitVecUtils { /** * Locates the index of the first '1' bit in a bit vector. * * @param result the location of the '1' bit * @param fromIndex the index to start search for '1' bit * @param bitVec the bit vector * @param length the length of the bit vector in bits * @return SUCCESS if a '1' bit was found; * FAIL otherwise. */ command error_t indexOf(uint16_t* pResult, uint16_t fromIndex, uint8_t* bitVec, uint16_t length); /** * Counts the number of '1' bits in a bit vector. * * @param result the number of '1' bits * @param bitVec the bit vector * @param length the length of the bit vector in bits * @return SUCCESS if the operation completed successfully; * FAIL otherwise. */ command error_t countOnes(uint16_t* pResult, uint8_t* bitVec, uint16_t length); /** * Generates an ASCII representation of the bit vector. * * @param buf the character array to place the ASCII string * @param bitVec the bit vector * @param length the length of the bit vector in bits */ command void printBitVec(char* buf, uint8_t* bitVec, uint16_t length); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BitVecUtilsC.nc000066400000000000000000000053331207233610700221550ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Provides generic methods for manipulating bit vectors. * * @author Jonathan Hui */ #include "BitVecUtils.h" module BitVecUtilsC { provides interface BitVecUtils; } implementation { command error_t BitVecUtils.indexOf(uint16_t* pResult, uint16_t fromIndex, uint8_t* bitVec, uint16_t length) { uint16_t i = fromIndex; if (length == 0) return FAIL; do { if (BITVEC_GET(bitVec, i)) { *pResult = i; return SUCCESS; } i = (i+1) % length; } while (i != fromIndex); return FAIL; } command error_t BitVecUtils.countOnes(uint16_t* pResult, uint8_t* bitVec, uint16_t length) { int count = 0; int i; for ( i = 0; i < length; i++ ) { if (BITVEC_GET(bitVec, i)) count++; } *pResult = count; return SUCCESS; } command void BitVecUtils.printBitVec(char* buf, uint8_t* bitVec, uint16_t length) { #ifdef PLATFORM_PC uint16_t i; dbg(DBG_TEMP, ""); for ( i = 0; i < length; i++ ) { sprintf(buf++, "%d", !!BITVEC_GET(bitVec, i)); } #endif } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/000077500000000000000000000000001207233610700232015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/BlockReaderC.nc000066400000000000000000000042571207233610700260130ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "BlockStorageManager.h" #include "Storage.h" generic configuration BlockReaderC(volume_id_t id) { provides { interface BlockRead; interface Resource; } } implementation { enum { CLIENT_ID = unique(UQ_BSTORAGEM_CLIENT) }; components new VolumeIdC(id); components BlockStorageManagerC; components new BlockStorageLockClientC(); BlockRead = BlockStorageManagerC.BlockRead[CLIENT_ID]; Resource = BlockStorageLockClientC; BlockStorageManagerC.VolumeId[CLIENT_ID] -> VolumeIdC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/BlockStorageLockC.nc000066400000000000000000000036501207233610700270220ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ configuration BlockStorageLockC { provides { interface Resource[uint8_t client]; interface ArbiterInfo; } } implementation { components new SimpleFcfsArbiterC(UQ_BSTORAGEL_CLIENT) as Arbiter; Resource = Arbiter; ArbiterInfo = Arbiter; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/BlockStorageLockClientC.nc000066400000000000000000000036361207233610700301650ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ generic configuration BlockStorageLockClientC() { provides interface Resource; } implementation { enum { CLIENT_ID = unique(UQ_BSTORAGEL_CLIENT) }; components BlockStorageLockC; Resource = BlockStorageLockC.Resource[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManager.h000066400000000000000000000035401207233610700272260ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #ifndef BLOCK_STORAGE_MANAGER_H #define BLOCK_STORAGE_MANAGER_H #define UQ_BSTORAGEM_CLIENT "BlockStorageManager.client" #define UQ_BSTORAGEL_CLIENT "BlockStorageLock.client" #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManagerC.nc000066400000000000000000000072511207233610700275050ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "BlockStorageManager.h" configuration BlockStorageManagerC { provides { interface BlockRead[uint8_t client]; interface BlockWrite[uint8_t client]; interface StorageMap[uint8_t volume_id]; } uses interface VolumeId[uint8_t client]; } implementation { enum { NUM_CLIENTS = uniqueCount(UQ_BSTORAGEM_CLIENT) }; components new BlockStorageManagerP(NUM_CLIENTS); BlockRead = BlockStorageManagerP; BlockWrite = BlockStorageManagerP; VolumeId = BlockStorageManagerP; StorageMap = BlockStorageManagerP; components new BlockStorageC(VOLUME_GOLDENIMAGE) as BlockStorageC_Golden; components new BlockStorageC(VOLUME_DELUGE1) as BlockStorageC_1; components new BlockStorageC(VOLUME_DELUGE2) as BlockStorageC_2; components new BlockStorageC(VOLUME_DELUGE3) as BlockStorageC_3; BlockStorageManagerP.SubBlockRead[VOLUME_GOLDENIMAGE] -> BlockStorageC_Golden; BlockStorageManagerP.SubBlockRead[VOLUME_DELUGE1] -> BlockStorageC_1; BlockStorageManagerP.SubBlockRead[VOLUME_DELUGE2] -> BlockStorageC_2; BlockStorageManagerP.SubBlockRead[VOLUME_DELUGE3] -> BlockStorageC_3; BlockStorageManagerP.SubBlockWrite[VOLUME_GOLDENIMAGE] -> BlockStorageC_Golden; BlockStorageManagerP.SubBlockWrite[VOLUME_DELUGE1] -> BlockStorageC_1; BlockStorageManagerP.SubBlockWrite[VOLUME_DELUGE2] -> BlockStorageC_2; BlockStorageManagerP.SubBlockWrite[VOLUME_DELUGE3] -> BlockStorageC_3; #if defined(PLATFORM_TELOSB) BlockStorageManagerP.SubStorageMap[VOLUME_GOLDENIMAGE] -> BlockStorageC_Golden; BlockStorageManagerP.SubStorageMap[VOLUME_DELUGE1] -> BlockStorageC_1; BlockStorageManagerP.SubStorageMap[VOLUME_DELUGE2] -> BlockStorageC_2; BlockStorageManagerP.SubStorageMap[VOLUME_DELUGE3] -> BlockStorageC_3; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) || defined(PLATFORM_MULLE) || defined(PLATFORM_TINYNODE) components At45dbStorageManagerC; BlockStorageManagerP.At45dbVolume -> At45dbStorageManagerC; #endif } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManagerP.nc000066400000000000000000000167311207233610700275250ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ generic module BlockStorageManagerP(uint8_t clients) { provides { interface BlockRead[uint8_t client]; interface BlockWrite[uint8_t client]; interface StorageMap[uint8_t volume_id]; } uses { interface BlockRead as SubBlockRead[volume_id_t volume_id]; interface BlockWrite as SubBlockWrite[volume_id_t volume_id]; interface VolumeId[uint8_t client]; #if defined(PLATFORM_TELOSB) interface StorageMap as SubStorageMap[volume_id_t volume_id]; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) || defined(PLATFORM_MULLE) || defined(PLATFORM_TINYNODE) interface At45dbVolume[volume_id_t volume_id]; #endif } } implementation { enum { S_READY, S_BUSY }; uint8_t state = S_READY; uint8_t current_client; /* BlockRead **************************/ command error_t BlockRead.read[uint8_t client](storage_addr_t addr, void* buf, storage_len_t len) { error_t error; if (state != S_READY) { return EBUSY; } error = call SubBlockRead.read[call VolumeId.get[client]()](addr, buf, len); if (error == SUCCESS) { state = S_BUSY; current_client = client; return SUCCESS; } return error; } command error_t BlockRead.computeCrc[uint8_t client](storage_addr_t addr, storage_len_t len, uint16_t crc) { error_t error; if (state != S_READY) { return EBUSY; } error = call SubBlockRead.computeCrc[call VolumeId.get[client]()](addr, len, crc); if (error == SUCCESS) { state = S_BUSY; current_client = client; return SUCCESS; } return error; } command storage_len_t BlockRead.getSize[uint8_t client]() { return call SubBlockRead.getSize[client](); } event void SubBlockRead.readDone[volume_id_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { state = S_READY; signal BlockRead.readDone[current_client](addr, buf, len, error); } event void SubBlockRead.computeCrcDone[volume_id_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { state = S_READY; signal BlockRead.computeCrcDone[current_client](addr, len, crc, error); } default command error_t SubBlockRead.read[uint8_t client](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t SubBlockRead.computeCrc[uint8_t client](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; } default event void BlockRead.readDone[volume_id_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void BlockRead.computeCrcDone[volume_id_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {} /* BlockWrite **************************/ command error_t BlockWrite.write[uint8_t client](storage_addr_t addr, void* buf, storage_len_t len) { error_t error; if (state != S_READY) { return EBUSY; } error = call SubBlockWrite.write[call VolumeId.get[client]()](addr, buf, len); if (error == SUCCESS) { state = S_BUSY; current_client = client; return SUCCESS; } return error; } command error_t BlockWrite.erase[uint8_t client]() { error_t error; if (state != S_READY) { return EBUSY; } error = call SubBlockWrite.erase[call VolumeId.get[client]()](); if (error == SUCCESS) { state = S_BUSY; current_client = client; return SUCCESS; } return error; } command error_t BlockWrite.sync[uint8_t client]() { error_t error; if (state != S_READY) { return EBUSY; } error = call SubBlockWrite.sync[call VolumeId.get[client]()](); if (error == SUCCESS) { state = S_BUSY; return SUCCESS; } return error; } event void SubBlockWrite.writeDone[volume_id_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { state = S_READY; signal BlockWrite.writeDone[current_client](addr, buf, len, error); } event void SubBlockWrite.eraseDone[volume_id_t volume_id](error_t error) { state = S_READY; signal BlockWrite.eraseDone[current_client](error); } event void SubBlockWrite.syncDone[volume_id_t volume_id](error_t error) { state = S_READY; signal BlockWrite.syncDone[current_client](error); } command storage_addr_t StorageMap.getPhysicalAddress[uint8_t volume_id](storage_addr_t addr) { storage_addr_t p_addr = 0xFFFFFFFF; #if defined(PLATFORM_TELOSB) p_addr = call SubStorageMap.getPhysicalAddress[volume_id](addr); #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) || defined(PLATFORM_MULLE) || defined(PLATFORM_TINYNODE) at45page_t page = call At45dbVolume.remap[volume_id]((addr >> AT45_PAGE_SIZE_LOG2)); at45pageoffset_t offset = addr & ((1 << AT45_PAGE_SIZE_LOG2) - 1); p_addr = page; p_addr = p_addr << AT45_PAGE_SIZE_LOG2; p_addr += offset; #endif return p_addr; } #if defined(PLATFORM_TELOSB) default command storage_addr_t SubStorageMap.getPhysicalAddress[uint8_t volume_id](storage_addr_t addr) { return 0xffffffff; } #endif default command error_t SubBlockWrite.write[uint8_t client](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t SubBlockWrite.erase[uint8_t client]() { return FAIL; } default command error_t SubBlockWrite.sync[uint8_t client]() { return FAIL; } default event void BlockWrite.writeDone[volume_id_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void BlockWrite.eraseDone[volume_id_t volume_id](error_t error) {} default event void BlockWrite.syncDone[volume_id_t volume_id](error_t error) {} default command volume_id_t VolumeId.get[uint8_t client]() { return 0xFF; // This is an invalid volume at least for STM25P. } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/BlockWriterC.nc000066400000000000000000000042621207233610700260610ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "BlockStorageManager.h" #include "Storage.h" generic configuration BlockWriterC(volume_id_t id) { provides { interface BlockWrite; interface Resource; } } implementation { enum { CLIENT_ID = unique(UQ_BSTORAGEM_CLIENT) }; components new VolumeIdC(id); components BlockStorageManagerC; components new BlockStorageLockClientC(); BlockWrite = BlockStorageManagerC.BlockWrite[CLIENT_ID]; Resource = BlockStorageLockClientC; BlockStorageManagerC.VolumeId[CLIENT_ID] -> VolumeIdC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/VolumeId.nc000066400000000000000000000033341207233610700252520ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ interface VolumeId { command volume_id_t get(); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/BlockStorageManager/VolumeIdC.nc000066400000000000000000000035041207233610700253540ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ generic module VolumeIdC(volume_id_t id) { provides interface VolumeId; } implementation { command volume_id_t VolumeId.get() { return id; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/Deluge.h000066400000000000000000000060611207233610700207100ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #ifndef __DELUGE_H__ #define __DELUGE_H__ typedef nx_struct DelugeIdent { nx_uint32_t uidhash; // unique id of the image nx_uint32_t size; // size of the whole image (ident + CRCs + binary) nx_uint8_t numPgs; // number of pages of complete image nx_uint8_t reserved; nx_uint16_t crc; // crc over the above 4 fields nx_uint8_t appname[16]; nx_uint8_t username[16]; nx_uint8_t hostname[16]; nx_uint8_t platform[16]; nx_uint32_t timestamp; nx_uint32_t userhash; } DelugeIdent; enum { DELUGE_INVALID_UID = 0xffffffff, DELUGE_NUM_VOLUMES = 4, DELUGE_KEY = 0xDE00, DELUGE_AM_FLASH_VOL_MANAGER = 0x53, DELUGE_AM_DELUGE_MANAGER = 0x54, }; enum { DELUGE_CMD_STOP = 1, DELUGE_CMD_LOCAL_STOP = 2, DELUGE_CMD_ONLY_DISSEMINATE = 3, DELUGE_CMD_DISSEMINATE_AND_REPROGRAM = 4, DELUGE_CMD_REPROGRAM = 5, // Reprogram the local mote DELUGE_CMD_REBOOT = 6, // Reboot the local mode }; #define UQ_DELUGE_METADATA "DelugeMetadata.client" #define UQ_DELUGE_VOLUME_MANAGER "DelugeVolumeManager.client" typedef nx_struct DelugeCmd { nx_uint8_t type; nx_uint32_t uidhash; // unique id of image nx_uint8_t imgNum; // image number nx_uint32_t size; // size of the image } DelugeCmd; typedef struct BootArgs { uint16_t address; uint32_t imageAddr; uint8_t gestureCount; bool noReprogram; } BootArgs; #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeC.nc000066400000000000000000000076431207233610700211730ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "Deluge.h" #include "StorageVolumes.h" configuration DelugeC { uses interface Leds; } implementation { components ObjectTransferC; components new BlockReaderC(VOLUME_DELUGE1) as BlockReaderDeluge1; components new BlockReaderC(VOLUME_DELUGE2) as BlockReaderDeluge2; components new BlockReaderC(VOLUME_DELUGE3) as BlockReaderDeluge3; components new BlockWriterC(VOLUME_DELUGE1) as BlockWriterDeluge1; components new BlockWriterC(VOLUME_DELUGE2) as BlockWriterDeluge2; components new BlockWriterC(VOLUME_DELUGE3) as BlockWriterDeluge3; ObjectTransferC.BlockRead[VOLUME_DELUGE1] -> BlockReaderDeluge1; ObjectTransferC.BlockRead[VOLUME_DELUGE2] -> BlockReaderDeluge2; ObjectTransferC.BlockRead[VOLUME_DELUGE3] -> BlockReaderDeluge3; ObjectTransferC.BlockWrite[VOLUME_DELUGE1] -> BlockWriterDeluge1; ObjectTransferC.BlockWrite[VOLUME_DELUGE2] -> BlockWriterDeluge2; ObjectTransferC.BlockWrite[VOLUME_DELUGE3] -> BlockWriterDeluge3; ObjectTransferC.Leds = Leds; components new DisseminatorC(DelugeCmd, DELUGE_KEY); components DisseminationC; components ActiveMessageC; components NetProgC, DelugeP; components new TimerMilliC() as Timer; components BlockStorageManagerC; components DelugeMetadataC; components new DelugeMetadataClientC(); components new DelugeVolumeManagerClientC(); components new BlockStorageLockClientC(); components MainC; DelugeP.Boot -> MainC; DelugeP.Leds = Leds; #ifndef DELUGE_BASESTATION DelugeP.DisseminationValue -> DisseminatorC; #endif DelugeP.DisseminationStdControl -> DisseminationC; DelugeP.ObjectTransfer -> ObjectTransferC; DelugeP.NetProg -> NetProgC; DelugeP.RadioSplitControl -> ActiveMessageC; DelugeP.StorageMap -> BlockStorageManagerC; DelugeP.DelugeMetadata -> DelugeMetadataClientC; DelugeP.storageReady <- DelugeMetadataC; DelugeP.DelugeVolumeManager -> DelugeVolumeManagerClientC; DelugeP.Resource -> BlockStorageLockClientC; #if defined(DELUGE_BASESTATION) || defined(DELUGE_LIGHT_BASESTATION) components SerialStarterC; components new FlashVolumeManagerC(DELUGE_AM_FLASH_VOL_MANAGER); #endif #ifdef DELUGE_BASESTATION components new DelugeManagerC(DELUGE_AM_DELUGE_MANAGER); DelugeManagerC.DisseminationUpdate -> DisseminatorC; #endif } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeManagerC.nc000066400000000000000000000055101207233610700224550ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "StorageVolumes.h" generic configuration DelugeManagerC(am_id_t AMId) { uses interface DisseminationUpdate; } implementation { components new SerialAMSenderC(AMId); components new SerialAMReceiverC(AMId); components new TimerMilliC() as Timer; components NoLedsC, LedsC; components new DelugeManagerP(); components NetProgC; components BlockStorageManagerC; components ObjectTransferC; components new DelugeMetadataClientC(); components new DelugeVolumeManagerClientC(); components new BlockStorageLockClientC(); DelugeManagerP.DelayTimer -> Timer; DelugeManagerP.SerialAMSender -> SerialAMSenderC; DelugeManagerP.SerialAMReceiver -> SerialAMReceiverC; DelugeManagerP.Leds -> LedsC; DelugeManagerP.DisseminationUpdate = DisseminationUpdate; DelugeManagerP.NetProg -> NetProgC; DelugeManagerP.ObjectTransfer -> ObjectTransferC; DelugeManagerP.StorageMap -> BlockStorageManagerC; DelugeManagerP.DelugeMetadata -> DelugeMetadataClientC; DelugeManagerP.DelugeVolumeManager -> DelugeVolumeManagerClientC; DelugeManagerP.Resource -> BlockStorageLockClientC; components DelugeP; DelugeManagerP.stop -> DelugeP; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeManagerP.nc000066400000000000000000000116561207233610700225020ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "imgNum2volumeId.h" generic module DelugeManagerP() { uses { interface DisseminationUpdate; interface AMSend as SerialAMSender; interface Receive as SerialAMReceiver; interface Timer as DelayTimer; interface NetProg; interface Leds; interface StorageMap[uint8_t volumeId]; interface DelugeMetadata; interface ObjectTransfer; interface DelugeVolumeManager; interface Resource; command void stop(); } } implementation { typedef nx_struct SerialReqPacket { nx_uint8_t cmd; nx_uint8_t imgNum; } SerialReqPacket; typedef nx_struct SerialReplyPacket { nx_uint8_t error; } SerialReplyPacket; message_t serialMsg; DelugeCmd delugeCmd; void sendReply(error_t error) { uint8_t len = sizeof(SerialReplyPacket); SerialReplyPacket *reply = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, len); if (reply == NULL) { return; } reply->error = error; call SerialAMSender.send(AM_BROADCAST_ADDR, &serialMsg, len); } event message_t* SerialAMReceiver.receive(message_t* msg, void* payload, uint8_t len) { SerialReqPacket *request = (SerialReqPacket *)payload; memset(&delugeCmd, 0, sizeof(DelugeCmd)); call stop(); delugeCmd.type = request->cmd; // Converts the image number that the user wants to the real image number request->imgNum = imgNum2volumeId(request->imgNum); switch (request->cmd) { case DELUGE_CMD_STOP: call DisseminationUpdate.change(&delugeCmd); case DELUGE_CMD_LOCAL_STOP: sendReply(SUCCESS); call Resource.release(); break; case DELUGE_CMD_ONLY_DISSEMINATE: case DELUGE_CMD_DISSEMINATE_AND_REPROGRAM: if (request->imgNum != NON_DELUGE_VOLUME && (call Resource.isOwner() || call Resource.immediateRequest() == SUCCESS)) { call DelugeMetadata.read(request->imgNum); } else { sendReply(FAIL); } break; case DELUGE_CMD_REPROGRAM: case DELUGE_CMD_REBOOT: if (request->imgNum == NON_DELUGE_VOLUME) { sendReply(FAIL); break; } delugeCmd.imgNum = request->imgNum; call DelayTimer.startOneShot(1024); sendReply(SUCCESS); break; } return msg; } event void DelayTimer.fired() { switch (delugeCmd.type) { case DELUGE_CMD_REPROGRAM: call NetProg.programImageAndReboot(call StorageMap.getPhysicalAddress[delugeCmd.imgNum](0)); break; case DELUGE_CMD_REBOOT: call NetProg.reboot(); break; } } event void DelugeMetadata.readDone(uint8_t imgNum, DelugeIdent* ident, error_t error) { delugeCmd.imgNum = imgNum; sendReply(error); if (error != SUCCESS) { return; } switch (delugeCmd.type) { case DELUGE_CMD_ONLY_DISSEMINATE: case DELUGE_CMD_DISSEMINATE_AND_REPROGRAM: delugeCmd.uidhash = ident->uidhash; delugeCmd.size = ident->size; call DisseminationUpdate.change(&delugeCmd); call ObjectTransfer.publish(delugeCmd.uidhash, delugeCmd.size, delugeCmd.imgNum); break; } } event void Resource.granted() {} event void ObjectTransfer.receiveDone(error_t error) {} event void SerialAMSender.sendDone(message_t* msg, error_t error) {} event void DelugeVolumeManager.eraseDone(uint8_t imgNum) {} } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeMetadata.nc000066400000000000000000000006261207233610700225230ustar00rootroot00000000000000/** * An interface for obtaining the identification data of an * image. The pointer returned by readDone will be destroyed by the * next read. * * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ interface DelugeMetadata { command error_t read(uint8_t imgNum); event void readDone(uint8_t imgNum, DelugeIdent* ident, error_t error); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeMetadataC.nc000066400000000000000000000060671207233610700226330ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ configuration DelugeMetadataC { provides interface DelugeMetadata[uint8_t client]; uses event void storageReady(); } implementation { components MainC; components DelugeMetadataP; DelugeMetadata = DelugeMetadataP; storageReady = DelugeMetadataP; DelugeMetadataP.Boot -> MainC; components new BlockReaderC(VOLUME_GOLDENIMAGE) as BlockReaderGoldenImage; components new BlockReaderC(VOLUME_DELUGE1) as BlockReaderDeluge1; components new BlockReaderC(VOLUME_DELUGE2) as BlockReaderDeluge2; components new BlockReaderC(VOLUME_DELUGE3) as BlockReaderDeluge3; DelugeMetadataP.BlockRead[VOLUME_GOLDENIMAGE] -> BlockReaderGoldenImage; DelugeMetadataP.BlockRead[VOLUME_DELUGE1] -> BlockReaderDeluge1; DelugeMetadataP.BlockRead[VOLUME_DELUGE2] -> BlockReaderDeluge2; DelugeMetadataP.BlockRead[VOLUME_DELUGE3] -> BlockReaderDeluge3; components new BlockWriterC(VOLUME_GOLDENIMAGE) as BlockWriterGoldenImage; components new BlockWriterC(VOLUME_DELUGE1) as BlockWriterDeluge1; components new BlockWriterC(VOLUME_DELUGE2) as BlockWriterDeluge2; components new BlockWriterC(VOLUME_DELUGE3) as BlockWriterDeluge3; DelugeMetadataP.BlockWrite[VOLUME_GOLDENIMAGE] -> BlockWriterGoldenImage; DelugeMetadataP.BlockWrite[VOLUME_DELUGE1] -> BlockWriterDeluge1; DelugeMetadataP.BlockWrite[VOLUME_DELUGE2] -> BlockWriterDeluge2; DelugeMetadataP.BlockWrite[VOLUME_DELUGE3] -> BlockWriterDeluge3; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeMetadataClientC.nc000066400000000000000000000036511207233610700237660ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ generic configuration DelugeMetadataClientC() { provides interface DelugeMetadata; } implementation { enum { CLIENT_ID = unique(UQ_DELUGE_METADATA) }; components DelugeMetadataC; DelugeMetadata = DelugeMetadataC.DelugeMetadata[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeMetadataP.nc000066400000000000000000000136421207233610700226450ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "imgNum2volumeId.h" module DelugeMetadataP { provides interface DelugeMetadata[uint8_t client]; uses { interface Boot; interface BlockRead[uint8_t volumeId]; interface BlockWrite[uint8_t volumeId]; interface StorageMap[uint8_t volumeId]; event void storageReady(); } } implementation { enum { S_READ_IDENT, S_READ_CRC, S_CRC, S_READY, S_BUSY }; DelugeIdent ident; uint8_t state; uint8_t currentVolume; uint8_t currentImageIdx; uint8_t currentPage; nx_uint16_t currentCrc; uint8_t currentClient; void nextImage() { if (currentImageIdx < DELUGE_NUM_VOLUMES) { state = S_READ_IDENT; call BlockRead.read[currentVolume](0, &ident, sizeof(ident)); } else { signal storageReady(); state = S_READY; } } uint32_t calcCrcAddr() { return DELUGE_IDENT_SIZE + currentPage * sizeof(uint16_t); } uint32_t calcPageAddr() { return DELUGE_IDENT_SIZE + DELUGE_CRC_BLOCK_SIZE + currentPage * (uint32_t)DELUGE_BYTES_PER_PAGE; } event void Boot.booted() { // We are going to iterate over all the images and verify their // integrity. For each image we first read the ident to find the // number of pages and then iterate over all of them, compute the // CRC and check it against the corresponding value from the CRCs // block. state = S_READ_IDENT; currentImageIdx = 0; currentVolume = _imgNum2volumeId[currentImageIdx]; nextImage(); } command error_t DelugeMetadata.read[uint8_t client](uint8_t imgNum) { error_t error; if (state != S_READY) { return FAIL; } currentClient = client; error = call BlockRead.read[imgNum](0, &ident, sizeof(ident)); state = error == SUCCESS ? S_BUSY : state; return error; } event void BlockRead.readDone[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { switch (state) { case S_BUSY: state = S_READY; signal DelugeMetadata.readDone[currentClient](imgNum, buf, error); break; case S_READ_IDENT: if (error == SUCCESS) { if (ident.uidhash != DELUGE_INVALID_UID) { currentPage = 0; state = S_READ_CRC; call BlockRead.read[currentVolume](calcCrcAddr(), ¤tCrc, sizeof(currentCrc)); } else { currentImageIdx++; currentVolume = _imgNum2volumeId[currentImageIdx]; nextImage(); } } break; case S_READ_CRC: state = S_CRC; call BlockRead.computeCrc[currentVolume](calcPageAddr(), DELUGE_BYTES_PER_PAGE, 0); break; } } event void BlockRead.computeCrcDone[uint8_t imgNum](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { switch (state) { case S_CRC: if (crc != currentCrc) { // printf("%04x %04x\n", crc, currentCrc); // invalidate the image by erasing it call BlockWrite.erase[currentVolume](); } else { currentPage++; if (currentPage < ident.numPgs) { state = S_READ_CRC; call BlockRead.read[currentVolume](calcCrcAddr(), ¤tCrc, sizeof(currentCrc)); } else { currentImageIdx++; currentVolume = _imgNum2volumeId[currentImageIdx]; nextImage(); } } break; } } default command error_t BlockRead.read[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t BlockRead.computeCrc[uint8_t imgNum](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; } event void BlockWrite.writeDone[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} event void BlockWrite.eraseDone[uint8_t imgNum](error_t error) { switch (state) { case S_READY: signal BlockWrite.eraseDone[imgNum](error); break; case S_CRC: currentImageIdx++; currentVolume = _imgNum2volumeId[currentImageIdx]; nextImage(); break; } } event void BlockWrite.syncDone[uint8_t imgNum](error_t error) {} default command error_t BlockWrite.erase[uint8_t imgNum]() { return FAIL; } default event void DelugeMetadata.readDone[uint8_t client](uint8_t imgNum, DelugeIdent* i, error_t error) {} default event void storageReady() {} } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeMsgs.h000066400000000000000000000051701207233610700215420ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. */ /** * @author Jonathan Hui * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #ifndef __DELUGE_MSGS_H__ #define __DELUGE_MSGS_H__ #include "DelugePageTransfer.h" enum { DELUGE_ADV_NORMAL = 0, DELUGE_ADV_ERROR = 1, DELUGE_ADV_PC = 2, DELUGE_ADV_PING = 3, DELUGE_ADV_RESET = 4, }; typedef nx_struct DelugeAdvMsg { nx_uint16_t sourceAddr; nx_uint8_t version; // Deluge Version nx_uint8_t type; DelugeObjDesc objDesc; nx_uint8_t reserved; } DelugeAdvMsg; typedef nx_struct DelugeReqMsg { nx_uint16_t dest; nx_uint16_t sourceAddr; nx_object_id_t objid; nx_page_num_t pgNum; nx_uint8_t requestedPkts[DELUGET2_PKT_BITVEC_SIZE]; } DelugeReqMsg; typedef nx_struct DelugeDataMsg { nx_object_id_t objid; nx_page_num_t pgNum; nx_uint8_t pktNum; nx_uint8_t data[DELUGET2_PKT_PAYLOAD_SIZE]; } DelugeDataMsg; #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeP.nc000066400000000000000000000127711207233610700212060ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ module DelugeP { uses { interface Boot; interface Leds; interface DisseminationValue; interface StdControl as DisseminationStdControl; interface ObjectTransfer; interface SplitControl as RadioSplitControl; interface NetProg; interface StorageMap[uint8_t volumeId]; interface DelugeMetadata; interface DelugeVolumeManager; interface Resource; } provides { event void storageReady(); command void stop(); } } implementation { enum { S_IDLE, S_PUB, S_RECV }; DelugeCmd lastCmd; uint8_t state = S_IDLE; event void storageReady() { call RadioSplitControl.start(); } event void Boot.booted() { lastCmd.uidhash = DELUGE_INVALID_UID; } event void RadioSplitControl.startDone(error_t error) { if (error == SUCCESS) { call DisseminationStdControl.start(); } } command void stop() { call Resource.release(); if (state == S_RECV) { // printf("erase %d\n", lastCmd.imgNum); call DelugeVolumeManager.erase(lastCmd.imgNum); } call ObjectTransfer.stop(); state = S_IDLE; } task void taskRequest() { signal Resource.granted(); } void request() { if (call Resource.isOwner()) { post taskRequest(); } else { call Resource.request(); } } event void DisseminationValue.changed() { const DelugeCmd *cmd = call DisseminationValue.get(); // printf("cmd: %d uidhash: 0x%lx imgNum: %d size: %u\n", cmd->type, cmd->uidhash, cmd->imgNum, cmd->size); switch (cmd->type) { case DELUGE_CMD_STOP: call stop(); break; case DELUGE_CMD_ONLY_DISSEMINATE: case DELUGE_CMD_DISSEMINATE_AND_REPROGRAM: if (state == S_RECV) { if (cmd->uidhash == lastCmd.uidhash) { if (cmd->imgNum == lastCmd.imgNum) { // Same uidhash, same imgNum, only cmd should be // different. That will be properly updated by the last // statement from this function. break; } } call stop(); } if (cmd->uidhash != IDENT_UIDHASH) { call DelugeMetadata.read(cmd->imgNum); } else { state = S_PUB; request(); } break; } lastCmd = *cmd; // printf("lastCmd: %d uidhash: 0x%lx\n", lastCmd.type, lastCmd.uidhash); } event void ObjectTransfer.receiveDone(error_t error) { call Leds.set(LEDS_LED1 | LEDS_LED2); state = S_IDLE; if (error == SUCCESS) { switch (lastCmd.type) { case DELUGE_CMD_ONLY_DISSEMINATE: state = S_PUB; request(); break; case DELUGE_CMD_DISSEMINATE_AND_REPROGRAM: call NetProg.programImageAndReboot(call StorageMap.getPhysicalAddress[lastCmd.imgNum](0)); break; } } else { call DelugeVolumeManager.erase(lastCmd.imgNum); } } event void DelugeMetadata.readDone(uint8_t imgNum, DelugeIdent* ident, error_t error) { // printf("readDone 0x%lx imgNum: %d size: %lu\n", lastCmd.uidhash, lastCmd.imgNum, lastCmd.size); if (ident->uidhash == lastCmd.uidhash) { if (lastCmd.type == DELUGE_CMD_DISSEMINATE_AND_REPROGRAM) { call NetProg.programImageAndReboot(call StorageMap.getPhysicalAddress[imgNum](0)); } else { // We already have the image so we'll go ahead and start publishing. state = S_PUB; request(); } } else { state = S_RECV; request(); } } event void Resource.granted() { switch (state) { case S_PUB: // printf("start pub 0x%lx imgNum: %d size: %u\n", lastCmd.uidhash, lastCmd.imgNum, lastCmd.size); call ObjectTransfer.publish(lastCmd.uidhash, lastCmd.size, lastCmd.imgNum); break; case S_RECV: call ObjectTransfer.receive(lastCmd.uidhash, lastCmd.size, lastCmd.imgNum); break; } } event void DelugeVolumeManager.eraseDone(uint8_t imgNum) {} event void RadioSplitControl.stopDone(error_t error) {} default async void command Leds.set(uint8_t val) {} } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugePageTransfer.h000066400000000000000000000111711207233610700232100ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. */ /** * @author Jonathan Hui * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #ifndef DELUGEPAGETRANSFER_H #define DELUGEPAGETRANSFER_H #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) #include "extra/telosb/TOSBoot_platform.h" #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) #include "extra/micaz/TOSBoot_platform.h" #elif defined(PLATFORM_MULLE) #include "extra/mulle/TOSBoot_platform.h" #elif defined(PLATFORM_TINYNODE) #include "extra/tinynode/TOSBoot_platform.h" #else #error "Target platform is not currently supported by Deluge T2" #endif #include #define AM_DELUGEADVMSG 0x50 #define AM_DELUGEREQMSG 0x51 #define AM_DELUGEDATAMSG 0x52 typedef int32_t object_id_t; typedef nx_int32_t nx_object_id_t; typedef uint32_t object_size_t; typedef nx_uint32_t nx_object_size_t; typedef uint8_t page_num_t; typedef nx_uint8_t nx_page_num_t; enum { DELUGET2_PKT_PAYLOAD_SIZE = TOSH_DATA_LENGTH - sizeof(nx_object_id_t) - sizeof(nx_page_num_t) - sizeof(nx_uint8_t), DELUGET2_BYTES_PER_PAGE = 1024, DELUGET2_PKTS_PER_PAGE = ((DELUGET2_BYTES_PER_PAGE - 1) / DELUGET2_PKT_PAYLOAD_SIZE) + 1, DELUGET2_PKT_BITVEC_SIZE = (((DELUGET2_PKTS_PER_PAGE - 1) / 8) + 1), DELUGE_PKT_PAYLOAD_SIZE = 23, DELUGE_PKTS_PER_PAGE = 48, DELUGE_BYTES_PER_PAGE = (DELUGE_PKTS_PER_PAGE*DELUGE_PKT_PAYLOAD_SIZE), DELUGE_VERSION = 2, DELUGE_MAX_ADV_PERIOD_LOG2 = 22, DELUGE_NUM_NEWDATA_ADVS_REQUIRED = 2, DELUGE_NUM_MIN_ADV_PERIODS = 2, DELUGE_MAX_NUM_REQ_TRIES = 1, DELUGE_REBOOT_DELAY = 4, DELUGE_FAILED_SEND_DELAY = 16, DELUGE_MIN_DELAY = 16, // DELUGE_DATA_OFFSET = 128, DELUGE_IDENT_SIZE = 128, DELUGE_INVALID_ADDR = (0x7fffffffL), DELUGE_MIN_ADV_PERIOD_LOG2 = 9, DELUGE_MAX_REQ_DELAY = (0x1L << (DELUGE_MIN_ADV_PERIOD_LOG2 - 1)), DELUGE_NACK_TIMEOUT = (DELUGE_MAX_REQ_DELAY >> 0x1), DELUGE_MAX_IMAGE_SIZE = (128L * 1024L), DELUGE_MAX_PAGES = 128, DELUGE_CRC_SIZE = sizeof(uint16_t), DELUGE_CRC_BLOCK_SIZE = DELUGE_MAX_PAGES * DELUGE_CRC_SIZE, DELUGE_GOLDEN_IMAGE_NUM = 0x0, DELUGE_INVALID_OBJID = 0xff, DELUGE_INVALID_PKTNUM = 0xff, DELUGE_INVALID_PGNUM = 0xff, DELUGE_QSIZE = 2 }; typedef struct DelugeAdvTimer { uint32_t timer : 32; uint8_t periodLog2 : 8; bool overheard : 1; uint8_t newAdvs : 7; } DelugeAdvTimer; typedef nx_struct DelugeObjDesc { nx_object_id_t objid; nx_page_num_t numPgs; // num pages of complete image nx_uint16_t crc; // crc for vNum and numPgs nx_page_num_t numPgsComplete; // numPgsComplete in image nx_uint8_t reserved; } DelugeObjDesc; #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugePageTransfer.nc000066400000000000000000000043651207233610700233700ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. */ /** * @author Jonathan Hui * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "DelugePageTransfer.h" interface DelugePageTransfer { command error_t setWorkingPage(object_id_t new_objid, page_num_t new_pgNum); command error_t dataAvailable(uint16_t sourceAddr); command bool isTransferring(); event void suppressMsgs(object_id_t new_objid); event void receivedPage(object_id_t new_objid, page_num_t new_pgNum); command void setImgNum(uint8_t new_img_num); command error_t stop(); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugePageTransferC.nc000066400000000000000000000057061207233610700234730ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ configuration DelugePageTransferC { provides interface DelugePageTransfer; uses { interface BlockRead[uint8_t img_num]; interface BlockWrite[uint8_t img_num]; interface Receive as ReceiveDataMsg; interface Receive as ReceiveReqMsg; interface AMSend as SendDataMsg; interface AMSend as SendReqMsg; interface AMPacket; interface PacketAcknowledgements; interface Leds; } } implementation { components DelugePageTransferP; DelugePageTransfer = DelugePageTransferP; BlockRead = DelugePageTransferP.BlockRead; BlockWrite = DelugePageTransferP.BlockWrite; ReceiveDataMsg = DelugePageTransferP.ReceiveDataMsg; ReceiveReqMsg = DelugePageTransferP.ReceiveReqMsg; SendDataMsg = DelugePageTransferP.SendDataMsg; SendReqMsg = DelugePageTransferP.SendReqMsg; AMPacket = DelugePageTransferP.AMPacket; PacketAcknowledgements = DelugePageTransferP.PacketAcknowledgements; components RandomC, BitVecUtilsC, new TimerMilliC() as Timer; DelugePageTransferP.Random -> RandomC; DelugePageTransferP.Timer -> Timer; DelugePageTransferP.BitVecUtils -> BitVecUtilsC; DelugePageTransferP.Leds = Leds; // For collecting statistics //components StatsCollectorC; //DelugePageTransferP.StatsCollector -> StatsCollectorC.StatsCollector; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugePageTransferP.nc000066400000000000000000000334631207233610700235110ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. */ /** * @author Jonathan Hui * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "DelugeMsgs.h" #include "BitVecUtils.h" module DelugePageTransferP { provides interface DelugePageTransfer; uses { interface BitVecUtils; interface BlockRead[uint8_t img_num]; interface BlockWrite[uint8_t img_num]; interface Receive as ReceiveDataMsg; interface Receive as ReceiveReqMsg; interface AMSend as SendDataMsg; interface AMSend as SendReqMsg; interface AMPacket; interface PacketAcknowledgements; interface Timer as Timer; interface Random; interface Leds; //interface StatsCollector; } } implementation { // send/receive page buffers, and state variables for buffers uint8_t pktsToSend[DELUGET2_PKT_BITVEC_SIZE]; // bit vec of packets to send uint8_t pktsToReceive[DELUGET2_PKT_BITVEC_SIZE]; // bit vec of packets to receive DelugeDataMsg rxQueue[DELUGE_QSIZE]; uint8_t head, size; enum { S_DISABLED, S_IDLE, S_TX_LOCKING, S_SENDING, S_RX_LOCKING, S_RECEIVING, }; // state variables uint8_t state = S_DISABLED; uint16_t nodeAddr; uint8_t remainingAttempts; bool suppressReq; object_id_t objToSend = DELUGE_INVALID_OBJID; page_num_t pageToSend = DELUGE_INVALID_PGNUM; object_id_t workingObjid = DELUGE_INVALID_OBJID; page_num_t workingPgNum = DELUGE_INVALID_PGNUM; uint8_t imgNum = 0; message_t pMsgBuf; bool isBusy_pMsgBuf = FALSE; uint8_t publisher_addr; // For collecting stats only void changeState(uint8_t newState); void startReqTimer(bool first) { uint32_t delay; if (first) { delay = DELUGE_MIN_DELAY + (call Random.rand32() % DELUGE_MAX_REQ_DELAY); } else { delay = DELUGE_NACK_TIMEOUT + (call Random.rand32() % DELUGE_NACK_TIMEOUT); } call Timer.startOneShot(delay); } void setupReqMsg() { DelugeReqMsg *pReqMsg = (DelugeReqMsg *)(call SendReqMsg.getPayload(&pMsgBuf, sizeof(DelugeReqMsg))); if (pReqMsg == NULL) { return; } if (state == S_RX_LOCKING) { if (isBusy_pMsgBuf) { return; } isBusy_pMsgBuf = TRUE; changeState(S_RECEIVING); pReqMsg->dest = nodeAddr; pReqMsg->sourceAddr = TOS_NODE_ID; pReqMsg->objid = workingObjid; pReqMsg->pgNum = workingPgNum; } if (state != S_RECEIVING) { return; } // suppress request if (suppressReq) { startReqTimer(FALSE); suppressReq = FALSE; } // tried too many times, give up else if (remainingAttempts == 0) { changeState(S_IDLE); } // send req message else { uint32_t i; for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) { pReqMsg->requestedPkts[i] = pktsToReceive[i]; } //memcpy(pReqMsg->requestedPkts, pktsToReceive, DELUGE_PKT_BITVEC_SIZE); if (call SendReqMsg.send(pReqMsg->dest, &pMsgBuf, sizeof(DelugeReqMsg)) != SUCCESS) { startReqTimer(FALSE); } } } storage_addr_t calcOffset(page_num_t pgNum, uint8_t pktNum) { return (storage_addr_t)pgNum * (storage_addr_t)DELUGET2_BYTES_PER_PAGE + (uint16_t)pktNum * (uint16_t)DELUGET2_PKT_PAYLOAD_SIZE; } void setupDataMsg() { DelugeDataMsg *pDataMsg = (DelugeDataMsg *)(call SendDataMsg.getPayload(&pMsgBuf, sizeof(DelugeDataMsg))); uint16_t nextPkt; if (state != S_SENDING && state != S_TX_LOCKING) { return; } signal DelugePageTransfer.suppressMsgs(objToSend); if (state == S_TX_LOCKING) { if (isBusy_pMsgBuf) { return; } isBusy_pMsgBuf = TRUE; changeState(S_SENDING); pDataMsg->objid = objToSend; pDataMsg->pgNum = pageToSend; pDataMsg->pktNum = 0; } if (call BitVecUtils.indexOf(&nextPkt, pDataMsg->pktNum, pktsToSend, DELUGET2_PKTS_PER_PAGE) != SUCCESS) { // no more packets to send changeState(S_IDLE); } else { pDataMsg->pktNum = nextPkt; if (call BlockRead.read[imgNum](calcOffset(pageToSend, nextPkt), pDataMsg->data, DELUGET2_PKT_PAYLOAD_SIZE) != SUCCESS) { call Timer.startOneShot(DELUGE_FAILED_SEND_DELAY); } } } void unlockPMsgBuf() { isBusy_pMsgBuf = FALSE; switch(state) { case S_TX_LOCKING: setupDataMsg(); break; case S_RX_LOCKING: setupReqMsg(); break; } } void changeState(uint8_t newState) { if ((newState == S_DISABLED || newState == S_IDLE) && (state == S_SENDING || state == S_RECEIVING)) { unlockPMsgBuf(); } state = newState; } void suppressMsgs(object_id_t objid, page_num_t pgNum) { if (state == S_SENDING || state == S_TX_LOCKING) { if (objid < objToSend || (objid == objToSend && pgNum < pageToSend)) { uint32_t i; changeState(S_IDLE); for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) { pktsToSend[i] = 0x00; } //memset(pktsToSend, 0x00, DELUGE_PKT_BITVEC_SIZE); } } else if (state == S_RECEIVING || state == S_RX_LOCKING) { if (objid < workingObjid || (objid == workingObjid && pgNum <= workingPgNum)) { // suppress next request since similar request has been overheard suppressReq = TRUE; } } } void writeData() { if(call BlockWrite.write[imgNum](calcOffset(rxQueue[head].pgNum, rxQueue[head].pktNum), rxQueue[head].data, DELUGET2_PKT_PAYLOAD_SIZE) != SUCCESS) { size = 0; } } command error_t DelugePageTransfer.stop() { uint32_t i; call Timer.stop(); changeState(S_DISABLED); workingObjid = DELUGE_INVALID_OBJID; workingPgNum = DELUGE_INVALID_PGNUM; for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) { pktsToReceive[i] = 0x00; } for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) { pktsToSend[i] = 0x00; } //memset(pktsToReceive, 0x00, DELUGE_PKT_BITVEC_SIZE); //memset(pktsToSend, 0x00, DELUGE_PKT_BITVEC_SIZE); return SUCCESS; } command error_t DelugePageTransfer.setWorkingPage(object_id_t new_objid, page_num_t new_pgNum) { uint32_t i; if (state == S_DISABLED) { changeState(S_IDLE); } workingObjid = new_objid; workingPgNum = new_pgNum; for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) { pktsToReceive[i] = 0xFF; } //memset(pktsToReceive, (nx_uint8_t)0xff, DELUGE_PKT_BITVEC_SIZE); return SUCCESS; } command bool DelugePageTransfer.isTransferring() { return (state != S_IDLE && state != S_DISABLED); } command error_t DelugePageTransfer.dataAvailable(uint16_t sourceAddr) { if (state == S_IDLE) { // currently idle, so request data from source changeState(S_RX_LOCKING); nodeAddr = sourceAddr; remainingAttempts = DELUGE_MAX_NUM_REQ_TRIES; suppressReq = FALSE; // randomize request to prevent collision startReqTimer(TRUE); } return SUCCESS; } event void Timer.fired() { setupReqMsg(); setupDataMsg(); } event void SendReqMsg.sendDone(message_t* msg, error_t error) { if (state != S_RECEIVING) { return; } remainingAttempts--; // start timeout timer in case request is not serviced startReqTimer(FALSE); } event message_t* ReceiveReqMsg.receive(message_t* msg, void* payload, uint8_t len) { DelugeReqMsg *rxReqMsg = (DelugeReqMsg*)payload; object_id_t objid; page_num_t pgNum; int i; if (state == S_DISABLED) { return msg; } objid = rxReqMsg->objid; pgNum = rxReqMsg->pgNum; // check if need to suppress req or data msgs suppressMsgs(objid, pgNum); // if not for me, ignore request if (rxReqMsg->dest != TOS_NODE_ID || objid != workingObjid || pgNum >= workingPgNum) { return msg; } if (state == S_IDLE || ((state == S_SENDING || state == S_TX_LOCKING) && objid == objToSend && pgNum == pageToSend)) { // take union of packet bit vectors for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) { pktsToSend[i] |= rxReqMsg->requestedPkts[i]; } } if (state == S_IDLE) { // not currently sending, so start sending data changeState(S_TX_LOCKING); objToSend = objid; pageToSend = pgNum; nodeAddr = AM_BROADCAST_ADDR; setupDataMsg(); } return msg; } event void SendDataMsg.sendDone(message_t* msg, error_t error) { DelugeDataMsg *pDataMsg = (DelugeDataMsg *)(call SendDataMsg.getPayload(&pMsgBuf, sizeof (DelugeDataMsg))); if (pDataMsg == NULL) { return; } BITVEC_CLEAR(pktsToSend, pDataMsg->pktNum); call Timer.startOneShot(2); // For collecting stats if (error == SUCCESS) { //call StatsCollector.endPubPktTransTime(); } } event message_t* ReceiveDataMsg.receive(message_t* msg, void* payload, uint8_t len) { DelugeDataMsg* rxDataMsg = (DelugeDataMsg*)payload; if (state == S_DISABLED) { return msg; } // check if need to suppress req or data messages suppressMsgs(rxDataMsg->objid, rxDataMsg->pgNum); if (rxDataMsg->objid == workingObjid && rxDataMsg->pgNum == workingPgNum && BITVEC_GET(pktsToReceive, rxDataMsg->pktNum) && size < DELUGE_QSIZE) { // got a packet we need // For collecting stats if (rxDataMsg->pktNum == 0) { //call StatsCollector.startRecvPageTransTime(0); } call Leds.led1Toggle(); //call Leds.set(rxDataMsg->pktNum); // copy data memcpy(&rxQueue[head^size], rxDataMsg, sizeof(DelugeDataMsg)); if (++size == 1) { publisher_addr = call AMPacket.source(msg); // For collecting stats writeData(); } } return msg; } event void BlockRead.readDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { DelugeDataMsg *pDataMsg = (DelugeDataMsg *)(call SendDataMsg.getPayload(&pMsgBuf, sizeof(DelugeDataMsg))); // make sure this event for us if (buf != pDataMsg->data) { return; } if (state != S_SENDING) { return; } if (error != SUCCESS) { changeState(S_IDLE); return; } if (call SendDataMsg.send(nodeAddr, &pMsgBuf, sizeof(DelugeDataMsg)) != SUCCESS) { call Timer.startOneShot(DELUGE_FAILED_SEND_DELAY); } else { // For collecting stats //call StatsCollector.startPubPktTransTime(); //call Leds.led1Toggle(); } } event void BlockRead.computeCrcDone[uint8_t img_num](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { } event void BlockWrite.writeDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { uint16_t tmp; // make sure this event for us if (buf != rxQueue[head].data) { return; } // failed to write if (error != SUCCESS) { uint32_t i; for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) { pktsToReceive[i] = 0xFF; } size = 0; return; } // mark packet as received BITVEC_CLEAR(pktsToReceive, rxQueue[head].pktNum); head = (head + 1) % DELUGE_QSIZE; size--; if (call BitVecUtils.indexOf(&tmp, 0, pktsToReceive, DELUGET2_PKTS_PER_PAGE) != SUCCESS) { // For collecting stats //call StatsCollector.endRecvPageTransTime(publisher_addr); call Leds.led1Off(); signal DelugePageTransfer.receivedPage(workingObjid, workingPgNum); changeState(S_IDLE); size = 0; } else if (size) { writeData(); } } event void BlockWrite.eraseDone[uint8_t img_num](error_t error) {} event void BlockWrite.syncDone[uint8_t img_num](error_t error) {} command void DelugePageTransfer.setImgNum(uint8_t new_img_num) { imgNum = new_img_num; } default command error_t BlockRead.read[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t BlockWrite.write[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default async command void Leds.led1Toggle() {} default async command void Leds.led1Off() {} } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeVolumeManager.nc000066400000000000000000000034331207233610700235440ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ interface DelugeVolumeManager { command error_t erase(uint8_t imgNum); event void eraseDone(uint8_t imgNum); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeVolumeManagerC.nc000066400000000000000000000047611207233610700236540ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ configuration DelugeVolumeManagerC { provides interface DelugeVolumeManager[uint8_t client]; } implementation { components DelugeVolumeManagerP; DelugeVolumeManager = DelugeVolumeManagerP; components new BlockWriterC(VOLUME_DELUGE1) as BlockWriterDeluge1; components new BlockWriterC(VOLUME_DELUGE2) as BlockWriterDeluge2; components new BlockWriterC(VOLUME_DELUGE3) as BlockWriterDeluge3; DelugeVolumeManagerP.BlockWrite[VOLUME_DELUGE1] -> BlockWriterDeluge1; DelugeVolumeManagerP.BlockWrite[VOLUME_DELUGE2] -> BlockWriterDeluge2; DelugeVolumeManagerP.BlockWrite[VOLUME_DELUGE3] -> BlockWriterDeluge3; DelugeVolumeManagerP.Resource[VOLUME_DELUGE1] -> BlockWriterDeluge1; DelugeVolumeManagerP.Resource[VOLUME_DELUGE2] -> BlockWriterDeluge2; DelugeVolumeManagerP.Resource[VOLUME_DELUGE3] -> BlockWriterDeluge3; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeVolumeManagerClientC.nc000066400000000000000000000037151207233610700250110ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ generic configuration DelugeVolumeManagerClientC() { provides interface DelugeVolumeManager; } implementation { enum { CLIENT_ID = unique(UQ_DELUGE_VOLUME_MANAGER) }; components DelugeVolumeManagerC; DelugeVolumeManager = DelugeVolumeManagerC.DelugeVolumeManager[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/DelugeVolumeManagerP.nc000066400000000000000000000057251207233610700236720ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ module DelugeVolumeManagerP { provides interface DelugeVolumeManager[uint8_t client]; uses { interface BlockWrite[uint8_t volumeId]; interface Resource[uint8_t volumeId]; } } implementation { uint8_t currentClient; bool busy = FALSE; command error_t DelugeVolumeManager.erase[uint8_t client](uint8_t imgNum) { if (busy) return FAIL; busy = call Resource.request[imgNum]() == SUCCESS; if (busy) { currentClient = client; return SUCCESS; } return FAIL; } event void Resource.granted[uint8_t imgNum]() { call BlockWrite.erase[imgNum](); } event void BlockWrite.eraseDone[uint8_t imgNum](error_t error) { busy = FALSE; call Resource.release[imgNum](); signal DelugeVolumeManager.eraseDone[currentClient](error); } event void BlockWrite.writeDone[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} event void BlockWrite.syncDone[uint8_t imgNum](error_t error) {} default command error_t BlockWrite.erase[uint8_t imgNum]() { return FAIL; } default event void DelugeVolumeManager.eraseDone[uint8_t client](uint8_t imgNum) {} default async command error_t Resource.request[uint8_t imgNum]() { return FAIL; } default async command error_t Resource.release[uint8_t imgNum]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/FakeBlockReaderC.nc000066400000000000000000000054211207233610700227220ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ generic module FakeBlockReaderC(uint32_t size) { provides interface BlockRead; } implementation { enum { S_IDLE, S_BUSY }; storage_addr_t saddr; uint8_t *oribuf; uint8_t *sbuf; storage_len_t slen; uint8_t state = S_IDLE; task void task_read() { while (slen > 0) { *sbuf = saddr & 0xFF; saddr++; sbuf++; slen--; } signal BlockRead.readDone(saddr, oribuf, slen, SUCCESS); state = S_IDLE; } command error_t BlockRead.read(storage_addr_t addr, void* buf, storage_len_t len) { if (state != S_IDLE) { return FAIL; } state = S_BUSY; saddr = addr; sbuf = buf; oribuf = buf; slen = len; post task_read(); return SUCCESS; }; task void task_computeCRC() { signal BlockRead.computeCrcDone(saddr, slen, 0, SUCCESS); } command error_t BlockRead.computeCrc(storage_addr_t addr, storage_len_t len, uint16_t crc) { saddr = addr; slen = len; post task_computeCRC(); return SUCCESS; } command storage_len_t BlockRead.getSize() { return size; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/FakeBlockWriterC.nc000066400000000000000000000036451207233610700230020ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ generic configuration FakeBlockWriterC(uint32_t size) { provides interface BlockWrite; } implementation { components LedsC, NoLedsC, new FakeBlockWriterP(size); BlockWrite = FakeBlockWriterP; FakeBlockWriterP.Leds -> NoLedsC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/FakeBlockWriterP.nc000066400000000000000000000055521207233610700230160ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ generic module FakeBlockWriterP(uint32_t size) { provides interface BlockWrite; uses interface Leds; } implementation { enum { S_IDLE, S_BUSY }; storage_addr_t saddr; uint8_t *oribuf; uint8_t *sbuf; storage_len_t slen; uint8_t state; task void task_write() { error_t error = SUCCESS; while (slen > 0) { if (*sbuf != (saddr & 0xFF)) { error = FAIL; call Leds.led2Toggle(); } saddr++; sbuf++; slen--; } signal BlockWrite.writeDone(saddr, oribuf, slen, error); state = S_IDLE; } command error_t BlockWrite.write(storage_addr_t addr, void* buf, storage_len_t len) { if (state != S_IDLE) { return FAIL; } state = S_BUSY; saddr = addr; sbuf = buf; oribuf = buf; slen = len; post task_write(); return SUCCESS; } task void task_erase() { signal BlockWrite.eraseDone(SUCCESS); } command error_t BlockWrite.erase() { post task_erase(); return SUCCESS; } task void task_sync() { signal BlockWrite.syncDone(SUCCESS); } command error_t BlockWrite.sync() { post task_sync(); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/FlashVolumeManager/000077500000000000000000000000001207233610700230475ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerC.nc000066400000000000000000000070661207233610700272250ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "AM.h" #include "StorageVolumes.h" generic configuration FlashVolumeManagerC(am_id_t AMId) {} implementation { components new SerialAMSenderC(AMId); components new SerialAMReceiverC(AMId); components new FlashVolumeManagerP(); components new TimerMilliC() as TimeoutTimer; components NoLedsC, LedsC; components BlockStorageLockC; components new BlockStorageLockClientC(); components new BlockReaderC(VOLUME_GOLDENIMAGE) as BlockReaderGoldenImage; components new BlockReaderC(VOLUME_DELUGE1) as BlockReaderDeluge1; components new BlockReaderC(VOLUME_DELUGE2) as BlockReaderDeluge2; components new BlockReaderC(VOLUME_DELUGE3) as BlockReaderDeluge3; components new BlockWriterC(VOLUME_GOLDENIMAGE) as BlockWriterGoldenImage; components new BlockWriterC(VOLUME_DELUGE1) as BlockWriterDeluge1; components new BlockWriterC(VOLUME_DELUGE2) as BlockWriterDeluge2; components new BlockWriterC(VOLUME_DELUGE3) as BlockWriterDeluge3; FlashVolumeManagerP.BlockRead[VOLUME_GOLDENIMAGE] -> BlockReaderGoldenImage; FlashVolumeManagerP.BlockRead[VOLUME_DELUGE1] -> BlockReaderDeluge1; FlashVolumeManagerP.BlockRead[VOLUME_DELUGE2] -> BlockReaderDeluge2; FlashVolumeManagerP.BlockRead[VOLUME_DELUGE3] -> BlockReaderDeluge3; FlashVolumeManagerP.BlockWrite[VOLUME_GOLDENIMAGE] -> BlockWriterGoldenImage; FlashVolumeManagerP.BlockWrite[VOLUME_DELUGE1] -> BlockWriterDeluge1; FlashVolumeManagerP.BlockWrite[VOLUME_DELUGE2] -> BlockWriterDeluge2; FlashVolumeManagerP.BlockWrite[VOLUME_DELUGE3] -> BlockWriterDeluge3; FlashVolumeManagerP.Resource -> BlockStorageLockClientC; FlashVolumeManagerP.ArbiterInfo -> BlockStorageLockC; FlashVolumeManagerP.TimeoutTimer -> TimeoutTimer; FlashVolumeManagerP.SerialAMSender -> SerialAMSenderC; FlashVolumeManagerP.SerialAMReceiver -> SerialAMReceiverC; FlashVolumeManagerP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerP.nc000066400000000000000000000216421207233610700272360ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "imgNum2volumeId.h" generic module FlashVolumeManagerP() { uses { interface BlockRead[uint8_t imgNum]; interface BlockWrite[uint8_t imgNum]; interface Resource; interface ArbiterInfo; interface AMSend as SerialAMSender; interface Receive as SerialAMReceiver; interface Timer as TimeoutTimer; interface Leds; } } implementation { typedef nx_struct SerialReqPacket { nx_uint8_t cmd; nx_uint8_t imgNum; nx_uint32_t offset; nx_uint16_t len; nx_uint8_t data[0]; } SerialReqPacket; typedef nx_struct SerialReplyPacket { nx_uint8_t error; nx_uint8_t data[0]; } SerialReplyPacket; enum { CMD_ERASE = 0, CMD_WRITE = 1, CMD_READ = 2, CMD_CRC = 3, CMD_ADDR = 4, CMD_SYNC = 5, CMD_IDENT = 6 }; enum { S_IDLE, S_ERASE, S_WRITE, S_READ, S_CRC, S_REPROG, S_SYNC, }; message_t serialMsg; uint8_t buffer[TOSH_DATA_LENGTH]; // Temporary buffer for "write" operation uint8_t currentImgNum = 0xFF; // Image number to reprogram uint8_t state = S_IDLE; // Manager state for multiplexing "done" events nx_struct ShortIdent { nx_uint8_t name[16]; //nx_uint8_t username[16]; //nx_uint8_t hostname[16]; nx_uint32_t timestamp; nx_uint32_t uidhash; nx_uint16_t nodeid; }; void sendReply(error_t error, storage_len_t len) { SerialReplyPacket *reply = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); if (reply == NULL) { return; } reply->error = error; call SerialAMSender.send(AM_BROADCAST_ADDR, &serialMsg, len); } event void BlockRead.readDone[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { if (state == S_READ) { SerialReplyPacket *reply = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); if (reply == NULL) { return; } if (buf == reply->data) { state = S_IDLE; sendReply(error, len + sizeof(SerialReplyPacket)); } } } event void BlockRead.computeCrcDone[uint8_t imgNum](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { if (state == S_CRC) { state = S_IDLE; if (error == SUCCESS) { SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); if (srpkt == NULL) { return; } srpkt->data[1] = crc & 0xFF; srpkt->data[0] = (crc >> 8) & 0xFF; } sendReply(error, 2 + sizeof(SerialReplyPacket)); } } event void BlockWrite.writeDone[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { if (state == S_WRITE && buf == buffer) { state = S_IDLE; sendReply(error, sizeof(SerialReplyPacket)); } } event void BlockWrite.eraseDone[uint8_t imgNum](error_t error) { if (state == S_ERASE) { call BlockWrite.sync[imgNum](); } } event void BlockWrite.syncDone[uint8_t imgNum](error_t error) { if (state == S_ERASE || state == S_SYNC) { state = S_IDLE; sendReply(error, sizeof(SerialReplyPacket)); } } event message_t* SerialAMReceiver.receive(message_t* msg, void* payload, uint8_t len) { error_t error = SUCCESS; SerialReqPacket *request = (SerialReqPacket *)payload; SerialReplyPacket *reply = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket)); nx_struct ShortIdent *shortIdent; uint8_t imgNum = 0xFF; if (reply == NULL) { return msg; } if (state != S_IDLE) { return msg; } // Converts the image number that the user wants to the real image number imgNum = imgNum2volumeId(request->imgNum); if (imgNum != NON_DELUGE_VOLUME) { error = SUCCESS; // We ask for a reservation only for erase and write. switch (request->cmd) { case CMD_ERASE: case CMD_WRITE: if (!call Resource.isOwner()) { error = call Resource.immediateRequest(); } } if (error == SUCCESS) { call Leds.led1On(); call TimeoutTimer.startOneShot(2*1024); currentImgNum = imgNum; switch (request->cmd) { case CMD_ERASE: // === Erases a volume === state = S_ERASE; #if defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) error = FAIL; #else error = call BlockWrite.erase[imgNum](); #endif break; case CMD_WRITE: // === Writes to a volume === state = S_WRITE; memcpy(buffer, request->data, request->len); error = call BlockWrite.write[imgNum](request->offset, buffer, request->len); break; case CMD_READ: // === Reads a portion of a volume === state = S_READ; error = call BlockRead.read[imgNum](request->offset, reply->data, request->len); break; case CMD_CRC: // === Computes CRC over a portion of a volume === state = S_CRC; error = call BlockRead.computeCrc[imgNum](request->offset, request->len, 0); break; case CMD_SYNC: // === Sync the flash === state = S_SYNC; error = call BlockWrite.sync[imgNum](); break; case CMD_IDENT: shortIdent = (nx_struct ShortIdent*)&reply->data; memset(shortIdent, 0, sizeof(nx_struct ShortIdent)); memcpy(shortIdent->name, IDENT_APPNAME, sizeof(IDENT_APPNAME)); //memcpy(shortIdent->username, IDENT_USER_ID, sizeof(IDENT_USER_ID)); //memcpy(shortIdent->hostname, IDENT_HOSTNAME, sizeof(IDENT_HOSTNAME)); shortIdent->timestamp = IDENT_TIMESTAMP; shortIdent->uidhash = IDENT_UIDHASH; shortIdent->nodeid = TOS_NODE_ID; sendReply(SUCCESS, sizeof(SerialReplyPacket) + sizeof(nx_struct ShortIdent)); break; } } } else { error = FAIL; } // If a split-phase operation fails when being requested, signals the failure now if (error != SUCCESS) { state = S_IDLE; sendReply(error, sizeof(SerialReplyPacket)); } return msg; } event void TimeoutTimer.fired() { // Release the resource. if (state == S_IDLE && call Resource.isOwner()) { call Resource.release(); } if (state == S_IDLE) { call Leds.led1Off(); } } event void SerialAMSender.sendDone(message_t* msg, error_t error) {} event void Resource.granted() {} default command error_t BlockWrite.write[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t BlockWrite.erase[uint8_t imgNum]() { return FAIL; } default command error_t BlockWrite.sync[uint8_t imgNum]() { return FAIL; } default command error_t BlockRead.read[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t BlockRead.computeCrc[uint8_t imgNum](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; } default async command error_t Resource.immediateRequest() { return FAIL; } default async command error_t Resource.release() { return FAIL; } default async command bool Resource.isOwner() { return FALSE; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/Globals.nc000066400000000000000000000051121207233610700212330ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ interface Globals { command uint32_t getNumPubPktTrans(); command void setNumPubPktTrans(uint32_t val); command void incNumPubPktTrans(); command uint32_t getNumRecvPageTrans(); command void setNumRecvPageTrans(uint32_t val); command void incNumRecvPageTrans(); command uint32_t getAvgPubPktTransTime(); command void setAvgPubPktTransTime(uint32_t val); command uint32_t getAvgRecvPageTransTime(); command void setAvgRecvPageTransTime(uint32_t val); command uint32_t getNumPubPktRetrans(); command void setNumPubPktRetrans(uint32_t val); command void incNumPubPktRetrans(); command uint32_t getNumPubHSRetrans(); command void setNumPubHSRetrans(uint32_t val); command void incNumPubHSRetrans(); command uint32_t getNumRecvHSRetrans(); command void setNumRecvHSRetrans(uint32_t val); command void incNumRecvHSRetrans(); command void* _getStartAddr(); command uint32_t _getSize(); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/GlobalsC.nc000066400000000000000000000071771207233610700213530ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ module GlobalsC { provides interface Globals; } implementation { struct { uint32_t NumPubPktTrans; uint32_t NumRecvPageTrans; uint32_t AvgPubPktTransTime; uint32_t AvgRecvPageTransTime; uint32_t NumPubPktRetrans; uint32_t NumPubHSRetrans; uint32_t NumRecvHSRetrans; } _g = {0, 0, 0, 0, 0, 0, 0}; command uint32_t Globals.getNumPubPktTrans() { return _g.NumPubPktTrans; } command void Globals.setNumPubPktTrans(uint32_t val) { _g.NumPubPktTrans = val; } command void Globals.incNumPubPktTrans() { _g.NumPubPktTrans++; } command uint32_t Globals.getNumRecvPageTrans() { return _g.NumRecvPageTrans; } command void Globals.setNumRecvPageTrans(uint32_t val) { _g.NumRecvPageTrans = val; } command void Globals.incNumRecvPageTrans() { _g.NumRecvPageTrans++; } command uint32_t Globals.getAvgPubPktTransTime() { return _g.AvgPubPktTransTime; } command void Globals.setAvgPubPktTransTime(uint32_t val) { _g.AvgPubPktTransTime = val; } command uint32_t Globals.getAvgRecvPageTransTime() { return _g.AvgRecvPageTransTime; } command void Globals.setAvgRecvPageTransTime(uint32_t val) { _g.AvgRecvPageTransTime = val; } command uint32_t Globals.getNumPubPktRetrans() { return _g.NumPubPktRetrans; } command void Globals.setNumPubPktRetrans(uint32_t val) { _g.NumPubPktRetrans = val; } command void Globals.incNumPubPktRetrans() { _g.NumPubPktRetrans++; } command uint32_t Globals.getNumPubHSRetrans() { return _g.NumPubHSRetrans; } command void Globals.setNumPubHSRetrans(uint32_t val) { _g.NumPubHSRetrans = val; } command void Globals.incNumPubHSRetrans() { _g.NumPubHSRetrans++; } command uint32_t Globals.getNumRecvHSRetrans() { return _g.NumRecvHSRetrans; } command void Globals.setNumRecvHSRetrans(uint32_t val) { _g.NumRecvHSRetrans = val; } command void Globals.incNumRecvHSRetrans() { _g.NumRecvHSRetrans++; } command void* Globals._getStartAddr() { return &_g; } command uint32_t Globals._getSize() { return sizeof(_g); } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/ObjectTransfer.nc000066400000000000000000000037401207233610700225700ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "DelugePageTransfer.h" interface ObjectTransfer { command error_t publish(object_id_t new_objid, object_size_t new_size, uint8_t img_num); command error_t receive(object_id_t new_objid, object_size_t new_size, uint8_t img_num); event void receiveDone(error_t error); command error_t stop(); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/ObjectTransferC.nc000066400000000000000000000064421207233610700226750ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "DelugePageTransfer.h" #include "StorageVolumes.h" configuration ObjectTransferC { provides interface ObjectTransfer; uses { interface BlockRead[uint8_t img_num]; interface BlockWrite[uint8_t img_num]; interface Leds; } } implementation { components ObjectTransferP, DelugePageTransferC; components CrcC; ObjectTransfer = ObjectTransferP; DelugePageTransferC.BlockRead = BlockRead; DelugePageTransferC.BlockWrite = BlockWrite; ObjectTransferP.DelugePageTransfer -> DelugePageTransferC.DelugePageTransfer; ObjectTransferP.Crc -> CrcC.Crc; components new AMSenderC(AM_DELUGEADVMSG) as SendAdvMsg, new AMReceiverC(AM_DELUGEADVMSG) as ReceiveAdvMsg, new AMSenderC(AM_DELUGEREQMSG) as SendReqMsg, new AMReceiverC(AM_DELUGEREQMSG) as ReceiveReqMsg, new AMSenderC(AM_DELUGEDATAMSG) as SendDataMsg, new AMReceiverC(AM_DELUGEDATAMSG) as ReceiveDataMsg; ObjectTransferP.SendAdvMsg -> SendAdvMsg; ObjectTransferP.ReceiveAdvMsg -> ReceiveAdvMsg; DelugePageTransferC.SendReqMsg -> SendReqMsg; DelugePageTransferC.ReceiveReqMsg -> ReceiveReqMsg; DelugePageTransferC.SendDataMsg -> SendDataMsg; DelugePageTransferC.ReceiveDataMsg -> ReceiveDataMsg; DelugePageTransferC.AMPacket -> SendDataMsg; DelugePageTransferC.Leds = Leds; ObjectTransferP.BlockWrite = BlockWrite; components RandomC, new TimerMilliC() as Timer; ObjectTransferP.Random -> RandomC; ObjectTransferP.Timer -> Timer; // For collecting statistics // components StatsCollectorC; // ObjectTransferP.StatsCollector -> StatsCollectorC.StatsCollector; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/ObjectTransferP.nc000066400000000000000000000236031207233610700227100ustar00rootroot00000000000000/* * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. */ /** * @author Jonathan Hui * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "DelugePageTransfer.h" #include "DelugeMsgs.h" module ObjectTransferP { provides interface ObjectTransfer; uses { interface Random; interface Timer as Timer; interface DelugePageTransfer; interface Crc; interface AMSend as SendAdvMsg; interface Receive as ReceiveAdvMsg; interface BlockWrite[uint8_t img_num]; interface Leds; // interface StatsCollector; } } implementation { // States enum { S_ERASE, S_SYNC, S_INITIALIZING_PUB, S_INITIALIZING_RECV, S_STARTED, S_STOPPED, }; DelugeAdvTimer advTimers; uint8_t state = S_STOPPED; object_id_t cont_receive_new_objid; object_size_t cont_receive_new_size; uint8_t cont_receive_img_num; message_t pMsgBuf; bool isBusy_pMsgBuf = FALSE; DelugeObjDesc curObjDesc; void updateTimers() { //advTimers.timer = 0; } void setupAdvTimer() { advTimers.timer = (uint32_t)0x1 << (advTimers.periodLog2 - 1); advTimers.timer += call Random.rand16() & (advTimers.timer - 1); advTimers.overheard = 0; call Timer.stop(); call Timer.startOneShot(advTimers.timer); } void resetTimer() { if (advTimers.periodLog2 != DELUGE_MIN_ADV_PERIOD_LOG2) { advTimers.periodLog2 = DELUGE_MIN_ADV_PERIOD_LOG2; setupAdvTimer(); } } task void signalObjRecvDone() { signal ObjectTransfer.receiveDone(SUCCESS); } void setNextPage() { if (curObjDesc.numPgsComplete < curObjDesc.numPgs) { call DelugePageTransfer.setWorkingPage(curObjDesc.objid, curObjDesc.numPgsComplete); advTimers.newAdvs = DELUGE_NUM_NEWDATA_ADVS_REQUIRED; advTimers.overheard = 0; resetTimer(); } else { call DelugePageTransfer.setWorkingPage(DELUGE_INVALID_OBJID, DELUGE_INVALID_PGNUM); call ObjectTransfer.stop(); state = S_SYNC; call BlockWrite.sync[cont_receive_img_num](); } } bool isObjDescValid(DelugeObjDesc* tmpObjDesc) { return (tmpObjDesc->crc == call Crc.crc16(tmpObjDesc, sizeof(object_id_t) + sizeof(page_num_t)) && tmpObjDesc->crc != 0); } void sendAdvMsg(uint16_t addr) { DelugeAdvMsg *pMsg = (DelugeAdvMsg *)(call SendAdvMsg.getPayload(&pMsgBuf, sizeof(DelugeAdvMsg))); if (pMsg == NULL) { return; } if (isBusy_pMsgBuf == FALSE) { pMsg->sourceAddr = TOS_NODE_ID; pMsg->version = DELUGE_VERSION; pMsg->type = DELUGE_ADV_NORMAL; memcpy(&(pMsg->objDesc), &curObjDesc, sizeof(DelugeObjDesc)); if (call SendAdvMsg.send(addr, &pMsgBuf, sizeof(DelugeAdvMsg)) == SUCCESS) { //call StatsCollector.msg_bcastReq(); isBusy_pMsgBuf = TRUE; } } } /** * Starts publisher */ command error_t ObjectTransfer.publish(object_id_t new_objid, object_size_t new_size, uint8_t img_num) { call ObjectTransfer.stop(); //call StatsCollector.startStatsCollector(); state = S_INITIALIZING_PUB; curObjDesc.objid = new_objid; curObjDesc.numPgs = ((new_size - 1) / DELUGET2_BYTES_PER_PAGE) + 1; // Number of pages to transmit curObjDesc.numPgsComplete = curObjDesc.numPgs; // Publisher doesn't really care about this curObjDesc.crc = call Crc.crc16(&curObjDesc, sizeof(object_id_t) + sizeof(page_num_t)); if (state == S_INITIALIZING_PUB) { resetTimer(); } state = S_STARTED; call DelugePageTransfer.setImgNum(img_num); call DelugePageTransfer.setWorkingPage(curObjDesc.objid, curObjDesc.numPgs); return SUCCESS; } /** * Resumes the process of preparing the receiver after the target volume is erased */ void cont_receive() { state = S_INITIALIZING_RECV; curObjDesc.objid = cont_receive_new_objid; curObjDesc.numPgs = ((cont_receive_new_size - 1) / DELUGET2_BYTES_PER_PAGE) + 1; // Number of pages to receive curObjDesc.numPgsComplete = 0; curObjDesc.crc = call Crc.crc16(&curObjDesc, sizeof(object_id_t) + sizeof(page_num_t)); if (state == S_INITIALIZING_RECV) { resetTimer(); } state = S_STARTED; call DelugePageTransfer.setImgNum(cont_receive_img_num); setNextPage(); } /** * Starts receiver */ command error_t ObjectTransfer.receive(object_id_t new_objid, object_size_t new_size, uint8_t img_num) { error_t error; call ObjectTransfer.stop(); //call StatsCollector.startStatsCollector(); cont_receive_new_objid = new_objid; cont_receive_new_size = new_size; cont_receive_img_num = img_num; error = call BlockWrite.erase[cont_receive_img_num](); if (error == SUCCESS) { state = S_ERASE; } return error; } command error_t ObjectTransfer.stop() { call Timer.stop(); call DelugePageTransfer.stop(); state = S_STOPPED; //call StatsCollector.stopStatsCollector(); curObjDesc.objid = DELUGE_INVALID_OBJID; curObjDesc.numPgs = DELUGE_INVALID_PGNUM; curObjDesc.numPgsComplete = DELUGE_INVALID_PGNUM; advTimers.periodLog2 = 0; return SUCCESS; } event void DelugePageTransfer.receivedPage(object_id_t new_objid, page_num_t new_pgNum) { // printf("R: %08lx %d\n", new_objid, new_pgNum); if (new_objid == curObjDesc.objid && new_pgNum == curObjDesc.numPgsComplete) { curObjDesc.numPgsComplete++; curObjDesc.crc = call Crc.crc16(&curObjDesc, sizeof(object_id_t) + sizeof(page_num_t)); if (curObjDesc.numPgsComplete < curObjDesc.numPgs) { setNextPage(); } else { call DelugePageTransfer.setWorkingPage(curObjDesc.objid, curObjDesc.numPgsComplete); state = S_SYNC; if (call BlockWrite.sync[cont_receive_img_num]() != SUCCESS) { post signalObjRecvDone(); } } } } event void BlockWrite.syncDone[uint8_t img_num](error_t error) { if (state == S_SYNC) { post signalObjRecvDone(); } } event void DelugePageTransfer.suppressMsgs(object_id_t new_objid) { if (new_objid == curObjDesc.objid) { advTimers.overheard = 1; } } event void SendAdvMsg.sendDone(message_t* msg, error_t error) { isBusy_pMsgBuf = FALSE; } event message_t* ReceiveAdvMsg.receive(message_t* msg, void* payload, uint8_t len) { DelugeAdvMsg *rxAdvMsg = (DelugeAdvMsg*)payload; DelugeObjDesc *cmpObjDesc = &(rxAdvMsg->objDesc); bool isEqual = FALSE; if (cmpObjDesc->objid != curObjDesc.objid) { return msg; } if (rxAdvMsg->version != DELUGE_VERSION || state != S_STARTED) { return msg; } if (isObjDescValid(&(rxAdvMsg->objDesc)) && state == S_STARTED) { // Their image is larger (They have something we need) if (cmpObjDesc->numPgsComplete > curObjDesc.numPgsComplete) { if ( advTimers.newAdvs == 0 ) { call DelugePageTransfer.dataAvailable(rxAdvMsg->sourceAddr); } } // Their image is smaller (They need something we have) else if (cmpObjDesc->numPgsComplete < curObjDesc.numPgsComplete) { advTimers.newAdvs = DELUGE_NUM_NEWDATA_ADVS_REQUIRED; } // image is the same else { advTimers.overheard = 1; isEqual = TRUE; } if (!isEqual) { resetTimer(); } } return msg; } event void Timer.fired() { updateTimers(); if (advTimers.overheard == 0) { sendAdvMsg(AM_BROADCAST_ADDR); } if (call DelugePageTransfer.isTransferring()) advTimers.newAdvs = DELUGE_NUM_NEWDATA_ADVS_REQUIRED; else if (advTimers.newAdvs > 0) advTimers.newAdvs--; if (advTimers.newAdvs == 0 && advTimers.periodLog2 < DELUGE_MAX_ADV_PERIOD_LOG2) { advTimers.periodLog2++; } setupAdvTimer(); } default command error_t BlockWrite.erase[uint8_t img_num]() { return FAIL; } default command error_t BlockWrite.sync[uint8_t img_num]() { return FAIL; } event void BlockWrite.writeDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} event void BlockWrite.eraseDone[uint8_t img_num](error_t error) { if (state == S_ERASE) { cont_receive(); } } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/ReprogramGuard.nc000066400000000000000000000001451207233610700225720ustar00rootroot00000000000000interface ReprogramGuard { command error_t okToProgram(); event void okToProgramDone(bool ok); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/SerialStarterC.nc000066400000000000000000000035061207233610700225440ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ configuration SerialStarterC { } implementation { components SerialActiveMessageC, AutoStarterC; AutoStarterC.SplitControl -> SerialActiveMessageC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/StatsCollector.nc000066400000000000000000000042541207233610700226230ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ interface StatsCollector { command void stopStatsCollector(); command void startStatsCollector(); command void startPubPktTransTime(); command void endPubPktTransTime(); command void startRecvPageTransTime(uint8_t channel); command void endRecvPageTransTime(uint8_t senderAddr); command void incPub_numPktRetrans(); command void incNumRecvHSRetrans(); command void startCCTime(); command void endCCTime(); command void sendVariableReport(uint32_t value); command void msg_bcastReq(); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/StatsCollectorC.nc000066400000000000000000000047441207233610700227320ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ configuration StatsCollectorC { provides { interface StatsCollector; } } implementation { components GlobalsC, StatsCollectorP, new CounterToLocalTimeC(TMilli), #ifdef TOSSIM HilTimerMilliC, #else new TransformCounterC(TMilli, uint32_t, T32khz, uint16_t, 5, uint32_t) as Transform, Msp430Counter32khzC, #endif new TimerMilliC() as Timer; #ifdef TOSSIM StatsCollectorP.LocalTime -> HilTimerMilliC; #else CounterToLocalTimeC.Counter -> Transform; Transform.CounterFrom -> Msp430Counter32khzC; StatsCollectorP.LocalTime -> CounterToLocalTimeC; #endif StatsCollectorP.Globals -> GlobalsC.Globals; StatsCollector = StatsCollectorP.StatsCollector; StatsCollectorP.Timer -> Timer; components SerialStarterC, new SerialAMSenderC(0); StatsCollectorP.AMSend -> SerialAMSenderC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/StatsCollectorP.nc000066400000000000000000000146761207233610700227540ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ module StatsCollectorP { provides { interface StatsCollector; } uses { interface LocalTime as LocalTime; interface Globals; interface Timer as Timer; interface AMSend; } } implementation { enum { TIMER = 0, FORCED_START = 1, FORCED_END = 2 }; enum { BROADCAST_REQ = 0, START_RECV_DATA = 1, END_RECV_DATA = 2 }; typedef nx_struct StatsReport { nx_uint8_t text[5]; nx_uint32_t NumPubPktTrans; nx_uint32_t NumRecvPageTrans; nx_uint32_t AvgPubPktTransTime; nx_uint32_t AvgRecvPageTransTime; nx_uint32_t NumPubPktRetrans; nx_uint32_t NumRecvHSRetrans; } StatsReport; typedef nx_struct StatusReport { nx_uint8_t text[5]; nx_uint8_t flag; nx_uint8_t channel; } StatusReport; typedef nx_struct VariableReport { nx_uint8_t text[5]; nx_uint32_t value; } VariableReport; uint32_t startPubTime = 0; uint32_t startRecvTime = 0; uint32_t startCCTime = 0; // Change channel message_t stats_msg; message_t status_msg; message_t variable_msg; void startTimer() { if(call Timer.isRunning() == FALSE || call Timer.isOneShot() == TRUE) { call Timer.startPeriodic(5000); } } void stopTimer() { if(call Timer.isRunning() == TRUE) { call Timer.stop(); } } void sendStatsReport() { StatsReport *report = (StatsReport *)call AMSend.getPayload(&stats_msg); report->text[0] = 's'; report->text[1] = 't'; report->text[2] = 'a'; report->text[3] = 't'; report->text[4] = 's'; report->NumPubPktTrans = call Globals.getNumPubPktTrans(); report->NumRecvPageTrans = call Globals.getNumRecvPageTrans(); report->AvgPubPktTransTime = call Globals.getAvgPubPktTransTime(); report->AvgRecvPageTransTime = call Globals.getAvgRecvPageTransTime(); report->NumPubPktRetrans = call Globals.getNumPubPktRetrans(); report->NumRecvHSRetrans = call Globals.getNumRecvHSRetrans(); call AMSend.send(AM_BROADCAST_ADDR, &stats_msg, sizeof(StatsReport)); } void sendStatusMsg(uint8_t flag, uint8_t channel) { StatusReport *report = (StatusReport *)call AMSend.getPayload(&status_msg); report->text[0] = 's'; report->text[1] = 't'; report->text[2] = 't'; report->text[3] = 'u'; report->text[4] = 's'; report->flag = flag; report->channel = channel; call AMSend.send(AM_BROADCAST_ADDR, &status_msg, sizeof(StatusReport)); } command void StatsCollector.sendVariableReport(uint32_t value) { VariableReport *report = (VariableReport *)call AMSend.getPayload(&variable_msg); report->text[0] = 'r'; report->text[1] = 'e'; report->text[2] = 'p'; report->text[3] = 'r'; report->text[4] = 't'; report->value = value; call AMSend.send(AM_BROADCAST_ADDR, &variable_msg, sizeof(VariableReport)); } command void StatsCollector.msg_bcastReq() { sendStatusMsg(BROADCAST_REQ, CC2420_DEF_CHANNEL); } event void Timer.fired() { sendStatsReport(); } event void AMSend.sendDone(message_t* pstats_msg, error_t error) { } command void StatsCollector.startStatsCollector() { startTimer(); } command void StatsCollector.stopStatsCollector() { stopTimer(); call Timer.startOneShot(500); //sendStatsReport(); // Just in case } command void StatsCollector.startPubPktTransTime() { startPubTime = call LocalTime.get(); } command void StatsCollector.endPubPktTransTime() { uint32_t diff = (call LocalTime.get()) - startPubTime; uint32_t temp = (call Globals.getAvgPubPktTransTime()) * (call Globals.getNumPubPktTrans()); call Globals.incNumPubPktTrans(); call Globals.setAvgPubPktTransTime((temp + diff) / (call Globals.getNumPubPktTrans())); } command void StatsCollector.startRecvPageTransTime(uint8_t channel) { startRecvTime = call LocalTime.get(); sendStatusMsg(START_RECV_DATA, channel); } command void StatsCollector.endRecvPageTransTime(uint8_t senderAddr) { uint32_t curTime = call LocalTime.get(); uint32_t temp = (call Globals.getAvgRecvPageTransTime()) * (call Globals.getNumRecvPageTrans()); call Globals.incNumRecvPageTrans(); call Globals.setAvgRecvPageTransTime((temp + (curTime - startRecvTime)) / (call Globals.getNumRecvPageTrans())); sendStatusMsg(END_RECV_DATA, senderAddr); } command void StatsCollector.incPub_numPktRetrans() { call Globals.incNumPubPktRetrans(); } command void StatsCollector.startCCTime() { startCCTime = call LocalTime.get(); } command void StatsCollector.endCCTime() { uint32_t diff = (call LocalTime.get()) - startCCTime; call StatsCollector.sendVariableReport(diff); } command void StatsCollector.incNumRecvHSRetrans() { call Globals.incNumRecvHSRetrans(); } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/StorageMap.nc000066400000000000000000000037331207233610700217210ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * An abstraction to map volume addresses to physical addresses. * * @author Jonathan Hui * @version $Revision: 1.1 $ $Date: 2008-01-25 00:50:15 $ */ interface StorageMap { /** * Get the physical address of a volume address. * * @param addr the volume addres. * @return the physical address. */ command storage_addr_t getPhysicalAddress( storage_addr_t addr ); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/000077500000000000000000000000001207233610700204525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/NetProg.h000066400000000000000000000040151207233610700222010ustar00rootroot00000000000000// $Id: NetProg.h,v 1.4 2010-06-29 22:07:47 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #ifndef __NETPROG_H__ #define __NETPROG_H__ #include "NetProg_platform.h" #ifndef IDENT_UID_HASH #define IDENT_UID_HASH 0 #endif static const uint32_t DELUGE_IMAGE_UID = IDENT_UID_HASH; /* typedef struct NetProg_TOSInfo { uint16_t addr; uint8_t groupId; uint16_t crc; } NetProg_TOSInfo; */ #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/NetProg.nc000066400000000000000000000045301207233610700223540ustar00rootroot00000000000000// $Id: NetProg.nc,v 1.4 2010-06-29 22:07:47 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Top level interface for network programming integration with * applications. * * @author Jonathan Hui */ interface NetProg { /** * Reboot the node. * * @return Does not return. */ command error_t reboot(); /** * Reboot into the image specified by imageAddr. This * assumes that an image is present into the external flash * at the imageAddr address. * * @param imageAddr Address in external flash * @return FAIL if the reboot command fails to * complete, does not return, otherwise. */ command error_t programImageAndReboot(uint32_t imageAddr); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/NetProgC.nc000066400000000000000000000047341207233610700224650ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * */ /** * @author Jonathan Hui * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ includes NetProg; includes TOSBoot; configuration NetProgC { provides { interface NetProg; } } implementation { components MainC, InternalFlashC as IFlash, CrcC; components NetProgM, ReprogramGuardC; NetProg = NetProgM; MainC.SoftwareInit -> NetProgM.Init; NetProgM.IFlash -> IFlash; NetProgM.Crc -> CrcC; NetProgM.ReprogramGuard -> ReprogramGuardC; components LedsC; NetProgM.Leds -> LedsC; components ActiveMessageAddressC; NetProgM.setAmAddress -> ActiveMessageAddressC; #if !defined(PLATFORM_TINYNODE) && !defined(PLATFORM_MULLE) components CC2420ControlP; NetProgM.CC2420Config -> CC2420ControlP; #endif } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/NetProgM.nc000066400000000000000000000100271207233610700224670ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * */ /** * @author Jonathan Hui * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "AM.h" module NetProgM { provides { interface NetProg; interface Init; } uses { interface InternalFlash as IFlash; interface Crc; interface Leds; #if !defined(PLATFORM_TINYNODE) && !defined(PLATFORM_MULLE) interface CC2420Config; #endif async command void setAmAddress(am_addr_t a); interface ReprogramGuard; } } implementation { uint32_t reprogramImgAddr; command error_t Init.init() { BootArgs bootArgs; call IFlash.read(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs)); // Update the local node ID if (bootArgs.address != 0xFFFF) { TOS_NODE_ID = bootArgs.address; call setAmAddress(bootArgs.address); } #if !defined(PLATFORM_TINYNODE) && !defined(PLATFORM_MULLE) call CC2420Config.setShortAddr(bootArgs.address); call CC2420Config.sync(); #endif return SUCCESS; } command error_t NetProg.reboot() { BootArgs bootArgs; atomic { call IFlash.read(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs)); if (bootArgs.address != TOS_NODE_ID) { bootArgs.address = TOS_NODE_ID; call IFlash.write(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs)); } netprog_reboot(); } return FAIL; } command error_t NetProg.programImageAndReboot(uint32_t imgAddr) { reprogramImgAddr = imgAddr; return call ReprogramGuard.okToProgram(); } event void ReprogramGuard.okToProgramDone(bool ok) { BootArgs bootArgs; if (!ok) { // The voltage is too low. Nothing to do. return; } atomic { call IFlash.read(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs)); bootArgs.imageAddr = reprogramImgAddr; bootArgs.gestureCount = 0xff; bootArgs.noReprogram = FALSE; bootArgs.address = TOS_NODE_ID; call IFlash.write(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs)); // reboot netprog_reboot(); } } #if !defined(PLATFORM_TINYNODE) && !defined(PLATFORM_MULLE) event void CC2420Config.syncDone(error_t error) {} #endif } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/TOSBoot.h000066400000000000000000000036371207233610700221250ustar00rootroot00000000000000// $Id: TOSBoot.h,v 1.3 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_H__ #define __TOSBOOT_H__ #include "TOSBoot_platform.h" typedef struct tosboot_args_t { uint32_t imageAddr; uint8_t gestureCount; bool noReprogram; } tosboot_args_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/avr/000077500000000000000000000000001207233610700212425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/avr/InternalFlashC.nc000066400000000000000000000045621207233610700244300ustar00rootroot00000000000000// $Id: InternalFlashC.nc,v 1.3 2010-06-29 22:07:47 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #include "InternalFlash.h" module InternalFlashC { provides interface InternalFlash; } implementation { command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) { uint8_t *addrPtr = (uint8_t*)addr; uint8_t *bufPtr = (uint8_t*)buf; for ( ; size; size-- ) eeprom_write_byte(addrPtr++, *bufPtr++); while(!eeprom_is_ready()); return SUCCESS; } command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) { uint8_t *addrPtr = (uint8_t*)addr; uint8_t *bufPtr = (uint8_t*)buf; for ( ; size; size-- ) *bufPtr++ = eeprom_read_byte(addrPtr++); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/epic/000077500000000000000000000000001207233610700213725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/epic/TOSBoot_platform.h000066400000000000000000000041501207233610700247400ustar00rootroot00000000000000// $Id: TOSBoot_platform.h,v 1.2 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_PLATFORM_H__ #define __TOSBOOT_PLATFORM_H__ enum { TOSBOOT_ARGS_ADDR = 0x70, // address of TOSBoot args in internal flash TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash TOSBOOT_INT_PAGE_SIZE = 512L, // size of each internal program flash page }; #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/iris/000077500000000000000000000000001207233610700214205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/iris/NetProgC.nc000066400000000000000000000043711207233610700234300ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * */ /** * @author Jonathan Hui * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ includes NetProg; includes TOSBoot; configuration NetProgC { provides { interface NetProg; } } implementation { components MainC, InternalFlashC as IFlash, CrcC, NetProgM; NetProg = NetProgM; MainC.SoftwareInit -> NetProgM.Init; NetProgM.IFlash -> IFlash; NetProgM.Crc -> CrcC; components LedsC; NetProgM.Leds -> LedsC; components ActiveMessageAddressC; NetProgM.setAmAddress -> ActiveMessageAddressC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/iris/NetProgM.nc000066400000000000000000000064011207233610700234360ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * */ /** * @author Jonathan Hui * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "AM.h" module NetProgM { provides { interface NetProg; interface Init; } uses { interface InternalFlash as IFlash; interface Crc; interface Leds; async command void setAmAddress(am_addr_t a); } } implementation { command error_t Init.init() { BootArgs bootArgs; call IFlash.read((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs)); // Update the local node ID if (bootArgs.address != 0xFFFF) { TOS_NODE_ID = bootArgs.address; call setAmAddress(bootArgs.address); } return SUCCESS; } command error_t NetProg.reboot() { BootArgs bootArgs; atomic { call IFlash.read((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs)); if (bootArgs.address != TOS_NODE_ID) { bootArgs.address = TOS_NODE_ID; call IFlash.write((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs)); } netprog_reboot(); } return FAIL; } command error_t NetProg.programImageAndReboot(uint32_t imgAddr) { BootArgs bootArgs; atomic { call IFlash.read((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs)); bootArgs.imageAddr = imgAddr; bootArgs.gestureCount = 0xff; bootArgs.noReprogram = FALSE; bootArgs.address = TOS_NODE_ID; call IFlash.write((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs)); // reboot netprog_reboot(); } // couldn't reboot return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/000077500000000000000000000000001207233610700213665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/62p/000077500000000000000000000000001207233610700217755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/62p/HplM16c60FlashC.nc000066400000000000000000000210041207233610700247150ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "M16c62pFlash.h" #include "iom16c62p.h" /** * Implementation of the HplM16c60Flash interface for M16c/62p. Note that this module * should be used with caution so that one doesn't erase the flash where the * executing program lies. * * @author Henrik Makitaavola * @author Renesas */ // TODO(henrik) This implementation expects a main clock speed <=10 MHz, fix it. module HplM16c60FlashC { provides interface HplM16c60Flash; } implementation { // Defines an array of highest even addresses for each block const unsigned long block_addresses[14] = {0xFFFFE,0xFEFFE,0xFDFFE,0xFBFFE,0xF9FFE,0xF7FFE,0xEFFFE,0xDFFFE,0xCFFFE, 0xBFFFE,0xAFFFE,0x9FFFE,0x8FFFE,0xFFFE }; unsigned char cm0_saved; // For saving the Clock Mode 0 register unsigned char cm1_saved; // For saving the Clock Mode 1 register unsigned char pm0_saved; // For saving the Processor Mode 0 register unsigned char pm1_saved; // For saving the Processor Mode 1 register unsigned char prcr_saved; // Save Protection register /** * Sets the processor mode for programming flash and saves current * settings to restore later. You cannot run the processor faster * than 10.0 MHz (with wait state) or 6.25MHz (without wait state) * when sending commands to the flash controller. */ void slowMCUClock(void) { // Unprotect registers CM0 and CM1 and PM0 registers by writting to protection register prcr_saved = *((char *)0xA); // Save Protection register *((char *)0xA) = 3; // Allow writting to protected system registers // Force to Single chip mode for processors that have memory expansion mode pm0_saved = *((char *)0x4); // Save pm0 register *((char *)0x4) = pm0_saved & 0xFC; // bit 0 and 1 to zero cm0_saved = *((char *)0x6); // Save cm0 register cm1_saved = *((char *)0x7); // Save cm1 register pm1_saved = *((char *)0x5); // Save pm1 register // Insert Wait state for all bus access (needed for talking to the // internal flash controller) asm("BSET 7,0x05"); // Set bit PM17 CM0.BYTE = 0; CM1.BYTE = 0; } /** * Restores the processor mode back to original settings. */ void restoreMCUClock(void) { *((char *)0x4) = pm0_saved; // Restore pm0 register /* Clock settings for R8C and M16C */ *((char *)0x7) = cm1_saved; // Restore cm1 register *((char *)0x6) = cm0_saved; // Restore cm0 register *((char *)0x5) = pm1_saved; // Restore pm1 register *((char *)0xA) = prcr_saved; // Protection back on } /** * Disable and enable interrups macros. A call to * disableInterrupt must be followed by a call to RestoreInterrupt. */ #define disableInterrupt() \ { \ __nesc_atomic_t flg_saved; \ asm volatile ("stc flg, %0": "=r"(flg_saved): : "%flg"); \ asm("fclr i"); \ asm volatile("" : : : "memory"); #define restoreInterrupt() \ asm volatile("" : : : "memory"); \ asm volatile ("ldc %0, flg": : "r"(flg_saved): "%flg"); \ } void clearStatus(unsigned long addr) { unsigned int low = (unsigned int) addr; unsigned int high = (unsigned int)( addr >> 16); asm volatile ( "mov.w #0x0050, r3\n\t" "ste.w r3, [a1a0]\n\t" : : "Ra0"(low), "Ra1"(high) : "memory", "r3"); } bool writeWord(unsigned long addr, unsigned int word) { unsigned int low = (unsigned int) addr; unsigned int high = (unsigned int)( addr >> 16); asm volatile ( "mov.w #0x0040, r3\n\t" // Send write command "ste.w r3, [a1a0]\n\t" "ste.w %[data], [a1a0]\n\t" : :"Ra0"(low), "Ra1" (high), [data] "r" (word) : "memory", "r3"); return !FMR0.BIT.FMR06; } command error_t HplM16c60Flash.erase( unsigned char block ) { unsigned int low = (unsigned int) block_addresses[ block ]; unsigned int high = (unsigned int)( block_addresses[ block ] >> 16); // Must change main clock speed to meet flash requirements disableInterrupt(); slowMCUClock(); FMR0.BIT.FMR01 = 0; FMR0.BIT.FMR01 = 1; FMR1.BIT.FMR11 = 0; FMR1.BIT.FMR11 = 1; FMR0.BIT.FMR02 = 0; FMR0.BIT.FMR02 = 1; asm volatile ( "mov.w #0x0050, r3\n\t" // Clear status register "ste.w r3, [a1a0]\n\t" "mov.w #0x0020, r3\n\t" // Block Erase 1(2) "ste.w r3, [a1a0]\n\t" "mov.w #0x00D0, r3\n\t" // Block Erase 2(2) "ste.w r3, [a1a0]\n\t" : : "Ra0"(low), "Ra1"(high) : "memory", "r3"); // Note: In EW1 Mode, the MCU is suspended until the operation is completed. while (!FMR0.BIT.FMR00); // Disable CPU rewriting commands by clearing EW entry bit. FMR0.BYTE = 0; restoreMCUClock(); // Restore clock back to original speed restoreInterrupt(); if( FMR0.BIT.FMR07) // Erasing error? { return FAIL; // Erase Fail } return SUCCESS; // Erase Pass } command uint8_t HplM16c60Flash.write( unsigned long flash_addr, unsigned int * buffer_addr, unsigned int bytes) { error_t ret_value = SUCCESS; unsigned int i; // Check for odd number of bytes &c heck for odd address if( bytes & 1 || (int)flash_addr & 1) return EINVAL; // ERROR!! You must always pass an even number of bytes. disableInterrupt(); // Must change main clock speed to meet flash requirements slowMCUClock(); FMR0.BIT.FMR01 = 0; FMR0.BIT.FMR01 = 1; FMR1.BIT.FMR11 = 0; FMR1.BIT.FMR11 = 1; FMR0.BIT.FMR02 = 0; FMR0.BIT.FMR02 = 1; // Clear status register clearStatus(flash_addr); for (i = 0; i < (bytes >> 1); ++i) { // Write to the flash sequencer by writing to that area of flash memory if (!writeWord(flash_addr, buffer_addr[i])) { uint8_t j; bool fail = 1; clearStatus(flash_addr); for (j = 0; j < 3; ++j) { if (writeWord(flash_addr, buffer_addr[i])) { fail = 0; break; } } if (fail) { ret_value = FAIL; // Signal that we had got an error break; // Break out of for loop } } flash_addr += 2; // Advance to next flash write address } // Disable CPU rewriting commands by clearing EW entry bit FMR0.BYTE = 0; restoreMCUClock(); // Restore clock back to original speed restoreInterrupt(); return ret_value; // Return Pass/Fail } command uint8_t HplM16c60Flash.read(unsigned long address) { unsigned int low = (unsigned int)(address); unsigned int high = (unsigned int)(address >> 16); unsigned int data; disableInterrupt(); asm volatile ( "mov.w #0x00FF, r3\n\t" // Read Array Command, once is enough but to be certain that // a Read Array Command has been executed do it before every // read for now. "ste.w r3, [a1a0]\n\t" "lde.w [a1a0], %[data]" :[data] "=r" (data) :"Ra0"(low), "Ra1"(high) : "memory", "r3"); restoreInterrupt(); return data; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/62p/InternalFlashC.nc000066400000000000000000000040031207233610700251510ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring so that the M16c/62p InternalFlashP module gets access to the * HplM16c60FlashC module. * * @author Henrik Makitaavola */ #include "M16c62pFlash.h" configuration InternalFlashC { provides interface InternalFlash; } implementation { components HplM16c60FlashC, new InternalFlashP(M16C62P_BLOCK_2, M16C62P_BLOCK_3); InternalFlashP.Flash -> HplM16c60FlashC; InternalFlash = InternalFlashP; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/62p/InternalFlashP.nc000066400000000000000000000154751207233610700252050ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "M16c62pFlash.h" /** * Implementation of the InternalFlash interface for the * M16c/62p mcu to be used as the TOSBoot arguments storage. * * The implementation uses 2 flash blocks to store the arguments into. First one * block is filled up or written to until a error occurs. After that the second block * will be written to. Everytime the start address of one block is written to the * otherone will be erased. If a erase is not executed due to powerdown or some other * error a erase command will be executed on that block the next time. * * A argument writing is surrounded by two 0x1 bytes: * 0x1 [arguments data] 0x1. The first byte indicating a new TOSBoot argument entry * and the last one indicating a successfull write of a TOSBoot argument to the flash. * * @author Henrik Makitaavola */ generic module InternalFlashP(M16C62P_BLOCK block1, M16C62P_BLOCK block2) { provides interface InternalFlash; uses interface HplM16c60Flash as Flash; } implementation { #define INTERNAL_ADDRESS_1 m16c62p_block_start_addresses[block1] #define INTERNAL_ADDRESS_1_END m16c62p_block_end_addresses[block1] #define INTERNAL_ADDRESS_2 m16c62p_block_start_addresses[block2] #define INTERNAL_ADDRESS_2_END m16c62p_block_end_addresses[block2] #define INTERNAL_BLOCK_1 block1 #define INTERNAL_BLOCK_2 block2 error_t sanityCheck(uint16_t size) { if (call Flash.read(INTERNAL_ADDRESS_1) != 0xff && call Flash.read(INTERNAL_ADDRESS_2) != 0xff) { // Something happened last time we wrote with a erase command // that should have been executet or failed. if (call Flash.read(INTERNAL_ADDRESS_1+size+2) != 0x1) { if (call Flash.read(INTERNAL_ADDRESS_1+size+1) == 0x1) { return call Flash.erase(INTERNAL_BLOCK_2); } else { return call Flash.erase(INTERNAL_BLOCK_1); } } else { if (call Flash.read(INTERNAL_ADDRESS_2+size+1) == 0x1) { return call Flash.erase(INTERNAL_BLOCK_1); } else { return call Flash.erase(INTERNAL_BLOCK_2); } } } return SUCCESS; } error_t writableAddressInBlock(unsigned long start, unsigned long end, uint16_t size, unsigned long* address) { for(; (start < end) && (start+size < end); start += (unsigned long)size) { if (call Flash.read(start) == 0xFF) { if (call Flash.read(start-1) != 0x1) { return FAIL; } *address = start; return SUCCESS; } } return FAIL; } unsigned long writableAddress(uint16_t size) { if (call Flash.read(INTERNAL_ADDRESS_1) == 0xFF) { if (call Flash.read(INTERNAL_ADDRESS_2) == 0xFF) { return INTERNAL_ADDRESS_1; } else { unsigned long address; if (writableAddressInBlock(INTERNAL_ADDRESS_2, INTERNAL_ADDRESS_2_END, size+2, &address) == SUCCESS) { return address; } return INTERNAL_ADDRESS_1; } } else { unsigned long address; if (writableAddressInBlock(INTERNAL_ADDRESS_1, INTERNAL_ADDRESS_1_END, size+2, &address) == SUCCESS) { return address; } return INTERNAL_ADDRESS_2; } } command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) { uint8_t wbuf[sizeof(BootArgs)+2]; unsigned long address; if (sanityCheck(size) != SUCCESS) { return FAIL; } wbuf[0] = 0x1; wbuf[size+1] = 0x1; memcpy(wbuf+1, buf, size); address = writableAddress(size); if (call Flash.write(address, (unsigned int*)wbuf, size+2) != 0) { return FAIL; } if (address == INTERNAL_ADDRESS_1) { return call Flash.erase(INTERNAL_BLOCK_2); } else if (address == INTERNAL_ADDRESS_2) { return call Flash.erase(INTERNAL_BLOCK_1); } return SUCCESS; } void readFromFlash(unsigned long address, uint8_t* buf, uint16_t size) { uint16_t i; for (i = 0; i < size; ++i, ++address) { buf[i] = call Flash.read(address); } } void readFromBlock(unsigned long start, unsigned long end, uint8_t *buffer, uint16_t size) { unsigned long address = start; for (; address < end; address += 2 + size) { if (call Flash.read(address) != 0x1) { break; } } for (; address > start; address -= size + 2) { if(call Flash.read(address+size+1) == 0x1) { break; } } if(call Flash.read(address+size+1) == 0x1) { address++; readFromFlash(address, buffer, size); } else { memset(buffer, 0xff, size); } } command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) { uint8_t* buffer = (uint8_t*)buf; if (sanityCheck(size) != SUCCESS) { return FAIL; } if (call Flash.read(INTERNAL_ADDRESS_1) == 0xFF) { if (call Flash.read(INTERNAL_ADDRESS_2) == 0xFF) { memset(buf, 0xff, size); } else { readFromBlock(INTERNAL_ADDRESS_2, INTERNAL_ADDRESS_2_END, buffer, size); } } else { readFromBlock(INTERNAL_ADDRESS_1, INTERNAL_ADDRESS_1_END, buffer, size); } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/62p/M16c62pFlash.h000066400000000000000000000056021207233610700241650ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Defines for the program flash blocks on the M16c/62p. * * @author Henrik Makitaavola * @author Renesas */ #ifndef __M16C62PFLASH_H__ #define __M16C62PFLASH_H__ // User Block Area typedef enum { M16C62P_BLOCK_0 = 0, // 4KB: 0xFF000 - 0xFFFFF M16C62P_BLOCK_1 = 1, // 4KB: 0xFE000 - 0xFEFFF M16C62P_BLOCK_2 = 2, // 8KB: 0xFC000 - 0xFDFFF M16C62P_BLOCK_3 = 3, // 8KB: 0xFA000 - 0xFBFFF M16C62P_BLOCK_4 = 4, // 8KB: 0xF8000 - 0xF9FFF M16C62P_BLOCK_5 = 5, // 32KB: 0xF0000 - 0xF7FFF M16C62P_BLOCK_6 = 6, // 64KB: 0xE0000 - 0xEFFFF M16C62P_BLOCK_7 = 7, // 64KB: 0xD0000 - 0xDFFFF M16C62P_BLOCK_8 = 8, // 64KB: 0xC0000 - 0xCFFFF M16C62P_BLOCK_9 = 9, // 64KB: 0xB0000 - 0xBFFFF M16C62P_BLOCK_10 = 10, // 64KB: 0xA0000 - 0xAFFFF M16C62P_BLOCK_11 = 11, // 64KB: 0x90000 - 0x9FFFF M16C62P_BLOCK_12 = 12, // 64KB: 0x80000 - 0x8FFFF // Data Block Area M16C62P_BLOCK_A = 13 // 4KB: F000 - FFFF } M16C62P_BLOCK; const unsigned long m16c62p_block_start_addresses[14] = {0xFF000,0xFE000,0xFC000,0xFA000,0xF8000,0xF0000,0xE0000,0xD0000,0xC0000, 0xB0000,0xA0000,0x90000,0x80000,0xF000 }; const unsigned long m16c62p_block_end_addresses[14] = {0xFFFFF,0xFEFFF,0xFDFFF,0xFBFFF,0xF9FFF,0xF7FFF,0xEFFFF,0xDFFFF,0xCFFFF, 0xBFFFF,0xAFFFF,0x9FFFF,0x8FFFF,0xFFFF }; #endif // __M16C62PFLASH_H__ tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/65/000077500000000000000000000000001207233610700216205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/65/HplM16c60FlashC.nc000066400000000000000000000216031207233610700245450ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the HplM16c60Flash interface. Note that this module * should be used with caution so that one doesn't erase the flash where the * executing program lies. * * @author Henrik Makitaavola * @author Renesas */ #include "M16c65Flash.h" #include "iom16c65.h" // TODO(henrik) This implementation expects a main clock speed <=10 MHz, fix it. module HplM16c60FlashC { provides interface HplM16c60Flash; } implementation { // Defines an array of highest even addresses for each block const unsigned long block_addresses[8] = {0xFFFFE,0xEFFFE,0xDFFFE,0xCFFFE,0xBFFFE,0xAFFFE,0x9FFFE,0x8FFFE}; unsigned char cm0_saved; // For saving the Clock Mode 0 register unsigned char cm1_saved; // For saving the Clock Mode 1 register unsigned char pm0_saved; // For saving the Processor Mode 0 register unsigned char pm1_saved; // For saving the Processor Mode 1 register unsigned char prcr_saved; // Save Protection register /** * Sets the processor mode for programming flash and saves current * settings to restore later. You cannot run the processor faster * than 10.0 MHz (with wait state) or 6.25MHz (without wait state) * when sending commands to the flash controller. */ void slowMCUClock(void) { // Unprotect registers CM0 and CM1 and PM0 registers by writting to protection register prcr_saved = PRCR.BYTE; // Save Protection register PRCR.BYTE = 3; // Allow writting to protected system registers // Force to Single chip mode for processors that have memory expansion mode pm0_saved = PM0.BYTE; // Save pm0 register PM0.BYTE = pm0_saved & 0xFC; // bit 0 and 1 to zero cm0_saved = CM0.BYTE; // Save cm0 register cm1_saved = CM1.BYTE; // Save cm1 register pm1_saved = PM1.BYTE; // Save pm1 register // Insert Wait state for all bus access (needed for talking to the // internal flash controller) PM1.BYTE = PM1.BYTE | 0x80; // Set bit PM17 //CM0.BYTE = 0; //CM1.BYTE = 0; } /** * Restores the processor mode back to original settings. */ void restoreMCUClock(void) { PM0.BYTE = pm0_saved; // Restore pm0 register /* Clock settings for R8C and M16C */ CM1.BYTE = cm1_saved; // Restore cm1 register CM0.BYTE = cm0_saved; // Restore cm0 register PM1.BYTE = pm1_saved; // Restore pm1 register PRCR.BYTE = prcr_saved; // Protection back on } /** * Disable and enable interrups macros. A call to * disableInterrupt must be followed by a call to RestoreInterrupt. */ #define disableInterrupt() \ { \ __nesc_atomic_t flg_saved; \ asm volatile ("stc flg, %0": "=r"(flg_saved): : "%flg"); \ asm("fclr i"); \ asm volatile("" : : : "memory"); #define restoreInterrupt() \ asm volatile("" : : : "memory"); \ asm volatile ("ldc %0, flg": : "r"(flg_saved): "%flg"); \ } void clearStatus(unsigned long addr) { unsigned int low = (unsigned int) addr; unsigned int high = (unsigned int)( addr >> 16); asm volatile ( "mov.w #0x0050, r3\n\t" "ste.w r3, [a1a0]\n\t" : : "Ra0"(low), "Ra1"(high) : "memory", "r3"); } bool writeWords(unsigned long addr, unsigned int word, unsigned int word2) { unsigned int low = (unsigned int) addr; unsigned int high = (unsigned int)( addr >> 16); unsigned int i = 0; for (i = 0; i < 3; ++i) { asm volatile ( "mov.w #0x0041, r3\n\t" // Send write command "ste.w r3, [a1a0]\n\t" "ste.w %[data], [a1a0]\n\t" "ste.w %[data2], [a1a0]\n\t" : :"Ra0"(low), "Ra1" (high), [data] "r" (word), [data2] "r" (word2) : "memory", "r3"); if (!FMR0.BIT.FMR06) { break; } clearStatus(addr); i++; } return !FMR0.BIT.FMR06; } command error_t HplM16c60Flash.erase( unsigned char block ) { unsigned int low = (unsigned int) block_addresses[ block ]; unsigned int high = (unsigned int)( block_addresses[ block ] >> 16); // Must change main clock speed to meet flash requirements disableInterrupt(); slowMCUClock(); FMR0.BIT.FMR01 = 0; FMR0.BIT.FMR01 = 1; FMR1.BIT.FMR11 = 0; FMR1.BIT.FMR11 = 1; FMR6.BYTE = 3; FMR1.BIT.FMR11 = 0; FMR0.BIT.FMR02 = 0; FMR0.BIT.FMR02 = 1; asm volatile ( "mov.w #0x0050, r3\n\t" // Clear status register "ste.w r3, [a1a0]\n\t" "mov.w #0x0020, r3\n\t" // Block Erase 1(2) "ste.w r3, [a1a0]\n\t" "mov.w #0x00D0, r3\n\t" // Block Erase 2(2) "ste.w r3, [a1a0]\n\t" : : "Ra0"(low), "Ra1"(high) : "memory", "r3"); // Note: In EW1 Mode, the MCU is suspended until the operation is completed. while (!FMR0.BIT.FMR00); // Disable CPU rewriting commands by clearing EW entry bit. FMR0.BYTE = 0; restoreMCUClock(); // Restore clock back to original speed restoreInterrupt(); if( FMR0.BIT.FMR07) // Erasing error? { return FAIL; // Erase Fail } return SUCCESS; // Erase Pass } command uint8_t HplM16c60Flash.write( unsigned long flash_addr, unsigned int * buffer_addr, unsigned int bytes) { error_t ret_value = SUCCESS; unsigned int i; unsigned long flash_addr_start = flash_addr; uint8_t* buf = (uint8_t*)buffer_addr; // Check for odd number of bytes & check for odd address if( bytes & 0x3 || (int)flash_addr & 0x3) return EINVAL; // ERROR!! You must always pass an even number of bytes. disableInterrupt(); // Must change main clock speed to meet flash requirements slowMCUClock(); FMR0.BIT.FMR01 = 0; FMR0.BIT.FMR01 = 1; FMR1.BIT.FMR11 = 0; FMR1.BIT.FMR11 = 1; FMR6.BYTE = 3; FMR1.BIT.FMR11 = 0; FMR0.BIT.FMR02 = 0; FMR0.BIT.FMR02 = 1; // Clear status register clearStatus(flash_addr); for (i = 0; i < (bytes >> 1); i += 2) { // Write to the flash sequencer by writing to that area of flash memory // The 65 series writes 4 bytes in each sequence. if (!writeWords(flash_addr, buffer_addr[i], buffer_addr[i+1])) { ret_value = FAIL; // Signal that we had got an error break; // Break out of for loop } flash_addr += 4; // Advance to next flash write address } // Disable CPU rewriting commands by clearing EW entry bit FMR0.BYTE = 0; restoreMCUClock(); // Restore clock back to original speed restoreInterrupt(); if (ret_value == SUCCESS) { // Do a readback to verify the content written for (i = 0; i < bytes; ++i) { if (call HplM16c60Flash.read(flash_addr_start + (unsigned long)i) != buf[i]) { return FAIL; } } } return ret_value; // Return Pass/Fail } command uint8_t HplM16c60Flash.read(unsigned long address) { unsigned int low = (unsigned int)(address); unsigned int high = (unsigned int)(address >> 16); unsigned int data; disableInterrupt(); asm volatile ( "mov.w #0x00FF, r3\n\t" // Read Array Command, once is enough but to be certain that // a Read Array Command has been executed do it before every // read for now. "ste.w r3, [a1a0]\n\t" "lde.w [a1a0], %[data]" :[data] "=r" (data) :"Ra0"(low), "Ra1"(high) : "memory", "r3"); restoreInterrupt(); return data; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/65/InternalFlashC.nc000066400000000000000000000037771207233610700250150ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring so that the M16c/65 InternalFlashP module gets access to the * HplM16c60FlashC module. * * @author Henrik Makitaavola */ #include "M16c65Flash.h" configuration InternalFlashC { provides interface InternalFlash; } implementation { components HplM16c60FlashC, new InternalFlashP(M16C65_BLOCK_1, M16C65_BLOCK_2); InternalFlashP.Flash -> HplM16c60FlashC; InternalFlash = InternalFlashP; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/65/InternalFlashP.nc000066400000000000000000000164341207233610700250240ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the InternalFlash interface for the * M16c/65 mcu to be used as the TOSBoot arguments storage. * * The implementation uses 2 flash blocks to store the arguments into. First one * block is filled up or written to until a error occurs. After that the second block * will be written to. Everytime the start address of one block is written to the * otherone will be erased. If a erase is not executed due to powerdown or some other * error a erase command will be executed on that block the next time. * * A argument writing is surrounded by two 0x1 bytes: * 0x1 [arguments data] 0x1. The first byte indicating a new TOSBoot argument entry * and the last one indicating a successfull write of a TOSBoot argument to the flash. * * @author Henrik Makitaavola */ #include "M16c65Flash.h" generic module InternalFlashP(M16C65_BLOCK block1, M16C65_BLOCK block2) { provides interface InternalFlash; uses interface HplM16c60Flash as Flash; } implementation { #define INTERNAL_ADDRESS_1 m16c65_block_start_addresses[block1] #define INTERNAL_ADDRESS_1_END m16c65_block_end_addresses[block1] #define INTERNAL_ADDRESS_2 m16c65_block_start_addresses[block2] #define INTERNAL_ADDRESS_2_END m16c65_block_end_addresses[block2] #define INTERNAL_BLOCK_1 block1 #define INTERNAL_BLOCK_2 block2 error_t sanityCheck(uint16_t size) { if (call Flash.read(INTERNAL_ADDRESS_1) != 0xff && call Flash.read(INTERNAL_ADDRESS_2) != 0xff) { // Something happened last time we wrote with a erase command // that should have been executet or failed. if (call Flash.read(INTERNAL_ADDRESS_1+size+2) != 0x1) { if (call Flash.read(INTERNAL_ADDRESS_1+size+1) == 0x1) { return call Flash.erase(INTERNAL_BLOCK_2); } else { return call Flash.erase(INTERNAL_BLOCK_1); } } else { if (call Flash.read(INTERNAL_ADDRESS_2+size+1) == 0x1) { return call Flash.erase(INTERNAL_BLOCK_1); } else { return call Flash.erase(INTERNAL_BLOCK_2); } } } return SUCCESS; } error_t writableAddressInBlock(unsigned long start, unsigned long end, uint16_t size, unsigned long* address) { for(; (start < end) && (start+size < end); start += (unsigned long)size) { if (call Flash.read(start) == 0xFF) { if (call Flash.read(start-1) != 0x1) { return FAIL; } *address = start; return SUCCESS; } } return FAIL; } unsigned long writableAddress(uint16_t size) { if (call Flash.read(INTERNAL_ADDRESS_1) == 0xFF) { if (call Flash.read(INTERNAL_ADDRESS_2) == 0xFF) { return INTERNAL_ADDRESS_1; } else { unsigned long address; if (writableAddressInBlock(INTERNAL_ADDRESS_2, INTERNAL_ADDRESS_2_END, size+2, &address) == SUCCESS) { return address; } return INTERNAL_ADDRESS_1; } } else { unsigned long address; if (writableAddressInBlock(INTERNAL_ADDRESS_1, INTERNAL_ADDRESS_1_END, size+2, &address) == SUCCESS) { return address; } return INTERNAL_ADDRESS_2; } } command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) { uint8_t wbuf[22+2]; unsigned long address; uint16_t write_size = size+2; memset(wbuf, 0x00, 24); // Pad the size to be dividable by 4. if (write_size & 0x3) { write_size += 4 - (write_size & 0x3); } write_size -= 2; if (sanityCheck(write_size) != SUCCESS) { return FAIL; } wbuf[0] = 0x1; wbuf[write_size+1] = 0x1; memcpy(wbuf+1, buf, size); address = writableAddress(write_size); if (call Flash.write(address, (unsigned int*)wbuf, write_size+2) != 0) { return FAIL; } if (address == INTERNAL_ADDRESS_1) { return call Flash.erase(INTERNAL_BLOCK_2); } else if (address == INTERNAL_ADDRESS_2) { return call Flash.erase(INTERNAL_BLOCK_1); } return SUCCESS; } void readFromFlash(unsigned long address, uint8_t* buf, uint16_t size) { uint16_t i; for (i = 0; i < size; ++i, ++address) { buf[i] = call Flash.read(address); } } void readFromBlock(unsigned long start, unsigned long end, uint8_t *buffer, uint16_t size, uint16_t section_size) { unsigned long address = start; for (; address < end; address += 2 + section_size) { if (call Flash.read(address) != 0x1) { break; } } for (; address > start; address -= section_size + 2) { if(call Flash.read(address+section_size+1) == 0x1) { break; } } if(call Flash.read(address+section_size+1) == 0x1) { address++; readFromFlash(address, buffer, size); } else { memset(buffer, 0xff, size); } } command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) { uint8_t* buffer = (uint8_t*)buf; uint16_t read_size = size+2; // Pad the size to be dividable by 4. if (read_size & 0x3) { read_size += 4 - (read_size & 0x3); } read_size -= 2; if (sanityCheck(read_size) != SUCCESS) { return FAIL; } if (call Flash.read(INTERNAL_ADDRESS_1) == 0xFF) { if (call Flash.read(INTERNAL_ADDRESS_2) == 0xFF) { memset(buf, 0xff, size); } else { readFromBlock(INTERNAL_ADDRESS_2, INTERNAL_ADDRESS_2_END, buffer, size, read_size); } } else { readFromBlock(INTERNAL_ADDRESS_1, INTERNAL_ADDRESS_1_END, buffer, size, read_size); } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/65/M16c65Flash.h000066400000000000000000000050161207233610700236320ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Defines for the program flash blocks for M16c/65. * * @author Henrik Makitaavola * @author Renesas */ #ifndef __M16C65FLASH_H__ #define __M16C65FLASH_H__ // User Block Area typedef enum { M16C65_BLOCK_0 = 0, // 64KB: 0xF0000 - 0xFFFFF M16C65_BLOCK_1 = 1, // 64KB: 0xE0000 - 0xEFFFF M16C65_BLOCK_2 = 2, // 64KB: 0xD0000 - 0xDFFFF M16C65_BLOCK_3 = 3, // 64KB: 0xC0000 - 0xCFFFF M16C65_BLOCK_4 = 4, // 64KB: 0xB0000 - 0xBFFFF M16C65_BLOCK_5 = 5, // 64KB: 0xA0000 - 0xAFFFF M16C65_BLOCK_6 = 6, // 64KB: 0x90000 - 0x9FFFF M16C65_BLOCK_7 = 7, // 64KB: 0x80000 - 0x8FFFF // Data Block Area M16C65_BLOCK_A = 13 // 4KB: F000 - FFFF } M16C65_BLOCK; const unsigned long m16c65_block_start_addresses[8] = {0xF0000,0xE0000,0xD0000,0xC0000,0xB0000,0xA0000,0x90000,0x80000 }; const unsigned long m16c65_block_end_addresses[8] = {0xFFFFF,0xEFFFF,0xDFFFF,0xCFFFF,0xBFFFF,0xAFFFF,0x9FFFF,0x8FFFF }; #endif // __M16C65FLASH_H__ tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/m16c60/HplM16c60Flash.nc000066400000000000000000000055131207233610700242120ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to access the program flash of a M16c/60 mcu. * * @author Henrik Makitaavola */ interface HplM16c60Flash { /** * Erases a block in the program flash. * * @param block The block that should be erased. * @return SUCCESS if the erase succeeded without errors else FAIL. */ command error_t erase(unsigned char block); /** * Writes bytes into the program flash. * * @param flash_addr The program flash address where the write should begin. This MUST be an EVEN address. * @param buffer_addr The bytes that should be written to the address. * @param bytes The number of bytes that should be written. This MUST be an EVEN number. * @return FAIL if the flash control reported an error. EINVAL if the parameters that where passed contained an error * if everything went ok it returns SUCCESS. */ command error_t write(unsigned long flash_addr_in, unsigned int* buffer_addr, unsigned int bytes); /** * Reads the byte at am address using a LDE instruction. * * @param address The address that a byte should be read from. * @return Byte read. */ command uint8_t read(unsigned long flash_addr_in); } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/mica2/000077500000000000000000000000001207233610700214455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/mica2/NetProg_platform.h000066400000000000000000000036471207233610700251120ustar00rootroot00000000000000// $Id: NetProg_platform.h,v 1.5 2010-06-29 22:07:47 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #ifndef __NETPROG_PLATFORM_H__ #define __NETPROG_PLATFORM_H__ void netprog_reboot() { wdt_enable(1); while(1); } #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/micaz/000077500000000000000000000000001207233610700215555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/micaz/InternalFlash.h000066400000000000000000000037721207233610700244710ustar00rootroot00000000000000// $Id: InternalFlash.h,v 1.3 2010-06-29 22:07:47 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * InternalFlash.h - Internal flash implementation for the avr * platform. * * Valid address range is 0x0 - 0xFFF. * * @author Jonathan Hui */ #ifndef __INTERNAL_FLASH_H__ #define __INTERNAL_FLASH_H__ #include #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/micaz/ReprogramGuardC.nc000066400000000000000000000003441207233610700251240ustar00rootroot00000000000000configuration ReprogramGuardC { provides interface ReprogramGuard; } implementation { components ReprogramGuardP; components new VoltageC(); ReprogramGuard = ReprogramGuardP; ReprogramGuardP.Voltage -> VoltageC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/micaz/ReprogramGuardP.nc000066400000000000000000000006321207233610700251410ustar00rootroot00000000000000module ReprogramGuardP { provides interface ReprogramGuard; uses interface Read as Voltage; } implementation { enum { VTHRESH = 0x1CF, // 2.7V }; command error_t ReprogramGuard.okToProgram() { return call Voltage.read(); } event void Voltage.readDone(error_t result, uint16_t val) { signal ReprogramGuard.okToProgramDone(result == SUCCESS && val < VTHRESH); } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/micaz/TOSBoot_platform.h000066400000000000000000000042641207233610700251310ustar00rootroot00000000000000// $Id: TOSBoot_platform.h,v 1.4 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_PLATFORM_H__ #define __TOSBOOT_PLATFORM_H__ enum { TOSBOOT_ARGS_ADDR = 0xff0, // address of TOSBoot args in internal flash TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash TOSBOOT_INT_PAGE_SIZE = SPM_PAGESIZE, // size of each internal program flash page }; #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/msp430/000077500000000000000000000000001207233610700215005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/msp430/InternalFlashC.nc000066400000000000000000000077071207233610700246720ustar00rootroot00000000000000// $Id: InternalFlashC.nc,v 1.4 2010-06-29 22:07:48 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * InternalFlashC.nc - Internal flash implementation for telos msp * platform. On the msp, the flash must first be erased before a value * can be written. However, the msp can only erase the flash at a * segment granularity (128 bytes for the information section). This * module allows transparent read/write of individual bytes to the * information section by dynamically switching between the two * provided segments in the information section. * * Valid address range is 0x1000 - 0x107E (0x107F is used to store the * version number of the information segment). * * @author Jonathan Hui */ module InternalFlashC { provides interface InternalFlash; } implementation { enum { IFLASH_OFFSET = 0x1000, IFLASH_SIZE = 128, IFLASH_SEG0_VNUM_ADDR = 0x107f, IFLASH_SEG1_VNUM_ADDR = 0x10ff, IFLASH_INVALID_VNUM = -1, }; uint8_t chooseSegment() { int8_t vnum0 = *(int8_t*)IFLASH_SEG0_VNUM_ADDR; int8_t vnum1 = *(int8_t*)IFLASH_SEG1_VNUM_ADDR; if (vnum0 == IFLASH_INVALID_VNUM) return 1; else if (vnum1 == IFLASH_INVALID_VNUM) return 0; return ( (int8_t)(vnum0 - vnum1) < 0 ); } command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) { volatile int8_t *newPtr; int8_t *oldPtr; int8_t *bufPtr = (int8_t*)buf; int8_t version; uint16_t i; addr += IFLASH_OFFSET; newPtr = oldPtr = (int8_t*)IFLASH_OFFSET; if (chooseSegment()) { oldPtr += IFLASH_SIZE; } else { addr += IFLASH_SIZE; newPtr += IFLASH_SIZE; } FCTL2 = FWKEY + FSSEL1 + FN2; FCTL3 = FWKEY; FCTL1 = FWKEY + ERASE; *newPtr = 0; FCTL1 = FWKEY + WRT; for ( i = 0; i < IFLASH_SIZE-1; i++, newPtr++, oldPtr++ ) { if ((uint16_t)newPtr < (uint16_t)addr || (uint16_t)addr+size <= (uint16_t)newPtr) *newPtr = *oldPtr; else *newPtr = *bufPtr++; } version = *oldPtr + 1; if (version == IFLASH_INVALID_VNUM) version++; *newPtr = version; FCTL1 = FWKEY; FCTL3 = FWKEY + LOCK; return SUCCESS; } command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) { addr += IFLASH_OFFSET; if (chooseSegment()) addr += IFLASH_SIZE; memcpy(buf, addr, size); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/mulle/000077500000000000000000000000001207233610700215705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/mulle/NetProg_platform.h000066400000000000000000000036461207233610700252340ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This file contains the netprog_reboot function that * reboots the mcu. * * @author Henrik Makitaavola */ #ifndef __NETPROG_PLATFORM_H__ #define __NETPROG_PLATFORM_H__ void netprog_reboot() { PRCR.BIT.PRC1 = 1; // Turn off protection on PM registers. SET_BIT(PM0.BYTE, 3); } #endif // __NETPROG_PLATFORM_H__ tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/mulle/ReprogramGuardC.nc000066400000000000000000000033411207233610700251370ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration ReprogramGuardC { provides interface ReprogramGuard; } implementation { components ReprogramGuardP; ReprogramGuard = ReprogramGuardP; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/mulle/ReprogramGuardP.nc000066400000000000000000000036041207233610700251560ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ // TODO(henrik) implement. module ReprogramGuardP { provides interface ReprogramGuard; } implementation { enum { VTHRESH = 0x0, // 0V }; task void sendOk() { signal ReprogramGuard.okToProgramDone(true); } command error_t ReprogramGuard.okToProgram() { post sendOk(); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/mulle/TOSBoot_platform.h000066400000000000000000000041751207233610700251450ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Henrik Makitaavola */ #ifndef __TOSBOOT_PLATFORM_H__ #define __TOSBOOT_PLATFORM_H__ enum { TOSBOOT_ARGS_ADDR = 0, // address of TOSBoot args in internal flash TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash TOSBOOT_INT_PAGE_SIZE = 512L, // size of each internal program flash page. Each page is 64Kbytes but it is better to split it into 128 parts (65536/512=128). }; #endif // __TOSBOOT_PLATFORM_H__ tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/telos/000077500000000000000000000000001207233610700216005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/telos/NetProg_platform.h000066400000000000000000000035521207233610700252400ustar00rootroot00000000000000// $Id: NetProg_platform.h,v 1.4 2010-06-29 22:07:48 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #ifndef __NETPROG_PLATFORM_H__ #define __NETPROG_PLATFORM_H__ void netprog_reboot() { WDTCTL = WDT_ARST_1_9; while(1); } #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/telos/ReprogramGuardC.nc000066400000000000000000000005531207233610700251510ustar00rootroot00000000000000#include "Msp430Adc12.h" configuration ReprogramGuardC { provides interface ReprogramGuard; } implementation { components ReprogramGuardP; ReprogramGuard = ReprogramGuardP; components new Msp430Adc12ClientAutoRVGC() as Adc; Adc.AdcConfigure -> ReprogramGuardP.VoltageConfigure; ReprogramGuardP.Resource -> Adc; ReprogramGuardP.Sample -> Adc; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/telos/ReprogramGuardP.nc000066400000000000000000000026021207233610700251630ustar00rootroot00000000000000 #include module ReprogramGuardP { provides { interface ReprogramGuard; interface AdcConfigure as VoltageConfigure; } uses { interface Resource; interface Msp430Adc12SingleChannel as Sample; } } implementation { const msp430adc12_channel_config_t config = { inch: SUPPLY_VOLTAGE_HALF_CHANNEL, sref: REFERENCE_VREFplus_AVss, ref2_5v: REFVOLT_LEVEL_1_5, adc12ssel: SHT_SOURCE_ACLK, adc12div: SHT_CLOCK_DIV_1, sht: SAMPLE_HOLD_4_CYCLES, sampcon_ssel: SAMPCON_SOURCE_SMCLK, sampcon_id: SAMPCON_CLOCK_DIV_1 }; uint16_t voltage; enum { VTHRESH = 0xE66, // 2.7V }; task void sampleDone() { bool ok; atomic ok = (voltage > VTHRESH); signal ReprogramGuard.okToProgramDone(ok); } command error_t ReprogramGuard.okToProgram() { return call Resource.request(); } event void Resource.granted() { call Sample.configureSingle(&config); call Sample.getData(); } async event error_t Sample.singleDataReady(uint16_t data) { atomic voltage = data; call Resource.release(); post sampleDone(); return SUCCESS; } async event uint16_t * Sample.multipleDataReady(uint16_t *buffer, uint16_t numSamples) { return NULL; } async command const msp430adc12_channel_config_t* VoltageConfigure.getConfiguration() { return &config; } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/telosb/000077500000000000000000000000001207233610700217425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/telosb/ReprogramGuardC.nc000066400000000000000000000003441207233610700253110ustar00rootroot00000000000000configuration ReprogramGuardC { provides interface ReprogramGuard; } implementation { components ReprogramGuardP; components new VoltageC(); ReprogramGuard = ReprogramGuardP; ReprogramGuardP.Voltage -> VoltageC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/telosb/ReprogramGuardP.nc000066400000000000000000000006321207233610700253260ustar00rootroot00000000000000module ReprogramGuardP { provides interface ReprogramGuard; uses interface Read as Voltage; } implementation { enum { VTHRESH = 0xE66, // 2.7V }; command error_t ReprogramGuard.okToProgram() { return call Voltage.read(); } event void Voltage.readDone(error_t result, uint16_t val) { signal ReprogramGuard.okToProgramDone(result == SUCCESS && val > VTHRESH); } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/telosb/TOSBoot_platform.h000066400000000000000000000041511207233610700253110ustar00rootroot00000000000000// $Id: TOSBoot_platform.h,v 1.4 2010-06-29 22:07:48 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_PLATFORM_H__ #define __TOSBOOT_PLATFORM_H__ enum { TOSBOOT_ARGS_ADDR = 0x70, // address of TOSBoot args in internal flash TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image TOSBOOT_GOLDEN_IMG_ADDR = 0xf0000L, // address of the golden image in external flash TOSBOOT_INT_PAGE_SIZE = 512L, // size of each internal program flash page }; #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/tinynode/000077500000000000000000000000001207233610700223035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/tinynode/NetProg_platform.h000066400000000000000000000035521207233610700257430ustar00rootroot00000000000000// $Id: NetProg_platform.h,v 1.2 2010-06-29 22:07:48 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #ifndef __NETPROG_PLATFORM_H__ #define __NETPROG_PLATFORM_H__ void netprog_reboot() { WDTCTL = WDT_ARST_1_9; while(1); } #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/tinynode/README000066400000000000000000000010371207233610700231640ustar00rootroot00000000000000Deluge T2 for TinyNode ---------------------------------- These files are needed by Deluge T2 to compile for the TinyNode platform. Note: Reprogramming fails if the voltage of the node is not above a given threshold. Currently, this is set to 2.7V, which may be too high if you run your mote on batteries. In this case, set the value of VTHRESH in the ReprogramGaurdP.nc file to a different value. In case you wish not to test the voltage at all, modify ReprogramGuardP.nc s.t. the command okToProgram() posts readDone with SUCCESS. tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/tinynode/ReprogramGuardC.nc000066400000000000000000000003441207233610700256520ustar00rootroot00000000000000configuration ReprogramGuardC { provides interface ReprogramGuard; } implementation { components ReprogramGuardP; components new VoltageC(); ReprogramGuard = ReprogramGuardP; ReprogramGuardP.Voltage -> VoltageC; } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/tinynode/ReprogramGuardP.nc000066400000000000000000000006231207233610700256670ustar00rootroot00000000000000module ReprogramGuardP { provides interface ReprogramGuard; uses interface Read as Voltage; } implementation { enum { VTHRESH = 0xE66, // 2.7V }; command error_t ReprogramGuard.okToProgram() { return call Voltage.read(); } event void Voltage.readDone(error_t result, uint16_t val) { signal ReprogramGuard.okToProgramDone(result == SUCCESS && val > VTHRESH); } } tinyos-2.1.2+dfsg/tos/lib/net/Deluge/extra/tinynode/TOSBoot_platform.h000066400000000000000000000041451207233610700256550ustar00rootroot00000000000000// $Id: TOSBoot_platform.h,v 1.2 2010-06-29 22:07:48 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_PLATFORM_H__ #define __TOSBOOT_PLATFORM_H__ enum { TOSBOOT_ARGS_ADDR = 0x70, // address of TOSBoot args in internal flash TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash TOSBOOT_INT_PAGE_SIZE = 512L, // size of each internal program flash page }; #endif tinyos-2.1.2+dfsg/tos/lib/net/Deluge/imgNum2volumeId.h000066400000000000000000000005321207233610700225230ustar00rootroot00000000000000#ifndef __IMGNUM2VOLUMEID_H__ #define __IMGNUM2VOLUMEID_H__ uint8_t _imgNum2volumeId[] = { VOLUME_GOLDENIMAGE, VOLUME_DELUGE1, VOLUME_DELUGE2, VOLUME_DELUGE3 }; enum { NON_DELUGE_VOLUME = 0xFF }; uint8_t imgNum2volumeId(uint8_t imgNum) { return imgNum < DELUGE_NUM_VOLUMES ? _imgNum2volumeId[imgNum] : NON_DELUGE_VOLUME; } #endif tinyos-2.1.2+dfsg/tos/lib/net/DisseminationUpdate.nc000066400000000000000000000052131207233610700224160ustar00rootroot00000000000000// $Id: DisseminationUpdate.nc,v 1.6 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Update a network shared (disseminated) value. Updates are assured * to be eventually consistent across a connected network. If multiple * nodes update a value simultaneously, then nodes within the network * will see a series of one or more updates, the last update will * be the same for all nodes. Components that need to use the * variable should use the DisseminationValue interface. * * @author Philip Levis * @author Gilman Tolle * @date January 7 2006 */ interface DisseminationUpdate { /** * Update the variable to a new value. This changes the local copy * and begins to disseminate the new value throughout the network. * As other nodes may have also changed the variable, it is possible * that an update may not 'stick,' but will instead be overwritten by * a separate update. * * @param newVal A pointer to the new value. The memory pointed to * by newVal is copied out, so newVal can be reclaimed when * change returns. */ command void change(t* ONE newVal); } tinyos-2.1.2+dfsg/tos/lib/net/DisseminationValue.nc000066400000000000000000000051361207233610700222540ustar00rootroot00000000000000// $Id: DisseminationValue.nc,v 1.6 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Read a network shared (disseminated) variable and be notified * of updates. * * @author Philip Levis * @author Gilman Tolle * * @date Jan 7 2006 */ interface DisseminationValue { /** * Obtain a pointer to the variable. The provider of this * interface only will change the memory the pointer references * in tasks. Therefore the memory region does not change during * the execution of any other task. A user of this interface * must not in any circumstance write to this memory location. * * @return A const pointer to the variable. */ command const t* get(); /** * Set the variable to a new value. The provider of this interface * will copy the value from the pointer. NOTE: This command does * not cause the new value to begin disseminating. It is intended to * be used for setting default values. */ command void set( const t* ); /** * Signalled whenever variable may have changed. */ event void changed(); } tinyos-2.1.2+dfsg/tos/lib/net/NeighborTableEviction.nc000066400000000000000000000036111207233610700226530ustar00rootroot00000000000000/* * "Copyright (c) 2006 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright. * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor * the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * REGENTS OF THE UNVERSITY OF CALIFORNIA OR ITS CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Notify when a neighbor has been evicted from the neighbor table. * * @author Rodrigo Fonseca */ interface NeighborTableEviction { /** * Signals to users that the neighbor has been evicted from the table */ event void evicted(uint16_t neighbor) } tinyos-2.1.2+dfsg/tos/lib/net/README000066400000000000000000000005351207233610700170050ustar00rootroot00000000000000This directory contains network protocols that are part of the TinyOS core distribution. They are: ctp: Collection Tree Protocol (TEP 123), a collection (TEP 119) protocol drip: Drip, a dissemination (TEP 118) protocol le: Link Estimation Exchange Protocol (TEP 124) lqi: MultihopLQI, a collection (TEP 119) protocol, only works on CC2420 radio tinyos-2.1.2+dfsg/tos/lib/net/RootControl.nc000066400000000000000000000036701207233610700207360ustar00rootroot00000000000000/* $Id: RootControl.nc,v 1.4 2006-12-12 18:23:29 vlahan Exp $ */ /* * "Copyright (c) 2006 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright. * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor * the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * REGENTS OF THE UNVERSITY OF CALIFORNIA OR ITS CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** Controls whether the current node is a root of the tree * @author Rodrigo Fonseca * @date $Date: 2006-12-12 18:23:29 $ */ interface RootControl { command error_t setRoot(); command error_t unsetRoot(); command bool isRoot(); } tinyos-2.1.2+dfsg/tos/lib/net/SendVirtualizerP.nc000066400000000000000000000141261207233610700217220ustar00rootroot00000000000000// $Id: SendVirtualizerP.nc,v 1.3 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * A Send queue that provides a Service Instance pattern for formatted * packets and calls an underlying Send in a round-robin fashion. Used * to share L3 bandwidth between different communication clients. * * @author Philip Levis * @date April 6 2007 */ #include "AM.h" generic module SendVirtualizerP(int numClients) { provides interface Send[uint8_t client]; uses { interface Send as SubSend; interface Packet; } } implementation { typedef struct { message_t* msg; } queue_entry_t; uint8_t current = numClients; // mark as empty queue_entry_t queue[numClients]; uint8_t cancelMask[numClients/8 + 1]; void tryToSend(); void nextPacket() { uint8_t i; current = (current + 1) % numClients; for(i = 0; i < numClients; i++) { if((queue[current].msg == NULL) || (cancelMask[current/8] & (1 << current%8))) { current = (current + 1) % numClients; } else { break; } } if(i >= numClients) current = numClients; } /** * Accepts a properly formatted AM packet for later sending. * Assumes that someone has filled in the AM packet fields * (destination, AM type). * * @param msg - the message to send * @param len - the length of the payload * */ command error_t Send.send[uint8_t clientId](message_t* msg, uint8_t len) { if (clientId >= numClients) { return FAIL; } if (queue[clientId].msg != NULL) { return EBUSY; } dbg("AMQueue", "AMQueue: request to send from %hhu (%p): passed checks\n", clientId, msg); queue[clientId].msg = msg; call Packet.setPayloadLength(msg, len); if (current >= numClients) { // queue empty error_t err; current = clientId; err = call SubSend.send(msg, len); if (err != SUCCESS) { dbg("AMQueue", "%s: underlying send failed.\n", __FUNCTION__); current = numClients; queue[clientId].msg = NULL; } return err; } else { dbg("AMQueue", "AMQueue: request to send from %hhu (%p): queue not empty\n", clientId, msg); } return SUCCESS; } task void CancelTask() { uint8_t i,j,mask,last; message_t *msg; for(i = 0; i < numClients/8 + 1; i++) { if(cancelMask[i]) { for(mask = 1, j = 0; j < 8; j++) { if(cancelMask[i] & mask) { last = i*8 + j; msg = queue[last].msg; queue[last].msg = NULL; cancelMask[i] &= ~mask; signal Send.sendDone[last](msg, ECANCEL); } mask <<= 1; } } } } command error_t Send.cancel[uint8_t clientId](message_t* msg) { if (clientId >= numClients || // Not a valid client queue[clientId].msg == NULL || // No packet pending queue[clientId].msg != msg) { // Not the right packet return FAIL; } if(current == clientId) { error_t err = call SubSend.cancel(msg); return err; } else { cancelMask[clientId/8] |= 1 << clientId % 8; post CancelTask(); return SUCCESS; } } void sendDone(uint8_t last, message_t *msg, error_t err) { queue[last].msg = NULL; tryToSend(); signal Send.sendDone[last](msg, err); } task void errorTask() { sendDone(current, queue[current].msg, FAIL); } // NOTE: Increments current! void tryToSend() { nextPacket(); if (current < numClients) { // queue not empty error_t nextErr; message_t* nextMsg = queue[current].msg; uint8_t len = call Packet.payloadLength(nextMsg); nextErr = call SubSend.send(nextMsg, len); if(nextErr != SUCCESS) { post errorTask(); } } } event void SubSend.sendDone(message_t* msg, error_t err) { if(queue[current].msg == msg) { sendDone(current, msg, err); } else { dbg("PointerBug", "%s received send done for %p, signaling for %p.\n", __FUNCTION__, msg, queue[current].msg); } } command uint8_t Send.maxPayloadLength[uint8_t id]() { return call SubSend.maxPayloadLength(); } command void* Send.getPayload[uint8_t id](message_t* m, uint8_t len) { return call SubSend.getPayload(m, len); } default event void Send.sendDone[uint8_t id](message_t* msg, error_t err) { // Do nothing } } tinyos-2.1.2+dfsg/tos/lib/net/TrickleTimer.nc000066400000000000000000000070121207233610700210420ustar00rootroot00000000000000// $Id: TrickleTimer.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * A network trickle timer. A trickle timer has a period in the range * [L, H]. After firing, the period is doubled, up to H. If the period * is P, then the timer is scheduled to fire in the interval [0.5P, P] * (the second half of a period). The period can be reset to L (the * smallest period, and therefore the highest frequency). * * The timer may be suppressed. If a user of the interface has heard * enough packets from other nodes that indicate its transmitting a * packet would be unncessarily redundant, then the timer does not * fire. The timer has a constant K and a counter C. If C >e; K, then * the timer does not fire. When an interval ends, C is reset to 0. * Calling incrementCounter increments C by one. * * For details, refer to Levis et al., "A Self-Regulating Algorithm * for Code Maintenance and Propagation in Wireless Sensor Networks," * NSDI 2004. The component providing this interface defines the * constants L, H, and K. * * @author Philip Levis * @date Jan 7 2006 */ interface TrickleTimer { /** * Start the trickle timer. At boot, the timer period is its maximum * value (H). If a protocol requires starting at the minimum value * (e.g., fast start), then it should call reset before * start. * * @return error_t SUCCESS if the timer was started, EBUSY if it is already * running, and FAIL otherwise. */ command error_t start(); /** * Stop the trickle timer. This call sets the timer period to H and * C to 0. */ command void stop(); /** * Reset the timer period to L. If called while the timer is running, * then a new interval (of length L) begins immediately. */ command void reset(); /** * Increment the counter C. When an interval ends, C is set to 0. */ command void incrementCounter(); /** * The trickle timer has fired. Signaled if C > K. */ event void fired(); } tinyos-2.1.2+dfsg/tos/lib/net/TrickleTimerImplP.nc000066400000000000000000000205071207233610700220100ustar00rootroot00000000000000// $Id: TrickleTimerImplP.nc,v 1.8 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Module that provides a service instance of trickle timers. For * details on the working of the parameters, please refer to Levis et * al., "A Self-Regulating Algorithm for Code Maintenance and * Propagation in Wireless Sensor Networks," NSDI 2004. * * @param l Lower bound of the time period in seconds. * @param h Upper bound of the time period in seconds. * @param k Redundancy constant. * @param count How many timers to provide. * * @author Philip Levis * @author Gilman Tolle * @date Jan 7 2006 */ #include generic module TrickleTimerImplP(uint16_t low, uint16_t high, uint8_t k, uint8_t count, uint8_t scale) { provides { interface Init; interface TrickleTimer[uint8_t id]; } uses { interface Timer; interface BitVector as Pending; interface BitVector as Changed; interface Random; interface Leds; } } implementation { typedef struct { uint16_t period; uint32_t time; uint32_t remainder; uint8_t count; } trickle_t; trickle_t trickles[count]; void adjustTimer(); void generateTime(uint8_t id); command error_t Init.init() { int i; for (i = 0; i < count; i++) { trickles[i].period = high; trickles[i].count = 0; trickles[i].time = 0; trickles[i].remainder = 0; } atomic { call Pending.clearAll(); call Changed.clearAll(); } return SUCCESS; } /** * Start a trickle timer. Reset the counter to 0. */ command error_t TrickleTimer.start[uint8_t id]() { if (trickles[id].time != 0) { return EBUSY; } trickles[id].time = 0; trickles[id].remainder = 0; trickles[id].count = 0; generateTime(id); atomic { call Changed.set(id); } adjustTimer(); dbg("Trickle", "Starting trickle timer %hhu @ %s\n", id, sim_time_string()); return SUCCESS; } /** * Stop the trickle timer. This call sets the timer period to H. */ command void TrickleTimer.stop[uint8_t id]() { trickles[id].time = 0; trickles[id].period = high; adjustTimer(); dbg("Trickle", "Stopping trickle timer %hhu @ %s\n", id, sim_time_string()); } /** * Reset the timer period to L. If called while the timer is running, * then a new interval (of length L) begins immediately. */ command void TrickleTimer.reset[uint8_t id]() { trickles[id].period = low; trickles[id].count = 0; if (trickles[id].time != 0) { dbg("Trickle", "Resetting running trickle timer %hhu @ %s\n", id, sim_time_string()); atomic { call Changed.set(id); } trickles[id].time = 0; trickles[id].remainder = 0; generateTime(id); adjustTimer(); } else { dbg("Trickle", "Resetting trickle timer %hhu @ %s\n", id, sim_time_string()); } } /** * Increment the counter C. When an interval ends, C is set to 0. */ command void TrickleTimer.incrementCounter[uint8_t id]() { trickles[id].count++; } task void timerTask() { uint8_t i; for (i = 0; i < count; i++) { bool fire = FALSE; atomic { if (call Pending.get(i)) { call Pending.clear(i); fire = TRUE; } } if (fire) { dbg("Trickle", "Firing trickle timer %hhu @ %s\n", i, sim_time_string()); signal TrickleTimer.fired[i](); post timerTask(); return; } } } /** * The trickle timer has fired. Signaled if C > K. */ event void Timer.fired() { uint8_t i; uint32_t dt = call Timer.getdt(); dbg("Trickle", "Trickle Sub-timer fired\n"); for (i = 0; i < count; i++) { uint32_t remaining = trickles[i].time; if (remaining != 0) { remaining -= dt; if (remaining == 0) { if (trickles[i].count < k) { atomic { dbg("Trickle", "Trickle: mark timer %hhi as pending\n", i); call Pending.set(i); } post timerTask(); } call Changed.set(i); generateTime(i); /* Note that this logic is not the exact trickle algorithm. * Rather than C being reset at the beginning of an interval, * it is being reset at a firing point. This means that the * listening period, rather than of length tau/2, is in the * range [tau/2, tau]. */ trickles[i].count = 0; } } } adjustTimer(); } // This is where all of the work is done! void adjustTimer() { uint8_t i; uint32_t lowest = 0; bool set = FALSE; // How much time has elapsed on the current timer // since it was scheduled? This value is needed because // the time remaining of a running timer is its time // value minus time elapsed. uint32_t elapsed = (call Timer.getNow() - call Timer.gett0()); for (i = 0; i < count; i++) { uint32_t timeRemaining = trickles[i].time; dbg("Trickle", "Adjusting: timer %hhi (%u)\n", i, timeRemaining); if (timeRemaining == 0) { // Not running, go to next timer continue; } atomic { if (!call Changed.get(i)) { if (timeRemaining > elapsed) { dbg("Trickle", " not changed, elapse time remaining to %u.\n", trickles[i].time - elapsed); timeRemaining -= elapsed; trickles[i].time -= elapsed; } else { // Time has already passed, so fire immediately dbg("Trickle", " not changed, ready to elapse, fire immediately\n"); timeRemaining = 1; trickles[i].time = 1; } } else { dbg("Trickle", " changed, fall through.\n"); call Changed.clear(i); } } if (!set) { lowest = timeRemaining; set = TRUE; } else if (timeRemaining < lowest) { lowest = timeRemaining; } } if (set) { uint32_t timerVal = lowest; dbg("Trickle", "Starting sub-timer with interval %u.\n", timerVal); call Timer.startOneShot(timerVal); } else { call Timer.stop(); } } /* Generate a new firing time for a timer. if the timer was already * running (time != 0), then double the period. */ void generateTime(uint8_t id) { uint32_t newTime; uint16_t rval; if (trickles[id].time != 0) { trickles[id].period *= 2; if (trickles[id].period > high) { trickles[id].period = high; } } trickles[id].time = trickles[id].remainder; newTime = trickles[id].period; newTime = newTime << (scale - 1); rval = call Random.rand16() % (trickles[id].period << (scale - 1)); newTime += rval; trickles[id].remainder = (((uint32_t)trickles[id].period) << scale) - newTime; trickles[id].time += newTime; dbg("Trickle,TrickleTimes", "Generated time for %hhu with period %hu (%u) is %u (%i + %hu)\n", id, trickles[id].period, (uint32_t)trickles[id].period << scale, trickles[id].time, (trickles[id].period << (scale - 1)), rval); } default event void TrickleTimer.fired[uint8_t id]() { return; } } tinyos-2.1.2+dfsg/tos/lib/net/TrickleTimerMilliC.nc000066400000000000000000000056001207233610700221350ustar00rootroot00000000000000// $Id: TrickleTimerMilliC.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Configuration that encapsulates the trickle timer implementation to * its needed services and initialization. For details on the working * of the parameters, please refer to Levis et al., "A Self-Regulating * Algorithm for Code Maintenance and Propagation in Wireless Sensor * Networks," NSDI 2004. * * @param l Lower bound of the time period in seconds. * @param h Upper bound of the time period in seconds. * @param k Redundancy constant. * @param count How many timers to provide. * * @author Philip Levis * @author Gilman Tolle * @date Jan 7 2006 */ generic configuration TrickleTimerMilliC(uint16_t low, uint16_t high, uint8_t k, uint8_t count) { provides interface TrickleTimer[uint8_t]; } implementation { components new TrickleTimerImplP(low, high, k, count, 10), MainC, RandomC; components new TimerMilliC(); components new BitVectorC(count) as PendingVector; components new BitVectorC(count) as ChangeVector; components LedsC; TrickleTimer = TrickleTimerImplP; TrickleTimerImplP.Timer -> TimerMilliC; TrickleTimerImplP.Random -> RandomC; TrickleTimerImplP.Changed -> ChangeVector; TrickleTimerImplP.Pending -> PendingVector; TrickleTimerImplP.Leds -> LedsC; MainC.SoftwareInit -> TrickleTimerImplP; } tinyos-2.1.2+dfsg/tos/lib/net/UARTDebugSenderP.nc000066400000000000000000000152561207233610700214600ustar00rootroot00000000000000#include module UARTDebugSenderP { provides { interface CollectionDebug; } uses { interface Boot; interface Pool as MessagePool; interface Queue as SendQueue; interface AMSend as UARTSend; } } implementation { message_t uartPacket; bool sending; uint8_t len; uint16_t statLogReceived = 0; uint16_t statEnqueueFail = 0; uint16_t statSendFail = 0; uint16_t statSendDoneFail = 0; uint16_t statSendDoneOk = 0; uint16_t statSendDoneBug = 0; event void Boot.booted() { sending = FALSE; len = sizeof(CollectionDebugMsg); statSendFail = 0; statLogReceived = 0; statEnqueueFail = 0; statSendDoneOk = 0; statSendDoneFail = 0; statSendDoneBug = 0; } task void sendTask() { if (sending) { return; } else if (call SendQueue.empty()) { return; } else { message_t* smsg = call SendQueue.head(); error_t eval = call UARTSend.send(AM_BROADCAST_ADDR, smsg, len); if (eval == SUCCESS) { sending = TRUE; return; } else { //Drop packet. Don't retry. statSendFail++; call SendQueue.dequeue(); call MessagePool.put(smsg); if (! call SendQueue.empty()) post sendTask(); } } } event void UARTSend.sendDone(message_t *msg, error_t error) { message_t* qh = call SendQueue.head(); if (qh == NULL || qh != msg) { //bad mojo statSendDoneBug++; } else { call SendQueue.dequeue(); call MessagePool.put(msg); if (error == SUCCESS) statSendDoneOk++; else statSendDoneFail++; } sending = FALSE; if (!call SendQueue.empty()) post sendTask(); } command error_t CollectionDebug.logEvent(uint8_t type) { statLogReceived++; if (call MessagePool.empty()) { return FAIL; } else { message_t* msg = call MessagePool.get(); CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg)); if (dbg_msg == NULL) { return FAIL; } memset(dbg_msg, 0, len); dbg_msg->type = type; dbg_msg->seqno = statLogReceived; if (call SendQueue.enqueue(msg) == SUCCESS) { post sendTask(); return SUCCESS; } else { statEnqueueFail++; call MessagePool.put(msg); return FAIL; } } } /* Used for FE_SENT_MSG, FE_RCV_MSG, FE_FWD_MSG, FE_DST_MSG */ command error_t TRUSTEDBLOCK CollectionDebug.logEventMsg(uint8_t type, uint16_t msg_id, am_addr_t origin, am_addr_t node) { statLogReceived++; if (call MessagePool.empty()) { return FAIL; } else { message_t* msg = call MessagePool.get(); CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg)); if (dbg_msg == NULL) { return FAIL; } memset(dbg_msg, 0, len); dbg_msg->type = type; dbg_msg->data.msg.msg_uid = msg_id; dbg_msg->data.msg.origin = origin; dbg_msg->data.msg.other_node = node; dbg_msg->seqno = statLogReceived; if (call SendQueue.enqueue(msg) == SUCCESS) { post sendTask(); return SUCCESS; } else { statEnqueueFail++; call MessagePool.put(msg); return FAIL; } } } /* Used for TREE_NEW_PARENT, TREE_ROUTE_INFO */ command error_t TRUSTEDBLOCK CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) { statLogReceived++; if (call MessagePool.empty()) { return FAIL; } else { message_t* msg = call MessagePool.get(); CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg)); if (dbg_msg == NULL) { return FAIL; } memset(dbg_msg, 0, len); dbg_msg->type = type; dbg_msg->data.route_info.parent = parent; dbg_msg->data.route_info.hopcount = hopcount; dbg_msg->data.route_info.metric = metric; dbg_msg->seqno = statLogReceived; if (call SendQueue.enqueue(msg) == SUCCESS) { post sendTask(); return SUCCESS; } else { statEnqueueFail++; call MessagePool.put(msg); return FAIL; } } } /* Used for DBG_1 */ command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) { statLogReceived++; if (call MessagePool.empty()) { return FAIL; } else { message_t* msg = call MessagePool.get(); CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg)); if (dbg_msg == NULL) { return FAIL; } memset(dbg_msg, 0, len); dbg_msg->type = type; dbg_msg->data.arg = arg; dbg_msg->seqno = statLogReceived; if (call SendQueue.enqueue(msg) == SUCCESS) { post sendTask(); return SUCCESS; } else { statEnqueueFail++; call MessagePool.put(msg); return FAIL; } } } /* Used for DBG_2, DBG_3 */ command TRUSTEDBLOCK error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) { statLogReceived++; if (call MessagePool.empty()) { return FAIL; } else { message_t* msg = call MessagePool.get(); CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg)); if (dbg_msg == NULL) { return FAIL; } memset(dbg_msg, 0, len); dbg_msg->type = type; dbg_msg->data.dbg.a = arg1; dbg_msg->data.dbg.b = arg2; dbg_msg->data.dbg.c = arg3; dbg_msg->seqno = statLogReceived; if (call SendQueue.enqueue(msg) == SUCCESS) { post sendTask(); return SUCCESS; } else { statEnqueueFail++; call MessagePool.put(msg); return FAIL; } } } } tinyos-2.1.2+dfsg/tos/lib/net/UnicastNameFreeRouting.nc000066400000000000000000000043051207233610700230270ustar00rootroot00000000000000/* $Id: UnicastNameFreeRouting.nc,v 1.4 2006-12-12 18:23:29 vlahan Exp $ */ /* * "Copyright (c) 2006 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright. * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor * the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * REGENTS OF THE UNVERSITY OF CALIFORNIA OR ITS CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * Provides a single next hop on a name-free protocol. * * @author Philip Levis * @date $Date: 2006-12-12 18:23:29 $ */ interface UnicastNameFreeRouting { /** * Get the address of the best next hop set to the destination. * If there is not best next hop, the address is the local address. * @return : The next best hop, or the local address if there is no route. */ command am_addr_t nextHop(); command bool hasRoute(); event void routeFound(); event void noRoute(); } tinyos-2.1.2+dfsg/tos/lib/net/blip/000077500000000000000000000000001207233610700170505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/BlipStatistics.h000066400000000000000000000060551207233610700221700ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef _BLIP_STATISTICS_H_ #define _BLIP_STATISTICS_H_ /* Different IP components provide statistics about their operation. * * Structures with this information is available here. */ #ifdef BLIP_STATS // if we get rid of the increments the compiler can optimize out the // statistics data structures when we don't use them. #define BLIP_STATS_INCR(X) X++ #else #define BLIP_STATS_INCR(X) #endif /* Statistics from the core 6lowpan/IPv6 fragmentation and forwarding engine */ typedef nx_struct { nx_uint16_t sent; // total IP datagrams sent nx_uint16_t forwarded; // total IP datagrams forwarded nx_uint8_t rx_drop; // L2 frags dropped due to 6lowpan failure nx_uint8_t tx_drop; // L2 frags dropped due to link failures nx_uint8_t fw_drop; // L2 frags dropped when forwarding due to queue overflow nx_uint8_t rx_total; // L2 frags received nx_uint8_t encfail; // frags dropped due to send queue #ifdef BLIP_STATS_IP_MEM // statistics about free memory // mostly useful for looking for memory leaks, or looking at // forwarding queue depth. nx_uint8_t fragpool; // free fragments in pool nx_uint8_t sendinfo; // free sendinfo structures nx_uint8_t sendentry; // free send entryies nx_uint8_t sndqueue; // free send queue entries nx_uint16_t heapfree; // available free space in the heap #endif } ip_statistics_t; typedef nx_struct { nx_uint8_t hop_limit; nx_uint16_t parent; nx_uint16_t parent_metric; nx_uint16_t parent_etx; } route_statistics_t; typedef nx_struct { nx_uint8_t sol_rx; nx_uint8_t sol_tx; nx_uint8_t adv_rx; nx_uint8_t adv_tx; nx_uint8_t echo_rx; nx_uint8_t echo_tx; nx_uint8_t unk_rx; nx_uint16_t rx; } icmp_statistics_t; /* Statistics from the UDP transport protocol */ typedef nx_struct { nx_uint16_t sent; // UDP datagrams sent from app nx_uint16_t rcvd; // UDP datagrams delivered to apps nx_uint16_t cksum; // UDP datagrams dropped due to checksum error } udp_statistics_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/IPAddressC.nc000066400000000000000000000024151207233610700213150ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ configuration IPAddressC { provides interface IPAddress; } implementation { components IPAddressP, Ieee154AddressC; IPAddress = IPAddressP; IPAddressP.Ieee154Address -> Ieee154AddressC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPAddressP.nc000066400000000000000000000124361207233610700213360ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include #include module IPAddressP { provides { interface IPAddress; } uses { interface Ieee154Address; } } implementation { bool m_valid_addr = FALSE, m_short_addr = FALSE; struct in6_addr m_addr; command bool IPAddress.getLLAddr(struct in6_addr *addr) { ieee154_panid_t panid = letohs(call Ieee154Address.getPanId()); ieee154_saddr_t saddr = letohs(call Ieee154Address.getShortAddr()); ieee154_laddr_t laddr = call Ieee154Address.getExtAddr(); memclr(addr->s6_addr, 16); addr->s6_addr16[0] = htons(0xfe80); if (m_short_addr) { addr->s6_addr16[4] = htons(panid); addr->s6_addr16[5] = htons(0x00FF); addr->s6_addr16[6] = htons(0xFE00); addr->s6_addr16[7] = htons(saddr); addr->s6_addr[8] &= ~0x2; /* unset U bit */ } else { int i; for (i = 0; i < 8; i++) addr->s6_addr[8+i] = laddr.data[7-i]; addr->s6_addr[8] ^= 0x2; /* toggle U/L bit */ } return TRUE; } command bool IPAddress.getGlobalAddr(struct in6_addr *addr) { *addr = m_addr; return m_valid_addr; } command bool IPAddress.setSource(struct ip6_hdr *hdr) { enum { LOCAL, GLOBAL } type = GLOBAL; if (hdr->ip6_dst.s6_addr[0] == 0xff) { // link-local multicast sent from local address if ((hdr->ip6_dst.s6_addr[1] & 0x0f) <= 0x2) { type = LOCAL; } } else if (hdr->ip6_dst.s6_addr[0] == 0xfe) { // link-local destinations sent from link-local if ((hdr->ip6_dst.s6_addr[1] & 0xf0) <= 0x80) { type = LOCAL; } } if (type == LOCAL) { return call IPAddress.getLLAddr(&hdr->ip6_src); } else { return call IPAddress.getGlobalAddr(&hdr->ip6_src); } } command bool IPAddress.isLocalAddress(struct in6_addr *addr) { ieee154_panid_t panid = letohs(call Ieee154Address.getPanId()); ieee154_saddr_t saddr = letohs(call Ieee154Address.getShortAddr()); ieee154_laddr_t eui = call Ieee154Address.getExtAddr(); if (addr->s6_addr16[0] == htons(0xfe80)) { // link-local if (m_short_addr && addr->s6_addr16[5] == htons(0x00FF) && addr->s6_addr16[6] == htons(0xFE00)) { if (ntohs(addr->s6_addr16[4]) == (panid & ~0x200) && ntohs(addr->s6_addr16[7]) == saddr) { return TRUE; } else { return FALSE; } } return (addr->s6_addr[8] == (eui.data[7] ^ 0x2) && /* invert U/L bit */ addr->s6_addr[9] == eui.data[6] && addr->s6_addr[10] == eui.data[5] && addr->s6_addr[11] == eui.data[4] && addr->s6_addr[12] == eui.data[3] && addr->s6_addr[13] == eui.data[2] && addr->s6_addr[14] == eui.data[1] && addr->s6_addr[15] == eui.data[0]); } else if (addr->s6_addr[0] == 0xff) { // multicast if ((addr->s6_addr[1] & 0x0f) <= 2) { // accept all LL multicast messages return TRUE; } } else if (memcmp(addr->s6_addr, m_addr.s6_addr, 16) == 0) { return TRUE; } return FALSE; } /* Check if the address needs routing or of it's link local in scope */ command bool IPAddress.isLLAddress(struct in6_addr *addr) { if (addr->s6_addr16[0] == htons(0xfe80) || (addr->s6_addr[0] == 0xff && (addr->s6_addr[1] & 0x0f) <= 2)) return TRUE; return FALSE; } command error_t IPAddress.setAddress(struct in6_addr *addr) { m_addr = *addr; #ifdef BLIP_DERIVE_SHORTADDRS if (m_addr.s6_addr[8] == 0 && m_addr.s6_addr[9] == 0 && m_addr.s6_addr[10] == 0 && m_addr.s6_addr[11] == 0 && m_addr.s6_addr[12] == 0 && m_addr.s6_addr[13] == 0) { call Ieee154Address.setShortAddr(ntohs(m_addr.s6_addr16[7])); m_short_addr = TRUE; } else { call Ieee154Address.setShortAddr(0); m_short_addr = FALSE; } #endif m_valid_addr = TRUE; signal IPAddress.changed(TRUE); return SUCCESS; } command error_t IPAddress.removeAddress() { m_valid_addr = FALSE; m_short_addr = FALSE; call Ieee154Address.setShortAddr(0); signal IPAddress.changed(FALSE); return SUCCESS; } event void Ieee154Address.changed() {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPDispatch.h000066400000000000000000000037661207233610700212250ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef _IPDISPATCH_H_ #define _IPDISPATCH_H_ #include enum { N_RECONSTRUCTIONS = 3, /* number of concurrent reconstructions */ N_CONCURRENT_SENDS = 3, /* number of concurrent sends */ N_FRAGMENTS = 12, /* number of link-layer fragments to buffer */ }; struct send_info { void *upper_data; /* reference to the data field of IPLower.send */ uint8_t link_fragments; /* how many fragments the packet was split into */ uint8_t link_transmissions; /* how many total link transmissions were required */ uint8_t link_fragment_attempts; /* how many fragments we tried */ bool failed; /* weather the link reported that the transmission succeed*/ uint8_t _refcount; }; struct send_entry { struct send_info *info; message_t *msg; }; #ifndef BLIP_L2_RETRIES #define BLIP_L2_RETRIES 5 #endif #ifndef BLIP_L2_DELAY #define BLIP_L2_DELAY 103 #endif #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/IPDispatchC.nc000066400000000000000000000066231207233610700214740ustar00rootroot00000000000000/* * "Copyright (c) 2008-2011 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ /** * * */ #include "IPDispatch.h" #include "BlipStatistics.h" configuration IPDispatchC { provides { interface SplitControl; interface IPLower; interface BlipStatistics; } } implementation { components MainC; components NoLedsC as LedsC; /* IPDispatchP wiring -- fragment rassembly and lib6lowpan bindings */ components IPDispatchP; components CC2420RadioC as MessageC; components ReadLqiC; components new TimerMilliC(); SplitControl = IPDispatchP.SplitControl; IPLower = IPDispatchP; BlipStatistics = IPDispatchP; IPDispatchP.Boot -> MainC; /* #else */ /* components ResourceSendP; */ /* ResourceSendP.SubSend -> MessageC; */ /* ResourceSendP.Resource -> MessageC.SendResource[unique("RADIO_SEND_RESOURCE")]; */ /* IPDispatchP.Ieee154Send -> ResourceSendP.Ieee154Send; */ /* #endif */ IPDispatchP.RadioControl -> MessageC; IPDispatchP.BarePacket -> MessageC.BarePacket; IPDispatchP.Ieee154Send -> MessageC.BareSend; IPDispatchP.Ieee154Receive -> MessageC.BareReceive; #ifdef LOW_POWER_LISTENING IPDispatchP.LowPowerListening -> MessageC; #endif MainC.SoftwareInit -> IPDispatchP.Init; IPDispatchP.PacketLink -> MessageC; IPDispatchP.ReadLqi -> ReadLqiC; IPDispatchP.Leds -> LedsC; IPDispatchP.ExpireTimer -> TimerMilliC; components new PoolC(message_t, N_FRAGMENTS) as FragPool; components new PoolC(struct send_entry, N_FRAGMENTS) as SendEntryPool; components new QueueC(struct send_entry *, N_FRAGMENTS); components new PoolC(struct send_info, N_CONCURRENT_SENDS) as SendInfoPool; IPDispatchP.FragPool -> FragPool; IPDispatchP.SendEntryPool -> SendEntryPool; IPDispatchP.SendInfoPool -> SendInfoPool; IPDispatchP.SendQueue -> QueueC; components IPNeighborDiscoveryP; IPDispatchP.NeighborDiscovery -> IPNeighborDiscoveryP; /* components ICMPResponderC; */ /* #ifdef BLIP_MULTICAST */ /* components MulticastP; */ /* components new TrickleTimerMilliC(2, 30, 2, 1); */ /* IP = MulticastP.IP; */ /* MainC.SoftwareInit -> MulticastP.Init; */ /* MulticastP.MulticastRx -> IPDispatchP.Multicast; */ /* MulticastP.HopHeader -> IPExtensionP.HopByHopExt[0]; */ /* MulticastP.TrickleTimer -> TrickleTimerMilliC.TrickleTimer[0]; */ /* MulticastP.IPExtensions -> IPDispatchP; */ /* #endif */ #ifdef DELUGE components NWProgC; #endif } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPDispatchP.nc000066400000000000000000000473761207233610700215230ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include #include #include #include #include #include #include "blip_printf.h" #include "IPDispatch.h" #include "BlipStatistics.h" #include "table.h" /* * Provides IP layer reception to applications on motes. * * @author Stephen Dawson-Haggerty */ module IPDispatchP { provides { interface SplitControl; // interface for protocols not requiring special hand-holding interface IPLower; interface BlipStatistics; } uses { interface Boot; /* link-layer wiring */ interface SplitControl as RadioControl; interface Packet as BarePacket; interface Send as Ieee154Send; interface Receive as Ieee154Receive; /* context lookup */ interface NeighborDiscovery; interface ReadLqi; interface PacketLink; interface LowPowerListening; /* buffers for outgoing fragments */ interface Pool as FragPool; interface Pool as SendInfoPool; interface Pool as SendEntryPool; interface Queue as SendQueue; /* expire reconstruction */ interface Timer as ExpireTimer; interface Leds; } provides interface Init; } implementation { #define HAVE_LOWPAN_EXTERN_MATCH_CONTEXT int lowpan_extern_read_context(struct in6_addr *addr, int context) { return call NeighborDiscovery.getContext(context, addr); } int lowpan_extern_match_context(struct in6_addr *addr, uint8_t *ctx_id) { return call NeighborDiscovery.matchContext(addr, ctx_id); } // generally including source files like this is a no-no. I'm doing // this in the hope that the optimizer will do a better job when // they're part of a component. #include #include #include #include enum { S_RUNNING, S_STOPPED, S_STOPPING, }; uint8_t state = S_STOPPED; bool radioBusy; uint8_t current_local_label = 0; ip_statistics_t stats; // this in theory could be arbitrarily large; however, it needs to // be large enough to hold all active reconstructions, and any tags // which we are dropping. It's important to keep dropped tags // around for a while, or else there are pathological situations // where you continually allocate buffers for packets which will // never complete. //////////////////////////////////////// // // table_t recon_cache; // table of packets we are currently receiving fragments from, that // are destined to us struct lowpan_reconstruct recon_data[N_RECONSTRUCTIONS]; // // //////////////////////////////////////// // task void sendTask(); void reconstruct_clear(void *ent) { struct lowpan_reconstruct *recon = (struct lowpan_reconstruct *)ent; memclr((uint8_t *)&recon->r_meta, sizeof(struct ip6_metadata)); recon->r_timeout = T_UNUSED; recon->r_buf = NULL; } struct send_info *getSendInfo() { struct send_info *ret = call SendInfoPool.get(); if (ret == NULL) return ret; ret->_refcount = 1; ret->upper_data = NULL; ret->failed = FALSE; ret->link_transmissions = 0; ret->link_fragments = 0; ret->link_fragment_attempts = 0; return ret; } #define SENDINFO_INCR(X) ((X)->_refcount)++ void SENDINFO_DECR(struct send_info *si) { if (--(si->_refcount) == 0) { call SendInfoPool.put(si); } } command error_t SplitControl.start() { return call RadioControl.start(); } command error_t SplitControl.stop() { if (!radioBusy) { state = S_STOPPED; return call RadioControl.stop(); } else { // if there's a packet in the radio, wait for it to exit before // stopping state = S_STOPPING; return SUCCESS; } } event void RadioControl.startDone(error_t error) { #ifdef LPL_SLEEP_INTERVAL call LowPowerListening.setLocalWakeupInterval(LPL_SLEEP_INTERVAL); #endif if (error == SUCCESS) { call Leds.led2Toggle(); call ExpireTimer.startPeriodic(FRAG_EXPIRE_TIME); state = S_RUNNING; radioBusy = FALSE; } signal SplitControl.startDone(error); } event void RadioControl.stopDone(error_t error) { signal SplitControl.stopDone(error); } command error_t Init.init() { // ip_malloc_init needs to be in init, not booted, because // context for coap is initialised in init ip_malloc_init(); return SUCCESS; } event void Boot.booted() { call BlipStatistics.clear(); /* set up our reconstruction cache */ table_init(&recon_cache, recon_data, sizeof(struct lowpan_reconstruct), N_RECONSTRUCTIONS); table_map(&recon_cache, reconstruct_clear); call SplitControl.start(); } /* * Receive-side code. */ void deliver(struct lowpan_reconstruct *recon) { struct ip6_hdr *iph = (struct ip6_hdr *)recon->r_buf; // printf("deliver [%i]: ", recon->r_bytes_rcvd); // printf_buf(recon->r_buf, recon->r_bytes_rcvd); /* the payload length field is always compressed, have to put it back here */ iph->ip6_plen = htons(recon->r_bytes_rcvd - sizeof(struct ip6_hdr)); signal IPLower.recv(iph, (void *)(iph + 1), &recon->r_meta); // printf("ip_free(%p)\n", recon->r_buf); ip_free(recon->r_buf); recon->r_timeout = T_UNUSED; recon->r_buf = NULL; } /* * Bulletproof recovery logic is very important to make sure we * don't get wedged with no free buffers. * * The table is managed as follows: * - unused entries are marked T_UNUSED * - entries which * o have a buffer allocated * o have had a fragment reception before we fired * are marked T_ACTIVE * - entries which have not had a fragment reception during the last timer period * and were active are marked T_ZOMBIE * - zombie receptions are deleted: their buffer is freed and table entry marked unused. * - when a fragment is dropped, it is entered into the table as T_FAILED1. * no buffer is allocated * - when the timer fires, T_FAILED1 entries are aged to T_FAILED2. * - T_FAILED2 entries are deleted. Incomming fragments with tags * that are marked either FAILED1 or FAILED2 are dropped; this * prevents us from allocating a buffer for a packet which we * have already dropped fragments from. * */ void reconstruct_age(void *elt) { struct lowpan_reconstruct *recon = (struct lowpan_reconstruct *)elt; if (recon->r_timeout != T_UNUSED) printf("recon src: 0x%x tag: 0x%x buf: %p recvd: %i/%i\n", recon->r_source_key, recon->r_tag, recon->r_buf, recon->r_bytes_rcvd, recon->r_size); switch (recon->r_timeout) { case T_ACTIVE: recon->r_timeout = T_ZOMBIE; break; // age existing receptions case T_FAILED1: recon->r_timeout = T_FAILED2; break; // age existing receptions case T_ZOMBIE: case T_FAILED2: // deallocate the space for reconstruction printf("timing out buffer: src: %i tag: %i\n", recon->r_source_key, recon->r_tag); if (recon->r_buf != NULL) { printf("ip_free(%p)\n", recon->r_buf); ip_free(recon->r_buf); } recon->r_timeout = T_UNUSED; recon->r_buf = NULL; break; } } void ip_print_heap() { #ifdef PRINTFUART_ENABLED bndrt_t *cur = (bndrt_t *)heap; while (((uint8_t *)cur) - heap < IP_MALLOC_HEAP_SIZE) { printf ("heap region start: %p length: %u used: %u\n", cur, (*cur & IP_MALLOC_LEN), (*cur & IP_MALLOC_INUSE) >> 15); cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN)); } #endif } event void ExpireTimer.fired() { table_map(&recon_cache, reconstruct_age); printf("Frag pool size: %i\n", call FragPool.size()); printf("SendInfo pool size: %i\n", call SendInfoPool.size()); printf("SendEntry pool size: %i\n", call SendEntryPool.size()); printf("Forward queue length: %i\n", call SendQueue.size()); ip_print_heap(); printfflush(); } /* * allocate a structure for recording information about incomming fragments. */ struct lowpan_reconstruct *get_reconstruct(uint16_t key, uint16_t tag) { struct lowpan_reconstruct *ret = NULL; int i; // printf("get_reconstruct: %x %i\n", key, tag); for (i = 0; i < N_RECONSTRUCTIONS; i++) { struct lowpan_reconstruct *recon = (struct lowpan_reconstruct *)&recon_data[i]; if (recon->r_tag == tag && recon->r_source_key == key) { if (recon->r_timeout > T_UNUSED) { recon->r_timeout = T_ACTIVE; ret = recon; goto done; } else if (recon->r_timeout < T_UNUSED) { // if we have already tried and failed to get a buffer, we // need to drop remaining fragments. ret = NULL; goto done; } } if (recon->r_timeout == T_UNUSED) ret = recon; } done: // printf("got%p\n", ret); return ret; } event message_t *Ieee154Receive.receive(message_t *msg, void *msg_payload, uint8_t len) { struct packed_lowmsg lowmsg; struct ieee154_frame_addr frame_address; uint8_t *buf = msg_payload; // printf(" -- RECEIVE -- len : %i\n", len); BLIP_STATS_INCR(stats.rx_total); /* unpack the 802.15.4 address fields */ buf = unpack_ieee154_hdr(msg_payload, &frame_address); len -= buf - (uint8_t *)msg_payload; /* unpack and 6lowpan headers */ lowmsg.data = buf; lowmsg.len = len; lowmsg.headers = getHeaderBitmap(&lowmsg); if (lowmsg.headers == LOWMSG_NALP) { goto fail; } if (hasFrag1Header(&lowmsg) || hasFragNHeader(&lowmsg)) { // start reassembly int rv; struct lowpan_reconstruct *recon; uint16_t tag, source_key; source_key = ieee154_hashaddr(&frame_address.ieee_src); getFragDgramTag(&lowmsg, &tag); recon = get_reconstruct(source_key, tag); if (!recon) { goto fail; } /* fill in metadata: on fragmented packets, it applies to the first fragment only */ memcpy(&recon->r_meta.sender, &frame_address.ieee_src, sizeof(ieee154_addr_t)); recon->r_meta.lqi = call ReadLqi.readLqi(msg); recon->r_meta.rssi = call ReadLqi.readRssi(msg); if (hasFrag1Header(&lowmsg)) { if (recon->r_buf != NULL) goto fail; rv = lowpan_recon_start(&frame_address, recon, buf, len); } else { rv = lowpan_recon_add(recon, buf, len); } if (rv < 0) { recon->r_timeout = T_FAILED1; goto fail; } else { // printf("start recon buf: %p\n", recon->r_buf); recon->r_timeout = T_ACTIVE; recon->r_source_key = source_key; recon->r_tag = tag; } if (recon->r_size == recon->r_bytes_rcvd) { deliver(recon); } } else { /* no fragmentation, just deliver it */ int rv; struct lowpan_reconstruct recon; /* fill in metadata */ memcpy(&recon.r_meta.sender, &frame_address.ieee_src, sizeof(ieee154_addr_t)); recon.r_meta.lqi = call ReadLqi.readLqi(msg); recon.r_meta.rssi = call ReadLqi.readRssi(msg); buf = getLowpanPayload(&lowmsg); if ((rv = lowpan_recon_start(&frame_address, &recon, buf, len)) < 0) { goto fail; } if (recon.r_size == recon.r_bytes_rcvd) { deliver(&recon); } else { // printf("ip_free(%p)\n", recon.r_buf); ip_free(recon.r_buf); } } goto done; fail: BLIP_STATS_INCR(stats.rx_drop); done: return msg; } /* * Send-side functionality */ task void sendTask() { struct send_entry *s_entry; // printf("sendTask() - sending\n"); if (radioBusy || state != S_RUNNING) return; if (call SendQueue.empty()) return; // this does not dequeue s_entry = call SendQueue.head(); #ifdef LPL_SLEEP_INTERVAL call LowPowerListening.setRemoteWakeupInterval(s_entry->msg, call LowPowerListening.getLocalWakeupInterval()); #endif if (s_entry->info->failed) { dbg("Drops", "drops: sendTask: dropping failed fragment\n"); goto fail; } if ((call Ieee154Send.send(s_entry->msg, call BarePacket.payloadLength(s_entry->msg))) != SUCCESS) { dbg("Drops", "drops: sendTask: send failed\n"); goto fail; } else { radioBusy = TRUE; } return; fail: printf("SEND FAIL\n"); post sendTask(); BLIP_STATS_INCR(stats.tx_drop); // deallocate the memory associated with this request. // other fragments associated with this packet will get dropped. s_entry->info->failed = TRUE; SENDINFO_DECR(s_entry->info); call FragPool.put(s_entry->msg); call SendEntryPool.put(s_entry); call SendQueue.dequeue(); } /* * it will pack the message into the fragment pool and enqueue * those fragments for sending * * it will set * - payload length * - version, traffic class and flow label * * the source and destination IP addresses must be set by higher * layers. */ command error_t IPLower.send(struct ieee154_frame_addr *frame_addr, struct ip6_packet *msg, void *data) { struct lowpan_ctx ctx; struct send_info *s_info; struct send_entry *s_entry; message_t *outgoing; int frag_len = 1; error_t rc = SUCCESS; if (state != S_RUNNING) { return EOFF; } /* set version to 6 in case upper layers forgot */ msg->ip6_hdr.ip6_vfc &= ~IPV6_VERSION_MASK; msg->ip6_hdr.ip6_vfc |= IPV6_VERSION; ctx.tag = current_local_label++; ctx.offset = 0; s_info = getSendInfo(); if (s_info == NULL) { rc = ERETRY; goto cleanup_outer; } s_info->upper_data = data; while (frag_len > 0) { s_entry = call SendEntryPool.get(); outgoing = call FragPool.get(); if (s_entry == NULL || outgoing == NULL) { if (s_entry != NULL) call SendEntryPool.put(s_entry); if (outgoing != NULL) call FragPool.put(outgoing); // this will cause any fragments we have already enqueued to // be dropped by the send task. s_info->failed = TRUE; printf("drops: IP send: no fragments\n"); rc = ERETRY; goto done; } call BarePacket.clear(outgoing); frag_len = lowpan_frag_get(call Ieee154Send.getPayload(outgoing, 0), call BarePacket.maxPayloadLength(), msg, frame_addr, &ctx); if (frag_len < 0) { printf(" get frag error: %i\n", frag_len); } printf("fragment length: %i offset: %i\n", frag_len, ctx.offset); call BarePacket.setPayloadLength(outgoing, frag_len); if (frag_len <= 0) { call FragPool.put(outgoing); call SendEntryPool.put(s_entry); goto done; } if (call SendQueue.enqueue(s_entry) != SUCCESS) { BLIP_STATS_INCR(stats.encfail); s_info->failed = TRUE; printf("drops: IP send: enqueue failed\n"); goto done; } s_info->link_fragments++; s_entry->msg = outgoing; s_entry->info = s_info; /* configure the L2 */ if (frame_addr->ieee_dst.ieee_mode == IEEE154_ADDR_SHORT && frame_addr->ieee_dst.i_saddr == IEEE154_BROADCAST_ADDR) { call PacketLink.setRetries(s_entry->msg, 0); } else { call PacketLink.setRetries(s_entry->msg, BLIP_L2_RETRIES); } call PacketLink.setRetryDelay(s_entry->msg, BLIP_L2_DELAY); SENDINFO_INCR(s_info);} // printf("got %i frags\n", s_info->link_fragments); done: BLIP_STATS_INCR(stats.sent); SENDINFO_DECR(s_info); post sendTask(); cleanup_outer: return rc; } event void Ieee154Send.sendDone(message_t *msg, error_t error) { struct send_entry *s_entry = call SendQueue.head(); radioBusy = FALSE; // printf("sendDone: %p %i\n", msg, error); if (state == S_STOPPING) { call RadioControl.stop(); state = S_STOPPED; goto done; } s_entry->info->link_transmissions += (call PacketLink.getRetries(msg)); s_entry->info->link_fragment_attempts++; if (!call PacketLink.wasDelivered(msg)) { printf("sendDone: was not delivered! (%i tries)\n", call PacketLink.getRetries(msg)); s_entry->info->failed = TRUE; signal IPLower.sendDone(s_entry->info); /* if (s_entry->info->policy.dest[0] != 0xffff) */ /* dbg("Drops", "drops: sendDone: frag was not delivered\n"); */ // need to check for broadcast frames // BLIP_STATS_INCR(stats.tx_drop); } else if (s_entry->info->link_fragment_attempts == s_entry->info->link_fragments) { signal IPLower.sendDone(s_entry->info); } done: // kill off any pending fragments SENDINFO_DECR(s_entry->info); call FragPool.put(s_entry->msg); call SendEntryPool.put(s_entry); call SendQueue.dequeue(); post sendTask(); } #if 0 command struct tlv_hdr *IPExtensions.findTlv(struct ip6_ext *ext, uint8_t tlv_val) { int len = ext->len - sizeof(struct ip6_ext); struct tlv_hdr *tlv = (struct tlv_hdr *)(ext + 1); while (len > 0) { if (tlv->type == tlv_val) return tlv; if (tlv->len == 0) return NULL; tlv = (struct tlv_hdr *)(((uint8_t *)tlv) + tlv->len); len -= tlv->len; } return NULL; } #endif /* * BlipStatistics interface */ command void BlipStatistics.get(ip_statistics_t *statistics) { #ifdef BLIP_STATS_IP_MEM stats.fragpool = call FragPool.size(); stats.sendinfo = call SendInfoPool.size(); stats.sendentry= call SendEntryPool.size(); stats.sndqueue = call SendQueue.size(); stats.heapfree = ip_malloc_freespace(); printf("frag: %i sendinfo: %i sendentry: %i sendqueue: %i heap: %i\n", stats.fragpool, stats.sendinfo, stats.sendentry, stats.sndqueue, stats.heapfree); #endif memcpy(statistics, &stats, sizeof(ip_statistics_t)); } command void BlipStatistics.clear() { memclr((uint8_t *)&stats, sizeof(ip_statistics_t)); } /* default event void IP.recv[uint8_t nxt_hdr](struct ip6_hdr *iph, */ /* void *payload, */ /* struct ip_metadata *meta) { */ /* } */ /* default event void Multicast.recv[uint8_t scope](struct ip6_hdr *iph, */ /* void *payload, */ /* struct ip_metadata *meta) { */ /* } */ } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPExtensionP.nc000066400000000000000000000104751207233610700217260ustar00rootroot00000000000000 /* * Provides various functions for dealing with IP extension header * processing * */ #include #include "blip_printf.h" module IPExtensionP { provides { // for inserting destination and hop-by-hop headers on outgoing packets. // routing headers are handled through the IPRouting interface interface Init; interface TLVHeader as HopByHopExt[uint8_t client]; interface TLVHeader as DestinationExt[uint8_t client]; interface InternalIPExtension; } } implementation { struct generic_header *ext_dest, *ext_hop; command error_t Init.init() { ext_hop = ext_dest = NULL; return SUCCESS; } struct tlv_hdr *destopt_get(int i, int nxt_hdr, struct ip6_hdr *iph) { return signal DestinationExt.getHeader[i](0, nxt_hdr, iph); } struct tlv_hdr *hopopt_get(struct ip6_hdr *iph, int i) { //, uint8_t nxt_hdr) { // return signal HopByHopExt.getHeader[i](label, iph, nxt_hdr); return NULL; } /* build up a sequence of TLV headers for hop-by-hop or destination only extension headers */ struct generic_header *buildTLVHdr(struct split_ip_msg *msg, int which, int n, int nxt_hdr) { // allocate generic headers for all the possible TLV-encoded // headers we might get int i; uint8_t *buf = ip_malloc(sizeof(struct ip6_ext) + (sizeof(struct generic_header) * (n + 1))); struct ip6_ext *real_hdr; struct generic_header *ghdrs; if (buf == NULL) return NULL; ghdrs = (struct generic_header *)buf; real_hdr = (struct ip6_ext *)(ghdrs + (n + 1)); real_hdr->len = sizeof(struct ip6_ext); ghdrs[0].len = sizeof(struct ip6_ext); ghdrs[0].hdr.data = (uint8_t *)real_hdr; ghdrs[0].next = msg->headers; for (i = 0; i < n; i++) { struct tlv_hdr *this_hdr; if (which == 0) { printf("adding destination idx %i\n", i); this_hdr = signal DestinationExt.getHeader[i](0, nxt_hdr, &msg->hdr); } else { this_hdr = signal HopByHopExt.getHeader[i](0, nxt_hdr, &msg->hdr); } printf("buildTLV: got %p\n", this_hdr); if (this_hdr == NULL) continue; real_hdr->len += this_hdr->len; ghdrs[i+1].len = this_hdr->len; ghdrs[i+1].hdr.data = (uint8_t *)this_hdr; ghdrs[i].next = &ghdrs[i+1]; ghdrs[i+1].next = msg->headers; } if (real_hdr->len == sizeof(struct ip6_ext)) { ip_free(buf); return NULL; } else { real_hdr->nxt_hdr = msg->hdr.nxt_hdr; msg->headers = ghdrs; return ghdrs; } } command void InternalIPExtension.addHeaders(struct split_ip_msg *msg, uint8_t nxt_hdr, uint16_t label) { ext_dest = ext_hop = NULL; msg->hdr.nxt_hdr = nxt_hdr; ext_dest = buildTLVHdr(msg, 0, 1, nxt_hdr); if (ext_dest != NULL) msg->hdr.nxt_hdr = IPV6_DEST; ext_hop = buildTLVHdr(msg, 1, 1, msg->hdr.nxt_hdr); if (ext_hop != NULL) msg->hdr.nxt_hdr = IPV6_HOP; } command void InternalIPExtension.free() { if (ext_dest != NULL) ip_free(ext_dest); if (ext_hop != NULL) ip_free(ext_hop); ext_dest = ext_hop = NULL; // signal HopByHopExt.free[0](); // signal DestinationExt.free[0](); } #if 0 void ip_dump_msg(struct split_ip_msg *msg) { struct generic_header *cur = msg->headers; int i; printf("DUMPING IP PACKET\n "); for (i = 0; i < sizeof(struct ip6_hdr); i++) printf("0x%x ", ((uint8_t *)&msg->hdr)[i]); printf("\n"); while (cur != NULL) { printf(" header [%i]: ", cur->len); for (i = 0; i < cur->len; i++) printf("0x%x ", cur->hdr.data[i]); printf("\n"); cur = cur->next; } printf("data [%i]: ", msg->data_len); for (i = 0; i < msg->data_len; i++) printf("0x%x ", ((uint8_t *)msg->data)[i]); printf("\n\n"); } #endif default event struct tlv_hdr *DestinationExt.getHeader[uint8_t i](int label,int nxt_hdr, struct ip6_hdr *msg) { printf("default dest handler?\n"); return NULL; } default event struct tlv_hdr *HopByHopExt.getHeader[uint8_t i](int label,int nxt_hdr, struct ip6_hdr *msg) { return NULL; } } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPExtensionsP.nc000066400000000000000000000012431207233610700221020ustar00rootroot00000000000000 module IPExtensionsP { provides interface IPExtensions[uint8_t client]; uses interface IPExtensions; } implementation { command struct tlv_hdr *findTlv(struct ip6_ext *ext, uint8_t tlv) { } event void handleExtensions(uint8_t label, struct ip6_hdr *iph, struct ip6_ext *hop, struct ip6_ext *dst, struct ip6_route *route, uint8_t nxt_hdr) { } /* * will be called once for each fragment when sending or forwarding */ event void reportTransmission(uint8_t label, send_policy_t *send) { } } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPForwardingEngineP.nc000066400000000000000000000314231207233610700231760ustar00rootroot00000000000000/** * Forwarding abstractions for blip IPv6 stack. * * Routing protocols can manipulate the forwarding state using the * ForwardingTable interface and receive notifications of forwarding * events using ForwardingEvents. In particular, the forwarding * events are useful for datapath validation and updating link * estimates. * * @author Stephen Dawson-Haggerty */ #include #include #include "blip_printf.h" module IPForwardingEngineP { provides { interface ForwardingTable; interface ForwardingTableEvents; interface ForwardingEvents[uint8_t ifindex]; interface IP; interface IP as IPRaw; interface Init; } uses { interface IPForward[uint8_t ifindex]; interface IPAddress; interface IPPacket; interface Pool; #ifdef PRINTFUART_ENABLED interface Timer as PrintTimer; #endif interface Leds; } } implementation { #define min(X,Y) (((X) < (Y)) ? (X) : (Y)) /* simple routing table for now */ /* we can optimize memory consumption later since most of these address will have known prefixes -- either LL or the shared global prefix. */ /* the routing table is sorted by prefix length, so that the entries with the longest prefix are at the top. */ /* if a route to the given prefix already exists, this updates it. */ struct route_entry routing_table[ROUTE_TABLE_SZ]; route_key_t last_key = 1; command error_t Init.init() { memset(routing_table, 0, sizeof(routing_table)); } int alloc_key() { int i; int key; retry: key = last_key++; for (i = 0; i < ROUTE_TABLE_SZ; i++) { if (routing_table[i].valid && routing_table[i].key == key) goto retry; } return key; } struct route_entry *alloc_entry(int pfxlen) { int i; /* full table */ if (routing_table[ROUTE_TABLE_SZ-1].valid) return NULL; for (i = 0; i < ROUTE_TABLE_SZ; i++) { /* if there's an invalid entry there are spare entries and we don't have to insert in the middle of the table. */ if (!routing_table[i].valid) goto init_entry; /* we keep the table sorted by prefix length so we skip all the entries with longer prefixes. */ else if (routing_table[i].prefixlen >= pfxlen) continue; /* we're pointing at a valid entry that is our new slot; we know there's at least one free entry in the table, too. */ /* shift the table down and return the current entry; */ memmove((void *)&routing_table[i+1], (void *)&routing_table[i], sizeof(struct route_entry) * (ROUTE_TABLE_SZ - i - 1)); goto init_entry; } return NULL; init_entry: routing_table[i].valid = 1; routing_table[i].key = alloc_key(); return &routing_table[i]; } task void defaultRouteAddedTask() { signal ForwardingTableEvents.defaultRouteAdded(); } command route_key_t ForwardingTable.addRoute(const uint8_t *prefix, int prefix_len_bits, struct in6_addr *next_hop, uint8_t ifindex) { struct route_entry *entry; /* no reason to support non-byte length prefixes for now... */ if (prefix_len_bits % 8 != 0 || prefix_len_bits > 128) return ROUTE_INVAL_KEY; entry = call ForwardingTable.lookupRoute(prefix, prefix_len_bits); if (entry == NULL || entry->prefixlen != prefix_len_bits) { /* if there's no entry, or there's another entry but it has a different prefix length, we allocate a new slot in the table. */ entry = alloc_entry(prefix_len_bits); /* got a default route and we didn't already have one */ if (prefix_len_bits == 0) { post defaultRouteAddedTask(); } } if (entry == NULL) return ROUTE_INVAL_KEY; entry->prefixlen = prefix_len_bits; entry->ifindex = ifindex; memcpy(&entry->prefix, prefix, prefix_len_bits / 8); if (next_hop) memcpy(&entry->next_hop, next_hop, sizeof(struct in6_addr)); return entry->key; } command error_t ForwardingTable.delRoute(route_key_t key) { int i; for (i = 0; i < ROUTE_TABLE_SZ; i++) { if (routing_table[i].key == key) { /* remove the default route? */ if (routing_table[i].prefixlen == 0) { signal ForwardingTableEvents.defaultRouteRemoved(); } memmove((void *)&routing_table[i], (void *)&routing_table[i+1], sizeof(struct route_entry) * (ROUTE_TABLE_SZ - i - 1)); routing_table[ROUTE_TABLE_SZ-1].valid = 0; return SUCCESS; } } return FAIL; } /** * Look up the route to a prefix. * * If next_hop is not NULL, the next hop will be written in there. * @return the route key associated with this route. */ command struct route_entry *ForwardingTable.lookupRoute(const uint8_t *prefix, int prefix_len_bits) { int i; for (i = 0; i < ROUTE_TABLE_SZ; i++) { if (routing_table[i].valid && ((routing_table[i].prefixlen == 0) || (memcmp(prefix, routing_table[i].prefix.s6_addr, min(prefix_len_bits, routing_table[i].prefixlen) / 8) == 0 && prefix_len_bits))) { /* match! */ return &routing_table[i]; } } return NULL; } command struct route_entry *ForwardingTable.lookupRouteKey(route_key_t key) { int i; for (i = 0; i < ROUTE_TABLE_SZ; i++) { if (routing_table[i].valid && routing_table[i].key == key) return &routing_table[i]; } return NULL; } command struct route_entry *ForwardingTable.getTable(int *n) { *n = ROUTE_TABLE_SZ; return routing_table; } error_t do_send(uint8_t ifindex, struct in6_addr *next, struct ip6_packet *pkt) { error_t rc; struct in6_iid *iid = call Pool.get(); if (iid != NULL) memcpy(iid->data, &next->s6_addr[8], 8); rc = call IPForward.send[ifindex](next, pkt, iid); if (rc != SUCCESS && iid != NULL) call Pool.put(iid); return rc; } command error_t IP.send(struct ip6_packet *pkt) { struct route_entry *next_hop_entry = call ForwardingTable.lookupRoute(pkt->ip6_hdr.ip6_dst.s6_addr, 128); #ifdef PRINTFUART_ENABLED if (!call PrintTimer.isRunning()) call PrintTimer.startPeriodic(10000); #endif if (call IPAddress.isLocalAddress(&pkt->ip6_hdr.ip6_dst) && pkt->ip6_hdr.ip6_dst.s6_addr[0] != 0xff) { printf("Forwarding -- send with local unicast address!\n"); return FAIL; } else if (call IPAddress.isLLAddress(&pkt->ip6_hdr.ip6_dst) && (!next_hop_entry || next_hop_entry->prefixlen < 128)) { /* in this case, we need to figure out which interface the source address is attached to, and send the packet out on that interface. */ /* with traditional ND we would check the cache for each interface and then start discover on all of them; however, since we're assuming that link-local addresses are on-link for the 15.4 side, we just send all LL addresses that way. */ /* this is probably the worst part about not doing ND -- LL addressed don't work on other links... we should probably do ND in this case, or at least keep a cache so we can reply to messages on the right interface. */ printf("Forwarding -- send to LL address:"); printf_in6addr(&pkt->ip6_hdr.ip6_dst); printf("\n"); pkt->ip6_hdr.ip6_hlim = 1; // only do this for unicast packets if (pkt->ip6_hdr.ip6_dst.s6_addr[0] != 0xff) { return do_send(ROUTE_IFACE_154, &pkt->ip6_hdr.ip6_dst, pkt); } else { return call IPForward.send[ROUTE_IFACE_154](&pkt->ip6_hdr.ip6_dst, pkt, NULL); } } else if (next_hop_entry) { printf("Forwarding -- got from routing table\n"); /* control messages do not need routing headers */ if (!(signal ForwardingEvents.initiate[next_hop_entry->ifindex](pkt, &next_hop_entry->next_hop))) return FAIL; return do_send(next_hop_entry->ifindex, &next_hop_entry->next_hop, pkt); } return FAIL; } command error_t IPRaw.send(struct ip6_packet *pkt) { return FAIL; } event void IPForward.recv[uint8_t ifindex](struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta) { struct ip6_packet pkt; struct in6_addr *next_hop; size_t len = ntohs(iph->ip6_plen); route_key_t next_hop_key = ROUTE_INVAL_KEY; uint8_t next_hop_ifindex; struct ip_iovec v = { .iov_next = NULL, .iov_base = payload, .iov_len = len, }; /* signaled before *any* processing */ signal IPRaw.recv(iph, payload, len, meta); if (call IPAddress.isLocalAddress(&iph->ip6_dst)) { /* local delivery */ // printf("Local delivery\n"); signal IP.recv(iph, payload, len, meta); } else { /* forwarding */ uint8_t nxt_hdr = IPV6_ROUTING; int header_off = call IPPacket.findHeader(&v, iph->ip6_nxt, &nxt_hdr); if (!(--iph->ip6_hlim)) { /* ICMP may send time exceeded */ // call ForwardingEvents.drop(iph, payload, len, ROUTE_DROP_HLIM); return; } if (header_off >= 0) { // we found a routing header in the packet // look up the next hop in the header if we understand it (type 4) // TODO // next_hop_ifindex = ifindex; return; } else { /* look up the next hop in the routing table */ struct route_entry *next_hop_entry = call ForwardingTable.lookupRoute(iph->ip6_dst.s6_addr, 128); if (next_hop_entry == NULL) { /* oops, no route. */ /* RPL will reencapsulate the packet in some cases here */ // call ForwardingEvents.drop(iph, payload, len, ROUTE_DROP_NOROUTE); return; } next_hop = &next_hop_entry->next_hop; next_hop_key = next_hop_entry->key; next_hop_ifindex = next_hop_entry->ifindex; } memcpy(&pkt.ip6_hdr, iph, sizeof(struct ip6_hdr)); pkt.ip6_data = &v; pkt.ip6_inputif = ifindex; /* give the routing protocol a chance to do data-path validation on this packet. */ /* RPL uses this to update the flow label fields */ if (!(signal ForwardingEvents.approve[next_hop_ifindex](&pkt, next_hop))) return; do_send(next_hop_ifindex, next_hop, &pkt); } } event void IPForward.sendDone[uint8_t ifindex](struct send_info *status) { struct in6_addr next; struct in6_iid *iid = (struct in6_iid *)status->upper_data; memset(next.s6_addr, 0, 16); next.s6_addr16[0] = htons(0xfe80); printf("sendDone: iface: %i key: %p\n", ifindex, iid); if (iid != NULL) { memcpy(&next.s6_addr[8], iid->data, 8); signal ForwardingEvents.linkResult[ifindex](&next, status); call Pool.put(iid); } } #ifdef PRINTFUART_ENABLED event void PrintTimer.fired() { int i; printf("\ndestination gateway interface\n"); for (i = 0; i < ROUTE_TABLE_SZ; i++) { if (routing_table[i].valid) { printf_in6addr(&routing_table[i].prefix); printf("/%i\t\t", routing_table[i].prefixlen); printf_in6addr(&routing_table[i].next_hop); printf("\t\t%i\n", routing_table[i].ifindex); } } printf("\n"); printfflush(); } #endif default event bool ForwardingEvents.approve[uint8_t idx](struct ip6_packet *pkt, struct in6_addr *next_hop) { return TRUE; } default event bool ForwardingEvents.initiate[uint8_t idx](struct ip6_packet *pkt, struct in6_addr *next_hop) { return TRUE; } default event void ForwardingEvents.linkResult[uint8_t idx](struct in6_addr *host, struct send_info * info) {} default command error_t IPForward.send[uint8_t ifindex](struct in6_addr *next_hop, struct ip6_packet *pkt, void *data) { // if (ifindex == ROUTE_IFACE_ALL) { // call IPForward.send[ROUTE_IFACE_PPP](next_hop, pkt, data); // call IPForward.send[ROUTE_IFACE_154](next_hop, pkt, data); // } return SUCCESS; } default event void IPRaw.recv(struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) {} default event void ForwardingTableEvents.defaultRouteAdded() {} default event void ForwardingTableEvents.defaultRouteRemoved() {} event void IPAddress.changed(bool global_valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPNeighborDiscoveryC.nc000066400000000000000000000007211207233610700233530ustar00rootroot00000000000000 configuration IPNeighborDiscoveryC { provides { interface NeighborDiscovery; interface IPForward; } uses { interface IPLower; } } implementation { components IPNeighborDiscoveryP, IPAddressC, Ieee154AddressC; NeighborDiscovery = IPNeighborDiscoveryP; IPForward = IPNeighborDiscoveryP; IPNeighborDiscoveryP.IPLower = IPLower; IPNeighborDiscoveryP.IPAddress -> IPAddressC; IPNeighborDiscoveryP.Ieee154Address -> Ieee154AddressC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPNeighborDiscoveryP.nc000066400000000000000000000104751207233610700233770ustar00rootroot00000000000000/** * Neighbor Discovery for blip * * In IPv6, neighbor discovery resolves IPv6 addresses which have been * determined to be on-link to their associated link-layer addresses. * This simple component follows the advice of 6lowpan-nd, which * states that link-local addresses are derived from the associated * link-layer addressed deterministically. Therefore, we can do a * very simple translation between the two types of addresses. * * In the future, implementors could consider adding more complicated * address resolution mechanisms here. * * @author Stephen Dawson-Haggerty */ #include #include "blip_printf.h" module IPNeighborDiscoveryP { provides { interface IPForward; interface NeighborDiscovery; } uses { interface IPLower; interface IPAddress; interface Ieee154Address; } } implementation { command int NeighborDiscovery.matchContext(struct in6_addr *addr, uint8_t *ctx) { struct in6_addr me; if (!(call IPAddress.getGlobalAddr(&me))) return 0; if (memcmp(me.s6_addr, addr->s6_addr, 8) == 0) { *ctx = 0; return 64; } else { return 0; } } command int NeighborDiscovery.getContext(uint8_t context, struct in6_addr *ctx) { struct in6_addr me; if (!(call IPAddress.getGlobalAddr(&me))) return 0; if (context == 0) { // memset(ctx->s6_addr, 0, 8); // ctx->s6_addr16[0] = htons(0xaaaa); memcpy(ctx->s6_addr, me.s6_addr, 8); return 64; } else { return 0; } } command error_t NeighborDiscovery.resolveAddress(struct in6_addr *addr, ieee154_addr_t *link_addr) { ieee154_panid_t panid = letohs(call Ieee154Address.getPanId()); if (addr->s6_addr16[0] == htons(0xfe80)) { if (addr->s6_addr16[5] == htons(0x00FF) && addr->s6_addr16[6] == htons(0xFE00)) { /* U bit must not be set if a short address is in use */ if (ntohs(addr->s6_addr16[4]) == (panid & ~0x0200)) { link_addr->ieee_mode = IEEE154_ADDR_SHORT; link_addr->i_saddr = htole16(ntohs(addr->s6_addr16[7])); } else { return FAIL; } } else { int i; link_addr->ieee_mode = IEEE154_ADDR_EXT; for (i = 0; i < 8; i++) link_addr->i_laddr.data[i] = addr->s6_addr[15 - i]; link_addr->i_laddr.data[7] ^= 0x2; /* toggle U/L */ } return SUCCESS; } else if (addr->s6_addr[0] == 0xff) { /* LL - multicast */ if ((addr->s6_addr[1] & 0x0f) == 0x02) { link_addr->ieee_mode = IEEE154_ADDR_SHORT; link_addr->i_saddr = IEEE154_BROADCAST_ADDR; return SUCCESS; } } /* only resolve Link-Local addresses */ return FAIL; } /**************** Send and Receive path of the stack ****************/ /* this is where the translation to L2 addresses take place */ command error_t IPForward.send(struct in6_addr *next, struct ip6_packet *msg, void *ptr) { struct ieee154_frame_addr fr_addr; struct in6_addr local_addr; fr_addr.ieee_dstpan = call Ieee154Address.getPanId(); call IPAddress.getLLAddr(&local_addr); printf("IPNeighborDiscovery - send - next: "); printf_in6addr(next); printf(" - ll source: "); printf_in6addr(&local_addr); printf("\n"); // iov_print(msg->ip6_data); if (call NeighborDiscovery.resolveAddress(&local_addr, &fr_addr.ieee_src) != SUCCESS) { printf("IPND - local address resolution failed\n"); return FAIL; } if (call NeighborDiscovery.resolveAddress(next, &fr_addr.ieee_dst) != SUCCESS) { printf("IPND - next-hop address resolution failed\n"); return FAIL; } printf("l2 source: "); printf_buf(fr_addr.ieee_src.i_laddr.data, 8); printf("l2 dest: "); printf_buf(fr_addr.ieee_dst.i_laddr.data, 8); printf("\n"); return call IPLower.send(&fr_addr, msg, ptr); } event void IPLower.recv(struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta) { signal IPForward.recv(iph, payload, meta); } event void IPLower.sendDone(struct send_info *status) { signal IPForward.sendDone(status); } event void Ieee154Address.changed() {} event void IPAddress.changed(bool global_valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPPacketC.nc000066400000000000000000000066731207233610700211510ustar00rootroot00000000000000 #include #include #include #include "blip_printf.h" module IPPacketC { provides interface IPPacket; } implementation { #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) /* * @type the next header value to look for. valid choices are in * ip.h and can be any valid IANA next-header value. The special * value IP6PKT_TRANSPORT will return the offset of the transport * header (ie, the first header which is not an IPv6 extension * header). * @return the offset of the start of a given header within the * packet, or -1 if it was not found. */ command int IPPacket.findHeader(struct ip_iovec *payload, uint8_t first_type, uint8_t *search_type) { int off = 0; uint8_t nxt = first_type; struct ip6_ext ext; /* ignore extension headers until we find the desired header type or reach the transport-layer header. */ while ((*search_type == IP6PKT_TRANSPORT && (nxt == IPV6_HOP || nxt == IPV6_ROUTING || nxt == IPV6_FRAG || nxt == IPV6_DEST || nxt == IPV6_MOBILITY)) || // consider IPV6_IPV6 a transport type (*search_type != IP6PKT_TRANSPORT && *search_type != nxt)) { if (iov_read(payload, off, sizeof(ext), (void *)&ext) != sizeof(ext)) return -1; nxt = ext.ip6e_nxt; off += (ext.ip6e_len + 1) * 8; } if (*search_type == IP6PKT_TRANSPORT) *search_type = nxt; if (nxt == IPV6_NONEXT) return -1; else return off; } /** * Find a TLV-encoded suboption inside of an IPv6 extension header. * * @header iovec holding the packet data * @ext_offset the offset to the first byte of the extension header * @type the TLV type value we're looking for * * @return the offset to the first byte of the matching TLV header, or -1 */ command int IPPacket.findTLV(struct ip_iovec *header, int ext_offset, uint8_t type) { struct ip6_ext ext; struct tlv_hdr tlv; int off = ext_offset; if (iov_read(header, off, sizeof(ext), (void *)&ext) != sizeof(ext)) return -1; off += sizeof(ext); while (off - ext_offset < (ext.ip6e_len + 1) * 8) { if (iov_read(header, off, sizeof(tlv), (void *)&tlv) != sizeof(tlv)) return -1; if (tlv.type == type) return off; else off += sizeof(tlv) + tlv.len; } return -1; } command void IPPacket.delTLV(struct ip_iovec *data, int ext_offset, uint8_t type) { uint8_t buf[4]; struct tlv_hdr tlv; // find the TLV option inside the header ext_offset = call IPPacket.findTLV(data, ext_offset, type); if (ext_offset < 0) return; if (iov_read(data, ext_offset, sizeof(tlv), (void *)&tlv) != sizeof(tlv)) return; buf[0] = IPV6_TLV_PADN; // change the search TLV to a PadN option iov_update(data, ext_offset + offsetof(struct tlv_hdr, type), 1, &buf[0]); memclr(buf, sizeof(buf)); ext_offset += sizeof(struct tlv_hdr); #if 0 // RFC2460 tells us to PadN options have to be zero-filled // you can do that if you want, but I'm leaving this disabled // because it's useful for debugging to see what the RPL options // were -- SDH // and overwrite the contents with zeroes while (tlv.len > 0) { int write_amt = MIN(tlv.len, sizeof(buf)); iov_update(data, ext_offset, write_amt, buf); ext_offset += write_amt; tlv.len -= write_amt; } #endif } } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPProtocolsP.nc000066400000000000000000000036771207233610700217440ustar00rootroot00000000000000 #include #include #include "blip_printf.h" module IPProtocolsP { provides { interface IP[uint8_t nxt_hdr]; } uses { interface IPAddress; interface IP as SubIP; interface IPPacket; } } implementation { event void SubIP.recv(struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) { int payload_off; uint8_t nxt_hdr; struct ip_iovec v = { .iov_base = payload, .iov_len = len, .iov_next = NULL, }; // Check whether the packet has a fragment extension header indicating // actual fragmentation. If so, discard --- we don't handle fragmentation, // and delivering fragments as complete packets is not really a good idea... nxt_hdr=IPV6_FRAG; payload_off = call IPPacket.findHeader(&v, iph->ip6_nxt, &nxt_hdr); if (payload_off>=0 && ((uint16_t*)((uint8_t*)payload+payload_off))[1]!=0) return; // find the transport header and deliver -- nxt_hdr is updated by findHeader nxt_hdr=IP6PKT_TRANSPORT; payload_off = call IPPacket.findHeader(&v, iph->ip6_nxt, &nxt_hdr); printf("IPProtocols - deliver -- off: %i\n", payload_off); if (payload_off >= 0) { signal IP.recv[nxt_hdr](iph, ((uint8_t *)payload) + payload_off, len - payload_off, meta); } } command error_t IP.send[uint8_t nxt_hdr](struct ip6_packet *msg) { msg->ip6_hdr.ip6_vfc = IPV6_VERSION; msg->ip6_hdr.ip6_hops = 16; printf("IP Protocol send - nxt_hdr: %i iov_len: %i plen: %u\n", nxt_hdr, iov_len(msg->ip6_data), ntohs(msg->ip6_hdr.ip6_plen)); return call SubIP.send(msg); } default event void IP.recv[uint8_t nxt_hdr](struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) {} event void IPAddress.changed(bool global_valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPStackC.nc000066400000000000000000000060251207233610700207760ustar00rootroot00000000000000/** * Wire together the IP stack * * To make it somewhat flexible, the stack consists of four main * layers: Protocol, Routing, NeighborDiscovery, and Dispatch. This * component wires them together. * * Protocol: dispatch based on the final next header value in an * ipv6_packet. * * Routing: determine the next-hop for a packet as a link-local * address. This is accomplished by looking up the destination * address in the forwarding table. * * NeighborDiscovery: responsible for address resolution. Very * simple, since only link-local addresses are considered to be * on-link. * * Dispatch: okay, this one's badly named. It's the 6lowpan engine * which talks to a packet radio on the bottom and presents fully * reassembled and decompressed IPv6 packets on top. This means most * of the stack can ignore the fact that there's all this magic going * on. * * @author Stephen Dawson-Haggerty */ #include configuration IPStackC { provides { interface SplitControl; interface IP[uint8_t nxt_hdr]; interface IP as IPRaw; interface ForwardingTable; interface ForwardingTableEvents; interface ForwardingEvents[uint8_t ifindex]; } uses { /* provided to stack components to turn themselves on and off */ interface StdControl; interface StdControl as RoutingControl; } } implementation { components IPProtocolsP, IPForwardingEngineP as FwdP, IPNeighborDiscoveryC as NdC, IPDispatchC; components IPStackControlP; SplitControl = IPStackControlP; IPStackControlP.StdControl = StdControl; IPStackControlP.RoutingControl = RoutingControl; IPStackControlP.SubSplitControl -> IPDispatchC; ForwardingTable = FwdP; ForwardingTableEvents = FwdP; ForwardingEvents = FwdP; /* wiring up of the IP stack */ IP = IPProtocolsP; /* top layer - dispatch protocols */ IPProtocolsP.SubIP -> FwdP.IP; /* routing layer - provision next hops */ /* this wiring for an 802.15.4 stack */ FwdP.IPForward[ROUTE_IFACE_154] -> NdC; /* this layer translates L3->L2 addresses */ NdC.IPLower -> IPDispatchC.IPLower; /* wire to the 6lowpan engine */ IPRaw = FwdP.IPRaw; /* wire in core protocols -- this is only protocol included by default */ /* it pretty much just replies to pings... */ components ICMPCoreP, LedsC; components IPAddressC, IPPacketC; ICMPCoreP.IP -> IPProtocolsP.IP[IANA_ICMP]; ICMPCoreP.Leds -> LedsC; ICMPCoreP.IPAddress -> IPAddressC; FwdP.IPAddress -> IPAddressC; FwdP.IPPacket -> IPPacketC; IPProtocolsP.IPPacket -> IPPacketC; IPStackControlP.IPAddress -> IPAddressC; FwdP.Leds -> LedsC; components new PoolC(struct in6_iid, N_CONCURRENT_SENDS) as FwdAddrPoolC; FwdP.Pool -> FwdAddrPoolC; #if defined(IN6_PREFIX) components MainC, NoDhcpC; NoDhcpC.Boot -> MainC; NoDhcpC.IPAddress -> IPAddressC; #elif ! defined(IN6_NO_GLOBAL) components Dhcp6RelayC; components Dhcp6ClientC; #endif #ifdef PRINTFUART_ENABLED components new TimerMilliC(); FwdP.PrintTimer -> TimerMilliC; #endif } tinyos-2.1.2+dfsg/tos/lib/net/blip/IPStackControlP.nc000066400000000000000000000024771207233610700223630ustar00rootroot00000000000000 module IPStackControlP { provides interface SplitControl; uses { interface StdControl; interface StdControl as RoutingControl; interface SplitControl as SubSplitControl; interface IPAddress; } } implementation { command error_t SplitControl.start() { return call SubSplitControl.start(); } event void SubSplitControl.startDone(error_t error) { struct in6_addr addr; if (error == SUCCESS) { call StdControl.start(); } // if we have a global address, we can start any routing protocols now. if (call IPAddress.getGlobalAddr(&addr)) { call RoutingControl.start(); } signal SplitControl.startDone(error); } command error_t SplitControl.stop() { call StdControl.stop(); call RoutingControl.stop(); return call SubSplitControl.stop(); } event void SubSplitControl.stopDone(error_t error) { signal SplitControl.stopDone(error); } event void IPAddress.changed(bool valid) { if (valid) call RoutingControl.start(); else call RoutingControl.stop(); } default command error_t StdControl.start() { return SUCCESS; } default command error_t StdControl.stop() { return SUCCESS; } default command error_t RoutingControl.start() { return SUCCESS; } default command error_t RoutingControl.stop() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/blip/Ieee154AddressC.nc000066400000000000000000000006711207233610700221100ustar00rootroot00000000000000 configuration Ieee154AddressC { provides interface Ieee154Address; } implementation { components Ieee154AddressP; components LocalIeeeEui64C; components MainC; Ieee154Address = Ieee154AddressP; MainC.SoftwareInit -> Ieee154AddressP; Ieee154AddressP.LocalIeeeEui64 -> LocalIeeeEui64C; // workaround until the radio stack uses this interface components CC2420ControlC; Ieee154AddressP.CC2420Config -> CC2420ControlC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/Ieee154AddressP.nc000066400000000000000000000022361207233610700221240ustar00rootroot00000000000000 module Ieee154AddressP { provides { interface Init; interface Ieee154Address; } uses { interface LocalIeeeEui64; interface CC2420Config; } } implementation { ieee154_saddr_t m_saddr; ieee154_panid_t m_panid; command error_t Init.init() { m_saddr = TOS_NODE_ID; m_panid = TOS_AM_GROUP; return SUCCESS; } command ieee154_panid_t Ieee154Address.getPanId() { return m_panid; } command ieee154_saddr_t Ieee154Address.getShortAddr() { return m_saddr; } command ieee154_laddr_t Ieee154Address.getExtAddr() { ieee154_laddr_t addr = call LocalIeeeEui64.getId(); int i; uint8_t tmp; /* the LocalIeeeEui is big endian */ /* however, Ieee 802.15.4 addresses are little endian */ for (i = 0; i < 4; i++) { tmp = addr.data[i]; addr.data[i] = addr.data[7 - i]; addr.data[7 - i] = tmp; } return addr; } command error_t Ieee154Address.setShortAddr(ieee154_saddr_t addr) { m_saddr = addr; call CC2420Config.setShortAddr(addr); call CC2420Config.sync(); signal Ieee154Address.changed(); return SUCCESS; } event void CC2420Config.syncDone(error_t err) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/MulticastP.nc000066400000000000000000000144441207233610700214660ustar00rootroot00000000000000 #include #include #include "Statistics.h" #include "ipmulticast.h" #define MAX_MSG_COUNT 5 // only send multicast messages this many times module MulticastP { provides { interface Init; interface IP[uint8_t nxt_hdr]; interface Statistics; } uses { interface IP as MulticastRx[uint8_t nxt_hdr]; interface TLVHeader as HopHeader; interface TrickleTimer; interface IPExtensions; } } implementation { bool trickle_running; uint16_t last_seqno; uint8_t fw_hdr; struct split_ip_msg fw_msg; uint8_t fw_data[MCAST_FW_MAXLEN]; int fw_data_len; uint8_t msg_count; command error_t Init.init() { last_seqno = 0; return SUCCESS; } void startNewMsg(struct ip6_hdr *iph, uint8_t nxt_hdr) { // store a copy of the message for forwarding ip_memclr((void *)&fw_msg, sizeof(struct split_ip_msg)); ip_memcpy(&fw_msg.hdr, iph, sizeof(struct ip6_hdr)); fw_hdr = nxt_hdr; fw_msg.headers = NULL; fw_msg.data = fw_data; fw_msg.data_len = fw_data_len; msg_count = 0; // printfUART("MCAST: startNewMsg\n"); call TrickleTimer.stop(); call TrickleTimer.reset(); call TrickleTimer.start(); } /* * receive all IP datagrams. * we store and forward ones with scope 3 */ event void MulticastRx.recv[uint8_t nxt_hdr](struct ip6_hdr *iph, void *payload, struct ip_metadata *meta) { struct ip6_ext *hop; struct tlv_hdr *mcast_tlv; struct mcast_hdr *mcast; // no sequence number attached? // printfUART("MCAST: recv\n"); if (iph->nxt_hdr != IPV6_HOP) { goto deliver; } hop = (struct ip6_ext *)(iph + 1); mcast_tlv = call IPExtensions.findTlv(hop, TLV_TYPE_MCASTSEQ); mcast = (struct mcast_hdr *)mcast_tlv; // no mcast sequence number? if (mcast == NULL) { goto deliver; } if (ntohs(mcast->mcast_seqno) > last_seqno || (last_seqno > 0xfff0 && ntohs(mcast->mcast_seqno) < 0x0f)) { uint16_t length = ntohs(iph->plen); if (length < MCAST_FW_MAXLEN) { // printfUART("MCAST: seqno was: %i now: %i\n", last_seqno, ntohs(mcast->mcast_seqno)); last_seqno = ntohs(mcast->mcast_seqno); memcpy(fw_data, payload, length); fw_data_len = length; startNewMsg(iph, nxt_hdr); // printfUART("MCAST: starting new mcast message seqno: %i\n", last_seqno); } goto deliver; } else if (ntohs(mcast->mcast_seqno) == last_seqno && memcmp(iph->ip6_src.s6_addr, fw_msg.hdr.ip6_src.s6_addr, 16) == 0) { // received a retranmission. just update the trickle timer. // printfUART("MCAST: received consistent transmission, seqno: %d\n", ntohs(mcast->mcast_seqno)); call TrickleTimer.incrementCounter(); } return; deliver: signal IP.recv[nxt_hdr](iph, payload, meta); } /* * add sequence numbers to outgoing multicast packets so we can * detect when there are new ones. */ event struct tlv_hdr *HopHeader.getHeader(int label,int nxt_hdr, struct ip6_hdr *iph) { // only add sequence number headers to outgoing flood messages static struct mcast_hdr hdr; if (iph->ip6_dst.s6_addr16[0] != htons(0xff03)) return NULL; // printfUART("MCAST: adding multicast header, seqno: %d\n",last_seqno); hdr.tlv.type = TLV_TYPE_MCASTSEQ; hdr.tlv.len = sizeof(struct mcast_hdr); hdr.mcast_seqno = htons(last_seqno); return (struct tlv_hdr *)&hdr; } event void HopHeader.free() {} event void TrickleTimer.fired() { // it's that easy... the sequence number will get added when // outgoing headers are added. fw_msg.headers = NULL; fw_msg.hdr.nxt_hdr = fw_hdr; fw_msg.hdr.plen = htons(fw_data_len); fw_msg.data_len = fw_data_len; call MulticastRx.bareSend[fw_hdr](&fw_msg, NULL, IP_MCAST); msg_count = msg_count + 1; if (msg_count >= MAX_MSG_COUNT) { msg_count = 0; call TrickleTimer.stop(); } } command error_t IP.send[uint8_t nxt_hdr](struct split_ip_msg *msg) { if (msg->hdr.ip6_dst.s6_addr[0] == 0xff) { if ((msg->hdr.ip6_dst.s6_addr[1] & 0x0f) == 0x3) { int total_length = ntohs(msg->hdr.plen); unsigned char *cur = fw_data; struct generic_header *g_hdr; if (total_length > MCAST_FW_MAXLEN) return FAIL; last_seqno++; startNewMsg(&msg->hdr, nxt_hdr); fw_data_len = total_length; g_hdr = msg->headers; while (g_hdr != NULL) { total_length -= g_hdr->len; if (total_length < 0) goto fail; memcpy(cur, g_hdr->hdr.data, g_hdr->len); cur +=g_hdr->len; g_hdr = g_hdr->next; } if (msg->data_len > total_length) goto fail; memcpy(cur, msg->data, msg->data_len); return SUCCESS; fail: call TrickleTimer.stop(); return FAIL; } else { return call MulticastRx.bareSend[nxt_hdr](msg, NULL, IP_MCAST); } } return SUCCESS; } command error_t IP.bareSend[uint8_t prot](struct split_ip_msg *msg, struct ip6_route *route, int flags) { if (msg->hdr.ip6_dst.s6_addr[0] == 0xff) { return call MulticastRx.bareSend[prot](msg, route, flags | IP_MCAST); } else { return SUCCESS; } } event void IPExtensions.reportTransmission(uint8_t label, send_policy_t *policy) { } event void IPExtensions.handleExtensions(uint8_t label, struct ip6_hdr *iph, struct ip6_ext *hop, struct ip6_ext *dst, struct ip6_route *route, uint8_t nxt_hdr) { } default event void IP.recv[uint8_t nxt_hdr](struct ip6_hdr *iph, void *payload, struct ip_metadata *meta) { } command void Statistics.get(mcast_statistics_t *stats) { stats->lsn = last_seqno; } /* * Reset whatever statistics are being collected. */ command void Statistics.clear() {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/README000066400000000000000000000040431207233610700177310ustar00rootroot00000000000000# @author Stephen Dawson-Haggerty */ configuration ReadLqiC { provides interface ReadLqi; } implementation { #if defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || \ defined(PLATFORM_EPIC) || defined(PLATFORM_SHIMMER) || \ defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || \ defined(PLATFORM_Z1) // cc2420 platforms components CC2420ReadLqiC, CC2420PacketC; ReadLqi = CC2420ReadLqiC; CC2420ReadLqiC.CC2420Packet -> CC2420PacketC; #elif defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) components RF230ReadLqiC, RF230Ieee154MessageC; ReadLqi = RF230ReadLqiC; RF230ReadLqiC.SubLqi -> RF230Ieee154MessageC.PacketLinkQuality; RF230ReadLqiC.SubRssi -> RF230Ieee154MessageC.PacketRSSI; #else #error "No radio support is available for your platform" #endif } tinyos-2.1.2+dfsg/tos/lib/net/blip/ResourceSendP.nc000066400000000000000000000025451207233610700221210ustar00rootroot00000000000000 #include module ResourceSendP { provides interface Ieee154Send; uses interface Resource; uses interface Ieee154Send as SubSend; } implementation { ieee154_saddr_t m_addr; message_t *m_msg = NULL; uint8_t m_len; command error_t Ieee154Send.send(ieee154_saddr_t addr, message_t* msg, uint8_t len) { if (m_msg != NULL) return EBUSY; m_addr = addr; m_msg = msg; m_len = len; call Resource.request(); return SUCCESS; } event void SubSend.sendDone(message_t* msg, error_t result) { call Resource.release(); signal Ieee154Send.sendDone(msg, result); m_msg = NULL; } event void Resource.granted() { error_t rc; if ((rc = (call SubSend.send(m_addr, m_msg, m_len))) != SUCCESS) { signal Ieee154Send.sendDone(m_msg, rc); m_msg = NULL; call Resource.release(); } } command error_t Ieee154Send.cancel(message_t* msg) { if (m_msg != NULL) { call Resource.release(); m_msg = NULL; return call SubSend.cancel(msg); } else { return FAIL; } } command uint8_t Ieee154Send.maxPayloadLength() { return call SubSend.maxPayloadLength(); } command void* Ieee154Send.getPayload(message_t* m, uint8_t len) { return call SubSend.getPayload(m, len); } } tinyos-2.1.2+dfsg/tos/lib/net/blip/TcpC.nc000066400000000000000000000005041207233610700202220ustar00rootroot00000000000000 configuration TcpC { provides interface Tcp[uint8_t client]; } implementation { components MainC, IPStackC, TcpP, IPAddressC; components new TimerMilliC(); Tcp = TcpP; MainC -> TcpP.Init; TcpP.Boot -> MainC; TcpP.IP -> IPStackC.IP[IANA_TCP]; TcpP.Timer -> TimerMilliC; TcpP.IPAddress -> IPAddressC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/TcpP.nc000066400000000000000000000100341207233610700202360ustar00rootroot00000000000000 #ifdef PC #include #endif #include #include #include "blip_printf.h" module TcpP { provides interface Tcp[uint8_t client]; provides interface Init; uses { interface Boot; interface IP; interface Timer; interface IPAddress; } } implementation { enum { N_CLIENTS = uniqueCount("TCP_CLIENT"), }; #include struct tcplib_sock socks[N_CLIENTS]; int find_client(struct tcplib_sock *conn) { int i; for (i = 0; i < N_CLIENTS; i++) if (&socks[i] == conn) break; return i; } void tcplib_extern_connectdone(struct tcplib_sock *sock, int error) { int cid = find_client(sock); if (cid < N_CLIENTS) signal Tcp.connectDone[cid](error ? FAIL : SUCCESS); } void tcplib_extern_recv(struct tcplib_sock *sock, void *data, int len) { int cid = find_client(sock); if (cid < N_CLIENTS) signal Tcp.recv[cid](data, len); } void tcplib_extern_closed(struct tcplib_sock *sock) { tcplib_close(sock); } void tcplib_extern_closedone(struct tcplib_sock *sock) { int cid = find_client(sock); tcplib_init_sock(sock); if (cid < N_CLIENTS) signal Tcp.closed[cid](0); } void tcplib_extern_acked(struct tcplib_sock *sock) { int cid = find_client(sock); if (cid < N_CLIENTS) signal Tcp.acked[cid](); } #include "libtcp/circ.c" #include "libtcp/tcplib.c" struct tcplib_sock socks[uniqueCount("TCP_CLIENT")]; struct tcplib_sock *tcplib_accept(struct tcplib_sock *conn, struct sockaddr_in6 *from) { int cid = find_client(conn); printf("tcplib_accept: cid: %i\n", cid); if (cid == N_CLIENTS) return NULL; if (signal Tcp.accept[cid](from, &conn->tx_buf, &conn->tx_buf_len)) { if (conn->tx_buf == NULL) return NULL; return conn; } return NULL; } void tcplib_send_out(struct ip6_packet *msg, struct tcp_hdr *tcph) { printf("tcp output\n"); call IPAddress.setSource(&msg->ip6_hdr); tcph->chksum = htons(msg_cksum(&msg->ip6_hdr, msg->ip6_data, IANA_TCP)); call IP.send(msg); } command error_t Init.init() { int i; for (i = 0; i < uniqueCount("TCP_CLIENT"); i++) { tcplib_init_sock(&socks[i]); } return SUCCESS; } event void Boot.booted() { call Timer.startPeriodic(512); } event void Timer.fired() { tcplib_timer_process(); } event void IP.recv(struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) { printf("tcp packet received\n"); tcplib_process(iph, payload); } command error_t Tcp.bind[uint8_t client](uint16_t port) { struct sockaddr_in6 addr; memclr(addr.sin6_addr.s6_addr, 16); addr.sin6_port = htons(port); tcplib_bind(&socks[client], &addr); return SUCCESS; } command error_t Tcp.connect[uint8_t client](struct sockaddr_in6 *dest, void *tx_buf, int tx_buf_len) { int rv; socks[client].tx_buf = tx_buf; socks[client].tx_buf_len = tx_buf_len; rv = tcplib_connect(&socks[client], dest); return rv ? FAIL : SUCCESS; } command error_t Tcp.send[uint8_t client](void *payload, uint16_t len) { if (tcplib_send(&socks[client], payload, len) < 0) return FAIL; return SUCCESS; } command error_t Tcp.close[uint8_t client]() { if (!tcplib_close(&socks[client])) return SUCCESS; return FAIL; } command error_t Tcp.abort[uint8_t client]() { if (tcplib_abort(&socks[client]) < 0) return FAIL; return SUCCESS; } event void IPAddress.changed(bool valid) { } default event bool Tcp.accept[uint8_t cid](struct sockaddr_in6 *from, void **tx_buf, int *tx_buf_len) { return FALSE; } default event void Tcp.connectDone[uint8_t cid](error_t e) {} default event void Tcp.recv[uint8_t cid](void *payload, uint16_t len) { } default event void Tcp.closed[uint8_t cid](error_t e) { } default event void Tcp.acked[uint8_t cid]() { } } tinyos-2.1.2+dfsg/tos/lib/net/blip/TcpSocketC.nc000066400000000000000000000002261207233610700213740ustar00rootroot00000000000000 generic configuration TcpSocketC() { provides interface Tcp; } implementation { components TcpC; Tcp = TcpC.Tcp[unique("TCP_CLIENT")]; } tinyos-2.1.2+dfsg/tos/lib/net/blip/TrackFlowsC.nc000066400000000000000000000005751207233610700215630ustar00rootroot00000000000000 configuration TrackFlowsC { } implementation { components MainC, TrackFlowsP, IPDispatchP; components SerialActiveMessageC as Serial; TrackFlowsP.Boot -> MainC; TrackFlowsP.SerialControl -> Serial; TrackFlowsP.IPExtensions -> IPDispatchP.IPExtensions; TrackFlowsP.Headers -> IPDispatchP.HopByHopExt; TrackFlowsP.FlowSend -> Serial.AMSend[AM_FLOW_ID_MSG]; } tinyos-2.1.2+dfsg/tos/lib/net/blip/TrackFlowsP.nc000066400000000000000000000102761207233610700215770ustar00rootroot00000000000000 #include "TrackFlows.h" module TrackFlowsP { uses { interface Boot; interface SplitControl as SerialControl; interface IPExtensions; interface TLVHeader as Headers; interface AMSend as FlowSend; } } implementation { bool flow_send_busy = FALSE; uint16_t current_flowid = 0; message_t flow_send; int send_flow_idx = -1, cur_idx = 0; nx_struct { nx_uint8_t flags; nx_uint8_t label; nx_struct flow_id_msg flow; } flow_cache[N_FORWARD_ENT * 3]; int get_entry() { cur_idx = (cur_idx + 1) % (N_FORWARD_ENT * 3); return cur_idx; } int lookup_entry(uint8_t label) { int i; for (i = 0; i < N_FORWARD_ENT * 3; i++) { if (flow_cache[i].flags == 1 && flow_cache[i].label == label) return i; } return -1; } event void Boot.booted() { call SerialControl.start(); flow_send_busy = FALSE; ip_memclr((void *)flow_cache, sizeof(flow_cache)); } event void FlowSend.sendDone(message_t *msg, error_t error) { flow_send_busy = FALSE; flow_cache[send_flow_idx].flags = 0; } void update_msg(struct ip6_hdr *iph, nx_struct flow_id *flow, uint8_t label, uint8_t nxt_hdr) { nx_struct flow_id_msg *payload; int i = get_entry(); if (i < 0) return; flow_cache[i].flags = 1; flow_cache[i].label = label; payload = &flow_cache[i].flow; memcpy(&payload->flow, flow, sizeof(nx_struct flow_id)); payload->src = ntohs(iph->ip6_src.s6_addr16[7]); payload->dst = ntohs(iph->ip6_dst.s6_addr16[7]); payload->local_address = TOS_NODE_ID; payload->nxt_hdr = nxt_hdr; } event void IPExtensions.handleExtensions(uint8_t label, struct ip6_hdr *iph, struct ip6_ext *hop, struct ip6_ext *dst, struct ip6_route *route, uint8_t nxt_hdr) { if (hop != NULL) { struct tlv_hdr *tlv = call IPExtensions.findTlv(hop, TLV_TYPE_FLOW); if (tlv != NULL && tlv->len == sizeof(struct tlv_hdr) + sizeof(nx_struct flow_id)) { update_msg(iph, (nx_struct flow_id *)(tlv + 1), label, nxt_hdr); } } } event void IPExtensions.reportTransmission(uint8_t label, send_policy_t *send) { int i, flow_idx = lookup_entry(label); nx_struct flow_id_msg *payload = (nx_struct flow_id_msg *)call FlowSend.getPayload(&flow_send, sizeof(nx_struct flow_id_msg)); if (flow_idx < 0) return; memcpy(payload, &flow_cache[flow_idx].flow, sizeof(nx_struct flow_id_msg)); payload->n_attempts = 0; for (i = 0; i < send->current && i < 3; i++) { // if (send->dest[i] == IEEE154_BROADCAST_ADDR) return; payload->attempts[i].next_hop = send->dest[i]; payload->attempts[i].tx = send->retries; } if (i < 3) { payload->attempts[i].next_hop = send->dest[i]; payload->attempts[i].tx = send->actRetries; i++; } payload->n_attempts = i; if (!flow_send_busy) { if (call FlowSend.send(0xffff, &flow_send, sizeof(nx_struct flow_id_msg)) == SUCCESS) { flow_send_busy = TRUE; send_flow_idx = flow_idx; return; } // otherwise fall through and invalidate the cache } flow_cache[flow_idx].flags = 0; } event struct tlv_hdr *Headers.getHeader(uint8_t label, struct ip6_hdr *msg, uint8_t nxt_hdr) { static uint8_t buf[sizeof(struct tlv_hdr) + sizeof(nx_struct flow_id)]; struct tlv_hdr *tlv; nx_struct flow_id *flow; tlv = (struct tlv_hdr *)buf; flow = (nx_struct flow_id *)(tlv + 1); tlv->type = TLV_TYPE_FLOW; tlv->len = sizeof(struct tlv_hdr) + sizeof(nx_struct flow_id); /* if (msg->ip6_dst.s6_addr[0] != 0xff || */ /* (msg->ip6_dst.s6_addr[0] == 0xff && */ /* (msg->ip6_dst.s6_addr[1] & 0x0f) > 2)) { */ flow->id = current_flowid++; update_msg(msg, flow, label, nxt_hdr); return tlv; /* } */ /* return NULL; */ } event void SerialControl.startDone(error_t e) { } event void SerialControl.stopDone(error_t e) { } } tinyos-2.1.2+dfsg/tos/lib/net/blip/UdpC.nc000066400000000000000000000005321207233610700202250ustar00rootroot00000000000000 #include configuration UdpC { provides interface UDP[uint8_t clnt]; provides interface BlipStatistics; } implementation { components MainC, IPStackC, UdpP, IPAddressC; UDP = UdpP; BlipStatistics = UdpP; MainC -> UdpP.Init; UdpP.IP -> IPStackC.IP[IANA_UDP]; UdpP.IPAddress -> IPAddressC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/UdpP.nc000066400000000000000000000125401207233610700202440ustar00rootroot00000000000000 #include #include #include "blip_printf.h" module UdpP { provides interface UDP[uint8_t clnt]; provides interface Init; provides interface BlipStatistics; uses interface IP; uses interface IPAddress; } implementation { enum { N_CLIENTS = uniqueCount("UDP_CLIENT"), }; udp_statistics_t stats; uint16_t local_ports[N_CLIENTS]; enum { LOCAL_PORT_START = 51024U, LOCAL_PORT_STOP = 54999U, }; uint16_t last_localport = LOCAL_PORT_START; uint16_t alloc_lport(uint8_t clnt) { int i, done = 0; uint16_t compare = htons(last_localport); last_localport = (last_localport < LOCAL_PORT_STOP) ? last_localport + 1 : LOCAL_PORT_START; while (!done) { done = 1; for (i = 0; i < N_CLIENTS; i++) { if (local_ports[i] == compare) { last_localport = (last_localport < LOCAL_PORT_STOP) ? last_localport + 1 : LOCAL_PORT_START; compare = htons(last_localport); done = 0; break; } } } return last_localport; } command error_t Init.init() { call BlipStatistics.clear(); memclr((uint8_t *)local_ports, sizeof(uint16_t) * N_CLIENTS); return SUCCESS; } command error_t UDP.bind[uint8_t clnt](uint16_t port) { int i; port = htons(port); if (port > 0) { for (i = 0; i < N_CLIENTS; i++) if (i != clnt && local_ports[i] == port) return FAIL; } local_ports[clnt] = port; return SUCCESS; } event void IP.recv(struct ip6_hdr *iph, void *packet, size_t len, struct ip6_metadata *meta) { uint8_t i; struct sockaddr_in6 addr; struct udp_hdr *udph = (struct udp_hdr *)packet; uint16_t my_cksum, rx_cksum = ntohs(udph->chksum); struct ip_iovec v; printf("UDP - IP.recv: len: %i (%i, %i) srcport: %u dstport: %u\n", ntohs(iph->ip6_plen), len, ntohs(udph->len), ntohs(udph->srcport), ntohs(udph->dstport)); for (i = 0; i < N_CLIENTS; i++) if (local_ports[i] == udph->dstport) break; if (i == N_CLIENTS) { // TODO : send ICMP port closed message here. return; } memcpy(&addr.sin6_addr, &iph->ip6_src, 16); addr.sin6_port = udph->srcport; udph->chksum = 0; v.iov_base = packet; v.iov_len = len; v.iov_next = NULL; my_cksum = msg_cksum(iph, &v, IANA_UDP); printf("rx_cksum: 0x%x my_cksum: 0x%x\n", rx_cksum, my_cksum); if (rx_cksum != my_cksum) { BLIP_STATS_INCR(stats.cksum); printf("udp ckecksum computation failed: mine: 0x%x theirs: 0x%x [0x%x]\n", my_cksum, rx_cksum, len); printf_buf((void *)iph, sizeof(struct ip6_hdr)); // iov_print(&v); // drop return; } BLIP_STATS_INCR(stats.rcvd); signal UDP.recvfrom[i](&addr, (void *)(udph + 1), len - sizeof(struct udp_hdr), meta); } /** * Injection point of IP datagrams. This is only called for packets * being sent from this mote; packets which are being forwarded * never leave the stack and so never use this entry point. * * @msg an IP datagram with header fields (except for length) * @plen the length of the data payload added after the headers. */ command error_t UDP.sendto[uint8_t clnt](struct sockaddr_in6 *dest, void *payload, uint16_t len) { struct ip_iovec v[1]; v[0].iov_base = payload; v[0].iov_len = len; v[0].iov_next = NULL; return call UDP.sendtov[clnt](dest, &v[0]); } command error_t UDP.sendtov[uint8_t clnt](struct sockaddr_in6 *dest, struct ip_iovec *iov) { error_t rc; struct ip6_packet pkt; struct udp_hdr udp; struct ip_iovec v[1]; size_t len = iov_len(iov); // fill in all the packet fields memclr((uint8_t *)&pkt.ip6_hdr, sizeof(pkt.ip6_hdr)); memclr((uint8_t *)&udp, sizeof(udp)); memcpy(&pkt.ip6_hdr.ip6_dst, dest->sin6_addr.s6_addr, 16); call IPAddress.setSource(&pkt.ip6_hdr); if (local_ports[clnt] == 0 && (local_ports[clnt] = alloc_lport(clnt)) == 0) { return FAIL; } /* udp fields */ udp.srcport = local_ports[clnt]; udp.dstport = dest->sin6_port; udp.len = htons(len + sizeof(struct udp_hdr)); udp.chksum = 0; /* ip fields -- everything must be filled in now */ pkt.ip6_hdr.ip6_vfc = IPV6_VERSION; pkt.ip6_hdr.ip6_nxt = IANA_UDP; pkt.ip6_hdr.ip6_plen = udp.len; // set up the pointers v[0].iov_base = (uint8_t *)&udp; v[0].iov_len = sizeof(struct udp_hdr); v[0].iov_next = iov; pkt.ip6_data = &v[0]; udp.chksum = htons(msg_cksum(&pkt.ip6_hdr, v, IANA_UDP)); rc = call IP.send(&pkt); BLIP_STATS_INCR(stats.sent); return rc; } command void BlipStatistics.clear() { #ifdef BLIP_STATS memclr((uint8_t *)&stats, sizeof(udp_statistics_t)); #endif } command void BlipStatistics.get(udp_statistics_t *buf) { #ifdef BLIP_STATS ip_memcpy((uint8_t *)buf, (uint8_t *)&stats, sizeof(udp_statistics_t)); #endif } default event void UDP.recvfrom[uint8_t clnt](struct sockaddr_in6 *from, void *payload, uint16_t len, struct ip6_metadata *meta) {} event void IPAddress.changed(bool global_valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/UdpSocketC.nc000066400000000000000000000002241207233610700213740ustar00rootroot00000000000000 generic configuration UdpSocketC() { provides interface UDP; } implementation { components UdpC; UDP = UdpC.UDP[unique("UDP_CLIENT")]; } tinyos-2.1.2+dfsg/tos/lib/net/blip/blip_printf.h000066400000000000000000000035301207233610700215320ustar00rootroot00000000000000#ifndef BLIP_PRINTF_H #define BLIP_PRINTF_H /* * Conditionally include printf functionality in an app. * * In the future we may allow more fine-grained control over weather * printf is enabled. * * Also include utility functions for dumping several blip structures. */ #ifdef PRINTFUART_ENABLED #include "printf.h" #include #include void printf_buf(uint8_t *buf, int len) { int i; for (i = 0; i < len; i++) { printf("%02x ", buf[i]); } printf("\n"); } /* printf a whole iovec */ void iov_print(struct ip_iovec *iov) { struct ip_iovec *cur = iov; while (cur != NULL) { int i; printf("iovec (%p, %i) ", cur, cur->iov_len); for (i = 0; i < cur->iov_len; i++) { printf("%02x ", (uint8_t)cur->iov_base[i]); } printf("\n"); cur = cur->iov_next; } } /* printf an internet address */ void printf_in6addr(struct in6_addr *a) { static char print_buf[64]; inet_ntop6(a, print_buf, 64); printf(print_buf); } int printf_ieee154addr(ieee154_addr_t *in) { int i; switch (in->ieee_mode) { case IEEE154_ADDR_SHORT: printf("IEEE154_ADDR_SHORT: 0x%x", in->i_saddr); break; case IEEE154_ADDR_EXT: printf("IEEE154_ADDR_EXT: "); for (i = 7; i >= 0; i--) { printf("%02x", in->i_laddr.data[i]); if (i > 0) printf(":"); } break; } return 0; } #else /* PRINTFUART_ENABLED */ #if defined (_H_msp430hardware_h) || defined (_H_atmega128hardware_H) #include #else #ifdef __M16C60HARDWARE_H__ #include "m16c60_printf.h" #else #include "generic_printf.h" #endif #endif #undef putchar /* disable all printfs by removing them in the preprocessor */ #define printf(fmt, args ...) ; #define printfflush() ; #define printf_in6addr(a) ; #define printf_buf(buf, len) ; #define iov_print(iov) ; #endif /* PRINTFUART_ENABLED */ #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/000077500000000000000000000000001207233610700177665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/Dhcp6ClientC.nc000066400000000000000000000054351207233610700225250ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * DHCP v6 Client implementation for TinyOS * * Implements a simple subset of RFC3315 DHCP for stateful address * configuration. This protocol engine solicits on-link DHCP servers * or relay agents, and then attempts to obtain permanent (IA_NA) * addresses from them. After an address is acquired, it will renew * it using the parameters contained in the Identity Association * binding; if the lease expires, it will revoke the address using the * IPAddress interface. At that point all components should stop * using that address as it is no longer valid. * * @author Stephen Dawson-Haggerty */ configuration Dhcp6ClientC { provides interface Dhcp6Info; } implementation { components Dhcp6ClientP; components IPStackControlP; components new UdpSocketC(); components new TimerMilliC(); components RandomC, Ieee154AddressC, IPAddressC; Dhcp6Info = Dhcp6ClientP; IPStackControlP.StdControl -> Dhcp6ClientP; Dhcp6ClientP.UDP -> UdpSocketC; Dhcp6ClientP.Timer -> TimerMilliC; Dhcp6ClientP.Ieee154Address -> Ieee154AddressC; Dhcp6ClientP.IPAddress -> IPAddressC; Dhcp6ClientP.Random -> RandomC; components LedsC; Dhcp6ClientP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/Dhcp6ClientP.nc000066400000000000000000000304441207233610700225400ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * DHCP v6 Client implementation for TinyOS * * Implements a simple subset of RFC3315 DHCP for stateful address * configuration. This protocol engine solicits on-link DHCP servers * or relay agents, and then attempts to obtain permanent (IA_NA) * addresses from them. After an address is acquired, it will renew * it using the parameters contained in the Identity Association * binding; if the lease expires, it will revoke the address using the * IPAddress interface. At that point all components should stop * using that address as it is no longer valid. * * @author Stephen Dawson-Haggerty */ #include "dhcp6.h" module Dhcp6ClientP { provides { interface Dhcp6Info; interface StdControl; } uses { interface UDP; interface Timer; interface Random; interface IPAddress; interface Ieee154Address; interface Leds; } } implementation { int m_state; // txid: current transaction id // t1: time after which to renew the current IA binding from the original server // t2: time after which to renew using any available server // m_time: timeout clock used for state machine transitions // valid_lifetime: valid life of address obtained uint32_t m_txid, t1, t2, m_time = 0, valid_lifetime = 0; // the dhcp6 server we are currently interacting with struct sockaddr_in6 m_srv_addr; // DUID of the server we're talking and have obtained the binding from bool m_serverid_valid = FALSE; char m_serverid[DH6_MAX_DUIDLEN]; // weather to send unicast messages once we've picked a server from // ADVERTIZE messages bool m_unicast = TRUE; enum { // my IAID for all transactions IAID = 1, VALID_WAIT = 0xff, // how long to send requests before hopping back to SOLICIT REQUEST_TIMEOUT = 120, TIMER_PERIOD = 15, }; command error_t StdControl.start() { m_state = DH6_SOLICIT; call UDP.bind(DH6PORT_DOWNSTREAM); // call Timer.startPeriodic(1024 * TIMER_PERIOD); call Timer.startOneShot((1024L * TIMER_PERIOD) % (call Random.rand16())); return SUCCESS; } command error_t StdControl.stop() { call Timer.stop(); valid_lifetime = 0; call UDP.bind(0); call IPAddress.removeAddress(); return SUCCESS; } void setup(struct dh6_request *req, int type) { ieee154_laddr_t eui64; m_txid = call Random.rand32() & 0xffffff; eui64 = call Ieee154Address.getExtAddr(); req->dh6_hdr.dh6_type_txid = htonl((((uint32_t)type << 24)) | m_txid); req->dh6_id.type = htons(DH6OPT_CLIENTID); req->dh6_id.len = htons(12); req->dh6_id.duid_ll.duid_type = htons(3); req->dh6_id.duid_ll.hw_type = htons(HWTYPE_EUI64); memcpy(req->dh6_id.duid_ll.eui64, eui64.data, 8); } void sendSolicit() { struct dh6_request sol; // create a solicit message setup(&sol, DH6_SOLICIT); // these always go to the ALLAGENT multicast group, so overwrite // whoever we might have been corresponding with. inet_pton6(DH6ADDR_ALLAGENT, &m_srv_addr.sin6_addr); m_srv_addr.sin6_port = htons(DH6PORT_UPSTREAM); call Leds.led0Toggle(); call UDP.sendto(&m_srv_addr, &sol, sizeof(struct dh6_solicit)); } void sendRequest() { char msg[sizeof(struct dh6_request) + sizeof(m_serverid)]; struct dh6_request *req = (struct dh6_request *)msg; int len = sizeof(struct dh6_request); struct dh6_opt_header *hdr = (struct dh6_opt_header *)m_serverid; setup(req, DH6_REQUEST); req->dh6_ia.type = ntohs(DH6OPT_IA_NA); req->dh6_ia.len = ntohs(12); req->dh6_ia.iaid = ntohl(IAID); req->dh6_ia.t1 = 0xffffffff; req->dh6_ia.t2 = 0xffffffff; memcpy(msg + sizeof(struct dh6_request), m_serverid, sizeof(m_serverid)); if (!m_serverid_valid) { return; } if (ntohs(hdr->len) > sizeof(m_serverid)) { return; } len += ntohs(hdr->len) + sizeof(struct dh6_opt_header); call UDP.sendto(&m_srv_addr, msg, len); } void sendRenew() { char msg[sizeof(struct dh6_request) + sizeof(m_serverid) + sizeof(struct dh6_iaaddr)]; struct dh6_request *req = (struct dh6_request *)msg; int len; struct dh6_opt_header *srvid = (struct dh6_opt_header *)m_serverid; struct dh6_iaaddr *iaaddr = (struct dh6_iaaddr *)(req + 1); void *msg_srvid = (iaaddr + 1); // request and server DUID len = sizeof(struct dh6_request) + sizeof(struct dh6_opt_header) + ntohs(srvid->len); setup(req, DH6_RENEW); req->dh6_ia.type = ntohs(DH6OPT_IA_NA); req->dh6_ia.len = ntohs(12 + sizeof(struct dh6_iaaddr)); req->dh6_ia.iaid = ntohl(IAID); req->dh6_ia.t1 = t1; req->dh6_ia.t2 = t2; len += sizeof(struct dh6_iaaddr); iaaddr->type = htons(5); iaaddr->len = htons(24); call IPAddress.getGlobalAddr(&iaaddr->addr); iaaddr->preferred_lifetime = htonl(3600); //preferred_lifetime); iaaddr->valid_lifetime = htonl(7200);//preferred_lifetime); memcpy(msg_srvid, m_serverid, sizeof(m_serverid)); call UDP.sendto(&m_srv_addr, msg, len); } event void Timer.fired() { // state machine transition timeouts if (!call Timer.isRunning()) call Timer.startPeriodic(1024L * TIMER_PERIOD); switch (m_state) { case DH6_SOLICIT: sendSolicit(); break; case DH6_REQUEST: if (m_time > REQUEST_TIMEOUT) { m_state = DH6_SOLICIT; m_time = 0; sendSolicit(); } else { sendRequest(); } break; case DH6_RENEW: if (m_time > 0 && m_time > ntohl(t2)) { // maybe pick a different server... m_state = DH6_SOLICIT; m_time = 0; sendSolicit(); } else { sendRenew(); } break; case VALID_WAIT: if (m_time > 0 && m_time > ntohl(t1)) { m_state = DH6_RENEW; } break; } if (m_time > 0) m_time += TIMER_PERIOD; // address expirations are separate from the state machine // transitions if (valid_lifetime > TIMER_PERIOD && valid_lifetime <= TIMER_PERIOD * 2) { // lease really expired m_state = DH6_SOLICIT; call IPAddress.removeAddress(); valid_lifetime = 0; } if (valid_lifetime > 0) valid_lifetime -= TIMER_PERIOD; } void *findOption(void *msg, int len, int type) { while (len >= sizeof(struct dh6_opt_header)) { struct dh6_opt_header *opt = msg; if (opt->type == htons(type)) { return msg; } else if (opt->len == 0) { break; } else { msg = ((char*)msg) + ntohs(opt->len) + sizeof(struct dh6_opt_header); len -= ntohs(opt->len) + sizeof(struct dh6_opt_header); } } return NULL; } event void UDP.recvfrom(struct sockaddr_in6 *src, void *payload, uint16_t len, struct ip6_metadata *meta) { struct dh6_header *hdr = payload; struct dh6_opt_header *opt; void *id; uint16_t type = ntohl(hdr->dh6_type_txid) >> 24; uint32_t txid = ntohl(hdr->dh6_type_txid) & 0xffffff; if (txid != m_txid) return; switch (m_state) { case DH6_SOLICIT: switch (type) { case DH6_ADVERTISE: opt = id = findOption(hdr + 1, len - sizeof(struct dh6_header), DH6OPT_SERVERID); if (id) { // save the server DUID for use in reply messages and start // requesting an address. if (ntohs(opt->len) + sizeof(struct dh6_opt_header) < sizeof(m_serverid)) { m_serverid_valid = TRUE; memcpy(m_serverid, id, ntohs(opt->len) + sizeof(struct dh6_opt_header)); // we can unicast to this guy now // memcpy(&m_srv_addr, src, sizeof(struct sockaddr_in6)); m_time = 1; m_state = DH6_REQUEST; if (m_unicast) memcpy(&m_srv_addr, src, sizeof(struct sockaddr_in6)); // don't wait a long while before we send our request if (!call Timer.isOneShot ()) call Timer.startOneShot(1024L); } } } break; case DH6_REQUEST: case DH6_RENEW: call Leds.led1Toggle(); if (type != DH6_REPLY) return; opt = id = findOption(hdr + 1, len - sizeof(struct dh6_header), DH6OPT_SERVERID); if (id) { // check that the serverid is the one we asked for if (memcmp(m_serverid, id, ntohs(opt->len) + sizeof(struct dh6_opt_header)) != 0) return; // TODO : check client id } opt = id = findOption(hdr + 1, len - sizeof(struct dh6_header), DH6OPT_IA_NA); if (id) { struct dh6_ia *ia = id; struct dh6_status *status; void *addr_opt; // we got an IA_NA block back if (ntohl(ia->iaid) != IAID) return; // see if there's an error code status = findOption(ia + 1, ntohs(ia->len) + sizeof(struct dh6_opt_header) - sizeof(struct dh6_ia), 13); if (status) { if (status->code != htons(0)) { if (m_state == DH6_RENEW) { m_state = DH6_REQUEST; m_time = 1; } else { m_state = DH6_SOLICIT; m_time = 0; } call IPAddress.removeAddress(); call Timer.startOneShot (0); // attempt immediate recovery return; } } // otherwise, hopefully there's an address addr_opt = findOption(ia + 1, ntohs(ia->len) + sizeof(struct dh6_opt_header) - sizeof(struct dh6_ia), 5); if (addr_opt) { // got an address... save it and wait for it to expire struct dh6_iaaddr *addr = addr_opt; if (m_state != DH6_RENEW) // only set it if it changed call IPAddress.setAddress(&addr->addr); t1 = ia->t1; t2 = ia->t2; m_time = 1; valid_lifetime = ntohl(addr->valid_lifetime); m_state = VALID_WAIT; call Leds.led2Toggle(); } } break; } } command int Dhcp6Info.getTimers(struct dh6_timers *t) { t->iaid = IAID; t->valid_lifetime = valid_lifetime; t->clock = m_time; t->t1 = ntohl(t1); t->t2 = ntohl(t2); return 0; } command int Dhcp6Info.getDuid(uint8_t *buf, int len) { if (m_serverid_valid) { struct dh6_opt_header *opt = (struct dh6_opt_header *)m_serverid; if (ntohs(opt->len) < len) { memcpy(buf, m_serverid + sizeof(struct dh6_opt_header), ntohs(opt->len)); return ntohs(opt->len); } } return -1; } command void Dhcp6Info.useUnicast(bool yes) { m_unicast = yes; } event void IPAddress.changed(bool global_valid) {} event void Ieee154Address.changed() {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/Dhcp6Info.nc000066400000000000000000000046031207233610700220730ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface for getting information about a client's status. * * @author Stephen Dawson-Haggerty */ #include interface Dhcp6Info { /** * Get the DHCP Unique Identifier of the server the client is talking to. * * @buf return buffer * @len length of buf * @return number of bytes written, or -1 on error */ command int getDuid(uint8_t *buf, int len); /** * @t struct containing the current state of timers associated with our lease. */ command int getTimers(struct dh6_timers *t); /** * controls weather or not the client sends unicast messages to dhcp * servers. default is yes; if no, the client will always use the * link-local all dhcp agents multicast group (ff02::1:a) */ command void useUnicast(bool yes); } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/Dhcp6P.nc000066400000000000000000000046001207233610700213740ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include "dhcp6.h" module Dhcp6P { provides interface StdControl; uses { interface UDP; interface Timer; interface Random; } } implementation { int m_state; uint32_t m_txid; command error_t StdControl.start() { m_state = DH6_SOLICIT; m_txid = call Random.rand32(); call UDP.bind(DH6PORT_DOWNSTREAM); } command error_t StdControl.stop() { } void sendSolicit() { struct dh6_solicit sol; sol.dh6_hdr.dh6_type_txid = htonl((DHCP_SOLICIT << 16) | m_txid); sol.dh6_id.type = htons(DH6OPT_CLIENTID); sol.dh6_id.len = htons(8); sol.dh6_id.duid_ll.duid_type = 3; sol.dh6_id.duid_ll.hw_type = HWTYPE_EUI64; } event void Timer.fired() { switch (m_state) { case DH6_SOLICIT: sendSolicit(); break; } } } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/Dhcp6RelayC.nc000066400000000000000000000051421207233610700223560ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * DHCP v6 relay agent for TinyOS * * DHCP allows relay agents to forward traffic to an external DHCP * server which is not on-link with the requesting client. To do * this, the relay agent reencapsulates the request message and * includes its own address and the address of the peer, before * sending the request on to the DCHP servers multicast group. In * blip, this group is routed to the edge of the network where the * dhcp server is presumably running. * * @author Stephen Dawson-Haggerty */ configuration Dhcp6RelayC { } implementation { components Dhcp6RelayP, Dhcp6ClientC; components IPAddressC, Ieee154AddressC; components new TimerMilliC(), new UdpSocketC(); components RandomC; components MainC; Dhcp6RelayP.UDP -> UdpSocketC; Dhcp6RelayP.IPAddress -> IPAddressC; Dhcp6RelayP.Ieee154Address -> Ieee154AddressC; Dhcp6RelayP.Random -> RandomC; Dhcp6RelayP.Boot -> MainC; Dhcp6RelayP.AdvTimer -> TimerMilliC; Dhcp6RelayP.Dhcp6Info -> Dhcp6ClientC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/Dhcp6RelayP.nc000066400000000000000000000143261207233610700223770ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * DHCP v6 Relay Agent * * This agent forwards requests to the edge of the network. It can * proxy the responses to SOLICIT messages so that there is less of a * reply implosion problem when bringing up a large network; doing so * is the default behavior. * * @author Stephen Dawson-Haggerty */ #include "blip_printf.h" #include "dhcp6.h" module Dhcp6RelayP { uses { interface UDP; interface Timer as AdvTimer; interface IPAddress; interface Ieee154Address; interface Boot; interface Random; interface Dhcp6Info; } } implementation { bool m_alive = FALSE; #define DHCP_PROXY_SOLICIT #ifdef DHCP_PROXY_SOLICIT void *m_msg; int m_len; #endif event void Boot.booted() { call UDP.bind(DH6PORT_UPSTREAM); } void *findOption(void *msg, int len, int type) { while (len >= sizeof(struct dh6_opt_header)) { struct dh6_opt_header *opt = msg; if (opt->type == htons(type)) { return msg; } else if (opt->len == 0) { break; } else { msg = ((char*)msg) + ntohs(opt->len) + sizeof(struct dh6_opt_header); len -= ntohs(opt->len) + sizeof(struct dh6_opt_header); } } return NULL; } #ifdef DHCP_PROXY_SOLICIT int setup(struct dh6_request *req, int type, uint32_t txid) { int len; req->dh6_hdr.dh6_type_txid = htonl((((uint32_t)type << 24)) | (txid & 0xffffff)); req->dh6_id.type = htons(DH6OPT_SERVERID); // we need to send back the DUID of our server len = call Dhcp6Info.getDuid((uint8_t *)&req->dh6_id.duid_ll, DH6_MAX_DUIDLEN); if (len < 0) return -1; req->dh6_id.len = htons(len); return len; } #endif event void UDP.recvfrom(struct sockaddr_in6 *src, void *payload, uint16_t len, struct ip6_metadata *meta) { struct dh6_header *hdr = payload; uint16_t type = ntohl(hdr->dh6_type_txid) >> 24; printf("relay agent RX!: %i\n", type); if (!m_alive) return; #ifdef DHCP_PROXY_SOLICIT if (type == DH6_SOLICIT) { // send ADVERTISE if (!call AdvTimer.isRunning()) { struct dh6_request *req; struct sockaddr_in6 *m_src; m_msg = malloc(sizeof(struct dh6_request) + sizeof(struct sockaddr_in6) + DH6_MAX_DUIDLEN); if (!m_msg) return; req = (struct dh6_request *)(((char *)m_msg) + sizeof(struct sockaddr_in6)); m_src = (struct sockaddr_in6 *)m_msg; if ((m_len = setup(req, DH6_ADVERTISE, ntohl(hdr->dh6_type_txid) & 0xffffff )) < 0) { printf("DHCP Message construction faild\n"); free(m_msg); return; } m_len += offsetof(struct dh6_request, dh6_id.duid_ll); memcpy(m_src, src, sizeof(struct sockaddr_in6)); call AdvTimer.startOneShot(call Random.rand16() & 0x7); } } else #endif // DHCP_PROXY_SOLICIT if (type == DH6_RELAY_REPLY) { struct dh6_relay_hdr *fw_hdr = payload; struct sockaddr_in6 peer; memcpy(&peer.sin6_addr, &fw_hdr->peer_addr, sizeof(struct in6_addr)); // inet_pton6(DH6ADDR_ALLSERVER, &peer.sin6_addr); peer.sin6_port = htons(DH6PORT_DOWNSTREAM); if (ntohs(fw_hdr->opt_type) != 9) return; // if (ntohs(fw_hdr->opt_len) > len - sizeof(struct dh6_relay_hdr)) return; call UDP.sendto(&peer, (void *)(fw_hdr + 1), len - sizeof(struct dh6_relay_hdr)); } else { // just forward it... struct dh6_relay_hdr fw_hdr; struct ip_iovec v[2]; struct sockaddr_in6 srv_addr; inet_pton6(DH6ADDR_ALLSERVER, &srv_addr.sin6_addr); srv_addr.sin6_port = htons(DH6PORT_UPSTREAM); fw_hdr.type = DH6_RELAY_FORW; fw_hdr.hopcount = 1; call IPAddress.getGlobalAddr(&fw_hdr.link_addr); memcpy(&fw_hdr.peer_addr, &src->sin6_addr, sizeof(struct in6_addr)); fw_hdr.opt_type = htons(9); fw_hdr.opt_len = htons(len); v[0].iov_base = (void *)&fw_hdr; v[0].iov_len = sizeof(fw_hdr); v[0].iov_next = &v[1]; v[1].iov_base = payload; v[1].iov_len = len; v[1].iov_next = NULL; call UDP.sendtov(&srv_addr, v); } } event void AdvTimer.fired() { struct dh6_request *req; struct sockaddr_in6 *m_src; req = (struct dh6_request *)(((char *)m_msg) + sizeof(struct sockaddr_in6)); m_src = (struct sockaddr_in6 *)m_msg; call UDP.sendto(m_src, req, m_len); free(m_msg); } event void Ieee154Address.changed() {} event void IPAddress.changed(bool global_valid) { m_alive = global_valid; } } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/DhcpCmdC.nc000066400000000000000000000035461207233610700217250ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ configuration DhcpCmdC { } implementation { components DhcpCmdP; components new ShellCommandC("leases"); components Dhcp6ClientC, IPAddressC; DhcpCmdP.ShellCommand -> ShellCommandC; DhcpCmdP.Dhcp6Info -> Dhcp6ClientC; DhcpCmdP.IPAddress -> IPAddressC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/DhcpCmdP.nc000066400000000000000000000055741207233610700217450ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ module DhcpCmdP { uses { interface ShellCommand; interface Dhcp6Info; interface IPAddress; } } implementation { #define TO_CHAR(X) (((X) < 10) ? ('0' + (X)) : ('a' + ((X) - 10))) event char *ShellCommand.eval(int argc, char **argv) { #define LEN (MAX_REPLY_LEN - (cur - buf)) char *cur, *buf = call ShellCommand.getBuffer(MAX_REPLY_LEN); struct in6_addr addr; struct dh6_timers timers; int duid_len; uint8_t duid[24]; if (!(call IPAddress.getGlobalAddr(&addr))) return "no valid lease\n"; call Dhcp6Info.getTimers(&timers); cur = buf; cur += snprintf(cur, LEN, "lease on "); cur += inet_ntop6(&addr, cur, LEN) - 1; *cur++ = '\n'; cur += snprintf(cur, LEN, "iaid: %i valid: %li t1: %li t2: %li\n", timers.iaid, timers.valid_lifetime, timers.t1, timers.t2); if ((duid_len = call Dhcp6Info.getDuid(duid, sizeof(duid))) > 0 && LEN > duid_len * 3 + 6) { int i; cur += snprintf(cur, LEN, "duid: "); for (i = 0; i < duid_len; i++) { *cur++ = TO_CHAR(duid[i] >> 4); *cur++ = TO_CHAR(duid[i] & 0x0f); if (i < duid_len - 1) *cur++ = ':'; } *cur++ = '\n'; } *cur++ = '\0'; return buf; } event void IPAddress.changed(bool valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/NoDhcpC.nc000066400000000000000000000043671207233610700216000ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Component for doing compile-time address allocation. Wired by the * stack, sets a static address based on IN6_PREFIX and TOS_NODE_ID on * boot. Useful for development or of you want to hard-code addresses. * * @author Stephen Dawson-Haggerty */ #include module NoDhcpC { uses { interface Boot; interface IPAddress; } } implementation { event void Boot.booted() { struct in6_addr addr; memset(&addr, 0, sizeof(addr)); inet_pton6(IN6_PREFIX, &addr); addr.s6_addr16[7] = htons(TOS_NODE_ID); call IPAddress.setAddress(&addr); } event void IPAddress.changed(bool valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/dhcp/dhcp6.h000066400000000000000000000106371207233610700211520ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef _DHCP_H #define _DHCP_H #include /* Error Values */ #define DH6ERR_FAILURE 16 #define DH6ERR_AUTHFAIL 17 #define DH6ERR_POORLYFORMED 18 #define DH6ERR_UNAVAIL 19 #define DH6ERR_OPTUNAVAIL 20 /* Message type */ #define DH6_SOLICIT 1 #define DH6_ADVERTISE 2 #define DH6_REQUEST 3 #define DH6_CONFIRM 4 #define DH6_RENEW 5 #define DH6_REBIND 6 #define DH6_REPLY 7 #define DH6_RELEASE 8 #define DH6_DECLINE 9 #define DH6_RECONFIGURE 10 #define DH6_INFORM_REQ 11 #define DH6_RELAY_FORW 12 #define DH6_RELAY_REPLY 13 /* Predefined addresses */ #define DH6ADDR_ALLAGENT "ff02::1:2" #define DH6ADDR_ALLSERVER "ff05::1:3" #define DH6PORT_DOWNSTREAM 546 #define DH6PORT_UPSTREAM 547 /* Protocol constants */ /* timer parameters (msec, unless explicitly commented) */ #define SOL_MAX_DELAY 1000 #define SOL_TIMEOUT 1000 #define SOL_MAX_RT 120000 #define INF_TIMEOUT 1000 #define INF_MAX_RT 120000 #define REQ_TIMEOUT 1000 #define REQ_MAX_RT 30000 #define REQ_MAX_RC 10 /* Max Request retry attempts */ #define REN_TIMEOUT 10000 /* 10secs */ #define REN_MAX_RT 600000 /* 600secs */ #define REB_TIMEOUT 10000 /* 10secs */ #define REB_MAX_RT 600000 /* 600secs */ #define REL_TIMEOUT 1000 /* 1 sec */ #define REL_MAX_RC 5 #define DH6OPT_CLIENTID 1 #define DH6OPT_SERVERID 2 #define DH6OPT_IA_NA 3 #define DH6OPT_IA_TA 4 #define DH6OPT_IAADDR 5 #define DH6OPT_ORO 6 #define DH6OPT_PREFERENCE 7 #define HWTYPE_EUI64 27 #define DH6_MAX_DUIDLEN 24 struct dh6_header { uint32_t dh6_type_txid; }; struct dh6_opt_header { uint16_t type; uint16_t len; } __attribute__ ((__packed__)); struct dh6_clientid { uint16_t type; uint16_t len; struct { uint16_t duid_type; uint16_t hw_type; uint8_t eui64[8]; } duid_ll; } __attribute__ ((__packed__)); struct dh6_ia { uint16_t type; uint16_t len; uint32_t iaid; uint32_t t1; uint32_t t2; } __attribute__ ((__packed__));; struct dh6_iaaddr { uint16_t type; uint16_t len; struct in6_addr addr; uint32_t preferred_lifetime; uint32_t valid_lifetime; } __attribute__ ((__packed__));; struct dh6_status { uint16_t type; uint16_t len; uint16_t code; }; struct dh6_solicit { struct dh6_header dh6_hdr; struct dh6_clientid dh6_id; } __attribute__ ((__packed__)); struct dh6_request { struct dh6_header dh6_hdr; struct dh6_clientid dh6_id; struct dh6_ia dh6_ia; } __attribute__ ((__packed__)); struct dh6_relay_hdr { uint8_t type; uint8_t hopcount; struct in6_addr link_addr; struct in6_addr peer_addr; uint16_t opt_type; uint16_t opt_len; } __attribute__ ((__packed__)); struct dh6_timers { int iaid; uint32_t valid_lifetime; uint32_t clock; uint32_t t1; uint32_t t2; }; #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/doc/000077500000000000000000000000001207233610700176155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/doc/README000066400000000000000000000075661207233610700205130ustar00rootroot00000000000000 @title blip documentation @author Stephen Dawson-Haggerty stevedh@eecs.berkeley.edu @release public --------------------------------------------------------------------- 1. Installation - This is only going to work on linux. - The recommended version of TinyOS is a recent CVS checkout. This is necessary for appropriate radio stack support. - Make sure the c serial tools are built in $TOSROOT/support/sdk/c/sf. You may need to run ./bootstrap, ./configure, and make in that folder to generate libmote.a. 2. Building - Build a test app: * cd to $TOSROOT/apps/UDPEcho/ and try typing `make blip` - Build the Ieee802.15.4 bridge to your computer * cd to $TOSROOT/apps/IPBaseStation/ and `make blip` - Build the driver * cd to $TOSROOT/support/sdk/c/blip * run ./bootstrap * run ./configure * run make 3. Running - Install IPBaseStation on a mote. This will be your computer's interface to the world of low-power radio. Setting the node id and channel is not important-- these settings will be overwritten. - Start the driver (once you've built it) * cd $TOSROOT/support/sdk/c/blip * edit the config file $TOSROOT/support/sdk/c/blip/serial_tun.conf * set 'addr' you would like your computer's interface to use on the PAN * leave 'proxy' set to 'lo' * sudo driver/ip-driver /dev/ttyUSB0 telosb (replace the device and baud with whatever you're using) The config file is assumed to be in the CWD when ip-driver starts; if this is not the case it may be specified using '-c ' - The driver registers itself on the fec0::/64 subnet (or whatever you have specified in the config file). - If you program a few motes with UDPEcho, their addresses are formed with octets 15 and 16 of the IPv6 address comming from the 802.15.4 short address you programmed them with. Octets 9-14 are zero, so the address formed is: +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ | network prefix | zero | id | +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ ICMPv6 DAD is not performed. - For instance, if you program a mote with ID 101 (0x65), you can try ping6 fec0::65 tracert6 fec0::65 nc6 -u fec0::65 7 nc6 -u fec0::65 2000 UDPEcho runs an echo service on port 7, and a simple shell on port 2000; type 'help' for a list of commands. - The motes can also report back statistics every 15 seconds over UDP. They will send these reports to an address specified in the application make file; however these reports are disabled by default. You can observe these statistics using the Listener.py script in $TOSROOT/apps/UDPEcho/: `python Listener.py`. - The driver provides a simple console when running, which allows you to inspect and manipulates routes, and view statistics. The console runs as a telnet service on port 6106. - A good way of understanding what is happening is to start wireshark on tun0; you should be able to observe the neighbor discovery process as motes boot. You may also notice messages sent to ff05::1; these are routing updates. They are sent from a binary exponential timer with a maximum period of 5 minutes to inform the router of mote's presence; however, they are suppressed by data traffic since the routing updates will be piggybacked on it. - Further reading: doc/ contains a numbers of README's related to pieces of blip such as the socket interface, the shell, and network programming support. For more technical details on IPv6, please see any reference on the subject. Many of the documents produced by the IETF ROLL and 6lowpan working groups are relevent to this design space. tinyos-2.1.2+dfsg/tos/lib/net/blip/doc/README-IP000066400000000000000000000027541207233610700210130ustar00rootroot00000000000000 @title IP data-structure documentation @author Stephen Dawson-Haggerty @release public ---------------------------------------------------------------------- The ip-stack provides a bare IP datagram interface to the network layer; this is documented in comments in the code. For the purposes of socket programming, two data structures are most important. The 'struct sockaddr_in6' and the 'struct in6_addr'. They are substantially shared with the linux/bsd versions, and reproduced below. struct in6_addr { union { uint8_t u6_addr8[16]; uint16_t u6_addr16[8]; uint32_t u6_addr32[4]; } in6_u; #define s6_addr in6_u.u6_addr8 #define s6_addr16 in6_u.u6_addr16 #define s6_addr32 in6_u.u6_addr32 }; struct sockaddr_in6 { uint16_t sin6_port; struct in6_addr sin6_addr; }; void inet_pton6(char *addr, struct in6_addr *dest); Usage ---------------------------------------------------------------------- Example 1: Suppose we want to setup a sockaddr_in6 to point to ff02::5, port 10000: { struct sockaddr_in6 sa6; inet_pton6("ff02::5", &sa6.sin6_addr); sa6.sin6_port = htons(10000); } Example 2: Do the same thing, but without the overhead of storing and parsing the string address representation. { struct sockaddr_in6 sa6; memset(&sa6, 0, sizeof(struct sockaddr_in6)); sa6.sin6_addr.s6_addr16[0] = htons(0xff02); sa6.sin6_addr.s6_addr[15] = 5; sa6.sin6_port = htons(10000); } This code is very unix-y; the second example will work on *nix's. tinyos-2.1.2+dfsg/tos/lib/net/blip/doc/README-MERAKI000066400000000000000000000043301207233610700214430ustar00rootroot00000000000000 @title Meraki Documentation @author Stephen Dawson-Haggerty stevedh@eecs.berkeley.edu @release internal --------------------------------------------------------------------- This README explains how to use a Meraki Mini programmed with OpenWRT/kamikaze as a border router. This document and the code make the following assumptions: - The Meraki has a public IP address or is in a DMZ such that the 6over4 tunneling protocol will work. - The Meraki is the sole router for a prefix Background --------------------------------------------------------------------- To ease configuration, the important parameters are stored in a database. When the meraki waits up, it hits the database and downloads a few config files which it then uses. To grab new configuration, you can either log in and manually restart the router daemon, or just reboot. The parameters stored are: prefix : the one received from the hurricane electric tunnel broker short addr : the address of this device on the network channel : which channel to use Install --------------------------------------------------------------------- 1. Install the router daemon on the meraki using either the provided ipkg, or your own if you've built a version. Building the package is very easy but not covered here. 'ipkg update' 'ipkg install lowpan-bridge_1.2-855_mips.ipk' In order for the dependancies to be automatically installed, you must do the update first so that the package system downloads the directory with the necessary packages. 2. Set up the configuration parameters in the database. The key used is the hostname; precisely, whatever 'uname -n' prints. If no key is found in the database the meraki will just use defaults. 3. Start the daemon with '/etc/init.d/lowpan-bridge start' This will run automatically when the meraki boots. ... I think that's it. Pretty easy! Bugs/Notes --------------------------------------------------------------------- There seems to be an issue with the serial port on the meraki. The effect is that packets are dropped when you send too quickly. This mostly effects fragmentation. As a stopgap, I've inserted a timeout between fragments, but this means the performance is somewhat worse then on a PC and a micaz. tinyos-2.1.2+dfsg/tos/lib/net/blip/doc/README-NWPROG000066400000000000000000000057271207233610700215220ustar00rootroot00000000000000 @title Meraki Documentation @author Stephen Dawson-Haggerty stevedh@eecs.berkeley.edu @release public --------------------------------------------------------------------- What is it? --------------------------------------------------------------------- nwprog is a method of over-the-air programming. It uses much of the machinery Deluge has developed, like the boot loader and flash layout, but substitutes a simpler transport using UDP for Deluge's dissemination algorithm. This means that it is point-to-point, and not incredibly appropriate for reprogramming an entire network all at once. How do I get it? --------------------------------------------------------------------- It is included with the b6lowpan stack. It reuses much of the Deluge code directly from the TinyOS tree without shadowing the files. Differences from Deluge? --------------------------------------------------------------------- - no dissemination - no base station or serial port for injection The application is very simple: flash is formatted into several volumes (a golden image and three application volumes), which are used to store application images. Flash management, boot loading, and image formatting are all provided by Deluge. How to use it? --------------------------------------------------------------------- Build your application with support by include a line in your application Makefile, and include the IPDispatchC component. == application makefile == BOOTLOADER=tosboot == == Also, it is necessary to include a volumes xml file for your flash chip; examples for the stm25p and at45db are present in apps/UDPEcho. First built the tosboot bootloader for your platform by going to tinyos-2.x/tos/lib/tosboot and typing `make `. Then just build and install your application like usual. If networking is working, you should have no problem following the rest of the instructions. Interactions with the motes happen using the 'nwprog' tool in a shell. Connect the shell with `nc6 -u 2001:470:1f04:56d::65 2000`. It has three commands: `nwprog list`: examine the flash and print out information on volumes containing images believed to be valid `nwprog reboot`: reboot into the same image `nwprog boot N`: reboot, and flash the mote with the binary stored in volume N In order to upload new images, use the tos-nwprog tool, located in $LOWPAN_ROOT/tools/tinyos/misc. This tool provides minimal functionality; only erasing and uploading are supported. `./tos-nwprog 2001:470:1f04:56d::65 -e 0`: erase image 0 from the mote at the given IP address. `./tos-nwprog 2001:470:1f04:56d::65 -u 0 tos_image.xml`: upload the image in tos_image.xml to volume 0 on the mote at the IP address. This will erase the volume before uploading it. To integrate with your own application, there are several internal interfaces which can be used to examine the flash. Looking at the example code in UDPShellP component is the best way of finding out about these. tinyos-2.1.2+dfsg/tos/lib/net/blip/doc/README-SHELL000066400000000000000000000037071207233610700213510ustar00rootroot00000000000000 @title UDPShell Documentation @author Stephen Dawson-Haggerty @release public ---------------------------------------------------------------------- UDPShell is a simple text-based command processor which comes with the ip-stack. It is an optional, although convenient way of implementating debugging commands on a mote. Usage ---------------------------------------------------------------------- By default, the shell contains only a few simple commands: help, echo, uptime, ping, and ident. It is designed to be very easy to extend by adding your own commands. To include just the basic shell, include the UDPShellC component in your application. To augment the shell with a new shell command, use the generic component ShellCommandC. Example ---------------------------------------------------------------------- Suppose we want to implement `expr`, a simple arithmetic evaluator. First, bind the 'expr' command string in your application configuration. configuration App {} implementation { components AppImplP; components new ShellCommandC("expr") as Expr; AppImplP.Expr -> Expr; } Within AppImplP, you must implement the ShellCommand interface. The interface has only one event, 'eval' which has the same prototype as main() in a typical c program. event char *Expr.eval(int argc, char **argv) { static char ret[10]; return ret; } If expr returns a non-null value, it is assumed to be a null-terminated string which will be echoed back to a connected client. The buffer returned must obviously not be allocated on the stack. The shell does maintain a single buffer which components can use to print their reply to; it can be requested with a call to Expr.getBuffer(uint16_t len). More running code ---------------------------------------------------------------------- Fully fleshed out examples of code using this interface are available within the stack; see tos/lib/net/b6lowpan/shell/FlashShell[CP].nc and tos/lib/net/b6lowpan/nwprog/NWProg[CP].nctinyos-2.1.2+dfsg/tos/lib/net/blip/doc/README-SIM000066400000000000000000000037321207233610700211300ustar00rootroot00000000000000 @title blip + TOSSIM documentation @author Stephen Dawson-Haggerty stevedh@eecs.berkeley.edu @release internal --------------------------------------------------------------------- The state of blip + TOSSIM --------------------------------------------------------------------- TOSSIM and blip have worked reliably together in the not-so-distant past. However, blip makes several assumptions about the radio stack which are not (yet) reflected in TOSSIM-cvs. It expects a PacketLink and Unique layer a la the cc2420 stack in order to provide reliable transmissions with link duplicate suppression. Performance without these is very poor. There are also several other minor changes which deal with the deliver of serial packets. Ported versions of those components exist and are present in the blip distribution. However, they require patching an existing tinyos stack, so it is probably a good idea to do a sideways checkout of tinyos for experimenting on. Instructions for using TOSSIM with UDPEcho --------------------------------------------------------------------- This is completely unsupported right now. If you really want TOSSIM + blip, it ought to work, but there are definitly NO GUARANTEES and NO SUPPORT. It's just too much of a hack at the moment. - patch your tossim installation. The patch is in $LOWPAN_ROOT/tos/lib/tossim.patch, so apply that using * `cd $TOSDIR/tos/lib` * `patch -p0 < $LOWPAN_ROOT/tos/lib/tossim.patch` Then copy $LOWPAN_ROOT/tos/lib/tossim/Packet* to $TOSDIR/tos/lib/tossim - I think you should then be able to cd to apps/UDPEcho/sim and type `make` * make sure you have python2.5 and python2.5-dev installed - run `./Sim.py` (or `python2.5 ./Sim.py` if 2.4 is default) - build the driver in support/sdh/c/lib6lowpan/tunnel using `make sim` (probably doing make clean first) - you can then run the driver as usually, except using `./serial_tun localhost 9001` to point it at the serialforwarder running in the simulator. tinyos-2.1.2+dfsg/tos/lib/net/blip/doc/README-TCP000066400000000000000000000071151207233610700211250ustar00rootroot00000000000000 @title TCP Socket Documentation @author Stephen Dawson-Haggerty @release internal @target 2.1.1 ---------------------------------------------------------------------- TCP is the standard Internet protocol for reliable, in-order delivery of data across the network. Although inefficient, its ubiquity makes it impossible to ignore; thus, blip provides a very simple TCP stack. TCP is considerably more complicated then UDP, and requires careful use in the embedded setting to prevent resource exhaustion. It is essential that one understand the BSD sockets API; this brief README does not cover many details. For memory-constrained operation, blip's TCP does not do any receive-side buffering. Instead, it will immediately dispatch new, in-order data to the application and otherwise drop the segment. Blip does provide send-buffering so that it can automatically retransmit missing segments; this buffer may be of any size and is provided by the application. Important parameters: MSS: Maximum Segment Size: the maximum amount of data that a TCP packet will contain. Since blip immediately delivers new data, this is also greater then or equal to the maximum amount of data which will ever be delivered in a recv() call. Window: TCP keeps the other side informed about how much buffer is available for new data. Since blip does not have a receive buffer, this parameter is not adjusted by blip; only set to a reasonable value. Applications using TCP may wish to dynamically control this value for various reasons. Notes ---------------------------------------------------------------------- The TCP interface is located in $LOWPAN_ROOT/tos/lib/net/blip/interfaces/Tcp.nc. For the most part, it should be familier. Since the application is responsible for buffering, both accept() and connect() require the implementer to include a buffer for the stack's use. Once passed to the stack, the buffer is reserved until a closed() event is signaled on that socket. A few of the most important caveats/brokeness: - there is no listen(). calling bind() on a socket also begins to listen. - there is no way to accept() multiple sockets like you can in Unix. More precisely, all the code would support it but then there is dynamic allocation since you have to allocate a new socket struct on the fly. - (sort of) as a result of these, if the socket is closed, you have to call bind() if you want to continue listening. - you'll need to carefully manage buffer and window sized by hand if you want to be sure of correct operation. Make sure you check return codes from send() since it will fail if there is not enough local buffer for the entire request. Example ---------------------------------------------------------------------- configuration { components new TcpSocketC() as TcpEcho; TCPEchoP.TcpEcho -> TcpEcho; } module {} implementation { // allocate a send buffer char tcp_buf[150]; // accept connections from anyone. no need to save the endpoint, // but this is the only time its available (add an API call?) event bool TcpEcho.accept(struct sockaddr_in6 *from, void **tx_buf, int *tx_buf_len) { *tx_buf = tcp_buf; *tx_buf_len = 150; // indicates we are accepting the connection return TRUE; } // potentially useful? event void TcpEcho.connectDone(error_t e) {} // just echo the data back. event void TcpEcho.recv(void *payload, uint16_t len) { call TcpEcho.send(payload,len); } // rebind to accept other connections. event void TcpEcho.closed(error_t e) { call Leds.led0Toggle(); call TcpEcho.bind(7); } }tinyos-2.1.2+dfsg/tos/lib/net/blip/doc/README-UDP000066400000000000000000000043101207233610700211210ustar00rootroot00000000000000 @title UDP Socket Documentation @author Stephen Dawson-Haggerty @release public ---------------------------------------------------------------------- ip-stack provides a UDP sockets layer as a basic application transport service. The UDP interface is located in tos/lib/net/b6lowpan/interfaces/UDP.nc and is simple: interface UDP { /* * bind a local address. to cut down memory requirements and handle the * common case well, you can only bind a port; all local interfaces are * implicitly bound. the port should be passed in host byte-order (is * this confusing? */ command error_t bind(uint16_t port); /* * send a payload to the socket address indicated * once the call returns, the stack has no claim on the buffer pointed to */ command error_t sendto(struct sockaddr_in6 *dest, void *payload, uint16_t len); /* * indicate that the stack has finished writing data into the * receive buffer. if error is not SUCCESS, the payload does not * contain valid data and the src pointer should not be used. */ event void recvfrom(struct sockaddr_in6 *src, void *payload, uint16_t len, struct ip_metadata *meta); } Usage ---------------------------------------------------------------------- Each socket must be allocated using the generic component UdpSocketC. For clients, no initialization is necessary; they may send to a destination without calling bind. The stack will allocate a unique ephemeral port number and send out the datagram. Servers wishing to provide a service using a well-known port should call bind() on that port number before generating datagrams. Example ---------------------------------------------------------------------- The simplest server is an echo service running on port 7. Because of the buffer semantics, it is safe to call send directly from a receive event handler. event void Boot.booted() { call Echo.bind(7); } event void Echo.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip_metadata *meta) { call Echo.sendto(from, data, len); } The wiring is as follows. components new UdpSocketC(); UDPEchoP.Echo -> UdpSocketC; tinyos-2.1.2+dfsg/tos/lib/net/blip/icmp/000077500000000000000000000000001207233610700200005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/icmp/ICMPCodeDispatchC.nc000066400000000000000000000035331207233610700234340ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ generic configuration ICMPCodeDispatchC(uint8_t type) { provides interface IP[uint8_t code]; } implementation { components ICMPCoreP; components new ICMPCodeDispatchP(); IP = ICMPCodeDispatchP; ICMPCodeDispatchP.RA -> ICMPCoreP.ICMP_IP[type]; } tinyos-2.1.2+dfsg/tos/lib/net/blip/icmp/ICMPCodeDispatchP.nc000066400000000000000000000044101207233610700234440ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ generic module ICMPCodeDispatchP() { provides interface IP[uint8_t code]; uses interface IP as RA; } implementation { event void RA.recv(struct ip6_hdr *iph, void *packet, size_t len, struct ip6_metadata *meta) { struct icmp6_hdr *icmph = packet; /* the ICMP component has already stripped off any extension headers. */ signal IP.recv[icmph->code](iph, packet, len, meta); } command error_t IP.send[uint8_t code](struct ip6_packet *msg) { return call RA.send(msg); } default event void IP.recv[uint8_t code](struct ip6_hdr *iph, void *packet, size_t len, struct ip6_metadata *meta) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/icmp/ICMPCoreP.nc000066400000000000000000000101151207233610700220010ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * * This module implements core ICMP functionality, like replying to * echo requests and sending time exceeded messages. Other modules * which want to implement other functionality can wire to the IP * interface. * */ #include #include #include "icmp6.h" #include "blip_printf.h" module ICMPCoreP { provides { interface IP as ICMP_IP[uint8_t type]; } uses { interface IP; interface IPAddress; interface Leds; } } implementation { event void IP.recv(struct ip6_hdr *iph, void *packet, size_t len, struct ip6_metadata *meta) { struct ip6_hdr *hdr = iph; struct ip6_packet reply; struct ip_iovec v; struct icmp6_hdr *req = (struct icmp6_hdr *)packet; uint16_t my_cksum, rx_cksum = ntohs(req->cksum); // SDH : we can compute the checksum for all ICMP messages here // this, for instance, protects RPL and ND since they sits on top // of ICMP. req->cksum = 0; v.iov_base = packet; v.iov_len = len; v.iov_next = NULL; my_cksum = msg_cksum(iph, &v, IANA_ICMP); printf("ICMP: type: %i rx_cksum: 0x%x my_cksum: 0x%x\n", req->type, rx_cksum, my_cksum); if (my_cksum != rx_cksum) { printf("ICMP: invalid checksum\n"); return; } switch (req->type) { case ICMP_TYPE_ECHO_REQUEST: req->type = ICMP_TYPE_ECHO_REPLY; memset(&reply, 0, sizeof(reply)); memcpy(reply.ip6_hdr.ip6_dst.s6_addr, hdr->ip6_src.s6_addr, 16); call IPAddress.setSource(&reply.ip6_hdr); reply.ip6_hdr.ip6_vfc = IPV6_VERSION; reply.ip6_hdr.ip6_nxt = IANA_ICMP; reply.ip6_data = &v; reply.ip6_hdr.ip6_plen = htons(len); call ICMP_IP.send[ICMP_TYPE_ECHO_REPLY](&reply); break; default: signal ICMP_IP.recv[req->type](iph, packet, len, meta); } } command error_t ICMP_IP.send[uint8_t type](struct ip6_packet *pkt) { struct icmp6_hdr *req = (struct icmp6_hdr *)pkt->ip6_data->iov_base; if (pkt->ip6_data->iov_len >= sizeof(struct icmp6_hdr) && pkt->ip6_hdr.ip6_nxt == IANA_ICMP) { req->cksum = 0; req->cksum = htons(msg_cksum(&pkt->ip6_hdr, pkt->ip6_data, IANA_ICMP)); } return call IP.send(pkt); } event void IPAddress.changed(bool valid) {} default event void ICMP_IP.recv[uint8_t type](struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/icmp/ICMPPingC.nc000066400000000000000000000041571207233610700220020ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Provide an interface for pinging other motes. * * Replying to ICMP echos is built into all motes running blip; * sending requests requires a component like this one. * */ configuration ICMPPingC { provides interface ICMPPing[uint8_t client]; } implementation { components ICMPPingP, ICMPCoreP; components new TimerMilliC(); components IPAddressC; ICMPPing = ICMPPingP; ICMPPingP.IP_ECHO -> ICMPCoreP.ICMP_IP[ICMP_TYPE_ECHO_REPLY]; ICMPPingP.PingTimer -> TimerMilliC; ICMPPingP.IPAddress -> IPAddressC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/icmp/ICMPPingP.nc000066400000000000000000000113021207233610700220050ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ module ICMPPingP { provides interface ICMPPing[uint8_t client]; uses { interface Timer as PingTimer; interface IP as IP_ECHO; interface IPAddress; } } implementation { uint16_t ping_seq, ping_n, ping_rcv, ping_ident; struct in6_addr ping_dest; void sendPing(struct in6_addr *dest, uint16_t seqno) { struct ip6_packet *ipmsg = (struct ip6_packet *)ip_malloc(sizeof(struct ip6_packet) + sizeof(icmp_echo_hdr_t) + sizeof(nx_uint32_t)); icmp_echo_hdr_t *e_hdr = (icmp_echo_hdr_t *)(ipmsg + 1); nx_uint32_t *sendTime = (nx_uint32_t *)(e_hdr + 1); struct ip_iovec v; if (ipmsg == NULL) return; // iovec v.iov_base = (void *)(ipmsg + 1); v.iov_len = sizeof(icmp_echo_hdr_t) + sizeof(nx_uint32_t); v.iov_next = NULL; ipmsg->ip6_data = &v; // icmp hdr e_hdr->type = ICMP_TYPE_ECHO_REQUEST; e_hdr->code = 0; e_hdr->cksum = 0; e_hdr->ident = ping_ident; e_hdr->seqno = seqno; *sendTime = call PingTimer.getNow(); // ip hdr memclr(&ipmsg->ip6_hdr, sizeof(struct ip6_hdr)); ipmsg->ip6_hdr.ip6_vfc = IPV6_VERSION; ipmsg->ip6_hdr.ip6_nxt = IANA_ICMP; ipmsg->ip6_hdr.ip6_plen = htons(v.iov_len); memcpy(&ipmsg->ip6_hdr.ip6_dst, dest->s6_addr, 16); call IPAddress.setSource(&ipmsg->ip6_hdr); e_hdr->cksum = msg_cksum(&ipmsg->ip6_hdr, ipmsg->ip6_data, IANA_ICMP); call IP_ECHO.send(ipmsg); ip_free(ipmsg); } command error_t ICMPPing.ping[uint8_t client](struct in6_addr *target, uint16_t period, uint16_t n) { if (call PingTimer.isRunning()) return ERETRY; call PingTimer.startPeriodic(period); memcpy(&ping_dest, target, 16); ping_n = n; ping_seq = 0; ping_rcv = 0; ping_ident = client; return SUCCESS; } event void PingTimer.fired() { // send a ping request if (ping_seq == ping_n) { signal ICMPPing.pingDone[ping_ident](ping_rcv, ping_n); call PingTimer.stop(); return; } sendPing(&ping_dest, ping_seq); ping_seq++; } // ping replies come here. event void IP_ECHO.recv(struct ip6_hdr *iph, void *packet, size_t len, struct ip6_metadata *meta) { icmp_echo_hdr_t *req = (icmp_echo_hdr_t *)packet; nx_uint32_t *sendTime = (nx_uint32_t *)(req + 1); struct icmp_stats p_stat; p_stat.seq = req->seqno; p_stat.ttl = iph->ip6_hlim; p_stat.rtt = (call PingTimer.getNow()) - (*sendTime); signal ICMPPing.pingReply[req->ident](&iph->ip6_src, &p_stat); ping_rcv++; // BLIP_STATS_INCR(stats.echo_rx); } default event void ICMPPing.pingReply[uint8_t client](struct in6_addr *source, struct icmp_stats *ping_stats) { } default event void ICMPPing.pingDone[uint8_t client](uint16_t n, uint16_t m) { } event void IPAddress.changed(bool global_valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/icmp/icmp6.h000066400000000000000000000055231207233610700211740ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef _ICMP_H_ #define _ICMP_H_ enum { ICMP_EXT_TYPE_PREFIX = 3, ICMP_EXT_TYPE_BEACON = 17, }; #ifndef LOW_POWER_LISTENING /* parameters for CSMA MAC */ enum { // jitter start requests by 10 seconds TRICKLE_JITTER = 10240, // have a trickle timer with a period of 4 TRICKLE_PERIOD = 4096, // send a maximum of three trickle messages TRICKLE_MAX = (TRICKLE_PERIOD << 5), }; #else /* parameters for LPL */ enum { // have a trickle timer with a period of 4 TRICKLE_PERIOD = 16384L, // jitter start requests by 10 seconds TRICKLE_JITTER = TRICKLE_PERIOD, // send a maximum of three trickle messages TRICKLE_MAX = (TRICKLE_PERIOD << 5), }; #endif typedef nx_struct icmp6_echo_hdr { nx_uint8_t type; /* type field */ nx_uint8_t code; /* code field */ nx_uint16_t cksum; /* checksum field */ nx_uint16_t ident; nx_uint16_t seqno; } icmp_echo_hdr_t; typedef nx_struct radv { nx_uint8_t type; nx_uint8_t code; nx_uint16_t cksum; nx_uint8_t hlim; nx_uint8_t flags; nx_uint16_t lifetime; nx_uint32_t reachable_time; nx_uint32_t retrans_time; nx_uint8_t options[0]; } radv_t; typedef nx_struct rsol { nx_uint8_t type; nx_uint8_t code; nx_uint16_t cksum; nx_uint32_t reserved; } rsol_t; typedef nx_struct rpfx { nx_uint8_t type; nx_uint8_t length; nx_uint8_t pfx_len; nx_uint8_t flags; nx_uint32_t valid_lifetime; nx_uint32_t preferred_lifetime; nx_uint32_t reserved; nx_uint8_t prefix[16]; } pfx_t; typedef nx_struct { nx_uint8_t type; nx_uint8_t length; nx_uint16_t metric; nx_uint16_t seqno; nx_uint8_t pad[2]; } rqual_t; struct icmp_stats { uint16_t seq; uint8_t ttl; uint32_t rtt; }; #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/000077500000000000000000000000001207233610700211735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/BlipStatistics.nc000066400000000000000000000024701207233610700244610ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ interface BlipStatistics { /* * Fills the given structure with the requested statistics. */ command void get(stat_str *stats); /* * Reset whatever statistics are being collected. */ command void clear(); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/ForwardingEvents.nc000066400000000000000000000024361207233610700250110ustar00rootroot00000000000000 #include #include #include interface ForwardingEvents { /** * Signaled when initiating a new flow (not forwarding). * * This allows higher-layer components to modify the payload or * insert new headers before the packet is sent. */ event bool initiate(struct ip6_packet *pkt, struct in6_addr *next_hop); /** * Signaled for each packet being forwarded. * * For datapath validation. Allows the routing protocol to look at * a packet as it flows through. If the event returns FALSE the * packet is dropped. The routing protocol may change fields in the * packet header such as the flow label. * * @pkt the packet being forwarded * @next_hop the ipv6 address of the next hop, as determined by the * forwarding engine. */ event bool approve(struct ip6_packet *pkt, struct in6_addr *next_hop); /** * Signaled once per packet. The send_info structure allows upper * layers to see how many fragments were attempted, and how many * transmissions were required. * * Allows a higher-level component to maintain * statistics on the link behavior of their routes. */ event void linkResult(struct in6_addr *dest, struct send_info *info); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/ForwardingTable.nc000066400000000000000000000012011207233610700245610ustar00rootroot00000000000000 #include interface ForwardingTable { /** * Insert a forwarding-table mapping for the given prefix, with the * given next-hop. */ command route_key_t addRoute(const uint8_t *prefix, int prefix_len_bits, struct in6_addr *next_hop, uint8_t ifindex); /** * Remove a routing table entry previously inserted using addRoute */ command error_t delRoute(route_key_t key); command struct route_entry *lookupRoute(const uint8_t *prefix, int prefix_len_bits); command struct route_entry *lookupRouteKey(route_key_t key); command struct route_entry *getTable(int *size); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/ForwardingTableEvents.nc000066400000000000000000000041531207233610700257570ustar00rootroot00000000000000/* * Copyright (c) 2008-2011 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ interface ForwardingTableEvents { /** * Signaled when a default route is added to the table; that is, * when the stack transitions from not having a default route to * having one. * * This event is not signaled again if the default route changes. */ event void defaultRouteAdded(); /** * Signaled when the default route is removed from the routing * table. If the route is removed, defaultRouteAdded() be signeled * when the route is re-added. */ event void defaultRouteRemoved(); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/ICMP.nc000066400000000000000000000024031207233610700222440ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ interface ICMP { command uint16_t cksum(struct split_ip_msg *msg, uint8_t nxt_hdr); command void sendTimeExceeded(struct ip6_hdr *hdr, unpack_info_t *u_info, uint16_t amount_here); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/ICMPPing.nc000066400000000000000000000004041207233610700230610ustar00rootroot00000000000000 #include interface ICMPPing { command error_t ping(struct in6_addr *target, uint16_t period, uint16_t n); event void pingReply(struct in6_addr *source, struct icmp_stats *stats); event void pingDone(uint16_t ping_rcv, uint16_t ping_n); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/IP.nc000066400000000000000000000013511207233610700220250ustar00rootroot00000000000000 #include interface IP { /* * sends the message with the headers and payload given. Things * which we know how to compress should be part of the data passed * in as headers; things which we cannot compress must be passed as * payload. * the interface is this way so that the stack may insert extra * (routing, snooping) headers between the two sections. * once the call returns, the stack has no claim on the buffer * pointed to */ command error_t send(struct ip6_packet *msg); /* * indicate that the stack has finished writing data into the * receive buffer. */ event void recv(struct ip6_hdr *hdr, void *packet, size_t len, struct ip6_metadata *meta); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/IPAddress.nc000066400000000000000000000036111207233610700233340ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include interface IPAddress { /** * Get the preferred link-local interface for this node */ command bool getLLAddr(struct in6_addr *addr); /** * Get the preferred global IPv6 address for this node */ command bool getGlobalAddr(struct in6_addr *addr); /** * Choose a source address for a packet originating at this node. */ command bool setSource(struct ip6_hdr *hdr); /** * @return TRUE if the address is assigned to a local interface */ command bool isLocalAddress(struct in6_addr *addr); /** * @return TRUE of the address is a link local address not requiring * routing. */ command bool isLLAddress(struct in6_addr *addr); command error_t setAddress(struct in6_addr *addr); command error_t removeAddress(); event void changed(bool valid); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/IPExtensions.nc000066400000000000000000000010511207233610700241020ustar00rootroot00000000000000 interface IPExtensions { command struct tlv_hdr *findTlv(struct ip6_ext *ext, uint8_t tlv); event void handleExtensions(uint8_t label, struct ip6_hdr *iph, struct ip6_ext *hop, struct ip6_ext *dst, struct ip6_route *route, uint8_t nxt_hdr); /* * will be called once for each fragment when sending or forwarding */ event void reportTransmission(uint8_t label, send_policy_t *send); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/IPForward.nc000066400000000000000000000015621207233610700233560ustar00rootroot00000000000000 #include #include "IPDispatch.h" interface IPForward { /* * sends the message with the headers and payload given. Things * which we know how to compress should be part of the data passed * in as headers; things which we cannot compress must be passed as * payload. * the interface is this way so that the stack may insert extra * (routing, snooping) headers between the two sections. * once the call returns, the stack has no claim on the buffer * pointed to */ command error_t send(struct in6_addr *next_hop, struct ip6_packet *msg, void *data); event void sendDone(struct send_info *status); /* * indicate that the stack has finished writing data into the * receive buffer. */ event void recv(struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/IPLower.nc000066400000000000000000000015721207233610700230430ustar00rootroot00000000000000 #include #include "IPDispatch.h" interface IPLower { /* * sends the message with the headers and payload given. Things * which we know how to compress should be part of the data passed * in as headers; things which we cannot compress must be passed as * payload. * the interface is this way so that the stack may insert extra * (routing, snooping) headers between the two sections. * once the call returns, the stack has no claim on the buffer * pointed to */ command error_t send(struct ieee154_frame_addr *next_hop, struct ip6_packet *msg, void *data); event void sendDone(struct send_info *status); /* * indicate that the stack has finished writing data into the * receive buffer. */ event void recv(struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/IPMiddle.nc000066400000000000000000000015611207233610700231470ustar00rootroot00000000000000 #include #include "IPDispatch.h" interface IPForward { /* * sends the message with the headers and payload given. Things * which we know how to compress should be part of the data passed * in as headers; things which we cannot compress must be passed as * payload. * the interface is this way so that the stack may insert extra * (routing, snooping) headers between the two sections. * once the call returns, the stack has no claim on the buffer * pointed to */ command error_t send(struct ieee154_frame_addr *next_hop, struct ip6_packet *msg, void *data); event void sendDone(struct send_info *status); /* * indicate that the stack has finished writing data into the * receive buffer. */ event void recv(struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/IPPacket.nc000066400000000000000000000014411207233610700231550ustar00rootroot00000000000000 interface IPPacket { /* * @type the next header value to look for. valid choices are in * ip.h and can be any valid IANA next-header value. The special * value IP6PKT_TRANSPORT will return the offset of the transport * header (ie, the first header which is not an IPv6 extension * header). * @return the offset of the * start of a given header within the packet, or -1 if it was not * found. */ command int findHeader(struct ip_iovec *payload, uint8_t first_type, uint8_t *search_type); command int findTLV(struct ip_iovec *header, int ext_offset, uint8_t type); command void delTLV(struct ip_iovec *data, int ext_offset, uint8_t type); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/Ieee154Address.nc000066400000000000000000000003741207233610700241300ustar00rootroot00000000000000 #include interface Ieee154Address { command ieee154_panid_t getPanId(); command ieee154_saddr_t getShortAddr(); command ieee154_laddr_t getExtAddr(); command error_t setShortAddr(ieee154_saddr_t addr); event void changed(); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/InternalIPExtension.nc000066400000000000000000000002231207233610700254140ustar00rootroot00000000000000 interface InternalIPExtension { command void addHeaders(struct split_ip_msg *msg, uint8_t nxt_hdr, uint16_t label); command void free(); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/NeighborDiscovery.nc000066400000000000000000000007741207233610700251520ustar00rootroot00000000000000 #include interface NeighborDiscovery { /** * Map the IPv6 address to a link-layer address. * @return FAIL if the address cannot be resolved, either becasue * it is not known or because the given IPv6 address is not on the link. */ command error_t resolveAddress(struct in6_addr *addr, ieee154_addr_t *link_addr); /** * Match */ command int matchContext(struct in6_addr *addr, uint8_t *ctx); command int getContext(uint8_t context, struct in6_addr *ctx); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/ReadLqi.nc000066400000000000000000000004271207233610700230410ustar00rootroot00000000000000/* Platform-independent wrappers for commonly-provided link metrics. */ interface ReadLqi { /* Read the Link Quality Indicator */ command uint8_t readLqi(message_t *msg); /* Read the Received Signal Strength Indicator */ command uint8_t readRssi(message_t *msg); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/TLVHeader.nc000066400000000000000000000002611207233610700232720ustar00rootroot00000000000000 #include interface TLVHeader { event struct tlv_hdr *getHeader(int label,int nxt_hdr, struct ip6_hdr *msg); event void free(); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/Tcp.nc000066400000000000000000000023241207233610700222440ustar00rootroot00000000000000 interface Tcp { /* * Bind the socket to a local address * */ command error_t bind(uint16_t port); /* * Accept an incomming connection. * * the app should return FALSE to reject the connection attempt */ event bool accept(struct sockaddr_in6 *from, void **tx_buf, int *tx_buf_len); /* * Split-phase connect: connect to a remote endpoint. * * The socket should not be used until connectDone is signaled. */ command error_t connect(struct sockaddr_in6 *dest, void *tx_buf, int tx_buf_len); event void connectDone(error_t e); /* * Send and receive data on a socket. The socket must be CONNECTed * for these to succeed. */ command error_t send(void *payload, uint16_t len); event void recv(void *payload, uint16_t len); /* * terminate a connection. */ command error_t close(); command error_t abort(); /* * notify the app that the socket connection has been closed or * reset by the other end, or else a timeout has occured and the * local side has given up. */ event void closed(error_t e); /* * returns TRUE if all previously sent data has been ACKed */ event void acked(); } tinyos-2.1.2+dfsg/tos/lib/net/blip/interfaces/UDP.nc000066400000000000000000000020211207233610700221400ustar00rootroot00000000000000 #include interface UDP { /* * bind a local address. to cut down memory requirements and handle the * common case well, you can only bind a port; all local interfaces are * implicitly bound. the port should be passed in host byte-order (is * this confusing? */ command error_t bind(uint16_t port); /* * send a payload to the socket address indicated * once the call returns, the stack has no claim on the buffer pointed to */ command error_t sendto(struct sockaddr_in6 *dest, void *payload, uint16_t len); command error_t sendtov(struct sockaddr_in6 *dest, struct ip_iovec *iov); /* * indicate that the stack has finished writing data into the * receive buffer. if error is not SUCCESS, the payload does not * contain valid data and the src pointer should not be used. */ event void recvfrom(struct sockaddr_in6 *src, void *payload, uint16_t len, struct ip6_metadata *meta); } tinyos-2.1.2+dfsg/tos/lib/net/blip/ipmulticast.h000066400000000000000000000002571207233610700215630ustar00rootroot00000000000000#ifndef IPMULTICAST_H_ #define IPMULTICAST_H_ #include enum { MCAST_FW_MAXLEN = 50, }; struct mcast_hdr { struct tlv_hdr tlv; uint16_t mcast_seqno; }; #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/iprouting.h000066400000000000000000000014101207233610700212350ustar00rootroot00000000000000#ifndef _IPROUTING_H_ #define _IPROUTING_H_ #include enum { ROUTE_INVAL_KEY = -1, }; #ifndef ROUTE_TABLE_SZ #define ROUTE_TABLE_SZ 20 #endif enum { ROUTE_IFACE_ALL = 0, ROUTE_IFACE_154 = 1, ROUTE_IFACE_PPP = 2, }; enum { ROUTE_DROP_NOROUTE, ROUTE_DROP_HLIM, }; typedef int route_key_t; struct route_entry { int valid:1; /* table entry is valid */ route_key_t key; /* a key used to identify this entry */ struct in6_addr prefix; /* destination */ uint8_t prefixlen; /* how many bits of the destination to match on */ struct in6_addr next_hop; /* next hop (must be an on-link address) */ uint8_t ifindex; /* interface index to send the packet out on */ }; #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/nwprog/000077500000000000000000000000001207233610700203645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/nwprog/At45dbStorageMapP.nc000066400000000000000000000034141207233610700240360ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written * agreement is hereby granted, provided that the above copyright * notice, the (updated) modification history and the author appear in * all copies of this source code. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, * OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ module At45dbStorageMapP { provides { interface StorageMap[uint8_t volume_id]; } uses { interface At45dbVolume[volume_id_t volume_id]; } } implementation { command storage_addr_t StorageMap.getPhysicalAddress[uint8_t volume_id](storage_addr_t addr) { storage_addr_t p_addr = 0xFFFFFFFF; at45page_t page = call At45dbVolume.remap[volume_id]((addr >> AT45_PAGE_SIZE_LOG2)); at45pageoffset_t offset = addr & ((1 << AT45_PAGE_SIZE_LOG2) - 1); p_addr = page; p_addr = p_addr << AT45_PAGE_SIZE_LOG2; p_addr += offset; return p_addr; } } tinyos-2.1.2+dfsg/tos/lib/net/blip/nwprog/BootImage.nc000066400000000000000000000002421207233610700225520ustar00rootroot00000000000000 interface BootImage { command void reboot(); command error_t boot(uint8_t img_num); // Added by Jaein Jeong command error_t erase(uint8_t img_num); } tinyos-2.1.2+dfsg/tos/lib/net/blip/nwprog/Deluge.h000066400000000000000000000072141207233610700217460ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written * agreement is hereby granted, provided that the above copyright * notice, the (updated) modification history and the author appear in * all copies of this source code. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, * OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #ifndef __DELUGE_H__ #define __DELUGE_H__ typedef nx_struct DelugeIdent { nx_uint32_t uidhash; // unique id of the image nx_uint32_t size; // size of the whole image (ident + CRCs + binary) nx_uint8_t numPgs; // number of pages of complete image nx_uint8_t reserved; nx_uint16_t crc; // crc over the above 4 fields nx_uint8_t appname[16]; nx_uint8_t username[16]; nx_uint8_t hostname[16]; nx_uint8_t platform[16]; nx_uint32_t timestamp; nx_uint32_t userhash; } DelugeIdent; typedef nx_struct DelugePatchCmd { nx_uint16_t linenum; // sequence number of patches, starting from 0 nx_uint8_t cmd; // patch cmd: 16 for upload, 17 for copy nx_uint16_t dst_offset; nx_uint16_t data_length; // byte length of the data nx_uint16_t src_offset; nx_uint8_t reserved[7]; nx_uint8_t data[0]; // data for the upload command } DelugePatchCmd; enum { DELUGE_INVALID_UID = 0xffffffff, DELUGE_NUM_VOLUMES = 2, DELUGE_IDENT_SIZE = 128, DELUGE_MAX_PAGES = 128, DELUGE_CRC_SIZE = sizeof(uint16_t), DELUGE_CRC_BLOCK_SIZE = DELUGE_MAX_PAGES * DELUGE_CRC_SIZE, DELUGE_BYTES_PER_PAGE = 23 * 48, }; enum { MAX_PATCH_DATA_SIZE = 512, PATCH_LINE_SIZE = 16, }; #define UQ_DELUGE_METADATA "DelugeMetadata.client" #define UQ_DELUGE_VOLUME_MANAGER "DelugeVolumeManager.client" #define UQ_DELUGE_VERIFY "DelugeVerify.client" #define UQ_DELUGE_PATCH "DelugePatch.client" #define UQ_DELUGE_READ_IDENT "DelugeReadIdent.client" typedef struct BootArgs { uint16_t address; uint32_t imageAddr; uint8_t gestureCount; bool noReprogram; } BootArgs; enum { NWPROG_CMD_ERASE = 1, NWPROG_CMD_WRITE = 2, NWPROG_CMD_READ = 3, NWPROG_CMD_LIST = 4, NWPROG_CMD_BOOT = 5, NWPROG_CMD_REBOOT= 6, NWPROG_CMD_READDONE = 7, NWPROG_CMD_IMAGEIFO = 8, }; enum { NWPROG_ERROR_OK = 0, }; enum{ PATCH_CMD_UPLOAD = 16, PATCH_CMD_COPY = 17, }; nx_struct ShortDelugeIdent { nx_uint8_t appname[16]; nx_uint8_t username[16]; nx_uint8_t hostname[16]; nx_uint32_t timestamp; }; typedef nx_struct prog_req { nx_uint8_t cmd; nx_uint8_t imgno; nx_union { nx_uint16_t offset; nx_uint16_t when; nx_uint16_t nimages; } cmd_data; nx_uint8_t data[0]; } prog_req_t; typedef nx_struct prog_reply { nx_uint8_t error; nx_uint8_t pad; nx_struct prog_req req; } prog_reply_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/nwprog/DelugeReadIdentP.nc000066400000000000000000000104631207233610700240170ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written * agreement is hereby granted, provided that the above copyright * notice, the (updated) modification history and the author appear in * all copies of this source code. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS' * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, * OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Razvan Musaloiu-E. * @author Chieh-Jan Mike Liang */ #include "imgNum2volumeId.h" module DelugeReadIdentP { provides interface DelugeMetadata; uses { interface Boot; interface BlockRead[uint8_t volumeId]; interface StorageMap[uint8_t volumeId]; event void storageReady(); } } implementation { enum { S_READY, S_READ_VOLUME, S_READ_NUM_VOLUMES, }; DelugeIdent ident; uint8_t state; uint8_t currentIdx; uint8_t currentVolume; uint8_t fields; uint8_t validVolumes; event void Boot.booted() { } command error_t DelugeReadIdent.readVolume(uint8_t imgNum) { if (state != S_READY) { return FAIL; } else { currentIdx = imgNum; currentVolume = _imgNum2volumeId[currentIdx]; if (imgNum < DELUGE_NUM_VOLUMES) { state = S_READ_VOLUME; return call BlockRead.read[currentVolume](0, &ident, sizeof(ident)); } else { return FAIL; } } } command error_t DelugeReadIdent.readNumVolumes() { if (state != S_READY) { return FAIL; } else { fields = 0; validVolumes = 0; currentIdx = 0; currentVolume = _imgNum2volumeId[currentIdx]; state = S_READ_NUM_VOLUMES; return call BlockRead.read[currentVolume](0, &ident, sizeof(ident)); } } event void BlockRead.readDone[uint8_t imgNum]( storage_addr_t addr, void* buf, storage_len_t len, error_t error) { switch (state) { case S_READ_VOLUME: if (error == SUCCESS && ident.uidhash != DELUGE_INVALID_UID) { signal DelugeReadIdent.readVolumeDone(currentIdx, buf, SUCCESS); } else { signal DelugeReadIdent.readVolumeDone(currentIdx, buf, FAIL); } state = S_READY; signal storageReady(); break; case S_READ_NUM_VOLUMES: if (error == SUCCESS && ident.uidhash != DELUGE_INVALID_UID) { // Increment valid volumes only when uidhash is valid. fields |= (1 << currentIdx); validVolumes++; } // Increment the number volumes read. currentIdx++; currentVolume = _imgNum2volumeId[currentIdx]; // Read the next volume when it didn't reach the end. if (currentIdx < DELUGE_NUM_VOLUMES) { call BlockRead.read[currentVolume](0, &ident, sizeof(ident)); } // Otherwise, notify the success. else { state = S_READY; signal storageReady(); signal DelugeReadIdent.readNumVolumesDone(validVolumes, fields, SUCCESS); } break; } } event void BlockRead.computeCrcDone[uint8_t imgNum]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {} default command error_t BlockRead.read[uint8_t imgNum]( storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t BlockRead.computeCrc[uint8_t imgNum]( storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; } default event void storageReady() {} default event void DelugeReadIdent.readNumVolumesDone( uint8_t validVols, uint8_t volumeFields, error_t error) {} default event void DelugeReadIdent.readVolumeDone( uint8_t imgNum, DelugeIdent* id, error_t error) {} } tinyos-2.1.2+dfsg/tos/lib/net/blip/nwprog/NWProgC.nc000066400000000000000000000031011207233610700221600ustar00rootroot00000000000000 // #include #include #include "Deluge.h" configuration NWProgC { provides interface BootImage; } implementation { // send and receive pages components MainC, new UdpSocketC(); components NetProgC, NWProgP; BootImage = NWProgP; components new BlockStorageC(VOLUME_GOLDENIMAGE) as BlockDeluge0; components new BlockStorageC(VOLUME_DELUGE1) as BlockDeluge1; NWProgP.Boot -> MainC; NWProgP.NetProg -> NetProgC; // NWProgP.StorageMap -> BlockStorageManagerC; NWProgP.Recv -> UdpSocketC; NWProgP.BlockWrite[VOLUME_GOLDENIMAGE] -> BlockDeluge0; NWProgP.BlockWrite[VOLUME_DELUGE1] -> BlockDeluge1; NWProgP.BlockRead[VOLUME_GOLDENIMAGE] -> BlockDeluge0; NWProgP.BlockRead[VOLUME_DELUGE1] -> BlockDeluge1; #ifdef BINARY_SHELL components BinaryShellC; NWProgP.ShellCommand -> BinaryShellC.BinaryCommand[BSHELL_NWPROG]; #else components new ShellCommandC("nwprog"); NWProgP.ShellCommand -> ShellCommandC; #endif components new TimerMilliC(); NWProgP.RebootTimer -> TimerMilliC; // deluge metadata stuff components new DelugeMetadataClientC(); NWProgP.DelugeMetadata -> DelugeMetadataClientC; #if defined(PLATFORM_TELOSB) NWProgP.StorageMap[VOLUME_GOLDENIMAGE] -> BlockDeluge0; NWProgP.StorageMap[VOLUME_DELUGE1] -> BlockDeluge1; #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) || defined(PLATFORM_MULLE) components At45dbStorageMapP, At45dbStorageManagerC; At45dbStorageMapP.At45dbVolume -> At45dbStorageManagerC; NWProgP.StorageMap -> At45dbStorageMapP; #endif } tinyos-2.1.2+dfsg/tos/lib/net/blip/nwprog/NWProgP.nc000066400000000000000000000260231207233610700222050ustar00rootroot00000000000000 #include #include #include "imgNum2volumeId.h" #include "Deluge.h" #include "blip_printf.h" module NWProgP { provides interface BootImage; uses { interface Boot; interface UDP as Recv; interface StorageMap[uint8_t imag_num]; interface NetProg; interface BlockRead[uint8_t img_num]; interface BlockWrite[uint8_t img_num]; interface DelugeMetadata; interface Timer as RebootTimer; event void storageReady(); #ifdef BINARY_SHELL interface BinaryCommand as ShellCommand; #else interface ShellCommand; #endif } } implementation { enum { S_IDLE, S_BUSY, }; uint8_t state; struct sockaddr_in6 endpoint; prog_reply_t reply; prog_reply_t *read_buffer; // SDH : if this is defined, we read back each packet after we write // it and check that it matches. It turns out that this doesn't // actually guarantee you much, due to buffering. #undef PARANOID #ifdef PARANOID bool paranoid_read; uint16_t cmp_len; uint8_t cmp_img; uint32_t cmp_off; uint8_t cmp_buf[256]; #endif // Begin-added by Jaein Jeong command error_t BootImage.erase(uint8_t img_num) { error_t error = call BlockWrite.erase[img_num](); return error; } // End-added command void BootImage.reboot() { call NetProg.reboot(); } command error_t BootImage.boot(uint8_t img_num) { return call NetProg.programImageAndReboot(call StorageMap.getPhysicalAddress[img_num](0)); } event void Boot.booted() { #ifdef PARANOID paranoid_read = FALSE; #endif state = S_IDLE; call Recv.bind(5213); } void sendDone(error_t error) { reply.error = error; call Recv.sendto(&endpoint, &reply, sizeof(prog_reply_t)); } event void Recv.recvfrom(struct sockaddr_in6 *from, void *payload, uint16_t len, struct ip6_metadata *meta) { prog_req_t *req = (prog_req_t *)payload; uint8_t imgNum = imgNum2volumeId(req->imgno); error_t error = FAIL; void *buffer; // just copy the payload out and write it into flash // we'll send the ack from the write done event. if (state != S_IDLE) return; memcpy(&endpoint, from, sizeof(struct sockaddr_in6)); memcpy(&reply.req, req, sizeof(prog_req_t)); switch (req->cmd) { case NWPROG_CMD_ERASE: error = call BlockWrite.erase[imgNum](); break; case NWPROG_CMD_WRITE: len -= sizeof(prog_req_t); #ifdef PARANOID if (len > sizeof(cmp_buf)) { error = ENOMEM; break; } memcpy(cmp_buf, req->data, len); cmp_len = len; cmp_off = req->cmd_data.offset; cmp_img = imgNum; #endif buffer = ip_malloc(len); if (buffer == NULL) { error = ENOMEM; break; } memcpy(buffer, req->data, len); error = call BlockWrite.write[imgNum](req->cmd_data.offset, buffer, len); if (error != SUCCESS) ip_free(buffer); break; case NWPROG_CMD_READ: { read_buffer = (prog_reply_t *)ip_malloc(64 + sizeof(prog_reply_t)); if (read_buffer == NULL) { error = ENOMEM; break; } memcpy(&read_buffer->req, req, sizeof(prog_req_t)); error = call BlockRead.read[imgNum](req->cmd_data.offset, read_buffer->req.data, 64); if (error != SUCCESS) { ip_free(read_buffer); } break; } default: error = FAIL; } // } if (error != SUCCESS) { sendDone(error); // if (call Resource.isOwner()) { // call Resource.release(); // } } else { state = S_BUSY; } } event void BlockWrite.writeDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { if (state != S_BUSY) return; #ifdef PARANOID if (len != cmp_len) { printf("WARNING: write length changed from %i to %lu!\n", cmp_len, len); } if (addr != cmp_off) { printf("WARNING: write address changed from %li to %li!\n", cmp_off, addr); } if (img_num != cmp_img) { printf("WARNING: write volume changed from %i to %i\n", cmp_img, img_num); } if (memcmp(buf, cmp_buf, cmp_len) != 0) { printf("WARNING: write data changed during call!\n"); } memset(buf, 0, cmp_len); if (call BlockRead.read[cmp_img](cmp_off, buf, cmp_len) == SUCCESS) { paranoid_read = TRUE; return; } #else ip_free(buf); #endif if (error == SUCCESS) { call BlockWrite.sync[img_num](); } else { state = S_IDLE; // call Resource.release(); sendDone(error); } } event void BlockRead.readDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { #ifdef PARANOID if (paranoid_read) { if (len != cmp_len) { printf("WARNING: read length changed from %u to %lu!\n", cmp_len, len); } if (addr != cmp_off) { printf("WARNING: read address changed from %li to %li!\n", cmp_off, addr); } if (img_num != cmp_img) { printf("WARNING: read volume changed from %i to %i\n", cmp_img, img_num); } if (memcmp(buf, cmp_buf, cmp_len) != 0) { printf("WARNING: write data changed during call!\n"); } else { printf("SUCCESS: write verified!\n"); } paranoid_read = FALSE; ip_free(buf); if (error == SUCCESS) { call BlockWrite.sync[img_num](); } else { // call Resource.release(); state = S_IDLE; sendDone(error); } return; } #endif if (state != S_BUSY || buf != read_buffer->req.data) return; read_buffer->error = error; call Recv.sendto(&endpoint, read_buffer, sizeof(prog_reply_t) + 64); ip_free(read_buffer); state = S_IDLE; } event void BlockWrite.eraseDone[uint8_t img_num](error_t error) { if (state != S_BUSY) return; if (error == SUCCESS) call BlockWrite.sync[img_num](); else { sendDone(error); state = S_IDLE; } } event void BlockWrite.syncDone[uint8_t img_num](error_t error) { if (state != S_BUSY) return; sendDone(error); state = S_IDLE; } /* * Shell command implementation */ uint8_t nwprog_currentvol, nwprog_validvols; uint8_t boot_image; uint8_t volumeID2imgNum(uint8_t volumeID) { switch(volumeID) { case VOLUME_GOLDENIMAGE: return 0; case VOLUME_DELUGE1: return 1; // case VOLUME_DELUGE2: return 2; // case VOLUME_DELUGE3: return 3; } } event void DelugeMetadata.readDone(uint8_t imgNum, DelugeIdent* ident, error_t error) { char *reply_buf = call ShellCommand.getBuffer(MAX_REPLY_LEN); if (error == SUCCESS) { if (ident->uidhash != DELUGE_INVALID_UID) { #ifdef BINARY_SHELL nx_struct cmd_payload *payload = (nx_struct cmd_payload *)reply_buf; prog_req_t *rep = (prog_req_t *)payload->data; nx_struct ShortDelugeIdent *i = (nx_struct ShortDelugeIdent *)rep->data; rep->cmd = NWPROG_CMD_IMAGEIFO; rep->imgno = volumeID2imgNum(imgNum); memcpy(i->appname, ident->appname, 16); memcpy(i->username, ident->username, 16); memcpy(i->hostname, ident->hostname, 16); i->timestamp = ident->timestamp; nwprog_validvols++; call ShellCommand.write(payload, sizeof(nx_struct cmd_payload) + sizeof(prog_reply_t) + sizeof(nx_struct ShortDelugeIdent)); #else int len; len = snprintf(reply_buf, MAX_REPLY_LEN, "image: %i\n\t[size: %li]\n\t[app: %s]\n\t[user: %s]\n\t[host: %s]\n\t[arch: %s]\n\t[time: 0x%lx]\n", volumeID2imgNum(imgNum), ident->size, (char *)ident->appname, (char *) ident->username, (char *)ident->hostname, (char *)ident->platform, (uint32_t)ident->timestamp); nwprog_validvols++; call ShellCommand.write(reply_buf, len); #endif } } if (++nwprog_currentvol < DELUGE_NUM_VOLUMES) { call DelugeMetadata.read(imgNum2volumeId(nwprog_currentvol)); } else { #ifdef BINARY_SHELL nx_struct cmd_payload *payload = (nx_struct cmd_payload *)reply_buf; prog_req_t *rep = (prog_req_t *)payload->data; rep->cmd = NWPROG_CMD_READDONE; rep->cmd_data.nimages = nwprog_validvols; call ShellCommand.write(payload, sizeof(nx_struct cmd_payload) + sizeof(prog_req_t)); #else int len; len = snprintf(reply_buf, MAX_REPLY_LEN, "%i valid image(s)\n", nwprog_validvols); call ShellCommand.write(reply_buf, len); #endif } } event void RebootTimer.fired() { call BootImage.boot(boot_image); } #ifdef BINARY_SHELL event void ShellCommand.dispatch(nx_struct cmd_payload *data, int len) { nx_struct prog_req *req = (nx_struct prog_req *)data->data; switch (req->cmd) { case NWPROG_CMD_LIST: nwprog_currentvol = 0; nwprog_validvols = 0; call DelugeMetadata.read(imgNum2volumeId(nwprog_currentvol)); return; break; case NWPROG_CMD_BOOT: call ShellCommand.write(data, len); boot_image = imgNum2volumeId(req->imgno); call RebootTimer.startOneShot(req->cmd_data.when); break; case NWPROG_CMD_REBOOT: call BootImage.reboot(); break; } } #else event char *ShellCommand.eval(int argc, char **argv) { char *nwprog_help_str = "nwprog [list | boot [when] | reboot]\n"; if (state != S_IDLE) return NULL; if (argc >= 2) { if (memcmp(argv[1], "list", 4) == 0) { nwprog_currentvol = 0; nwprog_validvols = 0; call DelugeMetadata.read(imgNum2volumeId(nwprog_currentvol)); return NULL; } else if (memcmp(argv[1], "boot", 4) == 0 && (argc == 3 || argc == 4)) { uint32_t when = 15; boot_image = atoi(argv[2]), boot_image = imgNum2volumeId(boot_image); if (argc == 4) when = atoi(argv[3]); if (when == 0) call RebootTimer.stop(); else { char *ack = call ShellCommand.getBuffer(15); snprintf(ack, 15, "REBOOT %li %i\n", when, boot_image); call RebootTimer.startOneShot(when); return ack; } return NULL; } else if (memcmp(argv[1], "reboot", 6) == 0) { call BootImage.reboot(); return NULL; } } return nwprog_help_str; } #endif default command error_t BlockWrite.write[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t BlockWrite.erase[uint8_t imgNum]() { return FAIL; } default command error_t BlockWrite.sync[uint8_t imgNum]() { return FAIL; } default command error_t BlockRead.read[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) {return FAIL;} event void BlockRead.computeCrcDone[uint8_t imgNum](storage_addr_t addr, storage_len_t len,uint16_t crc, error_t error) {} default command storage_addr_t StorageMap.getPhysicalAddress[uint8_t volume_id](storage_addr_t addr) { return 0xffffffff; } } tinyos-2.1.2+dfsg/tos/lib/net/blip/platform/000077500000000000000000000000001207233610700206745ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/platform/CC2420ReadLqiC.nc000066400000000000000000000007431207233610700233640ustar00rootroot00000000000000 uint16_t adjustLQI(uint8_t val) { uint16_t result = (80 - (val - 50)); result = (((result * result) >> 3) * result) >> 3; // result = (result ^ 3) / 64 return result; } module CC2420ReadLqiC { provides interface ReadLqi; uses interface CC2420Packet; } implementation { command uint8_t ReadLqi.readLqi(message_t *msg) { return call CC2420Packet.getLqi(msg); } command uint8_t ReadLqi.readRssi(message_t *msg) { return call CC2420Packet.getRssi(msg); } } tinyos-2.1.2+dfsg/tos/lib/net/blip/platform/RF230ReadLqiC.nc000066400000000000000000000010211207233610700233110ustar00rootroot00000000000000 uint16_t adjustLQI(uint8_t val) { uint16_t result = 64 - (val / 4); result = (((result * result) >> 3) * result) >> 3; // result = (result ^ 3) / 64 return result; } module RF230ReadLqiC { provides interface ReadLqi; uses interface PacketField as SubLqi; uses interface PacketField as SubRssi; } implementation { command uint8_t ReadLqi.readLqi(message_t *msg) { return call SubLqi.get(msg); } command uint8_t ReadLqi.readRssi(message_t *msg) { return call SubRssi.get(msg); } } tinyos-2.1.2+dfsg/tos/lib/net/blip/serial/000077500000000000000000000000001207233610700203275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/serial/SerialDevConfC.nc000066400000000000000000000054561207233610700234520ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ //$Id: SerialDevConfC.nc,v 1.2 2009/08/09 23:36:06 sdhsdh Exp $ /* "Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement * is hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." */ /** * Implementation of communication 802.15.4 message_t packets over the * serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ #include "SerialDevConf.h" configuration SerialDevConfC { provides { interface Send; interface Receive; } uses interface Leds; } implementation { components SerialPacketInfoDevConfP as Info, SerialDispatcherC; Leds = SerialDispatcherC; Send = SerialDispatcherC.Send[TOS_SERIAL_DEVCONF]; Receive = SerialDispatcherC.Receive[TOS_SERIAL_DEVCONF]; SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_DEVCONF] -> Info; } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/000077500000000000000000000000001207233610700201575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/BinaryCommand.nc000066400000000000000000000013371207233610700232300ustar00rootroot00000000000000 #include "BinaryShell.h" interface BinaryCommand { /* * evaluate the command that this command provides * @argc the number of arguments * @argv the arguments * @return a string to send back as the reply to the shell client. * if NULL, nothing is sent. */ event void dispatch(nx_struct cmd_payload *cmd, int len); /* * request a buffer. The result of this command may be returned * from 'eval', but otherwise the buffer may not be used outside of * the context it is called from. */ command char *getBuffer(int len); /* * write a string to the shell buffer; if no client is connected it * will fail silently */ command void write(nx_struct cmd_payload *data, int len); } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/BinaryShell.h000066400000000000000000000043321207233610700225460ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef BINARYSHELL_H_ #define BINARYSHELL_H_ #define BINARY_SHELL /* Struct definitions for builtin shell commands */ /* type ids for the builtin commands */ enum { BSHELL_ERROR = 0, BSHELL_ENUMERATE = 1, BSHELL_ECHO = 2, BSHELL_PING6 = 3, BSHELL_PING6_REPLY = 4, BSHELL_PING6_DONE = 5, BSHELL_UPTIME = 6, BSHELL_IDENT = 7, BSHELL_NWPROG = 8, }; nx_struct cmd_payload { nx_uint16_t id; nx_uint8_t forward; nx_uint8_t data[0]; }; enum { BSHELL_ERROR_NOTFOUND = 0, }; nx_struct bshell_error { nx_uint16_t code; }; nx_struct bshell_enumerate { nx_uint16_t cmdlist[0]; }; nx_struct bshell_echo { nx_uint8_t data[0]; }; nx_struct bshell_ping6 { nx_uint16_t cnt; nx_uint16_t dt; nx_uint8_t addr[16]; }; nx_struct bshell_ping6_reply { nx_uint8_t addr[16]; nx_uint16_t seqno; nx_uint16_t dt; nx_uint8_t ttl; }; nx_struct bshell_ping6_done { nx_uint16_t sent; nx_uint16_t received; }; nx_struct bshell_uptime { nx_uint32_t uptime_hi; nx_uint32_t uptime_lo; }; nx_struct bshell_ident { nx_uint8_t appname[16]; nx_uint8_t username[16]; nx_uint8_t hostname[16]; nx_uint32_t timestamp; }; #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/BinaryShellC.nc000066400000000000000000000035651207233610700230310ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include configuration BinaryShellC { provides interface BinaryCommand[uint16_t]; } implementation { components new UdpSocketC(); components BinaryShellP, LedsC; BinaryCommand = BinaryShellP; BinaryShellP.UDP -> UdpSocketC; components ICMPPingC; BinaryShellP.ICMPPing -> ICMPPingC.ICMPPing[unique("PING")]; #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) components CounterMilli32C; BinaryShellP.Uptime -> CounterMilli32C; #endif components MainC; BinaryShellP.Boot -> MainC; BinaryShellP.CmdEcho -> BinaryShellP.BinaryCommand[BSHELL_ECHO]; BinaryShellP.CmdPing6 -> BinaryShellP.BinaryCommand[BSHELL_PING6]; BinaryShellP.CmdIdent -> BinaryShellP.BinaryCommand[BSHELL_IDENT]; BinaryShellP.CmdUptime -> BinaryShellP.BinaryCommand[BSHELL_UPTIME]; } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/BinaryShellP.nc000066400000000000000000000131321207233610700230350ustar00rootroot00000000000000/* * "Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include #include #include #include "Shell.h" #include "BinaryShell.h" module BinaryShellP { provides { interface BinaryCommand[uint16_t cmd_id]; } uses { interface Boot; interface UDP; interface Leds; interface ICMPPing; #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) interface Counter as Uptime; #endif // interface BinaryCommand as CmdEnumerate; interface BinaryCommand as CmdEcho; interface BinaryCommand as CmdPing6; interface BinaryCommand as CmdUptime; interface BinaryCommand as CmdIdent; } } implementation { bool session_active; struct sockaddr_in6 session_endpoint; uint32_t boot_time; uint64_t uptime; uint8_t reply_buf[MAX_REPLY_LEN]; event void Boot.booted() { atomic { uptime = 0; #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) boot_time = call Uptime.get(); #endif } call UDP.bind(2001); } command char *BinaryCommand.getBuffer[uint16_t cmd_id](int len) { if (len <= MAX_REPLY_LEN) return reply_buf; return NULL; } command void BinaryCommand.write[uint16_t cmd_id](nx_struct cmd_payload *data, int len) { data->id = cmd_id; call UDP.sendto(&session_endpoint, data, len); } event void CmdEcho.dispatch(nx_struct cmd_payload *cmd, int len) { call CmdEcho.write(cmd, len); } event void CmdPing6.dispatch(nx_struct cmd_payload *cmd, int len) { nx_struct bshell_ping6 *ping = (nx_struct bshell_ping6 *)(cmd->data); call ICMPPing.ping((struct in6_addr *)ping->addr, ping->dt, ping->cnt); } event void CmdUptime.dispatch(nx_struct cmd_payload *cmd, int len) { #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) nx_struct cmd_payload *p = (nx_struct cmd_payload *)reply_buf; nx_struct bshell_uptime *u = (nx_struct bshell_uptime *)p->data; uint64_t tval = call Uptime.get(); atomic { tval = (uptime + tval - boot_time) / 1024; } u->uptime_hi = tval >> 32; u->uptime_lo = tval & 0xffffffff; call CmdUptime.write(p, sizeof(nx_struct cmd_payload) + sizeof(nx_struct bshell_uptime)); #endif } event void CmdIdent.dispatch(nx_struct cmd_payload *cmd, int len) { nx_struct cmd_payload *p = (nx_struct cmd_payload *)reply_buf; nx_struct bshell_ident *i = (nx_struct bshell_ident *)p->data; memcpy(i->appname, IDENT_APPNAME, 16); memcpy(i->username, IDENT_USERNAME, 16); memcpy(i->hostname, IDENT_HOSTNAME, 16); i->timestamp = IDENT_TIMESTAMP; call CmdIdent.write(p,sizeof(nx_struct cmd_payload) + sizeof(nx_struct bshell_ident)); } event void UDP.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { nx_struct cmd_payload *payload = (nx_struct cmd_payload *)data; memcpy(&session_endpoint, from, sizeof(struct sockaddr_in6)); signal BinaryCommand.dispatch[payload->id](payload, len); } event void ICMPPing.pingReply(struct in6_addr *source, struct icmp_stats *stats) { nx_struct cmd_payload *p = (nx_struct cmd_payload *)reply_buf; nx_struct bshell_ping6_reply *r = (nx_struct bshell_ping6_reply *)p->data; memcpy(r->addr, source, 16); r->seqno = stats->seq; r->dt = stats->rtt; r->ttl = stats->ttl; call BinaryCommand.write[BSHELL_PING6_REPLY](p, sizeof(nx_struct cmd_payload) + sizeof(nx_struct bshell_ping6_reply)); } event void ICMPPing.pingDone(uint16_t ping_rcv, uint16_t ping_n) { nx_struct cmd_payload *p = (nx_struct cmd_payload *)reply_buf; nx_struct bshell_ping6_done *d = (nx_struct bshell_ping6_done *)p->data; d->sent = ping_n; d->received = ping_rcv; call BinaryCommand.write[BSHELL_PING6_DONE](p, sizeof(nx_struct cmd_payload) + sizeof(nx_struct bshell_ping6_done)); } #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) async event void Uptime.overflow() { atomic uptime += 0xffffffff; } #endif default event void BinaryCommand.dispatch[uint16_t cmd_id](nx_struct cmd_payload *cmd, int len) { nx_struct cmd_payload *p = (nx_struct cmd_payload *)reply_buf; nx_struct bshell_error *e = (nx_struct bshell_error *)p->data; e->code = BSHELL_ERROR_NOTFOUND; call BinaryCommand.write[BSHELL_ERROR](p, sizeof(nx_struct cmd_payload) + sizeof(nx_struct bshell_enumerate)); } } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/FlashShellC.nc000066400000000000000000000004571207233610700226370ustar00rootroot00000000000000 #include "StorageVolumes.h" configuration FlashShellC { } implementation { components new ShellCommandC("flash"); FlashShellP.ShellCommand -> ShellCommandC; components new BlockStorageC(VOLUME_DELUGE1); FlashShellP.BlockRead -> BlockStorageC; FlashShellP.BlockWrite -> BlockStorageC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/FlashShellP.nc000066400000000000000000000026071207233610700226530ustar00rootroot00000000000000module FlashShellP { uses { interface Boot; interface Leds; interface ShellCommand; interface BlockRead; interface BlockWrite; } } implementation { event void Boot.booted() { if (call BlockWrite.erase() != SUCCESS) call Leds.led1Toggle(); } event void BlockRead.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error) { uint16_t r_len = snprintf(reply_buf, MAX_REPLY_LEN,"read done addr: 0x%x len: %i error: %i data: ", addr, len, error); if (len < MAX_REPLY_LEN - r_len - 1) memcpy(reply_buf + r_len, buf, len); reply_buf[r_len + len + 1] = '\n'; call UDP.sendto(&session_endpoint, reply_buf, r_len + len + 1); } event void BlockRead.computeCrcDone(storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { } event void BlockWrite.writeDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error) { uint16_t r_len = snprintf(reply_buf, MAX_REPLY_LEN,"write done addr: 0x%x len: %i error: %i\n", addr, len, error); call UDP.sendto(&session_endpoint, reply_buf, r_len); } event void BlockWrite.eraseDone(error_t error) { call Leds.led0Toggle(); } event void BlockWrite.syncDone(error_t error) { } } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/RegisterShellCommand.nc000066400000000000000000000001041207233610700245470ustar00rootroot00000000000000 interface RegisterShellCommand { event char *getCommandName(); } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/RouteCmdC.nc000066400000000000000000000035711207233610700223340ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ configuration RouteCmdC { } implementation { components RouteCmdP; components new ShellCommandC("route"); components IPStackC; RouteCmdP.ShellCommand -> ShellCommandC; RouteCmdP.ForwardingTable -> IPStackC; components new TimerMilliC(); RouteCmdP.Timer -> TimerMilliC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/RouteCmdP.nc000066400000000000000000000107641207233610700223530ustar00rootroot00000000000000/* * Copyright (c) 2008-2010 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include #include module RouteCmdP { uses interface ShellCommand; uses interface ForwardingTable; uses interface Timer; } implementation { char *header = "key\tdestination\t\tgateway\t\tiface\n"; struct { int ifindex; char *name; } ifaces[3] = {{0, "any"}, {1, "pan"}, {2, "ppp"}}; char *ifnam(int ifidx) { int i; for (i = 0; i < sizeof(ifaces) / sizeof(ifaces[0]); i++) { if (ifaces[i].ifindex == ifidx) return ifaces[i].name; } return NULL; } int cur_entry; event void Timer.fired() { #define LEN (MAX_REPLY_LEN - (cur - buf)) struct route_entry *entry; int n; char *cur, *buf = call ShellCommand.getBuffer(MAX_REPLY_LEN); cur = buf; entry = call ForwardingTable.getTable(&n); if (!buf || !entry) return; for (;cur_entry < n; cur_entry++) { if (entry[cur_entry].valid) { cur += snprintf(cur, LEN, "%2i\t", entry[cur_entry].key); cur += inet_ntop6(&entry[cur_entry].prefix, cur, LEN) - 1; cur += snprintf(cur, LEN, "/%i\t\t", entry[cur_entry].prefixlen); cur += inet_ntop6(&entry[cur_entry].next_hop, cur, LEN) - 1; if (LEN < 6) continue; *cur++ = '\t'; *cur++ = '\t'; strncpy(cur, ifnam(entry[cur_entry].ifindex), LEN); cur += 3; *cur++ = '\n'; if (LEN > (MAX_REPLY_LEN / 2)) { call ShellCommand.write(buf, cur - buf); call Timer.startOneShot(20); cur_entry++; return; } } } if (cur > buf) call ShellCommand.write(buf, cur - buf); } event char *ShellCommand.eval(int argc, char **argv) { char *cur, *buf = call ShellCommand.getBuffer(MAX_REPLY_LEN); if (argc == 1) { // send the routing table on a timer cur = buf; memcpy(cur, header, strlen(header)); cur += strlen(header); call ShellCommand.write(buf, cur - buf); cur_entry = 0; call Timer.startOneShot(20); } else if (strcmp(argv[1], "del") == 0 && argc == 3) { // delete a route based on the route key call ForwardingTable.delRoute(atoi(argv[2])); } else if (strcmp(argv[1], "add") == 0 && argc == 4) { // route add prefix[/len] nexthop // parse a new route from the arguments and add it // the forwarding table implementation currently only supports // prefixes in increments of 8 bits. struct in6_addr in_pfx, in_next; char *prefix = argv[2]; char *prefix_len = argv[2]; char *next = argv[3]; while (*prefix_len != '/' && *prefix_len != '\0') prefix_len++; if (*prefix_len == '/') *prefix_len++ = '\0'; else prefix_len = "128"; inet_pton6(prefix, &in_pfx); inet_pton6(next, &in_next); call ForwardingTable.addRoute(in_pfx.s6_addr, atoi(prefix_len), &in_next, ROUTE_IFACE_154); } return NULL; } } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/Shell.h000066400000000000000000000022261207233610700214010ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef _SHELL_H #define _SHELL_H enum { MAX_REPLY_LEN = 128, }; #endif tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/ShellCommand.nc000066400000000000000000000012461207233610700230520ustar00rootroot00000000000000 interface ShellCommand { /* * evaluate the command that this command provides * @argc the number of arguments * @argv the arguments * @return a string to send back as the reply to the shell client. * if NULL, nothing is sent. */ event char *eval(int argc, char **argv); /* * request a buffer. The result of this command may be returned * from 'eval', but otherwise the buffer may not be used outside of * the context it is called from. */ command char *getBuffer(uint16_t len); /* * write a string to the shell buffer; if no client is connected it * will fail silently */ command void write(char *str, int len); } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/ShellCommandC.nc000066400000000000000000000005451207233610700231560ustar00rootroot00000000000000 generic configuration ShellCommandC(char cmd_name[]) { provides interface ShellCommand; } implementation { enum { CMD_ID = unique("UDPSHELL_CLIENTCOUNT"), }; components new ShellCommandP(cmd_name), UDPShellP; ShellCommandP.RegisterShellCommand -> UDPShellP.RegisterShellCommand[CMD_ID]; ShellCommand = UDPShellP.ShellCommand[CMD_ID]; } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/ShellCommandP.nc000066400000000000000000000002741207233610700231720ustar00rootroot00000000000000 generic module ShellCommandP(char cmd_name[]) { uses interface RegisterShellCommand; } implementation { event char *RegisterShellCommand.getCommandName() { return cmd_name; } } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/UDPShellC.nc000066400000000000000000000041121207233610700222220ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include configuration UDPShellC { } implementation { components new UdpSocketC(); components UDPShellP, LedsC; UDPShellP.UDP -> UdpSocketC; UDPShellP.Leds -> LedsC; components ICMPPingC; UDPShellP.ICMPPing -> ICMPPingC.ICMPPing[unique("PING")]; #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) components CounterMilli32C; UDPShellP.Uptime -> CounterMilli32C; #endif components MainC; UDPShellP.Boot -> MainC; } tinyos-2.1.2+dfsg/tos/lib/net/blip/shell/UDPShellP.nc000066400000000000000000000222221207233610700222410ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include "Shell.h" module UDPShellP { provides { interface ShellCommand[uint8_t cmd_id]; interface RegisterShellCommand[uint8_t cmd_id]; } uses { interface Boot; interface UDP; interface Leds; interface ICMPPing; #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) interface Counter as Uptime; #endif } } implementation { bool session_active; struct sockaddr_in6 session_endpoint; uint32_t boot_time; uint64_t uptime; enum { N_EXTERNAL = uniqueCount("UDPSHELL_CLIENTCOUNT"), }; // and corresponding indeces enum { N_BUILTINS = 5, // the maximum number of arguments a command can take N_ARGS = 10, CMD_HELP = 0, CMD_ECHO = 1, CMD_PING6 = 2, CMD_TRACERT6 = 3, CMD_NO_CMD = 0xfe, CMDNAMSIZ = 10, }; struct cmd_name { uint8_t c_len; char c_name[CMDNAMSIZ]; }; struct cmd_builtin { void (*action)(int, char **); }; struct cmd_name externals[N_EXTERNAL]; event void Boot.booted() { int i; atomic { uptime = 0; #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) boot_time = call Uptime.get(); #endif } for (i = 0; i < N_EXTERNAL; i++) { externals[i].c_name[CMDNAMSIZ-1] = '\0'; strncpy(externals[i].c_name, signal RegisterShellCommand.getCommandName[i](), CMDNAMSIZ); externals[i].c_len = strlen(externals[i].c_name); } call UDP.bind(2000); } #define DEREF(X) #X #define QUOTE(X) DEREF(X) char reply_buf[MAX_REPLY_LEN]; char *help_str = "sdsh-0.9\tbuiltins: [help, echo, ping6, uptime, ident]\n"; const char *ping_fmt = " icmp_seq=%i ttl=%i time=%i ms\n"; const char *ping_summary = "%i packets transmitted, %i received\n"; char *ident_string = "\t[app: " IDENT_APPNAME "]\n\t[user: " IDENT_USERNAME "]\n\t[host: " IDENT_HOSTNAME "]\n\t[time: " QUOTE(IDENT_TIMESTAMP) "]\n"; void action_help(int argc, char **argv) { int i = 0; char *pos = reply_buf; call UDP.sendto(&session_endpoint, help_str, strlen(help_str)); if (N_EXTERNAL > 0) { strcpy(pos, "\t\t["); pos += 3; for (i = 0; i < N_EXTERNAL; i++) { if (externals[i].c_len + 4 < MAX_REPLY_LEN - (pos - reply_buf)) { memcpy(pos, externals[i].c_name, externals[i].c_len); pos += externals[i].c_len; if (i < N_EXTERNAL-1) { pos[0] = ','; pos[1] = ' '; pos += 2; } } else { pos[0] = '.'; pos[1] = '.'; pos[2] = '.'; pos += 3; break; } } *pos++ = ']'; *pos++ = '\n'; call UDP.sendto(&session_endpoint, reply_buf, pos - reply_buf); } } command char *ShellCommand.getBuffer[uint8_t cmd_id](uint16_t len) { reply_buf[0] = '\0'; if (len <= MAX_REPLY_LEN) return reply_buf; return NULL; } command void ShellCommand.write[uint8_t cmd_id](char *str, int len) { call UDP.sendto(&session_endpoint, str, len); } void action_echo(int argc, char **argv) { int i, arg_len; char *payload = reply_buf; if (argc < 2) return; for (i = 1; i < argc; i++) { arg_len = strlen(argv[i]); if ((payload - reply_buf) + arg_len + 1 > MAX_REPLY_LEN) break; memcpy(payload, argv[i], arg_len); payload += arg_len; *payload = ' '; payload++; } *(payload - 1) = '\n'; call UDP.sendto(&session_endpoint, reply_buf, payload - reply_buf); } void action_ping6(int argc, char **argv) { struct in6_addr dest; if (argc < 2) return; inet_pton6(argv[1], &dest); call ICMPPing.ping(&dest, 1024, 10); } void action_uptime(int argc, char **argv) { #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) int len; uint64_t tval = call Uptime.get(); atomic tval = (uptime + tval - boot_time) / 1024; len = snprintf(reply_buf, MAX_REPLY_LEN, "up %li seconds\n", (uint32_t)tval); call UDP.sendto(&session_endpoint, reply_buf, len); #endif } void action_ident(int argc, char **argv) { call UDP.sendto(&session_endpoint, ident_string, strlen(ident_string)); } // commands struct cmd_name builtins[N_BUILTINS] = {{4, "help"}, {4, "echo"}, {5, "ping6"}, {6, "uptime"}, {5, "ident"}}; struct cmd_builtin builtin_actions[N_BUILTINS] = {{action_help}, {action_echo}, {action_ping6}, {action_uptime}, {action_ident}}; // break up a command given as a string into a sequence of null terminated // strings, and initialize the argv array to point into it. void init_argv(char *cmd, uint16_t len, char **argv, int *argc) { int inArg = 0; *argc = 0; while (len > 0 && *argc < N_ARGS) { if (*cmd == ' ' || *cmd == '\n' || *cmd == '\t' || *cmd == '\0' || len == 1){ if (inArg) { *argc = *argc + 1; inArg = 0; *cmd = '\0'; } } else if (!inArg) { argv[*argc] = cmd; inArg = 1; } cmd ++; len --; } } int lookup_cmd(char *cmd, int dbsize, struct cmd_name *db) { int i; for (i = 0; i < dbsize; i++) { if (memcmp(cmd, db[i].c_name, db[i].c_len) == 0 && cmd[db[i].c_len] == '\0') return i; } return CMD_NO_CMD; } event void UDP.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { char *argv[N_ARGS]; int argc, cmd; memcpy(&session_endpoint, from, sizeof(struct sockaddr_in6)); init_argv((char *)data, len, argv, &argc); if (argc > 0) { cmd = lookup_cmd(argv[0], N_BUILTINS, builtins); if (cmd != CMD_NO_CMD) { builtin_actions[cmd].action(argc, argv); return; } cmd = lookup_cmd(argv[0], N_EXTERNAL, externals); if (cmd != CMD_NO_CMD) { char *reply = signal ShellCommand.eval[cmd](argc, argv); if (reply != NULL) call UDP.sendto(&session_endpoint, reply, strlen(reply)); return; } cmd = snprintf(reply_buf, MAX_REPLY_LEN, "sdsh: %s: command not found\n", argv[0]); call UDP.sendto(&session_endpoint, reply_buf, cmd); } } event void ICMPPing.pingReply(struct in6_addr *source, struct icmp_stats *stats) { int len; len = inet_ntop6(source, reply_buf, MAX_REPLY_LEN); if (len > 0) { len += snprintf(reply_buf + len - 1, MAX_REPLY_LEN - len + 1, ping_fmt, stats->seq, stats->ttl, stats->rtt); reply_buf[len] = '\0'; call UDP.sendto(&session_endpoint, reply_buf, len); } } event void ICMPPing.pingDone(uint16_t ping_rcv, uint16_t ping_n) { int len; len = snprintf(reply_buf, MAX_REPLY_LEN, ping_summary, ping_n, ping_rcv); call UDP.sendto(&session_endpoint, reply_buf, len); } #if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC) || defined(PLATFORM_Z1) async event void Uptime.overflow() { atomic uptime += 0xffffffff; } #endif default event char *ShellCommand.eval[uint8_t cmd_id](int argc, char **argv) { return NULL; } default event char *RegisterShellCommand.getCommandName[uint8_t cmd_id]() { return NULL; } } tinyos-2.1.2+dfsg/tos/lib/net/blip/table.c000066400000000000000000000033341207233610700203060ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #include #include "table.h" void table_init(table_t *table, void *data, uint16_t elt_len, uint16_t n_elts) { table->data = data; table->elt_len = elt_len; table->n_elts = n_elts; } void *table_search(table_t *table, int (*pred)(void *)) { int i; void *cur; for (i = 0; i < table->n_elts; i++) { cur = table->data + (i * table->elt_len); switch (pred(cur)) { case 1: return cur; case -1: return NULL; default: continue; } } return NULL; } void table_map(table_t *table, void(*fn)(void *)) { int i; for (i = 0; i < table->n_elts; i++) fn(table->data + (i * table->elt_len)); } tinyos-2.1.2+dfsg/tos/lib/net/blip/table.h000066400000000000000000000026301207233610700203110ustar00rootroot00000000000000/* * "Copyright (c) 2008, 2009 The Regents of the University of California. * All rights reserved." * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ #ifndef TABLE_H_ #define TABLE_H_ #include typedef struct { void *data; uint16_t elt_len; uint16_t n_elts; } table_t; void table_init(table_t *table, void *data,uint16_t elt_len, uint16_t n_elts); void *table_search(table_t *table, int (*pred)(void *)); void table_map(table_t *table, void (*fn)(void *)); #endif tinyos-2.1.2+dfsg/tos/lib/net/coap/000077500000000000000000000000001207233610700170445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapBufferHumTranslateC.nc000066400000000000000000000035161207233610700240420ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic configuration CoapBufferHumTranslateC() { provides interface Read as ReadHum; uses interface Read; } implementation { components new CoapBufferHumTranslateP(); ReadHum = CoapBufferHumTranslateP; CoapBufferHumTranslateP.Read = Read; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapBufferHumTranslateP.nc000066400000000000000000000046441207233610700240620ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic module CoapBufferHumTranslateP() { provides interface Read as ReadHum; uses interface Read; } implementation { command error_t ReadHum.read() { call Read.read(); return SUCCESS; } event void Read.readDone(error_t result, uint16_t val) { /* The calculation of the relative humidity for TelosB nodes is done according to the datasheet SHT1x (www.sensirion.com/en/pdf/product_information/Datasheet-humidity-sensor-SHT1x.pdf). RH = c1 + c2 * val + c3 * val^2 To avoid floating point calculations and to achieve a precision of 0.01 %, the values c1 and c2 are multiplied with 100 to get fixed point values and value c3 is transformed by 1/x. */ val = (-204 + val*4 -((uint32_t)val*(uint32_t)val)*100/628931); printf("CoapRead.readDone: %hu\n", val); signal ReadHum.readDone(result, val); } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapBufferTempTranslateC.nc000066400000000000000000000035251207233610700242160ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic configuration CoapBufferTempTranslateC() { provides interface Read as ReadTemp; uses interface Read; } implementation { components new CoapBufferTempTranslateP(); ReadTemp = CoapBufferTempTranslateP; CoapBufferTempTranslateP.Read = Read; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapBufferTempTranslateP.nc000066400000000000000000000046561207233610700242410ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic module CoapBufferTempTranslateP() { provides interface Read as ReadTemp; uses interface Read; } implementation { command error_t ReadTemp.read() { call Read.read(); return SUCCESS; } event void Read.readDone(error_t result, uint16_t val) { /* The calculation of the temperature for TelosB nodes is done according to the datasheet SHT1x (www.sensirion.com/en/pdf/product_information/Datasheet-humidity-sensor-SHT1x.pdf). T = d1 + d2 * val All values are multiplied with 100 to get a fixed-point representation and the final result is in Kelvin (+ 273.15). In addition, an offset can be subtracted for battery or USB powered nodes */ val = 23355 + val -200; //Offset: 500 for USB, 200 for Battery printf( "CoapBufferTempTranslateP.readDone: %hu \n", val); signal ReadTemp.readDone(result, val); } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapBufferVoltTranslateC.nc000066400000000000000000000035241207233610700242340ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic configuration CoapBufferVoltTranslateC() { provides interface Read as ReadVolt; uses interface Read; } implementation { components new CoapBufferVoltTranslateP(); ReadVolt = CoapBufferVoltTranslateP; CoapBufferVoltTranslateP.Read = Read; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapBufferVoltTranslateP.nc000066400000000000000000000043211207233610700242450ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic module CoapBufferVoltTranslateP() { provides interface Read as ReadVolt; uses interface Read; } implementation { command error_t ReadVolt.read() { call Read.read(); return SUCCESS; } event void Read.readDone(error_t result, uint16_t val) { /* The calculation of the voltage for TelosB nodes is done according to the formula given in $TOSROOT/tos/chips/msp430/sensors/Msp430InternalVoltageC.nc To provide a precision of 0.01 Volt, the equation is multiplied by 100.*/ val = (uint32_t)val*300/4096; printf("CoapRead.readDoneVolt: %hu \n", val); signal ReadVolt.readDone(result, val); } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapFlashResourceC.nc000066400000000000000000000036521207233610700230470ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic configuration CoapFlashResourceC(uint8_t uri_key) { provides interface ReadResource; provides interface WriteResource; uses interface ConfigStorage; } implementation { components new CoapFlashResourceP(uri_key) as CoapFlashResourceP; ReadResource = CoapFlashResourceP; WriteResource = CoapFlashResourceP; ConfigStorage = CoapFlashResourceP; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapFlashResourceP.nc000066400000000000000000000075321207233610700230650ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "tinyos_coap_resources.h" generic module CoapFlashResourceP(uint8_t uri_key) { provides interface ReadResource; provides interface WriteResource; uses interface ConfigStorage; } implementation { bool lock = FALSE; coap_tid_t temp_id; config_t conf; enum { CONFIG_ADDR = 0 }; ///////////// //GET ///////////// event void ConfigStorage.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t err) { if (err == SUCCESS) { memcpy(&conf, buf, len); } else { //printf("Read flash not successful\n"); } signal ReadResource.getDone(err, temp_id, 0, buf, sizeof(conf)); lock = FALSE; } command int ReadResource.get(coap_tid_t id) { if (lock == FALSE) { lock = TRUE; temp_id = id; if (call ConfigStorage.valid() == TRUE) { if (call ConfigStorage.read(CONFIG_ADDR, &conf, sizeof(conf)) != SUCCESS) { //printf("Config.read not successful \n"); lock = FALSE; return COAP_RESPONSE_500; } else { return COAP_SPLITPHASE; } } else { lock = FALSE; return COAP_RESPONSE_500; } } else { lock = FALSE; return COAP_RESPONSE_503; } } ///////////// //PUT ///////////// #warning "FIXME: CoAP: PreAck not implemented for put" event void ConfigStorage.commitDone(error_t err) { lock = FALSE; signal WriteResource.putDone(err, temp_id, 0); } event void ConfigStorage.writeDone(storage_addr_t addr, void *buf, storage_len_t len, error_t err) { if (err == SUCCESS) { if (call ConfigStorage.commit() != SUCCESS) { signal WriteResource.putDone(err, temp_id, 0); lock = FALSE; } } else { signal WriteResource.putDone(err, temp_id, 0); lock = FALSE; } } command int WriteResource.put(uint8_t *val, size_t buflen, coap_tid_t id) { if (lock == FALSE) { if (uri_key == KEY_KEY && buflen < sizeof(conf)) { return COAP_RESPONSE_500; } lock = TRUE; temp_id = id; memcpy(&conf, val, buflen); if (call ConfigStorage.write(CONFIG_ADDR, &conf, sizeof(conf)) != SUCCESS) { //printf("Config.write not successful\n"); lock = FALSE; return COAP_RESPONSE_500; } else { return COAP_SPLITPHASE; } } else { lock = FALSE; return COAP_RESPONSE_503; } } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapLedResourceC.nc000066400000000000000000000036161207233610700225160ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic configuration CoapLedResourceC(uint8_t uri_key) { provides interface ReadResource; provides interface WriteResource; uses interface Leds; } implementation { components new CoapLedResourceP(uri_key) as CoapLedResourceP; ReadResource = CoapLedResourceP; WriteResource = CoapLedResourceP; Leds = CoapLedResourceP; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapLedResourceP.nc000066400000000000000000000051321207233610700225260ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include generic module CoapLedResourceP(uint8_t uri_key) { provides interface ReadResource; provides interface WriteResource; uses interface Leds; } implementation { bool lock = FALSE; coap_tid_t temp_id; void task getLed() { uint8_t val = call Leds.get(); lock = FALSE; signal ReadResource.getDone(SUCCESS, temp_id, 0, (uint8_t*)&val, sizeof(uint8_t)); }; command int ReadResource.get(coap_tid_t id) { if (lock == FALSE) { lock = TRUE; temp_id = id; post getLed(); return COAP_SPLITPHASE; } else { return COAP_RESPONSE_503; } } void task setLedDone() { lock = FALSE; signal WriteResource.putDone(SUCCESS, temp_id, 0); }; command int WriteResource.put(uint8_t *val, size_t buflen, coap_tid_t id) { if (*val < 8) { if (lock == FALSE) { lock = TRUE; temp_id = id; call Leds.set(*val); post setLedDone(); return COAP_SPLITPHASE; } else { return COAP_RESPONSE_503; } } else { return COAP_RESPONSE_500; } } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapReadResourceC.nc000066400000000000000000000040021207233610700226530ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic configuration CoapReadResourceC(typedef val_t, uint8_t uri_key) { provides interface ReadResource; uses interface Read; } implementation { components LedsC; components new TimerMilliC() as PreAckTimer; components new CoapReadResourceP(val_t, uri_key) as CoapReadResourceP; ReadResource = CoapReadResourceP; CoapReadResourceP.Leds -> LedsC; CoapReadResourceP.PreAckTimer -> PreAckTimer; CoapReadResourceP.Read = Read; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapReadResourceP.nc000066400000000000000000000051671207233610700227050ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include generic module CoapReadResourceP(typedef val_t, uint8_t uri_key) { provides interface ReadResource; uses interface Leds; uses interface Timer as PreAckTimer; uses interface Read; } implementation { bool lock = FALSE; coap_tid_t temp_id; command int ReadResource.get(coap_tid_t id) { // printf("ReadResource.get: %hu\n", uri_key); if (lock == FALSE) { lock = TRUE; temp_id = id; call PreAckTimer.startOneShot(COAP_PREACK_TIMEOUT); call Read.read(); return COAP_SPLITPHASE; } else { return COAP_RESPONSE_503; } } event void PreAckTimer.fired() { call Leds.led2Toggle(); signal ReadResource.getDoneDeferred(temp_id); } event void Read.readDone(error_t result, val_t val) { uint8_t asyn_message = 1; if (call PreAckTimer.isRunning()) { call PreAckTimer.stop(); asyn_message = 0; } //printf("ReadResource.readDone\n"); signal ReadResource.getDone(result, temp_id, asyn_message, (uint8_t*)&val, sizeof(val_t)); lock = FALSE; } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapResourceCollectorC.nc000066400000000000000000000040031207233610700237270ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration CoapResourceCollectorC { provides interface Read as ReadAll; uses interface Read as ReadTemp; uses interface Read as ReadHum; uses interface Read as ReadVolt; } implementation { components CoapResourceCollectorP; ReadAll = CoapResourceCollectorP; CoapResourceCollectorP.ReadTemp = ReadTemp; CoapResourceCollectorP.ReadHum = ReadHum; CoapResourceCollectorP.ReadVolt = ReadVolt; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapResourceCollectorP.nc000066400000000000000000000064261207233610700237570ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "tinyos_coap_resources.h" module CoapResourceCollectorP { provides interface Read as ReadAll; uses interface Read as ReadTemp; uses interface Read as ReadHum; uses interface Read as ReadVolt; } implementation { bool temp_finished; bool hum_finished; bool volt_finished; val_all_t val_r; command error_t ReadAll.read() { val_r.id_t = KEY_TEMP; val_r.id_h = KEY_HUM; val_r.id_v = KEY_VOLT; val_r.temp = SENSOR_NOT_AVAILABLE; val_r.hum = SENSOR_NOT_AVAILABLE; val_r.volt = SENSOR_NOT_AVAILABLE; temp_finished = FALSE; hum_finished = FALSE; volt_finished = FALSE; call ReadHum.read(); call ReadTemp.read(); call ReadVolt.read(); return SUCCESS; } void areAllDone() { if ((temp_finished == TRUE) && (hum_finished == TRUE) && (volt_finished == TRUE) ) { signal ReadAll.readDone(SUCCESS, val_r); } } event void ReadTemp.readDone(error_t result, uint16_t val) { temp_finished = TRUE; if (result == SUCCESS) { val_r.length_t = sizeof(val); val_r.temp = ntohs(val); } else { val_r.temp = SENSOR_VALUE_INVALID; } areAllDone(); } event void ReadHum.readDone(error_t result, uint16_t val) { hum_finished = TRUE; if (result == SUCCESS) { val_r.length_h = sizeof(val); val_r.hum = ntohs(val); } else { val_r.hum = SENSOR_VALUE_INVALID; } areAllDone(); } event void ReadVolt.readDone(error_t result, uint16_t val) { volt_finished = TRUE; if (result == SUCCESS) { val_r.length_v = sizeof(val); val_r.volt = ntohs(val); } else { val_r.volt = SENSOR_VALUE_INVALID; } areAllDone(); } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapRouteResourceC.nc000066400000000000000000000036251207233610700231100ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic configuration CoapRouteResourceC(typedef val_t, uint8_t uri_key) { provides interface ReadResource; uses interface ForwardingTable; } implementation { components new CoapRouteResourceP(val_t, uri_key) as CoapRouteResourceP; // components IPStackC; ReadResource = CoapRouteResourceP; ForwardingTable = CoapRouteResourceP; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapRouteResourceP.nc000066400000000000000000000065671207233610700231350ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic module CoapRouteResourceP(typedef val_t, uint8_t uri_key) { provides interface ReadResource; uses interface ForwardingTable; } implementation { bool lock = FALSE; coap_tid_t temp_id; struct { int ifindex; char *name; } ifaces[3] = {{0, "any"}, {1, "pan"}, {2, "ppp"}}; char *ifnam(int ifidx) { int i; for (i = 0; i < sizeof(ifaces) / sizeof(ifaces[0]); i++) { if (ifaces[i].ifindex == ifidx) return ifaces[i].name; } return NULL; } void task getRoute() { #define LEN (COAP_MAX_PDU_SIZE - (cur - buf)) struct route_entry *entry; int n; int cur_entry; char *buf; char *cur; char buf2[COAP_MAX_PDU_SIZE]; buf = buf2; cur = buf; entry = call ForwardingTable.getTable(&n); if (!buf || !entry) { lock = FALSE; signal ReadResource.getDone(FAIL, temp_id, 0, (uint8_t*)buf, cur - buf); return; } for (;cur_entry < n; cur_entry++) { if (entry[cur_entry].valid) { cur += inet_ntop6(&entry[cur_entry].prefix, cur, LEN) - 1; cur += snprintf(cur, LEN, "/%i\t",entry[cur_entry].prefixlen); cur += inet_ntop6(&entry[cur_entry].next_hop, cur, LEN) - 1; if (LEN < 6) continue; *cur++ = '\t'; strncpy(cur, ifnam(entry[cur_entry].ifindex),LEN); cur += 3; *cur++ = '\n'; } } if (cur > buf) { lock = FALSE; signal ReadResource.getDone(SUCCESS, temp_id, 0, (uint8_t*)buf, cur - buf); } // } else { // // no route available? -> don't send a packet // signal ReadResource.getDone(SUCCESS, id_t, 0, (uint8_t*)"No Route", sizeof("No Route")); // } }; command int ReadResource.get(coap_tid_t id) { if (lock == FALSE) { lock = TRUE; temp_id = id; post getRoute(); return COAP_SPLITPHASE; } else { return COAP_RESPONSE_503; } } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapUdpClientC.nc000066400000000000000000000036501207233610700221670ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration CoapUdpClientC { provides interface CoAPClient; provides interface Init; uses interface LibCoAP as LibCoapClient; } implementation { components CoapUdpClientP, RandomC; CoAPClient = CoapUdpClientP.CoAPClient; LibCoapClient = CoapUdpClientP.LibCoapClient; Init = CoapUdpClientP.Init; CoapUdpClientP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapUdpClientP.nc000066400000000000000000000127201207233610700222020ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include module CoapUdpClientP { provides interface CoAPClient; provides interface Init; uses interface Random; uses interface LibCoAP as LibCoapClient; } implementation { coap_context_t *ctx_client; coap_queue_t *nextpdu; unsigned short tid; //generate random transaction id unsigned short get_tid(){ if (!tid) tid = call Random.rand16(); tid++; return ntohs(tid); } coap_pdu_t * coap_new_ack(coap_pdu_t *pdu) { coap_pdu_t *ack = coap_new_pdu(); if (!ack) return NULL; ack->hdr->type = COAP_MESSAGE_ACK; ack->hdr->id = pdu->hdr->id; ack->hdr->code = 0; return ack; } coap_pdu_t * coap_new_request(method_t m, coap_list_t *options, uint16_t len, void *data) { coap_pdu_t *pdu; coap_list_t *opt; if ( ! ( pdu = coap_new_pdu() ) ) return NULL; pdu->hdr->type = COAP_MESSAGE_CON; pdu->hdr->id = get_tid(); pdu->hdr->code = m; for (opt = options; opt; opt = opt->next) { coap_add_option( pdu, COAP_OPTION_KEY(*(coap_option *)opt->data), COAP_OPTION_LENGTH(*(coap_option *)opt->data), COAP_OPTION_DATA(*(coap_option *)opt->data) ); } if (len && data) coap_add_data( pdu, len, data); return pdu; } void message_handler(coap_context_t *ctx, coap_queue_t *node, void *data); command error_t Init.init() { ctx_client = (coap_context_t*)coap_malloc( sizeof( coap_context_t ) ); if ( !ctx_client ) { return FAIL; } memset(ctx_client, 0, sizeof( coap_context_t ) ); ctx_client->tinyos_port = COAP_CLIENT_PORT; coap_register_message_handler( ctx_client, message_handler ); return SUCCESS; } command error_t CoAPClient.request(struct sockaddr_in6 *dest, method_t method, coap_list_t *optlist, uint16_t len, void * data) { coap_pdu_t *pdu; if (! (pdu = coap_new_request( method, optlist, len, data ) ) ) return FAIL; if (call LibCoapClient.send(ctx_client, dest, pdu, 1) == COAP_INVALID_TID) { coap_delete_pdu (pdu); return FAIL; } return SUCCESS; }; command error_t CoAPClient.streamed_request(struct sockaddr_in6 *dest, method_t method, coap_list_t *optlist) { // TODO: implement block'ed data transfer return FAIL; } void message_handler(coap_context_t *ctx, coap_queue_t *node, void *data) { unsigned int len = 0; unsigned char *payload = NULL; bool more = FALSE; uint8_t mediatype = COAP_MEDIATYPE_TEXT_PLAIN; if (node->pdu->hdr->version != COAP_DEFAULT_VERSION) return; if (node->pdu->hdr->type == COAP_MESSAGE_CON) { coap_pdu_t *ack = coap_new_ack(node->pdu); // TODO: maybe move this to a separate task? if (call LibCoapClient.send(ctx_client, &node->remote, ack, 1) == COAP_INVALID_TID) { coap_delete_pdu (ack); } } if (node->pdu->hdr->code == COAP_RESPONSE_200) { coap_opt_t *ct, *block; ct = coap_check_option (node->pdu, COAP_OPTION_CONTENT_TYPE); if (ct) mediatype = *COAP_OPT_VALUE(*ct); block = coap_check_option (node->pdu, COAP_OPTION_BLOCK); if (!block) { if (!coap_get_data (node->pdu, &len, &payload)) return; } else { // TODO: implement requesting of next response block return; } } if (node->pdu->hdr->code != 0) signal CoAPClient.request_done ( node->pdu->hdr->code, mediatype, (uint16_t)len, data, more); } event void LibCoapClient.read(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { coap_read(ctx_client, from, data, len, meta); coap_dispatch(ctx_client); } default event void CoAPClient.request_done ( uint8_t code, uint8_t mediatype, uint16_t len, void *data, bool more) { } } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapUdpServerC.nc000066400000000000000000000042061207233610700222150ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration CoapUdpServerC { provides interface CoAPServer; provides interface Init; uses interface LibCoAP as LibCoapServer; uses interface ReadResource[uint8_t uri]; uses interface WriteResource[uint8_t uri]; } implementation { components CoapUdpServerP, LedsC, RandomC; CoAPServer = CoapUdpServerP.CoAPServer; LibCoapServer = CoapUdpServerP.LibCoapServer; ReadResource = CoapUdpServerP.ReadResource; WriteResource = CoapUdpServerP.WriteResource; Init = CoapUdpServerP.Init; CoapUdpServerP.Random -> RandomC; CoapUdpServerP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/net/coap/CoapUdpServerP.nc000066400000000000000000000663221207233610700222410ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include #include // for resource_t #include #include "tinyos_coap_resources.h" #include "blip_printf.h" #define INDEX "CoAPUdpServer: It works!!" #define GENERATE_PDU(var,t,c,i,copy_token) { \ var = coap_new_pdu(); \ if (var) { \ coap_opt_t *tok; \ var->hdr->type = (t); \ var->hdr->code = (c); \ var->hdr->id = (i); \ tok = coap_check_option(node->pdu, COAP_OPTION_TOKEN); \ if (tok && copy_token) \ coap_add_option( \ pdu, COAP_OPTION_TOKEN, COAP_OPT_LENGTH(*tok), COAP_OPT_VALUE(*tok));\ } \ } module CoapUdpServerP { provides interface CoAPServer; provides interface Init; uses interface LibCoAP as LibCoapServer; uses interface Random; uses interface Leds; uses interface ReadResource[uint8_t uri]; uses interface WriteResource[uint8_t uri]; } implementation { coap_context_t *ctx_server; unsigned short tid; //has to be static to ensure continuous increase for asyn responses // unlink a given node from the queue int coap_extract_node(coap_queue_t **queue, coap_queue_t *node) { coap_queue_t *q; if (!queue) return 0; q = *queue; if (q == node) { *queue = node->next; return 1; } for (;q; q = q->next) { if (q->next == node) { q->next = node->next; return 1; } } return 0; } //get uri (char) from key (int) //defined in tinyos_coap_ressources.h char* get_uri(uint8_t key) { if (key < NUM_URIS) { return uri_key_map[key].uri; } return ""; } //get key (int) from uri (char) //defined in tinyos_coap_ressources.h uint8_t get_key(uint8_t* uri, uint8_t len) { uint8_t i; for (i=0; i < NUM_URIS; i++) { if (strncmp(uri_key_map[i].uri, (const char*) uri, len) == 0) return uri_key_map[i].key; } return COAP_NO_SUCH_RESOURCE; } //generate new transaction id for async response unsigned short get_new_tid(){ if (!tid) tid = call Random.rand16(); tid++; return ntohs(tid); } int resource_splitphase(coap_uri_t *uri, coap_tid_t *id, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method); int coap_save_splitphase(coap_context_t *ctx, coap_queue_t *node); void message_handler(coap_context_t *ctx, coap_queue_t *node, void *data); command error_t Init.init() { ctx_server = (coap_context_t*)coap_malloc( sizeof( coap_context_t ) ); if ( !ctx_server ) { return FAIL; } memset(ctx_server, 0, sizeof( coap_context_t ) ); ctx_server->tinyos_port = COAP_SERVER_PORT; printf("init: port %u\n", ctx_server->tinyos_port); coap_register_message_handler( ctx_server, message_handler ); return SUCCESS; } command error_t CoAPServer.bind(uint16_t port) { return call LibCoapServer.bind(port); } #ifdef INCLUDE_WELLKNOWN /////////////////// // wellknown resources int print_link(coap_resource_t *resource, unsigned char *buf, size_t buflen) { size_t n = 0; //assert(resource); //assert(buf); if (resource == NULL || buf == NULL) { return -1; } if (buflen < resource->uri->path.length + 3) return -1; /* FIXME: calculate maximum length and return if longer than buflen */ buf[n++] = '<'; buf[n++] = '/'; memcpy(buf + n, resource->uri->path.s, resource->uri->path.length); n += resource->uri->path.length; buf[n++] = '>'; if (resource->mediatype != COAP_MEDIATYPE_ANY) { if (buflen - n < 7) /* mediatype is at most 3 digits */ return -1; n += snprintf((char *)(buf + n), buflen - n, ";ct=%d", resource->mediatype); } if (resource->name) { if (buflen - n < resource->name->length + 5) /* include trailing quote */ return -1; memcpy(buf + n, ";n=\"", 4); n += 4; memcpy(buf + n, resource->name->s, resource->name->length); n += resource->name->length; if (!resource->writable) { if (buflen - n < 12) return -1; n += snprintf((char *)(buf + n), buflen - n, " (read-only)"); } buf[n++] = '"'; } return n; } int resource_wellknown(coap_uri_t *uri, coap_tid_t *id, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method) { #define RESOURCE_BUFLEN 1000 static unsigned char resources[RESOURCE_BUFLEN]; size_t maxlen = 0; int n; coap_list_t *node; //assert(ctx_server); //assert(resource); if (ctx_server == NULL) { return COAP_RESPONSE_500; } /* first, update the link-set */ for (node = ctx_server->resources; node; node = node->next) { n = print_link(COAP_RESOURCE(node), resources + maxlen, RESOURCE_BUFLEN - maxlen); if (n <= 0) { /* error */ //debug("resource description too long, truncating\n"); resources[maxlen] = '\0'; break; } maxlen += n; if (node->next) /* check if another entry follows */ resources[maxlen++] = ','; else /* no next, terminate string */ resources[maxlen] = '\0'; } *finished = 1; switch (*mediatype) { case COAP_MEDIATYPE_ANY : case COAP_MEDIATYPE_APPLICATION_LINK_FORMAT : *mediatype = COAP_MEDIATYPE_APPLICATION_LINK_FORMAT; break; default : *buflen = 0; return COAP_RESPONSE_415; } if ( offset > maxlen ) { *buflen = 0; return COAP_RESPONSE_400; } else if ( offset + *buflen > maxlen ) *buflen = maxlen - offset; memcpy(buf, resources + offset, *buflen); *finished = offset + *buflen == maxlen; return COAP_RESPONSE_200; } #endif //register wellknown resource command error_t CoAPServer.registerWellknownCore() { #ifdef INCLUDE_WELLKNOWN coap_resource_t *r; if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) { return FAIL; } r->uri = coap_new_uri((const unsigned char *) COAP_DEFAULT_URI_WELLKNOWN, sizeof(COAP_DEFAULT_URI_WELLKNOWN)); r->mediatype = COAP_MEDIATYPE_APPLICATION_LINK_FORMAT; r->dirty = 0; r->writable = 0; r->splitphase = 0; r->immediately = 1; r->data = resource_wellknown; coap_add_resource( ctx_server, r ); return SUCCESS; #else #warning "CoAP Resource .wellknown/core disabled. Add CFLAGS += -DINCLUDE_WELLKNOWN to Makefile, if you want it included." return FAIL; #endif } /////////////////// // register resources command error_t CoAPServer.registerResource(char uri[MAX_URI_LENGTH], unsigned int uri_length, unsigned char mediatype, unsigned int writable, unsigned int splitphase, unsigned int immediately) { coap_resource_t *r; coap_key_t k; if ( !(r = coap_malloc( sizeof(coap_resource_t) ))) return FAIL; r->uri = coap_new_uri((const unsigned char*) uri, uri_length); r->mediatype = mediatype; r->dirty = 0; // CHECK r->writable = writable; r->splitphase = splitphase; r->immediately = immediately; r->data = resource_splitphase; k = coap_add_resource( ctx_server, r ); if (k == COAP_INVALID_HASHKEY) { return FAIL; } return SUCCESS; } /////////////////// // splitphase resources int resource_splitphase(coap_uri_t *uri, coap_tid_t *id, unsigned char *mediatype, unsigned int offset, unsigned char *buf, unsigned int *buflen, int *finished, unsigned int method) { if ( method == COAP_REQUEST_GET) { return call ReadResource.get[get_key(uri->path.s, uri->path.length)](*id); } else if ( method == COAP_REQUEST_PUT) { return call WriteResource.put[get_key(uri->path.s, uri->path.length)](buf, *buflen, *id); } else { //when the method is neither GET nor PUT, i.e. POST & DELETE -> 405 return COAP_RESPONSE_405; } } event void LibCoapServer.read(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { printf("CoapUdpServer: LibCoapServer.read()\n"); coap_read(ctx_server, from, data, len, meta); coap_dispatch(ctx_server); } ////////////////////// // some standard PDU's coap_pdu_t *new_ack( coap_context_t *ctx, coap_queue_t *node ) { coap_pdu_t *pdu; //printf("** coap: new_ack\n"); GENERATE_PDU(pdu,COAP_MESSAGE_ACK,0,node->pdu->hdr->id,0); return pdu; } coap_pdu_t *new_rst( coap_context_t *ctx, coap_queue_t *node, unsigned int code ) { coap_pdu_t *pdu; GENERATE_PDU(pdu,COAP_MESSAGE_RST,code,node->pdu->hdr->id,1); return pdu; } coap_pdu_t *new_response( coap_context_t *ctx, coap_queue_t *node, unsigned int code ) { coap_pdu_t *pdu; //printf("** coap: new_response %i\n", code); GENERATE_PDU(pdu,COAP_MESSAGE_ACK,code,node->pdu->hdr->id,1); return pdu; } coap_pdu_t *new_asynresponse( coap_context_t *ctx, coap_queue_t *node) { coap_pdu_t *pdu; //printf("** coap: new_asynresponse\n"); GENERATE_PDU(pdu,COAP_MESSAGE_CON,COAP_RESPONSE_200,node->pdu->hdr->id,1); return pdu; } //add default data in case of empty uri path. (for testing purposes only) void add_contents( coap_pdu_t *pdu, unsigned char mediatype, unsigned int len, unsigned char *data ) { unsigned char ct = COAP_MEDIATYPE_APPLICATION_LINK_FORMAT; if (!pdu) return; /* add content-encoding */ coap_add_option(pdu, COAP_OPTION_CONTENT_TYPE, 1, &ct); coap_add_data(pdu, len, data); } coap_opt_t* coap_next_option(coap_pdu_t *pdu, coap_opt_t *opt) { coap_opt_t *next; if ( !pdu || !opt ) return NULL; next = (coap_opt_t *)( (unsigned char *)opt + COAP_OPT_SIZE(*opt) ); return (unsigned char *)next < pdu->data && COAP_OPT_DELTA(*next) == 0 ? next : NULL; } int mediatype_matches(coap_pdu_t *pdu, unsigned char mediatype) { coap_opt_t *ct; if ( mediatype == COAP_MEDIATYPE_ANY ) return 1; for (ct = coap_check_option(pdu, COAP_OPTION_CONTENT_TYPE); ct; ct = coap_next_option(pdu, ct)) { if ( *COAP_OPT_VALUE(*ct) == mediatype ) return 1; } return 0; } /////////////////// // GET method coap_pdu_t *handle_get(coap_context_t *ctx, coap_queue_t *node, void *data) { coap_pdu_t *pdu; coap_uri_t uri; coap_resource_t *resource; coap_opt_t *block, *ct; unsigned int blklen, blk; int code, finished = 1; unsigned char mediatype = COAP_MEDIATYPE_ANY; static unsigned char buf[COAP_MAX_PDU_SIZE]; if ( !coap_get_request_uri( node->pdu, &uri ) ) return NULL; //printf("** coap: handle_get: uri %s \n", uri.path.s); //send default test response if no URI is given if ( !uri.path.length ) { pdu = new_response(ctx, node, COAP_RESPONSE_200); if ( !pdu ) return NULL; add_contents( pdu, COAP_MEDIATYPE_TEXT_PLAIN, sizeof(INDEX) - 1, (unsigned char *)INDEX ); return pdu; } // any other resource if ( !(resource = coap_get_resource(ctx, &uri)) ) return new_response(ctx, node, COAP_RESPONSE_404); /* check if requested mediatypes match */ if ( coap_check_option(node->pdu, COAP_OPTION_CONTENT_TYPE) && !mediatype_matches(node->pdu, resource->mediatype) ) return new_response(ctx, node, COAP_RESPONSE_415); block = coap_check_option(node->pdu, COAP_OPTION_BLOCK); if ( block ) { blk = coap_decode_var_bytes(COAP_OPT_VALUE(*block), COAP_OPT_LENGTH(*block)); blklen = 16 << (blk & 0x07); } else { blklen = 512; // default block size blk = coap_fls(blklen >> 4) - 1; } /* invoke callback function to get data representation of requested resource */ if ( resource->data ) { if ( resource->mediatype == COAP_MEDIATYPE_ANY && (ct = coap_check_option(node->pdu, COAP_OPTION_CONTENT_TYPE)) ) { mediatype = *COAP_OPT_VALUE(*ct); } //printf("handle_get: data()\n"); code = resource->data(&uri, &(node->pdu->hdr->id), &mediatype, (blk & ~0x0f) << (blk & 0x07), buf, &blklen, &finished, COAP_REQUEST_GET); //printf("handle_get: data()~ %u %u\n", resource->splitphase, code); if (resource->splitphase) { if (code == COAP_SPLITPHASE) { //printf("handle_get: save()\n"); /* handle subscription */ #warning "FIXME: CoAP: subscriptions not yet implemented" //FIXME: SAVE before calling data()? coap_save_splitphase(ctx, node); // this is a split-phase resource, no PDU ready yet, created in getDone return NULL; } else { //printf("** handle_get: splitphase not successful\n"); return new_response(ctx, node, code); } } else { //not splitphase -> resource_wellknown pdu = new_response(ctx, node, code); if ( !pdu ) return NULL; // Add buffer value to the PDU if (!coap_add_data(pdu, blklen, buf)) { coap_delete_pdu(pdu); if ( !(pdu = new_response(ctx_server, node, COAP_RESPONSE_500)) ) { //printf("** coap: return PDU Null for 500 response\n"); } } return pdu; } } else { // no callback available return new_response(ctx, node, COAP_RESPONSE_500); } } default command int ReadResource.get[uint8_t uri_key](coap_tid_t id) { //printf("** coap: default (get not available for this resource)....... %i\n", uri_key); return FAIL; } event void ReadResource.getDone[uint8_t uri_key](error_t result, coap_tid_t id, uint8_t asyn_message, uint8_t* val_buf, size_t buflen) { coap_queue_t *node; coap_pdu_t *pdu; coap_opt_t *ct; //printf("** coap: getDone.... %i %u %u\n", uri_key, id, ntohs(id)); // assuming more than one entry is in splitphasequeue if (!(node = coap_find_transaction(ctx_server->splitphasequeue, id))) { //printf("** coap: getDone: node in splitphasequeue not found %u\n", id); return; } if (result != SUCCESS) { //printf("** coap: sensor retrival failed\n"); if ( !(pdu = new_response(ctx_server, node, COAP_RESPONSE_500)) ) { //printf("** coap: return PDU Null for COAP_RESPONSE_500 \n"); } //FIXME memcpy(val_buf, "Sensor not found", 16); buflen = 16; } else { //printf("** coap: sensor retrival successful\n"); if (asyn_message){ node->pdu->hdr->id = get_new_tid(); if ( !(pdu = new_asynresponse(ctx_server, node)) ) { //printf("** coap: return PDU Null for Asyn response\n"); } } else { //normal response if ( !(pdu = new_response(ctx_server, node, COAP_RESPONSE_200)) ) { //printf("** coap: return PDU Null for normal response\n"); } } } // Add content-encoding // TODO: this should come from the resource, not the request! ct = coap_check_option( node->pdu, COAP_OPTION_CONTENT_TYPE ); if ( ct ) { coap_add_option( pdu, COAP_OPTION_CONTENT_TYPE, COAP_OPT_LENGTH(*ct),COAP_OPT_VALUE(*ct) ); } // Add buffer value to the PDU if (!coap_add_data(pdu, buflen, val_buf)) { coap_delete_pdu(pdu); if ( !(pdu = new_response(ctx_server, node, COAP_RESPONSE_500)) ) { //printf("** coap: return PDU Null for 500 response\n"); } } // sending pdu printf("getDone(): send PDU %u\n", ntohs(node->pdu->hdr->id)); if (pdu && (call LibCoapServer.send(ctx_server, &node->remote, pdu, 1) == COAP_INVALID_TID )) { //printf("** coap:error sending response\n"); coap_delete_pdu(pdu); } /* remove node from splitphasequeue */ //printf("getDone(): remove %u\n", ntohs(id)); //coap_remove_transaction(&ctx_server->splitphasequeue, id); coap_extract_node (&ctx_server->splitphasequeue, node); node->next = NULL; coap_delete_node( node ); //printf("getDone(): delete node details kept for splitphase response\n"); } event void ReadResource.getDoneDeferred[uint8_t uri_key](coap_tid_t id) { coap_queue_t *node; coap_pdu_t *pdu; uint8_t reqtoken = 0; printf("getDoneDeferred ##\n"); // assuming more than one entry is in splitphasequeue if (!(node = coap_find_transaction(ctx_server->splitphasequeue, id))){ //printf("** coap: getPreACK: node in splitphasequeue not found, quit\n"); return; } //check for token if (!coap_check_option(node->pdu, COAP_OPTION_TOKEN)) { //printf("** coap: token required --> send COAP_RESPONSE_240\n"); reqtoken = 1; if ( !(pdu = new_response(ctx_server, node, COAP_RESPONSE_X_240)) ) { //printf("** coap: return PDU Null for COAP_RESPONSE_240 \n"); } } else { //printf("** coap: send PreACK\n"); if ( !(pdu = new_ack(ctx_server, node)) ) { //printf("** coap: return PDU Null for PreACK response\n"); } } // sending pdu if (pdu && (call LibCoapServer.send(ctx_server, &node->remote, pdu, 1) == COAP_INVALID_TID )) { //printf("** coap: error sending response\n"); } if (reqtoken) { /* remove node from splitphasequeue */ coap_extract_node (&ctx_server->splitphasequeue, node); node->next = NULL; coap_delete_node(node); printf("** coap: delete node deferred\n"); } else { printf("** coap: PreACK sent!\n"); } } /////////////////// // PUT method coap_pdu_t * handle_put(coap_context_t *ctx, coap_queue_t *node, void *data) { coap_pdu_t *pdu; coap_uri_t uri; coap_opt_t *tok; coap_resource_t *resource; unsigned char mediatype = COAP_MEDIATYPE_ANY; coap_opt_t *ct,*block; unsigned int blklen, blk; int code, finished = 1; unsigned int len; unsigned char *databuf; //printf("** coap: handle put\n"); if ( !coap_get_request_uri( node->pdu, &uri ) ) return NULL; //send default test response if ( !uri.path.length ) { pdu = new_response(ctx, node, COAP_RESPONSE_200); if ( !pdu ) return NULL; add_contents( pdu, COAP_MEDIATYPE_TEXT_PLAIN, sizeof(INDEX) - 1, (unsigned char *)INDEX ); return pdu; } /* we do not want to create the resource if not available */ if ( !(resource = coap_get_resource(ctx, &uri)) ) return new_response(ctx, node, COAP_RESPONSE_404); if (!resource->writable) return new_response(ctx, node, COAP_RESPONSE_400); //check and get payload length coap_get_data(node->pdu, &len, &databuf); if (len == 0) return new_response(ctx, node, COAP_RESPONSE_201); block = coap_check_option(node->pdu, COAP_OPTION_BLOCK); if ( block ) { blk = coap_decode_var_bytes(COAP_OPT_VALUE(*block), COAP_OPT_LENGTH(*block)); blklen = 16 << (blk & 0x07); } else { blklen = 512; /* default block size is set to 512 Bytes locally */ blk = coap_fls(blklen >> 4) - 1; } tok = coap_check_option(node->pdu, COAP_OPTION_CONTENT_TYPE); resource->mediatype = tok ? *COAP_OPT_VALUE(*tok) : COAP_MEDIATYPE_ANY; resource->dirty = 1; /* mark for notification of observers */ /* invoke callback function to put data representation of requested resource */ if ( resource->data ) { if ( resource->mediatype == COAP_MEDIATYPE_ANY && (ct = coap_check_option(node->pdu, COAP_OPTION_CONTENT_TYPE)) ) { mediatype = *COAP_OPT_VALUE(*ct); } code = resource->data(&uri, &(node->pdu->hdr->id), &mediatype, (blk & ~0x0f) << (blk & 0x07), node->pdu->data, &len, &finished, COAP_REQUEST_PUT); if (resource->splitphase) { if (code == COAP_SPLITPHASE) { //printf("** coap: splitphase resource, save context and node details, send async response \n"); coap_save_splitphase(ctx, node); return NULL; } else { return new_response(ctx, node, COAP_RESPONSE_400); } } else { //no splitphase, handle this case return new_response(ctx, node, COAP_RESPONSE_500); } } else { // no callback available return new_response(ctx, node, COAP_RESPONSE_500); } } default command int WriteResource.put[uint8_t uri_key](uint8_t* val, size_t buflen, coap_tid_t id) { //printf("** coap: default (put not available for this resource)....... %i\n", uri_key); return FAIL; } event void WriteResource.putDone[uint8_t uri_key](error_t result, coap_tid_t id, uint8_t asyn_message) { coap_queue_t *node; coap_pdu_t *pdu; coap_opt_t *ct; //printf("** coap: putDone.... %i\n", uri_key); // assuming more than one entry is in splitphasequeue if (!(node = coap_find_transaction(ctx_server->splitphasequeue, id))){ //printf("** coap: puttDone: node in splitphasequeue not found, quit\n"); return; } if (result){ //printf("** coap: sensor retrival failed\n"); if ( !(pdu = new_response(ctx_server, node, COAP_RESPONSE_500)) ) { // printf("** coap: return PDU Null for COAP_RESPONSE_500 \n"); } //FIXME //memcpy(val_buf, "Sensor not found", 16); //buflen = 16; } else { //printf("** coap: sensor retrival successful\n"); if (asyn_message){ node->pdu->hdr->id = get_new_tid(); if ( !(pdu = new_asynresponse(ctx_server, node)) ) { //printf("** coap: return PDU Null for Asyn response\n"); } } else { if ( !(pdu = new_response(ctx_server, node, COAP_RESPONSE_200)) ) { //printf("** coap: return PDU Null for normal response\n"); } } } // Add content-encoding ct = coap_check_option( node->pdu, COAP_OPTION_CONTENT_TYPE ); if ( ct ) { coap_add_option( pdu, COAP_OPTION_CONTENT_TYPE, COAP_OPT_LENGTH(*ct),COAP_OPT_VALUE(*ct) ); } // sending pdu if (pdu && (call LibCoapServer.send(ctx_server, &node->remote, pdu, 1) == COAP_INVALID_TID )) { //printf("** coap:asyn Res: error sending response\n"); coap_delete_pdu(pdu); } /* remove node from asynresqueue */ coap_extract_node (&ctx_server->splitphasequeue, node); node->next = NULL; coap_delete_node( node ); //printf("** coap: delete node details kept for Asyn response\n"); } event void WriteResource.putDoneDeferred[uint8_t uri_key](coap_tid_t id) { #warning "FIXME: CoAP: putDoneDeferred not yet implemented" } /////////////////// // POST method coap_pdu_t *handle_post(coap_context_t *ctx, coap_queue_t *node, void *data) { #warning "FIXME: CoAP: POST method not yet implemented" return NULL; } /////////////////// // DELETE method coap_pdu_t *handle_delete(coap_context_t *ctx, coap_queue_t *node, void *data) { #warning "FIXME: CoAP: DELETE method not yet implemented" return NULL; } ////////////// // message handler for incoming messages void message_handler(coap_context_t *ctx, coap_queue_t *node, void *data) { coap_pdu_t *pdu = NULL; coap_uri_t uri; coap_resource_t *resource; #ifndef NDEBUG coap_show_pdu( node->pdu ); #endif if ( node->pdu->hdr->version != COAP_DEFAULT_VERSION ) { //printf("dropped packet with unknown version %u\n", node->pdu->hdr->version); return; } //printf("message handler\n"); if ( !coap_get_request_uri( node->pdu, &uri ) ) return; resource = coap_get_resource(ctx, &uri); switch (node->pdu->hdr->code) { case COAP_REQUEST_GET: pdu = handle_get(ctx, node, data); if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ){ if (resource && resource->splitphase) { break; } pdu = new_rst( ctx, node, COAP_RESPONSE_500 ); } break; case COAP_REQUEST_PUT: pdu = handle_put(ctx, node, data); if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ){ if (resource && resource->splitphase) { break; } pdu = new_rst( ctx, node, COAP_RESPONSE_500 ); } break; case COAP_REQUEST_POST: pdu = handle_post(ctx, node, data); if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ) pdu = new_response( ctx, node, COAP_RESPONSE_400 ); break; case COAP_REQUEST_DELETE: pdu = handle_delete(ctx, node, data); if ( !pdu && node->pdu->hdr->type == COAP_MESSAGE_CON ) pdu = new_response( ctx, node, COAP_RESPONSE_400 ); break; default: if ( node->pdu->hdr->type == COAP_MESSAGE_CON ) { if ( node->pdu->hdr->code >= COAP_RESPONSE_100 ) pdu = new_rst( ctx, node, COAP_RESPONSE_500 ); else { pdu = new_rst( ctx, node, COAP_RESPONSE_405 ); } } } if (pdu && (call LibCoapServer.send(ctx, &node->remote, pdu, 1) == COAP_INVALID_TID )) { //printf("message_handler: error sending response"); coap_delete_pdu(pdu); } } ////////////// // save details for splitphase operation for later int coap_save_splitphase(coap_context_t *ctx, coap_queue_t *node) { coap_queue_t *new_node; coap_opt_t *opt; printf("coap_save_split %u\n", ntohs(node->pdu->hdr->id)); new_node = coap_new_node(); if ( !new_node ) { printf("coap_split ret 1\n"); return -1; } new_node->pdu = coap_new_pdu(); if ( !new_node->pdu ) { printf("coap_split ret 2 del_node\n"); coap_delete_node( new_node ); return -1; } memcpy( &new_node->remote, &node->remote, sizeof( struct sockaddr_in6 ) ); printf("** coap: saving ctx and node details to send splitphase later\n"); /* "parse" received PDU by filling pdu structure */ memcpy(new_node->pdu->hdr, node->pdu->hdr, node->pdu->length ); new_node->pdu->length = node->pdu->length; /* finally calculate beginning of data block */ options_end( new_node->pdu, &opt ); if ( (unsigned char *)new_node->pdu->hdr + new_node->pdu->length < (unsigned char *)opt ) new_node->pdu->data = (unsigned char *)new_node->pdu->hdr + new_node->pdu->length; else new_node->pdu->data = (unsigned char *)opt; /* and add new node to splitphasequeue */ //printf("coap_split ins id %u\n", ntohs(new_node->pdu->hdr->id)); coap_insert_node( &ctx->splitphasequeue, new_node, order_transaction_id ); #ifndef NDEBUG coap_show_pdu( new_node->pdu ); #endif return 0; } } tinyos-2.1.2+dfsg/tos/lib/net/coap/LibCoapAdapterC.nc000066400000000000000000000041621207233610700223060ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration LibCoapAdapterC { #ifdef COAP_SERVER_ENABLED provides interface LibCoAP as LibCoapServer; uses interface UDP as UDPServer; #endif #ifdef COAP_CLIENT_ENABLED provides interface LibCoAP as LibCoapClient; uses interface UDP as UDPClient; #endif } implementation { components LibCoapAdapterP; #ifdef COAP_SERVER_ENABLED LibCoapServer = LibCoapAdapterP.LibCoapServer; UDPServer = LibCoapAdapterP.UDPServer; #endif #ifdef COAP_CLIENT_ENABLED LibCoapClient = LibCoapAdapterP.LibCoapClient; UDPClient = LibCoapAdapterP.UDPClient; #endif } tinyos-2.1.2+dfsg/tos/lib/net/coap/LibCoapAdapterP.nc000066400000000000000000000101671207233610700223250ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "blip_printf.h" #include #include module LibCoapAdapterP { #ifdef COAP_SERVER_ENABLED provides interface LibCoAP as LibCoapServer; uses interface UDP as UDPServer; #endif #ifdef COAP_CLIENT_ENABLED provides interface LibCoAP as LibCoapClient; uses interface UDP as UDPClient; #endif } implementation { // might get called in error cases from libcoap's net.c -> spontaneous. coap_tid_t coap_send_impl(coap_context_t *context, struct sockaddr_in6 *dst, coap_pdu_t *pdu, int free_pdu ) @C() @spontaneous() { coap_tid_t tid; #ifndef COAP_SERVER_ENABLED #ifndef COAP_CLIENT_ENABLED #error "CoAP without server and client?" #endif #endif if ( !context || !dst || !pdu ) return COAP_INVALID_TID; #ifdef COAP_CLIENT_ENABLED if (context->tinyos_port == (int) COAP_CLIENT_PORT) call UDPClient.sendto(dst, pdu->hdr, pdu->length); #endif #ifdef COAP_SERVER_ENABLED if (context->tinyos_port == (int) COAP_SERVER_PORT) call UDPServer.sendto(dst, pdu->hdr, pdu->length); #endif tid = pdu->hdr->id; if ( free_pdu ) coap_delete_pdu( pdu ); return ntohs(tid); } #ifdef COAP_SERVER_ENABLED void libcoap_server_read(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { signal LibCoapServer.read(from, data, len, meta); } event void UDPServer.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { printf( "LibCoapAdapter UDPServer.recvfrom()\n"); libcoap_server_read(from, data, len, meta); } command coap_tid_t LibCoapServer.send(coap_context_t *context, struct sockaddr_in6 *dst, coap_pdu_t *pdu, int free_pdu) { return coap_send_impl(context, dst, pdu, free_pdu); } command error_t LibCoapServer.bind(uint16_t port) { return call UDPServer.bind(port); } #endif #ifdef COAP_CLIENT_ENABLED void libcoap_client_read(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { signal LibCoapClient.read(from, data, len, meta); } event void UDPClient.recvfrom(struct sockaddr_in6 *from, void *data, uint16_t len, struct ip6_metadata *meta) { //printf("LibCoapAdapter UDPClient.recvfrom()\n"); libcoap_client_read(from, data, len, meta); } command coap_tid_t LibCoapClient.send(coap_context_t *context, struct sockaddr_in6 *dst, coap_pdu_t *pdu, int free_pdu) { return coap_send_impl(context, dst, pdu, free_pdu); } command error_t LibCoapClient.bind(uint16_t port) { return call UDPClient.bind(port); } #endif } tinyos-2.1.2+dfsg/tos/lib/net/coap/tinyos_net.c000066400000000000000000000100431207233610700214010ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include int coap_read(coap_context_t *ctx, struct sockaddr_in6 *src, void *buf, uint16_t bytes_read, struct ip6_metadata *meta) { coap_queue_t *node; coap_opt_t *opt; if ( bytes_read < 0 || bytes_read>=COAP_MAX_PDU_SIZE) { return -1; } if ( bytes_read < sizeof(coap_hdr_t) || ((coap_hdr_t *)buf)->version != COAP_DEFAULT_VERSION ) { #ifndef NDEBUG //fprintf(stderr, "coap_read: discarded invalid frame\n" ); #endif return -1; } node = coap_new_node(); if ( !node ) return -1; node->pdu = coap_new_pdu(); if ( !node->pdu ) { coap_delete_node( node ); return -1; } /*printf("** coap: coap_read pointers %p %p, %p %p\n", &node->remote, node->remote, src, *src, sizeof(src), sizeof(*src));*/ memcpy( &node->remote, src, sizeof( *src ) ); /* "parse" received PDU by filling pdu structure */ memcpy( node->pdu->hdr, buf, bytes_read ); node->pdu->length = bytes_read; /* finally calculate beginning of data block */ options_end( node->pdu, &opt ); if ( (unsigned char *)node->pdu->hdr + node->pdu->length < (unsigned char *)opt ) node->pdu->data = (unsigned char *)node->pdu->hdr + node->pdu->length; else node->pdu->data = (unsigned char *)opt; /* and add new node to receive queue */ coap_insert_node( &ctx->recvqueue, node, order_transaction_id ); #ifndef NDEBUG if ( inet_ntop(src.sin6_family, &src.sin6_addr, addr, INET6_ADDRSTRLEN) == 0 ) { //perror("coap_read: inet_ntop"); } else { printf( "** received from [%s]:%d:\n ",addr,ntohs(src.sin6_port)); } coap_show_pdu( node->pdu ); #endif return 0; } //CLIENT: int order_opts(void *a, void *b) { if (!a || !b) return a < b ? -1 : 1; if (COAP_OPTION_KEY(*(coap_option *)a) < COAP_OPTION_KEY(*(coap_option *)b)) return -1; return COAP_OPTION_KEY(*(coap_option *)a) == COAP_OPTION_KEY(*(coap_option *)b); } //CLIENT: coap_list_t * new_option_node(unsigned short key, unsigned int length, char *data) { coap_option *option; coap_list_t *node; option = coap_malloc(sizeof(coap_option) + length); if ( !option ) goto error; COAP_OPTION_KEY(*option) = key; COAP_OPTION_LENGTH(*option) = length; memcpy(COAP_OPTION_DATA(*option), data, length); /* we can pass NULL here as delete function since option is released automatically */ node = coap_new_listnode(option, NULL); if ( node ) return node; error: //perror("new_option_node: malloc"); coap_free( option ); return NULL; } tinyos-2.1.2+dfsg/tos/lib/net/coap/tinyos_net.h000066400000000000000000000050441207233610700214130ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Bremen, TZI * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _COAP_NET_TINYOS_H_ #define _COAP_NET_TINYOS_H_ #include #include #define options_start(p) ((coap_opt_t *) ( (unsigned char *)p->hdr + sizeof ( coap_hdr_t ) )) #define options_end(p, opt) { \ unsigned char opt_code = 0, cnt; \ *opt = options_start( node->pdu ); \ for ( cnt = (p)->hdr->optcnt; cnt; --cnt ) { \ opt_code += COAP_OPT_DELTA(**opt); \ *opt = (coap_opt_t *)( (unsigned char *)(*opt) + COAP_OPT_SIZE(**opt)); \ } \ } //CLIENT: int order_opts(void *a, void *b); coap_list_t* new_option_node(unsigned short key, unsigned int length, char *data); /** * Reads data from the network and tries to parse as CoAP PDU. On * success, 0 is returned and a new node with the parsed PDU is added * to the receive queue in the specified context object. */ int coap_read(coap_context_t *ctx, struct sockaddr_in6 *src, void *buf, uint16_t bytes_read, struct ip6_metadata *meta); #endif tinyos-2.1.2+dfsg/tos/lib/net/ctp/000077500000000000000000000000001207233610700167105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/ctp/Collection.h000066400000000000000000000037101207233610700211550ustar00rootroot00000000000000/* $Id: Collection.h,v 1.5 2010-06-29 22:07:49 scipio Exp $ */ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * @author Rodrigo Fonseca * @date $Date: 2010-06-29 22:07:49 $ */ #ifndef COLLECTION_H #define COLLECTION_H enum { AM_COLLECTION_DATA = 20, AM_COLLECTION_CONTROL = 21, AM_COLLECTION_DEBUG = 22, }; typedef uint8_t collection_id_t; typedef nx_uint8_t nx_collection_id_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/ctp/CollectionC.nc000066400000000000000000000051651207233610700214370ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Ctp.h" /** * A data collection service that uses a tree routing protocol * to deliver data to collection roots, following TEP 119. * * @author Rodrigo Fonseca * @author Omprakash Gnawali * @author Kyle Jamieson * @author Philip Levis */ configuration CollectionC { provides { interface StdControl; interface Send[uint8_t client]; interface Receive[collection_id_t id]; interface Receive as Snoop[collection_id_t]; interface Intercept[collection_id_t id]; interface Packet; interface CollectionPacket; interface CtpPacket; interface CtpInfo; interface CtpCongestion; interface RootControl; } uses { interface CollectionId[uint8_t client]; interface CollectionDebug; } } implementation { components CtpP; StdControl = CtpP; Send = CtpP; Receive = CtpP.Receive; Snoop = CtpP.Snoop; Intercept = CtpP; Packet = CtpP; CollectionPacket = CtpP; CtpPacket = CtpP; CtpInfo = CtpP; CtpCongestion = CtpP; RootControl = CtpP; CollectionId = CtpP; CollectionDebug = CtpP; } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CollectionSenderC.nc000066400000000000000000000037771207233610700226070ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The virtualized collection sender abstraction. * * @author Kyle Jamieson * @author Philip Levis * @date April 25 2006 * @see TinyOS Net2-WG */ #include generic configuration CollectionSenderC(collection_id_t collectid) { provides { interface Send; interface Packet; } } implementation { components new CollectionSenderP(collectid, unique(UQ_CTP_CLIENT)); Send = CollectionSenderP; Packet = CollectionSenderP; } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CollectionSenderP.nc000066400000000000000000000037071207233610700226150ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Collection.h" generic configuration CollectionSenderP(collection_id_t collectid, uint8_t clientid) { provides { interface Send; interface Packet; } } implementation { components CollectionC as Collector; components new CollectionIdP(collectid); Send = Collector.Send[clientid]; Packet = Collector.Packet; Collector.CollectionId[clientid] -> CollectionIdP; } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CompareBit.nc000066400000000000000000000046531207233610700212670ustar00rootroot00000000000000/* $Id: CompareBit.nc,v 1.4 2010-06-29 22:07:49 scipio Exp $ */ /* * Copyright (c) 2006 University of Southern California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** Link estimator asks the routing engine if this entry * should be inserted into the neighbor table if the * white bit on a link is set but there is no room for the link * on the link table. The return value is the "pin bit" - if true * insert into the neighbor table. In the reference implementation * the router will return true if the path through the source * will be better than a path through at least one current neighbor. @ author Omprakash Gnawali @ Created: September 16, 2006 @date $Date: 2010-06-29 22:07:49 $ */ interface CompareBit { /* should the source of this message be inserted into the neighbor table? */ /* expect to be called only for links with the white bit set */ event bool shouldInsert(message_t * ONE msg, void* COUNT_NOK(len) payload, uint8_t len); } tinyos-2.1.2+dfsg/tos/lib/net/ctp/Ctp.h000066400000000000000000000055731207233610700176210ustar00rootroot00000000000000/* $Id: Ctp.h,v 1.7 2009-08-10 23:50:06 scipio Exp $ */ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Header file that declares the AM types, message formats, and * constants for the TinyOS reference implementation of the * Collection Tree Protocol (CTP), as documented in TEP 123. * * @author Philip Levis * @date $Date: 2009-08-10 23:50:06 $ */ #ifndef CTP_H #define CTP_H #include #include #define UQ_CTP_CLIENT "CtpSenderC.CollectId" enum { // AM types: AM_CTP_ROUTING = 0x70, AM_CTP_DATA = 0x71, AM_CTP_DEBUG = 0x72, // CTP Options: CTP_OPT_PULL = 0x80, // TEP 123: P field CTP_OPT_ECN = 0x40, // TEP 123: C field CTP_OPT_ALL = 0xff }; typedef nx_uint8_t nx_ctp_options_t; typedef uint8_t ctp_options_t; typedef nx_struct { nx_ctp_options_t options; nx_uint8_t thl; nx_uint16_t etx; nx_am_addr_t origin; nx_uint8_t originSeqNo; nx_collection_id_t type; nx_uint8_t (COUNT(0) data)[0]; // Deputy place-holder, field will probably be removed when we Deputize Ctp } ctp_data_header_t; typedef nx_struct { nx_ctp_options_t options; nx_am_addr_t parent; nx_uint16_t etx; nx_uint8_t (COUNT(0) data)[0]; // Deputy place-holder, field will probably be removed when we Deputize Ctp } ctp_routing_header_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpCongestion.nc000066400000000000000000000012021207233610700220040ustar00rootroot00000000000000interface CtpCongestion { /* Returns the current state of congestion from the provider. Ctp may be * congested because its internal queue is congested or because the receive * client called isCongested with TRUE. */ command bool isCongested(); /* Idempotent call to let the provider know whether a client is congested. * If not previously congested, Ctp will take measures to slow down. * Ctp has an internal congested condition as well. The result of isCongested * is a logical OR with the parameter set here and the internal congestion. */ command void setClientCongested(bool congested); } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpDebug.nc000066400000000000000000000070611207233610700207330ustar00rootroot00000000000000/* $Id: CtpDebug.nc,v 1.5 2010-06-29 22:07:49 scipio Exp $*/ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * The CollectionDebug is an interface for sending debugging events to * a logging infrastructure. An implementer can choose to send the event * information to different destinations. Primary examples can include: *
        *
      • logging to the UART, in case of a testbed of network-connected * nodes; *
      • logging to flash, if the logs are to be retrieved later *
      • logging to the standard output, in the case of TOSSIM. *
      * * The interface does not specify in what format the log is to be produced, * or if other information, like timestamps, should be added, and this is * up to the implementer. * * Some commands are generic, like Event, EventSimple, and EventDbg, while others * are for more specific events related to collection, like EventRoute and EventMsg. * * @author Rodrigo Fonseca * @author Kyle Jamieson * @date $Date: 2010-06-29 22:07:49 $ */ interface CollectionDebug { /* Log the occurrence of an event of type type */ command error_t logEvent(uint8_t type); /* Log the occurrence of an event and a single parameter */ command error_t logEventSimple(uint8_t type, uint16_t arg); /* Log the occurrence of an event and 3 16bit parameters */ command error_t logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3); /* Log the occurrence of an event related to forwarding a message. * This is intended to allow following the same message as it goes from one * hop to the next */ command error_t logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node); /* Log the occurrence of an event related to a route update message, * such as a node receiving a route, updating its own route information, * or looking at a particular entry in its routing table. */ command error_t logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric); } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpDebugMsg.h000066400000000000000000000055541207233610700212360ustar00rootroot00000000000000#ifndef _COLLECTION_UART_MSG #define _COLLECTION_UART_MSG #include "AM.h" //Comment format -> :meaning:args enum { NET_C_DEBUG_STARTED = 0xDE, NET_C_FE_MSG_POOL_EMPTY = 0x10, //::no args NET_C_FE_SEND_QUEUE_FULL = 0x11, //::no args NET_C_FE_NO_ROUTE = 0x12, //::no args NET_C_FE_SUBSEND_OFF = 0x13, NET_C_FE_SUBSEND_BUSY = 0x14, NET_C_FE_BAD_SENDDONE = 0x15, NET_C_FE_QENTRY_POOL_EMPTY = 0x16, NET_C_FE_SUBSEND_SIZE = 0x17, NET_C_FE_LOOP_DETECTED = 0x18, NET_C_FE_SEND_BUSY = 0x19, NET_C_FE_SENDQUEUE_EMPTY = 0x50, NET_C_FE_PUT_MSGPOOL_ERR = 0x51, NET_C_FE_PUT_QEPOOL_ERR = 0x52, NET_C_FE_GET_MSGPOOL_ERR = 0x53, NET_C_FE_GET_QEPOOL_ERR = 0x54, NET_C_FE_QUEUE_SIZE=0x55, NET_C_FE_SENT_MSG = 0x20, //:app. send :msg uid, origin, next_hop NET_C_FE_RCV_MSG = 0x21, //:next hop receive:msg uid, origin, last_hop NET_C_FE_FWD_MSG = 0x22, //:fwd msg :msg uid, origin, next_hop NET_C_FE_DST_MSG = 0x23, //:base app. recv :msg_uid, origin, last_hop NET_C_FE_SENDDONE_FAIL = 0x24, NET_C_FE_SENDDONE_WAITACK = 0x25, NET_C_FE_SENDDONE_FAIL_ACK_SEND = 0x26, NET_C_FE_SENDDONE_FAIL_ACK_FWD = 0x27, NET_C_FE_DUPLICATE_CACHE = 0x28, //dropped duplicate packet seen in cache NET_C_FE_DUPLICATE_QUEUE = 0x29, //dropped duplicate packet seen in queue NET_C_FE_DUPLICATE_CACHE_AT_SEND = 0x2A, //dropped duplicate packet seen in cache NET_C_FE_CONGESTION_SENDWAIT = 0x2B, // sendTask deferring for congested parent NET_C_FE_CONGESTION_BEGIN = 0x2C, // NET_C_FE_CONGESTION_END = 0x2D, // congestion over: reason is arg; // arg=1 => overheard parent's // ECN cleared. // arg=0 => timeout. NET_C_FE_CONGESTED = 0x2E, NET_C_TREE_NO_ROUTE = 0x30, //: :no args NET_C_TREE_NEW_PARENT = 0x31, //: :parent_id, hopcount, metric NET_C_TREE_ROUTE_INFO = 0x32, //:periodic:parent_id, hopcount, metric NET_C_TREE_SENT_BEACON = 0x33, NET_C_TREE_RCV_BEACON = 0x34, NET_C_DBG_1 = 0x40, //:any :uint16_t a NET_C_DBG_2 = 0x41, //:any :uint16_t a, b, c NET_C_DBG_3 = 0x42, //:any :uint16_t a, b, c }; typedef nx_struct CollectionDebugMsg { nx_uint8_t type; nx_union { nx_uint16_t arg; nx_struct { nx_uint16_t msg_uid; nx_am_addr_t origin; nx_am_addr_t other_node; } msg; nx_struct { nx_am_addr_t parent; nx_uint8_t hopcount; nx_uint16_t metric; } route_info; nx_struct { nx_uint16_t a; nx_uint16_t b; nx_uint16_t c; } dbg; } data; nx_uint16_t seqno; } CollectionDebugMsg; #endif tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpForwardingEngine.h000066400000000000000000000074511207233610700227670ustar00rootroot00000000000000#ifndef FORWARDING_ENGINE_H #define FORWARDING_ENGINE_H /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include #include /** * Author: Philip Levis * Author: Kyle Jamieson * Author: Omprakash Gnawali * Author: Rodrigo Fonseca */ /* * These timings are in milliseconds, and are used by * ForwardingEngineP. Each pair of values represents a range of * [OFFSET - (OFFSET + WINDOW)]. The ForwardingEngine uses these * values to determine when to send the next packet after an * event. FAIL refers to a send fail (an error from the radio below), * NOACK refers to the previous packet not being acknowledged, * OK refers to an acknowledged packet, and LOOPY refers to when * a loop is detected. * * These timings are defined in terms of packet times. Currently, * two values are defined: for CC2420-based platforms (4ms) and * all other platfoms (32ms). */ enum { #if PLATFORM_MICAZ || PLATFORM_TELOSA || PLATFORM_TELOSB || PLATFORM_TMOTE || PLATFORM_INTELMOTE2 || PLATFORM_SHIMMER || PLATFORM_IRIS FORWARD_PACKET_TIME = 7, #else FORWARD_PACKET_TIME = 32, #endif }; enum { SENDDONE_OK_OFFSET = FORWARD_PACKET_TIME, SENDDONE_OK_WINDOW = FORWARD_PACKET_TIME, SENDDONE_NOACK_OFFSET = FORWARD_PACKET_TIME, SENDDONE_NOACK_WINDOW = FORWARD_PACKET_TIME, SENDDONE_FAIL_OFFSET = FORWARD_PACKET_TIME << 2, SENDDONE_FAIL_WINDOW = SENDDONE_FAIL_OFFSET, LOOPY_OFFSET = FORWARD_PACKET_TIME << 2, LOOPY_WINDOW = LOOPY_OFFSET, CONGESTED_WAIT_OFFSET = FORWARD_PACKET_TIME << 2, CONGESTED_WAIT_WINDOW = CONGESTED_WAIT_OFFSET, NO_ROUTE_RETRY = 10000 }; /* * The number of times the ForwardingEngine will try to * transmit a packet before giving up if the link layer * supports acknowledgments. If the link layer does * not support acknowledgments it sends the packet once. */ enum { MAX_RETRIES = 30 }; /* * An element in the ForwardingEngine send queue. * The client field keeps track of which send client * submitted the packet or if the packet is being forwarded * from another node (client == 255). Retries keeps track * of how many times the packet has been transmitted. */ typedef struct { message_t * ONE_NOK msg; uint8_t client; uint8_t retries; } fe_queue_entry_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpForwardingEngineP.nc000066400000000000000000001047741207233610700232660ustar00rootroot00000000000000/* $Id: CtpForwardingEngineP.nc,v 1.24 2010-04-11 23:27:30 gnawali Exp $ */ /* * Copyright (c) 2008-9 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This component contains the forwarding path of CTP Noe, the * standard CTP implementation packaged with TinyOS 2.x. The CTP * specification can be found in TEP 123. The paper entitled * "Collection Tree Protocol," by Omprakash Gnawali et al., in SenSys * 2009, describes the implementation and provides detailed * performance results of CTP Noe.

      * *

      The CTP ForwardingEngine is responsible for queueing and * scheduling outgoing packets. It maintains a pool of forwarding * messages and a packet send queue. A ForwardingEngine with a * forwarding message pool of size F and C * CollectionSenderC clients has a send queue of size F + * C. This implementation several configuration constants, which * can be found in ForwardingEngine.h.

      * *

      Packets in the send queue are sent in FIFO order, with * head-of-line blocking. Because this is a tree collection protocol, * all packets are going to the same destination, and so the * ForwardingEngine does not distinguish packets from one * another. Packets from CollectionSenderC clients are sent * identically to forwarded packets: only their buffer handling is * different.

      * *

      If ForwardingEngine is on top of a link layer that supports * synchronous acknowledgments, it enables them and retransmits packets * when they are not acked. It transmits a packet up to MAX_RETRIES times * before giving up and dropping the packet. MAX_RETRIES is typically a * large number (e.g., >20), as this implementation assumes there is * link layer feedback on failed packets, such that link costs will go * up and cause the routing layer to pick a next hop. If the underlying * link layer does not support acknowledgments, ForwardingEngine sends * a packet only once.

      * *

      The ForwardingEngine detects routing loops and tries to correct * them. Routing is in terms of a cost gradient, where the collection * root has a cost of zero and a node's cost is the cost of its next * hop plus the cost of the link to that next hop. If there are no * loops, then this gradient value decreases monotonically along a * route. When the ForwardingEngine sends a packet to the next hop, * it puts the local gradient value in the packet header. If a node * receives a packet to forward whose gradient value is less than its * own, then the gradient is not monotonically decreasing and there * may be a routing loop. When the ForwardingEngine receives such a * packet, it tells the RoutingEngine to advertise its gradient value * soon, with the hope that the advertisement will update the node * who just sent a packet and break the loop. It also pauses the * before the next packet transmission, in hopes of giving the * routing layer's packet a priority.

      * *

      ForwardingEngine times its packet transmissions. It * differentiates between four transmission cases: forwarding, * success, ack failure, and loop detection. In each case, the * ForwardingEngine waits a randomized period of time before sending * the next packet. This approach assumes that the network is * operating at low utilization; its goal is to prevent correlated * traffic -- such as nodes along a route forwarding packets -- from * interfering with itself.

      * *

      While this implementation can work on top of a variety of link * estimators, it is designed to work with a 4-bit link estimator * (4B). Details on 4B can be found in the HotNets paper "Four Bit * Link Estimation" by Rodrigo Fonseca et al. The forwarder provides * the "ack" bit for each sent packet, telling the estimator whether * the packet was acknowledged.

      * * @author Philip Levis * @author Kyle Jamieson * @date $Date: 2010-04-11 23:27:30 $ */ #include #include generic module CtpForwardingEngineP() { provides { interface Init; interface StdControl; interface Send[uint8_t client]; interface Receive[collection_id_t id]; interface Receive as Snoop[collection_id_t id]; interface Intercept[collection_id_t id]; interface Packet; interface CollectionPacket; interface CtpPacket; interface CtpCongestion; } uses { // These five interfaces are used in the forwarding path // SubSend is for sending packets // PacketAcknowledgements is for enabling layer 2 acknowledgments // RetxmitTimer is for timing packet sends for improved performance // LinkEstimator is for providing the ack bit to a link estimator interface AMSend as SubSend; interface PacketAcknowledgements; interface Timer as RetxmitTimer; interface LinkEstimator; interface UnicastNameFreeRouting; interface Packet as SubPacket; // These four data structures are used to manage packets to forward. // SendQueue and QEntryPool are the forwarding queue. // MessagePool is the buffer pool for messages to forward. // SentCache is for suppressing duplicate packet transmissions. interface Queue as SendQueue; interface Pool as QEntryPool; interface Pool as MessagePool; interface Cache as SentCache; interface Receive as SubReceive; interface Receive as SubSnoop; interface CtpInfo; interface RootControl; interface CollectionId[uint8_t client]; interface AMPacket; interface Leds; interface Random; // This implementation has extensive debugging instrumentation. // Wiring up the CollectionDebug interface provides information // on important events, such as transmissions, receptions, // and cache checks. The TinyOS release includes scripts for // parsing these messages. interface CollectionDebug; // The ForwardingEngine monitors whether the underlying // radio is on or not in order to start/stop forwarding // as appropriate. interface SplitControl as RadioControl; } } implementation { /* Helper functions to start the given timer with a random number * masked by the given mask and added to the given offset. */ static void startRetxmitTimer(uint16_t mask, uint16_t offset); void clearState(uint8_t state); bool hasState(uint8_t state); void setState(uint8_t state); // CTP state variables. enum { QUEUE_CONGESTED = 0x1, // Need to set C bit? ROUTING_ON = 0x2, // Forwarding running? RADIO_ON = 0x4, // Radio is on? ACK_PENDING = 0x8, // Have an ACK pending? SENDING = 0x10 // Am sending a packet? }; // Start with all states false uint8_t forwardingState = 0; /* Network-level sequence number, so that receivers * can distinguish retransmissions from different packets. */ uint8_t seqno; enum { CLIENT_COUNT = uniqueCount(UQ_CTP_CLIENT) }; /* Each sending client has its own reserved queue entry. If the client has a packet pending, its queue entry is in the queue, and its clientPtr is NULL. If the client is idle, its queue entry is pointed to by clientPtrs. */ fe_queue_entry_t clientEntries[CLIENT_COUNT]; fe_queue_entry_t* ONE_NOK clientPtrs[CLIENT_COUNT]; /* The loopback message is for when a collection roots calls Send.send. Since Send passes a pointer but Receive allows buffer swaps, the forwarder copies the sent packet into the loopbackMsgPtr and performs a buffer swap with it. See sendTask(). */ message_t loopbackMsg; message_t* ONE_NOK loopbackMsgPtr; command error_t Init.init() { int i; for (i = 0; i < CLIENT_COUNT; i++) { clientPtrs[i] = clientEntries + i; dbg("Forwarder", "clientPtrs[%hhu] = %p\n", i, clientPtrs[i]); } loopbackMsgPtr = &loopbackMsg; seqno = 0; return SUCCESS; } command error_t StdControl.start() { setState(ROUTING_ON); return SUCCESS; } command error_t StdControl.stop() { clearState(ROUTING_ON); return SUCCESS; } /* sendTask is where the first phase of all send logic * exists (the second phase is in SubSend.sendDone()). */ task void sendTask(); /* ForwardingEngine keeps track of whether the underlying radio is powered on. If not, it enqueues packets; when it turns on, it then starts sending packets. */ event void RadioControl.startDone(error_t err) { if (err == SUCCESS) { setState(RADIO_ON); if (!call SendQueue.empty()) { dbg("FHangBug", "%s posted sendTask.\n", __FUNCTION__); post sendTask(); } } } static void startRetxmitTimer(uint16_t window, uint16_t offset) { uint16_t r = call Random.rand16(); r %= window; r += offset; call RetxmitTimer.startOneShot(r); dbg("Forwarder", "Rexmit timer will fire in %hu ms\n", r); } /* * If the ForwardingEngine has stopped sending packets because * these has been no route, then as soon as one is found, start * sending packets. */ event void UnicastNameFreeRouting.routeFound() { dbg("FHangBug", "%s posted sendTask.\n", __FUNCTION__); post sendTask(); } event void UnicastNameFreeRouting.noRoute() { // Depend on the sendTask to take care of this case; // if there is no route the component will just resume // operation on the routeFound event } event void RadioControl.stopDone(error_t err) { if (err == SUCCESS) { clearState(RADIO_ON); } } ctp_data_header_t* getHeader(message_t* m) { return (ctp_data_header_t*)call SubPacket.getPayload(m, sizeof(ctp_data_header_t)); } /* * The send call from a client. Return EBUSY if the client is busy * (clientPtrs is NULL), otherwise configure its queue entry * and put it in the send queue. If the ForwardingEngine is not * already sending packets (the RetxmitTimer isn't running), post * sendTask. It could be that the engine is running and sendTask * has already been posted, but the post-once semantics make this * not matter. What's important is that you don't post sendTask * if the retransmit timer is running; this would circumvent the * timer and send a packet before it fires. */ command error_t Send.send[uint8_t client](message_t* msg, uint8_t len) { ctp_data_header_t* hdr; fe_queue_entry_t *qe; dbg("Forwarder", "%s: sending packet from client %hhu: %x, len %hhu\n", __FUNCTION__, client, msg, len); if (!hasState(ROUTING_ON)) {return EOFF;} if (len > call Send.maxPayloadLength[client]()) {return ESIZE;} call Packet.setPayloadLength(msg, len); hdr = getHeader(msg); hdr->origin = TOS_NODE_ID; hdr->originSeqNo = seqno++; hdr->type = call CollectionId.fetch[client](); hdr->thl = 0; if (clientPtrs[client] == NULL) { dbg("Forwarder", "%s: send failed as client is busy.\n", __FUNCTION__); return EBUSY; } qe = clientPtrs[client]; qe->msg = msg; qe->client = client; qe->retries = MAX_RETRIES; dbg("Forwarder", "%s: queue entry for %hhu is %hhu deep\n", __FUNCTION__, client, call SendQueue.size()); if (call SendQueue.enqueue(qe) == SUCCESS) { if (hasState(RADIO_ON) && !hasState(SENDING)) { dbg("FHangBug", "%s posted sendTask.\n", __FUNCTION__); post sendTask(); } clientPtrs[client] = NULL; return SUCCESS; } else { dbg("Forwarder", "%s: send failed as packet could not be enqueued.\n", __FUNCTION__); // send a debug message to the uart call CollectionDebug.logEvent(NET_C_FE_SEND_QUEUE_FULL); // Return the pool entry, as it's not for me... return FAIL; } } command error_t Send.cancel[uint8_t client](message_t* msg) { // cancel not implemented. will require being able // to pull entries out of the queue. return FAIL; } command uint8_t Send.maxPayloadLength[uint8_t client]() { return call Packet.maxPayloadLength(); } command void* Send.getPayload[uint8_t client](message_t* msg, uint8_t len) { return call Packet.getPayload(msg, len); } /* * These is where all of the send logic is. When the ForwardingEngine * wants to send a packet, it posts this task. The send logic is * independent of whether it is a forwarded packet or a packet from * a send clientL the two cases differ in how memory is managed in * sendDone. * * The task first checks that there is a packet to send and that * there is a valid route. It then marshals the relevant arguments * and prepares the packet for sending. If the node is a collection * root, it signals Receive with the loopback message. Otherwise, * it sets the packet to be acknowledged and sends it. It does not * remove the packet from the send queue: while sending, the * packet being sent is at the head of the queue; a packet is dequeued * in the sendDone handler, either due to retransmission failure * or to a successful send. */ task void sendTask() { uint16_t gradient; dbg("Forwarder", "%s: Trying to send a packet. Queue size is %hhu.\n", __FUNCTION__, call SendQueue.size()); if (hasState(SENDING) || call SendQueue.empty()) { call CollectionDebug.logEvent(NET_C_FE_SENDQUEUE_EMPTY); return; } else if ((!call RootControl.isRoot() && !call UnicastNameFreeRouting.hasRoute()) || (call CtpInfo.getEtx(&gradient) != SUCCESS)) { /* This code path is for when we don't have a valid next * hop. We set a retry timer. * * Technically, this timer isn't necessary, as if a route * is found we'll get an event. But just in case such an event * is lost (e.g., a bug in the routing engine), we retry. * Otherwise the forwarder might hang indefinitely. As this test * doesn't require radio activity, the energy cost is minimal. */ dbg("Forwarder", "%s: no route, don't send, try again in %i.\n", __FUNCTION__, NO_ROUTE_RETRY); call RetxmitTimer.startOneShot(NO_ROUTE_RETRY); call CollectionDebug.logEvent(NET_C_FE_NO_ROUTE); return; } else { /* We can send a packet. First check if it's a duplicate; if not, try to send/forward. */ error_t subsendResult; fe_queue_entry_t* qe = call SendQueue.head(); uint8_t payloadLen = call SubPacket.payloadLength(qe->msg); am_addr_t dest = call UnicastNameFreeRouting.nextHop(); if (call SentCache.lookup(qe->msg)) { /* This packet is a duplicate, so suppress it: free memory and * send next packet. Duplicates are only possible for * forwarded packets, so we can circumvent the client or * forwarded branch for freeing the buffer. */ call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_CACHE_AT_SEND); call SendQueue.dequeue(); if (call MessagePool.put(qe->msg) != SUCCESS) call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR); if (call QEntryPool.put(qe) != SUCCESS) call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR); post sendTask(); return; } // Not a duplicate: we've decided we're going to send. dbg("Forwarder", "Sending queue entry %p\n", qe); if (call RootControl.isRoot()) { /* Code path for roots: copy the packet and signal receive. */ collection_id_t collectid = getHeader(qe->msg)->type; uint8_t* payload; uint8_t payloadLength; memcpy(loopbackMsgPtr, qe->msg, sizeof(message_t)); payload = call Packet.getPayload(loopbackMsgPtr, call Packet.payloadLength(loopbackMsgPtr)); payloadLength = call Packet.payloadLength(loopbackMsgPtr); dbg("Forwarder", "%s: I'm a root, so loopback and signal receive.\n", __FUNCTION__); loopbackMsgPtr = signal Receive.receive[collectid](loopbackMsgPtr, payload, payloadLength); signal SubSend.sendDone(qe->msg, SUCCESS); } else { /* The basic forwarding/sending case. */ call CtpPacket.setEtx(qe->msg, gradient); call CtpPacket.clearOption(qe->msg, CTP_OPT_ECN | CTP_OPT_PULL); if (call PacketAcknowledgements.requestAck(qe->msg) == SUCCESS) { setState(ACK_PENDING); } if (hasState(QUEUE_CONGESTED)) { call CtpPacket.setOption(qe->msg, CTP_OPT_ECN); clearState(QUEUE_CONGESTED); } subsendResult = call SubSend.send(dest, qe->msg, payloadLen); if (subsendResult == SUCCESS) { // Successfully submitted to the data-link layer. setState(SENDING); dbg("Forwarder", "%s: subsend succeeded with %p.\n", __FUNCTION__, qe->msg); return; } // The packet is too big: truncate it and retry. else if (subsendResult == ESIZE) { dbg("Forwarder", "%s: subsend failed from ESIZE: truncate packet.\n", __FUNCTION__); call Packet.setPayloadLength(qe->msg, call Packet.maxPayloadLength()); post sendTask(); call CollectionDebug.logEvent(NET_C_FE_SUBSEND_SIZE); } else { dbg("Forwarder", "%s: subsend failed from %i\n", __FUNCTION__, (int)subsendResult); } } } } /* * The second phase of a send operation; based on whether the transmission was * successful, the ForwardingEngine either stops sending or starts the * RetxmitTimer with an interval based on what has occured. If the send was * successful or the maximum number of retransmissions has been reached, then * the ForwardingEngine dequeues the current packet. If the packet is from a * client it signals Send.sendDone(); if it is a forwarded packet it returns * the packet and queue entry to their respective pools. * */ void packetComplete(fe_queue_entry_t* qe, message_t* msg, bool success) { // Four cases: // Local packet: success or failure // Forwarded packet: success or failure if (qe->client < CLIENT_COUNT) { clientPtrs[qe->client] = qe; signal Send.sendDone[qe->client](msg, SUCCESS); if (success) { dbg("CtpForwarder", "%s: packet %hu.%hhu for client %hhu acknowledged.\n", __FUNCTION__, call CollectionPacket.getOrigin(msg), call CollectionPacket.getSequenceNumber(msg), qe->client); call CollectionDebug.logEventMsg(NET_C_FE_SENT_MSG, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); } else { dbg("CtpForwarder", "%s: packet %hu.%hhu for client %hhu dropped.\n", __FUNCTION__, call CollectionPacket.getOrigin(msg), call CollectionPacket.getSequenceNumber(msg), qe->client); call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_SEND, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); } } else { if (success) { call SentCache.insert(qe->msg); dbg("CtpForwarder", "%s: forwarded packet %hu.%hhu acknowledged: insert in transmit queue.\n", __FUNCTION__, call CollectionPacket.getOrigin(msg), call CollectionPacket.getSequenceNumber(msg)); call CollectionDebug.logEventMsg(NET_C_FE_FWD_MSG, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); } else { dbg("CtpForwarder", "%s: forwarded packet %hu.%hhu dropped.\n", __FUNCTION__, call CollectionPacket.getOrigin(msg), call CollectionPacket.getSequenceNumber(msg)); call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_FWD, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); } if (call MessagePool.put(qe->msg) != SUCCESS) call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR); if (call QEntryPool.put(qe) != SUCCESS) call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR); } } event void SubSend.sendDone(message_t* msg, error_t error) { fe_queue_entry_t *qe = call SendQueue.head(); dbg("Forwarder", "%s to %hu and %hhu\n", __FUNCTION__, call AMPacket.destination(msg), error); if (error != SUCCESS) { /* The radio wasn't able to send the packet: retransmit it. */ dbg("Forwarder", "%s: send failed\n", __FUNCTION__); call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); startRetxmitTimer(SENDDONE_FAIL_WINDOW, SENDDONE_FAIL_OFFSET); } else if (hasState(ACK_PENDING) && !call PacketAcknowledgements.wasAcked(msg)) { /* No ack: if countdown is not 0, retransmit, else drop the packet. */ call LinkEstimator.txNoAck(call AMPacket.destination(msg)); call CtpInfo.recomputeRoutes(); if (--qe->retries) { dbg("Forwarder", "%s: not acked, retransmit\n", __FUNCTION__); call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_WAITACK, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); startRetxmitTimer(SENDDONE_NOACK_WINDOW, SENDDONE_NOACK_OFFSET); } else { /* Hit max retransmit threshold: drop the packet. */ call SendQueue.dequeue(); clearState(SENDING); startRetxmitTimer(SENDDONE_OK_WINDOW, SENDDONE_OK_OFFSET); packetComplete(qe, msg, FALSE); } } else { /* Packet was acknowledged. Updated the link estimator, free the buffer (pool or sendDone), start timer to send next packet. */ call SendQueue.dequeue(); clearState(SENDING); startRetxmitTimer(SENDDONE_OK_WINDOW, SENDDONE_OK_OFFSET); call LinkEstimator.txAck(call AMPacket.destination(msg)); packetComplete(qe, msg, TRUE); } } /* * Function for preparing a packet for forwarding. Performs * a buffer swap from the message pool. If there are no free * message in the pool, it returns the passed message and does not * put it on the send queue. */ message_t* ONE forward(message_t* ONE m) { if (call MessagePool.empty()) { dbg("Route", "%s cannot forward, message pool empty.\n", __FUNCTION__); // send a debug message to the uart call CollectionDebug.logEvent(NET_C_FE_MSG_POOL_EMPTY); } else if (call QEntryPool.empty()) { dbg("Route", "%s cannot forward, queue entry pool empty.\n", __FUNCTION__); // send a debug message to the uart call CollectionDebug.logEvent(NET_C_FE_QENTRY_POOL_EMPTY); } else { message_t* newMsg; fe_queue_entry_t *qe; uint16_t gradient; qe = call QEntryPool.get(); if (qe == NULL) { call CollectionDebug.logEvent(NET_C_FE_GET_MSGPOOL_ERR); return m; } newMsg = call MessagePool.get(); if (newMsg == NULL) { call CollectionDebug.logEvent(NET_C_FE_GET_QEPOOL_ERR); return m; } memset(newMsg, 0, sizeof(message_t)); memset(m->metadata, 0, sizeof(message_metadata_t)); qe->msg = m; qe->client = 0xff; qe->retries = MAX_RETRIES; if (call SendQueue.enqueue(qe) == SUCCESS) { dbg("Forwarder,Route", "%s forwarding packet %p with queue size %hhu\n", __FUNCTION__, m, call SendQueue.size()); // Loop-detection code: if (call CtpInfo.getEtx(&gradient) == SUCCESS) { // We only check for loops if we know our own metric if (call CtpPacket.getEtx(m) <= gradient) { // If our etx metric is less than or equal to the etx value // on the packet (etx of the previous hop node), then we believe // we are in a loop. // Trigger a route update and backoff. call CtpInfo.triggerImmediateRouteUpdate(); startRetxmitTimer(LOOPY_WINDOW, LOOPY_OFFSET); call CollectionDebug.logEventMsg(NET_C_FE_LOOP_DETECTED, call CollectionPacket.getSequenceNumber(m), call CollectionPacket.getOrigin(m), call AMPacket.destination(m)); } } if (!call RetxmitTimer.isRunning()) { // sendTask is only immediately posted if we don't detect a // loop. dbg("FHangBug", "%s: posted sendTask.\n", __FUNCTION__); post sendTask(); } // Successful function exit point: return newMsg; } else { // There was a problem enqueuing to the send queue. if (call MessagePool.put(newMsg) != SUCCESS) call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR); if (call QEntryPool.put(qe) != SUCCESS) call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR); } } // NB: at this point, we have a resource acquistion problem. // Log the event, and drop the // packet on the floor. call CollectionDebug.logEvent(NET_C_FE_SEND_QUEUE_FULL); return m; } /* * Received a message to forward. Check whether it is a duplicate by * checking the packets currently in the queue as well as the * send history cache (in case we recently forwarded this packet). * The cache is important as nodes immediately forward packets * but wait a period before retransmitting after an ack failure. * If this node is a root, signal receive. */ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { collection_id_t collectid; bool duplicate = FALSE; fe_queue_entry_t* qe; uint8_t i, thl; collectid = call CtpPacket.getType(msg); // Update the THL here, since it has lived another hop, and so // that the root sees the correct THL. thl = call CtpPacket.getThl(msg); thl++; call CtpPacket.setThl(msg, thl); call CollectionDebug.logEventMsg(NET_C_FE_RCV_MSG, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), thl--); if (len > call SubSend.maxPayloadLength()) { return msg; } //See if we remember having seen this packet //We look in the sent cache ... if (call SentCache.lookup(msg)) { call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_CACHE); return msg; } //... and in the queue for duplicates if (call SendQueue.size() > 0) { for (i = call SendQueue.size(); i >0; i--) { qe = call SendQueue.element(i-1); if (call CtpPacket.matchInstance(qe->msg, msg)) { duplicate = TRUE; break; } } } if (duplicate) { call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_QUEUE); return msg; } // If I'm the root, signal receive. else if (call RootControl.isRoot()) return signal Receive.receive[collectid](msg, call Packet.getPayload(msg, call Packet.payloadLength(msg)), call Packet.payloadLength(msg)); // I'm on the routing path and Intercept indicates that I // should not forward the packet. else if (!signal Intercept.forward[collectid](msg, call Packet.getPayload(msg, call Packet.payloadLength(msg)), call Packet.payloadLength(msg))) return msg; else { dbg("Route", "Forwarding packet from %hu.\n", getHeader(msg)->origin); return forward(msg); } } event message_t* SubSnoop.receive(message_t* msg, void *payload, uint8_t len) { // Check for the pull bit (P) [TEP123] and act accordingly. This // check is made for all packets, not just ones addressed to us. if (call CtpPacket.option(msg, CTP_OPT_PULL)) { call CtpInfo.triggerRouteUpdate(); } return signal Snoop.receive[call CtpPacket.getType(msg)] (msg, payload + sizeof(ctp_data_header_t), len - sizeof(ctp_data_header_t)); } event void RetxmitTimer.fired() { clearState(SENDING); dbg("FHangBug", "%s posted sendTask.\n", __FUNCTION__); post sendTask(); } command bool CtpCongestion.isCongested() { return FALSE; } command void CtpCongestion.setClientCongested(bool congested) { // Do not respond to congestion. } /* signalled when this neighbor is evicted from the neighbor table */ event void LinkEstimator.evicted(am_addr_t neighbor) {} // Packet ADT commands command void Packet.clear(message_t* msg) { call SubPacket.clear(msg); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(ctp_data_header_t); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg, len + sizeof(ctp_data_header_t)); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(ctp_data_header_t); } command void* Packet.getPayload(message_t* msg, uint8_t len) { uint8_t* payload = call SubPacket.getPayload(msg, len + sizeof(ctp_data_header_t)); if (payload != NULL) { payload += sizeof(ctp_data_header_t); } return payload; } // CollectionPacket ADT commands command am_addr_t CollectionPacket.getOrigin(message_t* msg) {return getHeader(msg)->origin;} command collection_id_t CollectionPacket.getType(message_t* msg) {return getHeader(msg)->type;} command uint8_t CollectionPacket.getSequenceNumber(message_t* msg) {return getHeader(msg)->originSeqNo;} command void CollectionPacket.setOrigin(message_t* msg, am_addr_t addr) {getHeader(msg)->origin = addr;} command void CollectionPacket.setType(message_t* msg, collection_id_t id) {getHeader(msg)->type = id;} command void CollectionPacket.setSequenceNumber(message_t* msg, uint8_t _seqno) {getHeader(msg)->originSeqNo = _seqno;} // CtpPacket ADT commands command uint8_t CtpPacket.getType(message_t* msg) {return getHeader(msg)->type;} command am_addr_t CtpPacket.getOrigin(message_t* msg) {return getHeader(msg)->origin;} command uint16_t CtpPacket.getEtx(message_t* msg) {return getHeader(msg)->etx;} command uint8_t CtpPacket.getSequenceNumber(message_t* msg) {return getHeader(msg)->originSeqNo;} command uint8_t CtpPacket.getThl(message_t* msg) {return getHeader(msg)->thl;} command void CtpPacket.setThl(message_t* msg, uint8_t thl) {getHeader(msg)->thl = thl;} command void CtpPacket.setOrigin(message_t* msg, am_addr_t addr) {getHeader(msg)->origin = addr;} command void CtpPacket.setType(message_t* msg, uint8_t id) {getHeader(msg)->type = id;} command void CtpPacket.setEtx(message_t* msg, uint16_t e) {getHeader(msg)->etx = e;} command void CtpPacket.setSequenceNumber(message_t* msg, uint8_t _seqno) {getHeader(msg)->originSeqNo = _seqno;} command bool CtpPacket.option(message_t* msg, ctp_options_t opt) { return ((getHeader(msg)->options & opt) == opt) ? TRUE : FALSE; } command void CtpPacket.setOption(message_t* msg, ctp_options_t opt) { getHeader(msg)->options |= opt; } command void CtpPacket.clearOption(message_t* msg, ctp_options_t opt) { getHeader(msg)->options &= ~opt; } // A CTP packet ID is based on the origin and the THL field, to // implement duplicate suppression as described in TEP 123. command bool CtpPacket.matchInstance(message_t* m1, message_t* m2) { return (call CtpPacket.getOrigin(m1) == call CtpPacket.getOrigin(m2) && call CtpPacket.getSequenceNumber(m1) == call CtpPacket.getSequenceNumber(m2) && call CtpPacket.getThl(m1) == call CtpPacket.getThl(m2) && call CtpPacket.getType(m1) == call CtpPacket.getType(m2)); } command bool CtpPacket.matchPacket(message_t* m1, message_t* m2) { return (call CtpPacket.getOrigin(m1) == call CtpPacket.getOrigin(m2) && call CtpPacket.getSequenceNumber(m1) == call CtpPacket.getSequenceNumber(m2) && call CtpPacket.getType(m1) == call CtpPacket.getType(m2)); } void clearState(uint8_t state) { forwardingState = forwardingState & ~state; } bool hasState(uint8_t state) { return forwardingState & state; } void setState(uint8_t state) { forwardingState = forwardingState | state; } /******** Defaults. **************/ default event void Send.sendDone[uint8_t client](message_t *msg, error_t error) { } default event bool Intercept.forward[collection_id_t collectid](message_t* msg, void* payload, uint8_t len) { return TRUE; } default event message_t * Receive.receive[collection_id_t collectid](message_t *msg, void *payload, uint8_t len) { return msg; } default event message_t * Snoop.receive[collection_id_t collectid](message_t *msg, void *payload, uint8_t len) { return msg; } default command collection_id_t CollectionId.fetch[uint8_t client]() { return 0; } /* Default implementations for CollectionDebug calls. * These allow CollectionDebug not to be wired to anything if debugging * is not desired. */ default command error_t CollectionDebug.logEvent(uint8_t type) { return SUCCESS; } default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) { return SUCCESS; } default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) { return SUCCESS; } default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) { return SUCCESS; } default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpInfo.nc000066400000000000000000000066631207233610700206070ustar00rootroot00000000000000/* $Id: CtpInfo.nc,v 1.8 2010-06-29 22:07:49 scipio Exp $ */ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * @author Rodrigo Fonseca * @author Philip Levis * @date $Date: 2010-06-29 22:07:49 $ * @see Net2-WG */ #include "AM.h" interface CtpInfo { /** * Get the parent of the node in the tree. The pointer is allocated * by the caller. If the parent is invalid, return FAIL. The * caller MUST NOT use the value in parent if the return is not * SUCCESS. */ command error_t getParent(am_addr_t* parent); /** * Get the ETX for the current path to the root through the current * parent. Sets etx argument to ETX*10. The pointer is allocated by * the caller. If the parent is invalid, return FAIL (no info). * The caller MUST NOT use the value in parent if the return is not * SUCCESS. Calling getEtx at the root will set the etx argument to * 0. */ command error_t getEtx(uint16_t* etx); /** * This informs the routing engine that sending a beacon soon is * advisable, e.g., in response to a pull bit. */ command void triggerRouteUpdate(); /** * This informs the routing engine that sending a beacon as soon * as possible is advisable, e.g., due to queue overflow or * a detected loop. */ command void triggerImmediateRouteUpdate(); /** * Tell the routing engine it might want to recompute its routes. */ command void recomputeRoutes(); /** * Informs the routing engine that a neighbor is congested */ command void setNeighborCongested(am_addr_t n, bool congested); /** * Returns the currently known state about a neighbor's congestion state */ command bool isNeighborCongested(am_addr_t n); command uint8_t numNeighbors(); command uint16_t getNeighborLinkQuality(uint8_t n); command uint16_t getNeighborRouteQuality(uint8_t n); command am_addr_t getNeighborAddr(uint8_t n); } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpP.nc000066400000000000000000000176151207233610700201120ustar00rootroot00000000000000/* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Ctp.h" /** * A data collection service that uses a tree routing protocol * to deliver data to collection roots, following TEP 119. * * @author Rodrigo Fonseca * @author Omprakash Gnawali * @author Kyle Jamieson * @author Philip Levis */ configuration CtpP { provides { interface StdControl; interface Send[uint8_t client]; interface Receive[collection_id_t id]; interface Receive as Snoop[collection_id_t]; interface Intercept[collection_id_t id]; interface Packet; interface CollectionPacket; interface CtpPacket; interface CtpInfo; interface LinkEstimator; interface CtpCongestion; interface RootControl; } uses { interface CollectionId[uint8_t client]; interface CollectionDebug; } } implementation { enum { CLIENT_COUNT = uniqueCount(UQ_CTP_CLIENT), FORWARD_COUNT = 12, TREE_ROUTING_TABLE_SIZE = 10, QUEUE_SIZE = CLIENT_COUNT + FORWARD_COUNT, CACHE_SIZE = 4, }; components ActiveMessageC; components new CtpForwardingEngineP() as Forwarder; components MainC, LedsC; Send = Forwarder; StdControl = Forwarder; Receive = Forwarder.Receive; Snoop = Forwarder.Snoop; Intercept = Forwarder; Packet = Forwarder; CollectionId = Forwarder; CollectionPacket = Forwarder; CtpPacket = Forwarder; CtpCongestion = Forwarder; components new PoolC(message_t, FORWARD_COUNT) as MessagePoolP; components new PoolC(fe_queue_entry_t, FORWARD_COUNT) as QEntryPoolP; Forwarder.QEntryPool -> QEntryPoolP; Forwarder.MessagePool -> MessagePoolP; components new QueueC(fe_queue_entry_t*, QUEUE_SIZE) as SendQueueP; Forwarder.SendQueue -> SendQueueP; components new LruCtpMsgCacheC(CACHE_SIZE) as SentCacheP; Forwarder.SentCache -> SentCacheP; components new TimerMilliC() as RoutingBeaconTimer; components new TimerMilliC() as RouteUpdateTimer; components LinkEstimatorP as Estimator; Forwarder.LinkEstimator -> Estimator; components new AMSenderC(AM_CTP_DATA); components new AMReceiverC(AM_CTP_DATA); components new AMSnooperC(AM_CTP_DATA); components new CtpRoutingEngineP(TREE_ROUTING_TABLE_SIZE, 128, 512000) as Router; StdControl = Router; StdControl = Estimator; RootControl = Router; MainC.SoftwareInit -> Router; Router.BeaconSend -> Estimator.Send; Router.BeaconReceive -> Estimator.Receive; Router.LinkEstimator -> Estimator.LinkEstimator; Router.CompareBit -> Estimator.CompareBit; Router.AMPacket -> ActiveMessageC; Router.RadioControl -> ActiveMessageC; Router.BeaconTimer -> RoutingBeaconTimer; Router.RouteTimer -> RouteUpdateTimer; Router.CollectionDebug = CollectionDebug; Forwarder.CollectionDebug = CollectionDebug; Forwarder.CtpInfo -> Router; Router.CtpCongestion -> Forwarder; CtpInfo = Router; components new TimerMilliC() as RetxmitTimer; Forwarder.RetxmitTimer -> RetxmitTimer; components RandomC; Router.Random -> RandomC; Forwarder.Random -> RandomC; MainC.SoftwareInit -> Forwarder; Forwarder.SubSend -> AMSenderC; Forwarder.SubReceive -> AMReceiverC; Forwarder.SubSnoop -> AMSnooperC; Forwarder.SubPacket -> AMSenderC; Forwarder.RootControl -> Router; Forwarder.UnicastNameFreeRouting -> Router.Routing; Forwarder.RadioControl -> ActiveMessageC; Forwarder.PacketAcknowledgements -> AMSenderC.Acks; Forwarder.AMPacket -> AMSenderC; Forwarder.Leds -> LedsC; components new AMSenderC(AM_CTP_ROUTING) as SendControl; components new AMReceiverC(AM_CTP_ROUTING) as ReceiveControl; LinkEstimator = Estimator; Estimator.Random -> RandomC; Estimator.AMSend -> SendControl; Estimator.SubReceive -> ReceiveControl; Estimator.SubPacket -> SendControl; Estimator.SubAMPacket -> SendControl; #if defined(CC2420X) components CC2420XActiveMessageC as PlatformActiveMessageC; #elif defined(PLATFORM_TELOSB) || defined(PLATFORM_MICAZ) #ifndef TOSSIM components CC2420ActiveMessageC as PlatformActiveMessageC; #else components DummyActiveMessageP as PlatformActiveMessageC; #endif #elif defined (PLATFORM_MICA2) || defined (PLATFORM_MICA2DOT) components CC1000ActiveMessageC as PlatformActiveMessageC; #elif defined(PLATFORM_EYESIFXV1) || defined(PLATFORM_EYESIFXV2) components WhiteBitAccessorC as PlatformActiveMessageC; #elif defined(PLATFORM_IRIS) || defined(PLATFORM_MESHBEAN) components RF230ActiveMessageC as PlatformActiveMessageC; #elif defined(PLATFORM_MESHBEAN900) components RF212ActiveMessageC as PlatformActiveMessageC; #elif defined(PLATFORM_UCMINI) components RFA1ActiveMessageC as PlatformActiveMessageC; #else components DummyActiveMessageP as PlatformActiveMessageC; #endif Estimator.LinkPacketMetadata -> PlatformActiveMessageC; // eventually // Estimator.LinkPacketMetadata -> ActiveMessageC; MainC.SoftwareInit -> Estimator; } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpPacket.nc000066400000000000000000000055501207233610700211150ustar00rootroot00000000000000/* $Id: CtpPacket.nc,v 1.5 2007-11-28 04:42:52 rincon Exp $ */ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADT for CTP data frames. * * @author Philip Levis * @author Kyle Jamieson * @date $Date: 2007-11-28 04:42:52 $ */ #include #include "Ctp.h" interface CtpPacket { // Sets the given options bit. command void setOption(message_t* msg, ctp_options_t option); // Clears the given options bit. command void clearOption(message_t* msg, ctp_options_t option); // Returns TRUE iff all of the given options bits are set. command bool option(message_t* msg, ctp_options_t opt); command uint8_t getThl(message_t* msg); command void setThl(message_t* msg, uint8_t thl); command uint16_t getEtx(message_t* msg); command void setEtx(message_t* msg, uint16_t etx); command am_addr_t getOrigin(message_t* msg); command void setOrigin(message_t* msg, am_addr_t addr); command uint8_t getSequenceNumber(message_t* msg); command void setSequenceNumber(message_t* msg, uint8_t seqno); command uint8_t getType(message_t* msg); command void setType(message_t* msg, uint8_t id); command bool matchInstance(message_t* m1, message_t* m2); command bool matchPacket(message_t* m1, message_t* m2); } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpRoutingEngineP.nc000066400000000000000000000737001207233610700226050ustar00rootroot00000000000000#include #include #include /* $Id: CtpRoutingEngineP.nc,v 1.25 2010-06-29 22:07:49 scipio Exp $ */ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * The TreeRoutingEngine is responsible for computing the routes for * collection. It builds a set of trees rooted at specific nodes (roots) and * maintains these trees using information provided by the link estimator on * the quality of one hop links. * *

      Each node is part of only one tree at any given time, but there is no * difference from the node's point of view of which tree it is part. In other * words, a message is sent towards a root, but which one is not * specified. It is assumed that the roots will work together to have all data * aggregated later if need be. The tree routing engine's responsibility is * for each node to find the path with the least number of transmissions to * any one root. * *

      The tree is proactively maintained by periodic beacons sent by each * node. These beacons are jittered in time to prevent synchronizations in the * network. All nodes maintain the same average beacon sending rate * (defined by BEACON_INTERVAL +- 50%). The beacon contains the node's parent, * the current hopcount, and the cumulative path quality metric. The metric is * defined as the parent's metric plus the bidirectional quality of the link * between the current node and its parent. The metric represents the * expected number of transmissions along the path to the root, and is 0 by * definition at the root. * *

      Every time a node receives an update from a neighbor it records the * information if the node is part of the neighbor table. The neighbor table * keeps the best candidates for being parents i.e., the nodes with the best * path metric. The neighbor table does not store the full path metric, * though. It stores the parent's path metric, and the link quality to the * parent is only added when the information is needed: (i) when choosing a * parent and (ii) when choosing a route. The nodes in the neighbor table are * a subset of the nodes in the link estimator table, as a node is not * admitted in the neighbor table with an estimate of infinity. * *

      There are two uses for the neighbor table, as mentioned above. The first * one is to select a parent. The parent is just the neighbor with the best * path metric. It serves to define the node's own path metric and hopcount, * and the set of child-parent links is what defines the tree. In a sense the * tree is defined to form a coherent propagation substrate for the path * metrics. The parent is (re)-selected periodically, immediately before a * node sends its own beacon, in the updateRouteTask. * *

      The second use is to actually choose a next hop towards any root at * message forwarding time. This need not be the current parent, even though * it is currently implemented as such. * *

      The operation of the routing engine has two main tasks and one main * event: updateRouteTask is called periodically and chooses a new parent; * sendBeaconTask broadcasts the current route information to the neighbors. * The main event is the receiving of a neighbor's beacon, which updates the * neighbor table. * *

      The interface with the ForwardingEngine occurs through the nextHop() * call. * *

      Any node can become a root, and routed messages from a subset of the * network will be routed towards it. The RootControl interface allows * setting, unsetting, and querying the root state of a node. By convention, * when a node is root its hopcount and metric are 0, and the parent is * itself. A root always has a valid route, to itself. * * @author Rodrigo Fonseca * @author Philip Levis (added trickle-like updates) * Acknowledgment: based on MintRoute, MultiHopLQI, BVR tree construction, Berkeley's MTree * * @date $Date: 2010-06-29 22:07:49 $ * @see Net2-WG */ generic module CtpRoutingEngineP(uint8_t routingTableSize, uint32_t minInterval, uint32_t maxInterval) { provides { interface UnicastNameFreeRouting as Routing; interface RootControl; interface CtpInfo; interface StdControl; interface CtpRoutingPacket; interface Init; } uses { interface AMSend as BeaconSend; interface Receive as BeaconReceive; interface LinkEstimator; interface AMPacket; interface SplitControl as RadioControl; interface Timer as BeaconTimer; interface Timer as RouteTimer; interface Random; interface CollectionDebug; interface CtpCongestion; interface CompareBit; } } implementation { bool ECNOff = TRUE; /* Keeps track of whether the radio is on. No sense updating or sending * beacons if radio is off */ bool radioOn = FALSE; /* Controls whether the node's periodic timer will fire. The node will not * send any beacon, and will not update the route. Start and stop control this. */ bool running = FALSE; /* Guards the beacon buffer: only one beacon being sent at a time */ bool sending = FALSE; /* Tells updateNeighbor that the parent was just evicted.*/ bool justEvicted = FALSE; route_info_t routeInfo; bool state_is_root; am_addr_t my_ll_addr; message_t beaconMsgBuffer; ctp_routing_header_t* beaconMsg; /* routing table -- routing info about neighbors */ routing_table_entry routingTable[routingTableSize]; uint8_t routingTableActive; /* statistics */ uint32_t parentChanges; /* end statistics */ // forward declarations void routingTableInit(); uint8_t routingTableFind(am_addr_t); error_t routingTableUpdateEntry(am_addr_t, am_addr_t , uint16_t); error_t routingTableEvict(am_addr_t neighbor); /* For each interval t, you set a timer to fire between t/2 and t (chooseAdvertiseTime), and you wait until t (remainingInterval). Once you are at t, you double the interval (decayInterval) if you haven't reached the max. For reasons such as topological inconsistency, you reset the timer to a small value (resetInterval). */ uint32_t currentInterval = minInterval; uint32_t t; bool tHasPassed; void chooseAdvertiseTime() { t = currentInterval; t /= 2; t += call Random.rand32() % t; tHasPassed = FALSE; call BeaconTimer.startOneShot(t); } void resetInterval() { currentInterval = minInterval; chooseAdvertiseTime(); } void decayInterval() { currentInterval *= 2; if (currentInterval > maxInterval) { currentInterval = maxInterval; } chooseAdvertiseTime(); } void remainingInterval() { uint32_t remaining = currentInterval; remaining -= t; tHasPassed = TRUE; call BeaconTimer.startOneShot(remaining); } command error_t Init.init() { uint8_t maxLength; radioOn = FALSE; running = FALSE; parentChanges = 0; state_is_root = 0; routeInfoInit(&routeInfo); routingTableInit(); beaconMsg = call BeaconSend.getPayload(&beaconMsgBuffer, call BeaconSend.maxPayloadLength()); maxLength = call BeaconSend.maxPayloadLength(); dbg("TreeRoutingCtl","TreeRouting initialized. (used payload:%d max payload:%d!\n", sizeof(beaconMsg), maxLength); return SUCCESS; } command error_t StdControl.start() { my_ll_addr = call AMPacket.address(); //start will (re)start the sending of messages if (!running) { running = TRUE; resetInterval(); call RouteTimer.startPeriodic(BEACON_INTERVAL); dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn); } return SUCCESS; } command error_t StdControl.stop() { running = FALSE; dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn); return SUCCESS; } event void RadioControl.startDone(error_t error) { radioOn = TRUE; dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn); if (running) { uint16_t nextInt; nextInt = call Random.rand16() % BEACON_INTERVAL; nextInt += BEACON_INTERVAL >> 1; } } event void RadioControl.stopDone(error_t error) { radioOn = FALSE; dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn); } /* Is this quality measure better than the minimum threshold? */ // Implemented assuming quality is EETX bool passLinkEtxThreshold(uint16_t etx) { return (etx < ETX_THRESHOLD); } /* updates the routing information, using the info that has been received * from neighbor beacons. Two things can cause this info to change: * neighbor beacons, changes in link estimates, including neighbor eviction */ task void updateRouteTask() { uint8_t i; routing_table_entry* entry; routing_table_entry* best; uint16_t minEtx; uint16_t currentEtx; uint16_t linkEtx, pathEtx; if (state_is_root) return; best = NULL; /* Minimum etx found among neighbors, initially infinity */ minEtx = MAX_METRIC; /* Metric through current parent, initially infinity */ currentEtx = MAX_METRIC; dbg("TreeRouting","%s\n",__FUNCTION__); /* Find best path in table, other than our current */ for (i = 0; i < routingTableActive; i++) { entry = &routingTable[i]; // Avoid bad entries and 1-hop loops if (entry->info.parent == INVALID_ADDR || entry->info.parent == my_ll_addr) { dbg("TreeRouting", "routingTable[%d]: neighbor: [id: %d parent: %d etx: NO ROUTE]\n", i, entry->neighbor, entry->info.parent); continue; } linkEtx = call LinkEstimator.getLinkQuality(entry->neighbor); dbg("TreeRouting", "routingTable[%d]: neighbor: [id: %d parent: %d etx: %d retx: %d]\n", i, entry->neighbor, entry->info.parent, linkEtx, entry->info.etx); pathEtx = linkEtx + entry->info.etx; /* Operations specific to the current parent */ if (entry->neighbor == routeInfo.parent) { dbg("TreeRouting", " already parent.\n"); currentEtx = pathEtx; /* update routeInfo with parent's current info */ routeInfo.etx = entry->info.etx; routeInfo.congested = entry->info.congested; continue; } /* Ignore links that are congested */ if (entry->info.congested) continue; /* Ignore links that are bad */ if (!passLinkEtxThreshold(linkEtx)) { dbg("TreeRouting", " did not pass threshold.\n"); continue; } if (pathEtx < minEtx) { dbg("TreeRouting", " best is %d, setting to %d\n", pathEtx, entry->neighbor); minEtx = pathEtx; best = entry; } } //call CollectionDebug.logEventDbg(NET_C_DBG_3, routeInfo.parent, currentEtx, minEtx); /* Now choose between the current parent and the best neighbor */ /* Requires that: 1. at least another neighbor was found with ok quality and not congested 2. the current parent is congested and the other best route is at least as good 3. or the current parent is not congested and the neighbor quality is better by the PARENT_SWITCH_THRESHOLD. Note: if our parent is congested, in order to avoid forming loops, we try to select a node which is not a descendent of our parent. routeInfo.ext is our parent's etx. Any descendent will be at least that + 10 (1 hop), so we restrict the selection to be less than that. */ if (minEtx != MAX_METRIC) { if (currentEtx == MAX_METRIC || (routeInfo.congested && (minEtx < (routeInfo.etx + 10))) || minEtx + PARENT_SWITCH_THRESHOLD < currentEtx) { // routeInfo.metric will not store the composed metric. // since the linkMetric may change, we will compose whenever // we need it: i. when choosing a parent (here); // ii. when choosing a next hop parentChanges++; dbg("TreeRouting","Changed parent. from %d to %d\n", routeInfo.parent, best->neighbor); call CollectionDebug.logEventDbg(NET_C_TREE_NEW_PARENT, best->neighbor, best->info.etx, minEtx); call LinkEstimator.unpinNeighbor(routeInfo.parent); call LinkEstimator.pinNeighbor(best->neighbor); call LinkEstimator.clearDLQ(best->neighbor); routeInfo.parent = best->neighbor; routeInfo.etx = best->info.etx; routeInfo.congested = best->info.congested; if (currentEtx - minEtx > 20) { call CtpInfo.triggerRouteUpdate(); } } } /* Finally, tell people what happened: */ /* We can only loose a route to a parent if it has been evicted. If it hasn't * been just evicted then we already did not have a route */ if (justEvicted && routeInfo.parent == INVALID_ADDR) signal Routing.noRoute(); /* On the other hand, if we didn't have a parent (no currentEtx) and now we * do, then we signal route found. The exception is if we just evicted the * parent and immediately found a replacement route: we don't signal in this * case */ else if (!justEvicted && currentEtx == MAX_METRIC && minEtx != MAX_METRIC) signal Routing.routeFound(); justEvicted = FALSE; } /* send a beacon advertising this node's routeInfo */ // only posted if running and radioOn task void sendBeaconTask() { error_t eval; if (sending) { return; } beaconMsg->options = 0; /* Congestion notification: am I congested? */ if (call CtpCongestion.isCongested()) { beaconMsg->options |= CTP_OPT_ECN; } beaconMsg->parent = routeInfo.parent; if (state_is_root) { beaconMsg->etx = routeInfo.etx; } else if (routeInfo.parent == INVALID_ADDR) { beaconMsg->etx = routeInfo.etx; beaconMsg->options |= CTP_OPT_PULL; } else { beaconMsg->etx = routeInfo.etx + call LinkEstimator.getLinkQuality(routeInfo.parent); } dbg("TreeRouting", "%s parent: %d etx: %d\n", __FUNCTION__, beaconMsg->parent, beaconMsg->etx); call CollectionDebug.logEventRoute(NET_C_TREE_SENT_BEACON, beaconMsg->parent, 0, beaconMsg->etx); eval = call BeaconSend.send(AM_BROADCAST_ADDR, &beaconMsgBuffer, sizeof(ctp_routing_header_t)); if (eval == SUCCESS) { sending = TRUE; } else if (eval == EOFF) { radioOn = FALSE; dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn); } } event void BeaconSend.sendDone(message_t* msg, error_t error) { if ((msg != &beaconMsgBuffer) || !sending) { //something smells bad around here return; } sending = FALSE; } event void RouteTimer.fired() { if (radioOn && running) { post updateRouteTask(); } } event void BeaconTimer.fired() { if (radioOn && running) { if (!tHasPassed) { post updateRouteTask(); //always send the most up to date info post sendBeaconTask(); dbg("RoutingTimer", "Beacon timer fired at %s\n", sim_time_string()); remainingInterval(); } else { decayInterval(); } } } ctp_routing_header_t* getHeader(message_t* ONE m) { return (ctp_routing_header_t*)call BeaconSend.getPayload(m, call BeaconSend.maxPayloadLength()); } /* Handle the receiving of beacon messages from the neighbors. We update the * table, but wait for the next route update to choose a new parent */ event message_t* BeaconReceive.receive(message_t* msg, void* payload, uint8_t len) { am_addr_t from; ctp_routing_header_t* rcvBeacon; bool congested; // Received a beacon, but it's not from us. if (len != sizeof(ctp_routing_header_t)) { dbg("LITest", "%s, received beacon of size %hhu, expected %i\n", __FUNCTION__, len, (int)sizeof(ctp_routing_header_t)); return msg; } //need to get the am_addr_t of the source from = call AMPacket.source(msg); rcvBeacon = (ctp_routing_header_t*)payload; congested = call CtpRoutingPacket.getOption(msg, CTP_OPT_ECN); dbg("TreeRouting","%s from: %d [ parent: %d etx: %d]\n", __FUNCTION__, from, rcvBeacon->parent, rcvBeacon->etx); //update neighbor table if (rcvBeacon->parent != INVALID_ADDR) { /* If this node is a root, request a forced insert in the link * estimator table and pin the node. */ if (rcvBeacon->etx == 0) { dbg("TreeRouting","from a root, inserting if not in table\n"); call LinkEstimator.insertNeighbor(from); call LinkEstimator.pinNeighbor(from); } //TODO: also, if better than my current parent's path etx, insert routingTableUpdateEntry(from, rcvBeacon->parent, rcvBeacon->etx); call CtpInfo.setNeighborCongested(from, congested); } if (call CtpRoutingPacket.getOption(msg, CTP_OPT_PULL)) { resetInterval(); } return msg; } /* Signals that a neighbor is no longer reachable. need special care if * that neighbor is our parent */ event void LinkEstimator.evicted(am_addr_t neighbor) { routingTableEvict(neighbor); dbg("TreeRouting","%s\n",__FUNCTION__); if (routeInfo.parent == neighbor) { routeInfoInit(&routeInfo); justEvicted = TRUE; post updateRouteTask(); } } /* Interface UnicastNameFreeRouting */ /* Simple implementation: return the current routeInfo */ command am_addr_t Routing.nextHop() { return routeInfo.parent; } command bool Routing.hasRoute() { return (routeInfo.parent != INVALID_ADDR); } /* CtpInfo interface */ command error_t CtpInfo.getParent(am_addr_t* parent) { if (parent == NULL) return FAIL; if (routeInfo.parent == INVALID_ADDR) return FAIL; *parent = routeInfo.parent; return SUCCESS; } command error_t CtpInfo.getEtx(uint16_t* etx) { if (etx == NULL) return FAIL; if (routeInfo.parent == INVALID_ADDR) return FAIL; if (state_is_root == 1) { *etx = 0; } else { *etx = routeInfo.etx + call LinkEstimator.getLinkQuality(routeInfo.parent); } return SUCCESS; } command void CtpInfo.recomputeRoutes() { post updateRouteTask(); } command void CtpInfo.triggerRouteUpdate() { resetInterval(); } command void CtpInfo.triggerImmediateRouteUpdate() { resetInterval(); } command void CtpInfo.setNeighborCongested(am_addr_t n, bool congested) { uint8_t idx; if (ECNOff) return; idx = routingTableFind(n); if (idx < routingTableActive) { routingTable[idx].info.congested = congested; } if (routeInfo.congested && !congested) post updateRouteTask(); else if (routeInfo.parent == n && congested) post updateRouteTask(); } command bool CtpInfo.isNeighborCongested(am_addr_t n) { uint8_t idx; if (ECNOff) return FALSE; idx = routingTableFind(n); if (idx < routingTableActive) { return routingTable[idx].info.congested; } return FALSE; } /* RootControl interface */ /** sets the current node as a root, if not already a root */ /* returns FAIL if it's not possible for some reason */ command error_t RootControl.setRoot() { bool route_found = FALSE; route_found = (routeInfo.parent == INVALID_ADDR); state_is_root = 1; routeInfo.parent = my_ll_addr; //myself routeInfo.etx = 0; if (route_found) signal Routing.routeFound(); dbg("TreeRouting","%s I'm a root now!\n",__FUNCTION__); call CollectionDebug.logEventRoute(NET_C_TREE_NEW_PARENT, routeInfo.parent, 0, routeInfo.etx); return SUCCESS; } command error_t RootControl.unsetRoot() { state_is_root = 0; routeInfoInit(&routeInfo); dbg("TreeRouting","%s I'm not a root now!\n",__FUNCTION__); post updateRouteTask(); return SUCCESS; } command bool RootControl.isRoot() { return state_is_root; } default event void Routing.noRoute() { } default event void Routing.routeFound() { } /* The link will be recommended for insertion if it is better* than some * link in the routing table that is not our parent. * We are comparing the path quality up to the node, and ignoring the link * quality from us to the node. This is because of a couple of things: * 1. we expect this call only for links with white bit set * 2. we are being optimistic to the nodes in the table, by ignoring the * 1-hop quality to them (which means we are assuming it's 1 as well) * This actually sets the bar a little higher for replacement * 3. this is faster */ event bool CompareBit.shouldInsert(message_t *msg, void* payload, uint8_t len) { bool found = FALSE; uint16_t pathEtx; uint16_t neighEtx; int i; routing_table_entry* entry; ctp_routing_header_t* rcvBeacon; if ((call AMPacket.type(msg) != AM_CTP_ROUTING) || (len != sizeof(ctp_routing_header_t))) return FALSE; /* 1.determine this packet's path quality */ rcvBeacon = (ctp_routing_header_t*)payload; if (rcvBeacon->parent == INVALID_ADDR) return FALSE; /* the node is a root, recommend insertion! */ if (rcvBeacon->etx == 0) { return TRUE; } pathEtx = rcvBeacon->etx; // + linkEtx; /* 2. see if we find some neighbor that is worse */ for (i = 0; i < routingTableActive && !found; i++) { entry = &routingTable[i]; //ignore parent, since we can't replace it if (entry->neighbor == routeInfo.parent) continue; neighEtx = entry->info.etx; found |= (pathEtx < neighEtx); } return found; } /************************************************************/ /* Routing Table Functions */ /* The routing table keeps info about neighbor's route_info, * and is used when choosing a parent. * The table is simple: * - not fragmented (all entries in 0..routingTableActive) * - not ordered * - no replacement: eviction follows the LinkEstimator table */ void routingTableInit() { routingTableActive = 0; } /* Returns the index of parent in the table or * routingTableActive if not found */ uint8_t routingTableFind(am_addr_t neighbor) { uint8_t i; if (neighbor == INVALID_ADDR) return routingTableActive; for (i = 0; i < routingTableActive; i++) { if (routingTable[i].neighbor == neighbor) break; } return i; } error_t routingTableUpdateEntry(am_addr_t from, am_addr_t parent, uint16_t etx) { uint8_t idx; uint16_t linkEtx; linkEtx = call LinkEstimator.getLinkQuality(from); idx = routingTableFind(from); if (idx == routingTableSize) { //not found and table is full //if (passLinkEtxThreshold(linkEtx)) //TODO: add replacement here, replace the worst //} dbg("TreeRouting", "%s FAIL, table full\n", __FUNCTION__); return FAIL; } else if (idx == routingTableActive) { //not found and there is space if (passLinkEtxThreshold(linkEtx)) { routingTable[idx].neighbor = from; routingTable[idx].info.parent = parent; routingTable[idx].info.etx = etx; routingTable[idx].info.haveHeard = 1; routingTable[idx].info.congested = FALSE; routingTableActive++; dbg("TreeRouting", "%s OK, new entry\n", __FUNCTION__); } else { dbg("TreeRouting", "%s Fail, link quality (%hu) below threshold\n", __FUNCTION__, linkEtx); } } else { //found, just update routingTable[idx].neighbor = from; routingTable[idx].info.parent = parent; routingTable[idx].info.etx = etx; routingTable[idx].info.haveHeard = 1; dbg("TreeRouting", "%s OK, updated entry\n", __FUNCTION__); } return SUCCESS; } /* if this gets expensive, introduce indirection through an array of pointers */ error_t routingTableEvict(am_addr_t neighbor) { uint8_t idx,i; idx = routingTableFind(neighbor); if (idx == routingTableActive) return FAIL; routingTableActive--; for (i = idx; i < routingTableActive; i++) { routingTable[i] = routingTable[i+1]; } return SUCCESS; } /*********** end routing table functions ***************/ /* Default implementations for CollectionDebug calls. * These allow CollectionDebug not to be wired to anything if debugging * is not desired. */ default command error_t CollectionDebug.logEvent(uint8_t type) { return SUCCESS; } default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) { return SUCCESS; } default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) { return SUCCESS; } default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) { return SUCCESS; } default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t etx) { return SUCCESS; } command bool CtpRoutingPacket.getOption(message_t* msg, ctp_options_t opt) { return ((getHeader(msg)->options & opt) == opt) ? TRUE : FALSE; } command void CtpRoutingPacket.setOption(message_t* msg, ctp_options_t opt) { getHeader(msg)->options |= opt; } command void CtpRoutingPacket.clearOption(message_t* msg, ctp_options_t opt) { getHeader(msg)->options &= ~opt; } command void CtpRoutingPacket.clearOptions(message_t* msg) { getHeader(msg)->options = 0; } command am_addr_t CtpRoutingPacket.getParent(message_t* msg) { return getHeader(msg)->parent; } command void CtpRoutingPacket.setParent(message_t* msg, am_addr_t addr) { getHeader(msg)->parent = addr; } command uint16_t CtpRoutingPacket.getEtx(message_t* msg) { return getHeader(msg)->etx; } command void CtpRoutingPacket.setEtx(message_t* msg, uint16_t etx) { getHeader(msg)->etx = etx; } command uint8_t CtpInfo.numNeighbors() { return routingTableActive; } command uint16_t CtpInfo.getNeighborLinkQuality(uint8_t n) { return (n < routingTableActive)? call LinkEstimator.getLinkQuality(routingTable[n].neighbor):0xffff; } command uint16_t CtpInfo.getNeighborRouteQuality(uint8_t n) { return (n < routingTableActive)? call LinkEstimator.getLinkQuality(routingTable[n].neighbor) + routingTable[n].info.etx:0xfffff; } command am_addr_t CtpInfo.getNeighborAddr(uint8_t n) { return (n < routingTableActive)? routingTable[n].neighbor:AM_BROADCAST_ADDR; } } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpRoutingPacket.nc000066400000000000000000000046651207233610700224730ustar00rootroot00000000000000/* $Id: CtpRoutingPacket.nc,v 1.6 2009-09-21 02:19:42 gnawali Exp $ */ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * ADT for CTP routing frames. * * @author Philip Levis * @author Kyle Jamieson * @date $Date: 2009-09-21 02:19:42 $ */ #include interface CtpRoutingPacket { /* Allow individual options to be read, set, and reset independently */ command bool getOption(message_t* ONE msg, ctp_options_t opt); command void setOption(message_t* ONE msg, ctp_options_t opt); command void clearOption(message_t* ONE msg, ctp_options_t opt); /* Clear all options */ command void clearOptions(message_t* ONE msg); command am_addr_t getParent(message_t* ONE msg); command void setParent(message_t* ONE msg, am_addr_t addr); command uint16_t getEtx(message_t* ONE msg); command void setEtx(message_t* ONE msg, uint16_t etx); } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpSenderC.nc000066400000000000000000000042041207233610700212240ustar00rootroot00000000000000/* $Id: CtpSenderC.nc,v 1.4 2006-12-12 18:23:29 vlahan Exp $ */ /* * Copyright (c) 2006 Massachusetts Institute of Technology (MIT). * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Massachusetts Institute of Technology nor * the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * MASSACHUSETTS INSITIUTE OF TECHNOLOGY OR ITS CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * The virtualized collection sender abstraction. * * @author Kyle Jamieson * @author Philip Levis * @date April 25 2006 * @see TinyOS Net2-WG */ #include "Collection.h" #include "Ctp.h" generic configuration CtpSenderC(collection_id_t collectid) { provides { interface Send; interface Packet; } } implementation { components new CtpSenderP(collectid, unique(UQ_CTP_CLIENT)); Send = CtpSenderP; Packet = CtpSenderP; } tinyos-2.1.2+dfsg/tos/lib/net/ctp/CtpSenderP.nc000066400000000000000000000041001207233610700212340ustar00rootroot00000000000000/* $Id: CtpSenderP.nc,v 1.4 2006-12-12 18:23:29 vlahan Exp $ */ /* * Copyright (c) 2006 Massachusetts Institute of Technology (MIT). * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Massachusetts Institute of Technology nor * the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * MASSACHUSETTS INSITIUTE OF TECHNOLOGY OR ITS CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ #include "Collection.h" generic configuration CtpSenderP(collection_id_t collectid, uint8_t clientid) { provides { interface Send; interface Packet; } } implementation { components CtpC as Collector; components new CollectionIdP(collectid); Send = Collector.Send[clientid]; Packet = Collector.Packet; Collector.CollectionId[clientid] -> CollectionIdP; } tinyos-2.1.2+dfsg/tos/lib/net/ctp/DummyActiveMessageP.nc000066400000000000000000000002751207233610700231120ustar00rootroot00000000000000module DummyActiveMessageP { provides interface LinkPacketMetadata; } implementation { async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { return 0; } } tinyos-2.1.2+dfsg/tos/lib/net/ctp/LruCtpMsgCacheC.nc000066400000000000000000000037161207233610700221500ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An LRU cache CTP packet instances, where insertion represents use. * * @author Philip Levis */ generic configuration LruCtpMsgCacheC(uint8_t CACHE_SIZE) { provides interface Cache; } implementation { components MainC, new LruCtpMsgCacheP(CACHE_SIZE) as CacheP; components CtpP; Cache = CacheP; CacheP.CtpPacket -> CtpP; MainC.SoftwareInit -> CacheP; } tinyos-2.1.2+dfsg/tos/lib/net/ctp/LruCtpMsgCacheP.nc000066400000000000000000000107171207233610700221640ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An LRU cache that stores the signature of a CTP packet instance. * An insert operation indicates "use". Inserting an element not in * the cache will replace the oldest, and inserting an element already * in the cache will refresh its age. * * @author Philip Levis */ #include generic module LruCtpMsgCacheP(uint8_t size) { provides { interface Init; interface Cache; } uses { interface CtpPacket; } } implementation { typedef struct { am_addr_t origin; uint8_t seqno; collection_id_t type; uint8_t thl; } ctp_packet_sig_t; ctp_packet_sig_t cache[size]; uint8_t first; uint8_t count; command error_t Init.init() { first = 0; count = 0; return SUCCESS; } void printCache() { #ifdef TOSSIM int i; dbg("Cache","Cache:"); for (i = 0; i < count; i++) { dbg_clear("Cache", " %04x %02x %02x %02x", cache[i].origin, cache[i].seqno, cache[i].type, cache[i].thl); if (i == first) dbg_clear("Cache","*"); } dbg_clear("Cache","\n"); #endif } /* if key is in cache returns the index (offset by first), otherwise returns count */ uint8_t lookup(message_t* m) { uint8_t i; uint8_t idx; for (i = 0; i < count; i++) { idx = (i + first) % size; if (call CtpPacket.getOrigin(m) == cache[idx].origin && call CtpPacket.getSequenceNumber(m) == cache[idx].seqno && call CtpPacket.getThl(m) == cache[idx].thl && call CtpPacket.getType(m) == cache[idx].type) { break; } } return i; } /* remove the entry with index i (relative to first) */ void remove(uint8_t i) { uint8_t j; if (i >= count) return; if (i == 0) { //shift all by moving first first = (first + 1) % size; } else { //shift everyone down for (j = i; j < count; j++) { memcpy(&cache[(j + first) % size], &cache[(j + first + 1) % size], sizeof(ctp_packet_sig_t)); } } count--; } command void Cache.insert(message_t* m) { uint8_t i; if (count == size ) { //remove someone. If item not in //cache, remove the first item. //otherwise remove the item temporarily for //reinsertion. This moves the item up in the //LRU stack. i = lookup(m); remove(i % count); } //now count < size cache[(first + count) % size].origin = call CtpPacket.getOrigin(m); cache[(first + count) % size].seqno = call CtpPacket.getSequenceNumber(m); cache[(first + count) % size].thl = call CtpPacket.getThl(m); cache[(first + count) % size].type = call CtpPacket.getType(m); count++; } command bool Cache.lookup(message_t* m) { return (lookup(m) < count); } command void Cache.flush() { call Init.init(); } } tinyos-2.1.2+dfsg/tos/lib/net/ctp/TreeRouting.h000066400000000000000000000011771207233610700213360ustar00rootroot00000000000000#ifndef _TREE_ROUTING_H #define _TREE_ROUTING_H enum { AM_TREE_ROUTING_CONTROL = 0xCE, BEACON_INTERVAL = 8192, INVALID_ADDR = TOS_BCAST_ADDR, ETX_THRESHOLD = 50, // link quality=20% -> ETX=5 -> Metric=50 PARENT_SWITCH_THRESHOLD = 15, MAX_METRIC = 0xFFFF, }; typedef struct { am_addr_t parent; uint16_t etx; bool haveHeard; bool congested; } route_info_t; typedef struct { am_addr_t neighbor; route_info_t info; } routing_table_entry; inline void routeInfoInit(route_info_t *ri) { ri->parent = INVALID_ADDR; ri->etx = 0; ri->haveHeard = 0; ri->congested = FALSE; } #endif tinyos-2.1.2+dfsg/tos/lib/net/dhv/000077500000000000000000000000001207233610700167035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/dhv/AMDhvC.nc000077500000000000000000000021311207233610700202670ustar00rootroot00000000000000/** * Active Message Configuration. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Took the source code from Dip **/ #include configuration AMDhvC { provides interface DhvSend; provides interface DhvReceive as DataReceive; provides interface DhvReceive as VectorReceive; provides interface DhvReceive as SummaryReceive; provides interface DhvReceive as DhvVBitReceive; provides interface DhvReceive as DhvHSumReceive; } implementation { components AMDhvP; components new AMSenderC(AM_DHV) as SendC; components new AMReceiverC(AM_DHV) as ReceiveC; AMDhvP.NetAMSend -> SendC.AMSend; AMDhvP.NetReceive -> ReceiveC.Receive; components MainC; MainC.SoftwareInit -> AMDhvP.Init; AMDhvP.Boot -> MainC; DhvSend = AMDhvP.DhvSend; DataReceive = AMDhvP.DhvDataReceive; VectorReceive = AMDhvP.DhvVectorReceive; SummaryReceive = AMDhvP.DhvSummaryReceive; DhvVBitReceive = AMDhvP.DhvVBitReceive; DhvHSumReceive = AMDhvP.DhvHSumReceive; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/AMDhvP.nc000077500000000000000000000103041207233610700203050ustar00rootroot00000000000000/** * Active Message Implementation. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV interfaces type and renamed the instances to distinguish from DIP. * @modified 8/28/2008 Took the source code from DIP. **/ module AMDhvP { provides interface Init; provides interface DhvSend; provides interface DhvReceive as DhvDataReceive; provides interface DhvReceive as DhvVectorReceive; provides interface DhvReceive as DhvSummaryReceive; provides interface DhvReceive as DhvHSumReceive; provides interface DhvReceive as DhvVBitReceive; uses interface AMSend as NetAMSend; uses interface Receive as NetReceive; uses interface Boot; } implementation { message_t am_msg; uint32_t send_count; bool busy; event void Boot.booted() { send_count = 0; } command error_t Init.init() { busy = FALSE; return SUCCESS; } command error_t DhvSend.send(uint8_t len) { error_t err; dhv_msg_t* dmsg; uint8_t type; dmsg = (dhv_msg_t *) (&am_msg)->data; type = dmsg->type; send_count = send_count + 1; switch(type){ case ID_DHV_SUMMARY: dbg("AMDhvP", "Sending SUMMARY : length %d count %d at %s \n", len, send_count, sim_time_string()); break; case ID_DHV_VBIT: dbg("AMDhvP", "Sending VBIT : length %d count %d at %s \n", len, send_count, sim_time_string()); break; case ID_DHV_HSUM: dbg("AMDhvP", "Sending HSUM : length %d count %d at %s \n", len, send_count, sim_time_string()); break; case ID_DHV_VECTOR: dbg("AMDhvP", "Sending VECTOR : length %d count %d at %s \n", len, send_count, sim_time_string()); break; case ID_DHV_VECTOR_REQ: dbg("AMDhvP", "Sending VECTOR_REQ : length %d count %d at %s \n", len, send_count, sim_time_string()); break; case ID_DHV_DATA: dbg("AMDhvP", "Sending DATA : length %d count %d at %s \n", len, send_count, sim_time_string()); break; default : dbg("AMDhvP", "Sending UNKNOWN : length %d count %d at %s \n", len, send_count, sim_time_string()); break; } err = call NetAMSend.send(AM_BROADCAST_ADDR, &am_msg, len); if(err == SUCCESS) { busy = TRUE; }else{ dbg("AMDhvP", "Send failed \n"); } return err; } command void* DhvSend.getPayloadPtr() { // returns NULL if message is busy if(busy) { return NULL; } return call NetAMSend.getPayload(&am_msg, 0); } command uint8_t DhvSend.maxPayloadLength() { return call NetAMSend.maxPayloadLength(); } event void NetAMSend.sendDone(message_t* msg, error_t err) { //dbg("AMDhvP", "Data send successfully in the air\n"); if(msg == &am_msg) { busy = FALSE; } } event message_t* NetReceive.receive(message_t* msg, void* payload, uint8_t len) { dhv_msg_t* dmsg; uint8_t type; dmsg = (dhv_msg_t*) payload; type = dmsg->type; switch(type) { case ID_DHV_DATA: dbg("AMDhvPReceive", "Receive DATA : length %d at %s \n",len, sim_time_string() ); signal DhvDataReceive.receive(dmsg->content, len); break; case ID_DHV_VECTOR: dbg("AMDhvPReceive", "Receive VECTOR : length %d at %s \n",len, sim_time_string() ); signal DhvVectorReceive.receive(dmsg, len); break; case ID_DHV_SUMMARY: dbg("AMDhvPReceive", "Receive SUMMARY : length %d at %s \n", len, sim_time_string() ); signal DhvSummaryReceive.receive(dmsg->content, len); break; case ID_DHV_HSUM: dbg("AMDhvPReceive", "Receive HSUM length %d at %s \n", len, sim_time_string()); signal DhvHSumReceive.receive(dmsg->content, len); break; case ID_DHV_VBIT: dbg("AMDhvPReceive", "Receive VBIT : length %d at %s \n", len, sim_time_string()); signal DhvVBitReceive.receive(dmsg->content, len); break; case ID_DHV_VECTOR_REQ: dbg("AMDhvPReceive", "Receive VECTOR_REQ : length %d at %s \n", len, sim_time_string()); signal DhvVectorReceive.receive(dmsg, len); break; } return msg; } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/Dhv.h000077500000000000000000000047741207233610700176140ustar00rootroot00000000000000/** * DHV header file. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV packet type and renamed the variable * @modified 8/28/2008 Take the source code from Dip **/ #ifndef __DHV_H__ #define __DHV_H__ #define DHV_TAU_LOW (1024L) #define DHV_TAU_HIGH (65535L) #define UQ_DHV unique("DHV") #define UQCOUNT_DHV uniqueCount("DHV") #define DHV_UNKNOWN_VERSION 0xFFFFFFFF #define DHV_UNKNOWN_INDEX 0xFFFF #define DHV_VERSION_LENGTH 4 #define VBIT_LENGTH 8 #define INFO_THRESHOLD 1 enum { AM_DHV_TEST_MSG = 0xAB }; typedef enum { ID_DHV_INVALID = 0x0, ID_DHV_SUMMARY = 0x1, ID_DHV_VECTOR = 0x2, ID_DHV_DATA = 0x3, ID_DHV_HSUM = 0x4, ID_DHV_VBIT = 0x5, ID_DHV_VECTOR_REQ = 0x6 } dhv_msgid_t; //status indicator : no action, ads, request enum{ ID_DHV_NO = 0x0, ID_DHV_ADS = 0x1, ID_DHV_REQ = 0x2 }; enum { AM_DHV = 0x63, AM_DHV_DATA_MSG = 0x63, // For MIG tool AM_DHV_MSG = 0x63, // For MIG tool AM_DHV_DATA = 0x63 // For MIG tool }; typedef uint16_t dhv_key_t; typedef uint16_t dhv_index_t; typedef nx_uint16_t nx_dhv_key_t; typedef uint32_t dhv_version_t; typedef nx_uint32_t nx_dhv_version_t; typedef uint8_t dhv_estimate_t; typedef dhv_index_t dhv_hashlen_t; typedef nx_struct dhv_msg { nx_uint8_t type; nx_uint8_t content[0]; } dhv_msg_t; typedef nx_struct dhv_data_msg { nx_dhv_key_t key; nx_dhv_version_t version; nx_uint8_t size; nx_uint8_t data[0]; } dhv_data_msg_t; typedef nx_struct dhv_vector_msg { nx_uint8_t unitLen; nx_uint32_t vector[0]; } dhv_vector_msg_t; typedef nx_struct dhv_summary_msg { //nx_uint8_t unitLen; nx_uint32_t salt; nx_uint32_t info; } dhv_summary_msg_t; typedef nx_struct dhv_hsum_msg{ nx_uint32_t salt; nx_uint32_t info; nx_uint32_t checksum; } dhv_hsum_msg_t; typedef nx_struct dhv_vbit_msg{ nx_uint8_t numKey; nx_uint8_t bindex; nx_uint8_t vindex; nx_uint32_t salt; nx_uint32_t info; //include hash into vbit message nx_uint8_t vbit[0]; }dhv_vbit_msg_t; typedef nx_struct dhv_data { nx_uint8_t data[16]; } dhv_data_t; typedef nx_struct dhv_test_msg { nx_uint16_t id; nx_uint8_t count; nx_uint8_t isOk; } dhv_test_msg_t; /* TUNABLE PARAMETERS */ #define DHV_SUMMARY_VALUES_PER_PACKET 2 #define DHV_VECTOR_VALUES_PER_PACKET 2 #define DHV_SUMMARY_ENTRIES_PER_PACKET (DHV_SUMMARY_VALUES_PER_PACKET * 3) #define DHV_VECTOR_ENTRIES_PER_PACKET (DHV_VECTOR_VALUES_PER_PACKET * 2) #endif tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvDataC.nc000077500000000000000000000017621207233610700206540ustar00rootroot00000000000000/** * DHV header file. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV packet type and renamed the variable * @modified 8/28/2008 Take the source code from Dip **/ configuration DhvDataC { provides interface DhvDecision; uses interface DhvSend as DataSend; uses interface DhvReceive as DataReceive; uses interface DisseminationUpdate[dhv_key_t key]; uses interface DisseminationValue[dhv_key_t key]; uses interface DhvLogic as DataLogic; uses interface DhvLogic as VectorLogic; uses interface DhvHelp; } implementation { components DhvDataP; DhvDecision = DhvDataP; DataSend = DhvDataP; DataReceive = DhvDataP; DisseminationUpdate = DhvDataP; DisseminationValue = DhvDataP; DhvHelp = DhvDataP; DataLogic = DhvDataP.DataLogic; VectorLogic = DhvDataP.VectorLogic; components LedsC; DhvDataP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvDataP.nc000077500000000000000000000064501207233610700206700ustar00rootroot00000000000000/** * DHV DATA Implementation. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV interfaces type. * @modified 8/28/2008 Took the source code from DIP. **/ #include module DhvDataP { provides interface DhvDecision; uses interface DhvSend as DataSend; uses interface DhvReceive as DataReceive; uses interface DisseminationUpdate[dhv_key_t key]; uses interface DisseminationValue[dhv_key_t key]; uses interface DhvLogic as DataLogic; uses interface DhvLogic as VectorLogic; uses interface DhvHelp; uses interface Leds; } implementation { uint8_t commRate = 0; command uint8_t DhvDecision.getCommRate() { return commRate; } command void DhvDecision.resetCommRate() { commRate = 0; } command error_t DhvDecision.send() { dhv_key_t key; uint8_t i; dhv_version_t ver; dhv_msg_t* dmsg; dhv_data_msg_t* ddmsg; const dhv_data_t* data; error_t status; status = FAIL; //get the associated key of the data needed to send i = call DataLogic.nextItem(); if(i == UQCOUNT_DHV){ return FAIL; } key = call DhvHelp.indexToKey(i); ver = call DhvHelp.keyToVersion(key); data = call DisseminationValue.get[key](); dmsg = (dhv_msg_t*) call DataSend.getPayloadPtr(); if(dmsg == NULL) { return FAIL; } ddmsg = (dhv_data_msg_t*) dmsg->content; dmsg->type = ID_DHV_DATA; ddmsg->key = key; ddmsg->version = ver; ddmsg->size = sizeof(dhv_data_t); memcpy(ddmsg->data, data, sizeof(dhv_data_t)); dbg("DhvDataP", "Data sent with index %d key %x and version %08x\n",i, key, ver); status = call DataSend.send(sizeof(dhv_data_msg_t) + sizeof(dhv_msg_t) + sizeof(dhv_data_t)); if(status == SUCCESS){ call DataLogic.unsetItem(key); } return status; } event void DataReceive.receive(void* payload, uint8_t len) { dhv_key_t key; dhv_version_t myVer; dhv_version_t msgVer; dhv_data_msg_t* ddmsg; ddmsg = (dhv_data_msg_t*) payload; key = ddmsg->key; msgVer = ddmsg->version; myVer = call DhvHelp.keyToVersion(key); dbg("DhvDataP", "Data rcved with key %x and version %08x\n", key, msgVer); // TODO: handle the invalid versions if(myVer < msgVer) { dbg("DhvDataP", "new version\n"); call DisseminationUpdate.change[key]((dhv_data_t*)ddmsg->data); call DhvHelp.setVersion(key, msgVer); call DataLogic.setItem(key); call VectorLogic.setItem(key); //set bindex to 0 } else if (myVer > msgVer) { dbg("DhvDataP", "Old version\n"); //report older key to dhvlogic to set data item to send //reset timer call DataLogic.setItem(key); call VectorLogic.setItem(key); } else { dbg("DhvDataP", "Same version\n"); //keep quite call DataLogic.unsetItem(key); call VectorLogic.unsetItem(key); commRate = commRate + 1; //set bindex to 0 } } event void DisseminationValue.changed[dhv_key_t key]() { } default command const dhv_data_t* DisseminationValue.get[dhv_key_t key]() { return NULL; } default command void DisseminationUpdate.change[dhv_key_t key](dhv_data_t* val) { } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvHSumC.nc000077500000000000000000000012541207233610700206530ustar00rootroot00000000000000/** * DHV Horizontal Summary Implementation. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV interfaces type. **/ configuration DhvHSumC{ provides interface DhvDecision; uses interface DhvSend as HSumSend; uses interface DhvReceive as HSumReceive; uses interface DhvStateLogic as VBitLogic; uses interface DhvHelp; } implementation{ components DhvHSumP, RandomC; DhvDecision = DhvHSumP; HSumSend = DhvHSumP; HSumReceive = DhvHSumP; VBitLogic = DhvHSumP; DhvHelp = DhvHSumP; DhvHSumP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvHSumP.nc000077500000000000000000000045061207233610700206730ustar00rootroot00000000000000/** * DHV Horizontal Summary Implementation. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV interfaces type. **/ #include module DhvHSumP{ provides interface DhvDecision; uses interface DhvSend as HSumSend; uses interface DhvReceive as HSumReceive; uses interface DhvStateLogic as VBitLogic; uses interface DhvHelp; uses interface Random; } implementation{ uint8_t commRate; command uint8_t DhvDecision.getCommRate(){ return commRate; } command void DhvDecision.resetCommRate(){ commRate = 0; } command error_t DhvDecision.send(){ dhv_hsum_msg_t* dhsmsg; dhv_msg_t* dmsg; uint32_t salt; error_t sendResult; dmsg = call HSumSend.getPayloadPtr(); if(dmsg == NULL) return FAIL; dmsg->type = ID_DHV_HSUM; dhsmsg = (dhv_hsum_msg_t*) dmsg->content; //add the hash value salt = call Random.rand32(); dhsmsg->info = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt); dhsmsg->salt = salt; dhsmsg->checksum = call DhvHelp.getHSum(); sendResult = call HSumSend.send(sizeof(dhv_msg_t) + sizeof(dhv_hsum_msg_t)); if(sendResult == SUCCESS){ call VBitLogic.unsetHSumStatus(); } return sendResult; } event void HSumReceive.receive(void* payload, uint8_t len){ dhv_hsum_msg_t * rcv_dhmsg; int32_t local_checksum; int32_t rcv_checksum; int32_t xor_checksum; int32_t salt; int32_t rcv_hash; int32_t local_hash; rcv_dhmsg = (dhv_hsum_msg_t*) payload; rcv_checksum = rcv_dhmsg->checksum; local_checksum = call DhvHelp.getHSum(); xor_checksum = rcv_checksum^local_checksum; dbg("DhvHSumP", " xor_checksum 0x%08x 0x%08x 0x%08x \n",rcv_checksum, local_checksum, xor_checksum); if(xor_checksum == 0){ //check for the hash rcv_hash = rcv_dhmsg->info; salt = rcv_dhmsg->salt; local_hash = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt); if(rcv_hash == local_hash) { call VBitLogic.setSameSummary(); commRate = commRate + 1; }else{ call VBitLogic.setVBitState(1); } }else{ dbg("DhvHSumP"," detect a difference in checksum \n" ); call VBitLogic.setVBitState(xor_checksum); } } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvLogicC.nc000077500000000000000000000047511207233610700210410ustar00rootroot00000000000000/** * DHV Logic Implementation. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV interfaces type. * @modified 8/28/2008 Took the source code from DIP. **/ #include configuration DhvLogicC { provides interface DisseminationUpdate[dhv_key_t key]; provides interface DhvLogic as DataLogic; provides interface DhvLogic as VectorLogic; provides interface DhvStateLogic; provides interface StdControl; } implementation { components DhvLogicP; DisseminationUpdate = DhvLogicP; StdControl = DhvLogicP; DataLogic = DhvLogicP.DataLogic; VectorLogic= DhvLogicP.VectorLogic; DhvStateLogic = DhvLogicP; components MainC; MainC.SoftwareInit -> DhvLogicP; DhvLogicP.Boot -> MainC; components DhvTrickleMilliC; DhvLogicP.DhvTrickleTimer -> DhvTrickleMilliC; components DhvVersionC; DhvLogicP.VersionUpdate -> DhvVersionC; DhvLogicP.DhvHelp -> DhvVersionC; DhvLogicP.DhvDataCache -> DhvVersionC.DataCache; DhvLogicP.DhvVectorCache -> DhvVersionC.VectorCache; components AMDhvC; components DhvDataC; DhvLogicP.DhvDataDecision -> DhvDataC; DhvDataC.DataSend -> AMDhvC.DhvSend; DhvDataC.DataReceive -> AMDhvC.DataReceive; DhvDataC.DhvHelp -> DhvVersionC; DhvDataC.DataLogic -> DhvLogicP.DataLogic; DhvDataC.VectorLogic -> DhvLogicP.VectorLogic; components DhvVectorC; DhvLogicP.DhvVectorDecision -> DhvVectorC; DhvVectorC.VectorSend -> AMDhvC.DhvSend; DhvVectorC.VectorReceive -> AMDhvC.VectorReceive; DhvVectorC.DhvHelp -> DhvVersionC; DhvVectorC.VectorLogic -> DhvLogicP.VectorLogic; DhvVectorC.DataLogic -> DhvLogicP.DataLogic; components DhvSummaryC; DhvLogicP.DhvSummaryDecision -> DhvSummaryC; DhvSummaryC.SummarySend -> AMDhvC.DhvSend; DhvSummaryC.SummaryReceive -> AMDhvC.SummaryReceive; DhvSummaryC.DhvHelp -> DhvVersionC; DhvSummaryC.StateLogic -> DhvLogicP.DhvStateLogic; components DhvVBitC; DhvLogicP.DhvVBitDecision -> DhvVBitC; DhvVBitC.VBitSend -> AMDhvC.DhvSend; DhvVBitC.VBitReceive -> AMDhvC.DhvVBitReceive; DhvVBitC.DhvHelp -> DhvVersionC; DhvVBitC.VectorLogic -> DhvLogicP.VectorLogic; DhvVBitC.VBitLogic -> DhvLogicP.DhvStateLogic; components DhvHSumC; DhvHSumC.VBitLogic -> DhvLogicP.DhvStateLogic; DhvHSumC.DhvHelp -> DhvVersionC; DhvHSumC.HSumSend -> AMDhvC.DhvSend; DhvHSumC.HSumReceive-> AMDhvC.DhvHSumReceive; DhvLogicP.DhvHSumDecision -> DhvHSumC; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvLogicP.nc000077500000000000000000000207221207233610700210520ustar00rootroot00000000000000/** * DHV Logic Implementation. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV interfaces type. * @modified 8/28/2008 Took the source code from DIP. **/ #include module DhvLogicP { provides interface DisseminationUpdate[dhv_key_t key]; provides interface Init; provides interface StdControl; provides interface DhvLogic as VectorLogic; provides interface DhvLogic as DataLogic; provides interface DhvStateLogic; uses interface Boot; uses interface DhvTrickleTimer; uses interface DisseminationUpdate as VersionUpdate[dhv_key_t key]; uses interface DhvDecision as DhvDataDecision; uses interface DhvDecision as DhvVectorDecision; uses interface DhvDecision as DhvSummaryDecision; uses interface DhvDecision as DhvVBitDecision; uses interface DhvDecision as DhvHSumDecision; uses interface DhvCache as DhvDataCache; uses interface DhvCache as DhvVectorCache; uses interface DhvHelp; } implementation { uint32_t windowSize; uint8_t sendDecision(); uint32_t bitIndex; uint8_t hsum_status; uint32_t diffHash; command error_t Init.init() { windowSize = DHV_TAU_LOW; dbg("DhvLogicP","DHV ready\n"); return SUCCESS; } event void Boot.booted() { hsum_status = 0; bitIndex = 0; } command error_t StdControl.start() { return call DhvTrickleTimer.start(); } command error_t StdControl.stop() { call DhvTrickleTimer.stop(); return SUCCESS; } /*Logic operation on the vector */ command error_t VectorLogic.setItem(dhv_key_t key){ call DhvVectorCache.addItem(key); call DhvTrickleTimer.reset(); return SUCCESS; } command error_t VectorLogic.setReqItem(dhv_key_t key){ call DhvVectorCache.addReqItem(key); call DhvTrickleTimer.reset(); return SUCCESS; } command error_t VectorLogic.unsetItem(dhv_key_t key){ call DhvVectorCache.removeItem(key); call DhvStateLogic.setVBitState(0); return SUCCESS; } command uint8_t * VectorLogic.allItem(){ return call DhvVectorCache.allItem(); } command uint8_t VectorLogic.nextItem(){ return call DhvVectorCache.nextItem(); } /*logic operations on the data*/ command error_t DataLogic.setItem(dhv_key_t key){ call DhvDataCache.addItem( key); call DhvTrickleTimer.reset(); return SUCCESS; } command error_t DataLogic.setReqItem(dhv_key_t key){ call DhvDataCache.addReqItem( key); call DhvTrickleTimer.reset(); return SUCCESS; } command error_t DataLogic.unsetItem(dhv_key_t key){ call DhvDataCache.removeItem(key); call DhvStateLogic.setVBitState(0); return SUCCESS; } command uint8_t* DataLogic.allItem(){ return call DhvDataCache.allItem(); } command uint8_t DataLogic.nextItem(){ return call DhvDataCache.nextItem(); } /*logic operation for the summary and vbit*/ command void DhvStateLogic.setHSumStatus(){ hsum_status = 1; call DhvTrickleTimer.reset(); } command void DhvStateLogic.unsetHSumStatus(){ hsum_status = 0; } command uint8_t DhvStateLogic.getHSumStatus(){ return hsum_status; } command void DhvStateLogic.setDiffSummary(){ if(bitIndex == 0){ bitIndex=1; } call DhvTrickleTimer.reset(); } command void DhvStateLogic.setSameSummary(){ bitIndex = 0; hsum_status = 0; //reset all the vector and data status to avoid flooding call DhvDataCache.removeAll(); call DhvVectorCache.removeAll(); } command void DhvStateLogic.setVBitState(uint32_t state){ bitIndex = state; if(state != 0){ call DhvTrickleTimer.reset(); } } command uint32_t DhvStateLogic.getVBitState(){ return bitIndex; } //unset one bit at index location command void DhvStateLogic.unsetVBitIndex(uint8_t dindex){ uint32_t mask; mask = 1; mask = mask << (dindex-1); dbg("TempDebug", "TempDebug: Before mask dindex bitIndex %d %d %d\n", mask, dindex, bitIndex); if((bitIndex & mask) != 0){ bitIndex = bitIndex^mask; } dbg("TempDebug", "TempDebug: After bitIndex %d\n", bitIndex); } command void DhvStateLogic.setVBitIndex(uint8_t dindex){ uint32_t mask; mask = 1; mask = mask << (dindex-1); bitIndex = bitIndex | mask; call DhvTrickleTimer.reset(); } //get the non-zero bit index to extract the vertical bits. command uint8_t DhvStateLogic.getVBitIndex(){ uint32_t mask; uint8_t i; uint32_t xor; if(bitIndex == 0){ return 0; }else { mask = 1; for(i = 1; i <= 32; i++){ xor = bitIndex & mask; dbg("TempDebug", "TempDebug: %d %d %d %d \n", i, bitIndex, mask, xor); if(xor != 0){ return i; } mask = mask << 1; } return 0; } } command void DisseminationUpdate.change[dhv_key_t key](dhv_data_t* val) { dbg("DhvLogicP","App notified key %x is new\n", key); //update data: actual reprogramming job call VersionUpdate.change[key](val); //set data call DhvDataCache.addItem(key); //set to advertise its version call DhvVectorCache.addItem(key); //reset bindex call DhvStateLogic.setVBitState(0); dbg("DhvLogicP","Reset bindex to 0\n"); //reset timer call DhvTrickleTimer.reset(); } event uint32_t DhvTrickleTimer.requestWindowSize() { //TODO: consider if this is neccessary uint8_t decision; decision = sendDecision(); if(decision == ID_DHV_SUMMARY){ windowSize = windowSize << 1; if(windowSize > DHV_TAU_HIGH){ windowSize = DHV_TAU_HIGH; } }else{ if(decision != ID_DHV_INVALID){ windowSize = DHV_TAU_LOW; } } dbg("DhvLogicP", "Time window size requested, give %u : send decision %d \n", windowSize, decision); return windowSize; } event void DhvTrickleTimer.fired() { uint8_t decision; dbg("DhvLogicP","Trickle Timer fired!\n"); decision = sendDecision(); switch(decision) { case ID_DHV_INVALID: dbg("DhvLogicP", "Decision to SUPPRESS\n"); break; case ID_DHV_SUMMARY: dbg("DhvLogicP", "Decision to SUMMARY\n"); call DhvSummaryDecision.send(); break; case ID_DHV_VECTOR: dbg("DhvLogicP", "Decision to VECTOR\n"); call DhvVectorDecision.send(); break; case ID_DHV_DATA: dbg("DhvLogicP", "Decision to DATA\n"); call DhvDataDecision.send(); break; case ID_DHV_VBIT: dbg("DhvLogicP", "Decision to VSUM\n"); call DhvVBitDecision.send(); break; case ID_DHV_HSUM: dbg("DhvLogicP", "Decision to HSUM\n"); call DhvHSumDecision.send(); break; } call DhvDataDecision.resetCommRate(); call DhvVectorDecision.resetCommRate(); call DhvSummaryDecision.resetCommRate(); call DhvVBitDecision.resetCommRate(); call DhvHSumDecision.resetCommRate(); //set bitstate to zero call DhvStateLogic.setVBitState(0); } uint8_t sendDecision() { bool hasItemToSend; uint32_t bindex; uint8_t dataCommRate; uint8_t vectorCommRate; uint8_t summaryCommRate; uint8_t vbitCommRate; uint8_t hsumCommRate; dataCommRate = call DhvDataDecision.getCommRate(); vectorCommRate = call DhvVectorDecision.getCommRate(); summaryCommRate = call DhvSummaryDecision.getCommRate(); vbitCommRate = call DhvVBitDecision.getCommRate(); hsumCommRate = call DhvHSumDecision.getCommRate(); if(dataCommRate > INFO_THRESHOLD){ return ID_DHV_INVALID; } hasItemToSend = FALSE; hasItemToSend = call DhvDataCache.hasItemToSend(); if(hasItemToSend){ dbg("DhvLogicP", "has data to send? %u \n", hasItemToSend); return ID_DHV_DATA; } // didn't send or hear data at this point if(dataCommRate + vectorCommRate + summaryCommRate + vbitCommRate + hsumCommRate >= INFO_THRESHOLD) { dbg("DhvLogicP", "Heard an advertisement\n"); return ID_DHV_INVALID; } hasItemToSend = call DhvVectorCache.hasItemToSend(); dbg("DhvLogicP", "has vector to send? %u \n", hasItemToSend); if(hasItemToSend){ return ID_DHV_VECTOR; } bindex = call DhvStateLogic.getVBitState(); dbg("DhvLogicP", "send decision bindex %d \n", bindex); if(bindex != 0){ return ID_DHV_VBIT; } if(hsum_status != 0){ return ID_DHV_HSUM; } return ID_DHV_SUMMARY; } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvSummaryC.nc000077500000000000000000000014121207233610700214300ustar00rootroot00000000000000/** * DHV Summary Message Configuration. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV interfaces type. * @modified 8/28/2008 Took the source code from DIP. **/ configuration DhvSummaryC { provides interface DhvDecision; uses interface DhvSend as SummarySend; uses interface DhvReceive as SummaryReceive; uses interface DhvStateLogic as StateLogic; uses interface DhvHelp; } implementation { components DhvSummaryP; DhvDecision = DhvSummaryP; SummarySend = DhvSummaryP; SummaryReceive = DhvSummaryP; StateLogic = DhvSummaryP; DhvHelp = DhvSummaryP; components RandomC; DhvSummaryP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvSummaryP.nc000077500000000000000000000037061207233610700214550ustar00rootroot00000000000000/** * DHV Summary Message Implementation. * * Define the interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV interfaces type. * @modified 8/28/2008 Took the source code from DIP. **/ #include module DhvSummaryP { provides interface DhvDecision; uses interface DhvSend as SummarySend; uses interface DhvReceive as SummaryReceive; uses interface DhvHelp; uses interface Random; uses interface DhvStateLogic as StateLogic; } implementation { uint32_t computeHash(dhv_index_t left, dhv_index_t right, dhv_version_t* basedata, uint32_t salt); uint8_t commRate; command uint8_t DhvDecision.getCommRate() { return commRate; } command void DhvDecision.resetCommRate() { commRate = 0; } command error_t DhvDecision.send() { uint32_t salt; dhv_msg_t* dmsg; dhv_summary_msg_t* dsmsg; dmsg = (dhv_msg_t*) call SummarySend.getPayloadPtr(); if(dmsg == NULL) return FAIL; dmsg->type = ID_DHV_SUMMARY; dsmsg = (dhv_summary_msg_t*) dmsg->content; salt = call Random.rand32(); dsmsg->info = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt); dsmsg->salt = salt; dbg("DhvSummaryP", "Hash Entry: %08x \n", dsmsg->info); return call SummarySend.send(sizeof(dhv_msg_t) + sizeof(dhv_summary_msg_t)); } event void SummaryReceive.receive(void* payload, uint8_t len) { dhv_summary_msg_t* dsmsg; uint32_t salt, myHash; dsmsg = (dhv_summary_msg_t*) payload; salt = dsmsg->salt; myHash = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt); if(myHash != dsmsg->info) { //call StateLogic.setDiffSummary(); call StateLogic.setHSumStatus(); dbg("DhvSummaryP", "Hashes don't match\n"); } else { call StateLogic.setSameSummary(); commRate = commRate + 1; dbg("DhvSummaryP", "Hashes match\n"); } } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvTrickleMilliC.nc000077500000000000000000000053271207233610700223700ustar00rootroot00000000000000// $Id: DhvTrickleMilliC.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Configuration that encapsulates the trickle timer implementation to * its needed services and initialization. For details on the working * of the parameters, please refer to Levis et al., "A Self-Regulating * Algorithm for Code Maintenance and Propagation in Wireless Sensor * Networks," NSDI 2004. * * @param l Lower bound of the time period in seconds. * @param h Upper bound of the time period in seconds. * @param k Redundancy constant. * @param count How many timers to provide. * * @author Philip Levis * @author Gilman Tolle * @date Jan 7 2006 */ configuration DhvTrickleMilliC { provides interface DhvTrickleTimer as TrickleTimer; } implementation { components DhvTrickleMilliP as TrickleP; components MainC, RandomC; components new TimerMilliC() as PeriodicIntervalTimer; components new TimerMilliC() as SingleEventTimer; components LedsC; TrickleTimer = TrickleP; TrickleP.PeriodicIntervalTimer -> PeriodicIntervalTimer; TrickleP.SingleEventTimer -> SingleEventTimer; TrickleP.Random -> RandomC; TrickleP.Leds -> LedsC; MainC.SoftwareInit -> TrickleP; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvTrickleMilliP.nc000077500000000000000000000101251207233610700223750ustar00rootroot00000000000000// $Id: DhvTrickleMilliP.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Module that provides a service instance of trickle timers. For * details on the working of the parameters, please refer to Levis et * al., "A Self-Regulating Algorithm for Code Maintenance and * Propagation in Wireless Sensor Networks," NSDI 2004. * * @param l Lower bound of the time period in seconds. * @param h Upper bound of the time period in seconds. * @param k Redundancy constant. * @param count How many timers to provide. * * @author Philip Levis * @author Gilman Tolle * @date Jan 7 2006 */ #include #include module DhvTrickleMilliP { provides { interface Init; interface DhvTrickleTimer as TrickleTimer; } uses { interface Timer as PeriodicIntervalTimer; interface Timer as SingleEventTimer; interface Random; interface Leds; } } implementation { uint32_t period; command error_t Init.init() { period = DHV_TAU_HIGH; return SUCCESS; } /** * Start a trickle timer. Reset the counter to 0. */ command error_t TrickleTimer.start() { call PeriodicIntervalTimer.startOneShot(period); dbg("DhvTrickleMilliP", "Starting trickle timer @ %s\n", sim_time_string()); return SUCCESS; } /** * Stop the trickle timer. This call sets the timer period to H. */ command void TrickleTimer.stop() { call PeriodicIntervalTimer.stop(); dbg("DhvTrickleMilliP", "Stopping trickle timer @ %s\n", sim_time_string()); } /** * Reset the timer period to L. If called while the timer is running, * then a new interval (of length L) begins immediately. */ command void TrickleTimer.reset() { period = DHV_TAU_LOW; call PeriodicIntervalTimer.stop(); call PeriodicIntervalTimer.startOneShot(period); dbg("DhvTrickleMilliP", "Resetting trickle timer @ %s\n", sim_time_string()); } command void TrickleTimer.maxInterval() { period = DHV_TAU_HIGH; } /** * The trickle timer has fired. Signaled if C > K. */ event void PeriodicIntervalTimer.fired() { uint32_t dtfire; dtfire = (call Random.rand16() % (period / 2)) + (period / 2); dbg("DhvTrickleMilliP", "Scheduling Trickle event with %u\n", dtfire); call SingleEventTimer.startOneShot(dtfire); period = signal TrickleTimer.requestWindowSize(); call PeriodicIntervalTimer.startOneShot(period); //call Leds.led0Toggle(); } event void SingleEventTimer.fired() { dbg("Trickle", "Firing Trickle Event Timer\n"); signal TrickleTimer.fired(); } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvVBitC.nc000077500000000000000000000013401207233610700206370ustar00rootroot00000000000000/** * DHV Virtual Bits Check Configuration * * Define interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV modules. **/ configuration DhvVBitC{ provides interface DhvDecision; uses interface DhvSend as VBitSend; uses interface DhvReceive as VBitReceive; uses interface DhvStateLogic as VBitLogic; uses interface DhvLogic as VectorLogic; uses interface DhvHelp; } implementation{ components DhvVBitP; DhvDecision = DhvVBitP; VBitSend = DhvVBitP; VBitReceive = DhvVBitP; VBitLogic = DhvVBitP; VectorLogic = DhvVBitP; DhvHelp = DhvVBitP; components RandomC; DhvVBitP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvVBitP.nc000077500000000000000000000141301207233610700206550ustar00rootroot00000000000000/** * DHV Virtual Bits Check Configuration * * Define interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV modules. **/ #include module DhvVBitP{ provides interface DhvDecision; uses interface DhvSend as VBitSend; uses interface DhvReceive as VBitReceive; uses interface DhvStateLogic as VBitLogic; uses interface DhvLogic as VectorLogic; uses interface DhvHelp; uses interface Random; } implementation{ uint8_t commRate; command uint8_t DhvDecision.getCommRate() { return commRate; } command void DhvDecision.resetCommRate(){ commRate = 0; } /*construct a vector of bits and send it*/ command error_t DhvDecision.send(){ uint8_t bindex; uint8_t vbit_size; uint8_t msg_size; uint8_t numMsg; uint8_t maxDataLength; uint8_t i, j; dhv_msg_t* dmsg; dhv_vbit_msg_t* dvbmsg; uint8_t *versionPtr; error_t sendResult; uint32_t salt; maxDataLength = TOSH_DATA_LENGTH - sizeof(dhv_msg_t) - sizeof(dhv_vbit_msg_t); sendResult = FAIL; if(UQCOUNT_DHV != 0) { vbit_size = ((uint8_t)(UQCOUNT_DHV-1)/VBIT_LENGTH) + 1; numMsg = (vbit_size -1)/maxDataLength + 1; }else { vbit_size = 0; numMsg = 0; } bindex = call VBitLogic.getVBitIndex(); //return if 0 if(bindex == 0){ dbg("DhvVBitP", "Error: no vbit to send \n"); } dmsg = call VBitSend.getPayloadPtr(); if(dmsg == NULL) return FAIL; dmsg->type = ID_DHV_VBIT; dvbmsg = (dhv_vbit_msg_t*) dmsg->content; dvbmsg->bindex = bindex; //put the hash into the message salt = call Random.rand32(); dvbmsg->info = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt); dvbmsg->salt = salt; //put the vbit into the message versionPtr = call DhvHelp.getVBits(bindex); for(j = 0; j < numMsg; j++){//number of tos message_t if(j == numMsg-1){ //last message msg_size = vbit_size - j*maxDataLength; }else{ msg_size = maxDataLength; } //TODO: need to get this right dvbmsg->numKey = msg_size*8; //number of keys for(i = 0; i < msg_size; i++){ dvbmsg->vindex = j; dvbmsg->vbit[i] = versionPtr[j*maxDataLength + i]; dbg("DhvVBitP", "bindex %d vbit %d: 0x%02x 0x%02x \n",bindex, i, dvbmsg->vbit[i], versionPtr[i]); } //dbg("DhvVBitP", "Sending vbit of index %d size %d \n", bindex, sizeof(dhv_msg_t) + sizeof(dhv_vbit_msg_t) + msg_size ); for(i = 0; i < msg_size; i++){ dbg("DhvVBitP", "vbit to send %d, 0x%02x \n", i, dvbmsg->vbit[i]); } //send the vbit out sendResult = call VBitSend.send(sizeof(dhv_msg_t) + sizeof(dhv_vbit_msg_t) + msg_size); if(sendResult == SUCCESS){ //call VBitLogic.unsetVBitIndex(bindex); call VBitLogic.setVBitState(0); call VBitLogic.unsetHSumStatus(); } } return sendResult; } event void VBitReceive.receive(void* payload, uint8_t len){ dhv_vbit_msg_t * rcv_dvbmsg; uint8_t bindex, vindex; int i,j; dhv_version_t version; dhv_version_t mask; uint8_t diffIndex; dhv_key_t diffKey; bool isDiff; uint8_t vbit_size; uint8_t* vbit; uint32_t salt, myHash; uint8_t maxDataLength; uint8_t msg_size; uint8_t numMsg; uint32_t bitIndexValue; isDiff = FALSE; maxDataLength = TOSH_DATA_LENGTH - sizeof(dhv_msg_t) - sizeof(dhv_vbit_msg_t); if(UQCOUNT_DHV != 0) { vbit_size = ((uint8_t)(UQCOUNT_DHV-1)/VBIT_LENGTH) + 1; numMsg = (vbit_size -1)/maxDataLength + 1; }else { vbit_size = 0; numMsg = 0; } rcv_dvbmsg = (dhv_vbit_msg_t*) payload; bindex = rcv_dvbmsg->bindex; vindex = rcv_dvbmsg->vindex; dbg("DhvVBitP", "Receive vbit of index %d numMsg %d vbit_size %d \n", bindex, numMsg, vbit_size ); //compare the hash first salt = rcv_dvbmsg->salt; myHash = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt); if(myHash == rcv_dvbmsg->info){ //some duplicates dbg("DhvVBitP", "same summary\n"); call VBitLogic.setSameSummary(); commRate = commRate + 1; }else{ vbit = call DhvHelp.getVBits(bindex); if(vindex == numMsg-1){ msg_size = vbit_size - vindex*maxDataLength; //dbg("DhvVBitP", "Last message vindex %d numMsg %d msg_size %d \n", vindex, numMsg, msg_size ); }else{ msg_size = maxDataLength; //dbg("DhvVBitP", "Not last message %d\n", msg_size); } //compare with the rcv vbits for(i = 0; i < msg_size; i++){ dbg("DhvVBitP", "numMsg %d bindex %d vbit %d vindex %d: msg_size %d local 0x%02x - rcv 0x%02x \n",numMsg, bindex, i, vindex, msg_size ,vbit[vindex*maxDataLength+i],rcv_dvbmsg->vbit[i]); if(vbit[vindex*maxDataLength + i] != rcv_dvbmsg->vbit[i]){ version = rcv_dvbmsg->vbit[i]^vbit[vindex*maxDataLength + i]; mask = 1; if(version != 0){ dbg("DhvVBitP", "There is a difference \n"); isDiff = TRUE; for(j = 0; j < VBIT_LENGTH; j++){ if((version & mask) != 0){ diffIndex = (VBIT_LENGTH -j) + VBIT_LENGTH*i + vindex*maxDataLength - 1 ; dbg("DhvVBitP", "Detect difference at %d, %d %d %d %d \n", diffIndex, i, j, vindex, maxDataLength); diffKey = call DhvHelp.indexToKey(diffIndex); call VectorLogic.setItem(diffKey); } mask = mask << 1; } } } } //reset this bit call VBitLogic.unsetVBitIndex(bindex); if((isDiff == FALSE)){ bitIndexValue = call VBitLogic.getVBitState(); if(bitIndexValue == 0){ //tell DhvLogic to send the next bindex bindex++; dbg("DhvVBitP", "No Difference detected, move to bindex %d \n", bindex ); call VBitLogic.setVBitIndex(bindex); } }else{ dbg("DhvVBitP","difference detected, reset to 0 \n"); } } } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvVectorC.nc000077500000000000000000000015071207233610700212420ustar00rootroot00000000000000/** * DHV Vector Message Configuration * * Define interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV modules. * @modified 8/28/2008 Took the source code from DIP. **/ configuration DhvVectorC { provides interface DhvDecision; uses interface DhvSend as VectorSend; uses interface DhvReceive as VectorReceive; uses interface DhvLogic as VectorLogic; uses interface DhvLogic as DataLogic; uses interface DhvHelp; } implementation { components DhvVectorP; DhvDecision = DhvVectorP; VectorSend = DhvVectorP; VectorReceive = DhvVectorP; DhvHelp = DhvVectorP; VectorLogic = DhvVectorP.VectorLogic; DataLogic = DhvVectorP.DataLogic; components RandomC; DhvVectorP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvVectorP.nc000077500000000000000000000105201207233610700212520ustar00rootroot00000000000000/** * DHV Vector Message Configuration * * Define interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV modules. * @modified 8/28/2008 Took the source code from DIP. **/ #include module DhvVectorP { provides interface DhvDecision; uses interface DhvSend as VectorSend; uses interface DhvReceive as VectorReceive; uses interface DhvLogic as VectorLogic; uses interface DhvLogic as DataLogic; uses interface DhvHelp; uses interface Random; } implementation { uint8_t commRate = 0; int myComparator(const void* a, const void* b); command uint8_t DhvDecision.getCommRate() { return commRate; } command void DhvDecision.resetCommRate() { commRate = 0; } command error_t DhvDecision.send() { dhv_index_t i, j; dhv_key_t sendkey; bool* keyvector; dhv_msg_t* dmsg; dhv_vector_msg_t* dvmsg; error_t status; dbg("DhvVectorP", "prepare to send vector out \n"); dmsg = call VectorSend.getPayloadPtr(); if(dmsg == NULL) { return FAIL; } keyvector = call VectorLogic.allItem(); dmsg->type = ID_DHV_VECTOR; dvmsg = (dhv_vector_msg_t*) dmsg->content; //dvmsg->unitLen = DHV_VECTOR_ENTRIES_PER_PACKET; //TODO: need to check for concurrency in here i = 0; for(j = 0; j < UQCOUNT_DHV; j++){ if(keyvector[j] > ID_DHV_NO){ sendkey = call DhvHelp.indexToKey(j); /*if(keyvector[j] == ID_DHV_REQ){ dbg("DhvVectorP", " keyvector %d == %d \n", keyvector[j], ID_DHV_REQ); dmsg->type = ID_DHV_VECTOR_REQ; }*/ if(i < DHV_VECTOR_ENTRIES_PER_PACKET) { dvmsg->vector[i] = sendkey; dvmsg->vector[i+1] = call DhvHelp.keyToVersion(sendkey); dbg("DhvVectorP","diff vector 0x%08x 0x%08x %d %d \n",dvmsg->vector[i] , dvmsg->vector[i+1], j, keyvector[j]); i = i + 2; }else{ break; } } } dvmsg->unitLen = i; //TODO: need to fix // dbg("DhvVectorP", "Sending vector message out ...unitLen 0x%02x \n", dvmsg->unitLen); status = call VectorSend.send(sizeof(dhv_msg_t) + sizeof(dhv_vector_msg_t) + (i*sizeof(uint32_t))); i = 0; dbg("DhvVectorP","Send status %d vs FALSE %d \n", status, FALSE); if(status == SUCCESS){dbg("DhvVectorP","status == SUCCESS\n");} if(status == FAIL){dbg("DhvVectorP","status == FAIL\n");} //TODO: need to check for actual send status here if(TRUE) { dbg("DhvVectorP", "Send msg successfully \n"); for(j = 0; j < UQCOUNT_DHV; j++){ if(keyvector[j] > ID_DHV_NO){ sendkey = call DhvHelp.indexToKey(j); if(i < DHV_VECTOR_ENTRIES_PER_PACKET) { call VectorLogic.unsetItem(sendkey); i = i + 2; }else{ break; } } } } dbg("DhvVectorP", "Sent vector message out ...unitLen %d \n", dvmsg->unitLen); return SUCCESS; } /*TODO: a callback event to remove the sent vectors*/ event void VectorReceive.receive(void* payload, uint8_t len) { dhv_vector_msg_t* dvmsg; dhv_msg_t* dmsg; uint8_t unitlen; uint8_t i; uint8_t type; uint32_t vectorkey; uint32_t vectorver; uint32_t myver; commRate = commRate + 1; dmsg = (dhv_msg_t*) payload; type = dmsg->type; dvmsg = (dhv_vector_msg_t*) dmsg->content; unitlen = dvmsg->unitLen; dbg("DhvVectorP", "Receive vector msg len %u unitlen 0x%02x 0x%02x \n", len, unitlen, dvmsg->unitLen); for(i = 0; i < unitlen; i += 2) { vectorkey = dvmsg->vector[i]; vectorver = dvmsg->vector[i+1]; myver = call DhvHelp.keyToVersion(vectorkey); dbg("DhvVectorP", "key 0x%08x version 0x%08x myver 0x%08x \n", vectorkey, vectorver, myver); // TODO: handle the invalid versions if(myver < vectorver) { dbg("DhvVectorP", "I have an older version -> setItem \n"); call VectorLogic.setItem(vectorkey); } else if(myver > vectorver) { dbg("DhvVectorP", "I have a newer version -> Data.setItem \n"); call DataLogic.setItem(vectorkey); } else{ dbg("DhvVectorP", "Request msg and I have the same version -> keep quite \n"); call VectorLogic.unsetItem(vectorkey); } } } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvVersionC.nc000077500000000000000000000013221207233610700214200ustar00rootroot00000000000000/** * DHV Vector Message Configuration * * Define interfaces and components. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV modules. * @modified 8/28/2008 Took the source code from DIP. **/ #include configuration DhvVersionC { provides interface DhvHelp; provides interface DisseminationUpdate[dhv_key_t key]; provides interface DhvCache as DataCache; provides interface DhvCache as VectorCache; } implementation { components DhvVersionP; DhvHelp = DhvVersionP; DisseminationUpdate = DhvVersionP; DataCache = DhvVersionP.DhvDataCache; VectorCache = DhvVersionP.DhvVectorCache; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DhvVersionP.nc000077500000000000000000000165751207233610700214550ustar00rootroot00000000000000/** * DHV Version Check Module * * Module checks version of the data item. * details on the working of the parameters, please refer to Thanh Dang et al., * "DHV: A Code Consistency Maintenance Protocol for Multi-Hop Wireless Sensor * Networks" EWSN 09. * * @author Thanh Dang * @author Seungweon Park * * @modified 1/3/2009 Added meaningful documentation. * @modified 8/28/2008 Defined DHV modules. * @modified 8/28/2008 Took the source code from DIP. **/ module DhvVersionP { provides interface DhvHelp; provides interface DisseminationUpdate[dhv_key_t key]; provides interface DhvCache as DhvDataCache; provides interface DhvCache as DhvVectorCache; } implementation { // keys are ordered from smallest to largest. dhv_key_t keys[UQCOUNT_DHV]; dhv_version_t versions[UQCOUNT_DHV]; dhv_index_t count = 0; //keep track of task uint8_t data_to_send[UQCOUNT_DHV]; uint8_t vector_to_send[UQCOUNT_DHV]; uint8_t vbit[(UQCOUNT_DHV == 0)?0:((UQCOUNT_DHV-1)/VBIT_LENGTH +1)]; /*utility for debugging purposes */ void printDataStatus() { dhv_index_t i; for(i = 0; i < UQCOUNT_DHV; i++){ dbg("DhvVersionP", "Data Status %d: %u \n",i, data_to_send[i]); } } void printVectorStatus() { dhv_index_t i; for(i = 0; i < UQCOUNT_DHV; i++){ dbg("DhvVersionP", "T Vector Status %d: %u \n",i, vector_to_send[i]); } } void printVersionStatus() { dhv_index_t i; for(i = 0; i < UQCOUNT_DHV; i++){ dbg("DhvVersionP", "Version Status %d: 0x%08x \n",i, versions[i]); } } /*DhvDataCache interface implementation */ command void DhvDataCache.addItem(dhv_key_t key){ dhv_index_t i; dbg("DhvVersionP", "Add Item to data vector key %d\n", i); i = call DhvHelp.keyToIndex(key); data_to_send[i] = ID_DHV_ADS; printDataStatus(); } command void DhvDataCache.addReqItem(dhv_key_t key){ dhv_index_t i; dbg("DhvVersionP", "Add Req Item to data vector key %d\n", i); i = call DhvHelp.keyToIndex(key); data_to_send[i] = ID_DHV_REQ; printDataStatus(); } command void DhvDataCache.removeItem(dhv_key_t key){ dhv_index_t i; i = call DhvHelp.keyToIndex(key); data_to_send[i] = ID_DHV_NO; dbg("DhvVersionP", "Remove Item from data vector key %d\n", i); printDataStatus(); } command bool DhvDataCache.hasItemToSend(){ dhv_index_t i; for(i = 0; i < UQCOUNT_DHV; i++){ if(data_to_send[i] > ID_DHV_NO){return TRUE;} } return FALSE; } command uint8_t* DhvDataCache.allItem(){ return data_to_send; } command uint8_t DhvDataCache.nextItem(){ dhv_index_t i; for(i = 0; i < UQCOUNT_DHV; i++){ if(data_to_send[i] > ID_DHV_NO ){ return i; } } return UQCOUNT_DHV; } command void DhvDataCache.removeAll(){ dhv_index_t i; for(i=0; i < UQCOUNT_DHV; i++){ data_to_send[i] = ID_DHV_NO; } } /*vector cache */ command void DhvVectorCache.addItem(dhv_key_t key){ dhv_index_t i; i = call DhvHelp.keyToIndex(key); vector_to_send[i] = ID_DHV_ADS; dbg("DhvVersionP", "Add Item to vector_to_send index %d\n", i); printVectorStatus(); } command void DhvVectorCache.addReqItem(dhv_key_t key){ dhv_index_t i; i = call DhvHelp.keyToIndex(key); vector_to_send[i] = ID_DHV_ADS; dbg("DhvVersionP", "Add Item to vector_to_send index %d\n", i); printVectorStatus(); } command void DhvVectorCache.removeItem(dhv_key_t key){ dhv_index_t i; i = call DhvHelp.keyToIndex(key); vector_to_send[i] = ID_DHV_NO; dbg("DhvVersionP", "Remove Item from vector_to_send index %d\n", i); printVectorStatus(); } command bool DhvVectorCache.hasItemToSend(){ dhv_index_t i; for(i = 0; i < UQCOUNT_DHV; i++){ if(vector_to_send[i] > ID_DHV_NO){return TRUE;} } return FALSE; } command uint8_t* DhvVectorCache.allItem(){ return vector_to_send; } command uint8_t DhvVectorCache.nextItem(){ dhv_index_t i; for(i = 0; i < UQCOUNT_DHV; i++){ if(vector_to_send[i] > ID_DHV_NO){ return i; } } return UQCOUNT_DHV; } command void DhvVectorCache.removeAll(){ dhv_index_t i; for(i=0; i < UQCOUNT_DHV; i++){ vector_to_send[i] = ID_DHV_NO; } } command void DhvHelp.registerKey(dhv_key_t key) { keys[count] = key; count = count + 1; if(count == UQCOUNT_DHV) { dbg("DhvVersionP","Key registration complete!\n"); } //printVersionStatus(); } command void DisseminationUpdate.change[dhv_key_t key](dhv_data_t* val) { dhv_index_t i; dhv_version_t ver; dbg("DhvVersioP", "Updateing version for key %d \n", key); i = call DhvHelp.keyToIndex(key); ver = versions[i]; ver++; versions[i] = ver; printVersionStatus(); } command dhv_index_t DhvHelp.keyToIndex(dhv_key_t key) { dhv_index_t answer; dhv_index_t i; answer = DHV_UNKNOWN_INDEX; // linear search for now since it's easier for(i = 0; i < UQCOUNT_DHV; i++) { if(keys[i] == key) { answer = i; break; } } dbg("DhvVersionP", "Converting key %x to index %u\n", key, answer); return answer; } command dhv_key_t DhvHelp.indexToKey(dhv_index_t ind) { return keys[ind]; } command dhv_version_t DhvHelp.keyToVersion(dhv_key_t key) { dhv_index_t i; i = call DhvHelp.keyToIndex(key); return versions[i]; } command void DhvHelp.setVersion(dhv_key_t key, dhv_version_t ver) { dhv_index_t i; i = call DhvHelp.keyToIndex(key); versions[i] = ver; dbg("DhvVersionP","Setting key %x at index %u to version 0x%08x\n", key, i, ver); } command dhv_version_t* DhvHelp.getAllVersions() { return versions; } command uint32_t DhvHelp.computeHash(uint8_t left, uint8_t right, uint32_t salt) { dhv_index_t i; uint32_t hashValue = salt; uint8_t *sequence; if(right <= left) return 0; sequence = ((uint8_t*) (versions + left)); for(i = 0; i <= (right-left-1)*sizeof(dhv_version_t); i++) { hashValue += sequence[i]; hashValue += (hashValue << 10); hashValue ^= (hashValue >> 6); } hashValue += (hashValue << 3); hashValue ^= (hashValue >> 11); hashValue += (hashValue << 15); return hashValue; } command uint8_t* DhvHelp.getVBits(uint32_t bindex){ dhv_version_t version; uint8_t cur_byte; dhv_index_t i,j; j = 0; version = 0; cur_byte = 0; dbg("DhvVersionP", "getVBits at index %d \n", bindex); printVersionStatus(); for(i = 1; i <= UQCOUNT_DHV; i++){ version = versions[i-1]; //dbg("DhvVersionP", "version %d 0x%08x \n", i, version); version = (version >>(bindex-1)) << (DHV_VERSION_LENGTH*8-1) >> (j + 24); //get the bindex bit //dbg("DhvVersionP", "shifted version 1 by %d : 0x%08x -> 0x%08x : %d \n", VBIT_LENGTH-1, versions[i-1], version, j); cur_byte = cur_byte | version; //dbg("DhvVersionP", "shifted version 2 0x%08x -> 0x%08x : %d cur_byte 0x%08x \n\n\n", versions[i-1], version, j, cur_byte); j++; if(j == VBIT_LENGTH){ //reset j j = 0; vbit[(i-1)/VBIT_LENGTH] = cur_byte; dbg("DhvVersionP", "vertical bits %d 0x%02x 0x%02x \n", (i-1)/VBIT_LENGTH, cur_byte, vbit[(i-1)/VBIT_LENGTH]); cur_byte = 0; } } //debug for(i= 0; i < sizeof(vbit); i++){ dbg("DhvVersionP", "vbit %d -> 0x%02x \n", i, vbit[i]); } return vbit; } command dhv_version_t DhvHelp.getHSum(){ dhv_version_t hsum; dhv_index_t i; hsum = versions[0]; for(i =1 ; i < UQCOUNT_DHV; i++){ hsum = hsum^versions[i]; } return hsum; } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DisseminationC.nc000077500000000000000000000002331207233610700221370ustar00rootroot00000000000000 #include configuration DisseminationC { provides interface StdControl; } implementation { components DhvLogicC; StdControl = DhvLogicC; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DisseminatorC.nc000077500000000000000000000056031207233610700220000ustar00rootroot00000000000000#include /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminatorC component holds and synchronizes a single value * of a chosen type, and identifies that value by a chosen 16-bit key. * Different nodes should use the same key for the same value. * * See TEP118 - Dissemination for details. * * @param t the type of the object that will be disseminated * @param key the 16-bit identifier of the disseminated object * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2009-08-22 08:24:06 $ */ generic configuration DisseminatorC(typedef t, dhv_key_t key) { provides interface DisseminationValue; provides interface DisseminationUpdate; } implementation { enum { JUST_NEED_COUNT = UQ_DHV }; components new DisseminatorP(t, key); DisseminationValue = DisseminatorP.AppDisseminationValue; DisseminationUpdate = DisseminatorP.AppDisseminationUpdate; components LedsC; DisseminatorP.Leds -> LedsC; components DhvLogicC; DisseminatorP.DhvDisseminationUpdate -> DhvLogicC.DisseminationUpdate[key]; components DhvVersionC; DisseminatorP.DhvHelp -> DhvVersionC; components MainC; MainC.SoftwareInit -> DisseminatorP; components DhvDataC; DhvDataC.DisseminationUpdate[key] -> DisseminatorP.DataDisseminationUpdate; DhvDataC.DisseminationValue[key] -> DisseminatorP.DataDisseminationValue; } tinyos-2.1.2+dfsg/tos/lib/net/dhv/DisseminatorP.nc000077500000000000000000000077011207233610700220160ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminatorP module holds and synchronizes a single value of a * chosen type. * * See TEP118 - Dissemination for details. * * @param t the type of the object that will be disseminated * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2009-08-22 08:24:06 $ */ generic module DisseminatorP(typedef t, dhv_key_t key) { provides interface DisseminationValue as AppDisseminationValue; provides interface DisseminationUpdate as AppDisseminationUpdate; provides interface DisseminationUpdate as DataDisseminationUpdate; provides interface DisseminationValue as DataDisseminationValue; provides interface Init; uses interface DisseminationUpdate as DhvDisseminationUpdate; uses interface DhvHelp; uses interface Leds; } implementation { dhv_data_t valueCache; task void signalNewData() { signal AppDisseminationValue.changed(); } command error_t Init.init() { call DhvHelp.registerKey(key); return SUCCESS; } // A sequence number is 32 bits. The top 16 bits are an incrementing // counter, while the bottom 16 bits are a unique node identifier. // But versions aren't stored here. command const t* AppDisseminationValue.get() { return (t*) &valueCache; } command void AppDisseminationValue.set( const t* val ) { memcpy( &valueCache, val, sizeof(t) ); // must signal here instead of posting task to prevent race condition signal AppDisseminationValue.changed(); } command void AppDisseminationUpdate.change( t* newVal ) { memcpy( &valueCache, newVal, sizeof(t) ); /* Increment the counter and append the local node ID later. */ /* DhvLogicC doesn't care what the data actually is, it just wants the key, so we cast it recklessly */ call DhvDisseminationUpdate.change((dhv_data_t*)newVal); post signalNewData(); } command const dhv_data_t* DataDisseminationValue.get() { return (dhv_data_t*) &valueCache; } command void DataDisseminationValue.set( const dhv_data_t* val ) { } command void DataDisseminationUpdate.change( dhv_data_t* newVal ) { memcpy( &valueCache, newVal, sizeof(dhv_data_t) ); // don't post the task, this came from the network signal AppDisseminationValue.changed(); } default event void AppDisseminationValue.changed() { } default event void DataDisseminationValue.changed() { } } tinyos-2.1.2+dfsg/tos/lib/net/dhv/README000077500000000000000000000017621207233610700175740ustar00rootroot00000000000000 Title: Dhv Author: Thanh Dang, Seungweon Park ------------------ DHV is a code consistency maintenance protocol to ensure that every node in a network will eventually have the same code. DHV is based on the simple observation that if two code versions are different, their corresponding version numbers often differ in only a few least significant bits of their binary representation. DHV allows nodes to carefully select and transmit only necessary bit level information to detect a newer code version in the network. Detail of the protocol can be found here Thanh Dang, Nirupama Bulusu, Wu-chi Feng, and Seungweon Park, "DHV: A Code Consistent Maintenance Protocol for Wireless Sensor Networks.", In Proceedings of EWSN 2009, Cork, Ireland, Feb 2009. Usage: ------ To use include the following in your Makefile: CFLAGS += -I$(TOSDIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net/dhv CFLAGS += -I$(TOSDIR)/lib/net/dhv/interfaces * add a following line when use BaseStation CFLAGS += -DTOSH_DATA_LENGTH=32 tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/000077500000000000000000000000001207233610700210265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvCache.nc000077500000000000000000000004241207233610700230200ustar00rootroot00000000000000#include interface DhvCache{ command void addItem(dhv_key_t key); command void addReqItem(dhv_key_t key); command void removeItem(dhv_key_t key); command bool hasItemToSend(); command uint8_t* allItem(); command uint8_t nextItem(); command void removeAll(); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvDecision.nc000077500000000000000000000001661207233610700235550ustar00rootroot00000000000000 interface DhvDecision { command uint8_t getCommRate(); command void resetCommRate(); command error_t send(); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvEstimates.nc000077500000000000000000000010411207233610700237470ustar00rootroot00000000000000 #include interface DhvEstimates { command dhv_estimate_t* getEstimates(); command void decEstimateByIndex(dhv_index_t i); command void decEstimateByKey(dhv_key_t key); command dhv_hashlen_t estimateToHashlength(dhv_estimate_t est); command dhv_estimate_t hashlengthToEstimate(dhv_hashlen_t len); // special event to reset trickle timer too command void setDataEstimate(dhv_key_t key); command void setVectorEstimate(dhv_key_t key); command void setSummaryEstimateByIndex(dhv_index_t ind, dhv_estimate_t est); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvHelp.nc000077500000000000000000000007571207233610700227160ustar00rootroot00000000000000 #include interface DhvHelp { command void registerKey(dhv_key_t key); command dhv_index_t keyToIndex(dhv_key_t key); command dhv_key_t indexToKey(dhv_index_t ind); command dhv_version_t keyToVersion(dhv_key_t key); command void setVersion(dhv_key_t key, dhv_version_t ver); command dhv_version_t* getAllVersions(); command dhv_version_t getHSum(); command uint8_t* getVBits(uint32_t bindex); command uint32_t computeHash(uint8_t left, uint8_t right,uint32_t salt); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvLogic.nc000077500000000000000000000003441207233610700230530ustar00rootroot00000000000000#include interface DhvLogic{ command error_t setItem(dhv_key_t key); command error_t setReqItem(dhv_key_t key); command error_t unsetItem(dhv_key_t key); command uint8_t nextItem(); command uint8_t * allItem(); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvNeighbour.nc000077500000000000000000000001741207233610700237410ustar00rootroot00000000000000#include interface DhvNeighbour{ command uint8_t getNeighbourCount(); command void addNeighbour(uint8_t nodeId); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvReceive.nc000077500000000000000000000001141207233610700233730ustar00rootroot00000000000000 interface DhvReceive { event void receive(void* payload, uint8_t len); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvSend.nc000077500000000000000000000002031207233610700227010ustar00rootroot00000000000000 interface DhvSend { command error_t send(uint8_t len); command void* getPayloadPtr(); command uint8_t maxPayloadLength(); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvStateLogic.nc000077500000000000000000000006141207233610700240540ustar00rootroot00000000000000interface DhvStateLogic{ command void setDiffSummary(); command void setSameSummary(); command uint32_t getVBitState(); command void setVBitState(uint32_t state); command void unsetVBitIndex(uint8_t dindex); command uint8_t getVBitIndex(); command void setVBitIndex(uint8_t dindex); command void setHSumStatus(); command void unsetHSumStatus(); command uint8_t getHSumStatus(); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvTrickleTimer.nc000077500000000000000000000071751207233610700244250ustar00rootroot00000000000000// $Id: DhvTrickleTimer.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * A network trickle timer. A trickle timer has a period in the range * [L, H]. After firing, the period is doubled, up to H. If the period * is P, then the timer is scheduled to fire in the interval [0.5P, P] * (the second half of a period). The period can be reset to L (the * smallest period, and therefore the highest frequency). * * The timer may be suppressed. If a user of the interface has heard * enough packets from other nodes that indicate its transmitting a * packet would be unncessarily redundant, then the timer does not * fire. The timer has a constant K and a counter C. If C >e; K, then * the timer does not fire. When an interval ends, C is reset to 0. * Calling incrementCounter increments C by one. * * For details, refer to Levis et al., "A Self-Regulating Algorithm * for Code Maintenance and Propagation in Wireless Sensor Networks," * NSDI 2004. The component providing this interface defines the * constants L, H, and K. * * @author Philip Levis * @date Jan 7 2006 * @author Thanh Dang * @date Aug 5 2009 */ interface DhvTrickleTimer { /** * Start the trickle timer. At boot, the timer period is its maximum * value (H). If a protocol requires starting at the minimum value * (e.g., fast start), then it should call reset before * start. * * @return error_t SUCCESS if the timer was started, EBUSY if it is already * running, and FAIL otherwise. */ command error_t start(); /** * Stop the trickle timer. This call sets the timer period to H and * C to 0. */ command void stop(); /** * Reset the timer period to L. If called while the timer is * running, then a new interval (of length L) begins immediately. */ command void reset(); /** * The trickle timer has fired. Signaled if C > K. */ event void fired(); /** * Compute the window size based on Dip's estimates */ event uint32_t requestWindowSize(); /** * Resets the timer period to H. */ command void maxInterval(); } tinyos-2.1.2+dfsg/tos/lib/net/dhv/interfaces/DhvVersion.nc000077500000000000000000000001461207233610700234430ustar00rootroot00000000000000 #include interface DhvVersion { command void setVersion(); command void incVersion(); } tinyos-2.1.2+dfsg/tos/lib/net/dip/000077500000000000000000000000001207233610700166765ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/dip/AMDipC.nc000066400000000000000000000012121207233610700202510ustar00rootroot00000000000000#include configuration AMDipC { provides interface DipSend; provides interface DipReceive as DataReceive; provides interface DipReceive as VectorReceive; provides interface DipReceive as SummaryReceive; } implementation { components AMDipP; components new AMSenderC(AM_DIP) as SendC; components new AMReceiverC(AM_DIP) as ReceiveC; AMDipP.NetAMSend -> SendC.AMSend; AMDipP.NetReceive -> ReceiveC.Receive; components MainC; MainC.SoftwareInit -> AMDipP.Init; DipSend = AMDipP.DipSend; DataReceive = AMDipP.DipDataReceive; VectorReceive = AMDipP.DipVectorReceive; SummaryReceive = AMDipP.DipSummaryReceive; } tinyos-2.1.2+dfsg/tos/lib/net/dip/AMDipP.nc000066400000000000000000000032121207233610700202700ustar00rootroot00000000000000 module AMDipP { provides interface Init; provides interface DipSend; provides interface DipReceive as DipDataReceive; provides interface DipReceive as DipVectorReceive; provides interface DipReceive as DipSummaryReceive; uses interface AMSend as NetAMSend; uses interface Receive as NetReceive; } implementation { message_t am_msg; bool busy; command error_t Init.init() { busy = FALSE; return SUCCESS; } command error_t DipSend.send(uint8_t len) { error_t err; dbg("AMDipP", "Attempting to send data in the air\n"); err = call NetAMSend.send(AM_BROADCAST_ADDR, &am_msg, len); if(err == SUCCESS) { busy = TRUE; } return err; } command void* DipSend.getPayloadPtr() { // returns NULL if message is busy if(busy) { return NULL; } return call NetAMSend.getPayload(&am_msg, 0); } command uint8_t DipSend.maxPayloadLength() { return call NetAMSend.maxPayloadLength(); } event void NetAMSend.sendDone(message_t* msg, error_t err) { dbg("AMDipP", "Data send successfully in the air\n"); if(msg == &am_msg) { busy = FALSE; } } event message_t* NetReceive.receive(message_t* msg, void* payload, uint8_t len) { dip_msg_t* dmsg; uint8_t type; dmsg = (dip_msg_t*) payload; type = dmsg->type; switch(type) { case ID_DIP_DATA: signal DipDataReceive.receive(dmsg->content, len); break; case ID_DIP_VECTOR: signal DipVectorReceive.receive(dmsg->content, len); break; case ID_DIP_SUMMARY: signal DipSummaryReceive.receive(dmsg->content, len); break; } return msg; } } tinyos-2.1.2+dfsg/tos/lib/net/dip/Dip.h000066400000000000000000000032531207233610700175660ustar00rootroot00000000000000 #ifndef __DIP_H__ #define __DIP_H__ #define UQ_DIP unique("DIP") #define UQCOUNT_DIP uniqueCount("DIP") enum { DIP_TAU_LOW = 1024L, DIP_TAU_HIGH = 65535L, DIP_UNKNOWN_VERSION = 0xFFFFFFFF, DIP_UNKNOWN_INDEX = 0xFFFF, DIP_DATA_SUPPRESSION = 1, DIP_ADV_SUPPRESSION = 1 }; typedef enum { ID_DIP_INVALID = 0x0, ID_DIP_SUMMARY = 0x1, ID_DIP_VECTOR = 0x2, ID_DIP_DATA = 0x3 } dip_msgid_t; enum { AM_DIP = 0x62, AM_DIP_DATA_MSG = 0x62, // For MIG tool AM_DIP_MSG = 0x62, // For MIG tool AM_DIP_DATA = 0x62 // For MIG tool }; typedef uint16_t dip_index_t; typedef uint16_t dip_key_t; typedef nx_uint16_t nx_dip_key_t; typedef uint32_t dip_version_t; typedef nx_uint32_t nx_dip_version_t; typedef uint8_t dip_estimate_t; typedef dip_index_t dip_hashlen_t; typedef nx_struct dip_msg { nx_uint8_t type; // dip_msgid_t nx_uint8_t content[0]; } dip_msg_t; typedef nx_struct dip_data_msg { nx_dip_key_t key; nx_dip_version_t version; nx_uint8_t size; nx_uint8_t data[0]; } dip_data_msg_t; typedef nx_struct dip_vector_msg { nx_uint8_t unitLen; nx_uint32_t vector[0]; } dip_vector_msg_t; typedef nx_struct dip_summary_msg { nx_uint8_t unitLen; nx_uint32_t salt; nx_uint32_t info[0]; } dip_summary_msg_t; dip_estimate_t DIP_DATA_ESTIMATE; dip_estimate_t DIP_MAX_ESTIMATE; dip_estimate_t DIP_VECTOR_ESTIMATE; #define DIP_SUMMARY_ENTRIES_PER_PACKET (DIP_SUMMARY_VALUES_PER_PACKET * 3) #define DIP_VECTOR_ENTRIES_PER_PACKET (DIP_VECTOR_VALUES_PER_PACKET * 2) #include "qsort.c" /* TUNABLE PARAMETERS */ typedef nx_struct dip_data { nx_uint8_t data[16]; } dip_data_t; enum { DIP_SUMMARY_VALUES_PER_PACKET = 2, DIP_VECTOR_VALUES_PER_PACKET = 2 }; #endif tinyos-2.1.2+dfsg/tos/lib/net/dip/DipDataC.nc000066400000000000000000000011461207233610700206330ustar00rootroot00000000000000 configuration DipDataC { provides interface DipDecision; uses interface DipSend as DataSend; uses interface DipReceive as DataReceive; uses interface DisseminationUpdate[dip_key_t key]; uses interface DisseminationValue[dip_key_t key]; uses interface DipHelp; uses interface DipEstimates; } implementation { components DipDataP; DipDecision = DipDataP; DataSend = DipDataP; DataReceive = DipDataP; DisseminationUpdate = DipDataP; DisseminationValue = DipDataP; DipHelp = DipDataP; DipEstimates = DipDataP; components LedsC; DipDataP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipDataP.nc000066400000000000000000000053531207233610700206540ustar00rootroot00000000000000 #include module DipDataP { provides interface DipDecision; uses interface DipSend as DataSend; uses interface DipReceive as DataReceive; uses interface DisseminationUpdate[dip_key_t key]; uses interface DisseminationValue[dip_key_t key]; uses interface DipHelp; uses interface DipEstimates; uses interface Leds; } implementation { uint8_t commRate = 0; command uint8_t DipDecision.getCommRate() { return commRate; } command void DipDecision.resetCommRate() { commRate = 0; } command error_t DipDecision.send() { // Scan all estimates and send the highest estimate in deterministic order dip_index_t i; dip_index_t high_i; dip_index_t high_est; dip_key_t key; dip_version_t ver; dip_estimate_t* ests; dip_msg_t* dmsg; dip_data_msg_t* ddmsg; const dip_data_t* data; ests = call DipEstimates.getEstimates(); high_i = 0; high_est = 0; for(i = 0; i < UQCOUNT_DIP; i++) { if(ests[i] > high_est) { high_i = i; high_est = ests[i]; } } key = call DipHelp.indexToKey(high_i); ver = call DipHelp.keyToVersion(key); data = call DisseminationValue.get[key](); dmsg = (dip_msg_t*) call DataSend.getPayloadPtr(); if(dmsg == NULL) { return FAIL; } ddmsg = (dip_data_msg_t*) dmsg->content; dmsg->type = ID_DIP_DATA; ddmsg->key = key; ddmsg->version = ver; ddmsg->size = sizeof(dip_data_t); memcpy(ddmsg->data, data, sizeof(dip_data_t)); call DipEstimates.decEstimateByKey(key); dbg("DipDataP", "Data sent with key %x and version %08x\n", key, ver); return call DataSend.send(sizeof(dip_data_msg_t) + sizeof(dip_msg_t) + sizeof(dip_data_t)); } event void DataReceive.receive(void* payload, uint8_t len) { dip_key_t key; dip_version_t myVer; dip_version_t msgVer; dip_data_msg_t* ddmsg; commRate = commRate + 1; ddmsg = (dip_data_msg_t*) payload; key = ddmsg->key; msgVer = ddmsg->version; myVer = call DipHelp.keyToVersion(key); dbg("DipDataP", "Data rcved with key %x and version %08x\n", key, msgVer); // TODO: handle the invalid versions if(myVer < msgVer) { call DisseminationUpdate.change[key]((dip_data_t*)ddmsg->data); call DipHelp.setVersion(key, msgVer); call DipEstimates.setDataEstimate(key); } else if (myVer > msgVer) { call DipEstimates.setDataEstimate(key); } else { call DipEstimates.decEstimateByKey(key); } } event void DisseminationValue.changed[dip_key_t key]() { } default command const dip_data_t* DisseminationValue.get[dip_key_t key]() { return NULL; } default command void DisseminationUpdate.change[dip_key_t key](dip_data_t* val) { } } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipLogicC.nc000066400000000000000000000023611207233610700210170ustar00rootroot00000000000000 #include configuration DipLogicC { provides interface DisseminationUpdate[dip_key_t key]; provides interface StdControl; } implementation { components DipLogicP; DisseminationUpdate = DipLogicP; StdControl = DipLogicP; components MainC; MainC.SoftwareInit -> DipLogicP; DipLogicP.Boot -> MainC; components DipTrickleMilliC; DipLogicP.DipTrickleTimer -> DipTrickleMilliC; components DipVersionC; DipLogicP.VersionUpdate -> DipVersionC; DipLogicP.DipHelp -> DipVersionC; components AMDipC; components DipDataC; DipLogicP.DipDataDecision -> DipDataC; DipDataC.DataSend -> AMDipC.DipSend; DipDataC.DataReceive -> AMDipC.DataReceive; DipDataC.DipHelp -> DipVersionC; DipDataC.DipEstimates -> DipLogicP; components DipVectorC; DipLogicP.DipVectorDecision -> DipVectorC; DipVectorC.VectorSend -> AMDipC.DipSend; DipVectorC.VectorReceive -> AMDipC.VectorReceive; DipVectorC.DipHelp -> DipVersionC; DipVectorC.DipEstimates -> DipLogicP; components DipSummaryC; DipLogicP.DipSummaryDecision -> DipSummaryC; DipSummaryC.SummarySend -> AMDipC.DipSend; DipSummaryC.SummaryReceive -> AMDipC.SummaryReceive; DipSummaryC.DipHelp -> DipVersionC; DipSummaryC.DipEstimates -> DipLogicP; } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipLogicP.nc000066400000000000000000000173611207233610700210420ustar00rootroot00000000000000 #include module DipLogicP { provides interface DisseminationUpdate[dip_key_t key]; provides interface DipEstimates; provides interface Init; provides interface StdControl; uses interface Boot; uses interface DipTrickleTimer; uses interface DisseminationUpdate as VersionUpdate[dip_key_t key]; uses interface DipDecision as DipDataDecision; uses interface DipDecision as DipVectorDecision; uses interface DipDecision as DipSummaryDecision; uses interface DipHelp; } implementation { uint32_t windowSize; dip_hashlen_t totalPossible; dip_estimate_t estimates[UQCOUNT_DIP]; uint16_t diplog(uint16_t base, uint16_t num); uint16_t dipexp(uint16_t base, uint16_t expt); dip_estimate_t getDataEstimate(dip_hashlen_t len); dip_estimate_t getMaxEstimate(dip_hashlen_t len); uint8_t sendDecision(); command error_t Init.init() { windowSize = DIP_TAU_HIGH; DIP_DATA_ESTIMATE = getDataEstimate(UQCOUNT_DIP); DIP_MAX_ESTIMATE = getMaxEstimate(UQCOUNT_DIP); DIP_VECTOR_ESTIMATE = DIP_DATA_ESTIMATE - 1; totalPossible = call DipEstimates.estimateToHashlength(0); dbg("DipLogicP", "Real Total: %u, Dip Total: %u\n", UQCOUNT_DIP, totalPossible); if(totalPossible < UQCOUNT_DIP) { DIP_DATA_ESTIMATE++; DIP_MAX_ESTIMATE++; DIP_VECTOR_ESTIMATE++; totalPossible = call DipEstimates.estimateToHashlength(0); } dbg("DipLogicP", "Real Total: %u, DIP New Total: %u\n", UQCOUNT_DIP, totalPossible); dbg("DipLogicP","DATA_ESTIMATE initialized to %u\n", DIP_DATA_ESTIMATE); dbg("DipLogicP","MAX_ESTIMATE initialized to %u\n", DIP_MAX_ESTIMATE); dbg("DipLogicP","VECT_ESTIMATE initialized to %u\n", DIP_VECTOR_ESTIMATE); dbg("DipLogicP","DIP ready\n"); return SUCCESS; } event void Boot.booted() { } command error_t StdControl.start() { return call DipTrickleTimer.start(); } command error_t StdControl.stop() { call DipTrickleTimer.stop(); return SUCCESS; } command void DisseminationUpdate.change[dip_key_t key](dip_data_t* val) { dip_index_t i; dbg("DipLogicP","App notified key %x is new\n", key); i = call DipHelp.keyToIndex(key); #ifndef DIP_JOINTEST estimates[i] = DIP_DATA_ESTIMATE; #endif call VersionUpdate.change[key](val); call DipTrickleTimer.reset(); } event uint32_t DipTrickleTimer.requestWindowSize() { dip_index_t i; dip_estimate_t max = 0; for(i = 0; i < UQCOUNT_DIP; i++) { if(estimates[i] > 0) { max = estimates[i]; windowSize = DIP_TAU_LOW; break; } } if(max == 0) { windowSize = windowSize << 1; if(windowSize > DIP_TAU_HIGH) { windowSize = DIP_TAU_HIGH; } } dbg("DipLogicP", "Window size requested, give %u\n", windowSize); return windowSize; } event void DipTrickleTimer.fired() { dip_index_t i; uint8_t decision; dbg("DipLogicP","Trickle Timer fired!\n"); for(i = 0; i < UQCOUNT_DIP; i++) { dbg("DipLogicP","Index-%u Estimate-%u\n", i, estimates[i]); } decision = sendDecision(); switch(decision) { case ID_DIP_INVALID: dbg("DipLogicP", "Decision to SUPPRESS\n"); break; case ID_DIP_SUMMARY: dbg("DipLogicP", "Decision to SUMMARY\n"); call DipSummaryDecision.send(); break; case ID_DIP_VECTOR: dbg("DipLogicP", "Decision to VECTOR\n"); call DipVectorDecision.send(); break; case ID_DIP_DATA: dbg("DipLogicP", "Decision to DATA\n"); call DipDataDecision.send(); break; } call DipDataDecision.resetCommRate(); call DipVectorDecision.resetCommRate(); call DipSummaryDecision.resetCommRate(); } command dip_estimate_t* DipEstimates.getEstimates() { return estimates; } command void DipEstimates.decEstimateByIndex(dip_index_t i) { if(estimates[i] != 0) { estimates[i] = estimates[i] - 1; } } command void DipEstimates.decEstimateByKey(dip_key_t key) { dip_index_t i; i = call DipHelp.keyToIndex(key); call DipEstimates.decEstimateByIndex(i); } command dip_estimate_t DipEstimates.hashlengthToEstimate(dip_hashlen_t len) { if(len == UQCOUNT_DIP) { len = totalPossible; } return DIP_MAX_ESTIMATE - diplog(DIP_SUMMARY_VALUES_PER_PACKET, len); } command dip_hashlen_t DipEstimates.estimateToHashlength(dip_estimate_t est) { uint8_t expt, base; uint16_t val; base = DIP_SUMMARY_VALUES_PER_PACKET; expt = DIP_MAX_ESTIMATE - est; val = dipexp(base, expt); if(val > UQCOUNT_DIP) { // bring length back down if over UQCOUNT_DIP val = UQCOUNT_DIP; } return val; } /* Calculation functions */ uint16_t diplog(uint16_t base, uint16_t num) { uint8_t counter; counter = 0; while(num != 0) { num = num / base; counter++; } return counter - 1; } command void DipEstimates.setDataEstimate(dip_key_t key) { dip_index_t i; i = call DipHelp.keyToIndex(key); estimates[i] = DIP_DATA_ESTIMATE; call DipTrickleTimer.reset(); } command void DipEstimates.setVectorEstimate(dip_key_t key) { dip_index_t i; i = call DipHelp.keyToIndex(key); if(estimates[i] < DIP_VECTOR_ESTIMATE) { estimates[i] = DIP_VECTOR_ESTIMATE; } call DipTrickleTimer.reset(); } command void DipEstimates.setSummaryEstimateByIndex(dip_index_t ind, dip_estimate_t est) { if(estimates[ind] < est) { estimates[ind] = est; } call DipTrickleTimer.reset(); } uint16_t dipexp(uint16_t base, uint16_t expt) { uint16_t ans; ans = 1; while(expt > 0) { if((expt & 1) == 0) { base = base * base; expt = expt >> 1; } else { ans = ans * base; expt = expt - 1; } } return ans; } dip_estimate_t getDataEstimate(dip_hashlen_t len) { dip_estimate_t h_total; dip_estimate_t v_total; h_total = diplog(DIP_SUMMARY_VALUES_PER_PACKET, len); v_total = diplog(DIP_SUMMARY_VALUES_PER_PACKET, DIP_VECTOR_VALUES_PER_PACKET); return h_total - v_total + 1; } dip_estimate_t getMaxEstimate(dip_hashlen_t len) { return diplog(DIP_SUMMARY_VALUES_PER_PACKET, len); } uint8_t sendDecision() { dip_estimate_t highEst; dip_estimate_t est; uint8_t dataCommRate; uint8_t vectorCommRate; uint8_t summaryCommRate; dip_estimate_t* allEsts; dip_index_t i; uint16_t E, D, L, V, C; allEsts = call DipEstimates.getEstimates(); highEst = 0; dataCommRate = call DipDataDecision.getCommRate(); vectorCommRate = call DipVectorDecision.getCommRate(); summaryCommRate = call DipSummaryDecision.getCommRate(); if(dataCommRate >= DIP_DATA_SUPPRESSION) { dbg("DipLogicP", "Heard data\n"); return ID_DIP_INVALID; } // if there is an estimate with highest estimate value, send for(i = 0; i < UQCOUNT_DIP; i++) { est = allEsts[i]; if(est >= DIP_DATA_ESTIMATE) { return ID_DIP_DATA; } if(est > highEst) { highEst = est; }; } // didn't send or hear data at this point if(vectorCommRate + summaryCommRate >= DIP_ADV_SUPPRESSION) { dbg("DipLogicP", "Heard an advertisement\n"); return ID_DIP_INVALID; } // corner case, if hash is too short if(call DipEstimates.estimateToHashlength(highEst) <= DIP_VECTOR_VALUES_PER_PACKET) { return ID_DIP_VECTOR; } // now we make the DIP decision C = dataCommRate + vectorCommRate + summaryCommRate; if(C == 0) C = 1; // don't want to divide by zero E = highEst; D = DIP_DATA_ESTIMATE; L = call DipEstimates.estimateToHashlength(E); V = DIP_VECTOR_VALUES_PER_PACKET; dbg("DipLogicP", "D=%u, E=%u, L=%u, V=%u, C=%u\n", D, E, L, V, C); if((D - E) < (L / (C * V))) { return ID_DIP_SUMMARY; } return ID_DIP_VECTOR; } } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipSummaryC.nc000066400000000000000000000007141207233610700214170ustar00rootroot00000000000000 configuration DipSummaryC { provides interface DipDecision; uses interface DipSend as SummarySend; uses interface DipReceive as SummaryReceive; uses interface DipHelp; uses interface DipEstimates; } implementation { components DipSummaryP; DipDecision = DipSummaryP; SummarySend = DipSummaryP; SummaryReceive = DipSummaryP; DipHelp = DipSummaryP; DipEstimates = DipSummaryP; components RandomC; DipSummaryP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipSummaryP.nc000066400000000000000000000204111207233610700214300ustar00rootroot00000000000000 // Need to deal with non powers of base for the length of the hash #include module DipSummaryP { provides interface DipDecision; uses interface DipSend as SummarySend; uses interface DipReceive as SummaryReceive; uses interface DipHelp; uses interface DipEstimates; uses interface Random; } implementation { void findRangeShadow(dip_index_t* left, dip_index_t *right); uint32_t buildRange(dip_index_t left, dip_index_t right); uint32_t computeHash(dip_index_t left, dip_index_t right, dip_version_t* basedata, uint32_t salt); uint32_t computeBloomHash(dip_index_t left, dip_index_t right, dip_version_t* basedata, uint32_t salt); void splitRange(uint32_t info, dip_index_t* left, dip_index_t* right); void adjustEstimatesSame(dip_index_t left, dip_index_t right); void adjustEstimatesDiff(dip_index_t left, dip_index_t rightt, dip_version_t* data, uint32_t salt, uint32_t bHash); uint8_t commRate; // this can be combined with pairs_t in DIPVectorP maybe? dip_estimate_t shadowEstimates[UQCOUNT_DIP]; command uint8_t DipDecision.getCommRate() { return commRate; } command void DipDecision.resetCommRate() { commRate = 0; } command error_t DipDecision.send() { dip_index_t i, j, left, right; dip_version_t* allVers; dip_estimate_t* allEsts; uint32_t salt; dip_msg_t* dmsg; dip_summary_msg_t* dsmsg; dmsg = (dip_msg_t*) call SummarySend.getPayloadPtr(); if(dmsg == NULL) { return FAIL; } dmsg->type = ID_DIP_SUMMARY; dsmsg = (dip_summary_msg_t*) dmsg->content; allVers = call DipHelp.getAllVersions(); allEsts = call DipEstimates.getEstimates(); salt = call Random.rand32(); for(i = 0; i < UQCOUNT_DIP; i++) { shadowEstimates[i] = allEsts[i]; } for(i = 0; i < DIP_SUMMARY_ENTRIES_PER_PACKET; i += 3) { findRangeShadow(&left, &right); dbg("DipSummaryP", "Found range %u, %u\n", left, right); dsmsg->info[i] = buildRange(left, right); dsmsg->info[i+1] = computeHash(left, right, allVers, salt); dsmsg->info[i+2] = computeBloomHash(left, right, allVers, salt); for(j = left; j < right; j++) { shadowEstimates[j] = 0; } dbg("DipSummaryP", "Hash Entry: %08x %08x %08x\n", dsmsg->info[i], dsmsg->info[i+1], dsmsg->info[i+2]); } dsmsg->unitLen = DIP_SUMMARY_ENTRIES_PER_PACKET; dsmsg->salt = salt; for(i = 0; i < DIP_SUMMARY_ENTRIES_PER_PACKET; i += 3) { splitRange(dsmsg->info[i], &left, &right); adjustEstimatesSame(left, right); } return call SummarySend.send(sizeof(dip_msg_t) + sizeof(dip_summary_msg_t) + (sizeof(uint32_t) * DIP_SUMMARY_ENTRIES_PER_PACKET)); } event void SummaryReceive.receive(void* payload, uint8_t len) { dip_summary_msg_t* dsmsg; uint8_t unitlen; uint32_t salt, myHash; uint8_t i; dip_index_t left, right; dip_version_t* allVers; commRate = commRate + 1; dsmsg = (dip_summary_msg_t*) payload; unitlen = dsmsg->unitLen; salt = dsmsg->salt; allVers = call DipHelp.getAllVersions(); for(i = 0; i < unitlen; i += 3) { splitRange(dsmsg->info[i], &left, &right); myHash = computeHash(left, right, allVers, salt); //dbg("DipSummaryP", "Received Range: %u, %u\n", left, right); //dbg("DipSummaryP", "Received Hash: %08x\n", dsmsg->info[i+1]); //dbg("DipSummaryP", "My Hash: %08x\n", myHash); if(myHash != dsmsg->info[i+1]) { // hashes don't match adjustEstimatesDiff(left, right, allVers, salt, dsmsg->info[i+2]); } else { // hashes match adjustEstimatesSame(left, right); } } } void findRangeShadow(dip_index_t* left, dip_index_t *right) { dip_estimate_t est1; dip_estimate_t est2; dip_hashlen_t len; dip_index_t highIndex; dip_index_t i; dip_index_t LBound; dip_index_t RBound; uint16_t runEstSum; uint16_t highEstSum; // find highest estimate // initialize test highIndex = 0; est1 = shadowEstimates[0]; // Get the highest estimate key for(i = 0; i < UQCOUNT_DIP; i++) { est2 = shadowEstimates[i]; if(est2 > est1) { highIndex = i; est1 = est2; } } len = call DipEstimates.estimateToHashlength(est1); dbg("DipSummaryP","Highest key at %u with estimate %u and thus len %u\n", highIndex, est1, len); // initialize bounds on range if(highIndex < len - 1) { LBound = 0; } else { LBound = highIndex - len + 1; } if(highIndex + len > UQCOUNT_DIP) { RBound = UQCOUNT_DIP; } else { RBound = highIndex + len; } // adjust length if necessary if(RBound - LBound < len) { len = RBound - LBound; } // initialize first range highEstSum = 0; highIndex = LBound; for(i = LBound; i < LBound + len; i++) { est1 = shadowEstimates[i]; highEstSum += est1; } dbg("DipSummaryP", "First range: %u, %u = %u\n", LBound, LBound + len, highEstSum); // iterate through the range runEstSum = highEstSum; dbg("DipSummaryP", "Iterating from %u to %u with len %u\n", LBound, RBound, len); for(i = LBound ; i + len < RBound; i++) { est1 = shadowEstimates[i]; est2 = shadowEstimates[i + len]; //dbg("DipSummaryP", "i: %u\n", i); //dbg("DipSummaryP", "i+len: %u\n", i+len); runEstSum = runEstSum - est1 + est2; // dbg("Dissemination","Next sum: %u\n", runEstSum); if(runEstSum > highEstSum) { highEstSum = runEstSum; highIndex = i + 1; dbg("DipSummaryP", "Next range: %u, %u = %u\n", highIndex, highIndex + len, highEstSum); } } // and finish *left = highIndex; *right = highIndex + len; dbg("DipSummaryP","Final Range: %u, %u\n", *left, *right); } uint32_t buildRange(dip_index_t left, dip_index_t right) { uint32_t range; range = ((uint32_t) left << 16) | right; return range; } uint32_t computeHash(dip_index_t left, dip_index_t right, dip_version_t* basedata, uint32_t salt) { dip_index_t i; uint32_t hashValue = salt; //uint8_t *sequence; dip_version_t* sequence; uint32_t iterations; if(right <= left) return 0; //sequence = ((uint8_t*) (basedata + left)); sequence = (basedata + left); //iterations = (right - left - 1)*sizeof(dip_version_t); iterations = (right - left - 1); //dbg("DipSummaryP","Computing hash for %u, %u for %u iters\n", left, right, iterations); for(i = 0; i <= iterations; i++) { hashValue += sequence[i]; hashValue += (hashValue << 10); hashValue ^= (hashValue >> 6); } hashValue += (hashValue << 3); hashValue ^= (hashValue >> 11); hashValue += (hashValue << 15); return hashValue; } uint32_t computeBloomHash(dip_index_t left, dip_index_t right, dip_version_t* basedata, uint32_t salt) { dip_index_t i; uint32_t bit; uint32_t returnHash; uint32_t indexSeqPair[2]; returnHash = 0; for(i = left; i < right; i++) { indexSeqPair[0] = i; indexSeqPair[1] = basedata[i]; bit = computeHash(0, 2, indexSeqPair, salt) % 32; //dbg("DipSummaryP", "Bloom Hash: %u, %u, %u\n", indexSeqPair[0], indexSeqPair[1], bit); returnHash |= (1 << bit); } return returnHash; } void splitRange(uint32_t info, dip_index_t* left, dip_index_t* right) { *right = info & 0xFFFF; *left = (info >> 16) & 0xFFFF; } void adjustEstimatesSame(dip_index_t left, dip_index_t right) { dip_index_t i; for(i = left; i < right; i++) { call DipEstimates.decEstimateByIndex(i); } } void adjustEstimatesDiff(dip_index_t left, dip_index_t right, dip_version_t* data, uint32_t salt, uint32_t bHash) { dip_index_t i; dip_estimate_t est; dip_key_t key; uint32_t indexSeqPair[2]; uint32_t bit; est = call DipEstimates.hashlengthToEstimate(right - left) + 1; // + 1 to improve search for(i = left; i < right; i++) { indexSeqPair[0] = i; indexSeqPair[1] = data[i]; bit = computeHash(0, 2, indexSeqPair, salt) % 32; key = call DipHelp.indexToKey(i); if(bHash & (1 << bit)) { //set estimate only if better call DipEstimates.setSummaryEstimateByIndex(i, est); } else { dbg("DisseminationDebug", "Key %x definitely different\n", key); call DipEstimates.setVectorEstimate(key); } } } } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipTrickleMilliC.nc000066400000000000000000000053271207233610700223530ustar00rootroot00000000000000// $Id: DipTrickleMilliC.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Configuration that encapsulates the trickle timer implementation to * its needed services and initialization. For details on the working * of the parameters, please refer to Levis et al., "A Self-Regulating * Algorithm for Code Maintenance and Propagation in Wireless Sensor * Networks," NSDI 2004. * * @param l Lower bound of the time period in seconds. * @param h Upper bound of the time period in seconds. * @param k Redundancy constant. * @param count How many timers to provide. * * @author Philip Levis * @author Gilman Tolle * @date Jan 7 2006 */ configuration DipTrickleMilliC { provides interface DipTrickleTimer as TrickleTimer; } implementation { components DipTrickleMilliP as TrickleP; components MainC, RandomC; components new TimerMilliC() as PeriodicIntervalTimer; components new TimerMilliC() as SingleEventTimer; components LedsC; TrickleTimer = TrickleP; TrickleP.PeriodicIntervalTimer -> PeriodicIntervalTimer; TrickleP.SingleEventTimer -> SingleEventTimer; TrickleP.Random -> RandomC; TrickleP.Leds -> LedsC; MainC.SoftwareInit -> TrickleP; } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipTrickleMilliP.nc000066400000000000000000000101251207233610700223600ustar00rootroot00000000000000// $Id: DipTrickleMilliP.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Module that provides a service instance of trickle timers. For * details on the working of the parameters, please refer to Levis et * al., "A Self-Regulating Algorithm for Code Maintenance and * Propagation in Wireless Sensor Networks," NSDI 2004. * * @param l Lower bound of the time period in seconds. * @param h Upper bound of the time period in seconds. * @param k Redundancy constant. * @param count How many timers to provide. * * @author Philip Levis * @author Gilman Tolle * @date Jan 7 2006 */ #include #include module DipTrickleMilliP { provides { interface Init; interface DipTrickleTimer as TrickleTimer; } uses { interface Timer as PeriodicIntervalTimer; interface Timer as SingleEventTimer; interface Random; interface Leds; } } implementation { uint32_t period; command error_t Init.init() { period = DIP_TAU_HIGH; return SUCCESS; } /** * Start a trickle timer. Reset the counter to 0. */ command error_t TrickleTimer.start() { call PeriodicIntervalTimer.startOneShot(period); dbg("DipTrickleMilliP", "Starting trickle timer @ %s\n", sim_time_string()); return SUCCESS; } /** * Stop the trickle timer. This call sets the timer period to H. */ command void TrickleTimer.stop() { call PeriodicIntervalTimer.stop(); dbg("DipTrickleMilliP", "Stopping trickle timer @ %s\n", sim_time_string()); } /** * Reset the timer period to L. If called while the timer is running, * then a new interval (of length L) begins immediately. */ command void TrickleTimer.reset() { period = DIP_TAU_LOW; call PeriodicIntervalTimer.stop(); call PeriodicIntervalTimer.startOneShot(period); dbg("DipTrickleMilliP", "Resetting trickle timer @ %s\n", sim_time_string()); } command void TrickleTimer.maxInterval() { period = DIP_TAU_HIGH; } /** * The trickle timer has fired. Signaled if C > K. */ event void PeriodicIntervalTimer.fired() { uint32_t dtfire; dtfire = (call Random.rand16() % (period / 2)) + (period / 2); dbg("DipTrickleMilliP", "Scheduling Trickle event with %u\n", dtfire); call SingleEventTimer.startOneShot(dtfire); period = signal TrickleTimer.requestWindowSize(); call PeriodicIntervalTimer.startOneShot(period); //call Leds.led0Toggle(); } event void SingleEventTimer.fired() { dbg("Trickle", "Firing Trickle Event Timer\n"); signal TrickleTimer.fired(); } } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipVectorC.nc000066400000000000000000000007001207233610700212170ustar00rootroot00000000000000 configuration DipVectorC { provides interface DipDecision; uses interface DipSend as VectorSend; uses interface DipReceive as VectorReceive; uses interface DipHelp; uses interface DipEstimates; } implementation { components DipVectorP; DipDecision = DipVectorP; VectorSend = DipVectorP; VectorReceive = DipVectorP; DipHelp = DipVectorP; DipEstimates = DipVectorP; components RandomC; DipVectorP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipVectorP.nc000066400000000000000000000071311207233610700212410ustar00rootroot00000000000000 #include module DipVectorP { provides interface DipDecision; uses interface DipSend as VectorSend; uses interface DipReceive as VectorReceive; uses interface DipHelp; uses interface DipEstimates; uses interface Random; } implementation { uint8_t commRate = 0; typedef struct pairs_t { dip_estimate_t estimate; dip_key_t key; } pairs_t; pairs_t pairs[UQCOUNT_DIP]; // This is large memory footprint int myComparator(const void* a, const void* b); void randomizeRun(pairs_t* localPairs, dip_index_t length); command uint8_t DipDecision.getCommRate() { return commRate; } command void DipDecision.resetCommRate() { commRate = 0; } command error_t DipDecision.send() { dip_index_t i, j, r; dip_key_t sendkey; dip_estimate_t* ests; dip_msg_t* dmsg; dip_vector_msg_t* dvmsg; dmsg = call VectorSend.getPayloadPtr(); if(dmsg == NULL) { return FAIL; } ests = call DipEstimates.getEstimates(); // get all estimates and sort for(i = 0; i < UQCOUNT_DIP; i++) { pairs[i].key = call DipHelp.indexToKey(i); pairs[i].estimate = ests[i]; } qsort(pairs, UQCOUNT_DIP, sizeof(pairs_t), myComparator); j = pairs[0].estimate; r = 0; for(i = 0; i < UQCOUNT_DIP; i++) { if(pairs[i].estimate < j) { randomizeRun(&pairs[r], i - r); j = pairs[i].estimate; r = i; } } // randomize the last set randomizeRun(&pairs[r], UQCOUNT_DIP - r); // fill up the packet dmsg->type = ID_DIP_VECTOR; dvmsg = (dip_vector_msg_t*) dmsg->content; dvmsg->unitLen = DIP_VECTOR_ENTRIES_PER_PACKET; for(i = 0, j = 0; i < DIP_VECTOR_ENTRIES_PER_PACKET; i += 2, j++) { sendkey = pairs[j].key; dvmsg->vector[i] = sendkey; dvmsg->vector[i+1] = call DipHelp.keyToVersion(sendkey); // adjust estimate call DipEstimates.decEstimateByKey(sendkey); } return call VectorSend.send(sizeof(dip_msg_t) + sizeof(dip_vector_msg_t) + (DIP_VECTOR_ENTRIES_PER_PACKET * sizeof(uint32_t))); } event void VectorReceive.receive(void* payload, uint8_t len) { dip_vector_msg_t* dvmsg; uint8_t unitlen; uint8_t i; dip_key_t vectorkey; dip_version_t vectorver; dip_version_t myver; commRate = commRate + 1; dvmsg = (dip_vector_msg_t*) payload; unitlen = dvmsg->unitLen; for(i = 0; i < unitlen; i += 2) { vectorkey = dvmsg->vector[i]; vectorver = dvmsg->vector[i+1]; myver = call DipHelp.keyToVersion(vectorkey); // TODO: handle the invalid versions if(myver < vectorver) { call DipEstimates.setVectorEstimate(vectorkey); } else if(myver > vectorver) { call DipEstimates.setDataEstimate(vectorkey); } else if(myver == vectorver) { call DipEstimates.decEstimateByKey(vectorkey); } } } int myComparator(const void* a, const void* b) { const pairs_t *x = (const pairs_t *) a; const pairs_t *y = (const pairs_t *) b; if( x->estimate < y->estimate ) { return 1; } if( x->estimate > y->estimate ) { return -1; } return 0; } void randomizeRun(pairs_t* localPairs, dip_index_t length) { dip_index_t i,j; dip_index_t rLength = length; pairs_t temp; // don't move the last one for(i = 0; i < length - 1; i++, rLength--) { j = i + (call Random.rand16() % rLength); temp.key = localPairs[i].key; temp.estimate = localPairs[i].estimate; localPairs[i].key = localPairs[j].key; localPairs[i].estimate = localPairs[j].estimate; localPairs[j].key = temp.key; localPairs[j].estimate = temp.estimate; } } } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipVersionC.nc000066400000000000000000000004011207233610700214000ustar00rootroot00000000000000 #include configuration DipVersionC { provides interface DipHelp; provides interface DisseminationUpdate[dip_key_t key]; } implementation { components DipVersionP; DipHelp = DipVersionP; DisseminationUpdate = DipVersionP; } tinyos-2.1.2+dfsg/tos/lib/net/dip/DipVersionP.nc000066400000000000000000000050621207233610700214250ustar00rootroot00000000000000 module DipVersionP { provides interface DipHelp; provides interface DisseminationUpdate[dip_key_t key]; } implementation { int lessThan(const void* a, const void* b); // keys are ordered from smallest to largest. dip_key_t keys[UQCOUNT_DIP]; dip_version_t versions[UQCOUNT_DIP]; dip_index_t count = 0; command void DipHelp.registerKey(dip_key_t key) { dip_index_t i; keys[count] = key; count = count + 1; if(count == UQCOUNT_DIP) { qsort(keys, UQCOUNT_DIP, sizeof(dip_key_t), lessThan); dbg("DipVersionP","Key registration complete!\n"); for(i = 0; i < UQCOUNT_DIP; i++) { dbg("DipVersionP","Key %x\n", keys[i]); } } } command void DisseminationUpdate.change[dip_key_t key](dip_data_t* val) { dip_index_t i; dip_version_t ver; i = call DipHelp.keyToIndex(key); ver = versions[i]; // the version has node ID embedded in it, so need to do some shifts ver = ver >> 16; ver++; if ( ver == DIP_UNKNOWN_VERSION ) { ver++; } ver = ver << 16; ver += TOS_NODE_ID; versions[i] = ver; } command dip_index_t DipHelp.keyToIndex(dip_key_t key) { dip_index_t answer; dip_index_t i; answer = DIP_UNKNOWN_INDEX; // linear search for now since it's easier for(i = 0; i < UQCOUNT_DIP; i++) { if(keys[i] == key) { answer = i; break; } } dbg("DipVersionP", "Converting key %x to index %u\n", key, answer); return answer; } command dip_key_t DipHelp.indexToKey(dip_index_t ind) { return keys[ind]; } command dip_version_t DipHelp.keyToVersion(dip_key_t key) { dip_index_t i; i = call DipHelp.keyToIndex(key); if(i == DIP_UNKNOWN_INDEX) { return DIP_UNKNOWN_VERSION; } return versions[i]; } command void DipHelp.setVersion(dip_key_t key, dip_version_t ver) { dip_index_t i; i = call DipHelp.keyToIndex(key); versions[i] = ver; dbg("DipVersionP","Setting key %x at index %u to version %x\n", key, i, ver); } command dip_version_t* DipHelp.getAllVersions() { return versions; } int lessThan(const void* a, const void* b) { if ((*(dip_key_t*) a) < (*(dip_key_t*) b)) { return -1; } else if ((*(dip_key_t*) a) > (*(dip_key_t*) b)) { return 1; } return 0; } // binary search code which may be unstable /* dip_index_t answer; search_result = (dip_key_t*) bsearch(&key, &keys, UQCOUNT_DIP, sizeof(dip_key_t), lessThan); if(search_result == NULL) { return DIP_UNKNOWN_INDEX; } answer = search_result - keys; */ } tinyos-2.1.2+dfsg/tos/lib/net/dip/DisseminationC.nc000066400000000000000000000002331207233610700221270ustar00rootroot00000000000000 #include configuration DisseminationC { provides interface StdControl; } implementation { components DipLogicC; StdControl = DipLogicC; } tinyos-2.1.2+dfsg/tos/lib/net/dip/DisseminatorC.nc000066400000000000000000000056031207233610700217700ustar00rootroot00000000000000#include /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminatorC component holds and synchronizes a single value * of a chosen type, and identifies that value by a chosen 16-bit key. * Different nodes should use the same key for the same value. * * See TEP118 - Dissemination for details. * * @param t the type of the object that will be disseminated * @param key the 16-bit identifier of the disseminated object * * @author Gilman Tolle * @version $Revision: 1.2 $ $Date: 2008-01-03 21:30:35 $ */ generic configuration DisseminatorC(typedef t, dip_key_t key) { provides interface DisseminationValue; provides interface DisseminationUpdate; } implementation { enum { JUST_NEED_COUNT = UQ_DIP }; components new DisseminatorP(t, key); DisseminationValue = DisseminatorP.AppDisseminationValue; DisseminationUpdate = DisseminatorP.AppDisseminationUpdate; components LedsC; DisseminatorP.Leds -> LedsC; components DipLogicC; DisseminatorP.DipDisseminationUpdate -> DipLogicC.DisseminationUpdate[key]; components DipVersionC; DisseminatorP.DipHelp -> DipVersionC; components MainC; MainC.SoftwareInit -> DisseminatorP; components DipDataC; DipDataC.DisseminationUpdate[key] -> DisseminatorP.DataDisseminationUpdate; DipDataC.DisseminationValue[key] -> DisseminatorP.DataDisseminationValue; } tinyos-2.1.2+dfsg/tos/lib/net/dip/DisseminatorP.nc000066400000000000000000000077021207233610700220070ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminatorP module holds and synchronizes a single value of a * chosen type. * * See TEP118 - Dissemination for details. * * @param t the type of the object that will be disseminated * * @author Gilman Tolle * @version $Revision: 1.3 $ $Date: 2008-02-16 10:56:07 $ */ generic module DisseminatorP(typedef t, dip_key_t key) { provides interface DisseminationValue as AppDisseminationValue; provides interface DisseminationUpdate as AppDisseminationUpdate; provides interface DisseminationUpdate as DataDisseminationUpdate; provides interface DisseminationValue as DataDisseminationValue; provides interface Init; uses interface DisseminationUpdate as DipDisseminationUpdate; uses interface DipHelp; uses interface Leds; } implementation { dip_data_t valueCache; task void signalNewData() { signal AppDisseminationValue.changed(); } command error_t Init.init() { call DipHelp.registerKey(key); return SUCCESS; } // A sequence number is 32 bits. The top 16 bits are an incrementing // counter, while the bottom 16 bits are a unique node identifier. // But versions aren't stored here. command const t* AppDisseminationValue.get() { return (t*) &valueCache; } command void AppDisseminationValue.set( const t* val ) { memcpy( &valueCache, val, sizeof(t) ); // must signal here instead of posting task to prevent race condition signal AppDisseminationValue.changed(); } command void AppDisseminationUpdate.change( t* newVal ) { memcpy( &valueCache, newVal, sizeof(t) ); /* Increment the counter and append the local node ID later. */ /* DipLogicC doesn't care what the data actually is, it just wants the key, so we cast it recklessly */ call DipDisseminationUpdate.change((dip_data_t*)newVal); post signalNewData(); } command const dip_data_t* DataDisseminationValue.get() { return (dip_data_t*) &valueCache; } command void DataDisseminationValue.set( const dip_data_t* val ) { } command void DataDisseminationUpdate.change( dip_data_t* newVal ) { memcpy( &valueCache, newVal, sizeof(dip_data_t) ); // don't post the task, this came from the network signal AppDisseminationValue.changed(); } default event void AppDisseminationValue.changed() { } default event void DataDisseminationValue.changed() { } } tinyos-2.1.2+dfsg/tos/lib/net/dip/README000066400000000000000000000017311207233610700175600ustar00rootroot00000000000000 Title: Dip Author: Kaisen Lin (kaisenl@cs.ucsd.edu) ------------------ Dip is a dissemination protocol for detecting and disseminating new items in a network. It uses the same interfaces as Drip. It improves node density and item scalability by sending only one packet per interval rather than many. If the network is small and with very few data items, Drip may be more efficient due to Dip's advertisement overhead. Notes: ------ Data disseminated under Dip cannot be larger than 16 bytes. It was not designed for large data items, but rather for many small data items. Ties, like Drip, are handled with higher node IDs serving as tiebreakers. Key 0 is reserved, do not use it. There is minimal error checking, don't try to intentionally break it. (e.g. illegal keys, weird and wacky version numbers) Usage: ------ To use include the following in your Makefile: CFLAGS += -I$(TOSDIR)/lib/net CFLAGS += -I$(TOSDIR)/lib/net/dip CFLAGS += -I$(TOSDIR)/lib/net/dip/interfaces tinyos-2.1.2+dfsg/tos/lib/net/dip/interfaces/000077500000000000000000000000001207233610700210215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/dip/interfaces/DipDecision.nc000066400000000000000000000001661207233610700235400ustar00rootroot00000000000000 interface DipDecision { command uint8_t getCommRate(); command void resetCommRate(); command error_t send(); } tinyos-2.1.2+dfsg/tos/lib/net/dip/interfaces/DipEstimates.nc000066400000000000000000000010411207233610700237320ustar00rootroot00000000000000 #include interface DipEstimates { command dip_estimate_t* getEstimates(); command void decEstimateByIndex(dip_index_t i); command void decEstimateByKey(dip_key_t key); command dip_hashlen_t estimateToHashlength(dip_estimate_t est); command dip_estimate_t hashlengthToEstimate(dip_hashlen_t len); // special event to reset trickle timer too command void setDataEstimate(dip_key_t key); command void setVectorEstimate(dip_key_t key); command void setSummaryEstimateByIndex(dip_index_t ind, dip_estimate_t est); } tinyos-2.1.2+dfsg/tos/lib/net/dip/interfaces/DipHelp.nc000066400000000000000000000005251207233610700226720ustar00rootroot00000000000000 #include interface DipHelp { command void registerKey(dip_key_t key); command dip_index_t keyToIndex(dip_key_t key); command dip_key_t indexToKey(dip_index_t ind); command dip_version_t keyToVersion(dip_key_t key); command void setVersion(dip_key_t key, dip_version_t ver); command dip_version_t* getAllVersions(); } tinyos-2.1.2+dfsg/tos/lib/net/dip/interfaces/DipReceive.nc000066400000000000000000000001141207233610700233560ustar00rootroot00000000000000 interface DipReceive { event void receive(void* payload, uint8_t len); } tinyos-2.1.2+dfsg/tos/lib/net/dip/interfaces/DipSend.nc000066400000000000000000000002031207233610700226640ustar00rootroot00000000000000 interface DipSend { command error_t send(uint8_t len); command void* getPayloadPtr(); command uint8_t maxPayloadLength(); } tinyos-2.1.2+dfsg/tos/lib/net/dip/interfaces/DipTrickleTimer.nc000066400000000000000000000071211207233610700243770ustar00rootroot00000000000000// $Id: DipTrickleTimer.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * A network trickle timer. A trickle timer has a period in the range * [L, H]. After firing, the period is doubled, up to H. If the period * is P, then the timer is scheduled to fire in the interval [0.5P, P] * (the second half of a period). The period can be reset to L (the * smallest period, and therefore the highest frequency). * * The timer may be suppressed. If a user of the interface has heard * enough packets from other nodes that indicate its transmitting a * packet would be unncessarily redundant, then the timer does not * fire. The timer has a constant K and a counter C. If C >e; K, then * the timer does not fire. When an interval ends, C is reset to 0. * Calling incrementCounter increments C by one. * * For details, refer to Levis et al., "A Self-Regulating Algorithm * for Code Maintenance and Propagation in Wireless Sensor Networks," * NSDI 2004. The component providing this interface defines the * constants L, H, and K. * * @author Philip Levis * @date Jan 7 2006 */ interface DipTrickleTimer { /** * Start the trickle timer. At boot, the timer period is its maximum * value (H). If a protocol requires starting at the minimum value * (e.g., fast start), then it should call reset before * start. * * @return error_t SUCCESS if the timer was started, EBUSY if it is already * running, and FAIL otherwise. */ command error_t start(); /** * Stop the trickle timer. This call sets the timer period to H and * C to 0. */ command void stop(); /** * Reset the timer period to L. If called while the timer is * running, then a new interval (of length L) begins immediately. */ command void reset(); /** * The trickle timer has fired. Signaled if C > K. */ event void fired(); /** * Compute the window size based on Dip's estimates */ event uint32_t requestWindowSize(); /** * Resets the timer period to H. */ command void maxInterval(); } tinyos-2.1.2+dfsg/tos/lib/net/dip/interfaces/DipVersion.nc000066400000000000000000000001451207233610700234250ustar00rootroot00000000000000 #include interface DipVersion { command void setVersion(); command void incVersion(); }tinyos-2.1.2+dfsg/tos/lib/net/dip/qsort.c000066400000000000000000000105261207233610700202160ustar00rootroot00000000000000/*- * Copyright (c) 1992, 1993 * The Regents of the University of California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the University of * California, Berkeley and its contributors. * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ //#include typedef int cmp_t(const void *, const void *); static char *med3(char *, char *, char *, cmp_t *); static void swapfunc(char *, char *, int); #define min(a, b) ((a) < (b) ? (a) : (b)) /* * Qsort routine from Bentley & McIlroy's "Engineering a Sort Function". */ #define swapcode(TYPE, parmi, parmj, n) { \ int i = (n) / sizeof (TYPE); \ register TYPE *pi = (TYPE *) (parmi); \ register TYPE *pj = (TYPE *) (parmj); \ do { \ register TYPE t = *pi; \ *pi++ = *pj; \ *pj++ = t; \ } while (--i > 0); \ } static void swapfunc(char *a, char* b, int n) { swapcode(char, a, b, n) } #define swap(a, b) swapfunc(a, b, es) #define vecswap(a, b, n) if ((n) > 0) swapfunc(a, b, n) static char * med3(char* a, char* b, char* c, cmp_t* cmp) { return cmp(a, b) < 0 ? (cmp(b, c) < 0 ? b : (cmp(a, c) < 0 ? c : a )) :(cmp(b, c) > 0 ? b : (cmp(a, c) < 0 ? a : c )); } void qsort(void* a, size_t n, size_t es, cmp_t* cmp) { char *pa, *pb, *pc, *pd, *pl, *pm, *pn; int d, r, swap_cnt; loop: swap_cnt = 0; if (n < 7) { for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es) for (pl = pm; pl > (char *)a && cmp(pl - es, pl) > 0; pl -= es) swap(pl, pl - es); return; } pm = (char *)a + (n / 2) * es; if (n > 7) { pl = a; pn = (char *)a + (n - 1) * es; if (n > 40) { d = (n / 8) * es; pl = med3(pl, pl + d, pl + 2 * d, cmp); pm = med3(pm - d, pm, pm + d, cmp); pn = med3(pn - 2 * d, pn - d, pn, cmp); } pm = med3(pl, pm, pn, cmp); } swap(a, pm); pa = pb = (char *)a + es; pc = pd = (char *)a + (n - 1) * es; for (;;) { while (pb <= pc && (r = cmp(pb, a)) <= 0) { if (r == 0) { swap_cnt = 1; swap(pa, pb); pa += es; } pb += es; } while (pb <= pc && (r = cmp(pc, a)) >= 0) { if (r == 0) { swap_cnt = 1; swap(pc, pd); pd -= es; } pc -= es; } if (pb > pc) break; swap(pb, pc); swap_cnt = 1; pb += es; pc -= es; } if (swap_cnt == 0) { /* Switch to insertion sort */ for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es) for (pl = pm; pl > (char *)a && cmp(pl - es, pl) > 0; pl -= es) swap(pl, pl - es); return; } pn = (char *)a + n * es; r = min(pa - (char *)a, pb - pa); vecswap(a, pb - r, r); r = min(pd - pc, pn - pd - es); vecswap(pb, pn - r, r); if ((r = pb - pa) > es) qsort(a, r / es, es, cmp); if ((r = pd - pc) > es) { /* Iterate rather than recurse to save stack space */ a = pn - r; n = r / es; goto loop; } /* qsort(pn - r, r / es, es, cmp);*/ } tinyos-2.1.2+dfsg/tos/lib/net/drip/000077500000000000000000000000001207233610700170605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/drip/DisseminationC.nc000066400000000000000000000040521207233610700223140ustar00rootroot00000000000000#include /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminationC component is the top-level interface to the * dissemination protocol. StdControl controls all of the trickle * timers used for all of the keys. * * See TEP118 - Dissemination for details. * * @author Gilman Tolle * @version $Revision: 1.1 $ */ configuration DisseminationC { provides interface StdControl; } implementation { components DisseminationEngineP; StdControl = DisseminationEngineP; } tinyos-2.1.2+dfsg/tos/lib/net/drip/DisseminationCache.nc000066400000000000000000000041411207233610700231340ustar00rootroot00000000000000 /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminationCache interface connects each DisseminatorC * component to the DisseminationEngineC component. * * See TEP118 - Dissemination for details. * * @author Gilman Tolle * @version $Revision: 1.2 $ $Date: 2008-06-04 04:31:08 $ */ interface DisseminationCache { event error_t start(); event error_t stop(); command void* requestData( uint8_t* size ); command void storeData( void* COUNT(size) data, uint8_t size, uint32_t seqno ); command uint32_t requestSeqno(); event void newData(); } tinyos-2.1.2+dfsg/tos/lib/net/drip/DisseminationEngine.h000066400000000000000000000042121207233610700231640ustar00rootroot00000000000000#ifndef DISSEMINATION_ENGINE_H #define DISSEMINATION_ENGINE_H /* * Copyright (c) 2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /* * TODO: Add a tiebreaker and an application GUID to the header */ enum { AM_DISSEMINATION_MESSAGE = 0x60, AM_DISSEMINATION_PROBE_MESSAGE = 0x61, DISSEMINATION_SEQNO_UNKNOWN = 0, }; typedef nx_struct dissemination_message { nx_uint16_t key; nx_uint32_t seqno; nx_uint8_t (COUNT(0) data)[0]; // Deputy place-holder, field will probably be removed when we Deputize Drip } dissemination_message_t; typedef nx_struct dissemination_probe_message { nx_uint16_t key; } dissemination_probe_message_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/drip/DisseminationEngineImplP.nc000066400000000000000000000176341207233610700243130ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminationEngineImplP component implements the dissemination * logic. * * See TEP118 - Dissemination for details. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2007-09-14 00:22:18 $ */ #include module DisseminationEngineImplP { provides interface StdControl; uses { interface DisseminationCache[uint16_t key]; interface TrickleTimer[uint16_t key]; interface StdControl as DisseminatorControl[uint16_t id]; interface AMSend; interface Receive; interface AMSend as ProbeAMSend; interface Receive as ProbeReceive; interface Leds; } } implementation { enum { NUM_DISSEMINATORS = uniqueCount("DisseminationTimerC.TrickleTimer") }; message_t m_buf; bool m_running; bool m_bufBusy; void sendProbe( uint16_t key ); void sendObject( uint16_t key ); command error_t StdControl.start() { uint8_t i; for ( i = 0; i < NUM_DISSEMINATORS; i++ ) { call DisseminatorControl.start[ i ](); } m_running = TRUE; return SUCCESS; } command error_t StdControl.stop() { uint8_t i; for ( i = 0; i < NUM_DISSEMINATORS; i++ ) { call DisseminatorControl.stop[ i ](); } m_running = FALSE; return SUCCESS; } event error_t DisseminationCache.start[ uint16_t key ]() { error_t result = call TrickleTimer.start[ key ](); call TrickleTimer.reset[ key ](); return result; } event error_t DisseminationCache.stop[ uint16_t key ]() { call TrickleTimer.stop[ key ](); return SUCCESS; } event void DisseminationCache.newData[ uint16_t key ]() { sendObject( key ); // Note we reset even if not running. This means that if Drip is // off and new data is received, it will reset the timer but not // send the object. This means that the timer continues properly, // but transmissions are suppressed. This is a better approach than // just leaving the timer in its prior state. call TrickleTimer.reset[ key ](); } event void TrickleTimer.fired[ uint16_t key ]() { sendObject( key ); } void sendProbe( uint16_t key ) { dissemination_probe_message_t* dpMsg = (dissemination_probe_message_t*) call ProbeAMSend.getPayload( &m_buf, sizeof(dissemination_probe_message_t)); if (dpMsg != NULL) { m_bufBusy = TRUE; dpMsg->key = key; call ProbeAMSend.send( AM_BROADCAST_ADDR, &m_buf, sizeof( dissemination_probe_message_t ) ); } } void sendObject( uint16_t key ) { void* object; uint8_t objectSize = 0; dissemination_message_t* dMsg; // If Drip is not running or if the Drip buffer // is busy, do not send. This fixes Issue #12 in the // Google code tracker. -pal if ( !m_running || m_bufBusy ) { return; } dMsg = (dissemination_message_t*) call AMSend.getPayload( &m_buf, sizeof(dissemination_message_t) ); if (dMsg != NULL) { m_bufBusy = TRUE; dMsg->key = key; dMsg->seqno = call DisseminationCache.requestSeqno[ key ](); if ( dMsg->seqno != DISSEMINATION_SEQNO_UNKNOWN ) { object = call DisseminationCache.requestData[ key ]( &objectSize ); if ((objectSize + sizeof(dissemination_message_t)) > call AMSend.maxPayloadLength()) { objectSize = call AMSend.maxPayloadLength() - sizeof(dissemination_message_t); } memcpy( dMsg->data, object, objectSize ); } call AMSend.send( AM_BROADCAST_ADDR, &m_buf, sizeof( dissemination_message_t ) + objectSize ); } } event void ProbeAMSend.sendDone( message_t* msg, error_t error ) { m_bufBusy = FALSE; } event void AMSend.sendDone( message_t* msg, error_t error ) { m_bufBusy = FALSE; } event message_t* Receive.receive( message_t* msg, void* payload, uint8_t len ) { dissemination_message_t* dMsg = (dissemination_message_t*) payload; uint16_t key = dMsg->key; uint32_t incomingSeqno = dMsg->seqno; uint32_t currentSeqno = call DisseminationCache.requestSeqno[ key ](); if ( !m_running ) { return msg; } if ( currentSeqno == DISSEMINATION_SEQNO_UNKNOWN && incomingSeqno != DISSEMINATION_SEQNO_UNKNOWN ) { call DisseminationCache.storeData[ key ] ( dMsg->data, len - sizeof( dissemination_message_t ), incomingSeqno ); call TrickleTimer.reset[ key ](); return msg; } if ( incomingSeqno == DISSEMINATION_SEQNO_UNKNOWN && currentSeqno != DISSEMINATION_SEQNO_UNKNOWN ) { call TrickleTimer.reset[ key ](); return msg; } if ( (int32_t)( incomingSeqno - currentSeqno ) > 0 ) { call DisseminationCache.storeData[key] ( dMsg->data, len - sizeof(dissemination_message_t), incomingSeqno ); dbg("Dissemination", "Received dissemination value 0x%08x,0x%08x @ %s\n", (int)key, (int)incomingSeqno, sim_time_string()); call TrickleTimer.reset[ key ](); } else if ( (int32_t)( incomingSeqno - currentSeqno ) == 0 ) { call TrickleTimer.incrementCounter[ key ](); } else { // Still not sure which of these is the best. Immediate send for now. sendObject( key ); // call TrickleTimer.reset[ key ](); } return msg; } event message_t* ProbeReceive.receive( message_t* msg, void* payload, uint8_t len) { dissemination_probe_message_t* dpMsg = (dissemination_probe_message_t*) payload; if ( !m_running ) { return msg; } if ( call DisseminationCache.requestSeqno[ dpMsg->key ]() != DISSEMINATION_SEQNO_UNKNOWN ) { sendObject( dpMsg->key ); } return msg; } default command void* DisseminationCache.requestData[uint16_t key]( uint8_t* size ) { return NULL; } default command void DisseminationCache.storeData[uint16_t key]( void* data, uint8_t size, uint32_t seqno ) {} default command uint32_t DisseminationCache.requestSeqno[uint16_t key]() { return DISSEMINATION_SEQNO_UNKNOWN; } default command error_t TrickleTimer.start[uint16_t key]() { return FAIL; } default command void TrickleTimer.stop[uint16_t key]() { } default command void TrickleTimer.reset[uint16_t key]() { } default command void TrickleTimer.incrementCounter[uint16_t key]() { } default command error_t DisseminatorControl.start[uint16_t id]() { return FAIL; } default command error_t DisseminatorControl.stop[uint16_t id]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/net/drip/DisseminationEngineP.nc000066400000000000000000000061471207233610700234660ustar00rootroot00000000000000#include /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminationEngineP component retrieves values from the * DisseminatorP components and disseminates them over the radio. * * TODO: Hook DisseminationProbe up to the serial instead of the radio. * * See TEP118 - Dissemination for details. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2007-09-14 00:22:18 $ */ configuration DisseminationEngineP { provides interface StdControl; uses { interface DisseminationCache[uint16_t key]; interface TrickleTimer[uint16_t key]; interface StdControl as DisseminatorControl[uint16_t id]; } } implementation { components DisseminationEngineImplP; StdControl = DisseminationEngineImplP; DisseminationCache = DisseminationEngineImplP; TrickleTimer = DisseminationEngineImplP; DisseminatorControl = DisseminationEngineImplP; components new AMSenderC(AM_DISSEMINATION_MESSAGE) as DisseminationSendC; DisseminationEngineImplP.AMSend -> DisseminationSendC.AMSend; components new AMReceiverC(AM_DISSEMINATION_MESSAGE) as DisseminationReceiveC; DisseminationEngineImplP.Receive -> DisseminationReceiveC.Receive; components new AMSenderC(AM_DISSEMINATION_PROBE_MESSAGE) as DisseminationProbeSendC; DisseminationEngineImplP.ProbeAMSend -> DisseminationProbeSendC.AMSend; components new AMReceiverC(AM_DISSEMINATION_PROBE_MESSAGE) as DisseminationProbeReceiveC; DisseminationEngineImplP.ProbeReceive -> DisseminationProbeReceiveC.Receive; components NoLedsC; DisseminationEngineImplP.Leds -> NoLedsC; } tinyos-2.1.2+dfsg/tos/lib/net/drip/DisseminationTimerP.nc000066400000000000000000000041431207233610700233330ustar00rootroot00000000000000 /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /* * The DisseminationTimerP component maintains a set of Trickle timers * and is wired to DisseminationEngineC once for each DisseminatorC. * * See TEP118 - Dissemination for details. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2007-09-14 00:22:18 $ */ configuration DisseminationTimerP { provides interface TrickleTimer[uint8_t id]; } implementation { components new TrickleTimerMilliC(1, 1024, 1, uniqueCount("DisseminationTimerC.TrickleTimer")); TrickleTimer = TrickleTimerMilliC; } tinyos-2.1.2+dfsg/tos/lib/net/drip/DisseminatorC.nc000066400000000000000000000054211207233610700221500ustar00rootroot00000000000000#include /* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminatorC component holds and synchronizes a single value * of a chosen type, and identifies that value by a chosen 16-bit key. * Different nodes should use the same key for the same value. * * See TEP118 - Dissemination for details. * * @param t the type of the object that will be disseminated * @param key the 16-bit identifier of the disseminated object * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2007-09-14 00:22:18 $ */ generic configuration DisseminatorC(typedef t, uint16_t key) { provides interface DisseminationValue; provides interface DisseminationUpdate; } implementation { enum { TIMER_ID = unique("DisseminationTimerC.TrickleTimer") }; components new DisseminatorP(t); DisseminationValue = DisseminatorP; DisseminationUpdate = DisseminatorP; components DisseminationEngineP; DisseminationEngineP.DisseminationCache[key] -> DisseminatorP; DisseminationEngineP.DisseminatorControl[TIMER_ID] -> DisseminatorP; components DisseminationTimerP; DisseminationEngineP.TrickleTimer[key] -> DisseminationTimerP.TrickleTimer[TIMER_ID]; components LedsC; DisseminatorP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/net/drip/DisseminatorP.nc000066400000000000000000000100641207233610700221640ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** * The DisseminatorP module holds and synchronizes a single value of a * chosen type. * * See TEP118 - Dissemination for details. * * @param t the type of the object that will be disseminated * * @author Gilman Tolle * @version $Revision: 1.3 $ $Date: 2008-02-16 01:31:50 $ */ generic module DisseminatorP(typedef t) { provides interface StdControl; provides interface DisseminationValue; provides interface DisseminationUpdate; provides interface DisseminationCache; uses interface Leds; } implementation { t valueCache; bool m_running; // A sequence number is 32 bits. The top 16 bits are an incrementing // counter, while the bottom 16 bits are a unique node identifier. uint32_t seqno = DISSEMINATION_SEQNO_UNKNOWN; task void changedTask() { signal DisseminationValue.changed(); } command error_t StdControl.start() { error_t result = signal DisseminationCache.start(); if ( result == SUCCESS ) { m_running = TRUE; } return result; } command error_t StdControl.stop() { if ( !m_running ) { return EOFF; } m_running = FALSE; return signal DisseminationCache.stop(); } command const t* DisseminationValue.get() { return &valueCache; } command void DisseminationValue.set( const t* val ) { if (seqno == DISSEMINATION_SEQNO_UNKNOWN) { valueCache = *val; } } command void DisseminationUpdate.change( t* newVal ) { if ( !m_running ) { return; } memcpy( &valueCache, newVal, sizeof(t) ); /* Increment the counter and append the local node ID. */ seqno = seqno >> 16; seqno++; if ( seqno == DISSEMINATION_SEQNO_UNKNOWN ) { seqno++; } seqno = seqno << 16; seqno += TOS_NODE_ID; signal DisseminationCache.newData(); post changedTask(); } command void* DisseminationCache.requestData( uint8_t* size ) { *size = sizeof(t); return &valueCache; } command void DisseminationCache.storeData( void* data, uint8_t size, uint32_t newSeqno ) { memcpy( &valueCache, data, size < sizeof(t) ? size : sizeof(t) ); seqno = newSeqno; // We need to signal here and can't go through a task to // ensure that the update and changed event are atomic. // Otherwise, it is possible that storeData is called, // but before the task runs, the client calls set(). -pal signal DisseminationValue.changed(); } command uint32_t DisseminationCache.requestSeqno() { return seqno; } default event void DisseminationValue.changed() { } } tinyos-2.1.2+dfsg/tos/lib/net/le/000077500000000000000000000000001207233610700165225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/le/LinkEstimator.h000066400000000000000000000110121207233610700214530ustar00rootroot00000000000000/* $Id: LinkEstimator.h,v 1.5 2010-06-29 22:07:49 scipio Exp $ */ /* * Copyright (c) 2006 University of Southern California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef LINK_ESITIMATOR_H #define LINK_ESITIMATOR_H /* @ author Omprakash Gnawali @ Created: June 08, 2006 */ // Number of entries in the neighbor table #define NEIGHBOR_TABLE_SIZE 10 // Masks for the flag field in the link estimation header enum { // use last four bits to keep track of // how many footer entries there are NUM_ENTRIES_FLAG = 15, }; // The first byte of each outgoing packet is a control byte // Bits 4..7 reserved for routing and other protocols // Bits 0..3 is used by the link estimator to encode the // number of linkest entries in the packet // link estimator header added to // every message passing through the link estimator typedef nx_struct linkest_header { nx_uint8_t flags; nx_uint8_t seq; } linkest_header_t; // for outgoing link estimator message // so that we can compute bi-directional quality typedef nx_struct neighbor_stat_entry { nx_am_addr_t ll_addr; nx_uint8_t inquality; } neighbor_stat_entry_t; // we put the above neighbor entry in the footer typedef nx_struct linkest_footer { neighbor_stat_entry_t neighborList[1]; } linkest_footer_t; // Flags for the neighbor table entry enum { VALID_ENTRY = 0x1, // A link becomes mature after BLQ_PKT_WINDOW // packets are received and an estimate is computed MATURE_ENTRY = 0x2, // Flag to indicate that this link has received the // first sequence number INIT_ENTRY = 0x4, // The upper layer has requested that this link be pinned // Useful if we don't want to lose the root from the table PINNED_ENTRY = 0x8 }; // neighbor table entry typedef struct neighbor_table_entry { // link layer address of the neighbor am_addr_t ll_addr; // last beacon sequence number received from this neighbor uint8_t lastseq; // number of beacons received after last beacon estimator update // the update happens every BLQ_PKT_WINDOW beacon packets uint8_t rcvcnt; // number of beacon packets missed after last beacon estimator update uint8_t failcnt; // flags to describe the state of this entry uint8_t flags; // MAXAGE-inage gives the number of update rounds we haven't been able // update the inbound beacon estimator uint8_t inage; // MAXAGE-outage gives the number of update rounds we haven't received // the outbound link quality uint8_t outage; // inbound and outbound link qualities in the range [1..255] // 1 bad, 255 good uint8_t inquality; uint8_t outquality; // EETX for the link to this neighbor. This is the quality returned to // the users of the link estimator uint16_t eetx; // Number of data packets successfully sent (ack'd) to this neighbor // since the last data estimator update round. This update happens // every DLQ_PKT_WINDOW data packets uint8_t data_success; // The total number of data packets transmission attempt to this neighbor // since the last data estimator update round. uint8_t data_total; } neighbor_table_entry_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/le/LinkEstimator.nc000066400000000000000000000064341207233610700216400ustar00rootroot00000000000000/* $Id: LinkEstimator.nc,v 1.6 2010-06-29 22:07:49 scipio Exp $ */ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** Provides an additive quality measure for a neighbor. The * provided quality increases when the true link quality increases. * @author Rodrigo Fonseca * @author Omprakash Gnawali * @date $Date: 2010-06-29 22:07:49 $ */ /* Quality of a link is defined by the implementor of this interface. * It could be ETX, PRR, etc. */ interface LinkEstimator { /* get bi-directional link quality for link to the neighbor */ command uint16_t getLinkQuality(uint16_t neighbor); /* get quality of the link from neighbor to this node */ command uint16_t getReverseQuality(uint16_t neighbor); /* get quality of the link from this node to the neighbor */ command uint16_t getForwardQuality(uint16_t neighbor); /* insert this neighbor into the neighbor table */ command error_t insertNeighbor(am_addr_t neighbor); /* pin a neighbor so that it does not get evicted */ command error_t pinNeighbor(am_addr_t neighbor); /* pin a neighbor so that it does not get evicted */ command error_t unpinNeighbor(am_addr_t neighbor); /* called when an acknowledgement is received; sign of a successful data transmission; to update forward link quality */ command error_t txAck(am_addr_t neighbor); /* called when an acknowledgement is not received; could be due to data pkt or acknowledgement loss; to update forward link quality */ command error_t txNoAck(am_addr_t neighbor); /* called when the parent changes; clear state about data-driven link quality */ command error_t clearDLQ(am_addr_t neighbor); /* signal when this neighbor is evicted from the neighbor table */ event void evicted(am_addr_t neighbor); } tinyos-2.1.2+dfsg/tos/lib/net/le/LinkEstimatorC.nc000066400000000000000000000036501207233610700217400ustar00rootroot00000000000000/* $Id: LinkEstimatorC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ */ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** The public component of the link estimator that provides the * quality to and from a neighbor * * @author Rodrigo Fonseca * @date $Date: 2010-06-29 22:07:50 $ */ configuration LinkEstimatorC { provides { interface LinkEstimator; } } tinyos-2.1.2+dfsg/tos/lib/net/le/LinkEstimatorP.nc000066400000000000000000000575631207233610700217710ustar00rootroot00000000000000/* $Id: LinkEstimatorP.nc,v 1.17 2010-06-29 22:07:50 scipio Exp $ */ /* * Copyright (c) 2006 University of Southern California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* @ author Omprakash Gnawali @ Created: April 24, 2006 */ #include "LinkEstimator.h" module LinkEstimatorP { provides { interface StdControl; interface AMSend as Send; interface Receive; interface LinkEstimator; interface Init; interface Packet; interface CompareBit; } uses { interface AMSend; interface AMPacket as SubAMPacket; interface Packet as SubPacket; interface Receive as SubReceive; interface LinkPacketMetadata; interface Random; } } implementation { // configure the link estimator and some constants enum { // If the eetx estimate is below this threshold // do not evict a link EVICT_EETX_THRESHOLD = 55, // maximum link update rounds before we expire the link MAX_AGE = 6, // if received sequence number if larger than the last sequence // number by this gap, we reinitialize the link MAX_PKT_GAP = 10, BEST_EETX = 0, INVALID_RVAL = 0xff, INVALID_NEIGHBOR_ADDR = 0xff, // if we don't know the link quality, we need to return a value so // large that it will not be used to form paths VERY_LARGE_EETX_VALUE = 0xff, // decay the link estimate using this alpha // we use a denominator of 10, so this corresponds to 0.2 ALPHA = 9, // number of packets to wait before computing a new // DLQ (Data-driven Link Quality) DLQ_PKT_WINDOW = 5, // number of beacons to wait before computing a new // BLQ (Beacon-driven Link Quality) BLQ_PKT_WINDOW = 3, // largest EETX value that we feed into the link quality EWMA // a value of 60 corresponds to having to make six transmissions // to successfully receive one acknowledgement LARGE_EETX_VALUE = 60 }; // keep information about links from the neighbors neighbor_table_entry_t NeighborTable[NEIGHBOR_TABLE_SIZE]; // link estimation sequence, increment every time a beacon is sent uint8_t linkEstSeq = 0; // if there is not enough room in the packet to put all the neighbor table // entries, in order to do round robin we need to remember which entry // we sent in the last beacon uint8_t prevSentIdx = 0; // get the link estimation header in the packet linkest_header_t* getHeader(message_t* m) { return (linkest_header_t*)call SubPacket.getPayload(m, sizeof(linkest_header_t)); } // get the link estimation footer (neighbor entries) in the packet linkest_footer_t* getFooter(message_t* ONE m, uint8_t len) { // To get a footer at offset "len", the payload must be len + sizeof large. return (linkest_footer_t* ONE)(len + (uint8_t *)call Packet.getPayload(m,len + sizeof(linkest_footer_t))); } // add the link estimation header (seq no) and link estimation // footer (neighbor entries) in the packet. Call just before sending // the packet. uint8_t addLinkEstHeaderAndFooter(message_t * ONE msg, uint8_t len) { uint8_t newlen; linkest_header_t *hdr; linkest_footer_t *footer; uint8_t i, j, k; uint8_t maxEntries, newPrevSentIdx; dbg("LI", "newlen1 = %d\n", len); hdr = getHeader(msg); footer = getFooter(msg, len); maxEntries = ((call SubPacket.maxPayloadLength() - len - sizeof(linkest_header_t)) / sizeof(linkest_footer_t)); // Depending on the number of bits used to store the number // of entries, we can encode up to NUM_ENTRIES_FLAG using those bits if (maxEntries > NUM_ENTRIES_FLAG) { maxEntries = NUM_ENTRIES_FLAG; } dbg("LI", "Max payload is: %d, maxEntries is: %d\n", call SubPacket.maxPayloadLength(), maxEntries); j = 0; newPrevSentIdx = 0; for (i = 0; i < NEIGHBOR_TABLE_SIZE && j < maxEntries; i++) { uint8_t neighborCount; neighbor_stat_entry_t * COUNT(neighborCount) neighborLists; if(maxEntries <= NEIGHBOR_TABLE_SIZE) neighborCount = maxEntries; else neighborCount = NEIGHBOR_TABLE_SIZE; neighborLists = TCAST(neighbor_stat_entry_t * COUNT(neighborCount), footer->neighborList); k = (prevSentIdx + i + 1) % NEIGHBOR_TABLE_SIZE; if ((NeighborTable[k].flags & VALID_ENTRY) && (NeighborTable[k].flags & MATURE_ENTRY)) { neighborLists[j].ll_addr = NeighborTable[k].ll_addr; neighborLists[j].inquality = NeighborTable[k].inquality; newPrevSentIdx = k; dbg("LI", "Loaded on footer: %d %d %d\n", j, neighborLists[j].ll_addr, neighborLists[j].inquality); j++; } } prevSentIdx = newPrevSentIdx; hdr->seq = linkEstSeq++; hdr->flags = 0; hdr->flags |= (NUM_ENTRIES_FLAG & j); newlen = sizeof(linkest_header_t) + len + j*sizeof(linkest_footer_t); dbg("LI", "newlen2 = %d\n", newlen); return newlen; } // initialize the given entry in the table for neighbor ll_addr void initNeighborIdx(uint8_t i, am_addr_t ll_addr) { neighbor_table_entry_t *ne; ne = &NeighborTable[i]; ne->ll_addr = ll_addr; ne->lastseq = 0; ne->rcvcnt = 0; ne->failcnt = 0; ne->flags = (INIT_ENTRY | VALID_ENTRY); ne->inage = MAX_AGE; ne->outage = MAX_AGE; ne->inquality = 0; ne->outquality = 0; ne->eetx = 0; } // find the index to the entry for neighbor ll_addr uint8_t findIdx(am_addr_t ll_addr) { uint8_t i; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { if (NeighborTable[i].flags & VALID_ENTRY) { if (NeighborTable[i].ll_addr == ll_addr) { return i; } } } return INVALID_RVAL; } // find an empty slot in the neighbor table uint8_t findEmptyNeighborIdx() { uint8_t i; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { if (NeighborTable[i].flags & VALID_ENTRY) { } else { return i; } } return INVALID_RVAL; } // find the index to the worst neighbor if the eetx // estimate is greater than the given threshold uint8_t findWorstNeighborIdx(uint8_t thresholdEETX) { uint8_t i, worstNeighborIdx; uint16_t worstEETX, thisEETX; worstNeighborIdx = INVALID_RVAL; worstEETX = 0; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { if (!(NeighborTable[i].flags & VALID_ENTRY)) { dbg("LI", "Invalid so continuing\n"); continue; } if (!(NeighborTable[i].flags & MATURE_ENTRY)) { dbg("LI", "Not mature, so continuing\n"); continue; } if (NeighborTable[i].flags & PINNED_ENTRY) { dbg("LI", "Pinned entry, so continuing\n"); continue; } thisEETX = NeighborTable[i].eetx; if (thisEETX >= worstEETX) { worstNeighborIdx = i; worstEETX = thisEETX; } } if (worstEETX >= thresholdEETX) { return worstNeighborIdx; } else { return INVALID_RVAL; } } // update the quality of the link link: self->neighbor // this is found in the entries in the footer of incoming message void updateReverseQuality(am_addr_t neighbor, uint8_t outquality) { uint8_t idx; idx = findIdx(neighbor); if (idx != INVALID_RVAL) { NeighborTable[idx].outquality = outquality; NeighborTable[idx].outage = MAX_AGE; } } // update the EETX estimator // called when new beacon estimate is done // also called when new DEETX estimate is done void updateEETX(neighbor_table_entry_t *ne, uint16_t newEst) { ne->eetx = (ALPHA * ne->eetx + (10 - ALPHA) * newEst + 5)/10; } // update data driven EETX void updateDEETX(neighbor_table_entry_t *ne) { uint16_t estETX; if (ne->data_success == 0) { // if there were no successful packet transmission in the // last window, our current estimate is the number of failed // transmissions estETX = (ne->data_total - 1)* 10; } else { estETX = (10 * ne->data_total) / ne->data_success - 10; ne->data_success = 0; ne->data_total = 0; } updateEETX(ne, estETX); } // EETX (Extra Expected number of Transmission) // EETX = ETX - 1 // computeEETX returns EETX*10 uint8_t computeEETX(uint8_t q1) { uint16_t q; if (q1 > 0) { q = 2550 / q1 - 10; if (q > 255) { q = VERY_LARGE_EETX_VALUE; } return (uint8_t)q; } else { return VERY_LARGE_EETX_VALUE; } } // BidirETX = 1 / (q1*q2) // BidirEETX = BidirETX - 1 // computeBidirEETX return BidirEETX*10 uint8_t computeBidirEETX(uint8_t q1, uint8_t q2) { uint16_t q; if ((q1 > 0) && (q2 > 0)) { q = 65025u / q1; q = (10*q) / q2 - 10; if (q > 255) { q = LARGE_EETX_VALUE; } return (uint8_t)q; } else { return LARGE_EETX_VALUE; } } // update the inbound link quality by // munging receive, fail count since last update void updateNeighborTableEst(am_addr_t n) { uint8_t i, totalPkt; neighbor_table_entry_t *ne; uint8_t newEst; uint8_t minPkt; minPkt = BLQ_PKT_WINDOW; dbg("LI", "%s\n", __FUNCTION__); for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { ne = &NeighborTable[i]; if (ne->ll_addr == n) { if (ne->flags & VALID_ENTRY) { if (ne->inage > 0) ne->inage--; if (ne->outage > 0) ne->outage--; if ((ne->inage == 0) && (ne->outage == 0)) { ne->flags ^= VALID_ENTRY; ne->inquality = ne->outquality = 0; } else { dbg("LI", "Making link: %d mature\n", i); ne->flags |= MATURE_ENTRY; totalPkt = ne->rcvcnt + ne->failcnt; dbg("LI", "MinPkt: %d, totalPkt: %d\n", minPkt, totalPkt); if (totalPkt < minPkt) { totalPkt = minPkt; } if (totalPkt == 0) { ne->inquality = (ALPHA * ne->inquality) / 10; } else { newEst = (255 * ne->rcvcnt) / totalPkt; dbg("LI,LITest", " %hu: %hhu -> %hhu", ne->ll_addr, ne->inquality, (ALPHA * ne->inquality + (10-ALPHA) * newEst + 5)/10); ne->inquality = (ALPHA * ne->inquality + (10-ALPHA) * newEst + 5)/10; } ne->rcvcnt = 0; ne->failcnt = 0; } updateEETX(ne, computeBidirEETX(ne->inquality, ne->outquality)); } else { dbg("LI", " - entry %i is invalid.\n", (int)i); } } } } // we received seq from the neighbor in idx // update the last seen seq, receive and fail count // refresh the age void updateNeighborEntryIdx(uint8_t idx, uint8_t seq) { uint8_t packetGap; if (NeighborTable[idx].flags & INIT_ENTRY) { dbg("LI", "Init entry update\n"); NeighborTable[idx].lastseq = seq; NeighborTable[idx].flags &= ~INIT_ENTRY; } packetGap = seq - NeighborTable[idx].lastseq; dbg("LI", "updateNeighborEntryIdx: prevseq %d, curseq %d, gap %d\n", NeighborTable[idx].lastseq, seq, packetGap); NeighborTable[idx].lastseq = seq; NeighborTable[idx].rcvcnt++; NeighborTable[idx].inage = MAX_AGE; if (packetGap > 0) { NeighborTable[idx].failcnt += packetGap - 1; } if (packetGap > MAX_PKT_GAP) { NeighborTable[idx].failcnt = 0; NeighborTable[idx].rcvcnt = 1; NeighborTable[idx].outage = 0; NeighborTable[idx].outquality = 0; NeighborTable[idx].inquality = 0; } if (NeighborTable[idx].rcvcnt >= BLQ_PKT_WINDOW) { updateNeighborTableEst(NeighborTable[idx].ll_addr); } } // print the neighbor table. for debugging. void print_neighbor_table() { uint8_t i; neighbor_table_entry_t *ne; for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) { ne = &NeighborTable[i]; if (ne->flags & VALID_ENTRY) { dbg("LI,LITest", "%d:%d inQ=%d, inA=%d, outQ=%d, outA=%d, rcv=%d, fail=%d, biQ=%d\n", i, ne->ll_addr, ne->inquality, ne->inage, ne->outquality, ne->outage, ne->rcvcnt, ne->failcnt, computeBidirEETX(ne->inquality, ne->outquality)); } } } // print the packet. for debugging. void print_packet(message_t* msg, uint8_t len) { uint8_t i; uint8_t* b; b = (uint8_t *)msg->data; for(i=0; iself command uint16_t LinkEstimator.getReverseQuality(am_addr_t neighbor) { uint8_t idx; idx = findIdx(neighbor); if (idx == INVALID_RVAL) { return VERY_LARGE_EETX_VALUE; } else { if (NeighborTable[idx].flags & MATURE_ENTRY) { return computeEETX(NeighborTable[idx].inquality); } else { return VERY_LARGE_EETX_VALUE; } } } // return the quality of the link: self->neighbor command uint16_t LinkEstimator.getForwardQuality(am_addr_t neighbor) { uint8_t idx; idx = findIdx(neighbor); if (idx == INVALID_RVAL) { return VERY_LARGE_EETX_VALUE; } else { if (NeighborTable[idx].flags & MATURE_ENTRY) { return computeEETX(NeighborTable[idx].outquality); } else { return VERY_LARGE_EETX_VALUE; } } } // insert the neighbor at any cost (if there is a room for it) // even if eviction of a perfectly fine neighbor is called for command error_t LinkEstimator.insertNeighbor(am_addr_t neighbor) { uint8_t nidx; nidx = findIdx(neighbor); if (nidx != INVALID_RVAL) { dbg("LI", "insert: Found the entry, no need to insert\n"); return SUCCESS; } nidx = findEmptyNeighborIdx(); if (nidx != INVALID_RVAL) { dbg("LI", "insert: inserted into the empty slot\n"); initNeighborIdx(nidx, neighbor); return SUCCESS; } else { nidx = findWorstNeighborIdx(BEST_EETX); if (nidx != INVALID_RVAL) { dbg("LI", "insert: inserted by replacing an entry for neighbor: %d\n", NeighborTable[nidx].ll_addr); signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr); initNeighborIdx(nidx, neighbor); return SUCCESS; } } return FAIL; } // pin a neighbor so that it does not get evicted command error_t LinkEstimator.pinNeighbor(am_addr_t neighbor) { uint8_t nidx = findIdx(neighbor); if (nidx == INVALID_RVAL) { return FAIL; } NeighborTable[nidx].flags |= PINNED_ENTRY; return SUCCESS; } // pin a neighbor so that it does not get evicted command error_t LinkEstimator.unpinNeighbor(am_addr_t neighbor) { uint8_t nidx = findIdx(neighbor); if (nidx == INVALID_RVAL) { return FAIL; } NeighborTable[nidx].flags &= ~PINNED_ENTRY; return SUCCESS; } // called when an acknowledgement is received; sign of a successful // data transmission; to update forward link quality command error_t LinkEstimator.txAck(am_addr_t neighbor) { neighbor_table_entry_t *ne; uint8_t nidx = findIdx(neighbor); if (nidx == INVALID_RVAL) { return FAIL; } ne = &NeighborTable[nidx]; ne->data_success++; ne->data_total++; if (ne->data_total >= DLQ_PKT_WINDOW) { updateDEETX(ne); } return SUCCESS; } // called when an acknowledgement is not received; could be due to // data pkt or acknowledgement loss; to update forward link quality command error_t LinkEstimator.txNoAck(am_addr_t neighbor) { neighbor_table_entry_t *ne; uint8_t nidx = findIdx(neighbor); if (nidx == INVALID_RVAL) { return FAIL; } ne = &NeighborTable[nidx]; ne->data_total++; if (ne->data_total >= DLQ_PKT_WINDOW) { updateDEETX(ne); } return SUCCESS; } // called when the parent changes; clear state about data-driven link quality command error_t LinkEstimator.clearDLQ(am_addr_t neighbor) { neighbor_table_entry_t *ne; uint8_t nidx = findIdx(neighbor); if (nidx == INVALID_RVAL) { return FAIL; } ne = &NeighborTable[nidx]; ne->data_total = 0; ne->data_success = 0; return SUCCESS; } // user of link estimator calls send here // slap the header and footer before sending the message command error_t Send.send(am_addr_t addr, message_t* msg, uint8_t len) { uint8_t newlen; newlen = addLinkEstHeaderAndFooter(msg, len); dbg("LITest", "%s packet of length %hhu became %hhu\n", __FUNCTION__, len, newlen); dbg("LI", "Sending seq: %d\n", linkEstSeq); print_packet(msg, newlen); return call AMSend.send(addr, msg, newlen); } // done sending the message that originated by // the user of this component event void AMSend.sendDone(message_t* msg, error_t error ) { return signal Send.sendDone(msg, error); } // cascade the calls down command uint8_t Send.cancel(message_t* msg) { return call AMSend.cancel(msg); } command uint8_t Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command void* Send.getPayload(message_t* msg, uint8_t len) { return call Packet.getPayload(msg, len); } // called when link estimator generator packet or // packets from upper layer that are wired to pass through // link estimator is received void processReceivedMessage(message_t* ONE msg, void* COUNT_NOK(len) payload, uint8_t len) { uint8_t nidx; uint8_t num_entries; dbg("LI", "LI receiving packet, buf addr: %x\n", payload); print_packet(msg, len); if (call SubAMPacket.destination(msg) == AM_BROADCAST_ADDR) { linkest_header_t* hdr = getHeader(msg); linkest_footer_t* ONE footer; am_addr_t ll_addr; ll_addr = call SubAMPacket.source(msg); dbg("LI", "Got seq: %d from link: %d\n", hdr->seq, ll_addr); num_entries = hdr->flags & NUM_ENTRIES_FLAG; print_neighbor_table(); // update neighbor table with this information // find the neighbor // if found // update the entry // else // find an empty entry // if found // initialize the entry // else // find a bad neighbor to be evicted // if found // evict the neighbor and init the entry // else // we can not accommodate this neighbor in the table nidx = findIdx(ll_addr); if (nidx != INVALID_RVAL) { dbg("LI", "Found the entry so updating\n"); updateNeighborEntryIdx(nidx, hdr->seq); } else { nidx = findEmptyNeighborIdx(); if (nidx != INVALID_RVAL) { dbg("LI", "Found an empty entry\n"); initNeighborIdx(nidx, ll_addr); updateNeighborEntryIdx(nidx, hdr->seq); } else { nidx = findWorstNeighborIdx(EVICT_EETX_THRESHOLD); if (nidx != INVALID_RVAL) { dbg("LI", "Evicted neighbor %d at idx %d\n", NeighborTable[nidx].ll_addr, nidx); signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr); initNeighborIdx(nidx, ll_addr); } else { dbg("LI", "No room in the table\n"); } } } /* Graphical explanation of how we get to the head of the * footer in the following code * <---------------------- payloadLen -------------------> * ------------------------------------------------------- * linkest_header_t | payload | linkest_footer_t* ...| * ------------------------------------------------------- * ^ ^ ^ * | | | * subpayload | payloadEnd * | * payloadEnd - footersize*num footers */ if ((nidx != INVALID_RVAL) && (num_entries > 0)) { uint8_t payloadLen = call SubPacket.payloadLength(msg); void* COUNT_NOK(payloadLen) subPayload = call SubPacket.getPayload(msg, payloadLen); void* payloadEnd = subPayload + payloadLen; dbg("LI", "Number of footer entries: %d\n", num_entries); footer = TCAST(linkest_footer_t* COUNT(num_entries), (payloadEnd - (num_entries*sizeof(linkest_footer_t)))); { uint8_t i; am_addr_t my_ll_addr; neighbor_stat_entry_t * COUNT(num_entries) neighborLists; my_ll_addr = call SubAMPacket.address(); neighborLists = TCAST(neighbor_stat_entry_t * COUNT(num_entries), footer->neighborList); for (i = 0; i < num_entries; i++) { dbg("LI", "%d %d %d\n", i, neighborLists[i].ll_addr, neighborLists[i].inquality); if (neighborLists[i].ll_addr == my_ll_addr) { updateReverseQuality(ll_addr, neighborLists[i].inquality); } } } } print_neighbor_table(); } } // new messages are received here // update the neighbor table with the header // and footer in the message // then signal the user of this component event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { dbg("LI", "Received upper packet. Will signal up\n"); processReceivedMessage(msg, payload, len); return signal Receive.receive(msg, call Packet.getPayload(msg, call Packet.payloadLength(msg)), call Packet.payloadLength(msg)); } command void Packet.clear(message_t* msg) { call SubPacket.clear(msg); } // subtract the space occupied by the link estimation // header and footer from the incoming payload size command uint8_t Packet.payloadLength(message_t* msg) { linkest_header_t *hdr; hdr = getHeader(msg); return call SubPacket.payloadLength(msg) - sizeof(linkest_header_t) - sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags); } // account for the space used by header and footer // while setting the payload length command void Packet.setPayloadLength(message_t* msg, uint8_t len) { linkest_header_t *hdr; hdr = getHeader(msg); call SubPacket.setPayloadLength(msg, len + sizeof(linkest_header_t) + sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags)); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(linkest_header_t); } // application payload pointer is just past the link estimation header command void* Packet.getPayload(message_t* msg, uint8_t len) { void* payload = call SubPacket.getPayload(msg, len + sizeof(linkest_header_t)); if (payload != NULL) { payload += sizeof(linkest_header_t); } return payload; } } tinyos-2.1.2+dfsg/tos/lib/net/lqi/000077500000000000000000000000001207233610700167075ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/lqi/Collection.h000066400000000000000000000037101207233610700211540ustar00rootroot00000000000000/* $Id: Collection.h,v 1.3 2010-06-29 22:07:50 scipio Exp $ */ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * @author Rodrigo Fonseca * @date $Date: 2010-06-29 22:07:50 $ */ #ifndef COLLECTION_H #define COLLECTION_H enum { AM_COLLECTION_DATA = 20, AM_COLLECTION_CONTROL = 21, AM_COLLECTION_DEBUG = 22, }; typedef uint8_t collection_id_t; typedef nx_uint8_t nx_collection_id_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/lqi/CollectionC.nc000066400000000000000000000047631207233610700214410ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Philip Levis */ #include "MultiHopLqi.h" configuration CollectionC { provides { interface StdControl; interface Send[uint8_t client]; interface Receive[collection_id_t id]; interface Receive as Snoop[collection_id_t]; interface Intercept[collection_id_t id]; interface Packet; interface CollectionPacket; interface RootControl; interface RouteControl; } uses interface CollectionDebug; } implementation { components MultiHopLqiP as Router; components new SendVirtualizerP(NUM_LQI_CLIENTS); RouteControl = Router; Send = SendVirtualizerP; SendVirtualizerP.SubSend -> Router.Send; SendVirtualizerP.Packet -> Router; StdControl = Router; Receive = Router.Receive; RootControl = Router; Packet = Router; Snoop = Router.Snoop; Intercept = Router.Intercept; CollectionPacket = Router; Router.CollectionDebug = CollectionDebug; } tinyos-2.1.2+dfsg/tos/lib/net/lqi/CollectionSenderC.nc000066400000000000000000000041631207233610700225740ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The virtualized collection sender abstraction. * * @author Kyle Jamieson * @author Philip Levis * @date April 25 2006 * @see TinyOS Net2-WG */ #include generic configuration CollectionSenderC(collection_id_t collectid) { provides { interface Send; interface Packet; } } implementation { components new CollectionSenderP(collectid), CollectionC; Send = CollectionSenderP; Packet = CollectionC; CollectionSenderP.SubSend -> CollectionC.Send[unique(UQ_LQI_CLIENT)]; CollectionSenderP.CollectionPacket -> CollectionC; } tinyos-2.1.2+dfsg/tos/lib/net/lqi/CollectionSenderP.nc000066400000000000000000000044531207233610700226130ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Collection.h" generic module CollectionSenderP(collection_id_t collectid) { provides interface Send; uses interface Send as SubSend; uses interface CollectionPacket; } implementation { command error_t Send.send(message_t* msg, uint8_t len) { call CollectionPacket.setType(msg, collectid); return call SubSend.send(msg, len); } command error_t Send.cancel(message_t* msg) { return call SubSend.cancel(msg); } command void* Send.getPayload(message_t* m, uint8_t len) { return call SubSend.getPayload(m, len); } command uint8_t Send.maxPayloadLength() { return call SubSend.maxPayloadLength(); } event void SubSend.sendDone(message_t* m, error_t err) { signal Send.sendDone(m, err); } } tinyos-2.1.2+dfsg/tos/lib/net/lqi/LqiForwardingEngineP.nc000066400000000000000000000447341207233610700232630ustar00rootroot00000000000000// $Id: LqiForwardingEngineP.nc,v 1.16 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * A simple module that handles multihop packet movement. It accepts * messages from both applications and the network and does the necessary * interception and forwarding. * It interfaces to an algorithmic componenet via RouteSelect. It also acts * as a front end for RouteControl */ /** * @author Philip Buonadonna * @auihor Alec Woo * @author Crossbow Inc. * @author Philip Levis (port from TinyOS 1.x) */ #include "AM.h" #include "MultiHopLqi.h" #include "CollectionDebugMsg.h" module LqiForwardingEngineP { provides { interface Init; interface Send; interface Receive[collection_id_t id]; interface Receive as Snoop[collection_id_t]; interface Intercept[collection_id_t id]; interface CollectionPacket; interface RouteControl; interface LqiRouteStats; interface Packet; } uses { interface SplitControl; interface Receive as SubReceive; interface AMSend as SubSend; interface AMSend as SubSendMine; interface RouteControl as RouteSelectCntl; interface RouteSelect; interface Leds; interface Packet as SubPacket; interface AMPacket; interface RootControl; interface Random; interface PacketAcknowledgements; interface CollectionDebug; } } implementation { enum { FWD_QUEUE_SIZE = MHOP_QUEUE_SIZE, // Forwarding Queue EMPTY = 0xff, MAX_RETRIES = 5 }; /* Internal storage and scheduling state */ message_t FwdBuffers[FWD_QUEUE_SIZE]; message_t *FwdBufList[FWD_QUEUE_SIZE]; uint8_t FwdBufBusy[FWD_QUEUE_SIZE]; uint8_t iFwdBufHead, iFwdBufTail; uint16_t sendFailures = 0; uint8_t fwd_fail_count = 0; uint8_t my_fail_count = 0; bool fwdbusy = FALSE; bool running = FALSE; lqi_header_t* getHeader(message_t* msg) { return (lqi_header_t*) call SubPacket.getPayload(msg, sizeof(lqi_header_t)); } /*********************************************************************** * Initialization ***********************************************************************/ static void initialize() { int n; for (n=0; n < FWD_QUEUE_SIZE; n++) { FwdBufList[n] = &FwdBuffers[n]; FwdBufBusy[n] = 0; } iFwdBufHead = iFwdBufTail = 0; sendFailures = 0; } command error_t Init.init() { initialize(); return SUCCESS; } message_t* nextMsg(); static void forward(message_t* msg); event void SplitControl.startDone(error_t err) { message_t* nextToSend; if (err != SUCCESS) {return;} nextToSend = nextMsg(); running = TRUE; fwdbusy = FALSE; if (nextToSend != NULL) { forward(nextToSend); } } event void SplitControl.stopDone(error_t err) { if (err != SUCCESS) {return;} running = FALSE; } /*********************************************************************** * Commands and events ***********************************************************************/ command error_t Send.send(message_t* pMsg, uint8_t len) { len += sizeof(lqi_header_t); if (len > call SubPacket.maxPayloadLength()) { return ESIZE; } if (call RootControl.isRoot()) { return FAIL; } if (running == FALSE) { return EOFF; } call RouteSelect.initializeFields(pMsg); if (call RouteSelect.selectRoute(pMsg, 0) != SUCCESS) { return FAIL; } call PacketAcknowledgements.requestAck(pMsg); if (call SubSendMine.send(call AMPacket.destination(pMsg), pMsg, len) != SUCCESS) { sendFailures++; return FAIL; } return SUCCESS; } int8_t get_buff(){ uint8_t n; for (n=0; n < FWD_QUEUE_SIZE; n++) { uint8_t done = 0; atomic{ if(FwdBufBusy[n] == 0){ FwdBufBusy[n] = 1; done = 1; } } if(done == 1) return n; } return -1; } int8_t is_ours(message_t* ptr){ uint8_t n; for (n=0; n < FWD_QUEUE_SIZE; n++) { if(FwdBufList[n] == ptr){ return n; } } return -1; } static char* fields(message_t* msg) { #ifdef TOSSIM static char mbuf[1024]; lqi_header_t* hdr = getHeader(msg); sprintf(mbuf, "origin = %hu, seqno = %hu, oseqno = %hu, hopcount =%hu", hdr->originaddr, hdr->seqno, hdr->originseqno, hdr->hopcount); return mbuf; #else return NULL; #endif } static void forward(message_t* msg); static message_t* mForward(message_t* msg) { int8_t buf = get_buff(); dbg("LQI", " Asked to forward packet @%s:\t%s\n", sim_time_string(), fields(msg)); if (buf == -1) { dbg("LQI", "%s Dropped packet due to no space in queue.\n", __FUNCTION__); call CollectionDebug.logEvent(NET_C_FE_SEND_QUEUE_FULL); return msg; } if ((call RouteSelect.selectRoute(msg, 0)) != SUCCESS) { FwdBufBusy[(uint8_t)buf] = 0; call CollectionDebug.logEvent(NET_C_FE_NO_ROUTE); dbg("LQI", "%s Dropped packet due to no route.\n", __FUNCTION__); return msg; } else { message_t* newMsg = FwdBufList[(uint8_t)buf]; FwdBufList[(uint8_t)buf] = msg; forward(msg); return newMsg; } } static void forward(message_t* msg) { // Failures at the send level do not cause the seq. number space to be // rolled back properly. This is somewhat broken. if (fwdbusy || running == FALSE) { dbg("LQI", "%s forwarding busy or off, wait for later.\n", __FUNCTION__); return; } else { call PacketAcknowledgements.requestAck(msg); if (call SubSend.send(call AMPacket.destination(msg), msg, call SubPacket.payloadLength(msg)) == SUCCESS) { call CollectionDebug.logEventMsg(NET_C_DBG_1, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); dbg("LQI", "%s: Send to %hu success.\n", __FUNCTION__, call AMPacket.destination(msg)); fwdbusy = TRUE; } } } event message_t* SubReceive.receive(message_t* ONE msg, void* COUNT_NOK(len) payload, uint8_t len) { collection_id_t id = call CollectionPacket.getType(msg); payload += sizeof(lqi_header_t); len -= sizeof(lqi_header_t); call CollectionDebug.logEventMsg(NET_C_FE_RCV_MSG, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); if (call RootControl.isRoot()) { dbg("LQI,LQIDeliver", "LQI Root is receiving packet from node %hu @%s\n", getHeader(msg)->originaddr, sim_time_string()); return signal Receive.receive[id](msg, payload, len); } else if (call AMPacket.destination(msg) != call AMPacket.address()) { return msg; } else if (signal Intercept.forward[id](msg, payload, len)) { dbg("LQI,LQIDeliver", "LQI fwd is forwarding packet from node %hu @%s\n", getHeader(msg)->originaddr, sim_time_string()); return mForward(msg); } else { return msg; } } message_t* nextMsg() { int i; uint16_t inc = call Random.rand16() & 0xfff; for (i = 0; i < FWD_QUEUE_SIZE; i++) { int pindex = (i + inc) % FWD_QUEUE_SIZE; if (FwdBufBusy[pindex]) { return FwdBufList[pindex]; } } return NULL; } event void SubSend.sendDone(message_t* msg, error_t success) { int8_t buf; message_t* nextToSend; if (!call PacketAcknowledgements.wasAcked(msg) && call AMPacket.destination(msg) != TOS_BCAST_ADDR && fwd_fail_count < MAX_RETRIES){ call RouteSelect.selectRoute(msg, 1); call PacketAcknowledgements.requestAck(msg); if (call SubSend.send(call AMPacket.destination(msg), msg, call SubPacket.payloadLength(msg)) == SUCCESS) { dbg("LQI", "Packet not acked, retransmit @%s:\n\t%s\n", sim_time_string(), fields(msg)); call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_WAITACK, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); fwd_fail_count ++; return; } else { call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); dbg("LQI", "Packet not acked, retransmit fail @%s:\n\t%s\n", sim_time_string(), fields(msg)); sendFailures++; return; } } else if (fwd_fail_count >= MAX_RETRIES) { call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_FWD, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); dbg("LQI", "Packet failed:\t%s\n", fields(msg)); } else if (call PacketAcknowledgements.wasAcked(msg)) { dbg("LQI", "Packet acked:\t%s\n", fields(msg)); call CollectionDebug.logEventMsg(NET_C_FE_FWD_MSG, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); } fwd_fail_count = 0; buf = is_ours(msg); if (buf != -1) { FwdBufBusy[(uint8_t)buf] = 0; } nextToSend = nextMsg(); fwdbusy = FALSE; if (nextToSend != NULL) { forward(nextToSend); } dbg("LQI", "Packet not longer busy:\t%s\n", fields(msg)); } event void SubSendMine.sendDone(message_t* msg, error_t success) { if (!call PacketAcknowledgements.wasAcked(msg) && call AMPacket.destination(msg) != TOS_BCAST_ADDR && my_fail_count < MAX_RETRIES){ call RouteSelect.selectRoute(msg, 1); call PacketAcknowledgements.requestAck(msg); if (call SubSendMine.send(call AMPacket.destination(msg), msg, call SubPacket.payloadLength(msg)) == SUCCESS) { dbg("LQI", "Local packet not acked, retransmit (%hhu) @%s:\n\t%s\n", my_fail_count, sim_time_string(), fields(msg)); call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_WAITACK, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); my_fail_count ++; return; } else { call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); dbg("LQI", "Local packet not acked, retransmit fail @%s:\n\t%s\n", sim_time_string(), fields(msg)); sendFailures++; signal Send.sendDone(msg, FAIL); return; } } else if (my_fail_count >= MAX_RETRIES) { call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_SEND, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); dbg("LQI", "Local packet failed:\t%s\n", fields(msg)); } else if (call PacketAcknowledgements.wasAcked(msg)) { dbg("LQI", "Local packet acked:\t%s\n", fields(msg)); call CollectionDebug.logEventMsg(NET_C_FE_SENT_MSG, call CollectionPacket.getSequenceNumber(msg), call CollectionPacket.getOrigin(msg), call AMPacket.destination(msg)); } my_fail_count = 0; dbg("LQI", "Local send done with success %d\n", success); signal Send.sendDone(msg, success); } command uint16_t RouteControl.getParent() { return call RouteSelectCntl.getParent(); } command uint8_t RouteControl.getQuality() { return call RouteSelectCntl.getQuality(); } command uint8_t RouteControl.getDepth() { return call RouteSelectCntl.getDepth(); } command uint8_t RouteControl.getOccupancy() { uint16_t uiOutstanding = (uint16_t)iFwdBufTail - (uint16_t)iFwdBufHead; uiOutstanding %= FWD_QUEUE_SIZE; return (uint8_t)uiOutstanding; } command error_t RouteControl.setUpdateInterval(uint16_t Interval) { return call RouteSelectCntl.setUpdateInterval(Interval); } command error_t RouteControl.manualUpdate() { return call RouteSelectCntl.manualUpdate(); } command uint16_t LqiRouteStats.getSendFailures() { return sendFailures; } command void Packet.clear(message_t* msg) { } command void* Send.getPayload(message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } command uint8_t Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command error_t Send.cancel(message_t* m) { return FAIL; } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(lqi_header_t); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg, len + sizeof(lqi_header_t)); } command uint8_t Packet.maxPayloadLength() { return (call SubPacket.maxPayloadLength() - sizeof(lqi_header_t)); } command void* Packet.getPayload(message_t* msg, uint8_t len) { void* rval = call SubPacket.getPayload(msg, len + sizeof(lqi_header_t)); if (rval != NULL) { rval += sizeof(lqi_header_t); } return rval; } command am_addr_t CollectionPacket.getOrigin(message_t* msg) { lqi_header_t* hdr = getHeader(msg); return hdr->originaddr; } command void CollectionPacket.setOrigin(message_t* msg, am_addr_t addr) { lqi_header_t* hdr = getHeader(msg); hdr->originaddr = addr; } command collection_id_t CollectionPacket.getType(message_t* msg) { return getHeader(msg)->collectId; } command void CollectionPacket.setType(message_t* msg, collection_id_t id) { getHeader(msg)->collectId = id; } command uint8_t CollectionPacket.getSequenceNumber(message_t* msg) { lqi_header_t* hdr = getHeader(msg); return hdr->originseqno; } command void CollectionPacket.setSequenceNumber(message_t* msg, uint8_t seqno) { lqi_header_t* hdr = getHeader(msg); hdr->originseqno = seqno; } default event void Send.sendDone(message_t* pMsg, error_t success) {} default event message_t* Snoop.receive[collection_id_t id](message_t* pMsg, void* payload, uint8_t len) {return pMsg;} default event message_t* Receive.receive[collection_id_t id](message_t* pMsg, void* payload, uint8_t len) { return pMsg; } default event bool Intercept.forward[collection_id_t id](message_t* pMsg, void* payload, uint8_t len) { return 1; } /* Default implementations for CollectionDebug calls. * These allow CollectionDebug not to be wired to anything if debugging * is not desired. */ default command error_t CollectionDebug.logEvent(uint8_t type) { return SUCCESS; } default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) { return SUCCESS; } default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) { return SUCCESS; } default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) { return SUCCESS; } default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/lqi/LqiRouteStats.nc000066400000000000000000000077661207233610700220340ustar00rootroot00000000000000 /* Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provides information on how many send failures there have been. * @author Joe Polastre * @author Philip Levis (port from TinyOS 1.x) */ interface LqiRouteStats { command uint16_t getSendFailures(); } tinyos-2.1.2+dfsg/tos/lib/net/lqi/LqiRoutingEngineP.nc000066400000000000000000000302461207233610700226010ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * @author Gilman Tolle * @author Philip Levis (port to TinyOS 2.x) */ #include "MultiHopLqi.h" #include "CollectionDebugMsg.h" module LqiRoutingEngineP { provides { interface Init; interface StdControl; interface RouteSelect; interface RouteControl; interface RootControl; } uses { interface Timer; interface AMSend; interface Receive; interface Random; interface Packet; interface AMPacket; interface LqiRouteStats; interface CC2420Packet; interface Leds; interface CollectionDebug; } } implementation { enum { BASE_STATION_ADDRESS = 0, BEACON_PERIOD = 32, BEACON_TIMEOUT = 8, }; enum { ROUTE_INVALID = 0xff }; bool isRoot = FALSE; message_t msgBuf; bool msgBufBusy; uint16_t gbCurrentParent; uint16_t gbCurrentParentCost; uint16_t gbCurrentLinkEst; uint8_t gbCurrentHopCount; uint16_t gbCurrentCost; uint8_t gLastHeard; int16_t gCurrentSeqNo; int16_t gOriginSeqNo; uint16_t gUpdateInterval; uint8_t gRecentIndex; uint16_t gRecentPacketSender[MHOP_HISTORY_SIZE]; int16_t gRecentPacketSeqNo[MHOP_HISTORY_SIZE]; uint8_t gRecentOriginIndex; uint16_t gRecentOriginPacketSender[MHOP_HISTORY_SIZE]; int16_t gRecentOriginPacketSeqNo[MHOP_HISTORY_SIZE]; uint16_t adjustLQI(uint8_t val) { uint16_t result = (80 - (val - 50)); result = (((result * result) >> 3) * result) >> 3; return result; } lqi_header_t* getHeader(message_t* msg) { return (lqi_header_t*)call Packet.getPayload(msg, sizeof(lqi_header_t)); } lqi_beacon_msg_t* getBeacon(message_t* msg) { return (lqi_beacon_msg_t*)call Packet.getPayload(msg, sizeof(lqi_beacon_msg_t)); } task void SendRouteTask() { lqi_beacon_msg_t* bMsg = getBeacon(&msgBuf); uint8_t length = sizeof(lqi_beacon_msg_t); dbg("LQI","MultiHopRSSI Sending route update msg.\n"); if (gbCurrentParent != TOS_BCAST_ADDR) { dbg("LQI","MultiHopRSSI: Parent = %d\n", gbCurrentParent); } if (msgBufBusy) { post SendRouteTask(); return; } dbg("LQI","MultiHopRSSI: Current cost: %d.\n", gbCurrentParentCost + gbCurrentLinkEst); if (isRoot) { bMsg->parent = TOS_NODE_ID; bMsg->cost = 0; bMsg->originaddr = TOS_NODE_ID; bMsg->hopcount = 0; bMsg->seqno = gCurrentSeqNo++; } else { bMsg->parent = gbCurrentParent; bMsg->cost = gbCurrentParentCost + gbCurrentLinkEst; bMsg->originaddr = TOS_NODE_ID; bMsg->hopcount = gbCurrentHopCount; bMsg->seqno = gCurrentSeqNo++; } if (call AMSend.send(TOS_BCAST_ADDR, &msgBuf, length) == SUCCESS) { msgBufBusy = TRUE; call CollectionDebug.logEventRoute(NET_C_TREE_SENT_BEACON, bMsg->parent, 0, bMsg->cost); } } task void TimerTask() { uint8_t val; val = ++gLastHeard; if (!isRoot && (val > BEACON_TIMEOUT)) { gbCurrentParent = TOS_BCAST_ADDR; gbCurrentParentCost = 0x7fff; gbCurrentLinkEst = 0x7fff; gbCurrentHopCount = ROUTE_INVALID; gbCurrentCost = 0xfffe; } post SendRouteTask(); } command error_t Init.init() { int n; gRecentIndex = 0; for (n = 0; n < MHOP_HISTORY_SIZE; n++) { gRecentPacketSender[n] = TOS_BCAST_ADDR; gRecentPacketSeqNo[n] = 0; } gRecentOriginIndex = 0; for (n = 0; n < MHOP_HISTORY_SIZE; n++) { gRecentOriginPacketSender[n] = TOS_BCAST_ADDR; gRecentOriginPacketSeqNo[n] = 0; } gbCurrentParent = TOS_BCAST_ADDR; gbCurrentParentCost = 0x7fff; gbCurrentLinkEst = 0x7fff; gbCurrentHopCount = ROUTE_INVALID; gbCurrentCost = 0xfffe; gOriginSeqNo = 0; gCurrentSeqNo = 0; gUpdateInterval = BEACON_PERIOD; msgBufBusy = FALSE; return SUCCESS; } command error_t RootControl.setRoot() { call Leds.led2On(); call CollectionDebug.logEventRoute(NET_C_TREE_NEW_PARENT, TOS_NODE_ID, 0, 0); isRoot = TRUE; return SUCCESS; } command error_t RootControl.unsetRoot() { isRoot = FALSE; return SUCCESS; } command bool RootControl.isRoot() { return isRoot; } command error_t StdControl.start() { gLastHeard = 0; call Timer.startOneShot(call Random.rand32() % (1024 * gUpdateInterval)); return SUCCESS; } command error_t StdControl.stop() { call Timer.stop(); return SUCCESS; } command bool RouteSelect.isActive() { return TRUE; } command error_t RouteSelect.selectRoute(message_t* msg, uint8_t resend) { int i; lqi_header_t* hdr = getHeader(msg); if (isRoot) { return FAIL; } if (hdr->originaddr != TOS_NODE_ID && resend == 0) { // supress duplicate packets for (i = 0; i < MHOP_HISTORY_SIZE; i++) { if ((gRecentPacketSender[i] == call AMPacket.source(msg)) && (gRecentPacketSeqNo[i] == hdr->seqno)) { call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_CACHE_AT_SEND); dbg("LQI", "%s no route as this is a duplicate!\n", __FUNCTION__); return FAIL; } } gRecentPacketSender[gRecentIndex] = call AMPacket.source(msg); gRecentPacketSeqNo[gRecentIndex] = hdr->seqno; gRecentIndex = (gRecentIndex + 1) % MHOP_HISTORY_SIZE; // supress multihop cycles and try to break out of it for (i = 0; i < MHOP_HISTORY_SIZE; i++) { if ((gRecentOriginPacketSender[i] == hdr->originaddr) && (gRecentOriginPacketSeqNo[i] == hdr->originseqno)) { gbCurrentParentCost = 0x7fff; gbCurrentLinkEst = 0x7fff; gbCurrentParent = TOS_BCAST_ADDR; gbCurrentHopCount = ROUTE_INVALID; dbg("LQI", "%s no route as we are in a cycle!\n", __FUNCTION__); return FAIL; } } gRecentOriginPacketSender[gRecentOriginIndex] = hdr->originaddr; gRecentOriginPacketSeqNo[gRecentOriginIndex] = hdr->originseqno; gRecentOriginIndex = (gRecentOriginIndex + 1) % MHOP_HISTORY_SIZE; } if (resend == 0) { hdr->seqno = gCurrentSeqNo++; } dbg("LQI", "LQI setting destination to %hu and link quality ?\n", gbCurrentParent); call AMPacket.setDestination(msg, gbCurrentParent); return SUCCESS; } command error_t RouteSelect.initializeFields(message_t* msg) { lqi_header_t* header = getHeader(msg); header->originaddr = TOS_NODE_ID; header->originseqno = gOriginSeqNo++; header->seqno = gCurrentSeqNo; if (isRoot) { header->hopcount = 0; } else { header->hopcount = gbCurrentHopCount; } dbg("LQI", "LQI setting hopcount to %hhu\n", gbCurrentHopCount); return SUCCESS; } command uint8_t* RouteSelect.getBuffer(message_t* Msg, uint16_t* Len) { } command uint16_t RouteControl.getParent() { return gbCurrentParent; } command uint8_t RouteControl.getQuality() { return gbCurrentLinkEst; } command uint8_t RouteControl.getDepth() { return gbCurrentHopCount; } command uint8_t RouteControl.getOccupancy() { return 0; } command error_t RouteControl.setUpdateInterval(uint16_t Interval) { gUpdateInterval = Interval; return SUCCESS; } command error_t RouteControl.manualUpdate() { post SendRouteTask(); return SUCCESS; } event void Timer.fired() { call Leds.led0Toggle(); post TimerTask(); call Timer.startOneShot((uint32_t)1024 * gUpdateInterval + 1); } event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { lqi_beacon_msg_t* bMsg = (lqi_beacon_msg_t*)payload; am_addr_t source = call AMPacket.source(msg); uint8_t lqi = call CC2420Packet.getLqi(msg); call CollectionDebug.logEventRoute(NET_C_TREE_RCV_BEACON, source, 0, bMsg->cost); if (isRoot) { return msg; } else { dbg("LQI,LQIRoute", "LQI receiving routing beacon from %hu with LQI %hhu that advertises %hu.\n", source, lqi, bMsg->cost); if (source == gbCurrentParent) { // try to prevent cycles if (bMsg->parent != TOS_NODE_ID) { gLastHeard = 0; gbCurrentParentCost = bMsg->cost; gbCurrentLinkEst = adjustLQI(lqi); gbCurrentHopCount = bMsg->hopcount + 1; dbg("LQI,LQIRoute", " -- Not a loop\n"); } else { gLastHeard = 0; gbCurrentParentCost = 0x7fff; gbCurrentLinkEst = 0x7fff; gbCurrentParent = TOS_BCAST_ADDR; gbCurrentHopCount = ROUTE_INVALID; dbg("LQI,LQIRoute", " -- Detected a loop\n"); } } else { /* if the message is not from my parent, compare the message's cost + link estimate to my current cost, switch if necessary */ // make sure you don't pick a parent that creates a cycle if (((uint32_t) bMsg->cost + (uint32_t) adjustLQI(lqi) < ((uint32_t) gbCurrentParentCost + (uint32_t) gbCurrentLinkEst) - (((uint32_t) gbCurrentParentCost + (uint32_t) gbCurrentLinkEst) >> 2) ) && (bMsg->parent != TOS_NODE_ID)) { gLastHeard = 0; gbCurrentParent = call AMPacket.source(msg); gbCurrentParentCost = bMsg->cost; gbCurrentLinkEst = adjustLQI(lqi); gbCurrentHopCount = bMsg->hopcount + 1; call CollectionDebug.logEventRoute(NET_C_TREE_NEW_PARENT, gbCurrentParent, 0, gbCurrentParentCost + gbCurrentLinkEst); dbg("LQI,LQIRoute", " -- Not a cycle.\n"); } else { dbg("LQI,LQIRoute", " -- CYCLE.\n"); } } } dbg("LQI,LQIRoute", "Set my count to %hhu, my link to %hu and my cost to %hu.\n", gbCurrentHopCount, gbCurrentLinkEst, gbCurrentParentCost); return msg; } event void AMSend.sendDone(message_t* msg, error_t success) { msgBufBusy = FALSE; } /* Default implementations for CollectionDebug calls. * These allow CollectionDebug not to be wired to anything if debugging * is not desired. */ default command error_t CollectionDebug.logEvent(uint8_t type) { return SUCCESS; } default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) { return SUCCESS; } default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) { return SUCCESS; } default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) { return SUCCESS; } default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t etx) { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/net/lqi/MultiHopEngineM.nc000066400000000000000000000230411207233610700222350ustar00rootroot00000000000000// $Id: MultiHopEngineM.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * A simple module that handles multihop packet movement. It accepts * messages from both applications and the network and does the necessary * interception and forwarding. * It interfaces to an algorithmic componenet via RouteSelect. It also acts * as a front end for RouteControl */ /* * Authors: Philip Buonadonna, Alec Woo, Crossbow Inc. * */ #include "AM.h" #include "MultiHop.h" module MultiHopEngineM { provides { interface Init; interface Receive; interface Send; interface Packet; interface CollectionPacket; interface RouteControl; interface LqiRouteStats; } uses { interface Receive as SubReceive; interface AMSend as SubSend; interface RouteControl as RouteSelectCntl; interface RouteSelect; interface Leds; interface Packet as SubPacket; interface AMPacket; interface RootControl; interface PacketAcknowledgements; } } implementation { enum { FWD_QUEUE_SIZE = MHOP_QUEUE_SIZE, // Forwarding Queue EMPTY = 0xff }; /* Internal storage and scheduling state */ message_t FwdBuffers[FWD_QUEUE_SIZE]; message_t *FwdBufList[FWD_QUEUE_SIZE]; uint8_t FwdBufBusy[FWD_QUEUE_SIZE]; uint8_t iFwdBufHead, iFwdBufTail; uint16_t sendFailures = 0; uint8_t fail_count = 0; lqi_header_t* getHeader(message_t* msg) { return (lqi_header_t*) call SubPacket.getPayload(msg, NULL); } /*********************************************************************** * Initialization ***********************************************************************/ static void initialize() { int n; for (n=0; n < FWD_QUEUE_SIZE; n++) { FwdBufList[n] = &FwdBuffers[n]; FwdBufBusy[n] = 0; } iFwdBufHead = iFwdBufTail = 0; sendFailures = 0; } command error_t Init.init() { initialize(); return SUCCESS; } /*********************************************************************** * Commands and events ***********************************************************************/ command error_t Send.send(message_t* pMsg, uint8_t len) { len += sizeof(lqi_header_t); if (len > call SubPacket.maxPayloadLength()) { call Leds.led0On(); return ESIZE; } if (call RootControl.isRoot()) { call Leds.led1On(); return FAIL; } call RouteSelect.initializeFields(pMsg); if (call RouteSelect.selectRoute(pMsg, 0) != SUCCESS) { call Leds.led2On(); return FAIL; } call PacketAcknowledgements.requestAck(pMsg); if (call SubSend.send(call AMPacket.destination(pMsg), pMsg, len) != SUCCESS) { sendFailures++; return FAIL; } return SUCCESS; } int8_t get_buff(){ uint8_t n; for (n=0; n < FWD_QUEUE_SIZE; n++) { uint8_t done = 0; atomic{ if(FwdBufBusy[n] == 0){ FwdBufBusy[n] = 1; done = 1; } } if(done == 1) return n; } return -1; } int8_t is_ours(message_t* ptr){ uint8_t n; for (n=0; n < FWD_QUEUE_SIZE; n++) { if(FwdBufList[n] == ptr){ return n; } } return -1; } static message_t* mForward(message_t* msg) { message_t* newMsg = msg; int8_t buf = get_buff(); call Leds.led2Toggle(); if (call RootControl.isRoot()) { return signal Receive.receive(msg, call Packet.getPayload(msg, NULL), call Packet.payloadLength(msg)); } if (buf == -1) { dbg("LQI", "Dropped packet due to no space in queue.\n"); return msg; } if ((call RouteSelect.selectRoute(msg, 0)) != SUCCESS) { FwdBufBusy[(uint8_t)buf] = 0; return msg; } // Failures at the send level do not cause the seq. number space to be // rolled back properly. This is somewhat broken. call PacketAcknowledgements.requestAck(msg); if (call SubSend.send(call AMPacket.destination(msg), msg, call SubPacket.payloadLength(msg) == SUCCESS)) { newMsg = FwdBufList[(uint8_t)buf]; FwdBufList[(uint8_t)buf] = msg; } else{ FwdBufBusy[(uint8_t)buf] = 0; sendFailures++; } return newMsg; } event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { return mForward(msg); } event void SubSend.sendDone(message_t* msg, error_t success) { int8_t buf; if (!call PacketAcknowledgements.wasAcked(msg) && call AMPacket.destination(msg) != TOS_BCAST_ADDR && fail_count < 5){ call RouteSelect.selectRoute(msg, 1); if (call SubSend.send(call AMPacket.destination(msg), msg, call SubPacket.payloadLength(msg)) == SUCCESS) { fail_count ++; } else { sendFailures++; } } fail_count = 0; buf = is_ours(msg); if (buf != -1) { // Msg was from forwarding queue FwdBufBusy[(uint8_t)buf] = 0; } else { signal Send.sendDone(msg, success); } } command uint16_t RouteControl.getParent() { return call RouteSelectCntl.getParent(); } command uint8_t RouteControl.getQuality() { return call RouteSelectCntl.getQuality(); } command uint8_t RouteControl.getDepth() { return call RouteSelectCntl.getDepth(); } command uint8_t RouteControl.getOccupancy() { uint16_t uiOutstanding = (uint16_t)iFwdBufTail - (uint16_t)iFwdBufHead; uiOutstanding %= FWD_QUEUE_SIZE; return (uint8_t)uiOutstanding; } command error_t RouteControl.setUpdateInterval(uint16_t Interval) { return call RouteSelectCntl.setUpdateInterval(Interval); } command error_t RouteControl.manualUpdate() { return call RouteSelectCntl.manualUpdate(); } command uint16_t LqiRouteStats.getSendFailures() { return sendFailures; } command void Packet.clear(message_t* msg) { } command void* Send.getPayload(message_t* m) { return call Packet.getPayload(m, NULL); } command uint8_t Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command error_t Send.cancel(message_t* m) { return FAIL; } command void* Receive.getPayload(message_t* m, uint8_t* len) { return call Packet.getPayload(m, len); } command uint8_t Receive.payloadLength(message_t* m) { return call Packet.payloadLength(m); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(lqi_header_t); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg, len + sizeof(lqi_header_t)); } command uint8_t Packet.maxPayloadLength() { return (call SubPacket.maxPayloadLength() - sizeof(lqi_header_t)); } command void* Packet.getPayload(message_t* msg, uint8_t* len) { void* rval = call SubPacket.getPayload(msg, len); *len -= sizeof(lqi_header_t); rval += sizeof(lqi_header_t); return rval; } command am_addr_t CollectionPacket.getOrigin(message_t* msg) { lqi_header_t* hdr = getHeader(msg); return hdr->originaddr; } command void CollectionPacket.setOrigin(message_t* msg, am_addr_t addr) { lqi_header_t* hdr = getHeader(msg); hdr->originaddr = addr; } command collection_id_t CollectionPacket.getType(message_t* msg) { return 0; } command void CollectionPacket.setType(message_t* msg, collection_id_t id) {} command uint8_t CollectionPacket.getSequenceNumber(message_t* msg) { lqi_header_t* hdr = getHeader(msg); return hdr->originseqno; } command void CollectionPacket.setSequenceNumber(message_t* msg, uint8_t seqno) { lqi_header_t* hdr = getHeader(msg); hdr->originseqno = seqno; } default event void Send.sendDone(message_t* pMsg, error_t success) {} } tinyos-2.1.2+dfsg/tos/lib/net/lqi/MultiHopLqi.h000066400000000000000000000121731207233610700212730ustar00rootroot00000000000000// $Id: MultiHopLqi.h,v 1.6 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Buonadonna, Crossbow, Gilman Tolle * Date last modified: 2/20/03 * */ /** * @author Philip Buonadonna * @author Philip Levis (port from TinyOS 1.x) */ #ifndef _TOS_MULTIHOP_H #define _TOS_MULTIHOP_H #ifndef MHOP_QUEUE_SIZE #define MHOP_QUEUE_SIZE 2 #endif #ifndef MHOP_HISTORY_SIZE #define MHOP_HISTORY_SIZE 4 #endif #include "AM.h" #include "Collection.h" #define UQ_LQI_CLIENT "LqiForwardingEngineP.Send" enum { AM_LQI_BEACON_MSG = 0x73, AM_LQI_DATA_MSG = 0x74, AM_LQI_DEBUG = 0x75, AM_LQI_DEBUG_PACKET = 3, NUM_LQI_CLIENTS = uniqueCount(UQ_LQI_CLIENT), }; /* Fields of neighbor table */ typedef struct TOS_MHopNeighbor { uint16_t addr; // state provided by nbr uint16_t recv_count; // since last goodness update uint16_t fail_count; // since last goodness, adjusted by TOs uint16_t hopcount; uint8_t goodness; uint8_t timeouts; // since last recv } TOS_MHopNeighbor; typedef nx_struct lqi_data_msg { nx_uint16_t originaddr; nx_int16_t seqno; nx_int16_t originseqno; nx_uint16_t hopcount; nx_collection_id_t collectId; } lqi_header_t; typedef nx_struct lqi_beacon_msg { nx_uint16_t originaddr; nx_int16_t seqno; nx_int16_t originseqno; nx_uint16_t parent; nx_uint16_t cost; nx_uint16_t hopcount; } lqi_beacon_msg_t; typedef struct DBGEstEntry { uint16_t id; uint8_t hopcount; uint8_t sendEst; } DBGEstEntry; typedef struct DebugPacket { // uint16_t seqno; uint16_t estEntries; DBGEstEntry estList[0]; } DebugPacket; #endif /* _TOS_MULTIHOP_H */ tinyos-2.1.2+dfsg/tos/lib/net/lqi/MultiHopLqiP.nc000066400000000000000000000134411207233610700215630ustar00rootroot00000000000000/* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * @author Joe Polastre * @author Philip Levis (port to TinyOS 2.x) */ #include "MultiHopLqi.h" configuration MultiHopLqiP { provides { interface StdControl; interface Send; interface Receive[collection_id_t id]; interface Receive as Snoop[collection_id_t]; interface Intercept[collection_id_t id]; interface RouteControl; interface LqiRouteStats; interface Packet; interface RootControl; interface CollectionPacket; } uses interface CollectionDebug; } implementation { components LqiForwardingEngineP as Forwarder, LqiRoutingEngineP as Router; components new AMSenderC(AM_LQI_BEACON_MSG) as BeaconSender, new AMReceiverC(AM_LQI_BEACON_MSG) as BeaconReceiver, new AMSenderC(AM_LQI_DATA_MSG) as DataSender, new AMSenderC(AM_LQI_DATA_MSG) as DataSenderMine, new AMReceiverC(AM_LQI_DATA_MSG) as DataReceiver, new TimerMilliC(), NoLedsC, LedsC, RandomC, ActiveMessageC, MainC; MainC.SoftwareInit -> Forwarder; MainC.SoftwareInit -> Router; components CC2420ActiveMessageC as CC2420; StdControl = Router.StdControl; Receive = Forwarder.Receive; Send = Forwarder; Intercept = Forwarder.Intercept; Snoop = Forwarder.Snoop; RouteControl = Forwarder; LqiRouteStats = Forwarder; Packet = Forwarder; CollectionPacket = Forwarder; RootControl = Router; //CC2420.SubPacket -> DataSender; Forwarder.SplitControl -> ActiveMessageC; Forwarder.RouteSelectCntl -> Router.RouteControl; Forwarder.RouteSelect -> Router; Forwarder.SubSend -> DataSender; Forwarder.SubSendMine -> DataSenderMine; Forwarder.SubReceive -> DataReceiver; Forwarder.Leds -> LedsC; Forwarder.AMPacket -> ActiveMessageC; Forwarder.SubPacket -> ActiveMessageC; Forwarder.PacketAcknowledgements -> ActiveMessageC; Forwarder.RootControl -> Router; Forwarder.Random -> RandomC; Forwarder.CollectionDebug = CollectionDebug; Router.AMSend -> BeaconSender; Router.Receive -> BeaconReceiver; Router.Random -> RandomC; Router.Timer -> TimerMilliC; Router.LqiRouteStats -> Forwarder; Router.CC2420Packet -> CC2420; Router.AMPacket -> ActiveMessageC; Router.Packet -> ActiveMessageC; Router.Leds -> NoLedsC; Router.CollectionDebug = CollectionDebug; } tinyos-2.1.2+dfsg/tos/lib/net/lqi/RouteControl.nc000066400000000000000000000116071207233610700216750ustar00rootroot00000000000000// $Id: RouteControl.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Authors: Phil Buonadonna * Rev: $Id: RouteControl.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ */ /** * Control/Monitor interface to a routing component * @author Phil Buonadonna * @author Philip Levis (port from TinyOS 1.x) */ interface RouteControl { /** * Get this node's present parent address. * * @return The address of the parent */ command uint16_t getParent(); /** * Get this node's depth in the network * * @return The network depth. */ command uint8_t getDepth(); /** * Return length of the routing forwarding queue * * @return The number of outstanding entries in the queue. */ command uint8_t getOccupancy(); /** * Get a measure of goodness for the current parent * * @return A value between 0-256 where 256 represent the best * goodness */ command uint8_t getQuality(); /** * Set the routing componenets internal update interval. * * @param The duration, in seconds, of successive routing * updates. * * @return SUCCESS if the operation succeeded. */ command error_t setUpdateInterval(uint16_t Interval); /** * Queue a manual update of the routing state. This may or may * not include the transmission of a message. * * @return SUCCESS if a route update was queued. */ command error_t manualUpdate(); } tinyos-2.1.2+dfsg/tos/lib/net/lqi/RouteSelect.nc000066400000000000000000000131601207233610700214700ustar00rootroot00000000000000// $Id: RouteSelect.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Authors: Philip Levis * Date last modified: 8/12/02 * * The RouteSelect interface is part of the TinyOS ad-hoc routing * system architecture. The component that keeps track of routing * information and makes route selection decisions provides this * interface. When a Send component wants to send a packet, it passes * it to RouteSelect for its routing information to be filled in. This * way, the Send component is entirely unaware of the routing * header/footer structure. */ /** * Interface to a route selection component in the TinyOS ad-hoc * system architecture. * @author Philip Levis */ #include "AM.h" interface RouteSelect { /** * Whether there is currently a valid route. * * @return Whether there is a valid route. */ command bool isActive(); /** * Select a route and fill in all of the necessary routing * information to a packet. * * @param msg Message to select route for and fill in routing information. * * @return Whether a route was selected succesfully. On FAIL the * packet should not be sent. * */ command error_t selectRoute(message_t* ONE msg, uint8_t resend); /** * Given a TOS_MstPtr, initialize its routing fields to a known * state, specifying that the message is originating from this node. * This known state can then be used by selectRoute() to fill in * the necessary data. * * @param msg Message to select route for and fill in init data. * * @return Should always return SUCCESS. * */ command error_t initializeFields(message_t* msg); /** * Given a TinyOS message buffer, provide a pointer to the data * buffer within it that an application can use as well as its * length. Unlike the getBuffer of the Send interface, this can * be called freely and does not modify the buffer. * * @param msg The message to get the data region of. * * @param length Pointer to a field to store the length of the data region. * * @return A pointer to the data region. */ command uint8_t* getBuffer(message_t* msg, uint16_t* len); } tinyos-2.1.2+dfsg/tos/lib/net/rpl/000077500000000000000000000000001207233610700167175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/rpl/README000066400000000000000000000000001207233610700175650ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPL.h000066400000000000000000000236401207233610700175320ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLRankC.nc * @ author JeongGil Ko (John) */ /* * Copyright (c) 2010 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Yiwei Yao */ #ifndef RPL_H #define RPL_H #include /* SDH : NB : make sure divideRank * BLIP_L2_RETRIES does not overflow a uint16_t */ /* SDH : Default eviction threshold set to an etx of "3" -- these are pretty bad links. */ /* SDH : the aging parameter \alpha for the link estimator is currently hard-coded in RPLRankP.nc. Last I checked, it was set to 0.8. */ #ifndef RPL_OF_MRHOF // Threshold at which to evict parent #define minHopRankIncrease 1 // Divisor for the metric (for fixed-point repr) #define divideRank 10 #define INIT_ETX divideRank #define ETX_THRESHOLD (3 * divideRank) #else // MRHOF #define minHopRankIncrease 128 #define divideRank 128 #define INIT_ETX divideRank //448 #define ETX_THRESHOLD (3 * divideRank) #endif // MRHOF #define MAX_PARENT 20 #define MAX_HOPCOUNT 30 #define RPL_QUEUE_SIZE 5 #define RPL_MAX_SOURCEROUTE 10 enum { RPL_DODAG_METRIC_CONTAINER_TYPE = 2, RPL_DST_PREFIX_TYPE = 3, RPL_DODAG_CONFIG_TYPE = 4, RPL_TARGET_TYPE = 5, RPL_TRANSIT_INFORMATION_TYPE = 6, RPL_MOP_No_Downward = 0, RPL_MOP_No_Storing = 1, RPL_MOP_Storing_No_Multicast = 2, RPL_MOP_Storing_With_Multicast = 3, RPL_DIO_TYPE_METRIC = 2, RPL_DIO_TYPE_ROUTING = 3, RPL_DIO_TYPE_DODAG = 4, RPL_DIO_TYPE_PREFIX = 8, RPL_ROUTE_METRIC_ETX = 7, RPLOF_OCP_OF0 = 0, RPLOF_OCP_MRHOF = 1, }; enum { RPL_IFACE = ROUTE_IFACE_154, RPL_HBH_RANK_TYPE = 0x6b, /* per draft-ietf-6man-rpl-option-02 */ }; struct icmpv6_header_t { uint8_t type; uint8_t code; nx_uint16_t checksum; }__attribute__((packed)); struct dis_base_t { struct icmpv6_header_t icmpv6; nx_uint16_t reserved; }; struct rpl_instance_id { /* Global RPLInstance ID */ uint8_t id; }__attribute__((packed)); struct transit_info_option_t { uint8_t type; uint8_t option_length; uint8_t path_sequence; uint8_t path_control; uint32_t path_lifetime; struct in6_addr parent_address; }; struct target_option_t { uint8_t type; uint8_t option_length; uint8_t reserved; uint8_t prefix_length; struct in6_addr target_prefix; }; struct dao_base_t { struct icmpv6_header_t icmpv6; struct rpl_instance_id instance_id; // used to be RPLinstanceID uint16_t k_bit : 1; uint16_t d_bit : 1; uint16_t flags : 6; uint16_t reserved : 8; uint8_t DAOsequence; struct in6_addr dodagID; struct target_option_t target_option; struct transit_info_option_t transit_info_option; }__attribute__((packed)); struct dio_base_t { struct icmpv6_header_t icmpv6; struct rpl_instance_id instance_id; // used to be instanceID nx_uint8_t version; //used to be sequence nx_uint16_t dagRank; uint8_t flags; uint8_t dtsn; nx_uint16_t reserved; struct in6_addr dodagID; // was dagID }__attribute__((packed)); struct dio_body_t{ // type 2 ; contains metrics uint8_t type; uint8_t container_len; //uint8_t *metric_data; }; struct dio_dodag_config_t{ // type 4 ; contains DODAG configuration nx_uint8_t type; nx_uint8_t length; uint8_t flags : 4; uint8_t A : 1; uint8_t PCS : 3; nx_uint8_t DIOIntDoubl; nx_uint8_t DIOIntMin; nx_uint8_t DIORedun; nx_uint16_t MaxRankInc; nx_uint16_t MinHopRankInc; nx_uint16_t ocp; nx_uint8_t reserved; nx_uint8_t default_lifetime; nx_uint16_t lifetime_unit; }; struct dio_metric_header_t{ uint8_t routing_obj_type; uint8_t reserved : 2; uint8_t R_flag : 1; uint8_t G_flag : 1; uint8_t A_flag : 2; uint8_t O_flag : 1; uint8_t C_flag : 1; nx_uint16_t object_len; }; struct dio_etx_t{ nx_uint16_t etx; }; struct dio_latency_t{ float latency; }; struct dio_prefix_t{ uint8_t type; nx_uint16_t suboption_len; uint8_t reserved : 3; uint8_t preference : 2; uint8_t reserved2 : 3; nx_uint32_t lifetime; uint8_t prefix_len; struct in6_addr prefix; }; struct rpl_route { uint8_t next_header; uint8_t hdr_ext_len; uint8_t routing_type; uint8_t segments_left; uint8_t compr : 4; uint8_t pad : 4; uint8_t reserved; uint16_t reserved1; struct in6_addr addr[RPL_MAX_SOURCEROUTE]; }; /* Necessary constants for RPL*/ uint16_t ROOT_RANK = 1; enum { BASE_RANK = 0, INFINITE_RANK = 0xFFFF, RPL_DEFAULT_INSTANCE = 0, NUMBER_OF_PARENTS = 10, DIS_INTERVAL = 3*1024U, DEFAULT_LIFETIME = 1024L * 60 * 20, // 20 mins }; /*RFC defined parameters*/ enum { ICMPV6_TYPE = 58, }; enum { ICMPV6_CODE_DIS = 0x00, ICMPV6_CODE_DIO = 0x01, ICMPV6_CODE_DAO = 0x02, }; enum { DIO_BASE_FLAG_GRD = 0, DIO_BASE_FLAG_DA_TRIGGER = 1, DIO_BASE_FLAG_DA_SUPPORT = 2, DIO_BASE_FLAG_PREF_5 = 5, DIO_BASE_FLAG_PREF_6 = 6, DIO_BASE_FLAG_PREF_7 = 7, }; enum { DIO_BASE_OPT_PAD1 = 0, DIO_BASE_OPT_PADN = 1, DIO_BASE_OPT_DAG_METRIC = 2, DIO_BASE_OPT_DST_PREFIX = 3, DIO_BASE_OPT_DAG_TIMER_CONFIG = 4, }; ///////////////////////// for forwarding engine ////////////////////////////// typedef struct { struct in6_addr next_hop; uint8_t* data; } rpl_data_packet_t; typedef struct { struct ip6_hdr iphdr; uint8_t retries; rpl_data_packet_t packet; } queue_entry_t; typedef struct { struct ip6_packet s_pkt; struct dao_base_t dao_base; struct ip_iovec v[1]; } dao_entry_t; typedef struct { struct in6_addr nodeID; uint8_t interfaceID; uint8_t DAOsequence; //uint16_t DAOrank; uint32_t DAOlifetime; uint8_t routeTag; uint8_t RRlength; uint8_t prefixLength; struct in6_addr prefix; uint8_t* RRStack; } dao_table_entry; typedef struct { struct in6_addr nodeID; uint16_t successTx; uint16_t totalTx; uint16_t etx; } parentTableEntryDAO; typedef struct { route_key_t key; uint32_t lifetime; } downwards_table_t; nx_struct nx_ip6_ext { nx_uint8_t ip6e_nxt; nx_uint8_t ip6e_len; }; /* draft-ietf-6man-rpl-option-01 */ typedef nx_struct { nx_struct nx_ip6_ext ip6_ext_outer; nx_struct nx_ip6_ext ip6_ext_inner; nx_uint8_t bitflag; // nx_struct rpl_instance_id instance_id; // used to be instanceID nx_uint8_t instance_id; nx_uint16_t senderRank; } __attribute__((packed)) rpl_data_hdr_t ; #define RPL_DATA_O_BIT_MASK 0x80 #define RPL_DATA_O_BIT_SHIFT 7 #define RPL_DATA_R_BIT_MASK 0x40 #define RPL_DATA_R_BIT_SHIFT 6 #define RPL_DATA_F_BIT_MASK 0x20 #define RPL_DATA_F_BIT_SHIFT 5 ////////////////////////////////////////////////////////////////////////////// /////////////////////// for rank component /////////////////////////////////// typedef struct { struct in6_addr parentIP; uint16_t rank; //uint16_t successNum; //uint16_t totalNum; uint16_t etx; uint16_t etx_hop; //float latency; bool valid; } parent_t; struct dio_dest_prefix_t { uint8_t type; uint16_t length; uint8_t* data; }; #define DIO_GROUNDED_MASK 0x80 #define DIO_MOP_MASK 0x3c #define DIO_MOP_SHIFT 3 #define DIO_PREF_MASK 0x07 #define DIO_PREF_SHIFT 0 #endif tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLDAORoutingEngine.nc000066400000000000000000000034311207233610700227210ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLDAORoutingEngine.nc * @ author JeongGil Ko (John) */ #include interface RPLDAORoutingEngine{ command error_t startDAO(); command bool getStoreState(); command void newParent(); } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLDAORoutingEngineC.nc000066400000000000000000000060241207233610700230250ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLDAORoutingEngineC.nc * @ author JeongGil Ko (John) */ #include #include #include #include configuration RPLDAORoutingEngineC{ provides { interface StdControl; interface RPLDAORoutingEngine; } uses { interface IP as ICMP_RA[uint8_t code]; } } implementation{ components new RPLDAORoutingEngineP() as DAORouting; components MainC, RandomC; components new TimerMilliC() as DelayDAOTimer; components new TimerMilliC() as GenerateDAOTimer; components new TimerMilliC() as RemoveTimer; components IPAddressC; components RPLRankC; components RPLRoutingEngineC; components IPStackC; StdControl = DAORouting; RPLDAORoutingEngine = DAORouting; DAORouting.IP_DAO = ICMP_RA[ICMPV6_CODE_DAO]; DAORouting.DelayDAOTimer -> DelayDAOTimer; DAORouting.GenerateDAOTimer -> GenerateDAOTimer; DAORouting.RemoveTimer -> RemoveTimer; DAORouting.Random -> RandomC; DAORouting.IPAddress -> IPAddressC; DAORouting.RPLRouteInfo -> RPLRoutingEngineC; DAORouting.RootControl -> RPLRoutingEngineC; DAORouting.ForwardingTable -> IPStackC; components new QueueC(dao_entry_t*, RPL_QUEUE_SIZE) as SendQueueP; DAORouting.SendQueue -> SendQueueP; components new PoolC(dao_entry_t, RPL_QUEUE_SIZE) as SendPoolP; DAORouting.SendPool -> SendPoolP; components IPPacketC; DAORouting.IPPacket -> IPPacketC; components LedsC; DAORouting.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLDAORoutingEngineP.nc000066400000000000000000000333311207233610700230430ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLDAORoutingEngineP.nc * @ author JeongGil Ko (John) */ #include #include #include generic module RPLDAORoutingEngineP() { provides { interface RPLDAORoutingEngine as RPLDAORouteInfo; interface StdControl; } uses { interface Timer as DelayDAOTimer; interface Timer as RemoveTimer; interface Timer as GenerateDAOTimer; interface Random; interface IP as IP_DAO; interface IPAddress; interface Queue as SendQueue; interface Pool as SendPool; interface RPLRoutingEngine as RPLRouteInfo; interface RootControl; interface IPPacket; interface ForwardingTable; interface Leds; } } implementation { #define RPL_GLOBALADDR #define INIT_DAO 10000 uint8_t dao_double_count = 0; uint8_t dao_double_limit = 6; uint32_t dao_rate = INIT_DAO; // dao batches will be fired 256 ms after the first dao message is // scheduled every 100 ms, check if elememts in the entry should be // deleted -- only for storing nodes uint32_t delay_dao = 256; uint32_t remove_time = 120 * 1024U; uint8_t dao_table_pos = 0; uint16_t DTSN = 0; uint8_t daoseq = 0; uint16_t init_daorank = 1; uint8_t PATH_SEQUENCE = 0; uint8_t PATH_CONTROL = 0; downwards_table_t downwards_table[ROUTE_TABLE_SZ]; uint8_t downwards_table_count = 0; bool m_running = FALSE; bool memcmp_rpl(uint8_t* a, uint8_t* b, uint8_t len) { uint8_t i; for (i = 0 ; i < len ; i++) if (a[i] != b[i]) return FALSE; return TRUE; } command error_t StdControl.start() { call RPLDAORouteInfo.startDAO(); m_running = TRUE; return SUCCESS; } command error_t StdControl.stop() { m_running = FALSE; return SUCCESS; } uint32_t count = 0; task void sendDAO() { dao_entry_t* dao_msg; // struct ieee154_frame_addr addr_struct; // for now the next hop for the DAO is ONLY the desired parent on // the path to the DODAG root struct in6_addr next_hop; struct dao_base_t* dao; if (call RPLRouteInfo.getRank() == ROOT_RANK) { return; } if (call SendQueue.size() > 0 && call RPLRouteInfo.getMOP() != 0) { dao_msg = call SendQueue.dequeue(); // this should be my desired parent for now #if RPL_STORING_MODE /* in storing mode we unicast using LL addresses (9.2) */ call IPAddress.getLLAddr(&dao_msg->s_pkt.ip6_hdr.ip6_src); if (call RPLRouteInfo.getDefaultRoute(&next_hop) != SUCCESS) { call SendPool.put(dao_msg); printf("RPL: DAO: sendDAO: no default route\n"); return; } ip_memcpy((uint8_t*)&dao_msg->s_pkt.ip6_hdr.ip6_dst, (uint8_t*)&next_hop, sizeof(struct in6_addr)); #else /* in non-storing mode we must use global addresses */ call IPAddress.getGlobalAddr(&dao_msg->s_pkt.ip6_hdr.ip6_src); /* and unicast to the DODAG root */ call RPLRouteInfo.getDodagId(&dao_msg->s_pkt.ip6_hdr.ip6_dst); #endif dao = (struct dao_base_t *) dao_msg->s_pkt.ip6_data->iov_base; printf("RPL: >> sendDAO %d %lu \n", TOS_NODE_ID, ++count); printfflush(); call IP_DAO.send(&dao_msg->s_pkt); call SendPool.put(dao_msg); if (call SendQueue.size()) { // Once fired, shoot all the DAOs in the current sendqueue; // Assume that there is no aggregation on DAO messages. post sendDAO(); } } } command error_t RPLDAORouteInfo.startDAO() { #ifdef RPL_STORING_MODE call RemoveTimer.startPeriodic(remove_time); #else if (call RPLRouteInfo.getRank() != ROOT_RANK) { } else { call RemoveTimer.startPeriodic(remove_time); } #endif //call GenerateDAOTimer.startOneShot(dao_rate); // do we need this? call DelayDAOTimer.startOneShot(delay_dao + call Random.rand16()%100); if (call GenerateDAOTimer.isRunning()) { return SUCCESS; } else if (call RPLRouteInfo.getRank() == ROOT_RANK) { return SUCCESS; } else { call GenerateDAOTimer.startOneShot(dao_rate + ((call Random.rand16()) % (dao_rate / 10))); } return SUCCESS; } command bool RPLDAORouteInfo.getStoreState() { #if RPL_STORING_MODE return TRUE; #else return call RootControl.isRoot(); #endif } task void initDAO(); event void GenerateDAOTimer.fired() { // Initiate my own DAO messages uint32_t dao_next = dao_rate + ((call Random.rand16()) % (dao_rate / 10)); printf("RPL: DAO TIMER %lu %lu \n", dao_next, dao_rate); /* call GenerateDAOTimer.stop(); printfflush(); if (dao_double_count < dao_double_limit) { dao_rate = (dao_rate * 2) + call Random.rand16()%100; dao_double_count ++; } call GenerateDAOTimer.startOneShot(dao_rate + call Random.rand16()%50); */ post initDAO(); call GenerateDAOTimer.startOneShot(dao_next); } task void initDAO() { error_t error; dao_entry_t* dao_msg; uint16_t length = sizeof(struct dao_base_t); if (!call RPLRouteInfo.hasDODAG() || call RPLRouteInfo.getRank() == ROOT_RANK) { printf("RPL: DAO: no DODOG or rank\n"); return; } dao_msg = call SendPool.get(); if (dao_msg == NULL) { printf("RPL: DAO: no message\n"); return; } // call IPAddress.setSource(&dao_msg->s_pkt.ip6_hdr); dao_msg->dao_base.icmpv6.type = ICMP_TYPE_RPL_CONTROL; dao_msg->dao_base.icmpv6.code = ICMPV6_CODE_DAO; dao_msg->dao_base.icmpv6.checksum = 0; dao_msg->dao_base.DAOsequence = daoseq; // get instance ID from Rtg eng dao_msg->dao_base.instance_id.id = call RPLRouteInfo.getInstanceID(); dao_msg->dao_base.target_option.type = RPL_TARGET_TYPE; dao_msg->dao_base.target_option.option_length = 18; // length of my address dao_msg->dao_base.target_option.prefix_length = sizeof(struct in6_addr) * 8; #ifdef RPL_GLOBALADDR call IPAddress.getGlobalAddr(&dao_msg->dao_base.target_option.target_prefix); #else call IPAddress.getLLAddr(&dao_msg->dao_base.target_option.target_prefix); #endif dao_msg->dao_base.transit_info_option.type = RPL_TRANSIT_INFORMATION_TYPE; dao_msg->dao_base.transit_info_option.option_length = 22; dao_msg->dao_base.transit_info_option.path_sequence = PATH_SEQUENCE; dao_msg->dao_base.transit_info_option.path_control = PATH_CONTROL; dao_msg->dao_base.transit_info_option.path_lifetime = DEFAULT_LIFETIME; if (call RPLRouteInfo.getDefaultRoute(&dao_msg->dao_base.transit_info_option.parent_address) != SUCCESS) { printf("RPL: DAO: no default route\n"); call SendPool.put(dao_msg); return; } dao_msg->v[0].iov_base = (uint8_t *)&dao_msg->dao_base; dao_msg->v[0].iov_len = length; dao_msg->v[0].iov_next = NULL; dao_msg->s_pkt.ip6_hdr.ip6_vfc = IPV6_VERSION; dao_msg->s_pkt.ip6_hdr.ip6_nxt = IANA_ICMP; dao_msg->s_pkt.ip6_hdr.ip6_plen = htons(length); dao_msg->s_pkt.ip6_data = &dao_msg->v[0]; error = call SendQueue.enqueue(dao_msg); if (error != SUCCESS) { printf("RPL: DAO: can't enqueue\n"); call SendPool.put(dao_msg); return; } else { if (!call DelayDAOTimer.isRunning()) { call DelayDAOTimer.startOneShot(delay_dao); } } } event void DelayDAOTimer.fired() { post sendDAO(); } event void RemoveTimer.fired() { // check stored table's life-time uint8_t i, j; if (!call RPLDAORouteInfo.getStoreState()) return; for (i = 0; i < downwards_table_count; i++) { downwards_table[i].lifetime -= remove_time; if (downwards_table[i].lifetime <= remove_time) { /* SDH : expire the route to this destination */ call ForwardingTable.delRoute(downwards_table[i].key); for (j = i; j < downwards_table_count-1; j++) { downwards_table[j] = downwards_table[j+1]; } downwards_table[downwards_table_count-1].lifetime = 0; downwards_table_count --; } } } event void IP_DAO.recv(struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) { dao_entry_t* dao_msg; error_t error; struct in6_addr MYADDR; // This is where the message is actually cast struct dao_base_t *dao = (struct dao_base_t *)payload; struct route_entry *entry; route_key_t new_key = ROUTE_INVAL_KEY; printf("RPL: receive DAO\n"); printfflush(); if (!m_running) return; #ifndef RPL_STORING_MODE if (!call RPLDAORouteInfo.getStoreState()) return; #endif // if (dao->target_option.prefix_length == 128) // call Leds.led1Toggle(); /* SDH : the two cases are the same... */ entry = call ForwardingTable.lookupRoute(dao->target_option.target_prefix.s6_addr, dao->target_option.prefix_length); if ((entry != NULL) && (entry->prefixlen == dao->target_option.prefix_length)) { /* exact match in the forwarding table */ if (memcmp_rpl((uint8_t*)entry->next_hop.s6_addr, (uint8_t*)iph->ip6_src.s6_addr, 16) == TRUE) { // same old destination with same DTSN } else { /* SDH : shouldn't we, like, save the new route? */ // new next hop for an existing downswards node //call ForwardingTable.delRoute(entry.key); call RPLRouteInfo.setDTSN((call RPLRouteInfo.getDTSN()) + 1); if (dao->target_option.prefix_length > 0) new_key = call ForwardingTable.addRoute(dao->target_option.target_prefix.s6_addr, dao->target_option.prefix_length, &iph->ip6_src, RPL_IFACE); } } else { /* new prefix */ call IPAddress.getGlobalAddr(&MYADDR); if (downwards_table_count == ROUTE_TABLE_SZ || memcmp_rpl((void*)&MYADDR, dao->target_option.target_prefix.s6_addr, 16)) { // printf("RPL: Downward table full -- not adding route\n"); // or this is my own address for some wierd reason return; } printf("RPL: DAO: Add new route\n"); printfflush(); if (dao->target_option.prefix_length > 0) { new_key = call ForwardingTable.addRoute(dao->target_option.target_prefix.s6_addr, dao->target_option.prefix_length, &iph->ip6_src, RPL_IFACE); } if (new_key != ROUTE_INVAL_KEY) { //downwards_table[downwards_table_count].lifetime = dao->transit_info_option.path_lifetime; downwards_table[downwards_table_count].key = new_key; // for next element downwards_table_count ++; } } if (new_key != ROUTE_INVAL_KEY) { uint8_t i; for (i=0;itransit_info_option.path_lifetime; } } } /***********************************************************************/ // FROM THIS POINT, ITS ABOUT FORWARDING THE DAO INFORMATION UPWARDS!!! /***********************************************************************/ if (call RPLRouteInfo.getRank() == ROOT_RANK) { // no need to futher process packets return; } /* else{ if (!call GenerateDAOTimer.isRunning()) call GenerateDAOTimer.startOneShot(dao_rate); } */ dao_msg = call SendPool.get(); if (dao_msg == NULL) { return; } // NO MODIFICATION TO DAO's RR-LIST NEEDED! -- just make sure I // keep what I have and the prefix ip_memcpy((uint8_t*)&dao_msg->s_pkt.ip6_hdr, (uint8_t*)iph, sizeof(struct ip6_hdr)); // copy new payload information ip_memcpy((uint8_t*)&dao_msg->dao_base, (uint8_t*)payload, sizeof(struct dao_base_t)); dao_msg->v[0].iov_base = (uint8_t *)&dao_msg->dao_base; dao_msg->v[0].iov_len = ntohs(iph->ip6_plen); dao_msg->v[0].iov_next = NULL; dao_msg->s_pkt.ip6_data = &dao_msg->v[0]; error = call SendQueue.enqueue(dao_msg); if (error != SUCCESS) { call SendPool.put(dao_msg); return; } else { if (!call DelayDAOTimer.isRunning()) call DelayDAOTimer.startOneShot(delay_dao); } } command void RPLDAORouteInfo.newParent() { /* dao_rate = INIT_DAO; dao_double_count = 0; call GenerateDAOTimer.stop(); call GenerateDAOTimer.startOneShot(dao_rate); */ post initDAO(); } event void IPAddress.changed(bool global_valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLMRHOFP.nc000066400000000000000000000204021207233610700206100ustar00rootroot00000000000000/* * Copyright (c) 2011 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLMRHOFP.nc * @ author JeongGil Ko (John) */ /** * This file implements the IETF draft draft-ietf-roll-minrank-hysteresis-of-02 * This file uses the ETX metric container to compute the next hop and rank **/ #include "blip_printf.h" module RPLMRHOFP{ provides interface RPLOF; uses interface ForwardingTable; uses interface RPLRoutingEngine as RPLRoute; uses interface RPLParentTable as ParentTable; uses interface RPLDAORoutingEngine as RPLDAO; uses interface RPLRank as RPLRankInfo; } implementation{ #define STABILITY_BOUND 5 // this determines the stability bound for switching parents. // 0 is the min value to have nodes aggressively seek new parents // 5 or 10 is suggested uint16_t nodeRank = INFINITE_RANK; uint16_t minMetric = 0xFFFF; uint32_t parentChanges = 0; uint16_t nodeEtx = divideRank; uint16_t prevParent; bool newParent = FALSE; uint16_t desiredParent = MAX_PARENT - 1; uint16_t min_hop_rank_inc = 1; route_key_t route_key = ROUTE_INVAL_KEY; void setRoot() { nodeEtx = divideRank; nodeRank = ROOT_RANK; } /* OCP for MRHOF */ command bool RPLOF.OCP(uint16_t ocp) { if (ocp == RPLOF_OCP_MRHOF) return TRUE; return FALSE; } /* Which metrics does this implementation support */ command bool RPLOF.objectSupported(uint16_t objectType) { if (objectType == RPL_ROUTE_METRIC_ETX) { return TRUE; } return FALSE; } command uint16_t RPLOF.getObjectValue() { if (call RPLRankInfo.isRoot()) { setRoot(); } return nodeEtx; } command void RPLOF.setMinHopRankIncrease(uint16_t val) { min_hop_rank_inc = val; } /* Current parent */ command struct in6_addr* RPLOF.getParent() { parent_t* parentNode = call ParentTable.get(desiredParent); return &parentNode->parentIP; } /* Current rank */ command uint16_t RPLOF.getRank() { // minHopInc has to be added to this value return nodeRank; } command bool RPLOF.recalculateRank() { // return TRUE if this is the first time that the rank is computed // for this parent. uint16_t prevEtx, prevRank; parent_t* parentNode = call ParentTable.get(desiredParent); if (desiredParent == MAX_PARENT) { nodeRank = INFINITE_RANK; return FALSE; } prevEtx = nodeEtx; prevRank = nodeRank; nodeEtx = parentNode->etx_hop + parentNode -> etx; // -1 because the ext computation will add at least 1 nodeRank = (parentNode->etx_hop / divideRank * min_hop_rank_inc) + parentNode->rank; // printf("RPLOF: >>> %d %d %d %d %d %d %d\n", // desiredParent, parentNode->etx_hop, divideRank, // parentNode->rank, (min_hop_rank_inc - 1), nodeRank, prevRank); // printfflush(); if (nodeRank <= ROOT_RANK && prevRank > 1) { nodeRank = prevRank; nodeEtx = prevEtx; } if (newParent) { newParent = FALSE; return TRUE; } else { return FALSE; } } /* Recompute the routes, return TRUE if rank updated */ command bool RPLOF.recomputeRoutes() { uint8_t indexset; uint8_t min = 0; uint16_t minDesired; parent_t* parentNode, *previousParent; //choose the first valid parentNode = call ParentTable.get(min); while (!parentNode->valid && min < MAX_PARENT) { min++; parentNode = call ParentTable.get(min); } minDesired = parentNode->etx_hop + parentNode->etx; if (min == MAX_PARENT) { call RPLOF.resetRank(); call RPLRoute.inconsistency(); // call ForwardingTable.delRoute(route_key); route_key = ROUTE_INVAL_KEY; return FALSE; } // printf("RPLOF: %d %d %d %d \n", // parentNode->etx, parentNode->rank, parentNode->etx_hop, min); parentNode = call ParentTable.get(desiredParent); // update to most recent etx if (htons(parentNode->parentIP.s6_addr16[7]) != 0) minMetric = parentNode->etx_hop + parentNode->etx; for (indexset = min + 1; indexset < MAX_PARENT; indexset++) { parentNode = call ParentTable.get(indexset); if ((parentNode->valid) && (parentNode->etx >= divideRank) && (parentNode->etx_hop >= 0) && (parentNode->etx_hop + parentNode->etx < minDesired) && (parentNode->rank < nodeRank) && (parentNode->rank != INFINITE_RANK)) { min = indexset; // best aggregate end-to-end etx minDesired = parentNode->etx_hop + parentNode->etx; // printf("RPLOF: %d %d %d %d \n", // parentNode->etx, parentNode->rank, parentNode->etx_hop, min); if (min == desiredParent) minMetric = minDesired; } else if (min == desiredParent) { minMetric = minDesired; } } parentNode = call ParentTable.get(min); if (parentNode->rank > nodeRank || parentNode->rank == INFINITE_RANK) { printf("RPLOF: SELECTED PARENT is FFFF %d\n", TOS_NODE_ID); //call ForwardingTable.delRoute(route_key); route_key = ROUTE_INVAL_KEY; return FALSE; } previousParent = call ParentTable.get(desiredParent); if ((minDesired + ((divideRank * STABILITY_BOUND) / 10) >= minMetric) && (minMetric !=0) && (previousParent->valid)) { // if the min measurement (minDesired) is not significantly // better than the previous parent's (minMetric), stay with what // we have... min = desiredParent; minDesired = minMetric; } // printf("RPLOF: <> %d %d %d %d \n", // parentNode->etx, parentNode->rank, parentNode->etx_hop, min); minMetric = minDesired; desiredParent = min; parentNode = call ParentTable.get(desiredParent); // printf("RPLOF: MRHOF %d %d %u %u\n", // TOS_NODE_ID, htons(parentNode->parentIP.s6_addr16[7]), // parentNode->etx_hop, parentNode->etx); /* set the new default route */ /* set one of the below of maybe set both? */ // call ForwardingTable.addRoute((const uint8_t*)&DODAGID, // 128, &parentNode->parentIP, RPL_IFACE); route_key = call ForwardingTable.addRoute(NULL, 0, &parentNode->parentIP, RPL_IFACE); if (prevParent != parentNode->parentIP.s6_addr16[7]) { // printf("RPLOF: >> New Parent %d %d %lu \n", // TOS_NODE_ID, htons(parentNode->parentIP.s6_addr16[7]), // parentChanges++); printf("RPLOF: #L %u 0\n", (uint8_t)htons(prevParent)); printf("RPLOF: #L %u 1\n", (uint8_t)htons(parentNode->parentIP.s6_addr16[7])); newParent = TRUE; call RPLDAO.newParent(); } prevParent = parentNode->parentIP.s6_addr16[7]; return TRUE; } command void RPLOF.resetRank() { nodeRank = INFINITE_RANK; minMetric = 0xFFFF; } event void RPLRankInfo.parentRankChange() {} } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLOF.nc000066400000000000000000000010471207233610700201250ustar00rootroot00000000000000interface RPLOF { /* OCP for this OF */ command bool OCP(uint16_t ocp); /* Which metrics does this implementation support */ command bool objectSupported(uint16_t objectType); command uint16_t getObjectValue(); /* Current parent */ command struct in6_addr* getParent(); /* Current rank */ command uint16_t getRank(); command void resetRank(); command bool recalculateRank(); /* Recompute the routes, return TRUE if rank updated */ command bool recomputeRoutes(); command void setMinHopRankIncrease(uint16_t val); } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLOF0P.nc000066400000000000000000000204161207233610700203260ustar00rootroot00000000000000/* * Copyright (c) 2011 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLOF0P.nc * @ author JeongGil Ko (John) */ #include "blip_printf.h" module RPLOF0P{ provides interface RPLOF; uses interface ForwardingTable; uses interface RPLRoutingEngine as RPLRoute; uses interface RPLParentTable as ParentTable; uses interface RPLDAORoutingEngine as RPLDAO; } implementation{ // this determines the stability bound for switching parents. #define STABILITY_BOUND 5 uint16_t nodeRank = INFINITE_RANK; uint16_t minMetric = 0xFFFF; uint16_t prevParent; uint32_t parentChanges = 0; uint16_t desiredParent = MAX_PARENT - 1; uint16_t nodeEtx = divideRank; bool newParent = FALSE; uint16_t min_hop_rank_inc = 1; route_key_t route_key = ROUTE_INVAL_KEY; /* OCP for OF0 */ command bool RPLOF.OCP(uint16_t ocp) { if (ocp == RPLOF_OCP_OF0) return TRUE; return FALSE; } /* Which metrics does this implementation support */ command bool RPLOF.objectSupported(uint16_t objectType) { // OF0 does not care about the metric return TRUE; /* if (objectType == RPL_ROUTE_METRIC_ETX) { return TRUE; } return FALSE; */ } command void RPLOF.setMinHopRankIncrease(uint16_t val) { min_hop_rank_inc = val; } command uint16_t RPLOF.getObjectValue() { return nodeEtx; } /* Current parent */ command struct in6_addr* RPLOF.getParent() { parent_t* parentNode = call ParentTable.get(desiredParent); return &parentNode->parentIP; } /* Current rank */ command uint16_t RPLOF.getRank() { return nodeRank; } command bool RPLOF.recalculateRank() { uint16_t prevEtx, prevRank; parent_t* parentNode = call ParentTable.get(desiredParent); if (desiredParent == MAX_PARENT) { nodeRank = INFINITE_RANK; return FALSE; } prevEtx = nodeEtx; prevRank = nodeRank; // printf("RPLOF: OF0 PARENT rank %d \n", parentSet[desiredParent].rank); nodeEtx = parentNode->etx_hop; nodeRank = parentNode->rank + min_hop_rank_inc; if (nodeRank < min_hop_rank_inc) nodeRank = INFINITE_RANK; if (newParent) { newParent = FALSE; return TRUE; }else{ return FALSE; } } /* Recompute the routes, return TRUE if rank updated */ command bool RPLOF.recomputeRoutes() { uint8_t indexset; uint8_t min = 0, count = 0; uint16_t minDesired; parent_t* parentNode, *previousParent; parentNode = call ParentTable.get(min); while ((!parentNode->valid) && (min < MAX_PARENT) && (parentNode->rank != INFINITE_RANK)) { min++; parentNode = call ParentTable.get(min); } minDesired = parentNode->etx_hop + (parentNode->rank * divideRank); if (min == MAX_PARENT) { call RPLOF.resetRank(); call RPLRoute.inconsistency(); call ForwardingTable.delRoute(route_key); route_key = ROUTE_INVAL_KEY; return FALSE; } // printf("RPLOF: Start Compare %d %d: %d %d %d \n", // htons(prevParent), htons(parentNode->parentIP.s6_addr16[7]), // minDesired, parentNode->etx_hop, parentNode->rank); parentNode = call ParentTable.get(desiredParent); if (htons(parentNode->parentIP.s6_addr16[7]) != 0) { minMetric = parentNode->etx_hop + parentNode->rank*divideRank; // printf("RPLOF: Compare %d: %d %d with %d %d\n", // htons(parentNode->parentIP.s6_addr16[7]), // parentNode->etx_hop, parentNode->rank, minDesired, minMetric); } if (min == desiredParent) minMetric = minDesired; for (indexset = min + 1; indexset < MAX_PARENT; indexset++) { parentNode = call ParentTable.get(indexset); // if (parentNode->valid) // printf("RPLOF: Compare %d: %d %d with %d %d\n", // htons(parentNode->parentIP.s6_addr16[7]), // parentNode->etx_hop, parentNode->rank, minDesired, indexset); if ((parentNode->valid) && (parentNode->etx_hop >= 0) && (parentNode->etx_hop + (parentNode->rank * divideRank) < minDesired) && (parentNode->rank < nodeRank) && (parentNode->rank != INFINITE_RANK)) { count ++; min = indexset; minDesired = parentNode->etx_hop + parentNode->rank * divideRank; // printf("RPLOF: Compare %d %d \n", // minDesired, parentNode->etx_hop/divideRank + parentNode->rank); if (min == desiredParent) { // printf("RPLOF: current parent Checking...\n"); minMetric = minDesired; } } else if (min == desiredParent) { minMetric = minDesired; } } parentNode = call ParentTable.get(min); /*parentNode->rank > nodeRank || */ if (parentNode->rank == INFINITE_RANK) { // printf("RPLOF: SELECTED PARENT is FFFF %d\n", TOS_NODE_ID); desiredParent = MAX_PARENT; call ForwardingTable.delRoute(route_key); route_key = ROUTE_INVAL_KEY; return FALSE; } previousParent = call ParentTable.get(desiredParent); if ((minDesired * divideRank + STABILITY_BOUND >= minMetric * divideRank) && (minMetric != 0) && (previousParent->valid)) { // if the min measurement (minDesired) is not significantly // better than the previous parent's (minMetric), stay with what // we have... // printf("RPLOF: SAFETYBOUND %d %d %d\n", // minDesired*divideRank, STABILITY_BOUND, minMetric*divideRank); min = desiredParent; minDesired = minMetric; } minMetric = minDesired; desiredParent = min; parentNode = call ParentTable.get(desiredParent); // printf("RPLOF: OF0 %d %d %u %u %d\n", TOS_NODE_ID, // htons(parentNode->parentIP.s6_addr16[7]), // parentNode->etx_hop, parentNode->rank, count); /* set the new default route */ /* set one of the below of maybe set both? */ // call ForwardingTable.addRoute((const uint8_t*)&DODAGID, 128, // l &parentNode->parentIP, RPL_IFACE); route_key = call ForwardingTable.addRoute(NULL, 0, &parentNode->parentIP, RPL_IFACE); if (prevParent != parentNode->parentIP.s6_addr16[7]) { // printf("RPLOF: >> New Parent %d %x %lu \n", TOS_NODE_ID, // htons(parentNode->parentIP.s6_addr16[7]), // parentChanges++); // printf("RPLOF: #L %u 0\n", (uint8_t)htons(prevParent)); // printf("RPLOF: #L %u 1 %d\n", // (uint8_t)htons(parentNode->parentIP.s6_addr16[7]), // TOS_NODE_ID); newParent = TRUE; call RPLDAO.newParent(); } prevParent = parentNode->parentIP.s6_addr16[7]; return TRUE; } command void RPLOF.resetRank() { nodeRank = INFINITE_RANK; minMetric = 0xFFFF; } } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLParentTable.nc000066400000000000000000000001131207233610700220130ustar00rootroot00000000000000interface RPLParentTable{ command parent_t* get(uint8_t parent_index); } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLRank.nc000066400000000000000000000105461207233610700205200ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLRank.nc * @ author JeongGil Ko (John) */ /* * Copyright (c) 2010 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @ author Yiwei Yao */ interface RPLRank { // declare the I am the root command void declareRoot(); // I am no longer a root command void cancelRoot(); // I am the root? command bool isRoot(); // return the rank of the specified IP addr command uint16_t getRank(struct in6_addr *node); // return if IP is in parent set command bool isParent(struct in6_addr *node); // new iteration has begun //command void notifyNewIteration(); // inconsistency is seen for the link with IP // record this as part of entry in table as well command void inconsistencyDetected(); /*new adding*/ // ping rank component if there are parents command uint8_t hasParent(); command bool isLeaf(); command uint16_t getEtx(); command bool compareAddr(struct in6_addr *node1, struct in6_addr *node2); command bool validInstance(uint8_t instanceID); event void parentRankChange(); //////Feel free to add events or commands below this line////// /////////////////////////////////////////////////////////////// command void setQueuingDelay(uint32_t delay); command error_t getDefaultRoute(struct in6_addr *next_hop); } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLRankC.nc000066400000000000000000000107221207233610700206170ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLRankC.nc * @ author JeongGil Ko (John) */ /* * Copyright (c) 2010 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @ author Yiwei Yao */ configuration RPLRankC{ provides { interface IP as IP_DIO_Filter; interface RPLRank; interface StdControl; } uses { interface IP as ICMP_RA[uint8_t code]; } } implementation { components RPLRankP, IPAddressC; components RPLRoutingEngineC; components IPStackC, IPPacketC; components LedsC; RPLRank = RPLRankP; StdControl = RPLRankP; IP_DIO_Filter = RPLRankP.IP_DIO_Filter; RPLRankP.IP_DIO = ICMP_RA[ICMPV6_CODE_DIO]; RPLRankP.Leds -> LedsC; RPLRankP.RouteInfo -> RPLRoutingEngineC; RPLRankP.IPAddress -> IPAddressC; //RPLRankP.ForwardingTable -> IPStackC; RPLRankP.ForwardingEvents -> IPStackC.ForwardingEvents[RPL_IFACE]; RPLRankP.IPPacket -> IPPacketC; #ifdef RPL_OF_MRHOF components RPLMRHOFP, RPLDAORoutingEngineC; RPLRankP.RPLOF -> RPLMRHOFP; RPLMRHOFP.ForwardingTable -> IPStackC; RPLMRHOFP.RPLRoute -> RPLRoutingEngineC; RPLMRHOFP.ParentTable -> RPLRankP; RPLMRHOFP.RPLDAO -> RPLDAORoutingEngineC; RPLMRHOFP.RPLRankInfo -> RPLRankP; #else components RPLOF0P, RPLDAORoutingEngineC; RPLRankP.RPLOF -> RPLOF0P; RPLOF0P.ForwardingTable -> IPStackC; RPLOF0P.RPLRoute -> RPLRoutingEngineC; RPLOF0P.ParentTable -> RPLRankP; RPLOF0P.RPLDAO -> RPLDAORoutingEngineC; #endif } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLRankP.nc000066400000000000000000000722051207233610700206400ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLRankP.nc * @ author JeongGil Ko (John) */ /* * Copyright (c) 2010 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @ author Yiwei Yao */ #include #include #include #include #include #include "blip_printf.h" #include "IPDispatch.h" module RPLRankP{ provides{ interface RPLRank as RPLRankInfo; interface StdControl; interface IP as IP_DIO_Filter; interface RPLParentTable; } uses { interface IP as IP_DIO; interface IPPacket; interface RPLRoutingEngine as RouteInfo; interface Leds; interface IPAddress; interface ForwardingTable; interface ForwardingEvents; interface RPLOF; } } implementation { uint16_t nodeRank = INFINITE_RANK; // 0 is the initialization state uint16_t minRank = INFINITE_RANK; bool leafState = FALSE; /* SDH : this is essentially the Default Route List */ struct in6_addr prevParent; uint32_t parentChanges = 0; uint8_t parentNum = 0; uint16_t VERSION = 0; uint16_t nodeEtx = divideRank; uint16_t MAX_RANK_INCREASE = 1; //uint16_t MIN_HOP_RANK_INCREASE = 1; uint8_t etxConstraint; uint32_t latencyConstraint; // hasConstraint[0] represents ETX, hasConstraint[1] represent Latency bool hasConstraint[2] = {FALSE,FALSE}; struct in6_addr DODAGID; struct in6_addr DODAG_MAX; uint8_t METRICID; //which metric uint16_t OCP; uint32_t myQDelay = 1.0; bool hasOF = FALSE; uint8_t Prf = 0xFF; uint8_t alpha; //configuration parameter uint8_t beta; bool ignore = FALSE; bool ROOT = FALSE; bool m_running = FALSE; parent_t parentSet[MAX_PARENT]; void resetValid(); void getNewRank(); #define RPL_GLOBALADDR #define compare_ipv6(node1, node2) \ (!memcmp((node1), (node2), sizeof(struct in6_addr))) command error_t StdControl.start() { //initialization uint8_t indexset; DODAG_MAX.s6_addr16[7] = htons(0); ip_memcpy((uint8_t*)&DODAGID, (uint8_t*)&DODAG_MAX, sizeof(struct in6_addr)); for (indexset = 0; indexset < MAX_PARENT; indexset++) { parentSet[indexset].valid = FALSE; } m_running = TRUE; return SUCCESS; } command error_t StdControl.stop() { m_running = FALSE; return SUCCESS; } command parent_t* RPLParentTable.get(uint8_t i) { return &parentSet[i]; } // declare the I am the root command void RPLRankInfo.declareRoot() { ROOT = TRUE; // minMetric = divideRank; nodeRank = ROOT_RANK; } command bool RPLRankInfo.isRoot() { return ROOT; } command bool RPLRankInfo.validInstance(uint8_t instanceID) { return TRUE; } // I am no longer a root command void RPLRankInfo.cancelRoot() { } uint8_t getParent(struct in6_addr *node); // return the rank of the specified IP addr command uint16_t RPLRankInfo.getRank(struct in6_addr *node) { uint8_t indexset; struct in6_addr my_addr; #ifdef RPL_GLOBALADDR call IPAddress.getGlobalAddr(&my_addr); #else call IPAddress.getLLAddr(&my_addr); #endif if (compare_ipv6(&my_addr, node)) { if (ROOT) { nodeRank = ROOT_RANK; } return nodeRank; } indexset = getParent(node); if (indexset != MAX_PARENT) { return parentSet[indexset].rank; } return 0x1234; } command error_t RPLRankInfo.getDefaultRoute(struct in6_addr *next) { // printf_in6addr(&parentSet[desiredParent].parentIP); // printf("\n"); if (parentNum) { ip_memcpy((uint8_t*)next, (uint8_t*)call RPLOF.getParent(), sizeof(struct in6_addr)); return SUCCESS; } return FAIL; } bool exceedThreshold(uint8_t indexset, uint8_t ID) { return parentSet[indexset].etx_hop > ETX_THRESHOLD; } command bool RPLRankInfo.compareAddr(struct in6_addr *node1, struct in6_addr *node2) { return compare_ipv6(node1, node2); } //return the index of parent uint8_t getParent(struct in6_addr *node) { uint8_t indexset; if (parentNum == 0) { return MAX_PARENT; } for (indexset = 0; indexset < MAX_PARENT; indexset++) { if (compare_ipv6(&(parentSet[indexset].parentIP),node) && parentSet[indexset].valid) { return indexset; } } return MAX_PARENT; } // return if IP is in parent set command bool RPLRankInfo.isParent(struct in6_addr *node) { return (getParent(node) != MAX_PARENT); } /* // new iteration has begun, all need to be cleared command void RPLRankInfo.notifyNewIteration() { parentNum = 0; resetValid(); } */ void resetValid() { uint8_t indexset; for (indexset = 0; indexset < MAX_PARENT; indexset++) { parentSet[indexset].valid = FALSE; } } // inconsistency is seen for the link with IP // record this as part of entry in table as well // Other layers will report this information command void RPLRankInfo.inconsistencyDetected() { parentNum = 0; call RPLOF.resetRank(); nodeRank = INFINITE_RANK; resetValid(); //memcpy(&DODAGID, 0, 16); //call RouteInfo.inconsistency(); } // ping rank component if there are parents command uint8_t RPLRankInfo.hasParent() { return parentNum; } command bool RPLRankInfo.isLeaf() { //return TRUE; return leafState; } uint8_t getPreExistingParent(struct in6_addr *node) { // just find if there are any pre existing information on this node... uint8_t indexset; if (parentNum == 0) { return MAX_PARENT; } for (indexset = 0; indexset < MAX_PARENT; indexset++) { if (compare_ipv6(&(parentSet[indexset].parentIP),node)) { return indexset; } } return MAX_PARENT; } command uint16_t RPLRankInfo.getEtx() { return call RPLOF.getObjectValue(); } void insertParent(parent_t parent) { uint8_t indexset; uint16_t tempEtx_hop; indexset = getPreExistingParent(&parent.parentIP); printf("RPL: Insert Node: %d \n", indexset); if (indexset != MAX_PARENT) { // we have previous information tempEtx_hop = parentSet[indexset].etx_hop; parentSet[indexset] = parent; if (tempEtx_hop > INIT_ETX && tempEtx_hop < BLIP_L2_RETRIES) { tempEtx_hop = tempEtx_hop-INIT_ETX; if (tempEtx_hop < divideRank) tempEtx_hop = INIT_ETX; } else{ tempEtx_hop = INIT_ETX; } parentSet[indexset].etx_hop = tempEtx_hop; parentNum++; // printf("Parent Added %d \n",parentNum); return; } for (indexset = 0; indexset < MAX_PARENT; indexset++) { if (!parentSet[indexset].valid) { parentSet[indexset] = parent; parentNum++; break; } } // printf("Parent Added 2 %d \n",parentNum); } void evictParent(uint8_t indexset) { parentSet[indexset].valid = FALSE; parentNum--; printf("RPL: Evict parent %d %u %u\n", parentNum, parentSet[indexset].etx_hop, parentSet[indexset].etx); if (parentNum == 0) { // should do something call RouteInfo.resetTrickle(); } } task void newParentSearch() { // only called when evictAll just cleared out my current desired parent call RPLOF.recomputeRoutes(); getNewRank(); } /* check and remove parents on rank change */ void evictAll() { uint8_t indexset, myParent; myParent = getParent(call RPLOF.getParent()); for (indexset = 0; indexset < MAX_PARENT; indexset++) { if (parentSet[indexset].valid && parentSet[indexset].rank >= nodeRank) { parentSet[indexset].valid = FALSE; parentNum--; printf("RPL: Evict all %d %d %d %d\n", parentNum, parentSet[indexset].rank, nodeRank, htons(parentSet[indexset].parentIP.s6_addr16[7])); if (indexset == myParent) { // i just cleared out my own parent... post newParentSearch(); return; } } } } command void RPLRankInfo.setQueuingDelay(uint32_t delay) { myQDelay = delay; } event bool ForwardingEvents.initiate(struct ip6_packet *pkt, struct in6_addr *next_hop) { uint16_t len; static struct ip_iovec v; static rpl_data_hdr_t data_hdr; #ifndef RPL_OF_MRHOF return TRUE; #endif if (pkt->ip6_hdr.ip6_nxt == IANA_ICMP) return TRUE; data_hdr.ip6_ext_outer.ip6e_nxt = pkt->ip6_hdr.ip6_nxt; data_hdr.ip6_ext_outer.ip6e_len = 0; /* well, this is actually the type */ data_hdr.ip6_ext_inner.ip6e_nxt = RPL_HBH_RANK_TYPE; data_hdr.ip6_ext_inner.ip6e_len = sizeof(rpl_data_hdr_t) - offsetof(rpl_data_hdr_t, bitflag); data_hdr.bitflag = 0; data_hdr.bitflag = 0 << RPL_DATA_O_BIT_SHIFT; data_hdr.bitflag |= 0 << RPL_DATA_R_BIT_SHIFT; data_hdr.bitflag |= 0 << RPL_DATA_F_BIT_SHIFT; data_hdr.instance_id = call RouteInfo.getInstanceID(); data_hdr.senderRank = nodeRank; pkt->ip6_hdr.ip6_nxt = IPV6_HOP; len = ntohs(pkt->ip6_hdr.ip6_plen); /* add the header */ v.iov_base = (uint8_t*) &data_hdr; v.iov_len = sizeof(rpl_data_hdr_t); v.iov_next = pkt->ip6_data; // original upper layer goes here! /* increase length in ipv6 header and relocate beginning */ pkt->ip6_data = &v; len = len + v.iov_len; pkt->ip6_hdr.ip6_plen = htons(len); return TRUE; } /** * Signaled by the forwarding engine for each packet being forwarded. * * If we return FALSE, the stack will drop the packet instead of * doing whatever was in the routing table. * */ event bool ForwardingEvents.approve(struct ip6_packet *pkt, struct in6_addr *next_hop) { #ifndef RPL_OF_MRHOF return TRUE; #else rpl_data_hdr_t data_hdr; bool inconsistent = FALSE; uint8_t o_bit; uint8_t nxt_hdr = IPV6_HOP; int off; /* is there a HBH header? */ off = call IPPacket.findHeader(pkt->ip6_data, pkt->ip6_hdr.ip6_nxt, &nxt_hdr); if (off < 0) return TRUE; /* if there is, is there a RPL TLV option in there? */ off = call IPPacket.findTLV(pkt->ip6_data, off, RPL_HBH_RANK_TYPE); if (off < 0) return TRUE; /* read out the rpl option */ if (iov_read(pkt->ip6_data, off + sizeof(struct tlv_hdr), sizeof(rpl_data_hdr_t) - offsetof(rpl_data_hdr_t, bitflag), (void *)&data_hdr.bitflag) != sizeof(rpl_data_hdr_t) - offsetof(rpl_data_hdr_t, bitflag)) return TRUE; o_bit = (data_hdr.bitflag & RPL_DATA_O_BIT_MASK) >> RPL_DATA_O_BIT_SHIFT; // printf("approve test: %d %d %d %d %d \n", // data_hdr.senderRank, data_hdr.instance_id, // nodeRank, o_bit, call RPLRankInfo.getRank(next_hop)); /* SDH : we'd want to dispatch on the instance id if there are multiple dags */ if (data_hdr.senderRank == ROOT_RANK) { o_bit = 1; goto approve; } if (o_bit && data_hdr.senderRank > nodeRank) { /* loop */ inconsistent = TRUE; } else if (!o_bit && data_hdr.senderRank < nodeRank) { inconsistent = TRUE; } if (call RPLRankInfo.getRank(next_hop) >= nodeRank) { /* Packet is heading down if the next_hop rank is not smaller than the current one (not in the parent set) */ /* By the time I am here, it means that there is a next hop but if this is not in my parent set, then it should be downward */ data_hdr.bitflag |= 1 << RPL_DATA_O_BIT_SHIFT; } if (inconsistent) { if ((data_hdr.bitflag & RPL_DATA_R_BIT_MASK) >> RPL_DATA_R_BIT_SHIFT) { /* this is not the first time */ /* ditch this packet! */ call RouteInfo.inconsistency(); // printf("NOT Approving: %d %d %d\n", // data_hdr.senderRank, data_hdr.instance_id, inconsistent); return FALSE; } else { /* just mark it */ data_hdr.bitflag |= 1 << RPL_DATA_R_BIT_SHIFT; goto approve; } } approve: // printf("Approving: %d %d %d\n", // data_hdr.senderRank, data_hdr.instance_id, inconsistent); data_hdr.senderRank = nodeRank; // write back the modified data header iov_update(pkt->ip6_data, off + sizeof(struct tlv_hdr), sizeof(rpl_data_hdr_t) - offsetof(rpl_data_hdr_t, bitflag), (void *)&data_hdr.bitflag); return TRUE; #endif } /* Compute ETX! */ event void ForwardingEvents.linkResult(struct in6_addr *node, struct send_info *info) { uint8_t indexset, myParent; uint16_t etx_now = (info->link_transmissions * divideRank) / info->link_fragment_attempts; printf("RPL: linkResult: "); printf_in6addr(node); printf(" %d [%i] %d \n", TOS_NODE_ID, etx_now, nodeRank); myParent = getParent(call RPLOF.getParent()); if (nodeRank == ROOT_RANK) { return; } for (indexset = 0; indexset < MAX_PARENT; indexset++) { if (parentSet[indexset].valid && compare_ipv6(&(parentSet[indexset].parentIP), node)) { break; } } if (indexset != MAX_PARENT) { // not empty... parentSet[indexset].etx_hop = (parentSet[indexset].etx_hop * 8 + (etx_now * 2)) / 10; if (exceedThreshold(indexset, METRICID)) { evictParent(indexset); if (indexset == myParent && parentNum > 0) call RPLOF.recomputeRoutes(); } getNewRank(); // printf(">> P_ETX UPDATE %d %d %d %d %d %d\n", // indexset, parentSet[indexset].etx_hop, // etx_now, ntohs(parentSet[indexset].parentIP.s6_addr16[7]), // nodeRank, parentNum); return; } // not contained in either parent set, do nothing } /* old <= new, return true; */ bool compareParent(parent_t oldP, parent_t newP) { return (oldP.etx_hop + oldP.etx) <= (newP.etx_hop + newP.etx); } void getNewRank() { uint16_t prevRank = nodeRank;//, myParent; bool newParent = FALSE; newParent = call RPLOF.recalculateRank(); nodeRank = call RPLOF.getRank(); // printf("GOT new rank %d %d %d\n", // TOS_NODE_ID, call RPLOF.getRank(), newParent); if (newParent) { minRank = nodeRank; return; } if (nodeRank < minRank) { minRank = nodeRank; return; } // did the node rank get worse than the limit? if ((nodeRank > prevRank) && (nodeRank - minRank > MAX_RANK_INCREASE) && (MAX_RANK_INCREASE != 0)) { // this is inconsistency! // printf("Inconsistent %d\n", TOS_NODE_ID); nodeRank = INFINITE_RANK; minRank = INFINITE_RANK; call RouteInfo.inconsistency(); return; } evictAll(); } /* * Extract information from a received DIO message */ void parseDIO(struct ip6_hdr *iph, uint8_t *buf, int len) { uint16_t pParentRank; struct in6_addr rDODAGID; uint16_t etx = 0xFFFF; parent_t tempParent; uint8_t parentIndex, myParent; uint16_t preRank; uint8_t tempPrf; bool newDodag = FALSE; struct dio_base_t *dio = (struct dio_base_t *)buf; struct dio_body_t* dio_body; struct dio_metric_header_t* dio_metric_header; struct dio_etx_t* dio_etx; struct dio_dodag_config_t* dio_dodag_config; // struct dio_prefix_t* dio_prefix; struct ip_iovec v[2]; struct ip6_ext dummy_ext; int hdr_off; buf += sizeof(struct dio_base_t); len -= sizeof(struct dio_base_t); dummy_ext.ip6e_len = (len - 8) / 8; v[0].iov_len = sizeof(dummy_ext); v[0].iov_base = (uint8_t *)&dummy_ext; v[0].iov_next = &v[1]; v[1].iov_len = len; v[1].iov_base = buf; v[1].iov_next = NULL; /* I am root */ if (nodeRank == ROOT_RANK) return; /* new iteration */ if (dio->version != VERSION && compare_ipv6(&dio->dodagID, &DODAGID)) { parentNum = 0; VERSION = dio->version; call RPLOF.resetRank(); nodeRank = INFINITE_RANK; minRank = INFINITE_RANK; resetValid(); } // if (dio->dagRank >= nodeRank && nodeRank != INFINITE_RANK) return; // printf("DIO in Rank %d %d %d %d\n", // ntohs(iph->ip6_src.s6_addr16[7]), // dio->dagRank, nodeRank, parentNum); // printf_in6addr(&iph->ip6_src); // printf("\n"); pParentRank = dio->dagRank; // DODAG ID in this DIO packet (received DODAGID) ip_memcpy((uint8_t *)&rDODAGID, (uint8_t *)&dio->dodagID, sizeof(struct in6_addr)); tempPrf = dio->flags & DIO_PREF_MASK; if (!compare_ipv6(&DODAGID, &DODAG_MAX) && !compare_ipv6(&DODAGID, &rDODAGID)) { // I have a DODAG but this packet is from a new DODAG if (Prf < tempPrf) { // ignore // printf("LESS PREFERENCE IGNORE \n"); ignore = TRUE; return; } else if (Prf > tempPrf) { // move // printf("MOVE TO NEW DODAG \n"); Prf = tempPrf; ip_memcpy((uint8_t *)&DODAGID, (uint8_t *)&rDODAGID, sizeof(struct in6_addr)); parentNum = 0; VERSION = dio->version; call RPLOF.resetRank(); nodeRank = INFINITE_RANK; minRank = INFINITE_RANK; // desiredParent = MAX_PARENT; resetValid(); newDodag = TRUE; } else { // it depends // printf("MOVE TO NEW DODAG %d %d\n", // compare_ipv6(&DODAGID, &DODAG_MAX), // compare_ipv6(&DODAGID, &rDODAGID)); newDodag = TRUE; } } else if (compare_ipv6(&DODAGID, &DODAG_MAX)) { // not belong to a DODAG yet // printf("TOTALLY NEW DODAG \n"); Prf = tempPrf; ip_memcpy((uint8_t *)&DODAGID, (uint8_t *)&rDODAGID, sizeof(struct in6_addr)); parentNum = 0; VERSION = dio->version; call RPLOF.resetRank(); nodeRank = INFINITE_RANK; minRank = INFINITE_RANK; //desiredParent = MAX_PARENT; newDodag = TRUE; resetValid(); } else { // same DODAG //printf("FROM SAME DODAG \n"); //Prf = tempPrf; // update prf } /////////////////////////////Collect data from DIOs///////////////////////////////// hdr_off = call IPPacket.findTLV(v, 0, RPL_DIO_TYPE_METRIC) - sizeof(struct ip6_ext); // printf("RPL: metric header off: %i\n", hdr_off); METRICID = 0; OCP = 0; // SDH : TODO : make some #defs for DODAG constants if (hdr_off >= 0) { // have a metric header dio_body = (struct dio_body_t *)(buf + hdr_off); dio_metric_header = (struct dio_metric_header_t *)(buf + hdr_off + 2); // printf("metric header %i %i %i\n", // dio_body->container_len, dio_metric_header->routing_obj_type, // dio_metric_header->object_len); if (dio_body->container_len >= sizeof(struct dio_metric_header_t) && dio_metric_header->routing_obj_type == RPL_ROUTE_METRIC_ETX && dio_metric_header->object_len == sizeof(struct dio_etx_t)) { // etx metric dio_etx = (struct dio_etx_t*)(dio_metric_header + 1); etx = dio_etx->etx; printf("RPL: ETX RECV %d \n", etx); METRICID = RPL_ROUTE_METRIC_ETX; } } else { etx = pParentRank * divideRank; //printf("No ETX %d \n", dio_body->type); } /* SDH : This is a routing header. apparently we don't look at this. */ // if (trackLength > 0 && dio_prefix->type == 3) { // trackLength -= sizeof(struct dio_prefix_t); // if (ignore == FALSE) { /* SDH : this will be a call to NeighborDiscovery */ /* although we might want to make a PrefixManager component... */ // New Prefix!!!! // TODO: Save prefix somewhere and make it a searchable command // } // } /* SDH : type 4 is a configuration header. */ hdr_off = call IPPacket.findTLV(v, 0, RPL_DIO_TYPE_DODAG) - sizeof(struct ip6_ext); // printf("RPL: dodag header off: %i\n", hdr_off); if (hdr_off >= 0 && !ignore) { dio_dodag_config = (struct dio_dodag_config_t *)(buf + hdr_off); // this is configuration header // printf("RPL: DODAG OPT > %d %d %d %d \n", METRICID, // dio_dodag_config->type, ignore, dio_dodag_config->ocp); OCP = dio_dodag_config->ocp; MAX_RANK_INCREASE = dio_dodag_config->MaxRankInc; // MIN_HOP_RANK_INCREASE = dio_dodag_config->MinHopRankInc; call RouteInfo.setDODAGConfig(dio_dodag_config->DIOIntDoubl, dio_dodag_config->DIOIntMin, dio_dodag_config->DIORedun, dio_dodag_config->MaxRankInc, dio_dodag_config->MinHopRankInc); call RPLOF.setMinHopRankIncrease(dio_dodag_config->MinHopRankInc); } ////////////////////////////////////////////////////////////////////////// // printf("PR %d NR %d OCP %d MID %d \n", // pParentRank, nodeRank, OCP, METRICID); // temporaily keep the parent information first ip_memcpy((uint8_t*)&tempParent.parentIP, (uint8_t*)&iph->ip6_src, sizeof(struct in6_addr)); tempParent.rank = pParentRank; tempParent.etx_hop = INIT_ETX; tempParent.valid = TRUE; tempParent.etx = etx; if ((!call RPLOF.objectSupported(METRICID) || !call RPLOF.OCP(OCP)) && parentNum == 0) { // either I dont know the metric object or I don't support the OF // printf("LEAF STATE! \n"); insertParent(tempParent); call RPLOF.recomputeRoutes(); //getNewRank(); no need to compute routes when I am going to stay as a leaf! nodeRank = INFINITE_RANK; leafState = TRUE; return; } if ((parentIndex = getParent(&iph->ip6_src)) != MAX_PARENT) { // parent already there and the rank is useful //printf("HOW many parents 1 ? %d %d \n", parentNum, newDodag); if (newDodag) { // old parent has to move to a new DODAG now if (parentNum != 0) { //chooseDesired(); // we do this to make sure that this parent is still the // best and it is worth moving call RPLOF.recomputeRoutes(); myParent = getParent(call RPLOF.getParent()); if (!compareParent(parentSet[myParent], tempParent)) { // the new dodag is not from my desired parent node Prf = tempPrf; ip_memcpy((uint8_t*)&DODAGID, (uint8_t*)&rDODAGID, sizeof(struct in6_addr)); parentNum = 0; VERSION = dio->version; resetValid(); insertParent(tempParent); call RPLOF.recomputeRoutes(); getNewRank(); } else { // I have a better node in the current DODAG so I am not moving! call RPLOF.recomputeRoutes(); getNewRank(); ignore = TRUE; } } else { // not likely to happen but this is a new DODAG... Prf = tempPrf; ip_memcpy((uint8_t*)&DODAGID, (uint8_t*)&rDODAGID, sizeof(struct in6_addr)); parentNum = 0; VERSION = dio->version; resetValid(); insertParent(tempParent); call RPLOF.recomputeRoutes(); getNewRank(); } } else { // this DIO is just from a parent that I know already, update // and re-evaluate // printf("known parent -- update\n"); parentSet[parentIndex].rank = pParentRank; // update rank parentSet[parentIndex].etx = etx; call RPLOF.recomputeRoutes(); getNewRank(); ignore = TRUE; } } else { // this parent is not in my routing table // printf("HOW many parents? %d \n", parentNum); if (parentNum > MAX_PARENT) // how do i share the parent count? return; // at this point know that its a meaningful packet from a new // node and we have space to store // printf("New parent %d %d %d\n", // ntohs(iph->ip6_src.s6_addr16[7]), tempParent.etx_hop, parentNum); if (newDodag) { // not only is this parent new but we have to move to a new DODAG now //printf("New DODAG \n"); if (parentNum != 0) { // make sure that I don't have an alternative path on this DODAG call RPLOF.recomputeRoutes(); myParent = getParent(call RPLOF.getParent()); if (!compareParent(parentSet[myParent], tempParent)) { // parentIndex == desiredParent, parentNum != 0, !compareParent // printf("changing DODAG\n"); Prf = tempPrf; ip_memcpy((uint8_t *)&DODAGID, (uint8_t *)&rDODAGID, sizeof(struct in6_addr)); parentNum = 0; VERSION = dio->version; resetValid(); insertParent(tempParent); call RPLOF.recomputeRoutes(); getNewRank(); } else { // do nothing ignore = TRUE; } } else { // This is the first DODAG I am registering ... or the once // before are all goners already // printf("First DODAG\n"); Prf = tempPrf; ip_memcpy((uint8_t *)&DODAGID, (uint8_t *)&rDODAGID, sizeof(struct in6_addr)); parentNum = 0; VERSION = dio->version; resetValid(); insertParent(tempParent); call RPLOF.recomputeRoutes(); getNewRank(); } } else { // its a new parent from the current DODAG .. so no need for // DODAG configuarion just insert // printf("Same DODAG %d \n", parentNum); insertParent(tempParent); call RPLOF.recomputeRoutes(); preRank = nodeRank; getNewRank(); } } } /* * Processing for incomming DIO, DAO, and DIS messages. * * SDH : we should not snoop on these from the forwarding engine; * instead we now go through the IPProtocols component to receive * them the normal way through the ICMP stack. Things like * verifying the checksum can go in there. * */ event void IP_DIO.recv(struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) { struct dio_base_t *dio; dio = (struct dio_base_t *) payload; if (!m_running) return; if (nodeRank != ROOT_RANK && dio->dagRank != 0xFFFF) parseDIO(iph, payload, len); // evict parent if the node is advertizing 0xFFFF; if (dio->dagRank == 0xFFFF && getParent(&iph->ip6_src) != MAX_PARENT) evictParent(getParent(&iph->ip6_src)); // leafState = FALSE; if (nodeRank > dio->dagRank || dio->dagRank == INFINITE_RANK) { if (!ignore) { /* SDH : where did this go? */ signal IP_DIO_Filter.recv(iph, payload, len, meta); } ignore = FALSE; } } command error_t IP_DIO_Filter.send(struct ip6_packet *msg) { return call IP_DIO.send(msg); } event void IPAddress.changed(bool global_valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLRoutingC.nc000066400000000000000000000050251207233610700213530ustar00rootroot00000000000000/* * Copyright (c) 2011 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLRoutingC.nc * @ author Stephen Dawson-Haggerty * @ author JeongGil Ko (John) */ /* Top-level component to wire together the RPL layers */ #include configuration RPLRoutingC { provides { interface StdControl; interface RootControl; } } implementation { components RPLRankC; components RPLRoutingEngineC; components RPLDAORoutingEngineC; /* we receive routing messages through the ICMP component, which recieves all packets with the ICMP */ components IPStackC; components new ICMPCodeDispatchC(ICMP_TYPE_RPL_CONTROL) as ICMP_RA; StdControl = RPLRoutingEngineC; StdControl = RPLRankC; /* Cancel below for no-downstream messages */ StdControl = RPLDAORoutingEngineC; RootControl = RPLRoutingEngineC; RPLRankC.ICMP_RA -> ICMP_RA; RPLDAORoutingEngineC.ICMP_RA -> ICMP_RA; IPStackC.RoutingControl -> RPLRoutingEngineC.StdControl; IPStackC.RoutingControl -> RPLDAORoutingEngineC.StdControl; } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLRoutingEngine.nc000066400000000000000000000045351207233610700224030ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLRoutingEngine.nc * @ author JeongGil Ko (John) */ #include #include interface RPLRoutingEngine{ command void resetTrickle(); command bool hasDODAG(); command error_t getDefaultRoute(struct in6_addr *next_hop); command uint16_t getRank(); command uint8_t getInstanceID(); command bool validInstance(uint8_t instanceID); command struct in6_addr* getDodagId(); // returns the default dodagid // below is called when sub type 4 DIOs are received command void setDODAGConfig(uint8_t DIOIntDouble, uint8_t DIOIntMin, uint8_t DIORedun, uint8_t MaxRankInc, uint8_t MinHopRankInc); command uint8_t getMOP(); command void setDTSN(uint8_t dtsn); command uint8_t getDTSN(); command void inconsistency(); } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLRoutingEngineC.nc000066400000000000000000000054741207233610700225110ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLRoutingEngineC.nc * @ author JeongGil Ko (John) */ #include #include configuration RPLRoutingEngineC{ provides { interface RootControl; interface StdControl; interface RPLRoutingEngine; // This is for the ForwardingEngine to use } } implementation{ components new RPLRoutingEngineP() as Routing; components MainC, RandomC; components new TimerMilliC() as TrickleTimer; components new TimerMilliC() as InitDISTimer; components new TimerMilliC() as VersionTimer; components IPAddressC; components LedsC, NoLedsC; components RPLRankC as RankC; components RPLDAORoutingEngineC; components new ICMPCodeDispatchC(ICMP_TYPE_RPL_CONTROL) as ICMP_RS; RootControl = Routing; StdControl = Routing; RPLRoutingEngine = Routing; Routing.IP_DIO -> RankC.IP_DIO_Filter; // This should be connected to RankC; Routing.IP_DIS -> ICMP_RS.IP[ICMPV6_CODE_DIS]; Routing.TrickleTimer -> TrickleTimer; Routing.InitDISTimer -> InitDISTimer; Routing.Random -> RandomC; Routing.RPLRankInfo -> RankC; Routing.IPAddress -> IPAddressC; Routing.Leds -> LedsC; Routing.RankControl -> RankC; Routing.RPLDAORoutingEngine -> RPLDAORoutingEngineC; Routing.IncreaseVersionTimer -> VersionTimer; } tinyos-2.1.2+dfsg/tos/lib/net/rpl/RPLRoutingEngineP.nc000066400000000000000000000502251207233610700225200ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * RPLRoutingEngineP.nc * @ author JeongGil Ko (John) */ #include #include #include #include "blip_printf.h" #include "RPL.h" generic module RPLRoutingEngineP() { provides { interface RootControl; interface StdControl; interface RPLRoutingEngine as RPLRouteInfo; } uses { interface IP as IP_DIO; /* filtered DIO messages from the rank engine */ interface IP as IP_DIS; /* DIS messages from the ICMP driver */ interface Timer as TrickleTimer; interface Timer as InitDISTimer; interface Timer as IncreaseVersionTimer; interface Random; interface RPLRank as RPLRankInfo; interface IPAddress; interface Leds; interface StdControl as RankControl; interface RPLDAORoutingEngine; } } implementation{ #define RPL_GLOBALADDR /* Declare Global Variables */ uint32_t tricklePeriod; uint32_t randomTime; bool sentDIOFlag = FALSE; bool I_AM_ROOT = FALSE; bool I_AM_LEAF = FALSE; bool running = FALSE; bool hasDODAG = FALSE; bool riskHigh = FALSE; uint16_t node_rank = INFINITE_RANK; uint16_t LOWRANK = INFINITE_RANK; uint8_t GROUND_STATE = 1; uint8_t RPLInstanceID = 0; struct in6_addr DODAGID; uint8_t DODAGVersionNumber = 0; uint8_t MOP = RPL_MOP_Storing_No_Multicast; uint8_t DAG_PREF = 7; uint8_t redunCounter = 0xFF; uint8_t doubleCounter = 0; uint8_t DIOIntDouble = 10; uint8_t DIOIntMin = 8; uint8_t DIORedun = 0xFF; uint16_t MinHopRankInc = 1; uint16_t MaxRankInc = 3; uint8_t DTSN = 2; uint32_t countdio = 0; uint32_t countdis = 0; bool UNICAST_DIO = FALSE; struct in6_addr DEF_PREFIX; struct in6_addr ADDR_MY_IP; struct in6_addr ROOT_ADDR; struct in6_addr MULTICAST_ADDR; struct in6_addr UNICAST_DIO_ADDR; /* Define Functions and Tasks */ void resetTrickleTime(); void chooseAdvertiseTime(); void computeTrickleRemaining(); void nextTrickleTime(); void inconsistencyDetected(); void poison(); task void sendDIOTask(); task void sendDISTask(); task void init(); task void initDIO(); /* Start the routing with DIS message probing */ task void init() { #ifdef RPL_STORING_MODE MOP = RPL_MOP_Storing_No_Multicast; #else MOP = RPL_MOP_No_Storing; #endif #ifdef RPL_GLOBALADDR call IPAddress.getGlobalAddr(&ADDR_MY_IP); #else call IPAddress.getLLAddr(&ADDR_MY_IP); #endif ROOT_RANK = MinHopRankInc; /* SDH : FF02::2 -- link-local all-routers group? */ memset(MULTICAST_ADDR.s6_addr, 0, 16); MULTICAST_ADDR.s6_addr[0] = 0xFF; MULTICAST_ADDR.s6_addr[1] = 0x2; MULTICAST_ADDR.s6_addr[15] = 0x1A; if (I_AM_ROOT) { #ifdef RPL_GLOBALADDR call IPAddress.getGlobalAddr(&DODAGID); #else call IPAddress.getLLAddr(&DODAGID); #endif /* Global recovery every 60 mins */ //call IncreaseVersionTimer.startPeriodic(60*60*1024UL); post initDIO(); } else { call InitDISTimer.startPeriodic(DIS_INTERVAL); } } /* When finding a DODAG post initDIO()*/ task void initDIO() { if (I_AM_ROOT) { call RPLRouteInfo.resetTrickle(); } } task void computeRemaining() { computeTrickleRemaining(); } task void sendDIOTask() { struct ip6_packet pkt; struct ip_iovec v[1]; uint8_t data[60]; struct dio_base_t msg; struct dio_body_t body; struct dio_metric_header_t metric_header; struct dio_etx_t etx_value; struct dio_dodag_config_t dodag_config; uint16_t length; /* struct in6_addr next_hop; */ /* if ((call RPLRankInfo.nextHop(&DEF_PREFIX, &next_hop)) != SUCCESS) */ /* return; */ if ((!running) || (!hasDODAG) /* || ((redunCounter < DIORedun) && (DIORedun != 0xFF))*/ ) { // printf("RPL: NoTxDIO %d %d %d\n", redunCounter, DIORedun, hasDODAG); return; } //call RPLDAORoutingEngine.startDAO(); // call IPAddress.setSource(&pkt.ip6_hdr); msg.icmpv6.type = ICMP_TYPE_RPL_CONTROL; msg.icmpv6.code = ICMPV6_CODE_DIO; msg.icmpv6.checksum = 0; msg.flags = 0; msg.flags = GROUND_STATE << 7; msg.flags |= MOP << DIO_MOP_SHIFT; msg.flags |= DAG_PREF << 0; msg.version = DODAGVersionNumber; msg.instance_id.id = RPLInstanceID; msg.dtsn = DTSN; memcpy(&msg.dodagID, &DODAGID, sizeof(struct in6_addr)); if (I_AM_ROOT) { #ifdef RPL_GLOBALADDR call IPAddress.getGlobalAddr(&DODAGID); #else call IPAddress.getLLAddr(&DODAGID); #endif msg.dagRank = ROOT_RANK; } else { msg.dagRank = call RPLRankInfo.getRank(&ADDR_MY_IP); } if (!I_AM_LEAF) { dodag_config.type = RPL_DODAG_CONFIG_TYPE; dodag_config.length = 14; dodag_config.flags = 0; dodag_config.A = 0; // no auth dodag_config.PCS = 0; #ifdef RPL_OF_MRHOF dodag_config.ocp = 1; //MRHOF #else dodag_config.ocp = 0; //OF0 #endif dodag_config.default_lifetime = 0xFF;//6; // six dodag_config.lifetime_unit = 0xFFFF;//3600; // hours dodag_config.DIOIntDoubl = DIOIntDouble; dodag_config.DIOIntMin = DIOIntMin; dodag_config.DIORedun = DIORedun; dodag_config.MaxRankInc = MaxRankInc; dodag_config.MinHopRankInc = MinHopRankInc; dodag_config.reserved = 0; // For now just go with etx as the only metric etx_value.etx = call RPLRankInfo.getEtx(); metric_header.routing_obj_type = RPL_ROUTE_METRIC_ETX; // for etx metric_header.reserved = 0; metric_header.R_flag = 0; metric_header.G_flag = 1; metric_header.A_flag = 0; // aggregate additive! metric_header.O_flag = 0; metric_header.C_flag = 0; metric_header.object_len = 2; body.type = RPL_DODAG_METRIC_CONTAINER_TYPE; // metric container body.container_len = 6; { uint8_t *cur = (uint8_t *)&data; #define ADD_SECTION(SRC, LEN) ip_memcpy(cur, (uint8_t *)(SRC), LEN);\ cur += (LEN); #ifdef RPL_OF_MRHOF length = sizeof(struct dio_base_t) + sizeof(struct dio_body_t) + sizeof(struct dio_metric_header_t) + sizeof(struct dio_etx_t) + sizeof(struct dio_dodag_config_t); ADD_SECTION(&msg, sizeof(struct dio_base_t)); ADD_SECTION(&body, sizeof(struct dio_body_t)); ADD_SECTION(&metric_header, sizeof(struct dio_metric_header_t)); ADD_SECTION(&etx_value, sizeof(struct dio_etx_t)); ADD_SECTION(&dodag_config, sizeof(struct dio_dodag_config_t)); #else length = sizeof(struct dio_base_t) + sizeof(struct dio_dodag_config_t); ADD_SECTION(&msg, sizeof(struct dio_base_t)); ADD_SECTION(&dodag_config, sizeof(struct dio_dodag_config_t)); #endif #undef ADD_SECTION } // TODO: add prefix info (optional) v[0].iov_base = (uint8_t*)&data; v[0].iov_len = length; v[0].iov_next = NULL; pkt.ip6_hdr.ip6_nxt = IANA_ICMP; pkt.ip6_hdr.ip6_plen = htons(length); pkt.ip6_data = &v[0]; //iov_print(&v[0]); } else { length = sizeof(struct dio_base_t); pkt.ip6_hdr.ip6_nxt = IANA_ICMP; pkt.ip6_hdr.ip6_plen = htons(length); v[0].iov_base = (uint8_t *)&msg; v[0].iov_len = sizeof(struct dio_base_t); v[0].iov_next = NULL; pkt.ip6_data = &v[0]; } // printf("RPL: \n >>>>>> TxDIO etx %d %d %d %lu \n", // call RPLRankInfo.getEtx(), // ntohs(DODAGID.s6_addr16[7]), msg.dagRank, tricklePeriod); printf("RPL: TXDIO %d %lu \n", TOS_NODE_ID, ++countdio); // printf("RPL: RANK %d %d %d\n", // call RPLRankInfo.getRank(&ADDR_MY_IP), // call RPLRankInfo.getEtx(), // call RPLRankInfo.hasParent()); if (UNICAST_DIO) { UNICAST_DIO = FALSE; memcpy(&pkt.ip6_hdr.ip6_dst, &UNICAST_DIO_ADDR, 16); } else { memcpy(&pkt.ip6_hdr.ip6_dst, &MULTICAST_ADDR, 16); } call IPAddress.getLLAddr(&pkt.ip6_hdr.ip6_src); // call IPAddress.getGlobalAddr(&pkt.ip6_hdr.ip6_src); // memcpy(&pkt.ip6_hdr.ip6_src, &ADDR_MY_IP, 16); call IP_DIO.send(&pkt); } task void sendDISTask() { struct ip6_packet pkt; struct ip_iovec v[1]; struct dis_base_t msg; uint16_t length; if (!running) return; length = sizeof(struct dis_base_t); msg.icmpv6.type = ICMP_TYPE_RPL_CONTROL; msg.icmpv6.code = ICMPV6_CODE_DIS; msg.icmpv6.checksum = 0; // pkt.ip6_hdr.ip6_vfc = IPV6_VERSION; pkt.ip6_hdr.ip6_nxt = IANA_ICMP; pkt.ip6_hdr.ip6_plen = htons(length); v[0].iov_base = (uint8_t *)&msg; v[0].iov_len = sizeof(struct dis_base_t); v[0].iov_next = NULL; pkt.ip6_data = &v[0]; memcpy(&pkt.ip6_hdr.ip6_dst, &MULTICAST_ADDR, 16); call IPAddress.getLLAddr(&pkt.ip6_hdr.ip6_src); //call IPAddress.getGlobalAddr(&pkt.ip6_hdr.ip6_src); // printf("RPL: \n >>>>>> TxDIS\n"); // printf("RPL: >> sendDIS %d %lu \n", TOS_NODE_ID, ++countdis); call IP_DIS.send(&pkt); } uint16_t INCONSISTENCY_COUNT = 0; void inconsistencyDetected() { // when inconsistency detected, reset trickle INCONSISTENCY_COUNT ++; // inconsistency on my on node detected? call RPLRankInfo.inconsistencyDetected(/*&ADDR_MY_IP*/); /* JK: This reaction is TinyRPL specific -- to reduce the amount of DIO traffic -- helps when minmal leaf nodes exist */ call RPLRouteInfo.resetTrickle(); /* JK: Below is the Spec way of reacting to inconsistencies */ /* if (call RPLRankInfo.hasParent()) call RPLRouteInfo.resetTrickle(); else{ call TrickleTimer.stop(); call InitDISTimer.startPeriodic(1024); } */ } void poison() { node_rank = INFINITE_RANK; call RPLRouteInfo.resetTrickle(); } void resetTrickleTime() { call TrickleTimer.stop(); tricklePeriod = 2 << (DIOIntMin-1); redunCounter = 0; doubleCounter = 0; } void chooseAdvertiseTime() { if (!running) { return; } call TrickleTimer.stop(); randomTime = tricklePeriod; randomTime /= 2; randomTime += call Random.rand32() % randomTime; call TrickleTimer.startOneShot(randomTime); } void computeTrickleRemaining() { // start timer for the remainder time (TricklePeriod - randomTime) uint32_t remain; remain = tricklePeriod - randomTime; sentDIOFlag = TRUE; call TrickleTimer.startOneShot(remain); } void nextTrickleTime() { sentDIOFlag = FALSE; if (doubleCounter < DIOIntDouble) { doubleCounter ++; tricklePeriod *= 2; } if (!call TrickleTimer.isRunning()) chooseAdvertiseTime(); } /********************* RPLRouteInfo *********************/ command void RPLRouteInfo.inconsistency() { inconsistencyDetected(); } command bool RPLRouteInfo.hasDODAG() { return hasDODAG; } command uint8_t RPLRouteInfo.getMOP() { return MOP; } command error_t RPLRouteInfo.getDefaultRoute(struct in6_addr *next) { return call RPLRankInfo.getDefaultRoute(next); } command void RPLRouteInfo.setDODAGConfig(uint8_t IntDouble, uint8_t IntMin, uint8_t Redun, uint8_t RankInc, uint8_t HopRankInc) { DIOIntDouble = IntDouble; DIOIntMin = IntMin; DIORedun = Redun; MaxRankInc = RankInc; MinHopRankInc = HopRankInc; // printf("RPL: Config %d %d %d %d %d \n", // IntDouble, IntMin, Redun, RankInc, HopRankInc); } command struct in6_addr* RPLRouteInfo.getDodagId() { return &DODAGID; } command uint8_t RPLRouteInfo.getInstanceID() { return RPLInstanceID; } command bool RPLRouteInfo.validInstance(uint8_t instanceID) { return call RPLRankInfo.validInstance(instanceID); } command void RPLRouteInfo.resetTrickle() { resetTrickleTime(); if (!call TrickleTimer.isRunning()) chooseAdvertiseTime(); } command uint16_t RPLRouteInfo.getRank() { return call RPLRankInfo.getRank(&ADDR_MY_IP); } command void RPLRouteInfo.setDTSN(uint8_t dtsn) { DTSN = dtsn; } command uint8_t RPLRouteInfo.getDTSN() { return DTSN; } /********************* RootControl *********************/ command error_t RootControl.setRoot() { I_AM_ROOT = TRUE; hasDODAG = TRUE; call RPLRankInfo.declareRoot(); return SUCCESS; } command error_t RootControl.unsetRoot() { I_AM_ROOT = FALSE; hasDODAG = FALSE; call RPLRankInfo.cancelRoot(); return SUCCESS; } command bool RootControl.isRoot() { return I_AM_ROOT; } /********************* StdControl *********************/ command error_t StdControl.start() { // printf("RPL: STARTING\n"); if (!running) { post init(); call RankControl.start(); running = TRUE; } return SUCCESS; } command error_t StdControl.stop() { running = FALSE; call RankControl.stop(); call TrickleTimer.stop(); return SUCCESS; } event void InitDISTimer.fired() { post sendDISTask(); } event void IncreaseVersionTimer.fired() { // printf("RPL: >>>> Version Increase!! \n"); DODAGVersionNumber++; call RPLRouteInfo.resetTrickle(); } event void TrickleTimer.fired() { if (sentDIOFlag) { // DIO is already sent and trickle period has passed // increase tricklePeriod nextTrickleTime(); } else { // send DIO, randomly selected time has passed // compute the remaining time // Change back to DIO post sendDIOTask(); //post sendDISTask(); post computeRemaining(); } } bool compare_ip6_addr(struct in6_addr *node1, struct in6_addr *node2) { //done return !memcmp(node1, node2, sizeof(struct in6_addr)); } event void RPLRankInfo.parentRankChange() { // type 6 inconsistency inconsistencyDetected(); } /* SDH : * This is called to process new routing update messages, I think. */ event void IP_DIS.recv(struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) { // printf("RPL: Receiving DIS %d\n", TOS_NODE_ID); if (!running) return; // I received a DIS if (I_AM_LEAF) { // I am a leaf so don't do anything return; } if (call IPAddress.isLocalAddress(&iph->ip6_dst)) { // This is a multicast message: reset Trickle if (iph->ip6_dst.s6_addr[0] == 0xff && ((iph->ip6_dst.s6_addr[1] & 0xf) <= 0x3)) { call RPLRouteInfo.resetTrickle(); } else { UNICAST_DIO = TRUE; memcpy(&UNICAST_DIO_ADDR, &(iph->ip6_src), sizeof(struct in6_addr)); post sendDIOTask(); } } } event void IP_DIO.recv(struct ip6_hdr *iph, void *payload, size_t len, struct ip6_metadata *meta) { struct dio_base_t *dio = (struct dio_base_t *)payload; if (!running) return; if (I_AM_ROOT) { return; } if (DIORedun != 0xFF) { redunCounter ++; } else { redunCounter = 0xFF; } /* JK: The if () statement below is TinyRPL specific and ties up with the inconsistencyDectect case above */ if (dio->dagRank == INFINITE_RANK) { if ((call RPLRankInfo.getRank(&ADDR_MY_IP) != INFINITE_RANK) && ((call InitDISTimer.getNow()%2) == 1)) { // send DIO if I can help! // printf("RPL: Infinite Rank RX %d\n", TOS_NODE_ID); post sendDIOTask(); } return; } if (call RPLRankInfo.hasParent() && call InitDISTimer.isRunning()) { call InitDISTimer.stop(); // no need for DIS messages anymore } // received DIO message I_AM_LEAF = call RPLRankInfo.isLeaf(); if ((I_AM_LEAF && !hasDODAG) || !compare_ip6_addr(&DODAGID,&dio->dodagID)) { // If I am leaf I do not send any DIO messages // assume that this DIO is from the DODAG with the // highest preference and is the preferred parent's DIO packet? // OR // If a new DODAGID is reported probably the Rank layer // already took care of all the operations and decided to switch to the // new DODAGID // printf("RPL: FOUND new dodag %d %d %d\n", // I_AM_LEAF, hasDODAG, compare_ip6_addr(&DODAGID,&dio->dodagID)); hasDODAG = TRUE; // assume that this DIO is from the DODAG with the // highest preference and is the preferred parent's DIO packet? goto accept_dodag; } if (RPLInstanceID == dio->instance_id.id && compare_ip6_addr(&DODAGID, &dio->dodagID) && DODAGVersionNumber != dio->version && hasDODAG) { // sequence number has changed - new iteration; restart the // trickle timer and configure DIO with new sequence number // printf("RPL: New iteration %d %d %d\n", // dio->instance_id.id, dio->version, I_AM_LEAF); DODAGVersionNumber = dio->version; call RPLRouteInfo.resetTrickle(); // type 3 inconsistency } else if (call RPLRankInfo.getRank(&ADDR_MY_IP) != node_rank && hasDODAG && node_rank != INFINITE_RANK) { /* inconsistency detected! because rank is not what I previously advertised */ // printf("RPL: ICD %d\n", node_rank); // DO I Still need this? if (call RPLRankInfo.getRank(&ADDR_MY_IP) > LOWRANK + MaxRankInc && node_rank != INFINITE_RANK) { hasDODAG = FALSE; node_rank = INFINITE_RANK; } else { if (LOWRANK > call RPLRankInfo.getRank(&ADDR_MY_IP)) { LOWRANK = call RPLRankInfo.getRank(&ADDR_MY_IP); } node_rank = call RPLRankInfo.getRank(&ADDR_MY_IP); } // type 2 inconsistency inconsistencyDetected(); return; } if (call RPLRankInfo.hasParent() && !hasDODAG) { goto accept_dodag; } else if (!call RPLRankInfo.hasParent() && !I_AM_ROOT) { /* this else if can lead to errors!! */ /* I have no parent at this point! */ // printf("RPL: noparent %d %d\n", node_rank, call RPLRankInfo.hasParent()); hasDODAG = FALSE; GROUND_STATE = dio->flags & DIO_GROUNDED_MASK; //GROUND_STATE = dio->flags.flags_element.grounded; call TrickleTimer.stop(); // new add call RPLRouteInfo.resetTrickle(); call RPLDAORoutingEngine.startDAO(); } return; accept_dodag: // printf("RPL: new dodag \n"); // assume that this DIO is from the DODAG with the // highest preference and is the preferred parent's DIO packet? hasDODAG = TRUE; MOP = (dio->flags & DIO_MOP_MASK) >> DIO_MOP_SHIFT; DAG_PREF = dio->flags & DIO_PREF_MASK; RPLInstanceID = dio->instance_id.id; memcpy(&DODAGID, &dio->dodagID, sizeof(struct in6_addr)); DODAGVersionNumber = dio->version; GROUND_STATE = dio->flags & DIO_GROUNDED_MASK; //GROUND_STATE = dio->flags.flags_element.grounded; call RPLRouteInfo.resetTrickle(); return; } event void IPAddress.changed(bool global_valid) {} } tinyos-2.1.2+dfsg/tos/lib/net/srp/000077500000000000000000000000001207233610700167265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouteEngine.h000066400000000000000000000034761207233610700225160ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef SRCROUTEENGINE_H #define SRCROUTEENGINE_H //len == msg len including sr header. len is set to payload len + header on send, not altered during forwarding typedef struct { message_t* msg; uint8_t len; uint8_t client; } srf_queue_entry_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouteEngineC.nc000066400000000000000000000055061207233610700227660ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ #include "SourceRouteEngine.h" generic configuration SourceRouteEngineC(am_id_t AMId) { provides { interface StdControl; interface SourceRouteSend[uint8_t client]; interface SourceRoutePacket; interface Receive[sourceroute_id_t id]; } uses { interface SourceRouteId[uint8_t client]; } } implementation { enum { CLIENT_COUNT = uniqueCount(UQ_SRP_CLIENT), FORWARD_COUNT = 12, QUEUE_SIZE = CLIENT_COUNT + FORWARD_COUNT, }; components MainC; components new AMSenderC(AMId) as SubSend; components new AMReceiverC(AMId) as SubReceive; components ActiveMessageC; components SourceRouteEngineP as Engine; components new QueueC(srf_queue_entry_t*, QUEUE_SIZE) as SendQueue; components new PoolC(srf_queue_entry_t, FORWARD_COUNT) as QEntryPool; components new PoolC(message_t, FORWARD_COUNT) as MessagePool; Engine.SubReceive -> SubReceive; Engine.SubSend -> SubSend; Engine.SubControl -> ActiveMessageC; Engine.SendQueue -> SendQueue; Engine.QEntryPool -> QEntryPool; Engine.MessagePool -> MessagePool; MainC.SoftwareInit -> Engine.Init; StdControl = Engine; SourceRouteSend = Engine; SourceRoutePacket = Engine; Receive = Engine; Engine.SourceRouteId = SourceRouteId; } tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouteEngineP.nc000066400000000000000000000310411207233610700227740ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ #include "SourceRouteEngine.h" module SourceRouteEngineP { provides { interface StdControl; interface SourceRouteSend[uint8_t client]; interface SourceRoutePacket; interface Receive[sourceroute_id_t id]; interface Init; } uses { interface SourceRouteId[uint8_t client]; interface AMSend as SubSend; interface Receive as SubReceive; interface Queue as SendQueue; interface Pool as QEntryPool; interface Pool as MessagePool; interface SplitControl as SubControl; } } implementation { enum{ CLIENT_COUNT = uniqueCount(UQ_SRP_CLIENT), FORWARD_CLIENT = 0xff, }; //Forwarding engine states enum { S_OFF = 0, S_IDLE = 1, S_SENDING = 2, S_ERROR = 3, }; //client states enum{ SC_IDLE = 0, SC_SENDING = 1, }; //forwarding engine state var uint8_t state = S_OFF; uint8_t seqno; //client variables //static space for clients srf_queue_entry_t clientEntries[CLIENT_COUNT]; //client statuses uint8_t clientStatus[CLIENT_COUNT]; sr_header_t* getSRPHeader(message_t* msg); void printSRPHeader(sr_header_t* hdr) { dbg("SRPDebug", "header %p srlen %d hops_left %d seqno %d payload_id %d\n", hdr, hdr->sr_len, hdr->hops_left, hdr->seqno, hdr->payload_id); } void printQE(srf_queue_entry_t* qe) { dbg("SRPDebug", "QE: msg %p len %d client %d\n", qe->msg, qe->len, qe->client); } command error_t Init.init(){ uint8_t i; for (i=0; i < CLIENT_COUNT; i++) { clientEntries[i].client = i; } return SUCCESS; } void setState(uint8_t s) { if (state != S_ERROR) { dbg("SRPDebug", "setState %d -> %d\n", state, s); state = s; } else { dbg("SRPDebug", "setState Ignore %d -> %d\n", state, s); } } task void sendTask() { srf_queue_entry_t* qe; error_t err; dbg("SRPDebug", "sendTask\n"); if (state == S_IDLE) { dbg("SRPDebug", "state OK\n"); if (call SendQueue.size() == 0) { dbg("SRPDebug", "queue empty\n"); return; } else { dbg("SRPDebug", "queue not empty\n"); state = S_SENDING; qe = call SendQueue.head(); printQE(qe); dbg("SRPInfo", "Sending QE %p msg %p to %d. src %d dest %d seqno %d\n", qe, qe->msg, call SourceRoutePacket.getNextHop(qe->msg), (call SourceRoutePacket.getRoute(qe->msg))[0], call SourceRoutePacket.getDest(qe->msg), getSRPHeader(qe->msg)->seqno); err = call SubSend.send(call SourceRoutePacket.getNextHop(qe->msg), qe -> msg, qe->len); if ( err == SUCCESS ) { dbg("SRPDebug", "sendTask subsend OK\n"); } else { dbg("SRPError", "ERROR sendTask subsend failed\n"); //clean up from failed send. signal local clients or drop forwarding packets state = S_IDLE; if (qe->client != FORWARD_CLIENT) { clientStatus[qe->client] = SC_IDLE; signal SourceRouteSend.sendDone[qe->client](qe->msg, FAIL); } call SendQueue.dequeue(); } } } else { dbg("SRPDebug", "sendTask: skipping (in state %d)\n", state); } } /** * SourceRouteSend commands */ command error_t SourceRouteSend.send[uint8_t client](am_addr_t *path, uint8_t pathLen, message_t* msg, uint8_t len) { sr_header_t* hdr; //NOTE this is only here for the workaround required due to nx_am_addr v. am_addr in SourceRoutePacket nx_am_addr_t nxPath[SRP_MAX_PATHLEN]; uint8_t i; dbg("SRPDebug", "Send from %d %p\n", client, msg); if (state == S_OFF) { return EOFF; } //busy/fail if client is already sending or no space if (clientStatus[client] == SC_SENDING) { return EBUSY; } if ( call SendQueue.size() == call SendQueue.maxSize() ) { return FAIL; } //NOTE: setting route is unsafe with memcpy as-is (am_addr_t vs nx_am_addr_t) //would like to do: // call SourceRoutePacket.setRoute(msg, path, pathLen); //this is the workaround until SourceRoutePacket.setRoute signature changes for (i = 0; i < pathLen; i++) { nxPath[i] = path[i]; } call SourceRoutePacket.setRoute(msg, nxPath, pathLen); hdr = getSRPHeader(msg); hdr -> payload_id = call SourceRouteId.fetch[client](); hdr -> seqno = seqno++; //set hops_left to path length - 2 (NOTE e.g. one-hop path has S, D is of length 2. when a packet is received with hops_left = 0, it is at the destination) hdr -> hops_left = pathLen - 2; clientStatus[client] = SC_SENDING; if (call SendQueue.enqueue(&clientEntries[client]) == SUCCESS) { clientEntries[client].msg = msg; //NOTE: variable-length path will change this clientEntries[client].len = len + sizeof(sr_header_t); post sendTask(); printSRPHeader(hdr); return SUCCESS; } else { clientStatus[client] = SC_IDLE; return FAIL; } } command void* SourceRouteSend.getPayload[uint8_t client](message_t* msg, uint8_t len) { if (len > call SourceRouteSend.maxPayloadLength[client]()) { return NULL; } else { return call SubSend.getPayload(msg, len + sizeof(sr_header_t)) + sizeof(sr_header_t); } } command uint8_t SourceRouteSend.maxPayloadLength[uint8_t client]() { return call SubSend.maxPayloadLength() - sizeof(sr_header_t); } command error_t SourceRouteSend.cancel[uint8_t client](message_t* msg) { //TODO: SourceRouteSend.cancel: find msg in queue and remove it if possible return FAIL; } /** * SubSend */ event void SubSend.sendDone(message_t* msg, error_t err) { srf_queue_entry_t* qe; dbg("SRPDebug", "SubSend.sendDone %d %p\n",err, msg); if (state != S_SENDING) { dbg("SRPError", "ERROR bad state: %d\n", state); setState(S_ERROR); } else { state = S_IDLE; qe = call SendQueue.dequeue(); if (qe -> msg != msg ) { dbg("SRPError", "ERROR queue message != sent message %p != %p \n", msg, qe->msg); setState(S_ERROR); return; } if (! call SendQueue.empty()) { post sendTask(); } if (qe -> client == FORWARD_CLIENT) { dbg("SRPDebug", "Finished forwarding qe %p msg %p, put them back in pools\n", qe, msg); call MessagePool.put(msg); call QEntryPool.put(qe); } else { dbg("SRPDebug", "Finished sending for %d\n", qe->client); clientStatus[qe->client] = SC_IDLE; signal SourceRouteSend.sendDone[qe->client](msg, err); } } dbg("SRPInfo","After SendDone: state %d SendQueue len %d, QEPool size %d, MsgPool size %d\n", state, call SendQueue.size(), call QEntryPool.size(), call MessagePool.size()); } /** * SubReceive */ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { sr_header_t* hdr; srf_queue_entry_t* qe; dbg("SRPDebug", "receive m %p p %p l %d\n", msg, payload, len); hdr = getSRPHeader(msg); printSRPHeader(hdr); //remove header/signal up if (hdr -> hops_left == 0) { return signal Receive.receive[hdr -> payload_id](msg, call SourceRouteSend.getPayload[0](msg, len - sizeof(sr_header_t)), len - sizeof(sr_header_t)); } else { dbg("SRPDebug", "forwarding %p\n", msg); if ( call SendQueue.size() < call SendQueue.maxSize() && ! call MessagePool.empty() && ! call QEntryPool.empty() ) { hdr-> hops_left--; qe = call QEntryPool.get(); qe -> client = FORWARD_CLIENT; qe -> len = len; qe -> msg = msg; call SendQueue.enqueue(qe); post sendTask(); return call MessagePool.get(); } else { dbg("SRPError", "ERROR queue full or message pool empty or queue entry pool empty\n"); return msg; } } } /** * SourceRoutePacket commands */ sr_header_t* getSRPHeader(message_t* msg) { sr_header_t* ret = (sr_header_t*)call SubSend.getPayload(msg, sizeof(sr_header_t)); return ret; } command error_t SourceRoutePacket.clearRoute(message_t *msg) { //NOTE that if the route goes in the footer or is variable-length, we can't safely overwrite the values in it (space might be used for payload). memset(getSRPHeader(msg)->route, 0, sizeof(nx_am_addr_t)*SRP_MAX_PATHLEN); getSRPHeader(msg)->sr_len = 0; return SUCCESS; } command error_t SourceRoutePacket.setRoute(message_t *msg, nx_am_addr_t *path, uint8_t len) { sr_header_t* hdr = getSRPHeader(msg); hdr -> sr_len = len; memcpy(hdr->route, path, len * sizeof(nx_am_addr_t)); return FAIL; } command nx_am_addr_t* SourceRoutePacket.getRoute(message_t *msg) { return getSRPHeader(msg) -> route; } command uint8_t SourceRoutePacket.getRouteLen(message_t *msg) { return getSRPHeader(msg) -> sr_len; } command error_t SourceRoutePacket.setRouteLen(message_t *msg, uint8_t len) { getSRPHeader(msg) -> sr_len = len; return SUCCESS; } //NOTE: The hops_left field is decremented when the packet is enqueued (i.e. at forward, not at sendTask) //NOTE: When a packet reaches the destination, hops_left is 0. //NOTE: So, getNextHop should return the destination addr when hops_left is 0. command am_addr_t SourceRoutePacket.getNextHop(message_t *msg) { sr_header_t* hdr = getSRPHeader(msg); return (call SourceRoutePacket.getRoute(msg))[hdr->sr_len - 1 - hdr->hops_left ]; } command am_addr_t SourceRoutePacket.getDest(message_t *msg) { sr_header_t* hdr = getSRPHeader(msg); return (call SourceRoutePacket.getRoute(msg))[hdr->sr_len - 1]; } command am_addr_t SourceRoutePacket.getSource(message_t *msg) { sr_header_t* hdr = getSRPHeader(msg); return (call SourceRoutePacket.getRoute(msg))[0]; } command uint8_t SourceRoutePacket.getHopsLeft(message_t *msg) { sr_header_t* hdr = getSRPHeader(msg); return hdr->hops_left ; } command error_t SourceRoutePacket.setHopsLeft(message_t *msg, uint8_t hopsLeft) { getSRPHeader(msg) -> hops_left = hopsLeft; return SUCCESS; } command uint8_t SourceRoutePacket.getSeqNo(message_t *msg) { return getSRPHeader(msg) -> seqno; } /** * StdControl commands. should it be splitcontrol? */ command error_t StdControl.start() { setState(S_IDLE); return SUCCESS; } command error_t StdControl.stop() { setState(S_OFF); return SUCCESS; } /** * SubControl events. */ event void SubControl.startDone(error_t error) { setState(S_IDLE); //OK to start forwarding. } event void SubControl.stopDone(error_t error) { setState(S_OFF); //stop forwarding: should tell clients that the radio is off? } /** * Defaults */ default event void SourceRouteSend.sendDone[uint8_t client](message_t *msg, error_t error) { } default event message_t * Receive.receive[sourceroute_id_t sourcerouteid](message_t *msg, void *payload, uint8_t len) { return msg; } default command sourceroute_id_t SourceRouteId.fetch[uint8_t client]() { return 0; } } tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouteId.nc000066400000000000000000000032351207233610700220070ustar00rootroot00000000000000/* * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ interface SourceRouteId { command sourceroute_id_t fetch(); } tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouteIdP.nc000066400000000000000000000034341207233610700221300ustar00rootroot00000000000000/** * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ generic module SourceRouteIdP(sourceroute_id_t id) { provides { interface SourceRouteId; } } implementation { command sourceroute_id_t SourceRouteId.fetch() { return id; } } tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRoutePacket.nc000066400000000000000000000047071207233610700226670ustar00rootroot00000000000000// $Id: LqiForwardingEngineP.nc,v 1.16 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2010 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Omprakash Gnawali */ /* applications use this interface to get/set metadata for source routing */ interface SourceRoutePacket { command error_t clearRoute(message_t *msg); //NOTE: mismatch with SourceRouteSend.send (nx_am_addr_t vs. am_addr_t) command error_t setRoute(message_t *msg, nx_am_addr_t *path, uint8_t len); command nx_am_addr_t* getRoute(message_t *msg); command uint8_t getRouteLen(message_t *msg); command error_t setRouteLen(message_t *msg, uint8_t len); command am_addr_t getNextHop(message_t *msg); command am_addr_t getDest(message_t *msg); command am_addr_t getSource(message_t *msg); command uint8_t getHopsLeft(message_t *msg); command error_t setHopsLeft(message_t *msg, uint8_t hopsLeft); command uint8_t getSeqNo(message_t *msg); } tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouteReceiverC.nc000066400000000000000000000034471207233610700233270ustar00rootroot00000000000000/** * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ generic configuration SourceRouteReceiverC(sourceroute_id_t srID) { provides { interface Receive; } } implementation { components SourceRoutingC; Receive = SourceRoutingC.Receive[srID]; } tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouteSend.nc000066400000000000000000000041641207233610700223460ustar00rootroot00000000000000// $Id: LqiForwardingEngineP.nc,v 1.16 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2010 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Omprakash Gnawali */ /* applications use this interface to send packet using the interface */ #include "SourceRouting.h" interface SourceRouteSend { //TODO: Mismatch with SourceRoutePacket.getPath command error_t send(am_addr_t *path, uint8_t pathLen, message_t* msg, uint8_t len); command error_t cancel(message_t* msg); event void sendDone(message_t* msg, error_t error); command uint8_t maxPayloadLength(); command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouteSenderC.nc000066400000000000000000000040461207233610700227770ustar00rootroot00000000000000/** * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Doug Carlson */ generic configuration SourceRouteSenderC(sourceroute_id_t srID) { provides { interface SourceRouteSend; interface SourceRoutePacket; } } implementation { enum { CLIENT_ID = unique(UQ_SRP_CLIENT), }; components SourceRoutingC; components new SourceRouteIdP(srID); SourceRoutingC.SourceRouteId[CLIENT_ID] -> SourceRouteIdP; SourceRouteSend = SourceRoutingC.SourceRouteSend[CLIENT_ID]; SourceRoutePacket = SourceRoutingC; } tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRouting.h000066400000000000000000000040501207233610700217060ustar00rootroot00000000000000/** * Copyright (c) 2010 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef SOURCEROUTING_H #define SOURCEROUTING_H #include "AM.h" #include "message.h" #define UQ_SRP_CLIENT "SRP.client" enum { SRP_MAX_PATHLEN = 10, AM_SRP = 0x76, }; typedef uint8_t sourceroute_id_t; typedef nx_uint8_t nx_sourceroute_id_t; //TODO: for generic sub-layers, route should be a nx_uint8_t[] typedef nx_struct { nx_uint8_t sr_len; nx_uint8_t hops_left; nx_uint8_t seqno; nx_sourceroute_id_t payload_id; nx_am_addr_t route[SRP_MAX_PATHLEN]; } sr_header_t; #endif tinyos-2.1.2+dfsg/tos/lib/net/srp/SourceRoutingC.nc000066400000000000000000000042021207233610700221610ustar00rootroot00000000000000// $Id: LqiForwardingEngineP.nc,v 1.16 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2010 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Omprakash Gnawali */ configuration SourceRoutingC { provides { interface StdControl; interface SourceRouteSend[uint8_t client]; interface SourceRoutePacket; interface Receive[sourceroute_id_t id]; } uses { interface SourceRouteId[uint8_t client]; } } implementation{ components new SourceRouteEngineC(AM_SRP) as Engine; StdControl = Engine; SourceRouteSend = Engine; SourceRoutePacket = Engine; Receive = Engine; Engine.SourceRouteId = SourceRouteId; } tinyos-2.1.2+dfsg/tos/lib/power/000077500000000000000000000000001207233610700164705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/power/AsyncDeferredPowerManagerP.nc000066400000000000000000000075641207233610700241740ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This is the internal implementation of the deffered power management * policy for managing the power states of non-virtualized devices. * Non-virtualized devices are shared using a parameterized Resource * interface, and are powered down according to some policy whenever there * are no more pending requests to that Resource. The policy implemented * by this component is to delay the power down of a device by some contant * factor. Such a policy is useful whenever a device has a long wake-up * latency. The cost of waiting for the device to power up can be * avoided if the device is requested again before some predetermined * amount of time. * * @param delay -- The amount of time the power manager should wait * before shutting down the device once it is free. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic module AsyncDeferredPowerManagerP(uint32_t delay) { uses { interface AsyncStdControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; interface Timer as TimerMilli; } } implementation { norace bool stopTimer = FALSE; task void stopTimerTask() { call TimerMilli.stop(); stopTimer = FALSE; } task void timerTask() { if(stopTimer == FALSE) call TimerMilli.startOneShot(delay); } async event void ResourceDefaultOwner.requested() { stopTimer = TRUE; post stopTimerTask(); call AsyncStdControl.start(); call ResourceDefaultOwner.release(); } async event void ResourceDefaultOwner.immediateRequested() { stopTimer = TRUE; post stopTimerTask(); call AsyncStdControl.start(); call ResourceDefaultOwner.release(); } async event void ResourceDefaultOwner.granted() { post timerTask(); } event void TimerMilli.fired() { if(stopTimer == FALSE) { call PowerDownCleanup.cleanup(); call AsyncStdControl.stop(); } } default async command void PowerDownCleanup.cleanup() { } } tinyos-2.1.2+dfsg/tos/lib/power/AsyncPowerManagerP.nc000066400000000000000000000063541207233610700225270ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.7 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This is the internal implementation of the standard power management * policy for managing the power states of non-virtualized devices. * Non-virtualized devices are shared using a parameterized Resource * interface, and are powered down according to some policy whenever there * are no more pending requests to that Resource. The policy implemented * by this component is to power down a device as soon as it becomes free. * Such a policy is useful whenever a device has a negligible wake-up * latency. There is no cost associated with waiting for the device to * power up, so it can be powered on and off as often as possible. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic module AsyncPowerManagerP() @safe() { uses { interface AsyncStdControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { async event void ResourceDefaultOwner.requested() { call AsyncStdControl.start(); call ResourceDefaultOwner.release(); } async event void ResourceDefaultOwner.immediateRequested() { call AsyncStdControl.start(); call ResourceDefaultOwner.release(); } async event void ResourceDefaultOwner.granted() { call PowerDownCleanup.cleanup(); call AsyncStdControl.stop(); } default async command void PowerDownCleanup.cleanup() { } } tinyos-2.1.2+dfsg/tos/lib/power/AsyncStdControlDeferredPowerManagerC.nc000066400000000000000000000073651207233610700261720ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This component povides a power management policy for managing the power * states of non-virtualized devices. Non-virtualized devices are shared * using a parameterized Resource interface, and are powered down according * to some policy whenever there are no more pending requests to that Resource. * The policy implemented by this component is to delay the power down of a * device by some contant factor. Such a policy is useful whenever a device * has a long wake-up latency. The cost of waiting for the device to power * up can be avoided if the device is requested again before some predetermined * amount of time.

      * * Powerdown of the device is done through the AsyncStdControl * interface, so this component can only be used with those devices that * provide that interface.

      * * For devices providing either the StdControl or * SplitControl interfaces, please use either the * StdControlDeferredPowerManagerC component or the * SplitControlDeferredPowerManagerC component respectively. * * @param delay -- The amount of time the power manager should wait * before shutting down the device once it is free. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic configuration AsyncStdControlDeferredPowerManagerC(uint32_t delay) { uses { interface AsyncStdControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { components new TimerMilliC(), new AsyncDeferredPowerManagerP(delay) as PowerManager; PowerManager.AsyncStdControl = AsyncStdControl; PowerManager.PowerDownCleanup = PowerDownCleanup; PowerManager.ResourceDefaultOwner = ResourceDefaultOwner; PowerManager.ArbiterInfo = ArbiterInfo; PowerManager.TimerMilli -> TimerMilliC; } tinyos-2.1.2+dfsg/tos/lib/power/AsyncStdControlPowerManagerC.nc000066400000000000000000000067501207233610700245260ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This is the internal implementation of the standard power management * policy for managing the power states of non-virtualized devices. * Non-virtualized devices are shared using a parameterized Resource * interface, and are powered down according to some policy whenever there * are no more pending requests to that Resource. The policy implemented * by this component is to power down a device as soon as it becomes free. * Such a policy is useful whenever a device has a negligible wake-up * latency. There is no cost associated with waiting for the device to * power up, so it can be powered on and off as often as possible.

      * * Powerdown of the device is done through the AsyncStdControl * interface, so this component can only be used with those devices that * provide that interface.

      * * For devices providing either the StdControl or * SplitControl interfaces, please use either the * StdControlPowerManagerC component or the * SplitControlPowerManagerC component respectively. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic configuration AsyncStdControlPowerManagerC() { uses { interface AsyncStdControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { components new AsyncPowerManagerP() as PowerManager; PowerManager.AsyncStdControl = AsyncStdControl; PowerManager.PowerDownCleanup = PowerDownCleanup; PowerManager.ResourceDefaultOwner = ResourceDefaultOwner; PowerManager.ArbiterInfo = ArbiterInfo; } tinyos-2.1.2+dfsg/tos/lib/power/DeferredPowerManagerP.nc000066400000000000000000000113341207233610700231640ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.7 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This is the internal implementation of the deffered power management * policy for managing the power states of non-virtualized devices. * Non-virtualized devices are shared using a parameterized Resource * interface, and are powered down according to some policy whenever there * are no more pending requests to that Resource. The policy implemented * by this component is to delay the power down of a device by some contant * factor. Such a policy is useful whenever a device has a long wake-up * latency. The cost of waiting for the device to power up can be * avoided if the device is requested again before some predetermined * amount of time. * * @param delay -- The amount of time the power manager should wait * before shutting down the device once it is free. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic module DeferredPowerManagerP(uint32_t delay) { uses { interface StdControl; interface SplitControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; interface Timer as TimerMilli; } } implementation { norace bool stopping = FALSE; norace bool requested = FALSE; norace bool stopTimer = FALSE; task void startTask() { call TimerMilli.stop(); stopTimer = FALSE; call StdControl.start(); if (call SplitControl.start()==EALREADY) call ResourceDefaultOwner.release(); } task void timerTask() { call TimerMilli.startOneShot(delay); } async event void ResourceDefaultOwner.requested() { if(stopping == FALSE) { stopTimer = TRUE; post startTask(); } else requested = TRUE; } async event void ResourceDefaultOwner.immediateRequested() { } default command error_t StdControl.start() { return SUCCESS; } default command error_t SplitControl.start() { signal SplitControl.startDone(SUCCESS); return SUCCESS; } event void SplitControl.startDone(error_t error) { call ResourceDefaultOwner.release(); } async event void ResourceDefaultOwner.granted() { post timerTask(); } event void TimerMilli.fired() { atomic { if(stopTimer == FALSE) { stopping = TRUE; call PowerDownCleanup.cleanup(); call StdControl.stop(); if (call SplitControl.stop()==EALREADY) signal SplitControl.stopDone(SUCCESS); } } } event void SplitControl.stopDone(error_t error) { if(requested == TRUE) { call StdControl.start(); call SplitControl.start(); } atomic { requested = FALSE; stopping = FALSE; } } default command error_t StdControl.stop() { return SUCCESS; } default command error_t SplitControl.stop() { signal SplitControl.stopDone(SUCCESS); return SUCCESS; } default async command void PowerDownCleanup.cleanup() { } } tinyos-2.1.2+dfsg/tos/lib/power/InfiniteRetryPowerManagerP.nc000066400000000000000000000106711207233610700242420ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.2 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This is the internal implementation of the standard power management * policy for managing the power states of non-virtualized devices. * Non-virtualized devices are shared using a parameterized Resource * interface, and are powered down according to some policy whenever there * are no more pending requests to that Resource. The policy implemented * by this component is to power down a device as soon as it becomes free. * Such a policy is useful whenever a device has a negligible wake-up * latency. There is no cost associated with waiting for the device to * power up, so it can be powered on and off as often as possible. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic module PowerManagerP() { uses { interface StdControl; interface SplitControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { norace bool stopping = FALSE; norace bool requested = FALSE; task void startTask() { if(call StdControl.start() == SUCCESS) if(call SplitControl.start() == SUCCESS) return; post startTask(); } task void stopTask() { if(call StdControl.stop() == SUCCESS) if(call SplitControl.stop() == SUCCESS) return; post startTask(); } async event void ResourceDefaultOwner.requested() { if(stopping == FALSE) { post startTask(); } else requested = TRUE; } async event void ResourceDefaultOwner.immediateRequested() { } default command error_t StdControl.start() { return SUCCESS; } default command error_t SplitControl.start() { signal SplitControl.startDone(SUCCESS); return SUCCESS; } event void SplitControl.startDone(error_t error) { if(error != SUCCESS) { post startTask(); return; } if(call ResourceDefaultOwner.isOwner()) call ResourceDefaultOwner.release(); } async event void ResourceDefaultOwner.granted() { atomic stopping = TRUE; call PowerDownCleanup.cleanup(); post stopTask(); } event void SplitControl.stopDone(error_t error) { if(error != SUCCESS) { post stopTask(); return; } if(requested == TRUE) { call StdControl.start(); call SplitControl.start(); } atomic { requested = FALSE; stopping = FALSE; } } default command error_t StdControl.stop() { return SUCCESS; } default command error_t SplitControl.stop() { signal SplitControl.stopDone(SUCCESS); return SUCCESS; } default async command void PowerDownCleanup.cleanup() { } } tinyos-2.1.2+dfsg/tos/lib/power/PowerDownCleanup.nc000066400000000000000000000051311207233610700222460ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this interface and its * intended use.

      * * This interface exists to allow a Resource user to cleanup any state * information before a shared Resource is shutdown. It should be provided * by the user of a shared Resource, and used by the * power managment component for that Resource. The cleanup() * command will be called by the power manager just before powering down * the shared resource. * * @author Kevin Klues (klueska@cs.wustl.edu) */ interface PowerDownCleanup { /** * This command will be called by the power management component of * a shared Resource. The implementation of this command defines * what must be done just before that shared Resource is shut off. * */ async command void cleanup(); } tinyos-2.1.2+dfsg/tos/lib/power/PowerManagerP.nc000066400000000000000000000102501207233610700215170ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.7 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This is the internal implementation of the standard power management * policy for managing the power states of non-virtualized devices. * Non-virtualized devices are shared using a parameterized Resource * interface, and are powered down according to some policy whenever there * are no more pending requests to that Resource. The policy implemented * by this component is to power down a device as soon as it becomes free. * Such a policy is useful whenever a device has a negligible wake-up * latency. There is no cost associated with waiting for the device to * power up, so it can be powered on and off as often as possible. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic module PowerManagerP() { uses { interface StdControl; interface SplitControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { norace bool stopping = FALSE; norace bool requested = FALSE; task void startTask() { call StdControl.start(); call SplitControl.start(); } task void stopTask() { call PowerDownCleanup.cleanup(); call StdControl.stop(); call SplitControl.stop(); } async event void ResourceDefaultOwner.requested() { if(stopping == FALSE) { post startTask(); } else requested = TRUE; } async event void ResourceDefaultOwner.immediateRequested() { } default command error_t StdControl.start() { return SUCCESS; } default command error_t SplitControl.start() { signal SplitControl.startDone(SUCCESS); return SUCCESS; } event void SplitControl.startDone(error_t error) { if(call ResourceDefaultOwner.isOwner()) call ResourceDefaultOwner.release(); } async event void ResourceDefaultOwner.granted() { atomic stopping = TRUE; post stopTask(); } event void SplitControl.stopDone(error_t error) { if(requested == TRUE) { call StdControl.start(); call SplitControl.start(); } atomic { requested = FALSE; stopping = FALSE; } } default command error_t StdControl.stop() { return SUCCESS; } default command error_t SplitControl.stop() { signal SplitControl.stopDone(SUCCESS); return SUCCESS; } default async command void PowerDownCleanup.cleanup() { } } tinyos-2.1.2+dfsg/tos/lib/power/SplitControlDeferredPowerManagerC.nc000066400000000000000000000073501207233610700255270ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This component povides a power management policy for managing the power * states of non-virtualized devices. Non-virtualized devices are shared * using a parameterized Resource interface, and are powered down according * to some policy whenever there are no more pending requests to that Resource. * The policy implemented by this component is to delay the power down of a * device by some contant factor. Such a policy is useful whenever a device * has a long wake-up latency. The cost of waiting for the device to power * up can be avoided if the device is requested again before some predetermined * amount of time.

      * * Powerdown of the device is done through the SplitControl * interface, so this component can only be used with those devices that * provide that interface.

      * * For devices providing either the AsyncStdControl or * StdControl interfaces, please use either the * AsyncStdControlDeferredPowerManagerC component or the * StdControlDeferredPowerManagerC component respectively. * * @param delay -- The amount of time the power manager should wait * before shutting down the device once it is free. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic configuration SplitControlDeferredPowerManagerC(uint32_t delay) { uses { interface SplitControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { components new TimerMilliC(), new DeferredPowerManagerP(delay) as PowerManager; PowerManager.SplitControl = SplitControl; PowerManager.PowerDownCleanup = PowerDownCleanup; PowerManager.ResourceDefaultOwner = ResourceDefaultOwner; PowerManager.ArbiterInfo = ArbiterInfo; PowerManager.TimerMilli -> TimerMilliC; } tinyos-2.1.2+dfsg/tos/lib/power/SplitControlPowerManagerC.nc000066400000000000000000000067221207233610700240700ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This component povides a power management policy for managing the power * states of non-virtualized devices. Non-virtualized devices are shared * using a parameterized Resource interface, and are powered down according * to some policy whenever there are no more pending requests to that Resource. * The policy implemented by this component is to delay the power down of a * device by some contant factor. Such a policy is useful whenever a device * has a long wake-up latency. The cost of waiting for the device to power * up can be avoided if the device is requested again before some predetermined * amount of time.

      * * Powerdown of the device is done through the SplitControl * interface, so this component can only be used with those devices that * provide that interface.

      * * For devices providing either the AsyncStdControl or * StdControl interfaces, please use either the * AsyncStdControlPowerManagerC component or the * StdControlPowerManagerC component respectively. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic configuration SplitControlPowerManagerC() { uses { interface SplitControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { components new PowerManagerP() as PowerManager; PowerManager.SplitControl = SplitControl; PowerManager.PowerDownCleanup = PowerDownCleanup; PowerManager.ResourceDefaultOwner = ResourceDefaultOwner; PowerManager.ArbiterInfo = ArbiterInfo; } tinyos-2.1.2+dfsg/tos/lib/power/StdControlDeferredPowerManagerC.nc000066400000000000000000000073421207233610700251670ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This component povides a power management policy for managing the power * states of non-virtualized devices. Non-virtualized devices are shared * using a parameterized Resource interface, and are powered down according * to some policy whenever there are no more pending requests to that Resource. * The policy implemented by this component is to delay the power down of a * device by some contant factor. Such a policy is useful whenever a device * has a long wake-up latency. The cost of waiting for the device to power * up can be avoided if the device is requested again before some predetermined * amount of time.

      * * Powerdown of the device is done through the StdControl * interface, so this component can only be used with those devices that * provide that interface.

      * * For devices providing either the AsyncStdControl or * SplitControl interfaces, please use either the * AsyncStdControlDeferredPowerManagerC component or the * SplitControlDeferredPowerManagerC component respectively. * * @param delay -- The amount of time the power manager should wait * before shutting down the device once it is free. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic configuration StdControlDeferredPowerManagerC(uint32_t delay) { uses { interface StdControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { components new TimerMilliC(), new DeferredPowerManagerP(delay) as PowerManager; PowerManager.StdControl = StdControl; PowerManager.PowerDownCleanup = PowerDownCleanup; PowerManager.ResourceDefaultOwner = ResourceDefaultOwner; PowerManager.ArbiterInfo = ArbiterInfo; PowerManager.TimerMilli -> TimerMilliC; } tinyos-2.1.2+dfsg/tos/lib/power/StdControlPowerManagerC.nc000066400000000000000000000067121207233610700235260ustar00rootroot00000000000000/* * Copyright (c) 2005 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2010-06-29 22:07:50 $ * ======================================================================== */ /** * Please refer to TEP 115 for more information about this component and its * intended use.

      * * This component povides a power management policy for managing the power * states of non-virtualized devices. Non-virtualized devices are shared * using a parameterized Resource interface, and are powered down according * to some policy whenever there are no more pending requests to that Resource. * The policy implemented by this component is to delay the power down of a * device by some contant factor. Such a policy is useful whenever a device * has a long wake-up latency. The cost of waiting for the device to power * up can be avoided if the device is requested again before some predetermined * amount of time.

      * * Powerdown of the device is done through the StdControl * interface, so this component can only be used with those devices that * provide that interface.

      * * For devices providing either the AsyncStdControl or * SplitControl interfaces, please use either the * AsyncStdControPowerManagerC component or the * SplitControlPowerManagerC component respectively. * * @author Kevin Klues (klueska@cs.wustl.edu) */ generic configuration StdControlPowerManagerC() { uses { interface StdControl; interface PowerDownCleanup; interface ResourceDefaultOwner; interface ArbiterInfo; } } implementation { components new PowerManagerP() as PowerManager; PowerManager.StdControl = StdControl; PowerManager.PowerDownCleanup = PowerDownCleanup; PowerManager.ResourceDefaultOwner = ResourceDefaultOwner; PowerManager.ArbiterInfo = ArbiterInfo; } tinyos-2.1.2+dfsg/tos/lib/ppp/000077500000000000000000000000001207233610700161335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/DebugDefaultHdlcUart.nc000066400000000000000000000042301207233610700224360ustar00rootroot00000000000000/* Copyright (c) 2011 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Whitebox interface for inspection of DefaultHdlcUart in unit tests. * * Enable with _DDEBUG_PLATFORM_SERIAL_HDLC_UART. * * @author Peter A. Bigot */ interface DebugDefaultHdlcUart { /** @return the length of the ring buffer in bytes */ async command unsigned int ringBufferLength (); /** @return the address of the ring buffer */ async command uint8_t* ringBuffer (); /** @return the value of the ringbuffer store pointer */ async command uint8_t* rbStore (); /** @return the value of the ringbuffer load pointer */ async command uint8_t* rbLoad (); } tinyos-2.1.2+dfsg/tos/lib/ppp/DebugHdlcFraming.nc000066400000000000000000000044641207233610700216120ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "HdlcFraming_.h" /** Whitebox interface for inspection of HdlcFraming in unit tests. * * Enable with -DDEBUG_HDLC_FRAMING at build time. * * @author Peter A. Bigot */ interface DebugHdlcFraming { /** @return an RXState_e value indicating the current receive frame * automaton state. */ async command unsigned int rxState (); /** @return a TXState_e value indicating the current transmit engine * state */ async command unsigned int txState (); /** @return the number of HDLC frames that can be received until * data will be dropped. */ async command unsigned int numRxFrames (); /** @return a pointer to the data for HDLC frames in reception */ async command const HdlcRxFrame_t* rxFrames (); } tinyos-2.1.2+dfsg/tos/lib/ppp/DefaultHdlcUartC.nc000066400000000000000000000044251207233610700216000ustar00rootroot00000000000000/* Copyright (c) 2011 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Component that uses PlatformSerialC to provide an HdlcUart * interface. * * @author Peter A. Bigot */ configuration DefaultHdlcUartC { provides { interface StdControl; interface HdlcUart; #if DEBUG_PLATFORM_SERIAL_HDLC_UART interface DebugDefaultHdlcUart; #endif /* DEBUG_PLATFORM_SERIAL_HDLC_UART */ } } implementation { components PlatformSerialC; components DefaultHdlcUartP; StdControl = DefaultHdlcUartP; HdlcUart = DefaultHdlcUartP; #if DEBUG_PLATFORM_SERIAL_HDLC_UART DebugDefaultHdlcUart = DefaultHdlcUartP; #endif /* DEBUG_PLATFORM_SERIAL_HDLC_UART */ DefaultHdlcUartP.SerialControl -> PlatformSerialC; DefaultHdlcUartP.UartStream -> PlatformSerialC; } tinyos-2.1.2+dfsg/tos/lib/ppp/DefaultHdlcUartP.nc000066400000000000000000000173431207233610700216200ustar00rootroot00000000000000/* Copyright (c) 2011 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ module DefaultHdlcUartP { provides { interface StdControl; interface HdlcUart; #if DEBUG_PLATFORM_SERIAL_HDLC_UART interface DebugDefaultHdlcUart; #endif /* DEBUG_PLATFORM_SERIAL_HDLC_UART */ } uses { interface StdControl as SerialControl; interface UartStream; #if PLATFORM_SURF interface Msp430UsciError; #endif } } implementation { #ifndef PLATFORM_SERIAL_RX_BUFFER_SIZE /** Number of bytes in the ring buffer of received but unprocessed * characters. */ #define PLATFORM_SERIAL_RX_BUFFER_SIZE 256 #endif /* PLATFORM_SERIAL_RX_BUFFER_SIZE */ /** Circular buffer holding received data not yet processed. * * To simplify management, the buffer is considered empty if the * rbStore_ and rbLoad_ pointers are equal. * * If reception of a character increments rbStore_ to be equal to * rbLoad_, a buffer overflow is assumed, and incoming data is * dropped until the feeder task catches up. */ uint8_t ringBuffer[PLATFORM_SERIAL_RX_BUFFER_SIZE]; /** Pointer to the ring buffer slot into which the next received * character will be written. * * When rbStore_ is null reception is administratively disabled. */ uint8_t *rbStore_; /** Pointer to the ring buffer slot containing oldest received * character not yet processed. * * The slot indicated by rbLoad_ contains an unprocessed character * only when the rbLoad_ pointer is non-null and unequal to * rbStore_. * * When rbLoad_ is null reception has been disabled due to ring * buffer overrun or an underlying UART error. Such errors inhibit * further reception, and are sticky until the streamFeeder task * clears them. */ uint8_t *rbLoad_; #if DEBUG_PLATFORM_SERIAL_HDLC_UART async command unsigned int DebugDefaultHdlcUart.ringBufferLength () { return sizeof(ringBuffer); } async command uint8_t* DebugDefaultHdlcUart.ringBuffer () { return ringBuffer; } async command uint8_t* DebugDefaultHdlcUart.rbStore () { atomic return rbStore_; } async command uint8_t* DebugDefaultHdlcUart.rbLoad () { atomic return rbLoad_; } #endif /* DEBUG_PLATFORM_SERIAL_HDLC_UART */ command error_t StdControl.start () { /* Ignore the return value; if SerialPrintfC is active, it might * fail but things are still good. */ (void)call SerialControl.start(); atomic rbStore_ = rbLoad_ = ringBuffer; return SUCCESS; } command error_t StdControl.stop () { atomic rbStore_ = rbLoad_ = 0; return call SerialControl.stop(); } command error_t HdlcUart.send (uint8_t* buf, uint16_t len) { return call UartStream.send(buf, len); } async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) { signal HdlcUart.sendDone(error); } task void streamFeeder_task () { uint8_t* loadable_endp; uint8_t* loadablep = 0; uint8_t* new_load = 0; bool signal_recovery = FALSE; atomic { if (! rbStore_) { /* Infrastructure disabled */ return; } if (! rbLoad_) { /* Buffer overrun or UART error. Throw away anything we * haven't processed and signal recovery. */ signal_recovery = TRUE; rbLoad_ = rbStore_; } else { /* Might have something. Grab whatever contiguous region of * unprocessed characters is available. Cache where we * stopped, to use to update rbLoad_ after we're done * processing. * * @TODO: Consider putting an upper bound on the number of * characters processed, to let the HDLC infrastructure post * other tasks that might relieve frame buffer memory * pressure. */ loadablep = rbLoad_; if (rbLoad_ <= rbStore_) { loadable_endp = rbStore_; new_load = rbStore_; } else { loadable_endp = ringBuffer + sizeof(ringBuffer); new_load = ringBuffer; } } } /* atomic */ if (loadablep && (loadablep < loadable_endp)) { /* There's characters to be processed, but we might not have * grabbed them all. Post the task again so any leftovers can * be processed. */ post streamFeeder_task(); /* Notify of each received character, in order */ while (loadablep < loadable_endp) { signal HdlcUart.receivedByte(*loadablep++); } atomic { /* Consume the characters we've just processed, unless the * ring buffer overran while we were working, in which case * keep the error marker and we'll resync on the next * invocation. */ if (rbLoad_) { rbLoad_ = new_load; } } } if (signal_recovery) { signal HdlcUart.uartError(SUCCESS); } } async event void UartStream.receivedByte (uint8_t rx_byte) { bool wake_feeder; bool signal_drop; atomic { /* Signal loss of data if we were supposed to store data but * couldn't because of an existing or new overflow or error * condition. (Here assume we'll fail to store; we'll clear the * signal if we do store the data.) * * Wake the feeder if we're supposed to store data. If we do * store, it'll have work to do; if we don't, there's an error * condition it needs to clean up. */ wake_feeder = signal_drop = !!rbStore_; if (rbStore_ && rbLoad_) { uint8_t* rb_dest = rbStore_; if (++rbStore_ >= (ringBuffer + sizeof(ringBuffer))) { rbStore_ = ringBuffer; } if (rbStore_ == rbLoad_) { /* Store would cause an overrun. Leave the old value in * place, in case it's being processed, but mark an * error. */ rbLoad_ = 0; } else { /* Store is valid. Do so, and clear the drop signal. */ *rb_dest = rx_byte; signal_drop = FALSE; } } } if (wake_feeder) { post streamFeeder_task(); } if (signal_drop) { signal HdlcUart.uartError(ENOMEM); } } async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ) { } #if PLATFORM_SURF async event void Msp430UsciError.condition (unsigned int errors) { /* On any underlying UART error, mark the error to inhibit * reception until we can do cleanup, notify the consumer, and * wake the stream feeder task to recover. */ atomic { rbLoad_ = 0; } signal HdlcUart.uartError(FAIL); post streamFeeder_task(); } #endif default async event void HdlcUart.uartError (error_t error) { } } tinyos-2.1.2+dfsg/tos/lib/ppp/GetSetOptions.nc000066400000000000000000000042331207233610700212260ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Interface to help with configuring the options associated with a * component. Rather like the GetSet interface, but slightly * different to handle options expressed as a structure. * * @author Peter A. Bigot */ interface GetSetOptions { /** Configure a subsystem. * * @param options The proposed options * @return SUCCESS if options are acceptable; EINVAL otherwise. */ command error_t set (const type_t* options); /** Get the current option configuration. * * @return A copy of the currently configured options. */ command type_t get (); } tinyos-2.1.2+dfsg/tos/lib/ppp/HdlcFraming.h000066400000000000000000000074201207233610700204650ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #ifndef PPP_HDLC_FRAMING_H #define PPP_HDLC_FRAMING_H /** Structure defining options that control HDLC framing. * * @note Implementation of the ACCM capability is not optional. The * initial value defined in RFC1661 is to escape all control * characters less than 0x20. During link negotiation, these * characters must be escaped or the peer is required to drop them, * which will result in FCS failure. */ typedef struct HdlcFramingOptions_t { /** If TRUE, the address and control field bytes are suppressed on * outgoing frames. */ bool txSuppressAddressControl; /** If TRUE, the address and control field bytes are expected to * be absent from incoming frames. */ bool rxSuppressAddressControl; /** Bit mask denoting those ASCII control characters that must be * escaped prior to transmission to the peer. */ uint32_t txAsyncControlCharacterMap; /** Bit mask denoting those ASCII control characters that the peer * will escape prior to transmission. Receipt of an unescaped * character in this set indicates a transmission error. */ uint32_t rxAsyncControlCharacterMap; } HdlcFramingOptions_t; /** Codes indicating the cause of an HDLC-level error. */ typedef enum HdlcError_e { /** No error detected */ HdlcError_None, /** The framing options require the address field be present, and * its content is not the required All-Stations address. */ HdlcError_InvalidAddressField, /** The framing options require a control field, and its value is * not recognized. */ HdlcError_InvalidControlField, /** A flag sequence was received without having sufficient data to * express the minimal packet content including CRC. */ HdlcError_ShortFrame, /** The CRC calculated over the received frame did not match the * expected value. */ HdlcError_BadCrc, /** We got data, but nobody's provided a buffer to store it in. */ HdlcError_NoBufferAvailable, /** More data was present in the frame (including CRC) than is * available in the currently configured receive buffer. */ HdlcError_BufferOverflow, /** The receive buffer was deconfigured while holding a partial * frame */ HdlcError_ReceptionCancelled, } HdlcError_e; #endif /* PPP_HDLC_FRAMING_H */ tinyos-2.1.2+dfsg/tos/lib/ppp/HdlcFraming.nc000066400000000000000000000130301207233610700206300ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "HdlcFraming.h" /** Interface to support RFC1662-conformant HDLC-like framing of * packets for the Point-to-Point Protocol. * * @author Peter A. Bigot */ interface HdlcFraming { /** Initiate transmission of a frame of data. * * This command starts the state machine and begins to transmit the * provided data. RFC1662-required delimeters, HDLC address and * control fields, the payload with transparency conversions, and * the 16-bit CRC are all added as the frame is transmitted. * * If this command returns SUCCESS, the sendDone event will be * signaled to indicate the ultimate success/failure of the * transmission. The pointer passed to this command will be * provided in the event, so components may more easily detect * completion of transmissions they initiated. * * @param data Pointer to a block of data that is to be transmitted. * * @param len Number of octets in the data block. * * @param inhibit_accomp If TRUE, send the address and control * fields even if the implementing component is configured to * suppress them. * * @return SUCCESS if the frame transmission has begun. EBUSY if * the system is already transmitting a frame. Other errors if the * underlying UART is unable to transmit data. */ command error_t sendFrame (const uint8_t* data, unsigned int len, bool inhibit_accomp); /** Notification that the attempt to transmit a frame of data has * completed. * * @note This event is raised by the HdlcFramingC task. * * @param data The original data pointer provided to sendFrame. * * @param len The original frame length provided to sendFrame. * * @param err The disposition of the transmission: SUCCESS if * succeeded, other values indicating failure in the state machine * or underlying serial transport. */ event void sendDone (const uint8_t* data, unsigned int len, error_t err); /** Indicate that a frame has been successfully received. * * This event is signalled by a task, not within the UART interrupt * handler. The signal is asynchronous to any receivedDelimiter() * and receptionError() events. Regardless of the number of frames * received, a subsequent receivedFrame() event shall not occur * until after the releaseReceivedFrame() command releases the * buffer. */ event void receivedFrame (const uint8_t* data, unsigned int len); /** Inform the framer that it can reclaim space used by the given * frame. * * Each received frame must be released before the next frame will * be signalled. * * It is guaranteed that the next receivedFrame() signal will not * occur during this call. This allows the caller to release state * after this command without having to worry that the state was * overwritten by the next frame. * * @param data Pointer to the start of a received frame, as provided * through the most recent receiveFrame() event. */ command error_t releaseReceivedFrame (const uint8_t* buffer); /** Notification that a flag sequence byte has been received. * * @warning This event is signalled while processing the UART * interrupt. Act quickly and return. * * It is guaranteed that this event will be signaled prior to the * receivedFrame event. */ async event void receivedDelimiter (); /** Notification that an error occurred during frame reception. * * Note that a reception error does not release the received buffer. * The system will resynchronize on the next frame delimiter. * * @warning This event is signalled while processing the UART * interrupt. Act quickly and return. * * It is guaranteed that this event will signaled prior to the * receivedDelimiter event if an unexpected delimiter is the cause * of the error. */ async event void receptionError (HdlcError_e code); } tinyos-2.1.2+dfsg/tos/lib/ppp/HdlcFramingC.nc000066400000000000000000000116411207233610700207410ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" #include "HdlcFraming.h" /** Implementation of HDLC-like framing as defined in RFC1662 for PPP. * * This implementation is optimized to receive data as efficiently as * possible. It does this by maintaining a FragmentPool that allows * multiple fragments to be collected in interrupt context while a * previous frame is being processed in task context. Extra bytes * inserted for transparency during transmission are stripped while * the data is being received, to * * @note When used in PPP, it is highly likely that the first frame * received after a Configure-Ack that completes the LCP negotiation * will fail with a BadCRC. That Configure-Ack will install a new * ACCM indicating that low-value octets are valid data, rather than * being corrupted control characters. The sender of the following * frame will assume this ACCM is installed, and will neglect to add * transparency escapes for those characters. Because this component * will have already begun processing the incoming data for the frame, * but the task that interprets the Configure-Ack and installs the * ACCM may not have completed, it is highly likely that some valid * data characters will be dropped, resulting in a checksum failure * and loss of the frame. The peer will subsequently retransmit the * frame, which will be correctly interpreted because by that point * the ACCM will have been updated. In other words, don't get your * knickers all in a twist because the LEDs indicate a BadCRC HDLC * error on startup. * * The implementation uses a local task to process transmission of * messages. Notification of frame transmission occurs in this * context. * * @note You must release all frames signaled by receivedFrame() when * you stop this component, including any frames signalled after you * began the stop process. * * @param RX_BUFFER_SIZE Size, in octets, to use for the fragment pool * used to hold incoming messages * * @param RX_FRAME_LIMIT Maximum number of fragments (individual * messages) supported by the fragment pool * * @author Peter A. Bigot */ generic configuration HdlcFramingC (unsigned int RX_BUFFER_SIZE, uint8_t RX_FRAME_LIMIT) { uses { interface HdlcUart; interface StdControl as UartControl; } provides { interface StdControl; interface HdlcFraming; #if DEBUG_HDLC_FRAMING interface DebugHdlcFraming; #endif /* DEBUG_HDLC_FRAMING */ interface GetSetOptions as HdlcFramingOptions; } } implementation { components new HdlcFramingP(RX_FRAME_LIMIT); HdlcUart = HdlcFramingP; HdlcFraming = HdlcFramingP; HdlcFramingOptions = HdlcFramingP; UartControl = HdlcFramingP.UartControl; StdControl = HdlcFramingP; #if DEBUG_HDLC_FRAMING DebugHdlcFraming = HdlcFramingP; #endif /* DEBUG_HDLC_FRAMING */ /* If the fragment pool doesn't have one more slot than the number * of active frames, then if we get into a situation where all the * frames are in use the freeze on the last one didn't reclaim any * memory, and even as earlier frames are released there may not be * enough contiguous space to get another one allocated. */ components new FragmentPoolC(RX_BUFFER_SIZE, 1+RX_FRAME_LIMIT) as InputFramePoolC; HdlcFramingP.InputFramePool -> InputFramePoolC; components MainC; MainC.SoftwareInit -> HdlcFramingP; } tinyos-2.1.2+dfsg/tos/lib/ppp/HdlcFramingP.nc000066400000000000000000000544001207233610700207560ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "HdlcFraming.h" /** Implement HDLC framing. * * @param RX_FRAME_LIMIT The maximum number of frames that can be held * waiting for the receiver to process them. */ generic module HdlcFramingP (uint8_t RX_FRAME_LIMIT) { uses { interface HdlcUart; interface StdControl as UartControl; interface FragmentPool as InputFramePool; } provides { interface Init; interface StdControl; interface HdlcFraming; interface GetSetOptions as HdlcFramingOptions; #if DEBUG_HDLC_FRAMING interface DebugHdlcFraming; #endif /* DEBUG_HDLC_FRAMING */ } } implementation { #include "HdlcFraming_.h" uint16_t txCount__; uint16_t rxCount__; command error_t Init.init () { return SUCCESS; } /** Options that control the behavior of the framing. Access must * be atomic; this is read within the receive interrupt routines, * but may be updated from synchronous context. */ HdlcFramingOptions_t options__ = { txSuppressAddressControl: FALSE, rxSuppressAddressControl: FALSE, txAsyncControlCharacterMap: ~0UL, rxAsyncControlCharacterMap: ~0UL }; /** The current state of the reception machine */ uint8_t rxState__; /** The state to which the reception machine should return upon * receipt of an escaped data byte. Only valid when state is * RX_escaped. */ uint8_t rxEscapedState_; /** Where the caller wants us to put the next frame. Set to null on * startup and upon completion of frame reception. Reset to a * non-null value by HdlcFraming.setReceiveBuffer. */ uint8_t* rxBuffer__; /** The number of octets available for an incoming frame */ int rxBufferLength__; /** An index into the current rxBuffer__ at which the next frame * character is to be written. */ int rxIndex__; uint8_t txState_; /** A buffer for outgoing data. This is used for escape sequence * constructed from control characters in an outgoing buffer, so * must be at least two octets in length. It also must be long enough to store: * - the flag sequence (1 octet) * - the address field (1 octet) * - the control field (2 octets, if escaped) * on transmission start, and: * - the CRC field (4 octets, if both bytes escaped) * - the flag sequence (1 octet) * on transmission end. We'll use twice the CRC length plus the flag sequence. */ uint8_t txTemporary_[2 * FCS_LENGTH + 1]; /** A pointer to the start of a frame being transmitted. Is null * when there is no active frame transmission. */ const uint8_t* txStart_; /** A pointer to the next character to transmit from in txStart_. * Valid only while txStart_ is not null. When equal to txEnd_, the * payload portion of the frame has been transmitted, though * transmission of the CRC may still be active. */ const uint8_t* txPtr_; /** A pointer to just past the end of the frame to be transmitted. * Valid only while txStart_ is not null. */ const uint8_t* txEnd_; /** Cached result from most recent HdlcUart.sendDone event, used * for task handoff. Access under mutex. */ error_t sendDoneError__; /** A set of reception frames permitting simultaneous reception of a * PPP frame and processing of a previously received frame. */ HdlcRxFrame_t rxFrames_[RX_FRAME_LIMIT]; static const HdlcRxFrame_t* rxFramesEnd_ = rxFrames_ + RX_FRAME_LIMIT; /** Points to the rxFrame_ that is currently being used to receive * data. Null if no input buffer is currently available. */ HdlcRxFrame_t* rxActiveFrame__; /** A queue of frames that have received data, in the order they are * to be worked off. */ HdlcRxFrame_t* readyFrame__[RX_FRAME_LIMIT]; uint8_t readyFrameIdx__; task void inputEngine_task (); /** Update a HDLC default CRC with a new data byte. * * Although both TinyOS and HDLC/PPP use the same CRC polynomial, * they shift from different ends or something; at any rate, the * standard implementation doesn't work. Found this one which does * at * http://www.nongnu.org/avr-libc/user-manual/group__util__crc.html. */ uint16_t fcs16_update (uint16_t crc, uint8_t data) { data ^= 0xff & crc; data ^= data << 4; return ((((uint16_t)data << 8) | (0xff & (crc >> 8))) ^ (uint8_t)(data >> 4) ^ ((uint16_t)data << 3)); } enum { /** The initial value for the CRC algorithm */ FCS16_Initial = 0xFFFF, /** The expected value when calculating a CRC over a frame which * ends with an encoded CRC. */ FCS16_Good = 0xF0B8, }; /** The running CRC for a frame being received. */ uint16_t rxCrc__; /** The running CRC for a frame being transmitted. */ uint16_t txCrc_; /** Return TRUE iff character c must be escaped given this ACCM */ bool mustEscape (uint8_t c, uint32_t accm) { return ((HDLC_FlagSequence == c) || (HDLC_ControlEscape == c) || ((0x20 > c) && (accm & (1UL << c)))); } command error_t HdlcFramingOptions.set (const HdlcFramingOptions_t* new_options) { atomic { if (new_options) { options__ = *new_options; } else { options__.txSuppressAddressControl = options__.rxSuppressAddressControl = FALSE; options__.txAsyncControlCharacterMap = options__.rxAsyncControlCharacterMap = ~0UL; } } #if 0 printf("HDLC Opt: ACCOMP tx=%d rx=%d; ACCM tx=%08lx rx=%08lx\r\n", options__.txSuppressAddressControl, options__.rxSuppressAddressControl, options__.txAsyncControlCharacterMap, options__.rxAsyncControlCharacterMap); #endif return SUCCESS; } command HdlcFramingOptions_t HdlcFramingOptions.get () { atomic return options__; } command error_t HdlcFraming.sendFrame (const uint8_t* data, unsigned int len, bool inhibit_accomp) { error_t rc; uint8_t* tp; if (TX_idle != txState_) { return EBUSY; } txState_ = TX_active; txCrc_ = FCS16_Initial; txStart_ = txPtr_ = data; txEnd_ = txStart_ + len; tp = txTemporary_; *tp++ = HDLC_FlagSequence; if (inhibit_accomp || (! options__.txSuppressAddressControl)) { txCrc_ = fcs16_update(txCrc_, HDLC_AllStationsAddress); txCrc_ = fcs16_update(txCrc_, HDLC_ControlFieldValue); *tp++ = HDLC_AllStationsAddress; if (mustEscape(HDLC_ControlFieldValue, options__.txAsyncControlCharacterMap)) { *tp++ = HDLC_ControlEscape; *tp++ = HDLC_ControlFieldValue ^ HDLC_ControlModifier; } else { *tp++ = HDLC_ControlFieldValue; } } rc = call HdlcUart.send(txTemporary_, tp - txTemporary_); if (SUCCESS != rc) { txState_ = TX_idle; } return rc; } error_t startNewFrame_async__ () { error_t rc; HdlcRxFrame_t* fp; /* Find an open frame */ fp = rxFrames_; while ((fp < rxFramesEnd_) && (RFS_unused != fp->frame_state)) { ++fp; } if (rxFramesEnd_ <= fp) { return ENOMEM; } /* Get a fragment, if any */ rc = call InputFramePool.request(&fp->start, &fp->end, MinimumUsefulBufferLength); if (SUCCESS != rc) { return rc; } rxBuffer__ = fp->start; rxBufferLength__ = fp->end - fp->start; rxActiveFrame__ = fp; rxActiveFrame__->frame_state = RFS_receiving; return SUCCESS; } /* We don't need to do anything when space becomes available in the * input pool. Only inputEngine_task causes changes to the input * pool, and it knows that it's done so. */ async event void InputFramePool.available (unsigned int length) { atomic { if (! rxActiveFrame__) { startNewFrame_async__(); } } } void completeFrame_async__ () { HdlcRxFrame_t* fp = rxActiveFrame__; uint8_t* fpe; /* Graduate the frame to "received", set its length, and notify * the engine. */ fp->frame_state = RFS_received; fp->end = fp->start + rxIndex__ - FCS_LENGTH; post inputEngine_task(); /* Stuff the active frame on the ready queue */ readyFrame__[readyFrameIdx__++] = rxActiveFrame__; /* Mark that we have no active input buffer. */ rxActiveFrame__ = 0; rxBuffer__ = 0; /* Freeze the payload of the frame. Note that if the frame has no * data, we want to pretend it has at least one octet in it, * otherwise we're likely to get the same address for the next * frame confusing the bookkeeping. * * During the freeze call, the InputFramePool.available() event * will be signalled, which will cause us to be assigned a new * buffer if the pool has space for another frame. */ fpe = fp->end; if (fp->start == fpe) { ++fpe; } (void)call InputFramePool.freeze(fp->start, fpe); } command error_t HdlcFraming.releaseReceivedFrame (const uint8_t* buffer) { HdlcRxFrame_t* fp = rxFrames_; /* Find the frame data for the input buffer */ atomic { while ((fp < rxFramesEnd_) && (fp->start != buffer)) { ++fp; } if (fp >= rxFramesEnd_) { return EINVAL; } fp->frame_state = RFS_releasable; } post inputEngine_task(); return SUCCESS; } task void inputEngine_task () { bool did_something = FALSE; uint8_t* releasable_fragment = 0; const uint8_t* frame_start = 0; unsigned int frame_length = 0; atomic { HdlcRxFrame_t* fp; if (0 < readyFrameIdx__) { fp = readyFrame__[0]; if (0 < --readyFrameIdx__) { memmove(readyFrame__, readyFrame__ + 1, readyFrameIdx__ * sizeof(*readyFrame__)); } fp->frame_state = RFS_processing; frame_start = fp->start; frame_length = fp->end - fp->start; } else { fp = rxFrames_; while (fp < rxFramesEnd_) { if (RFS_releasable == fp->frame_state) { releasable_fragment = fp->start; fp->frame_state = RFS_unused; fp->start = fp->end = 0; break; } ++fp; } } } if (frame_start) { signal HdlcFraming.receivedFrame(frame_start, frame_length); did_something = TRUE; } if (releasable_fragment) { (void)call InputFramePool.release(releasable_fragment); did_something = TRUE; } if (did_something) { post inputEngine_task(); } } event void HdlcUart.receivedByte (uint8_t byte) { uint8_t in_byte = byte; int rx_error = HdlcError_None; bool post_rx_delim = FALSE; /* @note This event runs in interrupt context */ atomic { /* Characters in the ACCM are to be silently dropped. */ if ((0x20 > byte) && (options__.rxAsyncControlCharacterMap & (1UL << byte))) { return; } /* If we've been waiting for a byte that had to be modified for * transparency, convert it. */ if (RX_escaped == rxState__) { if ((HDLC_FlagSequence == byte) || (HDLC_ControlEscape == byte)) { /* These characters are not valid in escaped state. Go * unsynchronized, but process the byte in that state so we * can resync if necessary. */ rxState__ = RX_unsynchronized; } else { /* Unescape the byte and drop back to the unescaped state * for processing. */ byte ^= HDLC_ControlModifier; rxState__ = rxEscapedState_; } } if ((RX_unsynchronized != rxState__) && (HDLC_ControlEscape == in_byte)) { /* We're synchronized and the next byte had to be escaped, so * prepare for it, saving the current state so we can return * to it. */ rxEscapedState_ = rxState__; rxState__ = RX_escaped; } else { /* Process the byte. */ switch (rxState__) { default: reprocess_unsynchronized: rxState__ = RX_unsynchronized; /*FALLTHRU*/ case RX_unsynchronized: /* If we're not synchronized, we have no valid data. Clear the index * so we can safely update the receive buffer. */ rxIndex__ = 0; rxCrc__ = FCS16_Initial; /* The only way to get out of the unsynchronized state is to * receive a flag sequence, which starts a new receive * operation. Note we check the unconverted byte. */ if (HDLC_FlagSequence == in_byte) { rxState__ = RX_atAddress; post_rx_delim = TRUE; } break; case RX_atAddress: if (HDLC_FlagSequence == in_byte) { /* Never mind: not starting yet after all */ goto reprocess_unsynchronized; } if (HDLC_AllStationsAddress != byte) { /* If accomp is enabled, it's ok to not get the address; * in that case jump straight to receive. (It's also ok * to get the address, which is why we didn't skip over * this state. If we did, though, we must also get the * control field. */ #if 0 /* Technically, we shouldn't get here if the other side * hasn't agreed to compress address and control fields. * @TODO@ This is temporarily disabled since we don't set * the local options yet. */ if (! options__.rxSuppressAddressControl) { rx_error = HdlcError_InvalidAddressField; goto reprocess_unsynchronized; } #endif rxState__ = RX_receive; goto receive; } rxCrc__ = fcs16_update(rxCrc__, byte); rxState__ = RX_atControlField; break; case RX_atControlField: /* If we got to this state, we have to match the control * field, or resynchronize. */ if (HDLC_ControlFieldValue != byte) { if (HDLC_FlagSequence != in_byte) { rx_error = HdlcError_InvalidControlField; } goto reprocess_unsynchronized; } rxCrc__ = fcs16_update(rxCrc__, byte); rxState__ = RX_receive; break; case RX_receive: receive: if (HDLC_FlagSequence == in_byte) { /* Probable end of the frame. If the content is long enough to be valid, * check the CRC and push the frame upstream if it's valid */ if (FCS_LENGTH <= rxIndex__) { if (FCS16_Good == rxCrc__) { completeFrame_async__(); } else { rx_error = HdlcError_BadCrc; } } else { rx_error = HdlcError_ShortFrame; } /* Reprocess the character to resynchronize */ goto reprocess_unsynchronized; } /* Valid decoded character. If there's a buffer with * available room, update the CRC and store it. * Otherwise, abort the reception. */ if (rxBuffer__) { if (rxIndex__ < rxBufferLength__) { rxCrc__ = fcs16_update(rxCrc__, byte); rxBuffer__[rxIndex__++] = byte; } else { rx_error = HdlcError_BufferOverflow; } } else { rx_error = HdlcError_NoBufferAvailable; } if (HdlcError_None != rx_error) { rxState__ = RX_unsynchronized; } break; case RX_escaped: /*NOTREACHED*/ break; } } } // atomic /* Error notifications first */ if (HdlcError_None != rx_error) { signal HdlcFraming.receptionError(rx_error); } /* Delimiter reception after errors but before frame completion */ if (post_rx_delim) { signal HdlcFraming.receivedDelimiter(); } } /* To avoid loss of incoming data during full duplex communications, * we need to prepare for the next transmission block in a task that * does not run in the interrupt context in which we're notified of * completion of the previous transmission. */ task void uartStreamSendDone () { error_t error; const uint8_t* tp = txPtr_; const uint8_t* uart_tx_ptr = 0; uint8_t next_state; unsigned int uart_tx_len = 0; bool send_done = FALSE; uint32_t tx_accm; atomic { error = sendDoneError__; tx_accm = options__.txAsyncControlCharacterMap; } next_state = txState_; send_done = ((SUCCESS == error) && (TX_sendCrc == txState_)); if (! send_done) { if (SUCCESS == error) { /* The last operation succeeded, so start the next one. * Beginning where we left off, look for an outbound character * that needs to be escaped. */ while ((tp < txEnd_) && (! mustEscape(*tp, tx_accm))) { ++tp; } if ((tp == txPtr_) && (txPtr_ < txEnd_)) { /* There are characters to transmit, and the first one has to * be escaped. Add it to the CRC, escape it, and send it on * its way. */ uint8_t* bp = txTemporary_; txCrc_ = fcs16_update(txCrc_, *txPtr_); *bp++ = HDLC_ControlEscape; *bp++ = HDLC_ControlModifier ^ *txPtr_; uart_tx_ptr = txTemporary_; uart_tx_len = bp - txTemporary_; ++txPtr_; } else if (txPtr_ < txEnd_) { /* There are unescaped characters to be sent. Send them, then * add them to the CRC. Note need to remove const qualifier * from transmit buffer to satisfy the TinyOS interface * definition: one hopes nobody's implementation actually * mucks with the content. */ uart_tx_ptr = txPtr_; uart_tx_len = tp - txPtr_; while (txPtr_ < tp) { txCrc_ = fcs16_update(txCrc_, *txPtr_++); } } else { uint8_t shift = 0; uint8_t* bp = txTemporary_; /* All frame characters have been sent. Pack up the CRC to * follow: xor with initial, low byte first, escaping the * bytes as necessary. */ next_state = TX_sendCrc; txCrc_ = txCrc_ ^ FCS16_Initial; while (16 > shift) { uint8_t crcb = (txCrc_ >> shift) & 0xff; if (mustEscape(crcb, tx_accm)) { *bp++ = HDLC_ControlEscape; *bp++ = crcb ^ HDLC_ControlModifier; } else { *bp++ = crcb; } shift += 8; } /* Tack on the closing flag sequence. */ *bp++ = HDLC_FlagSequence; uart_tx_ptr = txTemporary_; uart_tx_len = bp - txTemporary_; } } } /* If we have more to send, try to send it. */ if (uart_tx_ptr) { error = call HdlcUart.send((uint8_t*)uart_tx_ptr, uart_tx_len); } /* If whatever we tried to send failed (delayed result from last * time, or immediate result from this time), forward the * error. */ if (SUCCESS != error) { send_done = TRUE; } /* If we finished, we'll update the state to be idle. */ if (send_done) { next_state = TX_idle; } /* Update the machine state. */ txState_ = next_state; /* Notify the user that the transfer has completed, whether it * succeeded or failed. */ if (send_done) { signal HdlcFraming.sendDone(txStart_, txEnd_ - txStart_, error); } } async event void HdlcUart.uartError (error_t error) { } async event void HdlcUart.sendDone (error_t error) { /* @note This event runs in interrupt context */ atomic { sendDoneError__ = error; } post uartStreamSendDone(); } default async event void HdlcFraming.receivedDelimiter () { } default async event void HdlcFraming.receptionError (HdlcError_e code) { } command error_t StdControl.start () { error_t rc = SUCCESS; /* NB: Ignore the return from this. It may fail if the UART is * being used by the SerialPrintfC component, and that's OK. */ (void)call UartControl.start(); if (SUCCESS == rc) { atomic rc = startNewFrame_async__(); } return rc; } command error_t StdControl.stop () { /* Need to inhibit any new transmissions. * Need to shut down any in-progress transmission. * Need to inhibit any new receptions * Need to wait for completed frames to be released. */ return call UartControl.stop(); } #if DEBUG_HDLC_FRAMING async command unsigned int DebugHdlcFraming.rxState () { atomic return rxState__; } async command unsigned int DebugHdlcFraming.txState () { return txState_; } async command unsigned int DebugHdlcFraming.numRxFrames () { return RX_FRAME_LIMIT; } async command const HdlcRxFrame_t* DebugHdlcFraming.rxFrames () { return rxFrames_; } #endif /* DEBUG_HDLC_FRAMING */ } tinyos-2.1.2+dfsg/tos/lib/ppp/HdlcFraming_.h000066400000000000000000000057471207233610700206360ustar00rootroot00000000000000/** Internal HDLC framing data structures, pulled out for white-box * testing. */ #ifndef PPP_HDLC_FRAMING_INTERNAL_H #define PPP_HDLC_FRAMING_INTERNAL_H enum { /** The sole address field value permitted by RFC1662 */ HDLC_AllStationsAddress = 0xff, /** The sole control field value permitted by RFC1662 */ HDLC_ControlFieldValue = 0x03, /** The value used to indicate a frame delimiter */ HDLC_FlagSequence = 0x7e, /** The prefix byte used to indicate an escaped byte */ HDLC_ControlEscape = 0x7d, /** The value used to escape a data byte */ HDLC_ControlModifier = 0x20, }; enum { /** The number of octets in a frame check sequence */ FCS_LENGTH = 2, /** If the size of the buffer provided by the fragment pool isn't * at least this big, just pretend there's no space at all. */ MinimumUsefulBufferLength = 16 + FCS_LENGTH, }; /** State of the HDLC automaton that processes incoming characters to * create frame data. */ typedef enum RXState_e { /** Waiting for a flag sequence delimiter. State is initial, and * is re-entered whenever synchronization is lost. */ RX_unsynchronized, /** Delimiter has been received, we are awaiting the address byte * (or, if address compression is enabled, whatever the first byte * is). */ RX_atAddress, /** Address has been received, we are awaiting the control field byte. */ RX_atControlField, /** Have received the delimiter and are at the point of receiving * data; all is good. */ RX_receive, /** Received a valid control escape, waiting for the following * data character. */ RX_escaped, } RXState_e; /** State of the task that generates framed data written to the UART */ typedef enum TXState_e { /** No transmission is in progress. txStart_ should be null. */ TX_idle, /** Actively transmitting the payload of a frame. */ TX_active, /** Actively transmitting the CRC of a frame. */ TX_sendCrc, } TXState_e; typedef enum ReceiveFrameState_e { /** Indicates that the frame is available for use. * inputEngine_task transitions into this state when a frame is * released; the UART interrupt transitions from this state when a * new buffer is installed. */ RFS_unused, /** The frame's fragment has been allocated and is being used to * store incoming data. */ RFS_receiving, /** The incoming frame has been completed, the length updated, the * remainder of the fragment released. inputEngine_task has the * responsibility for further transitions. */ RFS_received, /** inputEngine_task sets the frame to processing when it notifies * the client of frame availability. */ RFS_processing, /** Processing is complete and any hold has been released. * Handoff to inputEngine_task to reclaim the frame fragment. */ RFS_releasable, } ReceiveFrameState_e; /** A structure used to hold a fragment from the HDLC reception frame pool. */ typedef struct HdlcRxFrame_t { uint8_t* start; uint8_t* end; uint8_t frame_state; } HdlcRxFrame_t; #endif /* PPP_HDLC_FRAMING_INTERNAL_H */ tinyos-2.1.2+dfsg/tos/lib/ppp/HdlcUart.nc000066400000000000000000000062451207233610700201720ustar00rootroot00000000000000/* Copyright (c) 2011 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Provide basic UART-related functions required for the HdlcFramingC * infrastructure. * * The HDLC framing infrastructure needs the ability to send blocks of * characters, and to receive characters one-by-one as soon as they * arrive. The processing done on each received character is fairly * complex. * * The UartStream interface's send command and receiveByte interface * technically meet these needs. However, both are async operations. * At high serial data rates and when serving as a bridge for a * high-data-rate radio interface, interrupt-driven reception causes * dropped packets. DMA-based reception can work around this, but the * lack of an a-priori length for received messages makes the * translation to a per-byte reception event complex. * * @author Peter A. Bigot */ interface HdlcUart { /** Send len bytes from the given address over the UART. * * This command is essentially forwarded to UartStream.send. */ command error_t send (uint8_t* buf, uint16_t len); /** Notification of the result of the most recent send that returned * SUCCESS. */ async event void sendDone (error_t error); /** Notification of an error detected in serial processing. * * The event is raised once for each detected character drop, with * an error value of ENOMEM. It is raised with the error value * SUCCESS when the infrastructure recovers from dropped characters * and subsequent data is known to be good. */ async event void uartError (error_t error); /** Notification of a newly received byte. */ event void receivedByte (uint8_t byte); } tinyos-2.1.2+dfsg/tos/lib/ppp/LcpAutomaton.h000066400000000000000000000112761207233610700207210ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #ifndef PPP_LCP_AUTOMATON_H #define PPP_LCP_AUTOMATON_H #include "ppp.h" /** States of the LCP automaton as defined in RFC1661. */ typedef enum LcpAutomatonState_e { LAS_Initial = 0, LAS_Starting, LAS_Closed, LAS_Stopped, LAS_Closing, LAS_Stopping, LAS_RequestSent, LAS_AckReceived, LAS_AckSent, LAS_Opened, /** Special non-RFC state required when the actions taken during a * transition are split-phase. */ LAS_TRANSIENT = 0x0f } LcpAutomatonState_e ; /** Events that induce transitions among the states of the LCP * automaton. */ typedef enum LcpAutomatonEvent_e { LAE_Up, LAE_Down, LAE_Open, LAE_Close, LAE_Timeout, LAE_ReceiveConfigureRequest, LAE_ReceiveConfigureAck, LAE_ReceiveConfigureNakRej, LAE_ReceiveTerminateRequest, LAE_ReceiveTerminateAck, LAE_ReceveUnknownCode, LAE_ReceiveCodeProtocolReject, LAE_ReceiveEchoDiscardRequestReply, } LcpAutomatonEvent_e ; /** Options that control the behavior of the LCP automaton. * Generally, these have RFC-defined default values. Check the * automaton source to determine whether these are actually used. See * section 4.6 of RFC1661 for details. */ typedef struct LcpAutomatonOptions_t { uint32_t restartTimer_bms; uint16_t maxTerminate; uint16_t maxConfigure; uint16_t maxFailure; bool restartOption; } LcpAutomatonOptions_t; /** Structure holding parameters referenced by the LCP automaton when * processing a ConfigureRequest message. */ typedef struct LcpEventParams_rcr_t { /** The generic summary of the request: good (should be * acknowledged), or not (should be rejected or nak'd) */ bool good; /** The specific disposition of the request: one of * PppControlProtocolCode_{ConfigureAck,ConfigureNak,ConfigureReject}. */ uint8_t disposition; /** The start of the encoded block of options in the response * message. */ const uint8_t* options; /** Just past the end of the encoded block of options. */ const uint8_t* options_end; /** The key to be used when transmitting the message. */ frame_key_t scx_key; } LcpEventParams_rcr_t; /** Structure holding parameters referenced by the LCP automaton when * processing a message that contains a sequence of options, such as a * Configure-Ack, Configure-Nak, or Configure-Reject message. */ typedef struct LcpEventParams_opts_t { /** The start of the encoded block of options that were accepted by * the remote. */ const uint8_t* options; /** Just past the end of the encoded block of options. */ const uint8_t* options_end; /** Code for the type of message that was received */ uint8_t code; } LcpEventParams_opts_t; /** Structure holding parameters referenced by the LCP automaton when * processing a TerminateRequest or TerminateAck message */ typedef struct LcpEventParams_term_t { /** The start of the payload in the received message */ const uint8_t* data; /** The end of the payload in the received message */ const uint8_t* data_end; /** Code for the type of message that was received */ uint8_t code; /** The key for a prepared Terminate-Ack message to be transmitted */ frame_key_t sta_key; } LcpEventParams_term_t; #endif /* PPP_LCP_AUTOMATON_H */ tinyos-2.1.2+dfsg/tos/lib/ppp/LcpAutomaton.nc000066400000000000000000000122101207233610700210570ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "LcpAutomaton.h" /** Manage the Link Control Protocol automaton. * * This interface is subject to change, as it is unclear which actions * should be publicly available. * * @author Peter A. Bigot */ interface LcpAutomaton { /** Raised upon completion of the transition actions associated with * an automaton event. * * @param state The resulting state of the automaton. May be the * same as the previous state. */ event void transitionCompleted (LcpAutomatonState_e state); /** Obtain the current state of the automaton */ command LcpAutomatonState_e getState (); /** Externally indicate that the layer is ready. * * This command is normally invoked only by the Ppp daemon when * bringing up LCP, and by an LCP automaton when a lower layer is * ready to carry packets. */ command error_t up (); /** Externally indicate that the layer is ready. * * This command is normally invoked only by the Ppp daemon when * closing down the link, and by an LCP automaton when all upper * layers have closed. */ command error_t down (); /** Administratively enable the automaton. * * This is normally invoked during application initialization, to * indicate that the corresponding protocol should be enabled as * soon as enough of PPP is up to allow messages to get to it. * * @return SUCCESS if automaton transition succeeded. ERETRY if the * automaton is busy, and the attempt should repeated. */ command error_t open (); /** Administratively disable the automaton. * * @return SUCCESS if automaton transition succeeded. ERETRY if the * automaton is busy, and the attempt should repeated. */ command error_t close (); /** Notify the automaton of an event to be executed. * * @param evt The event that is inducing a state transition. * * @param params Pointer to an event-specific structure required to * complete the actions associated with the transition. Note that * the parameters may include resources, the responsibility for * which is normally transferred to the automaton. * * @note If this command returns ERETRY, any resource included in * the params was not accepted by the automaton, and the caller must * dispose of it. For SUCCESS and for all non-ERETRY error returns, * the automaton accepts resource parameters and is responsible for * releasing them. * * @return The result of the signal operation. If ERETRY, the * automaton is busy, but the event may be re-signaled later. For * all other returns, the event should not be re-signalled. */ command error_t signalEvent (LcpAutomatonEvent_e evt, void* params); /** Raised by the automaton to indicate to upper layers that the * automaton has entered the Opened state. * * Normally, upper layers should respond by invoking the up() * command on themselves. */ event void thisLayerUp (); /** Raised by the automaton to indicate to upper layers that the * automaton is leaving the Opened state. * * Normally, upper layers should respond by invoking the down() * command on themselves. */ event void thisLayerDown (); /** Raised by the automaton to indicate to lower layers that the * automaton is entering the Starting state and the lower layer is * needed. */ event void thisLayerStarted (); /** Raised by the automaton to indicate to lower layers that the * automaton is entering the Initial, Closed, or Stopped states, and * the lower layer is no longer needed for the link. */ event void thisLayerFinished (); } tinyos-2.1.2+dfsg/tos/lib/ppp/LcpAutomatonC.nc000066400000000000000000000061371207233610700211750ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Configuration to manage the state associated with a PPP Link * Control Protocol automaton as defined in RFC1661. * * Note that there is generally instance of this automaton for each * control protocol: the LCP instance associated with the PppDaemonC * configuration has one, but so will every other network protocol * that leverages LCP's option negotiation sequence for configuration. * Which is most of the interesting ones. * * @param Protocol The protocol type encoded in PPP packets * * @param InhibitCompression If TRUE, any options like PCOMP and * ACCOMP that might result in non-default encodings are to be * inhibited for this protocol. * * @author Peter A. Bigot */ generic configuration LcpAutomatonC (uint16_t Protocol, bool InhibitCompression) { provides { interface LcpAutomaton; interface GetSetOptions as LcpOptions; } uses { interface Ppp; interface PppConfigure; interface PppProtocolCodeSupport as ConfigureRequest; interface PppProtocolCodeSupport as TerminateAck; } } implementation { components new LcpAutomatonP(Protocol, InhibitCompression); LcpAutomaton = LcpAutomatonP; LcpOptions = LcpAutomatonP; Ppp = LcpAutomatonP; PppConfigure = LcpAutomatonP; ConfigureRequest = LcpAutomatonP.ConfigureRequest; TerminateAck = LcpAutomatonP.TerminateAck; components MainC; MainC.SoftwareInit -> LcpAutomatonP; components new MuxAlarmMilli32C(); LcpAutomatonP.RestartTimer -> MuxAlarmMilli32C; } tinyos-2.1.2+dfsg/tos/lib/ppp/LcpAutomatonP.nc000066400000000000000000000617441207233610700212170ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "LcpAutomaton.h" generic module LcpAutomatonP (uint16_t Protocol, bool InhibitCompression) { provides { interface Init; interface LcpAutomaton; interface GetSetOptions as LcpOptions; } uses { interface Ppp; interface PppConfigure; interface Alarm as RestartTimer; interface PppProtocolCodeSupport as ConfigureRequest; interface PppProtocolCodeSupport as TerminateAck; } } implementation { command error_t Init.init () { return SUCCESS; } /** Convert state values into bits so we can represent sets of * states more efficiently */ enum { ASB_Initial = (1 << LAS_Initial), ASB_Starting = (1 << LAS_Starting), ASB_Closed = (1 << LAS_Closed), ASB_Stopped = (1 << LAS_Stopped), ASB_Closing = (1 << LAS_Closing), ASB_Stopping = (1 << LAS_Stopping), ASB_RequestSent = (1 << LAS_RequestSent), ASB_AckReceived = (1 << LAS_AckReceived), ASB_AckSent = (1 << LAS_AckSent), ASB_Opened = (1 << LAS_Opened), }; /** Type adequate to store a complete set of LCP automaton states */ typedef uint16_t stateBitSet_t; /** The states in which the timer should not be running */ const stateBitSet_t ASB_TimerRunningStates = (ASB_Closing | ASB_Stopping | ASB_RequestSent | ASB_AckReceived | ASB_AckSent); /** Action bits for state transitions. * * The actions taken when transitioning between states sometimes * must be executed synchronously, and often are split-phase. * Consequently, the actions involved in a transition cannot be done * in place, and may in fact take several revisits to complete. We * support this by determining the set of actions in one operation * (calculateEventActions_), then working them off in order over in * potentially multiple task invocations (processEventActions_). * * This enumeration specifies actions to be performed during a * transition. The actions are executed as a secondary state * machine starting from the low bit of the action set. If any * action fails, the secondary machine stops and the primary state * is set to failState_. If all actions complete successfully, the * primary state is set to successState_. * * Execution of the transition is suspended if the action is split * phase. * * Most of these actions are defined in section 4.4 of RFC1661. * Consult processEventActions_ to determine which events might * require processing to be suspended. */ enum TransitionAction_b { TA_noop = 0, /** thisLayerFinished */ TA_tlf = 0x01, TA_tld = 0x02, TA_zrc = 0x04, TA_irc_scr = 0x10, TA_irc_str = 0x20, TA_resetLocalOptions = 0x40, TA_resetRemoteOptions = 0x80, TA_scr = 0x100, TA_sca = 0x200, TA_scn = 0x400, TA_str = 0x1000, /** send unsolicited Terminate-Ack */ TA_sta_uns = 0x2000, /** send Terminate-Ack in response to Terminate-Request */ TA_sta_rep = 0x4000, TA_scj = 0x10000, TA_ser = 0x20000, /** Extract and apply option values from the payload of a received * Configure-Ack message. Must not co-occur with * TA_setRemoteOptions. */ TA_setLocalOptions = 0x100000, /** Extract and apply option values from the payload of a transmitted * Configure-Ack message. Must not co-occur with TA_setLocalOptions. */ TA_setRemoteOptions = 0x200000, TA_tlu = 0x01000000, TA_tls = 0x02000000, /** Set of actions which can cause processing to be suspended. */ TA_SUSPENDABLE = TA_scr | TA_sca | TA_scn | TA_str | TA_sta_uns | TA_sta_rep | TA_scj | TA_ser, }; /** Type adequate to store an arbitrary set of transition actions */ typedef uint32_t transitionActions_t; transitionActions_t pendingActions_; transitionActions_t lastAction_; /** The state to which the automaton will transition if all pending * actions complete successfully. */ uint8_t successState_; /** The state to which the automaton will transition if any pending * action fails. Ideally, that failure will not have changed * visible state. */ uint8_t failState_; uint8_t currentState_; /** The code for the message that carried a given optionSet_. When * the system is to invoke setRemoteOptions, this should be a * Code_ConfigureAck. When the system is to invoke setLocalOptions, * this may be Code_ConfigureAck, Code_ConfigureNak, or * Code_ConfigureReject. The specific code controls what is done * with the options. */ uint8_t optionMessageCode_; /** Storage to communicate an encoded option set between the code * that processes the events and the code that executes the * actions. */ const uint8_t* optionSet_; /** Length of the option set in octets. Valid only when optionSet_ * is not null. */ const uint8_t* optionSetEnd_; /** Store to communicate fact-of a pending transmission between the * event and action code. Required when an event built a * Configure-Ack or Configure-Nak message, but correct functioning * requires that a Configure-Request message be transmitted * first. */ frame_key_t pendingSxxKey_; /* Forward declaration */ error_t calculateEventActions_ (LcpAutomatonEvent_e evt, void* arg); /* Forward declaration */ error_t processEventActions_ (); /** Options for the automaton. The default values are taken from * section 4.6 of RFC1661. */ LcpAutomatonOptions_t options_ = { restartTimer_bms: 3 * 1024, // 3 sec maxTerminate: 2, // 2 maxConfigure: 10, // 10 maxFailure: 5 }; // 5 bool changeState (LcpAutomatonState_e new_state) { return FALSE; } /** The number of retries available. */ int16_t restartCounter_; /** The action that causes the restart timer to be enabled */ transitionActions_t restartCounterAction_; void initializeRestartCounter (transitionActions_t action) { restartCounterAction_ = action; if (TA_scr == action) { restartCounter_ = options_.maxConfigure; } else if (TA_str == action) { restartCounter_ = options_.maxTerminate; } else if (TA_sta_rep == action) { restartCounter_ = 0; } else { restartCounterAction_ = TA_noop; } /* Timer is stopped now. It will be restarted when the frame * associated with this activity is transmitted. */ call RestartTimer.stop(); } task void resumeAutomaton_task () { processEventActions_(); } /** Key which, when the corresponding output frame is transmitted, * causes the restart timer to be reset. */ frame_key_t restartKey_; /** Key which, when the corresponding output frame is transmitted, * causes the automaton to resume processing. */ frame_key_t resumeKey_; /** Error code archived from most recent transmission completion * that causes action execution to resume. Must be SUCCESS at all * times that a split-phase transition is not in progress. */ error_t resumeResult_; void restartTimer_ () { call RestartTimer.start(options_.restartTimer_bms); } task void restartTimerFired_task () { error_t rc; bool have_retries = (0 < restartCounter_); rc = calculateEventActions_(LAE_Timeout, &have_retries); if (SUCCESS == rc) { post resumeAutomaton_task(); } else { /* Event processor is busy: try again soon */ call RestartTimer.start(1); } } async event void RestartTimer.fired () { post restartTimerFired_task(); } event void Ppp.outputFrameTransmitted (frame_key_t key, error_t result) { if (restartKey_ == key) { restartKey_ = 0; restartTimer_(); } if (resumeKey_ == key) { resumeResult_ = result; resumeKey_ = 0; post resumeAutomaton_task(); } //printf("OFT %p: res %d rT %d auto %d\r\n", key, result, do_restart_timer, do_resume); } command LcpAutomatonState_e LcpAutomaton.getState () { return currentState_; } /** Determine the set of actions that must be performed upon receipt * of this event. * * @return ERETRY if the automaton is already processing a set of * actions. Return SUCCESS in all other cases. */ error_t calculateEventActions_ (LcpAutomatonEvent_e evt, void* arg) { stateBitSet_t sb = (1 << currentState_); /* If there's already something happening, presumably we're in * transient state. Retry the packet later. * * @TODO@ We can be in TRANSIENT without any pendingActions_. * Clean up the state. */ if (pendingActions_ || (LAS_TRANSIENT == currentState_)) { return ERETRY; } failState_ = successState_ = currentState_; switch (evt) { case LAE_Up: if ((ASB_Initial) & sb) { successState_ = LAS_Closed; } else if ((ASB_Starting) & sb) { /* For protocols not supporting Configure: tlu/9 */ pendingActions_ |= TA_irc_scr | TA_scr; successState_ = LAS_RequestSent; } else { /* Invalid: Closed, Stopped, Closing, Stopping, Req-Sent, Ack-Rcvd, Ack-Sent, Opened */ } break; case LAE_Down: if ((ASB_Closed | ASB_Closing) & sb) { successState_ = LAS_Initial; } else if ((ASB_Initial | ASB_Starting) & sb) { /* illegal */ } else { if (ASB_Stopped & sb) { pendingActions_ |= TA_tls; } else if (ASB_Opened & sb) { pendingActions_ |= TA_tld; } else { /* Stopping, Req-Sent, Ack-Rcvd, Ack-Sent */ } successState_ = LAS_Starting; } break; case LAE_Open: if (ASB_Initial & sb) { pendingActions_ |= TA_tls; successState_ = LAS_Starting; } else if (ASB_Closed & sb) { /* For protocols not supporting configure: 9 */ pendingActions_ |= TA_irc_scr | TA_scr; successState_ = LAS_RequestSent; } else if ((ASB_Stopped | ASB_Closing | ASB_Stopping | ASB_Opened) & sb) { if (options_.restartOption) { /* @TODO@ Figure out how to execute nested events */ /* evt down */ /* evt up */ } else { if (ASB_Closing & sb) { successState_ = LAS_Stopping; } else { /* No change: Stopped, Stopping, Opened */ } } } else { /* No change: Starting, RequestSent, AckReceived, AckSent */ } break; case LAE_Close: if ((ASB_Initial | ASB_Closed | ASB_Closing) & sb) { /* No change */ } else if ((ASB_Starting) & sb) { pendingActions_ |= TA_tlf; successState_ = LAS_Initial; } else if ((ASB_Stopped) & sb) { successState_ = LAS_Closed; } else { if ((ASB_Opened) & sb) { pendingActions_ |= TA_tld; } if ((ASB_RequestSent | ASB_AckReceived | ASB_AckSent | ASB_Opened) & sb) { pendingActions_ |= TA_irc_str | TA_str; } successState_ = LAS_Closing; } break; case LAE_Timeout: { bool have_retries = FALSE; if (arg) { have_retries = *(bool*)arg; } if ((ASB_Closing | ASB_Stopping) & sb) { if (have_retries) { pendingActions_ |= TA_str; } else { pendingActions_ |= TA_tlf; if ((ASB_Closing) & sb) { successState_ = LAS_Closed; } else { successState_ = LAS_Stopped; } } } else if ((ASB_RequestSent | ASB_AckReceived | ASB_AckSent) & sb) { if (have_retries) { pendingActions_ |= TA_scr; if ((ASB_AckReceived) & sb) { successState_ = LAS_RequestSent; } } else { pendingActions_ |= TA_tlf; successState_ = LAS_Stopped; /* passive option? */ } } break; } case LAE_ReceiveConfigureRequest: { LcpEventParams_rcr_t* params = (LcpEventParams_rcr_t*)arg; //printf("RCR good %d disp %d\r\n", params->good, params->disposition); if ((ASB_Initial | ASB_Starting) & sb) { /* Invalid */ } else if ((ASB_Closing | ASB_Stopping) & sb) { /* No change */ } else if ((ASB_Closed) & sb) { pendingActions_ |= TA_sta_uns; } else if ((ASB_Stopped) & sb) { pendingActions_ |= TA_irc_scr | TA_scr; if (params->good) { pendingActions_ |= TA_sca; successState_ = LAS_AckSent; } else { pendingActions_ |= TA_scn; successState_ = LAS_RequestSent; } } else if ((ASB_RequestSent | ASB_AckSent) & sb) { if (params->good) { pendingActions_ |= TA_sca; successState_ = LAS_AckSent; } else { pendingActions_ |= TA_scn; successState_ = LAS_RequestSent; } } else if ((ASB_AckReceived) & sb) { if (params->good) { pendingActions_ |= TA_sca | TA_tlu; successState_ = LAS_Opened; } else { pendingActions_ |= TA_scn; successState_ = LAS_AckReceived; } } else if ((ASB_Opened) & sb) { pendingActions_ |= TA_tld | TA_scr; if (params->good) { pendingActions_ |= TA_sca; successState_ = LAS_AckSent; } else { pendingActions_ |= TA_scn; successState_ = LAS_RequestSent; } } /* On a new Configure-Request, reset all the remote options. * We may immediately set them after transmitting a * Configure-Ack, but let's leave them in their reset state * between those two phases. */ pendingActions_ |= TA_resetRemoteOptions; if (pendingActions_ & TA_sca) { /* Length of the option set is the entire payload minus the * code, identifier, and length fields. */ pendingActions_ |= TA_setRemoteOptions; optionMessageCode_ = PppControlProtocolCode_ConfigureAck; optionSet_ = params->options; optionSetEnd_ = params->options_end; } pendingSxxKey_ = params->scx_key; break; } case LAE_ReceiveConfigureAck: { LcpEventParams_opts_t* params = (LcpEventParams_opts_t*)arg; if ((ASB_Closed | ASB_Stopped) & sb) { pendingActions_ |= TA_sta_uns; } else if ((ASB_Closing | ASB_Stopping) & sb) { /* No change */ } else if ((ASB_RequestSent) & sb) { pendingActions_ |= TA_irc_scr; successState_ = LAS_AckReceived; } else if ((ASB_AckReceived) & sb) { pendingActions_ |= TA_scr; successState_ = LAS_RequestSent; } else if ((ASB_AckSent) & sb) { pendingActions_ |= TA_irc_scr | TA_tlu; successState_ = LAS_Opened; } else if ((ASB_Opened) & sb) { pendingActions_ |= TA_tld | TA_scr; } else { /* Invalid: Initial, Starting */ } /* We apply local options upon receipt of a Configure-Ack (we * reset them on transmission of a Configure-Request). */ pendingActions_ |= TA_setLocalOptions; optionMessageCode_ = params->code; optionSet_ = params->options; optionSetEnd_ = params->options_end; break; } case LAE_ReceiveConfigureNakRej: { LcpEventParams_opts_t* params = (LcpEventParams_opts_t*)arg; if ((ASB_Closed | ASB_Stopped) & sb) { pendingActions_ |= TA_sta_uns; } else if ((ASB_Closing | ASB_Stopping) & sb) { /* No change */ } else if ((ASB_RequestSent) & sb) { pendingActions_ |= TA_irc_scr | TA_scr; } else if ((ASB_AckReceived) & sb) { pendingActions_ |= TA_scr; successState_ = LAS_RequestSent; } else if ((ASB_AckSent) & sb) { pendingActions_ |= TA_irc_scr | TA_scr; } else if ((ASB_Opened) & sb) { pendingActions_ |= TA_tld | TA_scr; } else { /* Invalid: Initial, Starting */ } /* We apply local options upon receipt of a Configure-Ack (we * reset them on transmission of a Configure-Request). */ pendingActions_ |= TA_setLocalOptions; optionMessageCode_ = params->code; optionSet_ = params->options; optionSetEnd_ = params->options_end; break; } case LAE_ReceiveTerminateRequest: { LcpEventParams_term_t* params = (LcpEventParams_term_t*)arg; if ((ASB_Closed | ASB_Stopped | ASB_Closing | ASB_Stopping | ASB_RequestSent | ASB_AckReceived | ASB_AckSent | ASB_Opened) & sb) { if (ASB_Opened & sb) { pendingActions_ |= TA_tld | TA_zrc | TA_sta_rep; successState_ = LAS_Stopping; } else { pendingActions_ |= TA_sta_rep; if ((ASB_AckReceived | ASB_AckSent) & sb) { successState_ = LAS_RequestSent; } } pendingSxxKey_ = params->sta_key; } break; } case LAE_ReceiveTerminateAck: { break; } case LAE_ReceveUnknownCode: case LAE_ReceiveCodeProtocolReject: case LAE_ReceiveEchoDiscardRequestReply: break; } return SUCCESS; } error_t processEventActions_ () { frame_key_t key = 0; error_t rc = SUCCESS; transitionActions_t action; bool suspended = FALSE; transitionActions_t in_actions; in_actions = pendingActions_; rc = resumeResult_; resumeResult_ = SUCCESS; do { action = 0; if (pendingActions_) { action = 1; while (action && (! (pendingActions_ & action))) { action <<= 1; } } //printf("pAE %lx %lx %d %d %d : %d\r\n", action, pendingActions_, currentState_, successState_, failState_, rc); pendingActions_ &= ~action; lastAction_ = action; /* @TODO@ is this needed? */ /* If the action is one that restarts the timer and decrements * the restart counter, do the decrement now. We'll schedule * the timer once the disposition of the corresponding send is * known. */ if (restartCounterAction_ == action) { --restartCounter_; } switch (action) { case TA_noop: break; case TA_tlf: signal LcpAutomaton.thisLayerFinished(); break; case TA_tld: signal LcpAutomaton.thisLayerDown(); break; case TA_zrc: initializeRestartCounter(TA_sta_rep); restartKey_ = pendingSxxKey_; break; case TA_irc_scr: initializeRestartCounter(TA_scr); break; case TA_irc_str: { initializeRestartCounter(TA_str); break; } case TA_resetRemoteOptions: call PppConfigure.setRemoteOptions(0, 0); break; #if 0 /* Only and always done in TA_scr. */ case TA_resetLocalOptions: call PppConfigure.setLocalOptions(0, 0); break; #endif case TA_scr: if (SUCCESS == rc) { call PppConfigure.setLocalOptions(PppControlProtocolCode_ConfigureAck, 0, 0); } if (SUCCESS == rc) { rc = call ConfigureRequest.invoke(0, &key); } if ((SUCCESS == rc) && key) { restartKey_ = key; resumeKey_ = key; suspended = TRUE; } else { restartTimer_(); } break; case TA_sta_uns: if (SUCCESS == rc) { rc = call TerminateAck.invoke(0, &key); } if ((SUCCESS == rc) && key) { resumeKey_ = key; suspended = TRUE; } break; case TA_sta_rep: /*FALLTHRU*/ case TA_sca: /*FALLTHRU*/ case TA_scn: { if (SUCCESS == rc) { rc = call Ppp.sendOutputFrame(pendingSxxKey_); } if (SUCCESS == rc) { resumeKey_ = pendingSxxKey_; suspended = TRUE; } else { resumeKey_ = restartKey_ = 0; (void)call Ppp.releaseOutputFrame(pendingSxxKey_); } pendingSxxKey_ = 0; break; } case TA_str: case TA_scj: case TA_ser: /* @TODO@ */ break; case TA_setLocalOptions: /*FALLTHRU*/ case TA_setRemoteOptions: if (TA_setLocalOptions == action) { call PppConfigure.setLocalOptions(optionMessageCode_, optionSet_, optionSetEnd_); } else { call PppConfigure.setRemoteOptions(optionSet_, optionSetEnd_); } break; case TA_tlu: signal LcpAutomaton.thisLayerUp(); break; case TA_tls: signal LcpAutomaton.thisLayerStarted(); break; } } while (action && (SUCCESS == rc) && (! suspended)); if (suspended) { currentState_ = LAS_TRANSIENT; } else { bool disable_restart_timer; LcpAutomatonState_e end_state; //printf("FSA %lx %d rc=%d succ=%d fail=%d\r\n", in_actions, currentState_, rc, successState_, failState_); if (SUCCESS == rc) { currentState_ = successState_; } else { currentState_ = failState_; } disable_restart_timer = ! (ASB_TimerRunningStates & (1 << currentState_)); if (disable_restart_timer) { restartKey_ = 0; } end_state = currentState_; optionSet_ = optionSetEnd_ = 0; if (pendingSxxKey_) { (void)call Ppp.releaseOutputFrame(pendingSxxKey_); } pendingSxxKey_ = 0; signal LcpAutomaton.transitionCompleted(end_state); if (disable_restart_timer) { call RestartTimer.stop(); } } return rc; } error_t processEvent_ (LcpAutomatonEvent_e evt, void* arg) { error_t rc; rc = calculateEventActions_(evt, arg); if (ERETRY == rc) { return rc; } /* In all other cases, we're responsible for resources. * processEventActions_ handles them. */ return processEventActions_(); } command error_t LcpAutomaton.signalEvent (LcpAutomatonEvent_e evt, void* params) { return processEvent_(evt, params); } default event void LcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } command error_t LcpOptions.set (const LcpAutomatonOptions_t* new_options) { return FAIL; } command LcpAutomatonOptions_t LcpOptions.get () { return options_; } command error_t LcpAutomaton.up () { return processEvent_(LAE_Up, 0); } command error_t LcpAutomaton.down () { return processEvent_(LAE_Down, 0); } command error_t LcpAutomaton.open () { return processEvent_(LAE_Open, 0); } command error_t LcpAutomaton.close () { return processEvent_(LAE_Close, 0); } default event void LcpAutomaton.thisLayerUp () { } default event void LcpAutomaton.thisLayerDown () { } default event void LcpAutomaton.thisLayerStarted () { } default event void LcpAutomaton.thisLayerFinished () { } } tinyos-2.1.2+dfsg/tos/lib/ppp/LinkControlProtocolC.nc000066400000000000000000000113771207233610700225510ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" #include "lcp.h" #include "HdlcFraming.h" /** The component that supports the Link Control Protocol of RFC1661. * * @author Peter A. Bigot */ configuration LinkControlProtocolC { provides { interface PppProtocol; interface LcpAutomaton; interface PppProtocolCodeSupport as ProtocolReject; interface PppProtocolCodeSupport as ConfigureRequest; } uses { interface Ppp; interface PppRejectedProtocol; interface GetSetOptions as HdlcFramingOptions; interface GetSetOptions as PppOptions; } enum { /** Publish the protocol number to which this component should be * wired in the PppC component */ Protocol = PppProtocol_LinkControlProtocol, }; } implementation { components LinkControlProtocolP as ProtocolC; PppProtocol = ProtocolC; ProtocolReject = ProtocolC; PppRejectedProtocol = ProtocolC; HdlcFramingOptions = ProtocolC; PppOptions = ProtocolC; /* LCP inhibits compression, and has four supported options */ components new PppConfigureEngineC(Protocol, TRUE, 4) as PppConfigureEngineC; ConfigureRequest = PppConfigureEngineC.ConfigureRequest; PppConfigureEngineC.PppProtocolOption[LCPOpt_AddressControlFieldCompression] -> ProtocolC.AddressControlFieldCompressionOption; #if PPP_LCP_ENABLE_PCOMP PppConfigureEngineC.PppProtocolOption[LCPOpt_ProtocolFieldCompression] -> ProtocolC.ProtocolFieldCompressionOption; #endif /* PPP_LCP_ENABLE_PCOMP */ PppConfigureEngineC.PppProtocolOption[LCPOpt_MaximumReceiveUnit] -> ProtocolC.MaximumReceiveUnitOption; PppConfigureEngineC.PppProtocolOption[LCPOpt_AsyncControlCharacterMap] -> ProtocolC.AsyncControlCharacterMapOption; /* Allocate a coordinator, and link in the supported codes */ components new PppProtocolCodeCoordinatorC(Protocol) as CoordinatorC; ProtocolC.PppProtocolCodeCoordinator -> CoordinatorC; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_ConfigureRequest] -> PppConfigureEngineC.ConfigureRequest; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_ConfigureAck] -> PppConfigureEngineC.ConfigureAck; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_ConfigureNak] -> PppConfigureEngineC.ConfigureNak; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_ConfigureReject] -> PppConfigureEngineC.ConfigureReject; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_TerminateRequest] -> PppConfigureEngineC.TerminateRequest; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_TerminateAck] -> PppConfigureEngineC.TerminateAck; CoordinatorC.CodeHandler[PppControlProtocolCode_ProtocolReject] -> ProtocolC.ProtocolReject; /* Hook in the LCP automaton. Inhibit protocol compression. */ components new LcpAutomatonC(Protocol, TRUE); ProtocolC.LcpAutomaton -> LcpAutomatonC; PppConfigureEngineC.LcpAutomaton -> LcpAutomatonC; LcpAutomatonC.ConfigureRequest -> PppConfigureEngineC.ConfigureRequest; LcpAutomatonC.TerminateAck -> PppConfigureEngineC.TerminateAck; LcpAutomatonC.PppConfigure -> PppConfigureEngineC; LcpAutomaton = LcpAutomatonC; /* Whatever provides Ppp needs to go to all these components */ Ppp = ProtocolC; Ppp = CoordinatorC; Ppp = PppConfigureEngineC; Ppp = LcpAutomatonC; } tinyos-2.1.2+dfsg/tos/lib/ppp/LinkControlProtocolP.nc000066400000000000000000000432661207233610700225700ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" #include "lcp.h" #include "LcpAutomaton.h" module LinkControlProtocolP { provides { interface PppProtocol; interface PppProtocolCodeSupport as ProtocolReject; interface PppProtocolOption as AddressControlFieldCompressionOption; #if PPP_LCP_ENABLE_PCOMP interface PppProtocolOption as ProtocolFieldCompressionOption; #endif /* PPP_LCP_ENABLE_PCOMP */ interface PppProtocolOption as MaximumReceiveUnitOption; interface PppProtocolOption as AsyncControlCharacterMapOption; } uses { interface Ppp; interface PppProtocolCodeCoordinator; interface GetSetOptions as HdlcFramingOptions; interface GetSetOptions as PppOptions; interface PppRejectedProtocol; interface LcpAutomaton; } enum { Protocol = PppProtocol_LinkControlProtocol, }; } implementation { /** Compressed booleans to identify those options for which * negotiation is permitted. */ struct { uint8_t accomp:1; uint8_t pcomp:1; uint8_t mru:1; uint8_t accm:1; } isNegotiable = { accomp : TRUE, pcomp : TRUE, mru : TRUE, accm : TRUE }; event void Ppp.outputFrameTransmitted (frame_key_t key, error_t err) { } command unsigned int PppProtocol.getProtocol () { return Protocol; } command error_t PppProtocol.rejectedByPeer (const uint8_t* data, const uint8_t* data_end) { /* Not sure what to do about this, since the peer could only send * a Protocol-Reject message if it actually implemented the * Link-Control-Protocol. */ return SUCCESS; } event void LcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } event void LcpAutomaton.thisLayerUp () { } event void LcpAutomaton.thisLayerDown () { } event void LcpAutomaton.thisLayerStarted () { } event void LcpAutomaton.thisLayerFinished () { } /* ============================== */ /* AddressControlFieldCompression */ /* ACCOMP is sent in a request to indicate that local can receive * frames without adddress and control fields. Ack transmission * (remote) acknowledges permission to suppress ACF in transmitted * packets. Ack reception (local) has no meaning, as we need to be * able to interpret packets with and without compression. */ command uint8_t AddressControlFieldCompressionOption.getType () { return LCPOpt_AddressControlFieldCompression; } command bool AddressControlFieldCompressionOption.isNegotiable () { return isNegotiable.accomp; } command void AddressControlFieldCompressionOption.setNegotiable (bool is_negotiable) { isNegotiable.accomp = is_negotiable; } command uint8_t AddressControlFieldCompressionOption.considerRequest (const uint8_t* dp, const uint8_t* dpe) { return PppControlProtocolCode_ConfigureAck; } command uint8_t* AddressControlFieldCompressionOption.appendRequest (uint8_t* dp, const uint8_t* dpe) { return dp; } command uint8_t* AddressControlFieldCompressionOption.appendNakValue (const uint8_t* sp, const uint8_t* spe, uint8_t* dp, const uint8_t* dpe) { return dp; } command void AddressControlFieldCompressionOption.setRemote (const uint8_t* dp, const uint8_t* dpe) { HdlcFramingOptions_t hdlcopt; /* We have accepted that the remote can receive frames with * address and control fields compressed. Suppress them on * transmission. */ hdlcopt = call HdlcFramingOptions.get(); hdlcopt.txSuppressAddressControl = (0 != dp); call HdlcFramingOptions.set(&hdlcopt); } command void AddressControlFieldCompressionOption.setLocal (const uint8_t* dp, const uint8_t* dpe) { HdlcFramingOptions_t hdlcopt; /* The peer has accepted that we can receive frames with address * and control fields compressed. Suppress them on reception. */ hdlcopt = call HdlcFramingOptions.get(); hdlcopt.rxSuppressAddressControl = (0 != dp); call HdlcFramingOptions.set(&hdlcopt); } command void AddressControlFieldCompressionOption.processNakValue (const uint8_t* dp, const uint8_t* dpe) { call AddressControlFieldCompressionOption.setNegotiable(FALSE); } command void AddressControlFieldCompressionOption.reset () { call AddressControlFieldCompressionOption.setNegotiable(TRUE); } #if PPP_LCP_ENABLE_PCOMP /* ======================== */ /* ProtocolFieldCompression */ /* PCOMP is sent in a request to indicate that local can receive * frames without adddress and control fields. Ack transmission * (remote) acknowledges permission to compress protocols in * transmitted packets. Ack reception (local) has no meaning, as we * need to be able to interpret packets with and without * compression. */ command uint8_t ProtocolFieldCompressionOption.getType () { return LCPOpt_ProtocolFieldCompression; } command bool ProtocolFieldCompressionOption.isNegotiable () { return isNegotiable.pcomp; } command void ProtocolFieldCompressionOption.setNegotiable (bool is_negotiable) { isNegotiable.pcomp = is_negotiable; } command uint8_t ProtocolFieldCompressionOption.considerRequest (const uint8_t* dp, const uint8_t* dpe) { return PppControlProtocolCode_ConfigureAck; } command uint8_t* ProtocolFieldCompressionOption.appendRequest (uint8_t* dp, const uint8_t* dpe) { return dp; } command uint8_t* ProtocolFieldCompressionOption.appendNakValue (const uint8_t* sp, const uint8_t* spe, uint8_t* dp, const uint8_t* dpe) { return dp; } command void ProtocolFieldCompressionOption.setRemote (const uint8_t* dp, const uint8_t* dpe) { PppOptions_t opt; /* We have accepted that the remote can receive frames with the * protocol field compressed. Compress it on transmission. */ opt = call PppOptions.get(); opt.txProtocolFieldCompression = (0 != dp); call PppOptions.set(&opt); } command void ProtocolFieldCompressionOption.setLocal (const uint8_t* dp, const uint8_t* dpe) { PppOptions_t opt; /* The peer has accepted that we can receive frames with the * protocol field compressed. Try reading them that way on * reception. */ opt = call PppOptions.get(); opt.rxProtocolFieldCompression = (0 != dp); call PppOptions.set(&opt); } command void ProtocolFieldCompressionOption.processNakValue (const uint8_t* dp, const uint8_t* dpe) { call ProtocolFieldCompressionOption.setNegotiable(FALSE); } command void ProtocolFieldCompressionOption.reset () { call ProtocolFieldCompressionOption.setNegotiable(TRUE); } #endif /* PPP_LCP_ENABLE_PCOMP */ /* ================== */ /* MaximumReceiveUnit */ enum { PPP_DefaultMRU = 1500, }; uint16_t proposedMRU_ = PPP_PREFERRED_MRU; /* MRU is sent in a request to indicate that local can receive * frames with information fields that exceed the PPP default, or to * request that the remote transmit shorter frames. Ack * transmission (remote) indicates a promise to transmit no more * than the MRU in each frame. Ack reception (local) indicates we * might not receive messages larger than the MRU. */ command uint8_t MaximumReceiveUnitOption.getType () { return LCPOpt_MaximumReceiveUnit; } command bool MaximumReceiveUnitOption.isNegotiable () { PppOptions_t opt = call PppOptions.get(); return isNegotiable.mru && (PPP_DefaultMRU != opt.rxMaximumReceiveUnit); } command void MaximumReceiveUnitOption.setNegotiable (bool is_negotiable) { isNegotiable.mru = is_negotiable; } command uint8_t MaximumReceiveUnitOption.considerRequest (const uint8_t* dp, const uint8_t* dpe) { /* Although we may not be able to support the default MRU on * reception, there's no facility to force the remote to negotiate * the MRU option. Best we can do is, if they sent it, make sure * it's acceptable: i.e., doesn't exceed the maximum, or is what * we proposed. */ uint16_t tx_mru = (dp[0] << 8) | dp[1]; if ((tx_mru > PPP_MAXIMUM_MRU) && (proposedMRU_ != tx_mru)) { return PppControlProtocolCode_ConfigureNak; } return PppControlProtocolCode_ConfigureAck; } command uint8_t* MaximumReceiveUnitOption.appendRequest (uint8_t* dp, const uint8_t* dpe) { if (dpe < (dp+2)) { return 0; } *dp++ = (proposedMRU_ >> 8); *dp++ = (proposedMRU_ & 0x0FF); return dp; } command uint8_t* MaximumReceiveUnitOption.appendNakValue (const uint8_t* sp, const uint8_t* spe, uint8_t* dp, const uint8_t* dpe) { if (dpe < (dp+2)) { return 0; } *dp++ = (PPP_PREFERRED_MRU >> 8); *dp++ = (PPP_PREFERRED_MRU & 0x0FF); return dp; } command void MaximumReceiveUnitOption.setRemote (const uint8_t* dp, const uint8_t* dpe) { PppOptions_t opt; uint16_t value; /* We have accepted the size requested by the remote. Limit * transmissions to that size. */ opt = call PppOptions.get(); if (dp) { value = (dp[0] << 8) | dp[1]; } else { value = PPP_PREFERRED_MRU; } opt.txMaximumReceiveUnit = value; call PppOptions.set(&opt); } command void MaximumReceiveUnitOption.setLocal (const uint8_t* dp, const uint8_t* dpe) { PppOptions_t opt; uint16_t value; /* The peer has accepted our preferred size. Configure receptions * to expect it. */ opt = call PppOptions.get(); if (dp) { value = (dp[0] << 8) | dp[1]; } else { value = PPP_PREFERRED_MRU; } opt.rxMaximumReceiveUnit = value; call PppOptions.set(&opt); } command void MaximumReceiveUnitOption.processNakValue (const uint8_t* dp, const uint8_t* dpe) { proposedMRU_ = (dp[0] << 8) | dp[1]; } command void MaximumReceiveUnitOption.reset () { call MaximumReceiveUnitOption.setNegotiable(TRUE); proposedMRU_ = PPP_PREFERRED_MRU; } /* ================== */ /* AsyncControlCharacterMap */ enum { HDLC_DefaultACCM = ~0UL, HDLC_PreferredACCM = 0UL, }; uint32_t proposedACCM_; /* ACCM is sent in a request to indicate that local does not require * certain control characters to be mapped for transparency. Ack * transmission (remote) indicates a promise to escape the characters * specified in the ACCM. Ack reception (local) indicates that we * can expect the characters not marked in the map to be received * unescaped. * * Local is reset prior to SCR. On local reset, restore both rxSCCM * and txSCCM to defaults. * * Local is set on CA reception. On local set, set rxACCM. * * Remote is set after CA transmission. On remote set, set txACCM. * * When is remote reset? */ command uint8_t AsyncControlCharacterMapOption.getType () { return LCPOpt_AsyncControlCharacterMap; } command bool AsyncControlCharacterMapOption.isNegotiable () { return isNegotiable.accm; } command void AsyncControlCharacterMapOption.setNegotiable (bool is_negotiable) { isNegotiable.accm = is_negotiable; } command uint8_t AsyncControlCharacterMapOption.considerRequest (const uint8_t* dp, const uint8_t* dpe) { return PppControlProtocolCode_ConfigureAck; } command uint8_t* AsyncControlCharacterMapOption.appendRequest (uint8_t* dp, const uint8_t* dpe) { nx_uint32_t* np = (nx_uint32_t*)dp; if (dpe < (dp+1)) { return 0; } *np = proposedACCM_; return (uint8_t*)(np+1); } command uint8_t* AsyncControlCharacterMapOption.appendNakValue (const uint8_t* sp, const uint8_t* spe, uint8_t* dp, const uint8_t* dpe) { nx_uint32_t* np = (nx_uint32_t*)dp; if (dpe < (dp+1)) { return 0; } *np = HDLC_PreferredACCM; return (uint8_t*)(np+1); } command void AsyncControlCharacterMapOption.setRemote (const uint8_t* dp, const uint8_t* dpe) { HdlcFramingOptions_t opt; uint32_t value; /* We have accepted the map requested by the remote. Perform * transparency operations on characters in that map. */ opt = call HdlcFramingOptions.get(); if (dp) { value = *(nx_uint32_t*)dp; } else { value = HDLC_DefaultACCM; } opt.txAsyncControlCharacterMap = value; call HdlcFramingOptions.set(&opt); } command void AsyncControlCharacterMapOption.setLocal (const uint8_t* dp, const uint8_t* dpe) { HdlcFramingOptions_t opt; uint32_t value; /* The peer has accepted our proposed map. This has no effect on * our behavior. */ opt = call HdlcFramingOptions.get(); if (dp) { value = *(nx_uint32_t*)dp; } else { value = HDLC_DefaultACCM; } opt.rxAsyncControlCharacterMap = value; call HdlcFramingOptions.set(&opt); } command void AsyncControlCharacterMapOption.processNakValue (const uint8_t* dp, const uint8_t* dpe) { proposedACCM_ = *(nx_uint32_t*)dp; } command void AsyncControlCharacterMapOption.reset () { call AsyncControlCharacterMapOption.setNegotiable(TRUE); proposedACCM_ = HDLC_PreferredACCM; } /* ======================================== */ command uint8_t ProtocolReject.getCode () { return PppControlProtocolCode_ProtocolReject; } command error_t ProtocolReject.process (uint8_t identifier, const uint8_t* data, const uint8_t* data_end) { uint16_t protocol = 0; protocol = (data[0] << 8) + data[1]; return call PppRejectedProtocol.rejected(protocol, data, data_end); } /** Invoke some code-specific operation */ command error_t ProtocolReject.invoke (void* param_, frame_key_t* keyp) { error_t rc = EINVAL; protocolReject_param_t* param = (protocolReject_param_t*)param_; if (LAS_Opened == call LcpAutomaton.getState()) { /* Due to implementation choice, we can't reject a protocol value * of zero, which is fine since that's an illegal protocol value. * Just drop those on the floor. */ if (0 != param->protocol) { rc = call PppProtocolCodeCoordinator.rejectPacket(param->protocol, param->information, param->information + param->information_length, keyp); } } return rc; } command error_t PppProtocol.process (const uint8_t* information, unsigned int information_length) { return call PppProtocolCodeCoordinator.dispatch(information, information_length); } } tinyos-2.1.2+dfsg/tos/lib/ppp/Ppp.nc000066400000000000000000000116661207233610700172260ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" /** Core functions provided by the PPP infrastructure: specifically, * management of the internal buffers used for outgoing and incoming * messages. * * @author Peter A. Bigot */ interface Ppp { /** Obtain storage for an outbound message. * * The frame is initialized to hold a message associated with the * given protocol. It is the callers responsibility to fill in the * remainder of the message, then to invoke either sendOutputFrame * if the message is to be transmitted or releaseOutputFrame if the * message is to be dropped. * * It is implementation-defined whether multiple output frames are * available for use. If no output frames are available, this * command will return a null pointer. * * @return A pointer to the information field of the output message, * or a null pointer if no output buffers are available. * * @param protocol The protocol to which the message will belong. * * @param frame_endp Secondary output value specyfing the address at * which the frame ends. Attempts to store at or beyond this * address result in undefined behavior. * * @param inhibit_compression Indicate that, for this protocol, all * non-default compression should be inhibited: in particular this * means the protocol will always require two octets, and the * address and control fields will be present. Required for LCP. * * @param keyp Where to store the key that must be used to identify * this output frame to the other output-related commands. Assigned * only if this command returns a non-null pointer. */ command uint8_t* getOutputFrame (unsigned int protocol, const uint8_t** frame_endp, bool inhibit_compression, frame_key_t* keyp); /** Mark the maximum length of the frame. * * frame_end must lie within the frame identified by the given key. * * This may release memory for use in other output frames. */ command error_t fixOutputFrameLength (frame_key_t, const uint8_t* frame_end); /** Transmit an output frame. * * @TODO@ Auto-fix length of buffer * * The frame will be submitted for transmission. If this command * returns SUCCESS, transmission will continue in the background and * its completion will be indicated by the outputFrameTransmitted * event. With any other return value the transmission failed. * * The caller is not permitted to modify the memory of this frame * after invoking this command. If this command returns SUCCESS, * the caller may hold on to the frame_end value until the * subsequent outputFrameTransmitted event is signalled. */ command error_t sendOutputFrame (frame_key_t key); /** Cancel transmission of an output frame. * * The caller is not permitted to access the memory of this frame * after invoking this command. */ command error_t releaseOutputFrame (frame_key_t key); /** Indication that transmission of an output message has been * resolved. The caller may read the message contents until the * event returns. * * @param key The key that identifies the frame that was transmitted * @param result The disposition of the transmission */ event void outputFrameTransmitted (frame_key_t key, error_t result); } tinyos-2.1.2+dfsg/tos/lib/ppp/PppC.nc000066400000000000000000000060771207233610700173310ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" #include "HdlcFraming.h" /** Top-level configuration for a PPP instance, not including LCP support. * @author Peter A. Bigot */ configuration PppC { uses { interface PppProtocol[ uint16_t protocol ]; interface PppProtocolReject; interface HdlcUart; interface StdControl as UartControl; } provides { interface SplitControl; interface Ppp; interface PppRejectedProtocol; interface GetSetOptions as PppOptions; interface GetSetOptions as HdlcFramingOptions; } } implementation { components PppP; PppProtocol = PppP; PppProtocolReject = PppP; PppRejectedProtocol = PppP; SplitControl = PppP; Ppp = PppP; PppOptions = PppP; /** Maximum output frame comprises two octects for the protocol, and * the maximum supported MRU. CRC octets are not stored in the * outgoing frame. */ components new FragmentPoolC(2 + PPP_MAXIMUM_MRU, PPP_HDLC_TX_FRAME_LIMIT) as TransmitFramePoolC; PppP.TransmitFramePool -> TransmitFramePoolC; /* Maximum input frame comprises two octets for the protocol, the * maximum supported MRU, and two octets for the CRC. * Address/control field bytes are not stored. */ components new HdlcFramingC(2 + PPP_MAXIMUM_MRU + 2, PPP_HDLC_RX_FRAME_LIMIT); PppP.HdlcFraming -> HdlcFramingC; PppP.HdlcControl -> HdlcFramingC; HdlcFramingOptions = HdlcFramingC; UartControl = HdlcFramingC; HdlcUart = HdlcFramingC; components LedC; PppP.MultiLed -> LedC; } tinyos-2.1.2+dfsg/tos/lib/ppp/PppConfigure.nc000066400000000000000000000067771207233610700210770ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Provide facility to set a complete set of options for a given * protocol. * * @author Peter A. Bigot */ interface PppConfigure { /** Completely reset all options prior to a new negotiation sequence. * * This brings things back to their power-up default, and is * executed when the link goes down. This includes default proposed * local and remote values, as well as resetting whether the option * is negotiable. */ command void resetOptions (); /** Set (reset) the local value for a protocol's options. * * This is invoked to set options by passing an encoded option set * extracted from a received Configure-Ack; to convey proposed * alternatives from a Configure-Nak; and to disable negotiation * from a Configure-Reject. If the code is for Configure-Ack, the * content of this set must match the previously transmitted * Configure-Request. * * This is invoked with null pointers to reset the local values * prior to transmission of a Configure-Request. * * @param code The message type from which the options were received. * @param dp Start of the encoded option sequence; null for reset * @param dpe End of the encoded option sequence; null for reset */ command void setLocalOptions (uint8_t code, const uint8_t* dp, const uint8_t* dpe); /** Set (reset) the remote value for a protocol's options. * * This is invoked to set options by passing an encoded option set * extracted from a transmitted Configure-Ack (equivalently, an * accepted received Configure-Request). * * This is invoked with null pointers to reset the remote values * upon receipt of a Configure-Request. * * @param dp Start of the encoded option sequence * @param dpe End of the encoded option sequence */ command void setRemoteOptions (const uint8_t* dp, const uint8_t* dpe); } tinyos-2.1.2+dfsg/tos/lib/ppp/PppConfigureEngineC.nc000066400000000000000000000102601207233610700223060ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" /** Implement the four messages used by the Link Control Protocol to * negotiate mutually acceptable options for a PPP session. * * @param Protocol_ the 16-bit protocol value * * @param InhibitCompression If true, this protocol requires that * optional frame compression be inhibited for its packets. * * @param NumOptions An upper bound on the number of options that will * be linked into this engine. * * @author Peter A. Bigot */ generic configuration PppConfigureEngineC (uint16_t Protocol, bool InhibitCompression, uint8_t NumOptions) { uses { interface Ppp; interface PppProtocolOption[ uint8_t type ]; interface LcpAutomaton; } provides { interface PppConfigure; interface PppProtocolCodeSupport as ConfigureRequest; interface PppProtocolCodeSupport as ConfigureAck; interface PppProtocolCodeSupport as ConfigureNak; interface PppProtocolCodeSupport as ConfigureReject; interface PppProtocolCodeSupport as TerminateRequest; interface PppProtocolCodeSupport as TerminateAck; } enum { /** RFC 1661 section 5.1. Data field contains a sequence of options. */ Code_ConfigureRequest = PppControlProtocolCode_ConfigureRequest, /** RFC 1661 section 5.2. Data field contains a sequence of options. */ Code_ConfigureAck = PppControlProtocolCode_ConfigureAck, /** RFC 1661 section 5.3. Data field contains a sequence of options. */ Code_ConfigureNak = PppControlProtocolCode_ConfigureNak, /** RFC 1661 section 5.4. Data field contains a sequence of options. */ Code_ConfigureReject = PppControlProtocolCode_ConfigureReject, /** RFC 1661 section 5.5. Data field contains a sequence of options. */ Code_TerminateRequest = PppControlProtocolCode_TerminateRequest, /** RFC 1661 section 5.5. Data field contains a sequence of options. */ Code_TerminateAck = PppControlProtocolCode_TerminateAck, }; } implementation { components new PppConfigureEngineP(Protocol, InhibitCompression, NumOptions); Ppp = PppConfigureEngineP; PppProtocolOption = PppConfigureEngineP; LcpAutomaton = PppConfigureEngineP; PppConfigure = PppConfigureEngineP; ConfigureRequest = PppConfigureEngineP.ConfigureRequest; ConfigureAck = PppConfigureEngineP.ConfigureAck; ConfigureNak = PppConfigureEngineP.ConfigureNak; ConfigureReject = PppConfigureEngineP.ConfigureReject; TerminateRequest = PppConfigureEngineP.TerminateRequest; TerminateAck = PppConfigureEngineP.TerminateAck; components MainC; MainC.SoftwareInit -> PppConfigureEngineP; } tinyos-2.1.2+dfsg/tos/lib/ppp/PppConfigureEngineP.nc000066400000000000000000000434761207233610700223420ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" generic module PppConfigureEngineP (uint16_t Protocol, bool InhibitCompression, uint8_t NumOptions) { uses { interface Ppp; interface PppProtocolOption[ uint8_t type ]; interface LcpAutomaton; } provides { interface Init; interface PppConfigure; interface PppProtocolCodeSupport as ConfigureRequest; interface PppProtocolCodeSupport as ConfigureAck; interface PppProtocolCodeSupport as ConfigureNak; interface PppProtocolCodeSupport as ConfigureReject; interface PppProtocolCodeSupport as TerminateRequest; interface PppProtocolCodeSupport as TerminateAck; } } implementation { enum { /** RFC 1661 section 5.1. Data field contains a sequence of options. */ Code_ConfigureRequest = PppControlProtocolCode_ConfigureRequest, /** RFC 1661 section 5.2. Data field contains a sequence of options. */ Code_ConfigureAck = PppControlProtocolCode_ConfigureAck, /** RFC 1661 section 5.3. Data field contains a sequence of options. */ Code_ConfigureNak = PppControlProtocolCode_ConfigureNak, /** RFC 1661 section 5.4. Data field contains a sequence of options. */ Code_ConfigureReject = PppControlProtocolCode_ConfigureReject, /** RFC 1661 section 5.5. Data field contains a sequence of options. */ Code_TerminateRequest = PppControlProtocolCode_TerminateRequest, /** RFC 1661 section 5.5. Data field contains a sequence of options. */ Code_TerminateAck = PppControlProtocolCode_TerminateAck, }; event void Ppp.outputFrameTransmitted (frame_key_t key, error_t err) { } event void LcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } event void LcpAutomaton.thisLayerUp () { } event void LcpAutomaton.thisLayerDown () { } event void LcpAutomaton.thisLayerStarted () { } event void LcpAutomaton.thisLayerFinished () { call PppConfigure.resetOptions(); } /** List of linked option types, as determined on startup. Reserve * one space for 0 which marks end of list. */ uint8_t optionTypes_[NumOptions+1]; command error_t Init.init () { uint8_t* otp = optionTypes_; uint8_t* otpe = otp + sizeof(optionTypes_) / sizeof(*otp) - 1; uint8_t type = 0; while ((0 != ++type) && (otp < otpe)) { if (0 != call PppProtocolOption.getType[type]()) { *otp++ = type; } } *otp = 0; return SUCCESS; } void setOptions (const uint8_t* sp, const uint8_t* spe, uint8_t code, bool use_local) { //printf("OPTIONS %s %s\r\n", (sp ? "set" : "reset"), (use_local ? "local" : "remote")); if (! sp) { uint8_t* otp = optionTypes_; while (*otp) { uint8_t type = *otp++; if (use_local) { call PppProtocolOption.setLocal[type](0, 0); } else { call PppProtocolOption.setRemote[type](0, 0); } } } else { while ((sp+2) <= spe) { uint8_t type = *sp++; uint8_t length = *sp++ - 2; /* Subtract to account for type and length */ if (0 == call PppProtocolOption.getType[type]()) { /* This shouldn't happen: the options should have been * validated. */ } else { if (use_local) { switch (code) { case Code_ConfigureAck: (void)call PppProtocolOption.setLocal[type](sp, sp + length); break; case Code_ConfigureNak: (void)call PppProtocolOption.processNakValue[type](sp, sp + length); break; case Code_ConfigureReject: (void)call PppProtocolOption.setNegotiable[type](FALSE); break; default: break; } } else { (void)call PppProtocolOption.setRemote[type](sp, sp + length); } //printf("OPT %d set %d len %u rc %d\r\n", type, use_local, length, rc); } sp += length; } } } command void PppConfigure.resetOptions () { uint8_t* otp = optionTypes_; while (*otp) { uint8_t type = *otp++; call PppProtocolOption.reset[type](); } } command void PppConfigure.setLocalOptions (uint8_t code, const uint8_t* dp, const uint8_t* dpe) { setOptions(dp, dpe, code, TRUE); } command void PppConfigure.setRemoteOptions (const uint8_t* dp, const uint8_t* dpe) { setOptions(dp, dpe, Code_ConfigureAck, FALSE); } error_t completeInvoke_ (frame_key_t key, const uint8_t* frame_end, frame_key_t* keyp) { error_t rc = call Ppp.fixOutputFrameLength(key, frame_end); if (SUCCESS == rc) { rc = call Ppp.sendOutputFrame(key); } if (SUCCESS != rc) { (void) call Ppp.releaseOutputFrame(key); } else { if (keyp) { *keyp = key; } } return rc; } uint8_t idConfigureRequest; command uint8_t ConfigureRequest.getCode () { return Code_ConfigureRequest; } command error_t ConfigureRequest.invoke (void* param, frame_key_t* keyp) { const uint8_t* fpe; frame_key_t key; uint8_t* fp = call Ppp.getOutputFrame(Protocol, &fpe, InhibitCompression, &key); const uint8_t* frame_start = fp; uint8_t* flp; uint8_t type = 1; uint8_t* otp = optionTypes_; if (0 == fp) { return EBUSY; } *fp++ = Code_ConfigureRequest; *fp++ = ++idConfigureRequest; flp = fp; fp += 2; /* Walk all the types in order */ while (*otp) { type = *otp++; if (call PppProtocolOption.isNegotiable[type]()) { uint8_t* ofp = fp; uint8_t* lfp; /* Store the option type, reserve space for then length, * then store the proposed value. If something goes wrong, * drop the option, otherwise record the length and move * on. */ *fp++ = type; lfp = fp++; fp = call PppProtocolOption.appendRequest[type](fp, fpe); if (0 == fp) { fp = ofp; } else { *lfp = (fp - ofp); } } } { uint16_t frame_len = (fp - frame_start); *flp++ = (frame_len >> 8); *flp++ = (frame_len & 0x0FF); } return completeInvoke_(key, fp, keyp); } command error_t ConfigureRequest.process (uint8_t identifier, const uint8_t* sp, const uint8_t* spe) { error_t rc; uint8_t overall_disposition = Code_ConfigureRequest; // initial value forces reset in loop const uint8_t* fpe; frame_key_t key; uint8_t* fp = call Ppp.getOutputFrame(Protocol, &fpe, InhibitCompression, &key); uint8_t* dp = 0; LcpEventParams_rcr_t evt_params; if (0 == fp) { return EBUSY; } rc = SUCCESS; while ((SUCCESS == rc) && ((sp+2) <= spe)) { uint8_t type = *sp++; uint8_t length = *sp++ - 2; /* Subtract to account for type and length */ uint8_t disposition; if (0 == call PppProtocolOption.getType[type]()) { disposition = Code_ConfigureReject; } else { disposition = call PppProtocolOption.considerRequest[type](sp, sp + length); } /* If we've downgraded to a new disposition, reset the pointers * to start constructing a new message. */ if (disposition > overall_disposition) { evt_params.options = dp = fp + 4; /* Offset by code, identifier, and length (to be written before transmission) */ overall_disposition = disposition; } /* If the disposition of the option matches the disposition of * the message we're building, tack the option value onto the * message. */ if (disposition == overall_disposition) { if (fpe < (dp+2)) { rc = ENOMEM; } else { /* @TODO@ Verify there is enough room to store the option */ *dp++ = type; if (Code_ConfigureNak == disposition) { uint8_t* lp = dp++; /* Paste on the proposed alternative. */ dp = call PppProtocolOption.appendNakValue[type](sp, sp + length, dp, fpe); if (0 == dp) { /* @TODO@ Now what? This might occur if there is a * proposed alternative option, but the outgoing frame * doesn't have room to hold it. Couldn't have checked * above, because we didn't know the option length. */ rc = ENOMEM; } /* Length is type byte plus distance from length field to end of option */ *lp = (dp - lp) + 1; } else { /* Copy from the incoming message */ *dp++ = length + 2; /* Add to account for type and length */ if (fpe < (dp + length)) { rc = ENOMEM; } else { memmove(dp, sp, length); dp += length; } } } } sp += length; } if (SUCCESS == rc) { unsigned int frame_len = dp - fp; *fp++ = overall_disposition; *fp++ = identifier; *fp++ = (frame_len >> 8); *fp++ = (frame_len & 0x0ff); rc = call Ppp.fixOutputFrameLength(key, dp); } if (SUCCESS == rc) { evt_params.good = (Code_ConfigureAck == overall_disposition); evt_params.disposition = overall_disposition; evt_params.options_end = dp; evt_params.scx_key = key; /* Signal the event. If the automaton is busy, release the output * frame and try again later. For success and all other errors, * the automaton is responsible for releasing the frame */ rc = call LcpAutomaton.signalEvent(LAE_ReceiveConfigureRequest, &evt_params); if (ERETRY == rc) { call Ppp.releaseOutputFrame(key); } } else { (void) call Ppp.releaseOutputFrame(key); } return rc; } command uint8_t ConfigureAck.getCode () { return Code_ConfigureAck; } command error_t ConfigureAck.process (uint8_t identifier, const uint8_t* data, const uint8_t* data_end) { LcpEventParams_opts_t evt_params; /* Silently drop responses to outdated requests */ if (idConfigureRequest != identifier) { return SUCCESS; } evt_params.code = Code_ConfigureAck; evt_params.options = data; evt_params.options_end = data_end; return call LcpAutomaton.signalEvent(LAE_ReceiveConfigureAck, &evt_params); } command error_t ConfigureAck.invoke (void* param, frame_key_t* keyp) { return FAIL; } error_t processNakReject (uint8_t code, uint8_t identifier, const uint8_t* data, const uint8_t* data_end) { LcpEventParams_opts_t evt_params; /* Silently drop responses to outdated requests */ if (idConfigureRequest != identifier) { return SUCCESS; } evt_params.code = code; evt_params.options = data; evt_params.options_end = data_end; return call LcpAutomaton.signalEvent(LAE_ReceiveConfigureNakRej, &evt_params); } command uint8_t ConfigureNak.getCode () { return Code_ConfigureNak; } command error_t ConfigureNak.process (uint8_t identifier, const uint8_t* data, const uint8_t* data_end) { return processNakReject(Code_ConfigureNak, identifier, data, data_end); } command error_t ConfigureNak.invoke (void* param, frame_key_t* keyp) { return FAIL; } command uint8_t ConfigureReject.getCode () { return Code_ConfigureReject; } command error_t ConfigureReject.process (uint8_t identifier, const uint8_t* data, const uint8_t* data_end) { return processNakReject(Code_ConfigureReject, identifier, data, data_end); } command error_t ConfigureReject.invoke (void* param, frame_key_t* keyp) { return FAIL; } error_t processTerminate_ (uint8_t code, const uint8_t* data, const uint8_t* data_end, frame_key_t sta_key) { LcpEventParams_term_t evt_params; evt_params.code = Code_TerminateRequest; evt_params.data = data; evt_params.data_end = data_end; evt_params.sta_key = sta_key; return call LcpAutomaton.signalEvent(LAE_ReceiveTerminateRequest, &evt_params); } uint8_t idTerminateRequest; command uint8_t TerminateRequest.getCode () { return Code_TerminateRequest; } command error_t TerminateRequest.process (uint8_t identifier, const uint8_t* data, const uint8_t* data_end) { frame_key_t key; const uint8_t* fpe; uint8_t* fp = call Ppp.getOutputFrame(Protocol, &fpe, InhibitCompression, &key); unsigned int frame_len; error_t rc; if (0 == fp) { return EBUSY; } fp[0] = Code_TerminateAck; fp[1] = identifier; frame_len = 4 + (data_end - data); if ((fp + frame_len) > fpe) { frame_len = (fpe - fp); } memcpy(fp+4, data, frame_len - 4); fp[2] = (frame_len >> 8); fp[3] = (frame_len & 0x0ff); rc = call Ppp.fixOutputFrameLength(key, fp+frame_len); if (SUCCESS != rc) { return rc; } rc = processTerminate_(Code_TerminateRequest, data, data_end, key); if (ERETRY == rc) { call Ppp.releaseOutputFrame(key); } return rc; } command error_t TerminateRequest.invoke (void* param, frame_key_t* keyp) { return FAIL; } command uint8_t TerminateAck.getCode () { return Code_TerminateAck; } command error_t TerminateAck.process (uint8_t identifier, const uint8_t* data, const uint8_t* data_end) { /* Silently drop responses to outdated requests */ if (idTerminateRequest != identifier) { return SUCCESS; } return processTerminate_(Code_TerminateAck, data, data_end, 0); } uint8_t idTerminateAck; command error_t TerminateAck.invoke (void* param, frame_key_t* keyp) { const uint8_t* fpe; frame_key_t key; uint8_t* fp = call Ppp.getOutputFrame(Protocol, &fpe, InhibitCompression, &key); if (0 == fp) { return EBUSY; } *fp++ = Code_TerminateAck; *fp++ = ++idTerminateAck; *fp++ = 0; *fp++ = 2; return completeInvoke_(key, fp, keyp); } default command uint8_t PppProtocolOption.getType[ uint8_t type ] (){ return 0; } default command bool PppProtocolOption.isNegotiable[ uint8_t type ] (){ return FALSE; } default command uint8_t PppProtocolOption.considerRequest[ uint8_t type ] (const uint8_t* dp, const uint8_t* dpe) { return Code_ConfigureReject; } default command void PppProtocolOption.setNegotiable[ uint8_t type ] (bool is_negotiable) { } default command void PppProtocolOption.reset[ uint8_t type ] () { } default command void PppProtocolOption.setLocal[ uint8_t type ] (const uint8_t* dp, const uint8_t* dpe) { } default command void PppProtocolOption.setRemote[ uint8_t type ] (const uint8_t* dp, const uint8_t* dpe) { } default command void PppProtocolOption.processNakValue[ uint8_t type ] (const uint8_t* dp, const uint8_t* dpe) { } default command uint8_t* PppProtocolOption.appendRequest[ uint8_t type ] (uint8_t* dp, const uint8_t* dpe) { return 0; } default command uint8_t* PppProtocolOption.appendNakValue[ uint8_t type ] (const uint8_t* sp, const uint8_t* spe, uint8_t* dp, const uint8_t* dpe) { return 0; } } tinyos-2.1.2+dfsg/tos/lib/ppp/PppDaemonC.nc000066400000000000000000000056171207233610700204540ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" #include "HdlcFraming.h" /** A complete PPP daemon: the basic PPP infrastructure with an * instance of Link Control Protocol already linked in. * * @author Peter A. Bigot */ configuration PppDaemonC { uses { interface PppProtocol[ uint16_t protocol ]; interface HdlcUart; interface StdControl as UartControl; } provides { interface SplitControl; interface LcpAutomaton; interface Ppp; interface GetSetOptions as PppOptions; interface GetSetOptions as HdlcFramingOptions; } } implementation { components PppDaemonP; SplitControl = PppDaemonP; components PppC; PppProtocol = PppC; HdlcUart = PppC; UartControl = PppC; PppOptions = PppC; Ppp = PppC; HdlcFramingOptions = PppC; PppDaemonP.PppControl -> PppC; components LinkControlProtocolC; PppC.PppProtocol[LinkControlProtocolC.Protocol] -> LinkControlProtocolC; LinkControlProtocolC.Ppp -> PppC; LinkControlProtocolC.HdlcFramingOptions -> PppC; LinkControlProtocolC.PppOptions -> PppC; LcpAutomaton = LinkControlProtocolC; PppDaemonP.ProtocolReject -> LinkControlProtocolC.ProtocolReject; PppDaemonP.LcpAutomaton -> LinkControlProtocolC; PppC.PppProtocolReject -> PppDaemonP; LinkControlProtocolC.PppRejectedProtocol -> PppC.PppRejectedProtocol; } tinyos-2.1.2+dfsg/tos/lib/ppp/PppDaemonP.nc000066400000000000000000000062361207233610700204670ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "lcp.h" module PppDaemonP { uses { interface LcpAutomaton; interface SplitControl as PppControl; interface PppProtocolCodeSupport as ProtocolReject; } provides { interface SplitControl; interface PppProtocolReject; } } implementation { command error_t SplitControl.start () { error_t rc; rc = call LcpAutomaton.open(); if (SUCCESS != rc) { return rc; } return call PppControl.start(); } event void PppControl.startDone (error_t rc) { if (SUCCESS == rc) { call LcpAutomaton.up(); } } default event void SplitControl.startDone (error_t error) { } event void PppControl.stopDone (error_t rc) { if (SUCCESS == rc) { call LcpAutomaton.down(); } } command error_t SplitControl.stop () { error_t rc; rc = call LcpAutomaton.close(); return call PppControl.stop(); } default event void SplitControl.stopDone (error_t error) { } command error_t PppProtocolReject.process (unsigned int protocol, const uint8_t* information, unsigned int length) { protocolReject_param_t args; args.protocol = protocol; args.information = information; args.information_length = length; return call ProtocolReject.invoke(&args, 0); } event void LcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } event void LcpAutomaton.thisLayerUp () { } event void LcpAutomaton.thisLayerDown () { } event void LcpAutomaton.thisLayerStarted () { } event void LcpAutomaton.thisLayerFinished () { } } tinyos-2.1.2+dfsg/tos/lib/ppp/PppIpv6.nc000066400000000000000000000065731207233610700177740ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "pppipv6.h" /** Interface supporting RFC5072 IPv6-over-PPP using the OSIAN/TinyOS * PPP daemon. * * This interface is intended as a bridge between the PPP daemon and a * specific implementation of IPv6, such as blip or OIP. * * @author Peter A. Bigot */ interface PppIpv6 { /** Return the negotiated IID for the local (TinyOS) end of the PPP * link. * * @return Pointer to configured IID; null pointer if the link is * not up. */ command const ppp_ipv6cp_iid_t* localIid (); /** Return the negotiated IID for the remote (PC) end of the PPP * link. * * @return Pointer to configured remote IID; null pointer if the * link is not up. */ command const ppp_ipv6cp_iid_t* remoteIid (); /** Transmit data to the remote end. * * @param message Pointer to a sequence of octets to be transmitted. * * @param len The number of bytes to transmit. * * @return SUCCESS iff a frame could be allocated and the message * transmitted. */ command error_t transmit (const uint8_t* message, unsigned int len); /** @return TRUE iff the LCP automaton is in a link-up state. */ command bool linkIsUp (); /** Signal that the PPP link has come up */ event void linkUp (); /** Signal that the PPP link has gone down */ event void linkDown (); /** Signal that a message has been received over the PPP link. * * @param message Sequence of octets received, after all * PPP-relevant framing has been removed. * * @param len Number of octets received. * * @return SUCCESS if the recipient has successfully processed the * message. Non-SUCCESS values may be used for purposes as defined * by PppProtocol.process(). */ event error_t receive (const uint8_t* message, unsigned int len); } tinyos-2.1.2+dfsg/tos/lib/ppp/PppIpv6C.nc000066400000000000000000000100001207233610700200530ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" #include "pppipv6.h" /** TinyOS PPP Network Control Protocol for IPv6 per RFC5072. * * @author Peter A. Bigot */ configuration PppIpv6C { provides { interface PppIpv6; interface PppProtocol as PppControlProtocol; interface PppProtocol; interface LcpAutomaton; } uses { interface Ppp; interface LcpAutomaton as LowerLcpAutomaton; } enum { ControlProtocol = PppProtocol_Ipv6Cp, Protocol = PppProtocol_Ipv6, }; } implementation { components PppIpv6P as ProtocolC; PppIpv6 = ProtocolC.PppIpv6; PppControlProtocol = ProtocolC.PppControlProtocol; PppProtocol = ProtocolC.PppProtocol; LowerLcpAutomaton = ProtocolC.LowerLcpAutomaton; components MainC; MainC.SoftwareInit -> ProtocolC; /* The configuration engine allows compression, and supports one option */ components new PppConfigureEngineC(ControlProtocol, FALSE, 1); PppConfigureEngineC.PppProtocolOption[Ipv6CpOpt_InterfaceIdentifier] -> ProtocolC.InterfaceIdentifierOption; ProtocolC.PppConfigure -> PppConfigureEngineC; /* Allocate a coordinator and link in the supported codes */ components new PppProtocolCodeCoordinatorC(ControlProtocol) as CoordinatorC; ProtocolC.PppProtocolCodeCoordinator -> CoordinatorC; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_ConfigureRequest] -> PppConfigureEngineC.ConfigureRequest; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_ConfigureAck] -> PppConfigureEngineC.ConfigureAck; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_ConfigureNak] -> PppConfigureEngineC.ConfigureNak; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_ConfigureReject] -> PppConfigureEngineC.ConfigureReject; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_TerminateRequest] -> PppConfigureEngineC.TerminateRequest; CoordinatorC.CodeHandler[PppConfigureEngineC.Code_TerminateAck] -> PppConfigureEngineC.TerminateAck; /* Hook in the LCP automaton. */ components new LcpAutomatonC(ControlProtocol, FALSE); LcpAutomaton = LcpAutomatonC; PppConfigureEngineC.LcpAutomaton -> LcpAutomatonC; LcpAutomatonC.ConfigureRequest -> PppConfigureEngineC.ConfigureRequest; LcpAutomatonC.TerminateAck -> PppConfigureEngineC.TerminateAck; LcpAutomatonC.PppConfigure -> PppConfigureEngineC; ProtocolC.LcpAutomaton -> LcpAutomatonC; /* Whatever provides Ppp needs to go to all these components */ Ppp = ProtocolC; Ppp = CoordinatorC; Ppp = PppConfigureEngineC; Ppp = LcpAutomatonC; } tinyos-2.1.2+dfsg/tos/lib/ppp/PppIpv6P.nc000066400000000000000000000172641207233610700201130ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "pppipv6.h" module PppIpv6P { provides { interface Init; interface PppIpv6; interface PppProtocol as PppControlProtocol; interface PppProtocolOption as InterfaceIdentifierOption; interface PppProtocol; } uses { interface Ppp; interface PppConfigure; interface PppProtocolCodeCoordinator; interface LcpAutomaton; interface LcpAutomaton as LowerLcpAutomaton; } } implementation { enum { ControlProtocol = PppProtocol_Ipv6Cp, Protocol = PppProtocol_Ipv6, }; /* ============================== */ /* InterfaceIdentifier */ bool negotiateIID_ = TRUE; bool linkIsUp_; ppp_ipv6cp_iid_t localIID_; ppp_ipv6cp_iid_t proposedLocalIID_; ppp_ipv6cp_iid_t remoteIID_; command const ppp_ipv6cp_iid_t* PppIpv6.localIid () { return linkIsUp_ ? &localIID_ : 0; } command const ppp_ipv6cp_iid_t* PppIpv6.remoteIid () { return linkIsUp_ ? &remoteIID_ : 0; } command bool PppIpv6.linkIsUp () { return linkIsUp_; } default event void PppIpv6.linkUp () { } default event void PppIpv6.linkDown () { } command error_t Init.init () { return SUCCESS; } /* Interface-Identifier is sent in a request to indicate the IID * that the sender wishes to use for its link-local IPv6 address. * Transmission of a value of zero indicates a request that the peer * provide a preferred IID via a Configure-Nak response. */ command uint8_t InterfaceIdentifierOption.getType () { return Ipv6CpOpt_InterfaceIdentifier; } command bool InterfaceIdentifierOption.isNegotiable () { return negotiateIID_; } command void InterfaceIdentifierOption.setNegotiable (bool is_negotiable) { negotiateIID_ = is_negotiable; } command uint8_t InterfaceIdentifierOption.considerRequest (const uint8_t* dp, const uint8_t* dpe) { return PppControlProtocolCode_ConfigureAck; } command uint8_t* InterfaceIdentifierOption.appendRequest (uint8_t* dp, const uint8_t* dpe) { if (dpe < (dp+sizeof(proposedLocalIID_))) { return 0; } memcpy(dp, &proposedLocalIID_, sizeof(proposedLocalIID_)); dp += sizeof(proposedLocalIID_); return dp; } command uint8_t* InterfaceIdentifierOption.appendNakValue (const uint8_t* sp, const uint8_t* spe, uint8_t* dp, const uint8_t* dpe) { return dp; } command void InterfaceIdentifierOption.setRemote (const uint8_t* dp, const uint8_t* dpe) { memcpy(&remoteIID_, dp, sizeof(remoteIID_)); } command void InterfaceIdentifierOption.setLocal (const uint8_t* dp, const uint8_t* dpe) { if (dp) { memcpy(&localIID_, dp, sizeof(localIID_)); } else { memset(&localIID_, 0, sizeof(localIID_)); } } command void InterfaceIdentifierOption.processNakValue (const uint8_t* dp, const uint8_t* dpe) { memcpy(&proposedLocalIID_, dp, sizeof(proposedLocalIID_)); } command void InterfaceIdentifierOption.reset () { call InterfaceIdentifierOption.setNegotiable(TRUE); memset(&proposedLocalIID_, 0, sizeof(proposedLocalIID_)); } event void Ppp.outputFrameTransmitted (frame_key_t key, error_t err) { } command unsigned int PppControlProtocol.getProtocol () { return ControlProtocol; } command unsigned int PppProtocol.getProtocol () { return Protocol; } command error_t PppControlProtocol.process (const uint8_t* information, unsigned int information_length) { return call PppProtocolCodeCoordinator.dispatch(information, information_length); } command error_t PppProtocol.process (const uint8_t* information, unsigned int information_length) { return signal PppIpv6.receive(information, information_length); } command error_t PppProtocol.rejectedByPeer (const uint8_t* data, const uint8_t* data_end) { /* Not sure what to do about this, since the peer could only send * a Protocol-Reject message if it actually implemented the * Link-Control-Protocol. */ return SUCCESS; } command error_t PppControlProtocol.rejectedByPeer (const uint8_t* data, const uint8_t* data_end) { /* Not sure what to do about this, since the peer could only send * a Protocol-Reject message if it actually implemented the * Link-Control-Protocol. */ return SUCCESS; } event void LcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } event void LcpAutomaton.thisLayerUp () { linkIsUp_ = TRUE; signal PppIpv6.linkUp(); } event void LcpAutomaton.thisLayerDown () { linkIsUp_ = FALSE; signal PppIpv6.linkDown(); } event void LcpAutomaton.thisLayerStarted () { } event void LcpAutomaton.thisLayerFinished () { } event void LowerLcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } event void LowerLcpAutomaton.thisLayerUp () { call LcpAutomaton.up(); } event void LowerLcpAutomaton.thisLayerDown () { call LcpAutomaton.down(); call PppConfigure.resetOptions(); } event void LowerLcpAutomaton.thisLayerStarted () { } event void LowerLcpAutomaton.thisLayerFinished () { } command error_t PppIpv6.transmit (const uint8_t* message, unsigned int len) { error_t rc; frame_key_t key; const uint8_t* fpe; uint8_t* fp = call Ppp.getOutputFrame(PppProtocol_Ipv6, &fpe, FALSE, &key); if ((! fp) || ((fpe - fp) < len)) { if (fp) { call Ppp.releaseOutputFrame(key); } return ENOMEM; } memcpy(fp, message, len); rc = call Ppp.fixOutputFrameLength(key, fp + len); if (SUCCESS == rc) { rc = call Ppp.sendOutputFrame(key); } return rc; } } tinyos-2.1.2+dfsg/tos/lib/ppp/PppP.nc000066400000000000000000000342011207233610700173340ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" module PppP { uses { interface HdlcFraming; interface FragmentPool as TransmitFramePool; interface PppProtocol[ uint16_t protocol ]; interface PppProtocolCodeSupport as ProtocolReject; interface PppProtocolReject; interface StdControl as HdlcControl; interface MultiLed; } provides { interface SplitControl; interface GetSetOptions as PppOptions; interface Ppp; interface PppRejectedProtocol; } } implementation { /* Options that control how Ppp manages things */ PppOptions_t options = { txProtocolFieldCompression: FALSE, rxProtocolFieldCompression: FALSE, txMaximumReceiveUnit: PPP_MAXIMUM_MRU, rxMaximumReceiveUnit: PPP_MAXIMUM_MRU }; command error_t PppOptions.set (const PppOptions_t* new_options) { if (new_options) { options = *new_options; } else { options.txProtocolFieldCompression = options.rxProtocolFieldCompression = FALSE; options.txMaximumReceiveUnit = options.rxMaximumReceiveUnit = PPP_MAXIMUM_MRU; } #if 0 printf("PPP Opt: PCOMP tx=%d rx=%d; MRU tx=%u rx=%u\r\n", options.txProtocolFieldCompression, options.rxProtocolFieldCompression, options.txMaximumReceiveUnit, options.rxMaximumReceiveUnit); #endif return SUCCESS; } command PppOptions_t PppOptions.get () { return options; } command error_t PppRejectedProtocol.rejected (uint16_t protocol, const uint8_t* data, const uint8_t* data_end) { return call PppProtocol.rejectedByPeer[protocol](data, data_end); } enum { CS_stopped, CS_starting, CS_started, CS_stopping, }; error_t controlResult_; uint8_t controlState_; task void controlEngine_task () { if (CS_started == controlState_) { signal SplitControl.startDone(controlResult_); } else if (CS_stopped == controlState_) { /* @TODO@ Notify upper levels of shutdown, await their signal */ call HdlcControl.stop(); signal SplitControl.stopDone(controlResult_); } } enum { /** Frame is unused */ TFS_unused, /** A fragment has been allocated and somebody's filling it with * data. TFS_INHIBIT_COMPRESSION may be set. */ TFS_filling, /** The fragment has been frozen at its maximum length. The * content may or may not be complete, but cannot extend beyond * the recorded end. TFS_INHIBIT_COMPRESSION may be set. */ TFS_fixed, /** Ppp.sendOutputFrame() has been invoked. The fragment has been * frozen to its final length and placed on the transmission * queue. TFS_INHIBIT_COMPRESSION may be set. */ TFS_queued, /** The frame has been given to HdlcFraming.sendFrame for * processing. */ TFS_transmitting, /** The frame has been transmitted, or the user cancelled it. The * fragment will be released and the frame marked unused by * transmitEngine_task. */ TFS_releasable, /** A mask used to extract the bits that represent a frame state */ TFS_STATE_MASK = 0x0f, /** Auxiliary state indicating that the system indicated on * allocation that compression of frame protocol/address fields * should be suppressed. */ TFS_INHIBIT_COMPRESSION = 0x80, }; typedef struct HdlcTxFrame_t { uint8_t* start; uint8_t* end; uint8_t frame_state; } HdlcTxFrame_t; /** A set of transmission frames permitting queued transmission of * multiple PPP frame and processing in order. */ HdlcTxFrame_t txFrames_[PPP_HDLC_TX_FRAME_LIMIT]; static const HdlcTxFrame_t* txFramesEnd_ = txFrames_ + PPP_HDLC_TX_FRAME_LIMIT; HdlcTxFrame_t* queuedTxFrame_[PPP_HDLC_TX_FRAME_LIMIT]; uint8_t queuedTxFrameIdx_; HdlcTxFrame_t* activeTxFrame_; /** Buffer used to communicate frame errors from the task that * discovered them to one that can safely deal with them. */ HdlcError_e inFrameError__; /** The number of frames that were dropped by the lower level */ unsigned int inFrameDropped__; #if 0 void dumpFrame (const uint8_t* fp, const uint8_t* fpe) { while (fp < fpe) { printf(" %02x", *fp++); } printf("\r\n"); } #endif async event void TransmitFramePool.available (unsigned int length) { } default event void Ppp.outputFrameTransmitted (frame_key_t key, error_t result) { } default command error_t PppProtocolReject.process (unsigned int protocol, const uint8_t* information, unsigned int length) { return SUCCESS; } task void transmitEngine_task (); void releaseTxFrame_ (HdlcTxFrame_t* fp, error_t rc, bool post_done) { if (post_done) { signal Ppp.outputFrameTransmitted(fp->start, rc); } rc = call TransmitFramePool.release(fp->start); if (SUCCESS != rc) { // @INSTRUMENT@ } fp->frame_state = TFS_unused; fp->start = fp->end = 0; } task void transmitEngine_task () { HdlcTxFrame_t* tfp; error_t rc; /* If there's nothing to transmit, or we're already transmitting, * done. */ if ((0 == queuedTxFrameIdx_) || activeTxFrame_) { return; } tfp = queuedTxFrame_[0]; if (0 < --queuedTxFrameIdx_) { memmove(queuedTxFrame_, queuedTxFrame_ + 1, queuedTxFrameIdx_ * sizeof(*queuedTxFrame_)); } rc = call HdlcFraming.sendFrame(tfp->start, tfp->end- tfp->start, !!(tfp->frame_state & TFS_INHIBIT_COMPRESSION)); if (SUCCESS == rc) { tfp->frame_state = TFS_transmitting; activeTxFrame_ = tfp; } else { releaseTxFrame_(tfp, rc, TRUE); } } command uint8_t* Ppp.getOutputFrame (unsigned int protocol, const uint8_t** frame_endp, bool inhibit_compression, frame_key_t* keyp) { error_t rc; uint8_t* fp; bool pcomp; HdlcTxFrame_t* tfp = txFrames_; while (tfp < txFramesEnd_) { if (TFS_unused == tfp->frame_state) { break; } ++tfp; } if (txFramesEnd_ <= tfp) { // @INSTRUMENT@ return 0; } rc = call TransmitFramePool.request(&tfp->start, &tfp->end, PPP_MINIMUM_TX_FRAME_SIZE); if (SUCCESS != rc) { // @INSTRUMENT@ return 0; } tfp->frame_state = TFS_filling; if (inhibit_compression) { tfp->frame_state |= TFS_INHIBIT_COMPRESSION; } pcomp = options.txProtocolFieldCompression && (! inhibit_compression); if (keyp) { *keyp = tfp->start; } fp = tfp->start; if (frame_endp) { *frame_endp = tfp->end; } if ((0x100 > protocol) && pcomp) { *fp++ = protocol; } else { *fp++ = (protocol >> 8); *fp++ = (protocol & 0x0FF); } return fp; } HdlcTxFrame_t* findTxFrame_ (frame_key_t key) { HdlcTxFrame_t* tfp = txFrames_; while (tfp < txFramesEnd_) { if (tfp->start == key) { return tfp; } ++tfp; } return 0; } command error_t Ppp.fixOutputFrameLength (frame_key_t key, const uint8_t* frame_end) { HdlcTxFrame_t* tfp = findTxFrame_(key); error_t rc; if (! tfp) { // @INSTRUMENT@ return EINVAL; } if (frame_end == tfp->end) { // @INSTRUMENT@ } rc = call TransmitFramePool.freeze(tfp->start, frame_end); if (SUCCESS == rc) { tfp->end = (uint8_t*)frame_end; tfp->frame_state = TFS_fixed | (tfp->frame_state & ~TFS_STATE_MASK); } else { releaseTxFrame_(tfp, rc, FALSE); } return rc; } command error_t Ppp.sendOutputFrame (frame_key_t key) { HdlcTxFrame_t* tfp = findTxFrame_(key); if (! tfp) { // @INSTRUMENT@ return EINVAL; } if (TFS_fixed != (tfp->frame_state & TFS_STATE_MASK)) { // @INSTRUMENT@ } tfp->frame_state = TFS_queued | (tfp->frame_state & ~TFS_STATE_MASK); queuedTxFrame_[queuedTxFrameIdx_++] = tfp; post transmitEngine_task(); return SUCCESS; } command error_t Ppp.releaseOutputFrame (frame_key_t key) { HdlcTxFrame_t* tfp = findTxFrame_(key); if (! tfp) { // @INSTRUMENT@ return EINVAL; } releaseTxFrame_(tfp, SUCCESS, FALSE); return SUCCESS; } event void HdlcFraming.sendDone (const uint8_t* data, unsigned int len, error_t err) { if (activeTxFrame_) { releaseTxFrame_(activeTxFrame_, err, TRUE); activeTxFrame_ = 0; post transmitEngine_task(); } } typedef struct Frame_t { const uint8_t* start; const uint8_t* end; } Frame_t; Frame_t readyFrame__[PPP_HDLC_RX_FRAME_LIMIT]; uint8_t readyFrameIdx__; task void processFrame_task () { unsigned int protocol; error_t rc; Frame_t* apf; const uint8_t* dp; atomic { if (0 == readyFrameIdx__) { return; } apf = readyFrame__; } dp = apf->start; #if 0 { printf("Got frame length %u:", apf->end - apf->start); dumpFrame(apf->start, apf->end); } #endif /* Decode the protocol */ protocol = *dp++; if (! (protocol & 1)) { protocol = (protocol << 8) + *dp++; } /* If the protocol is registered, process the message; otherwise, * tell LCP to bounce it. */ if (0 != call PppProtocol.getProtocol[protocol]()) { //printf("Good protocol %04x\r\n", protocol); rc = call PppProtocol.process[protocol](dp, apf->end - dp); } else { rc = call PppProtocolReject.process(protocol, dp, apf->end - dp); } if (ERETRY == rc) { /* Put the frame back into received mode and leave it at the * head of the ready queue. Reprocess the ready queue. */ // @INSTRUMENT@ post processFrame_task(); } else { call HdlcFraming.releaseReceivedFrame(apf->start); atomic { /* Consume the frame; shift any remaining ready frames down in * the queue. */ if (0 < --readyFrameIdx__) { // @INSTRUMENT@ memmove(readyFrame__, readyFrame__+1, readyFrameIdx__ * sizeof(*readyFrame__)); post processFrame_task(); } } } } task void processError_task () { HdlcError_e in_frame_error; unsigned int ifd; atomic { in_frame_error = inFrameError__; ifd = inFrameDropped__; inFrameError__ = 0; inFrameDropped__ = 0; } //printf("Frame error %d\r\n", in_frame_error); } void initializeOptions_ () { options.txProtocolFieldCompression = FALSE; options.rxProtocolFieldCompression = FALSE; options.txMaximumReceiveUnit = PPP_MAXIMUM_MRU; options.rxMaximumReceiveUnit = PPP_MAXIMUM_MRU; } command error_t SplitControl.start () { error_t rc; rc = call HdlcControl.start(); if (SUCCESS != rc) { return rc; } initializeOptions_(); controlState_ = CS_started; controlResult_ = SUCCESS; post controlEngine_task(); return rc; } command error_t SplitControl.stop () { controlState_ = CS_stopping; post controlEngine_task(); return SUCCESS; } async event void HdlcFraming.receivedDelimiter () { } event void HdlcFraming.receivedFrame (const uint8_t* data, unsigned int len) { atomic { Frame_t* fp = readyFrame__ + readyFrameIdx__++; fp->start = data; fp->end = data + len; } post processFrame_task(); } async event void HdlcFraming.receptionError (HdlcError_e code) { atomic { inFrameError__ = code; ++inFrameDropped__; } post processError_task(); } /* Code a default implementation that returns an invalid protocol * code, so we can detect unrecognized protocols. */ default command unsigned int PppProtocol.getProtocol[ uint16_t protocol ] () { return 0; } /* Default implementation of unrecognized protocols should never be * invoked. */ default command error_t PppProtocol.process[ uint16_t protocol ] (const uint8_t* information, unsigned int information_length) { return FAIL; } default command error_t PppProtocol.rejectedByPeer[ uint16_t protocol ] (const uint8_t* data, const uint8_t* data_end) { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/ppp/PppPrintf.h000066400000000000000000000037531207233610700202360ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #ifndef PPP_PPPPRINTF_H #define PPP_PPPPRINTF_H enum { /** The completely unofficial protocol number rudely stolen for * OSIAN PPP print support. * * @TODO@ Convert this to RFC3772-conformant vendor-specific * protocol */ PppProtocol_Printf = 0x404F, }; #ifndef PPP_PRINTF_MAX_BUFFER /** Maximum number of characters in the printf buffer. */ #define PPP_PRINTF_MAX_BUFFER 255 #endif #endif /* PPP_PPPPRINTF_H */ tinyos-2.1.2+dfsg/tos/lib/ppp/PppPrintfC.nc000066400000000000000000000063751207233610700205150ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "PppPrintf.h" /** Support printf(3) within applications that use PPP. * * printf is too useful as a debugging capability to be lost simply * because the serial interface is shuttling packets back and forth. * Wiring this protocol allows console output to be passed to the peer * in a special protocol message, where it can be displayed. * * Applications that do this should use the following wiring: components PppPrintfC; PppC.PppProtocol[PppPrintfC.Protocol] -> PppPrintfC; PppPrintfC.Ppp -> PppC; * where PppC is alternatively PppDaemonC. Simply using this * component without wiring in its protocol will work, in that the * messages will be sent to the peer, but standard PPP implementations * that do not recognize the TinyOS-specific PPP protocol will send a * Protocol-Reject message, which the TinyOS PPP implementation will be * unable to process. Wiring in the protocol allows TinyOS PPP to * disable it when the peer is unable to process the messages, * avoiding log clutter. * * A variant PPP implementation that recognizes TinyOS packets can be * obtained by reading the instructions in the patch file in * ${TOSDIR}/lib/ppp/tos-pppd.patch. * * @note For cross-platform compatibility, this module uses the PutcharP * component from ${TOSDIR}/lib/printf. That directory must be in * your component search path. * * @author Peter A. Bigot */ configuration PppPrintfC { provides { interface PppProtocol; } uses { interface Ppp; } enum { Protocol = PppProtocol_Printf, }; } implementation { components PppPrintfP; PppProtocol = PppPrintfP; Ppp = PppPrintfP; components PutcharC; PutcharC.Putchar -> PppPrintfP; } tinyos-2.1.2+dfsg/tos/lib/ppp/PppPrintfP.nc000066400000000000000000000077761207233610700205400ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "PppPrintf.h" #include /** Implement putchar() in a way that transfers the data in packets * over PPP. */ module PppPrintfP { provides { interface PppProtocol; interface Putchar; } uses { interface Ppp; } } implementation { bool disabled__; enum { Protocol = PppProtocol_Printf, }; #if 255 >= PPP_PRINTF_MAX_BUFFER typedef uint8_t bufferIndex_t; #else /* PPP_PRINTF_MAX_BUFFER */ typedef uint16_t bufferIndex_t; #endif /* PPP_PRINTF_MAX_BUFFER */ char buffer_[PPP_PRINTF_MAX_BUFFER]; bufferIndex_t bufferIndex_; frame_key_t activeKey_; task void sendBuffer_task () { const uint8_t* fpe; frame_key_t key; uint8_t* fp; unsigned int tx_length; error_t rc; if (activeKey_) { return; } fp = call Ppp.getOutputFrame(Protocol, &fpe, FALSE, &key); if (fp == 0) { post sendBuffer_task(); return; } atomic { tx_length = fpe - fp - 1; if (bufferIndex_ < tx_length) { tx_length = bufferIndex_; } *fp++ = tx_length; memmove(fp, buffer_, tx_length); fp += tx_length; bufferIndex_ -= tx_length; if (0 < bufferIndex_) { memcpy(buffer_, buffer_ + tx_length, bufferIndex_); } } rc = call Ppp.fixOutputFrameLength(key, fp); if (SUCCESS == rc) { rc = call Ppp.sendOutputFrame(key); } if (SUCCESS == rc) { activeKey_ = key; } } command unsigned int PppProtocol.getProtocol () { return Protocol; } command error_t PppProtocol.process (const uint8_t* information, unsigned int information_length) { return FAIL; } command error_t PppProtocol.rejectedByPeer (const uint8_t* data, const uint8_t* data_end) { /* If we've been fed a rejected message, disable this protocol. */ atomic disabled__ = (0 != data); return SUCCESS; } event void Ppp.outputFrameTransmitted (frame_key_t key, error_t err) { atomic { if (activeKey_ == key) { activeKey_ = 0; if ((! disabled__) && (0 < bufferIndex_)) { post sendBuffer_task(); } } } } #undef putchar command int Putchar.putchar (int c) { atomic { if ((! disabled__) && (bufferIndex_ < sizeof(buffer_))) { buffer_[bufferIndex_++] = c; post sendBuffer_task(); } } return c; } } tinyos-2.1.2+dfsg/tos/lib/ppp/PppProtocol.nc000066400000000000000000000105151207233610700207400ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Basic interface used by the PPP infrastructure to connect to an * arbitrary protocol. * * Components that provide this interface should generally define an * enumeration value named Protocol in their specification, so that * applications can wire the interface into the PppC Protocols * subsystem using the correct protocol value. See * LinkControlProtocolC for a canonical example. * * @author Peter A. Bigot */ interface PppProtocol { /** Return the protocol code for this protocol. * * This is primarily used to detect unrecognized protocols: a * default implementation is defined that returns protocol 0, which * is an illegal protocol value. Upon detection of this situation, * the PppC component delegates handling to a module that implements * PppProtocolReject. * * @return A non-zero value for a registered protocol; zero if the * protocol is unknown to the system. */ command unsigned int getProtocol (); /** Process an incoming packet with the given information payload. * * The packet memory is owned by the PppC component to which this * protocol has been wired. Normally, that memory is released for * re-use upon return of this command. There are cases where the * protocol requires continued access to the data after this command * completes (for example, to await completion of a PPP * transmission). The called component must invoke the * Ppp.holdInputFrame() command during this command if it requires * continued access to the input buffer. * * @param information A pointer to the start of the information * field for the message. * * @param information_length The number of octets in the information * field. This may incorporate padding; the protocol must determine * this. * * @return SUCCESS if packet was processed. ERETRY if the system is * busy but the packet might be processable again later. Other errors * indicate the packet should not be re-processed. */ command error_t process (const uint8_t* information, unsigned int information_length); /** Invoked to inform protocol that the peer rejected it. * * Poor, sad, lonely protocol. * * @param data If not null, this begins the start of the information * field from the message that caused the peer to reject the * protocol. If null, this is being invoked by the engine after the * link has been reset, indicating that the protocol may re-enable * itself. * * @param data_end Points past the end of whatever portion of the * rejected message was returned by the peer. Null if data is null. * * @return SUCCESS, please. */ command error_t rejectedByPeer (const uint8_t* data, const uint8_t* data_end); } tinyos-2.1.2+dfsg/tos/lib/ppp/PppProtocolCodeCoordinator.nc000066400000000000000000000072061207233610700237420ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Common support for all protocols that use code-based handlers. * * The set of codes recognized by each protocol is different, but the * process of identifying the code and dispatching to the appropriate * handler is the same. Similarly, most such protocols produce an * error response via a Code-Reject packet when an unrecognized code * is encountered. * * @author Peter A. Bigot */ interface PppProtocolCodeCoordinator { /** Extract the code information from an information field and * dispatch it to the appropriate handler. * * If the code is not recognized, this produces a Code-Reject packet * in the given protocol. * * @param information the information section of a PPP packet * * @param information_length the number of octets in the information section * * @return The result of invoking the * PppProtocolCodeSupport.process() command for the appropriate * handler (or of submitting the Code-Reject packet) */ command error_t dispatch (const uint8_t* information, unsigned int information_length); /** Generate the appropriate reject packet for an unrecognized input. * * @param rejected_protocol Normally zero, indicating a Code-Reject * packet should be produced. If non-zero, represents an * unrecognized protocol, and generates a Protocol-Reject packet. * This should only be non-zero when invoked from * LinkControlProtocol. * * @param ip pointer to the start of the rejected packet information field * * @param ipe pointer to the first octet following the rejected * packet's information field * * @param keyp where to store the HDLC transmission frame key for * the transmitted packet. Passing a null pointer indicates the * frame key is not saved (meaning nobody needs to know when the * transmission completes). */ command error_t rejectPacket (unsigned int rejected_protocol, const uint8_t* ip, const uint8_t* ipe, frame_key_t* keyp); } tinyos-2.1.2+dfsg/tos/lib/ppp/PppProtocolCodeCoordinatorC.nc000066400000000000000000000043311207233610700240410ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Provides common support for a protocol that uses LCP-style code-based handlers. * * @param Protocol the Protocol code for which this component coordinates * * @author Peter A. Bigot */ generic configuration PppProtocolCodeCoordinatorC (uint16_t Protocol) { provides { interface PppProtocolCodeCoordinator; } uses { interface Ppp; interface PppProtocolCodeSupport as CodeHandler[ uint8_t code ]; } } implementation { components new PppProtocolCodeCoordinatorP(Protocol); Ppp = PppProtocolCodeCoordinatorP; PppProtocolCodeCoordinator = PppProtocolCodeCoordinatorP; CodeHandler = PppProtocolCodeCoordinatorP; } tinyos-2.1.2+dfsg/tos/lib/ppp/PppProtocolCodeCoordinatorP.nc000066400000000000000000000120511207233610700240540ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" /** Provides common support for a protocol that uses LCP-style code-based handlers. * * @param Protocol the Protocol code for which this component coordinates * * @author Peter A. Bigot */ generic module PppProtocolCodeCoordinatorP (uint16_t Protocol) { provides { interface PppProtocolCodeCoordinator; } uses { interface Ppp; interface PppProtocolCodeSupport as CodeHandler[ uint8_t code ]; } } implementation { event void Ppp.outputFrameTransmitted (frame_key_t key, error_t result) { } /** The unique identifier to be used in the next Protocol-Reject * packet generated. */ uint8_t id_protocolReject; /** The unique identifier to be used in the next Code-Reject packet * generated. */ uint8_t id_codeReject; command error_t PppProtocolCodeCoordinator.rejectPacket (unsigned int rejected_protocol, const uint8_t* ip, const uint8_t* ipe, frame_key_t* keyp) { const uint8_t* fpe = 0; frame_key_t key; uint8_t* fp = call Ppp.getOutputFrame(Protocol, &fpe, TRUE, &key); const uint8_t* frame_start = fp; uint8_t* lp; error_t rc; if (0 == fp) { return EBUSY; } /** TODO: Test this with rejected frames around MRU limit */ if (0 != rejected_protocol) { *fp++ = PppControlProtocolCode_ProtocolReject; *fp++ = id_protocolReject++; } else { *fp++ = PppControlProtocolCode_CodeReject; *fp++ = id_codeReject++; } /* Skip over the length field for now */ lp = fp; fp += 2; if (0 != rejected_protocol) { /* Store the rejected protocol in two octets */ *fp++ = (rejected_protocol >> 8); *fp++ = (rejected_protocol & 0x0FF); } /* Fill out as much of the frame as necessary with as much of the * information field as will fit. */ while ((fp < fpe) && (ip < ipe)) { *fp++ = *ip++; } /* Go back and store the length field */ { unsigned int len = (fp - frame_start); *lp++ = (len >> 8); *lp++ = (len & 0x0FF); } rc = call Ppp.fixOutputFrameLength(key, fp); if (SUCCESS == rc) { rc = call Ppp.sendOutputFrame(key); } if ((SUCCESS == rc) && keyp) { *keyp = key; } return rc; } command error_t PppProtocolCodeCoordinator.dispatch (const uint8_t* information, unsigned int information_length) { const uint8_t* ip = information; const uint8_t* ipe = ip + information_length; uint8_t code = *ip++; uint8_t identifier = *ip++; uint16_t length = ((ip[0] << 8) + ip[1]); ip += 2; /* Decrease the length by space used by the fixed header we've * already consumed. */ length -= 4; if (0 == call CodeHandler.getCode[code]()) { return call PppProtocolCodeCoordinator.rejectPacket(0, information, ipe, 0); } return call CodeHandler.process[code](identifier, ip, ipe); } default command uint8_t CodeHandler.getCode[ uint8_t code ] () { return 0; } default command error_t CodeHandler.process[ uint8_t code ] (uint8_t identifier, const uint8_t* data, const uint8_t* data_end) { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/ppp/PppProtocolCodeSupport.nc000066400000000000000000000063451207233610700231360ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" /** Most PPP control protocols are modeled on RFC1661's Link Control * Protocol, and use a packet format comprising: * - A one-octet Code field * - A one-octet Identifier field * - A two-octet Length field * - A data field of varying length. * * The code determines the specific format of the data field and how * it should be interpreted. This interface allows an application to * determine which codes will be supported by only wiring in the ones * that are necessary. * * @author Peter A. Bigot */ interface PppProtocolCodeSupport { /** Return the code for this handler. * * This is primarily used to detect unrecognized codes: a default * implementation is defined that returns code 0, which is an * illegal code value. Upon detection of this situation, the * control protocol will generate a Code-Reject message. */ command uint8_t getCode (); /** Process an incoming packet with the given identifer and data * region. */ command error_t process (uint8_t identifier, const uint8_t* data, const uint8_t* data_end); /** Invoke some code-specific operation. * * Generally it involves building and transmitting a message. If * so, the key for detection completion of that message should be * returned. * * @param param A code-specific structure, if needed to pass external information * * @param keyp A destination into which the output frame key should * be provided if invocation of this handler results in the * transmission of a message. */ command error_t invoke (void* param, frame_key_t* keyp); } tinyos-2.1.2+dfsg/tos/lib/ppp/PppProtocolOption.nc000066400000000000000000000150671207233610700221400ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Operations that should be supported for each option that can be * configured through an LCP-style automaton negotiation. * * @note We currently do not support options that can appear multiple * times in a single request. * * @author Peter A. Bigot */ interface PppProtocolOption { /** Return the option type code for this option within its protocol. * * This is primarily used to detect unrecognized options: a default * implementation is defined that returns option 0, which is an * illegal option value. Upon detection of this situation, the * configuration processing implementation will generate a * Configure-Reject message. */ command uint8_t getType (); /** Return TRUE iff the option should be added to outgoing * Configure-Request messages. * * If the option is negotiable, appendRequest will invoked to append * the proposed local value to the outgoing request message. * * @note Negotiability of remote values for options is indicated by * the return value of considerRequest. */ command bool isNegotiable (); /** Set whether the local value of the option should be negotiated, * based on protocol activity. * * Option negotiation is set to FALSE upon receipt of a * Configure-Reject message identifying the option, and upon a * Reject return from considerRequest. It is set to TRUE upon * receipt of a non-Reject return from considerRequest. */ command void setNegotiable (bool is_negotiable); /** Determine whether the proposed remote value is acceptable to the * protocol. * @return PppControlProtocolCode_Configure{Ack,Nak,Reject}, * depending on whether the option value specified at dp is * acceptable to this end of the link. */ command uint8_t considerRequest (const uint8_t* dp, const uint8_t* dpe); /** Add a proposed local value to a message. The option type and * length fields are already incorporated; only the data portion is * to be stored. */ command uint8_t* appendRequest (uint8_t* dp, const uint8_t* dpe); /** Add an alternative suggestion to a Nak message. The option type * and length fields are already reserved; only the data portion is * to be stored. * * If the option cannot express an acceptable alternative within the * buffer indicated by dp to dpe, the command should return a null * pointer. Otherwise, the command should return a pointer just * past the last octet of its proposed alternative. * * @param sp The value in the Configure-Request message, in case * that's useful when proposing an alternative * * @param spe Indidates the end of the requested option value * * @param dp Where the proposed alternative should be stored * * @param dpe The limit up to which the proposed alternative may be * written. */ command uint8_t* appendNakValue (const uint8_t* sp, const uint8_t* spe, uint8_t* dp, const uint8_t* dpe); /** Completely reset the option prior to a new negotiation sequence. * * This brings things back to their power-up default, and is * executed when the link goes down. It re-enables options for * negotiation, and restores default proposed local and remote * values. */ command void reset (); /** Set (reset) the option's local value. * * The set operation is invoked on each option present in a received * Configure-Ack message (i.e., this node requested the value). The * reset operation is invoked prior to transmission of a * Configure-Request (need permission for value). * * @param dp Start of the option value. If passed as a null * pointer, option is reset to its default. * * @param dpe First octet past option value. */ command void setLocal (const uint8_t* dp, const uint8_t* dpe); /** Process a proposed alternative local value. * * This operation is invoked when the remote sends a Configure-Nak * in response to local's Configure-Request. Generally, the * response should be to replace the original local value with the * value proposed by the peer, or to mark the option non-negotiable. * * @param dp Start of the option value. * * @param dpe First octet past option value. */ command void processNakValue (const uint8_t* dp, const uint8_t* dpe); /** Set (reset) the option's remote value. * * The set operation is invoked on each option present in a * transmitted Configure-Ack message (i.e., the remote node * requested the value). This is done after transmission. The * reset operation is invoked upon receipt of a Configure-Request. * * @param dp Start of the option value. If passed as a null * pointer, option is reset to its default. * * @param dpe First octet past option value. */ command void setRemote (const uint8_t* dp, const uint8_t* dpe); } tinyos-2.1.2+dfsg/tos/lib/ppp/PppProtocolReject.nc000066400000000000000000000046331207233610700221010ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Allow custom reaction to unrecognized protocols. * * If a Link Control Protocol component is available, its * Protocol-Reject message can be used to inform the remote that a * protocol is unrecognized. Other PPP components may chose to just * drop the message. * * @author Peter A. Bigot */ interface PppProtocolReject { /** Do something when a message with an unrecognized protocol has been received. * * @param protocol The protocol value from the PPP message * * @param information The start of the information field from the * message * * @param length The number of octets in the information field, * including any subsequent padding */ command error_t process (unsigned int protocol, const uint8_t* information, unsigned int length); } tinyos-2.1.2+dfsg/tos/lib/ppp/PppRejectedProtocol.nc000066400000000000000000000045351207233610700224130ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Support to inform the PPP primary engine that one of the * registered protocols was rejected by the peer. * * @author Peter A. Bigot */ interface PppRejectedProtocol { /** Inform main engine that a ProtocolReject message was received. * * @param protocol The protocol value from the rejected message * * @param data The information field of the rejected message * * @param data_end First byte past the end of whatever portion of * the original message could be returned. * * @return The result of informing the protocol that it has been * rejected (see PppProtocol.rejectedByPeer). */ command error_t rejected (uint16_t protocol, const uint8_t* data, const uint8_t* data_end); } tinyos-2.1.2+dfsg/tos/lib/ppp/README000066400000000000000000000065241207233610700170220ustar00rootroot00000000000000This directory contains an implementation of the Point-to-Point Protocol (RFC 1661) in TinyOS. It is suitable for sharing the serial port among multiple packet-oriented communications paths. The goal is a system that allows a TinyOS application that is connected to a PC using a serial port to talk directly to a vendor-supplied PPP daemon and provide the standard IPCP or IPV6CP protocols to forward network packets to a wireless sensor network without any need to install support software on the PC. The architecture permits protocols to be independently developed and wired in, in classic TinyOS fashion. Similarly, protocol options may be included or excluded, and for LCP-style protocols that use messages with codes, lengths, and data fields the set of recognized codes is determined by wiring. In its current form, the PppDaemonC component will successfully negotiate an open connection with the Linux PPP daemon. By linking in the PppIpv6C component, and connecting its PppIpv6 interface to a component that supports some sort of IPv6 API, you can communicate with TinyOS applications over IPv6. The tests/Ipv6 example shows the basic configuration required. Currently there is no IPv4 (RFC1332) module. ---------------------------------------- The tosppd script can be used to start the PPP daemon with the required arguments. Use: sudo ${TOSDIR}/lib/ppp/tospppd See the script for arguments that select serial device, baud rate, and other parameters. ---------------------------------------- The PppPrintfC component can be linked to an application to allow printf(3c) messages to be carried over the PPP link and displayed by the PPP daemon. See the instructions at the top of tos-pppd.patch. Invoke it thusly: sudo TOS_PPPD=/usr/local/tos-pppd/sbin/pppd ${TOSDIR}/lib/ppp/tospppd The Ipv6 demonstration prints the length of received packets, and produces messages like: rcvd [IPV6CP ConfReq id=0x6 ] sent [IPV6CP ConfAck id=0x6 ] local LL address fe80::fd41:4242:0e88:0002 remote LL address fe80::fd41:4242:0e88:0003 Script /etc/ppp/ipv6-up started (pid 11337) rcvd [TOS RX 48 octets] Script /etc/ppp/ipv6-up finished (pid 11337), status = 0x1 rcvd [TOS RX 48 octets] rcvd [TOS RX 48 octets] rcvd [TOS RX 104 octets] rcvd [TOS RX 104 octets] rcvd [TOS RX 104 octets] ======================================== Many of the tests require use of the PPP4Py package, which provides Point-to-Point Protocol support for Python. This package is not necessary for using the daemon, only for running the tests. Get a copy at: git://ppp4py.git.sourceforge.net/gitroot/ppp4py/ppp4py Remember to add it to your PYTHONPATH: PPP4PY_ROOT=${PPP4PY_ROOT:-/home/pab/ppp4py/dev} PYTHONPATH=${PPP4PY_ROOT}:${PYTHONPATH:+:${PYTHONPATH}} PATH="${PPP4PY_ROOT}/scripts:${PPP4PY_ROOT}/bin:${PATH}" export PPP4PY_ROOT PYTHONPATH PATH Most tests have a test.sh script that builds the application, installs it on the default board, and runs the ppp4py test program. Trusted tests, in order of complexity, are: HdlcFraming -- a unit test for HdlcFramingC HdlcRead -- verifies the application correctly decodes HDLC frames HdlcEcho -- verifies HDLC transmission of received frames HdlcSpeed -- round-trip full(half) duplex performance tests Lcp -- Basic Link-Control-Protocol negotiation Ipv6 -- Basic IPV6CP on top of LCP tinyos-2.1.2+dfsg/tos/lib/ppp/lcp.h000066400000000000000000000073331207233610700170700ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #ifndef PPP_LCP_H #define PPP_LCP_H /** Link Control Protocol constants and structures */ #ifndef PPP_LCP_ENABLE_PCOMP /** Control whether protocol compression is supported. * * By default, we disable this option. When enabled, it allows the * protocol field to be represented in a single octet, which cuts down * on transmitted data, but leaves the information field of the packet * aligned on an odd byte boundary, which is really inconvenient when * decoding network packets. */ #define PPP_LCP_ENABLE_PCOMP (0) #endif /* PPP_LCP_ENABLE_PCOMP */ enum { /** RFC 1661 section 6.1. Payload is a uint16_t. @note The MRU * comprises the length of the PPP packet information field * including padding. The protocol field, and any space for HDLC * address/control/FCS data is not accounted for by the MRU. @TODO * support */ LCPOpt_MaximumReceiveUnit = 1, /** RFC 1662 section 7.1. Payload is a uint32_t representing a set * of ASCII control characters. @note Not currently supported */ LCPOpt_AsyncControlCharacterMap = 2, /** RFC 1661 section 6.2. Payload is a uint16_t denoting an * authentication protocol, followed by protocol-specific data. * @note Not currently supported. */ LCPOpt_AuthenticationProtocol = 3, /** RFC 1661 section 6.3. Payload is a uint16_t denoting a quality * protocol, followed by protocol-specific data. @note Not * currently supported. */ LCPOpt_QualityProtocol = 4, /** RFC 1661 section 6.4. Payload is a uint32_t. @TODO support */ LCPOpt_MagicNumber = 5, // 6 deprecated /** RFC 1661 section 6.5. No payload; presence of option is * sufficient. @TODO support */ LCPOpt_ProtocolFieldCompression = 7, /** RFC 1661 section 6.6. No payload; presence of option is * sufficient. @TODO support */ LCPOpt_AddressControlFieldCompression = 8, /* No other LCP options are currently proposed for support */ }; /** Information required by the Protocol-Reject.invoke() method * provided by the LCP component. */ typedef struct protocolReject_param_t { unsigned int protocol; const uint8_t* information; unsigned int information_length; } protocolReject_param_t; #endif /* PPP_LCP_H */ tinyos-2.1.2+dfsg/tos/lib/ppp/ppp.h000066400000000000000000000154371207233610700171150ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #ifndef PPP_PPP_H #define PPP_PPP_H #ifndef PPP_PREFERRED_MRU /** The preferred MRU for packets. This is negotiated, unless it is * the PPP default of 1500 octets. The value reflects the size of the * information field of a PPP packet. Also note that RFC1661 mandates * the implemention must support frames with information fields up to * 1500 octets regardless of the negotiated MRU. We don't necessarily * do that; see PPP_MAXIMUM_MRU. * * It is the developers responsibility to ensure PPP_PREFERRED_MRU <= * PPP_MAXIMUM_MRU, or to intentionally violate this requirement. * * @note Linux PPP requires that the negotiated MRU be at least 1280 * bytes, or it will fail to assign an IPV6 address to the link. * Since the whole point of doing PPP is to enable IPv6, by default * we'll lie during negotation and pretend we can handle 1280 bytes. */ #define PPP_PREFERRED_MRU 1280 #endif /* PPP_PREFERRED_MRU */ #ifndef PPP_MAXIMUM_MRU /** The hard maximum on the length of an information field for a * received PPP frame. Frames that exceed this limit will be dropped * at the HDLC layer. * * It is the developers responsibility to ensure PPP_PREFERRED_MRU <= * PPP_MAXIMUM_MRU, or to intentionally violate this requirement. */ #define PPP_MAXIMUM_MRU PPP_PREFERRED_MRU #endif /* PPP_MAXIMUM_MRU */ #ifndef PPP_HDLC_RX_FRAME_LIMIT /** The maximum number of frames supported by the fragment pool used * for HDLC reception buffers. */ #define PPP_HDLC_RX_FRAME_LIMIT 4 #endif /* PPP_HDLC_RX_FRAME_LIMIT */ #ifndef PPP_HDLC_TX_FRAME_LIMIT /** The maximum number of frames supported by the fragment pool used * for HDLC transmission buffers. */ #define PPP_HDLC_TX_FRAME_LIMIT 4 #endif /* PPP_HDLC_TX_FRAME_LIMIT */ #ifndef PPP_MINIMUM_TX_FRAME_SIZE /** The minimum size, in octets, for an acceptable transmission buffer * to be returned by Ppp.getOutputFrame(). */ #define PPP_MINIMUM_TX_FRAME_SIZE 16 #endif /* PPP_MINIMUM_TX_FRAME_SIZE */ enum { /** The Link Control Protocol is defined in RFC 1661. */ PppProtocol_LinkControlProtocol = 0xc021, /** The IPv6 Protocol is defined in RFC 5072. */ PppProtocol_Ipv6 = 0x57, /** The IPv6 Control Protocol is defined in RFC 5072. */ PppProtocol_Ipv6Cp = 0x8057, }; /** Type holding a key that identifies a particular message frame. * For output frames, the key is the pointer value passed to * Ppp.sendOutputFrame. This key is provided in the subsequent * outputFrameTransmitted event. * * For input frames, the key is the value returned by * Ppp.holdInputFrame. This key must be provided to the subsequent * releaseInputFrame command. * * @note Although the key should be opaque to callers, various parts * of the implementation do rely on its value. */ typedef const uint8_t* frame_key_t; /** Enumerations for control protocol code values. Nominally defined * for the Link-Control-Protocol, in fact these codes are generally * re-used for network control protocols as well. */ enum { /** RFC 1661 section 5.1. Data field contains a sequence of options. */ PppControlProtocolCode_ConfigureRequest = 1, /** RFC 1661 section 5.2. Data field contains a sequence of options. */ PppControlProtocolCode_ConfigureAck = 2, /** RFC 1661 section 5.3. Data field contains a sequence of options. */ PppControlProtocolCode_ConfigureNak = 3, /** RFC 1661 section 5.4. Data field contains a sequence of options. */ PppControlProtocolCode_ConfigureReject = 4, /** RFC 1661 section 5.5. Data field contains uninterpreted data * for use by sender. */ PppControlProtocolCode_TerminateRequest = 5, /** RFC 1661 section 5.5. Data field contains uninterpreted data * for use by sender. */ PppControlProtocolCode_TerminateAck = 6, /** RFC 1661 section 5.6. Data field contains rejected packet, * beginning with information field, truncated to peer's MRU. */ PppControlProtocolCode_CodeReject = 7, /** RFC 1661 section 5.7. Data field contains rejected protocol as * a uint16_t, followed by a copy of the rejected packet, beginning * with the information field, truncated to peer's MRU. */ PppControlProtocolCode_ProtocolReject = 8, /** RFC 1661 section 5.8. Data field contains the magic number * followed by uninterpreted data for use by sender. */ PppControlProtocolCode_EchoRequest = 9, /** RFC 1661 section 5.8. Data field contains the replier's magic * number, with the remainder matching the EchoRequest payload. */ PppControlProtocolCode_EchoReply = 10, /** RFC 1661 section 5.9. Data field contains the magic number * followed by uninterpreted data for use by sender. */ PppControlProtocolCode_DiscardRequest = 11, }; typedef struct PppOptions_t { /** If TRUE, a PPP protocol value that fits in one octet may be * stored that way when messages are transmitted. */ bool txProtocolFieldCompression; /** If TRUE, a PPP protocol value that fits in one octet may be * extracted that way when messages are received. */ bool rxProtocolFieldCompression; /** Records the information field size that the remote has * indicated it prefers to receive. */ uint16_t txMaximumReceiveUnit; /** Records the information field size that the remote has agreed * not to exceed */ uint16_t rxMaximumReceiveUnit; } PppOptions_t; #endif /* PPP_PPP_H */ tinyos-2.1.2+dfsg/tos/lib/ppp/pppipv6.h000066400000000000000000000043131207233610700177110ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Material supporting RFC5072 IPv6-over-PPP, without being bound to * a particular TinyOS implementation of IP. * * @author Peter A. Bigot */ #ifndef PPP_IPV6CP_H #define PPP_IPV6CP_H enum { /** RFC 5072 section 4.1. Payload is a 64-bit interface identifier. * A payload value of all zeros indicates a request that the peer * assign one via a Configure-Nak message. */ Ipv6CpOpt_InterfaceIdentifier = 1, }; /** An RFC5072 interface identifier is a 64-bit integer, suitable for * use as a link-local IPV6 IID. */ typedef struct ppp_ipv6cp_iid_t { uint8_t iid[8]; } ppp_ipv6cp_iid_t; #endif /* PPP_IPV6CP_H */ tinyos-2.1.2+dfsg/tos/lib/ppp/tests/000077500000000000000000000000001207233610700172755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcEcho/000077500000000000000000000000001207233610700207465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcEcho/Makefile000066400000000000000000000002601207233610700224040ustar00rootroot00000000000000COMPONENT=TestAppC TOSMAKE_PATH += .. TOSMAKE_PATH += . PFLAGS += -I$(TOSDIR)/lib/printf PFLAGS += -I$(TOSDIR)/lib/fragpool PFLAGS += -I$(TOSDIR)/lib/ppp include $(MAKERULES) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcEcho/README.txt000066400000000000000000000013761207233610700224530ustar00rootroot00000000000000The HdlcEcho application receives HDLC-encoded frames and echoes them back, with the number of octets in the received frame inserted at the start (resulting in a returned frame that is one octet longer than was sent). This test requires the PPP4Py package. See $(OSIANROOT)/tinyos/tos/lib/ppp/README for further details. Build and install for your platform. If your device is not available on /dev/ttyUSB0 at 115200 baud, you will have to edit the gendata.py script. Then run the test.sh script. Test this with these build combinations: # Defaults make osian surf # Enable mote-side compression of the address/control fields make accomp osian surf # Enable both mote-side and pc-side compression of address/control fields make accomp inhibit_accomp osian surf tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcEcho/TestAppC.nc000066400000000000000000000042511207233610700227550ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Receive HDLC-encoded frames and return them with a length octet * inserted at the front. * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP; components MainC; TestP.Boot -> MainC; TestP.HdlcFraming -> HdlcFramingC; TestP.HdlcFramingOptions -> HdlcFramingC; components LedC; TestP.MultiLed -> LedC; components new HdlcFramingC(1024, 2); HdlcFramingC.HdlcUart -> DefaultHdlcUartC; HdlcFramingC.UartControl -> DefaultHdlcUartC; TestP.HdlcControl -> HdlcFramingC; components DefaultHdlcUartC; components SerialPrintfC; } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcEcho/TestP.nc000066400000000000000000000064561207233610700223420ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include module TestP { uses { interface Boot; interface MultiLed; interface HdlcFraming; interface StdControl as HdlcControl; interface GetSetOptions as HdlcFramingOptions; } } implementation { #ifndef ACCOMP #define ACCOMP 0 #endif #ifndef INHIBIT_ACCOMP #define INHIBIT_ACCOMP 0 #endif uint8_t echo_buffer[1025]; unsigned int echo_len; event void Boot.booted() { error_t rc; HdlcFramingOptions_t options; memset(&options, 0, sizeof(options)); #if ACCOMP options.txSuppressAddressControl = options.rxSuppressAddressControl = 1; #endif; call HdlcFramingOptions.set(&options); options = call HdlcFramingOptions.get(); printf("\r\n\r\n! compress_ac %d\r\n", (options.txSuppressAddressControl << 1) | options.rxSuppressAddressControl); printf("! inhibit_accomp %d\r\n", INHIBIT_ACCOMP); printf("# Boot configuration ready\r\n"); rc = call HdlcControl.start(); if (SUCCESS != rc) { printf("@@@ ERROR: HDLC start got %d\r\n", rc); } } event void HdlcFraming.sendDone (const uint8_t* data, unsigned int len, error_t err) { } task void sendFrame () { call HdlcFraming.sendFrame(echo_buffer, echo_len, INHIBIT_ACCOMP); } event void HdlcFraming.receivedFrame (const uint8_t* data, unsigned int len) { call MultiLed.toggle(0); memcpy(echo_buffer+1, data, len); call HdlcFraming.releaseReceivedFrame(data); echo_buffer[0] = len; echo_len = 1 + len; post sendFrame(); } async event void HdlcFraming.receivedDelimiter () { } async event void HdlcFraming.receptionError (HdlcError_e error) { } } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcEcho/gendata.py000066400000000000000000000063051207233610700227270ustar00rootroot00000000000000import time import ppp4py.hdlc import sys import serial import select import binascii import struct surf_dev = '/dev/ttyUSB0' surf = serial.Serial(surf_dev, baudrate=115200, timeout=5) poller = select.poll() poller.register(surf.fileno()) compress_ac = False inhibit_accomp = False print 'Reading boot status (one line):' while True: t = surf.readline().strip() while t.startswith('\0'): t = t[1:] print t if t.startswith('#'): break if t.startswith('!'): (flag, value) = t[1:].split() value = int(value) print 'flag "%s" value "%d"' % (flag, value) if 'compress_ac' == flag: compress_ac = (0 != value) elif 'inhibit_accomp' == flag: inhibit_accomp = (0 != value) else: print 'Unrecognized flag %s' % (flag,) print 'Address/control compression: %s' % (compress_ac,) framer = ppp4py.hdlc.HDLCforPPP(compress_ac=(compress_ac and not inhibit_accomp)) framer.updateReceivingACCM(0) tests = [ 'a', 'a', 'b', "a\nb", "1\x7e2", "\x7e\x7d\x7d\x72", '123456\x7d89a\x7eABC' * 50 ] def ProcessResponse_Text (framer, test): response = '' while True: if poller.poll(None): c = surf.read() if "\n" == c: print response response = '' return else: response += c num_errors = 0 def ProcessResponse (framer, tx_text): global num_errors timeout = 5000 frame = '' while poller.poll(timeout): c = surf.read() #print 'RX %s' % (binascii.hexlify(c),) framer.putBytes(c) frame += c pkt = framer.getPacket() if (pkt is not None) and (0 < len(pkt)): print 'FRAME: %s' % (binascii.hexlify(frame),) # The address and control frame prefix should be present # iff compress_ac is false or inhibit_accomp is true. fi = 0 if '\x7e' == frame[fi]: fi += 1 if (not compress_ac) or inhibit_accomp: if '\xff\x03' != frame[fi:fi+2]: print 'ERROR: Missing address/control fields' num_errors += 1 else: if '\xff\x03' == frame[fi:fi+2]: print 'ERROR: Unexpected address/control fields' num_errors += 1 (rx_len,) = struct.unpack('B', pkt[0]) rx_text = pkt[1:] if rx_len == (0xff & len(tx_text)): if rx_text == tx_text: print 'PASS rx echoed %d bytes correctly' % (len(tx_text),) else: print 'FAIL tx %s rx %s content error' % (binascii.hexlify(tx_text), binascii.hexlify(rx_text)) num_errors += 1 else: print 'FAIL tx len %d text %s, rx len %d text %s' % (len(tx_text), binascii.hexlify(tx_text), rx_len, binascii.hexlify(rx_text)) num_errors += 1 return for t in tests: framed = framer.framePacket(t) print '\nTest: %s' % (binascii.hexlify(t),) print 'Frame: %s' % (binascii.hexlify(framed),) rv = surf.write(framed) ProcessResponse(framer, t) print 'Total errors: %d' % (num_errors,) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcEcho/inhibit_accomp.extra000066400000000000000000000002631207233610700247640ustar00rootroot00000000000000# Control the flag that requests the remote to inhibit adress/control # compression. ifeq ($(INHIBIT_ACCOMP),) INHIBIT_ACCOMP=1 endif PFLAGS += -DINHIBIT_ACCOMP=$(INHIBIT_ACCOMP) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcEcho/test.sh000077500000000000000000000005701207233610700222660ustar00rootroot00000000000000#!/bin/sh # # Standard test configuration and loop loopcond=true breakloop () { loopcond=false } trap breakloop 1 2 cat < */ configuration TestAppC { } implementation { components TestP; components MainC; components PseudoSerialC; components new HdlcFramingC(256, 4); HdlcFramingC.HdlcUart -> PseudoSerialC; HdlcFramingC.UartControl -> PseudoSerialC; TestP.HdlcControl -> HdlcFramingC; TestP.PseudoSerial -> PseudoSerialC; TestP.HdlcFraming -> HdlcFramingC; TestP.DebugHdlcFraming -> HdlcFramingC; components new MuxAlarmMilli32C(); TestP.KickMe -> MuxAlarmMilli32C; TestP.Boot -> MainC; #include } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcFraming/TestP.nc000066400000000000000000000111571207233610700230410ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include module TestP { uses { interface Boot; interface PseudoSerial; interface StdControl as HdlcControl; interface HdlcFraming; interface DebugHdlcFraming; interface Alarm as KickMe; } #include } implementation { #include const HdlcRxFrame_t* rxFrames_; const HdlcRxFrame_t* rxFrameEnd_; const uint8_t* frames[8]; unsigned int frameLengths[8]; uint8_t frameIdx; uint8_t testCase_; task void kickTestCase_task (); void dumpRxFrame (const HdlcRxFrame_t* fp) { printf("RX %d: %p %p state %d\r\n", fp-rxFrames_, fp->start, fp->end, fp->frame_state); } void dumpRxFrames () { const HdlcRxFrame_t* fp = rxFrames_; while (fp < rxFrameEnd_) { dumpRxFrame(fp++); } } task void kickTestCase_task(); event void HdlcFraming.sendDone (const uint8_t* data, unsigned int len, error_t err) { } event void HdlcFraming.receivedFrame (const uint8_t* data, unsigned int len) { frames[frameIdx] = data; frameLengths[frameIdx] = len; ++frameIdx; post kickTestCase_task(); } async event void KickMe.fired () { post kickTestCase_task(); } async event void HdlcFraming.receivedDelimiter () { } async event void HdlcFraming.receptionError (HdlcError_e code) { } unsigned int stage_; task void testCase0_task () { switch (stage_++) { case 0: ASSERT_EQUAL(RFS_receiving, rxFrames_[0].frame_state); call PseudoSerial.feedUartStream("\x7e\xff\x7d\x23\x61\xd8\x58\x7e", 8); break; case 1: ASSERT_EQUAL(RFS_processing, rxFrames_[0].frame_state); ASSERT_EQUAL(RFS_receiving, rxFrames_[1].frame_state); call PseudoSerial.feedUartStream("\xff\x7d\x23\x61\xd8\x58\x7e", 7); break; case 2: ASSERT_EQUAL(RFS_processing, rxFrames_[0].frame_state); call HdlcFraming.releaseReceivedFrame(frames[0]); ASSERT_EQUAL(RFS_releasable, rxFrames_[0].frame_state); post kickTestCase_task(); break; case 3: ASSERT_EQUAL(RFS_unused, rxFrames_[0].frame_state); call HdlcFraming.releaseReceivedFrame(frames[1]); post kickTestCase_task(); break; default: ++testCase_; post kickTestCase_task(); break; } } task void kickTestCase_task () { printf("TC %d S %d\r\n", testCase_, stage_); dumpRxFrames(); switch (testCase_) { case 0: post testCase0_task(); break; default: ALL_TESTS_PASSED(); //NOTREACHED break; } } void startTestCase (int test_case) { stage_ = 0; testCase_ = test_case; post kickTestCase_task(); } event void Boot.booted () { printf("Booted\r\n"); rxFrames_ = call DebugHdlcFraming.rxFrames(); rxFrameEnd_ = rxFrames_ + call DebugHdlcFraming.numRxFrames(); call HdlcControl.start(); dumpRxFrames(); startTestCase(0); } } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcRead/000077500000000000000000000000001207233610700207435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcRead/Makefile000066400000000000000000000002361207233610700224040ustar00rootroot00000000000000COMPONENT=TestAppC TOSMAKE_PATH += .. PFLAGS += -I$(TOSDIR)/lib/printf PFLAGS += -I$(TOSDIR)/lib/fragpool PFLAGS += -I$(TOSDIR)/lib/ppp include $(MAKERULES) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcRead/README.txt000066400000000000000000000006131207233610700224410ustar00rootroot00000000000000The HdlcRead application receives HDLC-encoded frames over the serial port, and prints a summary of what it got. This test requires the PPP4Py package. See $(OSIANROOT)/tinyos/tos/lib/ppp/README for further details. Build and install for your platform. If your device is not available on /dev/ttyUSB0 at 115200 baud, you will have to edit the gendata.py script. Then run the test.sh script. tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcRead/TestAppC.nc000066400000000000000000000041761207233610700227600ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Test mote-side decoding of HDLC-encoded frames. * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP; components LedC; components MainC; TestP.Boot -> MainC; TestP.HdlcFraming -> HdlcFramingC; TestP.HdlcFramingOptions -> HdlcFramingC; TestP.MultiLed -> LedC; components new HdlcFramingC(256, 3); HdlcFramingC.HdlcUart -> DefaultHdlcUartC; HdlcFramingC.UartControl -> DefaultHdlcUartC; TestP.HdlcControl -> HdlcFramingC; components DefaultHdlcUartC; components SerialPrintfC; } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcRead/TestP.nc000066400000000000000000000066451207233610700223370ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include #include "HdlcFraming.h" module TestP { uses { interface Boot; interface MultiLed; interface StdControl as HdlcControl; interface HdlcFraming; interface GetSetOptions as HdlcFramingOptions; } } implementation { #ifndef ACCOMP #define ACCOMP 0 #endif const uint8_t* rx_buffer; int frame_length; task void showFrame () { const uint8_t* fp = rx_buffer; const uint8_t* fe = fp + frame_length; if (fp) { printf("Frame of %d chars:", fe - fp); while (fp < fe) { printf(" %02x", *fp++); } printf("\r\n"); call HdlcFraming.releaseReceivedFrame(rx_buffer); rx_buffer = 0; } else { printf("ERROR: showFrame() with no frame available\r\n"); } } event void Boot.booted() { error_t rc; HdlcFramingOptions_t options; memset(&options, 0, sizeof(options)); #if ACCOMP options.txSuppressAddressControl = options.rxSuppressAddressControl = 1; #endif; rc = call HdlcFramingOptions.set(&options); if (SUCCESS != rc) { printf("*** ERROR configuring HDLC options\r\n"); return; } options = call HdlcFramingOptions.get(); printf("\r\n\r\n! compress_ac %d\r\n", (options.txSuppressAddressControl << 1) | options.rxSuppressAddressControl); printf("# Boot configuration ready\r\n"); rc = call HdlcControl.start(); if (SUCCESS != rc) { printf("# HDLC start got %d\r\n", rc); } } event void HdlcFraming.sendDone (const uint8_t* data, unsigned int len, error_t err) { } event void HdlcFraming.receivedFrame (const uint8_t* data, unsigned int len) { rx_buffer = data; frame_length = len; post showFrame(); } async event void HdlcFraming.receivedDelimiter () { } async event void HdlcFraming.receptionError (HdlcError_e error) { call MultiLed.set(0x10 + error); } } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcRead/gendata.py000066400000000000000000000046551207233610700227320ustar00rootroot00000000000000import time import ppp4py.hdlc import sys import serial import select import binascii import struct surf_dev = '/dev/ttyUSB0' surf = serial.Serial(surf_dev, baudrate=115200, timeout=5) poller = select.poll() poller.register(surf.fileno()) compress_ac = True print 'Reading boot status (one line):' while True: t = surf.readline().strip() while t.startswith('\0'): t = t[1:] print t if t.startswith('#'): break if t.startswith('!'): (flag, value) = t[1:].split() value = int(value) print 'flag "%s" value "%d"' % (flag, value) if 'compress_ac' == flag: compress_ac = (0 != value) else: print 'Unrecognized flag %s' % (flag,) print 'Address/control compression: %s' % (compress_ac,) framer = ppp4py.hdlc.HDLCforPPP(compress_ac=compress_ac) #framer.setFrameCheckSequenceHelper(ppp4py.hdlc.FrameCheckSequenceNull) framer.setFrameCheckSequenceHelper(ppp4py.hdlc.FrameCheckSequence16) framer.updateReceivingACCM(0) tests = [ 'a', 'a', 'b', "a\nb", "1\x7e2", "\x7e\x7d\x7d\x72", '12345678', '', '123' ] def ProcessResponse_Text (framer, test): response = '' while True: if poller.poll(None): c = surf.read() if "\n" == c: print response response = '' return else: response += c def ProcessResponse (framer, tx_text): return ProcessResponse_Text(framer, tx_text) timeout = 5000 while poller.poll(timeout): c = surf.read() print 'RX %s' % (binascii.hexlify(c),) framer.putBytes(c) pkt = framer.getPacket() if (pkt is not None) and (0 < len(pkt)): (rx_len,) = struct.unpack('B', pkt[0]) rx_text = pkt[1:] if rx_len == len(tx_text): if rx_text == tx_text: print 'PASS rx echoed %d bytes correctly' % (rx_len) else: print 'FAIL tx %s rx %s content error' % (binascii.hexlify(tx_text), binascii.hexlify(rx_text)) else: print 'FAIL tx len %d text %s, rx len %d text %s' % (len(tx_text), binascii.hexlify(tx_text), rx_len, binascii.hexlify(rx_text)) return for t in tests: framed = framer.framePacket(t) print '\nTest: %s' % (binascii.hexlify(t),) print 'Frame: %s' % (binascii.hexlify(framed),) rv = surf.write(framed) ProcessResponse(framer, t) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcRead/test.sh000077500000000000000000000005701207233610700222630ustar00rootroot00000000000000#!/bin/sh # # Standard test configuration and loop loopcond=true breakloop () { loopcond=false } trap breakloop 1 2 cat < */ configuration TestAppC { } implementation { components TestP; components MainC; TestP.Boot -> MainC; TestP.HdlcFraming -> HdlcFramingC; TestP.HdlcControl -> HdlcFramingC; TestP.HdlcFramingOptions -> HdlcFramingC; components LedC; TestP.ReceiveLed -> LedC.Green; TestP.SendLed -> LedC.Blue; TestP.ErrorLed -> LedC.Red; #if WITH_DISPLAYCODE components DisplayCodeC; TestP.DisplayCodeHdlc -> DisplayCodeC.DisplayCode[2]; TestP.DisplayCodeHdlcCount -> DisplayCodeC.DisplayCode[3]; #endif /* WITH_DISPLAYCODE */ components new HdlcFramingC(2400, 8); HdlcFramingC.HdlcUart -> DefaultHdlcUartC; HdlcFramingC.UartControl -> DefaultHdlcUartC; components CounterMicro32C; components new CounterToLocalTimeC(TMicro) as CounterToLocalTimeMicroC; CounterToLocalTimeMicroC.Counter -> CounterMicro32C; TestP.LocalTimeMicro -> CounterToLocalTimeMicroC; components DefaultHdlcUartC; components SerialPrintfC; } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcSpeed/TestP.nc000066400000000000000000000141441207233610700225150ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include #include "config.h" module TestP { uses { interface Boot; interface Led as SendLed; interface Led as ReceiveLed; interface Led as ErrorLed; interface HdlcFraming; interface StdControl as HdlcControl; interface GetSetOptions as HdlcFramingOptions; interface LocalTime as LocalTimeMicro; #if PLATFORM_SURF interface Msp430UsciError; #endif /* PLATFORM_SURF */ #if WITH_DISPLAYCODE interface DisplayCode as DisplayCodeHdlc; interface DisplayCode as DisplayCodeHdlcCount; #endif /* WITH_DISPLAYCODE */ } } implementation { typedef nx_struct payload_t { nx_uint16_t tx_id; nx_uint16_t rx_length; nx_uint16_t rx_id; nx_uint32_t rx_duration_us; nx_uint32_t tx_duration_us; nx_uint32_t hdlc_errors; nx_uint16_t usci_error_count; nx_uint16_t usci_error_bits; } payload_t; uint8_t tx_frame[FRAME_SIZE]; unsigned int rx_length; payload_t* tx_payload = (payload_t*)tx_frame; unsigned int tx_id; unsigned int rx_last_id; uint32_t hdlc_errors; uint16_t hdlc_error_count; uint16_t usci_error_count; uint16_t usci_error_bits; uint32_t rx_start_us; uint32_t rx_duration_us; uint32_t tx_start_us; uint32_t tx_duration_us; bool send_on_rx; void startReceive () { atomic { rx_start_us = call LocalTimeMicro.get(); } } task void startSend () { error_t rc; if (tx_id >= REPETITIONS) { return; } atomic { tx_payload->tx_id = ++tx_id; tx_payload->rx_length = rx_length; tx_payload->rx_id = rx_last_id; tx_payload->rx_duration_us = rx_duration_us; tx_payload->tx_duration_us = tx_duration_us; tx_payload->hdlc_errors = hdlc_errors; tx_payload->usci_error_count = usci_error_count; tx_payload->usci_error_bits = usci_error_bits; hdlc_errors = 0; usci_error_bits = 0; } tx_start_us = call LocalTimeMicro.get(); rc = call HdlcFraming.sendFrame(tx_frame, sizeof(tx_frame), FALSE); if (SUCCESS == rc) { call SendLed.on(); } } event void Boot.booted() { error_t rc; HdlcFramingOptions_t options; // options = call HdlcFramingOptions.get(); memset(&options, 0, sizeof(options)); #if ACCOMP options.txSuppressAddressControl = options.rxSuppressAddressControl = 1; #endif; rc = call HdlcFramingOptions.set(&options); if (SUCCESS != rc) { printf("*** ERROR: Attempt to configure options failed\r\n"); return; } #if WITH_DISPLAYCODE call DisplayCodeHdlc.setValueWidth(1); call DisplayCodeHdlcCount.setValueWidth(2); #endif /* WITH_DISPLAYCODE */ options = call HdlcFramingOptions.get(); printf("\r\n\r\n! compress_ac %d\r\n", (options.txSuppressAddressControl << 1) | options.rxSuppressAddressControl); printf("! frame_size %d\r\n", FRAME_SIZE); printf("! repetitions %d\r\n", REPETITIONS); printf("! full_duplex %d\r\n", FULL_DUPLEX); call HdlcControl.start(); printf("# Boot configuration ready\r\n"); atomic { send_on_rx = TRUE; } startReceive(); } async event void HdlcFraming.receivedDelimiter () { } async event void HdlcFraming.receptionError (HdlcError_e error) { atomic { hdlc_errors = error; // (hdlc_errors * 10) | error; ++hdlc_error_count; } #if WITH_DISPLAYCODE call DisplayCodeHdlc.setValue(error); call DisplayCodeHdlc.enable(TRUE); call DisplayCodeHdlcCount.setValue(hdlc_error_count); call DisplayCodeHdlcCount.enable(TRUE); #else /* WITH_DISPLAYCODE */ call ErrorLed.on(); #endif /* WITH_DISPLAYCODE */ } event void HdlcFraming.sendDone (const uint8_t* data, unsigned int len, error_t err) { uint32_t now = call LocalTimeMicro.get(); tx_duration_us = now - tx_start_us; call SendLed.off(); #if FULL_DUPLEX post startSend(); #endif } event void HdlcFraming.receivedFrame (const uint8_t* data, unsigned int len) { uint32_t now = call LocalTimeMicro.get(); call ReceiveLed.toggle(); rx_duration_us = now - rx_start_us; rx_length = len; rx_last_id = ((payload_t*)data)->tx_id; call HdlcFraming.releaseReceivedFrame(data); startReceive(); if (send_on_rx) { post startSend(); #if FULL_DUPLEX send_on_rx = FALSE; #endif } } #if PLATFORM_SURF async event void Msp430UsciError.condition (unsigned int errors) { atomic { ++usci_error_count; usci_error_bits |= errors; } } #endif /* PLATFORM_SURF */ } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcSpeed/config.h000066400000000000000000000004531207233610700225500ustar00rootroot00000000000000#ifndef TEST_CONFIG_H_ #define TEST_CONFIG_H_ #ifndef ACCOMP #define ACCOMP 1 #endif #ifndef FRAME_SIZE #define FRAME_SIZE 32 #endif /* FRAME_SIZE */ #ifndef REPETITIONS #define REPETITIONS 1 #endif /* REPETITIONS */ #ifndef FULL_DUPLEX #define FULL_DUPLEX 0 #endif #endif /* TEST_CONFIG_H_ */ tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcSpeed/gendata.py000066400000000000000000000061271207233610700231130ustar00rootroot00000000000000import time import ppp4py.hdlc import sys import serial import select import binascii import struct import fcntl import os from payload import Payload baudrate = 115200 #baudrate = 19200 surf_dev = '/dev/ttyUSB0' surf = serial.Serial(surf_dev, baudrate=baudrate, timeout=5) compress_ac = True frame_size = 16 repetitions = 10 full_duplex = 0 print 'Reading boot status (one line):' finished_header = False while not finished_header: t = surf.readline().strip() while t.startswith('\0'): t = t[1:] print t if t.startswith('#'): finished_header = True break if t.startswith('!'): try: (flag, value) = t[1:].split() value = int(value) print 'flag "%s" value "%d"' % (flag, value) if 'compress_ac' == flag: compress_ac = (0 != value) elif 'frame_size' == flag: frame_size = value elif 'repetitions' == flag: repetitions = value elif 'full_duplex' == flag: full_duplex = value else: print 'Unrecognized flag %s' % (flag,) except Exception, e: print e print 'Address/control compression: %s' % (compress_ac,) framer = ppp4py.hdlc.HDLCforPPP(compress_ac=compress_ac) framer.updateReceivingACCM(0) framer.updateSendingACCM(0) tests = [ 'a', 'a', 'b', "a\nb", "1\x7e2", "\x7e\x7d\x7d\x72" ] tests.append('123456\x7d89a\x7eABC' * 50) poller = select.poll() try: flags = fcntl.fcntl(surf.fileno(), fcntl.F_GETFL) flags += os.O_NONBLOCK #fcntl.fcntl(surf.fileno(), fcntl.F_SETFL, flags) except IOError, e: print e # Keep from out-running the cc430 by only allowing transmission to be # this many frames ahead of reception. Need at least one to kick off # the session; for full duplex, add another couple to keep this end # busy while we're receiving more. tx_allowed = 1 if full_duplex: tx_allowed += 2 tx_payload = Payload() outgoing = '' timeout_ms = None rx_count = 0 while True: if timeout_ms is None: timeout_ms = 10000 events = select.POLLIN if (0 == len(outgoing)) and (tx_payload is not None): if tx_allowed and (tx_payload.tx_id < repetitions): tx_payload.tx_id += 1 outgoing += framer.framePacket(tx_payload.pack(frame_size)) tx_allowed -= 1 #print 'Outgoing len %d after queuing %s' % (len(outgoing), tx_payload) if 0 < len(outgoing): events |= select.POLLOUT poller.register(surf.fileno(), events) for (_, events) in poller.poll(timeout_ms): if events & (select.POLLHUP + select.POLLERR): print 'Serial error' break; if events & select.POLLIN: framer.putBytes(surf.read()) if events & select.POLLOUT: oglen = min(1, len(outgoing)) #oglen = len(outgoing) rv = surf.write(outgoing[:oglen]) outgoing = outgoing[oglen:] pkt = framer.getPacket() while pkt is not None: print Payload(pkt) rx_count += 1 tx_allowed += 1 pkt = framer.getPacket() tinyos-2.1.2+dfsg/tos/lib/ppp/tests/HdlcSpeed/payload.py000066400000000000000000000022471207233610700231400ustar00rootroot00000000000000import struct class Payload (object): __FORMAT = '!HHHIIIHH' __LENGTH = struct.calcsize(__FORMAT) __FIELDS = ( 'tx_id', 'rx_length', 'rx_id', 'rx_dur_us', 'tx_dur_us', 'hdlc_errs', 'uec', 'ueb') tx_id = 0 rx_length = 0 rx_id = 0 rx_dur_us = 0 tx_dur_us = 0 hdlc_errors = 0 uec = 0 ueb = 0 def __init__ (self, packed=None): for f in self.__FIELDS: self.__dict__.setdefault(f, 0) if packed is not None: self.setFromPacked(packed) def setFromPacked (self, packed): self.__dict__.update(zip(self.__FIELDS, struct.unpack(self.__FORMAT, packed[:self.__LENGTH]))) def pack (self, total_length=None): field_values = [ self.__dict__[_f] for _f in self.__FIELDS ] packed = struct.pack(self.__FORMAT, *field_values) if total_length is not None: remainder = total_length - len(packed) if (0 < remainder): packed += struct.pack('%dB' % (remainder,), *[(_v & 0xff) for _v in xrange(remainder) ]) return packed def __str__ (self): return ' '.join(['%s=%d' % (_f, self.__dict__[_f]) for _f in self.__FIELDS]) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/000077500000000000000000000000001207233610700201215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/Makefile000066400000000000000000000003261207233610700215620ustar00rootroot00000000000000COMPONENT=TestAppC TOSMAKE_PATH += . PFLAGS += -I$(TOSDIR)/lib/ppp PFLAGS += -I$(TOSDIR)/lib/fragpool PFLAGS += -I$(TOSDIR)/lib/printf PFLAGS += -I$(TOSDIR)/platforms/$(PLATFORM)/chips/msp430 include $(MAKERULES) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/README.txt000066400000000000000000000014701207233610700216210ustar00rootroot00000000000000Basic demonstration of a PPP application negotiating support for RFC5072 IPv6 over PPP. The red LED indicates that the PPP link is down; the green LED indicates that it is up. Upon receipt of an IPv6 packet, the blue LED toggles, and the number of octets in the packet is printed over the PPP link. Use a standard Linux PPP daemon, or the osianpppd script, to form the connection. pppd \ 115200 \ debug \ passive \ noauth \ nodetach \ noccp \ ipv6 ::23,::24 \ noip \ /dev/ttyUSB0 You can only see the printf data if your ppp daemon has the necessary patch to add that protocol. Ping the remote interface to verify packets are being received over the NCP: ping6 fe80::24%ppp0 For a basic check using PPP4Py, run these commands: make surf osian dco,16 install \ && python pppd.py tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/TestAppC.nc000066400000000000000000000063171207233610700221350ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" /** Demonstration of a PPP daemon application that negotiates and * maintains an RFC5072 IPv6 over PPP connection. * * The red LED indicates that the PPP link is down; the green LED * indicates that it is up. Upon receipt of an IPv6 packet, the blue * LED toggles, and the number of octets in the packet is printed over * the PPP link. * * Use a standard Linux PPP daemon, or the osianpppd script, to form * the connection. You can only see the printf data if your ppp * daemon has the necessary patch to add that protocol. * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP; components MainC; TestP.Boot -> MainC; components LedC; TestP.LinkUpLed -> LedC.Green; TestP.LinkDownLed -> LedC.Red; TestP.PacketRxLed -> LedC.Blue; /* The basic daemon, No network control protocols. */ components PppDaemonC; TestP.Ppp -> PppDaemonC; /* Hook up the serial infrastructure. */ components DefaultHdlcUartC; PppDaemonC.HdlcUart -> DefaultHdlcUartC; PppDaemonC.UartControl -> DefaultHdlcUartC; /* Link in RFC5072 support for both the control and network protocols */ components PppIpv6C; PppDaemonC.PppProtocol[PppIpv6C.ControlProtocol] -> PppIpv6C.PppControlProtocol; PppDaemonC.PppProtocol[PppIpv6C.Protocol] -> PppIpv6C.PppProtocol; PppIpv6C.Ppp -> PppDaemonC; PppIpv6C.LowerLcpAutomaton -> PppDaemonC; TestP.Ipv6LcpAutomaton -> PppIpv6C; TestP.PppIpv6 -> PppIpv6C; /* Link in the custom protocol for printf support */ components PppPrintfC; PppPrintfC.Ppp -> PppDaemonC; PppDaemonC.PppProtocol[PppPrintfC.Protocol] -> PppPrintfC; } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/TestP.nc000066400000000000000000000023021207233610700214770ustar00rootroot00000000000000#include module TestP { uses { interface Boot; interface Led as LinkUpLed; interface Led as LinkDownLed; interface Led as PacketRxLed; interface SplitControl as Ppp; interface LcpAutomaton as Ipv6LcpAutomaton; interface PppIpv6; } } implementation { event void Ipv6LcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } event void Ipv6LcpAutomaton.thisLayerUp () { } event void Ipv6LcpAutomaton.thisLayerDown () { } event void Ipv6LcpAutomaton.thisLayerStarted () { } event void Ipv6LcpAutomaton.thisLayerFinished () { } event void Ppp.startDone (error_t error) { } event void Ppp.stopDone (error_t error) { } event void PppIpv6.linkUp () { call LinkDownLed.off(); call LinkUpLed.on(); } event void PppIpv6.linkDown () { call LinkUpLed.off(); call LinkDownLed.on(); } event error_t PppIpv6.receive (const uint8_t* message, unsigned int len) { call PacketRxLed.toggle(); printf("RX %u octets\n", len); return SUCCESS; } event void Boot.booted() { error_t rc; call LinkDownLed.on(); rc = call Ipv6LcpAutomaton.open(); rc = call Ppp.start(); } } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/connection.py000077700000000000000000000000001207233610700262672../Lcp/connection.pyustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/pppd.py000066400000000000000000000037311207233610700214420ustar00rootroot00000000000000import binascii from connection import pppd, framer, surf, poller import struct import sys import select import pppprint pppprint.Protocol(pppd) #import ppp4py.protocol.ccp #ccp = ppp4py.protocol.ccp.CompressionControlProtocol(pppd) #ccp.open() import ppp4py.protocol.ipv6cp ipv6cp = ppp4py.protocol.ipv6cp.Register(pppd) ipv6cp.setProposedRemoteInterface('::24') ipv6cp.setPreferredLocalInterface('::23') pppd.bringLinkUp() poller.register(surf.fileno(), select.POLLIN) stripped = [] while poller.poll(0): stripped.append(surf.read()) print 'Stripped: %s' % (binascii.hexlify(''.join(stripped)),) first_time_up = True stop = False print "ENTERING PPP LOOP" text = '' timeout_sec = None while not stop: if timeout_sec is None: timeout_sec = 1 events = select.POLLIN if pppd.hasPackets(): events |= select.POLLOUT poller.register(surf.fileno(), events) #print 'Poll timeout %s' % (timeout_sec,) for (_, events) in poller.poll(timeout_sec / 1000.0): if events & (select.POLLHUP + select.POLLERR): stop = True break if events & select.POLLIN: c = surf.read() if '\n' == c: print text #print binascii.hexlify(text) text = '' elif '\x7e' == c: #print 'DELIMITED: %s' % (binascii.hexlify(text),) text = '' else: text += c pppd.sendToFramer(c) timeout_sec = pppd.execute() for packet in pppd.getPackets(): print 'STX: %s' % (binascii.hexlify(packet),) surf.write(packet) surf.flush() if pppd._lcp.ST_opened == pppd._lcp._state: if first_time_up: first_time_up = False print 'UP AND RUNNING' #ccp.open() # Bounce the circuit once, to verify that things are renegotiated #pppd._lcp._evt_open() #pppd._lcp.echoRequest('hi!') #pppd._lcp.discardRequest('hi!') tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/pppd.sh000066400000000000000000000002041207233610700214140ustar00rootroot00000000000000#!/bin/sh pppd \ debug \ passive \ noauth \ nodetach \ noccp \ ipv6 ::23,::24 \ noip \ /dev/ttyUSB0 tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/pppprint.py000077700000000000000000000000001207233610700255212../Lcp/pppprint.pyustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Ipv6/test.sh000077500000000000000000000000641207233610700214370ustar00rootroot00000000000000make surf osian dco,16 install \ && python pppd.py tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/000077500000000000000000000000001207233610700200135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/Makefile000066400000000000000000000003511207233610700214520ustar00rootroot00000000000000COMPONENT=TestAppC TOSMAKE_PATH += . TOSMAKE_PATH += .. PFLAGS += -I$(TOSDIR)/lib/ppp PFLAGS += -I$(TOSDIR)/lib/fragpool PFLAGS += -I$(TOSDIR)/lib/printf PFLAGS += -I$(TOSDIR)/platforms/$(PLATFORM)/chips/msp430 include $(MAKERULES) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/README.txt000066400000000000000000000024321207233610700215120ustar00rootroot00000000000000Lcp tests the basic link control protocol negotiation. This test is really an environment for manual experimentation. For a basic check run these commands: make surf osian dco,16 install \ && python pppd.py Ideally, a series of exchanges will be printed culminating in something like: 1349 PPP INFO Link up STX: ff7d23c0217d227d237d207d307d217d247d257d207d227d267d207d207d207d207d287d2239bc7e UP AND RUNNING You can also verify your vendor PPP daemon against this application, though no network control protocols are linked in so the comnnection may not form. pppd \ 115200 \ debug \ passive \ noauth \ nodetach \ noccp \ ipv6 ::23,::24 \ noip \ /dev/ttyUSB0 A successful execution in that case might produce: sent [LCP ConfReq id=0x1 ] rcvd [LCP ConfReq id=0x4 ] sent [LCP ConfAck id=0x4 ] rcvd [LCP ConfRej id=0x1 ] sent [LCP ConfReq id=0x2 ] rcvd [LCP ConfAck id=0x2 ] sent [IPV6CP ConfReq id=0x1 ] rcvd [LCP ProtRej id=0x0 80 57 01 01 00 0e 01 0a fd 41 42 42 0e 88 00 02] Protocol-Reject for 'IPv6 Control Protocol' (0x8057) received tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/TestAppC.nc000066400000000000000000000047131207233610700220250ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "ppp.h" /** Bring up the basic Link Control Protocol automaton. * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP; components MainC; TestP.Boot -> MainC; components LedC; TestP.MultiLed -> LedC; components PppDaemonC; TestP.Ppp -> PppDaemonC; TestP.LcpAutomaton -> PppDaemonC; components DefaultHdlcUartC; PppDaemonC.HdlcUart -> DefaultHdlcUartC; PppDaemonC.UartControl -> DefaultHdlcUartC; #if WITH_DISPLAYCODE #if PPP_DISPLAY_CODES components DisplayCodeC; #else /* PPP_DISPLAY_CODES */ components DummyDisplayCodeC as DisplayCodeC; #endif /* PPP_DISPLAY_CODES */ PppDaemonC.DisplayCodeLcpState -> DisplayCodeC.DisplayCode[DISPLAYCODE_LCP]; #endif /* WITH_DISPLAYCODE */ components PppPrintfC; PppPrintfC.Ppp -> PppDaemonC; PppDaemonC.PppProtocol[PppPrintfC.Protocol] -> PppPrintfC; } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/TestP.nc000066400000000000000000000043711207233610700214010ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "LcpAutomaton.h" #include module TestP { uses { interface Boot; interface MultiLed; interface SplitControl as Ppp; interface LcpAutomaton; } } implementation { event void LcpAutomaton.transitionCompleted (LcpAutomatonState_e state) { } event void LcpAutomaton.thisLayerUp () { } event void LcpAutomaton.thisLayerDown () { } event void LcpAutomaton.thisLayerStarted () { } event void LcpAutomaton.thisLayerFinished () { } event void Ppp.startDone (error_t error) { } event void Ppp.stopDone (error_t error) { } event void Boot.booted() { error_t rc; rc = call Ppp.start(); // printf("\r\n# PPP start got %d\r\n", rc); } } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/connection.py000066400000000000000000000032241207233610700225250ustar00rootroot00000000000000import time import ppp4py import ppp4py.hdlc import sys import serial import select import binascii import struct surf_dev = '/dev/ttyUSB0' surf = serial.Serial(surf_dev, baudrate=115200, timeout=5) poller = select.poll() poller.register(surf.fileno()) compress_ac = False def waitForSync (): print 'Reading boot status (one line):' finished_header = False while not finished_header: t = surf.readline().strip() while t.startswith('\0'): t = t[1:] print t if t.startswith('#'): finished_header = True break if t.startswith('!'): try: (flag, value) = t[1:].split() value = int(value) print 'flag "%s" value "%d"' % (flag, value) if 'compress_ac' == flag: compress_ac = (0 != value) elif 'frame_size' == flag: frame_size = value elif 'repetitions' == flag: repetitions = value elif 'full_duplex' == flag: full_duplex = value else: print 'Unrecognized flag %s' % (flag,) except Exception, e: print e print 'Address/control compression: %s' % (compress_ac,) framer=ppp4py.hdlc.HDLCforPPP(compress_ac=compress_ac) pppd = ppp4py.PPP(framer=framer) def GetPacket (): timeout = 5000 while poller.poll(timeout): c = surf.read() #print 'RX %s' % (binascii.hexlify(c),) framer.putBytes(c) pkt = framer.getPacket() if (pkt is not None) and (0 < len(pkt)): return pkt tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/gendata.py000066400000000000000000000003231207233610700217660ustar00rootroot00000000000000import binascii from connection import pppd, framer, surf, poller import struct import sys pkt = pppd.getPacket(); print binascii.hexlify(pkt) rv = surf.write(pkt) while True: sys.stdout.write(surf.read()) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/pppd.py000066400000000000000000000034671207233610700213420ustar00rootroot00000000000000import binascii from connection import pppd, framer, surf, poller import struct import sys import select import pppprint pppprint.Protocol(pppd) import ppp4py.protocol.ccp #ccp = ppp4py.protocol.ccp.CompressionControlProtocol(pppd) #ccp.open() poller.register(surf.fileno(), select.POLLIN) stripped = [] while poller.poll(0): stripped.append(surf.read()) print 'Stripped: %s' % (binascii.hexlify(''.join(stripped)),) pppd.bringLinkUp() first_time_up = True stop = False print "ENTERING PPP LOOP" text = '' timeout_sec = None while not stop: if timeout_sec is None: timeout_sec = 1 events = select.POLLIN if pppd.hasPackets(): events |= select.POLLOUT poller.register(surf.fileno(), events) #print 'Poll timeout %s' % (timeout_sec,) for (_, events) in poller.poll(timeout_sec / 1000.0): if events & (select.POLLHUP + select.POLLERR): stop = True break if events & select.POLLIN: c = surf.read() if '\n' == c: print text #print binascii.hexlify(text) text = '' elif '\x7e' == c: #print 'DELIMITED: %s' % (binascii.hexlify(text),) text = '' else: text += c pppd.sendToFramer(c) timeout_sec = pppd.execute() for packet in pppd.getPackets(): print 'STX: %s' % (binascii.hexlify(packet),) surf.write(packet) surf.flush() if pppd._lcp.ST_opened == pppd._lcp._state: if first_time_up: first_time_up = False print 'UP AND RUNNING' #ccp.open() # Bounce the circuit once, to verify that things are renegotiated #pppd._lcp._evt_open() #pppd._lcp.echoRequest('hi!') #pppd._lcp.discardRequest('hi!') tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/pppd.sh000066400000000000000000000001741207233610700213140ustar00rootroot00000000000000#!/bin/sh pppd \ debug \ noccp \ passive \ noauth \ 10.0.0.1:10.0.0.2 \ nodetach \ /dev/ttyUSB0 tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/pppprint.py000066400000000000000000000006201207233610700222370ustar00rootroot00000000000000import sys import ppp4py.protocol.base class Protocol (ppp4py.protocol.base.Protocol): Protocol = 0x404F ProtocolID = 'P4' ProtocolName = 'PppPrintf' def process (cls, information): sys.stdout.write(cls.Decode(information)) @classmethod def Decode (cls, information): return 'LOG: ' + information[1:] ppp4py.protocol.Registry[Protocol.Protocol] = Protocol tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/test-reject.py000066400000000000000000000026441207233610700226240ustar00rootroot00000000000000import sys import binascii import struct import surf import ppp4py.hdlc import ppp4py.protocol.base surf = surf.Device() framer = ppp4py.hdlc.HDLCforPPP() pppd = ppp4py.PPP(framer=framer) import pppprint pppprint.PppPrintProtocol(pppd) bad_protocol = 5 bad_information = 0x12345678 pkt = framer.framePacket(struct.pack('!HI', bad_protocol, bad_information)) rv = surf.write(pkt) # Expect to receive a Protocol-Reject message while True: pkt = surf.getPacket(framer) (protocol, information) = pppd.decodePacket(pkt, is_framed=False) print type(protocol) if isinstance(protocol, ppp4py.protocol.lcp.LinkControlProtocol): (handler, identifier, data) = protocol.extract(information) if isinstance(handler, ppp4py.protocol.lcp.ProtocolReject): print 'data: %s' % (binascii.hexlify(data),) (rej_protocol, rej_information) = handler.extract(data) print '%d %d %x %s' % (bad_protocol, rej_protocol, bad_information, struct.unpack('!I', rej_information)[0]) if (bad_protocol == rej_protocol) and (bad_information == struct.unpack('!I', rej_information)[0]): print "Got correct rejection" break print protocol.decode(information) elif isinstance(protocol, ppp4py.protocol.base.Protocol): print protocol.decode(information) else: print 'Protocol %04x: %s' % (protocol, binascii.hexlify(information)) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/test-startup.py000066400000000000000000000017551207233610700230540ustar00rootroot00000000000000import surf import sys import binascii import struct import ppp4py.hdlc import ppp4py.protocol.base surf = surf.Device() framer = ppp4py.hdlc.HDLCforPPP() pppd = ppp4py.PPP(framer=framer) import pppprint pppprint.PppPrintProtocol(pppd) lcp = pppd._lcp lcp._configureRequest.clear() for opt in lcp.options(): if opt.isNegotiable(): lcp._configureRequest.appendOption(opt, opt.proposedLocalValue()) cr_frame = lcp.pack(lcp._configureRequest.pack()) #info = framer.framePacket(cr_frame) #print binascii.hexlify(info) #print pppd.decode(info, is_framed=False) frame = framer.framePacket(cr_frame, compress_ac=False) print 'TX: %s' % (binascii.hexlify(frame),) surf.write(frame) while True: pkt = surf.getPacket(framer) (protocol, information) = pppd.decodePacket(pkt, is_framed=False) if isinstance(protocol, ppp4py.protocol.base.Protocol): print protocol.decode(information) else: print 'Protocol %04x: %s' % (protocol, binascii.hexlify(information)) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/test.sh000077500000000000000000000000641207233610700213310ustar00rootroot00000000000000make surf osian dco,16 install \ && python pppd.py tinyos-2.1.2+dfsg/tos/lib/ppp/tests/Lcp/trace.py000066400000000000000000000032161207233610700214650ustar00rootroot00000000000000import time import ppp4py import ppp4py.protocol.lcp import ppp4py.hdlc import sys import serial import select import binascii import struct import pppprint surf_dev = '/dev/ttyUSB0' surf = serial.Serial(surf_dev, baudrate=115200, timeout=5) poller = select.poll() poller.register(surf.fileno()) framer=ppp4py.hdlc.HDLCforPPP() timeout = 5000 while poller.poll(timeout): c = surf.read() #print 'RX %s' % (binascii.hexlify(c),) framer.putBytes(c) pkt = framer.getPacket() if (pkt is None) or (0 == len(pkt)): continue (protocol_code, information) = ppp4py.protocol.UnpackProtocolPacket(pkt) protocol_class = ppp4py.protocol.Registry.get(protocol_code) if protocol_class is not None: if issubclass(protocol_class, ppp4py.protocol.base.HandlerBasedProtocol): ( code, id, data ) = protocol_class.Unpack(information) ph = protocol_class.HandlerForCode(code) if ph is not None: desc = binascii.hexlify(data) if issubclass(ph, ppp4py.options.OptionList_mixin): desc = " ".join([ protocol_class.OptionForType(_t).ToString(data=_d) for (_t, _d) in ph.UnpackOptions(data) ]) print '%s %s %d : %s' % (protocol_class.ProtocolID, ph.Name, id, desc) else: print '%02x %d %s' % (code, id, binascii.hexlify(data)) elif issubclass(protocol_class, pppprint.Protocol): print protocol_class.Decode(information) else: print '%s %s' % (protocol_class.ProtocolID, binascii.hexlify(information)) else: print '%04x %s' % (protocol_code, binascii.hexlify(information)) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/PSHdlcUart/000077500000000000000000000000001207233610700212465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/ppp/tests/PSHdlcUart/Makefile000066400000000000000000000003011207233610700227000ustar00rootroot00000000000000COMPONENT=TestAppC PFLAGS += -I$(TOSDIR)/lib/ppp PFLAGS += -I$(TOSDIR)/lib/printf PFLAGS += -DPLATFORM_SERIAL_RX_BUFFER_SIZE=16 PFLAGS += -DDEBUG_PLATFORM_SERIAL_HDLC_UART include $(MAKERULES) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/PSHdlcUart/TestAppC.nc000066400000000000000000000043421207233610700232560ustar00rootroot00000000000000/* Copyright (c) 2011 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Whitebox unit test for the DefaultHdlcUartP implementation. * * This code has tricky buffer management which is a lot easier to * validate when it's not embedded deep inside an HDLC client. * * @author Peter A. Bigot */ configuration TestAppC { } implementation { components TestP; components MainC; TestP.Boot -> MainC; components DefaultHdlcUartP; TestP.HdlcUart -> DefaultHdlcUartP; TestP.UartControl -> DefaultHdlcUartP; TestP.DebugDefaultHdlcUart -> DefaultHdlcUartP; DefaultHdlcUartP.SerialControl -> TestP.StubSerialControl; DefaultHdlcUartP.UartStream -> TestP.StubUartStream; #include } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/PSHdlcUart/TestP.nc000066400000000000000000000166431207233610700226410ustar00rootroot00000000000000/* Copyright (c) 2011 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include module TestP { uses { interface Boot; interface HdlcUart; interface StdControl as UartControl; interface DebugDefaultHdlcUart; } provides { interface StdControl as StubSerialControl; interface UartStream as StubUartStream; } #include } implementation { #include enum { RingBufferLength = PLATFORM_SERIAL_RX_BUFFER_SIZE, LocalBufferLength = 2 * RingBufferLength, }; task void run_tests (); int ssc_start_count; command error_t StubSerialControl.start () { ++ssc_start_count; return SUCCESS; } int ssc_stop_count; command error_t StubSerialControl.stop () { ++ssc_stop_count; return SUCCESS; } int hu_sendDone_count; int hu_sendDone_error; async event void HdlcUart.sendDone (error_t error) { hu_sendDone_error = error; ++hu_sendDone_count; } int postOnEvent; int eventCount; void checkPostEvent () { if (++eventCount == postOnEvent) { post run_tests(); } printf("evt %d of %d\n", eventCount, postOnEvent); } int hu_uartError_count; int hu_uartError_error; async event void HdlcUart.uartError (error_t error) { printf("HdlcUart.uartError %d\r\n", error); hu_uartError_error = error; ++hu_uartError_count; checkPostEvent(); } uint8_t rxBuffer[LocalBufferLength]; uint8_t* rxp; event void HdlcUart.receivedByte (uint8_t byte) { printf("HdlcUart.receivedByte 0x%02x\r\n", byte); *rxp++ = byte; checkPostEvent(); } void hu_resetRxBuffer () { eventCount = 0; hu_uartError_count = 0; rxp = rxBuffer; } async command error_t StubUartStream.send (uint8_t* buf, uint16_t len) { return FAIL; } async command error_t StubUartStream.receive (uint8_t* buf, uint16_t len) { return FAIL; } async command error_t StubUartStream.enableReceiveInterrupt () { return FAIL; } async command error_t StubUartStream.disableReceiveInterrupt () { return FAIL; } void testStartup () { error_t rc; uint8_t* ring_buffer; ASSERT_EQUAL(RingBufferLength, call DebugDefaultHdlcUart.ringBufferLength()); ring_buffer = call DebugDefaultHdlcUart.ringBuffer(); ASSERT_TRUE(!! ring_buffer); ASSERT_EQUAL_PTR(0, call DebugDefaultHdlcUart.rbStore()); ASSERT_EQUAL_PTR(0, call DebugDefaultHdlcUart.rbLoad()); ASSERT_EQUAL(0, ssc_start_count); rc = call UartControl.start(); ASSERT_EQUAL(1, ssc_start_count); ASSERT_EQUAL(SUCCESS, rc); ASSERT_EQUAL_PTR(ring_buffer, call DebugDefaultHdlcUart.rbStore()); ASSERT_EQUAL_PTR(ring_buffer, call DebugDefaultHdlcUart.rbLoad()); } void testFillBuffer_pre (int size) { uint8_t* ring_buffer = call DebugDefaultHdlcUart.ringBuffer(); int ring_buffer_length = call DebugDefaultHdlcUart.ringBufferLength(); int ring_buffer_capacity = ring_buffer_length - 1; uint8_t* rb_start; uint8_t* rbs; uint8_t* rbl; int pending; int i; hu_resetRxBuffer(); ASSERT_EQUAL_PTR(rxp, rxBuffer); ASSERT_EQUAL(0, hu_uartError_count); /* Resume testing once all the data has been fed in. Can't just * post here, since it may take two invocations of the feeder task * to process everything if the loaded data wraps around the ring * buffer. NOTE: Set this now; error events occur in this * call. */ postOnEvent = size; rb_start = call DebugDefaultHdlcUart.rbStore(); ASSERT_EQUAL_PTR(rb_start, call DebugDefaultHdlcUart.rbLoad()); printf("Fill buffer with %d elements\n", size); for (i = 0; i < size; ++i) { signal StubUartStream.receivedByte('A' + i); } rbs = call DebugDefaultHdlcUart.rbStore(); ASSERT_TRUE(ring_buffer <= rbs); ASSERT_TRUE(rbs < ring_buffer + ring_buffer_length); if (rbs >= rb_start) { pending = rbs - rb_start; } else { pending = (ring_buffer + ring_buffer_length - rb_start) + (rbs - ring_buffer); } if (size <= ring_buffer_capacity) { ASSERT_EQUAL(0, hu_uartError_count); ASSERT_EQUAL_PTR(rb_start, call DebugDefaultHdlcUart.rbLoad()); } else { /* On error for each character over the capacity */ ASSERT_EQUAL(size - ring_buffer_capacity, hu_uartError_count); /* Make sure those errors were counted as events */ ASSERT_EQUAL(eventCount, hu_uartError_count); /* Make sure the system is in an error state */ ASSERT_EQUAL_PTR(0, call DebugDefaultHdlcUart.rbLoad()); /* Fake events for the data that got thrown away */ eventCount += ring_buffer_capacity; /* Wake up on the event that indicates resynchronization. */ ASSERT_EQUAL(eventCount, postOnEvent); ++postOnEvent; } } void testFillBuffer_post (int size) { int ring_buffer_length = call DebugDefaultHdlcUart.ringBufferLength(); int ring_buffer_capacity = ring_buffer_length - 1; printf("Validating fill %d\r\n", size); if (size <= ring_buffer_capacity) { ASSERT_EQUAL(size, rxp - rxBuffer); } else { ASSERT_EQUAL(0, rxp - rxBuffer); } } int test_stage; task void run_tests () { switch (++test_stage) { default: ASSERT_TRUE(! "Unrecognized test stage"); break; case 1: testStartup(); testFillBuffer_pre(1); break; case 2: testFillBuffer_post(1); testFillBuffer_pre(RingBufferLength / 2); break; case 3: testFillBuffer_post(RingBufferLength / 2); testFillBuffer_pre(RingBufferLength - 1); break; case 4: testFillBuffer_post(RingBufferLength - 1); testFillBuffer_pre(RingBufferLength); break; case 5: testFillBuffer_post(RingBufferLength); testFillBuffer_pre(2 * RingBufferLength); break; case 6: testFillBuffer_post(2 * RingBufferLength); //FALLTHRU ALL_TESTS_PASSED(); break; } } event void Boot.booted () { post run_tests(); } } tinyos-2.1.2+dfsg/tos/lib/ppp/tests/accomp.extra000066400000000000000000000002401207233610700216000ustar00rootroot00000000000000# Control the flag that enables tx/rx suppression of the address control # octets in HDLC frames. ifeq ($(ACCOMP),) ACCOMP=1 endif PFLAGS += -DACCOMP=$(ACCOMP) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/dco.extra000066400000000000000000000004161207233610700211100ustar00rootroot00000000000000ifeq ($(DCO),) DCO=8 endif ifeq (2,$(DCO)) SEL=2MHz_RSEL2 endif ifeq (4,$(DCO)) SEL=4MHz_RSEL3 endif ifeq (8,$(DCO)) SEL=8MHz_RSEL3 endif ifeq (16,$(DCO)) SEL=16MHz_RSEL4 endif ifeq (32,$(DCO)) SEL=32MHz_RSEL6 endif PFLAGS += -DMSP430XV2_DCO_CONFIG=MSP430XV2_DCO_$(SEL) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/fdx.extra000066400000000000000000000000721207233610700211220ustar00rootroot00000000000000ifeq ($(FDX),) FDX=1 endif PFLAGS += -DFULL_DUPLEX=$(FDX) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/frame.extra000066400000000000000000000000761207233610700214370ustar00rootroot00000000000000ifeq ($(FRAME),) FRAME=32 endif PFLAGS+=-DFRAME_SIZE=$(FRAME) tinyos-2.1.2+dfsg/tos/lib/ppp/tests/reps.extra000066400000000000000000000000741207233610700213140ustar00rootroot00000000000000ifeq ($(REPS),) REPS=10 endif PFLAGS+=-DREPETITIONS=$(REPS) tinyos-2.1.2+dfsg/tos/lib/ppp/tos-pppd.patch000066400000000000000000000117531207233610700207310ustar00rootroot00000000000000The TinyOS PPP daemon defines a custom protocol which enables applications to use printf(3c) with the messages carried over PPP and displayed in the host computer logs. This patch adds support for that protocol to the standard Linux PPP daemon. The patch has been developed against the latest PPP source head. Retrieve the source with: git clone git://ozlabs.org/~paulus/ppp.git Apply the patch with: cd ppp patch -p1 < ${TOSDIR}/lib/ppp/tos-pppd.patch Configure and install the updated daemon for local use: ./configure make DESTDIR=/usr/local/tos-pppd all install You can then use this version to see messages from the application: sudo TOS_PPPD=/usr/local/tos-pppd/sbin/pppd ${TOSDIR}/lib/ppp/tospppd diff --git a/pppd/Makefile.linux b/pppd/Makefile.linux index 060db6a..db82a9c 100644 --- a/pppd/Makefile.linux +++ b/pppd/Makefile.linux @@ -60,9 +60,12 @@ HAVE_MULTILINK=y # Linux distributions: Please leave TDB ENABLED in your builds. USE_TDB=y +# Uncomment to enable the TinyOS printf protocol +HAVE_TINYOS=y + HAS_SHADOW=y -#USE_PAM=y -#HAVE_INET6=y +USE_PAM=y +HAVE_INET6=y # Enable plugins PLUGIN=y @@ -189,6 +192,13 @@ ifdef CBCP HEADERS += cbcp.h endif +ifdef HAVE_TINYOS + PPPDSRCS += tinyos.c + HEADERS += tinyos.h + PPPDOBJS += tinyos.o + CFLAGS += -DTINYOS=1 +endif + ifdef MAXOCTETS CFLAGS += -DMAXOCTETS endif diff --git a/pppd/main.c b/pppd/main.c index 014d614..56887bb 100644 --- a/pppd/main.c +++ b/pppd/main.c @@ -105,6 +105,9 @@ #include "ccp.h" #include "ecp.h" #include "pathnames.h" +#ifdef TINYOS +#include "tinyos.h" +#endif #ifdef USE_TDB #include "tdb.h" @@ -295,6 +298,9 @@ struct protent *protocols[] = { &atcp_protent, #endif &eap_protent, +#ifdef TINYOS + &tinyos_protent, +#endif NULL }; diff --git a/pppd/oshan.sh b/pppd/oshan.sh new file mode 100755 index 0000000..a99baa7 --- /dev/null +++ b/pppd/oshan.sh @@ -0,0 +1,10 @@ +#!/bin/sh +./pppd \ + debug \ + passive \ + noauth \ + nodetach \ + noccp \ + ipv6 ::ff41:4442:e88:2,::ff41:4442:e88:3 \ + noip \ + /dev/ttyUSB0 diff --git a/pppd/tinyos.c b/pppd/tinyos.c new file mode 100644 index 0000000..688c542 --- /dev/null +++ b/pppd/tinyos.c @@ -0,0 +1,97 @@ +#include "pppd.h" +#include "tinyos.h" + +/* + * Protocol entry points. + */ +static void tinyos_init __P((int unit)); +static void tinyos_input __P((int unit, u_char *inp, int inlen)); +static void tinyos_protrej __P((int unit)); +static void tinyos_lowerup __P((int unit)); +static void tinyos_lowerdown __P((int unit)); +static int tinyos_printpkt __P((u_char *inp, int inlen, + void (*)(void *arg, char *fmt, ...), void *arg)); + +static option_t tinyos_option_list[] = { + { NULL } +}; + +struct protent tinyos_protent = { + PPP_TINYOS, /* protocol number */ + tinyos_init, /* initialization procedure */ + tinyos_input, /* process a received packet */ + tinyos_protrej, /* process a received protocol-reject */ + tinyos_lowerup, /* lower layer has gone up */ + tinyos_lowerdown, /* lower layer has gone down */ + NULL, /* open the protocol */ + NULL, /* close the protocol */ + tinyos_printpkt, /* print a packet in readable form */ + NULL, /* process a received data packet */ + 1, /* protocol enabled */ + "TOS", /* text name of protocol */ + NULL, /* text name of corresponding data protocol */ + tinyos_option_list, /* list of command-line options */ + NULL, /* check requested options; assign defaults */ + NULL, /* configure interface for demand-dial */ + NULL /* say whether to bring up link for this pkt */ +}; + + +static void +tinyos_init (unit) +int unit; +{ } + +static void +tinyos_input (unit, inp, inlen) +int unit; +u_char *inp; +int inlen; +{ +#if 0 + u_char nb; + u_char sv; + nb = *inp++; + sv = inp[nb]; + inp[nb] = 0; + printf("TINYOS: %s", inp); + putchar(sv); +#endif +} + +static void +tinyos_protrej (unit) +int unit; +{ +} + +static void +tinyos_lowerup (unit) +int unit; +{ +} + +static void +tinyos_lowerdown (unit) +int unit; +{ +} + +static int +tinyos_printpkt (inp, inlen, printer, arg) +u_char *inp; +int inlen; +void (*printer) __P((void *, char *, ...)); +void *arg; +{ + u_char nb; + u_char sv; + nb = *inp++; + sv = inp[nb-1]; + inp[nb-1] = 0; + printer(arg, " %s", inp); + if ('\n' != sv) { + printer(arg, "%c", sv); + } + return nb + 1; +} diff --git a/pppd/tinyos.h b/pppd/tinyos.h new file mode 100644 index 0000000..9e99050 --- /dev/null +++ b/pppd/tinyos.h @@ -0,0 +1,16 @@ +#ifndef PPP_TINYOS_H +#define PPP_TINYOS_H + +#ifdef __cplusplus +extern "C" { +#endif + +#define PPP_TINYOS 0x404f + +extern struct protent tinyos_protent; + +#ifdef __cplusplus +} +#endif + +#endif /* PPP_TINYOS_H */ tinyos-2.1.2+dfsg/tos/lib/ppp/tospppd000077500000000000000000000141061207233610700175540ustar00rootroot00000000000000#!/usr/bin/python # # Copyright (c) 2010 People Power Co. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the People Power Corporation nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE # Invoke the PPP daemon on a serial port to provide an IPv6 link for an # TinyOS device. # # Put the following in your /etc/hosts (excluding the # comment characters): # fe80::fd41:4242:e88:2 host.ppp.tinyos # fe80::fd41:4242:e88:3 device.ppp.tinyos # # By default this uses /usr/sbin/pppd. Depending on your application, # you may want to use the modified PPP daemon that supports diagnostic # information from TinyOS. See ${TOSDIR}/lib/ppp/tos-pppd.patch for # details. Set the TOS_PPPD environment variable to the full path to # your PPP daemon, if it is not /usr/sbin/pppd. For sudo, you # probably want something like: # # sudo TOS_PPPD=/usr/local/tos-pppd/sbin/pppd ./tospppd # import socket import sys import getopt import select import pty import os import fcntl # Force use of IPv6 UDP sockets socket_params = (socket.AF_INET6, socket.SOCK_DGRAM, socket.IPPROTO_UDP) # The host (local) side of the PPP link host_ppp_fqdn = 'host.ppp.tinyos' # The device (peer/remote) side of the PPPlink device_ppp_fqdn = 'device.ppp.tinyos' # The device over which PPP will run tinyos_device = os.environ.get('TOS_PPP_DEVICE', '/dev/ttyUSB0') # Where the PPP daemon lives. You may prefer to use /usr/sbin/pppd pppd_path = os.environ.get('TOS_PPPD', '/usr/sbin/pppd') # The baud rate for the serial connection pppd_baud = os.environ.get('TOS_PPP_BAUD', '115200') # Generally, pppd must run as root. If this variable is True, the # program will abort with a descriptive error message if the effective # UID is not privileged, pppd_requires_root = True try: opts, args = getopt.getopt(sys.argv[1:], 'H:D:P:', ('host-ppp-fqdn=', 'device-ppp-fqdn=', 'tty=', 'pppd-path=')) except getopt.GetoptError, e: print e sys.exit(1) for opt, arg in opts: if opt in ('-H', '--host-ppp-fqdn'): host_ppp_fqdn = arg elif opt in ('-D', '--device-ppp-fqdn'): device_ppp_fqdn = arg elif opt in ('-P', '--pppd-path'): pppd_path = arg elif opt in ('-B', '--baud-rate'): pppd_baud = arg elif opt in ('--tty',): tinyos_device = arg if args: tinyos_device = args.pop(0) print "# %s -H %s -D %s -P %s -B %s %s\n" % (sys.argv[0], host_ppp_fqdn, device_ppp_fqdn, pppd_path, pppd_baud, tinyos_device) def fqdnToIpv6Addr (fqdn): """Convert a host name to an IPv6 address @param fqdn : A CIDR or fully-qualified domain name""" global socket_params rv = socket.getaddrinfo(fqdn, 0, *socket_params) rv = rv[0] addr = rv[4] return addr def fqdnToIID (fqdn): """Convert a host name to the IID portion of its IPv6 address.""" addrstr = fqdnToIpv6Addr(fqdn)[0] if addrstr.startswith('fe80::'): return addrstr[4:] return None host_ppp_iid = fqdnToIID(host_ppp_fqdn) device_ppp_iid = fqdnToIID(device_ppp_fqdn) if pppd_requires_root and (0 != os.geteuid()): print "ERROR: Running pppd requires root, and you aren't." sys.exit(1) pppd_args = [ # Log control packets so we see what happens 'debug', # Wait for connection if TinyOS device not responding 'passive', # TinyOS PPP does not support authentication 'noauth', # Keep running in foreground. Inconvenient, but the daemon will go away # if you unplug the board, and this makes it a bit more obvious when # that happens. 'nodetach', # defaults to this baud rate. If the baud rate is wrong, you # won't connect. pppd_baud, # What to connect tinyos_device, # Some distributions apparently default hardware flow control on. # Chances are, you don't really have either form. 'nocrtscts', 'nocdtrcts', # Some distributions expect LCP echo to be implemented, and will shut # down the connection if no response is received (pppd doesn't seem to # recognize the Code-Reject that implies the remote is present even when # echo isn't working). TinyOS PPP doesn't currently support LCP echo. 'lcp-echo-interval', '0', # TinyOS PPP doesn't support any of the IP compression protocols that # run over PPP 'noccp', # TinyOS PPP doesn't support IPv4 (though it could...) 'noip', # Configure the IPv6 endpoints 'ipv6', '%s,%s' % (host_ppp_iid, device_ppp_iid), ] pppd_cmd = '%s %s' % (pppd_path, ' '.join(pppd_args)) print '# %s' % (pppd_cmd,) pppd_fd = os.popen(pppd_cmd) fcntl.fcntl(pppd_fd, fcntl.F_SETFL, os.O_NONBLOCK | fcntl.fcntl(pppd_fd, fcntl.F_GETFL)) poller = select.poll() poller.register(pppd_fd.fileno(), select.POLLIN) timeout_ms = 1000 while True: for (_, events) in poller.poll(timeout_ms): sys.stdout.write(pppd_fd.read()) tinyos-2.1.2+dfsg/tos/lib/printf/000077500000000000000000000000001207233610700166365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/printf/2_0_2/000077500000000000000000000000001207233610700174375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/printf/2_0_2/PrintfC.nc000066400000000000000000000057761207233610700213450ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the PrintfC component. It provides the printf service for printing * data over the serial interface using the standard c-style printf command. * It must be started via the SplitControl interface it provides. Data * printed using printf are buffered and only sent over the serial line after * making a call to PrintfFlush.flush(). This buffer has a maximum size of * 250 bytes at present. After calling start on this component, printf * statements can be made anywhere throughout your code, so long as you include * the "printf.h" header file in every file you wish to use it. Standard * practice is to start the printf service in the main application, and set up * a timer to periodically flush the printf buffer (500ms should do). In future * versions, user defined buffer sizes as well as well as automatic flushing at * user defined intervals will be supported. * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:50 $ */ #include "printf.h" configuration PrintfC { provides { interface SplitControl as PrintfControl; interface PrintfFlush; } } implementation { components SerialActiveMessageC; components new SerialAMSenderC(AM_PRINTF_MSG); components PrintfP; PrintfControl = PrintfP; PrintfFlush = PrintfP; PrintfP.SerialControl -> SerialActiveMessageC; PrintfP.AMSend -> SerialAMSenderC; PrintfP.Packet -> SerialAMSenderC; } tinyos-2.1.2+dfsg/tos/lib/printf/2_0_2/PrintfFlush.nc000066400000000000000000000034661207233610700222360ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:50 $ */ #include "printf.h" interface PrintfFlush { command error_t flush(); event void flushDone(error_t error); } tinyos-2.1.2+dfsg/tos/lib/printf/2_0_2/PrintfP.nc000066400000000000000000000141061207233610700213450ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the PrintfP component. It provides the printf service for printing * data over the serial interface using the standard c-style printf command. * It must be started via the SplitControl interface it provides. Data * printed using printf are buffered and only sent over the serial line after * making a call to PrintfFlush.flush(). This buffer has a maximum size of * 250 bytes at present. After calling start on this component, printf * statements can be made anywhere throughout your code, so long as you include * the "printf.h" header file in every file you wish to use it. Standard * practice is to start the printf service in the main application, and set up * a timer to periodically flush the printf buffer (500ms should do). In future * versions, user defined buffer sizes as well as well as automatic flushing at * user defined intervals will be supported. * * The printf service is currently only available for msp430 based motes * (i.e. telos, eyes) and atmega128 based motes (i.e. mica2, micaz). On the * atmega platforms, avr-libc version 1.4 or above mus tbe used. * * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:50 $ */ #include "printf.h" #ifdef _H_atmega128hardware_H static int uart_putchar(char c, FILE *stream); static FILE atm128_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE); #endif module PrintfP { provides { interface SplitControl as PrintfControl; interface PrintfFlush; } uses { interface SplitControl as SerialControl; interface AMSend; interface Packet; } } implementation { enum { S_STARTED, S_STOPPED, S_FLUSHING, }; message_t printfMsg; nx_uint8_t buffer[PRINTF_BUFFER_SIZE]; norace nx_uint8_t* next_byte; uint8_t state = S_STOPPED; uint32_t bytes_left_to_flush; uint8_t length_to_send; task void retrySend() { if(call AMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)) != SUCCESS) post retrySend(); } void sendNext() { printf_msg_t* m = (printf_msg_t*)call Packet.getPayload(&printfMsg, sizeof(printf_msg_t)); length_to_send = (bytes_left_to_flush < sizeof(printf_msg_t)) ? bytes_left_to_flush : sizeof(printf_msg_t); memset(m->buffer, 0, sizeof(printf_msg_t)); memcpy(m->buffer, (nx_uint8_t*)next_byte, length_to_send); if(call AMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)) != SUCCESS) post retrySend(); else { bytes_left_to_flush -= length_to_send; next_byte += length_to_send; } } command error_t PrintfControl.start() { if(state == S_STOPPED) return call SerialControl.start(); return FAIL; } command error_t PrintfControl.stop() { if(state == S_STARTED) return call SerialControl.stop(); return FAIL; } event void SerialControl.startDone(error_t error) { if(error != SUCCESS) { signal PrintfControl.startDone(error); return; } #ifdef _H_atmega128hardware_H stdout = &atm128_stdout; #endif atomic { memset(buffer, 0, sizeof(buffer)); next_byte = buffer; bytes_left_to_flush = 0; length_to_send = 0; state = S_STARTED; } signal PrintfControl.startDone(error); } event void SerialControl.stopDone(error_t error) { if(error != SUCCESS) { signal PrintfControl.stopDone(error); return; } atomic state = S_STOPPED; signal PrintfControl.stopDone(error); } command error_t PrintfFlush.flush() { atomic { if(state == S_STARTED && (next_byte > buffer)) { state = S_FLUSHING; bytes_left_to_flush = next_byte - buffer; next_byte = buffer; } else return FAIL; } sendNext(); return SUCCESS; } event void AMSend.sendDone(message_t* msg, error_t error) { if(error == SUCCESS) { if(bytes_left_to_flush > 0) sendNext(); else { next_byte = buffer; bytes_left_to_flush = 0; length_to_send = 0; atomic state = S_STARTED; signal PrintfFlush.flushDone(error); } } else post retrySend(); } #ifdef _H_msp430hardware_h int putchar(int c) __attribute__((noinline)) @C() @spontaneous() { #endif #ifdef _H_atmega128hardware_H int uart_putchar(char c, FILE *stream) __attribute__((noinline)) @C() @spontaneous() { #endif atomic { if(state == S_STARTED && ((next_byte-buffer) < PRINTF_BUFFER_SIZE)) { *(next_byte++) = c; return 0; } else return -1; } } } tinyos-2.1.2+dfsg/tos/lib/printf/2_0_2/avr_stdio.h000066400000000000000000001225471207233610700216150ustar00rootroot00000000000000/* Copyright (c) 2002, 2005, Joerg Wunsch All rights reserved. Portions of documentation Copyright (c) 1990, 1991, 1993 The Regents of the University of California. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of the copyright holders nor the names of contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. $Id: avr_stdio.h,v 1.1 2008-06-12 12:33:47 klueska Exp $ */ #ifndef _STDIO_H_ #define _STDIO_H_ 1 #ifndef __ASSEMBLER__ #include #include #define __need_NULL #define __need_size_t #include /** \defgroup avr_stdio : Standard IO facilities \code #include \endcode

      Introduction to the Standard IO facilities

      This file declares the standard IO facilities that are implemented in \c avr-libc. Due to the nature of the underlying hardware, only a limited subset of standard IO is implemented. There is no actual file implementation available, so only device IO can be performed. Since there's no operating system, the application needs to provide enough details about their devices in order to make them usable by the standard IO facilities. Due to space constraints, some functionality has not been implemented at all (like some of the \c printf conversions that have been left out). Nevertheless, potential users of this implementation should be warned: the \c printf and \c scanf families of functions, although usually associated with presumably simple things like the famous "Hello, world!" program, are actually fairly complex which causes their inclusion to eat up a fair amount of code space. Also, they are not fast due to the nature of interpreting the format string at run-time. Whenever possible, resorting to the (sometimes non-standard) predetermined conversion facilities that are offered by avr-libc will usually cost much less in terms of speed and code size.

      Tunable options for code size vs. feature set

      In order to allow programmers a code size vs. functionality tradeoff, the function vfprintf() which is the heart of the printf family can be selected in different flavours using linker options. See the documentation of vfprintf() for a detailed description. The same applies to vfscanf() and the \c scanf family of functions.

      Outline of the chosen API

      The standard streams \c stdin, \c stdout, and \c stderr are provided, but contrary to the C standard, since avr-libc has no knowledge about applicable devices, these streams are not already pre-initialized at application startup. Also, since there is no notion of "file" whatsoever to avr-libc, there is no function \c fopen() that could be used to associate a stream to some device. (See \ref stdio_note1 "note 1".) Instead, the function \c fdevopen() is provided to associate a stream to a device, where the device needs to provide a function to send a character, to receive a character, or both. There is no differentiation between "text" and "binary" streams inside avr-libc. Character \c \\n is sent literally down to the device's \c put() function. If the device requires a carriage return (\c \\r) character to be sent before the linefeed, its \c put() routine must implement this (see \ref stdio_note2 "note 2"). As an alternative method to fdevopen(), the macro fdev_setup_stream() might be used to setup a user-supplied FILE structure. It should be noted that the automatic conversion of a newline character into a carriage return - newline sequence breaks binary transfers. If binary transfers are desired, no automatic conversion should be performed, but instead any string that aims to issue a CR-LF sequence must use "\r\n" explicitly. For convenience, the first call to \c fdevopen() that opens a stream for reading will cause the resulting stream to be aliased to \c stdin. Likewise, the first call to \c fdevopen() that opens a stream for writing will cause the resulting stream to be aliased to both, \c stdout, and \c stderr. Thus, if the open was done with both, read and write intent, all three standard streams will be identical. Note that these aliases are indistinguishable from each other, thus calling \c fclose() on such a stream will also effectively close all of its aliases (\ref stdio_note3 "note 3"). It is possible to tie additional user data to a stream, using fdev_set_udata(). The backend put and get functions can then extract this user data using fdev_get_udata(), and act appropriately. For example, a single put function could be used to talk to two different UARTs that way, or the put and get functions could keep internal state between calls there.

      Format strings in flash ROM

      All the \c printf and \c scanf family functions come in two flavours: the standard name, where the format string is expected to be in SRAM, as well as a version with the suffix "_P" where the format string is expected to reside in the flash ROM. The macro \c PSTR (explained in \ref avr_pgmspace) becomes very handy for declaring these format strings. \anchor stdio_without_malloc

      Running stdio without malloc()

      By default, fdevopen() as well as the floating-point versions of the printf and scanf family require malloc(). As this is often not desired in the limited environment of a microcontroller, an alternative option is provided to run completely without malloc(). The macro fdev_setup_stream() is provided to prepare a user-supplied FILE buffer for operation with stdio. If floating-point operation is desired, a user-supplied buffer can as well be passed for the internal buffering for the floating-point numbers (and processing of \%[ scanf data).

      Example

      \code #include static int uart_putchar(char c, FILE *stream); static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE); static int uart_putchar(char c, FILE *stream) { if (c == '\n') uart_putchar('\r', stream); loop_until_bit_is_set(UCSRA, UDRE); UDR = c; return 0; } int main(void) { init_uart(); stdout = &mystdout; printf("Hello, world!\n"); return 0; } \endcode This example uses the initializer form FDEV_SETUP_STREAM() rather than the function-like fdev_setup_stream(), so all data initialization happens during C start-up. If streams initialized that way are no longer needed, they can be destroyed by first calling the macro fdev_close(), and then destroying the object itself. No call to fclose() should be issued for these streams. While calling fclose() itself is harmless, it will cause an undefined reference to free() and thus cause the linker to link the malloc module into the application.

      Notes

      \anchor stdio_note1 \par Note 1: It might have been possible to implement a device abstraction that is compatible with \c fopen() but since this would have required to parse a string, and to take all the information needed either out of this string, or out of an additional table that would need to be provided by the application, this approach was not taken. \anchor stdio_note2 \par Note 2: This basically follows the Unix approach: if a device such as a terminal needs special handling, it is in the domain of the terminal device driver to provide this functionality. Thus, a simple function suitable as \c put() for \c fdevopen() that talks to a UART interface might look like this: \code int uart_putchar(char c, FILE *stream) { if (c == '\n') uart_putchar('\r'); loop_until_bit_is_set(UCSRA, UDRE); UDR = c; return 0; } \endcode \anchor stdio_note3 \par Note 3: This implementation has been chosen because the cost of maintaining an alias is considerably smaller than the cost of maintaining full copies of each stream. Yet, providing an implementation that offers the complete set of standard streams was deemed to be useful. Not only that writing \c printf() instead of fprintf(mystream, ...) saves typing work, but since avr-gcc needs to resort to pass all arguments of variadic functions on the stack (as opposed to passing them in registers for functions that take a fixed number of parameters), the ability to pass one parameter less by implying \c stdin will also save some execution time. */ #if !defined(__DOXYGEN__) /* * This is an internal structure of the library that is subject to be * changed without warnings at any time. Please do *never* reference * elements of it beyond by using the official interfaces provided. */ struct __file { char *buf; /* buffer pointer */ unsigned char unget; /* ungetc() buffer */ uint8_t flags; /* flags, see below */ #define __SRD 0x0001 /* OK to read */ #define __SWR 0x0002 /* OK to write */ #define __SSTR 0x0004 /* this is an sprintf/snprintf string */ #define __SPGM 0x0008 /* fmt string is in progmem */ #define __SERR 0x0010 /* found error */ #define __SEOF 0x0020 /* found EOF */ #define __SUNGET 0x040 /* ungetc() happened */ #define __SMALLOC 0x80 /* handle is malloc()ed */ #if 0 /* possible future extensions, will require uint16_t flags */ #define __SRW 0x0100 /* open for reading & writing */ #define __SLBF 0x0200 /* line buffered */ #define __SNBF 0x0400 /* unbuffered */ #define __SMBF 0x0800 /* buf is from malloc */ #endif int size; /* size of buffer */ int len; /* characters read or written so far */ int (*put)(char, struct __file *); /* function to write one char to device */ int (*get)(struct __file *); /* function to read one char from device */ void *udata; /* User defined and accessible data. */ }; #endif /* not __DOXYGEN__ */ /*@{*/ /** \c FILE is the opaque structure that is passed around between the various standard IO functions. */ #define FILE struct __file /** Stream that will be used as an input stream by the simplified functions that don't take a \c stream argument. The first stream opened with read intent using \c fdevopen() will be assigned to \c stdin. */ #define stdin (__iob[0]) /** Stream that will be used as an output stream by the simplified functions that don't take a \c stream argument. The first stream opened with write intent using \c fdevopen() will be assigned to both, \c stdin, and \c stderr. */ #define stdout (__iob[1]) /** Stream destined for error output. Unless specifically assigned, identical to \c stdout. If \c stderr should point to another stream, the result of another \c fdevopen() must be explicitly assigned to it without closing the previous \c stderr (since this would also close \c stdout). */ #define stderr (__iob[2]) /** \c EOF declares the value that is returned by various standard IO functions in case of an error. Since the AVR platform (currently) doesn't contain an abstraction for actual files, its origin as "end of file" is somewhat meaningless here. */ #define EOF (-1) /** This macro inserts a pointer to user defined data into a FILE stream object. The user data can be useful for tracking state in the put and get functions supplied to the fdevopen() function. */ #define fdev_set_udata(stream, u) do { (stream)->udata = u; } while(0) /** This macro retrieves a pointer to user defined data from a FILE stream object. */ #define fdev_get_udata(stream) ((stream)->udata) #if defined(__DOXYGEN__) /** \brief Setup a user-supplied buffer as an stdio stream This macro takes a user-supplied buffer \c stream, and sets it up as a stream that is valid for stdio operations, similar to one that has been obtained dynamically from fdevopen(). The buffer to setup must be of type FILE. The arguments \c put and \c get are identical to those that need to be passed to fdevopen(). The \c rwflag argument can take one of the values _FDEV_SETUP_READ, _FDEV_SETUP_WRITE, or _FDEV_SETUP_RW, for read, write, or read/write intent, respectively. \note No assignments to the standard streams will be performed by fdev_setup_stream(). If standard streams are to be used, these need to be assigned by the user. See also under \ref stdio_without_malloc "Running stdio without malloc()". */ #define fdev_setup_stream(stream, put, get, rwflag) #else /* !DOXYGEN */ #define fdev_setup_stream(stream, p, g, f) \ do { \ (stream)->put = p; \ (stream)->get = g; \ (stream)->flags = f; \ (stream)->udata = 0; \ } while(0) #endif /* DOXYGEN */ #define _FDEV_SETUP_READ __SRD /**< fdev_setup_stream() with read intent */ #define _FDEV_SETUP_WRITE __SWR /**< fdev_setup_stream() with write intent */ #define _FDEV_SETUP_RW (__SRD|__SWR) /**< fdev_setup_stream() with read/write intent */ /** * Return code for an error condition during device read. * * To be used in the get function of fdevopen(). */ #define _FDEV_ERR (-1) /** * Return code for an end-of-file condition during device read. * * To be used in the get function of fdevopen(). */ #define _FDEV_EOF (-2) #if defined(__DOXYGEN__) /** \brief Initializer for a user-supplied stdio stream This macro acts similar to fdev_setup_stream(), but it is to be used as the initializer of a variable of type FILE. The remaining arguments are to be used as explained in fdev_setup_stream(). */ #define FDEV_SETUP_STREAM(put, get, rwflag) #else /* !DOXYGEN */ #define FDEV_SETUP_STREAM(p, g, f) \ { \ .put = p, \ .get = g, \ .flags = f, \ .udata = 0, \ } #endif /* DOXYGEN */ #ifdef __cplusplus extern "C" { #endif #if !defined(__DOXYGEN__) /* * Doxygen documentation can be found in fdevopen.c. */ extern struct __file *__iob[]; #if defined(__STDIO_FDEVOPEN_COMPAT_12) /* * Declare prototype for the discontinued version of fdevopen() that * has been in use up to avr-libc 1.2.x. The new implementation has * some backwards compatibility with the old version. */ extern FILE *fdevopen(int (*__put)(char), int (*__get)(void), int __opts __attribute__((unused))); #else /* !defined(__STDIO_FDEVOPEN_COMPAT_12) */ /* New prototype for avr-libc 1.4 and above. */ extern FILE *fdevopen(int (*__put)(char, FILE*), int (*__get)(FILE*)); #endif /* defined(__STDIO_FDEVOPEN_COMPAT_12) */ #endif /* not __DOXYGEN__ */ /** This function closes \c stream, and disallows and further IO to and from it. When using fdevopen() to setup the stream, a call to fclose() is needed in order to free the internal resources allocated. If the stream has been set up using fdev_setup_stream() or FDEV_SETUP_STREAM(), use fdev_close() instead. It currently always returns 0 (for success). */ extern int fclose(FILE *__stream); /** This macro frees up any library resources that might be associated with \c stream. It should be called if \c stream is no longer needed, right before the application is going to destroy the \c stream object itself. (Currently, this macro evaluates to nothing, but this might change in future versions of the library.) */ #if defined(__DOXYGEN__) # define fdev_close() #else # define fdev_close() ((void)0) #endif /** \c vfprintf is the central facility of the \c printf family of functions. It outputs values to \c stream under control of a format string passed in \c fmt. The actual values to print are passed as a variable argument list \c ap. \c vfprintf returns the number of characters written to \c stream, or \c EOF in case of an error. Currently, this will only happen if \c stream has not been opened with write intent. The format string is composed of zero or more directives: ordinary characters (not \c %), which are copied unchanged to the output stream; and conversion specifications, each of which results in fetching zero or more subsequent arguments. Each conversion specification is introduced by the \c % character. The arguments must properly correspond (after type promotion) with the conversion specifier. After the \c %, the following appear in sequence: - Zero or more of the following flags:
      • \c # The value should be converted to an "alternate form". For c, d, i, s, and u conversions, this option has no effect. For o conversions, the precision of the number is increased to force the first character of the output string to a zero (except if a zero value is printed with an explicit precision of zero). For x and X conversions, a non-zero result has the string `0x' (or `0X' for X conversions) prepended to it.
      • \c 0 (zero) Zero padding. For all conversions, the converted value is padded on the left with zeros rather than blanks. If a precision is given with a numeric conversion (d, i, o, u, i, x, and X), the 0 flag is ignored.
      • \c - A negative field width flag; the converted value is to be left adjusted on the field boundary. The converted value is padded on the right with blanks, rather than on the left with blanks or zeros. A - overrides a 0 if both are given.
      • ' ' (space) A blank should be left before a positive number produced by a signed conversion (d, or i).
      • \c + A sign must always be placed before a number produced by a signed conversion. A + overrides a space if both are used.
      - An optional decimal digit string specifying a minimum field width. If the converted value has fewer characters than the field width, it will be padded with spaces on the left (or right, if the left-adjust ment flag has been given) to fill out the field width. - An optional precision, in the form of a period . followed by an optional digit string. If the digit string is omitted, the precision is taken as zero. This gives the minimum number of digits to appear for d, i, o, u, x, and X conversions, or the maximum number of characters to be printed from a string for \c s conversions. - An optional \c l length modifier, that specifies that the argument for the d, i, o, u, x, or X conversion is a \c "long int" rather than \c int. - A character that specifies the type of conversion to be applied. The conversion specifiers and their meanings are: - \c diouxX The int (or appropriate variant) argument is converted to signed decimal (d and i), unsigned octal (o), unsigned decimal (u), or unsigned hexadecimal (x and X) notation. The letters "abcdef" are used for x conversions; the letters "ABCDEF" are used for X conversions. The precision, if any, gives the minimum number of digits that must appear; if the converted value requires fewer digits, it is padded on the left with zeros. - \c p The void * argument is taken as an unsigned integer, and converted similarly as a %\#x command would do. - \c c The \c int argument is converted to an \c "unsigned char", and the resulting character is written. - \c s The \c "char *" argument is expected to be a pointer to an array of character type (pointer to a string). Characters from the array are written up to (but not including) a terminating NUL character; if a precision is specified, no more than the number specified are written. If a precision is given, no null character need be present; if the precision is not specified, or is greater than the size of the array, the array must contain a terminating NUL character. - \c % A \c % is written. No argument is converted. The complete conversion specification is "%%". - \c eE The double argument is rounded and converted in the format \c "[-]d.dddedd" where there is one digit before the decimal-point character and the number of digits after it is equal to the precision; if the precision is missing, it is taken as 6; if the precision is zero, no decimal-point character appears. An \e E conversion uses the letter \c 'E' (rather than \c 'e') to introduce the exponent. The exponent always contains two digits; if the value is zero, the exponent is 00. - \c fF The double argument is rounded and converted to decimal notation in the format \c "[-]ddd.ddd", where the number of digits after the decimal-point character is equal to the precision specification. If the precision is missing, it is taken as 6; if the precision is explicitly zero, no decimal-point character appears. If a decimal point appears, at least one digit appears before it. - \c gG The double argument is converted in style \c f or \c e (or \c F or \c E for \c G conversions). The precision specifies the number of significant digits. If the precision is missing, 6 digits are given; if the precision is zero, it is treated as 1. Style \c e is used if the exponent from its conversion is less than -4 or greater than or equal to the precision. Trailing zeros are removed from the fractional part of the result; a decimal point appears only if it is followed by at least one digit. - \c S Similar to the \c s format, except the pointer is expected to point to a program-memory (ROM) string instead of a RAM string. In no case does a non-existent or small field width cause truncation of a numeric field; if the result of a conversion is wider than the field width, the field is expanded to contain the conversion result. Since the full implementation of all the mentioned features becomes fairly large, three different flavours of vfprintf() can be selected using linker options. The default vfprintf() implements all the mentioned functionality except floating point conversions. A minimized version of vfprintf() is available that only implements the very basic integer and string conversion facilities, but none of the additional options that can be specified using conversion flags (these flags are parsed correctly from the format specification, but then simply ignored). This version can be requested using the following \ref gcc_minusW "compiler options": \code -Wl,-u,vfprintf -lprintf_min \endcode If the full functionality including the floating point conversions is required, the following options should be used: \code -Wl,-u,vfprintf -lprintf_flt -lm \endcode \par Limitations: - The specified width and precision can be at most 127. - For floating-point conversions, trailing digits will be lost if a number close to DBL_MAX is converted with a precision > 0. */ extern int vfprintf(FILE *__stream, const char *__fmt, va_list __ap); /** Variant of \c vfprintf() that uses a \c fmt string that resides in program memory. */ extern int vfprintf_P(FILE *__stream, const char *__fmt, va_list __ap); /** The function \c fputc sends the character \c c (though given as type \c int) to \c stream. It returns the character, or \c EOF in case an error occurred. */ extern int fputc(int __c, FILE *__stream); #if !defined(__DOXYGEN__) /* putc() function implementation, required by standard */ extern int putc(int __c, FILE *__stream); /* putchar() function implementation, required by standard */ extern int putchar(int __c); #endif /* not __DOXYGEN__ */ /** The macro \c putc used to be a "fast" macro implementation with a functionality identical to fputc(). For space constraints, in \c avr-libc, it is just an alias for \c fputc. */ #define putc(__c, __stream) fputc(__c, __stream) /** The macro \c putchar sends character \c c to \c stdout. */ #define putchar(__c) fputc(__c, stdout) /** The function \c printf performs formatted output to stream \c stderr. See \c vfprintf() for details. */ extern int printf(const char *__fmt, ...); /** Variant of \c printf() that uses a \c fmt string that resides in program memory. */ extern int printf_P(const char *__fmt, ...); /** The function \c vprintf performs formatted output to stream \c stdout, taking a variable argument list as in vfprintf(). See vfprintf() for details. */ extern int vprintf(const char *__fmt, va_list __ap); /** Variant of \c printf() that sends the formatted characters to string \c s. */ extern int sprintf(char *__s, const char *__fmt, ...); /** Variant of \c sprintf() that uses a \c fmt string that resides in program memory. */ extern int sprintf_P(char *__s, const char *__fmt, ...); /** Like \c sprintf(), but instead of assuming \c s to be of infinite size, no more than \c n characters (including the trailing NUL character) will be converted to \c s. Returns the number of characters that would have been written to \c s if there were enough space. */ extern int snprintf(char *__s, size_t __n, const char *__fmt, ...); /** Variant of \c snprintf() that uses a \c fmt string that resides in program memory. */ extern int snprintf_P(char *__s, size_t __n, const char *__fmt, ...); /** Like \c sprintf() but takes a variable argument list for the arguments. */ extern int vsprintf(char *__s, const char *__fmt, va_list ap); /** Variant of \c vsprintf() that uses a \c fmt string that resides in program memory. */ extern int vsprintf_P(char *__s, const char *__fmt, va_list ap); /** Like \c vsprintf(), but instead of assuming \c s to be of infinite size, no more than \c n characters (including the trailing NUL character) will be converted to \c s. Returns the number of characters that would have been written to \c s if there were enough space. */ extern int vsnprintf(char *__s, size_t __n, const char *__fmt, va_list ap); /** Variant of \c vsnprintf() that uses a \c fmt string that resides in program memory. */ extern int vsnprintf_P(char *__s, size_t __n, const char *__fmt, va_list ap); /** The function \c fprintf performs formatted output to \c stream. See \c vfprintf() for details. */ extern int fprintf(FILE *__stream, const char *__fmt, ...); /** Variant of \c fprintf() that uses a \c fmt string that resides in program memory. */ extern int fprintf_P(FILE *__stream, const char *__fmt, ...); /** Write the string pointed to by \c str to stream \c stream. Returns 0 on success and EOF on error. */ extern int fputs(const char *__str, FILE *__stream); /** Variant of fputs() where \c str resides in program memory. */ extern int fputs_P(const char *__str, FILE *__stream); /** Write the string pointed to by \c str, and a trailing newline character, to \c stdout. */ extern int puts(const char *__str); /** Variant of puts() where \c str resides in program memory. */ extern int puts_P(const char *__str); /** Write \c nmemb objects, \c size bytes each, to \c stream. The first byte of the first object is referenced by \c ptr. Returns the number of objects successfully written, i. e. \c nmemb unless an output error occured. */ extern size_t fwrite(const void *__ptr, size_t __size, size_t __nmemb, FILE *__stream); /** The function \c fgetc reads a character from \c stream. It returns the character, or \c EOF in case end-of-file was encountered or an error occurred. The routines feof() or ferror() must be used to distinguish between both situations. */ extern int fgetc(FILE *__stream); #if !defined(__DOXYGEN__) /* getc() function implementation, required by standard */ extern int getc(FILE *__stream); /* getchar() function implementation, required by standard */ extern int getchar(void); #endif /* not __DOXYGEN__ */ /** The macro \c getc used to be a "fast" macro implementation with a functionality identical to fgetc(). For space constraints, in \c avr-libc, it is just an alias for \c fgetc. */ #define getc(__stream) fgetc(__stream) /** The macro \c getchar reads a character from \c stdin. Return values and error handling is identical to fgetc(). */ #define getchar() fgetc(stdin) /** The ungetc() function pushes the character \c c (converted to an unsigned char) back onto the input stream pointed to by \c stream. The pushed-back character will be returned by a subsequent read on the stream. Currently, only a single character can be pushed back onto the stream. The ungetc() function returns the character pushed back after the conversion, or \c EOF if the operation fails. If the value of the argument \c c character equals \c EOF, the operation will fail and the stream will remain unchanged. */ extern int ungetc(int __c, FILE *__stream); /** Read at most size - 1 bytes from \c stream, until a newline character was encountered, and store the characters in the buffer pointed to by \c str. Unless an error was encountered while reading, the string will then be terminated with a \c NUL character. If an error was encountered, the function returns NULL and sets the error flag of \c stream, which can be tested using ferror(). Otherwise, a pointer to the string will be returned. */ extern char *fgets(char *__str, int __size, FILE *__stream); /** Similar to fgets() except that it will operate on stream \c stdin, and the trailing newline (if any) will not be stored in the string. It is the caller's responsibility to provide enough storage to hold the characters read. */ extern char *gets(char *__str); /** Read \c nmemb objects, \c size bytes each, from \c stream, to the buffer pointed to by \c ptr. Returns the number of objects successfully read, i. e. \c nmemb unless an input error occured or end-of-file was encountered. feof() and ferror() must be used to distinguish between these two conditions. */ extern size_t fread(void *__ptr, size_t __size, size_t __nmemb, FILE *__stream); /** Clear the error and end-of-file flags of \c stream. */ extern void clearerr(FILE *__stream); #if !defined(__DOXYGEN__) /* fast inlined version of clearerr() */ #define clearerror(s) do { (s)->flags &= ~(__SERR | __SEOF); } while(0) #endif /* !defined(__DOXYGEN__) */ /** Test the end-of-file flag of \c stream. This flag can only be cleared by a call to clearerr(). */ extern int feof(FILE *__stream); #if !defined(__DOXYGEN__) /* fast inlined version of feof() */ #define feof(s) ((s)->flags & __SEOF) #endif /* !defined(__DOXYGEN__) */ /** Test the error flag of \c stream. This flag can only be cleared by a call to clearerr(). */ extern int ferror(FILE *__stream); #if !defined(__DOXYGEN__) /* fast inlined version of ferror() */ #define ferror(s) ((s)->flags & __SERR) #endif /* !defined(__DOXYGEN__) */ /** Formatted input. This function is the heart of the \c scanf family of functions. Characters are read from \c stream and processed in a way described by \c fmt. Conversion results will be assigned to the parameters passed via \c ap. The format string \c fmt is scanned for conversion specifications. Anything that doesn't comprise a conversion specification is taken as text that is matched literally against the input. White space in the format string will match any white space in the data (including none), all other characters match only itself. Processing is aborted as soon as the data and format string no longer match, or there is an error or end-of-file condition on \c stream. Most conversions skip leading white space before starting the actual conversion. Conversions are introduced with the character \b %. Possible options can follow the \b %: - a \c * indicating that the conversion should be performed but the conversion result is to be discarded; no parameters will be processed from \c ap, - the character \c h indicating that the argument is a pointer to short int (rather than int), - the character \c l indicating that the argument is a pointer to long int (rather than int, for integer type conversions), or a pointer to \c double (for floating point conversions). In addition, a maximal field width may be specified as a nonzero positive decimal integer, which will restrict the conversion to at most this many characters from the input stream. This field width is limited to at most 127 characters which is also the default value (except for the %c conversion that defaults to 1). The following conversion flags are supported: - \c % Matches a literal \c % character. This is not a conversion. - \c d Matches an optionally signed decimal integer; the next pointer must be a pointer to \c int. - \c i Matches an optionally signed integer; the next pointer must be a pointer to \c int. The integer is read in base 16 if it begins with \b 0x or \b 0X, in base 8 if it begins with \b 0, and in base 10 otherwise. Only characters that correspond to the base are used. - \c o Matches an octal integer; the next pointer must be a pointer to unsigned int. - \c u Matches an optionally signed decimal integer; the next pointer must be a pointer to unsigned int. - \c x Matches an optionally signed hexadecimal integer; the next pointer must be a pointer to unsigned int. - \c f Matches an optionally signed floating-point number; the next pointer must be a pointer to \c float. - e, g, E, G Equivalent to \c f. - \c s Matches a sequence of non-white-space characters; the next pointer must be a pointer to \c char, and the array must be large enough to accept all the sequence and the terminating \c NUL character. The input string stops at white space or at the maximum field width, whichever occurs first. - \c c Matches a sequence of width count characters (default 1); the next pointer must be a pointer to \c char, and there must be enough room for all the characters (no terminating \c NUL is added). The usual skip of leading white space is suppressed. To skip white space first, use an explicit space in the format. - \c [ Matches a nonempty sequence of characters from the specified set of accepted characters; the next pointer must be a pointer to \c char, and there must be enough room for all the characters in the string, plus a terminating \c NUL character. The usual skip of leading white space is suppressed. The string is to be made up of characters in (or not in) a particular set; the set is defined by the characters between the open bracket \c [ character and a close bracket \c ] character. The set excludes those characters if the first character after the open bracket is a circumflex \c ^. To include a close bracket in the set, make it the first character after the open bracket or the circumflex; any other position will end the set. The hyphen character \c - is also special; when placed between two other characters, it adds all intervening characters to the set. To include a hyphen, make it the last character before the final close bracket. For instance, [^]0-9-] means the set of everything except close bracket, zero through nine, and hyphen. The string ends with the appearance of a character not in the (or, with a circumflex, in) set or when the field width runs out. - \c p Matches a pointer value (as printed by %p in printf()); the next pointer must be a pointer to \c void. - \c n Nothing is expected; instead, the number of characters consumed thus far from the input is stored through the next pointer, which must be a pointer to \c int. This is not a conversion, although it can be suppressed with the \c * flag. These functions return the number of input items assigned, which can be fewer than provided for, or even zero, in the event of a matching failure. Zero indicates that, while there was input available, no conversions were assigned; typically this is due to an invalid input character, such as an alphabetic character for a %d conversion. The value \c EOF is returned if an input failure occurs before any conversion such as an end-of-file occurs. If an error or end-of-file occurs after conversion has begun, the number of conversions which were successfully completed is returned. By default, all the conversions described above are available except the floating-point conversions, and the \%[ conversion. These conversions will be available in the extended version provided by the library \c libscanf_flt.a. Note that either of these conversions requires the availability of a buffer that needs to be obtained at run-time using malloc(). If this buffer cannot be obtained, the operation is aborted, returning the value \c EOF. To link a program against the extended version, use the following compiler flags in the link stage: \code -Wl,-u,vfscanf -lscanf_flt -lm \endcode A third version is available for environments that are tight on space. This version is provided in the library \c libscanf_min.a, and can be requested using the following options in the link stage: \code -Wl,-u,vfscanf -lscanf_min -lm \endcode In addition to the restrictions of the standard version, this version implements no field width specification, no conversion assignment suppression flag (\c *), no %n specification, and no general format character matching at all. All characters in \c fmt that do not comprise a conversion specification will simply be ignored, including white space (that is normally used to consume \e any amount of white space in the input stream). However, the usual skip of initial white space in the formats that support it is implemented. */ extern int vfscanf(FILE *__stream, const char *__fmt, va_list __ap); /** Variant of vfscanf() using a \c fmt string in program memory. */ extern int vfscanf_P(FILE *__stream, const char *__fmt, va_list __ap); /** The function \c fscanf performs formatted input, reading the input data from \c stream. See vfscanf() for details. */ extern int fscanf(FILE *__stream, const char *__fmt, ...); /** Variant of fscanf() using a \c fmt string in program memory. */ extern int fscanf_P(FILE *__stream, const char *__fmt, ...); /** The function \c scanf performs formatted input from stream \c stdin. See vfscanf() for details. */ extern int scanf(const char *__fmt, ...); /** Variant of scanf() where \c fmt resides in program memory. */ extern int scanf_P(const char *__fmt, ...); /** The function \c vscanf performs formatted input from stream \c stdin, taking a variable argument list as in vfscanf(). See vfscanf() for details. */ extern int vscanf(const char *__fmt, va_list __ap); /** The function \c sscanf performs formatted input, reading the input data from the buffer pointed to by \c buf. See vfscanf() for details. */ extern int sscanf(const char *__buf, const char *__fmt, ...); /** Variant of sscanf() using a \c fmt string in program memory. */ extern int sscanf_P(const char *__buf, const char *__fmt, ...); #if defined(__DOXYGEN__) /** Flush \c stream. This is a null operation provided for source-code compatibility only, as the standard IO implementation currently does not perform any buffering. */ extern int fflush(FILE *stream); #else static __inline__ int fflush(FILE *stream __attribute__((unused))) { return 0; } #endif #ifdef __cplusplus } #endif /*@}*/ /* * The following constants are currently not used by avr-libc's * stdio subsystem. They are defined here since the gcc build * environment expects them to be here. */ #define SEEK_SET 0 #define SEEK_CUR 1 #define SEEK_END 2 #endif /* __ASSEMBLER */ #endif /* _STDLIB_H_ */ tinyos-2.1.2+dfsg/tos/lib/printf/2_0_2/printf.h000066400000000000000000000041001207233610700211050ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:50 $ */ #ifndef PRINTF_H #define PRINTF_H #ifndef PRINTF_BUFFER_SIZE #define PRINTF_BUFFER_SIZE 250 #endif #ifdef _H_msp430hardware_h #include #endif #ifdef _H_atmega128hardware_H #include "avr_stdio.h" #endif #include "message.h" typedef nx_struct printf_msg { nx_uint8_t buffer[TOSH_DATA_LENGTH]; } printf_msg_t; enum { AM_PRINTF_MSG = 100, }; #endif //PRINTF_H tinyos-2.1.2+dfsg/tos/lib/printf/PrintfC.nc000066400000000000000000000057271207233610700205400ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the PrintfC component. It provides the printf service for printing * data over the serial interface using the standard c-style printf command. * Data printed using printf are buffered and only sent over the serial line after * the buffer is half full or an explicit call to printfflush() is made. This * buffer has a maximum size of 250 bytes at present. This component is wired * to a shadowed MainC component so that printf statements can be made anywhere * throughout your code, so long as you include the "printf.h" header file in * every file you wish to use it. Take a look at the printf tutorial (lesson 15) * for more details. * * The printf service is currently only available for msp430 based motes * (i.e. telos, eyes) and atmega128x based motes (i.e. mica2, micaz, iris). On the * atmega platforms, avr-libc version 1.4 or above must be used. */ /** * @author Kevin Klues * @date September 18, 2007 */ #include "printf.h" configuration PrintfC { } implementation { components MainC; components new SerialAMSenderC(AM_PRINTF_MSG); components new PrintfQueueC(uint8_t, PRINTF_BUFFER_SIZE) as QueueC; components PrintfP; components LedsC; MainC.SoftwareInit -> PrintfP; PrintfP.Queue -> QueueC; PrintfP.AMSend -> SerialAMSenderC; PrintfP.Packet -> SerialAMSenderC; components PutcharC; PutcharC.Putchar -> PrintfP; } tinyos-2.1.2+dfsg/tos/lib/printf/PrintfP.nc000066400000000000000000000136001207233610700205420ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the PrintfP component. It provides the printf service for printing * data over the serial interface using the standard c-style printf command. * Data printed using printf are buffered and only sent over the serial line after * the buffer is half full or an explicit call to printfflush() is made. This * buffer has a maximum size of 250 bytes at present. This component is wired * to a shadowed MainC component so that printf statements can be made anywhere * throughout your code, so long as you include the "printf.h" header file in * every file you wish to use it. Take a look at the printf tutorial (lesson 15) * for more details. * * The printf service is currently only available for msp430 based motes * (i.e. telos, eyes) and atmega128x based motes (i.e. mica2, micaz, iris). On the * atmega platforms, avr-libc version 1.4 or above must be used. */ /** * @author Kevin Klues * @date September 18, 2007 */ #include "printf.h" module PrintfP @safe() { provides { interface Init; interface Putchar; } uses { interface PrintfQueue as Queue; interface AMSend; interface Packet; interface Leds; } } implementation { enum { S_STARTED, S_FLUSHING, }; message_t printfMsg; uint8_t state = S_STARTED; command error_t Init.init() { atomic state = S_STARTED; return SUCCESS; } task void retrySend() { if(call AMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)) != SUCCESS) post retrySend(); } void sendNext() { int i; printf_msg_t* m = (printf_msg_t*)call Packet.getPayload(&printfMsg, sizeof(printf_msg_t)); uint16_t length_to_send = (call Queue.size() < sizeof(printf_msg_t)) ? call Queue.size() : sizeof(printf_msg_t); memset(m->buffer, 0, sizeof(printf_msg_t)); for(i=0; ibuffer[i] = call Queue.dequeue(); if(call AMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)) != SUCCESS) post retrySend(); } int printfflush() @C() @spontaneous() { atomic { if(state == S_FLUSHING) return SUCCESS; if(call Queue.empty()) return FAIL; state = S_FLUSHING; } sendNext(); return SUCCESS; } event void AMSend.sendDone(message_t* msg, error_t error) { if(error == SUCCESS) { if(call Queue.size() > 0) sendNext(); else state = S_STARTED; } else post retrySend(); } #undef putchar command int Putchar.putchar (int c) { if((state == S_STARTED) && (call Queue.size() >= ((PRINTF_BUFFER_SIZE)/2))) { state = S_FLUSHING; sendNext(); } atomic { if(call Queue.enqueue(c) == SUCCESS) return 0; else return -1; } } } tinyos-2.1.2+dfsg/tos/lib/printf/Putchar.nc000066400000000000000000000043761207233610700206000ustar00rootroot00000000000000/* * Copyright (c) 2011 Peter A. Bigot * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** Interface to be implemented by any low-level component that * provides character output for libc-based printf in TinyOS. The * component providing this interface should be wired to PutcharC from * $(TOSDIR)/lib/printf. * * @note On some platforms inclusion of may define putchar * as a macro. Any need for this should be eliminated by the * implementation in PutcharP.nc, so "#undef putchar" prior to your * use of this identifier when implementing this interface. * * @author Peter A. Bigot */ interface Putchar { /** Send the unsigned char represented by c to the output. Return * -1 on error, and c if successful. */ #undef putchar command int putchar (int c); } tinyos-2.1.2+dfsg/tos/lib/printf/PutcharC.nc000066400000000000000000000041331207233610700206720ustar00rootroot00000000000000/* * Copyright (c) 2011 Peter A. Bigot * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This component provides a TinyOS-compatible bridge to the * system-specific mechanism of providing single-character output to * the environment's printf(3c) infrastructure. Components that * provide a libc-based printf facility in TinyOS should implement the * Putchar interface and connect it to this module. * * @author Peter A. Bigot */ configuration PutcharC { uses interface Putchar; } implementation { components MainC; components PutcharP; MainC.SoftwareInit -> PutcharP; Putchar = PutcharP.Putchar; } tinyos-2.1.2+dfsg/tos/lib/printf/PutcharP.nc000066400000000000000000000112651207233610700207130ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This component provides a TinyOS-compatible bridge to the * system-specific mechanism of providing single-character output to * the environment's printf(3c) infrastructure. Components that * provide a libc-based printf facility in TinyOS should implement the * Putchar interface and connect it to this module. * * @author Kevin Klues * @author Peter A. Bigot */ #if defined (_H_msp430hardware_h) || defined (_H_atmega128hardware_H) #include #else #ifdef __M16C60HARDWARE_H__ #include "m16c60_printf.h" #else #include "generic_printf.h" #endif #endif #undef putchar #ifdef _H_atmega128hardware_H static int uart_putchar(char c, FILE *stream); static FILE atm128_stdout = FDEV_SETUP_STREAM(TCAST(int (*)(char c, FILE *stream), uart_putchar), NULL, _FDEV_SETUP_WRITE); #endif module PutcharP { provides interface Init; uses interface Putchar; } implementation { command error_t Init.init() { error_t rv = SUCCESS; #ifdef _H_atmega128hardware_H stdout = &atm128_stdout; #endif return rv; } #ifdef _H_msp430hardware_h int putchar(int c) __attribute__((noinline)) @C() @spontaneous() { #else #ifdef _H_atmega128hardware_H int uart_putchar(char c, FILE *stream) __attribute__((noinline)) @C() @spontaneous() { #else #ifdef __M16C60HARDWARE_H__ int lowlevel_putc(int c) __attribute__((noinline)) @C() @spontaneous() { #else int lowlevel_putc(int c) __attribute__((noinline)) @C() @spontaneous() { #endif #endif #endif return call Putchar.putchar (c); } } tinyos-2.1.2+dfsg/tos/lib/printf/SerialPrintf.txt000066400000000000000000000025261207233610700220060ustar00rootroot00000000000000Add a bare-serial printf component. The SerialPrintfC component, when incorporated into an application, links the platform-specific UartByte implementation into a global putchar function where it will be used by the C runtime system as the destination for printf(3c). It allows easy access to a read-only stream of information from the application without the overhead of using SerialActiveMessage. You should include in your application code, but no other wiring or include files are required. In lineage, it is a horribly emasculated derivative of tos/lib/printf/PrintfP, removing the buffering capability along with active message support. Use hyperterminal, minicom, or on Linux just cat /dev/ttyUSB0 to see the output. For the latter to work, you may need to run the following stty command: stty 115200 min 1 time 5 -icrnl -parenb cs8 < /dev/ttyUSB0 Replace the first argument with the appropriate baud rate for your application. For compatibility with serial-focused terminal programs, the end-of-line sequence in your code should be "\r\n". Using just "\n" in these environments causes the next line to be indented to the end of the previous line. When cat'ing /dev/serial, this often results in double-spaced output. Depending on your default tty configuration, the -icrnl option in the stty command above will prevent this behavior. tinyos-2.1.2+dfsg/tos/lib/printf/SerialPrintfC.nc000066400000000000000000000040351207233610700216670ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author David Moss * @author Kevin Klues */ configuration SerialPrintfC { provides { interface StdControl; } } implementation { components SerialPrintfP; StdControl = SerialPrintfP.StdControl; components MainC; MainC.SoftwareInit -> SerialPrintfP; components PlatformSerialC; SerialPrintfP.UartControl -> PlatformSerialC; SerialPrintfP.UartByte -> PlatformSerialC; components PutcharC; PutcharC.Putchar -> SerialPrintfP; } tinyos-2.1.2+dfsg/tos/lib/printf/SerialPrintfP.nc000066400000000000000000000044011207233610700217010ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author David Moss * @author Kevin Klues */ module SerialPrintfP { uses { interface StdControl as UartControl; interface UartByte; } provides { interface StdControl; interface Init; interface Putchar; } } implementation { command error_t Init.init () { return call StdControl.start(); } command error_t StdControl.start () { return call UartControl.start(); } command error_t StdControl.stop () { return call UartControl.stop(); } int printfflush() @C() @spontaneous() { return SUCCESS; } #undef putchar command int Putchar.putchar (int c) { return (SUCCESS == call UartByte.send(c)) ? c : -1; } } tinyos-2.1.2+dfsg/tos/lib/printf/SerialStartC.nc000066400000000000000000000036721207233610700215300ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Including this configuration will start the Serial port at boot time. This * is very useful if you use the serial port for debug only. * * @author Thomas Schmid */ configuration SerialStartC {} implementation { components MainC, SerialStartP; SerialStartP.Boot -> MainC; components SerialActiveMessageC; SerialStartP.SerialControl -> SerialActiveMessageC; } tinyos-2.1.2+dfsg/tos/lib/printf/SerialStartP.nc000066400000000000000000000036101207233610700215350ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ module SerialStartP { uses { interface Boot; interface SplitControl as SerialControl; } } implementation { event void Boot.booted() { call SerialControl.start(); } event void SerialControl.startDone(error_t error) {} event void SerialControl.stopDone(error_t error) {} } tinyos-2.1.2+dfsg/tos/lib/printf/generic_printf.h000066400000000000000000000204351207233610700220110ustar00rootroot00000000000000/**************************************************************** KPIT Cummins Infosystems Ltd, Pune, India. 1-April-2006. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. *****************************************************************/ /* Written By: Shrirang Khishti . This is a smaller version of printf Positive points about this function 1. Reduces code size considerably ,very useful in embedded applications 2. No malloc calls are used 3. Supports almost all the functionalities of GNU std printf routine. 4. If user dont want float_support in this customized printf just undef macro float_support */ #ifndef __M16C62P_PRINTF_H__ #define __M16C62P_PRINTF_H__ #include #include #define printf _printf extern int lowlevel_putc(int c); int left_val,right_val; #define condition *format!='f'&&*format!='d'&&*format!='c'&&*format!='s'&&*format!='l'&&*format!='u'&&*format!='\0'&&*format!=' '&&*format!='i'&&*format!='x'&&*format!='X'&&*format!='o'&&*format!='%'&&*format!='p' #define float_support long temp_arr[]={100000,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000}; /** * @fn * @brief * * @param c */ int _putchar(int c) { /* Convert CR to CR/LF */ if (c == '\n') lowlevel_putc('\r'); lowlevel_putc(c); return c; } /** * @fn void _puts(const char *tempStr) * @brief Prints a NULL-erminated string on UART 1 * * @param s The string to output * */ int _puts(const char *s) { while( *s != '\0' ) _putchar(*s++); return 0; } /** * @fn void strrev(char *str) * @brief Reverses a string * * @param str The string to reverse */ void strrev(char *str) { char *temp, c; int len=strlen(str) ; temp = str + len -1; while(str < temp ) { c = *str; *str = *temp; *temp = c; str++; temp--; } } static void print_hex_oct( long int temp_var,int _div,int corr_factor,int ret_val,int sign,int *cntr_val) { unsigned long int i1,temp=temp_var; int cntr=0,neg_flag=0; char s1[40]; if(sign==1&&temp_var<0) { temp=-temp_var; neg_flag=1; } if(temp==0) s1[cntr++]='0'; while(temp>0) { i1=temp%_div; temp=temp/_div; if(i1<=9) s1[cntr]=i1+'0'; else s1[cntr]=i1+corr_factor-9; cntr++; } while((left_val-(right_val>cntr?right_val:cntr+neg_flag))>0) { _putchar(' '); left_val--; (*cntr_val)++; } while(right_val-cntr>0) { s1[cntr++]='0'; } if(neg_flag==1) s1[cntr++]='-'; s1[cntr]='\0'; strrev(s1); _puts(s1); (*cntr_val)+=strlen(s1); } #ifdef float_support static void float_print(long double f1,long double f2,int multi,int *cntr_val) { int temp,cntr=0,i1,neg_flag=0; char s1[10]; if(f1<0) { f1=f1*-1; neg_flag=1; f2=f1; } temp=(int)f1; f1=f1-temp; f1=f1*multi; temp=f1; if(temp==0) s1[cntr++]='0'; while(temp>0) { i1=temp%10; temp=temp/10; s1[cntr]=i1+0x30; cntr++; } while(right_val<9&&(right_val -cntr)>0) s1[cntr++]='0'; s1[cntr]='.'; cntr++; temp=(int)f2; if(temp==0) s1[cntr++]='0'; while(temp>0) { i1=temp%10; temp=temp/10; s1[cntr]=i1+0x30; cntr++; } while(left_val-- -cntr>0) { _putchar(' '); (*cntr_val)++; } if(neg_flag==1) s1[cntr++]='-'; s1[cntr]='\0'; cntr--; strrev(s1); _puts(s1); (*cntr_val)+=strlen(s1); neg_flag=0; } #endif // float_support static int format_val(char *temp,long float_flag,int *cntr_val,int flag) { left_val=0; right_val=0; if(*temp=='\0'&&flag==1) { right_val=3; return 0; } while(*temp!='.'&&*temp!='\0') { if(*temp<'0'||*temp>'9') { while(*temp) { _putchar(*temp++); (*cntr_val)++; } return -1; } else left_val=left_val*10+*temp-'0'; temp++; } if(*temp) temp++; else return left_val; while(*temp) { if(*temp<'0'||*temp>'9') { while(*temp) { _putchar(*temp++); (*cntr_val)++; } return -1; } else right_val=right_val*10+*temp-'0'; temp++; } return 0; } /** * @fn int _printf(const char *format, ...) * @brief Prints a formatted string on UART1 * * @param format The string */ int _printf(const char *format, ...) { int format_cntr=0; char temp_str[20]; int return_flag=0,cntr_val; long double f1,f2; char *str_temp; int *cntr=&cntr_val; va_list ap; va_start(ap, format); *cntr=0; while(*format) { temp_str[format_cntr]='\0'; if(*format=='%') { *format++; while(*format==' ') { format++; _putchar(' '); } while(condition) { temp_str[format_cntr++]=*format++; } temp_str[format_cntr]='\0'; if(*format=='%') { _putchar('%'); (*cntr)++; format_cntr=0; format++; continue; } /************** print unsigned ****************/ else if(*format=='u') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) print_hex_oct(va_arg(ap,unsigned int),10,0,return_flag,0,cntr); else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /*********** Print Integer Values **************/ else if(*format=='d'||*format=='i') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) print_hex_oct(va_arg(ap,int),10,0,return_flag,1,cntr); else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /*********** Print hex,Octal values ******************/ else if(*format=='x'||*format=='X'||*format=='o'||*format=='p') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) { if(*format=='x'||*format=='p') print_hex_oct(va_arg(ap,unsigned int),16,0x60,return_flag,0,cntr); else if(*format=='X') print_hex_oct(va_arg(ap,unsigned int),16,0x40,return_flag,0,cntr); else print_hex_oct(va_arg(ap,unsigned int),8,0,return_flag,0,cntr); } else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /************ Character printing ****************88*/ else if(*format=='c') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) { while(return_flag-->1) { _putchar(' '); (*cntr)++; } _putchar(va_arg(ap,int)); (*cntr)+=2; } else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /*************** Print String *****************/ else if(*format=='s') { return_flag=format_val(temp_str,0,cntr,0); if(return_flag!=-1) { str_temp=va_arg(ap,char*); while((return_flag-- -(int) strlen(str_temp))>0) { _putchar(' '); (*cntr)++; } _puts(str_temp); (*cntr)+=strlen(str_temp); } else { _putchar(*format); (*cntr)++; } format++; format_cntr=0; continue; } /*************** Print floating point number *****************/ else if(*format=='f'||(*format=='l'&&*(format+1)=='f')) { return_flag=format_val(temp_str,1,cntr,1); if(return_flag!=-1) { if(*format=='l') { f1=va_arg(ap,long double); format+=2; } else { f1=va_arg(ap,double); format++; } f2=f1; #ifdef float_support right_val++; float_print(f1,f2,temp_arr[right_val%10],cntr); #endif } else { _putchar(*format++); (*cntr)++; } format_cntr=0; continue; } else if(*format=='l'&&((*(format+1)=='d')||(*(format+1)=='u'))) { return_flag=format_val(temp_str,0,cntr,0); if((return_flag=-1)&&(*(format+1)=='d')) { print_hex_oct(va_arg(ap,long int),10,0x00,return_flag,1,cntr); } else if((return_flag=-1)&&(*(format+1)=='u')) { print_hex_oct(va_arg(ap,unsigned long int),10,0x00,return_flag,0,cntr); } else { _putchar(*format); _putchar(*(format+1)); (*cntr)+=2; } format+=2; format_cntr=0; continue; } else { _puts(temp_str); format_cntr=0; continue; } } _putchar(*format++); (*cntr)++; } va_end(ap); return cntr_val; } #endif // __M16C62P_PRINTF_H__ tinyos-2.1.2+dfsg/tos/lib/printf/printf.h000066400000000000000000000057251207233610700203220ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.17 $ * @date $Date: 2010-06-29 22:07:50 $ */ #ifndef PRINTF_H #define PRINTF_H #ifndef NEW_PRINTF_SEMANTICS #warning \ " *************************** PRINTF SEMANTICS HAVE CHANGED! ********************************************* Make sure you now include the following two components in your top level application file: PrintfC and SerialStartC. To supress this warning in the future, #define the variable NEW_PRINTF_SEMANTICS. Take a look at the updated tutorial application under apps/tutorials/printf for an example. ************************************************************************************" #endif #ifndef PRINTF_BUFFER_SIZE #define PRINTF_BUFFER_SIZE 250 #endif #if PRINTF_BUFFER_SIZE > 255 #define PrintfQueueC BigQueueC #define PrintfQueue BigQueue #else #define PrintfQueueC QueueC #define PrintfQueue Queue #endif #if defined (_H_msp430hardware_h) || defined (_H_atmega128hardware_H) #include #else #ifdef __M16C60HARDWARE_H__ #include "m16c60_printf.h" #else #include "generic_printf.h" #endif #endif #undef putchar #include "message.h" int printfflush(); #ifndef PRINTF_MSG_LENGTH #define PRINTF_MSG_LENGTH 28 #endif typedef nx_struct printf_msg { nx_uint8_t buffer[PRINTF_MSG_LENGTH]; } printf_msg_t; enum { AM_PRINTF_MSG = 100, }; #endif //PRINTF_H tinyos-2.1.2+dfsg/tos/lib/rfxlink/000077500000000000000000000000001207233610700170115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/rfxlink/README000066400000000000000000000064231207233610700176760ustar00rootroot00000000000000 The radio driver interfaces have a set of generic configuration options. Some of these are set in the platforms/xxx/chips/yyy/RadioConfig.h header file (see the platforms/iris/chips/rf230/RadioConfig.h for example), others can be set in your Makefile. TFRAMES_ENABLED: If enabled, then tinyos frames are enabled, so 6lowpan will not work. See TEP125 for the details. LOW_POWER_LISTENING: If enabled, then the radio will duty cycle the radio (turn it off and on). See TEP105 for the details. SLOTTED_MAC: There are two CA (collision avoidance) algorithms: one is the simple random backoff just like the one used in the CC2420 driver. The other one is a slotted time sync based version where each node makes a guarantee that only at a given time within a time slot (e.g. 1 ms) they will ever start to transmit. This value is monitored by nearby motes (no payload overhead) and they preemptively avoid these time instances. This greatly reduces the chance that two motes will start to transmit within 50-100 microsecs to each other, so the CCA (clear channel assessment) will become much more efficient. This slotted behavior can enabled by defining SLOTTED_MAC. RADIO_DEBUG: If enabled, then every component in the radio stack will make sure that everything goes as intended via asserts. For example, we check that certain calls are not made in certain states, the radio hardware responds according to the datasheet, etc. Use the RADIO_ASSERT macro defined in the RadioAssert.h and make sure that the AssertC from lib/diagmsg is included in your application. All assert violations are reported over the serial interface. You can use the net.tinyos.util.DiagMsg java application to display diagnostic messages. RADIO_DEBUG_MESSAGES: If enabled, then the radio driver will print out all received and transmitted messages via the DiagMsg interface. This feature is used in the RF230Sniffer appliaction. TRAFFIC_MONITOR: If enabled, the TrafficMonitorLayer is included in the stack which keeps track of the number of send end received bytes, the amount of time when the radio driver was turned on, and other statistics. If RADIO_DEBUG is enabled then this information is also printed periodically with DisgMsg. PACKET_LINK: If defined, then the PacketLinkLayer is included in the stack. It provides standard functionality: retransmits messages when needed. typedef TRadio: The radio stack uses a single hardware alarm/counter. The resolution of this counter is platform specific and should be set just like the T32khz or TMilli time resolution types. All time stamps and time related information are recorded in this resolution within the driver. RADIO_ALARM_MICROSEC: This should be set to the number of radio alarm ticks per one microsecond. RADIO_ALARM_MILLI_EXP: The base two logarithm of the number of radio alarm ticks per one millisecond. SOFTWAREACK_TIMEOUT: The number of microseconds the driver should wait for a software acknowledgement on the sender side. If your SPI bus is slow, then it will take more time to download and upload the message from/to the radio chip, so you need to increase this wait period. For example, for IRIS->IRIS communication 800 microsec is enough, but for IRIS->TELOS we need 1600 because the TELOS in software ack mode is slow to reply with an ack packet. tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/000077500000000000000000000000001207233610700203105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/ActiveMessageConfig.nc000077500000000000000000000047011207233610700245050ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include interface ActiveMessageConfig { /** Same as AMPacket.destination */ command am_addr_t destination(message_t* msg); /** Same as AMPacket.setDestination */ command void setDestination(message_t* msg, am_addr_t addr); /** Same as AMPacket.source */ command am_addr_t source(message_t* msg); /** Same as AMPacket.setSource */ command void setSource(message_t* msg, am_addr_t addr); /** Same as AMPacket.group */ command am_group_t group(message_t* msg); /** Same as AMPacket.setGroup */ command void setGroup(message_t* msg, am_group_t grp); /** * Check if the packet is properly formatted, and if the user * forgot to call Packet.clear then format it properly. * Return SUCCESS if the frame is now properly set up, * or FAIL of the send operation should be aborted. */ command error_t checkFrame(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/ActiveMessageLayer.h000066400000000000000000000034411207233610700242000ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __ACTIVEMESSAGELAYER_H__ #define __ACTIVEMESSAGELAYER_H__ #include "AM.h" typedef nx_struct activemessage_header_t { nx_am_id_t type; } activemessage_header_t; #endif//__ACTIVEMESSAGELAYER_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/ActiveMessageLayerC.nc000077500000000000000000000053041207233610700244570ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration ActiveMessageLayerC() { provides { interface AMPacket; interface Packet; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; } uses { interface RadioPacket as SubPacket; interface BareSend as SubSend; interface BareReceive as SubReceive; interface ActiveMessageConfig as Config; } } implementation { components new ActiveMessageLayerP(), ActiveMessageAddressC; ActiveMessageLayerP.ActiveMessageAddress -> ActiveMessageAddressC; AMPacket = ActiveMessageLayerP; Packet = ActiveMessageLayerP; AMSend = ActiveMessageLayerP; Receive = ActiveMessageLayerP.Receive; Snoop = ActiveMessageLayerP.Snoop; SendNotifier = ActiveMessageLayerP; ReceiveDefault = ActiveMessageLayerP.ReceiveDefault; SnoopDefault = ActiveMessageLayerP.SnoopDefault; SubPacket = ActiveMessageLayerP; SubSend = ActiveMessageLayerP; SubReceive = ActiveMessageLayerP; Config = ActiveMessageLayerP; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/ActiveMessageLayerP.nc000066400000000000000000000167341207233610700245020ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Author: Chieh-Jan Mike Liang (default interfaces for TOSThreads) */ #include generic module ActiveMessageLayerP() { provides { interface RadioPacket; interface AMPacket; interface Packet; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface SendNotifier[am_id_t id]; // for TOSThreads interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; } uses { interface RadioPacket as SubPacket; interface BareSend as SubSend; interface BareReceive as SubReceive; interface ActiveMessageConfig as Config; interface ActiveMessageAddress; } } implementation { activemessage_header_t* getHeader(message_t* msg) { return ((void*)msg) + call SubPacket.headerLength(msg); } void* getPayload(message_t* msg) { return ((void*)msg) + call RadioPacket.headerLength(msg); } /*----------------- Send -----------------*/ command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { if( len > call Packet.maxPayloadLength() ) return EINVAL; if( call Config.checkFrame(msg) != SUCCESS ) return FAIL; call Packet.setPayloadLength(msg, len); call AMPacket.setSource(msg, call AMPacket.address()); call AMPacket.setGroup(msg, call AMPacket.localGroup()); call AMPacket.setType(msg, id); call AMPacket.setDestination(msg, addr); signal SendNotifier.aboutToSend[id](addr, msg); return call SubSend.send(msg); } inline event void SubSend.sendDone(message_t* msg, error_t error) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, error); } inline command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } default event void AMSend.sendDone[am_id_t id](message_t* msg, error_t error) { } inline command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } inline command void* AMSend.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call Packet.getPayload(msg, len); } default event void SendNotifier.aboutToSend[am_id_t id](am_addr_t addr, message_t* msg) { } /*----------------- Receive -----------------*/ event message_t* SubReceive.receive(message_t* msg) { am_id_t id = call AMPacket.type(msg); void* payload = getPayload(msg); uint8_t len = call Packet.payloadLength(msg); msg = call AMPacket.isForMe(msg) ? signal Receive.receive[id](msg, payload, len) : signal Snoop.receive[id](msg, payload, len); return msg; } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal ReceiveDefault.receive[id](msg, payload, len);; } default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal SnoopDefault.receive[id](msg, payload, len);; } default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } /*----------------- AMPacket -----------------*/ inline command am_addr_t AMPacket.address() { return call ActiveMessageAddress.amAddress(); } inline command am_group_t AMPacket.localGroup() { return call ActiveMessageAddress.amGroup(); } inline command bool AMPacket.isForMe(message_t* msg) { am_addr_t addr = call AMPacket.destination(msg); return addr == call AMPacket.address() || addr == AM_BROADCAST_ADDR; } inline command am_addr_t AMPacket.destination(message_t* msg) { return call Config.destination(msg); } inline command void AMPacket.setDestination(message_t* msg, am_addr_t addr) { call Config.setDestination(msg, addr); } inline command am_addr_t AMPacket.source(message_t* msg) { return call Config.source(msg); } inline command void AMPacket.setSource(message_t* msg, am_addr_t addr) { call Config.setSource(msg, addr); } inline command am_id_t AMPacket.type(message_t* msg) { return getHeader(msg)->type; } inline command void AMPacket.setType(message_t* msg, am_id_t type) { getHeader(msg)->type = type; } inline command am_group_t AMPacket.group(message_t* msg) { return call Config.group(msg); } inline command void AMPacket.setGroup(message_t* msg, am_group_t grp) { call Config.setGroup(msg, grp); } inline async event void ActiveMessageAddress.changed() { } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg) { return call SubPacket.headerLength(msg) + sizeof(activemessage_header_t); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(activemessage_header_t); } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { call SubPacket.setPayloadLength(msg, length + sizeof(activemessage_header_t)); } async command uint8_t RadioPacket.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(activemessage_header_t); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call SubPacket.metadataLength(msg); } async command void RadioPacket.clear(message_t* msg) { call SubPacket.clear(msg); } /*----------------- Packet -----------------*/ command void Packet.clear(message_t* msg) { call RadioPacket.clear(msg); } command uint8_t Packet.payloadLength(message_t* msg) { return call RadioPacket.payloadLength(msg); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call RadioPacket.setPayloadLength(msg, len); } command uint8_t Packet.maxPayloadLength() { return call RadioPacket.maxPayloadLength(); } command void* Packet.getPayload(message_t* msg, uint8_t len) { if( len > call RadioPacket.maxPayloadLength() ) return NULL; return ((void*)msg) + call RadioPacket.headerLength(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/AutoResourceAcquireLayerC.nc000066400000000000000000000047271207233610700256760ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module AutoResourceAcquireLayerC() { provides { interface BareSend; } uses { interface BareSend as SubSend; interface Resource; } } implementation { message_t *pending; command error_t BareSend.send(message_t* msg) { if( call Resource.immediateRequest() == SUCCESS ) { error_t result = call SubSend.send(msg); if( result != SUCCESS ) call Resource.release(); return result; } pending = msg; return call Resource.request(); } event void Resource.granted() { error_t result = call SubSend.send(pending); if( result != SUCCESS ) { call Resource.release(); signal BareSend.sendDone(pending, result); } } event void SubSend.sendDone(message_t* msg, error_t result) { call Resource.release(); signal BareSend.sendDone(msg, result); } command error_t BareSend.cancel(message_t* msg) { return call SubSend.cancel(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/CsmaConfig.nc000077500000000000000000000034461207233610700226550ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface CsmaConfig { /** * This command is called when the message is transmitted to * check if it needs software clear channel assesment. */ async command bool requiresSoftwareCCA(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/CsmaLayerC.nc000077500000000000000000000040001207233610700226120ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration CsmaLayerC() { provides { interface RadioSend; interface RadioReceive; } uses { interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioCCA as SubCCA; interface CsmaConfig as Config; } } implementation { components new CsmaLayerP(); RadioSend = CsmaLayerP; SubSend = CsmaLayerP; RadioReceive = SubReceive; SubCCA = CsmaLayerP; Config = CsmaLayerP; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/CsmaLayerP.nc000077500000000000000000000056221207233610700226420ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include generic module CsmaLayerP() { provides { interface RadioSend; } uses { interface CsmaConfig as Config; interface RadioSend as SubSend; interface RadioCCA as SubCCA; } } implementation { tasklet_norace message_t *txMsg; tasklet_norace uint8_t state; enum { STATE_READY = 0, STATE_CCA_WAIT = 1, STATE_SEND = 2, }; tasklet_async event void SubSend.ready() { if( state == STATE_READY ) signal RadioSend.ready(); } tasklet_async command error_t RadioSend.send(message_t* msg) { error_t error; if( state == STATE_READY ) { if( call Config.requiresSoftwareCCA(msg) ) { txMsg = msg; if( (error = call SubCCA.request()) == SUCCESS ) state = STATE_CCA_WAIT; } else if( (error = call SubSend.send(msg)) == SUCCESS ) state = STATE_SEND; } else error = EBUSY; return error; } tasklet_async event void SubCCA.done(error_t error) { RADIO_ASSERT( state == STATE_CCA_WAIT ); if( error == SUCCESS && (error = call SubSend.send(txMsg)) == SUCCESS ) state = STATE_SEND; else { state = STATE_READY; signal RadioSend.sendDone(EBUSY); } } tasklet_async event void SubSend.sendDone(error_t error) { RADIO_ASSERT( state == STATE_SEND ); state = STATE_READY; signal RadioSend.sendDone(error); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/DebugLayerC.nc000066400000000000000000000041421207233610700227610ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration DebugLayerC(char prefix[]) { provides { interface RadioState; interface RadioSend; interface RadioReceive; } uses { interface RadioState as SubState; interface RadioSend as SubSend; interface RadioReceive as SubReceive; } } implementation { components new DebugLayerP(prefix), DiagMsgC; RadioState = DebugLayerP; RadioSend = DebugLayerP; RadioReceive = DebugLayerP; SubState = DebugLayerP; SubSend = DebugLayerP; SubReceive = DebugLayerP; DebugLayerP.DiagMsg -> DiagMsgC; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/DebugLayerP.nc000066400000000000000000000110711207233610700227750ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Tasklet.h" generic module DebugLayerP(char prefix[]) { provides { interface RadioState; interface RadioSend; interface RadioReceive; } uses { interface RadioState as SubState; interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface DiagMsg; } } implementation { // ------- RadioState tasklet_async command error_t RadioState.turnOff() { error_t error = call SubState.turnOff(); if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("turnOff"); call DiagMsg.uint8(error); call DiagMsg.send(); } return error; } tasklet_async command error_t RadioState.standby() { error_t error = call SubState.standby(); if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("standby"); call DiagMsg.uint8(error); call DiagMsg.send(); } return error; } tasklet_async command error_t RadioState.turnOn() { error_t error = call SubState.turnOn(); if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("turnOn"); call DiagMsg.uint8(error); call DiagMsg.send(); } return error; } tasklet_async command error_t RadioState.setChannel(uint8_t channel) { error_t error = call SubState.setChannel(channel); if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("setChannel"); call DiagMsg.uint8(channel); call DiagMsg.uint8(error); call DiagMsg.send(); } return error; } tasklet_async event void SubState.done() { if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("done"); call DiagMsg.send(); } signal RadioState.done(); } tasklet_async command uint8_t RadioState.getChannel() { return call SubState.getChannel(); } // ------- RadioSend tasklet_async command error_t RadioSend.send(message_t* msg) { error_t error = call SubSend.send(msg); if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("send"); call DiagMsg.hex16((uint16_t)msg); call DiagMsg.uint8(error); call DiagMsg.send(); } return error; } tasklet_async event void SubSend.sendDone(error_t error) { if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("sendDone"); call DiagMsg.uint8(error); call DiagMsg.send(); } signal RadioSend.sendDone(error); } tasklet_async event void SubSend.ready() { if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("ready"); call DiagMsg.send(); } signal RadioSend.ready(); } // ------- RadioReceive tasklet_async event bool SubReceive.header(message_t* msg) { signal RadioReceive.header(msg); } tasklet_async event message_t* SubReceive.receive(message_t* msg) { message_t* msg2 = signal RadioReceive.receive(msg); if( call DiagMsg.record() ) { call DiagMsg.str(prefix); call DiagMsg.str("receive"); call DiagMsg.hex16((uint16_t)msg); call DiagMsg.hex16((uint16_t)msg2); call DiagMsg.send(); } } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/DummyConfig.nc000077500000000000000000000033361207233610700230630ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface DummyConfig { /** * We need to put something here, but this is not going to get called */ async command void nothing(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/DummyLayerC.nc000066400000000000000000000047451207233610700230370ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration DummyLayerC() { provides { interface SplitControl; interface BareSend; interface BareReceive; interface RadioState; interface RadioSend; interface RadioReceive; interface RadioCCA; interface RadioPacket; interface DummyConfig as UnconnectedConfig; } uses { interface SplitControl as SubControl; interface BareSend as SubBareSend; interface BareReceive as SubBareReceive; interface RadioState as SubState; interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioCCA as SubRadioCCA; interface RadioPacket as SubPacket; interface DummyConfig as Config; } } implementation { RadioState = SubState; RadioSend = SubSend; RadioReceive = SubReceive; RadioCCA = SubRadioCCA; RadioPacket = SubPacket; SplitControl = SubControl; BareSend = SubBareSend; BareReceive = SubBareReceive; Config = UnconnectedConfig; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/Ieee154MessageLayerC.nc000066400000000000000000000104271207233610700243440ustar00rootroot00000000000000/* * Copyright (c) 2007-2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module Ieee154MessageLayerC() { provides { interface Packet; interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier; } uses { interface Ieee154PacketLayer; interface RadioPacket; interface BareSend as SubSend; interface BareReceive as SubReceive; } } implementation { void* getPayload(message_t* msg) { return ((void*)msg) + call RadioPacket.headerLength(msg); } /*----------------- Packet -----------------*/ command void Packet.clear(message_t* msg) { call RadioPacket.clear(msg); } command uint8_t Packet.payloadLength(message_t* msg) { return call RadioPacket.payloadLength(msg); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call RadioPacket.setPayloadLength(msg, len); } command uint8_t Packet.maxPayloadLength() { return call RadioPacket.maxPayloadLength(); } command void* Packet.getPayload(message_t* msg, uint8_t len) { if( len > call RadioPacket.maxPayloadLength() ) return NULL; return getPayload(msg); } /*----------------- Ieee154Send -----------------*/ command void * Ieee154Send.getPayload(message_t* msg, uint8_t len) { return call Packet.getPayload(msg, len); } command uint8_t Ieee154Send.maxPayloadLength() { return call Packet.maxPayloadLength(); } command error_t Ieee154Send.cancel(message_t* msg) { return call SubSend.cancel(msg); } command error_t Ieee154Send.send(ieee154_saddr_t addr, message_t* msg, uint8_t len) { if( len > call Packet.maxPayloadLength() ) return EINVAL; // user forgot to call Packet.clear(), maybe we should return FAIL if( ! call Ieee154PacketLayer.isDataFrame(msg) ) call Ieee154PacketLayer.createDataFrame(msg); call Packet.setPayloadLength(msg, len); call Ieee154PacketLayer.setSrcAddr(msg, call Ieee154PacketLayer.localAddr()); call Ieee154PacketLayer.setDestAddr(msg, addr); call Ieee154PacketLayer.setDestPan(msg, call Ieee154PacketLayer.localPan()); signal SendNotifier.aboutToSend(addr, msg); return call SubSend.send(msg); } event void SubSend.sendDone(message_t* msg, error_t error) { signal Ieee154Send.sendDone(msg, error); } default event void Ieee154Send.sendDone(message_t* msg, error_t error) { } default event void SendNotifier.aboutToSend(am_addr_t addr, message_t* msg) { } /*----------------- Receive -----------------*/ event message_t* SubReceive.receive(message_t* msg) { if( call Ieee154PacketLayer.isForMe(msg) ) return signal Ieee154Receive.receive(msg, getPayload(msg), call Packet.payloadLength(msg)); else return msg; } default event message_t* Ieee154Receive.receive(message_t* msg, void* payload, uint8_t len) { return msg; } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/Ieee154PacketLayer.h000066400000000000000000000035761207233610700237220ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __IEEE154PACKETLAYER_H__ #define __IEEE154PACKETLAYER_H__ #include "Ieee154.h" typedef nx_struct ieee154_simple_header_t { nxle_uint16_t fcf; nxle_uint8_t dsn; nxle_uint16_t destpan; nxle_uint16_t dest; nxle_uint16_t src; } ieee154_simple_header_t; #endif//__IEEE154PACKETLAYER_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/Ieee154PacketLayer.nc000066400000000000000000000135471207233610700240720ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Ieee154.h" #include "message.h" /** * This interface encapsulates IEEE 802.15.4 intrapan data frames with * 16-bit destination pan, source and destination addresses. It also * supports 6LowPan interoperability mode, and acknowledgement frames. * Note, that this interface does not support the CRC-16 value, which * should be verified before the data can be trusted. */ interface Ieee154PacketLayer { /** * Returns the frame control field. This method should not be used, * isDataFrame and isAckFrame should be used instead. */ async command uint16_t getFCF(message_t* msg); /** * Sets the frame control field. This method should not be used, * createDataFrame and createAckFrame should be used instead. */ async command void setFCF(message_t* msg, uint16_t fcf); /** * Returns TRUE if the message is a data frame supported by * this interface (based on the value of the FCF). */ async command bool isDataFrame(message_t* msg); /** * Sets the FCF to create a data frame supported by this interface. * You may call setAckRequired and setFramePending commands after this. */ async command void createDataFrame(message_t* msg); /** * Returns TRUE if the message is an acknowledgement frame supported * by this interface (based on the value of the FCF). */ async command bool isAckFrame(message_t* msg); /** * Sets the FCF to create an acknowledgement frame supported by * this interface. You may call setFramePending after this. */ async command void createAckFrame(message_t* msg); /** * Creates an acknowledgement packet for the given data packet. * This also sets the DSN value. The data message must be a * data frame, the ack message will be overwritten. */ async command void createAckReply(message_t* data, message_t* ack); /** * Returns TRUE if the acknowledgement packet corresponds to the * data packet. The data message must be a data packet. */ async command bool verifyAckReply(message_t* data, message_t* ack); /** * Returns TRUE if the ACK required field is set in the FCF. */ async command bool getAckRequired(message_t* msg); /** * Sets the ACK required field in the FCF, should never be set * for acknowledgement frames. */ async command void setAckRequired(message_t* msg, bool ack); /** * Returns TRUE if the frame pending field is set in the FCF. */ async command bool getFramePending(message_t* msg); /** * Sets the frame pending field in the FCF. */ async command void setFramePending(message_t* msg, bool pending); /** * Returns the data sequence number */ async command uint8_t getDSN(message_t* msg); /** * Sets the data sequence number */ async command void setDSN(message_t* msg, uint8_t dsn); /** * returns the destination PAN id, values <= 255 are tinyos groups, * valid only for data frames */ async command uint16_t getDestPan(message_t* msg); /** * Sets the destination PAN id, valid only for data frames */ async command void setDestPan(message_t* msg, uint16_t pan); /** * Returns the destination address, valid only for data frames */ async command uint16_t getDestAddr(message_t* msg); /** * Sets the destination address, valid only for data frames */ async command void setDestAddr(message_t* msg, uint16_t addr); /** * Returns the source address, valid only for data frames */ async command uint16_t getSrcAddr(message_t* msg); /** * Sets the source address, valid only for data frames */ async command void setSrcAddr(message_t* msg, uint16_t addr); /** * Returns TRUE if the packet is a data packet, the ACK_REQ field * is set and the destination address is not the broadcast address. */ async command bool requiresAckWait(message_t* msg); /** * Returns TRUE if the packet is a data packet, the ACK_REQ field * is set and the destionation address is this node. */ async command bool requiresAckReply(message_t* msg); /** * Returns the local pan id (AM group) */ async command ieee154_panid_t localPan(); /** * Returns the local address of the node (AM address) */ async command ieee154_saddr_t localAddr(); /** * Returns TRUE if the destionation of this message is either 0xFFFF * or is the local address of the node, and the pan address is the * local one. */ async command bool isForMe(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/Ieee154PacketLayerC.nc000066400000000000000000000041111207233610700241600ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration Ieee154PacketLayerC() { provides { interface Ieee154PacketLayer; interface Ieee154Packet; interface RadioPacket; } uses { interface RadioPacket as SubPacket; } } implementation { components new Ieee154PacketLayerP(), ActiveMessageAddressC; Ieee154PacketLayerP.ActiveMessageAddress -> ActiveMessageAddressC; Ieee154PacketLayer = Ieee154PacketLayerP; Ieee154Packet = Ieee154PacketLayerP; RadioPacket = Ieee154PacketLayerP; SubPacket = Ieee154PacketLayerP; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/Ieee154PacketLayerP.nc000066400000000000000000000217261207233610700242100ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include generic module Ieee154PacketLayerP() { provides { interface Ieee154PacketLayer; interface Ieee154Packet; interface RadioPacket; } uses { interface ActiveMessageAddress; interface RadioPacket as SubPacket; } } implementation { /*----------------- Ieee154Packet -----------------*/ enum { IEEE154_DATA_FRAME_MASK = (IEEE154_TYPE_MASK << IEEE154_FCF_FRAME_TYPE) | (1 << IEEE154_FCF_INTRAPAN) | (IEEE154_ADDR_MASK << IEEE154_FCF_DEST_ADDR_MODE) | (IEEE154_ADDR_MASK << IEEE154_FCF_SRC_ADDR_MODE), IEEE154_DATA_FRAME_VALUE = (IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE) | (1 << IEEE154_FCF_INTRAPAN) | (IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE) | (IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE), IEEE154_DATA_FRAME_PRESERVE = (1 << IEEE154_FCF_ACK_REQ) | (1 << IEEE154_FCF_FRAME_PENDING), IEEE154_ACK_FRAME_LENGTH = 3, // includes the FCF, DSN IEEE154_ACK_FRAME_MASK = (IEEE154_TYPE_MASK << IEEE154_FCF_FRAME_TYPE), IEEE154_ACK_FRAME_VALUE = (IEEE154_TYPE_ACK << IEEE154_FCF_FRAME_TYPE), }; ieee154_simple_header_t* getHeader(message_t* msg) { return ((void*)msg) + call SubPacket.headerLength(msg); } async command uint16_t Ieee154PacketLayer.getFCF(message_t* msg) { return getHeader(msg)->fcf; } async command void Ieee154PacketLayer.setFCF(message_t* msg, uint16_t fcf) { getHeader(msg)->fcf = fcf; } async command bool Ieee154PacketLayer.isDataFrame(message_t* msg) { return (getHeader(msg)->fcf & IEEE154_DATA_FRAME_MASK) == IEEE154_DATA_FRAME_VALUE; } async command void Ieee154PacketLayer.createDataFrame(message_t* msg) { // keep the ack requested and frame pending bits getHeader(msg)->fcf = (getHeader(msg)->fcf & IEEE154_DATA_FRAME_PRESERVE) | IEEE154_DATA_FRAME_VALUE; } async command bool Ieee154PacketLayer.isAckFrame(message_t* msg) { return (getHeader(msg)->fcf & IEEE154_ACK_FRAME_MASK) == IEEE154_ACK_FRAME_VALUE; } async command void Ieee154PacketLayer.createAckFrame(message_t* msg) { call SubPacket.setPayloadLength(msg, IEEE154_ACK_FRAME_LENGTH); getHeader(msg)->fcf = IEEE154_ACK_FRAME_VALUE; } async command void Ieee154PacketLayer.createAckReply(message_t* data, message_t* ack) { ieee154_simple_header_t* header = getHeader(ack); call SubPacket.setPayloadLength(ack, IEEE154_ACK_FRAME_LENGTH); header->fcf = IEEE154_ACK_FRAME_VALUE; header->dsn = getHeader(data)->dsn; } async command bool Ieee154PacketLayer.verifyAckReply(message_t* data, message_t* ack) { ieee154_simple_header_t* header = getHeader(ack); return header->dsn == getHeader(data)->dsn && (header->fcf & IEEE154_ACK_FRAME_MASK) == IEEE154_ACK_FRAME_VALUE; } async command bool Ieee154PacketLayer.getAckRequired(message_t* msg) { return getHeader(msg)->fcf & (1 << IEEE154_FCF_ACK_REQ) ? TRUE : FALSE; } async command void Ieee154PacketLayer.setAckRequired(message_t* msg, bool ack) { if( ack ) getHeader(msg)->fcf |= (1 << IEEE154_FCF_ACK_REQ); else getHeader(msg)->fcf &= ~(uint16_t)(1 << IEEE154_FCF_ACK_REQ); } async command bool Ieee154PacketLayer.getFramePending(message_t* msg) { return getHeader(msg)->fcf & (1 << IEEE154_FCF_FRAME_PENDING) ? TRUE : FALSE; } async command void Ieee154PacketLayer.setFramePending(message_t* msg, bool pending) { if( pending ) getHeader(msg)->fcf |= (1 << IEEE154_FCF_FRAME_PENDING); else getHeader(msg)->fcf &= ~(uint16_t)(1 << IEEE154_FCF_FRAME_PENDING); } async command uint8_t Ieee154PacketLayer.getDSN(message_t* msg) { return getHeader(msg)->dsn; } async command void Ieee154PacketLayer.setDSN(message_t* msg, uint8_t dsn) { getHeader(msg)->dsn = dsn; } async command uint16_t Ieee154PacketLayer.getDestPan(message_t* msg) { return getHeader(msg)->destpan; } async command void Ieee154PacketLayer.setDestPan(message_t* msg, uint16_t pan) { getHeader(msg)->destpan = pan; } async command uint16_t Ieee154PacketLayer.getDestAddr(message_t* msg) { return getHeader(msg)->dest; } async command void Ieee154PacketLayer.setDestAddr(message_t* msg, uint16_t addr) { getHeader(msg)->dest = addr; } async command uint16_t Ieee154PacketLayer.getSrcAddr(message_t* msg) { return getHeader(msg)->src; } async command void Ieee154PacketLayer.setSrcAddr(message_t* msg, uint16_t addr) { getHeader(msg)->src = addr; } async command bool Ieee154PacketLayer.requiresAckWait(message_t* msg) { return call Ieee154PacketLayer.getAckRequired(msg) && call Ieee154PacketLayer.isDataFrame(msg) && call Ieee154PacketLayer.getDestAddr(msg) != 0xFFFF; } async command bool Ieee154PacketLayer.requiresAckReply(message_t* msg) { return call Ieee154PacketLayer.getAckRequired(msg) && call Ieee154PacketLayer.isDataFrame(msg) && call Ieee154PacketLayer.getDestAddr(msg) == call ActiveMessageAddress.amAddress(); } async command ieee154_saddr_t Ieee154PacketLayer.localAddr() { return call ActiveMessageAddress.amAddress(); } async command ieee154_panid_t Ieee154PacketLayer.localPan() { return call ActiveMessageAddress.amGroup(); } async command bool Ieee154PacketLayer.isForMe(message_t* msg) { ieee154_saddr_t addr = call Ieee154PacketLayer.getDestAddr(msg); return (addr == call Ieee154PacketLayer.localAddr() || addr == IEEE154_BROADCAST_ADDR) && call Ieee154PacketLayer.getDestPan(msg) == call Ieee154PacketLayer.localPan(); } async event void ActiveMessageAddress.changed() { } /*----------------- Ieee154Packet -----------------*/ command ieee154_saddr_t Ieee154Packet.address() { return call Ieee154PacketLayer.localAddr(); } command ieee154_saddr_t Ieee154Packet.destination(message_t* msg) { return call Ieee154PacketLayer.getDestAddr(msg); } command ieee154_saddr_t Ieee154Packet.source(message_t* msg) { return call Ieee154PacketLayer.getSrcAddr(msg); } command void Ieee154Packet.setDestination(message_t* msg, ieee154_saddr_t addr) { call Ieee154PacketLayer.setDestAddr(msg, addr); } command void Ieee154Packet.setSource(message_t* msg, ieee154_saddr_t addr) { call Ieee154PacketLayer.setSrcAddr(msg, addr); } command bool Ieee154Packet.isForMe(message_t* msg) { return call Ieee154PacketLayer.isForMe(msg); } command ieee154_panid_t Ieee154Packet.pan(message_t* msg) { return call Ieee154PacketLayer.getDestPan(msg); } command void Ieee154Packet.setPan(message_t* msg, ieee154_panid_t grp) { call Ieee154PacketLayer.setDestPan(msg, grp); } command ieee154_panid_t Ieee154Packet.localPan() { return call Ieee154PacketLayer.localPan(); } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg) { return call SubPacket.headerLength(msg) + sizeof(ieee154_simple_header_t); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(ieee154_simple_header_t); } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { call SubPacket.setPayloadLength(msg, length + sizeof(ieee154_simple_header_t)); } async command uint8_t RadioPacket.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(ieee154_simple_header_t); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call SubPacket.metadataLength(msg); } async command void RadioPacket.clear(message_t* msg) { call Ieee154PacketLayer.createDataFrame(msg); call SubPacket.clear(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/LowPowerListeningConfig.nc000066400000000000000000000043561207233610700254230ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface LowPowerListeningConfig { /** * Returns TRUE if an acknowledgement should be requested * for the message automatically by the LPL code (this should * normally happen for all non-broadcast messages). */ command bool needsAutoAckRequest(message_t* msg); /** * Returns TRUE if an acknowledgement has been requested for * this message via the PacketAcknowledgements interface. */ command bool ackRequested(message_t* msg); /** * Returns the number of milliseconds the mote should turn on * its radio to check for incoming messages. This check is * performed at every localWakeInterval. */ command uint16_t getListenLength(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/LowPowerListeningDummyC.nc000066400000000000000000000042331207233610700254060ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration LowPowerListeningDummyC() { provides { interface SplitControl; interface BareSend as Send; interface BareReceive as Receive; interface RadioPacket; interface LowPowerListening; } uses { interface SplitControl as SubControl; interface BareSend as SubSend; interface BareReceive as SubReceive; interface RadioPacket as SubPacket; } } implementation { SplitControl = SubControl; Send = SubSend; Receive = SubReceive; RadioPacket = SubPacket; components new LowPowerListeningDummyP(); LowPowerListening = LowPowerListeningDummyP; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/LowPowerListeningDummyP.nc000066400000000000000000000040311207233610700254170ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic module LowPowerListeningDummyP() { provides interface LowPowerListening; } implementation { command void LowPowerListening.setLocalWakeupInterval(uint16_t intervalMs) { } command uint16_t LowPowerListening.getLocalWakeupInterval() { return 0; } command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs) { } command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { return 0; } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/LowPowerListeningLayer.h000066400000000000000000000034131207233610700251120ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __LOWPOWERLISTENINGLAYER_H__ #define __LOWPOWERLISTENINGLAYER_H__ typedef struct lpl_metadata_t { uint16_t sleepint; } lpl_metadata_t; #endif//__LOWPOWERLISTENINGLAYER_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/LowPowerListeningLayerC.nc000066400000000000000000000054251207233610700253730ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration LowPowerListeningLayerC() { provides { interface SplitControl; interface BareSend as Send; interface BareReceive as Receive; interface RadioPacket; interface LowPowerListening; } uses { interface SplitControl as SubControl; interface BareSend as SubSend; interface BareReceive as SubReceive; interface RadioPacket as SubPacket; interface LowPowerListeningConfig as Config; interface PacketAcknowledgements; } } implementation { components new LowPowerListeningLayerP(), new TimerMilliC(); components SystemLowPowerListeningC; SplitControl = LowPowerListeningLayerP; Send = LowPowerListeningLayerP; Receive = LowPowerListeningLayerP; RadioPacket = LowPowerListeningLayerP; LowPowerListening = LowPowerListeningLayerP; SubControl = LowPowerListeningLayerP; SubSend = LowPowerListeningLayerP; SubReceive = LowPowerListeningLayerP; SubPacket = LowPowerListeningLayerP; Config = LowPowerListeningLayerP; PacketAcknowledgements = LowPowerListeningLayerP; LowPowerListeningLayerP.Timer -> TimerMilliC; LowPowerListeningLayerP.SystemLowPowerListening -> SystemLowPowerListeningC; components NoLedsC as LedsC; LowPowerListeningLayerP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/LowPowerListeningLayerP.nc000066400000000000000000000253271207233610700254130ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include #include generic module LowPowerListeningLayerP() { provides { interface SplitControl; interface BareSend as Send; interface BareReceive as Receive; interface RadioPacket; interface LowPowerListening; } uses { interface SplitControl as SubControl; interface BareSend as SubSend; interface BareReceive as SubReceive; interface RadioPacket as SubPacket; interface PacketAcknowledgements; interface LowPowerListeningConfig as Config; interface Timer; interface SystemLowPowerListening; interface Leds; } } implementation { enum { MIN_SLEEP = 2, // the minimum sleep interval in milliseconds }; uint16_t sleepInterval = LPL_DEF_LOCAL_WAKEUP; message_t* txMsg; error_t txError; /*----------------- state machine -----------------*/ enum { OFF = 0, OFF_SUBSTOP = 1, // must have consecutive indices OFF_SUBSTOP_DONE = 2, // must have consecutive indices OFF_STOP_END = 3, // must have consecutive indices OFF_START_END = 4, LISTEN_SUBSTART = 10, // must have consecutive indices LISTEN_SUBSTART_DONE = 11, // must have consecutive indices LISTEN_TIMER = 12, // must have consecutive indices LISTEN_WAIT = 13, // must have consecutive indices SLEEP_SUBSTOP = 20, // must have consecutive indices SLEEP_SUBSTOP_DONE = 21, // must have consecutive indices SLEEP_TIMER = 22, // must have consecutive indices SLEEP_WAIT = 23, // must have consecutive indices SLEEP_SUBSTOP_DONE_TOSEND = 29, // must have consecutive indices SEND_SUBSTART = 30, // must have consecutive indices SEND_SUBSTART_DONE = 31, // must have consecutive indices SEND_TIMER = 32, // must have consecutive indices SEND_SUBSEND= 33, SEND_SUBSEND_DONE = 34, SEND_SUBSEND_DONE_LAST = 35, SEND_DONE = 36, }; uint8_t state; task void transition() { error_t error; uint16_t transmitInterval; if( state == LISTEN_SUBSTART || state == SEND_SUBSTART ) { error = call SubControl.start(); RADIO_ASSERT( error == SUCCESS || error == EBUSY ); if( error == SUCCESS ) { call Leds.led2On(); ++state; } else post transition(); } else if( state == SLEEP_SUBSTOP || state == OFF_SUBSTOP ) { error = call SubControl.stop(); RADIO_ASSERT( error == SUCCESS || error == EBUSY ); if( error == SUCCESS ) { ++state; call Leds.led2Off(); } else post transition(); } else if( state == OFF_START_END ) { state = LISTEN_SUBSTART; post transition(); signal SplitControl.startDone(SUCCESS); } else if( state == OFF_STOP_END ) { state = OFF; signal SplitControl.stopDone(SUCCESS); } else if( state == LISTEN_TIMER ) { state = LISTEN_WAIT; if( sleepInterval > 0 ) call Timer.startOneShot(call Config.getListenLength()); } else if( state == SLEEP_TIMER ) { if( sleepInterval > 0 ) { state = SLEEP_WAIT; call Timer.startOneShot(sleepInterval); } else { state = LISTEN_SUBSTART; post transition(); } } else if( state == SEND_TIMER ) { transmitInterval = call LowPowerListening.getRemoteWakeupInterval(txMsg); if( transmitInterval > 0 ) call Timer.startOneShot(transmitInterval + 2 * call Config.getListenLength()); state = SEND_SUBSEND; post transition(); } else if( state == SEND_SUBSEND) { txError = call SubSend.send(txMsg); if( txError == SUCCESS ) state = SEND_SUBSEND_DONE; else { state = SEND_DONE; post transition(); } } else if( state == SEND_DONE ) { state = LISTEN_WAIT; if( sleepInterval > 0 ) call Timer.startOneShot(call SystemLowPowerListening.getDelayAfterReceive()); signal Send.sendDone(txMsg, txError); } } command error_t SplitControl.start() { if( state == OFF_START_END ) return EBUSY; else if( state != OFF ) return EALREADY; state = OFF_START_END; post transition(); return SUCCESS; } event void SubControl.startDone(error_t error) { RADIO_ASSERT( error == SUCCESS || error == EBUSY ); RADIO_ASSERT( state == LISTEN_SUBSTART_DONE || state == SEND_SUBSTART_DONE ); if( error == SUCCESS ) ++state; else --state; post transition(); } command error_t SplitControl.stop() { if( state == SLEEP_WAIT || state == LISTEN_WAIT ) { call Timer.stop(); post transition(); } if( state == LISTEN_TIMER || state == LISTEN_WAIT || state == SLEEP_SUBSTOP ) state = OFF_SUBSTOP; else if( state == SLEEP_SUBSTOP_DONE ) state = OFF_SUBSTOP_DONE; else if( state == LISTEN_SUBSTART || state == SLEEP_TIMER || state == SLEEP_WAIT ) state = OFF_STOP_END; else if( state == OFF ) return EALREADY; else return EBUSY; return SUCCESS; } event void SubControl.stopDone(error_t error) { RADIO_ASSERT( error == SUCCESS || error == EBUSY ); RADIO_ASSERT( state == SLEEP_SUBSTOP_DONE || state == OFF_SUBSTOP_DONE || state == SLEEP_SUBSTOP_DONE_TOSEND ); if( error == SUCCESS ) ++state; else if( state != SLEEP_SUBSTOP_DONE_TOSEND ) --state; else state = SEND_TIMER; post transition(); } event void Timer.fired() { if( state == LISTEN_WAIT ) state = SLEEP_SUBSTOP; else if( state == SLEEP_WAIT ) state = LISTEN_SUBSTART; else if( state == SEND_SUBSEND_DONE ) state = SEND_SUBSEND_DONE_LAST; else if( state == SEND_SUBSEND) state = SEND_DONE; else RADIO_ASSERT(FALSE); post transition(); } event message_t* SubReceive.receive(message_t* msg) { call Leds.led0Toggle(); if( state == SLEEP_SUBSTOP ) state = LISTEN_WAIT; if( state == LISTEN_WAIT && sleepInterval > 0 ) call Timer.startOneShot(call SystemLowPowerListening.getDelayAfterReceive()); return signal Receive.receive(msg); } command error_t Send.send(message_t* msg) { if( state == LISTEN_WAIT || state == SLEEP_WAIT ) { call Timer.stop(); post transition(); } if( state == LISTEN_SUBSTART || state == SLEEP_TIMER || state == SLEEP_WAIT ) state = SEND_SUBSTART; else if( state == LISTEN_SUBSTART_DONE ) state = SEND_SUBSTART_DONE; else if( state == LISTEN_TIMER || state == SLEEP_SUBSTOP || state == LISTEN_WAIT ) state = SEND_TIMER; else if( state == SLEEP_SUBSTOP_DONE ) state = SLEEP_SUBSTOP_DONE_TOSEND; else return EBUSY; if( call Config.needsAutoAckRequest(msg) ) call PacketAcknowledgements.requestAck(msg); txMsg = msg; txError = FAIL; return SUCCESS; } command error_t Send.cancel(message_t* msg) { if( state == SEND_SUBSEND ) { call Timer.stop(); state = SEND_DONE; txError = ECANCEL; post transition(); return SUCCESS; } else if( state == SEND_SUBSEND_DONE ) { // we stop sending the message even if SubSend.cancel was not succesfull state = SEND_SUBSEND_DONE_LAST; return call SubSend.cancel(txMsg); } else return FAIL; } event void SubSend.sendDone(message_t* msg, error_t error) { RADIO_ASSERT( state == SEND_SUBSEND_DONE || state == SEND_SUBSEND_DONE_LAST ); RADIO_ASSERT( msg == txMsg ); txError = error; // TODO: extend the PacketAcknowledgements interface with getAckRequired if( error != SUCCESS || call LowPowerListening.getRemoteWakeupInterval(msg) == 0 || state == SEND_SUBSEND_DONE_LAST || (call Config.ackRequested(msg) && call PacketAcknowledgements.wasAcked(msg)) ) { call Timer.stop(); state = SEND_DONE; } else state = SEND_SUBSEND; post transition(); if( error == SUCCESS ) call Leds.led1Toggle(); } /*----------------- LowPowerListening -----------------*/ lpl_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } command void LowPowerListening.setLocalWakeupInterval(uint16_t interval) { if( interval < MIN_SLEEP ) interval = 0; sleepInterval = interval; if( state == LISTEN_WAIT || state == SLEEP_WAIT ) { call Timer.stop(); --state; post transition(); } } command uint16_t LowPowerListening.getLocalWakeupInterval() { return sleepInterval; } command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t interval) { if( interval < MIN_SLEEP ) interval = 0; getMeta(msg)->sleepint = interval; } command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { return getMeta(msg)->sleepint; } default event void SplitControl.startDone(error_t error) { } default event void SplitControl.stopDone(error_t error) { } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg) { return call SubPacket.headerLength(msg); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg); } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { call SubPacket.setPayloadLength(msg, length); } async command uint8_t RadioPacket.maxPayloadLength() { return call SubPacket.maxPayloadLength(); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call SubPacket.metadataLength(msg) + sizeof(lpl_metadata_t); } async command void RadioPacket.clear(message_t* msg) { getMeta(msg)->sleepint = 0; call SubPacket.clear(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/MessageBufferLayerC.nc000066400000000000000000000043651207233610700244600ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration MessageBufferLayerC() { provides { interface SplitControl; interface BareSend as Send; interface BareReceive as Receive; interface RadioChannel; } uses { interface RadioState; interface RadioSend; interface RadioReceive; } } implementation { components new MessageBufferLayerP(), MainC, TaskletC; MainC.SoftwareInit -> MessageBufferLayerP; SplitControl = MessageBufferLayerP; Send = MessageBufferLayerP; Receive = MessageBufferLayerP; RadioChannel = MessageBufferLayerP; RadioState = MessageBufferLayerP; MessageBufferLayerP.Tasklet -> TaskletC; RadioSend = MessageBufferLayerP; RadioReceive = MessageBufferLayerP; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/MessageBufferLayerP.nc000066400000000000000000000161651207233610700244760ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti * Andreas Huber */ #include #include generic module MessageBufferLayerP() { provides { interface SplitControl; interface Init as SoftwareInit; interface BareSend as Send; interface BareReceive as Receive; interface RadioChannel; } uses { interface RadioState; interface Tasklet; interface RadioSend; interface RadioReceive; } } implementation { /*----------------- State -----------------*/ tasklet_norace uint8_t state; enum { STATE_READY = 0, STATE_TX_PENDING = 1, STATE_TX_RETRY = 2, STATE_TX_SEND = 3, STATE_TX_DONE = 4, STATE_TURN_ON = 5, STATE_TURN_OFF = 6, STATE_CHANNEL = 7, }; command error_t SplitControl.start() { error_t error; call Tasklet.suspend(); if( state != STATE_READY ) error = EBUSY; else { error = call RadioState.turnOn(); if( error == SUCCESS ) state = STATE_TURN_ON; } call Tasklet.resume(); return error; } command error_t SplitControl.stop() { error_t error; call Tasklet.suspend(); if( state != STATE_READY ) error = EBUSY; else { error = call RadioState.turnOff(); if( error == SUCCESS ) state = STATE_TURN_OFF; } call Tasklet.resume(); return error; } command error_t RadioChannel.setChannel(uint8_t channel) { error_t error; call Tasklet.suspend(); if( state != STATE_READY ) error = EBUSY; else { error = call RadioState.setChannel(channel); if( error == SUCCESS ) state = STATE_CHANNEL; } call Tasklet.resume(); return error; } command uint8_t RadioChannel.getChannel() { return call RadioState.getChannel(); } task void stateDoneTask() { uint8_t s; s = state; // change the state before so we can be reentered from the event state = STATE_READY; if( s == STATE_TURN_ON ) signal SplitControl.startDone(SUCCESS); else if( s == STATE_TURN_OFF ) signal SplitControl.stopDone(SUCCESS); else if( s == STATE_CHANNEL ) signal RadioChannel.setChannelDone(); else // not our event, ignore it state = s; } tasklet_async event void RadioState.done() { post stateDoneTask(); } default event void SplitControl.startDone(error_t error) { } default event void SplitControl.stopDone(error_t error) { } default event void RadioChannel.setChannelDone() { } /*----------------- Send -----------------*/ message_t* txMsg; tasklet_norace error_t txError; uint8_t retries; // Many EBUSY replies from RadioSend are normal if the channel is cognested enum { MAX_RETRIES = 5 }; task void sendTask() { bool done = FALSE; call Tasklet.suspend(); RADIO_ASSERT( state == STATE_TX_PENDING || state == STATE_TX_DONE ); if( state == STATE_TX_PENDING && ++retries <= MAX_RETRIES ) { txError = call RadioSend.send(txMsg); if( txError == SUCCESS ) state = STATE_TX_SEND; else state = STATE_TX_RETRY; } else { state = STATE_READY; done = TRUE; } call Tasklet.resume(); if( done ) signal Send.sendDone(txMsg, txError); } tasklet_async event void RadioSend.sendDone(error_t error) { RADIO_ASSERT( state == STATE_TX_SEND ); txError = error; if( error == SUCCESS ) state = STATE_TX_DONE; else state = STATE_TX_PENDING; post sendTask(); } command error_t Send.send(message_t* msg) { error_t result; call Tasklet.suspend(); if( state != STATE_READY ) result = EBUSY; else { txMsg = msg; state = STATE_TX_PENDING; retries = 0; post sendTask(); result = SUCCESS; } call Tasklet.resume(); return result; } tasklet_async event void RadioSend.ready() { if( state == STATE_TX_RETRY ) { state = STATE_TX_PENDING; post sendTask(); } } tasklet_async event void Tasklet.run() { } command error_t Send.cancel(message_t* msg) { error_t result; call Tasklet.suspend(); RADIO_ASSERT( msg == txMsg ); if( state == STATE_TX_PENDING || state == STATE_TX_RETRY ) { state = STATE_TX_DONE; txError = ECANCEL; result = SUCCESS; post sendTask(); } else result = EBUSY; call Tasklet.resume(); return result; } /*----------------- Receive -----------------*/ enum { RECEIVE_QUEUE_SIZE = 3, }; message_t receiveQueueData[RECEIVE_QUEUE_SIZE]; message_t* receiveQueue[RECEIVE_QUEUE_SIZE]; uint8_t receiveQueueHead; uint8_t receiveQueueSize; command error_t SoftwareInit.init() { uint8_t i; for(i = 0; i < RECEIVE_QUEUE_SIZE; ++i) receiveQueue[i] = receiveQueueData + i; return SUCCESS; } tasklet_async event bool RadioReceive.header(message_t* msg) { bool notFull; // this prevents undeliverable messages to be acknowledged atomic notFull = receiveQueueSize < RECEIVE_QUEUE_SIZE; return notFull; } task void deliverTask() { // get rid of as many messages as possible without interveining tasks for(;;) { message_t* msg; atomic { if( receiveQueueSize == 0 ) return; msg = receiveQueue[receiveQueueHead]; } msg = signal Receive.receive(msg); atomic { receiveQueue[receiveQueueHead] = msg; if( ++receiveQueueHead >= RECEIVE_QUEUE_SIZE ) receiveQueueHead = 0; --receiveQueueSize; } } } tasklet_async event message_t* RadioReceive.receive(message_t* msg) { message_t *m; atomic { if( receiveQueueSize >= RECEIVE_QUEUE_SIZE ) m = msg; else { uint8_t idx = receiveQueueHead + receiveQueueSize; if( idx >= RECEIVE_QUEUE_SIZE ) idx -= RECEIVE_QUEUE_SIZE; m = receiveQueue[idx]; receiveQueue[idx] = msg; ++receiveQueueSize; post deliverTask(); } } return m; } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/MetadataFlagsLayer.h000066400000000000000000000034651207233610700241630ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __METADATAFLAGSLAYER_H__ #define __METADATAFLAGSLAYER_H__ typedef struct flags_metadata_t { // TODO: make sure that we have no more than 8 flags uint8_t flags; } flags_metadata_t; #endif//__METADATAFLAGSLAYER_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/MetadataFlagsLayerC.nc000066400000000000000000000065141207233610700244350ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include generic module MetadataFlagsLayerC() { provides { interface PacketFlag[uint8_t bit]; interface RadioPacket; } uses { interface RadioPacket as SubPacket; } } implementation { flags_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } /*----------------- RadioPacket -----------------*/ async command bool PacketFlag.get[uint8_t bit](message_t* msg) { return getMeta(msg)->flags & (1<flags |= (1<flags &= ~(1<flags = 0; call SubPacket.clear(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/PacketLinkLayer.h000066400000000000000000000034201207233610700235020ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __PACKETLINKLAYER_H__ #define __PACKETLINKLAYER_H__ typedef struct link_metadata_t { uint16_t maxRetries; uint16_t retryDelay; } link_metadata_t; #endif//__PACKETLINKLAYER_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/PacketLinkLayerC.nc000066400000000000000000000104701207233610700237610ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Reliable Packet Link Functionality * @author David Moss * @author Jon Wyant * @author Miklos Maroti */ #include generic configuration PacketLinkLayerC() { provides { interface BareSend as Send; interface BareReceive as Receive; interface PacketLink; interface RadioPacket; } uses { interface BareSend as SubSend; interface BareReceive as SubReceive; interface RadioPacket as SubPacket; interface PacketAcknowledgements; } #ifndef PACKET_LINK uses interface PacketLink as UnconnectedPacketLink; provides interface PacketAcknowledgements as UnconnectedPacketAcks; #endif } implementation { #ifdef PACKET_LINK components new PacketLinkLayerP(), new TimerMilliC() as DelayTimerC; PacketLink = PacketLinkLayerP; Send = PacketLinkLayerP; SubSend = PacketLinkLayerP; PacketAcknowledgements = PacketLinkLayerP; RadioPacket = PacketLinkLayerP; SubPacket = PacketLinkLayerP; PacketLinkLayerP.DelayTimer -> DelayTimerC; Receive = SubReceive; #else Send = SubSend; Receive = SubReceive; RadioPacket = SubPacket; PacketLink = UnconnectedPacketLink; PacketAcknowledgements = UnconnectedPacketAcks; #endif } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/PacketLinkLayerP.nc000066400000000000000000000134271207233610700240030ustar00rootroot00000000000000/* * Copyright (c) 2010, University of Szeged * Copyright (c) 2010, Aarhus Universitet * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti, * Author: Morten Tranberg Hansen */ #include #include generic module PacketLinkLayerP() { provides { interface BareSend as Send; interface PacketLink; interface RadioPacket; } uses { interface BareSend as SubSend; interface PacketAcknowledgements; interface Timer as DelayTimer; interface RadioPacket as SubPacket; } } implementation { enum { STATE_READY = 0, STATE_SENDING = 1, STATE_SENDDONE = 2, STATE_SIGNAL = 4, // add error code }; uint8_t state = STATE_READY; message_t *currentMsg; uint16_t totalRetries; /** * We do everything from a single task in order to call SubSend.send * and Send.sendDone only once. This helps inlining the code and * reduces the code size. */ task void send() { uint16_t retries; RADIO_ASSERT( state != STATE_READY ); retries = call PacketLink.getRetries(currentMsg); if( state == STATE_SENDDONE ) { if( retries == 0 || call PacketAcknowledgements.wasAcked(currentMsg) ) state = STATE_SIGNAL + SUCCESS; else if( ++totalRetries < retries ) { uint16_t delay; state = STATE_SENDING; delay = call PacketLink.getRetryDelay(currentMsg); if( delay > 0 ) { call DelayTimer.startOneShot(delay); return; } } else state = STATE_SIGNAL + FAIL; } if( state == STATE_SENDING ) { state = STATE_SENDDONE; if( call SubSend.send(currentMsg) != SUCCESS ) post send(); return; } if( state >= STATE_SIGNAL ) { error_t error = state - STATE_SIGNAL; // do not update the retries count for non packet link messages if( retries > 0 ) call PacketLink.setRetries(currentMsg, totalRetries); state = STATE_READY; signal Send.sendDone(currentMsg, error); } } event void SubSend.sendDone(message_t* msg, error_t error) { RADIO_ASSERT( state == STATE_SENDDONE || state == STATE_SIGNAL + ECANCEL ); RADIO_ASSERT( msg == currentMsg ); if( error != SUCCESS ) state = STATE_SIGNAL + error; post send(); } event void DelayTimer.fired() { RADIO_ASSERT( state == STATE_SENDING ); post send(); } command error_t Send.send(message_t *msg) { if( state != STATE_READY ) return EBUSY; // it is enough to set it only once if( call PacketLink.getRetries(msg) > 0 ) call PacketAcknowledgements.requestAck(msg); currentMsg = msg; totalRetries = 0; state = STATE_SENDING; post send(); return SUCCESS; } command error_t Send.cancel(message_t *msg) { if( currentMsg != msg || state == STATE_READY ) return FAIL; // if a send is in progress if( state == STATE_SENDDONE ) call SubSend.cancel(msg); else post send(); call DelayTimer.stop(); state = STATE_SIGNAL + ECANCEL; return SUCCESS; } // ------- PacketLink link_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } command void PacketLink.setRetries(message_t *msg, uint16_t maxRetries) { getMeta(msg)->maxRetries = maxRetries; } command void PacketLink.setRetryDelay(message_t *msg, uint16_t retryDelay) { getMeta(msg)->retryDelay = retryDelay; } command uint16_t PacketLink.getRetries(message_t *msg) { return getMeta(msg)->maxRetries; } command uint16_t PacketLink.getRetryDelay(message_t *msg) { return getMeta(msg)->retryDelay; } command bool PacketLink.wasDelivered(message_t *msg) { return call PacketAcknowledgements.wasAcked(msg); } // ------- RadioPacket async command uint8_t RadioPacket.headerLength(message_t* msg) { return call SubPacket.headerLength(msg); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg); } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { call SubPacket.setPayloadLength(msg, length); } async command uint8_t RadioPacket.maxPayloadLength() { return call SubPacket.maxPayloadLength(); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call SubPacket.metadataLength(msg) + sizeof(link_metadata_t); } async command void RadioPacket.clear(message_t* msg) { getMeta(msg)->maxRetries = 0; call SubPacket.clear(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/RandomCollisionConfig.nc000077500000000000000000000043741207233610700250670ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface RandomCollisionConfig { /** * Returns the initial amount of maximum backoff for this message. */ async command uint16_t getInitialBackoff(message_t* msg); /** * Returns the amount of maximum backoff when there is congestion * (the channel was busy for the first try) */ async command uint16_t getCongestionBackoff(message_t* msg); /** * Returns the minimum ticks before the message could be sent. */ async command uint16_t getMinimumBackoff(); /** * The provided message was just received, and this command should return * the time till no transmission should be initiated. */ async command uint16_t getTransmitBarrier(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/RandomCollisionLayerC.nc000077500000000000000000000042551207233610700250370ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration RandomCollisionLayerC() { provides { interface RadioSend; interface RadioReceive; } uses { interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioAlarm; interface RandomCollisionConfig as Config; } } implementation { components new RandomCollisionLayerP(), RandomC; RadioSend = RandomCollisionLayerP; SubSend = RandomCollisionLayerP; Config = RandomCollisionLayerP; RadioReceive = RandomCollisionLayerP; SubReceive = RandomCollisionLayerP; RadioAlarm = RandomCollisionLayerP; RandomCollisionLayerP.Random -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/RandomCollisionLayerP.nc000077500000000000000000000110551207233610700250500ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include generic module RandomCollisionLayerP() { provides { interface RadioSend; interface RadioReceive; } uses { interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioAlarm; interface Random; interface RandomCollisionConfig as Config; } } implementation { tasklet_norace uint8_t state; enum { STATE_READY = 0, STATE_TX_PENDING_FIRST = 1, STATE_TX_PENDING_SECOND = 2, STATE_TX_SENDING = 3, STATE_BARRIER = 0x80, }; tasklet_norace message_t *txMsg; tasklet_norace uint16_t txBarrier; tasklet_async event void SubSend.ready() { if( state == STATE_READY && call RadioAlarm.isFree() ) signal RadioSend.ready(); } uint16_t nextRandom; task void calcNextRandom() { uint16_t a = call Random.rand16(); atomic nextRandom = a; } uint16_t getBackoff(uint16_t maxBackoff) { uint16_t a; atomic { a = nextRandom; nextRandom += 273; } post calcNextRandom(); return (a % maxBackoff) + call Config.getMinimumBackoff(); } tasklet_async command error_t RadioSend.send(message_t* msg) { if( state != STATE_READY || ! call RadioAlarm.isFree() ) return EBUSY; txMsg = msg; state = STATE_TX_PENDING_FIRST; call RadioAlarm.wait(getBackoff(call Config.getInitialBackoff(msg))); return SUCCESS; } tasklet_async event void RadioAlarm.fired() { error_t error; int16_t delay; RADIO_ASSERT( state != STATE_READY ); delay = (int16_t)txBarrier - call RadioAlarm.getNow(); if( state == STATE_BARRIER ) { state = STATE_READY; signal RadioSend.ready(); return; } else if( (state & STATE_BARRIER) && delay > 0 ) error = EBUSY; else error = call SubSend.send(txMsg); if( error != SUCCESS ) { if( (state & ~STATE_BARRIER) == STATE_TX_PENDING_FIRST ) { state = (state & STATE_BARRIER) | STATE_TX_PENDING_SECOND; call RadioAlarm.wait(getBackoff(call Config.getCongestionBackoff(txMsg))); } else { if( (state & STATE_BARRIER) && delay > 0 ) { state = STATE_BARRIER; call RadioAlarm.wait(delay); } else state = STATE_READY; signal RadioSend.sendDone(error); } } else state = STATE_TX_SENDING; } tasklet_async event void SubSend.sendDone(error_t error) { RADIO_ASSERT( state == STATE_TX_SENDING ); state = STATE_READY; signal RadioSend.sendDone(error); } tasklet_async event bool SubReceive.header(message_t* msg) { return signal RadioReceive.header(msg); } tasklet_async event message_t* SubReceive.receive(message_t* msg) { int16_t delay; txBarrier = call Config.getTransmitBarrier(msg); delay = txBarrier - call RadioAlarm.getNow(); if( delay > 0 ) { if( state == STATE_READY ) { // disregard the barrier for now, this needs a better solution if( call RadioAlarm.isFree() ) { call RadioAlarm.wait(delay); state = STATE_BARRIER; } } else state |= STATE_BARRIER; } return signal RadioReceive.receive(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/SlottedCollisionConfig.nc000077500000000000000000000051121207233610700252540ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface SlottedCollisionConfig { /** * This command should return the approximate transmit delay between * setting an alarm, waiting for the fire event, calling send and * obtaining the timestamp for the transmitted message. */ async command uint16_t getInitialDelay(); /** * Must return a binary exponent so that the collision avoidance layer * can assign slots in the range of [0, 1 << exponent) of size collision * window. */ async command uint8_t getScheduleExponent(); /** * This command must return the time when the message was transmitted. */ async command uint16_t getTransmitTime(message_t* msg); /** * Returns the start of the collision window for this received message, * so transmit times in this range would be considered possible collisions. */ async command uint16_t getCollisionWindowStart(message_t* msg); /** * Returns the size of the collision window for this received message. */ async command uint16_t getCollisionWindowLength(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/SlottedCollisionLayerC.nc000066400000000000000000000045141207233610700252300ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration SlottedCollisionLayerC() { provides { interface RadioSend; interface RadioReceive; } uses { interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioAlarm; interface SlottedCollisionConfig as Config; } } implementation { components new SlottedCollisionLayerP(), MainC, RandomC; RadioSend = SlottedCollisionLayerP; RadioReceive = SlottedCollisionLayerP; SubSend = SlottedCollisionLayerP; SubReceive = SlottedCollisionLayerP; Config = SlottedCollisionLayerP; RadioAlarm = SlottedCollisionLayerP; SlottedCollisionLayerP.Random -> RandomC; MainC.SoftwareInit -> SlottedCollisionLayerP; #ifdef RADIO_DEBUG components DiagMsgC; SlottedCollisionLayerP.DiagMsg -> DiagMsgC; #endif } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/SlottedCollisionLayerP.nc000066400000000000000000000154411207233610700252460ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include generic module SlottedCollisionLayerP() { provides { interface RadioSend; interface RadioReceive; interface Init; } uses { interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioAlarm; interface Random; interface SlottedCollisionConfig as Config; #ifdef RADIO_DEBUG interface DiagMsg; #endif } } implementation { /* ----- random ----- */ uint16_t nextRandom; task void calcNextRandom() { uint16_t a = call Random.rand16(); atomic nextRandom = a; } uint16_t getNextRandom() { uint16_t a; atomic { a = nextRandom; nextRandom += 273; } post calcNextRandom(); return a; } /* ----- schedule selection ----- */ void printStats(); tasklet_async event bool SubReceive.header(message_t* msg) { return signal RadioReceive.header(msg); } // WARNING!!! Do not change these values, the error values can overflow enum { ERROR_DECAY = 3, ERROR_SWITCH = 30, // should be a multiple of (1 << decay) ERROR_COLLISION = 20, // must be less than (255 - switch) >> decay ERROR_BUSY = 1, // must be less than collision ERROR_INITIAL = 80, // must be less than giveup ERROR_GIVEUP = 120, // must be less than collision * (1 << decay) ERROR_REPRESS = 40, // must be more than switch ERROR_MAX = 255, }; /** * Returns TRUE if time is between start and start + window * modulo the schedule size of (1 << exponent) */ inline bool isBetween(uint8_t exponent, uint16_t time, uint16_t start, uint16_t length) { return (uint16_t)((time - start) & ((1 << exponent) - 1)) < length; } tasklet_norace uint16_t schedule1; tasklet_norace uint16_t schedule2; tasklet_norace uint8_t error1; tasklet_norace uint8_t error2; tasklet_async event message_t* SubReceive.receive(message_t* msg) { uint8_t exponent = call Config.getScheduleExponent(); uint16_t start = call Config.getCollisionWindowStart(msg); uint16_t length = call Config.getCollisionWindowLength(msg); error1 -= (error1 + (1<> ERROR_DECAY; if( isBetween(exponent, schedule1, start, length) ) error1 += ERROR_COLLISION; error2 -= (error1 + (1<> ERROR_DECAY; if( isBetween(exponent, schedule2, start, length) ) error2 += ERROR_COLLISION; if( error2 + ERROR_SWITCH <= error1 ) { error1 = error2; schedule1 = schedule2; error2 = ERROR_GIVEUP; } if( error2 >= ERROR_GIVEUP ) { error2 = ERROR_INITIAL; schedule2 = getNextRandom(); } printStats(); return signal RadioReceive.receive(msg); } /* ------ transmit ------ */ tasklet_norace uint8_t state; enum { STATE_READY = 0, STATE_PENDING = 1, STATE_SENDING = 2, }; enum { DELAY_DECAY = 2 }; tasklet_norace message_t *txMsg; tasklet_norace uint16_t txDelay; // the averaged delay between schedule and timestamp tasklet_norace uint16_t txTime; // the schedule time of transmission tasklet_async event void SubSend.ready() { if( state == STATE_READY && call RadioAlarm.isFree() ) signal RadioSend.ready(); } tasklet_async command error_t RadioSend.send(message_t* msg) { uint16_t backoff; uint16_t time; // TODO: we could supress transmission while error is large if( state != STATE_READY || ! call RadioAlarm.isFree() || error1 >= ERROR_REPRESS ) return EBUSY; txMsg = msg; state = STATE_PENDING; time = call RadioAlarm.getNow(); backoff = 1 + ((schedule1 - time - (txDelay >> DELAY_DECAY)) & ((1 << call Config.getScheduleExponent()) - 1)); backoff += getNextRandom() & (3 << call Config.getScheduleExponent()); call RadioAlarm.wait(backoff); txTime = time + backoff; printStats(); return SUCCESS; } tasklet_async event void RadioAlarm.fired() { error_t error; RADIO_ASSERT( state == STATE_PENDING ); error = call SubSend.send(txMsg); if( error == SUCCESS ) state = STATE_SENDING; else { if( error2 + ERROR_SWITCH <= error1 ) { error1 = error2; schedule1 = schedule2; error2 = ERROR_INITIAL; schedule2 = getNextRandom(); } else if( error1 < ERROR_MAX - ERROR_BUSY ) error1 = error1 + ERROR_BUSY; state = STATE_READY; signal RadioSend.sendDone(error); } } tasklet_async event void SubSend.sendDone(error_t error) { RADIO_ASSERT( state == STATE_SENDING ); if( error == SUCCESS ) { txDelay += (call Config.getTransmitTime(txMsg) - txTime) - (txDelay >> DELAY_DECAY); RADIO_ASSERT( (txDelay >> DELAY_DECAY) < (1 << call Config.getScheduleExponent()) ); } state = STATE_READY; signal RadioSend.sendDone(error); } /* ------ init ------ */ command error_t Init.init() { // do not use Random here because it might not be initialized schedule1 = (uint16_t)(TOS_NODE_ID * 1973); schedule2 = schedule1 + 0117; txDelay = call Config.getInitialDelay() << DELAY_DECAY; return SUCCESS; } #ifdef RADIO_DEBUG tasklet_norace uint8_t count; void printStats() { if( ++count > 50 && call DiagMsg.record() ) { count = 0; call DiagMsg.str("slotted"); call DiagMsg.uint16(txDelay >> DELAY_DECAY); call DiagMsg.uint16(schedule1); call DiagMsg.uint8(error1); call DiagMsg.uint16(schedule2); call DiagMsg.uint8(error2); call DiagMsg.send(); } } #else void printStats() { } #endif } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/SoftwareAckConfig.nc000077500000000000000000000062411207233610700241770ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include interface SoftwareAckConfig { /** * Returns the acknowledgement timeout (in the radio clock units), * in which a sent packet must be acknowledged. */ async command uint16_t getAckTimeout(); /** * Sets the flag in the message indicating to the receiver whether * the message should be acknowledged. */ async command void setAckRequired(message_t* msg, bool ack); /** * Returns TRUE if the layer should wait for a software acknowledgement * to be received after this packet was transmitted. */ async command bool requiresAckWait(message_t* msg); /** * Returns TRUE if the received packet is an acknowledgement packet. * The AckedSend layer will filter out all received acknowledgement * packets and uses only the matching one for the acknowledgement. */ async command bool isAckPacket(message_t* msg); /** * Returns TRUE if the acknowledgement packet corresponds to the * data packet. The acknowledgement packect was already verified * to be a valid acknowledgement packet via the isAckPacket command. */ async command bool verifyAckPacket(message_t* data, message_t* ack); /** * Returns TRUE if the received packet needs software acknowledgements * to be sent back to the sender. */ async command bool requiresAckReply(message_t* msg); /** * Creates an acknowledgement packet for the given data packet. */ async command void createAckPacket(message_t* data, message_t* ack); /** * This command is called when a sent packet did not receive an * acknowledgement. */ tasklet_async command void reportChannelError(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/SoftwareAckLayerC.nc000066400000000000000000000116261207233610700241510ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include generic module SoftwareAckLayerC() { provides { interface RadioSend; interface RadioReceive; interface PacketAcknowledgements; } uses { interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioAlarm; interface SoftwareAckConfig as Config; interface PacketFlag as AckReceivedFlag; } } implementation { tasklet_norace uint8_t state; enum { STATE_READY = 0, STATE_DATA_SEND = 1, STATE_ACK_WAIT = 2, STATE_ACK_SEND = 3, }; tasklet_norace message_t *txMsg; tasklet_norace message_t ackMsg; tasklet_async event void SubSend.ready() { if( state == STATE_READY ) signal RadioSend.ready(); } tasklet_async command error_t RadioSend.send(message_t* msg) { error_t error; if( state == STATE_READY ) { if( (error = call SubSend.send(msg)) == SUCCESS ) { call AckReceivedFlag.clear(msg); state = STATE_DATA_SEND; txMsg = msg; } } else error = EBUSY; return error; } tasklet_async event void SubSend.sendDone(error_t error) { if( state == STATE_ACK_SEND ) { // TODO: what if error != SUCCESS RADIO_ASSERT( error == SUCCESS ); state = STATE_READY; } else { RADIO_ASSERT( state == STATE_DATA_SEND ); RADIO_ASSERT( call RadioAlarm.isFree() ); if( error == SUCCESS && call Config.requiresAckWait(txMsg) && call RadioAlarm.isFree() ) { call RadioAlarm.wait(call Config.getAckTimeout()); state = STATE_ACK_WAIT; } else { state = STATE_READY; signal RadioSend.sendDone(error); } } } tasklet_async event void RadioAlarm.fired() { RADIO_ASSERT( state == STATE_ACK_WAIT ); call Config.reportChannelError(); state = STATE_READY; signal RadioSend.sendDone(SUCCESS); // we have sent it, but not acked } tasklet_async event bool SubReceive.header(message_t* msg) { // drop unexpected ACKs if( call Config.isAckPacket(msg) ) return state == STATE_ACK_WAIT; // drop packets that need ACKs while waiting for our ACK // if( state == STATE_ACK_WAIT && call Config.requiresAckWait(msg) ) // return FALSE; return signal RadioReceive.header(msg); } tasklet_async event message_t* SubReceive.receive(message_t* msg) { RADIO_ASSERT( state == STATE_ACK_WAIT || state == STATE_READY ); if( call Config.isAckPacket(msg) ) { if( state == STATE_ACK_WAIT && call Config.verifyAckPacket(txMsg, msg) ) { call RadioAlarm.cancel(); call AckReceivedFlag.set(txMsg); state = STATE_READY; signal RadioSend.sendDone(SUCCESS); } return msg; } if( state == STATE_READY && call Config.requiresAckReply(msg) ) { call Config.createAckPacket(msg, &ackMsg); // TODO: what to do if we are busy and cannot send an ack if( call SubSend.send(&ackMsg) == SUCCESS ) state = STATE_ACK_SEND; else RADIO_ASSERT(FALSE); } return signal RadioReceive.receive(msg); } /*----------------- PacketAcknowledgements -----------------*/ async command error_t PacketAcknowledgements.requestAck(message_t* msg) { call Config.setAckRequired(msg, TRUE); return SUCCESS; } async command error_t PacketAcknowledgements.noAck(message_t* msg) { call Config.setAckRequired(msg, FALSE); return SUCCESS; } async command bool PacketAcknowledgements.wasAcked(message_t* msg) { return call AckReceivedFlag.get(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TimeConverterLayerC.nc000066400000000000000000000117701207233610700245260ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ // Shift is positive, if TOther has less precision (is slower) than TRadio generic module TimeConverterLayerC(typedef TOther, int8_t shift) { provides { interface TimeSyncAMSend as TimeSyncAMSendOther[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketOther; interface PacketTimeStamp as PacketTimeStampOther; } uses { interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface PacketTimeStamp as PacketTimeStampRadio; interface LocalTime as LocalTimeRadio; interface LocalTime as LocalTimeOther; } } implementation { // Converts TRadio time to TOther time uint32_t convertRadioToOther(uint32_t radioTime) { uint32_t localTimeRadio, localTimeOther; int32_t elapsedTime; atomic { localTimeRadio = call LocalTimeRadio.get(); localTimeOther = call LocalTimeOther.get(); } elapsedTime = radioTime - localTimeRadio; if( shift > 0 ) elapsedTime >>= shift; else if( shift < 0 ) elapsedTime <<= -shift; return elapsedTime + localTimeOther; } // Converts TOther time to TRadio time uint32_t convertOtherToRadio(uint32_t otherTime) { uint32_t localTimeRadio, localTimeOther; int32_t elapsedTime; atomic { localTimeRadio = call LocalTimeRadio.get(); localTimeOther = call LocalTimeOther.get(); } elapsedTime = otherTime - localTimeOther; if( shift > 0 ) elapsedTime <<= shift; else if( shift < 0 ) elapsedTime >>= -shift; return elapsedTime + localTimeRadio; } /*----------------- PacketTimeStampOther -----------------*/ async command bool PacketTimeStampOther.isValid(message_t* msg) { return call PacketTimeStampRadio.isValid(msg); } async command uint32_t PacketTimeStampOther.timestamp(message_t* msg) { return convertRadioToOther(call PacketTimeStampRadio.timestamp(msg)); } async command void PacketTimeStampOther.clear(message_t* msg) { call PacketTimeStampRadio.clear(msg); } async command void PacketTimeStampOther.set(message_t* msg, uint32_t value) { call PacketTimeStampRadio.set(msg, convertOtherToRadio(value)); } /*----------------- TimeSyncAMSendOther -----------------*/ command error_t TimeSyncAMSendOther.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t eventTime) { return call TimeSyncAMSendRadio.send[id](addr, msg, len, convertOtherToRadio(eventTime)); } event void TimeSyncAMSendRadio.sendDone[am_id_t id](message_t* msg, error_t error) { signal TimeSyncAMSendOther.sendDone[id](msg, error); } command error_t TimeSyncAMSendOther.cancel[am_id_t id](message_t* msg) { return call TimeSyncAMSendRadio.cancel[id](msg); } default event void TimeSyncAMSendOther.sendDone[am_id_t id](message_t* msg, error_t error) { } command uint8_t TimeSyncAMSendOther.maxPayloadLength[am_id_t id]() { return call TimeSyncAMSendRadio.maxPayloadLength[id](); } command void* TimeSyncAMSendOther.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call TimeSyncAMSendRadio.getPayload[id](msg, len); } /*----------------- TimeSyncPacketOther -----------------*/ command bool TimeSyncPacketOther.isValid(message_t* msg) { return call TimeSyncPacketRadio.isValid(msg); } command uint32_t TimeSyncPacketOther.eventTime(message_t* msg) { return convertRadioToOther(call TimeSyncPacketRadio.eventTime(msg)); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TimeStampingLayer.h000066400000000000000000000034111207233610700240560ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __TIMESTAMPINGLAYER_H__ #define __TIMESTAMPINGLAYER_H__ typedef struct timestamp_metadata_t { uint32_t timestamp; } timestamp_metadata_t; #endif//__TIMESTAMPINGLAYER_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TimeStampingLayerC.nc000066400000000000000000000045611207233610700243410ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "RadioConfig.h" generic configuration TimeStampingLayerC() { provides { interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeStamp as PacketTimeStampRadio; interface RadioPacket; } uses { interface LocalTime as LocalTimeRadio; interface RadioPacket as SubPacket; interface PacketFlag as TimeStampFlag; } } implementation { components new TimeStampingLayerP(), LocalTimeMilliC; PacketTimeStampMilli = TimeStampingLayerP; PacketTimeStampRadio = TimeStampingLayerP; RadioPacket = TimeStampingLayerP.RadioPacket; SubPacket = TimeStampingLayerP.SubPacket; LocalTimeRadio = TimeStampingLayerP; TimeStampingLayerP.LocalTimeMilli -> LocalTimeMilliC; TimeStampFlag = TimeStampingLayerP.TimeStampFlag; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TimeStampingLayerP.nc000066400000000000000000000104141207233610700243500ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include generic module TimeStampingLayerP() { provides { interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeStamp as PacketTimeStampRadio; interface RadioPacket; } uses { interface PacketFlag as TimeStampFlag; interface LocalTime as LocalTimeRadio; interface LocalTime as LocalTimeMilli; interface RadioPacket as SubPacket; } } implementation { timestamp_metadata_t* getMeta(message_t* msg) { return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg); } /*----------------- PacketTimeStampRadio -----------------*/ async command bool PacketTimeStampRadio.isValid(message_t* msg) { return call TimeStampFlag.get(msg); } async command uint32_t PacketTimeStampRadio.timestamp(message_t* msg) { return getMeta(msg)->timestamp; } async command void PacketTimeStampRadio.clear(message_t* msg) { call TimeStampFlag.clear(msg); } async command void PacketTimeStampRadio.set(message_t* msg, uint32_t value) { call TimeStampFlag.set(msg); getMeta(msg)->timestamp = value; } /*----------------- PacketTimeStampMilli -----------------*/ async command bool PacketTimeStampMilli.isValid(message_t* msg) { return call PacketTimeStampRadio.isValid(msg); } async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg) { int32_t offset = call PacketTimeStampRadio.timestamp(msg) - call LocalTimeRadio.get(); return (offset >> RADIO_ALARM_MILLI_EXP) + call LocalTimeMilli.get(); } async command void PacketTimeStampMilli.clear(message_t* msg) { call PacketTimeStampRadio.clear(msg); } async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value) { int32_t offset = (value - call LocalTimeMilli.get()) << RADIO_ALARM_MILLI_EXP; call PacketTimeStampRadio.set(msg, offset + call LocalTimeRadio.get()); } /*----------------- RadioPacket -----------------*/ async command uint8_t RadioPacket.headerLength(message_t* msg) { return call SubPacket.headerLength(msg); } async command uint8_t RadioPacket.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg); } async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length) { call SubPacket.setPayloadLength(msg, length); } async command uint8_t RadioPacket.maxPayloadLength() { return call SubPacket.maxPayloadLength(); } async command uint8_t RadioPacket.metadataLength(message_t* msg) { return call SubPacket.metadataLength(msg) + sizeof(timestamp_metadata_t); } async command void RadioPacket.clear(message_t* msg) { // all flags are automatically cleared call SubPacket.clear(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TimeSyncMessageLayer.h000066400000000000000000000041151207233610700245170ustar00rootroot00000000000000/* * Copyright (c) 2010, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __TIMESYNCMESSAGELAYER_H__ #define __TIMESYNCMESSAGELAYER_H__ #include #ifndef AM_TIMESYNCMSG #define AM_TIMESYNCMSG 0x3D #endif // this is sent over the air typedef nx_int32_t timesync_relative_t; // this is stored in memory typedef nx_uint32_t timesync_absolute_t; typedef nx_struct timesync_footer_t { nx_am_id_t type; nx_union timestamp_t { timesync_relative_t relative; timesync_absolute_t absolute; } timestamp; } timesync_footer_t; #endif//__TIMESYNCMESSAGELAYER_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TimeSyncMessageLayerC.nc000066400000000000000000000067541207233610700250060ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include #include #include generic configuration TimeSyncMessageLayerC() { provides { interface Receive[uint8_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Packet; interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } uses { interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface LocalTime as LocalTimeRadio; interface PacketField as PacketTimeSyncOffset; } } implementation { components new TimeSyncMessageLayerP(), LocalTimeMilliC; AMPacket = TimeSyncMessageLayerP; Packet = TimeSyncMessageLayerP; Receive = TimeSyncMessageLayerP.Receive; Snoop = TimeSyncMessageLayerP.Snoop; TimeSyncAMSendRadio = TimeSyncMessageLayerP; TimeSyncPacketRadio = TimeSyncMessageLayerP; TimeSyncAMSendMilli = TimeSyncMessageLayerP; TimeSyncPacketMilli = TimeSyncMessageLayerP; // Ok, we use the AMSenderC infrastructure to avoid concurrent send clashes components new AMSenderC(AM_TIMESYNCMSG); TimeSyncMessageLayerP.SubAMSend -> AMSenderC; TimeSyncMessageLayerP.SubAMPacket -> AMSenderC; TimeSyncMessageLayerP.SubPacket -> AMSenderC; components ActiveMessageC; TimeSyncMessageLayerP.SubReceive -> ActiveMessageC.Receive[AM_TIMESYNCMSG]; TimeSyncMessageLayerP.SubSnoop -> ActiveMessageC.Snoop[AM_TIMESYNCMSG];; PacketTimeStampRadio = TimeSyncMessageLayerP; PacketTimeStampMilli = TimeSyncMessageLayerP; TimeSyncMessageLayerP.LocalTimeMilli -> LocalTimeMilliC; LocalTimeRadio = TimeSyncMessageLayerP; PacketTimeSyncOffset = TimeSyncMessageLayerP; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TimeSyncMessageLayerP.nc000066400000000000000000000206041207233610700250110ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include generic module TimeSyncMessageLayerP() { provides { interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Packet; interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface TimeSyncPacket as TimeSyncPacketMilli; } uses { interface AMSend as SubAMSend; interface Receive as SubReceive; interface Receive as SubSnoop; interface AMPacket as SubAMPacket; interface Packet as SubPacket; interface PacketTimeStamp as PacketTimeStampRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface LocalTime as LocalTimeRadio; interface LocalTime as LocalTimeMilli; interface PacketField as PacketTimeSyncOffset; } } implementation { inline timesync_footer_t* getFooter(message_t* msg) { // we use the payload length that we export (the smaller one) return (timesync_footer_t*)(msg->data + call Packet.payloadLength(msg)); } /*----------------- Packet -----------------*/ command void Packet.clear(message_t* msg) { call SubPacket.clear(msg); } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { call SubPacket.setPayloadLength(msg, len + sizeof(timesync_footer_t)); } command uint8_t Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - sizeof(timesync_footer_t); } command uint8_t Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength() - sizeof(timesync_footer_t); } command void* Packet.getPayload(message_t* msg, uint8_t len) { return call SubPacket.getPayload(msg, len + sizeof(timesync_footer_t)); } /*----------------- AMPacket -----------------*/ inline command am_addr_t AMPacket.address() { return call SubAMPacket.address(); } inline command am_group_t AMPacket.localGroup() { return call SubAMPacket.localGroup(); } inline command bool AMPacket.isForMe(message_t* msg) { return call SubAMPacket.isForMe(msg) && call SubAMPacket.type(msg) == AM_TIMESYNCMSG; } inline command am_addr_t AMPacket.destination(message_t* msg) { return call SubAMPacket.destination(msg); } inline command void AMPacket.setDestination(message_t* msg, am_addr_t addr) { call SubAMPacket.setDestination(msg, addr); } inline command am_addr_t AMPacket.source(message_t* msg) { return call SubAMPacket.source(msg); } inline command void AMPacket.setSource(message_t* msg, am_addr_t addr) { call SubAMPacket.setSource(msg, addr); } inline command am_id_t AMPacket.type(message_t* msg) { return getFooter(msg)->type; } inline command void AMPacket.setType(message_t* msg, am_id_t type) { getFooter(msg)->type = type; } inline command am_group_t AMPacket.group(message_t* msg) { return call SubAMPacket.group(msg); } inline command void AMPacket.setGroup(message_t* msg, am_group_t grp) { call SubAMPacket.setGroup(msg, grp); } /*----------------- TimeSyncAMSendRadio -----------------*/ command error_t TimeSyncAMSendRadio.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time) { timesync_footer_t* footer = (timesync_footer_t*)(msg->data + len); footer->type = id; footer->timestamp.absolute = event_time; call PacketTimeSyncOffset.set(msg, offsetof(message_t, data) + len + offsetof(timesync_footer_t, timestamp.absolute)); return call SubAMSend.send(addr, msg, len + sizeof(timesync_footer_t)); } command error_t TimeSyncAMSendRadio.cancel[am_id_t id](message_t* msg) { return call SubAMSend.cancel(msg); } default event void TimeSyncAMSendRadio.sendDone[am_id_t id](message_t* msg, error_t error) { } command uint8_t TimeSyncAMSendRadio.maxPayloadLength[am_id_t id]() { return call SubAMSend.maxPayloadLength() - sizeof(timesync_footer_t); } command void* TimeSyncAMSendRadio.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call SubAMSend.getPayload(msg, len + sizeof(timesync_footer_t)); } /*----------------- TimeSyncAMSendMilli -----------------*/ command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time) { // compute elapsed time in millisecond event_time = ((int32_t)(event_time - call LocalTimeMilli.get()) << RADIO_ALARM_MILLI_EXP) + call LocalTimeRadio.get(); return call TimeSyncAMSendRadio.send[id](addr, msg, len, event_time); } command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg) { return call TimeSyncAMSendRadio.cancel[id](msg); } default event void TimeSyncAMSendMilli.sendDone[am_id_t id](message_t* msg, error_t error) { } command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]() { return call TimeSyncAMSendRadio.maxPayloadLength[id](); } command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call TimeSyncAMSendRadio.getPayload[id](msg, len); } /*----------------- SubSend.sendDone -------------------*/ event void SubAMSend.sendDone(message_t* msg, error_t error) { am_id_t id = call AMPacket.type(msg); signal TimeSyncAMSendRadio.sendDone[id](msg, error); signal TimeSyncAMSendMilli.sendDone[id](msg, error); } /*----------------- SubReceive and SubSnoop -------------------*/ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { am_id_t id = call AMPacket.type(msg); return signal Receive.receive[id](msg, payload, len - sizeof(timesync_footer_t)); } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } event message_t* SubSnoop.receive(message_t* msg, void* payload, uint8_t len) { am_id_t id = call AMPacket.type(msg); return signal Snoop.receive[id](msg, payload, len - sizeof(timesync_footer_t)); } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } /*----------------- TimeSyncPacketRadio -----------------*/ command bool TimeSyncPacketRadio.isValid(message_t* msg) { return call PacketTimeStampRadio.isValid(msg) && getFooter(msg)->timestamp.relative != 0x80000000L; } command uint32_t TimeSyncPacketRadio.eventTime(message_t* msg) { return getFooter(msg)->timestamp.relative + call PacketTimeStampRadio.timestamp(msg); } /*----------------- TimeSyncPacketMilli -----------------*/ command bool TimeSyncPacketMilli.isValid(message_t* msg) { return call PacketTimeStampMilli.isValid(msg) && getFooter(msg)->timestamp.relative != 0x80000000L; } command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg) { return ((int32_t)(getFooter(msg)->timestamp.relative) >> RADIO_ALARM_MILLI_EXP) + call PacketTimeStampMilli.timestamp(msg); } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TinyosNetworkLayer.h000066400000000000000000000035321207233610700243200ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __TINYOSNETWORKLAYER_H__ #define __TINYOSNETWORKLAYER_H__ #ifndef TINYOS_6LOWPAN_NETWORK_ID #define TINYOS_6LOWPAN_NETWORK_ID 0x3f #endif typedef nx_struct network_header_t { nxle_uint8_t network; } network_header_t; #endif//__TINYOSNETWORKLAYER_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TinyosNetworkLayerC.nc000066400000000000000000000136461207233610700246030ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include /* If TFRAMES_ENABLED is defined, then only TinyOS frames will be supported (with no network byte). If IEEE154FRAMES_ENABLED, then only IEEE 802.15.4 frames will be supported (the network byte is part of the payload). If neither is defined, then both TinyOS frames and IEEE 802.15.4 frames will be supported where TinyOS frames are the ones whose network byte is TINYOS_6LOWPAN_NETWORK_ID. */ #if defined(TFRAMES_ENABLED) && defined(IEEE154FRAMES_ENABLED) #error You cannot specify both TFRAMES_ENABLED and IEEE154FRAMES_ENABLED at the same time #endif generic module TinyosNetworkLayerC() { provides { #ifndef TFRAMES_ENABLED interface BareSend as Ieee154Send; interface BareReceive as Ieee154Receive; interface RadioPacket as Ieee154Packet; #endif #ifndef IEEE154FRAMES_ENABLED interface BareSend as TinyosSend; interface BareReceive as TinyosReceive; interface RadioPacket as TinyosPacket; #endif } uses { interface BareSend as SubSend; interface BareReceive as SubReceive; interface RadioPacket as SubPacket; } } implementation { /*----------------- Ieee154MessageC -----------------*/ #ifndef TFRAMES_ENABLED command error_t Ieee154Send.send(message_t* msg) { return call SubSend.send(msg); } command error_t Ieee154Send.cancel(message_t* msg) { return call SubSend.cancel(msg); } async command uint8_t Ieee154Packet.headerLength(message_t* msg) { return call SubPacket.headerLength(msg); } async command uint8_t Ieee154Packet.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg); } async command void Ieee154Packet.setPayloadLength(message_t* msg, uint8_t length) { call SubPacket.setPayloadLength(msg, length); } async command uint8_t Ieee154Packet.maxPayloadLength() { return call SubPacket.maxPayloadLength(); } async command uint8_t Ieee154Packet.metadataLength(message_t* msg) { return call SubPacket.metadataLength(msg); } async command void Ieee154Packet.clear(message_t* msg) { call SubPacket.clear(msg); } #endif /*----------------- ActiveMessageC -----------------*/ #ifndef IEEE154FRAMES_ENABLED network_header_t* getHeader(message_t* msg) { return ((void*)msg) + call SubPacket.headerLength(msg); } command error_t TinyosSend.send(message_t* msg) { #ifndef TFRAMES_ENABLED getHeader(msg)->network = TINYOS_6LOWPAN_NETWORK_ID; #endif return call SubSend.send(msg); } command error_t TinyosSend.cancel(message_t* msg) { return call SubSend.cancel(msg); } enum { #ifndef TFRAMES_ENABLED PAYLOAD_OFFSET = sizeof(network_header_t), #else PAYLOAD_OFFSET = 0, #endif }; async command uint8_t TinyosPacket.headerLength(message_t* msg) { return call SubPacket.headerLength(msg) + PAYLOAD_OFFSET; } async command uint8_t TinyosPacket.payloadLength(message_t* msg) { return call SubPacket.payloadLength(msg) - PAYLOAD_OFFSET; } async command void TinyosPacket.setPayloadLength(message_t* msg, uint8_t length) { call SubPacket.setPayloadLength(msg, length + PAYLOAD_OFFSET); } async command uint8_t TinyosPacket.maxPayloadLength() { return call SubPacket.maxPayloadLength() - PAYLOAD_OFFSET; } async command uint8_t TinyosPacket.metadataLength(message_t* msg) { return call SubPacket.metadataLength(msg); } async command void TinyosPacket.clear(message_t* msg) { call SubPacket.clear(msg); } #endif /*----------------- Events -----------------*/ #if defined(TFRAMES_ENABLED) event void SubSend.sendDone(message_t* msg, error_t result) { signal TinyosSend.sendDone(msg, result); } event message_t* SubReceive.receive(message_t* msg) { return signal TinyosReceive.receive(msg); } #elif defined(IEEE154FRAMES_ENABLED) event void SubSend.sendDone(message_t* msg, error_t result) { signal Ieee154Send.sendDone(msg, result); } event message_t* SubReceive.receive(message_t* msg) { return signal Ieee154Receive.receive(msg); } #else event void SubSend.sendDone(message_t* msg, error_t result) { if( getHeader(msg)->network == TINYOS_6LOWPAN_NETWORK_ID ) signal TinyosSend.sendDone(msg, result); else signal Ieee154Send.sendDone(msg, result); } event message_t* SubReceive.receive(message_t* msg) { if( getHeader(msg)->network == TINYOS_6LOWPAN_NETWORK_ID ) return signal TinyosReceive.receive(msg); else return signal Ieee154Receive.receive(msg); } #endif } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TrafficMonitor.nc000066400000000000000000000056551207233610700235730ustar00rootroot00000000000000/* * Copyright (c) 2011, University of Szeged * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface TrafficMonitor { /** * Returns the number of times the radio driver was started. */ async command uint32_t getStartCount(); /** * Returns the current time (same as LocalTime.get) */ async command uint32_t getCurrentTime(); /** * Returns the total number of milliseconds the radio driver * was operating (between start() and stopDone()). */ async command uint32_t getActiveTime(); /** * Returns the number of messages the radio driver has * transmitted (those for which send() returned with SUCCESS, * even though sendDone() might have returned with an error). */ async command uint32_t getTxMessages(); /** * Returns the number of messages the radio driver has * received. */ async command uint32_t getRxMessages(); /** * Returns the sum of the lengths of all transmitted * messages (those for which send() returned with SUCCESS, * even though sendDone() might have returned with an error). * This count includes all preamble, STD and CRC bytes. */ async command uint32_t getTxBytes(); /** * Returns the sum of the lengths of all received * messages. This count includes all preamble, STD * and CRC bytes. */ async command uint32_t getRxBytes(); /** * Returns the number of times send() or sendDone() * returned with an error. */ async command uint32_t getTxErrors(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TrafficMonitorConfig.nc000077500000000000000000000033441207233610700247150ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface TrafficMonitorConfig { /** * Returns the number of bytes in this message. */ async command uint16_t getBytes(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TrafficMonitorLayerC.nc000066400000000000000000000050111207233610700246550ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration TrafficMonitorLayerC() { provides { interface RadioSend; interface RadioReceive; interface RadioState; interface TrafficMonitor; } uses { interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioState as SubState; interface TrafficMonitorConfig as Config; } } implementation { components new TrafficMonitorLayerP(), LocalTimeMilliC; RadioSend = TrafficMonitorLayerP; RadioReceive = TrafficMonitorLayerP; RadioState = TrafficMonitorLayerP; TrafficMonitor = TrafficMonitorLayerP; SubSend = TrafficMonitorLayerP; SubReceive = TrafficMonitorLayerP; SubState = TrafficMonitorLayerP; Config = TrafficMonitorLayerP; TrafficMonitorLayerP.LocalTime -> LocalTimeMilliC; #ifdef RADIO_DEBUG components DiagMsgC, new TimerMilliC(), MainC; TrafficMonitorLayerP.DiagMsg -> DiagMsgC; TrafficMonitorLayerP.Timer -> TimerMilliC; TrafficMonitorLayerP.Boot -> MainC; #endif } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/TrafficMonitorLayerP.nc000066400000000000000000000140061207233610700246760ustar00rootroot00000000000000/* * Copyright (c) 2007-2011, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Tasklet.h" generic module TrafficMonitorLayerP() { provides { interface RadioSend; interface RadioReceive; interface RadioState; interface TrafficMonitor; } uses { interface TrafficMonitorConfig; interface RadioSend as SubSend; interface RadioReceive as SubReceive; interface RadioState as SubState; interface LocalTime; #ifdef RADIO_DEBUG interface Boot; interface Timer as Timer; interface DiagMsg; #endif } } implementation { // ------- Send tasklet_async event void SubSend.ready() { signal RadioSend.ready(); } uint32_t txMessages; uint32_t txBytes; uint32_t txErrors; tasklet_async command error_t RadioSend.send(message_t* msg) { error_t error; error = call SubSend.send(msg); if( error == SUCCESS ) { uint16_t bytes = call TrafficMonitorConfig.getBytes(msg); atomic { txMessages += 1; txBytes += bytes; } } else atomic txErrors += 1; return error; } tasklet_async event void SubSend.sendDone(error_t error) { if( error != SUCCESS ) atomic txErrors += 1; signal RadioSend.sendDone(error); } async command uint32_t TrafficMonitor.getTxMessages() { atomic return txMessages; } async command uint32_t TrafficMonitor.getTxBytes() { atomic return txBytes; } async command uint32_t TrafficMonitor.getTxErrors() { atomic return txErrors; } // ------- Receive uint32_t rxMessages; uint32_t rxBytes; tasklet_async event bool SubReceive.header(message_t* msg) { return signal RadioReceive.header(msg); } tasklet_async event message_t* SubReceive.receive(message_t* msg) { uint16_t bytes = call TrafficMonitorConfig.getBytes(msg); atomic { rxMessages += 1; rxBytes += bytes; } return signal RadioReceive.receive(msg); } async command uint32_t TrafficMonitor.getRxMessages() { atomic return rxMessages; } async command uint32_t TrafficMonitor.getRxBytes() { atomic return rxBytes; } // ------- Start/Stop enum { RADIO_OFF = 0, RADIO_ON = 1, RADIO_ON_2_OFF = 2, }; uint8_t radioState; uint32_t radioStart; uint32_t activeTime; uint32_t startCount; tasklet_async command error_t RadioState.turnOn() { uint32_t localTime = call LocalTime.get(); error_t error = call SubState.turnOn(); atomic { if( radioState == RADIO_OFF && error == SUCCESS ) { radioStart = localTime; radioState = RADIO_ON; startCount++; } } return error; } tasklet_async command error_t RadioState.turnOff() { error_t error = call SubState.turnOff(); atomic { if( radioState == RADIO_ON && error == SUCCESS ) radioState = RADIO_ON_2_OFF; } return error; } tasklet_async command error_t RadioState.standby() { error_t error = call SubState.standby(); atomic { if( radioState == RADIO_ON && error == SUCCESS ) radioState = RADIO_ON_2_OFF; } return error; } tasklet_async event void SubState.done() { uint32_t localTime = call LocalTime.get(); atomic { if( radioState == RADIO_ON_2_OFF ) { activeTime += localTime - radioStart; radioState = RADIO_OFF; } } signal RadioState.done(); } tasklet_async command error_t RadioState.setChannel(uint8_t channel) { return call SubState.setChannel(channel); } tasklet_async command uint8_t RadioState.getChannel() { return call SubState.getChannel(); } async command uint32_t TrafficMonitor.getStartCount() { atomic return startCount; } async command uint32_t TrafficMonitor.getActiveTime() { uint32_t atime, localTime; localTime = call LocalTime.get(); atomic { atime = activeTime; if( radioState != RADIO_OFF ) atime += localTime - radioStart; } return atime; } async command uint32_t TrafficMonitor.getCurrentTime() { return call LocalTime.get(); } // ------- Debug #ifdef RADIO_DEBUG event void Boot.booted() { // print out statistics every second call Timer.startPeriodic(1024); } event void Timer.fired() { if( call DiagMsg.record() ) { call DiagMsg.str("rfx"); call DiagMsg.uint16(call TrafficMonitor.getStartCount()); call DiagMsg.uint32(call TrafficMonitor.getActiveTime()); call DiagMsg.uint16(call TrafficMonitor.getTxMessages()); call DiagMsg.uint16(call TrafficMonitor.getRxMessages()); call DiagMsg.uint16(call TrafficMonitor.getTxBytes()); call DiagMsg.uint16(call TrafficMonitor.getRxBytes()); call DiagMsg.uint16(call TrafficMonitor.getTxErrors()); call DiagMsg.send(); } } #endif } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/UniqueConfig.nc000077500000000000000000000042321207233610700232320ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include interface UniqueConfig { /** * Returns the sequence number of the packet. */ async command uint8_t getSequenceNumber(message_t* msg); /** * Returns the sender of the packet. */ async command am_addr_t getSender(message_t* msg); /** * Sets the sequence number of the packet. */ async command void setSequenceNumber(message_t*msg, uint8_t number); /** * This command is called when the unqiue layer detects a missing (jump * in the data sequence number) or a duplicate packet. */ tasklet_async command void reportChannelError(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/UniqueLayerC.nc000077500000000000000000000043641207233610700232120ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration UniqueLayerC() { provides { // NOTE, this is a combined layer, should be hooked up at two places interface BareSend as Send; interface RadioReceive; } uses { interface BareSend as SubSend; interface RadioReceive as SubReceive; interface UniqueConfig as Config; } } implementation { components new UniqueLayerP(), MainC, NeighborhoodC, new NeighborhoodFlagC(); MainC.SoftwareInit -> UniqueLayerP; UniqueLayerP.Neighborhood -> NeighborhoodC; UniqueLayerP.NeighborhoodFlag -> NeighborhoodFlagC; Send = UniqueLayerP; SubSend = UniqueLayerP; RadioReceive = UniqueLayerP; SubReceive = UniqueLayerP; Config = UniqueLayerP; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/layers/UniqueLayerP.nc000077500000000000000000000062311207233610700232220ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include generic module UniqueLayerP() { provides { interface BareSend as Send; interface RadioReceive; interface Init; } uses { interface BareSend as SubSend; interface RadioReceive as SubReceive; interface UniqueConfig; interface Neighborhood; interface NeighborhoodFlag; } } implementation { uint8_t sequenceNumber; command error_t Init.init() { sequenceNumber = TOS_NODE_ID << 4; return SUCCESS; } command error_t Send.send(message_t* msg) { call UniqueConfig.setSequenceNumber(msg, ++sequenceNumber); return call SubSend.send(msg); } command error_t Send.cancel(message_t* msg) { return call SubSend.cancel(msg); } event void SubSend.sendDone(message_t* msg, error_t error) { signal Send.sendDone(msg, error); } tasklet_async event bool SubReceive.header(message_t* msg) { // we could scan here, but better be lazy return signal RadioReceive.header(msg); } tasklet_norace uint8_t receivedNumbers[NEIGHBORHOOD_SIZE]; tasklet_async event message_t* SubReceive.receive(message_t* msg) { uint8_t idx = call Neighborhood.insertNode(call UniqueConfig.getSender(msg)); uint8_t dsn = call UniqueConfig.getSequenceNumber(msg); if( call NeighborhoodFlag.get(idx) ) { uint8_t diff = dsn - receivedNumbers[idx]; if( diff == 0 ) { call UniqueConfig.reportChannelError(); return msg; } } else call NeighborhoodFlag.set(idx); receivedNumbers[idx] = dsn; return signal RadioReceive.receive(msg); } tasklet_async event void Neighborhood.evicted(uint8_t idx) { } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/000077500000000000000000000000001207233610700177665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/BareReceive.nc000066400000000000000000000035311207233610700224660ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface BareReceive { /** * Signals the reception of a message, but only for those messages for * which SUCCESS was returned in the header event. The usual owner rules * apply to the message pointers. */ event message_t* receive(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/BareSend.nc000066400000000000000000000055561207233610700220060ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface BareSend { /** * Starts the transmission of the given message. This command must not * be called while another send is in progress (so one must wait for the * sendDone event). Returns EBUSY if a reception is in progress or for * some other reason the request cannot be temporarily satisfied (e.g. * the SPI bus access could not be acquired). In this case the send * command could be retried from a task. Returns SUCCESS if the * transmission could be started. In this case sendDone will be fired. */ command error_t send(message_t* msg); /** * Signals the completion of the send command, exactly once for each * successfull send command. If the returned error code is SUCCESS, then * the message was sent (may not have been acknowledged), otherwise * the message was not transmitted over the air. */ event void sendDone(message_t* msg, error_t error); /** * Cancel a requested transmission. Returns SUCCESS if the * transmission was cancelled properly (not sent in its * entirety). Note that the component may not know * if the send was successfully cancelled, if the radio is * handling much of the logic; in this case, a component * should be conservative and return an appropriate error code. */ command error_t cancel(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/Neighborhood.h000077500000000000000000000033441207233610700225550ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __NEIGHBORHOOD_H__ #define __NEIGHBORHOOD_H__ #ifndef NEIGHBORHOOD_SIZE #define NEIGHBORHOOD_SIZE 5 #endif #endif//__NEIGHBORHOOD_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/Neighborhood.nc000066400000000000000000000064771207233610700227350ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include /** * Every component maintains its own neighborhood data. The Neighboorhood * component maintains only the nodeids and ages of the neighbors, and * evicts old entries from the table when necessary. */ interface Neighborhood { /** * Returns the index of the neighbor in the table. If the node was not * found in the table, then the value NEIGHBORHOOD is returned, * otherwise an index in the range [0, NEIGHBORHOOD-1] is returned. */ tasklet_async command uint8_t getIndex(am_addr_t id); /** * Returns the age of the given entry. The age is incremented by one * every time a new node is inserted into the neighborhood table that * is not already at the very end. If the age would get too large to * fit into a byte, then it is periodically reset to a smaller value. */ tasklet_async command uint8_t getAge(uint8_t idx); /** * Returns the node address for the given entry. */ tasklet_async command am_addr_t getNode(uint8_t idx); /** * Adds a new node into the neighborhood table. If this node was already * in the table, then it is just brought to the front (its age is reset * to zero). If the node was not in the table, then the oldest is evicted * and its entry is replaced with this node. The index of the entry * is returned in the range [0, NEIGHBORHOOD-1]. */ tasklet_async command uint8_t insertNode(am_addr_t id); /** * This event is fired when the oldest entry is replaced with a new * node. The same interface is used by many users, so all of them * will receive this event and can clear the corresponding entry. * After this event is fired, all flags for this entry are cleared * (see the NeighborhoodFlag interface) */ tasklet_async event void evicted(uint8_t idx); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/NeighborhoodC.nc000077500000000000000000000034221207233610700230260ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration NeighborhoodC { provides interface Neighborhood; } implementation { components NeighborhoodP, MainC; Neighborhood = NeighborhoodP; MainC.SoftwareInit -> NeighborhoodP; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/NeighborhoodFlag.nc000077500000000000000000000043641207233610700235230ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include /** * This interface provides one bit storage for each neighbor in a very * fast and conveint way (without using shifts for example). */ interface NeighborhoodFlag { /** * Returns the value of the flag for the given index */ tasklet_async command bool get(uint8_t idx); /** * Sets the flag for the given index */ tasklet_async command void set(uint8_t idx); /** * Clears the flag for the given index. The flag is automatically * cleared after the Neighborhood.evicted event is fired. */ tasklet_async command void clear(uint8_t idx); /** * Clears the flag for all indices */ tasklet_async command void clearAll(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/NeighborhoodFlagC.nc000077500000000000000000000035511207233610700236230ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ generic configuration NeighborhoodFlagC() { provides interface NeighborhoodFlag; } implementation { components NeighborhoodP; // TODO: make sure that no more than 8 flags are used at a time NeighborhoodFlag = NeighborhoodP.NeighborhoodFlag[unique("NeighborhoodFlag")]; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/NeighborhoodP.nc000077500000000000000000000100351207233610700230410ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include module NeighborhoodP { provides { interface Init; interface Neighborhood; interface NeighborhoodFlag[uint8_t bit]; } } implementation { tasklet_norace am_addr_t nodes[NEIGHBORHOOD_SIZE]; tasklet_norace uint8_t ages[NEIGHBORHOOD_SIZE]; tasklet_norace uint8_t flags[NEIGHBORHOOD_SIZE]; tasklet_norace uint8_t time; tasklet_norace uint8_t last; command error_t Init.init() { uint8_t i; for(i = 0; i < NEIGHBORHOOD_SIZE; ++i) nodes[i] = AM_BROADCAST_ADDR; return SUCCESS; } inline tasklet_async command am_addr_t Neighborhood.getNode(uint8_t idx) { return nodes[idx]; } inline tasklet_async command uint8_t Neighborhood.getAge(uint8_t idx) { return time - ages[idx]; } tasklet_async uint8_t command Neighborhood.getIndex(am_addr_t node) { uint8_t i; if( nodes[last] == node ) return last; for(i = 0; i < NEIGHBORHOOD_SIZE; ++i) { if( nodes[i] == node ) { last = i; break; } } return i; } tasklet_async uint8_t command Neighborhood.insertNode(am_addr_t node) { uint8_t i; uint8_t maxAge; if( nodes[last] == node ) { if( ages[last] == time ) return last; ages[last] = ++time; maxAge = 0x80; } else { uint8_t oldest = 0; maxAge = 0; for(i = 0; i < NEIGHBORHOOD_SIZE; ++i) { uint8_t age; if( nodes[i] == node ) { last = i; if( ages[i] == time ) return i; ages[i] = ++time; maxAge = 0x80; break; } age = time - ages[i]; if( age > maxAge ) { maxAge = age; oldest = i; } } if( i == NEIGHBORHOOD_SIZE ) { signal Neighborhood.evicted(oldest); last = oldest; nodes[oldest] = node; ages[oldest] = ++time; flags[oldest] = 0; } } if( (time & 0x7F) == 0x7F && maxAge >= 0x7F ) { for(i = 0; i < NEIGHBORHOOD_SIZE; ++i) { if( (ages[i] | 0x7F) != time ) ages[i] = time & 0x80; } } return last; } inline tasklet_async command bool NeighborhoodFlag.get[uint8_t bit](uint8_t idx) { return flags[idx] & (1 << bit); } inline tasklet_async command void NeighborhoodFlag.set[uint8_t bit](uint8_t idx) { flags[idx] |= (1 << bit); } inline tasklet_async command void NeighborhoodFlag.clear[uint8_t bit](uint8_t idx) { flags[idx] &= ~(1 << bit); } tasklet_async command void NeighborhoodFlag.clearAll[uint8_t bit]() { uint8_t i; bit = ~(1 << bit); for(i = 0; i < NEIGHBORHOOD_SIZE; ++i) flags[i] &= bit; } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/PacketField.nc000066400000000000000000000042141207233610700224640ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface PacketField { /** * Returns TRUE if the value is set for this message. */ async command bool isSet(message_t* msg); /** * Returns the stored value of this field in the message. If the * value is not set, then the returned value is undefined. */ async command value_type get(message_t* msg); /** * Clears the isSet flag. */ async command void clear(message_t* msg); /** * Sets the isSet false to TRUE and the time stamp value to the * specified value. */ async command void set(message_t* msg, value_type value); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/PacketFlag.nc000066400000000000000000000040201207233610700223050ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface PacketFlag { /** * Returns if the flag is set for this message. */ async command bool get(message_t* msg); /** * Sets the flag in this message to the specified value. */ async command void setValue(message_t* msg, bool value); /** * Sets the flag in this message to TRUE */ async command void set(message_t* msg); /** * Sets the flag in this message to FALSE */ async command void clear(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioAlarm.nc000077500000000000000000000046051207233610700223330ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include "RadioConfig.h" interface RadioAlarm { /** * Returns TRUE if the alarm is free and ready to be used. Once the alarm * is free, it cannot become nonfree in the same tasklet block. Note, * if the alarm is currently set (even if for ourselves) then it is not free. */ tasklet_async command bool isFree(); /** * Waits till the specified timeout period expires. The alarm must be free. */ tasklet_async command void wait(tradio_size timeout); /** * Cancels the running alarm. The alarm must be pending. */ tasklet_async command void cancel(); /** * This event is fired when the specified timeout period expires. */ tasklet_async event void fired(); /** * Returns the current time as measured by the radio stack. */ async command tradio_size getNow(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioAlarmC.nc000066400000000000000000000036551207233610700224370ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "RadioConfig.h" generic configuration RadioAlarmC() { provides { interface RadioAlarm[uint8_t id]; // use unique } uses { interface Alarm @exactlyonce(); } } implementation { components new RadioAlarmP(), TaskletC; RadioAlarm = RadioAlarmP; Alarm = RadioAlarmP; RadioAlarmP.Tasklet -> TaskletC; } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioAlarmP.nc000066400000000000000000000055631207233610700224540ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include #include "RadioConfig.h" generic module RadioAlarmP() { provides { interface RadioAlarm[uint8_t id]; } uses { interface Alarm; interface Tasklet; } } implementation { norace uint8_t state; enum { STATE_READY = 0, STATE_WAIT = 1, STATE_FIRED = 2, }; tasklet_norace uint8_t alarm; async event void Alarm.fired() { atomic { if( state == STATE_WAIT ) state = STATE_FIRED; } call Tasklet.schedule(); } inline async command tradio_size RadioAlarm.getNow[uint8_t id]() { return call Alarm.getNow(); } tasklet_async event void Tasklet.run() { if( state == STATE_FIRED ) { state = STATE_READY; signal RadioAlarm.fired[alarm](); } } default tasklet_async event void RadioAlarm.fired[uint8_t id]() { } inline tasklet_async command bool RadioAlarm.isFree[uint8_t id]() { return state == STATE_READY; } tasklet_async command void RadioAlarm.wait[uint8_t id](tradio_size timeout) { RADIO_ASSERT( state == STATE_READY ); alarm = id; state = STATE_WAIT; call Alarm.start(timeout); } tasklet_async command void RadioAlarm.cancel[uint8_t id]() { RADIO_ASSERT( alarm == id ); RADIO_ASSERT( state != STATE_READY ); call Alarm.stop(); state = STATE_READY; } } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioAssert.h000066400000000000000000000035511207233610700223630ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __RADIOASSERT_H__ #define __RADIOASSERT_H__ #ifdef RADIO_DEBUG void assert(bool condition, const char* file, uint16_t line); #define RADIO_ASSERT(COND) assert(COND, __FILE__, __LINE__) #else #define RADIO_ASSERT(COND) for(;0;) #endif #endif//__RADIOASSERT_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioCCA.nc000077500000000000000000000043111207233610700216570ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include interface RadioCCA { /** * Starts the clear channel assesment procedure. Returns EBUSY if the radio * is currently servicing a clear channel assesment, and SUCCESS otherwise. * The check will be performed only in the RX_READY state. */ tasklet_async command error_t request(); /** * Signals the completion of the clear channel assesment send command. * SUCCESS means the channel is clear, EBUSY means the channel is not * clear, and FAIL means that the clear channel assesment could not * be finished or the operation was cancelled. */ tasklet_async event void done(error_t error); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioChannel.nc000066400000000000000000000041641207233610700226440ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface RadioChannel { /** * Sets the current channel. Returns EBUSY if the stack is unable * to change the channel this time (some other operation is in progress), * EALREADY if the selected channel is already set, SUCCESS otherwise. */ command error_t setChannel(uint8_t channel); /** * This event is signaled exactly once for each sucessfully posted state * setChannel command when it is completed. */ event void setChannelDone(); /** * Returns the currently selected channel. */ command uint8_t getChannel(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioPacket.nc000066400000000000000000000051111207233610700224740ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ interface RadioPacket { /** * This command returns the length of the header. The header * starts at the first byte of the message_t structure * (some layers may add dummy bytes to allign the payload to * the msg->data section). */ async command uint8_t headerLength(message_t* msg); /** * Returns the length of the payload. The payload starts right * after the header. */ async command uint8_t payloadLength(message_t* msg); /** * Sets the length of the payload. */ async command void setPayloadLength(message_t* msg, uint8_t length); /** * Returns the maximum length that can be set for this message. */ async command uint8_t maxPayloadLength(); /** * Returns the length of the metadata section. The metadata section * is at the very end of the message_t structure and grows downwards. */ async command uint8_t metadataLength(message_t* msg); /** * Clears all metadata and sets all default values in the headers. */ async command void clear(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioReceive.nc000077500000000000000000000044431207233610700226610ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include interface RadioReceive { /** * This event is fired when the header is received/downloaded and the * higher layers are consulted whether it needs to be downloaded and * further processed. Return FALSE if the message should be discarded. * In particular, the message buffer layer returns FALSE if there is * no space for a new message, so this message will not get acknowledged. */ tasklet_async event bool header(message_t* msg); /** * Signals the reception of a message, but only for those messages for * which SUCCESS was returned in the header event. The usual owner rules * apply to the message pointers. */ tasklet_async event message_t* receive(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioSend.nc000077500000000000000000000054011207233610700221630ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include interface RadioSend { /** * Starts the transmission of the given message. This command must not * be called while another send is in progress (so one must wait for the * sendDone event). Returns EBUSY if a reception is in progress or for * some other reason the request cannot be temporarily satisfied (e.g. * the SPI bus access could not be acquired). In this case the send * command could be retried from a tasklet. Returns SUCCESS if the * transmission could be started. In this case sendDone will be fired. */ tasklet_async command error_t send(message_t* msg); /** * Signals the completion of the send command, exactly once for each * successfull send command. If the returned error code is SUCCESS, then * the message was sent (may not have been acknowledged), otherwise * the message was not transmitted over the air. */ tasklet_async event void sendDone(error_t error); /** * This event is fired when the component is most likely able to accept * a send request. If the send command has returned with a failure, then * this event will be called at least once in the near future. */ tasklet_async event void ready(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/RadioState.nc000066400000000000000000000053171207233610700223550ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include interface RadioState { /** * Moves to radio into sleep state with the lowest power consumption but * highest wakeup time. The radio cannot send or receive in this state * and releases all access to shared resources (e.g. SPI bus). */ tasklet_async command error_t turnOff(); /** * The same as the turnOff command, except it is not as deep sleep, and * it is quicker to recover from this state. */ tasklet_async command error_t standby(); /** * Goes into receive state. The radio continuously receive messages * and able to transmit. */ tasklet_async command error_t turnOn(); /** * Sets the current channel. Returns EBUSY if the stack is unable * to change the channel this time (some other operation is in progress) * SUCCESS otherwise. */ tasklet_async command error_t setChannel(uint8_t channel); /** * This event is signaled exactly once for each sucessfully posted state * transition and setChannel command when it is completed. */ tasklet_async event void done(); /** * Returns the currently selected channel. */ tasklet_async command uint8_t getChannel(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/Tasklet.h000066400000000000000000000034541207233610700215540ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __TASKLET_H__ #define __TASKLET_H__ #ifdef TASKLET_IS_TASK #define tasklet_async #define tasklet_norace #else #define tasklet_async async #define tasklet_norace norace #endif #endif//__TASKLET_H__ tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/Tasklet.nc000077500000000000000000000065341207233610700217320ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include /** * This interface is useful in building state machines when the state * transitions should be executed atomically but with interrupts enabled. * All state transitions should take place in the run event handler or * in blocks protected by the suspend and resume commands. */ interface Tasklet { /** * This method is executed atomically. */ tasklet_async event void run(); /** * Makes sure that the run event is called at least once more. If the * run event is currently not executing, then it is called immediately * and this command returns only after the completion of the run event. * If the run event is currently executed, then this method returns at * once, and makes sure that the run event is called once more when * it is finished. If this method is called from a task, then by the * above rules, the run event will be called from a task as well. */ async command void schedule(); /** * Enters a critical section of the code and meakes sure that the * run event is not called while in this section. No long running * computation should be called from the critical session, and * in particular no user event should be fired. This call is only * possible from task context, otherwise we cannot guarantee that * the run event is not currently running. The suspend calls * can be nested. It is very important that the same number of * resume commands must be called in all control paths, e.g. be very * careful with the return and break commands. */ command void suspend(); /** * Leaves the critical section. This call is conly possible from * task context. If there were scheduled executions of the run * event, then those will be called before this command returns. */ command void resume(); } tinyos-2.1.2+dfsg/tos/lib/rfxlink/util/TaskletC.nc000077500000000000000000000053221207233610700220270ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include #include module TaskletC { provides interface Tasklet; } implementation { #ifdef TASKLET_IS_TASK task void tasklet() { signal Tasklet.run(); } inline async command void Tasklet.schedule() { post tasklet(); } inline command void Tasklet.suspend() { } inline command void Tasklet.resume() { } #else /** * The lower 7 bits contain the number of suspends plus one if the run * event is currently beeing executed. The highest bit is set if the run * event needs to be called again when the suspend count goes down to zero. */ uint8_t state; void doit() { for(;;) { signal Tasklet.run(); atomic { if( state == 1 ) { state = 0; return; } RADIO_ASSERT( state == 0x81 ); state = 1; } } } inline command void Tasklet.suspend() { atomic ++state; } command void Tasklet.resume() { atomic { if( --state != 0x80 ) return; state = 1; } doit(); } async command void Tasklet.schedule() { atomic { if( state != 0 ) { state |= 0x80; return; } state = 1; } doit(); } #endif } tinyos-2.1.2+dfsg/tos/lib/safe/000077500000000000000000000000001207233610700162525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/safe/SafeFailureHandlerC.nc000066400000000000000000000003671207233610700223710ustar00rootroot00000000000000 #include "Timer.h" configuration SafeFailureHandlerC { } implementation { components LedsC; components SafeFailureHandlerP; components BusyWaitMicroC as Wait; SafeFailureHandlerP.Leds -> LedsC; SafeFailureHandlerP.BusyWait -> Wait; } tinyos-2.1.2+dfsg/tos/lib/safe/SafeFailureHandlerP.nc000066400000000000000000000045621207233610700224070ustar00rootroot00000000000000 #include "Timer.h" module SafeFailureHandlerP { uses { interface Leds; interface BusyWait; } } implementation { #ifndef asmlinkage #define asmlinkage #endif #ifndef noreturn #define noreturn __attribute__((noreturn)) #endif void delay (int len) { volatile int x; for (x=0; x> i)); i -= 2; } while (i >= 0); } void display_int_flid (const unsigned int x) { roll (); display_int (x); roll (); } asmlinkage noreturn void deputy_fail_noreturn_fast (int flid) @C() @spontaneous() { atomic { #if defined(__AVR_ARCH__) asm volatile ("break"); #endif while(1) { display_int_flid(flid); } } } asmlinkage void deputy_fail_mayreturn(int flid) @C() @spontaneous() { deputy_fail_noreturn_fast(flid); } asmlinkage noreturn void deputy_fail_noreturn(int flid) @C() @spontaneous() { deputy_fail_noreturn_fast(flid); } } tinyos-2.1.2+dfsg/tos/lib/safe/include/000077500000000000000000000000001207233610700176755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/safe/include/annots_stage1.h000066400000000000000000000017611207233610700226210ustar00rootroot00000000000000/* Keep TinyOS happy with pre 1.3.0 nesC's */ #ifndef ANNOTS_STAGE1_INCLUDED #define ANNOTS_STAGE1_INCLUDED // JDR temporary code: define away two obsolete annotations #define BOUND(x,y) #define SINGLE // JDR temporary code: define away NTS in unsafe mode #ifndef SAFE_TINYOS #ifndef NTS #define NTS #endif #endif #if NESC < 130 #define __DEPUTY_UNUSED__ __attribute__((unused)) #define NONNULL #define BND(x,y) #define BND_NOK(x,y) #define COUNT(x) #define COUNT_NOK(x) #define ONE #define ONE_NOK #define DMEMSET(x,y,z) #define DMEMCPY(x,y,z) #define TRUSTEDBLOCK #define NTS #define TCAST(__type,__expr) ((__type)(__expr)) #ifdef SAFE_TINYOS #warning Safe TinyOS requires nesC >= 1.3.0 #endif #ifdef NESC struct @safe { }; struct @unsafe { }; #endif #endif // NESC version check #endif tinyos-2.1.2+dfsg/tos/lib/safe/include/deputy/000077500000000000000000000000001207233610700212075ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/safe/include/deputy/checks.h000066400000000000000000000177131207233610700226310ustar00rootroot00000000000000// Runtime checks for Deputy programs. // This file is included in deputy_lib and also at the start of every // Deputy output file. Before this file is included you must define // DEPUTY_ALWAYS_STOP_ON_ERROR if you want to optimize the checks. // Note "volatile": We currently use volatile everywhere so that these // checks work on any kind of pointer. In the future, we may want to // investigate the performance impact of this annotation in the common // (non-volatile) case. // Use inline even when not optimizing for speed, since it prevents // warnings that would occur due to unused static functions. #ifdef DEPUTY_ALWAYS_STOP_ON_ERROR #define INLINE inline __attribute__((always_inline)) #else #define INLINE inline #endif #define __LOCATION__ 0 #define __LOCATION__FORMALS int flid #define __LOCATION__ACTUALS flid #ifndef asmlinkage #define asmlinkage #endif #ifndef noreturn #define noreturn __attribute__((noreturn)) #endif #if defined(__KERNEL__) && defined(DEPUTY_KERNEL_COVERAGE) INLINE static unsigned int read_pc() TRUSTED { unsigned int pc; asm("movl %%ebp, %0" : "=r"(pc)); return *((unsigned int *)pc + 1); } extern void checkBitArrayAdd(unsigned int addr); #endif extern asmlinkage void deputy_fail_mayreturn(__LOCATION__FORMALS); extern asmlinkage noreturn void deputy_fail_noreturn(__LOCATION__FORMALS); extern asmlinkage noreturn void deputy_fail_noreturn_fast(__LOCATION__FORMALS); /* Search for a NULL starting at e and return its index */ extern asmlinkage int deputy_findnull(const void *e1, unsigned int sz); #define __deputy_memset memset #if defined(DEPUTY_FAST_CHECKS) #define deputy_fail deputy_fail_noreturn_fast #elif defined(DEPUTY_ALWAYS_STOP_ON_ERROR) #define deputy_fail deputy_fail_noreturn #else #define deputy_fail deputy_fail_mayreturn #endif /* Check that there is no NULL between e .. e+len-1. "bytes" is the size of * an element */ INLINE static asmlinkage int deputy_nullcheck(const volatile void *e, unsigned int len, unsigned int bytes) { #define NULLCHECK(type) \ do { \ type *p1 = (type*) e; \ type *p2 = ((type*) e) + len; \ while (p1 < p2 && *p1 != 0) { \ p1++; \ } \ success = (p1 >= p2); \ } while (0) int success = 0; switch (bytes) { case 1: NULLCHECK(char); break; case 2: NULLCHECK(short); break; case 4: NULLCHECK(long); break; default: deputy_fail(__LOCATION__); } return success; #undef NULLCHECK } #if defined(__KERNEL__) && defined(KRECOVER) && !defined(NO_INJECTION) extern int kr_failure_injected(void); #define INJECTED_FAILURE() (kr_failure_injected()) #else #define INJECTED_FAILURE() 0 #endif // what : a boolean that ought to be true // checkName: the name of the check // checkWhat: a string that explains what goes wrong #if defined(__KERNEL__) && defined(DEPUTY_KERNEL_COVERAGE) #define DEPUTY_ASSERT_TEXT(what,text,checkName)\ checkBitArrayAdd(read_pc());\ if (!(what) || INJECTED_FAILURE()) { \ deputy_fail(__LOCATION__ACTUALS); \ } #define DEPUTY_ASSERT(what, checkName) \ checkBitArrayAdd(read_pc());\ DEPUTY_ASSERT_TEXT(what, text, checkName) #else #define DEPUTY_ASSERT_TEXT(what, text, checkName) \ if (!(what) || INJECTED_FAILURE()) { \ deputy_fail(__LOCATION__ACTUALS); \ } #define DEPUTY_ASSERT(what, checkName) \ DEPUTY_ASSERT_TEXT(what, text, checkName) #endif INLINE static void CNonNull(const volatile void* p, __LOCATION__FORMALS) { DEPUTY_ASSERT(p != 0, "non-null check"); } INLINE static void CEq(const volatile void* e1, const volatile void* e2, __LOCATION__FORMALS) { DEPUTY_ASSERT(e1 == e2, why); } INLINE static void CMult(int i1, int i2, __LOCATION__FORMALS) { DEPUTY_ASSERT((i2 % i1) == 0, "alignment check"); } /* Check that p + sz * e does not overflow that remains within [lo..hi). It * is guaranteed on input that lo <= p <= hi, with p and h aligned w.r.t. lo * and size sz. */ INLINE static void CPtrArith(const volatile void* lo, const volatile void* hi, const volatile void* p, int e, unsigned int sz, __LOCATION__FORMALS) { if (e >= 0) { DEPUTY_ASSERT_TEXT(e <= (hi - p) / sz, texthi, "upper bound check"); } else { DEPUTY_ASSERT_TEXT(-e <= (p - lo) / sz, textlo, "lower bound check"); } } INLINE static void CPtrArithNT(const volatile void* lo, const volatile void* hi, const volatile void* p, int e, unsigned int sz, __LOCATION__FORMALS) { if (e >= 0) { unsigned int len = (hi - p) / sz; if (e > len) { DEPUTY_ASSERT_TEXT(deputy_nullcheck(hi, e - len, sz), texthi, "nullterm upper bound check"); } } else { DEPUTY_ASSERT_TEXT(-e <= (p - lo) / sz, textlo, "lower bound check"); } } INLINE static void CPtrArithAccess(const volatile void* lo, const volatile void* hi, const volatile void* p, int e, unsigned int sz, __LOCATION__FORMALS) { if (e >= 0) { DEPUTY_ASSERT_TEXT(e + 1 <= (hi - p) / sz, texthi, "upper bound check"); } else { DEPUTY_ASSERT_TEXT(-e <= (p - lo) / sz, textlo, "lower bound check"); } } INLINE static void CLeqInt(unsigned int e1, unsigned int e2, __LOCATION__FORMALS) { DEPUTY_ASSERT(e1 <= e2, why); } INLINE static void CLeq(const volatile void* e1, const volatile void* e2, __LOCATION__FORMALS) { DEPUTY_ASSERT(e1 <= e2, why); } /* Used to set the upped bounds of an NT string to e1, when we know that e2 * is a safe upper bound. Test that e1 <= e2 OR there is no NULL between * e2...e1-1. */ INLINE static void CLeqNT(const volatile void* e1, const volatile void* e2, unsigned int sz, __LOCATION__FORMALS) { if (e1 > e2) { DEPUTY_ASSERT(deputy_nullcheck(e2, (e1 - e2) / sz, sz), why); } } INLINE static void CNullOrLeq(const volatile void* e, const volatile void* e1, const volatile void* e2, __LOCATION__FORMALS) { if (e) { DEPUTY_ASSERT(e1 <= e2, why); } } /* Check that e is NULL, or e1 <= e2, or there is no NULL from e2 to e1 */ INLINE static void CNullOrLeqNT(const volatile void* e, const volatile void* e1, const volatile void* e2, unsigned int sz, __LOCATION__FORMALS) { if (e && e1 > e2) { DEPUTY_ASSERT(deputy_nullcheck(e2, (e1 - e2) / sz, sz), why); } } INLINE static void CWriteNT(const volatile void* p, const volatile void* hi, int what, unsigned int sz, __LOCATION__FORMALS) { if (p == hi) { int isNull = 0; switch (sz) { case 1: isNull = (*((const volatile char *) p) == 0); break; case 2: isNull = (*((const volatile short *) p) == 0); break; case 4: isNull = (*((const volatile int *) p) == 0); break; } DEPUTY_ASSERT(!isNull || what == 0, "nullterm write check"); } } INLINE static void CNullUnionOrSelected(const volatile void* p, unsigned int size, int sameFieldSelected, __LOCATION__FORMALS) { if (!sameFieldSelected) { const volatile char* pp = (const volatile char*)p; const volatile char* pend = pp + size; while (pp < pend) { DEPUTY_ASSERT(0 == *pp++, "null union check"); } } } INLINE static void CSelected(int what, __LOCATION__FORMALS) { if (!(what)) { deputy_fail(__LOCATION__ACTUALS); } } INLINE static void CNotSelected(int what, __LOCATION__FORMALS) { if ((what)) { deputy_fail(__LOCATION__ACTUALS); } } #define deputy_max(x, y) ((x) > (y) ? (x) : (y)) #undef DEPUTY_ASSERT tinyos-2.1.2+dfsg/tos/lib/serial/000077500000000000000000000000001207233610700166135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/serial/HdlcTranslateC.nc000066400000000000000000000100451207233610700217700ustar00rootroot00000000000000//$Id: HdlcTranslateC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * Copyright (c) 2010 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is an implementation of HDLC serial encoding, supporting framing * through frame delimiter bytes and escape bytes. * * @author Philip Levis * @author Ben Greenstein * @date September 30 2010 * */ #include "Serial.h" module HdlcTranslateC { provides interface SerialFrameComm; uses { interface UartStream; interface Leds; } } implementation { typedef struct { uint8_t sendEscape:1; uint8_t receiveEscape:1; } HdlcState; //norace uint8_t debugCnt = 0; HdlcState state = {0,0}; uint8_t txTemp; uint8_t m_data; // TODO: add reset for when SerialM goes no-sync. async command void SerialFrameComm.resetReceive(){ state.receiveEscape = 0; } async command void SerialFrameComm.resetSend(){ state.sendEscape = 0; } async event void UartStream.receivedByte(uint8_t data) { //debugCnt++; // 7E 41 0E 05 04 03 02 01 00 01 8F 7E /* if (debugCnt == 1 && data == 0x7E) call Leds.led0On(); */ /* if (debugCnt == 2 && data == 0x41) call Leds.led1On(); */ /* if (debugCnt == 3 && data == 0x0E) call Leds.led2On(); */ if (data == HDLC_FLAG_BYTE) { //call Leds.led1On(); signal SerialFrameComm.delimiterReceived(); return; } else if (data == HDLC_CTLESC_BYTE) { //call Leds.led1On(); state.receiveEscape = 1; return; } else if (state.receiveEscape) { //call Leds.led1On(); state.receiveEscape = 0; data = data ^ 0x20; } signal SerialFrameComm.dataReceived(data); } async command error_t SerialFrameComm.putDelimiter() { atomic { state.sendEscape = 0; m_data = HDLC_FLAG_BYTE; } return call UartStream.send(&m_data, 1); } async command error_t SerialFrameComm.putData(uint8_t data) { if (data == HDLC_CTLESC_BYTE || data == HDLC_FLAG_BYTE) { state.sendEscape = 1; txTemp = data ^ 0x20; m_data = HDLC_CTLESC_BYTE; } else { m_data = data; } return call UartStream.send(&m_data, 1); } async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) { atomic { if (state.sendEscape) { state.sendEscape = 0; m_data = txTemp; call UartStream.send(&m_data, 1); } else { signal SerialFrameComm.putDone(); } } } async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ) {} } tinyos-2.1.2+dfsg/tos/lib/serial/README.txt000066400000000000000000000065211207233610700203150ustar00rootroot00000000000000The purpose of this UART stack is to allow arbitary packet formats to be encapsulated within a UART frame. The basic problem is that TinyOS needs to support two mote classes. The first are mote end points, which receive and process packets, possibly moving data between link layers. The second are mote bridges, which transparently forward data packets between media. The first class is simple: the UART can support its own active messages implementation, which is platform independent. An application that wants to send data to a mote generates a AM formatted for the UART and sends it to the mote over the serial connection. The UART implementation then provides standard 2.x accessors for the AM fields, such as destination. In this case, the UART is another packet format written into message_t. The second class is more difficult. The goal for this class is that you can communicate with a TinyOS network through data link layer packets, rather than at AM layer packets. So, for example, you can snoop on all of the 802.15.4 packets being sent and see all of the 802.15.4 specific headers. Or, you can send an 802.15.4 packet to a mote over a serial port and it will just forward it over the radio. This functionality allows a PC to directly interact with the network, which has been shown to be an important requirement, especially when monitoring or testing deployed networks. The problem is more difficult due to how message_t works. As all data link layers are justified on the data payload of the C structure, data link headers can start at offsets within the structure (as packets must be contiguous in memory). Therefore, to be able to read in an 802.15.4 packet over the serial port, the UART subsystem needs to know *where* in message_t the packet begins. Assuming what comes in over the serial port is correctly formatted, then if it knows the offset, the UART stack can just spool the bytes directly into the message_t at that offset. The send direction has a similar issue: the UART layer has to know where in the message_t the actual packet begins, and how long the entire packet is. Given that it might need to receive a wide range of packet formats encapsulated in a UART frame, the UART frame needs an identifier to dispatch on what type of data is within the frame. The basic case -- a platform independent AM packet -- is just one of these identifiers. This means that the UART provides a parameterized send and receive interface, where the parameter is the type of data encapsulated in the frame. The receive and send interfaces need to be able to map one of these identifiers to a message_t offset as well as calculate the packet length in terms of a data link layer (e.g., if the length only pertains to the data payload of the encapsulated packet, then the UART system needs to subtract the header and footer length from the frame length). The solution is that every encapsulated packet type has a component that implements the SerialPacketInfo interface, which provides three commands. offset(), which returns the offset at which a packet begins in the message_t dataLinkLen(), which returns the length of a data link packet given a data payload length upperLen(), which returns the length of a payload given a packet length The offset of a given data link packet in a message_t is known at compile time: there is no need to store it in RAM. Therefore, whe tinyos-2.1.2+dfsg/tos/lib/serial/ReceiveBytePacket.nc000066400000000000000000000071631207233610700225020ustar00rootroot00000000000000//$Id: ReceiveBytePacket.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the data interface that a serial protocol provides and * a serial dispatcher uses. The dispatcher expects the following pattern * of calls: ((startPacket)+ (byteReceived)* (endPacket)+)* * It should ignore any signals that do not follow this pattern. * The interface is used to separate the state machine of the wire protocol * from the complexities of dispatch. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ interface ReceiveBytePacket { /** * Signals the upper layer to indicate that reception of a frame has begun. * Used by the upper layer to prepare for packet reception. If the upper * layer does not want to receive a packet (or isn't ready) it may * return a non-SUCCESS code such as EBUSY to the lower layer to discard * the frame. The underlying layer may signal endPacket in response to * such a discard request. * @return Returns an error_t code indicating whether the * dispatcher would like to receive a packet (SUCCESS), or not * perhaps because it isn't ready (EBUSY). */ async event error_t startPacket(); /** * Signals the upper layer that a byte of the encapsulated packet has been * received. Passes this byte as a parameter to the function. * @param data A byte of the encapsulated packet that has been received. */ async event void byteReceived(uint8_t data); /** * Signalled to indicate that a packet encapsulated withing a serial * frame has been received. SUCCESS should be passed by the lower layer * following verification that the packet has been received correctly. * A value of error_t indicating an error should be passed when the lower * layer's verification test fails or when the lower layer loses sync. * @param result An error_t code indicating whether the framer has * passed all bytes of an encapsulated packet it receives from * serial to the dispatcher (SUCCESS) or not (FAIL). */ async event void endPacket(error_t result); } tinyos-2.1.2+dfsg/tos/lib/serial/SendBytePacket.nc000066400000000000000000000077251207233610700220150ustar00rootroot00000000000000//$Id: SendBytePacket.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is an interface that a serial framing protocol provides and a serial * dispatcher uses. The call sequence should be as follows: * The dispatcher should call startSend, specifying the first byte to * send. The framing protocol can then signal as many nextBytes as it * wants/needs, to spool in the bytes. It continues to do so until it receives * a sendComplete call, which will almost certainly happen within a nextByte * signal (i.e., re-entrant to the framing protocol). * This allows the framing protocol to buffer as many bytes as it needs to to meet * timing requirements, jitter, etc. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ interface SendBytePacket { /** * The dispatcher may initiate a serial transmission by calling this function * and passing the first byte to be transmitted. * @param first_byte The first byte to be transmitted. * @return Returns an error_t code indicating either that the framer * has the resources available to transmit the frame (SUCCESS) or * not (EBUSY). */ async command error_t startSend(uint8_t first_byte); /** * The dispatcher must indicate when the end-of-packet has been reached and does * so by calling completeSend. The function may be called from within the * implementation of a nextByte event. * @return Returns an error_t code indicating whether the framer accepts * this notification (SUCCESS) or not (FAIL). */ async command error_t completeSend(); /** * Used by the framer to request the next byte to transmit. The * framer may allocate a buffer to pre-spool some or all of a * packet; or it may request and transmit a byte at a time. If there * are no more bytes to send, the dispatcher must call completeSend * before returning from this function. * @return The dispatcher must return the next byte to transmit */ async event uint8_t nextByte(); /** * The framer signals sendCompleted to indicate that it is done transmitting a * packet on the dispatcher's behalf. A non-SUCCESS error_t code indicates that * there was a problem in transmission. * @param error The framer indicates whether it has successfully * accepted the entirety of the packet from the dispatcher (SUCCESS) * or not (FAIL). */ async event void sendCompleted(error_t error); } tinyos-2.1.2+dfsg/tos/lib/serial/Serial.h000066400000000000000000000114651207233610700202120ustar00rootroot00000000000000//$Id: Serial.h,v 1.8 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Phil Buonadonna * */ /** * @author Phil Buonadonna * @author Lewis Girod * @author Ben Greenstein * @author Philip Levis * @date August 7 2005 */ #ifndef SERIAL_H #define SERIAL_H #include "AM.h" typedef uint8_t uart_id_t; #define UQ_SERIALQUEUE_SEND "SerialQueueP.Send" enum { HDLC_FLAG_BYTE = 0x7e, HDLC_CTLESC_BYTE = 0x7d, }; // message_t type dispatch enum { TOS_SERIAL_ACTIVE_MESSAGE_ID = 0, TOS_SERIAL_CC1000_ID = 1, TOS_SERIAL_802_15_4_ID = 2, TOS_SERIAL_UNKNOWN_ID = 255, }; // Framer-level dispatch enum { SERIAL_PROTO_ACK = 67, SERIAL_PROTO_PACKET_ACK = 68, SERIAL_PROTO_PACKET_NOACK = 69, SERIAL_PROTO_PACKET_UNKNOWN = 255 }; typedef struct radio_stats { uint8_t version; uint8_t flags; uint8_t reserved; uint8_t platform; uint16_t MTU; uint16_t radio_crc_fail; uint16_t radio_queue_drops; uint16_t serial_crc_fail; uint16_t serial_tx_fail; uint16_t serial_short_packets; uint16_t serial_proto_drops; } radio_stats_t; typedef nx_struct serial_header { nx_am_addr_t dest; nx_am_addr_t src; nx_uint8_t length; nx_am_group_t group; nx_am_id_t type; } serial_header_t; typedef nx_struct serial_packet { serial_header_t header; nx_uint8_t data[]; } serial_packet_t; typedef nx_struct serial_metadata { nx_uint8_t ack; } serial_metadata_t; #endif tinyos-2.1.2+dfsg/tos/lib/serial/Serial802_15_4C.nc000066400000000000000000000046031207233610700214440ustar00rootroot00000000000000//$Id: Serial802_15_4C.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of communication 802.15.4 message_t packets over the * serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ #include "Serial.h" configuration Serial802_15_4C { provides { interface SplitControl; interface Send; interface Receive; } uses interface Leds; } implementation { components MainC, SerialPacketInfo802_15_4P, SerialDispatcherC; MainC.SoftwareInit -> SerialDispatcherC; SplitControl = SerialDispatcherC; Leds = SerialDispatcherC; Send = SerialDispatcherC.Send[TOS_SERIAL_802_15_4_ID]; Receive = SerialDispatcherC.Receive[TOS_SERIAL_802_15_4_ID]; SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_802_15_4_ID] -> SerialPacketInfo802_15_4P.Info; } tinyos-2.1.2+dfsg/tos/lib/serial/SerialAMQueueP.nc000066400000000000000000000042071207233610700217220ustar00rootroot00000000000000// $Id: SerialAMQueueP.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The fair-share AM send queue. * * @author Philip Levis * @date Jan 16 2006 */ #include "AM.h" #include "Serial.h" configuration SerialAMQueueP { provides interface Send[uint8_t client]; } implementation { enum { NUM_CLIENTS = uniqueCount(UQ_SERIALQUEUE_SEND) }; components new AMQueueImplP(NUM_CLIENTS), SerialActiveMessageC; Send = AMQueueImplP; AMQueueImplP.AMSend -> SerialActiveMessageC; AMQueueImplP.AMPacket -> SerialActiveMessageC; AMQueueImplP.Packet -> SerialActiveMessageC; } tinyos-2.1.2+dfsg/tos/lib/serial/SerialAMReceiverC.nc000066400000000000000000000040421207233610700223620ustar00rootroot00000000000000// $Id: SerialAMReceiverC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The virtualized AM reception abstraction. * * @author Philip Levis * @date Jan 16 2006 * @see TEP 116: Packet Protocols */ #include "AM.h" generic configuration SerialAMReceiverC(am_id_t amId) { provides { interface Receive; interface Packet; interface AMPacket; } } implementation { components SerialActiveMessageC as AM; Receive = AM.Receive[amId]; Packet = AM; AMPacket = AM; } tinyos-2.1.2+dfsg/tos/lib/serial/SerialAMSenderC.nc000066400000000000000000000050471207233610700220440ustar00rootroot00000000000000// $Id: SerialAMSenderC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The virtualized active message send abstraction. Each instantiation * of AMSenderC has its own queue of depth one. Therefore, it does not * have to contend with other AMSenderC instantiations for queue space. * The underlying implementation schedules the packets in these queues * using some form of fair-share queueing. * * @author Philip Levis * @date Jan 16 2006 * @see TEP 116: Packet Protocols */ #include "Serial.h" generic configuration SerialAMSenderC(am_id_t AMId) { provides { interface AMSend; interface Packet; interface AMPacket; interface PacketAcknowledgements as Acks; } } implementation { components new AMQueueEntryP(AMId) as AMQueueEntryP; components SerialAMQueueP, SerialActiveMessageC as AM; AMQueueEntryP.Send -> SerialAMQueueP.Send[unique(UQ_SERIALQUEUE_SEND)]; AMQueueEntryP.AMPacket -> AM; AMSend = AMQueueEntryP; Packet = AM; AMPacket = AM; Acks = AM; } tinyos-2.1.2+dfsg/tos/lib/serial/SerialActiveMessageC.nc000066400000000000000000000051741207233610700231270ustar00rootroot00000000000000//$Id: SerialActiveMessageC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sending active messages over the serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ #include "Serial.h" configuration SerialActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } uses interface Leds; } implementation { components new SerialActiveMessageP() as AM, SerialDispatcherC; components SerialPacketInfoActiveMessageP as Info, MainC; MainC.SoftwareInit -> SerialDispatcherC; Leds = SerialDispatcherC; SplitControl = SerialDispatcherC; AMSend = AM; Receive = AM; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID]; AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID]; SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info; } tinyos-2.1.2+dfsg/tos/lib/serial/SerialActiveMessageP.nc000066400000000000000000000137761207233610700231530ustar00rootroot00000000000000//$Id: SerialActiveMessageP.nc,v 1.11 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sending active messages over the serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ #include generic module SerialActiveMessageP () { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface AMPacket; interface Packet; interface PacketAcknowledgements; } uses { interface Send as SubSend; interface Receive as SubReceive; } } implementation { serial_header_t* ONE getHeader(message_t* ONE msg) { return TCAST(serial_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(serial_header_t)); } serial_metadata_t* getMetadata(message_t* msg) { return (serial_metadata_t*)(msg->metadata); } command error_t AMSend.send[am_id_t id](am_addr_t dest, message_t* msg, uint8_t len) { serial_header_t* header = getHeader(msg); if (len > call Packet.maxPayloadLength()) { return ESIZE; } header->dest = dest; // Do not set the source address or group, as doing so // prevents transparent bridging. Need a better long-term // solution for this. //header->src = call AMPacket.address(); //header->group = TOS_AM_GROUP; header->type = id; header->length = len; return call SubSend.send(msg, len); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } event void SubSend.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t result) { return; } default event message_t* Receive.receive[uint8_t id](message_t* msg, void* payload, uint8_t len) { return msg; } event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { return signal Receive.receive[call AMPacket.type(msg)](msg, msg->data, len); } command void Packet.clear(message_t* msg) { memset(getHeader(msg), 0, sizeof(serial_header_t)); return; } command uint8_t Packet.payloadLength(message_t* msg) { serial_header_t* header = getHeader(msg); return header->length; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { getHeader(msg)->length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command void* Packet.getPayload(message_t* msg, uint8_t len) { if (len > call Packet.maxPayloadLength()) { return NULL; } else { return (void * COUNT_NOK(len))msg->data; } } command am_addr_t AMPacket.address() { return 0; } command am_addr_t AMPacket.destination(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->dest; } command am_addr_t AMPacket.source(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->src; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { serial_header_t* header = getHeader(amsg); header->dest = addr; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { serial_header_t* header = getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return TRUE; } command am_id_t AMPacket.type(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t type) { serial_header_t* header = getHeader(amsg); header->type = type; } async command error_t PacketAcknowledgements.requestAck( message_t* msg ) { return FAIL; } async command error_t PacketAcknowledgements.noAck( message_t* msg ) { return SUCCESS; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { serial_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.group(message_t* msg) { serial_header_t* header = getHeader(msg); return header->group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } async command bool PacketAcknowledgements.wasAcked(message_t* msg) { return FALSE; } } tinyos-2.1.2+dfsg/tos/lib/serial/SerialByteComm.nc000066400000000000000000000046071207233610700220230ustar00rootroot00000000000000//$Id: SerialByteComm.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * A basic byte-level interface to a serial port. * * @author David Gay * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ interface SerialByteComm { /** * Put a single byte to the serial port. * @param data The byte to send to the serial port. * @return Returns an error_t code indicating whether this byte was * successfully put (SUCCESS) or not (FAIL). */ async command error_t put(uint8_t data); /** * Receive a single byte from the serial port. * @param data The byte that has been received from the serial port. */ async event void get(uint8_t data); /** * Split phase event to indicate that the last put request * has completed. */ async event void putDone(); } tinyos-2.1.2+dfsg/tos/lib/serial/SerialDispatcherC.nc000066400000000000000000000055131207233610700224720ustar00rootroot00000000000000//$Id: SerialDispatcherC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This component provides functionality to send many different kinds * of serial packets on top of a general packet sending component. It * achieves this by knowing where the different packets in a message_t * exist through the SerialPacketInfo interface. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ configuration SerialDispatcherC { provides { interface Init; interface SplitControl; interface Receive[uart_id_t]; interface Send[uart_id_t]; } uses { interface SerialPacketInfo[uart_id_t]; interface Leds; } } implementation { components SerialP, new SerialDispatcherP(), HdlcTranslateC, PlatformSerialC; Send = SerialDispatcherP; Receive = SerialDispatcherP; SerialPacketInfo = SerialDispatcherP.PacketInfo; SplitControl = SerialP; Init = SerialP; Leds = SerialP; Leds = SerialDispatcherP; Leds = HdlcTranslateC; SerialDispatcherP.ReceiveBytePacket -> SerialP; SerialDispatcherP.SendBytePacket -> SerialP; SerialP.SerialFrameComm -> HdlcTranslateC; SerialP.SerialControl -> PlatformSerialC; // SerialP.SerialFlush -> PlatformSerialC; HdlcTranslateC.UartStream -> PlatformSerialC; } tinyos-2.1.2+dfsg/tos/lib/serial/SerialDispatcherP.nc000066400000000000000000000263431207233610700225130ustar00rootroot00000000000000//$Id: SerialDispatcherP.nc,v 1.10 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This component provides functionality to send many different kinds * of serial packets on top of a general packet sending component. It * achieves this by knowing where the different packets in a message_t * exist through the SerialPacketInfo interface. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ #include "Serial.h" generic module SerialDispatcherP() { provides { interface Receive[uart_id_t id]; interface Send[uart_id_t id]; } uses { interface SerialPacketInfo as PacketInfo[uart_id_t id]; interface ReceiveBytePacket; interface SendBytePacket; interface Leds; } } implementation { typedef enum { SEND_STATE_IDLE = 0, SEND_STATE_BEGIN = 1, SEND_STATE_DATA = 2 } send_state_t; enum { RECV_STATE_IDLE = 0, RECV_STATE_BEGIN = 1, RECV_STATE_DATA = 2, }; typedef struct { uint8_t which:1; uint8_t bufZeroLocked:1; uint8_t bufOneLocked:1; uint8_t state:2; } recv_state_t; // We are not busy, the current buffer to use is zero, // neither buffer is locked, and we are idle recv_state_t receiveState = {0, 0, 0, RECV_STATE_IDLE}; uint8_t recvType = TOS_SERIAL_UNKNOWN_ID; uint8_t recvIndex = 0; /* This component provides double buffering. */ message_t messages[2]; // buffer allocation message_t* ONE messagePtrs[2] = { &messages[0], &messages[1]}; // We store a separate receiveBuffer variable because indexing // into a pointer array can be costly, and handling interrupts // is time critical. uint8_t* COUNT_NOK(sizeof(message_t)) receiveBuffer = (uint8_t* COUNT_NOK(sizeof(message_t)))(&messages[0]); uint8_t *COUNT_NOK(sizeof(message_t)) sendBuffer = NULL; send_state_t sendState = SEND_STATE_IDLE; uint8_t sendLen = 0; uint8_t sendIndex = 0; norace error_t sendError = SUCCESS; bool sendCancelled = FALSE; uint8_t sendId = 0; uint8_t receiveTaskPending = FALSE; uart_id_t receiveTaskType = 0; uint8_t receiveTaskWhich; message_t * ONE_NOK receiveTaskBuf = NULL; uint8_t receiveTaskSize = 0; command error_t Send.send[uint8_t id](message_t* msg, uint8_t len) { if (sendState != SEND_STATE_IDLE) { return EBUSY; } atomic { sendIndex = call PacketInfo.offset[id](); if (sendIndex > sizeof(message_header_t)) { return ESIZE; } sendError = SUCCESS; sendBuffer = (uint8_t*)msg; sendState = SEND_STATE_DATA; sendId = id; sendCancelled = FALSE; // If something we're starting past the header, something is wrong // Bug fix from John Regehr // sendLen is where in the buffer the packet stops. // This is the length of the packet, plus its start point sendLen = call PacketInfo.dataLinkLength[id](msg, len) + sendIndex; } if (call SendBytePacket.startSend(id) == SUCCESS) { return SUCCESS; } else { sendState = SEND_STATE_IDLE; return FAIL; } } command uint8_t Send.maxPayloadLength[uint8_t id]() { return (sizeof(message_t)); } command void* Send.getPayload[uint8_t id](message_t* m, uint8_t len) { if (len > sizeof(message_t)) { return NULL; } else { return m; } } task void signalSendDone(){ error_t error; sendState = SEND_STATE_IDLE; atomic error = sendError; if (sendCancelled) error = ECANCEL; signal Send.sendDone[sendId]((message_t *)sendBuffer, error); } command error_t Send.cancel[uint8_t id](message_t *msg){ if (sendState == SEND_STATE_DATA && sendBuffer == ((uint8_t *)msg) && id == sendId){ call SendBytePacket.completeSend(); sendCancelled = TRUE; return SUCCESS; } return FAIL; } async event uint8_t SendBytePacket.nextByte() { uint8_t b; uint8_t indx; atomic { b = sendBuffer[sendIndex]; sendIndex++; indx = sendIndex; } if (indx > sendLen) { call SendBytePacket.completeSend(); return 0; } else { return b; } } async event void SendBytePacket.sendCompleted(error_t error){ atomic sendError = error; post signalSendDone(); } bool isCurrentBufferLocked() { return (receiveState.which)? receiveState.bufOneLocked : receiveState.bufZeroLocked; } void lockCurrentBuffer() { if (receiveState.which) { receiveState.bufOneLocked = 1; } else { receiveState.bufZeroLocked = 1; } } void unlockBuffer(uint8_t which) { if (which) { receiveState.bufOneLocked = 0; } else { receiveState.bufZeroLocked = 0; } } void receiveBufferSwap() { receiveState.which = (receiveState.which)? 0: 1; receiveBuffer = (uint8_t*)(messagePtrs[receiveState.which]); } async event error_t ReceiveBytePacket.startPacket() { error_t result = SUCCESS; atomic { if (!isCurrentBufferLocked()) { // We are implicitly in RECV_STATE_IDLE, as it is the only // way our current buffer could be unlocked. lockCurrentBuffer(); receiveState.state = RECV_STATE_BEGIN; recvIndex = 0; recvType = TOS_SERIAL_UNKNOWN_ID; } else { result = EBUSY; } } return result; } async event void ReceiveBytePacket.byteReceived(uint8_t b) { atomic { switch (receiveState.state) { case RECV_STATE_BEGIN: receiveState.state = RECV_STATE_DATA; recvIndex = call PacketInfo.offset[b](); recvType = b; break; case RECV_STATE_DATA: if (recvIndex < sizeof(message_t)) { receiveBuffer[recvIndex] = b; recvIndex++; } else { // Drop extra bytes that do not fit in a message_t. // We assume that either the higher layer knows what to // do with partial packets, or performs sanity checks (e.g., // CRC). } break; case RECV_STATE_IDLE: default: // Do nothing. This case can be reached if the component // does not have free buffers: it will ignore a packet start // and stay in the IDLE state. } } } task void receiveTask(){ uart_id_t myType; message_t *myBuf; uint8_t mySize; uint8_t myWhich; atomic { myType = receiveTaskType; myBuf = receiveTaskBuf; mySize = receiveTaskSize; myWhich = receiveTaskWhich; } mySize -= call PacketInfo.offset[myType](); mySize = call PacketInfo.upperLength[myType](myBuf, mySize); myBuf = signal Receive.receive[myType](myBuf, myBuf, mySize); atomic { messagePtrs[myWhich] = myBuf; unlockBuffer(myWhich); receiveTaskPending = FALSE; } } async event void ReceiveBytePacket.endPacket(error_t result) { uint8_t postsignalreceive = FALSE; atomic { if (!receiveTaskPending && result == SUCCESS){ postsignalreceive = TRUE; receiveTaskPending = TRUE; receiveTaskType = recvType; receiveTaskWhich = receiveState.which; receiveTaskBuf = (message_t *)receiveBuffer; receiveTaskSize = recvIndex; receiveBufferSwap(); receiveState.state = RECV_STATE_IDLE; } else { // we can't deliver the packet, better free the current buffer. unlockBuffer(receiveState.which); } } if (postsignalreceive){ post receiveTask(); } // These are all local variables to release component state that // will allow the component to start receiving serial packets // ASAP. // // We need myWhich in case we happen to receive a whole new packet // before the signal returns, at which point receiveState.which // might revert back to us (via receiveBufferSwap()). /* uart_id_t myType; // What is the type of the packet in flight? */ /* uint8_t myWhich; // Which buffer ptr entry is it? */ /* uint8_t mySize; // How large is it? */ /* message_t* myBuf; // A pointer, for buffer swapping */ // First, copy out all of the important state so we can receive // the next packet. Then do a receiveBufferSwap, which will // tell the component to use the other available buffer. // If the buffer is /* atomic { */ /* myType = recvType; */ /* myWhich = receiveState.which; */ /* myBuf = (message_t*)receiveBuffer; */ /* mySize = recvIndex; */ /* receiveBufferSwap(); */ /* receiveState.state = RECV_STATE_IDLE; */ /* } */ /* mySize -= call PacketInfo.offset[myType](); */ /* mySize = call PacketInfo.upperLength[myType](myBuf, mySize); */ /* if (result == SUCCESS){ */ /* // TODO is the payload the same as the message? */ /* myBuf = signal Receive.receive[myType](myBuf, myBuf, mySize); */ /* } */ /* atomic { */ /* messagePtrs[myWhich] = myBuf; */ /* if (myWhich) { */ /* unlockBuffer(myWhich); */ /* } */ /* } */ } default async command uint8_t PacketInfo.offset[uart_id_t id](){ return 0; } default async command uint8_t PacketInfo.dataLinkLength[uart_id_t id](message_t *msg, uint8_t upperLen){ return 0; } default async command uint8_t PacketInfo.upperLength[uart_id_t id](message_t *msg, uint8_t dataLinkLen){ return 0; } default event message_t *Receive.receive[uart_id_t idxxx](message_t *msg, void *payload, uint8_t len){ return msg; } default event void Send.sendDone[uart_id_t idxxx](message_t *msg, error_t error){ return; } } tinyos-2.1.2+dfsg/tos/lib/serial/SerialFlush.nc000066400000000000000000000041041207233610700213550ustar00rootroot00000000000000//$Id: SerialFlush.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * A basic interface to flush the serial port. * * @author Ben Greenstein * @author Philip Levis * @date January 23 2006 * */ interface SerialFlush { /** * Request that the serial device signal when no more transmissions * are pending (i.e., when the device is idle) */ command void flush(); /** * Split phase event to indicate that the serial hardware is now idle. */ event void flushDone(); } tinyos-2.1.2+dfsg/tos/lib/serial/SerialFrameComm.nc000066400000000000000000000076521207233610700221550ustar00rootroot00000000000000//$Id: SerialFrameComm.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * This interface sits between a serial byte encoding component and a * framing/packetizing component. It is to be used with framing protocols * that place delimiters between frames. This interface separates the tasks * of interpreting and coding delimiters and escape bytes from the rest of * the wire protocol. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 */ interface SerialFrameComm { /** * Used by the upper layer to request that an interframe delimiter * be sent. The lower layer is responsible for the determining the * actual byte(s) that must be sent to delimit the frame. * @return Returns a error_t code that indicates if the lower layer * was able to put an interframe delimiter to serial (SUCCESS) or * not (FAIL). */ async command error_t putDelimiter(); /** * Used by the upper layer to request that a byte of data be sent * over serial. * @param data The byte to be sent * @return Returns an error_t code that indicates if the lower layer * has accepted the byte for sending (SUCCESS) or not (FAIL). */ async command error_t putData(uint8_t data); /** * Requests that any underlying state associated with send-side frame * delimiting or escaping be reset. Used to initialize the lower * layer's send path and/or cancel a frame mid-transmission. */ async command void resetSend(); /** * Requests that any underlying state associated with receive-side * frame or escaping be reset. Used to initialize the lower layer's * receive path and/or cancel a frame mid-reception when sync is lost. */ async command void resetReceive(); /** * Signals the upper layer that an inter-frame delimiter has been * received from the serial connection. */ async event void delimiterReceived(); /** * Signals the upper layer that a byte of data has been received * from the serial connection. It passes this byte as a function * parameter. * @param data The byte of data that has been received * from the serial connection */ async event void dataReceived(uint8_t data); /** * Split-phase event to signal when the lower layer has finished writing * the last request (either putDelimiter or putData) to serial. */ async event void putDone(); } tinyos-2.1.2+dfsg/tos/lib/serial/SerialP.nc000066400000000000000000000413641207233610700205040ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation. * Copyright (c) 2010 Stanford University. * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Revision: $Revision: 1.5 $ * */ /* * * This modules provides framing for TOS_Msgs using PPP-HDLC-like * framing (see RFC 1662). When sending, a TOS_Msg is encapsulated in * an HDLC frame. Receiving is similar EXCEPT that the component * expects a special token byte be received before the data * payload. The purpose of the token is to feed back an * acknowledgement to the sender which serves as a crude form of * flow-control. * * @author Phil Buonadonna * @author Lewis Girod * @author Ben Greenstein * @author Philip Levis * @date September 30 2010 */ #include "AM.h" #include "crc.h" module SerialP { provides { interface Init; interface SplitControl; interface SendBytePacket; interface ReceiveBytePacket; } uses { interface SerialFrameComm; interface Leds; interface StdControl as SerialControl; interface SerialFlush; } } implementation { #define NO_TX_SEQNO enum { RX_DATA_BUFFER_SIZE = 2, TX_DATA_BUFFER_SIZE = 4, SERIAL_MTU = 255, SERIAL_VERSION = 1, ACK_QUEUE_SIZE = 5, }; enum { RXSTATE_NOSYNC, RXSTATE_PROTO, RXSTATE_TOKEN, RXSTATE_INFO, RXSTATE_INACTIVE }; enum { TXSTATE_IDLE, TXSTATE_PROTO, TXSTATE_SEQNO, TXSTATE_INFO, TXSTATE_FCS1, TXSTATE_FCS2, TXSTATE_ENDFLAG, TXSTATE_ENDWAIT, TXSTATE_FINISH, TXSTATE_ERROR, TXSTATE_INACTIVE }; typedef enum { BUFFER_AVAILABLE, BUFFER_FILLING, BUFFER_COMPLETE, } tx_data_buffer_states_t; enum { TX_ACK_INDEX = 0, TX_DATA_INDEX = 1, TX_BUFFER_COUNT = 2, }; typedef struct { uint8_t writePtr; uint8_t readPtr; uint8_t buf[RX_DATA_BUFFER_SIZE+1]; // one wasted byte: writePtr == readPtr means empty } rx_buf_t; typedef struct { uint8_t state; uint8_t buf; } tx_buf_t; typedef struct { uint8_t writePtr; uint8_t readPtr; uint8_t buf[ACK_QUEUE_SIZE+1]; // one wasted byte: writePtr == readPtr means empty } ack_queue_t; /* Buffers */ rx_buf_t rxBuf; tx_buf_t txBuf[TX_BUFFER_COUNT]; /* Receive State */ uint8_t rxState; uint8_t rxByteCnt; uint8_t rxProto; uint8_t rxSeqno; uint16_t rxCRC; /* Transmit State */ uint8_t txState; uint8_t txByteCnt; uint8_t txProto; uint8_t txSeqno; uint16_t txCRC; uint8_t txPending; uint8_t txIndex; /* Ack Queue */ ack_queue_t ackQ; bool offPending = FALSE; // Prototypes inline void txInit(); inline void rxInit(); inline void ackInit(); inline bool ack_queue_is_full(); inline bool ack_queue_is_empty(); inline void ack_queue_push(uint8_t token); inline uint8_t ack_queue_top(); uint8_t ack_queue_pop(); inline void rx_buffer_init(); inline bool rx_buffer_is_full(); inline bool rx_buffer_is_empty(); inline void rx_buffer_push(uint8_t data); inline uint8_t rx_buffer_top(); inline uint8_t rx_buffer_pop(); inline uint16_t rx_current_crc(); void rx_state_machine(bool isDelimeter, uint8_t data); void MaybeScheduleTx(); task void RunTx(); inline void txInit(){ uint8_t i; atomic for (i = 0; i < TX_BUFFER_COUNT; i++) txBuf[i].state = BUFFER_AVAILABLE; txState = TXSTATE_INACTIVE; txByteCnt = 0; txProto = 0; txSeqno = 0; txCRC = 0; txPending = FALSE; txIndex = 0; } inline void rxInit(){ rxBuf.writePtr = rxBuf.readPtr = 0; rxState = RXSTATE_INACTIVE; rxByteCnt = 0; rxProto = 0; rxSeqno = 0; rxCRC = 0; } inline void ackInit(){ ackQ.writePtr = ackQ.readPtr = 0; } command error_t Init.init() { txInit(); rxInit(); ackInit(); return SUCCESS; } /* * buffer and queue manipulation */ inline bool ack_queue_is_full(){ uint8_t tmp, tmp2; atomic { tmp = ackQ.writePtr; tmp2 = ackQ.readPtr; } if (++tmp > ACK_QUEUE_SIZE) tmp = 0; return (tmp == tmp2); } inline bool ack_queue_is_empty(){ bool ret; atomic ret = (ackQ.writePtr == ackQ.readPtr); return ret; } inline void ack_queue_push(uint8_t token) { if (!ack_queue_is_full()){ atomic { ackQ.buf[ackQ.writePtr] = token; if (++ackQ.writePtr > ACK_QUEUE_SIZE) ackQ.writePtr = 0; } MaybeScheduleTx(); } } inline uint8_t ack_queue_top() { uint8_t tmp = 0; atomic { if (!ack_queue_is_empty()){ tmp = ackQ.buf[ackQ.readPtr]; } } return tmp; } uint8_t ack_queue_pop() { uint8_t retval = 0; atomic { if (ackQ.writePtr != ackQ.readPtr){ retval = ackQ.buf[ackQ.readPtr]; if (++(ackQ.readPtr) > ACK_QUEUE_SIZE) ackQ.readPtr = 0; } } return retval; } /* * Buffer Manipulation */ inline void rx_buffer_init(){ rxBuf.writePtr = rxBuf.readPtr = 0; } inline bool rx_buffer_is_full() { uint8_t tmp = rxBuf.writePtr; if (++tmp > RX_DATA_BUFFER_SIZE) tmp = 0; return (tmp == rxBuf.readPtr); } inline bool rx_buffer_is_empty(){ return (rxBuf.readPtr == rxBuf.writePtr); } inline void rx_buffer_push(uint8_t data){ rxBuf.buf[rxBuf.writePtr] = data; if (++(rxBuf.writePtr) > RX_DATA_BUFFER_SIZE) rxBuf.writePtr = 0; } inline uint8_t rx_buffer_top(){ uint8_t tmp = rxBuf.buf[rxBuf.readPtr]; return tmp; } inline uint8_t rx_buffer_pop(){ uint8_t tmp = rxBuf.buf[rxBuf.readPtr]; if (++(rxBuf.readPtr) > RX_DATA_BUFFER_SIZE) rxBuf.readPtr = 0; return tmp; } inline uint16_t rx_current_crc(){ uint16_t crc; uint8_t tmp = rxBuf.writePtr; tmp = (tmp == 0 ? RX_DATA_BUFFER_SIZE : tmp - 1); crc = rxBuf.buf[tmp] & 0x00ff; crc = (crc << 8) & 0xFF00; tmp = (tmp == 0 ? RX_DATA_BUFFER_SIZE : tmp - 1); crc |= (rxBuf.buf[tmp] & 0x00FF); return crc; } task void startDoneTask() { call SerialControl.start(); atomic { txState = TXSTATE_IDLE; rxState = RXSTATE_NOSYNC; } signal SplitControl.startDone(SUCCESS); } task void stopDoneTask() { call SerialFlush.flush(); } event void SerialFlush.flushDone(){ call SerialControl.stop(); signal SplitControl.stopDone(SUCCESS); } task void defaultSerialFlushTask(){ signal SerialFlush.flushDone(); } default command void SerialFlush.flush(){ post defaultSerialFlushTask(); } command error_t SplitControl.start() { atomic { if(txState != TXSTATE_INACTIVE && rxState != RXSTATE_INACTIVE ) return EALREADY; } post startDoneTask(); return SUCCESS; } void testOff() { bool turnOff = FALSE; atomic { if (txState == TXSTATE_INACTIVE && rxState == RXSTATE_INACTIVE) { turnOff = TRUE; } } if (turnOff) { post stopDoneTask(); atomic offPending = FALSE; } else { atomic offPending = TRUE; } } command error_t SplitControl.stop() { atomic { if (rxState == RXSTATE_NOSYNC) { rxState = RXSTATE_INACTIVE; } } atomic { if (txState == TXSTATE_IDLE) { txState = TXSTATE_INACTIVE; } } testOff(); return SUCCESS; } /* * Receive Path */ async event void SerialFrameComm.delimiterReceived(){ rx_state_machine(TRUE,0); } async event void SerialFrameComm.dataReceived(uint8_t data){ rx_state_machine(FALSE,data); } bool valid_rx_proto(uint8_t proto){ switch (proto){ case SERIAL_PROTO_PACKET_ACK: return TRUE; case SERIAL_PROTO_ACK: case SERIAL_PROTO_PACKET_NOACK: default: return FALSE; } } void rx_state_machine(bool isDelimeter, uint8_t data){ switch (rxState) { case RXSTATE_NOSYNC: if (isDelimeter) { rxInit(); rxState = RXSTATE_PROTO; } break; case RXSTATE_PROTO: if (!isDelimeter){ rxCRC = crcByte(rxCRC,data); rxState = RXSTATE_TOKEN; rxProto = data; if (!valid_rx_proto(rxProto)) goto nosync; // only supports serial proto packet ack if (rxProto != SERIAL_PROTO_PACKET_ACK){ goto nosync; } if (signal ReceiveBytePacket.startPacket() != SUCCESS){ goto nosync; } } break; case RXSTATE_TOKEN: if (isDelimeter) { goto nosync; } else { rxSeqno = data; rxCRC = crcByte(rxCRC,rxSeqno); rxState = RXSTATE_INFO; } break; case RXSTATE_INFO: if (rxByteCnt < SERIAL_MTU){ if (isDelimeter) { /* handle end of frame */ if (rxByteCnt >= 2) { if (rx_current_crc() == rxCRC) { signal ReceiveBytePacket.endPacket(SUCCESS); ack_queue_push(rxSeqno); rxInit(); call SerialFrameComm.resetReceive(); if (offPending) { rxState = RXSTATE_INACTIVE; testOff(); } goto done; } else { goto nosync; } } else { goto nosync; } } else { /* handle new bytes to save */ if (rxByteCnt >= 2){ signal ReceiveBytePacket.byteReceived(rx_buffer_top()); rxCRC = crcByte(rxCRC,rx_buffer_pop()); } rx_buffer_push(data); rxByteCnt++; } } /* no valid message.. */ else { goto nosync; } break; default: goto nosync; } goto done; nosync: /* reset all counters, etc */ rxInit(); call SerialFrameComm.resetReceive(); signal ReceiveBytePacket.endPacket(FAIL); if (offPending) { rxState = RXSTATE_INACTIVE; testOff(); } /* if this was a flag, start in proto state.. */ else if (isDelimeter) { rxState = RXSTATE_PROTO; } done: } /* * Send Path */ void MaybeScheduleTx() { atomic { if (txPending == 0) { if (post RunTx() == SUCCESS) { txPending = 1; } } } } async command error_t SendBytePacket.completeSend(){ bool ret = FAIL; atomic { txBuf[TX_DATA_INDEX].state = BUFFER_COMPLETE; ret = SUCCESS; } return ret; } async command error_t SendBytePacket.startSend(uint8_t b){ bool not_busy = FALSE; atomic { if(txState == TXSTATE_INACTIVE) return EOFF; } atomic { if (txBuf[TX_DATA_INDEX].state == BUFFER_AVAILABLE){ txBuf[TX_DATA_INDEX].state = BUFFER_FILLING; txBuf[TX_DATA_INDEX].buf = b; not_busy = TRUE; } } if (not_busy) { MaybeScheduleTx(); return SUCCESS; } return EBUSY; } task void RunTx() { uint8_t idle; uint8_t done; uint8_t fail; /* the following trigger MaybeScheduleTx, which starts at most one RunTx: 1) adding an ack to the ack queue (ack_queue_push()) 2) starting to send a packet (SendBytePacket.startSend()) 3) failure to send start delimiter in RunTx 4) putDone: */ error_t result = SUCCESS; bool send_completed = FALSE; bool start_it = FALSE; atomic { txPending = 0; idle = (txState == TXSTATE_IDLE); done = (txState == TXSTATE_FINISH); fail = (txState == TXSTATE_ERROR); if (done || fail){ txState = TXSTATE_IDLE; txBuf[txIndex].state = BUFFER_AVAILABLE; } } /* if done, call the send done */ if (done || fail) { atomic { txSeqno++; if (txProto == SERIAL_PROTO_ACK){ ack_queue_pop(); } else { result = done ? SUCCESS : FAIL; send_completed = TRUE; } } idle = TRUE; } /* if idle, set up next packet to TX */ if (idle) { bool goInactive; atomic goInactive = offPending; if (goInactive) { atomic txState = TXSTATE_INACTIVE; } else { /* acks are top priority */ uint8_t myAckState; uint8_t myDataState; atomic { myAckState = txBuf[TX_ACK_INDEX].state; myDataState = txBuf[TX_DATA_INDEX].state; } if (!ack_queue_is_empty() && myAckState == BUFFER_AVAILABLE) { atomic { txBuf[TX_ACK_INDEX].state = BUFFER_COMPLETE; txBuf[TX_ACK_INDEX].buf = ack_queue_top(); txProto = SERIAL_PROTO_ACK; txIndex = TX_ACK_INDEX; start_it = TRUE; } } else if (myDataState == BUFFER_FILLING || myDataState == BUFFER_COMPLETE){ atomic { txProto = SERIAL_PROTO_PACKET_NOACK; txIndex = TX_DATA_INDEX; start_it = TRUE; } } else { /* nothing to send now.. */ } } } else { /* we're in the middle of transmitting */ } if (send_completed){ signal SendBytePacket.sendCompleted(result); } atomic { if (txState == TXSTATE_INACTIVE) { testOff(); return; } } if (start_it){ /* OK, start transmitting ! */ atomic { txCRC = 0; txByteCnt = 0; txState = TXSTATE_PROTO; } if (call SerialFrameComm.putDelimiter() != SUCCESS) { atomic txState = TXSTATE_ERROR; MaybeScheduleTx(); } } } async event void SerialFrameComm.putDone() { { error_t txResult = SUCCESS; atomic { switch (txState) { case TXSTATE_PROTO: txResult = call SerialFrameComm.putData(txProto); #ifdef NO_TX_SEQNO txState = TXSTATE_INFO; #else txState = TXSTATE_SEQNO; #endif txCRC = crcByte(txCRC,txProto); break; case TXSTATE_SEQNO: txResult = call SerialFrameComm.putData(txSeqno); txState = TXSTATE_INFO; txCRC = crcByte(txCRC,txSeqno); break; case TXSTATE_INFO: atomic { txResult = call SerialFrameComm.putData(txBuf[txIndex].buf); txCRC = crcByte(txCRC,txBuf[txIndex].buf); ++txByteCnt; if (txIndex == TX_DATA_INDEX){ uint8_t nextByte; nextByte = signal SendBytePacket.nextByte(); if (txBuf[txIndex].state == BUFFER_COMPLETE || txByteCnt >= SERIAL_MTU){ txState = TXSTATE_FCS1; } else { /* never called on ack b/c ack is BUFFER_COMPLETE initially */ txBuf[txIndex].buf = nextByte; } } else { // TX_ACK_INDEX txState = TXSTATE_FCS1; } } break; case TXSTATE_FCS1: txResult = call SerialFrameComm.putData(txCRC & 0xff); txState = TXSTATE_FCS2; break; case TXSTATE_FCS2: txResult = call SerialFrameComm.putData((txCRC >> 8) & 0xff); txState = TXSTATE_ENDFLAG; break; case TXSTATE_ENDFLAG: txResult = call SerialFrameComm.putDelimiter(); txState = TXSTATE_ENDWAIT; break; case TXSTATE_ENDWAIT: txState = TXSTATE_FINISH; case TXSTATE_FINISH: MaybeScheduleTx(); break; case TXSTATE_ERROR: default: txResult = FAIL; break; } if (txResult != SUCCESS) { txState = TXSTATE_ERROR; MaybeScheduleTx(); } } } } default event void SplitControl.startDone(error_t err) {} default event void SplitControl.stopDone(error_t err) {} } tinyos-2.1.2+dfsg/tos/lib/serial/SerialPacketInfo.nc000066400000000000000000000022501207233610700223170ustar00rootroot00000000000000/** * Accessor methods used by a serial dispatcher to communicate with various * message_t link formats over a serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 */ interface SerialPacketInfo { /** * Get the offset into a message_t where the header information begins. * @return Returns the offset. */ async command uint8_t offset(); /** * Get the size of the datalink packet embedded in the message_t, in bytes. * This is the sum of the payload (upperLen) and the size of the link header. * @param msg A pointer to the message_t to interrogate. (unused) * @param upperLen The size of the payload. * @return Returns the size of the datalink packet. */ async command uint8_t dataLinkLength(message_t* msg, uint8_t upperLen); /** * Get the size of the payload (in bytes) given the size of the datalink * packet (dataLinkLen) embedded in the message_t. * @param msg A pointer to the message_t to interrogate. (unused) * @param dataLinkLength The size of the datalink packet. * @return Returns the size of the payload. */ async command uint8_t upperLength(message_t* msg, uint8_t dataLinkLen); } tinyos-2.1.2+dfsg/tos/lib/serial/SerialPacketInfo802_15_4P.nc000066400000000000000000000053471207233610700234330ustar00rootroot00000000000000//$Id: SerialPacketInfo802_15_4P.nc,v 1.8 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the metdata necessary for a dispatcher to * communicate 802.15.4 message_t packets over a serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ module SerialPacketInfo802_15_4P { provides interface SerialPacketInfo as Info; } implementation { #if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) enum { HEADER_SIZE = sizeof(rf230packet_header_t), FOOTER_SIZE = sizeof(rf230packet_footer_t), }; #elif defined(PLATFORM_UCMINI) enum { HEADER_SIZE = sizeof(rfa1packet_header_t), FOOTER_SIZE = sizeof(rfa1packet_footer_t), }; #else enum { HEADER_SIZE = sizeof(cc2420_header_t), FOOTER_SIZE = sizeof(cc2420_footer_t), }; #endif async command uint8_t Info.offset() { return sizeof(message_header_t)-HEADER_SIZE; } async command uint8_t Info.dataLinkLength(message_t* msg, uint8_t upperLen) { return upperLen + HEADER_SIZE + FOOTER_SIZE; } async command uint8_t Info.upperLength(message_t* msg, uint8_t dataLinkLen) { return dataLinkLen - (HEADER_SIZE + FOOTER_SIZE); } } tinyos-2.1.2+dfsg/tos/lib/serial/SerialPacketInfoActiveMessageP.nc000066400000000000000000000046041207233610700251050ustar00rootroot00000000000000//$Id: SerialPacketInfoActiveMessageP.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the metadata neccessary for a dispatcher to * communicate with basic active messages packets over a serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ #include "Serial.h" module SerialPacketInfoActiveMessageP { provides interface SerialPacketInfo as Info; } implementation { async command uint8_t Info.offset() { return (uint8_t)(sizeof(message_header_t) - sizeof(serial_header_t)); } async command uint8_t Info.dataLinkLength(message_t* msg, uint8_t upperLen) { return upperLen + sizeof(serial_header_t); } async command uint8_t Info.upperLength(message_t* msg, uint8_t dataLinkLen) { return dataLinkLen - sizeof(serial_header_t); } } tinyos-2.1.2+dfsg/tos/lib/serial/SerialQueueP.nc000066400000000000000000000041631207233610700215050ustar00rootroot00000000000000// $Id: SerialQueueP.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The fair-share AM send queue. * * @author Philip Levis * @date Jan 16 2006 */ #include "Serial.h" configuration SerialQueueP { provides interface Send[uint8_t client]; } implementation { enum { NUM_CLIENTS = uniqueCount(UQ_SERIALQUEUE_SEND) }; components new AMQueueImplP(NUM_CLIENTS), SerialActiveMessageC; Send = AMQueueImplP; AMQueueImplP.AMSend -> SerialActiveMessageC; AMQueueImplP.AMPacket -> SerialActiveMessageC; AMQueueImplP.Packet -> SerialActiveMessageC; } tinyos-2.1.2+dfsg/tos/lib/serial/SerialStartC.nc000066400000000000000000000036721207233610700215050ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Including this configuration will start the Serial port at boot time. This * is very useful if you use the serial port for debug only. * * @author Thomas Schmid */ configuration SerialStartC {} implementation { components MainC, SerialStartP; SerialStartP.Boot -> MainC; components SerialActiveMessageC; SerialStartP.SerialControl -> SerialActiveMessageC; } tinyos-2.1.2+dfsg/tos/lib/serial/SerialStartP.nc000066400000000000000000000036101207233610700215120ustar00rootroot00000000000000/* * Copyright (c) 2011 University of Utah. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Thomas Schmid */ module SerialStartP { uses { interface Boot; interface SplitControl as SerialControl; } } implementation { event void Boot.booted() { call SerialControl.start(); } event void SerialControl.startDone(error_t error) {} event void SerialControl.stopDone(error_t error) {} } tinyos-2.1.2+dfsg/tos/lib/timer/000077500000000000000000000000001207233610700164545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/timer/Alarm.nc000066400000000000000000000104571207233610700200410ustar00rootroot00000000000000//$Id: Alarm.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * An Alarm is a low-level interface intended for precise timing. * *

      An Alarm is parameterised by its "precision" (milliseconds, * microseconds, etc), identified by a type. This prevents, e.g., * unintentionally mixing components expecting milliseconds with those * expecting microseconds as those interfaces have a different type. * *

      An Alarm's second parameter is its "width", i.e., the number of * bits used to represent time values. Width is indicated by including * the appropriate size integer type as an Alarm parameter. * *

      See TEP102 for more details. * * @param precision_tag A type indicating the precision of this Alarm. * @param size_type An integer type representing time values for this Alarm. * * @author Cory Sharp */ interface Alarm { // basic interface /** * Set a single-short alarm to some time units in the future. Replaces * any current alarm time. Equivalent to start(getNow(), dt). The * fired will be signaled when the alarm expires. * * @param dt Time until the alarm fires. */ async command void start(size_type dt); /** * Cancel an alarm. Note that the fired event may have * already been signaled (even if your code has not yet started * executing). */ async command void stop(); /** * Signaled when the alarm expires. */ async event void fired(); // extended interface /** * Check if alarm is running. Note that a FALSE return does not indicate * that the fired event will not be signaled (it may have * already started executing, but not reached your code yet). * * @return TRUE if the alarm is still running. */ async command bool isRunning(); /** * Set a single-short alarm to time t0+dt. Replaces any current alarm * time. The fired will be signaled when the alarm expires. * Alarms set in the past will fire "soon". * *

      Because the current time may wrap around, it is possible to use * values of t0 greater than the getNow's result. These * values represent times in the past, i.e., the time at which getNow() * would last of returned that value. * * @param t0 Base time for alarm. * @param dt Alarm time as offset from t0. */ async command void startAt(size_type t0, size_type dt); /** * Return the current time. * @return Current time. */ async command size_type getNow(); /** * Return the time the currently running alarm will fire or the time that * the previously running alarm was set to fire. * @return Alarm time. */ async command size_type getAlarm(); } tinyos-2.1.2+dfsg/tos/lib/timer/AlarmToTimerC.nc000066400000000000000000000064101207233610700214420ustar00rootroot00000000000000//$Id: AlarmToTimerC.nc,v 1.7 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * AlarmToTimerC converts a 32-bit Alarm to a Timer. * *

      See TEP102 for more details. * @param precision_tag A type indicating the precision of the Alarm and * Timer being converted. * * @author Cory Sharp */ generic module AlarmToTimerC(typedef precision_tag) @safe() { provides interface Timer; uses interface Alarm; } implementation { // there might be ways to save bytes here, but I'll do it in the obviously // right way for now uint32_t m_dt; bool m_oneshot; void start(uint32_t t0, uint32_t dt, bool oneshot) { m_dt = dt; m_oneshot = oneshot; call Alarm.startAt(t0, dt); } command void Timer.startPeriodic(uint32_t dt) { start(call Alarm.getNow(), dt, FALSE); } command void Timer.startOneShot(uint32_t dt) { start(call Alarm.getNow(), dt, TRUE); } command void Timer.stop() { call Alarm.stop(); } task void fired() { if(m_oneshot == FALSE) start(call Alarm.getAlarm(), m_dt, FALSE); signal Timer.fired(); } async event void Alarm.fired() { post fired(); } command bool Timer.isRunning() { return call Alarm.isRunning(); } command bool Timer.isOneShot() { return m_oneshot; } command void Timer.startPeriodicAt(uint32_t t0, uint32_t dt) { start(t0, dt, FALSE); } command void Timer.startOneShotAt(uint32_t t0, uint32_t dt) { start(t0, dt, TRUE); } command uint32_t Timer.getNow() { return call Alarm.getNow(); } command uint32_t Timer.gett0() { return call Alarm.getAlarm() - m_dt; } command uint32_t Timer.getdt() { return m_dt; } } tinyos-2.1.2+dfsg/tos/lib/timer/BusyWait.nc000066400000000000000000000054031207233610700205470ustar00rootroot00000000000000//$Id: BusyWait.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * BusyWait is a low-level interface intended for busy waiting for short * durations. * *

      BusyWait is parameterised by its "precision" (milliseconds, * microseconds, etc), identified by a type. This prevents, e.g., * unintentionally mixing components expecting milliseconds with those * expecting microseconds as those interfaces have a different type. * *

      BusyWait's second parameter is its "width", i.e., the number of bits * used to represent time values. Width is indicated by including the * appropriate size integer type as a BusyWait parameter. * *

      See TEP102 for more details. * * @param precision_tag A type indicating the precision of this BusyWait * interface. * @param size_type An integer type representing time values for this * BusyWait interface. * * @author Cory Sharp */ interface BusyWait { /** * Busy wait for (at least) dt time units. Use sparingly, when the * cost of using an Alarm or Timer would be too high. * @param dt Time to busy wait for. */ async command void wait(size_type dt); } tinyos-2.1.2+dfsg/tos/lib/timer/BusyWaitCounterC.nc000066400000000000000000000055451207233610700222210ustar00rootroot00000000000000//$Id: BusyWaitCounterC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * BusyWaitCounterC uses a Counter to implement the BusyWait interface * (block until a specified amount of time elapses). See TEP102 for more * details. * *

      See TEP102 for more details. * * @param precision_tag A type indicating the precision of the BusyWait * interface. * @param size_type An integer type representing time values for the * BusyWait interface. * * @author Cory Sharp */ generic module BusyWaitCounterC(typedef precision_tag, typedef size_type @integer()) { provides interface BusyWait; uses interface Counter; } implementation { enum { HALF_MAX_SIZE_TYPE = ((size_type)1) << (8*sizeof(size_type)-1), }; async command void BusyWait.wait(size_type dt) { atomic { // comparisons are <= to guarantee a wait at least as long as dt size_type t0 = call Counter.get(); if(dt > HALF_MAX_SIZE_TYPE) { dt -= HALF_MAX_SIZE_TYPE; while((call Counter.get() - t0) <= dt); t0 += dt; dt = HALF_MAX_SIZE_TYPE; } while((call Counter.get() - t0) <= dt); } } async event void Counter.overflow() { } } tinyos-2.1.2+dfsg/tos/lib/timer/Counter.nc000066400000000000000000000063051207233610700204210ustar00rootroot00000000000000//$Id: Counter.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * A Counter counts time in some units and in some width, signaling * overflow. * *

      A Counter is parameterised by its "precision" (milliseconds, * microseconds, etc), identified by a type. This prevents, e.g., * unintentionally mixing components expecting milliseconds with those * expecting microseconds as those interfaces have a different type. * *

      A Counter's second parameter is its "width", i.e., the number of * bits used to represent time values. Width is indicated by including * the appropriate size integer type as a Counter parameter. * *

      See TEP102 for more details. * * @param precision_tag A type indicating the precision of this Counter. * @param size_type An integer type representing time values for this Counter. * * @author Cory Sharp */ interface Counter { /** * Return counter value. Counters start at boot - some time sources may * stop counting while the processor is in low-power mode. * @return Current counter value. */ async command size_type get(); /** * Return TRUE if an overflow event will occur after the outermost atomic * block is exits. FALSE otherwise. * @return Counter pending overflow status. */ async command bool isOverflowPending(); /** * Cancel a pending overflow interrupt. */ async command void clearOverflow(); /** * Signals that the current time has overflowed. That is, the current * time has wrapped around from its maximum value to zero. */ async event void overflow(); } tinyos-2.1.2+dfsg/tos/lib/timer/CounterToLocalTimeC.nc000066400000000000000000000043661207233610700226260ustar00rootroot00000000000000//$Id: CounterToLocalTimeC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * CounterToLocalTimeC converts a 32-bit LocalTime to a Counter. * *

      See TEP102 for more details. * @param precision_tag A type indicating the precision of the LocalTime and * Counter being converted. * * @author Cory Sharp */ generic module CounterToLocalTimeC(typedef precision_tag) @safe() { provides interface LocalTime; uses interface Counter; } implementation { async command uint32_t LocalTime.get() { return call Counter.get(); } async event void Counter.overflow() { } } tinyos-2.1.2+dfsg/tos/lib/timer/LocalTime.nc000066400000000000000000000050171207233610700206520ustar00rootroot00000000000000//$Id: LocalTime.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * A LocalTime interface counts time in some units. If you need to detect * time overflow, you should use a component offering the Counter * interface. * *

      The LocalTime interface is parameterised by its "precision" * (milliseconds, microseconds, etc), identified by a type. This prevents, * e.g., unintentionally mixing components expecting milliseconds with * those expecting microseconds as those interfaces have a different type. * *

      See TEP102 for more details. * * @param precision_tag A type indicating the precision of this Counter. * * @author Cory Sharp */ interface LocalTime { /** * Return current time. Time starts counting at boot - some time sources * may stop counting while the processor is in low-power mode. * * @return Current time. */ async command uint32_t get(); } tinyos-2.1.2+dfsg/tos/lib/timer/LocalTime32khzC.nc000066400000000000000000000037311207233610700216400ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "Timer.h" /** Provide the current time in 32KHz ticks. * * @author Peter A. Bigot */ configuration LocalTime32khzC { provides interface LocalTime; } implementation { components Counter32khz32C; components new CounterToLocalTimeC(T32khz) as CounterToLocalTime32khzC; CounterToLocalTime32khzC.Counter -> Counter32khz32C; LocalTime = CounterToLocalTime32khzC; } tinyos-2.1.2+dfsg/tos/lib/timer/LocalTimeMicroC.nc000066400000000000000000000037321207233610700217510ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "Timer.h" /** Provide the current time in microseconds. * * @author Peter A. Bigot */ configuration LocalTimeMicroC { provides interface LocalTime; } implementation { components CounterMicro32C; components new CounterToLocalTimeC(TMicro) as CounterToLocalTimeMicroC; CounterToLocalTimeMicroC.Counter -> CounterMicro32C; LocalTime = CounterToLocalTimeMicroC; } tinyos-2.1.2+dfsg/tos/lib/timer/LocalTimeSecondC.nc000066400000000000000000000037431207233610700221150ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "Timer.h" /** Provide the current time in whole seconds. * * @author Peter A. Bigot */ configuration LocalTimeSecondC { provides interface LocalTime; } implementation { components CounterSecond32C; components new CounterToLocalTimeC(TSecond) as CounterToLocalTimeSecondC; CounterToLocalTimeSecondC.Counter -> CounterSecond32C; LocalTime = CounterToLocalTimeSecondC; } tinyos-2.1.2+dfsg/tos/lib/timer/MultiplexAlarm.h000066400000000000000000000044501207233610700215700ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #ifndef MULTIPLEX_ALARM_H_ #define MULTIPLEX_ALARM_H_ /** Unique marker for multiplexed 16-bit whole-second alarms */ #define UQ_MuxAlarmSecond16 "UQ_MuxAlarmSecond16" /** Unique marker for multiplexed 32-bit whole-second alarms */ #define UQ_MuxAlarmSecond32 "UQ_MuxAlarmSecond32" /** Unique marker for multiplexed 16-bit millisecond alarms */ #define UQ_MuxAlarmMilli16 "UQ_MuxAlarmMilli16" /** Unique marker for multiplexed 32-bit millisecond alarms */ #define UQ_MuxAlarmMilli32 "UQ_MuxAlarmMilli32" /** Unique marker for multiplexed 16-bit 32KHz alarms */ #define UQ_MuxAlarm32khz16 "UQ_MuxAlarm32khz16" /** Unique marker for multiplexed 32-bit 32KHz alarms */ #define UQ_MuxAlarm32khz32 "UQ_MuxAlarm32khz32" #endif /* MULTIPLEX_ALARM_H_ */ tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarm32khz16C.nc000066400000000000000000000041551207233610700216650ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C.nc for PRECISION_TAG=32khz and SIZE_TYPE=16 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" /** Provide a client-specific instance of a multiplexed alarm with * precision T32khz and size uint16_t. * * @author Peter A. Bigot */ generic configuration MuxAlarm32khz16C () { provides { interface Alarm; } } implementation { enum { CLIENT_ID = unique(UQ_MuxAlarm32khz16), }; components MuxAlarm32khz16C_; Alarm = MuxAlarm32khz16C_.ClientAlarm[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarm32khz16C_.nc000066400000000000000000000052221207233610700220200ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C_.nc for PRECISION_TAG=32khz and SIZE_TYPE=16 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" #include /** The base component used for multiplexing client alarms onto a * single hardware alarm with precision T32khz and size uint16_t. * * For debugging purposes, the DEBUG_MULTIPLEX_ALARM preprocessor * simple will export an interface that allows inspection of the * internal details of the multiplex structures. When it is used, the * underlying Alarm interface that is multiplexed is also published to * allow more controlled testing using a controlled alarm * implementation. * * @author Peter A. Bigot */ configuration MuxAlarm32khz16C_ { provides interface Alarm as ClientAlarm[ uint8_t client_id ]; } implementation { components new VirtualizeAlarmC(T32khz, uint16_t, uniqueCount(UQ_MuxAlarm32khz16)); ClientAlarm = VirtualizeAlarmC.Alarm; components MainC; MainC.SoftwareInit -> VirtualizeAlarmC.Init; components new Alarm32khz16C(); VirtualizeAlarmC.AlarmFrom -> Alarm32khz16C; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarm32khz32C.nc000066400000000000000000000041551207233610700216630ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C.nc for PRECISION_TAG=32khz and SIZE_TYPE=32 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" /** Provide a client-specific instance of a multiplexed alarm with * precision T32khz and size uint32_t. * * @author Peter A. Bigot */ generic configuration MuxAlarm32khz32C () { provides { interface Alarm; } } implementation { enum { CLIENT_ID = unique(UQ_MuxAlarm32khz32), }; components MuxAlarm32khz32C_; Alarm = MuxAlarm32khz32C_.ClientAlarm[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarm32khz32C_.nc000066400000000000000000000052221207233610700220160ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C_.nc for PRECISION_TAG=32khz and SIZE_TYPE=32 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" #include /** The base component used for multiplexing client alarms onto a * single hardware alarm with precision T32khz and size uint32_t. * * For debugging purposes, the DEBUG_MULTIPLEX_ALARM preprocessor * simple will export an interface that allows inspection of the * internal details of the multiplex structures. When it is used, the * underlying Alarm interface that is multiplexed is also published to * allow more controlled testing using a controlled alarm * implementation. * * @author Peter A. Bigot */ configuration MuxAlarm32khz32C_ { provides interface Alarm as ClientAlarm[ uint8_t client_id ]; } implementation { components new VirtualizeAlarmC(T32khz, uint32_t, uniqueCount(UQ_MuxAlarm32khz32)); ClientAlarm = VirtualizeAlarmC.Alarm; components MainC; MainC.SoftwareInit -> VirtualizeAlarmC.Init; components new Alarm32khz32C(); VirtualizeAlarmC.AlarmFrom -> Alarm32khz32C; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarmMilli16C.nc000066400000000000000000000041551207233610700217720ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C.nc for PRECISION_TAG=Milli and SIZE_TYPE=16 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" /** Provide a client-specific instance of a multiplexed alarm with * precision TMilli and size uint16_t. * * @author Peter A. Bigot */ generic configuration MuxAlarmMilli16C () { provides { interface Alarm; } } implementation { enum { CLIENT_ID = unique(UQ_MuxAlarmMilli16), }; components MuxAlarmMilli16C_; Alarm = MuxAlarmMilli16C_.ClientAlarm[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarmMilli16C_.nc000066400000000000000000000052221207233610700221250ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C_.nc for PRECISION_TAG=Milli and SIZE_TYPE=16 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" #include /** The base component used for multiplexing client alarms onto a * single hardware alarm with precision TMilli and size uint16_t. * * For debugging purposes, the DEBUG_MULTIPLEX_ALARM preprocessor * simple will export an interface that allows inspection of the * internal details of the multiplex structures. When it is used, the * underlying Alarm interface that is multiplexed is also published to * allow more controlled testing using a controlled alarm * implementation. * * @author Peter A. Bigot */ configuration MuxAlarmMilli16C_ { provides interface Alarm as ClientAlarm[ uint8_t client_id ]; } implementation { components new VirtualizeAlarmC(TMilli, uint16_t, uniqueCount(UQ_MuxAlarmMilli16)); ClientAlarm = VirtualizeAlarmC.Alarm; components MainC; MainC.SoftwareInit -> VirtualizeAlarmC.Init; components new AlarmMilli16C(); VirtualizeAlarmC.AlarmFrom -> AlarmMilli16C; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarmMilli32C.nc000066400000000000000000000040031207233610700217600ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" /** Provide a client-specific instance of a multiplexed alarm with * precision TMilli and size uint32_t. * * @author Peter A. Bigot */ generic configuration MuxAlarmMilli32C () { provides { interface Alarm; } } implementation { enum { CLIENT_ID = unique(UQ_MuxAlarmMilli32), }; components MuxAlarmMilli32C_; Alarm = MuxAlarmMilli32C_.ClientAlarm[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarmMilli32C_.nc000066400000000000000000000050471207233610700221300ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" #include /** The base component used for multiplexing client alarms onto a * single hardware alarm with precision TMilli and size uint32_t. * * For debugging purposes, the DEBUG_MULTIPLEX_ALARM preprocessor * simple will export an interface that allows inspection of the * internal details of the multiplex structures. When it is used, the * underlying Alarm interface that is multiplexed is also published to * allow more controlled testing using a controlled alarm * implementation. * * @author Peter A. Bigot */ configuration MuxAlarmMilli32C_ { provides interface Alarm as ClientAlarm[ uint8_t client_id ]; } implementation { components new VirtualizeAlarmC(TMilli, uint32_t, uniqueCount(UQ_MuxAlarmMilli32)); ClientAlarm = VirtualizeAlarmC.Alarm; components MainC; MainC.SoftwareInit -> VirtualizeAlarmC.Init; components new AlarmMilli32C(); VirtualizeAlarmC.AlarmFrom -> AlarmMilli32C; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarmSecond16C.nc000066400000000000000000000041641207233610700221370ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C.nc for PRECISION_TAG=Second and SIZE_TYPE=16 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" /** Provide a client-specific instance of a multiplexed alarm with * precision TSecond and size uint16_t. * * @author Peter A. Bigot */ generic configuration MuxAlarmSecond16C () { provides { interface Alarm; } } implementation { enum { CLIENT_ID = unique(UQ_MuxAlarmSecond16), }; components MuxAlarmSecond16C_; Alarm = MuxAlarmSecond16C_.ClientAlarm[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarmSecond16C_.nc000066400000000000000000000052321207233610700222730ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C_.nc for PRECISION_TAG=Second and SIZE_TYPE=16 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" #include /** The base component used for multiplexing client alarms onto a * single hardware alarm with precision TSecond and size uint16_t. * * For debugging purposes, the DEBUG_MULTIPLEX_ALARM preprocessor * simple will export an interface that allows inspection of the * internal details of the multiplex structures. When it is used, the * underlying Alarm interface that is multiplexed is also published to * allow more controlled testing using a controlled alarm * implementation. * * @author Peter A. Bigot */ configuration MuxAlarmSecond16C_ { provides interface Alarm as ClientAlarm[ uint8_t client_id ]; } implementation { components new VirtualizeAlarmC(TSecond, uint16_t, uniqueCount(UQ_MuxAlarmSecond16)); ClientAlarm = VirtualizeAlarmC.Alarm; components MainC; MainC.SoftwareInit -> VirtualizeAlarmC.Init; components new AlarmSecond16C(); VirtualizeAlarmC.AlarmFrom -> AlarmSecond16C; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarmSecond32C.nc000066400000000000000000000041641207233610700221350ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C.nc for PRECISION_TAG=Second and SIZE_TYPE=32 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" /** Provide a client-specific instance of a multiplexed alarm with * precision TSecond and size uint32_t. * * @author Peter A. Bigot */ generic configuration MuxAlarmSecond32C () { provides { interface Alarm; } } implementation { enum { CLIENT_ID = unique(UQ_MuxAlarmSecond32), }; components MuxAlarmSecond32C_; Alarm = MuxAlarmSecond32C_.ClientAlarm[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/timer/MuxAlarmSecond32C_.nc000066400000000000000000000052321207233610700222710ustar00rootroot00000000000000/* DO NOT MODIFY * This file cloned from MuxAlarmMilli32C_.nc for PRECISION_TAG=Second and SIZE_TYPE=32 */ /* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #include "MultiplexAlarm.h" #include /** The base component used for multiplexing client alarms onto a * single hardware alarm with precision TSecond and size uint32_t. * * For debugging purposes, the DEBUG_MULTIPLEX_ALARM preprocessor * simple will export an interface that allows inspection of the * internal details of the multiplex structures. When it is used, the * underlying Alarm interface that is multiplexed is also published to * allow more controlled testing using a controlled alarm * implementation. * * @author Peter A. Bigot */ configuration MuxAlarmSecond32C_ { provides interface Alarm as ClientAlarm[ uint8_t client_id ]; } implementation { components new VirtualizeAlarmC(TSecond, uint32_t, uniqueCount(UQ_MuxAlarmSecond32)); ClientAlarm = VirtualizeAlarmC.Alarm; components MainC; MainC.SoftwareInit -> VirtualizeAlarmC.Init; components new AlarmSecond32C(); VirtualizeAlarmC.AlarmFrom -> AlarmSecond32C; } tinyos-2.1.2+dfsg/tos/lib/timer/README.txt000066400000000000000000000015711207233610700201560ustar00rootroot00000000000000This directory contains support for components that allow up to 256 individually managed alarms to be multiplexed onto a single hardware alarm. The bulk of the implementation uses the TinyOS VirtualizeAlarmC component, which is a generic that takes the alarm precision and size as parameters. User code must instantiate new instances of a component where the precision and size are coded into the compnent name. To ease maintenance, only the MuxAlarmMilli32* files are maintained: all other precision/size combinations are derived from those by running the script generate.sh. The list of files that are derived are maintained in the file generated.lst, which itself is generated as a side effect of running generate.sh. When attempting to understand the system and do basic maintainance, it may be worth running: cat generated.lst | xargs rm to clear the clutter out of the way. tinyos-2.1.2+dfsg/tos/lib/timer/Timer.h000066400000000000000000000043001207233610700177020ustar00rootroot00000000000000//$Id: Timer.h,v 1.6 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp // The TinyOS Timer structures are discussed in TEP 102. #ifndef TIMER_H #define TIMER_H // @note TSecond is an extension to be added in a successor to TEP 102 typedef struct { int notUsed; } TSecond; typedef struct { int notUsed; } TMilli; typedef struct { int notUsed; } T32khz; typedef struct { int notUsed; } TMicro; #define UQ_TIMER_SECOND "HilTimerMicroC.Timer" #define UQ_TIMER_MILLI "HilTimerMilliC.Timer" #define UQ_TIMER_32KHZ "HilTimer32khzC.Timer" #define UQ_TIMER_MICRO "HilTimerMicroC.Timer" #endif tinyos-2.1.2+dfsg/tos/lib/timer/Timer.nc000066400000000000000000000125371207233610700200660ustar00rootroot00000000000000//$Id: Timer.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Timer.h" /** * A Timer is TinyOS's general purpose timing interface. For more precise * timing, you may wish to use a (platform-specific) component offering * an Alarm interface. * *

      A Timer is parameterised by its "precision" (milliseconds, * microseconds, etc), identified by a type. This prevents, e.g., * unintentionally mixing components expecting milliseconds with those * expecting microseconds as those interfaces have a different type. * *

      See TEP102 for more details. * * @param precision_tag A type indicating the precision of this Alarm. * * @author Cory Sharp */ interface Timer { // basic interface /** * Set a periodic timer to repeat every dt time units. Replaces any * current timer settings. Equivalent to startPeriodicAt(getNow(), * dt). The fired will be signaled every dt units (first * event in dt units). * * @param dt Time until the timer fires. */ command void startPeriodic(uint32_t dt); /** * Set a single-short timer to some time units in the future. Replaces * any current timer settings. Equivalent to startOneShotAt(getNow(), * dt). The fired will be signaled when the timer expires. * * @param dt Time until the timer fires. */ command void startOneShot(uint32_t dt); /** * Cancel a timer. */ command void stop(); /** * Signaled when the timer expires (one-shot) or repeats (periodic). */ event void fired(); // extended interface /** * Check if timer is running. Periodic timers run until stopped or * replaced, one-shot timers run until their deadline expires. * * @return TRUE if the timer is still running. */ command bool isRunning(); /** * Check if this is a one-shot timer. * @return TRUE for one-shot timers, FALSE for periodic timers. */ command bool isOneShot(); /** * Set a periodic timer to repeat every dt time units. Replaces any * current timer settings. The fired will be signaled every * dt units (first event at t0+dt units). Periodic timers set in the past * will get a bunch of events in succession, until the timer "catches up". * *

      Because the current time may wrap around, it is possible to use * values of t0 greater than the getNow's result. These * values represent times in the past, i.e., the time at which getNow() * would last of returned that value. * * @param t0 Base time for timer. * @param dt Time until the timer fires. */ command void startPeriodicAt(uint32_t t0, uint32_t dt); /** * Set a single-short timer to time t0+dt. Replaces any current timer * settings. The fired will be signaled when the timer * expires. Timers set in the past will fire "soon". * *

      Because the current time may wrap around, it is possible to use * values of t0 greater than the getNow's result. These * values represent times in the past, i.e., the time at which getNow() * would last of returned that value. * * @param t0 Base time for timer. * @param dt Time until the timer fires. */ command void startOneShotAt(uint32_t t0, uint32_t dt); /** * Return the current time. * @return Current time. */ command uint32_t getNow(); /** * Return the time anchor for the previously started timer or the time of * the previous event for periodic timers. The next fired event will occur * at gett0() + getdt(). * @return Timer's base time. */ command uint32_t gett0(); /** * Return the delay or period for the previously started timer. The next * fired event will occur at gett0() + getdt(). * @return Timer's interval. */ command uint32_t getdt(); } tinyos-2.1.2+dfsg/tos/lib/timer/TransformAlarmC.nc000066400000000000000000000117151207233610700220360ustar00rootroot00000000000000//$Id: TransformAlarmC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TransformAlarmC decreases precision and/or widens an Alarm. An already * widened Counter component is used to help. * *

      See TEP102 for more details. * @param to_precision_tag A type indicating the precision of the transformed * Alarm. * @param to_size_type The type for the width of the transformed Alarm. * @param from_precision_tag A type indicating the precision of the original * Alarm. * @param from_size_type The type for the width of the original Alarm. * @param bit_shift_right Original time units will be 2 to the power * bit_shift_right larger than transformed time units. * * @author Cory Sharp */ generic module TransformAlarmC( typedef to_precision_tag, typedef to_size_type @integer(), typedef from_precision_tag, typedef from_size_type @integer(), uint8_t bit_shift_right) @safe() { /** * The transformed Alarm. */ provides interface Alarm; /** * Users of this component must wire Counter to an already-widened * Counter (with the same precision as the new Alarm). See * TransformCounterC for one possible implementation. */ uses interface Counter; /** * The original Alarm. */ uses interface Alarm as AlarmFrom; } implementation { to_size_type m_t0; to_size_type m_dt; enum { MAX_DELAY_LOG2 = 8 * sizeof(from_size_type) - 1 - bit_shift_right, MAX_DELAY = ((to_size_type)1) << MAX_DELAY_LOG2, }; async command to_size_type Alarm.getNow() { return call Counter.get(); } async command to_size_type Alarm.getAlarm() { atomic return m_t0 + m_dt; //return m_t0 + m_dt; } async command bool Alarm.isRunning() { return call AlarmFrom.isRunning(); } async command void Alarm.stop() { call AlarmFrom.stop(); } void set_alarm() { to_size_type now = call Counter.get(), expires, remaining; /* m_t0 is assumed to be in the past. If it's > now, we assume that time has wrapped around */ expires = m_t0 + m_dt; /* The cast is necessary to get correct wrap-around arithmetic */ remaining = (to_size_type)(expires - now); /* if (expires <= now) remaining = 0; in wrap-around arithmetic */ if (m_t0 <= now) { if (expires >= m_t0 && // if it wraps, it's > now expires <= now) remaining = 0; } else { if (expires >= m_t0 || // didn't wrap so < now expires <= now) remaining = 0; } if (remaining > MAX_DELAY) { m_t0 = now + MAX_DELAY; m_dt = remaining - MAX_DELAY; remaining = MAX_DELAY; } else { m_t0 += m_dt; m_dt = 0; } call AlarmFrom.startAt((from_size_type)now << bit_shift_right, (from_size_type)remaining << bit_shift_right); } async command void Alarm.startAt(to_size_type t0, to_size_type dt) { atomic { m_t0 = t0; m_dt = dt; set_alarm(); } } async command void Alarm.start(to_size_type dt) { call Alarm.startAt(call Alarm.getNow(), dt); } async event void AlarmFrom.fired() { atomic { if(m_dt == 0) { signal Alarm.fired(); } else { set_alarm(); } } } async event void Counter.overflow() { } default async event void Alarm.fired() { } } tinyos-2.1.2+dfsg/tos/lib/timer/TransformAlarmCounterC.nc000066400000000000000000000175531207233610700234040ustar00rootroot00000000000000//$Id: TransformAlarmCounterC.nc,v 1.7 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * TransformAlarmCounterC decreases precision and/or widens an Alarm/Counter * pair. This component has a reduced interrupt overhead compared to using * TransformAlarmC and TransformCounterC separately. However, it is not as * useful for hardware timers with multiple compare registers. * * @param to_precision_tag A type indicating the precision of the transformed * interfaces. * @param to_size_type The type for the width of the transformed interfaces. * @param from_precision_tag A type indicating the precision of the original * interfaces. * @param from_size_type The type for the width of the original interfaces. * @param bit_shift_right Original time units will be 2 to the power * bit_shift_right larger than transformed time units. * @param upper_count_type A type large enough to store the upper bits -- * those needed above from_size_type after its shift right to fill * to_size_type. * * @author Cory Sharp * @author David Gay */ generic module TransformAlarmCounterC( typedef to_precision_tag, typedef to_size_type @integer(), typedef from_precision_tag, typedef from_size_type @integer(), uint8_t bit_shift_right, typedef upper_count_type @integer() ) { provides interface Alarm as Alarm; provides interface Counter as Counter; uses interface Counter as CounterFrom; uses interface Alarm as AlarmFrom; } implementation { upper_count_type m_upper; to_size_type m_t0; to_size_type m_dt; uint8_t m_skip_overflows; enum { MAX_DELAY_LOG2 = 8 * sizeof(from_size_type) - 1 - bit_shift_right, MAX_DELAY = ((to_size_type)1) << MAX_DELAY_LOG2, }; enum { LOW_SHIFT_RIGHT = bit_shift_right, HIGH_SHIFT_LEFT = 8*sizeof(from_size_type) - LOW_SHIFT_RIGHT, NUM_UPPER_BITS = 8*sizeof(to_size_type) - 8*sizeof(from_size_type) + bit_shift_right, // 1. hack to remove warning when NUM_UPPER_BITS == 8*sizeof(upper_count_type) // 2. still provide warning if NUM_UPPER_BITS > 8*sizeof(upper_count_type) // 3. and allow for the strange case of NUM_UPPER_BITS == 0 OVERFLOW_MASK = NUM_UPPER_BITS ? ((((upper_count_type)2) << (NUM_UPPER_BITS-1)) - 1) : 0, }; void set_alarm(); async command to_size_type Counter.get() { to_size_type rv = 0; atomic { upper_count_type high = m_upper; from_size_type low = call CounterFrom.get(); if (call CounterFrom.isOverflowPending()) { // If we signalled CounterFrom.overflow, that might trigger a // Counter.overflow, which breaks atomicity. The right thing to do // increment a cached version of high without overflow signals. // m_upper will be handled normally as soon as the out-most atomic // block is left unless Clear.clearOverflow is called in the interim. // This is all together the expected behavior. high++; low = call CounterFrom.get(); } { to_size_type high_to = high; to_size_type low_to = low >> LOW_SHIFT_RIGHT; rv = (high_to << HIGH_SHIFT_LEFT) | low_to; } } return rv; } // isOverflowPending only makes sense when it's already part of a larger // async block, so there's no async inside the command itself, where it // wouldn't do anything useful. async command bool Counter.isOverflowPending() { return ((m_upper & OVERFLOW_MASK) == OVERFLOW_MASK) && call CounterFrom.isOverflowPending(); } // clearOverflow also only makes sense inside a larger atomic block, but we // include the inner atomic block to ensure consistent internal state just in // case someone calls it non-atomically. async command void Counter.clearOverflow() { atomic { if (call Counter.isOverflowPending()) { m_upper++; call CounterFrom.clearOverflow(); } } } async event void CounterFrom.overflow() { atomic { m_upper++; if ((m_upper & OVERFLOW_MASK) == 0) signal Counter.overflow(); if (m_skip_overflows && !--m_skip_overflows) set_alarm(); } } async command to_size_type Alarm.getNow() { return call Counter.get(); } async command to_size_type Alarm.getAlarm() { atomic return m_t0 + m_dt; } async command bool Alarm.isRunning() { atomic return call AlarmFrom.isRunning() || m_skip_overflows; } async command void Alarm.stop() { call AlarmFrom.stop(); } void set_alarm() { to_size_type now = call Counter.get(), elapsed = now - m_t0, remaining; m_skip_overflows = 0; if (elapsed >= m_dt) { remaining = 0; m_t0 += m_dt; m_dt = 0; } else { remaining = m_dt - elapsed; /* MAX_DELAY is 1/2 an underlying counter overflow time. Just count overflows if the timer is far in the future, and we'll set an alarm once we're close to the deadline. */ if (remaining > MAX_DELAY * 2) { if (remaining >= MAX_DELAY * 2 * (to_size_type)256) m_skip_overflows = 255; else m_skip_overflows = remaining / (MAX_DELAY * 2); return; } if (remaining > MAX_DELAY) { m_t0 = now + MAX_DELAY; m_dt = remaining - MAX_DELAY; remaining = MAX_DELAY; } else { m_t0 += m_dt; m_dt = 0; } } call AlarmFrom.startAt((from_size_type)now << bit_shift_right, (from_size_type)remaining << bit_shift_right); } async command void Alarm.startAt(to_size_type t0, to_size_type dt) { atomic { m_t0 = t0; m_dt = dt; set_alarm(); } } async command void Alarm.start(to_size_type dt) { call Alarm.startAt(call Alarm.getNow(), dt); } async event void AlarmFrom.fired() { atomic { if (m_dt == 0) { signal Alarm.fired(); } else { set_alarm(); } } } default async event void Alarm.fired() { } default async event void Counter.overflow() { } } tinyos-2.1.2+dfsg/tos/lib/timer/TransformCounterC.nc000066400000000000000000000120731207233610700224170ustar00rootroot00000000000000//$Id: TransformCounterC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TransformCounterC decreases precision and/or widens an Counter. * *

      See TEP102 for more details. * * @param to_precision_tag A type indicating the precision of the transformed * Counter. * @param to_size_type The type for the width of the transformed Counter. * @param from_precision_tag A type indicating the precision of the original * Counter. * @param from_size_type The type for the width of the original Counter. * @param bit_shift_right Original time units will be 2 to the power * bit_shift_right larger than transformed time units. * @param upper_count_type A type large enough to store the upper bits -- * those needed above from_size_type after its shift right to fill * to_size_type. * * @author Cory Sharp */ generic module TransformCounterC( typedef to_precision_tag, typedef to_size_type @integer(), typedef from_precision_tag, typedef from_size_type @integer(), uint8_t bit_shift_right, typedef upper_count_type @integer()) @safe() { provides interface Counter as Counter; uses interface Counter as CounterFrom; } implementation { upper_count_type m_upper; enum { LOW_SHIFT_RIGHT = bit_shift_right, HIGH_SHIFT_LEFT = 8*sizeof(from_size_type) - LOW_SHIFT_RIGHT, NUM_UPPER_BITS = 8*sizeof(to_size_type) - 8*sizeof(from_size_type) + bit_shift_right, // 1. hack to remove warning when NUM_UPPER_BITS == 8*sizeof(upper_count_type) // 2. still provide warning if NUM_UPPER_BITS > 8*sizeof(upper_count_type) // 3. and allow for the strange case of NUM_UPPER_BITS == 0 OVERFLOW_MASK = NUM_UPPER_BITS ? ((((upper_count_type)2) << (NUM_UPPER_BITS-1)) - 1) : 0, }; async command to_size_type Counter.get() { to_size_type rv = 0; atomic { upper_count_type high = m_upper; from_size_type low = call CounterFrom.get(); if (call CounterFrom.isOverflowPending()) { // If we signalled CounterFrom.overflow, that might trigger a // Counter.overflow, which breaks atomicity. The right thing to do // increment a cached version of high without overflow signals. // m_upper will be handled normally as soon as the out-most atomic // block is left unless Clear.clearOverflow is called in the interim. // This is all together the expected behavior. high++; low = call CounterFrom.get(); } { to_size_type high_to = high; to_size_type low_to = low >> LOW_SHIFT_RIGHT; rv = (high_to << HIGH_SHIFT_LEFT) | low_to; } } return rv; } // isOverflowPending only makes sense when it's already part of a larger // async block, so there's no async inside the command itself, where it // wouldn't do anything useful. async command bool Counter.isOverflowPending() { return ((m_upper & OVERFLOW_MASK) == OVERFLOW_MASK) && call CounterFrom.isOverflowPending(); } // clearOverflow also only makes sense inside a larger atomic block, but we // include the inner atomic block to ensure consistent internal state just in // case someone calls it non-atomically. async command void Counter.clearOverflow() { atomic { if (call Counter.isOverflowPending()) { m_upper++; call CounterFrom.clearOverflow(); } } } async event void CounterFrom.overflow() { atomic { m_upper++; if ((m_upper & OVERFLOW_MASK) == 0) signal Counter.overflow(); } } } tinyos-2.1.2+dfsg/tos/lib/timer/VirtualizeAlarmC.nc000066400000000000000000000150071207233610700222170ustar00rootroot00000000000000//$Id: VirtualizeAlarmC.nc,v 1.8 2010-06-29 22:07:50 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * VirtualizeAlarmC uses a single Alarm to create up to 255 virtual alarms. * Note that a virtualized Alarm will have significantly more overhead than * an Alarm built on a hardware compare register. * * @param precision_tag A type indicating the precision of the Alarm being * virtualized. * @param num_alarms Number of virtual alarms to create. * * @author Cory Sharp */ generic module VirtualizeAlarmC(typedef precision_tag, typedef size_type @integer(), int num_alarms) { provides interface Init; provides interface Alarm as Alarm[uint8_t id]; uses interface Alarm as AlarmFrom; } implementation { enum { NUM_ALARMS = num_alarms, }; typedef struct { size_type t0; size_type dt; } alarm_t; // css 26 jul 2006: All computations with respect to the current time ("now") // require that "now" is (non-strictly) monotonically increasing. Calling // setNextAlarm within Alarm.start within Alarm.fired within signalAlarms // breaks this monotonicity requirements when "now" is cached at the start of // the function. Two ways around this: 1) refresh "now" each time it is // used, or 2) use the is_signaling flag to prevent setNextAlarm from being // called inside signalAlarms. The latter is generally more efficient by // preventing redundant calls to setNextAlarm at the expense of an extra byte // of RAM, so that's what the code does now. Update: option 2 is // unacceptable because an Alarm.start could be called within some other // Alarm.fired, which can break monotonicity in now. // A struct of member variables so only one memset is called for init. struct { alarm_t alarm[NUM_ALARMS]; bool isset[NUM_ALARMS]; bool is_signaling; } m; command error_t Init.init() { memset( &m, 0, sizeof(m) ); return SUCCESS; } void setNextAlarm() { if( !m.is_signaling ) { // css 25 jul 2006: To help prevent various problems with overflow, the // elapsed time from t0 for a particular alarm is calculated as // elapsed=now-t0 then dt-=elapsed and t0=now. However, this means that // now must be a monotonically increasing value with each call to // setNextAlarm -- overflow in now is okay, but passing in older values of // now=t0 for some arbitrary t0 is not okay, which is what the previous // version of setAlarm did. const size_type now = call AlarmFrom.getNow(); const alarm_t* pEnd = m.alarm+NUM_ALARMS; bool isset = FALSE; alarm_t* p = m.alarm; bool* pset = m.isset; size_type dt = ((size_type)0)-((size_type)1); for( ; p!=pEnd; p++,pset++ ) { if( *pset ) { size_type elapsed = now - p->t0; if( p->dt <= elapsed ) { p->t0 += p->dt; p->dt = 0; } else { p->t0 = now; p->dt -= elapsed; } if( p->dt <= dt ) { dt = p->dt; isset = TRUE; } } } if( isset ) { // css 25 jul 2006: If dt is big, then wait half of dt. This helps // significantly reduce the chance of overflow in the elapsed calculation // for the alarm. "big" is if the most signficant bit in dt is set. if( dt & (((size_type)1) << (8*sizeof(size_type)-1)) ) dt >>= 1; call AlarmFrom.startAt( now, dt ); } else { call AlarmFrom.stop(); } } } void signalAlarms() { uint8_t id; m.is_signaling = TRUE; for( id=0; idSee TEP102 for more details. * * @param precision_tag A type indicating the precision of the Timer being * virtualized. * @param max_timers Number of virtual timers to create. * * @author Cory Sharp */ generic module VirtualizeTimerC(typedef precision_tag, int max_timers) @safe() { provides interface Timer as Timer[uint8_t num]; uses interface Timer as TimerFrom; } implementation { enum { NUM_TIMERS = max_timers, END_OF_LIST = 255, }; typedef struct { uint32_t t0; uint32_t dt; bool isoneshot : 1; bool isrunning : 1; bool _reserved : 6; } Timer_t; Timer_t m_timers[NUM_TIMERS]; bool m_timers_changed; task void updateFromTimer(); void fireTimers(uint32_t now) { uint16_t num; for (num=0; numisrunning) { uint32_t elapsed = now - timer->t0; if (elapsed >= timer->dt) { if (timer->isoneshot) timer->isrunning = FALSE; else // Update timer for next event timer->t0 += timer->dt; signal Timer.fired[num](); break; } } } post updateFromTimer(); } task void updateFromTimer() { /* This code supports a maximum dt of MAXINT. If min_remaining and remaining were switched to uint32_t, and the logic changed a little, dt's up to 2^32-1 should work (but at a slightly higher runtime cost). */ uint32_t now = call TimerFrom.getNow(); int32_t min_remaining = (1UL << 31) - 1; /* max int32_t */ bool min_remaining_isset = FALSE; uint16_t num; call TimerFrom.stop(); for (num=0; numisrunning) { uint32_t elapsed = now - timer->t0; int32_t remaining = timer->dt - elapsed; if (remaining < min_remaining) { min_remaining = remaining; min_remaining_isset = TRUE; } } } if (min_remaining_isset) { if (min_remaining <= 0) fireTimers(now); else call TimerFrom.startOneShotAt(now, min_remaining); } } event void TimerFrom.fired() { fireTimers(call TimerFrom.getNow()); } void startTimer(uint8_t num, uint32_t t0, uint32_t dt, bool isoneshot) { Timer_t* timer = &m_timers[num]; timer->t0 = t0; timer->dt = dt; timer->isoneshot = isoneshot; timer->isrunning = TRUE; post updateFromTimer(); } command void Timer.startPeriodic[uint8_t num](uint32_t dt) { startTimer(num, call TimerFrom.getNow(), dt, FALSE); } command void Timer.startOneShot[uint8_t num](uint32_t dt) { startTimer(num, call TimerFrom.getNow(), dt, TRUE); } command void Timer.stop[uint8_t num]() { m_timers[num].isrunning = FALSE; } command bool Timer.isRunning[uint8_t num]() { return m_timers[num].isrunning; } command bool Timer.isOneShot[uint8_t num]() { return m_timers[num].isoneshot; } command void Timer.startPeriodicAt[uint8_t num](uint32_t t0, uint32_t dt) { startTimer(num, t0, dt, FALSE); } command void Timer.startOneShotAt[uint8_t num](uint32_t t0, uint32_t dt) { startTimer(num, t0, dt, TRUE); } command uint32_t Timer.getNow[uint8_t num]() { return call TimerFrom.getNow(); } command uint32_t Timer.gett0[uint8_t num]() { return m_timers[num].t0; } command uint32_t Timer.getdt[uint8_t num]() { return m_timers[num].dt; } default event void Timer.fired[uint8_t num]() { } } tinyos-2.1.2+dfsg/tos/lib/timer/generate.sh000066400000000000000000000030331207233610700206010ustar00rootroot00000000000000#!/bin/sh # # Given implementations for USCI_A0 and USCI_B0, generate equivalent # configurations for the higher-numbered module instances. # # Much of the USCI implementation is identical except for varying # based on the instance number of the module to which a component # belongs. To avoid implementation divergence, we maintain and evolve # only one of each type of component, and generate the remainder from # that template. # # @author Peter A. Bigot # List of precision tags PREC_TAGS="Second Milli 32khz" # List of size tags SIZE_TAGS="16 32" # Initialize a file that will contain a list of all generated files, # so we can remove them during basic maintenance. Their presence # clutters the directory and makes it difficult to see what's really # important. rm -f generated.lst BASIS_PREC=Milli BASIS_SIZE=32 clone_module () { source="$1" ; shift prec="$1" ; shift size="$1" ; shift sed_args="-e s@${BASIS_SIZE}@${size}@g -e s@${BASIS_PREC}@${prec}@g" target=$(echo ${source} | sed ${sed_args}) ( cat< ${target} echo ${target} >> generated.lst } for p in ${PREC_TAGS} ; do for s in ${SIZE_TAGS} ; do if [ "${BASIS_PREC}" = "${p}" -a "${BASIS_SIZE}" = "${s}" ] ; then continue fi clone_module MuxAlarm${BASIS_PREC}${BASIS_SIZE}C.nc ${p} ${s} clone_module MuxAlarm${BASIS_PREC}${BASIS_SIZE}C_.nc ${p} ${s} done done tinyos-2.1.2+dfsg/tos/lib/timer/generated.lst000066400000000000000000000003211207233610700211320ustar00rootroot00000000000000MuxAlarmSecond16C.nc MuxAlarmSecond16C_.nc MuxAlarmSecond32C.nc MuxAlarmSecond32C_.nc MuxAlarmMilli16C.nc MuxAlarmMilli16C_.nc MuxAlarm32khz16C.nc MuxAlarm32khz16C_.nc MuxAlarm32khz32C.nc MuxAlarm32khz32C_.nc tinyos-2.1.2+dfsg/tos/lib/timer/tests/000077500000000000000000000000001207233610700176165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/000077500000000000000000000000001207233610700213275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/Makefile000066400000000000000000000001331207233610700227640ustar00rootroot00000000000000COMPONENT=TestAppC TOSMAKE_PATH += . PFLAGS += -I$(TOSDIR)/lib/printf include $(MAKERULES) tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/README000066400000000000000000000011271207233610700222100ustar00rootroot00000000000000For full tests, do: 1) Test builds of all variants for different alarm counts: sh buildset.sh This verifies the builds, shows that only a limited number of alarms are available when usemux is off, and displays the size in ROM and RAM for each configuration to help assess the cost of using different types of timers/alarms. 2) Test multiple millisecond timers: make tmote usemux,1 install Led N should toggle at 8/(2^N) times per second 3) Test multiple whole-second timers make surf osian usemux,1 useprec,Second install Led N should toggle at 2^N second intervals tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/TestAppC.nc000066400000000000000000000035741207233610700233450ustar00rootroot00000000000000#include "config.h" configuration TestAppC { } implementation { components TestP; components MainC; TestP.Boot -> MainC; #if USE_MUX #define MaybeMuxAlarmC MuxAlarmPrecC #endif /* USE_MUX */ #if USE_TIMER #define MaybeMuxAlarmC TimerPrecC #endif /* USE_TIMER */ #ifndef MaybeMuxAlarmC #define MaybeMuxAlarmC AlarmPrecC #endif /* MaybeMuxAlarmC */ #include "PlatformLed.h" #if USE_LEDS components LedC; TestP.Led0 -> LedC.Led0; TestP.Led1 -> LedC.Led1; TestP.Led2 -> LedC.Led2; #if 3 < PLATFORM_LED_COUNT TestP.Led3 -> LedC.Led3; #if 4 < PLATFORM_LED_COUNT TestP.Led4 -> LedC.Led4; #if 5 < PLATFORM_LED_COUNT TestP.Led5 -> LedC.Led4; #if 6 < PLATFORM_LED_COUNT TestP.Led6 -> LedC.Led4; #if 7 < PLATFORM_LED_COUNT TestP.Led7 -> LedC.Led4; #endif /* 7 < PLATFORM_LED_COUNT */ #endif /* 6 < PLATFORM_LED_COUNT */ #endif /* 5 < PLATFORM_LED_COUNT */ #endif /* 4 < PLATFORM_LED_COUNT */ #endif /* 3 < PLATFORM_LED_COUNT */ #endif /* USE_LEDS */ components new MaybeMuxAlarmC() as Alarm0C; TestP.Alarm0 -> Alarm0C; #if 1 < ALARM_COUNT components new MaybeMuxAlarmC() as Alarm1C; TestP.Alarm1 -> Alarm1C; #if 2 < ALARM_COUNT components new MaybeMuxAlarmC() as Alarm2C; TestP.Alarm2 -> Alarm2C; #if 3 < ALARM_COUNT components new MaybeMuxAlarmC() as Alarm3C; TestP.Alarm3 -> Alarm3C; #if 4 < ALARM_COUNT components new MaybeMuxAlarmC() as Alarm4C; TestP.Alarm4 -> Alarm4C; #if 5 < ALARM_COUNT components new MaybeMuxAlarmC() as Alarm5C; TestP.Alarm5 -> Alarm5C; #if 6 < ALARM_COUNT components new MaybeMuxAlarmC() as Alarm6C; TestP.Alarm6 -> Alarm6C; #if 7 < ALARM_COUNT components new MaybeMuxAlarmC() as Alarm7C; TestP.Alarm7 -> Alarm7C; #endif /* ALARM_COUNT 7 */ #endif /* ALARM_COUNT 6 */ #endif /* ALARM_COUNT 5 */ #endif /* ALARM_COUNT 4 */ #endif /* ALARM_COUNT 3 */ #endif /* ALARM_COUNT 2 */ #endif /* ALARM_COUNT 1 */ components SerialPrintfC; } tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/TestP.nc000066400000000000000000000062431207233610700227150ustar00rootroot00000000000000#include "config.h" #include #if USE_LEDS #define TOGGLE(_n) call Led##_n.toggle() #else #define TOGGLE(_n) do { ; } while(0) #endif #if USE_TIMER #define DECL_INTERFACE(_n) interface Timer as Alarm##_n #define DEFN_FIRED(_n) \ event void Alarm##_n.fired () \ { \ TOGGLE(_n); \ call Alarm##_n.startOneShot(1UL << (_n + BASE_SHIFT)); \ } #define CALL_START(_n) call Alarm##_n.startOneShot(0) #else #define DECL_INTERFACE(_n) interface Alarm as Alarm##_n #define DEFN_FIRED(_n) \ async event void Alarm##_n.fired () \ { \ TOGGLE(_n); \ call Alarm##_n.start(1UL << (_n + BASE_SHIFT)); \ } #define CALL_START(_n) call Alarm##_n.start(0) #endif module TestP { uses { interface Boot; #if USE_LEDS interface Led as Led0; interface Led as Led1; interface Led as Led2; interface Led as Led3; interface Led as Led4; interface Led as Led5; interface Led as Led6; interface Led as Led7; #endif /* USE_LEDS */ DECL_INTERFACE(0); #if 1 < ALARM_COUNT DECL_INTERFACE(1); #if 2 < ALARM_COUNT DECL_INTERFACE(2); #if 3 < ALARM_COUNT DECL_INTERFACE(3); #if 4 < ALARM_COUNT DECL_INTERFACE(4); #if 5 < ALARM_COUNT DECL_INTERFACE(5); #if 6 < ALARM_COUNT DECL_INTERFACE(6); #if 7 < ALARM_COUNT DECL_INTERFACE(7); #endif /* ALARM_COUNT 7 */ #endif /* ALARM_COUNT 6 */ #endif /* ALARM_COUNT 5 */ #endif /* ALARM_COUNT 4 */ #endif /* ALARM_COUNT 3 */ #endif /* ALARM_COUNT 2 */ #endif /* ALARM_COUNT 1 */ } } implementation { DEFN_FIRED(0) #if 1 < ALARM_COUNT DEFN_FIRED(1) #if 2 < ALARM_COUNT DEFN_FIRED(2) #if 3 < ALARM_COUNT DEFN_FIRED(3) #if 4 < ALARM_COUNT DEFN_FIRED(4) #if 5 < ALARM_COUNT DEFN_FIRED(5) #if 6 < ALARM_COUNT DEFN_FIRED(6) #if 7 < ALARM_COUNT DEFN_FIRED(7) #endif /* ALARM_COUNT 7 */ #endif /* ALARM_COUNT 6 */ #endif /* ALARM_COUNT 5 */ #endif /* ALARM_COUNT 4 */ #endif /* ALARM_COUNT 3 */ #endif /* ALARM_COUNT 2 */ #endif /* ALARM_COUNT 1 */ #if USE_LEDS default async command void Led0.toggle() { } default async command void Led1.toggle() { } default async command void Led2.toggle() { } default async command void Led3.toggle() { } default async command void Led4.toggle() { } default async command void Led5.toggle() { } default async command void Led6.toggle() { } default async command void Led7.toggle() { } #endif event void Boot.booted () { printf("Starting with %u %s alarms\r\n", ALARM_COUNT, #if USE_TIMER "timer" #else /* USE_TIMER */ #if USE_MUX "multiplex" #else /* USE_MUX */ "standard " #endif /* USE_MUX */ #endif /* USE_TIMER */ ); CALL_START(0); #if 1 < ALARM_COUNT CALL_START(1); #if 2 < ALARM_COUNT CALL_START(2); #if 3 < ALARM_COUNT CALL_START(3); #if 4 < ALARM_COUNT CALL_START(4); #if 5 < ALARM_COUNT CALL_START(5); #if 6 < ALARM_COUNT CALL_START(6); #if 7 < ALARM_COUNT CALL_START(7); #endif /* ALARM_COUNT 7 */ #endif /* ALARM_COUNT 6 */ #endif /* ALARM_COUNT 5 */ #endif /* ALARM_COUNT 4 */ #endif /* ALARM_COUNT 3 */ #endif /* ALARM_COUNT 2 */ #endif /* ALARM_COUNT 1 */ } } tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/alarms.extra000066400000000000000000000001031207233610700236450ustar00rootroot00000000000000ifeq ($(ALARMS),) ALARMS=4 endif PFLAGS += -DALARM_COUNT=$(ALARMS) tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/buildset.sh000066400000000000000000000017531207233610700235040ustar00rootroot00000000000000PLATFORM=${PLATFORM:-tmote} echo "ROM and RAM sizes:" for prec in Second Milli 32khz ; do for mux in 0 1 ; do for alarms in 1 2 3 4 5 6 7 8; do echo -n "prec=${prec} mux=${mux} alarms=${alarms}" make ${PLATFORM} usemux,${mux} alarms,${alarms} useleds,0 useprec,${prec} \ 2>&1 | sed \ -e '1,/compiled TestAppC to/d' \ -e '/^msp430-objcopy/,$d' \ -e 's@bytes in.*$@@' \ | paste -s - mv -f build/${PLATFORM}/app.c build/${PLATFORM}/app-m${mux}-a${alarms}.c >/dev/null 2>&1 done done if [ Milli = "${prec}" ] ; then for alarms in 1 2 3 4 5 6 7 8; do echo -n "prec=${prec} timers=${alarms}" make ${PLATFORM} usetimer,1 alarms,${alarms} useleds,0 useprec,${prec} \ 2>&1 | sed \ -e '1,/compiled TestAppC to/d' \ -e '/^msp430-objcopy/,$d' \ -e 's@bytes in.*$@@' \ | paste -s - mv -f build/${PLATFORM}/app.c build/${PLATFORM}/app-timer-a${alarms}.c >/dev/null 2>&1 done fi done tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/config.h000066400000000000000000000012351207233610700227460ustar00rootroot00000000000000#ifndef _CONFIG_H_ #define _CONFIG_H_ #ifndef ALARM_COUNT #define ALARM_COUNT (5) #endif /* ALARM_COUNT */ #ifndef USE_MUX #define USE_MUX 0 #endif /* USE_MUX */ #ifndef USE_TIMER #define USE_TIMER 0 #endif /* USE_TIMER */ #ifndef USE_LEDS #define USE_LEDS 1 #endif /* USE_LEDS */ #ifndef TPrec #define TPrec TMilli #endif /* TPrec */ #ifndef AlarmPrecC #define AlarmPrecC AlarmMilli32C #endif /* AlarmPrecC */ #ifndef MuxAlarmPrecC #define MuxAlarmPrecC MuxAlarmMilli32C #endif /* AlarmPrecC */ #ifndef TimerPrecC #define TimerPrecC TimerMilliC #endif /* TimerPrecC */ #ifndef BASE_SHIFT #define BASE_SHIFT 7 #endif /* BASE_SHIFT */ #endif /* _CONFIG_H_ */ tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/useleds.extra000066400000000000000000000001031207233610700240320ustar00rootroot00000000000000ifeq ($(USELEDS),) USELEDS=1 endif PFLAGS += -DUSE_LEDS=$(USELEDS) tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/usemux.extra000066400000000000000000000000771207233610700237260ustar00rootroot00000000000000ifeq ($(USEMUX),) USEMUX=1 endif PFLAGS += -DUSE_MUX=$(USEMUX) tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/useprec.extra000066400000000000000000000003411207233610700240400ustar00rootroot00000000000000ifeq ($(USEPREC),) USEPREC=Milli endif ifeq ($(USEPREC),Second) PFLAGS += -DBASE_SHIFT=0 endif PFLAGS += -DTPrec=T$(USEPREC) -DAlarmPrecC=Alarm$(USEPREC)32C -DMuxAlarmPrecC=MuxAlarm$(USEPREC)32C -DTimerPrecC=Timer$(USEPREC)C tinyos-2.1.2+dfsg/tos/lib/timer/tests/AlarmUse/usetimer.extra000066400000000000000000000001071207233610700242270ustar00rootroot00000000000000ifeq ($(USETIMER),) USETIMER=1 endif PFLAGS += -DUSE_TIMER=$(USETIMER) tinyos-2.1.2+dfsg/tos/lib/tosboot/000077500000000000000000000000001207233610700170255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/Exec.nc000066400000000000000000000000531207233610700202310ustar00rootroot00000000000000 interface Exec { command void exec(); } tinyos-2.1.2+dfsg/tos/lib/tosboot/ExtFlash.nc000066400000000000000000000035171207233610700210730ustar00rootroot00000000000000// $Id: ExtFlash.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ interface ExtFlash { command void startRead(uint32_t addr); command uint8_t readByte(); command void stopRead(); } tinyos-2.1.2+dfsg/tos/lib/tosboot/Hardware.nc000066400000000000000000000034341207233610700211100ustar00rootroot00000000000000// $Id: Hardware.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ interface Hardware { command void init(); command void reboot(); } tinyos-2.1.2+dfsg/tos/lib/tosboot/Leds.nc000066400000000000000000000035241207233610700202420ustar00rootroot00000000000000// $Id: Leds.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ interface Leds { command void set(uint8_t ledsOn); command void flash(uint8_t a); command void glow(uint8_t a, uint8_t b); } tinyos-2.1.2+dfsg/tos/lib/tosboot/Makefile000066400000000000000000000074671207233610700205030ustar00rootroot00000000000000# $Id: Makefile,v 1.8 2010-06-29 22:07:50 scipio Exp $ # # # # Copyright (c) 2000-2005 The Regents of the University of California. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # # # # @author Jonathan Hui # COMPONENT=TosBootC TINYOS_NP= PFLAGS += -DNESC_BUILD_BINARY # ifeq ($(MAKECMDGOALS),mica2) # CFLAGS += -DTOSBOOT_START=0x1f000 -DTOSBOOT_END=0x20000 # CFLAGS += -Wl,--section-start=.text=0x1f000 # CFLAGS += -Iat45db -Iavr -Imica2 -Ilib # endif # ifeq ($(MAKECMDGOALS),mica2dot) # CFLAGS += -DTOSBOOT_START=0x1f000 -DTOSBOOT_END=0x20000 # CFLAGS += -Wl,--section-start=.text=0x1f000 # CFLAGS += -Iat45db -Iavr -Imica2dot -Ilib # endif ifeq ($(MAKECMDGOALS),micaz) CFLAGS += -DTOSBOOT_START=0x1f000 -DTOSBOOT_END=0x20000 CFLAGS += -Wl,--section-start=.text=0x1f000 CFLAGS += -Iat45db -Iavr -Imicaz -Ilib CFLAGS += -I../net/Deluge endif ifeq ($(MAKECMDGOALS),iris) CFLAGS += -DTOSBOOT_START=0x1f000 -DTOSBOOT_END=0x20000 CFLAGS += -Wl,--section-start=.text=0x1f000 CFLAGS += -Iiris -Iat45db -Iavr -Imicaz -Ilib CFLAGS += -I../net/Deluge endif # ifeq ($(MAKECMDGOALS),telosa) # CFLAGS += -DTOSBOOT_START=0x1100 -DTOSBOOT_END=0x1a00 # CFLAGS += -Iat45db -Imsp430 -Itelos -Ilib # POST_BUILD_EXTRA_DEPS += strip_iv # endif ifeq ($(MAKECMDGOALS),telosb) CFLAGS += -DTOSBOOT_START=0x4000 -DTOSBOOT_END=0x4a00 CFLAGS += -Imsp430 -Imsp430f1611 -Istm25p -Itelosb -Ilib CFLAGS += -I../net/Deluge POST_BUILD_EXTRA_DEPS += strip_iv endif ifeq ($(MAKECMDGOALS),epic) CFLAGS += -DTOSBOOT_START=0x4000 -DTOSBOOT_END=0x4a00 CFLAGS += -Imsp430 -Imsp430f1611 -Iepic -Ilib CFLAGS += -I../net/Deluge POST_BUILD_EXTRA_DEPS += strip_iv endif ifeq ($(MAKECMDGOALS),mulle) CFLAGS += -DTOSBOOT_START=0xe0000 -DTOSBOOT_END=0xeffff CFLAGS += -Iat45db -Imulle -Im16c60 -Im16c60/62p -Ilib CFLAGS += -I../net/Deluge -I../net/Deluge/extra/mulle CFLAGS += -I../net/Deluge/extra/m16c60 CFLAGS += -I../net/Deluge/extra/m16c60/62p endif ifeq ($(MAKECMDGOALS),tinynode) CFLAGS += -DTOSBOOT_START=0x4000 -DTOSBOOT_END=0x4a00 CFLAGS += -Itinynode -Imsp430 -Imsp430f1611 -Iat45db -Ilib CFLAGS += -I../net/Deluge POST_BUILD_EXTRA_DEPS += strip_iv endif strip_iv: FORCE @echo " removing interrupt vector from binary" msp430-objcopy -j .text -j .data -O ihex $(BUILDDIR)/main.exe $(BUILDDIR)/main.ihex include $(MAKERULES) tinyos-2.1.2+dfsg/tos/lib/tosboot/ProgFlash.nc000066400000000000000000000035001207233610700212320ustar00rootroot00000000000000// $Id: ProgFlash.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ interface ProgFlash { command error_t write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len); } tinyos-2.1.2+dfsg/tos/lib/tosboot/TosBoot.h000066400000000000000000000034361207233610700205750ustar00rootroot00000000000000// $Id: TosBoot.h,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_H__ #define __TOSBOOT_H__ #include "TOSBoot_platform.h" #endif tinyos-2.1.2+dfsg/tos/lib/tosboot/TosBootC.nc000066400000000000000000000045061207233610700210500ustar00rootroot00000000000000// $Id: TosBootC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #include #include #include "TosBoot.h" configuration TosBootC { } implementation { components TosBootP, ExecC, ExtFlashC, HardwareC, InternalFlashC as IntFlash, LedsC, PluginC, ProgFlashC as ProgFlash, VoltageC; TosBootP.SubInit -> ExtFlashC; TosBootP.SubControl -> ExtFlashC.StdControl; TosBootP.SubControl -> PluginC; TosBootP.Exec -> ExecC; TosBootP.ExtFlash -> ExtFlashC; TosBootP.Hardware -> HardwareC; TosBootP.IntFlash -> IntFlash; TosBootP.Leds -> LedsC; TosBootP.ProgFlash -> ProgFlash; TosBootP.Voltage -> VoltageC; } tinyos-2.1.2+dfsg/tos/lib/tosboot/TosBootP.nc000066400000000000000000000173661207233610700210750ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * */ /** * @author Jonathan Hui * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "crc.h" #include module TosBootP { uses { interface Exec; interface ExtFlash; interface Hardware; interface InternalFlash as IntFlash; interface Leds; interface ProgFlash; interface StdControl as SubControl; interface Init as SubInit; interface Voltage; } } implementation { enum { LEDS_LOWBATT = 1, LEDS_GESTURE = 7, }; enum { R_SUCCESS, R_INVALID_IMAGE_ERROR, R_PROGRAMMING_ERROR, }; void startupLeds() { uint8_t output = 0x7; uint8_t i; for (i = 3; i; i--, output >>= 1 ) call Leds.glow(output, output >> 1); } in_flash_addr_t extFlashReadAddr() { in_flash_addr_t result = 0; int8_t i; for ( i = 3; i >= 0; i-- ) result |= ((in_flash_addr_t)call ExtFlash.readByte() & 0xff) << (i*8); return result; } bool verifyBlock(ex_flash_addr_t crcAddr, ex_flash_addr_t startAddr, uint16_t len) { uint16_t crcTarget, crcTmp; // read crc call ExtFlash.startRead(crcAddr); crcTarget = (uint16_t)(call ExtFlash.readByte() & 0xff) << 8; crcTarget |= (uint16_t)(call ExtFlash.readByte() & 0xff); call ExtFlash.stopRead(); // compute crc call ExtFlash.startRead(startAddr); for ( crcTmp = 0; len; len-- ) crcTmp = crcByte(crcTmp, call ExtFlash.readByte()); call ExtFlash.stopRead(); return crcTarget == crcTmp; } bool verifyImage(ex_flash_addr_t startAddr) { uint32_t addr; uint8_t numPgs; uint8_t i; if (!verifyBlock(startAddr + offsetof(DelugeIdent,crc), startAddr, offsetof(DelugeIdent,crc))) return FALSE; // read size of image call ExtFlash.startRead(startAddr + offsetof(DelugeIdent,numPgs)); numPgs = call ExtFlash.readByte(); call ExtFlash.stopRead(); if (numPgs == 0 || numPgs == 0xff) return FALSE; startAddr += DELUGE_IDENT_SIZE; addr = DELUGE_CRC_BLOCK_SIZE; for ( i = 0; i < numPgs; i++ ) { if (!verifyBlock(startAddr + i*sizeof(uint16_t), startAddr + addr, DELUGE_BYTES_PER_PAGE)) { return FALSE; } addr += DELUGE_BYTES_PER_PAGE; } return TRUE; } error_t programImage(ex_flash_addr_t startAddr) { uint8_t buf[TOSBOOT_INT_PAGE_SIZE]; uint32_t pageAddr, newPageAddr; in_flash_addr_t intAddr; in_flash_addr_t secLength; ex_flash_addr_t curAddr; if (!verifyImage(startAddr)) return R_INVALID_IMAGE_ERROR; curAddr = startAddr + DELUGE_IDENT_SIZE + DELUGE_CRC_BLOCK_SIZE; call ExtFlash.startRead(curAddr); intAddr = extFlashReadAddr(); secLength = extFlashReadAddr(); curAddr = curAddr + 8; #if defined(PLATFORM_TELOSB) || defined (PLATFORM_EPIC) || defined (PLATFORM_TINYNODE) if (intAddr != TOSBOOT_END) { #elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) if (intAddr != 0) { #elif defined(PLATFORM_MULLE) if (intAddr != 0xA0000) { #else #error "Target platform is not currently supported by Deluge T2" #endif call ExtFlash.stopRead(); return R_INVALID_IMAGE_ERROR; } call ExtFlash.stopRead(); while ( secLength ) { pageAddr = newPageAddr = intAddr / TOSBOOT_INT_PAGE_SIZE; call ExtFlash.startRead(curAddr); // fill in ram buffer for internal program flash sector do { // check if secLength is all ones if ( secLength == 0xffffffff ) { call ExtFlash.stopRead(); return FAIL; } buf[(uint16_t)intAddr % TOSBOOT_INT_PAGE_SIZE] = call ExtFlash.readByte(); intAddr++; curAddr++; if ( --secLength == 0 ) { intAddr = extFlashReadAddr(); secLength = extFlashReadAddr(); curAddr = curAddr + 8; } newPageAddr = intAddr / TOSBOOT_INT_PAGE_SIZE; } while ( pageAddr == newPageAddr && secLength ); call ExtFlash.stopRead(); call Leds.set(pageAddr); // write out page if (call ProgFlash.write(pageAddr*TOSBOOT_INT_PAGE_SIZE, buf, TOSBOOT_INT_PAGE_SIZE) == FAIL) { return R_PROGRAMMING_ERROR; } } return R_SUCCESS; } void runApp() { call SubControl.stop(); call Exec.exec(); } void startupSequence() { BootArgs args; // check voltage and make sure flash can be programmed // if not, just run the app, can't check for gestures // if we can't write to the internal flash anyway if ( !call Voltage.okToProgram() ) { // give user some time and count down LEDs call Leds.flash(LEDS_LOWBATT); startupLeds(); runApp(); } // get current value of counter call IntFlash.read((uint8_t*)TOSBOOT_ARGS_ADDR, &args, sizeof(args)); // increment gesture counter, see if it exceeds threshold if ( ++args.gestureCount >= TOSBOOT_GESTURE_MAX_COUNT - 1 ) { // gesture has been detected, display receipt of gesture on LEDs call Leds.flash(LEDS_GESTURE); // load golden image from flash // if the golden image is invalid, forget about reprogramming // if an error happened during reprogramming, reboot and try again // not much else we can do :-/ if (programImage(TOSBOOT_GOLDEN_IMG_ADDR) == R_PROGRAMMING_ERROR) { call Hardware.reboot(); } } else { // update gesture counter call IntFlash.write((uint8_t*)TOSBOOT_ARGS_ADDR, &args, sizeof(args)); if ( !args.noReprogram ) { // if an error happened during reprogramming, reboot and try again // after two tries, try programming the golden image if (programImage(args.imageAddr) == R_PROGRAMMING_ERROR) { call Hardware.reboot(); } } } // give user some time and count down LEDs startupLeds(); // reset counter and reprogramming flag args.gestureCount = 0xff; args.noReprogram = TRUE; call IntFlash.write((uint8_t*)TOSBOOT_ARGS_ADDR, &args, sizeof(args)); runApp(); } int main() @C() @spontaneous() { __nesc_disable_interrupt(); TOSH_SET_PIN_DIRECTIONS(); call Hardware.init(); call SubInit.init(); call SubControl.start(); startupSequence(); return 0; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/Voltage.nc000066400000000000000000000034101207233610700207460ustar00rootroot00000000000000// $Id: Voltage.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ interface Voltage { command bool okToProgram(); } tinyos-2.1.2+dfsg/tos/lib/tosboot/at45db/000077500000000000000000000000001207233610700201105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/at45db/ExtFlashC.nc000066400000000000000000000072271207233610700222630ustar00rootroot00000000000000// $Id: ExtFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module ExtFlashC { provides { interface Init; interface StdControl; interface ExtFlash; } } implementation { uint32_t addr; command error_t Init.init() { TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_SET_FLASH_CS_PIN(); TOSH_MAKE_FLASH_CLK_OUTPUT(); TOSH_CLR_FLASH_CLK_PIN(); TOSH_MAKE_FLASH_OUT_OUTPUT(); TOSH_SET_FLASH_OUT_PIN(); TOSH_MAKE_FLASH_IN_INPUT(); TOSH_CLR_FLASH_IN_PIN(); return SUCCESS; } command error_t StdControl.start() { return SUCCESS; } command error_t StdControl.stop() { return SUCCESS; } uint8_t SPIByte(uint8_t out) { uint8_t in = 0; uint8_t i; for ( i = 0; i < 8; i++, out <<= 1 ) { // write bit if (out & 0x80) TOSH_SET_FLASH_OUT_PIN(); else TOSH_CLR_FLASH_OUT_PIN(); // clock TOSH_SET_FLASH_CLK_PIN(); // read bit in <<= 1; if (TOSH_READ_FLASH_IN_PIN()) in |= 1; // clock TOSH_CLR_FLASH_CLK_PIN(); } return in; } command void ExtFlash.startRead(uint32_t newAddr) { uint8_t cmdBuf[4]; uint8_t i; addr = newAddr; #if defined(PLATFORM_MULLE) cmdBuf[0] = 0x68; cmdBuf[1] = (addr >> 15); cmdBuf[2] = ((addr >> 7) & 0xFC) + ((addr >> 8) & 0x1); cmdBuf[3] = addr & 0xff; #else cmdBuf[0] = 0x68; cmdBuf[1] = (addr >> 15) & 0xff; cmdBuf[2] = (addr >> 7) & 0xfe; cmdBuf[3] = addr & 0xff; #endif TOSH_CLR_FLASH_CLK_PIN(); TOSH_CLR_FLASH_CS_PIN(); for(i = 0; i < 4; i++) SPIByte(cmdBuf[i]); for(i = 0; i < 4; i++) SPIByte(0x0); TOSH_SET_FLASH_CLK_PIN(); TOSH_CLR_FLASH_CLK_PIN(); } command uint8_t ExtFlash.readByte() { #if defined(PLATFORM_MULLE) if (!(addr & 0x1ff)) { #else if (!(addr & 0xff)) { #endif call ExtFlash.stopRead(); call ExtFlash.startRead(addr); } addr++; return SPIByte(0); } command void ExtFlash.stopRead() { TOSH_SET_FLASH_CS_PIN(); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/avr/000077500000000000000000000000001207233610700176155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/avr/HardwareC.nc000066400000000000000000000036271207233610700220070ustar00rootroot00000000000000// $Id: HardwareC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module HardwareC { provides { interface Hardware; } } implementation { command void Hardware.init() {} command void Hardware.reboot() { wdt_enable(1); while(1); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/avr/InternalFlashC.nc000066400000000000000000000045531207233610700230030ustar00rootroot00000000000000// $Id: InternalFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #include module InternalFlashC { provides interface InternalFlash; } implementation { command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) { uint8_t *addrPtr = (uint8_t*)addr; uint8_t *bufPtr = (uint8_t*)buf; for ( ; size; size-- ) eeprom_write_byte(addrPtr++, *bufPtr++); while(!eeprom_is_ready()); return SUCCESS; } command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) { uint8_t *addrPtr = (uint8_t*)addr; uint8_t *bufPtr = (uint8_t*)buf; for ( ; size; size-- ) *bufPtr++ = eeprom_read_byte(addrPtr++); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/avr/ProgFlashC.nc000066400000000000000000000045271207233610700221370ustar00rootroot00000000000000// $Id: ProgFlashC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module ProgFlashC { provides { interface ProgFlash; } } implementation { #include command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len) { uint16_t* wordBuf = (uint16_t*)buf; uint32_t i; if ( addr + len > TOSBOOT_START ) return FAIL; boot_page_erase_safe( addr ); while( boot_rww_busy() ) boot_rww_enable_safe(); for ( i = 0; i < len; i += 2 ) boot_page_fill_safe( addr + i, *wordBuf++ ); boot_page_write_safe( addr ); while ( boot_rww_busy() ) boot_rww_enable_safe(); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/crc.h000066400000000000000000000046731207233610700177570ustar00rootroot00000000000000// $Id: crc.h,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Default CRC function. Note that avrmote has a much more efficient one. * * This CRC-16 function produces a 16-bit running CRC that adheres to the * ITU-T CRC standard. * * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1 * */ uint16_t crcByte(uint16_t crc, uint8_t b) { uint8_t i; crc = crc ^ b << 8; i = 8; do if (crc & 0x8000) crc = crc << 1 ^ 0x1021; else crc = crc << 1; while (--i); return crc; } tinyos-2.1.2+dfsg/tos/lib/tosboot/epic/000077500000000000000000000000001207233610700177455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/epic/ExtFlashC.nc000066400000000000000000000037741207233610700221230ustar00rootroot00000000000000// $Id: ExtFlashC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ configuration ExtFlashC { provides { interface Init; interface StdControl; interface ExtFlash; } } implementation { components ExtFlashP, HplUsart0C; Init = ExtFlashP; StdControl = ExtFlashP; ExtFlash = ExtFlashP; ExtFlashP.UsartControl -> HplUsart0C; } tinyos-2.1.2+dfsg/tos/lib/tosboot/epic/ExtFlashP.nc000066400000000000000000000061371207233610700221340ustar00rootroot00000000000000// $Id: ExtFlashP.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui * @author Razvan Musaloiu-E. */ module ExtFlashP { provides { interface StdControl; interface Init; interface ExtFlash; } uses { interface HplUsartControl as UsartControl; } } implementation { uint32_t addr; command error_t Init.init() { TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_SET_FLASH_CS_PIN(); call UsartControl.setModeSPI(); return SUCCESS; } command error_t StdControl.start() { return SUCCESS; } command error_t StdControl.stop() { call UsartControl.disableSPI(); return SUCCESS; } command void ExtFlash.startRead(uint32_t newAddr) { uint8_t cmd[4]; uint8_t i; uint32_t page = newAddr / 512; uint32_t offset = newAddr % 512; addr = newAddr; cmd[0] = 0x03; cmd[1] = page >> 6; cmd[2] = (page << 2) | (offset >> 8); cmd[3] = offset; TOSH_CLR_FLASH_CS_PIN(); for ( i = 0; i < sizeof(cmd); i++ ) { call UsartControl.tx(cmd[i]); while(call UsartControl.isTxEmpty() != SUCCESS); } } command uint8_t ExtFlash.readByte() { if (!(addr & 0x1ff)) { call ExtFlash.stopRead(); call ExtFlash.startRead(addr); } addr++; call UsartControl.rx(); call UsartControl.tx(0); while(call UsartControl.isRxIntrPending() != SUCCESS); return call UsartControl.rx(); } command void ExtFlash.stopRead() { TOSH_SET_FLASH_CS_PIN(); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/epic/hardware.h000066400000000000000000000052071207233610700217170ustar00rootroot00000000000000// $Id: hardware.h,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #ifndef __HARDWARE_H__ #define __HARDWARE_H__ #include "msp430hardware.h" // internal flash is 16 bits in width typedef uint16_t in_flash_addr_t; // external flash is 32 bits in width typedef uint32_t ex_flash_addr_t; void wait(uint16_t t) { for ( ; t > 0; t-- ); } // LEDs TOSH_ASSIGN_PIN(RED_LED, 4, 0); TOSH_ASSIGN_PIN(GREEN_LED, 4, 3); TOSH_ASSIGN_PIN(YELLOW_LED, 4, 7); // UART pins TOSH_ASSIGN_PIN(SOMI0, 3, 2); TOSH_ASSIGN_PIN(SIMO0, 3, 1); TOSH_ASSIGN_PIN(UCLK0, 3, 3); TOSH_ASSIGN_PIN(UTXD0, 3, 4); TOSH_ASSIGN_PIN(URXD0, 3, 5); // User Interupt Pin TOSH_ASSIGN_PIN(USERINT, 2, 7); // FLASH TOSH_ASSIGN_PIN(FLASH_CS, 4, 4); void TOSH_SET_PIN_DIRECTIONS(void) { P3SEL = 0x0E; // set SPI and I2C to mod func P1DIR = 0xe0; P1OUT = 0x00; P2DIR = 0x7b; P2OUT = 0x10; P3DIR = 0xf1; P3OUT = 0x00; P4DIR = 0xfd; P4OUT = 0xdd; P5DIR = 0xff; P5OUT = 0xff; P6DIR = 0xff; P6OUT = 0x00; } #endif tinyos-2.1.2+dfsg/tos/lib/tosboot/iris/000077500000000000000000000000001207233610700177735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/iris/HardwareC.nc000066400000000000000000000072521207233610700221630ustar00rootroot00000000000000// $Id: HardwareC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui * @author Janos Sallai */ #include module HardwareC { provides { interface Hardware; } } implementation { command void Hardware.init() { // disable watchdog (if accidentally left on) MCUSR = 0; wdt_disable(); } command void Hardware.reboot() { // enable watchdog wdt_enable(WDTO_1S); // enter infinite loop while(1); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/iris/ProgFlashC.nc000066400000000000000000000044501207233610700223100ustar00rootroot00000000000000// $Id: ProgFlashC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #include module ProgFlashC { provides { interface ProgFlash; } } implementation { command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len) { uint16_t* wordBuf = (uint16_t*)buf; uint32_t i; if ( addr + len > TOSBOOT_START ) return FAIL; boot_page_erase( addr ); while( boot_rww_busy() ) boot_rww_enable(); for ( i = 0; i < len; i += 2 ) boot_page_fill( addr + i, *wordBuf++ ); boot_page_write( addr ); while ( boot_rww_busy() ) boot_rww_enable(); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/iris/VoltageC.nc000066400000000000000000000075311207233610700220270ustar00rootroot00000000000000// $Id: VoltageC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui * @author Janos Sallai */ module VoltageC { provides { interface Voltage; } } implementation { command bool Voltage.okToProgram() { // 250 KHz ADC clock (4MHz/16) outp( 0x04, ADCSRA ); // clear interrupt flag by writing a 1 sbi( ADCSRA, ADIF ); // setup input channel outp( VOLTAGE_PORT, ADMUX ); // adc enable sbi( ADCSRA, ADEN ); // adc start conversion sbi( ADCSRA, ADSC ); // wait for conversion to complete while ( !bit_is_set( ADCSRA, ADIF ) ); return ( __inw(ADCL) < VTHRESH ); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/lib/000077500000000000000000000000001207233610700175735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/lib/ExecC.nc000066400000000000000000000036731207233610700211150ustar00rootroot00000000000000// $Id: ExecC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Jonathan Hui */ module ExecC { provides { interface Exec; } } implementation { command void Exec.exec() { //goto *(void*)(TOSBOOT_END); typedef void __attribute__((noreturn)) (*tosboot_exec)(); ((tosboot_exec)TOSBOOT_END)(); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/lib/LedsC.nc000066400000000000000000000051361207233610700211140ustar00rootroot00000000000000// $Id: LedsC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module LedsC { provides interface Leds; } implementation { enum { RED_BIT = 1, GREEN_BIT = 2, YELLOW_BIT = 4 }; command void Leds.set(uint8_t ledsOn) { if (ledsOn & GREEN_BIT) TOSH_CLR_GREEN_LED_PIN(); else TOSH_SET_GREEN_LED_PIN(); if (ledsOn & YELLOW_BIT ) TOSH_CLR_YELLOW_LED_PIN(); else TOSH_SET_YELLOW_LED_PIN(); if (ledsOn & RED_BIT) TOSH_CLR_RED_LED_PIN(); else TOSH_SET_RED_LED_PIN(); } command void Leds.flash(uint8_t a) { uint8_t i, j; for ( i = 3; i; i-- ) { call Leds.set(a); for ( j = 4; j; j-- ) wait(0xffff); call Leds.set(0); for ( j = 4; j; j-- ) wait(0xffff); } } command void Leds.glow(uint8_t a, uint8_t b) { int i; for (i = 1536; i > 0; i -= 4) { call Leds.set(a); wait(i); call Leds.set(b); wait(1536-i); } } } tinyos-2.1.2+dfsg/tos/lib/tosboot/m16c60/000077500000000000000000000000001207233610700177415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/m16c60/62p/000077500000000000000000000000001207233610700203505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/m16c60/62p/ProgFlashP.nc000066400000000000000000000057111207233610700227030ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the ProgFlash interface for M16c/62p. * The interface is responsible of reprogramming of the mcus * program flash. * * @author Henrik Makitaavola */ #include "M16c62pFlash.h" module ProgFlashP { provides interface ProgFlash; uses interface HplM16c60Flash as Flash; } implementation { command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len) { // We dont need to rewrite the hw interrupt vector if (addr >= 0xFFE00L) { return SUCCESS; } if (addr + len >= TOSBOOT_START) { return FAIL; } if (addr == 0xA0000L) { // Erase Block 10 if (call Flash.erase(M16C62P_BLOCK_10) != SUCCESS ) { return FAIL; } } else if ( addr == 0xB0000L ) { // Erase Block 9 if (call Flash.erase(M16C62P_BLOCK_9) != SUCCESS ) { return FAIL; } } else if ( addr == 0xC0000L ) { // Erase Block 8 if (call Flash.erase(M16C62P_BLOCK_8) != SUCCESS ) { return FAIL; } } else if ( addr == 0xD0000L ) { // Erase Block 7 if (call Flash.erase(M16C62P_BLOCK_7) != SUCCESS ) { return FAIL; } } if (call Flash.write(addr, (unsigned int*) buf, len) != SUCCESS) { return FAIL; } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/m16c60/65/000077500000000000000000000000001207233610700201735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/m16c60/65/ProgFlashP.nc000066400000000000000000000056741207233610700225360ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the ProgFlash interface for M16c/65. * The interface is responsible of reprogramming of the mcus * program flash. * * @author Henrik Makitaavola */ #include "M16c65Flash.h" module ProgFlashP { provides interface ProgFlash; uses interface HplM16c60Flash as Flash; } implementation { command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len) { // We dont need to rewrite the hw interrupt vector if (addr >= 0xFFE00L) { return SUCCESS; } if (addr + len >= TOSBOOT_START) { return FAIL; } if (addr == 0x80000L) { // Erase Block 7 if (call Flash.erase(M16C65_BLOCK_7) != SUCCESS ) { return FAIL; } } else if ( addr == 0x90000L ) { // Erase Block 6 if (call Flash.erase(M16C65_BLOCK_6) != SUCCESS ) { return FAIL; } } else if ( addr == 0xA0000L ) { // Erase Block 5 if (call Flash.erase(M16C65_BLOCK_5) != SUCCESS ) { return FAIL; } } else if ( addr == 0xB0000L ) { // Erase Block 4 if (call Flash.erase(M16C65_BLOCK_4) != SUCCESS ) { return FAIL; } } if (call Flash.write(addr, (unsigned int*) buf, len) != SUCCESS) { return FAIL; } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/m16c60/HardwareC.nc000066400000000000000000000046361207233610700221340ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Hardware interface implementation for the M16c/60 MCU. * The interface is responsible of initializing the mcu * and rebooting it on request. * * @author Henrik Makitaavola */ #include "NetProg_platform.h" module HardwareC { provides interface Hardware; } implementation { command void Hardware.init() { PRCR.BYTE = BIT1 | BIT0; // Turn off protection for the cpu and clock register PM0.BYTE = BIT7; // Single Chip mode. No BCLK output. PM1.BYTE = BIT3; // Expand internal memory, no global wait state. CM0.BYTE = 0x0; // No sub-clock (Xc) generation CM1.BYTE = 0x0; // CPU_CLOCK = MAIN_CLOCK, low drive on Xin PRCR.BYTE = 0; // Turn on protection on all registers. } command void Hardware.reboot() { netprog_reboot(); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/m16c60/ProgFlashC.nc000066400000000000000000000036371207233610700222640ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Wiring so that the ProgFlashP module gets access to the HplM16c60FlashC * module. * * @author Henrik Makitaavola */ configuration ProgFlashC { provides interface ProgFlash; } implementation { components ProgFlashP, HplM16c60FlashC; ProgFlashP.Flash -> HplM16c60FlashC; ProgFlash = ProgFlashP; } tinyos-2.1.2+dfsg/tos/lib/tosboot/micaz/000077500000000000000000000000001207233610700201305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/micaz/ExecC.nc000066400000000000000000000035471207233610700214520ustar00rootroot00000000000000// $Id: ExecC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Jonathan Hui */ module ExecC { provides { interface Exec; } } implementation { command void Exec.exec() { __asm__ __volatile__ ("jmp 0x0000\n\t" ::); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/micaz/InternalFlash.h000066400000000000000000000036551207233610700230440ustar00rootroot00000000000000// $Id: InternalFlash.h,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * InternalFlash.h - Internal flash implementation for the avr * platform. * * Valid address range is 0x0 - 0xFFF. * * @author Jonathan Hui */ #ifndef __INTERNAL_FLASH_H__ #define __INTERNAL_FLASH_H__ #include #endif tinyos-2.1.2+dfsg/tos/lib/tosboot/micaz/PluginC.nc000066400000000000000000000003061207233610700220120ustar00rootroot00000000000000 module PluginC { provides { interface StdControl; } } implementation { command error_t StdControl.start() { return SUCCESS; } command error_t StdControl.stop() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/micaz/TOSBoot_platform.h000066400000000000000000000042501207233610700234770ustar00rootroot00000000000000// $Id: TOSBoot_platform.h,v 1.4 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_PLATFORM_H__ #define __TOSBOOT_PLATFORM_H__ enum { TOSBOOT_ARGS_ADDR = 0xff0, // address of TOSBoot args in internal flash TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash TOSBOOT_INT_PAGE_SIZE = SPM_PAGESIZE, // size of each internal program flash page }; enum { DELUGE_MIN_ADV_PERIOD_LOG2 = 9, DELUGE_QSIZE = 2, }; #endif tinyos-2.1.2+dfsg/tos/lib/tosboot/micaz/VoltageC.nc000066400000000000000000000043461207233610700221650ustar00rootroot00000000000000// $Id: VoltageC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module VoltageC { provides { interface Voltage; } } implementation { command bool Voltage.okToProgram() { // 250 KHz ADC clock (4MHz/16) outp( 0x04, ADCSR ); // clear interrupt flag by writing a 1 sbi( ADCSR, ADIF ); // setup input channel outp( VOLTAGE_PORT, ADMUX ); // adc enable sbi( ADCSR, ADEN ); // adc start conversion sbi( ADCSR, ADSC ); // wait for conversion to complete while ( !bit_is_set( ADCSR, ADIF ) ); return ( __inw(ADCL) < VTHRESH ); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/micaz/avrhardware.h000066400000000000000000000147641207233610700226230ustar00rootroot00000000000000// $Id: avrhardware.h,v 1.4 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Jason Hill, Philip Levis, Nelson Lee * * */ /** * @author Jason Hill * @author Philip Levis * @author Nelson Lee */ #ifndef TOSH_AVRHARDWARE_H #define TOSH_AVRHARDWARE_H // check for a new-look avr-libc #if defined(DTOSTR_ALWAYS_SIGN) && !defined(TOSH_NEW_AVRLIBC) #define TOSH_NEW_AVRLIBC #endif #ifdef TOSH_NEW_AVRLIBC #include #if __AVR_LIBC_VERSION__ >= 10400UL #include #else #include #include #endif #include #include #include #ifndef sbi /* avr-libc 1.2.3 doesn't include these anymore. */ #define sbi(port, bit) ((port) |= _BV(bit)) #define cbi(port, bit) ((port) &= ~_BV(bit)) #define inp(port) (port) #define inb(port) (port) #define outp(value, port) ((port) = (value)) #define outb(port, value) ((port) = (value)) #define inw(port) (*(volatile uint16_t *)&(port)) #define outw(port, value) ((*(volatile uint16_t *)&(port)) = (value)) #define PRG_RDB(addr) pgm_read_byte(addr) #endif #else #include #include #include #include #include #endif /* TOSH_NEW_AVRLIBC */ // check for version 3.3 of GNU gcc or later #if ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) #define __outw(val, port) outw(port, val); #endif #ifndef __inw #ifndef __SFR_OFFSET #define __SFR_OFFSET 0 #endif /* !__SFR_OFFSET */ #define __inw(_port) inw(_port) #define __inw_atomic(__sfrport) ({ \ uint16_t __t; \ bool bStatus; \ bStatus = bit_is_set(SREG,7); \ cli(); \ __t = inw(__sfrport); \ if (bStatus) sei(); \ __t; \ }) #endif /* __inw */ #define TOSH_ASSIGN_PIN(name, port, bit) \ static inline void TOSH_SET_##name##_PIN() {sbi(PORT##port , bit);} \ static inline void TOSH_CLR_##name##_PIN() {cbi(PORT##port , bit);} \ static inline int TOSH_READ_##name##_PIN() \ {return (inp(PIN##port) & (1 << bit)) != 0;} \ static inline void TOSH_MAKE_##name##_OUTPUT() {sbi(DDR##port , bit);} \ static inline void TOSH_MAKE_##name##_INPUT() {cbi(DDR##port , bit);} #define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \ static inline void TOSH_SET_##name##_PIN() {sbi(PORT##port , bit);} \ static inline void TOSH_CLR_##name##_PIN() {cbi(PORT##port , bit);} \ static inline void TOSH_MAKE_##name##_OUTPUT() {;} #define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\ static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \ static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \ static inline void TOSH_MAKE_##alias##_OUTPUT() {} \ #define TOSH_ALIAS_PIN(alias, connector) \ static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \ static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \ static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \ static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \ static inline void TOSH_MAKE_##alias##_INPUT() {TOSH_MAKE_##connector##_INPUT();} // We need slightly different defs than SIGNAL, INTERRUPT #define TOSH_SIGNAL(signame) \ void signame() __attribute__ ((signal)) @spontaneous() @C() #define TOSH_INTERRUPT(signame) \ void signame() __attribute__ ((interrupt)) @spontaneous() @C() /* Watchdog Prescaler */ enum { TOSH_period16 = 0x00, // 47ms TOSH_period32 = 0x01, // 94ms TOSH_period64 = 0x02, // 0.19s TOSH_period128 = 0x03, // 0.38s TOSH_period256 = 0x04, // 0.75s TOSH_period512 = 0x05, // 1.5s TOSH_period1024 = 0x06, // 3.0s TOSH_period2048 = 0x07 // 6.0s }; void TOSH_wait() { asm volatile("nop"); asm volatile("nop"); } // atomic statement runtime support /* typedef uint8_t __nesc_atomic_t; */ /* __nesc_atomic_t __nesc_atomic_start(void); */ /* void __nesc_atomic_end(__nesc_atomic_t oldSreg); */ /* #ifndef NESC_BUILD_BINARY */ /* inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() */ /* { */ /* __nesc_atomic_t result = inp(SREG); */ /* cli(); */ /* return result; */ /* } */ /* inline void __nesc_atomic_end(__nesc_atomic_t oldSreg) @spontaneous() */ /* { */ /* outp(oldSreg, SREG); */ /* } */ /* #endif */ /* inline void __nesc_atomic_sleep() */ /* { */ /* /\* Atomically enable interrupts and sleep *\/ */ /* sei(); // Make sure interrupts are on, so we can wake up! */ /* asm volatile ("sleep"); */ /* TOSH_wait(); */ /* } */ /* inline void __nesc_enable_interrupt() { */ /* sei(); */ /* } */ /* inline void __nesc_disable_interrupt() { */ /* cli(); */ /* } */ #endif //TOSH_AVRHARDWARE_H tinyos-2.1.2+dfsg/tos/lib/tosboot/micaz/hardware.h000066400000000000000000000134461207233610700221060ustar00rootroot00000000000000// $Id: hardware.h,v 1.5 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * $Id: hardware.h,v 1.5 2010-06-29 22:07:50 scipio Exp $ * */ #ifndef __HARDWARE_H__ #define __HARDWARE_H__ #include #include #ifndef MHZ /* Clock rate is ~8MHz except if specified by user (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */ #define MHZ 8 #endif typedef uint32_t in_flash_addr_t; typedef uint32_t ex_flash_addr_t; static inline void wait( uint16_t dt ) { /* In most cases (constant arg), the test is elided at compile-time */ if (dt) /* loop takes 8 cycles. this is 1uS if running on an internal 8MHz clock, and 1.09uS if running on the external crystal. */ asm volatile ( "1: sbiw %0,1\n" " adiw %0,1\n" " sbiw %0,1\n" " brne 1b" : "+w" (dt)); } // LED assignments TOSH_ASSIGN_PIN(RED_LED, A, 2); TOSH_ASSIGN_PIN(GREEN_LED, A, 1); TOSH_ASSIGN_PIN(YELLOW_LED, A, 0); TOSH_ASSIGN_PIN(SERIAL_ID, A, 4); // Flash assignments TOSH_ASSIGN_PIN(FLASH_CS, A, 3); TOSH_ASSIGN_PIN(FLASH_CLK, D, 5); TOSH_ASSIGN_PIN(FLASH_OUT, D, 3); TOSH_ASSIGN_PIN(FLASH_IN, D, 2); // power control assignments TOSH_ASSIGN_PIN(PW0, C, 0); TOSH_ASSIGN_PIN(PW1, C, 1); TOSH_ASSIGN_PIN(PW2, C, 2); TOSH_ASSIGN_PIN(PW3, C, 3); TOSH_ASSIGN_PIN(PW4, C, 4); TOSH_ASSIGN_PIN(PW5, C, 5); TOSH_ASSIGN_PIN(PW6, C, 6); TOSH_ASSIGN_PIN(PW7, C, 7); void TOSH_SET_PIN_DIRECTIONS(void) { TOSH_MAKE_RED_LED_OUTPUT(); TOSH_MAKE_YELLOW_LED_OUTPUT(); TOSH_MAKE_GREEN_LED_OUTPUT(); TOSH_MAKE_PW7_OUTPUT(); TOSH_MAKE_PW6_OUTPUT(); TOSH_MAKE_PW5_OUTPUT(); TOSH_MAKE_PW4_OUTPUT(); TOSH_MAKE_PW3_OUTPUT(); TOSH_MAKE_PW2_OUTPUT(); TOSH_MAKE_PW1_OUTPUT(); TOSH_MAKE_PW0_OUTPUT(); TOSH_MAKE_SERIAL_ID_INPUT(); TOSH_CLR_SERIAL_ID_PIN(); // Prevent sourcing current TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_MAKE_FLASH_OUT_OUTPUT(); TOSH_MAKE_FLASH_CLK_OUTPUT(); TOSH_SET_FLASH_CS_PIN(); } enum { VOLTAGE_PORT = 30, VTHRESH = 0x1cf, // 2.7V }; #endif tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430/000077500000000000000000000000001207233610700200535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430/ExecC.nc000066400000000000000000000040231207233610700213630ustar00rootroot00000000000000// $Id: ExecC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Jonathan Hui */ module ExecC { provides { interface Exec; } } implementation { command void Exec.exec() { typedef void __attribute__((noreturn)) (*tosboot_exec)(); // Restore the watchdog state produced by the __watchdog_support // from GCC 4.6. WDTCTL = WDTPW + WDTCNTCL; ((tosboot_exec)TOSBOOT_END)(); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430/HardwareC.nc000066400000000000000000000037661207233610700222510ustar00rootroot00000000000000// $Id: HardwareC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module HardwareC { provides { interface Hardware; } } implementation { command void Hardware.init() { WDTCTL = WDTPW + WDTHOLD; BCSCTL1 = RSEL0 | RSEL1 | RSEL2 | XT2OFF; DCOCTL = DCO0 | DCO1 | DCO2; } command void Hardware.reboot() { WDTCTL = 0; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430/HplUsart0C.nc000066400000000000000000000065751207233610700223370ustar00rootroot00000000000000// $Id: HplUsart0C.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module HplUsart0C { provides interface HplUsartControl; } implementation { command void HplUsartControl.disableSPI() { // USART0 SPI module disable //ME1 &= ~USPIE0; // set to PUC values ME1 = 0; U0CTL = 1; U0TCTL = 1; U0RCTL = 0; } command void HplUsartControl.setModeSPI() { //U0CTL = SWRST; // 8-bit char, SPI-mode, USART as master U0CTL = SWRST | CHAR | SYNC | MM; // 3-pin + half-cycle delayed UCLK U0TCTL |= STC + CKPH + SSEL1; // as fast as possible U0BR0 = 0x02; U0BR1 = 0; // enable SPI ME1 |= USPIE0; U0CTL &= ~SWRST; // clear interrupts IFG1 = 0; } command void HplUsartControl.disableI2C() { /* U0CTL = 1; U0TCTL = 1; I2CTCTL = 0; */ U0CTL &= ~I2CEN; U0CTL &= ~I2C; I2CTCTL = 0; call HplUsartControl.disableSPI(); } command void HplUsartControl.setModeI2C() { // Recommended init procedure U0CTL = I2C + SYNC + MST; // use 1MHz SMCLK as the I2C reference I2CTCTL |= I2CSSEL_2 | I2CTRX; // Enable I2C U0CTL |= I2CEN; return; } command error_t HplUsartControl.isTxEmpty(){ if (U0TCTL & TXEPT) { return SUCCESS; } return FAIL; } command error_t HplUsartControl.isTxIntrPending(){ if (IFG1 & UTXIFG0){ IFG1 &= ~UTXIFG0; return SUCCESS; } return FAIL; } command error_t HplUsartControl.isRxIntrPending(){ if (IFG1 & URXIFG0){ IFG1 &= ~URXIFG0; return SUCCESS; } return FAIL; } command void HplUsartControl.tx(uint8_t data){ U0TXBUF = data; } command uint8_t HplUsartControl.rx(){ return U0RXBUF; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430/HplUsartControl.nc000066400000000000000000000040561207233610700235050ustar00rootroot00000000000000// $Id: HplUsartControl.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #include interface HplUsartControl { command void disableSPI(); command void setModeSPI(); command void disableI2C(); command void setModeI2C(); command error_t isTxEmpty(); command error_t isTxIntrPending(); command error_t isRxIntrPending(); command void tx(uint8_t data); command uint8_t rx(); } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430/InternalFlashC.nc000066400000000000000000000077001207233610700232360ustar00rootroot00000000000000// $Id: InternalFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * InternalFlashC.nc - Internal flash implementation for telos msp * platform. On the msp, the flash must first be erased before a value * can be written. However, the msp can only erase the flash at a * segment granularity (128 bytes for the information section). This * module allows transparent read/write of individual bytes to the * information section by dynamically switching between the two * provided segments in the information section. * * Valid address range is 0x1000 - 0x107E (0x107F is used to store the * version number of the information segment). * * @author Jonathan Hui */ module InternalFlashC { provides interface InternalFlash; } implementation { enum { IFLASH_OFFSET = 0x1000, IFLASH_SIZE = 128, IFLASH_SEG0_VNUM_ADDR = 0x107f, IFLASH_SEG1_VNUM_ADDR = 0x10ff, IFLASH_INVALID_VNUM = -1, }; uint8_t chooseSegment() { int8_t vnum0 = *(int8_t*)IFLASH_SEG0_VNUM_ADDR; int8_t vnum1 = *(int8_t*)IFLASH_SEG1_VNUM_ADDR; if (vnum0 == IFLASH_INVALID_VNUM) return 1; else if (vnum1 == IFLASH_INVALID_VNUM) return 0; return ( (int8_t)(vnum0 - vnum1) < 0 ); } command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) { volatile int8_t *newPtr; int8_t *oldPtr; int8_t *bufPtr = (int8_t*)buf; int8_t version; uint16_t i; addr += IFLASH_OFFSET; newPtr = oldPtr = (int8_t*)IFLASH_OFFSET; if (chooseSegment()) { oldPtr += IFLASH_SIZE; } else { addr += IFLASH_SIZE; newPtr += IFLASH_SIZE; } FCTL2 = FWKEY + FSSEL1 + FN2; FCTL3 = FWKEY; FCTL1 = FWKEY + ERASE; *newPtr = 0; FCTL1 = FWKEY + WRT; for ( i = 0; i < IFLASH_SIZE-1; i++, newPtr++, oldPtr++ ) { if ((uint16_t)newPtr < (uint16_t)addr || (uint16_t)addr+size <= (uint16_t)newPtr) *newPtr = *oldPtr; else *newPtr = *bufPtr++; } version = *oldPtr + 1; if (version == IFLASH_INVALID_VNUM) version++; *newPtr = version; FCTL1 = FWKEY; FCTL3 = FWKEY + LOCK; return SUCCESS; } command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) { addr += IFLASH_OFFSET; if (chooseSegment()) addr += IFLASH_SIZE; memcpy(buf, addr, size); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430/ProgFlashC.nc000066400000000000000000000050751207233610700223740ustar00rootroot00000000000000// $Id: ProgFlashC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module ProgFlashC { provides { interface ProgFlash; } } implementation { enum { RESET_ADDR = 0xfffe, }; command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, uint16_t len) { volatile uint16_t *flashAddr = (uint16_t*)(uint16_t)addr; uint16_t *wordBuf = (uint16_t*)buf; uint16_t i = 0; // len is 16 bits so it can't be larger than 0xffff // make sure we can't wrap around if (addr < (0xffff - (len >> 1))) { FCTL2 = FWKEY + FSSEL1 + FN2; FCTL3 = FWKEY; FCTL1 = FWKEY + ERASE; *flashAddr = 0; FCTL1 = FWKEY + WRT; for (i = 0; i < (len >> 1); i++, flashAddr++) { if ((uint16_t)flashAddr != RESET_ADDR) *flashAddr = wordBuf[i]; else *flashAddr = TOSBOOT_START; } FCTL1 = FWKEY; FCTL3 = FWKEY + LOCK; return SUCCESS; } return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430/VoltageC.nc000066400000000000000000000047251207233610700221110ustar00rootroot00000000000000// $Id: VoltageC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module VoltageC { provides { interface Voltage; } } implementation { enum { VTHRESH = 0xE66, // 2.7V }; command bool Voltage.okToProgram() { int i; // Turn on and set up ADC12 with REF_1_5V ADC12CTL0 = ADC12ON | SHT0_2 | REFON; // Use sampling timer ADC12CTL1 = SHP; // Set up to sample voltage ADC12MCTL0 = EOS | SREF_1 | INCH_11; // Delay for reference start-up for ( i=0; i<0x3600; i++ ); // Enable conversions ADC12CTL0 |= ENC; // Start conversion ADC12CTL0 |= ADC12SC; // Wait for completion while ((ADC12IFG & BIT0) == 0); // Turn off ADC12 ADC12CTL0 &= ~ENC; ADC12CTL0 = 0; // Check if voltage is greater than 2.7V return ( ADC12MEM0 > VTHRESH ); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430f1611/000077500000000000000000000000001207233610700205325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430f1611/PluginC.nc000066400000000000000000000036651207233610700224270ustar00rootroot00000000000000// $Id: PluginC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ configuration PluginC { provides { interface StdControl; } } implementation { components ExtFlashC, LedsC, PowerOffC; StdControl = PowerOffC; PowerOffC.Leds -> LedsC; PowerOffC.SubControl -> ExtFlashC; } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430f1611/PowerOffC.nc000066400000000000000000000050401207233610700227050ustar00rootroot00000000000000// $Id: PowerOffC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module PowerOffC { provides { interface Init; interface StdControl; } uses { interface Leds; interface StdControl as SubControl; } } implementation { void haltsystem() { uint16_t _lpmreg; TOSH_SET_PIN_DIRECTIONS(); call SubControl.stop(); call Leds.glow(0x7, 0x0); _lpmreg = LPM4_bits; _lpmreg |= SR_GIE; __asm__ __volatile__( "bis %0, r2" : : "m" ((uint16_t)_lpmreg) ); } command error_t Init.init() { return SUCCESS; } command error_t StdControl.start() { int i; // wait a short period for things to stabilize for ( i = 0; i < 4; i++ ) wait(0xffff); // if user button is pressed, power down if (!TOSH_READ_USERINT_PIN()) haltsystem(); return SUCCESS; } command error_t StdControl.stop() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/msp430f1611/TOSBoot_platform.h000066400000000000000000000042431207233610700241030ustar00rootroot00000000000000// $Id: TOSBoot_platform.h,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_PLATFORM_H__ #define __TOSBOOT_PLATFORM_H__ enum { TOSBOOT_ARGS_ADDR = 0x70, // address of TOSBoot args in internal flash TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image TOSBOOT_GOLDEN_IMG_ADDR = 0xf0000L, // address of the golden image in external flash TOSBOOT_INT_PAGE_SIZE = 512L, // size of each internal program flash page }; enum { DELUGE_MIN_ADV_PERIOD_LOG2 = 9, DELUGE_QSIZE = 1, }; #endif tinyos-2.1.2+dfsg/tos/lib/tosboot/mulle/000077500000000000000000000000001207233610700201435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/mulle/ExecC.nc000066400000000000000000000040241207233610700214540ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the Exec interface for the Mulle platform. * The interface is responsible for starting the execution of * the user program which is located with a starting address * of 0xa0000 in the program flash. * * @author Henrik Makitaavola */ #include "hardware.h" module ExecC { provides { interface Exec; } } implementation { command void Exec.exec() { asm volatile ("jmp.a 0xa0000"); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/mulle/PluginC.nc000066400000000000000000000036141207233610700220320ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * No extra plugins are required to be started for tosboot. * * @author Henrik Makitaavola */ module PluginC { provides { interface StdControl; } } implementation { command error_t StdControl.start() { return SUCCESS; } command error_t StdControl.stop() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/mulle/VoltageC.nc000066400000000000000000000035711207233610700221770ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * VoltageC provides a implementation of the Voltage interface. * * @author Henrik Makitaavola */ module VoltageC { provides { interface Voltage; } } implementation { command bool Voltage.okToProgram() { // TODO(henrik) Implement return true; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/mulle/hardware.h000066400000000000000000000050071207233610700221130ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Henrik Makitaavola */ #ifndef __HARDWARE_H__ #define __HARDWARE_H__ #include #include typedef uint32_t in_flash_addr_t; typedef uint32_t ex_flash_addr_t; static inline void wait( uint16_t dt ) { uint16_t i; for (i = 0; i < dt; ++i) { TOSH_wait(); } } // LED assignments TOSH_ASSIGN_PIN(RED_LED, 3, 6); TOSH_ASSIGN_PIN(GREEN_LED, 3, 7); TOSH_ASSIGN_PIN(YELLOW_LED, 3, 4); // Flash assignments TOSH_ASSIGN_PIN(FLASH_IN, 4, 0); TOSH_ASSIGN_PIN(FLASH_OUT, 4, 1); TOSH_ASSIGN_PIN(FLASH_CLK, 4, 2); TOSH_ASSIGN_PIN(FLASH_CS, 4, 5); TOSH_ASSIGN_PIN(FLASH_VCC, 3, 2); void TOSH_SET_PIN_DIRECTIONS(void) { TOSH_MAKE_RED_LED_OUTPUT(); TOSH_MAKE_YELLOW_LED_OUTPUT(); TOSH_MAKE_GREEN_LED_OUTPUT(); TOSH_MAKE_FLASH_VCC_OUTPUT(); TOSH_CLR_FLASH_VCC_PIN(); } // TODO(henrik) Insert correct value enum { VTHRESH = 0x0, // 0V }; #endif // __HARDWARE_H__ tinyos-2.1.2+dfsg/tos/lib/tosboot/mulle/m16chardware.h000066400000000000000000000126431207233610700226060ustar00rootroot00000000000000/* * Copyright (c) 2011 Lulea University of Technology * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * @author Henrik Makitaavola * @author Jason Hill * @author Philip Levis * @author Nelson Lee */ #ifndef __M16CHARDWARE_H__ #define __M16CHARDWARE_H__ #define sbi(port, bit) SET_BIT(port, bit) #define cbi(port, bit) CLR_BIT(port, bit) #define TOSH_ASSIGN_PIN(name, port, bit) \ static inline void TOSH_SET_##name##_PIN() {sbi(P##port.BYTE , bit);} \ static inline void TOSH_CLR_##name##_PIN() {cbi(P##port.BYTE , bit);} \ static inline int TOSH_READ_##name##_PIN() \ {return ((P##port.BYTE) & (1 << bit)) != 0;} \ static inline void TOSH_MAKE_##name##_OUTPUT() {sbi(PD##port.BYTE , bit);} \ static inline void TOSH_MAKE_##name##_INPUT() {cbi(PD##port.BYTE , bit);} #define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \ static inline void TOSH_SET_##name##_PIN() {sbi(P##port , bit);} \ static inline void TOSH_CLR_##name##_PIN() {cbi(P##port , bit);} \ static inline void TOSH_MAKE_##name##_OUTPUT() {;} #define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\ static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \ static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \ static inline void TOSH_MAKE_##alias##_OUTPUT() {} \ #define TOSH_ALIAS_PIN(alias, connector) \ static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \ static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \ static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \ static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \ static inline void TOSH_MAKE_##alias##_INPUT() {TOSH_MAKE_##connector##_INPUT();} void TOSH_wait() { asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); } #endif // __M16CHARDWARE_H__ tinyos-2.1.2+dfsg/tos/lib/tosboot/stm25p/000077500000000000000000000000001207233610700201575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/stm25p/ExtFlashC.nc000066400000000000000000000037741207233610700223350ustar00rootroot00000000000000// $Id: ExtFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ configuration ExtFlashC { provides { interface Init; interface StdControl; interface ExtFlash; } } implementation { components ExtFlashP, HplUsart0C; Init = ExtFlashP; StdControl = ExtFlashP; ExtFlash = ExtFlashP; ExtFlashP.UsartControl -> HplUsart0C; } tinyos-2.1.2+dfsg/tos/lib/tosboot/stm25p/ExtFlashP.nc000066400000000000000000000064631207233610700223500ustar00rootroot00000000000000// $Id: ExtFlashP.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ module ExtFlashP { provides { interface StdControl; interface Init; interface ExtFlash; } uses { interface HplUsartControl as UsartControl; } } implementation { command error_t Init.init() { TOSH_MAKE_FLASH_HOLD_OUTPUT(); TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_SET_FLASH_HOLD_PIN(); call UsartControl.setModeSPI(); return SUCCESS; } command error_t StdControl.start() { return SUCCESS; } command error_t StdControl.stop() { TOSH_CLR_FLASH_CS_PIN(); call UsartControl.tx(0xb9); while(call UsartControl.isTxEmpty() != SUCCESS); TOSH_SET_FLASH_CS_PIN(); call UsartControl.disableSPI(); return SUCCESS; } void powerOnFlash() { uint8_t i; TOSH_CLR_FLASH_CS_PIN(); // command byte + 3 dummy bytes + signature for ( i = 0; i < 5; i++ ) { call UsartControl.tx(0xab); while(call UsartControl.isTxIntrPending() != SUCCESS); } TOSH_SET_FLASH_CS_PIN(); } command void ExtFlash.startRead(uint32_t addr) { uint8_t i; powerOnFlash(); TOSH_CLR_FLASH_CS_PIN(); // add command byte to address addr |= (uint32_t)0x3 << 24; // address for ( i = 4; i > 0; i-- ) { call UsartControl.tx((addr >> (i-1)*8) & 0xff); while(call UsartControl.isTxIntrPending() != SUCCESS); } } command uint8_t ExtFlash.readByte() { call UsartControl.rx(); call UsartControl.tx(0); while(call UsartControl.isRxIntrPending() != SUCCESS); return call UsartControl.rx(); } command void ExtFlash.stopRead() { TOSH_SET_FLASH_CS_PIN(); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/telosb/000077500000000000000000000000001207233610700203155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/telosb/hardware.h000066400000000000000000000053501207233610700222660ustar00rootroot00000000000000// $Id: hardware.h,v 1.3 2010-06-29 22:07:50 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ #ifndef __HARDWARE_H__ #define __HARDWARE_H__ #include "msp430hardware.h" // internal flash is 16 bits in width typedef uint16_t in_flash_addr_t; // external flash is 32 bits in width typedef uint32_t ex_flash_addr_t; void wait(uint16_t t) { for ( ; t > 0; t-- ) { __delay_cycles(0); } } // LEDs TOSH_ASSIGN_PIN(RED_LED, 5, 4); TOSH_ASSIGN_PIN(GREEN_LED, 5, 5); TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6); // UART pins TOSH_ASSIGN_PIN(SOMI0, 3, 2); TOSH_ASSIGN_PIN(SIMO0, 3, 1); TOSH_ASSIGN_PIN(UCLK0, 3, 3); TOSH_ASSIGN_PIN(UTXD0, 3, 4); TOSH_ASSIGN_PIN(URXD0, 3, 5); // User Interupt Pin TOSH_ASSIGN_PIN(USERINT, 2, 7); // FLASH TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3); TOSH_ASSIGN_PIN(FLASH_CS, 4, 4); TOSH_ASSIGN_PIN(FLASH_HOLD, 4, 7); void TOSH_SET_PIN_DIRECTIONS(void) { P3SEL = 0x0E; // set SPI and I2C to mod func P1DIR = 0xe0; P1OUT = 0x00; P2DIR = 0x7b; P2OUT = 0x10; P3DIR = 0xf1; P3OUT = 0x00; P4DIR = 0xfd; P4OUT = 0xdd; P5DIR = 0xff; P5OUT = 0xff; P6DIR = 0xff; P6OUT = 0x00; } #endif tinyos-2.1.2+dfsg/tos/lib/tosboot/tinynode/000077500000000000000000000000001207233610700206565ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosboot/tinynode/ExecC.nc000066400000000000000000000036731207233610700222000ustar00rootroot00000000000000// $Id: ExecC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Jonathan Hui */ module ExecC { provides { interface Exec; } } implementation { command void Exec.exec() { //goto *(void*)(TOSBOOT_END); typedef void __attribute__((noreturn)) (*tosboot_exec)(); ((tosboot_exec)TOSBOOT_END)(); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/tinynode/ExtFlashC.nc000066400000000000000000000112471207233610700230260ustar00rootroot00000000000000// $Id: ExtFlashC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui * @author Roland Flury */ module ExtFlashC { provides { interface Init; interface StdControl; interface ExtFlash; } } /** * Simple reader module to access the Atmel at45db041 flash chip */ implementation { uint32_t addr; command error_t Init.init() { TOSH_SET_FLASH_CS_PIN(); // inverted, deselect by default TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_CLR_FLASH_CLK_PIN(); TOSH_MAKE_FLASH_CLK_OUTPUT(); TOSH_SET_FLASH_OUT_PIN(); TOSH_MAKE_FLASH_OUT_OUTPUT(); TOSH_MAKE_FLASH_IN_INPUT(); TOSH_SET_FLASH_RESET_PIN(); // inverted TOSH_MAKE_FLASH_RESET_OUTPUT(); return SUCCESS; } command error_t StdControl.start() { return SUCCESS; } command error_t StdControl.stop() { return SUCCESS; } /** * Write a Byte over the SPI bus and receive a Byte * * upon calling this function, /CS must be CLR */ uint8_t SPIByte(uint8_t out) { uint8_t in = 0; uint8_t i; for ( i = 0; i < 8; i++, out <<= 1 ) { // write bit if (out & 0x80) { TOSH_SET_FLASH_OUT_PIN(); } else { TOSH_CLR_FLASH_OUT_PIN(); } // clock TOSH_SET_FLASH_CLK_PIN(); // read bit in <<= 1; if (TOSH_READ_FLASH_IN_PIN()) { in |= 1; } // clock TOSH_CLR_FLASH_CLK_PIN(); } return in; } /** * Initializes the flash to read Byte after Byte starting * from the given address. * * Subsequent calls to readByte() will return the Bytes * starting from the specified address. * * stopRead() terminates this process and disables the Flash. */ command void ExtFlash.startRead(uint32_t newAddr) { uint8_t cmdBuf[4]; uint8_t i; // we're using "Waveform 1 - Inactive Clock Polarity Low" // see p.7 of data sheet TOSH_CLR_FLASH_CLK_PIN(); TOSH_CLR_FLASH_CS_PIN(); // select the flash addr = newAddr; // we only use 256 Bytes per block (of 264 Bytes) cmdBuf[0] = 0x52; // command for reading data starting at the following address cmdBuf[1] = (addr >> 15) & 0xff; // 4 LSbits cmdBuf[2] = (addr >> 7) & 0xfe; // 7 MSbits with the above 4 bits describe page to read cmdBuf[3] = addr & 0xff; // Offset to Byte in page to read // transmit read command for(i = 0; i < 4; i++) { SPIByte(cmdBuf[i]); } // transmit 4 Bytes "don't care" as to spec for(i = 0; i < 4; i++) { SPIByte(0x0); } // need to do one additional clock transition before reading TOSH_SET_FLASH_CLK_PIN(); TOSH_CLR_FLASH_CLK_PIN(); } command uint8_t ExtFlash.readByte() { uint8_t b = SPIByte(0); // write anything, read Byte addr++; if(0 == (addr & 0xFF)) { // we've just read the last Byte from a page // initialize the Flash to continue reading on the new page call ExtFlash.stopRead(); call ExtFlash.startRead(addr); } return b; } command void ExtFlash.stopRead() { TOSH_SET_FLASH_CS_PIN(); // disble Flash & tri-state the OUT-pin } } tinyos-2.1.2+dfsg/tos/lib/tosboot/tinynode/PowerOffC.nc000066400000000000000000000051331207233610700230340ustar00rootroot00000000000000// $Id: PowerOffC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module PowerOffC { provides { interface Init; interface StdControl; } uses { interface Leds; interface StdControl as SubControl; } } implementation { void haltsystem() { uint16_t _lpmreg; TOSH_SET_PIN_DIRECTIONS(); call SubControl.stop(); call Leds.glow(0x7, 0x0); _lpmreg = LPM4_bits; _lpmreg |= SR_GIE; __asm__ __volatile__( "bis %0, r2" : : "m" ((uint16_t)_lpmreg) ); } command error_t Init.init() { return SUCCESS; } command error_t StdControl.start() { int i; // wait a short period for things to stabilize for ( i = 0; i < 4; i++ ) { wait(0xffff); } // TinyNode: we don't have a user button // if user button is pressed, power down //if (!TOSH_READ_USERINT_PIN()) { //haltsystem(); //} return SUCCESS; } command error_t StdControl.stop() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosboot/tinynode/README000066400000000000000000000010201207233610700215270ustar00rootroot00000000000000Deluge T2 for TinyNode ---------------------------------- These files are needed by Deluge T2 to compile for the TinyNode platform. Note: Reprogramming fails if the voltage of the node is not above a given threshold. Currently, this is set to 2.7V, which may be too high if you run your mote on batteries. In this case, set the value of VTHRESH in the hardware.h file to a different value. In case you wish not to test the voltage at all, modify VoltageC.nc s.t. the command Voltage.okToProgram() returns always TRUE. tinyos-2.1.2+dfsg/tos/lib/tosboot/tinynode/TOSBoot_platform.h000066400000000000000000000042371207233610700242320ustar00rootroot00000000000000// $Id: TOSBoot_platform.h,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Jonathan Hui */ #ifndef __TOSBOOT_PLATFORM_H__ #define __TOSBOOT_PLATFORM_H__ enum { TOSBOOT_ARGS_ADDR = 0x70, // address of TOSBoot args in internal flash TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash TOSBOOT_INT_PAGE_SIZE = 512L, // size of each internal program flash page }; enum { DELUGE_MIN_ADV_PERIOD_LOG2 = 9, DELUGE_QSIZE = 1, }; #endif tinyos-2.1.2+dfsg/tos/lib/tosboot/tinynode/VoltageC.nc000066400000000000000000000047261207233610700227150ustar00rootroot00000000000000// $Id: VoltageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * * * Copyright (c) 2000-2004 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui */ module VoltageC { provides { interface Voltage; } } implementation { command bool Voltage.okToProgram() { /** original code form the msp430 folder */ int i; // Turn on and set up ADC12 with REF_1_5V ADC12CTL0 = ADC12ON | SHT0_2 | REFON; // Use sampling timer ADC12CTL1 = SHP; // Set up to sample voltage ADC12MCTL0 = EOS | SREF_1 | INCH_11; // Delay for reference start-up for ( i=0; i<0x3600; i++ ); // Enable conversions ADC12CTL0 |= ENC; // Start conversion ADC12CTL0 |= ADC12SC; // Wait for completion while ((ADC12IFG & BIT0) == 0); // Turn off ADC12 ADC12CTL0 &= ~ENC; ADC12CTL0 = 0; // Check if voltage is greater than 2.7V return ( ADC12MEM0 > VTHRESH ); } } tinyos-2.1.2+dfsg/tos/lib/tosboot/tinynode/hardware.h000066400000000000000000000061561207233610700226340ustar00rootroot00000000000000// $Id: hardware.h,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * * * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * @author Jonathan Hui * @author Roland Flury */ #ifndef __HARDWARE_H__ #define __HARDWARE_H__ #include "msp430hardware.h" // internal flash is 16 bits in width typedef uint16_t in_flash_addr_t; // external flash is 32 bits in width typedef uint32_t ex_flash_addr_t; void wait(uint16_t t) { for(; t > 0; t--); } enum { VTHRESH = 0xE66, // 2.7V - threshold for reprogramming the node, if voltage is below, don't reprogram }; // LEDs TOSH_ASSIGN_PIN(RED_LED2, 1, 5); // on tinynode TOSH_ASSIGN_PIN(RED_LED, 1, 6); // external TOSH_ASSIGN_PIN(GREEN_LED, 2, 3); TOSH_ASSIGN_PIN(YELLOW_LED, 2, 4); // FLASH at45db041 TOSH_ASSIGN_PIN(FLASH_CS, 4, 7); // inverted TOSH_ASSIGN_PIN(FLASH_RESET, 4, 6); // inverted TOSH_ASSIGN_PIN(FLASH_CLK, 3, 3); TOSH_ASSIGN_PIN(FLASH_OUT, 3, 1); // MOSI - master OUT slave IN TOSH_ASSIGN_PIN(FLASH_IN, 3, 2); // MISO - master IN slave OUT void TOSH_SET_PIN_DIRECTIONS(void) { // FLASH at45db041 TOSH_SET_FLASH_CS_PIN(); // inverted TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_MAKE_FLASH_OUT_OUTPUT(); TOSH_MAKE_FLASH_CLK_OUTPUT(); TOSH_MAKE_FLASH_IN_INPUT(); TOSH_SET_FLASH_RESET_PIN(); // inverted TOSH_MAKE_FLASH_RESET_OUTPUT(); // LEDs TOSH_CLR_RED_LED2_PIN(); TOSH_CLR_RED_LED_PIN(); TOSH_CLR_YELLOW_LED_PIN(); TOSH_CLR_GREEN_LED_PIN(); TOSH_MAKE_RED_LED2_OUTPUT(); TOSH_MAKE_RED_LED_OUTPUT(); TOSH_MAKE_YELLOW_LED_OUTPUT(); TOSH_MAKE_GREEN_LED_OUTPUT(); } #endif tinyos-2.1.2+dfsg/tos/lib/tossim/000077500000000000000000000000001207233610700166525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tossim/ActiveMessageAddressC.nc000066400000000000000000000064041207233610700233310ustar00rootroot00000000000000// $Id: ActiveMessageAddressC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageAddressC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $ * */ /** * Accessor methods for Active Messages. * * @author Philip Levis * @author Morten Tranberg Hansen (added ActiveMessageAddress) * @date June 19 2005 */ module ActiveMessageAddressC { provides { interface ActiveMessageAddress; async command am_addr_t amAddress(); async command void setAmAddress(am_addr_t a); } } implementation { bool set = FALSE; am_addr_t addr; am_group_t group = TOS_AM_GROUP; async command void ActiveMessageAddress.setAddress(am_group_t myGroup, am_addr_t myAddr) { addr = myAddr; group = myGroup; set = TRUE; signal ActiveMessageAddress.changed(); } async command am_addr_t ActiveMessageAddress.amAddress() { if(!set) { addr = TOS_NODE_ID; set = TRUE; } return addr; } async command am_group_t ActiveMessageAddress.amGroup() { return group; } async command am_addr_t amAddress() { return call ActiveMessageAddress.amAddress(); } async command void setAmAddress(am_addr_t a) { addr = a; set = TRUE; signal ActiveMessageAddress.changed(); } default async event void ActiveMessageAddress.changed() {} } tinyos-2.1.2+dfsg/tos/lib/tossim/ActiveMessageC.nc000066400000000000000000000051061207233610700220210ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * The basic chip-independent TOSSIM Active Message layer for radio chips * that do not have simulation support. * * @author Philip Levis * @date December 2 2005 */ configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[uint8_t id]; interface Receive[uint8_t id]; interface Receive as Snoop[uint8_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } } implementation { components TossimActiveMessageC as AM; components TossimPacketModelC as Network; components CpmModelC as Model; components ActiveMessageAddressC as Address; components MainC; MainC.SoftwareInit -> Network; SplitControl = Network; AMSend = AM; Receive = AM.Receive; Snoop = AM.Snoop; Packet = AM; AMPacket = AM; PacketAcknowledgements = Network; AM.Model -> Network.Packet; AM.amAddress -> Address; Network.GainRadioModel -> Model; } tinyos-2.1.2+dfsg/tos/lib/tossim/BinaryInterferenceModelC.nc000066400000000000000000000130251207233610700240370ustar00rootroot00000000000000// $Id: BinaryInterferenceModelC.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * A binary interference model with length-independent packet error * rates (the old TOSSIM-packet story). * * @author Philip Levis * @date December 2 2005 */ #include module BinaryInterferenceModelC { provides interface SimpleRadioModel as Model; } implementation { message_t* outgoing; bool requestAck; void sim_binary_ack_handle(sim_event_t* evt) { if (outgoing != NULL && requestAck) { signal Model.acked(outgoing); } } sim_event_t receiveEvent; sim_time_t clearTime = 0; bool collision = FALSE; message_t* incoming = NULL; int incomingSource; command bool Model.clearChannel() { dbg("Binary", "Checking clear channel @ %s: %i\n", sim_time_string(), (clearTime < sim_time())); return clearTime < sim_time(); } void sim_schedule_ack(int source, sim_time_t time) { sim_event_t* ackEvent = (sim_event_t*)malloc(sizeof(sim_event_t)); ackEvent->mote = source; ackEvent->force = 0; ackEvent->cancelled = 0; ackEvent->time = time; ackEvent->handle = sim_binary_ack_handle; ackEvent->cleanup = sim_queue_cleanup_event; sim_queue_insert(ackEvent); } void sim_binary_receive_handle(sim_event_t* evt) { // If there was no collision, and we pass the loss // rate... if (!collision) { double loss = sim_binary_loss(incomingSource, sim_node()); int randVal = sim_random() % 1000000; dbg("Binary", "Handling receive event for %i.\n", sim_node()); loss *= 1000000.0; if (randVal < (int)loss) { signal Model.receive(incoming); loss = sim_binary_loss(sim_node(), incomingSource); randVal = sim_random() % 1000000; loss *= 1000000.0; if (randVal < (int)loss) { sim_schedule_ack(incomingSource, sim_time()); } } else { dbg("Binary", "Packet lost.\n"); } } else { dbg("Binary", "Receive event for %i was a collision.\n", sim_node()); } incoming = NULL; } void enqueue_receive_event(int source, sim_time_t endTime, message_t* msg) { if (incoming == NULL) { dbg("Binary", "Formatting reception event for %i.\n", sim_node()); receiveEvent.time = endTime; receiveEvent.mote = sim_node(); receiveEvent.cancelled = 0; receiveEvent.force = 0; receiveEvent.handle = sim_binary_receive_handle; receiveEvent.cleanup = sim_queue_cleanup_none; incoming = msg; sim_queue_insert(&receiveEvent); incoming = msg; incomingSource = source; } } void sim_binary_put(int dest, message_t* msg, sim_time_t endTime, bool receive) { int prevNode = sim_node(); sim_set_node(dest); if (clearTime < sim_time() && receive) { dbg("Binary", "Enqueing reception event for %i.\n", dest); enqueue_receive_event(prevNode, endTime - 1, msg); collision = FALSE; } else { collision = TRUE; } if (endTime > clearTime) { clearTime = endTime; } sim_set_node(prevNode); } command void Model.putOnAirToAll(message_t* msg, bool ack, sim_time_t endTime) { link_t* link = sim_binary_first(sim_node()); requestAck = FALSE; outgoing = msg; dbg("Binary", "Node %i broadcasting, first link is 0x%p.\n", sim_node(), sim_binary_first(sim_node())); while (link != NULL) { int other = link->mote; dbg("Binary", "Node %i transmitting to %i.\n", sim_node(), other); sim_binary_put(other, msg, endTime, TRUE); link = sim_binary_next(link); } } command void Model.putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime) { link_t* link = sim_binary_first(sim_node()); requestAck = ack; outgoing = msg; while (link != NULL) { int other = link->mote; sim_binary_put(other, msg, endTime, other == dest); dbg("Binary", "Node %i transmitting to %i.\n", sim_node(), dest); link = sim_binary_next(link); } } default event void Model.receive(message_t* msg) {} } tinyos-2.1.2+dfsg/tos/lib/tossim/CpmModelC.nc000066400000000000000000000405701207233610700210050ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * CPM (closest-pattern matching) is a wireless noise simulation model * based on statistical extraction from empirical noise data. This * model provides far more precise software simulation environment by * exploiting time-correlated noise characteristics. For details, * please refer to the paper * * "Improving Wireless Simulation through Noise Modeling." HyungJune * Lee and Philip Levis, IPSN 2007. You can find a copy at * http://sing.stanford.edu. * * @author Hyungjune Lee, Philip Levis * @date Oct 12 2006 */ #include #include #include module CpmModelC { provides interface GainRadioModel as Model; } implementation { message_t* outgoing; // If I'm sending, this is my outgoing packet bool requestAck; bool receiving = 0; // Whether or not I think I'm receiving a packet bool transmitting = 0; // Whether or not I think I'm tranmitting a packet sim_time_t transmissionEndTime; // to check pending transmission struct receive_message; typedef struct receive_message receive_message_t; struct receive_message { int source; sim_time_t start; sim_time_t end; double power; double reversePower; int8_t strength; bool lost; bool ack; message_t* msg; receive_message_t* next; }; receive_message_t* outstandingReceptionHead = NULL; receive_message_t* allocate_receive_message(); void free_receive_message(receive_message_t* msg); sim_event_t* allocate_receive_event(sim_time_t t, receive_message_t* m); bool shouldReceive(double SNR); bool checkReceive(receive_message_t* msg); double packetNoise(receive_message_t* msg); double checkPrr(receive_message_t* msg); double timeInMs() { sim_time_t ftime = sim_time(); int hours, minutes, seconds; sim_time_t secondBillionths; int temp_time; double ms_time; secondBillionths = (ftime % sim_ticks_per_sec()); if (sim_ticks_per_sec() > (sim_time_t)1000000000) { secondBillionths /= (sim_ticks_per_sec() / (sim_time_t)1000000000); } else { secondBillionths *= ((sim_time_t)1000000000 / sim_ticks_per_sec()); } temp_time = (int)(secondBillionths/10000); if (temp_time % 10 >= 5) { temp_time += (10-(temp_time%10)); } else { temp_time -= (temp_time%10); } ms_time = (float)(temp_time/100.0); seconds = (int)(ftime / sim_ticks_per_sec()); minutes = seconds / 60; hours = minutes / 60; seconds %= 60; minutes %= 60; ms_time += (hours*3600+minutes*60+seconds)*1000; return ms_time; } //Generate a CPM noise reading double noise_hash_generation() { double CT = timeInMs(); uint32_t quotient = ((sim_time_t)(CT*10))/10; uint8_t remain = (uint8_t)(((sim_time_t)(CT*10))%10); double noise_val; uint16_t node_id = sim_node(); dbg("CpmModelC", "IN: noise_hash_generation()\n"); if (5 <= remain && remain < 10) { noise_val = (double)sim_noise_generate(node_id, quotient+1); } else { noise_val = (double)sim_noise_generate(node_id, quotient); } dbg("CpmModelC,Tal", "%s: OUT: noise_hash_generation(): %lf\n", sim_time_string(), noise_val); return noise_val; } double packetSnr(receive_message_t* msg) { double signalStr = msg->power; double noise = noise_hash_generation(); return (signalStr - noise); } double arr_estimate_from_snr(double SNR) { double beta1 = 0.9794; double beta2 = 2.3851; double X = SNR-beta2; double PSE = 0.5*erfc(beta1*X/sqrt(2)); double prr_hat = pow(1-PSE, 23*2); dbg("CpmModelC,SNRLoss", "SNR is %lf, ARR is %lf\n", SNR, prr_hat); if (prr_hat > 1) prr_hat = 1.1; else if (prr_hat < 0) prr_hat = -0.1; return prr_hat; } int shouldAckReceive(double snr) { double prr = arr_estimate_from_snr(snr); double coin = RandomUniform(); if ( (prr >= 0) && (prr <= 1) ) { if (coin < prr) prr = 1.0; else prr = 0.0; } return (int)prr; } void sim_gain_ack_handle(sim_event_t* evt) { // Four conditions must hold for an ack to be issued: // 1) Transmitter is still sending a packet (i.e., not cancelled) // 2) The packet requested an acknowledgment // 3) The transmitter is on // 4) The packet passes the SNR/ARR curve if (requestAck && // This outgoing != NULL && sim_mote_is_on(sim_node())) { receive_message_t* rcv = (receive_message_t*)evt->data; double power = rcv->reversePower; double noise = packetNoise(rcv); double snr = power - noise; if (shouldAckReceive(snr)) { signal Model.acked(outgoing); } } free_receive_message((receive_message_t*)evt->data); } sim_event_t receiveEvent; // This clear threshold comes from the CC2420 data sheet double clearThreshold = -72.0; bool collision = FALSE; message_t* incoming = NULL; int incomingSource; command void Model.setClearValue(double value) { clearThreshold = value; dbg("CpmModelC", "Setting clear threshold to %f\n", clearThreshold); } command bool Model.clearChannel() { dbg("CpmModelC", "Checking clear channel @ %s: %f <= %f \n", sim_time_string(), (double)packetNoise(NULL), clearThreshold); return packetNoise(NULL) < clearThreshold; } void sim_gain_schedule_ack(int source, sim_time_t t, receive_message_t* r) { sim_event_t* ackEvent = (sim_event_t*)malloc(sizeof(sim_event_t)); ackEvent->mote = source; ackEvent->force = 1; ackEvent->cancelled = 0; ackEvent->time = t; ackEvent->handle = sim_gain_ack_handle; ackEvent->cleanup = sim_queue_cleanup_event; ackEvent->data = r; sim_queue_insert(ackEvent); } double prr_estimate_from_snr(double SNR) { // Based on CC2420 measurement by Kannan. // The updated function below fixes the problem of non-zero PRR // at very low SNR. With this function PRR is 0 for SNR <= 3. double beta1 = 0.9794; double beta2 = 2.3851; double X = SNR-beta2; double PSE = 0.5*erfc(beta1*X/sqrt(2)); double prr_hat = pow(1-PSE, 23*2); dbg("CpmModelC,SNR", "SNR is %lf, PRR is %lf\n", SNR, prr_hat); if (prr_hat > 1) prr_hat = 1.1; else if (prr_hat < 0) prr_hat = -0.1; return prr_hat; } bool shouldReceive(double SNR) { double prr = prr_estimate_from_snr(SNR); double coin = RandomUniform(); if ( (prr >= 0) && (prr <= 1) ) { if (coin < prr) prr = 1.0; else prr = 0.0; } return prr; } bool checkReceive(receive_message_t* msg) { double noise = noise_hash_generation(); receive_message_t* list = outstandingReceptionHead; noise = pow(10.0, noise / 10.0); while (list != NULL) { if (list != msg) { noise += pow(10.0, list->power / 10.0); } list = list->next; } noise = 10.0 * log(noise) / log(10.0); return shouldReceive(msg->power - noise); } double packetNoise(receive_message_t* msg) { double noise = noise_hash_generation(); receive_message_t* list = outstandingReceptionHead; noise = pow(10.0, noise / 10.0); while (list != NULL) { if (list != msg) { noise += pow(10.0, list->power / 10.0); } list = list->next; } noise = 10.0 * log(noise) / log(10.0); return noise; } double checkPrr(receive_message_t* msg) { return prr_estimate_from_snr(msg->power / packetNoise(msg)); } /* Handle a packet reception. If the packet is being acked, pass the corresponding receive_message_t* to the ack handler, otherwise free it. */ void sim_gain_receive_handle(sim_event_t* evt) { receive_message_t* mine = (receive_message_t*)evt->data; receive_message_t* predecessor = NULL; receive_message_t* list = outstandingReceptionHead; dbg("CpmModelC", "Handling reception event @ %s.\n", sim_time_string()); while (list != NULL) { if (list->next == mine) { predecessor = list; } list = list->next; } if (predecessor) { predecessor->next = mine->next; } else if (mine == outstandingReceptionHead) { // must be head outstandingReceptionHead = mine->next; } else { dbgerror("CpmModelC", "Incoming packet list structure is corrupted: entry is not the head and no entry points to it.\n"); } dbg("CpmModelC,SNRLoss", "Packet from %i to %i\n", (int)mine->source, (int)sim_node()); if (!checkReceive(mine)) { dbg("CpmModelC,SNRLoss", " - lost packet from %i as SNR was too low.\n", (int)mine->source); mine->lost = 1; } if (!mine->lost) { // Copy this receiver's packet signal strength to the metadata region // of the packet. Note that this packet is actually shared across all // receivers: a higher layer performs the copy. tossim_metadata_t* meta = (tossim_metadata_t*)(&mine->msg->metadata); meta->strength = mine->strength; dbg_clear("CpmModelC,SNRLoss", " -signaling reception\n"); signal Model.receive(mine->msg); if (mine->ack) { dbg_clear("CpmModelC", " acknowledgment requested, "); } else { dbg_clear("CpmModelC", " no acknowledgment requested.\n"); } // If we scheduled an ack, receiving = 0 when it completes if (mine->ack && signal Model.shouldAck(mine->msg)) { dbg_clear("CpmModelC", " scheduling ack.\n"); sim_gain_schedule_ack(mine->source, sim_time() + 1, mine); } else { // Otherwise free the receive_message_t* free_receive_message(mine); } // We're searching for new packets again receiving = 0; } // If the packet was lost, then we're searching for new packets again else { if (RandomUniform() < 0.001) { dbg("CpmModelC,SNRLoss", "Packet was technically lost, but TOSSIM introduces an ack false positive rate.\n"); if (mine->ack && signal Model.shouldAck(mine->msg)) { dbg_clear("CpmModelC", " scheduling ack.\n"); sim_gain_schedule_ack(mine->source, sim_time() + 1, mine); } else { // Otherwise free the receive_message_t* free_receive_message(mine); } } else { free_receive_message(mine); } receiving = 0; dbg_clear("CpmModelC,SNRLoss", " -packet was lost.\n"); } } // Create a record that a node is receiving a packet, // enqueue a receive event to figure out what happens. void enqueue_receive_event(int source, sim_time_t endTime, message_t* msg, bool receive, double power, double reversePower) { sim_event_t* evt; receive_message_t* list; receive_message_t* rcv = allocate_receive_message(); double noiseStr = packetNoise(rcv); rcv->source = source; rcv->start = sim_time(); rcv->end = endTime; rcv->power = power; rcv->reversePower = reversePower; // The strength of a packet is the sum of the signal and noise. In most cases, this means // the signal. By sampling this here, it assumes that the packet RSSI is sampled at // the beginning of the packet. This is true for the CC2420, but is not true for all // radios. But generalizing seems like complexity for minimal gain at this point. rcv->strength = (int8_t)(floor(10.0 * log(pow(10.0, power/10.0) + pow(10.0, noiseStr/10.0)) / log(10.0))); rcv->msg = msg; rcv->lost = 0; rcv->ack = receive; // If I'm off, I never receive the packet, but I need to keep track of // it in case I turn on and someone else starts sending me a weaker // packet. So I don't set receiving to 1, but I keep track of // the signal strength. if (!sim_mote_is_on(sim_node())) { dbg("CpmModelC", "Lost packet from %i due to %i being off\n", source, sim_node()); rcv->lost = 1; } else if (!shouldReceive(power - noiseStr)) { dbg("CpmModelC,SNRLoss", "Lost packet from %i to %i due to SNR being too low (%i)\n", source, sim_node(), (int)(power - noiseStr)); rcv->lost = 1; } else if (receiving) { dbg("CpmModelC,SNRLoss", "Lost packet from %i due to %i being mid-reception\n", source, sim_node()); rcv->lost = 1; } else if (transmitting && (rcv->start < transmissionEndTime) && (transmissionEndTime <= rcv->end)) { dbg("CpmModelC,SNRLoss", "Lost packet from %i due to %i being mid-transmission, transmissionEndTime %llu\n", source, sim_node(), transmissionEndTime); rcv->lost = 1; } else { receiving = 1; } list = outstandingReceptionHead; while (list != NULL) { if (!shouldReceive(list->power - rcv->power)) { dbg("Gain,SNRLoss", "Going to lose packet from %i with signal %lf as am receiving a packet from %i with signal %lf\n", list->source, list->power, source, rcv->power); list->lost = 1; } list = list->next; } rcv->next = outstandingReceptionHead; outstandingReceptionHead = rcv; evt = allocate_receive_event(endTime, rcv); sim_queue_insert(evt); } void sim_gain_put(int dest, message_t* msg, sim_time_t endTime, bool receive, double power, double reversePower) { int prevNode = sim_node(); dbg("CpmModelC", "Enqueing reception event for %i at %llu with power %lf.\n", dest, endTime, power); sim_set_node(dest); enqueue_receive_event(prevNode, endTime, msg, receive, power, reversePower); sim_set_node(prevNode); } command void Model.putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime, double power, double reversePower) { receive_message_t* list; gain_entry_t* neighborEntry = sim_gain_first(sim_node()); requestAck = ack; outgoing = msg; transmissionEndTime = endTime; dbg("CpmModelC", "Node %i transmitting to %i, finishes at %llu.\n", sim_node(), dest, endTime); while (neighborEntry != NULL) { int other = neighborEntry->mote; sim_gain_put(other, msg, endTime, ack, power + sim_gain_value(sim_node(), other), reversePower + sim_gain_value(other, sim_node())); neighborEntry = sim_gain_next(neighborEntry); } list = outstandingReceptionHead; while (list != NULL) { list->lost = 1; dbg("CpmModelC,SNRLoss", "Lost packet from %i because %i has outstanding reception, startTime %llu endTime %llu\n", list->source, sim_node(), list->start, list->end); list = list->next; } } command void Model.setPendingTransmission() { transmitting = TRUE; dbg("CpmModelC", "setPendingTransmission: transmitting %i @ %s\n", transmitting, sim_time_string()); } default event void Model.receive(message_t* msg) {} sim_event_t* allocate_receive_event(sim_time_t endTime, receive_message_t* msg) { sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t)); evt->mote = sim_node(); evt->time = endTime; evt->handle = sim_gain_receive_handle; evt->cleanup = sim_queue_cleanup_event; evt->cancelled = 0; evt->force = 1; // Need to keep track of air even when node is off evt->data = msg; return evt; } receive_message_t* allocate_receive_message() { return (receive_message_t*)malloc(sizeof(receive_message_t)); } void free_receive_message(receive_message_t* msg) { free(msg); } } tinyos-2.1.2+dfsg/tos/lib/tossim/DemoSensorC.nc000066400000000000000000000033401207233610700213550ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ generic configuration DemoSensorC(){ provides interface Read; } implementation { components new ConstantSensorC(uint16_t, 0xbeef); Read = ConstantSensorC; } tinyos-2.1.2+dfsg/tos/lib/tossim/Driver.c000066400000000000000000000012001207233610700202420ustar00rootroot00000000000000#include int main() { Tossim* t = new Tossim(NULL); t->init(); //t->addChannel("Scheduler", fdopen(1, "w")); //t->addChannel("TossimPacketModelC", fdopen(1, "w")); t->addChannel("LedsC", fdopen(1, "w")); t->addChannel("AM", fdopen(1, "w")); Radio* r = t->radio(); for (int i = 0; i < 2; i++) { printf("Mote %i at %i\n", i, 15000000 * i + 1); Mote* m = t->getNode(i); m->bootAtTime(15000000 * i + 1); r->setNoise(i, -77.0, 3); for (int j = 0; j < 2; j++) { if (i != j) { r->add(i, j, -50.0); } } } for (int i = 0; i < 60; i++) { t->runNextEvent(); } } tinyos-2.1.2+dfsg/tos/lib/tossim/GainRadioModel.nc000066400000000000000000000045441207233610700220210ustar00rootroot00000000000000// $Id: GainRadioModel.nc,v 1.8 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The interface to a gain-based radio model, which considers * signal strength of transmission and propagation. It also * includes a clear channel estimate. The actual implementation * of the model (e.g., noise, signal collision) is generally * C-based. * * @author Philip Levis * @date December 2 2005 */ #include "TinyError.h" interface GainRadioModel { command void putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime, double gain, double reverseGain); command void setClearValue(double value); command bool clearChannel(); command void setPendingTransmission(); event void acked(message_t* msg); event void receive(message_t* msg); event bool shouldAck(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/tossim/MainC.nc000066400000000000000000000057241207233610700201730ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This version of Main is the system interface the TinyOS boot * sequence in TOSSIM. It wires the boot sequence implementation to * the scheduler and hardware resources. Unlike the standard Main, * it does not actually define the main function, as a * TOSSIM simulation is triggered from Python. * * @author Philip Levis * @date August 6 2005 */ // $Id: MainC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $ #include "hardware.h" configuration MainC { provides interface Boot; uses interface Init as SoftwareInit; } implementation { components PlatformC, SimMainP, TinySchedulerC; // SimMoteP is not referred to by any component here. // It is included to make sure nesC loads it, as it // includes functionality many other systems depend on. components SimMoteP; SimMainP.Scheduler -> TinySchedulerC; SimMainP.PlatformInit -> PlatformC; // Export the SoftwareInit and Booted for applications SoftwareInit = SimMainP.SoftwareInit; Boot = SimMainP; // This component may not be used by the application, but it must // be included. This is because there are Python calls that deliver // packets, and those python calls must terminate somewhere. If // the application does not wire this up to, e.g., ActiveMessageC, // the default handlers make sure nothing happens when a script // tries to deliver a packet to a node that has no radio stack. components ActiveMessageC; } tinyos-2.1.2+dfsg/tos/lib/tossim/PlatformC.nc000066400000000000000000000036201207233610700210640ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The default simulation platform, which does nothing. * * @author Phil Levis * @date November 22 2005 */ // $Id: PlatformC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $ module PlatformC { provides interface Init; } implementation { command error_t Init.init() { dbg("PlatformC", "Initialized mote.\n"); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tossim/README000066400000000000000000000016311207233610700175330ustar00rootroot00000000000000README for tinyos-2.x/tos/lib/tossim This directory contains the core code for the TOSSIM TinyOS simulator. One characteristic of TOSSIM is that it can controlled through a Python script. Building simple yet efficient support for this requires presenting most TOSSIM abstractions in a C++ interface, which is then transformed into a Python interface with the SWIG tool. This leads most TOSSIM abstractions to have three levels: C, nesC, and C++. Because nesC cannot call C++ and vice versa, TOSSIM exports its important call points as C functions. It links simple C++ wrapper classes against the simulation binary. Python can then call through the C++ interface. The files tossim.h and tossim.c, for example, are the basic TOSSIM C++ classes of Mote, Tossim, and Variable. These call functions in sim_tossim.c, which other parts of TOSSIM also call. The examples/ directory contains some sample Python scripts. tinyos-2.1.2+dfsg/tos/lib/tossim/SerialActiveMessageC.nc000066400000000000000000000132611207233610700231620ustar00rootroot00000000000000// $Id: SerialActiveMessageC.nc,v 1.8 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * The basic chip-independent TOSSIM Active Message layer for radio chips * that do not have simulation support. * * @author Philip Levis * @date December 2 2005 */ #include #include module SerialActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements as Acks; } uses { command am_addr_t amAddress(); } } implementation { serial_header_t* getHeader(message_t* amsg) { return (serial_header_t*)(amsg->data - sizeof(serial_header_t)); } task void startDone() { signal SplitControl.startDone(SUCCESS); } task void stopDone() { signal SplitControl.stopDone(SUCCESS); } command error_t SplitControl.start() { post startDone(); return SUCCESS; } command error_t SplitControl.stop() { post stopDone(); return SUCCESS; } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* amsg, uint8_t len) { dbg("Serial", "Serial: sending a packet of size %d\n", len); return FAIL; } command error_t AMSend.cancel[am_id_t id](message_t* msg) { dbg("Serial", "Serial: cancelled a packet\n"); return FAIL; } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->dest; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { serial_header_t* header = getHeader(amsg); header->dest = addr; } command am_addr_t AMPacket.source(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->src; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { serial_header_t* header = getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t t) { serial_header_t* header = getHeader(amsg); header->type = t; } command am_group_t AMPacket.group(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->group; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { serial_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } command void Packet.clear(message_t* msg) {} command uint8_t Packet.payloadLength(message_t* msg) { return getHeader(msg)->length; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { getHeader(msg)->length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command void* Packet.getPayload(message_t* msg, uint8_t len) { if (len <= TOSH_DATA_LENGTH) { return msg->data; } else { return NULL; } } async command error_t Acks.requestAck(message_t* msg) { return FAIL; } async command error_t Acks.noAck(message_t* msg) { return SUCCESS; } async command bool Acks.wasAcked(message_t* msg) { return FALSE; } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } default command am_addr_t amAddress() { return 0; } } tinyos-2.1.2+dfsg/tos/lib/tossim/SimMainP.nc000066400000000000000000000072631207233610700206610ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SimMainP implements the TOSSIM TinyOS boot sequence, as documented * in TEP 107. It differs from RealMainP (its mote counterpart) in that * it does not actually define a main function. * * @author Philip Levis * @date August 17 2005 */ static void __nesc_nido_initialise(int node); module SimMainP { provides interface Boot; uses interface Scheduler; uses interface Init as PlatformInit; uses interface Init as SoftwareInit; } implementation { int sim_main_start_mote() @C() @spontaneous() { char timeBuf[128]; atomic { /* First, initialize the Scheduler so components can post tasks. Initialize all of the very hardware specific stuff, such as CPU settings, counters, etc. After the hardware is ready, initialize the requisite software components and start execution.*/ call Scheduler.init(); /* Initialize the platform. Then spin on the Scheduler, passing * FALSE so it will not put the system to sleep if there are no * more tasks; if no tasks remain, continue on to software * initialization */ call PlatformInit.init(); while (call Scheduler.runNextTask()); /* Initialize software components.Then spin on the Scheduler, * passing FALSE so it will not put the system to sleep if there * are no more tasks; if no tasks remain, the system has booted * successfully.*/ call SoftwareInit.init(); while (call Scheduler.runNextTask()); } /* Enable interrupts now that system is ready. */ __nesc_enable_interrupt(); sim_print_now(timeBuf, 128); dbg("SimMainP", "Mote %li signaling boot at time %s.\n", sim_node(), timeBuf); signal Boot.booted(); /* Normally, at this point a mote enters a while(1) loop to * execute tasks. In TOSSIM, this call completes: posted tasks * are part of the global TOSSIM event loop. Look at * SimSchedulerBasicP for more details. */ return 0; } default command error_t PlatformInit.init() { return SUCCESS; } default command error_t SoftwareInit.init() { return SUCCESS; } default event void Boot.booted() { } } tinyos-2.1.2+dfsg/tos/lib/tossim/SimMote.nc000066400000000000000000000041231207233610700205510ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TOSSIM-specific interface to access a mote's state. TinyOS programs * should never use this interface. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: SimMote.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $ interface SimMote { async command long long int getEuid(); async command void setEuid(long long int euid); async command long long int getStartTime(); async command bool isOn(); async command int getVariableInfo(char* name, void** ptr, size_t* len); command void turnOn(); async command void turnOff(); } tinyos-2.1.2+dfsg/tos/lib/tossim/SimMoteP.nc000066400000000000000000000130661207233610700206770ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM abstraction of a mote. By putting simulation state into * a component, we can scale and reference this state automatically * using nesC's rewriting, rather than managing and indexing into * arrays manually. * * @author Phil Levis * @date August 19 2005 */ // $Id: SimMoteP.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $ module SimMoteP { provides interface SimMote; } implementation { long long int euid; long long int startTime; bool isOn; sim_event_t* bootEvent; async command long long int SimMote.getEuid() { return euid; } async command void SimMote.setEuid(long long int e) { euid = e; } async command long long int SimMote.getStartTime() { return startTime; } async command bool SimMote.isOn() { return isOn; } async command int SimMote.getVariableInfo(char* name, void** addr, size_t* size) { return __nesc_nido_resolve(sim_node(), name, (uintptr_t*)addr, (size_t*)size); } command void SimMote.turnOn() { if (!isOn) { if (bootEvent != NULL) { bootEvent->cancelled = TRUE; } __nesc_nido_initialise(sim_node()); startTime = sim_time(); dbg("SimMoteP", "Setting start time to %llu\n", startTime); isOn = TRUE; sim_main_start_mote(); } } async command void SimMote.turnOff() { isOn = FALSE; } long long int sim_mote_euid(int mote) @C() @spontaneous() { long long int result; int tmp = sim_node(); sim_set_node(mote); result = call SimMote.getEuid(); sim_set_node(tmp); return result; } void sim_mote_set_euid(int mote, long long int id) @C() @spontaneous() { int tmp = sim_node(); sim_set_node(mote); call SimMote.setEuid(id); sim_set_node(tmp); } long long int sim_mote_start_time(int mote) @C() @spontaneous() { long long int result; int tmp = sim_node(); sim_set_node(mote); result = call SimMote.getStartTime(); sim_set_node(tmp); return result; } int sim_mote_get_variable_info(int mote, char* name, void** ptr, size_t* len) @C() @spontaneous() { int result; int tmpID = sim_node(); sim_set_node(mote); result = call SimMote.getVariableInfo(name, ptr, len); dbg("SimMoteP", "Fetched %s of %i to be %p with len %i (result %i)\n", name, mote, *ptr, *len, result); sim_set_node(tmpID); return result; } void sim_mote_set_start_time(int mote, long long int t) @C() @spontaneous() { int tmpID = sim_node(); sim_set_node(mote); startTime = t; dbg("SimMoteP", "Setting start time to %llu\n", startTime); sim_set_node(tmpID); return; } bool sim_mote_is_on(int mote) @C() @spontaneous() { bool result; int tmp = sim_node(); sim_set_node(mote); result = call SimMote.isOn(); sim_set_node(tmp); return result; } void sim_mote_turn_on(int mote) @C() @spontaneous() { int tmp = sim_node(); sim_set_node(mote); call SimMote.turnOn(); sim_set_node(tmp); } void sim_mote_turn_off(int mote) @C() @spontaneous() { int tmp = sim_node(); sim_set_node(mote); call SimMote.turnOff(); sim_set_node(tmp); } void sim_mote_boot_handle(sim_event_t* e) { char buf[128]; sim_print_now(buf, 128); bootEvent = (sim_event_t*)NULL; dbg("SimMoteP", "Turning on mote %i at time %s.\n", (int)sim_node(), buf); call SimMote.turnOn(); } void sim_mote_enqueue_boot_event(int mote) @C() @spontaneous() { int tmp = sim_node(); sim_set_node(mote); if (bootEvent != NULL) { if (bootEvent->time == startTime) { // In case we have a cancelled boot event. bootEvent->cancelled = FALSE; return; } else { bootEvent->cancelled = TRUE; } } bootEvent = (sim_event_t*) malloc(sizeof(sim_event_t)); bootEvent->time = startTime; bootEvent->mote = mote; bootEvent->force = TRUE; bootEvent->data = NULL; bootEvent->handle = sim_mote_boot_handle; bootEvent->cleanup = sim_queue_cleanup_event; sim_queue_insert(bootEvent); sim_set_node(tmp); } } tinyos-2.1.2+dfsg/tos/lib/tossim/SimSchedulerBasicP.nc000066400000000000000000000140221207233610700226440ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * SimSchedulerBasic implements the default TinyOS scheduler sequence * (documented in TEP 106) for the TOSSIM platform. Its major departure * from the standard TinyOS scheduler is that tasks are executed * within TOSSIM events. This introduces task latency. * * @author Philip Levis * @author Cory Sharp * @date August 19 2005 */ #include module SimSchedulerBasicP { provides interface Scheduler; provides interface TaskBasic[uint8_t id]; } implementation { enum { NUM_TASKS = uniqueCount("TinySchedulerC.TaskBasic"), NO_TASK = 255, }; uint8_t m_head; uint8_t m_tail; uint8_t m_next[NUM_TASKS]; /* This simulation state is kept on a per-node basis. Better to take advantage of nesC's automatic state replication than try to do it ourselves. */ bool sim_scheduler_event_pending = FALSE; sim_event_t sim_scheduler_event; int sim_config_task_latency() {return 100;} /* Only enqueue the event for execution if it is not already enqueued. If there are more tasks in the queue, the event will re-enqueue itself (see the handle function). */ void sim_scheduler_submit_event() { if (sim_scheduler_event_pending == FALSE) { sim_scheduler_event.time = sim_time() + sim_config_task_latency(); sim_queue_insert(&sim_scheduler_event); sim_scheduler_event_pending = TRUE; } } void sim_scheduler_event_handle(sim_event_t* e) { sim_scheduler_event_pending = FALSE; // If we successfully executed a task, re-enqueue the event. This // will always succeed, as sim_scheduler_event_pending was just // set to be false. Note that this means there will be an extra // execution (on an empty task queue). We could optimize this // away, but this code is cleaner, and more accurately reflects // the real TinyOS main loop. if (call Scheduler.runNextTask()) { sim_scheduler_submit_event(); } } /* Initialize a scheduler event. This should only be done * once, when the scheduler is initialized. */ void sim_scheduler_event_init(sim_event_t* e) { e->mote = sim_node(); e->force = 0; e->data = NULL; e->handle = sim_scheduler_event_handle; e->cleanup = sim_queue_cleanup_none; } // Helper functions (internal functions) intentionally do not have atomic // sections. It is left as the duty of the exported interface functions to // manage atomicity to minimize chances for binary code bloat. // move the head forward // if the head is at the end, mark the tail at the end, too // mark the task as not in the queue uint8_t popTask() { if( m_head != NO_TASK ) { uint8_t id = m_head; m_head = m_next[m_head]; if( m_head == NO_TASK ) { m_tail = NO_TASK; } m_next[id] = NO_TASK; return id; } else { return NO_TASK; } } bool isWaiting( uint8_t id ) { return (m_next[id] != NO_TASK) || (m_tail == id); } bool pushTask( uint8_t id ) { if( !isWaiting(id) ) { if( m_head == NO_TASK ) { m_head = id; m_tail = id; } else { m_next[m_tail] = id; m_tail = id; } return TRUE; } else { return FALSE; } } command void Scheduler.init() { dbg("Scheduler", "Initializing scheduler.\n"); atomic { memset( m_next, NO_TASK, sizeof(m_next) ); m_head = NO_TASK; m_tail = NO_TASK; sim_scheduler_event_pending = FALSE; sim_scheduler_event_init(&sim_scheduler_event); } } command bool Scheduler.runNextTask() { uint8_t nextTask; atomic { nextTask = popTask(); if( nextTask == NO_TASK ) { dbg("Scheduler", "Told to run next task, but no task to run.\n"); return FALSE; } } dbg("Scheduler", "Running task %hhu.\n", nextTask); signal TaskBasic.runTask[nextTask](); return TRUE; } command void Scheduler.taskLoop() { // This should never run. } /** * Return SUCCESS if the post succeeded, EBUSY if it was already posted. */ async command error_t TaskBasic.postTask[uint8_t id]() { error_t result; atomic { result = pushTask(id) ? SUCCESS : EBUSY; } if (result == SUCCESS) { dbg("Scheduler", "Posting task %hhu.\n", id); sim_scheduler_submit_event(); } else { dbg("Scheduler", "Posting task %hhu, but already posted.\n", id); } return result; } default event void TaskBasic.runTask[uint8_t id]() { } } tinyos-2.1.2+dfsg/tos/lib/tossim/SimpleRadioModel.nc000066400000000000000000000042221207233610700223650ustar00rootroot00000000000000// $Id: SimpleRadioModel.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The interface to a simple radio model, which has per-link bit error * probabilities and assumes complete interferences (the old TOSSIM * story). * * @author Philip Levis * @date December 2 2005 */ #include "TinyError.h" interface SimpleRadioModel { command void putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime); command void putOnAirToAll(message_t* msg, bool ack, sim_time_t endTime); command bool clearChannel(); event void acked(message_t* msg); event void receive(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/tossim/TOSSIM.py000066400000000000000000000312161207233610700202450ustar00rootroot00000000000000# This file was automatically generated by SWIG (http://www.swig.org). # Version 1.3.33 # # Don't modify this file, modify the SWIG interface instead. # This file is compatible with both classic and new-style classes. import _TOSSIM import new new_instancemethod = new.instancemethod try: _swig_property = property except NameError: pass # Python < 2.2 doesn't have 'property'. def _swig_setattr_nondynamic(self,class_type,name,value,static=1): if (name == "thisown"): return self.this.own(value) if (name == "this"): if type(value).__name__ == 'PySwigObject': self.__dict__[name] = value return method = class_type.__swig_setmethods__.get(name,None) if method: return method(self,value) if (not static) or hasattr(self,name): self.__dict__[name] = value else: raise AttributeError("You cannot add attributes to %s" % self) def _swig_setattr(self,class_type,name,value): return _swig_setattr_nondynamic(self,class_type,name,value,0) def _swig_getattr(self,class_type,name): if (name == "thisown"): return self.this.own() method = class_type.__swig_getmethods__.get(name,None) if method: return method(self) raise AttributeError,name def _swig_repr(self): try: strthis = "proxy of " + self.this.__repr__() except: strthis = "" return "<%s.%s; %s >" % (self.__class__.__module__, self.__class__.__name__, strthis,) import types try: _object = types.ObjectType _newclass = 1 except AttributeError: class _object : pass _newclass = 0 del types class MAC(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, MAC, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, MAC, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_MAC(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_MAC __del__ = lambda self : None; def initHigh(*args): return _TOSSIM.MAC_initHigh(*args) def initLow(*args): return _TOSSIM.MAC_initLow(*args) def high(*args): return _TOSSIM.MAC_high(*args) def low(*args): return _TOSSIM.MAC_low(*args) def symbolsPerSec(*args): return _TOSSIM.MAC_symbolsPerSec(*args) def bitsPerSymbol(*args): return _TOSSIM.MAC_bitsPerSymbol(*args) def preambleLength(*args): return _TOSSIM.MAC_preambleLength(*args) def exponentBase(*args): return _TOSSIM.MAC_exponentBase(*args) def maxIterations(*args): return _TOSSIM.MAC_maxIterations(*args) def minFreeSamples(*args): return _TOSSIM.MAC_minFreeSamples(*args) def rxtxDelay(*args): return _TOSSIM.MAC_rxtxDelay(*args) def ackTime(*args): return _TOSSIM.MAC_ackTime(*args) def setInitHigh(*args): return _TOSSIM.MAC_setInitHigh(*args) def setInitLow(*args): return _TOSSIM.MAC_setInitLow(*args) def setHigh(*args): return _TOSSIM.MAC_setHigh(*args) def setLow(*args): return _TOSSIM.MAC_setLow(*args) def setSymbolsPerSec(*args): return _TOSSIM.MAC_setSymbolsPerSec(*args) def setBitsBerSymbol(*args): return _TOSSIM.MAC_setBitsBerSymbol(*args) def setPreambleLength(*args): return _TOSSIM.MAC_setPreambleLength(*args) def setExponentBase(*args): return _TOSSIM.MAC_setExponentBase(*args) def setMaxIterations(*args): return _TOSSIM.MAC_setMaxIterations(*args) def setMinFreeSamples(*args): return _TOSSIM.MAC_setMinFreeSamples(*args) def setRxtxDelay(*args): return _TOSSIM.MAC_setRxtxDelay(*args) def setAckTime(*args): return _TOSSIM.MAC_setAckTime(*args) MAC_swigregister = _TOSSIM.MAC_swigregister MAC_swigregister(MAC) class Radio(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Radio, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Radio, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Radio(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Radio __del__ = lambda self : None; def add(*args): return _TOSSIM.Radio_add(*args) def gain(*args): return _TOSSIM.Radio_gain(*args) def connected(*args): return _TOSSIM.Radio_connected(*args) def remove(*args): return _TOSSIM.Radio_remove(*args) def setNoise(*args): return _TOSSIM.Radio_setNoise(*args) def setSensitivity(*args): return _TOSSIM.Radio_setSensitivity(*args) Radio_swigregister = _TOSSIM.Radio_swigregister Radio_swigregister(Radio) class Packet(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Packet, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Packet, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Packet(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Packet __del__ = lambda self : None; def setSource(*args): return _TOSSIM.Packet_setSource(*args) def source(*args): return _TOSSIM.Packet_source(*args) def setDestination(*args): return _TOSSIM.Packet_setDestination(*args) def destination(*args): return _TOSSIM.Packet_destination(*args) def setLength(*args): return _TOSSIM.Packet_setLength(*args) def length(*args): return _TOSSIM.Packet_length(*args) def setType(*args): return _TOSSIM.Packet_setType(*args) def type(*args): return _TOSSIM.Packet_type(*args) def data(*args): return _TOSSIM.Packet_data(*args) def setData(*args): return _TOSSIM.Packet_setData(*args) def maxLength(*args): return _TOSSIM.Packet_maxLength(*args) def setStrength(*args): return _TOSSIM.Packet_setStrength(*args) def deliver(*args): return _TOSSIM.Packet_deliver(*args) def deliverNow(*args): return _TOSSIM.Packet_deliverNow(*args) Packet_swigregister = _TOSSIM.Packet_swigregister Packet_swigregister(Packet) class variable_string_t(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, variable_string_t, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, variable_string_t, name) __repr__ = _swig_repr __swig_setmethods__["type"] = _TOSSIM.variable_string_t_type_set __swig_getmethods__["type"] = _TOSSIM.variable_string_t_type_get if _newclass:type = _swig_property(_TOSSIM.variable_string_t_type_get, _TOSSIM.variable_string_t_type_set) __swig_setmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_set __swig_getmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_get if _newclass:ptr = _swig_property(_TOSSIM.variable_string_t_ptr_get, _TOSSIM.variable_string_t_ptr_set) __swig_setmethods__["len"] = _TOSSIM.variable_string_t_len_set __swig_getmethods__["len"] = _TOSSIM.variable_string_t_len_get if _newclass:len = _swig_property(_TOSSIM.variable_string_t_len_get, _TOSSIM.variable_string_t_len_set) __swig_setmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_set __swig_getmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_get if _newclass:isArray = _swig_property(_TOSSIM.variable_string_t_isArray_get, _TOSSIM.variable_string_t_isArray_set) def __init__(self, *args): this = _TOSSIM.new_variable_string_t(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_variable_string_t __del__ = lambda self : None; variable_string_t_swigregister = _TOSSIM.variable_string_t_swigregister variable_string_t_swigregister(variable_string_t) class nesc_app_t(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, nesc_app_t, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, nesc_app_t, name) __repr__ = _swig_repr __swig_setmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_set __swig_getmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_get if _newclass:numVariables = _swig_property(_TOSSIM.nesc_app_t_numVariables_get, _TOSSIM.nesc_app_t_numVariables_set) __swig_setmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_set __swig_getmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_get if _newclass:variableNames = _swig_property(_TOSSIM.nesc_app_t_variableNames_get, _TOSSIM.nesc_app_t_variableNames_set) __swig_setmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_set __swig_getmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_get if _newclass:variableTypes = _swig_property(_TOSSIM.nesc_app_t_variableTypes_get, _TOSSIM.nesc_app_t_variableTypes_set) __swig_setmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_set __swig_getmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_get if _newclass:variableArray = _swig_property(_TOSSIM.nesc_app_t_variableArray_get, _TOSSIM.nesc_app_t_variableArray_set) def __init__(self, *args): this = _TOSSIM.new_nesc_app_t(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_nesc_app_t __del__ = lambda self : None; nesc_app_t_swigregister = _TOSSIM.nesc_app_t_swigregister nesc_app_t_swigregister(nesc_app_t) class Variable(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Variable, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Variable, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Variable(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Variable __del__ = lambda self : None; def getData(*args): return _TOSSIM.Variable_getData(*args) Variable_swigregister = _TOSSIM.Variable_swigregister Variable_swigregister(Variable) class Mote(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Mote, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Mote, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Mote(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Mote __del__ = lambda self : None; def id(*args): return _TOSSIM.Mote_id(*args) def euid(*args): return _TOSSIM.Mote_euid(*args) def setEuid(*args): return _TOSSIM.Mote_setEuid(*args) def bootTime(*args): return _TOSSIM.Mote_bootTime(*args) def bootAtTime(*args): return _TOSSIM.Mote_bootAtTime(*args) def isOn(*args): return _TOSSIM.Mote_isOn(*args) def turnOff(*args): return _TOSSIM.Mote_turnOff(*args) def turnOn(*args): return _TOSSIM.Mote_turnOn(*args) def getVariable(*args): return _TOSSIM.Mote_getVariable(*args) def addNoiseTraceReading(*args): return _TOSSIM.Mote_addNoiseTraceReading(*args) def createNoiseModel(*args): return _TOSSIM.Mote_createNoiseModel(*args) def generateNoise(*args): return _TOSSIM.Mote_generateNoise(*args) Mote_swigregister = _TOSSIM.Mote_swigregister Mote_swigregister(Mote) class Tossim(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Tossim, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Tossim, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Tossim(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Tossim __del__ = lambda self : None; def init(*args): return _TOSSIM.Tossim_init(*args) def time(*args): return _TOSSIM.Tossim_time(*args) def ticksPerSecond(*args): return _TOSSIM.Tossim_ticksPerSecond(*args) def setTime(*args): return _TOSSIM.Tossim_setTime(*args) def timeStr(*args): return _TOSSIM.Tossim_timeStr(*args) def currentNode(*args): return _TOSSIM.Tossim_currentNode(*args) def getNode(*args): return _TOSSIM.Tossim_getNode(*args) def setCurrentNode(*args): return _TOSSIM.Tossim_setCurrentNode(*args) def addChannel(*args): return _TOSSIM.Tossim_addChannel(*args) def removeChannel(*args): return _TOSSIM.Tossim_removeChannel(*args) def randomSeed(*args): return _TOSSIM.Tossim_randomSeed(*args) def runNextEvent(*args): return _TOSSIM.Tossim_runNextEvent(*args) def mac(*args): return _TOSSIM.Tossim_mac(*args) def radio(*args): return _TOSSIM.Tossim_radio(*args) def newPacket(*args): return _TOSSIM.Tossim_newPacket(*args) Tossim_swigregister = _TOSSIM.Tossim_swigregister Tossim_swigregister(Tossim) tinyos-2.1.2+dfsg/tos/lib/tossim/TinySchedulerC.nc000066400000000000000000000037721207233610700220720ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * TOSSIM-specific scheduler implementation, which models * tasks as simulation events (in order to capture delay). * * @author Philip Levis * @date Nov 22 2005 */ // $Id: TinySchedulerC.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $ configuration TinySchedulerC { provides interface Scheduler; provides interface TaskBasic[uint8_t id]; } implementation { components SimSchedulerBasicP as Sched; Scheduler = Sched; TaskBasic = Sched; } tinyos-2.1.2+dfsg/tos/lib/tossim/TossimActiveMessageC.nc000066400000000000000000000175531207233610700232310ustar00rootroot00000000000000// $Id: TossimActiveMessageC.nc,v 1.7 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * The basic chip-independent TOSSIM Active Message layer for radio chips * that do not have simulation support. * * @author Philip Levis * @date December 2 2005 */ #include module TossimActiveMessageC { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface TossimPacket; } uses { interface TossimPacketModel as Model; command am_addr_t amAddress(); } } implementation { message_t buffer; message_t* bufferPointer = &buffer; tossim_header_t* getHeader(message_t* amsg) { return (tossim_header_t*)(amsg->data - sizeof(tossim_header_t)); } tossim_metadata_t* getMetadata(message_t* amsg) { return (tossim_metadata_t*)(&amsg->metadata); } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* amsg, uint8_t len) { error_t err; tossim_header_t* header = getHeader(amsg); dbg("AM", "AM: Sending packet (id=%hhu, len=%hhu) to %hu\n", id, len, addr); header->type = id; header->dest = addr; header->src = call AMPacket.address(); header->length = len; err = call Model.send((int)addr, amsg, len + sizeof(tossim_header_t) + sizeof(tossim_footer_t)); return err; } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call Model.cancel(msg); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } command int8_t TossimPacket.strength(message_t* msg) { return getMetadata(msg)->strength; } event void Model.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } /* Receiving a packet */ event void Model.receive(message_t* msg) { uint8_t len; void* payload; memcpy(bufferPointer, msg, sizeof(message_t)); len = call Packet.payloadLength(bufferPointer); payload = call Packet.getPayload(bufferPointer, call Packet.maxPayloadLength()); if (call AMPacket.isForMe(msg)) { dbg("AM", "Received active message (%p) of type %hhu and length %hhu for me @ %s.\n", bufferPointer, call AMPacket.type(bufferPointer), len, sim_time_string()); bufferPointer = signal Receive.receive[call AMPacket.type(bufferPointer)](bufferPointer, payload, len); } else { dbg("AM", "Snooped on active message of type %hhu and length %hhu for %hu @ %s.\n", call AMPacket.type(bufferPointer), len, call AMPacket.destination(bufferPointer), sim_time_string()); bufferPointer = signal Snoop.receive[call AMPacket.type(bufferPointer)](bufferPointer, payload, len); } } event bool Model.shouldAck(message_t* msg) { tossim_header_t* header = getHeader(msg); if (header->dest == call amAddress()) { dbg("Acks", "Received packet addressed to me so ack it\n"); return TRUE; } return FALSE; } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { tossim_header_t* header = getHeader(amsg); return header->dest; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { tossim_header_t* header = getHeader(amsg); header->dest = addr; } command am_addr_t AMPacket.source(message_t* amsg) { tossim_header_t* header = getHeader(amsg); return header->src; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { tossim_header_t* header = getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { tossim_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t t) { tossim_header_t* header = getHeader(amsg); header->type = t; } command void Packet.clear(message_t* msg) {} command uint8_t Packet.payloadLength(message_t* msg) { return getHeader(msg)->length; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { getHeader(msg)->length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command void* Packet.getPayload(message_t* msg, uint8_t len) { if (len <= TOSH_DATA_LENGTH) { return msg->data; } else { return NULL; } } command am_group_t AMPacket.group(message_t* amsg) { tossim_header_t* header = getHeader(amsg); return header->group; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { tossim_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } default command error_t Model.send(int node, message_t* msg, uint8_t len) { return FAIL; } default command error_t Model.cancel(message_t* msg) { return FAIL; } default command am_addr_t amAddress() { return 0; } void active_message_deliver_handle(sim_event_t* evt) { message_t* m = (message_t*)evt->data; dbg("Packet", "Delivering packet to %i at %s\n", (int)sim_node(), sim_time_string()); signal Model.receive(m); } sim_event_t* allocate_deliver_event(int node, message_t* msg, sim_time_t t) { sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t)); evt->mote = node; evt->time = t; evt->handle = active_message_deliver_handle; evt->cleanup = sim_queue_cleanup_event; evt->cancelled = 0; evt->force = 0; evt->data = msg; return evt; } void active_message_deliver(int node, message_t* msg, sim_time_t t) @C() @spontaneous() { sim_event_t* evt = allocate_deliver_event(node, msg, t); sim_queue_insert(evt); } } tinyos-2.1.2+dfsg/tos/lib/tossim/TossimPacket.nc000066400000000000000000000035311207233610700216040ustar00rootroot00000000000000// $Id: TossimPacket.nc,v 1.1 2007-09-04 17:19:23 scipio Exp $ /* * Copyright (c) 2007 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Metadata interface for TOSSIM packets. * * @author Philip Levis * @date September 4 2007 */ #include #include interface TossimPacket { command int8_t strength(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/tossim/TossimPacketModel.nc000066400000000000000000000067351207233610700225760ustar00rootroot00000000000000// $Id: TossimPacketModel.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The interface to a packet-level radio simulation, which may sit * on top of higher fidelity simulators. * * @author Philip Levis * @date December 2 2005 */ #include #include interface TossimPacketModel { /** * Send a packet with a data payload of len. To determine * the maximum available size, use the Packet interface of the * component providing Send. If send returns SUCCESS, then the * component will signal the sendDone event in the future; if send * returns an error, it will not signal sendDone. Note that a * component may accept a send request which it later finds it * cannot satisfy; in this case, it will signal sendDone with an * appropriate error code. */ command error_t send(int node, message_t* msg, uint8_t len); /** * Cancel a requested transmission. Returns SUCCESS if the * transmission was cancelled properly (not sent in its * entirety). Note that the component may not know * if the send was successfully cancelled, if the radio is * handling much of the logic; in this case, a component * should be conservative and return an appropriate error code. * A successful call to cancel must always result in a * sendFailed event, and never a sendSucceeded event. */ command error_t cancel(message_t* msg); /** * Signaled in response to an accepted send request. msg * is the sent buffer, and error indicates whether the * send was succesful, and if not, the cause of the failure. */ event void sendDone(message_t* msg, error_t error); /** * Signal that a packet was received. Note that there is no buffer * swap: a component using this interface must copy out the message * if it needs it. */ event void receive(message_t* msg); event bool shouldAck(message_t* msg); } tinyos-2.1.2+dfsg/tos/lib/tossim/TossimPacketModelC.nc000066400000000000000000000232241207233610700226710ustar00rootroot00000000000000// $Id: TossimPacketModelC.nc,v 1.12 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * This packet-level radio component implements a basic CSMA * algorithm. It derives its constants from sim_csma.c. The algorithm * is as follows: * * Transmit iff you measure a clear channel min_free_samples() in a row. * Sample up to max_iterations() times. If you do not detect a free * channel in this time, signal sendDone with an error of EBUSY. * If max_iterations() is zero, then sample indefinitely. * * On a send request, use an initial backoff in the range of * init_low() to init_high(). * Subsequent backoffs are in the range 

      (low, high) * exponent_base() ^ iterations
      * * The default exponent_base is 1 (constant backoff). * * * @author Philip Levis * @date Dec 16 2005 * */ #include #include module TossimPacketModelC { provides { interface Init; interface SplitControl as Control; interface PacketAcknowledgements; interface TossimPacketModel as Packet; } uses interface GainRadioModel; } implementation { bool initialized = FALSE; bool running = FALSE; uint8_t backoffCount; uint8_t neededFreeSamples; message_t* sending = NULL; bool transmitting = FALSE; uint8_t sendingLength = 0; int destNode; sim_event_t sendEvent; message_t receiveBuffer; tossim_metadata_t* getMetadata(message_t* msg) { return (tossim_metadata_t*)(&msg->metadata); } command error_t Init.init() { dbg("TossimPacketModelC", "TossimPacketModelC: Init.init() called\n"); initialized = TRUE; // We need to cancel in case an event is still lying around in the queue from // before a reboot. Otherwise, the event will be executed normally (node is on), // but its memory has been zeroed out. sendEvent.cancelled = 1; return SUCCESS; } task void startDoneTask() { running = TRUE; signal Control.startDone(SUCCESS); } task void stopDoneTask() { running = FALSE; signal Control.stopDone(SUCCESS); } command error_t Control.start() { if (!initialized) { dbgerror("TossimPacketModelC", "TossimPacketModelC: Control.start() called before initialization!\n"); return FAIL; } dbg("TossimPacketModelC", "TossimPacketModelC: Control.start() called.\n"); post startDoneTask(); return SUCCESS; } command error_t Control.stop() { if (!initialized) { dbgerror("TossimPacketModelC", "TossimPacketModelC: Control.stop() called before initialization!\n"); return FAIL; } running = FALSE; dbg("TossimPacketModelC", "TossimPacketModelC: Control.stop() called.\n"); post stopDoneTask(); return SUCCESS; } async command error_t PacketAcknowledgements.requestAck(message_t* msg) { tossim_metadata_t* meta = getMetadata(msg); meta->ack = TRUE; return SUCCESS; } async command error_t PacketAcknowledgements.noAck(message_t* ack) { tossim_metadata_t* meta = getMetadata(ack); meta->ack = FALSE; return SUCCESS; } async command error_t PacketAcknowledgements.wasAcked(message_t* ack) { tossim_metadata_t* meta = getMetadata(ack); return meta->ack; } task void sendDoneTask() { message_t* msg = sending; tossim_metadata_t* meta = getMetadata(msg); meta->ack = 0; meta->strength = 0; meta->time = 0; sending = FALSE; signal Packet.sendDone(msg, running? SUCCESS:EOFF); } command error_t Packet.cancel(message_t* msg) { return FAIL; } void start_csma(); command error_t Packet.send(int dest, message_t* msg, uint8_t len) { if (!initialized) { dbgerror("TossimPacketModelC", "TossimPacketModelC: Send.send() called, but not initialized!\n"); return EOFF; } if (!running) { dbgerror("TossimPacketModelC", "TossimPacketModelC: Send.send() called, but not running!\n"); return EOFF; } if (sending != NULL) { return EBUSY; } sendingLength = len; sending = msg; destNode = dest; backoffCount = 0; neededFreeSamples = sim_csma_min_free_samples(); start_csma(); return SUCCESS; } void send_backoff(sim_event_t* evt); void send_transmit(sim_event_t* evt); void send_transmit_done(sim_event_t* evt); void start_csma() { sim_time_t first_sample; // The backoff is in terms of symbols. So take a random number // in the range of backoff times, and multiply it by the // sim_time per symbol. sim_time_t backoff = sim_random(); backoff %= (sim_csma_init_high() - sim_csma_init_low()); backoff += sim_csma_init_low(); backoff *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec()); dbg("TossimPacketModelC", "Starting CMSA with %lli.\n", backoff); first_sample = sim_time() + backoff; sendEvent.mote = sim_node(); sendEvent.time = first_sample; sendEvent.force = 0; sendEvent.cancelled = 0; sendEvent.handle = send_backoff; sendEvent.cleanup = sim_queue_cleanup_none; sim_queue_insert(&sendEvent); } void send_backoff(sim_event_t* evt) { backoffCount++; if (call GainRadioModel.clearChannel()) { neededFreeSamples--; } else { neededFreeSamples = sim_csma_min_free_samples(); } if (neededFreeSamples == 0) { sim_time_t delay; delay = sim_csma_rxtx_delay(); delay *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec()); evt->time += delay; transmitting = TRUE; call GainRadioModel.setPendingTransmission(); evt->handle = send_transmit; sim_queue_insert(evt); } else if (sim_csma_max_iterations() == 0 || backoffCount <= sim_csma_max_iterations()) { sim_time_t backoff = sim_random(); sim_time_t modulo = sim_csma_high() - sim_csma_low(); modulo *= pow(sim_csma_exponent_base(), backoffCount); backoff %= modulo; backoff += sim_csma_init_low(); backoff *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec()); evt->time += backoff; sim_queue_insert(evt); } else { message_t* rval = sending; sending = NULL; dbg("TossimPacketModelC", "PACKET: Failed to send packet due to busy channel.\n"); signal Packet.sendDone(rval, EBUSY); } } int sim_packet_header_length() { return sizeof(tossim_header_t); } void send_transmit(sim_event_t* evt) { sim_time_t duration; tossim_metadata_t* metadata = getMetadata(sending); duration = 8 * sendingLength; duration /= sim_csma_bits_per_symbol(); duration += sim_csma_preamble_length(); if (metadata->ack) { duration += sim_csma_ack_time(); } duration *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec()); evt->time += duration; evt->handle = send_transmit_done; dbg("TossimPacketModelC", "PACKET: Broadcasting packet to everyone.\n"); call GainRadioModel.putOnAirTo(destNode, sending, metadata->ack, evt->time, 0.0, 0.0); metadata->ack = 0; evt->time += (sim_csma_rxtx_delay() * (sim_ticks_per_sec() / sim_csma_symbols_per_sec())); dbg("TossimPacketModelC", "PACKET: Send done at %llu.\n", evt->time); sim_queue_insert(evt); } void send_transmit_done(sim_event_t* evt) { message_t* rval = sending; sending = NULL; transmitting = FALSE; dbg("TossimPacketModelC", "PACKET: Signaling send done at %llu.\n", sim_time()); signal Packet.sendDone(rval, running? SUCCESS:EOFF); } event void GainRadioModel.receive(message_t* msg) { if (running && !transmitting) { signal Packet.receive(msg); } } uint8_t error = 0; event void GainRadioModel.acked(message_t* msg) { if (running) { tossim_metadata_t* metadata = getMetadata(sending); metadata->ack = 1; if (msg != sending) { error = 1; dbg("TossimPacketModelC", "Requested ack for 0x%x, but outgoing packet is 0x%x.\n", msg, sending); } } } event bool GainRadioModel.shouldAck(message_t* msg) { if (running && !transmitting) { return signal Packet.shouldAck(msg); } else { return FALSE; } } default event void Control.startDone(error_t err) { return; } default event void Control.stopDone(error_t err) { return; } } tinyos-2.1.2+dfsg/tos/lib/tossim/TossimRadioMsg.h000066400000000000000000000006601207233610700217310ustar00rootroot00000000000000#ifndef TOSSIM_RADIO_MSG_H #define TOSSIM_RADIO_MSG_H #include "AM.h" typedef nx_struct tossim_header { nx_am_addr_t dest; nx_am_addr_t src; nx_uint8_t length; nx_am_group_t group; nx_am_id_t type; } tossim_header_t; typedef nx_struct tossim_footer { nxle_uint16_t crc; } tossim_footer_t; typedef nx_struct tossim_metadata { nx_int8_t strength; nx_uint8_t ack; nx_uint16_t time; } tossim_metadata_t; #endif tinyos-2.1.2+dfsg/tos/lib/tossim/UscGainInterferenceModelC.nc000066400000000000000000000251541207233610700241520ustar00rootroot00000000000000// $Id: UscGainInterferenceModelC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * This interference model is based off experimental data gathered * from mica2 nodes by Dongjin Son and Bhaskar Krishnamachari at USC. * It simplifies their observations in two ways. First, rather than * a smooth curve, this model makes a binary interference assumption * when the packets are within 3dBm of each other (their curve is very * sharp, so this seems like an OK simplification for now). Second, * it uses an additive signal strength model for interference. Their * results (as one might expect from colliding sinusoids) show that * interference signal strength is more complex than this. * * @author Philip Levis * @date Jun 1 2006 */ #include module UscGainInterferenceModelC { provides interface GainRadioModel as Model; } implementation { message_t* outgoing; // If I'm sending, this is my outgoing packet bool requestAck; bool receiving = 0; // Whether or not I think I'm receiving a packet struct receive_message; typedef struct receive_message receive_message_t; struct receive_message { int source; sim_time_t start; sim_time_t end; double power; bool lost; bool ack; message_t* msg; receive_message_t* next; }; receive_message_t* outstandingReceptionHead = NULL; receive_message_t* allocate_receive_message(); sim_event_t* allocate_receive_event(sim_time_t t, receive_message_t* m); /** * Heard signal is equal to the signal strength of ambient noise * plus the signal strength of all transmissions. The pow() and * log() calls transform dBm into energy and back. */ double heardSignal() { receive_message_t* current = outstandingReceptionHead; double localNoise = sim_gain_sample_noise(sim_node()); double sig = pow(10.0, localNoise / 10.0); dbg("Gain", "Computing noise @ %s: %0.2f", sim_time_string(), localNoise); while (current != NULL) { sig += pow(10.0, current->power / 10.0); dbg_clear("Gain", " "); if (current->power >= 0.0) { dbg_clear("Gain", "+"); } dbg_clear("Gain", "%0.2f ", current->power); current = current->next; } dbg_clear("Gain", " = %0.2f\n", 10.0 * log(sig) / log(10.0)); return 10.0 * log(sig) / log(10.0); } void sim_gain_ack_handle(sim_event_t* evt) { if (outgoing != NULL && requestAck && sim_mote_is_on(sim_node())) { signal Model.acked(outgoing); } } sim_event_t receiveEvent; // This clear threshold comes from the CC2420 data sheet double clearThreshold = -95.0; bool collision = FALSE; message_t* incoming = NULL; int incomingSource; command void Model.setClearValue(double value) { clearThreshold = value; dbg("Gain", "Setting clear threshold to %f\n", clearThreshold); } command bool Model.clearChannel() { double channel = heardSignal(); dbg("Gain", "Checking clear channel @ %s: %f <= %f \n", sim_time_string(), channel, clearThreshold); return channel < clearThreshold; } void sim_gain_schedule_ack(int source, sim_time_t t) { sim_event_t* ackEvent = (sim_event_t*)malloc(sizeof(sim_event_t)); ackEvent->mote = source; ackEvent->force = 1; ackEvent->cancelled = 0; ackEvent->time = t; ackEvent->handle = sim_gain_ack_handle; ackEvent->cleanup = sim_queue_cleanup_event; sim_queue_insert(ackEvent); } void sim_gain_receive_handle(sim_event_t* evt) { receive_message_t* mine = (receive_message_t*)evt->data; receive_message_t* predecessor = NULL; receive_message_t* list = outstandingReceptionHead; dbg("Gain", "Handling reception event @ %s.\n", sim_time_string()); // Scan the list for the node which precedes the one pointing // to the received packet. while (list != NULL) { if (list->next == mine) { predecessor = list; } if (list != mine) { if ((list->power - sim_gain_sensitivity()) < mine->power) { dbg("Gain", "Lost packet from %i as I concurrently received a packet stronger than %lf\n", list->source, list->power); list->lost = 1; } } list = list->next; } // Remove the received packet from the oustanding list by updating // the list pointers: A->B->C becomes A->C. If the received packet // is the head of the queue, then update the head pointer. if (predecessor) { predecessor->next = mine->next; } else if (mine == outstandingReceptionHead) { // must be head outstandingReceptionHead = mine->next; } else { dbgerror("Gain", "Incoming packet list structure is corrupted: entry is not the head and no entry points to it.\n"); } // Because the packet has been removed from the queue, it is not // included in heardSignal(): this line tests if the Signal of the // packet is above the threshold over the Noise of all other RF // energy sources (local noise, other packets, etc.). if ((mine->power - sim_gain_sensitivity()) < heardSignal()) { dbg("Gain", "Lost packet from %i as its power %lf was below sensitivity threshold\n", mine->source, mine->power); mine->lost = 1; } if (!mine->lost) { dbg_clear("Gain", " -signaling reception, "); signal Model.receive(mine->msg); if (mine->ack) { dbg_clear("Gain", " acknowledgment requested, "); } else { dbg_clear("Gain", " no acknowledgment requested.\n"); } // If we scheduled an ack, receiving = 0 when it completes if (mine->ack && signal Model.shouldAck(mine->msg)) { dbg_clear("Gain", " scheduling ack.\n"); sim_gain_schedule_ack(mine->source, sim_time() + 1); } // We're searching for new packets again receiving = 0; } // If the packet was lost, then we're searching for new packets again else { receiving = 0; dbg_clear("Gain", " -packet was lost.\n"); } free(mine); } // Create a record that a node is receiving a packet, // enqueue a receive event to figure out what happens. void enqueue_receive_event(int source, sim_time_t endTime, message_t* msg, bool receive, double power) { sim_event_t* evt; receive_message_t* list; receive_message_t* rcv = allocate_receive_message(); double sigStr = heardSignal(); rcv->source = source; rcv->start = sim_time(); rcv->end = endTime; rcv->power = power; rcv->msg = msg; rcv->lost = 0; rcv->ack = receive; // If I'm off, I never receive the packet, but I need to keep track of // it in case I turn on and someone else starts sending me a weaker // packet. So I don't set receiving to 1, but I keep track of // the signal strength. if (!sim_mote_is_on(sim_node())) { dbg("Gain", "Lost packet from %i due to %i being off\n", source, sim_node()); rcv->lost = 1; } else if ((sigStr + sim_gain_sensitivity()) >= power) { dbg("Gain", "Lost packet from %i due to power being below reception threshold (%f >= %f)\n", source, sigStr, power); rcv->lost = 1; } else if (receiving) { dbg("Gain", "Lost packet from %i due to being in the midst of a reception.\n", source); rcv->lost = 1; } else { // We are on, are not receiving a packet, and the packet is above the noise floor receiving = 1; } list = outstandingReceptionHead; while (list != NULL) { if ((list->power - sim_gain_sensitivity()) < power) { dbg("Gain", "Lost packet from %i as I concurrently received a packet from %i stronger than %lf\n", list->source, source, list->power); list->lost = 1; } list = list->next; } rcv->next = outstandingReceptionHead; outstandingReceptionHead = rcv; evt = allocate_receive_event(endTime, rcv); sim_queue_insert(evt); } void sim_gain_put(int dest, message_t* msg, sim_time_t endTime, bool receive, double power) { int prevNode = sim_node(); dbg("Gain", "Enqueing reception event for %i at %llu.\n", dest, endTime); sim_set_node(dest); enqueue_receive_event(prevNode, endTime, msg, receive, power); sim_set_node(prevNode); } command void Model.putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime, double power) { gain_entry_t* link = sim_gain_first(sim_node()); requestAck = ack; outgoing = msg; dbg("Gain", "Node %i transmitting to %i, finishes at %llu.\n", sim_node(), dest, endTime); while (link != NULL) { int other = link->mote; sim_gain_put(other, msg, endTime, ack && (other == dest), power + link->gain); link = sim_gain_next(link); } } default event void Model.receive(message_t* msg) {} sim_event_t* allocate_receive_event(sim_time_t endTime, receive_message_t* msg) { sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t)); evt->mote = sim_node(); evt->time = endTime; evt->handle = sim_gain_receive_handle; evt->cleanup = sim_queue_cleanup_event; evt->cancelled = 0; evt->force = 1; // Need to keep track of air even when node is off evt->data = msg; return evt; } receive_message_t* allocate_receive_message() { return (receive_message_t*)malloc(sizeof(receive_message_t)); } } tinyos-2.1.2+dfsg/tos/lib/tossim/csma.c000066400000000000000000000062421207233610700177450ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * C++ implementation of the default TOSSIM CSMA model. * * @author Philip Levis * @date Dec 10 2005 */ #include Csma::Csma() {} Csma::~Csma() {} int Csma::initHigh() {return sim_csma_init_high();} int Csma::initLow() {return sim_csma_init_low();} int Csma::high() {return sim_csma_high();} int Csma::low() {return sim_csma_low();} int Csma::symbolsPerSec() {return sim_csma_symbols_per_sec();} int Csma::bitsPerSymbol() {return sim_csma_bits_per_symbol();} int Csma::preambleLength() {return sim_csma_preamble_length();} int Csma::exponentBase() {return sim_csma_exponent_base();} int Csma::maxIterations() {return sim_csma_max_iterations();} int Csma::minFreeSamples() {return sim_csma_min_free_samples();} int Csma::rxtxDelay() {return sim_csma_rxtx_delay();} int Csma::ackTime() {return sim_csma_ack_time();} void Csma::setInitHigh(int val) {sim_csma_set_init_high(val);} void Csma::setInitLow(int val) {sim_csma_set_init_low(val);} void Csma::setHigh(int val) {sim_csma_set_high(val);} void Csma::setLow(int val) {sim_csma_set_low(val);} void Csma::setSymbolsPerSec(int val) {sim_csma_set_symbols_per_sec(val);} void Csma::setBitsBerSymbol(int val) {sim_csma_set_bits_per_symbol(val);} void Csma::setPreambleLength(int val) {sim_csma_set_preamble_length(val);} void Csma::setExponentBase(int val) {sim_csma_set_exponent_base(val);} void Csma::setMaxIterations(int val) {sim_csma_set_max_iterations(val);} void Csma::setMinFreeSamples(int val) {sim_csma_set_min_free_samples(val);} void Csma::setRxtxDelay(int val) {sim_csma_set_rxtx_delay(val);} void Csma::setAckTime(int val); {sim_csma_set_ack_time(val);} #endif tinyos-2.1.2+dfsg/tos/lib/tossim/csma.h000066400000000000000000000046431207233610700177550ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Configuration parameters for a CSMA link. * * @author Philip Levis * @date Dec 10 2005 */ #ifndef CSMA_H_INCLUDED #define CSMA_H_INCLUDED class Csma { public: Csma(); ~Csma(); int initHigh(); int initLow(); int high(); int low(); int symbolsPerSec(); int bitsPerSymbol(); int preambleLength(); // in symbols int exponentBase(); int maxIterations(); int minFreeSamples(); int rxtxDelay(); int ackTime(); // in symbols void setInitHigh(int val); void setInitLow(int val); void setHigh(int val); void setLow(int val); void setSymbolsPerSec(int val); void setBitsBerSymbol(int val); void setPreambleLength(int val); // in symbols void setExponentBase(int val); void setMaxIterations(int val); void setMinFreeSamples(int val); void setRxtxDelay(int val); void setAckTime(int val); // in symbols int } #endif tinyos-2.1.2+dfsg/tos/lib/tossim/examples/000077500000000000000000000000001207233610700204705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tossim/examples/packets.py000066400000000000000000000021461207233610700224770ustar00rootroot00000000000000# This file is an example Python script from the TOSSIM tutorial. # It is intended to be used with the RadioCountToLeds application. import sys from TOSSIM import * from RadioCountMsg import * t = Tossim([]) m = t.mac(); r = t.radio(); t.addChannel("RadioCountToLedsC", sys.stdout); t.addChannel("LedsC", sys.stdout); for i in range(0, 2): m = t.getNode(i); m.bootAtTime((31 + t.ticksPerSecond() / 10) * i + 1); f = open("topo.txt", "r") lines = f.readlines() for line in lines: s = line.split() if (len(s) > 0): if (s[0] == "gain"): r.add(int(s[1]), int(s[2]), float(s[3])) noise = open("meyer-heavy.txt", "r") lines = noise.readlines() for line in lines: str = line.strip() if (str != ""): val = int(str) for i in range(0, 2): t.getNode(i).addNoiseTraceReading(val) for i in range(0, 60): t.runNextEvent(); msg = RadioCountMsg() msg.set_counter(7); pkt = t.newPacket(); pkt.setData(msg.data) pkt.setType(msg.get_amType()) pkt.setDestination(0) print "Delivering ", msg, " to 0 at ", str(t.time() + 3); pkt.deliver(0, t.time() + 3) for i in range(0, 20): t.runNextEvent(); tinyos-2.1.2+dfsg/tos/lib/tossim/examples/variables.py000066400000000000000000000013361207233610700230150ustar00rootroot00000000000000# This is an example script from the TOSSIM tutorials. # It can be used with any TinyOS application. from tinyos.tossim.TossimApp import * from TOSSIM import * n = NescApp() t = Tossim(n.variables.variables()) m = t.getNode(0) for i in range(0, 1): m = t.getNode(i); time = ((79 + t.ticksPerSecond() / 100) * i + 1) m.bootAtTime(time); print "Mote " + str(i) + " set to boot at " + str(time); for i in range(0, 500): t.runNextEvent(); v = m.getVariable("SimMoteP.startTime") v2 = m.getVariable("SimSchedulerBasicP.m_head"); print "start time: <", v.getData(), ">\nnext task: <", v2.getData(), ">" for i in range(0, 500): t.runNextEvent(); print "start time: <", v.getData(), ">\nnext task: <", v2.getData(), ">" tinyos-2.1.2+dfsg/tos/lib/tossim/gain/000077500000000000000000000000001207233610700175705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tossim/gain/line70nodes.txt000066400000000000000000000012341207233610700224600ustar00rootroot00000000000000% This is the sample topology file (chain topology), the node id should start with 0 % The format is % nodeid x y 0 0 0 1 1 0 2 2 0 3 3 0 4 4 0 5 5 0 6 6 0 7 7 0 8 8 0 9 9 0 10 10 0 11 11 0 12 12 0 13 13 0 14 14 0 15 15 0 16 16 0 17 17 0 18 18 0 19 19 0 20 20 0 21 21 0 22 22 0 23 23 0 24 24 0 25 25 0 26 26 0 27 27 0 28 28 0 29 29 0 30 30 0 31 31 0 32 32 0 33 33 0 34 34 0 35 35 0 36 36 0 37 37 0 38 38 0 39 39 0 40 40 0 41 41 0 42 42 0 43 43 0 44 44 0 45 45 0 46 46 0 47 47 0 48 48 0 49 49 0 50 50 0 51 51 0 52 52 0 53 53 0 54 54 0 55 55 0 56 56 0 57 57 0 58 58 0 59 59 0 60 60 0 61 61 0 62 62 0 63 63 0 64 64 0 65 65 0 66 66 0 67 67 0 68 68 0 69 69 0 70 70 0 tinyos-2.1.2+dfsg/tos/lib/tossim/gain/mica2grid.txt000066400000000000000000000131361207233610700221760ustar00rootroot00000000000000%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % % Copyright (c) 2004 The University of Southern California" % All rights reserved. % % Redistribution and use in source and binary forms, with or without % modification, are permitted provided that the following conditions % are met: % % - Redistributions of source code must retain the above copyright % notice, this list of conditions and the following disclaimer. % - Redistributions in binary form must reproduce the above copyright % notice, this list of conditions and the following disclaimer in the % documentation and/or other materials provided with the % distribution. % - Neither the name of the copyright holders nor the names of % its contributors may be used to endorse or promote products derived % from this software without specific prior written permission. % % THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS % "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT % LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS % FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL % THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, % INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES % (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR % SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) % HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, % STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) % ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED % OF THE POSSIBILITY OF SUCH DAMAGE.. % % Author: Marco Zuniga % Director: Prof. Bhaskar Krishnamachari % Autonomous Networks Research Group, University of Southern California % http://ceng.usc.edu/~anrg/ % Contact: marcozun@usc.edu % % Date last modified: 2004/06/23 marcozun % % Description: configuration file for link gain model % % This example configuration file will produce a network topology for TOSSIM % that represents a mica2 network deployed in a tight (1m spacing) 15x15 grid. % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %%%%%%%%%%%%%%%%%%%%%% % % Channel Parameters % %%%%%%%%%%%%%%%%%%%%%% % % The channel model is based on the Log-Normal Shadowing Path Loss Model. % It defines the gain at which other nodes receive a signal when a node % transmits. All values must be positive. Parameters: % PATH_LOSS_EXPONENT an adimensional constant % SHADOWING_STANDARD_DEVIATION in dB % PL_D0 close-in reference pathloss, in dB % D0 close-in reference distance, in meters PATH_LOSS_EXPONENT = 3.0; SHADOWING_STANDARD_DEVIATION = 4.0; PL_D0 = 55.0; D0 = 1.0; %%%%%%%%%%%%%%%%%%%% % % Radio Parameters % %%%%%%%%%%%%%%%%%%%% % % The radio parameters provide a mechanism to incorporate node variations. % These variations introduce link asymmetry. The variations have a static % and a dynamic component. WHITE_GAUSSIAN_NOISE encodes the dynamic % variation of a node's noise floor readings at runtime, while the % covariance matrix encodes the static differences in noise floor and % output strength across nodes. % % Parameters: % NOISE_FLOOR the baseline noise floor in dBm % WHITE_GAUSSIAN_NOISE the standard deviation of noise measurements % S11, S12, S21, S22 the values of the covariance matrix that % represents hardware variations. % S11 the per-node variance of the noise floor % S12 covariance between noise floor and output power % S21 must be equal to S12 % S22 the per-node variance of output power NOISE_FLOOR = -105.0; WHITE_GAUSSIAN_NOISE = 4; % These values are for MICA2 radios. S11 = 3.7; S12 = -3.3; S21 = -3.3; S22 = 6.0; %%%%%%%%%%%%%%%%%%%%%%% % % Topology Parameters % %%%%%%%%%%%%%%%%%%%%%%% % % Terrain dimensions and node positions are in meters. % Parameters: % TOPOLOGY the basic topology to use, whose valid values are: % 1 for a GRID % 2 for a UNIFORM distribution % 3 for a RANDOM distribution % 4 for positions read from a FILE % details: % o GRID: Node placement starts at (0, 0). You must % specify the GRID_UNIT variable (spacing in meters). % The number of nodes has to be square of an integer. % o UNIFORM: Based on the number of nodes, the physical % terrain is divided into a number of cells. Within % each cell, a node is placed randomly. % o RANDOM: Nodes are placed randomly within the physical % terrain. % o FILE: Position of nodes is read from TOPOLOGY_FILE % (user-defined). The format of the file is: % nodeid Xcoordinate Ycoordinate % The nodeid values must start with 0. % TERRAIN_DIMENSIONS_X the width of the terrain area (meters) % TERRAIN_DIMENSIONS_Y the depth of the terrain area (meters) % TOPOLOGY = 1; GRID_UNIT = 5.0; NUMBER_OF_NODES = 225; % topology file provided by user %TOPOLOGY_FILE = topologyFile.m; % Physical terrain (meters), not required when user provides topology file % nor in GRID topologies. % The density (NUMBER_OF_NODES / area) can not be higher than % 0.5 nodes / D0^2. %TERRAIN_DIMENSIONS_X = 50.0; %TERRAIN_DIMENSIONS_Y = 50.0; tinyos-2.1.2+dfsg/tos/lib/tossim/generate-swig.bash000066400000000000000000000033721207233610700222570ustar00rootroot00000000000000#!/bin/bash # Copyright (c) 2005 Stanford University. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # # Simple script that generates the Python interfaces to TOSSIM. # # Author: Philip Levis # # $Id: generate-swig.bash,v 1.5 2010-06-29 22:07:51 scipio Exp $ swig -shadow -python -c++ tossim.i tinyos-2.1.2+dfsg/tos/lib/tossim/hardware.h000066400000000000000000000000371207233610700206200ustar00rootroot00000000000000#include tinyos-2.1.2+dfsg/tos/lib/tossim/hashtable.c000066400000000000000000000215431207233610700207560ustar00rootroot00000000000000/* Copyright (C) 2004 Christopher Clark */ #include "hashtable.h" #include "hashtable_private.h" #include #include #include #include /* Credit for primes table: Aaron Krowne http://br.endernet.org/~akrowne/ http://planetmath.org/encyclopedia/GoodHashTablePrimes.html */ static const unsigned int primes[] = { 53, 97, 193, 389, 769, 1543, 3079, 6151, 12289, 24593, 49157, 98317, 196613, 393241, 786433, 1572869, 3145739, 6291469, 12582917, 25165843, 50331653, 100663319, 201326611, 402653189, 805306457, 1610612741 }; const unsigned int prime_table_length = sizeof(primes)/sizeof(primes[0]); const float max_load_factor = 0.65; /*****************************************************************************/ struct hashtable * create_hashtable(unsigned int minsize, unsigned int (*hashf) (void*), int (*eqf) (void*,void*)) { struct hashtable *h; unsigned int pindex, size = primes[0]; /* Check requested hashtable isn't too large */ if (minsize > (1u << 30)) return NULL; /* Enforce size as prime */ for (pindex=0; pindex < prime_table_length; pindex++) { if (primes[pindex] > minsize) { size = primes[pindex]; break; } } h = (struct hashtable *)malloc(sizeof(struct hashtable)); if (NULL == h) return NULL; /*oom*/ h->table = (struct entry **)malloc(sizeof(struct entry*) * size); if (NULL == h->table) { free(h); return NULL; } /*oom*/ memset(h->table, 0, size * sizeof(struct entry *)); h->tablelength = size; h->primeindex = pindex; h->entrycount = 0; h->hashfn = hashf; h->eqfn = eqf; h->loadlimit = (unsigned int) ceil(size * max_load_factor); return h; } /*****************************************************************************/ unsigned int hash(struct hashtable *h, void *k) { /* Aim to protect against poor hash functions by adding logic here * - logic taken from java 1.4 hashtable source */ unsigned int i = h->hashfn(k); i += ~(i << 9); i ^= ((i >> 14) | (i << 18)); /* >>> */ i += (i << 4); i ^= ((i >> 10) | (i << 22)); /* >>> */ return i; } /*****************************************************************************/ static int hashtable_expand(struct hashtable *h) { /* Double the size of the table to accomodate more entries */ struct entry **newtable; struct entry *e; struct entry **pE; unsigned int newsize, i, tindex; /* Check we're not hitting max capacity */ if (h->primeindex == (prime_table_length - 1)) return 0; newsize = primes[++(h->primeindex)]; newtable = (struct entry **)malloc(sizeof(struct entry*) * newsize); if (NULL != newtable) { memset(newtable, 0, newsize * sizeof(struct entry *)); /* This algorithm is not 'stable'. ie. it reverses the list * when it transfers entries between the tables */ for (i = 0; i < h->tablelength; i++) { while (NULL != (e = h->table[i])) { h->table[i] = e->next; tindex = indexFor(newsize,e->h); e->next = newtable[tindex]; newtable[tindex] = e; } } free(h->table); h->table = newtable; } /* Plan B: realloc instead */ else { newtable = (struct entry **) realloc(h->table, newsize * sizeof(struct entry *)); if (NULL == newtable) { (h->primeindex)--; return 0; } h->table = newtable; memset(newtable[h->tablelength], 0, newsize - h->tablelength); for (i = 0; i < h->tablelength; i++) { for (pE = &(newtable[i]), e = *pE; e != NULL; e = *pE) { tindex = indexFor(newsize,e->h); if (tindex == i) { pE = &(e->next); } else { *pE = e->next; e->next = newtable[tindex]; newtable[tindex] = e; } } } } h->tablelength = newsize; h->loadlimit = (unsigned int) ceil(newsize * max_load_factor); return -1; } /*****************************************************************************/ unsigned int hashtable_count(struct hashtable *h) { return h->entrycount; } /*****************************************************************************/ int hashtable_insert(struct hashtable *h, void *k, void *v) { /* This method allows duplicate keys - but they shouldn't be used */ unsigned int tindex; struct entry *e; if (++(h->entrycount) > h->loadlimit) { /* Ignore the return value. If expand fails, we should * still try cramming just this value into the existing table * -- we may not have memory for a larger table, but one more * element may be ok. Next time we insert, we'll try expanding again.*/ hashtable_expand(h); } e = (struct entry *)malloc(sizeof(struct entry)); if (NULL == e) { --(h->entrycount); return 0; } /*oom*/ e->h = hash(h,k); tindex = indexFor(h->tablelength,e->h); e->k = k; e->v = v; e->next = h->table[tindex]; h->table[tindex] = e; return -1; } /*****************************************************************************/ void * /* returns value associated with key */ hashtable_search(struct hashtable *h, void *k) { struct entry *e; unsigned int hashvalue, tindex; hashvalue = hash(h,k); tindex = indexFor(h->tablelength,hashvalue); e = h->table[tindex]; while (NULL != e) { /* Check hash value to short circuit heavier comparison */ if ((hashvalue == e->h) && (h->eqfn(k, e->k))) { return e->v; } e = e->next; } return NULL; } /*****************************************************************************/ void * /* returns value associated with key */ hashtable_remove(struct hashtable *h, void *k) { /* TODO: consider compacting the table when the load factor drops enough, * or provide a 'compact' method. */ struct entry *e; struct entry **pE; void *v; unsigned int hashvalue, tindex; hashvalue = hash(h,k); tindex = indexFor(h->tablelength,hash(h,k)); pE = &(h->table[tindex]); e = *pE; while (NULL != e) { /* Check hash value to short circuit heavier comparison */ if ((hashvalue == e->h) && (h->eqfn(k, e->k))) { *pE = e->next; h->entrycount--; v = e->v; freekey(e->k); free(e); return v; } pE = &(e->next); e = e->next; } return NULL; } /*****************************************************************************/ /* destroy */ void hashtable_destroy(struct hashtable *h, int free_values) { unsigned int i; struct entry *e, *f; struct entry **table = h->table; if (free_values) { for (i = 0; i < h->tablelength; i++) { e = table[i]; while (NULL != e) { f = e; e = e->next; freekey(f->k); free(f->v); free(f); } } } else { for (i = 0; i < h->tablelength; i++) { e = table[i]; while (NULL != e) { f = e; e = e->next; freekey(f->k); free(f); } } } free(h->table); free(h); } /* * Copyright (c) 2002, Christopher Clark * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of the original author; nor the names of any contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ tinyos-2.1.2+dfsg/tos/lib/tossim/hashtable.h000066400000000000000000000165251207233610700207670ustar00rootroot00000000000000/* Copyright (C) 2002 Christopher Clark */ #ifndef __HASHTABLE_CWC22_H__ #define __HASHTABLE_CWC22_H__ #ifdef __cplusplus extern "C" { #endif struct hashtable; typedef struct hashtable hashtable_t; /* Example of use: * * struct hashtable *h; * struct some_key *k; * struct some_value *v; * * static unsigned int hash_from_key_fn( void *k ); * static int keys_equal_fn ( void *key1, void *key2 ); * * h = create_hashtable(16, hash_from_key_fn, keys_equal_fn); * k = (struct some_key *) malloc(sizeof(struct some_key)); * v = (struct some_value *) malloc(sizeof(struct some_value)); * * (initialise k and v to suitable values) * * if (! hashtable_insert(h,k,v) ) * { exit(-1); } * * if (NULL == (found = hashtable_search(h,k) )) * { printf("not found!"); } * * if (NULL == (found = hashtable_remove(h,k) )) * { printf("Not found\n"); } * */ /* Macros may be used to define type-safe(r) hashtable access functions, with * methods specialized to take known key and value types as parameters. * * Example: * * Insert this at the start of your file: * * DEFINE_HASHTABLE_INSERT(insert_some, struct some_key, struct some_value); * DEFINE_HASHTABLE_SEARCH(search_some, struct some_key, struct some_value); * DEFINE_HASHTABLE_REMOVE(remove_some, struct some_key, struct some_value); * * This defines the functions 'insert_some', 'search_some' and 'remove_some'. * These operate just like hashtable_insert etc., with the same parameters, * but their function signatures have 'struct some_key *' rather than * 'void *', and hence can generate compile time errors if your program is * supplying incorrect data as a key (and similarly for value). * * Note that the hash and key equality functions passed to create_hashtable * still take 'void *' parameters instead of 'some key *'. This shouldn't be * a difficult issue as they're only defined and passed once, and the other * functions will ensure that only valid keys are supplied to them. * * The cost for this checking is increased code size and runtime overhead * - if performance is important, it may be worth switching back to the * unsafe methods once your program has been debugged with the safe methods. * This just requires switching to some simple alternative defines - eg: * #define insert_some hashtable_insert * */ /***************************************************************************** * create_hashtable * @name create_hashtable * @param minsize minimum initial size of hashtable * @param hashfunction function for hashing keys * @param key_eq_fn function for determining key equality * @return newly created hashtable or NULL on failure */ struct hashtable * create_hashtable(unsigned int minsize, unsigned int (*hashfunction) (void*), int (*key_eq_fn) (void*,void*)); /***************************************************************************** * hashtable_insert * @name hashtable_insert * @param h the hashtable to insert into * @param k the key - hashtable claims ownership and will free on removal * @param v the value - does not claim ownership * @return non-zero for successful insertion * * This function will cause the table to expand if the insertion would take * the ratio of entries to table size over the maximum load factor. * * This function does not check for repeated insertions with a duplicate key. * The value returned when using a duplicate key is undefined -- when * the hashtable changes size, the order of retrieval of duplicate key * entries is reversed. * If in doubt, remove before insert. */ int hashtable_insert(struct hashtable *h, void *k, void *v); #define DEFINE_HASHTABLE_INSERT(fnname, keytype, valuetype) \ int fnname (struct hashtable *h, keytype *k, valuetype *v) \ { \ return hashtable_insert(h,k,v); \ } /***************************************************************************** * hashtable_search * @name hashtable_search * @param h the hashtable to search * @param k the key to search for - does not claim ownership * @return the value associated with the key, or NULL if none found */ void * hashtable_search(struct hashtable *h, void *k); #define DEFINE_HASHTABLE_SEARCH(fnname, keytype, valuetype) \ valuetype * fnname (struct hashtable *h, keytype *k) \ { \ return (valuetype *) (hashtable_search(h,k)); \ } /***************************************************************************** * hashtable_remove * @name hashtable_remove * @param h the hashtable to remove the item from * @param k the key to search for - does not claim ownership * @return the value associated with the key, or NULL if none found */ void * /* returns value */ hashtable_remove(struct hashtable *h, void *k); #define DEFINE_HASHTABLE_REMOVE(fnname, keytype, valuetype) \ valuetype * fnname (struct hashtable *h, keytype *k) \ { \ return (valuetype *) (hashtable_remove(h,k)); \ } /***************************************************************************** * hashtable_count * @name hashtable_count * @param h the hashtable * @return the number of items stored in the hashtable */ unsigned int hashtable_count(struct hashtable *h); /***************************************************************************** * hashtable_destroy * @name hashtable_destroy * @param h the hashtable * @param free_values whether to call 'free' on the remaining values */ void hashtable_destroy(struct hashtable *h, int free_values); #ifdef __cplusplus } #endif #endif /* __HASHTABLE_CWC22_H__ */ /* * Copyright (c) 2002, Christopher Clark * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of the original author; nor the names of any contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ tinyos-2.1.2+dfsg/tos/lib/tossim/hashtable_private.h000066400000000000000000000056211207233610700225140ustar00rootroot00000000000000/* Copyright (C) 2002, 2004 Christopher Clark */ #ifndef __HASHTABLE_PRIVATE_CWC22_H__ #define __HASHTABLE_PRIVATE_CWC22_H__ #include "hashtable.h" /*****************************************************************************/ struct entry { void *k, *v; unsigned int h; struct entry *next; }; struct hashtable { unsigned int tablelength; struct entry **table; unsigned int entrycount; unsigned int loadlimit; unsigned int primeindex; unsigned int (*hashfn) (void *k); int (*eqfn) (void *k1, void *k2); }; /*****************************************************************************/ unsigned int hash(struct hashtable *h, void *k); /*****************************************************************************/ /* indexFor */ static inline unsigned int indexFor(unsigned int tablelength, unsigned int hashvalue) { return (hashvalue % tablelength); }; /* Only works if tablelength == 2^N */ /*static inline unsigned int indexFor(unsigned int tablelength, unsigned int hashvalue) { return (hashvalue & (tablelength - 1u)); } */ /*****************************************************************************/ #define freekey(X) free(X) /*define freekey(X) ; */ /*****************************************************************************/ #endif /* __HASHTABLE_PRIVATE_CWC22_H__*/ /* * Copyright (c) 2002, Christopher Clark * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of the original author; nor the names of any contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ tinyos-2.1.2+dfsg/tos/lib/tossim/heap.c000066400000000000000000000133451207233610700177410ustar00rootroot00000000000000// $Id: heap.c,v 1.6 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: Philip Levis * */ /* * FILE: heap.h * AUTHOR: Philip Levis * DESC: Simple array-based priority heap for discrete event simulation. */ #include #include // For memcpy(3) #include // for rand(3) #include // For printf(3) const int STARTING_SIZE = 511; #define HEAP_NODE(heap, index) (((node_t*)(heap->data))[index]) typedef struct node { void* data; long long int key; } node_t; void down_heap(heap_t* heap, int findex); void up_heap(heap_t* heap, int findex); void swap(node_t* first, node_t* second); node_t* prev(node_t* node); node_t* next(node_t* next); void init_node(node_t* node) { node->data = NULL; node->key = -1; } void init_heap(heap_t* heap) { heap->size = 0; heap->private_size = STARTING_SIZE; heap->data = malloc(sizeof(node_t) * heap->private_size); } int heap_size(heap_t* heap) { return heap->size; } int is_empty(heap_t* heap) { return heap->size == 0; } int heap_is_empty(heap_t* heap) { return is_empty(heap); } long long int heap_get_min_key(heap_t* heap) { if (is_empty(heap)) { return -1; } else { return HEAP_NODE(heap, 0).key; } } void* heap_peek_min_data(heap_t* heap) { if (is_empty(heap)) { return NULL; } else { return HEAP_NODE(heap, 0).data; } } void* heap_pop_min_data(heap_t* heap, long long int* key) { int last_index = heap->size - 1; void* data = HEAP_NODE(heap, 0).data; if (key != NULL) { *key = HEAP_NODE(heap, 0).key; } HEAP_NODE(heap, 0).data = HEAP_NODE(heap, last_index).data; HEAP_NODE(heap, 0).key = HEAP_NODE(heap, last_index).key; heap->size--; down_heap(heap, 0); return data; } void expand_heap(heap_t* heap) { int new_size = (heap->private_size * 2) + 1; void* new_data = malloc(sizeof(node_t) * new_size); //dbg(DBG_SIM, "Resized heap from %i to %i.\n", heap->private_size, new_size); memcpy(new_data, heap->data, (sizeof(node_t) * heap->private_size)); free(heap->data); heap->data = new_data; heap->private_size = new_size; } void heap_insert(heap_t* heap, void* data, long long int key) { int findex = heap->size; if (findex == heap->private_size) { expand_heap(heap); } findex = heap->size; HEAP_NODE(heap, findex).key = key; HEAP_NODE(heap, findex).data = data; up_heap(heap, findex); heap->size++; } void swap(node_t* first, node_t* second) { long long int key; void* data; key = first->key; first->key = second->key; second->key = key; data = first->data; first->data = second->data; second->data = data; } void down_heap(heap_t* heap, int findex) { int right_index = ((findex + 1) * 2); int left_index = (findex * 2) + 1; if (right_index < heap->size) { // Two children long long int left_key = HEAP_NODE(heap, left_index).key; long long int right_key = HEAP_NODE(heap, right_index).key; int min_key_index = (left_key < right_key)? left_index : right_index; if (HEAP_NODE(heap, min_key_index).key < HEAP_NODE(heap, findex).key) { swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, min_key_index))); down_heap(heap, min_key_index); } } else if (left_index >= heap->size) { // No children return; } else { // Only left child long long int left_key = HEAP_NODE(heap, left_index).key; if (left_key < HEAP_NODE(heap, findex).key) { swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, left_index))); return; } } } void up_heap(heap_t* heap, int findex) { int parent_index; if (findex == 0) { return; } parent_index = (findex - 1) / 2; if (HEAP_NODE(heap, parent_index).key > HEAP_NODE(heap, findex).key) { swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, parent_index))); up_heap(heap, parent_index); } } tinyos-2.1.2+dfsg/tos/lib/tossim/heap.h000066400000000000000000000052021207233610700177370ustar00rootroot00000000000000// $Id: heap.h,v 1.6 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* Authors: Philip Levis * */ /* * FILE: heap.h * AUTHOR: pal * DESC: Simple array-based priority heap for discrete event simulation. */ /** * @author Philip Levis */ #ifndef HEAP_H_INCLUDED #define HEAP_H_INCLUDED typedef struct heap { int size; void* data; int private_size; } heap_t; void init_heap(heap_t* heap); int heap_size(heap_t* heap); int heap_is_empty(heap_t* heap); long long int heap_get_min_key(heap_t* heap); void* heap_peek_min_data(heap_t* heap); void* heap_pop_min_data(heap_t* heap, long long int* key); void heap_insert(heap_t * heap, void* data, long long int key); #endif // HEAP_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/mac.c000066400000000000000000000062101207233610700175550ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Configuration parameters for a CSMA link. * * @author Philip Levis * @date Dec 10 2005 */ #include #include MAC::MAC() {} MAC::~MAC() {} int MAC::initHigh() {return sim_csma_init_high();} int MAC::initLow() {return sim_csma_init_low();} int MAC::high() {return sim_csma_high();} int MAC::low() {return sim_csma_low();} int MAC::symbolsPerSec() {return sim_csma_symbols_per_sec();} int MAC::bitsPerSymbol() {return sim_csma_bits_per_symbol();} int MAC::preambleLength() {return sim_csma_preamble_length();} int MAC::exponentBase() {return sim_csma_exponent_base();} int MAC::maxIterations() {return sim_csma_max_iterations();} int MAC::minFreeSamples() {return sim_csma_min_free_samples();} int MAC::rxtxDelay() {return sim_csma_rxtx_delay();} int MAC::ackTime() {return sim_csma_ack_time();} void MAC::setInitHigh(int val) {sim_csma_set_init_high(val);} void MAC::setInitLow(int val) {sim_csma_set_init_low(val);} void MAC::setHigh(int val) {sim_csma_set_high(val);} void MAC::setLow(int val) {sim_csma_set_low(val);} void MAC::setSymbolsPerSec(int val) {sim_csma_set_symbols_per_sec(val);} void MAC::setBitsBerSymbol(int val) {sim_csma_set_bits_per_symbol(val);} void MAC::setPreambleLength(int val) {sim_csma_set_preamble_length(val);} void MAC::setExponentBase(int val) {sim_csma_set_exponent_base(val);} void MAC::setMaxIterations(int val) {sim_csma_set_max_iterations(val);} void MAC::setMinFreeSamples(int val) {sim_csma_set_min_free_samples(val);} void MAC::setRxtxDelay(int val) {sim_csma_set_rxtx_delay(val);} void MAC::setAckTime(int val) {sim_csma_set_ack_time(val);} tinyos-2.1.2+dfsg/tos/lib/tossim/mac.h000066400000000000000000000046371207233610700175750ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Configuration parameters for a CSMA link. * * @author Philip Levis * @date Dec 10 2005 */ #ifndef MAC_H_INCLUDED #define MAC_H_INCLUDED class MAC { public: MAC(); ~MAC(); int initHigh(); int initLow(); int high(); int low(); int symbolsPerSec(); int bitsPerSymbol(); int preambleLength(); // in symbols int exponentBase(); int maxIterations(); int minFreeSamples(); int rxtxDelay(); int ackTime(); // in symbols void setInitHigh(int val); void setInitLow(int val); void setHigh(int val); void setLow(int val); void setSymbolsPerSec(int val); void setBitsBerSymbol(int val); void setPreambleLength(int val); // in symbols void setExponentBase(int val); void setMaxIterations(int val); void setMinFreeSamples(int val); void setRxtxDelay(int val); void setAckTime(int val); // in symbols int }; #endif tinyos-2.1.2+dfsg/tos/lib/tossim/mac.i000066400000000000000000000063751207233610700175770ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SWIG interface specification for a media access control algorithm * and physical data rate in TOSSIM. This file defines the MAC object * which is exported to * the python scripting interface. This particular MAC is CSMA. * Changing the MAC abstraction requires changing or replacing this * file and rerunning generate-swig.bash in lib/tossim. Note that * this abstraction does not represent an actual MAC implementation, * instead merely a set of configuration constants that a CSMA MAC * implementation might use. The default values model the standard * TinyOS CC2420 stack. Most times (rxtxDelay, etc.) are in terms * of symbols. E.g., an rxTxDelay of 32 means 32 symbol times. This * value can be translated into real time with the symbolsPerSec() * call. * * Note that changing this file only changes the Python interface: * you must also change the underlying TOSSIM code so Python * has the proper functions to call. Look at mac.h, mac.c, and * sim_mac.c. * * @author Philip Levis * @date Dec 10 2005 */ %module TOSSIMMAC %{ #include %} class MAC { public: MAC(); ~MAC(); int initHigh(); int initLow(); int high(); int low(); int symbolsPerSec(); int bitsPerSymbol(); int preambleLength(); int exponentBase(); int maxIterations(); int minFreeSamples(); int rxtxDelay(); int ackTime(); void setInitHigh(int val); void setInitLow(int val); void setHigh(int val); void setLow(int val); void setSymbolsPerSec(int val); void setBitsBerSymbol(int val); void setPreambleLength(int val); void setExponentBase(int val); void setMaxIterations(int val); void setMinFreeSamples(int val); void setRxtxDelay(int val); void setAckTime(int val); }; tinyos-2.1.2+dfsg/tos/lib/tossim/noise/000077500000000000000000000000001207233610700177675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tossim/noise/TTX4-DemoNoiseTrace.txt000066400000000000000000044000141207233610700241350ustar00rootroot00000000000000-96.0 -96.0 -96.0 -96.0 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-81 -81 -81 -96 -98 -80 -93 -80 -96 -98 -98 -80 -80 -80 -80 -80 -80 -80 -81 -81 -80 -80 -80 -98 -80 -80 -81 -80 -80 -80 -80 -80 -80 -81 -80 -80 -99 -90 -84 -82 -86 -85 -85 -85 -85 -86 -86 -85 -86 -86 -98 -96 -96 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -79 -81 -80 -48 -90 -89 -79 -93 -91 -95 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -98 -95 -98 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -41 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -80 -96 -98 -98 -99 -71 -98 -98 -99 -98 -98 -98 -98 -98 tinyos-2.1.2+dfsg/tos/lib/tossim/packet.c000066400000000000000000000062621207233610700202730ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Injecting packets into TOSSIM. * * @author Philip Levis * @date Dec 10 2005 */ #include #include Packet::Packet() { msgPtr = sim_packet_allocate(); allocated = 1; } Packet::Packet(sim_packet_t* m) { if (m != NULL) { msgPtr = m; allocated = 0; } else { msgPtr = sim_packet_allocate(); allocated = 1; } } Packet::~Packet() { if (allocated) { sim_packet_free(msgPtr); } } void Packet::setSource(int src) { sim_packet_set_source(msgPtr, (uint16_t)src); } int Packet::source() { return sim_packet_source(msgPtr); } void Packet::setDestination(int dest) { sim_packet_set_destination(msgPtr, (uint16_t)dest); } int Packet::destination() { return sim_packet_destination(msgPtr); } void Packet::setLength(int len) { sim_packet_set_length(msgPtr, (uint8_t)len); } int Packet::length() { return sim_packet_length(msgPtr); } void Packet::setType(int type) { sim_packet_set_type(msgPtr, (uint8_t)type); } int Packet::type() { return sim_packet_type(msgPtr); } char* Packet::data() { char* val = (char*)sim_packet_data(msgPtr); return val; } void Packet::setData(char* data, int len) { len = (len > maxLength())? maxLength():len; memcpy(sim_packet_data(msgPtr), data, len); setLength(len); } int Packet::maxLength() { return (int)sim_packet_max_length(msgPtr); } void Packet::setStrength(int str) { sim_packet_set_strength(msgPtr, (uint16_t)str); } sim_packet_t* Packet::getPacket() { return msgPtr; } void Packet::deliver(int node, long long int t) { sim_packet_deliver(node, msgPtr, t); } void Packet::deliverNow(int node) { deliver(node, 0); } tinyos-2.1.2+dfsg/tos/lib/tossim/packet.h000066400000000000000000000044451207233610700203010ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Injecting packets into TOSSIM. * * @author Philip Levis * @date Dec 10 2005 */ #ifndef PACKET_H_INCLUDED #define PACKET_H_INCLUDED #include class Packet { public: Packet(); Packet(sim_packet_t* msg); ~Packet(); void setSource(int src); int source(); void setDestination(int dest); int destination(); void setLength(int len); int length(); void setType(int type); int type(); char* data(); void setData(char* data, int len); int maxLength(); void setStrength(int str); sim_packet_t* getPacket(); void deliver(int node, long long int t); void deliverNow(int node); private: int allocated; sim_packet_t* msgPtr; }; #endif tinyos-2.1.2+dfsg/tos/lib/tossim/packet.i000066400000000000000000000046721207233610700203040ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SWIG interface specification for delivering packets to a node * (injecting traffic). * * Note that changing this file only changes the Python interface: * you must also change the underlying TOSSIM code so Python * has the proper functions to call. Look at mac.h, mac.c, and * sim_mac.c. * * @author Philip Levis * @date Jan 2 2006 */ %{ #include %} %apply (char *STRING, int LENGTH) { (char *data, int len) }; class Packet { public: Packet(); ~Packet(); void setSource(int src); int source(); void setDestination(int dest); int destination(); void setLength(int len); int length(); void setType(int type); int type(); char* data(); void setData(char* data, int len); int maxLength(); void setStrength(int str); void deliver(int node, long long int time); void deliverNow(int node); }; tinyos-2.1.2+dfsg/tos/lib/tossim/platform_message.h000066400000000000000000000042541207233610700223600ustar00rootroot00000000000000// $Id: platform_message.h,v 1.5 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Defining the platform-independently named packet structures to be the * tossim structures. * * @author Philip Levis * @date Dec 2 2005 * Revision: $Revision: 1.5 $ */ #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H #include #include typedef union message_header { tossim_header_t tossim; serial_header_t serial; } message_header_t; typedef union message_footer { tossim_footer_t tossim; } message_footer_t; typedef union message_metadata { tossim_metadata_t tossim; } message_metadata_t; #endif tinyos-2.1.2+dfsg/tos/lib/tossim/radio.c000066400000000000000000000044141207233610700201170ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * C++ implementation of the gain-based TOSSIM radio model. * * @author Philip Levis * @date Dec 10 2005 */ #include #include Radio::Radio() {} Radio::~Radio() {} void Radio::add(int src, int dest, double gain) { sim_gain_add(src, dest, gain); } double Radio::gain(int src, int dest) { return sim_gain_value(src, dest); } bool Radio::connected(int src, int dest) { return sim_gain_connected(src, dest); } void Radio::remove(int src, int dest) { sim_gain_remove(src, dest); } void Radio::setNoise(int node, double mean, double range) { sim_gain_set_noise_floor(node, mean, range); } void Radio::setSensitivity(double sensitivity) { sim_gain_set_sensitivity(sensitivity); } tinyos-2.1.2+dfsg/tos/lib/tossim/radio.h000066400000000000000000000040021207233610700201150ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Configuration parameters for a CSMA link. * * @author Philip Levis * @date Dec 10 2005 */ #ifndef RADIO_H_INCLUDED #define RADIO_H_INCLUDED class Radio { public: Radio(); ~Radio(); void add(int src, int dest, double value); double gain(int src, int dest); bool connected(int src, int dest); void remove(int src, int dest); void setNoise(int node, double mean, double range); void setSensitivity(double sensitivity); }; #endif tinyos-2.1.2+dfsg/tos/lib/tossim/radio.i000066400000000000000000000047071207233610700201320ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Stanfoard SWIG interface specification for the TOSSIM radio * propagation model. This file defines the Radio object that * is exported to Python. * This particular radio model is gain-based. If you want to change * the radio model (and the scripting interface), then you must * replace or modify this file and re-run the SWIG interface generation * script generate-swig.bash in lib/tossim. Basic TOSSIM includes * another model, the binary model, which stores packet loss rates * rather than gains. * * @author Philip Levis * @date Dec 10 2005 */ %module TOSSIMRadio %{ #include %} class Radio { public: Radio(); ~Radio(); void add(int src, int dest, double gain); double gain(int src, int dest); bool connected(int src, int dest); void remove(int src, int dest); void setNoise(int node, double mean, double range); void setSensitivity(double sensitivity); }; tinyos-2.1.2+dfsg/tos/lib/tossim/randomlib.c000066400000000000000000000140621207233610700207700ustar00rootroot00000000000000/* This Random Number Generator is based on the algorithm in a FORTRAN version published by George Marsaglia and Arif Zaman, Florida State University; ref.: see original comments below. At the fhw (Fachhochschule Wiesbaden, W.Germany), Dept. of Computer Science, we have written sources in further languages (C, Modula-2 Turbo-Pascal(3.0, 5.0), Basic and Ada) to get exactly the same test results compared with the original FORTRAN version. April 1989 Karl-L. Noell and Helmut Weber This random number generator originally appeared in "Toward a Universal Random Number Generator" by George Marsaglia and Arif Zaman. Florida State University Report: FSU-SCRI-87-50 (1987) It was later modified by F. James and published in "A Review of Pseudo- random Number Generators" THIS IS THE BEST KNOWN RANDOM NUMBER GENERATOR AVAILABLE. (However, a newly discovered technique can yield a period of 10^600. But that is still in the development stage.) It passes ALL of the tests for random number generators and has a period of 2^144, is completely portable (gives bit identical results on all machines with at least 24-bit mantissas in the floating point representation). The algorithm is a combination of a Fibonacci sequence (with lags of 97 and 33, and operation "subtraction plus one, modulo one") and an "arithmetic sequence" (using subtraction). Use IJ = 1802 & KL = 9373 to test the random number generator. The subroutine RANMAR should be used to generate 20000 random numbers. Then display the next six random numbers generated multiplied by 4096*4096 If the random number generator is working properly, the random numbers should be: 6533892.0 14220222.0 7275067.0 6172232.0 8354498.0 10633180.0 */ /* Globals */ static double randU[97], randC, randCD, randCM; static int i97,j97; static int test = FALSE; /* This is the initialization routine for the random number generator. NOTE: The seed variables can have values between: 0 <= IJ <= 31328 0 <= KL <= 30081 The random number sequences created by these two seeds are of sufficient length to complete an entire calculation with. For example, if sveral different groups are working on different parts of the same calculation, each group could be assigned its own IJ seed. This would leave each group with 30000 choices for the second seed. That is to say, this random number generator can create 900 million different subsequences -- with each subsequence having a length of approximately 10^30. */ void RandomInitialise(int ij,int kl) { double s,t; int ii,i,j,k,l,jj,m; /* Handle the seed range errors First random number seed must be between 0 and 31328 Second seed must have a value between 0 and 30081 */ if (ij < 0 || ij > 31328 || kl < 0 || kl > 30081) { ij = 1802; kl = 9373; } i = (ij / 177) % 177 + 2; j = (ij % 177) + 2; k = (kl / 169) % 178 + 1; l = (kl % 169); for (ii=0; ii<97; ii++) { s = 0.0; t = 0.5; for (jj=0; jj<24; jj++) { m = (((i * j) % 179) * k) % 179; i = j; j = k; k = m; l = (53 * l + 1) % 169; if (((l * m % 64)) >= 32) s += t; t *= 0.5; } randU[ii] = s; } randC = 362436.0 / 16777216.0; randCD = 7654321.0 / 16777216.0; randCM = 16777213.0 / 16777216.0; i97 = 97; j97 = 33; test = TRUE; } /* This is the random number generator proposed by George Marsaglia in Florida State University Report: FSU-SCRI-87-50 */ double RandomUniform(void) { double uni; int seed1, seed2; /* Make sure the initialisation routine has been called */ if (!test) { #if 0 RandomInitialise(1802,9373); #else seed1 = sim_random() % 31329; seed2 = sim_random() % 30082; RandomInitialise(seed1,seed2); #endif } uni = randU[i97-1] - randU[j97-1]; if (uni <= 0.0) uni++; randU[i97-1] = uni; i97--; if (i97 == 0) i97 = 97; j97--; if (j97 == 0) j97 = 97; randC -= randCD; if (randC < 0.0) randC += randCM; uni -= randC; if (uni < 0.0) uni++; return(uni); } /* ALGORITHM 712, COLLECTED ALGORITHMS FROM ACM. THIS WORK PUBLISHED IN TRANSACTIONS ON MATHEMATICAL SOFTWARE, VOL. 18, NO. 4, DECEMBER, 1992, PP. 434-435. The function returns a normally distributed pseudo-random number with a given mean and standard devaiation. Calls are made to a function subprogram which must return independent random numbers uniform in the interval (0,1). The algorithm uses the ratio of uniforms method of A.J. Kinderman and J.F. Monahan augmented with quadratic bounding curves. */ double RandomGaussian(double mean,double stddev) { double q,z,v,x,y; /* Generate P = (u,v) uniform in rect. enclosing acceptance region Make sure that any random numbers <= 0 are rejected, since gaussian() requires uniforms > 0, but RandomUniform() delivers >= 0. */ do { z = RandomUniform(); v = RandomUniform(); if (z <= 0.0 || v <= 0.0) { z = 1.0; v = 1.0; } v = 1.7156 * (v - 0.5); /* Evaluate the quadratic form */ x = z - 0.449871; y = fabs(v) + 0.386595; q = x * x + y * (0.19600 * y - 0.25472 * x); /* Accept P if inside inner ellipse */ if (q < 0.27597) break; /* Reject P if outside outer ellipse, or outside acceptance region */ } while ((q > 0.27846) || (v * v > -4.0 * log(z) * z * z)); /* Return ratio of P's coordinates as the normal deviate */ return (mean + stddev * v / z); } /* Return random integer within a range, lower -> upper INCLUSIVE */ int RandomInt(int lower,int upper) { return((int)(RandomUniform() * (upper - lower + 1)) + lower); } /* Return random float within a range, lower -> upper */ double RandomDouble(double lower,double upper) { return((upper - lower) * RandomUniform() + lower); } tinyos-2.1.2+dfsg/tos/lib/tossim/randomlib.h000066400000000000000000000041521207233610700207740ustar00rootroot00000000000000/* This Random Number Generator is based on the algorithm in a FORTRAN version published by George Marsaglia and Arif Zaman, Florida State University; ref.: see original comments below. At the fhw (Fachhochschule Wiesbaden, W.Germany), Dept. of Computer Science, we have written sources in further languages (C, Modula-2 Turbo-Pascal(3.0, 5.0), Basic and Ada) to get exactly the same test results compared with the original FORTRAN version. April 1989 Karl-L. Noell and Helmut Weber This random number generator originally appeared in "Toward a Universal Random Number Generator" by George Marsaglia and Arif Zaman. Florida State University Report: FSU-SCRI-87-50 (1987) It was later modified by F. James and published in "A Review of Pseudo- random Number Generators" THIS IS THE BEST KNOWN RANDOM NUMBER GENERATOR AVAILABLE. (However, a newly discovered technique can yield a period of 10^600. But that is still in the development stage.) It passes ALL of the tests for random number generators and has a period of 2^144, is completely portable (gives bit identical results on all machines with at least 24-bit mantissas in the floating point representation). The algorithm is a combination of a Fibonacci sequence (with lags of 97 and 33, and operation "subtraction plus one, modulo one") and an "arithmetic sequence" (using subtraction). Use IJ = 1802 & KL = 9373 to test the random number generator. The subroutine RANMAR should be used to generate 20000 random numbers. Then display the next six random numbers generated multiplied by 4096*4096 If the random number generator is working properly, the random numbers should be: 6533892.0 14220222.0 7275067.0 6172232.0 8354498.0 10633180.0 */ #ifndef _RANDOMLIB_H_ #define _RANDOMLIB_H_ #ifdef __cplusplus extern "C" { #endif void RandomInitialise(int,int); double RandomUniform(void); double RandomGaussian(double,double); int RandomInt(int,int); double RandomDouble(double,double); #ifdef __cplusplus } #endif #endif tinyos-2.1.2+dfsg/tos/lib/tossim/sf/000077500000000000000000000000001207233610700172625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tossim/sf/SerialForwarder.c000066400000000000000000000044721207233610700225300ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: July 9, 2007 * * A simple C++ wrapper around the serial forwarder for TOSSIM * */ #include "SerialForwarder.h" #include "sim_serial_forwarder.h" SerialForwarder::SerialForwarder(const int port) { openServerSocket(port); } SerialForwarder::~SerialForwarder() { } void SerialForwarder::openServerSocket(const int port) { sim_sf_open_server_socket(port); } void SerialForwarder::dispatchPacket(const void *packet, const int len) { sim_sf_dispatch_packet(packet, len); } void SerialForwarder::forwardPacket(const void *packet, const int len) { sim_sf_forward_packet(packet, len); } void SerialForwarder::process () { sim_sf_process(); } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/SerialForwarder.h000066400000000000000000000042121207233610700225250ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: July 9, 2007 * * A simple C++ wrapper around the serial forwarder for TOSSIM * */ #ifndef _SERIALFORWARDER_H_ #define _SERIALFORWARDER_H_ class SerialForwarder { public: SerialForwarder(const int port); ~SerialForwarder(); void process (); void dispatchPacket(const void *packet, const int len); void forwardPacket(const void *packet, const int len); void openServerSocket(const int port); }; #endif // ----- #ifndef _SERIALFORWARDER_H_ ----- tinyos-2.1.2+dfsg/tos/lib/tossim/sf/SerialForwarder.i000066400000000000000000000041311207233610700225260ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SWIG interface specification for the serial forwarder. * * @author Chad Metcalf * @date July 9, 2007 */ %{ #include %} %apply (char *STRING, int LENGTH) { (char *data, int len) }; class SerialForwarder { public: SerialForwarder(const int port); ~SerialForwarder(); void process (); void dispatchPacket(const void *packet, const int len); void forwardPacket(const void *packet, const int len); }; tinyos-2.1.2+dfsg/tos/lib/tossim/sf/SerialPacket.c000066400000000000000000000063021207233610700217760ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Injecting packets into TOSSIM. * * @author Philip Levis * @author Chad Metcalf * @date July 15 2007 */ #include #include SerialPacket::SerialPacket() { msgPtr = sim_serial_packet_allocate(); allocated = 1; } SerialPacket::SerialPacket(sim_serial_packet_t* m) { if (m != NULL) { msgPtr = m; allocated = 0; } else { msgPtr = sim_serial_packet_allocate(); allocated = 1; } } SerialPacket::~SerialPacket() { if (allocated) { sim_serial_packet_free(msgPtr); } } void SerialPacket::setDestination(int dest) { sim_serial_packet_set_destination(msgPtr, (uint16_t)dest); } int SerialPacket::destination() { return sim_serial_packet_destination(msgPtr); } void SerialPacket::setLength(int len) { sim_serial_packet_set_length(msgPtr, (uint8_t)len); } int SerialPacket::length() { return sim_serial_packet_length(msgPtr); } void SerialPacket::setType(int type) { sim_serial_packet_set_type(msgPtr, (uint8_t)type); } int SerialPacket::type() { return sim_serial_packet_type(msgPtr); } char* SerialPacket::data() { char* val = (char*)sim_serial_packet_data(msgPtr); return val; } void SerialPacket::setData(char* data, int len) { len = (len > maxLength())? maxLength():len; memcpy(sim_serial_packet_data(msgPtr), data, len); setLength(len); } int SerialPacket::maxLength() { return (int)sim_serial_packet_max_length(msgPtr); } sim_serial_packet_t* SerialPacket::getPacket() { return msgPtr; } void SerialPacket::deliver(int node, long long int t) { sim_serial_packet_deliver(node, msgPtr, t); } void SerialPacket::deliverNow(int node) { deliver(node, 0); } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/SerialPacket.h000066400000000000000000000044541207233610700220110ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Injecting packets into TOSSIM. * * @author Philip Levis * @author Chad Metcalf * @date July 15 2007 */ #ifndef SERIAL_PACKET_H_INCLUDED #define SERIAL_PACKET_H_INCLUDED #include class SerialPacket { public: SerialPacket(); SerialPacket(sim_serial_packet_t* msg); ~SerialPacket(); void setDestination(int dest); int destination(); void setLength(int len); int length(); void setType(int type); int type(); char* data(); void setData(char* data, int len); int maxLength(); sim_serial_packet_t* getPacket(); void deliver(int node, long long int t); void deliverNow(int node); private: int allocated; sim_serial_packet_t* msgPtr; }; #endif tinyos-2.1.2+dfsg/tos/lib/tossim/sf/SerialPacket.i000066400000000000000000000046271207233610700220140ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SWIG interface specification for delivering packets to a node * (injecting traffic). * * Note that changing this file only changes the Python interface: * you must also change the underlying TOSSIM code so Python * has the proper functions to call. Look at mac.h, mac.c, and * sim_mac.c. * * @author Philip Levis * @author Chad Metcalf * @date July 17 2007 */ %{ #include %} %apply (char *STRING, int LENGTH) { (char *data, int len) }; class SerialPacket { public: SerialPacket(); ~SerialPacket(); void setDestination(int dest); int destination(); void setLength(int len); int length(); void setType(int type); int type(); char* data(); void setData(char* data, int len); int maxLength(); void deliver(int node, long long int time); void deliverNow(int node); }; tinyos-2.1.2+dfsg/tos/lib/tossim/sf/TOSSIM.py000066400000000000000000000374201207233610700206600ustar00rootroot00000000000000# This file was automatically generated by SWIG (http://www.swig.org). # Version 1.3.31 # # Don't modify this file, modify the SWIG interface instead. # This file is compatible with both classic and new-style classes. import _TOSSIM import new new_instancemethod = new.instancemethod try: _swig_property = property except NameError: pass # Python < 2.2 doesn't have 'property'. def _swig_setattr_nondynamic(self,class_type,name,value,static=1): if (name == "thisown"): return self.this.own(value) if (name == "this"): if type(value).__name__ == 'PySwigObject': self.__dict__[name] = value return method = class_type.__swig_setmethods__.get(name,None) if method: return method(self,value) if (not static) or hasattr(self,name): self.__dict__[name] = value else: raise AttributeError("You cannot add attributes to %s" % self) def _swig_setattr(self,class_type,name,value): return _swig_setattr_nondynamic(self,class_type,name,value,0) def _swig_getattr(self,class_type,name): if (name == "thisown"): return self.this.own() method = class_type.__swig_getmethods__.get(name,None) if method: return method(self) raise AttributeError,name def _swig_repr(self): try: strthis = "proxy of " + self.this.__repr__() except: strthis = "" return "<%s.%s; %s >" % (self.__class__.__module__, self.__class__.__name__, strthis,) import types try: _object = types.ObjectType _newclass = 1 except AttributeError: class _object : pass _newclass = 0 del types class MAC(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, MAC, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, MAC, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_MAC(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_MAC __del__ = lambda self : None; def initHigh(*args): return _TOSSIM.MAC_initHigh(*args) def initLow(*args): return _TOSSIM.MAC_initLow(*args) def high(*args): return _TOSSIM.MAC_high(*args) def low(*args): return _TOSSIM.MAC_low(*args) def symbolsPerSec(*args): return _TOSSIM.MAC_symbolsPerSec(*args) def bitsPerSymbol(*args): return _TOSSIM.MAC_bitsPerSymbol(*args) def preambleLength(*args): return _TOSSIM.MAC_preambleLength(*args) def exponentBase(*args): return _TOSSIM.MAC_exponentBase(*args) def maxIterations(*args): return _TOSSIM.MAC_maxIterations(*args) def minFreeSamples(*args): return _TOSSIM.MAC_minFreeSamples(*args) def rxtxDelay(*args): return _TOSSIM.MAC_rxtxDelay(*args) def ackTime(*args): return _TOSSIM.MAC_ackTime(*args) def setInitHigh(*args): return _TOSSIM.MAC_setInitHigh(*args) def setInitLow(*args): return _TOSSIM.MAC_setInitLow(*args) def setHigh(*args): return _TOSSIM.MAC_setHigh(*args) def setLow(*args): return _TOSSIM.MAC_setLow(*args) def setSymbolsPerSec(*args): return _TOSSIM.MAC_setSymbolsPerSec(*args) def setBitsBerSymbol(*args): return _TOSSIM.MAC_setBitsBerSymbol(*args) def setPreambleLength(*args): return _TOSSIM.MAC_setPreambleLength(*args) def setExponentBase(*args): return _TOSSIM.MAC_setExponentBase(*args) def setMaxIterations(*args): return _TOSSIM.MAC_setMaxIterations(*args) def setMinFreeSamples(*args): return _TOSSIM.MAC_setMinFreeSamples(*args) def setRxtxDelay(*args): return _TOSSIM.MAC_setRxtxDelay(*args) def setAckTime(*args): return _TOSSIM.MAC_setAckTime(*args) MAC_swigregister = _TOSSIM.MAC_swigregister MAC_swigregister(MAC) class Radio(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Radio, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Radio, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Radio(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Radio __del__ = lambda self : None; def add(*args): return _TOSSIM.Radio_add(*args) def gain(*args): return _TOSSIM.Radio_gain(*args) def connected(*args): return _TOSSIM.Radio_connected(*args) def remove(*args): return _TOSSIM.Radio_remove(*args) def setNoise(*args): return _TOSSIM.Radio_setNoise(*args) def setSensitivity(*args): return _TOSSIM.Radio_setSensitivity(*args) Radio_swigregister = _TOSSIM.Radio_swigregister Radio_swigregister(Radio) class Packet(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Packet, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Packet, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Packet(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Packet __del__ = lambda self : None; def setSource(*args): return _TOSSIM.Packet_setSource(*args) def source(*args): return _TOSSIM.Packet_source(*args) def setDestination(*args): return _TOSSIM.Packet_setDestination(*args) def destination(*args): return _TOSSIM.Packet_destination(*args) def setLength(*args): return _TOSSIM.Packet_setLength(*args) def length(*args): return _TOSSIM.Packet_length(*args) def setType(*args): return _TOSSIM.Packet_setType(*args) def type(*args): return _TOSSIM.Packet_type(*args) def data(*args): return _TOSSIM.Packet_data(*args) def setData(*args): return _TOSSIM.Packet_setData(*args) def maxLength(*args): return _TOSSIM.Packet_maxLength(*args) def setStrength(*args): return _TOSSIM.Packet_setStrength(*args) def deliver(*args): return _TOSSIM.Packet_deliver(*args) def deliverNow(*args): return _TOSSIM.Packet_deliverNow(*args) Packet_swigregister = _TOSSIM.Packet_swigregister Packet_swigregister(Packet) class SerialPacket(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, SerialPacket, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, SerialPacket, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_SerialPacket(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_SerialPacket __del__ = lambda self : None; def setDestination(*args): return _TOSSIM.SerialPacket_setDestination(*args) def destination(*args): return _TOSSIM.SerialPacket_destination(*args) def setLength(*args): return _TOSSIM.SerialPacket_setLength(*args) def length(*args): return _TOSSIM.SerialPacket_length(*args) def setType(*args): return _TOSSIM.SerialPacket_setType(*args) def type(*args): return _TOSSIM.SerialPacket_type(*args) def data(*args): return _TOSSIM.SerialPacket_data(*args) def setData(*args): return _TOSSIM.SerialPacket_setData(*args) def maxLength(*args): return _TOSSIM.SerialPacket_maxLength(*args) def deliver(*args): return _TOSSIM.SerialPacket_deliver(*args) def deliverNow(*args): return _TOSSIM.SerialPacket_deliverNow(*args) SerialPacket_swigregister = _TOSSIM.SerialPacket_swigregister SerialPacket_swigregister(SerialPacket) class SerialForwarder(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, SerialForwarder, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, SerialForwarder, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_SerialForwarder(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_SerialForwarder __del__ = lambda self : None; def process(*args): return _TOSSIM.SerialForwarder_process(*args) def dispatchPacket(*args): return _TOSSIM.SerialForwarder_dispatchPacket(*args) def forwardPacket(*args): return _TOSSIM.SerialForwarder_forwardPacket(*args) SerialForwarder_swigregister = _TOSSIM.SerialForwarder_swigregister SerialForwarder_swigregister(SerialForwarder) class Throttle(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Throttle, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Throttle, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Throttle(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Throttle __del__ = lambda self : None; def initialize(*args): return _TOSSIM.Throttle_initialize(*args) def finalize(*args): return _TOSSIM.Throttle_finalize(*args) def checkThrottle(*args): return _TOSSIM.Throttle_checkThrottle(*args) def printStatistics(*args): return _TOSSIM.Throttle_printStatistics(*args) Throttle_swigregister = _TOSSIM.Throttle_swigregister Throttle_swigregister(Throttle) class variable_string_t(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, variable_string_t, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, variable_string_t, name) __repr__ = _swig_repr __swig_setmethods__["type"] = _TOSSIM.variable_string_t_type_set __swig_getmethods__["type"] = _TOSSIM.variable_string_t_type_get if _newclass:type = _swig_property(_TOSSIM.variable_string_t_type_get, _TOSSIM.variable_string_t_type_set) __swig_setmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_set __swig_getmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_get if _newclass:ptr = _swig_property(_TOSSIM.variable_string_t_ptr_get, _TOSSIM.variable_string_t_ptr_set) __swig_setmethods__["len"] = _TOSSIM.variable_string_t_len_set __swig_getmethods__["len"] = _TOSSIM.variable_string_t_len_get if _newclass:len = _swig_property(_TOSSIM.variable_string_t_len_get, _TOSSIM.variable_string_t_len_set) __swig_setmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_set __swig_getmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_get if _newclass:isArray = _swig_property(_TOSSIM.variable_string_t_isArray_get, _TOSSIM.variable_string_t_isArray_set) def __init__(self, *args): this = _TOSSIM.new_variable_string_t(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_variable_string_t __del__ = lambda self : None; variable_string_t_swigregister = _TOSSIM.variable_string_t_swigregister variable_string_t_swigregister(variable_string_t) class nesc_app_t(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, nesc_app_t, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, nesc_app_t, name) __repr__ = _swig_repr __swig_setmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_set __swig_getmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_get if _newclass:numVariables = _swig_property(_TOSSIM.nesc_app_t_numVariables_get, _TOSSIM.nesc_app_t_numVariables_set) __swig_setmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_set __swig_getmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_get if _newclass:variableNames = _swig_property(_TOSSIM.nesc_app_t_variableNames_get, _TOSSIM.nesc_app_t_variableNames_set) __swig_setmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_set __swig_getmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_get if _newclass:variableTypes = _swig_property(_TOSSIM.nesc_app_t_variableTypes_get, _TOSSIM.nesc_app_t_variableTypes_set) __swig_setmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_set __swig_getmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_get if _newclass:variableArray = _swig_property(_TOSSIM.nesc_app_t_variableArray_get, _TOSSIM.nesc_app_t_variableArray_set) def __init__(self, *args): this = _TOSSIM.new_nesc_app_t(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_nesc_app_t __del__ = lambda self : None; nesc_app_t_swigregister = _TOSSIM.nesc_app_t_swigregister nesc_app_t_swigregister(nesc_app_t) class Variable(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Variable, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Variable, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Variable(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Variable __del__ = lambda self : None; def getData(*args): return _TOSSIM.Variable_getData(*args) Variable_swigregister = _TOSSIM.Variable_swigregister Variable_swigregister(Variable) class Mote(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Mote, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Mote, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Mote(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Mote __del__ = lambda self : None; def id(*args): return _TOSSIM.Mote_id(*args) def euid(*args): return _TOSSIM.Mote_euid(*args) def setEuid(*args): return _TOSSIM.Mote_setEuid(*args) def bootTime(*args): return _TOSSIM.Mote_bootTime(*args) def bootAtTime(*args): return _TOSSIM.Mote_bootAtTime(*args) def isOn(*args): return _TOSSIM.Mote_isOn(*args) def turnOff(*args): return _TOSSIM.Mote_turnOff(*args) def turnOn(*args): return _TOSSIM.Mote_turnOn(*args) def getVariable(*args): return _TOSSIM.Mote_getVariable(*args) def addNoiseTraceReading(*args): return _TOSSIM.Mote_addNoiseTraceReading(*args) def createNoiseModel(*args): return _TOSSIM.Mote_createNoiseModel(*args) def generateNoise(*args): return _TOSSIM.Mote_generateNoise(*args) Mote_swigregister = _TOSSIM.Mote_swigregister Mote_swigregister(Mote) class Tossim(_object): __swig_setmethods__ = {} __setattr__ = lambda self, name, value: _swig_setattr(self, Tossim, name, value) __swig_getmethods__ = {} __getattr__ = lambda self, name: _swig_getattr(self, Tossim, name) __repr__ = _swig_repr def __init__(self, *args): this = _TOSSIM.new_Tossim(*args) try: self.this.append(this) except: self.this = this __swig_destroy__ = _TOSSIM.delete_Tossim __del__ = lambda self : None; def init(*args): return _TOSSIM.Tossim_init(*args) def time(*args): return _TOSSIM.Tossim_time(*args) def ticksPerSecond(*args): return _TOSSIM.Tossim_ticksPerSecond(*args) def setTime(*args): return _TOSSIM.Tossim_setTime(*args) def timeStr(*args): return _TOSSIM.Tossim_timeStr(*args) def currentNode(*args): return _TOSSIM.Tossim_currentNode(*args) def getNode(*args): return _TOSSIM.Tossim_getNode(*args) def setCurrentNode(*args): return _TOSSIM.Tossim_setCurrentNode(*args) def addChannel(*args): return _TOSSIM.Tossim_addChannel(*args) def removeChannel(*args): return _TOSSIM.Tossim_removeChannel(*args) def randomSeed(*args): return _TOSSIM.Tossim_randomSeed(*args) def runNextEvent(*args): return _TOSSIM.Tossim_runNextEvent(*args) def mac(*args): return _TOSSIM.Tossim_mac(*args) def radio(*args): return _TOSSIM.Tossim_radio(*args) def newPacket(*args): return _TOSSIM.Tossim_newPacket(*args) def newSerialPacket(*args): return _TOSSIM.Tossim_newSerialPacket(*args) Tossim_swigregister = _TOSSIM.Tossim_swigregister Tossim_swigregister(Tossim) tinyos-2.1.2+dfsg/tos/lib/tossim/sf/Throttle.cpp000066400000000000000000000073631207233610700216040ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: July 9, 2007 * * A simple Throttle to slow a simulation to near real time. * */ #include "Throttle.h" Throttle::Throttle(Tossim* tossim, const int ms = 10) : sim(tossim), simStartTime(0.0), simEndTime(0.0), simPace(0), throttleCount(0) { // Convert milliseconds to sim_time_t simPace = ms * 10000000ULL; } Throttle::~Throttle() {} void Throttle::initialize() { simStartTime = getTime(); } void Throttle::finalize() { simEndTime = getTime(); } void Throttle::checkThrottle() { double secondsElasped = getTime() - simStartTime; sim_time_t ticksElasped = (sim_time_t) secondsElasped*sim->ticksPerSecond(); sim_time_t difference = sim->time() - ticksElasped; if (difference > simPace) { throttleCount++; double sleepDifference = (double) difference / sim->ticksPerSecond(); simSleep(sleepDifference); } } inline double Throttle::toDouble(struct timeval* tv) { return tv->tv_sec + tv->tv_usec/1e6; } double Throttle::getTime() { struct timeval tv; gettimeofday (&tv, NULL); return toDouble(&tv); } int Throttle::simSleep(double seconds) { struct timespec tv; /* Construct the timespec from the number of whole seconds... */ tv.tv_sec = (time_t) seconds; /* ... and the remainder in nanoseconds. */ tv.tv_nsec = (long) ((seconds - tv.tv_sec) * 1e+9); while (1) { /* Sleep for the time specified in tv. If interrupted by a signal, place the remaining time left to sleep back into tv. */ int rval = nanosleep (&tv, &tv); if (rval == 0) /* Completed the entire sleep time; all done. */ return 0; else if (errno == EINTR) /* Interrupted by a signal. Try again. */ continue; else /* Some other error; bail out. */ return rval; } return 0; } void Throttle::printStatistics() { printf("Number of throttle events %lu\n", throttleCount); if (simEndTime > 0.0) { printf("Total Sim Time: %.6f\n", simEndTime - simStartTime); } } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/Throttle.h000066400000000000000000000046071207233610700212470ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: July 9, 2007 * * A simple Throttle to slow a simulation to near real time. * */ #ifndef _THROTTLE_H_ #define _THROTTLE_H_ #include #include #include #include "tossim.h" class Throttle { public: Throttle(Tossim* tossim, const int ms); ~Throttle(); void initialize(); void finalize(); void checkThrottle(); void printStatistics(); private: double simStartTime; double simEndTime; sim_time_t simPace; Tossim* sim; unsigned long throttleCount; double getTime(); double toDouble(struct timeval* tv); int simSleep(double seconds); }; #endif // ----- #ifndef _THROTTLE_H_ ----- tinyos-2.1.2+dfsg/tos/lib/tossim/sf/Throttle.i000066400000000000000000000040451207233610700212440ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: July 9, 2007 * * SWIG interface specification for the Throttle object. */ %{ #include %} %apply (char *STRING, int LENGTH) { (char *data, int len) }; class Throttle { public: Throttle(Tossim* tossim, const int ms); ~Throttle(); void initialize(); void finalize(); void checkThrottle(); void printStatistics(); }; tinyos-2.1.2+dfsg/tos/lib/tossim/sf/examples/000077500000000000000000000000001207233610700211005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tossim/sf/examples/Makefile.Driver000066400000000000000000000042141207233610700237730ustar00rootroot00000000000000# # Copyright (c) 2007 Toilers Research Group - Colorado School of Mines # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of Toilers Research Group - Colorado School of # Mines nor the names of its contributors may be used to endorse # or promote products derived from this software without specific # prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD # UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. #* # Author: Chad Metcalf # Date: July 9, 2007 # DRIVER_OBJS=build/micaz/c-sf.o build/micaz/sf.o build/micaz/tossim.o build/micaz/c-support.o build/micaz/sim.o build/micaz/throttle.o SFDIR=$(TOSDIR)/lib/tossim/sf all: make micaz sim-sf g++ -g -c -o TestSerial.o TestSerial.c -I$(TOSDIR)/lib/tossim -I$(SFDIR) g++ -o TestSerial $(DRIVER_OBJS) TestSerial.o -lpython2.5 mig python -target=null -python-classname=TestSerialMsg TestSerial.h test_serial_msg -o TestSerialMsg.py clean: make clean rm -f TestSerial TestSerial.o TestSerialMsg.py *.pyc app.xml tinyos-2.1.2+dfsg/tos/lib/tossim/sf/examples/TestSerial.c000066400000000000000000000052011207233610700233210ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: Oct 1, 2007 * * A simple TOSSIM driver for the TestSerial application that utilizes * TOSSIM Live extensions. * */ #include #include #include #include #include #include #include int main() { Tossim* t = new Tossim(NULL); t-> init(); Throttle throttle(t, 10); SerialForwarder sf(9001); for (int i = 0; i < 1; i++) { Mote* m = t->getNode(i); m->bootAtTime(rand() % t->ticksPerSecond()); } t->addChannel("Serial", stdout); t->addChannel("TestSerialC", stdout); t->addChannel("Atm128AlarmC", stdout); Radio* r = t->radio(); for (int i = 0; i < 1; i++) { r->setNoise(i, -105.0, 1.0); for (int j = 0; j < 1; j++) { r->add(i, j, -96.0 - (double)abs(i - j)); r->add(j, i, -96.0 - (double)abs(i - j)); } } sf.process(); throttle.initialize(); while(t->time() < 600 * t->ticksPerSecond()) { throttle.checkThrottle(); sf.process(); t->runNextEvent(); } } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/examples/TestSerial.py000066400000000000000000000052051207233610700235330ustar00rootroot00000000000000 # # Copyright (c) 2007 Toilers Research Group - Colorado School of Mines # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of Toilers Research Group - Colorado School of # Mines nor the names of its contributors may be used to endorse # or promote products derived from this software without specific # prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD # UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. #* # Author: Chad Metcalf # Date: July 9, 2007 # # A simple TOSSIM driver for the TestSerial application that utilizes # TOSSIM Live extensions. # import sys import time from TOSSIM import * from TestSerialMsg import * t = Tossim([]) m = t.mac() r = t.radio() sf = SerialForwarder(9001) throttle = Throttle(t, 10) t.addChannel("Serial", sys.stdout); t.addChannel("TestSerialC", sys.stdout); for i in range(0, 2): m = t.getNode(i); m.bootAtTime((31 + t.ticksPerSecond() / 10) * i + 1); sf.process(); throttle.initialize(); for i in range(0, 60): throttle.checkThrottle(); t.runNextEvent(); sf.process(); msg = TestSerialMsg() msg.set_counter(7); serialpkt = t.newSerialPacket(); serialpkt.setData(msg.data) serialpkt.setType(msg.get_amType()) serialpkt.setDestination(0) serialpkt.deliver(0, t.time() + 3) pkt = t.newPacket(); pkt.setData(msg.data) pkt.setType(msg.get_amType()) pkt.setDestination(0) pkt.deliver(0, t.time() + 10) for i in range(0, 20): throttle.checkThrottle(); t.runNextEvent(); sf.process(); throttle.printStatistics() tinyos-2.1.2+dfsg/tos/lib/tossim/sf/examples/TestSerialSFClient.py000066400000000000000000000044401207233610700251230ustar00rootroot00000000000000#!/usr/bin/env python # # Copyright (c) 2007 Toilers Research Group - Colorado School of Mines # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of Toilers Research Group - Colorado School of # Mines nor the names of its contributors may be used to endorse # or promote products derived from this software without specific # prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD # UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. #* # Author: Chad Metcalf # Date: July 9, 2007 # # A simple Python script that listens on a SF for TestSerial messages. from TestSerialMsg import * from tinyos.message import MoteIF class MyClass: def __init__(self): # Create a MoteIF self.mif = MoteIF.MoteIF() # Attach a source to it self.source = self.mif.addSource("sf@localhost:9001") # SomeMessageClass.py would be generated by MIG self.mif.addListener(self, TestSerialMsg) # Called by the MoteIF's receive thread when a new message # is received def receive(self, src, msg): print "Received message: "+ str(msg) if __name__ == "__main__": m = MyClass() tinyos-2.1.2+dfsg/tos/lib/tossim/sf/generate-swig.bash000066400000000000000000000034521207233610700226660ustar00rootroot00000000000000#!/bin/bash # Copyright (c) 2005 Stanford University. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # - Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # - Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the # distribution. # - Neither the name of the copyright holders nor the names of # its contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # OF THE POSSIBILITY OF SUCH DAMAGE. # # Simple script that generates the Python interfaces to TOSSIM. # # Author: Philip Levis # Author: Chad Metcalf # # $Id: generate-swig.bash,v 1.2 2010-06-29 22:07:51 scipio Exp $ swig -shadow -python -c++ -I$TOSROOT/tos/lib/tossim tossim.i tinyos-2.1.2+dfsg/tos/lib/tossim/sf/sim/000077500000000000000000000000001207233610700200525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tossim/sf/sim/MainC.nc000066400000000000000000000060141207233610700213640ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This version of Main is the system interface the TinyOS boot * sequence in TOSSIM. It wires the boot sequence implementation to * the scheduler and hardware resources. Unlike the standard Main, * it does not actually define the main function, as a * TOSSIM simulation is triggered from Python. * * @author Philip Levis * @author Chad Metcalf * @date Sep 14 2007 */ // $Id: MainC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ #include "hardware.h" configuration MainC { provides interface Boot; uses interface Init as SoftwareInit; } implementation { components PlatformC, SimMainP, TinySchedulerC; // SimMoteP is not referred to by any component here. // It is included to make sure nesC loads it, as it // includes functionality many other systems depend on. components SimMoteP; SimMainP.Scheduler -> TinySchedulerC; SimMainP.PlatformInit -> PlatformC; // Export the SoftwareInit and Booted for applications SoftwareInit = SimMainP.SoftwareInit; Boot = SimMainP; // These components may not be used by the application, but must // be included. This is because there are Python calls that deliver // packets, and those python calls must terminate somewhere. If // the application does not wire this up to, e.g., ActiveMessageC, // the default handlers make sure nothing happens when a script // tries to deliver a packet to a node that has no radio stack. components ActiveMessageC; components SerialActiveMessageC; } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/sim/SerialActiveMessageC.nc000066400000000000000000000223111207233610700243560ustar00rootroot00000000000000// $Id: SerialActiveMessageC.nc,v 1.3 2010-06-22 20:50:43 scipio Exp $ /* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: July 9, 2007 * * The Serial Active Message implementation for use with the TOSSIM Live * extensions. * */ #include #include #include "sim_serial_forwarder.h" module SerialActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements as Acks; } uses { interface TossimPacketModel as Model; command am_addr_t amAddress(); } } implementation { message_t buffer; message_t* bufferPointer = &buffer; message_t* sendMsgPtr = NULL; serial_header_t* getHeader(message_t* amsg) { return (serial_header_t*)(amsg->data - sizeof(serial_header_t)); } task void startDone() { signal SplitControl.startDone(SUCCESS); } task void stopDone() { signal SplitControl.stopDone(SUCCESS); } command error_t SplitControl.start() { post startDone(); return SUCCESS; } command error_t SplitControl.stop() { post stopDone(); return SUCCESS; } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* amsg, uint8_t len) { error_t err; serial_header_t* header = getHeader(amsg); header->type = id; header->dest = addr; // For out going serial messages we'll use the real TOS_NODE_ID header->src = TOS_NODE_ID; header->length = len; err = call Model.send((int)addr, amsg, len + sizeof(serial_header_t)); return err; } command error_t AMSend.cancel[am_id_t id](message_t* msg) { dbg("Serial", "SerialAM: cancelled a packet\n"); return call Model.cancel(msg); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } event void Model.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } task void modelSendDone () { signal Model.sendDone(sendMsgPtr, SUCCESS); } default command error_t Model.send(int node, message_t* msg, uint8_t len) { sendMsgPtr = msg; dbg("Serial", "Sending serial message (%p) of type %hhu and length %hhu @ %s.\n", msg, call AMPacket.type(msg), len, sim_time_string()); sim_sf_dispatch_packet((void*)msg, len); post modelSendDone (); return SUCCESS; } /* Receiving a packet */ event void Model.receive(message_t* msg) { uint8_t len; void* payload; memcpy(bufferPointer, msg, sizeof(message_t)); if (msg != NULL) { free(msg); } payload = call Packet.getPayload(bufferPointer, call Packet.maxPayloadLength()); len = call Packet.payloadLength(bufferPointer); dbg("Serial", "Received serial message (%p) of type %hhu and length %hhu @ %s.\n", bufferPointer, call AMPacket.type(bufferPointer), len, sim_time_string()); bufferPointer = signal Receive.receive[call AMPacket.type(bufferPointer)] (bufferPointer, payload, len); } event bool Model.shouldAck(message_t* msg) { serial_header_t* header = getHeader(msg); if (header->dest == call amAddress()) { dbg("Acks", "Received packet addressed to me so ack it\n"); return TRUE; } return FALSE; } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->dest; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { serial_header_t* header = getHeader(amsg); header->dest = addr; } command am_addr_t AMPacket.source(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->src; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { serial_header_t* header = getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t t) { serial_header_t* header = getHeader(amsg); header->type = t; } command am_group_t AMPacket.group(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->group; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { serial_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } command void Packet.clear(message_t* msg) {} command void* Packet.getPayload(message_t* msg, uint8_t len) { if (len <= TOSH_DATA_LENGTH) { return msg->data; } else { return NULL; } } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { getHeader(msg)->length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command uint8_t Packet.payloadLength(message_t* msg) { return getHeader(msg)->length; } async command error_t Acks.requestAck(message_t* msg) { return FAIL; } async command error_t Acks.noAck(message_t* msg) { return SUCCESS; } async command bool Acks.wasAcked(message_t* msg) { return FALSE; } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } default command error_t Model.cancel(message_t* msg) { return FAIL; } default command am_addr_t amAddress() { return 0; } void serial_active_message_deliver_handle(sim_event_t* evt) { message_t* m = (message_t*)evt->data; signal Model.receive(m); } sim_event_t* allocate_serial_deliver_event(int node, message_t* msg, sim_time_t t) { sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t)); message_t* newMsg = (message_t*)malloc(sizeof(message_t)); uint8_t payloadLength = ((serial_header_t*)msg->header)->length; memcpy(getHeader(newMsg), msg, sizeof(serial_header_t) + payloadLength); evt->mote = node; evt->time = t; evt->handle = serial_active_message_deliver_handle; evt->cleanup = sim_queue_cleanup_event; evt->cancelled = 0; evt->force = 0; evt->data = newMsg; return evt; } void serial_active_message_deliver(int node, message_t* msg, sim_time_t t) @C() @spontaneous() { sim_event_t* evt = allocate_serial_deliver_event(node, msg, t); sim_queue_insert(evt); } } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/sim/tos.h000066400000000000000000000062301207233610700210310ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of all of the basic TOSSIM primitives and utility * functions. * * @author Philip Levis * @author Chad Metcalf * @date July 15 2007 */ // $Id: tos.h,v 1.3 2010-06-29 22:07:51 scipio Exp $ #ifndef TOS_H_INCLUDED #define TOS_H_INCLUDED #if !defined(__CYGWIN__) #if defined(__MSP430__) #include #else #include #endif #else //cygwin #include #include #include #endif #include #include #include #include #include #include /* * TEMPORARY: include the Safe TinyOS macros so that annotations get * defined away for non-safe users -- this will no longer be necessary * after we require users to use the ncc that has Safe TinyOS * support */ #include "../../lib/safe/include/annots_stage1.h" #ifndef __cplusplus typedef uint8_t bool; #endif enum { FALSE = 0, TRUE = 1 }; extern uint16_t TOS_NODE_ID; #define PROGMEM #ifndef TOSSIM_MAX_NODES #define TOSSIM_MAX_NODES 1000 #endif #include #include #include #include // We only want to include these files if we are compiling TOSSIM proper, // that is, the C file representing the TinyOS application. The TinyOS // build process means that this is the only really good place to put // them. #ifdef TOSSIM struct @atmostonce { }; struct @atleastonce { }; struct @exactlyonce { }; #include #include #include #include #include #include #include #endif #endif tinyos-2.1.2+dfsg/tos/lib/tossim/sf/sim_serial_forwarder.c000066400000000000000000000224521207233610700236350ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: July 9, 2007 * * The serial forwarder for TOSSIM * */ #include #include #include #include #include #include #include #include #include #include #include #include "sim_serial_forwarder.h" #include "sim_serial_packet.h" #include "sim_tossim.h" struct sim_sf_client_list *sim_sf_clients; int sim_sf_server_socket; int sim_sf_packets_read, sim_sf_packets_written, sim_sf_num_clients; int sim_sf_unix_check(const char *msg, int result) { if (result < 0) { perror(msg); exit(2); } return result; } void *sim_sf_xmalloc(size_t s) { void *p = malloc(s); if (!p) { fprintf(stderr, "out of memory\n"); exit(2); } return p; } void sim_sf_fd_wait(fd_set *fds, int *maxfd, int fd) { if (fd > *maxfd) *maxfd = fd; FD_SET(fd, fds); } void sim_sf_pstatus(void) { printf("clients %d, read %d, wrote %d\n", sim_sf_num_clients, sim_sf_packets_read, sim_sf_packets_written); } void sim_sf_add_client(int fd) { struct sim_sf_client_list *c = (struct sim_sf_client_list*)sim_sf_xmalloc(sizeof *c); c->next = sim_sf_clients; sim_sf_clients = c; sim_sf_num_clients++; sim_sf_pstatus(); c->fd = fd; } void sim_sf_rem_client(struct sim_sf_client_list **c) { struct sim_sf_client_list *dead = *c; *c = dead->next; sim_sf_num_clients--; sim_sf_pstatus(); close(dead->fd); free(dead); } void sim_sf_new_client(int fd) { fcntl(fd, F_SETFL, 0); if (sim_sf_init_source(fd) < 0) close(fd); else sim_sf_add_client(fd); } void sim_sf_check_clients(fd_set *fds) { struct sim_sf_client_list **c; for (c = &sim_sf_clients; *c; ) { int isNext = 1; if (FD_ISSET((*c)->fd, fds)) { int len; const void *packet = sim_sf_read_packet((*c)->fd, &len); if (packet) { sim_sf_forward_packet(packet, len); free((void *)packet); } else { sim_sf_rem_client(c); isNext = 0; } } if (isNext) c = &(*c)->next; } } void sim_sf_wait_clients(fd_set *fds, int *maxfd) { struct sim_sf_client_list *c; for (c = sim_sf_clients; c; c = c->next) sim_sf_fd_wait(fds, maxfd, c->fd); } void sim_sf_dispatch_packet(const void *packet, int len) { struct sim_sf_client_list **c; char* dispatchPacket = (char*) sim_sf_xmalloc(len+1); memset(dispatchPacket, 0, len+1); memcpy(dispatchPacket+1, packet, len); for (c = &sim_sf_clients; *c; ) if (sim_sf_write_packet((*c)->fd, dispatchPacket, len+1) >= 0) { sim_sf_packets_written++; c = &(*c)->next; } else sim_sf_rem_client(c); free(dispatchPacket); } void sim_sf_open_server_socket(int port) { struct sockaddr_in me; int opt; sim_sf_server_socket = sim_sf_unix_check("socket", socket(AF_INET, SOCK_STREAM, 0)); sim_sf_unix_check("socket", fcntl(sim_sf_server_socket, F_SETFL, O_NONBLOCK)); memset(&me, 0, sizeof me); me.sin_family = AF_INET; me.sin_port = htons(port); opt = 1; sim_sf_unix_check("setsockopt", setsockopt(sim_sf_server_socket, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt))); sim_sf_unix_check("bind", bind(sim_sf_server_socket, (struct sockaddr *)&me, sizeof me)); sim_sf_unix_check("listen", listen(sim_sf_server_socket, 5)); } void sim_sf_check_new_client(void) { int clientfd = accept(sim_sf_server_socket, NULL, NULL); if (clientfd >= 0) sim_sf_new_client(clientfd); } void sim_sf_forward_packet(const void *packet, int len) { char* forwardPacket = (char*)packet + 1; uint16_t addr = sim_serial_packet_destination((struct sim_serial_packet*)forwardPacket); sim_serial_packet_deliver(addr, (struct sim_serial_packet*)forwardPacket, sim_time()); sim_sf_packets_read++; } void sim_sf_process () { fd_set rfds; int maxfd = -1; struct timeval zero; int ret; zero.tv_sec = zero.tv_usec = 0; FD_ZERO(&rfds); sim_sf_fd_wait(&rfds, &maxfd, sim_sf_server_socket); sim_sf_wait_clients(&rfds, &maxfd); ret = select(maxfd + 1, &rfds, NULL, NULL, &zero); if (ret >= 0) { if (FD_ISSET(sim_sf_server_socket, &rfds)) sim_sf_check_new_client(); sim_sf_check_clients(&rfds); } } int sim_sf_saferead(int fd, void *buffer, int count) { int actual = 0; while (count > 0) { int n = read(fd, buffer, count); if (n == -1 && errno == EINTR) continue; if (n == -1) return -1; if (n == 0) return actual; count -= n; actual += n; buffer = (char*)buffer + n; } return actual; } int sim_sf_safewrite(int fd, const void *buffer, int count) { int actual = 0; while (count > 0) { int n = write(fd, buffer, count); if (n == -1 && errno == EINTR) continue; if (n == -1) return -1; count -= n; actual += n; buffer = (char*)buffer + n; } return actual; } int sim_sf_open_source(const char *host, int port) /* Returns: file descriptor for serial forwarder at host:port */ { int fd = socket(AF_INET, SOCK_STREAM, 0); struct hostent *entry; struct sockaddr_in addr; if (fd < 0) return fd; entry = gethostbyname(host); if (!entry) { close(fd); return -1; } addr.sin_family = entry->h_addrtype; memcpy(&addr.sin_addr, entry->h_addr, entry->h_length); addr.sin_port = htons(port); if (connect(fd, (struct sockaddr *)&addr, sizeof addr) < 0) { close(fd); return -1; } if (sim_sf_init_source(fd) < 0) { close(fd); return -1; } return fd; } int sim_sf_init_source(int fd) /* Effects: Checks that fd is following the TinyOS 2.0 serial forwarder protocol. Use this if you obtain your file descriptor from some other source than open_sf_source (e.g., you're a server) Returns: 0 if it is, -1 otherwise */ { char check[2], us[2]; int version; /* Indicate version and check if a TinyOS 2.0 serial forwarder on the other end */ us[0] = 'U'; us[1] = ' '; if (sim_sf_safewrite(fd, us, 2) != 2 || sim_sf_saferead(fd, check, 2) != 2 || check[0] != 'U') return -1; version = check[1]; if (us[1] < version) version = us[1]; /* Add other cases here for later protocol versions */ switch (version) { case ' ': break; default: return -1; /* not a valid version */ } return 0; } void *sim_sf_read_packet(int fd, int *len) /* Effects: reads packet from serial forwarder on file descriptor fd Returns: the packet read (in newly allocated memory), and *len is set to the packet length, or NULL for failure */ { unsigned char l; void *packet; if (sim_sf_saferead(fd, &l, 1) != 1) return NULL; packet = malloc(l); if (!packet) return NULL; if (sim_sf_saferead(fd, packet, l) != l) { free(packet); return NULL; } *len = l; return packet; } int sim_sf_write_packet(int fd, const void *packet, int len) /* Effects: writes len byte packet to serial forwarder on file descriptor fd Returns: 0 if packet successfully written, -1 otherwise */ { unsigned char l = len; if (sim_sf_safewrite(fd, &l, 1) != 1 || sim_sf_safewrite(fd, packet, l) != l) return -1; return 0; } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/sim_serial_forwarder.h000066400000000000000000000057021207233610700236410ustar00rootroot00000000000000/* * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Toilers Research Group - Colorado School of * Mines nor the names of its contributors may be used to endorse * or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Author: Chad Metcalf * Date: July 9, 2007 * * The serial forwarder for TOSSIM * */ #ifndef _SIM_SERIAL_FORWARDER_H_ #define _SIM_SERIAL_FORWARDER_H_ #include #ifdef __cplusplus extern "C" { #endif struct sim_sf_client_list { struct sim_sf_client_list *next; int fd; }; void sim_sf_forward_packet(const void *packet, int len); void sim_sf_dispatch_packet(const void *packet, int len); void sim_sf_open_server_socket(int port); void sim_sf_process (); int sim_sf_unix_check(const char *msg, int result); void *sim_sf_xmalloc(size_t s); void sim_sf_fd_wait(fd_set *fds, int *maxfd, int fd); void sim_sf_pstatus(void); void sim_sf_add_client(int fd); void sim_sf_rem_client(struct sim_sf_client_list **c); void sim_sf_new_client(int fd); void sim_sf_check_clients(fd_set *fds); void sim_sf_wait_clients(fd_set *fds, int *maxfd); void sim_sf_check_new_client(void); void sim_sf_forward_packet(const void *packet, int len); int sim_sf_saferead(int fd, void *buffer, int count); int sim_sf_safewrite(int fd, const void *buffer, int count); int sim_sf_open_source(const char *host, int port); int sim_sf_init_source(int fd); void *sim_sf_read_packet(int fd, int *len); int sim_sf_write_packet(int fd, const void *packet, int len); #ifdef __cplusplus } #endif #endif // ----- #ifndef _SIM_SERIAL_FORWARDER_H_ ----- tinyos-2.1.2+dfsg/tos/lib/tossim/sf/sim_serial_packet.c000066400000000000000000000112741207233610700231110ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * TOSSIM packet abstract data type, so C++ code can call into nesC * code that does the native-to-network type translation. * * @author Philip Levis * @author Chad Metcalf * @date July 15 2007 */ // $Id: sim_serial_packet.c,v 1.2 2010-06-29 22:07:51 scipio Exp $ #include #include #include // NOTE: This function is defined in lib/tossim/ActiveMessageC. It // has to be predeclared here because it is defined within that component. void serial_active_message_deliver(int node, message_t* m, sim_time_t t); static serial_header_t* getSerialHeader(message_t* msg) { return (serial_header_t*)(msg->data - sizeof(serial_header_t)); } void sim_serial_packet_set_destination(sim_serial_packet_t* msg, uint16_t dest)__attribute__ ((C, spontaneous)) { serial_header_t* hdr = getSerialHeader((message_t*)msg); hdr->dest = dest; }__attribute__ ((C, spontaneous)) uint16_t sim_serial_packet_destination(sim_serial_packet_t* msg)__attribute__ ((C, spontaneous)) { serial_header_t* hdr = getSerialHeader((message_t*)msg); return hdr->dest; } void sim_serial_packet_set_source(sim_serial_packet_t* msg, uint16_t src)__attribute__ ((C, spontaneous)) { serial_header_t* hdr = getSerialHeader((message_t*)msg); hdr->src = src; }__attribute__ ((C, spontaneous)) uint16_t sim_serial_packet_source(sim_serial_packet_t* msg)__attribute__ ((C, spontaneous)) { serial_header_t* hdr = getSerialHeader((message_t*)msg); return hdr->src; } void sim_serial_packet_set_length(sim_serial_packet_t* msg, uint8_t length)__attribute__ ((C, spontaneous)) { serial_header_t* hdr = getSerialHeader((message_t*)msg); hdr->length = length; } uint16_t sim_serial_packet_length(sim_serial_packet_t* msg)__attribute__ ((C, spontaneous)) { serial_header_t* hdr = getSerialHeader((message_t*)msg); return hdr->length; } void sim_serial_packet_set_type(sim_serial_packet_t* msg, uint8_t type) __attribute__ ((C, spontaneous)){ serial_header_t* hdr = getSerialHeader((message_t*)msg); hdr->type = type; } uint8_t sim_serial_packet_type(sim_serial_packet_t* msg) __attribute__ ((C, spontaneous)){ serial_header_t* hdr = getSerialHeader((message_t*)msg); return hdr->type; } uint8_t* sim_serial_packet_data(sim_serial_packet_t* p) __attribute__ ((C, spontaneous)){ message_t* msg = (message_t*)p; return (uint8_t*)&msg->data; } void sim_serial_packet_deliver(int node, sim_serial_packet_t* msg, sim_time_t t) __attribute__ ((C, spontaneous)){ if (t < sim_time()) { t = sim_time(); } dbg("Packet", "sim_serial_packet.c: Delivering packet %p to %i at %llu\n", msg, node, t); serial_active_message_deliver(node, (message_t*)msg, t); } uint8_t sim_serial_packet_max_length(sim_serial_packet_t* msg) __attribute__ ((C, spontaneous)){ return TOSH_DATA_LENGTH; } sim_serial_packet_t* sim_serial_packet_allocate () __attribute__ ((C, spontaneous)){ return (sim_serial_packet_t*)malloc(sizeof(message_t)); } void sim_serial_packet_free(sim_serial_packet_t* p) __attribute__ ((C, spontaneous)) { printf("sim_serial_packet.c: Freeing packet %p\n", p); free(p); } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/sim_serial_packet.h000066400000000000000000000067761207233610700231310ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * TOSSIM packet abstract data type, so C++ code can call into nesC * code that does the native-to-network type translation. * * @author Philip Levis * @author Chad Metcalf * @date July 15 2007 */ // $Id: sim_serial_packet.h,v 1.2 2010-06-29 22:07:51 scipio Exp $ #ifndef SIM_SERIAL_PACKET_H_INCLUDED #define SIM_SERIAL_PACKET_H_INCLUDED #include "sim_tossim.h" #include #ifdef __cplusplus extern "C" { #endif /* * sim_serial_packet_t is a weird beast. It's a dummy type that can stand * in for message_t. We need to use sim_serial_packet_t because gcc can't * understand message_t, due to its network types (nx). So the shim * code between Python and TOSSIM can't mention message_t. Rather * than use a void*, the shim uses sim_serial_packet_t in order to provide * some type checking. A sim_serial_packet_t* is essentially a Python * friendly pointer to a message_t. */ typedef struct sim_serial_packet {} sim_serial_packet_t; void sim_serial_packet_set_destination(sim_serial_packet_t* msg, uint16_t dest); uint16_t sim_serial_packet_destination(sim_serial_packet_t* msg); void sim_serial_packet_set_source(sim_serial_packet_t* msg, uint16_t src); uint16_t sim_serial_packet_source(sim_serial_packet_t* msg); void sim_serial_packet_set_length(sim_serial_packet_t* msg, uint8_t len); uint16_t sim_serial_packet_length(sim_serial_packet_t* msg); void sim_serial_packet_set_type(sim_serial_packet_t* msg, uint8_t type); uint8_t sim_serial_packet_type(sim_serial_packet_t* msg); uint8_t* sim_serial_packet_data(sim_serial_packet_t* msg); void sim_serial_packet_deliver(int node, sim_serial_packet_t* msg, sim_time_t t); uint8_t sim_serial_packet_max_length(sim_serial_packet_t* msg); sim_serial_packet_t* sim_serial_packet_allocate(); void sim_serial_packet_free(sim_serial_packet_t* m); #ifdef __cplusplus } #endif #endif // SIM_SERIAL_PACKET_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sf/tossim.c000066400000000000000000000160441207233610700207510ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of TOSSIM C++ classes. Generally just directly * call their C analogues. * * @author Philip Levis * @author Chad Metcalf * @date July 15 2007 */ // $Id: tossim.c,v 1.2 2010-06-29 22:07:51 scipio Exp $ #include #include #include #include #include #include #include #include #include #include #include #include #include uint16_t TOS_NODE_ID = 1; Variable::Variable(char* str, char* formatStr, int array, int which) { name = str; format = formatStr; isArray = array; mote = which; int sLen = strlen(name); realName = (char*)malloc(sLen + 1); memcpy(realName, name, sLen + 1); realName[sLen] = 0; for (int i = 0; i < sLen; i++) { if (realName[i] == '.') { realName[i] = '$'; } } // printf("Creating %s realName: %s format: %s %s\n", name, realName, formatStr, array? "[]":""); if (sim_mote_get_variable_info(mote, realName, &ptr, &len) == 0) { data = (char*)malloc(len + 1); data[len] = 0; } else { printf("Could not find variable %s\n", realName); data = NULL; ptr = NULL; } printf("Allocated variable %s\n", realName); } Variable::~Variable() { printf("Freeing variable %s\n", realName); free(data); free(realName); } /* This is the sdbm algorithm, taken from http://www.cs.yorku.ca/~oz/hash.html -pal */ static unsigned int tossim_hash(void* key) { char* str = (char*)key; unsigned int hashVal = 0; int c; while ((c = *str++)) hashVal = c + (hashVal << 6) + (hashVal << 16) - hashVal; return hashVal; } static int tossim_hash_eq(void* key1, void* key2) { return strcmp((char*)key1, (char*)key2) == 0; } variable_string_t Variable::getData() { if (data != NULL && ptr != NULL) { str.ptr = data; str.type = format; str.len = len; str.isArray = isArray; // printf("Getting %s %s %s\n", format, isArray? "[]":"", name); memcpy(data, ptr, len); } else { str.ptr = (char*)""; str.type = (char*)""; str.len = strlen(""); str.isArray = 0; } return str; } Mote::Mote(nesc_app_t* n) { app = n; varTable = create_hashtable(128, tossim_hash, tossim_hash_eq); } Mote::~Mote(){} unsigned long Mote::id() { return nodeID; } long long int Mote::euid() { return sim_mote_euid(nodeID); } void Mote::setEuid(long long int val) { sim_mote_set_euid(nodeID, val); } long long int Mote::bootTime() { return sim_mote_start_time(nodeID); } void Mote::bootAtTime(long long int time) { sim_mote_set_start_time(nodeID, time); sim_mote_enqueue_boot_event(nodeID); } bool Mote::isOn() { return sim_mote_is_on(nodeID); } void Mote::turnOff() { sim_mote_turn_off(nodeID); } void Mote::turnOn() { sim_mote_turn_on(nodeID); } void Mote::setID(unsigned long val) { nodeID = val; } Variable* Mote::getVariable(char* name) { char* typeStr = (char*)""; int isArray; Variable* var; var = (Variable*)hashtable_search(varTable, name); if (var == NULL) { // Could hash this for greater efficiency, // but that would either require transformation // in Tossim class or a more complex typemap. if (app != NULL) { for (int i = 0; i < app->numVariables; i++) { if(strcmp(name, app->variableNames[i]) == 0) { typeStr = app->variableTypes[i]; isArray = app->variableArray[i]; break; } } } // printf("Getting variable %s of type %s %s\n", name, typeStr, isArray? "[]" : ""); var = new Variable(name, typeStr, isArray, nodeID); hashtable_insert(varTable, name, var); } return var; } void Mote::addNoiseTraceReading(int val) { sim_noise_trace_add(id(), (char)val); } void Mote::createNoiseModel() { sim_noise_create_model(id()); } int Mote::generateNoise(int when) { return (int)sim_noise_generate(id(), when); } Tossim::Tossim(nesc_app_t* n) { app = n; init(); } Tossim::~Tossim() { sim_end(); } void Tossim::init() { sim_init(); motes = (Mote**)malloc(sizeof(Mote*) * (TOSSIM_MAX_NODES + 1)); memset(motes, 0, sizeof(Mote*) * TOSSIM_MAX_NODES); } long long int Tossim::time() { return sim_time(); } long long int Tossim::ticksPerSecond() { return sim_ticks_per_sec(); } char* Tossim::timeStr() { sim_print_now(timeBuf, 256); return timeBuf; } void Tossim::setTime(long long int val) { sim_set_time(val); } Mote* Tossim::currentNode() { return getNode(sim_node()); } Mote* Tossim::getNode(unsigned long nodeID) { if (nodeID > TOSSIM_MAX_NODES) { nodeID = TOSSIM_MAX_NODES; // log an error, asked for an invalid node } else { if (motes[nodeID] == NULL) { motes[nodeID] = new Mote(app); if (nodeID == TOSSIM_MAX_NODES) { motes[nodeID]->setID(0xffff); } else { motes[nodeID]->setID(nodeID); } } return motes[nodeID]; } } void Tossim::setCurrentNode(unsigned long nodeID) { sim_set_node(nodeID); } void Tossim::addChannel(char* channel, FILE* file) { sim_add_channel(channel, file); } bool Tossim::removeChannel(char* channel, FILE* file) { return sim_remove_channel(channel, file); } void Tossim::randomSeed(int seed) { return sim_random_seed(seed); } bool Tossim::runNextEvent() { return sim_run_next_event(); } MAC* Tossim::mac() { return new MAC(); } Radio* Tossim::radio() { return new Radio(); } Packet* Tossim::newPacket() { return new Packet(); } SerialPacket* Tossim::newSerialPacket() { return new SerialPacket(); } tinyos-2.1.2+dfsg/tos/lib/tossim/sf/tossim.h000066400000000000000000000072431207233610700207570ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Declaration of C++ objects representing TOSSIM abstractions. * Used to generate Python objects. * * @author Philip Levis * @author Chad Metcalf * @date July 15 2007 */ // $Id: tossim.h,v 1.2 2010-06-29 22:07:51 scipio Exp $ #ifndef TOSSIM_H_INCLUDED #define TOSSIM_H_INCLUDED //#include #include #include #include #include #include #include #include typedef struct variable_string { char* type; char* ptr; int len; int isArray; } variable_string_t; typedef struct nesc_app { int numVariables; char** variableNames; char** variableTypes; int* variableArray; } nesc_app_t; class Variable { public: Variable(char* name, char* format, int array, int mote); ~Variable(); variable_string_t getData(); private: char* name; char* realName; char* format; int mote; void* ptr; char* data; size_t len; int isArray; variable_string_t str; }; class Mote { public: Mote(nesc_app_t* app); ~Mote(); unsigned long id(); long long int euid(); void setEuid(long long int id); long long int bootTime(); void bootAtTime(long long int time); bool isOn(); void turnOff(); void turnOn(); void setID(unsigned long id); void addNoiseTraceReading(int val); void createNoiseModel(); int generateNoise(int when); Variable* getVariable(char* name); private: unsigned long nodeID; nesc_app_t* app; struct hashtable* varTable; }; class Tossim { public: Tossim(nesc_app_t* app); ~Tossim(); void init(); long long int time(); long long int ticksPerSecond(); char* timeStr(); void setTime(long long int time); Mote* currentNode(); Mote* getNode(unsigned long nodeID); void setCurrentNode(unsigned long nodeID); void addChannel(char* channel, FILE* file); bool removeChannel(char* channel, FILE* file); void randomSeed(int seed); bool runNextEvent(); MAC* mac(); Radio* radio(); Packet* newPacket(); SerialPacket* newSerialPacket(); private: char timeBuf[256]; nesc_app_t* app; Mote** motes; }; #endif // TOSSIM_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sf/tossim.i000066400000000000000000000246741207233610700207670ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SWIG interface specification for TOSSIM. This file defines * the top-level TOSSIM and Mote objects which are exported to * Python. The typemap at the beginning allows a script to * use Python files as a parameter to a function that takes a * FILE* as a parameter (e.g., the logging system in sim_log.h). * * With updates to include SerialForwarder and Throttle * * @author Philip Levis * @author Chad Metcalf * @date July 9, 2007 */ %module TOSSIM %{ #include #include enum { PRIMITIVE_INTEGER = 0, PRIMITIVE_FLOAT = 1, PRIMITIVE_UNKNOWN = 2 }; int lengthOfType(char* type) { if (strcmp(type, "uint8_t") == 0) { return sizeof(uint8_t); } else if (strcmp(type, "uint16_t") == 0) { return sizeof(uint16_t); } else if (strcmp(type, "uint32_t") == 0) { return sizeof(uint32_t); } else if (strcmp(type, "int8_t") == 0) { return sizeof(int8_t); } else if (strcmp(type, "int16_t") == 0) { return sizeof(int16_t); } else if (strcmp(type, "int32_t") == 0) { return sizeof(int32_t); } else if (strcmp(type, "char") == 0) { return sizeof(char); } else if (strcmp(type, "short") == 0) { return sizeof(short); } else if (strcmp(type, "int") == 0) { return sizeof(int); } else if (strcmp(type, "long") == 0) { return sizeof(long); } else if (strcmp(type, "unsigned char") == 0) { return sizeof(unsigned char); } else if (strcmp(type, "unsigned short") == 0) { return sizeof(unsigned short); } else if (strcmp(type, "unsigned int") == 0) { return sizeof(unsigned int); } else if (strcmp(type, "unsigned long") == 0) { return sizeof(unsigned long); } else if (strcmp(type, "float") == 0) { return sizeof(float); } else if (strcmp(type, "double") == 0) { return sizeof(double); } else { return 1; } } int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) { if (strcmp(type, "uint8_t") == 0) { uint8_t val; memcpy(&val, ptr, sizeof(uint8_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "uint16_t") == 0) { uint16_t val; memcpy(&val, ptr, sizeof(uint16_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "uint32_t") == 0) { uint32_t val; memcpy(&val, ptr, sizeof(uint32_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int8_t") == 0) { int8_t val; memcpy(&val, ptr, sizeof(int8_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int16_t") == 0) { int16_t val; memcpy(&val, ptr, sizeof(int16_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int32_t") == 0) { int32_t val; memcpy(&val, ptr, sizeof(int32_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "char") == 0) { long val; memcpy(&val, ptr, sizeof(char)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "short") == 0) { short val; memcpy(&val, ptr, sizeof(short)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int") == 0) { int val; memcpy(&val, ptr, sizeof(int)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "long") == 0) { long val; memcpy(&val, ptr, sizeof(long)); *lval = val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned char") == 0) { unsigned char val; memcpy(&val, ptr, sizeof(unsigned char)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned short") == 0) { unsigned short val; memcpy(&val, ptr, sizeof(unsigned short)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned int") == 0) { unsigned int val; memcpy(&val, ptr, sizeof(unsigned int)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned long") == 0) { unsigned long val; memcpy(&val, ptr, sizeof(unsigned long)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "float") == 0) { float val; memcpy(&val, ptr, sizeof(float)); *dval = (double)val; return PRIMITIVE_FLOAT; } else if (strcmp(type, "double") == 0) { double val; memcpy(&val, ptr, sizeof(double)); *dval = val; return PRIMITIVE_FLOAT; } else { return PRIMITIVE_UNKNOWN; } } PyObject* valueFromScalar(char* type, char* ptr, int len) { long lval; double dval; int rval = memoryToPrimitive(type, ptr, &lval, &dval); switch(rval) { case PRIMITIVE_INTEGER: return PyInt_FromLong(lval); case PRIMITIVE_FLOAT: return PyFloat_FromDouble(dval); case PRIMITIVE_UNKNOWN: default: return PyString_FromStringAndSize(ptr, len); } } PyObject* listFromArray(char* type, char* ptr, int len) { long lval; double dval; int elementLen = lengthOfType(type); PyObject* list = PyList_New(0); //printf("Generating list of %s\n", type); for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) { PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen)); } return list; } %} %include mac.i %include radio.i %include packet.i %include SerialPacket.i %include SerialForwarder.i %include Throttle.i #if defined(SWIGPYTHON) %typemap(in) FILE * { if (!PyFile_Check($input)) { PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter."); return NULL; } $1 = PyFile_AsFile($input); } %typemap(out) variable_string_t { if ($1.isArray) { //printf("Generating array %s\n", $1.type); $result = listFromArray ($1.type, $1.ptr, $1.len); } else { //printf("Generating scalar %s\n", $1.type); $result = valueFromScalar($1.type, $1.ptr, $1.len); } if ($result == NULL) { PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable."); } } %typemap(in) nesc_app_t* { if (!PyList_Check($input)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size($input); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem($input, 3 * i); PyObject* array = PyList_GetItem($input, (3 * i) + 1); PyObject* format = PyList_GetItem($input, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } $1 = app; } } #endif typedef struct var_string { char* type; char* ptr; int len; int isArray; } variable_string_t; typedef struct nesc_app { int numVariables; char** variableNames; char** variableTypes; int* variableArray; } nesc_app_t; class Variable { public: Variable(char* name, char* format, int array, int mote); ~Variable(); variable_string_t getData(); }; class Mote { public: Mote(nesc_app_t* app); ~Mote(); unsigned long id(); long long int euid(); void setEuid(long long int id); long long int bootTime(); void bootAtTime(long long int time); bool isOn(); void turnOff(); void turnOn(); Variable* getVariable(char* name); void addNoiseTraceReading(int val); void createNoiseModel(); int generateNoise(int when); }; class Tossim { public: Tossim(nesc_app_t* app); ~Tossim(); void init(); long long int time(); long long int ticksPerSecond(); void setTime(long long int time); char* timeStr(); Mote* currentNode(); Mote* getNode(unsigned long nodeID); void setCurrentNode(unsigned long nodeID); void addChannel(char* channel, FILE* file); bool removeChannel(char* channel, FILE* file); void randomSeed(int seed); bool runNextEvent(); MAC* mac(); Radio* radio(); Packet* newPacket(); SerialPacket* newSerialPacket(); }; tinyos-2.1.2+dfsg/tos/lib/tossim/sf/tossim_wrap.cxx000066400000000000000000007526211207233610700223720ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * This file was automatically generated by SWIG (http://www.swig.org). * Version 1.3.31 * * This file is not intended to be easily readable and contains a number of * coding conventions designed to improve portability and efficiency. Do not make * changes to this file unless you know what you are doing--modify the SWIG * interface file instead. * ----------------------------------------------------------------------------- */ #define SWIGPYTHON #define SWIG_PYTHON_DIRECTOR_NO_VTABLE #ifdef __cplusplus template class SwigValueWrapper { T *tt; public: SwigValueWrapper() : tt(0) { } SwigValueWrapper(const SwigValueWrapper& rhs) : tt(new T(*rhs.tt)) { } SwigValueWrapper(const T& t) : tt(new T(t)) { } ~SwigValueWrapper() { delete tt; } SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; } operator T&() const { return *tt; } T *operator&() { return tt; } private: SwigValueWrapper& operator=(const SwigValueWrapper& rhs); }; #endif /* ----------------------------------------------------------------------------- * This section contains generic SWIG labels for method/variable * declarations/attributes, and other compiler dependent labels. * ----------------------------------------------------------------------------- */ /* template workaround for compilers that cannot correctly implement the C++ standard */ #ifndef SWIGTEMPLATEDISAMBIGUATOR # if defined(__SUNPRO_CC) # if (__SUNPRO_CC <= 0x560) # define SWIGTEMPLATEDISAMBIGUATOR template # else # define SWIGTEMPLATEDISAMBIGUATOR # endif # else # define SWIGTEMPLATEDISAMBIGUATOR # endif #endif /* inline attribute */ #ifndef SWIGINLINE # if defined(__cplusplus) || (defined(__GNUC__) && !defined(__STRICT_ANSI__)) # define SWIGINLINE inline # else # define SWIGINLINE # endif #endif /* attribute recognised by some compilers to avoid 'unused' warnings */ #ifndef SWIGUNUSED # if defined(__GNUC__) # if !(defined(__cplusplus)) || (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)) # define SWIGUNUSED __attribute__ ((__unused__)) # else # define SWIGUNUSED # endif # elif defined(__ICC) # define SWIGUNUSED __attribute__ ((__unused__)) # else # define SWIGUNUSED # endif #endif #ifndef SWIGUNUSEDPARM # ifdef __cplusplus # define SWIGUNUSEDPARM(p) # else # define SWIGUNUSEDPARM(p) p SWIGUNUSED # endif #endif /* internal SWIG method */ #ifndef SWIGINTERN # define SWIGINTERN static SWIGUNUSED #endif /* internal inline SWIG method */ #ifndef SWIGINTERNINLINE # define SWIGINTERNINLINE SWIGINTERN SWIGINLINE #endif /* exporting methods */ #if (__GNUC__ >= 4) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) # ifndef GCC_HASCLASSVISIBILITY # define GCC_HASCLASSVISIBILITY # endif #endif #ifndef SWIGEXPORT # if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__) # if defined(STATIC_LINKED) # define SWIGEXPORT # else # define SWIGEXPORT __declspec(dllexport) # endif # else # if defined(__GNUC__) && defined(GCC_HASCLASSVISIBILITY) # define SWIGEXPORT __attribute__ ((visibility("default"))) # else # define SWIGEXPORT # endif # endif #endif /* calling conventions for Windows */ #ifndef SWIGSTDCALL # if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__) # define SWIGSTDCALL __stdcall # else # define SWIGSTDCALL # endif #endif /* Deal with Microsoft's attempt at deprecating C standard runtime functions */ #if !defined(SWIG_NO_CRT_SECURE_NO_DEPRECATE) && defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE) # define _CRT_SECURE_NO_DEPRECATE #endif /* Python.h has to appear first */ #include /* ----------------------------------------------------------------------------- * swigrun.swg * * This file contains generic CAPI SWIG runtime support for pointer * type checking. * ----------------------------------------------------------------------------- */ /* This should only be incremented when either the layout of swig_type_info changes, or for whatever reason, the runtime changes incompatibly */ #define SWIG_RUNTIME_VERSION "3" /* define SWIG_TYPE_TABLE_NAME as "SWIG_TYPE_TABLE" */ #ifdef SWIG_TYPE_TABLE # define SWIG_QUOTE_STRING(x) #x # define SWIG_EXPAND_AND_QUOTE_STRING(x) SWIG_QUOTE_STRING(x) # define SWIG_TYPE_TABLE_NAME SWIG_EXPAND_AND_QUOTE_STRING(SWIG_TYPE_TABLE) #else # define SWIG_TYPE_TABLE_NAME #endif /* You can use the SWIGRUNTIME and SWIGRUNTIMEINLINE macros for creating a static or dynamic library from the swig runtime code. In 99.9% of the cases, swig just needs to declare them as 'static'. But only do this if is strictly necessary, ie, if you have problems with your compiler or so. */ #ifndef SWIGRUNTIME # define SWIGRUNTIME SWIGINTERN #endif #ifndef SWIGRUNTIMEINLINE # define SWIGRUNTIMEINLINE SWIGRUNTIME SWIGINLINE #endif /* Generic buffer size */ #ifndef SWIG_BUFFER_SIZE # define SWIG_BUFFER_SIZE 1024 #endif /* Flags for pointer conversions */ #define SWIG_POINTER_DISOWN 0x1 /* Flags for new pointer objects */ #define SWIG_POINTER_OWN 0x1 /* Flags/methods for returning states. The swig conversion methods, as ConvertPtr, return and integer that tells if the conversion was successful or not. And if not, an error code can be returned (see swigerrors.swg for the codes). Use the following macros/flags to set or process the returning states. In old swig versions, you usually write code as: if (SWIG_ConvertPtr(obj,vptr,ty.flags) != -1) { // success code } else { //fail code } Now you can be more explicit as: int res = SWIG_ConvertPtr(obj,vptr,ty.flags); if (SWIG_IsOK(res)) { // success code } else { // fail code } that seems to be the same, but now you can also do Type *ptr; int res = SWIG_ConvertPtr(obj,(void **)(&ptr),ty.flags); if (SWIG_IsOK(res)) { // success code if (SWIG_IsNewObj(res) { ... delete *ptr; } else { ... } } else { // fail code } I.e., now SWIG_ConvertPtr can return new objects and you can identify the case and take care of the deallocation. Of course that requires also to SWIG_ConvertPtr to return new result values, as int SWIG_ConvertPtr(obj, ptr,...) { if () { if () { *ptr = ; return SWIG_NEWOBJ; } else { *ptr = ; return SWIG_OLDOBJ; } } else { return SWIG_BADOBJ; } } Of course, returning the plain '0(success)/-1(fail)' still works, but you can be more explicit by returning SWIG_BADOBJ, SWIG_ERROR or any of the swig errors code. Finally, if the SWIG_CASTRANK_MODE is enabled, the result code allows to return the 'cast rank', for example, if you have this int food(double) int fooi(int); and you call food(1) // cast rank '1' (1 -> 1.0) fooi(1) // cast rank '0' just use the SWIG_AddCast()/SWIG_CheckState() */ #define SWIG_OK (0) #define SWIG_ERROR (-1) #define SWIG_IsOK(r) (r >= 0) #define SWIG_ArgError(r) ((r != SWIG_ERROR) ? r : SWIG_TypeError) /* The CastRankLimit says how many bits are used for the cast rank */ #define SWIG_CASTRANKLIMIT (1 << 8) /* The NewMask denotes the object was created (using new/malloc) */ #define SWIG_NEWOBJMASK (SWIG_CASTRANKLIMIT << 1) /* The TmpMask is for in/out typemaps that use temporal objects */ #define SWIG_TMPOBJMASK (SWIG_NEWOBJMASK << 1) /* Simple returning values */ #define SWIG_BADOBJ (SWIG_ERROR) #define SWIG_OLDOBJ (SWIG_OK) #define SWIG_NEWOBJ (SWIG_OK | SWIG_NEWOBJMASK) #define SWIG_TMPOBJ (SWIG_OK | SWIG_TMPOBJMASK) /* Check, add and del mask methods */ #define SWIG_AddNewMask(r) (SWIG_IsOK(r) ? (r | SWIG_NEWOBJMASK) : r) #define SWIG_DelNewMask(r) (SWIG_IsOK(r) ? (r & ~SWIG_NEWOBJMASK) : r) #define SWIG_IsNewObj(r) (SWIG_IsOK(r) && (r & SWIG_NEWOBJMASK)) #define SWIG_AddTmpMask(r) (SWIG_IsOK(r) ? (r | SWIG_TMPOBJMASK) : r) #define SWIG_DelTmpMask(r) (SWIG_IsOK(r) ? (r & ~SWIG_TMPOBJMASK) : r) #define SWIG_IsTmpObj(r) (SWIG_IsOK(r) && (r & SWIG_TMPOBJMASK)) /* Cast-Rank Mode */ #if defined(SWIG_CASTRANK_MODE) # ifndef SWIG_TypeRank # define SWIG_TypeRank unsigned long # endif # ifndef SWIG_MAXCASTRANK /* Default cast allowed */ # define SWIG_MAXCASTRANK (2) # endif # define SWIG_CASTRANKMASK ((SWIG_CASTRANKLIMIT) -1) # define SWIG_CastRank(r) (r & SWIG_CASTRANKMASK) SWIGINTERNINLINE int SWIG_AddCast(int r) { return SWIG_IsOK(r) ? ((SWIG_CastRank(r) < SWIG_MAXCASTRANK) ? (r + 1) : SWIG_ERROR) : r; } SWIGINTERNINLINE int SWIG_CheckState(int r) { return SWIG_IsOK(r) ? SWIG_CastRank(r) + 1 : 0; } #else /* no cast-rank mode */ # define SWIG_AddCast # define SWIG_CheckState(r) (SWIG_IsOK(r) ? 1 : 0) #endif #include #ifdef __cplusplus extern "C" { #endif typedef void *(*swig_converter_func)(void *); typedef struct swig_type_info *(*swig_dycast_func)(void **); /* Structure to store inforomation on one type */ typedef struct swig_type_info { const char *name; /* mangled name of this type */ const char *str; /* human readable name of this type */ swig_dycast_func dcast; /* dynamic cast function down a hierarchy */ struct swig_cast_info *cast; /* linked list of types that can cast into this type */ void *clientdata; /* language specific type data */ int owndata; /* flag if the structure owns the clientdata */ } swig_type_info; /* Structure to store a type and conversion function used for casting */ typedef struct swig_cast_info { swig_type_info *type; /* pointer to type that is equivalent to this type */ swig_converter_func converter; /* function to cast the void pointers */ struct swig_cast_info *next; /* pointer to next cast in linked list */ struct swig_cast_info *prev; /* pointer to the previous cast */ } swig_cast_info; /* Structure used to store module information * Each module generates one structure like this, and the runtime collects * all of these structures and stores them in a circularly linked list.*/ typedef struct swig_module_info { swig_type_info **types; /* Array of pointers to swig_type_info structures that are in this module */ size_t size; /* Number of types in this module */ struct swig_module_info *next; /* Pointer to next element in circularly linked list */ swig_type_info **type_initial; /* Array of initially generated type structures */ swig_cast_info **cast_initial; /* Array of initially generated casting structures */ void *clientdata; /* Language specific module data */ } swig_module_info; /* Compare two type names skipping the space characters, therefore "char*" == "char *" and "Class" == "Class", etc. Return 0 when the two name types are equivalent, as in strncmp, but skipping ' '. */ SWIGRUNTIME int SWIG_TypeNameComp(const char *f1, const char *l1, const char *f2, const char *l2) { for (;(f1 != l1) && (f2 != l2); ++f1, ++f2) { while ((*f1 == ' ') && (f1 != l1)) ++f1; while ((*f2 == ' ') && (f2 != l2)) ++f2; if (*f1 != *f2) return (*f1 > *f2) ? 1 : -1; } return (l1 - f1) - (l2 - f2); } /* Check type equivalence in a name list like ||... Return 0 if not equal, 1 if equal */ SWIGRUNTIME int SWIG_TypeEquiv(const char *nb, const char *tb) { int equiv = 0; const char* te = tb + strlen(tb); const char* ne = nb; while (!equiv && *ne) { for (nb = ne; *ne; ++ne) { if (*ne == '|') break; } equiv = (SWIG_TypeNameComp(nb, ne, tb, te) == 0) ? 1 : 0; if (*ne) ++ne; } return equiv; } /* Check type equivalence in a name list like ||... Return 0 if equal, -1 if nb < tb, 1 if nb > tb */ SWIGRUNTIME int SWIG_TypeCompare(const char *nb, const char *tb) { int equiv = 0; const char* te = tb + strlen(tb); const char* ne = nb; while (!equiv && *ne) { for (nb = ne; *ne; ++ne) { if (*ne == '|') break; } equiv = (SWIG_TypeNameComp(nb, ne, tb, te) == 0) ? 1 : 0; if (*ne) ++ne; } return equiv; } /* think of this as a c++ template<> or a scheme macro */ #define SWIG_TypeCheck_Template(comparison, ty) \ if (ty) { \ swig_cast_info *iter = ty->cast; \ while (iter) { \ if (comparison) { \ if (iter == ty->cast) return iter; \ /* Move iter to the top of the linked list */ \ iter->prev->next = iter->next; \ if (iter->next) \ iter->next->prev = iter->prev; \ iter->next = ty->cast; \ iter->prev = 0; \ if (ty->cast) ty->cast->prev = iter; \ ty->cast = iter; \ return iter; \ } \ iter = iter->next; \ } \ } \ return 0 /* Check the typename */ SWIGRUNTIME swig_cast_info * SWIG_TypeCheck(const char *c, swig_type_info *ty) { SWIG_TypeCheck_Template(strcmp(iter->type->name, c) == 0, ty); } /* Same as previous function, except strcmp is replaced with a pointer comparison */ SWIGRUNTIME swig_cast_info * SWIG_TypeCheckStruct(swig_type_info *from, swig_type_info *into) { SWIG_TypeCheck_Template(iter->type == from, into); } /* Cast a pointer up an inheritance hierarchy */ SWIGRUNTIMEINLINE void * SWIG_TypeCast(swig_cast_info *ty, void *ptr) { return ((!ty) || (!ty->converter)) ? ptr : (*ty->converter)(ptr); } /* Dynamic pointer casting. Down an inheritance hierarchy */ SWIGRUNTIME swig_type_info * SWIG_TypeDynamicCast(swig_type_info *ty, void **ptr) { swig_type_info *lastty = ty; if (!ty || !ty->dcast) return ty; while (ty && (ty->dcast)) { ty = (*ty->dcast)(ptr); if (ty) lastty = ty; } return lastty; } /* Return the name associated with this type */ SWIGRUNTIMEINLINE const char * SWIG_TypeName(const swig_type_info *ty) { return ty->name; } /* Return the pretty name associated with this type, that is an unmangled type name in a form presentable to the user. */ SWIGRUNTIME const char * SWIG_TypePrettyName(const swig_type_info *type) { /* The "str" field contains the equivalent pretty names of the type, separated by vertical-bar characters. We choose to print the last name, as it is often (?) the most specific. */ if (!type) return NULL; if (type->str != NULL) { const char *last_name = type->str; const char *s; for (s = type->str; *s; s++) if (*s == '|') last_name = s+1; return last_name; } else return type->name; } /* Set the clientdata field for a type */ SWIGRUNTIME void SWIG_TypeClientData(swig_type_info *ti, void *clientdata) { swig_cast_info *cast = ti->cast; /* if (ti->clientdata == clientdata) return; */ ti->clientdata = clientdata; while (cast) { if (!cast->converter) { swig_type_info *tc = cast->type; if (!tc->clientdata) { SWIG_TypeClientData(tc, clientdata); } } cast = cast->next; } } SWIGRUNTIME void SWIG_TypeNewClientData(swig_type_info *ti, void *clientdata) { SWIG_TypeClientData(ti, clientdata); ti->owndata = 1; } /* Search for a swig_type_info structure only by mangled name Search is a O(log #types) We start searching at module start, and finish searching when start == end. Note: if start == end at the beginning of the function, we go all the way around the circular list. */ SWIGRUNTIME swig_type_info * SWIG_MangledTypeQueryModule(swig_module_info *start, swig_module_info *end, const char *name) { swig_module_info *iter = start; do { if (iter->size) { register size_t l = 0; register size_t r = iter->size - 1; do { /* since l+r >= 0, we can (>> 1) instead (/ 2) */ register size_t i = (l + r) >> 1; const char *iname = iter->types[i]->name; if (iname) { register int compare = strcmp(name, iname); if (compare == 0) { return iter->types[i]; } else if (compare < 0) { if (i) { r = i - 1; } else { break; } } else if (compare > 0) { l = i + 1; } } else { break; /* should never happen */ } } while (l <= r); } iter = iter->next; } while (iter != end); return 0; } /* Search for a swig_type_info structure for either a mangled name or a human readable name. It first searches the mangled names of the types, which is a O(log #types) If a type is not found it then searches the human readable names, which is O(#types). We start searching at module start, and finish searching when start == end. Note: if start == end at the beginning of the function, we go all the way around the circular list. */ SWIGRUNTIME swig_type_info * SWIG_TypeQueryModule(swig_module_info *start, swig_module_info *end, const char *name) { /* STEP 1: Search the name field using binary search */ swig_type_info *ret = SWIG_MangledTypeQueryModule(start, end, name); if (ret) { return ret; } else { /* STEP 2: If the type hasn't been found, do a complete search of the str field (the human readable name) */ swig_module_info *iter = start; do { register size_t i = 0; for (; i < iter->size; ++i) { if (iter->types[i]->str && (SWIG_TypeEquiv(iter->types[i]->str, name))) return iter->types[i]; } iter = iter->next; } while (iter != end); } /* neither found a match */ return 0; } /* Pack binary data into a string */ SWIGRUNTIME char * SWIG_PackData(char *c, void *ptr, size_t sz) { static const char hex[17] = "0123456789abcdef"; register const unsigned char *u = (unsigned char *) ptr; register const unsigned char *eu = u + sz; for (; u != eu; ++u) { register unsigned char uu = *u; *(c++) = hex[(uu & 0xf0) >> 4]; *(c++) = hex[uu & 0xf]; } return c; } /* Unpack binary data from a string */ SWIGRUNTIME const char * SWIG_UnpackData(const char *c, void *ptr, size_t sz) { register unsigned char *u = (unsigned char *) ptr; register const unsigned char *eu = u + sz; for (; u != eu; ++u) { register char d = *(c++); register unsigned char uu; if ((d >= '0') && (d <= '9')) uu = ((d - '0') << 4); else if ((d >= 'a') && (d <= 'f')) uu = ((d - ('a'-10)) << 4); else return (char *) 0; d = *(c++); if ((d >= '0') && (d <= '9')) uu |= (d - '0'); else if ((d >= 'a') && (d <= 'f')) uu |= (d - ('a'-10)); else return (char *) 0; *u = uu; } return c; } /* Pack 'void *' into a string buffer. */ SWIGRUNTIME char * SWIG_PackVoidPtr(char *buff, void *ptr, const char *name, size_t bsz) { char *r = buff; if ((2*sizeof(void *) + 2) > bsz) return 0; *(r++) = '_'; r = SWIG_PackData(r,&ptr,sizeof(void *)); if (strlen(name) + 1 > (bsz - (r - buff))) return 0; strcpy(r,name); return buff; } SWIGRUNTIME const char * SWIG_UnpackVoidPtr(const char *c, void **ptr, const char *name) { if (*c != '_') { if (strcmp(c,"NULL") == 0) { *ptr = (void *) 0; return name; } else { return 0; } } return SWIG_UnpackData(++c,ptr,sizeof(void *)); } SWIGRUNTIME char * SWIG_PackDataName(char *buff, void *ptr, size_t sz, const char *name, size_t bsz) { char *r = buff; size_t lname = (name ? strlen(name) : 0); if ((2*sz + 2 + lname) > bsz) return 0; *(r++) = '_'; r = SWIG_PackData(r,ptr,sz); if (lname) { strncpy(r,name,lname+1); } else { *r = 0; } return buff; } SWIGRUNTIME const char * SWIG_UnpackDataName(const char *c, void *ptr, size_t sz, const char *name) { if (*c != '_') { if (strcmp(c,"NULL") == 0) { memset(ptr,0,sz); return name; } else { return 0; } } return SWIG_UnpackData(++c,ptr,sz); } #ifdef __cplusplus } #endif /* Errors in SWIG */ #define SWIG_UnknownError -1 #define SWIG_IOError -2 #define SWIG_RuntimeError -3 #define SWIG_IndexError -4 #define SWIG_TypeError -5 #define SWIG_DivisionByZero -6 #define SWIG_OverflowError -7 #define SWIG_SyntaxError -8 #define SWIG_ValueError -9 #define SWIG_SystemError -10 #define SWIG_AttributeError -11 #define SWIG_MemoryError -12 #define SWIG_NullReferenceError -13 /* Add PyOS_snprintf for old Pythons */ #if PY_VERSION_HEX < 0x02020000 # if defined(_MSC_VER) || defined(__BORLANDC__) || defined(_WATCOM) # define PyOS_snprintf _snprintf # else # define PyOS_snprintf snprintf # endif #endif /* A crude PyString_FromFormat implementation for old Pythons */ #if PY_VERSION_HEX < 0x02020000 #ifndef SWIG_PYBUFFER_SIZE # define SWIG_PYBUFFER_SIZE 1024 #endif static PyObject * PyString_FromFormat(const char *fmt, ...) { va_list ap; char buf[SWIG_PYBUFFER_SIZE * 2]; int res; va_start(ap, fmt); res = vsnprintf(buf, sizeof(buf), fmt, ap); va_end(ap); return (res < 0 || res >= (int)sizeof(buf)) ? 0 : PyString_FromString(buf); } #endif /* Add PyObject_Del for old Pythons */ #if PY_VERSION_HEX < 0x01060000 # define PyObject_Del(op) PyMem_DEL((op)) #endif #ifndef PyObject_DEL # define PyObject_DEL PyObject_Del #endif /* A crude PyExc_StopIteration exception for old Pythons */ #if PY_VERSION_HEX < 0x02020000 # ifndef PyExc_StopIteration # define PyExc_StopIteration PyExc_RuntimeError # endif # ifndef PyObject_GenericGetAttr # define PyObject_GenericGetAttr 0 # endif #endif /* Py_NotImplemented is defined in 2.1 and up. */ #if PY_VERSION_HEX < 0x02010000 # ifndef Py_NotImplemented # define Py_NotImplemented PyExc_RuntimeError # endif #endif /* A crude PyString_AsStringAndSize implementation for old Pythons */ #if PY_VERSION_HEX < 0x02010000 # ifndef PyString_AsStringAndSize # define PyString_AsStringAndSize(obj, s, len) {*s = PyString_AsString(obj); *len = *s ? strlen(*s) : 0;} # endif #endif /* PySequence_Size for old Pythons */ #if PY_VERSION_HEX < 0x02000000 # ifndef PySequence_Size # define PySequence_Size PySequence_Length # endif #endif /* PyBool_FromLong for old Pythons */ #if PY_VERSION_HEX < 0x02030000 static PyObject *PyBool_FromLong(long ok) { PyObject *result = ok ? Py_True : Py_False; Py_INCREF(result); return result; } #endif /* Py_ssize_t for old Pythons */ /* This code is as recommended by: */ /* http://www.python.org/dev/peps/pep-0353/#conversion-guidelines */ #if PY_VERSION_HEX < 0x02050000 && !defined(PY_SSIZE_T_MIN) typedef int Py_ssize_t; # define PY_SSIZE_T_MAX INT_MAX # define PY_SSIZE_T_MIN INT_MIN #endif /* ----------------------------------------------------------------------------- * error manipulation * ----------------------------------------------------------------------------- */ SWIGRUNTIME PyObject* SWIG_Python_ErrorType(int code) { PyObject* type = 0; switch(code) { case SWIG_MemoryError: type = PyExc_MemoryError; break; case SWIG_IOError: type = PyExc_IOError; break; case SWIG_RuntimeError: type = PyExc_RuntimeError; break; case SWIG_IndexError: type = PyExc_IndexError; break; case SWIG_TypeError: type = PyExc_TypeError; break; case SWIG_DivisionByZero: type = PyExc_ZeroDivisionError; break; case SWIG_OverflowError: type = PyExc_OverflowError; break; case SWIG_SyntaxError: type = PyExc_SyntaxError; break; case SWIG_ValueError: type = PyExc_ValueError; break; case SWIG_SystemError: type = PyExc_SystemError; break; case SWIG_AttributeError: type = PyExc_AttributeError; break; default: type = PyExc_RuntimeError; } return type; } SWIGRUNTIME void SWIG_Python_AddErrorMsg(const char* mesg) { PyObject *type = 0; PyObject *value = 0; PyObject *traceback = 0; if (PyErr_Occurred()) PyErr_Fetch(&type, &value, &traceback); if (value) { PyObject *old_str = PyObject_Str(value); PyErr_Clear(); Py_XINCREF(type); PyErr_Format(type, "%s %s", PyString_AsString(old_str), mesg); Py_DECREF(old_str); Py_DECREF(value); } else { PyErr_Format(PyExc_RuntimeError, mesg); } } #if defined(SWIG_PYTHON_NO_THREADS) # if defined(SWIG_PYTHON_THREADS) # undef SWIG_PYTHON_THREADS # endif #endif #if defined(SWIG_PYTHON_THREADS) /* Threading support is enabled */ # if !defined(SWIG_PYTHON_USE_GIL) && !defined(SWIG_PYTHON_NO_USE_GIL) # if (PY_VERSION_HEX >= 0x02030000) /* For 2.3 or later, use the PyGILState calls */ # define SWIG_PYTHON_USE_GIL # endif # endif # if defined(SWIG_PYTHON_USE_GIL) /* Use PyGILState threads calls */ # ifndef SWIG_PYTHON_INITIALIZE_THREADS # define SWIG_PYTHON_INITIALIZE_THREADS PyEval_InitThreads() # endif # ifdef __cplusplus /* C++ code */ class SWIG_Python_Thread_Block { bool status; PyGILState_STATE state; public: void end() { if (status) { PyGILState_Release(state); status = false;} } SWIG_Python_Thread_Block() : status(true), state(PyGILState_Ensure()) {} ~SWIG_Python_Thread_Block() { end(); } }; class SWIG_Python_Thread_Allow { bool status; PyThreadState *save; public: void end() { if (status) { PyEval_RestoreThread(save); status = false; }} SWIG_Python_Thread_Allow() : status(true), save(PyEval_SaveThread()) {} ~SWIG_Python_Thread_Allow() { end(); } }; # define SWIG_PYTHON_THREAD_BEGIN_BLOCK SWIG_Python_Thread_Block _swig_thread_block # define SWIG_PYTHON_THREAD_END_BLOCK _swig_thread_block.end() # define SWIG_PYTHON_THREAD_BEGIN_ALLOW SWIG_Python_Thread_Allow _swig_thread_allow # define SWIG_PYTHON_THREAD_END_ALLOW _swig_thread_allow.end() # else /* C code */ # define SWIG_PYTHON_THREAD_BEGIN_BLOCK PyGILState_STATE _swig_thread_block = PyGILState_Ensure() # define SWIG_PYTHON_THREAD_END_BLOCK PyGILState_Release(_swig_thread_block) # define SWIG_PYTHON_THREAD_BEGIN_ALLOW PyThreadState *_swig_thread_allow = PyEval_SaveThread() # define SWIG_PYTHON_THREAD_END_ALLOW PyEval_RestoreThread(_swig_thread_allow) # endif # else /* Old thread way, not implemented, user must provide it */ # if !defined(SWIG_PYTHON_INITIALIZE_THREADS) # define SWIG_PYTHON_INITIALIZE_THREADS # endif # if !defined(SWIG_PYTHON_THREAD_BEGIN_BLOCK) # define SWIG_PYTHON_THREAD_BEGIN_BLOCK # endif # if !defined(SWIG_PYTHON_THREAD_END_BLOCK) # define SWIG_PYTHON_THREAD_END_BLOCK # endif # if !defined(SWIG_PYTHON_THREAD_BEGIN_ALLOW) # define SWIG_PYTHON_THREAD_BEGIN_ALLOW # endif # if !defined(SWIG_PYTHON_THREAD_END_ALLOW) # define SWIG_PYTHON_THREAD_END_ALLOW # endif # endif #else /* No thread support */ # define SWIG_PYTHON_INITIALIZE_THREADS # define SWIG_PYTHON_THREAD_BEGIN_BLOCK # define SWIG_PYTHON_THREAD_END_BLOCK # define SWIG_PYTHON_THREAD_BEGIN_ALLOW # define SWIG_PYTHON_THREAD_END_ALLOW #endif /* ----------------------------------------------------------------------------- * Python API portion that goes into the runtime * ----------------------------------------------------------------------------- */ #ifdef __cplusplus extern "C" { #if 0 } /* cc-mode */ #endif #endif /* ----------------------------------------------------------------------------- * Constant declarations * ----------------------------------------------------------------------------- */ /* Constant Types */ #define SWIG_PY_POINTER 4 #define SWIG_PY_BINARY 5 /* Constant information structure */ typedef struct swig_const_info { int type; char *name; long lvalue; double dvalue; void *pvalue; swig_type_info **ptype; } swig_const_info; #ifdef __cplusplus #if 0 { /* cc-mode */ #endif } #endif /* ----------------------------------------------------------------------------- * See the LICENSE file for information on copyright, usage and redistribution * of SWIG, and the README file for authors - http://www.swig.org/release.html. * * pyrun.swg * * This file contains the runtime support for Python modules * and includes code for managing global variables and pointer * type checking. * * ----------------------------------------------------------------------------- */ /* Common SWIG API */ /* for raw pointers */ #define SWIG_Python_ConvertPtr(obj, pptr, type, flags) SWIG_Python_ConvertPtrAndOwn(obj, pptr, type, flags, 0) #define SWIG_ConvertPtr(obj, pptr, type, flags) SWIG_Python_ConvertPtr(obj, pptr, type, flags) #define SWIG_ConvertPtrAndOwn(obj,pptr,type,flags,own) SWIG_Python_ConvertPtrAndOwn(obj, pptr, type, flags, own) #define SWIG_NewPointerObj(ptr, type, flags) SWIG_Python_NewPointerObj(ptr, type, flags) #define SWIG_CheckImplicit(ty) SWIG_Python_CheckImplicit(ty) #define SWIG_AcquirePtr(ptr, src) SWIG_Python_AcquirePtr(ptr, src) #define swig_owntype int /* for raw packed data */ #define SWIG_ConvertPacked(obj, ptr, sz, ty) SWIG_Python_ConvertPacked(obj, ptr, sz, ty) #define SWIG_NewPackedObj(ptr, sz, type) SWIG_Python_NewPackedObj(ptr, sz, type) /* for class or struct pointers */ #define SWIG_ConvertInstance(obj, pptr, type, flags) SWIG_ConvertPtr(obj, pptr, type, flags) #define SWIG_NewInstanceObj(ptr, type, flags) SWIG_NewPointerObj(ptr, type, flags) /* for C or C++ function pointers */ #define SWIG_ConvertFunctionPtr(obj, pptr, type) SWIG_Python_ConvertFunctionPtr(obj, pptr, type) #define SWIG_NewFunctionPtrObj(ptr, type) SWIG_Python_NewPointerObj(ptr, type, 0) /* for C++ member pointers, ie, member methods */ #define SWIG_ConvertMember(obj, ptr, sz, ty) SWIG_Python_ConvertPacked(obj, ptr, sz, ty) #define SWIG_NewMemberObj(ptr, sz, type) SWIG_Python_NewPackedObj(ptr, sz, type) /* Runtime API */ #define SWIG_GetModule(clientdata) SWIG_Python_GetModule() #define SWIG_SetModule(clientdata, pointer) SWIG_Python_SetModule(pointer) #define SWIG_NewClientData(obj) PySwigClientData_New(obj) #define SWIG_SetErrorObj SWIG_Python_SetErrorObj #define SWIG_SetErrorMsg SWIG_Python_SetErrorMsg #define SWIG_ErrorType(code) SWIG_Python_ErrorType(code) #define SWIG_Error(code, msg) SWIG_Python_SetErrorMsg(SWIG_ErrorType(code), msg) #define SWIG_fail goto fail /* Runtime API implementation */ /* Error manipulation */ SWIGINTERN void SWIG_Python_SetErrorObj(PyObject *errtype, PyObject *obj) { SWIG_PYTHON_THREAD_BEGIN_BLOCK; PyErr_SetObject(errtype, obj); Py_DECREF(obj); SWIG_PYTHON_THREAD_END_BLOCK; } SWIGINTERN void SWIG_Python_SetErrorMsg(PyObject *errtype, const char *msg) { SWIG_PYTHON_THREAD_BEGIN_BLOCK; PyErr_SetString(errtype, (char *) msg); SWIG_PYTHON_THREAD_END_BLOCK; } #define SWIG_Python_Raise(obj, type, desc) SWIG_Python_SetErrorObj(SWIG_Python_ExceptionType(desc), obj) /* Set a constant value */ SWIGINTERN void SWIG_Python_SetConstant(PyObject *d, const char *name, PyObject *obj) { PyDict_SetItemString(d, (char*) name, obj); Py_DECREF(obj); } /* Append a value to the result obj */ SWIGINTERN PyObject* SWIG_Python_AppendOutput(PyObject* result, PyObject* obj) { #if !defined(SWIG_PYTHON_OUTPUT_TUPLE) if (!result) { result = obj; } else if (result == Py_None) { Py_DECREF(result); result = obj; } else { if (!PyList_Check(result)) { PyObject *o2 = result; result = PyList_New(1); PyList_SetItem(result, 0, o2); } PyList_Append(result,obj); Py_DECREF(obj); } return result; #else PyObject* o2; PyObject* o3; if (!result) { result = obj; } else if (result == Py_None) { Py_DECREF(result); result = obj; } else { if (!PyTuple_Check(result)) { o2 = result; result = PyTuple_New(1); PyTuple_SET_ITEM(result, 0, o2); } o3 = PyTuple_New(1); PyTuple_SET_ITEM(o3, 0, obj); o2 = result; result = PySequence_Concat(o2, o3); Py_DECREF(o2); Py_DECREF(o3); } return result; #endif } /* Unpack the argument tuple */ SWIGINTERN int SWIG_Python_UnpackTuple(PyObject *args, const char *name, int min, int max, PyObject **objs) { if (!args) { if (!min && !max) { return 1; } else { PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got none", name, (min == max ? "" : "at least "), min); return 0; } } if (!PyTuple_Check(args)) { PyErr_SetString(PyExc_SystemError, "UnpackTuple() argument list is not a tuple"); return 0; } else { register int l = PyTuple_GET_SIZE(args); if (l < min) { PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got %d", name, (min == max ? "" : "at least "), min, l); return 0; } else if (l > max) { PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got %d", name, (min == max ? "" : "at most "), max, l); return 0; } else { register int i; for (i = 0; i < l; ++i) { objs[i] = PyTuple_GET_ITEM(args, i); } for (; l < max; ++l) { objs[l] = 0; } return i + 1; } } } /* A functor is a function object with one single object argument */ #if PY_VERSION_HEX >= 0x02020000 #define SWIG_Python_CallFunctor(functor, obj) PyObject_CallFunctionObjArgs(functor, obj, NULL); #else #define SWIG_Python_CallFunctor(functor, obj) PyObject_CallFunction(functor, "O", obj); #endif /* Helper for static pointer initialization for both C and C++ code, for example static PyObject *SWIG_STATIC_POINTER(MyVar) = NewSomething(...); */ #ifdef __cplusplus #define SWIG_STATIC_POINTER(var) var #else #define SWIG_STATIC_POINTER(var) var = 0; if (!var) var #endif /* ----------------------------------------------------------------------------- * Pointer declarations * ----------------------------------------------------------------------------- */ /* Flags for new pointer objects */ #define SWIG_POINTER_NOSHADOW (SWIG_POINTER_OWN << 1) #define SWIG_POINTER_NEW (SWIG_POINTER_NOSHADOW | SWIG_POINTER_OWN) #define SWIG_POINTER_IMPLICIT_CONV (SWIG_POINTER_DISOWN << 1) #ifdef __cplusplus extern "C" { #if 0 } /* cc-mode */ #endif #endif /* How to access Py_None */ #if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__) # ifndef SWIG_PYTHON_NO_BUILD_NONE # ifndef SWIG_PYTHON_BUILD_NONE # define SWIG_PYTHON_BUILD_NONE # endif # endif #endif #ifdef SWIG_PYTHON_BUILD_NONE # ifdef Py_None # undef Py_None # define Py_None SWIG_Py_None() # endif SWIGRUNTIMEINLINE PyObject * _SWIG_Py_None(void) { PyObject *none = Py_BuildValue((char*)""); Py_DECREF(none); return none; } SWIGRUNTIME PyObject * SWIG_Py_None(void) { static PyObject *SWIG_STATIC_POINTER(none) = _SWIG_Py_None(); return none; } #endif /* The python void return value */ SWIGRUNTIMEINLINE PyObject * SWIG_Py_Void(void) { PyObject *none = Py_None; Py_INCREF(none); return none; } /* PySwigClientData */ typedef struct { PyObject *klass; PyObject *newraw; PyObject *newargs; PyObject *destroy; int delargs; int implicitconv; } PySwigClientData; SWIGRUNTIMEINLINE int SWIG_Python_CheckImplicit(swig_type_info *ty) { PySwigClientData *data = (PySwigClientData *)ty->clientdata; return data ? data->implicitconv : 0; } SWIGRUNTIMEINLINE PyObject * SWIG_Python_ExceptionType(swig_type_info *desc) { PySwigClientData *data = desc ? (PySwigClientData *) desc->clientdata : 0; PyObject *klass = data ? data->klass : 0; return (klass ? klass : PyExc_RuntimeError); } SWIGRUNTIME PySwigClientData * PySwigClientData_New(PyObject* obj) { if (!obj) { return 0; } else { PySwigClientData *data = (PySwigClientData *)malloc(sizeof(PySwigClientData)); /* the klass element */ data->klass = obj; Py_INCREF(data->klass); /* the newraw method and newargs arguments used to create a new raw instance */ if (PyClass_Check(obj)) { data->newraw = 0; data->newargs = obj; Py_INCREF(obj); } else { #if (PY_VERSION_HEX < 0x02020000) data->newraw = 0; #else data->newraw = PyObject_GetAttrString(data->klass, (char *)"__new__"); #endif if (data->newraw) { Py_INCREF(data->newraw); data->newargs = PyTuple_New(1); PyTuple_SetItem(data->newargs, 0, obj); } else { data->newargs = obj; } Py_INCREF(data->newargs); } /* the destroy method, aka as the C++ delete method */ data->destroy = PyObject_GetAttrString(data->klass, (char *)"__swig_destroy__"); if (PyErr_Occurred()) { PyErr_Clear(); data->destroy = 0; } if (data->destroy) { int flags; Py_INCREF(data->destroy); flags = PyCFunction_GET_FLAGS(data->destroy); #ifdef METH_O data->delargs = !(flags & (METH_O)); #else data->delargs = 0; #endif } else { data->delargs = 0; } data->implicitconv = 0; return data; } } SWIGRUNTIME void PySwigClientData_Del(PySwigClientData* data) { Py_XDECREF(data->newraw); Py_XDECREF(data->newargs); Py_XDECREF(data->destroy); } /* =============== PySwigObject =====================*/ typedef struct { PyObject_HEAD void *ptr; swig_type_info *ty; int own; PyObject *next; } PySwigObject; SWIGRUNTIME PyObject * PySwigObject_long(PySwigObject *v) { return PyLong_FromVoidPtr(v->ptr); } SWIGRUNTIME PyObject * PySwigObject_format(const char* fmt, PySwigObject *v) { PyObject *res = NULL; PyObject *args = PyTuple_New(1); if (args) { if (PyTuple_SetItem(args, 0, PySwigObject_long(v)) == 0) { PyObject *ofmt = PyString_FromString(fmt); if (ofmt) { res = PyString_Format(ofmt,args); Py_DECREF(ofmt); } Py_DECREF(args); } } return res; } SWIGRUNTIME PyObject * PySwigObject_oct(PySwigObject *v) { return PySwigObject_format("%o",v); } SWIGRUNTIME PyObject * PySwigObject_hex(PySwigObject *v) { return PySwigObject_format("%x",v); } SWIGRUNTIME PyObject * #ifdef METH_NOARGS PySwigObject_repr(PySwigObject *v) #else PySwigObject_repr(PySwigObject *v, PyObject *args) #endif { const char *name = SWIG_TypePrettyName(v->ty); PyObject *hex = PySwigObject_hex(v); PyObject *repr = PyString_FromFormat("", name, PyString_AsString(hex)); Py_DECREF(hex); if (v->next) { #ifdef METH_NOARGS PyObject *nrep = PySwigObject_repr((PySwigObject *)v->next); #else PyObject *nrep = PySwigObject_repr((PySwigObject *)v->next, args); #endif PyString_ConcatAndDel(&repr,nrep); } return repr; } SWIGRUNTIME int PySwigObject_print(PySwigObject *v, FILE *fp, int SWIGUNUSEDPARM(flags)) { #ifdef METH_NOARGS PyObject *repr = PySwigObject_repr(v); #else PyObject *repr = PySwigObject_repr(v, NULL); #endif if (repr) { fputs(PyString_AsString(repr), fp); Py_DECREF(repr); return 0; } else { return 1; } } SWIGRUNTIME PyObject * PySwigObject_str(PySwigObject *v) { char result[SWIG_BUFFER_SIZE]; return SWIG_PackVoidPtr(result, v->ptr, v->ty->name, sizeof(result)) ? PyString_FromString(result) : 0; } SWIGRUNTIME int PySwigObject_compare(PySwigObject *v, PySwigObject *w) { void *i = v->ptr; void *j = w->ptr; return (i < j) ? -1 : ((i > j) ? 1 : 0); } SWIGRUNTIME PyTypeObject* _PySwigObject_type(void); SWIGRUNTIME PyTypeObject* PySwigObject_type(void) { static PyTypeObject *SWIG_STATIC_POINTER(type) = _PySwigObject_type(); return type; } SWIGRUNTIMEINLINE int PySwigObject_Check(PyObject *op) { return ((op)->ob_type == PySwigObject_type()) || (strcmp((op)->ob_type->tp_name,"PySwigObject") == 0); } SWIGRUNTIME PyObject * PySwigObject_New(void *ptr, swig_type_info *ty, int own); SWIGRUNTIME void PySwigObject_dealloc(PyObject *v) { PySwigObject *sobj = (PySwigObject *) v; PyObject *next = sobj->next; if (sobj->own) { swig_type_info *ty = sobj->ty; PySwigClientData *data = ty ? (PySwigClientData *) ty->clientdata : 0; PyObject *destroy = data ? data->destroy : 0; if (destroy) { /* destroy is always a VARARGS method */ PyObject *res; if (data->delargs) { /* we need to create a temporal object to carry the destroy operation */ PyObject *tmp = PySwigObject_New(sobj->ptr, ty, 0); res = SWIG_Python_CallFunctor(destroy, tmp); Py_DECREF(tmp); } else { PyCFunction meth = PyCFunction_GET_FUNCTION(destroy); PyObject *mself = PyCFunction_GET_SELF(destroy); res = ((*meth)(mself, v)); } Py_XDECREF(res); } else { const char *name = SWIG_TypePrettyName(ty); #if !defined(SWIG_PYTHON_SILENT_MEMLEAK) printf("swig/python detected a memory leak of type '%s', no destructor found.\n", name); #endif } } Py_XDECREF(next); PyObject_DEL(v); } SWIGRUNTIME PyObject* PySwigObject_append(PyObject* v, PyObject* next) { PySwigObject *sobj = (PySwigObject *) v; #ifndef METH_O PyObject *tmp = 0; if (!PyArg_ParseTuple(next,(char *)"O:append", &tmp)) return NULL; next = tmp; #endif if (!PySwigObject_Check(next)) { return NULL; } sobj->next = next; Py_INCREF(next); return SWIG_Py_Void(); } SWIGRUNTIME PyObject* #ifdef METH_NOARGS PySwigObject_next(PyObject* v) #else PySwigObject_next(PyObject* v, PyObject *SWIGUNUSEDPARM(args)) #endif { PySwigObject *sobj = (PySwigObject *) v; if (sobj->next) { Py_INCREF(sobj->next); return sobj->next; } else { return SWIG_Py_Void(); } } SWIGINTERN PyObject* #ifdef METH_NOARGS PySwigObject_disown(PyObject *v) #else PySwigObject_disown(PyObject* v, PyObject *SWIGUNUSEDPARM(args)) #endif { PySwigObject *sobj = (PySwigObject *)v; sobj->own = 0; return SWIG_Py_Void(); } SWIGINTERN PyObject* #ifdef METH_NOARGS PySwigObject_acquire(PyObject *v) #else PySwigObject_acquire(PyObject* v, PyObject *SWIGUNUSEDPARM(args)) #endif { PySwigObject *sobj = (PySwigObject *)v; sobj->own = SWIG_POINTER_OWN; return SWIG_Py_Void(); } SWIGINTERN PyObject* PySwigObject_own(PyObject *v, PyObject *args) { PyObject *val = 0; #if (PY_VERSION_HEX < 0x02020000) if (!PyArg_ParseTuple(args,(char *)"|O:own",&val)) #else if (!PyArg_UnpackTuple(args, (char *)"own", 0, 1, &val)) #endif { return NULL; } else { PySwigObject *sobj = (PySwigObject *)v; PyObject *obj = PyBool_FromLong(sobj->own); if (val) { #ifdef METH_NOARGS if (PyObject_IsTrue(val)) { PySwigObject_acquire(v); } else { PySwigObject_disown(v); } #else if (PyObject_IsTrue(val)) { PySwigObject_acquire(v,args); } else { PySwigObject_disown(v,args); } #endif } return obj; } } #ifdef METH_O static PyMethodDef swigobject_methods[] = { {(char *)"disown", (PyCFunction)PySwigObject_disown, METH_NOARGS, (char *)"releases ownership of the pointer"}, {(char *)"acquire", (PyCFunction)PySwigObject_acquire, METH_NOARGS, (char *)"aquires ownership of the pointer"}, {(char *)"own", (PyCFunction)PySwigObject_own, METH_VARARGS, (char *)"returns/sets ownership of the pointer"}, {(char *)"append", (PyCFunction)PySwigObject_append, METH_O, (char *)"appends another 'this' object"}, {(char *)"next", (PyCFunction)PySwigObject_next, METH_NOARGS, (char *)"returns the next 'this' object"}, {(char *)"__repr__",(PyCFunction)PySwigObject_repr, METH_NOARGS, (char *)"returns object representation"}, {0, 0, 0, 0} }; #else static PyMethodDef swigobject_methods[] = { {(char *)"disown", (PyCFunction)PySwigObject_disown, METH_VARARGS, (char *)"releases ownership of the pointer"}, {(char *)"acquire", (PyCFunction)PySwigObject_acquire, METH_VARARGS, (char *)"aquires ownership of the pointer"}, {(char *)"own", (PyCFunction)PySwigObject_own, METH_VARARGS, (char *)"returns/sets ownership of the pointer"}, {(char *)"append", (PyCFunction)PySwigObject_append, METH_VARARGS, (char *)"appends another 'this' object"}, {(char *)"next", (PyCFunction)PySwigObject_next, METH_VARARGS, (char *)"returns the next 'this' object"}, {(char *)"__repr__",(PyCFunction)PySwigObject_repr, METH_VARARGS, (char *)"returns object representation"}, {0, 0, 0, 0} }; #endif #if PY_VERSION_HEX < 0x02020000 SWIGINTERN PyObject * PySwigObject_getattr(PySwigObject *sobj,char *name) { return Py_FindMethod(swigobject_methods, (PyObject *)sobj, name); } #endif SWIGRUNTIME PyTypeObject* _PySwigObject_type(void) { static char swigobject_doc[] = "Swig object carries a C/C++ instance pointer"; static PyNumberMethods PySwigObject_as_number = { (binaryfunc)0, /*nb_add*/ (binaryfunc)0, /*nb_subtract*/ (binaryfunc)0, /*nb_multiply*/ (binaryfunc)0, /*nb_divide*/ (binaryfunc)0, /*nb_remainder*/ (binaryfunc)0, /*nb_divmod*/ (ternaryfunc)0,/*nb_power*/ (unaryfunc)0, /*nb_negative*/ (unaryfunc)0, /*nb_positive*/ (unaryfunc)0, /*nb_absolute*/ (inquiry)0, /*nb_nonzero*/ 0, /*nb_invert*/ 0, /*nb_lshift*/ 0, /*nb_rshift*/ 0, /*nb_and*/ 0, /*nb_xor*/ 0, /*nb_or*/ (coercion)0, /*nb_coerce*/ (unaryfunc)PySwigObject_long, /*nb_int*/ (unaryfunc)PySwigObject_long, /*nb_long*/ (unaryfunc)0, /*nb_float*/ (unaryfunc)PySwigObject_oct, /*nb_oct*/ (unaryfunc)PySwigObject_hex, /*nb_hex*/ #if PY_VERSION_HEX >= 0x02020000 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_inplace_true_divide */ #elif PY_VERSION_HEX >= 0x02000000 0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_inplace_or */ #endif }; static PyTypeObject pyswigobject_type; static int type_init = 0; if (!type_init) { const PyTypeObject tmp = { PyObject_HEAD_INIT(NULL) 0, /* ob_size */ (char *)"PySwigObject", /* tp_name */ sizeof(PySwigObject), /* tp_basicsize */ 0, /* tp_itemsize */ (destructor)PySwigObject_dealloc, /* tp_dealloc */ (printfunc)PySwigObject_print, /* tp_print */ #if PY_VERSION_HEX < 0x02020000 (getattrfunc)PySwigObject_getattr, /* tp_getattr */ #else (getattrfunc)0, /* tp_getattr */ #endif (setattrfunc)0, /* tp_setattr */ (cmpfunc)PySwigObject_compare, /* tp_compare */ (reprfunc)PySwigObject_repr, /* tp_repr */ &PySwigObject_as_number, /* tp_as_number */ 0, /* tp_as_sequence */ 0, /* tp_as_mapping */ (hashfunc)0, /* tp_hash */ (ternaryfunc)0, /* tp_call */ (reprfunc)PySwigObject_str, /* tp_str */ PyObject_GenericGetAttr, /* tp_getattro */ 0, /* tp_setattro */ 0, /* tp_as_buffer */ Py_TPFLAGS_DEFAULT, /* tp_flags */ swigobject_doc, /* tp_doc */ 0, /* tp_traverse */ 0, /* tp_clear */ 0, /* tp_richcompare */ 0, /* tp_weaklistoffset */ #if PY_VERSION_HEX >= 0x02020000 0, /* tp_iter */ 0, /* tp_iternext */ swigobject_methods, /* tp_methods */ 0, /* tp_members */ 0, /* tp_getset */ 0, /* tp_base */ 0, /* tp_dict */ 0, /* tp_descr_get */ 0, /* tp_descr_set */ 0, /* tp_dictoffset */ 0, /* tp_init */ 0, /* tp_alloc */ 0, /* tp_new */ 0, /* tp_free */ 0, /* tp_is_gc */ 0, /* tp_bases */ 0, /* tp_mro */ 0, /* tp_cache */ 0, /* tp_subclasses */ 0, /* tp_weaklist */ #endif #if PY_VERSION_HEX >= 0x02030000 0, /* tp_del */ #endif #ifdef COUNT_ALLOCS 0,0,0,0 /* tp_alloc -> tp_next */ #endif }; pyswigobject_type = tmp; pyswigobject_type.ob_type = &PyType_Type; type_init = 1; } return &pyswigobject_type; } SWIGRUNTIME PyObject * PySwigObject_New(void *ptr, swig_type_info *ty, int own) { PySwigObject *sobj = PyObject_NEW(PySwigObject, PySwigObject_type()); if (sobj) { sobj->ptr = ptr; sobj->ty = ty; sobj->own = own; sobj->next = 0; } return (PyObject *)sobj; } /* ----------------------------------------------------------------------------- * Implements a simple Swig Packed type, and use it instead of string * ----------------------------------------------------------------------------- */ typedef struct { PyObject_HEAD void *pack; swig_type_info *ty; size_t size; } PySwigPacked; SWIGRUNTIME int PySwigPacked_print(PySwigPacked *v, FILE *fp, int SWIGUNUSEDPARM(flags)) { char result[SWIG_BUFFER_SIZE]; fputs("pack, v->size, 0, sizeof(result))) { fputs("at ", fp); fputs(result, fp); } fputs(v->ty->name,fp); fputs(">", fp); return 0; } SWIGRUNTIME PyObject * PySwigPacked_repr(PySwigPacked *v) { char result[SWIG_BUFFER_SIZE]; if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))) { return PyString_FromFormat("", result, v->ty->name); } else { return PyString_FromFormat("", v->ty->name); } } SWIGRUNTIME PyObject * PySwigPacked_str(PySwigPacked *v) { char result[SWIG_BUFFER_SIZE]; if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))){ return PyString_FromFormat("%s%s", result, v->ty->name); } else { return PyString_FromString(v->ty->name); } } SWIGRUNTIME int PySwigPacked_compare(PySwigPacked *v, PySwigPacked *w) { size_t i = v->size; size_t j = w->size; int s = (i < j) ? -1 : ((i > j) ? 1 : 0); return s ? s : strncmp((char *)v->pack, (char *)w->pack, 2*v->size); } SWIGRUNTIME PyTypeObject* _PySwigPacked_type(void); SWIGRUNTIME PyTypeObject* PySwigPacked_type(void) { static PyTypeObject *SWIG_STATIC_POINTER(type) = _PySwigPacked_type(); return type; } SWIGRUNTIMEINLINE int PySwigPacked_Check(PyObject *op) { return ((op)->ob_type == _PySwigPacked_type()) || (strcmp((op)->ob_type->tp_name,"PySwigPacked") == 0); } SWIGRUNTIME void PySwigPacked_dealloc(PyObject *v) { if (PySwigPacked_Check(v)) { PySwigPacked *sobj = (PySwigPacked *) v; free(sobj->pack); } PyObject_DEL(v); } SWIGRUNTIME PyTypeObject* _PySwigPacked_type(void) { static char swigpacked_doc[] = "Swig object carries a C/C++ instance pointer"; static PyTypeObject pyswigpacked_type; static int type_init = 0; if (!type_init) { const PyTypeObject tmp = { PyObject_HEAD_INIT(NULL) 0, /* ob_size */ (char *)"PySwigPacked", /* tp_name */ sizeof(PySwigPacked), /* tp_basicsize */ 0, /* tp_itemsize */ (destructor)PySwigPacked_dealloc, /* tp_dealloc */ (printfunc)PySwigPacked_print, /* tp_print */ (getattrfunc)0, /* tp_getattr */ (setattrfunc)0, /* tp_setattr */ (cmpfunc)PySwigPacked_compare, /* tp_compare */ (reprfunc)PySwigPacked_repr, /* tp_repr */ 0, /* tp_as_number */ 0, /* tp_as_sequence */ 0, /* tp_as_mapping */ (hashfunc)0, /* tp_hash */ (ternaryfunc)0, /* tp_call */ (reprfunc)PySwigPacked_str, /* tp_str */ PyObject_GenericGetAttr, /* tp_getattro */ 0, /* tp_setattro */ 0, /* tp_as_buffer */ Py_TPFLAGS_DEFAULT, /* tp_flags */ swigpacked_doc, /* tp_doc */ 0, /* tp_traverse */ 0, /* tp_clear */ 0, /* tp_richcompare */ 0, /* tp_weaklistoffset */ #if PY_VERSION_HEX >= 0x02020000 0, /* tp_iter */ 0, /* tp_iternext */ 0, /* tp_methods */ 0, /* tp_members */ 0, /* tp_getset */ 0, /* tp_base */ 0, /* tp_dict */ 0, /* tp_descr_get */ 0, /* tp_descr_set */ 0, /* tp_dictoffset */ 0, /* tp_init */ 0, /* tp_alloc */ 0, /* tp_new */ 0, /* tp_free */ 0, /* tp_is_gc */ 0, /* tp_bases */ 0, /* tp_mro */ 0, /* tp_cache */ 0, /* tp_subclasses */ 0, /* tp_weaklist */ #endif #if PY_VERSION_HEX >= 0x02030000 0, /* tp_del */ #endif #ifdef COUNT_ALLOCS 0,0,0,0 /* tp_alloc -> tp_next */ #endif }; pyswigpacked_type = tmp; pyswigpacked_type.ob_type = &PyType_Type; type_init = 1; } return &pyswigpacked_type; } SWIGRUNTIME PyObject * PySwigPacked_New(void *ptr, size_t size, swig_type_info *ty) { PySwigPacked *sobj = PyObject_NEW(PySwigPacked, PySwigPacked_type()); if (sobj) { void *pack = malloc(size); if (pack) { memcpy(pack, ptr, size); sobj->pack = pack; sobj->ty = ty; sobj->size = size; } else { PyObject_DEL((PyObject *) sobj); sobj = 0; } } return (PyObject *) sobj; } SWIGRUNTIME swig_type_info * PySwigPacked_UnpackData(PyObject *obj, void *ptr, size_t size) { if (PySwigPacked_Check(obj)) { PySwigPacked *sobj = (PySwigPacked *)obj; if (sobj->size != size) return 0; memcpy(ptr, sobj->pack, size); return sobj->ty; } else { return 0; } } /* ----------------------------------------------------------------------------- * pointers/data manipulation * ----------------------------------------------------------------------------- */ SWIGRUNTIMEINLINE PyObject * _SWIG_This(void) { return PyString_FromString("this"); } SWIGRUNTIME PyObject * SWIG_This(void) { static PyObject *SWIG_STATIC_POINTER(swig_this) = _SWIG_This(); return swig_this; } /* #define SWIG_PYTHON_SLOW_GETSET_THIS */ SWIGRUNTIME PySwigObject * SWIG_Python_GetSwigThis(PyObject *pyobj) { if (PySwigObject_Check(pyobj)) { return (PySwigObject *) pyobj; } else { PyObject *obj = 0; #if (!defined(SWIG_PYTHON_SLOW_GETSET_THIS) && (PY_VERSION_HEX >= 0x02030000)) if (PyInstance_Check(pyobj)) { obj = _PyInstance_Lookup(pyobj, SWIG_This()); } else { PyObject **dictptr = _PyObject_GetDictPtr(pyobj); if (dictptr != NULL) { PyObject *dict = *dictptr; obj = dict ? PyDict_GetItem(dict, SWIG_This()) : 0; } else { #ifdef PyWeakref_CheckProxy if (PyWeakref_CheckProxy(pyobj)) { PyObject *wobj = PyWeakref_GET_OBJECT(pyobj); return wobj ? SWIG_Python_GetSwigThis(wobj) : 0; } #endif obj = PyObject_GetAttr(pyobj,SWIG_This()); if (obj) { Py_DECREF(obj); } else { if (PyErr_Occurred()) PyErr_Clear(); return 0; } } } #else obj = PyObject_GetAttr(pyobj,SWIG_This()); if (obj) { Py_DECREF(obj); } else { if (PyErr_Occurred()) PyErr_Clear(); return 0; } #endif if (obj && !PySwigObject_Check(obj)) { /* a PyObject is called 'this', try to get the 'real this' PySwigObject from it */ return SWIG_Python_GetSwigThis(obj); } return (PySwigObject *)obj; } } /* Acquire a pointer value */ SWIGRUNTIME int SWIG_Python_AcquirePtr(PyObject *obj, int own) { if (own) { PySwigObject *sobj = SWIG_Python_GetSwigThis(obj); if (sobj) { int oldown = sobj->own; sobj->own = own; return oldown; } } return 0; } /* Convert a pointer value */ SWIGRUNTIME int SWIG_Python_ConvertPtrAndOwn(PyObject *obj, void **ptr, swig_type_info *ty, int flags, int *own) { if (!obj) return SWIG_ERROR; if (obj == Py_None) { if (ptr) *ptr = 0; return SWIG_OK; } else { PySwigObject *sobj = SWIG_Python_GetSwigThis(obj); while (sobj) { void *vptr = sobj->ptr; if (ty) { swig_type_info *to = sobj->ty; if (to == ty) { /* no type cast needed */ if (ptr) *ptr = vptr; break; } else { swig_cast_info *tc = SWIG_TypeCheck(to->name,ty); if (!tc) { sobj = (PySwigObject *)sobj->next; } else { if (ptr) *ptr = SWIG_TypeCast(tc,vptr); break; } } } else { if (ptr) *ptr = vptr; break; } } if (sobj) { if (own) *own = sobj->own; if (flags & SWIG_POINTER_DISOWN) { sobj->own = 0; } return SWIG_OK; } else { int res = SWIG_ERROR; if (flags & SWIG_POINTER_IMPLICIT_CONV) { PySwigClientData *data = ty ? (PySwigClientData *) ty->clientdata : 0; if (data && !data->implicitconv) { PyObject *klass = data->klass; if (klass) { PyObject *impconv; data->implicitconv = 1; /* avoid recursion and call 'explicit' constructors*/ impconv = SWIG_Python_CallFunctor(klass, obj); data->implicitconv = 0; if (PyErr_Occurred()) { PyErr_Clear(); impconv = 0; } if (impconv) { PySwigObject *iobj = SWIG_Python_GetSwigThis(impconv); if (iobj) { void *vptr; res = SWIG_Python_ConvertPtrAndOwn((PyObject*)iobj, &vptr, ty, 0, 0); if (SWIG_IsOK(res)) { if (ptr) { *ptr = vptr; /* transfer the ownership to 'ptr' */ iobj->own = 0; res = SWIG_AddCast(res); res = SWIG_AddNewMask(res); } else { res = SWIG_AddCast(res); } } } Py_DECREF(impconv); } } } } return res; } } } /* Convert a function ptr value */ SWIGRUNTIME int SWIG_Python_ConvertFunctionPtr(PyObject *obj, void **ptr, swig_type_info *ty) { if (!PyCFunction_Check(obj)) { return SWIG_ConvertPtr(obj, ptr, ty, 0); } else { void *vptr = 0; /* here we get the method pointer for callbacks */ const char *doc = (((PyCFunctionObject *)obj) -> m_ml -> ml_doc); const char *desc = doc ? strstr(doc, "swig_ptr: ") : 0; if (desc) { desc = ty ? SWIG_UnpackVoidPtr(desc + 10, &vptr, ty->name) : 0; if (!desc) return SWIG_ERROR; } if (ty) { swig_cast_info *tc = SWIG_TypeCheck(desc,ty); if (!tc) return SWIG_ERROR; *ptr = SWIG_TypeCast(tc,vptr); } else { *ptr = vptr; } return SWIG_OK; } } /* Convert a packed value value */ SWIGRUNTIME int SWIG_Python_ConvertPacked(PyObject *obj, void *ptr, size_t sz, swig_type_info *ty) { swig_type_info *to = PySwigPacked_UnpackData(obj, ptr, sz); if (!to) return SWIG_ERROR; if (ty) { if (to != ty) { /* check type cast? */ swig_cast_info *tc = SWIG_TypeCheck(to->name,ty); if (!tc) return SWIG_ERROR; } } return SWIG_OK; } /* ----------------------------------------------------------------------------- * Create a new pointer object * ----------------------------------------------------------------------------- */ /* Create a new instance object, whitout calling __init__, and set the 'this' attribute. */ SWIGRUNTIME PyObject* SWIG_Python_NewShadowInstance(PySwigClientData *data, PyObject *swig_this) { #if (PY_VERSION_HEX >= 0x02020000) PyObject *inst = 0; PyObject *newraw = data->newraw; if (newraw) { inst = PyObject_Call(newraw, data->newargs, NULL); if (inst) { #if !defined(SWIG_PYTHON_SLOW_GETSET_THIS) PyObject **dictptr = _PyObject_GetDictPtr(inst); if (dictptr != NULL) { PyObject *dict = *dictptr; if (dict == NULL) { dict = PyDict_New(); *dictptr = dict; PyDict_SetItem(dict, SWIG_This(), swig_this); } } #else PyObject *key = SWIG_This(); PyObject_SetAttr(inst, key, swig_this); #endif } } else { PyObject *dict = PyDict_New(); PyDict_SetItem(dict, SWIG_This(), swig_this); inst = PyInstance_NewRaw(data->newargs, dict); Py_DECREF(dict); } return inst; #else #if (PY_VERSION_HEX >= 0x02010000) PyObject *inst; PyObject *dict = PyDict_New(); PyDict_SetItem(dict, SWIG_This(), swig_this); inst = PyInstance_NewRaw(data->newargs, dict); Py_DECREF(dict); return (PyObject *) inst; #else PyInstanceObject *inst = PyObject_NEW(PyInstanceObject, &PyInstance_Type); if (inst == NULL) { return NULL; } inst->in_class = (PyClassObject *)data->newargs; Py_INCREF(inst->in_class); inst->in_dict = PyDict_New(); if (inst->in_dict == NULL) { Py_DECREF(inst); return NULL; } #ifdef Py_TPFLAGS_HAVE_WEAKREFS inst->in_weakreflist = NULL; #endif #ifdef Py_TPFLAGS_GC PyObject_GC_Init(inst); #endif PyDict_SetItem(inst->in_dict, SWIG_This(), swig_this); return (PyObject *) inst; #endif #endif } SWIGRUNTIME void SWIG_Python_SetSwigThis(PyObject *inst, PyObject *swig_this) { PyObject *dict; #if (PY_VERSION_HEX >= 0x02020000) && !defined(SWIG_PYTHON_SLOW_GETSET_THIS) PyObject **dictptr = _PyObject_GetDictPtr(inst); if (dictptr != NULL) { dict = *dictptr; if (dict == NULL) { dict = PyDict_New(); *dictptr = dict; } PyDict_SetItem(dict, SWIG_This(), swig_this); return; } #endif dict = PyObject_GetAttrString(inst, (char*)"__dict__"); PyDict_SetItem(dict, SWIG_This(), swig_this); Py_DECREF(dict); } SWIGINTERN PyObject * SWIG_Python_InitShadowInstance(PyObject *args) { PyObject *obj[2]; if (!SWIG_Python_UnpackTuple(args,(char*)"swiginit", 2, 2, obj)) { return NULL; } else { PySwigObject *sthis = SWIG_Python_GetSwigThis(obj[0]); if (sthis) { PySwigObject_append((PyObject*) sthis, obj[1]); } else { SWIG_Python_SetSwigThis(obj[0], obj[1]); } return SWIG_Py_Void(); } } /* Create a new pointer object */ SWIGRUNTIME PyObject * SWIG_Python_NewPointerObj(void *ptr, swig_type_info *type, int flags) { if (!ptr) { return SWIG_Py_Void(); } else { int own = (flags & SWIG_POINTER_OWN) ? SWIG_POINTER_OWN : 0; PyObject *robj = PySwigObject_New(ptr, type, own); PySwigClientData *clientdata = type ? (PySwigClientData *)(type->clientdata) : 0; if (clientdata && !(flags & SWIG_POINTER_NOSHADOW)) { PyObject *inst = SWIG_Python_NewShadowInstance(clientdata, robj); if (inst) { Py_DECREF(robj); robj = inst; } } return robj; } } /* Create a new packed object */ SWIGRUNTIMEINLINE PyObject * SWIG_Python_NewPackedObj(void *ptr, size_t sz, swig_type_info *type) { return ptr ? PySwigPacked_New((void *) ptr, sz, type) : SWIG_Py_Void(); } /* -----------------------------------------------------------------------------* * Get type list * -----------------------------------------------------------------------------*/ #ifdef SWIG_LINK_RUNTIME void *SWIG_ReturnGlobalTypeList(void *); #endif SWIGRUNTIME swig_module_info * SWIG_Python_GetModule(void) { static void *type_pointer = (void *)0; /* first check if module already created */ if (!type_pointer) { #ifdef SWIG_LINK_RUNTIME type_pointer = SWIG_ReturnGlobalTypeList((void *)0); #else type_pointer = PyCObject_Import((char*)"swig_runtime_data" SWIG_RUNTIME_VERSION, (char*)"type_pointer" SWIG_TYPE_TABLE_NAME); if (PyErr_Occurred()) { PyErr_Clear(); type_pointer = (void *)0; } #endif } return (swig_module_info *) type_pointer; } #if PY_MAJOR_VERSION < 2 /* PyModule_AddObject function was introduced in Python 2.0. The following function is copied out of Python/modsupport.c in python version 2.3.4 */ SWIGINTERN int PyModule_AddObject(PyObject *m, char *name, PyObject *o) { PyObject *dict; if (!PyModule_Check(m)) { PyErr_SetString(PyExc_TypeError, "PyModule_AddObject() needs module as first arg"); return SWIG_ERROR; } if (!o) { PyErr_SetString(PyExc_TypeError, "PyModule_AddObject() needs non-NULL value"); return SWIG_ERROR; } dict = PyModule_GetDict(m); if (dict == NULL) { /* Internal error -- modules must have a dict! */ PyErr_Format(PyExc_SystemError, "module '%s' has no __dict__", PyModule_GetName(m)); return SWIG_ERROR; } if (PyDict_SetItemString(dict, name, o)) return SWIG_ERROR; Py_DECREF(o); return SWIG_OK; } #endif SWIGRUNTIME void SWIG_Python_DestroyModule(void *vptr) { swig_module_info *swig_module = (swig_module_info *) vptr; swig_type_info **types = swig_module->types; size_t i; for (i =0; i < swig_module->size; ++i) { swig_type_info *ty = types[i]; if (ty->owndata) { PySwigClientData *data = (PySwigClientData *) ty->clientdata; if (data) PySwigClientData_Del(data); } } Py_DECREF(SWIG_This()); } SWIGRUNTIME void SWIG_Python_SetModule(swig_module_info *swig_module) { static PyMethodDef swig_empty_runtime_method_table[] = { {NULL, NULL, 0, NULL} };/* Sentinel */ PyObject *module = Py_InitModule((char*)"swig_runtime_data" SWIG_RUNTIME_VERSION, swig_empty_runtime_method_table); PyObject *pointer = PyCObject_FromVoidPtr((void *) swig_module, SWIG_Python_DestroyModule); if (pointer && module) { PyModule_AddObject(module, (char*)"type_pointer" SWIG_TYPE_TABLE_NAME, pointer); } else { Py_XDECREF(pointer); } } /* The python cached type query */ SWIGRUNTIME PyObject * SWIG_Python_TypeCache(void) { static PyObject *SWIG_STATIC_POINTER(cache) = PyDict_New(); return cache; } SWIGRUNTIME swig_type_info * SWIG_Python_TypeQuery(const char *type) { PyObject *cache = SWIG_Python_TypeCache(); PyObject *key = PyString_FromString(type); PyObject *obj = PyDict_GetItem(cache, key); swig_type_info *descriptor; if (obj) { descriptor = (swig_type_info *) PyCObject_AsVoidPtr(obj); } else { swig_module_info *swig_module = SWIG_Python_GetModule(); descriptor = SWIG_TypeQueryModule(swig_module, swig_module, type); if (descriptor) { obj = PyCObject_FromVoidPtr(descriptor, NULL); PyDict_SetItem(cache, key, obj); Py_DECREF(obj); } } Py_DECREF(key); return descriptor; } /* For backward compatibility only */ #define SWIG_POINTER_EXCEPTION 0 #define SWIG_arg_fail(arg) SWIG_Python_ArgFail(arg) #define SWIG_MustGetPtr(p, type, argnum, flags) SWIG_Python_MustGetPtr(p, type, argnum, flags) SWIGRUNTIME int SWIG_Python_AddErrMesg(const char* mesg, int infront) { if (PyErr_Occurred()) { PyObject *type = 0; PyObject *value = 0; PyObject *traceback = 0; PyErr_Fetch(&type, &value, &traceback); if (value) { PyObject *old_str = PyObject_Str(value); Py_XINCREF(type); PyErr_Clear(); if (infront) { PyErr_Format(type, "%s %s", mesg, PyString_AsString(old_str)); } else { PyErr_Format(type, "%s %s", PyString_AsString(old_str), mesg); } Py_DECREF(old_str); } return 1; } else { return 0; } } SWIGRUNTIME int SWIG_Python_ArgFail(int argnum) { if (PyErr_Occurred()) { /* add information about failing argument */ char mesg[256]; PyOS_snprintf(mesg, sizeof(mesg), "argument number %d:", argnum); return SWIG_Python_AddErrMesg(mesg, 1); } else { return 0; } } SWIGRUNTIMEINLINE const char * PySwigObject_GetDesc(PyObject *self) { PySwigObject *v = (PySwigObject *)self; swig_type_info *ty = v ? v->ty : 0; return ty ? ty->str : (char*)""; } SWIGRUNTIME void SWIG_Python_TypeError(const char *type, PyObject *obj) { if (type) { #if defined(SWIG_COBJECT_TYPES) if (obj && PySwigObject_Check(obj)) { const char *otype = (const char *) PySwigObject_GetDesc(obj); if (otype) { PyErr_Format(PyExc_TypeError, "a '%s' is expected, 'PySwigObject(%s)' is received", type, otype); return; } } else #endif { const char *otype = (obj ? obj->ob_type->tp_name : 0); if (otype) { PyObject *str = PyObject_Str(obj); const char *cstr = str ? PyString_AsString(str) : 0; if (cstr) { PyErr_Format(PyExc_TypeError, "a '%s' is expected, '%s(%s)' is received", type, otype, cstr); } else { PyErr_Format(PyExc_TypeError, "a '%s' is expected, '%s' is received", type, otype); } Py_XDECREF(str); return; } } PyErr_Format(PyExc_TypeError, "a '%s' is expected", type); } else { PyErr_Format(PyExc_TypeError, "unexpected type is received"); } } /* Convert a pointer value, signal an exception on a type mismatch */ SWIGRUNTIME void * SWIG_Python_MustGetPtr(PyObject *obj, swig_type_info *ty, int argnum, int flags) { void *result; if (SWIG_Python_ConvertPtr(obj, &result, ty, flags) == -1) { PyErr_Clear(); if (flags & SWIG_POINTER_EXCEPTION) { SWIG_Python_TypeError(SWIG_TypePrettyName(ty), obj); SWIG_Python_ArgFail(argnum); } } return result; } #ifdef __cplusplus #if 0 { /* cc-mode */ #endif } #endif #define SWIG_exception_fail(code, msg) do { SWIG_Error(code, msg); SWIG_fail; } while(0) #define SWIG_contract_assert(expr, msg) if (!(expr)) { SWIG_Error(SWIG_RuntimeError, msg); SWIG_fail; } else /* -------- TYPES TABLE (BEGIN) -------- */ #define SWIGTYPE_p_FILE swig_types[0] #define SWIGTYPE_p_MAC swig_types[1] #define SWIGTYPE_p_Mote swig_types[2] #define SWIGTYPE_p_Packet swig_types[3] #define SWIGTYPE_p_Radio swig_types[4] #define SWIGTYPE_p_SerialForwarder swig_types[5] #define SWIGTYPE_p_SerialPacket swig_types[6] #define SWIGTYPE_p_Throttle swig_types[7] #define SWIGTYPE_p_Tossim swig_types[8] #define SWIGTYPE_p_Variable swig_types[9] #define SWIGTYPE_p_char swig_types[10] #define SWIGTYPE_p_int swig_types[11] #define SWIGTYPE_p_nesc_app swig_types[12] #define SWIGTYPE_p_p_char swig_types[13] #define SWIGTYPE_p_var_string swig_types[14] static swig_type_info *swig_types[16]; static swig_module_info swig_module = {swig_types, 15, 0, 0, 0, 0}; #define SWIG_TypeQuery(name) SWIG_TypeQueryModule(&swig_module, &swig_module, name) #define SWIG_MangledTypeQuery(name) SWIG_MangledTypeQueryModule(&swig_module, &swig_module, name) /* -------- TYPES TABLE (END) -------- */ #if (PY_VERSION_HEX <= 0x02000000) # if !defined(SWIG_PYTHON_CLASSIC) # error "This python version requires swig to be run with the '-classic' option" # endif #endif /*----------------------------------------------- @(target):= _TOSSIM.so ------------------------------------------------*/ #define SWIG_init init_TOSSIM #define SWIG_name "_TOSSIM" #define SWIGVERSION 0x010331 #define SWIG_VERSION SWIGVERSION #define SWIG_as_voidptr(a) const_cast< void * >(static_cast< const void * >(a)) #define SWIG_as_voidptrptr(a) ((void)SWIG_as_voidptr(*a),reinterpret_cast< void** >(a)) #include namespace swig { class PyObject_ptr { protected: PyObject *_obj; public: PyObject_ptr() :_obj(0) { } PyObject_ptr(const PyObject_ptr& item) : _obj(item._obj) { Py_XINCREF(_obj); } PyObject_ptr(PyObject *obj, bool initial_ref = true) :_obj(obj) { if (initial_ref) Py_XINCREF(_obj); } PyObject_ptr & operator=(const PyObject_ptr& item) { Py_XINCREF(item._obj); Py_XDECREF(_obj); _obj = item._obj; return *this; } ~PyObject_ptr() { Py_XDECREF(_obj); } operator PyObject *() const { return _obj; } PyObject *operator->() const { return _obj; } }; } namespace swig { struct PyObject_var : PyObject_ptr { PyObject_var(PyObject* obj = 0) : PyObject_ptr(obj, false) { } PyObject_var & operator = (PyObject* obj) { Py_XDECREF(_obj); _obj = obj; return *this; } }; } #include #include enum { PRIMITIVE_INTEGER = 0, PRIMITIVE_FLOAT = 1, PRIMITIVE_UNKNOWN = 2 }; int lengthOfType(char* type) { if (strcmp(type, "uint8_t") == 0) { return sizeof(uint8_t); } else if (strcmp(type, "uint16_t") == 0) { return sizeof(uint16_t); } else if (strcmp(type, "uint32_t") == 0) { return sizeof(uint32_t); } else if (strcmp(type, "int8_t") == 0) { return sizeof(int8_t); } else if (strcmp(type, "int16_t") == 0) { return sizeof(int16_t); } else if (strcmp(type, "int32_t") == 0) { return sizeof(int32_t); } else if (strcmp(type, "char") == 0) { return sizeof(char); } else if (strcmp(type, "short") == 0) { return sizeof(short); } else if (strcmp(type, "int") == 0) { return sizeof(int); } else if (strcmp(type, "long") == 0) { return sizeof(long); } else if (strcmp(type, "unsigned char") == 0) { return sizeof(unsigned char); } else if (strcmp(type, "unsigned short") == 0) { return sizeof(unsigned short); } else if (strcmp(type, "unsigned int") == 0) { return sizeof(unsigned int); } else if (strcmp(type, "unsigned long") == 0) { return sizeof(unsigned long); } else if (strcmp(type, "float") == 0) { return sizeof(float); } else if (strcmp(type, "double") == 0) { return sizeof(double); } else { return 1; } } int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) { if (strcmp(type, "uint8_t") == 0) { uint8_t val; memcpy(&val, ptr, sizeof(uint8_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "uint16_t") == 0) { uint16_t val; memcpy(&val, ptr, sizeof(uint16_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "uint32_t") == 0) { uint32_t val; memcpy(&val, ptr, sizeof(uint32_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int8_t") == 0) { int8_t val; memcpy(&val, ptr, sizeof(int8_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int16_t") == 0) { int16_t val; memcpy(&val, ptr, sizeof(int16_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int32_t") == 0) { int32_t val; memcpy(&val, ptr, sizeof(int32_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "char") == 0) { long val; memcpy(&val, ptr, sizeof(char)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "short") == 0) { short val; memcpy(&val, ptr, sizeof(short)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int") == 0) { int val; memcpy(&val, ptr, sizeof(int)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "long") == 0) { long val; memcpy(&val, ptr, sizeof(long)); *lval = val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned char") == 0) { unsigned char val; memcpy(&val, ptr, sizeof(unsigned char)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned short") == 0) { unsigned short val; memcpy(&val, ptr, sizeof(unsigned short)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned int") == 0) { unsigned int val; memcpy(&val, ptr, sizeof(unsigned int)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned long") == 0) { unsigned long val; memcpy(&val, ptr, sizeof(unsigned long)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "float") == 0) { float val; memcpy(&val, ptr, sizeof(float)); *dval = (double)val; return PRIMITIVE_FLOAT; } else if (strcmp(type, "double") == 0) { double val; memcpy(&val, ptr, sizeof(double)); *dval = val; return PRIMITIVE_FLOAT; } else { return PRIMITIVE_UNKNOWN; } } PyObject* valueFromScalar(char* type, char* ptr, int len) { long lval; double dval; int rval = memoryToPrimitive(type, ptr, &lval, &dval); switch(rval) { case PRIMITIVE_INTEGER: return PyInt_FromLong(lval); case PRIMITIVE_FLOAT: return PyFloat_FromDouble(dval); case PRIMITIVE_UNKNOWN: default: return PyString_FromStringAndSize(ptr, len); } } PyObject* listFromArray(char* type, char* ptr, int len) { long lval; double dval; int elementLen = lengthOfType(type); PyObject* list = PyList_New(0); //printf("Generating list of %s\n", type); for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) { PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen)); } return list; } #include #define SWIG_From_long PyInt_FromLong SWIGINTERNINLINE PyObject * SWIG_From_int (int value) { return SWIG_From_long (value); } #include #ifndef LLONG_MIN # define LLONG_MIN LONG_LONG_MIN #endif #ifndef LLONG_MAX # define LLONG_MAX LONG_LONG_MAX #endif #ifndef ULLONG_MAX # define ULLONG_MAX ULONG_LONG_MAX #endif SWIGINTERN int SWIG_AsVal_double (PyObject *obj, double *val) { int res = SWIG_TypeError; if (PyFloat_Check(obj)) { if (val) *val = PyFloat_AsDouble(obj); return SWIG_OK; } else if (PyInt_Check(obj)) { if (val) *val = PyInt_AsLong(obj); return SWIG_OK; } else if (PyLong_Check(obj)) { double v = PyLong_AsDouble(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_OK; } else { PyErr_Clear(); } } #ifdef SWIG_PYTHON_CAST_MODE { int dispatch = 0; double d = PyFloat_AsDouble(obj); if (!PyErr_Occurred()) { if (val) *val = d; return SWIG_AddCast(SWIG_OK); } else { PyErr_Clear(); } if (!dispatch) { long v = PyLong_AsLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_AddCast(SWIG_AddCast(SWIG_OK)); } else { PyErr_Clear(); } } } #endif return res; } #include #include SWIGINTERNINLINE int SWIG_CanCastAsInteger(double *d, double min, double max) { double x = *d; if ((min <= x && x <= max)) { double fx = floor(x); double cx = ceil(x); double rd = ((x - fx) < 0.5) ? fx : cx; /* simple rint */ if ((errno == EDOM) || (errno == ERANGE)) { errno = 0; } else { double summ, reps, diff; if (rd < x) { diff = x - rd; } else if (rd > x) { diff = rd - x; } else { return 1; } summ = rd + x; reps = diff/summ; if (reps < 8*DBL_EPSILON) { *d = rd; return 1; } } } return 0; } SWIGINTERN int SWIG_AsVal_long (PyObject *obj, long* val) { if (PyInt_Check(obj)) { if (val) *val = PyInt_AsLong(obj); return SWIG_OK; } else if (PyLong_Check(obj)) { long v = PyLong_AsLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_OK; } else { PyErr_Clear(); } } #ifdef SWIG_PYTHON_CAST_MODE { int dispatch = 0; long v = PyInt_AsLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_AddCast(SWIG_OK); } else { PyErr_Clear(); } if (!dispatch) { double d; int res = SWIG_AddCast(SWIG_AsVal_double (obj,&d)); if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, LONG_MIN, LONG_MAX)) { if (val) *val = (long)(d); return res; } } } #endif return SWIG_TypeError; } SWIGINTERN int SWIG_AsVal_int (PyObject * obj, int *val) { long v; int res = SWIG_AsVal_long (obj, &v); if (SWIG_IsOK(res)) { if ((v < INT_MIN || v > INT_MAX)) { return SWIG_OverflowError; } else { if (val) *val = static_cast< int >(v); } } return res; } #include #define SWIG_From_double PyFloat_FromDouble SWIGINTERNINLINE PyObject* SWIG_From_bool (bool value) { return PyBool_FromLong(value ? 1 : 0); } #include SWIGINTERN swig_type_info* SWIG_pchar_descriptor(void) { static int init = 0; static swig_type_info* info = 0; if (!init) { info = SWIG_TypeQuery("_p_char"); init = 1; } return info; } SWIGINTERNINLINE PyObject * SWIG_FromCharPtrAndSize(const char* carray, size_t size) { if (carray) { if (size > INT_MAX) { swig_type_info* pchar_descriptor = SWIG_pchar_descriptor(); return pchar_descriptor ? SWIG_NewPointerObj(const_cast< char * >(carray), pchar_descriptor, 0) : SWIG_Py_Void(); } else { return PyString_FromStringAndSize(carray, static_cast< int >(size)); } } else { return SWIG_Py_Void(); } } SWIGINTERNINLINE PyObject * SWIG_FromCharPtr(const char *cptr) { return SWIG_FromCharPtrAndSize(cptr, (cptr ? strlen(cptr) : 0)); } SWIGINTERN int SWIG_AsCharPtrAndSize(PyObject *obj, char** cptr, size_t* psize, int *alloc) { if (PyString_Check(obj)) { char *cstr; Py_ssize_t len; PyString_AsStringAndSize(obj, &cstr, &len); if (cptr) { if (alloc) { /* In python the user should not be able to modify the inner string representation. To warranty that, if you define SWIG_PYTHON_SAFE_CSTRINGS, a new/copy of the python string buffer is always returned. The default behavior is just to return the pointer value, so, be careful. */ #if defined(SWIG_PYTHON_SAFE_CSTRINGS) if (*alloc != SWIG_OLDOBJ) #else if (*alloc == SWIG_NEWOBJ) #endif { *cptr = reinterpret_cast< char* >(memcpy((new char[len + 1]), cstr, sizeof(char)*(len + 1))); *alloc = SWIG_NEWOBJ; } else { *cptr = cstr; *alloc = SWIG_OLDOBJ; } } else { *cptr = PyString_AsString(obj); } } if (psize) *psize = len + 1; return SWIG_OK; } else { swig_type_info* pchar_descriptor = SWIG_pchar_descriptor(); if (pchar_descriptor) { void* vptr = 0; if (SWIG_ConvertPtr(obj, &vptr, pchar_descriptor, 0) == SWIG_OK) { if (cptr) *cptr = (char *) vptr; if (psize) *psize = vptr ? (strlen((char *)vptr) + 1) : 0; if (alloc) *alloc = SWIG_OLDOBJ; return SWIG_OK; } } } return SWIG_TypeError; } SWIGINTERN int SWIG_AsVal_long_SS_long (PyObject *obj, long long *val) { int res = SWIG_TypeError; if (PyLong_Check(obj)) { long long v = PyLong_AsLongLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_OK; } else { PyErr_Clear(); } } else { long v; res = SWIG_AsVal_long (obj,&v); if (SWIG_IsOK(res)) { if (val) *val = v; return res; } } #ifdef SWIG_PYTHON_CAST_MODE { const double mant_max = 1LL << DBL_MANT_DIG; const double mant_min = -mant_max; double d; res = SWIG_AsVal_double (obj,&d); if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, mant_min, mant_max)) { if (val) *val = (long long)(d); return SWIG_AddCast(res); } res = SWIG_TypeError; } #endif return res; } #include #include #include SWIGINTERNINLINE PyObject* SWIG_From_unsigned_SS_long (unsigned long value) { return (value > LONG_MAX) ? PyLong_FromUnsignedLong(value) : PyInt_FromLong(static_cast< long >(value)); } SWIGINTERNINLINE PyObject* SWIG_From_long_SS_long (long long value) { return ((value < LONG_MIN) || (value > LONG_MAX)) ? PyLong_FromLongLong(value) : PyInt_FromLong(static_cast< long >(value)); } SWIGINTERN int SWIG_AsVal_unsigned_SS_long (PyObject *obj, unsigned long *val) { if (PyInt_Check(obj)) { long v = PyInt_AsLong(obj); if (v >= 0) { if (val) *val = v; return SWIG_OK; } else { return SWIG_OverflowError; } } else if (PyLong_Check(obj)) { unsigned long v = PyLong_AsUnsignedLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_OK; } else { PyErr_Clear(); } } #ifdef SWIG_PYTHON_CAST_MODE { int dispatch = 0; unsigned long v = PyLong_AsUnsignedLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_AddCast(SWIG_OK); } else { PyErr_Clear(); } if (!dispatch) { double d; int res = SWIG_AddCast(SWIG_AsVal_double (obj,&d)); if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, 0, ULONG_MAX)) { if (val) *val = (unsigned long)(d); return res; } } } #endif return SWIG_TypeError; } #ifdef __cplusplus extern "C" { #endif SWIGINTERN PyObject *_wrap_new_MAC(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_MAC")) SWIG_fail; result = (MAC *)new MAC(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_MAC, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_MAC(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_MAC",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_MAC" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_initHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_initHigh",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_initHigh" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->initHigh(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_initLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_initLow",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_initLow" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->initLow(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_high(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_high",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_high" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->high(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_low(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_low",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_low" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->low(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_symbolsPerSec(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_symbolsPerSec",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_symbolsPerSec" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->symbolsPerSec(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_bitsPerSymbol(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_bitsPerSymbol",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_bitsPerSymbol" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->bitsPerSymbol(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_preambleLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_preambleLength",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_preambleLength" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->preambleLength(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_exponentBase(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_exponentBase",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_exponentBase" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->exponentBase(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_maxIterations(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_maxIterations",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_maxIterations" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->maxIterations(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_minFreeSamples(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_minFreeSamples",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_minFreeSamples" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->minFreeSamples(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_rxtxDelay(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_rxtxDelay",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_rxtxDelay" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->rxtxDelay(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_ackTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_ackTime",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_ackTime" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->ackTime(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setInitHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setInitHigh",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setInitHigh" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setInitHigh" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setInitHigh(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setInitLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setInitLow",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setInitLow" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setInitLow" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setInitLow(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setHigh",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setHigh" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setHigh" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setHigh(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setLow",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setLow" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setLow" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setLow(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setSymbolsPerSec(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setSymbolsPerSec",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setSymbolsPerSec" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setSymbolsPerSec" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setSymbolsPerSec(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setBitsBerSymbol(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setBitsBerSymbol",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setBitsBerSymbol" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setBitsBerSymbol" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setBitsBerSymbol(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setPreambleLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setPreambleLength",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setPreambleLength" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setPreambleLength" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setPreambleLength(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setExponentBase(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setExponentBase",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setExponentBase" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setExponentBase" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setExponentBase(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setMaxIterations(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setMaxIterations",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setMaxIterations" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setMaxIterations" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setMaxIterations(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setMinFreeSamples(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setMinFreeSamples",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setMinFreeSamples" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setMinFreeSamples" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setMinFreeSamples(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setRxtxDelay(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setRxtxDelay",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setRxtxDelay" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setRxtxDelay" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setRxtxDelay(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setAckTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setAckTime",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setAckTime" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setAckTime" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setAckTime(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *MAC_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_MAC, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_Radio")) SWIG_fail; result = (Radio *)new Radio(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Radio, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Radio",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Radio" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_add(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; int arg3 ; double arg4 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; int val3 ; int ecode3 = 0 ; double val4 ; int ecode4 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; PyObject * obj3 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOOO:Radio_add",&obj0,&obj1,&obj2,&obj3)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_add" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_add" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_add" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); ecode4 = SWIG_AsVal_double(obj3, &val4); if (!SWIG_IsOK(ecode4)) { SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "Radio_add" "', argument " "4"" of type '" "double""'"); } arg4 = static_cast< double >(val4); (arg1)->add(arg2,arg3,arg4); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_gain(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; int arg3 ; double result; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; int val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_gain",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_gain" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_gain" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_gain" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); result = (double)(arg1)->gain(arg2,arg3); resultobj = SWIG_From_double(static_cast< double >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_connected(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; int arg3 ; bool result; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; int val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_connected",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_connected" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_connected" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_connected" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); result = (bool)(arg1)->connected(arg2,arg3); resultobj = SWIG_From_bool(static_cast< bool >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_remove(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; int arg3 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; int val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_remove",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_remove" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_remove" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_remove" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); (arg1)->remove(arg2,arg3); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_setNoise(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; double arg3 ; double arg4 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; double val3 ; int ecode3 = 0 ; double val4 ; int ecode4 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; PyObject * obj3 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOOO:Radio_setNoise",&obj0,&obj1,&obj2,&obj3)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_setNoise" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_setNoise" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_double(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_setNoise" "', argument " "3"" of type '" "double""'"); } arg3 = static_cast< double >(val3); ecode4 = SWIG_AsVal_double(obj3, &val4); if (!SWIG_IsOK(ecode4)) { SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "Radio_setNoise" "', argument " "4"" of type '" "double""'"); } arg4 = static_cast< double >(val4); (arg1)->setNoise(arg2,arg3,arg4); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_setSensitivity(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; double arg2 ; void *argp1 = 0 ; int res1 = 0 ; double val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Radio_setSensitivity",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_setSensitivity" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_double(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_setSensitivity" "', argument " "2"" of type '" "double""'"); } arg2 = static_cast< double >(val2); (arg1)->setSensitivity(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Radio_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Radio, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Packet(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_Packet")) SWIG_fail; result = (Packet *)new Packet(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Packet, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Packet(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Packet",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Packet" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setSource(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setSource",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setSource" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setSource" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setSource(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_source(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_source",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_source" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->source(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setDestination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setDestination",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setDestination" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setDestination" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setDestination(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_destination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_destination",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_destination" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->destination(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setLength",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setLength" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setLength" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setLength(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_length(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_length",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_length" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->length(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setType(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setType",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setType" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setType" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setType(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_type(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_type",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_type" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->type(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_data(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_data",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_data" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (char *)(arg1)->data(); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; char *arg2 = (char *) 0 ; int arg3 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; size_t size2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setData",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setData" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, &size2, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Packet_setData" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); arg3 = static_cast< int >(size2 - 1); (arg1)->setData(arg2,arg3); resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_Packet_maxLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_maxLength",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_maxLength" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->maxLength(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setStrength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setStrength",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setStrength" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setStrength" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setStrength(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_deliver(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; long long arg3 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; long long val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Packet_deliver",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_deliver" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_deliver" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_long_SS_long(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Packet_deliver" "', argument " "3"" of type '" "long long""'"); } arg3 = static_cast< long long >(val3); (arg1)->deliver(arg2,arg3); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_deliverNow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_deliverNow",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_deliverNow" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_deliverNow" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->deliverNow(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Packet_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Packet, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_SerialPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_SerialPacket")) SWIG_fail; result = (SerialPacket *)new SerialPacket(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_SerialPacket, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_SerialPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_SerialPacket",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_SerialPacket" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_setDestination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_setDestination",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_setDestination" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_setDestination" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setDestination(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_destination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_destination",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_destination" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); result = (int)(arg1)->destination(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_setLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_setLength",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_setLength" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_setLength" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setLength(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_length(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_length",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_length" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); result = (int)(arg1)->length(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_setType(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_setType",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_setType" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_setType" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setType(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_type(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_type",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_type" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); result = (int)(arg1)->type(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_data(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_data",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_data" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); result = (char *)(arg1)->data(); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_setData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; char *arg2 = (char *) 0 ; int arg3 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; size_t size2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_setData",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_setData" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, &size2, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "SerialPacket_setData" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); arg3 = static_cast< int >(size2 - 1); (arg1)->setData(arg2,arg3); resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_maxLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_maxLength",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_maxLength" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); result = (int)(arg1)->maxLength(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_deliver(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int arg2 ; long long arg3 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; long long val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:SerialPacket_deliver",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_deliver" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_deliver" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_long_SS_long(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "SerialPacket_deliver" "', argument " "3"" of type '" "long long""'"); } arg3 = static_cast< long long >(val3); (arg1)->deliver(arg2,arg3); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialPacket_deliverNow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialPacket *arg1 = (SerialPacket *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_deliverNow",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_deliverNow" "', argument " "1"" of type '" "SerialPacket *""'"); } arg1 = reinterpret_cast< SerialPacket * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_deliverNow" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->deliverNow(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *SerialPacket_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_SerialPacket, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_SerialForwarder(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; int arg1 ; SerialForwarder *result = 0 ; int val1 ; int ecode1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:new_SerialForwarder",&obj0)) SWIG_fail; ecode1 = SWIG_AsVal_int(obj0, &val1); if (!SWIG_IsOK(ecode1)) { SWIG_exception_fail(SWIG_ArgError(ecode1), "in method '" "new_SerialForwarder" "', argument " "1"" of type '" "int""'"); } arg1 = static_cast< int >(val1); result = (SerialForwarder *)new SerialForwarder(arg1); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_SerialForwarder, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_SerialForwarder(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialForwarder *arg1 = (SerialForwarder *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_SerialForwarder",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialForwarder, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_SerialForwarder" "', argument " "1"" of type '" "SerialForwarder *""'"); } arg1 = reinterpret_cast< SerialForwarder * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialForwarder_process(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialForwarder *arg1 = (SerialForwarder *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:SerialForwarder_process",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialForwarder, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialForwarder_process" "', argument " "1"" of type '" "SerialForwarder *""'"); } arg1 = reinterpret_cast< SerialForwarder * >(argp1); (arg1)->process(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialForwarder_dispatchPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialForwarder *arg1 = (SerialForwarder *) 0 ; void *arg2 = (void *) 0 ; int arg3 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; int val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:SerialForwarder_dispatchPacket",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialForwarder, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialForwarder_dispatchPacket" "', argument " "1"" of type '" "SerialForwarder *""'"); } arg1 = reinterpret_cast< SerialForwarder * >(argp1); res2 = SWIG_ConvertPtr(obj1,SWIG_as_voidptrptr(&arg2), 0, 0); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "SerialForwarder_dispatchPacket" "', argument " "2"" of type '" "void const *""'"); } ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "SerialForwarder_dispatchPacket" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); (arg1)->dispatchPacket((void const *)arg2,arg3); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_SerialForwarder_forwardPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; SerialForwarder *arg1 = (SerialForwarder *) 0 ; void *arg2 = (void *) 0 ; int arg3 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; int val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:SerialForwarder_forwardPacket",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialForwarder, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialForwarder_forwardPacket" "', argument " "1"" of type '" "SerialForwarder *""'"); } arg1 = reinterpret_cast< SerialForwarder * >(argp1); res2 = SWIG_ConvertPtr(obj1,SWIG_as_voidptrptr(&arg2), 0, 0); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "SerialForwarder_forwardPacket" "', argument " "2"" of type '" "void const *""'"); } ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "SerialForwarder_forwardPacket" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); (arg1)->forwardPacket((void const *)arg2,arg3); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *SerialForwarder_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_SerialForwarder, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Throttle(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; int arg2 ; Throttle *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:new_Throttle",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "new_Throttle" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "new_Throttle" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); result = (Throttle *)new Throttle(arg1,arg2); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Throttle, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Throttle(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Throttle *arg1 = (Throttle *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Throttle",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Throttle" "', argument " "1"" of type '" "Throttle *""'"); } arg1 = reinterpret_cast< Throttle * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Throttle_initialize(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Throttle *arg1 = (Throttle *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Throttle_initialize",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Throttle_initialize" "', argument " "1"" of type '" "Throttle *""'"); } arg1 = reinterpret_cast< Throttle * >(argp1); (arg1)->initialize(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Throttle_finalize(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Throttle *arg1 = (Throttle *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Throttle_finalize",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Throttle_finalize" "', argument " "1"" of type '" "Throttle *""'"); } arg1 = reinterpret_cast< Throttle * >(argp1); (arg1)->finalize(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Throttle_checkThrottle(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Throttle *arg1 = (Throttle *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Throttle_checkThrottle",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Throttle_checkThrottle" "', argument " "1"" of type '" "Throttle *""'"); } arg1 = reinterpret_cast< Throttle * >(argp1); (arg1)->checkThrottle(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Throttle_printStatistics(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Throttle *arg1 = (Throttle *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Throttle_printStatistics",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Throttle_printStatistics" "', argument " "1"" of type '" "Throttle *""'"); } arg1 = reinterpret_cast< Throttle * >(argp1); (arg1)->printStatistics(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Throttle_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Throttle, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_variable_string_t_type_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; char *arg2 = (char *) 0 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_type_set",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_type_set" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "variable_string_t_type_set" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); if (arg1->type) delete[] arg1->type; if (arg2) { size_t size = strlen(reinterpret_cast< const char * >(arg2)) + 1; arg1->type = (char *)reinterpret_cast< char* >(memcpy((new char[size]), reinterpret_cast< const char * >(arg2), sizeof(char)*(size))); } else { arg1->type = 0; } resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_type_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_type_get",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_type_get" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); result = (char *) ((arg1)->type); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_ptr_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; char *arg2 = (char *) 0 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_ptr_set",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_ptr_set" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "variable_string_t_ptr_set" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); if (arg1->ptr) delete[] arg1->ptr; if (arg2) { size_t size = strlen(reinterpret_cast< const char * >(arg2)) + 1; arg1->ptr = (char *)reinterpret_cast< char* >(memcpy((new char[size]), reinterpret_cast< const char * >(arg2), sizeof(char)*(size))); } else { arg1->ptr = 0; } resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_ptr_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_ptr_get",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_ptr_get" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); result = (char *) ((arg1)->ptr); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_len_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_len_set",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_len_set" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "variable_string_t_len_set" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); if (arg1) (arg1)->len = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_len_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_len_get",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_len_get" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); result = (int) ((arg1)->len); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_isArray_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_isArray_set",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_isArray_set" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "variable_string_t_isArray_set" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); if (arg1) (arg1)->isArray = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_isArray_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_isArray_get",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_isArray_get" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); result = (int) ((arg1)->isArray); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_new_variable_string_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_variable_string_t")) SWIG_fail; result = (variable_string_t *)new variable_string_t(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_var_string, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_variable_string_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_variable_string_t",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_variable_string_t" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *variable_string_t_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_var_string, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_nesc_app_t_numVariables_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; int arg2 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_numVariables_set",&obj0,&obj1)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "nesc_app_t_numVariables_set" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); if (arg1) (arg1)->numVariables = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_numVariables_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; int result; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_numVariables_get",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } result = (int) ((arg1)->numVariables); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableNames_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; char **arg2 = (char **) 0 ; void *argp2 = 0 ; int res2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableNames_set",&obj0,&obj1)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_p_char, 0 | 0 ); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableNames_set" "', argument " "2"" of type '" "char **""'"); } arg2 = reinterpret_cast< char ** >(argp2); if (arg1) (arg1)->variableNames = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableNames_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; char **result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableNames_get",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } result = (char **) ((arg1)->variableNames); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_p_char, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableTypes_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; char **arg2 = (char **) 0 ; void *argp2 = 0 ; int res2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableTypes_set",&obj0,&obj1)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_p_char, 0 | 0 ); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableTypes_set" "', argument " "2"" of type '" "char **""'"); } arg2 = reinterpret_cast< char ** >(argp2); if (arg1) (arg1)->variableTypes = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableTypes_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; char **result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableTypes_get",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } result = (char **) ((arg1)->variableTypes); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_p_char, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableArray_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; int *arg2 = (int *) 0 ; void *argp2 = 0 ; int res2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableArray_set",&obj0,&obj1)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_int, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableArray_set" "', argument " "2"" of type '" "int *""'"); } arg2 = reinterpret_cast< int * >(argp2); if (arg1) (arg1)->variableArray = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableArray_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; int *result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableArray_get",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } result = (int *) ((arg1)->variableArray); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_int, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_new_nesc_app_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_nesc_app_t")) SWIG_fail; result = (nesc_app_t *)new nesc_app_t(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_nesc_app, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_nesc_app_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_nesc_app_t",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *nesc_app_t_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_nesc_app, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Variable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; char *arg1 = (char *) 0 ; char *arg2 = (char *) 0 ; int arg3 ; int arg4 ; Variable *result = 0 ; int res1 ; char *buf1 = 0 ; int alloc1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; int val3 ; int ecode3 = 0 ; int val4 ; int ecode4 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; PyObject * obj3 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOOO:new_Variable",&obj0,&obj1,&obj2,&obj3)) SWIG_fail; res1 = SWIG_AsCharPtrAndSize(obj0, &buf1, NULL, &alloc1); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "new_Variable" "', argument " "1"" of type '" "char *""'"); } arg1 = reinterpret_cast< char * >(buf1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "new_Variable" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "new_Variable" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); ecode4 = SWIG_AsVal_int(obj3, &val4); if (!SWIG_IsOK(ecode4)) { SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "new_Variable" "', argument " "4"" of type '" "int""'"); } arg4 = static_cast< int >(val4); result = (Variable *)new Variable(arg1,arg2,arg3,arg4); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Variable, SWIG_POINTER_NEW | 0 ); if (alloc1 == SWIG_NEWOBJ) delete[] buf1; if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc1 == SWIG_NEWOBJ) delete[] buf1; if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_delete_Variable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Variable *arg1 = (Variable *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Variable",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Variable, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Variable" "', argument " "1"" of type '" "Variable *""'"); } arg1 = reinterpret_cast< Variable * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Variable_getData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Variable *arg1 = (Variable *) 0 ; variable_string_t result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Variable_getData",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Variable, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Variable_getData" "', argument " "1"" of type '" "Variable *""'"); } arg1 = reinterpret_cast< Variable * >(argp1); result = (arg1)->getData(); { if ((&result)->isArray) { //printf("Generating array %s\n", (&result)->type); resultobj = listFromArray ((&result)->type, (&result)->ptr, (&result)->len); } else { //printf("Generating scalar %s\n", (&result)->type); resultobj = valueFromScalar((&result)->type, (&result)->ptr, (&result)->len); } if (resultobj == NULL) { PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable."); } } return resultobj; fail: return NULL; } SWIGINTERN PyObject *Variable_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Variable, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Mote(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; Mote *result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:new_Mote",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } result = (Mote *)new Mote(arg1); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Mote(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Mote",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Mote" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_id(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; unsigned long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_id",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_id" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); result = (unsigned long)(arg1)->id(); resultobj = SWIG_From_unsigned_SS_long(static_cast< unsigned long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_euid(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; long long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_euid",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_euid" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); result = (long long)(arg1)->euid(); resultobj = SWIG_From_long_SS_long(static_cast< long long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_setEuid(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; long long arg2 ; void *argp1 = 0 ; int res1 = 0 ; long long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_setEuid",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_setEuid" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_setEuid" "', argument " "2"" of type '" "long long""'"); } arg2 = static_cast< long long >(val2); (arg1)->setEuid(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_bootTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; long long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_bootTime",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_bootTime" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); result = (long long)(arg1)->bootTime(); resultobj = SWIG_From_long_SS_long(static_cast< long long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_bootAtTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; long long arg2 ; void *argp1 = 0 ; int res1 = 0 ; long long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_bootAtTime",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_bootAtTime" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_bootAtTime" "', argument " "2"" of type '" "long long""'"); } arg2 = static_cast< long long >(val2); (arg1)->bootAtTime(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_isOn(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; bool result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_isOn",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_isOn" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); result = (bool)(arg1)->isOn(); resultobj = SWIG_From_bool(static_cast< bool >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_turnOff(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_turnOff",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_turnOff" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); (arg1)->turnOff(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_turnOn(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_turnOn",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_turnOn" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); (arg1)->turnOn(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_getVariable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; char *arg2 = (char *) 0 ; Variable *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_getVariable",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_getVariable" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Mote_getVariable" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); result = (Variable *)(arg1)->getVariable(arg2); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Variable, 0 | 0 ); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_Mote_addNoiseTraceReading(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_addNoiseTraceReading",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_addNoiseTraceReading" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_addNoiseTraceReading" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->addNoiseTraceReading(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_createNoiseModel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_createNoiseModel",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_createNoiseModel" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); (arg1)->createNoiseModel(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_generateNoise(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; int arg2 ; int result; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_generateNoise",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_generateNoise" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_generateNoise" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); result = (int)(arg1)->generateNoise(arg2); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Mote_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Mote, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Tossim(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; Tossim *result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:new_Tossim",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = ""; app->variableTypes[i] = ""; } } arg1 = app; } } result = (Tossim *)new Tossim(arg1); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Tossim, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Tossim(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Tossim",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Tossim" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_init(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_init",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_init" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); (arg1)->init(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_time(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; long long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_time",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_time" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (long long)(arg1)->time(); resultobj = SWIG_From_long_SS_long(static_cast< long long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_ticksPerSecond(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; long long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_ticksPerSecond",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_ticksPerSecond" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (long long)(arg1)->ticksPerSecond(); resultobj = SWIG_From_long_SS_long(static_cast< long long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_setTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; long long arg2 ; void *argp1 = 0 ; int res1 = 0 ; long long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_setTime",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_setTime" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_setTime" "', argument " "2"" of type '" "long long""'"); } arg2 = static_cast< long long >(val2); (arg1)->setTime(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_timeStr(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_timeStr",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_timeStr" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (char *)(arg1)->timeStr(); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_currentNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; Mote *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_currentNode",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_currentNode" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (Mote *)(arg1)->currentNode(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_getNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; unsigned long arg2 ; Mote *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; unsigned long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_getNode",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_getNode" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_unsigned_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_getNode" "', argument " "2"" of type '" "unsigned long""'"); } arg2 = static_cast< unsigned long >(val2); result = (Mote *)(arg1)->getNode(arg2); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_setCurrentNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; unsigned long arg2 ; void *argp1 = 0 ; int res1 = 0 ; unsigned long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_setCurrentNode",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_setCurrentNode" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_unsigned_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_setCurrentNode" "', argument " "2"" of type '" "unsigned long""'"); } arg2 = static_cast< unsigned long >(val2); (arg1)->setCurrentNode(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_addChannel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; char *arg2 = (char *) 0 ; FILE *arg3 = (FILE *) 0 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Tossim_addChannel",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_addChannel" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Tossim_addChannel" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); { if (!PyFile_Check(obj2)) { PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter."); return NULL; } arg3 = PyFile_AsFile(obj2); } (arg1)->addChannel(arg2,arg3); resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_Tossim_removeChannel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; char *arg2 = (char *) 0 ; FILE *arg3 = (FILE *) 0 ; bool result; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Tossim_removeChannel",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_removeChannel" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Tossim_removeChannel" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); { if (!PyFile_Check(obj2)) { PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter."); return NULL; } arg3 = PyFile_AsFile(obj2); } result = (bool)(arg1)->removeChannel(arg2,arg3); resultobj = SWIG_From_bool(static_cast< bool >(result)); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_Tossim_randomSeed(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_randomSeed",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_randomSeed" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_randomSeed" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->randomSeed(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_runNextEvent(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; bool result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_runNextEvent",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_runNextEvent" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (bool)(arg1)->runNextEvent(); resultobj = SWIG_From_bool(static_cast< bool >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_mac(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; MAC *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_mac",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_mac" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (MAC *)(arg1)->mac(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_MAC, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; Radio *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_radio",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_radio" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (Radio *)(arg1)->radio(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Radio, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_newPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; Packet *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_newPacket",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_newPacket" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (Packet *)(arg1)->newPacket(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Packet, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_newSerialPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; SerialPacket *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_newSerialPacket",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_newSerialPacket" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (SerialPacket *)(arg1)->newSerialPacket(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_SerialPacket, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Tossim_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Tossim, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } static PyMethodDef SwigMethods[] = { { (char *)"new_MAC", _wrap_new_MAC, METH_VARARGS, NULL}, { (char *)"delete_MAC", _wrap_delete_MAC, METH_VARARGS, NULL}, { (char *)"MAC_initHigh", _wrap_MAC_initHigh, METH_VARARGS, NULL}, { (char *)"MAC_initLow", _wrap_MAC_initLow, METH_VARARGS, NULL}, { (char *)"MAC_high", _wrap_MAC_high, METH_VARARGS, NULL}, { (char *)"MAC_low", _wrap_MAC_low, METH_VARARGS, NULL}, { (char *)"MAC_symbolsPerSec", _wrap_MAC_symbolsPerSec, METH_VARARGS, NULL}, { (char *)"MAC_bitsPerSymbol", _wrap_MAC_bitsPerSymbol, METH_VARARGS, NULL}, { (char *)"MAC_preambleLength", _wrap_MAC_preambleLength, METH_VARARGS, NULL}, { (char *)"MAC_exponentBase", _wrap_MAC_exponentBase, METH_VARARGS, NULL}, { (char *)"MAC_maxIterations", _wrap_MAC_maxIterations, METH_VARARGS, NULL}, { (char *)"MAC_minFreeSamples", _wrap_MAC_minFreeSamples, METH_VARARGS, NULL}, { (char *)"MAC_rxtxDelay", _wrap_MAC_rxtxDelay, METH_VARARGS, NULL}, { (char *)"MAC_ackTime", _wrap_MAC_ackTime, METH_VARARGS, NULL}, { (char *)"MAC_setInitHigh", _wrap_MAC_setInitHigh, METH_VARARGS, NULL}, { (char *)"MAC_setInitLow", _wrap_MAC_setInitLow, METH_VARARGS, NULL}, { (char *)"MAC_setHigh", _wrap_MAC_setHigh, METH_VARARGS, NULL}, { (char *)"MAC_setLow", _wrap_MAC_setLow, METH_VARARGS, NULL}, { (char *)"MAC_setSymbolsPerSec", _wrap_MAC_setSymbolsPerSec, METH_VARARGS, NULL}, { (char *)"MAC_setBitsBerSymbol", _wrap_MAC_setBitsBerSymbol, METH_VARARGS, NULL}, { (char *)"MAC_setPreambleLength", _wrap_MAC_setPreambleLength, METH_VARARGS, NULL}, { (char *)"MAC_setExponentBase", _wrap_MAC_setExponentBase, METH_VARARGS, NULL}, { (char *)"MAC_setMaxIterations", _wrap_MAC_setMaxIterations, METH_VARARGS, NULL}, { (char *)"MAC_setMinFreeSamples", _wrap_MAC_setMinFreeSamples, METH_VARARGS, NULL}, { (char *)"MAC_setRxtxDelay", _wrap_MAC_setRxtxDelay, METH_VARARGS, NULL}, { (char *)"MAC_setAckTime", _wrap_MAC_setAckTime, METH_VARARGS, NULL}, { (char *)"MAC_swigregister", MAC_swigregister, METH_VARARGS, NULL}, { (char *)"new_Radio", _wrap_new_Radio, METH_VARARGS, NULL}, { (char *)"delete_Radio", _wrap_delete_Radio, METH_VARARGS, NULL}, { (char *)"Radio_add", _wrap_Radio_add, METH_VARARGS, NULL}, { (char *)"Radio_gain", _wrap_Radio_gain, METH_VARARGS, NULL}, { (char *)"Radio_connected", _wrap_Radio_connected, METH_VARARGS, NULL}, { (char *)"Radio_remove", _wrap_Radio_remove, METH_VARARGS, NULL}, { (char *)"Radio_setNoise", _wrap_Radio_setNoise, METH_VARARGS, NULL}, { (char *)"Radio_setSensitivity", _wrap_Radio_setSensitivity, METH_VARARGS, NULL}, { (char *)"Radio_swigregister", Radio_swigregister, METH_VARARGS, NULL}, { (char *)"new_Packet", _wrap_new_Packet, METH_VARARGS, NULL}, { (char *)"delete_Packet", _wrap_delete_Packet, METH_VARARGS, NULL}, { (char *)"Packet_setSource", _wrap_Packet_setSource, METH_VARARGS, NULL}, { (char *)"Packet_source", _wrap_Packet_source, METH_VARARGS, NULL}, { (char *)"Packet_setDestination", _wrap_Packet_setDestination, METH_VARARGS, NULL}, { (char *)"Packet_destination", _wrap_Packet_destination, METH_VARARGS, NULL}, { (char *)"Packet_setLength", _wrap_Packet_setLength, METH_VARARGS, NULL}, { (char *)"Packet_length", _wrap_Packet_length, METH_VARARGS, NULL}, { (char *)"Packet_setType", _wrap_Packet_setType, METH_VARARGS, NULL}, { (char *)"Packet_type", _wrap_Packet_type, METH_VARARGS, NULL}, { (char *)"Packet_data", _wrap_Packet_data, METH_VARARGS, NULL}, { (char *)"Packet_setData", _wrap_Packet_setData, METH_VARARGS, NULL}, { (char *)"Packet_maxLength", _wrap_Packet_maxLength, METH_VARARGS, NULL}, { (char *)"Packet_setStrength", _wrap_Packet_setStrength, METH_VARARGS, NULL}, { (char *)"Packet_deliver", _wrap_Packet_deliver, METH_VARARGS, NULL}, { (char *)"Packet_deliverNow", _wrap_Packet_deliverNow, METH_VARARGS, NULL}, { (char *)"Packet_swigregister", Packet_swigregister, METH_VARARGS, NULL}, { (char *)"new_SerialPacket", _wrap_new_SerialPacket, METH_VARARGS, NULL}, { (char *)"delete_SerialPacket", _wrap_delete_SerialPacket, METH_VARARGS, NULL}, { (char *)"SerialPacket_setDestination", _wrap_SerialPacket_setDestination, METH_VARARGS, NULL}, { (char *)"SerialPacket_destination", _wrap_SerialPacket_destination, METH_VARARGS, NULL}, { (char *)"SerialPacket_setLength", _wrap_SerialPacket_setLength, METH_VARARGS, NULL}, { (char *)"SerialPacket_length", _wrap_SerialPacket_length, METH_VARARGS, NULL}, { (char *)"SerialPacket_setType", _wrap_SerialPacket_setType, METH_VARARGS, NULL}, { (char *)"SerialPacket_type", _wrap_SerialPacket_type, METH_VARARGS, NULL}, { (char *)"SerialPacket_data", _wrap_SerialPacket_data, METH_VARARGS, NULL}, { (char *)"SerialPacket_setData", _wrap_SerialPacket_setData, METH_VARARGS, NULL}, { (char *)"SerialPacket_maxLength", _wrap_SerialPacket_maxLength, METH_VARARGS, NULL}, { (char *)"SerialPacket_deliver", _wrap_SerialPacket_deliver, METH_VARARGS, NULL}, { (char *)"SerialPacket_deliverNow", _wrap_SerialPacket_deliverNow, METH_VARARGS, NULL}, { (char *)"SerialPacket_swigregister", SerialPacket_swigregister, METH_VARARGS, NULL}, { (char *)"new_SerialForwarder", _wrap_new_SerialForwarder, METH_VARARGS, NULL}, { (char *)"delete_SerialForwarder", _wrap_delete_SerialForwarder, METH_VARARGS, NULL}, { (char *)"SerialForwarder_process", _wrap_SerialForwarder_process, METH_VARARGS, NULL}, { (char *)"SerialForwarder_dispatchPacket", _wrap_SerialForwarder_dispatchPacket, METH_VARARGS, NULL}, { (char *)"SerialForwarder_forwardPacket", _wrap_SerialForwarder_forwardPacket, METH_VARARGS, NULL}, { (char *)"SerialForwarder_swigregister", SerialForwarder_swigregister, METH_VARARGS, NULL}, { (char *)"new_Throttle", _wrap_new_Throttle, METH_VARARGS, NULL}, { (char *)"delete_Throttle", _wrap_delete_Throttle, METH_VARARGS, NULL}, { (char *)"Throttle_initialize", _wrap_Throttle_initialize, METH_VARARGS, NULL}, { (char *)"Throttle_finalize", _wrap_Throttle_finalize, METH_VARARGS, NULL}, { (char *)"Throttle_checkThrottle", _wrap_Throttle_checkThrottle, METH_VARARGS, NULL}, { (char *)"Throttle_printStatistics", _wrap_Throttle_printStatistics, METH_VARARGS, NULL}, { (char *)"Throttle_swigregister", Throttle_swigregister, METH_VARARGS, NULL}, { (char *)"variable_string_t_type_set", _wrap_variable_string_t_type_set, METH_VARARGS, NULL}, { (char *)"variable_string_t_type_get", _wrap_variable_string_t_type_get, METH_VARARGS, NULL}, { (char *)"variable_string_t_ptr_set", _wrap_variable_string_t_ptr_set, METH_VARARGS, NULL}, { (char *)"variable_string_t_ptr_get", _wrap_variable_string_t_ptr_get, METH_VARARGS, NULL}, { (char *)"variable_string_t_len_set", _wrap_variable_string_t_len_set, METH_VARARGS, NULL}, { (char *)"variable_string_t_len_get", _wrap_variable_string_t_len_get, METH_VARARGS, NULL}, { (char *)"variable_string_t_isArray_set", _wrap_variable_string_t_isArray_set, METH_VARARGS, NULL}, { (char *)"variable_string_t_isArray_get", _wrap_variable_string_t_isArray_get, METH_VARARGS, NULL}, { (char *)"new_variable_string_t", _wrap_new_variable_string_t, METH_VARARGS, NULL}, { (char *)"delete_variable_string_t", _wrap_delete_variable_string_t, METH_VARARGS, NULL}, { (char *)"variable_string_t_swigregister", variable_string_t_swigregister, METH_VARARGS, NULL}, { (char *)"nesc_app_t_numVariables_set", _wrap_nesc_app_t_numVariables_set, METH_VARARGS, NULL}, { (char *)"nesc_app_t_numVariables_get", _wrap_nesc_app_t_numVariables_get, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableNames_set", _wrap_nesc_app_t_variableNames_set, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableNames_get", _wrap_nesc_app_t_variableNames_get, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableTypes_set", _wrap_nesc_app_t_variableTypes_set, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableTypes_get", _wrap_nesc_app_t_variableTypes_get, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableArray_set", _wrap_nesc_app_t_variableArray_set, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableArray_get", _wrap_nesc_app_t_variableArray_get, METH_VARARGS, NULL}, { (char *)"new_nesc_app_t", _wrap_new_nesc_app_t, METH_VARARGS, NULL}, { (char *)"delete_nesc_app_t", _wrap_delete_nesc_app_t, METH_VARARGS, NULL}, { (char *)"nesc_app_t_swigregister", nesc_app_t_swigregister, METH_VARARGS, NULL}, { (char *)"new_Variable", _wrap_new_Variable, METH_VARARGS, NULL}, { (char *)"delete_Variable", _wrap_delete_Variable, METH_VARARGS, NULL}, { (char *)"Variable_getData", _wrap_Variable_getData, METH_VARARGS, NULL}, { (char *)"Variable_swigregister", Variable_swigregister, METH_VARARGS, NULL}, { (char *)"new_Mote", _wrap_new_Mote, METH_VARARGS, NULL}, { (char *)"delete_Mote", _wrap_delete_Mote, METH_VARARGS, NULL}, { (char *)"Mote_id", _wrap_Mote_id, METH_VARARGS, NULL}, { (char *)"Mote_euid", _wrap_Mote_euid, METH_VARARGS, NULL}, { (char *)"Mote_setEuid", _wrap_Mote_setEuid, METH_VARARGS, NULL}, { (char *)"Mote_bootTime", _wrap_Mote_bootTime, METH_VARARGS, NULL}, { (char *)"Mote_bootAtTime", _wrap_Mote_bootAtTime, METH_VARARGS, NULL}, { (char *)"Mote_isOn", _wrap_Mote_isOn, METH_VARARGS, NULL}, { (char *)"Mote_turnOff", _wrap_Mote_turnOff, METH_VARARGS, NULL}, { (char *)"Mote_turnOn", _wrap_Mote_turnOn, METH_VARARGS, NULL}, { (char *)"Mote_getVariable", _wrap_Mote_getVariable, METH_VARARGS, NULL}, { (char *)"Mote_addNoiseTraceReading", _wrap_Mote_addNoiseTraceReading, METH_VARARGS, NULL}, { (char *)"Mote_createNoiseModel", _wrap_Mote_createNoiseModel, METH_VARARGS, NULL}, { (char *)"Mote_generateNoise", _wrap_Mote_generateNoise, METH_VARARGS, NULL}, { (char *)"Mote_swigregister", Mote_swigregister, METH_VARARGS, NULL}, { (char *)"new_Tossim", _wrap_new_Tossim, METH_VARARGS, NULL}, { (char *)"delete_Tossim", _wrap_delete_Tossim, METH_VARARGS, NULL}, { (char *)"Tossim_init", _wrap_Tossim_init, METH_VARARGS, NULL}, { (char *)"Tossim_time", _wrap_Tossim_time, METH_VARARGS, NULL}, { (char *)"Tossim_ticksPerSecond", _wrap_Tossim_ticksPerSecond, METH_VARARGS, NULL}, { (char *)"Tossim_setTime", _wrap_Tossim_setTime, METH_VARARGS, NULL}, { (char *)"Tossim_timeStr", _wrap_Tossim_timeStr, METH_VARARGS, NULL}, { (char *)"Tossim_currentNode", _wrap_Tossim_currentNode, METH_VARARGS, NULL}, { (char *)"Tossim_getNode", _wrap_Tossim_getNode, METH_VARARGS, NULL}, { (char *)"Tossim_setCurrentNode", _wrap_Tossim_setCurrentNode, METH_VARARGS, NULL}, { (char *)"Tossim_addChannel", _wrap_Tossim_addChannel, METH_VARARGS, NULL}, { (char *)"Tossim_removeChannel", _wrap_Tossim_removeChannel, METH_VARARGS, NULL}, { (char *)"Tossim_randomSeed", _wrap_Tossim_randomSeed, METH_VARARGS, NULL}, { (char *)"Tossim_runNextEvent", _wrap_Tossim_runNextEvent, METH_VARARGS, NULL}, { (char *)"Tossim_mac", _wrap_Tossim_mac, METH_VARARGS, NULL}, { (char *)"Tossim_radio", _wrap_Tossim_radio, METH_VARARGS, NULL}, { (char *)"Tossim_newPacket", _wrap_Tossim_newPacket, METH_VARARGS, NULL}, { (char *)"Tossim_newSerialPacket", _wrap_Tossim_newSerialPacket, METH_VARARGS, NULL}, { (char *)"Tossim_swigregister", Tossim_swigregister, METH_VARARGS, NULL}, { NULL, NULL, 0, NULL } }; /* -------- TYPE CONVERSION AND EQUIVALENCE RULES (BEGIN) -------- */ static swig_type_info _swigt__p_FILE = {"_p_FILE", "FILE *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_MAC = {"_p_MAC", "MAC *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Mote = {"_p_Mote", "Mote *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Packet = {"_p_Packet", "Packet *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Radio = {"_p_Radio", "Radio *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_SerialForwarder = {"_p_SerialForwarder", "SerialForwarder *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_SerialPacket = {"_p_SerialPacket", "SerialPacket *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Throttle = {"_p_Throttle", "Throttle *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Tossim = {"_p_Tossim", "Tossim *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Variable = {"_p_Variable", "Variable *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_char = {"_p_char", "char *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_int = {"_p_int", "int *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_nesc_app = {"_p_nesc_app", "nesc_app *|nesc_app_t *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_p_char = {"_p_p_char", "char **", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_var_string = {"_p_var_string", "var_string *|variable_string_t *", 0, 0, (void*)0, 0}; static swig_type_info *swig_type_initial[] = { &_swigt__p_FILE, &_swigt__p_MAC, &_swigt__p_Mote, &_swigt__p_Packet, &_swigt__p_Radio, &_swigt__p_SerialForwarder, &_swigt__p_SerialPacket, &_swigt__p_Throttle, &_swigt__p_Tossim, &_swigt__p_Variable, &_swigt__p_char, &_swigt__p_int, &_swigt__p_nesc_app, &_swigt__p_p_char, &_swigt__p_var_string, }; static swig_cast_info _swigc__p_FILE[] = { {&_swigt__p_FILE, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_MAC[] = { {&_swigt__p_MAC, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Mote[] = { {&_swigt__p_Mote, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Packet[] = { {&_swigt__p_Packet, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Radio[] = { {&_swigt__p_Radio, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_SerialForwarder[] = { {&_swigt__p_SerialForwarder, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_SerialPacket[] = { {&_swigt__p_SerialPacket, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Throttle[] = { {&_swigt__p_Throttle, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Tossim[] = { {&_swigt__p_Tossim, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Variable[] = { {&_swigt__p_Variable, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_char[] = { {&_swigt__p_char, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_int[] = { {&_swigt__p_int, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_nesc_app[] = { {&_swigt__p_nesc_app, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_p_char[] = { {&_swigt__p_p_char, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_var_string[] = { {&_swigt__p_var_string, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info *swig_cast_initial[] = { _swigc__p_FILE, _swigc__p_MAC, _swigc__p_Mote, _swigc__p_Packet, _swigc__p_Radio, _swigc__p_SerialForwarder, _swigc__p_SerialPacket, _swigc__p_Throttle, _swigc__p_Tossim, _swigc__p_Variable, _swigc__p_char, _swigc__p_int, _swigc__p_nesc_app, _swigc__p_p_char, _swigc__p_var_string, }; /* -------- TYPE CONVERSION AND EQUIVALENCE RULES (END) -------- */ static swig_const_info swig_const_table[] = { {0, 0, 0, 0.0, 0, 0}}; #ifdef __cplusplus } #endif /* ----------------------------------------------------------------------------- * Type initialization: * This problem is tough by the requirement that no dynamic * memory is used. Also, since swig_type_info structures store pointers to * swig_cast_info structures and swig_cast_info structures store pointers back * to swig_type_info structures, we need some lookup code at initialization. * The idea is that swig generates all the structures that are needed. * The runtime then collects these partially filled structures. * The SWIG_InitializeModule function takes these initial arrays out of * swig_module, and does all the lookup, filling in the swig_module.types * array with the correct data and linking the correct swig_cast_info * structures together. * * The generated swig_type_info structures are assigned staticly to an initial * array. We just loop through that array, and handle each type individually. * First we lookup if this type has been already loaded, and if so, use the * loaded structure instead of the generated one. Then we have to fill in the * cast linked list. The cast data is initially stored in something like a * two-dimensional array. Each row corresponds to a type (there are the same * number of rows as there are in the swig_type_initial array). Each entry in * a column is one of the swig_cast_info structures for that type. * The cast_initial array is actually an array of arrays, because each row has * a variable number of columns. So to actually build the cast linked list, * we find the array of casts associated with the type, and loop through it * adding the casts to the list. The one last trick we need to do is making * sure the type pointer in the swig_cast_info struct is correct. * * First off, we lookup the cast->type name to see if it is already loaded. * There are three cases to handle: * 1) If the cast->type has already been loaded AND the type we are adding * casting info to has not been loaded (it is in this module), THEN we * replace the cast->type pointer with the type pointer that has already * been loaded. * 2) If BOTH types (the one we are adding casting info to, and the * cast->type) are loaded, THEN the cast info has already been loaded by * the previous module so we just ignore it. * 3) Finally, if cast->type has not already been loaded, then we add that * swig_cast_info to the linked list (because the cast->type) pointer will * be correct. * ----------------------------------------------------------------------------- */ #ifdef __cplusplus extern "C" { #if 0 } /* c-mode */ #endif #endif #if 0 #define SWIGRUNTIME_DEBUG #endif SWIGRUNTIME void SWIG_InitializeModule(void *clientdata) { size_t i; swig_module_info *module_head, *iter; int found; clientdata = clientdata; /* check to see if the circular list has been setup, if not, set it up */ if (swig_module.next==0) { /* Initialize the swig_module */ swig_module.type_initial = swig_type_initial; swig_module.cast_initial = swig_cast_initial; swig_module.next = &swig_module; } /* Try and load any already created modules */ module_head = SWIG_GetModule(clientdata); if (!module_head) { /* This is the first module loaded for this interpreter */ /* so set the swig module into the interpreter */ SWIG_SetModule(clientdata, &swig_module); module_head = &swig_module; } else { /* the interpreter has loaded a SWIG module, but has it loaded this one? */ found=0; iter=module_head; do { if (iter==&swig_module) { found=1; break; } iter=iter->next; } while (iter!= module_head); /* if the is found in the list, then all is done and we may leave */ if (found) return; /* otherwise we must add out module into the list */ swig_module.next = module_head->next; module_head->next = &swig_module; } /* Now work on filling in swig_module.types */ #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: size %d\n", swig_module.size); #endif for (i = 0; i < swig_module.size; ++i) { swig_type_info *type = 0; swig_type_info *ret; swig_cast_info *cast; #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: type %d %s\n", i, swig_module.type_initial[i]->name); #endif /* if there is another module already loaded */ if (swig_module.next != &swig_module) { type = SWIG_MangledTypeQueryModule(swig_module.next, &swig_module, swig_module.type_initial[i]->name); } if (type) { /* Overwrite clientdata field */ #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: found type %s\n", type->name); #endif if (swig_module.type_initial[i]->clientdata) { type->clientdata = swig_module.type_initial[i]->clientdata; #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: found and overwrite type %s \n", type->name); #endif } } else { type = swig_module.type_initial[i]; } /* Insert casting types */ cast = swig_module.cast_initial[i]; while (cast->type) { /* Don't need to add information already in the list */ ret = 0; #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: look cast %s\n", cast->type->name); #endif if (swig_module.next != &swig_module) { ret = SWIG_MangledTypeQueryModule(swig_module.next, &swig_module, cast->type->name); #ifdef SWIGRUNTIME_DEBUG if (ret) printf("SWIG_InitializeModule: found cast %s\n", ret->name); #endif } if (ret) { if (type == swig_module.type_initial[i]) { #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: skip old type %s\n", ret->name); #endif cast->type = ret; ret = 0; } else { /* Check for casting already in the list */ swig_cast_info *ocast = SWIG_TypeCheck(ret->name, type); #ifdef SWIGRUNTIME_DEBUG if (ocast) printf("SWIG_InitializeModule: skip old cast %s\n", ret->name); #endif if (!ocast) ret = 0; } } if (!ret) { #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: adding cast %s\n", cast->type->name); #endif if (type->cast) { type->cast->prev = cast; cast->next = type->cast; } type->cast = cast; } cast++; } /* Set entry in modules->types array equal to the type */ swig_module.types[i] = type; } swig_module.types[i] = 0; #ifdef SWIGRUNTIME_DEBUG printf("**** SWIG_InitializeModule: Cast List ******\n"); for (i = 0; i < swig_module.size; ++i) { int j = 0; swig_cast_info *cast = swig_module.cast_initial[i]; printf("SWIG_InitializeModule: type %d %s\n", i, swig_module.type_initial[i]->name); while (cast->type) { printf("SWIG_InitializeModule: cast type %s\n", cast->type->name); cast++; ++j; } printf("---- Total casts: %d\n",j); } printf("**** SWIG_InitializeModule: Cast List ******\n"); #endif } /* This function will propagate the clientdata field of type to * any new swig_type_info structures that have been added into the list * of equivalent types. It is like calling * SWIG_TypeClientData(type, clientdata) a second time. */ SWIGRUNTIME void SWIG_PropagateClientData(void) { size_t i; swig_cast_info *equiv; static int init_run = 0; if (init_run) return; init_run = 1; for (i = 0; i < swig_module.size; i++) { if (swig_module.types[i]->clientdata) { equiv = swig_module.types[i]->cast; while (equiv) { if (!equiv->converter) { if (equiv->type && !equiv->type->clientdata) SWIG_TypeClientData(equiv->type, swig_module.types[i]->clientdata); } equiv = equiv->next; } } } } #ifdef __cplusplus #if 0 { /* c-mode */ #endif } #endif #ifdef __cplusplus extern "C" { #endif /* Python-specific SWIG API */ #define SWIG_newvarlink() SWIG_Python_newvarlink() #define SWIG_addvarlink(p, name, get_attr, set_attr) SWIG_Python_addvarlink(p, name, get_attr, set_attr) #define SWIG_InstallConstants(d, constants) SWIG_Python_InstallConstants(d, constants) /* ----------------------------------------------------------------------------- * global variable support code. * ----------------------------------------------------------------------------- */ typedef struct swig_globalvar { char *name; /* Name of global variable */ PyObject *(*get_attr)(void); /* Return the current value */ int (*set_attr)(PyObject *); /* Set the value */ struct swig_globalvar *next; } swig_globalvar; typedef struct swig_varlinkobject { PyObject_HEAD swig_globalvar *vars; } swig_varlinkobject; SWIGINTERN PyObject * swig_varlink_repr(swig_varlinkobject *SWIGUNUSEDPARM(v)) { return PyString_FromString(""); } SWIGINTERN PyObject * swig_varlink_str(swig_varlinkobject *v) { PyObject *str = PyString_FromString("("); swig_globalvar *var; for (var = v->vars; var; var=var->next) { PyString_ConcatAndDel(&str,PyString_FromString(var->name)); if (var->next) PyString_ConcatAndDel(&str,PyString_FromString(", ")); } PyString_ConcatAndDel(&str,PyString_FromString(")")); return str; } SWIGINTERN int swig_varlink_print(swig_varlinkobject *v, FILE *fp, int SWIGUNUSEDPARM(flags)) { PyObject *str = swig_varlink_str(v); fprintf(fp,"Swig global variables "); fprintf(fp,"%s\n", PyString_AsString(str)); Py_DECREF(str); return 0; } SWIGINTERN void swig_varlink_dealloc(swig_varlinkobject *v) { swig_globalvar *var = v->vars; while (var) { swig_globalvar *n = var->next; free(var->name); free(var); var = n; } } SWIGINTERN PyObject * swig_varlink_getattr(swig_varlinkobject *v, char *n) { PyObject *res = NULL; swig_globalvar *var = v->vars; while (var) { if (strcmp(var->name,n) == 0) { res = (*var->get_attr)(); break; } var = var->next; } if (res == NULL && !PyErr_Occurred()) { PyErr_SetString(PyExc_NameError,"Unknown C global variable"); } return res; } SWIGINTERN int swig_varlink_setattr(swig_varlinkobject *v, char *n, PyObject *p) { int res = 1; swig_globalvar *var = v->vars; while (var) { if (strcmp(var->name,n) == 0) { res = (*var->set_attr)(p); break; } var = var->next; } if (res == 1 && !PyErr_Occurred()) { PyErr_SetString(PyExc_NameError,"Unknown C global variable"); } return res; } SWIGINTERN PyTypeObject* swig_varlink_type(void) { static char varlink__doc__[] = "Swig var link object"; static PyTypeObject varlink_type; static int type_init = 0; if (!type_init) { const PyTypeObject tmp = { PyObject_HEAD_INIT(NULL) 0, /* Number of items in variable part (ob_size) */ (char *)"swigvarlink", /* Type name (tp_name) */ sizeof(swig_varlinkobject), /* Basic size (tp_basicsize) */ 0, /* Itemsize (tp_itemsize) */ (destructor) swig_varlink_dealloc, /* Deallocator (tp_dealloc) */ (printfunc) swig_varlink_print, /* Print (tp_print) */ (getattrfunc) swig_varlink_getattr, /* get attr (tp_getattr) */ (setattrfunc) swig_varlink_setattr, /* Set attr (tp_setattr) */ 0, /* tp_compare */ (reprfunc) swig_varlink_repr, /* tp_repr */ 0, /* tp_as_number */ 0, /* tp_as_sequence */ 0, /* tp_as_mapping */ 0, /* tp_hash */ 0, /* tp_call */ (reprfunc)swig_varlink_str, /* tp_str */ 0, /* tp_getattro */ 0, /* tp_setattro */ 0, /* tp_as_buffer */ 0, /* tp_flags */ varlink__doc__, /* tp_doc */ 0, /* tp_traverse */ 0, /* tp_clear */ 0, /* tp_richcompare */ 0, /* tp_weaklistoffset */ #if PY_VERSION_HEX >= 0x02020000 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* tp_iter -> tp_weaklist */ #endif #if PY_VERSION_HEX >= 0x02030000 0, /* tp_del */ #endif #ifdef COUNT_ALLOCS 0,0,0,0 /* tp_alloc -> tp_next */ #endif }; varlink_type = tmp; varlink_type.ob_type = &PyType_Type; type_init = 1; } return &varlink_type; } /* Create a variable linking object for use later */ SWIGINTERN PyObject * SWIG_Python_newvarlink(void) { swig_varlinkobject *result = PyObject_NEW(swig_varlinkobject, swig_varlink_type()); if (result) { result->vars = 0; } return ((PyObject*) result); } SWIGINTERN void SWIG_Python_addvarlink(PyObject *p, char *name, PyObject *(*get_attr)(void), int (*set_attr)(PyObject *p)) { swig_varlinkobject *v = (swig_varlinkobject *) p; swig_globalvar *gv = (swig_globalvar *) malloc(sizeof(swig_globalvar)); if (gv) { size_t size = strlen(name)+1; gv->name = (char *)malloc(size); if (gv->name) { strncpy(gv->name,name,size); gv->get_attr = get_attr; gv->set_attr = set_attr; gv->next = v->vars; } } v->vars = gv; } SWIGINTERN PyObject * SWIG_globals(void) { static PyObject *_SWIG_globals = 0; if (!_SWIG_globals) _SWIG_globals = SWIG_newvarlink(); return _SWIG_globals; } /* ----------------------------------------------------------------------------- * constants/methods manipulation * ----------------------------------------------------------------------------- */ /* Install Constants */ SWIGINTERN void SWIG_Python_InstallConstants(PyObject *d, swig_const_info constants[]) { PyObject *obj = 0; size_t i; for (i = 0; constants[i].type; ++i) { switch(constants[i].type) { case SWIG_PY_POINTER: obj = SWIG_NewPointerObj(constants[i].pvalue, *(constants[i]).ptype,0); break; case SWIG_PY_BINARY: obj = SWIG_NewPackedObj(constants[i].pvalue, constants[i].lvalue, *(constants[i].ptype)); break; default: obj = 0; break; } if (obj) { PyDict_SetItemString(d, constants[i].name, obj); Py_DECREF(obj); } } } /* -----------------------------------------------------------------------------*/ /* Fix SwigMethods to carry the callback ptrs when needed */ /* -----------------------------------------------------------------------------*/ SWIGINTERN void SWIG_Python_FixMethods(PyMethodDef *methods, swig_const_info *const_table, swig_type_info **types, swig_type_info **types_initial) { size_t i; for (i = 0; methods[i].ml_name; ++i) { const char *c = methods[i].ml_doc; if (c && (c = strstr(c, "swig_ptr: "))) { int j; swig_const_info *ci = 0; const char *name = c + 10; for (j = 0; const_table[j].type; ++j) { if (strncmp(const_table[j].name, name, strlen(const_table[j].name)) == 0) { ci = &(const_table[j]); break; } } if (ci) { size_t shift = (ci->ptype) - types; swig_type_info *ty = types_initial[shift]; size_t ldoc = (c - methods[i].ml_doc); size_t lptr = strlen(ty->name)+2*sizeof(void*)+2; char *ndoc = (char*)malloc(ldoc + lptr + 10); if (ndoc) { char *buff = ndoc; void *ptr = (ci->type == SWIG_PY_POINTER) ? ci->pvalue : 0; if (ptr) { strncpy(buff, methods[i].ml_doc, ldoc); buff += ldoc; strncpy(buff, "swig_ptr: ", 10); buff += 10; SWIG_PackVoidPtr(buff, ptr, ty->name, lptr); methods[i].ml_doc = ndoc; } } } } } } #ifdef __cplusplus } #endif /* -----------------------------------------------------------------------------* * Partial Init method * -----------------------------------------------------------------------------*/ #ifdef __cplusplus extern "C" #endif SWIGEXPORT void SWIG_init(void) { PyObject *m, *d; /* Fix SwigMethods to carry the callback ptrs when needed */ SWIG_Python_FixMethods(SwigMethods, swig_const_table, swig_types, swig_type_initial); m = Py_InitModule((char *) SWIG_name, SwigMethods); d = PyModule_GetDict(m); SWIG_InitializeModule(0); SWIG_InstallConstants(d,swig_const_table); } tinyos-2.1.2+dfsg/tos/lib/tossim/sim_binary.c000066400000000000000000000047101207233610700211540ustar00rootroot00000000000000#include link_t* connectivity[TOSSIM_MAX_NODES]; link_t* allocate_link(int mote); void deallocate_link(link_t* link); link_t* sim_binary_first(int src) __attribute__ ((C, spontaneous)) { return connectivity[src]; } link_t* sim_binary_next(link_t* link) __attribute__ ((C, spontaneous)) { return link->next; } void sim_binary_add(int src, int dest, double packetLoss) __attribute__ ((C, spontaneous)) { link_t* current; int temp = sim_node(); sim_set_node(src); current = connectivity[src]; while (current != NULL) { if (current->mote == dest) { sim_set_node(temp); break; } current = current->next; } if (current == NULL) { current = allocate_link(dest); } current->mote = dest; current->loss = packetLoss; current->next = connectivity[src]; connectivity[src] = current; dbg("Binary", "Adding link from %i to %i with loss %llf\n", src, dest, packetLoss); sim_set_node(temp); } double sim_binary_loss(int src, int dest) __attribute__ ((C, spontaneous)) { link_t* current; int temp = sim_node(); sim_set_node(src); current = connectivity[src]; while (current != NULL) { if (current->mote == dest) { sim_set_node(temp); return current->loss; } current = current->next; } sim_set_node(temp); return 1.0; } bool sim_binary_connected(int src, int dest) __attribute__ ((C, spontaneous)) { link_t* current; int temp = sim_node(); sim_set_node(src); current = connectivity[src]; while (current != NULL) { if (current->mote == dest) { sim_set_node(temp); return TRUE; } current = current->next; } sim_set_node(temp); return FALSE; } void sim_binary_remove(int src, int dest) __attribute__ ((C, spontaneous)) { link_t* current; link_t* prevLink; int temp = sim_node(); sim_set_node(src); current = connectivity[src]; prevLink = NULL; while (current != NULL) { if (current->mote == dest) { if (prevLink == NULL) { connectivity[src] = current->next; } else { prevLink->next = current->next; } deallocate_link(current); current = prevLink->next; } else { prevLink = current; current = current->next; } } sim_set_node(temp); } link_t* allocate_link(int mote) { link_t* link = (link_t*)malloc(sizeof(link_t)); link->next = NULL; link->mote = mote; link->loss = 1.0; return link; } void deallocate_link(link_t* link) { free(link); } tinyos-2.1.2+dfsg/tos/lib/tossim/sim_binary.h000066400000000000000000000044241207233610700211630ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The C functions representing the TOSSIM binary interference * model. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: sim_binary.h,v 1.5 2010-06-29 22:07:51 scipio Exp $ #ifndef SIM_BINARY_H_INCLUDED #define SIM_BINARY_H_INCLUDED #ifdef __cplusplus extern "C" { #endif typedef struct link { int mote; double loss; struct link* next; } link_t; void sim_binary_add(int src, int dest, double packetLoss); double sim_binary_loss(int src, int dest); bool sim_binary_connected(int src, int dest); void sim_binary_remove(int src, int dest); link_t* sim_binary_first(int src); link_t* sim_binary_next(link_t* link); #ifdef __cplusplus } #endif #endif // SIM_BINARY_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sim_csma.c000066400000000000000000000107331207233610700206150ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * C implementation of configuration parameters for a CSMA link. * * @author Philip Levis * @date Dec 10 2005 */ // $Id: sim_csma.c,v 1.5 2010-06-29 22:07:51 scipio Exp $ #include int csmaInitHigh = SIM_CSMA_INIT_HIGH; int csmaInitLow = SIM_CSMA_INIT_LOW; int csmaHigh = SIM_CSMA_HIGH; int csmaLow = SIM_CSMA_LOW; int csmaSymbolsPerSec = SIM_CSMA_SYMBOLS_PER_SEC; int csmaBitsPerSymbol = SIM_CSMA_BITS_PER_SYMBOL; int csmaPreambleLength = SIM_CSMA_PREAMBLE_LENGTH; int csmaExponentBase = SIM_CSMA_EXPONENT_BASE; int csmaMaxIterations = SIM_CSMA_MAX_ITERATIONS; int csmaMinFreeSamples = SIM_CSMA_MIN_FREE_SAMPLES; int csmaRxTxDelay = SIM_CSMA_RXTX_DELAY; int csmaAckTime = SIM_CSMA_ACK_TIME; int sim_csma_init_high() __attribute__ ((C, spontaneous)) { return csmaInitHigh; } int sim_csma_init_low() __attribute__ ((C, spontaneous)) { return csmaInitLow; } int sim_csma_high() __attribute__ ((C, spontaneous)) { return csmaHigh; } int sim_csma_low() __attribute__ ((C, spontaneous)) { return csmaLow; } int sim_csma_symbols_per_sec() __attribute__ ((C, spontaneous)) { return csmaSymbolsPerSec; } int sim_csma_bits_per_symbol() __attribute__ ((C, spontaneous)) { return csmaBitsPerSymbol; } int sim_csma_preamble_length() __attribute__ ((C, spontaneous)) { return csmaPreambleLength; } int sim_csma_exponent_base() __attribute__ ((C, spontaneous)) { return csmaExponentBase;; } int sim_csma_max_iterations() __attribute__ ((C, spontaneous)) { return csmaMaxIterations; } int sim_csma_min_free_samples() __attribute__ ((C, spontaneous)) { return csmaMinFreeSamples; } int sim_csma_rxtx_delay() __attribute__ ((C, spontaneous)) { return csmaRxTxDelay; } int sim_csma_ack_time() __attribute__ ((C, spontaneous)) { return csmaAckTime; } void sim_csma_set_init_high(int val) __attribute__ ((C, spontaneous)) { csmaInitHigh = val; } void sim_csma_set_init_low(int val) __attribute__ ((C, spontaneous)) { csmaInitLow = val; } void sim_csma_set_high(int val) __attribute__ ((C, spontaneous)) { csmaHigh = val; } void sim_csma_set_low(int val) __attribute__ ((C, spontaneous)) { csmaLow = val; } void sim_csma_set_symbols_per_sec(int val) __attribute__ ((C, spontaneous)) { csmaSymbolsPerSec = val; } void sim_csma_set_bits_per_symbol(int val) __attribute__ ((C, spontaneous)) { csmaBitsPerSymbol = val; } void sim_csma_set_preamble_length(int val) __attribute__ ((C, spontaneous)) { csmaPreambleLength = val; } void sim_csma_set_exponent_base(int val) __attribute__ ((C, spontaneous)) { csmaExponentBase = val; } void sim_csma_set_max_iterations(int val) __attribute__ ((C, spontaneous)) { csmaMaxIterations = val; } void sim_csma_set_min_free_samples(int val) __attribute__ ((C, spontaneous)) { csmaMinFreeSamples = val; } void sim_csma_set_rxtx_delay(int val) __attribute__ ((C, spontaneous)) { csmaRxTxDelay = val; } void sim_csma_set_ack_time(int val) __attribute__ ((C, spontaneous)) { csmaAckTime = val; } tinyos-2.1.2+dfsg/tos/lib/tossim/sim_csma.h000066400000000000000000000072531207233610700206250ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * Configuration parameters for a CSMA link. * * @author Philip Levis * @date Dec 10 2005 */ // $Id: sim_csma.h,v 1.6 2010-06-29 22:07:51 scipio Exp $ #ifndef SIM_CSMA_H_INCLUDED #define SIM_CSMA_H_INCLUDED #ifndef SIM_CSMA_INIT_HIGH #define SIM_CSMA_INIT_HIGH 640 #endif #ifndef SIM_CSMA_INIT_LOW #define SIM_CSMA_INIT_LOW 20 #endif #ifndef SIM_CSMA_HIGH #define SIM_CSMA_HIGH 160 #endif #ifndef SIM_CSMA_LOW #define SIM_CSMA_LOW 20 #endif #ifndef SIM_CSMA_SYMBOLS_PER_SEC #define SIM_CSMA_SYMBOLS_PER_SEC 65536 #endif #ifndef SIM_CSMA_BITS_PER_SYMBOL #define SIM_CSMA_BITS_PER_SYMBOL 4 #endif #ifndef SIM_CSMA_PREAMBLE_LENGTH #define SIM_CSMA_PREAMBLE_LENGTH 12 #endif #ifndef SIM_CSMA_MAX_ITERATIONS #define SIM_CSMA_MAX_ITERATIONS 0 #endif #ifndef SIM_CSMA_EXPONENT_BASE #define SIM_CSMA_EXPONENT_BASE 1 #endif #ifndef SIM_CSMA_MIN_FREE_SAMPLES #define SIM_CSMA_MIN_FREE_SAMPLES 1 #endif // 500 us ~= 32 symbols #ifndef SIM_CSMA_RXTX_DELAY #define SIM_CSMA_RXTX_DELAY 11 #endif // 12 symbol delay + 11 bytes length * (2 bytes/symbol) = 34 symbols #ifndef SIM_CSMA_ACK_TIME #define SIM_CSMA_ACK_TIME 34 #endif #ifdef __cplusplus extern "C" { #endif int sim_csma_init_high(); int sim_csma_init_low(); int sim_csma_high(); int sim_csma_low(); int sim_csma_symbols_per_sec(); int sim_csma_bits_per_symbol(); int sim_csma_preamble_length(); // in symbols int sim_csma_exponent_base(); int sim_csma_max_iterations(); int sim_csma_min_free_samples(); int sim_csma_rxtx_delay(); int sim_csma_ack_time(); // in symbols void sim_csma_set_init_high(int val); void sim_csma_set_init_low(int val); void sim_csma_set_high(int val); void sim_csma_set_low(int val); void sim_csma_set_symbols_per_sec(int val); void sim_csma_set_bits_per_symbol(int val); void sim_csma_set_preamble_length(int val); // in symbols void sim_csma_set_exponent_base(int val); void sim_csma_set_max_iterations(int val); void sim_csma_set_min_free_samples(int val); void sim_csma_set_rxtx_delay(int val); void sim_csma_set_ack_time(int val); // in symbols #ifdef __cplusplus } #endif #endif // SIM_TOSSIM_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sim_event_queue.c000066400000000000000000000065551207233610700222260ustar00rootroot00000000000000// $Id: sim_event_queue.c,v 1.6 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The simple TOSSIM wrapper around the underlying heap. * * @author Phil Levis * @date November 22 2005 */ #include #include static heap_t eventHeap; void sim_queue_init() __attribute__ ((C, spontaneous)) { init_heap(&eventHeap); } void sim_queue_insert(sim_event_t* event) __attribute__ ((C, spontaneous)) { dbg("Queue", "Inserting 0x%p\n", event); heap_insert(&eventHeap, event, event->time); } sim_event_t* sim_queue_pop() __attribute__ ((C, spontaneous)) { long long int key; return (sim_event_t*)(heap_pop_min_data(&eventHeap, &key)); } bool sim_queue_is_empty() __attribute__ ((C, spontaneous)) { return heap_is_empty(&eventHeap); } long long int sim_queue_peek_time() __attribute__ ((C, spontaneous)) { if (heap_is_empty(&eventHeap)) { return -1; } else { return heap_get_min_key(&eventHeap); } } void sim_queue_cleanup_none(sim_event_t* event) __attribute__ ((C, spontaneous)) { dbg("Queue", "cleanup_none: 0x%p\n", event); // Do nothing. Useful for statically allocated events. } void sim_queue_cleanup_event(sim_event_t* event) __attribute__ ((C, spontaneous)) { dbg("Queue", "cleanup_event: 0x%p\n", event); free(event); } void sim_queue_cleanup_data(sim_event_t* event) __attribute__ ((C, spontaneous)) { dbg("Queue", "cleanup_data: 0x%p\n", event); free (event->data); event->data = NULL; } void sim_queue_cleanup_total(sim_event_t* event) __attribute__ ((C, spontaneous)) { dbg("Queue", "cleanup_total: 0x%p\n", event); free (event->data); event->data = NULL; free (event); } sim_event_t* sim_queue_allocate_event() { sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t)); memset(evt, 0, sizeof(sim_event_t)); evt->mote = sim_node(); return evt; } tinyos-2.1.2+dfsg/tos/lib/tossim/sim_event_queue.h000066400000000000000000000055371207233610700222320ustar00rootroot00000000000000// $Id: sim_event_queue.h,v 1.6 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The event queue is the core of the mote side of TOSSIM. It is a * wrapper around the underlying heap. Unlike the 1.x version, it is * not re-entrant: merging the Python console and TOSSIM means that * functionality like packet injection/reception from external tools * is on the Python side. * * @author Phil Levis * @date November 22 2005 */ #ifndef SIM_EVENT_QUEUE_H_INCLUDED #define SIM_EVENT_QUEUE_H_INCLUDED #include struct sim_event; typedef struct sim_event sim_event_t; struct sim_event { sim_time_t time; unsigned long mote; bool force; // Whether this event type should always be executed // even if a mote is "turned off" bool cancelled; // Whether this event has been cancelled void* data; void (*handle)(sim_event_t* e); void (*cleanup)(sim_event_t* e); }; sim_event_t* sim_queue_allocate_event(); void sim_queue_init(); void sim_queue_insert(sim_event_t* event); bool sim_queue_is_empty(); long long int sim_queue_peek_time(); sim_event_t* sim_queue_pop(); void sim_queue_cleanup_none(sim_event_t* e); void sim_queue_cleanup_event(sim_event_t* e); void sim_queue_cleanup_data(sim_event_t* e) ; void sim_queue_cleanup_total(sim_event_t* e); #endif // EVENT_QUEUE_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sim_gain.c000066400000000000000000000105231207233610700206050ustar00rootroot00000000000000#include typedef struct sim_gain_noise { double mean; double range; } sim_gain_noise_t; gain_entry_t* connectivity[TOSSIM_MAX_NODES + 1]; sim_gain_noise_t localNoise[TOSSIM_MAX_NODES + 1]; double sensitivity = 4.0; gain_entry_t* sim_gain_allocate_link(int mote); void sim_gain_deallocate_link(gain_entry_t* linkToDelete); gain_entry_t* sim_gain_first(int src) __attribute__ ((C, spontaneous)) { if (src > TOSSIM_MAX_NODES) { return connectivity[TOSSIM_MAX_NODES]; } return connectivity[src]; } gain_entry_t* sim_gain_next(gain_entry_t* currentLink) __attribute__ ((C, spontaneous)) { return currentLink->next; } void sim_gain_add(int src, int dest, double gain) __attribute__ ((C, spontaneous)) { gain_entry_t* current; int temp = sim_node(); if (src > TOSSIM_MAX_NODES) { src = TOSSIM_MAX_NODES; } sim_set_node(src); current = sim_gain_first(src); while (current != NULL) { if (current->mote == dest) { sim_set_node(temp); break; } current = current->next; } if (current == NULL) { current = sim_gain_allocate_link(dest); current->next = connectivity[src]; connectivity[src] = current; } current->mote = dest; current->gain = gain; dbg("Gain", "Adding link from %i to %i with gain %f\n", src, dest, gain); sim_set_node(temp); } double sim_gain_value(int src, int dest) __attribute__ ((C, spontaneous)) { gain_entry_t* current; int temp = sim_node(); sim_set_node(src); current = sim_gain_first(src); while (current != NULL) { if (current->mote == dest) { sim_set_node(temp); dbg("Gain", "Getting link from %i to %i with gain %f\n", src, dest, current->gain); return current->gain; } current = current->next; } sim_set_node(temp); dbg("Gain", "Getting default link from %i to %i with gain %f\n", src, dest, 1.0); return 1.0; } bool sim_gain_connected(int src, int dest) __attribute__ ((C, spontaneous)) { gain_entry_t* current; int temp = sim_node(); sim_set_node(src); current = sim_gain_first(src); while (current != NULL) { if (current->mote == dest) { sim_set_node(temp); return TRUE; } current = current->next; } sim_set_node(temp); return FALSE; } void sim_gain_remove(int src, int dest) __attribute__ ((C, spontaneous)) { gain_entry_t* current; gain_entry_t* prevLink; int temp = sim_node(); if (src > TOSSIM_MAX_NODES) { src = TOSSIM_MAX_NODES; } sim_set_node(src); current = sim_gain_first(src); prevLink = NULL; while (current != NULL) { gain_entry_t* tmp; if (current->mote == dest) { if (prevLink == NULL) { connectivity[src] = current->next; } else { prevLink->next = current->next; } tmp = current->next; sim_gain_deallocate_link(current); current = tmp; } else { prevLink = current; current = current->next; } } sim_set_node(temp); } void sim_gain_set_noise_floor(int node, double mean, double range) __attribute__ ((C, spontaneous)) { if (node > TOSSIM_MAX_NODES) { node = TOSSIM_MAX_NODES; } localNoise[node].mean = mean; localNoise[node].range = range; } double sim_gain_noise_mean(int node) { if (node > TOSSIM_MAX_NODES) { node = TOSSIM_MAX_NODES; } return localNoise[node].mean; } double sim_gain_noise_range(int node) { if (node > TOSSIM_MAX_NODES) { node = TOSSIM_MAX_NODES; } return localNoise[node].range; } // Pick a number a number from the uniform distribution of // [mean-range, mean+range]. double sim_gain_sample_noise(int node) __attribute__ ((C, spontaneous)) { double val, adjust; if (node > TOSSIM_MAX_NODES) { node = TOSSIM_MAX_NODES; } val = localNoise[node].mean; adjust = (sim_random() % 2000000); adjust /= 1000000.0; adjust -= 1.0; adjust *= localNoise[node].range; return val + adjust; } gain_entry_t* sim_gain_allocate_link(int mote) { gain_entry_t* newLink = (gain_entry_t*)malloc(sizeof(gain_entry_t)); newLink->next = NULL; newLink->mote = mote; newLink->gain = -10000000.0; return newLink; } void sim_gain_deallocate_link(gain_entry_t* linkToDelete) __attribute__ ((C, spontaneous)) { free(linkToDelete); } void sim_gain_set_sensitivity(double s) __attribute__ ((C, spontaneous)) { sensitivity = s; } double sim_gain_sensitivity() __attribute__ ((C, spontaneous)) { return sensitivity; } tinyos-2.1.2+dfsg/tos/lib/tossim/sim_gain.h000066400000000000000000000050311207233610700206100ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The C functions that allow TOSSIM-side code to access the SimMoteP * component. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: sim_gain.h,v 1.5 2010-06-29 22:07:51 scipio Exp $ #ifndef SIM_GAIN_H_INCLUDED #define SIM_GAIN_H_INCLUDED #ifdef __cplusplus extern "C" { #endif typedef struct gain_entry { int mote; double gain; struct gain_entry* next; } gain_entry_t; void sim_gain_add(int src, int dest, double gain); double sim_gain_value(int src, int dest); bool sim_gain_connected(int src, int dest); void sim_gain_remove(int src, int dest); void sim_gain_set_noise_floor(int node, double mean, double range); double sim_gain_sample_noise(int node); double sim_gain_noise_mean(int node); double sim_gain_noise_range(int node); void sim_gain_set_sensitivity(double value); double sim_gain_sensitivity(); gain_entry_t* sim_gain_first(int src); gain_entry_t* sim_gain_next(gain_entry_t* e); #ifdef __cplusplus } #endif #endif // SIM_GAIN_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sim_log.c000066400000000000000000000215161207233610700204540ustar00rootroot00000000000000// $Id: sim_log.c,v 1.7 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM logging system. * * @author Phil Levis * @date November 9 2005 */ #include #include #include #include #include enum { DEFAULT_CHANNEL_SIZE = 8 }; typedef struct sim_log_output { int num; FILE** files; } sim_log_output_t; typedef struct sim_log_channel { const char* name; int numOutputs; int size; FILE** outputs; } sim_log_channel_t; enum { SIM_LOG_OUTPUT_COUNT = uniqueCount("TOSSIM.debug") }; sim_log_output_t outputs[SIM_LOG_OUTPUT_COUNT]; struct hashtable* channelTable = NULL; static unsigned int sim_log_hash(void* key); static int sim_log_eq(void* key1, void* key2); // First we count how many outputs there are, // then allocate a FILE** large enough and fill it in. // This FILE** might be larger than needed, because // the outputs of the channels might have redundancies. // E.g., if two channels A and B are both to stdout, then // you don't want a channel of "A,B" to be doubly printed // to stdout. So when the channel's FILE*s are copied // into the debug point output array, this checks // for redundancies by checking file descriptors. static void fillInOutput(int id, char* name) { char* termination = name; char* namePos = name; int count = 0; char* newName = (char*)malloc(strlen(name) + 1); memset(newName, 0, strlen(name) + 1); // Count the outputs while (termination != NULL) { sim_log_channel_t* channel; termination = strrchr(namePos, ','); // If we've reached the end, just copy to the end if (termination == NULL) { strcpy(newName, namePos); } // Otherwise, memcpy over and null terminate else { memcpy(newName, namePos, (termination - namePos)); newName[termination - namePos] = 0; } channel = hashtable_search(channelTable, newName); if (channel != NULL) { count += channel->numOutputs; } namePos = termination + 1; } termination = name; namePos = name; // Allocate outputs[id].files = (FILE**)malloc(sizeof(FILE*) * count); outputs[id].num = 0; // Fill it in while (termination != NULL) { sim_log_channel_t* channel; termination = strrchr(namePos, ','); // If we've reached the end, just copy to the end if (termination == NULL) { strcpy(newName, namePos); } // Otherwise, memcpy over and null terminate else { memcpy(newName, namePos, (termination - namePos)); newName[termination - namePos] = 0; } channel = hashtable_search(channelTable, newName); if (channel != NULL) { int i, j; for (i = 0; i < channel->numOutputs; i++) { int duplicate = 0; int outputCount = outputs[id].num; // Check if we already have this file descriptor in the output // set, and if so, ignore it. for (j = 0; j < outputCount; j++) { if (fileno(outputs[id].files[j]) == fileno(channel->outputs[i])) { duplicate = 1; j = outputCount; } } if (!duplicate) { outputs[id].files[outputCount] = channel->outputs[i]; outputs[id].num++; } } } namePos = termination + 1; } } void sim_log_init() { int i; channelTable = create_hashtable(128, sim_log_hash, sim_log_eq); for (i = 0; i < SIM_LOG_OUTPUT_COUNT; i++) { outputs[i].num = 1; outputs[i].files = (FILE**)malloc(sizeof(FILE*)); outputs[i].files[0] = fdopen(1, "w"); // STDOUT } } void sim_log_add_channel(char* name, FILE* file) { sim_log_channel_t* channel; channel = (sim_log_channel_t*)hashtable_search(channelTable, name); // If there's no current entry, allocate one, initialize it, // and insert it. if (channel == NULL) { char* newName = (char*)malloc(strlen(name) + 1); strcpy(newName, name); newName[strlen(name)] = 0; channel = (sim_log_channel_t*)malloc(sizeof(sim_log_channel_t)); channel->name = newName; channel->numOutputs = 0; channel->size = DEFAULT_CHANNEL_SIZE; channel->outputs = (FILE**)malloc(sizeof(FILE*) * channel->size); memset(channel->outputs, 0, sizeof(FILE*) * channel->size); hashtable_insert(channelTable, newName, channel); } // If the channel output table is full, double the size of // channel->outputs. if (channel->numOutputs == channel->size) { FILE** newOutputs; int newSize = channel->size * 2; newOutputs = (FILE**)malloc(sizeof(FILE*) * newSize); memcpy(newOutputs, channel->outputs, channel->size * sizeof(FILE**)); free(channel->outputs); channel->outputs = newOutputs; channel->size = newSize; } channel->outputs[channel->numOutputs] = file; channel->numOutputs++; sim_log_commit_change(); } bool sim_log_remove_channel(char* output, FILE* file) { sim_log_channel_t* channel; int i; channel = (sim_log_channel_t*)hashtable_search(channelTable, output); if (channel == NULL) { return FALSE; } // Note: if a FILE* has duplicates, this removes all of them for (i = 0; i < channel->numOutputs; i++) { FILE* f = channel->outputs[i]; if (file == f) { memcpy(&channel->outputs[i], &channel->outputs[i + 1], (channel->numOutputs) - (i + 1)); channel->outputs[channel->numOutputs - 1] = NULL; channel->numOutputs--; } } return TRUE; } void sim_log_commit_change() { int i; for (i = 0; i < SIM_LOG_OUTPUT_COUNT; i++) { if (outputs[i].files != NULL) { outputs[i].num = 0; free(outputs[i].files); outputs[i].files = NULL; } } } void sim_log_debug(uint16_t id, char* string, const char* format, ...) { va_list args; int i; if (outputs[id].files == NULL) { fillInOutput(id, string); } for (i = 0; i < outputs[id].num; i++) { FILE* file = outputs[id].files[i]; va_start(args, format); fprintf(file, "DEBUG (%i): ", (int)sim_node()); vfprintf(file, format, args); fflush(file); } } void sim_log_error(uint16_t id, char* string, const char* format, ...) { va_list args; int i; if (outputs[id].files == NULL) { fillInOutput(id, string); } for (i = 0; i < outputs[id].num; i++) { FILE* file = outputs[id].files[i]; va_start(args, format); fprintf(file, "ERROR (%i): ", (int)sim_node()); vfprintf(file, format, args); fflush(file); } } void sim_log_debug_clear(uint16_t id, char* string, const char* format, ...) { va_list args; int i; if (outputs[id].files == NULL) { fillInOutput(id, string); } for (i = 0; i < outputs[id].num; i++) { FILE* file = outputs[id].files[i]; va_start(args, format); vfprintf(file, format, args); fflush(file); } } void sim_log_error_clear(uint16_t id, char* string, const char* format, ...) { va_list args; int i; if (outputs[id].files == NULL) { fillInOutput(id, string); } for (i = 0; i < outputs[id].num; i++) { FILE* file = outputs[id].files[i]; va_start(args, format); vfprintf(file, format, args); fflush(file); } } /* This is the sdbm algorithm, taken from http://www.cs.yorku.ca/~oz/hash.html -pal */ static unsigned int sim_log_hash(void* key) { char* str = (char*)key; unsigned int hashVal = 0; int hashChar; while ((hashChar = *str++)) hashVal = hashChar + (hashVal << 6) + (hashVal << 16) - hashVal; return hashVal; } static int sim_log_eq(void* key1, void* key2) { return strcmp((char*)key1, (char*)key2) == 0; } tinyos-2.1.2+dfsg/tos/lib/tossim/sim_log.h000066400000000000000000000057761207233610700204730ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM logging system. Unlike in TinyOS 1.x, this logging * system supports an arbitrary number of channels, denoted by * a string identifier. A channel can be connected to any number * of outputs, and a debug statement can be associated with any * number of channels. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: sim_log.h,v 1.5 2010-06-29 22:07:51 scipio Exp $ #ifndef SIM_LOG_H_INCLUDED #define SIM_LOG_H_INCLUDED #ifndef TOSSIM_NO_DEBUG #define dbg(s, ...) sim_log_debug(unique("TOSSIM.debug"), s, __VA_ARGS__) #define dbg_clear(s, ...) sim_log_debug_clear(unique("TOSSIM.debug"), s, __VA_ARGS__) #define dbgerror(s, ...) sim_log_error(unique("TOSSIM.debug"), s, __VA_ARGS__) #define dbgerror_clear(s, ...) sim_log_error_clear(unique("TOSSIM.debug"), s, __VA_ARGS__) #else #define dbg(s, ...) #define dbg_clear(s, ...) #define dbgerror(s, ...) #define dbgerror_clear(s, ...) #endif #ifdef __cplusplus extern "C" { #endif void sim_log_init(); void sim_log_add_channel(char* output, FILE* file); bool sim_log_remove_channel(char* output, FILE* file); void sim_log_commit_change(); void sim_log_debug(uint16_t id, char* string, const char* format, ...); void sim_log_error(uint16_t id, char* string, const char* format, ...); void sim_log_debug_clear(uint16_t id, char* string, const char* format, ...); void sim_log_error_clear(uint16_t id, char* string, const char* format, ...); #ifdef __cplusplus } #endif #endif // SIM_LOG_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sim_mac.c000066400000000000000000000034721207233610700204340ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * This file is where you change which MAC and radio models TOSSIM * incorporates. * * @author Philip Levis * @date Dec 10 2005 */ #include #include //Added by HyungJune Lee #include #include tinyos-2.1.2+dfsg/tos/lib/tossim/sim_mote.h000066400000000000000000000045031207233610700206410ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The C functions that allow TOSSIM-side code to access the SimMoteP * component. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: sim_mote.h,v 1.5 2010-06-29 22:07:51 scipio Exp $ #ifndef SIM_MOTE_H_INCLUDED #define SIM_MOTE_H_INCLUDED #ifdef __cplusplus extern "C" { #endif long long int sim_mote_euid(int mote); void sim_mote_set_euid(int mote, long long int euid); long long int sim_mote_start_time(int mote); void sim_mote_set_start_time(int mote, long long int t); bool sim_mote_is_on(int mote); void sim_mote_turn_on(int mote); void sim_mote_turn_off(int mote); int sim_mote_get_variable_info(int mote, char* name, void** addr, size_t* len); void sim_mote_enqueue_boot_event(int mote); #ifdef __cplusplus } #endif #endif // SIM_MOTE_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sim_noise.c000066400000000000000000000322271207233610700210110ustar00rootroot00000000000000/* * Copyright (c) 2006 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of all of the Hash-Based Learning primitives and utility * functions. * * @author Hyungjune Lee * @date Oct 13 2006 */ #include #include #include #include #include #include #include "randomlib.h" #include "hashtable.h" #include "sim_noise.h" //Tal Debug, to count how often simulation hits the one match case int numCase1 = 0; int numCase2 = 0; int numTotal = 0; //End Tal Debug uint32_t FreqKeyNum = 0; sim_noise_node_t noiseData[TOSSIM_MAX_NODES]; static unsigned int sim_noise_hash(void *key); static int sim_noise_eq(void *key1, void *key2); void makeNoiseModel(uint16_t node_id); void makePmfDistr(uint16_t node_id); uint8_t search_bin_num(char noise); void sim_noise_init()__attribute__ ((C, spontaneous)) { int j; //printf("Starting\n"); for (j=0; j< TOSSIM_MAX_NODES; j++) { noiseData[j].noiseTable = create_hashtable(NOISE_HASHTABLE_SIZE, sim_noise_hash, sim_noise_eq); noiseData[j].noiseGenTime = 0; noiseData[j].noiseTrace = (char*)(malloc(sizeof(char) * NOISE_MIN_TRACE)); noiseData[j].noiseTraceLen = NOISE_MIN_TRACE; noiseData[j].noiseTraceIndex = 0; } //printf("Done with sim_noise_init()\n"); } void sim_noise_create_model(uint16_t node_id)__attribute__ ((C, spontaneous)) { makeNoiseModel(node_id); makePmfDistr(node_id); } char sim_real_noise(uint16_t node_id, uint32_t cur_t) { if (cur_t > noiseData[node_id].noiseTraceLen) { dbg("Noise", "Asked for noise element %u when there are only %u.\n", cur_t, noiseData[node_id].noiseTraceIndex); return 0; } return noiseData[node_id].noiseTrace[cur_t]; } void sim_noise_trace_add(uint16_t node_id, char noiseVal)__attribute__ ((C, spontaneous)) { // Need to double size of trace arra if (noiseData[node_id].noiseTraceIndex == noiseData[node_id].noiseTraceLen) { char* data = (char*)(malloc(sizeof(char) * noiseData[node_id].noiseTraceLen * 2)); memcpy(data, noiseData[node_id].noiseTrace, noiseData[node_id].noiseTraceLen); free(noiseData[node_id].noiseTrace); noiseData[node_id].noiseTraceLen *= 2; noiseData[node_id].noiseTrace = data; } noiseData[node_id].noiseTrace[noiseData[node_id].noiseTraceIndex] = noiseVal; noiseData[node_id].noiseTraceIndex++; dbg("Insert", "Adding noise value %i for %i of %i\n", (int)noiseData[node_id].noiseTraceIndex, (int)node_id, (int)noiseVal); } uint8_t search_bin_num(char noise)__attribute__ ((C, spontaneous)) { uint8_t bin; if (noise > NOISE_MAX || noise < NOISE_MIN) { noise = NOISE_MIN; } bin = (noise-NOISE_MIN)/NOISE_QUANTIZE_INTERVAL + 1; return bin; } char search_noise_from_bin_num(int i)__attribute__ ((C, spontaneous)) { char noise; noise = NOISE_MIN + (i-1)*NOISE_QUANTIZE_INTERVAL; return noise; } static unsigned int sim_noise_hash(void *key) { char *pt = (char *)key; unsigned int hashVal = 0; int i; for (i=0; i< NOISE_HISTORY; i++) { hashVal = pt[i] + (hashVal << 6) + (hashVal << 16) - hashVal; } return hashVal; } static int sim_noise_eq(void *key1, void *key2) { return (memcmp((void *)key1, (void *)key2, NOISE_HISTORY) == 0); } void sim_noise_add(uint16_t node_id, char noise)__attribute__ ((C, spontaneous)) { int i; struct hashtable *pnoiseTable = noiseData[node_id].noiseTable; char *key = noiseData[node_id].key; sim_noise_hash_t *noise_hash; noise_hash = (sim_noise_hash_t *)hashtable_search(pnoiseTable, key); dbg("Insert", "Adding noise value %hhi\n", noise); if (noise_hash == NULL) { noise_hash = (sim_noise_hash_t *)malloc(sizeof(sim_noise_hash_t)); memcpy((void *)(noise_hash->key), (void *)key, NOISE_HISTORY); noise_hash->numElements = 0; noise_hash->size = NOISE_DEFAULT_ELEMENT_SIZE; noise_hash->elements = (char *)malloc(sizeof(char)*noise_hash->size); memset((void *)noise_hash->elements, 0, sizeof(char)*noise_hash->size); noise_hash->flag = 0; for(i=0; idist[i] = 0; } hashtable_insert(pnoiseTable, key, noise_hash); dbg("Insert", "Inserting %p into table %p with key ", noise_hash, pnoiseTable); { int ctr; for(ctr = 0; ctr < NOISE_HISTORY; ctr++) dbg_clear("Insert", "%0.3hhi ", key[ctr]); } dbg_clear("Insert", "\n"); } if (noise_hash->numElements == noise_hash->size) { char *newElements; int newSize = (noise_hash->size)*2; newElements = (char *)malloc(sizeof(char)*newSize); memcpy(newElements, noise_hash->elements, noise_hash->size); free(noise_hash->elements); noise_hash->elements = newElements; noise_hash->size = newSize; } noise_hash->elements[noise_hash->numElements] = noise; // printf("I hear noise %i\n", noise); noise_hash->numElements++; } void sim_noise_dist(uint16_t node_id)__attribute__ ((C, spontaneous)) { int i; uint8_t bin; float cmf = 0; struct hashtable *pnoiseTable = noiseData[node_id].noiseTable; char *key = noiseData[node_id].key; char *freqKey = noiseData[node_id].freqKey; sim_noise_hash_t *noise_hash; noise_hash = (sim_noise_hash_t *)hashtable_search(pnoiseTable, key); // noise_hash->flag; if (noise_hash->flag == 1) return; for (i=0; i < NOISE_NUM_VALUES; i++) { noise_hash->dist[i] = 0.0; } for (i=0; i< noise_hash->numElements; i++) { float val; dbg("Noise_output", "Noise is found to be %i\n", noise_hash->elements[i]); bin = noise_hash->elements[i] - NOISE_MIN_QUANTIZE; //search_bin_num(noise_hash->elements[i]) - 1; // printf("Bin %i, Noise %i\n", bin, (NOISE_MIN_QUANTIZE + bin)); val = noise_hash->dist[bin]; val += (float)1.0; noise_hash->dist[bin] = val; } for (i=0; i < NOISE_NUM_VALUES ; i++) { noise_hash->dist[i] = (noise_hash->dist[i])/(noise_hash->numElements); cmf += noise_hash->dist[i]; noise_hash->dist[i] = cmf; } noise_hash->flag = 1; //Find the most frequent key and store it in noiseData[node_id].freqKey[]. if (noise_hash->numElements > FreqKeyNum) { int j; FreqKeyNum = noise_hash->numElements; memcpy((void *)freqKey, (void *)key, NOISE_HISTORY); dbg("HashZeroDebug", "Setting most frequent key (%i): ", (int) FreqKeyNum); for (j = 0; j < NOISE_HISTORY; j++) { dbg_clear("HashZeroDebug", "[%hhu] ", key[j]); } dbg_clear("HashZeroDebug", "\n"); } } void arrangeKey(uint16_t node_id)__attribute__ ((C, spontaneous)) { char *pKey = noiseData[node_id].key; memcpy(pKey, pKey+1, NOISE_HISTORY-1); } /* * After makeNoiseModel() is done, make PMF distribution for each bin. */ void makePmfDistr(uint16_t node_id)__attribute__ ((C, spontaneous)) { int i; char *pKey = noiseData[node_id].key; char *fKey = noiseData[node_id].freqKey; FreqKeyNum = 0; for(i=0; inumElements=%d\n", noise_hash->numElements); //Tal Debug numTotal++; //End Tal Debug if (noise_hash->numElements == 1) { noise = noise_hash->elements[0]; dbg_clear("HASH", "(E)Noise = %d\n", noise); //Tal Debug numCase1++; dbg("Noise_c", "In case 1: %i of %i\n", numCase1, numTotal); //End Tal Debug dbg("NoiseAudit", "Noise: %i\n", noise); return noise; } //Tal Debug numCase2++; dbg("Noise_c", "In case 2: %i of %i\n", numCase2, numTotal); //End Tal Debug for (i = 0; i < NOISE_NUM_VALUES - 1; i++) { dbg("HASH", "IN:for i=%d\n", i); if (i == 0) { if (ranNum <= noise_hash->dist[i]) { noiseIndex = i; dbg_clear("HASH", "Selected Bin = %d -> ", i+1); break; } } else if ( (noise_hash->dist[i-1] < ranNum) && (ranNum <= noise_hash->dist[i]) ) { noiseIndex = i; dbg_clear("HASH", "Selected Bin = %d -> ", i+1); break; } } dbg("HASH", "OUT:for i=%d\n", i); noise = NOISE_MIN_QUANTIZE + i; //TODO search_noise_from_bin_num(i+1); dbg("NoiseAudit", "Noise: %i\n", noise); return noise; } char sim_noise_generate(uint16_t node_id, uint32_t cur_t)__attribute__ ((C, spontaneous)) { uint32_t i; uint32_t prev_t; uint32_t delta_t; char *noiseG; char noise; prev_t = noiseData[node_id].noiseGenTime; if (noiseData[node_id].generated == 0) { dbgerror("TOSSIM", "Tried to generate noise from an uninitialized radio model of node %hu.\n", node_id); return 127; } if ( (0<= cur_t) && (cur_t < NOISE_HISTORY) ) { noiseData[node_id].noiseGenTime = cur_t; noiseData[node_id].key[cur_t] = search_bin_num(noiseData[node_id].noiseTrace[cur_t]); noiseData[node_id].lastNoiseVal = noiseData[node_id].noiseTrace[cur_t]; return noiseData[node_id].noiseTrace[cur_t]; } if (prev_t == 0) delta_t = cur_t - (NOISE_HISTORY-1); else delta_t = cur_t - prev_t; dbg_clear("HASH", "delta_t = %d\n", delta_t); if (delta_t == 0) noise = noiseData[node_id].lastNoiseVal; else { noiseG = (char *)malloc(sizeof(char)*delta_t); for(i=0; i< delta_t; i++) { noiseG[i] = sim_noise_gen(node_id); arrangeKey(node_id); noiseData[node_id].key[NOISE_HISTORY-1] = search_bin_num(noiseG[i]); } noise = noiseG[delta_t-1]; noiseData[node_id].lastNoiseVal = noise; free(noiseG); } noiseData[node_id].noiseGenTime = cur_t; if (noise == 0) { dbg("HashZeroDebug", "Generated noise of zero.\n"); } // printf("%i\n", noise); return noise; } /* * When initialization process is going on, make noise model by putting * experimental noise values. */ void makeNoiseModel(uint16_t node_id)__attribute__ ((C, spontaneous)) { int i; for(i=0; i #ifdef __cplusplus extern "C" { #endif enum { NOISE_MIN = -115, NOISE_MAX = -5, NOISE_MIN_QUANTIZE = -115, NOISE_QUANTIZE_INTERVAL = 5, NOISE_BIN_SIZE = ((NOISE_MAX - NOISE_MIN) / NOISE_QUANTIZE_INTERVAL) + 1, NOISE_HISTORY = 20, NOISE_DEFAULT_ELEMENT_SIZE = 8, NOISE_HASHTABLE_SIZE = 128, NOISE_MIN_TRACE = 128, NOISE_NUM_VALUES = NOISE_MAX - NOISE_MIN + 1, //TODO check the + 1, also in NOISE_BIN_SIZE above in the inner parens }; typedef struct sim_noise_hash_t { char key[NOISE_HISTORY]; int numElements; int size; char *elements; char flag; float dist[NOISE_NUM_VALUES]; } sim_noise_hash_t; typedef struct sim_noise_node_t { char key[NOISE_HISTORY]; char freqKey[NOISE_HISTORY]; char lastNoiseVal; uint32_t noiseGenTime; struct hashtable *noiseTable; char* noiseTrace; uint32_t noiseTraceLen; uint32_t noiseTraceIndex; bool generated; } sim_noise_node_t; void sim_noise_init(); char sim_real_noise(uint16_t node_id, uint32_t cur_t); char sim_noise_generate(uint16_t node_id, uint32_t cur_t); void sim_noise_trace_add(uint16_t node_id, char val); void sim_noise_create_model(uint16_t node_id); #ifdef __cplusplus } #endif #endif // _SIM_NOISE_HASH_H_ tinyos-2.1.2+dfsg/tos/lib/tossim/sim_packet.c000066400000000000000000000107101207233610700211340ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * TOSSIM packet abstract data type, so C++ code can call into nesC * code that does the native-to-network type translation. * * @author Philip Levis * @date Jan 2 2006 */ // $Id: sim_packet.c,v 1.6 2010-06-29 22:07:51 scipio Exp $ #include #include // NOTE: This function is defined in lib/tossim/ActiveMessageC. It // has to be predeclared here because it is defined within that component. void active_message_deliver(int node, message_t* m, sim_time_t t); static tossim_header_t* getHeader(message_t* msg) { return (tossim_header_t*)(msg->data - sizeof(tossim_header_t)); } void sim_packet_set_source(sim_packet_t* msg, uint16_t src)__attribute__ ((C, spontaneous)) { tossim_header_t* hdr = getHeader((message_t*)msg); hdr->src = src; } uint16_t sim_packet_source(sim_packet_t* msg)__attribute__ ((C, spontaneous)) { tossim_header_t* hdr = getHeader((message_t*)msg); return hdr->src; } void sim_packet_set_destination(sim_packet_t* msg, uint16_t dest)__attribute__ ((C, spontaneous)) { tossim_header_t* hdr = getHeader((message_t*)msg); hdr->dest = dest; } uint16_t sim_packet_destination(sim_packet_t* msg)__attribute__ ((C, spontaneous)) { tossim_header_t* hdr = getHeader((message_t*)msg); return hdr->dest; } void sim_packet_set_length(sim_packet_t* msg, uint8_t length)__attribute__ ((C, spontaneous)) { tossim_header_t* hdr = getHeader((message_t*)msg); hdr->length = length; } uint16_t sim_packet_length(sim_packet_t* msg)__attribute__ ((C, spontaneous)) { tossim_header_t* hdr = getHeader((message_t*)msg); return hdr->length; } void sim_packet_set_type(sim_packet_t* msg, uint8_t type) __attribute__ ((C, spontaneous)){ tossim_header_t* hdr = getHeader((message_t*)msg); hdr->type = type; } uint8_t sim_packet_type(sim_packet_t* msg) __attribute__ ((C, spontaneous)){ tossim_header_t* hdr = getHeader((message_t*)msg); return hdr->type; } uint8_t* sim_packet_data(sim_packet_t* p) __attribute__ ((C, spontaneous)){ message_t* msg = (message_t*)p; return (uint8_t*)&msg->data; } void sim_packet_set_strength(sim_packet_t* p, uint16_t str) __attribute__ ((C, spontaneous)){ message_t* msg = (message_t*)p; tossim_metadata_t* md = (tossim_metadata_t*)(&msg->metadata); md->strength = str; } void sim_packet_deliver(int node, sim_packet_t* msg, sim_time_t t) __attribute__ ((C, spontaneous)){ if (t < sim_time()) { t = sim_time(); } dbg("Packet", "sim_packet.c: Delivering packet %p to %i at %llu\n", msg, node, t); active_message_deliver(node, (message_t*)msg, t); } uint8_t sim_packet_max_length(sim_packet_t* msg) __attribute__ ((C, spontaneous)){ return TOSH_DATA_LENGTH; } sim_packet_t* sim_packet_allocate () __attribute__ ((C, spontaneous)){ return (sim_packet_t*)malloc(sizeof(message_t)); } void sim_packet_free(sim_packet_t* p) __attribute__ ((C, spontaneous)) { printf("sim_packet.c: Freeing packet %p\n", p); free(p); } tinyos-2.1.2+dfsg/tos/lib/tossim/sim_packet.h000066400000000000000000000063261207233610700211510ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * TOSSIM packet abstract data type, so C++ code can call into nesC * code that does the native-to-network type translation. * * @author Philip Levis * @date Jan 2 2006 */ // $Id: sim_packet.h,v 1.6 2010-06-29 22:07:51 scipio Exp $ #ifndef SIM_PACKET_H_INCLUDED #define SIM_PACKET_H_INCLUDED #ifdef __cplusplus extern "C" { #endif /* * sim_packet_t is a weird beast. It's a dummy type that can stand * in for message_t. We need to use sim_packet_t because gcc can't * understand message_t, due to its network types (nx). So the shim * code between Python and TOSSIM can't mention message_t. Rather * than use a void*, the shim uses sim_packet_t in order to provide * some type checking. A sim_packet_t* is essentially a Python * friendly pointer to a message_t. */ typedef struct sim_packet {} sim_packet_t; void sim_packet_set_source(sim_packet_t* msg, uint16_t src); uint16_t sim_packet_source(sim_packet_t* msg); void sim_packet_set_destination(sim_packet_t* msg, uint16_t dest); uint16_t sim_packet_destination(sim_packet_t* msg); void sim_packet_set_length(sim_packet_t* msg, uint8_t len); uint16_t sim_packet_length(sim_packet_t* msg); void sim_packet_set_type(sim_packet_t* msg, uint8_t type); uint8_t sim_packet_type(sim_packet_t* msg); uint8_t* sim_packet_data(sim_packet_t* msg); void sim_packet_set_strength(sim_packet_t* msg, uint16_t str); void sim_packet_deliver(int node, sim_packet_t* msg, sim_time_t t); uint8_t sim_packet_max_length(sim_packet_t* msg); sim_packet_t* sim_packet_allocate(); void sim_packet_free(sim_packet_t* m); #ifdef __cplusplus } #endif #endif // SIM_PACKET_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/sim_tossim.c000066400000000000000000000133561207233610700212140ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of all of the basic TOSSIM primitives and utility * functions. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: sim_tossim.c,v 1.8 2010-06-29 22:07:51 scipio Exp $ #include #include #include #include #include #include //added by HyungJune Lee static sim_time_t sim_ticks; static unsigned long current_node; static int sim_seed; static int __nesc_nido_resolve(int mote, char* varname, uintptr_t* addr, size_t* size); void sim_init() __attribute__ ((C, spontaneous)) { sim_queue_init(); sim_log_init(); sim_log_commit_change(); sim_noise_init(); //added by HyungJune Lee { struct timeval tv; gettimeofday(&tv, NULL); // Need to make sure we don't pass zero to seed simulation. // But in case some weird timing factor causes usec to always // be zero, default to tv_sec. Note that the explicit // seeding call also has a check for zero. Thanks to Konrad // Iwanicki for finding this. -pal if (tv.tv_usec != 0) { sim_random_seed(tv.tv_usec); } else { sim_random_seed(tv.tv_sec); } } } void sim_end() __attribute__ ((C, spontaneous)) { sim_queue_init(); } int sim_random() __attribute__ ((C, spontaneous)) { uint32_t mlcg,p,q; uint64_t tmpseed; tmpseed = (uint64_t)33614U * (uint64_t)sim_seed; q = tmpseed; /* low */ q = q >> 1; p = tmpseed >> 32 ; /* hi */ mlcg = p + q; if (mlcg & 0x80000000) { mlcg = mlcg & 0x7FFFFFFF; mlcg++; } sim_seed = mlcg; return mlcg; } void sim_random_seed(int seed) __attribute__ ((C, spontaneous)) { // A seed of zero wedges on zero, so use 1 instead. if (seed == 0) { seed = 1; } sim_seed = seed; } sim_time_t sim_time() __attribute__ ((C, spontaneous)) { return sim_ticks; } void sim_set_time(sim_time_t t) __attribute__ ((C, spontaneous)) { sim_ticks = t; } sim_time_t sim_ticks_per_sec() __attribute__ ((C, spontaneous)) { return 10000000000ULL; } unsigned long sim_node() __attribute__ ((C, spontaneous)) { return current_node; } void sim_set_node(unsigned long node) __attribute__ ((C, spontaneous)) { current_node = node; TOS_NODE_ID = node; } bool sim_run_next_event() __attribute__ ((C, spontaneous)) { bool result = FALSE; if (!sim_queue_is_empty()) { sim_event_t* event = sim_queue_pop(); sim_set_time(event->time); sim_set_node(event->mote); // Need to test whether function pointers are for statically // allocted events that are zeroed out on reboot dbg("Tossim", "CORE: popping event 0x%p for %i at %llu with handler %p... ", event, sim_node(), sim_time(), event->handle); if ((sim_mote_is_on(event->mote) || event->force) && event->handle != NULL) { result = TRUE; dbg_clear("Tossim", " mote is on (or forced event), run it.\n"); event->handle(event); } else { dbg_clear("Tossim", "\n"); } if (event->cleanup != NULL) { event->cleanup(event); } } return result; } int sim_print_time(char* buf, int len, sim_time_t ftime) __attribute__ ((C, spontaneous)) { int hours; int minutes; int seconds; sim_time_t secondBillionths; secondBillionths = (ftime % sim_ticks_per_sec()); if (sim_ticks_per_sec() > (sim_time_t)1000000000) { secondBillionths /= (sim_ticks_per_sec() / (sim_time_t)1000000000); } else { secondBillionths *= ((sim_time_t)1000000000 / sim_ticks_per_sec()); } seconds = (int)(ftime / sim_ticks_per_sec()); minutes = seconds / 60; hours = minutes / 60; seconds %= 60; minutes %= 60; buf[len-1] = 0; return snprintf(buf, len - 1, "%i:%i:%i.%09llu", hours, minutes, seconds, secondBillionths); } int sim_print_now(char* buf, int len) __attribute__ ((C, spontaneous)) { return sim_print_time(buf, len, sim_time()); } char simTimeBuf[128]; char* sim_time_string() __attribute__ ((C, spontaneous)) { sim_print_now(simTimeBuf, 128); return simTimeBuf; } void sim_add_channel(char* channel, FILE* file) __attribute__ ((C, spontaneous)) { sim_log_add_channel(channel, file); } bool sim_remove_channel(char* channel, FILE* file) __attribute__ ((C, spontaneous)) { return sim_log_remove_channel(channel, file); } tinyos-2.1.2+dfsg/tos/lib/tossim/sim_tossim.h000066400000000000000000000047521207233610700212210ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of all of the basic TOSSIM primitives and utility * functions. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: sim_tossim.h,v 1.5 2010-06-29 22:07:51 scipio Exp $ #ifndef SIM_TOSSIM_H_INCLUDED #define SIM_TOSSIM_H_INCLUDED #include #ifdef __cplusplus extern "C" { #endif typedef long long int sim_time_t; void sim_init(); void sim_start(); void sim_end(); void sim_random_seed(int seed); int sim_random(); sim_time_t sim_time(); void sim_set_time(sim_time_t time); sim_time_t sim_ticks_per_sec(); unsigned long sim_node(); void sim_set_node(unsigned long node); int sim_print_time(char* buf, int bufLen, sim_time_t time); int sim_print_now(char* buf, int bufLen); char* sim_time_string(); void sim_add_channel(char* channel, FILE* file); bool sim_remove_channel(char* channel, FILE* file); bool sim_run_next_event(); #ifdef __cplusplus } #endif #endif // SIM_TOSSIM_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/topologies/000077500000000000000000000000001207233610700210365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tossim/topologies/15-15-medium-mica2-grid.txt000066400000000000000000036576021207233610700254640ustar00rootroot00000000000000gain 0 1 -87.04 gain 1 0 -88.02 gain 0 2 -89.58 gain 2 0 -90.40 gain 0 3 -96.56 gain 3 0 -98.69 gain 0 4 -108.45 gain 4 0 -112.72 gain 0 5 -99.72 gain 5 0 -104.43 gain 0 6 -107.02 gain 6 0 -108.16 gain 0 7 -112.03 gain 7 0 -110.56 gain 0 8 -106.75 gain 8 0 -111.25 gain 0 9 -107.25 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button = gtk.Button(string) button.connect("clicked", function, data) self.buttonArea.add(button) button.show() def close(self, x1, y1, x2, y2): x1 -= x2 y1 -= y2 x1 *= x1 y1 *= y1 if (x1 + y1 < 50): print "close: ", x1, " ", y1 return True else: print "not close: ", x1, " ", y1 return False def within(self, m, x1, y1, x2, y2): gX = max(x1, x2) + 5 lX = min(x1, x2) - 5 gY = max(y1, y2) + 5 lY = min(y1, y2) - 5 if (m.x >= lX and m.x <= gX and m.y >= lY and m.y <= gY): print "X: ", lX, "<=", m.x, "<=", gX print "Y: ", lY, "<=", m.y, "<=", gY return True else: print "X: ", lX, ">", m.x, ">", gX print "Y: ", lY, ">", m.y, ">", gY return False def button_press_event(self, widget, event): if event.button == 1 and self.pixmap != None: x = event.x y = event.y print "press at ", x, " ", y self.start_x = event.x self.start_y = event.y self.dx = 0 self.dy = 0 self.new_target = True for m in self.selected: if self.close(m.x, m.y, x, y): self.new_target = False if self.new_target: for m in self.selected: m.selected = False self.selected = [] self.redraw_motes() def button_release_event(self, widget, event): if event.button == 1 and self.pixmap != None: if self.new_target: x = event.x y = event.y print "release at ", x, " ", y for m in self.motes: if self.within(m, x, y, self.start_x, self.start_y): m.selected = True self.selected.append(m) self.redraw_motes() self.new_target = False else: for m in self.selected: m.x += self.dx m.y += self.dy self.dx = 0 self.dy = 0 self.redraw_motes() def drag_event(self, widget, event): x = y = state = None if event.is_hint: x, y, state = event.window.get_pointer() else: x = event.x y = event.y state = event.state if state & gtk.gdk.BUTTON1_MASK and self.pixmap != None: if not self.new_target: self.dx = event.x - self.start_x self.dy = event.y - self.start_y self.redraw_motes() print "drag" def configure_event(self, widget, event): self.widget = widget self.x, self.y, self.width, self.height = widget.get_allocation() self.pixmap = gtk.gdk.Pixmap(widget.window, self.width, self.height) self.pixmap.draw_rectangle(widget.get_style().white_gc, True, 0, 0, self.width, self.height) print "Configuring ", self.x, " ", self.y, " ", self.height, " ", self.width return True def expose_event(self, widget, event): x , y, width, height = event.area print "expose" widget.window.draw_drawable(widget.get_style().fg_gc[gtk.STATE_NORMAL], self.pixmap, x, y, x, y, width, height) return False def redraw_motes(self): self.pixmap.draw_rectangle(self.widget.get_style().white_gc, True, 0, 0, self.width, self.height) self.widget.queue_draw_area(0, 0, self.width, self.height) for mote in self.motes: self.draw_mote(mote) def draw_mote(self, mote): x = mote.x y = mote.y if mote.selected: x += self.dx y += self.dy rect = (int(x-5), int(y-5), 10, 10) gc = self.widget.get_style().black_gc if mote.selected: gc = self.widget.get_style().light_gc[gtk.STATE_SELECTED] self.pixmap.draw_rectangle(gc, True, rect[0], rect[1], rect[2], rect[3]) def createDrawPanel(self): self.moteArea = gtk.DrawingArea() self.moteArea.set_size_request(400,400) self.drawArea.add(self.moteArea) self.moteArea.show() self.moteArea.connect("expose_event", self.expose_event) self.moteArea.connect("configure_event", self.configure_event) self.moteArea.connect("motion_notify_event", self.drag_event) self.moteArea.connect("button_press_event", self.button_press_event) self.moteArea.connect("button_release_event", self.button_release_event) self.moteArea.set_events(gtk.gdk.EXPOSURE_MASK | gtk.gdk.LEAVE_NOTIFY_MASK | gtk.gdk.BUTTON_PRESS_MASK | gtk.gdk.POINTER_MOTION_MASK | gtk.gdk.POINTER_MOTION_HINT_MASK | gtk.gdk.BUTTON_RELEASE_MASK) def createButtonPanel(self): self.addButton("Add", self.addNode) self.addButton("Remove", self.removeSelected) self.addButton("Print", self.printTopology) table = gtk.Table(2, 2, True) label = gtk.Label("Area") label.set_justify(gtk.JUSTIFY_LEFT) label.show() self.distanceText = gtk.TextBuffer() self.distanceText.set_text("100") view = gtk.TextView(self.distanceText) table.attach(label, 0, 1, 0, 1) table.attach(view, 1, 2, 0, 1) view.show() label = gtk.Label("File") label.set_justify(gtk.JUSTIFY_LEFT) label.show() self.fileText = gtk.TextBuffer() self.fileText.set_text("layout.txt") view = gtk.TextView(self.fileText) view.show() table.attach(label, 0, 1, 1, 2) table.attach(view, 1, 2, 1, 2) self.buttonArea.add(table) table.set_row_spacings(4) table.show() self.addButton("Quit", self.quit); def __init__(self): self.window = gtk.Window(gtk.WINDOW_TOPLEVEL) self.window.connect("delete_event", self.delete_event) self.window.connect("destroy", self.destroy) self.window.set_border_width(10) self.buttonArea = gtk.VBox() self.drawArea = gtk.VBox() self.totalArea = gtk.HBox() self.totalArea.add(self.buttonArea) self.totalArea.add(self.drawArea) self.createDrawPanel() self.createButtonPanel() self.window.add(self.totalArea) self.buttonArea.show() self.drawArea.show() self.totalArea.show() self.window.show() self.motes = [] # For clicking and selecting motes self.selected = [] self.new_target = False self.start_x = 0 self.start_y = 0 self.dx = 0 self.dy = 0 def add_mote(self, x, y): m = Mote() m.x = x m.y = y self.motes.append(m) def addNode(self, widget, data=None): self.add_mote(50, 50) self.redraw_motes() print "add node" def removeSelected(self, widget, data=None): for m in self.selected: for other in self.motes: if m == other: self.motes.remove(m) self.selected = [] self.redraw_motes() print "remove selected" def printTopology(self, widget, data=None): counter = 0 startiter, enditer = self.fileText.get_bounds() filename = self.fileText.get_text(startiter, enditer) file = open(filename, "w") for m in self.motes: x = m.x y = m.y startiter, enditer = self.distanceText.get_bounds() text = self.distanceText.get_text(startiter, enditer) x *= int(text) y *= int(text) x /= 400 y /= 400 file.write(str(counter) + " "+ str(x) + " "+ str(y) + "\n") print "print topology" def quit(self, widget, data=None): gtk.main_quit() def main(self): gtk.main() if __name__ == "__main__": hello = HelloWorld() hello.main() tinyos-2.1.2+dfsg/tos/lib/tossim/tos.h000066400000000000000000000061401207233610700176310ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of all of the basic TOSSIM primitives and utility * functions. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: tos.h,v 1.6 2010-06-29 22:07:51 scipio Exp $ #ifndef TOS_H_INCLUDED #define TOS_H_INCLUDED #if !defined(__CYGWIN__) #if defined(__MSP430__) #include #else #include #endif #else //cygwin #include #include #include #endif #include #include #include #include #include #include #ifndef __cplusplus typedef uint8_t bool; #endif /* * TEMPORARY: include the Safe TinyOS macros so that annotations get * defined away for non-safe users -- this will no longer be necessary * after we require users to use the ncc that has Safe TinyOS * support */ #include "../../lib/safe/include/annots_stage1.h" enum { FALSE = 0, TRUE = 1 }; extern uint16_t TOS_NODE_ID; #define PROGMEM #ifndef TOSSIM_MAX_NODES #define TOSSIM_MAX_NODES 1000 #endif #include #include #include #include // We only want to include these files if we are compiling TOSSIM proper, // that is, the C file representing the TinyOS application. The TinyOS // build process means that this is the only really good place to put // them. #ifdef TOSSIM struct @atmostonce { }; struct @atleastonce { }; struct @exactlyonce { }; #include #include #include #include #include #include #endif #endif tinyos-2.1.2+dfsg/tos/lib/tossim/tossim.c000066400000000000000000000156471207233610700203510ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of TOSSIM C++ classes. Generally just directly * call their C analogues. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: tossim.c,v 1.7 2010-06-29 22:07:51 scipio Exp $ #include #include #include #include #include #include #include #include #include #include #include #include uint16_t TOS_NODE_ID = 1; Variable::Variable(char* str, char* formatStr, int array, int which) { name = str; format = formatStr; isArray = array; mote = which; int sLen = strlen(name); realName = (char*)malloc(sLen + 1); memcpy(realName, name, sLen + 1); realName[sLen] = 0; for (int i = 0; i < sLen; i++) { if (realName[i] == '.') { realName[i] = '$'; } } // printf("Creating %s realName: %s format: %s %s\n", name, realName, formatStr, array? "[]":""); if (sim_mote_get_variable_info(mote, realName, &ptr, &len) == 0) { data = (char*)malloc(len + 1); data[len] = 0; } else { printf("Could not find variable %s\n", realName); data = NULL; ptr = NULL; } printf("Allocated variable %s\n", realName); } Variable::~Variable() { printf("Freeing variable %s\n", realName); free(data); free(realName); } /* This is the sdbm algorithm, taken from http://www.cs.yorku.ca/~oz/hash.html -pal */ static unsigned int tossim_hash(void* key) { char* str = (char*)key; unsigned int hashVal = 0; int c; while ((c = *str++)) hashVal = c + (hashVal << 6) + (hashVal << 16) - hashVal; return hashVal; } static int tossim_hash_eq(void* key1, void* key2) { return strcmp((char*)key1, (char*)key2) == 0; } variable_string_t Variable::getData() { if (data != NULL && ptr != NULL) { str.ptr = data; str.type = format; str.len = len; str.isArray = isArray; // printf("Getting %s %s %s\n", format, isArray? "[]":"", name); memcpy(data, ptr, len); } else { str.ptr = (char*)""; str.type = (char*)""; str.len = strlen(""); str.isArray = 0; } return str; } Mote::Mote(nesc_app_t* n) { app = n; varTable = create_hashtable(128, tossim_hash, tossim_hash_eq); } Mote::~Mote(){} unsigned long Mote::id() { return nodeID; } long long int Mote::euid() { return sim_mote_euid(nodeID); } void Mote::setEuid(long long int val) { sim_mote_set_euid(nodeID, val); } long long int Mote::bootTime() { return sim_mote_start_time(nodeID); } void Mote::bootAtTime(long long int time) { sim_mote_set_start_time(nodeID, time); sim_mote_enqueue_boot_event(nodeID); } bool Mote::isOn() { return sim_mote_is_on(nodeID); } void Mote::turnOff() { sim_mote_turn_off(nodeID); } void Mote::turnOn() { sim_mote_turn_on(nodeID); } void Mote::setID(unsigned long val) { nodeID = val; } Variable* Mote::getVariable(char* name) { char* typeStr = (char*)""; int isArray; Variable* var; var = (Variable*)hashtable_search(varTable, name); if (var == NULL) { // Could hash this for greater efficiency, // but that would either require transformation // in Tossim class or a more complex typemap. if (app != NULL) { for (int i = 0; i < app->numVariables; i++) { if(strcmp(name, app->variableNames[i]) == 0) { typeStr = app->variableTypes[i]; isArray = app->variableArray[i]; break; } } } // printf("Getting variable %s of type %s %s\n", name, typeStr, isArray? "[]" : ""); var = new Variable(name, typeStr, isArray, nodeID); hashtable_insert(varTable, name, var); } return var; } void Mote::addNoiseTraceReading(int val) { sim_noise_trace_add(id(), (char)val); } void Mote::createNoiseModel() { sim_noise_create_model(id()); } int Mote::generateNoise(int when) { return (int)sim_noise_generate(id(), when); } Tossim::Tossim(nesc_app_t* n) { app = n; init(); } Tossim::~Tossim() { sim_end(); } void Tossim::init() { sim_init(); motes = (Mote**)malloc(sizeof(Mote*) * (TOSSIM_MAX_NODES + 1)); memset(motes, 0, sizeof(Mote*) * TOSSIM_MAX_NODES); } long long int Tossim::time() { return sim_time(); } long long int Tossim::ticksPerSecond() { return sim_ticks_per_sec(); } char* Tossim::timeStr() { sim_print_now(timeBuf, 256); return timeBuf; } void Tossim::setTime(long long int val) { sim_set_time(val); } Mote* Tossim::currentNode() { return getNode(sim_node()); } Mote* Tossim::getNode(unsigned long nodeID) { if (nodeID > TOSSIM_MAX_NODES) { nodeID = TOSSIM_MAX_NODES; // log an error, asked for an invalid node } else { if (motes[nodeID] == NULL) { motes[nodeID] = new Mote(app); if (nodeID == TOSSIM_MAX_NODES) { motes[nodeID]->setID(0xffff); } else { motes[nodeID]->setID(nodeID); } } return motes[nodeID]; } } void Tossim::setCurrentNode(unsigned long nodeID) { sim_set_node(nodeID); } void Tossim::addChannel(char* channel, FILE* file) { sim_add_channel(channel, file); } bool Tossim::removeChannel(char* channel, FILE* file) { return sim_remove_channel(channel, file); } void Tossim::randomSeed(int seed) { return sim_random_seed(seed); } bool Tossim::runNextEvent() { return sim_run_next_event(); } MAC* Tossim::mac() { return new MAC(); } Radio* Tossim::radio() { return new Radio(); } Packet* Tossim::newPacket() { return new Packet(); } tinyos-2.1.2+dfsg/tos/lib/tossim/tossim.h000066400000000000000000000071151207233610700203450ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Declaration of C++ objects representing TOSSIM abstractions. * Used to generate Python objects. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: tossim.h,v 1.6 2010-06-29 22:07:51 scipio Exp $ #ifndef TOSSIM_H_INCLUDED #define TOSSIM_H_INCLUDED //#include #include #include #include #include #include #include typedef struct variable_string { char* type; char* ptr; int len; int isArray; } variable_string_t; typedef struct nesc_app { int numVariables; char** variableNames; char** variableTypes; int* variableArray; } nesc_app_t; class Variable { public: Variable(char* name, char* format, int array, int mote); ~Variable(); variable_string_t getData(); private: char* name; char* realName; char* format; int mote; void* ptr; char* data; size_t len; int isArray; variable_string_t str; }; class Mote { public: Mote(nesc_app_t* app); ~Mote(); unsigned long id(); long long int euid(); void setEuid(long long int id); long long int bootTime(); void bootAtTime(long long int time); bool isOn(); void turnOff(); void turnOn(); void setID(unsigned long id); void addNoiseTraceReading(int val); void createNoiseModel(); int generateNoise(int when); Variable* getVariable(char* name); private: unsigned long nodeID; nesc_app_t* app; struct hashtable* varTable; }; class Tossim { public: Tossim(nesc_app_t* app); ~Tossim(); void init(); long long int time(); long long int ticksPerSecond(); char* timeStr(); void setTime(long long int time); Mote* currentNode(); Mote* getNode(unsigned long nodeID); void setCurrentNode(unsigned long nodeID); void addChannel(char* channel, FILE* file); bool removeChannel(char* channel, FILE* file); void randomSeed(int seed); bool runNextEvent(); MAC* mac(); Radio* radio(); Packet* newPacket(); private: char timeBuf[256]; nesc_app_t* app; Mote** motes; }; #endif // TOSSIM_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tossim/tossim.i000066400000000000000000000243621207233610700203510ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * SWIG interface specification for TOSSIM. This file defines * the top-level TOSSIM and Mote objects which are exported to * Python. The typemap at the beginning allows a script to * use Python files as a parameter to a function that takes a * FILE* as a parameter (e.g., the logging system in sim_log.h). * * @author Philip Levis * @date Nov 22 2005 */ %module TOSSIM %{ #include #include enum { PRIMITIVE_INTEGER = 0, PRIMITIVE_FLOAT = 1, PRIMITIVE_UNKNOWN = 2 }; int lengthOfType(char* type) { if (strcmp(type, "uint8_t") == 0) { return sizeof(uint8_t); } else if (strcmp(type, "uint16_t") == 0) { return sizeof(uint16_t); } else if (strcmp(type, "uint32_t") == 0) { return sizeof(uint32_t); } else if (strcmp(type, "int8_t") == 0) { return sizeof(int8_t); } else if (strcmp(type, "int16_t") == 0) { return sizeof(int16_t); } else if (strcmp(type, "int32_t") == 0) { return sizeof(int32_t); } else if (strcmp(type, "char") == 0) { return sizeof(char); } else if (strcmp(type, "short") == 0) { return sizeof(short); } else if (strcmp(type, "int") == 0) { return sizeof(int); } else if (strcmp(type, "long") == 0) { return sizeof(long); } else if (strcmp(type, "unsigned char") == 0) { return sizeof(unsigned char); } else if (strcmp(type, "unsigned short") == 0) { return sizeof(unsigned short); } else if (strcmp(type, "unsigned int") == 0) { return sizeof(unsigned int); } else if (strcmp(type, "unsigned long") == 0) { return sizeof(unsigned long); } else if (strcmp(type, "float") == 0) { return sizeof(float); } else if (strcmp(type, "double") == 0) { return sizeof(double); } else { return 1; } } int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) { if (strcmp(type, "uint8_t") == 0) { uint8_t val; memcpy(&val, ptr, sizeof(uint8_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "uint16_t") == 0) { uint16_t val; memcpy(&val, ptr, sizeof(uint16_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "uint32_t") == 0) { uint32_t val; memcpy(&val, ptr, sizeof(uint32_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int8_t") == 0) { int8_t val; memcpy(&val, ptr, sizeof(int8_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int16_t") == 0) { int16_t val; memcpy(&val, ptr, sizeof(int16_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int32_t") == 0) { int32_t val; memcpy(&val, ptr, sizeof(int32_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "char") == 0) { long val; memcpy(&val, ptr, sizeof(char)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "short") == 0) { short val; memcpy(&val, ptr, sizeof(short)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int") == 0) { int val; memcpy(&val, ptr, sizeof(int)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "long") == 0) { long val; memcpy(&val, ptr, sizeof(long)); *lval = val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned char") == 0) { unsigned char val; memcpy(&val, ptr, sizeof(unsigned char)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned short") == 0) { unsigned short val; memcpy(&val, ptr, sizeof(unsigned short)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned int") == 0) { unsigned int val; memcpy(&val, ptr, sizeof(unsigned int)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned long") == 0) { unsigned long val; memcpy(&val, ptr, sizeof(unsigned long)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "float") == 0) { float val; memcpy(&val, ptr, sizeof(float)); *dval = (double)val; return PRIMITIVE_FLOAT; } else if (strcmp(type, "double") == 0) { double val; memcpy(&val, ptr, sizeof(double)); *dval = val; return PRIMITIVE_FLOAT; } else { return PRIMITIVE_UNKNOWN; } } PyObject* valueFromScalar(char* type, char* ptr, int len) { long lval; double dval; int rval = memoryToPrimitive(type, ptr, &lval, &dval); switch(rval) { case PRIMITIVE_INTEGER: return PyInt_FromLong(lval); case PRIMITIVE_FLOAT: return PyFloat_FromDouble(dval); case PRIMITIVE_UNKNOWN: default: return PyString_FromStringAndSize(ptr, len); } } PyObject* listFromArray(char* type, char* ptr, int len) { long lval; double dval; int elementLen = lengthOfType(type); PyObject* list = PyList_New(0); //printf("Generating list of %s\n", type); for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) { PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen)); } return list; } %} %include mac.i %include radio.i %include packet.i %typemap(python,in) FILE * { if (!PyFile_Check($input)) { PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter."); return NULL; } $1 = PyFile_AsFile($input); } %typemap(python,out) variable_string_t { if ($1.isArray) { //printf("Generating array %s\n", $1.type); $result = listFromArray ($1.type, $1.ptr, $1.len); } else { //printf("Generating scalar %s\n", $1.type); $result = valueFromScalar($1.type, $1.ptr, $1.len); } if ($result == NULL) { PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable."); } } %typemap(python,in) nesc_app_t* { if (!PyList_Check($input)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size($input); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem($input, 3 * i); PyObject* array = PyList_GetItem($input, (3 * i) + 1); PyObject* format = PyList_GetItem($input, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } $1 = app; } } typedef struct var_string { char* type; char* ptr; int len; int isArray; } variable_string_t; typedef struct nesc_app { int numVariables; char** variableNames; char** variableTypes; int* variableArray; } nesc_app_t; class Variable { public: Variable(char* name, char* format, int array, int mote); ~Variable(); variable_string_t getData(); }; class Mote { public: Mote(nesc_app_t* app); ~Mote(); unsigned long id(); long long int euid(); void setEuid(long long int id); long long int bootTime(); void bootAtTime(long long int time); bool isOn(); void turnOff(); void turnOn(); Variable* getVariable(char* name); void addNoiseTraceReading(int val); void createNoiseModel(); int generateNoise(int when); }; class Tossim { public: Tossim(nesc_app_t* app); ~Tossim(); void init(); long long int time(); long long int ticksPerSecond(); void setTime(long long int time); char* timeStr(); Mote* currentNode(); Mote* getNode(unsigned long nodeID); void setCurrentNode(unsigned long nodeID); void addChannel(char* channel, FILE* file); bool removeChannel(char* channel, FILE* file); void randomSeed(int seed); bool runNextEvent(); MAC* mac(); Radio* radio(); Packet* newPacket(); }; tinyos-2.1.2+dfsg/tos/lib/tossim/tossim_wrap.cxx000066400000000000000000006711651207233610700217650ustar00rootroot00000000000000/* ---------------------------------------------------------------------------- * This file was automatically generated by SWIG (http://www.swig.org). * Version 1.3.33 * * This file is not intended to be easily readable and contains a number of * coding conventions designed to improve portability and efficiency. Do not make * changes to this file unless you know what you are doing--modify the SWIG * interface file instead. * ----------------------------------------------------------------------------- */ #define SWIGPYTHON #define SWIG_PYTHON_DIRECTOR_NO_VTABLE #ifdef __cplusplus template class SwigValueWrapper { T *tt; public: SwigValueWrapper() : tt(0) { } SwigValueWrapper(const SwigValueWrapper& rhs) : tt(new T(*rhs.tt)) { } SwigValueWrapper(const T& t) : tt(new T(t)) { } ~SwigValueWrapper() { delete tt; } SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; } operator T&() const { return *tt; } T *operator&() { return tt; } private: SwigValueWrapper& operator=(const SwigValueWrapper& rhs); }; template T SwigValueInit() { return T(); } #endif /* ----------------------------------------------------------------------------- * This section contains generic SWIG labels for method/variable * declarations/attributes, and other compiler dependent labels. * ----------------------------------------------------------------------------- */ /* template workaround for compilers that cannot correctly implement the C++ standard */ #ifndef SWIGTEMPLATEDISAMBIGUATOR # if defined(__SUNPRO_CC) && (__SUNPRO_CC <= 0x560) # define SWIGTEMPLATEDISAMBIGUATOR template # elif defined(__HP_aCC) /* Needed even with `aCC -AA' when `aCC -V' reports HP ANSI C++ B3910B A.03.55 */ /* If we find a maximum version that requires this, the test would be __HP_aCC <= 35500 for A.03.55 */ # define SWIGTEMPLATEDISAMBIGUATOR template # else # define SWIGTEMPLATEDISAMBIGUATOR # endif #endif /* inline attribute */ #ifndef SWIGINLINE # if defined(__cplusplus) || (defined(__GNUC__) && !defined(__STRICT_ANSI__)) # define SWIGINLINE inline # else # define SWIGINLINE # endif #endif /* attribute recognised by some compilers to avoid 'unused' warnings */ #ifndef SWIGUNUSED # if defined(__GNUC__) # if !(defined(__cplusplus)) || (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)) # define SWIGUNUSED __attribute__ ((__unused__)) # else # define SWIGUNUSED # endif # elif defined(__ICC) # define SWIGUNUSED __attribute__ ((__unused__)) # else # define SWIGUNUSED # endif #endif #ifndef SWIGUNUSEDPARM # ifdef __cplusplus # define SWIGUNUSEDPARM(p) # else # define SWIGUNUSEDPARM(p) p SWIGUNUSED # endif #endif /* internal SWIG method */ #ifndef SWIGINTERN # define SWIGINTERN static SWIGUNUSED #endif /* internal inline SWIG method */ #ifndef SWIGINTERNINLINE # define SWIGINTERNINLINE SWIGINTERN SWIGINLINE #endif /* exporting methods */ #if (__GNUC__ >= 4) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) # ifndef GCC_HASCLASSVISIBILITY # define GCC_HASCLASSVISIBILITY # endif #endif #ifndef SWIGEXPORT # if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__) # if defined(STATIC_LINKED) # define SWIGEXPORT # else # define SWIGEXPORT __declspec(dllexport) # endif # else # if defined(__GNUC__) && defined(GCC_HASCLASSVISIBILITY) # define SWIGEXPORT __attribute__ ((visibility("default"))) # else # define SWIGEXPORT # endif # endif #endif /* calling conventions for Windows */ #ifndef SWIGSTDCALL # if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__) # define SWIGSTDCALL __stdcall # else # define SWIGSTDCALL # endif #endif /* Deal with Microsoft's attempt at deprecating C standard runtime functions */ #if !defined(SWIG_NO_CRT_SECURE_NO_DEPRECATE) && defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE) # define _CRT_SECURE_NO_DEPRECATE #endif /* Deal with Microsoft's attempt at deprecating methods in the standard C++ library */ #if !defined(SWIG_NO_SCL_SECURE_NO_DEPRECATE) && defined(_MSC_VER) && !defined(_SCL_SECURE_NO_DEPRECATE) # define _SCL_SECURE_NO_DEPRECATE #endif /* Python.h has to appear first */ #include /* ----------------------------------------------------------------------------- * swigrun.swg * * This file contains generic CAPI SWIG runtime support for pointer * type checking. * ----------------------------------------------------------------------------- */ /* This should only be incremented when either the layout of swig_type_info changes, or for whatever reason, the runtime changes incompatibly */ #define SWIG_RUNTIME_VERSION "3" /* define SWIG_TYPE_TABLE_NAME as "SWIG_TYPE_TABLE" */ #ifdef SWIG_TYPE_TABLE # define SWIG_QUOTE_STRING(x) #x # define SWIG_EXPAND_AND_QUOTE_STRING(x) SWIG_QUOTE_STRING(x) # define SWIG_TYPE_TABLE_NAME SWIG_EXPAND_AND_QUOTE_STRING(SWIG_TYPE_TABLE) #else # define SWIG_TYPE_TABLE_NAME #endif /* You can use the SWIGRUNTIME and SWIGRUNTIMEINLINE macros for creating a static or dynamic library from the swig runtime code. In 99.9% of the cases, swig just needs to declare them as 'static'. But only do this if is strictly necessary, ie, if you have problems with your compiler or so. */ #ifndef SWIGRUNTIME # define SWIGRUNTIME SWIGINTERN #endif #ifndef SWIGRUNTIMEINLINE # define SWIGRUNTIMEINLINE SWIGRUNTIME SWIGINLINE #endif /* Generic buffer size */ #ifndef SWIG_BUFFER_SIZE # define SWIG_BUFFER_SIZE 1024 #endif /* Flags for pointer conversions */ #define SWIG_POINTER_DISOWN 0x1 /* Flags for new pointer objects */ #define SWIG_POINTER_OWN 0x1 /* Flags/methods for returning states. The swig conversion methods, as ConvertPtr, return and integer that tells if the conversion was successful or not. And if not, an error code can be returned (see swigerrors.swg for the codes). Use the following macros/flags to set or process the returning states. In old swig versions, you usually write code as: if (SWIG_ConvertPtr(obj,vptr,ty.flags) != -1) { // success code } else { //fail code } Now you can be more explicit as: int res = SWIG_ConvertPtr(obj,vptr,ty.flags); if (SWIG_IsOK(res)) { // success code } else { // fail code } that seems to be the same, but now you can also do Type *ptr; int res = SWIG_ConvertPtr(obj,(void **)(&ptr),ty.flags); if (SWIG_IsOK(res)) { // success code if (SWIG_IsNewObj(res) { ... delete *ptr; } else { ... } } else { // fail code } I.e., now SWIG_ConvertPtr can return new objects and you can identify the case and take care of the deallocation. Of course that requires also to SWIG_ConvertPtr to return new result values, as int SWIG_ConvertPtr(obj, ptr,...) { if () { if () { *ptr = ; return SWIG_NEWOBJ; } else { *ptr = ; return SWIG_OLDOBJ; } } else { return SWIG_BADOBJ; } } Of course, returning the plain '0(success)/-1(fail)' still works, but you can be more explicit by returning SWIG_BADOBJ, SWIG_ERROR or any of the swig errors code. Finally, if the SWIG_CASTRANK_MODE is enabled, the result code allows to return the 'cast rank', for example, if you have this int food(double) int fooi(int); and you call food(1) // cast rank '1' (1 -> 1.0) fooi(1) // cast rank '0' just use the SWIG_AddCast()/SWIG_CheckState() */ #define SWIG_OK (0) #define SWIG_ERROR (-1) #define SWIG_IsOK(r) (r >= 0) #define SWIG_ArgError(r) ((r != SWIG_ERROR) ? r : SWIG_TypeError) /* The CastRankLimit says how many bits are used for the cast rank */ #define SWIG_CASTRANKLIMIT (1 << 8) /* The NewMask denotes the object was created (using new/malloc) */ #define SWIG_NEWOBJMASK (SWIG_CASTRANKLIMIT << 1) /* The TmpMask is for in/out typemaps that use temporal objects */ #define SWIG_TMPOBJMASK (SWIG_NEWOBJMASK << 1) /* Simple returning values */ #define SWIG_BADOBJ (SWIG_ERROR) #define SWIG_OLDOBJ (SWIG_OK) #define SWIG_NEWOBJ (SWIG_OK | SWIG_NEWOBJMASK) #define SWIG_TMPOBJ (SWIG_OK | SWIG_TMPOBJMASK) /* Check, add and del mask methods */ #define SWIG_AddNewMask(r) (SWIG_IsOK(r) ? (r | SWIG_NEWOBJMASK) : r) #define SWIG_DelNewMask(r) (SWIG_IsOK(r) ? (r & ~SWIG_NEWOBJMASK) : r) #define SWIG_IsNewObj(r) (SWIG_IsOK(r) && (r & SWIG_NEWOBJMASK)) #define SWIG_AddTmpMask(r) (SWIG_IsOK(r) ? (r | SWIG_TMPOBJMASK) : r) #define SWIG_DelTmpMask(r) (SWIG_IsOK(r) ? (r & ~SWIG_TMPOBJMASK) : r) #define SWIG_IsTmpObj(r) (SWIG_IsOK(r) && (r & SWIG_TMPOBJMASK)) /* Cast-Rank Mode */ #if defined(SWIG_CASTRANK_MODE) # ifndef SWIG_TypeRank # define SWIG_TypeRank unsigned long # endif # ifndef SWIG_MAXCASTRANK /* Default cast allowed */ # define SWIG_MAXCASTRANK (2) # endif # define SWIG_CASTRANKMASK ((SWIG_CASTRANKLIMIT) -1) # define SWIG_CastRank(r) (r & SWIG_CASTRANKMASK) SWIGINTERNINLINE int SWIG_AddCast(int r) { return SWIG_IsOK(r) ? ((SWIG_CastRank(r) < SWIG_MAXCASTRANK) ? (r + 1) : SWIG_ERROR) : r; } SWIGINTERNINLINE int SWIG_CheckState(int r) { return SWIG_IsOK(r) ? SWIG_CastRank(r) + 1 : 0; } #else /* no cast-rank mode */ # define SWIG_AddCast # define SWIG_CheckState(r) (SWIG_IsOK(r) ? 1 : 0) #endif #include #ifdef __cplusplus extern "C" { #endif typedef void *(*swig_converter_func)(void *); typedef struct swig_type_info *(*swig_dycast_func)(void **); /* Structure to store inforomation on one type */ typedef struct swig_type_info { const char *name; /* mangled name of this type */ const char *str; /* human readable name of this type */ swig_dycast_func dcast; /* dynamic cast function down a hierarchy */ struct swig_cast_info *cast; /* linked list of types that can cast into this type */ void *clientdata; /* language specific type data */ int owndata; /* flag if the structure owns the clientdata */ } swig_type_info; /* Structure to store a type and conversion function used for casting */ typedef struct swig_cast_info { swig_type_info *type; /* pointer to type that is equivalent to this type */ swig_converter_func converter; /* function to cast the void pointers */ struct swig_cast_info *next; /* pointer to next cast in linked list */ struct swig_cast_info *prev; /* pointer to the previous cast */ } swig_cast_info; /* Structure used to store module information * Each module generates one structure like this, and the runtime collects * all of these structures and stores them in a circularly linked list.*/ typedef struct swig_module_info { swig_type_info **types; /* Array of pointers to swig_type_info structures that are in this module */ size_t size; /* Number of types in this module */ struct swig_module_info *next; /* Pointer to next element in circularly linked list */ swig_type_info **type_initial; /* Array of initially generated type structures */ swig_cast_info **cast_initial; /* Array of initially generated casting structures */ void *clientdata; /* Language specific module data */ } swig_module_info; /* Compare two type names skipping the space characters, therefore "char*" == "char *" and "Class" == "Class", etc. Return 0 when the two name types are equivalent, as in strncmp, but skipping ' '. */ SWIGRUNTIME int SWIG_TypeNameComp(const char *f1, const char *l1, const char *f2, const char *l2) { for (;(f1 != l1) && (f2 != l2); ++f1, ++f2) { while ((*f1 == ' ') && (f1 != l1)) ++f1; while ((*f2 == ' ') && (f2 != l2)) ++f2; if (*f1 != *f2) return (*f1 > *f2) ? 1 : -1; } return (int)((l1 - f1) - (l2 - f2)); } /* Check type equivalence in a name list like ||... Return 0 if not equal, 1 if equal */ SWIGRUNTIME int SWIG_TypeEquiv(const char *nb, const char *tb) { int equiv = 0; const char* te = tb + strlen(tb); const char* ne = nb; while (!equiv && *ne) { for (nb = ne; *ne; ++ne) { if (*ne == '|') break; } equiv = (SWIG_TypeNameComp(nb, ne, tb, te) == 0) ? 1 : 0; if (*ne) ++ne; } return equiv; } /* Check type equivalence in a name list like ||... Return 0 if equal, -1 if nb < tb, 1 if nb > tb */ SWIGRUNTIME int SWIG_TypeCompare(const char *nb, const char *tb) { int equiv = 0; const char* te = tb + strlen(tb); const char* ne = nb; while (!equiv && *ne) { for (nb = ne; *ne; ++ne) { if (*ne == '|') break; } equiv = (SWIG_TypeNameComp(nb, ne, tb, te) == 0) ? 1 : 0; if (*ne) ++ne; } return equiv; } /* think of this as a c++ template<> or a scheme macro */ #define SWIG_TypeCheck_Template(comparison, ty) \ if (ty) { \ swig_cast_info *iter = ty->cast; \ while (iter) { \ if (comparison) { \ if (iter == ty->cast) return iter; \ /* Move iter to the top of the linked list */ \ iter->prev->next = iter->next; \ if (iter->next) \ iter->next->prev = iter->prev; \ iter->next = ty->cast; \ iter->prev = 0; \ if (ty->cast) ty->cast->prev = iter; \ ty->cast = iter; \ return iter; \ } \ iter = iter->next; \ } \ } \ return 0 /* Check the typename */ SWIGRUNTIME swig_cast_info * SWIG_TypeCheck(const char *c, swig_type_info *ty) { SWIG_TypeCheck_Template(strcmp(iter->type->name, c) == 0, ty); } /* Same as previous function, except strcmp is replaced with a pointer comparison */ SWIGRUNTIME swig_cast_info * SWIG_TypeCheckStruct(swig_type_info *from, swig_type_info *into) { SWIG_TypeCheck_Template(iter->type == from, into); } /* Cast a pointer up an inheritance hierarchy */ SWIGRUNTIMEINLINE void * SWIG_TypeCast(swig_cast_info *ty, void *ptr) { return ((!ty) || (!ty->converter)) ? ptr : (*ty->converter)(ptr); } /* Dynamic pointer casting. Down an inheritance hierarchy */ SWIGRUNTIME swig_type_info * SWIG_TypeDynamicCast(swig_type_info *ty, void **ptr) { swig_type_info *lastty = ty; if (!ty || !ty->dcast) return ty; while (ty && (ty->dcast)) { ty = (*ty->dcast)(ptr); if (ty) lastty = ty; } return lastty; } /* Return the name associated with this type */ SWIGRUNTIMEINLINE const char * SWIG_TypeName(const swig_type_info *ty) { return ty->name; } /* Return the pretty name associated with this type, that is an unmangled type name in a form presentable to the user. */ SWIGRUNTIME const char * SWIG_TypePrettyName(const swig_type_info *type) { /* The "str" field contains the equivalent pretty names of the type, separated by vertical-bar characters. We choose to print the last name, as it is often (?) the most specific. */ if (!type) return NULL; if (type->str != NULL) { const char *last_name = type->str; const char *s; for (s = type->str; *s; s++) if (*s == '|') last_name = s+1; return last_name; } else return type->name; } /* Set the clientdata field for a type */ SWIGRUNTIME void SWIG_TypeClientData(swig_type_info *ti, void *clientdata) { swig_cast_info *cast = ti->cast; /* if (ti->clientdata == clientdata) return; */ ti->clientdata = clientdata; while (cast) { if (!cast->converter) { swig_type_info *tc = cast->type; if (!tc->clientdata) { SWIG_TypeClientData(tc, clientdata); } } cast = cast->next; } } SWIGRUNTIME void SWIG_TypeNewClientData(swig_type_info *ti, void *clientdata) { SWIG_TypeClientData(ti, clientdata); ti->owndata = 1; } /* Search for a swig_type_info structure only by mangled name Search is a O(log #types) We start searching at module start, and finish searching when start == end. Note: if start == end at the beginning of the function, we go all the way around the circular list. */ SWIGRUNTIME swig_type_info * SWIG_MangledTypeQueryModule(swig_module_info *start, swig_module_info *end, const char *name) { swig_module_info *iter = start; do { if (iter->size) { register size_t l = 0; register size_t r = iter->size - 1; do { /* since l+r >= 0, we can (>> 1) instead (/ 2) */ register size_t i = (l + r) >> 1; const char *iname = iter->types[i]->name; if (iname) { register int compare = strcmp(name, iname); if (compare == 0) { return iter->types[i]; } else if (compare < 0) { if (i) { r = i - 1; } else { break; } } else if (compare > 0) { l = i + 1; } } else { break; /* should never happen */ } } while (l <= r); } iter = iter->next; } while (iter != end); return 0; } /* Search for a swig_type_info structure for either a mangled name or a human readable name. It first searches the mangled names of the types, which is a O(log #types) If a type is not found it then searches the human readable names, which is O(#types). We start searching at module start, and finish searching when start == end. Note: if start == end at the beginning of the function, we go all the way around the circular list. */ SWIGRUNTIME swig_type_info * SWIG_TypeQueryModule(swig_module_info *start, swig_module_info *end, const char *name) { /* STEP 1: Search the name field using binary search */ swig_type_info *ret = SWIG_MangledTypeQueryModule(start, end, name); if (ret) { return ret; } else { /* STEP 2: If the type hasn't been found, do a complete search of the str field (the human readable name) */ swig_module_info *iter = start; do { register size_t i = 0; for (; i < iter->size; ++i) { if (iter->types[i]->str && (SWIG_TypeEquiv(iter->types[i]->str, name))) return iter->types[i]; } iter = iter->next; } while (iter != end); } /* neither found a match */ return 0; } /* Pack binary data into a string */ SWIGRUNTIME char * SWIG_PackData(char *c, void *ptr, size_t sz) { static const char hex[17] = "0123456789abcdef"; register const unsigned char *u = (unsigned char *) ptr; register const unsigned char *eu = u + sz; for (; u != eu; ++u) { register unsigned char uu = *u; *(c++) = hex[(uu & 0xf0) >> 4]; *(c++) = hex[uu & 0xf]; } return c; } /* Unpack binary data from a string */ SWIGRUNTIME const char * SWIG_UnpackData(const char *c, void *ptr, size_t sz) { register unsigned char *u = (unsigned char *) ptr; register const unsigned char *eu = u + sz; for (; u != eu; ++u) { register char d = *(c++); register unsigned char uu; if ((d >= '0') && (d <= '9')) uu = ((d - '0') << 4); else if ((d >= 'a') && (d <= 'f')) uu = ((d - ('a'-10)) << 4); else return (char *) 0; d = *(c++); if ((d >= '0') && (d <= '9')) uu |= (d - '0'); else if ((d >= 'a') && (d <= 'f')) uu |= (d - ('a'-10)); else return (char *) 0; *u = uu; } return c; } /* Pack 'void *' into a string buffer. */ SWIGRUNTIME char * SWIG_PackVoidPtr(char *buff, void *ptr, const char *name, size_t bsz) { char *r = buff; if ((2*sizeof(void *) + 2) > bsz) return 0; *(r++) = '_'; r = SWIG_PackData(r,&ptr,sizeof(void *)); if (strlen(name) + 1 > (bsz - (r - buff))) return 0; strcpy(r,name); return buff; } SWIGRUNTIME const char * SWIG_UnpackVoidPtr(const char *c, void **ptr, const char *name) { if (*c != '_') { if (strcmp(c,"NULL") == 0) { *ptr = (void *) 0; return name; } else { return 0; } } return SWIG_UnpackData(++c,ptr,sizeof(void *)); } SWIGRUNTIME char * SWIG_PackDataName(char *buff, void *ptr, size_t sz, const char *name, size_t bsz) { char *r = buff; size_t lname = (name ? strlen(name) : 0); if ((2*sz + 2 + lname) > bsz) return 0; *(r++) = '_'; r = SWIG_PackData(r,ptr,sz); if (lname) { strncpy(r,name,lname+1); } else { *r = 0; } return buff; } SWIGRUNTIME const char * SWIG_UnpackDataName(const char *c, void *ptr, size_t sz, const char *name) { if (*c != '_') { if (strcmp(c,"NULL") == 0) { memset(ptr,0,sz); return name; } else { return 0; } } return SWIG_UnpackData(++c,ptr,sz); } #ifdef __cplusplus } #endif /* Errors in SWIG */ #define SWIG_UnknownError -1 #define SWIG_IOError -2 #define SWIG_RuntimeError -3 #define SWIG_IndexError -4 #define SWIG_TypeError -5 #define SWIG_DivisionByZero -6 #define SWIG_OverflowError -7 #define SWIG_SyntaxError -8 #define SWIG_ValueError -9 #define SWIG_SystemError -10 #define SWIG_AttributeError -11 #define SWIG_MemoryError -12 #define SWIG_NullReferenceError -13 /* Add PyOS_snprintf for old Pythons */ #if PY_VERSION_HEX < 0x02020000 # if defined(_MSC_VER) || defined(__BORLANDC__) || defined(_WATCOM) # define PyOS_snprintf _snprintf # else # define PyOS_snprintf snprintf # endif #endif /* A crude PyString_FromFormat implementation for old Pythons */ #if PY_VERSION_HEX < 0x02020000 #ifndef SWIG_PYBUFFER_SIZE # define SWIG_PYBUFFER_SIZE 1024 #endif static PyObject * PyString_FromFormat(const char *fmt, ...) { va_list ap; char buf[SWIG_PYBUFFER_SIZE * 2]; int res; va_start(ap, fmt); res = vsnprintf(buf, sizeof(buf), fmt, ap); va_end(ap); return (res < 0 || res >= (int)sizeof(buf)) ? 0 : PyString_FromString(buf); } #endif /* Add PyObject_Del for old Pythons */ #if PY_VERSION_HEX < 0x01060000 # define PyObject_Del(op) PyMem_DEL((op)) #endif #ifndef PyObject_DEL # define PyObject_DEL PyObject_Del #endif /* A crude PyExc_StopIteration exception for old Pythons */ #if PY_VERSION_HEX < 0x02020000 # ifndef PyExc_StopIteration # define PyExc_StopIteration PyExc_RuntimeError # endif # ifndef PyObject_GenericGetAttr # define PyObject_GenericGetAttr 0 # endif #endif /* Py_NotImplemented is defined in 2.1 and up. */ #if PY_VERSION_HEX < 0x02010000 # ifndef Py_NotImplemented # define Py_NotImplemented PyExc_RuntimeError # endif #endif /* A crude PyString_AsStringAndSize implementation for old Pythons */ #if PY_VERSION_HEX < 0x02010000 # ifndef PyString_AsStringAndSize # define PyString_AsStringAndSize(obj, s, len) {*s = PyString_AsString(obj); *len = *s ? strlen(*s) : 0;} # endif #endif /* PySequence_Size for old Pythons */ #if PY_VERSION_HEX < 0x02000000 # ifndef PySequence_Size # define PySequence_Size PySequence_Length # endif #endif /* PyBool_FromLong for old Pythons */ #if PY_VERSION_HEX < 0x02030000 static PyObject *PyBool_FromLong(long ok) { PyObject *result = ok ? Py_True : Py_False; Py_INCREF(result); return result; } #endif /* Py_ssize_t for old Pythons */ /* This code is as recommended by: */ /* http://www.python.org/dev/peps/pep-0353/#conversion-guidelines */ #if PY_VERSION_HEX < 0x02050000 && !defined(PY_SSIZE_T_MIN) typedef int Py_ssize_t; # define PY_SSIZE_T_MAX INT_MAX # define PY_SSIZE_T_MIN INT_MIN #endif /* ----------------------------------------------------------------------------- * error manipulation * ----------------------------------------------------------------------------- */ SWIGRUNTIME PyObject* SWIG_Python_ErrorType(int code) { PyObject* type = 0; switch(code) { case SWIG_MemoryError: type = PyExc_MemoryError; break; case SWIG_IOError: type = PyExc_IOError; break; case SWIG_RuntimeError: type = PyExc_RuntimeError; break; case SWIG_IndexError: type = PyExc_IndexError; break; case SWIG_TypeError: type = PyExc_TypeError; break; case SWIG_DivisionByZero: type = PyExc_ZeroDivisionError; break; case SWIG_OverflowError: type = PyExc_OverflowError; break; case SWIG_SyntaxError: type = PyExc_SyntaxError; break; case SWIG_ValueError: type = PyExc_ValueError; break; case SWIG_SystemError: type = PyExc_SystemError; break; case SWIG_AttributeError: type = PyExc_AttributeError; break; default: type = PyExc_RuntimeError; } return type; } SWIGRUNTIME void SWIG_Python_AddErrorMsg(const char* mesg) { PyObject *type = 0; PyObject *value = 0; PyObject *traceback = 0; if (PyErr_Occurred()) PyErr_Fetch(&type, &value, &traceback); if (value) { PyObject *old_str = PyObject_Str(value); PyErr_Clear(); Py_XINCREF(type); PyErr_Format(type, "%s %s", PyString_AsString(old_str), mesg); Py_DECREF(old_str); Py_DECREF(value); } else { PyErr_Format(PyExc_RuntimeError, mesg); } } #if defined(SWIG_PYTHON_NO_THREADS) # if defined(SWIG_PYTHON_THREADS) # undef SWIG_PYTHON_THREADS # endif #endif #if defined(SWIG_PYTHON_THREADS) /* Threading support is enabled */ # if !defined(SWIG_PYTHON_USE_GIL) && !defined(SWIG_PYTHON_NO_USE_GIL) # if (PY_VERSION_HEX >= 0x02030000) /* For 2.3 or later, use the PyGILState calls */ # define SWIG_PYTHON_USE_GIL # endif # endif # if defined(SWIG_PYTHON_USE_GIL) /* Use PyGILState threads calls */ # ifndef SWIG_PYTHON_INITIALIZE_THREADS # define SWIG_PYTHON_INITIALIZE_THREADS PyEval_InitThreads() # endif # ifdef __cplusplus /* C++ code */ class SWIG_Python_Thread_Block { bool status; PyGILState_STATE state; public: void end() { if (status) { PyGILState_Release(state); status = false;} } SWIG_Python_Thread_Block() : status(true), state(PyGILState_Ensure()) {} ~SWIG_Python_Thread_Block() { end(); } }; class SWIG_Python_Thread_Allow { bool status; PyThreadState *save; public: void end() { if (status) { PyEval_RestoreThread(save); status = false; }} SWIG_Python_Thread_Allow() : status(true), save(PyEval_SaveThread()) {} ~SWIG_Python_Thread_Allow() { end(); } }; # define SWIG_PYTHON_THREAD_BEGIN_BLOCK SWIG_Python_Thread_Block _swig_thread_block # define SWIG_PYTHON_THREAD_END_BLOCK _swig_thread_block.end() # define SWIG_PYTHON_THREAD_BEGIN_ALLOW SWIG_Python_Thread_Allow _swig_thread_allow # define SWIG_PYTHON_THREAD_END_ALLOW _swig_thread_allow.end() # else /* C code */ # define SWIG_PYTHON_THREAD_BEGIN_BLOCK PyGILState_STATE _swig_thread_block = PyGILState_Ensure() # define SWIG_PYTHON_THREAD_END_BLOCK PyGILState_Release(_swig_thread_block) # define SWIG_PYTHON_THREAD_BEGIN_ALLOW PyThreadState *_swig_thread_allow = PyEval_SaveThread() # define SWIG_PYTHON_THREAD_END_ALLOW PyEval_RestoreThread(_swig_thread_allow) # endif # else /* Old thread way, not implemented, user must provide it */ # if !defined(SWIG_PYTHON_INITIALIZE_THREADS) # define SWIG_PYTHON_INITIALIZE_THREADS # endif # if !defined(SWIG_PYTHON_THREAD_BEGIN_BLOCK) # define SWIG_PYTHON_THREAD_BEGIN_BLOCK # endif # if !defined(SWIG_PYTHON_THREAD_END_BLOCK) # define SWIG_PYTHON_THREAD_END_BLOCK # endif # if !defined(SWIG_PYTHON_THREAD_BEGIN_ALLOW) # define SWIG_PYTHON_THREAD_BEGIN_ALLOW # endif # if !defined(SWIG_PYTHON_THREAD_END_ALLOW) # define SWIG_PYTHON_THREAD_END_ALLOW # endif # endif #else /* No thread support */ # define SWIG_PYTHON_INITIALIZE_THREADS # define SWIG_PYTHON_THREAD_BEGIN_BLOCK # define SWIG_PYTHON_THREAD_END_BLOCK # define SWIG_PYTHON_THREAD_BEGIN_ALLOW # define SWIG_PYTHON_THREAD_END_ALLOW #endif /* ----------------------------------------------------------------------------- * Python API portion that goes into the runtime * ----------------------------------------------------------------------------- */ #ifdef __cplusplus extern "C" { #if 0 } /* cc-mode */ #endif #endif /* ----------------------------------------------------------------------------- * Constant declarations * ----------------------------------------------------------------------------- */ /* Constant Types */ #define SWIG_PY_POINTER 4 #define SWIG_PY_BINARY 5 /* Constant information structure */ typedef struct swig_const_info { int type; char *name; long lvalue; double dvalue; void *pvalue; swig_type_info **ptype; } swig_const_info; #ifdef __cplusplus #if 0 { /* cc-mode */ #endif } #endif /* ----------------------------------------------------------------------------- * See the LICENSE file for information on copyright, usage and redistribution * of SWIG, and the README file for authors - http://www.swig.org/release.html. * * pyrun.swg * * This file contains the runtime support for Python modules * and includes code for managing global variables and pointer * type checking. * * ----------------------------------------------------------------------------- */ /* Common SWIG API */ /* for raw pointers */ #define SWIG_Python_ConvertPtr(obj, pptr, type, flags) SWIG_Python_ConvertPtrAndOwn(obj, pptr, type, flags, 0) #define SWIG_ConvertPtr(obj, pptr, type, flags) SWIG_Python_ConvertPtr(obj, pptr, type, flags) #define SWIG_ConvertPtrAndOwn(obj,pptr,type,flags,own) SWIG_Python_ConvertPtrAndOwn(obj, pptr, type, flags, own) #define SWIG_NewPointerObj(ptr, type, flags) SWIG_Python_NewPointerObj(ptr, type, flags) #define SWIG_CheckImplicit(ty) SWIG_Python_CheckImplicit(ty) #define SWIG_AcquirePtr(ptr, src) SWIG_Python_AcquirePtr(ptr, src) #define swig_owntype int /* for raw packed data */ #define SWIG_ConvertPacked(obj, ptr, sz, ty) SWIG_Python_ConvertPacked(obj, ptr, sz, ty) #define SWIG_NewPackedObj(ptr, sz, type) SWIG_Python_NewPackedObj(ptr, sz, type) /* for class or struct pointers */ #define SWIG_ConvertInstance(obj, pptr, type, flags) SWIG_ConvertPtr(obj, pptr, type, flags) #define SWIG_NewInstanceObj(ptr, type, flags) SWIG_NewPointerObj(ptr, type, flags) /* for C or C++ function pointers */ #define SWIG_ConvertFunctionPtr(obj, pptr, type) SWIG_Python_ConvertFunctionPtr(obj, pptr, type) #define SWIG_NewFunctionPtrObj(ptr, type) SWIG_Python_NewPointerObj(ptr, type, 0) /* for C++ member pointers, ie, member methods */ #define SWIG_ConvertMember(obj, ptr, sz, ty) SWIG_Python_ConvertPacked(obj, ptr, sz, ty) #define SWIG_NewMemberObj(ptr, sz, type) SWIG_Python_NewPackedObj(ptr, sz, type) /* Runtime API */ #define SWIG_GetModule(clientdata) SWIG_Python_GetModule() #define SWIG_SetModule(clientdata, pointer) SWIG_Python_SetModule(pointer) #define SWIG_NewClientData(obj) PySwigClientData_New(obj) #define SWIG_SetErrorObj SWIG_Python_SetErrorObj #define SWIG_SetErrorMsg SWIG_Python_SetErrorMsg #define SWIG_ErrorType(code) SWIG_Python_ErrorType(code) #define SWIG_Error(code, msg) SWIG_Python_SetErrorMsg(SWIG_ErrorType(code), msg) #define SWIG_fail goto fail /* Runtime API implementation */ /* Error manipulation */ SWIGINTERN void SWIG_Python_SetErrorObj(PyObject *errtype, PyObject *obj) { SWIG_PYTHON_THREAD_BEGIN_BLOCK; PyErr_SetObject(errtype, obj); Py_DECREF(obj); SWIG_PYTHON_THREAD_END_BLOCK; } SWIGINTERN void SWIG_Python_SetErrorMsg(PyObject *errtype, const char *msg) { SWIG_PYTHON_THREAD_BEGIN_BLOCK; PyErr_SetString(errtype, (char *) msg); SWIG_PYTHON_THREAD_END_BLOCK; } #define SWIG_Python_Raise(obj, type, desc) SWIG_Python_SetErrorObj(SWIG_Python_ExceptionType(desc), obj) /* Set a constant value */ SWIGINTERN void SWIG_Python_SetConstant(PyObject *d, const char *name, PyObject *obj) { PyDict_SetItemString(d, (char*) name, obj); Py_DECREF(obj); } /* Append a value to the result obj */ SWIGINTERN PyObject* SWIG_Python_AppendOutput(PyObject* result, PyObject* obj) { #if !defined(SWIG_PYTHON_OUTPUT_TUPLE) if (!result) { result = obj; } else if (result == Py_None) { Py_DECREF(result); result = obj; } else { if (!PyList_Check(result)) { PyObject *o2 = result; result = PyList_New(1); PyList_SetItem(result, 0, o2); } PyList_Append(result,obj); Py_DECREF(obj); } return result; #else PyObject* o2; PyObject* o3; if (!result) { result = obj; } else if (result == Py_None) { Py_DECREF(result); result = obj; } else { if (!PyTuple_Check(result)) { o2 = result; result = PyTuple_New(1); PyTuple_SET_ITEM(result, 0, o2); } o3 = PyTuple_New(1); PyTuple_SET_ITEM(o3, 0, obj); o2 = result; result = PySequence_Concat(o2, o3); Py_DECREF(o2); Py_DECREF(o3); } return result; #endif } /* Unpack the argument tuple */ SWIGINTERN int SWIG_Python_UnpackTuple(PyObject *args, const char *name, Py_ssize_t min, Py_ssize_t max, PyObject **objs) { if (!args) { if (!min && !max) { return 1; } else { PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got none", name, (min == max ? "" : "at least "), (int)min); return 0; } } if (!PyTuple_Check(args)) { PyErr_SetString(PyExc_SystemError, "UnpackTuple() argument list is not a tuple"); return 0; } else { register Py_ssize_t l = PyTuple_GET_SIZE(args); if (l < min) { PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got %d", name, (min == max ? "" : "at least "), (int)min, (int)l); return 0; } else if (l > max) { PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got %d", name, (min == max ? "" : "at most "), (int)max, (int)l); return 0; } else { register int i; for (i = 0; i < l; ++i) { objs[i] = PyTuple_GET_ITEM(args, i); } for (; l < max; ++l) { objs[l] = 0; } return i + 1; } } } /* A functor is a function object with one single object argument */ #if PY_VERSION_HEX >= 0x02020000 #define SWIG_Python_CallFunctor(functor, obj) PyObject_CallFunctionObjArgs(functor, obj, NULL); #else #define SWIG_Python_CallFunctor(functor, obj) PyObject_CallFunction(functor, "O", obj); #endif /* Helper for static pointer initialization for both C and C++ code, for example static PyObject *SWIG_STATIC_POINTER(MyVar) = NewSomething(...); */ #ifdef __cplusplus #define SWIG_STATIC_POINTER(var) var #else #define SWIG_STATIC_POINTER(var) var = 0; if (!var) var #endif /* ----------------------------------------------------------------------------- * Pointer declarations * ----------------------------------------------------------------------------- */ /* Flags for new pointer objects */ #define SWIG_POINTER_NOSHADOW (SWIG_POINTER_OWN << 1) #define SWIG_POINTER_NEW (SWIG_POINTER_NOSHADOW | SWIG_POINTER_OWN) #define SWIG_POINTER_IMPLICIT_CONV (SWIG_POINTER_DISOWN << 1) #ifdef __cplusplus extern "C" { #if 0 } /* cc-mode */ #endif #endif /* How to access Py_None */ #if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__) # ifndef SWIG_PYTHON_NO_BUILD_NONE # ifndef SWIG_PYTHON_BUILD_NONE # define SWIG_PYTHON_BUILD_NONE # endif # endif #endif #ifdef SWIG_PYTHON_BUILD_NONE # ifdef Py_None # undef Py_None # define Py_None SWIG_Py_None() # endif SWIGRUNTIMEINLINE PyObject * _SWIG_Py_None(void) { PyObject *none = Py_BuildValue((char*)""); Py_DECREF(none); return none; } SWIGRUNTIME PyObject * SWIG_Py_None(void) { static PyObject *SWIG_STATIC_POINTER(none) = _SWIG_Py_None(); return none; } #endif /* The python void return value */ SWIGRUNTIMEINLINE PyObject * SWIG_Py_Void(void) { PyObject *none = Py_None; Py_INCREF(none); return none; } /* PySwigClientData */ typedef struct { PyObject *klass; PyObject *newraw; PyObject *newargs; PyObject *destroy; int delargs; int implicitconv; } PySwigClientData; SWIGRUNTIMEINLINE int SWIG_Python_CheckImplicit(swig_type_info *ty) { PySwigClientData *data = (PySwigClientData *)ty->clientdata; return data ? data->implicitconv : 0; } SWIGRUNTIMEINLINE PyObject * SWIG_Python_ExceptionType(swig_type_info *desc) { PySwigClientData *data = desc ? (PySwigClientData *) desc->clientdata : 0; PyObject *klass = data ? data->klass : 0; return (klass ? klass : PyExc_RuntimeError); } SWIGRUNTIME PySwigClientData * PySwigClientData_New(PyObject* obj) { if (!obj) { return 0; } else { PySwigClientData *data = (PySwigClientData *)malloc(sizeof(PySwigClientData)); /* the klass element */ data->klass = obj; Py_INCREF(data->klass); /* the newraw method and newargs arguments used to create a new raw instance */ if (PyClass_Check(obj)) { data->newraw = 0; data->newargs = obj; Py_INCREF(obj); } else { #if (PY_VERSION_HEX < 0x02020000) data->newraw = 0; #else data->newraw = PyObject_GetAttrString(data->klass, (char *)"__new__"); #endif if (data->newraw) { Py_INCREF(data->newraw); data->newargs = PyTuple_New(1); PyTuple_SetItem(data->newargs, 0, obj); } else { data->newargs = obj; } Py_INCREF(data->newargs); } /* the destroy method, aka as the C++ delete method */ data->destroy = PyObject_GetAttrString(data->klass, (char *)"__swig_destroy__"); if (PyErr_Occurred()) { PyErr_Clear(); data->destroy = 0; } if (data->destroy) { int flags; Py_INCREF(data->destroy); flags = PyCFunction_GET_FLAGS(data->destroy); #ifdef METH_O data->delargs = !(flags & (METH_O)); #else data->delargs = 0; #endif } else { data->delargs = 0; } data->implicitconv = 0; return data; } } SWIGRUNTIME void PySwigClientData_Del(PySwigClientData* data) { Py_XDECREF(data->newraw); Py_XDECREF(data->newargs); Py_XDECREF(data->destroy); } /* =============== PySwigObject =====================*/ typedef struct { PyObject_HEAD void *ptr; swig_type_info *ty; int own; PyObject *next; } PySwigObject; SWIGRUNTIME PyObject * PySwigObject_long(PySwigObject *v) { return PyLong_FromVoidPtr(v->ptr); } SWIGRUNTIME PyObject * PySwigObject_format(const char* fmt, PySwigObject *v) { PyObject *res = NULL; PyObject *args = PyTuple_New(1); if (args) { if (PyTuple_SetItem(args, 0, PySwigObject_long(v)) == 0) { PyObject *ofmt = PyString_FromString(fmt); if (ofmt) { res = PyString_Format(ofmt,args); Py_DECREF(ofmt); } Py_DECREF(args); } } return res; } SWIGRUNTIME PyObject * PySwigObject_oct(PySwigObject *v) { return PySwigObject_format("%o",v); } SWIGRUNTIME PyObject * PySwigObject_hex(PySwigObject *v) { return PySwigObject_format("%x",v); } SWIGRUNTIME PyObject * #ifdef METH_NOARGS PySwigObject_repr(PySwigObject *v) #else PySwigObject_repr(PySwigObject *v, PyObject *args) #endif { const char *name = SWIG_TypePrettyName(v->ty); PyObject *hex = PySwigObject_hex(v); PyObject *repr = PyString_FromFormat("", name, PyString_AsString(hex)); Py_DECREF(hex); if (v->next) { #ifdef METH_NOARGS PyObject *nrep = PySwigObject_repr((PySwigObject *)v->next); #else PyObject *nrep = PySwigObject_repr((PySwigObject *)v->next, args); #endif PyString_ConcatAndDel(&repr,nrep); } return repr; } SWIGRUNTIME int PySwigObject_print(PySwigObject *v, FILE *fp, int SWIGUNUSEDPARM(flags)) { #ifdef METH_NOARGS PyObject *repr = PySwigObject_repr(v); #else PyObject *repr = PySwigObject_repr(v, NULL); #endif if (repr) { fputs(PyString_AsString(repr), fp); Py_DECREF(repr); return 0; } else { return 1; } } SWIGRUNTIME PyObject * PySwigObject_str(PySwigObject *v) { char result[SWIG_BUFFER_SIZE]; return SWIG_PackVoidPtr(result, v->ptr, v->ty->name, sizeof(result)) ? PyString_FromString(result) : 0; } SWIGRUNTIME int PySwigObject_compare(PySwigObject *v, PySwigObject *w) { void *i = v->ptr; void *j = w->ptr; return (i < j) ? -1 : ((i > j) ? 1 : 0); } SWIGRUNTIME PyTypeObject* _PySwigObject_type(void); SWIGRUNTIME PyTypeObject* PySwigObject_type(void) { static PyTypeObject *SWIG_STATIC_POINTER(type) = _PySwigObject_type(); return type; } SWIGRUNTIMEINLINE int PySwigObject_Check(PyObject *op) { return ((op)->ob_type == PySwigObject_type()) || (strcmp((op)->ob_type->tp_name,"PySwigObject") == 0); } SWIGRUNTIME PyObject * PySwigObject_New(void *ptr, swig_type_info *ty, int own); SWIGRUNTIME void PySwigObject_dealloc(PyObject *v) { PySwigObject *sobj = (PySwigObject *) v; PyObject *next = sobj->next; if (sobj->own) { swig_type_info *ty = sobj->ty; PySwigClientData *data = ty ? (PySwigClientData *) ty->clientdata : 0; PyObject *destroy = data ? data->destroy : 0; if (destroy) { /* destroy is always a VARARGS method */ PyObject *res; if (data->delargs) { /* we need to create a temporal object to carry the destroy operation */ PyObject *tmp = PySwigObject_New(sobj->ptr, ty, 0); res = SWIG_Python_CallFunctor(destroy, tmp); Py_DECREF(tmp); } else { PyCFunction meth = PyCFunction_GET_FUNCTION(destroy); PyObject *mself = PyCFunction_GET_SELF(destroy); res = ((*meth)(mself, v)); } Py_XDECREF(res); } else { const char *name = SWIG_TypePrettyName(ty); #if !defined(SWIG_PYTHON_SILENT_MEMLEAK) printf("swig/python detected a memory leak of type '%s', no destructor found.\n", name); #endif } } Py_XDECREF(next); PyObject_DEL(v); } SWIGRUNTIME PyObject* PySwigObject_append(PyObject* v, PyObject* next) { PySwigObject *sobj = (PySwigObject *) v; #ifndef METH_O PyObject *tmp = 0; if (!PyArg_ParseTuple(next,(char *)"O:append", &tmp)) return NULL; next = tmp; #endif if (!PySwigObject_Check(next)) { return NULL; } sobj->next = next; Py_INCREF(next); return SWIG_Py_Void(); } SWIGRUNTIME PyObject* #ifdef METH_NOARGS PySwigObject_next(PyObject* v) #else PySwigObject_next(PyObject* v, PyObject *SWIGUNUSEDPARM(args)) #endif { PySwigObject *sobj = (PySwigObject *) v; if (sobj->next) { Py_INCREF(sobj->next); return sobj->next; } else { return SWIG_Py_Void(); } } SWIGINTERN PyObject* #ifdef METH_NOARGS PySwigObject_disown(PyObject *v) #else PySwigObject_disown(PyObject* v, PyObject *SWIGUNUSEDPARM(args)) #endif { PySwigObject *sobj = (PySwigObject *)v; sobj->own = 0; return SWIG_Py_Void(); } SWIGINTERN PyObject* #ifdef METH_NOARGS PySwigObject_acquire(PyObject *v) #else PySwigObject_acquire(PyObject* v, PyObject *SWIGUNUSEDPARM(args)) #endif { PySwigObject *sobj = (PySwigObject *)v; sobj->own = SWIG_POINTER_OWN; return SWIG_Py_Void(); } SWIGINTERN PyObject* PySwigObject_own(PyObject *v, PyObject *args) { PyObject *val = 0; #if (PY_VERSION_HEX < 0x02020000) if (!PyArg_ParseTuple(args,(char *)"|O:own",&val)) #else if (!PyArg_UnpackTuple(args, (char *)"own", 0, 1, &val)) #endif { return NULL; } else { PySwigObject *sobj = (PySwigObject *)v; PyObject *obj = PyBool_FromLong(sobj->own); if (val) { #ifdef METH_NOARGS if (PyObject_IsTrue(val)) { PySwigObject_acquire(v); } else { PySwigObject_disown(v); } #else if (PyObject_IsTrue(val)) { PySwigObject_acquire(v,args); } else { PySwigObject_disown(v,args); } #endif } return obj; } } #ifdef METH_O static PyMethodDef swigobject_methods[] = { {(char *)"disown", (PyCFunction)PySwigObject_disown, METH_NOARGS, (char *)"releases ownership of the pointer"}, {(char *)"acquire", (PyCFunction)PySwigObject_acquire, METH_NOARGS, (char *)"aquires ownership of the pointer"}, {(char *)"own", (PyCFunction)PySwigObject_own, METH_VARARGS, (char *)"returns/sets ownership of the pointer"}, {(char *)"append", (PyCFunction)PySwigObject_append, METH_O, (char *)"appends another 'this' object"}, {(char *)"next", (PyCFunction)PySwigObject_next, METH_NOARGS, (char *)"returns the next 'this' object"}, {(char *)"__repr__",(PyCFunction)PySwigObject_repr, METH_NOARGS, (char *)"returns object representation"}, {0, 0, 0, 0} }; #else static PyMethodDef swigobject_methods[] = { {(char *)"disown", (PyCFunction)PySwigObject_disown, METH_VARARGS, (char *)"releases ownership of the pointer"}, {(char *)"acquire", (PyCFunction)PySwigObject_acquire, METH_VARARGS, (char *)"aquires ownership of the pointer"}, {(char *)"own", (PyCFunction)PySwigObject_own, METH_VARARGS, (char *)"returns/sets ownership of the pointer"}, {(char *)"append", (PyCFunction)PySwigObject_append, METH_VARARGS, (char *)"appends another 'this' object"}, {(char *)"next", (PyCFunction)PySwigObject_next, METH_VARARGS, (char *)"returns the next 'this' object"}, {(char *)"__repr__",(PyCFunction)PySwigObject_repr, METH_VARARGS, (char *)"returns object representation"}, {0, 0, 0, 0} }; #endif #if PY_VERSION_HEX < 0x02020000 SWIGINTERN PyObject * PySwigObject_getattr(PySwigObject *sobj,char *name) { return Py_FindMethod(swigobject_methods, (PyObject *)sobj, name); } #endif SWIGRUNTIME PyTypeObject* _PySwigObject_type(void) { static char swigobject_doc[] = "Swig object carries a C/C++ instance pointer"; static PyNumberMethods PySwigObject_as_number = { (binaryfunc)0, /*nb_add*/ (binaryfunc)0, /*nb_subtract*/ (binaryfunc)0, /*nb_multiply*/ (binaryfunc)0, /*nb_divide*/ (binaryfunc)0, /*nb_remainder*/ (binaryfunc)0, /*nb_divmod*/ (ternaryfunc)0,/*nb_power*/ (unaryfunc)0, /*nb_negative*/ (unaryfunc)0, /*nb_positive*/ (unaryfunc)0, /*nb_absolute*/ (inquiry)0, /*nb_nonzero*/ 0, /*nb_invert*/ 0, /*nb_lshift*/ 0, /*nb_rshift*/ 0, /*nb_and*/ 0, /*nb_xor*/ 0, /*nb_or*/ (coercion)0, /*nb_coerce*/ (unaryfunc)PySwigObject_long, /*nb_int*/ (unaryfunc)PySwigObject_long, /*nb_long*/ (unaryfunc)0, /*nb_float*/ (unaryfunc)PySwigObject_oct, /*nb_oct*/ (unaryfunc)PySwigObject_hex, /*nb_hex*/ #if PY_VERSION_HEX >= 0x02050000 /* 2.5.0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_index */ #elif PY_VERSION_HEX >= 0x02020000 /* 2.2.0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_inplace_true_divide */ #elif PY_VERSION_HEX >= 0x02000000 /* 2.0.0 */ 0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_inplace_or */ #endif }; static PyTypeObject pyswigobject_type; static int type_init = 0; if (!type_init) { const PyTypeObject tmp = { PyObject_HEAD_INIT(NULL) 0, /* ob_size */ (char *)"PySwigObject", /* tp_name */ sizeof(PySwigObject), /* tp_basicsize */ 0, /* tp_itemsize */ (destructor)PySwigObject_dealloc, /* tp_dealloc */ (printfunc)PySwigObject_print, /* tp_print */ #if PY_VERSION_HEX < 0x02020000 (getattrfunc)PySwigObject_getattr, /* tp_getattr */ #else (getattrfunc)0, /* tp_getattr */ #endif (setattrfunc)0, /* tp_setattr */ (cmpfunc)PySwigObject_compare, /* tp_compare */ (reprfunc)PySwigObject_repr, /* tp_repr */ &PySwigObject_as_number, /* tp_as_number */ 0, /* tp_as_sequence */ 0, /* tp_as_mapping */ (hashfunc)0, /* tp_hash */ (ternaryfunc)0, /* tp_call */ (reprfunc)PySwigObject_str, /* tp_str */ PyObject_GenericGetAttr, /* tp_getattro */ 0, /* tp_setattro */ 0, /* tp_as_buffer */ Py_TPFLAGS_DEFAULT, /* tp_flags */ swigobject_doc, /* tp_doc */ 0, /* tp_traverse */ 0, /* tp_clear */ 0, /* tp_richcompare */ 0, /* tp_weaklistoffset */ #if PY_VERSION_HEX >= 0x02020000 0, /* tp_iter */ 0, /* tp_iternext */ swigobject_methods, /* tp_methods */ 0, /* tp_members */ 0, /* tp_getset */ 0, /* tp_base */ 0, /* tp_dict */ 0, /* tp_descr_get */ 0, /* tp_descr_set */ 0, /* tp_dictoffset */ 0, /* tp_init */ 0, /* tp_alloc */ 0, /* tp_new */ 0, /* tp_free */ 0, /* tp_is_gc */ 0, /* tp_bases */ 0, /* tp_mro */ 0, /* tp_cache */ 0, /* tp_subclasses */ 0, /* tp_weaklist */ #endif #if PY_VERSION_HEX >= 0x02030000 0, /* tp_del */ #endif #ifdef COUNT_ALLOCS 0,0,0,0 /* tp_alloc -> tp_next */ #endif }; pyswigobject_type = tmp; pyswigobject_type.ob_type = &PyType_Type; type_init = 1; } return &pyswigobject_type; } SWIGRUNTIME PyObject * PySwigObject_New(void *ptr, swig_type_info *ty, int own) { PySwigObject *sobj = PyObject_NEW(PySwigObject, PySwigObject_type()); if (sobj) { sobj->ptr = ptr; sobj->ty = ty; sobj->own = own; sobj->next = 0; } return (PyObject *)sobj; } /* ----------------------------------------------------------------------------- * Implements a simple Swig Packed type, and use it instead of string * ----------------------------------------------------------------------------- */ typedef struct { PyObject_HEAD void *pack; swig_type_info *ty; size_t size; } PySwigPacked; SWIGRUNTIME int PySwigPacked_print(PySwigPacked *v, FILE *fp, int SWIGUNUSEDPARM(flags)) { char result[SWIG_BUFFER_SIZE]; fputs("pack, v->size, 0, sizeof(result))) { fputs("at ", fp); fputs(result, fp); } fputs(v->ty->name,fp); fputs(">", fp); return 0; } SWIGRUNTIME PyObject * PySwigPacked_repr(PySwigPacked *v) { char result[SWIG_BUFFER_SIZE]; if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))) { return PyString_FromFormat("", result, v->ty->name); } else { return PyString_FromFormat("", v->ty->name); } } SWIGRUNTIME PyObject * PySwigPacked_str(PySwigPacked *v) { char result[SWIG_BUFFER_SIZE]; if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))){ return PyString_FromFormat("%s%s", result, v->ty->name); } else { return PyString_FromString(v->ty->name); } } SWIGRUNTIME int PySwigPacked_compare(PySwigPacked *v, PySwigPacked *w) { size_t i = v->size; size_t j = w->size; int s = (i < j) ? -1 : ((i > j) ? 1 : 0); return s ? s : strncmp((char *)v->pack, (char *)w->pack, 2*v->size); } SWIGRUNTIME PyTypeObject* _PySwigPacked_type(void); SWIGRUNTIME PyTypeObject* PySwigPacked_type(void) { static PyTypeObject *SWIG_STATIC_POINTER(type) = _PySwigPacked_type(); return type; } SWIGRUNTIMEINLINE int PySwigPacked_Check(PyObject *op) { return ((op)->ob_type == _PySwigPacked_type()) || (strcmp((op)->ob_type->tp_name,"PySwigPacked") == 0); } SWIGRUNTIME void PySwigPacked_dealloc(PyObject *v) { if (PySwigPacked_Check(v)) { PySwigPacked *sobj = (PySwigPacked *) v; free(sobj->pack); } PyObject_DEL(v); } SWIGRUNTIME PyTypeObject* _PySwigPacked_type(void) { static char swigpacked_doc[] = "Swig object carries a C/C++ instance pointer"; static PyTypeObject pyswigpacked_type; static int type_init = 0; if (!type_init) { const PyTypeObject tmp = { PyObject_HEAD_INIT(NULL) 0, /* ob_size */ (char *)"PySwigPacked", /* tp_name */ sizeof(PySwigPacked), /* tp_basicsize */ 0, /* tp_itemsize */ (destructor)PySwigPacked_dealloc, /* tp_dealloc */ (printfunc)PySwigPacked_print, /* tp_print */ (getattrfunc)0, /* tp_getattr */ (setattrfunc)0, /* tp_setattr */ (cmpfunc)PySwigPacked_compare, /* tp_compare */ (reprfunc)PySwigPacked_repr, /* tp_repr */ 0, /* tp_as_number */ 0, /* tp_as_sequence */ 0, /* tp_as_mapping */ (hashfunc)0, /* tp_hash */ (ternaryfunc)0, /* tp_call */ (reprfunc)PySwigPacked_str, /* tp_str */ PyObject_GenericGetAttr, /* tp_getattro */ 0, /* tp_setattro */ 0, /* tp_as_buffer */ Py_TPFLAGS_DEFAULT, /* tp_flags */ swigpacked_doc, /* tp_doc */ 0, /* tp_traverse */ 0, /* tp_clear */ 0, /* tp_richcompare */ 0, /* tp_weaklistoffset */ #if PY_VERSION_HEX >= 0x02020000 0, /* tp_iter */ 0, /* tp_iternext */ 0, /* tp_methods */ 0, /* tp_members */ 0, /* tp_getset */ 0, /* tp_base */ 0, /* tp_dict */ 0, /* tp_descr_get */ 0, /* tp_descr_set */ 0, /* tp_dictoffset */ 0, /* tp_init */ 0, /* tp_alloc */ 0, /* tp_new */ 0, /* tp_free */ 0, /* tp_is_gc */ 0, /* tp_bases */ 0, /* tp_mro */ 0, /* tp_cache */ 0, /* tp_subclasses */ 0, /* tp_weaklist */ #endif #if PY_VERSION_HEX >= 0x02030000 0, /* tp_del */ #endif #ifdef COUNT_ALLOCS 0,0,0,0 /* tp_alloc -> tp_next */ #endif }; pyswigpacked_type = tmp; pyswigpacked_type.ob_type = &PyType_Type; type_init = 1; } return &pyswigpacked_type; } SWIGRUNTIME PyObject * PySwigPacked_New(void *ptr, size_t size, swig_type_info *ty) { PySwigPacked *sobj = PyObject_NEW(PySwigPacked, PySwigPacked_type()); if (sobj) { void *pack = malloc(size); if (pack) { memcpy(pack, ptr, size); sobj->pack = pack; sobj->ty = ty; sobj->size = size; } else { PyObject_DEL((PyObject *) sobj); sobj = 0; } } return (PyObject *) sobj; } SWIGRUNTIME swig_type_info * PySwigPacked_UnpackData(PyObject *obj, void *ptr, size_t size) { if (PySwigPacked_Check(obj)) { PySwigPacked *sobj = (PySwigPacked *)obj; if (sobj->size != size) return 0; memcpy(ptr, sobj->pack, size); return sobj->ty; } else { return 0; } } /* ----------------------------------------------------------------------------- * pointers/data manipulation * ----------------------------------------------------------------------------- */ SWIGRUNTIMEINLINE PyObject * _SWIG_This(void) { return PyString_FromString("this"); } SWIGRUNTIME PyObject * SWIG_This(void) { static PyObject *SWIG_STATIC_POINTER(swig_this) = _SWIG_This(); return swig_this; } /* #define SWIG_PYTHON_SLOW_GETSET_THIS */ SWIGRUNTIME PySwigObject * SWIG_Python_GetSwigThis(PyObject *pyobj) { if (PySwigObject_Check(pyobj)) { return (PySwigObject *) pyobj; } else { PyObject *obj = 0; #if (!defined(SWIG_PYTHON_SLOW_GETSET_THIS) && (PY_VERSION_HEX >= 0x02030000)) if (PyInstance_Check(pyobj)) { obj = _PyInstance_Lookup(pyobj, SWIG_This()); } else { PyObject **dictptr = _PyObject_GetDictPtr(pyobj); if (dictptr != NULL) { PyObject *dict = *dictptr; obj = dict ? PyDict_GetItem(dict, SWIG_This()) : 0; } else { #ifdef PyWeakref_CheckProxy if (PyWeakref_CheckProxy(pyobj)) { PyObject *wobj = PyWeakref_GET_OBJECT(pyobj); return wobj ? SWIG_Python_GetSwigThis(wobj) : 0; } #endif obj = PyObject_GetAttr(pyobj,SWIG_This()); if (obj) { Py_DECREF(obj); } else { if (PyErr_Occurred()) PyErr_Clear(); return 0; } } } #else obj = PyObject_GetAttr(pyobj,SWIG_This()); if (obj) { Py_DECREF(obj); } else { if (PyErr_Occurred()) PyErr_Clear(); return 0; } #endif if (obj && !PySwigObject_Check(obj)) { /* a PyObject is called 'this', try to get the 'real this' PySwigObject from it */ return SWIG_Python_GetSwigThis(obj); } return (PySwigObject *)obj; } } /* Acquire a pointer value */ SWIGRUNTIME int SWIG_Python_AcquirePtr(PyObject *obj, int own) { if (own) { PySwigObject *sobj = SWIG_Python_GetSwigThis(obj); if (sobj) { int oldown = sobj->own; sobj->own = own; return oldown; } } return 0; } /* Convert a pointer value */ SWIGRUNTIME int SWIG_Python_ConvertPtrAndOwn(PyObject *obj, void **ptr, swig_type_info *ty, int flags, int *own) { if (!obj) return SWIG_ERROR; if (obj == Py_None) { if (ptr) *ptr = 0; return SWIG_OK; } else { PySwigObject *sobj = SWIG_Python_GetSwigThis(obj); while (sobj) { void *vptr = sobj->ptr; if (ty) { swig_type_info *to = sobj->ty; if (to == ty) { /* no type cast needed */ if (ptr) *ptr = vptr; break; } else { swig_cast_info *tc = SWIG_TypeCheck(to->name,ty); if (!tc) { sobj = (PySwigObject *)sobj->next; } else { if (ptr) *ptr = SWIG_TypeCast(tc,vptr); break; } } } else { if (ptr) *ptr = vptr; break; } } if (sobj) { if (own) *own = sobj->own; if (flags & SWIG_POINTER_DISOWN) { sobj->own = 0; } return SWIG_OK; } else { int res = SWIG_ERROR; if (flags & SWIG_POINTER_IMPLICIT_CONV) { PySwigClientData *data = ty ? (PySwigClientData *) ty->clientdata : 0; if (data && !data->implicitconv) { PyObject *klass = data->klass; if (klass) { PyObject *impconv; data->implicitconv = 1; /* avoid recursion and call 'explicit' constructors*/ impconv = SWIG_Python_CallFunctor(klass, obj); data->implicitconv = 0; if (PyErr_Occurred()) { PyErr_Clear(); impconv = 0; } if (impconv) { PySwigObject *iobj = SWIG_Python_GetSwigThis(impconv); if (iobj) { void *vptr; res = SWIG_Python_ConvertPtrAndOwn((PyObject*)iobj, &vptr, ty, 0, 0); if (SWIG_IsOK(res)) { if (ptr) { *ptr = vptr; /* transfer the ownership to 'ptr' */ iobj->own = 0; res = SWIG_AddCast(res); res = SWIG_AddNewMask(res); } else { res = SWIG_AddCast(res); } } } Py_DECREF(impconv); } } } } return res; } } } /* Convert a function ptr value */ SWIGRUNTIME int SWIG_Python_ConvertFunctionPtr(PyObject *obj, void **ptr, swig_type_info *ty) { if (!PyCFunction_Check(obj)) { return SWIG_ConvertPtr(obj, ptr, ty, 0); } else { void *vptr = 0; /* here we get the method pointer for callbacks */ const char *doc = (((PyCFunctionObject *)obj) -> m_ml -> ml_doc); const char *desc = doc ? strstr(doc, "swig_ptr: ") : 0; if (desc) { desc = ty ? SWIG_UnpackVoidPtr(desc + 10, &vptr, ty->name) : 0; if (!desc) return SWIG_ERROR; } if (ty) { swig_cast_info *tc = SWIG_TypeCheck(desc,ty); if (!tc) return SWIG_ERROR; *ptr = SWIG_TypeCast(tc,vptr); } else { *ptr = vptr; } return SWIG_OK; } } /* Convert a packed value value */ SWIGRUNTIME int SWIG_Python_ConvertPacked(PyObject *obj, void *ptr, size_t sz, swig_type_info *ty) { swig_type_info *to = PySwigPacked_UnpackData(obj, ptr, sz); if (!to) return SWIG_ERROR; if (ty) { if (to != ty) { /* check type cast? */ swig_cast_info *tc = SWIG_TypeCheck(to->name,ty); if (!tc) return SWIG_ERROR; } } return SWIG_OK; } /* ----------------------------------------------------------------------------- * Create a new pointer object * ----------------------------------------------------------------------------- */ /* Create a new instance object, whitout calling __init__, and set the 'this' attribute. */ SWIGRUNTIME PyObject* SWIG_Python_NewShadowInstance(PySwigClientData *data, PyObject *swig_this) { #if (PY_VERSION_HEX >= 0x02020000) PyObject *inst = 0; PyObject *newraw = data->newraw; if (newraw) { inst = PyObject_Call(newraw, data->newargs, NULL); if (inst) { #if !defined(SWIG_PYTHON_SLOW_GETSET_THIS) PyObject **dictptr = _PyObject_GetDictPtr(inst); if (dictptr != NULL) { PyObject *dict = *dictptr; if (dict == NULL) { dict = PyDict_New(); *dictptr = dict; PyDict_SetItem(dict, SWIG_This(), swig_this); } } #else PyObject *key = SWIG_This(); PyObject_SetAttr(inst, key, swig_this); #endif } } else { PyObject *dict = PyDict_New(); PyDict_SetItem(dict, SWIG_This(), swig_this); inst = PyInstance_NewRaw(data->newargs, dict); Py_DECREF(dict); } return inst; #else #if (PY_VERSION_HEX >= 0x02010000) PyObject *inst; PyObject *dict = PyDict_New(); PyDict_SetItem(dict, SWIG_This(), swig_this); inst = PyInstance_NewRaw(data->newargs, dict); Py_DECREF(dict); return (PyObject *) inst; #else PyInstanceObject *inst = PyObject_NEW(PyInstanceObject, &PyInstance_Type); if (inst == NULL) { return NULL; } inst->in_class = (PyClassObject *)data->newargs; Py_INCREF(inst->in_class); inst->in_dict = PyDict_New(); if (inst->in_dict == NULL) { Py_DECREF(inst); return NULL; } #ifdef Py_TPFLAGS_HAVE_WEAKREFS inst->in_weakreflist = NULL; #endif #ifdef Py_TPFLAGS_GC PyObject_GC_Init(inst); #endif PyDict_SetItem(inst->in_dict, SWIG_This(), swig_this); return (PyObject *) inst; #endif #endif } SWIGRUNTIME void SWIG_Python_SetSwigThis(PyObject *inst, PyObject *swig_this) { PyObject *dict; #if (PY_VERSION_HEX >= 0x02020000) && !defined(SWIG_PYTHON_SLOW_GETSET_THIS) PyObject **dictptr = _PyObject_GetDictPtr(inst); if (dictptr != NULL) { dict = *dictptr; if (dict == NULL) { dict = PyDict_New(); *dictptr = dict; } PyDict_SetItem(dict, SWIG_This(), swig_this); return; } #endif dict = PyObject_GetAttrString(inst, (char*)"__dict__"); PyDict_SetItem(dict, SWIG_This(), swig_this); Py_DECREF(dict); } SWIGINTERN PyObject * SWIG_Python_InitShadowInstance(PyObject *args) { PyObject *obj[2]; if (!SWIG_Python_UnpackTuple(args,(char*)"swiginit", 2, 2, obj)) { return NULL; } else { PySwigObject *sthis = SWIG_Python_GetSwigThis(obj[0]); if (sthis) { PySwigObject_append((PyObject*) sthis, obj[1]); } else { SWIG_Python_SetSwigThis(obj[0], obj[1]); } return SWIG_Py_Void(); } } /* Create a new pointer object */ SWIGRUNTIME PyObject * SWIG_Python_NewPointerObj(void *ptr, swig_type_info *type, int flags) { if (!ptr) { return SWIG_Py_Void(); } else { int own = (flags & SWIG_POINTER_OWN) ? SWIG_POINTER_OWN : 0; PyObject *robj = PySwigObject_New(ptr, type, own); PySwigClientData *clientdata = type ? (PySwigClientData *)(type->clientdata) : 0; if (clientdata && !(flags & SWIG_POINTER_NOSHADOW)) { PyObject *inst = SWIG_Python_NewShadowInstance(clientdata, robj); if (inst) { Py_DECREF(robj); robj = inst; } } return robj; } } /* Create a new packed object */ SWIGRUNTIMEINLINE PyObject * SWIG_Python_NewPackedObj(void *ptr, size_t sz, swig_type_info *type) { return ptr ? PySwigPacked_New((void *) ptr, sz, type) : SWIG_Py_Void(); } /* -----------------------------------------------------------------------------* * Get type list * -----------------------------------------------------------------------------*/ #ifdef SWIG_LINK_RUNTIME void *SWIG_ReturnGlobalTypeList(void *); #endif SWIGRUNTIME swig_module_info * SWIG_Python_GetModule(void) { static void *type_pointer = (void *)0; /* first check if module already created */ if (!type_pointer) { #ifdef SWIG_LINK_RUNTIME type_pointer = SWIG_ReturnGlobalTypeList((void *)0); #else type_pointer = PyCObject_Import((char*)"swig_runtime_data" SWIG_RUNTIME_VERSION, (char*)"type_pointer" SWIG_TYPE_TABLE_NAME); if (PyErr_Occurred()) { PyErr_Clear(); type_pointer = (void *)0; } #endif } return (swig_module_info *) type_pointer; } #if PY_MAJOR_VERSION < 2 /* PyModule_AddObject function was introduced in Python 2.0. The following function is copied out of Python/modsupport.c in python version 2.3.4 */ SWIGINTERN int PyModule_AddObject(PyObject *m, char *name, PyObject *o) { PyObject *dict; if (!PyModule_Check(m)) { PyErr_SetString(PyExc_TypeError, "PyModule_AddObject() needs module as first arg"); return SWIG_ERROR; } if (!o) { PyErr_SetString(PyExc_TypeError, "PyModule_AddObject() needs non-NULL value"); return SWIG_ERROR; } dict = PyModule_GetDict(m); if (dict == NULL) { /* Internal error -- modules must have a dict! */ PyErr_Format(PyExc_SystemError, "module '%s' has no __dict__", PyModule_GetName(m)); return SWIG_ERROR; } if (PyDict_SetItemString(dict, name, o)) return SWIG_ERROR; Py_DECREF(o); return SWIG_OK; } #endif SWIGRUNTIME void SWIG_Python_DestroyModule(void *vptr) { swig_module_info *swig_module = (swig_module_info *) vptr; swig_type_info **types = swig_module->types; size_t i; for (i =0; i < swig_module->size; ++i) { swig_type_info *ty = types[i]; if (ty->owndata) { PySwigClientData *data = (PySwigClientData *) ty->clientdata; if (data) PySwigClientData_Del(data); } } Py_DECREF(SWIG_This()); } SWIGRUNTIME void SWIG_Python_SetModule(swig_module_info *swig_module) { static PyMethodDef swig_empty_runtime_method_table[] = { {NULL, NULL, 0, NULL} };/* Sentinel */ PyObject *module = Py_InitModule((char*)"swig_runtime_data" SWIG_RUNTIME_VERSION, swig_empty_runtime_method_table); PyObject *pointer = PyCObject_FromVoidPtr((void *) swig_module, SWIG_Python_DestroyModule); if (pointer && module) { PyModule_AddObject(module, (char*)"type_pointer" SWIG_TYPE_TABLE_NAME, pointer); } else { Py_XDECREF(pointer); } } /* The python cached type query */ SWIGRUNTIME PyObject * SWIG_Python_TypeCache(void) { static PyObject *SWIG_STATIC_POINTER(cache) = PyDict_New(); return cache; } SWIGRUNTIME swig_type_info * SWIG_Python_TypeQuery(const char *type) { PyObject *cache = SWIG_Python_TypeCache(); PyObject *key = PyString_FromString(type); PyObject *obj = PyDict_GetItem(cache, key); swig_type_info *descriptor; if (obj) { descriptor = (swig_type_info *) PyCObject_AsVoidPtr(obj); } else { swig_module_info *swig_module = SWIG_Python_GetModule(); descriptor = SWIG_TypeQueryModule(swig_module, swig_module, type); if (descriptor) { obj = PyCObject_FromVoidPtr(descriptor, NULL); PyDict_SetItem(cache, key, obj); Py_DECREF(obj); } } Py_DECREF(key); return descriptor; } /* For backward compatibility only */ #define SWIG_POINTER_EXCEPTION 0 #define SWIG_arg_fail(arg) SWIG_Python_ArgFail(arg) #define SWIG_MustGetPtr(p, type, argnum, flags) SWIG_Python_MustGetPtr(p, type, argnum, flags) SWIGRUNTIME int SWIG_Python_AddErrMesg(const char* mesg, int infront) { if (PyErr_Occurred()) { PyObject *type = 0; PyObject *value = 0; PyObject *traceback = 0; PyErr_Fetch(&type, &value, &traceback); if (value) { PyObject *old_str = PyObject_Str(value); Py_XINCREF(type); PyErr_Clear(); if (infront) { PyErr_Format(type, "%s %s", mesg, PyString_AsString(old_str)); } else { PyErr_Format(type, "%s %s", PyString_AsString(old_str), mesg); } Py_DECREF(old_str); } return 1; } else { return 0; } } SWIGRUNTIME int SWIG_Python_ArgFail(int argnum) { if (PyErr_Occurred()) { /* add information about failing argument */ char mesg[256]; PyOS_snprintf(mesg, sizeof(mesg), "argument number %d:", argnum); return SWIG_Python_AddErrMesg(mesg, 1); } else { return 0; } } SWIGRUNTIMEINLINE const char * PySwigObject_GetDesc(PyObject *self) { PySwigObject *v = (PySwigObject *)self; swig_type_info *ty = v ? v->ty : 0; return ty ? ty->str : (char*)""; } SWIGRUNTIME void SWIG_Python_TypeError(const char *type, PyObject *obj) { if (type) { #if defined(SWIG_COBJECT_TYPES) if (obj && PySwigObject_Check(obj)) { const char *otype = (const char *) PySwigObject_GetDesc(obj); if (otype) { PyErr_Format(PyExc_TypeError, "a '%s' is expected, 'PySwigObject(%s)' is received", type, otype); return; } } else #endif { const char *otype = (obj ? obj->ob_type->tp_name : 0); if (otype) { PyObject *str = PyObject_Str(obj); const char *cstr = str ? PyString_AsString(str) : 0; if (cstr) { PyErr_Format(PyExc_TypeError, "a '%s' is expected, '%s(%s)' is received", type, otype, cstr); } else { PyErr_Format(PyExc_TypeError, "a '%s' is expected, '%s' is received", type, otype); } Py_XDECREF(str); return; } } PyErr_Format(PyExc_TypeError, "a '%s' is expected", type); } else { PyErr_Format(PyExc_TypeError, "unexpected type is received"); } } /* Convert a pointer value, signal an exception on a type mismatch */ SWIGRUNTIME void * SWIG_Python_MustGetPtr(PyObject *obj, swig_type_info *ty, int argnum, int flags) { void *result; if (SWIG_Python_ConvertPtr(obj, &result, ty, flags) == -1) { PyErr_Clear(); if (flags & SWIG_POINTER_EXCEPTION) { SWIG_Python_TypeError(SWIG_TypePrettyName(ty), obj); SWIG_Python_ArgFail(argnum); } } return result; } #ifdef __cplusplus #if 0 { /* cc-mode */ #endif } #endif #define SWIG_exception_fail(code, msg) do { SWIG_Error(code, msg); SWIG_fail; } while(0) #define SWIG_contract_assert(expr, msg) if (!(expr)) { SWIG_Error(SWIG_RuntimeError, msg); SWIG_fail; } else /* -------- TYPES TABLE (BEGIN) -------- */ #define SWIGTYPE_p_FILE swig_types[0] #define SWIGTYPE_p_MAC swig_types[1] #define SWIGTYPE_p_Mote swig_types[2] #define SWIGTYPE_p_Packet swig_types[3] #define SWIGTYPE_p_Radio swig_types[4] #define SWIGTYPE_p_Tossim swig_types[5] #define SWIGTYPE_p_Variable swig_types[6] #define SWIGTYPE_p_char swig_types[7] #define SWIGTYPE_p_int swig_types[8] #define SWIGTYPE_p_nesc_app swig_types[9] #define SWIGTYPE_p_p_char swig_types[10] #define SWIGTYPE_p_var_string swig_types[11] static swig_type_info *swig_types[13]; static swig_module_info swig_module = {swig_types, 12, 0, 0, 0, 0}; #define SWIG_TypeQuery(name) SWIG_TypeQueryModule(&swig_module, &swig_module, name) #define SWIG_MangledTypeQuery(name) SWIG_MangledTypeQueryModule(&swig_module, &swig_module, name) /* -------- TYPES TABLE (END) -------- */ #if (PY_VERSION_HEX <= 0x02000000) # if !defined(SWIG_PYTHON_CLASSIC) # error "This python version requires swig to be run with the '-classic' option" # endif #endif /*----------------------------------------------- @(target):= _TOSSIM.so ------------------------------------------------*/ #define SWIG_init init_TOSSIM #define SWIG_name "_TOSSIM" #define SWIGVERSION 0x010333 #define SWIG_VERSION SWIGVERSION #define SWIG_as_voidptr(a) const_cast< void * >(static_cast< const void * >(a)) #define SWIG_as_voidptrptr(a) ((void)SWIG_as_voidptr(*a),reinterpret_cast< void** >(a)) #include namespace swig { class PyObject_ptr { protected: PyObject *_obj; public: PyObject_ptr() :_obj(0) { } PyObject_ptr(const PyObject_ptr& item) : _obj(item._obj) { Py_XINCREF(_obj); } PyObject_ptr(PyObject *obj, bool initial_ref = true) :_obj(obj) { if (initial_ref) Py_XINCREF(_obj); } PyObject_ptr & operator=(const PyObject_ptr& item) { Py_XINCREF(item._obj); Py_XDECREF(_obj); _obj = item._obj; return *this; } ~PyObject_ptr() { Py_XDECREF(_obj); } operator PyObject *() const { return _obj; } PyObject *operator->() const { return _obj; } }; } namespace swig { struct PyObject_var : PyObject_ptr { PyObject_var(PyObject* obj = 0) : PyObject_ptr(obj, false) { } PyObject_var & operator = (PyObject* obj) { Py_XDECREF(_obj); _obj = obj; return *this; } }; } #include #include enum { PRIMITIVE_INTEGER = 0, PRIMITIVE_FLOAT = 1, PRIMITIVE_UNKNOWN = 2 }; int lengthOfType(char* type) { if (strcmp(type, "uint8_t") == 0) { return sizeof(uint8_t); } else if (strcmp(type, "uint16_t") == 0) { return sizeof(uint16_t); } else if (strcmp(type, "uint32_t") == 0) { return sizeof(uint32_t); } else if (strcmp(type, "int8_t") == 0) { return sizeof(int8_t); } else if (strcmp(type, "int16_t") == 0) { return sizeof(int16_t); } else if (strcmp(type, "int32_t") == 0) { return sizeof(int32_t); } else if (strcmp(type, "char") == 0) { return sizeof(char); } else if (strcmp(type, "short") == 0) { return sizeof(short); } else if (strcmp(type, "int") == 0) { return sizeof(int); } else if (strcmp(type, "long") == 0) { return sizeof(long); } else if (strcmp(type, "unsigned char") == 0) { return sizeof(unsigned char); } else if (strcmp(type, "unsigned short") == 0) { return sizeof(unsigned short); } else if (strcmp(type, "unsigned int") == 0) { return sizeof(unsigned int); } else if (strcmp(type, "unsigned long") == 0) { return sizeof(unsigned long); } else if (strcmp(type, "float") == 0) { return sizeof(float); } else if (strcmp(type, "double") == 0) { return sizeof(double); } else { return 1; } } int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) { if (strcmp(type, "uint8_t") == 0) { uint8_t val; memcpy(&val, ptr, sizeof(uint8_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "uint16_t") == 0) { uint16_t val; memcpy(&val, ptr, sizeof(uint16_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "uint32_t") == 0) { uint32_t val; memcpy(&val, ptr, sizeof(uint32_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int8_t") == 0) { int8_t val; memcpy(&val, ptr, sizeof(int8_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int16_t") == 0) { int16_t val; memcpy(&val, ptr, sizeof(int16_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int32_t") == 0) { int32_t val; memcpy(&val, ptr, sizeof(int32_t)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "char") == 0) { long val; memcpy(&val, ptr, sizeof(char)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "short") == 0) { short val; memcpy(&val, ptr, sizeof(short)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "int") == 0) { int val; memcpy(&val, ptr, sizeof(int)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "long") == 0) { long val; memcpy(&val, ptr, sizeof(long)); *lval = val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned char") == 0) { unsigned char val; memcpy(&val, ptr, sizeof(unsigned char)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned short") == 0) { unsigned short val; memcpy(&val, ptr, sizeof(unsigned short)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned int") == 0) { unsigned int val; memcpy(&val, ptr, sizeof(unsigned int)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "unsigned long") == 0) { unsigned long val; memcpy(&val, ptr, sizeof(unsigned long)); *lval = (long)val; return PRIMITIVE_INTEGER; } else if (strcmp(type, "float") == 0) { float val; memcpy(&val, ptr, sizeof(float)); *dval = (double)val; return PRIMITIVE_FLOAT; } else if (strcmp(type, "double") == 0) { double val; memcpy(&val, ptr, sizeof(double)); *dval = val; return PRIMITIVE_FLOAT; } else { return PRIMITIVE_UNKNOWN; } } PyObject* valueFromScalar(char* type, char* ptr, int len) { long lval; double dval; int rval = memoryToPrimitive(type, ptr, &lval, &dval); switch(rval) { case PRIMITIVE_INTEGER: return PyInt_FromLong(lval); case PRIMITIVE_FLOAT: return PyFloat_FromDouble(dval); case PRIMITIVE_UNKNOWN: default: return PyString_FromStringAndSize(ptr, len); } } PyObject* listFromArray(char* type, char* ptr, int len) { long lval; double dval; int elementLen = lengthOfType(type); PyObject* list = PyList_New(0); //printf("Generating list of %s\n", type); for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) { PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen)); } return list; } #include #define SWIG_From_long PyInt_FromLong SWIGINTERNINLINE PyObject * SWIG_From_int (int value) { return SWIG_From_long (value); } #include #if !defined(SWIG_NO_LLONG_MAX) # if !defined(LLONG_MAX) && defined(__GNUC__) && defined (__LONG_LONG_MAX__) # define LLONG_MAX __LONG_LONG_MAX__ # define LLONG_MIN (-LLONG_MAX - 1LL) # define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL) # endif #endif SWIGINTERN int SWIG_AsVal_double (PyObject *obj, double *val) { int res = SWIG_TypeError; if (PyFloat_Check(obj)) { if (val) *val = PyFloat_AsDouble(obj); return SWIG_OK; } else if (PyInt_Check(obj)) { if (val) *val = PyInt_AsLong(obj); return SWIG_OK; } else if (PyLong_Check(obj)) { double v = PyLong_AsDouble(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_OK; } else { PyErr_Clear(); } } #ifdef SWIG_PYTHON_CAST_MODE { int dispatch = 0; double d = PyFloat_AsDouble(obj); if (!PyErr_Occurred()) { if (val) *val = d; return SWIG_AddCast(SWIG_OK); } else { PyErr_Clear(); } if (!dispatch) { long v = PyLong_AsLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_AddCast(SWIG_AddCast(SWIG_OK)); } else { PyErr_Clear(); } } } #endif return res; } #include #include SWIGINTERNINLINE int SWIG_CanCastAsInteger(double *d, double min, double max) { double x = *d; if ((min <= x && x <= max)) { double fx = floor(x); double cx = ceil(x); double rd = ((x - fx) < 0.5) ? fx : cx; /* simple rint */ if ((errno == EDOM) || (errno == ERANGE)) { errno = 0; } else { double summ, reps, diff; if (rd < x) { diff = x - rd; } else if (rd > x) { diff = rd - x; } else { return 1; } summ = rd + x; reps = diff/summ; if (reps < 8*DBL_EPSILON) { *d = rd; return 1; } } } return 0; } SWIGINTERN int SWIG_AsVal_long (PyObject *obj, long* val) { if (PyInt_Check(obj)) { if (val) *val = PyInt_AsLong(obj); return SWIG_OK; } else if (PyLong_Check(obj)) { long v = PyLong_AsLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_OK; } else { PyErr_Clear(); } } #ifdef SWIG_PYTHON_CAST_MODE { int dispatch = 0; long v = PyInt_AsLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_AddCast(SWIG_OK); } else { PyErr_Clear(); } if (!dispatch) { double d; int res = SWIG_AddCast(SWIG_AsVal_double (obj,&d)); if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, LONG_MIN, LONG_MAX)) { if (val) *val = (long)(d); return res; } } } #endif return SWIG_TypeError; } SWIGINTERN int SWIG_AsVal_int (PyObject * obj, int *val) { long v; int res = SWIG_AsVal_long (obj, &v); if (SWIG_IsOK(res)) { if ((v < INT_MIN || v > INT_MAX)) { return SWIG_OverflowError; } else { if (val) *val = static_cast< int >(v); } } return res; } #include #define SWIG_From_double PyFloat_FromDouble SWIGINTERNINLINE PyObject* SWIG_From_bool (bool value) { return PyBool_FromLong(value ? 1 : 0); } #include SWIGINTERN swig_type_info* SWIG_pchar_descriptor(void) { static int init = 0; static swig_type_info* info = 0; if (!init) { info = SWIG_TypeQuery("_p_char"); init = 1; } return info; } SWIGINTERNINLINE PyObject * SWIG_FromCharPtrAndSize(const char* carray, size_t size) { if (carray) { if (size > INT_MAX) { swig_type_info* pchar_descriptor = SWIG_pchar_descriptor(); return pchar_descriptor ? SWIG_NewPointerObj(const_cast< char * >(carray), pchar_descriptor, 0) : SWIG_Py_Void(); } else { return PyString_FromStringAndSize(carray, static_cast< int >(size)); } } else { return SWIG_Py_Void(); } } SWIGINTERNINLINE PyObject * SWIG_FromCharPtr(const char *cptr) { return SWIG_FromCharPtrAndSize(cptr, (cptr ? strlen(cptr) : 0)); } SWIGINTERN int SWIG_AsCharPtrAndSize(PyObject *obj, char** cptr, size_t* psize, int *alloc) { if (PyString_Check(obj)) { char *cstr; Py_ssize_t len; PyString_AsStringAndSize(obj, &cstr, &len); if (cptr) { if (alloc) { /* In python the user should not be able to modify the inner string representation. To warranty that, if you define SWIG_PYTHON_SAFE_CSTRINGS, a new/copy of the python string buffer is always returned. The default behavior is just to return the pointer value, so, be careful. */ #if defined(SWIG_PYTHON_SAFE_CSTRINGS) if (*alloc != SWIG_OLDOBJ) #else if (*alloc == SWIG_NEWOBJ) #endif { *cptr = reinterpret_cast< char* >(memcpy((new char[len + 1]), cstr, sizeof(char)*(len + 1))); *alloc = SWIG_NEWOBJ; } else { *cptr = cstr; *alloc = SWIG_OLDOBJ; } } else { *cptr = PyString_AsString(obj); } } if (psize) *psize = len + 1; return SWIG_OK; } else { swig_type_info* pchar_descriptor = SWIG_pchar_descriptor(); if (pchar_descriptor) { void* vptr = 0; if (SWIG_ConvertPtr(obj, &vptr, pchar_descriptor, 0) == SWIG_OK) { if (cptr) *cptr = (char *) vptr; if (psize) *psize = vptr ? (strlen((char *)vptr) + 1) : 0; if (alloc) *alloc = SWIG_OLDOBJ; return SWIG_OK; } } } return SWIG_TypeError; } SWIGINTERN int SWIG_AsVal_long_SS_long (PyObject *obj, long long *val) { int res = SWIG_TypeError; if (PyLong_Check(obj)) { long long v = PyLong_AsLongLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_OK; } else { PyErr_Clear(); } } else { long v; res = SWIG_AsVal_long (obj,&v); if (SWIG_IsOK(res)) { if (val) *val = v; return res; } } #ifdef SWIG_PYTHON_CAST_MODE { const double mant_max = 1LL << DBL_MANT_DIG; const double mant_min = -mant_max; double d; res = SWIG_AsVal_double (obj,&d); if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, mant_min, mant_max)) { if (val) *val = (long long)(d); return SWIG_AddCast(res); } res = SWIG_TypeError; } #endif return res; } SWIGINTERNINLINE PyObject* SWIG_From_unsigned_SS_long (unsigned long value) { return (value > LONG_MAX) ? PyLong_FromUnsignedLong(value) : PyInt_FromLong(static_cast< long >(value)); } SWIGINTERNINLINE PyObject* SWIG_From_long_SS_long (long long value) { return ((value < LONG_MIN) || (value > LONG_MAX)) ? PyLong_FromLongLong(value) : PyInt_FromLong(static_cast< long >(value)); } SWIGINTERN int SWIG_AsVal_unsigned_SS_long (PyObject *obj, unsigned long *val) { if (PyInt_Check(obj)) { long v = PyInt_AsLong(obj); if (v >= 0) { if (val) *val = v; return SWIG_OK; } else { return SWIG_OverflowError; } } else if (PyLong_Check(obj)) { unsigned long v = PyLong_AsUnsignedLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_OK; } else { PyErr_Clear(); } } #ifdef SWIG_PYTHON_CAST_MODE { int dispatch = 0; unsigned long v = PyLong_AsUnsignedLong(obj); if (!PyErr_Occurred()) { if (val) *val = v; return SWIG_AddCast(SWIG_OK); } else { PyErr_Clear(); } if (!dispatch) { double d; int res = SWIG_AddCast(SWIG_AsVal_double (obj,&d)); if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, 0, ULONG_MAX)) { if (val) *val = (unsigned long)(d); return res; } } } #endif return SWIG_TypeError; } #ifdef __cplusplus extern "C" { #endif SWIGINTERN PyObject *_wrap_new_MAC(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_MAC")) SWIG_fail; result = (MAC *)new MAC(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_MAC, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_MAC(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_MAC",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_MAC" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_initHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_initHigh",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_initHigh" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->initHigh(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_initLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_initLow",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_initLow" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->initLow(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_high(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_high",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_high" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->high(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_low(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_low",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_low" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->low(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_symbolsPerSec(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_symbolsPerSec",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_symbolsPerSec" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->symbolsPerSec(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_bitsPerSymbol(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_bitsPerSymbol",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_bitsPerSymbol" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->bitsPerSymbol(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_preambleLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_preambleLength",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_preambleLength" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->preambleLength(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_exponentBase(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_exponentBase",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_exponentBase" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->exponentBase(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_maxIterations(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_maxIterations",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_maxIterations" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->maxIterations(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_minFreeSamples(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_minFreeSamples",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_minFreeSamples" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->minFreeSamples(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_rxtxDelay(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_rxtxDelay",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_rxtxDelay" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->rxtxDelay(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_ackTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:MAC_ackTime",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_ackTime" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); result = (int)(arg1)->ackTime(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setInitHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setInitHigh",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setInitHigh" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setInitHigh" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setInitHigh(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setInitLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setInitLow",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setInitLow" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setInitLow" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setInitLow(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setHigh",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setHigh" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setHigh" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setHigh(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setLow",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setLow" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setLow" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setLow(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setSymbolsPerSec(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setSymbolsPerSec",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setSymbolsPerSec" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setSymbolsPerSec" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setSymbolsPerSec(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setBitsBerSymbol(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setBitsBerSymbol",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setBitsBerSymbol" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setBitsBerSymbol" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setBitsBerSymbol(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setPreambleLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setPreambleLength",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setPreambleLength" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setPreambleLength" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setPreambleLength(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setExponentBase(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setExponentBase",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setExponentBase" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setExponentBase" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setExponentBase(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setMaxIterations(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setMaxIterations",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setMaxIterations" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setMaxIterations" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setMaxIterations(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setMinFreeSamples(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setMinFreeSamples",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setMinFreeSamples" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setMinFreeSamples" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setMinFreeSamples(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setRxtxDelay(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setRxtxDelay",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setRxtxDelay" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setRxtxDelay" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setRxtxDelay(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_MAC_setAckTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; MAC *arg1 = (MAC *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setAckTime",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setAckTime" "', argument " "1"" of type '" "MAC *""'"); } arg1 = reinterpret_cast< MAC * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setAckTime" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setAckTime(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *MAC_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_MAC, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_Radio")) SWIG_fail; result = (Radio *)new Radio(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Radio, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Radio",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Radio" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_add(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; int arg3 ; double arg4 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; int val3 ; int ecode3 = 0 ; double val4 ; int ecode4 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; PyObject * obj3 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOOO:Radio_add",&obj0,&obj1,&obj2,&obj3)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_add" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_add" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_add" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); ecode4 = SWIG_AsVal_double(obj3, &val4); if (!SWIG_IsOK(ecode4)) { SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "Radio_add" "', argument " "4"" of type '" "double""'"); } arg4 = static_cast< double >(val4); (arg1)->add(arg2,arg3,arg4); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_gain(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; int arg3 ; double result; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; int val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_gain",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_gain" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_gain" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_gain" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); result = (double)(arg1)->gain(arg2,arg3); resultobj = SWIG_From_double(static_cast< double >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_connected(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; int arg3 ; bool result; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; int val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_connected",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_connected" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_connected" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_connected" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); result = (bool)(arg1)->connected(arg2,arg3); resultobj = SWIG_From_bool(static_cast< bool >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_remove(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; int arg3 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; int val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_remove",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_remove" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_remove" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_remove" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); (arg1)->remove(arg2,arg3); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_setNoise(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; int arg2 ; double arg3 ; double arg4 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; double val3 ; int ecode3 = 0 ; double val4 ; int ecode4 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; PyObject * obj3 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOOO:Radio_setNoise",&obj0,&obj1,&obj2,&obj3)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_setNoise" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_setNoise" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_double(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_setNoise" "', argument " "3"" of type '" "double""'"); } arg3 = static_cast< double >(val3); ecode4 = SWIG_AsVal_double(obj3, &val4); if (!SWIG_IsOK(ecode4)) { SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "Radio_setNoise" "', argument " "4"" of type '" "double""'"); } arg4 = static_cast< double >(val4); (arg1)->setNoise(arg2,arg3,arg4); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Radio_setSensitivity(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Radio *arg1 = (Radio *) 0 ; double arg2 ; void *argp1 = 0 ; int res1 = 0 ; double val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Radio_setSensitivity",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_setSensitivity" "', argument " "1"" of type '" "Radio *""'"); } arg1 = reinterpret_cast< Radio * >(argp1); ecode2 = SWIG_AsVal_double(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_setSensitivity" "', argument " "2"" of type '" "double""'"); } arg2 = static_cast< double >(val2); (arg1)->setSensitivity(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Radio_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Radio, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Packet(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_Packet")) SWIG_fail; result = (Packet *)new Packet(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Packet, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Packet(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Packet",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Packet" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setSource(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setSource",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setSource" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setSource" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setSource(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_source(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_source",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_source" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->source(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setDestination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setDestination",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setDestination" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setDestination" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setDestination(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_destination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_destination",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_destination" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->destination(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setLength",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setLength" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setLength" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setLength(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_length(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_length",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_length" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->length(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setType(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setType",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setType" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setType" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setType(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_type(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_type",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_type" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->type(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_data(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_data",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_data" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (char *)(arg1)->data(); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; char *arg2 = (char *) 0 ; int arg3 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; size_t size2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setData",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setData" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, &size2, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Packet_setData" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); arg3 = static_cast< int >(size2 - 1); (arg1)->setData(arg2,arg3); resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_Packet_maxLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Packet_maxLength",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_maxLength" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); result = (int)(arg1)->maxLength(); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_setStrength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setStrength",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setStrength" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setStrength" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->setStrength(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_deliver(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; long long arg3 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; long long val3 ; int ecode3 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Packet_deliver",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_deliver" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_deliver" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); ecode3 = SWIG_AsVal_long_SS_long(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Packet_deliver" "', argument " "3"" of type '" "long long""'"); } arg3 = static_cast< long long >(val3); (arg1)->deliver(arg2,arg3); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Packet_deliverNow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Packet *arg1 = (Packet *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Packet_deliverNow",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_deliverNow" "', argument " "1"" of type '" "Packet *""'"); } arg1 = reinterpret_cast< Packet * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_deliverNow" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->deliverNow(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Packet_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Packet, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_variable_string_t_type_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; char *arg2 = (char *) 0 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_type_set",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_type_set" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "variable_string_t_type_set" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); if (arg1->type) delete[] arg1->type; if (arg2) { size_t size = strlen(reinterpret_cast< const char * >(arg2)) + 1; arg1->type = (char *)reinterpret_cast< char* >(memcpy((new char[size]), reinterpret_cast< const char * >(arg2), sizeof(char)*(size))); } else { arg1->type = 0; } resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_type_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_type_get",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_type_get" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); result = (char *) ((arg1)->type); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_ptr_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; char *arg2 = (char *) 0 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_ptr_set",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_ptr_set" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "variable_string_t_ptr_set" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); if (arg1->ptr) delete[] arg1->ptr; if (arg2) { size_t size = strlen(reinterpret_cast< const char * >(arg2)) + 1; arg1->ptr = (char *)reinterpret_cast< char* >(memcpy((new char[size]), reinterpret_cast< const char * >(arg2), sizeof(char)*(size))); } else { arg1->ptr = 0; } resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_ptr_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_ptr_get",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_ptr_get" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); result = (char *) ((arg1)->ptr); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_len_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_len_set",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_len_set" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "variable_string_t_len_set" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); if (arg1) (arg1)->len = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_len_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_len_get",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_len_get" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); result = (int) ((arg1)->len); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_isArray_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_isArray_set",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_isArray_set" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "variable_string_t_isArray_set" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); if (arg1) (arg1)->isArray = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_variable_string_t_isArray_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; int result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_isArray_get",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_isArray_get" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); result = (int) ((arg1)->isArray); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_new_variable_string_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_variable_string_t")) SWIG_fail; result = (variable_string_t *)new variable_string_t(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_var_string, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_variable_string_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; variable_string_t *arg1 = (variable_string_t *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_variable_string_t",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_variable_string_t" "', argument " "1"" of type '" "variable_string_t *""'"); } arg1 = reinterpret_cast< variable_string_t * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *variable_string_t_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_var_string, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_nesc_app_t_numVariables_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; int arg2 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_numVariables_set",&obj0,&obj1)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "nesc_app_t_numVariables_set" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); if (arg1) (arg1)->numVariables = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_numVariables_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; int result; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_numVariables_get",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } result = (int) ((arg1)->numVariables); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableNames_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; char **arg2 = (char **) 0 ; void *argp2 = 0 ; int res2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableNames_set",&obj0,&obj1)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_p_char, 0 | 0 ); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableNames_set" "', argument " "2"" of type '" "char **""'"); } arg2 = reinterpret_cast< char ** >(argp2); if (arg1) (arg1)->variableNames = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableNames_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; char **result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableNames_get",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } result = (char **) ((arg1)->variableNames); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_p_char, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableTypes_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; char **arg2 = (char **) 0 ; void *argp2 = 0 ; int res2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableTypes_set",&obj0,&obj1)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_p_char, 0 | 0 ); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableTypes_set" "', argument " "2"" of type '" "char **""'"); } arg2 = reinterpret_cast< char ** >(argp2); if (arg1) (arg1)->variableTypes = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableTypes_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; char **result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableTypes_get",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } result = (char **) ((arg1)->variableTypes); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_p_char, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableArray_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; int *arg2 = (int *) 0 ; void *argp2 = 0 ; int res2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableArray_set",&obj0,&obj1)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_int, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableArray_set" "', argument " "2"" of type '" "int *""'"); } arg2 = reinterpret_cast< int * >(argp2); if (arg1) (arg1)->variableArray = arg2; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_nesc_app_t_variableArray_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; int *result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableArray_get",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } result = (int *) ((arg1)->variableArray); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_int, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_new_nesc_app_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *result = 0 ; if (!PyArg_ParseTuple(args,(char *)":new_nesc_app_t")) SWIG_fail; result = (nesc_app_t *)new nesc_app_t(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_nesc_app, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_nesc_app_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_nesc_app_t",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *nesc_app_t_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_nesc_app, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Variable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; char *arg1 = (char *) 0 ; char *arg2 = (char *) 0 ; int arg3 ; int arg4 ; Variable *result = 0 ; int res1 ; char *buf1 = 0 ; int alloc1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; int val3 ; int ecode3 = 0 ; int val4 ; int ecode4 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; PyObject * obj3 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOOO:new_Variable",&obj0,&obj1,&obj2,&obj3)) SWIG_fail; res1 = SWIG_AsCharPtrAndSize(obj0, &buf1, NULL, &alloc1); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "new_Variable" "', argument " "1"" of type '" "char *""'"); } arg1 = reinterpret_cast< char * >(buf1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "new_Variable" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); ecode3 = SWIG_AsVal_int(obj2, &val3); if (!SWIG_IsOK(ecode3)) { SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "new_Variable" "', argument " "3"" of type '" "int""'"); } arg3 = static_cast< int >(val3); ecode4 = SWIG_AsVal_int(obj3, &val4); if (!SWIG_IsOK(ecode4)) { SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "new_Variable" "', argument " "4"" of type '" "int""'"); } arg4 = static_cast< int >(val4); result = (Variable *)new Variable(arg1,arg2,arg3,arg4); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Variable, SWIG_POINTER_NEW | 0 ); if (alloc1 == SWIG_NEWOBJ) delete[] buf1; if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc1 == SWIG_NEWOBJ) delete[] buf1; if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_delete_Variable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Variable *arg1 = (Variable *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Variable",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Variable, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Variable" "', argument " "1"" of type '" "Variable *""'"); } arg1 = reinterpret_cast< Variable * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Variable_getData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Variable *arg1 = (Variable *) 0 ; variable_string_t result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Variable_getData",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Variable, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Variable_getData" "', argument " "1"" of type '" "Variable *""'"); } arg1 = reinterpret_cast< Variable * >(argp1); result = (arg1)->getData(); { if ((&result)->isArray) { //printf("Generating array %s\n", (&result)->type); resultobj = listFromArray ((&result)->type, (&result)->ptr, (&result)->len); } else { //printf("Generating scalar %s\n", (&result)->type); resultobj = valueFromScalar((&result)->type, (&result)->ptr, (&result)->len); } if (resultobj == NULL) { PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable."); } } return resultobj; fail: return NULL; } SWIGINTERN PyObject *Variable_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Variable, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Mote(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; Mote *result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:new_Mote",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } result = (Mote *)new Mote(arg1); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Mote(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Mote",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Mote" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_id(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; unsigned long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_id",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_id" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); result = (unsigned long)(arg1)->id(); resultobj = SWIG_From_unsigned_SS_long(static_cast< unsigned long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_euid(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; long long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_euid",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_euid" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); result = (long long)(arg1)->euid(); resultobj = SWIG_From_long_SS_long(static_cast< long long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_setEuid(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; long long arg2 ; void *argp1 = 0 ; int res1 = 0 ; long long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_setEuid",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_setEuid" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_setEuid" "', argument " "2"" of type '" "long long""'"); } arg2 = static_cast< long long >(val2); (arg1)->setEuid(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_bootTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; long long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_bootTime",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_bootTime" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); result = (long long)(arg1)->bootTime(); resultobj = SWIG_From_long_SS_long(static_cast< long long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_bootAtTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; long long arg2 ; void *argp1 = 0 ; int res1 = 0 ; long long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_bootAtTime",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_bootAtTime" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_bootAtTime" "', argument " "2"" of type '" "long long""'"); } arg2 = static_cast< long long >(val2); (arg1)->bootAtTime(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_isOn(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; bool result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_isOn",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_isOn" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); result = (bool)(arg1)->isOn(); resultobj = SWIG_From_bool(static_cast< bool >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_turnOff(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_turnOff",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_turnOff" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); (arg1)->turnOff(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_turnOn(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_turnOn",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_turnOn" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); (arg1)->turnOn(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_getVariable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; char *arg2 = (char *) 0 ; Variable *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_getVariable",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_getVariable" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Mote_getVariable" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); result = (Variable *)(arg1)->getVariable(arg2); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Variable, 0 | 0 ); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_Mote_addNoiseTraceReading(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_addNoiseTraceReading",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_addNoiseTraceReading" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_addNoiseTraceReading" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->addNoiseTraceReading(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_createNoiseModel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Mote_createNoiseModel",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_createNoiseModel" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); (arg1)->createNoiseModel(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Mote_generateNoise(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Mote *arg1 = (Mote *) 0 ; int arg2 ; int result; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Mote_generateNoise",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_generateNoise" "', argument " "1"" of type '" "Mote *""'"); } arg1 = reinterpret_cast< Mote * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_generateNoise" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); result = (int)(arg1)->generateNoise(arg2); resultobj = SWIG_From_int(static_cast< int >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Mote_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Mote, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } SWIGINTERN PyObject *_wrap_new_Tossim(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; nesc_app_t *arg1 = (nesc_app_t *) 0 ; Tossim *result = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:new_Tossim",&obj0)) SWIG_fail; { if (!PyList_Check(obj0)) { PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter."); return NULL; } else { int size = PyList_Size(obj0); int i = 0; nesc_app_t* app; if (size % 3 != 0) { PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements."); return NULL; } app = (nesc_app_t*)malloc(sizeof(nesc_app_t)); app->numVariables = size / 3; app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables); app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables); app->variableArray = (int*)malloc(sizeof(int) * app->numVariables); memset(app->variableNames, 0, sizeof(char*) * app->numVariables); memset(app->variableTypes, 0, sizeof(char*) * app->numVariables); memset(app->variableArray, 0, sizeof(int) * app->numVariables); for (i = 0; i < app->numVariables; i++) { PyObject* name = PyList_GetItem(obj0, 3 * i); PyObject* array = PyList_GetItem(obj0, (3 * i) + 1); PyObject* format = PyList_GetItem(obj0, (3 * i) + 2); if (PyString_Check(name) && PyString_Check(format)) { app->variableNames[i] = PyString_AsString(name); app->variableTypes[i] = PyString_AsString(format); if (strcmp(PyString_AsString(array), "array") == 0) { app->variableArray[i] = 1; //printf("%s is an array\n", PyString_AsString(name)); } else { app->variableArray[i] = 0; //printf("%s is a scalar\n", PyString_AsString(name)); } } else { app->variableNames[i] = (char*)""; app->variableTypes[i] = (char*)""; } } arg1 = app; } } result = (Tossim *)new Tossim(arg1); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Tossim, SWIG_POINTER_NEW | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_delete_Tossim(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:delete_Tossim",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, SWIG_POINTER_DISOWN | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Tossim" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); delete arg1; resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_init(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_init",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_init" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); (arg1)->init(); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_time(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; long long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_time",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_time" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (long long)(arg1)->time(); resultobj = SWIG_From_long_SS_long(static_cast< long long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_ticksPerSecond(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; long long result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_ticksPerSecond",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_ticksPerSecond" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (long long)(arg1)->ticksPerSecond(); resultobj = SWIG_From_long_SS_long(static_cast< long long >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_setTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; long long arg2 ; void *argp1 = 0 ; int res1 = 0 ; long long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_setTime",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_setTime" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_setTime" "', argument " "2"" of type '" "long long""'"); } arg2 = static_cast< long long >(val2); (arg1)->setTime(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_timeStr(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; char *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_timeStr",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_timeStr" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (char *)(arg1)->timeStr(); resultobj = SWIG_FromCharPtr((const char *)result); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_currentNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; Mote *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_currentNode",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_currentNode" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (Mote *)(arg1)->currentNode(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_getNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; unsigned long arg2 ; Mote *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; unsigned long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_getNode",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_getNode" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_unsigned_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_getNode" "', argument " "2"" of type '" "unsigned long""'"); } arg2 = static_cast< unsigned long >(val2); result = (Mote *)(arg1)->getNode(arg2); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_setCurrentNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; unsigned long arg2 ; void *argp1 = 0 ; int res1 = 0 ; unsigned long val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_setCurrentNode",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_setCurrentNode" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_unsigned_SS_long(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_setCurrentNode" "', argument " "2"" of type '" "unsigned long""'"); } arg2 = static_cast< unsigned long >(val2); (arg1)->setCurrentNode(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_addChannel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; char *arg2 = (char *) 0 ; FILE *arg3 = (FILE *) 0 ; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Tossim_addChannel",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_addChannel" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Tossim_addChannel" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); { if (!PyFile_Check(obj2)) { PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter."); return NULL; } arg3 = PyFile_AsFile(obj2); } (arg1)->addChannel(arg2,arg3); resultobj = SWIG_Py_Void(); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_Tossim_removeChannel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; char *arg2 = (char *) 0 ; FILE *arg3 = (FILE *) 0 ; bool result; void *argp1 = 0 ; int res1 = 0 ; int res2 ; char *buf2 = 0 ; int alloc2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; PyObject * obj2 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OOO:Tossim_removeChannel",&obj0,&obj1,&obj2)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_removeChannel" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2); if (!SWIG_IsOK(res2)) { SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Tossim_removeChannel" "', argument " "2"" of type '" "char *""'"); } arg2 = reinterpret_cast< char * >(buf2); { if (!PyFile_Check(obj2)) { PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter."); return NULL; } arg3 = PyFile_AsFile(obj2); } result = (bool)(arg1)->removeChannel(arg2,arg3); resultobj = SWIG_From_bool(static_cast< bool >(result)); if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return resultobj; fail: if (alloc2 == SWIG_NEWOBJ) delete[] buf2; return NULL; } SWIGINTERN PyObject *_wrap_Tossim_randomSeed(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; int arg2 ; void *argp1 = 0 ; int res1 = 0 ; int val2 ; int ecode2 = 0 ; PyObject * obj0 = 0 ; PyObject * obj1 = 0 ; if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_randomSeed",&obj0,&obj1)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_randomSeed" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); ecode2 = SWIG_AsVal_int(obj1, &val2); if (!SWIG_IsOK(ecode2)) { SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_randomSeed" "', argument " "2"" of type '" "int""'"); } arg2 = static_cast< int >(val2); (arg1)->randomSeed(arg2); resultobj = SWIG_Py_Void(); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_runNextEvent(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; bool result; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_runNextEvent",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_runNextEvent" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (bool)(arg1)->runNextEvent(); resultobj = SWIG_From_bool(static_cast< bool >(result)); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_mac(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; MAC *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_mac",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_mac" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (MAC *)(arg1)->mac(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_MAC, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; Radio *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_radio",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_radio" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (Radio *)(arg1)->radio(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Radio, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *_wrap_Tossim_newPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *resultobj = 0; Tossim *arg1 = (Tossim *) 0 ; Packet *result = 0 ; void *argp1 = 0 ; int res1 = 0 ; PyObject * obj0 = 0 ; if (!PyArg_ParseTuple(args,(char *)"O:Tossim_newPacket",&obj0)) SWIG_fail; res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 | 0 ); if (!SWIG_IsOK(res1)) { SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_newPacket" "', argument " "1"" of type '" "Tossim *""'"); } arg1 = reinterpret_cast< Tossim * >(argp1); result = (Packet *)(arg1)->newPacket(); resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Packet, 0 | 0 ); return resultobj; fail: return NULL; } SWIGINTERN PyObject *Tossim_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) { PyObject *obj; if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL; SWIG_TypeNewClientData(SWIGTYPE_p_Tossim, SWIG_NewClientData(obj)); return SWIG_Py_Void(); } static PyMethodDef SwigMethods[] = { { (char *)"new_MAC", _wrap_new_MAC, METH_VARARGS, NULL}, { (char *)"delete_MAC", _wrap_delete_MAC, METH_VARARGS, NULL}, { (char *)"MAC_initHigh", _wrap_MAC_initHigh, METH_VARARGS, NULL}, { (char *)"MAC_initLow", _wrap_MAC_initLow, METH_VARARGS, NULL}, { (char *)"MAC_high", _wrap_MAC_high, METH_VARARGS, NULL}, { (char *)"MAC_low", _wrap_MAC_low, METH_VARARGS, NULL}, { (char *)"MAC_symbolsPerSec", _wrap_MAC_symbolsPerSec, METH_VARARGS, NULL}, { (char *)"MAC_bitsPerSymbol", _wrap_MAC_bitsPerSymbol, METH_VARARGS, NULL}, { (char *)"MAC_preambleLength", _wrap_MAC_preambleLength, METH_VARARGS, NULL}, { (char *)"MAC_exponentBase", _wrap_MAC_exponentBase, METH_VARARGS, NULL}, { (char *)"MAC_maxIterations", _wrap_MAC_maxIterations, METH_VARARGS, NULL}, { (char *)"MAC_minFreeSamples", _wrap_MAC_minFreeSamples, METH_VARARGS, NULL}, { (char *)"MAC_rxtxDelay", _wrap_MAC_rxtxDelay, METH_VARARGS, NULL}, { (char *)"MAC_ackTime", _wrap_MAC_ackTime, METH_VARARGS, NULL}, { (char *)"MAC_setInitHigh", _wrap_MAC_setInitHigh, METH_VARARGS, NULL}, { (char *)"MAC_setInitLow", _wrap_MAC_setInitLow, METH_VARARGS, NULL}, { (char *)"MAC_setHigh", _wrap_MAC_setHigh, METH_VARARGS, NULL}, { (char *)"MAC_setLow", _wrap_MAC_setLow, METH_VARARGS, NULL}, { (char *)"MAC_setSymbolsPerSec", _wrap_MAC_setSymbolsPerSec, METH_VARARGS, NULL}, { (char *)"MAC_setBitsBerSymbol", _wrap_MAC_setBitsBerSymbol, METH_VARARGS, NULL}, { (char *)"MAC_setPreambleLength", _wrap_MAC_setPreambleLength, METH_VARARGS, NULL}, { (char *)"MAC_setExponentBase", _wrap_MAC_setExponentBase, METH_VARARGS, NULL}, { (char *)"MAC_setMaxIterations", _wrap_MAC_setMaxIterations, METH_VARARGS, NULL}, { (char *)"MAC_setMinFreeSamples", _wrap_MAC_setMinFreeSamples, METH_VARARGS, NULL}, { (char *)"MAC_setRxtxDelay", _wrap_MAC_setRxtxDelay, METH_VARARGS, NULL}, { (char *)"MAC_setAckTime", _wrap_MAC_setAckTime, METH_VARARGS, NULL}, { (char *)"MAC_swigregister", MAC_swigregister, METH_VARARGS, NULL}, { (char *)"new_Radio", _wrap_new_Radio, METH_VARARGS, NULL}, { (char *)"delete_Radio", _wrap_delete_Radio, METH_VARARGS, NULL}, { (char *)"Radio_add", _wrap_Radio_add, METH_VARARGS, NULL}, { (char *)"Radio_gain", _wrap_Radio_gain, METH_VARARGS, NULL}, { (char *)"Radio_connected", _wrap_Radio_connected, METH_VARARGS, NULL}, { (char *)"Radio_remove", _wrap_Radio_remove, METH_VARARGS, NULL}, { (char *)"Radio_setNoise", _wrap_Radio_setNoise, METH_VARARGS, NULL}, { (char *)"Radio_setSensitivity", _wrap_Radio_setSensitivity, METH_VARARGS, NULL}, { (char *)"Radio_swigregister", Radio_swigregister, METH_VARARGS, NULL}, { (char *)"new_Packet", _wrap_new_Packet, METH_VARARGS, NULL}, { (char *)"delete_Packet", _wrap_delete_Packet, METH_VARARGS, NULL}, { (char *)"Packet_setSource", _wrap_Packet_setSource, METH_VARARGS, NULL}, { (char *)"Packet_source", _wrap_Packet_source, METH_VARARGS, NULL}, { (char *)"Packet_setDestination", _wrap_Packet_setDestination, METH_VARARGS, NULL}, { (char *)"Packet_destination", _wrap_Packet_destination, METH_VARARGS, NULL}, { (char *)"Packet_setLength", _wrap_Packet_setLength, METH_VARARGS, NULL}, { (char *)"Packet_length", _wrap_Packet_length, METH_VARARGS, NULL}, { (char *)"Packet_setType", _wrap_Packet_setType, METH_VARARGS, NULL}, { (char *)"Packet_type", _wrap_Packet_type, METH_VARARGS, NULL}, { (char *)"Packet_data", _wrap_Packet_data, METH_VARARGS, NULL}, { (char *)"Packet_setData", _wrap_Packet_setData, METH_VARARGS, NULL}, { (char *)"Packet_maxLength", _wrap_Packet_maxLength, METH_VARARGS, NULL}, { (char *)"Packet_setStrength", _wrap_Packet_setStrength, METH_VARARGS, NULL}, { (char *)"Packet_deliver", _wrap_Packet_deliver, METH_VARARGS, NULL}, { (char *)"Packet_deliverNow", _wrap_Packet_deliverNow, METH_VARARGS, NULL}, { (char *)"Packet_swigregister", Packet_swigregister, METH_VARARGS, NULL}, { (char *)"variable_string_t_type_set", _wrap_variable_string_t_type_set, METH_VARARGS, NULL}, { (char *)"variable_string_t_type_get", _wrap_variable_string_t_type_get, METH_VARARGS, NULL}, { (char *)"variable_string_t_ptr_set", _wrap_variable_string_t_ptr_set, METH_VARARGS, NULL}, { (char *)"variable_string_t_ptr_get", _wrap_variable_string_t_ptr_get, METH_VARARGS, NULL}, { (char *)"variable_string_t_len_set", _wrap_variable_string_t_len_set, METH_VARARGS, NULL}, { (char *)"variable_string_t_len_get", _wrap_variable_string_t_len_get, METH_VARARGS, NULL}, { (char *)"variable_string_t_isArray_set", _wrap_variable_string_t_isArray_set, METH_VARARGS, NULL}, { (char *)"variable_string_t_isArray_get", _wrap_variable_string_t_isArray_get, METH_VARARGS, NULL}, { (char *)"new_variable_string_t", _wrap_new_variable_string_t, METH_VARARGS, NULL}, { (char *)"delete_variable_string_t", _wrap_delete_variable_string_t, METH_VARARGS, NULL}, { (char *)"variable_string_t_swigregister", variable_string_t_swigregister, METH_VARARGS, NULL}, { (char *)"nesc_app_t_numVariables_set", _wrap_nesc_app_t_numVariables_set, METH_VARARGS, NULL}, { (char *)"nesc_app_t_numVariables_get", _wrap_nesc_app_t_numVariables_get, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableNames_set", _wrap_nesc_app_t_variableNames_set, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableNames_get", _wrap_nesc_app_t_variableNames_get, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableTypes_set", _wrap_nesc_app_t_variableTypes_set, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableTypes_get", _wrap_nesc_app_t_variableTypes_get, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableArray_set", _wrap_nesc_app_t_variableArray_set, METH_VARARGS, NULL}, { (char *)"nesc_app_t_variableArray_get", _wrap_nesc_app_t_variableArray_get, METH_VARARGS, NULL}, { (char *)"new_nesc_app_t", _wrap_new_nesc_app_t, METH_VARARGS, NULL}, { (char *)"delete_nesc_app_t", _wrap_delete_nesc_app_t, METH_VARARGS, NULL}, { (char *)"nesc_app_t_swigregister", nesc_app_t_swigregister, METH_VARARGS, NULL}, { (char *)"new_Variable", _wrap_new_Variable, METH_VARARGS, NULL}, { (char *)"delete_Variable", _wrap_delete_Variable, METH_VARARGS, NULL}, { (char *)"Variable_getData", _wrap_Variable_getData, METH_VARARGS, NULL}, { (char *)"Variable_swigregister", Variable_swigregister, METH_VARARGS, NULL}, { (char *)"new_Mote", _wrap_new_Mote, METH_VARARGS, NULL}, { (char *)"delete_Mote", _wrap_delete_Mote, METH_VARARGS, NULL}, { (char *)"Mote_id", _wrap_Mote_id, METH_VARARGS, NULL}, { (char *)"Mote_euid", _wrap_Mote_euid, METH_VARARGS, NULL}, { (char *)"Mote_setEuid", _wrap_Mote_setEuid, METH_VARARGS, NULL}, { (char *)"Mote_bootTime", _wrap_Mote_bootTime, METH_VARARGS, NULL}, { (char *)"Mote_bootAtTime", _wrap_Mote_bootAtTime, METH_VARARGS, NULL}, { (char *)"Mote_isOn", _wrap_Mote_isOn, METH_VARARGS, NULL}, { (char *)"Mote_turnOff", _wrap_Mote_turnOff, METH_VARARGS, NULL}, { (char *)"Mote_turnOn", _wrap_Mote_turnOn, METH_VARARGS, NULL}, { (char *)"Mote_getVariable", _wrap_Mote_getVariable, METH_VARARGS, NULL}, { (char *)"Mote_addNoiseTraceReading", _wrap_Mote_addNoiseTraceReading, METH_VARARGS, NULL}, { (char *)"Mote_createNoiseModel", _wrap_Mote_createNoiseModel, METH_VARARGS, NULL}, { (char *)"Mote_generateNoise", _wrap_Mote_generateNoise, METH_VARARGS, NULL}, { (char *)"Mote_swigregister", Mote_swigregister, METH_VARARGS, NULL}, { (char *)"new_Tossim", _wrap_new_Tossim, METH_VARARGS, NULL}, { (char *)"delete_Tossim", _wrap_delete_Tossim, METH_VARARGS, NULL}, { (char *)"Tossim_init", _wrap_Tossim_init, METH_VARARGS, NULL}, { (char *)"Tossim_time", _wrap_Tossim_time, METH_VARARGS, NULL}, { (char *)"Tossim_ticksPerSecond", _wrap_Tossim_ticksPerSecond, METH_VARARGS, NULL}, { (char *)"Tossim_setTime", _wrap_Tossim_setTime, METH_VARARGS, NULL}, { (char *)"Tossim_timeStr", _wrap_Tossim_timeStr, METH_VARARGS, NULL}, { (char *)"Tossim_currentNode", _wrap_Tossim_currentNode, METH_VARARGS, NULL}, { (char *)"Tossim_getNode", _wrap_Tossim_getNode, METH_VARARGS, NULL}, { (char *)"Tossim_setCurrentNode", _wrap_Tossim_setCurrentNode, METH_VARARGS, NULL}, { (char *)"Tossim_addChannel", _wrap_Tossim_addChannel, METH_VARARGS, NULL}, { (char *)"Tossim_removeChannel", _wrap_Tossim_removeChannel, METH_VARARGS, NULL}, { (char *)"Tossim_randomSeed", _wrap_Tossim_randomSeed, METH_VARARGS, NULL}, { (char *)"Tossim_runNextEvent", _wrap_Tossim_runNextEvent, METH_VARARGS, NULL}, { (char *)"Tossim_mac", _wrap_Tossim_mac, METH_VARARGS, NULL}, { (char *)"Tossim_radio", _wrap_Tossim_radio, METH_VARARGS, NULL}, { (char *)"Tossim_newPacket", _wrap_Tossim_newPacket, METH_VARARGS, NULL}, { (char *)"Tossim_swigregister", Tossim_swigregister, METH_VARARGS, NULL}, { NULL, NULL, 0, NULL } }; /* -------- TYPE CONVERSION AND EQUIVALENCE RULES (BEGIN) -------- */ static swig_type_info _swigt__p_FILE = {"_p_FILE", "FILE *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_MAC = {"_p_MAC", "MAC *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Mote = {"_p_Mote", "Mote *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Packet = {"_p_Packet", "Packet *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Radio = {"_p_Radio", "Radio *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Tossim = {"_p_Tossim", "Tossim *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_Variable = {"_p_Variable", "Variable *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_char = {"_p_char", "char *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_int = {"_p_int", "int *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_nesc_app = {"_p_nesc_app", "nesc_app *|nesc_app_t *", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_p_char = {"_p_p_char", "char **", 0, 0, (void*)0, 0}; static swig_type_info _swigt__p_var_string = {"_p_var_string", "var_string *|variable_string_t *", 0, 0, (void*)0, 0}; static swig_type_info *swig_type_initial[] = { &_swigt__p_FILE, &_swigt__p_MAC, &_swigt__p_Mote, &_swigt__p_Packet, &_swigt__p_Radio, &_swigt__p_Tossim, &_swigt__p_Variable, &_swigt__p_char, &_swigt__p_int, &_swigt__p_nesc_app, &_swigt__p_p_char, &_swigt__p_var_string, }; static swig_cast_info _swigc__p_FILE[] = { {&_swigt__p_FILE, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_MAC[] = { {&_swigt__p_MAC, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Mote[] = { {&_swigt__p_Mote, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Packet[] = { {&_swigt__p_Packet, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Radio[] = { {&_swigt__p_Radio, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Tossim[] = { {&_swigt__p_Tossim, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_Variable[] = { {&_swigt__p_Variable, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_char[] = { {&_swigt__p_char, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_int[] = { {&_swigt__p_int, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_nesc_app[] = { {&_swigt__p_nesc_app, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_p_char[] = { {&_swigt__p_p_char, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info _swigc__p_var_string[] = { {&_swigt__p_var_string, 0, 0, 0},{0, 0, 0, 0}}; static swig_cast_info *swig_cast_initial[] = { _swigc__p_FILE, _swigc__p_MAC, _swigc__p_Mote, _swigc__p_Packet, _swigc__p_Radio, _swigc__p_Tossim, _swigc__p_Variable, _swigc__p_char, _swigc__p_int, _swigc__p_nesc_app, _swigc__p_p_char, _swigc__p_var_string, }; /* -------- TYPE CONVERSION AND EQUIVALENCE RULES (END) -------- */ static swig_const_info swig_const_table[] = { {0, 0, 0, 0.0, 0, 0}}; #ifdef __cplusplus } #endif /* ----------------------------------------------------------------------------- * Type initialization: * This problem is tough by the requirement that no dynamic * memory is used. Also, since swig_type_info structures store pointers to * swig_cast_info structures and swig_cast_info structures store pointers back * to swig_type_info structures, we need some lookup code at initialization. * The idea is that swig generates all the structures that are needed. * The runtime then collects these partially filled structures. * The SWIG_InitializeModule function takes these initial arrays out of * swig_module, and does all the lookup, filling in the swig_module.types * array with the correct data and linking the correct swig_cast_info * structures together. * * The generated swig_type_info structures are assigned staticly to an initial * array. We just loop through that array, and handle each type individually. * First we lookup if this type has been already loaded, and if so, use the * loaded structure instead of the generated one. Then we have to fill in the * cast linked list. The cast data is initially stored in something like a * two-dimensional array. Each row corresponds to a type (there are the same * number of rows as there are in the swig_type_initial array). Each entry in * a column is one of the swig_cast_info structures for that type. * The cast_initial array is actually an array of arrays, because each row has * a variable number of columns. So to actually build the cast linked list, * we find the array of casts associated with the type, and loop through it * adding the casts to the list. The one last trick we need to do is making * sure the type pointer in the swig_cast_info struct is correct. * * First off, we lookup the cast->type name to see if it is already loaded. * There are three cases to handle: * 1) If the cast->type has already been loaded AND the type we are adding * casting info to has not been loaded (it is in this module), THEN we * replace the cast->type pointer with the type pointer that has already * been loaded. * 2) If BOTH types (the one we are adding casting info to, and the * cast->type) are loaded, THEN the cast info has already been loaded by * the previous module so we just ignore it. * 3) Finally, if cast->type has not already been loaded, then we add that * swig_cast_info to the linked list (because the cast->type) pointer will * be correct. * ----------------------------------------------------------------------------- */ #ifdef __cplusplus extern "C" { #if 0 } /* c-mode */ #endif #endif #if 0 #define SWIGRUNTIME_DEBUG #endif SWIGRUNTIME void SWIG_InitializeModule(void *clientdata) { size_t i; swig_module_info *module_head, *iter; int found; clientdata = clientdata; /* check to see if the circular list has been setup, if not, set it up */ if (swig_module.next==0) { /* Initialize the swig_module */ swig_module.type_initial = swig_type_initial; swig_module.cast_initial = swig_cast_initial; swig_module.next = &swig_module; } /* Try and load any already created modules */ module_head = SWIG_GetModule(clientdata); if (!module_head) { /* This is the first module loaded for this interpreter */ /* so set the swig module into the interpreter */ SWIG_SetModule(clientdata, &swig_module); module_head = &swig_module; } else { /* the interpreter has loaded a SWIG module, but has it loaded this one? */ found=0; iter=module_head; do { if (iter==&swig_module) { found=1; break; } iter=iter->next; } while (iter!= module_head); /* if the is found in the list, then all is done and we may leave */ if (found) return; /* otherwise we must add out module into the list */ swig_module.next = module_head->next; module_head->next = &swig_module; } /* Now work on filling in swig_module.types */ #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: size %d\n", swig_module.size); #endif for (i = 0; i < swig_module.size; ++i) { swig_type_info *type = 0; swig_type_info *ret; swig_cast_info *cast; #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: type %d %s\n", i, swig_module.type_initial[i]->name); #endif /* if there is another module already loaded */ if (swig_module.next != &swig_module) { type = SWIG_MangledTypeQueryModule(swig_module.next, &swig_module, swig_module.type_initial[i]->name); } if (type) { /* Overwrite clientdata field */ #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: found type %s\n", type->name); #endif if (swig_module.type_initial[i]->clientdata) { type->clientdata = swig_module.type_initial[i]->clientdata; #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: found and overwrite type %s \n", type->name); #endif } } else { type = swig_module.type_initial[i]; } /* Insert casting types */ cast = swig_module.cast_initial[i]; while (cast->type) { /* Don't need to add information already in the list */ ret = 0; #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: look cast %s\n", cast->type->name); #endif if (swig_module.next != &swig_module) { ret = SWIG_MangledTypeQueryModule(swig_module.next, &swig_module, cast->type->name); #ifdef SWIGRUNTIME_DEBUG if (ret) printf("SWIG_InitializeModule: found cast %s\n", ret->name); #endif } if (ret) { if (type == swig_module.type_initial[i]) { #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: skip old type %s\n", ret->name); #endif cast->type = ret; ret = 0; } else { /* Check for casting already in the list */ swig_cast_info *ocast = SWIG_TypeCheck(ret->name, type); #ifdef SWIGRUNTIME_DEBUG if (ocast) printf("SWIG_InitializeModule: skip old cast %s\n", ret->name); #endif if (!ocast) ret = 0; } } if (!ret) { #ifdef SWIGRUNTIME_DEBUG printf("SWIG_InitializeModule: adding cast %s\n", cast->type->name); #endif if (type->cast) { type->cast->prev = cast; cast->next = type->cast; } type->cast = cast; } cast++; } /* Set entry in modules->types array equal to the type */ swig_module.types[i] = type; } swig_module.types[i] = 0; #ifdef SWIGRUNTIME_DEBUG printf("**** SWIG_InitializeModule: Cast List ******\n"); for (i = 0; i < swig_module.size; ++i) { int j = 0; swig_cast_info *cast = swig_module.cast_initial[i]; printf("SWIG_InitializeModule: type %d %s\n", i, swig_module.type_initial[i]->name); while (cast->type) { printf("SWIG_InitializeModule: cast type %s\n", cast->type->name); cast++; ++j; } printf("---- Total casts: %d\n",j); } printf("**** SWIG_InitializeModule: Cast List ******\n"); #endif } /* This function will propagate the clientdata field of type to * any new swig_type_info structures that have been added into the list * of equivalent types. It is like calling * SWIG_TypeClientData(type, clientdata) a second time. */ SWIGRUNTIME void SWIG_PropagateClientData(void) { size_t i; swig_cast_info *equiv; static int init_run = 0; if (init_run) return; init_run = 1; for (i = 0; i < swig_module.size; i++) { if (swig_module.types[i]->clientdata) { equiv = swig_module.types[i]->cast; while (equiv) { if (!equiv->converter) { if (equiv->type && !equiv->type->clientdata) SWIG_TypeClientData(equiv->type, swig_module.types[i]->clientdata); } equiv = equiv->next; } } } } #ifdef __cplusplus #if 0 { /* c-mode */ #endif } #endif #ifdef __cplusplus extern "C" { #endif /* Python-specific SWIG API */ #define SWIG_newvarlink() SWIG_Python_newvarlink() #define SWIG_addvarlink(p, name, get_attr, set_attr) SWIG_Python_addvarlink(p, name, get_attr, set_attr) #define SWIG_InstallConstants(d, constants) SWIG_Python_InstallConstants(d, constants) /* ----------------------------------------------------------------------------- * global variable support code. * ----------------------------------------------------------------------------- */ typedef struct swig_globalvar { char *name; /* Name of global variable */ PyObject *(*get_attr)(void); /* Return the current value */ int (*set_attr)(PyObject *); /* Set the value */ struct swig_globalvar *next; } swig_globalvar; typedef struct swig_varlinkobject { PyObject_HEAD swig_globalvar *vars; } swig_varlinkobject; SWIGINTERN PyObject * swig_varlink_repr(swig_varlinkobject *SWIGUNUSEDPARM(v)) { return PyString_FromString(""); } SWIGINTERN PyObject * swig_varlink_str(swig_varlinkobject *v) { PyObject *str = PyString_FromString("("); swig_globalvar *var; for (var = v->vars; var; var=var->next) { PyString_ConcatAndDel(&str,PyString_FromString(var->name)); if (var->next) PyString_ConcatAndDel(&str,PyString_FromString(", ")); } PyString_ConcatAndDel(&str,PyString_FromString(")")); return str; } SWIGINTERN int swig_varlink_print(swig_varlinkobject *v, FILE *fp, int SWIGUNUSEDPARM(flags)) { PyObject *str = swig_varlink_str(v); fprintf(fp,"Swig global variables "); fprintf(fp,"%s\n", PyString_AsString(str)); Py_DECREF(str); return 0; } SWIGINTERN void swig_varlink_dealloc(swig_varlinkobject *v) { swig_globalvar *var = v->vars; while (var) { swig_globalvar *n = var->next; free(var->name); free(var); var = n; } } SWIGINTERN PyObject * swig_varlink_getattr(swig_varlinkobject *v, char *n) { PyObject *res = NULL; swig_globalvar *var = v->vars; while (var) { if (strcmp(var->name,n) == 0) { res = (*var->get_attr)(); break; } var = var->next; } if (res == NULL && !PyErr_Occurred()) { PyErr_SetString(PyExc_NameError,"Unknown C global variable"); } return res; } SWIGINTERN int swig_varlink_setattr(swig_varlinkobject *v, char *n, PyObject *p) { int res = 1; swig_globalvar *var = v->vars; while (var) { if (strcmp(var->name,n) == 0) { res = (*var->set_attr)(p); break; } var = var->next; } if (res == 1 && !PyErr_Occurred()) { PyErr_SetString(PyExc_NameError,"Unknown C global variable"); } return res; } SWIGINTERN PyTypeObject* swig_varlink_type(void) { static char varlink__doc__[] = "Swig var link object"; static PyTypeObject varlink_type; static int type_init = 0; if (!type_init) { const PyTypeObject tmp = { PyObject_HEAD_INIT(NULL) 0, /* Number of items in variable part (ob_size) */ (char *)"swigvarlink", /* Type name (tp_name) */ sizeof(swig_varlinkobject), /* Basic size (tp_basicsize) */ 0, /* Itemsize (tp_itemsize) */ (destructor) swig_varlink_dealloc, /* Deallocator (tp_dealloc) */ (printfunc) swig_varlink_print, /* Print (tp_print) */ (getattrfunc) swig_varlink_getattr, /* get attr (tp_getattr) */ (setattrfunc) swig_varlink_setattr, /* Set attr (tp_setattr) */ 0, /* tp_compare */ (reprfunc) swig_varlink_repr, /* tp_repr */ 0, /* tp_as_number */ 0, /* tp_as_sequence */ 0, /* tp_as_mapping */ 0, /* tp_hash */ 0, /* tp_call */ (reprfunc)swig_varlink_str, /* tp_str */ 0, /* tp_getattro */ 0, /* tp_setattro */ 0, /* tp_as_buffer */ 0, /* tp_flags */ varlink__doc__, /* tp_doc */ 0, /* tp_traverse */ 0, /* tp_clear */ 0, /* tp_richcompare */ 0, /* tp_weaklistoffset */ #if PY_VERSION_HEX >= 0x02020000 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* tp_iter -> tp_weaklist */ #endif #if PY_VERSION_HEX >= 0x02030000 0, /* tp_del */ #endif #ifdef COUNT_ALLOCS 0,0,0,0 /* tp_alloc -> tp_next */ #endif }; varlink_type = tmp; varlink_type.ob_type = &PyType_Type; type_init = 1; } return &varlink_type; } /* Create a variable linking object for use later */ SWIGINTERN PyObject * SWIG_Python_newvarlink(void) { swig_varlinkobject *result = PyObject_NEW(swig_varlinkobject, swig_varlink_type()); if (result) { result->vars = 0; } return ((PyObject*) result); } SWIGINTERN void SWIG_Python_addvarlink(PyObject *p, char *name, PyObject *(*get_attr)(void), int (*set_attr)(PyObject *p)) { swig_varlinkobject *v = (swig_varlinkobject *) p; swig_globalvar *gv = (swig_globalvar *) malloc(sizeof(swig_globalvar)); if (gv) { size_t size = strlen(name)+1; gv->name = (char *)malloc(size); if (gv->name) { strncpy(gv->name,name,size); gv->get_attr = get_attr; gv->set_attr = set_attr; gv->next = v->vars; } } v->vars = gv; } SWIGINTERN PyObject * SWIG_globals(void) { static PyObject *_SWIG_globals = 0; if (!_SWIG_globals) _SWIG_globals = SWIG_newvarlink(); return _SWIG_globals; } /* ----------------------------------------------------------------------------- * constants/methods manipulation * ----------------------------------------------------------------------------- */ /* Install Constants */ SWIGINTERN void SWIG_Python_InstallConstants(PyObject *d, swig_const_info constants[]) { PyObject *obj = 0; size_t i; for (i = 0; constants[i].type; ++i) { switch(constants[i].type) { case SWIG_PY_POINTER: obj = SWIG_NewPointerObj(constants[i].pvalue, *(constants[i]).ptype,0); break; case SWIG_PY_BINARY: obj = SWIG_NewPackedObj(constants[i].pvalue, constants[i].lvalue, *(constants[i].ptype)); break; default: obj = 0; break; } if (obj) { PyDict_SetItemString(d, constants[i].name, obj); Py_DECREF(obj); } } } /* -----------------------------------------------------------------------------*/ /* Fix SwigMethods to carry the callback ptrs when needed */ /* -----------------------------------------------------------------------------*/ SWIGINTERN void SWIG_Python_FixMethods(PyMethodDef *methods, swig_const_info *const_table, swig_type_info **types, swig_type_info **types_initial) { size_t i; for (i = 0; methods[i].ml_name; ++i) { const char *c = methods[i].ml_doc; if (c && (c = strstr(c, "swig_ptr: "))) { int j; swig_const_info *ci = 0; const char *name = c + 10; for (j = 0; const_table[j].type; ++j) { if (strncmp(const_table[j].name, name, strlen(const_table[j].name)) == 0) { ci = &(const_table[j]); break; } } if (ci) { size_t shift = (ci->ptype) - types; swig_type_info *ty = types_initial[shift]; size_t ldoc = (c - methods[i].ml_doc); size_t lptr = strlen(ty->name)+2*sizeof(void*)+2; char *ndoc = (char*)malloc(ldoc + lptr + 10); if (ndoc) { char *buff = ndoc; void *ptr = (ci->type == SWIG_PY_POINTER) ? ci->pvalue : 0; if (ptr) { strncpy(buff, methods[i].ml_doc, ldoc); buff += ldoc; strncpy(buff, "swig_ptr: ", 10); buff += 10; SWIG_PackVoidPtr(buff, ptr, ty->name, lptr); methods[i].ml_doc = ndoc; } } } } } } #ifdef __cplusplus } #endif /* -----------------------------------------------------------------------------* * Partial Init method * -----------------------------------------------------------------------------*/ #ifdef __cplusplus extern "C" #endif SWIGEXPORT void SWIG_init(void) { PyObject *m, *d; /* Fix SwigMethods to carry the callback ptrs when needed */ SWIG_Python_FixMethods(SwigMethods, swig_const_table, swig_types, swig_type_initial); m = Py_InitModule((char *) SWIG_name, SwigMethods); d = PyModule_GetDict(m); SWIG_InitializeModule(0); SWIG_InstallConstants(d,swig_const_table); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/000077500000000000000000000000001207233610700175145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/000077500000000000000000000000001207233610700206225ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/000077500000000000000000000000001207233610700216365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128AdcC.nc000066400000000000000000000041421207233610700243140ustar00rootroot00000000000000/// $Id: HplAtm128AdcC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL for the Atmega128 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ configuration HplAtm128AdcC { provides interface HplAtm128Adc; } implementation { components HplAtm128AdcP, McuSleepC; HplAtm128Adc = HplAtm128AdcP; HplAtm128AdcP.McuPowerState -> McuSleepC; components PlatformInterruptC; HplAtm128AdcP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128AdcP.nc000066400000000000000000000120301207233610700243240ustar00rootroot00000000000000/// $Id: HplAtm128AdcP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "Atm128Adc.h" /** * HPL for the Atmega128 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay */ module HplAtm128AdcP { provides interface HplAtm128Adc; uses interface McuPowerState; uses interface PlatformInterrupt; } implementation { //=== Direct read of HW registers. ================================= async command Atm128Admux_t HplAtm128Adc.getAdmux() { return *(Atm128Admux_t*)&ADMUX; } async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { return *(Atm128Adcsra_t*)&ADCSRA; } async command uint16_t HplAtm128Adc.getValue() { return ADC; } DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t); DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t); //=== Direct write of HW registers. ================================ async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) { ADMUX = Admux2int(x); } async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { ADCSRA = Adcsra2int(x); } async command void HplAtm128Adc.setPrescaler(uint8_t scale){ Atm128Adcsra_t current_val = call HplAtm128Adc.getAdcsra(); current_val.adif = FALSE; current_val.adps = scale; call HplAtm128Adc.setAdcsra(current_val); } // Individual bit manipulation. These all clear any pending A/D interrupt. async command void HplAtm128Adc.enableAdc() { SET_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.disableAdc() { CLR_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.setContinuous() { SET_BIT(ADCSRA, ADFR); } async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADFR); } async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); } async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); } /* A/D status checks */ async command bool HplAtm128Adc.isEnabled() { return (call HplAtm128Adc.getAdcsra()).aden; } async command bool HplAtm128Adc.isStarted() { return (call HplAtm128Adc.getAdcsra()).adsc; } async command bool HplAtm128Adc.isComplete() { return (call HplAtm128Adc.getAdcsra()).adif; } /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */ AVR_ATOMIC_HANDLER(SIG_ADC) { uint16_t data = call HplAtm128Adc.getValue(); __nesc_enable_interrupt(); signal HplAtm128Adc.dataReady(data); call PlatformInterrupt.postAmble(); } default async event void HplAtm128Adc.dataReady(uint16_t done) { } async command bool HplAtm128Adc.cancel() { /* This is tricky */ atomic { Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr; /* To cancel a conversion, first turn off ADEN, then turn off ADSC. We also cancel any pending interrupt. Finally we reenable the ADC. */ newSr = oldSr; newSr.aden = FALSE; newSr.adif = TRUE; /* This clears a pending interrupt... */ newSr.adie = FALSE; /* We don't want to start sampling again at the next sleep */ call HplAtm128Adc.setAdcsra(newSr); newSr.adsc = FALSE; call HplAtm128Adc.setAdcsra(newSr); newSr.aden = TRUE; call HplAtm128Adc.setAdcsra(newSr); return oldSr.adif || oldSr.adsc; } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128I2CBusC.nc000066400000000000000000000044731207233610700246630ustar00rootroot00000000000000/// $Id: HplAtm128I2CBusC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2006 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This driver implements direct I2C register access and a blocking master * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its * two-wire-interface (TWI) hardware subsystem. * * @author Martin Turon * @author Philip Levis * * @version $Id: HplAtm128I2CBusC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ */ configuration HplAtm128I2CBusC { provides interface HplAtm128I2CBus as I2C; } implementation { components HplAtm128GeneralIOC as IO, HplAtm128I2CBusP as Bus; I2C = Bus.I2C; Bus.I2CClk -> IO.PortD0; Bus.I2CData -> IO.PortD1; components PlatformInterruptC; Bus.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128I2CBusP.nc000066400000000000000000000121241207233610700246700ustar00rootroot00000000000000/// $Id: HplAtm128I2CBusP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #define F_CPU 7372800 #include "Atm128I2C.h" /** * This driver implements direct I2C register access and a blocking master * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its * two-wire-interface (TWI) hardware subsystem. * * @author Martin Turon * @author Philip Levis * * @version $Id: HplAtm128I2CBusP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ */ module HplAtm128I2CBusP { provides interface HplAtm128I2CBus as I2C; uses { interface GeneralIO as I2CClk; interface GeneralIO as I2CData; interface PlatformInterrupt; } } implementation { uint8_t current; async command void I2C.init(bool hasExternalPulldown) { // Set the internal pullup resisters if (hasExternalPulldown) { //call I2CClk.makeOutput(); //call I2CData.makeOutput(); call I2CClk.set(); call I2CData.set(); } call I2CClk.makeInput(); call I2CData.makeInput(); TWSR = 0; // set prescaler == 0 TWBR = (F_CPU / 50000UL - 16) / 2; // set I2C baud rate //TWBR = 50; TWAR = 0; TWCR = 0; } async command void I2C.off() { call I2CClk.clr(); call I2CData.clr(); } async command uint8_t I2C.status() { return TWSR & 0xf8; } async command void I2C.sendCommand() { atomic TWCR = current; } async command void I2C.readCurrent() { atomic current = TWCR; } /** Send START symbol and begin I2C bus transaction. */ async command void I2C.setStart(bool on) { if (on) { atomic SET_BIT(current, TWSTA); } else { atomic CLR_BIT(current, TWSTA); } } async command bool I2C.hasStart() { return READ_BIT(current, TWSTA); } async command void I2C.setStop(bool on) { if (on) { atomic SET_BIT(current, TWSTO); } else { atomic CLR_BIT(current, TWSTO); } } async command bool I2C.hasStop() { return READ_BIT(current, TWSTO); } /** Write a byte to an I2C slave device. */ async command void I2C.write(uint8_t data) { TWDR = data; } async command uint8_t I2C.read() { return TWDR; } async command void I2C.enableAck(bool enable) { if (enable) { atomic SET_BIT(current, TWEA); } else { atomic CLR_BIT(current, TWEA); } } async command bool I2C.hasAcks() { return READ_BIT(current, TWEA); } async command void I2C.enableInterrupt(bool enable) { if (enable) { atomic SET_BIT(current, TWIE); } else { atomic CLR_BIT(current, TWIE); } } async command bool I2C.isInterruptEnabled() { return READ_BIT(current, TWIE); } async command bool I2C.isRealInterruptPending() { return READ_BIT(TWCR, TWINT); } async command bool I2C.isInterruptPending() { return READ_BIT(current, TWINT); } async command void I2C.setInterruptPending(bool on) { if (on) { atomic SET_BIT(current, TWINT); } else { atomic CLR_BIT(current, TWINT); } } async command void I2C.enable(bool enable) { if (enable) { atomic SET_BIT(current, TWEN); } else { atomic CLR_BIT(current, TWEN); } } async command bool I2C.isEnabled() { return READ_BIT(current, TWEN); } async command bool I2C.hasWriteCollided() { return READ_BIT(current, TWWC); } default async event void I2C.commandComplete() { } AVR_ATOMIC_HANDLER(SIG_2WIRE_SERIAL) { signal I2C.commandComplete(); call PlatformInterrupt.postAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128InterruptC.nc000066400000000000000000000067351207233610700256330ustar00rootroot00000000000000/// $Id: HplAtm128InterruptC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include /** * Component providing access to all external interrupt pins on ATmega128. * @author Martin Turon */ configuration HplAtm128InterruptC { // provides all the ports as raw ports provides { interface HplAtm128Interrupt as Int0; interface HplAtm128Interrupt as Int1; interface HplAtm128Interrupt as Int2; interface HplAtm128Interrupt as Int3; interface HplAtm128Interrupt as Int4; interface HplAtm128Interrupt as Int5; interface HplAtm128Interrupt as Int6; interface HplAtm128Interrupt as Int7; } } implementation { #define IRQ_PORT_D_PIN(bit) (uint8_t)&EICRA, ISC##bit##0, ISC##bit##1, bit #define IRQ_PORT_E_PIN(bit) (uint8_t)&EICRB, ISC##bit##0, ISC##bit##1, bit components HplAtm128InterruptSigP as IrqVector, new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(0)) as IntPin0, new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(1)) as IntPin1, new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(2)) as IntPin2, new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(3)) as IntPin3, new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(4)) as IntPin4, new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(5)) as IntPin5, new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(6)) as IntPin6, new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(7)) as IntPin7; Int0 = IntPin0; Int1 = IntPin1; Int2 = IntPin2; Int3 = IntPin3; Int4 = IntPin4; Int5 = IntPin5; Int6 = IntPin6; Int7 = IntPin7; IntPin0.IrqSignal -> IrqVector.IntSig0; IntPin1.IrqSignal -> IrqVector.IntSig1; IntPin2.IrqSignal -> IrqVector.IntSig2; IntPin3.IrqSignal -> IrqVector.IntSig3; IntPin4.IrqSignal -> IrqVector.IntSig4; IntPin5.IrqSignal -> IrqVector.IntSig5; IntPin6.IrqSignal -> IrqVector.IntSig6; IntPin7.IrqSignal -> IrqVector.IntSig7; components PlatformInterruptC; IrqVector.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128InterruptSigP.nc000066400000000000000000000071551207233610700263100ustar00rootroot00000000000000/// $Id: HplAtm128InterruptSigP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interrupt interface access for interrupt capable GPIO pins. * Exposes just the interrupt vector routine for * easy linking to generic components. * * @author Martin Turon */ module HplAtm128InterruptSigP { provides interface HplAtm128InterruptSig as IntSig0; provides interface HplAtm128InterruptSig as IntSig1; provides interface HplAtm128InterruptSig as IntSig2; provides interface HplAtm128InterruptSig as IntSig3; provides interface HplAtm128InterruptSig as IntSig4; provides interface HplAtm128InterruptSig as IntSig5; provides interface HplAtm128InterruptSig as IntSig6; provides interface HplAtm128InterruptSig as IntSig7; uses interface PlatformInterrupt; } implementation { default async event void IntSig0.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT0 ) { signal IntSig0.fired(); call PlatformInterrupt.postAmble(); } default async event void IntSig1.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT1 ) { signal IntSig1.fired(); call PlatformInterrupt.postAmble(); } default async event void IntSig2.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT2 ) { signal IntSig2.fired(); call PlatformInterrupt.postAmble(); } default async event void IntSig3.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT3 ) { signal IntSig3.fired(); call PlatformInterrupt.postAmble(); } default async event void IntSig4.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT4 ) { signal IntSig4.fired(); call PlatformInterrupt.postAmble(); } default async event void IntSig5.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT5 ) { signal IntSig5.fired(); call PlatformInterrupt.postAmble(); } default async event void IntSig6.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT6 ) { signal IntSig6.fired(); call PlatformInterrupt.postAmble(); } default async event void IntSig7.fired() { } AVR_ATOMIC_HANDLER( SIG_INTERRUPT7 ) { signal IntSig7.fired(); call PlatformInterrupt.postAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128SpiC.nc000066400000000000000000000076331207233610700243700ustar00rootroot00000000000000/// $Id: HplAtm128SpiC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Configuration encapsulating the basic SPI HPL for the atm128. * * 
       * $Id: HplAtm128SpiC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
 *
      * * @author Philip Levis * @author Martin Turon */ configuration HplAtm128SpiC { provides interface Atm128Spi as SpiBus; } implementation { components HplAtm128GeneralIOC as IO, HplAtm128SpiP as HplSpi; components McuSleepC; SpiBus = HplSpi; HplSpi.Mcu -> McuSleepC; HplSpi.SS -> IO.PortB0; // Slave set line HplSpi.SCK -> IO.PortB1; // SPI clock line HplSpi.MOSI -> IO.PortB2; // Master out, slave in HplSpi.MISO -> IO.PortB3; // Master in, slave out components PlatformInterruptC; HplSpi.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128SpiP.nc000066400000000000000000000157551207233610700244110ustar00rootroot00000000000000/// $Id: HplAtm128SpiP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of the SPI bus abstraction for the atm128 * microcontroller. * * @author Philip Levis * @author Martin Turon */ #include "Atm128Spi.h" module HplAtm128SpiP { provides interface Atm128Spi as SPI; provides interface AsyncStdControl; uses { interface GeneralIO as SS; // Slave set line interface GeneralIO as SCK; // SPI clock line interface GeneralIO as MOSI; // Master out, slave in interface GeneralIO as MISO; // Master in, slave out interface McuPowerState as Mcu; interface PlatformInterrupt; } } implementation { async command error_t AsyncStdControl.start() { call SPI.enableSpi(TRUE); } async command error_t AsyncStdControl.stop() { call SPI.enableInterrupt(FALSE); call SPI.enableSpi(FALSE); } async command void SPI.initMaster() { call MOSI.makeOutput(); call MISO.makeInput(); call SCK.makeOutput(); call SPI.setMasterBit(TRUE); } async command void SPI.initSlave() { call MISO.makeOutput(); call MOSI.makeInput(); call SCK.makeInput(); call SS.makeInput(); call SPI.setMasterBit(FALSE); } async command void SPI.sleep() { // call SS.set(); // why was this needed? } async command uint8_t SPI.read() { return SPDR; } async command void SPI.write(uint8_t d) { SPDR = d; } default async event void SPI.dataReady(uint8_t d) {} AVR_ATOMIC_HANDLER(SIG_SPI) { signal SPI.dataReady(call SPI.read()); call PlatformInterrupt.postAmble(); } //=== SPI Bus utility routines. ==================================== async command bool SPI.isInterruptPending() { return READ_BIT(SPSR, SPIF); } async command bool SPI.isInterruptEnabled () { return READ_BIT(SPCR, SPIE); } async command void SPI.enableInterrupt(bool enabled) { if (enabled) { SET_BIT(SPCR, SPIE); call Mcu.update(); } else { CLR_BIT(SPCR, SPIE); call Mcu.update(); } } async command bool SPI.isSpiEnabled() { return READ_BIT(SPCR, SPE); } async command void SPI.enableSpi(bool enabled) { if (enabled) { SET_BIT(SPCR, SPE); call Mcu.update(); } else { CLR_BIT(SPCR, SPE); call Mcu.update(); } } /* DORD bit */ async command void SPI.setDataOrder(bool lsbFirst) { if (lsbFirst) { SET_BIT(SPCR, DORD); } else { CLR_BIT(SPCR, DORD); } } async command bool SPI.isOrderLsbFirst() { return READ_BIT(SPCR, DORD); } /* MSTR bit */ async command void SPI.setMasterBit(bool isMaster) { if (isMaster) { SET_BIT(SPCR, MSTR); } else { CLR_BIT(SPCR, MSTR); } } async command bool SPI.isMasterBitSet() { return READ_BIT(SPCR, MSTR); } /* CPOL bit */ async command void SPI.setClockPolarity(bool highWhenIdle) { if (highWhenIdle) { SET_BIT(SPCR, CPOL); } else { CLR_BIT(SPCR, CPOL); } } async command bool SPI.getClockPolarity() { return READ_BIT(SPCR, CPOL); } /* CPHA bit */ async command void SPI.setClockPhase(bool sampleOnTrailing) { if (sampleOnTrailing) { SET_BIT(SPCR, CPHA); } else { CLR_BIT(SPCR, CPHA); } } async command bool SPI.getClockPhase() { return READ_BIT(SPCR, CPHA); } async command uint8_t SPI.getClock () { return READ_FLAG(SPCR, ((1 << SPR1) | (1 < configuration HplAtm128Timer0AsyncC { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { components HplAtm128Timer0AsyncP; components McuSleepC; McuSleepC.McuPowerOverride -> HplAtm128Timer0AsyncP; Timer = HplAtm128Timer0AsyncP; TimerCtrl = HplAtm128Timer0AsyncP; Compare = HplAtm128Timer0AsyncP; TimerAsync = HplAtm128Timer0AsyncP; components PlatformInterruptC; HplAtm128Timer0AsyncP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128Timer0AsyncP.nc000066400000000000000000000176001207233610700260030ustar00rootroot00000000000000/// $Id: HplAtm128Timer0AsyncP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to Atmega128 timer 0 in ASYNC mode. This is a specialised * HPL component that assumes that timer 0 is used in ASYNC mode and * includes some workarounds for some of the weirdnesses (delayed overflow * interrupt) of that mode. * * @author Martin Turon * @author David Gay */ #include module HplAtm128Timer0AsyncP { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface McuPowerOverride; interface HplAtm128TimerAsync as TimerAsync; } uses interface PlatformInterrupt; } implementation { //=== Read the current timer value. =================================== async command uint8_t Timer.get() { return TCNT0; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint8_t t) { TCNT0 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR0 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128TimerControl_t x = call TimerCtrl.getControl(); x.bits.cs = s; call TimerCtrl.setControl(x); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t TimerCtrl.getControl() { return *(Atm128TimerControl_t*)&TCCR0; } //=== Write the control registers. ==================================== async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { TCCR0 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { return *(Atm128_TIFR_t*)&TIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer.reset() { TIFR = 1 << TOV0; } async command void Timer.start() { SET_BIT(TIMSK, TOIE0); } async command void Timer.stop() { CLR_BIT(TIMSK, TOIE0); } bool overflowed() { return (call TimerCtrl.getInterruptFlag()).bits.tov0; } async command bool Timer.test() { return overflowed(); } async command bool Timer.isOn() { return (call TimerCtrl.getInterruptMask()).bits.toie0; } async command void Compare.reset() { TIFR = 1 << OCF0; } async command void Compare.start() { SET_BIT(TIMSK,OCIE0); } async command void Compare.stop() { CLR_BIT(TIMSK,OCIE0); } async command bool Compare.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf0; } async command bool Compare.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie0; } //=== Read the compare registers. ===================================== async command uint8_t Compare.get() { return OCR0; } //=== Write the compare registers. ==================================== async command void Compare.set(uint8_t t) { OCR0 = t; } //=== Timer interrupts signals ======================================== inline void stabiliseTimer0() { TCCR0 = TCCR0; while (ASSR & 1 << TCR0UB) ; } /** * On the atm128, there is a small latency when waking up from * POWER_SAVE mode. So if a timer is going to go off very soon, it's * better to drop down until EXT_STANDBY, which has a 6 cycle wakeup * latency. This function calculates whether staying in EXT_STANDBY * is needed. If the timer is not running it returns POWER_DOWN. * Please refer to TEP 112 and the atm128 datasheet for details. */ async command mcu_power_t McuPowerOverride.lowestState() { uint8_t diff; // We need to make sure that the sleep wakeup latency will not // cause us to miss a timer. POWER_SAVE if (TIMSK & (1 << OCIE0 | 1 << TOIE0)) { // need to wait for timer 0 updates propagate before sleeping // (we don't need to worry about reentering sleep mode too early, // as the wake ups from timer0 wait at least one TOSC1 cycle // anyway - see the stabiliseTimer0 function) while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB)) ; diff = OCR0 - TCNT0; if (diff < EXT_STANDBY_T0_THRESHOLD || TCNT0 > 256 - EXT_STANDBY_T0_THRESHOLD) return ATM128_POWER_EXT_STANDBY; return ATM128_POWER_SAVE; } else { return ATM128_POWER_DOWN; } } default async event void Compare.fired() { } AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) { stabiliseTimer0(); signal Compare.fired(); call PlatformInterrupt.postAmble(); } default async event void Timer.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) { stabiliseTimer0(); signal Timer.overflow(); call PlatformInterrupt.postAmble(); } // Asynchronous status register support async command Atm128Assr_t TimerAsync.getAssr() { return *(Atm128Assr_t *)&ASSR; } async command void TimerAsync.setAssr(Atm128Assr_t x) { ASSR = x.flat; } async command void TimerAsync.setTimer0Asynchronous() { ASSR |= 1 << AS0; } async command int TimerAsync.controlBusy() { return (ASSR & (1 << TCR0UB)) != 0; } async command int TimerAsync.compareBusy() { return (ASSR & (1 << OCR0UB)) != 0; } async command int TimerAsync.countBusy() { return (ASSR & (1 << TCN0UB)) != 0; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128Timer1C.nc000066400000000000000000000047641207233610700250000ustar00rootroot00000000000000/// $Id: HplAtm128Timer1C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to Atmega128 timer 1. * * @author Martin Turon * @author David Gay */ configuration HplAtm128Timer1C { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as Compare[uint8_t id]; } } implementation { components HplAtm128Timer0AsyncC, HplAtm128Timer1P; Timer = HplAtm128Timer1P; TimerCtrl = HplAtm128Timer1P; Capture = HplAtm128Timer1P; Compare[0] = HplAtm128Timer1P.CompareA; Compare[1] = HplAtm128Timer1P.CompareB; Compare[2] = HplAtm128Timer1P.CompareC; HplAtm128Timer1P.Timer0Ctrl -> HplAtm128Timer0AsyncC; components PlatformInterruptC; HplAtm128Timer1P.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128Timer1P.nc000066400000000000000000000221421207233610700250030ustar00rootroot00000000000000/// $Id: HplAtm128Timer1P.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Internal component of the HPL interface to Atmega128 timer 1. * * @author Martin Turon */ #include module HplAtm128Timer1P { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as CompareA; interface HplAtm128Compare as CompareB; interface HplAtm128Compare as CompareC; } uses interface HplAtm128TimerCtrl8 as Timer0Ctrl; uses interface PlatformInterrupt; } implementation { //=== Read the current timer value. =================================== async command uint16_t Timer.get() { return TCNT1; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint16_t t) { TCNT1 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR1B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture(); x.bits.cs = s; call TimerCtrl.setCtrlCapture(x); } //=== Read the control registers. ===================================== async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { return *(Atm128TimerCtrlCompare_t*)&TCCR1A; } async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { return *(Atm128TimerCtrlCapture_t*)&TCCR1B; } async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { return *(Atm128TimerCtrlClock_t*)&TCCR1C; } //=== Control registers utilities. ================================== DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t); //=== Write the control registers. ==================================== async command void TimerCtrl.setCtrlCompare( Atm128_TCCR1A_t x ) { TCCR1A = TimerCtrlCompare2int(x); } async command void TimerCtrl.setCtrlCapture( Atm128_TCCR1B_t x ) { TCCR1B = TimerCtrlCapture2int(x); } async command void TimerCtrl.setCtrlClock( Atm128_TCCR1C_t x ) { TCCR1C = TimerCtrlClock2int(x); } //=== Read the interrupt mask. ===================================== async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { return *(Atm128_ETIMSK_t*)&ETIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { ETIMSK = TimerMask16_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { return *(Atm128_ETIFR_t*)&ETIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { ETIFR = TimerFlags16_2int(x); } //=== Capture 16-bit implementation. =================================== async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); } //=== Timer 16-bit implementation. =================================== async command void Timer.reset() { TIFR = 1 << TOV1; } async command void Capture.reset() { TIFR = 1 << ICF1; } async command void CompareA.reset() { TIFR = 1 << OCF1A; } async command void CompareB.reset() { TIFR = 1 << OCF1B; } async command void CompareC.reset() { ETIFR = 1 << OCF1C; } async command void Timer.start() { SET_BIT(TIMSK,TOIE1); } async command void Capture.start() { SET_BIT(TIMSK,TICIE1); } async command void CompareA.start() { SET_BIT(TIMSK,OCIE1A); } async command void CompareB.start() { SET_BIT(TIMSK,OCIE1B); } async command void CompareC.start() { SET_BIT(ETIMSK,OCIE1C); } async command void Timer.stop() { CLR_BIT(TIMSK,TOIE1); } async command void Capture.stop() { CLR_BIT(TIMSK,TICIE1); } async command void CompareA.stop() { CLR_BIT(TIMSK,OCIE1A); } async command void CompareB.stop() { CLR_BIT(TIMSK,OCIE1B); } async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE1C); } // Note: Many Timer interrupt flags are on Timer0 register async command bool Timer.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.tov1; } async command bool Capture.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.icf1; } async command bool CompareA.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1a; } async command bool CompareB.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1b; } async command bool CompareC.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf1c; } // Note: Many Timer interrupt mask bits are on Timer0 register async command bool Timer.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.toie1; } async command bool Capture.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.ticie1; } async command bool CompareA.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.ocie1a; } async command bool CompareB.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.ocie1b; } async command bool CompareC.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie1c; } //=== Read the compare registers. ===================================== async command uint16_t CompareA.get() { return OCR1A; } async command uint16_t CompareB.get() { return OCR1B; } async command uint16_t CompareC.get() { return OCR1C; } //=== Write the compare registers. ==================================== async command void CompareA.set(uint16_t t) { OCR1A = t; } async command void CompareB.set(uint16_t t) { OCR1B = t; } async command void CompareC.set(uint16_t t) { OCR1C = t; } //=== Read the capture registers. ===================================== async command uint16_t Capture.get() { return ICR1; } //=== Write the capture registers. ==================================== async command void Capture.set(uint16_t t) { ICR1 = t; } //=== Timer interrupts signals ======================================== default async event void CompareA.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) { signal CompareA.fired(); call PlatformInterrupt.postAmble(); } default async event void CompareB.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) { signal CompareB.fired(); call PlatformInterrupt.postAmble(); } default async event void CompareC.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) { signal CompareC.fired(); call PlatformInterrupt.postAmble(); } default async event void Capture.captured(uint16_t time) { } AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) { signal Capture.captured(call Timer.get()); call PlatformInterrupt.postAmble(); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) { signal Timer.overflow(); call PlatformInterrupt.postAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128Timer2C.nc000066400000000000000000000133521207233610700247720ustar00rootroot00000000000000/// $Id: HplAtm128Timer2C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to Atmega128 timer 2. * * @author Martin Turon */ #include module HplAtm128Timer2C { provides { interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; } uses interface ThreadScheduler; } implementation { //=== Read the current timer value. =================================== async command uint8_t Timer.get() { return TCNT2; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint8_t t) { TCNT2 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR2 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128TimerControl_t x = call TimerCtrl.getControl(); x.bits.cs = s; call TimerCtrl.setControl(x); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t TimerCtrl.getControl() { return *(Atm128TimerControl_t*)&TCCR2; } //=== Control registers utilities. ================================== DEFINE_UNION_CAST(TimerCtrlCompareint, Atm128TimerCtrlCompare_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t); //=== Write the control registers. ==================================== async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { TCCR2 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { return *(Atm128_TIFR_t*)&TIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer.reset() { TIFR = 1 << TOV2; } async command void Timer.start() { SET_BIT(TIMSK,TOIE2); } async command void Timer.stop() { CLR_BIT(TIMSK,TOIE2); } async command bool Timer.test() { return (call TimerCtrl.getInterruptFlag()).bits.tov2; } async command bool Timer.isOn() { return (call TimerCtrl.getInterruptMask()).bits.toie2; } async command void Compare.reset() { TIFR = 1 << OCF2; } async command void Compare.start() { SET_BIT(TIMSK,OCIE2); } async command void Compare.stop() { CLR_BIT(TIMSK,OCIE2); } async command bool Compare.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf2; } async command bool Compare.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie2; } //=== Read the compare registers. ===================================== async command uint8_t Compare.get() { return OCR2; } //=== Write the compare registers. ==================================== async command void Compare.set(uint8_t t) { OCR2 = t; } //=== Timer interrupts signals ======================================== default async event void Compare.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE2) { signal Compare.fired(); call ThreadScheduler.interruptPostAmble(); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW2) { signal Timer.overflow(); call ThreadScheduler.interruptPostAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128Timer3C.nc000066400000000000000000000046421207233610700247750ustar00rootroot00000000000000/// $Id: HplAtm128Timer3C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL interface to Atmega128 timer 2. * * @author Martin Turon * @author David Gay */ configuration HplAtm128Timer3C { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as Compare[uint8_t id]; } } implementation { components HplAtm128Timer3P; Timer = HplAtm128Timer3P; TimerCtrl = HplAtm128Timer3P; Capture = HplAtm128Timer3P; Compare[0] = HplAtm128Timer3P.CompareA; Compare[1] = HplAtm128Timer3P.CompareB; Compare[2] = HplAtm128Timer3P.CompareC; components PlatformInterruptC; HplAtm128Timer3P.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128Timer3P.nc000066400000000000000000000214361207233610700250120ustar00rootroot00000000000000/// $Id: HplAtm128Timer3P.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Internal componentr of the HPL interface to Atmega128 timer 3. * * @author Martin Turon */ #include module HplAtm128Timer3P { provides { interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as CompareA; interface HplAtm128Compare as CompareB; interface HplAtm128Compare as CompareC; } uses interface PlatformInterrupt; } implementation { //=== Read the current timer value. =================================== async command uint16_t Timer.get() { return TCNT3; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint16_t t) { TCNT3 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR3B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture(); x.bits.cs = s; call TimerCtrl.setCtrlCapture(x); } //=== Read the control registers. ===================================== async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { return *(Atm128TimerCtrlCompare_t*)&TCCR3A; } async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { return *(Atm128TimerCtrlCapture_t*)&TCCR3B; } async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { return *(Atm128TimerCtrlClock_t*)&TCCR3C; } //=== Control registers utilities. ================================== DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t); DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t); //=== Write the control registers. ==================================== async command void TimerCtrl.setCtrlCompare( Atm128_TCCR3A_t x ) { TCCR3A = TimerCtrlCompare2int(x); } async command void TimerCtrl.setCtrlCapture( Atm128_TCCR3B_t x ) { TCCR3B = TimerCtrlCapture2int(x); } async command void TimerCtrl.setCtrlClock( Atm128_TCCR3C_t x ) { TCCR3C = TimerCtrlClock2int(x); } //=== Read the interrupt mask. ===================================== async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { return *(Atm128_ETIMSK_t*)&ETIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { ETIMSK = TimerMask16_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { return *(Atm128_ETIFR_t*)&ETIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { ETIFR = TimerFlags16_2int(x); } //=== Capture 16-bit implementation. =================================== async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B,ICES3, up); } //=== Timer 16-bit implementation. =================================== async command void Timer.reset() { ETIFR = 1 << TOV3; } async command void Capture.reset() { ETIFR = 1 << ICF3; } async command void CompareA.reset() { ETIFR = 1 << OCF3A; } async command void CompareB.reset() { ETIFR = 1 << OCF3B; } async command void CompareC.reset() { ETIFR = 1 << OCF3C; } async command void Timer.start() { SET_BIT(ETIMSK,TOIE3); } async command void Capture.start() { SET_BIT(ETIMSK,TICIE3); } async command void CompareA.start() { SET_BIT(ETIMSK,OCIE3A); } async command void CompareB.start() { SET_BIT(ETIMSK,OCIE3B); } async command void CompareC.start() { SET_BIT(ETIMSK,OCIE3C); } async command void Timer.stop() { CLR_BIT(ETIMSK,TOIE3); } async command void Capture.stop() { CLR_BIT(ETIMSK,TICIE3); } async command void CompareA.stop() { CLR_BIT(ETIMSK,OCIE3A); } async command void CompareB.stop() { CLR_BIT(ETIMSK,OCIE3B); } async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE3C); } async command bool Timer.test() { return (call TimerCtrl.getInterruptFlag()).bits.tov3; } async command bool Capture.test() { return (call TimerCtrl.getInterruptFlag()).bits.icf3; } async command bool CompareA.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf3a; } async command bool CompareB.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf3b; } async command bool CompareC.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf3c; } async command bool Timer.isOn() { return (call TimerCtrl.getInterruptMask()).bits.toie3; } async command bool Capture.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ticie3; } async command bool CompareA.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie3a; } async command bool CompareB.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie3b; } async command bool CompareC.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie3c; } //=== Read the compare registers. ===================================== async command uint16_t CompareA.get() { return OCR3A; } async command uint16_t CompareB.get() { return OCR3B; } async command uint16_t CompareC.get() { return OCR3C; } //=== Write the compare registers. ==================================== async command void CompareA.set(uint16_t t) { OCR3A = t; } async command void CompareB.set(uint16_t t) { OCR3B = t; } async command void CompareC.set(uint16_t t) { OCR3C = t; } //=== Read the capture registers. ===================================== async command uint16_t Capture.get() { return ICR3; } //=== Write the capture registers. ==================================== async command void Capture.set(uint16_t t) { ICR3 = t; } //=== Timer interrupts signals ======================================== default async event void CompareA.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) { signal CompareA.fired(); call PlatformInterrupt.postAmble(); } default async event void CompareB.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) { signal CompareB.fired(); call PlatformInterrupt.postAmble(); } default async event void CompareC.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) { signal CompareC.fired(); call PlatformInterrupt.postAmble(); } default async event void Capture.captured(uint16_t time) { } AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) { signal Capture.captured(call Timer.get()); call PlatformInterrupt.postAmble(); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) { signal Timer.overflow(); call PlatformInterrupt.postAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128UartC.nc000066400000000000000000000053421207233610700245430ustar00rootroot00000000000000/// $Id: HplAtm128UartC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /// #include /** * HPL for the Atmega 128 serial ports. * * @author Martin Turon * @author David Gay */ configuration HplAtm128UartC { provides { interface StdControl as Uart0TxControl; interface StdControl as Uart0RxControl; interface HplAtm128Uart as HplUart0; interface StdControl as Uart1TxControl; interface StdControl as Uart1RxControl; interface HplAtm128Uart as HplUart1; } } implementation { components HplAtm128UartP, PlatformC, McuSleepC; Uart0TxControl = HplAtm128UartP.Uart0TxControl; Uart0RxControl = HplAtm128UartP.Uart0RxControl; HplUart0 = HplAtm128UartP.HplUart0; Uart1TxControl = HplAtm128UartP.Uart1TxControl; Uart1RxControl = HplAtm128UartP.Uart1RxControl; HplUart1 = HplAtm128UartP.HplUart1; HplAtm128UartP.Atm128Calibrate -> PlatformC; HplAtm128UartP.McuPowerState -> McuSleepC; components MainC; MainC.SoftwareInit -> HplAtm128UartP.Uart0Init; MainC.SoftwareInit -> HplAtm128UartP.Uart1Init; components PlatformInterruptC; HplAtm128UartP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/HplAtm128UartP.nc000066400000000000000000000206531207233610700245620ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $ */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Private component of the Atmega128 serial port HPL. * * @author Martin Turon * @author David Gay */ #include module HplAtm128UartP { provides interface Init as Uart0Init; provides interface StdControl as Uart0TxControl; provides interface StdControl as Uart0RxControl; provides interface HplAtm128Uart as HplUart0; provides interface Init as Uart1Init; provides interface StdControl as Uart1TxControl; provides interface StdControl as Uart1RxControl; provides interface HplAtm128Uart as HplUart1; uses interface Atm128Calibrate; uses interface McuPowerState; uses interface PlatformInterrupt; } implementation { //=== Uart Init Commands. ==================================== command error_t Uart0Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr0; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR0L = ubrr0; UBRR0H = ubrr0 >> 8; UCSR0A = stts.flat; UCSR0C = mode.flat; UCSR0B = ctrl.flat; return SUCCESS; } command error_t Uart0TxControl.start() { SET_BIT(UCSR0B, TXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart0TxControl.stop() { CLR_BIT(UCSR0B, TXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.start() { SET_BIT(UCSR0B, RXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.stop() { CLR_BIT(UCSR0B, RXEN); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart0.enableTxIntr() { SET_BIT(UCSR0A, TXC); SET_BIT(UCSR0B, TXCIE); return SUCCESS; } async command error_t HplUart0.disableTxIntr(){ CLR_BIT(UCSR0B, TXCIE); return SUCCESS; } async command error_t HplUart0.enableRxIntr(){ SET_BIT(UCSR0B, RXCIE); return SUCCESS; } async command error_t HplUart0.disableRxIntr(){ CLR_BIT(UCSR0B, RXCIE); return SUCCESS; } async command bool HplUart0.isTxEmpty(){ return READ_BIT(UCSR0A, TXC); } async command bool HplUart0.isRxEmpty(){ return !READ_BIT(UCSR0A, RXC); } async command uint8_t HplUart0.rx(){ return UDR0; } async command void HplUart0.tx(uint8_t data) { atomic{ UDR0 = data; SET_BIT(UCSR0A, TXC); } } AVR_ATOMIC_HANDLER(SIG_UART0_RECV) { if (READ_BIT(UCSR0A, RXC)) { signal HplUart0.rxDone(UDR0); } call PlatformInterrupt.postAmble(); } AVR_NONATOMIC_HANDLER(SIG_UART0_TRANS) { signal HplUart0.txDone(); call PlatformInterrupt.postAmble(); } command error_t Uart1Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr1; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR1L = ubrr1; UBRR1H = ubrr1 >> 8; UCSR1A = stts.flat; UCSR1C = mode.flat; UCSR1B = ctrl.flat; return SUCCESS; } command error_t Uart1TxControl.start() { SET_BIT(UCSR1B, TXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart1TxControl.stop() { CLR_BIT(UCSR1B, TXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.start() { SET_BIT(UCSR1B, RXEN); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.stop() { CLR_BIT(UCSR1B, RXEN); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart1.enableTxIntr() { SET_BIT(UCSR1A, TXC); SET_BIT(UCSR1B, TXCIE); return SUCCESS; } async command error_t HplUart1.disableTxIntr(){ CLR_BIT(UCSR1B, TXCIE); return SUCCESS; } async command error_t HplUart1.enableRxIntr(){ SET_BIT(UCSR1B, RXCIE); return SUCCESS; } async command error_t HplUart1.disableRxIntr(){ CLR_BIT(UCSR1B, RXCIE); return SUCCESS; } async command bool HplUart1.isTxEmpty() { return READ_BIT(UCSR1A, TXC); } async command bool HplUart1.isRxEmpty() { return !READ_BIT(UCSR1A, RXC); } async command uint8_t HplUart1.rx(){ return UDR1; } async command void HplUart1.tx(uint8_t data) { atomic{ UDR1 = data; SET_BIT(UCSR1A, TXC); } } AVR_ATOMIC_HANDLER(SIG_UART1_RECV) { if (READ_BIT(UCSR1A, RXC)) signal HplUart1.rxDone(UDR1); call PlatformInterrupt.postAmble(); } AVR_NONATOMIC_HANDLER(SIG_UART1_TRANS) { signal HplUart1.txDone(); call PlatformInterrupt.postAmble(); } default async event void HplUart0.txDone() {} default async event void HplUart0.rxDone(uint8_t data) {} default async event void HplUart1.txDone() {} default async event void HplUart1.rxDone(uint8_t data) {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/adc/000077500000000000000000000000001207233610700223655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcP.nc000066400000000000000000000057671207233610700252060ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" configuration BlockingAdcP { provides { interface BlockingRead as BlockingRead[uint8_t client]; interface BlockingReadStream as BlockingReadStream[uint8_t streamClient]; } uses { //For BlockingRead interface Atm128AdcConfig as Config[uint8_t client]; interface Resource as ResourceRead[uint8_t client]; //For BlockingReadStream interface Atm128AdcConfig as ConfigReadStream[uint8_t streamClient]; interface Resource as ResourceReadStream[uint8_t streamClient]; } } implementation { components MainC; components WireAdcP; components WireAdcStreamP; components new BlockingReadP(); components new BlockingReadStreamP(); MainC.SoftwareInit -> BlockingReadP; MainC.SoftwareInit -> BlockingReadStreamP; //For BlockingRead BlockingRead = BlockingReadP; BlockingReadP.Read -> WireAdcP; Config = WireAdcP; ResourceRead = WireAdcP; //For BlockingReadStream BlockingReadStream = BlockingReadStreamP; BlockingReadStreamP.ReadStream -> WireAdcStreamP; ConfigReadStream = WireAdcStreamP; ResourceReadStream = WireAdcStreamP; components SystemCallC; components SystemCallQueueC; BlockingReadP.SystemCallQueue -> SystemCallQueueC; BlockingReadP.SystemCall -> SystemCallC; BlockingReadStreamP.SystemCallQueue -> SystemCallQueueC; BlockingReadStreamP.SystemCall -> SystemCallC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcReadClientC.nc000066400000000000000000000024051207233610700271060ustar00rootroot00000000000000/* $Id: BlockingAdcReadClientC.nc,v 1.2 2008-06-14 19:27:25 klueska Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provide, as per TEP101, arbitrated access via a Read interface to the * Atmega128 ADC. Users of this component must link it to an * implementation of Atm128AdcConfig which provides the ADC parameters * (channel, etc). * * @author David Gay * @author Kevin Klues */ #include "Adc.h" generic configuration BlockingAdcReadClientC() { provides interface BlockingRead; uses { interface Atm128AdcConfig; interface ResourceConfigure; } } implementation { components Atm128AdcC, BlockingAdcP; enum { ID = unique(UQ_ADC_READ), HAL_ID = unique(UQ_ATM128ADC_RESOURCE) }; BlockingRead = BlockingAdcP.BlockingRead[ID]; Atm128AdcConfig = BlockingAdcP.Config[ID]; BlockingAdcP.ResourceRead[ID] -> Atm128AdcC.Resource[HAL_ID]; ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID]; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcReadStreamClientC.nc000066400000000000000000000024771207233610700302730ustar00rootroot00000000000000/* $Id: BlockingAdcReadStreamClientC.nc,v 1.2 2008-06-14 19:27:25 klueska Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Provide, as per TEP101, arbitrated access via a ReadStream interface to * the Atmega128 ADC. Users of this component must link it to an * implementation of Atm128AdcConfig which provides the ADC parameters * (channel, etc). * * @author David Gay * @author Kevin Klues */ #include "Adc.h" generic configuration BlockingAdcReadStreamClientC() { provides interface BlockingReadStream; uses { interface Atm128AdcConfig; interface ResourceConfigure; } } implementation { components BlockingAdcP, Atm128AdcC; enum { ID = unique(UQ_ADC_READSTREAM), HAL_ID = unique(UQ_ATM128ADC_RESOURCE) }; BlockingReadStream = BlockingAdcP.BlockingReadStream[ID]; Atm128AdcConfig = BlockingAdcP.ConfigReadStream[ID]; BlockingAdcP.ResourceReadStream[ID] -> Atm128AdcC.Resource[HAL_ID]; ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID]; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/chip_thread.h000066400000000000000000000176411207233610700242720ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This file is derived from similar files in the TinyThread implementation * by William P. McCartney from Cleveland State University (2006) * * This file contains MSP430 platform-specific routines for implementing * threads in TinyOS * * @author Kevin Klues */ //Define on platform specific basis for inclusion in // the thread control block typedef struct thread_regs { uint8_t status; uint8_t r0; uint8_t r1; uint8_t r2; uint8_t r3; uint8_t r4; uint8_t r5; uint8_t r6; uint8_t r7; uint8_t r8; uint8_t r9; uint8_t r10; uint8_t r11; uint8_t r12; uint8_t r13; uint8_t r14; uint8_t r15; uint8_t r16; uint8_t r17; uint8_t r18; uint8_t r19; uint8_t r20; uint8_t r21; uint8_t r22; uint8_t r23; uint8_t r24; uint8_t r25; uint8_t r26; uint8_t r27; uint8_t r28; uint8_t r29; uint8_t r30; uint8_t r31; } thread_regs_t; typedef uint16_t* stack_ptr_t; #define STACK_TOP(stack, size) \ (&(((uint8_t*)stack)[size - sizeof(stack_ptr_t)])) //Save stack pointer #define SAVE_STACK_PTR(t) \ __asm__("in %A0, __SP_L__\n\t" \ "in %B0, __SP_H__\n\t" \ :"=r"((t)->stack_ptr) : ); //Save status register #define SAVE_STATUS(t) \ __asm__("in %0,__SREG__ \n\t" : "=r" ((t)->regs.status) : ); //Save General Purpose Registers #define SAVE_GPR(t) \ __asm__("mov %0,r0 \n\t" : "=r" ((t)->regs.r0) : ); \ __asm__("mov %0,r1 \n\t" : "=r" ((t)->regs.r1) : ); \ __asm__("mov %0,r2 \n\t" : "=r" ((t)->regs.r2) : ); \ __asm__("mov %0,r3 \n\t" : "=r" ((t)->regs.r3) : ); \ __asm__("mov %0,r4 \n\t" : "=r" ((t)->regs.r4) : ); \ __asm__("mov %0,r5 \n\t" : "=r" ((t)->regs.r5) : ); \ __asm__("mov %0,r6 \n\t" : "=r" ((t)->regs.r6) : ); \ __asm__("mov %0,r7 \n\t" : "=r" ((t)->regs.r7) : ); \ __asm__("mov %0,r8 \n\t" : "=r" ((t)->regs.r8) : ); \ __asm__("mov %0,r9 \n\t" : "=r" ((t)->regs.r9) : ); \ __asm__("mov %0,r10 \n\t" : "=r" ((t)->regs.r10) : ); \ __asm__("mov %0,r11 \n\t" : "=r" ((t)->regs.r11) : ); \ __asm__("mov %0,r12 \n\t" : "=r" ((t)->regs.r12) : ); \ __asm__("mov %0,r13 \n\t" : "=r" ((t)->regs.r13) : ); \ __asm__("mov %0,r14 \n\t" : "=r" ((t)->regs.r14) : ); \ __asm__("mov %0,r15 \n\t" : "=r" ((t)->regs.r15) : ); \ __asm__("mov %0,r16 \n\t" : "=r" ((t)->regs.r16) : ); \ __asm__("mov %0,r17 \n\t" : "=r" ((t)->regs.r17) : ); \ __asm__("mov %0,r18 \n\t" : "=r" ((t)->regs.r18) : ); \ __asm__("mov %0,r19 \n\t" : "=r" ((t)->regs.r19) : ); \ __asm__("mov %0,r20 \n\t" : "=r" ((t)->regs.r20) : ); \ __asm__("mov %0,r21 \n\t" : "=r" ((t)->regs.r21) : ); \ __asm__("mov %0,r22 \n\t" : "=r" ((t)->regs.r22) : ); \ __asm__("mov %0,r23 \n\t" : "=r" ((t)->regs.r23) : ); \ __asm__("mov %0,r24 \n\t" : "=r" ((t)->regs.r24) : ); \ __asm__("mov %0,r25 \n\t" : "=r" ((t)->regs.r25) : ); \ __asm__("mov %0,r26 \n\t" : "=r" ((t)->regs.r26) : ); \ __asm__("mov %0,r27 \n\t" : "=r" ((t)->regs.r27) : ); \ __asm__("mov %0,r28 \n\t" : "=r" ((t)->regs.r28) : ); \ __asm__("mov %0,r29 \n\t" : "=r" ((t)->regs.r29) : ); \ __asm__("mov %0,r30 \n\t" : "=r" ((t)->regs.r30) : ); \ __asm__("mov %0,r31 \n\t" : "=r" ((t)->regs.r31) : ); //Restore stack pointer #define RESTORE_STACK_PTR(t) \ __asm__("out __SP_H__,%B0 \n\t" \ "out __SP_L__,%A0 \n\t" \ ::"r" ((t)->stack_ptr)) //Restore status register #define RESTORE_STATUS(t) \ __asm__("out __SREG__,%0 \n\t" :: "r" ((t)->regs.status) ); //Restore the general purpose registers #define RESTORE_GPR(t) \ __asm__("mov r0,%0 \n\t" :: "r" ((t)->regs.r0) ); \ __asm__("mov r1,%0 \n\t" :: "r" ((t)->regs.r1) ); \ __asm__("mov r2,%0 \n\t" :: "r" ((t)->regs.r2) ); \ __asm__("mov r3,%0 \n\t" :: "r" ((t)->regs.r3) ); \ __asm__("mov r4,%0 \n\t" :: "r" ((t)->regs.r4) ); \ __asm__("mov r5,%0 \n\t" :: "r" ((t)->regs.r5) ); \ __asm__("mov r6,%0 \n\t" :: "r" ((t)->regs.r6) ); \ __asm__("mov r7,%0 \n\t" :: "r" ((t)->regs.r7) ); \ __asm__("mov r8,%0 \n\t" :: "r" ((t)->regs.r8) ); \ __asm__("mov r9,%0 \n\t" :: "r" ((t)->regs.r9) ); \ __asm__("mov r10,%0 \n\t" :: "r" ((t)->regs.r10) ); \ __asm__("mov r11,%0 \n\t" :: "r" ((t)->regs.r11) ); \ __asm__("mov r12,%0 \n\t" :: "r" ((t)->regs.r12) ); \ __asm__("mov r13,%0 \n\t" :: "r" ((t)->regs.r13) ); \ __asm__("mov r14,%0 \n\t" :: "r" ((t)->regs.r14) ); \ __asm__("mov r15,%0 \n\t" :: "r" ((t)->regs.r15) ); \ __asm__("mov r16,%0 \n\t" :: "r" ((t)->regs.r16) ); \ __asm__("mov r17,%0 \n\t" :: "r" ((t)->regs.r17) ); \ __asm__("mov r18,%0 \n\t" :: "r" ((t)->regs.r18) ); \ __asm__("mov r19,%0 \n\t" :: "r" ((t)->regs.r19) ); \ __asm__("mov r20,%0 \n\t" :: "r" ((t)->regs.r20) ); \ __asm__("mov r21,%0 \n\t" :: "r" ((t)->regs.r21) ); \ __asm__("mov r22,%0 \n\t" :: "r" ((t)->regs.r22) ); \ __asm__("mov r23,%0 \n\t" :: "r" ((t)->regs.r23) ); \ __asm__("mov r24,%0 \n\t" :: "r" ((t)->regs.r24) ); \ __asm__("mov r25,%0 \n\t" :: "r" ((t)->regs.r25) ); \ __asm__("mov r26,%0 \n\t" :: "r" ((t)->regs.r26) ); \ __asm__("mov r27,%0 \n\t" :: "r" ((t)->regs.r27) ); \ __asm__("mov r28,%0 \n\t" :: "r" ((t)->regs.r28) ); \ __asm__("mov r29,%0 \n\t" :: "r" ((t)->regs.r29) ); \ __asm__("mov r30,%0 \n\t" :: "r" ((t)->regs.r30) ); \ __asm__("mov r31,%0 \n\t" :: "r" ((t)->regs.r31) ); #define SAVE_TCB(t) \ SAVE_GPR(t); \ SAVE_STATUS(t); \ SAVE_STACK_PTR(t) #define RESTORE_TCB(t) \ RESTORE_STACK_PTR(t); \ RESTORE_STATUS(t); \ RESTORE_GPR(t) #define SWITCH_CONTEXTS(from, to) \ SAVE_TCB(from); \ RESTORE_TCB(to) #define SWAP_STACK_PTR(OLD, NEW) \ __asm__("in %A0, __SP_L__\n\t in %B0, __SP_H__":"=r"(OLD):);\ __asm__("out __SP_H__,%B0\n\t out __SP_L__,%A0"::"r"(NEW)) #define PREPARE_THREAD(t, thread_ptr) \ { uint16_t temp; \ SWAP_STACK_PTR(temp, (t)->stack_ptr); \ __asm__("push %A0\n push %B0"::"r"(&(thread_ptr))); \ SWAP_STACK_PTR((t)->stack_ptr, temp); \ SAVE_STATUS(t) \ } /* *((uint8_t*)((t)->stack_ptr)) = (uint8_t)((uint16_t)(&(thread_ptr)) >> 8); \ *((uint8_t*)((t)->stack_ptr)-1) = (uint8_t)((&(thread_ptr))); \ */ tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/sim/000077500000000000000000000000001207233610700224265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/sim/HplAtm128CompareC.nc000066400000000000000000000214251207233610700260060ustar00rootroot00000000000000/// $Id: HplAtm128CompareC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Basic compare abstraction that builds on top of a counter. * * @author Philip Levis * @date Nov 22 2005 */ // $Id: HplAtm128CompareC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ #include generic module HplAtm128CompareC(typedef width_t @integer(), uint8_t valueRegister, uint8_t interruptRegister, uint8_t interruptBit, uint8_t flagRegister, uint8_t flagBit) { provides { // 8-bit Timers interface HplAtm128Compare as Compare; } uses { interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128TimerNotify as Notify; interface ThreadScheduler; } } implementation { /* lastZero keeps track of the phase of the clock. It denotes the sim * time at which the underlying clock started, which is needed to * calculate when compares will occur. */ sim_time_t lastZero = 0; /** This variable is needed to keep track of when the underlying * timer starts, in order to reset lastZero. When oldScale is * AVR_CLOCK_OFF and the scale is set to something else, the * clock starts ticking. */ uint8_t oldScale = AVR_CLOCK_OFF; void adjust_zero(width_t currentCounter); void cancel_compare(); sim_event_t* allocate_compare(); void configure_compare(sim_event_t* e); void schedule_new_compare(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); sim_time_t last_zero() { if (lastZero == 0) { lastZero = sim_mote_start_time(sim_node()); } return lastZero; } async event void Notify.changed() { uint8_t newScale = call Timer.getScale(); if (newScale != AVR_CLOCK_OFF && oldScale == AVR_CLOCK_OFF) { lastZero = sim_time(); } oldScale = newScale; schedule_new_compare(); } async command void Compare.reset() { REG_ACCESS(flagRegister) &= ~(1 << flagBit); } async command void Compare.start() { SET_BIT(interruptRegister,interruptBit); } async command void Compare.stop() { CLR_BIT(interruptRegister,interruptBit); } async command bool Compare.test() { return (call TimerCtrl.getInterruptFlag()).bits.ocf0; } async command bool Compare.isOn() { return (call TimerCtrl.getInterruptMask()).bits.ocie0; } //=== Read the compare registers. ===================================== async command width_t Compare.get() { return (width_t)REG_ACCESS(valueRegister); } //=== Write the compare registers. ==================================== async command void Compare.set(width_t t) { atomic { /* Re the comment above: it's a bad idea to wake up at time 0, as we'll just spin when setting the next deadline. Try and reduce the likelihood by delaying the interrupt... */ if (t == 0 || t >= 0xfe) t = 1; if (t != REG_ACCESS(valueRegister)) { REG_ACCESS(valueRegister) = t; schedule_new_compare(); } } } //=== Timer interrupts signals ======================================== default async event void Compare.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) { signal Compare.fired(); call ThreadScheduler.interruptPostAmble(); } /** * If the clock was stopped and has restarted, then * we need to move the time when the clock was last * zero to a time that reflects the current settings. * For example, if the clock was stopped when the counter * was 52 and then later restarted, then lastZero * needs to be moved forward in time so that the 52 * reflects the current time. */ void adjust_zero(width_t currentCounter) { sim_time_t now = sim_time(); sim_time_t adjust = currentCounter; adjust = adjust << shiftFromScale(); adjust = clock_to_sim(adjust); lastZero = now - adjust; } sim_time_t clock_to_sim(sim_time_t t) { t *= sim_ticks_per_sec(); t /= call Notify.clockTicksPerSec(); return t; } sim_time_t sim_to_clock(sim_time_t t) { t *= call Notify.clockTicksPerSec(); t /= sim_ticks_per_sec(); return t; } uint16_t shiftFromScale() { uint8_t scale = call Timer.getScale(); switch (scale) { case 0: return 0; case 1: return 0; case 2: return 3; case 3: return 5; case 4: return 6; case 5: return 7; case 6: return 8; case 7: return 10; default: return 255; } } sim_event_t* compare; void timer0_compare_handle(sim_event_t* evt) { dbg("HplAtm128CompareC", "%s Beginning compare at 0x%p\n", __FUNCTION__, evt); if (evt->cancelled) { return; } else { dbg("HplAtm128CompareC", "%s Handling compare at 0x%p @ %s\n",__FUNCTION__, evt, sim_time_string()); if (READ_BIT(interruptRegister, interruptBit)) { CLR_BIT(flagRegister, flagBit); dbg("HplAtm128CompareC", "%s Compare interrupt @ %s\n", __FUNCTION__, sim_time_string()); SIG_OUTPUT_COMPARE0(); } else { SET_BIT(flagRegister, flagBit); } // If we haven't been cancelled if (!evt->cancelled) { configure_compare(evt); sim_queue_insert(evt); } } } sim_event_t* allocate_compare() { sim_event_t* newEvent = sim_queue_allocate_event(); dbg("HplAtm128CompareC", "Allocated compare at 0x%p\n", newEvent); newEvent->handle = timer0_compare_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_compare(sim_event_t* evt) { sim_time_t compareTime = 0; sim_time_t phaseOffset = 0; uint8_t timerVal = call Timer.get(); uint8_t compareVal = call Compare.get(); // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. compareTime = ((compareVal - timerVal) & 0xff); if (compareTime == 0) { compareTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. compareTime = compareTime << shiftFromScale(); compareTime = clock_to_sim(compareTime); compareTime += sim_time(); // How long into a timer tick was the clock actually reset? // This covers the case when the compare is set midway between // a tick, so it will go off a little early phaseOffset = sim_time(); phaseOffset -= last_zero(); phaseOffset %= clock_to_sim(1 << shiftFromScale()); compareTime -= phaseOffset; dbg("HplAtm128CompareC", "Configuring new compare of %i for %i at time %llu (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time()); evt->time = compareTime; } void schedule_new_compare() { if (compare != NULL) { cancel_compare(); } if (call Timer.getScale() != AVR_CLOCK_OFF) { sim_event_t* newEvent = allocate_compare(); configure_compare(newEvent); compare = newEvent; sim_queue_insert(newEvent); } } void cancel_compare() { dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare); if (compare != NULL) { compare->cancelled = 1; compare->cleanup = sim_queue_cleanup_total; } } async event void Timer.overflow() {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Counter0C.nc000066400000000000000000000270321207233610700261170ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer0 counter. It handles * overflow, scaling, and phase considerations. * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Counter0C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include #include module HplAtm128Counter0C { provides { interface Init @atleastonce(); // 8-bit Timers interface HplAtm128Timer as Timer0; interface HplAtm128TimerNotify as Notify; interface HplAtm128TimerCtrl8 as Timer0Ctrl; } uses interface ThreadScheduler; } implementation { bool inOverflow = 0; uint8_t savedCounter = 0; sim_time_t lastZero = 0; void adjust_zero(uint8_t currentCounter); void cancel_overflow(); sim_event_t* allocate_overflow(); void configure_overflow(sim_event_t* e); void schedule_new_overflow(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); command error_t Init.init() { /* Do nothing. On a standard mote this configures Timer0 to * operating in asynchronous mode off an external crystal. Here in * TOSSIM it's assumed that's the case. */ return SUCCESS; } async command sim_time_t Notify.clockTicksPerSec() { return ATM128_TIMER0_TICKSPPS; } sim_time_t last_zero() { if (lastZero == 0) { lastZero = sim_mote_start_time(sim_node()); } return lastZero; } //=== Read the current timer value. =================================== async command uint8_t Timer0.get() { uint8_t rval; sim_time_t elapsed = sim_time() - last_zero(); elapsed = sim_to_clock(elapsed); elapsed = elapsed >> shiftFromScale(); rval = (uint8_t)(elapsed & 0xff); dbg("HplAtm128Counter0C", "HplAtm128Counter0C: Getting timer: %hhu\n", rval); return rval; } //=== Set/clear the current timer value. ============================== /** * Set/clear the current timer value. * * This code is pretty tricky. */ async command void Timer0.set(uint8_t newVal) { uint8_t curVal = call Timer0.get(); if (newVal == curVal) { return; } else { sim_time_t adjustment = curVal - newVal; adjustment = adjustment << shiftFromScale(); adjustment = clock_to_sim(adjustment); if (newVal < curVal) { lastZero += adjustment; } else { // newVal > curVal lastZero -= adjustment; } schedule_new_overflow(); signal Notify.changed(); } } //=== Read the current timer scale. =================================== async command uint8_t Timer0.getScale() { return TCCR0 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer0.off() { call Timer0.setScale(AVR_CLOCK_OFF); savedCounter = call Timer0.get(); cancel_overflow(); signal Notify.changed(); } //=== Write a new timer scale. ======================================== async command void Timer0.setScale(uint8_t s) { Atm128TimerControl_t ctrl; uint8_t currentScale = call Timer0.getScale(); uint8_t currentCounter; dbg("HplAtm128Counter0C", "Timer0 scale set to %i\n", (int)s); if (currentScale == 0) { currentCounter = savedCounter; } else { currentCounter = call Timer0.get(); } ctrl = call Timer0Ctrl.getControl(); ctrl.flat &= ~(0x7); ctrl.flat |= (s & 0x7); call Timer0Ctrl.setControl(ctrl); if (currentScale != s) { adjust_zero(currentCounter); schedule_new_overflow(); } signal Notify.changed(); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t Timer0Ctrl.getControl() { return *(Atm128TimerControl_t*)&TCCR0; } //=== Write the control registers. ==================================== async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) { TCCR0 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() { return *(Atm128_TIFR_t*)&TIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer0.reset() { // Clear TOV0. On real hardware, this is a write. TIFR &= ~(1 << TOV0); } async command void Timer0.start() { SET_BIT(ATM128_TIMSK, TOIE0); dbg("HplAtm128Counter0C", "Enabling TOIE0 at %llu\n", sim_time()); schedule_new_overflow(); } async command void Timer0.stop() { dbg("HplAtm128Counter0C", "Timer stopped @ %llu\n", sim_time()); CLR_BIT(ATM128_TIMSK, TOIE0); cancel_overflow(); } bool overflowed() { return READ_BIT(ATM128_TIFR, TOV0); } inline void stabiliseOverflow() { /* From the atmel manual: During asynchronous operation, the synchronization of the interrupt flags for the asynchronous timer takes three processor cycles plus one timer cycle. The timer is therefore advanced by at least one before the processor can read the timer value causing the setting of the interrupt flag. The output compare pin is changed on the timer clock and is not synchronized to the processor clock. So: if the timer is = 0, wait till it's = 1, except if - we're currently in the overflow interrupt handler - or, the overflow flag is already set */ //if (!inOverflow) // while (!TCNT0 && !overflowed()) //; } async command bool Timer0.test() { stabiliseOverflow(); return overflowed(); } async command bool Timer0.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.toie0; } default async event void Timer0.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) { inOverflow = TRUE; signal Timer0.overflow(); inOverflow = FALSE; call ThreadScheduler.interruptPostAmble(); } /** * If the clock was stopped and has restarted, then * we need to move the time when the clock was last * zero to a time that reflects the current settings. * For example, if the clock was stopped when the counter * was 52 and then later restarted, then lastZero * needs to be moved forward in time so that the 52 * reflects the current time. */ void adjust_zero(uint8_t currentCounter) { sim_time_t now = sim_time(); sim_time_t adjust = currentCounter; adjust = adjust << shiftFromScale(); adjust = clock_to_sim(adjust); lastZero = now - adjust; } sim_time_t clock_to_sim(sim_time_t t) { t *= sim_ticks_per_sec(); t /= call Notify.clockTicksPerSec(); return t; } sim_time_t sim_to_clock(sim_time_t t) { t *= call Notify.clockTicksPerSec(); t /= sim_ticks_per_sec(); return t; } uint16_t shiftFromScale() { uint8_t scale = call Timer0.getScale(); switch (scale) { case 0: return 0; case 1: return 0; case 2: return 3; case 3: return 5; case 4: return 6; case 5: return 7; case 6: return 8; case 7: return 10; default: return 255; } } sim_event_t* overflow; void timer0_overflow_handle(sim_event_t* evt) { if (evt->cancelled) { return; } else { if (READ_BIT(ATM128_TIMSK, TOIE0)) { CLR_BIT(ATM128_TIFR, TOV0); dbg("HplAtm128Counter0C", "Overflow interrupt at %s\n", sim_time_string()); SIG_OVERFLOW0(); } else { dbg("HplAtm128Counter0C", "Setting overflow bit at %s\n", sim_time_string()); SET_BIT(ATM128_TIFR, TOV0); } configure_overflow(evt); sim_queue_insert(evt); } } sim_event_t* allocate_overflow() { sim_event_t* newEvent = sim_queue_allocate_event(); newEvent->handle = timer0_overflow_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_overflow(sim_event_t* evt) { sim_time_t overflowTime = 0; uint8_t timerVal = call Timer0.get(); uint8_t overflowVal = 0; // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. overflowTime = ((overflowVal - timerVal) & 0xff); if (overflowTime == 0) { overflowTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. overflowTime = overflowTime << shiftFromScale(); overflowTime = clock_to_sim(overflowTime); overflowTime += sim_time(); overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale()); dbg("HplAtm128Counter0C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime); evt->time = overflowTime; } void schedule_new_overflow() { sim_event_t* newEvent = allocate_overflow(); configure_overflow(newEvent); if (overflow != NULL) { cancel_overflow(); } overflow = newEvent; sim_queue_insert(newEvent); } void cancel_overflow() { if (overflow != NULL) { overflow->cancelled = 1; dbg("HplAtm128Counter0C", "Cancelling overflow %p.\n", overflow); overflow->cleanup = sim_queue_cleanup_total; } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Counter2C.nc000066400000000000000000000264621207233610700261270ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer2 counter. It handles * overflow, scaling, and phase considerations. * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Counter2C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include #include enum { ATM128_TIMER2_TICKSPPS = (1 << 13) }; module HplAtm128Counter2C { provides { // 8-bit Timers interface HplAtm128Timer as Timer2; interface HplAtm128TimerNotify as Notify; interface HplAtm128TimerCtrl8 as Timer2Ctrl; } uses interface ThreadScheduler; } implementation { bool inOverflow = 0; uint8_t savedCounter = 0; sim_time_t lastZero = 0; void adjust_zero(uint8_t currentCounter); void cancel_overflow(); sim_event_t* allocate_overflow(); void configure_overflow(sim_event_t* e); void schedule_new_overflow(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); async command sim_time_t Notify.clockTicksPerSec() { return ATM128_TIMER2_TICKSPPS; } sim_time_t last_zero() { if (lastZero == 0) { lastZero = sim_mote_start_time(sim_node()); } return lastZero; } //=== Read the current timer value. =================================== async command uint8_t Timer2.get() { uint8_t rval; sim_time_t elapsed = sim_time() - last_zero(); elapsed = sim_to_clock(elapsed); elapsed = elapsed >> shiftFromScale(); rval = (uint8_t)(elapsed & 0xff); dbg("HplAtm128Counter2C", "HplAtm128Counter2C: Getting timer: %hhu\n", rval); return rval; } //=== Set/clear the current timer value. ============================== /** * Set/clear the current timer value. * * This code is pretty tricky. */ async command void Timer2.set(uint8_t newVal) { uint8_t curVal = call Timer2.get(); if (newVal == curVal) { return; } else { sim_time_t adjustment = curVal - newVal; adjustment = adjustment << shiftFromScale(); adjustment = clock_to_sim(adjustment); if (newVal < curVal) { lastZero += adjustment; } else { // newVal > curVal lastZero -= adjustment; } schedule_new_overflow(); signal Notify.changed(); } } //=== Read the current timer scale. =================================== async command uint8_t Timer2.getScale() { return TCCR2 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer2.off() { call Timer2.setScale(AVR_CLOCK_OFF); savedCounter = call Timer2.get(); cancel_overflow(); signal Notify.changed(); } //=== Write a new timer scale. ======================================== async command void Timer2.setScale(uint8_t s) { Atm128TimerControl_t ctrl; uint8_t currentScale = call Timer2.getScale(); uint8_t currentCounter; dbg("HplAtm128Counter2C", "Timer2 scale set to %i\n", (int)s); if (currentScale == 0) { currentCounter = savedCounter; } else { currentCounter = call Timer2.get(); } ctrl = call Timer2Ctrl.getControl(); ctrl.bits.cs = s; call Timer2Ctrl.setControl(ctrl); if (currentScale != s) { adjust_zero(currentCounter); schedule_new_overflow(); } signal Notify.changed(); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t Timer2Ctrl.getControl() { return *(Atm128TimerControl_t*)&TCCR2; } //=== Write the control registers. ==================================== async command void Timer2Ctrl.setControl( Atm128TimerControl_t x ) { TCCR2 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t Timer2Ctrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void Timer2Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t Timer2Ctrl.getInterruptFlag() { return *(Atm128_TIFR_t*)&TIFR; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void Timer2Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer2.reset() { // Clear TOV0. On real hardware, this is a write. TIFR &= ~(1 << TOV2); } async command void Timer2.start() { SET_BIT(ATM128_TIMSK, TOIE2); dbg("HplAtm128Counter2C", "Enabling TOIE0 at %llu\n", sim_time()); schedule_new_overflow(); } async command void Timer2.stop() { dbg("HplAtm128Counter2C", "Timer stopped @ %llu\n", sim_time()); CLR_BIT(ATM128_TIMSK, TOIE2); cancel_overflow(); } bool overflowed() { return READ_BIT(ATM128_TIFR, TOV2); } inline void stabiliseOverflow() { /* From the atmel manual: During asynchronous operation, the synchronization of the interrupt flags for the asynchronous timer takes three processor cycles plus one timer cycle. The timer is therefore advanced by at least one before the processor can read the timer value causing the setting of the interrupt flag. The output compare pin is changed on the timer clock and is not synchronized to the processor clock. So: if the timer is = 0, wait till it's = 1, except if - we're currently in the overflow interrupt handler - or, the overflow flag is already set */ //if (!inOverflow) // while (!TCNT0 && !overflowed()) //; } async command bool Timer2.test() { stabiliseOverflow(); return overflowed(); } async command bool Timer2.isOn() { return (call Timer2Ctrl.getInterruptMask()).bits.toie2; } default async event void Timer2.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) { inOverflow = TRUE; signal Timer2.overflow(); inOverflow = FALSE; call ThreadScheduler.interruptPostAmble(); } /** * If the clock was stopped and has restarted, then * we need to move the time when the clock was last * zero to a time that reflects the current settings. * For example, if the clock was stopped when the counter * was 52 and then later restarted, then lastZero * needs to be moved forward in time so that the 52 * reflects the current time. */ void adjust_zero(uint8_t currentCounter) { sim_time_t now = sim_time(); sim_time_t adjust = currentCounter; adjust = adjust << shiftFromScale(); adjust = clock_to_sim(adjust); lastZero = now - adjust; } sim_time_t clock_to_sim(sim_time_t t) { t *= sim_ticks_per_sec(); t /= call Notify.clockTicksPerSec(); return t; } sim_time_t sim_to_clock(sim_time_t t) { t *= call Notify.clockTicksPerSec(); t /= sim_ticks_per_sec(); return t; } uint16_t shiftFromScale() { uint8_t scale = call Timer2.getScale(); switch (scale) { case 0: return 0; case 1: return 0; case 2: return 3; case 3: return 5; case 4: return 6; case 5: return 7; case 6: return 8; case 7: return 10; default: return 255; } } sim_event_t* overflow; void timer2_overflow_handle(sim_event_t* evt) { if (evt->cancelled) { return; } else { char time[128]; sim_print_now(time, 128); if (READ_BIT(ATM128_TIMSK, TOIE2)) { CLR_BIT(ATM128_TIFR, TOV2); dbg("HplAtm128Counter2C", "Overflow interrupt at %s\n", time); SIG_OVERFLOW2(); } else { dbg("HplAtm128Counter2C", "Setting overflow bit at %s\n", time); SET_BIT(ATM128_TIFR, TOV2); } configure_overflow(evt); sim_queue_insert(evt); } } sim_event_t* allocate_overflow() { sim_event_t* newEvent = sim_queue_allocate_event(); newEvent->handle = timer2_overflow_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_overflow(sim_event_t* evt) { sim_time_t overflowTime = 0; uint8_t timerVal = call Timer2.get(); uint8_t overflowVal = 0; // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. overflowTime = ((overflowVal - timerVal) & 0xff); if (overflowTime == 0) { overflowTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. overflowTime = overflowTime << shiftFromScale(); overflowTime = clock_to_sim(overflowTime); overflowTime += sim_time(); overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale()); dbg("HplAtm128Counter2C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime); evt->time = overflowTime; } void schedule_new_overflow() { sim_event_t* newEvent = allocate_overflow(); configure_overflow(newEvent); if (overflow != NULL) { cancel_overflow(); } overflow = newEvent; sim_queue_insert(newEvent); } void cancel_overflow() { if (overflow != NULL) { overflow->cancelled = 1; dbg("HplAtm128Counter2C", "Cancelling overflow %p.\n", overflow); overflow->cleanup = sim_queue_cleanup_total; } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer0AsyncC.nc000066400000000000000000000053321207233610700265550ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer0. It is built from a * timer-specific counter component and a generic compare * component. The counter component has an additional simulation-only * interface to let the compare component know when its state has * changed (e.g., TCNTX was set). * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Timer0AsyncC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include configuration HplAtm128Timer0AsyncC { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { components HplAtm128Timer0AsyncP; Timer = HplAtm128Timer0AsyncP; TimerCtrl = HplAtm128Timer0AsyncP; Compare = HplAtm128Timer0AsyncP; TimerAsync = HplAtm128Timer0AsyncP; components TinyThreadSchedulerC; HplAtm128Timer0AsyncP.ThreadScheduler -> TinyThreadSchedulerC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer0AsyncP.nc000066400000000000000000000432041207233610700265720ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer0 counter. It handles * overflow, scaling, and phase considerations. * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Timer0AsyncP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include #include module HplAtm128Timer0AsyncP { provides { interface HplAtm128Timer as Timer0; interface HplAtm128TimerCtrl8 as Timer0Ctrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } uses interface ThreadScheduler; } implementation { bool inOverflow = 0; uint8_t savedCounter = 0; void adjust_zero(uint8_t currentCounter); void cancel_overflow(); sim_event_t* allocate_overflow(); void configure_overflow(sim_event_t* e); void schedule_new_overflow(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); /* lastZero keeps track of the phase of the clock. It denotes the sim * time at which the underlying clock started, which is needed to * calculate when compares will occur. */ sim_time_t lastZero = 0; /** This variable is needed to keep track of when the underlying * timer starts, in order to reset lastZero. When oldScale is * AVR_CLOCK_OFF and the scale is set to something else, the * clock starts ticking. */ uint8_t oldScale = AVR_CLOCK_OFF; void adjust_zero(uint8_t currentCounter); void cancel_compare(); sim_event_t* allocate_compare(); void configure_compare(sim_event_t* e); void schedule_new_compare(); sim_time_t clock_to_sim(sim_time_t t); sim_time_t sim_to_clock(sim_time_t t); uint16_t shiftFromScale(); default async event void Compare.fired() { } AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) { //stabiliseTimer0(); signal Compare.fired(); call ThreadScheduler.interruptPostAmble(); } default async event void Timer0.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) { inOverflow = TRUE; signal Timer0.overflow(); inOverflow = FALSE; call ThreadScheduler.interruptPostAmble(); } sim_time_t last_zero() { if (lastZero == 0) { lastZero = sim_mote_start_time(sim_node()); } return lastZero; } void notify_changed() { uint8_t newScale = call Timer0.getScale(); if (newScale != AVR_CLOCK_OFF && oldScale == AVR_CLOCK_OFF) { lastZero = sim_time(); } oldScale = newScale; schedule_new_compare(); } sim_time_t notify_clockTicksPerSec() { return ATM128_TIMER0_TICKSPPS; } /** * If the clock was stopped and has restarted, then * we need to move the time when the clock was last * zero to a time that reflects the current settings. * For example, if the clock was stopped when the counter * was 52 and then later restarted, then lastZero * needs to be moved forward in time so that the 52 * reflects the current time. */ void adjust_zero(uint8_t currentCounter) { sim_time_t now = sim_time(); sim_time_t adjust = currentCounter; adjust = adjust << shiftFromScale(); adjust = clock_to_sim(adjust); lastZero = now - adjust; } sim_time_t clock_to_sim(sim_time_t t) { t *= sim_ticks_per_sec(); t /= notify_clockTicksPerSec(); return t; } sim_time_t sim_to_clock(sim_time_t t) { t *= notify_clockTicksPerSec(); t /= sim_ticks_per_sec(); return t; } uint16_t shiftFromScale() { uint8_t scale = call Timer0.getScale(); switch (scale) { case 0: return 0; case 1: return 0; case 2: return 3; case 3: return 5; case 4: return 6; case 5: return 7; case 6: return 8; case 7: return 10; default: return 255; } } sim_event_t* compare; void timer0_compare_handle(sim_event_t* evt) { dbg("HplAtm128Timer0AsyncP", "Beginning compare 0x%p at %s\n", evt, sim_time_string()); if (evt->cancelled) { return; } else { char timeStr[128]; sim_print_now(timeStr, 128); dbg("HplAtm128Timer0AsyncP", "Handling compare at 0x%p @ %s\n", evt, sim_time_string()); if (READ_BIT(ATM128_TCCR0, WGM01) && !READ_BIT(ATM128_TCCR0, WGM00)) { dbg("HplAtm128Timer0AsyncP", "%s: CTC is set, clear timer.\n", __FUNCTION__); call Timer0.set(0); } else { dbg("HplAtm128Timer0AsyncP", "%s: TCCR is 0x%hhx, %i, %i\n", __FUNCTION__, TCCR0, (int)READ_BIT(ATM128_TCCR0, WGM01), (int)READ_BIT(ATM128_TCCR0, WGM00)); } if (READ_BIT(ATM128_TIMSK, OCIE0)) { dbg("HplAtm128Timer0AsyncP", "TIFR is %hhx\n", TIFR); CLR_BIT(ATM128_TIFR, OCF0); dbg("HplAtm128Timer0AsyncP", "TIFR is %hhx\n", TIFR); dbg("HplAtm128Timer0AsyncP", "Compare interrupt @ %s\n", timeStr); SIG_OUTPUT_COMPARE0(); } else { SET_BIT(ATM128_TIFR, OCF0); } // If we haven't been cancelled if (!evt->cancelled) { configure_compare(evt); sim_queue_insert(evt); } } } sim_event_t* allocate_compare() { sim_event_t* newEvent = sim_queue_allocate_event(); dbg("HplAtm128Timer0AsyncP", "Allocated compare at 0x%p\n", newEvent); newEvent->handle = timer0_compare_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_compare(sim_event_t* evt) { sim_time_t compareTime = 0; sim_time_t phaseOffset = 0; uint8_t timerVal = call Timer0.get(); uint8_t compareVal = call Compare.get(); // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. compareTime = ((compareVal - timerVal) & 0xff); if (compareTime == 0) { compareTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. // The +1 is from the timer behavior: if you set OCR0 to be X, // it will actually fire when TCNT is X+1 compareTime = (compareTime + 1) << shiftFromScale(); compareTime = clock_to_sim(compareTime); compareTime += sim_time(); // How long into a timer tick was the clock actually reset? // This covers the case when the compare is set midway between // a tick, so it will go off a little early phaseOffset = sim_time(); phaseOffset -= last_zero(); phaseOffset %= clock_to_sim(1 << shiftFromScale()); compareTime -= phaseOffset; dbg("HplAtm128Timer0AsyncP", "Configuring new compare of %i for %i at time %llu (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time()); evt->time = compareTime; } void schedule_new_compare() { if (compare != NULL) { cancel_compare(); } if (call Timer0.getScale() != AVR_CLOCK_OFF) { sim_event_t* newEvent = allocate_compare(); configure_compare(newEvent); compare = newEvent; sim_queue_insert(newEvent); } } //=== Read the current timer value. =================================== async command uint8_t Timer0.get() { uint8_t rval; sim_time_t elapsed = sim_time() - last_zero(); elapsed = sim_to_clock(elapsed); elapsed = elapsed >> shiftFromScale(); rval = (uint8_t)(elapsed & 0xff); dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Getting timer: %hhu\n", rval); return rval; } //=== Set/clear the current timer value. ============================== /** * Set/clear the current timer value. * * This code is pretty tricky. */ async command void Timer0.set(uint8_t newVal) { uint8_t curVal = call Timer0.get(); dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Setting timer: %hhu\n", newVal); if (newVal == curVal) { return; } else { sim_time_t adjustment = curVal - newVal; adjustment = adjustment << shiftFromScale(); adjustment = clock_to_sim(adjustment); if (newVal < curVal) { lastZero += adjustment; } else { // newVal > curVal lastZero -= adjustment; } schedule_new_overflow(); notify_changed(); } } //=== Read the current timer scale. =================================== async command uint8_t Timer0.getScale() { return TCCR0 & 0x7; } //=== Turn off the timers. ============================================ async command void Timer0.off() { call Timer0.setScale(AVR_CLOCK_OFF); savedCounter = call Timer0.get(); cancel_overflow(); notify_changed(); } //=== Write a new timer scale. ======================================== async command void Timer0.setScale(uint8_t s) { Atm128TimerControl_t ctrl; uint8_t currentScale = call Timer0.getScale(); uint8_t currentCounter; dbg("HplAtm128Timer0AsyncP", "Timer0 scale set to %i\n", (int)s); if (currentScale == 0) { currentCounter = savedCounter; } else { currentCounter = call Timer0.get(); } ctrl = call Timer0Ctrl.getControl(); ctrl.flat &= ~(0x7); ctrl.flat |= (s & 0x7); call Timer0Ctrl.setControl(ctrl); if (currentScale != s) { adjust_zero(currentCounter); schedule_new_overflow(); } notify_changed(); } //=== Read the control registers. ===================================== async command Atm128TimerControl_t Timer0Ctrl.getControl() { return *(Atm128TimerControl_t*)&TCCR0; } //=== Write the control registers. ==================================== async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) { dbg("HplAtm128Timer0AsyncP", "Setting control to be 0x%hhx\n", x.flat); TCCR0 = x.flat; } //=== Read the interrupt mask. ===================================== async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { return *(Atm128_TIMSK_t*)&TIMSK; } //=== Write the interrupt mask. ==================================== DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t); DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t); async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { TIMSK = TimerMask8_2int(x); } //=== Read the interrupt flags. ===================================== async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() { Atm128_TIFR_t at; at.flat = TIFR; return at; } //=== Write the interrupt flags. ==================================== DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t); DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t); async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { TIFR = TimerFlags8_2int(x); } //=== Timer 8-bit implementation. ==================================== async command void Timer0.reset() { // Clear TOV0. On real hardware, this is a write. TIFR &= ~(1 << TOV0); } async command void Timer0.start() { SET_BIT(ATM128_TIMSK, TOIE0); dbg("HplAtm128Timer0AsyncP", "Enabling TOIE0 at %llu\n", sim_time()); schedule_new_overflow(); } async command void Timer0.stop() { dbg("HplAtm128Timer0AsyncP", "Timer stopped @ %llu\n", sim_time()); CLR_BIT(ATM128_TIMSK, TOIE0); cancel_overflow(); } bool overflowed() { return READ_BIT(ATM128_TIFR, TOV0); } inline void stabiliseOverflow() { /* From the atmel manual: During asynchronous operation, the synchronization of the interrupt flags for the asynchronous timer takes three processor cycles plus one timer cycle. The timer is therefore advanced by at least one before the processor can read the timer value causing the setting of the interrupt flag. The output compare pin is changed on the timer clock and is not synchronized to the processor clock. So: if the timer is = 0, wait till it's = 1, except if - we're currently in the overflow interrupt handler - or, the overflow flag is already set */ //if (!inOverflow) // while (!TCNT0 && !overflowed()) //; } async command bool Timer0.test() { stabiliseOverflow(); return overflowed(); } async command bool Timer0.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.toie0; } async command void Compare.reset() { TIFR = 1 << OCF0; } async command void Compare.start() { SET_BIT(ATM128_TIMSK,OCIE0); } async command void Compare.stop() { CLR_BIT(ATM128_TIMSK,OCIE0); } async command bool Compare.test() { return (call Timer0Ctrl.getInterruptFlag()).bits.ocf0; } async command bool Compare.isOn() { return (call Timer0Ctrl.getInterruptMask()).bits.ocie0; } //=== Read the compare registers. ===================================== async command uint8_t Compare.get() { dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Getting compare: %hhu\n", OCR0); return OCR0; } //=== Write the compare registers. ==================================== async command void Compare.set(uint8_t t) { dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Setting compare: %hhu\n", t); atomic { /* Re the comment above: it's a bad idea to wake up at time 0, as we'll just spin when setting the next deadline. Try and reduce the likelihood by delaying the interrupt... */ if (t == 0 || t >= 0xfe) t = 1; if (t != OCR0) { OCR0 = t; schedule_new_compare(); } } } sim_event_t* overflow; void timer0_overflow_handle(sim_event_t* evt) { if (evt->cancelled) { return; } else { if (READ_BIT(ATM128_TIMSK, TOIE0)) { CLR_BIT(ATM128_TIFR, TOV0); dbg("HplAtm128Timer0AsyncP", "Overflow interrupt at %s\n", sim_time_string()); SIG_OVERFLOW0(); } else { dbg("HplAtm128Timer0AsyncP", "Setting overflow bit at %s\n", sim_time_string()); SET_BIT(ATM128_TIFR, TOV0); } configure_overflow(evt); sim_queue_insert(evt); } } sim_event_t* allocate_overflow() { sim_event_t* newEvent = sim_queue_allocate_event(); newEvent->handle = timer0_overflow_handle; newEvent->cleanup = sim_queue_cleanup_none; return newEvent; } void configure_overflow(sim_event_t* evt) { sim_time_t overflowTime = 0; uint8_t timerVal = call Timer0.get(); uint8_t overflowVal = 0; // Calculate how many counter increments until timer // hits compare, considering wraparound, and special // case of complete wraparound. overflowTime = ((overflowVal - timerVal) & 0xff); if (overflowTime == 0) { overflowTime = 256; } // Now convert the compare time from counter increments // to simulation ticks, considering the fact that the // increment actually has a phase offset. overflowTime = overflowTime << shiftFromScale(); overflowTime = clock_to_sim(overflowTime); overflowTime += sim_time(); overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale()); dbg("HplAtm128Timer0AsyncP", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime); evt->time = overflowTime; } void schedule_new_overflow() { sim_event_t* newEvent = allocate_overflow(); configure_overflow(newEvent); if (overflow != NULL) { cancel_overflow(); } overflow = newEvent; sim_queue_insert(newEvent); } void cancel_overflow() { if (overflow != NULL) { overflow->cancelled = 1; dbg("HplAtm128Timer0AsyncP", "Cancelling overflow %p.\n", overflow); overflow->cleanup = sim_queue_cleanup_total; } } async command Atm128Assr_t TimerAsync.getAssr() { return *(Atm128Assr_t *)&ASSR; } async command void TimerAsync.setAssr(Atm128Assr_t x) { ASSR = x.flat; } async command void TimerAsync.setTimer0Asynchronous() { ASSR |= 1 << AS0; } async command int TimerAsync.controlBusy() { return (ASSR & (1 << TCR0UB)) != 0; } async command int TimerAsync.compareBusy() { return (ASSR & (1 << OCR0UB)) != 0; } async command int TimerAsync.countBusy() { return (ASSR & (1 << TCN0UB)) != 0; } void cancel_compare() { dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare); if (compare != NULL) { compare->cancelled = 1; compare->cleanup = sim_queue_cleanup_total; } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer2C.nc000066400000000000000000000057331207233610700255660ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TOSSIM implementation of the Atm128 Timer2. It is built from a * timer-specific counter component and a generic compare * component. The counter component has an additional simulation-only * interface to let the compare component know when its state has * changed (e.g., TCNTX was set). * * @date November 22 2005 * * @author Philip Levis * @author Martin Turon * @author David Gay */ // $Id: HplAtm128Timer2C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc, #include configuration HplAtm128Timer2C { provides { // 8-bit Timers interface HplAtm128Timer as Timer2; interface HplAtm128TimerCtrl8 as Timer2Ctrl; interface HplAtm128Compare as Compare2; } uses interface ThreadScheduler; } implementation { components HplAtm128Counter0C, new HplAtm128CompareC(uint8_t, ATM128_OCR2, ATM128_TIMSK, OCIE2, ATM128_TIFR, OCF2); Timer2 = HplAtm128Counter2C; Timer2Ctrl = HplAtm128Counter2C; Compare2 = HplAtm128CompareC; HplAtm128CompareC.Timer -> HplAtm128Counter2C; HplAtm128CompareC.TimerCtrl -> HplAtm128Counter2C; HplAtm128CompareC.Notify -> HplAtm128Counter2C; components TinyThreadSchedulerC; HplAtm128Counter0C.ThreadScheduler -> TinyThreadSchedulerC; HplAtm128CompareC.ThreadScheduler -> TinyThreadSchedulerC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/000077500000000000000000000000001207233610700217175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer1P.nc000066400000000000000000000233541207233610700251530ustar00rootroot00000000000000 /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Internal component of the HPL interface to Atmega1281 timer 1. * * @author Martin Turon * @author Janos Sallai */ #include module HplAtm1281Timer1P { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as CompareA; interface HplAtm128Compare as CompareB; interface HplAtm128Compare as CompareC; } uses interface PlatformInterrupt; } implementation { //=== Read the current timer value. =================================== async command uint16_t Timer.get() { return TCNT1; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint16_t t) { TCNT1 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR1B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128_TCCRB_t x = (Atm128_TCCRB_t) call TimerCtrl.getControlB(); x.bits.cs = s; call TimerCtrl.setControlB(x.flat); } //=== Read the control registers. ===================================== async command uint8_t TimerCtrl.getControlA() { return TCCR1A; } async command uint8_t TimerCtrl.getControlB() { return TCCR1B; } async command uint8_t TimerCtrl.getControlC() { return TCCR1C; } //=== Write the control registers. ==================================== async command void TimerCtrl.setControlA( uint8_t x ) { TCCR1A = x; } async command void TimerCtrl.setControlB( uint8_t x ) { TCCR1B = x; } async command void TimerCtrl.setControlC( uint8_t x ) { TCCR1C = x; } //=== Read the interrupt mask. ===================================== async command uint8_t TimerCtrl.getInterruptMask() { return TIMSK1; } //=== Write the interrupt mask. ==================================== async command void TimerCtrl.setInterruptMask( uint8_t x ) { TIMSK1 = x; } //=== Read the interrupt flags. ===================================== async command uint8_t TimerCtrl.getInterruptFlag() { return TIFR1; } //=== Write the interrupt flags. ==================================== async command void TimerCtrl.setInterruptFlag( uint8_t x ) { TIFR1 = x; } //=== Capture 16-bit implementation. =================================== async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); } //=== Timer 16-bit implementation. =================================== async command void Timer.reset() { TIFR1 = 1 << TOV1; } async command void Capture.reset() { TIFR1 = 1 << ICF1; } async command void CompareA.reset() { TIFR1 = 1 << OCF1A; } async command void CompareB.reset() { TIFR1 = 1 << OCF1B; } async command void CompareC.reset() { TIFR1 = 1 << OCF1C; } async command void Timer.start() { SET_BIT(TIMSK1,TOIE1); } async command void Capture.start() { SET_BIT(TIMSK1,ICIE1); } async command void CompareA.start() { SET_BIT(TIMSK1,OCIE1A); } async command void CompareB.start() { SET_BIT(TIMSK1,OCIE1B); } async command void CompareC.start() { SET_BIT(TIMSK1,OCIE1C); } async command void Timer.stop() { CLR_BIT(TIMSK1,TOIE1); } async command void Capture.stop() { CLR_BIT(TIMSK1,ICIE1); } async command void CompareA.stop() { CLR_BIT(TIMSK1,OCIE1A); } async command void CompareB.stop() { CLR_BIT(TIMSK1,OCIE1B); } async command void CompareC.stop() { CLR_BIT(TIMSK1,OCIE1C); } async command bool Timer.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.tov; } async command bool Capture.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.icf; } async command bool CompareA.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; } async command bool CompareB.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfb; } async command bool CompareC.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfc; } async command bool Timer.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.toie; } async command bool Capture.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.icie; } async command bool CompareA.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociea; } async command bool CompareB.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ocieb; } async command bool CompareC.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociec; } //=== Read the compare registers. ===================================== async command uint16_t CompareA.get() { return OCR1A; } async command uint16_t CompareB.get() { return OCR1B; } async command uint16_t CompareC.get() { return OCR1C; } //=== Write the compare registers. ==================================== async command void CompareA.set(uint16_t t) { OCR1A = t; } async command void CompareB.set(uint16_t t) { OCR1B = t; } async command void CompareC.set(uint16_t t) { OCR1C = t; } //=== Read the capture registers. ===================================== async command uint16_t Capture.get() { return ICR1; } //=== Write the capture registers. ==================================== async command void Capture.set(uint16_t t) { ICR1 = t; } //=== Timer interrupts signals ======================================== default async event void CompareA.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) { signal CompareA.fired(); call PlatformInterrupt.postAmble(); } default async event void CompareB.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) { signal CompareB.fired(); call PlatformInterrupt.postAmble(); } default async event void CompareC.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) { signal CompareC.fired(); call PlatformInterrupt.postAmble(); } default async event void Capture.captured(uint16_t time) { } AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) { signal Capture.captured(call Timer.get()); call PlatformInterrupt.postAmble(); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) { signal Timer.overflow(); call PlatformInterrupt.postAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer2AsyncC.nc000066400000000000000000000101571207233610700261320ustar00rootroot00000000000000/// $Id: HplAtm1281Timer2AsyncC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2006 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Simple wrapper around the actual timer implementation that automatically * wires it to McuSleepC for low-power calculations.. * * @author Philip Levis * @author David Gay * @author Janos Sallai */ #include configuration HplAtm1281Timer2AsyncC { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface HplAtm128TimerAsync as TimerAsync; } } implementation { components HplAtm1281Timer2AsyncP; components McuSleepC; McuSleepC.McuPowerOverride -> HplAtm1281Timer2AsyncP; Timer = HplAtm1281Timer2AsyncP; TimerCtrl = HplAtm1281Timer2AsyncP; Compare = HplAtm1281Timer2AsyncP; TimerAsync = HplAtm1281Timer2AsyncP; components PlatformInterruptC; HplAtm1281Timer2AsyncP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer2AsyncP.nc000066400000000000000000000236661207233610700261600ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL interface to Atmega1281 timer 2 in ASYNC mode. This is a specialised * HPL component that assumes that timer 2 is used in ASYNC mode and * includes some workarounds for some of the weirdnesses (delayed overflow * interrupt) of that mode. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ #include module HplAtm1281Timer2AsyncP { provides { // 8-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl8 as TimerCtrl; interface HplAtm128Compare as Compare; interface McuPowerOverride; interface HplAtm128TimerAsync as TimerAsync; } uses interface PlatformInterrupt; } implementation { // bool inOverflow; // command error_t Init.init() { // SET_BIT(ASSR, AS2); // set Timer/Counter2 to asynchronous mode // return SUCCESS; // } //=== Read the current timer value. =================================== async command uint8_t Timer.get() { return TCNT2; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint8_t t) { while (ASSR & 1 << TCN2UB) ; TCNT2 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR2B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128_TCCR2B_t x = (Atm128_TCCR2B_t) call TimerCtrl.getControlB(); x.bits.cs = s; call TimerCtrl.setControlB(x.flat); } //=== Read the control registers. ===================================== async command uint8_t TimerCtrl.getControlA() { return TCCR2A; } async command uint8_t TimerCtrl.getControlB() { return TCCR2B; } //=== Write the control registers. ==================================== async command void TimerCtrl.setControlA( uint8_t x ) { while (ASSR & 1 << TCR2AUB) ; TCCR2A = ((Atm128_TCCR2A_t)x).flat; } async command void TimerCtrl.setControlB( uint8_t x ) { while (ASSR & 1 << TCR2BUB) ; TCCR2B = ((Atm128_TCCR2B_t)x).flat; } //=== Read the interrupt mask. ===================================== async command uint8_t TimerCtrl.getInterruptMask() { return TIMSK2; } //=== Write the interrupt mask. ==================================== async command void TimerCtrl.setInterruptMask( uint8_t x ) { TIMSK2 = x; } //=== Read the interrupt flags. ===================================== async command uint8_t TimerCtrl.getInterruptFlag() { return TIFR2; } //=== Write the interrupt flags. ==================================== async command void TimerCtrl.setInterruptFlag( uint8_t x ) { TIFR2 = x; } //=== Timer 8-bit implementation. ==================================== async command void Timer.reset() { TIFR2 = 1 << TOV2; } async command void Timer.start() { SET_BIT(TIMSK2, TOIE2); } async command void Timer.stop() { CLR_BIT(TIMSK2, TOIE2); } bool overflowed() { return ((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag()).bits.tov; } async command bool Timer.test() { return overflowed(); } async command bool Timer.isOn() { return ((Atm128_TIMSK2_t)call TimerCtrl.getInterruptMask()).bits.toie; } async command void Compare.reset() { TIFR2 = 1 << OCF2A; } async command void Compare.start() { SET_BIT(TIMSK2,OCIE2A); } async command void Compare.stop() { CLR_BIT(TIMSK2,OCIE2A); } async command bool Compare.test() { return ((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; } async command bool Compare.isOn() { return ((Atm128_TIMSK2_t)call TimerCtrl.getInterruptMask()).bits.ociea; } //=== Read the compare registers. ===================================== async command uint8_t Compare.get(){ return OCR2A; } //=== Write the compare registers. ==================================== async command void Compare.set(uint8_t t) { atomic { while (ASSR & 1 << OCR2AUB) ; OCR2A = t; } } //=== Timer interrupts signals ======================================== inline void stabiliseTimer2() { TCCR2A = TCCR2A; while (ASSR & 1 << TCR2AUB) ; } /** * On the atm128, there is a small latency when waking up from * POWER_SAVE mode. So if a timer is going to go off very soon, it's * better to drop down until EXT_STANDBY, which has a 6 cycle wakeup * latency. This function calculates whether staying in EXT_STANDBY * is needed. If the timer is not running it returns POWER_DOWN. * Please refer to TEP 112 and the atm128 datasheet for details. */ async command mcu_power_t McuPowerOverride.lowestState() { uint8_t diff; // We need to make sure that the sleep wakeup latency will not // cause us to miss a timer. POWER_SAVE if (TIMSK2 & (1 << OCIE2A | 1 << TOIE2)) { // need to wait for timer 2 updates propagate before sleeping // (we don't need to worry about reentering sleep mode too early, // as the wake ups from timer2 wait at least one TOSC1 cycle // anyway - see the stabiliseTimer2 function) while (ASSR & (1 << TCN2UB | 1 << OCR2AUB | 1 << TCR2AUB)) ; diff = OCR2A - TCNT2; if (diff < EXT_STANDBY_T0_THRESHOLD || TCNT2 > 256 - EXT_STANDBY_T0_THRESHOLD) return ATM128_POWER_EXT_STANDBY; return ATM128_POWER_SAVE; } else { return ATM128_POWER_DOWN; } } default async event void Compare.fired() { } AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE2A) { stabiliseTimer2(); // __nesc_enable_interrupt(); signal Compare.fired(); call PlatformInterrupt.postAmble(); } default async event void Timer.overflow() { } AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) { stabiliseTimer2(); // inOverflow = TRUE; signal Timer.overflow(); // inOverflow = FALSE; call PlatformInterrupt.postAmble(); } // Asynchronous status register support async command Atm128_ASSR_t TimerAsync.getAssr() { return *(Atm128_ASSR_t *)&ASSR; } async command void TimerAsync.setAssr(Atm128_ASSR_t x) { ASSR = x.flat; } async command void TimerAsync.setTimer2Asynchronous() { ASSR |= 1 << AS2; } async command int TimerAsync.controlABusy() { return (ASSR & (1 << TCR2AUB)) != 0; } async command int TimerAsync.controlBBusy() { return (ASSR & (1 << TCR2BUB)) != 0; } async command int TimerAsync.compareABusy() { return (ASSR & (1 << OCR2AUB)) != 0; } async command int TimerAsync.compareBBusy() { return (ASSR & (1 << OCR2BUB)) != 0; } async command int TimerAsync.countBusy() { return (ASSR & (1 << TCN2UB)) != 0; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer3P.nc000066400000000000000000000233551207233610700251560ustar00rootroot00000000000000 /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Internal component of the HPL interface to Atmega1281 timer 3. * * @author Martin Turon * @author Janos Sallai */ #include module HplAtm1281Timer3P { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as CompareA; interface HplAtm128Compare as CompareB; interface HplAtm128Compare as CompareC; } uses interface PlatformInterrupt; } implementation { //=== Read the current timer value. =================================== async command uint16_t Timer.get() { return TCNT3; } //=== Set/clear the current timer value. ============================== async command void Timer.set(uint16_t t) { TCNT3 = t; } //=== Read the current timer scale. =================================== async command uint8_t Timer.getScale() { return TCCR3B & 0x7; } //=== Turn off the timers. ============================================ async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); } //=== Write a new timer scale. ======================================== async command void Timer.setScale(uint8_t s) { Atm128_TCCRB_t x = (Atm128_TCCRB_t) call TimerCtrl.getControlB(); x.bits.cs = s; call TimerCtrl.setControlB(x.flat); } //=== Read the control registers. ===================================== async command uint8_t TimerCtrl.getControlA() { return TCCR3A; } async command uint8_t TimerCtrl.getControlB() { return TCCR3B; } async command uint8_t TimerCtrl.getControlC() { return TCCR3C; } //=== Write the control registers. ==================================== async command void TimerCtrl.setControlA( uint8_t x ) { TCCR3A = x; } async command void TimerCtrl.setControlB( uint8_t x ) { TCCR3B = x; } async command void TimerCtrl.setControlC( uint8_t x ) { TCCR3C = x; } //=== Read the interrupt mask. ===================================== async command uint8_t TimerCtrl.getInterruptMask() { return TIMSK3; } //=== Write the interrupt mask. ==================================== async command void TimerCtrl.setInterruptMask( uint8_t x ) { TIMSK3 = x; } //=== Read the interrupt flags. ===================================== async command uint8_t TimerCtrl.getInterruptFlag() { return TIFR3; } //=== Write the interrupt flags. ==================================== async command void TimerCtrl.setInterruptFlag( uint8_t x ) { TIFR3 = x; } //=== Capture 16-bit implementation. =================================== async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B, ICES3, up); } //=== Timer 16-bit implementation. =================================== async command void Timer.reset() { TIFR3 = 1 << TOV3; } async command void Capture.reset() { TIFR3 = 1 << ICF3; } async command void CompareA.reset() { TIFR3 = 1 << OCF3A; } async command void CompareB.reset() { TIFR3 = 1 << OCF3B; } async command void CompareC.reset() { TIFR3 = 1 << OCF3C; } async command void Timer.start() { SET_BIT(TIMSK3,TOIE3); } async command void Capture.start() { SET_BIT(TIMSK3,ICIE3); } async command void CompareA.start() { SET_BIT(TIMSK3,OCIE3A); } async command void CompareB.start() { SET_BIT(TIMSK3,OCIE3B); } async command void CompareC.start() { SET_BIT(TIMSK3,OCIE3C); } async command void Timer.stop() { CLR_BIT(TIMSK3,TOIE3); } async command void Capture.stop() { CLR_BIT(TIMSK3,ICIE3); } async command void CompareA.stop() { CLR_BIT(TIMSK3,OCIE3A); } async command void CompareB.stop() { CLR_BIT(TIMSK3,OCIE3B); } async command void CompareC.stop() { CLR_BIT(TIMSK3,OCIE3C); } async command bool Timer.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.tov; } async command bool Capture.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.icf; } async command bool CompareA.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; } async command bool CompareB.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfb; } async command bool CompareC.test() { return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfc; } async command bool Timer.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.toie; } async command bool Capture.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.icie; } async command bool CompareA.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociea; } async command bool CompareB.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ocieb; } async command bool CompareC.isOn() { return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociec; } //=== Read the compare registers. ===================================== async command uint16_t CompareA.get() { return OCR3A; } async command uint16_t CompareB.get() { return OCR3B; } async command uint16_t CompareC.get() { return OCR3C; } //=== Write the compare registers. ==================================== async command void CompareA.set(uint16_t t) { OCR3A = t; } async command void CompareB.set(uint16_t t) { OCR3B = t; } async command void CompareC.set(uint16_t t) { OCR3C = t; } //=== Read the capture registers. ===================================== async command uint16_t Capture.get() { return ICR3; } //=== Write the capture registers. ==================================== async command void Capture.set(uint16_t t) { ICR3 = t; } //=== Timer interrupts signals ======================================== default async event void CompareA.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) { signal CompareA.fired(); call PlatformInterrupt.postAmble(); } default async event void CompareB.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) { signal CompareB.fired(); call PlatformInterrupt.postAmble(); } default async event void CompareC.fired() { } AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) { signal CompareC.fired(); call PlatformInterrupt.postAmble(); } default async event void Capture.captured(uint16_t time) { } AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) { signal Capture.captured(call Timer.get()); call PlatformInterrupt.postAmble(); } default async event void Timer.overflow() { } AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) { signal Timer.overflow(); call PlatformInterrupt.postAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/HplAtm128AdcP.nc000066400000000000000000000153551207233610700244220ustar00rootroot00000000000000/// $Id: HplAtm128AdcP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include "Atm128Adc.h" /** * HPL for the Atmega1281 A/D conversion susbsystem. * * @author Martin Turon * @author Hu Siquan * @author David Gay * @author Janos Sallai */ module HplAtm128AdcP { provides interface HplAtm128Adc; uses interface McuPowerState; uses interface PlatformInterrupt; } implementation { //=== Direct read of HW registers. ================================= async command Atm128Admux_t HplAtm128Adc.getAdmux() { return *(Atm128Admux_t*)&ADMUX; } async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { return *(Atm128Adcsra_t*)&ADCSRA; } async command uint16_t HplAtm128Adc.getValue() { return ADC; } DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t); DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t); //=== Direct write of HW registers. ================================ async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) { ADMUX = Admux2int(x); } async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { ADCSRA = Adcsra2int(x); } async command void HplAtm128Adc.setPrescaler(uint8_t scale){ Atm128Adcsra_t current_val = call HplAtm128Adc.getAdcsra(); current_val.adif = FALSE; current_val.adps = scale; call HplAtm128Adc.setAdcsra(current_val); } // Individual bit manipulation. These all clear any pending A/D interrupt. // It's not clear these are that useful... async command void HplAtm128Adc.enableAdc() { SET_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.disableAdc() { CLR_BIT(ADCSRA, ADEN); call McuPowerState.update(); } async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); } async command void HplAtm128Adc.setContinuous() { ((Atm128Adcsrb_t*)&ADCSRB)->adts = 0; SET_BIT(ADCSRA, ADATE); } async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADATE); } async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); } async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); } /* A/D status checks */ async command bool HplAtm128Adc.isEnabled() { return (call HplAtm128Adc.getAdcsra()).aden; } async command bool HplAtm128Adc.isStarted() { return (call HplAtm128Adc.getAdcsra()).adsc; } async command bool HplAtm128Adc.isComplete() { return (call HplAtm128Adc.getAdcsra()).adif; } /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */ AVR_ATOMIC_HANDLER(SIG_ADC) { uint16_t data = call HplAtm128Adc.getValue(); __nesc_enable_interrupt(); signal HplAtm128Adc.dataReady(data); call PlatformInterrupt.postAmble(); } default async event void HplAtm128Adc.dataReady(uint16_t done) { } async command bool HplAtm128Adc.cancel() { /* This is tricky */ atomic { Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr; /* To cancel a conversion, first turn off ADEN, then turn off ADSC. We also cancel any pending interrupt. Finally we reenable the ADC. */ newSr = oldSr; newSr.aden = FALSE; newSr.adif = TRUE; /* This clears a pending interrupt... */ newSr.adie = FALSE; /* We don't want to start sampling again at the next sleep */ call HplAtm128Adc.setAdcsra(newSr); newSr.adsc = FALSE; call HplAtm128Adc.setAdcsra(newSr); newSr.aden = TRUE; call HplAtm128Adc.setAdcsra(newSr); return oldSr.adif || oldSr.adsc; } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/HplAtm128Timer1C.nc000066400000000000000000000100361207233610700250460ustar00rootroot00000000000000/// $Id: HplAtm128Timer1C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL interface to Atmega1281 timer 1. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ configuration HplAtm128Timer1C { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as Compare[uint8_t id]; } } implementation { components HplAtm1281Timer1P; Timer = HplAtm1281Timer1P; TimerCtrl = HplAtm1281Timer1P; Capture = HplAtm1281Timer1P; Compare[0] = HplAtm1281Timer1P.CompareA; Compare[1] = HplAtm1281Timer1P.CompareB; Compare[2] = HplAtm1281Timer1P.CompareC; components PlatformInterruptC; HplAtm1281Timer1P.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/HplAtm128Timer3C.nc000066400000000000000000000100361207233610700250500ustar00rootroot00000000000000/// $Id: HplAtm128Timer3C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * HPL interface to Atmega1281 timer 3. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ configuration HplAtm128Timer3C { provides { // 16-bit Timers interface HplAtm128Timer as Timer; interface HplAtm128TimerCtrl16 as TimerCtrl; interface HplAtm128Capture as Capture; interface HplAtm128Compare as Compare[uint8_t id]; } } implementation { components HplAtm1281Timer3P; Timer = HplAtm1281Timer3P; TimerCtrl = HplAtm1281Timer3P; Capture = HplAtm1281Timer3P; Compare[0] = HplAtm1281Timer3P.CompareA; Compare[1] = HplAtm1281Timer3P.CompareB; Compare[2] = HplAtm1281Timer3P.CompareC; components PlatformInterruptC; HplAtm1281Timer3P.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/atm1281/HplAtm128UartP.nc000066400000000000000000000240761207233610700246460ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $ */ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Private component of the Atmega1281 serial port HPL. * * @author Martin Turon * @author David Gay * @author Janos Sallai */ #include module HplAtm128UartP { provides interface Init as Uart0Init; provides interface StdControl as Uart0TxControl; provides interface StdControl as Uart0RxControl; provides interface HplAtm128Uart as HplUart0; provides interface Init as Uart1Init; provides interface StdControl as Uart1TxControl; provides interface StdControl as Uart1RxControl; provides interface HplAtm128Uart as HplUart1; uses interface Atm128Calibrate; uses interface McuPowerState; uses interface PlatformInterrupt; } implementation { //=== Uart Init Commands. ==================================== command error_t Uart0Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr0; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR0L = ubrr0; UBRR0H = ubrr0 >> 8; UCSR0A = stts.flat; UCSR0C = mode.flat; UCSR0B = ctrl.flat; return SUCCESS; } command error_t Uart0TxControl.start() { SET_BIT(UCSR0B, TXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0TxControl.stop() { CLR_BIT(UCSR0B, TXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.start() { SET_BIT(UCSR0B, RXEN0); call McuPowerState.update(); return SUCCESS; } command error_t Uart0RxControl.stop() { CLR_BIT(UCSR0B, RXEN0); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart0.enableTxIntr() { SET_BIT(UCSR0A, TXC0); SET_BIT(UCSR0B, TXCIE0); return SUCCESS; } async command error_t HplUart0.disableTxIntr(){ CLR_BIT(UCSR0B, TXCIE0); return SUCCESS; } async command error_t HplUart0.enableRxIntr(){ SET_BIT(UCSR0B, RXCIE0); return SUCCESS; } async command error_t HplUart0.disableRxIntr(){ CLR_BIT(UCSR0B, RXCIE0); return SUCCESS; } async command bool HplUart0.isTxEmpty(){ return READ_BIT(UCSR0A, TXC0); } async command bool HplUart0.isRxEmpty(){ return !READ_BIT(UCSR0A, RXC0); } async command uint8_t HplUart0.rx(){ return UDR0; } async command void HplUart0.tx(uint8_t data) { atomic{ UDR0 = data; SET_BIT(UCSR0A, TXC0); } } AVR_ATOMIC_HANDLER(SIG_USART0_RECV) { if (READ_BIT(UCSR0A, RXC0)) { signal HplUart0.rxDone(UDR0); } call PlatformInterrupt.postAmble(); } AVR_NONATOMIC_HANDLER(SIG_USART0_TRANS) { signal HplUart0.txDone(); call PlatformInterrupt.postAmble(); } command error_t Uart1Init.init() { Atm128UartMode_t mode; Atm128UartStatus_t stts; Atm128UartControl_t ctrl; uint16_t ubrr1; ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0}; stts.bits = (struct Atm128_UCSRA_t) {u2x:1}; mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS}; ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE); UBRR1L = ubrr1; UBRR1H = ubrr1 >> 8; UCSR1A = stts.flat; UCSR1C = mode.flat; UCSR1B = ctrl.flat; return SUCCESS; } command error_t Uart1TxControl.start() { SET_BIT(UCSR1B, TXEN1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1TxControl.stop() { CLR_BIT(UCSR1B, TXEN1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.start() { SET_BIT(UCSR1B, RXEN1); call McuPowerState.update(); return SUCCESS; } command error_t Uart1RxControl.stop() { CLR_BIT(UCSR1B, RXEN1); call McuPowerState.update(); return SUCCESS; } async command error_t HplUart1.enableTxIntr() { SET_BIT(UCSR1A, TXC1); SET_BIT(UCSR1B, TXCIE1); return SUCCESS; } async command error_t HplUart1.disableTxIntr(){ CLR_BIT(UCSR1B, TXCIE1); return SUCCESS; } async command error_t HplUart1.enableRxIntr(){ SET_BIT(UCSR1B, RXCIE1); return SUCCESS; } async command error_t HplUart1.disableRxIntr(){ CLR_BIT(UCSR1B, RXCIE1); return SUCCESS; } async command bool HplUart1.isTxEmpty() { return READ_BIT(UCSR1A, TXC1); } async command bool HplUart1.isRxEmpty() { return !READ_BIT(UCSR1A, RXC1); } async command uint8_t HplUart1.rx(){ return UDR1; } async command void HplUart1.tx(uint8_t data) { atomic{ UDR1 = data; SET_BIT(UCSR1A, TXC1); } } AVR_ATOMIC_HANDLER(SIG_USART1_RECV) { if (READ_BIT(UCSR1A, RXC1)) signal HplUart1.rxDone(UDR1); call PlatformInterrupt.postAmble(); } AVR_NONATOMIC_HANDLER(SIG_USART1_TRANS) { signal HplUart1.txDone(); call PlatformInterrupt.postAmble(); } default async event void HplUart0.txDone() {} default async event void HplUart0.rxDone(uint8_t data) {} default async event void HplUart1.txDone() {} default async event void HplUart1.rxDone(uint8_t data) {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/cc1000/000077500000000000000000000000001207233610700215105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/cc1000/CC1000ActiveMessageC.nc000066400000000000000000000064251207233610700253730ustar00rootroot00000000000000// $Id: CC1000ActiveMessageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * The Active Message layer for the CC1000 radio. This configuration * just layers the AM dispatch (CC1000ActiveMessageM) on top of the * underlying CC1000 radio packet (CC1000CsmaRadioC), which is * inherently an AM packet (acknowledgements based on AM destination * addr and group). * * @author Philip Levis * @date June 19 2005 */ configuration CC1000ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet; interface PacketAcknowledgements; interface LinkPacketMetadata; } } implementation { components CC1000ActiveMessageP as AM, CC1000CsmaRadioC as Radio; components ActiveMessageAddressC as Address; SplitControl = Radio; Packet = Radio; PacketAcknowledgements = Radio; LinkPacketMetadata = Radio; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; AMPacket = AM; AM.SubSend -> Radio.Send; AM.SubReceive -> Radio.Receive; AM.amAddress -> Address; AM.Packet -> Radio; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/cc1000/CC1000ActiveMessageP.nc000066400000000000000000000142511207233610700254040ustar00rootroot00000000000000// $Id: CC1000ActiveMessageP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Implementation component for CC1000ActiveMessageC. * * @author Philip Levis * @date June 19 2006 */ module CC1000ActiveMessageP @safe() { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; } uses { interface Send as SubSend; interface Receive as SubReceive; interface Packet as Packet; command am_addr_t amAddress(); } } implementation { cc1000_header_t* ONE getHeader(message_t* ONE amsg) { return TCAST(cc1000_header_t* ONE, (uint8_t*)amsg + offsetof(message_t, data) - sizeof(cc1000_header_t)); } cc1000_footer_t *getFooter(message_t *amsg) { return (cc1000_footer_t *)(amsg->footer); } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* amsg, uint8_t len) { cc1000_header_t* header = getHeader(amsg); header->type = id; header->dest = addr; header->source = call AMPacket.address(); header->group = TOS_AM_GROUP; return call SubSend.send(amsg, len); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } event void SubSend.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } /* Receiving a packet */ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { cc1000_footer_t* msg_footer = getFooter(msg); if(msg_footer->crc == 1) { if (call AMPacket.isForMe(msg)) { return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); } else { return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); } } return msg; } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { cc1000_header_t* header = getHeader(amsg); return header->dest; } command am_addr_t AMPacket.source(message_t* amsg) { cc1000_header_t* header = getHeader(amsg); return header->source; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { cc1000_header_t* header = getHeader(amsg); header->dest = addr; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { cc1000_header_t* header = getHeader(amsg); header->source = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { cc1000_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t type) { cc1000_header_t* header = getHeader(amsg); header->type = type; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { cc1000_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.group(message_t* msg) { cc1000_header_t* header = getHeader(msg); return header->group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal ReceiveDefault.receive[id](msg, payload, len); } default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal SnoopDefault.receive[id](msg, payload, len); } default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/cc2420/000077500000000000000000000000001207233610700215175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/cc2420/CC2420ActiveMessageC.nc000066400000000000000000000075401207233610700254100ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The Active Message layer for the CC2420 radio. This configuration * just layers the AM dispatch (CC2420ActiveMessageM) on top of the * underlying CC2420 radio packet (CC2420CsmaCsmaCC), which is * inherently an AM packet (acknowledgements based on AM destination * addr and group). Note that snooping may not work, due to CC2420 * early packet rejection if acknowledgements are enabled. * * @author Philip Levis * @author David Moss * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:51 $ */ #include "CC2420.h" #include "AM.h" #include "Ieee154.h" #ifdef IEEE154FRAMES_ENABLED #error "CC2420 AM layer cannot work when IEEE 802.15.4 frames only are used" #endif configuration CC2420ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet; interface CC2420Packet; interface PacketAcknowledgements; interface LinkPacketMetadata; interface RadioBackoff[am_id_t amId]; interface LowPowerListening; interface PacketLink; interface SendNotifier[am_id_t amId]; } } implementation { enum { CC2420_AM_SEND_ID = unique(IEEE154_SEND_CLIENT), }; components CC2420RadioC as Radio; components CC2420ActiveMessageP as AM; components ActiveMessageAddressC; components CC2420CsmaC as CsmaC; components CC2420ControlC; components CC2420PacketC; SplitControl = Radio; RadioBackoff = AM; Packet = AM; AMSend = AM; SendNotifier = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; AMPacket = AM; PacketLink = Radio; LowPowerListening = Radio; CC2420Packet = Radio; PacketAcknowledgements = Radio; LinkPacketMetadata = Radio; // Radio resource for the AM layer AM.RadioResource -> Radio.Resource[CC2420_AM_SEND_ID]; AM.SubSend -> Radio.ActiveSend; AM.SubReceive -> Radio.ActiveReceive; AM.ActiveMessageAddress -> ActiveMessageAddressC; AM.CC2420Packet -> CC2420PacketC; AM.CC2420PacketBody -> CC2420PacketC; AM.CC2420Config -> CC2420ControlC; AM.SubBackoff -> CsmaC; components LedsC; AM.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/cc2420/CC2420ActiveMessageP.nc000066400000000000000000000246611207233610700254300ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Active message implementation on top of the CC2420 radio. This * implementation uses the 16-bit addressing mode of 802.15.4: the * only additional byte it adds is the AM id byte, as the first byte * of the data payload. * * @author Philip Levis * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:51 $ */ #include "CC2420.h" module CC2420ActiveMessageP @safe() { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet; interface SendNotifier[am_id_t id]; interface RadioBackoff[am_id_t id]; } uses { interface Send as SubSend; interface Receive as SubReceive; interface CC2420Packet; interface CC2420PacketBody; interface CC2420Config; interface ActiveMessageAddress; interface RadioBackoff as SubBackoff; interface Resource as RadioResource; interface Leds; } } implementation { uint16_t pending_length; message_t *pending_message = NULL; /***************** Resource event ****************/ event void RadioResource.granted() { uint8_t rc; cc2420_header_t* header = call CC2420PacketBody.getHeader( pending_message ); signal SendNotifier.aboutToSend[header->type](header->dest, pending_message); rc = call SubSend.send( pending_message, pending_length ); if (rc != SUCCESS) { call RadioResource.release(); signal AMSend.sendDone[header->type]( pending_message, rc ); } } /***************** AMSend Commands ****************/ command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { cc2420_header_t* header = call CC2420PacketBody.getHeader( msg ); if (len > call Packet.maxPayloadLength()) { return ESIZE; } header->type = id; header->dest = addr; header->destpan = call CC2420Config.getPanAddr(); header->src = call AMPacket.address(); header->fcf = ( 1 << IEEE154_FCF_INTRAPAN ) | ( IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE ) | ( IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE ) ; header->length = len + CC2420_SIZE; if (call RadioResource.immediateRequest() == SUCCESS) { error_t rc; signal SendNotifier.aboutToSend[id](addr, msg); rc = call SubSend.send( msg, len ); if (rc != SUCCESS) { call RadioResource.release(); } return rc; } else { pending_length = len; pending_message = msg; return call RadioResource.request(); } } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } /***************** AMPacket Commands ****************/ command am_addr_t AMPacket.address() { return call ActiveMessageAddress.amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); return header->dest; } command am_addr_t AMPacket.source(message_t* amsg) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); return header->src; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); header->dest = addr; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t type) { cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg); header->type = type; } command am_group_t AMPacket.group(message_t* amsg) { return (call CC2420PacketBody.getHeader(amsg))->destpan; } command void AMPacket.setGroup(message_t* amsg, am_group_t grp) { // Overridden intentionally when we send() (call CC2420PacketBody.getHeader(amsg))->destpan = grp; } command am_group_t AMPacket.localGroup() { return call CC2420Config.getPanAddr(); } /***************** Packet Commands ****************/ command void Packet.clear(message_t* msg) { memset(call CC2420PacketBody.getHeader(msg), 0x0, sizeof(cc2420_header_t)); memset(call CC2420PacketBody.getMetadata(msg), 0x0, sizeof(cc2420_metadata_t)); } command uint8_t Packet.payloadLength(message_t* msg) { return (call CC2420PacketBody.getHeader(msg))->length - CC2420_SIZE; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { (call CC2420PacketBody.getHeader(msg))->length = len + CC2420_SIZE; } command uint8_t Packet.maxPayloadLength() { return call SubSend.maxPayloadLength(); } command void* Packet.getPayload(message_t* msg, uint8_t len) { return call SubSend.getPayload(msg, len); } /***************** SubSend Events ****************/ event void SubSend.sendDone(message_t* msg, error_t result) { call RadioResource.release(); signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } /***************** SubReceive Events ****************/ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { if (call AMPacket.isForMe(msg)) { return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); } else { return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); } } /***************** ActiveMessageAddress Events ****************/ async event void ActiveMessageAddress.changed() { } /***************** CC2420Config Events ****************/ event void CC2420Config.syncDone( error_t error ) { } /***************** RadioBackoff ***********************/ async event void SubBackoff.requestInitialBackoff(message_t *msg) { signal RadioBackoff.requestInitialBackoff[(TCAST(cc2420_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg); } async event void SubBackoff.requestCongestionBackoff(message_t *msg) { signal RadioBackoff.requestCongestionBackoff[(TCAST(cc2420_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg); } async event void SubBackoff.requestCca(message_t *msg) { // Lower layers than this do not configure the CCA settings signal RadioBackoff.requestCca[(TCAST(cc2420_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg); } async command void RadioBackoff.setInitialBackoff[am_id_t amId](uint16_t backoffTime) { call SubBackoff.setInitialBackoff(backoffTime); } /** * Must be called within a requestCongestionBackoff event * @param backoffTime the amount of time in some unspecified units to backoff */ async command void RadioBackoff.setCongestionBackoff[am_id_t amId](uint16_t backoffTime) { call SubBackoff.setCongestionBackoff(backoffTime); } /** * Enable CCA for the outbound packet. Must be called within a requestCca * event * @param ccaOn TRUE to enable CCA, which is the default. */ async command void RadioBackoff.setCca[am_id_t amId](bool useCca) { call SubBackoff.setCca(useCca); } /***************** Defaults ****************/ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal ReceiveDefault.receive[id](msg, payload, len); } default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal SnoopDefault.receive[id](msg, payload, len); } default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { call RadioResource.release(); } default event void SendNotifier.aboutToSend[am_id_t amId](am_addr_t addr, message_t *msg) { } default async event void RadioBackoff.requestInitialBackoff[am_id_t id]( message_t *msg) { } default async event void RadioBackoff.requestCongestionBackoff[am_id_t id]( message_t *msg) { } default async event void RadioBackoff.requestCca[am_id_t id]( message_t *msg) { } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/m16c60/000077500000000000000000000000001207233610700215365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/m16c60/chip_thread.h000066400000000000000000000163031207233610700241640ustar00rootroot00000000000000/* * Copyright (c) 2009 Communication Group and Eislab at * Lulea University of Technology * * Contact: Laurynas Riliskis, LTU * Mail: laurynas.riliskis@ltu.se * All rights reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Communication Group at Lulea University of Technology * nor the names of its contributors may be used to endorse or promote * products derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This file contains M16c/60 mcu-specific routines for implementing * threads in TinyOS * * @author Henrik Makitaavola * @author Kevin Klues */ typedef struct thread_regs { uint16_t r0; uint16_t r1; uint16_t r2; uint16_t r3; uint16_t a0; uint16_t a1; uint16_t fb; uint16_t flg; uint16_t mem0; uint16_t mem2; uint16_t mem4; uint16_t mem6; uint16_t mem8; uint16_t mem10; uint16_t mem12; uint16_t mem14; } thread_regs_t; /** * Memory is addressed by 16 bits on M16c/60 but because * is can be addressed in 8 bit units we typedef the * stack pointer as a uint8_t. */ typedef uint8_t* stack_ptr_t; #define STACK_TOP(stack, size) \ (&(((uint8_t*)stack)[size - 1])) //Save stack pointer #define SAVE_STACK_PTR(t) \ asm volatile ("stc sp, %0": "=r"(t->stack_ptr)); //Save status register #define SAVE_STATUS(t) \ asm volatile ("stc flg, %0": "=r"(t->regs.flg)); //Save General Purpose Registers #define SAVE_GPR(t) \ asm volatile ("mov.w r0, %0 \n\t" : "=r" ((t)->regs.r0) : ); \ asm volatile ("mov.w r1, %0 \n\t" : "=r" ((t)->regs.r1) : ); \ asm volatile ("mov.w r2, %0 \n\t" : "=r" ((t)->regs.r2) : ); \ asm volatile ("mov.w r3, %0 \n\t" : "=r" ((t)->regs.r3) : ); \ asm volatile ("mov.w a0, %0 \n\t" : "=r" ((t)->regs.a0) : ); \ asm volatile ("mov.w a1, %0 \n\t" : "=r" ((t)->regs.a1) : ); \ asm volatile ("stc fb, %0 \n\t" : "=r" ((t)->regs.fb) : ); \ asm volatile ("mov.w mem0, %0 \n\t" : "=r" ((t)->regs.mem0) : ); \ asm volatile ("mov.w mem2, %0 \n\t" : "=r" ((t)->regs.mem2) : ); \ asm volatile ("mov.w mem4, %0 \n\t" : "=r" ((t)->regs.mem4) : ); \ asm volatile ("mov.w mem6, %0 \n\t" : "=r" ((t)->regs.mem6) : ); \ asm volatile ("mov.w mem8, %0 \n\t" : "=r" ((t)->regs.mem8) : ); \ asm volatile ("mov.w mem10, %0 \n\t" : "=r" ((t)->regs.mem10) : ); \ asm volatile ("mov.w mem12, %0 \n\t" : "=r" ((t)->regs.mem12) : ); \ asm volatile ("mov.w mem14, %0 \n\t" : "=r" ((t)->regs.mem14) : ); //Restore stack pointer #define RESTORE_STACK_PTR(t) \ asm volatile ("ldc %0, sp \n\t" :: "r" ((t)->stack_ptr)) //Restore status register #define RESTORE_STATUS(t) \ asm volatile ("ldc %0, flg \n\t" :: "r" (t->regs.flg) ); //Restore the general purpose registers #define RESTORE_GPR(t) \ asm volatile ("mov.w %0, r0 \n\t" :: "r" ((t)->regs.r0) ); \ asm volatile ("mov.w %0, r1 \n\t" :: "r" ((t)->regs.r1) ); \ asm volatile ("mov.w %0, r2 \n\t" :: "r" ((t)->regs.r2) ); \ asm volatile ("mov.w %0, r3 \n\t" :: "r" ((t)->regs.r3) ); \ asm volatile ("mov.w %0, a0 \n\t" :: "r" ((t)->regs.a0) ); \ asm volatile ("mov.w %0, a1 \n\t" :: "r" ((t)->regs.a1) ); \ asm volatile ("ldc %0, fb \n\t" :: "r" ((t)->regs.fb) ); \ asm volatile ("mov.w %0, mem0 \n\t" :: "r" ((t)->regs.mem0) ); \ asm volatile ("mov.w %0, mem2 \n\t" :: "r" ((t)->regs.mem2) ); \ asm volatile ("mov.w %0, mem4 \n\t" :: "r" ((t)->regs.mem4) ); \ asm volatile ("mov.w %0, mem6 \n\t" :: "r" ((t)->regs.mem6) ); \ asm volatile ("mov.w %0, mem8 \n\t" :: "r" ((t)->regs.mem8) ); \ asm volatile ("mov.w %0, mem10 \n\t" :: "r" ((t)->regs.mem10) ); \ asm volatile ("mov.w %0, mem12 \n\t" :: "r" ((t)->regs.mem12) ); \ asm volatile ("mov.w %0, mem14 \n\t" :: "r" ((t)->regs.mem14) ); #define SAVE_TCB(t) \ SAVE_GPR(t); \ SAVE_STATUS(t); \ SAVE_STACK_PTR(t) #define RESTORE_TCB(t) \ RESTORE_STACK_PTR(t); \ RESTORE_STATUS(t); \ RESTORE_GPR(t) #define SWITCH_CONTEXTS(from, to) \ SAVE_TCB(from); \ RESTORE_TCB(to) #define PREPARE_THREAD(t, start_function) \ t->stack_ptr[0] = 0; \ t->stack_ptr[-1] = (uint8_t)((uint16_t)&start_function >> 8) & 0xFF; \ t->stack_ptr[-2] = (uint8_t)((uint16_t)&start_function) & 0xFF; \ t->stack_ptr -= 2; \ SAVE_STATUS(t) tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/000077500000000000000000000000001207233610700216505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplAdc12P.nc000066400000000000000000000104141207233610700236100ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-12 14:02:24 $ * @author: Jan Hauer * ======================================================================== */ /** * The HplAdc12 interface exports low-level access to the ADC12 registers * of the MSP430 MCU. * * @author Jan Hauer * @see Please refer to TEP 101 for more information about this component and its * intended use. */ module HplAdc12P { provides interface HplAdc12; uses interface PlatformInterrupt; } implementation { MSP430REG_NORACE(ADC12CTL0); MSP430REG_NORACE(ADC12CTL1); MSP430REG_NORACE(ADC12IFG); MSP430REG_NORACE(ADC12IE); MSP430REG_NORACE(ADC12IV); // SFRs are accessed directly or cast to a pointer, both works fine // (we don't access all SFRs directly, because that would result in // much higher memory footprint) async command void HplAdc12.setCtl0(adc12ctl0_t control0){ ADC12CTL0 = *((uint16_t*) &control0); } async command void HplAdc12.setCtl1(adc12ctl1_t control1){ ADC12CTL1 = *((uint16_t*) &control1); } async command adc12ctl0_t HplAdc12.getCtl0(){ return *((adc12ctl0_t*) &ADC12CTL0); } async command adc12ctl1_t HplAdc12.getCtl1(){ return *((adc12ctl1_t*) &ADC12CTL1); } async command void HplAdc12.setMCtl(uint8_t i, adc12memctl_t memControl){ uint8_t *memCtlPtr = (uint8_t*) ADC12MCTL; memCtlPtr += i; *memCtlPtr = *(uint8_t*)&memControl; } async command adc12memctl_t HplAdc12.getMCtl(uint8_t i){ adc12memctl_t x = {inch: 0, sref: 0, eos: 0 }; uint8_t *memCtlPtr = (uint8_t*) ADC12MCTL; memCtlPtr += i; x = *(adc12memctl_t*) memCtlPtr; return x; } async command uint16_t HplAdc12.getMem(uint8_t i){ return *((uint16_t*) ADC12MEM + i); } async command void HplAdc12.setIEFlags(uint16_t mask){ ADC12IE = mask; } async command uint16_t HplAdc12.getIEFlags(){ return (uint16_t) ADC12IE; } async command void HplAdc12.resetIFGs(){ ADC12IV = 0; ADC12IFG = 0; } async command void HplAdc12.startConversion(){ ADC12CTL0 |= ADC12ON; ADC12CTL0 |= (ADC12SC + ENC); } async command void HplAdc12.stopConversion(){ // stop conversion mode immediately, conversion data is unreliable ADC12CTL1 &= ~(CONSEQ0 | CONSEQ1); ADC12CTL0 &= ~(ADC12SC + ENC); ADC12CTL0 &= ~(ADC12ON); } async command void HplAdc12.enableConversion(){ ADC12CTL0 |= ENC; } async command bool HplAdc12.isBusy(){ return ADC12CTL1 & ADC12BUSY; } TOSH_SIGNAL(ADC_VECTOR) { signal HplAdc12.conversionDone(ADC12IV); call PlatformInterrupt.postAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430DmaC.nc000066400000000000000000000103401207233610700243470ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @author Jonathan Hui * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $ */ configuration HplMsp430DmaC { provides interface HplMsp430DmaControl as Control; provides interface HplMsp430DmaChannel as Channel0; provides interface HplMsp430DmaChannel as Channel1; provides interface HplMsp430DmaChannel as Channel2; } implementation { components HplMsp430DmaP; components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_, DMA0SZ_, DMA0TSEL_MASK, DMA0TSEL_SHIFT ) as Dma0; components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_, DMA1SZ_, DMA1TSEL_MASK, DMA1TSEL_SHIFT ) as Dma1; components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_, DMA2SZ_, DMA2TSEL_MASK, DMA2TSEL_SHIFT ) as Dma2; Control = HplMsp430DmaP; Channel0 = Dma0; Channel1 = Dma1; Channel2 = Dma2; Dma0.Interrupt -> HplMsp430DmaP; Dma1.Interrupt -> HplMsp430DmaP; Dma2.Interrupt -> HplMsp430DmaP; components PlatformInterruptC; HplMsp430DmaP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430DmaP.nc000066400000000000000000000106751207233610700243770ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Ben Greenstein * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $ */ module HplMsp430DmaP { provides interface HplMsp430DmaControl as DmaControl; provides interface HplMsp430DmaInterrupt as Interrupt; uses interface PlatformInterrupt; } implementation { MSP430REG_NORACE( DMACTL0 ); MSP430REG_NORACE( DMACTL1 ); TOSH_SIGNAL( DACDMA_VECTOR ) { signal Interrupt.fired(); call PlatformInterrupt.postAmble(); } async command void DmaControl.setOnFetch(){ DMACTL1 |= DMAONFETCH; } async command void DmaControl.clearOnFetch(){ DMACTL1 &= ~DMAONFETCH; } async command void DmaControl.setRoundRobin(){ DMACTL1 |= ROUNDROBIN; } async command void DmaControl.clearRoundRobin(){ DMACTL1 &= ~ROUNDROBIN; } async command void DmaControl.setENNMI(){ DMACTL1 |= ENNMI; } async command void DmaControl.clearENNMI(){ DMACTL1 &= ~ENNMI; } async command void DmaControl.setState(dma_state_t s){ DMACTL1 = *(int*)&s; } async command dma_state_t DmaControl.getState(){ dma_state_t s; s = *(dma_state_t*)&DMACTL1; return s; } async command void DmaControl.reset(){ DMACTL0 = 0; DMACTL1 = 0; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptC.nc000066400000000000000000000072261207233610700256530ustar00rootroot00000000000000 /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL for the TI MSP430 family of microprocessors. This provides an * abstraction for GPIO interrupts. * * @author Joe Polastre */ configuration HplMsp430InterruptC { #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) provides interface HplMsp430Interrupt as Port10; provides interface HplMsp430Interrupt as Port11; provides interface HplMsp430Interrupt as Port12; provides interface HplMsp430Interrupt as Port13; provides interface HplMsp430Interrupt as Port14; provides interface HplMsp430Interrupt as Port15; provides interface HplMsp430Interrupt as Port16; provides interface HplMsp430Interrupt as Port17; #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) provides interface HplMsp430Interrupt as Port20; provides interface HplMsp430Interrupt as Port21; provides interface HplMsp430Interrupt as Port22; provides interface HplMsp430Interrupt as Port23; provides interface HplMsp430Interrupt as Port24; provides interface HplMsp430Interrupt as Port25; provides interface HplMsp430Interrupt as Port26; provides interface HplMsp430Interrupt as Port27; #endif } implementation { components HplMsp430InterruptP as HplInterruptP; #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) Port10 = HplInterruptP.Port10; Port11 = HplInterruptP.Port11; Port12 = HplInterruptP.Port12; Port13 = HplInterruptP.Port13; Port14 = HplInterruptP.Port14; Port15 = HplInterruptP.Port15; Port16 = HplInterruptP.Port16; Port17 = HplInterruptP.Port17; #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) Port20 = HplInterruptP.Port20; Port21 = HplInterruptP.Port21; Port22 = HplInterruptP.Port22; Port23 = HplInterruptP.Port23; Port24 = HplInterruptP.Port24; Port25 = HplInterruptP.Port25; Port26 = HplInterruptP.Port26; Port27 = HplInterruptP.Port27; #endif components PlatformInterruptC; HplInterruptP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptNMIC.nc000066400000000000000000000042301207233610700262070ustar00rootroot00000000000000 /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * HPL for the TI MSP430 family of microprocessors. This provides an * abstraction for non-maskable interrupts. * * @author Joe Polastre */ configuration HplMsp430InterruptNMIC { provides interface HplMsp430Interrupt as NMI; provides interface HplMsp430Interrupt as OF; provides interface HplMsp430Interrupt as ACCV; } implementation { components HplMsp430InterruptNMIP as HplInterruptP; NMI = HplInterruptP.NMI; OF = HplInterruptP.OF; ACCV = HplInterruptP.ACCV; components PlatformInterruptC; HplInterruptP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptNMIP.nc000066400000000000000000000075771207233610700262450ustar00rootroot00000000000000 /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Joe Polastre */ module HplMsp430InterruptNMIP { provides interface HplMsp430Interrupt as NMI; provides interface HplMsp430Interrupt as OF; provides interface HplMsp430Interrupt as ACCV; uses interface PlatformInterrupt; } implementation { TOSH_SIGNAL(NMI_VECTOR) { volatile int n = IFG1; if (n & NMIIFG) { signal NMI.fired(); } else if (n & OFIFG) { signal OF.fired(); } else if (FCTL3 & ACCVIFG) { signal ACCV.fired(); } call PlatformInterrupt.postAmble(); } default async event void NMI.fired() { call NMI.clear(); } default async event void OF.fired() { call OF.clear(); } default async event void ACCV.fired() { call ACCV.clear(); } async command void NMI.enable() { volatile uint16_t _watchdog; atomic { _watchdog = WDTCTL; _watchdog = WDTPW | (_watchdog & 0x0FF); _watchdog |= WDTNMI; WDTCTL = _watchdog; IE1 |= NMIIE; } } async command void OF.enable() { atomic IE1 |= OFIE; } async command void ACCV.enable() { atomic IE1 |= ACCVIE; } async command void NMI.disable() { volatile uint16_t _watchdog; atomic { _watchdog = WDTCTL; _watchdog = WDTPW | (_watchdog & 0x0FF); _watchdog &= ~WDTNMI; WDTCTL = _watchdog; IE1 &= ~NMIIE; } } async command void OF.disable() { atomic IE1 &= ~OFIE; } async command void ACCV.disable() { atomic IE1 &= ~ACCVIE; } async command void NMI.clear() { atomic IFG1 &= ~NMIIFG; } async command void OF.clear() { atomic IFG1 &= ~OFIFG; } async command void ACCV.clear() { atomic FCTL3 &= ~ACCVIFG; } async command bool NMI.getValue() { bool b; atomic b=(IFG1 & NMIIFG) & 0x01; return b; } async command bool OF.getValue() { bool b; atomic b=(IFG1 & OFIFG) & 0x01; return b; } async command bool ACCV.getValue() { bool b; atomic b=(FCTL3 & ACCVIFG) & 0x01; return b; } async command void NMI.edge(bool l2h) { volatile uint16_t _watchdog; atomic { _watchdog = WDTCTL; _watchdog = WDTPW | (_watchdog & 0x0FF); if (l2h) _watchdog &= ~(WDTNMIES); else _watchdog |= (WDTNMIES); WDTCTL = _watchdog; } } // edge does not apply to oscillator faults async command void OF.edge(bool l2h) { } // edge does not apply to flash access violations async command void ACCV.edge(bool l2h) { } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptP.nc000066400000000000000000000266321207233610700256720ustar00rootroot00000000000000 /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Joe Polastre */ module HplMsp430InterruptP { #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) provides interface HplMsp430Interrupt as Port10; provides interface HplMsp430Interrupt as Port11; provides interface HplMsp430Interrupt as Port12; provides interface HplMsp430Interrupt as Port13; provides interface HplMsp430Interrupt as Port14; provides interface HplMsp430Interrupt as Port15; provides interface HplMsp430Interrupt as Port16; provides interface HplMsp430Interrupt as Port17; #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) provides interface HplMsp430Interrupt as Port20; provides interface HplMsp430Interrupt as Port21; provides interface HplMsp430Interrupt as Port22; provides interface HplMsp430Interrupt as Port23; provides interface HplMsp430Interrupt as Port24; provides interface HplMsp430Interrupt as Port25; provides interface HplMsp430Interrupt as Port26; provides interface HplMsp430Interrupt as Port27; #endif uses interface PlatformInterrupt; } implementation { #if defined(__msp430_have_port1) || defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__) TOSH_SIGNAL(PORT1_VECTOR) { volatile int n = P1IFG & P1IE; if (n & (1 << 0)) { signal Port10.fired(); } else if (n & (1 << 1)) { signal Port11.fired(); } else if (n & (1 << 2)) { signal Port12.fired(); } else if (n & (1 << 3)) { signal Port13.fired(); } else if (n & (1 << 4)) { signal Port14.fired(); } else if (n & (1 << 5)) { signal Port15.fired(); } else if (n & (1 << 6)) { signal Port16.fired(); } else if (n & (1 << 7)) { signal Port17.fired(); } call PlatformInterrupt.postAmble(); } default async event void Port10.fired() { call Port10.clear(); } default async event void Port11.fired() { call Port11.clear(); } default async event void Port12.fired() { call Port12.clear(); } default async event void Port13.fired() { call Port13.clear(); } default async event void Port14.fired() { call Port14.clear(); } default async event void Port15.fired() { call Port15.clear(); } default async event void Port16.fired() { call Port16.clear(); } default async event void Port17.fired() { call Port17.clear(); } async command void Port10.enable() { P1IE |= (1 << 0); } async command void Port11.enable() { P1IE |= (1 << 1); } async command void Port12.enable() { P1IE |= (1 << 2); } async command void Port13.enable() { P1IE |= (1 << 3); } async command void Port14.enable() { P1IE |= (1 << 4); } async command void Port15.enable() { P1IE |= (1 << 5); } async command void Port16.enable() { P1IE |= (1 << 6); } async command void Port17.enable() { P1IE |= (1 << 7); } async command void Port10.disable() { P1IE &= ~(1 << 0); } async command void Port11.disable() { P1IE &= ~(1 << 1); } async command void Port12.disable() { P1IE &= ~(1 << 2); } async command void Port13.disable() { P1IE &= ~(1 << 3); } async command void Port14.disable() { P1IE &= ~(1 << 4); } async command void Port15.disable() { P1IE &= ~(1 << 5); } async command void Port16.disable() { P1IE &= ~(1 << 6); } async command void Port17.disable() { P1IE &= ~(1 << 7); } async command void Port10.clear() { P1IFG &= ~(1 << 0); } async command void Port11.clear() { P1IFG &= ~(1 << 1); } async command void Port12.clear() { P1IFG &= ~(1 << 2); } async command void Port13.clear() { P1IFG &= ~(1 << 3); } async command void Port14.clear() { P1IFG &= ~(1 << 4); } async command void Port15.clear() { P1IFG &= ~(1 << 5); } async command void Port16.clear() { P1IFG &= ~(1 << 6); } async command void Port17.clear() { P1IFG &= ~(1 << 7); } async command bool Port10.getValue() { bool b; atomic b=(P1IN >> 0) & 1; return b; } async command bool Port11.getValue() { bool b; atomic b=(P1IN >> 1) & 1; return b; } async command bool Port12.getValue() { bool b; atomic b=(P1IN >> 2) & 1; return b; } async command bool Port13.getValue() { bool b; atomic b=(P1IN >> 3) & 1; return b; } async command bool Port14.getValue() { bool b; atomic b=(P1IN >> 4) & 1; return b; } async command bool Port15.getValue() { bool b; atomic b=(P1IN >> 5) & 1; return b; } async command bool Port16.getValue() { bool b; atomic b=(P1IN >> 6) & 1; return b; } async command bool Port17.getValue() { bool b; atomic b=(P1IN >> 7) & 1; return b; } async command void Port10.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 0); else P1IES |= (1 << 0); } } async command void Port11.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 1); else P1IES |= (1 << 1); } } async command void Port12.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 2); else P1IES |= (1 << 2); } } async command void Port13.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 3); else P1IES |= (1 << 3); } } async command void Port14.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 4); else P1IES |= (1 << 4); } } async command void Port15.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 5); else P1IES |= (1 << 5); } } async command void Port16.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 6); else P1IES |= (1 << 6); } } async command void Port17.edge(bool l2h) { atomic { if (l2h) P1IES &= ~(1 << 7); else P1IES |= (1 << 7); } } #endif #if defined(__msp430_have_port2) || defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__) TOSH_SIGNAL(PORT2_VECTOR) { volatile int n = P2IFG & P2IE; if (n & (1 << 0)) { signal Port20.fired(); } else if (n & (1 << 1)) { signal Port21.fired(); } else if (n & (1 << 2)) { signal Port22.fired(); } else if (n & (1 << 3)) { signal Port23.fired(); } else if (n & (1 << 4)) { signal Port24.fired(); } else if (n & (1 << 5)) { signal Port25.fired(); } else if (n & (1 << 6)) { signal Port26.fired(); } else if (n & (1 << 7)) { signal Port27.fired(); } call PlatformInterrupt.postAmble(); } default async event void Port20.fired() { call Port20.clear(); } default async event void Port21.fired() { call Port21.clear(); } default async event void Port22.fired() { call Port22.clear(); } default async event void Port23.fired() { call Port23.clear(); } default async event void Port24.fired() { call Port24.clear(); } default async event void Port25.fired() { call Port25.clear(); } default async event void Port26.fired() { call Port26.clear(); } default async event void Port27.fired() { call Port27.clear(); } async command void Port20.enable() { P2IE |= (1 << 0); } async command void Port21.enable() { P2IE |= (1 << 1); } async command void Port22.enable() { P2IE |= (1 << 2); } async command void Port23.enable() { P2IE |= (1 << 3); } async command void Port24.enable() { P2IE |= (1 << 4); } async command void Port25.enable() { P2IE |= (1 << 5); } async command void Port26.enable() { P2IE |= (1 << 6); } async command void Port27.enable() { P2IE |= (1 << 7); } async command void Port20.disable() { P2IE &= ~(1 << 0); } async command void Port21.disable() { P2IE &= ~(1 << 1); } async command void Port22.disable() { P2IE &= ~(1 << 2); } async command void Port23.disable() { P2IE &= ~(1 << 3); } async command void Port24.disable() { P2IE &= ~(1 << 4); } async command void Port25.disable() { P2IE &= ~(1 << 5); } async command void Port26.disable() { P2IE &= ~(1 << 6); } async command void Port27.disable() { P2IE &= ~(1 << 7); } async command void Port20.clear() { P2IFG &= ~(1 << 0); } async command void Port21.clear() { P2IFG &= ~(1 << 1); } async command void Port22.clear() { P2IFG &= ~(1 << 2); } async command void Port23.clear() { P2IFG &= ~(1 << 3); } async command void Port24.clear() { P2IFG &= ~(1 << 4); } async command void Port25.clear() { P2IFG &= ~(1 << 5); } async command void Port26.clear() { P2IFG &= ~(1 << 6); } async command void Port27.clear() { P2IFG &= ~(1 << 7); } async command bool Port20.getValue() { bool b; atomic b=(P2IN >> 0) & 1; return b; } async command bool Port21.getValue() { bool b; atomic b=(P2IN >> 1) & 1; return b; } async command bool Port22.getValue() { bool b; atomic b=(P2IN >> 2) & 1; return b; } async command bool Port23.getValue() { bool b; atomic b=(P2IN >> 3) & 1; return b; } async command bool Port24.getValue() { bool b; atomic b=(P2IN >> 4) & 1; return b; } async command bool Port25.getValue() { bool b; atomic b=(P2IN >> 5) & 1; return b; } async command bool Port26.getValue() { bool b; atomic b=(P2IN >> 6) & 1; return b; } async command bool Port27.getValue() { bool b; atomic b=(P2IN >> 7) & 1; return b; } async command void Port20.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 0); else P2IES |= (1 << 0); } } async command void Port21.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 1); else P2IES |= (1 << 1); } } async command void Port22.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 2); else P2IES |= (1 << 2); } } async command void Port23.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 3); else P2IES |= (1 << 3); } } async command void Port24.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 4); else P2IES |= (1 << 4); } } async command void Port25.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 5); else P2IES |= (1 << 5); } } async command void Port26.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 6); else P2IES |= (1 << 6); } } async command void Port27.edge(bool l2h) { atomic { if (l2h) P2IES &= ~(1 << 7); else P2IES |= (1 << 7); } } #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0C.nc000066400000000000000000000077351207233610700250420ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An HPL abstraction of USART0 on the MSP430. * * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $ */ #include "msp430usart.h" configuration HplMsp430Usart0C { provides interface HplMsp430Usart; provides interface HplMsp430UsartInterrupts; provides interface HplMsp430I2CInterrupts; } implementation { components HplMsp430Usart0P as HplUsartP; HplMsp430Usart = HplUsartP; HplMsp430UsartInterrupts = HplUsartP; HplMsp430I2CInterrupts = HplUsartP; components HplMsp430GeneralIOC as GIO; HplUsartP.SIMO -> GIO.SIMO0; HplUsartP.SOMI -> GIO.SOMI0; HplUsartP.UCLK -> GIO.UCLK0; HplUsartP.URXD -> GIO.URXD0; HplUsartP.UTXD -> GIO.UTXD0; components PlatformInterruptC; HplUsartP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0P.nc000066400000000000000000000260141207233610700250460ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usart.h" /** * Implementation of USART0 lowlevel functionality - stateless. * Setting a mode will by default disable USART-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui * @author: Vlado Handziski * @author: Joe Polastre * @author: Philipp Huppertz * @version $Revision: 1.1 $ $Date: 2008-06-12 14:02:25 $ */ module HplMsp430Usart0P { provides interface HplMsp430Usart as Usart; provides interface HplMsp430UsartInterrupts as Interrupts; provides interface HplMsp430I2CInterrupts as I2CInterrupts; uses interface HplMsp430I2C as HplI2C; uses interface HplMsp430GeneralIO as SIMO; uses interface HplMsp430GeneralIO as SOMI; uses interface HplMsp430GeneralIO as UCLK; uses interface HplMsp430GeneralIO as URXD; uses interface HplMsp430GeneralIO as UTXD; uses interface PlatformInterrupt; } implementation { MSP430REG_NORACE(IE1); MSP430REG_NORACE(ME1); MSP430REG_NORACE(IFG1); MSP430REG_NORACE(U0TCTL); MSP430REG_NORACE(U0RCTL); MSP430REG_NORACE(U0TXBUF); TOSH_SIGNAL(UART0RX_VECTOR) { uint8_t temp = U0RXBUF; signal Interrupts.rxDone(temp); call PlatformInterrupt.postAmble(); } TOSH_SIGNAL(UART0TX_VECTOR) { if ( call HplI2C.isI2C() ) signal I2CInterrupts.fired(); else signal Interrupts.txDone(); call PlatformInterrupt.postAmble(); } async command void Usart.setUctl(msp430_uctl_t control) { U0CTL=uctl2int(control); } async command msp430_uctl_t Usart.getUctl() { return int2uctl(U0CTL); } async command void Usart.setUtctl(msp430_utctl_t control) { U0TCTL=utctl2int(control); } async command msp430_utctl_t Usart.getUtctl() { return int2utctl(U0TCTL); } async command void Usart.setUrctl(msp430_urctl_t control) { U0RCTL=urctl2int(control); } async command msp430_urctl_t Usart.getUrctl() { return int2urctl(U0RCTL); } async command void Usart.setUbr(uint16_t control) { atomic { U0BR0 = control & 0x00FF; U0BR1 = (control >> 8) & 0x00FF; } } async command uint16_t Usart.getUbr() { return (U0BR1 << 8) + U0BR0; } async command void Usart.setUmctl(uint8_t control) { U0MCTL=control; } async command uint8_t Usart.getUmctl() { return U0MCTL; } async command void Usart.resetUsart(bool reset) { if (reset) { U0CTL = SWRST; } else { CLR_FLAG(U0CTL, SWRST); } } async command bool Usart.isSpi() { atomic { return (U0CTL & SYNC) && (ME1 & USPIE0); } } async command bool Usart.isUart() { atomic { return !(U0CTL & SYNC) && ((ME1 & UTXE0) && (ME1 & URXE0)); } } async command bool Usart.isUartTx() { atomic { return !(U0CTL & SYNC) && (ME1 & UTXE0); } } async command bool Usart.isUartRx() { atomic { return !(U0CTL & SYNC) && (ME1 & URXE0); } } async command msp430_usartmode_t Usart.getMode() { if (call Usart.isUart()) return USART_UART; else if (call Usart.isUartRx()) return USART_UART_RX; else if (call Usart.isUartTx()) return USART_UART_TX; else if (call Usart.isSpi()) return USART_SPI; else if (call HplI2C.isI2C()) return USART_I2C; else return USART_NONE; } async command void Usart.enableUart() { atomic{ call UTXD.selectModuleFunc(); call URXD.selectModuleFunc(); } ME1 |= (UTXE0 | URXE0); // USART0 UART module enable } async command void Usart.disableUart() { atomic { ME1 &= ~(UTXE0 | URXE0); // USART0 UART module enable call UTXD.selectIOFunc(); call URXD.selectIOFunc(); } } async command void Usart.enableUartTx() { call UTXD.selectModuleFunc(); ME1 |= UTXE0; // USART0 UART Tx module enable } async command void Usart.disableUartTx() { ME1 &= ~UTXE0; // USART0 UART Tx module enable call UTXD.selectIOFunc(); } async command void Usart.enableUartRx() { call URXD.selectModuleFunc(); ME1 |= URXE0; // USART0 UART Rx module enable } async command void Usart.disableUartRx() { ME1 &= ~URXE0; // USART0 UART Rx module disable call URXD.selectIOFunc(); } async command void Usart.enableSpi() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } ME1 |= USPIE0; // USART0 SPI module enable } async command void Usart.disableSpi() { atomic { ME1 &= ~USPIE0; // USART0 SPI module disable call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configSpi(msp430_spi_union_config_t* config) { // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST; U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U0TCTL = config->spiRegisters.utctl; call Usart.setUbr(config->spiRegisters.ubr); call Usart.setUmctl(0x00); } async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call HplI2C.clearModeI2C(); call Usart.disableUart(); configSpi(config); call Usart.enableSpi(); call Usart.resetUsart(FALSE); call Usart.clrIntr(); call Usart.disableIntr(); } return; } void configUart(msp430_uart_union_config_t* config) { U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U0TCTL = config->uartRegisters.utctl; U0RCTL = config->uartRegisters.urctl; call Usart.setUbr(config->uartRegisters.ubr); call Usart.setUmctl(config->uartRegisters.umctl); } async command void Usart.setModeUart(msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call HplI2C.clearModeI2C(); call Usart.disableSpi(); configUart(config); if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) { call Usart.enableUart(); } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) { call Usart.disableUartTx(); call Usart.enableUartRx(); } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){ call Usart.disableUartRx(); call Usart.enableUartTx(); } else { call Usart.disableUart(); } call Usart.resetUsart(FALSE); call Usart.clrIntr(); call Usart.disableIntr(); } return; } async command bool Usart.isTxIntrPending(){ if (IFG1 & UTXIFG0){ return TRUE; } return FALSE; } async command bool Usart.isTxEmpty(){ if (U0TCTL & TXEPT) { return TRUE; } return FALSE; } async command bool Usart.isRxIntrPending(){ if (IFG1 & URXIFG0){ return TRUE; } return FALSE; } async command void Usart.clrTxIntr(){ IFG1 &= ~UTXIFG0; } async command void Usart.clrRxIntr() { IFG1 &= ~URXIFG0; } async command void Usart.clrIntr() { IFG1 &= ~(UTXIFG0 | URXIFG0); } async command void Usart.disableRxIntr() { IE1 &= ~URXIE0; } async command void Usart.disableTxIntr() { IE1 &= ~UTXIE0; } async command void Usart.disableIntr() { IE1 &= ~(UTXIE0 | URXIE0); } async command void Usart.enableRxIntr() { atomic { IFG1 &= ~URXIFG0; IE1 |= URXIE0; } } async command void Usart.enableTxIntr() { atomic { IFG1 &= ~UTXIFG0; IE1 |= UTXIE0; } } async command void Usart.enableIntr() { atomic { IFG1 &= ~(UTXIFG0 | URXIFG0); IE1 |= (UTXIE0 | URXIE0); } } async command void Usart.tx(uint8_t data) { atomic U0TXBUF = data; } async command uint8_t Usart.rx() { uint8_t value; atomic value = U0RXBUF; return value; } default async event void I2CInterrupts.fired() {} default async command bool HplI2C.isI2C() { return FALSE; } default async command void HplI2C.clearModeI2C() {}; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1C.nc000066400000000000000000000077201207233610700250350ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * An HPL abstraction of USART1 on the MSP430. * * @author Jonathan Hui * @author Joe Polastre * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $ */ #include "msp430usart.h" configuration HplMsp430Usart1C { provides interface AsyncStdControl; provides interface HplMsp430Usart; provides interface HplMsp430UsartInterrupts; } implementation { components HplMsp430Usart1P as HplUsartP; components HplMsp430GeneralIOC as GIO; AsyncStdControl = HplUsartP; HplMsp430Usart = HplUsartP; HplMsp430UsartInterrupts = HplUsartP; HplUsartP.SIMO -> GIO.SIMO1; HplUsartP.SOMI -> GIO.SOMI1; HplUsartP.UCLK -> GIO.UCLK1; HplUsartP.URXD -> GIO.URXD1; HplUsartP.UTXD -> GIO.UTXD1; components PlatformInterruptC; HplUsartP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1P.nc000066400000000000000000000252261207233610700250530ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arched Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Copyright (c) 2004-2005, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "msp430usart.h" /** * Implementation of USART1 lowlevel functionality - stateless. * Setting a mode will by default disable USART-Interrupts. * * @author: Jan Hauer * @author: Jonathan Hui * @author: Vlado Handziski * @author: Joe Polastre * @version $Revision: 1.1 $ $Date: 2008-06-12 14:02:26 $ */ module HplMsp430Usart1P { provides interface AsyncStdControl; provides interface HplMsp430Usart as Usart; provides interface HplMsp430UsartInterrupts as Interrupts; uses interface HplMsp430GeneralIO as SIMO; uses interface HplMsp430GeneralIO as SOMI; uses interface HplMsp430GeneralIO as UCLK; uses interface HplMsp430GeneralIO as URXD; uses interface HplMsp430GeneralIO as UTXD; uses interface PlatformInterrupt; } implementation { MSP430REG_NORACE(IE2); MSP430REG_NORACE(ME2); MSP430REG_NORACE(IFG2); MSP430REG_NORACE(U1TCTL); MSP430REG_NORACE(U1RCTL); MSP430REG_NORACE(U1TXBUF); TOSH_SIGNAL(UART1RX_VECTOR) { uint8_t temp = U1RXBUF; signal Interrupts.rxDone(temp); call PlatformInterrupt.postAmble(); } TOSH_SIGNAL(UART1TX_VECTOR) { signal Interrupts.txDone(); call PlatformInterrupt.postAmble(); } async command error_t AsyncStdControl.start() { return SUCCESS; } async command error_t AsyncStdControl.stop() { call Usart.disableSpi(); call Usart.disableUart(); return SUCCESS; } async command void Usart.setUctl(msp430_uctl_t control) { U1CTL=uctl2int(control); } async command msp430_uctl_t Usart.getUctl() { return int2uctl(U0CTL); } async command void Usart.setUtctl(msp430_utctl_t control) { U1TCTL=utctl2int(control); } async command msp430_utctl_t Usart.getUtctl() { return int2utctl(U1TCTL); } async command void Usart.setUrctl(msp430_urctl_t control) { U1RCTL=urctl2int(control); } async command msp430_urctl_t Usart.getUrctl() { return int2urctl(U1RCTL); } async command void Usart.setUbr(uint16_t control) { atomic { U1BR0 = control & 0x00FF; U1BR1 = (control >> 8) & 0x00FF; } } async command uint16_t Usart.getUbr() { return (U1BR1 << 8) + U1BR0; } async command void Usart.setUmctl(uint8_t control) { U1MCTL=control; } async command uint8_t Usart.getUmctl() { return U1MCTL; } async command void Usart.resetUsart(bool reset) { if (reset) U1CTL = SWRST; else CLR_FLAG(U1CTL, SWRST); } async command bool Usart.isSpi() { atomic { return (U1CTL & SYNC) && (ME2 & USPIE1); } } async command bool Usart.isUart() { atomic { return !(U1CTL & SYNC) && ((ME2 & UTXE1) && (ME2 & URXE1)); } } async command bool Usart.isUartTx() { atomic { return !(U1CTL & SYNC) && (ME2 & UTXE1); } } async command bool Usart.isUartRx() { atomic { return !(U1CTL & SYNC) && (ME2 & URXE1); } } async command msp430_usartmode_t Usart.getMode() { if (call Usart.isUart()) return USART_UART; else if (call Usart.isUartRx()) return USART_UART_RX; else if (call Usart.isUartTx()) return USART_UART_TX; else if (call Usart.isSpi()) return USART_SPI; else return USART_NONE; } async command void Usart.enableUart() { atomic{ call UTXD.selectModuleFunc(); call URXD.selectModuleFunc(); } ME2 |= (UTXE1 | URXE1); // USART1 UART module enable } async command void Usart.disableUart() { atomic { ME2 &= ~(UTXE1 | URXE1); // USART1 UART module enable call UTXD.selectIOFunc(); call URXD.selectIOFunc(); } } async command void Usart.enableUartTx() { call UTXD.selectModuleFunc(); ME2 |= UTXE1; // USART1 UART Tx module enable } async command void Usart.disableUartTx() { ME2 &= ~UTXE1; // USART1 UART Tx module enable call UTXD.selectIOFunc(); } async command void Usart.enableUartRx() { call URXD.selectModuleFunc(); ME2 |= URXE1; // USART1 UART Rx module enable } async command void Usart.disableUartRx() { ME2 &= ~URXE1; // USART1 UART Rx module disable call URXD.selectIOFunc(); } async command void Usart.enableSpi() { atomic { call SIMO.selectModuleFunc(); call SOMI.selectModuleFunc(); call UCLK.selectModuleFunc(); } ME2 |= USPIE1; // USART1 SPI module enable } async command void Usart.disableSpi() { atomic { ME2 &= ~USPIE1; // USART1 SPI module disable call SIMO.selectIOFunc(); call SOMI.selectIOFunc(); call UCLK.selectIOFunc(); } } void configSpi(msp430_spi_union_config_t* config) { U1CTL = (config->spiRegisters.uctl) | SYNC | SWRST; U1TCTL = config->spiRegisters.utctl; call Usart.setUbr(config->spiRegisters.ubr); call Usart.setUmctl(0x00); } async command void Usart.setModeSpi(msp430_spi_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call Usart.disableUart(); configSpi(config); call Usart.enableSpi(); call Usart.resetUsart(FALSE); call Usart.clrIntr(); call Usart.disableIntr(); } return; } void configUart(msp430_uart_union_config_t* config) { U1CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST; U1TCTL = config->uartRegisters.utctl; U1RCTL = config->uartRegisters.urctl; call Usart.setUbr(config->uartRegisters.ubr); call Usart.setUmctl(config->uartRegisters.umctl); } async command void Usart.setModeUart(msp430_uart_union_config_t* config) { atomic { call Usart.resetUsart(TRUE); call Usart.disableSpi(); configUart(config); if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) { call Usart.enableUart(); } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) { call Usart.disableUartTx(); call Usart.enableUartRx(); } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){ call Usart.disableUartRx(); call Usart.enableUartTx(); } else { call Usart.disableUart(); } call Usart.resetUsart(FALSE); call Usart.clrIntr(); call Usart.disableIntr(); } return; } async command bool Usart.isTxIntrPending(){ if (IFG2 & UTXIFG1){ return TRUE; } return FALSE; } async command bool Usart.isTxEmpty(){ if (U1TCTL & TXEPT) { return TRUE; } return FALSE; } async command bool Usart.isRxIntrPending(){ if (IFG2 & URXIFG1){ return TRUE; } return FALSE; } async command void Usart.clrTxIntr(){ IFG2 &= ~UTXIFG1; } async command void Usart.clrRxIntr() { IFG2 &= ~URXIFG1; } async command void Usart.clrIntr() { IFG2 &= ~(UTXIFG1 | URXIFG1); } async command void Usart.disableRxIntr() { IE2 &= ~URXIE1; } async command void Usart.disableTxIntr() { IE2 &= ~UTXIE1; } async command void Usart.disableIntr() { IE2 &= ~(UTXIE1 | URXIE1); } async command void Usart.enableRxIntr() { atomic { IFG2 &= ~URXIFG1; IE2 |= URXIE1; } } async command void Usart.enableTxIntr() { atomic { IFG2 &= ~UTXIFG1; IE2 |= UTXIE1; } } async command void Usart.enableIntr() { atomic { IFG2 &= ~(UTXIFG1 | URXIFG1); IE2 |= (UTXIE1 | URXIE1); } } async command void Usart.tx(uint8_t data) { atomic U1TXBUF = data; } async command uint8_t Usart.rx() { uint8_t value; atomic value = U1RXBUF; return value; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/Msp430Adc12P.nc000066400000000000000000000071161207233610700240600ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-06-12 14:02:26 $ * @author: Jan Hauer * ======================================================================== */ #include configuration Msp430Adc12P { provides { interface Resource[uint8_t id]; interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; interface Msp430Adc12Overflow as Overflow[uint8_t id]; interface AsyncStdControl as DMAExtension[uint8_t id]; } } implementation { components Msp430Adc12ImplP, HplAdc12P, MainC, new SimpleRoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter; Resource = Arbiter; SingleChannel = Msp430Adc12ImplP.SingleChannel; MultiChannel= Msp430Adc12ImplP.MultiChannel; Overflow = Msp430Adc12ImplP.Overflow; DMAExtension = Msp430Adc12ImplP.DMAExtension; Msp430Adc12ImplP.Init <- MainC; Msp430Adc12ImplP.ADCArbiterInfo -> Arbiter; Msp430Adc12ImplP.HplAdc12 -> HplAdc12P; #ifdef ADC12_P6PIN_AUTO_CONFIGURE components HplMsp430GeneralIOC; Msp430Adc12ImplP.Port60 -> HplMsp430GeneralIOC.Port60; Msp430Adc12ImplP.Port61 -> HplMsp430GeneralIOC.Port61; Msp430Adc12ImplP.Port62 -> HplMsp430GeneralIOC.Port62; Msp430Adc12ImplP.Port63 -> HplMsp430GeneralIOC.Port63; Msp430Adc12ImplP.Port64 -> HplMsp430GeneralIOC.Port64; Msp430Adc12ImplP.Port65 -> HplMsp430GeneralIOC.Port65; Msp430Adc12ImplP.Port66 -> HplMsp430GeneralIOC.Port66; Msp430Adc12ImplP.Port67 -> HplMsp430GeneralIOC.Port67; #endif #ifdef ADC12_TIMERA_ENABLED components Msp430TimerC; Msp430Adc12ImplP.TimerA -> Msp430TimerC.TimerA; Msp430Adc12ImplP.ControlA0 -> Msp430TimerC.ControlA0; Msp430Adc12ImplP.ControlA1 -> Msp430TimerC.ControlA1; Msp430Adc12ImplP.CompareA0 -> Msp430TimerC.CompareA0; Msp430Adc12ImplP.CompareA1 -> Msp430TimerC.CompareA1; #endif components PlatformInterruptC; HplAdc12P.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/Msp430TimerC.nc000066400000000000000000000156401207233610700242720ustar00rootroot00000000000000 /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Cory Sharp */ configuration Msp430TimerC { provides interface Msp430Timer as TimerA; provides interface Msp430TimerControl as ControlA0; provides interface Msp430TimerControl as ControlA1; provides interface Msp430TimerControl as ControlA2; provides interface Msp430Compare as CompareA0; provides interface Msp430Compare as CompareA1; provides interface Msp430Compare as CompareA2; provides interface Msp430Capture as CaptureA0; provides interface Msp430Capture as CaptureA1; provides interface Msp430Capture as CaptureA2; provides interface Msp430Timer as TimerB; provides interface Msp430TimerControl as ControlB0; provides interface Msp430TimerControl as ControlB1; provides interface Msp430TimerControl as ControlB2; provides interface Msp430TimerControl as ControlB3; provides interface Msp430TimerControl as ControlB4; provides interface Msp430TimerControl as ControlB5; provides interface Msp430TimerControl as ControlB6; provides interface Msp430Compare as CompareB0; provides interface Msp430Compare as CompareB1; provides interface Msp430Compare as CompareB2; provides interface Msp430Compare as CompareB3; provides interface Msp430Compare as CompareB4; provides interface Msp430Compare as CompareB5; provides interface Msp430Compare as CompareB6; provides interface Msp430Capture as CaptureB0; provides interface Msp430Capture as CaptureB1; provides interface Msp430Capture as CaptureB2; provides interface Msp430Capture as CaptureB3; provides interface Msp430Capture as CaptureB4; provides interface Msp430Capture as CaptureB5; provides interface Msp430Capture as CaptureB6; } implementation { components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE, TASSEL0, TASSEL1, FALSE ) as Msp430TimerA , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE, TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0 , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1 , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2 , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0 , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1 , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2 , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3 , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4 , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5 , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6 , Msp430TimerCommonP as Common ; // Timer A TimerA = Msp430TimerA.Timer; Msp430TimerA.Overflow -> Msp430TimerA.Event[5]; Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0; Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1; // Timer A0 ControlA0 = Msp430TimerA0.Control; CompareA0 = Msp430TimerA0.Compare; CaptureA0 = Msp430TimerA0.Capture; Msp430TimerA0.Timer -> Msp430TimerA.Timer; Msp430TimerA0.Event -> Msp430TimerA.Event[0]; // Timer A1 ControlA1 = Msp430TimerA1.Control; CompareA1 = Msp430TimerA1.Compare; CaptureA1 = Msp430TimerA1.Capture; Msp430TimerA1.Timer -> Msp430TimerA.Timer; Msp430TimerA1.Event -> Msp430TimerA.Event[1]; // Timer A2 ControlA2 = Msp430TimerA2.Control; CompareA2 = Msp430TimerA2.Compare; CaptureA2 = Msp430TimerA2.Capture; Msp430TimerA2.Timer -> Msp430TimerA.Timer; Msp430TimerA2.Event -> Msp430TimerA.Event[2]; // Timer B TimerB = Msp430TimerB.Timer; Msp430TimerB.Overflow -> Msp430TimerB.Event[7]; Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0; Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1; // Timer B0 ControlB0 = Msp430TimerB0.Control; CompareB0 = Msp430TimerB0.Compare; CaptureB0 = Msp430TimerB0.Capture; Msp430TimerB0.Timer -> Msp430TimerB.Timer; Msp430TimerB0.Event -> Msp430TimerB.Event[0]; // Timer B1 ControlB1 = Msp430TimerB1.Control; CompareB1 = Msp430TimerB1.Compare; CaptureB1 = Msp430TimerB1.Capture; Msp430TimerB1.Timer -> Msp430TimerB.Timer; Msp430TimerB1.Event -> Msp430TimerB.Event[1]; // Timer B2 ControlB2 = Msp430TimerB2.Control; CompareB2 = Msp430TimerB2.Compare; CaptureB2 = Msp430TimerB2.Capture; Msp430TimerB2.Timer -> Msp430TimerB.Timer; Msp430TimerB2.Event -> Msp430TimerB.Event[2]; // Timer B3 ControlB3 = Msp430TimerB3.Control; CompareB3 = Msp430TimerB3.Compare; CaptureB3 = Msp430TimerB3.Capture; Msp430TimerB3.Timer -> Msp430TimerB.Timer; Msp430TimerB3.Event -> Msp430TimerB.Event[3]; // Timer B4 ControlB4 = Msp430TimerB4.Control; CompareB4 = Msp430TimerB4.Compare; CaptureB4 = Msp430TimerB4.Capture; Msp430TimerB4.Timer -> Msp430TimerB.Timer; Msp430TimerB4.Event -> Msp430TimerB.Event[4]; // Timer B5 ControlB5 = Msp430TimerB5.Control; CompareB5 = Msp430TimerB5.Compare; CaptureB5 = Msp430TimerB5.Capture; Msp430TimerB5.Timer -> Msp430TimerB.Timer; Msp430TimerB5.Event -> Msp430TimerB.Event[5]; // Timer B6 ControlB6 = Msp430TimerB6.Control; CompareB6 = Msp430TimerB6.Compare; CaptureB6 = Msp430TimerB6.Capture; Msp430TimerB6.Timer -> Msp430TimerB.Timer; Msp430TimerB6.Event -> Msp430TimerB.Event[6]; components PlatformInterruptC; Common.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/Msp430TimerCommonP.nc000066400000000000000000000013641207233610700254560ustar00rootroot00000000000000 module Msp430TimerCommonP { provides interface Msp430TimerEvent as VectorTimerA0; provides interface Msp430TimerEvent as VectorTimerA1; provides interface Msp430TimerEvent as VectorTimerB0; provides interface Msp430TimerEvent as VectorTimerB1; uses interface PlatformInterrupt; } implementation { TOSH_SIGNAL(TIMERA0_VECTOR) { signal VectorTimerA0.fired(); call PlatformInterrupt.postAmble(); } TOSH_SIGNAL(TIMERA1_VECTOR) { signal VectorTimerA1.fired(); call PlatformInterrupt.postAmble(); } TOSH_SIGNAL(TIMERB0_VECTOR) { signal VectorTimerB0.fired(); call PlatformInterrupt.postAmble(); } TOSH_SIGNAL(TIMERB1_VECTOR) { signal VectorTimerB1.fired(); call PlatformInterrupt.postAmble(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/adc12/000077500000000000000000000000001207233610700225425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcP.nc000066400000000000000000000064701207233610700253530ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" configuration BlockingAdcP { provides { interface BlockingRead as BlockingRead[uint8_t client]; interface BlockingReadStream as BlockingReadStream[uint8_t streamClient]; } uses { //For BlockingRead interface AdcConfigure as Config[uint8_t client]; interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client]; interface Resource as ResourceRead[uint8_t client]; //For BlockingReadStream interface AdcConfigure as ConfigReadStream[uint8_t streamClient]; interface Msp430Adc12SingleChannel as SingleChannelReadStream[uint8_t streamClient]; interface Resource as ResourceReadStream[uint8_t streamClient]; } } implementation { components MainC; components AdcP; components WireAdcStreamP; components new BlockingReadP(); components new BlockingReadStreamP(); MainC.SoftwareInit -> BlockingReadP; MainC.SoftwareInit -> BlockingReadStreamP; //For BlockingRead BlockingRead = BlockingReadP; Config = AdcP.Config; SingleChannel = AdcP.SingleChannel; ResourceRead = AdcP.ResourceRead; BlockingReadP.Read -> AdcP.Read; //For BlockingReadStream BlockingReadStream = BlockingReadStreamP; ConfigReadStream = WireAdcStreamP; SingleChannelReadStream = WireAdcStreamP; ResourceReadStream = WireAdcStreamP; BlockingReadStreamP.ReadStream -> WireAdcStreamP; components SystemCallC; components SystemCallQueueC; BlockingReadP.SystemCallQueue -> SystemCallQueueC; BlockingReadP.SystemCall -> SystemCallC; BlockingReadStreamP.SystemCallQueue -> SystemCallQueueC; BlockingReadStreamP.SystemCall -> SystemCallC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcReadClientC.nc000066400000000000000000000050721207233610700272660ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include generic configuration BlockingAdcReadClientC() { provides interface BlockingRead; uses interface AdcConfigure; } implementation { components BlockingAdcP, #ifdef REF_VOLT_AUTO_CONFIGURE // if the client configuration requires a stable // reference voltage, the reference voltage generator // is automatically enabled new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient; #else new Msp430Adc12ClientC() as Msp430AdcClient; #endif enum { CLIENT = unique(ADCC_SERVICE), }; BlockingRead = BlockingAdcP.BlockingRead[CLIENT]; AdcConfigure = BlockingAdcP.Config[CLIENT]; BlockingAdcP.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel; BlockingAdcP.ResourceRead[CLIENT] -> Msp430AdcClient.Resource; #ifdef REF_VOLT_AUTO_CONFIGURE AdcConfigure = Msp430AdcClient.AdcConfigure; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcReadStreamClientC.nc000066400000000000000000000052001207233610700304330ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include generic configuration BlockingAdcReadStreamClientC() { provides interface BlockingReadStream; uses interface AdcConfigure; } implementation { components BlockingAdcP, #ifdef REF_VOLT_AUTO_CONFIGURE // if the client configuration requires a stable // reference voltage, the reference voltage generator // is automatically enabled new Msp430Adc12ClientAutoRVGC() as Msp430AdcPlient; #else new Msp430Adc12ClientC() as Msp430AdcPlient; #endif enum { RSCLIENT = unique(ADCC_READ_STREAM_SERVICE), }; BlockingReadStream = BlockingAdcP.BlockingReadStream[RSCLIENT]; AdcConfigure = BlockingAdcP.ConfigReadStream[RSCLIENT]; BlockingAdcP.SingleChannelReadStream[RSCLIENT] -> Msp430AdcPlient.Msp430Adc12SingleChannel; BlockingAdcP.ResourceReadStream[RSCLIENT] -> Msp430AdcPlient.Resource; #ifdef REF_VOLT_AUTO_CONFIGURE AdcConfigure = Msp430AdcPlient.AdcConfigure; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/chip_thread.h000066400000000000000000000112751207233610700243010ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This file is derived from similar files in the TinyThread implementation * by William P. McCartney from Cleveland State University (2006) * * This file contains MSP430 platform-specific routines for implementing * threads in TinyOS * * @author Kevin Klues */ //Define on platform specific basis for inclusion in // the thread control block typedef struct thread_regs { uint16_t status; uint16_t r4; uint16_t r5; uint16_t r6; uint16_t r7; uint16_t r8; uint16_t r9; uint16_t r10; uint16_t r11; uint16_t r12; uint16_t r13; uint16_t r14; uint16_t r15; } thread_regs_t; typedef uint16_t* stack_ptr_t; #define STACK_TOP(stack, size) \ (&(((uint8_t*)stack)[size - sizeof(stack_ptr_t)])) //Save stack pointer #define SAVE_STACK_PTR(t) \ __asm__("mov.w r1,%0" : "=m" ((t)->stack_ptr)) //Save status register #define SAVE_STATUS(t) \ __asm__("mov.w r2,%0" : "=r" ((t)->regs.status)) //Save General Purpose Registers #define SAVE_GPR(t) \ __asm__("mov.w r4,%0" : "=m" ((t)->regs.r4)); \ __asm__("mov.w r5,%0" : "=m" ((t)->regs.r5)); \ __asm__("mov.w r6,%0" : "=m" ((t)->regs.r6)); \ __asm__("mov.w r7,%0" : "=m" ((t)->regs.r7)); \ __asm__("mov.w r8,%0" : "=m" ((t)->regs.r8)); \ __asm__("mov.w r9,%0" : "=m" ((t)->regs.r9)); \ __asm__("mov.w r10,%0" : "=m" ((t)->regs.r10)); \ __asm__("mov.w r11,%0" : "=m" ((t)->regs.r11)); \ __asm__("mov.w r12,%0" : "=m" ((t)->regs.r12)); \ __asm__("mov.w r13,%0" : "=m" ((t)->regs.r13)); \ __asm__("mov.w r14,%0" : "=m" ((t)->regs.r14)); \ __asm__("mov.w r15,%0" : "=m" ((t)->regs.r15)) //Restore stack pointer #define RESTORE_STACK_PTR(t) \ __asm__("mov.w %0,r1" : : "m" ((t)->stack_ptr)) //Restore status register #define RESTORE_STATUS(t) \ __asm__("mov.w %0,r2" : : "r" ((t)->regs.status)) //Restore the general purpose registers #define RESTORE_GPR(t) \ __asm__("mov.w %0,r4" : : "m" ((t)->regs.r4)); \ __asm__("mov.w %0,r5" : : "m" ((t)->regs.r5)); \ __asm__("mov.w %0,r6" : : "m" ((t)->regs.r6)); \ __asm__("mov.w %0,r7" : : "m" ((t)->regs.r7)); \ __asm__("mov.w %0,r8" : : "m" ((t)->regs.r8)); \ __asm__("mov.w %0,r9" : : "m" ((t)->regs.r9)); \ __asm__("mov.w %0,r10" : : "m" ((t)->regs.r10)); \ __asm__("mov.w %0,r11" : : "m" ((t)->regs.r11)); \ __asm__("mov.w %0,r12" : : "m" ((t)->regs.r12)); \ __asm__("mov.w %0,r13" : : "m" ((t)->regs.r13)); \ __asm__("mov.w %0,r14" : : "m" ((t)->regs.r14)); \ __asm__("mov.w %0,r15" : : "m" ((t)->regs.r15)) #define SAVE_TCB(t) \ SAVE_GPR(t); \ SAVE_STATUS(t); \ SAVE_STACK_PTR(t) #define RESTORE_TCB(t) \ RESTORE_STACK_PTR(t); \ RESTORE_STATUS(t); \ RESTORE_GPR(t) #define SWITCH_CONTEXTS(from, to) \ SAVE_TCB(from); \ RESTORE_TCB(to) #define SWAP_STACK_PTR(OLD, NEW) \ __asm__("mov.w r1,%0" : "=m" (OLD)); \ __asm__("mov.w %0,r1" : : "m" (NEW)) #define PREPARE_THREAD(t, thread_ptr) \ *((t)->stack_ptr) = (uint16_t)(&(thread_ptr)); \ SAVE_STATUS(t) tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/sensors/000077500000000000000000000000001207233610700233445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/sensors/BlockingMsp430InternalTemperatureC.nc000066400000000000000000000051401207233610700323430ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Msp430InternalTemperatureC is the temperature sensor available on * the msp430-based platforms. * * To convert from ADC counts to temperature, convert to voltage by * dividing by 4096 and multiplying by Vref (1.5V). Then subtract * 0.986 from voltage and divide by 0.00355 to get degrees C. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2008-09-11 19:59:50 $ */ /** * Port to Tosthreads * * @author Chieh-Jan Mike Liang */ generic configuration BlockingMsp430InternalTemperatureC() { provides { interface BlockingRead; interface BlockingReadStream; } } implementation { components new BlockingAdcReadClientC(); BlockingRead = BlockingAdcReadClientC; components new BlockingAdcReadStreamClientC(); BlockingReadStream = BlockingAdcReadStreamClientC; components Msp430InternalTemperatureP; BlockingAdcReadClientC.AdcConfigure -> Msp430InternalTemperatureP; BlockingAdcReadStreamClientC.AdcConfigure -> Msp430InternalTemperatureP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/msp430/sensors/BlockingMsp430InternalVoltageC.nc000066400000000000000000000047311207233610700314540ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Msp430InternalVoltageC is the voltage sensor available on the * msp430-based platforms. * * To convert from ADC counts to actual voltage, divide by 4096 and * multiply by 3. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2008-09-11 19:59:50 $ */ /** * Port to Tosthreads * * @author Chieh-Jan Mike Liang */ generic configuration BlockingMsp430InternalVoltageC() { provides { interface BlockingRead; interface BlockingReadStream; } } implementation { components new BlockingAdcReadClientC(); BlockingRead = BlockingAdcReadClientC; components new BlockingAdcReadStreamClientC(); BlockingReadStream = BlockingAdcReadStreamClientC; components Msp430InternalVoltageP; BlockingAdcReadClientC.AdcConfigure -> Msp430InternalVoltageP; BlockingAdcReadStreamClientC.AdcConfigure -> Msp430InternalVoltageP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/pxa27x/000077500000000000000000000000001207233610700217535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/pxa27x/HplPXA27xInterruptImplM.nc000066400000000000000000000144221207233610700266110ustar00rootroot00000000000000// $Id: HplPXA27xInterruptImplM.nc,v 1.1 2008-06-12 14:02:31 klueska Exp $ /* tab:4 * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Phil Buonadonna * * Edits: Josh Herbach * Revised: 09/02/2005 * * Edits: Kevin Klues * Revised: 05/27/2008 */ module HplPXA27xInterruptM { provides { interface HplPXA27xInterrupt as PXA27xIrq[uint8_t id]; interface HplPXA27xInterruptCntl; } uses interface PlatformInterrupt; } implementation { uint32_t getICHP() { uint32_t val; asm volatile ("mrc p6,0,%0,c5,c0,0\n\t":"=r" (val)); return val; } /* Core PXA27X interrupt dispatch vectors */ /* DO NOT change the name of these functions */ void hplarmv_irq() __attribute__ ((interrupt ("IRQ"))) @C() @atomic_hwevent() { uint32_t IRQPending; IRQPending = getICHP(); // Determine which interrupt to service IRQPending >>= 16; // Right justify to the IRQ portion while (IRQPending & (1 << 15)) { uint8_t PeripheralID = (IRQPending & 0x3f); // Get rid of the Valid bit signal PXA27xIrq.fired[PeripheralID](); // Handler is responsible for clearing interrupt call PlatformInterrupt.postAmble(); IRQPending = getICHP(); // Determine which interrupt to service IRQPending >>= 16; // Right justify to the IRQ portion } return; } void hplarmv_fiq() __attribute__ ((interrupt ("FIQ"))) @C() @atomic_hwevent() { call PlatformInterrupt.postAmble(); } static uint8_t usedPriorities = 0; /* Helper functions */ /* NOTE: Read-back of all register writes is necessary to ensure the data latches */ error_t allocate(uint8_t id, bool level, uint8_t priority) { uint32_t tmp; error_t error = FAIL; atomic{ uint8_t i; if(usedPriorities == 0){//assumed that the table will have some entries uint8_t PriorityTable[40], DuplicateTable[40]; for(i = 0; i < 40; i++){ DuplicateTable[i] = PriorityTable[i] = 0xFF; } for(i = 0; i < 40; i++) if(TOSH_IRP_TABLE[i] != 0xff){ if(PriorityTable[TOSH_IRP_TABLE[i]] != 0xFF)/*duplicate priorities in the table, mark for later fixing*/ DuplicateTable[i] = PriorityTable[TOSH_IRP_TABLE[i]]; else PriorityTable[TOSH_IRP_TABLE[i]] = i; } //compress table for(i = 0; i < 40; i++){ if(PriorityTable[i] != 0xff){ PriorityTable[usedPriorities] = PriorityTable[i]; if(i != usedPriorities) PriorityTable[i] = 0xFF; usedPriorities++; } } for(i = 0; i < 40; i++) if(DuplicateTable[i] != 0xFF){ uint8_t j, ExtraTable[40]; for(j = 0; DuplicateTable[i] != PriorityTable[j]; j++); memcpy(ExtraTable + j + 1, PriorityTable + j, usedPriorities - j); memcpy(PriorityTable + j + 1, ExtraTable + j + 1, usedPriorities - j); PriorityTable[j] = i; usedPriorities++; } for(i = 0; i < usedPriorities; i++){ IPR(i) = (IPR_VALID | PriorityTable[i]); tmp = IPR(i); } } if (id < 34){ if(priority == 0xff){ priority = usedPriorities; usedPriorities++; IPR(priority) = (IPR_VALID | (id)); tmp = IPR(priority); } if (level) { _ICLR(id) |= _PPID_Bit(id); tmp = _ICLR(id); } error = SUCCESS; } } return error; } void enable(uint8_t id) { uint32_t tmp; atomic { if (id < 34) { _ICMR(id) |= _PPID_Bit(id); tmp = _ICMR(id); } } return; } void disable(uint8_t id) { uint32_t tmp; atomic { if (id < 34) { _ICMR(id) &= ~(_PPID_Bit(id)); tmp = _ICMR(id); } } return; } /* Interface implementation */ async command error_t PXA27xIrq.allocate[uint8_t id]() { return allocate(id, FALSE, TOSH_IRP_TABLE[id]); } async command void PXA27xIrq.enable[uint8_t id]() { enable(id); return; } async command void PXA27xIrq.disable[uint8_t id]() { disable(id); return; } async command void HplPXA27xInterruptCntl.setICCR_DIM(bool flag) { if (flag) { ICCR |= ICCR_DIM; } else { ICCR = 0; } return; } async command bool HplPXA27xInterruptCntl.getICCR_DIM() { bool result = FALSE; if (ICCR & ICCR_DIM) { result = TRUE; } return result; } default async event void PXA27xIrq.fired[uint8_t id]() { return; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/pxa27x/HplPXA27xInterruptM.nc000066400000000000000000000050151207233610700257650ustar00rootroot00000000000000// $Id: HplPXA27xInterruptM.nc,v 1.1 2008-06-12 14:02:31 klueska Exp $ /* tab:4 * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Phil Buonadonna * * Edits: Josh Herbach * Revised: 09/02/2005 * * Edits: Kevin Klues * Revised: 05/27/2008 */ configuration HplPXA27xInterruptM { provides { interface HplPXA27xInterrupt as PXA27xIrq[uint8_t id]; interface HplPXA27xInterruptCntl; } } implementation { components HplPXA27xInterruptImplM; PXA27xIrq = HplPXA27xInterruptImplM; HplPXA27xInterruptCntl = HplPXA27xInterruptImplM; components PlatformInterruptC; HplInterruptP.PlatformInterrupt -> PlatformInterruptC; }tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/pxa27x/chip_thread.h000066400000000000000000000050711207233610700244010ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This file is derived from similar files in the TinyThread implementation * by William P. McCartney from Cleveland State University (2006) * * This file contains MSP430 platform-specific routines for implementing * threads in TinyOS * * @author Kevin Klues */ //Define on platform specific basis for inclusion in // the thread control block typedef struct thread_regs { } thread_regs_t; typedef uint16_t* stack_ptr_t; #define STACK_TOP(stack, size) \ (&(((uint8_t*)stack)[size - sizeof(stack_ptr_t)])) //Save stack pointer #define SAVE_STACK_PTR(t) //Save status register #define SAVE_STATUS(t) //Save General Purpose Registers #define SAVE_GPR(t) //Restore stack pointer #define RESTORE_STACK_PTR(t) //Restore status register #define RESTORE_STATUS(t) //Restore the general purpose registers #define RESTORE_GPR(t) #define SAVE_TCB(t) #define RESTORE_TCB(t) #define SWITCH_CONTEXTS(from, to) #define SWAP_STACK_PTR(OLD, NEW) #define PREPARE_THREAD(t, thread_ptr) tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/tda5250/000077500000000000000000000000001207233610700217065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/tda5250/Tda5250ActiveMessageC.nc000066400000000000000000000067051207233610700260300ustar00rootroot00000000000000// $Id: Tda5250ActiveMessageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: Tda5250ActiveMessageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ * */ /** * * The Active Message layer for the TDA5250 radio. This configuration * just layers the AM dispatch (Tda5250ActiveMessageP) on top of the * underlying TDA5250 radio packet. * * @author Philip Levis * @author Vlado Handziski (TDA5250 modifications) * @date July 20 2005 */ #include "Timer.h" configuration Tda5250ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Packet; interface PacketAcknowledgements; interface Tda5250Packet; } } implementation { components Tda5250ActiveMessageP as AM, RadioDataLinkC as Radio; components ActiveMessageAddressC as Address; SplitControl = Radio; Packet = Radio; PacketAcknowledgements = Radio; Tda5250Packet = AM; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; AMPacket = AM; AM.SubSend -> Radio.Send; AM.SubReceive -> Radio.Receive; AM.SubPacket -> Radio.Packet; AM.amAddress -> Address; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/tda5250/Tda5250ActiveMessageP.nc000066400000000000000000000144461207233610700260460ustar00rootroot00000000000000// -*- mode:c++; indent-tabs-mode: nil -*- $Id: Tda5250ActiveMessageP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: Tda5250ActiveMessageP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ * */ /** * @author Philip Levis * @author Vlado Handziski (TDA5250 modifications) * @date July 20 2005 */ module Tda5250ActiveMessageP { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface AMPacket; interface Tda5250Packet; } uses { interface Send as SubSend; interface Receive as SubReceive; interface Packet as SubPacket; command am_addr_t amAddress(); } } implementation { tda5250_header_t* getHeader( message_t* msg ) { return (tda5250_header_t*)( msg->data - sizeof(tda5250_header_t) ); } tda5250_metadata_t* getMetadata(message_t* amsg) { return (tda5250_metadata_t*)((uint8_t*)amsg->footer + sizeof(message_radio_footer_t)); } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { tda5250_header_t* header = getHeader(msg); header->type = id; header->dest = addr; header->src = call amAddress(); return call SubSend.send(msg, len); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } event void SubSend.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call SubPacket.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call SubPacket.getPayload(m, len); } /* Receiving a packet */ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { if (call AMPacket.isForMe(msg)) { return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); } else { return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); } } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* amsg) { tda5250_header_t* header = getHeader(amsg); return header->dest; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { tda5250_header_t* header = getHeader(amsg); header->dest = addr; } command am_addr_t AMPacket.source(message_t* amsg) { tda5250_header_t* header = getHeader(amsg); return header->src; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { tda5250_header_t* header = getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return (call AMPacket.destination(amsg) == call AMPacket.address() || call AMPacket.destination(amsg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* amsg) { tda5250_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t type) { tda5250_header_t* header = getHeader(amsg); header->type = type; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { return; } command am_group_t AMPacket.group(message_t* msg) { return TOS_AM_GROUP; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } async command uint8_t Tda5250Packet.getSnr(message_t* msg) { return getMetadata(msg)->strength; } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal ReceiveDefault.receive[id](msg, payload, len); } default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal SnoopDefault.receive[id](msg, payload, len); } default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/xe1205/000077500000000000000000000000001207233610700215465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/xe1205/XE1205ActiveMessageC.nc000066400000000000000000000063561207233610700254720ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ configuration XE1205ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface AMPacket; interface Packet; interface PacketAcknowledgements; #ifdef LOW_POWER_LISTENING interface LowPowerListening; #endif } } implementation { components XE1205SendReceiveC; Packet = XE1205SendReceiveC; PacketAcknowledgements = XE1205SendReceiveC; components XE1205ActiveMessageP; #ifdef LOW_POWER_LISTENING components XE1205LowPowerListeningC as Lpl; LowPowerListening = Lpl; XE1205ActiveMessageP.SubSend -> Lpl.Send; XE1205ActiveMessageP.SubReceive -> Lpl.Receive; SplitControl = Lpl; #else XE1205ActiveMessageP.Packet -> XE1205SendReceiveC; XE1205ActiveMessageP.SubSend -> XE1205SendReceiveC.Send; XE1205ActiveMessageP.SubReceive -> XE1205SendReceiveC.Receive; SplitControl = XE1205SendReceiveC; #endif AMPacket = XE1205ActiveMessageP; AMSend = XE1205ActiveMessageP; Receive = XE1205ActiveMessageP.Receive; ReceiveDefault = XE1205ActiveMessageP.ReceiveDefault; Snoop = XE1205ActiveMessageP.Snoop; SnoopDefault = XE1205ActiveMessageP.SnoopDefault; components ActiveMessageAddressC; XE1205ActiveMessageP.amAddress -> ActiveMessageAddressC; components XE1205IrqConfC, XE1205PatternConfC, XE1205PhyRssiConfC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/chips/xe1205/XE1205ActiveMessageP.nc000066400000000000000000000131611207233610700254770ustar00rootroot00000000000000/* * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL), * Switzerland. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) * nor the names of its contributors may be used to * endorse or promote products derived from this software without * specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== */ /* * @author Henri Dubois-Ferriere * */ module XE1205ActiveMessageP { uses interface Packet; uses interface Send as SubSend; uses interface Receive as SubReceive; uses command am_addr_t amAddress(); provides interface AMSend[am_id_t id]; provides interface AMPacket; provides interface Receive[am_id_t id]; provides interface Receive as ReceiveDefault[am_id_t id]; provides interface Receive as Snoop[am_id_t id]; provides interface Receive as SnoopDefault[am_id_t id]; } implementation { // xxx - this is replicated in ActiveMessageP. // put in XE1205.h? xe1205_header_t* getHeader( message_t* msg ) { return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) ); } command am_addr_t AMPacket.address() { return call amAddress(); } command am_addr_t AMPacket.destination(message_t* msg) { xe1205_header_t* header = getHeader(msg); return header->dest; } command void AMPacket.setDestination(message_t* msg, am_addr_t addr) { xe1205_header_t* header = getHeader(msg); header->dest = addr; } command am_addr_t AMPacket.source(message_t* msg) { xe1205_header_t* header = getHeader(msg); return header->source; } command void AMPacket.setSource(message_t* msg, am_addr_t addr) { xe1205_header_t* header = getHeader(msg); header->source = addr; } command bool AMPacket.isForMe(message_t* msg) { return (call AMPacket.destination(msg) == call AMPacket.address() || call AMPacket.destination(msg) == AM_BROADCAST_ADDR); } command am_id_t AMPacket.type(message_t* msg) { xe1205_header_t* header = getHeader(msg); return header->type; } command void AMPacket.setType(message_t* msg, am_id_t type) { xe1205_header_t* header = getHeader(msg); header->type = type; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { xe1205_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.group(message_t* msg) { xe1205_header_t* header = getHeader(msg); return header->group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { xe1205_header_t* header = getHeader(msg); header->type = id; header->dest = addr; header->source = call AMPacket.address(); header->group = TOS_AM_GROUP; return call SubSend.send(msg, len); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } event void SubSend.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) { return; } event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) __attribute__ ((noinline)) { if (call AMPacket.isForMe(msg)) { return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len); } else { return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len); } } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal ReceiveDefault.receive[id](msg, payload, len); } default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal SnoopDefault.receive[id](msg, payload, len); } default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/000077500000000000000000000000001207233610700212035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CAMRadioC.nc000066400000000000000000000041271207233610700232130ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "tosthread_amradio.h" configuration CAMRadioC {} implementation { components CAMRadioP as CAMP; components BlockingActiveMessageC as AM; CAMP.BlockingStdControl -> AM; CAMP.BlockingReceive -> AM.BlockingReceive; CAMP.BlockingSnoop -> AM.BlockingSnoop; CAMP.BlockingReceiveAny -> AM.BlockingReceiveAny; CAMP.BlockingSnoopAny -> AM.BlockingSnoopAny; CAMP.Send -> AM; CAMP.Packet -> AM; CAMP.AMPacket -> AM; CAMP.PacketAcknowledgements -> AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CAMRadioP.nc000066400000000000000000000117741207233610700232360ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ module CAMRadioP { uses { interface BlockingStdControl; interface BlockingReceive[am_id_t amId]; interface BlockingReceive as BlockingReceiveAny; interface BlockingReceive as BlockingSnoop[am_id_t amId]; interface BlockingReceive as BlockingSnoopAny; interface BlockingAMSend as Send[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } } implementation { error_t amRadioStart() @C() AT_SPONTANEOUS { return call BlockingStdControl.start(); } error_t amRadioStop() @C() AT_SPONTANEOUS { return call BlockingStdControl.stop(); } error_t amRadioReceive(message_t* m, uint32_t timeout, am_id_t amId) @C() AT_SPONTANEOUS { if(amId == AM_RECEIVE_FROM_ANY) return call BlockingReceiveAny.receive(m, timeout); else return call BlockingReceive.receive[amId](m, timeout); } error_t amRadioSnoop(message_t* m, uint32_t timeout, am_id_t amId) @C() AT_SPONTANEOUS { if(amId == AM_RECEIVE_FROM_ANY) return call BlockingSnoopAny.receive(m, timeout); else return call BlockingSnoop.receive[amId](m, timeout); } error_t amRadioSend(am_addr_t addr, message_t* msg, uint8_t len, am_id_t amId) @C() AT_SPONTANEOUS { return call Send.send[amId](addr, msg, len); } am_addr_t amRadioGetLocalAddress() @C() AT_SPONTANEOUS { return call AMPacket.address(); } am_group_t amRadioGetLocalGroup() @C() AT_SPONTANEOUS { return call AMPacket.localGroup(); } am_addr_t amRadioGetDestination(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.destination(amsg); } am_addr_t amRadioGetSource(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.source(amsg); } void amRadioSetDestination(message_t* amsg, am_addr_t addr) @C() AT_SPONTANEOUS { call AMPacket.setDestination(amsg, addr); } void amRadioSetSource(message_t* amsg, am_addr_t addr) @C() AT_SPONTANEOUS { call AMPacket.setSource(amsg, addr); } bool amRadioIsForMe(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.isForMe(amsg); } am_id_t amRadioGetType(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.type(amsg); } void amRadioSetType(message_t* amsg, am_id_t t) @C() AT_SPONTANEOUS { call AMPacket.setType(amsg, t); } am_group_t amRadioGetGroup(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.group(amsg); } void amRadioSetGroup(message_t* amsg, am_group_t grp) @C() AT_SPONTANEOUS { call AMPacket.setGroup(amsg, grp); } void radioClear(message_t* msg) @C() AT_SPONTANEOUS { call Packet.clear(msg); } uint8_t radioGetPayloadLength(message_t* msg) @C() AT_SPONTANEOUS { return call Packet.payloadLength(msg); } void radioSetPayloadLength(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS { call Packet.setPayloadLength(msg, len); } uint8_t radioMaxPayloadLength() @C() AT_SPONTANEOUS { return call Packet.maxPayloadLength(); } void* radioGetPayload(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS { return call Packet.getPayload(msg, len); } error_t radioRequestAck( message_t* msg ) @C() AT_SPONTANEOUS { return call PacketAcknowledgements.requestAck(msg); } error_t radioNoAck( message_t* msg ) @C() AT_SPONTANEOUS { return call PacketAcknowledgements.noAck(msg); } bool radioWasAcked(message_t* msg) @C() AT_SPONTANEOUS { return call PacketAcknowledgements.wasAcked(msg); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CAMSerialC.nc000066400000000000000000000040061207233610700233700ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "tosthread_amserial.h" configuration CAMSerialC {} implementation { components CAMSerialP as CAMP; components BlockingSerialActiveMessageC as AM; CAMP.BlockingStdControl -> AM; CAMP.BlockingReceive -> AM.BlockingReceive; CAMP.BlockingReceiveAny -> AM.BlockingReceiveAny; CAMP.Send -> AM; CAMP.Packet -> AM; CAMP.AMPacket -> AM; CAMP.PacketAcknowledgements -> AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CAMSerialP.nc000066400000000000000000000112401207233610700234030ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ module CAMSerialP { uses { interface BlockingStdControl; interface BlockingReceive[am_id_t amId]; interface BlockingReceive as BlockingReceiveAny; interface BlockingAMSend as Send[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } } implementation { error_t amSerialStart() @C() AT_SPONTANEOUS { return call BlockingStdControl.start(); } error_t amSerialStop() @C() AT_SPONTANEOUS { return call BlockingStdControl.stop(); } error_t amSerialReceive(message_t* m, uint32_t timeout, am_id_t amId) @C() AT_SPONTANEOUS { if(amId == AM_RECEIVE_FROM_ANY) return call BlockingReceiveAny.receive(m, timeout); else return call BlockingReceive.receive[amId](m, timeout); } error_t amSerialSend(am_addr_t addr, message_t* msg, uint8_t len, am_id_t amId) @C() AT_SPONTANEOUS { return call Send.send[amId](addr, msg, len); } am_addr_t amSerialLocalAddress() @C() AT_SPONTANEOUS { return call AMPacket.address(); } am_group_t amSerialGetLocalGroup() @C() AT_SPONTANEOUS { return call AMPacket.localGroup(); } am_addr_t amSerialGetDestination(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.destination(amsg); } am_addr_t amSerialGetSource(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.source(amsg); } void amSerialSetDestination(message_t* amsg, am_addr_t addr) @C() AT_SPONTANEOUS { call AMPacket.setDestination(amsg, addr); } void amSerialSetSource(message_t* amsg, am_addr_t addr) @C() AT_SPONTANEOUS { call AMPacket.setSource(amsg, addr); } bool amSerialIsForMe(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.isForMe(amsg); } am_id_t amSerialGetType(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.type(amsg); } void amSerialSetType(message_t* amsg, am_id_t t) @C() AT_SPONTANEOUS { call AMPacket.setType(amsg, t); } am_group_t amSerialGetGroup(message_t* amsg) @C() AT_SPONTANEOUS { return call AMPacket.group(amsg); } void amSerialSetGroup(message_t* amsg, am_group_t grp) @C() AT_SPONTANEOUS { call AMPacket.setGroup(amsg, grp); } void serialClear(message_t* msg) @C() AT_SPONTANEOUS { call Packet.clear(msg); } uint8_t serialGetPayloadLength(message_t* msg) @C() AT_SPONTANEOUS { return call Packet.payloadLength(msg); } void serialSetPayloadLength(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS { call Packet.setPayloadLength(msg, len); } uint8_t serialMaxPayloadLength() @C() AT_SPONTANEOUS { return call Packet.maxPayloadLength(); } void* serialGetPayload(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS { return call Packet.getPayload(msg, len); } error_t serialRequestAck( message_t* msg ) @C() AT_SPONTANEOUS { return call PacketAcknowledgements.requestAck(msg); } error_t serialNoAck( message_t* msg ) @C() AT_SPONTANEOUS { return call PacketAcknowledgements.noAck(msg); } bool serialWasAcked(message_t* msg) @C() AT_SPONTANEOUS { return call PacketAcknowledgements.wasAcked(msg); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CBlockStorageC.nc000066400000000000000000000036641207233610700243230ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ configuration CBlockStorageC {} implementation { components CBlockStorageP, BlockingBlockStorageP, VolumeMapC; CBlockStorageP.BlockingBlock -> BlockingBlockStorageP; BlockingBlockStorageP.BlockRead -> VolumeMapC; BlockingBlockStorageP.BlockWrite -> VolumeMapC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CBlockStorageP.nc000066400000000000000000000050711207233610700243320ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ module CBlockStorageP { uses { interface BlockingBlock[uint8_t volume_id]; } } implementation { error_t volumeBlockRead(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len) @C() AT_SPONTANEOUS { return call BlockingBlock.read[volumeId](addr, buf, len); } error_t volumeBlockWrite(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len) @C() AT_SPONTANEOUS { return call BlockingBlock.write[volumeId](addr, buf, len); } error_t volumeBlockCrc(uint8_t volumeId, storage_addr_t addr, storage_len_t* len, uint16_t crc, uint16_t *finalCrc) @C() AT_SPONTANEOUS { return call BlockingBlock.computeCrc[volumeId](addr, len, crc, finalCrc); } error_t volumeBlockErase(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingBlock.erase[volumeId](); } error_t volumeBlockSync(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingBlock.sync[volumeId](); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CConfigStorageC.nc000066400000000000000000000040101207233610700244600ustar00rootroot00000000000000/* * Copyright (c) 2009 RWTH Aachen University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author J gila Bitsch Link */ configuration CConfigStorageC {} implementation { components CConfigStorageP, BlockingConfigStorageP, VolumeMapC; CConfigStorageP.BlockingConfig -> BlockingConfigStorageP; CConfigStorageP.BlockingMount -> BlockingConfigStorageP; BlockingConfigStorageP.ConfigMount -> VolumeMapC.Mount; BlockingConfigStorageP.ConfigStorage -> VolumeMapC.ConfigStorage; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CConfigStorageP.nc000066400000000000000000000053071207233610700245070ustar00rootroot00000000000000/* * Copyright (c) 2009 RWTH Aachen University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author J gila Bitsch Link * @author Chieh-Jan Mike Liang */ module CConfigStorageP { uses { interface BlockingConfig[uint8_t volume_id]; interface BlockingMount[uint8_t volume_id]; } } implementation { error_t volumeConfigMount(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingMount.mount[volumeId](); } error_t volumeConfigRead(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len) @C() AT_SPONTANEOUS { return call BlockingConfig.read[volumeId](addr, buf, len); } error_t volumeConfigWrite(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len) @C() AT_SPONTANEOUS { return call BlockingConfig.write[volumeId](addr, buf, len); } error_t volumeConfigCommit(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingConfig.commit[volumeId](); } storage_len_t volumeConfigGetSize(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingConfig.getSize[volumeId](); } bool volumeConfigValid(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingConfig.valid[volumeId](); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CLedsC.nc000066400000000000000000000033461207233610700226300ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration CLedsC {} implementation { components LedsC; components CLedsP; CLedsP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CLedsP.nc000066400000000000000000000047011207233610700226410ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ module CLedsP { uses { interface Leds; } } implementation { void led0On() @C() AT_SPONTANEOUS { call Leds.led0On(); } void led0Off() @C() AT_SPONTANEOUS { call Leds.led0Off(); } void led0Toggle() @C() AT_SPONTANEOUS{ call Leds.led0Toggle(); } void led1On() @C() AT_SPONTANEOUS{ call Leds.led1On(); } void led1Off() @C() AT_SPONTANEOUS{ call Leds.led1Off(); } void led1Toggle() @C() AT_SPONTANEOUS{ call Leds.led1Toggle(); } void led2On() @C() AT_SPONTANEOUS{ call Leds.led2On(); } void led2Off() @C() AT_SPONTANEOUS{ call Leds.led2Off(); } void led2Toggle() @C() AT_SPONTANEOUS{ call Leds.led2Toggle(); } uint8_t getLeds() @C() AT_SPONTANEOUS{ return call Leds.get(); } void setLeds(uint8_t val) @C() AT_SPONTANEOUS{ call Leds.set(val); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CLinkedListC.nc000066400000000000000000000034571207233610700240060ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "tosthread_linked_list.h" configuration CLinkedListC {} implementation { components LinkedListC; components CLinkedListP; CLinkedListP.LinkedList -> LinkedListC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CLinkedListP.nc000066400000000000000000000105621207233610700240160ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CLinkedListP { uses interface LinkedList; } implementation { void linked_list_init(linked_list_t* l) @C() AT_SPONTANEOUS { call LinkedList.init(l); } void linked_list_clear(linked_list_t* l) @C() AT_SPONTANEOUS { call LinkedList.clear(l); } uint8_t linked_list_size(linked_list_t* l) @C() AT_SPONTANEOUS { return call LinkedList.size(l); } error_t linked_list_addFirst(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.addFirst(l, e); } list_element_t* linked_list_getFirst(linked_list_t* l) @C() AT_SPONTANEOUS { return call LinkedList.getFirst(l); } list_element_t* linked_list_removeFirst(linked_list_t* l) @C() AT_SPONTANEOUS { return call LinkedList.removeFirst(l); } error_t linked_list_addLast(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.addLast(l, e); } list_element_t* linked_list_getLast(linked_list_t* l) @C() AT_SPONTANEOUS { return call LinkedList.getLast(l); } list_element_t* linked_list_removeLast(linked_list_t* l) @C() AT_SPONTANEOUS { return call LinkedList.removeLast(l); } error_t linked_list_addAt(linked_list_t* l, list_element_t* e, uint8_t i) @C() AT_SPONTANEOUS { return call LinkedList.addAt(l, e, i); } list_element_t* linked_list_getAt(linked_list_t* l, uint8_t i) @C() AT_SPONTANEOUS { return call LinkedList.getAt(l, i); } list_element_t* linked_list_removeAt(linked_list_t* l, uint8_t i) @C() AT_SPONTANEOUS { return call LinkedList.removeAt(l, i); } error_t linked_list_addAfter(linked_list_t* l, list_element_t* first, list_element_t* second) @C() AT_SPONTANEOUS { return call LinkedList.addAfter(l, first, second); } error_t linked_list_addBefore(linked_list_t* l, list_element_t* first, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.addBefore(l, first, e); } list_element_t* linked_list_getAfter(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.getAfter(l, e); } list_element_t* linked_list_getBefore(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.getBefore(l, e); } list_element_t* linked_list_remove(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.remove(l, e); } list_element_t* linked_list_removeBefore(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.removeBefore(l, e); } list_element_t* linked_list_removeAfter(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.removeAfter(l, e); } uint8_t linked_list_indexOf(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { return call LinkedList.indexOf(l, e); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CLogStorageC.nc000066400000000000000000000036341207233610700240070ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration CLogStorageC {} implementation { components CLogStorageP, BlockingLogStorageP, VolumeMapC; CLogStorageP.BlockingLog -> BlockingLogStorageP; BlockingLogStorageP.LogRead -> VolumeMapC; BlockingLogStorageP.LogWrite -> VolumeMapC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CLogStorageP.nc000066400000000000000000000055241207233610700240240ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CLogStorageP { uses { interface BlockingLog[uint8_t volume_id]; } } implementation { error_t volumeLogRead(uint8_t volumeId, void *buf, storage_len_t *len) @C() AT_SPONTANEOUS { return call BlockingLog.read[volumeId](buf, len); } storage_cookie_t volumeLogCurrentReadOffset(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingLog.currentReadOffset[volumeId](); } error_t volumeLogSeek(uint8_t volumeId, storage_cookie_t offset) @C() AT_SPONTANEOUS { return call BlockingLog.seek[volumeId](offset); } storage_len_t volumeLogGetSize(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingLog.getSize[volumeId](); } error_t volumeLogAppend(uint8_t volumeId, void* buf, storage_len_t *len, bool *recordsLost) @C() AT_SPONTANEOUS { return call BlockingLog.append[volumeId](buf, len, recordsLost); } storage_cookie_t volumeLogCurrentWriteOffset(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingLog.currentWriteOffset[volumeId](); } error_t volumeLogErase(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingLog.erase[volumeId](); } error_t volumeLogSync(uint8_t volumeId) @C() AT_SPONTANEOUS { return call BlockingLog.sync[volumeId](); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CQueueC.nc000066400000000000000000000050461207233610700230240ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "tosthread_linked_list.h" #include "tosthread_queue.h" module CQueueC {} implementation { void queue_init(queue_t* q) @C() AT_SPONTANEOUS { linked_list_init( &(q->l) ); } void queue_clear(queue_t* q) @C() AT_SPONTANEOUS { linked_list_clear( &(q->l) ); } error_t queue_enqueue(queue_t* q, queue_element_t* e) @C() AT_SPONTANEOUS { return linked_list_addLast(&(q->l), (list_element_t*)e); } queue_element_t* queue_dequeue(queue_t* q) @C() AT_SPONTANEOUS { return (queue_element_t*)linked_list_removeFirst( &(q->l) ); } queue_element_t* queue_remove(queue_t* q, queue_element_t* e) @C() AT_SPONTANEOUS { return (queue_element_t*)linked_list_remove(&(q->l), (list_element_t*)e); } uint8_t queue_size(queue_t* q) @C() AT_SPONTANEOUS { return linked_list_size( &(q->l) ); } bool queue_is_empty(queue_t* q) @C() AT_SPONTANEOUS { return (linked_list_size( &(q->l) ) == 0); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CRandomC.nc000066400000000000000000000034331207233610700231560ustar00rootroot00000000000000/* * Copyright (c) 2009 RWTH Aachen University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author J gila Bitsch Link */ configuration CRandomC {} implementation { components CRandomP, RandomC; CRandomP.Random -> RandomC; CRandomP.SeedInit -> RandomC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CRandomP.nc000066400000000000000000000040031207233610700231650ustar00rootroot00000000000000/* * Copyright (c) 2009 RWTH Aachen University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author J gila Bitsch Link */ module CRandomP { uses { interface ParameterInit as SeedInit; interface Random; } } implementation { error_t randSeed(uint16_t seed) @C() AT_SPONTANEOUS { return call SeedInit.init(seed); } uint16_t rand16() @C() AT_SPONTANEOUS { return call Random.rand16(); } uint32_t rand32() @C() AT_SPONTANEOUS { return call Random.rand32(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CThreadC.nc000066400000000000000000000034111207233610700231410ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration CThreadC {} implementation { components DynamicThreadC; components CThreadP; CThreadP.DynamicThread -> DynamicThreadC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CThreadP.nc000066400000000000000000000047161207233610700231670ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "thread.h" module CThreadP { uses { interface DynamicThread; } } implementation { error_t tosthread_create(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size) @C() AT_SPONTANEOUS { return call DynamicThread.create(t, start_routine, arg, stack_size); } error_t tosthread_destroy(tosthread_t* t) @C() AT_SPONTANEOUS { return call DynamicThread.destroy(t); } error_t tosthread_pause(tosthread_t* t) @C() AT_SPONTANEOUS { return call DynamicThread.pause(t); } error_t tosthread_resume(tosthread_t* t) @C() AT_SPONTANEOUS { return call DynamicThread.resume(t); } error_t tosthread_sleep(uint32_t milli) @C() AT_SPONTANEOUS { return call DynamicThread.sleep(milli); } error_t tosthread_join(tosthread_t* t) @C() AT_SPONTANEOUS { return call DynamicThread.join(t); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CThreadSynchronizationC.nc000066400000000000000000000041471207233610700262720ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "tosthread_threadsync.h" configuration CThreadSynchronizationC {} implementation { components ThreadSynchronizationC; components CThreadSynchronizationP; CThreadSynchronizationP.Mutex -> ThreadSynchronizationC; CThreadSynchronizationP.Semaphore -> ThreadSynchronizationC; CThreadSynchronizationP.Barrier -> ThreadSynchronizationC; CThreadSynchronizationP.ConditionVariable -> ThreadSynchronizationC; CThreadSynchronizationP.ReferenceCounter -> ThreadSynchronizationC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/CThreadSynchronizationP.nc000066400000000000000000000101411207233610700262760ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CThreadSynchronizationP { uses { interface Mutex; interface Semaphore; interface Barrier; interface ConditionVariable; interface ReferenceCounter; } } implementation { /******************** Mutex ***************************/ void mutex_init(mutex_t* m) @C() AT_SPONTANEOUS { call Mutex.init(m); } error_t mutex_lock(mutex_t* m) @C() AT_SPONTANEOUS { return call Mutex.lock(m); } error_t mutex_unlock(mutex_t* m) @C() AT_SPONTANEOUS { return call Mutex.unlock(m); } /******************** Semaphore ***************************/ void semaphore_reset(semaphore_t* s, uint8_t v) @C() AT_SPONTANEOUS { call Semaphore.reset(s, v); } error_t semaphore_acquire(semaphore_t* s) @C() AT_SPONTANEOUS { return call Semaphore.acquire(s); } error_t semaphore_release(semaphore_t* s) @C() AT_SPONTANEOUS { return call Semaphore.release(s); } /******************** Barrier ***************************/ void barrier_reset(barrier_t* b, uint8_t count) @C() AT_SPONTANEOUS { call Barrier.reset(b, count); } void barrier_block(barrier_t* b) @C() AT_SPONTANEOUS { call Barrier.block(b); } bool barrier_isBlocking(barrier_t* b) @C() AT_SPONTANEOUS { return call Barrier.isBlocking(b); } void condvar_init(condvar_t* c) @C() AT_SPONTANEOUS { call ConditionVariable.init(c); } /******************** Condition Variable ***************************/ void condvar_wait(condvar_t* c, mutex_t* m) @C() AT_SPONTANEOUS { call ConditionVariable.wait(c, m); } void condvar_signalNext(condvar_t* c) @C() AT_SPONTANEOUS { call ConditionVariable.signalNext(c); } void condvar_signalAll(condvar_t* c) @C() AT_SPONTANEOUS { call ConditionVariable.signalAll(c); } bool condvar_isBlocking(condvar_t* c) @C() AT_SPONTANEOUS { return call ConditionVariable.isBlocking(c); } /******************** Reference Counter ***************************/ void refcounter_init(refcounter_t* r) @C() AT_SPONTANEOUS { call ReferenceCounter.init(r); } void refcounter_increment(refcounter_t* r) @C() AT_SPONTANEOUS { call ReferenceCounter.increment(r); } void refcounter_decrement(refcounter_t* r) @C() AT_SPONTANEOUS { call ReferenceCounter.decrement(r); } void refcounter_waitOnValue(refcounter_t* r, uint8_t count) @C() AT_SPONTANEOUS { call ReferenceCounter.waitOnValue(r, count); } uint8_t refcounter_count(refcounter_t* r) @C() AT_SPONTANEOUS { return call ReferenceCounter.count(r); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/TinyOSEntryPointC.nc000066400000000000000000000036021207233610700250520ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "tosthread.h" configuration TinyOSEntryPointC { } implementation { components MainC; components TinyOSEntryPointP; MainC.Boot <- TinyOSEntryPointP; #ifdef TOSTHREAD_TENET components TosThreadTenetApiC; #else components TosThreadApiC; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/TinyOSEntryPointP.nc000066400000000000000000000044451207233610700250750ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ /** * The Makefile for your top level application must contain a line of the form: * TOSTHREAD_MAIN=Blink.c * in order to compile correctly. * * This simply issues an error at compile time if TOSTHREAD_MAIN has not been defined * appropriately. */ #ifndef MAIN_APP #error "You must define the TOSTHREAD_MAIN constant in your Makefile to correctly point to your top level c file in order to compile..... Spelling Error?" #else #include MAIN_APP #endif module TinyOSEntryPointP { uses { interface Boot; } } implementation { tosthread_t thread; event void Boot.booted() { tosthread_create(&thread, tosthread_main, NULL, TOSTHREAD_MAIN_STACK_SIZE); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/TosThreadApiC.nc000066400000000000000000000074641207233610700241720ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @author Chieh-Jan Mike Liang */ #include "tosthread.h" configuration TosThreadApiC { } implementation { //Here are all the components that implement the Tosthread API calls components CThreadC; #if defined(PRINTF_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components PrintfC; #endif #if defined(TOSTHREAD_QUEUE_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CQueueC; #endif #if defined(TOSTHREAD_LINKED_LIST_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CLinkedListC; #endif #if defined(TOSTHREAD_THREADSYNC_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CThreadSynchronizationC; #endif #if defined(TOSTHREAD_LEDS_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CLedsC; #endif #if defined(TOSTHREAD_AMRADIO_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CAMRadioC; #endif #if defined(TOSTHREAD_AMSERIAL_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CAMSerialC; #endif #if defined(TOSTHREAD_BLOCKSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CBlockStorageC; #endif #if defined(TOSTHREAD_LOGSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CLogStorageC; #endif #if defined(TOSTHREAD_CONFIGSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CConfigStorageC; #endif #if defined(TOSTHREAD_COLLECTION_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CCollectionC; #endif //Telosb sensorboard specific. #if defined(TOSTHREAD_HAMAMATSUS1087_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CHamamatsuS1087ParC; #endif #if defined(TOSTHREAD_HAMAMATSUS10871_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CHamamatsuS10871TsrC; #endif #if defined(TOSTHREAD_SENSIRIONSHT11_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CSensirionSht11C; #endif //Universal sensorboard specific #if defined(TOSTHREAD_SINESENSOR_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CSineSensorC; #endif //Basicsb sensorboard specific #if defined(TOSTHREAD_PHOTO_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CPhotoC; #endif #if defined(TOSTHREAD_TEMP_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CTempC; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/VolumeMapC.nc000066400000000000000000000042771207233610700235470ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author J gila Bitsch Link */ configuration VolumeMapC { provides { interface BlockRead[uint8_t volume_id]; interface BlockWrite[uint8_t volume_id]; interface LogRead[uint8_t volume_id]; interface LogWrite[uint8_t volume_id]; interface ConfigStorage[uint8_t volume_id]; interface Mount[uint8_t volume_id]; } } implementation { components VolumeMapP; BlockRead = VolumeMapP; BlockWrite = VolumeMapP; LogRead = VolumeMapP; LogWrite = VolumeMapP; ConfigStorage = VolumeMapP; Mount = VolumeMapP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/VolumeMapP.nc000066400000000000000000000254501207233610700235600ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author J gila Bitsch Link */ module VolumeMapP { provides { interface BlockRead[uint8_t volume_id]; interface BlockWrite[uint8_t volume_id]; interface LogRead[uint8_t volume_id]; interface LogWrite[uint8_t volume_id]; interface ConfigStorage[uint8_t volume_id]; interface Mount[uint8_t volume_id]; } uses { interface BlockRead as SubBlockRead[uint8_t volume_id]; interface BlockWrite as SubBlockWrite[uint8_t volume_id]; interface LogRead as SubLogRead[uint8_t volume_id]; interface LogWrite as SubLogWrite[uint8_t volume_id]; interface ConfigStorage as SubConfigStorage[uint8_t volume_id]; interface Mount as SubMount[uint8_t volume_id]; } } implementation { command error_t BlockRead.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return call SubBlockRead.read[volume_id](addr, buf, len); } event void SubBlockRead.readDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { signal BlockRead.readDone[volume_id](addr, buf, len, error); } command error_t BlockRead.computeCrc[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc) { return call SubBlockRead.computeCrc[volume_id](addr, len, crc); } event void SubBlockRead.computeCrcDone[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { signal BlockRead.computeCrcDone[volume_id](addr, len, crc, error); } command storage_len_t BlockRead.getSize[uint8_t volume_id]() { return call SubBlockRead.getSize[volume_id](); } command error_t BlockWrite.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return call SubBlockWrite.write[volume_id](addr, buf, len); } event void SubBlockWrite.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { signal BlockWrite.writeDone[volume_id](addr, buf, len, error); } command error_t BlockWrite.erase[uint8_t volume_id]() { return call SubBlockWrite.erase[volume_id](); } event void SubBlockWrite.eraseDone[uint8_t volume_id](error_t error) { signal BlockWrite.eraseDone[volume_id](error); } command error_t BlockWrite.sync[uint8_t volume_id]() { return call SubBlockWrite.sync[volume_id](); } event void SubBlockWrite.syncDone[uint8_t volume_id](error_t error) { signal BlockWrite.syncDone[volume_id](error); } default command error_t SubBlockRead.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t SubBlockRead.computeCrc[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; } default command storage_len_t SubBlockRead.getSize[uint8_t volume_id]() { return FAIL; } default command error_t SubBlockWrite.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t SubBlockWrite.erase[uint8_t volume_id]() { return FAIL; } default command error_t SubBlockWrite.sync[uint8_t volume_id]() { return FAIL; } default event void BlockRead.readDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void BlockRead.computeCrcDone[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {} default event void BlockWrite.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void BlockWrite.eraseDone[uint8_t volume_id](error_t error) {} default event void BlockWrite.syncDone[uint8_t volume_id](error_t error) {} command error_t LogRead.read[uint8_t volume_id](void* buf, storage_len_t len) { return call SubLogRead.read[volume_id](buf, len); } event void SubLogRead.readDone[uint8_t volume_id](void* buf, storage_len_t len, error_t error) { signal LogRead.readDone[volume_id](buf, len, error); } command storage_cookie_t LogRead.currentOffset[uint8_t volume_id]() { return call SubLogRead.currentOffset[volume_id](); } command error_t LogRead.seek[uint8_t volume_id](storage_cookie_t offset) { return call SubLogRead.seek[volume_id](offset); } event void SubLogRead.seekDone[uint8_t volume_id](error_t error) { signal LogRead.seekDone[volume_id](error); } command storage_len_t LogRead.getSize[uint8_t volume_id]() { return call SubLogRead.getSize[volume_id](); } command error_t LogWrite.append[uint8_t volume_id](void* buf, storage_len_t len) { return call SubLogWrite.append[volume_id](buf, len); } event void SubLogWrite.appendDone[uint8_t volume_id](void* buf, storage_len_t len, bool recordsLost, error_t error) { signal LogWrite.appendDone[volume_id](buf, len, recordsLost, error); } command storage_cookie_t LogWrite.currentOffset[uint8_t volume_id]() { return call SubLogWrite.currentOffset[volume_id](); } command error_t LogWrite.erase[uint8_t volume_id]() { return call SubLogWrite.erase[volume_id](); } event void SubLogWrite.eraseDone[uint8_t volume_id](error_t error) { signal LogWrite.eraseDone[volume_id](error); } command error_t LogWrite.sync[uint8_t volume_id]() { return call SubLogWrite.sync[volume_id](); } event void SubLogWrite.syncDone[uint8_t volume_id](error_t error) { signal LogWrite.syncDone[volume_id](error); } default command error_t SubLogRead.read[uint8_t volume_id](void* buf, storage_len_t len) { return FAIL; } default command storage_cookie_t SubLogRead.currentOffset[uint8_t volume_id]() { return 0; } default command error_t SubLogRead.seek[uint8_t volume_id](storage_cookie_t offset) { return FAIL; } default command storage_len_t SubLogRead.getSize[uint8_t volume_id]() { return 0; } default command error_t SubLogWrite.append[uint8_t volume_id](void* buf, storage_len_t len) { return FAIL; } default command storage_cookie_t SubLogWrite.currentOffset[uint8_t volume_id]() { return 0; } default command error_t SubLogWrite.erase[uint8_t volume_id]() { return FAIL; } default command error_t SubLogWrite.sync[uint8_t volume_id]() { return FAIL; } default event void LogRead.readDone[uint8_t volume_id](void* buf, storage_len_t len, error_t error) {} default event void LogRead.seekDone[uint8_t volume_id](error_t error) {} default event void LogWrite.appendDone[uint8_t volume_id](void* buf, storage_len_t len, bool recordsLost, error_t error) {} default event void LogWrite.eraseDone[uint8_t volume_id](error_t error) {} default event void LogWrite.syncDone[uint8_t volume_id](error_t error) {} command error_t ConfigStorage.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return call SubConfigStorage.read[volume_id](addr, buf, len); } event void SubConfigStorage.readDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { signal ConfigStorage.readDone[volume_id](addr, buf, len, error); } command error_t ConfigStorage.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return call SubConfigStorage.write[volume_id](addr, buf, len); } event void SubConfigStorage.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { signal ConfigStorage.writeDone[volume_id](addr, buf, len, error); } command error_t ConfigStorage.commit[uint8_t volume_id]() { return call SubConfigStorage.commit[volume_id](); } event void SubConfigStorage.commitDone[uint8_t volume_id](error_t error) { signal ConfigStorage.commitDone[volume_id](error); } command storage_len_t ConfigStorage.getSize[uint8_t volume_id]() { return call SubConfigStorage.getSize[volume_id](); } command bool ConfigStorage.valid[uint8_t volume_id]() { return call SubConfigStorage.valid[volume_id](); } command error_t Mount.mount[uint8_t volume_id]() { return call SubMount.mount[volume_id](); } event void SubMount.mountDone[uint8_t volume_id](error_t error) { signal Mount.mountDone[volume_id](error); } default command error_t SubConfigStorage.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t SubConfigStorage.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t SubConfigStorage.commit[uint8_t volume_id]() { return FAIL; } default command storage_len_t SubConfigStorage.getSize[uint8_t volume_id]() { return FAIL; } default command bool SubConfigStorage.valid[uint8_t volume_id]() { return FAIL; } default command error_t SubMount.mount[uint8_t volume_id]() { return FAIL; } default event void ConfigStorage.commitDone[uint8_t volume_id](error_t error) {} default event void ConfigStorage.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void ConfigStorage.readDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void Mount.mountDone[uint8_t volume_id](error_t error) {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread.h000066400000000000000000000121011207233610700233440ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the file to include in your top level application when using * the tosthread library. It defines all the tosthread_* commands and * #includes all of the needed header files for the basic tosthread * library calls * * @author Kevin Klues */ #ifndef TOSTHREAD_H_INCLUDED #define TOSTHREAD_H_INCLUDED #include "thread.h" /** * tosthread_main() * * This in the main entry point thread from which all tosthread applications begin. * @param NULL */ extern void tosthread_main(void* arg); /** * tosthread_create() * * This function creates a new tosthread. * * @param t A pointer to a thread identifier * @param start_routine The function called when the created thread starts running * @param arg The parameter passed to the start_routine for the created thread * @param stack_size The maximum stack size for this thread * @return An error code indicating whether the thread could be created or not * SUCCESS - The thread has been created * FAIL - The thread could not be created * EALREADY - The thread identifier is already associated with a * currently active thread */ extern error_t tosthread_create(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size); /** * tosthread_destroy() * * This function destroys a tosthread. * * @param t A pointer to a thread identifier * @return An error code indicating whether the thread could be destroyed or not * SUCCESS - The thread has been destroyed * FAIL - The thread could not be destroyed * EBUSY - The thread holds mutexes so cannot be destroyed * at the moment */ extern error_t tosthread_destroy(tosthread_t* t); /** * tosthread_pause() * * This function pauses a tosthread. * * @param t A pointer to a thread identifier * @return An error code indicating whether the thread could be paused or not * SUCCESS - The thread has been paused * FAIL - The thread could not be paused * EBUSY - The thread holds mutexes so cannot be paused * at the moment */ extern error_t tosthread_pause(tosthread_t* t); /** * tosthread_resume() * * This function resumes a previously paused tosthread. * * @param t A pointer to a thread identifier * @return An error code indicating whether the thread could be resumed or not * SUCCESS - The thread has been resumed * FAIL - The thread could not be resumed */ extern error_t tosthread_resume(tosthread_t* t); /** * tosthread_sleep() * * This function puts the currently running thread to sleep. * * @param milli The number of milliseconds to sleep for * @return An error code indicating whether the thread could be put to sleep or not * SUCCESS - The thread has been put to sleep * FAIL - The thread could not be put to sleep */ extern error_t tosthread_sleep(uint32_t milli); /** * tosthread_join(tosthread_t* t) * * This function bocks until the thread passed as a parameter has completed * * @param id The handle to the thread to block on * @return An error code indicating whether the thread could be waited on or not * SUCCESS - The thread has been waited on and is now completed * EALREADY - The thread we are trying to wait on has already completed * FAIL - The thread could not waited on */ extern error_t tosthread_join(tosthread_t* id); #endif //TOSTHREAD_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_amradio.h000066400000000000000000000062761207233610700250600ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Kevin Klues */ #ifndef TOSTHREAD_AMRADIO_H #define TOSTHREAD_AMRADIO_H #include "message.h" #include "AM.h" #include "TinyError.h" #ifndef AM_RECEIVE_FROM_ANY #define AM_RECEIVE_FROM_ANY 0XFF #endif extern error_t amRadioStart(); extern error_t amRadioStop(); extern error_t amRadioReceive(message_t* m, uint32_t timeout, am_id_t amId); extern error_t amRadioSnoop(message_t* m, uint32_t timeout, am_id_t amId); extern error_t amRadioSend(am_addr_t addr, message_t* msg, uint8_t len, am_id_t amId); extern am_addr_t amRadioGetLocalAddress(); extern am_group_t amRadioGetLocalGroup(); extern am_addr_t amRadioGetDestination(message_t* amsg); extern am_addr_t amRadioGetSource(message_t* amsg); extern void amRadioSetDestination(message_t* amsg, am_addr_t addr); extern void amRadioSetSource(message_t* amsg, am_addr_t addr); extern bool amRadioIsForMe(message_t* amsg); extern am_id_t amRadioGetType(message_t* amsg); extern void amRadioSetType(message_t* amsg, am_id_t t); extern am_group_t amRadioGetGroup(message_t* amsg); extern void amRadioSetGroup(message_t* amsg, am_group_t grp); extern void radioClear(message_t* msg); extern uint8_t radioGetPayloadLength(message_t* msg); extern void radioSetPayloadLength(message_t* msg, uint8_t len); extern uint8_t radioMaxPayloadLength(); extern void* radioGetPayload(message_t* msg, uint8_t len); extern error_t radioRequestAck( message_t* msg ); extern error_t radioNoAck( message_t* msg ); extern bool radioWasAcked(message_t* msg); #endif //TOSTHREAD_AMRADIO_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_amserial.h000066400000000000000000000061061207233610700252310ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #ifndef TOSTHREAD_AMSERIAL_H #define TOSTHREAD_AMSERIAL_H #include "message.h" #include "TinyError.h" #ifndef AM_RECEIVE_FROM_ANY #define AM_RECEIVE_FROM_ANY 0XFF #endif extern error_t amSerialStart(); extern error_t amSerialStop(); extern error_t amSerialReceive(message_t* m, uint32_t timeout, am_id_t amId); extern error_t amSerialSend(am_addr_t addr, message_t* msg, uint8_t len, am_id_t amId); extern am_addr_t amSerialLocalAddress(); extern am_group_t amSerialGetLocalGroup(); extern am_addr_t amSerialGetDestination(message_t* amsg); extern am_addr_t amSerialGetSource(message_t* amsg); extern void amSerialSetDestination(message_t* amsg, am_addr_t addr); extern void amSerialSetSource(message_t* amsg, am_addr_t addr); extern bool amSerialIsForMe(message_t* amsg); extern am_id_t amSerialGetType(message_t* amsg); extern void amSerialSetType(message_t* amsg, am_id_t t); extern am_group_t amSerialGetGroup(message_t* amsg); extern void amSerialSetGroup(message_t* amsg, am_group_t grp); extern void serialClear(message_t* msg); extern uint8_t serialGetPayloadLength(message_t* msg); extern void serialSetPayloadLength(message_t* msg, uint8_t len); extern uint8_t serialMaxPayloadLength(); extern void* serialGetPayload(message_t* msg, uint8_t len); extern error_t serialRequestAck( message_t* msg ); extern error_t serialNoAck( message_t* msg ); extern bool serialWasAcked(message_t* msg); #endif //TOSTHREAD_AMSERIAL_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_barrier.h000066400000000000000000000035631207233610700250660ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_BARRIER_H #define TOSTHREAD_BARRIER_H #include "barrier.h" extern void barrier_reset(barrier_t* b, uint8_t count); extern void barrier_block(barrier_t* b); extern bool barrier_isBlocking(barrier_t* b); #endif //TOSTHREAD_BARRIER_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_blockstorage.h000066400000000000000000000042421207233610700261120ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Author: Chieh-Jan Mike Liang */ #ifndef TOSTHREAD_BLOCKSTORAGE_H #define TOSTHREAD_BLOCKSTORAGE_H #include "Storage.h" extern error_t volumeBlockRead(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len); extern error_t volumeBlockWrite(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len); extern error_t volumeBlockCrc(uint8_t volumeId, storage_addr_t addr, storage_len_t* len, uint16_t crc, uint16_t *finalCrc); extern error_t volumeBlockErase(uint8_t volumeId); extern error_t volumeBlockSync(uint8_t volumeId); #endif //TOSTHREAD_BLOCKSTORAGE_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_condvar.h000066400000000000000000000037111207233610700250670ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_CONDVAR_H #define TOSTHREAD_CONDVAR_H #include "condvar.h" extern void condvar_init(condvar_t* c); extern void condvar_wait(condvar_t* c, mutex_t* m); extern void condvar_signalNext(condvar_t* c); extern void condvar_signalAll(condvar_t* c); extern bool condvar_isBlocking(condvar_t* c); #endif //TOSTHREAD_CONDVAR_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_configstorage.h000066400000000000000000000042471207233610700262720ustar00rootroot00000000000000/* * Copyright (c) 2009 RWTH Aachen University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author J gila Bitsch Link */ #ifndef TOSTHREAD_CONFIGSTORAGE_H #define TOSTHREAD_CONFIGSTORAGE_H #include "Storage.h" extern error_t volumeConfigMount(uint8_t volumeId); extern error_t volumeConfigRead(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len); extern error_t volumeConfigWrite(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len); extern error_t volumeConfigCommit(uint8_t volumeId); extern storage_len_t volumeConfigGetSize(uint8_t volumeId); extern bool volumeConfigValid(uint8_t volumeId); #endif // TOSTHREAD_CONFIGSTORAGE_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_leds.h000066400000000000000000000037311207233610700243640ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #ifndef TOSTHREAD_LEDS_H #define TOSTHREAD_LEDS_H extern void led0On(); extern void led0Off(); extern void led0Toggle(); extern void led1On(); extern void led1Off(); extern void led1Toggle(); extern void led2On(); extern void led2Off(); extern void led2Toggle(); extern uint8_t getLeds(); extern void setLeds(uint8_t val); #endif //TOSTHREAD_LEDS_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_linked_list.h000066400000000000000000000063441207233610700257410ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright *extern notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright *extern notice, this list of conditions and the following disclaimer in the *extern documentation and/or other materials provided with the *extern distribution. * - Neither the name of the Stanford University nor the names of *extern its contributors may be used to endorse or promote products derived *extern from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.extern IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #ifndef TOSTHREAD_LINKED_LIST_H #define TOSTHREAD_LINKED_LIST_H #include "linked_list.h" extern void linked_list_init(linked_list_t* l); extern void linked_list_clear(linked_list_t* l); extern uint8_t linked_list_size(linked_list_t* l); extern error_t linked_list_addFirst(linked_list_t* l, list_element_t* e); extern list_element_t* linked_list_getFirst(linked_list_t* l); extern list_element_t* linked_list_removeFirst(linked_list_t* l); extern error_t linked_list_addLast(linked_list_t* l, list_element_t* e); extern list_element_t* linked_list_getLast(linked_list_t* l); extern list_element_t* linked_list_removeLast(linked_list_t* l); extern error_t linked_list_addAt(linked_list_t* l, list_element_t* e, uint8_t i); extern list_element_t* linked_list_getAt(linked_list_t* l, uint8_t i); extern list_element_t* linked_list_removeAt(linked_list_t* l, uint8_t i); extern error_t linked_list_addAfter(linked_list_t* l, list_element_t* first, list_element_t* second); extern error_t linked_list_addBefore(linked_list_t* l, list_element_t* first, list_element_t* e); extern list_element_t* linked_list_getAfter(linked_list_t* l, list_element_t* e); extern list_element_t* linked_list_getBefore(linked_list_t* l, list_element_t* e); extern list_element_t* linked_list_remove(linked_list_t* l, list_element_t* e); extern list_element_t* linked_list_removeBefore(linked_list_t* l, list_element_t* e); extern list_element_t* linked_list_removeAfter(linked_list_t* l, list_element_t* e); extern uint8_t linked_list_indexOf(linked_list_t* l, list_element_t* e); #endif //TOSTHREAD_LINKED_LIST_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_logstorage.h000066400000000000000000000044211207233610700256000ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_LOGSTORAGE_H #define TOSTHREAD_LOGSTORAGE_H #include "Storage.h" extern error_t volumeLogRead(uint8_t volumeId, void *buf, storage_len_t *len); extern storage_cookie_t volumeLogCurrentReadOffset(uint8_t volumeId); extern error_t volumeLogSeek(uint8_t volumeId, storage_cookie_t offset); extern storage_len_t volumeLogGetSize(uint8_t volumeId); extern error_t volumeLogAppend(uint8_t volumeId, void* buf, storage_len_t *len, bool *recordsLost); extern storage_cookie_t volumeLogCurrentWriteOffset(uint8_t volumeId); extern error_t volumeLogErase(uint8_t volumeId); extern error_t volumeLogSync(uint8_t volumeId); #endif //TOSTHREAD_LOGSTORAGE_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_mutex.h000066400000000000000000000035471207233610700246040ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_MUTEX_H #define TOSTHREAD_MUTEX_H #include "mutex.h" #include "TinyError.h" extern void mutex_init(mutex_t* m); extern error_t mutex_lock(mutex_t* m); extern error_t mutex_unlock(mutex_t* m); #endif //TOSTHREAD_MUTEX_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_queue.h000066400000000000000000000041221207233610700245540ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright *extern notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright *extern notice, this list of conditions and the following disclaimer in the *extern documentation and/or other materials provided with the *extern distribution. * - Neither the name of the Stanford University nor the names of *extern its contributors may be used to endorse or promote products derived *extern from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.extern IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #ifndef TOSTHREAD_QUEUE_H #define TOSTHREAD_QUEUE_H #include "queue.h" extern void queue_init(queue_t* q); extern void queue_clear(queue_t* q); extern error_t queue_enqueue(queue_t* q, queue_element_t* e); extern queue_element_t* queue_dequeue(queue_t* q); extern queue_element_t* queue_remove(queue_t* q, queue_element_t* e); extern uint8_t queue_size(queue_t* q); extern bool queue_is_empty(queue_t* q); #endif //TOSTHREAD_QUEUE_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_random.h000066400000000000000000000035101207233610700247100ustar00rootroot00000000000000/* * Copyright (c) 2009 RWTH Aachen University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author J gila Bitsch Link */ #ifndef TOSTHREAD_RANDOM_H #define TOSTHREAD_RANDOM_H #include "TinyError.h" extern error_t randSeed(uint16_t seed); extern uint16_t rand16(); extern uint32_t rand32(); #endif //TOSTHREAD_RANDOM_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_refcounter.h000066400000000000000000000037721207233610700256160ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_REFCOUNTER_H #define TOSTHREAD_REFCOUNTER_H #include "refcounter.h" extern void refcounter_init(refcounter_t* r); extern void refcounter_increment(refcounter_t* r); extern void refcounter_decrement(refcounter_t* r); extern void refcounter_waitOnValue(refcounter_t* r, uint8_t count); extern uint8_t refcounter_count(refcounter_t* r); #endif //TOSTHREAD_REFCOUNTER_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_semaphore.h000066400000000000000000000036331207233610700254210ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_SEMAPHORE_H #define TOSTHREAD_SEMAPHORE_H #include "semaphore.h" #include "TinyError.h" extern void semaphore_reset(semaphore_t* s, uint8_t v); extern error_t semaphore_acquire(semaphore_t* s); extern error_t semaphore_release(semaphore_t* s); #endif //TOSTHREAD_MUTEX_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/csystem/tosthread_threadsync.h000066400000000000000000000035651207233610700256060ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_THREADSYNC_H #define TOSTHREAD_THREADSYNC_H #include "tosthread_mutex.h" #include "tosthread_semaphore.h" #include "tosthread_barrier.h" #include "tosthread_condvar.h" #include "tosthread_refcounter.h" #endif //TOSTHREAD_THREADSYNC_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/000077500000000000000000000000001207233610700216375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/Barrier.nc000066400000000000000000000046541207233610700235600ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface for using Barrier synchronization with tosthreads. * * @author Kevin Klues */ #include "barrier.h" interface Barrier { /** * Reset a barrier for use. * @param b The barrier you would like to reset. * @param count The number of threads that must call * block before the flood gates open and * the barrier is unblocked. */ command void reset(barrier_t* b, uint8_t count); /** * Block on a barrier until all threads have called * block() as indicated in the count parameter to reset() * @param b The barrier you would like to block on. */ command void block(barrier_t* b); /** * Query whether a barrier is currently blocked or not * @param b The barrier you would like to query. * @return TRUE or FALSE */ command bool isBlocking(barrier_t* b); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BitArrayUtils.nc000066400000000000000000000036641207233610700247300ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang * @author Kevin Klues */ interface BitArrayUtils { async command void clrArray(uint8_t* array, uint8_t numBytes); async command bool getBit(uint8_t* array, uint8_t idx); async command void setBit(uint8_t* array, uint8_t idx); async command void clrBit(uint8_t* array, uint8_t idx); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingAMSend.nc000066400000000000000000000035641207233610700247510ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include #include #include interface BlockingAMSend { command error_t send(am_addr_t addr, message_t* msg, uint8_t len); command uint8_t maxPayloadLength(); command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingBlock.nc000066400000000000000000000040131207233610700246620ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "Storage.h" interface BlockingBlock { command error_t read(storage_addr_t addr, void *buf, storage_len_t* len); command error_t computeCrc(storage_addr_t addr, storage_len_t* len, uint16_t crc, uint16_t *finalCrc); command storage_len_t getSize(); command error_t write(storage_addr_t addr, void *buf, storage_len_t* len); command error_t erase(); command error_t sync(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingConfig.nc000066400000000000000000000036341207233610700250450ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "Storage.h" interface BlockingConfig { command error_t read(storage_addr_t addr, void* buf, storage_len_t* len); command error_t write(storage_addr_t addr, void* buf, storage_len_t* len); command error_t commit(); command storage_len_t getSize(); command bool valid(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingLog.nc000066400000000000000000000040341207233610700243540ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "Storage.h" interface BlockingLog { command error_t read(void *buf, storage_len_t *len); command storage_cookie_t currentReadOffset(); command error_t seek(storage_cookie_t offset); command storage_len_t getSize(); command error_t append(void* buf, storage_len_t *len, bool *recordsLost); command storage_cookie_t currentWriteOffset(); command error_t erase(); command error_t sync(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingMount.nc000066400000000000000000000046131207233610700247400ustar00rootroot00000000000000/* Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Mount a volume. * * @author David Gay * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $ */ /* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ interface BlockingMount { /** * Mount a particular volume. This must be done before the volume's * first use. mountDone will be signaled if SUCCESS is * returned. * @return SUCCESS if mount request is accepted, FAIL if mount has * already been attempted. */ command error_t mount(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingRead.nc000066400000000000000000000035561207233610700245160ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface BlockingRead { /** * Read a value * * @param val pointer for where to store the value that has been read * @return SUCCESS if a readDone() event will eventually come back. */ command error_t read(val_t* val); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingReadStream.nc000066400000000000000000000043171207233610700256660ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface BlockingReadStream { /** * Directs the device to fill a buffer by sampling with the * specified period. * * @param usPeriod the between-sample period in microseconds * @param buf a pointer to the buffer * @param count the number of values the buffer should hold * @param usActualPeriod Actual sampling period used - may be * different from period requested. Undefined if * result != SUCCESS. * * @return SUCCESS if the reading was carried out successfully */ command error_t read(uint32_t* usPeriod, val_t* buf, uint16_t count); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingReceive.nc000066400000000000000000000034661207233610700252250ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include #include interface BlockingReceive { command error_t receive(message_t* m, uint32_t timeout); command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingResource.nc000066400000000000000000000034331207233610700254240ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ interface BlockingResource { command error_t request(); command error_t release(); command error_t timedRelease(uint32_t milli); command bool isOwner(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingSend.nc000066400000000000000000000035231207233610700245260ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ interface BlockingSend { command error_t send(message_t* msg, uint8_t len); command error_t cancel(message_t* msg); command uint8_t maxPayloadLength(); command void* getPayload(message_t* msg, uint8_t len); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/BlockingStdControl.nc000066400000000000000000000034111207233610700257240ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include #include #include interface BlockingStdControl { command error_t start(); command error_t stop(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ConditionVariable.nc000066400000000000000000000061341207233610700255610ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface for using Conddition Variables for synchronization * with tosthreads. * * @author Kevin Klues */ #include "condvar.h" interface ConditionVariable { /** * Reset a condition variable for use. * @param c The condition variable you would like to reset. */ command void init(condvar_t* c); /** * Wait on a condition variable until one of the signal * calls unbocks me. In the process, unlock the mutex * passed in to me. * @param c The condition variable you would like to wait on. * @param m The mutex you would like to unlock */ command void wait(condvar_t* c, mutex_t* m); /** * Signal the next thread waiting on this condition variable * to continue execution. To unblock all threads waiting on * this condition vairable use signalAll(). * @param c The condition variable associated with the thread * you would like to signal. */ command void signalNext(condvar_t* c); /** * Signal all threads waiting on this condition variable * to continue execution. To unblock just the next thread * waiting on this condition vairable use signalNext(). * @param c The condition variable associated with the thread * you would like to signal. */ command void signalAll(condvar_t* c); /** * Query whether a condition variable is currently blocking * any threads from executing. * @param c The cndition variable you would like to query. * @return TRUE or FALSE */ command bool isBlocking(condvar_t* c); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/DynamicThread.nc000066400000000000000000000112361207233610700247000ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface DynamicThread { /** * create() * * This function creates a new tosthread. * * @param t A pointer to a unique handler associated with the thread being created * @param start_routine The function called when the created thread starts running * @param arg The parameter passed to the start_routine for the created thread * @param stack_size The maximum stack size for this thread * @return An error code indicating whether the thread could be created or not * SUCCESS - The thread has been created * FAIL - The thread could not be created * EALREADY - The thread identifier is already associated with a * currently active thread */ command error_t create(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size); /** * destroy() * * This function destroys a tosthread. * * @param t A pointer to a thread identifier * @return An error code indicating whether the thread could be destroyed or not * SUCCESS - The thread has been destroyed * FAIL - The thread could not be destroyed * EBUSY - The thread holds mutexes so cannot be destroyed * at the moment */ command error_t destroy(tosthread_t* t); /** * tosthread_pause() * * This function pauses a tosthread. * * @param t A pointer to a thread identifier * @return An error code indicating whether the thread could be paused or not * SUCCESS - The thread has been paused * FAIL - The thread could not be paused * EBUSY - The thread holds mutexes so cannot be paused * at the moment */ command error_t pause(tosthread_t* t); /** * resume() * * This function resumes a previously paused tosthread. * * @param t A pointer to a thread identifier * @return An error code indicating whether the thread could be resumed or not * SUCCESS - The thread has been resumed * FAIL - The thread could not be resumed */ command error_t resume(tosthread_t* t); /** * sleep() * * This function puts the currently running thread to sleep. * * @param milli The number of milliseconds to sleep for * @return An error code indicating whether the thread could be put to sleep or not * SUCCESS - The thread has been put to sleep * FAIL - The thread could not be put to sleep */ command error_t sleep(uint32_t milli); /** * join(tosthread_t* t) * * This function bocks until the thread passed as a parameter has completed * * @param id The handle to the thread to block on * @return An error code indicating whether the thread could be waited on or not * SUCCESS - The thread has been waited on and is now completed * EALREADY - The thread we are trying to wait on has already completed * FAIL - The thread could not waited on */ command error_t join(tosthread_t* id); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/LinkedList.nc000066400000000000000000000060551207233610700242310ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "linked_list.h" interface LinkedList { async command void init(linked_list_t* l); async command void clear(linked_list_t* l); async command uint8_t size(linked_list_t* l); async command error_t addAt(linked_list_t* l, list_element_t* e, uint8_t i); async command error_t addFirst(linked_list_t* l, list_element_t* e); async command error_t addLast(linked_list_t* l, list_element_t* e); async command error_t addAfter(linked_list_t* l, list_element_t* first, list_element_t* second); async command error_t addBefore(linked_list_t* l, list_element_t* first, list_element_t* second); async command list_element_t* getAt(linked_list_t* l, uint8_t i); async command list_element_t* getFirst(linked_list_t* l); async command list_element_t* getLast(linked_list_t* l); async command list_element_t* getAfter(linked_list_t* l, list_element_t* e); async command list_element_t* getBefore(linked_list_t* l, list_element_t* e); async command uint8_t indexOf(linked_list_t* l, list_element_t* e); async command list_element_t* remove(linked_list_t* l, list_element_t* e); async command list_element_t* removeAt(linked_list_t* l, uint8_t i); async command list_element_t* removeFirst(linked_list_t* l); async command list_element_t* removeLast(linked_list_t* l); async command list_element_t* removeBefore(linked_list_t* l, list_element_t* e); async command list_element_t* removeAfter(linked_list_t* l, list_element_t* e); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/Malloc.nc000066400000000000000000000033331207233610700233720ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface Malloc { async command void* malloc(size_t size); async command void free (void *p); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/Mutex.nc000066400000000000000000000034121207233610700232630ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "mutex.h" interface Mutex { command void init(mutex_t* m); command error_t lock(mutex_t* m); command error_t unlock(mutex_t* m); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/PlatformInterrupt.nc000066400000000000000000000032721207233610700256660ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface PlatformInterrupt { async command void postAmble(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/PoolThread.nc000066400000000000000000000005021207233610700242170ustar00rootroot00000000000000 /** * @author Jeongyeup Paek (jpaek@enl.usc.edu) **/ interface PoolThread { command error_t allocate(uint8_t* t, void (*start_routine)(void*), void* arg); command error_t release(uint8_t t); command error_t pause(uint8_t t); command error_t resume(uint8_t t); command error_t sleep(uint32_t milli); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ReferenceCounter.nc000066400000000000000000000036601207233610700254240ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "refcounter.h" interface ReferenceCounter { async command void init(refcounter_t* r); async command void increment(refcounter_t* r); async command void decrement(refcounter_t* r); async command void waitOnValue(refcounter_t* r, uint8_t count); async command uint8_t count(refcounter_t* r); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/Semaphore.nc000066400000000000000000000035151207233610700241100ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "semaphore.h" /* * Counting semaphore */ interface Semaphore { command void reset(semaphore_t* s, uint8_t v); command error_t acquire(semaphore_t* s); command error_t release(semaphore_t* s); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/SystemCall.nc000066400000000000000000000034501207233610700242430ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "TinyError.h" interface SystemCall { command error_t start(void* syscall_ptr, syscall_t* s, syscall_id_t id, void* params); command error_t finish(syscall_t* s); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/SystemCallQueue.nc000066400000000000000000000040561207233610700252530ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" #include "syscall_queue.h" interface SystemCallQueue { async command void init(syscall_queue_t* q); async command void enqueue(syscall_queue_t* q, syscall_t* t); async command syscall_t* dequeue(syscall_queue_t* q); async command syscall_t* remove(syscall_queue_t* q, syscall_t* t); async command syscall_t* find(syscall_queue_t* q, syscall_id_t id); async command bool isEmpty(syscall_queue_t* q); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/TaskScheduler.nc000066400000000000000000000057671207233610700247410ustar00rootroot00000000000000// $Id: TaskScheduler.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* tab:4 * Copyright (c) 2004-5 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-5 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The interface to a TinyOS task scheduler. * * @author Philip Levis * @author Kevin Klues * @date January 19 2005 * @see TEP 106: Tasks and Schedulers * @see TEP 107: Boot Sequence */ interface TaskScheduler { /** * Initialize the scheduler. */ command void init(); /** * Run the next task if one is waiting, otherwise return immediately. * * @return whether a task was run -- TRUE indicates a task * ran, FALSE indicates there was no task to run. */ command bool runNextTask(); /** * Check to see if there are any pending tasks in the task queue. * * @return whether there are any tasks waiting to run */ async command bool hasTasks(); /** * Enter an infinite task-running loop. Put the MCU into a low power * state when the processor is idle (task queue empty, waiting for * interrupts). This call never returns. */ command void taskLoop(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/Thread.nc000066400000000000000000000035421207233610700233740ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface Thread { command error_t start(void* arg); command error_t stop(); command error_t pause(); command error_t resume(); command error_t sleep(uint32_t milli); event void run(void* arg); command error_t join(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ThreadCleanup.nc000066400000000000000000000032621207233610700247030ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface ThreadCleanup { async event void cleanup(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ThreadFunction.nc000066400000000000000000000032761207233610700251060ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface ThreadFunction { event void signalThreadRun(void* arg); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ThreadInfo.nc000066400000000000000000000033501207233610700242050ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" interface ThreadInfo { async command error_t reset(); async command thread_t* get(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ThreadNotification.nc000066400000000000000000000033401207233610700257370ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface ThreadNotification { async event void justCreated(); async event void aboutToDestroy(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ThreadQueue.nc000066400000000000000000000037001207233610700243750ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread_queue.h" interface ThreadQueue { async command void init(thread_queue_t* q); async command void enqueue(thread_queue_t* q, thread_t* t); async command thread_t* dequeue(thread_queue_t* q); async command thread_t* remove(thread_queue_t* q, thread_t* t); async command bool isEmpty(thread_queue_t* q); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ThreadScheduler.nc000066400000000000000000000042271207233610700252340ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" interface ThreadScheduler { async command uint8_t currentThreadId(); async command thread_t* currentThreadInfo(); async command thread_t* threadInfo(thread_id_t id); command error_t initThread(thread_id_t id); command error_t startThread(thread_id_t id); command error_t stopThread(thread_id_t id); async command error_t suspendCurrentThread(); async command error_t interruptCurrentThread(); async command error_t wakeupThread(thread_id_t id); async command error_t joinThread(thread_id_t id); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/interfaces/ThreadSleep.nc000066400000000000000000000032731207233610700243660ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ interface ThreadSleep { command error_t sleep(uint32_t milli); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/000077500000000000000000000000001207233610700202625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/000077500000000000000000000000001207233610700210505ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/BlockingCollectionControlC.nc000066400000000000000000000042471207233610700266110ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ configuration BlockingCollectionControlC { provides { interface BlockingStdControl as RoutingControl; interface RootControl; } } implementation { components CollectionC as Collector, SystemCallC, MutexC, BlockingCollectionControlP; RoutingControl = BlockingCollectionControlP.BlockingStdControl; RootControl = Collector; BlockingCollectionControlP.RoutingControl -> Collector.StdControl; BlockingCollectionControlP.SystemCall -> SystemCallC; BlockingCollectionControlP.Mutex -> MutexC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/BlockingCollectionControlP.nc000066400000000000000000000052641207233610700266260ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ module BlockingCollectionControlP { provides { interface BlockingStdControl; interface Init; } uses { interface StdControl as RoutingControl; interface SystemCall; interface Mutex; } } implementation { typedef struct params { error_t error; } params_t; syscall_t* start_call = NULL; mutex_t my_mutex; command error_t Init.init() { call Mutex.init(&my_mutex); return SUCCESS; } void startTask(syscall_t* s) { params_t* p = s->params; p->error = call RoutingControl.start(); call SystemCall.finish(s); } command error_t BlockingStdControl.start() { syscall_t s; params_t p; call Mutex.lock(&my_mutex); if (start_call == NULL) { start_call = &s; call SystemCall.start(&startTask, &s, INVALID_ID, &p); start_call = NULL; } else { p.error = EBUSY; } atomic { call Mutex.unlock(&my_mutex); return p.error; } } command error_t BlockingStdControl.stop() { return call RoutingControl.stop(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/BlockingCollectionReceiverC.nc000066400000000000000000000037141207233610700267330ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ generic configuration BlockingCollectionReceiverC (collection_id_t id) { provides { interface BlockingReceive; interface Packet; } } implementation { components BlockingCollectionReceiverP, CollectionC as Collector; BlockingReceive = BlockingCollectionReceiverP.BlockingReceive[id]; Packet = Collector; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/BlockingCollectionReceiverP.nc000066400000000000000000000051411207233610700267440ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ configuration BlockingCollectionReceiverP { provides { interface BlockingReceive[collection_id_t id]; interface BlockingReceive as BlockingReceiveAny; } } implementation { components new BlockingAMReceiverImplP() as BlockingCollectionReceiverImplP, CollectionC as Collector, ThreadTimersC, MainC, SystemCallC, SystemCallQueueC, TinyThreadSchedulerC; MainC.SoftwareInit -> BlockingCollectionReceiverImplP; BlockingReceive = BlockingCollectionReceiverImplP; BlockingReceiveAny = BlockingCollectionReceiverImplP; BlockingCollectionReceiverImplP.Receive -> Collector.Receive; BlockingCollectionReceiverImplP.Timer -> ThreadTimersC; BlockingCollectionReceiverImplP.SystemCallQueue -> SystemCallQueueC; BlockingCollectionReceiverImplP.SystemCall -> SystemCallC; BlockingCollectionReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC; BlockingCollectionReceiverImplP.Packet -> Collector; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/BlockingCollectionSnooperC.nc000066400000000000000000000036031207233610700266110ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ generic configuration BlockingCollectionSnooperC (collection_id_t id) { provides { interface BlockingReceive as BlockingSnoop; } } implementation { components BlockingCollectionSnooperP; BlockingSnoop = BlockingCollectionSnooperP.BlockingSnoop[id]; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/BlockingCollectionSnooperP.nc000066400000000000000000000051511207233610700266260ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ configuration BlockingCollectionSnooperP { provides { interface BlockingReceive as BlockingSnoop[collection_id_t id]; interface BlockingReceive as BlockingSnoopAny; } } implementation { components new BlockingAMReceiverImplP() as BlockingCollectionReceiverImplP, CollectionC as Collector, ThreadTimersC, MainC, SystemCallC, SystemCallQueueC, TinyThreadSchedulerC; MainC.SoftwareInit -> BlockingCollectionReceiverImplP; BlockingSnoop = BlockingCollectionReceiverImplP; BlockingSnoopAny = BlockingCollectionReceiverImplP; BlockingCollectionReceiverImplP.Receive -> Collector.Snoop; BlockingCollectionReceiverImplP.Timer -> ThreadTimersC; BlockingCollectionReceiverImplP.SystemCallQueue -> SystemCallQueueC; BlockingCollectionReceiverImplP.SystemCall -> SystemCallC; BlockingCollectionReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC; BlockingCollectionReceiverImplP.Packet -> Collector; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/CCollectionId.nc000066400000000000000000000034161207233610700240510ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ interface CCollectionId { command collection_id_t fetch(uint8_t clientid); command error_t set(uint8_t clientid, collection_id_t collectionid); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/ctp/000077500000000000000000000000001207233610700216365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderC.nc000066400000000000000000000042631207233610700271750ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang * @author Kevin Klues */ #include generic configuration BlockingCollectionSenderC (collection_id_t collectid) { provides { interface BlockingSend; interface Packet; } } implementation { components BlockingCollectionSenderP, new CollectionIdP(collectid), CollectionC as Collector; enum { CLIENT_ID = unique(UQ_CTP_CLIENT), }; BlockingSend = BlockingCollectionSenderP.BlockingSend[CLIENT_ID]; Packet = Collector; Collector.CollectionId[CLIENT_ID] -> CollectionIdP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderImplP.nc000066400000000000000000000064471207233610700300420ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ module BlockingCollectionSenderImplP { provides { interface BlockingSend[uint8_t client]; interface Init; } uses { interface Send[uint8_t client]; interface SystemCall; interface Mutex; interface Packet; interface Leds; } } implementation { typedef struct params { message_t *msg; uint8_t len; error_t error; } params_t; syscall_t* send_call; mutex_t my_mutex; command error_t Init.init() { call Mutex.init(&my_mutex); return SUCCESS; } void sendTask(syscall_t *s) { params_t* p = s->params; p->error = call Send.send[s->id](p->msg, p->len); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingSend.send[uint8_t client](message_t *msg, uint8_t len) { syscall_t s; params_t p; call Mutex.lock(&my_mutex); send_call = &s; p.msg = msg; p.len = len; call SystemCall.start(&sendTask, &s, client, &p); atomic { call Mutex.unlock(&my_mutex); return p.error; } } event void Send.sendDone[uint8_t client](message_t* m, error_t error) { if (client == send_call->id) { params_t* p; p = send_call->params; p->error = error; call SystemCall.finish(send_call); } } command error_t BlockingSend.cancel[uint8_t client](message_t* msg) { return call Send.cancel[client](msg); } command uint8_t BlockingSend.maxPayloadLength[uint8_t client]() { return call Send.maxPayloadLength[client](); } command void* BlockingSend.getPayload[uint8_t client](message_t* msg, uint8_t len) { return call Send.getPayload[client](msg, len); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderP.nc000066400000000000000000000045121207233610700272070ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang * @author Kevin Klues */ configuration BlockingCollectionSenderP { provides { interface BlockingSend[uint8_t id]; } } implementation { components BlockingCollectionSenderImplP, CollectionC as Collector, MutexC, SystemCallC, MainC, LedsC; MainC.SoftwareInit -> BlockingCollectionSenderImplP; BlockingSend = BlockingCollectionSenderImplP.BlockingSend; BlockingCollectionSenderImplP.Mutex -> MutexC; BlockingCollectionSenderImplP.SystemCall -> SystemCallC; BlockingCollectionSenderImplP.Send -> Collector; BlockingCollectionSenderImplP.Packet -> Collector; BlockingCollectionSenderImplP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/ctp/CCollectionC.nc000066400000000000000000000045341207233610700244670ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "tosthread_collection.h" #include "Ctp.h" configuration CCollectionC {} implementation { components CCollectionP as CCP; components BlockingCollectionReceiverP; components BlockingCollectionSnooperP; components BlockingCollectionSenderP; components BlockingCollectionControlC; components CCollectionIdP; CCP.BlockingReceive -> BlockingCollectionReceiverP; CCP.BlockingSnoop -> BlockingCollectionSnooperP; CCP.BlockingSend -> BlockingCollectionSenderP; CCP.RoutingControl -> BlockingCollectionControlC; CCP.CCollectionId -> CCollectionIdP; components CollectionC; CCP.Packet -> CollectionC; CCP.CollectionPacket -> CollectionC; CCP.RootControl -> CollectionC; CollectionC.CollectionId -> CCP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/ctp/CCollectionIdP.nc000066400000000000000000000042111207233610700247510ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ module CCollectionIdP { provides { interface CCollectionId; } } implementation { collection_id_t clientCollectionIds[uniqueCount(UQ_CTP_CLIENT)]; command collection_id_t CCollectionId.fetch(uint8_t clientid) { return clientCollectionIds[clientid]; } command error_t CCollectionId.set(uint8_t clientid, collection_id_t collectionid) { if (clientid < uniqueCount(UQ_CTP_CLIENT)) { clientCollectionIds[clientid] = collectionid; return SUCCESS; } return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/ctp/CCollectionP.nc000066400000000000000000000112271207233610700245010ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @author Chieh-Jan Mike Liang */ module CCollectionP { uses { interface BlockingStdControl as RoutingControl; interface BlockingReceive[collection_id_t id]; interface BlockingReceive as BlockingSnoop[collection_id_t id]; interface BlockingSend[uint8_t id]; interface Packet; interface CollectionPacket; interface RootControl; interface CCollectionId; } provides { interface CollectionId[uint8_t client]; } } implementation { command collection_id_t CollectionId.fetch[uint8_t id]() { return call CCollectionId.fetch(id); } error_t collectionSetCollectionId(uint8_t clientid, collection_id_t collectionid) @C() AT_SPONTANEOUS { return call CCollectionId.set(clientid, collectionid); } error_t collectionRoutingStart() @C() AT_SPONTANEOUS { return call RoutingControl.start(); } error_t collectionRoutingStop() @C() AT_SPONTANEOUS { return call RoutingControl.stop(); } error_t collectionReceive(message_t* m, uint32_t timeout, collection_id_t id) @C() AT_SPONTANEOUS { return call BlockingReceive.receive[id](m, timeout); } error_t collectionSnoop(message_t* m, uint32_t timeout, collection_id_t id) @C() AT_SPONTANEOUS { return call BlockingSnoop.receive[id](m, timeout); } error_t collectionSend(message_t* msg, uint8_t len, uint8_t id) @C() AT_SPONTANEOUS { return call BlockingSend.send[id](msg, len); } void collectionClear(message_t* msg) @C() AT_SPONTANEOUS { call Packet.clear(msg); } uint8_t collectionGetPayloadLength(message_t* msg) @C() AT_SPONTANEOUS { return call Packet.payloadLength(msg); } void collectionSetPayloadLength(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS { call Packet.setPayloadLength(msg, len); } uint8_t collectionMaxPayloadLength() @C() AT_SPONTANEOUS { return call Packet.maxPayloadLength(); } void* collectionGetPayload(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS { return call Packet.getPayload(msg, len); } am_addr_t collectionGetOrigin(message_t* msg) @C() AT_SPONTANEOUS { return call CollectionPacket.getOrigin(msg); } void collectionSetOrigin(message_t* msg, am_addr_t addr) @C() AT_SPONTANEOUS { call CollectionPacket.setOrigin(msg, addr); } collection_id_t collectionGetType(message_t* msg) @C() AT_SPONTANEOUS { return call CollectionPacket.getType(msg); } void collectionSetType(message_t* msg, collection_id_t id) @C() AT_SPONTANEOUS { call CollectionPacket.setType(msg, id); } uint8_t collectionGetSequenceNumber(message_t* msg) @C() AT_SPONTANEOUS { return call CollectionPacket.getSequenceNumber(msg); } void collectionSetSequenceNumber(message_t* msg, uint8_t seqno) @C() AT_SPONTANEOUS { call CollectionPacket.setSequenceNumber(msg, seqno); } error_t collectionSetRoot() @C() AT_SPONTANEOUS { return call RootControl.setRoot(); } error_t collectionUnsetRoot() @C() AT_SPONTANEOUS { return call RootControl.unsetRoot(); } bool collectionIsRoot() @C() AT_SPONTANEOUS { return call RootControl.isRoot(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/ctp/ccollection.h000066400000000000000000000035261207233610700243130ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef CCOLLECTION_H #define CCOLLECTION_H #include "message.h" #include "TinyError.h" #include "Collection.h" #include "Ctp.h" #define NEW_COLLECTION_CLIENT_ID() ((uint8_t)unique(UQ_CTP_CLIENT)) #endif //CCOLLECTION_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/lqi/000077500000000000000000000000001207233610700216355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderC.nc000066400000000000000000000043131207233610700271700ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang * @author Kevin Klues */ #include generic configuration BlockingCollectionSenderC (collection_id_t collectid) { provides { interface BlockingSend; interface Packet; } } implementation { components BlockingCollectionSenderP, new CollectionIdP(collectid), CollectionC as Collector; enum { CLIENT_ID = unique(UQ_LQI_CLIENT), }; BlockingSend = BlockingCollectionSenderP.BlockingSend[CLIENT_ID]; Packet = Collector; BlockingCollectionSenderP.CollectionId[CLIENT_ID] -> CollectionIdP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderImplP.nc000066400000000000000000000070241207233610700300310ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ module BlockingCollectionSenderImplP { provides { interface BlockingSend[uint8_t client]; interface Init; } uses { interface Send[uint8_t client]; interface SystemCall; interface Mutex; interface Packet; interface Leds; interface CollectionPacket; interface CollectionId[uint8_t client]; } } implementation { typedef struct params { message_t *msg; uint8_t len; error_t error; } params_t; syscall_t* send_call; mutex_t my_mutex; command error_t Init.init() { call Mutex.init(&my_mutex); return SUCCESS; } void sendTask(syscall_t *s) { params_t* p = s->params; call CollectionPacket.setType(p->msg, call CollectionId.fetch[s->id]()); p->error = call Send.send[s->id](p->msg, p->len); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingSend.send[uint8_t client](message_t *msg, uint8_t len) { syscall_t s; params_t p; call Mutex.lock(&my_mutex); send_call = &s; p.msg = msg; p.len = len; call SystemCall.start(&sendTask, &s, client, &p); atomic { call Mutex.unlock(&my_mutex); return p.error; } } event void Send.sendDone[uint8_t client](message_t* m, error_t error) { if (client == send_call->id) { params_t* p; p = send_call->params; p->error = error; call SystemCall.finish(send_call); } } command error_t BlockingSend.cancel[uint8_t client](message_t* msg) { return call Send.cancel[client](msg); } command uint8_t BlockingSend.maxPayloadLength[uint8_t client]() { return call Send.maxPayloadLength[client](); } command void* BlockingSend.getPayload[uint8_t client](message_t* msg, uint8_t len) { return call Send.getPayload[client](msg, len); } default command collection_id_t CollectionId.fetch[uint8_t id]() { return 0; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderP.nc000066400000000000000000000047611207233610700272140ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang * @author Kevin Klues */ configuration BlockingCollectionSenderP { provides { interface BlockingSend[uint8_t id]; } uses { interface CollectionId[uint8_t id]; } } implementation { components BlockingCollectionSenderImplP, CollectionC as Collector, MutexC, SystemCallC, MainC, LedsC; MainC.SoftwareInit -> BlockingCollectionSenderImplP; BlockingSend = BlockingCollectionSenderImplP.BlockingSend; CollectionId = BlockingCollectionSenderImplP; BlockingCollectionSenderImplP.Mutex -> MutexC; BlockingCollectionSenderImplP.SystemCall -> SystemCallC; BlockingCollectionSenderImplP.Send -> Collector; BlockingCollectionSenderImplP.Packet -> Collector; BlockingCollectionSenderImplP.Leds -> LedsC; BlockingCollectionSenderImplP.CollectionPacket -> Collector; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/lqi/CCollectionC.nc000066400000000000000000000045011207233610700244600ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "tosthread_collection.h" #include "MultiHopLqi.h" configuration CCollectionC {} implementation { components CCollectionP as CCP; components BlockingCollectionReceiverP; components BlockingCollectionSnooperP; components BlockingCollectionSenderP; components BlockingCollectionControlC; components CCollectionIdP; CCP.BlockingReceive -> BlockingCollectionReceiverP; CCP.BlockingSnoop -> BlockingCollectionSnooperP; CCP.BlockingSend -> BlockingCollectionSenderP; CCP.RoutingControl -> BlockingCollectionControlC; CCP.CCollectionId -> CCollectionIdP; components CollectionC; CCP.Packet -> CollectionC; CCP.CollectionPacket -> CollectionC; CCP.RootControl -> CollectionC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/lqi/CCollectionIdP.nc000066400000000000000000000042111207233610700247500ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang */ module CCollectionIdP { provides { interface CCollectionId; } } implementation { collection_id_t clientCollectionIds[uniqueCount(UQ_LQI_CLIENT)]; command collection_id_t CCollectionId.fetch(uint8_t clientid) { return clientCollectionIds[clientid]; } command error_t CCollectionId.set(uint8_t clientid, collection_id_t collectionid) { if (clientid < uniqueCount(UQ_LQI_CLIENT)) { clientCollectionIds[clientid] = collectionid; return SUCCESS; } return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/lqi/CCollectionP.nc000066400000000000000000000113351207233610700245000ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @author Chieh-Jan Mike Liang */ module CCollectionP { uses { interface BlockingStdControl as RoutingControl; interface BlockingReceive[collection_id_t id]; interface BlockingReceive as BlockingSnoop[collection_id_t id]; interface BlockingSend[uint8_t id]; interface Packet; interface CollectionPacket; interface RootControl; interface CCollectionId; } provides { interface CollectionId[uint8_t client]; } } implementation { command collection_id_t CollectionId.fetch[uint8_t id]() { return call CCollectionId.fetch(id); } error_t collectionSetCollectionId(uint8_t clientid, collection_id_t collectionid) @C() AT_SPONTANEOUS { return call CCollectionId.set(clientid, collectionid); } error_t collectionRoutingStart() @C() AT_SPONTANEOUS { return call RoutingControl.start(); } error_t collectionRoutingStop() @C() AT_SPONTANEOUS { return call RoutingControl.stop(); } error_t collectionReceive(message_t* m, uint32_t timeout, collection_id_t id) @C() AT_SPONTANEOUS { return call BlockingReceive.receive[id](m, timeout); } error_t collectionSnoop(message_t* m, uint32_t timeout, collection_id_t id) @C() AT_SPONTANEOUS { return call BlockingSnoop.receive[id](m, timeout); } error_t collectionSend(message_t* msg, uint8_t len, uint8_t id) @C() AT_SPONTANEOUS { call CollectionPacket.setType(msg, call CCollectionId.fetch(id)); return call BlockingSend.send[id](msg, len); } void collectionClear(message_t* msg) @C() AT_SPONTANEOUS { call Packet.clear(msg); } uint8_t collectionGetPayloadLength(message_t* msg) @C() AT_SPONTANEOUS { return call Packet.payloadLength(msg); } void collectionSetPayloadLength(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS { call Packet.setPayloadLength(msg, len); } uint8_t collectionMaxPayloadLength() @C() AT_SPONTANEOUS { return call Packet.maxPayloadLength(); } void* collectionGetPayload(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS { return call Packet.getPayload(msg, len); } am_addr_t collectionGetOrigin(message_t* msg) @C() AT_SPONTANEOUS { return call CollectionPacket.getOrigin(msg); } void collectionSetOrigin(message_t* msg, am_addr_t addr) @C() AT_SPONTANEOUS { call CollectionPacket.setOrigin(msg, addr); } collection_id_t collectionGetType(message_t* msg) @C() AT_SPONTANEOUS { return call CollectionPacket.getType(msg); } void collectionSetType(message_t* msg, collection_id_t id) @C() AT_SPONTANEOUS { call CollectionPacket.setType(msg, id); } uint8_t collectionGetSequenceNumber(message_t* msg) @C() AT_SPONTANEOUS { return call CollectionPacket.getSequenceNumber(msg); } void collectionSetSequenceNumber(message_t* msg, uint8_t seqno) @C() AT_SPONTANEOUS { call CollectionPacket.setSequenceNumber(msg, seqno); } error_t collectionSetRoot() @C() AT_SPONTANEOUS { return call RootControl.setRoot(); } error_t collectionUnsetRoot() @C() AT_SPONTANEOUS { return call RootControl.unsetRoot(); } bool collectionIsRoot() @C() AT_SPONTANEOUS { return call RootControl.isRoot(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/lqi/ccollection.h000066400000000000000000000035361207233610700243130ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef CCOLLECTION_H #define CCOLLECTION_H #include "message.h" #include "TinyError.h" #include "Collection.h" #include "MultiHopLqi.h" #define NEW_COLLECTION_CLIENT_ID() ((uint8_t)unique(UQ_LQI_CLIENT)) #endif //CCOLLECTION_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/net/tosthread_collection.h000066400000000000000000000060061207233610700254330ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @author Chieh-Jan Mike Liang */ #ifndef TOSTHREAD_COLLECTION_H #define TOSTHREAD_COLLECTION_H #include "ccollection.h" extern error_t collectionRoutingStart(); extern error_t collectionRoutingStop(); extern error_t collectionSetCollectionId(uint8_t clientid, collection_id_t collectionid); extern error_t collectionReceive(message_t* m, uint32_t timeout, collection_id_t id); extern error_t collectionSnoop(message_t* m, uint32_t timeout, collection_id_t id); extern error_t collectionSend(message_t* msg, uint8_t len, collection_id_t id); extern void collectionClear(message_t* msg); extern uint8_t collectionGetPayloadLength(message_t* msg); extern void collectionSetPayloadLength(message_t* msg, uint8_t len); extern uint8_t collectionMaxPayloadLength(); extern void* collectionGetPayload(message_t* msg, uint8_t len); extern am_addr_t collectionGetOrigin(message_t* msg); extern void collectionSetOrigin(message_t* msg, am_addr_t addr); extern collection_id_t collectionGetType(message_t* msg); extern void collectionSetType(message_t* msg, collection_id_t id); extern uint8_t collectionGetSequenceNumber(message_t* msg); extern void collectionSetSequenceNumber(message_t* msg, uint8_t seqno); extern error_t collectionSetRoot(); extern error_t collectionUnsetRoot(); extern bool collectionIsRoot(); #endif //TOSTHREAD_COLLECTION_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/printf/000077500000000000000000000000001207233610700215645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/printf/PrintfC.nc000066400000000000000000000045041207233610700234560ustar00rootroot00000000000000 /* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "printf.h" configuration PrintfC {} implementation { components MainC; components PrintfP; PrintfP.Boot -> MainC; components new ThreadC(200); PrintfP.PrintfThread -> ThreadC; components BlockingSerialActiveMessageC; PrintfP.SerialControl -> BlockingSerialActiveMessageC; PrintfP.Packet -> BlockingSerialActiveMessageC; components new PrintfQueueC(uint8_t, PRINTF_BUFFER_SIZE) as QueueC; PrintfP.Queue -> QueueC; components BarrierC; PrintfP.Barrier -> BarrierC; components MutexC; PrintfP.Mutex -> MutexC; components new BlockingSerialAMSenderC(AM_PRINTF_MSG); PrintfP.BlockingAMSend -> BlockingSerialAMSenderC; components LedsC; PrintfP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/printf/PrintfP.nc000066400000000000000000000107151207233610700234740ustar00rootroot00000000000000 /* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "printf.h" #ifdef _H_atmega128hardware_H static int uart_putchar(char c, FILE *stream); static FILE atm128_stdout = FDEV_SETUP_STREAM(TCAST(int (*)(char c, FILE *stream), uart_putchar), NULL, _FDEV_SETUP_WRITE); #endif module PrintfP { uses { interface Boot; interface Thread as PrintfThread; interface BlockingStdControl as SerialControl; interface PrintfQueue as Queue; interface Barrier; interface Mutex; interface BlockingAMSend; interface Packet; interface Leds; } } implementation { message_t printfMsg; printf_msg_t* printf_payload; mutex_t printf_mutex; barrier_t flushstart_barrier; barrier_t flushdone_barrier; void flush_buffer(); event void Boot.booted() { #ifdef _H_atmega128hardware_H stdout = &atm128_stdout; #endif printf_payload = (printf_msg_t*)call Packet.getPayload(&printfMsg, sizeof(printf_msg_t)); call Mutex.init(&printf_mutex); call Barrier.reset(&flushstart_barrier, 2); call Barrier.reset(&flushdone_barrier, 2); call PrintfThread.start(NULL); } event void PrintfThread.run(void* arg) { call SerialControl.start(); for(;;) { call Barrier.block(&flushstart_barrier); flush_buffer(); call Barrier.block(&flushdone_barrier); } } void flush_buffer() { int i; uint16_t q_size; uint16_t length_to_send; call Mutex.lock(&printf_mutex); q_size = call Queue.size(); call Mutex.unlock(&printf_mutex); while(q_size > 0) { memset(printf_payload->buffer, 0, sizeof(printf_msg_t)); length_to_send = (q_size < sizeof(printf_msg_t)) ? q_size : sizeof(printf_msg_t); call Mutex.lock(&printf_mutex); for(i=0; ibuffer[i] = call Queue.dequeue(); q_size = call Queue.size(); call Mutex.unlock(&printf_mutex); call BlockingAMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)); } } int printfflush() @C() @spontaneous() { call Barrier.block(&flushstart_barrier); call Barrier.reset(&flushstart_barrier, 2); call Barrier.block(&flushdone_barrier); call Barrier.reset(&flushdone_barrier, 2); return SUCCESS; } #ifdef _H_msp430hardware_h int putchar(int c) __attribute__((noinline)) @C() @spontaneous() { #endif #ifdef _H_atmega128hardware_H int uart_putchar(char c, FILE *stream) __attribute__((noinline)) @C() @spontaneous() { #endif #ifdef __M16C60HARDWARE_H__ int lowlevel_putc(int c) __attribute__((noinline)) @C() @spontaneous() { #endif uint16_t q_size; error_t q_error; call Mutex.lock(&printf_mutex); q_error = call Queue.enqueue(c); q_size = call Queue.size(); call Mutex.unlock(&printf_mutex); if((q_size == PRINTF_BUFFER_SIZE/2)) printfflush(); if(q_error == SUCCESS) return 0; else return -1; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/printf/avr_stdio.h000066400000000000000000001232441207233610700237350ustar00rootroot00000000000000/* Copyright (c) 2002, 2005, Joerg Wunsch All rights reserved. Portions of documentation Copyright (c) 1990, 1991, 1993 The Regents of the University of California. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. * Neither the name of the copyright holders nor the names of contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. $Id: avr_stdio.h,v 1.2 2008-07-21 23:14:04 sallai Exp $ */ #ifndef _STDIO_H_ #define _STDIO_H_ 1 #ifndef __ASSEMBLER__ #include #include #define __need_NULL #define __need_size_t #include /** \defgroup avr_stdio : Standard IO facilities \code #include \endcode

      Introduction to the Standard IO facilities

      This file declares the standard IO facilities that are implemented in \c avr-libc. Due to the nature of the underlying hardware, only a limited subset of standard IO is implemented. There is no actual file implementation available, so only device IO can be performed. Since there's no operating system, the application needs to provide enough details about their devices in order to make them usable by the standard IO facilities. Due to space constraints, some functionality has not been implemented at all (like some of the \c printf conversions that have been left out). Nevertheless, potential users of this implementation should be warned: the \c printf and \c scanf families of functions, although usually associated with presumably simple things like the famous "Hello, world!" program, are actually fairly complex which causes their inclusion to eat up a fair amount of code space. Also, they are not fast due to the nature of interpreting the format string at run-time. Whenever possible, resorting to the (sometimes non-standard) predetermined conversion facilities that are offered by avr-libc will usually cost much less in terms of speed and code size.

      Tunable options for code size vs. feature set

      In order to allow programmers a code size vs. functionality tradeoff, the function vfprintf() which is the heart of the printf family can be selected in different flavours using linker options. See the documentation of vfprintf() for a detailed description. The same applies to vfscanf() and the \c scanf family of functions.

      Outline of the chosen API

      The standard streams \c stdin, \c stdout, and \c stderr are provided, but contrary to the C standard, since avr-libc has no knowledge about applicable devices, these streams are not already pre-initialized at application startup. Also, since there is no notion of "file" whatsoever to avr-libc, there is no function \c fopen() that could be used to associate a stream to some device. (See \ref stdio_note1 "note 1".) Instead, the function \c fdevopen() is provided to associate a stream to a device, where the device needs to provide a function to send a character, to receive a character, or both. There is no differentiation between "text" and "binary" streams inside avr-libc. Character \c \\n is sent literally down to the device's \c put() function. If the device requires a carriage return (\c \\r) character to be sent before the linefeed, its \c put() routine must implement this (see \ref stdio_note2 "note 2"). As an alternative method to fdevopen(), the macro fdev_setup_stream() might be used to setup a user-supplied FILE structure. It should be noted that the automatic conversion of a newline character into a carriage return - newline sequence breaks binary transfers. If binary transfers are desired, no automatic conversion should be performed, but instead any string that aims to issue a CR-LF sequence must use "\r\n" explicitly. For convenience, the first call to \c fdevopen() that opens a stream for reading will cause the resulting stream to be aliased to \c stdin. Likewise, the first call to \c fdevopen() that opens a stream for writing will cause the resulting stream to be aliased to both, \c stdout, and \c stderr. Thus, if the open was done with both, read and write intent, all three standard streams will be identical. Note that these aliases are indistinguishable from each other, thus calling \c fclose() on such a stream will also effectively close all of its aliases (\ref stdio_note3 "note 3"). It is possible to tie additional user data to a stream, using fdev_set_udata(). The backend put and get functions can then extract this user data using fdev_get_udata(), and act appropriately. For example, a single put function could be used to talk to two different UARTs that way, or the put and get functions could keep internal state between calls there.

      Format strings in flash ROM

      All the \c printf and \c scanf family functions come in two flavours: the standard name, where the format string is expected to be in SRAM, as well as a version with the suffix "_P" where the format string is expected to reside in the flash ROM. The macro \c PSTR (explained in \ref avr_pgmspace) becomes very handy for declaring these format strings. \anchor stdio_without_malloc

      Running stdio without malloc()

      By default, fdevopen() as well as the floating-point versions of the printf and scanf family require malloc(). As this is often not desired in the limited environment of a microcontroller, an alternative option is provided to run completely without malloc(). The macro fdev_setup_stream() is provided to prepare a user-supplied FILE buffer for operation with stdio. If floating-point operation is desired, a user-supplied buffer can as well be passed for the internal buffering for the floating-point numbers (and processing of \%[ scanf data).

      Example

      \code #include static int uart_putchar(char c, FILE *stream); static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE); static int uart_putchar(char c, FILE *stream) { if (c == '\n') uart_putchar('\r', stream); loop_until_bit_is_set(UCSRA, UDRE); UDR = c; return 0; } int main(void) { init_uart(); stdout = &mystdout; printf("Hello, world!\n"); return 0; } \endcode This example uses the initializer form FDEV_SETUP_STREAM() rather than the function-like fdev_setup_stream(), so all data initialization happens during C start-up. If streams initialized that way are no longer needed, they can be destroyed by first calling the macro fdev_close(), and then destroying the object itself. No call to fclose() should be issued for these streams. While calling fclose() itself is harmless, it will cause an undefined reference to free() and thus cause the linker to link the malloc module into the application.

      Notes

      \anchor stdio_note1 \par Note 1: It might have been possible to implement a device abstraction that is compatible with \c fopen() but since this would have required to parse a string, and to take all the information needed either out of this string, or out of an additional table that would need to be provided by the application, this approach was not taken. \anchor stdio_note2 \par Note 2: This basically follows the Unix approach: if a device such as a terminal needs special handling, it is in the domain of the terminal device driver to provide this functionality. Thus, a simple function suitable as \c put() for \c fdevopen() that talks to a UART interface might look like this: \code int uart_putchar(char c, FILE *stream) { if (c == '\n') uart_putchar('\r'); loop_until_bit_is_set(UCSRA, UDRE); UDR = c; return 0; } \endcode \anchor stdio_note3 \par Note 3: This implementation has been chosen because the cost of maintaining an alias is considerably smaller than the cost of maintaining full copies of each stream. Yet, providing an implementation that offers the complete set of standard streams was deemed to be useful. Not only that writing \c printf() instead of fprintf(mystream, ...) saves typing work, but since avr-gcc needs to resort to pass all arguments of variadic functions on the stack (as opposed to passing them in registers for functions that take a fixed number of parameters), the ability to pass one parameter less by implying \c stdin will also save some execution time. */ #if !defined(__DOXYGEN__) /* * This is an internal structure of the library that is subject to be * changed without warnings at any time. Please do *never* reference * elements of it beyond by using the official interfaces provided. */ struct __file { char *buf; /* buffer pointer */ unsigned char unget; /* ungetc() buffer */ uint8_t flags; /* flags, see below */ #define __SRD 0x0001 /* OK to read */ #define __SWR 0x0002 /* OK to write */ #define __SSTR 0x0004 /* this is an sprintf/snprintf string */ #define __SPGM 0x0008 /* fmt string is in progmem */ #define __SERR 0x0010 /* found error */ #define __SEOF 0x0020 /* found EOF */ #define __SUNGET 0x040 /* ungetc() happened */ #define __SMALLOC 0x80 /* handle is malloc()ed */ #if 0 /* possible future extensions, will require uint16_t flags */ #define __SRW 0x0100 /* open for reading & writing */ #define __SLBF 0x0200 /* line buffered */ #define __SNBF 0x0400 /* unbuffered */ #define __SMBF 0x0800 /* buf is from malloc */ #endif int size; /* size of buffer */ int len; /* characters read or written so far */ int (*put)(char, struct __file *); /* function to write one char to device */ int (*get)(struct __file *); /* function to read one char from device */ void *udata; /* User defined and accessible data. */ }; #endif /* not __DOXYGEN__ */ /*@{*/ /** \c FILE is the opaque structure that is passed around between the various standard IO functions. */ #define FILE struct __file /** Stream that will be used as an input stream by the simplified functions that don't take a \c stream argument. The first stream opened with read intent using \c fdevopen() will be assigned to \c stdin. */ #define stdin (__iob[0]) /** Stream that will be used as an output stream by the simplified functions that don't take a \c stream argument. The first stream opened with write intent using \c fdevopen() will be assigned to both, \c stdin, and \c stderr. */ #define stdout (__iob[1]) /** Stream destined for error output. Unless specifically assigned, identical to \c stdout. If \c stderr should point to another stream, the result of another \c fdevopen() must be explicitly assigned to it without closing the previous \c stderr (since this would also close \c stdout). */ #define stderr (__iob[2]) /** \c EOF declares the value that is returned by various standard IO functions in case of an error. Since the AVR platform (currently) doesn't contain an abstraction for actual files, its origin as "end of file" is somewhat meaningless here. */ #define EOF (-1) /** This macro inserts a pointer to user defined data into a FILE stream object. The user data can be useful for tracking state in the put and get functions supplied to the fdevopen() function. */ #define fdev_set_udata(stream, u) do { (stream)->udata = u; } while(0) /** This macro retrieves a pointer to user defined data from a FILE stream object. */ #define fdev_get_udata(stream) ((stream)->udata) #if defined(__DOXYGEN__) /** \brief Setup a user-supplied buffer as an stdio stream This macro takes a user-supplied buffer \c stream, and sets it up as a stream that is valid for stdio operations, similar to one that has been obtained dynamically from fdevopen(). The buffer to setup must be of type FILE. The arguments \c put and \c get are identical to those that need to be passed to fdevopen(). The \c rwflag argument can take one of the values _FDEV_SETUP_READ, _FDEV_SETUP_WRITE, or _FDEV_SETUP_RW, for read, write, or read/write intent, respectively. \note No assignments to the standard streams will be performed by fdev_setup_stream(). If standard streams are to be used, these need to be assigned by the user. See also under \ref stdio_without_malloc "Running stdio without malloc()". */ #define fdev_setup_stream(stream, put, get, rwflag) #else /* !DOXYGEN */ #define fdev_setup_stream(stream, p, g, f) \ do { \ (stream)->put = p; \ (stream)->get = g; \ (stream)->flags = f; \ (stream)->udata = 0; \ } while(0) #endif /* DOXYGEN */ #define _FDEV_SETUP_READ __SRD /**< fdev_setup_stream() with read intent */ #define _FDEV_SETUP_WRITE __SWR /**< fdev_setup_stream() with write intent */ #define _FDEV_SETUP_RW (__SRD|__SWR) /**< fdev_setup_stream() with read/write intent */ /** * Return code for an error condition during device read. * * To be used in the get function of fdevopen(). */ #define _FDEV_ERR (-1) /** * Return code for an end-of-file condition during device read. * * To be used in the get function of fdevopen(). */ #define _FDEV_EOF (-2) #if defined(__DOXYGEN__) /** \brief Initializer for a user-supplied stdio stream This macro acts similar to fdev_setup_stream(), but it is to be used as the initializer of a variable of type FILE. The remaining arguments are to be used as explained in fdev_setup_stream(). */ #define FDEV_SETUP_STREAM(put, get, rwflag) #else /* !DOXYGEN */ #define FDEV_SETUP_STREAM(p, g, f) \ { \ .put = p, \ .get = g, \ .flags = f, \ .udata = 0, \ } #endif /* DOXYGEN */ #ifdef __cplusplus extern "C" { #endif #if !defined(__DOXYGEN__) /* * Doxygen documentation can be found in fdevopen.c. */ extern struct __file * (COUNT(3) __iob)[]; #if defined(__STDIO_FDEVOPEN_COMPAT_12) /* * Declare prototype for the discontinued version of fdevopen() that * has been in use up to avr-libc 1.2.x. The new implementation has * some backwards compatibility with the old version. */ extern FILE *fdevopen(int (*__put)(char), int (*__get)(void), int __opts __attribute__((unused))); #else /* !defined(__STDIO_FDEVOPEN_COMPAT_12) */ /* New prototype for avr-libc 1.4 and above. */ extern FILE *fdevopen(int (*__put)(char, FILE*), int (*__get)(FILE*)); #endif /* defined(__STDIO_FDEVOPEN_COMPAT_12) */ #endif /* not __DOXYGEN__ */ /** This function closes \c stream, and disallows and further IO to and from it. When using fdevopen() to setup the stream, a call to fclose() is needed in order to free the internal resources allocated. If the stream has been set up using fdev_setup_stream() or FDEV_SETUP_STREAM(), use fdev_close() instead. It currently always returns 0 (for success). */ extern int fclose(FILE *__stream); /** This macro frees up any library resources that might be associated with \c stream. It should be called if \c stream is no longer needed, right before the application is going to destroy the \c stream object itself. (Currently, this macro evaluates to nothing, but this might change in future versions of the library.) */ #if defined(__DOXYGEN__) # define fdev_close() #else # define fdev_close() ((void)0) #endif /** \c vfprintf is the central facility of the \c printf family of functions. It outputs values to \c stream under control of a format string passed in \c fmt. The actual values to print are passed as a variable argument list \c ap. \c vfprintf returns the number of characters written to \c stream, or \c EOF in case of an error. Currently, this will only happen if \c stream has not been opened with write intent. The format string is composed of zero or more directives: ordinary characters (not \c %), which are copied unchanged to the output stream; and conversion specifications, each of which results in fetching zero or more subsequent arguments. Each conversion specification is introduced by the \c % character. The arguments must properly correspond (after type promotion) with the conversion specifier. After the \c %, the following appear in sequence: - Zero or more of the following flags:
      • \c # The value should be converted to an "alternate form". For c, d, i, s, and u conversions, this option has no effect. For o conversions, the precision of the number is increased to force the first character of the output string to a zero (except if a zero value is printed with an explicit precision of zero). For x and X conversions, a non-zero result has the string `0x' (or `0X' for X conversions) prepended to it.
      • \c 0 (zero) Zero padding. For all conversions, the converted value is padded on the left with zeros rather than blanks. If a precision is given with a numeric conversion (d, i, o, u, i, x, and X), the 0 flag is ignored.
      • \c - A negative field width flag; the converted value is to be left adjusted on the field boundary. The converted value is padded on the right with blanks, rather than on the left with blanks or zeros. A - overrides a 0 if both are given.
      • ' ' (space) A blank should be left before a positive number produced by a signed conversion (d, or i).
      • \c + A sign must always be placed before a number produced by a signed conversion. A + overrides a space if both are used.
      - An optional decimal digit string specifying a minimum field width. If the converted value has fewer characters than the field width, it will be padded with spaces on the left (or right, if the left-adjust ment flag has been given) to fill out the field width. - An optional precision, in the form of a period . followed by an optional digit string. If the digit string is omitted, the precision is taken as zero. This gives the minimum number of digits to appear for d, i, o, u, x, and X conversions, or the maximum number of characters to be printed from a string for \c s conversions. - An optional \c l length modifier, that specifies that the argument for the d, i, o, u, x, or X conversion is a \c "long int" rather than \c int. - A character that specifies the type of conversion to be applied. The conversion specifiers and their meanings are: - \c diouxX The int (or appropriate variant) argument is converted to signed decimal (d and i), unsigned octal (o), unsigned decimal (u), or unsigned hexadecimal (x and X) notation. The letters "abcdef" are used for x conversions; the letters "ABCDEF" are used for X conversions. The precision, if any, gives the minimum number of digits that must appear; if the converted value requires fewer digits, it is padded on the left with zeros. - \c p The void * argument is taken as an unsigned integer, and converted similarly as a %\#x command would do. - \c c The \c int argument is converted to an \c "unsigned char", and the resulting character is written. - \c s The \c "char *" argument is expected to be a pointer to an array of character type (pointer to a string). Characters from the array are written up to (but not including) a terminating NUL character; if a precision is specified, no more than the number specified are written. If a precision is given, no null character need be present; if the precision is not specified, or is greater than the size of the array, the array must contain a terminating NUL character. - \c % A \c % is written. No argument is converted. The complete conversion specification is "%%". - \c eE The double argument is rounded and converted in the format \c "[-]d.dddedd" where there is one digit before the decimal-point character and the number of digits after it is equal to the precision; if the precision is missing, it is taken as 6; if the precision is zero, no decimal-point character appears. An \e E conversion uses the letter \c 'E' (rather than \c 'e') to introduce the exponent. The exponent always contains two digits; if the value is zero, the exponent is 00. - \c fF The double argument is rounded and converted to decimal notation in the format \c "[-]ddd.ddd", where the number of digits after the decimal-point character is equal to the precision specification. If the precision is missing, it is taken as 6; if the precision is explicitly zero, no decimal-point character appears. If a decimal point appears, at least one digit appears before it. - \c gG The double argument is converted in style \c f or \c e (or \c F or \c E for \c G conversions). The precision specifies the number of significant digits. If the precision is missing, 6 digits are given; if the precision is zero, it is treated as 1. Style \c e is used if the exponent from its conversion is less than -4 or greater than or equal to the precision. Trailing zeros are removed from the fractional part of the result; a decimal point appears only if it is followed by at least one digit. - \c S Similar to the \c s format, except the pointer is expected to point to a program-memory (ROM) string instead of a RAM string. In no case does a non-existent or small field width cause truncation of a numeric field; if the result of a conversion is wider than the field width, the field is expanded to contain the conversion result. Since the full implementation of all the mentioned features becomes fairly large, three different flavours of vfprintf() can be selected using linker options. The default vfprintf() implements all the mentioned functionality except floating point conversions. A minimized version of vfprintf() is available that only implements the very basic integer and string conversion facilities, but none of the additional options that can be specified using conversion flags (these flags are parsed correctly from the format specification, but then simply ignored). This version can be requested using the following \ref gcc_minusW "compiler options": \code -Wl,-u,vfprintf -lprintf_min \endcode If the full functionality including the floating point conversions is required, the following options should be used: \code -Wl,-u,vfprintf -lprintf_flt -lm \endcode \par Limitations: - The specified width and precision can be at most 127. - For floating-point conversions, trailing digits will be lost if a number close to DBL_MAX is converted with a precision > 0. */ extern int vfprintf(FILE * ONE __stream, const char * NTS __fmt, va_list __ap); /** Variant of \c vfprintf() that uses a \c fmt string that resides in program memory. */ extern int vfprintf_P(FILE * ONE __stream, const char * NTS __fmt, va_list __ap); /** The function \c fputc sends the character \c c (though given as type \c int) to \c stream. It returns the character, or \c EOF in case an error occurred. */ extern int fputc(int __c, FILE * ONE __stream); #if !defined(__DOXYGEN__) /* putc() function implementation, required by standard */ extern int putc(int __c, FILE * ONE __stream); /* putchar() function implementation, required by standard */ extern int putchar(int __c); #endif /* not __DOXYGEN__ */ /** The macro \c putc used to be a "fast" macro implementation with a functionality identical to fputc(). For space constraints, in \c avr-libc, it is just an alias for \c fputc. */ #define putc(__c, __stream) fputc(__c, __stream) /** The macro \c putchar sends character \c c to \c stdout. */ #define putchar(__c) fputc(__c, stdout) /** The function \c printf performs formatted output to stream \c stderr. See \c vfprintf() for details. */ extern int printf(const char * NTS __fmt, ...); /** Variant of \c printf() that uses a \c fmt string that resides in program memory. */ extern int printf_P(const char * NTS __fmt, ...); /** The function \c vprintf performs formatted output to stream \c stdout, taking a variable argument list as in vfprintf(). See vfprintf() for details. */ extern int vprintf(const char * NTS __fmt, va_list __ap); /** Variant of \c printf() that sends the formatted characters to string \c s. */ extern int sprintf(char * NTS __s, const char * NTS __fmt, ...); /** Variant of \c sprintf() that uses a \c fmt string that resides in program memory. */ extern int sprintf_P(char * NTS __s, const char * NTS __fmt, ...); /** Like \c sprintf(), but instead of assuming \c s to be of infinite size, no more than \c n characters (including the trailing NUL character) will be converted to \c s. Returns the number of characters that would have been written to \c s if there were enough space. */ extern int snprintf(char * NTS __s, size_t __n, const char * NTS __fmt, ...); /** Variant of \c snprintf() that uses a \c fmt string that resides in program memory. */ extern int snprintf_P(char * NTS __s, size_t __n, const char * NTS __fmt, ...); /** Like \c sprintf() but takes a variable argument list for the arguments. */ extern int vsprintf(char * NTS __s, const char * NTS __fmt, va_list ap); /** Variant of \c vsprintf() that uses a \c fmt string that resides in program memory. */ extern int vsprintf_P(char * NTS __s, const char * NTS __fmt, va_list ap); /** Like \c vsprintf(), but instead of assuming \c s to be of infinite size, no more than \c n characters (including the trailing NUL character) will be converted to \c s. Returns the number of characters that would have been written to \c s if there were enough space. */ extern int vsnprintf(char * NTS __s, size_t __n, const char * NTS __fmt, va_list ap); /** Variant of \c vsnprintf() that uses a \c fmt string that resides in program memory. */ extern int vsnprintf_P(char * NTS __s, size_t __n, const char * NTS __fmt, va_list ap); /** The function \c fprintf performs formatted output to \c stream. See \c vfprintf() for details. */ extern int fprintf(FILE * ONE __stream, const char * NTS __fmt, ...); /** Variant of \c fprintf() that uses a \c fmt string that resides in program memory. */ extern int fprintf_P(FILE * ONE __stream, const char * NTS __fmt, ...); /** Write the string pointed to by \c str to stream \c stream. Returns 0 on success and EOF on error. */ extern int fputs(const char * NTS __str, FILE * ONE __stream); /** Variant of fputs() where \c str resides in program memory. */ extern int fputs_P(const char * NTS __str, FILE * ONE __stream); /** Write the string pointed to by \c str, and a trailing newline character, to \c stdout. */ extern int puts(const char * NTS __str); /** Variant of puts() where \c str resides in program memory. */ extern int puts_P(const char * NTS __str); /** Write \c nmemb objects, \c size bytes each, to \c stream. The first byte of the first object is referenced by \c ptr. Returns the number of objects successfully written, i. e. \c nmemb unless an output error occured. */ extern size_t fwrite(const void *__ptr, size_t __size, size_t __nmemb, FILE * ONE __stream); /** The function \c fgetc reads a character from \c stream. It returns the character, or \c EOF in case end-of-file was encountered or an error occurred. The routines feof() or ferror() must be used to distinguish between both situations. */ extern int fgetc(FILE * ONE __stream); #if !defined(__DOXYGEN__) /* getc() function implementation, required by standard */ extern int getc(FILE * ONE __stream); /* getchar() function implementation, required by standard */ extern int getchar(void); #endif /* not __DOXYGEN__ */ /** The macro \c getc used to be a "fast" macro implementation with a functionality identical to fgetc(). For space constraints, in \c avr-libc, it is just an alias for \c fgetc. */ #define getc(__stream) fgetc(__stream) /** The macro \c getchar reads a character from \c stdin. Return values and error handling is identical to fgetc(). */ #define getchar() fgetc(stdin) /** The ungetc() function pushes the character \c c (converted to an unsigned char) back onto the input stream pointed to by \c stream. The pushed-back character will be returned by a subsequent read on the stream. Currently, only a single character can be pushed back onto the stream. The ungetc() function returns the character pushed back after the conversion, or \c EOF if the operation fails. If the value of the argument \c c character equals \c EOF, the operation will fail and the stream will remain unchanged. */ extern int ungetc(int __c, FILE * ONE __stream); /** Read at most size - 1 bytes from \c stream, until a newline character was encountered, and store the characters in the buffer pointed to by \c str. Unless an error was encountered while reading, the string will then be terminated with a \c NUL character. If an error was encountered, the function returns NULL and sets the error flag of \c stream, which can be tested using ferror(). Otherwise, a pointer to the string will be returned. */ extern char *fgets(char * NTS __str, int __size, FILE * ONE __stream); /** Similar to fgets() except that it will operate on stream \c stdin, and the trailing newline (if any) will not be stored in the string. It is the caller's responsibility to provide enough storage to hold the characters read. */ extern char *gets(char * NTS __str); /** Read \c nmemb objects, \c size bytes each, from \c stream, to the buffer pointed to by \c ptr. Returns the number of objects successfully read, i. e. \c nmemb unless an input error occured or end-of-file was encountered. feof() and ferror() must be used to distinguish between these two conditions. */ extern size_t fread(void *__ptr, size_t __size, size_t __nmemb, FILE * ONE __stream); /** Clear the error and end-of-file flags of \c stream. */ extern void clearerr(FILE * ONE __stream); #if !defined(__DOXYGEN__) /* fast inlined version of clearerr() */ #define clearerror(s) do { (s)->flags &= ~(__SERR | __SEOF); } while(0) #endif /* !defined(__DOXYGEN__) */ /** Test the end-of-file flag of \c stream. This flag can only be cleared by a call to clearerr(). */ extern int feof(FILE * ONE __stream); #if !defined(__DOXYGEN__) /* fast inlined version of feof() */ #define feof(s) ((s)->flags & __SEOF) #endif /* !defined(__DOXYGEN__) */ /** Test the error flag of \c stream. This flag can only be cleared by a call to clearerr(). */ extern int ferror(FILE * ONE __stream); #if !defined(__DOXYGEN__) /* fast inlined version of ferror() */ #define ferror(s) ((s)->flags & __SERR) #endif /* !defined(__DOXYGEN__) */ /** Formatted input. This function is the heart of the \c scanf family of functions. Characters are read from \c stream and processed in a way described by \c fmt. Conversion results will be assigned to the parameters passed via \c ap. The format string \c fmt is scanned for conversion specifications. Anything that doesn't comprise a conversion specification is taken as text that is matched literally against the input. White space in the format string will match any white space in the data (including none), all other characters match only itself. Processing is aborted as soon as the data and format string no longer match, or there is an error or end-of-file condition on \c stream. Most conversions skip leading white space before starting the actual conversion. Conversions are introduced with the character \b %. Possible options can follow the \b %: - a \c * indicating that the conversion should be performed but the conversion result is to be discarded; no parameters will be processed from \c ap, - the character \c h indicating that the argument is a pointer to short int (rather than int), - the character \c l indicating that the argument is a pointer to long int (rather than int, for integer type conversions), or a pointer to \c double (for floating point conversions). In addition, a maximal field width may be specified as a nonzero positive decimal integer, which will restrict the conversion to at most this many characters from the input stream. This field width is limited to at most 127 characters which is also the default value (except for the %c conversion that defaults to 1). The following conversion flags are supported: - \c % Matches a literal \c % character. This is not a conversion. - \c d Matches an optionally signed decimal integer; the next pointer must be a pointer to \c int. - \c i Matches an optionally signed integer; the next pointer must be a pointer to \c int. The integer is read in base 16 if it begins with \b 0x or \b 0X, in base 8 if it begins with \b 0, and in base 10 otherwise. Only characters that correspond to the base are used. - \c o Matches an octal integer; the next pointer must be a pointer to unsigned int. - \c u Matches an optionally signed decimal integer; the next pointer must be a pointer to unsigned int. - \c x Matches an optionally signed hexadecimal integer; the next pointer must be a pointer to unsigned int. - \c f Matches an optionally signed floating-point number; the next pointer must be a pointer to \c float. - e, g, E, G Equivalent to \c f. - \c s Matches a sequence of non-white-space characters; the next pointer must be a pointer to \c char, and the array must be large enough to accept all the sequence and the terminating \c NUL character. The input string stops at white space or at the maximum field width, whichever occurs first. - \c c Matches a sequence of width count characters (default 1); the next pointer must be a pointer to \c char, and there must be enough room for all the characters (no terminating \c NUL is added). The usual skip of leading white space is suppressed. To skip white space first, use an explicit space in the format. - \c [ Matches a nonempty sequence of characters from the specified set of accepted characters; the next pointer must be a pointer to \c char, and there must be enough room for all the characters in the string, plus a terminating \c NUL character. The usual skip of leading white space is suppressed. The string is to be made up of characters in (or not in) a particular set; the set is defined by the characters between the open bracket \c [ character and a close bracket \c ] character. The set excludes those characters if the first character after the open bracket is a circumflex \c ^. To include a close bracket in the set, make it the first character after the open bracket or the circumflex; any other position will end the set. The hyphen character \c - is also special; when placed between two other characters, it adds all intervening characters to the set. To include a hyphen, make it the last character before the final close bracket. For instance, [^]0-9-] means the set of everything except close bracket, zero through nine, and hyphen. The string ends with the appearance of a character not in the (or, with a circumflex, in) set or when the field width runs out. - \c p Matches a pointer value (as printed by %p in printf()); the next pointer must be a pointer to \c void. - \c n Nothing is expected; instead, the number of characters consumed thus far from the input is stored through the next pointer, which must be a pointer to \c int. This is not a conversion, although it can be suppressed with the \c * flag. These functions return the number of input items assigned, which can be fewer than provided for, or even zero, in the event of a matching failure. Zero indicates that, while there was input available, no conversions were assigned; typically this is due to an invalid input character, such as an alphabetic character for a %d conversion. The value \c EOF is returned if an input failure occurs before any conversion such as an end-of-file occurs. If an error or end-of-file occurs after conversion has begun, the number of conversions which were successfully completed is returned. By default, all the conversions described above are available except the floating-point conversions, and the \%[ conversion. These conversions will be available in the extended version provided by the library \c libscanf_flt.a. Note that either of these conversions requires the availability of a buffer that needs to be obtained at run-time using malloc(). If this buffer cannot be obtained, the operation is aborted, returning the value \c EOF. To link a program against the extended version, use the following compiler flags in the link stage: \code -Wl,-u,vfscanf -lscanf_flt -lm \endcode A third version is available for environments that are tight on space. This version is provided in the library \c libscanf_min.a, and can be requested using the following options in the link stage: \code -Wl,-u,vfscanf -lscanf_min -lm \endcode In addition to the restrictions of the standard version, this version implements no field width specification, no conversion assignment suppression flag (\c *), no %n specification, and no general format character matching at all. All characters in \c fmt that do not comprise a conversion specification will simply be ignored, including white space (that is normally used to consume \e any amount of white space in the input stream). However, the usual skip of initial white space in the formats that support it is implemented. */ extern int vfscanf(FILE * ONE __stream, const char * NTS __fmt, va_list __ap); /** Variant of vfscanf() using a \c fmt string in program memory. */ extern int vfscanf_P(FILE * ONE __stream, const char * NTS __fmt, va_list __ap); /** The function \c fscanf performs formatted input, reading the input data from \c stream. See vfscanf() for details. */ extern int fscanf(FILE * ONE __stream, const char * NTS __fmt, ...); /** Variant of fscanf() using a \c fmt string in program memory. */ extern int fscanf_P(FILE * ONE __stream, const char * NTS __fmt, ...); /** The function \c scanf performs formatted input from stream \c stdin. See vfscanf() for details. */ extern int scanf(const char * NTS __fmt, ...); /** Variant of scanf() where \c fmt resides in program memory. */ extern int scanf_P(const char * NTS __fmt, ...); /** The function \c vscanf performs formatted input from stream \c stdin, taking a variable argument list as in vfscanf(). See vfscanf() for details. */ extern int vscanf(const char * NTS __fmt, va_list __ap); /** The function \c sscanf performs formatted input, reading the input data from the buffer pointed to by \c buf. See vfscanf() for details. */ extern int sscanf(const char * NTS __buf, const char * NTS __fmt, ...); /** Variant of sscanf() using a \c fmt string in program memory. */ extern int sscanf_P(const char * NTS __buf, const char * NTS __fmt, ...); #if defined(__DOXYGEN__) /** Flush \c stream. This is a null operation provided for source-code compatibility only, as the standard IO implementation currently does not perform any buffering. */ extern int fflush(FILE * ONE stream); #else static __inline__ int fflush(FILE * ONE stream __attribute__((unused))) { return 0; } #endif #ifdef __cplusplus } #endif /*@}*/ /* * The following constants are currently not used by avr-libc's * stdio subsystem. They are defined here since the gcc build * environment expects them to be here. */ #define SEEK_SET 0 #define SEEK_CUR 1 #define SEEK_END 2 #endif /* __ASSEMBLER */ #endif /* _STDLIB_H_ */ tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/printf/printf.h000066400000000000000000000043711207233610700232440ustar00rootroot00000000000000/* * Copyright (c) 2006 Washington University in St. Louis. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * * @author Kevin Klues (klueska@cs.wustl.edu) * @version $Revision: 1.2 $ * @date $Date: 2010-06-29 22:07:51 $ */ #ifndef PRINTF_H #define PRINTF_H #ifndef PRINTF_BUFFER_SIZE #define PRINTF_BUFFER_SIZE 255 #endif #if PRINTF_BUFFER_SIZE > 255 #define PrintfQueueC BigQueueC #define PrintfQueue BigQueue #else #define PrintfQueueC QueueC #define PrintfQueue Queue #endif #ifdef _H_msp430hardware_h #include #endif #ifdef _H_atmega128hardware_H #include "avr_stdio.h" #endif #include "message.h" typedef nx_struct printf_msg { nx_uint8_t buffer[TOSH_DATA_LENGTH]; } printf_msg_t; enum { AM_PRINTF_MSG = 100, }; int printfflush(); #endif //PRINTF_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/serial/000077500000000000000000000000001207233610700215415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/serial/SerialActiveMessageC.nc000066400000000000000000000053371207233610700260560ustar00rootroot00000000000000//$Id: SerialActiveMessageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sending active messages over the serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ #include "Serial.h" configuration SerialActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } uses interface Leds; } implementation { components new SerialActiveMessageP() as AM, SerialDispatcherC; components SerialPacketInfoActiveMessageP as Info, MainC; MainC.SoftwareInit -> SerialDispatcherC; Leds = SerialDispatcherC; SplitControl = SerialDispatcherC; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID]; AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID]; SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc000066400000000000000000000142421207233610700260660ustar00rootroot00000000000000//$Id: SerialActiveMessageP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Sending active messages over the serial port. * * @author Philip Levis * @author Ben Greenstein * @date August 7 2005 * */ #include generic module SerialActiveMessageP () { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface AMPacket; interface Packet; interface PacketAcknowledgements; } uses { interface Send as SubSend; interface Receive as SubReceive; } } implementation { serial_header_t* ONE getHeader(message_t* ONE msg) { return TCAST(serial_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(serial_header_t)); } serial_metadata_t* getMetadata(message_t* msg) { return (serial_metadata_t*)(msg->metadata); } command error_t AMSend.send[am_id_t id](am_addr_t dest, message_t* msg, uint8_t len) { serial_header_t* header = getHeader(msg); header->dest = dest; // Do not set the source address or group, as doing so // prevents transparent bridging. Need a better long-term // solution for this. //header->src = call AMPacket.address(); //header->group = TOS_AM_GROUP; header->type = id; header->length = len; return call SubSend.send(msg, len); } command error_t AMSend.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel(msg); } command uint8_t AMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) { return call Packet.getPayload(m, len); } event void SubSend.sendDone(message_t* msg, error_t result) { signal AMSend.sendDone[call AMPacket.type(msg)](msg, result); } default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t result) { return; } default event message_t* Receive.receive[uint8_t id](message_t* msg, void* payload, uint8_t len) { return signal ReceiveDefault.receive[id](msg, payload, len); } default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) { return signal Receive.receive[call AMPacket.type(msg)](msg, msg->data, len); } command void Packet.clear(message_t* msg) { memset(getHeader(msg), 0, sizeof(serial_header_t)); return; } command uint8_t Packet.payloadLength(message_t* msg) { serial_header_t* header = getHeader(msg); return header->length; } command void Packet.setPayloadLength(message_t* msg, uint8_t len) { getHeader(msg)->length = len; } command uint8_t Packet.maxPayloadLength() { return TOSH_DATA_LENGTH; } command void* Packet.getPayload(message_t* msg, uint8_t len) { if (len > call Packet.maxPayloadLength()) { return NULL; } else { return (void * COUNT_NOK(len))msg->data; } } command am_addr_t AMPacket.address() { return 0; } command am_addr_t AMPacket.destination(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->dest; } command am_addr_t AMPacket.source(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->src; } command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) { serial_header_t* header = getHeader(amsg); header->dest = addr; } command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { serial_header_t* header = getHeader(amsg); header->src = addr; } command bool AMPacket.isForMe(message_t* amsg) { return TRUE; } command am_id_t AMPacket.type(message_t* amsg) { serial_header_t* header = getHeader(amsg); return header->type; } command void AMPacket.setType(message_t* amsg, am_id_t type) { serial_header_t* header = getHeader(amsg); header->type = type; } async command error_t PacketAcknowledgements.requestAck( message_t* msg ) { return FAIL; } async command error_t PacketAcknowledgements.noAck( message_t* msg ) { return SUCCESS; } command void AMPacket.setGroup(message_t* msg, am_group_t group) { serial_header_t* header = getHeader(msg); header->group = group; } command am_group_t AMPacket.group(message_t* msg) { serial_header_t* header = getHeader(msg); return header->group; } command am_group_t AMPacket.localGroup() { return TOS_AM_GROUP; } async command bool PacketAcknowledgements.wasAcked(message_t* msg) { return FALSE; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/000077500000000000000000000000001207233610700215655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/BigCrc.nc000066400000000000000000000002371207233610700232420ustar00rootroot00000000000000interface BigCrc { command error_t computeCrc(void* buf, uint16_t len); event void computeCrcDone(void* buf, uint16_t len, uint16_t crc, error_t error); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/BigCrcC.nc000066400000000000000000000002451207233610700233440ustar00rootroot00000000000000configuration BigCrcC { provides interface BigCrc; } implementation { components CrcC, BigCrcP; BigCrc = BigCrcP; BigCrcP.Crc -> CrcC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/BigCrcP.nc000066400000000000000000000014401207233610700233570ustar00rootroot00000000000000module BigCrcP { provides interface BigCrc; uses interface Crc; } implementation { bool isBusy = FALSE; void* inbuf; uint16_t inlen; uint16_t pos; uint16_t computedCrc; task void computeCrc() { uint8_t len = 0xFF; if (inlen < 0xFF) { len = inlen; } computedCrc = call Crc.seededCrc16(computedCrc, inbuf + pos, len); inlen -= len; pos += len; if (inlen > 0) { post computeCrc(); } else { isBusy = FALSE; signal BigCrc.computeCrcDone(inbuf, pos + 1, computedCrc, SUCCESS); } } command error_t BigCrc.computeCrc(void* buf, uint16_t len) { if (isBusy == TRUE) { return EBUSY; } inbuf = buf; inlen = len; computedCrc = pos = 0; post computeCrc(); return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/DynamicLoader.h000077500000000000000000000043611207233610700244600ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #ifndef DYNAMICLOADER_H #define DYNAMICLOADER_H //#defines for setting up which set of apis the dynamic loader //should recognize. This should eventually move into a file that //gets #included in here, but for now we set the defaults here. #ifdef TOSTHREAD_TENET #define ApiForDynamicLoaderC TosThreadTenetApiC #define SLCS_TYPES_FILE "tosthread_tenet_slcs_types.h" #else #define ApiForDynamicLoaderC TosThreadApiC #define SLCS_TYPES_FILE "tosthread_slcs_types.h" #endif #define TOSTHREAD_DYNAMIC_LOADER #ifndef DISABLE_LOADER_FLASH #include "StorageVolumes.h" #endif enum { READSOURCE_MEMORY = 0xFF, }; #endif tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/DynamicLoader.nc000077500000000000000000000036501207233610700246310ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "thread.h" interface DynamicLoader { command error_t loadFromFlash(uint8_t volumeId); event void loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error); command error_t loadFromMemory(void *addr); event void loadFromMemoryDone(void *addr, tosthread_t id, error_t error); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/DynamicLoaderC.nc000077500000000000000000000050741207233610700247360ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include "DynamicLoader.h" configuration DynamicLoaderC { provides interface DynamicLoader; } implementation { components MainC, DynamicLoaderP, LedsC, NoLedsC, LoadSourceMapC, DynamicThreadC, ReferenceCounterC, TinyThreadSchedulerC; DynamicLoader = DynamicLoaderP; DynamicLoaderP <- MainC.SoftwareInit; DynamicLoaderP.Leds -> LedsC; DynamicLoaderP.ImageRead -> LoadSourceMapC; DynamicLoaderP.DynamicThread -> DynamicThreadC; DynamicLoaderP.ReferenceCounter -> ReferenceCounterC; DynamicLoaderP.ThreadNotification -> DynamicThreadC; DynamicLoaderP.ThreadScheduler -> TinyThreadSchedulerC; components ApiForDynamicLoaderC; components PMManagerC; DynamicLoaderP.PMManager -> PMManagerC; #ifndef DISABLE_LOADER_USERBUTTON components UserButtonC; DynamicLoaderP.UserButton -> UserButtonC; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/DynamicLoaderP.nc000077500000000000000000000374041207233610700247550ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang * @author Razvan Musaloiu-E. */ #include SLCS_TYPES_FILE #include "thread.h" module DynamicLoaderP { provides { interface Init; interface DynamicLoader; } uses { interface Leds; interface BlockRead as ImageRead[uint8_t id]; interface DynamicThread; interface ThreadNotification[uint8_t id]; interface ThreadScheduler; interface ReferenceCounter; interface PMManager; #ifndef DISABLE_LOADER_USERBUTTON interface UserButton; #endif } } implementation { uint8_t *code; // Points to first byte of the program code in the internal flash uint8_t *tablesMemory; void *gVarMemory; struct prog_desc prog_desc; init_block_t *proc; uint16_t codePtr; // Records what code has been copied to the internal flash uint16_t nextAddr; uint8_t *nextTask_chain; // Used to update the next patching address in a chain uint8_t readSource; // Loads from flash or memory uint16_t readSourceOffset; // If loading from memory, then this is effectively the passed-in memory address error_t retError = FAIL; tosthread_t handler; uint16_t threadCodeSizes[TOSTHREAD_MAX_NUM_THREADS]; uint16_t codeFirstAddrs[TOSTHREAD_MAX_NUM_THREADS]; async event void ThreadNotification.justCreated[uint8_t id]() { thread_t *t = call ThreadScheduler.threadInfo(id); if(t->init_block != NULL) { call ReferenceCounter.increment(&(t->init_block->thread_counter)); } } async event void ThreadNotification.aboutToDestroy[uint8_t id]() { thread_t *t = call ThreadScheduler.threadInfo(id); if(t->init_block != NULL) { call ReferenceCounter.decrement(&(t->init_block->thread_counter)); } } task void loadDoneTask() { if (retError != SUCCESS) handler = TOSTHREAD_INVALID_THREAD_ID; if (readSource == READSOURCE_MEMORY) { signal DynamicLoader.loadFromMemoryDone(((void *)readSourceOffset), handler, retError); } else { signal DynamicLoader.loadFromFlashDone(readSource, handler, retError); } } void initProgDesc() { prog_desc.main_addr = 0; prog_desc.alloc_count = 0; prog_desc.g_reloc_count = 0; prog_desc.l_reloc_count = 0; prog_desc.code_count = 0; prog_desc.patch_table_count = 0; prog_desc.loading_stage = 0; codePtr = 0; } void errorHandler() { call Leds.set(7); if (tablesMemory != NULL) { free(tablesMemory); tablesMemory = NULL; } if (gVarMemory != NULL) { free(gVarMemory); gVarMemory = NULL; } if (proc != NULL) { free(proc); proc = NULL; } initProgDesc(); retError = FAIL; post loadDoneTask(); } void run_proc(void *arg) { init_block_t* curProc = arg; thread_t* t = call ThreadScheduler.currentThreadInfo(); t->init_block = curProc; (*(curProc->init_ptr))(curProc->init_arg); call ReferenceCounter.waitOnValue(&(curProc->thread_counter), 0); call PMManager.release(codeFirstAddrs[t->id], threadCodeSizes[t->id]); codeFirstAddrs[t->id] = 0; threadCodeSizes[t->id] = 0; if (curProc->globals != NULL) { free(curProc->globals); } free(curProc); } task void start_prog() { free(tablesMemory); proc = malloc(sizeof(init_block_t)); proc->globals = gVarMemory; proc->init_ptr = (void *)((uint16_t)code + prog_desc.main_addr); proc->init_arg = NULL; call ReferenceCounter.init( &(proc->thread_counter) ); if (call DynamicThread.create(&handler, run_proc, proc, 200) == SUCCESS) { codeFirstAddrs[handler] = (uint16_t)code; threadCodeSizes[handler] = prog_desc.code_count; retError = SUCCESS; post loadDoneTask(); } else { retError = FAIL; post loadDoneTask(); if (proc->globals != NULL) { free(proc->globals); } free(proc); } initProgDesc(); } // Gets write access to the internal flash void eeprom_w() { FCTL2 = FWKEY + FSSEL1 + FN2; // selects SMCLK and divides it by 4 FCTL3 = FWKEY; // enables the writing/erasing by clearing the LOCK bit FCTL1 = FWKEY + WRT; // enables the writing } // Gets read-only access to the internal flash void eeprom_r() { FCTL1 = FWKEY; // Clear WRT bit FCTL3 = FWKEY + LOCK; // disabling the writing/erasing } // Calculates where should the code be placed in the internal flash /* uint16_t eeprom_code_addr() { uint16_t addr; addr = (((prog_desc.code_count - 1) / 512) + 1) * 512; // Spaces needed for the code addr = 0xFFFF - 512 - addr + 1; // The 1 is to align the code return addr; } */ // Loads program image meta data void loader_metaData() { prog_desc.patch_table_count = prog_desc.alloc_count + prog_desc.g_reloc_count + prog_desc.l_reloc_count; prog_desc.code_offset = sizeof(prog_desc.main_addr) + sizeof(prog_desc.alloc_count) + sizeof(prog_desc.alloc_size) + sizeof(prog_desc.g_reloc_count) + sizeof(prog_desc.l_reloc_count) + sizeof(prog_desc.datasec_count) + sizeof(prog_desc.code_count) + (prog_desc.patch_table_count * 4) + (prog_desc.datasec_count * 6); if (prog_desc.patch_table_count > 0 || prog_desc.datasec_count > 0) { if ((prog_desc.patch_table_count * 4) > (prog_desc.datasec_count * 6)) { tablesMemory = malloc(prog_desc.patch_table_count * 4); } else { tablesMemory = malloc(prog_desc.datasec_count * 6); } } else { tablesMemory = NULL; } } // Prepares the patch table before patching addresses in the binary code void loader_patch_table() { uint16_t i, tempUInt16 = 0; // Find out the total space global variables need, and malloc /* for (i = 0; i < (prog_desc.alloc_count * 4); i+=4) { tempUInt16 += *((uint16_t *)&tablesMemory[i]); *((uint16_t *)&tablesMemory[i]) = tempUInt16 - *((uint16_t *)&tablesMemory[i]); } */ if (prog_desc.alloc_size > 0) { gVarMemory = malloc(prog_desc.alloc_size); memset(gVarMemory, 0, prog_desc.alloc_size); } else { gVarMemory = NULL; } // Some "real" addresses need offsets added. For example, local relocation table entries need // the starting code address for (i = 0; i < (prog_desc.patch_table_count * 4); i+=4) { if (i < (prog_desc.alloc_count * 4)) { tempUInt16 = (uint16_t)gVarMemory; // Allocation table needs memory's offset } else if (i < ((prog_desc.alloc_count + prog_desc.g_reloc_count) * 4)) { tempUInt16 = 0; // Global relocation table doesn't need anything } else { tempUInt16 = (uint16_t)code; // Local relocation table needs code's offset } *((uint16_t *)&(tablesMemory[i])) = *((uint16_t *)&(tablesMemory[i])) + tempUInt16; // Writes the real address } // Converts function IDs in global relocation table to real addresses for (i = (prog_desc.alloc_count * 4); i < ((prog_desc.alloc_count + prog_desc.g_reloc_count) * 4); i+=4) { tempUInt16 = *((uint16_t *)&tablesMemory[i]); // Gets function ID tempUInt16 = (uint16_t)fun[tempUInt16].addr; // Gets the real address of the function ID *((uint16_t *)&tablesMemory[i]) = tempUInt16; // Writes the real address } } void loader_addr_1() { uint16_t i, laddr = 0, raddr = 0; // Resets before start nextTask_chain = 0x0; nextAddr = 0; // Gets the next task by searching for the lowest next patching address raddr = 0xFFFF; // Temp variable to store the minimum patching address so far laddr = 0; // Temp variable to store the current patching address for (i = 0; i < (prog_desc.patch_table_count * 4); i+=4) { laddr = *((uint16_t *)&tablesMemory[i + 2]); if (((uint16_t)nextTask_chain == 0x0 && laddr != 0xFFFF) || raddr > laddr) { nextTask_chain = &(tablesMemory[i]); raddr = laddr; } } if (nextTask_chain != 0x0) { // Gets the next patching address in the chain from the flash raddr = *((uint16_t *)&nextTask_chain[2]); call ImageRead.read[readSource](readSourceOffset + prog_desc.code_offset + raddr, &nextAddr, 2); } else { // Copies the rest of the binary code call ImageRead.read[readSource](readSourceOffset + prog_desc.code_offset + codePtr, &(code[codePtr]), prog_desc.code_count - codePtr); prog_desc.loading_stage++; } } // Patches the part of binary code that needs "real" addresses void loader_addr_2() { uint16_t laddr; laddr = *((uint16_t *)&nextTask_chain[2]); // Gets the current patching address // Updates the chain with the next patching address if (nextAddr == 0x0000) { nextAddr = 0xFFFF; // End of chain, marks it with a big number } *((uint16_t *)&nextTask_chain[2]) = nextAddr; // Patches address in the binary code *((uint16_t *)&code[laddr]) = *((uint16_t *)&nextTask_chain[0]); // Copies the binary code between the last patching address and the current patching address call ImageRead.read[readSource](readSourceOffset + prog_desc.code_offset + codePtr, &(code[codePtr]), laddr - codePtr); codePtr = laddr + 2; // Notes up to what location in the binary code we have copied } void loader_datasec() { uint16_t i, j; for (i = 0; i < (prog_desc.datasec_count * 6); i+=6) { uint16_t destAddr = *((uint16_t *)&(tablesMemory[i])) + (uint16_t)gVarMemory; // Writes the real address uint16_t srcAddr = *((uint16_t *)&(tablesMemory[i + 2])) + (uint16_t)code; // Writes the real address uint16_t size = *((uint16_t *)&(tablesMemory[i + 4])); for (j = 0; j < size; j++) { ((uint8_t *)((void *)(destAddr + j)))[0] = ((uint8_t *)((void *)(srcAddr + j)))[0]; //*((uint8_t *)&code[destAddr + j]) = *((uint8_t *)&code[srcAddr + j]); } } } void loadProgram() { error_t error = SUCCESS; switch (prog_desc.loading_stage) { case 0: // Loads meta data to memory array error = call ImageRead.read[readSource](readSourceOffset + 0, &prog_desc, 7 * 2); if (error == SUCCESS) { prog_desc.loading_stage++; // Moves to next loading phase } else { errorHandler(); } break; case 1: loader_metaData(); // Gets meta data code = (void *) call PMManager.request(prog_desc.code_count); // Gets the location of where the code will be copied to if ((uint16_t)code != 0xFFFF) { // Loads patch table to memory array error = call ImageRead.read[readSource](readSourceOffset + 7 * 2, tablesMemory, prog_desc.patch_table_count * 4); if (error == SUCCESS) { prog_desc.loading_stage++; // Moves to next loading phase } else { errorHandler(); } } else { errorHandler(); } break; case 2: loader_patch_table(); eeprom_w(); // Gets write-access to internal flash prog_desc.loading_stage++; // Moves to next loading phase case 3: loader_addr_1(); break; case 4: eeprom_r(); // Locks the internal flash back error = call ImageRead.read[readSource](readSourceOffset + 7 * 2 + prog_desc.patch_table_count * 4, tablesMemory, prog_desc.datasec_count * 6); if (error == SUCCESS) { prog_desc.loading_stage++; // Moves to next loading phase } else { errorHandler(); } break; case 5: loader_datasec(); prog_desc.loading_stage++; case 6: post start_prog(); break; } } command error_t Init.init() { int i; for (i = 0; i < TOSTHREAD_MAX_NUM_THREADS; i++) { threadCodeSizes[i] = 0; codeFirstAddrs[i] = 0; } initProgDesc(); return SUCCESS; } task void taskLoadProgram() { loadProgram(); } error_t start_load(uint8_t in_readSource, uint16_t in_readSourceOffset) { if (prog_desc.loading_stage == 0) { uint16_t i; call Leds.set(7); for (i = 0; i < 2000; i++) { } call Leds.set(0); readSource = in_readSource; readSourceOffset = in_readSourceOffset; post taskLoadProgram(); // Start Loading return SUCCESS; } return EBUSY; } command error_t DynamicLoader.loadFromFlash(uint8_t volumeId) { return start_load(volumeId, 0); } command error_t DynamicLoader.loadFromMemory(void *addr) { return start_load(READSOURCE_MEMORY, (uint16_t)addr); } event void ImageRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { if (error == SUCCESS) { if (buf == &nextAddr) { loader_addr_2(); } else { post taskLoadProgram(); } } else { errorHandler(); } } #ifndef DISABLE_LOADER_USERBUTTON event void UserButton.fired() { call DynamicLoader.loadFromFlash(VOLUME_MICROEXEIMAGE); } #endif event void ImageRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {} default command error_t ImageRead.read[uint8_t id](storage_addr_t addr, void *buf, storage_len_t len) { return FAIL; } default event void DynamicLoader.loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error) {} default event void DynamicLoader.loadFromMemoryDone(void *addr, tosthread_t id, error_t error) {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/LoadSourceMapC.nc000077500000000000000000000040341207233610700247140ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ configuration LoadSourceMapC { provides interface BlockRead[uint8_t id]; } implementation { components LoadSourceMapP, #ifdef DISABLE_LOADER_FLASH NullVolumeMapC as VolumeMapC, #else VolumeMapC, #endif MemoryStorageC; BlockRead = LoadSourceMapP; LoadSourceMapP.SubBlockRead -> VolumeMapC; LoadSourceMapP.SubMemoryRead -> MemoryStorageC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/LoadSourceMapP.nc000077500000000000000000000101431207233610700247270ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "DynamicLoader.h" module LoadSourceMapP { provides interface BlockRead[uint8_t id]; uses { interface BlockRead as SubBlockRead[uint8_t id]; interface BlockRead as SubMemoryRead; } } implementation { event void SubMemoryRead.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error) { signal BlockRead.readDone[READSOURCE_MEMORY](addr, buf, len, error); } event void SubBlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { signal BlockRead.readDone[id](addr, buf, len, error); } command error_t BlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { error_t error = FAIL; if (id == READSOURCE_MEMORY) { error = call SubMemoryRead.read(addr, buf, len); } else { error = call SubBlockRead.read[id](addr, buf, len); } return error; } event void SubMemoryRead.computeCrcDone(storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { signal BlockRead.computeCrcDone[READSOURCE_MEMORY](addr, len, crc, error); } event void SubBlockRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { signal BlockRead.computeCrcDone[id](addr, len, crc, error); } command error_t BlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc) { error_t error = FAIL; if (id == READSOURCE_MEMORY) { error = call SubMemoryRead.computeCrc(addr, len, crc); } else { error = call SubBlockRead.computeCrc[id](addr, len, crc); } return error; } command storage_len_t BlockRead.getSize[uint8_t id]() { storage_len_t len; if (id == READSOURCE_MEMORY) { len = call SubMemoryRead.getSize(); } else { len = call SubBlockRead.getSize[id](); } return len; } default command error_t SubBlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t SubBlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; } default command storage_len_t SubBlockRead.getSize[uint8_t id]() { return 0; } default event void BlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void BlockRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/MemoryStorageC.nc000077500000000000000000000035011207233610700250110ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ configuration MemoryStorageC { provides interface BlockRead; } implementation { components MemoryStorageP, CrcC; BlockRead = MemoryStorageP; MemoryStorageP.Crc -> CrcC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/MemoryStorageP.nc000077500000000000000000000024521207233610700250320ustar00rootroot00000000000000module MemoryStorageP { provides interface BlockRead; uses interface Crc; } implementation { storage_addr_t retAddr; void *retBuf; storage_len_t retLen; uint16_t retCrc; task void taskReadDone() { signal BlockRead.readDone(retAddr, retBuf, retLen, SUCCESS); } command error_t BlockRead.read(storage_addr_t addr, void* buf, storage_len_t len) { storage_len_t i; uint8_t *from = (uint8_t *)((void *)((uint16_t)addr)); for (i = 0; i < len; i++) { ((uint8_t *)buf)[i] = from[i]; } retAddr = addr; retBuf = buf; retLen = len; post taskReadDone(); return SUCCESS; } task void taskCrcDone() { signal BlockRead.computeCrcDone(retAddr, retLen, retCrc, SUCCESS); } command error_t BlockRead.computeCrc(storage_addr_t addr, storage_len_t len, uint16_t crc) { retCrc = call Crc.seededCrc16(crc, (void *)addr, len); retAddr = addr; retLen = len; post taskCrcDone(); return SUCCESS; } command storage_len_t BlockRead.getSize() { return 0; // Not sure what to do } default event void BlockRead.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error) {} default event void BlockRead.computeCrcDone(storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/NullVolumeMapC.nc000077500000000000000000000007371207233610700247640ustar00rootroot00000000000000 /** * @author Jeongyeup Paek */ #include "DynamicLoader.h" module NullVolumeMapC { provides interface BlockRead[uint8_t id]; } implementation { command error_t BlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } command error_t BlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; } command storage_len_t BlockRead.getSize[uint8_t id]() { return 0; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/PMManager.nc000066400000000000000000000033721207233610700237230ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ interface PMManager { command uint16_t request(uint16_t size); command void release(uint16_t startingAddr, uint16_t size); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/PMManagerC.nc000066400000000000000000000036661207233610700240340ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ configuration PMManagerC { provides interface PMManager; } implementation { components MainC, PMManagerP, LedsC, BitArrayUtilsC; PMManager = PMManagerP; MainC.SoftwareInit -> PMManagerP; PMManagerP.BitArrayUtils -> BitArrayUtilsC; PMManagerP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/PMManagerP.nc000066400000000000000000000121441207233610700240400ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ module PMManagerP { provides { interface Init; interface PMManager; } uses { interface BitArrayUtils; interface Leds; } } implementation { uint16_t HOST_ROM_SIZE = 0; // Set by tos-set-symbol uint16_t SEGMENT_SIZE = 512; // For telosb, the internal flash segment size is 512 bytes uint16_t FLASH_ROM_START_ADDR = 0x4000; // For telosb, the program memory starts at 0x4000 uint16_t FLASH_ROM_END_ADDR = 0xFDFF; // Last free byte (the last segment is used for interrupt vector) uint16_t numFreeSegments = 0; uint8_t *segmentBitArray; command error_t Init.init() { uint16_t numBytes; // Adjust FLASH_ROM_START_ADDR to account for the code loaded with PMManager if (HOST_ROM_SIZE == 0) { // Should not be here at all // return FAIL; } else { FLASH_ROM_START_ADDR += (((HOST_ROM_SIZE - 1) / SEGMENT_SIZE) + 1) * SEGMENT_SIZE; } // Calculates the number of available segments numFreeSegments = FLASH_ROM_END_ADDR - FLASH_ROM_START_ADDR + 1; numFreeSegments = ((numFreeSegments - 1) / SEGMENT_SIZE) + 1; // Initializes an bit array to track the status of available segments numBytes = ((numFreeSegments - 1) / 8) + 1; segmentBitArray = malloc(numBytes); call BitArrayUtils.clrArray(segmentBitArray, numBytes); return SUCCESS; } uint16_t bitIndexToAddress(uint16_t bitIndex) { return FLASH_ROM_START_ADDR + (bitIndex * SEGMENT_SIZE); } void eraseSegment(void* addr) { FCTL2 = FWKEY + FSSEL1 + FN2; FCTL3 = FWKEY; FCTL1 = FWKEY + ERASE; *((uint16_t *)addr) = 0; FCTL1 = FWKEY; FCTL3 = FWKEY + LOCK; } command uint16_t PMManager.request(uint16_t size) { if (size > 0) { uint8_t numSegments = ((size - 1) / SEGMENT_SIZE) + 1; // Number of segments needed to cover size int i; for (i = (numFreeSegments - 1); i >= 0; i--) { if (call BitArrayUtils.getBit(segmentBitArray, i) == FALSE) { int j, tempNumSegments = numSegments - 1; for (j = (i - 1); j >= 0 && tempNumSegments > 0; ) { // Checks if there are enough consecutive free segments if (call BitArrayUtils.getBit(segmentBitArray, j) == TRUE) { break; } else { j--; tempNumSegments--; } } j++; if ((i - j + 1) >= numSegments) { // There are enough consecutive free segments (starting segment index (j + 1)) int k; for (k = j; k <= i; k++) { eraseSegment((void *)bitIndexToAddress(k)); // Erase segment content call BitArrayUtils.setBit(segmentBitArray, k); // Mark segment as occupied } return bitIndexToAddress(j); } else { i = j; } } } } return 0xFFFF; } command void PMManager.release(uint16_t startingAddr, uint16_t size) { if ((startingAddr >= FLASH_ROM_START_ADDR && startingAddr <= FLASH_ROM_END_ADDR) && size > 0) { uint8_t numSegments = ((size - 1) / SEGMENT_SIZE) + 1; // Number of segments needed to cover size uint8_t startingSegment = (startingAddr - FLASH_ROM_START_ADDR) / SEGMENT_SIZE; int i; for (i = 0; i < numSegments && (i + startingSegment) < numFreeSegments; i++) { call BitArrayUtils.clrBit(segmentBitArray, i + startingSegment); // Mark the segment as free } } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/TosThreadApiC.nc000066400000000000000000000074071207233610700245510ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "tosthread.h" configuration TosThreadApiC { } implementation { //Here are all the components that implement the Tosthread API calls components CThreadC; #if defined(PRINTF_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components PrintfC; #endif #if defined(TOSTHREAD_QUEUE_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CQueueC; #endif #if defined(TOSTHREAD_LINKED_LIST_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CLinkedListC; #endif #if defined(TOSTHREAD_THREADSYNC_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CThreadSynchronizationC; #endif #if defined(TOSTHREAD_LEDS_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CLedsC; #endif #if defined(TOSTHREAD_AMRADIO_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CAMRadioC; #endif #if defined(TOSTHREAD_AMSERIAL_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CAMSerialC; #endif #if defined(TOSTHREAD_BLOCKSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CBlockStorageC; #endif #if defined(TOSTHREAD_BLOCKSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CConfigStorageC; #endif #if defined(TOSTHREAD_LOGSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CLogStorageC; #endif #if defined(TOSTHREAD_COLLECTION_H) || defined(TOSTHREAD_DYNAMIC_LOADER) // components CCollectionC; #endif //Telosb sensorboard specific. #if defined(TOSTHREAD_HAMAMATSUS1087_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CHamamatsuS1087ParC; #endif #if defined(TOSTHREAD_HAMAMATSUS10871_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CHamamatsuS10871TsrC; #endif #if defined(TOSTHREAD_SENSIRIONSHT11_H) || defined(TOSTHREAD_DYNAMIC_LOADER) components CSensirionSht11C; #endif //Universal sensorboard specific #if defined(TOSTHREAD_SINESENSOR_H) || defined(TOSTHREAD_DYNAMIC_LOADER) // components CSineSensorC; #endif //Basicsb sensorboard specific #if defined(TOSTHREAD_PHOTO_H) || defined(TOSTHREAD_DYNAMIC_LOADER) // components CPhotoC; #endif #if defined(TOSTHREAD_TEMP_H) || defined(TOSTHREAD_DYNAMIC_LOADER) // components CTempC; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/UserButton.nc000077500000000000000000000000571207233610700242260ustar00rootroot00000000000000interface UserButton { event void fired(); } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/UserButtonC.nc000077500000000000000000000043071207233610700243330ustar00rootroot00000000000000/* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Init/start/stop the user button with StdControl and get interrupt events * when the button is released with MSP430Event. * * @author Cory Sharp * @author Andrew Redfern */ configuration UserButtonC { provides interface UserButton; } implementation { components MainC, new TimerMilliC(), HplMsp430GeneralIOC, HplMsp430InterruptC, UserButtonP; UserButton = UserButtonP; MainC.SoftwareInit -> UserButtonP; UserButtonP -> HplMsp430GeneralIOC.Port27; UserButtonP -> HplMsp430InterruptC.Port27; UserButtonP.Timer -> TimerMilliC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/UserButtonP.nc000077500000000000000000000052441207233610700243510ustar00rootroot00000000000000/* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Andew's timer debouce logic used from the CountInput application. * * @author Cory Sharp * @author Andrew Redfern */ module UserButtonP { provides { interface Init; interface UserButton; } uses { interface HplMsp430GeneralIO; interface HplMsp430Interrupt; interface Timer; } } implementation { command error_t Init.init() { atomic { call HplMsp430Interrupt.disable(); call HplMsp430GeneralIO.makeInput(); call HplMsp430GeneralIO.selectIOFunc(); call HplMsp430Interrupt.edge(TRUE); call HplMsp430Interrupt.clear(); call HplMsp430Interrupt.enable(); } return SUCCESS; } event void Timer.fired() { atomic { call HplMsp430Interrupt.clear(); call HplMsp430Interrupt.enable(); } } task void debounce() { call Timer.startOneShot(100); signal UserButton.fired(); } async event void HplMsp430Interrupt.fired() { atomic { call HplMsp430Interrupt.disable(); post debounce(); } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/slcs_types.h000077500000000000000000000056761207233610700241470ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #ifndef _SLCS_TYPES_H #define _SLCS_TYPES_H #include "tosthread.h" #include "tosthread_leds.h" #include "tosthread_amradio.h" #include "tosthread_blockstorage.h" #include "tosthread_logstorage.h" #include "tosthread_configstorage.h" #include "tosthread_threadsync.h" #include "tosthread_amserial.h" #include "tosthread_queue.h" #include "tosthread_sensirionSht11.h" #include "tosthread_hamamatsuS10871.h" #include "tosthread_hamamatsuS1087.h" struct value_addr_pair { uint16_t value; void *addr; }; struct addr { void *addr; }; struct prog_desc { uint16_t main_addr; // Loadable program's main function (or tosthread_main() in our case) uint16_t alloc_count; uint16_t alloc_size; uint16_t g_reloc_count; uint16_t l_reloc_count; uint16_t datasec_count; uint16_t code_count; uint16_t patch_table_count; // alloc_count + g_reloc_count + l_reloc_count; uint16_t code_offset; // sizeof(main_addr) + // sizeof(alloc_count) + // sizeof(alloc_size) + // sizeof(g_reloc_count) + // sizeof(l_reloc_count) + // sizeof(datasec_count) + // sizeof(code_count) + // (g_sym_count + patch_table_count) * 4 uint16_t loading_stage; }; #endif tinyos-2.1.2+dfsg/tos/lib/tosthreads/lib/tinyld/tosthread_slcs_types.h000077500000000000000000000102531207233610700262070ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #ifndef _TOSTHREAD_SLCS_TYPES_H #define _TOSTHREAD_SLCS_TYPES_H #include "slcs_types.h" struct addr fun[] = { {tosthread_sleep}, {tosthread_create}, {led0On}, {led1On}, {led2On}, {led0Off}, {led1Off}, {led2Off}, {led0Toggle}, {led1Toggle}, {led2Toggle}, {amSerialStart}, {amSerialStop}, {amSerialReceive}, {amSerialSend}, {amSerialLocalAddress}, {amSerialGetLocalGroup}, {amSerialGetDestination}, {amSerialGetSource}, {amSerialSetDestination}, {amSerialSetSource}, {amSerialIsForMe}, {amSerialGetType}, {amSerialSetType}, {amSerialGetGroup}, {amSerialSetGroup}, {serialClear}, {serialGetPayloadLength}, {serialSetPayloadLength}, {serialMaxPayloadLength}, {serialGetPayload}, {serialRequestAck}, {serialNoAck}, {serialWasAcked}, {amRadioStart}, {amRadioStop}, {amRadioReceive}, {amRadioSend}, {amRadioGetLocalAddress}, {amRadioGetLocalGroup}, {amRadioGetDestination}, {amRadioGetSource}, {amRadioSetDestination}, {amRadioSetSource}, {amRadioIsForMe}, {amRadioGetType}, {amRadioSetType}, {amRadioGetGroup}, {amRadioSetGroup}, {radioClear}, {radioGetPayloadLength}, {radioSetPayloadLength}, {radioMaxPayloadLength}, {radioGetPayload}, {radioRequestAck}, {radioNoAck}, {radioWasAcked}, {semaphore_reset}, {semaphore_acquire}, {semaphore_release}, {barrier_reset}, {barrier_block}, {barrier_isBlocking}, {condvar_init}, {condvar_wait}, {condvar_signalNext}, {condvar_signalAll}, {condvar_isBlocking}, {mutex_init}, {mutex_lock}, {mutex_unlock}, {volumeBlockRead}, {volumeBlockWrite}, {volumeBlockCrc}, {volumeBlockErase}, {volumeBlockSync}, {refcounter_init}, {refcounter_increment}, {refcounter_decrement}, {refcounter_waitOnValue}, {refcounter_count}, {amRadioSnoop}, {queue_init}, {queue_clear}, {queue_enqueue}, {queue_dequeue}, {queue_remove}, {queue_size}, {queue_is_empty}, {sensirionSht11_humidity_read}, {sensirionSht11_humidity_getNumBits}, {sensirionSht11_temperature_read}, {sensirionSht11_temperature_getNumBits}, {hamamatsuS10871_tsr_read}, {hamamatsuS10871_tsr_readStream}, {hamamatsuS10871_tsr_getNumBits}, {hamamatsuS1087_par_read}, {hamamatsuS1087_par_readStream}, {hamamatsuS1087_par_getNumBits}, {volumeLogRead}, {volumeLogCurrentReadOffset}, {volumeLogSeek}, {volumeLogGetSize}, {volumeLogAppend}, {volumeLogCurrentWriteOffset}, {volumeLogErase}, {volumeLogSync}, {getLeds}, {setLeds}, {div}, {tosthread_join}, {volumeConfigMount}, {volumeConfigRead}, {volumeConfigWrite}, {volumeConfigCommit}, {volumeConfigGetSize}, {volumeConfigValid} }; #endif tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/000077500000000000000000000000001207233610700215235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/epic/000077500000000000000000000000001207233610700224435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/epic/ActiveMessageC.nc000066400000000000000000000064271207233610700256210ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * * The Active Message layer on the Telos platform. This is a naming wrapper * around the CC2420 Active Message layer. * * @author Philip Levis * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:52 $ */ #include "Timer.h" configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components CC2420ActiveMessageC as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; components CC2420PacketC; PacketTimeStamp32khz = CC2420PacketC; PacketTimeStampMilli = CC2420PacketC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/epic/TelosSerialP.nc000066400000000000000000000013151207233610700253330ustar00rootroot00000000000000module TelosSerialP { provides interface StdControl; provides interface Msp430UartConfigure; uses interface Resource; } implementation { msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_57600, umctl: UMCTL_1MHZ_57600, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} }; command error_t StdControl.start(){ return call Resource.immediateRequest(); } command error_t StdControl.stop(){ call Resource.release(); return SUCCESS; } event void Resource.granted(){} async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_telos_config; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/eyesIFX/000077500000000000000000000000001207233610700230375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/eyesIFX/ActiveMessageC.nc000066400000000000000000000070761207233610700262160ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * * The Active Message layer on the eyesIFX platforms. This is a naming wrapper * around the TDA5250 Active Message layer. * * @author Philip Levis * @author Vlado Handziski (TDA5250 modifications) * @date July 20 2005 */ #include "Timer.h" configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[uint8_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components ActiveMessageFilterC as Filter; components Tda5250ActiveMessageC as AM; components PacketStampC as PacketStamp; AMSend = Filter; Receive = Filter.Receive; ReceiveDefault = Filter.ReceiveDefault; Snoop = Filter.Snoop; SnoopDefault = Filter.SnoopDefault; Filter.SubAMSend -> AM; Filter.SubReceive -> AM.Receive; Filter.SubSnoop -> AM.Snoop; //Filter.AMPacket -> AM; SplitControl = AM; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; PacketTimeStamp32khz = PacketStamp; PacketTimeStampMilli = PacketStamp; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/eyesIFX/ActiveMessageFilterC.nc000066400000000000000000000101021207233610700273440ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-07-24 20:07:21 $ * @author: Jan Hauer * ======================================================================== */ /* This component is the default AM filter component: it does not do anything, * it uses no RAM and nesC will compile all code away. Its purpose is to allow * other components to shadow (overwrite) it to implement their own * filter/statistic component. */ #include "AM.h" module ActiveMessageFilterC { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; } uses { interface AMSend as SubAMSend[am_id_t id]; interface Receive as SubReceive[am_id_t id]; interface Receive as SubSnoop[am_id_t id]; } } implementation { command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len){ return call SubAMSend.send[id](addr, msg, len);} command error_t AMSend.cancel[am_id_t id](message_t* msg){ return call SubAMSend.cancel[id](msg);} command uint8_t AMSend.maxPayloadLength[am_id_t id](){ return call SubAMSend.maxPayloadLength[id]();} command void* AMSend.getPayload[am_id_t id](message_t* msg, uint8_t len){ return call SubAMSend.getPayload[id](msg, len);} event void SubAMSend.sendDone[am_id_t id](message_t* msg, error_t error) { signal AMSend.sendDone[id](msg, error); } default event void AMSend.sendDone[am_id_t id](message_t* msg, error_t error) { return; } event message_t* SubReceive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal Receive.receive[id](msg, payload, len); } event message_t* SubSnoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal Snoop.receive[id](msg, payload, len); } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal ReceiveDefault.receive[id](msg, payload, len); } default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal SnoopDefault.receive[id](msg, payload, len); } default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/iris/000077500000000000000000000000001207233610700224715ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/iris/ActiveMessageC.nc000066400000000000000000000054511207233610700256430ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ /* * Make active message TOSThreads-compatible by exposing default interfaces * * Author: Chieh-Jan Mike Liang */ #include configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[uint8_t id]; interface Receive[uint8_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[uint8_t id]; interface Receive as SnoopDefault[am_id_t id]; interface SendNotifier[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface PacketTimeStamp as PacketTimeStampMicro; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RF230ActiveMessageC as MessageC; SplitControl = MessageC; AMSend = MessageC; Receive = MessageC.Receive; ReceiveDefault = MessageC.ReceiveDefault; Snoop = MessageC.Snoop; SnoopDefault = MessageC.SnoopDefault; SendNotifier = MessageC; Packet = MessageC; AMPacket = MessageC; PacketAcknowledgements = MessageC; LowPowerListening = MessageC; PacketLink = MessageC; PacketTimeStampMilli = MessageC; PacketTimeStampMicro = MessageC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2/000077500000000000000000000000001207233610700225165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2/ActiveMessageC.nc000066400000000000000000000057361207233610700256760ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * The Active Message layer on the mica2 platform. This is a naming wrapper * around the CC1000 Active Message layer. * * @author Philip Levis * @date June 19 2005 */ configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[uint8_t id]; interface Receive[uint8_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } } implementation { components CC1000ActiveMessageC as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2/chips/000077500000000000000000000000001207233610700236245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2/chips/cc1000/000077500000000000000000000000001207233610700245125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2/chips/cc1000/HplCC1000InitP.nc000066400000000000000000000053701207233610700272370ustar00rootroot00000000000000// $Id: HplCC1000InitP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* tab:4 * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Hardware initialisation for the CC1000 radio. This component is always * included even if the radio is not used. * * @author David Gay */ configuration HplCC1000InitP { provides interface Init as PlatformInit; } implementation { components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO; PlatformInit = HplCC1000P; PlatformInit = HplCC1000SpiP; HplCC1000P.CHP_OUT -> IO.PortA6; HplCC1000P.PALE -> IO.PortD4; HplCC1000P.PCLK -> IO.PortD6; HplCC1000P.PDATA -> IO.PortD7; HplCC1000SpiP.SpiSck -> IO.PortB1; HplCC1000SpiP.SpiMiso -> IO.PortB3; HplCC1000SpiP.SpiMosi -> IO.PortB2; HplCC1000SpiP.OC1C -> IO.PortB7; components PlatformInterruptC; HplCC1000SpiP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc000066400000000000000000000076771207233610700271030ustar00rootroot00000000000000// $Id: HplCC1000SpiP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Low-level functions to access the CC1000 bus. Built using the mica2 * hardware SPI. * * @author Jaein Jeong * @author Philip buonadonna */ module HplCC1000SpiP { provides interface Init as PlatformInit; provides interface HplCC1000Spi; //uses interface PowerManagement; uses { interface GeneralIO as SpiSck; interface GeneralIO as SpiMiso; interface GeneralIO as SpiMosi; interface GeneralIO as OC1C; interface PlatformInterrupt; } } implementation { uint8_t outgoingByte; command error_t PlatformInit.init() { call SpiSck.makeInput(); call OC1C.makeInput(); call HplCC1000Spi.rxMode(); return SUCCESS; } AVR_ATOMIC_HANDLER(SIG_SPI) { register uint8_t temp = SPDR; SPDR = outgoingByte; signal HplCC1000Spi.dataReady(temp); call PlatformInterrupt.postAmble(); } default async event void HplCC1000Spi.dataReady(uint8_t data) { } async command void HplCC1000Spi.writeByte(uint8_t data) { atomic outgoingByte = data; } async command bool HplCC1000Spi.isBufBusy() { return bit_is_clear(SPSR, SPIF); } async command uint8_t HplCC1000Spi.readByte() { return SPDR; } async command void HplCC1000Spi.enableIntr() { //sbi(SPCR,SPIE); SPCR = 0xc0; CLR_BIT(DDRB, 0); //call PowerManagement.adjustPower(); } async command void HplCC1000Spi.disableIntr() { CLR_BIT(SPCR, SPIE); SET_BIT(DDRB, 0); CLR_BIT(PORTB, 0); //call PowerManagement.adjustPower(); } async command void HplCC1000Spi.initSlave() { atomic { CLR_BIT(SPCR, CPOL); // Set proper polarity... CLR_BIT(SPCR, CPHA); // ...and phase SET_BIT(SPCR, SPIE); // enable spi port SET_BIT(SPCR, SPE); } } async command void HplCC1000Spi.txMode() { call SpiMiso.makeOutput(); call SpiMosi.makeOutput(); } async command void HplCC1000Spi.rxMode() { call SpiMiso.makeInput(); call SpiMosi.makeInput(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2dot/000077500000000000000000000000001207233610700232255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2dot/chips/000077500000000000000000000000001207233610700243335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2dot/chips/cc1000/000077500000000000000000000000001207233610700252215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc000066400000000000000000000053501207233610700277440ustar00rootroot00000000000000// $Id: HplCC1000InitP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Hardware initialisation for the CC1000 radio. This component is always * included even if the radio is not used. * * @author David Gay */ configuration HplCC1000InitP { provides interface Init as PlatformInit; } implementation { components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO; PlatformInit = HplCC1000P; PlatformInit = HplCC1000SpiP; HplCC1000P.CHP_OUT -> IO.PortE7; HplCC1000P.PALE -> IO.PortD5; HplCC1000P.PCLK -> IO.PortD6; HplCC1000P.PDATA -> IO.PortD7; HplCC1000SpiP.SpiSck -> IO.PortB1; HplCC1000SpiP.SpiMiso -> IO.PortB3; HplCC1000SpiP.SpiMosi -> IO.PortB2; HplCC1000SpiP.OC1C -> IO.PortB7; components PlatformInterruptC; HplCC1000SpiP.PlatformInterrupt -> PlatformInterruptC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/micaz/000077500000000000000000000000001207233610700226265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/micaz/ActiveMessageC.nc000066400000000000000000000063651207233610700260050ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * * The Active Message layer on the micaZ platform. This is a naming wrapper * around the CC2420 Active Message layer. * * @author Philip Levis * @date June 19 2005 */ #include "Timer.h" configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components CC2420ActiveMessageC as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; components CC2420PacketC; PacketTimeStamp32khz = CC2420PacketC; PacketTimeStampMilli = CC2420PacketC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mulle/000077500000000000000000000000001207233610700226415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/mulle/ActiveMessageC.nc000066400000000000000000000057451207233610700260210ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ /* * Make active message TOSThreads-compatible by exposing default interfaces * * Author: Chieh-Jan Mike Liang */ #include configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[uint8_t id]; interface Receive[uint8_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[uint8_t id]; interface Receive as SnoopDefault[am_id_t id]; interface SendNotifier[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface PacketTimeStamp as PacketTimeStampMicro; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RF230ActiveMessageC as MessageC, RF230SplitControlP, new SystemClockControlC(); RF230SplitControlP.SplitControlOrig -> MessageC; RF230SplitControlP.SystemClockControl -> SystemClockControlC; SplitControl = RF230SplitControlP.SplitControl; AMSend = MessageC; Receive = MessageC.Receive; ReceiveDefault = MessageC.ReceiveDefault; Snoop = MessageC.Snoop; SnoopDefault = MessageC.SnoopDefault; SendNotifier = MessageC; Packet = MessageC; AMPacket = MessageC; PacketAcknowledgements = MessageC; LowPowerListening = MessageC; PacketLink = MessageC; PacketTimeStampMilli = MessageC; PacketTimeStampMicro = MessageC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/shimmer/000077500000000000000000000000001207233610700231675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/shimmer/ActiveMessageC.nc000066400000000000000000000064271207233610700263450ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * * The Active Message layer on the Telos platform. This is a naming wrapper * around the CC2420 Active Message layer. * * @author Philip Levis * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:52 $ */ #include "Timer.h" configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components CC2420ActiveMessageC as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; components CC2420PacketC; PacketTimeStamp32khz = CC2420PacketC; PacketTimeStampMilli = CC2420PacketC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/telosa/000077500000000000000000000000001207233610700230125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/telosa/ActiveMessageC.nc000066400000000000000000000064271207233610700261700ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * * The Active Message layer on the Telos platform. This is a naming wrapper * around the CC2420 Active Message layer. * * @author Philip Levis * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:52 $ */ #include "Timer.h" configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components CC2420ActiveMessageC as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; components CC2420PacketC; PacketTimeStamp32khz = CC2420PacketC; PacketTimeStampMilli = CC2420PacketC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/telosa/TelosSerialP.nc000066400000000000000000000013151207233610700257020ustar00rootroot00000000000000module TelosSerialP { provides interface StdControl; provides interface Msp430UartConfigure; uses interface Resource; } implementation { msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_57600, umctl: UMCTL_1MHZ_57600, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} }; command error_t StdControl.start(){ return call Resource.immediateRequest(); } command error_t StdControl.stop(){ call Resource.release(); return SUCCESS; } event void Resource.granted(){} async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_telos_config; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/tinynode/000077500000000000000000000000001207233610700233545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/platforms/tinynode/ActiveMessageC.nc000066400000000000000000000057641207233610700265350ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * * The Active Message layer on the TinyNode platform. This is a naming wrapper * around the XE1205 Active Message layer. * * @author Philip Levis, Henri Dubois-Ferriere */ configuration ActiveMessageC { provides { interface SplitControl @atleastonce(); interface AMSend[uint8_t id]; interface Receive[am_id_t id]; interface Receive as ReceiveDefault[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Receive as SnoopDefault[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } } implementation { components XE1205ActiveMessageC as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; ReceiveDefault = AM.ReceiveDefault; Snoop = AM.Snoop; SnoopDefault = AM.SnoopDefault; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/000077500000000000000000000000001207233610700222205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/000077500000000000000000000000001207233610700236265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/BlockingPhotoC.nc000066400000000000000000000015401207233610700270150ustar00rootroot00000000000000/* $Id: BlockingPhotoC.nc,v 1.1 2008-06-14 19:27:25 klueska Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Photodiode of the basicsb sensor board. * * @author David Gay * @author Kevin Klues */ generic configuration BlockingPhotoC() { provides interface BlockingRead; } implementation { components new BlockingAdcReadClientC(), PhotoDeviceP; BlockingRead = BlockingAdcReadClientC; BlockingAdcReadClientC.Atm128AdcConfig -> PhotoDeviceP; BlockingAdcReadClientC.ResourceConfigure -> PhotoDeviceP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/BlockingPhotoStreamC.nc000066400000000000000000000016201207233610700301700ustar00rootroot00000000000000/* $Id: BlockingPhotoStreamC.nc,v 1.1 2008-06-14 19:27:25 klueska Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Photodiode of the basicsb sensor board. * * @author David Gay * @author Kevin Klues */ generic configuration BlockingPhotoStreamC() { provides interface BlockingReadStream; } implementation { components PhotoDeviceP, new BlockingAdcReadStreamClientC(); BlockingReadStream = BlockingAdcReadStreamClientC; BlockingAdcReadStreamClientC.Atm128AdcConfig -> PhotoDeviceP; BlockingAdcReadStreamClientC.ResourceConfigure -> PhotoDeviceP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/BlockingTempC.nc000066400000000000000000000014521207233610700266330ustar00rootroot00000000000000/* $Id: BlockingTempC.nc,v 1.1 2008-06-14 19:27:25 klueska Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Thermistor of the basicsb sensor board. * * @author David Gay */ generic configuration BlockingTempC() { provides interface BlockingRead; } implementation { components new BlockingAdcReadClientC(), TempDeviceP; BlockingRead = BlockingAdcReadClientC; BlockingAdcReadClientC.Atm128AdcConfig -> TempDeviceP; BlockingAdcReadClientC.ResourceConfigure -> TempDeviceP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/BlockingTempStreamC.nc000066400000000000000000000016031207233610700300050ustar00rootroot00000000000000/* $Id: BlockingTempStreamC.nc,v 1.1 2008-06-14 19:27:25 klueska Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Thermistor of the basicsb sensor board. * * @author David Gay * @author Kevin Klues */ generic configuration TempStreamC() { provides interface BlockingReadStream; } implementation { components TempDeviceP, new BlockingAdcReadStreamClientC(); BlockingReadStream = BlockingAdcReadStreamClientC; BlockingAdcReadStreamClientC.Atm128AdcConfig -> TempDeviceP; BlockingAdcReadStreamClientC.ResourceConfigure -> TempDeviceP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/CPhotoC.nc000066400000000000000000000034731207233610700254560ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration CPhotoC {} implementation { components CPhotoP; components new BlockingPhotoC(); CPhotoP.BlockingRead -> BlockingPhotoC; CPhotoP.BlockingReadStream -> BlockingPhotoC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/CPhotoP.nc000066400000000000000000000040071207233610700254650ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CPhotoP { uses { interface BlockingRead; interface BlockingReadStream; } } implementation { error_t photo_read(uint16_t* val) @C() AT_SPONTANEOUS { return call BlockingRead.read(val); } error_t photo_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count) @C() AT_SPONTANEOUS { return call BlockingReadStream.read(usPeriod, buf, count); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/CTempC.nc000066400000000000000000000034641207233610700252720ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration CTempC {} implementation { components CTempP; components new BlockingTempC(); CTempP.BlockingRead -> BlockingTempC; CTempP.BlockingReadStream -> BlockingTempC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/CTempP.nc000066400000000000000000000040041207233610700252760ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CTempP { uses { interface BlockingRead; interface BlockingReadStream; } } implementation { error_t temp_read(uint16_t* val) @C() AT_SPONTANEOUS { return call BlockingRead.read(val); } error_t temp_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count) @C() AT_SPONTANEOUS { return call BlockingReadStream.read(usPeriod, buf, count); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/basicsb_sensors.h000066400000000000000000000034021207233610700271600ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef BASICSB_SENSORS_H #define BASICSB_SENSORS_H #include "tosthread_photo.h" #include "tosthread_temp.h" #endif //BASICSB_SENSORS_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/tosthread_photo.h000066400000000000000000000035361207233610700272140ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_PHOTO_H #define TOSTHREAD_PHOTO_H #include "TinyError.h" extern error_t photo_read(uint16_t* val); extern error_t photo_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count); #endif //TOSTHREAD_PHOTO_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/basicsb/tosthread_temp.h000066400000000000000000000035311207233610700270230ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_TEMP_H #define TOSTHREAD_TEMP_H #include "TinyError.h" extern error_t temp_read(uint16_t* val); extern error_t temp_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count); #endif //TOSTHREAD_TEMP_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/000077500000000000000000000000001207233610700250545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingHamamatsuS10871TsrC.nc000066400000000000000000000043351207233610700323140ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ generic configuration BlockingHamamatsuS10871TsrC() { provides interface DeviceMetadata; provides interface BlockingRead as Read; provides interface BlockingReadStream as ReadStream; } implementation { components new BlockingAdcReadClientC() as AdcReadClientC; Read = AdcReadClientC; components new BlockingAdcReadStreamClientC() as AdcReadStreamClientC; ReadStream = AdcReadStreamClientC; components HamamatsuS10871TsrP; DeviceMetadata = HamamatsuS10871TsrP; AdcReadClientC.AdcConfigure -> HamamatsuS10871TsrP; AdcReadStreamClientC.AdcConfigure -> HamamatsuS10871TsrP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingHamamatsuS1087ParC.nc000066400000000000000000000043311207233610700322010ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ generic configuration BlockingHamamatsuS1087ParC() { provides interface DeviceMetadata; provides interface BlockingRead as Read; provides interface BlockingReadStream as ReadStream; } implementation { components new BlockingAdcReadClientC() as AdcReadClientC; Read = AdcReadClientC; components new BlockingAdcReadStreamClientC() as AdcReadStreamClientC; ReadStream = AdcReadStreamClientC; components HamamatsuS1087ParP; DeviceMetadata = HamamatsuS1087ParP; AdcReadClientC.AdcConfigure -> HamamatsuS1087ParP; AdcReadStreamClientC.AdcConfigure -> HamamatsuS1087ParP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11C.nc000066400000000000000000000052331207233610700317470ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ generic configuration BlockingSensirionSht11C() { provides interface BlockingRead as Temperature; provides interface DeviceMetadata as TemperatureMetadata; provides interface BlockingRead as Humidity; provides interface DeviceMetadata as HumidityMetadata; } implementation { components new BlockingSensirionSht11ReaderP() as SensirionSht11ReaderP; Temperature = SensirionSht11ReaderP.Temperature; TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata; Humidity = SensirionSht11ReaderP.Humidity; HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata; components HalSensirionSht11C; enum { TEMP_KEY = unique("Sht11.Resource") }; enum { HUM_KEY = unique("Sht11.Resource") }; SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ]; SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ]; SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ]; SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ]; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11ReaderImplP.nc000066400000000000000000000066411207233610700337350ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include generic module BlockingSensirionSht11ReaderImplP() { provides { interface BlockingRead as BlockingTemperature; interface BlockingRead as BlockingHumidity; } uses { interface Read as Temperature; interface Read as Humidity; interface SystemCall; } } implementation { typedef struct params { uint16_t* val; error_t error; } params_t; syscall_t* temp_call = NULL; syscall_t* hum_call = NULL; void tempTask(syscall_t* s) { params_t* p = s->params; p->error = call Temperature.read(); if(p->error != SUCCESS) { call SystemCall.finish(s); } } void humTask(syscall_t* s) { params_t* p = s->params; p->error = call Humidity.read(); if(p->error != SUCCESS) { call SystemCall.finish(s); } } error_t blockingRead(syscall_t** s_call, uint16_t* val, void* task_ptr) { syscall_t s; params_t p; atomic { if(*s_call != NULL) return EBUSY; *s_call = &s; } p.val = val; call SystemCall.start(task_ptr, &s, INVALID_ID, &p); atomic { *s_call = NULL; return p.error; } } command error_t BlockingTemperature.read(uint16_t* val) { return blockingRead(&temp_call, val, tempTask); } command error_t BlockingHumidity.read(uint16_t* val) { return blockingRead(&hum_call, val, humTask); } event void Temperature.readDone( error_t result, uint16_t val ) { params_t* p = temp_call->params; p->error = result; *(p->val) = val; call SystemCall.finish(temp_call); } event void Humidity.readDone( error_t result, uint16_t val ) { params_t* p = hum_call->params; p->error = result; *(p->val) = val; call SystemCall.finish(hum_call); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11ReaderP.nc000066400000000000000000000056531207233610700331150ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" generic configuration BlockingSensirionSht11ReaderP() { provides interface DeviceMetadata as TemperatureMetadata; provides interface BlockingRead as Temperature; provides interface DeviceMetadata as HumidityMetadata; provides interface BlockingRead as Humidity; uses interface Resource as TempResource; uses interface Resource as HumResource; uses interface SensirionSht11 as Sht11Temp; uses interface SensirionSht11 as Sht11Hum; } implementation { components new SensirionSht11ReaderP(); components new BlockingSensirionSht11ReaderImplP(); TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata; Temperature = BlockingSensirionSht11ReaderImplP.BlockingTemperature; HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata; Humidity = BlockingSensirionSht11ReaderImplP.BlockingHumidity; TempResource = SensirionSht11ReaderP.TempResource; HumResource = SensirionSht11ReaderP.HumResource; Sht11Temp = SensirionSht11ReaderP.Sht11Temp; Sht11Hum = SensirionSht11ReaderP.Sht11Hum; BlockingSensirionSht11ReaderImplP.Temperature -> SensirionSht11ReaderP.Temperature; BlockingSensirionSht11ReaderImplP.Humidity -> SensirionSht11ReaderP.Humidity; components SystemCallC; BlockingSensirionSht11ReaderImplP.SystemCall -> SystemCallC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS10871TsrC.nc000066400000000000000000000040201207233610700307350ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration CHamamatsuS10871TsrC {} implementation { components CHamamatsuS10871TsrP; #ifdef PLATFORM_TELOSB components new BlockingHamamatsuS10871TsrC(); CHamamatsuS10871TsrP.DeviceMetadata -> BlockingHamamatsuS10871TsrC.DeviceMetadata; CHamamatsuS10871TsrP.Read -> BlockingHamamatsuS10871TsrC.Read; CHamamatsuS10871TsrP.ReadStream -> BlockingHamamatsuS10871TsrC.ReadStream; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS10871TsrP.nc000066400000000000000000000050761207233610700307660ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CHamamatsuS10871TsrP { uses { interface DeviceMetadata; interface BlockingRead as Read; interface BlockingReadStream as ReadStream; } } implementation { error_t hamamatsuS10871_tsr_read(uint16_t* val) @C() AT_SPONTANEOUS { return call Read.read(val); } error_t hamamatsuS10871_tsr_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count) @C() AT_SPONTANEOUS { return call ReadStream.read(usPeriod, buf, count); } uint8_t hamamatsuS10871_tsr_getNumBits() @C() AT_SPONTANEOUS { return call DeviceMetadata.getSignificantBits(); } default command error_t Read.read(uint16_t* val) { return FAIL; } default command error_t ReadStream.read(uint32_t* usPeriod, uint16_t* buf, uint16_t count) { return FAIL; } default command uint8_t DeviceMetadata.getSignificantBits() { return 0; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS1087ParC.nc000066400000000000000000000040071207233610700306330ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration CHamamatsuS1087ParC {} implementation { components CHamamatsuS1087ParP; #ifdef PLATFORM_TELOSB components new BlockingHamamatsuS1087ParC(); CHamamatsuS1087ParP.DeviceMetadata -> BlockingHamamatsuS1087ParC.DeviceMetadata; CHamamatsuS1087ParP.Read -> BlockingHamamatsuS1087ParC.Read; CHamamatsuS1087ParP.ReadStream -> BlockingHamamatsuS1087ParC.ReadStream; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS1087ParP.nc000066400000000000000000000050731207233610700306540ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CHamamatsuS1087ParP { uses { interface DeviceMetadata; interface BlockingRead as Read; interface BlockingReadStream as ReadStream; } } implementation { error_t hamamatsuS1087_par_read(uint16_t* val) @C() AT_SPONTANEOUS { return call Read.read(val); } error_t hamamatsuS1087_par_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count) @C() AT_SPONTANEOUS { return call ReadStream.read(usPeriod, buf, count); } uint8_t hamamatsuS1087_par_getNumBits() @C() AT_SPONTANEOUS { return call DeviceMetadata.getSignificantBits(); } default command error_t Read.read(uint16_t* val) { return FAIL; } default command error_t ReadStream.read(uint32_t* usPeriod, uint16_t* buf, uint16_t count) { return FAIL; } default command uint8_t DeviceMetadata.getSignificantBits() { return 0; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/CSensirionSht11C.nc000066400000000000000000000041211207233610700303740ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration CSensirionSht11C {} implementation { components CSensirionSht11P; #ifdef PLATFORM_TELOSB components new BlockingSensirionSht11C(); CSensirionSht11P.Temperature -> BlockingSensirionSht11C.Temperature; CSensirionSht11P.TemperatureMetadata -> BlockingSensirionSht11C.TemperatureMetadata; CSensirionSht11P.Humidity -> BlockingSensirionSht11C.Humidity; CSensirionSht11P.HumidityMetadata -> BlockingSensirionSht11C.HumidityMetadata; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/CSensirionSht11P.nc000066400000000000000000000053071207233610700304200ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CSensirionSht11P { uses { interface BlockingRead as Temperature; interface DeviceMetadata as TemperatureMetadata; interface BlockingRead as Humidity; interface DeviceMetadata as HumidityMetadata; } } implementation { error_t sensirionSht11_humidity_read(uint16_t* val) @C() AT_SPONTANEOUS { return call Humidity.read(val); } uint8_t sensirionSht11_humidity_getNumBits() @C() AT_SPONTANEOUS { return call HumidityMetadata.getSignificantBits(); } error_t sensirionSht11_temperature_read(uint16_t* val) @C() AT_SPONTANEOUS { return call Temperature.read(val); } uint8_t sensirionSht11_temperature_getNumBits() @C() AT_SPONTANEOUS { return call TemperatureMetadata.getSignificantBits(); } default command error_t Humidity.read(uint16_t* val) { return FAIL; } default command uint8_t HumidityMetadata.getSignificantBits() { return 0; } default command error_t Temperature.read(uint16_t* val) { return FAIL; } default command uint8_t TemperatureMetadata.getSignificantBits() { return 0; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/tmote_onboard_sensors.h000066400000000000000000000035161207233610700316420ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TMOTE_ONBOARD_SENSORS_H #define TMOTE_ONBOARD_SENSORS_H #include "tosthread_sensirionSht11.h" #include "tosthread_hamamatsuS1087.h" #include "tosthread_hamamatsuS10871.h" #endif //TMOTE_ONBOARD_SENSORS_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_hamamatsuS1087.h000066400000000000000000000037501207233610700317320ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_HAMAMATSUS1087_H #define TOSTHREAD_HAMAMATSUS1087_H #include "TinyError.h" #define tmote_par hamamatsuS1087_par extern error_t hamamatsuS1087_par_read(uint16_t* val); extern error_t hamamatsuS1087_par_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count); extern uint8_t hamamatsuS1087_par_getNumBits(); #endif //TOSTHREAD_HAMAMATSUS1087_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_hamamatsuS10871.h000066400000000000000000000037561207233610700320210ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_HAMAMATSUS10871_H #define TOSTHREAD_HAMAMATSUS10871_H #include "TinyError.h" #define tmote_tsr hamamatsuS10871_tsr extern error_t hamamatsuS10871_tsr_read(uint16_t* val); extern error_t hamamatsuS10871_tsr_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count); extern uint8_t hamamatsuS10871_tsr_getNumBits(); #endif //TOSTHREAD_HAMAMATSUS1087_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_sensirionSht11.h000066400000000000000000000041111207233610700321310ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_SENSIRIONSHT11_H #define TOSTHREAD_SENSIRIONSHT11_H #include "TinyError.h" #define tmote_humidity sensirionSht11_humidity #define tmote_temperature sensirionSht11_temperature extern error_t sensirionSht11_humidity_read(uint16_t* val); extern uint8_t sensirionSht11_humidity_getNumBits(); extern error_t sensirionSht11_temperature_read(uint16_t* val); extern uint8_t sensirionSht11_temperature_getNumBits(); #endif //TOSTHREAD_SENSIRIONSHT11_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/universal/000077500000000000000000000000001207233610700242305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/universal/BlockingSineSensorC.nc000066400000000000000000000037531207233610700304260ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ generic configuration BlockingSineSensorC() { provides interface Init; provides interface BlockingRead; } implementation { components BlockingSineSensorP; components new SineSensorC(); enum { ID = unique("Sine.Sensor") }; Init = SineSensorC; BlockingRead = BlockingSineSensorP.BlockingRead[ID]; BlockingSineSensorP.Read[ID] -> SineSensorC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/universal/BlockingSineSensorP.nc000066400000000000000000000040151207233610700304330ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration BlockingSineSensorP { provides interface BlockingRead[uint8_t id]; uses interface Read[uint8_t id]; } implementation { components new BlockingReadP(); BlockingRead = BlockingReadP; Read = BlockingReadP; components SystemCallC; components SystemCallQueueC; BlockingReadP.SystemCallQueue -> SystemCallQueueC; BlockingReadP.SystemCall -> SystemCallC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/universal/CSineSensorC.nc000066400000000000000000000034441207233610700270550ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration CSineSensorC {} implementation { components CSineSensorP; components new BlockingSineSensorC(); CSineSensorP.BlockingRead -> BlockingSineSensorC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/universal/CSineSensorP.nc000066400000000000000000000034761207233610700270770ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module CSineSensorP { uses { interface BlockingRead; } } implementation { error_t sinesensor_read(uint16_t* val) @C() AT_SPONTANEOUS { return call BlockingRead.read(val); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/universal/tosthread_sinesensor.h000066400000000000000000000034361207233610700306540ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef TOSTHREAD_SINESENSOR_H #define TOSTHREAD_SINESENSOR_H #include "TinyError.h" extern error_t sinesensor_read(uint16_t* val); #endif //TOSTHREAD_SINESENSOR_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/sensorboards/universal/universal_sensors.h000066400000000000000000000033611207233610700301700ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef UNIVERSAL_SENSORS_H #define UNIVERSAL_SENSORS_H #include "tosthread_sinesensor.h" #endif //UNIVERSAL_SENSORS_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/000077500000000000000000000000001207233610700210405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BarrierC.nc000066400000000000000000000045521207233610700230610ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the barrier implementation. Every barrier has a pointer to * a linked list of threads. When a thread calls block() on a barrier * it is pushed onto the thread queue associated with that barrier and * it is blocked. Once some thread calls unblock() on a particular * barrier, all threads on that barrier's thread queue are popped off * and woken up. * * @author Kevin Klues */ #include "thread.h" #include "barrier.h" configuration BarrierC { provides { interface Barrier; } } implementation { components TinyThreadSchedulerC; components ThreadQueueC; components BarrierP; Barrier = BarrierP; BarrierP.ThreadScheduler -> TinyThreadSchedulerC; BarrierP.ThreadQueue -> ThreadQueueC; components LedsC; BarrierP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BarrierP.nc000066400000000000000000000060161207233610700230730ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the barrier implementation. Every barrier has a pointer to * a linked list of threads. When a thread calls block() on a barrier * it is pushed onto the thread queue associated with that barrier and * it is blocked. Once some thread calls unblock() on a particular * barrier, all threads on that barrier's thread queue are popped off * and woken up. * * @author Kevin Klues */ module BarrierP { provides { interface Barrier; } uses { interface ThreadScheduler; interface ThreadQueue; interface Leds; } } implementation { command void Barrier.reset(barrier_t* b, uint8_t count) { atomic { b->count = count; //Initialize the thread queue associated with this barrier. call ThreadQueue.init(&(b->thread_queue)); } } command void Barrier.block(barrier_t* b) { atomic { if(b->count > 1) { //Push the thread that just called block() onto the thread queue associated with this barrier call ThreadQueue.enqueue(&(b->thread_queue), call ThreadScheduler.currentThreadInfo()); b->count--; call ThreadScheduler.suspendCurrentThread(); } else { thread_t* t; while((t = call ThreadQueue.dequeue(&(b->thread_queue))) != NULL) call ThreadScheduler.wakeupThread(t->id); } } } command bool Barrier.isBlocking(barrier_t* b) { atomic return !(call ThreadQueue.isEmpty(&(b->thread_queue))); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BitArrayUtilsC.nc000066400000000000000000000046601207233610700242310ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * @author Chieh-Jan Mike Liang * @author Kevin Klues */ module BitArrayUtilsC { provides interface BitArrayUtils; } implementation { uint16_t getByteIndex(uint8_t bitIndex) { return bitIndex / 8; } uint8_t getMask(uint8_t bitIndex) { return 1 << (bitIndex % 8); } async command void BitArrayUtils.clrArray(uint8_t* array, uint8_t size) { memset(array, 0, size); } async command bool BitArrayUtils.getBit(uint8_t* array, uint8_t bitIndex) { return (array[getByteIndex(bitIndex)] & getMask(bitIndex)) ? TRUE : FALSE; } async command void BitArrayUtils.setBit(uint8_t* array, uint8_t bitIndex) { array[getByteIndex(bitIndex)] |= getMask(bitIndex); } async command void BitArrayUtils.clrBit(uint8_t* array, uint8_t bitIndex) { array[getByteIndex(bitIndex)] &= ~getMask(bitIndex); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingAMReceiverC.nc000066400000000000000000000037451207233610700251310ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) * @author Chieh-Jan Mike Liang (cliang4@cs.jhu.edu) */ #include "AM.h" generic configuration BlockingAMReceiverC(am_id_t amId) { provides { interface BlockingReceive; interface Packet; interface AMPacket; } } implementation { components BlockingActiveMessageC as AM; BlockingReceive = AM.BlockingReceive[amId]; Packet = AM; AMPacket = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingAMReceiverImplP.nc000066400000000000000000000115031207233610700257570ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ generic module BlockingAMReceiverImplP() { provides { interface Init; interface BlockingReceive[uint8_t id]; interface BlockingReceive as BlockingReceiveAny; } uses { interface Packet; interface Timer[uint8_t id]; interface Receive[uint8_t id]; interface SystemCall; interface SystemCallQueue; interface ThreadScheduler; interface Leds; } } implementation { typedef struct params { uint32_t* timeout; message_t* msg; error_t error; } params_t; //For parameterized BlockingReceive interface syscall_queue_t am_queue; //For single BlockingReceiveAny interface bool blockForAny = FALSE; void timerTask(syscall_t* s) { params_t* p = s->params; call Timer.startOneShot[s->thread->id](*(p->timeout)); } command error_t Init.init() { call SystemCallQueue.init(&am_queue); blockForAny = FALSE; return SUCCESS; } void blockingReceive(syscall_t* s, am_id_t am_id, params_t* p, message_t* m, uint32_t* timeout) { p->msg = m; p->timeout = timeout; atomic { p->error = EBUSY; if(*timeout != 0) call SystemCall.start(&timerTask, s, am_id, p); else call SystemCall.start(SYSCALL_WAIT_ON_EVENT, s, am_id, p); } } command error_t BlockingReceiveAny.receive(message_t* m, uint32_t timeout) { syscall_t s; params_t p; atomic { if((blockForAny == TRUE) || (call SystemCallQueue.isEmpty(&am_queue) == FALSE)) return EBUSY; call SystemCallQueue.enqueue(&am_queue, &s); blockForAny = TRUE; } blockingReceive(&s, INVALID_ID, &p, m, &timeout); atomic { blockForAny = FALSE; call SystemCallQueue.remove(&am_queue, &s); return p.error; } } command error_t BlockingReceive.receive[uint8_t am_id](message_t* m, uint32_t timeout) { syscall_t s; params_t p; atomic { if((blockForAny == TRUE) || (call SystemCallQueue.find(&am_queue, am_id) != NULL)) return EBUSY; call SystemCallQueue.enqueue(&am_queue, &s); } blockingReceive(&s, am_id, &p, m, &timeout); atomic { call SystemCallQueue.remove(&am_queue, &s); return p.error; } } command void* BlockingReceive.getPayload[uint8_t am_id](message_t* msg, uint8_t len) { return call Packet.getPayload(msg,len); } command void* BlockingReceiveAny.getPayload(message_t* msg, uint8_t len) { return call Packet.getPayload(msg,len); } event message_t* Receive.receive[uint8_t am_id](message_t* m, void* payload, uint8_t len) { syscall_t* s; params_t* p; if(blockForAny == TRUE) s = call SystemCallQueue.find(&am_queue, INVALID_ID); else s = call SystemCallQueue.find(&am_queue, am_id); if(s == NULL) return m; p = s->params; if( (p->error == EBUSY) ) { call Timer.stop[s->thread->id](); *(p->msg) = *m; p->error = SUCCESS; call SystemCall.finish(s); } return m; } event void Timer.fired[uint8_t id]() { thread_t* t = call ThreadScheduler.threadInfo(id); params_t* p = t->syscall->params; if( (p->error == EBUSY) ) { p->error = FAIL; call SystemCall.finish(t->syscall); } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingAMReceiverP.nc000066400000000000000000000051341207233610700251400ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "AM.h" #include "thread.h" configuration BlockingAMReceiverP { provides { interface BlockingReceive[uint8_t id]; interface BlockingReceive as BlockingReceiveAny; } uses { interface Receive[uint8_t id]; } } implementation { components MainC; components ActiveMessageC as AM; components new BlockingAMReceiverImplP(); MainC.SoftwareInit -> BlockingAMReceiverImplP; BlockingReceive = BlockingAMReceiverImplP; BlockingReceiveAny = BlockingAMReceiverImplP; Receive = BlockingAMReceiverImplP; BlockingAMReceiverImplP.Packet -> AM; components SystemCallC; components SystemCallQueueC; components TinyThreadSchedulerC; BlockingAMReceiverImplP.SystemCallQueue -> SystemCallQueueC; BlockingAMReceiverImplP.SystemCall -> SystemCallC; BlockingAMReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC; components ThreadTimersC; BlockingAMReceiverImplP.Timer -> ThreadTimersC; components LedsC; BlockingAMReceiverImplP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingAMSenderC.nc000066400000000000000000000037471207233610700246070ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "AM.h" generic configuration BlockingAMSenderC(am_id_t AMId) { provides { interface BlockingAMSend; interface Packet; interface AMPacket; interface PacketAcknowledgements as Acks; } } implementation { components BlockingActiveMessageC as AM; BlockingAMSend = AM.BlockingAMSend[AMId]; Packet = AM; AMPacket = AM; Acks = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingAMSenderImplP.nc000066400000000000000000000070551207233610700254420ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) * @author Chieh-Jan Mike Liang */ generic module BlockingAMSenderImplP() { provides { interface Init; interface BlockingAMSend[am_id_t id]; } uses { interface SystemCall; interface Mutex; interface AMSend[am_id_t id]; interface Packet; interface Leds; } } implementation { typedef struct params { am_addr_t addr; message_t* msg; uint8_t len; error_t error; } params_t; syscall_t* send_call = NULL; mutex_t my_mutex; void sendTask(syscall_t* s) { params_t* p = s->params; p->error = call AMSend.send[s->id](p->addr, p->msg, p->len); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t Init.init() { call Mutex.init(&my_mutex); return SUCCESS; } command error_t BlockingAMSend.send[am_id_t am_id](am_addr_t addr, message_t* msg, uint8_t len) { syscall_t s; params_t p; call Mutex.lock(&my_mutex); if (send_call == NULL) { send_call = &s; p.addr = addr; p.msg = msg; p.len = len; call SystemCall.start(&sendTask, &s, am_id, &p); send_call = NULL; } else { p.error = EBUSY; } atomic { call Mutex.unlock(&my_mutex); return p.error; } } command uint8_t BlockingAMSend.maxPayloadLength[am_id_t id]() { return call Packet.maxPayloadLength(); } command void* BlockingAMSend.getPayload[am_id_t id](message_t* msg, uint8_t len) { return call Packet.getPayload(msg, len); } event void AMSend.sendDone[am_id_t am_id](message_t* m, error_t error) { if (send_call != NULL) { if (send_call->id == am_id) { params_t* p; p = send_call->params; p->error = error; call SystemCall.finish(send_call); } } } default command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingAMSenderP.nc000066400000000000000000000044421207233610700246150ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "AM.h" #include "thread.h" #include "mutex.h" configuration BlockingAMSenderP { provides { interface BlockingAMSend[am_id_t amId]; } uses { interface AMSend[am_id_t amId]; } } implementation { components MainC; components ActiveMessageC as AM; components new BlockingAMSenderImplP(); components MutexC; components SystemCallC; components LedsC; MainC.SoftwareInit -> BlockingAMSenderImplP; BlockingAMSend = BlockingAMSenderImplP; AMSend = BlockingAMSenderImplP; BlockingAMSenderImplP.Mutex -> MutexC; BlockingAMSenderImplP.SystemCall -> SystemCallC; BlockingAMSenderImplP.Packet -> AM; BlockingAMSenderImplP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingAMSnooperC.nc000066400000000000000000000037631207233610700250120ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) * @author Chieh-Jan Mike Liang (cliang4@cs.jhu.edu) */ #include "AM.h" generic configuration BlockingAMSnooperC(am_id_t amId) { provides { interface BlockingReceive as BlockingSnoop; interface Packet; interface AMPacket; } } implementation { components BlockingActiveMessageC as AM; BlockingReceive = AM.BlockingSnoop[amId]; Packet = AM; AMPacket = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingAMSnooperP.nc000066400000000000000000000051551207233610700250240ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "AM.h" #include "thread.h" configuration BlockingAMSnooperP { provides { interface BlockingReceive as BlockingSnoop[uint8_t id]; interface BlockingReceive as BlockingSnoopAny; } uses { interface Receive as Snoop[uint8_t id]; } } implementation { components MainC; components ActiveMessageC as AM; components new BlockingAMReceiverImplP(); MainC.SoftwareInit -> BlockingAMReceiverImplP; BlockingSnoop = BlockingAMReceiverImplP; BlockingSnoopAny = BlockingAMReceiverImplP; Snoop = BlockingAMReceiverImplP; BlockingAMReceiverImplP.Packet -> AM; components SystemCallC; components SystemCallQueueC; components TinyThreadSchedulerC; BlockingAMReceiverImplP.SystemCallQueue -> SystemCallQueueC; BlockingAMReceiverImplP.SystemCall -> SystemCallC; BlockingAMReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC; components ThreadTimersC; BlockingAMReceiverImplP.Timer -> ThreadTimersC; components LedsC; BlockingAMReceiverImplP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingActiveMessageC.nc000066400000000000000000000053101207233610700256550ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration BlockingActiveMessageC { provides { interface BlockingStdControl; interface BlockingReceive[uint8_t id]; interface BlockingReceive as BlockingReceiveAny; interface BlockingReceive as BlockingSnoop[uint8_t id]; interface BlockingReceive as BlockingSnoopAny; interface BlockingAMSend[uint8_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } } implementation { components ActiveMessageC as AM; components new BlockingStdControlC(); components BlockingAMReceiverP as AMReceiverP; components BlockingAMSnooperP as AMSnooperP; components BlockingAMSenderP as AMSenderP; BlockingStdControl = BlockingStdControlC; BlockingReceive = AMReceiverP; BlockingReceiveAny = AMReceiverP; BlockingSnoop = AMSnooperP; BlockingSnoopAny = AMSnooperP; BlockingAMSend = AMSenderP; BlockingStdControlC.SplitControl -> AM; AMReceiverP.Receive -> AM.ReceiveDefault; AMSnooperP.Snoop -> AM.SnoopDefault; AMSenderP.AMSend -> AM.AMSend; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingBlockStorageC.nc000066400000000000000000000042501207233610700255160ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #define UQ_BLOCKING_BLOCK_STORAGE_VOLUME "Blocking.Block.Storage.Volume" generic configuration BlockingBlockStorageC(volume_id_t volume_id) { provides { interface BlockingBlock; } } implementation { enum { VOLUME_ID = unique(UQ_BLOCKING_BLOCK_STORAGE_VOLUME), }; components new BlockStorageC(volume_id), BlockingBlockStorageP; BlockingBlock = BlockingBlockStorageP.BlockingBlock[VOLUME_ID]; BlockingBlockStorageP.BlockRead[VOLUME_ID] -> BlockStorageC; BlockingBlockStorageP.BlockWrite[VOLUME_ID] -> BlockStorageC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingBlockStorageImplP.nc000066400000000000000000000240071207233610700263570ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @author Chieh-Jan Mike Liang */ module BlockingBlockStorageImplP { provides { interface Init; interface BlockingBlock[uint8_t volume_id]; } uses { interface BlockRead[uint8_t volume_id]; interface BlockWrite[uint8_t volume_id]; interface SystemCall; interface SystemCallQueue; } } implementation { typedef struct read_write_params { storage_addr_t addr; void* buf; storage_len_t* len; error_t error; } read_write_params_t; typedef struct crc_params { storage_addr_t addr; storage_len_t* len; uint16_t crc; uint16_t *finalCrc; error_t error; } crc_params_t; typedef struct erase_sync_params { error_t error; } erase_sync_params_t; syscall_queue_t vol_queue; command error_t Init.init() { call SystemCallQueue.init(&vol_queue); return SUCCESS; } command storage_len_t BlockingBlock.getSize[uint8_t volume_id]() { return call BlockRead.getSize[volume_id](); } /**************************** Reading ********************************/ void readTask(syscall_t* s) { read_write_params_t* p = s->params; p->error = call BlockRead.read[s->id](p->addr, p->buf, *(p->len)); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingBlock.read[uint8_t volume_id](storage_addr_t addr, void *buf, storage_len_t* len) { syscall_t s; read_write_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } p.addr = addr; p.buf = buf; p.len = len; call SystemCall.start(&readTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void BlockRead.readDone[uint8_t volume_id](storage_addr_t addr, void *buf, storage_len_t len, error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); read_write_params_t* p = s->params; p->error = error; *(p->len) = len; call SystemCall.finish(s); } /**************************** Writing ********************************/ void writeTask(syscall_t* s) { read_write_params_t* p = s->params; p->error = call BlockWrite.write[s->id](p->addr, p->buf, *(p->len)); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingBlock.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t* len) { syscall_t s; read_write_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } p.addr = addr; p.buf = buf; p.len = len; call SystemCall.start(&writeTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void BlockWrite.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); read_write_params_t* p = s->params; *(p->len) = len; p->error = error; call SystemCall.finish(s); } /**************************** Computing CRC ********************************/ void crcTask(syscall_t* s) { crc_params_t* p = s->params; p->error = call BlockRead.computeCrc[s->id](p->addr, *(p->len), p->crc); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingBlock.computeCrc[uint8_t volume_id](storage_addr_t addr, storage_len_t* len, uint16_t crc, uint16_t *finalCrc) { syscall_t s; crc_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } p.addr = addr; p.len = len; p.crc = crc; p.finalCrc = finalCrc; call SystemCall.start(&crcTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void BlockRead.computeCrcDone[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); crc_params_t* p = s->params; *(p->finalCrc) = crc; *(p->len) = len; p->error = error; call SystemCall.finish(s); } /**************************** Erasing ********************************/ void eraseTask(syscall_t* s) { erase_sync_params_t* p = s->params; p->error = call BlockWrite.erase[s->id](); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingBlock.erase[uint8_t volume_id]() { syscall_t s; erase_sync_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } call SystemCall.start(&eraseTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void BlockWrite.eraseDone[uint8_t volume_id](error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); erase_sync_params_t* p = s->params; p->error = error; call SystemCall.finish(s); } /**************************** Syncing ********************************/ void syncTask(syscall_t* s) { erase_sync_params_t* p = s->params; p->error = call BlockWrite.sync[s->id](); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingBlock.sync[uint8_t volume_id]() { syscall_t s; erase_sync_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } call SystemCall.start(&syncTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void BlockWrite.syncDone[uint8_t volume_id](error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); erase_sync_params_t* p = s->params; p->error = error; call SystemCall.finish(s); } default command error_t BlockRead.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t BlockRead.computeCrc[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; } default command storage_len_t BlockRead.getSize[uint8_t volume_id]() { return 0; } default command error_t BlockWrite.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t BlockWrite.erase[uint8_t volume_id]() { return FAIL; } default command error_t BlockWrite.sync[uint8_t volume_id]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingBlockStorageP.nc000066400000000000000000000043731207233610700255410ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ configuration BlockingBlockStorageP { provides { interface BlockingBlock[uint8_t id]; } uses { interface BlockRead[uint8_t id]; interface BlockWrite[uint8_t id]; } } implementation { components MainC, BlockingBlockStorageImplP; MainC.SoftwareInit -> BlockingBlockStorageImplP; BlockingBlock = BlockingBlockStorageImplP; BlockRead = BlockingBlockStorageImplP; BlockWrite = BlockingBlockStorageImplP; components SystemCallC; components SystemCallQueueC; BlockingBlockStorageImplP.SystemCall -> SystemCallC; BlockingBlockStorageImplP.SystemCallQueue -> SystemCallQueueC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingBootC.nc000066400000000000000000000037411207233610700240460ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ generic configuration BlockingBootC() { provides { interface Boot as BlockingBoot; } uses { interface Boot; } } implementation { components SystemCallC; components new BlockingBootP(); BlockingBoot = BlockingBootP; Boot = BlockingBootP; BlockingBootP.SystemCall -> SystemCallC; components LedsC; BlockingBootP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingBootP.nc000066400000000000000000000040141207233610700240550ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ generic module BlockingBootP() { provides { interface Boot as BlockingBoot; } uses { interface Boot; interface SystemCall; interface Leds; } } implementation { void bootTask(syscall_t* s) { signal BlockingBoot.booted(); call SystemCall.finish(s); } event void Boot.booted() { syscall_t s; call SystemCall.start(&bootTask, &s, INVALID_ID, NULL); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingConfigStorageC.nc000066400000000000000000000044361207233610700256770ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #define UQ_BLOCKING_CONFIG_STORAGE_VOLUME "Blocking.Config.Storage.Volume" generic configuration BlockingConfigStorageC(volume_id_t volume_id) { provides { interface BlockingConfig; interface BlockingMount; } } implementation { enum { VOLUME_ID = unique(UQ_BLOCKING_CONFIG_STORAGE_VOLUME), }; components new ConfigStorageC(volume_id), BlockingConfigStorageP; BlockingConfig = BlockingConfigStorageP.BlockingConfig[VOLUME_ID]; BlockingMount = BlockingConfigStorageP.BlockingMount[VOLUME_ID]; BlockingConfigStorageP.ConfigStorage[VOLUME_ID] -> ConfigStorageC; BlockingConfigStorageP.ConfigMount[VOLUME_ID] -> ConfigStorageC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingConfigStorageImplP.nc000066400000000000000000000165361207233610700265420ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ module BlockingConfigStorageImplP { provides { interface Init; interface BlockingConfig[uint8_t volume_id]; interface BlockingMount[uint8_t volume_id]; } uses { interface ConfigStorage[uint8_t volume_id]; interface Mount as ConfigMount[uint8_t volume_id]; interface SystemCall; interface SystemCallQueue; } } implementation { typedef struct read_write_params { storage_addr_t addr; void* buf; storage_len_t* len; error_t error; } read_write_params_t; typedef struct commit_mount_params { error_t error; } commit_mount_params_t; syscall_queue_t vol_queue; command error_t Init.init() { call SystemCallQueue.init(&vol_queue); return SUCCESS; } command storage_len_t BlockingConfig.getSize[uint8_t volume_id]() { return call ConfigStorage.getSize[volume_id](); } command bool BlockingConfig.valid[uint8_t volume_id]() { return call ConfigStorage.valid[volume_id](); } /**************************** Reading ********************************/ void readTask(syscall_t* s) { read_write_params_t* p = s->params; p->error = call ConfigStorage.read[s->id](p->addr, p->buf, *(p->len)); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingConfig.read[uint8_t volume_id](storage_addr_t addr, void *buf, storage_len_t* len) { syscall_t s; read_write_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) { return EBUSY; } call SystemCallQueue.enqueue(&vol_queue, &s); } p.addr = addr; p.buf = buf; p.len = len; call SystemCall.start(&readTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void ConfigStorage.readDone[uint8_t volume_id](storage_addr_t addr, void *buf, storage_len_t len, error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); read_write_params_t* p = s->params; p->error = error; *(p->len) = len; call SystemCall.finish(s); } /**************************** Writing ********************************/ void writeTask(syscall_t* s) { read_write_params_t* p = s->params; p->error = call ConfigStorage.write[s->id](p->addr, p->buf, *(p->len)); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingConfig.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t* len) { syscall_t s; read_write_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) { return EBUSY; } call SystemCallQueue.enqueue(&vol_queue, &s); } p.addr = addr; p.buf = buf; p.len = len; call SystemCall.start(&writeTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void ConfigStorage.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); read_write_params_t* p = s->params; *(p->len) = len; p->error = error; call SystemCall.finish(s); } /**************************** Committing ********************************/ void commitTask(syscall_t* s) { commit_mount_params_t* p = s->params; p->error = call ConfigStorage.commit[s->id](); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingConfig.commit[uint8_t volume_id]() { syscall_t s; commit_mount_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) { return EBUSY; } call SystemCallQueue.enqueue(&vol_queue, &s); } call SystemCall.start(&commitTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void ConfigStorage.commitDone[uint8_t volume_id](error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); commit_mount_params_t* p = s->params; p->error = error; call SystemCall.finish(s); } /**************************** Mounting ********************************/ void mountTask(syscall_t* s) { commit_mount_params_t* p = s->params; p->error = call ConfigMount.mount[s->id](); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingMount.mount[uint8_t volume_id]() { syscall_t s; commit_mount_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) { return EBUSY; } call SystemCallQueue.enqueue(&vol_queue, &s); } call SystemCall.start(&mountTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void ConfigMount.mountDone[uint8_t volume_id](error_t error) { syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id); commit_mount_params_t* p = s->params; p->error = error; call SystemCall.finish(s); } default command error_t ConfigStorage.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t ConfigStorage.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; } default command error_t ConfigStorage.commit[uint8_t volume_id]() { return FAIL; } default command storage_len_t ConfigStorage.getSize[uint8_t volume_id]() { return 0; } default command bool ConfigStorage.valid[uint8_t volume_id]() { return FALSE; } default command error_t ConfigMount.mount[uint8_t volume_id]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingConfigStorageP.nc000066400000000000000000000045621207233610700257140ustar00rootroot00000000000000/* * Copyright (c) 2009 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ configuration BlockingConfigStorageP { provides { interface BlockingConfig[uint8_t id]; interface BlockingMount[uint8_t id]; } uses { interface ConfigStorage[uint8_t id]; interface Mount as ConfigMount[uint8_t id]; } } implementation { components MainC, SystemCallC, SystemCallQueueC, BlockingConfigStorageImplP; MainC.SoftwareInit -> BlockingConfigStorageImplP; BlockingConfig = BlockingConfigStorageImplP; BlockingMount = BlockingConfigStorageImplP; ConfigStorage = BlockingConfigStorageImplP; ConfigMount = BlockingConfigStorageImplP; BlockingConfigStorageImplP.SystemCall -> SystemCallC; BlockingConfigStorageImplP.SystemCallQueue -> SystemCallQueueC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingLogStorageC.nc000066400000000000000000000042661207233610700252140ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "Storage.h" #define UQ_BLOCKING_LOG_STORAGE_VOLUME "Blocking.Log.Storage.Volume" generic configuration BlockingLogStorageC(volume_id_t volume_id, bool circular) { provides { interface BlockingLog; } } implementation { enum { VOLUME_ID = unique(UQ_BLOCKING_LOG_STORAGE_VOLUME), }; components new LogStorageC(volume_id, circular), BlockingLogStorageP; BlockingLog = BlockingLogStorageP.BlockingLog[VOLUME_ID]; BlockingLogStorageP.LogRead[VOLUME_ID] -> LogStorageC; BlockingLogStorageP.LogWrite[VOLUME_ID] -> LogStorageC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingLogStorageImplP.nc000066400000000000000000000206071207233610700260500ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ module BlockingLogStorageImplP { provides { interface Init; interface BlockingLog[uint8_t volume_id]; } uses { interface LogRead[uint8_t volume_id]; interface LogWrite[uint8_t volume_id]; interface SystemCall; interface SystemCallQueue; } } implementation { typedef struct read_params { void *buf; storage_len_t* len; error_t error; } read_params_t; typedef struct append_params { void *buf; storage_len_t* len; bool* recordsLost; error_t error; } append_params_t; typedef struct seek_params { storage_cookie_t offset; error_t error; } seek_params_t; typedef struct erase_sync_params { error_t error; } erase_sync_params_t; syscall_queue_t vol_queue; command error_t Init.init() { call SystemCallQueue.init(&vol_queue); return SUCCESS; } // ===== READ ===== // void readTask(syscall_t *s) { read_params_t *p = s->params; p->error = call LogRead.read[s->id](p->buf, *(p->len)); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingLog.read[uint8_t volume_id](void *buf, storage_len_t *len) { syscall_t s; read_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } p.buf = buf; p.len = len; call SystemCall.start(&readTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void LogRead.readDone[uint8_t volume_id](void *buf, storage_len_t len, error_t error) { syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id); read_params_t *p = s->params; if (p->buf == buf) { p->error = error; *(p->len) = len; call SystemCall.finish(s); } } // ===== SEEK ===== // void seekTask(syscall_t *s) { seek_params_t *p = s->params; p->error = call LogRead.seek[s->id](p->offset); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingLog.seek[uint8_t volume_id](storage_cookie_t offset) { syscall_t s; seek_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } p.offset = offset; call SystemCall.start(&seekTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void LogRead.seekDone[uint8_t volume_id](error_t error) { syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id); seek_params_t *p = s->params; p->error = error; call SystemCall.finish(s); } // ===== APPEND ===== // void appendTask(syscall_t *s) { append_params_t *p = s->params; p->error = call LogWrite.append[s->id](p->buf, *(p->len)); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingLog.append[uint8_t volume_id](void* buf, storage_len_t *len, bool *recordsLost) { syscall_t s; append_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } p.buf = buf; p.len = len; p.recordsLost = recordsLost; call SystemCall.start(&appendTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void LogWrite.appendDone[uint8_t volume_id](void* buf, storage_len_t len, bool recordsLost, error_t error) { syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id); append_params_t *p = s->params; if (p->buf == buf) { p->error = error; *(p->len) = len; *(p->recordsLost) = recordsLost; call SystemCall.finish(s); } } // ===== ERASE ===== // void eraseTask(syscall_t *s) { erase_sync_params_t *p = s->params; p->error = call LogWrite.erase[s->id](); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingLog.erase[uint8_t volume_id]() { syscall_t s; erase_sync_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } call SystemCall.start(&eraseTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void LogWrite.eraseDone[uint8_t volume_id](error_t error) { syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id); erase_sync_params_t *p = s->params; p->error = error; call SystemCall.finish(s); } // ===== SYNC ===== // void syncTask(syscall_t *s) { erase_sync_params_t *p = s->params; p->error = call LogWrite.sync[s->id](); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingLog.sync[uint8_t volume_id]() { syscall_t s; erase_sync_params_t p; atomic { if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&vol_queue, &s); } call SystemCall.start(&syncTask, &s, volume_id, &p); atomic { call SystemCallQueue.remove(&vol_queue, &s); return p.error; } } event void LogWrite.syncDone[uint8_t volume_id](error_t error) { syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id); erase_sync_params_t *p = s->params; p->error = error; call SystemCall.finish(s); } // ===== MISC ===== // command storage_cookie_t BlockingLog.currentWriteOffset[uint8_t volume_id]() { return call LogWrite.currentOffset[volume_id](); } command storage_cookie_t BlockingLog.currentReadOffset[uint8_t volume_id]() { return call LogRead.currentOffset[volume_id](); } command storage_len_t BlockingLog.getSize[uint8_t volume_id]() { return call LogRead.getSize[volume_id](); } default command error_t LogRead.read[uint8_t volume_id](void* buf, storage_len_t len) { return FAIL; } default command storage_cookie_t LogRead.currentOffset[uint8_t volume_id]() { return SEEK_BEGINNING; } default command error_t LogRead.seek[uint8_t volume_id](storage_cookie_t offset) { return FAIL; } default command storage_len_t LogRead.getSize[uint8_t volume_id]() { return 0; } default command error_t LogWrite.append[uint8_t volume_id](void* buf, storage_len_t len) { return FAIL; } default command storage_cookie_t LogWrite.currentOffset[uint8_t volume_id]() { return SEEK_BEGINNING; } default command error_t LogWrite.erase[uint8_t volume_id]() { return FAIL; } default command error_t LogWrite.sync[uint8_t volume_id]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingLogStorageP.nc000066400000000000000000000043371207233610700252300ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ configuration BlockingLogStorageP { provides { interface BlockingLog[uint8_t id]; } uses { interface LogRead[uint8_t id]; interface LogWrite[uint8_t id]; } } implementation { components MainC, BlockingLogStorageImplP; MainC.SoftwareInit -> BlockingLogStorageImplP; BlockingLog = BlockingLogStorageImplP; LogRead = BlockingLogStorageImplP; LogWrite = BlockingLogStorageImplP; components SystemCallC, SystemCallQueueC; BlockingLogStorageImplP.SystemCall -> SystemCallC; BlockingLogStorageImplP.SystemCallQueue -> SystemCallQueueC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingReadP.nc000066400000000000000000000061551207233610700240350ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ generic module BlockingReadP() { provides { interface Init; interface BlockingRead as BlockingRead[uint8_t client]; } uses { interface Read as Read[uint8_t client]; interface SystemCall; interface SystemCallQueue; } } implementation { typedef struct read_params { uint16_t* val; error_t error; } read_params_t; syscall_queue_t read_queue; command error_t Init.init() { call SystemCallQueue.init(&read_queue); return SUCCESS; } /**************************** Read ********************************/ void readTask(syscall_t* s) { read_params_t* p = s->params; p->error = call Read.read[s->id](); if(p->error != SUCCESS) { call SystemCall.finish(s); } } command error_t BlockingRead.read[uint8_t id](uint16_t* val) { syscall_t s; read_params_t p; atomic { if(call SystemCallQueue.find(&read_queue, id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&read_queue, &s); } p.val = val; call SystemCall.start(&readTask, &s, id, &p); atomic { call SystemCallQueue.remove(&read_queue, &s); return p.error; } } event void Read.readDone[uint8_t id]( error_t result, uint16_t val ) { syscall_t* s = call SystemCallQueue.find(&read_queue, id); read_params_t* p = s->params; *(p->val) = val; p->error = result; call SystemCall.finish(s); } default command error_t Read.read[uint8_t id]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingReadStreamP.nc000066400000000000000000000072321207233610700252060ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ generic module BlockingReadStreamP() { provides { interface Init; interface BlockingReadStream as BlockingReadStream[uint8_t streamClient]; } uses { interface ReadStream as ReadStream[uint8_t streamClient]; interface SystemCall; interface SystemCallQueue; } } implementation { typedef struct readstream_params { uint32_t* usPeriod; uint16_t* buf; uint16_t* count; error_t error; } readstream_params_t; syscall_queue_t readstream_queue; command error_t Init.init() { call SystemCallQueue.init(&readstream_queue); return SUCCESS; } /**************************** ReadStream ********************************/ void readStreamTask(syscall_t* s) { readstream_params_t* p = s->params; p->error = call ReadStream.postBuffer[s->id](p->buf, *(p->count)); if(p->error == SUCCESS) p->error = call ReadStream.read[s->id](*(p->usPeriod)); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingReadStream.read[uint8_t id](uint32_t* usPeriod, uint16_t* buf, uint16_t count) { syscall_t s; readstream_params_t p; atomic { if(call SystemCallQueue.find(&readstream_queue, id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&readstream_queue, &s); } p.usPeriod = usPeriod; p.buf = buf; p.count = &count; call SystemCall.start(&readStreamTask, &s, id, &p); atomic { call SystemCallQueue.remove(&readstream_queue, &s); return p.error; } } event void ReadStream.bufferDone[uint8_t id](error_t result, uint16_t* buf, uint16_t count) { //Should never get here!!!!!! } event void ReadStream.readDone[uint8_t id](error_t result, uint32_t usPeriod) { syscall_t* s = call SystemCallQueue.find(&readstream_queue, id); readstream_params_t* p = s->params; *(p->usPeriod) = usPeriod; p->error = result; call SystemCall.finish(s); } default command error_t ReadStream.read[uint8_t id](uint32_t usPeriod) { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingResourceC.nc000066400000000000000000000041701207233610700247270ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ generic configuration BlockingResourceC() { provides { interface BlockingResource; } uses { interface Resource; } } implementation { components new BlockingResourceP(); BlockingResource = BlockingResourceP; Resource = BlockingResourceP; components ThreadSleepC; BlockingResourceP.ThreadSleep -> ThreadSleepC; components SystemCallC; components TinyThreadSchedulerC; BlockingResourceP.SystemCall -> SystemCallC; BlockingResourceP.ThreadScheduler -> TinyThreadSchedulerC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingResourceP.nc000066400000000000000000000076411207233610700247520ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ generic module BlockingResourceP() { provides { interface BlockingResource; } uses { interface SystemCall; interface ThreadScheduler; interface Resource; interface ThreadSleep; } } implementation { typedef struct params { error_t error; } params_t; syscall_t* resource_call = NULL; /**************************** Request ********************************/ void requestTask(syscall_t* s) { params_t* p = s->params; p->error = call Resource.request(); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingResource.request() { syscall_t s; params_t p; atomic { if(resource_call != NULL) return EBUSY; resource_call = &s; } call SystemCall.start(requestTask, &s, INVALID_ID, &p); atomic { resource_call = NULL; return p.error; } } event void Resource.granted() { params_t* p = resource_call->params; p->error = SUCCESS; call SystemCall.finish(resource_call); } /**************************** Release ********************************/ void releaseTask(syscall_t* s) { params_t* p = s->params; p->error = call Resource.release(); call SystemCall.finish(s); } command error_t BlockingResource.release() { syscall_t s; params_t p; atomic { if(resource_call != NULL) return EBUSY; resource_call = &s; } call SystemCall.start(releaseTask, &s, INVALID_ID, &p); atomic { resource_call = NULL; return p.error; } } /************************* Timed Release *****************************/ command error_t BlockingResource.timedRelease(uint32_t milli) { syscall_t s; params_t p; atomic { if(resource_call != NULL) return EBUSY; resource_call = &s; } if(milli != 0) call ThreadSleep.sleep(milli); call SystemCall.start(releaseTask, &s, INVALID_ID, &p); if(p.error == SUCCESS) call SystemCall.start(requestTask, &s, INVALID_ID, &p); atomic { resource_call = NULL; return p.error; } } /************************* isOwner pass through *****************************/ command bool BlockingResource.isOwner() { return call Resource.isOwner(); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingSendC.nc000066400000000000000000000037471207233610700240420ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #define UQ_BLOCKING_SEND "Blocking.Send" generic configuration BlockingSendC() { provides { interface BlockingSend; } uses { interface Send; } } implementation { enum { CLIENT_ID = unique(UQ_BLOCKING_SEND), }; components BlockingSendP; BlockingSend = BlockingSendP.BlockingSend[CLIENT_ID]; Send = BlockingSendP.Send[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingSendImplP.nc000066400000000000000000000067171207233610700247010ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #include "message.h" module BlockingSendImplP { provides { interface Init; interface BlockingSend[uint8_t id]; } uses { interface Send[uint8_t id]; interface SystemCall; interface SystemCallQueue; } } implementation { typedef struct params { message_t* msg; uint8_t len; error_t error; } params_t; syscall_queue_t send_queue; command error_t Init.init() { call SystemCallQueue.init(&send_queue); return SUCCESS; } void sendTask(syscall_t* s) { params_t* p = s->params; p->error = call Send.send[s->id](p->msg, p->len); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingSend.send[uint8_t id](message_t* msg, uint8_t len) { syscall_t s; params_t p; atomic { if(call SystemCallQueue.find(&send_queue, id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&send_queue, &s); } p.msg = msg; p.len = len; call SystemCall.start(&sendTask, &s, id, &p); atomic { call SystemCallQueue.remove(&send_queue, &s); return p.error; } } event void Send.sendDone[uint8_t id](message_t* msg, error_t error) { syscall_t* s = call SystemCallQueue.find(&send_queue, id); params_t* p = s->params; p->error = error; call SystemCall.finish(s); } command uint8_t BlockingSend.maxPayloadLength[uint8_t id]() { return call Send.maxPayloadLength[id](); } command void* BlockingSend.getPayload[uint8_t id](message_t* msg, uint8_t len) { return call Send.getPayload[id](msg, len); } default command error_t Send.send[uint8_t id](message_t* msg, uint8_t len) { return FAIL; } default command uint8_t Send.maxPayloadLength[uint8_t id]() { return 0; } default command void* Send.getPayload[uint8_t id](message_t* msg, uint8_t len) { return NULL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingSendP.nc000066400000000000000000000041321207233610700240440ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ configuration BlockingSendP { provides { interface BlockingSend[uint8_t id]; } uses { interface Send[uint8_t id]; } } implementation { components MainC, SystemCallC, SystemCallQueueC, BlockingSendImplP; MainC.SoftwareInit -> BlockingSendImplP; BlockingSend = BlockingSendImplP; Send = BlockingSendImplP; BlockingSendImplP.SystemCallQueue -> SystemCallQueueC; BlockingSendImplP.SystemCall -> SystemCallC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingSerialAMReceiverC.nc000066400000000000000000000036741207233610700262720ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "AM.h" generic configuration BlockingSerialAMReceiverC(am_id_t amId) { provides { interface BlockingReceive; interface Packet; interface AMPacket; } } implementation { components BlockingSerialActiveMessageC as AM; BlockingReceive = AM.BlockingReceive[amId]; Packet = AM; AMPacket = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingSerialAMReceiverP.nc000066400000000000000000000051501207233610700262760ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "AM.h" #include "thread.h" configuration BlockingSerialAMReceiverP { provides { interface BlockingReceive[uint8_t id]; interface BlockingReceive as BlockingReceiveAny; } uses { interface Receive[uint8_t id]; } } implementation { components MainC; components SerialActiveMessageC as AM; components new BlockingAMReceiverImplP(); MainC.SoftwareInit -> BlockingAMReceiverImplP; BlockingReceive = BlockingAMReceiverImplP; BlockingReceiveAny = BlockingAMReceiverImplP; Receive = BlockingAMReceiverImplP; BlockingAMReceiverImplP.Packet -> AM; components SystemCallC; components SystemCallQueueC; components TinyThreadSchedulerC; BlockingAMReceiverImplP.SystemCallQueue -> SystemCallQueueC; BlockingAMReceiverImplP.SystemCall -> SystemCallC; BlockingAMReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC; components ThreadTimersC; BlockingAMReceiverImplP.Timer -> ThreadTimersC; components LedsC; BlockingAMReceiverImplP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingSerialAMSenderC.nc000066400000000000000000000037631207233610700257450ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "AM.h" generic configuration BlockingSerialAMSenderC(am_id_t AMId) { provides { interface BlockingAMSend; interface Packet; interface AMPacket; interface PacketAcknowledgements as Acks; } } implementation { components BlockingSerialActiveMessageC as AM; BlockingAMSend = AM.BlockingAMSend[AMId]; Packet = AM; AMPacket = AM; Acks = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingSerialAMSenderP.nc000066400000000000000000000044561207233610700257620ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "AM.h" #include "thread.h" #include "mutex.h" configuration BlockingSerialAMSenderP { provides { interface BlockingAMSend[am_id_t amId]; } uses { interface AMSend[am_id_t amId]; } } implementation { components MainC; components SerialActiveMessageC as AM; components new BlockingAMSenderImplP(); components MutexC; components SystemCallC; components LedsC; MainC.SoftwareInit -> BlockingAMSenderImplP; BlockingAMSend = BlockingAMSenderImplP; AMSend = BlockingAMSenderImplP; BlockingAMSenderImplP.Mutex -> MutexC; BlockingAMSenderImplP.SystemCall -> SystemCallC; BlockingAMSenderImplP.Packet -> AM; BlockingAMSenderImplP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingSerialActiveMessageC.nc000066400000000000000000000047371207233610700270310ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration BlockingSerialActiveMessageC { provides { interface BlockingStdControl; interface BlockingReceive[uint8_t id]; interface BlockingReceive as BlockingReceiveAny; interface BlockingAMSend[uint8_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; } } implementation { components SerialActiveMessageC as AM; components new BlockingStdControlC(); components BlockingSerialAMReceiverP as AMReceiverP; components BlockingSerialAMSenderP as AMSenderP; BlockingStdControl = BlockingStdControlC; BlockingReceive = AMReceiverP; BlockingReceiveAny = AMReceiverP; BlockingAMSend = AMSenderP; BlockingStdControlC.SplitControl -> AM; AMReceiverP.Receive -> AM.ReceiveDefault; AMSenderP.AMSend -> AM.AMSend; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingStdControlC.nc000066400000000000000000000040721207233610700252340ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #define UQ_BLOCKING_STD_CONTROL "Blocking.StdControl" generic configuration BlockingStdControlC() { provides { interface BlockingStdControl; } uses { interface SplitControl; } } implementation { enum { CLIENT_ID = unique(UQ_BLOCKING_STD_CONTROL), }; components BlockingStdControlP; BlockingStdControl = BlockingStdControlP.BlockingStdControl[CLIENT_ID]; SplitControl = BlockingStdControlP.SplitControl[CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingStdControlImplP.nc000066400000000000000000000077631207233610700261050ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ module BlockingStdControlImplP { provides { interface Init; interface BlockingStdControl[uint8_t id]; } uses { interface SplitControl[uint8_t id]; interface SystemCall; interface SystemCallQueue; interface Leds; } } implementation { typedef struct params { error_t error; } params_t; syscall_queue_t std_cntrl_queue; command error_t Init.init() { call SystemCallQueue.init(&std_cntrl_queue); return SUCCESS; } /**************************** Start ********************************/ void startTask(syscall_t* s) { params_t* p = s->params; p->error = call SplitControl.start[s->id](); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingStdControl.start[uint8_t id]() { syscall_t s; params_t p; atomic { if(call SystemCallQueue.find(&std_cntrl_queue, id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&std_cntrl_queue, &s); } call SystemCall.start(&startTask, &s, id, &p); atomic { call SystemCallQueue.remove(&std_cntrl_queue, &s); return p.error; } } event void SplitControl.startDone[uint8_t id](error_t error) { syscall_t* s = call SystemCallQueue.find(&std_cntrl_queue, id); params_t* p = s->params; p->error = error; call SystemCall.finish(s); } /**************************** Stop ********************************/ void stopTask(syscall_t* s) { params_t* p = s->params; p->error = call SplitControl.stop[s->id](); if(p->error != SUCCESS) call SystemCall.finish(s); } command error_t BlockingStdControl.stop[uint8_t id]() { syscall_t s; params_t p; atomic { if(call SystemCallQueue.find(&std_cntrl_queue, id) != NULL) return EBUSY; call SystemCallQueue.enqueue(&std_cntrl_queue, &s); } call SystemCall.start(&stopTask, &s, id, &p); atomic { call SystemCallQueue.remove(&std_cntrl_queue, &s); return p.error; } } event void SplitControl.stopDone[uint8_t id](error_t error) { syscall_t* s = call SystemCallQueue.find(&std_cntrl_queue, id); params_t* p = s->params; p->error = error; call SystemCall.finish(s); } default command error_t SplitControl.start[uint8_t id]() { return FAIL; } default command error_t SplitControl.stop[uint8_t id]() { return FAIL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/BlockingStdControlP.nc000066400000000000000000000043361207233610700252540ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration BlockingStdControlP { provides { interface BlockingStdControl[uint8_t id]; } uses { interface SplitControl[uint8_t id]; } } implementation { components MainC; components BlockingStdControlImplP; components LedsC; MainC.SoftwareInit -> BlockingStdControlImplP; BlockingStdControl = BlockingStdControlImplP; SplitControl = BlockingStdControlImplP; BlockingStdControlImplP.Leds -> LedsC; components SystemCallC; components SystemCallQueueC; BlockingStdControlImplP.SystemCallQueue -> SystemCallQueueC; BlockingStdControlImplP.SystemCall -> SystemCallC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ConditionVariableC.nc000066400000000000000000000047651207233610700250750ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the barrier implementation. Every barrier has a pointer to * a linked list of threads. When a thread calls block() on a barrier * it is pushed onto the thread queue associated with that barrier and * it is blocked. Once some thread calls unblock() on a particular * barrier, all threads on that barrier's thread queue are popped off * and woken up. * * @author Kevin Klues */ #include "thread.h" #include "condvar.h" configuration ConditionVariableC { provides { interface ConditionVariable; } } implementation { components TinyThreadSchedulerC; components ThreadQueueC; components MutexC; components ConditionVariableP; ConditionVariable = ConditionVariableP; ConditionVariableP.ThreadScheduler -> TinyThreadSchedulerC; ConditionVariableP.ThreadQueue -> ThreadQueueC; ConditionVariableP.Mutex -> MutexC; components LedsC; ConditionVariableP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ConditionVariableP.nc000066400000000000000000000070101207233610700250740ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This is the barrier implementation. Every barrier has a pointer to * a linked list of threads. When a thread calls block() on a barrier * it is pushed onto the thread queue associated with that barrier and * it is blocked. Once some thread calls unblock() on a particular * barrier, all threads on that barrier's thread queue are popped off * and woken up. * * @author Kevin Klues */ module ConditionVariableP { provides { interface ConditionVariable; } uses { interface ThreadScheduler; interface ThreadQueue; interface Mutex; interface Leds; } } implementation { command void ConditionVariable.init(condvar_t* c) { //Initialize the thread queue associated with this condition variable. call ThreadQueue.init(&(c->thread_queue)); } command void ConditionVariable.wait(condvar_t* c, mutex_t* m) { atomic { //Push the thread that just called wait() onto the thread queue associated with // this condition variable call ThreadQueue.enqueue(&(c->thread_queue), call ThreadScheduler.currentThreadInfo()); call Mutex.unlock(m); call ThreadScheduler.suspendCurrentThread(); call Mutex.lock(m); } } command void ConditionVariable.signalNext(condvar_t* c) { atomic { thread_t* t; //Pop all threads currently blocking on this barrier from its thread queue if((t = call ThreadQueue.dequeue(&(c->thread_queue))) != NULL) { call ThreadScheduler.wakeupThread(t->id); } } } command void ConditionVariable.signalAll(condvar_t* c) { atomic { thread_t* t; //Pop all threads currently blocking on this barrier from its thread queue while((t = call ThreadQueue.dequeue(&(c->thread_queue))) != NULL) { call ThreadScheduler.wakeupThread(t->id); } } } command bool ConditionVariable.isBlocking(condvar_t* c) { atomic return !(call ThreadQueue.isEmpty(&(c->thread_queue))); ; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/DynamicThreadC.nc000066400000000000000000000046271207233610700242120ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" configuration DynamicThreadC { provides { interface DynamicThread; interface ThreadNotification[uint8_t id]; } } implementation { components DynamicThreadP; components TinyThreadSchedulerC; components BitArrayUtilsC; components ThreadSleepC; components TosMallocC; DynamicThread = DynamicThreadP; ThreadNotification = DynamicThreadP.ThreadNotification; DynamicThreadP.ThreadSleep -> ThreadSleepC; DynamicThreadP.ThreadScheduler -> TinyThreadSchedulerC; DynamicThreadP.BitArrayUtils -> BitArrayUtilsC; DynamicThreadP.Malloc -> TosMallocC; components ThreadMapC; ThreadMapC.DynamicThreadInfo -> DynamicThreadP; DynamicThreadP.ThreadCleanup -> ThreadMapC.DynamicThreadCleanup; components LedsC; DynamicThreadP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/DynamicThreadP.nc000066400000000000000000000131411207233610700242160ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #include "thread.h" module DynamicThreadP { provides { interface DynamicThread; interface ThreadInfo[uint8_t]; interface ThreadNotification[uint8_t]; } uses { interface ThreadCleanup[uint8_t]; interface ThreadScheduler; interface ThreadSleep; interface BitArrayUtils; interface Malloc; interface Leds; } } implementation { thread_t* thread_info[TOSTHREAD_MAX_DYNAMIC_THREADS]; uint8_t* stack_heads[TOSTHREAD_MAX_DYNAMIC_THREADS]; uint8_t thread_map[((TOSTHREAD_MAX_DYNAMIC_THREADS - 1) / 8 + 1)]; thread_id_t last_id_given = -1; enum { THREAD_OVERFLOW = TOSTHREAD_MAX_DYNAMIC_THREADS, }; thread_id_t getNextId() { thread_id_t i; for(i=last_id_given+1; inext_thread = NULL; thread_info[*t]->id = *t + TOSTHREAD_NUM_STATIC_THREADS; thread_info[*t]->init_block = NULL; thread_info[*t]->stack_ptr = (stack_ptr_t)(STACK_TOP(stack_heads[*t], stack_size)); thread_info[*t]->state = TOSTHREAD_STATE_INACTIVE; thread_info[*t]->mutex_count = 0; thread_info[*t]->start_ptr = start_routine; thread_info[*t]->start_arg_ptr = arg; thread_info[*t]->syscall = NULL; memset(&(thread_info[*t]->regs), 0, sizeof(thread_regs_t)); *t += TOSTHREAD_NUM_STATIC_THREADS; return call ThreadScheduler.initThread(*t); } return FAIL; } command error_t DynamicThread.create(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size) { atomic { if(init(t, start_routine, arg, stack_size) == SUCCESS ) { error_t e = call ThreadScheduler.startThread(*t); if(e == SUCCESS) signal ThreadNotification.justCreated[*t](); return e; } } return FAIL; } command error_t DynamicThread.destroy(tosthread_t* t) { atomic { if(call ThreadScheduler.stopThread(*t) == SUCCESS) { signal ThreadCleanup.cleanup[*t](); return SUCCESS; } } return FAIL; } command error_t DynamicThread.pause(tosthread_t* t) { if(call BitArrayUtils.getBit(thread_map, *t-TOSTHREAD_NUM_STATIC_THREADS) == TRUE) { return call ThreadScheduler.stopThread(*t); } return FAIL; } command error_t DynamicThread.resume(tosthread_t* t) { if(call BitArrayUtils.getBit(thread_map, *t-TOSTHREAD_NUM_STATIC_THREADS) == TRUE) { return call ThreadScheduler.startThread(*t); } return FAIL; } command error_t DynamicThread.sleep(uint32_t milli) { return call ThreadSleep.sleep(milli); } command error_t DynamicThread.join(tosthread_t* t) { return call ThreadScheduler.joinThread(*t); } async command thread_t* ThreadInfo.get[uint8_t id]() { atomic return thread_info[id - TOSTHREAD_NUM_STATIC_THREADS]; } async command error_t ThreadInfo.reset[uint8_t id]() { return FAIL; } async event void ThreadCleanup.cleanup[uint8_t id]() { signal ThreadNotification.aboutToDestroy[id](); atomic { uint8_t adjusted_id = id-TOSTHREAD_NUM_STATIC_THREADS; call Malloc.free(thread_info[adjusted_id]); call BitArrayUtils.clrBit(thread_map, adjusted_id); } } default async event void ThreadNotification.justCreated[uint8_t id]() {} default async event void ThreadNotification.aboutToDestroy[uint8_t id]() {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/LinkedListC.nc000066400000000000000000000167011207233610700235340ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "linked_list.h" module LinkedListC { provides interface LinkedList; } implementation { list_element_t* get_elementAt(linked_list_t* l, uint8_t i) { if(i >= (l->size)) return NULL; else if((l->head) == NULL) return NULL; else { list_element_t* temp = (l->head); while(i-- > 0) { temp = temp->next; } return temp; } } list_element_t* get_element(linked_list_t* l, list_element_t* e) { list_element_t* temp = (l->head); while(temp != NULL) { if(temp == e) return temp; temp = temp->next; } return NULL; } list_element_t* get_element_before(linked_list_t* l, list_element_t* e) { list_element_t* temp = (l->head); if(temp == NULL) return NULL; while(temp->next != NULL) { if(temp->next == e) return temp;; temp = temp->next; } return NULL; } list_element_t* get_element_2before(linked_list_t* l, list_element_t* e) { list_element_t* temp = (l->head); if(temp == NULL) return NULL; if(temp->next == NULL) return NULL; while(temp->next->next != NULL) { if(temp->next->next == e) return temp; temp = temp->next->next; } return NULL; } error_t insert_element(linked_list_t* l, list_element_t** previous_next, list_element_t* e) { if(e == NULL) return FAIL; e->next = *previous_next; *previous_next = e; (l->size)++; return SUCCESS; } list_element_t* remove_element(linked_list_t* l, list_element_t** previous_next) { list_element_t* e = (*previous_next); *previous_next = (*previous_next)->next; e->next = NULL; (l->size)--; return e; } async command void LinkedList.init(linked_list_t* l) { l->head = NULL; l->size = 0; } async command void LinkedList.clear(linked_list_t* l) { list_element_t* temp = (l->head); while(temp != NULL) remove_element(l, &temp); l->head = NULL; l->size = 0; } async command uint8_t LinkedList.size(linked_list_t* l) { return (l->size); } async command error_t LinkedList.addFirst(linked_list_t* l, list_element_t* e) { return insert_element(l, &(l->head), e); } async command list_element_t* LinkedList.getFirst(linked_list_t* l) { if((l->head) == NULL) return NULL; return (l->head); } async command list_element_t* LinkedList.removeFirst(linked_list_t* l) { if((l->head) == NULL) return NULL; else return remove_element(l, &(l->head)); } async command error_t LinkedList.addLast(linked_list_t* l, list_element_t* e) { return call LinkedList.addAt(l, e, (l->size)); } async command list_element_t* LinkedList.getLast(linked_list_t* l) { return get_elementAt(l, (l->size)-1); } async command list_element_t* LinkedList.removeLast(linked_list_t* l) { return call LinkedList.removeAt(l, (l->size)-1); } async command error_t LinkedList.addAt(linked_list_t* l, list_element_t* e, uint8_t i) { if(i > (l->size)) return FAIL; else if(i == 0) return insert_element(l, &(l->head), e); else { list_element_t* temp = get_elementAt(l, i-1); return insert_element(l, &(temp->next), e); } } async command list_element_t* LinkedList.getAt(linked_list_t* l, uint8_t i) { list_element_t* temp = get_elementAt(l, i); if(temp == NULL) return NULL; return temp; } async command list_element_t* LinkedList.removeAt(linked_list_t* l, uint8_t i) { if(i == 0) return call LinkedList.removeFirst(l); else { list_element_t* temp = get_elementAt(l, i-1); if(temp == NULL) return NULL; else return remove_element(l, &(temp->next)); } } async command error_t LinkedList.addAfter(linked_list_t* l, list_element_t* first, list_element_t* second) { list_element_t* temp = get_element(l, first); if(temp == NULL) return FAIL; else return insert_element(l, &(temp->next), second); } async command error_t LinkedList.addBefore(linked_list_t* l, list_element_t* first, list_element_t* e) { list_element_t* temp; if((l->head) == NULL) return FAIL; if((l->head) == first) return insert_element(l, &(l->head), e); temp = get_element_before(l, first); if(temp == NULL) return FAIL; else return insert_element(l, &(temp->next), e); } async command list_element_t* LinkedList.getAfter(linked_list_t* l, list_element_t* e) { list_element_t* temp = get_element(l, e); if(temp == NULL) return NULL; if(temp->next == NULL) return NULL; return temp->next; } async command list_element_t* LinkedList.getBefore(linked_list_t* l, list_element_t* e) { list_element_t* temp = get_element_before(l, e); if(temp == NULL) return NULL; return temp; } async command list_element_t* LinkedList.remove(linked_list_t* l, list_element_t* e) { list_element_t* temp; if((l->head) == NULL) return NULL; if((l->head) == e) return remove_element(l, &(l->head)); temp = get_element_before(l, e); if(temp == NULL) return NULL; else return remove_element(l, &(temp->next)); } async command list_element_t* LinkedList.removeBefore(linked_list_t* l, list_element_t* e) { list_element_t* temp; if((l->head) == NULL) return NULL; if((l->head)->next == NULL) return NULL; if((l->head)->next == e) return remove_element(l, &(l->head)); temp = get_element_2before(l, e); if(temp == NULL) return NULL; else return remove_element(l, &(temp->next)); } async command list_element_t* LinkedList.removeAfter(linked_list_t* l, list_element_t* e) { list_element_t* temp = get_element(l, e); if(temp == NULL) return NULL; else return remove_element(l, &(temp->next)); } async command uint8_t LinkedList.indexOf(linked_list_t* l, list_element_t* e) { int i = -1; list_element_t* temp = (l->head); while(temp != NULL) { i++; if(temp == e) break; temp = temp->next; } return i; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/MainC.nc000066400000000000000000000064431207233610700223600ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. * * Date last modified: $Id: MainC.nc,v 1.4 2010-06-29 22:07:52 scipio Exp $ */ /** * MainC is the system interface the TinyOS boot sequence. It wires the * boot sequence implementation to the scheduler and hardware resources. * * @author Philip Levis * @author Kevin Klues */ #include "hardware.h" configuration MainC { provides interface Boot; uses { interface Init as SoftwareInit; } } implementation { components PlatformC; components TinyOSMainP; components RealMainP; components TinyTaskSchedulerC; components TinyThreadSchedulerC; components StaticThreadC; #ifdef SAFE_TINYOS components SafeFailureHandlerC; #endif // Export the SoftwareInit and Boot for applications SoftwareInit = TinyOSMainP.SoftwareInit; Boot = TinyOSMainP; //Wire up the platform specific code TinyOSMainP.PlatformInit -> PlatformC; TinyOSMainP.TaskScheduler -> TinyTaskSchedulerC; //Wire up the interdependent task and thread schedulers TinyTaskSchedulerC.ThreadScheduler -> TinyThreadSchedulerC; //Wire up the TinyOS code to its thread StaticThreadC.ThreadInfo[TOSTHREAD_TOS_THREAD_ID] -> TinyOSMainP; TinyOSMainP.TinyOSBoot -> TinyThreadSchedulerC; //Wire up the thread scheduler to start running TinyThreadSchedulerC.ThreadSchedulerBoot -> RealMainP; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/MutexC.nc000066400000000000000000000036601207233610700225740ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" #include "mutex.h" configuration MutexC { provides { interface Mutex; } } implementation { components ThreadQueueC; components TinyThreadSchedulerC; components MutexP; Mutex = MutexP; MutexP.ThreadQueue -> ThreadQueueC; MutexP.ThreadScheduler -> TinyThreadSchedulerC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/MutexP.nc000066400000000000000000000051451207233610700226110ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module MutexP { provides { interface Mutex; } uses { interface ThreadQueue; interface ThreadScheduler; } } implementation { command void Mutex.init(mutex_t* m) { m->lock = FALSE; call ThreadQueue.init(&(m->thread_queue)); } command error_t Mutex.lock(mutex_t* m) { atomic { thread_t* t = call ThreadScheduler.currentThreadInfo(); if(m->lock == FALSE) { m->lock = TRUE; t->mutex_count++; } else { call ThreadQueue.enqueue(&(m->thread_queue), t); call ThreadScheduler.suspendCurrentThread(); } return SUCCESS; } } command error_t Mutex.unlock(mutex_t* m) { atomic { if(m->lock == TRUE) { thread_t* t = call ThreadScheduler.currentThreadInfo(); t->mutex_count--; if((t = call ThreadQueue.dequeue(&(m->thread_queue))) != NULL) call ThreadScheduler.wakeupThread(t->id); else m->lock = FALSE; } return SUCCESS; } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/PlatformInterruptC.nc000066400000000000000000000037611207233610700251750ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration PlatformInterruptC { provides { interface PlatformInterrupt; } } implementation { components TinyThreadSchedulerC; components TinyTaskSchedulerC; components TOSThreadsInterruptP; PlatformInterrupt = TOSThreadsInterruptP; TOSThreadsInterruptP.ThreadScheduler -> TinyThreadSchedulerC; TOSThreadsInterruptP.TaskScheduler -> TinyTaskSchedulerC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/PoolThreadC.nc000066400000000000000000000046151207233610700235340ustar00rootroot00000000000000 /** * @author Jeongyeup Paek (jpaek@enl.usc.edu) */ #include "thread.h" #include "poolthread.h" configuration PoolThreadC { provides { interface PoolThread; interface ThreadNotification[uint8_t id]; } } implementation { components MainC, PoolThreadP, ThreadP; PoolThread = PoolThreadP; ThreadNotification = ThreadP.StaticThreadNotification; components BitArrayUtilsC; PoolThreadP.BitArrayUtils -> BitArrayUtilsC; components ThreadSleepC; PoolThreadP.ThreadSleep -> ThreadSleepC; components TinyThreadSchedulerC; PoolThreadP.ThreadScheduler -> TinyThreadSchedulerC; #if (NUM_POOL_THREADS > 0) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread0; PoolThreadP.TinyThread0 -> TinyThread0; PoolThreadP.ThreadInfo0 -> TinyThread0; #endif #if (NUM_POOL_THREADS > 1) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread1; PoolThreadP.TinyThread1 -> TinyThread1; PoolThreadP.ThreadInfo1 -> TinyThread1; #endif #if (NUM_POOL_THREADS > 2) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread2; PoolThreadP.TinyThread2 -> TinyThread2; PoolThreadP.ThreadInfo2 -> TinyThread2; #endif #if (NUM_POOL_THREADS > 3) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread3; PoolThreadP.TinyThread3 -> TinyThread3; PoolThreadP.ThreadInfo3 -> TinyThread3; #endif #if (NUM_POOL_THREADS > 4) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread4; PoolThreadP.TinyThread4 -> TinyThread4; PoolThreadP.ThreadInfo4 -> TinyThread4; #endif #if (NUM_POOL_THREADS > 5) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread5; PoolThreadP.TinyThread5 -> TinyThread5; PoolThreadP.ThreadInfo5 -> TinyThread5; #endif #if (NUM_POOL_THREADS > 6) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread6; PoolThreadP.TinyThread6 -> TinyThread6; PoolThreadP.ThreadInfo6 -> TinyThread6; #endif #if (NUM_POOL_THREADS > 7) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread7; PoolThreadP.TinyThread7 -> TinyThread7; PoolThreadP.ThreadInfo7 -> TinyThread7; #endif #if (NUM_POOL_THREADS > 8) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread8; PoolThreadP.TinyThread8 -> TinyThread8; PoolThreadP.ThreadInfo8 -> TinyThread8; #endif #if (NUM_POOL_THREADS > 9) components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread9; PoolThreadP.TinyThread9 -> TinyThread9; PoolThreadP.ThreadInfo9 -> TinyThread9; #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/PoolThreadP.nc000066400000000000000000000233401207233610700235450ustar00rootroot00000000000000 /** * @author Jeongyeup Paek (jpaek@enl.usc.edu) */ #include "thread.h" #include "poolthread.h" module PoolThreadP { provides { interface PoolThread; } uses { #if (NUM_POOL_THREADS > 0) interface Thread as TinyThread0; interface ThreadInfo as ThreadInfo0; #endif #if (NUM_POOL_THREADS > 1) interface Thread as TinyThread1; interface ThreadInfo as ThreadInfo1; #endif #if (NUM_POOL_THREADS > 2) interface Thread as TinyThread2; interface ThreadInfo as ThreadInfo2; #endif #if (NUM_POOL_THREADS > 3) interface Thread as TinyThread3; interface ThreadInfo as ThreadInfo3; #endif #if (NUM_POOL_THREADS > 4) interface Thread as TinyThread4; interface ThreadInfo as ThreadInfo4; #endif #if (NUM_POOL_THREADS > 5) interface Thread as TinyThread5; interface ThreadInfo as ThreadInfo5; #endif #if (NUM_POOL_THREADS > 6) interface Thread as TinyThread6; interface ThreadInfo as ThreadInfo6; #endif #if (NUM_POOL_THREADS > 7) interface Thread as TinyThread7; interface ThreadInfo as ThreadInfo7; #endif #if (NUM_POOL_THREADS > 8) interface Thread as TinyThread8; interface ThreadInfo as ThreadInfo8; #endif #if (NUM_POOL_THREADS > 9) interface Thread as TinyThread9; interface ThreadInfo as ThreadInfo9; #endif interface ThreadSleep; interface BitArrayUtils; interface ThreadScheduler; } } implementation { typedef struct pool_item { thread_t* info; } pool_item_t; pool_item_t m_list[NUM_POOL_THREADS]; uint8_t thread_map[((NUM_POOL_THREADS - 1) / 8 + 1)]; enum { THREAD_OVERFLOW = NUM_POOL_THREADS, }; error_t start_thread(uint8_t id, void* arg) { if (id >= NUM_POOL_THREADS) return FAIL; #if (NUM_POOL_THREADS > 0) if (id == 0) return call TinyThread0.start(arg); #endif #if (NUM_POOL_THREADS > 1) if (id == 1) return call TinyThread1.start(arg); #endif #if (NUM_POOL_THREADS > 2) if (id == 2) return call TinyThread2.start(arg); #endif #if (NUM_POOL_THREADS > 3) if (id == 3) return call TinyThread3.start(arg); #endif #if (NUM_POOL_THREADS > 4) if (id == 4) return call TinyThread4.start(arg); #endif #if (NUM_POOL_THREADS > 5) if (id == 5) return call TinyThread5.start(arg); #endif #if (NUM_POOL_THREADS > 6) if (id == 6) return call TinyThread6.start(arg); #endif #if (NUM_POOL_THREADS > 7) if (id == 7) return call TinyThread7.start(arg); #endif #if (NUM_POOL_THREADS > 8) if (id == 8) return call TinyThread8.start(arg); #endif #if (NUM_POOL_THREADS > 9) if (id == 9) return call TinyThread9.start(arg); #endif return FAIL; } error_t stop_thread(uint8_t id) { if (id >= NUM_POOL_THREADS) return FAIL; #if (NUM_POOL_THREADS > 0) if (id == 0) return call TinyThread0.stop(); #endif #if (NUM_POOL_THREADS > 1) if (id == 1) return call TinyThread1.stop(); #endif #if (NUM_POOL_THREADS > 2) if (id == 2) return call TinyThread2.stop(); #endif #if (NUM_POOL_THREADS > 3) if (id == 3) return call TinyThread3.stop(); #endif #if (NUM_POOL_THREADS > 4) if (id == 4) return call TinyThread4.stop(); #endif #if (NUM_POOL_THREADS > 5) if (id == 5) return call TinyThread5.stop(); #endif #if (NUM_POOL_THREADS > 6) if (id == 6) return call TinyThread6.stop(); #endif #if (NUM_POOL_THREADS > 7) if (id == 7) return call TinyThread7.stop(); #endif #if (NUM_POOL_THREADS > 8) if (id == 8) return call TinyThread8.stop(); #endif #if (NUM_POOL_THREADS > 9) if (id == 9) return call TinyThread9.stop(); #endif return FAIL; } error_t pause_thread(uint8_t id) { if (id >= NUM_POOL_THREADS) return FAIL; #if (NUM_POOL_THREADS > 0) if (id == 0) return call TinyThread0.pause(); #endif #if (NUM_POOL_THREADS > 1) if (id == 1) return call TinyThread1.pause(); #endif #if (NUM_POOL_THREADS > 2) if (id == 2) return call TinyThread2.pause(); #endif #if (NUM_POOL_THREADS > 3) if (id == 3) return call TinyThread3.pause(); #endif #if (NUM_POOL_THREADS > 4) if (id == 4) return call TinyThread4.pause(); #endif #if (NUM_POOL_THREADS > 5) if (id == 5) return call TinyThread5.pause(); #endif #if (NUM_POOL_THREADS > 6) if (id == 6) return call TinyThread6.pause(); #endif #if (NUM_POOL_THREADS > 7) if (id == 7) return call TinyThread7.pause(); #endif #if (NUM_POOL_THREADS > 8) if (id == 8) return call TinyThread8.pause(); #endif #if (NUM_POOL_THREADS > 9) if (id == 9) return call TinyThread9.pause(); #endif return FAIL; } error_t resume_thread(uint8_t id) { if (id >= NUM_POOL_THREADS) return FAIL; #if (NUM_POOL_THREADS > 0) if (id == 0) return call TinyThread0.resume(); #endif #if (NUM_POOL_THREADS > 1) if (id == 1) return call TinyThread1.resume(); #endif #if (NUM_POOL_THREADS > 2) if (id == 2) return call TinyThread2.resume(); #endif #if (NUM_POOL_THREADS > 3) if (id == 3) return call TinyThread3.resume(); #endif #if (NUM_POOL_THREADS > 4) if (id == 4) return call TinyThread4.resume(); #endif #if (NUM_POOL_THREADS > 5) if (id == 5) return call TinyThread5.resume(); #endif #if (NUM_POOL_THREADS > 6) if (id == 6) return call TinyThread6.resume(); #endif #if (NUM_POOL_THREADS > 7) if (id == 7) return call TinyThread7.resume(); #endif #if (NUM_POOL_THREADS > 8) if (id == 8) return call TinyThread8.resume(); #endif #if (NUM_POOL_THREADS > 9) if (id == 9) return call TinyThread9.resume(); #endif return FAIL; } thread_t *thread_info(uint8_t id) { if (id >= NUM_POOL_THREADS) return NULL; #if (NUM_POOL_THREADS > 0) if (id == 0) return call ThreadInfo0.get(); #endif #if (NUM_POOL_THREADS > 1) if (id == 1) return call ThreadInfo1.get(); #endif #if (NUM_POOL_THREADS > 2) if (id == 2) return call ThreadInfo2.get(); #endif #if (NUM_POOL_THREADS > 3) if (id == 3) return call ThreadInfo3.get(); #endif #if (NUM_POOL_THREADS > 4) if (id == 4) return call ThreadInfo4.get(); #endif #if (NUM_POOL_THREADS > 5) if (id == 5) return call ThreadInfo5.get(); #endif #if (NUM_POOL_THREADS > 6) if (id == 6) return call ThreadInfo6.get(); #endif #if (NUM_POOL_THREADS > 7) if (id == 7) return call ThreadInfo7.get(); #endif #if (NUM_POOL_THREADS > 8) if (id == 8) return call ThreadInfo8.get(); #endif #if (NUM_POOL_THREADS > 9) if (id == 9) return call ThreadInfo9.get(); #endif return NULL; } uint8_t getNextPoolId() { uint8_t i; for (i = 0; i < NUM_POOL_THREADS; i++) { if(call BitArrayUtils.getBit(thread_map, i) == 0) break; } if (i >= NUM_POOL_THREADS) return THREAD_OVERFLOW; return i; } command error_t PoolThread.allocate(uint8_t* id, void (*start_routine)(void*), void* arg) { thread_t *t; atomic { *id = getNextPoolId(); if (*id != THREAD_OVERFLOW) { call BitArrayUtils.setBit(thread_map, *id); t = thread_info(*id); m_list[*id].info = t; m_list[*id].info->start_ptr = start_routine; if (start_thread(*id, arg) == SUCCESS) { return SUCCESS; } else { call BitArrayUtils.clrBit(thread_map, *id); m_list[*id].info = NULL; } } } return FAIL; } command error_t PoolThread.release(uint8_t id) { atomic { call BitArrayUtils.clrBit(thread_map, id); m_list[id].info = NULL; if (stop_thread(id) == SUCCESS) return SUCCESS; } return FAIL; } command error_t PoolThread.pause(uint8_t id) { if (call BitArrayUtils.getBit(thread_map, id) == 1) { return pause_thread(id); } return FAIL; } command error_t PoolThread.resume(uint8_t id) { if (call BitArrayUtils.getBit(thread_map, id) == 1) { return resume_thread(id); } return FAIL; } uint8_t findPoolIdFromThreadId(uint8_t id) { int i; for (i = 0; i < NUM_POOL_THREADS; i++) { if (call BitArrayUtils.getBit(thread_map, i) == 1) if (m_list[i].info->id == id) return i; } return THREAD_OVERFLOW; } command error_t PoolThread.sleep(uint32_t milli) { call ThreadSleep.sleep(milli); } #if (NUM_POOL_THREADS > 0) event void TinyThread0.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 1) event void TinyThread1.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 2) event void TinyThread2.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 3) event void TinyThread3.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 4) event void TinyThread4.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 5) event void TinyThread5.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 6) event void TinyThread6.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 7) event void TinyThread7.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 8) event void TinyThread8.run(void *arg) {} #endif #if (NUM_POOL_THREADS > 9) event void TinyThread9.run(void *arg) {} #endif } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/RealMainImplP.nc000066400000000000000000000053471207233610700240250ustar00rootroot00000000000000// $Id: RealMainImplP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: RealMainImplP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * RealMain implements the TinyOS boot sequence, as documented in TEP 107. * * @author Philip Levis * @author Kevin Klues */ module RealMainImplP { provides interface Boot as ThreadSchedulerBoot; } implementation { int main() @C() @spontaneous() { atomic { // Start running the TinyOS thread scheduler signal ThreadSchedulerBoot.booted(); } /* We should never reach this point, but some versions of * gcc don't realize that and issue a warning if we return * void from a non-void function. So include this. */ return -1; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/RealMainP.nc000066400000000000000000000051431207233610700231750ustar00rootroot00000000000000// $Id: RealMainP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: RealMainP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ * */ /** * RealMain implements the TinyOS boot sequence, as documented in TEP 107. * * @author Philip Levis * @author Kevin Klues */ configuration RealMainP { provides interface Boot; uses interface Init as PlatformInit; uses interface Init as SoftwareInit; } implementation { components TinyOSMainP; components RealMainImplP; Boot = RealMainImplP; SoftwareInit = TinyOSMainP.SoftwareInit; PlatformInit = TinyOSMainP.PlatformInit; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ReferenceCounterC.nc000066400000000000000000000040751207233610700247310ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" #include "refcounter.h" configuration ReferenceCounterC { provides { interface ReferenceCounter; } } implementation { components TinyThreadSchedulerC; components ThreadQueueC; components ReferenceCounterP; ReferenceCounter = ReferenceCounterP; ReferenceCounterP.ThreadScheduler -> TinyThreadSchedulerC; ReferenceCounterP.ThreadQueue -> ThreadQueueC; components LedsC; ReferenceCounterP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ReferenceCounterP.nc000066400000000000000000000055451207233610700247510ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module ReferenceCounterP { provides { interface ReferenceCounter; } uses { interface ThreadScheduler; interface ThreadQueue; interface Leds; } } implementation { void signalWaiters(refcounter_t* r) { thread_t* t; while((t = call ThreadQueue.dequeue(&(r->thread_queue))) != NULL) call ThreadScheduler.wakeupThread(t->id); } async command void ReferenceCounter.init(refcounter_t* r) { atomic { r->count = 0; call ThreadQueue.init(&(r->thread_queue)); } } async command void ReferenceCounter.increment(refcounter_t* r) { atomic { if( r->count != 255 ) { r->count++; signalWaiters(r); } } } async command void ReferenceCounter.decrement(refcounter_t* r) { atomic { if( r->count > 0 ) { r->count--; signalWaiters(r); } } } async command void ReferenceCounter.waitOnValue(refcounter_t* r, uint8_t val) { atomic { while(r->count != val) { call ThreadQueue.enqueue(&(r->thread_queue), call ThreadScheduler.currentThreadInfo()); call ThreadScheduler.suspendCurrentThread(); } } } async command uint8_t ReferenceCounter.count(refcounter_t* r) { atomic return r->count; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/SchedulerBasicP.nc000066400000000000000000000111711207233610700243630ustar00rootroot00000000000000// $Id: SchedulerBasicP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * SchedulerBasicP implements the default TinyOS scheduler sequence, as * documented in TEP 106. * * @author Philip Levis * @author Cory Sharp * @author Kevin Klues * @date January 19 2005 */ #include "hardware.h" #include "thread.h" module SchedulerBasicP { provides interface TaskScheduler; provides interface TaskBasic[uint8_t id]; uses interface ThreadScheduler; uses interface Leds; } implementation { enum { NUM_TASKS = uniqueCount("TinyTaskSchedulerC.TaskBasic"), NO_TASK = 255, }; volatile uint8_t m_head; volatile uint8_t m_tail; volatile uint8_t m_next[NUM_TASKS]; // Helper functions (internal functions) intentionally do not have atomic // sections. It is left as the duty of the exported interface functions to // manage atomicity to minimize chances for binary code bloat. // move the head forward // if the head is at the end, mark the tail at the end, too // mark the task as not in the queue inline uint8_t popTask() { if( m_head != NO_TASK ) { uint8_t id = m_head; m_head = m_next[m_head]; if( m_head == NO_TASK ) { m_tail = NO_TASK; } m_next[id] = NO_TASK; return id; } else { return NO_TASK; } } bool isWaiting( uint8_t id ) { return (m_next[id] != NO_TASK) || (m_tail == id); } async command bool TaskScheduler.hasTasks() { atomic return (m_head != NO_TASK); } bool pushTask( uint8_t id ) { if( !isWaiting(id) ) { if( m_head == NO_TASK ) { m_head = id; m_tail = id; } else { m_next[m_tail] = id; m_tail = id; } return TRUE; } else { return FALSE; } } command void TaskScheduler.init() { atomic { memset( (void *)m_next, NO_TASK, sizeof(m_next) ); m_head = NO_TASK; m_tail = NO_TASK; } } command bool TaskScheduler.runNextTask() { uint8_t nextTask; atomic { nextTask = popTask(); if( nextTask == NO_TASK ) { return FALSE; } } signal TaskBasic.runTask[nextTask](); return TRUE; } command void TaskScheduler.taskLoop() { for (;;) { uint8_t nextTask; atomic { while((nextTask = popTask()) == NO_TASK) { call ThreadScheduler.suspendCurrentThread(); } } signal TaskBasic.runTask[nextTask](); } } /** * Return SUCCESS if the post succeeded, EBUSY if it was already posted. */ async command error_t TaskBasic.postTask[uint8_t id]() { atomic { return pushTask(id) ? SUCCESS : EBUSY; } } default event void TaskBasic.runTask[uint8_t id]() {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/SemaphoreC.nc000066400000000000000000000041761207233610700234200ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @author Chieh-Jan Mike Liang */ #include "thread.h" #include "semaphore.h" configuration SemaphoreC { provides { interface Semaphore; } } implementation { components TinyThreadSchedulerC; components MutexC; components ConditionVariableC; components SemaphoreP; Semaphore = SemaphoreP; SemaphoreP.ThreadScheduler -> TinyThreadSchedulerC; SemaphoreP.Mutex -> MutexC; SemaphoreP.ConditionVariable -> ConditionVariableC; components LedsC; SemaphoreP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/SemaphoreP.nc000066400000000000000000000051541207233610700234320ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues * @author Chieh-Jan Mike Liang */ module SemaphoreP { provides { interface Semaphore; } uses { interface ThreadScheduler; interface Mutex; interface ConditionVariable; interface Leds; } } implementation { command void Semaphore.reset(semaphore_t* s, uint8_t v) { s->s = 0; s->v = v; call Mutex.init(&(s->lock)); call ConditionVariable.init(&(s->condvar)); } command error_t Semaphore.acquire(semaphore_t* s) { atomic { call Mutex.lock(&(s->lock)); s->s++; while (s->v == 0) { call ConditionVariable.wait(&(s->condvar), &(s->lock)); s->v++; } s->s--; s->v--; call Mutex.unlock(&(s->lock)); } return SUCCESS; } command error_t Semaphore.release(semaphore_t* s) { atomic { call Mutex.lock(&(s->lock)); if(s->s > 0) call ConditionVariable.signalNext(&(s->condvar)); else s->v++; call Mutex.unlock(&(s->lock)); } return SUCCESS; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/StaticThreadC.nc000066400000000000000000000045301207233610700240460ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration StaticThreadC { provides { interface Thread[uint8_t id]; interface ThreadNotification[uint8_t id]; } uses { interface ThreadInfo[uint8_t id]; interface ThreadFunction[uint8_t id]; interface ThreadCleanup[uint8_t id]; } } implementation { components StaticThreadP; components ThreadMapC; Thread = StaticThreadP; ThreadNotification = StaticThreadP; ThreadCleanup = StaticThreadP; StaticThreadP.ThreadInfo = ThreadInfo; ThreadMapC.StaticThreadInfo = ThreadInfo; StaticThreadP.ThreadFunction = ThreadFunction; components ThreadSleepC; components TinyThreadSchedulerC; StaticThreadP.ThreadSleep -> ThreadSleepC; StaticThreadP.ThreadScheduler -> TinyThreadSchedulerC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/StaticThreadP.nc000066400000000000000000000073641207233610700240730ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module StaticThreadP { provides { interface Thread[uint8_t id]; interface ThreadNotification[uint8_t id]; } uses { interface ThreadScheduler; interface ThreadSleep; interface ThreadInfo[uint8_t id]; interface ThreadFunction[uint8_t id]; interface ThreadCleanup[uint8_t id]; interface Leds; } } implementation { error_t init(uint8_t id, void* arg) { error_t r1, r2; thread_t* thread_info = call ThreadInfo.get[id](); thread_info->start_arg_ptr = arg; thread_info->mutex_count = 0; thread_info->next_thread = NULL; r1 = call ThreadInfo.reset[id](); r2 = call ThreadScheduler.initThread(id); return ecombine(r1, r2); } command error_t Thread.start[uint8_t id](void* arg) { atomic { if( init(id, arg) == SUCCESS ) { error_t e = call ThreadScheduler.startThread(id); if(e == SUCCESS) signal ThreadNotification.justCreated[id](); return e; } } return FAIL; } command error_t Thread.pause[uint8_t id]() { return call ThreadScheduler.suspendCurrentThread(); } command error_t Thread.resume[uint8_t id]() { return call ThreadScheduler.wakeupThread(id); } command error_t Thread.stop[uint8_t id]() { if(call ThreadScheduler.stopThread(id) == SUCCESS) return init(id, NULL); return FAIL; } command error_t Thread.sleep[uint8_t id](uint32_t milli) { return call ThreadSleep.sleep(milli); } command error_t Thread.join[uint8_t id]() { return call ThreadScheduler.joinThread(id); } event void ThreadFunction.signalThreadRun[uint8_t id](void *arg) { signal Thread.run[id](arg); } async event void ThreadCleanup.cleanup[uint8_t id]() { signal ThreadNotification.aboutToDestroy[id](); } default event void Thread.run[uint8_t id](void* arg) {} default async command thread_t* ThreadInfo.get[uint8_t id]() {return NULL;} default async command error_t ThreadInfo.reset[uint8_t id]() {return FAIL;} default async event void ThreadNotification.justCreated[uint8_t id]() {} default async event void ThreadNotification.aboutToDestroy[uint8_t id]() {} } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/SystemCallC.nc000066400000000000000000000035731207233610700235550ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" configuration SystemCallC { provides { interface SystemCall; } } implementation { components SystemCallP; components TinyThreadSchedulerC; SystemCall = SystemCallP; SystemCallP.ThreadScheduler -> TinyThreadSchedulerC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/SystemCallP.nc000066400000000000000000000062631207233610700235710ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module SystemCallP { provides { interface SystemCall; } uses { interface ThreadScheduler; } } implementation { syscall_t* current_call = NULL; task void threadTask() { (*(current_call->syscall_ptr))(current_call); } //Had originally planned on using a thread queue here to // hold and keep track of multiple system call requests //Observation though is that only one outstanding system // call can exist in the system at any given time //Some thread calls this function, and the task gets posted, // the TOS kernel thread gets woken up, and the task is run // immediately before any other threads get the chance to // make any system calls. //If semantics change in the future, a thread queue could // be used here with a single TinyOS task servicing all them // by popping threads off the queue and reposting itself command error_t SystemCall.start(void* syscall_ptr, syscall_t* s, syscall_id_t id, void* p) { atomic { current_call = s; current_call->id = id; current_call->thread = call ThreadScheduler.currentThreadInfo(); current_call->thread->syscall = s; current_call->params = p; if(syscall_ptr != SYSCALL_WAIT_ON_EVENT) { current_call->syscall_ptr = syscall_ptr; post threadTask(); call ThreadScheduler.wakeupThread(TOSTHREAD_TOS_THREAD_ID); } return call ThreadScheduler.suspendCurrentThread(); } } command error_t SystemCall.finish( syscall_t* s ) { return call ThreadScheduler.wakeupThread(s->thread->id); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/SystemCallQueueC.nc000066400000000000000000000037571207233610700245660ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" #include "linked_list.h" #include "syscall_queue.h" configuration SystemCallQueueC { provides { interface SystemCallQueue; } } implementation { components LinkedListC; components SystemCallQueueP; SystemCallQueue = SystemCallQueueP; SystemCallQueueP.LinkedList -> LinkedListC; components LedsC; SystemCallQueueP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/SystemCallQueueP.nc000066400000000000000000000054121207233610700245710ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module SystemCallQueueP { provides { interface SystemCallQueue; } uses { interface LinkedList; interface Leds; } } implementation { async command void SystemCallQueue.init(syscall_queue_t* q) { call LinkedList.init(&(q->l)); } async command void SystemCallQueue.enqueue(syscall_queue_t* q, syscall_t* s) { s->next_call = NULL; call LinkedList.addLast(&(q->l), (list_element_t*)s); } async command syscall_t* SystemCallQueue.dequeue(syscall_queue_t* q) { return (syscall_t*)call LinkedList.removeFirst(&(q->l)); } async command syscall_t* SystemCallQueue.remove(syscall_queue_t* q, syscall_t* s) { return (syscall_t*)call LinkedList.remove(&(q->l), (list_element_t*)s); } async command syscall_t* SystemCallQueue.find(syscall_queue_t* q, uint8_t id) { syscall_t* s; for(s = (syscall_t*)(call LinkedList.getFirst(&(q->l))); s != NULL; s = (syscall_t*)(call LinkedList.getAfter(&(q->l), (list_element_t*)s)) ) { if(s->id == id) return s; } return NULL; } async command bool SystemCallQueue.isEmpty(syscall_queue_t* q) { return (call LinkedList.size(&(q->l)) == 0); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/TOSThreadsInterruptP.nc000066400000000000000000000043211207233610700253770ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module TOSThreadsInterruptP { provides { interface PlatformInterrupt; } uses { interface TaskScheduler; interface ThreadScheduler; } } implementation { void interruptThread() __attribute__((noinline)) { if(call ThreadScheduler.wakeupThread(TOSTHREAD_TOS_THREAD_ID) == SUCCESS) if(call ThreadScheduler.currentThreadId() != TOSTHREAD_TOS_THREAD_ID) call ThreadScheduler.interruptCurrentThread(); } inline async command void PlatformInterrupt.postAmble() { atomic { if(call TaskScheduler.hasTasks() == TRUE ) interruptThread(); } } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadC.nc000066400000000000000000000046411207233610700227010ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" generic configuration ThreadC(uint16_t stack_size) { provides { interface Thread; interface ThreadNotification; interface ThreadInfo; } } implementation { enum { THREAD_ID = unique(UQ_TOS_THREAD), }; components MainC; components new ThreadInfoP(stack_size, THREAD_ID); components StaticThreadC; components ThreadMapC; MainC.SoftwareInit -> ThreadInfoP; Thread = StaticThreadC.Thread[THREAD_ID]; ThreadNotification = StaticThreadC.ThreadNotification[THREAD_ID]; ThreadInfo = ThreadInfoP; StaticThreadC.ThreadFunction[THREAD_ID] -> ThreadInfoP; StaticThreadC.ThreadCleanup[THREAD_ID] -> ThreadMapC.StaticThreadCleanup[THREAD_ID]; StaticThreadC.ThreadInfo[THREAD_ID] -> ThreadInfoP; components LedsC; ThreadInfoP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadInfoMapP.nc000066400000000000000000000047441207233610700241740ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module ThreadInfoMapP { provides { interface ThreadInfo[uint8_t id]; interface ThreadCleanup as StaticThreadCleanup[uint8_t id]; interface ThreadCleanup as DynamicThreadCleanup[uint8_t id]; } uses { interface ThreadInfo as StaticThreadInfo[uint8_t id]; interface ThreadInfo as DynamicThreadInfo[uint8_t id]; interface ThreadCleanup[uint8_t id]; interface Leds; } } implementation { async command thread_t* ThreadInfo.get[uint8_t id]() { return call StaticThreadInfo.get[id](); } default async command thread_t* StaticThreadInfo.get[uint8_t id]() { return call DynamicThreadInfo.get[id](); } async event void ThreadCleanup.cleanup[uint8_t id]() { signal StaticThreadCleanup.cleanup[id](); } default async event void StaticThreadCleanup.cleanup[uint8_t id]() { signal DynamicThreadCleanup.cleanup[id](); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadInfoP.nc000066400000000000000000000051431207233610700235300ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ generic module ThreadInfoP(uint16_t stack_size, uint8_t thread_id) { provides { interface Init; interface ThreadInfo; interface ThreadFunction; } uses { interface Leds; } } implementation { uint8_t stack[stack_size]; thread_t thread_info; void run_thread(void* arg) __attribute__((noinline)) { signal ThreadFunction.signalThreadRun(arg); } error_t init() { thread_info.next_thread = NULL; thread_info.id = thread_id; thread_info.init_block = NULL; thread_info.stack_ptr = (stack_ptr_t)(STACK_TOP(stack, sizeof(stack))); thread_info.state = TOSTHREAD_STATE_INACTIVE; thread_info.mutex_count = 0; thread_info.start_ptr = run_thread; thread_info.start_arg_ptr = NULL; thread_info.syscall = NULL; return SUCCESS; } command error_t Init.init() { return init(); } async command error_t ThreadInfo.reset() { return init(); } async command thread_t* ThreadInfo.get() { return &thread_info; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadMapC.nc000066400000000000000000000044711207233610700233400ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration ThreadMapC { provides { interface ThreadCleanup as StaticThreadCleanup[uint8_t id]; interface ThreadCleanup as DynamicThreadCleanup[uint8_t id]; } uses { interface ThreadInfo as StaticThreadInfo[uint8_t id]; interface ThreadInfo as DynamicThreadInfo[uint8_t id]; } } implementation { components TinyThreadSchedulerC; components ThreadMapP; TinyThreadSchedulerC.ThreadInfo -> ThreadMapP; ThreadMapP.StaticThreadInfo = StaticThreadInfo; ThreadMapP.DynamicThreadInfo = DynamicThreadInfo; ThreadMapP.ThreadCleanup -> TinyThreadSchedulerC; DynamicThreadCleanup = ThreadMapP.DynamicThreadCleanup; StaticThreadCleanup = ThreadMapP.StaticThreadCleanup; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadMapP.nc000066400000000000000000000060611207233610700233520ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module ThreadMapP { provides { interface ThreadInfo[uint8_t id]; interface ThreadCleanup as StaticThreadCleanup[uint8_t id]; interface ThreadCleanup as DynamicThreadCleanup[uint8_t id]; } uses { interface ThreadInfo as StaticThreadInfo[uint8_t id]; interface ThreadInfo as DynamicThreadInfo[uint8_t id]; interface ThreadCleanup[uint8_t id]; interface Leds; } } implementation { async command thread_t* ThreadInfo.get[uint8_t id]() { return call StaticThreadInfo.get[id](); } async command error_t ThreadInfo.reset[uint8_t id]() { return call StaticThreadInfo.reset[id](); } default async command thread_t* StaticThreadInfo.get[uint8_t id]() { return call DynamicThreadInfo.get[id](); } default async command error_t StaticThreadInfo.reset[uint8_t id]() { return call DynamicThreadInfo.reset[id](); } default async command thread_t* DynamicThreadInfo.get[uint8_t id]() { return call StaticThreadInfo.get[id](); } default async command error_t DynamicThreadInfo.reset[uint8_t id]() { return call StaticThreadInfo.reset[id](); } async event void ThreadCleanup.cleanup[uint8_t id]() { signal StaticThreadCleanup.cleanup[id](); } default async event void StaticThreadCleanup.cleanup[uint8_t id]() { signal DynamicThreadCleanup.cleanup[id](); } default async event void DynamicThreadCleanup.cleanup[uint8_t id]() { signal StaticThreadCleanup.cleanup[id](); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadQueueC.nc000066400000000000000000000036351207233610700237100ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" #include "linked_list.h" #include "thread_queue.h" configuration ThreadQueueC { provides { interface ThreadQueue; } } implementation { components LinkedListC; components ThreadQueueP; ThreadQueue = ThreadQueueP; ThreadQueueP.LinkedList -> LinkedListC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadQueueP.nc000066400000000000000000000045631207233610700237260ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module ThreadQueueP { provides { interface ThreadQueue; } uses { interface LinkedList; } } implementation { async command void ThreadQueue.init(thread_queue_t* q) { call LinkedList.init(&(q->l)); } async command void ThreadQueue.enqueue(thread_queue_t* q, thread_t* t) { call LinkedList.addFirst(&(q->l), (list_element_t*)t); } async command thread_t* ThreadQueue.dequeue(thread_queue_t* q) { return (thread_t*)call LinkedList.removeLast(&(q->l)); } async command thread_t* ThreadQueue.remove(thread_queue_t* q, thread_t* t) { return (thread_t*)call LinkedList.remove(&(q->l), (list_element_t*)t); } async command bool ThreadQueue.isEmpty(thread_queue_t* q) { return (call LinkedList.size(&(q->l)) == 0); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadSleepC.nc000066400000000000000000000040551207233610700236710ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ configuration ThreadSleepC { provides { interface ThreadSleep; } } implementation { components ThreadTimersC; components ThreadSleepP; components SystemCallC; components TinyThreadSchedulerC; ThreadSleep = ThreadSleepP; ThreadSleepP.TimerMilli -> ThreadTimersC; ThreadSleepP.SystemCall -> SystemCallC; ThreadSleepP.ThreadScheduler -> TinyThreadSchedulerC; components LedsC; ThreadSleepP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadSleepP.nc000066400000000000000000000057351207233610700237140ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module ThreadSleepP { provides { interface ThreadSleep; } uses { interface SystemCall; interface ThreadScheduler; interface Timer as TimerMilli[uint8_t id]; interface Leds; } } implementation { typedef struct sleep_params { uint32_t* milli; } sleep_params_t; void sleepTask(syscall_t* s) { sleep_params_t* p = s->params; call TimerMilli.startOneShot[s->thread->id]( *(p->milli) ); } command error_t ThreadSleep.sleep(uint32_t milli) { syscall_t s; sleep_params_t p; p.milli = &milli; call SystemCall.start(&sleepTask, &s, INVALID_ID, &p); return SUCCESS; } //Need to add a cancel command so that components like //BlockingAMReceiverImplP can use the ThreadSleep interface //directly instead of reusing the underlying ThreadTimerC //component. The current implementation does things this way //and causes us to be defensive in here since the same //TimerMilli.fired() event is sent to that component as well. //Basically its just broken.... cancel() would get rid of this. //Also need some sort of a sleepWithSyscall command //Need to think about this one a little more event void TimerMilli.fired[uint8_t id]() { thread_t* t = call ThreadScheduler.threadInfo(id); if(t->syscall->syscall_ptr == sleepTask) call SystemCall.finish(t->syscall); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadSynchronizationC.nc000066400000000000000000000041461207233610700260230ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ configuration ThreadSynchronizationC { provides { interface Barrier; interface Mutex; interface Semaphore; interface ConditionVariable; interface ReferenceCounter; } } implementation { components BarrierC; components MutexC; components SemaphoreC; components ConditionVariableC; components ReferenceCounterC; Barrier = BarrierC; Mutex = MutexC; Semaphore = SemaphoreC; ConditionVariable = ConditionVariableC; ReferenceCounter = ReferenceCounterC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/ThreadTimersC.nc000066400000000000000000000037041207233610700240640ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" configuration ThreadTimersC { provides { interface Timer as TimerMilli[uint8_t id]; } } implementation { components new TimerMilliC(); components new VirtualizeTimerC(TMilli, TOSTHREAD_MAX_NUM_THREADS); VirtualizeTimerC.TimerFrom -> TimerMilliC; TimerMilli = VirtualizeTimerC.Timer; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/TinyOSMainP.nc000066400000000000000000000102161207233610700234740ustar00rootroot00000000000000// $Id: TinyOSMainP.nc,v 1.4 2010-06-29 22:07:52 scipio Exp $ /* tab:4 * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: TinyOSMainP.nc,v 1.4 2010-06-29 22:07:52 scipio Exp $ * */ /** * RealMain implements the TinyOS boot sequence, as documented in TEP 107. * * @author Philip Levis * @author Kevin Klues */ #ifdef DYNTHREADS #define AT_SPONTANEOUS @spontaneous() #else #define AT_SPONTANEOUS #endif module TinyOSMainP { provides { interface Boot; interface ThreadInfo; } uses { interface Boot as TinyOSBoot; interface TaskScheduler; interface Init as PlatformInit; interface Init as SoftwareInit; interface Leds; } } implementation { thread_t thread_info; event void TinyOSBoot.booted() { atomic { /* Initialize all of the very hardware specific stuff, such as CPU settings, counters, etc. After the hardware is ready, initialize the requisite software components and start execution. */ platform_bootstrap(); // First, initialize the Scheduler so components can post tasks. call TaskScheduler.init(); /* Initialize the platform. Then spin on the Scheduler, passing * FALSE so it will not put the system to sleep if there are no * more tasks; if no tasks remain, continue on to software * initialization */ call PlatformInit.init(); while (call TaskScheduler.runNextTask()); /* Initialize software components.Then spin on the Scheduler, * passing FALSE so it will not put the system to sleep if there * are no more tasks; if no tasks remain, the system has booted * successfully.*/ call SoftwareInit.init(); while (call TaskScheduler.runNextTask()); } /* Enable interrupts now that system is ready. */ __nesc_enable_interrupt(); signal Boot.booted(); /* Spin in the TaskScheduler */ call TaskScheduler.taskLoop(); } async command error_t ThreadInfo.reset() { return FAIL; } async command thread_t* ThreadInfo.get() { return &thread_info; } default command error_t PlatformInit.init() { return SUCCESS; } default command error_t SoftwareInit.init() { return SUCCESS; } default event void Boot.booted() { } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/TinyTaskSchedulerC.nc000066400000000000000000000047331207233610700251010ustar00rootroot00000000000000// $Id: TinyTaskSchedulerC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The TinyOS scheduler. It provides two interfaces: Scheduler, * for TinyOS to initialize and run tasks, and TaskBasic, the simplext * class of TinyOS tasks (reserved always at-most-once posting, * FIFO, parameter-free). For details and information on how to * replace the scheduler, refer to TEP 106. * * @author Phil Levis * @author Kevin Klues * @date August 7 2005 * @see TEP 106: Tasks and Schedulers */ configuration TinyTaskSchedulerC { provides interface TaskScheduler; provides interface TaskBasic[uint8_t id]; uses interface ThreadScheduler; } implementation { components SchedulerBasicP as Sched; components McuSleepC as Sleep; TaskScheduler = Sched; TaskBasic = Sched; Sched.ThreadScheduler = ThreadScheduler; components LedsC; Sched.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/TinyThreadSchedulerC.nc000066400000000000000000000046461207233610700254110ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #include "thread.h" configuration TinyThreadSchedulerC { provides { interface ThreadScheduler; interface ThreadCleanup[uint8_t id]; interface Boot as TinyOSBoot; } uses { interface Boot as ThreadSchedulerBoot; interface ThreadInfo[uint8_t id]; } } implementation { components TinyThreadSchedulerP as Sched; components McuSleepC as Sleep; TinyOSBoot = Sched; ThreadSchedulerBoot = Sched.ThreadSchedulerBoot; ThreadInfo = Sched; ThreadCleanup = Sched; ThreadScheduler = Sched; Sched.McuSleep -> Sleep; components BitArrayUtilsC; Sched.BitArrayUtils -> BitArrayUtilsC; components ThreadQueueC; Sched.ThreadQueue -> ThreadQueueC; components new TimerMilliC() as Alarm; Sched.PreemptionAlarm -> Alarm; components LedsC; Sched.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/TinyThreadSchedulerP.nc000066400000000000000000000242421207233610700254200ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ module TinyThreadSchedulerP { provides { interface ThreadScheduler; interface Boot as TinyOSBoot; interface ThreadCleanup[uint8_t id]; } uses { interface Boot as ThreadSchedulerBoot; interface ThreadInfo[uint8_t id]; interface ThreadQueue; interface BitArrayUtils; interface McuSleep; interface Leds; interface Timer as PreemptionAlarm; } } implementation { //Pointer to currently running thread thread_t* current_thread; //Pointer to the tos thread thread_t* tos_thread; //Pointer to yielding thread thread_t* yielding_thread; //Number of threads started, and currently capable of running if given the chance uint8_t num_runnable_threads; //Thread queue for keeping track of threads waiting to run thread_queue_t ready_queue; void task alarmTask() { uint8_t temp; atomic temp = num_runnable_threads; if(temp <= 1) call PreemptionAlarm.stop(); else if(temp > 1) call PreemptionAlarm.startOneShot(TOSTHREAD_PREEMPTION_PERIOD); } /* switch_threads() * This routine swaps the stack and allows a thread to run. * Needs to be in a separate function like this so that the * PC counter gets saved on the stack correctly. * * This funciton should have NOTHING other than the call * to the SWITCH_CONTEXTS macro in it. Otherwise we run * the risk of variables being pushed and popped by the * compiler, causing obvious problems with the stack switching * thats going on.... */ void switchThreads() __attribute__((noinline)) { SWITCH_CONTEXTS(yielding_thread, current_thread); } void restoreThread() __attribute__((noinline)) { RESTORE_TCB(current_thread); } /* sleepWhileIdle() * This routine is responsible for putting the mcu to sleep as * long as there are no threads waiting to be run. Once a * thread has been added to the ready queue the mcu will be * woken up and the thread will start running */ void sleepWhileIdle() { while(TRUE) { bool mt; atomic mt = (call ThreadQueue.isEmpty(&ready_queue) == TRUE); if(!mt || tos_thread->state == TOSTHREAD_STATE_READY) break; call McuSleep.sleep(); } } /* schedule_next_thread() * This routine does the job of deciding which thread should run next. * Should be complete as is. Add functionality to getNextThreadId() * if you need to change the actual scheduling policy. */ void scheduleNextThread() { if(tos_thread->state == TOSTHREAD_STATE_READY) current_thread = tos_thread; else current_thread = call ThreadQueue.dequeue(&ready_queue); current_thread->state = TOSTHREAD_STATE_ACTIVE; } /* interrupt() * This routine figures out what thread should run next * and then switches to it. */ void interrupt(thread_t* thread) { yielding_thread = thread; scheduleNextThread(); if(current_thread != yielding_thread) { switchThreads(); } } /* suspend() * this routine is responsbile for suspending a thread. It first * checks to see if the mcu should be put to sleep based on the fact * that the thread is being suspended. If not, it proceeds to switch * contexts to the next thread on the ready queue. */ void suspend(thread_t* thread) { //if there are no active threads, put the MCU to sleep //Then wakeup the TinyOS thread whenever the MCU wakes up again #ifdef TOSTHREADS_TIMER_OPTIMIZATION num_runnable_threads--; post alarmTask(); #endif sleepWhileIdle(); interrupt(thread); } void wakeupJoined(thread_t* t) { int i,j,k; k = 0; for(i=0; ijoinedOnMe); i++) { if(t->joinedOnMe[i] == 0) { k+=8; continue; } for(j=0; j<8; j++) { if(t->joinedOnMe[i] & 0x1) call ThreadScheduler.wakeupThread(k); t->joinedOnMe[i] >>= 1; k++; } } } /* stop * This routine stops a thread by putting it into the inactive state * and decrementing any necessary variables used to keep track of * threads by the thread scheduler. */ void stop(thread_t* t) { t->state = TOSTHREAD_STATE_INACTIVE; num_runnable_threads--; wakeupJoined(t); #ifdef TOSTHREADS_TIMER_OPTIMIZATION post alarmTask(); #else if(num_runnable_threads == 1) call PreemptionAlarm.stop(); #endif signal ThreadCleanup.cleanup[t->id](); } /* This executes and cleans up a thread */ void threadWrapper() __attribute__((naked, noinline)) { thread_t* t; atomic t = current_thread; __nesc_enable_interrupt(); (*(t->start_ptr))(t->start_arg_ptr); atomic { stop(t); sleepWhileIdle(); scheduleNextThread(); restoreThread(); } } event void ThreadSchedulerBoot.booted() { num_runnable_threads = 0; tos_thread = call ThreadInfo.get[TOSTHREAD_TOS_THREAD_ID](); tos_thread->id = TOSTHREAD_TOS_THREAD_ID; call ThreadQueue.init(&ready_queue); current_thread = tos_thread; current_thread->state = TOSTHREAD_STATE_ACTIVE; current_thread->init_block = NULL; signal TinyOSBoot.booted(); } command error_t ThreadScheduler.initThread(uint8_t id) { thread_t* t = (call ThreadInfo.get[id]()); t->state = TOSTHREAD_STATE_INACTIVE; t->init_block = current_thread->init_block; call BitArrayUtils.clrArray(t->joinedOnMe, sizeof(t->joinedOnMe)); PREPARE_THREAD(t, threadWrapper); return SUCCESS; } command error_t ThreadScheduler.startThread(uint8_t id) { atomic { thread_t* t = (call ThreadInfo.get[id]()); if(t->state == TOSTHREAD_STATE_INACTIVE) { num_runnable_threads++; #ifdef TOSTHREADS_TIMER_OPTIMIZATION post alarmTask(); #else if(num_runnable_threads == 2) call PreemptionAlarm.startOneShot(TOSTHREAD_PREEMPTION_PERIOD); #endif t->state = TOSTHREAD_STATE_READY; call ThreadQueue.enqueue(&ready_queue, t); return SUCCESS; } } return FAIL; } command error_t ThreadScheduler.stopThread(uint8_t id) { atomic { thread_t* t = call ThreadInfo.get[id](); if((t->state == TOSTHREAD_STATE_READY) && (t->mutex_count == 0)) { call ThreadQueue.remove(&ready_queue, t); stop(t); return SUCCESS; } return FAIL; } } async command error_t ThreadScheduler.suspendCurrentThread() { atomic { if(current_thread->state == TOSTHREAD_STATE_ACTIVE) { current_thread->state = TOSTHREAD_STATE_SUSPENDED; suspend(current_thread); return SUCCESS; } return FAIL; } } async command error_t ThreadScheduler.interruptCurrentThread() { atomic { if(current_thread->state == TOSTHREAD_STATE_ACTIVE) { current_thread->state = TOSTHREAD_STATE_READY; if(current_thread != tos_thread) call ThreadQueue.enqueue(&ready_queue, current_thread); interrupt(current_thread); return SUCCESS; } return FAIL; } } async command error_t ThreadScheduler.joinThread(thread_id_t id) { thread_t* t = call ThreadInfo.get[id](); atomic { if(current_thread == tos_thread) return FAIL; if (t->state != TOSTHREAD_STATE_INACTIVE) { call BitArrayUtils.setBit(t->joinedOnMe, current_thread->id); call ThreadScheduler.suspendCurrentThread(); return SUCCESS; } } return EALREADY; } async command error_t ThreadScheduler.wakeupThread(uint8_t id) { thread_t* t = call ThreadInfo.get[id](); if((t->state) == TOSTHREAD_STATE_SUSPENDED) { t->state = TOSTHREAD_STATE_READY; if(t != tos_thread) { call ThreadQueue.enqueue(&ready_queue, call ThreadInfo.get[id]()); #ifdef TOSTHREADS_TIMER_OPTIMIZATION atomic num_runnable_threads++; post alarmTask(); #endif } return SUCCESS; } return FAIL; } async command uint8_t ThreadScheduler.currentThreadId() { atomic return current_thread->id; } async command thread_t* ThreadScheduler.threadInfo(uint8_t id) { atomic return call ThreadInfo.get[id](); } async command thread_t* ThreadScheduler.currentThreadInfo() { atomic return current_thread; } event void PreemptionAlarm.fired() { call PreemptionAlarm.startOneShot(TOSTHREAD_PREEMPTION_PERIOD); atomic { if((call ThreadQueue.isEmpty(&ready_queue) == FALSE)) { call ThreadScheduler.interruptCurrentThread(); } } } default async command thread_t* ThreadInfo.get[uint8_t id]() { return NULL; } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/system/TosMallocC.nc000066400000000000000000000071351207233610700233700ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) * Implementation borrowed from the msp430-libc implementation */ /* * MALLOC_HEAP_SIZE MUST be defined as a power of 2 */ #ifndef MALLOC_HEAP_SIZE #define MALLOC_HEAP_SIZE 1024 #endif module TosMallocC { provides interface Malloc; } implementation { #define XSIZE(x) ((*x)>>1) #define FREE_P(x) (!((*x)&1)) #define MARK_BUSY(x) ((*x)|=1) #define MARK_FREE(x) ((*x)&=0xfffe) size_t malloc_heap[MALLOC_HEAP_SIZE]; void *tos_malloc (size_t size) @C() AT_SPONTANEOUS { static char once = 0; size_t * heap_bottom = &(malloc_heap[MALLOC_HEAP_SIZE]); size_t * heap_top = malloc_heap; char f = 0; atomic if (!once) { once = 1; *heap_top = 0xFFFE; } size = (size+1) >> 1; /* round to 2 */ do { size_t xsize = XSIZE (heap_top); size_t * heap_next = &heap_top[xsize + 1]; if ((xsize<<1)+2 == 0) { f = 1; } if (FREE_P (heap_top)) { if (f) { xsize = heap_bottom - heap_top - 1; } else if (FREE_P(heap_next)) { *heap_top = ( (XSIZE(heap_next)<<1) + 2 == 0 ? 0xfffe : (xsize + XSIZE(heap_next) + 1)<<1); continue; } if (xsize >= size) { if (f) heap_top[size + 1] = 0xfffe; else if (xsize != size) heap_top[size + 1] = (xsize - size - 1) << 1; *heap_top = size << 1; MARK_BUSY (heap_top); return heap_top+1; } } heap_top += xsize + 1; } while (!f); return NULL; } void tos_free (void *p) @C() AT_SPONTANEOUS { size_t *t = (size_t*)p - 1; MARK_FREE (t); } async command void* Malloc.malloc(size_t size) { return tos_malloc(size); } async command void Malloc.free(void* p) { tos_free(p); } } tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/000077500000000000000000000000001207233610700206605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/barrier.h000066400000000000000000000036171207233610700224660ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Header file declaring struct for barrier synchronization as used * with tosthreads. * * @author Kevin Klues */ #ifndef BARRIER_H #define BARRIER_H #include "thread.h" #include "thread_queue.h" typedef struct barrier { uint8_t count; thread_queue_t thread_queue; } barrier_t; #endif //BARRIER_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/condvar.h000066400000000000000000000034671207233610700224770ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues (klueska@cs.stanford.edu) */ #ifndef CONDVAR_H #define CONDVAR_H #include "thread.h" #include "thread_queue.h" #include "mutex.h" typedef struct condvar { thread_queue_t thread_queue; } condvar_t; #endif //COND_VAR_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/linked_list.h000066400000000000000000000036351207233610700233410ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef LINKED_LIST_H_INCLUDED #define LINKED_LIST_H_INCLUDED typedef struct list_element { struct list_element* next; uint8_t* element_data; } list_element_t; typedef struct linked_list { list_element_t* head; volatile uint8_t size; } linked_list_t; #endif //LINKED_LIST_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/mutex.h000066400000000000000000000034211207233610700221730ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef MUTEX_H #define MUTEX_H #include "thread_queue.h" typedef struct mutex { bool lock; thread_queue_t thread_queue; } mutex_t; #endif //MUTEX_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/poolthread.h000066400000000000000000000003001207233610700231630ustar00rootroot00000000000000 #ifndef _POOL_THREAD_H_ #define _POOL_THREAD_H_ #ifndef NUM_POOL_THREADS #define NUM_POOL_THREADS 5 #endif #ifndef POOL_THREAD_STACK_SIZE #define POOL_THREAD_STACK_SIZE 200 #endif #endif tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/queue.h000066400000000000000000000035361207233610700221640ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef QUEUE_H_INCLUDED #define QUEUE_H_INCLUDED #include "linked_list.h" #include "tosthread_linked_list.h" typedef struct queue { linked_list_t l; } queue_t; typedef linked_list_t queue_element_t; #endif //QUEUE_H_INCLUDED tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/refcounter.h000066400000000000000000000035031207233610700232060ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef REFCOUNTER_H #define REFCOUNTER_H #include "thread.h" #include "thread_queue.h" typedef struct refcounter { uint8_t count; thread_queue_t thread_queue; } refcounter_t; #endif //REFCOUNTER_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/semaphore.h000066400000000000000000000035401207233610700230160ustar00rootroot00000000000000/* * Copyright (c) 2008 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Chieh-Jan Mike Liang */ #ifndef SEMAPHORE_H #define SEMAPHORE_H #include "thread.h" #include "mutex.h" #include "condvar.h" typedef struct semaphore { uint8_t v; uint8_t s; mutex_t lock; condvar_t condvar; } semaphore_t; #endif //SEMAPHORE_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/syscall_queue.h000066400000000000000000000035321207233610700237120ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef SYSCALL_QUEUE_H #define SYSCALL_QUEUE_H #include "linked_list.h" typedef struct syscall_queue { linked_list_t l; //The syscall_queue implementation uses a linked list } syscall_queue_t; #endif //SYSCALL_QUEUE_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/thread.h000066400000000000000000000136621207233610700223100ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef THREAD_H #define THREAD_H #include "chip_thread.h" #include "refcounter.h" typedef uint8_t thread_id_t; //Typedef for thread_id_t typedef uint8_t syscall_id_t; //Typedef for syscall_id_t typedef thread_id_t tosthread_t; //Typedef for tosthread_t used to initialize a c-based thread #ifndef TOSTHREAD_MAIN_STACK_SIZE #define TOSTHREAD_MAIN_STACK_SIZE 500 //Default stack size for the main thread that spawns all other threads in the c based api #endif //Since thread initialization is encapsulated //inside a generic component, we can statically //know the number of threads created at compile //time #define UQ_TOS_THREAD "Unique.TOS.Thread" enum { #ifdef MAX_NUM_THREADS TOSTHREAD_MAX_NUM_THREADS = MAX_NUM_THREADS, #else TOSTHREAD_MAX_NUM_THREADS = 33, //Maximum number of threads allowed to run (must be less than sizeof(thread_id_t)) #endif TOSTHREAD_NUM_STATIC_THREADS = uniqueCount(UQ_TOS_THREAD), //The number of statically allocated threads TOSTHREAD_MAX_DYNAMIC_THREADS = TOSTHREAD_MAX_NUM_THREADS - TOSTHREAD_NUM_STATIC_THREADS, TOSTHREAD_TOS_THREAD_ID = TOSTHREAD_MAX_NUM_THREADS, //The ID of the TinyOS thread (One more than max allowable threads) TOSTHREAD_INVALID_THREAD_ID = TOSTHREAD_MAX_NUM_THREADS, //An invalid thread id TOSTHREAD_PREEMPTION_PERIOD = 5, //The preemption period for switching between threads }; enum { INVALID_ID = 0xFF, //ID reserved to indicate an invalid client connected SYSCALL_WAIT_ON_EVENT = 0, //Indicates there is no actual system call to make, but rather should jsut wait on an event }; typedef struct syscall syscall_t; typedef struct thread thread_t; typedef struct init_block init_block_t; //This is the data structure associated with an initialization block from which //threads are spawned when dynamically loading them struct init_block { void* globals; void (*init_ptr)(void*); void* init_arg; refcounter_t thread_counter; }; //This is a system call data structure struct syscall { //***** next_call must be at first position in struct for casting purposes ******* struct syscall* next_call; //Pointer to next system call for use in syscall queues when blocking on them syscall_id_t id; //client id of this system call for the particular syscall_queue within which it is being held thread_t* thread; //Pointer back to the thread with which this system call is associated void (*syscall_ptr)(struct syscall*); //Pointer to the the function that actually performs the system call void* params; //Pointer to a set of parameters passed to the system call once it is running in task context }; //This is a thread data structure struct thread { //***** next_thread must be at first position in struct for casting purposes ******* volatile struct thread* next_thread; //Pointer to next thread for use in queues when blocked thread_id_t id; //id of this thread for use by the thread scheduler init_block_t* init_block; //Pointer to an initialization block from which this thread was spawned stack_ptr_t stack_ptr; //Pointer to this threads stack volatile uint8_t state; //Current state the thread is in volatile uint8_t mutex_count; //A reference count of the number of mutexes held by this thread uint8_t joinedOnMe[(TOSTHREAD_MAX_NUM_THREADS - 1) / 8 + 1]; //Bitmask of threads waiting for me to finish void (*start_ptr)(void*); //Pointer to the start function of this thread void* start_arg_ptr; //Pointer to the argument passed as a parameter to the start function of this thread syscall_t* syscall; //Pointer to an instance of a system call thread_regs_t regs; //Contents of the GPRs stored when doing a context switch }; enum { TOSTHREAD_STATE_INACTIVE = 0, //This thread is inactive and cannot be run until started TOSTHREAD_STATE_ACTIVE = 1, //This thread is currently running and using the cpu TOSTHREAD_STATE_READY = 2, //This thread is not currently running, but is not blocked and has work to do TOSTHREAD_STATE_SUSPENDED = 3, //This thread has been suspended by a system call (i.e. blocked) }; #endif //THREAD_H tinyos-2.1.2+dfsg/tos/lib/tosthreads/types/thread_queue.h000066400000000000000000000035241207233610700235100ustar00rootroot00000000000000/* * Copyright (c) 2008 Stanford University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Stanford University nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL STANFORD * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Kevin Klues */ #ifndef THREAD_QUEUE_H #define THREAD_QUEUE_H #include "linked_list.h" typedef struct thread_queue { linked_list_t l; //The thread_queue implementation uses a linked list } thread_queue_t; #endif //THREAD_QUEUE_H tinyos-2.1.2+dfsg/tos/lib/zigbee/000077500000000000000000000000001207233610700166015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/Readme.txt000066400000000000000000000103111207233610700205330ustar00rootroot00000000000000README for cluster tree test application Author/Contact: Stefano Tennina Description: This folder contains the first implementation of the Network (NWK) layer for ZigBee Cluster Tree model as well as an example application to test its functionalities. The NWK layer is implemented on top of the TKN15.4 MAC layer and uses the beacon-enabled mode. A ZigBee cluster tree network is a network composed by 3 types of devices: a PAN coordinator, which acts as root of the tree, the end devices, which are the leaves of the tree, and the routers, which lead clusters of end devices and interconnect the leaves with the root. The code for NWK layer is in the folder "clusterTree" and includes the code for the 3 devices. The application is in the folder "tests" and includes the codes for each type of device. The folder "shadow" includes a modified version of the Random interface, used to schedule the association start from multiple nodes to a single parent. If you want to use this network layer instead of your platform's default protocol in your own application, you need to modify the pmote.sh script which is used to program the nodes and configuring them to form the cluster tree network. To run the scripts it is needed to make them executable using the Linux command from the "zigbee" folder: chmod +x *.sh The pmote script must be run to compile and install software in a mote and the assumption made is that nodes are all TelosB (although any platform which is supported by the TKN154 MAC can run this code). Each mote can be a Coordinator (GW, gateway), Router (CH, cluster head), End-device (SN, sensor node) or Sniffer. Its usage is as follows: ./pmote.sh [
      ] For convenience, a pnetwork script is included to setup a small network as follows: GW <-> CH1 <-+-> SN1 +-> SN2 This scripts simply calls the pmote recursively to build the network, supposing that 4 nodes are attached on USB ports from /dev/ttyUSB0 to /dev/ttyUSB3. The addressing mechanism implemented in the NWK layer is the simple ZigBee Cskip. Some of the configuration parameters can be set on the pmote script (e.g., channel, PAN ID, transmission power), while others such as Beacon Order and Superframe Order can be changed from the MAC_profile.h file which is in the "zigbee/clusterTree/includes" folder. Criteria for a successful test: Press the USER button on the GW and it will start sending beacons (blue led toggles every beacon transmitted). The CH1 is configured to wait for beacons from the GW and it will switch on the green led when the first beacon is received. The SNs are configured to wait for CH1's beacons and toggle the red led every time they receive a beacon from nodes other than CH1. CH1 then associates with the GW and starts the negotiation phase to get a time window to start its superframe in a non-overlapping fashion with the other clusters (i.e., in this case, the GW). The windows are statically allocated based on the Time Division Cluster Scheduling algorithm. As soon as the negotiation is accomplished, CH1 starts sending beacons (blue led toggles) and the SNs switch on their green led starting the process for association. When the network has been setup, the SNs transmit dummy data towards the GW though the CH and every time the data is transmitted by SNs or the CH the green led toggles. If the USER button of a SN is pressed, the node will send a disassociation request to the parent CH and then stops transmitting data. Known bugs/limitations: - GTS allocation policies still not implemented (although GTS slots are handled at the MAC layer) - Allocation of the time windows to cluster heads for their superframe during the negotiation phase after the CHs association is based on fixed configuration (process_beacon_scheduling() function in coordinatorBasicC.nc). - Many TinyOS 2 platforms do not have a clock that satisfies the precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing is not standard compliant tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/000077500000000000000000000000001207233610700211025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/000077500000000000000000000000001207233610700227105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/MAC_profile.h000066400000000000000000000010551207233610700252020ustar00rootroot00000000000000/* * @author open-zb http://www.open-zb.net * @author Stefano Tennina */ #ifndef __MAC_PROFILE__ #define __MAC_PROFILE__ // Default PAN ID #ifndef DEF_MAC_PANID #define MAC_PANID 0x123F #else #define MAC_PANID DEF_MAC_PANID #endif // Default Channel #ifndef DEF_CHANNEL #define LOGICAL_CHANNEL 26 #else #define LOGICAL_CHANNEL DEF_CHANNEL #endif #define BEACON_ORDER 8 #define SUPERFRAME_ORDER 4 #define AVAILABLEADDRESSES 0x06 #define ADDRESSINCREMENT 0x0001 #define MAXCHILDREN 0x06 #define MAXDEPTH 0x03 #define MAXROUTERS 0x04 #endif tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/log_enable.h000066400000000000000000000023361207233610700251540ustar00rootroot00000000000000/* * @author open-zb http://www.open-zb.net * @author Stefano Tennina */ //Choose which printfs to enable #ifndef __LOG_ENABLE_H__ #define __LOG_ENABLE_H__ // XLayer Log Level Settings (enabled only if the LAYERS prints are enabled) #define ERROR_CONDITIONS 0x01 #define DEBUG_STATUS 0x02 #define TRACE_FUNC 0x04 #define DBG_NEIGHBOR_TABLE 0x08 #define DBG_CUSTOM 0x10 #define TIME_PERFORMANCE 0x20 //#define LOG_LEVEL (TIME_PERFORMANCE) //#define LOG_LEVEL (ERROR_CONDITIONS | DEBUG_STATUS | TRACE_FUNC) //#define LOG_LEVEL (ERROR_CONDITIONS) #define LOG_LEVEL (0) // Local ENABLERS // ********************************************** // ************** APPLICATION ******************* // ********************************************** // Uncomment this to globally enable printfs in APP //#define APP_PRINTFS_ENABLED // ****************************************** // ************** NETWORK ******************* // ****************************************** // Uncomment this to globally enable printfs in NWKP.nc //#define NWK_PRINTFS_ENABLED // Uncomment this to avoid IEEE154 status parsing messages //#define DEBUG_STATUS_MESSAGE // Uncomment this to enable prints of neighbor table //#define DBG_LIST_NEIGHBOURS #endif tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/nwk_const_coordinator.h000066400000000000000000000065071207233610700275010ustar00rootroot00000000000000/* * @author open-zb http://www.open-zb.net * @author Stefano Tennina */ #ifndef __NWK_CONST__ #define __NWK_CONST__ #include "MAC_profile.h" #include "nwk_enumerations.h" //GLOBAL VARIABLES //SELECTED DEVICE TYPE #define TYPE_DEVICE COORDINATOR // Default Device Depth #ifndef DEF_DEVICE_DEPTH #define DEF_DEVICE_DEPTH 0x00 #endif // Default Parent #ifndef DEF_CHOSEN_PARENT #define DEF_CHOSEN_PARENT 0x0000 #endif // Default Position - X #ifndef DEF_MY_X #define DEF_MY_X TOS_NODE_ID #endif // Default Position - Y #ifndef DEF_MY_Y #define DEF_MY_Y (TOS_NODE_ID+5) #endif #ifdef GEO_3D // Default Position - Z #ifndef DEF_MY_Z #define DEF_MY_Z 0x0000 #endif #endif // Maximum number of alternative parents (fault tolerance) including // the actual one. This definition impacts on the neighbor table dimension #define MAXPARENTS 0x00 // The Network layer constants are defined in here. //page 202 //#define nwkcCoordinatorCapable //set at build time //#define nwkcDefaultSecurityLevel ENC-MIC-64 #define nwkcDiscoveryRetryLimit 0x03 #define nwkcMaxDepth 0x0f #define nwkcMinHeaderOverhead 0x08 #define nwkcProtocolVersion 0x01 #define nwkcRepairThreshold 0x03 #define nwkcRouteDiscoveryTime 0x2710 #define nwkcMaxBroadcastJitter 0x40 #define nwkcInitialRREQRetries 0x03 #define nwkcRREQRetries 0x02 #define nwkcRREQRetryInterval 0xfe #define nwkcMinRReQJitter 0x01 #define nwkcMaxRReQJitter 0x40 // The NWK IB attributes are defined in here. typedef struct { //page 204 uint8_t nwkSequenceNumber; uint8_t nwkPassiveAckTimeout; uint8_t nwkMaxBroadcastRetries; uint8_t nwkMaxChildren; uint8_t nwkMaxDepth; uint8_t nwkMaxRouters; //neighbortableentry nwkNeighborTable[]; uint8_t nwkNetworkBroadcastDeliveryTime; uint8_t nwkReportConstantCost; uint8_t nwkRouteDiscoveryRetriesPermitted; //set nwkRouteTable; uint8_t nwkSymLink; uint8_t nwkCapabilityInformation; uint8_t nwkUseTreeAddrAlloc; uint8_t nwkUseTreeRouting; uint16_t nwkNextAddress; uint16_t nwkAvailableAddresses; uint16_t nwkAddressIncrement; uint16_t nwkTransactionPersistenceTime; } nwkIB; typedef struct { uint16_t tosAddress; uint16_t depth; } beaconPay_t; //NWK layer NeighborTableEntry typedef struct { //page 218 uint16_t PAN_Id; uint64_t Extended_Address; uint16_t Network_Address; uint8_t Device_Type; uint8_t Relationship; //optional fields //we choose to exclude this fields due to memory limitation //bool RxOnWhenIdle; uint8_t Depth; uint8_t Permit_Joining; uint8_t Logical_Channel; uint8_t Potential_Parent; /* uint8_t Beacon_Order; uint8_t Transmit_Failure; uint8_t Potential_Parent; uint8_t LQI; uint8_t Logical_Channel; uint32_t Incoming_Beacon_Timestamp; uint32_t Beacon_Transmission_Time_Offset; */ } neighbortableentry; // NWK layer NetworkDescriptor typedef struct { //page 166 uint16_t PANId; uint8_t LogicalChannel; uint8_t StackProfile; uint8_t ZigBeeVersion; uint8_t BeaconOrder; uint8_t SuperframeOrder; uint8_t PermitJoining; } networkdescriptor; //NEIGHBOUR TABLE COUNT #define NEIGHBOUR_TABLE_SIZE (MAXCHILDREN+MAXPARENTS) //beacon scheduling mechanims typedef struct { uint8_t request_type; uint8_t beacon_order; uint8_t superframe_order; uint8_t transmission_offset[3]; }beacon_scheduling; #define SCHEDULING_REQUEST 0x01 #define SCHEDULING_ACCEPT 0x02 #define SCHEDULING_DENY 0x03 #endif tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/nwk_const_end_device.h000066400000000000000000000075621207233610700272450ustar00rootroot00000000000000/* * @author open-zb http://www.open-zb.net * @author Stefano Tennina */ #ifndef __NWK_CONST__ #define __NWK_CONST__ #include "MAC_profile.h" #include "nwk_enumerations.h" //GLOBAL VARIABLES //SELECTED DEVICE TYPE #define TYPE_DEVICE END_DEVICE // Default Device Depth #ifndef DEF_DEVICE_DEPTH #define DEF_DEVICE_DEPTH 0x01 #endif // Default Parent #ifndef DEF_CHOSEN_PARENT #define DEF_CHOSEN_PARENT 0x0001 #endif // Default Position - X #ifndef DEF_MY_X #define DEF_MY_X TOS_NODE_ID #endif // Default Position - Y #ifndef DEF_MY_Y #define DEF_MY_Y (TOS_NODE_ID+5) #endif #ifdef GEO_3D // Default Position - Z #ifndef DEF_MY_Z #define DEF_MY_Z 0x0000 #endif #endif // Maximum number of alternative parents (fault tolerance) including // the actual one. This definition impacts on the neighbor table dimension #define MAXPARENTS 0x03 // The Network layer constants are defined in here. //page 202 //#define nwkcCoordinatorCapable //set at build time //#define nwkcDefaultSecurityLevel ENC-MIC-64 #define nwkcDiscoveryRetryLimit 0x03 #define nwkcMaxDepth 0x0f #define nwkcMinHeaderOverhead 0x08 #define nwkcProtocolVersion 0x01 #define nwkcRepairThreshold 0x03 #define nwkcRouteDiscoveryTime 0x2710 #define nwkcMaxBroadcastJitter 0x40 #define nwkcInitialRREQRetries 0x03 #define nwkcRREQRetries 0x02 #define nwkcRREQRetryInterval 0xfe #define nwkcMinRReQJitter 0x01 #define nwkcMaxRReQJitter 0x40 // The NWK IB attributes are defined in here. typedef struct { //page 204 uint8_t nwkSequenceNumber; uint8_t nwkPassiveAckTimeout; uint8_t nwkMaxBroadcastRetries; uint8_t nwkMaxChildren; uint8_t nwkMaxDepth; uint8_t nwkMaxRouters; //neighbortableentry nwkNeighborTable[]; uint8_t nwkNetworkBroadcastDeliveryTime; uint8_t nwkReportConstantCost; uint8_t nwkRouteDiscoveryRetriesPermitted; //set nwkRouteTable; uint8_t nwkSymLink; uint8_t nwkCapabilityInformation; uint8_t nwkUseTreeAddrAlloc; uint8_t nwkUseTreeRouting; uint16_t nwkNextAddress; uint16_t nwkAvailableAddresses; uint16_t nwkAddressIncrement; uint16_t nwkTransactionPersistenceTime; } nwkIB; typedef struct { uint16_t tosAddress; uint16_t depth; } beaconPay_t; //NWK layer NeighborTableEntry typedef struct { //page 218 uint16_t PAN_Id; uint64_t Extended_Address; uint16_t Network_Address; uint8_t Device_Type; uint8_t Relationship; //optional fields //we choose to exclude this fields due to memory limitation //bool RxOnWhenIdle; uint8_t Depth; uint8_t Permit_Joining; uint8_t Logical_Channel; uint8_t Potential_Parent; /* uint8_t Beacon_Order; uint8_t Transmit_Failure; uint8_t Potential_Parent; uint8_t LQI; uint8_t Logical_Channel; uint32_t Incoming_Beacon_Timestamp; uint32_t Beacon_Transmission_Time_Offset; */ } neighbortableentry; // NWK layer NetworkDescriptor typedef struct { //page 166 uint16_t PANId; uint8_t LogicalChannel; uint8_t StackProfile; uint8_t ZigBeeVersion; uint8_t BeaconOrder; uint8_t SuperframeOrder; uint8_t PermitJoining; } networkdescriptor; // NEIGHBOUR TABLE COUNT #define NEIGHBOUR_TABLE_SIZE MAXPARENTS // Timer for association try/retry #define JOIN_TIMER_RETRY (TOS_NODE_ID * 1000) // MAX beacon counter for random association trials //#define MAX_RANDOM_BCN_COUNTER (2*MAXCHILDREN) #define MAX_RANDOM_BCN_COUNTER (MAXCHILDREN) // Offset for the random beacon counter // The end device should wait that routers have finished their // association. #define OFFSET_BCN_COUNTER 2 // MAX association trials (after this, JOIN unsuccess is signaled) // A value 0 means infinite tentatives #define MAX_ASSOCIATION_TRIALS 0 //#define MAX_ASSOCIATION_TRIALS 3 // MAX join trials (after this, a new scan discovery should be issued) #define MAX_JOIN_TRIALS MAX_ASSOCIATION_TRIALS // Association process status #define IM_SCANNING (0x01) #define IM_ASSOCIATING (0x01 << 1) #define ASSOCIATED (0x01 << 2) #define DISASSOCIATED (0x01 << 3) #endif tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/nwk_const_router.h000066400000000000000000000077501207233610700264770ustar00rootroot00000000000000/* * @author open-zb http://www.open-zb.net * @author Stefano Tennina */ #ifndef __NWK_CONST__ #define __NWK_CONST__ #include "MAC_profile.h" #include "nwk_enumerations.h" //GLOBAL VARIABLES //SELECTED DEVICE TYPE #define TYPE_DEVICE ROUTER // Default Device Depth #ifndef DEF_DEVICE_DEPTH #define DEF_DEVICE_DEPTH 0x01 #endif // Default Parent #ifndef DEF_CHOSEN_PARENT #define DEF_CHOSEN_PARENT 0x0000 #endif // Default Position - X #ifndef DEF_MY_X #define DEF_MY_X TOS_NODE_ID #endif // Default Position - Y #ifndef DEF_MY_Y #define DEF_MY_Y (TOS_NODE_ID+5) #endif #ifdef GEO_3D // Default Position - Z #ifndef DEF_MY_Z #define DEF_MY_Z 0x0000 #endif #endif // Maximum number of alternative parents (fault tolerance) including // the actual one. This definition impacts on the neighbor table dimension #define MAXPARENTS 0x03 // The Network layer constants are defined in here. //page 202 //#define nwkcCoordinatorCapable //set at build time //#define nwkcDefaultSecurityLevel ENC-MIC-64 #define nwkcDiscoveryRetryLimit 0x03 #define nwkcMaxDepth 0x0f #define nwkcMinHeaderOverhead 0x08 #define nwkcProtocolVersion 0x01 #define nwkcRepairThreshold 0x03 #define nwkcRouteDiscoveryTime 0x2710 #define nwkcMaxBroadcastJitter 0x40 #define nwkcInitialRREQRetries 0x03 #define nwkcRREQRetries 0x02 #define nwkcRREQRetryInterval 0xfe #define nwkcMinRReQJitter 0x01 #define nwkcMaxRReQJitter 0x40 // The NWK IB attributes are defined in here. typedef struct { //page 204 uint8_t nwkSequenceNumber; uint8_t nwkPassiveAckTimeout; uint8_t nwkMaxBroadcastRetries; uint8_t nwkMaxChildren; uint8_t nwkMaxDepth; uint8_t nwkMaxRouters; //neighbortableentry nwkNeighborTable[]; uint8_t nwkNetworkBroadcastDeliveryTime; uint8_t nwkReportConstantCost; uint8_t nwkRouteDiscoveryRetriesPermitted; //set nwkRouteTable; uint8_t nwkSymLink; uint8_t nwkCapabilityInformation; uint8_t nwkUseTreeAddrAlloc; uint8_t nwkUseTreeRouting; uint16_t nwkNextAddress; uint16_t nwkAvailableAddresses; uint16_t nwkAddressIncrement; uint16_t nwkTransactionPersistenceTime; } nwkIB; typedef struct { uint16_t tosAddress; uint16_t depth; } beaconPay_t; //NWK layer NeighborTableEntry typedef struct { //page 218 uint16_t PAN_Id; uint64_t Extended_Address; uint16_t Network_Address; uint8_t Device_Type; uint8_t Relationship; //optional fields //we choose to exclude this fields due to memory limitation //bool RxOnWhenIdle; uint8_t Depth; uint8_t Permit_Joining; uint8_t Logical_Channel; uint8_t Potential_Parent; /* uint8_t Beacon_Order; uint8_t Transmit_Failure; uint8_t Potential_Parent; uint8_t LQI; uint8_t Logical_Channel; uint32_t Incoming_Beacon_Timestamp; uint32_t Beacon_Transmission_Time_Offset; */ } neighbortableentry; // NWK layer NetworkDescriptor typedef struct { //page 166 uint16_t PANId; uint8_t LogicalChannel; uint8_t StackProfile; uint8_t ZigBeeVersion; uint8_t BeaconOrder; uint8_t SuperframeOrder; uint8_t PermitJoining; } networkdescriptor; //NEIGHBOUR TABLE COUNT #define NEIGHBOUR_TABLE_SIZE (MAXCHILDREN+MAXPARENTS) //beacon scheduling mechanims typedef struct { uint8_t request_type; uint8_t beacon_order; uint8_t superframe_order; uint8_t transmission_offset[3]; }beacon_scheduling; // Timer for association try/retry #define JOIN_TIMER_RETRY (TOS_NODE_ID * 1000) // MAX beacon counter for random association trials #define MAX_RANDOM_BCN_COUNTER (2*MAXROUTERS) // Offset for the random beacon counter #define OFFSET_BCN_COUNTER 0 // MAX association trials (after this, JOIN unsuccess is signaled) // A value 0 means infinite tentatives #define MAX_ASSOCIATION_TRIALS 0 // MAX join trials (after this, a new scan discovery should be issued) #define MAX_JOIN_TRIALS MAX_ASSOCIATION_TRIALS // Association process status #define IM_SCANNING (0x01) #define IM_ASSOCIATING (0x01 << 1) #define ASSOCIATED (0x01 << 2) #define DISASSOCIATED (0x01 << 3) #define SCHEDULING_REQUEST 0x01 #define SCHEDULING_ACCEPT 0x02 #define SCHEDULING_DENY 0x03 #endif tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/nwk_enumerations.h000066400000000000000000000033621207233610700264550ustar00rootroot00000000000000/* * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author open-zb http://www.open-zb.net * @author Andre Cunha */ #ifndef __NWK_ENUMERATIONS__ #define __NWK_ENUMERATIONS__ //NWK layer status values //page 243 enum { NWK_SUCCESS = 0x00, NWK_INVALID_PARAMETER = 0xc1, NWK_INVALID_REQUEST = 0xc2, NWK_NOT_PERMITTED = 0xc3, NWK_STARTUP_FAILURE = 0xc4, NWK_ALREADY_PRESENT = 0xc5, NWK_SYNC_FAILURE = 0xc6, NWK_TABLE_FULL = 0xc7, NWK_UNKNOWN_DEVICE = 0xc8, NWK_UNSUPPORTED_ATTRIBUTE = 0xc9, NWK_NO_NETWORKS = 0xca, NWK_LEAVE_UNCONFIRMED = 0xcb, NWK_MAX_FRM_CNTR = 0xcc, NWK_NO_KEY = 0xcd, NWK_BAD_CCM_OUTPUT = 0xce }; //NWK layer device types //page 342 enum { COORDINATOR = 0x00, ROUTER = 0x01, END_DEVICE = 0x02 }; //NWK layer Relationship //page 342 enum { NEIGHBOR_IS_PARENT = 0x00, NEIGHBOR_IS_CHILD = 0x01, NEIGHBOR_IS_SIBLING = 0x02, NEIGHBOR_IS_NON = 0x03, NEIGHBOR_IS_PREVIOUS_CHILD = 0x04, NEIGHBOR_IS_ALT_PARENT = 0x05 // Added to identify alternative parents }; //NWK layer PIB attributs ennumerations //PAG 317 enum{ NWKSEQUENCENUMBER = 0x81, NWKPASSIVEACKTIMEOUT = 0x82, NWKMAXBROADCASTRETRIES = 0x83, NWKMAXCHILDREN = 0x84, NWKMAXDEPTH = 0x85, NWKMAXROUTERS = 0x86, //NWKNEIGHBORTABLE = 0x87 NWKMETWORKBROADCASTDELIVERYTIME = 0x88, NWKREPORTCONSTANTCOST = 0x89, NWKROUTEDISCOVERYRETRIESPERMITED = 0x8a, //NWKROUTETABLE NWKSYMLINK = 0x8e, NWKCAPABILITYINFORMATION= 0x8f, NWKUSETREEADDRALLOC = 0x90, NWKUSETREEROUTING = 0x91, NWKNEXTADDRESS = 0x92, NWKAVAILABLEADDRESSES = 0x93, NWKADDRESSINCREMENT = 0x94, NWKTRANSACTIONPERSISTENCETIME = 0x95 }; #ifdef IM_ROUTER // Interface NWK-TKN MAC 802.15.4 enum{ ROUTER_FRAME_POOL_SIZE = 10, }; #endif #endif tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/nwk_func.h000066400000000000000000000063671207233610700247070ustar00rootroot00000000000000/* * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author IPP HURRAY http://www.open-zb.net * @author Andre Cunha */ #ifndef __NWK_FUNC__ #define __NWK_FUNC__ typedef struct routing_fields { //uint8_t frame_control1; //uint8_t frame_control2; uint16_t frame_control; uint16_t destination_address; uint16_t source_address; uint8_t radius; uint8_t sequence_number; }routing_fields; /*******************************************************************************************************************/ /********************************NETWORK LAYER FRAME CONTROL FUNCTIONS************************************************************/ /*******************************************************************************************************************/ //build NPDU frame control field uint16_t set_route_frame_control(uint8_t Frame_type,uint8_t Protocol_version,uint8_t Discover_route,uint8_t Security) { uint8_t fc_byte1=0; uint8_t fc_byte2=0; fc_byte1 = ( (Discover_route << 6) | (Protocol_version << 2) | (Frame_type << 0) ); fc_byte2 = ((Security<< 2)); return ( (fc_byte2 <<8 ) | (fc_byte1 << 0) ); } uint8_t route_fc1(uint8_t Security) { uint8_t fc; fc = ((Security << 2)); return fc; } uint8_t route_fc2(uint8_t Frame_type,uint8_t Protocol_version,uint8_t Discover_route) { uint8_t fc; fc = ( (Discover_route << 6) | (Protocol_version << 2) | (Frame_type << 0) ); return fc; } uint8_t get_route_frame_type(uint16_t frame_control) { return (frame_control & 0x3); } uint8_t get_route_protocol_version(uint16_t frame_control) { return ( (frame_control >> 2) & 0xf); } uint8_t get_route_discover_route(uint16_t frame_control) { return ( (frame_control >> 6) & 0x3); } uint8_t get_route_security(uint16_t frame_control) { if( ((frame_control >> 8) & 0x2) == 0x2) return 1; else return 0; } /*******************************************************************************************************************/ /********************************NETWORK LAYER BEACON PAYLOAD INFORMATION FUNCTIONS*********************************/ /*******************************************************************************************************************/ uint8_t nwk_payload_profile_protocolversion(uint8_t stackprofile,uint8_t nwkcprotocolversion) { return ((stackprofile << 0) | ( nwkcprotocolversion << 4)); } uint8_t nwk_payload_capacity(uint8_t routercapacity,uint8_t devicedepth,uint8_t enddevicecapacity) { return ((enddevicecapacity << 7) | ( devicedepth << 3 ) | (routercapacity << 2 ) ); } uint8_t get_protocolid(uint32_t nwk_information) { return (uint8_t)((nwk_information & 0xFF000000) >> 24); } uint8_t get_stackprofile(uint32_t nwk_information) { return (uint8_t)((nwk_information & 0x00F00000)>>20); } uint8_t get_nwkcprotocolversion(uint32_t nwk_information) { return (uint8_t)((nwk_information & 0x000F0000)>>16); } uint8_t get_routercapacity(uint32_t nwk_information) { if ( ( nwk_information & 0x00002000) == 0x00002000) return 1; else return 0; } uint8_t get_devicedepth(uint32_t nwk_information) { return (uint8_t)((nwk_information & 0x00001F00) >> 8); } uint8_t get_enddevicecapacity(uint32_t nwk_information) { if ( ( nwk_information & 0x00000001) == 0x00000001) return 1; else return 0; } #endif tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/includes/printfUART.h000066400000000000000000000240641207233610700250650ustar00rootroot00000000000000/* * Copyright (c) 2005 * The President and Fellows of Harvard College. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Writes printf like output to the UART. * This works only on the AVR and MSP430 Microcontrollers! *

      * Note: For AVR we explicitly place the print statements in ROM; for * MSP430 this is done by default! For AVR, if we don't place it * explicitely in ROM, the statements will go in RAM, which will * quickly cause a descent size program to run out of RAM. By default * it doesn't disable the interupts; disabling the interupts when * writing to the UART, slows down/makes the mote quite unresponsive, * and can lead to problems! If you wish to disable all printfs to * the UART, then comment the flag: PRINTFUART_ENABLED. * 

       * How to use:
 *   // (1) Call printfUART_init() from your initialization function 
 *   //     to initialize the UART
 *   printfUART_init();
 *   // (2) Set your UART client to the correct baud rate.  Look at 
 *   //     the comments in printfUART_init(), to figure out what 
 *   //     baud to use for your particular mote
 *
 *   // (3) Send printf statements like this:
 *   printfUART("Hello World, we are in year= %i\n", 2004);
 *
 * Examples and caveats:
 *   // (1) - If no parameters are passed, then the second quotes 
 *            are required because of how the macro is defined
 *   printfUART("Timer fired\n", ""); 
 *   // (2) - Must use curly braces in single section statements
 *   if (x < 3)
 *       {printfUART("The value of x is %i\n", x);}
 *   // (3) - Otherwise it more or less works like regular printf
 *   printfUART("\nThe value of x=%i, and y=%i\n", x, y); 
 *
      * 
      URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack
      * @author Konrad Lorincz * @version 2.0, January 5, 2005 */ #ifndef PRINTFUART_H #define PRINTFUART_H #include //#include // Comment out the line below to DISABLE printf statements. // This should be handled at the application Makefile //#define PRINTFUART_ENABLED // STE // found: http://mansos.net/svn/mansos/mos/hpl/chips/msp430/msp430_timers.h #define SSEL_0 0x00 #define SSEL_1 0x10 #define SSEL_2 0x20 #define SSEL_3 0x30 #define SSEL_ACLK SSEL_1 #define SSEL_SMCLK SSEL_2 // End STE // ------------------------------------------------------------------- #ifdef PRINTFUART_ENABLED #define DEBUGBUF_SIZE 256 char debugbuf[DEBUGBUF_SIZE]; char debugbufROMtoRAM[DEBUGBUF_SIZE]; #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) #define printfUART(__format, __args...) { \ static const char strROM[] PROGMEM = __format; \ strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM); \ sprintf(debugbuf, debugbufROMtoRAM, __args); \ writedebug(); \ } #else // assume MSP430 architecture (e.g. TelosA, TelosB, etc.) #define printfUART(__format, __args...) { \ sprintf(debugbuf, __format, __args); \ writedebug(); \ } #endif #else #define printfUART(__format, __args...) void printfUART_init() {} #endif #define NOprintfUART(__format, __args...) /** Used for terminating the program from a non-nesc file. Calling exit(1) * from a non-nesc file doesn't terminate the program immeditely */ static int EXIT_PROGRAM = 0; // ------------------------------------------------------------------- #ifdef PRINTFUART_ENABLED /** * Initialize the UART port. Call this from your startup routine. */ #define printfUART_init() {atomic printfUART_init_private();} void printfUART_init_private() { #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) uint8_t dummy = 0; // 56K baud UBRR0H = 0; UBRR0L = 15; //set baud rate UCSR0A = (1<> 8) & 0x0FF; U1MCTL = l_mctl; } else { U1BR0 = 0x03; // 9600 baud U1BR1 = 0x00; U1MCTL = 0x4A; } ME2 &= ~USPIE1; // USART1 SPI module disable ME2 |= (UTXE1 | URXE1); // USART1 UART module enable U1CTL &= ~SWRST; IFG2 &= ~(UTXIFG1 | URXIFG1); IE2 &= ~(UTXIE1 | URXIE1); // interrupt disabled #endif #endif } #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) #else // assume AVR architecture (e.g. TelosA, TelosB) bool isTxIntrPending() { if (U1TCTL & TXEPT) return TRUE; return FALSE; } #endif /** * Outputs a char to the UART. */ void UARTPutChar(char c) { if (c == '\n') UARTPutChar('\r'); #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT) // Wait for bit set while( !(UCSR0A & UDRE) ); UDR0 = c; //loop_until_bit_is_set(UCSR0A, UDRE); // outb(UDR0,c); #else // assume AVR architecture (e.g. TelosA, TelosB) U1TXBUF = c; while( !isTxIntrPending() ) continue; #endif } /** * Outputs the entire debugbuf to the UART, or until it encounters '\0'. */ void writedebug() { uint16_t i = 0; while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE) UARTPutChar(debugbuf[i++]); } /** * Simplified sprintf */ #define SCRATCH 16 int sprintf(uint8_t *buf, const uint8_t *format, ...) { uint8_t scratch[SCRATCH]; uint8_t format_flag; uint32_t u_val=0, base;//modified by Andre Cunha uint8_t *ptr; va_list ap; //memset(scratch, 0, SCRATCH); buf[0] = '\0'; // KLDEBUG - fixes subtle bug ... va_start (ap, format); for (;;) { while ((format_flag = *format++) != '%') // Until '%' or '\0' { if (!format_flag) { va_end (ap); return (0); } *buf = format_flag; buf++; *buf=0; } switch (format_flag = *format++) { case 'c': format_flag = va_arg(ap,int); default: *buf = format_flag; buf++; *buf=0; continue; case 'S': case 's': ptr = va_arg(ap,char *); strcat(buf, ptr); continue; case 'o': base = 8; *buf = '0'; buf++; *buf=0; goto CONVERSION_LOOP; case 'i': if (((int)u_val) < 0) { u_val = - u_val; *buf = '-'; buf++; *buf=0; } base = 10; goto CONVERSION_LOOP; // no break -> run into next case case 'd'://added by Andre Cunha if (((int32_t)u_val) < 0) { u_val = - u_val; *buf = '-'; buf++; *buf=0; } base = 10; goto CONVERSION_LOOP32; case 'u': base = 10; goto CONVERSION_LOOP; case 'x': base = 16; goto CONVERSION_LOOP; case 'y'://unsigned int 32 bits hexadecimal//added by Andre Cunha base = 16; goto CONVERSION_LOOP32; CONVERSION_LOOP: u_val = va_arg(ap,int); ptr = scratch + SCRATCH; *--ptr = 0; do { char ch = u_val % base + '0'; if (ch > '9') ch += 'a' - '9' - 1; *--ptr = ch; u_val /= base; } while (u_val); strcat(buf, ptr); buf += strlen(ptr); break; CONVERSION_LOOP32: u_val = va_arg(ap,int32_t); ptr = scratch + SCRATCH; *--ptr = 0; do { char ch = u_val % base + '0'; if (ch > '9') ch += 'a' - '9' - 1; *--ptr = ch; u_val /= base; } while (u_val); strcat(buf, ptr); buf += strlen(ptr); } } } #endif // PRINTFUART_ENABLED // ------------------------------------------------------------------- #endif // PRINTFUART_H tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/000077500000000000000000000000001207233610700232255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLDE_DATA.nc000066400000000000000000000010321207233610700250560ustar00rootroot00000000000000/** * NLDE-DATA * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author open-zb http://www.open-zb.net * @author Andre Cunha * */ //page 159-163 interface NLDE_DATA { command error_t request(uint16_t DstAddr, uint8_t NsduLength, uint8_t Nsdu[120], uint8_t NsduHandle, uint8_t Radius, uint8_t DiscoverRoute, uint8_t SecurityEnable); event error_t indication(uint16_t SrcAddress, uint8_t NsduLength,uint8_t Nsdu[120], uint16_t LinkQuality); event error_t confirm(uint8_t NsduHandle, uint8_t Status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_DIRECT_JOIN.nc000066400000000000000000000006121207233610700261520ustar00rootroot00000000000000/** * NLME-DIRECT-JOIN * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha */ //page 179-181 interface NLME_DIRECT_JOIN { command error_t request(uint32_t DeviceAddress0, uint32_t DeviceAddress1, CapabilityInformation); event error_t confirm(uint32_t DeviceAddress0,uint32_t DeviceAddress1, uint8_t Status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_GET.nc000066400000000000000000000005501207233610700250010ustar00rootroot00000000000000/** * NLME-GET * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 190-191 interface NLME_GET { command error_t request(uint8_t NIBAttribute); event error_t confirm(uint8_t Status, uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_JOIN.nc000066400000000000000000000011261207233610700251210ustar00rootroot00000000000000/** * NLME-JOIN * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 173-179 interface NLME_JOIN { command error_t request(uint16_t PANId, bool JoinAsRouter, bool RejoinNetwork, uint32_t ScanChannels, uint8_t ScanDuration, uint8_t PowerSource, uint8_t RxOnWhenIdle, uint8_t MACSecurity); event error_t indication(uint16_t ShortAddress, uint32_t ExtendedAddress[], uint8_t CapabilityInformation, bool SecureJoin); event error_t confirm(uint16_t PANId, uint8_t Status, uint16_t parentAddress); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_LEAVE.nc000066400000000000000000000006541207233610700252230ustar00rootroot00000000000000/** * NLME-LEAVE * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 181-184 interface NLME_LEAVE { command error_t request(uint64_t extDeviceAddress, uint8_t RemoveChildren, uint8_t MACSecurityEnable); event error_t indication(uint64_t extDeviceAddress); event error_t confirm(uint64_t extDeviceAddress, uint8_t status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_NETWORK_DISCOVERY.nc000066400000000000000000000006131207233610700271420ustar00rootroot00000000000000/* * NLME-Network-Discovery * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 164-167 interface NLME_NETWORK_DISCOVERY { command error_t request(uint32_t ScanChannels, uint8_t ScanDuration); event error_t confirm(uint8_t NetworkCount,networkdescriptor networkdescriptorlist[], uint8_t Status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_NETWORK_FORMATION.nc000066400000000000000000000011131207233610700271250ustar00rootroot00000000000000/* * NLME-NETWORK-FORMATION * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 167-169 interface NLME_NETWORK_FORMATION { command error_t request(uint8_t logicalChannel, uint8_t ScanDuration, uint8_t BeaconOrder, uint8_t SuperframeOrder, uint16_t PANId, bool BatteryLifeExtension); //command error_t request(uint32_t ScanChannels, uint8_t ScanDuration, uint8_t BeaconOrder, uint8_t SuperframeOrder, uint16_t PANId, uint8_t BatteryLifeExtension); event error_t confirm(uint8_t Status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_PERMIT_JOINING.nc000066400000000000000000000004621207233610700265410ustar00rootroot00000000000000/** * NLME-PERMIT_JOINING * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 170-171 interface NLME_PERMIT_JOINING { command error_t request(uint8_t PermitDuration); event error_t confirm(uint8_t Status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_RESET.nc000066400000000000000000000004141207233610700252430ustar00rootroot00000000000000/** * NLME-RESET * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 185-186 interface NLME_RESET { command error_t request(); event error_t confirm(uint8_t Status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_SET.nc000066400000000000000000000005501207233610700250150ustar00rootroot00000000000000/** * NLME-SET * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 191-192 interface NLME_SET { command error_t request(uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue); event error_t confirm(uint8_t Status, uint8_t NIBAttribute); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_START_ROUTER.nc000066400000000000000000000005611207233610700263610ustar00rootroot00000000000000/** * NLME-Start-Router * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * */ //page 171-173 interface NLME_START_ROUTER { command error_t request(uint8_t BeaconOrder, uint8_t SuperframeOrder, uint8_t BatteryLifeExtension,uint32_t StartTime); event error_t confirm(uint8_t Status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/interfaces/NLME_SYNC.nc000066400000000000000000000004701207233610700251370ustar00rootroot00000000000000/** * NLME-SYNC * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise * @author http://www.open-zb.net * @author Andre Cunha * * */ //page 186-189 interface NLME_SYNC { command error_t request(uint8_t Track); event error_t indication(); event error_t confirm(uint8_t Status); } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/nwk/000077500000000000000000000000001207233610700217015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/nwk/NWKC.nc000066400000000000000000000045771207233610700230020ustar00rootroot00000000000000/* * @author open-zb http://www.open-zb.net * @author Stefano Tennina */ #include #include "nwk_func.h" #include "nwk_enumerations.h" #ifdef IM_COORDINATOR #include "nwk_const_coordinator.h" #else #ifdef IM_ROUTER #include "nwk_const_router.h" #else #include "nwk_const_end_device.h" #endif #endif configuration NWKC { provides { //NLDE NWK data service interface NLDE_DATA; //NLME NWK Management service #ifdef IM_COORDINATOR interface NLME_NETWORK_FORMATION; #else interface NLME_NETWORK_DISCOVERY; #endif #ifdef IM_ROUTER interface NLME_START_ROUTER; #endif interface NLME_SYNC; // It implements both request and indication! interface NLME_JOIN; // It implements both request and indication! interface NLME_LEAVE; interface NLME_RESET; interface NLME_GET; interface NLME_SET; } } implementation { // Coordinator components MainC, LedsC, Ieee802154BeaconEnabledC as MAC; components NWKP; MainC.SoftwareInit -> NWKP; #ifdef IM_ROUTER components new PoolC(message_t, ROUTER_FRAME_POOL_SIZE) as FramePool; NWKP.FramePool -> FramePool; #endif NWKP.Leds -> LedsC; //components RandomC; //NWKP.Random -> RandomC; components RandomLfsrC; NWKP.Random -> RandomLfsrC; // Interface with MAC NWKP.MLME_RESET -> MAC; NWKP.MLME_START -> MAC; NWKP.MCPS_DATA -> MAC; NWKP.MLME_SET -> MAC; NWKP.MLME_GET -> MAC; NWKP.MLME_ASSOCIATE -> MAC; NWKP.MLME_COMM_STATUS -> MAC; NWKP.MLME_SYNC -> MAC; NWKP.MLME_SYNC_LOSS -> MAC; #ifndef IM_COORDINATOR NWKP.MLME_SCAN -> MAC; NWKP.MLME_BEACON_NOTIFY -> MAC; NWKP.MLME_DISASSOCIATE -> MAC; #endif // Packet's Types #ifndef IM_END_DEVICE NWKP.IEEE154TxBeaconPayload -> MAC; #endif NWKP.Frame -> MAC; NWKP.Packet -> MAC; #ifndef IM_COORDINATOR NWKP.BeaconFrame -> MAC; #endif //MAC interfaces Still excluded //NWKP.MLME_GTS -> MacC.MLME_GTS; //NWKP.MLME_ORPHAN->MacC.MLME_ORPHAN; // NLDE NWK data service NLDE_DATA=NWKP; //NLME NWK Management service #ifdef IM_COORDINATOR NLME_NETWORK_FORMATION=NWKP; #else NLME_NETWORK_DISCOVERY=NWKP; #endif NLME_JOIN=NWKP; #ifdef IM_ROUTER NLME_START_ROUTER=NWKP; #endif NLME_LEAVE=NWKP; NLME_RESET=NWKP; NLME_SYNC=NWKP; NLME_GET=NWKP; NLME_SET=NWKP; #if (LOG_LEVEL & TIME_PERFORMANCE) // components LocalTimeMilliC; // NWKP.LocalTime -> LocalTimeMilliC; components LocalTimeMicroC; NWKP.LocalTime -> LocalTimeMicroC; #endif } tinyos-2.1.2+dfsg/tos/lib/zigbee/clusterTree/nwk/NWKP.nc000066400000000000000000002277631207233610700230230ustar00rootroot00000000000000/* * @author open-zb http://www.open-zb.net * @author Stefano Tennina */ //#include #include "printfUART.h" #include "TKN154.h" #include "log_enable.h" #ifdef NWK_PRINTFS_ENABLED #define lclPrintf_NWK printfUART #define lclPrintf_NWK_UART_init printfUART_init #else #define lclPrintf_NWK(VAR, __format, __args...) void lclPrintf_NWK_UART_init() {} #endif #if (LOG_LEVEL & TIME_PERFORMANCE) #define START_RECORD() perLocTimeStart = call LocalTime.get() #define STOP_RECORD() perLocTime[idxPerLocTime++] = (call LocalTime.get()) - perLocTimeStart #define PRINT_RECORD() lclPrintf_NWK("Performance report (line %d)\n", __LINE__); \ for (idxPrintVector = 0; idxPrintVector as FramePool; #endif interface MLME_DISASSOCIATE; //MAC interfaces Still excluded //interface MLME_GTS; //interface MLME_ORPHAN; #if (LOG_LEVEL & TIME_PERFORMANCE) // interface LocalTime as LocalTime; interface LocalTime as LocalTime; #endif } provides { interface Init; interface NLDE_DATA; //NLME NWK Management services #ifdef IM_COORDINATOR interface NLME_NETWORK_FORMATION; #else interface NLME_NETWORK_DISCOVERY; #endif #ifdef IM_ROUTER interface NLME_START_ROUTER; #endif interface NLME_JOIN; interface NLME_LEAVE; interface NLME_SYNC; interface NLME_RESET; interface NLME_GET; interface NLME_SET; } } implementation { #if (LOG_LEVEL & TIME_PERFORMANCE) uint32_t perLocTimeStart; uint32_t perLocTime[10]; uint8_t idxPerLocTime; uint8_t idxPrintVector; #endif // Variable needed to count the beacon transmitted to implement // adaptive "timers" norace uint16_t beaconCount; // Flag to enable the count of the beacon transmitted norace bool beaconCountEnable; nwkIB nwk_IB; //uint8_t device_type = TYPE_DEVICE; /*****************************************************/ /*************Neighbourtable Variables****************/ /*****************************************************/ //neighbour table array: norace neighbortableentry neighbortable[NEIGHBOUR_TABLE_SIZE]; //number of neigbourtable entries: norace uint8_t neighbour_count /*= 0*/; //the index of the parents neighbortable entry uint8_t parent /*= 0xFF*/; // Conventional value meaning No parent now // Chosen parent by configuration (initialize to default) uint16_t myChosenParent /*= DEF_CHOSEN_PARENT*/; uint16_t myChosenParentAddress; // Depth by configuration (initialize to default) uint8_t nwkMyDepth /*= DEF_DEVICE_DEPTH*/; #ifndef IM_END_DEVICE // Flag to enable beacon payload setting bool flgSetBeaconPay; #endif /*****************************************************/ /****************ASSOCIATION Variables********************/ /*****************************************************/ //CURRENT NETWORK ADDRESS uint16_t networkaddress /*= 0x0000*/; //COORDINATOR OR ROUTER //address assignement variables uint16_t cskip /*= 0*/; uint16_t cskip_routing /*= 0*/; //current pan characteristics uint8_t beaconorder; uint8_t superframeorder; //next child router address uint16_t next_child_router_address /*= 0*/; uint8_t number_child_router /*= 0x01*/; uint8_t number_child_end_devices/*= 0x01*/; /******************************************************/ /*********NEIGHBORTABLE MANAGEMENT FUNCTIONS*********/ /******************************************************/ void init_nwkIB(); uint8_t check_neighbortableentry(uint8_t addrmode, ieee154_address_t address); ieee154_status_t add_neighbortableentry(uint16_t PAN_Id,uint64_t Extended_Address,uint16_t Network_Address,uint8_t Device_Type,uint8_t Relationship, bool force); void update_neighbortableentry (uint16_t PAN_Id,uint64_t Extended_Address,uint16_t Network_Address,uint8_t Device_Type,uint8_t Relationship); //uint8_t find_suitable_parent(); // Set the chosen parent after a successuful association uint8_t setParent(uint16_t shortAddress); // Remove the previously chosen parent entry in the table after a SYNC loss event uint8_t deleteParent(uint8_t idxParent); uint16_t Cskip(int8_t d); // d can even be -1!! uint16_t nexthopaddress(uint16_t destinationaddress,uint8_t d); #if (LOG_LEVEL & DBG_NEIGHBOR_TABLE) void list_neighbourtable(); #endif #ifndef IM_COORDINATOR // Try to randomize the association request sending by implementing // a random counter of the beacons received uint8_t randomAssociation /*= 0*/; // Maximum association trials after that join unsuccess confirm is signaled uint8_t maxAssocTrials /*= MAX_ASSOCIATION_TRIALS*/; // Association status variable norace uint8_t associationStatus /*= 0*/; // Parent address for Association request ieee154_address_t parentAssocAddress; #endif // IEEE802.15.4 Global Variables //uint8_t m_associatedToParent = FALSE; bool m_BeaconWasFound /*= FALSE*/; message_t m_frame; //bool m_dataConfirmPending = FALSE; ieee154_PANDescriptor_t m_PANDescriptor; #ifndef IM_COORDINATOR ieee154_CapabilityInformation_t m_capabilityInformation; uint32_t lclScanChannels; uint8_t lclScanduration; void scanForBeacons(uint32_t ScanChannels, uint8_t Scanduration); #endif #ifdef DEBUG_STATUS_MESSAGE void IEEE154PrintStatus(uint16_t lineno, ieee154_status_t status); // Since printfs at the scan/beacon notify/association procedure // preturb the system working status, we define here a couple of // variables to debug info in a deferred print ieee154_status_t addParentStatus[10]; uint8_t currentStatusIndex /*= 0*/; #endif task void initTask() { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NWKP Init.\n", ""); #endif nwk_IB.nwkSequenceNumber = call Random.rand16(); #ifdef DEBUG_STATUS_MESSAGE currentStatusIndex = 0; memset(addParentStatus, 0, 10*sizeof(ieee154_status_t)); #endif #if (LOG_LEVEL & TIME_PERFORMANCE) perLocTimeStart = 0; memset(perLocTime, 0, 10*sizeof(uint32_t)); idxPerLocTime = 0; idxPrintVector = 0; #endif beaconCount = 0; // Count beacon disabled by default beaconCountEnable = FALSE; /*****************************************************/ /*************Neighbourtable Variables****************/ /*****************************************************/ // Initialize the neighbor table memset(neighbortable, 0, NEIGHBOUR_TABLE_SIZE*sizeof(neighbortableentry)); //number of neigbourtable entries: neighbour_count = 0; //the index of the parents neighbortable entry parent = 0xFF; // Conventional value meaning No parent now #ifndef IM_END_DEVICE // First time beacon payload has to be set flgSetBeaconPay = TRUE; #endif /*****************************************************/ /****************ASSOCIATION Variables********************/ /*****************************************************/ //CURRENT NETWORK ADDRESS networkaddress = 0x0000; //COORDINATOR OR ROUTER //address assignement variables cskip = 0; cskip_routing = 0; //next child router address next_child_router_address = 0; number_child_router = 0x01; number_child_end_devices= 0x01; /*****************************************************/ /****************Integer Variables********************/ /*****************************************************/ #ifndef IM_COORDINATOR // Try to randomize the association request sending by implementing // a random counter of the beacons received randomAssociation = 0; // Maximum association trials after that join unsuccess confirm is signaled maxAssocTrials = MAX_ASSOCIATION_TRIALS; // Association status variable associationStatus = 0; #endif // IEEE802.15.4 Global Variables //uint8_t m_associatedToParent = FALSE; m_BeaconWasFound = FALSE; // Set device type #ifdef IM_ROUTER m_capabilityInformation.AlternatePANCoordinator = 1; m_capabilityInformation.DeviceType = 1; m_capabilityInformation.PowerSource = 0; m_capabilityInformation.ReceiverOnWhenIdle = 0; m_capabilityInformation.Reserved = 0; m_capabilityInformation.SecurityCapability = 0; m_capabilityInformation.AllocateAddress = 1; #else #ifdef IM_END_DEVICE m_capabilityInformation.AlternatePANCoordinator = 0; m_capabilityInformation.DeviceType = 0; m_capabilityInformation.PowerSource = 0; m_capabilityInformation.ReceiverOnWhenIdle = 0; m_capabilityInformation.Reserved = 0; m_capabilityInformation.SecurityCapability = 0; m_capabilityInformation.AllocateAddress = 1; #endif #endif } command error_t Init.init() { lclPrintf_NWK_UART_init();//make the possibility to print init_nwkIB(); // Initialize the seed to TOS_NODE_ID (which is the default option) call Random.setSeed(0); // Chosen parent by configuration (initialize to default) myChosenParent = DEF_CHOSEN_PARENT; myChosenParentAddress = 0xFF; // Depth by configuration (initialize to default) nwkMyDepth = DEF_DEVICE_DEPTH; post initTask(); return SUCCESS; } /*****************************************************************************************************/ /**************************************MLME-RESET*****************************************************/ /*****************************************************************************************************/ event void MLME_RESET.confirm(ieee154_status_t status) { lclPrintf_NWK("resetyouupie\n",""); #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("MLME_RESET.confirm.\n", ""); #endif #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, status); #endif signal NLME_RESET.confirm(status); } #ifndef IM_COORDINATOR task void tryAssociation() { if ( (associationStatus & IM_ASSOCIATING) == IM_ASSOCIATING ) { ieee154_status_t status; //START_RECORD(); status = call MLME_ASSOCIATE.request( m_PANDescriptor.LogicalChannel, // LogicalChannel m_PANDescriptor.ChannelPage, // ChannelPage ADDR_MODE_SHORT_ADDRESS, // CoordAddrMode MAC_PANID, // CoordPANID parentAssocAddress, // CoordAddress m_capabilityInformation, // CapabilityInformation 0 // Security ); #ifdef DEBUG_STATUS_MESSAGE // Debug status here.... addParentStatus[currentStatusIndex] = status; currentStatusIndex++; #endif } } // Scan for beacon is called by the network discovery request and // starts the scan process calling the MLME_SCAN.request void scanForBeacons(uint32_t ScanChannels, uint8_t Scanduration) { uint8_t scanDuration = Scanduration; // we only scan the single channel on which we expect the PAN coordinator ieee154_phyChannelsSupported_t channel = ((uint32_t) 1) << ScanChannels; // Initialize the flags associationStatus = IM_SCANNING; m_BeaconWasFound = FALSE; // we want to be signalled every single beacon that is received during the // channel SCAN-phase, that's why we set "macAutoRequest" to FALSE call MLME_SET.macAutoRequest(FALSE); call MLME_SCAN.request( PASSIVE_SCAN, // ScanType channel, // ScanChannels scanDuration, // ScanDuration 0x00, // ChannelPage 0, // EnergyDetectListNumEntries NULL, // EnergyDetectList 0, // PANDescriptorListNumEntries NULL, // PANDescriptorList 0 // security ); } // It asynchronously receives beacons. If in the scan time, it save information about beacon found event message_t* MLME_BEACON_NOTIFY.indication(message_t* frame) { ieee154_phyCurrentPage_t page; //networkdescriptor networkdescriptorlist; uint8_t srcBeaconDevice = COORDINATOR; #ifdef DEBUG_STATUS_MESSAGE ieee154_status_t status; #endif beaconPay_t *bcnPay; uint32_t extAddress_trial = 0; atomic { if ( (associationStatus & ASSOCIATED) == ASSOCIATED) { // We are already associated with the Parent // and just received one of its periodic beacons //call Leds.led2Toggle(); return frame; } if ( (associationStatus & IM_ASSOCIATING) == IM_ASSOCIATING ) { // Filter out the un-needed beacons (maybe it is not necessary since we should have been already sync'ed) page = call MLME_GET.phyCurrentPage(); if (call BeaconFrame.parsePANDescriptor(frame, LOGICAL_CHANNEL, page, &m_PANDescriptor) == SUCCESS) { if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS && m_PANDescriptor.CoordPANId == MAC_PANID && m_PANDescriptor.CoordAddress.shortAddress == parentAssocAddress.shortAddress ) { if (randomAssociation == 0) post tryAssociation(); else randomAssociation--; } } return frame; } if ( (associationStatus & IM_SCANNING) != IM_SCANNING ) return frame; START_RECORD(); // Executed only in scanning phase // We have received "some" beacon during the SCAN-phase, let's // check if it is the beacon from our PAN page = call MLME_GET.phyCurrentPage(); if ( SUCCESS == ( call BeaconFrame.parsePANDescriptor(frame, LOGICAL_CHANNEL, page, &m_PANDescriptor) ) ) { if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS && m_PANDescriptor.CoordPANId == MAC_PANID ) { if (m_PANDescriptor.CoordAddress.shortAddress == 0x0000) { srcBeaconDevice = COORDINATOR; //lclPrintf_NWK("found coordinator!!\n", ""); } else { srcBeaconDevice = ROUTER; //lclPrintf_NWK("found a router!!\n", ""); } // Add the parent to the neighbor table. NOTE: the extended address is not available from the Beacon. // I'm defining a different value for the extended address that can be used as a "key" to access the table extAddress_trial = ((uint32_t)(m_PANDescriptor.CoordPANId) << 16) | m_PANDescriptor.CoordAddress.shortAddress; // Children look at beacon payload bcnPay = (beaconPay_t *)(call BeaconFrame.getBeaconPayload(frame)); if (bcnPay->tosAddress != myChosenParent) { call Leds.led0Toggle(); #ifdef DEBUG_STATUS_MESSAGE // Debug status here.... addParentStatus[currentStatusIndex] = add_neighbortableentry( m_PANDescriptor.CoordPANId, extAddress_trial, m_PANDescriptor.CoordAddress.shortAddress, srcBeaconDevice, NEIGHBOR_IS_ALT_PARENT, FALSE); currentStatusIndex++; #else add_neighbortableentry( m_PANDescriptor.CoordPANId, extAddress_trial, m_PANDescriptor.CoordAddress.shortAddress, srcBeaconDevice, NEIGHBOR_IS_ALT_PARENT, FALSE); #endif STOP_RECORD(); return frame; } m_BeaconWasFound = TRUE; // yes! call Leds.led0Off(); call Leds.led1Toggle(); myChosenParentAddress = m_PANDescriptor.CoordAddress.shortAddress; // Force the neighbor table entry to be added #ifdef DEBUG_STATUS_MESSAGE // Debug status here.... addParentStatus[currentStatusIndex] = add_neighbortableentry( m_PANDescriptor.CoordPANId, extAddress_trial, m_PANDescriptor.CoordAddress.shortAddress, srcBeaconDevice, NEIGHBOR_IS_ALT_PARENT, TRUE); currentStatusIndex++; #else add_neighbortableentry( m_PANDescriptor.CoordPANId, extAddress_trial, m_PANDescriptor.CoordAddress.shortAddress, srcBeaconDevice, NEIGHBOR_IS_ALT_PARENT, TRUE); #endif } } STOP_RECORD(); } return frame; } // This is activated at the end of the scan process. // It is linked to the beacon notify to check if during the scan we get the expected beacon or not event void MLME_SCAN.confirm( ieee154_status_t status, uint8_t ScanType, uint8_t ChannelPage, uint32_t UnscannedChannels, uint8_t EnergyDetectListNumEntries, int8_t* EnergyDetectList, uint8_t PANDescriptorListNumEntries, ieee154_PANDescriptor_t* PANDescriptorList ) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("MLME_SCAN.confirm\n", ""); #endif #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, status); #endif PRINT_RECORD(); if (m_BeaconWasFound) { atomic { // our candidate parent is out there sending beacons // Now we have a choice: // 1. signaling a discovery confirm and start the association after a join request, or // 2. avoid this signal and directly try to associate, issuing directly a JOIN confirm // after the successful association // Go for OPTION 2 // Force the topology to the one preplanned!! parentAssocAddress.shortAddress = myChosenParentAddress; // let's try to associate with it call MLME_SET.macCoordShortAddress(parentAssocAddress.shortAddress); call MLME_SET.macPANId(m_PANDescriptor.CoordPANId); call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE); // Try association after "randomAssociation" beacons randomAssociation = OFFSET_BCN_COUNTER + ((call Random.rand16()) % MAX_RANDOM_BCN_COUNTER); call Leds.led1On(); associationStatus = IM_ASSOCIATING; #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("randomAssociation %d\n", (uint32_t)randomAssociation); #endif } } else { // Not got it. Retry!! scanForBeacons(lclScanChannels, lclScanduration); } } #endif // #ifndef IM_COORDINATOR /*****************************************************************************************************/ /**************************************MLME-ASSOCIATE*************************************************/ /*****************************************************************************************************/ event void MLME_ASSOCIATE.confirm( uint16_t assocShortAddress, uint8_t status, ieee154_security_t *security ) { #ifndef IM_COORDINATOR #ifdef DEBUG_STATUS_MESSAGE uint8_t idxParent; IEEE154PrintStatus(__LINE__, status); for (idxParent=0; idxParent child communication must be enabled call MLME_SET.macAutoRequest(TRUE); associationStatus = ASSOCIATED; // Set my local address call MLME_SET.macShortAddress(assocShortAddress); networkaddress = assocShortAddress; // Set my parent //lclPrintf_NWK("Setting parent 0x%x\n", m_PANDescriptor.CoordAddress.shortAddress); parent = setParent(parentAssocAddress.shortAddress); #if (LOG_LEVEL & ERROR_CONDITIONS) if (parent == 0xFF) { // Device not found in the table lclPrintf_NWK("Parent not found in the table\n", ""); #if (LOG_LEVEL & DBG_NEIGHBOR_TABLE) list_neighbourtable(); #endif } #endif } call Leds.led0Off(); call Leds.led1Off(); // Signal the confirmation of the ASSOCIATION/JOIN process signal NLME_JOIN.confirm(MAC_PANID, NWK_SUCCESS, parentAssocAddress.shortAddress); } else { #if (MAX_ASSOCIATION_TRIALS==0) // Retry infinitely after "randomAssociation" beacons randomAssociation = (call Random.rand16()) % MAX_RANDOM_BCN_COUNTER; // Refresh the association status (might be useless...) associationStatus = IM_ASSOCIATING; #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("randomAssociation %d\n", (uint32_t)randomAssociation); #endif #else // Try a finite number of times if (maxAssocTrials == 0) { // Signal join unsuccessfull to upper level signal NLME_JOIN.confirm(MAC_PANID, NWK_STARTUP_FAILURE, parentAssocAddress.shortAddress); // Reset association trials counter maxAssocTrials = MAX_ASSOCIATION_TRIALS; // Reset association status associationStatus = 0; } else { maxAssocTrials--; // Retry after "randomAssociation" beacons randomAssociation = (call Random.rand16()) % MAX_RANDOM_BCN_COUNTER; // Refresh the association status (might be useless...) associationStatus = IM_ASSOCIATING; #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("randomAssociation %d\n", (uint32_t)randomAssociation); #endif } #endif } #endif } event void MLME_ASSOCIATE.indication( uint64_t deviceAddress, ieee154_CapabilityInformation_t capabilityInformation, ieee154_security_t *security ) { #ifndef IM_END_DEVICE uint8_t cindex = 0xFF; ieee154_address_t address; #ifdef DEBUG_STATUS_MESSAGE //ieee154_status_t status; #endif atomic { address.extendedAddress = deviceAddress; // Check the neighbour table cindex = check_neighbortableentry(ADDR_MODE_EXTENDED_ADDRESS, address); if( cindex != 0xFF ) { #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("Device already present. Confirming address: 0x%x\n", neighbortable[cindex].Network_Address); #endif call MLME_ASSOCIATE.response( deviceAddress, neighbortable[cindex].Network_Address, IEEE154_ASSOCIATION_SUCCESSFUL, 0 ); return; } if(nwk_IB.nwkAvailableAddresses == 0) { // If there are no available addresses the coordinator/router // shall not respond to the association request call MLME_ASSOCIATE.response( deviceAddress, 0xFFFF, IEEE154_PAN_AT_CAPACITY, 0 ); #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("nwk_IB.nwkAvailableAddresses = 0\n", ""); #endif // Terminate immediately return; } //verify if the device is associating as a router (FFD) or an end device (RFD) if ( capabilityInformation.DeviceType == 1 ) { if (number_child_router > 1 + MAXROUTERS) { // number_child_router starts from 1 instead of 0 due to cskip mechanism // If there are no available addresses the coordinator/router shall not respond to the association request call MLME_ASSOCIATE.response( deviceAddress, 0xFFFF, IEEE154_PAN_AT_CAPACITY, 0 ); #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("number_child_router (%d) > MAXROUTERS\n",(uint32_t)number_child_router); #endif // Terminate immediately return; } //add ROUTER to the neighbour table #ifndef DEBUG_STATUS_MESSAGE add_neighbortableentry( MAC_PANID, deviceAddress, next_child_router_address, ROUTER, NEIGHBOR_IS_CHILD, FALSE); #else IEEE154PrintStatus(__LINE__, add_neighbortableentry( MAC_PANID, deviceAddress, next_child_router_address, ROUTER, NEIGHBOR_IS_CHILD, FALSE)); #endif #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("It's a router: sending address: 0x%x\n",next_child_router_address); #endif //send response, this shall lead to confirm in child device call MLME_ASSOCIATE.response( deviceAddress, next_child_router_address, IEEE154_ASSOCIATION_SUCCESSFUL, 0 ); // Compute the next address next_child_router_address = networkaddress + ((number_child_router-1) * cskip) +1 ; // Increment the number of associated routers number_child_router++; // Decrese the number of available addresses nwk_IB.nwkAvailableAddresses--; //lclPrintf_NWK("Dn_cr %x\n",next_child_router_address); // Terminate immediately return; } // Verify if its possible to associate children in the address space // The number of end devices musts be > to maximum children minus maximum routers if (number_child_end_devices > 1 + (MAXCHILDREN - (number_child_router-1))) { // Both number_child_end_devices and number_child_router start // from 1 instead of 0 due to cskip mechanism //if there are no available addresses the coordinator/router shall not respond to the association request call MLME_ASSOCIATE.response( deviceAddress, 0xFFFF, IEEE154_PAN_AT_CAPACITY, 0 ); #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("number_child_end_devices (%d) > 1 + (MAXCHILDREN - (number_child_router (%d) - 1))\n", (uint32_t)number_child_end_devices, (uint32_t)number_child_router); #endif // Terminate immediately return; } //add END_DEVICE to the neighbour table #ifndef DEBUG_STATUS_MESSAGE add_neighbortableentry( MAC_PANID, deviceAddress, nwk_IB.nwkNextAddress, END_DEVICE, NEIGHBOR_IS_CHILD, FALSE); #else IEEE154PrintStatus(__LINE__, add_neighbortableentry( MAC_PANID, deviceAddress, nwk_IB.nwkNextAddress, END_DEVICE, NEIGHBOR_IS_CHILD, FALSE)); #endif #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("It's an end_device: sending address: 0x%x\n", nwk_IB.nwkNextAddress); #endif //send response, this shall lead to confirm in child device call MLME_ASSOCIATE.response( deviceAddress, nwk_IB.nwkNextAddress, IEEE154_ASSOCIATION_SUCCESSFUL, 0 ); // Compute next address nwk_IB.nwkNextAddress = nwk_IB.nwkNextAddress + nwk_IB.nwkAddressIncrement; // Increment the number of associated end devices number_child_end_devices++; // Decrese the number of available addresses nwk_IB.nwkAvailableAddresses--; } #endif } /*****************************************************************************************************/ /**************************************MLME-START*****************************************************/ /*****************************************************************************************************/ event void MLME_START.confirm(ieee154_status_t status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("MLME_START.confirm.\n", ""); #endif #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, status); #endif if (status != IEEE154_SUCCESS) call MLME_RESET.request(TRUE); else { #ifdef IM_COORDINATOR signal NLME_NETWORK_FORMATION.confirm(status); #else #ifdef IM_ROUTER if ( (associationStatus & ASSOCIATED) == ASSOCIATED ) signal NLME_START_ROUTER.confirm(status); #endif #endif } } #ifdef IM_COORDINATOR /*************************************************************/ /******************NLME - NETWORK - FORMATION*****************/ /*************************************************************/ //This primitive allows the NHL to request to start a ZigBee network with itself as the coordinator //Page 167-169 command error_t NLME_NETWORK_FORMATION.request(uint8_t logicalChannel, uint8_t ScanDuration, uint8_t BeaconOrder, uint8_t SuperframeOrder, uint16_t PANId, bool BatteryLifeExtension) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLME_NETWORK_FORMATION.request.\n", ""); #endif // COORDINATOR OR ROUTER // Reset address assignement variables // next child router address number_child_router = 0x01; number_child_end_devices= 0x01; //******************************************************* //***********SET PAN VARIABLES*************************** //depth = 0; // The depth for the coordinator is 0 by default nwk_IB.nwkAvailableAddresses = AVAILABLEADDRESSES; nwk_IB.nwkAddressIncrement = ADDRESSINCREMENT; nwk_IB.nwkMaxChildren = MAXCHILDREN; //number of children a device is allowed to have on its current network nwk_IB.nwkMaxDepth = MAXDEPTH; //the depth a device can have nwk_IB.nwkMaxRouters = MAXROUTERS; cskip = Cskip(nwkMyDepth); cskip_routing = Cskip(nwkMyDepth - 1); nwk_IB.nwkNextAddress = networkaddress + (cskip * nwk_IB.nwkMaxRouters) + nwk_IB.nwkAddressIncrement; next_child_router_address = networkaddress +((number_child_router-1) * cskip) + 1; number_child_router++; // Start the Coordinator call MLME_SET.macShortAddress(0x0000); call MLME_SET.macAssociationPermit(TRUE); #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, call MLME_START.request( PANId, // PANId logicalChannel, // LogicalChannel 0, // ChannelPage, 0, // StartTime, BeaconOrder, // BeaconOrder SuperframeOrder,// SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity )); #else call MLME_START.request( PANId, // PANId logicalChannel, // LogicalChannel 0, // ChannelPage, 0, // StartTime, BeaconOrder, // BeaconOrder SuperframeOrder,// SuperframeOrder TRUE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity ); #endif return SUCCESS; } #endif #ifndef IM_COORDINATOR /*************************************************************/ /***************NLME - NETWORK - DISCOVERY *******************/ /*************************************************************/ //This primitive allows the next higher layer to request that the NWK layer discover networks currently operating within the POS. //p164 and 210 command error_t NLME_NETWORK_DISCOVERY.request(uint32_t ScanChannels, uint8_t Scanduration) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLME_NETWORK_DISCOVERY.request.\n", ""); #endif // Store scan parameters for future retries lclScanChannels = ScanChannels; lclScanduration = Scanduration; scanForBeacons(ScanChannels, Scanduration); return SUCCESS; } #endif /** * The MLME-SAP communication status primitive defines how the MLME * communicates to the next higher layer about transmission status, * when the transmission was INSTIGATED by a RESPONSE PRIMITIVE, and * about security errors on incoming packets. (IEEE 802.15.4-2006, * Sect. 7.1.12) */ // In our case, security is disabled and the only response primitive is issued // by the MLME_ASSOCIATE interface!! event void MLME_COMM_STATUS.indication ( uint16_t PANId, uint8_t SrcAddrMode, ieee154_address_t SrcAddr, uint8_t DstAddrMode, ieee154_address_t DstAddr, ieee154_status_t status, ieee154_security_t *security ) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("MLME_COMM_STATUS.indication.\n", ""); #endif #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, status); #endif if (status == IEEE154_SUCCESS){ call Leds.led0Off(); #ifndef IM_END_DEVICE signal NLME_JOIN.indication(0, 0, 0, 0); #endif } else { call Leds.led0On(); } } /*************************************************************/ /************************NLME - JOIN**************************/ /*************************************************************/ //This primitive allows the NHL to request to join a network through association. //p173 and 210 // Used only if MAX_ASSOCIATION_TRIALS > 0, since the association // request is automatically repeated in case of failure after the scan process command error_t NLME_JOIN.request(uint16_t PANId, bool JoinAsRouter, bool RejoinNetwork, uint32_t ScanChannels, uint8_t ScanDuration, uint8_t PowerSource, uint8_t RxOnWhenIdle, uint8_t MACSecurity) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLME_JOIN.request.\n", ""); #endif #ifndef IM_COORDINATOR atomic { if ( (associationStatus & ASSOCIATED) != ASSOCIATED ) { // Try or Retry association after "randomAssociation" beacons randomAssociation = OFFSET_BCN_COUNTER + ((call Random.rand16()) % MAX_RANDOM_BCN_COUNTER); // Refresh the association status (might be useless...) associationStatus = IM_ASSOCIATING; #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("randomAssociation %d\n", (uint32_t)randomAssociation); #endif } } #endif return SUCCESS; } /*************************************************************/ /*************************NLDE - DATA*************************/ /*************************************************************/ //This primitive requests the transfer of a data PDU //page 159-161 command error_t NLDE_DATA.request(uint16_t DstAddr, uint8_t NsduLength, uint8_t Nsdu[120], uint8_t NsduHandle, uint8_t Radius, uint8_t DiscoverRoute, uint8_t SecurityEnable) { //prefixed size because the devices reset itself when there is an error in the length routing_fields *routing_fields_ptr; uint8_t m_payloadLen = 0; // Pointer for using payload for IEEE802.15.4 TKN MAC uint8_t *p; // Destination Address for IEEE802.15.4 TKN MAC ieee154_address_t deviceShortAddress; // QoS Required from the packet uint8_t MAC_QoS = 0; #ifndef IM_END_DEVICE uint8_t next_hop_index; #endif #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLDE_DATA.request. DstAddr: 0x%x\n", DstAddr); #endif #if (LOG_LEVEL & DBG_NEIGHBOR_TABLE) // Print actual neighbor table list_neighbourtable(); #endif #ifndef IM_COORDINATOR if ( (associationStatus & ASSOCIATED) != ASSOCIATED ) { #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("NLDE_DATA.request - NWK_INVALID_REQUEST\n", ""); #endif signal NLDE_DATA.confirm(NsduHandle, NWK_INVALID_REQUEST); return FAIL; } #endif // Create Payload m_payloadLen = (NsduLength + sizeof(routing_fields)); p = call Packet.getPayload(&m_frame, m_payloadLen); if (p != NULL) { atomic { // Try to simplify/speed up this process copying directly // into the packet routing_fields_ptr = (routing_fields *)p; routing_fields_ptr->frame_control = set_route_frame_control(0x00,0x01,DiscoverRoute,SecurityEnable); routing_fields_ptr->destination_address = DstAddr; routing_fields_ptr->source_address = networkaddress; routing_fields_ptr->radius = Radius; routing_fields_ptr->sequence_number = nwk_IB.nwkSequenceNumber; nwk_IB.nwkSequenceNumber = (nwk_IB.nwkSequenceNumber+1) % 0xFF; memcpy(&(p[sizeof(routing_fields)]), Nsdu, NsduLength*sizeof(uint8_t)); } } else { #if (LOG_LEVEL & ERROR_CONDITIONS) // Some feedback on this lclPrintf_NWK("NLDE_DATA.request - Packet.getPayload fails\n", ""); #endif return FAIL; } #if (LOG_LEVEL & DBG_CUSTOM) //lclPrintf_NWK("Sending message. Payload lenght: 0x%x\n", m_payloadLen); //for (i=0; idestination_address: 0x%x\n", routing_fields_ptr->destination_address); #endif #ifdef IM_END_DEVICE // The end device always sends the message to the parent only deviceShortAddress.shortAddress = neighbortable[parent].Network_Address; // destination #else // Send message if the device is the COORDINATOR or a ROUTER if (routing_fields_ptr->destination_address == 0xFFFF) { // This is a broadcast packet. deviceShortAddress.shortAddress = 0xFFFF; // destination } else if( (networkaddress < routing_fields_ptr->destination_address) && (routing_fields_ptr->destination_address < (networkaddress + cskip_routing ) ) ) { // Route down to appropriate child // Temporarily use that variable to store the intended ultimate destination address deviceShortAddress.shortAddress = routing_fields_ptr->destination_address; // Check if destination is one of my children next_hop_index = check_neighbortableentry(ADDR_MODE_SHORT_ADDRESS, deviceShortAddress); if (next_hop_index == 0xFF) { // Destination is not my child deviceShortAddress.shortAddress = nexthopaddress(routing_fields_ptr->destination_address, nwkMyDepth); } else { // I'm routing to my child deviceShortAddress.shortAddress = neighbortable[next_hop_index].Network_Address; } #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("Sending data down\n", ""); #endif } else { // Route up to parent deviceShortAddress.shortAddress = neighbortable[parent].Network_Address; #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("Sending data up\n", ""); #endif } #endif #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("Sending data to 0x%x\n", deviceShortAddress.shortAddress); #endif // Send Message call Frame.setAddressingFields( &m_frame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, MAC_PANID, // DstPANId, &deviceShortAddress, // DstAddr, NULL // security ); #ifdef IM_COORDINATOR // The coordinator musts put INDIRECT as a TX option MAC_QoS = TX_OPTIONS_INDIRECT; #endif // Request ACK by default. If broadcast packet, then this setting // is automathically ignored at the MAC level MAC_QoS |= TX_OPTIONS_ACK; #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("MAC_QoS 0x%x\n", MAC_QoS); lclPrintf_NWK("Sending data to 0x%x\n", deviceShortAddress.shortAddress); #endif #ifndef DEBUG_STATUS_MESSAGE call MCPS_DATA.request( &m_frame, // msdu, m_payloadLen, // payloadLength, NsduHandle, // msduHandle, MAC_QoS // TxOptions, ); #else IEEE154PrintStatus(__LINE__, call MCPS_DATA.request( &m_frame, // msdu, m_payloadLen, // payloadLength, NsduHandle, // msduHandle, MAC_QoS // TxOptions, )); #endif return SUCCESS; } /*****************************************************************************************************/ /*****************************************************************************************************/ /********************* MCPS EVENTS **************************************/ /*****************************************************************************************************/ /*****************************************************************************************************/ /*****************************************************************************************************/ /********************* MCPS-DATA **************************************/ /*****************************************************************************************************/ event message_t* MCPS_DATA.indication(message_t* rcvdFrame) { #ifdef IM_ROUTER message_t* returnFrame; ieee154_address_t deviceShortAddress; uint8_t next_hop_index; uint8_t MAC_QoS; #endif uint8_t rxPayloadLen = call Frame.getPayloadLength(rcvdFrame); uint8_t* rxPayload = call Frame.getPayload(rcvdFrame); uint16_t mpduLinkQuality = call Frame.getLinkQuality(rcvdFrame); //uint8_t i = 0; routing_fields *routing_fields_ptr; routing_fields_ptr = (routing_fields *)rxPayload; #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("MCPS_DATA.indication.\n", ""); #endif // Safety check on the payload length if (rxPayloadLen < sizeof(routing_fields)) { #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("MCPS_DATA.indication %d: Received a bad packet.. discarding it \n", __LINE__); #endif return rcvdFrame; } #ifndef IM_COORDINATOR // If the node is not connected to a parent, // discard the packet received if ( (associationStatus & ASSOCIATED) != ASSOCIATED ) { #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("MCPS_DATA.indication %d: Not associated.. discarding packet \n", __LINE__); #endif return rcvdFrame; } #endif if ( routing_fields_ptr->destination_address == networkaddress || routing_fields_ptr->destination_address == 0xFFFF ) { uint8_t payload[120]; atomic { memset(payload, 0, 120*sizeof(uint8_t)); // I am the final destination or in the "destination (broadcast) group" #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("MCPS_DATA.indication. I am the destination\n", ""); #endif memcpy(payload,&(rxPayload[sizeof(routing_fields)]),(rxPayloadLen-sizeof(routing_fields))*sizeof(uint8_t)); //pass data up to APP layer signal NLDE_DATA.indication(routing_fields_ptr->source_address, (uint8_t)(rxPayloadLen-sizeof(routing_fields)), payload, mpduLinkQuality); } return rcvdFrame; } //I am not the destination: must forward this packet //lclPrintf_NWK("I am NOT the destination. Packet to forward\n", ""); #ifndef IM_ROUTER #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("I'm not a router. Check this!!\n", ""); #endif return rcvdFrame; #else // The message should be forwarded // Since this event handler has to return a frame buffer to the MAC, // we don't want to return "receivedFrame", because we will try // to forward that. Instead we get an "empty" // frame through the PoolC component and return that to the MAC. returnFrame = call FramePool.get(); if (returnFrame == NULL) { #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("no empty frame left!\n", ""); #endif return rcvdFrame; // no empty frame left! } // Act as usual forwarding the packet along the tree if( (networkaddress < routing_fields_ptr->destination_address) && (routing_fields_ptr->destination_address < (networkaddress + cskip_routing ) ) ) { #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("route down to appropriate child\n", ""); #endif MAC_QoS = TX_OPTIONS_INDIRECT | TX_OPTIONS_ACK; // Temporarily use that variable to store the intended ultimate destination address deviceShortAddress.shortAddress = (uint16_t)routing_fields_ptr->destination_address; //check if destination is one of my children next_hop_index = check_neighbortableentry(ADDR_MODE_SHORT_ADDRESS, deviceShortAddress); if (next_hop_index == 0xFF) { //destination is not my child deviceShortAddress.shortAddress = nexthopaddress(routing_fields_ptr->destination_address, nwkMyDepth); } else { //Im routing to my child deviceShortAddress.shortAddress = neighbortable[next_hop_index].Network_Address; } } else { //route up to the parent #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("route up to the parent\n", ""); #endif deviceShortAddress.shortAddress = neighbortable[parent].Network_Address; MAC_QoS = TX_OPTIONS_ACK; } // to forward the frame we update the addressing part // The payload part remains unchanged call Frame.setAddressingFields( rcvdFrame, ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode, ADDR_MODE_SHORT_ADDRESS, // DstAddrMode, MAC_PANID, // DstPANId, &deviceShortAddress, // DstAddr, NULL // security ); // Forward the received Message #ifndef DEBUG_STATUS_MESSAGE call MCPS_DATA.request( rcvdFrame, // msdu, rxPayloadLen, // payloadLength, 0, // msduHandle, MAC_QoS // TxOptions ); #else IEEE154PrintStatus(__LINE__, call MCPS_DATA.request( rcvdFrame, // msdu, rxPayloadLen, // payloadLength, 0, // msduHandle, MAC_QoS // TxOptions )); #endif // Return the empty frame to the MAC return returnFrame; #endif // ifndef IM_ROUTER else branch } event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t timestamp ) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("MCPS_DATA.confirm.\n", ""); #endif #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, status); #endif #ifdef IM_ROUTER // Since the MCPS_DATA.indication event handler has to return a frame buffer to the MAC // we put an "empty" frame through the PoolC component to be used in the MCPS_DATA.indication. call FramePool.put(msg); #endif signal NLDE_DATA.confirm(msduHandle,status); } #ifdef IM_ROUTER /*************************************************************/ /*******************NLME - START - ROUTER*********************/ /*************************************************************/ //This primitive allows the NHL of a ZigBee Router to initialize or change its superframe configuration. //p171 and 210 command error_t NLME_START_ROUTER.request(uint8_t BeaconOrder, uint8_t SuperframeOrder, bool BatteryLifeExtension,uint32_t StartTime) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLME_START_ROUTER.request. StartTime: 0x%x\n", StartTime); #endif //assign current BO and SO beaconorder = BeaconOrder; superframeorder = SuperframeOrder; // Reset address assignement variables (this is for the beginning // or after a beacon loss and restart) // next child router address number_child_router = 0x01; number_child_end_devices= 0x01; //******************************************************* //***********SET PAN VARIABLES*************************** nwk_IB.nwkAvailableAddresses = AVAILABLEADDRESSES; nwk_IB.nwkAddressIncrement = ADDRESSINCREMENT; nwk_IB.nwkMaxChildren = MAXCHILDREN; //number of children a device is allowed to have on its current network nwk_IB.nwkMaxDepth = MAXDEPTH; //the depth a device can have nwk_IB.nwkMaxRouters = MAXROUTERS; cskip = Cskip(nwkMyDepth); cskip_routing = Cskip(nwkMyDepth - 1); nwk_IB.nwkNextAddress = networkaddress + (cskip * nwk_IB.nwkMaxRouters) + nwk_IB.nwkAddressIncrement; next_child_router_address = networkaddress +((number_child_router-1) * cskip) + 1; number_child_router++; #if (LOG_LEVEL & DBG_CUSTOM) lclPrintf_NWK("TOS_NODE_ID %d\n", (uint32_t)TOS_NODE_ID); lclPrintf_NWK("nwkMyDepth %d\n", (uint32_t)nwkMyDepth); //lclPrintf_NWK("nwkMyDepth %d\n", (uint32_t)nwkMyDepth); //lclPrintf_NWK("cskip %d\n", (uint32_t)cskip); //lclPrintf_NWK("C %d D %d r %d\n", (uint32_t)MAXCHILDREN, (uint32_t)MAXDEPTH, (uint32_t)MAXROUTERS); #endif call MLME_SET.macAssociationPermit(TRUE); #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, call MLME_START.request( MAC_PANID, // PANId LOGICAL_CHANNEL, // LogicalChannel 0, // ChannelPage, StartTime, // StartTime, BeaconOrder, // BeaconOrder SuperframeOrder, // SuperframeOrder FALSE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity )); #else call MLME_START.request( MAC_PANID, // PANId LOGICAL_CHANNEL, // LogicalChannel 0, // ChannelPage, StartTime, // StartTime, BeaconOrder, // BeaconOrder SuperframeOrder, // SuperframeOrder FALSE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity ); #endif return SUCCESS; } #endif /*****************************************************************************************************/ /**************************************MLME-SYNC-LOSS*************************************************/ /*****************************************************************************************************/ event void MLME_SYNC_LOSS.indication( ieee154_status_t lossReason, uint16_t PANId, uint8_t LogicalChannel, uint8_t ChannelPage, ieee154_security_t *security ) { #ifndef IM_COORDINATOR #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("MLME_SYNC_LOSS.indication.\n", ""); #endif #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, lossReason); #endif #ifdef IM_ROUTER // We have lost track of our Parent's beacons :( // We stop sending our own beacons, until we have synchronized with // the Parent again. if (lossReason == IEEE154_BEACON_LOSS) { call Leds.led2Off(); // Reset the sending beacons call MLME_START.request( MAC_PANID, // PANId LOGICAL_CHANNEL, // LogicalChannel 0, // ChannelPage, 0, // StartTime, 15, // BeaconOrder 15, // SuperframeOrder FALSE, // PANCoordinator FALSE, // BatteryLifeExtension FALSE, // CoordRealignment 0, // CoordRealignSecurity 0 // BeaconSecurity ); } // Block temporarily the association // mechanism from other nodes call MLME_SET.macAssociationPermit(FALSE); #endif // Remove the current parent from the neighbor table parent = deleteParent(parent); // Signal this to the Adaptation Layer to be instructed that // a new association is necessary and send again position info signal NLME_SYNC.indication(); // If the sync loss is *not* on purpose ... if ( (associationStatus & DISASSOCIATED) != DISASSOCIATED) { // ... restart automatically from the scan channels scanForBeacons(lclScanChannels, lclScanduration); } #endif // #ifndef IM_COORDINATOR } #ifndef IM_COORDINATOR task void tryDisassociation() { call MLME_DISASSOCIATE.request ( ADDR_MODE_SHORT_ADDRESS, MAC_PANID, parentAssocAddress, IEEE154_DEVICE_WISHES_TO_LEAVE, 1, 0); } #endif /*************************************************************/ /************************NLME - LEAVE*************************/ /*************************************************************/ //This primitive allows the NWK to request that it or another device leaves the network //page 181-183 command error_t NLME_LEAVE.request(uint64_t extDeviceAddress, bool RemoveChildren, bool MACSecurityEnable) { #ifndef IM_COORDINATOR if (!RemoveChildren) post tryDisassociation(); #endif return SUCCESS; } /*****************************************************************************************************/ /**************************************MLME-DISASSOCIATE**********************************************/ /*****************************************************************************************************/ event void MLME_DISASSOCIATE.confirm ( ieee154_status_t status, uint8_t DeviceAddrMode, uint16_t DevicePANID, ieee154_address_t DeviceAddress ) { uint64_t address; #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("MLME_DISASSOCIATE.confirm.\n", ""); #endif #ifdef DEBUG_STATUS_MESSAGE IEEE154PrintStatus(__LINE__, status); #endif switch (DeviceAddrMode) { case ADDR_MODE_SHORT_ADDRESS: address = (uint64_t)(DeviceAddress.shortAddress); break; case ADDR_MODE_EXTENDED_ADDRESS: address = DeviceAddress.extendedAddress; break; default: // Something strange happens #if (LOG_LEVEL & ERROR_CONDITIONS) lclPrintf_NWK("MLME_DISASSOCIATE.confirm. DeviceAddrMode (0x%x) not recognized\n", DeviceAddrMode); #endif break; } if (status == IEEE154_SUCCESS) { #ifndef IM_COORDINATOR // Association status variable set to disassociate to prevent // a new automatic association tentative after the sync loss event associationStatus = DISASSOCIATED; #endif signal NLME_LEAVE.confirm(address, NWK_SUCCESS); } else { signal NLME_LEAVE.confirm(address, NWK_LEAVE_UNCONFIRMED); } } event void MLME_DISASSOCIATE.indication ( uint64_t DeviceAddress, ieee154_disassociation_reason_t DisassociateReason, ieee154_security_t *security ) { #if (LOG_LEVEL & TRACE_FUNC) switch (DisassociateReason) { case IEEE154_COORDINATOR_WISHES_DEVICE_TO_LEAVE: lclPrintf_NWK("MLME_DISASSOCIATE.indication. IEEE154_COORDINATOR_WISHES_DEVICE_TO_LEAVE\n", ""); break; case IEEE154_DEVICE_WISHES_TO_LEAVE: lclPrintf_NWK("MLME_DISASSOCIATE.indication. IEEE154_DEVICE_WISHES_TO_LEAVE\n", ""); break; } #endif #ifndef IM_COORDINATOR if (DisassociateReason == IEEE154_COORDINATOR_WISHES_DEVICE_TO_LEAVE) { // Association status variable set to disassociate to prevent // a new automatic association tentative after the sync loss event associationStatus = DISASSOCIATED; } #endif signal NLME_LEAVE.indication(DeviceAddress); } /*************************************************************/ /*******************NLME IMPLEMENTATION***********************/ /*************************************************************/ /************************************************************* ******************* NLME-RESET******************************** **************************************************************/ command error_t NLME_RESET.request() { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLME_RESET.request.\n", ""); #endif call MLME_RESET.request(TRUE); return SUCCESS; } /*************************************************************/ /************************NLME - SYNC**************************/ /*************************************************************/ //This primitive allows the NHL to synchronize or extract data from its ZigBee coordinator or router //page 186-187 command error_t NLME_SYNC.request(bool Track) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLME_SYNC.request. Track: 0x%x\n", Track); #endif call MLME_SYNC.request(LOGICAL_CHANNEL, 0, Track); return SUCCESS; } /*************************************************************/ /***************** NLME-SET ********************/ /*************************************************************/ command error_t NLME_SET.request(uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLME_SET.request. NIBAttribute: 0x%x\n", NIBAttribute); #endif atomic{ switch(NIBAttribute) { case NWKSEQUENCENUMBER : nwk_IB.nwkSequenceNumber = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkSequenceNumber: %x\n",nwk_IB.nwkSequenceNumber); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKPASSIVEACKTIMEOUT : nwk_IB.nwkPassiveAckTimeout = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkPassiveAckTimeout: %x\n",nwk_IB.nwkPassiveAckTimeout); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKMAXBROADCASTRETRIES : nwk_IB.nwkMaxBroadcastRetries = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkMaxBroadcastRetries: %x\n",nwk_IB.nwkMaxBroadcastRetries); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKMAXCHILDREN : nwk_IB.nwkMaxChildren = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkMaxChildren: %x\n",nwk_IB.nwkMaxChildren); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKMAXDEPTH : nwk_IB.nwkMaxDepth = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkMaxDepth: %x\n",nwk_IB.nwkMaxDepth); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKMAXROUTERS : nwk_IB.nwkMaxRouters = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkMaxRouters: %x\n",nwk_IB.nwkMaxRouters); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKMETWORKBROADCASTDELIVERYTIME : nwk_IB.nwkNetworkBroadcastDeliveryTime = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkNetworkBroadcastDeliveryTime: %x\n",nwk_IB.nwkNetworkBroadcastDeliveryTime); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKREPORTCONSTANTCOST : nwk_IB.nwkReportConstantCost = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkReportConstantCost: %x\n",nwk_IB.nwkReportConstantCost); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKROUTEDISCOVERYRETRIESPERMITED : nwk_IB.nwkRouteDiscoveryRetriesPermitted = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkRouteDiscoveryRetriesPermitted: %x\n",nwk_IB.nwkRouteDiscoveryRetriesPermitted); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKSYMLINK : nwk_IB.nwkSymLink = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkSymLink: %x\n",nwk_IB.nwkSymLink); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKCAPABILITYINFORMATION : nwk_IB.nwkCapabilityInformation = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkCapabilityInformation: %x\n",nwk_IB.nwkCapabilityInformation); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKUSETREEADDRALLOC : nwk_IB.nwkUseTreeAddrAlloc = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkUseTreeAddrAlloc: %x\n",nwk_IB.nwkUseTreeAddrAlloc); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKUSETREEROUTING : nwk_IB.nwkUseTreeRouting = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkUseTreeRouting: %x\n",nwk_IB.nwkUseTreeRouting); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKNEXTADDRESS : nwk_IB.nwkNextAddress = NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkNextAddress: %x\n",nwk_IB.nwkNextAddress); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKAVAILABLEADDRESSES : nwk_IB.nwkAvailableAddresses = NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkAvailableAddresses: %x\n",nwk_IB.nwkAvailableAddresses); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKADDRESSINCREMENT : nwk_IB.nwkAddressIncrement =NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkAddressIncrement: %x\n",nwk_IB.nwkAddressIncrement); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; case NWKTRANSACTIONPERSISTENCETIME : nwk_IB.nwkTransactionPersistenceTime = (uint8_t) NIBAttributeValue; //////lclPrintf_NWK("nwk_IB.nwkTransactionPersistenceTime: %x\n",nwk_IB.nwkTransactionPersistenceTime); signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute); break; default: signal NLME_SET.confirm(NWK_UNSUPPORTED_ATTRIBUTE,NIBAttribute); break; } } return SUCCESS; } /*************************************************************/ /***************** NLME-GET ********************/ /*************************************************************/ command error_t NLME_GET.request(uint8_t NIBAttribute) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("NLME_GET.request. NIBAttribute: 0x%x\n", NIBAttribute); #endif switch(NIBAttribute) { case NWKSEQUENCENUMBER : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkSequenceNumber); break; case NWKPASSIVEACKTIMEOUT : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkPassiveAckTimeout); break; case NWKMAXBROADCASTRETRIES : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkMaxBroadcastRetries); break; case NWKMAXCHILDREN : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkMaxChildren); break; case NWKMAXDEPTH : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkMaxDepth); break; case NWKMAXROUTERS : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkMaxRouters); break; case NWKMETWORKBROADCASTDELIVERYTIME : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkNetworkBroadcastDeliveryTime); break; case NWKREPORTCONSTANTCOST : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkReportConstantCost); break; case NWKROUTEDISCOVERYRETRIESPERMITED : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkRouteDiscoveryRetriesPermitted); break; case NWKSYMLINK : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkSymLink); break; case NWKCAPABILITYINFORMATION : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkCapabilityInformation); break; case NWKUSETREEADDRALLOC : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkUseTreeAddrAlloc); break; case NWKUSETREEROUTING : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkUseTreeRouting); break; case NWKNEXTADDRESS : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0002,(uint16_t)&nwk_IB.nwkNextAddress); break; case NWKAVAILABLEADDRESSES : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0002,(uint16_t)&nwk_IB.nwkAvailableAddresses); break; case NWKADDRESSINCREMENT : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0002,(uint16_t)&nwk_IB.nwkAddressIncrement); break; case NWKTRANSACTIONPERSISTENCETIME : signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkTransactionPersistenceTime); break; default: signal NLME_GET.confirm(NWK_UNSUPPORTED_ATTRIBUTE,NIBAttribute,0x0000,0x00); break; } return SUCCESS; } /*************************************************************/ /**************neighbor table management functions************/ /*************************************************************/ //check if a specific neighbourtable Entry is present //Return 0xFF: Entry is not present //Return i: Entry is present and return its index uint8_t check_neighbortableentry(uint8_t addrmode, ieee154_address_t address) { uint8_t idx = 0; #if (LOG_LEVEL & TRACE_FUNC) lclPrintf_NWK("check_neighbortableentry. neighbour_count: 0x%x\n", neighbour_count); #endif if (neighbour_count == 0) { //lclPrintf_NWK("no neigb\n", ""); return 0xFF; } switch (addrmode) { case ADDR_MODE_SHORT_ADDRESS: while (idx < NEIGHBOUR_TABLE_SIZE) { //lclPrintf_NWK("compare %x %x\n", neighbortable[idx].Network_Address, address.shortAddress); if( (neighbortable[idx].PAN_Id != 0) && (neighbortable[idx].Network_Address == address.shortAddress) ) { //lclPrintf_NWK("already present \n", "" ); return idx; } idx++; } break; case ADDR_MODE_EXTENDED_ADDRESS: while (idx < NEIGHBOUR_TABLE_SIZE) { //lclPrintf_NWK("compare %x %x\n", neighbortable[idx].Extended_Address, address.extendedAddress); if( (neighbortable[idx].PAN_Id != 0) && (neighbortable[idx].Extended_Address == address.extendedAddress) ) { //lclPrintf_NWK("already present \n", "" ); return idx; } idx++; } break; default: return 0xFF; } return 0xFF; } #if 0 //function used to find a parent in the neighbour table //Return 0:no parent is present //Return i:parent is present and return the index of the entry + 1 uint8_t find_suitable_parent() { uint8_t i = 0; #ifdef TRACE_FUNC_ENABLED lclPrintf_NWK("find_suitable_parent. neighbour_count: 0x%x\n", neighbour_count); #endif for (i=0; i [
      ] PLATFORM=telosb ZIGBEE_PATH=$TOSDIR/lib/zigbee/clusterTree echo $ZIGBEE_PATH APP_TEST_PATH=$TOSDIR/lib/zigbee/tests echo $APP_TEST_PATH PROG_DEV=bsl if [ $# -lt 4 ]; then clear echo "Not recognized parameters!!!" echo "Usage : ./pmote.sh [
      ]" echo "pmote.sh i c 3 0, compile and program mote (i) as coordinator (c), on /dev/ttyUSB3, with address 0" echo "Installation type . Use c to compile only, i to install or r to reinstall." read -p "Installation type : " inst_type echo "Please enter device type." echo "c - Coordinator." echo "r - Router." echo "e - End Device" echo "s - Sniffer" read -p "Device type : " device read -p "Please enter USB port number : " port read -p "Please enter device address : " initAddress else inst=`echo $1` device=`echo $2` port=`echo $3` initAddress=`echo $4` fi # Set default PAN_ID DEF_MAC_PANID=0xABCD export `echo "DEF_MAC_PANID=$DEF_MAC_PANID"` # Set default channel DEF_CHANNEL=26 export `echo "DEF_CHANNEL=$DEF_CHANNEL"` #set default Build dir BUILDDIR="images/"$initAddress export `echo "BUILDDIR=$BUILDDIR"` # Set default device depth if used if [ $# -gt 4 ]; then DEF_DEVICE_DEPTH=`echo $5` export `echo "DEF_DEVICE_DEPTH=$DEF_DEVICE_DEPTH"` echo "Device Depth: $DEF_DEVICE_DEPTH" fi # Set default chosen parent if used if [ $# -gt 5 ]; then DEF_CHOSEN_PARENT=`echo $6` export `echo "DEF_CHOSEN_PARENT=$DEF_CHOSEN_PARENT"` echo "Chosen Parent: $DEF_CHOSEN_PARENT" fi # Set default X if used if [ $# -gt 6 ]; then DEF_MY_X=`echo $7` export `echo "DEF_MY_X=$DEF_MY_X"` echo "My X: $DEF_MY_X" fi # Set default Y if used if [ $# -gt 7 ]; then DEF_MY_Y=`echo $8` export `echo "DEF_MY_Y=$DEF_MY_Y"` echo "My Y: $DEF_MY_Y" fi device_type="" if [ $device = 'c' ] || [ $device = 'C' ]; then device_type="IM_COORDINATOR=1" cd $APP_TEST_PATH/coordinator elif [ $device = 'r' ] || [ $device = 'R' ]; then device_type="IM_ROUTER=1" cd $APP_TEST_PATH/router elif [ $device = 'e' ] || [ $device = 'E' ]; then device_type="IM_END_DEVICE=1" cd $APP_TEST_PATH/end_device elif [ $device = 's' ] || [ $device = 'S' ]; then cd $TOSROOT/apps/tests/tkn154/packetsniffer/ device_type="IM_SNIFFER=1" else echo "Wrong parameters" exit fi if [[ $port != ${port//[^0-9]/} ]]; then echo "Wrong parameters" echo "$port is not an integer" exit fi port=`echo "ttyUSB"$port` echo $port echo $device_type export `echo "$device_type"` if [ $inst = 'i' ] || [ $inst = 'I' ]; then make clean make $PLATFORM install.$initAddress $PROG_DEV,/dev/$port elif [ $inst = 'c' ] || [ $inst = 'C' ]; then make clean make $PLATFORM elif [ $inst = 'r' ] || [ $inst = 'R' ]; then make $PLATFORM reinstall.$initAddress $PROG_DEV,/dev/$port else echo "Wrong parameters" exit fi echo DONE!!! tinyos-2.1.2+dfsg/tos/lib/zigbee/pnetwork.sh000066400000000000000000000010511207233610700210030ustar00rootroot00000000000000#! /bin/bash # script to compile and install software in a network of telosb motes. # Usage pnetwork_install.sh # Program the PAN coordinator on /dev/ttyUSB0 with address 0 ./pmote.sh i c 0 0 # Program the Router on /dev/ttyUSB1, with address 1, depth 1 # and to associate with the coordinator (0) ./pmote.sh i r 1 1 1 0 # Program 2 end devices on /dev/ttyUSB2 and /dev/ttyUSB3, with addresses 10 and 11, depth 2, # to associate with the router (1) and at predefined positions (x,y) ./pmote.sh i e 2 10 2 1 120 150 ./pmote.sh i e 3 11 2 1 173 116 tinyos-2.1.2+dfsg/tos/lib/zigbee/shadow/000077500000000000000000000000001207233610700200665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/shadow/Random.nc000066400000000000000000000043271207233610700216360ustar00rootroot00000000000000/* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Interface for generating 16-bit and 32-bit random numbers. * * @author Barbara Hohlt * @date March 1 2005 */ interface Random { /** * Initialize the pseudorandom generator with a specific seed. * @return void. */ async command void setSeed(uint16_t seed); /** * Produces a 32-bit pseudorandom number. * @return Returns the 32-bit pseudorandom number. */ async command uint32_t rand32(); /** * Produces a 32-bit pseudorandom number. * @return Returns low 16 bits of the pseudorandom number. */ async command uint16_t rand16(); } tinyos-2.1.2+dfsg/tos/lib/zigbee/shadow/RandomLfsrC.nc000066400000000000000000000073441207233610700225720ustar00rootroot00000000000000// $Id: RandomLfsrC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Alec Woo, David Gay, Philip Levis * Date last modified: 8/8/05 * */ /** * This is a 16 bit Linear Feedback Shift Register pseudo random number generator. It is faster than the MLCG generator, but the numbers generated * have less randomness. * * @author Alec Woo * @author David Gay * @author Philip Levis * @date August 8 2005 */ module RandomLfsrC { provides interface Init; provides interface Random; } implementation { uint16_t shiftReg; uint16_t initSeed; uint16_t mask; /** * Initialize the pseudorandom generator with a specific seed. * @return void. */ async command void Random.setSeed(uint16_t seed) { atomic { if (seed == 0) { // Use TOS_NODE_ID shiftReg = 119 * 119 * (TOS_NODE_ID + 1); initSeed = shiftReg; mask = 137 * 29 * (TOS_NODE_ID + 1); } else { // Use seed shiftReg = 119 * 119 * (seed + 1); initSeed = shiftReg; mask = 137 * 29 * (seed + 1); } } } /* Initialize the seed from the ID of the node */ command error_t Init.init() { atomic { shiftReg = 119 * 119 * (TOS_NODE_ID + 1); initSeed = shiftReg; mask = 137 * 29 * (TOS_NODE_ID + 1); } return SUCCESS; } /* Return the next 16 bit random number */ async command uint16_t Random.rand16() { bool endbit; uint16_t tmpShiftReg; atomic { tmpShiftReg = shiftReg; endbit = ((tmpShiftReg & 0x8000) != 0); tmpShiftReg <<= 1; if (endbit) tmpShiftReg ^= 0x100b; tmpShiftReg++; shiftReg = tmpShiftReg; tmpShiftReg = tmpShiftReg ^ mask; } return tmpShiftReg; } async command uint32_t Random.rand32() { return (uint32_t)call Random.rand16() << 16 | call Random.rand16(); } } tinyos-2.1.2+dfsg/tos/lib/zigbee/shadow/RandomMlcgC.nc000066400000000000000000000063771207233610700225530ustar00rootroot00000000000000/* * Copyright (c) 2002-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** This code is a fast implementation of the Park-Miller Minimal Standard * Generator for pseudo-random numbers. It uses the 32 bit multiplicative * linear congruential generator, * * S' = (A x S) mod (2^31 - 1) * * for A = 16807. * * * @author Barbara Hohlt * @date March 1 2005 */ module RandomMlcgC @safe() { provides interface Init; provides interface ParameterInit as SeedInit; provides interface Random; } implementation { uint32_t seed ; /** * Initialize the pseudorandom generator with a specific seed. * @return void. */ async command void Random.setSeed(uint16_t sseed) { } /* Initialize the seed from the ID of the node */ command error_t Init.init() { atomic seed = (uint32_t)(TOS_NODE_ID + 1); return SUCCESS; } /* Initialize with 16-bit seed */ command error_t SeedInit.init(uint16_t s) { atomic seed = (uint32_t)(s + 1); return SUCCESS; } /* Return the next 32 bit random number */ async command uint32_t Random.rand32() { uint32_t mlcg,p,q; uint64_t tmpseed; atomic { tmpseed = (uint64_t)33614U * (uint64_t)seed; q = tmpseed; /* low */ q = q >> 1; p = tmpseed >> 32 ; /* hi */ mlcg = p + q; if (mlcg & 0x80000000) { mlcg = mlcg & 0x7FFFFFFF; mlcg++; } seed = mlcg; } return mlcg; } /* Return low 16 bits of next 32 bit random number */ async command uint16_t Random.rand16() { return (uint16_t)call Random.rand32(); } #if 0 /* Return high 16 bits of 32 bit number */ inline uint16_t getHigh16(uint32_t num) { return num >> 16; } #endif } tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/000077500000000000000000000000001207233610700177435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/coordinator/000077500000000000000000000000001207233610700222665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/coordinator/Makefile000066400000000000000000000033111207233610700237240ustar00rootroot00000000000000COMPONENT=coordinatorBasicAppC PLATFORMS = telosb ZIGBEE=$(TOSDIR)/lib/zigbee/clusterTree # Shadows new version of files w.r.t. the official ones (if needed) PFLAGS += -I$(ZIGBEE)/../shadow PFLAGS += -I$(ZIGBEE)/includes \ -I$(ZIGBEE)/interfaces \ -I$(ZIGBEE)/nwk PFLAGS += -DIM_COORDINATOR ifdef DEF_MAC_PANID PFLAGS += -DDEF_MAC_PANID=$(DEF_MAC_PANID) endif ifdef DEF_CHANNEL PFLAGS += -DDEF_CHANNEL=$(DEF_CHANNEL) endif ifdef BUILDDIR PFLAGS += -DCBUILDDIR=$(BUILDDIR) endif ifdef DEF_DEVICE_DEPTH PFLAGS += -DDEF_DEVICE_DEPTH=$(DEF_DEVICE_DEPTH) endif ifdef DEF_CHOSEN_PARENT PFLAGS += -DDEF_CHOSEN_PARENT=$(DEF_CHOSEN_PARENT) endif ifdef DEF_MY_X PFLAGS += -DDEF_MY_X=$(DEF_MY_X) endif ifdef DEF_MY_Y PFLAGS += -DDEF_MY_Y=$(DEF_MY_Y) endif ifdef IEEE154_EXTENDED_ADDRESS PFLAGS += -DIEEE154_EXTENDED_ADDRESS=$(IEEE154_EXTENDED_ADDRESS) endif ifdef TKN154_DEBUG PFLAGS += -DTKN154_DEBUG CFLAGS += -I$(TOSDIR)/lib/printf PFLAGS += -DPRINTF_BUFFER_SIZE=1000 endif # Try to optimize memory allocation by disabling some MAC services #CFLAGS += -DIEEE154_RXENABLE_DISABLED -DIEEE154_DISASSOCIATION_DISABLED #CFLAGS += -DIEEE154_RXENABLE_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED #CFLAGS += -DIEEE154_RXENABLE_DISABLED CFLAGS += -DTKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED -DIEEE154_PROMISCUOUS_MODE_DISABLED -DIEEE154_GTS_DISABLED # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/coordinator/coordinatorBasicAppC.nc000066400000000000000000000016061207233610700266440ustar00rootroot00000000000000/* * @author Stefano Tennina * */ #include #include "nwk_enumerations.h" #if defined(PLATFORM_TELOSB) #include "UserButton.h" #endif #include "nwk_const_coordinator.h" configuration coordinatorBasicAppC { } implementation { components MainC; // components LedsC; components coordinatorBasicC as App; App.Boot -> MainC; // App.Leds -> LedsC; components new TimerMilliC() as T_init; App.T_init -> T_init; #if defined(PLATFORM_TELOSB) //User Button components UserButtonC; App.Get -> UserButtonC; App.Notify -> UserButtonC; #endif components NWKC; App.NLDE_DATA ->NWKC.NLDE_DATA; App.NLME_NETWORK_FORMATION -> NWKC.NLME_NETWORK_FORMATION; App.NLME_JOIN -> NWKC.NLME_JOIN; App.NLME_LEAVE -> NWKC.NLME_LEAVE; App.NLME_RESET -> NWKC.NLME_RESET; App.NLME_SYNC -> NWKC.NLME_SYNC; App.NLME_GET -> NWKC.NLME_GET; App.NLME_SET -> NWKC.NLME_SET; } tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/coordinator/coordinatorBasicC.nc000066400000000000000000000224141207233610700262030ustar00rootroot00000000000000/* PAN COORDINATOR NODE * @author Stefano Tennina * */ #include #include "printfUART.h" #include "log_enable.h" #ifdef APP_PRINTFS_ENABLED #define lclPrintf printfUART #define lclprintfUART_init printfUART_init #else #define lclPrintf(__format, __args...) void lclprintfUART_init() {} #endif module coordinatorBasicC { uses { interface Boot; // interface Leds; interface NLDE_DATA; //NLME NWK Management services interface NLME_NETWORK_FORMATION; interface NLME_JOIN; interface NLME_LEAVE; interface NLME_SYNC; interface NLME_RESET; interface NLME_GET; interface NLME_SET; //Timers interface Timer as T_init; #if defined(PLATFORM_TELOSB) //user button interface Get; interface Notify; #endif } } implementation { // Depth by configuration uint8_t networkStarted; // This function initializes the variables. void initVariables() { // Depth by configuration (initialize to default) atomic networkStarted = 0; } event void Boot.booted() { initVariables(); #if defined(PLATFORM_TELOSB) // TelosB: we can use the button to start call Notify.enable(); #else // In case of MicaZ, start immediately call NLME_RESET.request(); #endif } //function used to schedule the beacon requests (PAN coordinator) void process_beacon_scheduling(uint16_t source_address,uint8_t beacon_order, uint8_t superframe_order) { uint8_t nsdu_pay[6]; beacon_scheduling *beacon_scheduling_ptr = (beacon_scheduling *)(&nsdu_pay[0]); beacon_scheduling_ptr->beacon_order = beacon_order; beacon_scheduling_ptr->superframe_order = superframe_order; switch(source_address) { /*****************************************************************************/ /* * NORMAL TEST mwkMaxChildren (Cm) 6 nwkMaxDepth (Lm) 3 mwkMaxRouters (Rm) 4 */ case 0x0001: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x3C; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0020: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x01; beacon_scheduling_ptr->transmission_offset[1] = 0xE0; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0002: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x3C; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0009: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0xF0; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0021: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x3C; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0028: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0xF0; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0003: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x3C; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0004: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x78; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x000a: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x3C; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x000b: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x78; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0022: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x3C; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0023: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x78; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x0029: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x3C; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; case 0x002a: beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x78; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; default: beacon_scheduling_ptr->request_type = SCHEDULING_DENY; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x00; beacon_scheduling_ptr->transmission_offset[2] = 0x00; break; } lclPrintf("Coordinator: Sending negotiation reply\n", ""); call NLDE_DATA.request(source_address, 0x06, nsdu_pay, 0, 1, 0x00, 0); } /***************************************************** ****************NLDE EVENTS*************************** ******************************************************/ /*************************NLDE_DATA*****************************/ event error_t NLDE_DATA.confirm(uint8_t NsduHandle, uint8_t Status) { lclPrintf("NLDE_DATA.confirm\n", ""); return SUCCESS; } event error_t NLDE_DATA.indication(uint16_t SrcAddress, uint8_t NsduLength, uint8_t Nsdu[120], uint16_t LinkQuality) { uint8_t packetCode = Nsdu[0]; // TDBS mechanism beacon_scheduling *beacon_scheduling_ptr; lclPrintf("NLDE_DATA.indication\n", ""); // The packet is for me (check has been done into MCPS_DATA.indication) // TDBS mechanism if (packetCode == SCHEDULING_REQUEST) { beacon_scheduling_ptr = (beacon_scheduling *)Nsdu; // PAN coordinator receiving a negotiation request process_beacon_scheduling (SrcAddress, beacon_scheduling_ptr->beacon_order, beacon_scheduling_ptr->superframe_order); } // No other data is expected return SUCCESS; } /***************************************************** ****************NLME EVENTS*************************** ******************************************************/ /*****************NLME_NETWORK_FORMATION**********************/ event error_t NLME_NETWORK_FORMATION.confirm(uint8_t Status) { lclPrintf("NLME_NETWORK_FORMATION.confirm\n", ""); networkStarted = 1; // The Coordinator is transmitting its own beacons return SUCCESS; } /*************************NLME_JOIN*****************************/ event error_t NLME_JOIN.indication(uint16_t ShortAddress, uint32_t ExtendedAddress[], uint8_t CapabilityInformation, bool SecureJoin) { lclPrintf("NLME_JOIN.indication\n", ""); return SUCCESS; } event error_t NLME_JOIN.confirm(uint16_t PANId, uint8_t Status, uint16_t parentAddress) { return SUCCESS; } /*************************NLME_LEAVE****************************/ event error_t NLME_LEAVE.indication(uint64_t DeviceAddress) { lclPrintf("NLME_LEAVE.indication\n", ""); return SUCCESS; } event error_t NLME_LEAVE.confirm(uint64_t DeviceAddress, uint8_t Status) { lclPrintf("NLME_LEAVE.confirm\n", ""); return SUCCESS; } /*************************NLME_SYNC*****************************/ event error_t NLME_SYNC.indication() { lclPrintf("NLME_SYNC.indication\n", ""); // We lost connection with our parent. Automatic rescan is done // by the NWK return SUCCESS; } event error_t NLME_SYNC.confirm(uint8_t Status) { return SUCCESS; } /***************** NLME-SET ********************/ event error_t NLME_SET.confirm(uint8_t Status, uint8_t NIBAttribute) { return SUCCESS; } /***************** NLME-GET ********************/ event error_t NLME_GET.confirm(uint8_t Status, uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue) { return SUCCESS; } event error_t NLME_RESET.confirm(uint8_t status) { lclPrintf("NLME_RESET.confirm\n", ""); call T_init.startOneShot(5000); return SUCCESS; } /*******************T_init**************************/ event void T_init.fired() { lclPrintf("I'm THE coordinator\n", ""); call NLME_NETWORK_FORMATION.request(LOGICAL_CHANNEL, 8, BEACON_ORDER, SUPERFRAME_ORDER, MAC_PANID, 0); return; } #if defined(PLATFORM_TELOSB) event void Notify.notify(button_state_t state) { if (state == BUTTON_PRESSED && networkStarted == 0) { lclPrintf("Button pressed\n", ""); call NLME_RESET.request(); } } #endif } tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/end_device/000077500000000000000000000000001207233610700220305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/end_device/Makefile000066400000000000000000000034021207233610700234670ustar00rootroot00000000000000COMPONENT=end_deviceBasicAppC PLATFORMS = telosb ZIGBEE=$(TOSDIR)/lib/zigbee/clusterTree # Shadows new version of files w.r.t. the official ones (if needed) PFLAGS += -I$(ZIGBEE)/../shadow PFLAGS += -I$(ZIGBEE)/includes \ -I$(ZIGBEE)/interfaces \ -I$(ZIGBEE)/nwk PFLAGS += -DIM_END_DEVICE -DIEEE154_BEACON_TX_DISABLED #PFLAGS += -DPRINTFUART_ENABLED ifdef DEF_MAC_PANID PFLAGS += -DDEF_MAC_PANID=$(DEF_MAC_PANID) endif ifdef DEF_CHANNEL PFLAGS += -DDEF_CHANNEL=$(DEF_CHANNEL) endif ifdef BUILDDIR PFLAGS += -DCBUILDDIR=$(BUILDDIR) endif ifdef DEF_DEVICE_DEPTH PFLAGS += -DDEF_DEVICE_DEPTH=$(DEF_DEVICE_DEPTH) endif ifdef DEF_CHOSEN_PARENT PFLAGS += -DDEF_CHOSEN_PARENT=$(DEF_CHOSEN_PARENT) endif ifdef DEF_MY_X PFLAGS += -DDEF_MY_X=$(DEF_MY_X) endif ifdef DEF_MY_Y PFLAGS += -DDEF_MY_Y=$(DEF_MY_Y) endif ifdef IEEE154_EXTENDED_ADDRESS PFLAGS += -DIEEE154_EXTENDED_ADDRESS=$(IEEE154_EXTENDED_ADDRESS) endif ifdef TKN154_DEBUG PFLAGS += -DTKN154_DEBUG CFLAGS += -I$(TOSDIR)/lib/printf PFLAGS += -DPRINTF_BUFFER_SIZE=1000 endif # Try to optimize memory allocation by disabling some MAC services #CFLAGS += -DIEEE154_RXENABLE_DISABLED -DIEEE154_DISASSOCIATION_DISABLED #CFLAGS += -DIEEE154_RXENABLE_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED #CFLAGS += -DIEEE154_RXENABLE_DISABLED CFLAGS += -DTKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED -DIEEE154_PROMISCUOUS_MODE_DISABLED -DIEEE154_GTS_DISABLED # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/end_device/end_deviceBasicAppC.nc000066400000000000000000000021211207233610700261410ustar00rootroot00000000000000/* * @author Stefano Tennina * */ #include #include "nwk_enumerations.h" #if defined(PLATFORM_TELOSB) #include "UserButton.h" #endif #include "nwk_const_end_device.h" configuration end_deviceBasicAppC { } implementation { components MainC; components LedsC; components end_deviceBasicC as App; App.Boot -> MainC; App.Leds -> LedsC; components new TimerMilliC() as T_init; App.T_init -> T_init; components new TimerMilliC() as KeepAliveTimer; App.KeepAliveTimer -> KeepAliveTimer; components new TimerMilliC() as NetAssociationDeferredTimer; App.NetAssociationDeferredTimer -> NetAssociationDeferredTimer; #if defined(PLATFORM_TELOSB) //User Button components UserButtonC; App.Get -> UserButtonC; App.Notify -> UserButtonC; #endif components NWKC; App.NLDE_DATA ->NWKC.NLDE_DATA; App.NLME_NETWORK_DISCOVERY -> NWKC.NLME_NETWORK_DISCOVERY; App.NLME_JOIN -> NWKC.NLME_JOIN; App.NLME_LEAVE -> NWKC.NLME_LEAVE; App.NLME_RESET -> NWKC.NLME_RESET; App.NLME_SYNC -> NWKC.NLME_SYNC; App.NLME_GET -> NWKC.NLME_GET; App.NLME_SET -> NWKC.NLME_SET; } tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/end_device/end_deviceBasicC.nc000066400000000000000000000165421207233610700255140ustar00rootroot00000000000000/* * @author Ricardo Severino * END DEVICE * */ #include #include "printfUART.h" #include "log_enable.h" #ifdef APP_PRINTFS_ENABLED #define lclPrintf printfUART #define lclprintfUART_init printfUART_init #else #define lclPrintf(__format, __args...) void lclprintfUART_init() {} #endif module end_deviceBasicC { uses { interface Boot; interface Leds; interface NLDE_DATA; //NLME NWK Management services interface NLME_NETWORK_DISCOVERY; interface NLME_JOIN; interface NLME_LEAVE; interface NLME_SYNC; interface NLME_RESET; interface NLME_GET; interface NLME_SET; //Timers interface Timer as T_init; interface Timer as KeepAliveTimer; interface Timer as NetAssociationDeferredTimer; #if defined(PLATFORM_TELOSB) //user button interface Get; interface Notify; #endif } } implementation { // Depth by configuration uint8_t myDepth; //boolean variable definig if the device has joined to the PAN uint8_t joined; // Maximum number of join trials before restart from network discovery uint8_t maxJoinTrials; uint16_t myParentAddress; task void KeepAlive(); task void KeepAlive() { uint8_t nsdu_pay[6]; nsdu_pay[0]=TOS_NODE_ID & 0x00FF; nsdu_pay[1]='H'; nsdu_pay[2]='e'; nsdu_pay[3]='l'; nsdu_pay[4]='l'; nsdu_pay[5]='o'; // Send the message towards the coordinator // (default network address: 0x0000) call NLDE_DATA.request(0x0000, 6, nsdu_pay, 0, 1, 0x00, 0); } // This function initializes the variables. void initVariables() { // Depth by configuration (initialize to default) myDepth = DEF_DEVICE_DEPTH; //boolean variable definig if the device has joined to the PAN joined = 0x00; // Maximum number of join trials before restart from network discovery maxJoinTrials = MAX_JOIN_TRIALS; } event void Boot.booted() { printfUART_init(); initVariables(); #if defined(PLATFORM_TELOSB) call Notify.enable(); #endif // Start the application call NLME_RESET.request(); } /***************************************************** ****************NLDE EVENTS*************************** ******************************************************/ /*************************NLDE_DATA*****************************/ event error_t NLDE_DATA.confirm(uint8_t NsduHandle, uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLDE_DATA.confirm\n", ""); #endif if (joined != 0x00) call Leds.led1Toggle(); return SUCCESS; } event error_t NLDE_DATA.indication( uint16_t SrcAddress, uint8_t NsduLength, uint8_t Nsdu[120], uint16_t LinkQuality) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLDE_DATA.indication\n", ""); #endif return SUCCESS; } /***************************************************** ****************NLME EVENTS*************************** ******************************************************/ /*****************NLME_NETWORK_DISCOVERY**************************/ // This is not called anymore by the NKWP since it tries to associate // directly to the parent and issuing a JOIN confirm, instead event error_t NLME_NETWORK_DISCOVERY.confirm(uint8_t NetworkCount,networkdescriptor networkdescriptorlist[], uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_NETWORK_DISCOVERY.confirm\n", ""); #endif return SUCCESS; } /*************************NLME_JOIN*****************************/ event error_t NLME_JOIN.indication(uint16_t ShortAddress, uint32_t ExtendedAddress[], uint8_t CapabilityInformation, bool SecureJoin) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_JOIN.indication\n", ""); #endif return SUCCESS; } event error_t NLME_JOIN.confirm(uint16_t PANId, uint8_t Status, uint16_t parentAddress) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_JOIN.confirm\n", ""); #endif switch(Status) { case NWK_SUCCESS: // Join procedure successful joined = 0x01; myParentAddress=parentAddress; call KeepAliveTimer.startPeriodic(10000); break; case NWK_NOT_PERMITTED: joined = 0x00; //join failed break; case NWK_STARTUP_FAILURE: joined = 0x00; maxJoinTrials--; if (maxJoinTrials == 0) { // Retry restarting from the network discovery phase call T_init.startOneShot(5000); } else { // Retry after a few seconds call NetAssociationDeferredTimer.startOneShot(JOIN_TIMER_RETRY); } break; default: //default procedure - join failed joined = 0x00; break; } return Status; } /*************************NLME_LEAVE****************************/ event error_t NLME_LEAVE.indication(uint64_t DeviceAddress) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_LEAVE.indication\n", ""); #endif return SUCCESS; } event error_t NLME_LEAVE.confirm(uint64_t DeviceAddress, uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_LEAVE.confirm\n", ""); #endif joined=0x00; return SUCCESS; } /*************************NLME_SYNC*****************************/ event error_t NLME_SYNC.indication() { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_SYNC.indication\n", ""); #endif // We lost connection with our parent. Automatic rescan is done // at the NWK layer, unless it is after a disassociation request joined=0x00; // Stop the keep alive timer, if it is still running if (call KeepAliveTimer.isRunning()) call KeepAliveTimer.stop(); // Switch off all leds call Leds.led0Off(); call Leds.led1Off(); call Leds.led2Off(); return SUCCESS; } event error_t NLME_SYNC.confirm(uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_SYNC.confirm\n", ""); #endif return SUCCESS; } /***************** NLME-SET ********************/ event error_t NLME_SET.confirm(uint8_t Status, uint8_t NIBAttribute) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_SET.confirm\n", ""); #endif return SUCCESS; } /***************** NLME-GET ********************/ event error_t NLME_GET.confirm(uint8_t Status, uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_GET.confirm\n", ""); #endif return SUCCESS; } event error_t NLME_RESET.confirm(uint8_t status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_RESET.confirm\n", ""); #endif call T_init.startOneShot(2000); return SUCCESS; } /***************************************************** ****************TIMER EVENTS*************************** ******************************************************/ /*******************T_init**************************/ event void T_init.fired() { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("I'm NOT the coordinator\n", ""); #endif call NLME_NETWORK_DISCOVERY.request(LOGICAL_CHANNEL, BEACON_ORDER); return; } /*******************NetAssociationDeferredTimer**************************/ event void NetAssociationDeferredTimer.fired() { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("go join as end device\n", ""); #endif call NLME_JOIN.request(MAC_PANID, FALSE, FALSE, 0, 0, 0, 0, 0); return; } /*******************KeepAlive**************************/ event void KeepAliveTimer.fired() { post KeepAlive(); } #if defined(PLATFORM_TELOSB) event void Notify.notify(button_state_t state) { if (state == BUTTON_PRESSED && joined) { call KeepAliveTimer.stop(); call NLME_LEAVE.request(0,0,0); } } #endif } tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/router/000077500000000000000000000000001207233610700212635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/router/Makefile000066400000000000000000000033371207233610700227310ustar00rootroot00000000000000COMPONENT=routerBasicAppC PLATFORMS = telosb ZIGBEE=$(TOSDIR)/lib/zigbee/clusterTree # Shadows new version of files w.r.t. the official ones (if needed) PFLAGS += -I$(ZIGBEE)/../shadow PFLAGS += -I$(ZIGBEE)/includes \ -I$(ZIGBEE)/interfaces \ -I$(ZIGBEE)/nwk PFLAGS += -DIM_ROUTER #PFLAGS += -DPRINTFUART_ENABLED ifdef DEF_MAC_PANID PFLAGS += -DDEF_MAC_PANID=$(DEF_MAC_PANID) endif ifdef DEF_CHANNEL PFLAGS += -DDEF_CHANNEL=$(DEF_CHANNEL) endif ifdef BUILDDIR PFLAGS += -DCBUILDDIR=$(BUILDDIR) endif ifdef DEF_DEVICE_DEPTH PFLAGS += -DDEF_DEVICE_DEPTH=$(DEF_DEVICE_DEPTH) endif ifdef DEF_CHOSEN_PARENT PFLAGS += -DDEF_CHOSEN_PARENT=$(DEF_CHOSEN_PARENT) endif ifdef DEF_MY_X PFLAGS += -DDEF_MY_X=$(DEF_MY_X) endif ifdef DEF_MY_Y PFLAGS += -DDEF_MY_Y=$(DEF_MY_Y) endif ifdef IEEE154_EXTENDED_ADDRESS PFLAGS += -DIEEE154_EXTENDED_ADDRESS=$(IEEE154_EXTENDED_ADDRESS) endif ifdef TKN154_DEBUG PFLAGS += -DTKN154_DEBUG CFLAGS += -I$(TOSDIR)/lib/printf PFLAGS += -DPRINTF_BUFFER_SIZE=1000 endif # Try to optimize memory allocation by disabling some MAC services #CFLAGS += -DIEEE154_RXENABLE_DISABLED -DIEEE154_DISASSOCIATION_DISABLED #CFLAGS += -DIEEE154_RXENABLE_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED #CFLAGS += -DIEEE154_RXENABLE_DISABLED CFLAGS += -DTKN154_ACTIVE_MESSAGE_SUPPORT_DISABLED -DIEEE154_PROMISCUOUS_MODE_DISABLED -DIEEE154_GTS_DISABLED # To use the TKN15.4 MAC instead of a platform's default MAC protocol first # include the TinyOS "Makerules" file as usual ... include $(MAKERULES) # ... and then include the TKN15.4 "Makefile.include" file. That's all. # Hint: type "make verbose" to see the aggregate include path. include $(TOSDIR)/lib/mac/tkn154/Makefile.include tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/router/routerBasicAppC.nc000066400000000000000000000021541207233610700246350ustar00rootroot00000000000000/* * @author Stefano Tennina * */ #include #include "nwk_enumerations.h" #if defined(PLATFORM_TELOSB) #include "UserButton.h" #endif #include "nwk_const_router.h" configuration routerBasicAppC { } implementation { components MainC; components LedsC; components routerBasicC as App; App.Boot -> MainC; App.Leds -> LedsC; components new TimerMilliC() as T_init; App.T_init -> T_init; components new TimerMilliC() as T_schedule; App.T_schedule -> T_schedule; components new TimerMilliC() as NetAssociationDeferredTimer; App.NetAssociationDeferredTimer -> NetAssociationDeferredTimer; #if defined(PLATFORM_TELOSB) //User Button components UserButtonC; App.Get -> UserButtonC; App.Notify -> UserButtonC; #endif components NWKC; App.NLDE_DATA ->NWKC.NLDE_DATA; App.NLME_NETWORK_DISCOVERY -> NWKC.NLME_NETWORK_DISCOVERY; App.NLME_START_ROUTER -> NWKC.NLME_START_ROUTER; App.NLME_JOIN -> NWKC.NLME_JOIN; App.NLME_LEAVE -> NWKC.NLME_LEAVE; App.NLME_RESET -> NWKC.NLME_RESET; App.NLME_SYNC -> NWKC.NLME_SYNC; App.NLME_GET -> NWKC.NLME_GET; App.NLME_SET -> NWKC.NLME_SET; } tinyos-2.1.2+dfsg/tos/lib/zigbee/tests/router/routerBasicC.nc000066400000000000000000000225631207233610700242020ustar00rootroot00000000000000/* ROUTER * @author Ricardo Severino * * */ #include #include "printfUART.h" #include "log_enable.h" #ifdef APP_PRINTFS_ENABLED #define lclPrintf printfUART #define lclprintfUART_init printfUART_init #else #define lclPrintf(__format, __args...) void lclprintfUART_init() {} #endif module routerBasicC { uses { interface Boot; interface Leds; interface NLDE_DATA; //NLME NWK Management services interface NLME_NETWORK_DISCOVERY; interface NLME_START_ROUTER; interface NLME_JOIN; interface NLME_LEAVE; interface NLME_SYNC; interface NLME_RESET; interface NLME_GET; interface NLME_SET; //Timers interface Timer as T_init; interface Timer as T_schedule; interface Timer as NetAssociationDeferredTimer; #if defined(PLATFORM_TELOSB) //user button interface Get; interface Notify; #endif } } implementation { // Depth by configuration uint8_t myDepth; //boolean variable definig if the device has joined to the PAN uint8_t joined; // Maximum number of join trials before restart from network discovery uint8_t maxJoinTrials; //boolean variable defining if the device is waiting for the beacon request response uint8_t requested_scheduling; //function used to start the beacon broadcast (router devices) task void start_sending_beacons_request(); // This function initializes the variables. void initVariables() { // Depth by configuration (initialize to default) myDepth = DEF_DEVICE_DEPTH; //boolean variable definig if the device has joined to the PAN joined = 0x00; // Maximum number of join trials before restart from network discovery maxJoinTrials = MAX_JOIN_TRIALS; //boolean variable defining if the device is waiting for the beacon request response requested_scheduling = 0x00; } event void Boot.booted() { lclprintfUART_init();//make the possibility to print initVariables(); call NLME_RESET.request(); } task void start_sending_beacons_request() { uint8_t nsdu_pay[6]; beacon_scheduling *beacon_scheduling_ptr; beacon_scheduling_ptr = (beacon_scheduling *)&nsdu_pay[0]; beacon_scheduling_ptr->request_type = SCHEDULING_REQUEST; beacon_scheduling_ptr->beacon_order = BEACON_ORDER; beacon_scheduling_ptr->superframe_order = SUPERFRAME_ORDER; beacon_scheduling_ptr->transmission_offset[0] = 0x00; beacon_scheduling_ptr->transmission_offset[1] = 0x00; beacon_scheduling_ptr->transmission_offset[2] = 0x00; requested_scheduling = 0x01; lclPrintf("Router: Sending negotiation request\n", ""); call NLDE_DATA.request(0x0000, 0x06, nsdu_pay, 0, 1, 0x00, 0); call T_schedule.startOneShot(20000); return; } /***************************************************** ****************NLDE EVENTS*************************** ******************************************************/ /*************************NLDE_DATA*****************************/ event error_t NLDE_DATA.confirm(uint8_t NsduHandle, uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLDE_DATA.confirm\n", ""); #endif call Leds.led1Toggle(); return SUCCESS; } event error_t NLDE_DATA.indication(uint16_t SrcAddress, uint8_t NsduLength, uint8_t Nsdu[120], uint16_t LinkQuality) { uint8_t packetCode = Nsdu[0]; // TDBS mechanism beacon_scheduling *beacon_scheduling_ptr; #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLDE_DATA.indication\n", ""); #endif // The packet is for me (check has been done into MCPS_DATA.indication in NWKP.nc) // TDBS mechanism if(requested_scheduling == 0x01) { //the router receives a negotiation reply atomic requested_scheduling = 0x00; // Stop this timer to prevent a further fire event (if any) call T_schedule.stop(); if(packetCode == SCHEDULING_ACCEPT) { // TDBS Mechanism uint32_t start_time = 0x00000000; uint16_t start_time1= 0x0000; uint16_t start_time2= 0x0000; beacon_scheduling_ptr = (beacon_scheduling *)Nsdu; start_time1 = ( (beacon_scheduling_ptr->transmission_offset[0] << 0) ) ; start_time2 = ( (beacon_scheduling_ptr->transmission_offset[1] << 8 ) | (beacon_scheduling_ptr->transmission_offset[2] << 0 ) ); start_time = ( ((uint32_t)start_time1 << 16) | (start_time2 << 0) ); lclPrintf("start_time=0x%x\n", start_time); call NLME_START_ROUTER.request ( beacon_scheduling_ptr->beacon_order, beacon_scheduling_ptr->superframe_order, 0, start_time); } } return SUCCESS; } /***************************************************** ****************NLME EVENTS*************************** ******************************************************/ /*****************NLME_NETWORK_DISCOVERY**************************/ // This is not called anymore by the NKWP since it tries to associate // directly to the parent and issuing a JOIN confirm, instead event error_t NLME_NETWORK_DISCOVERY.confirm(uint8_t NetworkCount,networkdescriptor networkdescriptorlist[], uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_NETWORK_DISCOVERY.confirm\n", ""); #endif return SUCCESS; } /*****************NLME_START_ROUTER*****************************/ event error_t NLME_START_ROUTER.confirm(uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_START_ROUTER.confirm\n", ""); #endif return SUCCESS; } /*************************NLME_JOIN*****************************/ event error_t NLME_JOIN.indication(uint16_t ShortAddress, uint32_t ExtendedAddress[], uint8_t CapabilityInformation, bool SecureJoin) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_JOIN.indication\n", ""); #endif return SUCCESS; } event error_t NLME_JOIN.confirm(uint16_t PANId, uint8_t Status, uint16_t parentAddress) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_JOIN.confirm\n", ""); #endif switch(Status) { case NWK_SUCCESS: // Join procedure successful joined = 0x01; call Leds.led0Off(); requested_scheduling = 0x01; call T_schedule.startOneShot(9000); break; case NWK_NOT_PERMITTED: joined = 0x00; //join failed break; case NWK_STARTUP_FAILURE: joined = 0x00; maxJoinTrials--; if (maxJoinTrials == 0) { // Retry restarting from the network discovery phase call T_init.startOneShot(5000); } else { // Retry after a few seconds call NetAssociationDeferredTimer.startOneShot(JOIN_TIMER_RETRY); } break; default: //default procedure - join failed joined = 0x00; break; } return Status; } /*************************NLME_LEAVE****************************/ event error_t NLME_LEAVE.indication(uint64_t DeviceAddress) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_LEAVE.indication\n", ""); #endif return SUCCESS; } event error_t NLME_LEAVE.confirm(uint64_t DeviceAddress, uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_LEAVE.confirm\n", ""); #endif return SUCCESS; } /*************************NLME_SYNC*****************************/ event error_t NLME_SYNC.indication() { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_SYNC.indication\n", ""); #endif // We lost connection with our parent. Automatic rescan is done // at the NWK layer // Switch off all leds call Leds.led0Off(); call Leds.led1Off(); call Leds.led2Off(); return SUCCESS; } event error_t NLME_SYNC.confirm(uint8_t Status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_SYNC.confirm\n", ""); #endif return SUCCESS; } /***************** NLME-SET ********************/ event error_t NLME_SET.confirm(uint8_t Status, uint8_t NIBAttribute) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_SET.confirm\n", ""); #endif return SUCCESS; } /***************** NLME-GET ********************/ event error_t NLME_GET.confirm(uint8_t Status, uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_GET.confirm\n", ""); #endif return SUCCESS; } event error_t NLME_RESET.confirm(uint8_t status) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("NLME_RESET.confirm\n", ""); #endif call T_init.startOneShot(5000); return SUCCESS; } /***************************************************** ****************TIMER EVENTS*************************** ******************************************************/ /*******************T_init**************************/ event void T_init.fired() { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("I'm NOT the coordinator\n", ""); #endif call NLME_NETWORK_DISCOVERY.request(LOGICAL_CHANNEL, BEACON_ORDER); return; } /*******************NetAssociationDeferredTimer**************************/ event void NetAssociationDeferredTimer.fired() { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("go join as router\n", ""); #endif call NLME_JOIN.request(MAC_PANID, TRUE, FALSE, 0, 0, 0, 0, 0); } /*******************T_schedule**************************/ event void T_schedule.fired() { //event that fires if the negotiation for beacon transmission is unsuccessful //(the device does not receive any negotiation reply) if(requested_scheduling == 0x01) { post start_sending_beacons_request(); } } #if defined(PLATFORM_TELOSB) event void Notify.notify(button_state_t state) { if (state == BUTTON_PRESSED) { #if (LOG_LEVEL & TRACE_FUNC) lclPrintf("Button pressed\n", ""); #endif call Leds.led0On(); call NLME_RESET.request(); } } #endif } tinyos-2.1.2+dfsg/tos/platforms/000077500000000000000000000000001207233610700165755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/README000066400000000000000000000024271207233610700174620ustar00rootroot00000000000000This directory contains hardware platforms that TinyOS runs on. A hardware platform is a collection of "chips," such as microcontrollers, radios, and non-volatile storage, whose implementations can be found in tos/chips. A platform includes code for the hardware resources that chip functionality depend on. For example, the CC1000 chip has a software networking stack (in chips/cc1000), which depends on being able to send bytes to the CC1000 chip over an SPI bus. How the SPI bus works is platform dependent (e.g., it could be shared between several chips and require software arbitration). Therefore, the mica2 platform, which has a CC1000 radio, connects the CC1000 code to an SPI bus that its microcontroller, an ATmega128, provides. Every platform directory has a ".platform" file, which specifies flags and options to the nesC compiler. For example, the native compiler ncc uses to compile a binary depends on what microcontroller a platform has, so a .platform file generally specifies the compiler with the "-gcc" option. Also, as platforms depend on a collection of chips, the .platform file specifies those chips with "-I" options. The standard TinyOS boot sequence depends on a platform providing a few components; details can be found in TEP 107. Phil Levis, last updated: 7/7/2005 tinyos-2.1.2+dfsg/tos/platforms/epic/000077500000000000000000000000001207233610700175155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/epic/.platform000066400000000000000000000037641207233610700213540ustar00rootroot00000000000000 # Perl snippets that are interpreted by ncc. # Directories to add to the include path for all Epic applications. # Includes that should take precedence must come first. Platforms # come before chips because they may override files. These must be # specified as @includes instead of -I's to @opts, otherwise the %T # won't be processed by ncc. push( @includes, qw( %T/platforms/epic %T/platforms/epic/chips/at45db %T/platforms/epic/chips/ds2411 %T/platforms/telosa %T/platforms/telosa/chips/cc2420 %T/chips/cc2420 %T/chips/cc2420/alarm %T/chips/cc2420/control %T/chips/cc2420/csma %T/chips/cc2420/interfaces %T/chips/cc2420/link %T/chips/cc2420/lowpan %T/chips/cc2420/lpl %T/chips/cc2420/packet %T/chips/cc2420/receive %T/chips/cc2420/spi %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins %T/chips/msp430/timer %T/chips/msp430/usart %T/chips/msp430/sensors %T/chips/at45db %T/chips/ds2401 %T/lib/timer %T/lib/serial %T/lib/adc %T/lib/power ) ); # The @opts list contains parameters that are passed to ncc. @opts = qw( -gcc=msp430-gcc -mmcu=msp430f1611 -fnesc-target=msp430 -fnesc-no-debug ); push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; push @opts, "-mingw-gcc" if $cygwin; $ENV{'CIL_MACHINE'} = "version_major=3 " . "version_minor=2 " . "version=msp430-3.2.3 " . "short=2,2 " . "int=2,2 " . "long=4,2 " . "long_long=8,2 " . "pointer=2,2 " . "enum=2,2 " . "float=4,2 " . "double=4,2 " . "long_double=4,2 " . "void=1,1 " . "fun=1,2 " . "wchar_size_size=2,2 " . "alignof_string=1 " . "max_alignment=1 " . "char_wchar_signed=true,true " . "const_string_literals=true " . "big_endian=false " . "underscore_name=false " . "__builtin_va_list=true " . "__thread_is_keyword=true"; tinyos-2.1.2+dfsg/tos/platforms/epic/DemoSensorC.nc000066400000000000000000000044241207233610700222240ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * DemoSensorC is a generic sensor device that provides a 16-bit * value. The platform author chooses which sensor actually sits * behind DemoSensorC, and though it's probably Voltage, Light, or * Temperature, there are no guarantees. * * This particular DemoSensorC on the telosb platform provides a * voltage reading, using VoltageC. * * To convert from ADC counts to actual voltage, divide this reading * by 4096 and multiply by 3. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $ * */ generic configuration DemoSensorC() { provides interface Read; } implementation { components new VoltageC() as DemoSensor; Read = DemoSensor; } tinyos-2.1.2+dfsg/tos/platforms/epic/DemoSensorNowC.nc000066400000000000000000000046341207233610700227130ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * DemoSensorNowC is a generic sensor device that provides a 16-bit * value that can be read from async context. The platform author * chooses which sensor actually sits behind DemoSensorNowC, and * though it's probably Voltage, Light, or Temperature, there are no * guarantees. * * This particular DemoSensorNowC on the telosb platform provides a * voltage reading, using VoltageC. * * To convert from ADC counts to actual voltage, divide this reading * by 4096 and multiply by 3. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $ * */ generic configuration DemoSensorNowC() { provides interface Resource; provides interface ReadNow; } implementation { components new Msp430InternalVoltageC() as DemoSensorNow; Resource = DemoSensorNow; ReadNow = DemoSensorNow; } tinyos-2.1.2+dfsg/tos/platforms/epic/DemoSensorStreamC.nc000066400000000000000000000045041207233610700233770ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * DemoSensorStreamC is a generic sensor device that provides a 16-bit * value. The platform author chooses which sensor actually sits * behind DemoSensorStreamC, and though it's probably Voltage, Light, or * Temperature, there are no guarantees. * * This particular DemoSensorStreamC on the telosb platform provides a * voltage reading, using VoltageStreamC. * * To convert from ADC counts to actual voltage, divide this reading * by 4096 and multiply by 3. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $ * */ generic configuration DemoSensorStreamC() { provides interface ReadStream; } implementation { components new VoltageStreamC() as DemoSensor; ReadStream = DemoSensor; } tinyos-2.1.2+dfsg/tos/platforms/epic/HplUserButtonC.nc000066400000000000000000000042761207233610700227310ustar00rootroot00000000000000/** * Copyright (c) 2007 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the user button for the telos platform * * @author Gilman Tolle * @version $Revision: 1.1 $ */ configuration HplUserButtonC { provides interface GeneralIO; provides interface GpioInterrupt; } implementation { components HplMsp430GeneralIOC as GeneralIOC; components HplMsp430InterruptC as InterruptC; components new Msp430GpioC() as UserButtonC; UserButtonC -> GeneralIOC.Port27; GeneralIO = UserButtonC; components new Msp430InterruptC() as InterruptUserButtonC; InterruptUserButtonC.HplInterrupt -> InterruptC.Port27; GpioInterrupt = InterruptUserButtonC.Interrupt; } tinyos-2.1.2+dfsg/tos/platforms/epic/Ieee154MessageC.nc000066400000000000000000000044731207233610700225600ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * * @author Stephen Dawson-Haggerty */ configuration Ieee154MessageC { provides { interface SplitControl; interface Resource as SendResource[uint8_t clientId]; interface Ieee154Send; interface Receive as Ieee154Receive; interface Ieee154Packet; interface Packet; interface PacketAcknowledgements; interface LinkPacketMetadata; interface LowPowerListening; interface PacketLink; } } implementation { components CC2420Ieee154MessageC as Msg; SplitControl = Msg; SendResource = Msg; Ieee154Send = Msg; Ieee154Receive = Msg; Ieee154Packet = Msg; Packet = Msg; PacketAcknowledgements = Msg; LinkPacketMetadata = Msg; LowPowerListening = Msg; PacketLink = Msg; } tinyos-2.1.2+dfsg/tos/platforms/epic/MoteClockC.nc000066400000000000000000000036451207233610700220320ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universität Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $Id: MoteClockC.nc,v 1.1 2008-08-07 06:37:05 prabal Exp $ * */ /** * @author Vlado Handziski */ configuration MoteClockC { provides interface Init as MoteClockInit; } implementation { components Msp430ClockC, MoteClockP; MoteClockInit = Msp430ClockC.Init; //MoteClockP.Msp430ClockInit -> Msp430ClockC; } tinyos-2.1.2+dfsg/tos/platforms/epic/MoteClockP.nc000066400000000000000000000070161207233610700220430ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universität Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $Id: MoteClockP.nc,v 1.1 2008-08-07 06:37:05 prabal Exp $ * */ /** * @author Vlado Handziski * @author Cory Sharp */ module MoteClockP { uses interface Msp430ClockInit; } implementation { event void Msp430ClockInit.setupDcoCalibrate() { // --- setup --- TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0 TBCTL = TBSSEL0 | MC1; BCSCTL1 = XT2OFF | RSEL2; BCSCTL2 = DCOR; // enable DCOR TBCCTL0 = CM0; } event void Msp430ClockInit.initClocks() { // BCSCTL1 // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK // .XTS = 0; set low frequency mode for LXFT1 // .DIVA = 0; set the divisor on ACLK to 1 // .RSEL, do not modify BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0)); // BCSCTL2 // .SELM = 0; select DCOCLK as source for MCLK // .DIVM = 0; set the divisor of MCLK to 1 // .SELS = 0; select DCOCLK as source for SCLK // .DIVS = 2; set the divisor of SCLK to 4 // .DCOR = 1; select internal resistor for DCO BCSCTL2 = DIVS1 | DCOR; // IE1.OFIE = 0; no interrupt for oscillator fault CLR_FLAG( IE1, OFIE ); } event void Msp430ClockInit.initTimerA() { TAR = 0; // TACTL // .TACLGRP = 0; each TACL group latched independently // .CNTL = 0; 16-bit counter // .TASSEL = 2; source SMCLK = DCO/4 // .ID = 0; input divisor of 1 // .MC = 0; initially disabled // .TACLR = 0; reset timer A // .TAIE = 1; enable timer A interrupts TACTL = TASSEL1 | TAIE; } event void Msp430ClockInit.initTimerB() { TBR = 0; // TBCTL // .TBCLGRP = 0; each TBCL group latched independently // .CNTL = 0; 16-bit counter // .TBSSEL = 1; source ACLK // .ID = 0; input divisor of 1 // .MC = 0; initially disabled // .TBCLR = 0; reset timer B // .TBIE = 1; enable timer B interrupts TBCTL = TBSSEL0 | TBIE; } } tinyos-2.1.2+dfsg/tos/platforms/epic/MotePlatformC.nc000066400000000000000000000014171207233610700225560ustar00rootroot00000000000000module MotePlatformC @safe() { provides interface Init; uses interface Init as SubInit; } implementation { command error_t Init.init() { // reset all of the ports to be input and using i/o functionality atomic { P1SEL = 0; P2SEL = 0; P3SEL = 0; P4SEL = 0; P5SEL = 0; P6SEL = 0; P1OUT = 0x00; P1DIR = 0xe0; P2OUT = 0x30; P2DIR = 0x7b; P3OUT = 0x00; P3DIR = 0xf1; P4OUT = 0xdd; P4DIR = 0xfd; P5OUT = 0xff; P5DIR = 0xff; P6OUT = 0x00; P6DIR = 0xff; P1IE = 0; P2IE = 0; // the commands above take care of the pin directions // there is no longer a need for explicit set pin // directions using the TOSH_SET/CLR macros }//atomic return call SubInit.init(); } default command error_t SubInit.init() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/platforms/epic/PlatformC.nc000066400000000000000000000040651207233610700217330ustar00rootroot00000000000000// $Id: PlatformC.nc,v 1.3 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2008 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Initialization code responsible for booting Epic to a usable state. * * @author Prabal Dutta */ #include "hardware.h" configuration PlatformC { provides { interface Init; } } implementation { components PlatformP; components MoteClockC; components MotePlatformC; Init = PlatformP; PlatformP.MoteClockInit -> MoteClockC; PlatformP.MoteInit -> MotePlatformC; } tinyos-2.1.2+dfsg/tos/platforms/epic/PlatformLedsC.nc000066400000000000000000000011501207233610700225330ustar00rootroot00000000000000#include "hardware.h" configuration PlatformLedsC { provides { interface GeneralIO as Led0; interface GeneralIO as Led1; interface GeneralIO as Led2; } uses { interface Init; } } implementation { components HplMsp430GeneralIOC as GeneralIOC; components new Msp430GpioC() as Led0Impl; components new Msp430GpioC() as Led1Impl; components new Msp430GpioC() as Led2Impl; components PlatformP; Init = PlatformP.LedsInit; Led0 = Led0Impl; Led0Impl -> GeneralIOC.Port40; Led1 = Led1Impl; Led1Impl -> GeneralIOC.Port43; Led2 = Led2Impl; Led2Impl -> GeneralIOC.Port47; } tinyos-2.1.2+dfsg/tos/platforms/epic/PlatformP.nc000066400000000000000000000043341207233610700217470ustar00rootroot00000000000000// $Id: PlatformP.nc,v 1.3 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2004-2008 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Initialization code responsible for booting Epic to a usable state. * * @author Prabal Dutta */ #include "hardware.h" module PlatformP { provides { interface Init; } uses { interface Init as MoteClockInit; interface Init as MoteInit; interface Init as LedsInit; } } implementation { command error_t Init.init() { WDTCTL = WDTPW + WDTHOLD; call MoteClockInit.init(); call MoteInit.init(); call LedsInit.init(); return SUCCESS; } default command error_t LedsInit.init() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/platforms/epic/UserButton.h000066400000000000000000000035121207233610700220010ustar00rootroot00000000000000/** * Copyright (c) 2007 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the user button for the telosb platform * * @author Gilman Tolle * @version $Revision: 1.1 $ */ #ifndef USERBUTTON_H #define USERBUTTON_H typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t; #endif tinyos-2.1.2+dfsg/tos/platforms/epic/UserButtonC.nc000066400000000000000000000050431207233610700222560ustar00rootroot00000000000000/** * Copyright (c) 2007 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the user button for the telosb platform. Get * returns the current state of the button by reading the pin, * regardless of whether enable() or disable() has been called on the * Interface. Notify.enable() and Notify.disable() modify the * underlying interrupt state of the pin, and have the effect of * enabling or disabling notifications that the button has changed * state. * * @author Gilman Tolle * @version $Revision: 1.1 $ */ #include configuration UserButtonC { provides interface Get; provides interface Notify; } implementation { components HplUserButtonC; components new SwitchToggleC(); SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt; SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO; components UserButtonP; Get = UserButtonP; Notify = UserButtonP; UserButtonP.GetLower -> SwitchToggleC.Get; UserButtonP.NotifyLower -> SwitchToggleC.Notify; } tinyos-2.1.2+dfsg/tos/platforms/epic/UserButtonP.nc000066400000000000000000000050651207233610700222770ustar00rootroot00000000000000/** * Copyright (c) 2007 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the user button for the telosb platform * * @author Gilman Tolle * @version $Revision: 1.1 $ */ #include module UserButtonP { provides interface Get; provides interface Notify; uses interface Get as GetLower; uses interface Notify as NotifyLower; } implementation { command button_state_t Get.get() { // telosb user button pin is high when released - invert state if ( call GetLower.get() ) { return BUTTON_RELEASED; } else { return BUTTON_PRESSED; } } command error_t Notify.enable() { return call NotifyLower.enable(); } command error_t Notify.disable() { return call NotifyLower.disable(); } event void NotifyLower.notify( bool val ) { // telosb user button pin is high when released - invert state if ( val ) { signal Notify.notify( BUTTON_RELEASED ); } else { signal Notify.notify( BUTTON_PRESSED ); } } } tinyos-2.1.2+dfsg/tos/platforms/epic/VoltageC.nc000066400000000000000000000040521207233610700215440ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * VoltageC is a common name for the Msp430InternalVoltageC voltage * sensor available on the telosb platform. * * To convert from ADC counts to actual voltage, divide by 4096 and * multiply by 3. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $ */ generic configuration VoltageC() { provides interface Read; } implementation { components new Msp430InternalVoltageC(); Read = Msp430InternalVoltageC.Read; } tinyos-2.1.2+dfsg/tos/platforms/epic/VoltageStreamC.nc000066400000000000000000000041021207233610700227140ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * VoltageC is a common name for the Msp430InternalVoltageC voltage * sensor available on the telosb platform. * * To convert from ADC counts to actual voltage, divide by 4096 and * multiply by 3. * * @author Gilman Tolle * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $ */ generic configuration VoltageStreamC() { provides interface ReadStream; } implementation { components new Msp430InternalVoltageC(); ReadStream = Msp430InternalVoltageC.ReadStream; } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/000077500000000000000000000000001207233610700206235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/epic/chips/at45db/000077500000000000000000000000001207233610700217065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/epic/chips/at45db/HplAt45dbC.nc000066400000000000000000000037701207233610700240310ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration HplAt45dbC { provides interface HplAt45db; } implementation { components new HplAt45dbByteC(10), new Msp430Spi0C() as Spi, HplAt45dbP, HplMsp430GeneralIOC as MspGeneralIO, new Msp430GpioC() as Select; HplAt45db = HplAt45dbByteC; HplAt45dbByteC.Resource -> Spi; HplAt45dbByteC.FlashSpi -> Spi; HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP; Select -> MspGeneralIO.Port44; HplAt45dbP.Select -> Select; HplAt45dbP.FlashSpi -> Spi; } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/at45db/HplAt45dbP.nc000066400000000000000000000044631207233610700240460ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ module HplAt45dbP { provides { interface HplAt45dbByte; } uses { interface SpiByte as FlashSpi; interface GeneralIO as Select; } } implementation { command void HplAt45dbByte.select() { call Select.clr(); } command void HplAt45dbByte.deselect() { call Select.set(); } task void idleTask() { uint8_t status; status = call FlashSpi.write(0); if (!(status & 0x80)) { post idleTask(); } else { //printf("idle: %d\n", status); signal HplAt45dbByte.idle(); } } command void HplAt45dbByte.waitIdle() { post idleTask(); } command bool HplAt45dbByte.getCompareStatus() { uint8_t status; status = call FlashSpi.write(0); //printf("s: %d\n", status); return (!(status & 0x40)); } } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/at45db/HplAt45db_chip.h000066400000000000000000000045011207233610700245510ustar00rootroot00000000000000// $Id: HplAt45db_chip.h,v 1.2 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef HPLAT45DB_CHIP_H #define HPLAT45DB_CHIP_H // flash characteristics enum { AT45_MAX_PAGES = 4096, AT45_PAGE_SIZE = 528, AT45_PAGE_SIZE_LOG2 = 9 // For those who want to ignore the last 8 bytes }; typedef uint16_t at45page_t; typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */ #endif tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/000077500000000000000000000000001207233610700215415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/CachedIeeeEui64C.nc000066400000000000000000000030321207233610700247400ustar00rootroot00000000000000// $Id: CachedIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai */ /** * Cache an EUI 64 at initialization time and return the cached value for * subsequent queries. */ configuration CachedIeeeEui64C { uses interface LocalIeeeEui64 as SubIeeeEui64; provides interface LocalIeeeEui64; } implementation { components CachedIeeeEui64P, MotePlatformC; MotePlatformC.SubInit -> CachedIeeeEui64P.Init; SubIeeeEui64 = CachedIeeeEui64P; LocalIeeeEui64 = CachedIeeeEui64P; } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/DallasId48.h000066400000000000000000000026231207233610700235460ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /** * data structures for dallas/maxim serial ID chips */ /* * @author Andreas Koepke */ #ifndef DALLASID48_H #define DALLASID48_H enum { DALLASID48_SERIAL_LENGTH = 6, DALLASID48_DATA_LENGTH = 8 }; typedef union dallasid48_serial_t { uint8_t data[DALLASID48_DATA_LENGTH]; struct { uint8_t family_code; uint8_t serial[DALLASID48_SERIAL_LENGTH]; uint8_t crc; }; } dallasid48_serial_t; // The CRC polynomial is X^8 + X^5 + X^4 + 1, // code is taken from http://linux.die.net/man/3/_crc_ccitt_update bool dallasid48checkCrc(const dallasid48_serial_t *id) { uint8_t crc = 0; uint8_t idx; for(idx = 0; idx < DALLASID48_DATA_LENGTH; idx++) { uint8_t i; crc = crc ^ (*id).data[idx]; for(i = 0; i < 8; i++) { if(crc & 0x01) { crc = (crc >> 1) ^ 0x8C; } else { crc >>= 1; } } } return crc == 0; } /* test application #include #include #include #ifndef bool #define bool uint8_t #endif #include "DallasId48.h" int main(void) { dallasid48_serial_t id = { 0x02, 0x1C, 0xB8, 0x01, 0x00, 0x00, 0x00, 0xA2}; printf("fam: %x, crc: %x, crc ok: %i\n", id.family_code, id.crc, dallasid48checkCrc(&id)); } */ #endif // DALLASID48_H tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/DallasId48ToIeeeEui64C.nc000066400000000000000000000015171207233610700257330ustar00rootroot00000000000000 #include "PlatformIeeeEui64.h" module DallasId48ToIeeeEui64C { provides interface LocalIeeeEui64; uses interface ReadId48; } implementation { command ieee_eui64_t LocalIeeeEui64.getId() { uint8_t id[6]; ieee_eui64_t eui; if (call ReadId48.read(id) != SUCCESS) { memset(eui.data, 0, 8); goto done; } eui.data[0] = IEEE_EUI64_COMPANY_ID_0; eui.data[1] = IEEE_EUI64_COMPANY_ID_1; eui.data[2] = IEEE_EUI64_COMPANY_ID_2; // 16 bits of the ID is generated by software // could be used for hardware model id and revision, for example eui.data[3] = IEEE_EUI64_SERIAL_ID_0; eui.data[4] = IEEE_EUI64_SERIAL_ID_1; // 24 least significant bits of the serial ID read from the DS2401 eui.data[5] = id[2]; eui.data[6] = id[1]; eui.data[7] = id[0]; done: return eui; } } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/Ds2411C.nc000066400000000000000000000011531207233610700230440ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /** * DS2411 tmote sky serial id */ /** * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ #include "Timer.h" configuration Ds2411C { provides interface ReadId48; } implementation { components Ds2411P, PlatformOneWireLowLevelC, OneWireMasterC, BusyWaitMicroC; components HplMsp430GeneralIOC as Hpl, new Msp430GpioC() as Gpio; Gpio.HplGeneralIO -> Hpl.Port24; ReadId48 = Ds2411P; Ds2411P.OneWire -> OneWireMasterC; OneWireMasterC.Pin -> Gpio; OneWireMasterC.BusyWait -> BusyWaitMicroC; } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/Ds2411P.nc000066400000000000000000000020251207233610700230600ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /** * DS2411 telosb tmote sky serial id */ /** * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ #include "DallasId48.h" module Ds2411P { provides { interface ReadId48; } uses { interface OneWireStream as OneWire; } } implementation { bool haveId = FALSE; dallasid48_serial_t ds2411id; error_t readId() { error_t e = call OneWire.read(0x33, ds2411id.data, DALLASID48_DATA_LENGTH); if(e == SUCCESS) { if(dallasid48checkCrc(&ds2411id)) { haveId = TRUE; } else { e = EINVAL; } } return e; } command error_t ReadId48.read(uint8_t *id) { error_t e = SUCCESS; if(!haveId) { e = readId(); } if(haveId) { uint8_t i; for(i = 0; i < DALLASID48_SERIAL_LENGTH; i++) { id[i] = ds2411id.serial[i]; } } return e; } } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/LocalIeeeEui64C.nc000066400000000000000000000026471207233610700246360ustar00rootroot00000000000000// $Id: LocalIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai * Epic port by Stephen Dawson-Haggerty */ configuration LocalIeeeEui64C { provides interface LocalIeeeEui64; } implementation { components Ds2411C, DallasId48ToIeeeEui64C; LocalIeeeEui64 = DallasId48ToIeeeEui64C; DallasId48ToIeeeEui64C.ReadId48 -> Ds2411C; } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/OneWireMasterC.nc000066400000000000000000000061561207233610700247220ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /** * Dallas/Maxim 1wire bus master * */ module OneWireMasterC { provides { interface OneWireStream as OneWire; } uses { interface GeneralIO as Pin; interface BusyWait; } } implementation { typedef enum { DELAY_5US = 5, RESET_LOW_TIME = 560, // min: 480us, max: 640 us DELAY_60US = 60, // min: 15us, max: 60us PRESENCE_DETECT_LOW_TIME = 240, // min: 60us, max: 240us PRESENCE_RESET_HIGH_TIME = 480, // maximum recommended value SLOT_TIME = 65, } onewiretimes_t; bool reset() { uint16_t i; call Pin.makeInput(); call Pin.clr(); call Pin.makeOutput(); call BusyWait.wait(RESET_LOW_TIME); call Pin.makeInput(); call BusyWait.wait(DELAY_60US); // wait until either the pin goes low or the timer expires for(i = 0; i < PRESENCE_DETECT_LOW_TIME; i += DELAY_5US, call BusyWait.wait(DELAY_5US)) if (!call Pin.get()) break; call BusyWait.wait(PRESENCE_RESET_HIGH_TIME - DELAY_60US); return i < PRESENCE_DETECT_LOW_TIME; } void writeOne() { call Pin.makeOutput(); call BusyWait.wait(DELAY_5US); call Pin.makeInput(); call BusyWait.wait(SLOT_TIME); } void writeZero() { call Pin.makeOutput(); call BusyWait.wait(DELAY_60US); call Pin.makeInput(); call BusyWait.wait(DELAY_5US); } bool readBit() { bool bit; call Pin.makeOutput(); call BusyWait.wait(DELAY_5US); call Pin.makeInput(); call BusyWait.wait(DELAY_5US); bit = call Pin.get(); call BusyWait.wait(SLOT_TIME); return bit; } void writeByte(uint8_t c) { uint8_t j; for(j = 0; j < 8; j++) { if(c & 0x01) { writeOne(); } else { writeZero(); } c >>= 1; } } uint8_t readByte() { uint8_t i,c = 0; for(i = 0; i < 8; i++) { c >>= 1; if(readBit()) { c |= 0x80; } } return c; } command error_t OneWire.read(uint8_t cmd, uint8_t* buf, uint8_t len) { error_t e = SUCCESS; atomic { if(reset()) { uint8_t i; writeByte(cmd); for(i = 0; i < len; i++) { buf[i] = readByte(); } } else { e = EOFF; } } return e; } command error_t OneWire.write(const uint8_t* buf, uint8_t len) { error_t e = SUCCESS; atomic { if(reset()) { uint8_t i; for(i = 0; i < len; i++) { writeByte(buf[i]); } } else { e = EOFF; } } return e; } } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/OneWireStream.nc000066400000000000000000000004621207233610700246110ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /** * Interface to Dallas/Maxim 1wire */ /** * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ interface OneWireStream { command error_t read(uint8_t cmd, uint8_t* buf, uint8_t len); command error_t write(const uint8_t* buf, uint8_t len); } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/PlatformIeeeEui64.h000066400000000000000000000026631207233610700251120ustar00rootroot00000000000000// $Id: PlatformIeeeEui64.h,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * * Author: Janos Sallai * changes for Epic */ #ifndef PLATFORMIEEEEUI64_H #define PLATFORMIEEEEUI64_H enum { IEEE_EUI64_COMPANY_ID_0 = 0x00, IEEE_EUI64_COMPANY_ID_1 = 0x12, IEEE_EUI64_COMPANY_ID_2 = 0x6d, IEEE_EUI64_SERIAL_ID_0 = 'E', IEEE_EUI64_SERIAL_ID_1 = 'P', }; #endif // PLATFORMIEEEEUI64_H tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/PlatformOneWireLowLevelC.nc000066400000000000000000000010151207233610700267120ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /** * read interface maxim/dallas 48 bit ID chips */ /** * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ configuration PlatformOneWireLowLevelC { provides interface GeneralIO as OneWirePin; } implementation{ components HplMsp430GeneralIOC; components new Msp430GpioC(); Msp430GpioC.HplGeneralIO -> HplMsp430GeneralIOC.Port24; OneWirePin = Msp430GpioC; // SDH : this seemed to break with mspgcc4... // components PlatformOneWireLowLevelP as Pins; } tinyos-2.1.2+dfsg/tos/platforms/epic/chips/ds2411/ReadId48.nc000066400000000000000000000005311207233610700233660ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /** * read interface maxim/dallas 48 bit ID chips */ /** * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ interface ReadId48 { // the ID is written into the buffer pointed to by id, // the buffer must be at least 6 bytes (or 48 bit) long command error_t read(uint8_t *id); } tinyos-2.1.2+dfsg/tos/platforms/epic/hardware.h000066400000000000000000000064751207233610700214770ustar00rootroot00000000000000// $Id: hardware.h,v 1.3 2010-06-29 22:07:52 scipio Exp $ /* * Copyright (c) 2007-2008 The Regents of the University of * California. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached * INTEL-LICENSE file. If you do not find these files, copies can be * found by writing to Intel Research Berkeley, 2150 Shattuck Avenue, * Suite 1300, Berkeley, CA, 94704. Attention: Intel License Inquiry. */ /** * Hardware definition for the Epic platform. * * @author Prabal Dutta */ #ifndef _H_hardware_h #define _H_hardware_h #include "msp430hardware.h" // enum so components can override power saving, // as per TEP 112. enum { TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, }; // LEDS TOSH_ASSIGN_PIN(RED_LED, 4, 0); TOSH_ASSIGN_PIN(GREEN_LED, 4, 3); TOSH_ASSIGN_PIN(YELLOW_LED, 4, 7); // CC2420 RADIO TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2); TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5); TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6); TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0); TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1); TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3); TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3); TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4); TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4); TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0); TOSH_ASSIGN_PIN(CC_FIFO, 1, 3); TOSH_ASSIGN_PIN(CC_SFD, 4, 1); TOSH_ASSIGN_PIN(CC_VREN, 4, 5); TOSH_ASSIGN_PIN(CC_RSTN, 4, 6); // USART0 TOSH_ASSIGN_PIN(SIMO0, 3, 1); TOSH_ASSIGN_PIN(SOMI0, 3, 2); TOSH_ASSIGN_PIN(UCLK0, 3, 3); // USART1 TOSH_ASSIGN_PIN(SIMO1, 5, 1); TOSH_ASSIGN_PIN(SOMI1, 5, 2); TOSH_ASSIGN_PIN(UCLK1, 5, 3); // UART1 TOSH_ASSIGN_PIN(UTXD0, 3, 4); TOSH_ASSIGN_PIN(URXD0, 3, 5); TOSH_ASSIGN_PIN(UTXD1, 3, 6); TOSH_ASSIGN_PIN(URXD1, 3, 7); // 1-Wire TOSH_ASSIGN_PIN(ONEWIRE, 2, 4); // need to undef atomic inside header files or nesC ignores the directive #undef atomic #endif // _H_hardware_h tinyos-2.1.2+dfsg/tos/platforms/epic/platform.h000066400000000000000000000000001207233610700215000ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/epic/platform_message.h000066400000000000000000000050741207233610700232240ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:52 scipio Exp $ * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Defining the platform-independently named packet structures to be the * chip-specific CC1000 packet structures. * * @author Philip Levis * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:52 $ */ #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H #include #include typedef union message_header { cc2420_header_t cc2420; serial_header_t serial; } message_header_t; typedef union TOSRadioFooter { cc2420_footer_t cc2420; } message_footer_t; typedef union TOSRadioMetadata { cc2420_metadata_t cc2420; } message_metadata_t; #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/000077500000000000000000000000001207233610700201115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/.family000066400000000000000000000033541207233610700214000ustar00rootroot00000000000000# Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. And because of that, the current platform's include directory # must be specified, otherwise its search order is last instead of first. push( @includes, qw( # normal platform includes %T/platforms/eyesIFX %T/platforms/eyesIFX/chips/tda5250 %T/platforms/eyesIFX/chips/ad5200 %T/platforms/eyesIFX/chips/msp430 %T/platforms/eyesIFX/sensors %T/platforms/eyesIFX/byte_radio %T/chips/tda5250 %T/chips/tda5250/mac %T/chips/ad5200 %T/chips/msp430 %T/chips/msp430/adc12 %T/chips/msp430/dma %T/chips/msp430/pins %T/chips/msp430/sensors %T/chips/msp430/usart %T/chips/msp430/timer %T/lib/timer %T/lib/serial %T/lib/adc %T/lib/byte_radio %T/lib/power ) ); push (@opts, qw( -gcc=msp430-gcc -fnesc-target=msp430 -fnesc-no-debug ) ); push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; push @opts, "-mingw-gcc" if $cygwin; $ENV{'CIL_MACHINE'} = "version_major=3 " . "version_minor=2 " . "version=msp430-3.2.3 " . "short=2,2 " . "int=2,2 " . "long=4,2 " . "long_long=8,2 " . "pointer=2,2 " . "enum=2,2 " . "float=4,2 " . "double=4,2 " . "long_double=4,2 " . "void=1,1 " . "fun=1,2 " . "wchar_size_size=2,2 " . "alignof_string=1 " . "max_alignment=1 " . "char_wchar_signed=true,true " . "const_string_literals=true " . "big_endian=false " . "underscore_name=false " . "__builtin_va_list=true " . "__thread_is_keyword=true"; tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/ActiveMessageC.nc000066400000000000000000000065741207233610700232720ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $ * */ /** * * The Active Message layer on the eyesIFX platforms. This is a naming wrapper * around the TDA5250 Active Message layer. * * @author Philip Levis * @author Vlado Handziski (TDA5250 modifications) * @date July 20 2005 */ #include "Timer.h" configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[uint8_t id]; interface Receive[uint8_t id]; interface Receive as Snoop[uint8_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components ActiveMessageFilterC as Filter; components Tda5250ActiveMessageC as AM; components PacketStampC as PacketStamp; AMSend = Filter; Receive = Filter.Receive; Snoop = Filter.Snoop; Filter.SubAMSend -> AM; Filter.SubReceive -> AM.Receive; Filter.SubSnoop -> AM.Snoop; //Filter.AMPacket -> AM; SplitControl = AM; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; PacketTimeStamp32khz = PacketStamp; PacketTimeStampMilli = PacketStamp; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/ActiveMessageFilterC.nc000066400000000000000000000071451207233610700244330ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2007-09-13 23:10:19 $ * @author: Jan Hauer * ======================================================================== */ /* This component is the default AM filter component: it does not do anything, * it uses no RAM and nesC will compile all code away. Its purpose is to allow * other components to shadow (overwrite) it to implement their own * filter/statistic component. */ #include "AM.h" module ActiveMessageFilterC { provides { interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; } uses { interface AMSend as SubAMSend[am_id_t id]; interface Receive as SubReceive[am_id_t id]; interface Receive as SubSnoop[am_id_t id]; } } implementation { command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len){ return call SubAMSend.send[id](addr, msg, len);} command error_t AMSend.cancel[am_id_t id](message_t* msg){ return call SubAMSend.cancel[id](msg);} command uint8_t AMSend.maxPayloadLength[am_id_t id](){ return call SubAMSend.maxPayloadLength[id]();} command void* AMSend.getPayload[am_id_t id](message_t* msg, uint8_t len){ return call SubAMSend.getPayload[id](msg, len);} event void SubAMSend.sendDone[am_id_t id](message_t* msg, error_t error) { signal AMSend.sendDone[id](msg, error); } default event void AMSend.sendDone[am_id_t id](message_t* msg, error_t error) { return; } event message_t* SubReceive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal Receive.receive[id](msg, payload, len); } default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len){ return msg;} event message_t* SubSnoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal Snoop.receive[id](msg, payload, len); } default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len){return msg;} } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/DummySleepP.nc000066400000000000000000000041701207233610700226410ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ module DummySleepP { provides { interface Sleeptime; } } implementation { #warning "Dummy component for LowPowerListening/Sleeptime, please define MAC_REDMAC or MAC_SPECKMACD" async command void Sleeptime.setLocalSleeptime(uint16_t sT) { } async command uint16_t Sleeptime.getLocalSleeptime() { return 0; } async command void Sleeptime.setNetworkSleeptime(uint16_t sT) { } async command uint16_t Sleeptime.getNetworkSleeptime() { return 0; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/LedsP.nc000066400000000000000000000105071207233610700214450ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.6 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The implementation of the standard LED mote abstraction. * * @author Joe Polastre * @author Philip Levis * @date March 21, 2005 */ module LedsP { provides { interface Init; interface Leds; } uses { interface GeneralIO as Led0; interface GeneralIO as Led1; interface GeneralIO as Led2; } } implementation { #ifndef dbg #define dbg(n,msg) #endif command error_t Init.init() { atomic { dbg(DBG_BOOT, "LEDS: initialized.\n"); call Led0.makeOutput(); call Led1.makeOutput(); call Led2.makeOutput(); call Led0.clr(); call Led1.clr(); call Led2.clr(); } return SUCCESS; } async command void Leds.led0On() { dbg(DBG_LED, "LEDS: Led 0 on.\n"); call Led0.set(); } async command void Leds.led0Off() { dbg(DBG_LED, "LEDS: Led 0 off.\n"); call Led0.clr(); } async command void Leds.led0Toggle() { call Led0.toggle(); // this should be removed by dead code elimination when compiled for // the physical motes if (call Led0.get()) dbg(DBG_LED, "LEDS: Led 0 off.\n"); else dbg(DBG_LED, "LEDS: Led 0 on.\n"); } async command void Leds.led1On() { dbg(DBG_LED, "LEDS: Led 1 on.\n"); call Led1.set(); } async command void Leds.led1Off() { dbg(DBG_LED, "LEDS: Led 1 off.\n"); call Led1.clr(); } async command void Leds.led1Toggle() { call Led1.toggle(); if (call Led1.get()) dbg(DBG_LED, "LEDS: Led 1 off.\n"); else dbg(DBG_LED, "LEDS: Led 1 on.\n"); } async command void Leds.led2On() { dbg(DBG_LED, "LEDS: Led 2 on.\n"); call Led2.set(); } async command void Leds.led2Off() { dbg(DBG_LED, "LEDS: Led 2 off.\n"); call Led2.clr(); } async command void Leds.led2Toggle() { call Led2.toggle(); if (call Led2.get()) dbg(DBG_LED, "LEDS: Led 2 off.\n"); else dbg(DBG_LED, "LEDS: Led 2 on.\n"); } async command uint8_t Leds.get() { uint8_t rval; atomic { rval = 0; if (call Led0.get()) { rval |= LEDS_LED0; } if (call Led1.get()) { rval |= LEDS_LED1; } if (call Led2.get()) { rval |= LEDS_LED2; } return rval; } } async command void Leds.set(uint8_t val) { atomic { if (val & LEDS_LED0) { call Leds.led0On(); } else { call Leds.led0Off(); } if (val & LEDS_LED1) { call Leds.led1On(); } else { call Leds.led1Off(); } if (val & LEDS_LED2) { call Leds.led2On(); } else { call Leds.led2Off(); } } } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/LocalTimeC.nc000066400000000000000000000037261207233610700224170ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration LocalTimeC { provides { interface LocalTime as LocalTimeT32khz; interface WideLocalTime as WideLocalTime; } } implementation { components LocalTimeP, Counter32khz16C as Counter; LocalTimeT32khz = LocalTimeP; WideLocalTime = LocalTimeP; LocalTimeP.Counter32khz16 -> Counter; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/LocalTimeP.nc000066400000000000000000000064071207233610700224330ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ module LocalTimeP { provides { interface LocalTime as LocalTime32kHz; interface WideLocalTime as WideLocalTime; } uses { interface Counter as Counter32khz16; } } implementation { typedef union { int64_t op; struct { uint32_t lo; int32_t hi; }; } i64parts_t; uint16_t counter2sec = 126; int32_t dayCounter = 0; bool increaseDay = FALSE; async command uint32_t LocalTime32kHz.get() { uint32_t time; unsigned t; bool dirty1; bool dirty2; atomic { increaseDay = FALSE; do { dirty1 = call Counter32khz16.isOverflowPending(); t = call Counter32khz16.get(); dirty2 = call Counter32khz16.isOverflowPending(); } while (dirty1 != dirty2); time = counter2sec; if(dirty1) { ++time; if(time == 0) { increaseDay = TRUE; } } time = (time << 16) + t; } return time; } async command int64_t WideLocalTime.get() { i64parts_t time; uint32_t t; atomic { t = call LocalTime32kHz.get(); time.hi = dayCounter; if(increaseDay) time.hi++; if(time.hi < 0) time.hi = 0; time.lo = t; } return time.op; } async event void Counter32khz16.overflow() { ++counter2sec; if(counter2sec == 0) ++dayCounter; if(dayCounter < 0) dayCounter = 0; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/LplC.nc000066400000000000000000000041311207233610700212640ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration LplC { provides { interface LowPowerListening; } } implementation { #ifdef MAC_REDMAC components RedMacC as Mac; #elif defined(MAC_SPECKMACD) components SpeckMacDC as Mac; #else components DummySleepP as Mac; #endif components LplP as Lpl, new Alarm32khz16C() as Timer, RandomLfsrC; LowPowerListening = Lpl; Lpl.Sleeptime -> Mac; Lpl.Random -> RandomLfsrC; Lpl.Timer -> Timer; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/LplP.nc000066400000000000000000000077631207233610700213170ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ module LplP { provides { interface LowPowerListening; } uses { interface Sleeptime; interface Alarm as Timer; interface Random; } } implementation { #ifdef MAC_REDMAC #define ON_TIME 15 #elif defined(MAC_SPECKMACD) #define ON_TIME 5 #else #define ON_TIME 1 #endif #define MIN_SLEEP 2048 norace uint16_t localsleep; async event void Timer.fired() { call Sleeptime.setLocalSleeptime(localsleep); } command void LowPowerListening.setLocalSleepInterval(uint16_t sleepIntervalMs) { if(sleepIntervalMs < 0x7FF) { localsleep = (sleepIntervalMs * 32); } else { localsleep = 0xffff; } if(localsleep < MIN_SLEEP) localsleep = MIN_SLEEP; call Timer.start(call Random.rand16()); }; command uint16_t LowPowerListening.getLocalSleepInterval() { return call Sleeptime.getLocalSleeptime() / 32; }; command void LowPowerListening.setLocalDutyCycle(uint16_t dutyCycle) { call LowPowerListening.setLocalSleepInterval(dutyCycle * ON_TIME); }; command uint16_t LowPowerListening.getLocalDutyCycle() { return call LowPowerListening.getLocalSleepInterval() / ON_TIME; }; command void LowPowerListening.setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs) { uint16_t rsleep; if(sleepIntervalMs < 0x7FF) { rsleep = (sleepIntervalMs * 32); } else { rsleep = 0xffffU; } if(rsleep < MIN_SLEEP) rsleep = MIN_SLEEP; call Sleeptime.setNetworkSleeptime(rsleep); }; command uint16_t LowPowerListening.getRxSleepInterval(message_t *msg) { return call Sleeptime.getNetworkSleeptime() / 32; } command void LowPowerListening.setRxDutyCycle(message_t *msg, uint16_t dutyCycle) { call LowPowerListening.setRxSleepInterval(msg, dutyCycle * ON_TIME); } command uint16_t LowPowerListening.getRxDutyCycle(message_t *msg) { return call LowPowerListening.getRxSleepInterval(msg) / ON_TIME; } command uint16_t LowPowerListening.dutyCycleToSleepInterval(uint16_t dutyCycle) { return dutyCycle * ON_TIME; } command uint16_t LowPowerListening.sleepIntervalToDutyCycle(uint16_t sleepInterval) { return sleepInterval / ON_TIME; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/PacketStampC.nc000066400000000000000000000044621207233610700227600ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration PacketStampC { provides { interface TimeSyncPacket as TimeSyncPacket32khz; interface PacketTimeStamp as PacketTimeStamp32khz; interface TimeSyncPacket as TimeSyncPacketMilli; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components PacketStampP as PS; components LocalTimeC as LT; components HilTimerMilliC as HilMilli; PacketTimeStamp32khz = PS; TimeSyncPacket32khz = PS; PacketTimeStampMilli = PS; TimeSyncPacketMilli = PS; PS.LocalTime32khz -> LT; PS.LocalTimeMilli -> HilMilli; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/PacketStampP.nc000066400000000000000000000100641207233610700227700ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "radiopacketfunctions.h" module PacketStampP { provides { interface PacketTimeStamp as PacketTimeStamp32khz; interface TimeSyncPacket as TimeSyncPacket32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncPacket as TimeSyncPacketMilli; } uses { interface LocalTime as LocalTimeMilli; interface LocalTime as LocalTime32khz; } } implementation { // 32 kHz interface // get the time when SFD event was generated async command uint32_t PacketTimeStamp32khz.timestamp(message_t* msg) { return getMetadata(msg)->sfdtime; } // set the time when SFD event was generated? async command void PacketTimeStamp32khz.set(message_t* msg, uint32_t value) { getMetadata(msg)->sfdtime = value; } // return time when event was generated at the source command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg) { return getMetadata(msg)->time; }; // Milli interface // get the time when SFD was send/received async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg) { return call LocalTimeMilli.get() - (call LocalTime32khz.get() - getMetadata(msg)->sfdtime)/32; } // set the time when SFD was send/received? async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value) { getMetadata(msg)->sfdtime = call LocalTime32khz.get() - (call LocalTimeMilli.get() - value)*32; } // return time when event was generated command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg) { return call LocalTimeMilli.get() - (call LocalTime32khz.get() - getMetadata(msg)->time)/32; }; // not really supported functions, valid section command bool TimeSyncPacket32khz.isValid(message_t* msg) { return TRUE; } command bool TimeSyncPacketMilli.isValid(message_t* msg) { return TRUE; } async command bool PacketTimeStamp32khz.isValid(message_t* msg) { return TRUE; } async command bool PacketTimeStampMilli.isValid(message_t* msg) { return TRUE; } // not really supported functions, clear section async command void PacketTimeStamp32khz.clear(message_t* msg) { } async command void PacketTimeStampMilli.clear(message_t* msg) { } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/PlatformC.nc000066400000000000000000000036261207233610700223310ustar00rootroot00000000000000// $Id: PlatformC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Joe Polastre and Cory Sharp */ #include "hardware.h" configuration PlatformC { provides interface Init; } implementation { components PlatformP , Msp430ClockC ; Init = PlatformP; PlatformP.Msp430ClockInit -> Msp430ClockC.Init; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/PlatformLedsC.nc000066400000000000000000000047251207233610700231420ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $ /* Copyright (c) 2000-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Joe Polastre * @author Vlado Handziski (modifications for eyesIFX) */ #include "hardware.h" configuration PlatformLedsC { provides interface GeneralIO as Led0; provides interface GeneralIO as Led1; provides interface GeneralIO as Led2; provides interface GeneralIO as Led3; uses interface Init; } implementation { components HplMsp430GeneralIOC , new Msp430GpioC() as Led0Impl , new Msp430GpioC() as Led1Impl , new Msp430GpioC() as Led2Impl , new Msp430GpioC() as Led3Impl ; components PlatformP; Init = PlatformP.LedsInit; Led0 = Led0Impl; Led0Impl -> HplMsp430GeneralIOC.Port50; Led1 = Led1Impl; Led1Impl -> HplMsp430GeneralIOC.Port51; Led2 = Led2Impl; Led2Impl -> HplMsp430GeneralIOC.Port52; Led3 = Led3Impl; Led3Impl -> HplMsp430GeneralIOC.Port53; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/PlatformP.nc000066400000000000000000000005671207233610700223470ustar00rootroot00000000000000#include "hardware.h" module PlatformP{ provides interface Init; uses interface Init as Msp430ClockInit; uses interface Init as LedsInit; } implementation { command error_t Init.init() { call Msp430ClockInit.init(); TOSH_SET_PIN_DIRECTIONS(); call LedsInit.init(); return SUCCESS; } default command error_t LedsInit.init() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/PlatformSerialC.nc000066400000000000000000000005271207233610700234660ustar00rootroot00000000000000configuration PlatformSerialC { provides interface StdControl; provides interface UartStream; } implementation { components new Msp430Uart1C() as UartC, eyesIFXSerialP; UartStream = UartC; StdControl = eyesIFXSerialP; eyesIFXSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure; eyesIFXSerialP.Resource -> UartC.Resource; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/RadioDataLinkC.nc000066400000000000000000000101661207233610700232100ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * provides preamble sampling csma with timestamping * - Revision ------------------------------------------------------------- * $Revision: 1.9 $ * $Date: 2010-01-24 23:02:37 $ * @author: Kevin Klues (klues@tkn.tu-berlin.de) * ======================================================================== */ configuration RadioDataLinkC { provides { interface SplitControl; interface Send; interface Receive; interface Packet; interface PacketAcknowledgements; } } implementation { components //Change components below as desired Tda5250RadioC as Radio, //The actual Tda5250 radio over which data is receives/transmitted #ifdef PHY_MANCHESTER UartManchPhyC as UartPhy, #else Uart4b6bPhyC as UartPhy, //The UartPhy turns Bits into Bytes #endif PacketSerializerP as PacketSerializer, //The PacketSerializer turns Bytes into Packets #ifdef MAC_REDMAC RedMacC as Mac, //The MAC protocol to use #elif defined(MAC_SPECKMACD) SpeckMacDC as Mac, //The MAC protocol to use #else CsmaMacC as Mac, //The MAC protocol to use #endif LinkLayerC as Llc; //The Link Layer Control module to use //Don't change wirings below this point, just change which components //They are compposed of in the list above SplitControl = Llc; Llc.MacSplitControl -> Mac.SplitControl; Llc.RadioSplitControl -> Radio.SplitControl; Send = Llc.Send; Receive = Llc.Receive; PacketAcknowledgements = Llc; Packet = Mac; Llc.SendDown->Mac.MacSend; Llc.ReceiveLower->Mac.MacReceive; Llc.Packet->Mac.Packet; Mac.SubPacket->PacketSerializer.Packet; Mac.PacketSend->PacketSerializer.PhySend; Mac.PacketReceive->PacketSerializer.PhyReceive; Mac.Tda5250Control->Radio; Mac.UartPhyControl -> UartPhy; Mac.RadioTimeStamping -> PacketSerializer.RadioTimeStamping; PacketSerializer.RadioByteComm -> UartPhy.SerializerRadioByteComm; PacketSerializer.PhyPacketTx -> UartPhy.PhyPacketTx; PacketSerializer.PhyPacketRx -> UartPhy.PhyPacketRx; UartPhy.RadioByteComm -> Radio.RadioByteComm; #ifndef RADIO_UART_VCO components SmclkManagerC; #endif #ifdef PACKETSERIALIZER_DEBUG components new SerialDebugC() as SD; PacketSerializer.SerialDebug -> SD; #endif } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/SmclkManagerC.nc000066400000000000000000000037011207233610700231030ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $Revision: 1.2 $ * $Date: 2007-03-10 22:03:48 $ */ /** * * @author: Andreas Koepke */ configuration SmclkManagerC { } implementation { components SmclkManagerP; components MainC; SmclkManagerP.Boot -> MainC; components Tda5250RadioC; SmclkManagerP.ClkDiv -> Tda5250RadioC; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/SmclkManagerP.nc000066400000000000000000000044351207233610700231250ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $Revision: 1.2 $ * $Date: 2007-03-10 22:03:48 $ */ /** * * @author: Andreas Koepke */ module SmclkManagerP { uses { interface Boot; interface ClkDiv; } } implementation { event void Boot.booted() { ; } async event void ClkDiv.startDone() { atomic { BCSCTL1 &= ~XT2OFF; BCSCTL2 = SELS; } } async event void ClkDiv.stopping() { uint16_t sr; atomic { BCSCTL1 |= XT2OFF; BCSCTL2 = DIVS1; sr = READ_SR; sr &= ~SR_SCG1; __asm__ __volatile__( "bis %0, r2" : : "m" (sr) ); } } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/TimeSyncMessageC.nc000066400000000000000000000053501207233610700236010ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Expose the time sync capabilities of the eyesIFX platform */ configuration TimeSyncMessageC { provides { interface SplitControl; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components TimeSyncMessageP as TS; components ActiveMessageC as AM; components PacketStampC as PS; SplitControl = AM; Receive = AM.Receive; Snoop = AM.Snoop; Packet = AM; AMPacket = AM; TS.SubSend -> AM.AMSend; TS.AMPacket -> AM.AMPacket; TS.PacketTimeStamp32khz -> PS; TS.PacketTimeStampMilli -> PS; TimeSyncAMSend32khz = TS; TimeSyncAMSendMilli = TS; TimeSyncPacket32khz = TS; TimeSyncPacketMilli = TS; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/TimeSyncMessageP.nc000066400000000000000000000122611207233610700236150ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Expose the time sync capabilities of the eyesIFX platform */ module TimeSyncMessageP { provides { interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } uses { interface AMSend as SubSend[am_id_t id]; interface AMPacket; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { typedef enum { NONE, RES_32_K, RES_1_K } resolution_t; resolution_t resolution = NONE; command error_t TimeSyncAMSend32khz.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time) { call PacketTimeStamp32khz.set(msg, event_time); resolution = RES_32_K; return call SubSend.send[id](addr, msg, len); } command error_t TimeSyncAMSend32khz.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel[id](msg); } command uint8_t TimeSyncAMSend32khz.maxPayloadLength[am_id_t id]() { return call SubSend.maxPayloadLength[id](); } command void* TimeSyncAMSend32khz.getPayload[am_id_t id](message_t* m, uint8_t len) { return call SubSend.getPayload[id](m, len); } command bool TimeSyncPacket32khz.isValid(message_t* msg) { return call PacketTimeStamp32khz.isValid(msg); } command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg) { return call PacketTimeStamp32khz.timestamp(msg); }; command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time) { call PacketTimeStampMilli.set(msg, event_time); resolution = RES_1_K; return call SubSend.send[id](addr, msg, len); } command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg) { return call SubSend.cancel[id](msg); } command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]() { return call SubSend.maxPayloadLength[id](); } command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* m, uint8_t len) { return call SubSend.getPayload[id](m, len); } command bool TimeSyncPacketMilli.isValid(message_t* msg) { return call PacketTimeStamp32khz.isValid(msg); } command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg) { return call PacketTimeStampMilli.timestamp(msg); }; event void SubSend.sendDone[uint8_t id](message_t* msg, error_t result) { if(resolution == RES_32_K) { signal TimeSyncAMSend32khz.sendDone[id](msg, result); } else { signal TimeSyncAMSendMilli.sendDone[id](msg, result); } } default event void TimeSyncAMSend32khz.sendDone[uint8_t id](message_t* msg, error_t err) { return; } default event void TimeSyncAMSendMilli.sendDone[uint8_t id](message_t* msg, error_t err) { return; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/WhiteBitAccessorC.nc000066400000000000000000000040521207233610700237410ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Accessor module for link quality * * @author Andreas Koepke */ #include "radiopacketfunctions.h" module WhiteBitAccessorC { provides { interface LinkPacketMetadata; } } implementation { async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) { bool res = FALSE; if(getMetadata(msg)->strength > 13) res = TRUE; return res; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/WideLocalTime.nc000066400000000000000000000037331207233610700231230ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * A wide version of the localtime interface, 32 bit are too narrow */ #include "Timer.h" interface WideLocalTime { /** * Return current time. Time starts counting at boot - some time sources * may stop counting while the processor is in low-power mode. * * @return Current time. */ async command int64_t get(); } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/000077500000000000000000000000001207233610700222325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMC.nc000066400000000000000000000055161207233610700266630ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Configuration for the fixed Rssi Threshold module. * * @author: Kevin Klues (klues@tkn.tu-berlin.de) * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ // #define RSSI_FIXED_DEBUG configuration RssiFixedThresholdCMC { provides { interface StdControl; interface ChannelMonitor; interface ChannelMonitorControl; interface ChannelMonitorData; interface BatteryLevel; interface Resource as RssiAdcResource; } } implementation { components RssiFixedThresholdCMP, new RssiSensorVccC() as Rssi, new BatteryLevelSensorC() as Voltage, new TimerMilliC() as Timer, MainC; MainC.SoftwareInit -> RssiFixedThresholdCMP; StdControl = RssiFixedThresholdCMP; RssiAdcResource = Rssi; RssiFixedThresholdCMP.Rssi -> Rssi; RssiFixedThresholdCMP.Voltage -> Voltage; ChannelMonitor = RssiFixedThresholdCMP; ChannelMonitorControl = RssiFixedThresholdCMP; ChannelMonitorData = RssiFixedThresholdCMP; BatteryLevel = RssiFixedThresholdCMP; RssiFixedThresholdCMP.Timer -> Timer; #ifdef RSSI_FIXED_DEBUG components new SerialDebugC() as SD; RssiFixedThresholdCMP.SerialDebug -> SD; #endif } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMP.nc000066400000000000000000000310171207233610700266730ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004-2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2008-08-14 13:14:09 $ * @author: Kevin Klues (klues@tkn.tu-berlin.de) * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de) * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ includes shellsort; module RssiFixedThresholdCMP { provides { interface Init; interface StdControl; interface ChannelMonitor; interface ChannelMonitorControl; interface ChannelMonitorData; interface BatteryLevel; } uses { interface ReadNow as Rssi; interface Read as Voltage; interface Timer as Timer; #ifdef RSSI_FIXED_DEBUG interface SerialDebug; #endif } } implementation { #ifdef RSSI_FIXED_DEBUG void sdDebug(uint16_t p) { call SerialDebug.putPlace(p); } #else void sdDebug(uint16_t p) {}; #endif /* Measure internal voltage every 20s */ #define VOLTAGE_SAMPLE_INTERVALL 20000 /* * Number of samples for noisefloor estimation * Actually the size of the array for the median */ #define NSAMPLES 5 /* * If the channel is seen more then DEADLOCK times * in a row busy, update noisefloor nonetheless. */ #define DEADLOCK 10 /* * Initital noisefloor from data sheet ca. 350mV * Seems to depend on many things, usually values around * 250 mV are observed for the eyesIFXv2 node, but 450 has also * been measured as noise floor. It is also not stable, depending * on the placement of the node (USB cable shielding!) */ #define NOISE_FLOOR 480 // raw value compared to 3V // mu + 3*sigma -> rare event, outlier? #define THREE_SIGMA 145 // 75 mV measured against 3V Vcc #define INITIAL_BUSY_DELTA 100 // 3000/2 mV measured against 2.5V Ref #define INITIAL_BATTERY_LEVEL 2457 /*** calibration stuff *************************/ #define UPDATE_NF_RUNS 10 #define MINIMUM_POSITION 0 #define RSSI_SAMPLE_INTERVALL 20 // it makes no sense to check the channel too often /*** variable type definitions ******************/ typedef enum { VOID, CALIBRATE, // update noisefloor IDLE, // noisefloor up to date, nothing is currently attempted CCA, // in clear channel assessment SNR // measureing SNR } state_t; /**************** Variables *******************/ state_t state; // what we try to do int16_t gradient; // how to convert mV to dB in mV/dB uint16_t noisefloor; // [raw value against Vcc] uint16_t batteryLevel; // [raw value against 2.5V ref] /* if the rssi value exceeds noisefloor + busyDelta * the channel is busy */ uint16_t busyDelta; // [raw value against Vcc] // noise floor estimation uint16_t rssisamples[NSAMPLES]; uint8_t rssiindex; // deadlock protection counter uint8_t deadlockCounter; // last rssi reading uint16_t rssi; // rssi in [mV] /**************** Tasks *******************/ task void UpdateNoiseFloorTask(); // task void GetChannelStateTask(); task void SnrReadyTask(); task void CalibrateNoiseFloorTask(); // task void GetSnrTask(); task void CalibrateTask(); task void GetVoltageTask(); /***************** Helper function *************/ int16_t computeSNR(uint16_t r) { uint32_t delta; uint16_t snr; if(r > noisefloor) { delta = r - noisefloor; // speedily cacluate // (2*batteryLevel*2500mV*delta)/(4095*4095*gradient) snr = ((((uint32_t)batteryLevel*39)>>5)*delta>>12)/gradient; } else { snr = 0; } return snr; } /**************** Init *******************/ command error_t Init.init() { atomic { noisefloor = NOISE_FLOOR; rssiindex = 0; batteryLevel = INITIAL_BATTERY_LEVEL; busyDelta = INITIAL_BUSY_DELTA; state = VOID; gradient = 14; // gradient of TDA5250 /* call Led3.makeOutput(); call Led3.clr(); */ } #ifdef RSSI_FIXED_DEBUG call SerialDebug.putShortDesc("Rssi"); #endif return SUCCESS; } /**************** StdControl *******************/ command error_t StdControl.start() { return post GetVoltageTask(); } command error_t StdControl.stop() { call Timer.stop(); return SUCCESS; } /**************** RSSI *******************/ inline void addSample(uint16_t data) { if(rssiindex < NSAMPLES) rssisamples[rssiindex++] = data; deadlockCounter = 0; if(rssiindex >= NSAMPLES) post UpdateNoiseFloorTask(); } error_t rssiRead() { return call Rssi.read(); } async event void Rssi.readDone(error_t result, uint16_t data) { switch(state) { case CCA: state = IDLE; if(data < noisefloor + busyDelta) { signal ChannelMonitor.channelIdle(); addSample(data); } else { signal ChannelMonitor.channelBusy(); if(++deadlockCounter >= DEADLOCK) addSample(data); } break; case SNR: rssi = data; post SnrReadyTask(); break; case CALIBRATE: rssi = data; post CalibrateNoiseFloorTask(); break; default: break; } } /**************** Voltage *******************/ void readVoltage() { if(call Voltage.read() != SUCCESS) post GetVoltageTask(); } task void GetVoltageTask() { readVoltage(); } event void Voltage.readDone(error_t result, uint16_t data) { uint16_t nbl; int16_t d; uint16_t nbD; uint16_t bD; if(result == SUCCESS) { nbl = (data + batteryLevel)>>1; atomic bD = busyDelta; d = batteryLevel - nbl; sdDebug(10000 + batteryLevel); sdDebug(20000 + data); sdDebug(30000 + nbl); sdDebug(40000U + busyDelta); if(d > 75 || d < -75) { // recalculate busyDelta, // noisefloor already adapted by floating nbD = ((uint32_t)batteryLevel*(uint32_t)busyDelta)/(uint32_t)nbl; atomic busyDelta = nbD; batteryLevel = nbl; } sdDebug(50000U + busyDelta); } else { post GetVoltageTask(); } } /**************** ChannelMonitor *******************/ async command error_t ChannelMonitor.start() { error_t res = FAIL; atomic { if(state == IDLE) { res = rssiRead(); if(res == SUCCESS) state = CCA; } else if(state == CCA) { res = SUCCESS; } } return res; } async command void ChannelMonitor.rxSuccess() { atomic { if((deadlockCounter > 0) && (deadlockCounter < DEADLOCK)) { --deadlockCounter; } } } task void UpdateNoiseFloorTask() { shellsort(rssisamples,NSAMPLES); atomic { noisefloor = (5*noisefloor + rssisamples[NSAMPLES/2] + 3)/6; rssiindex = 0; } sdDebug(60000U + noisefloor); } /**************** ChannelMonitorControl ************/ command async error_t ChannelMonitorControl.updateNoiseFloor() { return post CalibrateTask(); } task void CalibrateTask() { atomic { if((state != IDLE) && (state != VOID)) { post CalibrateTask(); } else { state = CALIBRATE; deadlockCounter = 0; call Timer.stop(); call Timer.startPeriodic(RSSI_SAMPLE_INTERVALL); } } } task void CalibrateNoiseFloorTask() { atomic { if(rssiindex < NSAMPLES) { rssisamples[rssiindex++] = rssi; } else { shellsort(rssisamples,NSAMPLES); if(rssisamples[MINIMUM_POSITION] < noisefloor + THREE_SIGMA) { noisefloor = (7*noisefloor + rssisamples[NSAMPLES/2] + 4)/8; ++deadlockCounter; } else { noisefloor += THREE_SIGMA/8; } rssiindex = 0; } if(deadlockCounter > UPDATE_NF_RUNS) { state = IDLE; deadlockCounter = 0; call Timer.stop(); call Timer.startPeriodic(VOLTAGE_SAMPLE_INTERVALL); signal ChannelMonitorControl.updateNoiseFloorDone(); } } } event void Timer.fired() { state_t s; atomic s = state; if(s != CALIBRATE) { readVoltage(); } else { rssiRead(); } } /**************** ChannelMonitorData ************/ async command void ChannelMonitorData.setGradient(int16_t grad) { // needed to convert RSSI into dB atomic gradient = grad; } async command int16_t ChannelMonitorData.getGradient() { int16_t v; atomic v = gradient; return v; } async command uint16_t ChannelMonitorData.getNoiseFloor() { uint16_t v; atomic v = noisefloor; return v; } async command error_t ChannelMonitorData.getSnr() { error_t res = FAIL; atomic { if(state == IDLE) { res = rssiRead(); if(res == SUCCESS) state = SNR; } else if(state == SNR) { res = SUCCESS; } } return res; } task void SnrReadyTask() { int16_t snr; state_t s; uint16_t r; atomic { r = rssi; s = state; if(state == SNR) state = IDLE; } if(s == SNR) { snr = computeSNR(r); signal ChannelMonitorData.getSnrDone(snr); } } async command uint16_t ChannelMonitorData.readSnr() { uint16_t rval; if(rssi > noisefloor) { rval = (rssi-noisefloor)>>4; } else { rval = 3; } return rval; } default async event void ChannelMonitorData.getSnrDone(int16_t snr) { } /***** BatteryLevel ***************/ // get the batterylevel in mV async command uint16_t BatteryLevel.getLevel() { uint16_t l; atomic l = batteryLevel; return (uint32_t)(l+3)*6/5; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/Uart4b6bPhyC.nc000066400000000000000000000051051207233610700247320ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Configuration for the byte radio physical layer. Together with the * PacketSerializerP the UartPhyP module turns byte streams into packets. * This one 4b6b encodes/decodes a byte stream * * @see PacketSerializerP * * @author Philipp Huppertz */ configuration Uart4b6bPhyC { provides{ interface PhyPacketTx; interface RadioByteComm as SerializerRadioByteComm; interface PhyPacketRx; interface UartPhyControl; } uses { interface RadioByteComm; } } implementation { components new Alarm32khz16C() as RxByteTimer, Uart4b6bPhyP, MainC; MainC.SoftwareInit -> Uart4b6bPhyP; PhyPacketRx = Uart4b6bPhyP; SerializerRadioByteComm = Uart4b6bPhyP; RadioByteComm = Uart4b6bPhyP; PhyPacketTx = Uart4b6bPhyP; UartPhyControl = Uart4b6bPhyP; Uart4b6bPhyP.RxByteTimer -> RxByteTimer; #ifdef UART_DEBUG components new SerialDebugC() as SD; Uart4b6bPhyP.SerialDebug -> SD; #endif } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/Uart4b6bPhyP.nc000066400000000000000000000334601207233610700247540ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "code4b6b.h" /** * Implementation of the physical layer for the eyesIFX byte radio. * Together with the PacketSerializerP this module turns byte streams * into packets. * * @author Andreas Koepke */ module Uart4b6bPhyP { provides { interface Init; interface PhyPacketTx; interface RadioByteComm as SerializerRadioByteComm; interface PhyPacketRx; interface UartPhyControl; } uses { interface RadioByteComm; interface Alarm as RxByteTimer; #ifdef UART_DEBUG interface SerialDebug; #endif } } implementation { #ifdef UART_DEBUG void sdDebug(uint16_t p) { call SerialDebug.putPlace(p); } #else void sdDebug(uint16_t p) {}; #endif /* Module Definitions */ typedef enum { STATE_PREAMBLE, STATE_PREAMBLE_CODE, STATE_SYNC, STATE_SFD1, STATE_SFD2, STATE_SFD3, STATE_HEADER_DONE, STATE_DATA_HIGH_OR_SFD, STATE_DATA_HIGH, STATE_DATA_MIDDLE, STATE_DATA_LOW, STATE_DATA_LOW_FOOTER, STATE_FOOTER_START, STATE_FOOTER_DONE } phyState_t; /* constants */ enum { PREAMBLE_LENGTH=2, BYTE_TIME=TDA5250_32KHZ_BYTE_TIME+3, PREAMBLE_BYTE=0x55, SYNC_BYTE=0xFF, SFD_BYTE=0x83, SFD_BYTE2=0x7c }; /** Module Global Variables */ phyState_t phyState; // Current Phy state State uint16_t preambleCount; uint16_t numPreambles; // Number of preambles to send before the packet uint8_t byteTime; // max. time between two bytes uint8_t bufByte; /* Local Function Declarations */ void TransmitNextByte(); void ReceiveNextByte(uint8_t data); /* Radio Init */ command error_t Init.init(){ atomic { phyState = STATE_PREAMBLE; numPreambles = PREAMBLE_LENGTH; byteTime = BYTE_TIME; } #ifdef UART_DEBUG call SerialDebug.putShortDesc("U4b6bP"); #endif return SUCCESS; } async command error_t UartPhyControl.setNumPreambles(uint16_t numPreambleBytes) { atomic { numPreambles = numPreambleBytes; } return SUCCESS; } command error_t UartPhyControl.setByteTimeout(uint8_t byteTimeout) { if (call RxByteTimer.isRunning() == TRUE) { return FAIL; } else { byteTime = byteTimeout * 33; return SUCCESS; } } async command bool UartPhyControl.isBusy() { return phyState != STATE_PREAMBLE; } void resetState() { call RxByteTimer.stop(); if(phyState >= STATE_DATA_HIGH) { signal PhyPacketRx.recvFooterDone(FAIL); sdDebug(10); } phyState = STATE_PREAMBLE; } async event void RxByteTimer.fired() { // no bytes have arrived, so... resetState(); } async command void PhyPacketTx.sendHeader() { phyState = STATE_PREAMBLE; preambleCount = numPreambles; TransmitNextByte(); } async command void SerializerRadioByteComm.txByte(uint8_t data) { uint8_t high = nibbleToSixBit[(data & 0xf0) >> 4]; uint8_t low = nibbleToSixBit[data & 0x0f]; if(phyState == STATE_DATA_HIGH) { high <<= 2; if(low & 0x20) high |= 2; if(low & 0x10) high |= 1; bufByte = low << 4; call RadioByteComm.txByte(high); phyState = STATE_DATA_MIDDLE; } else { call RadioByteComm.txByte(bufByte | (high >> 2)); if(high & 0x02) low |= 0x80; if(high & 0x01) low |= 0x40; bufByte = low; phyState = STATE_DATA_LOW; } } async command bool SerializerRadioByteComm.isTxDone() { return call RadioByteComm.isTxDone(); } async command void PhyPacketTx.sendFooter() { if(phyState == STATE_DATA_MIDDLE) { bufByte |= (nibbleToSixBit[0] >> 2); phyState = STATE_DATA_LOW_FOOTER; call RadioByteComm.txByte(bufByte); } else { phyState = STATE_FOOTER_START; TransmitNextByte(); } } /* Radio Recv */ async command void PhyPacketRx.recvFooter() { // currently there is no footer // atomic phyState = STATE_FOOTER_START; phyState = STATE_PREAMBLE; call RxByteTimer.stop(); signal PhyPacketRx.recvFooterDone(SUCCESS); sdDebug(20); } /* Tx Done */ async event void RadioByteComm.txByteReady(error_t error) { if(error == SUCCESS) { TransmitNextByte(); } else { signal SerializerRadioByteComm.txByteReady(error); phyState = STATE_PREAMBLE; } } void TransmitNextByte() { switch(phyState) { case STATE_PREAMBLE: if(preambleCount > 1) { preambleCount--; } else { phyState = STATE_SYNC; } call RadioByteComm.txByte(PREAMBLE_BYTE); break; case STATE_SYNC: phyState = STATE_SFD1; call RadioByteComm.txByte(SYNC_BYTE); break; case STATE_SFD1: phyState = STATE_SFD2; call RadioByteComm.txByte(SFD_BYTE); break; case STATE_SFD2: phyState = STATE_SFD3; call RadioByteComm.txByte(SFD_BYTE); break; case STATE_SFD3: phyState = STATE_HEADER_DONE; call RadioByteComm.txByte(SFD_BYTE); break; case STATE_HEADER_DONE: phyState = STATE_DATA_HIGH; signal PhyPacketTx.sendHeaderDone(); break; case STATE_DATA_HIGH: signal SerializerRadioByteComm.txByteReady(SUCCESS); break; case STATE_DATA_MIDDLE: signal SerializerRadioByteComm.txByteReady(SUCCESS); break; case STATE_DATA_LOW: call RadioByteComm.txByte(bufByte); phyState = STATE_DATA_HIGH; break; case STATE_DATA_LOW_FOOTER: phyState = STATE_FOOTER_START; call RadioByteComm.txByte(bufByte); break; case STATE_FOOTER_START: /* Pseudo-Footer: the MSP430 has two buffers: one for * transmit, one to store the next byte to be transmitted, * this footer fills the next-to-transmit buffer, to make * sure that the last real byte is actually * transmitted. The byte stored by this call may not be * transmitted fully or not at all. */ phyState = STATE_FOOTER_DONE; call RadioByteComm.txByte(bufByte); break; case STATE_FOOTER_DONE: phyState = STATE_PREAMBLE; signal PhyPacketTx.sendFooterDone(); break; default: break; } } /* Rx Done */ async event void RadioByteComm.rxByteReady(uint8_t data) { uint8_t decodedByte; uint8_t low; uint8_t high; if((data == SFD_BYTE) && (phyState != STATE_SFD2) && (phyState != STATE_DATA_HIGH_OR_SFD)) { resetState(); phyState = STATE_SFD2; call RxByteTimer.start(byteTime<<1); } else { switch(phyState) { case STATE_SFD2: if(data == SFD_BYTE) { phyState = STATE_DATA_HIGH_OR_SFD; call RxByteTimer.start(byteTime << 1); } else { resetState(); } break; case STATE_DATA_HIGH_OR_SFD: if(data != SFD_BYTE) { decodedByte = sixBitToNibble[data >> 2]; if(decodedByte != ILLEGAL_CODE) { bufByte = decodedByte << 2; bufByte |= data & 0x03; bufByte <<= 2; phyState = STATE_DATA_MIDDLE; call RxByteTimer.stop(); signal PhyPacketRx.recvHeaderDone(SUCCESS); call RxByteTimer.start(byteTime); } else { resetState(); } } else { phyState = STATE_DATA_HIGH; call RxByteTimer.stop(); signal PhyPacketRx.recvHeaderDone(SUCCESS); call RxByteTimer.start(byteTime); } break; case STATE_DATA_HIGH: decodedByte = sixBitToNibble[data >> 2]; if(decodedByte != ILLEGAL_CODE) { bufByte = decodedByte << 2; bufByte |= data & 0x03; bufByte <<= 2; phyState = STATE_DATA_MIDDLE; call RxByteTimer.start(byteTime); } else { resetState(); } break; case STATE_DATA_MIDDLE: decodedByte = sixBitToNibble[((bufByte & 0x0f)<<2) | (data >> 4)]; if(decodedByte != ILLEGAL_CODE) { phyState = STATE_DATA_LOW; call RxByteTimer.stop(); signal SerializerRadioByteComm.rxByteReady((bufByte & 0xf0) | decodedByte); bufByte = (data & 0x0f) << 2; call RxByteTimer.start(byteTime); } else { resetState(); } break; case STATE_DATA_LOW: decodedByte = sixBitToNibble[bufByte | (data >> 6)]; if(decodedByte != ILLEGAL_CODE) { bufByte = (decodedByte << 4); decodedByte = sixBitToNibble[data & 0x3f]; if(decodedByte != ILLEGAL_CODE) { phyState = STATE_DATA_HIGH; call RxByteTimer.stop(); signal SerializerRadioByteComm.rxByteReady(bufByte | decodedByte); call RxByteTimer.start(byteTime); } else { resetState(); } } else { resetState(); } break; case STATE_PREAMBLE: low = data & 0xf; high = data >> 4; if((low > 0) && (low < 0xf) && (high > 0) && (high < 0xf)) { phyState = STATE_PREAMBLE_CODE; call RxByteTimer.start(byteTime); } break; case STATE_PREAMBLE_CODE: low = data & 0xf; high = data >> 4; if((low == 0) || (low == 0xf) || (high == 0) || (high == 0xf)) { phyState = STATE_PREAMBLE; } else { call RxByteTimer.start(byteTime); } break; // maybe there will be a time.... we will need this. but for now there is no footer //case STATE_FOOTER_START: //phyState = STATE_FOOTER_DONE; //break; //case STATE_FOOTER_DONE: //phyState = STATE_NULL; //signal PhyPacketRx.recvFooterDone(TRUE); //break; default: break; } } } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/UartManchPhyC.nc000066400000000000000000000055251207233610700252310ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * @author: Philipp Huppertz * ======================================================================== */ /** * Configuration for the byte radio physical layer. Together with the * PacketSerializerP the UartPhyP module turns byte streams into packets. * * @see PacketSerializerP * * @author Philipp Huppertz */ configuration UartManchPhyC { provides{ interface PhyPacketTx; interface RadioByteComm as SerializerRadioByteComm; interface PhyPacketRx; interface UartPhyControl; } uses { interface RadioByteComm; } } implementation { components new Alarm32khz16C() as RxByteTimer, UartManchPhyP, // PlatformLedsC, MainC; MainC.SoftwareInit -> UartManchPhyP; PhyPacketRx = UartManchPhyP; SerializerRadioByteComm = UartManchPhyP; RadioByteComm = UartManchPhyP; PhyPacketTx = UartManchPhyP; UartPhyControl = UartManchPhyP; UartManchPhyP.RxByteTimer -> RxByteTimer; // PlatformLedsC.Led0 <- UartManchPhyP.Led0; // PlatformLedsC.Led1 <- UartManchPhyP.Led1; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/UartManchPhyP.nc000066400000000000000000000264571207233610700252550ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * * - Revision ------------------------------------------------------------- * $Revision: 1.8 $ * $Date: 2008-03-05 11:20:43 $ * @author: Kevin Klues (klues@tkn.tu-berlin.de) * @author: Philipp Huppertz * ======================================================================== */ #include "manchester.h" /** * Implementation of the physical layer for the eyesIFX byte radio. * Together with the PacketSerializerP this module turns byte streams * into packets. * * @author Kevin Klues * @author Philipp Huppertz */ module UartManchPhyP { provides { interface Init; interface PhyPacketTx; interface RadioByteComm as SerializerRadioByteComm; interface PhyPacketRx; interface UartPhyControl; } uses { interface RadioByteComm; interface Alarm as RxByteTimer; } } implementation { /* Module Definitions */ typedef enum { STATE_PREAMBLE, STATE_PREAMBLE_MANCHESTER, STATE_SYNC, STATE_SFD, STATE_HEADER_DONE, STATE_DATA_HIGH, STATE_DATA_LOW, STATE_FOOTER_START, STATE_FOOTER_DONE } phyState_t; #define PREAMBLE_LENGTH 2 #define BYTE_TIME TDA5250_32KHZ_BYTE_TIME+3 #define PREAMBLE_BYTE 0x55 #define SYNC_BYTE 0xFF #define SFD_BYTE 0x50 /** Module Global Variables */ phyState_t phyState; // Current Phy state State uint16_t preambleCount; uint16_t numPreambles; // Number of preambles to send before the packet uint8_t byteTime; // max. time between two bytes uint8_t bufByte; /* Local Function Declarations */ void TransmitNextByte(); void ReceiveNextByte(uint8_t data); /* Radio Init */ command error_t Init.init(){ atomic { phyState = STATE_PREAMBLE; numPreambles = PREAMBLE_LENGTH; byteTime = BYTE_TIME; } return SUCCESS; } async command error_t UartPhyControl.setNumPreambles(uint16_t numPreambleBytes) { atomic { numPreambles = numPreambleBytes; } return SUCCESS; } command error_t UartPhyControl.setByteTimeout(uint8_t byteTimeout) { if (call RxByteTimer.isRunning() == TRUE) { return FAIL; } else { atomic byteTime = byteTimeout * 33; return SUCCESS; } } async command bool UartPhyControl.isBusy() { return phyState != STATE_PREAMBLE; } void resetState() { atomic { call RxByteTimer.stop(); switch(phyState) { case STATE_SYNC: case STATE_SFD: signal PhyPacketRx.recvHeaderDone(FAIL); break; case STATE_DATA_HIGH: case STATE_DATA_LOW: case STATE_FOOTER_START: signal PhyPacketRx.recvFooterDone(FAIL); break; default: break; } phyState = STATE_PREAMBLE; } } async event void RxByteTimer.fired() { // no bytes have arrived, so... resetState(); } async command void PhyPacketTx.sendHeader() { atomic { phyState = STATE_PREAMBLE; preambleCount = numPreambles; } TransmitNextByte(); } async command void SerializerRadioByteComm.txByte(uint8_t data) { bufByte = data; call RadioByteComm.txByte(manchesterEncodeNibble((bufByte & 0xf0) >> 4)); phyState = STATE_DATA_LOW; } async command bool SerializerRadioByteComm.isTxDone() { return call RadioByteComm.isTxDone(); } async command void PhyPacketTx.sendFooter() { atomic phyState = STATE_FOOTER_START; TransmitNextByte(); } /* Radio Recv */ async command void PhyPacketRx.recvFooter() { // currently there is no footer // atomic phyState = STATE_FOOTER_START; atomic { phyState = STATE_PREAMBLE; } call RxByteTimer.stop(); signal PhyPacketRx.recvFooterDone(SUCCESS); } /* Tx Done */ async event void RadioByteComm.txByteReady(error_t error) { if(error == SUCCESS) { TransmitNextByte(); } else { atomic { signal SerializerRadioByteComm.txByteReady(error); phyState = STATE_PREAMBLE; } } } void TransmitNextByte() { atomic { switch(phyState) { case STATE_PREAMBLE: if(preambleCount > 1) { preambleCount--; } else { phyState = STATE_SYNC; } call RadioByteComm.txByte(PREAMBLE_BYTE); break; case STATE_SYNC: phyState = STATE_SFD; call RadioByteComm.txByte(SYNC_BYTE); break; case STATE_SFD: phyState = STATE_HEADER_DONE; call RadioByteComm.txByte(SFD_BYTE); break; case STATE_HEADER_DONE: phyState = STATE_DATA_HIGH; signal PhyPacketTx.sendHeaderDone(); break; case STATE_DATA_HIGH: signal SerializerRadioByteComm.txByteReady(SUCCESS); break; case STATE_DATA_LOW: call RadioByteComm.txByte(manchesterEncodeNibble(bufByte & 0x0f)); phyState = STATE_DATA_HIGH; break; case STATE_FOOTER_START: /* Pseudo-Footer: the MSP430 has two buffers: one for * transmit, one to store the next byte to be transmitted, * this footer fills the next-to-transmit buffer, to make * sure that the last real byte is actually * transmitted. The byte stored by this call may not be * transmitted fully or not at all. */ phyState = STATE_FOOTER_DONE; call RadioByteComm.txByte(manchesterEncodeNibble(bufByte & 0x0f)); break; case STATE_FOOTER_DONE: phyState = STATE_PREAMBLE; signal PhyPacketTx.sendFooterDone(); break; default: break; } } } /* Rx Done */ async event void RadioByteComm.rxByteReady(uint8_t data) { call RxByteTimer.start(byteTime); ReceiveNextByte(data); } /* Receive the next Byte from the USART */ void ReceiveNextByte(uint8_t data) { uint8_t decodedByte; atomic { switch(phyState) { case STATE_SYNC: if(data != PREAMBLE_BYTE) { if (data == SFD_BYTE) { signal PhyPacketRx.recvHeaderDone(SUCCESS); phyState = STATE_DATA_HIGH; } else { phyState = STATE_SFD; } } break; case STATE_SFD: if (data == SFD_BYTE) { signal PhyPacketRx.recvHeaderDone(SUCCESS); phyState = STATE_DATA_HIGH; } else { phyState = STATE_PREAMBLE; } break; case STATE_PREAMBLE: if(data == PREAMBLE_BYTE) { phyState = STATE_SYNC; } else if(manchesterDecodeByte(data) != 0xff) { phyState = STATE_PREAMBLE_MANCHESTER; } break; case STATE_PREAMBLE_MANCHESTER: if(data == PREAMBLE_BYTE) { phyState = STATE_SYNC; } else if(manchesterDecodeByte(data) == 0xff) { phyState = STATE_PREAMBLE; } break; case STATE_DATA_HIGH: decodedByte = manchesterDecodeByte(data); if(decodedByte != 0xff) { bufByte = decodedByte << 4; phyState = STATE_DATA_LOW; } else { resetState(); } break; case STATE_DATA_LOW: decodedByte = manchesterDecodeByte(data); if(decodedByte != 0xff) { bufByte |= decodedByte; phyState = STATE_DATA_HIGH; signal SerializerRadioByteComm.rxByteReady(bufByte); } else { resetState(); } break; // maybe there will be a time.... we will need this. but for now there is no footer //case STATE_FOOTER_START: //phyState = STATE_FOOTER_DONE; //break; //case STATE_FOOTER_DONE: //phyState = STATE_NULL; //signal PhyPacketRx.recvFooterDone(TRUE); //break; default: break; } } } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/code4b6b.h000066400000000000000000000065231207233610700240010ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * provide functions to encode/decode a 4b 6b stream * @author Andreas Koepke * Book: RF Monolithics, Inc: ASH Transceiver Designer's Guide, Okt 2002. * http://www.rfm.com/products/tr_des24.pdf */ #ifndef CODE_4B_6B_H #define CODE_4B_6B_H enum { ILLEGAL_CODE = 0xff, ENCODED_32KHZ_BYTE_TIME = 3*TDA5250_32KHZ_BYTE_TIME/2 }; const uint8_t nibbleToSixBit[] = { 13, // 001101 14, // 001110 19, // 010011 21, // 010101 22, // 010110 25, // 011001 26, // 011010 28, // 011100 35, // 100011 37, // 100101 38, // 100110 41, // 101001 42, // 101010 44, // 101100 50, // 110010 52 // 110100 }; const uint8_t sixBitToNibble[] = { ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, 0x00, 0x01, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, 0x02, ILLEGAL_CODE, 0x03, 0x04, ILLEGAL_CODE, ILLEGAL_CODE, 0x05, 0x06, ILLEGAL_CODE, 0x07, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, 0x08, ILLEGAL_CODE, 0x09, 0x0a, ILLEGAL_CODE, ILLEGAL_CODE, 0x0b, 0x0c, ILLEGAL_CODE, 0x0d, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, 0x0e, ILLEGAL_CODE, 0x0f, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE, ILLEGAL_CODE }; #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/byte_radio/manchester.h000066400000000000000000000067431207233610700245460ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * provide functions to encode/decode a manchester stream * - Revision ------------------------------------------------------------- * $Revision: 1.1 $ * $Date: 2008-03-05 11:14:00 $ * @author Andreas Koepke * ======================================================================== */ enum { ILLEGAL_CODE = 0xff, ENCODED_32KHZ_BYTE_TIME = 2*TDA5250_32KHZ_BYTE_TIME }; const uint8_t nibbleToManchesterByte[] = { 0x55, 0x56, 0x59, 0x5a, 0x65, 0x66, 0x69, 0x6a, 0x95, 0x96, 0x99, 0x9a, 0xa5, 0xa6, 0xa9, 0xaa }; const uint8_t manchesterByteToNibble[] = { 0x0, 0x1, 0xff, 0xff, 0x2, 0x3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x4, 0x5, 0xff, 0xff, 0x6, 0x7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8, 0x9, 0xff, 0xff, 0xa, 0xb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc, 0xd, 0xff, 0xff, 0xe, 0xf }; uint8_t manchesterEncodeNibble(uint8_t nib) { return nibbleToManchesterByte[nib]; } uint8_t manchesterDecodeByte(uint8_t b) { uint8_t dec; if(b < 0x55) { dec = 0xff; } else if(b > 0xaa) { dec = 0xff; } else { dec = manchesterByteToNibble[b - 0x55]; } return dec; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/000077500000000000000000000000001207233610700212175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/ad5200/000077500000000000000000000000001207233610700221125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/ad5200/AD5200PotIOC.nc000066400000000000000000000044651207233610700242560ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * ======================================================================== */ /** * Configuration file for using the IO pins to the AD5200 Pot on * the eyesIFX platforms. * * @author Kevin Klues */ configuration AD5200PotIOC { provides interface GeneralIO as AD5200PotENPOT; provides interface GeneralIO as AD5200PotSDPOT; } implementation { components HplMsp430GeneralIOC as MspGeneralIO , new Msp430GpioC() as rENPOT , new Msp430GpioC() as rSDPOT ; AD5200PotENPOT = rENPOT; AD5200PotSDPOT = rSDPOT; rENPOT -> MspGeneralIO.Port24; rSDPOT -> MspGeneralIO.Port23; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/msp430/000077500000000000000000000000001207233610700222455ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h000066400000000000000000000037751207233610700246610ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Override default dco clock spec. * * SMCLK runs on 1MHz for this platform, its * source may be the radio -- a * more reliable source. * * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ #ifndef MS430DCOSPEC_H #define MS430DCOSPEC_H #define TARGET_DCO_KHZ 3926 // the target MCLK clock rate in binary kHz (4 020 000 Hz) #define ACLK_KHZ 32 // the ACLK rate in binary kHz #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/msp430/Msp430Timer32khzMapC.nc000066400000000000000000000064011207233610700262020ustar00rootroot00000000000000//$Id: Msp430Timer32khzMapC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ //@author Cory Sharp /* Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz hardware timers on the MSP430 that are available for compile time allocation by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on. Platforms based on the Msp430 are encouraged to copy in and override this file, presenting only the hardware timers that are available for allocation on that platform. */ configuration Msp430Timer32khzMapC { provides interface Msp430Timer[ uint8_t id ]; provides interface Msp430TimerControl[ uint8_t id ]; provides interface Msp430Compare[ uint8_t id ]; } implementation { components Msp430TimerC; Msp430Timer[0] = Msp430TimerC.TimerB; Msp430TimerControl[0] = Msp430TimerC.ControlB0; Msp430Compare[0] = Msp430TimerC.CompareB0; Msp430Timer[1] = Msp430TimerC.TimerB; Msp430TimerControl[1] = Msp430TimerC.ControlB1; Msp430Compare[1] = Msp430TimerC.CompareB1; Msp430Timer[2] = Msp430TimerC.TimerB; Msp430TimerControl[2] = Msp430TimerC.ControlB2; Msp430Compare[2] = Msp430TimerC.CompareB2; Msp430Timer[3] = Msp430TimerC.TimerB; Msp430TimerControl[3] = Msp430TimerC.ControlB3; Msp430Compare[3] = Msp430TimerC.CompareB3; Msp430Timer[4] = Msp430TimerC.TimerB; Msp430TimerControl[4] = Msp430TimerC.ControlB4; Msp430Compare[4] = Msp430TimerC.CompareB4; Msp430Timer[5] = Msp430TimerC.TimerB; Msp430TimerControl[5] = Msp430TimerC.ControlB5; Msp430Compare[5] = Msp430TimerC.CompareB5; Msp430Timer[6] = Msp430TimerC.TimerB; Msp430TimerControl[6] = Msp430TimerC.ControlB6; Msp430Compare[6] = Msp430TimerC.CompareB6; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/000077500000000000000000000000001207233610700223035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOC.nc000066400000000000000000000045771207233610700254570ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2008-05-22 14:56:33 $ * ======================================================================== */ /** * Wiring the TDA5250 with the Msp430 Uart abstraction. * * @author Philipp Hupertz (huppertz@tkn.tu-berlin.de) */ configuration HplTda5250DataIOC { provides { interface Resource; interface ResourceRequested; interface UartStream; interface HplTda5250DataControl as UartDataControl; } } implementation { components new Msp430Uart0C(), HplTda5250DataIOP; Resource = Msp430Uart0C.Resource; ResourceRequested = Msp430Uart0C.ResourceRequested; UartStream = Msp430Uart0C.UartStream; UartDataControl = HplTda5250DataIOP.UartDataControl; HplTda5250DataIOP.UartResourceConfigure <- Msp430Uart0C.Msp430UartConfigure; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOP.nc000066400000000000000000000051651207233610700254660ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2008-05-22 14:56:33 $ * ======================================================================== */ #include "msp430usart.h" #include "tda5250BusResourceSettings.h" /** * Wrapper module for the Msp430 Uart abstraction. * * @author Philipp Hupertz (huppertz@tkn.tu-berlin.de) */ module HplTda5250DataIOP { provides { interface HplTda5250DataControl as UartDataControl; interface Msp430UartConfigure as UartResourceConfigure; } } implementation { async command error_t UartDataControl.setToTx() { atomic { tda5250_uart_config.uartConfig.utxe = 1; tda5250_uart_config.uartConfig.urxe = 0; } return SUCCESS; } async command error_t UartDataControl.setToRx() { atomic { tda5250_uart_config.uartConfig.utxe = 0; tda5250_uart_config.uartConfig.urxe = 1; } return SUCCESS; } async command msp430_uart_union_config_t* UartResourceConfigure.getConfig() { return &tda5250_uart_config; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/Tda5250ASKNFSKFakePinP.nc000066400000000000000000000010311207233610700262430ustar00rootroot00000000000000/* * The ASKNFSK Pin is not connected on the eyes platforms... */ module Tda5250ASKNFSKFakePinP { provides interface GeneralIO; } implementation { async command void GeneralIO.set(){} async command void GeneralIO.clr(){} async command void GeneralIO.toggle(){} async command bool GeneralIO.get(){ return FALSE; } async command void GeneralIO.makeInput(){} async command bool GeneralIO.isOutput() { return FALSE; } async command void GeneralIO.makeOutput(){} async command bool GeneralIO.isInput() { return FALSE; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioIOC.nc000066400000000000000000000056031207233610700251670ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * ======================================================================== */ /** * Configuration file for using the IO pins to the TDA5250 Radio on * the eyesIFX platforms. * * @author Kevin Klues */ configuration Tda5250RadioIOC { provides interface GeneralIO as Tda5250RadioPASKNFSK; provides interface GeneralIO as Tda5250RadioBUSM; provides interface GeneralIO as Tda5250RadioENTDA; provides interface GeneralIO as Tda5250RadioTXRX; provides interface GeneralIO as Tda5250RadioDATA; provides interface GeneralIO as Tda5250RadioPWDDD; } implementation { components HplMsp430GeneralIOC as MspGeneralIO , Tda5250ASKNFSKFakePinP , new Msp430GpioC() as rBUSM , new Msp430GpioC() as rENTDA , new Msp430GpioC() as rTXRX , new Msp430GpioC() as rDATA , new Msp430GpioC() as rPWDD ; Tda5250RadioBUSM = rBUSM; Tda5250RadioENTDA = rENTDA; Tda5250RadioTXRX = rTXRX; Tda5250RadioDATA = rDATA; Tda5250RadioPWDDD = rPWDD; Tda5250RadioPASKNFSK = Tda5250ASKNFSKFakePinP; rBUSM -> MspGeneralIO.Port15; rENTDA -> MspGeneralIO.Port16; rTXRX -> MspGeneralIO.Port14; rDATA -> MspGeneralIO.Port11; rPWDD -> MspGeneralIO.Port10; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioInterruptC.nc000066400000000000000000000043141207233610700266520ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * ======================================================================== */ /** * Configuration file for using the PWDDD interrupt for the TDA5250 Radio * on the eyesIFX platforms. * * @author Kevin Klues */ configuration Tda5250RadioInterruptC { provides interface GpioInterrupt; } implementation { components HplMsp430InterruptC , new Msp430InterruptC() ; GpioInterrupt = Msp430InterruptC.Interrupt; Msp430InterruptC.HplInterrupt -> HplMsp430InterruptC.Port10; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/Tda5250RegCommC.nc000066400000000000000000000056141207233610700252340ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * Controlling the TDA5250 at the HPL layer for use with the MSP430 on the * eyesIFX platforms, Configuration. * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * @author: Kevin Klues (klues@tkn.tu-berlin.de) * ======================================================================== */ #include "tda5250BusResourceSettings.h" /** * Configuration file for the registers of TDA5250 Radio on * the eyesIFX platforms. * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ configuration Tda5250RegCommC { provides { interface Init; interface Tda5250RegComm; interface Pot; interface Resource; } } implementation { components new Msp430Spi0C() as Spi , Tda5250RegCommP , Tda5250RadioIOC , AD5200P , AD5200PotIOC ; Init = Tda5250RegCommP; Init = AD5200P; Pot = AD5200P.Pot; Resource = Tda5250RegCommP.Resource; Tda5250RegComm = Tda5250RegCommP; Tda5250RegCommP.BusM -> Tda5250RadioIOC.Tda5250RadioBUSM; Tda5250RegCommP.SpiByte -> Spi; Tda5250RegCommP.SpiResource -> Spi; AD5200P.ENPOT -> AD5200PotIOC.AD5200PotENPOT; AD5200P.SDPOT -> AD5200PotIOC.AD5200PotSDPOT; AD5200P.SpiByte -> Spi; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/eyesIFXBaudrates.h000066400000000000000000000042351207233610700256270ustar00rootroot00000000000000/* auto generated from tda5250BusResourceSettings.h using the following perl script: #!/usr/bin/perl -w use strict; my $state = "START"; my $br; while(<>) { if(/UBR_1MHZ_/) { ($br) = /UBR_1MHZ_(\d+)/; if($state eq "START") { print '#if '; $state = "MIDDLE"; } else { print '#elif '; } print 'TDA5250_UART_BAUDRATE == ', $br,"\n"; print '#define TDA5250_UART_UBR UBR_1MHZ_', $br, "\n"; print '#define TDA5250_UART_UMCTL UMCTL_1MHZ_', $br, "\n"; } } print '#endif',"\n" */ #if TDA5250_UART_BAUDRATE == 35108 #define TDA5250_UART_UBR UBR_1MHZ_35108 #define TDA5250_UART_UMCTL UMCTL_1MHZ_35108 #elif TDA5250_UART_BAUDRATE == 10240 #define TDA5250_UART_UBR UBR_1MHZ_10240 #define TDA5250_UART_UMCTL UMCTL_1MHZ_10240 #elif TDA5250_UART_BAUDRATE == 10922 #define TDA5250_UART_UBR UBR_1MHZ_10922 #define TDA5250_UART_UMCTL UMCTL_1MHZ_10922 #elif TDA5250_UART_BAUDRATE == 11702 #define TDA5250_UART_UBR UBR_1MHZ_11702 #define TDA5250_UART_UMCTL UMCTL_1MHZ_11702 #elif TDA5250_UART_BAUDRATE == 12603 #define TDA5250_UART_UBR UBR_1MHZ_12603 #define TDA5250_UART_UMCTL UMCTL_1MHZ_12603 #elif TDA5250_UART_BAUDRATE == 13653 #define TDA5250_UART_UBR UBR_1MHZ_13653 #define TDA5250_UART_UMCTL UMCTL_1MHZ_13653 #elif TDA5250_UART_BAUDRATE == 14894 #define TDA5250_UART_UBR UBR_1MHZ_14894 #define TDA5250_UART_UMCTL UMCTL_1MHZ_14894 #elif TDA5250_UART_BAUDRATE == 16384 #define TDA5250_UART_UBR UBR_1MHZ_16384 #define TDA5250_UART_UMCTL UMCTL_1MHZ_16384 #elif TDA5250_UART_BAUDRATE == 18204 #define TDA5250_UART_UBR UBR_1MHZ_18204 #define TDA5250_UART_UMCTL UMCTL_1MHZ_18204 #elif TDA5250_UART_BAUDRATE == 20480 #define TDA5250_UART_UBR UBR_1MHZ_20480 #define TDA5250_UART_UMCTL UMCTL_1MHZ_20480 #elif TDA5250_UART_BAUDRATE == 23405 #define TDA5250_UART_UBR UBR_1MHZ_23405 #define TDA5250_UART_UMCTL UMCTL_1MHZ_23405 #elif TDA5250_UART_BAUDRATE == 27306 #define TDA5250_UART_UBR UBR_1MHZ_27306 #define TDA5250_UART_UMCTL UMCTL_1MHZ_27306 #elif TDA5250_UART_BAUDRATE == 32768 #define TDA5250_UART_UBR UBR_1MHZ_32768 #define TDA5250_UART_UMCTL UMCTL_1MHZ_32768 #elif TDA5250_UART_BAUDRATE == 40960 #define TDA5250_UART_UBR UBR_1MHZ_40960 #define TDA5250_UART_UMCTL UMCTL_1MHZ_40960 #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceSettings.h000066400000000000000000000065041207233610700274500ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.12 $ * $Date: 2008-06-24 14:46:18 $ * ======================================================================== */ #include "msp430usart.h" #ifndef TDA5250BUSRESOURCEID_H #define TDA5250BUSRESOURCEID_H enum { TDA5250_UART_BUS_ID = unique(MSP430_UARTO_BUS) }; /* frequency of crystal: 18089580 Hz, divide by 18 -> 1004976 Hz */ #ifndef TDA5250_UART_BAUDRATE #define TDA5250_UART_BAUDRATE 32768U #endif enum { /** use real frequency, use only settings that result in an even byte time */ UBR_1MHZ_10240=0x0062, UMCTL_1MHZ_10240=0x08, // 10240 bit/s UBR_1MHZ_10922=0x005C, UMCTL_1MHZ_10922=0x00, // 10922 bit/s UBR_1MHZ_11702=0x0055, UMCTL_1MHZ_11702=0xEF, // 11702 bit/s UBR_1MHZ_12603=0x004F, UMCTL_1MHZ_12603=0xDD, // 12603 bit/s UBR_1MHZ_13653=0x0049, UMCTL_1MHZ_13653=0xB5, // 13653 bit/s UBR_1MHZ_14894=0x0043, UMCTL_1MHZ_14894=0xAA, // 14894 bit/s UBR_1MHZ_16384=0x003D, UMCTL_1MHZ_16384=0x92, // 16384 bit/s UBR_1MHZ_18204=0x0037, UMCTL_1MHZ_18204=0x84, // 18204 bit/s UBR_1MHZ_20480=0x0031, UMCTL_1MHZ_20480=0x80, // 20480 bit/s UBR_1MHZ_23405=0x002A, UMCTL_1MHZ_23405=0x7F, // 23405 bit/s UBR_1MHZ_27306=0x0024, UMCTL_1MHZ_27306=0x7B, // 27306 bit/s UBR_1MHZ_32768=0x001E, UMCTL_1MHZ_32768=0x5B, // 32768 bit/s UBR_1MHZ_40960=0x0018, UMCTL_1MHZ_40960=0x55, // 40960 bit/s }; #include "eyesIFXBaudrates.h" msp430_uart_union_config_t tda5250_uart_config = { {ubr: TDA5250_UART_UBR, umctl: TDA5250_UART_UMCTL, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie:0, urxwie: 0, urxe: 1, utxe: 0} }; enum { TDA5250_32KHZ_BYTE_TIME = (32768UL*10)/TDA5250_UART_BAUDRATE }; #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/chips/tda5250/tda5250RegDefaultSettings.h000066400000000000000000000076601207233610700272350ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - Revision ------------------------------------------------------------- * $Revision: 1.13 $ * $Date: 2008-06-24 14:46:18 $ * ======================================================================== */ /** * tda5250RegDefaultSettings Header File * Defines the default values of the registers for the TDA5250 Radio * * @author Kevin Klues (klues@tkn.tu-berlin.de) */ #ifndef TDA5250REGDEFAULTSETTINGS_H #define TDA5250REGDEFAULTSETTINGS_H // Default values of data registers /** regulate distance by switching the amplifiers */ // longest distance #define FULL_RANGE 0x04F9 // shorter distance; low gain, high tx energy consumption (30m) #define MED_RANGE_HP 0x04E9 // shorter distance; high gain, low tx energy consumption (25m) #define MED_RANGE_LP 0x04F8 // shortest: low gain; low tx energy consumption (1m to 3m range) #define TABLE_TOP 0x04E8 /** regulate distance using variable resistor, values for high tx power */ #define RF_HITX_DAMPING_0dB 255 #define RF_HITX_DAMPING_5dB 248 #define RF_HITX_DAMPING_10dB 245 #define RF_HITX_DAMPING_15dB 241 #define RF_HITX_DAMPING_20dB 239 /** regulate distance using variable resistor, values for low tx power */ #define RF_LOTX_DAMPING_0dB 255 #define RF_LOTX_DAMPING_5dB 90 #define RF_LOTX_DAMPING_10dB 67 #define RF_LOTX_DAMPING_15dB 50 #define RF_LOTX_DAMPING_16dB 40 #define RF_LOTX_DAMPING_17dB 30 // choose one #define INITIAL_RF_POWER RF_HITX_DAMPING_0dB #ifndef TDA5250_REG_DEFAULT_SETTING_CONFIG #define TDA5250_REG_DEFAULT_SETTING_CONFIG FULL_RANGE #endif #ifndef TDA5250_REG_DEFAULT_SETTING_LPF #define TDA5250_REG_DEFAULT_SETTING_LPF 0x8C #endif #define TDA5250_REG_DEFAULT_SETTING_FSK 0x0A0C #define TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING 0x0012 #define TDA5250_REG_DEFAULT_SETTING_ON_TIME 0xFEC0 #define TDA5250_REG_DEFAULT_SETTING_OFF_TIME 0xF380 #define TDA5250_REG_DEFAULT_SETTING_COUNT_TH1 0x0000 #define TDA5250_REG_DEFAULT_SETTING_COUNT_TH2 0x0001 #define TDA5250_REG_DEFAULT_SETTING_RSSI_TH3 0xFF #define TDA5250_REG_DEFAULT_SETTING_CLK_DIV 0x08 #define TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG 0x01 #define TDA5250_REG_DEFAULT_SETTING_BLOCK_PD 0xFFFF #endif //TDA5250REGDEFAULTSETTINGS_H tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/crc.h000066400000000000000000000044041207233610700210330ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /* Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This CRC-16 function produces a 16-bit running CRC that adheres to the * ITU-T CRC standard. * * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1 * @param crc Running CRC value * @param b Byte to "add" to the CRC * @return New CRC value * * @author Andreas Koepke * @author Paul Curtis (pointed out this implementation, which is believed to be public domain) */ #ifndef CRC_H #define CRC_H uint16_t crcByte(uint16_t crc, uint8_t b) { crc = (uint8_t)(crc >> 8) | (crc << 8); crc ^= b; crc ^= (uint8_t)(crc & 0xff) >> 4; crc ^= crc << 12; crc ^= (crc & 0xff) << 5; return crc; } #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXSerialP.nc000066400000000000000000000014331207233610700232300ustar00rootroot00000000000000module eyesIFXSerialP { provides interface StdControl; provides interface Msp430UartConfigure; uses interface Resource; } implementation { enum { UBR_1MHZ_57601=0x0011, UMCTL_1MHZ_57601=0xAA // 57600 bit/s }; msp430_uart_union_config_t msp430_uart_eyes_config = { {ubr: UBR_1MHZ_57601, umctl: UMCTL_1MHZ_57601, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, urxe: 1, utxe: 1} }; command error_t StdControl.start(){ return call Resource.immediateRequest(); } command error_t StdControl.stop(){ call Resource.release(); return SUCCESS; } event void Resource.granted(){} async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() { return &msp430_uart_eyes_config; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv1/000077500000000000000000000000001207233610700216745ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv1/.platform000066400000000000000000000006171207233610700235250ustar00rootroot00000000000000# Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. push( @includes, qw( %T/platforms/eyesIFX/eyesIFXv1 %T/platforms/eyesIFX/eyesIFXv1/chips/stm25p %T/chips/stm25p ) ); push ( @opts, qw( -mmcu=msp430f149 ) ); tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv1/hardware.h000066400000000000000000000143341207233610700236470ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $Id: hardware.h,v 1.5 2009-07-01 19:26:59 scipio Exp $ * */ #ifndef TOSH_HARDWARE_EYESIFX #define TOSH_HARDWARE_EYESIFX #include "msp430hardware.h" // enum so components can override power saving, // as per TEP 112. enum { TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, }; // LED assignments TOSH_ASSIGN_PIN(RED_LED, 5, 0); // Compatibility with the mica2 TOSH_ASSIGN_PIN(GREEN_LED, 5, 1); TOSH_ASSIGN_PIN(YELLOW_LED, 5, 2); // Debug Pin assignments TOSH_ASSIGN_PIN(DEBUG_PIN1, 1, 2); TOSH_ASSIGN_PIN(DEBUG_PIN2, 1, 3); TOSH_ASSIGN_PIN(LED0, 5, 0); TOSH_ASSIGN_PIN(LED1, 5, 1); TOSH_ASSIGN_PIN(LED2, 5, 2); TOSH_ASSIGN_PIN(LED3, 5, 3); // TDA5250 assignments TOSH_ASSIGN_PIN(TDA_PWDDD, 1, 0); // TDA PWDDD TOSH_ASSIGN_PIN(TDA_DATA, 1, 1); // TDA DATA (timerA, CCI0A) TOSH_ASSIGN_PIN(TDA_TXRX, 1, 4); // TDA TX/RX TOSH_ASSIGN_PIN(TDA_BUSM, 1, 5); // TDA BUSM TOSH_ASSIGN_PIN(TDA_ENTDA, 1, 6); // TDA EN_TDA // USART0 assignments TOSH_ASSIGN_PIN(SIMO0, 3, 1); // SIMO (MSP) -> BUSDATA (TDA5250) TOSH_ASSIGN_PIN(SOMI0, 3, 2); // SOMI (MSP) -> BUSDATA (TDA5250) TOSH_ASSIGN_PIN(UCLK0, 3, 3); // UCLK (MSP) -> BUSCLK (TDA5250) TOSH_ASSIGN_PIN(UTXD0, 3, 4); // USART0 -> data1 (TDA5250) TOSH_ASSIGN_PIN(URXD0, 3, 5); // USART0 -> data1 (TDA5250) // USART1 assignments TOSH_ASSIGN_PIN(UTXD1, 3, 6); // USART1 -> ST3232 TOSH_ASSIGN_PIN(URXD1, 3, 7); // USART1 -> ST3232 TOSH_ASSIGN_PIN(UCLK1, 5, 3); TOSH_ASSIGN_PIN(SOMI1, 5, 2); TOSH_ASSIGN_PIN(SIMO1, 5, 1); // Sensor assignments TOSH_ASSIGN_PIN(RSSI, 6, 3); TOSH_ASSIGN_PIN(TEMP, 6, 0); TOSH_ASSIGN_PIN(LIGHT, 6, 2); TOSH_ASSIGN_PIN(ADC_A1, 6, 1); // Potentiometer TOSH_ASSIGN_PIN(POT_EN, 2, 4); TOSH_ASSIGN_PIN(POT_SD, 2, 3); // TimerA output TOSH_ASSIGN_PIN(TIMERA0, 1, 1); //2,7 TOSH_ASSIGN_PIN(TIMERA1, 1, 2); TOSH_ASSIGN_PIN(TIMERA2, 1, 3); // TimerB output TOSH_ASSIGN_PIN(TIMERB0, 4, 0); TOSH_ASSIGN_PIN(TIMERB1, 4, 1); TOSH_ASSIGN_PIN(TIMERB2, 4, 2); // SMCLK output TOSH_ASSIGN_PIN(SMCLK, 5, 5); //2,7 // ACLK output TOSH_ASSIGN_PIN(ACLK, 2, 0); // Flash TOSH_ASSIGN_PIN(FLASH_CS, 1, 7); // send a bit via bit-banging to the flash void TOSH_FLASH_M25P_DP_bit(bool set) { if (set) TOSH_SET_SIMO0_PIN(); else TOSH_CLR_SIMO0_PIN(); TOSH_SET_UCLK0_PIN(); TOSH_CLR_UCLK0_PIN(); } inline void TOSH_wait(void) { nop(); nop(); } inline void uwait(uint16_t u) { /* uint16_t i; if (u < 500) for (i=2; i < u; i++) { asm volatile("nop\n\t" "nop\n\t" "nop\n\t" "nop\n\t" ::); } else for (i=0; i < u; i++) { asm volatile("nop\n\t" "nop\n\t" "nop\n\t" "nop\n\t" ::); } */ uint16_t t0 = TAR; while((TAR - t0) <= u); } void TOSH_FLASH_M25P_DP() { // SIMO0, UCLK0 TOSH_MAKE_SIMO0_OUTPUT(); TOSH_MAKE_UCLK0_OUTPUT(); TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_SET_FLASH_CS_PIN(); TOSH_wait(); // initiate sequence; TOSH_CLR_FLASH_CS_PIN(); TOSH_CLR_UCLK0_PIN(); TOSH_FLASH_M25P_DP_bit(TRUE); // 0 TOSH_FLASH_M25P_DP_bit(FALSE); // 1 TOSH_FLASH_M25P_DP_bit(TRUE); // 2 TOSH_FLASH_M25P_DP_bit(TRUE); // 3 TOSH_FLASH_M25P_DP_bit(TRUE); // 4 TOSH_FLASH_M25P_DP_bit(FALSE); // 5 TOSH_FLASH_M25P_DP_bit(FALSE); // 6 TOSH_FLASH_M25P_DP_bit(TRUE); // 7 TOSH_SET_FLASH_CS_PIN(); TOSH_SET_SIMO0_PIN(); TOSH_MAKE_SIMO0_INPUT(); TOSH_MAKE_UCLK0_INPUT(); } #undef atomic void TOSH_SET_PIN_DIRECTIONS(void) { atomic { P1OUT = 0x00; P2OUT = 0x00; P3OUT = 0x00; P4OUT = 0x00; P5OUT = 0x00; P6OUT = 0x00; P1SEL = 0x00; P2SEL = 0x00; P3SEL = 0x00; P4SEL = 0x00; P5SEL = 0x00; P6SEL = 0x00; P1DIR = 0x07; // P2DIR = 0xff; // P3DIR = 0xff; P4DIR = 0xff; P5DIR = 0x0f; P6DIR = 0xf0; TOSH_CLR_TDA_PWDDD_PIN(); // radio has to be on on power-up TOSH_MAKE_TDA_PWDDD_OUTPUT(); TOSH_SET_TDA_ENTDA_PIN(); // deselect the radio TOSH_MAKE_TDA_ENTDA_OUTPUT(); TOSH_SET_FLASH_CS_PIN(); // put flash in standby mode TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_SET_POT_SD_PIN(); // put potentiometer in shutdown mode TOSH_MAKE_POT_SD_OUTPUT(); TOSH_SET_POT_EN_PIN(); // deselect potentiometer TOSH_MAKE_POT_EN_OUTPUT(); TOSH_SEL_TEMP_MODFUNC(); //prepare pin for analog excitation from the temperature sensor TOSH_MAKE_TEMP_INPUT(); TOSH_SEL_LIGHT_MODFUNC(); //prepare pin for analog excitation from the light sensor TOSH_MAKE_LIGHT_INPUT(); P1IE = 0; P2IE = 0; // wait 12ms for the radio and flash to start uwait(1024*12); // // Put the flash in deep sleep state TOSH_FLASH_M25P_DP(); TOSH_SET_TDA_PWDDD_PIN(); // put the radio in sleep } } #endif //TOSH_HARDWARE_H tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv2/000077500000000000000000000000001207233610700216755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv2/.platform000066400000000000000000000006171207233610700235260ustar00rootroot00000000000000# Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. push( @includes, qw( %T/platforms/eyesIFX/eyesIFXv2 %T/platforms/eyesIFX/eyesIFXv2/chips/at45db %T/chips/at45db ) ); push ( @opts, qw( -mmcu=msp430f1611 ) ); tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv2/chips/000077500000000000000000000000001207233610700230035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/000077500000000000000000000000001207233610700240665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45dbC.nc000066400000000000000000000040261207233610700262040ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ configuration HplAt45dbC { provides interface HplAt45db; } implementation { components new HplAt45dbByteC(9), new Msp430Spi0C() as Spi, HplAt45dbP, HplMsp430GeneralIOC as MspGeneralIO, new Msp430GpioC() as Select; HplAt45db = HplAt45dbByteC; HplAt45dbByteC.Resource -> Spi; HplAt45dbByteC.FlashSpi -> Spi; HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP; Select -> MspGeneralIO.Port17; HplAt45dbP.Select -> Select; HplAt45dbP.FlashSpi -> Spi; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45dbP.nc000066400000000000000000000043261207233610700262240ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitat Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitat Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ module HplAt45dbP { provides { interface HplAt45dbByte; } uses { interface SpiByte as FlashSpi; interface GeneralIO as Select; } } implementation { command void HplAt45dbByte.select() { call Select.clr(); } command void HplAt45dbByte.deselect() { call Select.set(); } task void idleTask() { uint8_t status; status = call FlashSpi.write(0); if (!(status & 0x80)) { post idleTask(); } else { signal HplAt45dbByte.idle(); } } command void HplAt45dbByte.waitIdle() { post idleTask(); } command bool HplAt45dbByte.getCompareStatus() { uint8_t status; status = call FlashSpi.write(0); return (!(status & 0x40)); } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45db_chip.h000066400000000000000000000045011207233610700267310ustar00rootroot00000000000000// $Id: HplAt45db_chip.h,v 1.6 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef HPLAT45DB_CHIP_H #define HPLAT45DB_CHIP_H // flash characteristics enum { AT45_MAX_PAGES = 2048, AT45_PAGE_SIZE = 264, AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes }; typedef uint16_t at45page_t; typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */ #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/eyesIFXv2/hardware.h000066400000000000000000000125221207233610700236450ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universität Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universität Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $Id: hardware.h,v 1.5 2009-07-01 19:27:00 scipio Exp $ * */ #ifndef TOSH_HARDWARE_EYESIFXV2 #define TOSH_HARDWARE_EYESIFXV2 #include "msp430hardware.h" // enum so components can override power saving, // as per TEP 112. enum { TOS_SLEEP_NONE = MSP430_POWER_ACTIVE, }; // LED assignments TOSH_ASSIGN_PIN(RED_LED, 5, 0); // Compatibility with the mica2 TOSH_ASSIGN_PIN(GREEN_LED, 5, 1); TOSH_ASSIGN_PIN(YELLOW_LED, 5, 2); TOSH_ASSIGN_PIN(LED0, 5, 0); TOSH_ASSIGN_PIN(LED1, 5, 1); TOSH_ASSIGN_PIN(LED2, 5, 2); TOSH_ASSIGN_PIN(LED3, 5, 3); // TDA5250 assignments TOSH_ASSIGN_PIN(TDA_BUSM, 1, 5); // TDA BUSM TOSH_ASSIGN_PIN(TDA_ENTDA, 1, 6); // TDA EN_TDA TOSH_ASSIGN_PIN(TDA_TXRX, 1, 4); // TDA TX/RX TOSH_ASSIGN_PIN(TDA_DATA, 1, 1); // TDA DATA (timerA, CCI0A) TOSH_ASSIGN_PIN(TDA_PWDDD, 1, 0); // TDA PWDDD // USART0 assignments TOSH_ASSIGN_PIN(SIMO0, 3, 1); // SIMO (MSP) -> BUSDATA (TDA5250) TOSH_ASSIGN_PIN(SOMI0, 3, 2); // SOMI (MSP) -> BUSDATA (TDA5250) TOSH_ASSIGN_PIN(UCLK0, 3, 3); // UCLK (MSP) -> BUSCLK (TDA5250) TOSH_ASSIGN_PIN(UTXD0, 3, 4); // USART0 -> data1 (TDA5250) TOSH_ASSIGN_PIN(URXD0, 3, 5); // USART0 -> data1 (TDA5250) // USART1 assignments TOSH_ASSIGN_PIN(UTXD1, 3, 6); // USART1 -> USB TOSH_ASSIGN_PIN(URXD1, 3, 7); // USART1 -> USB /* void TOSH_SEL_SIMO1_IOFUNC() { } void TOSH_SEL_SOMI1_IOFUNC() { } void TOSH_SEL_UCLK1_IOFUNC() { } void TOSH_SEL_SIMO1_MODFUNC() { } void TOSH_SEL_SOMI1_MODFUNC() { } void TOSH_SEL_UCLK1_MODFUNC() { } */ // Sensor assignments TOSH_ASSIGN_PIN(RSSI, 6, 3); TOSH_ASSIGN_PIN(TEMP, 6, 0); TOSH_ASSIGN_PIN(LIGHT, 6, 2); TOSH_ASSIGN_PIN(VREF, 6, 7); TOSH_ASSIGN_PIN(B0, 6, 4); TOSH_ASSIGN_PIN(B1, 6, 5); TOSH_ASSIGN_PIN(B2, 6, 7); TOSH_ASSIGN_PIN(B3, 6, 6); TOSH_ASSIGN_PIN(B4, 6, 1); // Potentiometer TOSH_ASSIGN_PIN(POT_EN, 2, 4); TOSH_ASSIGN_PIN(POT_SD, 2, 3); // TimerA output TOSH_ASSIGN_PIN(TIMERA0, 1, 1); //2,7 TOSH_ASSIGN_PIN(TIMERA1, 1, 2); TOSH_ASSIGN_PIN(TIMERA2, 1, 3); // TimerB output TOSH_ASSIGN_PIN(TIMERB0, 4, 0); TOSH_ASSIGN_PIN(TIMERB1, 4, 1); TOSH_ASSIGN_PIN(TIMERB2, 4, 2); // SMCLK output TOSH_ASSIGN_PIN(SMCLK, 5, 5); //2,7 // ACLK output TOSH_ASSIGN_PIN(ACLK, 2, 0); // Flash TOSH_ASSIGN_PIN(FLASH_CS, 1, 7); TOSH_ASSIGN_PIN(DEBUG_1, 1, 1); TOSH_ASSIGN_PIN(DEBUG_2, 1, 2); // Temperature sensor enable TOSH_ASSIGN_PIN(TEMP_EN, 5, 4); // USB power monitoring TOSH_ASSIGN_PIN(USB_POWER, 1, 3); inline void uwait(uint16_t u) { uint16_t t0 = TAR; while((TAR - t0) <= u); } #undef atomic void TOSH_SET_PIN_DIRECTIONS(void) { // Default seting is I/O and output zero. atomic { P1OUT = 0x00; P2OUT = 0x00; P3OUT = 0x00; P4OUT = 0x00; P5OUT = 0x00; P6OUT = 0x00; P1SEL = 0x00; P2SEL = 0x00; P3SEL = 0x00; P4SEL = 0x00; P5SEL = 0x00; P6SEL = 0x00; P1DIR = 0x07; // P2DIR = 0xff; // P3DIR = 0xff; P4DIR = 0xff; P5DIR = 0x0f; P6DIR = 0xf0; TOSH_MAKE_TDA_PWDDD_OUTPUT(); TOSH_MAKE_TDA_ENTDA_OUTPUT(); TOSH_MAKE_FLASH_CS_OUTPUT(); TOSH_MAKE_POT_SD_OUTPUT(); TOSH_MAKE_POT_EN_OUTPUT(); //disable temperature sensor TOSH_CLR_TEMP_EN_PIN(); TOSH_MAKE_TEMP_EN_OUTPUT(); // detect USB power TOSH_SEL_USB_POWER_MODFUNC(); TOSH_MAKE_USB_POWER_INPUT(); // wait 12ms for the radio to start uwait(1024*12); TOSH_SET_TDA_ENTDA_PIN(); // deselect the radio TOSH_SET_FLASH_CS_PIN(); // put flash in standby mode TOSH_SET_POT_SD_PIN(); // put potentiometer in shutdown mode TOSH_SET_POT_EN_PIN(); // deselect potentiometer TOSH_SEL_TEMP_MODFUNC(); //prepare pin for analog excitation from the temperature sensor TOSH_MAKE_TEMP_INPUT(); TOSH_SEL_LIGHT_MODFUNC(); //prepare pin for analog excitation from the light sensor TOSH_MAKE_LIGHT_INPUT(); P1IE = 0; P2IE = 0; TOSH_SET_TDA_PWDDD_PIN(); // put radio in sleep } } #endif //TOSH_HARDWARE_EYESIFXV2 tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/lf-crc.h000066400000000000000000000044041207233610700214320ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- */ /* Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * This CRC-16 function produces a 16-bit running CRC that adheres to the * ITU-T CRC standard. * * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1 * @param crc Running CRC value * @param b Byte to "add" to the CRC * @return New CRC value * * @author Andreas Koepke * @author Paul Curtis (pointed out this implementation, which is believed to be public domain) */ #ifndef CRC_H #define CRC_H uint16_t crcByte(uint16_t crc, uint8_t b) { crc = (uint8_t)(crc >> 8) | (crc << 8); crc ^= b; crc ^= (uint8_t)(crc & 0xff) >> 4; crc ^= crc << 12; crc ^= (crc & 0xff) << 5; return crc; } #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/net/000077500000000000000000000000001207233610700206775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/net/lqi/000077500000000000000000000000001207233610700214645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/net/lqi/CC2420ActiveMessageC.nc000066400000000000000000000051531207233610700253530ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode:nil -*- * Copyright (c) 2008, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Pseudo module to enable MultihopLqi on eyesIFX. The mapping of * strength to LQI is based on the packet delivery ratio. For CC2420 * the ratios were taken from: Kannan Srinivasan and Philip Levis: * "RSSI is Under Appreciated" Third Workshop on Embedded Networked * Sensors, EmNets 2006. * * @author Andreas Köpke */ #include "radiopacketfunctions.h" module CC2420ActiveMessageC { provides { interface CC2420Packet; } } implementation { async command uint8_t CC2420Packet.getPower(message_t* p_msg ) { return 31; } async command void CC2420Packet.setPower(message_t* p_msg, uint8_t power) { } async command int8_t CC2420Packet.getRssi(message_t* p_msg ) { return (getMetadata(p_msg))->strength; } async command uint8_t CC2420Packet.getLqi( message_t* p_msg ) { uint32_t s = (getMetadata(p_msg))->strength; if(s > 60) s = 10; if(s > 22) s = 22; return (s*13/5 + 48); } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/net/lqi/CC2420Packet.nc000066400000000000000000000052631207233610700237410ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @author David Moss * @author Chad Metcalf */ #include "message.h" interface CC2420Packet { /** * Get transmission power setting for current packet. * * @param the message */ async command uint8_t getPower( message_t* p_msg ); /** * Set transmission power for a given packet. Valid ranges are * between 0 and 31. * * @param p_msg the message. * @param power transmission power. */ async command void setPower( message_t* p_msg, uint8_t power ); /** * Get rssi value for a given packet. For received packets, it is * the received signal strength when receiving that packet. For sent * packets, it is the received signal strength of the ack if an ack * was received. */ async command int8_t getRssi( message_t* p_msg ); /** * Get lqi value for a given packet. For received packets, it is the * link quality indicator value when receiving that packet. For sent * packets, it is the link quality indicator value of the ack if an * ack was received. */ async command uint8_t getLqi( message_t* p_msg ); } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/platform.h000066400000000000000000000000001207233610700220740ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/platform_message.h000066400000000000000000000056731207233610700236250ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:53 scipio Exp $ * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Defining the platform-independently named packet structures to be the * chip-specific TDA5250 packet structures. * * @author Philip Levis * @author Vlado Handziski (TDA5250 Modifications) * @date May 16 2005 * Revision: $Revision: 1.6 $ */ #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H #include "Serial.h" #include "tda5250_message.h" #ifndef TOSH_DATA_LENGTH #define TOSH_DATA_LENGTH 48 #endif typedef union message_header_t { tda5250_header_t radio; serial_header_t serial; } message_header_t; typedef union message_footer_t { tda5250_footer_t radio; } message_footer_t; typedef union message_metadata_t { tda5250_metadata_t radio; } message_metadata_t; typedef tda5250_header_t message_radio_header_t; typedef tda5250_footer_t message_radio_footer_t; typedef tda5250_metadata_t message_radio_metadata_t; #if TOSH_DATA_LENGTH < 33 #error "TOSH_DATA_LENGH must be larger than 33 bytes for this platform." #endif #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/000077500000000000000000000000001207233610700216055ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/BatteryLevel.nc000066400000000000000000000040461207233610700245350ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Description --------------------------------------------------------- * Measure Battery Level in mV using the internal voltage * - Author -------------------------------------------------------------- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) * ======================================================================== */ interface BatteryLevel { // get the batterylevel in mV async command uint16_t getLevel(); } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/BatteryLevelSensorC.nc000066400000000000000000000050431207233610700260300ustar00rootroot00000000000000/* -*- mode:c++ -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.5 $ * $Date: 2007-03-10 21:58:37 $ * @author: Jan Hauer * ======================================================================== */ #include generic configuration BatteryLevelSensorC() { provides { interface Read as Read; interface ReadNow as ReadNow; interface Resource as ReadNowResource; } } implementation { components SensorSettingsC as Settings; components new AdcReadClientC() as AdcReadClient; Read = AdcReadClient; AdcReadClient.AdcConfigure -> Settings.AdcConfigure[INTERNAL_VOLTAGE_REF_2_5V_LOW_FREQ]; components new AdcReadNowClientC() as AdcReadNowClient; ReadNow = AdcReadNowClient; ReadNowResource = AdcReadNowClient; AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[INTERNAL_VOLTAGE_REF_2_5V_LOW_FREQ]; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/CoulombCounter.nc000066400000000000000000000053351207233610700250750ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Interface to control the coulomb counter circuit * @author: Andreas Koepke (koepke@tkn.tu-berlin.de */ interface CoulombCounter { /** are we currently measureing the power consumption? */ async command bool isMeasureing(); /** * Start a measurement after delay seconds for duration seconds delay * seconds should be larger than 600 -- this allows to recover from a * buggy image. The delay must be smaller than 24 days, whereas duration * is full range 32bit in seconds. If the circuit is already measureing, * this command will only set the duration timer. Some platforms will * re-boot every time we fiddle with the power supply -- this trick * allows us to "continue" measureing. */ command error_t start(uint32_t delay, uint32_t duration); /** Stop a measurement, returns FAIL if there is no ongoing measurement */ command error_t stop(); /** notification: a fixed portion of energy has been consumed */ async event void portionConsumed(); /** notification that the measurement will be soon over */ event void soonOver(); } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/CoulombCounterC.nc000066400000000000000000000057441207233610700252040ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Configuration for the Coulomb Counter board interface. This one is for * eyesIFXv2.1 * * @author: Andreas Koepke (koepke@tkn.tu-berlin.de */ configuration CoulombCounterC { provides interface CoulombCounter; } implementation { components MainC, CoulombCounterP; components new TimerMilliC() as Timer; MainC.SoftwareInit -> CoulombCounterP; CoulombCounterP.Timer -> Timer; CoulombCounter = CoulombCounterP; components HplMsp430InterruptC, HplMsp430GeneralIOC; /** configure coulomb counter notification pin */ components new Msp430InterruptC() as EnergyInterruptC, new Msp430GpioC() as EnergyPinC; EnergyInterruptC.HplInterrupt -> HplMsp430InterruptC.Port12; CoulombCounterP.EnergyInterrupt -> EnergyInterruptC.Interrupt; EnergyPinC -> HplMsp430GeneralIOC.Port12; CoulombCounterP.EnergyPin -> EnergyPinC; /** board control interface */ components new Msp430GpioC() as UsbBatSwitch; components new Msp430GpioC() as ResetBoard; UsbBatSwitch -> HplMsp430GeneralIOC.Port64; ResetBoard -> HplMsp430GeneralIOC.Port65; CoulombCounterP.UsbBatSwitch -> UsbBatSwitch; CoulombCounterP.ResetBoard -> ResetBoard; /** Are we powered via USB? */ components new Msp430GpioC() as UsbMonitor; UsbMonitor -> HplMsp430GeneralIOC.Port13; CoulombCounterP.UsbMonitor -> UsbMonitor; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/CoulombCounterP.nc000066400000000000000000000125311207233610700252110ustar00rootroot00000000000000/* -*- mode:c++; indent-tabs-mode: nil -*- * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA, * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Implementation of coulomb counter board interface for eyesIFXv2.1 * @author: Andreas Koepke (koepke@tkn.tu-berlin.de) */ #include "Timer.h" module CoulombCounterP { provides { interface CoulombCounter; interface Init; } uses { interface Timer as Timer; interface GpioInterrupt as EnergyInterrupt; interface GeneralIO as EnergyPin; interface GeneralIO as UsbBatSwitch; interface GeneralIO as ResetBoard; interface GeneralIO as UsbMonitor; } } implementation { #define MIN_DELAY 60 uint16_t timerHighBits = 0; uint32_t dur = 0; bool warned = FALSE; void resetBoard() { call ResetBoard.set(); __asm__("NOP"); call ResetBoard.clr(); } void startMeasure() { unsigned i; for(i = 0; i < 7; i++) { call UsbBatSwitch.set(); call UsbBatSwitch.clr(); } } void stopMeasure() { call UsbBatSwitch.set(); call UsbBatSwitch.clr(); // if your board allows it: delay until supply via USB stable resetBoard(); } command error_t Init.init() { call EnergyPin.makeInput(); call EnergyInterrupt.disable(); call UsbBatSwitch.makeOutput(); call UsbBatSwitch.clr(); call ResetBoard.makeOutput(); call ResetBoard.clr(); call UsbMonitor.makeInput(); if(!call CoulombCounter.isMeasureing()) { resetBoard(); } return SUCCESS; } async command bool CoulombCounter.isMeasureing() { return call UsbMonitor.get(); // high --> disconnected --> measuremode } void startLongTimer() { if(timerHighBits) { timerHighBits--; call Timer.startOneShot(-1); } else { call Timer.startOneShot(dur); } } command error_t CoulombCounter.start(uint32_t delay, uint32_t duration) { error_t result = SUCCESS; timerHighBits = duration >> 22; dur = duration * (uint32_t)1024; warned = FALSE; if(call CoulombCounter.isMeasureing()) { startLongTimer(); call EnergyInterrupt.enableFallingEdge(); } else { if((delay < MIN_DELAY) || (delay > ((uint32_t)1<<21))) { result = FAIL; } else { call Timer.startOneShot(delay * (uint32_t)1024); } } return result; } /** Stop a measurement, returns FAIL if there is no ongoing measurement */ command error_t CoulombCounter.stop() { error_t result = FAIL; call Timer.stop(); timerHighBits = 0; dur = 0; call EnergyInterrupt.disable(); if(call CoulombCounter.isMeasureing()) { stopMeasure(); result = SUCCESS; } return result; } async event void EnergyInterrupt.fired() { signal CoulombCounter.portionConsumed(); } event void Timer.fired() { if(call CoulombCounter.isMeasureing()) { if(timerHighBits) { startLongTimer(); } else { if(warned == TRUE) { call CoulombCounter.stop(); } else { signal CoulombCounter.soonOver(); call Timer.startOneShot((uint32_t)MIN_DELAY*1024); warned = TRUE; } } } else { // finished waiting for delay resetBoard(); startLongTimer(); call EnergyInterrupt.enableFallingEdge(); startMeasure(); } } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/DemoSensorC.nc000066400000000000000000000050011207233610700243040ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ /** * * Please refer to TEP 109 for more information about this component and its * intended use. This component is an example component that provides * platform-independent access to a sensor via the Read and * ReadStream interface. Which actual sensor this is, is variable * defined in the implementation part below. * * @author Jan Hauer */ #include generic configuration DemoSensorC() { provides { interface Read; } } implementation { components SensorSettingsC as Settings; components new AdcReadClientC() as AdcReadClient; Read = AdcReadClient; AdcReadClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT]; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/DemoSensorNowC.nc000066400000000000000000000051171207233610700250000ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ /** * * Please refer to TEP 109 for more information about this component and its * intended use. This component is an example component that provides * platform-independent access to a sensor via the ReadNow and * interface. Which actual sensor this is, is variable and defined in the * implementation part below. * * @author Jan Hauer */ #include generic configuration DemoSensorNowC() { provides { interface Resource; interface ReadNow; } } implementation { components SensorSettingsC as Settings; components new AdcReadNowClientC() as AdcReadNowClient; Resource = AdcReadNowClient; ReadNow = AdcReadNowClient; AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT]; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/DemoSensorStreamC.nc000066400000000000000000000050561207233610700254720ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ /** * * Please refer to TEP 109 for more information about this component and its * intended use. This component is an example component that provides * platform-independent access to a sensor via the Read and * ReadStream interface. Which actual sensor this is, is variable * defined in the implementation part below. * * @author Jan Hauer */ #include generic configuration DemoSensorStreamC() { provides { interface ReadStream; } } implementation { components SensorSettingsC as Settings; components new AdcReadStreamClientC() as AdcReadStreamClient; ReadStream = AdcReadStreamClient; AdcReadStreamClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT]; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/PhotoSensorC.nc000066400000000000000000000053061207233610700245210ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ /** * * Please refer to TEP 109 for more information about this component and its * intended use. This component provides platform-independent access to the * onboard photo sensor on the eyesIFXv{1,2} platform. * * @author Jan Hauer */ #include generic configuration PhotoSensorC() { provides { interface Read as Read; interface ReadNow as ReadNow; interface Resource as ReadNowResource; } } implementation { components SensorSettingsC as Settings; components new AdcReadClientC() as AdcReadClient; Read = AdcReadClient; AdcReadClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT]; components new AdcReadNowClientC() as AdcReadNowClient; ReadNow = AdcReadNowClient; ReadNowResource = AdcReadNowClient; AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT]; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/ReadNowShiftC.nc000066400000000000000000000043121207233610700245670ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ generic module ReadNowShiftC(uint8_t bits) { provides interface ReadNow as ReadNowShifted; uses interface ReadNow as ReadNowRaw; } implementation { async command error_t ReadNowShifted.read() { return call ReadNowRaw.read(); } async event void ReadNowRaw.readDone(error_t result, uint16_t val) { signal ReadNowShifted.readDone(result, (val << bits)); } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/ReadShiftC.nc000066400000000000000000000042431207233610700241060ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ generic module ReadShiftC(uint8_t bits) { provides interface Read as ReadShifted; uses interface Read as ReadRaw; } implementation { command error_t ReadShifted.read() { return call ReadRaw.read(); } event void ReadRaw.readDone(error_t result, uint16_t val) { signal ReadShifted.readDone(result, (val << bits)); } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/ReadStreamShiftC.nc000066400000000000000000000052371207233610700252660ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.3 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ generic module ReadStreamShiftC(uint8_t bits) { provides interface ReadStream as ReadStreamShifted; uses interface ReadStream as ReadStreamRaw; } implementation { command error_t ReadStreamShifted.postBuffer(uint16_t* buf, uint16_t count) { return call ReadStreamRaw.postBuffer(buf, count); } command error_t ReadStreamShifted.read(uint32_t usPeriod) { return call ReadStreamRaw.read(usPeriod); } event void ReadStreamRaw.bufferDone(error_t result, uint16_t* buf, uint16_t count) { uint16_t i; if (result == SUCCESS) for (i=0; i * ======================================================================== */ /** * * Please refer to TEP 109 for more information about this component and its * intended use. This component provides platform-independent access to the * RSSI sensor exported by the TDA5250 radio on the eyesIFXv{1,2} platform. * Note: The radio must be configured to output the RSSI on the pin! * * @author Jan Hauer */ #include generic configuration RssiSensorC() { provides { interface Read as Read; interface ReadNow as ReadNow; interface Resource as ReadNowResource; } } implementation { components SensorSettingsC as Settings; components new AdcReadClientC() as AdcReadClient; Read = AdcReadClient; AdcReadClient.AdcConfigure -> Settings.AdcConfigure[RSSI_SENSOR_REF_1_5V]; components new AdcReadNowClientC() as AdcReadNowClient; ReadNow = AdcReadNowClient; ReadNowResource = AdcReadNowClient; AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[RSSI_SENSOR_REF_1_5V]; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/RssiSensorVccC.nc000066400000000000000000000051671207233610700250110ustar00rootroot00000000000000/* -*- mode:c++ -*- * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ /** * * Please refer to TEP 109 for more information about this component and its * intended use. This component provides platform-independent access to the * RSSI sensor exported by the TDA5250 radio on the eyesIFXv{1,2} platform. * Note: The radio must be configured to output the RSSI on the pin! * * @author Jan Hauer */ #include generic configuration RssiSensorVccC() { provides { interface ReadNow as ReadNow; interface Resource as ReadNowResource; } } implementation { components SensorSettingsC as Settings; components new AdcReadNowClientC() as AdcReadNowClient; ReadNow = AdcReadNowClient; ReadNowResource = AdcReadNowClient; AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[RSSI_SENSOR_VCC]; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/SensorSettingsC.nc000066400000000000000000000047151207233610700252330ustar00rootroot00000000000000/* -*- mode:c++ -*- * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.4 $ * $Date: 2006-12-12 18:23:41 $ * @author: Jan Hauer * ======================================================================== */ /** * Default ADC channel configuration for eyesIFXv1 and eyesIFXv2. Future * eyesIFX platforms may shadow this configuration (and sensors.h) in their * respective subdirectory. * * @author Jan Hauer */ #include module SensorSettingsC { provides interface AdcConfigure as AdcConfigure[uint8_t type]; } implementation { async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration[uint8_t type]() { if (type < SENSOR_SENTINEL) return &sensorconfigurations[type]; else return &sensorconfigurations[SENSOR_SENTINEL]; } } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/TempExtSensorC.nc000066400000000000000000000060621207233610700250160ustar00rootroot00000000000000/* * Copyright (c) 2004, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2007-11-28 13:19:49 $ * @author: Jan Hauer * ======================================================================== */ /** * * Please refer to TEP 109 for more information about this component and its * intended use. This component provides platform-independent access to the * onboard temperature sensor on the eyesIFXv{1,2} platform. * * @author Jan Hauer */ #include generic configuration TempExtSensorC() { provides { interface Read as Read; interface ReadNow as ReadNow; interface Resource as ReadNowResource; } } implementation { components SensorSettingsC as Settings; components new AdcReadClientC() as AdcReadClient; //Read = AdcReadClient; AdcReadClient.AdcConfigure -> Settings.AdcConfigure[TEMP_SENSOR_DEFAULT]; components new AdcReadNowClientC() as AdcReadNowClient; ReadNow = AdcReadNowClient; //ReadNowResource = AdcReadNowClient; AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[TEMP_SENSOR_DEFAULT]; components HplMsp430GeneralIOC as MspGeneralIO; components new Msp430GpioC() as TEMP; TEMP -> MspGeneralIO.Port54; components TempExtSensorP; Read = TempExtSensorP.Read; TempExtSensorP.AdcRead -> AdcReadClient; ReadNowResource = TempExtSensorP.ReadNowResource; TempExtSensorP.AdcResource -> AdcReadNowClient; TempExtSensorP.TEMP -> TEMP; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/TempExtSensorP.nc000066400000000000000000000075061207233610700250370ustar00rootroot00000000000000/* * Copyright (c) 2007, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de) * ======================================================================== */ /** * The temperature sensor implementation on eyesIFX. * It just starts the sensor if there is an request and * stops when there are no open requests left * (this is done via a monitor). * * @author Philipp Huppertz * */ module TempExtSensorP { provides interface Read; provides interface Resource as ReadNowResource; uses interface GeneralIO as TEMP; uses interface Resource as AdcResource; uses interface Read as AdcRead; } implementation { uint8_t tempMonitor = 0; command error_t Read.read() { error_t error = call AdcRead.read(); if (error == SUCCESS) { atomic { if (tempMonitor == 0) { call TEMP.set(); } ++tempMonitor; } } return error; } event void AdcRead.readDone(error_t result, uint16_t val) { atomic { --tempMonitor; if (tempMonitor == 0) { call TEMP.clr(); } } signal Read.readDone(result, val); } async command error_t ReadNowResource.request() { error_t error = call AdcResource.request(); if (error == SUCCESS) { atomic { if (tempMonitor == 0) { call TEMP.set(); } ++tempMonitor; } } return error; } async command error_t ReadNowResource.immediateRequest() { error_t error = call AdcResource.immediateRequest(); if (error == SUCCESS) { atomic { if (tempMonitor == 0) { call TEMP.set(); } ++tempMonitor; } } return error; } event void AdcResource.granted() { signal ReadNowResource.granted(); } async command error_t ReadNowResource.release() { error_t error = call AdcResource.release(); if (error == SUCCESS) { atomic { --tempMonitor; if (tempMonitor == 0) { call TEMP.clr(); } } } return error; } async command bool ReadNowResource.isOwner() { return call AdcResource.isOwner(); } default event void ReadNowResource.granted() {}; } tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/sensors/sensors.h000066400000000000000000000132361207233610700234570ustar00rootroot00000000000000/* * Copyright (c) 2006, Technische Universitaet Berlin * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - Neither the name of the Technische Universitaet Berlin nor the names * of its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * - Revision ------------------------------------------------------------- * $Revision: 1.6 $ * $Date: 2007-07-10 13:19:04 $ * @author: Jan Hauer * ======================================================================== */ #ifndef SENSORS_H #define SENSORS_H #include enum { PHOTO_SENSOR_LOW_FREQ, PHOTO_SENSOR_HIGH_FREQ, PHOTO_SENSOR_DEFAULT, PHOTO_SENSOR_VCC, TEMP_SENSOR_LOW_FREQ, TEMP_SENSOR_HIGH_FREQ, TEMP_SENSOR_DEFAULT, RSSI_SENSOR_VCC, RSSI_SENSOR_REF_1_5V, RSSI_SENSOR_DEFAULT, INTERNAL_VOLTAGE_REF_2_5V, INTERNAL_VOLTAGE_REF_2_5V_LOW_FREQ, INTERNAL_TEMP_HIGH_FREQ, INTERNAL_TEMP_LOW_FREQ, // add more entries here // last entry SENSOR_SENTINEL }; const msp430adc12_channel_config_t sensorconfigurations[] = { /* PHOTO_SENSOR_LOW_FREQ */ { INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1 }, /* PHOTO_SENSOR_HIGH_FREQ */ { INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* PHOTO_SENSOR_DEFAULT */ { INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* PHOTO_SENSOR_VCC */ { INPUT_CHANNEL_A2, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* TEMP_SENSOR_LOW_FREQ */ { INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1 }, /* TEMP_SENSOR_HIGH_FREQ */ { INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_16_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* TEMP_SENSOR_DEFAULT */ { INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1 }, /* RSSI_SENSOR_VCC */ { INPUT_CHANNEL_A3, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* RSSI_SENSOR_REF_1_5V */ { INPUT_CHANNEL_A3, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* RSSI_SENSOR_DEFAULT */ { INPUT_CHANNEL_A3, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* INTERNAL_VOLTAGE_REF_2_5V */ { SUPPLY_VOLTAGE_HALF_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_2_5, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_32_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* INTERNAL_VOLTAGE_REF_2_5V_LOW_FREQ */ { SUPPLY_VOLTAGE_HALF_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_2_5, SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1 }, /* INTERNAL_TEMP_HIGH_FREQ */ { TEMPERATURE_DIODE_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_32_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 }, /* INTERNAL_TEMP_LOW_FREQ */ { TEMPERATURE_DIODE_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5, SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1 }, /* your stuff here */ /* SENSOR_SENTINEL */ { INPUT_CHANNEL_NONE,0,0,0,0,0,0,0 } }; #endif tinyos-2.1.2+dfsg/tos/platforms/eyesIFX/table-crc.h000066400000000000000000000057641207233610700221320ustar00rootroot00000000000000/* * CRC LOOKUP TABLE * ================ * The following CRC lookup table was generated automagically * by the Rocksoft^tm Model CRC Algorithm Table Generation * Program V1.0 * For more information on the Rocksoft^tm Model CRC Algorithm, * see the document titled "A Painless Guide to CRC Error * Detection Algorithms" by Ross Williams * (ross@guest.adelaide.edu.au.). This document is likely to be * in the FTP archive "ftp.adelaide.edu.au/pub/rocksoft". * * (Nowadays look at: http://www.ross.net/crc/crcpaper.html) * */ #ifndef CRC_H #define CRC_H uint16_t const ccitt_crc16_table[256] = { 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint16_t crcByte(uint16_t fcs, uint8_t c) { fcs = ccitt_crc16_table[(fcs >> 8 ^ c) & 0xffU] ^ (fcs << 8); return fcs; } #endif tinyos-2.1.2+dfsg/tos/platforms/intelmote2/000077500000000000000000000000001207233610700206575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/intelmote2/.platform000066400000000000000000000031071207233610700225050ustar00rootroot00000000000000# # FILE: intelmote2/.platform # # Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. # # $Id: .platform,v 1.9 2009-12-18 23:31:09 jgko Exp $ # push ( @includes, qw( %T/platforms/intelmote2 %T/platforms/intelmote2/chips/cc2420 %T/platforms/intelmote2/chips/da9030 %T/platforms/intelmote2/chips/ds2745 %T/chips/cc2420 %T/chips/cc2420/alarm %T/chips/cc2420/control %T/chips/cc2420/csma %T/chips/cc2420/interfaces %T/chips/cc2420/link %T/chips/cc2420/lowpan %T/chips/cc2420/lpl %T/chips/cc2420/packet %T/chips/cc2420/receive %T/chips/cc2420/spi %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security %T/chips/pxa27x %T/chips/pxa27x/lib %T/chips/pxa27x/timer %T/chips/pxa27x/gpio %T/chips/pxa27x/dma %T/chips/pxa27x/ssp %T/chips/pxa27x/i2c %T/chips/pxa27x/uart %T/chips/pxa27x/p30 %T/chips/pxa27x/ds2745 %T/chips/pxa27x/cif %T/lib/timer %T/lib/serial %T/lib/gpio ) ); @opts = qw( -gcc=xscale-elf-gcc -nostartfiles -fnesc-target=env -fnesc-no-debug ); push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; push @opts, "-mingw-gcc" if $cygwin; $ENV{NESC_MACHINE} = "structure_size_boundary=32, pointer=4,4 float=4,4 double=8,4 long_double=8,4 short=2,2 int=4,4 long=4,4 long_long=8,4 int1248_align=1,2,4,4 wchar_size_size=4,4 char_wchar_signed=false,true"; tinyos-2.1.2+dfsg/tos/platforms/intelmote2/ActiveMessageC.nc000066400000000000000000000060671207233610700240350ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $ * */ /** * * The Active Message layer on the intelmote2 platform. This is a naming wrapper * around the CC2420 Active Message layer. * * @author Philip Levis * @date June 19 2005 */ configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components CC2420ActiveMessageC as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; Snoop = AM.Snoop; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; components CC2420PacketC; PacketTimeStamp32khz = CC2420PacketC; PacketTimeStampMilli = CC2420PacketC; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/BlockStorageC.nc000066400000000000000000000041251207233610700236650ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Implementation of the block storage abstraction for the pxa271 * embedded flash. * * @author Philip Buonadonna * @author Kaisen Lin * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $ */ generic configuration BlockStorageC( volume_id_t volume_id ) { provides interface BlockRead; provides interface BlockWrite; } implementation { enum { BLOCK_ID = unique( "pxa271p30.Block" ), }; components P30BlockC as BlockC; BlockRead = BlockC.Read[ volume_id ]; BlockWrite = BlockC.Write[ volume_id ]; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/ConfigStorageC.nc000066400000000000000000000040061207233610700240360ustar00rootroot00000000000000/** * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * Configuration component for storage management on the PXA271 * * @author KaisenLin * @author Phil Buonadonna */ generic configuration ConfigStorageC(volume_id_t vol_id) { provides interface Mount; provides interface ConfigStorage; } implementation { enum { CONFIG_ID = unique( "pxa271p30.Config" ), }; components P30ConfigC as ConfigC; ConfigStorage = ConfigC.ConfigStorage[ vol_id ]; Mount = ConfigC.Mount[ vol_id ]; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/DemoSensorC.nc000066400000000000000000000045371207233610700233730ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * DemoSensorC is a generic sensor device that provides a 16-bit * value. The platform author chooses which sensor actually sits * behind DemoSensorC, and though it's probably Voltage, Light, or * Temperature, there are no guarantees. * * This particular DemoSensorC on the Intel Mote v2 provides a * voltage reading from the da9030 PMIC. * * Conversion from ADC reading to voltage: * VBAT = (2.65/256)*(ADC) + 2.65 * * @author Gilman Tolle * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $ * */ generic configuration DemoSensorC() { provides interface Read; } implementation { components DemoSensorP; components PMICC; Read = DemoSensorP; DemoSensorP.PMIC -> PMICC.PMIC; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/DemoSensorP.nc000066400000000000000000000041121207233610700233750ustar00rootroot00000000000000/* $Id: DemoSensorP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * @author Phil Buonadonna */ module DemoSensorP { provides interface Read as Read; uses interface PMIC; } implementation { task void doRead(); command error_t Read.read() { post doRead(); return SUCCESS; } task void doRead() { error_t error; uint8_t value; atomic { error = call PMIC.getBatteryVoltage(&value); } if (error != SUCCESS) value = 0; signal Read.readDone(SUCCESS, (uint16_t)value); } } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/HilTimerMilliC.nc000066400000000000000000000047231207233610700240160ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Phil Buonadonna * */ #include "Timer.h" configuration HilTimerMilliC { provides interface Init; provides interface Timer as TimerMilli[ uint8_t num ]; provides interface LocalTime; } implementation { components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI)) as VirtTimersMilli32; components new AlarmToTimerC(TMilli) as AlarmToTimerMilli32; components new HalPXA27xAlarmM(TMilli,2) as PhysAlarmMilli32; components HalPXA27xOSTimerMapC; components CounterMilliC; enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")}; Init = PhysAlarmMilli32; TimerMilli = VirtTimersMilli32.Timer; LocalTime = CounterMilliC; VirtTimersMilli32.TimerFrom -> AlarmToTimerMilli32.Timer; AlarmToTimerMilli32.Alarm -> PhysAlarmMilli32.Alarm; PhysAlarmMilli32.OSTInit -> HalPXA27xOSTimerMapC.Init; PhysAlarmMilli32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID]; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/IM2InitSerialP.nc000066400000000000000000000041711207233610700236770ustar00rootroot00000000000000/* $Id: IM2InitSerialP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna * */ module IM2InitSerialP { provides interface Init; uses { interface HplPXA27xGPIOPin as TXD; interface HplPXA27xGPIOPin as RXD; } } implementation { command error_t Init.init() { call TXD.setGAFRpin(STUART_TXD_ALTFN); call TXD.setGPDRbit(TRUE); call RXD.setGAFRpin(STUART_RXD_ALTFN); call RXD.setGPDRbit(FALSE); return SUCCESS; } async event void TXD.interruptGPIOPin() { return;} async event void RXD.interruptGPIOPin() { return;} } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/LocalIeeeEui64C.nc000066400000000000000000000044111207233610700237430ustar00rootroot00000000000000// $Id: LocalIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $ /* /* * Copyright (c) 2011 Stanford University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Philip Levis * Dummy Extended Address for intelmote2, copied from micaz code. */ #include "IeeeEui64.h" module LocalIeeeEui64C { provides interface LocalIeeeEui64; } implementation { command ieee_eui64_t LocalIeeeEui64.getId() { /* This code uses UC Berkeley's OUI; Berkeley * allows it to be used as long as bytes 3 and * 4 are 'LO' for local. */ ieee_eui64_t id; id.data[0] = 0x00; id.data[1] = 0x12; id.data[2] = 0x6d; id.data[3] = 'L'; id.data[4] = 'O'; id.data[5] = 0; id.data[6] = TOS_NODE_ID >> 8; id.data[7] = TOS_NODE_ID & 0xff; return id; } } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/LogStorageC.nc000066400000000000000000000040151207233610700233520ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Kaisen Lin * @author Phil Buonadonna * */ generic configuration LogStorageC( volume_id_t volume_id, bool circular ) { provides interface LogRead; provides interface LogWrite; } implementation { enum { LOG_ID = unique( "pxa271p30.Log" ), }; components P30LogC as LogC; LogRead = LogC.Read[ volume_id ]; LogWrite = LogC.Write[ volume_id ]; components new P30LogCircularP(circular); LogC.Circular[ volume_id ] -> P30LogCircularP.Circular; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/PlatformC.nc000066400000000000000000000037211207233610700230730ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Philip Buonadonna */ #include "hardware.h" configuration PlatformC { provides interface Init; provides interface PlatformReset; } implementation { components PlatformP,PMICC; components HplPXA27xOSTimerC; Init = PlatformP; PlatformReset = PlatformP; PlatformP.PMICInit -> PMICC.Init; PlatformP.OST0M3 -> HplPXA27xOSTimerC.OST0M3; PlatformP.PXA27xWD -> HplPXA27xOSTimerC.OSTWDCntl; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/PlatformLedsC.nc000066400000000000000000000037761207233610700237150ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Philip Buonadonna */ #include "hardware.h" configuration PlatformLedsC { provides interface GeneralIO as Led0; provides interface GeneralIO as Led1; provides interface GeneralIO as Led2; uses interface Init; } implementation { components GeneralIOC; components PlatformP; Init = PlatformP.InitL3; Led0 = GeneralIOC.GeneralIO[RED_LED_PIN]; Led1 = GeneralIOC.GeneralIO[GREEN_LED_PIN]; Led2 = GeneralIOC.GeneralIO[BLUE_LED_PIN]; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/PlatformP.nc000066400000000000000000000106061207233610700231100ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Philip Buonadonna */ #include "hardware.h" module PlatformP { provides interface Init; provides interface PlatformReset; uses { interface Init as InitL0; interface Init as InitL1; interface Init as InitL2; interface Init as InitL3; interface Init as PMICInit; } uses interface HplPXA27xOSTimer as OST0M3; uses interface HplPXA27xOSTimerWatchdog as PXA27xWD; } implementation { //void enableICache() @C(); command error_t Init.init() { // Enable clocks to critical components CKEN = (CKEN22_MEMC | CKEN20_IMEM | CKEN15_PMI2C | CKEN9_OST); // Set the arbiter to something meaningful for this platform ARB_CNTL = (ARB_CNTL_CORE_PARK | ARB_CNTL_LCD_WT(0) | ARB_CNTL_DMA_WT(1) | ARB_CNTL_CORE_WT(4)); OSCC = (OSCC_OON); while ((OSCC & OSCC_OOK) == 0); TOSH_SET_PIN_DIRECTIONS(); // Enable access to CP6 (Interrupt Controller processor) // Enable access to Intel WMMX enhancements asm volatile ("mcr p15,0,%0,c15,c1,0\n\t": : "r" (0x43)); #ifdef PXA27X_13M // Place PXA27X into 13M w/ PPLL enabled... // other bits are ignored...but might be useful later CCCR = (CCCR_CPDIS | CCCR_L(8) | CCCR_2N(2) | CCCR_A); asm volatile ( "mcr p14,0,%0,c6,c0,0\n\t" : : "r" (CLKCFG_F) ); #else // Place PXA27x into 104/104 MHz mode CCCR = CCCR_L(8) | CCCR_2N(2) | CCCR_A; asm volatile ( "mcr p14,0,%0,c6,c0,0\n\t" : : "r" (CLKCFG_B | CLKCFG_F | CLKCFG_T) ); #endif // Initialize Memory/Flash subsystems SA1110 = SA1110_SXSTACK(1); MSC0 = MSC0 | MSC_RBW024 | MSC_RBUFF024 | MSC_RT024(2) ; MSC1 = MSC1 | MSC_RBW024; MSC2 = MSC2 | MSC_RBW024; MECR = 0; // PXA271 Required initialization settings MDCNFG = (MDCNFG_SETALWAYS | MDCNFG_DTC2(0x3) | MDCNFG_STACK0 | MDCNFG_DTC0(0x3) | MDCNFG_DNB0 | MDCNFG_DRAC0(0x2) | MDCNFG_DCAC0(0x1) | MDCNFG_DWID0 /* | MDCNFG_DE0 */); MDREFR = (MDREFR & ~(MDREFR_K0DB4 | MDREFR_K0DB2)) | MDREFR_K0DB2; enableICache(); initSyncFlash(); // Place all global platform initialization before this command. // return call SubInit.init(); call InitL0.init(); call InitL1.init(); call InitL2.init(); call InitL3.init(); //call PMICInit.init(); return SUCCESS; } async command void PlatformReset.reset() { call OST0M3.setOSMR(call OST0M3.getOSCR() + 1000); call PXA27xWD.enableWatchdog(); while (1); return; // Should never get here. } async event void OST0M3.fired() { call OST0M3.setOIERbit(FALSE); call OST0M3.clearOSSRbit(); return; } default command error_t InitL0.init() { return SUCCESS; } default command error_t InitL1.init() { return SUCCESS; } default command error_t InitL2.init() { return SUCCESS; } default command error_t InitL3.init() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/PlatformReset.nc000066400000000000000000000031451207233610700237730ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ interface PlatformReset { async command void reset(); } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/PlatformResetC.nc000066400000000000000000000033371207233610700241010ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * @author Philip Buonadonna */ configuration PlatformResetC { provides interface PlatformReset; } implementation { components PlatformC; PlatformReset = PlatformC; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/PlatformSerialC.nc000066400000000000000000000055201207233610700242320ustar00rootroot00000000000000/* $Id: PlatformSerialC.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ */ /* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arch Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna * */ configuration PlatformSerialC { provides interface StdControl; provides interface UartByte; provides interface UartStream; } implementation { components new HalPXA27xSerialP(115200); components HplPXA27xSTUARTC; components HplPXA27xGPIOC; components IM2InitSerialP; StdControl = HalPXA27xSerialP; UartByte = HalPXA27xSerialP; UartStream = HalPXA27xSerialP; HalPXA27xSerialP.UARTInit -> HplPXA27xSTUARTC.Init; HalPXA27xSerialP.UART -> HplPXA27xSTUARTC.STUART; IM2InitSerialP.TXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[STUART_TXD]; IM2InitSerialP.RXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[STUART_RXD]; components PlatformP; IM2InitSerialP.Init <- PlatformP.InitL2; HalPXA27xSerialP.Init <- PlatformP.InitL3; components new HplPXA27xDMAInfoC(19, (uint32_t) &STRBR) as DMAInfoRx; components new HplPXA27xDMAInfoC(20, (uint32_t) &STTHR) as DMAInfoTx; components HplPXA27xDMAC; // how are these channels picked? HalPXA27xSerialP.TxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[2]; HalPXA27xSerialP.RxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[3]; DMAInfoRx.HplPXA27xDMAInfo <- HalPXA27xSerialP.UARTRxDMAInfo; DMAInfoTx.HplPXA27xDMAInfo <- HalPXA27xSerialP.UARTTxDMAInfo; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/TimeSyncMessageC.nc000066400000000000000000000064611207233610700243530ustar00rootroot00000000000000// $Id: TimeSyncMessageC.nc,v 1.2 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * The Active Message layer on the intelmote2 platform. This is a naming wrapper * around the CC2420 Active Message layer that implemets timesync interface (TEP 133). * * @author Philip Levis * @author Brano Kusy * @date June 19 2005 */ configuration TimeSyncMessageC { provides { interface SplitControl; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components CC2420TimeSyncMessageC as AM; SplitControl = AM; Receive = AM.Receive; Snoop = AM.Snoop; Packet = AM; AMPacket = AM; TimeSyncAMSend32khz = AM; TimeSyncAMSendMilli = AM; TimeSyncPacket32khz = AM; TimeSyncPacketMilli = AM; components CC2420PacketC; PacketTimeStamp32khz = CC2420PacketC; PacketTimeStampMilli = CC2420PacketC; }tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/000077500000000000000000000000001207233610700217655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/cc2420/000077500000000000000000000000001207233610700226625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/cc2420/HplCC2420AlarmC.nc000066400000000000000000000040131207233610700255230ustar00rootroot00000000000000/* $Id: HplCC2420AlarmC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ generic configuration HplCC2420AlarmC() { provides interface Init; //provides interface Alarm as Alarm32khz16; provides interface Alarm as Alarm32khz32; } implementation { components new Alarm32khzC(); Init = Alarm32khzC; //Alarm32khz16 = Alarm32khzC.Alarm32khz16; Alarm32khz32 = Alarm32khzC.Alarm32khz32; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/cc2420/HplCC2420InterruptsC.nc000066400000000000000000000041751207233610700266570ustar00rootroot00000000000000/* $Id: HplCC2420InterruptsC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ configuration HplCC2420InterruptsC { provides interface GpioCapture as CaptureSFD; provides interface GpioInterrupt as InterruptCCA; provides interface GpioInterrupt as InterruptFIFOP; } implementation { components GeneralIOC; components new SoftCaptureC(); CaptureSFD = SoftCaptureC.GpioCapture; InterruptCCA = GeneralIOC.GpioInterrupt[CC2420_CCA_PIN]; InterruptFIFOP = GeneralIOC.GpioInterrupt[CC2420_FIFOP_PIN]; SoftCaptureC.GpioInterrupt -> GeneralIOC.GpioInterrupt[CC2420_SFD_PIN]; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/cc2420/HplCC2420PinsC.nc000066400000000000000000000045211207233610700254040ustar00rootroot00000000000000/* $Id: HplCC2420PinsC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration HplCC2420PinsC { provides interface GeneralIO as CCA; provides interface GeneralIO as CSN; provides interface GeneralIO as FIFO; provides interface GeneralIO as FIFOP; provides interface GeneralIO as RSTN; provides interface GeneralIO as SFD; provides interface GeneralIO as VREN; } implementation { components GeneralIOC; CCA = GeneralIOC.GeneralIO[CC2420_CCA_PIN]; CSN = GeneralIOC.GeneralIO[CC2420_CSN_PIN]; FIFO = GeneralIOC.GeneralIO[CC2420_FIFO_PIN]; FIFOP = GeneralIOC.GeneralIO[CC2420_FIFOP_PIN]; RSTN = GeneralIOC.GeneralIO[CC2420_RSTN_PIN]; SFD = GeneralIOC.GeneralIO[CC2420_SFD_PIN]; VREN = GeneralIOC.GeneralIO[CC2420_VREN_PIN]; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/cc2420/HplCC2420SpiC.nc000066400000000000000000000041461207233610700252310ustar00rootroot00000000000000/* $Id: HplCC2420SpiC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ generic configuration HplCC2420SpiC() { provides interface Resource; provides interface SpiByte; provides interface SpiPacket; } implementation { enum { SPI_CLIENT_ID = unique("CC2420SpiClient") }; components IM2CC2420SpiP; Resource = IM2CC2420SpiP.Resource[SPI_CLIENT_ID]; SpiByte = IM2CC2420SpiP.SpiByte; SpiPacket = IM2CC2420SpiP.SpiPacket[SPI_CLIENT_ID]; components PlatformP; IM2CC2420SpiP.Init <- PlatformP.InitL3; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/cc2420/IM2CC2420InitSpiP.nc000066400000000000000000000044511207233610700257350ustar00rootroot00000000000000/* $Id: IM2CC2420InitSpiP.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ module IM2CC2420InitSpiP { provides interface Init; uses { interface HplPXA27xGPIOPin as SCLK; interface HplPXA27xGPIOPin as TXD; interface HplPXA27xGPIOPin as RXD; } } implementation { command error_t Init.init() { call SCLK.setGAFRpin(SSP3_SCLK_ALTFN); call SCLK.setGPDRbit(TRUE); call TXD.setGAFRpin(SSP3_TXD_ALTFN); call TXD.setGPDRbit(TRUE); call RXD.setGAFRpin(SSP3_RXD_ALTFN); call RXD.setGPDRbit(FALSE); return SUCCESS; } async event void SCLK.interruptGPIOPin() { return;} async event void TXD.interruptGPIOPin() { return;} async event void RXD.interruptGPIOPin() { return;} } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/cc2420/IM2CC2420SpiP.nc000066400000000000000000000056111207233610700251100ustar00rootroot00000000000000/* $Id: IM2CC2420SpiP.nc,v 1.6 2008-06-11 00:42:14 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /** * * @author Phil Buonadonna */ configuration IM2CC2420SpiP { provides interface Init; provides interface Resource[uint8_t id]; provides interface SpiByte; provides interface SpiPacket[uint8_t instance]; } implementation { components new SimpleFcfsArbiterC("CC2420SpiClient") as FcfsArbiterC; //components new HalPXA27xSpiDMAC(1,0x7,FALSE) as HalPXA27xSpiM; // 6.5 Mbps, 8bit width components new HalPXA27xSpiPioC(1,0x7,FALSE) as HalPXA27xSpiM; // 6.5 Mbps, 8bit width components IM2CC2420InitSpiP; components HplPXA27xSSP3C; components HplPXA27xDMAC; components HplPXA27xGPIOC; components PlatformP; Init = IM2CC2420InitSpiP; Init = HalPXA27xSpiM.Init; SpiByte = HalPXA27xSpiM; SpiPacket = HalPXA27xSpiM; Resource = FcfsArbiterC; IM2CC2420InitSpiP.SCLK -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_SCLK]; IM2CC2420InitSpiP.TXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_TXD]; IM2CC2420InitSpiP.RXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_RXD]; //HalPXA27xSpiM.RxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[0]; //HalPXA27xSpiM.TxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[1]; //HalPXA27xSpiM.SSPRxDMAInfo -> HplPXA27xSSP3C.SSPRxDMAInfo; //HalPXA27xSpiM.SSPTxDMAInfo -> HplPXA27xSSP3C.SSPTxDMAInfo; HalPXA27xSpiM.SSP -> HplPXA27xSSP3C.HplPXA27xSSP; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/da9030/000077500000000000000000000000001207233610700226655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/da9030/PMIC.nc000066400000000000000000000046231207233610700237440ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * * Authors: Lama Nachman, Robert Adler */ interface PMIC { /* * Set the voltage of the regulator controling the core * * @param core voltage specified in one of the supported trim values * * @return none */ command error_t setCoreVoltage(uint8_t trimValue); command error_t shutDownLDOs(); command error_t getBatteryVoltage(uint8_t *val); command error_t enableAutoCharging(bool enable); command error_t enableManualCharging(bool enable); command error_t chargingStatus(uint8_t *vBat, uint8_t *vChg, uint8_t *iChg); } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/da9030/PMICC.nc000066400000000000000000000077261207233610700240560ustar00rootroot00000000000000/* $Id: PMICC.nc,v 1.6 2008-06-11 00:46:26 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Lama Nachman, Robert Adler */ configuration PMICC{ provides{ interface Init; interface PMIC; } } implementation{ components PMICM; components new TimerMilliC(); components HplPXA27xPI2CC, HplPXA27xGPIOC; components PlatformP; Init = PMICM; PMIC = PMICM; PMICM.Init <- PlatformP.InitL2; PMICM.chargeMonitorTimer -> TimerMilliC; PMICM.PMICGPIO -> HplPXA27xGPIOC.HplPXA27xGPIOPin[1]; PMICM.PI2C -> HplPXA27xPI2CC.I2C; PMICM.PlatformReset -> PlatformP.PlatformReset; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/da9030/PMICM.nc000066400000000000000000000332111207233610700240540ustar00rootroot00000000000000/* $Id: PMICM.nc,v 1.7 2008-06-11 00:46:26 razvanm Exp $ */ /* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Lama Nachman, Robert Adler */ #define START_RADIO_LDO 1 #define START_SENSOR_BOARD_LDO 1 /* * VCC_MEM is connected to BUCK2 by default, make sure you have a board * that has the right resistor settings before disabling BUCK2 */ #define DISABLE_BUCK2 0 //#include "trace.h" #include "Timer.h" #include "pmic.h" module PMICM { provides{ interface Init; interface PMIC; } uses interface Timer as chargeMonitorTimer; uses interface HplPXA27xGPIOPin as PMICGPIO; uses interface HplPXA27xI2C as PI2C; uses interface PlatformReset; } implementation { #include "pmic.h" bool gotReset; error_t readPMIC(uint8_t address, uint8_t *value, uint8_t numBytes){ //send the PMIC the address that we want to read if(numBytes > 0){ call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1); call PI2C.setICR(call PI2C.getICR() | ICR_START); call PI2C.setICR(call PI2C.getICR() | ICR_TB); while(call PI2C.getICR() & ICR_TB); //actually send the address terminated with a STOP call PI2C.setIDBR(address); call PI2C.setICR(call PI2C.getICR() & ~ICR_START); call PI2C.setICR(call PI2C.getICR() | ICR_STOP); call PI2C.setICR(call PI2C.getICR() | ICR_TB); while(call PI2C.getICR() & ICR_TB); call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP); //actually request the read of the data call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1 | 1); call PI2C.setICR(call PI2C.getICR() | ICR_START); call PI2C.setICR(call PI2C.getICR() | ICR_TB); while(call PI2C.getICR() & ICR_TB); call PI2C.setICR(call PI2C.getICR() & ~ICR_START); //using Page Read Mode while (numBytes > 1){ call PI2C.setICR(call PI2C.getICR() | ICR_TB); while(call PI2C.getICR() & ICR_TB); *value = call PI2C.getIDBR(); value++; numBytes--; } call PI2C.setICR(call PI2C.getICR() | ICR_STOP); call PI2C.setICR(call PI2C.getICR() | ICR_ACKNAK); call PI2C.setICR(call PI2C.getICR() | ICR_TB); while(call PI2C.getICR() & ICR_TB); *value = call PI2C.getIDBR(); call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP); call PI2C.setICR(call PI2C.getICR() & ~ICR_ACKNAK); return SUCCESS; } else{ return FAIL; } } error_t writePMIC(uint8_t address, uint8_t value){ call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1); call PI2C.setICR(call PI2C.getICR() | ICR_START); call PI2C.setICR(call PI2C.getICR() | ICR_TB); while(call PI2C.getICR() & ICR_TB); PIDBR = address; call PI2C.setICR(call PI2C.getICR() & ~ICR_START); call PI2C.setICR(call PI2C.getICR() | ICR_TB); while(call PI2C.getICR() & ICR_TB); PIDBR = value; call PI2C.setICR(call PI2C.getICR() | ICR_STOP); call PI2C.setICR(call PI2C.getICR() | ICR_TB); while(call PI2C.getICR() & ICR_TB); call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP); PICR &= ~ICR_STOP; return SUCCESS; } void startLDOs() { //uint8_t temp; uint8_t oldVal, newVal; #if START_SENSOR_BOARD_LDO // TODO : Need to move out of here to sensor board functions readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1); newVal = oldVal | ARC1_LDO10_EN | ARC1_LDO11_EN; // sensor board writePMIC(PMIC_A_REG_CONTROL_1, newVal); readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1); newVal = oldVal | BRC2_LDO10_EN | BRC2_LDO11_EN; writePMIC(PMIC_B_REG_CONTROL_2, newVal); #endif #if START_RADIO_LDO // TODO : Move to radio start readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1); newVal = oldVal | BRC1_LDO5_EN; writePMIC(PMIC_B_REG_CONTROL_1, newVal); #endif #if DISABLE_BUCK2 // Disable BUCK2 if VCC_MEM is not configured to use BUCK2 readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1); newVal = oldVal & ~BRC1_BUCK_EN; writePMIC(PMIC_B_REG_CONTROL_1, newVal); #endif #if 0 // Configure above LDOs, Radio and sensor board LDOs to turn off in sleep // TODO : Sleep setting doesn't work temp = BSC1_LDO1(1) | BSC1_LDO2(1) | BSC1_LDO3(1) | BSC1_LDO4(1); writePMIC(PMIC_B_SLEEP_CONTROL_1, temp); temp = BSC2_LDO5(1) | BSC2_LDO7(1) | BSC2_LDO8(1) | BSC2_LDO9(1); writePMIC(PMIC_B_SLEEP_CONTROL_2, temp); temp = BSC3_LDO12(1); writePMIC(PMIC_B_SLEEP_CONTROL_3, temp); #endif } error_t startPMICstuff() { //command result_t StdControl.start(){ XXX-pb //init unit uint8_t val[3]; //call PI2CInterrupt.enable(); XXX-pb } command error_t Init.init(){ uint8_t val[3]; PCFR |= PCFR_PI2C_EN; // Overrides GPIO settings on pins call PI2C.setICR(call PI2C.getICR() | (ICR_IUE | ICR_SCLE)); atomic{ gotReset=FALSE; } call PMICGPIO.setGAFRpin(0); call PMICGPIO.setGPDRbit(FALSE); call PMICGPIO.setGFERbit(TRUE); /* * Reset the watchdog, switch it to an interrupt, so we can disable it * Ignore SLEEP_N pin, enable H/W reset via button */ writePMIC(PMIC_SYS_CONTROL_A, SCA_RESET_WDOG | SCA_WDOG_ACTION | SCA_HWRES_EN); // Disable all interrupts from PMIC except for ONKEY button writePMIC(PMIC_IRQ_MASK_A, ~IMA_ONKEY_N); writePMIC(PMIC_IRQ_MASK_B, 0xFF); writePMIC(PMIC_IRQ_MASK_C, 0xFF); //read out the EVENT registers so that we can receive interrupts readPMIC(PMIC_EVENTS, val, 3); // Set default core voltage to 0.85 V #ifdef PXA27X_13M //P85 is not reliable, using P95 call PMIC.setCoreVoltage(B2R1_TRIM_P95_V); #else call PMIC.setCoreVoltage(B2R1_TRIM_1_25_V); #endif startLDOs(); return SUCCESS; } async event void PI2C.interruptI2C() { //PI2CInterrupt.fired(){ uint32_t status, update=0; status = call PI2C.getISR(); //PISR; if(status & ISR_ITE){ update |= ISR_ITE; //trace(DBG_USR1,"sent data"); } if(status & ISR_BED){ update |= ISR_BED; //trace(DBG_USR1,"bus error"); } call PI2C.setISAR(update); //PISR = update; } async event void PMICGPIO.interruptGPIOPin(){ uint8_t events[3]; bool localGotReset; //call PMICGPIO.call PMICInterrupt.clear(); XXX autocleard by GPIO module readPMIC(PMIC_EVENTS, events, 3); if(events[EVENTS_A_OFFSET] & EA_ONKEY_N){ atomic{ localGotReset = gotReset; } if(localGotReset==TRUE){ call PlatformReset.reset(); } else{ atomic{ gotReset=TRUE; } } } else{ //trace(DBG_USR1,"PMIC EVENTs =%#x %#x %#x\r\n",events[0], events[1], events[2]); } } /* * The Buck2 controls the core voltage, set to appropriate trim value */ command error_t PMIC.setCoreVoltage(uint8_t trimValue) { writePMIC(PMIC_BUCK2_REG1, (trimValue & B2R1_TRIM_MASK) | B2R1_GO); return SUCCESS; } command error_t PMIC.shutDownLDOs() { uint8_t temp; uint8_t oldVal, newVal; /* * Shut down all LDOs that are not controlled by the sleep mode * Note, we assume here the LDO10 & LDO11 (sensor board) will be off * Should be moved to sensor board control */ // LDO1, LDO4, LDO6, LDO7, LDO8, LDO9, LDO10, LDO 11, LDO13, LDO14 readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1); newVal = oldVal & ~ARC1_LDO13_EN & ~ARC1_LDO14_EN; newVal = newVal & ~ARC1_LDO10_EN & ~ARC1_LDO11_EN; // sensor board writePMIC(PMIC_A_REG_CONTROL_1, newVal); readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1); newVal = oldVal & ~BRC1_LDO1_EN & ~BRC1_LDO4_EN & ~BRC1_LDO5_EN & ~BRC1_LDO6_EN & ~BRC1_LDO7_EN; writePMIC(PMIC_B_REG_CONTROL_1, newVal); readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1); newVal = oldVal & ~BRC2_LDO8_EN & ~BRC2_LDO9_EN & ~BRC2_LDO10_EN & ~BRC2_LDO11_EN & ~BRC2_LDO14_EN & ~BRC2_SIMCP_EN; writePMIC(PMIC_B_REG_CONTROL_2, newVal); return SUCCESS; } error_t getPMICADCVal(uint8_t channel, uint8_t *val){ uint8_t oldval; error_t rval; //read out the old value so that we can reset at the end rval = readPMIC(PMIC_ADC_MAN_CONTROL, &oldval,1); if (rval == SUCCESS) { rval = writePMIC(PMIC_ADC_MAN_CONTROL, PMIC_AMC_ADCMUX(channel) | PMIC_AMC_MAN_CONV | PMIC_AMC_LDO_INT_Enable); } if (rval == SUCCESS) { rval = readPMIC(PMIC_MAN_RES,val,1); } if (rval == SUCCESS) { //reset to old state rval = writePMIC(PMIC_ADC_MAN_CONTROL, oldval); } return rval; } command error_t PMIC.getBatteryVoltage(uint8_t *val){ //for now, let's use the manual conversion mode return getPMICADCVal(0, val); } command error_t PMIC.chargingStatus(uint8_t *vBat, uint8_t *vChg, uint8_t *iChg){ getPMICADCVal(0, vBat); getPMICADCVal(2, vChg); getPMICADCVal(1, iChg); return SUCCESS; } command error_t PMIC.enableAutoCharging(bool enable){ return SUCCESS; } command error_t PMIC.enableManualCharging(bool enable){ //just turn on or off the LED for now!! uint8_t val; if(enable){ //want to turn on the charger getPMICADCVal(2, &val); //if charger is present due some stuff...75 should be 4.65V or so if(val > 75 ) { //trace(DBG_USR1,"Charger Voltage is %.3fV...enabling charger...\r\n", ((val*6) * .01035)); //write the total timeout to be 8 hours writePMIC(PMIC_TCTR_CONTROL,8); //enable the charger at 100mA and 4.35V writePMIC(PMIC_CHARGE_CONTROL,PMIC_CC_CHARGE_ENABLE | PMIC_CC_ISET(1) | PMIC_CC_VSET(7)); //turn on the LED writePMIC(PMIC_LED1_CONTROL,0x80); //start a timer to monitor our progress every 5 minutes! call chargeMonitorTimer.startPeriodic(300000); } else{ //trace(DBG_USR1,"Charger Voltage is %.3fV...charger not enabled\r\n", ((val*6) * .01035)); } } else{ //turn off the charger and the LED call PMIC.getBatteryVoltage(&val); //trace(DBG_USR1,"Disabling Charger...Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65); //disable everything that we enabled writePMIC(PMIC_TCTR_CONTROL,0); writePMIC(PMIC_CHARGE_CONTROL,0); writePMIC(PMIC_LED1_CONTROL,0x00); } return SUCCESS; } event void chargeMonitorTimer.fired(){ uint8_t val; call PMIC.getBatteryVoltage(&val); //stop when vBat>4V if(val>130){ call PMIC.enableManualCharging(FALSE); call chargeMonitorTimer.stop(); } return; } } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/da9030/pmic.h000066400000000000000000000177471207233610700240060ustar00rootroot00000000000000/* * * * Copyright (c) 2000-2002 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Lama Nachman, Robbie Adler * * This file includes the PMIC command defintions. We are using the Dialog * DA9030 part. * */ #ifndef PMIC_H #define PMIC_H // I2C slave addr #define PMIC_SLAVE_ADDR 0x49 // Register BUCK2 with DVC1 #define PMIC_BUCK2_REG1 0x15 // Register BUCK2 with DVC2 #define PMIC_BUCK2_REG2 0x16 // LDO on/off control in App Reg space #define PMIC_A_REG_CONTROL_1 0x17 #define PMIC_A_REG_CONTROL_2 0x18 #define PMIC_EVENTS (0x01) // 3 byte array #define PMIC_EVENTA (0x01) #define PMIC_EVENTB (0x02) #define PMIC_EVENTC (0x03) #define PMIC_STATUS (0x04) #define PMIC_IRQ_MASK_A (0x05) #define PMIC_IRQ_MASK_B (0x06) #define PMIC_IRQ_MASK_C (0x07) #define PMIC_SYS_CONTROL_A (0x08) #define PMIC_SYS_CONTROL_C (0x80) #define PMIC_CHARGE_CONTROL (0x28) #define PMIC_CC_CHARGE_ENABLE (1<<7) #define PMIC_CC_ISET(_x) (((_x) & 0xF) << 3) #define PMIC_CC_VSET(_x) (((_x) & 0x7)) #define PMIC_TCTR_CONTROL (0x2A) #define PMIC_ADC_MAN_CONTROL (0x30) #define PMIC_AMC_ADCMUX(_x) ((_x & 0x7)) #define PMIC_AMC_MAN_CONV (1<<3) #define PMIC_AMC_LDO_INT_Enable (1<<4) #define PMIC_MAN_RES (0x40) #define PMIC_LED1_CONTROL (0x20) // LDO on/off control in Baseband Reg space #define PMIC_B_REG_CONTROL_1 0x97 #define PMIC_B_REG_CONTROL_2 0x98 #define PMIC_B_SLEEP_CONTROL_1 0x99 #define PMIC_B_SLEEP_CONTROL_2 0x9A #define PMIC_B_SLEEP_CONTROL_3 0x9B // IRQ_MASK_A #define IMA_ONKEY_N 0x1 #define IMA_PWREN1 0x2 #define IMA_EXTON 0x4 #define IMA_CHDET 0x8 #define IMA_TBAT 0x10 #define IMA_VBATMON_1 0x20 #define IMA_VBATMON_2 0x40 #define IMA_CHIOVER 0x80 //IRQ_MASK_B #define IMB_TCTO 0x1 #define IMB_CCTO 0x2 #define IMB_ADC_READY 0x4 #define IMB_VBUS_VALID_4_4 0x8 #define IMB_VBUS_VALID_4_0 0x10 #define IMB_SESSION_VALID 0x20 #define IMB_SRP_DETECT 0x40 #define IMB_WDOG 0x80 // SYS_CONTROL_A #define SCA_SLEEP_N_EN 0x1 #define SCA_SHUTDOWN 0x2 #define SCA_HWRES_EN 0x4 #define SCA_WDOG_ACTION 0x8 #define SCA_TWDSCALE(_x) (((_x) & 7) << 4) #define SCA_RESET_WDOG 0x80 // Events registers A, B, C #define EVENTS_A_OFFSET 0 #define EA_ONKEY_N 0x1 #define EA_PWREN1 0x2 #define EA_EXTON 0x4 #define EA_CHDET 0x8 #define EA_TBAT 0x10 #define EA_VBATMON 0x20 #define EA_VBATMON_TXON 0x40 #define EA_CHIOVER 0x80 #define EVENTS_B_OFFSET 1 #define EVENTS_C_OFFSET 2 // BUCK2 Reg 1 #define B2R1_TRIM_MASK 0x1f #define B2R1_TRIM_P85_V 0x0 #define B2R1_TRIM_P875_V 0x1 #define B2R1_TRIM_P9_V 0x2 #define B2R1_TRIM_P925_V 0x3 #define B2R1_TRIM_P95_V 0x4 #define B2R1_TRIM_P975_V 0x5 #define B2R1_TRIM_1_V 0x6 #define B2R1_TRIM_1_125_V 0xB #define B2R1_TRIM_1_25_V 0x10 #define B2R1_SLEEP 0x40 #define B2R1_GO 0x80 // Reg Control 1 for App processor reg space: Enable/Disable LDOs #define ARC1_BUCK2_EN 0x1 // on #define ARC1_LDO10_EN 0x2 // off #define ARC1_LDO11_EN 0x4 // off #define ARC1_LDO13_EN 0x8 // off #define ARC1_LDO14_EN 0x10 // off #define ARC1_LDO15_EN 0x20 // on #define ARC1_LDO16_EN 0x40 // on #define ARC1_LDO17_EN 0x80 // off // Reg Control 2 for App processor reg space : Enable/Disable LDOs #define ARC2_LDO18_EN 0x1 // on #define ARC2_LDO19_EN 0x2 // on #define ARC2_SIMCP_EN 0x40 // off // Reg Control 1 for Baseband reg space #define BRC1_BUCK_EN 0x1 // off #define BRC1_LDO1_EN 0x2 // off #define BRC1_LDO2_EN 0x4 // off #define BRC1_LDO3_EN 0x8 // BB #define BRC1_LDO4_EN 0x10 // off #define BRC1_LDO5_EN 0x20 // radio #define BRC1_LDO6_EN 0x40 // off #define BRC1_LDO7_EN 0x80 // off // Reg Control 2 for Baseband reg space #define BRC2_LDO8_EN 0x1 // off #define BRC2_LDO9_EN 0x2 // off #define BRC2_LDO10_EN 0x4 // sensor board #define BRC2_LDO11_EN 0x8 // sensor board #define BRC2_LDO12_EN 0x10 // BB_IO #define BRC2_LDO14_EN 0x20 // off #define BRC2_SIMCP_EN 0x40 // off #define BRC2_SLEEP 0x80 // off // Sleep control 1 for Baseband reg space #define BSC1_LDO1(_x) (((_x) & 0x3) << 0) #define BSC1_LDO2(_x) (((_x) & 0x3) << 2) #define BSC1_LDO3(_x) (((_x) & 0x3) << 4) #define BSC1_LDO4(_x) (((_x) & 0x3) << 6) // Sleep control 2 for Baseband reg space #define BSC2_LDO5(_x) (((_x) & 0x3) << 0) #define BSC2_LDO7(_x) (((_x) & 0x3) << 2) #define BSC2_LDO8(_x) (((_x) & 0x3) << 4) #define BSC2_LDO9(_x) (((_x) & 0x3) << 6) // Sleep control 3 for Baseband reg space #define BSC3_LDO12(_x) (((_x) & 0x3) << 0) #endif //PMIC_H tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/ds2745/000077500000000000000000000000001207233610700227155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/ds2745/DS2745InternalC.nc000066400000000000000000000046551207233610700257010ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $ */ configuration DS2745InternalC { provides interface SplitControl; provides interface Resource[uint8_t id]; provides interface HplDS2745[uint8_t id]; } implementation { components new SimpleFcfsArbiterC( "Ds2745.Resource" ) as Arbiter; components MainC; Resource = Arbiter; components new HplDS2745LogicP(DS2745_SLAVE_ADDR) as Logic; MainC.SoftwareInit -> Logic; components new HalPXA27xI2CMasterC(TRUE) as I2CC; Logic.I2CPacket -> I2CC; components HplPXA27xGPIOC; I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL]; I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA]; components DS2745InternalP as Internal; HplDS2745 = Internal.HplDS2745; Internal.ToHPLC -> Logic.HplDS2745; SplitControl = Logic; } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/chips/ds2745/DS2745InternalP.nc000066400000000000000000000106151207233610700257070ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arched Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * * @author Phil Buonadonna * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $ */ module DS2745InternalP { provides interface HplDS2745[uint8_t id]; uses interface HplDS2745 as ToHPLC; } implementation { uint8_t currentId; command error_t HplDS2745.setConfig[uint8_t id](uint8_t val) { currentId = id; return call ToHPLC.setConfig(val); } command error_t HplDS2745.measureTemperature[uint8_t id]() { currentId = id; return call ToHPLC.measureTemperature(); } command error_t HplDS2745.measureVoltage[uint8_t id]() { currentId = id; return call ToHPLC.measureVoltage(); } command error_t HplDS2745.measureCurrent[uint8_t id]() { currentId = id; return call ToHPLC.measureCurrent(); } command error_t HplDS2745.measureAccCurrent[uint8_t id]() { currentId = id; return call ToHPLC.measureAccCurrent(); } command error_t HplDS2745.setOffsetBias[uint8_t id](int8_t val) { currentId = id; return call ToHPLC.setOffsetBias(val); } command error_t HplDS2745.setAccOffsetBias[uint8_t id](int8_t val) { currentId = id; return call ToHPLC.setAccOffsetBias(val); } async event void ToHPLC.setConfigDone(error_t error) { signal HplDS2745.setConfigDone[currentId](error); } async event void ToHPLC.measureTemperatureDone(error_t result, uint16_t val) { signal HplDS2745.measureTemperatureDone[currentId](result, val); } async event void ToHPLC.measureVoltageDone(error_t result, uint16_t val) { signal HplDS2745.measureVoltageDone[currentId](result, val); } async event void ToHPLC.measureCurrentDone(error_t result, uint16_t val) { signal HplDS2745.measureCurrentDone[currentId](result, val); } async event void ToHPLC.measureAccCurrentDone(error_t result, uint16_t val) { signal HplDS2745.measureAccCurrentDone[currentId](result, val); } async event void ToHPLC.setOffsetBiasDone(error_t error) { signal HplDS2745.setOffsetBiasDone[currentId](error); } async event void ToHPLC.setAccOffsetBiasDone(error_t error) { signal HplDS2745.setAccOffsetBiasDone[currentId](error); } default async event void HplDS2745.setConfigDone[uint8_t id]( error_t error ){ return; } default async event void HplDS2745.measureTemperatureDone[uint8_t id]( error_t error, uint16_t val ){ return; } default async event void HplDS2745.measureVoltageDone[uint8_t id]( error_t error, uint16_t val ){ return; } default async event void HplDS2745.measureCurrentDone[uint8_t id]( error_t error, uint16_t val ){ return; } default async event void HplDS2745.measureAccCurrentDone[uint8_t id]( error_t error, uint16_t val ){ return; } default async event void HplDS2745.setOffsetBiasDone[uint8_t id]( error_t error ){ return; } default async event void HplDS2745.setAccOffsetBiasDone[uint8_t id](error_t error){ return; } } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/hardware.h000066400000000000000000000230461207233610700226320ustar00rootroot00000000000000/* * Copyright (c) 2005 Arched Rock Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the Arched Rock Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. */ /* * * * Copyright (c) 2000-2002 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * @Author Philip Buonadonna * @Author Robbie Adler * */ #ifndef __TOSH_HARDWARE_H__ #define __TOSH_HARDWARE_H__ #include "pxa27xhardware.h" //#include "AM.h" // enum so components can override power saving, // as per TEP 112. // Note that currently the pxa27x does not support // McuPowerOverride, so SLEEP_NONE is defined to // be 0. enum { TOS_SLEEP_NONE = 0, }; #define MIN(a,b) ((a) < (b) ? (a) : (b)) /* Watchdog Prescaler */ enum { TOSH_period16 = 0x00, // 47ms TOSH_period32 = 0x01, // 94ms TOSH_period64 = 0x02, // 0.19s TOSH_period128 = 0x03, // 0.38s TOSH_period256 = 0x04, // 0.75s TOSH_period512 = 0x05, // 1.5s TOSH_period1024 = 0x06, // 3.0s TOSH_period2048 = 0x07 // 6.0s }; /* Global interrupt priority table. * Table is indexed by the Peripheral ID (PPID). Priorities are 0 - 39 * where 0 is the highest. Priorities MUST be unique. 0XFF = invalid/unassigned */ const uint8_t TOSH_IRP_TABLE[] = { 0x05, // PPID 0 SSP_3 Service Req 0xFF, // PPID 1 MSL 0xFF, // PPID 2 USBH2 0xFF, // PPID 3 USBH1 0xFF, // PPID 4 Keypad 0xFF, // PPID 5 Memory Stick 0xFF, // PPID 6 Power I2C 0x04, // PPID 7 OST match Register 4-11 0x01, // PPID 8 GPIO_0 0x03, // PPID 9 GPIO_1 0x02, // PPID 10 GPIO_x 0x08, // PPID 11 USBC 0xFF, // PPID 12 PMU 0xFF, // PPID 13 I2S 0xFF, // PPID 14 AC '97 0xFF, // PPID 15 SIM status/error 0xFF, // PPID 16 SSP_2 Service Req 0xFF, // PPID 17 LCD Controller Service Req 0xFF, // PPID 18 I2C Service Req 0xFF, // PPID 19 TX/RX ERROR IRDA 0x07, // PPID 20 TX/RX ERROR STUART 0xFF, // PPID 21 TX/RX ERROR BTUART 0x06, // PPID 22 TX/RX ERROR FFUART 0xFF, // PPID 23 Flash Card status/Error Detect 0x0A, // PPID 24 SSP_1 Service Req 0x00, // PPID 25 DMA Channel Service Req 0xFF, // PPID 26 OST equals Match Register 0 0xFF, // PPID 27 OST equals Match Register 1 0xFF, // PPID 28 OST equals Match Register 2 0xFF, // PPID 29 OST equals Match Register 3 0xFF, // PPID 30 RTC One HZ TIC 0xFF, // PPID 31 RTC equals Alarm 0xFF, // PPID 32 0x09, // PPID 33 Quick Capture Interface 0xFF, // PPID 34 0xFF, // PPID 35 0xFF, // PPID 36 0xFF, // PPID 37 0xFF, // PPID 38 0xFF // PPID 39 }; #ifdef IMOTE2_DEVBOARD // LED assignments #define RED_LED_PIN (95) #define GREEN_LED_PIN (102) #define BLUE_LED_PIN (27) // CC2420 RADIO #defines #define CC2420_VREN_PIN (40) #define CC2420_RSTN_PIN (22) #define CC2420_FIFO_PIN (114) #define CC2420_CCA_PIN (116) #define CC2420_FIFOP_PIN (115) #define CC2420_SFD_PIN (16) #define CC2420_CSN_PIN (39) #else // LED assignments #define RED_LED_PIN (103) #define GREEN_LED_PIN (104) #define BLUE_LED_PIN (105) // CC2420 RADIO #defines #define CC2420_VREN_PIN (115) #define CC2420_RSTN_PIN (22) #define CC2420_FIFO_PIN (114) #define CC2420_CCA_PIN (116) #define CC2420_FIFOP_PIN (0) #define CC2420_SFD_PIN (16) #define CC2420_CSN_PIN (39) #endif /* IMOTE2_DEVBOARD */ #define SSP3_RXD (41) #define SSP3_RXD_ALTFN (3) #define SSP3_TXD (35) #define SSP3_TXD_ALTFN (3) #define SSP3_SFRM (39) #define SSP3_SFRM_ALTFN (3) #define SSP3_SCLK (34) #define SSP3_SCLK_ALTFN (3) #define SSP1_RXD (26) #define SSP1_RXD_ALTFN (1 ) #define SSP1_TXD (25) #define SSP1_TXD_ALTFN (2 ) #define SSP1_SCLK (23) #define SSP1_SCLK_ALTFN (2 ) #define SSP1_SFRM (24) #define SSP1_SFRM_ALTFN (2 ) #define FFUART_RXD (96) #define FFUART_RXD_ALTFN (3) #define FFUART_TXD (99) #define FFUART_TXD_ALTFN (3) #define STUART_RXD (46) #define STUART_RXD_ALTFN (2) #define STUART_TXD (47) #define STUART_TXD_ALTFN (1) #define I2C_SCL (117) #define I2C_SCL_ALTFN (1) #define I2C_SDA (118) #define I2C_SDA_ALTFN (1) #define DS2745_SLAVE_ADDR (0x48) #if 0 TOSH_ASSIGN_PIN(CC_VREN,A,CC_VREN_PIN); TOSH_ASSIGN_PIN(CC_RSTN,A,CC_RSTN_PIN); TOSH_ASSIGN_PIN(CC_FIFO,A,CC_FIFO_PIN); TOSH_ASSIGN_PIN(RADIO_CCA,A,RADIO_CCA_PIN); TOSH_ASSIGN_PIN(CC_FIFOP,A,CC_FIFOP_PIN); TOSH_ASSIGN_PIN(CC_SFD,A,CC_SFD_PIN); TOSH_ASSIGN_PIN(CC_CSN,A,CC_CSN_PIN); #endif void TOSH_SET_PIN_DIRECTIONS(void) { PSSR = (PSSR_RDH | PSSR_PH); // Reenable the GPIO buffers (needed out of reset) #if 0 TOSH_CLR_CC_RSTN_PIN(); TOSH_MAKE_CC_RSTN_OUTPUT(); TOSH_CLR_CC_VREN_PIN(); TOSH_MAKE_CC_VREN_OUTPUT(); TOSH_SET_CC_CSN_PIN(); TOSH_MAKE_CC_CSN_OUTPUT(); TOSH_MAKE_CC_FIFOP_INPUT(); TOSH_MAKE_CC_FIFO_INPUT(); TOSH_MAKE_CC_SFD_INPUT(); TOSH_MAKE_RADIO_CCA_INPUT(); #endif } #endif //TOSH_HARDWARE_H tinyos-2.1.2+dfsg/tos/platforms/intelmote2/platform.h000066400000000000000000000000001207233610700226420ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/intelmote2/platform_message.h000066400000000000000000000051241207233610700243620ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:53 scipio Exp $ * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Defining the platform-independently named packet structures to be the * chip-specific CC1000 packet structures. * * @author Philip Levis * @date May 16 2005 * Revision: $Revision: 1.6 $ */ #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H #include "CC2420.h" #include "Serial.h" typedef union message_header { cc2420_header_t cc2420; serial_header_t serial; } message_header_t; typedef union message_footer { cc2420_footer_t cc2420; } message_footer_t; typedef union message_metadata { cc2420_metadata_t cc2420; serial_metadata_t serial; } message_metadata_t; #endif tinyos-2.1.2+dfsg/tos/platforms/intelmote2/tos.x000066400000000000000000000047331207233610700216640ustar00rootroot00000000000000OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") OUTPUT_ARCH(arm) MEMORY { text (rx) : ORIGIN = 0, LENGTH = 64M data (rw!x) : ORIGIN = 0x5c000000, LENGTH = 256K } SECTIONS { .text : { *(.vectors) *(.text .stub .text.* .gnu.linkonce.t.*) *(.rodata.*) *(.rodata) /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) *(.glue_7t) *(.glue_7) KEEP (*(.fini)) } >text PROVIDE (__etext = .); PROVIDE (_etext = .); PROVIDE (etext = .); .data : AT (ADDR(.text) + SIZEOF(.text)) { __data_start = . ; *(.data .data.* .gnu.linkonce.d.*) *(.gnu.linkonce.d*) _edata = .; PROVIDE (edata = .); } > data .bss SIZEOF(.data) + ADDR(.data) : { __bss_start = .; __bss_start__ = .; *(.dynbss) *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) _end = .; _bss_end__ = . ; __bss_end__ = . ; __end__ = . ; PROVIDE (end = .); } >data __data_load_start = LOADADDR(.data); __data_load_end = __data_load_start + SIZEOF(.data); /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } .stab.excl 0 : { *(.stab.excl) } .stab.exclstr 0 : { *(.stab.exclstr) } .stab.index 0 : { *(.stab.index) } .stab.indexstr 0 : { *(.stab.indexstr) } .comment 0 : { *(.comment) } /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ /* DWARF 1 */ .debug 0 : { *(.debug) } .line 0 : { *(.line) } /* GNU DWARF 1 extensions */ .debug_srcinfo 0 : { *(.debug_srcinfo) } .debug_sfnames 0 : { *(.debug_sfnames) } /* DWARF 1.1 and DWARF 2 */ .debug_aranges 0 : { *(.debug_aranges) } .debug_pubnames 0 : { *(.debug_pubnames) } /* DWARF 2 */ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } .debug_abbrev 0 : { *(.debug_abbrev) } .debug_line 0 : { *(.debug_line) } .debug_frame 0 : { *(.debug_frame) } .debug_str 0 : { *(.debug_str) } .debug_loc 0 : { *(.debug_loc) } .debug_macinfo 0 : { *(.debug_macinfo) } /* SGI/MIPS DWARF 2 extensions */ .debug_weaknames 0 : { *(.debug_weaknames) } .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } .stack 0x80000 : { _stack = .; *(.stack) } /DISCARD/ : { *(.note.GNU-stack) } } tinyos-2.1.2+dfsg/tos/platforms/intelmote2/toscrt0.s000066400000000000000000000174731207233610700224550ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Phil Buonadonna,David Gay * Date last modified: $Revision: 1.6 $ * */ .equ ARM_CPSR_MODE_MASK,(0x0000001F) .equ ARM_CPSR_INT_MASK,(0x000000C0) .equ ARM_CPSR_COND_MASK,(0xF8000000) .equ ARM_CPSR_MODE_USR,(0x10) .equ ARM_CPSR_MODE_FIQ,(0x11) .equ ARM_CPSR_MODE_IRQ,(0x12) .equ ARM_CPSR_MODE_SVC,(0x13) .equ ARM_CPSR_MODE_ABT,(0x17) .equ ARM_CPSR_MODE_UND,(0x1B) .equ ARM_CPSR_MODE_SYS,(0x1F) .equ ARM_CPSR_BIT_N,(0x80000000) .equ ARM_CPSR_BIT_Z,(0x40000000) .equ ARM_CPSR_BIT_C,(0x20000000) .equ ARM_CPSR_BIT_V,(0x10000000) .equ ARM_CPSR_BIT_Q,(0x08000000) .equ ARM_CPSR_BIT_I,(0x00000080) .equ ARM_CPSR_BIT_F,(0x00000040) .equ ARM_CPRS_BIT_T,(0x00000020) .equ _TOS_STACK_SIZE,(0x400) @ TinyOS Exception stack sizes .equ _TOS_ISRAM_PHYSBASE,(0x5C000000) @ Internal SRAM on PXA27X .text .globl start start: mrs r0, CPSR bic r0, r0, #ARM_CPSR_MODE_MASK orr r0, r0, #(ARM_CPSR_MODE_SVC | ARM_CPSR_INT_MASK) msr cpsr_cf, r0 /* Initialize the stack pointers for all modes */ mov r0,#_TOS_ISRAM_PHYSBASE ldr r2, =(256*1024 - 4) @ and go to the last slot (256K - 4) add r2,r2,r0 mov r0, #ARM_CPSR_MODE_ABT msr CPSR_c, R0 mov sp, r2 sub r2, r2, #_TOS_STACK_SIZE mov r0, #ARM_CPSR_MODE_UND msr CPSR_c, R0 mov sp, r2 sub r2, r2, #_TOS_STACK_SIZE mov r0, #ARM_CPSR_MODE_FIQ msr CPSR_c, R0 mov sp, r2 sub r2, r2, #_TOS_STACK_SIZE mov r0, #ARM_CPSR_MODE_IRQ msr CPSR_c, R0 mov sp, r2 sub r2, r2, #(_TOS_STACK_SIZE * 2) mov r0, #ARM_CPSR_MODE_SVC msr CPSR_c, R0 mov sp, r2 /* copy data */ ldr r0, =__data_load_start ldr r1, =__data_load_end ldr r2, =__data_start .Lcopy: cmp r0, r1 beq .Lcopydone ldrb r3, [r0], #1 strb r3, [r2], #1 b .Lcopy .Lcopydone: /* clear bss */ ldr r0, =__bss_start__ ldr r1, =__bss_end__ mov r2, #0 .Lclear: cmp r0, r1 beq .Lcleardone strb r2, [r0], #1 b .Lclear .Lcleardone: mov r0, #0 /* argc? */ mov r1, #0 /* argv? */ bl main .L1: nop b .L1 @if we receive and interrupt that we don't handle, behavior will depend on whether we're in release or not .ifdef RELEASE @reboot...assumes that we started out in supervisor mode..and that we'll be returning hplarmv_undef: movs PC, #0 hplarmv_swi: movs PC, #0 hplarmv_pabort: movs PC, #0 hplarmv_dabort: movs PC, #0 hplarmv_reserved: movs PC, #0 hplarmv_irq: movs PC, #0 hplarmv_fiq: movs PC, #0 .else @infinite loop so that we can detect what happened with a debugger @in future, we'll want to blink specific LED patter or something for the USER...or perhaps blue light of death hplarmv_undef: b hplarmv_undef hplarmv_swi: b hplarmv_swi hplarmv_pabort: b hplarmv_pabort hplarmv_dabort: b hplarmv_dabort hplarmv_reserved: b hplarmv_reserved hplarmv_irq: b hplarmv_irq hplarmv_fiq: b hplarmv_fiq .endif reset_handler_start: @ reset handler should first check whether this is a debug exception @ or a real RESET event. @ NOTE: r13 is only safe register to use. @ - For RESET, dont really care about which register is used @ - For debug exception, r13=DBG_r13, prevents application registers @ - from being corrupted, before debug handler can save. mrs r13, cpsr and r13, r13, #0x1f cmp r13, #0x15 @ are we in DBG mode? beq dbg_handler_stub @ if so, go to the dbg handler stub mov r13, #0x8000001c @ otherwise, enable debug, set MOE bits mcr p14, 0, r13, c10, c0, 0 @ and continue with the reset handler @ normal reset handler initialization follows code here, @ or branch to the reset handler. b start .align 5 @ align code to a cache line boundary. dbg_handler_stub: @ First save the state of the IC enable/disable bit in DBG_LR[0]. mrc p15, 0, r13, c1, c0, 0 and r13, r13, #0x1000 orr r14, r14, r13, lsr #12 @ Next, enable the IC. mrc p15, 0, r13, c1, c0, 0 orr r13, r13, #0x1000 mcr p15, 0, r13, c1, c0, 0 @ do a sync operation to ensure all outstanding instr fetches have @ completed before continuing. The invalidate cache line function @ serves as a synchronization operation, thats why it is used @ here. The target line is some scratch address in memory. adr r13, line2 mcr p15, 0, r13, c7, c5, 1 @ invalidate BTB. make sure downloaded vector table does not hit one of @ the applications branches cached in the BTB, branch to the wrong place mcr p15, 0, r13, c7, c5, 6 @ Now, send ready for download message to debugger, indicating debugger @ can begin the download. ready for download = 0x00B00000. TXloop: mrc p14, 0, r15, c14, c0, 0 @ first make sure TX reg. is available bvs TXloop mov r13, #0x00B00000 mcr p14, 0, r13, c8, c0, 0 @ now write to TX @ Wait for debugger to indicate that the download is complete. RXloop: mrc p14, 0, r15, c14, c0, 0 @ spin in loop waiting for data from the bpl RXloop @ debugger in RX. @ before reading the RX register to get the address to branch to, restore @ the state of the IC (saved in DBG_r14[0]) to the value it have at the @ start of the debug handler stub. Also, note it must be restored before @ reading the RX register because of limited scratch registers (r13) mrc p15, 0, r13, c1, c0, 0 @ First, check DBG_LR[0] to see if the IC was enabled or disabled tst r14, #0x1 @ Then, if it was previously disabled, then disable it now, otherwise, @ theres no need to change the state, because its already enabled. biceq r13, r13, #0x1000 mcr p15, 0, r13, c1, c0, 0 @ Restore the link register value bic r14, r14, #0x1 @ Now r13 can be used to read RX and get the target address to branch to. mrc p14, 0, r13, c9, c0, 0 @ Read RX and mov pc, r13 @ branch to downloaded address. @ scratch memory space used by the invalidate IC line function above. .align 5 @ make sure it starts at a cache line @ boundary, so nothing else is affected line2: .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .weak hplarmv_undef, hplarmv_swi, hplarmv_pabort, hplarmv_dabort, hplarmv_reserved, hplarmv_irq, hplarmv_fiq .section .vectors b reset_handler_start b hplarmv_undef b hplarmv_swi b hplarmv_pabort b hplarmv_dabort b hplarmv_reserved b hplarmv_irq b hplarmv_fiq .end tinyos-2.1.2+dfsg/tos/platforms/iris/000077500000000000000000000000001207233610700175435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/iris/.platform000066400000000000000000000034101207233610700213660ustar00rootroot00000000000000# # FILE: micaz/.platform # # Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. # # $Id: .platform,v 1.8 2009-03-10 20:39:18 mmaroti Exp $ # push( @includes, qw( %T/platforms/micaz %T/platforms/mica %T/platforms/iris/chips/rf230 %T/chips/rf230 %T/lib/rfxlink/layers %T/lib/rfxlink/util %T/platforms/iris/chips/at45db %T/platforms/mica2/chips/at45db %T/platforms/mica/chips/at45db %T/chips/at45db %T/platforms/iris/chips/ds2401 %T/platforms/mica2/chips/ds2401 %T/chips/ds2401 %T/chips/atm1281 %T/chips/atm1281/adc %T/chips/atm1281/timer %T/chips/atm128 %T/chips/atm128/adc %T/chips/atm128/pins %T/chips/atm128/spi %T/chips/atm128/i2c %T/chips/atm128/timer %T/lib/timer %T/lib/serial %T/lib/power %T/lib/diagmsg ) ); @opts = qw( -gcc=avr-gcc -mmcu=atmega1281 -fnesc-target=avr -fnesc-no-debug ); push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; push @opts, "-mingw-gcc" if $cygwin; $ENV{'CIL_MACHINE'} = "version_major=3 " . "version_minor=4 " . "version=avr-3.4.3 " . "short=2,1, " . "int=2,1 " . "long=4,1 " . "long_long=8,1 " . "pointer=2,1 " . "enum=2,1 " . "float=4,1 " . "double=4,1 " . "long_double=4,1 " . "void=1,1 " . "fun=1,1 " . "wchar_size_size=2,2 " . "alignof_string=1 " . "max_alignment=1 " . "char_wchar_signed=true,true " . "const_string_literals=true " . "big_endian=false " . "underscore_name=false " . "__builtin_va_list=true " . "__thread_is_keyword=true"; tinyos-2.1.2+dfsg/tos/platforms/iris/ActiveMessageC.nc000066400000000000000000000050421207233610700227110ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[uint8_t id]; interface Receive[uint8_t id]; interface Receive as Snoop[uint8_t id]; interface SendNotifier[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketTimeStamp as PacketTimeStampMicro; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RF230ActiveMessageC as MessageC; SplitControl = MessageC; AMSend = MessageC; Receive = MessageC.Receive; Snoop = MessageC.Snoop; SendNotifier = MessageC; Packet = MessageC; AMPacket = MessageC; PacketAcknowledgements = MessageC; LowPowerListening = MessageC; PacketLink = MessageC; RadioChannel = MessageC; PacketTimeStampMilli = MessageC; PacketTimeStampMicro = MessageC; } tinyos-2.1.2+dfsg/tos/platforms/iris/Ieee154MessageC.nc000066400000000000000000000050271207233610700226020ustar00rootroot00000000000000/* * Copyright (c) 2009, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ configuration Ieee154MessageC { provides { interface SplitControl; interface Ieee154Send; interface Receive as Ieee154Receive; interface SendNotifier; interface Packet; interface Ieee154Packet; interface Resource as SendResource[uint8_t clint]; interface PacketAcknowledgements; interface LowPowerListening; interface PacketLink; interface RadioChannel; interface PacketTimeStamp as PacketTimeStampMicro; interface PacketTimeStamp as PacketTimeStampMilli; } } implementation { components RF230Ieee154MessageC as MessageC; SplitControl = MessageC; Ieee154Send = MessageC; Ieee154Receive = MessageC; SendNotifier = MessageC; Packet = MessageC; Ieee154Packet = MessageC; SendResource = MessageC; PacketAcknowledgements = MessageC; LowPowerListening = MessageC; PacketLink = MessageC; RadioChannel = MessageC; PacketTimeStampMilli = MessageC; PacketTimeStampMicro = MessageC; } tinyos-2.1.2+dfsg/tos/platforms/iris/LocalTimeMicroC.nc000066400000000000000000000037501207233610700230400ustar00rootroot00000000000000/* * Copyright (c) 2008, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Timer.h" configuration LocalTimeMicroC { provides interface LocalTime; } implementation { components CounterOne16C; components new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t, 0, uint32_t); components new CounterToLocalTimeC(TMicro); LocalTime = CounterToLocalTimeC; CounterToLocalTimeC.Counter -> TransformCounterC; TransformCounterC.CounterFrom -> CounterOne16C; } tinyos-2.1.2+dfsg/tos/platforms/iris/MeasureClockC.nc000066400000000000000000000112631207233610700225500ustar00rootroot00000000000000/* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include #include /** * Measure cpu clock frequency at boot time. Provides an Atm128Calibrate * interface so that other components can adjust their calibration as * needed. * * @author David Gay * @author Janos Sallai */ module MeasureClockC { provides { /** * This code MUST be called from PlatformP only, hence the exactlyonce. */ interface Init @exactlyonce(); interface Atm128Calibrate; } } implementation { enum { /* This is expected number of cycles per jiffy at the platform's specified MHz. Assumes PLATFORM_MHZ == 1, 2, 4, 8 or 16. */ MAGIC = 488 / (16 / PLATFORM_MHZ) }; uint16_t cycles; command error_t Init.init() { /* Measure clock cycles per Jiffy (1/32768s) */ /* This code doesn't use the HPL to avoid timing issues when compiling with debugging on */ atomic { uint8_t now, wraps; uint16_t start; /* Setup timer2 to count 32 jiffies, and timer1 cpu cycles */ TCCR1B = 1 << CS10; ASSR = 1 << AS2; TCCR2B = 1 << CS21 | 1 << CS20; /* Wait for 1s for counter to stablilize after power-up (yes, it really does take that long). That's 122 wrap arounds of timer 1 at 8MHz. */ start = TCNT1; for (wraps = MAGIC / 2; wraps; ) { uint16_t next = TCNT1; if (next < start) wraps--; start = next; } /* Wait for a TCNT0 change */ now = TCNT2; while (TCNT2 == now) ; /* Read cpu cycles and wait for next TCNT2 change */ start = TCNT1; now = TCNT2; while (TCNT2 == now) ; cycles = TCNT1; cycles = (cycles - start + 16) >> 5; /* Reset to boot state */ ASSR = TCCR1B = TCCR2B = 0; TCNT2 = 0; TCNT1 = 0; TIFR1 = TIFR2 = 0xff; while (ASSR & (1 << TCN2UB | 1 << OCR2BUB | 1 << TCR2BUB)) ; } return SUCCESS; } async command uint16_t Atm128Calibrate.cyclesPerJiffy() { return cycles; } async command uint32_t Atm128Calibrate.calibrateMicro(uint32_t n) { return scale32(n + MAGIC / 2, cycles, MAGIC); } async command uint32_t Atm128Calibrate.actualMicro(uint32_t n) { return scale32(n + (cycles >> 1), MAGIC, cycles); } async command uint8_t Atm128Calibrate.adcPrescaler() { /* This is also log2(cycles/3.05). But that's a pain to compute */ if (cycles >= 390) return ATM128_ADC_PRESCALE_128; if (cycles >= 195) return ATM128_ADC_PRESCALE_64; if (cycles >= 97) return ATM128_ADC_PRESCALE_32; if (cycles >= 48) return ATM128_ADC_PRESCALE_16; if (cycles >= 24) return ATM128_ADC_PRESCALE_8; if (cycles >= 12) return ATM128_ADC_PRESCALE_4; return ATM128_ADC_PRESCALE_2; } async command uint16_t Atm128Calibrate.baudrateRegister(uint32_t baudrate) { // value is (cycles*32768) / (8*baudrate) - 1 return ((uint32_t)cycles << 12) / baudrate - 1; } } tinyos-2.1.2+dfsg/tos/platforms/iris/MicaTimer.h000066400000000000000000000140601207233610700215670ustar00rootroot00000000000000// $Id: MicaTimer.h,v 1.3 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef MICATIMER_H #define MICATIMER_H /* This file defines the rates at which the mica family's atmega1281 timer 1 and 3 timers run at. The goal is to present the user with microsend and 32khz timers, but it may not be possible to run the timers at these rates (because of the limited prescaler selection). So TinyOS picks a prescaler (based on the selected processor MHz) for each of these timers, and builds corresponding 16-bit alarms&counters (AlarmOne16C, AlarmThree16C, CounterOne16C, CounterThree16C) over hardware timers 1 and 3. TinyOS then divides these hardware timers by the appropriate power of 2 to get approximate 32-bit 32kHz and 1MHz alarms and counters (Alarm32khz32C, AlarmMicro32C, Counter32khz32C, CounterMicro32C). The constants and typedefs for all this configuration are defined here, based on the value of the MHZ preprocessor symbol, which shoud approximate the platform's MHZ rate. Note that the timers thus obtained will not be exactly at 32768Hz or 1MHz, because the clock doesn't divide by a power of two to those frequencies, and/or the clock frequency is not accurate. If you need more accurate timing, you should use the calibration functions offered by the Atm128Calibrate interface provided by PlatformC. This file also defines EXT_STANDBY_T0_THRESHOLD, a threshold on remaining time till the next timer 0 interrupt under which the mote should sleep in ext standby rather than power save. This is only important when not using the internal oscillator. Wake up from power save takes 65536 cycles (6 cycles for ext standby), which is, e.g., ~9.4ms at 7Mhz. */ #include #include /* Some types for the non-standard rates that mica timers might be running at. */ typedef struct { } T64khz; typedef struct { } T128khz; typedef struct { } T2mhz; typedef struct { } T4mhz; /* TX is the typedef for the rate of timer X, MICA_PRESCALER_X is the prescaler for timer X, MICA_DIVIDER_X_FOR_Y_LOG2 is the number of bits to shift timer X by to get rate Y, counter_X_overflow_t is uint16_t if MICA_DIVIDER_X_FOR_Y_LOG2 is 0, uint32_t otherwise. */ #if MHZ == 1 typedef T128khz TOne; typedef TMicro TThree; typedef uint32_t counter_one_overflow_t; typedef uint16_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_8, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 2, MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0, EXT_STANDBY_T0_THRESHOLD = 80, }; #elif MHZ == 2 typedef T32khz TOne; typedef T2mhz TThree; typedef uint16_t counter_one_overflow_t; typedef uint32_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0, MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 1, EXT_STANDBY_T0_THRESHOLD = 40 }; #elif MHZ == 4 typedef T64khz TOne; typedef T4mhz TThree; typedef uint32_t counter_one_overflow_t; typedef uint32_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 1, MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 2, EXT_STANDBY_T0_THRESHOLD = 24 }; #elif MHZ == 8 /* typedef T32khz TOne; typedef TMicro TThree; typedef uint16_t counter_one_overflow_t; typedef uint16_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_256, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0, MICA_PRESCALER_THREE = ATM128_CLK16_DIVIDE_8, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0, EXT_STANDBY_T0_THRESHOLD = 12 }; */ // get a 1MHz (1 microsecond resolution) timer for debugging purposes typedef TMicro TOne; typedef TMicro TThree; typedef uint32_t counter_one_overflow_t; typedef uint16_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_8, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 5, MICA_PRESCALER_THREE = ATM128_CLK16_DIVIDE_8, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0, EXT_STANDBY_T0_THRESHOLD = 12, }; #else #error "Unknown clock rate. MHZ must be defined to one of 1, 2, 4, or 8." #endif enum { PLATFORM_MHZ = MHZ }; #endif tinyos-2.1.2+dfsg/tos/platforms/iris/PlatformLed.h000066400000000000000000000041651207233610700221330ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ #ifndef _PLATFORMLED_H_ #define _PLATFORMLED_H_ /** Constants used in the generic LedC module to determine how many * named Led interfaces should be published. The value should match * the size of the table in PlatformLedsP, but we're not going to * guess that table's public name. */ #define PLATFORM_LED_COUNT 3 /** Map to the LED index for the red LED */ #define PLATFORM_LED_RED 0 /** Map to the LED index for the green LED */ #define PLATFORM_LED_GREEN 1 /** Map to the LED index for the blue LED */ #define PLATFORM_LED_YELLOW 2 #endif// _PLATFORMLED_H_ tinyos-2.1.2+dfsg/tos/platforms/iris/PlatformLedC.nc000066400000000000000000000037151207233610700224070ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Defines the Led and MultiLed interfaces in terms of the underlying * LedsC component. * * @author Peter A. Bigot */ configuration PlatformLedC { provides { interface MultiLed; interface Led[uint8_t led_id]; } } implementation { components LedsC; components PlatformLedP; MultiLed = PlatformLedP; Led = PlatformLedP; PlatformLedP.Leds -> LedsC; } tinyos-2.1.2+dfsg/tos/platforms/iris/PlatformLedP.nc000066400000000000000000000062401207233610700224200ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the People Power Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE * */ /** Defines the Led and MultiLed interfaces in terms of the underlying * LedsC component. * * @author Peter A. Bigot */ module PlatformLedP { provides { interface MultiLed; interface Led[uint8_t led_id]; } uses { interface Leds; } } implementation { async command void Led.on[ uint8_t led_id ] () { switch(led_id) { case 0: call Leds.led0On(); break; case 1: call Leds.led1On(); break; case 2: call Leds.led2On(); break; } } async command void Led.off[ uint8_t led_id ] () { switch(led_id) { case 0: call Leds.led0Off(); break; case 1: call Leds.led1Off(); break; case 2: call Leds.led2Off(); break; } } async command void Led.set[ uint8_t led_id ] (bool turn_on) { if (turn_on) { call Led.on[led_id](); } else { call Led.off[led_id](); } } async command void Led.toggle[ uint8_t led_id ] () { switch(led_id) { case 0: call Leds.led0Toggle(); break; case 1: call Leds.led1Toggle(); break; case 2: call Leds.led2Toggle(); break; } } async command unsigned int MultiLed.get () { return call Leds.get(); } async command void MultiLed.set (unsigned int val) { call Leds.set(val); } async command void MultiLed.on (unsigned int led_id) { call Led.on[led_id](); } async command void MultiLed.off (unsigned int led_id) { call Led.off[led_id](); } async command void MultiLed.setSingle (unsigned int led_id, bool turn_on) { call Led.set[led_id](turn_on); } async command void MultiLed.toggle (unsigned int led_id) { call Led.toggle[led_id](); } } tinyos-2.1.2+dfsg/tos/platforms/iris/TimeSyncMessageC.nc000066400000000000000000000054021207233610700232310ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include configuration TimeSyncMessageC { provides { interface SplitControl; interface Receive[uint8_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketTimeStamp as PacketTimeStampRadio; interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketRadio; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components RF230TimeSyncMessageC as MessageC; SplitControl = MessageC; Receive = MessageC.Receive; Snoop = MessageC.Snoop; Packet = MessageC; AMPacket = MessageC; PacketAcknowledgements = MessageC; LowPowerListening = MessageC; PacketTimeStampRadio = MessageC; TimeSyncAMSendRadio = MessageC; TimeSyncPacketRadio = MessageC; PacketTimeStampMilli = MessageC; TimeSyncAMSendMilli = MessageC; TimeSyncPacketMilli = MessageC; } tinyos-2.1.2+dfsg/tos/platforms/iris/chips/000077500000000000000000000000001207233610700206515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/iris/chips/at45db/000077500000000000000000000000001207233610700217345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/iris/chips/at45db/HplAt45dbIOC.nc000066400000000000000000000053521207233610700243050ustar00rootroot00000000000000// $Id: HplAt45dbIOC.nc,v 1.2 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Low-level access functions for the AT45DB flash on the mica2 and micaz. * * @author David Gay * @author Janos Sallai */ configuration HplAt45dbIOC { provides { interface Resource; interface SpiByte as FlashSpi; interface HplAt45dbByte; } } implementation { // Wire up byte I/O to At45db components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, PlatformC; components BusyWaitMicroC; components new NoArbiterC(); Resource = NoArbiterC; FlashSpi = HplAt45dbIOP; HplAt45dbByte = HplAt45dbIOP; PlatformC.SubInit -> HplAt45dbIOP; HplAt45dbIOP.Select -> Pins.PortA3; HplAt45dbIOP.Clk -> Pins.PortD5; HplAt45dbIOP.In -> Pins.PortD2; HplAt45dbIOP.Out -> Pins.PortD3; HplAt45dbIOP.BusyWait -> BusyWaitMicroC; } tinyos-2.1.2+dfsg/tos/platforms/iris/chips/at45db/HplAt45dbIOP.nc000066400000000000000000000137161207233610700243250ustar00rootroot00000000000000// $Id: HplAt45dbIOP.nc,v 1.3 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Low level hardware access to the onboard AT45DB flash chip. *

      * Note: This component includes optimised bit-banging SPI code with the * pins hardwired. Don't copy it to some other platform without * understanding it (see txByte). * * @author Jason Hill * @author David Gay * @author Philip Levis * @author Janos Sallai */ #include "Timer.h" module HplAt45dbIOP { provides { interface Init; interface SpiByte as FlashSpi; interface HplAt45dbByte; } uses { interface GeneralIO as Select; interface GeneralIO as Clk; interface GeneralIO as Out; interface GeneralIO as In; interface BusyWait; } } implementation { // We use SPI mode 0 (clock low at select time) command error_t Init.init() { call Select.makeOutput(); call Select.set(); call Clk.clr(); call Clk.makeOutput(); call Out.set(); call Out.makeOutput(); call In.clr(); call In.makeInput(); return SUCCESS; } command void HplAt45dbByte.select() { call Clk.clr(); // ensure SPI mode 0 call Select.clr(); } command void HplAt45dbByte.deselect() { call Select.set(); } #define BITINIT \ uint8_t clrClkAndData = PORTD & ~0x28 #define BIT(n) \ PORTD = clrClkAndData; \ asm __volatile__ \ ( "sbrc %2," #n "\n" \ "\tsbi 11,3\n" \ "\tsbi 11,5\n" \ "\tsbic 9,2\n" \ "\tori %0,1<<" #n "\n" \ : "=d" (spiIn) : "0" (spiIn), "r" (spiOut)) async command uint8_t FlashSpi.write(uint8_t spiOut) { uint8_t spiIn = 0; // This atomic ensures integrity at the hardware level... atomic { BITINIT; BIT(7); BIT(6); BIT(5); BIT(4); BIT(3); BIT(2); BIT(1); BIT(0); } return spiIn; } task void avail() { signal HplAt45dbByte.idle(); } command void HplAt45dbByte.waitIdle() { // at45db041 rev d fix by handsomezhu hongsong at ios.cn // http://mail.millennium.berkeley.edu/pipermail/tinyos-help/2008-January/030255.html int i; call Clk.clr(); call BusyWait.wait(2); while( ! call In.get() ) { for( i=0; i < 8; i ++ ) { call Clk.set(); call Clk.clr(); call BusyWait.wait(2); } } post avail(); } command bool HplAt45dbByte.getCompareStatus() { call Clk.set(); call Clk.clr(); // Wait for compare value to propagate asm volatile("nop"); asm volatile("nop"); return !call In.get(); } } tinyos-2.1.2+dfsg/tos/platforms/iris/chips/ds2401/000077500000000000000000000000001207233610700215665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/iris/chips/ds2401/PlatformIeeeEui64.h000066400000000000000000000041301207233610700251260ustar00rootroot00000000000000// $Id: PlatformIeeeEui64.h,v 1.2 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ #ifndef PLATFORMIEEEEUI64_H #define PLATFORMIEEEEUI64_H /* For now, let us set the company ID to 'X' 'B' 'W', and the first two bytes * of the serial ID to 'I' 'R'. The last three bytes of the serial ID are read * from the DS2401 chip. */ enum { IEEE_EUI64_COMPANY_ID_0 = 'X', IEEE_EUI64_COMPANY_ID_1 = 'B', IEEE_EUI64_COMPANY_ID_2 = 'W', IEEE_EUI64_SERIAL_ID_0 = 'I', IEEE_EUI64_SERIAL_ID_1 = 'R', }; #endif // PLATFORMIEEEEUI64_H tinyos-2.1.2+dfsg/tos/platforms/iris/chips/rf230/000077500000000000000000000000001207233610700215055ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/iris/chips/rf230/HplRF230C.nc000066400000000000000000000050521207233610700233340ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include configuration HplRF230C { provides { interface GeneralIO as SELN; interface Resource as SpiResource; interface FastSpiByte; interface GeneralIO as SLP_TR; interface GeneralIO as RSTN; interface GpioCapture as IRQ; interface Alarm as Alarm; interface LocalTime as LocalTimeRadio; } } implementation { components HplRF230P; IRQ = HplRF230P.IRQ; HplRF230P.PortCLKM -> IO.PortD6; HplRF230P.PortIRQ -> IO.PortD4; components Atm128SpiC as SpiC; SpiResource = SpiC.Resource[unique("Atm128SpiC.Resource")]; FastSpiByte = SpiC; components HplAtm128GeneralIOC as IO; SLP_TR = IO.PortB7; RSTN = IO.PortA6; SELN = IO.PortB0; components HplAtm128Timer1C as TimerC; HplRF230P.Capture -> TimerC.Capture; components new AlarmOne16C() as AlarmC; Alarm = AlarmC; components RealMainP; RealMainP.PlatformInit -> HplRF230P.PlatformInit; components LocalTimeMicroC; LocalTimeRadio = LocalTimeMicroC; } tinyos-2.1.2+dfsg/tos/platforms/iris/chips/rf230/HplRF230P.nc000066400000000000000000000051341207233610700233520ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ module HplRF230P { provides { interface GpioCapture as IRQ; interface Init as PlatformInit; } uses { interface HplAtm128Capture as Capture; interface GeneralIO as PortCLKM; interface GeneralIO as PortIRQ; } } implementation { command error_t PlatformInit.init() { call PortCLKM.makeInput(); call PortCLKM.clr(); call PortIRQ.makeInput(); call PortIRQ.clr(); call Capture.stop(); return SUCCESS; } async event void Capture.captured(uint16_t time) { time = call Capture.get(); // TODO: ask Cory why time is not the captured time signal IRQ.captured(time); } default async event void IRQ.captured(uint16_t time) { } async command error_t IRQ.captureRisingEdge() { call Capture.setEdge(TRUE); call Capture.reset(); call Capture.start(); return SUCCESS; } async command error_t IRQ.captureFallingEdge() { // falling edge comes when the IRQ_STATUS register of the RF230 is read return FAIL; } async command void IRQ.disable() { call Capture.stop(); } } tinyos-2.1.2+dfsg/tos/platforms/iris/chips/rf230/RadioConfig.h000066400000000000000000000071201207233610700240420ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #ifndef __RADIOCONFIG_H__ #define __RADIOCONFIG_H__ #include #include #include enum { /** * This is the value of the TRX_CTRL_0 register * which configures the output pin currents and the CLKM clock */ RF230_TRX_CTRL_0_VALUE = 0, /** * This is the default value of the CCA_MODE field in the PHY_CC_CCA register * which is used to configure the default mode of the clear channel assesment */ RF230_CCA_MODE_VALUE = RF230_CCA_MODE_3, /** * This is the value of the CCA_THRES register that controls the * energy levels used for clear channel assesment */ RF230_CCA_THRES_VALUE = 0xC7, }; /* This is the default value of the TX_PWR field of the PHY_TX_PWR register. */ #ifndef RF230_DEF_RFPOWER #define RF230_DEF_RFPOWER 0 #endif /* This is the default value of the CHANNEL field of the PHY_CC_CCA register. */ #ifndef RF230_DEF_CHANNEL #define RF230_DEF_CHANNEL 11 #endif /* The number of microseconds a sending IRIS mote will wait for an acknowledgement */ #ifndef SOFTWAREACK_TIMEOUT #define SOFTWAREACK_TIMEOUT 1000 #endif /* * This is the command used to calculate the CRC for the RF230 chip. * TODO: Check why the default crcByte implementation is in a different endianness */ inline uint16_t RF230_CRCBYTE_COMMAND(uint16_t crc, uint8_t data) { return _crc_ccitt_update(crc, data); } /** * This is the timer type of the radio alarm interface */ typedef TOne TRadio; typedef uint16_t tradio_size; /** * The number of radio alarm ticks per one microsecond (0.9216). * We use integers and no parentheses just to make deputy happy. * Ok, further hacks were required for deputy, I removed 00 from the * beginning and end to ba able to handle longer wait periods. */ #define RADIO_ALARM_MICROSEC (73728UL / MHZ / 32) * (1 << MICA_DIVIDE_ONE_FOR_32KHZ_LOG2) / 10000UL /** * The base two logarithm of the number of radio alarm ticks per one millisecond */ #define RADIO_ALARM_MILLI_EXP (5 + MICA_DIVIDE_ONE_FOR_32KHZ_LOG2) #endif//__RADIOCONFIG_H__ tinyos-2.1.2+dfsg/tos/platforms/iris/platform.h000066400000000000000000000001201207233610700215310ustar00rootroot00000000000000#include #define platform_bootstrap() { MCUSR=0; wdt_disable(); } tinyos-2.1.2+dfsg/tos/platforms/iris/platform_message.h000066400000000000000000000036701207233610700232520ustar00rootroot00000000000000/* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H #include #include typedef union message_header { rf230packet_header_t rf230; serial_header_t serial; } message_header_t; typedef union message_footer { rf230packet_footer_t rf230; } message_footer_t; typedef union message_metadata { rf230packet_metadata_t rf230; } message_metadata_t; #endif tinyos-2.1.2+dfsg/tos/platforms/iris/sim/000077500000000000000000000000001207233610700203335ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/iris/sim/.platform000066400000000000000000000015521207233610700221630ustar00rootroot00000000000000# # FILE: iris/.platform # # Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. And because of that, the current platform's include directory # must be specified, otherwise its search order is last instead of first. # # push( @includes, qw( %T/platforms/iris %T/platforms/micaz %T/platforms/mica %T/platforms/micaz/chips/cc2420 %T/chips/cc2420 %T/chips/atm128 %T/chips/atm128/adc %T/chips/atm128/pins %T/chips/atm128/spi %T/chips/atm128/timer %T/lib/power %T/lib/timer %T/lib/serial ) ); @opts = qw( -gcc=gcc -fnesc-no-debug -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask ); push @opts, "-mingw-gcc" if $cygwin; tinyos-2.1.2+dfsg/tos/platforms/mica/000077500000000000000000000000001207233610700175065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica/Alarm32khz32C.nc000066400000000000000000000024661207233610700222260ustar00rootroot00000000000000// $Id: Alarm32khz32C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * 32-bit 32kHz Alarm component as per TEP102 HAL guidelines. The mica * family 32kHz Alarm is built on hardware timer 1, and actually runs at * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy() * command to figure out the exact frequency. *

      * Upto three of these alarms can be created (one per hardware compare * register). Note that creating one of these Alarms consumes a 16-bit * 32kHz Alarm (see Alarm32khz16C). * * @author David Gay */ #include generic configuration Alarm32khz32C() { provides interface Alarm; } implementation { components new AlarmOne16C() as Alarm16, Counter32khz32C as Counter32, new TransformAlarmC(T32khz, uint32_t, TOne, uint16_t, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2) as Transform32; Alarm = Transform32; Transform32.AlarmFrom -> Alarm16; Transform32.Counter -> Counter32; } tinyos-2.1.2+dfsg/tos/platforms/mica/AlarmCounterMilliP.nc000066400000000000000000000023741207233610700235410ustar00rootroot00000000000000// $Id: AlarmCounterMilliP.nc,v 1.7 2007-07-06 17:33:22 scipio Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Configure hardware timer 0 for use as the mica family's millisecond * timer. This component does not follow the TEP102 HAL guidelines as * there is only one compare register for timer 0, which is used to * implement HilTimerMilliC. Hence it isn't useful to expose an * AlarmMilliC or CounterMillIC component. * * @author David Gay * @author Martin Turon */ #include #include configuration AlarmCounterMilliP { provides interface Init; provides interface Alarm as AlarmMilli32; provides interface Counter as CounterMilli32; } implementation { components new Atm128AlarmAsyncC(TMilli, ATM128_CLK8_DIVIDE_32); Init = Atm128AlarmAsyncC; AlarmMilli32 = Atm128AlarmAsyncC; CounterMilli32 = Atm128AlarmAsyncC; } tinyos-2.1.2+dfsg/tos/platforms/mica/AlarmMicro32C.nc000066400000000000000000000027341207233610700223340ustar00rootroot00000000000000// $Id: AlarmMicro32C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * 32-bit microsecond Alarm component as per TEP102 HAL guidelines. The * mica family microsecond Alarm is built on hardware timer 3, and actually * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() * command to figure out the exact frequency, or the * MeasureClockC.calibrateMicro() command to convert a number of microseconds * to the near-microsecond units used by this component. *

      * Upto three of these alarms can be created (one per hardware compare * register). Note that creating one of these Alarms consumes a 16-bit * microsecond Alarm (see AlarmMicro16C). * * @author David Gay */ #include generic configuration AlarmMicro32C() { provides interface Alarm; } implementation { components new AlarmThree16C() as Alarm16, CounterMicro32C as Counter32, new TransformAlarmC(TMicro, uint32_t, TThree, uint16_t, MICA_DIVIDE_THREE_FOR_MICRO_LOG2) as Transform32; Alarm = Transform32; Transform32.AlarmFrom -> Alarm16; Transform32.Counter -> Counter32; } tinyos-2.1.2+dfsg/tos/platforms/mica/AlarmOne16C.nc000066400000000000000000000025171207233610700220050ustar00rootroot00000000000000// $Id: AlarmOne16C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * 16-bit 32kHz Alarm component as per TEP102 HAL guidelines. The mica * family 32kHz Alarm is built on hardware timer 1, and actually runs at * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy() * command to figure out the exact frequency. *

      * Assumes an ~8MHz CPU clock, replace this component if you are running at * a radically different frequency. *

      * Upto three of these alarms can be created (one per hardware compare * register). * * @author David Gay */ #include generic configuration AlarmOne16C() { provides interface Alarm; } implementation { components HplAtm128Timer1C as HWTimer, InitOneP, new Atm128AlarmC(TOne, uint16_t, 3) as NAlarm; enum { COMPARE_ID = unique(UQ_TIMER1_COMPARE) }; Alarm = NAlarm; NAlarm.HplAtm128Timer -> HWTimer.Timer; NAlarm.HplAtm128Compare -> HWTimer.Compare[COMPARE_ID]; } tinyos-2.1.2+dfsg/tos/platforms/mica/AlarmThree16C.nc000066400000000000000000000027661207233610700223410ustar00rootroot00000000000000// $Id: AlarmThree16C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * 16-bit microsecond Alarm component as per TEP102 HAL guidelines. The * mica family microsecond Alarm is built on hardware timer 3, and actually * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() * command to figure out the exact frequency, or the * MeasureClockC.calibrateMicro() command to convert a number of microseconds * to the near-microsecond units used by this component. *

      * Assumes an ~8MHz CPU clock, replace this component if you are running at * a radically different frequency. *

      * Upto three of these alarms can be created (one per hardware compare * register). * * @author David Gay */ #include generic configuration AlarmThree16C() { provides interface Alarm; } implementation { components HplAtm128Timer3C as HWTimer, InitThreeP, new Atm128AlarmC(TThree, uint16_t, 100) as NAlarm; enum { COMPARE_ID = unique(UQ_TIMER3_COMPARE) }; Alarm = NAlarm; NAlarm.HplAtm128Timer -> HWTimer.Timer; NAlarm.HplAtm128Compare -> HWTimer.Compare[COMPARE_ID]; } tinyos-2.1.2+dfsg/tos/platforms/mica/BusyWaitMicroC.nc000066400000000000000000000062241207233610700227000ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Busy wait component as per TEP102. Supports waiting for at least some * number of microseconds. This functionality should be used sparingly, * when the overhead of posting a Timer or Alarm is greater than simply * busy waiting. * * @author David Gay */ module BusyWaitMicroC @safe() { provides interface BusyWait; } implementation { inline async command void BusyWait.wait(uint16_t dt) { /* In most cases (constant arg), the test is elided at compile-time */ if (dt) #if MHZ == 1 { dt = (dt + 3) >> 2; /* loop takes 4 cycles. */ asm volatile ( "1: sbiw %0,1\n" " brne 1b" : "+w" (dt)); } #elif MHZ == 2 { dt = (dt + 1) >> 1; /* loop takes 4 cycles. */ asm volatile ( "1: sbiw %0,1\n" " brne 1b" : "+w" (dt)); } #elif MHZ == 4 /* loop takes 4 cycles. */ asm volatile ( "1: sbiw %0,1\n" " brne 1b" : "+w" (dt)); #elif MHZ == 8 /* loop takes 8 cycles. this is 1uS if running on an internal 8MHz clock, and 1.09uS if running on the external crystal. */ asm volatile ( "1: sbiw %0,1\n" " adiw %0,1\n" " sbiw %0,1\n" " brne 1b" : "+w" (dt)); #else #error "Unknown clock rate. MHZ must be defined to one of 1, 2, 4, or 8." #endif } } tinyos-2.1.2+dfsg/tos/platforms/mica/Counter32khz32C.nc000066400000000000000000000021361207233610700226030ustar00rootroot00000000000000// $Id: Counter32khz32C.nc,v 1.5 2008-09-01 17:44:02 devdj Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * 32-bit 32kHz Counter component as per TEP102 HAL guidelines. The mica * family 32kHz clock is built on hardware timer 1, and actually runs at * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy() * command to figure out the exact frequency. * * @author David Gay */ #include configuration Counter32khz32C { provides interface Counter; } implementation { components CounterOne16C as Counter16, new TransformCounterC(T32khz, uint32_t, TOne, uint16_t, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2, counter_one_overflow_t) as Transform32; Counter = Transform32; Transform32.CounterFrom -> Counter16; } tinyos-2.1.2+dfsg/tos/platforms/mica/CounterMicro32C.nc000066400000000000000000000021621207233610700227120ustar00rootroot00000000000000// $Id: CounterMicro32C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * 32-bit microsecond Counter component as per TEP102 HAL guidelines. The * mica family microsecond clock is built on hardware timer 3, and actually * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() * command to figure out the exact frequency. * * @author David Gay */ #include configuration CounterMicro32C { provides interface Counter; } implementation { components CounterThree16C as Counter16, new TransformCounterC(TMicro, uint32_t, TThree, uint16_t, MICA_DIVIDE_THREE_FOR_MICRO_LOG2, counter_three_overflow_t) as Transform32; Counter = Transform32; Transform32.CounterFrom -> Counter16; } tinyos-2.1.2+dfsg/tos/platforms/mica/CounterOne16C.nc000066400000000000000000000017751207233610700223750ustar00rootroot00000000000000// $Id: CounterOne16C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * 16-bit 32kHz Counter component as per TEP102 HAL guidelines. The mica * family 32kHz clock is built on hardware timer 1, and actually runs at * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy() * command to figure out the exact frequency. * * @author David Gay */ #include configuration CounterOne16C { provides interface Counter; } implementation { components HplAtm128Timer1C as HWTimer, InitOneP, new Atm128CounterC(TOne, uint16_t) as NCounter; Counter = NCounter; NCounter.Timer -> HWTimer; } tinyos-2.1.2+dfsg/tos/platforms/mica/CounterThree16C.nc000066400000000000000000000020221207233610700227050ustar00rootroot00000000000000// $Id: CounterThree16C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * 16-bit microsecond Counter component as per TEP102 HAL guidelines. The * mica family microsecond clock is built on hardware timer 3, and actually * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() * command to figure out the exact frequency. * * @author David Gay */ #include configuration CounterThree16C { provides interface Counter; } implementation { components HplAtm128Timer3C as HWTimer, InitThreeP, new Atm128CounterC(TThree, uint16_t) as NCounter; Counter = NCounter; NCounter.Timer -> HWTimer; } tinyos-2.1.2+dfsg/tos/platforms/mica/HilTimerMilliC.nc000066400000000000000000000050241207233610700226400ustar00rootroot00000000000000//$Id: HilTimerMilliC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Millisecond timer for the mica family (see TEP102). The "millisecond" * timer system is built on hardware timer 0, running at 1024Hz. * * @author Cory Sharp * @author Martin Turon */ #include "Timer.h" configuration HilTimerMilliC { provides interface Init; provides interface Timer as TimerMilli[uint8_t num]; provides interface LocalTime; } implementation { enum { TIMER_COUNT = uniqueCount(UQ_TIMER_MILLI) }; components AlarmCounterMilliP, new AlarmToTimerC(TMilli), new VirtualizeTimerC(TMilli, TIMER_COUNT), new CounterToLocalTimeC(TMilli); Init = AlarmCounterMilliP; TimerMilli = VirtualizeTimerC; VirtualizeTimerC.TimerFrom -> AlarmToTimerC; AlarmToTimerC.Alarm -> AlarmCounterMilliP; LocalTime = CounterToLocalTimeC; CounterToLocalTimeC.Counter -> AlarmCounterMilliP; } tinyos-2.1.2+dfsg/tos/platforms/mica/InitOneP.nc000066400000000000000000000016261207233610700215220ustar00rootroot00000000000000// $Id: InitOneP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Internal mica-family timer component. Sets up hardware timer 1 to run * at cpu clock / 256, at boot time. Assumes an ~8MHz CPU clock, replace * this component if you are running at a radically different frequency. * * @author David Gay */ #include configuration InitOneP { } implementation { components PlatformC, HplAtm128Timer1C as HWTimer, new Atm128TimerInitC(uint16_t, MICA_PRESCALER_ONE) as InitOne; PlatformC.SubInit -> InitOne; InitOne.Timer -> HWTimer; } tinyos-2.1.2+dfsg/tos/platforms/mica/InitThreeP.nc000066400000000000000000000016401207233610700220440ustar00rootroot00000000000000// $Id: InitThreeP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Internal mica-family timer component. Sets up hardware timer 3 to run * at cpu clock / 8, at boot time. Assumes an ~8MHz CPU clock, replace * this component if you are running at a radically different frequency. * * @author David Gay */ #include configuration InitThreeP { } implementation { components PlatformC, HplAtm128Timer3C as HWTimer, new Atm128TimerInitC(uint16_t, MICA_PRESCALER_THREE) as InitThree; PlatformC.SubInit -> InitThree; InitThree.Timer -> HWTimer; } tinyos-2.1.2+dfsg/tos/platforms/mica/LocalTimeMicroC.nc000066400000000000000000000035431207233610700230030ustar00rootroot00000000000000/* * Copyright (c) 2008, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Miklos Maroti */ #include "Timer.h" configuration LocalTimeMicroC { provides interface LocalTime; } implementation { components CounterMicro32C; components new CounterToLocalTimeC(TMicro); LocalTime = CounterToLocalTimeC; CounterToLocalTimeC.Counter -> CounterMicro32C; } tinyos-2.1.2+dfsg/tos/platforms/mica/MeasureClockC.nc000066400000000000000000000062071207233610700225150ustar00rootroot00000000000000// $Id: MeasureClockC.nc,v 1.6 2010-03-27 21:29:20 mmaroti Exp $ /* * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #include #include /** * Measure cpu clock frequency at boot time. Provides an Atm128Calibrate * interface so that other components can adjust their calibration as * needed. * * @author David Gay */ module MeasureClockC @safe() { provides { /** * This code MUST be called from PlatformP only, hence the exactlyonce. */ interface Init @exactlyonce(); interface Atm128Calibrate; } } implementation { enum { /* This is expected number of cycles per jiffy at the platform's specified MHz. Assumes PLATFORM_MHZ == 1, 2, 4, 8 or 16. */ MAGIC = 488 / (16 / PLATFORM_MHZ) }; uint16_t cycles; command error_t Init.init() { /* Measure clock cycles per Jiffy (1/32768s) */ /* This code doesn't use the HPL to avoid timing issues when compiling with debugging on */ atomic { uint8_t now, wraps; uint16_t start; /* Setup timer0 to count 32 jiffies, and timer1 cpu cycles */ TCCR1B = 1 << CS10; ASSR = 1 << AS0; TCCR0 = 1 << CS01 | 1 << CS00; /* Wait for 1s for counter to stablilize after power-up (yes, it really does take that long). That's 122 wrap arounds of timer 1 at 8MHz. */ start = TCNT1; for (wraps = MAGIC / 2; wraps; ) { uint16_t next = TCNT1; if (next < start) wraps--; start = next; } /* Wait for a TCNT0 change */ now = TCNT0; while (TCNT0 == now) ; /* Read cpu cycles and wait for next TCNT0 change */ start = TCNT1; now = TCNT0; while (TCNT0 == now) ; cycles = TCNT1; cycles = (cycles - start + 16) >> 5; /* Reset to boot state */ ASSR = TCCR1B = TCCR0 = 0; TCNT0 = 0; TCNT1 = 0; ETIFR = TIFR = 0xff; while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB)) ; } return SUCCESS; } async command uint16_t Atm128Calibrate.cyclesPerJiffy() { return cycles; } async command uint32_t Atm128Calibrate.calibrateMicro(uint32_t n) { return scale32(n, cycles, MAGIC); } async command uint32_t Atm128Calibrate.actualMicro(uint32_t n) { return scale32(n, MAGIC, cycles); } async command uint8_t Atm128Calibrate.adcPrescaler() { /* This is also log2(cycles/3.05). But that's a pain to compute */ if (cycles >= 390) return ATM128_ADC_PRESCALE_128; if (cycles >= 195) return ATM128_ADC_PRESCALE_64; if (cycles >= 97) return ATM128_ADC_PRESCALE_32; if (cycles >= 48) return ATM128_ADC_PRESCALE_16; if (cycles >= 24) return ATM128_ADC_PRESCALE_8; if (cycles >= 12) return ATM128_ADC_PRESCALE_4; return ATM128_ADC_PRESCALE_2; } async command uint16_t Atm128Calibrate.baudrateRegister(uint32_t baudrate) { // value is (cycles*32768) / (8*baudrate) - 1 return ((uint32_t)cycles << 12) / baudrate - 1; } } tinyos-2.1.2+dfsg/tos/platforms/mica/MicaBusAdc.nc000066400000000000000000000013031207233610700217600ustar00rootroot00000000000000// $Id: MicaBusAdc.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * A simplistic beginning to providing a standard interface to the mica-family * 51-pin bus. Just provides the PW0-PW7 digital I/O pins. */ interface MicaBusAdc { /** * Return the A/D channel number to use for one of the ADCn pins. */ async command uint8_t getChannel(); } tinyos-2.1.2+dfsg/tos/platforms/mica/MicaBusC.nc000066400000000000000000000061131207233610700214570ustar00rootroot00000000000000// $Id: MicaBusC.nc,v 1.7 2010-06-15 21:24:16 mmaroti Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * A simplistic beginning to providing a standard interface to the * mica-family 51-pin bus. Just provides the PW0-PW7 and Int0-3 digital * I/O pins and returns the ADC channel number for the ADC pins. * @author David Gay */ configuration MicaBusC { provides { interface GeneralIO as PW0; interface GeneralIO as PW1; interface GeneralIO as PW2; interface GeneralIO as PW3; interface GeneralIO as PW4; interface GeneralIO as PW5; interface GeneralIO as PW6; interface GeneralIO as PW7; interface GeneralIO as Int0; interface GeneralIO as Int1; interface GeneralIO as Int2; interface GeneralIO as Int3; /* INT lines used as interrupt source */ interface GpioInterrupt as Int0_Interrupt; interface GpioInterrupt as Int1_Interrupt; interface GpioInterrupt as Int2_Interrupt; interface GpioInterrupt as Int3_Interrupt; interface GeneralIO as USART1_CLK; interface GeneralIO as USART1_RXD; interface GeneralIO as USART1_TXD; /* Separate interfaces to allow inlining to occur */ interface MicaBusAdc as Adc0; interface MicaBusAdc as Adc1; interface MicaBusAdc as Adc2; interface MicaBusAdc as Adc3; interface MicaBusAdc as Adc4; interface MicaBusAdc as Adc5; interface MicaBusAdc as Adc6; interface MicaBusAdc as Adc7; } } implementation { components HplAtm128GeneralIOC as Pins, MicaBusP; components HplAtm128InterruptC; PW0 = Pins.PortC0; PW1 = Pins.PortC1; PW2 = Pins.PortC2; PW3 = Pins.PortC3; PW4 = Pins.PortC4; PW5 = Pins.PortC5; PW6 = Pins.PortC6; PW7 = Pins.PortC7; Int0 = Pins.PortE4; Int1 = Pins.PortE5; Int2 = Pins.PortE6; Int3 = Pins.PortE7; USART1_CLK = Pins.PortD5; USART1_RXD = Pins.PortD2; USART1_TXD = Pins.PortD3; components new Atm128GpioInterruptC() as Atm128GpioInterrupt0C; Atm128GpioInterrupt0C.Atm128Interrupt->HplAtm128InterruptC.Int4; Int0_Interrupt=Atm128GpioInterrupt0C.Interrupt; components new Atm128GpioInterruptC() as Atm128GpioInterrupt1C; Atm128GpioInterrupt1C.Atm128Interrupt->HplAtm128InterruptC.Int5; Int1_Interrupt=Atm128GpioInterrupt1C.Interrupt; components new Atm128GpioInterruptC() as Atm128GpioInterrupt2C; Atm128GpioInterrupt2C.Atm128Interrupt->HplAtm128InterruptC.Int6; Int2_Interrupt=Atm128GpioInterrupt2C.Interrupt; components new Atm128GpioInterruptC() as Atm128GpioInterrupt3C; Atm128GpioInterrupt3C.Atm128Interrupt->HplAtm128InterruptC.Int7; Int3_Interrupt=Atm128GpioInterrupt3C.Interrupt; Adc0 = MicaBusP.Adc0; Adc1 = MicaBusP.Adc1; Adc2 = MicaBusP.Adc2; Adc3 = MicaBusP.Adc3; Adc4 = MicaBusP.Adc4; Adc5 = MicaBusP.Adc5; Adc6 = MicaBusP.Adc6; Adc7 = MicaBusP.Adc7; } tinyos-2.1.2+dfsg/tos/platforms/mica/MicaBusP.nc000066400000000000000000000024011207233610700214700ustar00rootroot00000000000000// $Id: MicaBusP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Internal component of the simplistic mica bus interface. * @author David Gay */ module MicaBusP { provides { interface MicaBusAdc as Adc0; interface MicaBusAdc as Adc1; interface MicaBusAdc as Adc2; interface MicaBusAdc as Adc3; interface MicaBusAdc as Adc4; interface MicaBusAdc as Adc5; interface MicaBusAdc as Adc6; interface MicaBusAdc as Adc7; } } implementation { async command uint8_t Adc0.getChannel() { return 0; } async command uint8_t Adc1.getChannel() { return 1; } async command uint8_t Adc2.getChannel() { return 2; } async command uint8_t Adc3.getChannel() { return 3; } async command uint8_t Adc4.getChannel() { return 4; } async command uint8_t Adc5.getChannel() { return 5; } async command uint8_t Adc6.getChannel() { return 6; } async command uint8_t Adc7.getChannel() { return 7; } } tinyos-2.1.2+dfsg/tos/platforms/mica/MicaTimer.h000066400000000000000000000101161207233610700215300ustar00rootroot00000000000000// $Id: MicaTimer.h,v 1.5 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef MICATIMER_H #define MICATIMER_H /* This file defines the rates at which the mica family's atmega128 timer 1 and 3 timers run at. The goal is to present the user with microsend and 32khz timers, but it may not be possible to run the timers at these rates (because of the limited prescaler selection). So TinyOS picks a prescaler (based on the selected processor MHz) for each of these timers, and builds corresponding 16-bit alarms&counters (AlarmOne16C, AlarmThree16C, CounterOne16C, CounterThree16C) over hardware timers 1 and 3. TinyOS then divides these hardware timers by the appropriate power of 2 to get approximate 32-bit 32kHz and 1MHz alarms and counters (Alarm32khz32C, AlarmMicro32C, Counter32khz32C, CounterMicro32C). The constants and typedefs for all this configuration are defined here, based on the value of the MHZ preprocessor symbol, which shoud approximate the platform's MHZ rate. Note that the timers thus obtained will not be exactly at 32768Hz or 1MHz, because the clock doesn't divide by a power of two to those frequencies, and/or the clock frequency is not accurate. If you need more accurate timing, you should use the calibration functions offered by the Atm128Calibrate interface provided by PlatformC. This file also defines EXT_STANDBY_T0_THRESHOLD, a threshold on remaining time till the next timer 0 interrupt under which the mote should sleep in ext standby rather than power save. This is only important when not using the internal oscillator. Wake up from power save takes 65536 cycles (6 cycles for ext standby), which is, e.g., ~9.4ms at 7Mhz. */ #include #include /* Some types for the non-standard rates that mica timers might be running at. */ typedef struct { } T64khz; typedef struct { } T128khz; typedef struct { } T2mhz; typedef struct { } T4mhz; /* TX is the typedef for the rate of timer X, MICA_PRESCALER_X is the prescaler for timer X, MICA_DIVIDER_X_FOR_Y_LOG2 is the number of bits to shift timer X by to get rate Y, counter_X_overflow_t is uint16_t if MICA_DIVIDER_X_FOR_Y_LOG2 is 0, uint32_t otherwise. */ #if MHZ == 1 typedef T128khz TOne; typedef TMicro TThree; typedef uint32_t counter_one_overflow_t; typedef uint16_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_8, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 2, MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0, EXT_STANDBY_T0_THRESHOLD = 80, }; #elif MHZ == 2 typedef T32khz TOne; typedef T2mhz TThree; typedef uint16_t counter_one_overflow_t; typedef uint32_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0, MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 1, EXT_STANDBY_T0_THRESHOLD = 40 }; #elif MHZ == 4 typedef T64khz TOne; typedef T4mhz TThree; typedef uint32_t counter_one_overflow_t; typedef uint32_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 1, MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 2, EXT_STANDBY_T0_THRESHOLD = 24 }; #elif MHZ == 8 typedef T32khz TOne; typedef TMicro TThree; typedef uint16_t counter_one_overflow_t; typedef uint16_t counter_three_overflow_t; enum { MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_256, MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0, MICA_PRESCALER_THREE = ATM128_CLK16_DIVIDE_8, MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0, EXT_STANDBY_T0_THRESHOLD = 12 }; #else #error "Unknown clock rate. MHZ must be defined to one of 1, 2, 4, or 8." #endif enum { PLATFORM_MHZ = MHZ }; #endif tinyos-2.1.2+dfsg/tos/platforms/mica/PlatformC.nc000066400000000000000000000045021207233610700217200ustar00rootroot00000000000000/// $Id: PlatformC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Initialisation component for mica-family platforms. See TEP107. Each * mica-family member must also provide a MotePlatformC with initialisation * specific to that member. * * @author Martin Turon */ #include "hardware.h" configuration PlatformC { provides { interface Init; /** * Provides calibration information for other components. */ interface Atm128Calibrate; } uses interface Init as SubInit; } implementation { components PlatformP, MotePlatformC, MeasureClockC; Init = PlatformP; Atm128Calibrate = MeasureClockC; PlatformP.MeasureClock -> MeasureClockC; PlatformP.MoteInit -> MotePlatformC; MotePlatformC.SubInit = SubInit; } tinyos-2.1.2+dfsg/tos/platforms/mica/PlatformLedsC.nc000066400000000000000000000042201207233610700225250ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Platform-specific LED interface. * * @author Martin Turon */ #include "hardware.h" configuration PlatformLedsC { provides interface GeneralIO as Led0; provides interface GeneralIO as Led1; provides interface GeneralIO as Led2; uses interface Init; } implementation { components HplAtm128GeneralIOC as IO; components PlatformP; Init = PlatformP.MoteInit; Led0 = IO.PortA2; // Pin A2 = Red LED Led1 = IO.PortA1; // Pin A1 = Green LED Led2 = IO.PortA0; // Pin A0 = Yellow LED } tinyos-2.1.2+dfsg/tos/platforms/mica/PlatformP.nc000066400000000000000000000041161207233610700217360ustar00rootroot00000000000000/// $Id: PlatformP.nc,v 1.6 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Internal platform boot code. * * @author Martin Turon */ #include "hardware.h" module PlatformP @safe() { provides interface Init; uses interface Init as MoteInit; uses interface Init as MeasureClock; } implementation { command error_t Init.init() { error_t ok; /* First thing is to measure the clock frequency */ ok = call MeasureClock.init(); ok = ecombine(ok, call MoteInit.init()); return ok; } } tinyos-2.1.2+dfsg/tos/platforms/mica/PlatformSerialC.nc000066400000000000000000000040271207233610700230620ustar00rootroot00000000000000/* * Copyright (c) 2006 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Alec Woo * @author Jonathan Hui * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $ */ configuration PlatformSerialC { provides interface StdControl; provides interface UartStream; provides interface UartByte; } implementation { components Atm128Uart0C as Uart0; StdControl = Uart0; UartStream = Uart0; UartByte = Uart0; components CounterMicro32C; Uart0.Counter -> CounterMicro32C; } tinyos-2.1.2+dfsg/tos/platforms/mica/VoltageC.nc000066400000000000000000000037441207233610700215440ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Battery Voltage. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. * * @author Razvan Musaloiu-E. */ generic configuration VoltageC() { provides interface Read; } implementation { components new AdcReadClientC(), VoltageP; Read = AdcReadClientC; AdcReadClientC.Atm128AdcConfig -> VoltageP; } tinyos-2.1.2+dfsg/tos/platforms/mica/VoltageNowC.nc000066400000000000000000000041121207233610700222160ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Battery Voltage. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. * * @author Razvan Musaloiu-E. */ #include "hardware.h" generic configuration VoltageNowC() { provides interface Resource; provides interface ReadNow; } implementation { components new AdcReadNowClientC(), VoltageP; ReadNow = AdcReadNowClientC; Resource = AdcReadNowClientC; AdcReadNowClientC.Atm128AdcConfig -> VoltageP; } tinyos-2.1.2+dfsg/tos/platforms/mica/VoltageP.nc000066400000000000000000000043141207233610700215530ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Battery Voltage. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. * * @author Razvan Musaloiu-E. */ module VoltageP { provides interface Atm128AdcConfig; } implementation { async command uint8_t Atm128AdcConfig.getChannel() { // select the 1.23V (V_BG). Reference: Table 97, page 244 from the Atmega128 return ATM128_ADC_SNGL_1_23; } async command uint8_t Atm128AdcConfig.getRefVoltage() { return ATM128_ADC_VREF_OFF; } async command uint8_t Atm128AdcConfig.getPrescaler() { return ATM128_ADC_PRESCALE; } } tinyos-2.1.2+dfsg/tos/platforms/mica/VoltageStreamC.nc000066400000000000000000000040351207233610700227120ustar00rootroot00000000000000/* Copyright (c) 2007 Johns Hopkins University. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Battery Voltage. The returned value represents the difference * between the battery voltage and V_BG (1.23V). The formula to convert * it to mV is: 1223 * 1024 / value. * * @author Razvan Musaloiu-E. */ #include "hardware.h" generic configuration VoltageStreamC() { provides interface ReadStream; } implementation { components VoltageP, new AdcReadStreamClientC(); ReadStream = AdcReadStreamClientC; AdcReadStreamClientC.Atm128AdcConfig -> VoltageP; } tinyos-2.1.2+dfsg/tos/platforms/mica/chips/000077500000000000000000000000001207233610700206145ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica/chips/at45db/000077500000000000000000000000001207233610700216775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica/chips/at45db/HplAt45dbC.nc000066400000000000000000000020021207233610700240050ustar00rootroot00000000000000// $Id: HplAt45dbC.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * AT45DB flash chip HPL for mica family. Each family member must provide * and HplAt45dbIOC component implementing the SPIByte and HplAt45dbByte * interfaces required by HplAt45dbByteC. * * @author David Gay */ configuration HplAt45dbC { provides interface HplAt45db @atmostonce(); } implementation { // 9 because the AT45DB041B has 264 byte pages (log2 page size rounded up) components new HplAt45dbByteC(9), HplAt45dbIOC; HplAt45db = HplAt45dbByteC; HplAt45dbByteC.Resource -> HplAt45dbIOC; HplAt45dbByteC.FlashSpi -> HplAt45dbIOC; HplAt45dbByteC.HplAt45dbByte -> HplAt45dbIOC; } tinyos-2.1.2+dfsg/tos/platforms/mica/platform.h000066400000000000000000000000001207233610700214710ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica/sim/000077500000000000000000000000001207233610700202765ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica/sim/HilTimerMilliC.nc000066400000000000000000000047461207233610700234420ustar00rootroot00000000000000//$Id: HilTimerMilliC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $ /* Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Millisecond timer for the mica family (see TEP102). The "millisecond" * timer system is built on hardware timer 0, running at 1024Hz. * * @author Cory Sharp * @author Martin Turon */ #include "Timer.h" configuration HilTimerMilliC { provides interface Init; provides interface Timer as TimerMilli[uint8_t num]; provides interface LocalTime; } implementation { components AlarmCounterMilliP, new AlarmToTimerC(TMilli), new VirtualizeTimerC(TMilli, uniqueCount(UQ_TIMER_MILLI)), new CounterToLocalTimeC(TMilli); Init = AlarmCounterMilliP; TimerMilli = VirtualizeTimerC; VirtualizeTimerC.TimerFrom -> AlarmToTimerC; AlarmToTimerC.Alarm -> AlarmCounterMilliP; LocalTime = CounterToLocalTimeC; CounterToLocalTimeC.Counter -> AlarmCounterMilliP; } tinyos-2.1.2+dfsg/tos/platforms/mica/sim/MeasureClockC.nc000066400000000000000000000012311207233610700232750ustar00rootroot00000000000000#include "scale.h" /** * Simulation version of MeasureClockC for the mica platform. See * tos/platforms/mica/MeasureClockC.nc for more details. * * @author Phil Levis */ module MeasureClockC { /* This code MUST be called from PlatformP only, hence the exactlyonce */ provides interface Init @exactlyonce(); provides { command uint16_t cyclesPerJiffy(); command uint32_t calibrateMicro(uint32_t n); } } implementation { command error_t Init.init() { return SUCCESS; } command uint16_t cyclesPerJiffy() { return (1 << 8); } command uint32_t calibrateMicro(uint32_t n) { return scale32(n + 122, 244, (1 << 32)); } } tinyos-2.1.2+dfsg/tos/platforms/mica/sim/PlatformC.nc000066400000000000000000000040601207233610700225070ustar00rootroot00000000000000/// $Id: PlatformC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * @author Martin Turon */ #include "hardware.h" configuration PlatformC { provides { interface Init; command uint32_t calibrateMicro(uint32_t n); } uses interface Init as SubInit; } implementation { components PlatformP, MotePlatformC, MeasureClockC; Init = PlatformP; PlatformP.MoteInit -> MotePlatformC; MotePlatformC.SubInit = SubInit; PlatformP.MeasureClock -> MeasureClockC; } tinyos-2.1.2+dfsg/tos/platforms/mica2/000077500000000000000000000000001207233610700175705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2/.platform000066400000000000000000000027731207233610700214260ustar00rootroot00000000000000# # FILE: mica2/.platform # # Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. # # $Id: .platform,v 1.9 2008-05-31 20:18:32 regehr Exp $ # push( @includes, qw( %T/platforms/mica %T/platforms/mica2/chips/cc1000 %T/chips/cc1000 %T/platforms/mica2/chips/at45db %T/platforms/mica/chips/at45db %T/chips/at45db %T/chips/atm128 %T/chips/atm128/adc %T/chips/atm128/i2c %T/chips/atm128/pins %T/chips/atm128/spi %T/chips/atm128/timer %T/lib/timer %T/lib/serial %T/lib/power ) ); @opts = qw( -gcc=avr-gcc -mmcu=atmega128 -fnesc-target=avr -fnesc-no-debug ); push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; push @opts, "-mingw-gcc" if $cygwin; $ENV{'CIL_MACHINE'} = "version_major=3 " . "version_minor=4 " . "version=avr-3.4.3 " . "short=2,1, " . "int=2,1 " . "long=4,1 " . "long_long=8,1 " . "pointer=2,1 " . "enum=2,1 " . "float=4,1 " . "double=4,1 " . "long_double=4,1 " . "void=1,1 " . "fun=1,1 " . "wchar_size_size=2,2 " . "alignof_string=1 " . "max_alignment=1 " . "char_wchar_signed=true,true " . "const_string_literals=true " . "big_endian=false " . "underscore_name=false " . "__builtin_va_list=true " . "__thread_is_keyword=true"; tinyos-2.1.2+dfsg/tos/platforms/mica2/ActiveMessageC.nc000066400000000000000000000060741207233610700227440ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.8 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.8 2010-06-29 22:07:53 scipio Exp $ * */ /** * The Active Message layer on the mica2 platform. This is a naming wrapper * around the CC1000 Active Message layer. * * @author Philip Levis * @date June 19 2005 */ configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[uint8_t id]; interface Receive[uint8_t id]; interface Receive as Snoop[uint8_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStampMilli; interface PacketTimeStamp as PacketTimeStamp32khz; interface LowPowerListening; } } implementation { components CC1000ActiveMessageC as AM; SplitControl = AM; AMSend = AM; Receive = AM.Receive; Snoop = AM.Snoop; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; PacketTimeStampMilli = AM; PacketTimeStamp32khz = AM; LowPowerListening = AM; } tinyos-2.1.2+dfsg/tos/platforms/mica2/DemoSensorC.nc000066400000000000000000000011731207233610700222750ustar00rootroot00000000000000/* $Id: DemoSensorC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Demo sensor for the mica2 platform. * * @author David Gay */ generic configuration DemoSensorC() { provides interface Read; } implementation { components new VoltageC() as Sensor; Read = Sensor; } tinyos-2.1.2+dfsg/tos/platforms/mica2/DemoSensorNowC.nc000066400000000000000000000012761207233610700227650ustar00rootroot00000000000000/* $Id: DemoSensorNowC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Demo sensor for the mica2 platform. * * @author David Gay */ generic configuration DemoSensorNowC() { provides interface Resource; provides interface ReadNow; } implementation { components new VoltageNowC() as Sensor; Resource = Sensor; ReadNow = Sensor; } tinyos-2.1.2+dfsg/tos/platforms/mica2/DemoSensorStreamC.nc000066400000000000000000000012451207233610700234510ustar00rootroot00000000000000/* $Id: DemoSensorStreamC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Demo sensor for the mica2 platform. * * @author David Gay */ generic configuration DemoSensorStreamC() { provides interface ReadStream; } implementation { components new VoltageStreamC() as SensorStream; ReadStream = SensorStream; } tinyos-2.1.2+dfsg/tos/platforms/mica2/MotePlatformC.nc000066400000000000000000000015371207233610700226340ustar00rootroot00000000000000/* $Id: MotePlatformC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The portion of a mica-family initialisation that is mote-specific. * * @author David Gay */ configuration MotePlatformC { provides interface Init as PlatformInit; uses interface Init as SubInit; } implementation { components MotePlatformP, HplCC1000InitP, HplAtm128GeneralIOC as IO; PlatformInit = MotePlatformP; PlatformInit = HplCC1000InitP; MotePlatformP.SerialIdPin -> IO.PortA4; SubInit = MotePlatformP.SubInit; } tinyos-2.1.2+dfsg/tos/platforms/mica2/MotePlatformP.nc000066400000000000000000000017411207233610700226460ustar00rootroot00000000000000/* $Id: MotePlatformP.nc,v 1.5 2008-06-26 04:39:08 regehr Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The portion of a mica-family initialisation that is mote-specific. * * @author David Gay */ module MotePlatformP @safe() { provides interface Init as PlatformInit; uses interface GeneralIO as SerialIdPin; uses interface Init as SubInit; } implementation { command error_t PlatformInit.init() { // Pull C I/O port pins low PORTC = 0; DDRC = 0xff; // Prevent sourcing current call SerialIdPin.makeInput(); call SerialIdPin.clr(); return call SubInit.init(); } default command error_t SubInit.init() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/platforms/mica2/NestedResourceC.nc000066400000000000000000000031741207233610700231540ustar00rootroot00000000000000/* $Id: NestedResourceC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Package up two resources as one. Requests and releases are passed on to * both resources. granted is only signaled when both Resources are granted. * * @author David Gay */ generic module NestedResourceC() { provides interface Resource; uses { /** * First Resource to merge. This Resource MUST NOT be wired elsewhere. */ interface Resource as Resource1; /** * Second Resource to merge. This Resource MUST NOT be wired elsewhere. */ interface Resource as Resource2; } } implementation { async command error_t Resource.request() { return call Resource1.request(); } event void Resource1.granted() { call Resource2.request(); } event void Resource2.granted() { signal Resource.granted(); } async command error_t Resource.immediateRequest() { if (call Resource1.immediateRequest() == SUCCESS) { if (call Resource2.immediateRequest() == SUCCESS) return SUCCESS; call Resource1.release(); } return EBUSY; } async command error_t Resource.release() { if(call Resource1.release() == SUCCESS) return call Resource2.release(); return FAIL; } async command bool Resource.isOwner() { return call Resource1.isOwner(); } } tinyos-2.1.2+dfsg/tos/platforms/mica2/TimeSyncMessageC.nc000066400000000000000000000063241207233610700232620ustar00rootroot00000000000000/* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * The Active Message layer on the mica2 platform. This is a naming wrapper * around the CC1000 Active Message layer that implemets timesync interface (TEP 133). * * @author Philip Levis * @author Brano Kusy * @author Marco Langerwisch (Mica2 port) */ configuration TimeSyncMessageC { provides { interface SplitControl; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { components CC1000TimeSyncMessageC as AM; SplitControl = AM; Receive = AM.Receive; Snoop = AM.Snoop; Packet = AM; AMPacket = AM; TimeSyncAMSend32khz = AM; TimeSyncAMSendMilli = AM; TimeSyncPacket32khz = AM; TimeSyncPacketMilli = AM; PacketTimeStamp32khz = AM; PacketTimeStampMilli = AM; } tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/000077500000000000000000000000001207233610700206765ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/at45db/000077500000000000000000000000001207233610700217615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/at45db/HplAt45dbIOC.nc000066400000000000000000000023121207233610700243230ustar00rootroot00000000000000// $Id: HplAt45dbIOC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Low-level access functions for the AT45DB flash on the mica2 and micaz. * * @author David Gay */ configuration HplAt45dbIOC { provides { interface Resource; interface SpiByte as FlashSpi; interface HplAt45dbByte; } } implementation { // Wire up byte I/O to At45db components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, HplAtm128InterruptC, PlatformC; components BusyWaitMicroC; components new NoArbiterC(); Resource = NoArbiterC; FlashSpi = HplAt45dbIOP; HplAt45dbByte = HplAt45dbIOP; PlatformC.SubInit -> HplAt45dbIOP; HplAt45dbIOP.Select -> Pins.PortA3; HplAt45dbIOP.Clk -> Pins.PortD5; HplAt45dbIOP.In -> Pins.PortD2; HplAt45dbIOP.Out -> Pins.PortD3; HplAt45dbIOP.InInterrupt -> HplAtm128InterruptC.Int2; HplAt45dbIOP.BusyWait -> BusyWaitMicroC; } tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/at45db/HplAt45dbIOP.nc000066400000000000000000000112261207233610700243440ustar00rootroot00000000000000// $Id: HplAt45dbIOP.nc,v 1.6 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Low level hardware access to the onboard AT45DB flash chip. *

      * Note: This component includes optimised bit-banging SPI code with the * pins hardwired. Don't copy it to some other platform without * understanding it (see txByte). * * @author Jason Hill * @author David Gay * @author Philip Levis */ #include "Timer.h" module HplAt45dbIOP { provides { interface Init; interface SpiByte as FlashSpi; interface HplAt45dbByte; } uses { interface GeneralIO as Select; interface GeneralIO as Clk; interface GeneralIO as Out; interface GeneralIO as In; interface HplAtm128Interrupt as InInterrupt; interface BusyWait; } } implementation { // We use SPI mode 0 (clock low at select time) command error_t Init.init() { call Select.makeOutput(); call Select.set(); call Clk.clr(); call Clk.makeOutput(); call Out.set(); call Out.makeOutput(); call In.clr(); call In.makeInput(); call InInterrupt.disable(); call InInterrupt.edge(TRUE); return SUCCESS; } command void HplAt45dbByte.select() { call Clk.clr(); // ensure SPI mode 0 call Select.clr(); } command void HplAt45dbByte.deselect() { call Select.set(); } #define BITINIT \ uint8_t clrClkAndData = PORTD & ~0x28 #define BIT(n) \ PORTD = clrClkAndData; \ asm __volatile__ \ ( "sbrc %2," #n "\n" \ "\tsbi 18,3\n" \ "\tsbi 18,5\n" \ "\tsbic 16,2\n" \ "\tori %0,1<<" #n "\n" \ : "=d" (spiIn) : "0" (spiIn), "r" (spiOut)) async command uint8_t FlashSpi.write(uint8_t spiOut) { uint8_t spiIn = 0; // This atomic ensures integrity at the hardware level... atomic { BITINIT; BIT(7); BIT(6); BIT(5); BIT(4); BIT(3); BIT(2); BIT(1); BIT(0); } return spiIn; } task void avail() { signal HplAt45dbByte.idle(); } command void HplAt45dbByte.waitIdle() { // Setup interrupt on rising edge of flash in atomic { call InInterrupt.clear(); call InInterrupt.enable(); call Clk.clr(); // We need to wait at least 2 cycles here (because of the signal // acquisition delay). It's also good to wait a few microseconds // to get the fast ("FAIL") exit from wait (reads are twice as fast // with a 2us delay...) call BusyWait.wait(2); if (call In.get()) signal InInterrupt.fired(); // already high } } async event void InInterrupt.fired() { call InInterrupt.disable(); post avail(); } command bool HplAt45dbByte.getCompareStatus() { call Clk.set(); call Clk.clr(); // Wait for compare value to propagate asm volatile("nop"); asm volatile("nop"); return !call In.get(); } } tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/at45db/HplAt45db_chip.h000066400000000000000000000045011207233610700246240ustar00rootroot00000000000000// $Id: HplAt45db_chip.h,v 1.6 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ #ifndef HPLAT45DB_CHIP_H #define HPLAT45DB_CHIP_H // flash characteristics enum { AT45_MAX_PAGES = 2048, AT45_PAGE_SIZE = 264, AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes }; typedef uint16_t at45page_t; typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */ #endif tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/cc1000/000077500000000000000000000000001207233610700215645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/cc1000/HplCC1000C.nc000066400000000000000000000052101207233610700234410ustar00rootroot00000000000000// $Id: HplCC1000C.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * HPL for the CC1000 radio, for the mica2 platform. * * @author David Gay */ configuration HplCC1000C { provides { interface ReadNow as RssiAdc; interface Resource as RssiResource; interface HplCC1000Spi; interface HplCC1000; } } implementation { components HplCC1000P, HplCC1000SpiP; components new AdcReadNowClientC() as RssiChannel; HplCC1000 = HplCC1000P; HplCC1000Spi = HplCC1000SpiP; RssiAdc = RssiChannel; RssiResource = RssiChannel; RssiChannel.Atm128AdcConfig -> HplCC1000P; // HplCC1000M, HplCC1000SpiM are wired in HplCC1000InitC which is always // included (see MotePlatformC.nc). } tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/cc1000/HplCC1000InitP.nc000066400000000000000000000052151207233610700243070ustar00rootroot00000000000000// $Id: HplCC1000InitP.nc,v 1.6 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Hardware initialisation for the CC1000 radio. This component is always * included even if the radio is not used. * * @author David Gay */ configuration HplCC1000InitP { provides interface Init as PlatformInit; } implementation { components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO; PlatformInit = HplCC1000P; PlatformInit = HplCC1000SpiP; HplCC1000P.CHP_OUT -> IO.PortA6; HplCC1000P.PALE -> IO.PortD4; HplCC1000P.PCLK -> IO.PortD6; HplCC1000P.PDATA -> IO.PortD7; HplCC1000SpiP.SpiSck -> IO.PortB1; HplCC1000SpiP.SpiMiso -> IO.PortB3; HplCC1000SpiP.SpiMosi -> IO.PortB2; HplCC1000SpiP.OC1C -> IO.PortB7; } tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/cc1000/HplCC1000P.nc000066400000000000000000000153721207233610700234700ustar00rootroot00000000000000// $Id: HplCC1000P.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Low level hardware access to the CC1000. * * @author Jaein Jeong * @author Philip Buonadonna */ #include "Atm128Adc.h" #include "CC1000Const.h" module HplCC1000P @safe() { provides { interface Init as PlatformInit; interface HplCC1000; interface Atm128AdcConfig as RssiConfig; } uses { /* These are the CC1000 pin names */ interface GeneralIO as CHP_OUT; interface GeneralIO as PALE; interface GeneralIO as PCLK; interface GeneralIO as PDATA; } } implementation { command error_t PlatformInit.init() { call CHP_OUT.makeInput(); call PALE.makeOutput(); call PCLK.makeOutput(); call PDATA.makeOutput(); call PALE.set(); call PDATA.set(); call PCLK.set(); // MAIN register to power down mode. Shut everything off call HplCC1000.write(CC1K_MAIN, 1 << CC1K_RX_PD | 1 << CC1K_TX_PD | 1 << CC1K_FS_PD | 1 << CC1K_CORE_PD | 1 << CC1K_BIAS_PD | 1 << CC1K_RESET_N); call HplCC1000.write(CC1K_PA_POW, 0); // turn off rf amp return SUCCESS; } command void HplCC1000.init() { } //********************************************************/ // function: write */ // description: accepts a 7 bit address and 8 bit data, */ // creates an array of ones and zeros for each, and */ // uses a loop counting thru the arrays to get */ // consistent timing for the chipcon radio control */ // interface. PALE active low, followed by 7 bits */ // msb first of address, then lsb high for write */ // cycle, followed by 8 bits of data msb first. data */ // is clocked out on the falling edge of PCLK. */ // Input: 7 bit address, 8 bit data */ //********************************************************/ async command void HplCC1000.write(uint8_t addr, uint8_t data) { char cnt = 0; // address cycle starts here addr <<= 1; call PALE.clr(); // enable PALE for (cnt=0;cnt<7;cnt++) // send addr PDATA msb first { if (addr&0x80) call PDATA.set(); else call PDATA.clr(); call PCLK.clr(); // toggle the PCLK call PCLK.set(); addr <<= 1; } call PDATA.set(); call PCLK.clr(); // toggle the PCLK call PCLK.set(); call PALE.set(); // disable PALE // data cycle starts here for (cnt=0;cnt<8;cnt++) // send data PDATA msb first { if (data&0x80) call PDATA.set(); else call PDATA.clr(); call PCLK.clr(); // toggle the PCLK call PCLK.set(); data <<= 1; } call PALE.set(); call PDATA.set(); call PCLK.set(); } //********************************************************/ // function: read */ // description: accepts a 7 bit address, */ // creates an array of ones and zeros for each, and */ // uses a loop counting thru the arrays to get */ // consistent timing for the chipcon radio control */ // interface. PALE active low, followed by 7 bits */ // msb first of address, then lsb low for read */ // cycle, followed by 8 bits of data msb first. data */ // is clocked in on the falling edge of PCLK. */ // Input: 7 bit address */ // Output: 8 bit data */ //********************************************************/ async command uint8_t HplCC1000.read(uint8_t addr) { int cnt; uint8_t din; uint8_t data = 0; // address cycle starts here addr <<= 1; call PALE.clr(); // enable PALE for (cnt=0;cnt<7;cnt++) // send addr PDATA msb first { if (addr&0x80) call PDATA.set(); else call PDATA.clr(); call PCLK.clr(); // toggle the PCLK call PCLK.set(); addr <<= 1; } call PDATA.clr(); call PCLK.clr(); // toggle the PCLK call PCLK.set(); call PDATA.makeInput(); // read data from chipcon call PALE.set(); // disable PALE // data cycle starts here for (cnt=7;cnt>=0;cnt--) // send data PDATA msb first { call PCLK.clr(); // toggle the PCLK din = call PDATA.get(); if(din) data = (data<<1)|0x01; else data = (data<<1)&0xfe; call PCLK.set(); } call PALE.set(); call PDATA.makeOutput(); call PDATA.set(); return data; } async command bool HplCC1000.getLOCK() { return call CHP_OUT.get(); } async command uint8_t RssiConfig.getChannel() { return CHANNEL_RSSI; } async command uint8_t RssiConfig.getRefVoltage() { return ATM128_ADC_VREF_OFF; } async command uint8_t RssiConfig.getPrescaler() { return ATM128_ADC_PRESCALE; } } tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc000066400000000000000000000075601207233610700241440ustar00rootroot00000000000000// $Id: HplCC1000SpiP.nc,v 1.7 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Low-level functions to access the CC1000 bus. Built using the mica2 * hardware SPI. * * @author Jaein Jeong * @author Philip buonadonna */ module HplCC1000SpiP @safe() { provides interface Init as PlatformInit; provides interface HplCC1000Spi; //uses interface PowerManagement; uses { interface GeneralIO as SpiSck; interface GeneralIO as SpiMiso; interface GeneralIO as SpiMosi; interface GeneralIO as OC1C; } } implementation { uint8_t outgoingByte; command error_t PlatformInit.init() { call SpiSck.makeInput(); call OC1C.makeInput(); call HplCC1000Spi.rxMode(); return SUCCESS; } AVR_ATOMIC_HANDLER(SIG_SPI) { register uint8_t temp = SPDR; SPDR = outgoingByte; signal HplCC1000Spi.dataReady(temp); } default async event void HplCC1000Spi.dataReady(uint8_t data) { } async command void HplCC1000Spi.writeByte(uint8_t data) { atomic outgoingByte = data; } async command bool HplCC1000Spi.isBufBusy() { return bit_is_clear(SPSR, SPIF); } async command uint8_t HplCC1000Spi.readByte() { return SPDR; } async command void HplCC1000Spi.enableIntr() { //sbi(SPCR,SPIE); SPCR = 0xc0; CLR_BIT(DDRB, 0); //call PowerManagement.adjustPower(); } async command void HplCC1000Spi.disableIntr() { CLR_BIT(SPCR, SPIE); SET_BIT(DDRB, 0); CLR_BIT(PORTB, 0); //call PowerManagement.adjustPower(); } async command void HplCC1000Spi.initSlave() { atomic { CLR_BIT(SPCR, CPOL); // Set proper polarity... CLR_BIT(SPCR, CPHA); // ...and phase SET_BIT(SPCR, SPIE); // enable spi port SET_BIT(SPCR, SPE); } } async command void HplCC1000Spi.txMode() { call SpiMiso.makeOutput(); call SpiMosi.makeOutput(); } async command void HplCC1000Spi.rxMode() { call SpiMiso.makeInput(); call SpiMosi.makeInput(); } } tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/ds2401/000077500000000000000000000000001207233610700216135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/ds2401/CachedIeeeEui64C.nc000066400000000000000000000040671207233610700250230ustar00rootroot00000000000000// $Id: CachedIeeeEui64C.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * Cache an EUI 64 at initialization time and return the cached value for * subsequent queries. */ configuration CachedIeeeEui64C { uses interface LocalIeeeEui64 as SubIeeeEui64; provides interface LocalIeeeEui64; } implementation { components CachedIeeeEui64P, MotePlatformC; MotePlatformC.SubInit -> CachedIeeeEui64P.Init; SubIeeeEui64 = CachedIeeeEui64P; LocalIeeeEui64 = CachedIeeeEui64P; } tinyos-2.1.2+dfsg/tos/platforms/mica2/chips/ds2401/LocalIeeeEui64C.nc000066400000000000000000000046531207233610700247070ustar00rootroot00000000000000// $Id: LocalIeeeEui64C.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Janos Sallai */ /** * Mica2-specific wiring to access the DS2401 hardware ID chip through the * LocalIeeeEui64 interface. The CachedIeeeEui64C component reads the ID * during hardware initialization, caches it, and returns the cached value at * subsequent calls to LocalIeeeEui64.getId(). */ configuration LocalIeeeEui64C { provides interface LocalIeeeEui64; } implementation { components OneWireMasterC as OneWireC, HplDs2401C, BusyWaitMicroC, HplAtm128GeneralIOC, Ds2401ToIeeeEui64C, CachedIeeeEui64C; OneWireC.Pin -> HplAtm128GeneralIOC.PortA4; OneWireC.BusyWaitMicro -> BusyWaitMicroC.BusyWait; HplDs2401C.OneWire -> OneWireC; Ds2401ToIeeeEui64C.Hpl -> HplDs2401C; CachedIeeeEui64C.SubIeeeEui64 -> Ds2401ToIeeeEui64C; LocalIeeeEui64 = CachedIeeeEui64C; } tinyos-2.1.2+dfsg/tos/platforms/mica2/deluge.xml000066400000000000000000000001201207233610700215500ustar00rootroot00000000000000 tinyos-2.1.2+dfsg/tos/platforms/mica2/hardware.h000066400000000000000000000056521207233610700215460ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2002-2003 Intel Corporation. * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Jason Hill, Philip Levis, Nelson Lee, David Gay * @author Alan Broad * @author Matt Miller * @author Martin Turon * * $Id: hardware.h,v 1.8 2010-06-29 22:07:53 scipio Exp $ */ #ifndef HARDWARE_H #define HARDWARE_H #ifndef MHZ /* Clock rate is ~8MHz except if specified by user (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */ #define MHZ 8 #endif #include #include #include // enum so components can override power saving, // as per TEP 112. enum { TOS_SLEEP_NONE = ATM128_POWER_IDLE, }; // A/D channels enum { CHANNEL_RSSI = ATM128_ADC_SNGL_ADC0, CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1, // normally unpopulated CHANNEL_BATTERY = ATM128_ADC_SNGL_ADC7, }; #ifndef PLATFORM_BAUDRATE enum { PLATFORM_BAUDRATE = 57600L }; #endif #endif //HARDWARE_H tinyos-2.1.2+dfsg/tos/platforms/mica2/platform.h000066400000000000000000000000001207233610700215530ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2/platform_message.h000066400000000000000000000051211207233610700232700ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:53 scipio Exp $ * Copyright (c) 2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Defining the platform-independently named packet structures to be the * chip-specific CC1000 packet structures. * * @author Philip Levis * @date May 16 2005 * Revision: $Revision: 1.6 $ */ #ifndef PLATFORM_MESSAGE_H #define PLATFORM_MESSAGE_H #include "CC1000Msg.h" #include "Serial.h" typedef union message_header { cc1000_header_t cc1k; serial_header_t serial; } message_header_t; typedef union message_footer { cc1000_footer_t cc1k; } message_footer_t; typedef union message_metadata { cc1000_metadata_t cc1k; serial_metadata_t serial; } message_metadata_t; #endif tinyos-2.1.2+dfsg/tos/platforms/mica2dot/000077500000000000000000000000001207233610700202775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2dot/.platform000066400000000000000000000031331207233610700221240ustar00rootroot00000000000000# # FILE: micaz/.platform # # Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. # # $Id: .platform,v 1.8 2008-06-24 19:03:34 beutel Exp $ # push( @includes, qw( %T/platforms/mica2dot %T/platforms/mica2 %T/platforms/mica %T/platforms/mica2dot/chips/cc1000 %T/platforms/mica2/chips/cc1000 %T/chips/cc1000 %T/platforms/mica2dot/chips/at45db %T/platforms/mica2/chips/at45db %T/platforms/mica/chips/at45db %T/chips/at45db %T/chips/atm128 %T/chips/atm128/adc %T/chips/atm128/pins %T/chips/atm128/spi %T/chips/atm128/timer %T/lib/timer %T/lib/serial %T/lib/power ) ); @opts = qw( -gcc=avr-gcc -mmcu=atmega128 -fnesc-target=avr -fnesc-no-debug ); push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; push @opts, "-mingw-gcc" if $cygwin; $ENV{'CIL_MACHINE'} = "version_major=3 " . "version_minor=4 " . "version=avr-3.4.3 " . "short=2,1, " . "int=2,1 " . "long=4,1 " . "long_long=8,1 " . "pointer=2,1 " . "enum=2,1 " . "float=4,1 " . "double=4,1 " . "long_double=4,1 " . "void=1,1 " . "fun=1,1 " . "wchar_size_size=2,2 " . "alignof_string=1 " . "max_alignment=1 " . "char_wchar_signed=true,true " . "const_string_literals=true " . "big_endian=false " . "underscore_name=false " . "__builtin_va_list=true " . "__thread_is_keyword=true"; tinyos-2.1.2+dfsg/tos/platforms/mica2dot/DemoSensorC.nc000066400000000000000000000011701207233610700230010ustar00rootroot00000000000000/* $Id: DemoSensorC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Demo sensor for the mica2 platform. * * @author David Gay */ generic configuration DemoSensorC() { provides interface Read; } implementation { components new TempC() as Sensor; Read = Sensor; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/DemoSensorNowC.nc000066400000000000000000000012731207233610700234710ustar00rootroot00000000000000/* $Id: DemoSensorNowC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Demo sensor for the mica2 platform. * * @author David Gay */ generic configuration DemoSensorNowC() { provides interface Resource; provides interface ReadNow; } implementation { components new TempNowC() as Sensor; Resource = Sensor; ReadNow = Sensor; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/DemoSensorStreamC.nc000066400000000000000000000012421207233610700241550ustar00rootroot00000000000000/* $Id: DemoSensorStreamC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Demo sensor for the mica2 platform. * * @author David Gay */ generic configuration DemoSensorStreamC() { provides interface ReadStream; } implementation { components new TempStreamC() as SensorStream; ReadStream = SensorStream; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/MotePlatformC.nc000066400000000000000000000015211207233610700233340ustar00rootroot00000000000000/* $Id: MotePlatformC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * The portion of a mica-family initialisation that is mote-specific. * For the mica2dot, we leave everything as inputs except as explicitly * configured otherwise by other components. * * @author David Gay */ configuration MotePlatformC { provides interface Init as PlatformInit; uses interface Init as SubInit; } implementation { components HplCC1000InitP; PlatformInit = HplCC1000InitP; SubInit = PlatformInit; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/PlatformLedsC.nc000066400000000000000000000042011207233610700233150ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Platform-specific LED interface. * * @author Martin Turon , David Gay */ #include "hardware.h" configuration PlatformLedsC { provides interface GeneralIO as Led0; provides interface GeneralIO as Led1; provides interface GeneralIO as Led2; uses interface Init; } implementation { components HplAtm128GeneralIOC as IO; components new NoPinC(); components PlatformP; Init = PlatformP.MoteInit; Led0 = IO.PortA2; // Pin A2 = Red LED Led1 = NoPinC; Led2 = NoPinC; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/TempC.nc000066400000000000000000000013451207233610700216340ustar00rootroot00000000000000/* $Id: TempC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Temp sensor. * * @author David Gay */ #include "hardware.h" generic configuration TempC() { provides interface Read; } implementation { components new AdcReadClientC(), TempDeviceP; Read = AdcReadClientC; AdcReadClientC.Atm128AdcConfig -> TempDeviceP; AdcReadClientC.ResourceConfigure -> TempDeviceP; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/TempDeviceP.nc000066400000000000000000000016141207233610700227700ustar00rootroot00000000000000/* $Id: TempDeviceP.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Internal component for temp sensor. Arbitrates access to the temp * sensor and automatically turns it on or off based on user requests. * * @author David Gay */ #include "hardware.h" configuration TempDeviceP { provides { interface Atm128AdcConfig; interface ResourceConfigure; } } implementation { components TempP, HplAtm128GeneralIOC as Pins; Atm128AdcConfig = TempP; ResourceConfigure = TempP; TempP.BatMon -> Pins.PortC6; TempP.BatMonRef -> Pins.PortC7; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/TempNowC.nc000066400000000000000000000014741207233610700223230ustar00rootroot00000000000000/* $Id: TempNowC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Temp sensor. * * @author David Gay */ #include "hardware.h" generic configuration TempNowC() { provides interface Resource; provides interface ReadNow; } implementation { components new AdcReadNowClientC(), TempDeviceP; ReadNow = AdcReadNowClientC; Resource = AdcReadNowClientC; AdcReadNowClientC.Atm128AdcConfig -> TempDeviceP; AdcReadNowClientC.ResourceConfigure -> TempDeviceP; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/TempP.nc000066400000000000000000000047671207233610700216640ustar00rootroot00000000000000/// $Id: TempP.nc,v 1.5 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2004-2005 Crossbow Technology, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of Crossbow Technology nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Internal component for temp sensor reading. * * @author Hu Siquan * @author David Gay */ module TempP { provides { interface ResourceConfigure; interface Atm128AdcConfig as TempConfig; } uses { interface GeneralIO as BatMon; interface GeneralIO as BatMonRef; } } implementation { async command uint8_t TempConfig.getChannel() { return CHANNEL_BATTERY_THERMISTOR; } async command uint8_t TempConfig.getRefVoltage() { return ATM128_ADC_VREF_OFF; } async command uint8_t TempConfig.getPrescaler() { return ATM128_ADC_PRESCALE; } async command void ResourceConfigure.configure() { call BatMonRef.makeOutput(); call BatMonRef.set(); call BatMon.makeOutput(); call BatMon.clr(); } async command void ResourceConfigure.unconfigure() { call BatMon.makeInput(); call BatMonRef.makeInput(); } } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/TempStreamC.nc000066400000000000000000000014251207233610700230070ustar00rootroot00000000000000/* $Id: TempStreamC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Temp sensor. * * @author David Gay */ #include "hardware.h" generic configuration TempStreamC() { provides interface ReadStream; } implementation { components TempDeviceP, new AdcReadStreamClientC(); ReadStream = AdcReadStreamClientC; AdcReadStreamClientC.Atm128AdcConfig -> TempDeviceP; AdcReadStreamClientC.ResourceConfigure -> TempDeviceP; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/chips/000077500000000000000000000000001207233610700214055ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2dot/chips/at45db/000077500000000000000000000000001207233610700224705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOC.nc000066400000000000000000000020651207233610700250370ustar00rootroot00000000000000// $Id: HplAt45dbIOC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Low-level access functions for the AT45DB flash on the mica2 and micaz. * * @author David Gay */ configuration HplAt45dbIOC { provides { interface Resource; interface SpiByte as FlashSpi; interface HplAt45dbByte; } } implementation { // Wire up byte I/O to At45db components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, PlatformC; components new NoArbiterC(); Resource = NoArbiterC; FlashSpi = HplAt45dbIOP; HplAt45dbByte = HplAt45dbIOP; PlatformC.SubInit -> HplAt45dbIOP; HplAt45dbIOP.Select -> Pins.PortE5; HplAt45dbIOP.Clk -> Pins.PortA3; HplAt45dbIOP.In -> Pins.PortA6; HplAt45dbIOP.Out -> Pins.PortA7; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOP.nc000066400000000000000000000100531207233610700250500ustar00rootroot00000000000000// $Id: HplAt45dbIOP.nc,v 1.6 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Low level hardware access to the onboard AT45DB flash chip. *

      * Note: This component includes optimised bit-banging SPI code with the * pins hardwired. Don't copy it to some other platform without * understanding it (see txByte). * * @author Jason Hill * @author David Gay * @author Philip Levis */ #include "Timer.h" module HplAt45dbIOP { provides { interface Init; interface SpiByte as FlashSpi; interface HplAt45dbByte; } uses { interface GeneralIO as Select; interface GeneralIO as Clk; interface GeneralIO as Out; interface GeneralIO as In; } } implementation { // We use SPI mode 0 (clock low at select time) command error_t Init.init() { call Select.makeOutput(); call Select.set(); call Clk.clr(); call Clk.makeOutput(); call Out.set(); call Out.makeOutput(); call In.clr(); call In.makeInput(); return SUCCESS; } command void HplAt45dbByte.select() { call Clk.clr(); // ensure SPI mode 0 call Select.clr(); } command void HplAt45dbByte.deselect() { call Select.set(); } #define BITINIT \ uint8_t clrClkAndData = PORTA & ~0x88 #define BIT(n) \ PORTA = clrClkAndData; \ asm __volatile__ \ ( "sbrc %2," #n "\n" \ "\tsbi 27,7\n" \ "\tsbi 27,3\n" \ "\tsbic 25,6\n" \ "\tori %0,1<<" #n "\n" \ : "=d" (spiIn) : "0" (spiIn), "r" (spiOut)) async command uint8_t FlashSpi.write(uint8_t spiOut) { uint8_t spiIn = 0; // This atomic ensures integrity at the hardware level... atomic { BITINIT; BIT(7); BIT(6); BIT(5); BIT(4); BIT(3); BIT(2); BIT(1); BIT(0); } return spiIn; } task void idleWait() { if (call In.get()) signal HplAt45dbByte.idle(); else post idleWait(); } command void HplAt45dbByte.waitIdle() { call Clk.clr(); post idleWait(); } command bool HplAt45dbByte.getCompareStatus() { call Clk.set(); call Clk.clr(); // Wait for compare value to propagate asm volatile("nop"); asm volatile("nop"); return !call In.get(); } } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/chips/cc1000/000077500000000000000000000000001207233610700222735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc000066400000000000000000000052151207233610700250160ustar00rootroot00000000000000// $Id: HplCC1000InitP.nc,v 1.6 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * Hardware initialisation for the CC1000 radio. This component is always * included even if the radio is not used. * * @author David Gay */ configuration HplCC1000InitP { provides interface Init as PlatformInit; } implementation { components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO; PlatformInit = HplCC1000P; PlatformInit = HplCC1000SpiP; HplCC1000P.CHP_OUT -> IO.PortE7; HplCC1000P.PALE -> IO.PortD5; HplCC1000P.PCLK -> IO.PortD6; HplCC1000P.PDATA -> IO.PortD7; HplCC1000SpiP.SpiSck -> IO.PortB1; HplCC1000SpiP.SpiMiso -> IO.PortB3; HplCC1000SpiP.SpiMosi -> IO.PortB2; HplCC1000SpiP.OC1C -> IO.PortB7; } tinyos-2.1.2+dfsg/tos/platforms/mica2dot/hardware.h000066400000000000000000000055071207233610700222540ustar00rootroot00000000000000/* * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Copyright (c) 2004-2005 Crossbow Technology, Inc. * Copyright (c) 2002-2003 Intel Corporation. * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * @author Jason Hill, Philip Levis, Nelson Lee, David Gay * @author Alan Broad * @author Matt Miller * @author Martin Turon * * $Id: hardware.h,v 1.8 2010-06-29 22:07:54 scipio Exp $ */ #ifndef HARDWARE_H #define HARDWARE_H #ifndef MHZ /* Clock rate is 4MHz except if specified by user (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */ #define MHZ 4 #endif #include #include #include // enum so components can override power saving, // as per TEP 112. enum { TOS_SLEEP_NONE = ATM128_POWER_IDLE, }; // A/D channels enum { CHANNEL_RSSI = ATM128_ADC_SNGL_ADC0, CHANNEL_BATTERY_THERMISTOR = ATM128_ADC_SNGL_ADC1 }; enum { PLATFORM_BAUDRATE = 19200L }; #endif //HARDWARE_H tinyos-2.1.2+dfsg/tos/platforms/mica2dot/platform.h000066400000000000000000000000001207233610700222620ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/000077500000000000000000000000001207233610700177005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/.platform000066400000000000000000000035611207233610700215320ustar00rootroot00000000000000# # FILE: micaz/.platform # # Includes that should take precedence come first. Platforms come before # chips because they may override files. These must be specified as # @includes instead of -I's to @opts, otherwise the %T won't be processed # by ncc. # # $Id: .platform,v 1.8 2009-08-14 20:33:43 jgko Exp $ # push( @includes, qw( %T/platforms/mica %T/platforms/micaz/chips/cc2420 %T/chips/cc2420 %T/chips/cc2420/alarm %T/chips/cc2420/control %T/chips/cc2420/csma %T/chips/cc2420/interfaces %T/chips/cc2420/link %T/chips/cc2420/lowpan %T/chips/cc2420/lpl %T/chips/cc2420/packet %T/chips/cc2420/receive %T/chips/cc2420/spi %T/chips/cc2420/transmit %T/chips/cc2420/unique %T/chips/cc2420/security %T/platforms/micaz/chips/at45db %T/platforms/mica2/chips/at45db %T/platforms/mica/chips/at45db %T/chips/at45db %T/chips/atm128 %T/chips/atm128/adc %T/chips/atm128/pins %T/chips/atm128/spi %T/chips/atm128/i2c %T/chips/atm128/timer %T/lib/timer %T/lib/serial %T/lib/power %T/lib/diagmsg ) ); @opts = qw( -gcc=avr-gcc -mmcu=atmega128 -fnesc-target=avr -fnesc-no-debug ); push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag; push @opts, "-mingw-gcc" if $cygwin; $ENV{'CIL_MACHINE'} = "version_major=3 " . "version_minor=4 " . "version=avr-3.4.3 " . "short=2,1, " . "int=2,1 " . "long=4,1 " . "long_long=8,1 " . "pointer=2,1 " . "enum=2,1 " . "float=4,1 " . "double=4,1 " . "long_double=4,1 " . "void=1,1 " . "fun=1,1 " . "wchar_size_size=2,2 " . "alignof_string=1 " . "max_alignment=1 " . "char_wchar_signed=true,true " . "const_string_literals=true " . "big_endian=false " . "underscore_name=false " . "__builtin_va_list=true " . "__thread_is_keyword=true"; tinyos-2.1.2+dfsg/tos/platforms/micaz/ActiveMessageC.nc000066400000000000000000000060071207233610700230500ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.9 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * * Authors: Philip Levis * Date last modified: $Id: ActiveMessageC.nc,v 1.9 2010-06-29 22:07:54 scipio Exp $ * */ /** * * The Active Message layer on the Telos platform. This is a naming wrapper * around the CC2420 Active Message layer. * * @author Philip Levis * @version $Revision: 1.9 $ $Date: 2010-06-29 22:07:54 $ */ #include "Timer.h" configuration ActiveMessageC { provides { interface SplitControl; interface AMSend[am_id_t id]; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface LowPowerListening; } } implementation { #ifdef RFXLINK components CC2420XActiveMessageC as AM; #else components CC2420ActiveMessageC as AM; #endif SplitControl = AM; AMSend = AM; Receive = AM.Receive; Snoop = AM.Snoop; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; LowPowerListening = AM; #ifdef RFXLINK PacketTimeStamp32khz = AM; PacketTimeStampMilli = AM; #else components CC2420PacketC; PacketTimeStamp32khz = CC2420PacketC; PacketTimeStampMilli = CC2420PacketC; #endif } tinyos-2.1.2+dfsg/tos/platforms/micaz/BusyWaitMicroC.nc000066400000000000000000000041251207233610700230700ustar00rootroot00000000000000/* * Copyright (c) 2000-2003 The Regents of the University of California. * Copyright (c) 2002-2006 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ module BusyWaitMicroC { provides interface BusyWait; } implementation { inline async command void BusyWait.wait(uint16_t dt) { /* In most cases (constant arg), the test is elided at compile-time */ if (dt) /* loop takes 8 cycles. this is 1uS if running on an internal 8MHz clock, and 1.09uS if running on the external crystal. */ asm volatile ( "1: sbiw %0,1\n" " adiw %0,1\n" " sbiw %0,1\n" " brne 1b" : "+w" (dt)); } } tinyos-2.1.2+dfsg/tos/platforms/micaz/DemoSensorC.nc000066400000000000000000000037511207233610700224110ustar00rootroot00000000000000/* $Id: DemoSensorC.nc,v 1.5 2007-05-22 20:59:01 idgay Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The micaZ doesn't have any built-in sensors - the DemoSensor returns * a constant value of 0xbeef, or just reads the ground value for the * stream sensor. * * @author Philip Levis * @authod David Gay */ generic configuration DemoSensorC() { provides interface Read; } implementation { components new VoltageC() as DemoChannel; Read = DemoChannel; } tinyos-2.1.2+dfsg/tos/platforms/micaz/DemoSensorNowC.nc000066400000000000000000000037131207233610700230730ustar00rootroot00000000000000/* $Id: DemoSensorNowC.nc,v 1.5 2007-05-22 20:59:01 idgay Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * The micaZ doesn't have any built-in sensors - this DemoSensor just reads * the ground value. * * @author David Gay */ generic configuration DemoSensorNowC() { provides interface Resource; provides interface ReadNow; } implementation { components new VoltageNowC() as Sensor; Resource = Sensor; ReadNow = Sensor; } tinyos-2.1.2+dfsg/tos/platforms/micaz/DemoSensorStreamC.nc000066400000000000000000000040001207233610700235510ustar00rootroot00000000000000/* $Id: DemoSensorStreamC.nc,v 1.5 2007-05-22 20:59:01 idgay Exp $ * Copyright (c) 2006 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * The micaZ doesn't have any built-in sensors - the DemoSensor returns * a constant value of 0xbeef, or just reads the ground value for the * stream sensor. * * @author Philip Levis * @authod David Gay */ generic configuration DemoSensorStreamC() { provides interface ReadStream; } implementation { components new VoltageStreamC() as Sensor; ReadStream = Sensor; } tinyos-2.1.2+dfsg/tos/platforms/micaz/Ieee154MessageC.nc000066400000000000000000000044731207233610700227430ustar00rootroot00000000000000/* * Copyright (c) 2008 The Regents of the University of California. * All rights reserved." * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * * @author Stephen Dawson-Haggerty */ configuration Ieee154MessageC { provides { interface SplitControl; interface Resource as SendResource[uint8_t clientId]; interface Ieee154Send; interface Receive as Ieee154Receive; interface Ieee154Packet; interface Packet; interface PacketAcknowledgements; interface LinkPacketMetadata; interface LowPowerListening; interface PacketLink; } } implementation { components CC2420Ieee154MessageC as Msg; SplitControl = Msg; SendResource = Msg; Ieee154Send = Msg; Ieee154Receive = Msg; Ieee154Packet = Msg; Packet = Msg; PacketAcknowledgements = Msg; LinkPacketMetadata = Msg; LowPowerListening = Msg; PacketLink = Msg; } tinyos-2.1.2+dfsg/tos/platforms/micaz/LocalIeeeEui64C.nc000066400000000000000000000044761207233610700227770ustar00rootroot00000000000000// $Id: LocalIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE.* All rights reserved. * * Stephen Dawson-Haggerty * Dummy Extended Address for micaz */ #include "IeeeEui64.h" module LocalIeeeEui64C { provides interface LocalIeeeEui64; } implementation { command ieee_eui64_t LocalIeeeEui64.getId() { ieee_eui64_t id; /* this is UCB's OUI */ id.data[0] = 0x00; id.data[1] = 0x12; id.data[2] = 0x6d; /* UCB will let anyone use this OUI so long as these two octets are 'LO' -- "local". All other octets are reserved. */ /* SDH -- 9/10/2010 */ id.data[3] = 'L'; id.data[4] = 'O'; id.data[5] = 0; id.data[6] = TOS_NODE_ID >> 8; id.data[7] = TOS_NODE_ID & 0xff; return id; } } tinyos-2.1.2+dfsg/tos/platforms/micaz/MotePlatformC.nc000066400000000000000000000040161207233610700227370ustar00rootroot00000000000000/* $Id: MotePlatformC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * The porttion of a mica-family initialisation that is mote-specific. * * @author David Gay */ configuration MotePlatformC { provides interface Init as PlatformInit; uses interface Init as SubInit; } implementation { components MotePlatformP, HplAtm128GeneralIOC; PlatformInit = MotePlatformP; MotePlatformP.SerialIdPin -> HplAtm128GeneralIOC.PortA4; SubInit = MotePlatformP.SubInit; } tinyos-2.1.2+dfsg/tos/platforms/micaz/MotePlatformP.nc000066400000000000000000000043031207233610700227530ustar00rootroot00000000000000/* $Id: MotePlatformP.nc,v 1.5 2008-06-26 03:38:27 regehr Exp $ * Copyright (c) 2005 Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * The micaZ portion of a mica-family initialisation that is * mote-specific. * * @author David Gay */ module MotePlatformP @safe() { provides interface Init as PlatformInit; uses interface GeneralIO as SerialIdPin; uses interface Init as SubInit; } implementation { command error_t PlatformInit.init() { // Pull C I/O port pins low PORTC = 0; DDRC = 0xff; // Prevent sourcing current call SerialIdPin.makeInput(); call SerialIdPin.clr(); return call SubInit.init(); } default command error_t SubInit.init() { return SUCCESS; } } tinyos-2.1.2+dfsg/tos/platforms/micaz/TimeSyncMessageC.nc000066400000000000000000000067641207233610700234020ustar00rootroot00000000000000// $Id: TimeSyncMessageC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $ /* * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2004-2005 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * * The Active Message layer on the micaz platform. This is a naming wrapper * around the CC2420 Active Message layer that implemets timesync interface (TEP 133). * * @author Philip Levis * @author Brano Kusy * @date June 19 2005 */ configuration TimeSyncMessageC { provides { interface SplitControl; interface Receive[am_id_t id]; interface Receive as Snoop[am_id_t id]; interface Packet; interface AMPacket; interface PacketAcknowledgements; interface LowPowerListening; interface PacketTimeStamp as PacketTimeStamp32khz; interface PacketTimeStamp as PacketTimeStampMilli; interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id]; interface TimeSyncPacket as TimeSyncPacket32khz; interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id]; interface TimeSyncPacket as TimeSyncPacketMilli; } } implementation { #ifdef RFXLINK components CC2420XTimeSyncMessageC as AM; #else components CC2420TimeSyncMessageC as AM; #endif SplitControl = AM; Receive = AM.Receive; Snoop = AM.Snoop; Packet = AM; AMPacket = AM; PacketAcknowledgements = AM; LowPowerListening = AM; TimeSyncAMSend32khz = AM; TimeSyncAMSendMilli = AM; TimeSyncPacket32khz = AM; TimeSyncPacketMilli = AM; components CC2420PacketC; PacketTimeStamp32khz = CC2420PacketC; PacketTimeStampMilli = CC2420PacketC; }tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/000077500000000000000000000000001207233610700210065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/at45db/000077500000000000000000000000001207233610700220715ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/at45db/HplAt45dbIOC.nc000066400000000000000000000053521207233610700244420ustar00rootroot00000000000000// $Id: HplAt45dbIOC.nc,v 1.2 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2005-2006 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Low-level access functions for the AT45DB flash on the mica2 and micaz. * * @author David Gay * @author Janos Sallai */ configuration HplAt45dbIOC { provides { interface Resource; interface SpiByte as FlashSpi; interface HplAt45dbByte; } } implementation { // Wire up byte I/O to At45db components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, PlatformC; components BusyWaitMicroC; components new NoArbiterC(); Resource = NoArbiterC; FlashSpi = HplAt45dbIOP; HplAt45dbByte = HplAt45dbIOP; PlatformC.SubInit -> HplAt45dbIOP; HplAt45dbIOP.Select -> Pins.PortA3; HplAt45dbIOP.Clk -> Pins.PortD5; HplAt45dbIOP.In -> Pins.PortD2; HplAt45dbIOP.Out -> Pins.PortD3; HplAt45dbIOP.BusyWait -> BusyWaitMicroC; } tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/at45db/HplAt45dbIOP.nc000066400000000000000000000137171207233610700244630ustar00rootroot00000000000000// $Id: HplAt45dbIOP.nc,v 1.3 2010-06-29 22:07:53 scipio Exp $ /* * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /* * Copyright (c) 2007, Vanderbilt University * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holders nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * Low level hardware access to the onboard AT45DB flash chip. *

      * Note: This component includes optimised bit-banging SPI code with the * pins hardwired. Don't copy it to some other platform without * understanding it (see txByte). * * @author Jason Hill * @author David Gay * @author Philip Levis * @author Janos Sallai */ #include "Timer.h" module HplAt45dbIOP { provides { interface Init; interface SpiByte as FlashSpi; interface HplAt45dbByte; } uses { interface GeneralIO as Select; interface GeneralIO as Clk; interface GeneralIO as Out; interface GeneralIO as In; interface BusyWait; } } implementation { // We use SPI mode 0 (clock low at select time) command error_t Init.init() { call Select.makeOutput(); call Select.set(); call Clk.clr(); call Clk.makeOutput(); call Out.set(); call Out.makeOutput(); call In.clr(); call In.makeInput(); return SUCCESS; } command void HplAt45dbByte.select() { call Clk.clr(); // ensure SPI mode 0 call Select.clr(); } command void HplAt45dbByte.deselect() { call Select.set(); } #define BITINIT \ uint8_t clrClkAndData = PORTD & ~0x28 #define BIT(n) \ PORTD = clrClkAndData; \ asm __volatile__ \ ( "sbrc %2," #n "\n" \ "\tsbi 18,3\n" \ "\tsbi 18,5\n" \ "\tsbic 16,2\n" \ "\tori %0,1<<" #n "\n" \ : "=d" (spiIn) : "0" (spiIn), "r" (spiOut)) async command uint8_t FlashSpi.write(uint8_t spiOut) { uint8_t spiIn = 0; // This atomic ensures integrity at the hardware level... atomic { BITINIT; BIT(7); BIT(6); BIT(5); BIT(4); BIT(3); BIT(2); BIT(1); BIT(0); } return spiIn; } task void avail() { signal HplAt45dbByte.idle(); } command void HplAt45dbByte.waitIdle() { // at45db041 rev d fix by handsomezhu hongsong at ios.cn // http://mail.millennium.berkeley.edu/pipermail/tinyos-help/2008-January/030255.html int i; call Clk.clr(); call BusyWait.wait(2); while( ! call In.get() ) { for( i=0; i < 8; i ++ ) { call Clk.set(); call Clk.clr(); call BusyWait.wait(2); } } post avail(); } command bool HplAt45dbByte.getCompareStatus() { call Clk.set(); call Clk.clr(); // Wait for compare value to propagate asm volatile("nop"); asm volatile("nop"); return !call In.get(); } } tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/000077500000000000000000000000001207233610700217035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/HplCC2420AlarmC.nc000066400000000000000000000103631207233610700245510ustar00rootroot00000000000000/* * Copyright (c) 2005 Stanford University. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the copyright holder nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2000-2003 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the University of California nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * * Copyright (c) 2002-2003 Intel Corporation * All rights reserved. * * This file is distributed under the terms in the attached INTEL-LICENSE * file. If you do not find these files, copies can be found by writing to * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, * 94704. Attention: Intel License Inquiry. */ /** * A platform independent abstraction of an asynchronous 32KHz, 16-bit * timer for the CC2420. As these timers (the Alarm interface) are * usually part of an HAL, they are platform specific. But as the * CC2420 needs to be cross-platform, this component bridges between * the two, providing a platform-independent abstraction of * CC2420-specific Alarm. This is a Atmega128 implementation that * uses the Compare1A register. * * @author Philip Levis * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:54 $ */ #include "Atm128Timer.h" generic configuration HplCC2420AlarmC() { provides interface Alarm; provides interface Init; } implementation { components new Alarm32khz32C(), NoInitC; Init = NoInitC; Alarm = Alarm32khz32C; } tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsC.nc000066400000000000000000000046311207233610700256750ustar00rootroot00000000000000/* * Copyright (c) 2005 Arch Rock Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Arch Rock Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * @author Jonathan Hui * @version $Revision: 1.5 $ $Date: 2007-04-30 17:31:08 $ */ configuration HplCC2420InterruptsC { provides interface GpioCapture as CaptureSFD; provides interface GpioInterrupt as InterruptCCA; provides interface GpioInterrupt as InterruptFIFOP; } implementation { components new Atm128GpioCaptureC() as CaptureSFDC; components HplAtm128Timer1C as Timer1C; CaptureSFD = CaptureSFDC; CaptureSFDC.Atm128Capture -> Timer1C.Capture; components new Atm128GpioInterruptC() as InterruptFIFOPC; components HplAtm128InterruptC as Interrupts; InterruptFIFOP = InterruptFIFOPC; InterruptFIFOPC.Atm128Interrupt -> Interrupts.Int6; components HplCC2420InterruptsP; components HplCC2420PinsC; InterruptCCA = HplCC2420InterruptsP.CCA; HplCC2420InterruptsP.CC_CCA -> HplCC2420PinsC.CCA; } tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsP.nc000066400000000000000000000070771207233610700257210ustar00rootroot00000000000000/* * Copyright (c) 2005-2006 Rincon Research Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * - Neither the name of the Rincon Research Corporation nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE */ /** * MicaZ implementation of the CC2420 interrupts. FIFOP is a real * interrupt, while CCA and FIFO are emulated through timer polling. * 

       *  $Id: HplCC2420InterruptsP.nc,v 1.6 2008-06-26 04:39:12 regehr Exp $
 * 
       *
 * @author Philip Levis
 * @author Matt Miller
 * @author David Moss
 * @version @version $Revision: 1.6 $ $Date: 2008-06-26 04:39:12 $
 */

module HplCC2420InterruptsP @safe() {
  provides {
    interface GpioInterrupt as CCA;
  }
  
  uses {
    interface GeneralIO as CC_CCA;
  }
}
implementation {

  norace uint8_t ccaWaitForState;
  
  norace uint8_t ccaLastState;
  
  bool ccaCheckDisabled = FALSE;

  // ************* CCA Interrupt handlers and dispatch *************
  
  /**
   * enable an edge interrupt on the CCA pin
   * NOT an interrupt in MICAz. Implement as a task polled pin monitor
   */

  task void CCATask() {
    uint8_t CCAState;
    atomic {
      if (ccaCheckDisabled) {
        return;
      }
    }
    
    //check CCA state
    CCAState = call CC_CCA.get(); //get current state here if waiting for edge
    if ((ccaLastState != ccaWaitForState) && (CCAState == ccaWaitForState)) {
      signal CCA.fired();
    }
    
    //if CCA Pin is correct and edge found
    //repost task and try again
    ccaLastState = CCAState;
    post CCATask();
  }
  
  async command error_t CCA.enableRisingEdge() { 
    atomic ccaWaitForState = TRUE; //save the state we are waiting for
    atomic ccaCheckDisabled = FALSE;
    ccaLastState = call CC_CCA.get(); //get current state
    post CCATask();
    return SUCCESS;
  }

  async command error_t CCA.enableFallingEdge() { 
    atomic ccaWaitForState = FALSE; //save the state we are waiting for
    atomic ccaCheckDisabled = FALSE;
    ccaLastState = call CC_CCA.get(); //get current state
    post CCATask();
    return SUCCESS;
  }
  
  async command error_t CCA.disable() {
    atomic ccaCheckDisabled = TRUE;
    return SUCCESS;
  }


  /***************** Defaults ****************/
  default async event void CCA.fired() {
  }

}

tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/HplCC2420PinsC.nc000066400000000000000000000105021207233610700244210ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * Mapping the CC2420 pins to Atmega128 pins for the micaZ platform.
 * Information on the function of these pins can be found on pages
 * 14-15 of the CC2420 datasheet (rev 1.2).
 *
 * 
       * $Id: HplCC2420PinsC.nc,v 1.6 2010-06-29 22:07:54 scipio Exp $
 * 
      
 *
 * @author Philip Levis
 * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:54 $
 */

configuration HplCC2420PinsC {
  provides {
    interface GeneralIO as CCA;
    interface GeneralIO as CSN;
    interface GeneralIO as FIFO;
    interface GeneralIO as FIFOP;
    interface GeneralIO as RSTN;
    interface GeneralIO as SFD;
    interface GeneralIO as VREN;
  }
}

implementation {

  components HplAtm128GeneralIOC as IO;
  
  CCA    = IO.PortD6;
  CSN    = IO.PortB0;
  FIFO   = IO.PortB7;
  FIFOP  = IO.PortE6;
  RSTN   = IO.PortA6;
  SFD    = IO.PortD4;
  VREN   = IO.PortA5;

}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/HplCC2420SpiC.nc000066400000000000000000000042231207233610700242460ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Jonathan Hui 
 * @version $Revision: 1.5 $ $Date: 2008-04-24 22:31:25 $
 */

generic configuration HplCC2420SpiC() {

  provides interface Init;
  provides interface Resource;

  provides interface SpiByte;
  provides interface SpiPacket;

}

implementation {

  components Atm128SpiC, HplCC2420SpiP, HplAtm128GeneralIOC as IO;

  Init = Atm128SpiC;
  Resource = HplCC2420SpiP;
  HplCC2420SpiP.SubResource -> Atm128SpiC.Resource[ unique("Atm128SpiC.Resource") ];
  HplCC2420SpiP.SS -> IO.PortB0;  // Slave set line
  SpiByte = Atm128SpiC;
  SpiPacket = Atm128SpiC;

}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/HplCC2420SpiP.nc000066400000000000000000000047211207233610700242660ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Automatic slave select update for the SpiResource
 *
 * @author Miklos Maroti
 */

module HplCC2420SpiP @safe()
{
	provides interface Resource;
  
	uses
	{
		interface Resource as SubResource;	// raw SPI resource
		interface GeneralIO as SS;			// Slave set line
	}
}

implementation
{
	async command error_t Resource.request()
	{
		return call SubResource.request();
	}

	async command error_t Resource.immediateRequest()
	{
		error_t error = call SubResource.immediateRequest();
		if( error == SUCCESS )
		{
			call SS.makeOutput();
			call SS.clr();
		}
		return error;
	}

	event void SubResource.granted()
	{
		call SS.makeOutput();
		call SS.clr();

		signal Resource.granted();
	}
	
	async command error_t Resource.release()
	{
		if( call SubResource.isOwner() )
			call SS.set();

		return call SubResource.release();
	}

	async command bool Resource.isOwner()
	{
		return call SubResource.isOwner();
	}
}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/sim/000077500000000000000000000000001207233610700224735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/sim/SimAtm128SpiDeviceC.nc000066400000000000000000000052261207233610700263460ustar00rootroot00000000000000/*                                                                      
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * Configuration representing the SPI device of the CC2420 for the micaZ
 * platform. The basic mapping is this:
 *  
        
 *   
      • the platform independent chips/CC2420 maps to HplCC2420SpiC;
        • 
 *   
      • HplCC2420SpiC on the micaZ maps to Atm128SpiC;
        • 
 *   
      • under TOSSIM Atm128SpiC maps to SimAtm128SpiDeviceC;
        • 
 *   
      • SimAtm128SpiDeviceC maps to the actual simulation implementation in micaz/chips/cc2420/sim
        • 
 *  
      
 *
 * @author Philip Levis
 * @date   November 22 2005
 */

configuration SimAtm128SpiDeviceC {

  provides interface Init;
  provides interface Resource[uint8_t];
  provides interface SPIByte;
  provides interface SPIPacket;

  uses interface Resource as SubResource[uint8_t];
  uses interface ArbiterInfo;
  uses interface McuPowerState;
  
}

implementation {

  components SimCC2420C;

  Init = SimCC2420C;
  Resource = SimCC2420C.SpiResource;
  SPIByte = SimCC2420C;
  SPIPacket = SimCC2420C;

  SubResource = SimCC2420C.SubSpiResource;
  ArbiterInfo = SimCC2420C;
  McuPowerState = SimCC2420C;
  
}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420/sim/SimCC2420C.nc000066400000000000000000000050651207233610700243740ustar00rootroot00000000000000/*                                                                      
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * Simulated implementation of the CC2420 radio chip. It is an
 * SPI end point, and also signals some interrupts/GPIO pins.\
 * This is a pretty complicated component, so be aware that it
 * may be very helpful to have the CC2420 data sheet nearby.
 *
 * @author Philip Levis
 * @date   November 22 2005
 */

module SimCC2420C {

  provides {
    interface Init;
    interface Resource[uint8_t] as SpiResource;
    interface SPIByte;
    interface SPIPacket;
    interface GeneralIO as CCA;
    interface GeneralIO as CSN;
    interface GeneralIO as FIFO;
    interface GeneralIO as FIFOP;
    interface GeneralIO as RSTN;
    interface GeneralIO as SFD;
    interface GeneralIO as VREN;
    interface GpioCapture as CaptureSFD;
    interface GpioInterrupt as InterruptFIFOP;
  }
  
  uses {
    interface Resource[uint8_t] as SubSpiResource;
    interface ArbiterInfo as SpiUser;
    interface McuPowerState;
  }

  
}

implementation {

  
  
}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/000077500000000000000000000000001207233610700220735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/ActiveMessageC.nc000066400000000000000000000040151207233610700252400ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 
#include 

configuration ActiveMessageC
{
	provides
	{
		interface SplitControl;

		interface AMSend[uint8_t id];
		interface Receive[uint8_t id];
		interface Receive as Snoop[uint8_t id];
		interface SendNotifier[am_id_t id];

		interface Packet;
		interface AMPacket;

		interface PacketAcknowledgements;
		interface LowPowerListening;
		interface PacketLink;
		interface RadioChannel;

		interface PacketTimeStamp as PacketTimeStampMicro;
		interface PacketTimeStamp as PacketTimeStampMilli;
	}
}

implementation
{
	components CC2420XActiveMessageC as MessageC;

	SplitControl = MessageC;

	AMSend = MessageC;
	Receive = MessageC.Receive;
	Snoop = MessageC.Snoop;
	SendNotifier = MessageC;

	Packet = MessageC;
	AMPacket = MessageC;

	PacketAcknowledgements = MessageC;
	LowPowerListening = MessageC;
	PacketLink = MessageC;
	RadioChannel = MessageC;

	PacketTimeStampMilli = MessageC;
	PacketTimeStampMicro = MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/HplCC2420XC.nc000066400000000000000000000050201207233610700241060ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */

#include "RadioConfig.h"

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;
		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components Atm128SpiC, MotePlatformC, HplCC2420XSpiP, HplAtm128GeneralIOC as IO;

	Init = Atm128SpiC;

	SpiResource = HplCC2420XSpiP.Resource;
	HplCC2420XSpiP.SubResource -> Atm128SpiC.Resource[ unique("Atm128SpiC.Resource") ];
	HplCC2420XSpiP.SS -> IO.PortB0;
	FastSpiByte = Atm128SpiC;

	CCA    = IO.PortD6;
	CSN    = IO.PortB0;
	FIFO   = IO.PortB7;
	FIFOP  = IO.PortE6;
	RSTN   = IO.PortA6;
	SFD    = IO.PortD4;
	VREN   = IO.PortA5;

	components new Atm128GpioCaptureC() as SfdCaptureC;
	components HplAtm128Timer1C as Timer1C;
	SfdCapture = SfdCaptureC;
	SfdCaptureC.Atm128Capture -> Timer1C.Capture;

	components new Atm128GpioInterruptC() as FifopInterruptC;
  	components HplAtm128InterruptC as Interrupts;
  	FifopInterrupt= FifopInterruptC;
  	FifopInterruptC.Atm128Interrupt -> Interrupts.Int6;

	components LocalTimeMicroC;
	LocalTimeRadio = LocalTimeMicroC.LocalTime;

	components new AlarmThree16C() as AlarmC;
	Alarm = AlarmC;
}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/HplCC2420XSpiP.nc000066400000000000000000000035211207233610700246030ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

module HplCC2420XSpiP @safe()
{
	provides interface Resource;
  
	uses
	{
		interface Resource as SubResource;
		interface GeneralIO as SS;
	}
}

implementation
{
	async command error_t Resource.request()
	{
		return call SubResource.request();
	}

	async command error_t Resource.immediateRequest()
	{
		error_t error = call SubResource.immediateRequest();
		if( error == SUCCESS )
		{
			call SS.makeOutput();
			call SS.clr();
		}
		return error;
	}

	event void SubResource.granted()
	{
		call SS.makeOutput();
		call SS.clr();

		signal Resource.granted();
	}
	
	async command error_t Resource.release()
	{
		if( call SubResource.isOwner() )
			call SS.set();

		return call SubResource.release();
	}

	async command bool Resource.isOwner()
	{
		return call SubResource.isOwner();
	}
}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/LocalTimeMicroC.nc000066400000000000000000000027161207233610700253710ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#include "Timer.h"

configuration LocalTimeMicroC
{
	provides interface LocalTime;
}

implementation
{
	components CounterOne16C;
	components new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t, 0, uint32_t);
	components new CounterToLocalTimeC(TMicro);

	LocalTime = CounterToLocalTimeC;
	CounterToLocalTimeC.Counter -> TransformCounterC;
	TransformCounterC.CounterFrom -> CounterOne16C;
}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/MicaTimer.h000066400000000000000000000042001207233610700241120ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 


#ifndef MICATIMER_H
#define MICATIMER_H

#include 
#include 

/* Some types for the non-standard rates that mica timers might be running
   at.
 */
typedef struct { } T64khz;
typedef struct { } T128khz;
typedef struct { } T2mhz;
typedef struct { } T4mhz;

/* TX is the typedef for the rate of timer X, 
   MICA_PRESCALER_X is the prescaler for timer X,
   MICA_DIVIDER_X_FOR_Y_LOG2 is the number of bits to shift timer X by
     to get rate Y,
   counter_X_overflow_t is uint16_t if MICA_DIVIDER_X_FOR_Y_LOG2 is 0,
     uint32_t otherwise.
*/

#if MHZ == 8

// set TThree to be 1mhz, prescale to 32khz in software

typedef TMicro TOne;
typedef TMicro TThree;
typedef uint32_t counter_one_overflow_t;
typedef uint16_t counter_three_overflow_t;
enum {
  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_8,
  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 5,
  MICA_PRESCALER_THREE = ATM128_CLK16_DIVIDE_8,
  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0,
  EXT_STANDBY_T0_THRESHOLD = 12,
};
 

#else
#error "Unknown clock rate. MHZ must be defined to 8."
#endif

enum {
  PLATFORM_MHZ = MHZ
};

#endif
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/RadioConfig.h000066400000000000000000000044411207233610700244330ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai, Miklos Maroti
 */ 

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include 
#include 

/* This is the default value of the PA_POWER field of the TXCTL register. */
#ifndef CC2420X_DEF_RFPOWER
#define CC2420X_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the FSCTRL register. */
#ifndef CC2420X_DEF_CHANNEL
#define CC2420X_DEF_CHANNEL	11
#endif

/* The number of microseconds a sending micaz mote will wait for an acknowledgement */
#ifndef SOFTWAREACK_TIMEOUT
#define SOFTWAREACK_TIMEOUT	800
#endif

/**
 * This is the timer type of the radio alarm interface
 */
typedef TThree TRadio;
typedef uint16_t tradio_size;

/**
 * The number of radio alarm ticks per one microsecond (0.9216).
 * We use integers and no parentheses just to make deputy happy.
 * Ok, further hacks were required for deputy, I removed 00 from the
 * beginning and end to be able to handle longer wait periods.
 */
#define RADIO_ALARM_MICROSEC	(73728UL / MHZ) * (1 << MICA_DIVIDE_THREE_FOR_MICRO_LOG2) / 10000UL

/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
#define RADIO_ALARM_MILLI_EXP	(5 + MICA_DIVIDE_THREE_FOR_MICRO_LOG2)

#endif//__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/TimeSyncMessageC.nc000066400000000000000000000041471207233610700255660ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 
#include 

configuration TimeSyncMessageC
{
	provides
	{
		interface SplitControl;

		interface Receive[uint8_t id];
		interface Receive as Snoop[am_id_t id];
		interface Packet;
		interface AMPacket;

		interface PacketTimeStamp as PacketTimeStampRadio;
		interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketRadio;

		interface PacketTimeStamp as PacketTimeStampMilli;
		interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketMilli;
	}
}

implementation
{
	components CC2420XTimeSyncMessageC as MessageC;
  
	SplitControl	= MessageC;
  	Receive		= MessageC.Receive;
	Snoop		= MessageC.Snoop;
	Packet		= MessageC;
	AMPacket	= MessageC;

	PacketTimeStampRadio	= MessageC;
	TimeSyncAMSendRadio	= MessageC;
	TimeSyncPacketRadio	= MessageC;

	PacketTimeStampMilli	= MessageC;
	TimeSyncAMSendMilli	= MessageC;
	TimeSyncPacketMilli	= MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/micaz/chips/cc2420x/platform_message.h000066400000000000000000000027051207233610700256000ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 
#include 

typedef union message_header {
	cc2420xpacket_header_t cc2420x;
	serial_header_t serial;
} message_header_t;

typedef union message_footer {
	cc2420xpacket_footer_t cc2420x;
} message_footer_t;

typedef union message_metadata {
	cc2420xpacket_metadata_t cc2420x;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/micaz/hardware.h000066400000000000000000000055201207233610700216500ustar00rootroot00000000000000/**                                                                     
 *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
 *  downloading, copying, installing or using the software you agree to
 *  this license.  If you do not agree to this license, do not download,
 *  install, copy or use the software.
 *
 *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
 *  Copyright (c) 2002-2003 Intel Corporation.
 *  Copyright (c) 2000-2003 The Regents of the University  of California.    
 *  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
 *  @author Alan Broad 
 *  @author Matt Miller 
 *  @author Martin Turon 
 *
 *  $Id: hardware.h,v 1.8 2010-06-29 22:07:54 scipio Exp $
 */

#ifndef HARDWARE_H
#define HARDWARE_H

#ifndef MHZ
/* Clock rate is ~8MHz except if specified by user 
   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
#define MHZ 8
#endif

#include 
#include 
#include 

// enum so components can override power saving,
// as per TEP 112.
enum {
  TOS_SLEEP_NONE = ATM128_POWER_IDLE,
};

// A/D channels
enum {
  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1    // normally unpopulated
};

#ifndef PLATFORM_BAUDRATE
enum {
  PLATFORM_BAUDRATE = 57600L
};
#endif

#endif //HARDWARE_H
tinyos-2.1.2+dfsg/tos/platforms/micaz/mac/000077500000000000000000000000001207233610700204405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/mac/tkn154/000077500000000000000000000000001207233610700214665ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/mac/tkn154/Makefile.include000066400000000000000000000005731207233610700245550ustar00rootroot00000000000000# We include several platform-glue components from telosb, because they are
# identical on the micaz platform (e.g. Ieee802154BeaconEnabledC.nc,
# Ieee802154NonBeaconEnabledC.nc,TKN154TimingP.nc, etc.)

CFLAGS += -I$(TOSDIR)/platforms/micaz/mac/tkn154 \
	-I$(TOSDIR)/platforms/telosb/mac/tkn154 \
	-I$(TOSDIR)/platforms/telosb/mac/tkn154/timer \
	-I$(TOSDIR)/chips/cc2420_tkn154
tinyos-2.1.2+dfsg/tos/platforms/micaz/mac/tkn154/README.txt000066400000000000000000000012221207233610700231610ustar00rootroot00000000000000This directory contains the TKN15.4 "platform glue" code for the micaz
platform. Like the telos platform, micaz uses the CC2420 radio and in order not
to maintain identical configuration files, the micaz platform pulls in (uses) some
files from the platform/telosb/mac/tkn154 directory. This includes the central
MAC configurations "Ieee802154BeaconEnabledC" and "Ieee802154NonBeaconEnabledC",
to which the next higher layer will wire to.
The ./Makefile.include file defines in which order the directories are parsed and
should be included by any micaz application. 

More information on TKN15.4 can be found here:
tinyos-2.x/tos/lib/mac/tkn154/README.txt
 
tinyos-2.1.2+dfsg/tos/platforms/micaz/mac/tkn154/TKN154_platform.h000066400000000000000000000053521207233610700244360ustar00rootroot00000000000000/*
 * Copyright (c) 2008, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names 
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * - Revision -------------------------------------------------------------
 * $Revision: 1.1 $
 * $Date: 2009-05-18 16:29:56 $
 * @author Jan Hauer 
 * ========================================================================
 */

#ifndef __TKN154_platform_H
#define __TKN154_platform_H

/**************************************************** 
 * The following constants define guard times on MicaZ. 
 * All values are in symbol time (1 symbol = 16 us)
 */

enum {
  // the expected maximum time between calling a transmit() operation and
  // the radio putting the first byte on the channel assuming no CSMA-CA
  IEEE154_RADIO_TX_DELAY = 400,

  // the expected maximum time between calling a receive() operation and the 
  // the radio actually being put in receive mode
  IEEE154_RADIO_RX_DELAY = 400,

  // defines at what time the MAC payload for a beacon frame is assembled before
  // the next scheduled beacon transmission time; the value must be smaller than 
  // the beacon interval plus the time for preparing the Tx operation
  BEACON_PAYLOAD_UPDATE_INTERVAL = 2500, 
};

// TODO: add (and test) IEEE154_RADIO_POWERUP_TIME (see telos)

#endif

tinyos-2.1.2+dfsg/tos/platforms/micaz/mac/tkn154/platform_message.h000066400000000000000000000012361207233610700251710ustar00rootroot00000000000000
#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 

/* The following include pulls in the ieee154_header_t/ieee154_metadata_t definitions */
#include 

/* TOSH_DATA_LENGTH should be the maximum length of the MAC payload */
#ifndef TOSH_DATA_LENGTH
#define TOSH_DATA_LENGTH 118
#elif TOSH_DATA_LENGTH < 118
#warning "MAC payload region is smaller than aMaxMACPayloadSize!"
#endif

typedef union message_header {
  ieee154_header_t ieee154;
  serial_header_t serial;
} message_header_t;

typedef union TOSRadioFooter {
} message_footer_t;

typedef union TOSRadioMetadata {
  ieee154_metadata_t ieee154;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/micaz/platform.h000066400000000000000000000000001207233610700216630ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/platform_message.h000066400000000000000000000051241207233610700234030ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:54 scipio Exp $
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * Defining the platform-independently named packet structures to be the
 * chip-specific CC1000 packet structures.
 *
 * @author Philip Levis
 * @date   May 16 2005
 * Revision:  $Revision: 1.6 $
 */


#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include "CC2420.h"
#include "Serial.h"

typedef union message_header {
  cc2420_header_t cc2420;
  serial_header_t serial;
} message_header_t;

typedef union message_footer {
  cc2420_footer_t cc2420;
} message_footer_t;

typedef union message_metadata {
  cc2420_metadata_t cc2420;
  serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/micaz/sim/000077500000000000000000000000001207233610700204705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/micaz/sim/.platform000066400000000000000000000017501207233610700223200ustar00rootroot00000000000000#
# FILE: micaz/.platform
# 
# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.  And because of that, the current platform's include directory
# must be specified, otherwise its search order is last instead of first.
#
# $Id: .platform,v 1.6 2009-11-14 02:12:39 razvanm Exp $
#
push( @includes, qw(

  %T/platforms/micaz
  %T/platforms/mica
  %T/platforms/micaz/chips/cc2420
  %T/chips/cc2420
  %T/chips/atm128
  %T/chips/atm128/adc
  %T/chips/atm128/pins
  %T/chips/atm128/spi
  %T/chips/atm128/timer
  %T/lib/power
  %T/lib/timer
  %T/lib/serial

) );

@opts = qw(

  -fnesc-no-debug
  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask

);

if (defined($ENV{"GCC"})) {
  push @opts, "-gcc=$ENV{'GCC'}";
} else {
  push @opts, "-gcc=gcc";
}
push @opts, "-mingw-gcc" if $cygwin;

tinyos-2.1.2+dfsg/tos/platforms/micaz/sim/platform_hardware.h000066400000000000000000000053701207233610700243470ustar00rootroot00000000000000/**                                                                     
 *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
 *  downloading, copying, installing or using the software you agree to
 *  this license.  If you do not agree to this license, do not download,
 *  install, copy or use the software.
 *
 *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
 *  Copyright (c) 2002-2003 Intel Corporation.
 *  Copyright (c) 2000-2003 The Regents of the University  of California.    
 *  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
 *  @author Alan Broad 
 *  @author Matt Miller 
 *  @author Martin Turon 
 *
 *  $Id: platform_hardware.h,v 1.6 2010-06-29 22:07:54 scipio Exp $
 */

#ifndef HARDWARE_H
#define HARDWARE_H

#include 
#include 

// A/D constants (channels, etc)
enum {
  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC0,
  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1,    // normally unpopulated
  CHANNEL_BATTERY    = ATM128_ADC_SNGL_ADC7,
  CHANNEL_BANDGAP    = 30,
  CHANNEL_GND        = 31,
//  ATM128_ADC_PRESCALE = ATM128_ADC_PRESCALE_64,  // normal mica2 prescaler value
  ATM128_TIMER0_TICKSPPS = 32768,
};


#endif //HARDWARE_H
tinyos-2.1.2+dfsg/tos/platforms/mulle/000077500000000000000000000000001207233610700177135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/.platform000077500000000000000000000032641207233610700215500ustar00rootroot00000000000000push( @includes, qw(
  %T/platforms/mulle/fix
  %T/platforms/mulle
  %T/platforms/mulle/chips/rf230
  %T/chips/rf230
  %T/lib/rfxlink/layers
  %T/lib/rfxlink/util
  %T/chips/at45db
  %T/platforms/mulle/button
  %T/platforms/mulle/lib
  %T/platforms/mulle/i2c
  %T/platforms/mulle/spi
  %T/platforms/mulle/chips/rv8564
  %T/platforms/mulle/chips/at45db
  %T/platforms/mulle/chips/m16c60
  %T/platforms/mulle/chips/mma7261qt
  %T/platforms/mulle/chips/ds2782
  %T/platforms/mulle/system
  %T/platforms/mulle/timers
  %T/platforms/mulle/timers/stop
  %T/platforms/mulle/timers/wait
  %T/platforms/mulle/timers/rf230
  %T/chips/m16c60
  %T/chips/m16c60/62p
  %T/chips/m16c60/control
  %T/chips/m16c60/adc
  %T/chips/m16c60/dac
  %T/chips/m16c60/pins
  %T/chips/m16c60/timer
  %T/chips/m16c60/uart
  %T/chips/m16c60/printf
  %T/chips/mma7261qt
  %T/chips/ds2782
  %T/lib/power
  %T/lib/timer
  %T/lib/serial
  %T/lib/diagmsg
  %T/lib/net/Deluge
) );

@opts = qw(
  -gcc=m32c-elf-gcc
  -mcpu=m16c
  -fnesc-target=env
);


# gcc-4.5.0/gcc/config/m32c/m32c.h
# in the order of nesc/src/machine/env_machine.c
$ENV{NESC_MACHINE}="".
"big_endian=false " . # m16c is little endian only 
"pcc_bitfield_type_matters=false " . # m32c.h (all)
"empty_field_boundary=8 " .
"structure_size_boundary=8 " . 
"word_size=1 " .
"pointer=2,1 " . # m32c.h (TARGET_A16 == m8 or m16c)
"float=4,1 " . # m32c.h (all)
"double=8,1 " . # m32c.h (all)
"long_double=8,1 " . # m32c.h (all)
"short=2,1 " . # m32c.h (all)
"int=2,1 " . # m32c.h (all)
"long=4,1 " . # m32c.h (all)
"long_long=8,1 " . # m32c.h (all)
"int1248_align=1,1,1,1 " .
"wchar_size_size=2,2 " .
"char_wchar_signed=true,true " . # m32c.h char defined
"" # several undefined fields... 
tinyos-2.1.2+dfsg/tos/platforms/mulle/ActiveMessageC.nc000077500000000000000000000052521207233610700230670ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

#include 

configuration ActiveMessageC
{
	provides
	{
		interface SplitControl;

		interface AMSend[uint8_t id];
		interface Receive[uint8_t id];
		interface Receive as Snoop[uint8_t id];
		interface SendNotifier[am_id_t id];

		interface Packet;
		interface AMPacket;

		interface PacketAcknowledgements;
		interface LowPowerListening;
		interface PacketLink;

		interface PacketTimeStamp as PacketTimeStampMicro;
		interface PacketTimeStamp as PacketTimeStampMilli;
	}
}

implementation
{
	components RF230ActiveMessageC as MessageC,
		RF230SplitControlP,
		new SystemClockControlC();

	RF230SplitControlP.SplitControlOrig -> MessageC;
	RF230SplitControlP.SystemClockControl -> SystemClockControlC;

	SplitControl = RF230SplitControlP.SplitControl;

	AMSend = MessageC;
	Receive = MessageC.Receive;
	Snoop = MessageC.Snoop;
	SendNotifier = MessageC;

	Packet = MessageC;
	AMPacket = MessageC;

	PacketAcknowledgements = MessageC;
	LowPowerListening = MessageC;
	PacketLink = MessageC;

	PacketTimeStampMilli = MessageC;
	PacketTimeStampMicro = MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/DemoSensorC.nc000077500000000000000000000044061207233610700224250ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Demo sensor that connects to the AN0 channel on the MCU. This can
 * easily be used together with the potentiometer on the Mulle
 * expansionboard.
 *
 * @author Henrik Makitaavola 
 */
generic configuration DemoSensorC()
{
  provides interface Read;
}
implementation
{
  components new AdcReadC(M16c60_ADC_CHL_AN0,
                          M16c60_ADC_PRECISION_10BIT,
                          M16c60_ADC_PRESCALE_4);
  components HplM16c60GeneralIOC as IOs;

  AdcReadC.Pin -> IOs.PortP100;
  Read = AdcReadC;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/DemoSensorNowC.nc000066400000000000000000000011341207233610700231010ustar00rootroot00000000000000/**
 * Demo sensor for the Mulle platform.
 *
 * @author Henrik Makitaavola 
 */

generic configuration DemoSensorNowC()
{
  provides interface Resource;
  provides interface ReadNow;
}
implementation {
  components new AdcReadNowClientC(),
             DemoSensorP,
             HplM16c60GeneralIOC as IOs,
             RealMainP;

  DemoSensorP.Pin -> IOs.PortP100;
  DemoSensorP.AVcc -> IOs.PortP76;

  ReadNow = AdcReadNowClientC;
  Resource = AdcReadNowClientC;

  AdcReadNowClientC.M16c60AdcConfig -> DemoSensorP;

  RealMainP.PlatformInit -> DemoSensorP;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/DemoSensorP.nc000066400000000000000000000014301207233610700224310ustar00rootroot00000000000000module DemoSensorP
{
  provides interface M16c60AdcConfig;
  provides interface Init;

  uses interface GeneralIO as Pin;
  uses interface GeneralIO as AVcc;
}
implementation
{
  command error_t Init.init()
  {
    call Pin.makeInput();
    // TODO(henrik) This Vref should be turned on in connection to the A/D
    // converter code and not here.
    // Turn on the Vref
    call AVcc.makeOutput();
    call AVcc.set();
  }

  async command uint8_t M16c60AdcConfig.getChannel()
  {
    // select the AN0 = P10_0 to potentiometer on the expansion board.
    return M16c60_ADC_CHL_AN0;
  }

  async command uint8_t M16c60AdcConfig.getPrecision()
  {
    return M16c60_ADC_PRECISION_10BIT;
  }

  async command uint8_t M16c60AdcConfig.getPrescaler()
  {
    return M16c60_ADC_PRESCALE_4;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/DemoSensorStreamC.nc000066400000000000000000000017441207233610700236000ustar00rootroot00000000000000/* $Id: DemoSensorStreamC.nc,v 1.4 2006/12/12 18:23:43 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Demo sensor for the Mulle platform.
 *
 * @author Henrik Makitaavola 
 * @author David Gay
 */

generic configuration DemoSensorStreamC()
{
  provides interface ReadStream;
}
implementation {
  components new AdcReadStreamClientC(),
             DemoSensorP,
             HplM16c60GeneralIOC as IOs,
             RealMainP;

  DemoSensorP.Pin -> IOs.PortP100;
  DemoSensorP.AVcc -> IOs.PortP76;

  ReadStream = AdcReadStreamClientC;

  AdcReadStreamClientC.M16c60AdcConfig -> DemoSensorP;

  RealMainP.PlatformInit -> DemoSensorP;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/Ieee154MessageC.nc000066400000000000000000000050271207233610700227520ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

configuration Ieee154MessageC
{
	provides
	{
		interface SplitControl;

		interface Ieee154Send;
		interface Receive as Ieee154Receive;
		interface SendNotifier;

		interface Packet;
		interface Ieee154Packet;
		interface Resource as SendResource[uint8_t clint];

		interface PacketAcknowledgements;
		interface LowPowerListening;
		interface PacketLink;
		interface RadioChannel;

		interface PacketTimeStamp as PacketTimeStampMicro;
		interface PacketTimeStamp as PacketTimeStampMilli;
	}
}

implementation
{
	components RF230Ieee154MessageC as MessageC;

	SplitControl = MessageC;

	Ieee154Send = MessageC;
	Ieee154Receive = MessageC;
	SendNotifier = MessageC;

	Packet = MessageC;
	Ieee154Packet = MessageC;
	SendResource = MessageC;

	PacketAcknowledgements = MessageC;
	LowPowerListening = MessageC;
	PacketLink = MessageC;
	RadioChannel = MessageC;

	PacketTimeStampMilli = MessageC;
	PacketTimeStampMicro = MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/PlatformC.nc000077500000000000000000000047061207233610700221360ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * All the wiring of the Mulle platform components.
 *
 * @author Henrik Makitaavola 
 */

#include "hardware.h"

configuration PlatformC
{
  provides interface Init;

  uses interface Init as SubInit;

}
implementation
{
  components
    PlatformP,
    LedsC,
    M16c60ControlC,
    new StopModeControlC();

  Init = PlatformP.Init;
  SubInit = PlatformP.SubInit;
  PlatformP.M16c60Control -> M16c60ControlC;

  PlatformP.StopModeControl -> StopModeControlC;

#ifdef ENABLE_STOP_MODE
  components HplRV8564C, DS2782InternalC, RealMainP;
  RealMainP.SoftwareInit -> PlatformP.StopModeInit;
  PlatformP.RTC -> HplRV8564C;
  PlatformP.HplDS2782 -> DS2782InternalC;
  PlatformP.DS2782Control -> DS2782InternalC;
#endif
}

tinyos-2.1.2+dfsg/tos/platforms/mulle/PlatformLedsC.nc000077500000000000000000000043711207233610700227440ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Mulle platform-specific LED interface.
 *
 * @author Henrik Makitaavola 
 */
configuration PlatformLedsC
{
  provides interface GeneralIO as Led0;
  provides interface GeneralIO as Led1;
  provides interface GeneralIO as Led2;
  uses interface Init;
}
implementation
{
  components HplM16c60GeneralIOC as IO;
  components PlatformP;

  Init = PlatformP.SubInit;

  Led0 = IO.PortP36;  // Pin P3_6 = Red LED
  Led1 = IO.PortP37;  // Pin P3_7 = Green LED
  Led2 = IO.PortP34;  // External LED, supplied by user.
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/PlatformP.nc000077500000000000000000000101161207233610700221430ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Mulle platform initialization code.
 *
 * @author Henrik Makitaavola 
 */

#include "hardware.h"
#include "rv8564.h"

module PlatformP
{
  provides interface Init;
  uses interface Init as SubInit;
  uses interface M16c60Control;
  uses interface StopModeControl;
#ifdef ENABLE_STOP_MODE
  provides interface Init as StopModeInit;

  uses interface HplRV8564 as RTC;
  uses interface HplDS2782;
  uses interface StdControl as DS2782Control;
#endif
}

implementation
{
  command error_t Init.init()
  {
    error_t ok = SUCCESS;

    ok = call M16c60Control.init();

    call StopModeControl.allowStopMode(false);

    // Init the M16c/60 to run at 10MHz.
    ok = ecombine (ok, call M16c60Control.defaultSystemClock(MCU_SPEED_10MHz));

    // Sub components initialization.
    ok = ecombine(ok, call SubInit.init());

    return SUCCESS;
  }


#ifdef ENABLE_STOP_MODE
  task void enableStopMode();

  command error_t StopModeInit.init()
  {
    // The task is needed so we can be sure that all underlying components 
    // have been initialized, for example the I2C resource.
    post enableStopMode();
  }

  task void enableStopMode()
  {
    call StopModeControl.allowStopMode(true);
    // Allow the DS2782 to enter sleep
    call DS2782Control.start();
    call HplDS2782.allowSleep(true);
    // Activate the RTC and set it to output 1024 tics on the CLKOUT pin
    call RTC.enableCLKOUT();
    call RTC.writeRegister(RV8564_CLKF, 0x81);  
  }

  task void stopDS2782()
  {
    call DS2782Control.stop();
  }

  async event void RTC.fired() {}
  async event void RTC.readRegisterDone(error_t error, uint8_t val, uint8_t reg) {}
  async event void RTC.writeRegisterDone(error_t error, uint8_t reg) {}

  async event void HplDS2782.setConfigDone(error_t error) {return; }
  async event void HplDS2782.allowSleepDone( error_t error ) { post stopDS2782(); }
  async event void HplDS2782.measureTemperatureDone( error_t error, uint16_t val ){ return; }
  async event void HplDS2782.measureVoltageDone( error_t error, uint16_t val ){ return; }
  async event void HplDS2782.measureCurrentDone( error_t error, uint16_t val ){ return; }
  async event void HplDS2782.measureAccCurrentDone( error_t error, uint16_t val ){ return; }
  async event void HplDS2782.setOffsetBiasDone( error_t error ){ return; }
  async event void HplDS2782.setAccOffsetBiasDone(error_t error){ return; }
#endif
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/PlatformSerialC.nc000077500000000000000000000043751207233610700233000ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The wiring of the Serial interface used to communicate with the Mulle
 * platform.
 * 
 * @author Henrik Makitaavola 
 */
configuration PlatformSerialC {
  
  provides interface StdControl;
  provides interface UartStream;
  provides interface UartByte;
  
}
implementation {

  components M16c60UartC as Uart,
      PlatformSerialP;
      
  StdControl = PlatformSerialP;
  PlatformSerialP -> Uart.Uart1Control;
  PlatformSerialP -> Uart.Uart1Stream;
  UartStream = Uart.Uart1Stream;
  UartByte = Uart.Uart1Byte;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/PlatformSerialP.nc000066400000000000000000000052161207233610700233050ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Initialization of the PlatformSerial uart and a StdControl implementation
 * for it.
 * 
 * @author Henrik Makitaavola 
 */

module PlatformSerialP
{
  provides interface StdControl;
  
  uses interface UartControl;
  uses interface UartStream;
}
implementation
{
  command error_t StdControl.start()
  {
    call UartControl.setParity(TOS_UART_PARITY_NONE);
    call UartControl.setNoStop();
    call UartControl.setSpeed(TOS_UART_57600);
    call UartControl.setDuplexMode(TOS_UART_DUPLEX);
    call UartStream.enableReceiveInterrupt();
    return SUCCESS;
  }

  command error_t StdControl.stop()
  {
    call UartControl.setDuplexMode(TOS_UART_OFF);
    return SUCCESS;
  }

  async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ){}
  async event void UartStream.receivedByte( uint8_t byte ){}
  async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ){}
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/TimeSyncMessageC.nc000077500000000000000000000054731207233610700234140ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

#include 

configuration TimeSyncMessageC
{
	provides
	{
		interface SplitControl;

		interface Receive[uint8_t id];
		interface Receive as Snoop[am_id_t id];
		interface Packet;
		interface AMPacket;

		interface PacketTimeStamp as PacketTimeStampRadio;
		interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketRadio;

		interface PacketTimeStamp as PacketTimeStampMilli;
		interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketMilli;
	}
}

implementation
{
	components RF230TimeSyncMessageC as MessageC,
		RF230SplitControlP,
		new SystemClockControlC();
  
	RF230SplitControlP.SplitControlOrig -> MessageC;
	RF230SplitControlP.SystemClockControl -> SystemClockControlC;
  
	SplitControl = RF230SplitControlP.SplitControl;

  	Receive		= MessageC.Receive;
	Snoop		= MessageC.Snoop;
	Packet		= MessageC;
	AMPacket	= MessageC;

	PacketTimeStampRadio	= MessageC;
	TimeSyncAMSendRadio	= MessageC;
	TimeSyncPacketRadio	= MessageC;

	PacketTimeStampMilli	= MessageC;
	TimeSyncAMSendMilli	= MessageC;
	TimeSyncPacketMilli	= MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/button/000077500000000000000000000000001207233610700212265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/button/HplUserButtonC.nc000066400000000000000000000073441207233610700244410ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the Mulle platform extension board.
 *
 * @author Henrik Makitaavola 
 */

configuration HplUserButtonC {
  provides interface GeneralIO;
  provides interface GpioInterrupt;
}
implementation {
  components  HplM16c60InterruptC as Irqs,
              HplM16c60GeneralIOC as IOs,
           new M16c60InterruptC() as Irq;
  
  Irq -> Irqs.Int4;
  GpioInterrupt = Irq;
  GeneralIO = IOs.PortP16;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/button/UserButton.h000066400000000000000000000071101207233610700235100ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 * @author Gilman Tolle 
 */

/**
 * Implementation of the user button for the Mulle platform
 *
 * @author Henrik Makitaavola 
 */

#ifndef __USERBUTTON_H__
#define __USERBUTTON_H__

typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/mulle/button/UserButtonC.nc000066400000000000000000000102231207233610700237630ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 * @author Gilman Tolle 
 */

/**
 * Implementation of the user button for the Mulle platform. Get
 * returns the current state of the button by reading the pin,
 * regardless of whether enable() or disable() has been called on the
 * Interface. Notify.enable() and Notify.disable() modify the
 * underlying interrupt state of the pin, and have the effect of
 * enabling or disabling notifications that the button has changed
 * state.
 *
 * @author Henrik Makitaavola 
 */

#include 

configuration UserButtonC {
  provides interface Get;
  provides interface Notify;
}
implementation {
  components HplUserButtonC;

  components UserButtonP;
  Get = UserButtonP;
  Notify = UserButtonP;

  UserButtonP.GeneralIO -> HplUserButtonC.GeneralIO;
  UserButtonP.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/button/UserButtonP.nc000066400000000000000000000104351207233610700240050ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 * @author Gilman Tolle 
 */

/**
 * Implementation of the user button for the Mulle platform extension board.
 *
 * @author Henrik Makitaavola 
 */

#include 

module UserButtonP {
  provides interface Get;
  provides interface Notify;
  
  uses interface GeneralIO;
  uses interface GpioInterrupt;
}
implementation {

  task void notify()
  {
    signal Notify.notify(BUTTON_PRESSED);
  }
  	
  command button_state_t Get.get()
  { 
    if ( call GeneralIO.get() )
    {
      return BUTTON_PRESSED;
    } 
    else 
    {
      return BUTTON_RELEASED;
    }
  }

  command error_t Notify.enable()
  {
    call GeneralIO.clr();
    call GeneralIO.makeInput();
    return call GpioInterrupt.enableRisingEdge();
  }

  command error_t Notify.disable()
  {
    call GpioInterrupt.disable();
    call GeneralIO.makeOutput();
    call GeneralIO.clr();
    return SUCCESS;
  }

  async event void GpioInterrupt.fired()
  {
    post notify();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/000077500000000000000000000000001207233610700210215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/at45db/000077500000000000000000000000001207233610700221045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/at45db/HplAt45dbC.nc000066400000000000000000000051161207233610700242230ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Lulea University of Technology
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Mulle specific wiring for the AT45DB161D Flash storage.
 *
 * @author Henrik Makitaavola 
 */

configuration HplAt45dbC
{
  provides interface HplAt45db;
}
implementation
{
  components  new HplAt45dbByteC(10),
              new SoftwareSpiC() as Spi,
              new NoArbiterC(),
              HplAt45dbP,
              HplM16c60GeneralIOC as IOs,
              RealMainP,
              BusyWaitMicroC;

  Spi.MISO -> IOs.PortP40;
  Spi.MOSI -> IOs.PortP41;
  Spi.SCLK -> IOs.PortP42;

  HplAt45db = HplAt45dbByteC;

  HplAt45dbByteC.Resource -> NoArbiterC;
  HplAt45dbByteC.FlashSpi -> Spi;
  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP;

  HplAt45dbP.VCC -> IOs.PortP32;
  HplAt45dbP.WP -> IOs.PortP44;
  HplAt45dbP.Select -> IOs.PortP45;
  HplAt45dbP.RESET -> IOs.PortP46;
  HplAt45dbP.MISO -> IOs.PortP40;
  HplAt45dbP.MOSI -> IOs.PortP41;
  HplAt45dbP.SCLK -> IOs.PortP42;

  HplAt45dbP.FlashSpi -> Spi;
  HplAt45dbP.BusyWait -> BusyWaitMicroC;
  RealMainP.SoftwareInit -> HplAt45dbP.Init;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/at45db/HplAt45dbP.nc000066400000000000000000000115221207233610700242360ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Lulea University of Technology
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 2006, Technische Universitat Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Mulle specific HplAt45dbByte interface implementation
 * for the AT45DB161D Flash storage.
 *
 * @author Henrik Makitaavola 
 */

module HplAt45dbP
{
  provides
  {
    interface HplAt45dbByte;
    interface Init;
  }
  uses
  {
    interface SpiByte as FlashSpi;
    interface GeneralIO as VCC;
    interface GeneralIO as Select;
    interface GeneralIO as RESET;
    interface GeneralIO as WP;
    interface GeneralIO as MISO;
    interface GeneralIO as MOSI;
    interface GeneralIO as SCLK;
    interface BusyWait;
  }
}
implementation
{
  // TODO(Henrik) Move init code to a SplitControl interface and
  //              change the busy wait into a TimerMilli.startOneShot.
  command error_t Init.init() {
    call MISO.makeInput();
    call MOSI.makeOutput();
    call MOSI.set();
    call SCLK.makeOutput();
    call SCLK.set();
    call WP.makeOutput();
    call WP.set();
    call RESET.makeOutput();
    call RESET.set();
    call Select.makeOutput();
    call Select.set();
    call VCC.makeOutput();
    call VCC.clr();
    // The device needs 20ms before is accepts a write.
    call BusyWait.wait(20000);
    return SUCCESS;
  }

  command void HplAt45dbByte.select() { call Select.clr(); }
  command void HplAt45dbByte.deselect() { call Select.set(); }

  task void idleTask()
  {
    uint8_t status;
    status = call FlashSpi.write(0);
    if (!(status & 0x80))
    {
      post idleTask();
    }
    else
    {
      signal HplAt45dbByte.idle();
    }
  }

  command void HplAt45dbByte.waitIdle()
  {
    post idleTask();
  }

  command bool HplAt45dbByte.getCompareStatus()
  {
    uint8_t status;
    status = call FlashSpi.write(0);
    return (!(status & 0x40));
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/at45db/HplAt45db_chip.h000066400000000000000000000045141207233610700247530ustar00rootroot00000000000000// $Id: HplAt45db_chip.h,v 1.1 2008/08/25 16:48:47 razvanm Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

#ifndef __HPLAT45DB_CHIP_H__
#define __HPLAT45DB_CHIP_H__

// flash characteristics
enum {
  AT45_MAX_PAGES = 4096,
  AT45_PAGE_SIZE = 528,
  AT45_PAGE_SIZE_LOG2 = 9 // Ignores the last 16 bytes
};

typedef uint16_t at45page_t;
typedef uint16_t at45pageoffset_t; // must fit 0 to AT45_PAGE_SIZE - 1

#endif  // __HPLAT45DB_CHIP_H__
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/ds2782/000077500000000000000000000000001207233610700217525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/ds2782/DS2782InternalC.nc000066400000000000000000000044201207233610700247250ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The DS2782 wiring on the Mulle.
 * 
 * @author Henrik Makitaavola 
 */
configuration DS2782InternalC
{
  provides interface StdControl;
  provides interface HplDS2782;
}

implementation
{
  components new MulleI2C2C() as I2C,
             new HplDS2782LogicP(0x34) as Logic,
             DS2782InternalP,
             HplM16c60GeneralIOC as IOs;

  Logic.I2CPacket -> I2C;
  Logic.I2CResource -> I2C;
  HplDS2782 = Logic;
  StdControl = Logic;

  DS2782InternalP.Pullup -> IOs.PortP75;
  DS2782InternalP.ResourceDefaultOwner -> I2C;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/ds2782/DS2782InternalP.nc000066400000000000000000000045121207233610700247440ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The DS2782 only goes to sleep if SDA and SCL are pulled low.
 * So everytime the default owner of the resource becomes the
 * owner of the I2C bus the pins are pulled low.
 * 
 * @author Henrik Makitaavola 
 */
module DS2782InternalP
{
  uses interface ResourceDefaultOwner;
  uses interface GeneralIO as Pullup;
}
implementation
{
  async event void ResourceDefaultOwner.granted()
  {
    call Pullup.clr();
  }

  async event void ResourceDefaultOwner.requested()
  {
    call Pullup.set(); 
  }

  async event void ResourceDefaultOwner.immediateRequested()
  {
    call Pullup.set();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/m16c60/000077500000000000000000000000001207233610700217355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/m16c60/M16c60AdcPlatformC.nc000066400000000000000000000041171207233610700253560ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Mulle specific implementation of the M16c60AdcPlatform interface.
 * 
 * @author Henrik Makitaavola 
 */
configuration M16c60AdcPlatformC
{
  provides interface M16c60AdcPlatform;
}
implementation
{
  components M16c60AdcPlatformP, HplM16c60GeneralIOC as IOs;

  M16c60AdcPlatform = M16c60AdcPlatformP;
  M16c60AdcPlatformP -> IOs.PortP76;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/m16c60/M16c60AdcPlatformP.nc000066400000000000000000000042241207233610700253720ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Mulle specific implementation of the M16c60AdcPlatform interface.
 * 
 * @author Henrik Makitaavola 
 */
module M16c60AdcPlatformP
{
  provides interface M16c60AdcPlatform;
  uses interface GeneralIO VRef;
}
implementation
{
  async command void M16c60AdcPlatform.adcOn()
  {
    call VRef.makeOutput();
    call VRef.set();
  }
  
  async command void M16c60AdcPlatform.adcOff()
  {
    call VRef.clr();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/m16c60/M16c60ControlPlatformC.nc000066400000000000000000000052531207233610700263110ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Mulle specific implementation of the M16c60ControlPlatform interface.
 * 
 * @author Henrik Makitaavola 
 */
module M16c60ControlPlatformC
{
  provides interface M16c60ControlPlatform;
}
implementation
{
  async command void M16c60ControlPlatform.PLLOn()
  {
    // Set all timers that uses the main clock
    // as source to use F2 instead of F1 because
    // the main clock will be twice as fast when PLL
    // is on.
    // Set the UARTS clock source to F2 instead of F1.

    // NOTE: No need to turn on/off protections for registers,
    // this is handeled by the caller of this code.
    CLR_BIT(PCLKR.BYTE, 0); // Timers
    CLR_BIT(PCLKR.BYTE, 1); // Uarts
  }

  async command void M16c60ControlPlatform.PLLOff()
  {
    // Restore settings done in PLLOn()
    // NOTE: No need to turn on/off protections for registers,
    // this is handeled by the caller of this code.
    SET_BIT(PCLKR.BYTE, 0);
    SET_BIT(PCLKR.BYTE, 1);
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/m16c60/M16c60UartCounterPlatformC.nc000066400000000000000000000040201207233610700271330ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Micro counter provided by Mulle for the M16c60 uart implementation.
 * 
 * @author Henrik Makitaavola 
 */
configuration M16c60UartCounterPlatformC
{
  provides interface Counter;
}
implementation
{
  components CounterMicro16C;

  Counter = CounterMicro16C;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/mma7261qt/000077500000000000000000000000001207233610700224605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/mma7261qt/HplMMA7261QTC.nc000066400000000000000000000057371207233610700247640ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * MMA7261QT configuration.
 *
 * @author Henrik Makitaavola
 */

configuration HplMMA7261QTC
{
  provides interface Read as AccelX;
  provides interface Read as AccelY;
  provides interface Read as AccelZ;
  
  provides interface GeneralIO as Sleep;
  provides interface GeneralIO as GSelect1;
  provides interface GeneralIO as GSelect2;
}
implementation
{
  components new AdcReadClientC() as _AccelX, 
             new AdcReadClientC() as _AccelY,
             new AdcReadClientC() as _AccelZ,
             HplM16c60GeneralIOC as IOs,
             HplMMA7261QTP;
             
  HplMMA7261QTP.VCC -> IOs.PortP76;
  HplMMA7261QTP.Sleep -> IOs.PortP12;
  HplMMA7261QTP.GSelect1 -> IOs.PortP30;
  HplMMA7261QTP.GSelect2 -> IOs.PortP31;
  HplMMA7261QTP.AccelXPort -> IOs.PortP105;
  HplMMA7261QTP.AccelYPort -> IOs.PortP104;
  HplMMA7261QTP.AccelZPort -> IOs.PortP103;
  
  Sleep = IOs.PortP12;
  GSelect1 = IOs.PortP30;
  GSelect2 = IOs.PortP31;
  
  _AccelX.M16c60AdcConfig -> HplMMA7261QTP.AccelXConf;
  _AccelY.M16c60AdcConfig -> HplMMA7261QTP.AccelYConf;
  _AccelZ.M16c60AdcConfig -> HplMMA7261QTP.AccelZConf;
  
  AccelX = _AccelX;
  AccelY = _AccelY;
  AccelZ = _AccelZ;
  
  components RealMainP;
  RealMainP.PlatformInit -> HplMMA7261QTP.Init;
  
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/mma7261qt/HplMMA7261QTP.nc000066400000000000000000000070751207233610700247760ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * MMA7261QT implementation.
 *
 * @author Henrik Makitaavola
 */

module HplMMA7261QTP
{
  provides
  {
    interface Init;
    interface M16c60AdcConfig as AccelXConf;
    interface M16c60AdcConfig as AccelYConf;
    interface M16c60AdcConfig as AccelZConf;
  }
  
  uses
  {
    interface GeneralIO as VCC;
    interface GeneralIO as Sleep;
    interface GeneralIO as GSelect1;
    interface GeneralIO as GSelect2;
    interface GeneralIO as AccelXPort;
    interface GeneralIO as AccelYPort;
    interface GeneralIO as AccelZPort;
  }
}
implementation
{
  command error_t Init.init()
  {
    call VCC.makeOutput();
    call VCC.set();
    call Sleep.makeOutput();
    call Sleep.clr();
    call GSelect1.makeOutput();
    call GSelect1.clr();
    call GSelect2.makeOutput();
    call GSelect2.clr();
    call AccelXPort.makeInput();
    call AccelXPort.clr();
    call AccelYPort.makeInput();
    call AccelYPort.clr();
    call AccelZPort.makeInput();
    call AccelZPort.clr();
  }
  
  inline uint8_t prescaler() { return M16c60_ADC_PRESCALE_4; }
  inline uint8_t precision() { return M16c60_ADC_PRECISION_8BIT; }
  
  async command uint8_t AccelXConf.getChannel()
  {
    return M16c60_ADC_CHL_AN5;
  }

  async command uint8_t AccelXConf.getPrecision()
  {
    return precision();
  }

  async command uint8_t AccelXConf.getPrescaler()
  {
    return prescaler();
  }
  
    async command uint8_t AccelYConf.getChannel()
  {
    return M16c60_ADC_CHL_AN4;
  }

  async command uint8_t AccelYConf.getPrecision()
  {
    return precision();
  }

  async command uint8_t AccelYConf.getPrescaler()
  {
    return prescaler();
  }
  
  async command uint8_t AccelZConf.getChannel()
  {
    return M16c60_ADC_CHL_AN3;
  }

  async command uint8_t AccelZConf.getPrecision()
  {
    return precision();
  }

  async command uint8_t AccelZConf.getPrescaler()
  {
    return prescaler();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rf230/000077500000000000000000000000001207233610700216555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rf230/HplRF230C.nc000077500000000000000000000057211207233610700235120ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Lulea University of Technology
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Mulle specific wiring of the HplRF230C configuration.
 * 
 * @author Henrik Makitaavola 
 */
 
#include 

configuration HplRF230C
{
  provides
  {
    interface GeneralIO as SELN;
    interface Resource as SpiResource;
    interface FastSpiByte;

    interface GeneralIO as SLP_TR;
    interface GeneralIO as RSTN;

    interface GpioCapture as IRQ;
    interface Alarm as Alarm;
    interface LocalTime as LocalTimeRadio;
  }
}
implementation
{
  components HplRF230P;
  IRQ = HplRF230P.IRQ;

  components HplM16c60GeneralIOC as IOs;
  components new SoftwareSpiC() as Spi,
             new NoArbiterC();
  SpiResource = NoArbiterC;
  Spi.MISO -> IOs.PortP10;
  Spi.MOSI -> IOs.PortP11;
  Spi.SCLK -> IOs.PortP33;
  FastSpiByte = Spi;

  HplRF230P.PortVCC -> IOs.PortP77;
  HplRF230P.PortIRQ -> IOs.PortP83;
  HplRF230P.MISO -> IOs.PortP10;
  HplRF230P.MOSI -> IOs.PortP11;
  HplRF230P.SCLK -> IOs.PortP33;

  SLP_TR = IOs.PortP07;
  RSTN = IOs.PortP43;
  SELN = IOs.PortP35;

  components  HplM16c60InterruptC as Irqs,
      new M16c60InterruptC() as Irq;
  HplRF230P.GIRQ -> Irq;
  Irq -> Irqs.Int1;

  components AlarmRF23016C as AlarmRF230;
  HplRF230P.Alarm -> AlarmRF230;
  Alarm = AlarmRF230;

  components PlatformP;
  PlatformP.SubInit -> HplRF230P.PlatformInit;
    
  components LocalTimeMicroC;
  LocalTimeRadio = LocalTimeMicroC;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rf230/HplRF230P.nc000077500000000000000000000057221207233610700235300ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Lulea University of Technology
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Implementation of the time capture on RF230 interrupt and
 * a initialization routine for the RF230 pins.
 *
 * @author Henrik Makitaavola 
 */

module HplRF230P
{
  provides
  {
    interface GpioCapture as IRQ;
    interface Init as PlatformInit;
  }

  uses
  {
    interface GeneralIO as PortIRQ;
    interface GeneralIO as PortVCC;
    interface GeneralIO as MOSI;
    interface GeneralIO as MISO;
    interface GeneralIO as SCLK;
    interface GpioInterrupt as GIRQ;
    interface Alarm as Alarm;
  }
}
implementation
{
  command error_t PlatformInit.init()
  {
    call MISO.makeInput();
    call MOSI.makeOutput();
    call MOSI.clr();
    call SCLK.makeOutput();
    call SCLK.clr();
    call PortIRQ.makeInput(); 
    call PortIRQ.clr();
    call GIRQ.disable();
    call PortVCC.makeOutput(); 
    call PortVCC.set(); 

    return SUCCESS;
  }

  async event void GIRQ.fired()
  {
    signal IRQ.captured(call Alarm.getNow());
  }
  async event void Alarm.fired() {}

  default async event void IRQ.captured(uint16_t time) {}

  async command error_t IRQ.captureRisingEdge()
  {
    call GIRQ.enableRisingEdge();
    return SUCCESS;
  }

  async command error_t IRQ.captureFallingEdge()
  {
    // falling edge comes when the IRQ_STATUS register of the RF230 is read
    return FAIL;
  }

  async command void IRQ.disable()
  {
    call GIRQ.disable();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rf230/RF230SplitControlP.nc000066400000000000000000000053401207233610700254320ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Lulea University of Technology
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * This module overrides the default SplitControl for the RF230 chip so that
 * the PLL is turned on every time the RF230 chip is turned on.
 * 
 * @author Henrik Makitaavola 
 */
module RF230SplitControlP
{
  provides interface SplitControl;
  uses interface SplitControl as SplitControlOrig;
  uses interface SystemClockControl;
}
implementation
{
  command error_t SplitControl.start()
  {
#ifndef RF230_SLOW_SPI_MULLE
#ifndef RF230_SLOW_SPI
    call SystemClockControl.minSpeed(M16C60_PLL_CLOCK);
#endif
#endif
    return call SplitControlOrig.start();
  }

  event void SplitControlOrig.startDone(error_t error)
  {
#ifndef RF230_SLOW_SPI_MULLE
#ifndef RF230_SLOW_SPI
    if (error != SUCCESS)
    {
      call SystemClockControl.minSpeed(M16C60_DONT_CARE);
    }
#endif
#endif
    signal SplitControl.startDone(error);
  }

  command error_t SplitControl.stop()
  {
    return call SplitControlOrig.stop();
  }

  event void SplitControlOrig.stopDone(error_t error)
  {
#ifndef RF230_SLOW_SPI
    if (error == SUCCESS)
    {
      call SystemClockControl.minSpeed(M16C60_DONT_CARE);
    }
#endif
    signal SplitControl.stopDone(error);
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rf230/RadioConfig.h000066400000000000000000000122271207233610700242160ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Lulea University of Technology
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

/**
 * @author Henrik Makitaavola 
 */
#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include "Timer.h"

enum
{
	/**
	 * This is the value of the TRX_CTRL_0 register
	 * which configures the output pin currents and the CLKM clock
	 */
	RF230_TRX_CTRL_0_VALUE = 0,

	/**
	 * This is the default value of the CCA_MODE field in the PHY_CC_CCA register
	 * which is used to configure the default mode of the clear channel assessment
	 */
	RF230_CCA_MODE_VALUE = RF230_CCA_MODE_3,

	/**
	 * This is the value of the CCA_THRES register that controls the
	 * energy levels used for clear channel assessment
	 */
	RF230_CCA_THRES_VALUE = 0xC7,
};

/* This is the default value of the TX_PWR field of the PHY_TX_PWR register. 0-15*/
#ifndef RF230_DEF_RFPOWER
#define RF230_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the PHY_CC_CCA register. 11-26*/
#ifndef RF230_DEF_CHANNEL
#define RF230_DEF_CHANNEL	11
#endif

/*
 * This is the command used to calculate the CRC for the RF230 chip. 
 * TODO: Check why the default crcByte implementation is in a different endianness
 */
inline uint16_t RF230_CRCBYTE_COMMAND(uint16_t crc, uint8_t data)
{
    uint8_t lo8 = crc & 0x00FF;
    uint8_t hi8 = (crc >> 8) & 0x00FF;
    data ^= lo8; //lo8 (crc);
    data ^= data << 4;

    return ((((uint16_t)data << 8) | hi8 /*hi8 (crc)*/) ^ (uint8_t)(data >> 4) 
        ^ ((uint16_t)data << 3));
}

/**
 * This is the timer type of the radio alarm interface
 */
typedef TMicro TRadio;
typedef uint16_t tradio_size;

/**
 * The number of alarm ticks per one second
 */
#define RADIO_ALARM_SEC 2500000 // 20MHz / 8

#define RADIO_ALARM_MICROSEC	2.5// RADIO_ALARM_SEC/1000000

/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
#define RADIO_ALARM_MILLI_EXP	11

/**
 * Make PACKET_LINK automaticaly enabled for Ieee154MessageC
 */
#if !defined(TFRAMES_ENABLED) && !defined(PACKET_LINK)
#define PACKET_LINK
#endif

#endif  //__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rv8564/000077500000000000000000000000001207233610700217775ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rv8564/HplRV8564.nc000077500000000000000000000057561207233610700236630ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Interface for the RV-8564-C2 real time clock.
 *
 * @author Henrik Makitaavola 
 */
interface HplRV8564
{
  /**
   * Enables/disables the interrupts generated by the RV8564 chip.
   */
  command void enableInterrupt();
  command void disableInterrupt();

  /**
   * Enables/disable CLKOUT from the RTC.
   */
  command void enableCLKOUT();
  command void disableCLKOUT();

  /**
   * Reads from a register.
   *
   * @param reg The register to be read.
   * @return The value of the register.
   */
  command error_t readRegister(uint8_t reg);

  /**
   * Writes to a register.
   *
   * @param reg The register that is written to.
   * @param value The value that is written to the register.
   */
  command error_t writeRegister(uint8_t reg, uint8_t value);

  /**
   * Signals when a register read finished.
   *
   * @param val The value read from the register.
   * @param reg The register the value was read from.
   */
  async event void readRegisterDone(error_t error, uint8_t reg, uint8_t val);

  /**
   * Signals when a register write finished.
   *
   * @param reg The register the value was written to.
   */
  async event void writeRegisterDone(error_t error, uint8_t reg);

  /**
   * Signal when an interrupt occurs.
   */
  async event void fired();
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rv8564/HplRV8564C.nc000077500000000000000000000047561207233610700237650ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Configuration of the RV-8564 Real-time Clock on the Mulle platform.
 * 
 * @author Henrik Makitaavola 
 */

configuration HplRV8564C
{
  provides interface HplRV8564;
}
implementation
{
  components HplRV8564P as RTCP,
             new MulleI2C2C() as I2C,
             HplM16c60GeneralIOC as IOs,
             HplM16c60InterruptC as Irqs,
             new M16c60InterruptC() as Irq,
             BusyWaitMicroC;

  Irq.HplM16c60Interrupt -> Irqs.Int0;

  HplRV8564 = RTCP;
  RTCP.CLKOE -> IOs.PortP47;
  RTCP.CLKOUT -> IOs.PortP92;
  RTCP.GpioInterrupt -> Irq;
  RTCP.I2C -> I2C;
  RTCP.I2CResource -> I2C;
  RTCP.BusyWait -> BusyWaitMicroC;

  components PlatformC, RealMainP;
  PlatformC.SubInit -> RTCP.Init;
  RealMainP.SoftwareInit -> RTCP.Startup;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rv8564/HplRV8564P.nc000077500000000000000000000116441207233610700237740ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Implementation of the RV-8564-C2 real time clock.
 *
 * @author Henrik Makitaavola 
 */

#include "rv8564.h"
#include "I2C.h"
module HplRV8564P
{
  provides interface HplRV8564 as RTC;
  provides interface Init;
  provides interface Init as Startup;

  uses interface GeneralIO as CLKOE;
  uses interface GeneralIO as CLKOUT;
  uses interface GeneralIO;
  uses interface GpioInterrupt;
  uses interface I2CPacket as I2C;
  uses interface Resource as I2CResource;
  uses interface BusyWait;
}
implementation
{

  enum
  {
    S_IDLE,
    S_READING,
    S_WRITING
  };
  norace uint8_t m_state = S_IDLE;
  norace uint8_t m_buf[2];

  command error_t Init.init()
  {
    call CLKOUT.makeInput();
    call CLKOE.clr();
    call CLKOE.makeOutput();
    return SUCCESS;
  }

  command error_t Startup.init()
  {
    int i;
    // The RTC needs a maximum of 500ms to startup
    for (i = 0; i < 10; ++i)
    {
      call BusyWait.wait(50000UL);
    }
    return SUCCESS;
  }

  command void RTC.enableCLKOUT()
  {
    call CLKOE.set();
  }

  command void RTC.disableCLKOUT()
  {
    call CLKOE.clr();
  }

  command void RTC.enableInterrupt()
  {
    call GpioInterrupt.enableFallingEdge();
  }

  command void RTC.disableInterrupt()
  {
    call GpioInterrupt.disable();
  }

  command error_t RTC.readRegister(uint8_t reg)
  {
    if (m_state != S_IDLE)
    {	
      return EBUSY;
    }
    m_state = S_READING;
    m_buf[0] = reg;
    if (call I2CResource.request() == SUCCESS)
    {
      return SUCCESS;
    }
    else
    {
      m_state = S_IDLE;
      return FAIL;
    }
    return SUCCESS;
  }

  command error_t RTC.writeRegister(uint8_t reg, uint8_t value)
  { 
    if (m_state != S_IDLE)
    {
      return FAIL;
    }
    m_state = S_WRITING;
    atomic m_buf[0] = reg;
    atomic m_buf[1] = value;
    if (call I2CResource.request() == SUCCESS)
    {
      return SUCCESS;
    }
    else
    {
      m_state = S_IDLE;
      return FAIL;
    }
  }

  event void I2CResource.granted()
  {
    atomic
    {
      if (m_state == S_READING)
      {
        call I2C.write(I2C_START, RV8564_ADDR, 1, m_buf);
      }
      else if (m_state == S_WRITING)
      {
        call I2C.write(I2C_START | I2C_STOP, RV8564_ADDR, 2, m_buf);    
      }
    }
  }

  async event void GpioInterrupt.fired()
  {
    signal RTC.fired();
  }

  async event void I2C.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
  {
    atomic
    {
      if (m_state == S_READING)
      {
        call I2CResource.release();
        m_state = S_IDLE;
        signal RTC.readRegisterDone(error, m_buf[0], m_buf[1]);
      }
    }
  }

  async event void I2C.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
  {
    if (m_state == S_READING)
    {
      if (error != SUCCESS)
      {
        call I2CResource.release();
        m_state = S_IDLE;
        signal RTC.readRegisterDone(error, m_buf[0], 0);
        return;
      }
      else
      {
        call I2C.read(I2C_START | I2C_STOP, RV8564_ADDR, 1, m_buf + 1);
      }
    }
    else if (m_state == S_WRITING)
    {
      call I2CResource.release();
      m_state = S_IDLE;
      signal RTC.writeRegisterDone(error, m_buf[0]);
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/chips/rv8564/rv8564.h000077500000000000000000000077621207233610700231450ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * This file is for the Microcrystal RV-8564 Real-time Clock on the Mulle
 * platform.
 * 
 * @author: Gong Liang
 */

#ifndef __RV8564_H__
#define __RV8564_H__

/* constants */
#define RV8564_ADDR	0x51  //slave address   


#define RV8564_CS1    0x00
#define RV8564_CS2    0x01


/* Control/Status registers */
#define RV8564_CTR1 0x00         //00 Control status 1, 
                                 //Test1 0 Stop 0, Test 0 0 0
								 
#define RV8564_CTR2 0x01         //01 Control status 2,
                                 // 0 x  0 TI/TP, AF TF AIE TIE  
								 // TI/TP=1,INT pulses 
//Note that writing 1 to the alarm flags causes no change...0-1 is not applied.								 
								 
#define RV8564_SEC    0x02          //	
#define RV8564_MIN    0x03          //
#define RV8564_HOUR   0x04          //
#define RV8564_DAY    0x05          //
#define RV8564_WEEK   0x06          //
#define RV8564_MON    0x07          //
#define RV8564_YEAR   0x08          //

#define RV8564_MIN_ALARM    0x09    //
#define RV8564_HR_ALARM     0x0A    //
#define RV8564_DAY_ALARM    0x0B    //
#define RV8564_WK_ALARM     0x0C    //


#define RV8564_CLKF   0x0D       //FE x x x,  x x FD1 FD0
                                 //                0   0    32768 Hz          
                                 //                0   1    61024  Hz                 
                                 //                1   0     32 Hz                           
                                 //                1   1     1  Hz 




#define RV8564_TC     0x0E       //TE x x x,  x x TD1 TD0
                                 //                0   0    4096 Hz          
                                 //                0   1    64   Hz                 
                                 //                1   0     1 Sec                           
                                 //                1   1     1 Min   
								 								                         
#define RV8564_TIMER  0x0F       //128 64  32 16, 8 4 2 1

/*********** Initial setting of the RV_8564ram, Set it before using (debug only) ***********/
uint8_t RV_8564ram[16] = { 0x00, 0x13, 0x01, 0x01,
                           0x01, 0x01, 0x01, 0x01,
                           0x07, 0x80, 0x80, 0x80,
                           0x80, 0x83, 0x83, 1 };


#endif /* __RV8564_H__ */

tinyos-2.1.2+dfsg/tos/platforms/mulle/fix/000077500000000000000000000000001207233610700205015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/fix/At45dbP.nc000066400000000000000000000301641207233610700221720ustar00rootroot00000000000000// $Id: At45dbP.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

#include "crc.h"
#include "At45db.h"
#include "Timer.h"

/**
 * Private componenent for the Atmel's AT45DB HAL.
 *
 * @author David Gay
 */

module At45dbP @safe() {
  provides {
    interface Init;
    interface At45db;
  }
  uses {
    interface HplAt45db;
    interface BusyWait;
  }
}
implementation
{
#define CHECKARGS

#if 0
  uint8_t work[20];
  uint8_t woffset;

  void wdbg(uint8_t x) {
    work[woffset++] = x;
    if (woffset == sizeof work)
      woffset = 0;
  }
#else
#define wdbg(n)
#endif

  enum { // requests
    IDLE,
    R_READ,
    R_READCRC,
    R_WRITE,
    R_ERASE,
    R_COPY,
    R_SYNC,
    R_SYNCALL,
    R_FLUSH,
    R_FLUSHALL,
    BROKEN // Write failed. Fail all subsequent requests.
  };
  uint8_t request;
  at45pageoffset_t reqOffset, reqBytes;
  uint8_t * COUNT_NOK(reqBytes) reqBuf;
  at45page_t reqPage;

  enum {
    P_READ,
    P_READCRC,
    P_WRITE,
    P_FLUSH,
    P_FILL,
    P_ERASE,
    P_COMPARE,
    P_COMPARE_CHECK
  };
  
  struct {
    at45page_t page;
    bool busy : 1;
    bool clean : 1;
    bool erased : 1;
    uint8_t unchecked : 2;
  } buffer[2];
  uint8_t selected; // buffer used by the current op
  uint8_t checking;
  bool flashBusy;

  // Select a command for the current buffer
#define OPN(n, name) ((n) ? name ## 1 : name ## 2)
#define OP(name) OPN(selected, name)

  command error_t Init.init() {
    request = IDLE;
    flashBusy = TRUE;
      
    // pretend we're on an invalid non-existent page
    buffer[0].page = buffer[1].page = AT45_MAX_PAGES;
    buffer[0].busy = buffer[1].busy = FALSE;
    buffer[0].clean = buffer[1].clean = TRUE;
    buffer[0].unchecked = buffer[1].unchecked = 0;
    buffer[0].erased = buffer[1].erased = FALSE;

    return SUCCESS;
  }
  
  void flashIdle() {
    flashBusy = buffer[0].busy = buffer[1].busy = FALSE;
  }

  void requestDone(error_t result, uint16_t computedCrc, uint8_t newState);
  void handleRWRequest();

  task void taskSuccess() {
    requestDone(SUCCESS, 0, IDLE);
  }
  task void taskFail() {
    requestDone(FAIL, 0, IDLE);
  }

  void checkBuffer(uint8_t buf) {
    if (flashBusy)
      {
	call HplAt45db.waitIdle();
	return;
      }
    call HplAt45db.compare(OPN(buf, AT45_C_COMPARE_BUFFER), buffer[buf].page);
    checking = buf;
  }

  void flushBuffer() {
    if (flashBusy)
      {
	call HplAt45db.waitIdle();
	return;
      }
    call HplAt45db.flush(buffer[selected].erased ?
			 OP(AT45_C_QFLUSH_BUFFER) :
			 OP(AT45_C_FLUSH_BUFFER), 
			 buffer[selected].page);
  }

  event void HplAt45db.waitIdleDone() {
    flashIdle();
    // Eager compare - this steals the current command
#if 0
    if ((buffer[0].unchecked || buffer[1].unchecked) &&
	cmdPhase != P_COMPARE)
      checkBuffer(buffer[0].unchecked ? 0 : 1);
    else
#endif
      handleRWRequest();
  }

  event void HplAt45db.waitCompareDone(bool ok) {
    flashIdle();

    if (ok)
      buffer[checking].unchecked = 0;
    else if (buffer[checking].unchecked < 2)
      buffer[checking].clean = FALSE;
    else
      {
	requestDone(FAIL, 0, BROKEN);
	return;
      }
    handleRWRequest();
  }

  event void HplAt45db.readDone() {
    requestDone(SUCCESS, 0, IDLE);
  }

  event void HplAt45db.writeDone() {
    buffer[selected].clean = FALSE;
    buffer[selected].unchecked = 0;
    requestDone(SUCCESS, 0, IDLE);
  }

  event void HplAt45db.crcDone(uint16_t crc) {
    requestDone(SUCCESS, crc, IDLE);
  }

  event void HplAt45db.flushDone() {
    flashBusy = TRUE;
    buffer[selected].clean = buffer[selected].busy = TRUE;
    buffer[selected].unchecked++;
    buffer[selected].erased = FALSE;
    handleRWRequest();
  }

  event void HplAt45db.compareDone() {
    flashBusy = TRUE;
    buffer[checking].busy = TRUE;
    // The 10us wait makes old mica motes (Atmega 103) happy, for
    // some mysterious reason (w/o this wait, the first compare
    // always fails, even though the compare after the rewrite
    // succeeds...)
    call BusyWait.wait(10);
    call HplAt45db.waitCompare();
  }

  event void HplAt45db.fillDone() {
    flashBusy = TRUE;
    buffer[selected].page = reqPage;
    buffer[selected].clean = buffer[selected].busy = TRUE;
    buffer[selected].erased = FALSE;
    handleRWRequest();
  }

  event void HplAt45db.eraseDone() {
    flashBusy = TRUE;
    // The buffer contains garbage, but we don't care about the state
    // of bits on this page anyway (if we do, we'll perform a 
    // subsequent write)
    buffer[selected].page = AT45_MAX_PAGES;
    buffer[selected].clean = TRUE;
    buffer[selected].erased = TRUE;
    requestDone(SUCCESS, 0, IDLE);
  }

  void syncOrFlushAll(uint8_t newReq);

  void handleRWRequest() {
    if (reqPage == buffer[selected].page)
      switch (request)
	{
	case R_ERASE:
	  switch (reqOffset)
	    {
	    case AT45_ERASE:
	      if (flashBusy)
		call HplAt45db.waitIdle();
	      else
		call HplAt45db.erase(AT45_C_ERASE_PAGE, reqPage);
	      break;
	    case AT45_PREVIOUSLY_ERASED:
	      // We believe the user...
	      buffer[selected].erased = TRUE;
	      /* Fallthrough */
	    case AT45_DONT_ERASE:
	      // The buffer contains garbage, but we don't care about the state
	      // of bits on this page anyway (if we do, we'll perform a 
	      // subsequent write)
	      buffer[selected].clean = TRUE;
	      requestDone(SUCCESS, 0, IDLE);
	      break;
	    }
	  break;

	case R_COPY:
	  if (!buffer[selected].clean) // flush any modifications
	    flushBuffer();
	  else
	    {
	      // Just redesignate as destination page, and mark it dirty.
	      // It will eventually be flushed, completing the copy.
	      buffer[selected].page = reqOffset;
	      buffer[selected].clean = FALSE;
	      post taskSuccess();
	    }
	  break;

	case R_SYNC: case R_SYNCALL:
	  if (buffer[selected].clean && buffer[selected].unchecked)
	    {
	      checkBuffer(selected);
	      return;
	    }
	  /* fall through */
	case R_FLUSH: case R_FLUSHALL:
	  if (!buffer[selected].clean)
	    flushBuffer();
	  else if (request == R_FLUSH || request == R_SYNC)
	    post taskSuccess();
	  else
	    {
	      // Check for more dirty pages
	      uint8_t oreq = request;

	      request = IDLE;
	      syncOrFlushAll(oreq);
	    }
	  break;

	case R_READ:
	  if (buffer[selected].busy)
	    call HplAt45db.waitIdle();
	  else
	    call HplAt45db.readBuffer(OP(AT45_C_READ_BUFFER), reqOffset,
				      reqBuf, reqBytes);
	  break;

	case R_READCRC:
	  if (buffer[selected].busy)
	    call HplAt45db.waitIdle();
	  else
	    /* Hack: baseCrc was stored in reqBuf */
	    call HplAt45db.crc(OP(AT45_C_READ_BUFFER), 0, reqOffset, reqBytes,
			       (uint16_t)reqBuf);
	  break;

	case R_WRITE:
	  if (buffer[selected].busy)
	    call HplAt45db.waitIdle();
	  else
	    call HplAt45db.write(OP(AT45_C_WRITE_BUFFER), 0, reqOffset,
				 reqBuf, reqBytes);
	  break;
	}
    else if (!buffer[selected].clean)
      flushBuffer();
    else if (buffer[selected].unchecked)
      checkBuffer(selected);
    else
      {
	// just get the new page (except for erase)
	if (request == R_ERASE)
	  {
	    buffer[selected].page = reqPage;
	    handleRWRequest();
	  }
	else if (flashBusy)
	  call HplAt45db.waitIdle();
	else
	  call HplAt45db.fill(OP(AT45_C_FILL_BUFFER), reqPage);
      }
  }

  void requestDone(error_t result, uint16_t computedCrc, uint8_t newState) {
    uint8_t orequest = request;

    request = newState;
    switch (orequest)
      {
      case R_READ: signal At45db.readDone(result); break;
      case R_READCRC: signal At45db.computeCrcDone(result, computedCrc); break;
      case R_WRITE: signal At45db.writeDone(result); break;
      case R_SYNC: case R_SYNCALL: signal At45db.syncDone(result); break;
      case R_FLUSH: case R_FLUSHALL: signal At45db.flushDone(result); break;
      case R_ERASE: signal At45db.eraseDone(result); break;
      case R_COPY: signal At45db.copyPageDone(result); break;
      }
  }

  void newRequest(uint8_t req, at45page_t page, at45pageoffset_t offset,
		  void * COUNT_NOK(n) reqdata, at45pageoffset_t n) {
    request = req;

    reqBuf = NULL;
    reqBytes = n;
    reqBuf = reqdata;
    reqPage = page;
    reqOffset = offset;

    if (page == buffer[0].page)
      selected = 0;
    else if (page == buffer[1].page)
      selected = 1;
    else
      selected = !selected; // LRU with 2 buffers...

#ifdef CHECKARGS
    if (page >= AT45_MAX_PAGES || offset >= AT45_PAGE_SIZE ||
	n > AT45_PAGE_SIZE || offset + n > AT45_PAGE_SIZE)
      post taskFail();
    else
#endif
      handleRWRequest();
  }

  command void At45db.read(at45page_t page, at45pageoffset_t offset,
				   void *reqdata, at45pageoffset_t n) {
    newRequest(R_READ, page, offset, reqdata, n);
  }

  command void At45db.computeCrc(at45page_t page,
					at45pageoffset_t offset,
					at45pageoffset_t n,
					uint16_t baseCrc) {
    /* This is a hack (store crc in reqBuf), but it saves 2 bytes of RAM */
    newRequest(R_READCRC, page, offset, TCAST(uint8_t * COUNT(n), baseCrc), n);
  }

  command void At45db.write(at45page_t page, at45pageoffset_t offset,
				    void *reqdata, at45pageoffset_t n) {
    newRequest(R_WRITE, page, offset, reqdata, n);
  }


  command void At45db.erase(at45page_t page, uint8_t eraseKind) {
    newRequest(R_ERASE, page, eraseKind, NULL, 0);
  }

  command void At45db.copyPage(at45page_t from, at45page_t to) {
    /* Assumes at45pageoffset_t can hold an at45page_t. A little icky */
    newRequest(R_COPY, from, to, NULL, 0);
  }

  void syncOrFlush(at45page_t page, uint8_t newReq) {
    request = newReq;

    if (buffer[0].page == page)
      selected = 0;
    else if (buffer[1].page == page)
      selected = 1;
    else
      {
	post taskSuccess();
	return;
      }

    buffer[selected].unchecked = 0;
    handleRWRequest();
  }

  command void At45db.sync(at45page_t page) {
    syncOrFlush(page, R_SYNC);
  }

  command void At45db.flush(at45page_t page) {
    syncOrFlush(page, R_FLUSH);
  }

  void syncOrFlushAll(uint8_t newReq) {
    request = newReq;

    if (!buffer[0].clean)
      selected = 0;
    else if (!buffer[1].clean)
      selected = 1;
    else
      {
	post taskSuccess();
	return;
      }

    buffer[selected].unchecked = 0;
    handleRWRequest();
  }

  command void At45db.syncAll() {
    syncOrFlushAll(R_SYNCALL);
  }

  command void At45db.flushAll() {
    syncOrFlushAll(R_FLUSHALL);
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/fix/LogStorageP.nc000066400000000000000000000727661207233610700232330ustar00rootroot00000000000000/*
 * Copyright (c) 2000-2004 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

#include 
#include 

/**
 * Private component of the AT45DB implementation of the log storage
 * abstraction.
 *
 * @author: David Gay 
 * @author: Jonathan Hui 
 */

module LogStorageP @safe() {
  provides {
    interface LogRead[uint8_t logId];
    interface LogWrite[uint8_t logId];
  }
  uses {
    interface At45db;
    interface At45dbVolume[uint8_t logId];
    interface Resource[uint8_t logId];
  }
}
implementation
{
  /* Some design notes.

  - The logId's in the LogRead and LogWrites are shifted left by 1 bit.
    The low-order bit is 1 for circular logs, 0 for linear ones
    (see newRequest and endRequest, and the LogStorageC configuration)

  - Data is written sequentially to the pages of a log volume. Each page
    ends with a footer (nx_struct pageinfo) recording metadata on the
    current page:
    o a cookie
    o the "position" of the current page in the log (see below)
    o the offset of the last record on this page (i.e., the offset
      at which the last append ended) - only valid if flags & F_LASTVALID
    o flags: 
      x F_SYNC page was synchronised - data after lastRecordOffset
        is not log data; implies F_LASTVALID
      x F_CIRCLED this page is not from the first run through the log's
        pages (never set in linear logs)
      x F_LASTVALID not set if no record ended on this page
    o a CRC

  - "Positions" are stored in the metadata, used as cookies by
    currentOffset and seek, and stored in the wpos and rpos fields of the
    volume state structure.  They represent the number of bytes that
    writing has advanced in the log since the log was erased, with
    PAGE_SIZE added. Note that this is basically the number of bytes
    written, except that when a page is synchronised unused bytes in the
    page count towards increasing the position.

    As a result, on page p, the following equation holds:
      (metadata(p).pos - PAGE_SIZE) % volume-size == p * PAGE_SIZE
    (this also means that the "position" metadata field could be replaced
    by a count of the number of times writing has cycled through the log,
    reducing the metadata size)

    The PAGE_SIZE offset on positions is caused by Invariant 2 below: to
    ensure that Invariant 2 is respected, at flash erase time, we write a
    valid page with position 0 to the last block of the flash. As a result,
    the first writes to the flash, in page 0, are at "position" PAGE_SIZE.

  - This code is designed to deal with "one-at-a-time" failures (i.e.,
    the system will not modify any blocks after a previous failed
    write). This should allow recovery from:
    o arbitrary reboots
    o write failure (the underlying PageEEPROM shuts down after any
      write fails; all pages are flushed before moving on to the next
      page)
    It will not recover from arbitrary data corruption

  - When sync is called, the current write page is written to flash with an
    F_SYNC flag and writing continues on the next page (wasting on average
    half a flasg page)

  - We maintain the following invariants on log volumes, even in the face
    of the "one-at-a-time" failures described above:
    1) at least one of the first and last blocks are valid
    2) the last block, if valid, has the F_SYNC flag

  - Locating the log boundary page (the page with the greatest position):

    Invariant 1, the one-at-a-time failure model and the metadata position
    definition guarantees that the physical flash pages have the following
    properties:
      an initial set of V1 valid pages,
      followed by a set of I invalid pages,
      followed by a set of V2 valid pages
    with V1+i+V2=total-number-of-pages, and V1, V2, I >= 0
    Additionally, the position of all pages in V1 is greater than in V2,
    and consecutive pages in V1 (respectively V2) have greater positions
    than their predecessors.

    From this, it's possible to locate the log boundary page (the page with
    the greatest position) using the following algorithm:
    o let basepos=metadata(lastpage).pos, or 0 if the last page is invalid
    o locate (using a binary search) the page p with the largest position
      greater than basepos
      invalid pages can be assumed to have positions less than basepos
      if there is no such page p, let p = lastpage

    Once the log boundary page is known, we resume writing at the last
    page before p with a record boundary (Invariant 2, combined with
    limiting individual records to volumesize - PAGE_SIZE ensures there
    will be such a page).

  - The read pointer has a special "invalid" state which represents the
    current beginning of the log. In that state, LogRead.currentOffset()
    returns SEEK_BEGINNING rather than a regular position.

    The read pointer is invalidated:
    o at boot time
    o after the volume is erased
    o after the write position "catches up" with the read position
    o after a failed seek

    Reads from an invalid pointer:
    o start reading from the beginning of the flash if we are on the
      first run through the log volume
    o start reading at the first valid page after the write page with
      an F_LASTVALID flag; the read offset is set to the lastRecordOffset
      value
      if this page has the SYNC flag, we start at the beginning of the
      next page
  */
             

  enum {
    F_SYNC = 1,
    F_CIRCLED = 2,
    F_LASTVALID = 4
  };

  nx_struct pageinfo {
    nx_uint16_t magic;
    nx_uint32_t pos;
    nx_uint16_t lastRecordOffset;
    nx_uint8_t flags;
    nx_uint16_t crc;
  };

  enum {
    N = uniqueCount(UQ_LOG_STORAGE),
    NO_CLIENT = 0xff,
    PAGE_SIZE = AT45_PAGE_SIZE - sizeof(nx_struct pageinfo),
    PERSISTENT_MAGIC = 0x4256,
  };

  enum {
    R_IDLE,
    R_ERASE,
    R_APPEND,
    R_SYNC,
    R_READ,
    R_SEEK
  };

  enum {
    META_IDLE,
    META_LOCATEFIRST,
    META_LOCATE,
    META_LOCATELAST,
    META_SEEK,
    META_READ,
    META_WRITE
  };

  uint8_t client = NO_CLIENT;
  uint8_t metaState;
  bool recordsLost;
  at45page_t firstPage, lastPage;
  storage_len_t pos;
  nx_struct pageinfo metadata;

  struct {
    /* The latest request made for this client, and it's arguments */
    uint8_t request; 
    uint8_t *COUNT_NOK(len) buf;
    storage_len_t len;

    /* Log r/w positions */
    bool positionKnown : 1;
    bool circular : 1;
    bool circled : 1;
    bool rvalid : 1;
    uint32_t wpos;		/* Bytes since start of logging */
    at45page_t wpage;		/* Current write page */
    at45pageoffset_t woffset;	/* Offset on current write page */
    uint32_t rpos;		/* Bytes since start of logging */
    at45page_t rpage;		/* Current read page */
    at45pageoffset_t roffset;	/* Offset on current read page */
    at45pageoffset_t rend;	/* Last valid offset on current read page */
  } s[N];

  at45page_t firstVolumePage() {
    return call At45dbVolume.remap[client](0);
  }

  at45page_t npages() {
    return call At45dbVolume.volumeSize[client]();
  }

  at45page_t lastVolumePage() {
    return call At45dbVolume.remap[client](npages());
  }

  void setWritePage(at45page_t page) {
    if (s[client].circular && page == lastVolumePage())
      {
	s[client].circled = TRUE;
	page = firstVolumePage();
      }
    s[client].wpage = page;
    s[client].woffset = 0;
  }

  void invalidateReadPointer() {
    s[client].rvalid = FALSE;
  }

  void crcPage(at45page_t page) {
    call At45db.computeCrc(page, 0,
			   PAGE_SIZE + offsetof(nx_struct pageinfo, crc), 0);
  }

  void readMetadata(at45page_t page) {
    call At45db.read(page, PAGE_SIZE, &metadata, sizeof metadata);
  }

  void writeMetadata(at45page_t page) {
    call At45db.write(page, PAGE_SIZE, &metadata, sizeof metadata);
  }

  void wmetadataStart();

  void sync() {
    metadata.flags = F_SYNC | F_LASTVALID;
    metadata.lastRecordOffset = s[client].woffset;
    /* rend is now no longer the end of the page */
    if (s[client].rpage == s[client].wpage)
      s[client].rend = s[client].woffset;
    wmetadataStart();
  }

  /* ------------------------------------------------------------------ */
  /* Queue and initiate user requests					*/
  /* ------------------------------------------------------------------ */

  void eraseStart();
  void appendStart();
  void syncStart();
  void readStart();
  void locateStart();
  void rmetadataStart();
  void seekStart();

  void startRequest() {
    if (!s[client].positionKnown && s[client].request != R_ERASE)
      {
	locateStart();
	return;
      }

    metaState = META_IDLE;
    switch (s[client].request)
      {
      case R_ERASE: eraseStart(); break;
      case R_APPEND: appendStart(); break;
      case R_SYNC: syncStart(); break;
      case R_READ: readStart(); break;
      case R_SEEK: seekStart(); break;
      }
  }

  void endRequest(error_t ok) {
    uint8_t c = client;
    uint8_t request = s[c].request;
    storage_len_t actualLen = pos;
    void *ptr = s[c].buf;
    
    client = NO_CLIENT;
    s[c].request = R_IDLE;
    call Resource.release[c]();

    c = c << 1 | s[c].circular;
    switch (request)
      {
      case R_ERASE: signal LogWrite.eraseDone[c](ok); break;
      case R_APPEND: signal LogWrite.appendDone[c](ptr, actualLen, recordsLost, ok); break;
      case R_SYNC: signal LogWrite.syncDone[c](ok); break;
      case R_READ: signal LogRead.readDone[c](ptr, actualLen, ok); break;
      case R_SEEK: signal LogRead.seekDone[c](ok); break;
      }
  }

  /* Enqueue request and request the underlying flash */
  error_t newRequest(uint8_t newRequest, uint8_t id,
		     uint8_t *COUNT_NOK(length) buf, storage_len_t length) {
    s[id >> 1].circular = id & 1;
    id >>= 1;

    if (s[id].request != R_IDLE)
      return EBUSY;

    s[id].request = newRequest;
    s[id].buf = NULL;
    s[id].len = length;
    s[id].buf = buf;
    call Resource.request[id]();

    return SUCCESS;
  }

  event void Resource.granted[uint8_t id]() {
    client = id;
    pos = 0;
    startRequest();
  }

  command error_t LogWrite.append[uint8_t id](void* buf, storage_len_t length) {
    if (length > call LogRead.getSize[id]() - PAGE_SIZE)
      /* Writes greater than the volume size are invalid.
	 Writes equal to the volume size could break the log volume
	 invariant (see next comment).
	 Writes that span the whole volume could lead to problems
	 at boot time (no valid block with a record boundary).
	 Refuse them all. */
      return EINVAL;
    else
      return newRequest(R_APPEND, id, buf, length);
  }

  command storage_cookie_t LogWrite.currentOffset[uint8_t id]() {
    return s[id >> 1].wpos;
  }

  command error_t LogWrite.erase[uint8_t id]() {
    return newRequest(R_ERASE, id, NULL, 0);
  }

  command error_t LogWrite.sync[uint8_t id]() {
    return newRequest(R_SYNC, id, NULL, 0);
  }

  command error_t LogRead.read[uint8_t id](void* buf, storage_len_t length) {
    return newRequest(R_READ, id, buf, length);
  }

  command storage_cookie_t LogRead.currentOffset[uint8_t id]() {
    id >>= 1;
    return s[id].rvalid ? s[id].rpos : SEEK_BEGINNING;
  }

  command error_t LogRead.seek[uint8_t id](storage_cookie_t offset) {
    return newRequest(R_SEEK, id, TCAST(void *COUNT(offset), ((uint16_t)(offset >> 16))), offset);
  }

  command storage_len_t LogRead.getSize[uint8_t id]() {
    return call At45dbVolume.volumeSize[id >> 1]() * (storage_len_t)PAGE_SIZE;
  }

  /* ------------------------------------------------------------------ */
  /* Erase								*/
  /* ------------------------------------------------------------------ */

  void eraseMetadataDone() {
    /* Set write pointer to the beginning of the flash */
    s[client].wpos = PAGE_SIZE; // last page has offset 0 and is before us
    s[client].circled = FALSE;
    setWritePage(firstVolumePage()); 

    invalidateReadPointer();

    s[client].positionKnown = TRUE;
    endRequest(SUCCESS);
  }

  void eraseEraseDone() {
    if (firstPage == lastPage - 1)
      {
	/* We create a valid, synced last page (see invariants) */
	metadata.flags = F_SYNC | F_LASTVALID;
	metadata.lastRecordOffset = 0;
	setWritePage(firstPage);
	s[client].circled = FALSE;
	s[client].wpos = 0;
	wmetadataStart();
      }
    else
      call At45db.erase(firstPage++, AT45_ERASE);
  }

  void eraseStart() {
    s[client].positionKnown = FALSE; // in case erase fails
    firstPage = firstVolumePage();
    lastPage = lastVolumePage();
    eraseEraseDone();
  }

  /* ------------------------------------------------------------------ */
  /* Locate log boundaries						*/
  /* ------------------------------------------------------------------ */

  void locateLastRecord();

  void locateLastCrcDone(uint16_t crc) {
    if (crc != metadata.crc)
      {
	locateLastRecord();
	return;
      }

    /* We've found the last valid page with a record-end. Set up
       the read and write positions. */
    invalidateReadPointer();

    if (metadata.flags & F_SYNC) /* must start on next page */
      {
	/* We need to special case the empty log, as we don't want
	   to wrap around in the case of a full, non-circular log
	   with a sync on its last page. */
	if (firstPage == lastPage && !metadata.pos)
	  setWritePage(firstVolumePage());
	else
	  setWritePage(firstPage + 1);
	s[client].wpos = metadata.pos + PAGE_SIZE;
      }
    else
      {
	s[client].wpage = firstPage;
	s[client].woffset = metadata.lastRecordOffset;
	s[client].wpos = metadata.pos + metadata.lastRecordOffset;
      }

    s[client].circled = (metadata.flags & F_CIRCLED) != 0;
    if (s[client].circled && !s[client].circular) // oops
      {
	endRequest(FAIL);
	return;
      }

    /* And we can now proceed to the real request */
    s[client].positionKnown = TRUE;
    startRequest();
  }

  void locateLastReadDone() {
    if (metadata.magic == PERSISTENT_MAGIC && metadata.flags & F_LASTVALID)
      crcPage(firstPage);
    else
      locateLastRecord();
  }

  void locateLastRecord() {
    if (firstPage == lastPage)
      {
	/* We walked all the way back to the last page, and it's not 
	   valid. The log-volume invariant is not holding. Fail out. */
	endRequest(FAIL);
	return;
      }

    if (firstPage == firstVolumePage())
      firstPage = lastPage;
    else
      firstPage--;

    readMetadata(firstPage);
  }

  void located() {
    metaState = META_LOCATELAST;
    /* firstPage is one after last valid page, but the last page with
       a record end may be some pages earlier. Search for it. */
    lastPage = lastVolumePage() - 1;
    locateLastRecord();
  }

  at45page_t locateCurrentPage() {
    return firstPage + ((lastPage - firstPage) >> 1);
  }

  void locateBinarySearch() {
    if (lastPage <= firstPage)
      located();
    else
      readMetadata(locateCurrentPage());
  }

  void locateGreaterThan() {
    firstPage = locateCurrentPage() + 1;
    locateBinarySearch();
  }

  void locateLessThan() {
    lastPage = locateCurrentPage();
    locateBinarySearch();
  }

  void locateCrcDone(uint16_t crc) {
    if (crc == metadata.crc)
      {
	s[client].wpos = metadata.pos;
	locateGreaterThan();
      }
    else
      locateLessThan();
  }

  void locateReadDone() {
    if (metadata.magic == PERSISTENT_MAGIC && s[client].wpos < metadata.pos)
      crcPage(locateCurrentPage());
    else
      locateLessThan();
  }

  void locateFirstCrcDone(uint16_t crc) {
    if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc)
      s[client].wpos = metadata.pos;
    else
      s[client].wpos = 0;

    metaState = META_LOCATE;
    locateBinarySearch();
  }

  void locateFirstReadDone() {
    crcPage(lastPage);
  }

  /* Locate log beginning and ending. See description at top of file. */
  void locateStart() {
    metaState = META_LOCATEFIRST;
    firstPage = firstVolumePage();
    lastPage = lastVolumePage() - 1;
    readMetadata(lastPage);
  }

  /* ------------------------------------------------------------------ */
  /* Append								*/
  /* ------------------------------------------------------------------ */

  void appendContinue() {
    uint8_t *buf = s[client].buf + pos;
    at45pageoffset_t offset = s[client].woffset, count;
    storage_len_t len = s[client].len - pos;
    
    if (len == 0)
      {
	endRequest(SUCCESS);
	return;
      }

    if (s[client].wpage == lastVolumePage())
      {
	/* We reached the end of a linear log */
	endRequest(ESIZE);
	return;
      }

    if (offset + len <= PAGE_SIZE)
      count = len;
    else
      count = PAGE_SIZE - offset;

    s[client].wpos += count;
    s[client].woffset += count;
    pos += count;

    /* We normally lose data at the point we make the first write to a
       page in a log that has circled. */
    if (offset == 0 && s[client].circled)
      recordsLost = TRUE;

    call At45db.write(s[client].wpage, offset, buf, count);
  }
  
  void appendWriteDone() {
    if (s[client].woffset == PAGE_SIZE) /* Time to write metadata */
      wmetadataStart();
    else
      endRequest(SUCCESS);
  }

  void appendMetadataDone() { // metadata of previous page flushed
    /* Setup metadata in case we overflow this page too */
    metadata.flags = 0;
    appendContinue();
  }

  void appendSyncDone() {
    s[client].wpos = metadata.pos + PAGE_SIZE;
    appendStart();
  }

  void appendStart() {
    storage_len_t len = s[client].len - pos;
    storage_len_t vlen = (storage_len_t)npages() * PAGE_SIZE;

    recordsLost = FALSE;

    /* If request would span the end of the flash, sync, to maintain the
       invariant that the last flash page is synced and that either
       the first or last pages are valid.

       Note that >= in the if below means we won't write a record that
       would end on the last byte of the last page, as this would mean that
       we would not sync the last page, breaking the log volume
       invariant */
    if ((s[client].wpos - PAGE_SIZE) % vlen >= vlen - len)
      sync();
    else
      {
	/* Set lastRecordOffset in case we need to write metadata (see
	   wmetadataStart) */
	metadata.lastRecordOffset = s[client].woffset;
	metadata.flags = F_LASTVALID;
	appendContinue();
      }
  }

  /* ------------------------------------------------------------------ */
  /* Sync								*/
  /* ------------------------------------------------------------------ */

  void syncStart() {
    if (s[client].woffset == 0) /* we can't lose any writes */
      endRequest(SUCCESS);
    else
      sync();
  }

  void syncMetadataDone() {
    /* Write position reflect the absolute position in the flash, not
       user-bytes written. So update wpos to reflect sync effects. */
    s[client].wpos = metadata.pos + PAGE_SIZE;
    endRequest(SUCCESS);
  }

  /* ------------------------------------------------------------------ */
  /* Write block metadata						*/
  /* ------------------------------------------------------------------ */

  void wmetadataStart() {
    /* The caller ensures that metadata.flags (except F_CIRCLED) and
       metadata.lastRecordOffset are set correctly. */
    metaState = META_WRITE;
    firstPage = s[client].wpage; // remember page to commit
    metadata.pos = s[client].wpos - s[client].woffset;
    metadata.magic = PERSISTENT_MAGIC;
    if (s[client].circled)
      metadata.flags |= F_CIRCLED;

    call At45db.computeCrc(firstPage, 0, PAGE_SIZE, 0);

    /* We move to the next page now. If writing the metadata fails, we'll
       simply leave the invalid page in place. Trying to recover seems
       complicated, and of little benefit (note that in practice, At45dbC
       shuts down after a failed write, so nothing is really going to
       happen after that anyway). */
    setWritePage(s[client].wpage + 1);

    /* Invalidate read pointer if we reach it's page */
    if (s[client].wpage == s[client].rpage)
      invalidateReadPointer();
  }

  void wmetadataCrcDone(uint16_t crc) {
    uint8_t i, *md;

    // Include metadata in crc
    md = (uint8_t *)&metadata;
    for (i = 0; i < offsetof(nx_struct pageinfo, crc); i++)
      crc = crcByte(crc, md[i]);
    metadata.crc = crc;

    // And save it
    writeMetadata(firstPage);
  }

  void wmetadataWriteDone() {
    metaState = META_IDLE;
    if (metadata.flags & F_SYNC)
      call At45db.sync(firstPage);
    else
      call At45db.flush(firstPage);
  }

  /* ------------------------------------------------------------------ */
  /* Read 								*/
  /* ------------------------------------------------------------------ */

  void readContinue() {
    uint8_t *buf = s[client].buf + pos;
    at45pageoffset_t offset = s[client].roffset, count;
    at45pageoffset_t end = s[client].rend;
    storage_len_t len = s[client].len - pos;
    
    if (len == 0)
      {
	endRequest(SUCCESS);
	return;
      }

    if (!s[client].rvalid)
      {
	if (s[client].circled)
	  /* Find a valid page after wpage, skipping invalid pages */
	  s[client].rpage = s[client].wpage;
	else
	  {
	    /* resume reading at the beginning of the first page */
	    s[client].rvalid = TRUE;
	    s[client].rpage = lastVolumePage() - 1;
	  }

	rmetadataStart();
	return;
      }

    if (s[client].rpage == s[client].wpage)
      end = s[client].woffset;

    if (offset == end)
      {
	if ((s[client].rpage + 1 == lastVolumePage() && !s[client].circular) ||
	    s[client].rpage == s[client].wpage)
	  endRequest(SUCCESS); // end of log
	else
	  rmetadataStart();
	return;
      }

    if (offset + len <= end)
      count = len;
    else
      count = end - offset;

    pos += count;
    s[client].rpos += count;
    s[client].roffset = offset + count;

    call At45db.read(s[client].rpage, offset, buf, count);
  }

  void readStart() {
    readContinue();
  }

  /* ------------------------------------------------------------------ */
  /* Read block metadata						*/
  /* ------------------------------------------------------------------ */

  void continueReadAt(at45pageoffset_t roffset) {
    /* Resume reading at firstPage whose metadata is currently available
       in the metadata variable */
    metaState = META_IDLE;
    s[client].rpos = metadata.pos + roffset;
    s[client].rpage = firstPage;
    s[client].roffset = roffset;
    s[client].rend =
      metadata.flags & F_SYNC ? metadata.lastRecordOffset : PAGE_SIZE;
    s[client].rvalid = TRUE;
    readContinue();
  }

  void rmetadataContinue() {
    if (++firstPage == lastVolumePage())
      firstPage = firstVolumePage();
    if (firstPage == s[client].wpage)
      if (!s[client].rvalid)
	/* We cannot find a record boundary to start at (we've just
	   walked through the whole log...). Give up. */
	endRequest(SUCCESS);
      else
	{
	  /* The current write page has no metadata yet, so we fake it */
	  metadata.flags = 0;
	  metadata.pos = s[client].wpos - s[client].woffset;
	  continueReadAt(0);
	}
    else
      readMetadata(firstPage);
  }

  void rmetadataReadDone() {
    if (metadata.magic == PERSISTENT_MAGIC)
      crcPage(firstPage);
    else
      endRequest(SUCCESS);
  }

  void rmetadataCrcDone(uint16_t crc) {
    if (!s[client].rvalid)
      if (crc == metadata.crc && metadata.flags & F_LASTVALID)
	continueReadAt(metadata.lastRecordOffset);
      else
	rmetadataContinue();
    else 
      if (crc == metadata.crc)
	continueReadAt(0);
      else
	endRequest(SUCCESS);
  }

  void rmetadataStart() {
    metaState = META_READ;
    firstPage = s[client].rpage;
    rmetadataContinue();
  }

  /* ------------------------------------------------------------------ */
  /* Seek.								*/
  /* ------------------------------------------------------------------ */

  void seekCrcDone(uint16_t crc) {
    if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc &&
	metadata.pos == s[client].rpos - s[client].roffset)
      {
	s[client].rvalid = TRUE;
	if (metadata.flags & F_SYNC)
	  s[client].rend = metadata.lastRecordOffset;
      }
    endRequest(SUCCESS);
  }

  void seekReadDone() {
    crcPage(s[client].rpage);
  }

  /* Move to position specified by cookie. */
  void seekStart() {
    uint32_t offset = (uint32_t)(uint16_t)s[client].buf << 16 | s[client].len;

    invalidateReadPointer(); // default to beginning of log

    /* The write positions are offset by PAGE_SIZE (see emptyLog) */

    if (offset == SEEK_BEGINNING)
      offset = PAGE_SIZE;

    if (offset > s[client].wpos || offset < PAGE_SIZE)
      {
	endRequest(EINVAL);
	return;
      }

    /* Cookies are just flash positions which continue incrementing as
       you circle around and around. So we can just check the requested
       page's metadata.pos field matches the cookie's value */
    s[client].rpos = offset;
    s[client].roffset = (offset - PAGE_SIZE) % PAGE_SIZE;
    s[client].rpage = firstVolumePage() + ((offset - PAGE_SIZE) / PAGE_SIZE) % npages();
    s[client].rend = PAGE_SIZE; // default to no sync flag

    // The last page's metadata isn't written to flash yet. Special case it.
    if (s[client].rpage == s[client].wpage)
      {
	/* If we're seeking within the current write page, just go there.
	   Otherwise, we're asking for an old version of the current page
	   so just keep the invalidated read pointer, i.e., read from
	   the beginning. */
	if (offset >= s[client].wpos - s[client].woffset)
	  s[client].rvalid = TRUE;
	endRequest(SUCCESS);
      }
    else
      {
	metaState = META_SEEK;
	readMetadata(s[client].rpage);
      }
  }

  /* ------------------------------------------------------------------ */
  /* Dispatch HAL operations to current user op				*/
  /* ------------------------------------------------------------------ */

  event void At45db.eraseDone(error_t error) {
    if (client != NO_CLIENT)
      if (error != SUCCESS)
	endRequest(FAIL);
      else
	eraseEraseDone();
  }

  event void At45db.writeDone(error_t error) {
    if (client != NO_CLIENT)
      if (error != SUCCESS)
	endRequest(FAIL);
      else
	switch (metaState)
	  {
	  case META_WRITE: wmetadataWriteDone(); break;
	  case META_IDLE: appendWriteDone(); break;
	  }
  }

  event void At45db.syncDone(error_t error) {
    if (client != NO_CLIENT)
      if (error != SUCCESS)
	endRequest(FAIL);
      else switch (s[client].request)
	{
	case R_ERASE: eraseMetadataDone(); break;
	case R_APPEND: appendSyncDone(); break;
	case R_SYNC: syncMetadataDone(); break;
	}
  }

  event void At45db.flushDone(error_t error) {
    if (client != NO_CLIENT)
      if (error != SUCCESS)
	endRequest(FAIL);
      else
	appendMetadataDone();
  }

  event void At45db.readDone(error_t error) {
    if (client != NO_CLIENT)
      if (error != SUCCESS)
	endRequest(FAIL);
      else
	switch (metaState)
	  {
	  case META_LOCATEFIRST: locateFirstReadDone(); break;
	  case META_LOCATE: locateReadDone(); break;
	  case META_LOCATELAST: locateLastReadDone(); break;
	  case META_SEEK: seekReadDone(); break;
	  case META_READ: rmetadataReadDone(); break;
	  case META_IDLE: readContinue(); break;
	  }					    
  }

  event void At45db.computeCrcDone(error_t error, uint16_t crc) {
    if (client != NO_CLIENT)
      if (error != SUCCESS)
	endRequest(FAIL);
      else
	switch (metaState)
	  {
	  case META_LOCATEFIRST: locateFirstCrcDone(crc); break;
	  case META_LOCATE: locateCrcDone(crc); break;
	  case META_LOCATELAST: locateLastCrcDone(crc); break;
	  case META_SEEK: seekCrcDone(crc); break;
	  case META_WRITE: wmetadataCrcDone(crc); break;
	  case META_READ: rmetadataCrcDone(crc); break;
	  }
  }

  event void At45db.copyPageDone(error_t error) { }

  default event void LogWrite.appendDone[uint8_t logId](void* buf, storage_len_t l, bool rLost, error_t error) { }
  default event void LogWrite.eraseDone[uint8_t logId](error_t error) { }
  default event void LogWrite.syncDone[uint8_t logId](error_t error) { }
  default event void LogRead.readDone[uint8_t logId](void* buf, storage_len_t l, error_t error) { }
  default event void LogRead.seekDone[uint8_t logId](error_t error) {}

  default command at45page_t At45dbVolume.remap[uint8_t logId](at45page_t volumePage) {return 0;}
  default command at45page_t At45dbVolume.volumeSize[uint8_t logId]() {return 0;}
  default async command error_t Resource.request[uint8_t logId]() {return SUCCESS;}
  default async command error_t Resource.release[uint8_t logId]() { return FAIL; }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/fix/README000066400000000000000000000042021207233610700213570ustar00rootroot00000000000000This folder contains fixes in system files and chips that are currently not committed to the source tree, are Mulle specific or doesn't have any good or general solution. Any file put in this folder should be commented in this file; the reason the file is here should be stated and a plan how to fix (be able to remove it from here) the problem should be outlined.

The files here need to be overlooked regularly to include changes made in the original file.

The intention is to never have any files in this folder and if a file is put in this folder there should be a very good reason for it!


------FILES------:

tos/chips/at45db/At45dbP.nc: After a erase is done the buffer should be invalidated in some way. In the fix the buffer page member is set to AT45_MAX_PAGES, because the indexes of the pages are 0-(AT45_MAX_PAGES-1) thus AT45_MAX_PAGES indicates an invalid page number. Have spoken to David Gay about this. No fix seems to be committed, commit it our selfs?

tos/chips/at45db/LogStorageP.nc: in struct pageinfo there is a member lastRecordOffset which is a uint8_t in the original file. Mulle and platforms using At45DB chips with 10 bit offset addresses need a larger storage unit than uint8_t and is thus changed to uint16_t. This should maybe be typedefed in every platform specific implementation of the at45db. We cant just change it to uint16_t because that would break backwards compatibility for old platforms. Have spoken with David Gay about this to, but nothing has happened.

tos/chips/rf230/RF230DriverHwAckP.nc/RF230DriverLayerP.nc: Because of the use of a software spi bus on Mulle the communication between the RF230 chip and Mulle is to slow to be able to start sending a packet before the whole packet has been uploaded. We are instead uploading the packet first to the RF230 and then triggering the actual send. This may screw up protocols that need very good timing. But not using this may result in packet shifting, meaning that only half the packet is sent first and the second half is sent with the next packet.
The next Mulle version will have a hardware spi connection between the radio and Mulle. Hopefully this will solve the problem.
tinyos-2.1.2+dfsg/tos/platforms/mulle/fix/RF230DriverHwAckP.nc000066400000000000000000000615351207233610700240030ustar00rootroot00000000000000/*
* Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Miklos Maroti
*/

#include 
#include 
#include 
#include 
#include 

module RF230DriverHwAckP
{
	provides
	{
		interface Init as PlatformInit @exactlyonce();
		interface Init as SoftwareInit @exactlyonce();

		interface RadioState;
		interface RadioSend;
		interface RadioReceive;
		interface RadioCCA;
		interface RadioPacket;

		interface PacketField as PacketTransmitPower;
		interface PacketField as PacketRSSI;
		interface PacketField as PacketTimeSyncOffset;
		interface PacketField as PacketLinkQuality;

		interface PacketAcknowledgements;
	}

	uses
	{
		interface GeneralIO as SELN;
		interface Resource as SpiResource;

		interface FastSpiByte;

		interface GeneralIO as SLP_TR;
		interface GeneralIO as RSTN;

		interface GpioCapture as IRQ;

		interface BusyWait;
		interface LocalTime;

		interface RF230DriverConfig as Config;

		interface PacketFlag as TransmitPowerFlag;
		interface PacketFlag as RSSIFlag;
		interface PacketFlag as TimeSyncFlag;

		interface PacketTimeStamp;

		interface Tasklet;
		interface RadioAlarm;

		interface PacketFlag as AckReceivedFlag;
		interface Ieee154PacketLayer;
		interface ActiveMessageAddress;

#ifdef RADIO_DEBUG
		interface DiagMsg;
#endif
	}
}

implementation
{
	rf230_header_t* getHeader(message_t* msg)
	{
		return ((void*)msg) + call Config.headerLength(msg);
	}

	void* getPayload(message_t* msg)
	{
		return ((void*)msg) + call RadioPacket.headerLength(msg);
	}

	rf230_metadata_t* getMeta(message_t* msg)
	{
		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
	}

/*----------------- STATE -----------------*/

	tasklet_norace uint8_t state;
	enum
	{
		STATE_P_ON = 0,
		STATE_SLEEP = 1,
		STATE_SLEEP_2_TRX_OFF = 2,
		STATE_TRX_OFF = 3,
		STATE_TRX_OFF_2_RX_ON = 4,
		STATE_RX_ON = 5,
		STATE_BUSY_TX_2_RX_ON = 6,
	};

	tasklet_norace uint8_t cmd;
	enum
	{
		CMD_NONE = 0,			// the state machine has stopped
		CMD_TURNOFF = 1,		// goto SLEEP state
		CMD_STANDBY = 2,		// goto TRX_OFF state
		CMD_TURNON = 3,			// goto RX_ON state
		CMD_TRANSMIT = 4,		// currently transmitting a message
		CMD_CCA = 6,			// performing clear chanel assesment
		CMD_CHANNEL = 7,		// changing the channel
		CMD_SIGNAL_DONE = 8,		// signal the end of the state transition
		CMD_DOWNLOAD = 9,		// download the received message
	};

	norace bool radioIrq;

	tasklet_norace uint8_t txPower;
	tasklet_norace uint8_t channel;

	tasklet_norace message_t* rxMsg;
	message_t rxMsgBuffer;

	uint16_t capturedTime;	// the current time when the last interrupt has occured

/*----------------- REGISTER -----------------*/

	inline void writeRegister(uint8_t reg, uint8_t value)
	{
		RADIO_ASSERT( call SpiResource.isOwner() );
		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );

		call SELN.clr();
		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_WRITE | reg);
		call FastSpiByte.splitReadWrite(value);
		call FastSpiByte.splitRead();
		call SELN.set();
	}

	inline uint8_t readRegister(uint8_t reg)
	{
		RADIO_ASSERT( call SpiResource.isOwner() );
		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );

		call SELN.clr();
		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_READ | reg);
		call FastSpiByte.splitReadWrite(0);
		reg = call FastSpiByte.splitRead();
		call SELN.set();

		return reg;
	}

/*----------------- ALARM -----------------*/

	enum
	{
		SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC),
		PLL_CALIBRATION_TIME = (uint16_t)(180 * RADIO_ALARM_MICROSEC),
		CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC),

		// 8 undocumented delay, 128 for CSMA, 16 for delay, 5*32 for preamble and SFD
		TX_SFD_DELAY = (uint16_t)((8 + 128 + 16 + 5*32) * RADIO_ALARM_MICROSEC),
		
		// 32 for frame length, 16 for delay
		RX_SFD_DELAY = (uint16_t)((32 + 16) * RADIO_ALARM_MICROSEC),
	};

	tasklet_async event void RadioAlarm.fired()
	{
		if( state == STATE_SLEEP_2_TRX_OFF )
			state = STATE_TRX_OFF;
		else if( state == STATE_TRX_OFF_2_RX_ON )
		{
			RADIO_ASSERT( cmd == CMD_TURNON || cmd == CMD_CHANNEL );

			state = STATE_RX_ON;
			cmd = CMD_SIGNAL_DONE;
		}
		else if( cmd == CMD_CCA )
		{
			uint8_t cca;

			RADIO_ASSERT( state == STATE_RX_ON );

			cmd = CMD_NONE;
			cca = readRegister(RF230_TRX_STATUS);

			RADIO_ASSERT( (cca & RF230_TRX_STATUS_MASK) == RF230_RX_AACK_ON );

			signal RadioCCA.done( (cca & RF230_CCA_DONE) ? ((cca & RF230_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL );
		}
		else
			RADIO_ASSERT(FALSE);

		// make sure the rest of the command processing is called
		call Tasklet.schedule();
	}

/*----------------- INIT -----------------*/

	command error_t PlatformInit.init()
	{
		call SELN.makeOutput();
		call SELN.set();
		call SLP_TR.makeOutput();
		call SLP_TR.clr();
		call RSTN.makeOutput();
		call RSTN.set();

		rxMsg = &rxMsgBuffer;

		return SUCCESS;
	}

	command error_t SoftwareInit.init()
	{
		// for powering up the radio
		return call SpiResource.request();
	}

	void initRadio()
	{
		uint16_t temp;

		call BusyWait.wait(510);

		call RSTN.clr();
		call SLP_TR.clr();
		call BusyWait.wait(6);
		call RSTN.set();

		writeRegister(RF230_TRX_CTRL_0, RF230_TRX_CTRL_0_VALUE);
		writeRegister(RF230_TRX_STATE, RF230_TRX_OFF);

		call BusyWait.wait(510);

		writeRegister(RF230_IRQ_MASK, RF230_IRQ_TRX_UR | RF230_IRQ_TRX_END );
		writeRegister(RF230_CCA_THRES, RF230_CCA_THRES_VALUE);
		writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | (RF230_DEF_RFPOWER & RF230_TX_PWR_MASK));

		txPower = RF230_DEF_RFPOWER & RF230_TX_PWR_MASK;
		channel = RF230_DEF_CHANNEL & RF230_CHANNEL_MASK;
		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);

		writeRegister(RF230_XAH_CTRL, 0);
		writeRegister(RF230_CSMA_SEED_1, 0);

		temp = call ActiveMessageAddress.amGroup();
		writeRegister(RF230_PAN_ID_0, temp);
		writeRegister(RF230_PAN_ID_1, temp >> 8);

		call SLP_TR.set();
		state = STATE_SLEEP;
	}

/*----------------- SPI -----------------*/

	event void SpiResource.granted()
	{
		call SELN.makeOutput();
		call SELN.set();

		if( state == STATE_P_ON )
		{
			initRadio();
			call SpiResource.release();
		}
		else
			call Tasklet.schedule();
	}

	bool isSpiAcquired()
	{
		if( call SpiResource.isOwner() )
			return TRUE;

		if( call SpiResource.immediateRequest() == SUCCESS )
		{
			call SELN.makeOutput();
			call SELN.set();

			return TRUE;
		}

		call SpiResource.request();
		return FALSE;
	}

/*----------------- CHANNEL -----------------*/

tasklet_async command uint8_t RadioState.getChannel()
	{
		return channel;
	}

	tasklet_async command error_t RadioState.setChannel(uint8_t c)
	{
		c &= RF230_CHANNEL_MASK;

		if( cmd != CMD_NONE )
			return EBUSY;
		else if( channel == c )
			return EALREADY;

		channel = c;
		cmd = CMD_CHANNEL;
		call Tasklet.schedule();

		return SUCCESS;
	}

	inline void changeChannel()
	{
		RADIO_ASSERT( cmd == CMD_CHANNEL );
		RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON );

		if( isSpiAcquired() && call RadioAlarm.isFree() )
		{
			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);

			if( state == STATE_RX_ON )
			{
				call RadioAlarm.wait(PLL_CALIBRATION_TIME);
				state = STATE_TRX_OFF_2_RX_ON;
			}
			else
				cmd = CMD_SIGNAL_DONE;
		}
	}

/*----------------- TURN ON/OFF -----------------*/

	inline void changeState()
	{
		if( (cmd == CMD_STANDBY || cmd == CMD_TURNON)
			&& state == STATE_SLEEP && call RadioAlarm.isFree() )
		{
			call SLP_TR.clr();

			call RadioAlarm.wait(SLEEP_WAKEUP_TIME);
			state = STATE_SLEEP_2_TRX_OFF;
		}
		else if( cmd == CMD_TURNON && state == STATE_TRX_OFF 
			&& isSpiAcquired() && call RadioAlarm.isFree() )
		{
			uint16_t temp;
	
			RADIO_ASSERT( ! radioIrq );

			readRegister(RF230_IRQ_STATUS); // clear the interrupt register
			call IRQ.captureRisingEdge();

			// setChannel was ignored in SLEEP because the SPI was not working, so do it here
			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);

			temp = call ActiveMessageAddress.amAddress();
			writeRegister(RF230_SHORT_ADDR_0, temp);
			writeRegister(RF230_SHORT_ADDR_1, temp >> 8);

			call RadioAlarm.wait(PLL_CALIBRATION_TIME);
			writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
			state = STATE_TRX_OFF_2_RX_ON;
		}
		else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) 
			&& state == STATE_RX_ON && isSpiAcquired() )
		{
			writeRegister(RF230_TRX_STATE, RF230_FORCE_TRX_OFF);

			call IRQ.disable();
			radioIrq = FALSE;

			state = STATE_TRX_OFF;
		}

		if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF )
		{
			call SLP_TR.set();
			state = STATE_SLEEP;
			cmd = CMD_SIGNAL_DONE;
		}
		else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF )
			cmd = CMD_SIGNAL_DONE;
	}

	tasklet_async command error_t RadioState.turnOff()
	{
		if( cmd != CMD_NONE )
			return EBUSY;
		else if( state == STATE_SLEEP )
			return EALREADY;

		cmd = CMD_TURNOFF;
		call Tasklet.schedule();

		return SUCCESS;
	}
	
	tasklet_async command error_t RadioState.standby()
	{
		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
			return EBUSY;
		else if( state == STATE_TRX_OFF )
			return EALREADY;

		cmd = CMD_STANDBY;
		call Tasklet.schedule();

		return SUCCESS;
	}

	tasklet_async command error_t RadioState.turnOn()
	{
		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
			return EBUSY;
		else if( state == STATE_RX_ON )
			return EALREADY;

		cmd = CMD_TURNON;
		call Tasklet.schedule();

		return SUCCESS;
	}

	default tasklet_async event void RadioState.done() { }

	task void changeAddress()
	{
		call Tasklet.suspend();

		if( isSpiAcquired() )
		{
			uint16_t temp = call ActiveMessageAddress.amAddress();
			writeRegister(RF230_SHORT_ADDR_0, temp);
			writeRegister(RF230_SHORT_ADDR_1, temp >> 8);
		}
		else
			post changeAddress();

		call Tasklet.resume();
	}

	async event void ActiveMessageAddress.changed()
	{
		post changeAddress();
	}

/*----------------- TRANSMIT -----------------*/

	tasklet_norace message_t* txMsg;

	tasklet_async command error_t RadioSend.send(message_t* msg)
	{
		uint16_t time;
		uint8_t length;
		uint8_t* data;
		uint8_t header;
		uint32_t time32;
		void* timesync;

		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq )
			return EBUSY;

		length = (call PacketTransmitPower.isSet(msg) ?
			call PacketTransmitPower.get(msg) : RF230_DEF_RFPOWER) & RF230_TX_PWR_MASK;

		if( length != txPower )
		{
			txPower = length;
			writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | txPower);
		}

		writeRegister(RF230_TRX_STATE, RF230_TX_ARET_ON);

		// do something useful, just to wait a little
		time32 = call LocalTime.get();
		timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0;

		// we have missed an incoming message in this short amount of time
		if( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) != RF230_TX_ARET_ON )
		{
			RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_BUSY_RX_AACK );

			writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
			return EBUSY;
		}
#ifndef RF230_SLOW_SPI_MULLE
#ifndef RF230_SLOW_SPI
		atomic
		{
			call SLP_TR.set();
			time = call RadioAlarm.getNow();
		}
		call SLP_TR.clr();
#endif
#endif

		RADIO_ASSERT( ! radioIrq );

		call SELN.clr();
		call FastSpiByte.splitWrite(RF230_CMD_FRAME_WRITE);

		data = getPayload(msg);
		length = getHeader(msg)->length;

		// length | data[0] ... data[length-3] | automatically generated FCS
		call FastSpiByte.splitReadWrite(length);

		// the FCS is atomatically generated (2 bytes)
		length -= 2;

		header = call Config.headerPreloadLength();
		if( header > length )
			header = length;

		length -= header;

		// first upload the header to gain some time
		do {
			call FastSpiByte.splitReadWrite(*(data++));
		}
		while( --header != 0 );
#ifndef RF230_SLOW_SPI_MULLE
#ifdef RF230_SLOW_SPI
		atomic
		{
			call SLP_TR.set();
			time = call RadioAlarm.getNow();
		}
		call SLP_TR.clr();
#endif
#else
		atomic
		{
			time = call RadioAlarm.getNow();
		}
#endif

		time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32);

		if( timesync != 0 )
			*(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32;

		while( length-- != 0 )
			call FastSpiByte.splitReadWrite(*(data++));

		// wait for the SPI transfer to finish
		call FastSpiByte.splitRead();
		
#ifdef RF230_SLOW_SPI_MULLE
		atomic
		{
			call SLP_TR.set();
		}
		call SLP_TR.clr();
#endif
		
		call SELN.set();

		/*
		 * There is a very small window (~1 microsecond) when the RF230 went 
		 * into PLL_ON state but was somehow not properly initialized because 
		 * of an incoming message and could not go into BUSY_TX. I think the
		 * radio can even receive a message, and generate a TRX_UR interrupt
		 * because of concurrent access, but that message probably cannot be
		 * recovered.
		 *
		 * TODO: this needs to be verified, and make sure that the chip is 
		 * not locked up in this case.
		 */

		// go back to RX_ON state when finished
		writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);

		if( timesync != 0 )
			*(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32;

		call PacketTimeStamp.set(msg, time32);

#ifdef RADIO_DEBUG_MESSAGES
		if( call DiagMsg.record() )
		{
			length = getHeader(msg)->length;

			call DiagMsg.chr('t');
			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
			call DiagMsg.uint16(call RadioAlarm.getNow());
			call DiagMsg.int8(length);
			call DiagMsg.hex8s(getPayload(msg), length - 2);
			call DiagMsg.send();
		}
#endif

		// wait for the TRX_END interrupt
		txMsg = msg;
		state = STATE_BUSY_TX_2_RX_ON;
		cmd = CMD_TRANSMIT;

		return SUCCESS;
	}

	default tasklet_async event void RadioSend.sendDone(error_t error) { }
	default tasklet_async event void RadioSend.ready() { }

/*----------------- CCA -----------------*/

	tasklet_async command error_t RadioCCA.request()
	{
		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() )
			return EBUSY;

		// see Errata B7 of the datasheet
		// writeRegister(RF230_TRX_STATE, RF230_PLL_ON);
		// writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);

		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_REQUEST | RF230_CCA_MODE_VALUE | channel);
		call RadioAlarm.wait(CCA_REQUEST_TIME);
		cmd = CMD_CCA;
		
		return SUCCESS;
	}

	default tasklet_async event void RadioCCA.done(error_t error) { }

/*----------------- RECEIVE -----------------*/

	inline void downloadMessage()
	{
		uint8_t length;
		bool crcValid = FALSE;

		call SELN.clr();
		call FastSpiByte.write(RF230_CMD_FRAME_READ);

		// read the length byte
		length = call FastSpiByte.write(0);

		// if correct length
		if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 )
		{
			uint8_t read;
			uint8_t* data;

			// initiate the reading
			call FastSpiByte.splitWrite(0);

			data = getPayload(rxMsg);
			getHeader(rxMsg)->length = length;

			// we do not store the CRC field
			length -= 2;

			read = call Config.headerPreloadLength();
			if( length < read )
				read = length;

			length -= read;

			do {
				*(data++) = call FastSpiByte.splitReadWrite(0);
			}
			while( --read != 0  );

			if( signal RadioReceive.header(rxMsg) )
			{
				while( length-- != 0 )
					*(data++) = call FastSpiByte.splitReadWrite(0);

				call FastSpiByte.splitReadWrite(0);	// two CRC bytes
				call FastSpiByte.splitReadWrite(0);

				call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitRead());

				// we should have no other incoming message or buffer underflow
				crcValid = ! radioIrq;
			}
		}

		call SELN.set();

		if( crcValid && call PacketTimeStamp.isValid(rxMsg) )
		{
			uint32_t time32 = call PacketTimeStamp.timestamp(rxMsg);
			length = getHeader(rxMsg)->length;

/*
 * If you hate floating point arithmetics and do not care of up to 400 microsecond time stamping errors,
 * then define RF230_HWACK_SLOPPY_TIMESTAMP, which will be significantly faster.
 */
#ifdef RF230_HWACK_SLOPPY_TIMESTAMP
			time32 -= (uint16_t)(RX_SFD_DELAY) + ((uint16_t)(length) << (RADIO_ALARM_MILLI_EXP - 5));
#else
			time32 -= (uint16_t)(RX_SFD_DELAY) + (uint16_t)(32.0 * RADIO_ALARM_MICROSEC * (uint16_t)length);
#endif

			call PacketTimeStamp.set(rxMsg, time32);
		}

#ifdef RADIO_DEBUG_MESSAGES
		if( call DiagMsg.record() )
		{
			length = getHeader(rxMsg)->length;

			call DiagMsg.chr('r');
			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
			call DiagMsg.uint16(call RadioAlarm.getNow());
			call DiagMsg.int8(crcValid ? length : -length);
			call DiagMsg.hex8s(getPayload(rxMsg), length - 2);
			call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1);
			call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0);
			call DiagMsg.send();
		}
#endif

		state = STATE_RX_ON;
		cmd = CMD_NONE;

		// signal only if it has passed the CRC check
		if( crcValid )
			rxMsg = signal RadioReceive.receive(rxMsg);
	}

/*----------------- IRQ -----------------*/

	async event void IRQ.captured(uint16_t time)
	{
		RADIO_ASSERT( ! radioIrq );

		atomic
		{
			capturedTime = time;
			radioIrq = TRUE;
		}

		call Tasklet.schedule();
	}

	void serviceRadio()
	{
		if( isSpiAcquired() )
		{
			uint16_t time;
			uint32_t time32;
			uint8_t irq;
			uint8_t temp;
			
			atomic time = capturedTime;
			radioIrq = FALSE;
			irq = readRegister(RF230_IRQ_STATUS);

#ifdef RADIO_DEBUG
			// TODO: handle this interrupt
			if( irq & RF230_IRQ_TRX_UR )
			{
				if( call DiagMsg.record() )
				{
					call DiagMsg.str("assert ur");
					call DiagMsg.uint16(call RadioAlarm.getNow());
					call DiagMsg.hex8(readRegister(RF230_TRX_STATUS));
					call DiagMsg.hex8(readRegister(RF230_TRX_STATE));
					call DiagMsg.hex8(irq);
					call DiagMsg.uint8(state);
					call DiagMsg.uint8(cmd);
					call DiagMsg.send();
				}
			}
#endif

			if( irq & RF230_IRQ_TRX_END )
			{
				if( cmd == CMD_TRANSMIT )
				{
					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );

					temp = readRegister(RF230_TRX_STATE) & RF230_TRAC_STATUS_MASK;

					if( call Ieee154PacketLayer.getAckRequired(txMsg) )
						call AckReceivedFlag.setValue(txMsg, temp != RF230_TRAC_NO_ACK);

					state = STATE_RX_ON;
					cmd = CMD_NONE;

					signal RadioSend.sendDone(temp != RF230_TRAC_CHANNEL_ACCESS_FAILURE ? SUCCESS : EBUSY);

					// TODO: we could have missed a received message
					RADIO_ASSERT( ! (irq & RF230_IRQ_RX_START) );
				}
				else if( cmd == CMD_NONE )
				{
					RADIO_ASSERT( state == STATE_RX_ON );

					if( irq == RF230_IRQ_TRX_END )
					{
						call PacketRSSI.set(rxMsg, readRegister(RF230_PHY_ED_LEVEL));

						// TODO: compensate for packet transmission time when downloading
						time32 = call LocalTime.get();
						time32 += (int16_t)(time) - (int16_t)(time32);
						call PacketTimeStamp.set(rxMsg, time32);
					}
					else
					{
						call PacketRSSI.clear(rxMsg);
						call PacketTimeStamp.clear(rxMsg);
					}

					cmd = CMD_DOWNLOAD;
				}
				else
					RADIO_ASSERT(FALSE);
			}
		}
	}

	default tasklet_async event bool RadioReceive.header(message_t* msg)
	{
		return TRUE;
	}

	default tasklet_async event message_t* RadioReceive.receive(message_t* msg)
	{
		return msg;
	}

/*----------------- TASKLET -----------------*/

	tasklet_async event void Tasklet.run()
	{
		if( radioIrq )
			serviceRadio();

		if( cmd != CMD_NONE )
		{
			if( cmd == CMD_DOWNLOAD )
				downloadMessage();
			else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON )
				changeState();
			else if( cmd == CMD_CHANNEL )
				changeChannel();
			
			if( cmd == CMD_SIGNAL_DONE )
			{
				cmd = CMD_NONE;
				signal RadioState.done();
			}
		}

		if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq )
			signal RadioSend.ready();

		if( cmd == CMD_NONE )
			call SpiResource.release();
	}

/*----------------- RadioPacket -----------------*/
	
	async command uint8_t RadioPacket.headerLength(message_t* msg)
	{
		return call Config.headerLength(msg) + sizeof(rf230_header_t);
	}

	async command uint8_t RadioPacket.payloadLength(message_t* msg)
	{
		return getHeader(msg)->length - 2;
	}

	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
	{
		RADIO_ASSERT( 1 <= length && length <= 125 );
		RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) );

		// we add the length of the CRC, which is automatically generated
		getHeader(msg)->length = length + 2;
	}

	async command uint8_t RadioPacket.maxPayloadLength()
	{
		RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf230_header_t) <= 125 );

		return call Config.maxPayloadLength() - sizeof(rf230_header_t);
	}

	async command uint8_t RadioPacket.metadataLength(message_t* msg)
	{
		return call Config.metadataLength(msg) + sizeof(rf230_metadata_t);
	}

	async command void RadioPacket.clear(message_t* msg)
	{
		// all flags are automatically cleared
	}

/*----------------- PacketTransmitPower -----------------*/

	async command bool PacketTransmitPower.isSet(message_t* msg)
	{
		return call TransmitPowerFlag.get(msg);
	}

	async command uint8_t PacketTransmitPower.get(message_t* msg)
	{
		return getMeta(msg)->power;
	}

	async command void PacketTransmitPower.clear(message_t* msg)
	{
		call TransmitPowerFlag.clear(msg);
	}

	async command void PacketTransmitPower.set(message_t* msg, uint8_t value)
	{
		call TransmitPowerFlag.set(msg);
		getMeta(msg)->power = value;
	}

/*----------------- PacketRSSI -----------------*/

	async command bool PacketRSSI.isSet(message_t* msg)
	{
		return call RSSIFlag.get(msg);
	}

	async command uint8_t PacketRSSI.get(message_t* msg)
	{
		return getMeta(msg)->rssi;
	}

	async command void PacketRSSI.clear(message_t* msg)
	{
		call RSSIFlag.clear(msg);
	}

	async command void PacketRSSI.set(message_t* msg, uint8_t value)
	{
		// just to be safe if the user fails to clear the packet
		call TransmitPowerFlag.clear(msg);

		call RSSIFlag.set(msg);
		getMeta(msg)->rssi = value;
	}

/*----------------- PacketTimeSyncOffset -----------------*/

	async command bool PacketTimeSyncOffset.isSet(message_t* msg)
	{
		return call TimeSyncFlag.get(msg);
	}

	async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
	{
		return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t);
	}

	async command void PacketTimeSyncOffset.clear(message_t* msg)
	{
		call TimeSyncFlag.clear(msg);
	}

	async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value)
	{
		// we do not store the value, the time sync field is always the last 4 bytes
		RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value );

		call TimeSyncFlag.set(msg);
	}

/*----------------- PacketLinkQuality -----------------*/

	async command bool PacketLinkQuality.isSet(message_t* msg)
	{
		return TRUE;
	}

	async command uint8_t PacketLinkQuality.get(message_t* msg)
	{
		return getMeta(msg)->lqi;
	}

	async command void PacketLinkQuality.clear(message_t* msg)
	{
	}

	async command void PacketLinkQuality.set(message_t* msg, uint8_t value)
	{
		getMeta(msg)->lqi = value;
	}

/*----------------- PacketAcknowledgements -----------------*/

	async command error_t PacketAcknowledgements.requestAck(message_t* msg)
	{
		call Ieee154PacketLayer.setAckRequired(msg, TRUE);

		return SUCCESS;
	}

	async command error_t PacketAcknowledgements.noAck(message_t* msg)
	{
		call Ieee154PacketLayer.setAckRequired(msg, FALSE);

		return SUCCESS;
	}

	async command bool PacketAcknowledgements.wasAcked(message_t* msg)
	{
		return call AckReceivedFlag.get(msg);
	}
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/fix/RF230DriverLayerP.nc000066400000000000000000000612601207233610700240550ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

#include 
#include 
#include 
#include 
#include 

module RF230DriverLayerP
{
	provides
	{
		interface Init as PlatformInit @exactlyonce();
		interface Init as SoftwareInit @exactlyonce();

		interface RadioState;
		interface RadioSend;
		interface RadioReceive;
		interface RadioCCA;
		interface RadioPacket;

		interface PacketField as PacketTransmitPower;
		interface PacketField as PacketRSSI;
		interface PacketField as PacketTimeSyncOffset;
		interface PacketField as PacketLinkQuality;
    interface LinkPacketMetadata;
	}

	uses
	{
		interface GeneralIO as SELN;
		interface Resource as SpiResource;

		interface FastSpiByte;

		interface GeneralIO as SLP_TR;
		interface GeneralIO as RSTN;

		interface GpioCapture as IRQ;

		interface BusyWait;
		interface LocalTime;

		interface RF230DriverConfig as Config;

		interface PacketFlag as TransmitPowerFlag;
		interface PacketFlag as RSSIFlag;
		interface PacketFlag as TimeSyncFlag;

		interface PacketTimeStamp;

		interface Tasklet;
		interface RadioAlarm;

#ifdef RADIO_DEBUG
		interface DiagMsg;
#endif
	}
}

implementation
{
	rf230_header_t* getHeader(message_t* msg)
	{
		return ((void*)msg) + call Config.headerLength(msg);
	}

	void* getPayload(message_t* msg)
	{
		return ((void*)msg) + call RadioPacket.headerLength(msg);
	}

	rf230_metadata_t* getMeta(message_t* msg)
	{
		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
	}

/*----------------- STATE -----------------*/

	tasklet_norace uint8_t state;
	enum
	{
		STATE_P_ON = 0,
		STATE_SLEEP = 1,
		STATE_SLEEP_2_TRX_OFF = 2,
		STATE_TRX_OFF = 3,
		STATE_TRX_OFF_2_RX_ON = 4,
		STATE_RX_ON = 5,
		STATE_BUSY_TX_2_RX_ON = 6,
		STATE_PLL_ON_2_RX_ON = 7,
	};

	tasklet_norace uint8_t cmd;
	enum
	{
		CMD_NONE = 0,			// the state machine has stopped
		CMD_TURNOFF = 1,		// goto SLEEP state
		CMD_STANDBY = 2,		// goto TRX_OFF state
		CMD_TURNON = 3,			// goto RX_ON state
		CMD_TRANSMIT = 4,		// currently transmitting a message
		CMD_RECEIVE = 5,		// currently receiving a message
		CMD_CCA = 6,			// performing clear chanel assesment
		CMD_CHANNEL = 7,		// changing the channel
		CMD_SIGNAL_DONE = 8,		// signal the end of the state transition
		CMD_DOWNLOAD = 9,		// download the received message
	};

	norace bool radioIrq;

	tasklet_norace uint8_t txPower;
	tasklet_norace uint8_t channel;

	tasklet_norace message_t* rxMsg;
	message_t rxMsgBuffer;

	uint16_t capturedTime;	// the current time when the last interrupt has occured

	tasklet_norace uint8_t rssiClear;
	tasklet_norace uint8_t rssiBusy;

/*----------------- REGISTER -----------------*/

	inline void writeRegister(uint8_t reg, uint8_t value)
	{
		RADIO_ASSERT( call SpiResource.isOwner() );
		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );

		call SELN.clr();
		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_WRITE | reg);
		call FastSpiByte.splitReadWrite(value);
		call FastSpiByte.splitRead();
		call SELN.set();
	}

	inline uint8_t readRegister(uint8_t reg)
	{
		RADIO_ASSERT( call SpiResource.isOwner() );
		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );

		call SELN.clr();
		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_READ | reg);
		call FastSpiByte.splitReadWrite(0);
		reg = call FastSpiByte.splitRead();
		call SELN.set();

		return reg;
	}

/*----------------- ALARM -----------------*/

	enum
	{
		SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC),
		CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC),

		TX_SFD_DELAY = (uint16_t)(176 * RADIO_ALARM_MICROSEC),
		RX_SFD_DELAY = (uint16_t)(8 * RADIO_ALARM_MICROSEC),
	};

	tasklet_async event void RadioAlarm.fired()
	{
		if( state == STATE_SLEEP_2_TRX_OFF )
			state = STATE_TRX_OFF;
		else if( cmd == CMD_CCA )
		{
			uint8_t cca;

			RADIO_ASSERT( state == STATE_RX_ON );

			cmd = CMD_NONE;
			cca = readRegister(RF230_TRX_STATUS);

			RADIO_ASSERT( (cca & RF230_TRX_STATUS_MASK) == RF230_RX_ON );

			signal RadioCCA.done( (cca & RF230_CCA_DONE) ? ((cca & RF230_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL );
		}
		else
			RADIO_ASSERT(FALSE);

		// make sure the rest of the command processing is called
		call Tasklet.schedule();
	}

/*----------------- INIT -----------------*/

	command error_t PlatformInit.init()
	{
		call SELN.makeOutput();
		call SELN.set();
		call SLP_TR.makeOutput();
		call SLP_TR.clr();
		call RSTN.makeOutput();
		call RSTN.set();

		rxMsg = &rxMsgBuffer;

		// these are just good approximates
		rssiClear = 0;
		rssiBusy = 90;

		return SUCCESS;
	}

	command error_t SoftwareInit.init()
	{
		// for powering up the radio
		return call SpiResource.request();
	}

	void initRadio()
	{
		call BusyWait.wait(510);

		call RSTN.clr();
		call SLP_TR.clr();
		call BusyWait.wait(6);
		call RSTN.set();

		writeRegister(RF230_TRX_CTRL_0, RF230_TRX_CTRL_0_VALUE);
		writeRegister(RF230_TRX_STATE, RF230_TRX_OFF);

		call BusyWait.wait(510);

		writeRegister(RF230_IRQ_MASK, RF230_IRQ_TRX_UR | RF230_IRQ_PLL_LOCK | RF230_IRQ_TRX_END | RF230_IRQ_RX_START);
		writeRegister(RF230_CCA_THRES, RF230_CCA_THRES_VALUE);
		writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | (RF230_DEF_RFPOWER & RF230_TX_PWR_MASK));

		txPower = RF230_DEF_RFPOWER & RF230_TX_PWR_MASK;
		channel = RF230_DEF_CHANNEL & RF230_CHANNEL_MASK;
		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);

		call SLP_TR.set();
		state = STATE_SLEEP;
	}

/*----------------- SPI -----------------*/

	event void SpiResource.granted()
	{
		call SELN.makeOutput();
		call SELN.set();

		if( state == STATE_P_ON )
		{
			initRadio();
			call SpiResource.release();
		}
		else
			call Tasklet.schedule();
	}

	bool isSpiAcquired()
	{
		if( call SpiResource.isOwner() )
			return TRUE;

		if( call SpiResource.immediateRequest() == SUCCESS )
		{
			call SELN.makeOutput();
			call SELN.set();

			return TRUE;
		}

		call SpiResource.request();
		return FALSE;
	}

/*----------------- CHANNEL -----------------*/

	tasklet_async command uint8_t RadioState.getChannel()
	{
		return channel;
	}

	tasklet_async command error_t RadioState.setChannel(uint8_t c)
	{
		c &= RF230_CHANNEL_MASK;

		if( cmd != CMD_NONE )
			return EBUSY;
		else if( channel == c )
			return EALREADY;

		channel = c;
		cmd = CMD_CHANNEL;
		call Tasklet.schedule();

		return SUCCESS;
	}

	inline void changeChannel()
	{
		RADIO_ASSERT( cmd == CMD_CHANNEL );
		RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON );

		if( isSpiAcquired() )
		{
			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);

			if( state == STATE_RX_ON )
				state = STATE_TRX_OFF_2_RX_ON;
			else
				cmd = CMD_SIGNAL_DONE;
		}
	}

/*----------------- TURN ON/OFF -----------------*/

	inline void changeState()
	{
		if( (cmd == CMD_STANDBY || cmd == CMD_TURNON)
			&& state == STATE_SLEEP && call RadioAlarm.isFree() )
		{
			call SLP_TR.clr();

			call RadioAlarm.wait(SLEEP_WAKEUP_TIME);
			state = STATE_SLEEP_2_TRX_OFF;
		}
		else if( cmd == CMD_TURNON && state == STATE_TRX_OFF && isSpiAcquired() )
		{
			RADIO_ASSERT( ! radioIrq );

			readRegister(RF230_IRQ_STATUS); // clear the interrupt register
			call IRQ.captureRisingEdge();

			// setChannel was ignored in SLEEP because the SPI was not working, so do it here
			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);

			writeRegister(RF230_TRX_STATE, RF230_RX_ON);
			state = STATE_TRX_OFF_2_RX_ON;
		}
		else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) 
			&& state == STATE_RX_ON && isSpiAcquired() )
		{
			writeRegister(RF230_TRX_STATE, RF230_FORCE_TRX_OFF);

			call IRQ.disable();
			radioIrq = FALSE;

			state = STATE_TRX_OFF;
		}

		if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF )
		{
			call SLP_TR.set();
			state = STATE_SLEEP;
			cmd = CMD_SIGNAL_DONE;
		}
		else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF )
			cmd = CMD_SIGNAL_DONE;
	}

	tasklet_async command error_t RadioState.turnOff()
	{
		if( cmd != CMD_NONE )
			return EBUSY;
		else if( state == STATE_SLEEP )
			return EALREADY;

		cmd = CMD_TURNOFF;
		call Tasklet.schedule();

		return SUCCESS;
	}
	
	tasklet_async command error_t RadioState.standby()
	{
		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
			return EBUSY;
		else if( state == STATE_TRX_OFF )
			return EALREADY;

		cmd = CMD_STANDBY;
		call Tasklet.schedule();

		return SUCCESS;
	}

	tasklet_async command error_t RadioState.turnOn()
	{
		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
			return EBUSY;
		else if( state == STATE_RX_ON )
			return EALREADY;

		cmd = CMD_TURNON;
		call Tasklet.schedule();

		return SUCCESS;
	}

	default tasklet_async event void RadioState.done() { }

/*----------------- TRANSMIT -----------------*/

	tasklet_async command error_t RadioSend.send(message_t* msg)
	{
		uint16_t time;
		uint8_t length;
		uint8_t* data;
		uint8_t header;
		uint32_t time32;
		void* timesync;

		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq )
			return EBUSY;

		length = (call PacketTransmitPower.isSet(msg) ?
			call PacketTransmitPower.get(msg) : RF230_DEF_RFPOWER) & RF230_TX_PWR_MASK;

		if( length != txPower )
		{
			txPower = length;
			writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | txPower);
		}

		if( call Config.requiresRssiCca(msg) 
				&& (readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK) > ((rssiClear + rssiBusy) >> 3) )
			return EBUSY;

		writeRegister(RF230_TRX_STATE, RF230_PLL_ON);

		// do something useful, just to wait a little
		time32 = call LocalTime.get();
		timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0;

		// we have missed an incoming message in this short amount of time
		if( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) != RF230_PLL_ON )
		{
			RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_BUSY_RX );

			state = STATE_PLL_ON_2_RX_ON;
			return EBUSY;
		}

#ifndef RF230_SLOW_SPI_MULLE
#ifndef RF230_SLOW_SPI
		atomic
		{
			call SLP_TR.set();
			time = call RadioAlarm.getNow();
		}
		call SLP_TR.clr();
#endif
#endif

		RADIO_ASSERT( ! radioIrq );

		call SELN.clr();
		call FastSpiByte.splitWrite(RF230_CMD_FRAME_WRITE);

		data = getPayload(msg);
		length = getHeader(msg)->length;

		// length | data[0] ... data[length-3] | automatically generated FCS
		call FastSpiByte.splitReadWrite(length);

		// the FCS is atomatically generated (2 bytes)
		length -= 2;

		header = call Config.headerPreloadLength();
		if( header > length )
			header = length;

		length -= header;

		// first upload the header to gain some time
		do {
			call FastSpiByte.splitReadWrite(*(data++));
		}
		while( --header != 0 );

#ifndef RF230_SLOW_SPI_MULLE
#ifdef RF230_SLOW_SPI
		atomic
		{
			call SLP_TR.set();
			time = call RadioAlarm.getNow();
		}
		call SLP_TR.clr();
#endif
#else
		atomic
		{
			time = call RadioAlarm.getNow();
		}
#endif

		time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32);

		if( timesync != 0 )
			*(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32;

		while( length-- != 0 )
			call FastSpiByte.splitReadWrite(*(data++));

		// wait for the SPI transfer to finish
		call FastSpiByte.splitRead();
#ifdef RF230_SLOW_SPI_MULLE
		atomic
		{
			call SLP_TR.set();
		}
		call SLP_TR.clr();
#endif
		call SELN.set();

		/*
		 * There is a very small window (~1 microsecond) when the RF230 went 
		 * into PLL_ON state but was somehow not properly initialized because 
		 * of an incoming message and could not go into BUSY_TX. I think the
		 * radio can even receive a message, and generate a TRX_UR interrupt
		 * because of concurrent access, but that message probably cannot be
		 * recovered.
		 *
		 * TODO: this needs to be verified, and make sure that the chip is 
		 * not locked up in this case.
		 */

		// go back to RX_ON state when finished
		writeRegister(RF230_TRX_STATE, RF230_RX_ON);

		if( timesync != 0 )
			*(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32;

		call PacketTimeStamp.set(msg, time32);

#ifdef RADIO_DEBUG_MESSAGES
		if( call DiagMsg.record() )
		{
			length = getHeader(msg)->length;

			call DiagMsg.chr('t');
			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
			call DiagMsg.uint16(call RadioAlarm.getNow());
			call DiagMsg.int8(length);
			call DiagMsg.hex8s(getPayload(msg), length - 2);
			call DiagMsg.send();
		}
#endif

		// wait for the TRX_END interrupt
		state = STATE_BUSY_TX_2_RX_ON;
		cmd = CMD_TRANSMIT;

		return SUCCESS;
	}

	default tasklet_async event void RadioSend.sendDone(error_t error) { }
	default tasklet_async event void RadioSend.ready() { }

/*----------------- CCA -----------------*/

	tasklet_async command error_t RadioCCA.request()
	{
		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() )
			return EBUSY;

		// see Errata B7 of the datasheet
		// writeRegister(RF230_TRX_STATE, RF230_PLL_ON);
		// writeRegister(RF230_TRX_STATE, RF230_RX_ON);

		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_REQUEST | RF230_CCA_MODE_VALUE | channel);
		call RadioAlarm.wait(CCA_REQUEST_TIME);
		cmd = CMD_CCA;
		
		return SUCCESS;
	}

	default tasklet_async event void RadioCCA.done(error_t error) { }

/*----------------- RECEIVE -----------------*/

	inline void downloadMessage()
	{
		uint8_t length;
		uint16_t crc;

		call SELN.clr();
		call FastSpiByte.write(RF230_CMD_FRAME_READ);

		// read the length byte
		length = call FastSpiByte.write(0);

		// if correct length
		if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 )
		{
			uint8_t read;
			uint8_t* data;

			// initiate the reading
			call FastSpiByte.splitWrite(0);

			data = getPayload(rxMsg);
			getHeader(rxMsg)->length = length;
			crc = 0;

			// we do not store the CRC field
			length -= 2;

			read = call Config.headerPreloadLength();
			if( length < read )
				read = length;

			length -= read;

			do {
				crc = RF230_CRCBYTE_COMMAND(crc, *(data++) = call FastSpiByte.splitReadWrite(0));
			}
			while( --read != 0  );

			if( signal RadioReceive.header(rxMsg) )
			{
				while( length-- != 0 )
					crc = RF230_CRCBYTE_COMMAND(crc, *(data++) = call FastSpiByte.splitReadWrite(0));

				crc = RF230_CRCBYTE_COMMAND(crc, call FastSpiByte.splitReadWrite(0));
				crc = RF230_CRCBYTE_COMMAND(crc, call FastSpiByte.splitReadWrite(0));

				call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitRead());
			}
			else
				crc = 1;
		}
		else
			crc = 1;

		call SELN.set();
		state = STATE_RX_ON;

#ifdef RADIO_DEBUG_MESSAGES
		if( call DiagMsg.record() )
		{
			length = getHeader(rxMsg)->length;

			call DiagMsg.chr('r');
			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
			call DiagMsg.uint16(call RadioAlarm.getNow());
			call DiagMsg.int8(crc == 0 ? length : -length);
			call DiagMsg.hex8s(getPayload(rxMsg), length - 2);
			call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1);
			call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0);
			call DiagMsg.send();
		}
#endif
		
		cmd = CMD_NONE;

		// signal only if it has passed the CRC check
		if( crc == 0 )
			rxMsg = signal RadioReceive.receive(rxMsg);
	}

/*----------------- IRQ -----------------*/

	async event void IRQ.captured(uint16_t time)
	{
		RADIO_ASSERT( ! radioIrq );

		atomic
		{
			capturedTime = time;
			radioIrq = TRUE;
		}

		call Tasklet.schedule();
	}

	void serviceRadio()
	{
		if( isSpiAcquired() )
		{
			uint16_t time;
			uint32_t time32;
			uint8_t irq;
			uint8_t temp;
			
			atomic time = capturedTime;
			radioIrq = FALSE;
			irq = readRegister(RF230_IRQ_STATUS);

#ifdef RADIO_DEBUG
			// TODO: handle this interrupt
			if( irq & RF230_IRQ_TRX_UR )
			{
				if( call DiagMsg.record() )
				{
					call DiagMsg.str("assert ur");
					call DiagMsg.uint16(call RadioAlarm.getNow());
					call DiagMsg.hex8(readRegister(RF230_TRX_STATUS));
					call DiagMsg.hex8(readRegister(RF230_TRX_STATE));
					call DiagMsg.hex8(irq);
					call DiagMsg.uint8(state);
					call DiagMsg.uint8(cmd);
					call DiagMsg.send();
				}
			}
#endif

#ifdef RF230_RSSI_ENERGY
			if( irq & RF230_IRQ_TRX_END )
			{
				if( irq == RF230_IRQ_TRX_END || 
					(irq == (RF230_IRQ_RX_START | RF230_IRQ_TRX_END) && cmd == CMD_NONE) )
					call PacketRSSI.set(rxMsg, readRegister(RF230_PHY_ED_LEVEL));
				else
					call PacketRSSI.clear(rxMsg);
			}
#endif

			if( irq & RF230_IRQ_PLL_LOCK )
			{
				if( cmd == CMD_TURNON || cmd == CMD_CHANNEL )
				{
					RADIO_ASSERT( state == STATE_TRX_OFF_2_RX_ON );

					state = STATE_RX_ON;
					cmd = CMD_SIGNAL_DONE;
				}
				else if( cmd == CMD_TRANSMIT )
				{
					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
				}
				else
					RADIO_ASSERT(FALSE);
			}

			if( irq & RF230_IRQ_RX_START )
			{
				if( cmd == CMD_CCA )
				{
					signal RadioCCA.done(FAIL);
					cmd = CMD_NONE;
				}

				if( cmd == CMD_NONE )
				{
					RADIO_ASSERT( state == STATE_RX_ON || state == STATE_PLL_ON_2_RX_ON );

					// the most likely place for busy channel, with no TRX_END interrupt
					if( irq == RF230_IRQ_RX_START )
					{
						temp = readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK;
						rssiBusy += temp - (rssiBusy >> 2);
#ifndef RF230_RSSI_ENERGY
						call PacketRSSI.set(rxMsg, temp);
					}
					else
					{
						call PacketRSSI.clear(rxMsg);
#endif
					}

					/*
					 * The timestamp corresponds to the first event which could not
					 * have been a PLL_LOCK because then cmd != CMD_NONE, so we must
					 * have received a message (and could also have received the 
					 * TRX_END interrupt in the mean time, but that is fine. Also,
					 * we could not be after a transmission, because then cmd = 
					 * CMD_TRANSMIT.
					 */
					if( irq == RF230_IRQ_RX_START ) // just to be cautious
					{
						time32 = call LocalTime.get();
						time32 += (int16_t)(time - RX_SFD_DELAY) - (int16_t)(time32);
						call PacketTimeStamp.set(rxMsg, time32);
					}
					else
						call PacketTimeStamp.clear(rxMsg);

					cmd = CMD_RECEIVE;
				}
				else
					RADIO_ASSERT( cmd == CMD_TURNOFF );
			}

			if( irq & RF230_IRQ_TRX_END )
			{
				if( cmd == CMD_TRANSMIT )
				{
					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );

					state = STATE_RX_ON;
					cmd = CMD_NONE;
					signal RadioSend.sendDone(SUCCESS);

					// TODO: we could have missed a received message
					RADIO_ASSERT( ! (irq & RF230_IRQ_RX_START) );
				}
				else if( cmd == CMD_RECEIVE )
				{
					RADIO_ASSERT( state == STATE_RX_ON || state == STATE_PLL_ON_2_RX_ON );

					if( state == STATE_PLL_ON_2_RX_ON )
					{
						RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_PLL_ON );

						writeRegister(RF230_TRX_STATE, RF230_RX_ON);
						state = STATE_RX_ON;
					}
					else
					{
						// the most likely place for clear channel (hope to avoid acks)
						rssiClear += (readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK) - (rssiClear >> 2);
					}

					cmd = CMD_DOWNLOAD;
				}
				else
					RADIO_ASSERT(FALSE);
			}
		}
	}

	default tasklet_async event bool RadioReceive.header(message_t* msg)
	{
		return TRUE;
	}

	default tasklet_async event message_t* RadioReceive.receive(message_t* msg)
	{
		return msg;
	}

/*----------------- TASKLET -----------------*/

	tasklet_async event void Tasklet.run()
	{
		if( radioIrq )
			serviceRadio();

		if( cmd != CMD_NONE )
		{
			if( cmd == CMD_DOWNLOAD )
				downloadMessage();
			else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON )
				changeState();
			else if( cmd == CMD_CHANNEL )
				changeChannel();
			
			if( cmd == CMD_SIGNAL_DONE )
			{
				cmd = CMD_NONE;
				signal RadioState.done();
			}
		}

		if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq )
			signal RadioSend.ready();

		if( cmd == CMD_NONE )
			call SpiResource.release();
	}

/*----------------- RadioPacket -----------------*/
	
	async command uint8_t RadioPacket.headerLength(message_t* msg)
	{
		return call Config.headerLength(msg) + sizeof(rf230_header_t);
	}

	async command uint8_t RadioPacket.payloadLength(message_t* msg)
	{
		return getHeader(msg)->length - 2;
	}

	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
	{
		RADIO_ASSERT( 1 <= length && length <= 125 );
		RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) );

		// we add the length of the CRC, which is automatically generated
		getHeader(msg)->length = length + 2;
	}

	async command uint8_t RadioPacket.maxPayloadLength()
	{
		RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf230_header_t) <= 125 );

		return call Config.maxPayloadLength() - sizeof(rf230_header_t);
	}

	async command uint8_t RadioPacket.metadataLength(message_t* msg)
	{
		return call Config.metadataLength(msg) + sizeof(rf230_metadata_t);
	}

	async command void RadioPacket.clear(message_t* msg)
	{
		// all flags are automatically cleared
	}

/*----------------- PacketTransmitPower -----------------*/

	async command bool PacketTransmitPower.isSet(message_t* msg)
	{
		return call TransmitPowerFlag.get(msg);
	}

	async command uint8_t PacketTransmitPower.get(message_t* msg)
	{
		return getMeta(msg)->power;
	}

	async command void PacketTransmitPower.clear(message_t* msg)
	{
		call TransmitPowerFlag.clear(msg);
	}

	async command void PacketTransmitPower.set(message_t* msg, uint8_t value)
	{
		call TransmitPowerFlag.set(msg);
		getMeta(msg)->power = value;
	}

/*----------------- PacketRSSI -----------------*/

	async command bool PacketRSSI.isSet(message_t* msg)
	{
		return call RSSIFlag.get(msg);
	}

	async command uint8_t PacketRSSI.get(message_t* msg)
	{
		return getMeta(msg)->rssi;
	}

	async command void PacketRSSI.clear(message_t* msg)
	{
		call RSSIFlag.clear(msg);
	}

	async command void PacketRSSI.set(message_t* msg, uint8_t value)
	{
		// just to be safe if the user fails to clear the packet
		call TransmitPowerFlag.clear(msg);

		call RSSIFlag.set(msg);
		getMeta(msg)->rssi = value;
	}

/*----------------- PacketTimeSyncOffset -----------------*/

	async command bool PacketTimeSyncOffset.isSet(message_t* msg)
	{
		return call TimeSyncFlag.get(msg);
	}

	async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
	{
		return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t);
	}

	async command void PacketTimeSyncOffset.clear(message_t* msg)
	{
		call TimeSyncFlag.clear(msg);
	}

	async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value)
	{
		// we do not store the value, the time sync field is always the last 4 bytes
		RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value );

		call TimeSyncFlag.set(msg);
	}

/*----------------- PacketLinkQuality -----------------*/

	async command bool PacketLinkQuality.isSet(message_t* msg)
	{
		return TRUE;
	}

	async command uint8_t PacketLinkQuality.get(message_t* msg)
	{
		return getMeta(msg)->lqi;
	}

	async command void PacketLinkQuality.clear(message_t* msg)
	{
	}

	async command void PacketLinkQuality.set(message_t* msg, uint8_t value)
	{
		getMeta(msg)->lqi = value;
	}
  /*----------------- LinkPacketMetadata -----------------*/
	async command bool LinkPacketMetadata.highChannelQuality(message_t* msg)
	{
		return call PacketLinkQuality.get(msg) > 200;
	}
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/hardware.h000077500000000000000000000045771207233610700217010ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/**
 * @author Henrik Makitaavola 
 */

#ifndef __HARDWARE_H__
#define __HARDWARE_H__

#define MAIN_CRYSTAL_SPEED 10 /*MHz*/
#define PLL_MULTIPLIER M16C60_PLL_2

#define RF230_SLOW_SPI_MULLE

#ifdef RF230_SLOW_SPI_MULLE
#warning You are using the RF230 driver with a Mulle specific software fix. If you are using some very timecritical network protocols these may not work as intended! \
You should not remove this fix unless you are totaly sure of what you are doing!
#endif

#ifdef ENABLE_STOP_MODE
#warning Stop mode enabled!
#include "pin_configuration.h"
#endif

#include "m16c60hardware.h" // Header file for the MCU

#endif  // __HARDWARE_H__


tinyos-2.1.2+dfsg/tos/platforms/mulle/i2c/000077500000000000000000000000001207233610700203705ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/i2c/MulleI2C.h000066400000000000000000000036121207233610700221170ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Henrik Makitaavola 
 */
#ifndef __MULLEI2C_H__
#define __MULLEI2C_H__

#define UQ_MULLE_I2C_2 "UQ_MULLE_I2C_2"

#endif // __MULLEI2C_H__
tinyos-2.1.2+dfsg/tos/platforms/mulle/i2c/MulleI2C2C.nc000066400000000000000000000047061207233610700224620ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The basic client abstraction of the I2C nr 2 on Mulle used
 * by the RTC and battery monitor and possible to be connected
 * from the external connector.
 * The device drivers should instantiate this configuration to ensure
 * exclusive access to the I2C bus.
 *
 * @author Henrik Makitaavola 
 */

#include "MulleI2C.h"
#include "I2C.h"
generic configuration MulleI2C2C()
{
  provides interface Resource;
  provides interface I2CPacket;
  provides interface ResourceDefaultOwner;
}
implementation
{
  enum
  {
    CLIENT_ID = unique(UQ_MULLE_I2C_2),
  };
  
  components MulleI2C2P as I2C; 
  Resource = I2C.Resource[CLIENT_ID];
  I2CPacket = I2C.I2CPacket[CLIENT_ID];
  ResourceDefaultOwner = I2C;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/i2c/MulleI2C2ControlP.nc000066400000000000000000000040521207233610700240320ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Initilizes the pullups on the I2C bus marked as nr 2 on Mulle.
 *
 * @author Henrik Makitaavola 
 */
module MulleI2C2ControlP
{
  provides interface Init;
  uses interface GeneralIO as Pullup;
}
implementation
{
  command error_t Init.init()
  {
    call Pullup.makeOutput();
    call Pullup.set();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/i2c/MulleI2C2P.nc000066400000000000000000000053231207233610700224730ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The wiring of the I2C bus nr 2 on Mulle and creation of it as a
 * shared resource.
 *
 * @author Henrik Makitaavola 
 */

#include "MulleI2C.h"
#include "I2C.h"
configuration MulleI2C2P
{
  provides interface Resource[uint8_t client];
  provides interface I2CPacket[uint8_t client];
  provides interface ResourceDefaultOwner;
}
implementation
{
  components HplM16c60GeneralIOC as IOs,
             new SharedI2CPacketC(UQ_MULLE_I2C_2),
             MulleI2C2ControlP,
             PlatformP,
             new AsyncStdControlPowerManagerC() as PowerManager,
             M16c60I2CC as I2Cs;

  Resource  = SharedI2CPacketC;
  I2CPacket = SharedI2CPacketC.I2CPacket;
  ResourceDefaultOwner = SharedI2CPacketC;
  SharedI2CPacketC -> I2Cs.I2CPacket2;

  // Init the bus
  MulleI2C2ControlP.Pullup -> IOs.PortP75;
  PowerManager.AsyncStdControl -> I2Cs.I2CPacket2Control;
  PowerManager.ResourceDefaultOwner -> SharedI2CPacketC;
  PlatformP.SubInit -> MulleI2C2ControlP;
}

tinyos-2.1.2+dfsg/tos/platforms/mulle/i2c/SharedI2CPacketC.nc000066400000000000000000000100341207233610700236470ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 2006 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Philip Levis
 */
 
/**
 * The configuration that takes a I2C bus with 7-bit addressing
 * and turns it into a shared abstraction.
 *
 * @author Henrik Makitaavola 
 */

#include "I2C.h"
generic configuration SharedI2CPacketC(char resourceName[])
{
  provides interface Resource[uint8_t client];
  provides interface I2CPacket[uint8_t client];
  provides interface ResourceDefaultOwner;
  
  uses interface I2CPacket as SubPacket;
}
implementation
{
  components new FcfsArbiterC(resourceName) as Arbiter;
  components new SharedI2CPacketP() as I2C;
    
  Resource  = I2C.Resource;
  I2CPacket = I2C.I2CPacket;
  ResourceDefaultOwner = Arbiter;
  
  I2C.SubResource -> Arbiter;
  I2C.SubPacket   = SubPacket;
}

tinyos-2.1.2+dfsg/tos/platforms/mulle/i2c/SharedI2CPacketP.nc000066400000000000000000000140071207233610700236700ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/*
 * Copyright (c) 2006 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Philip Levis
 */
 
/**
 * The module implements the logic when creating a I2C bus with 7-bit addressing
 * into a shared abstraction.
 *
 * @author Henrik Makitaavola 
 */
#include "I2C.h"
generic module SharedI2CPacketP()
{
  provides interface Resource[uint8_t client];
  provides interface I2CPacket[uint8_t client];
  uses interface Resource as SubResource[uint8_t];
  uses interface I2CPacket as SubPacket;
}
implementation
{
  enum
  {
    NO_CLIENT = 0xff
  };
  
  uint8_t currentClient = NO_CLIENT;

  async command error_t Resource.request[uint8_t id]()
  {
    return call SubResource.request[id]();
  }

  async command error_t Resource.immediateRequest[uint8_t id]()
  {
    error_t rval = call SubResource.immediateRequest[id]();
    if (rval == SUCCESS)
    {
      atomic currentClient = id;
    }
    return rval;
  }

  event void SubResource.granted[uint8_t id]()
  {
    atomic currentClient = id;
    signal Resource.granted[id]();
  }

  async command error_t Resource.release[uint8_t id]()
  {
    return call SubResource.release[id]();
  }

  async command bool Resource.isOwner[uint8_t id]()
  {
    return call SubResource.isOwner[id]();
  }
  
  async command error_t I2CPacket.write[uint8_t id](i2c_flags_t flags,
                                                        uint16_t addr,
                                                        uint8_t len,
                                                        uint8_t* data)
  {
    atomic
    {
      if (currentClient != id)
      {
	return FAIL;
      }
    }
    return call SubPacket.write(flags, addr, len, data);
  }
  
  async command error_t I2CPacket.read[uint8_t id](i2c_flags_t flags,
                                                       uint16_t addr,
                                                       uint8_t len,
                                                       uint8_t* data)
  {
    atomic
    {
      if (currentClient != id)
      {
	return FAIL;
      }
    }
    return call SubPacket.read(flags, addr, len, data);
  }

  default event void Resource.granted[uint8_t id]() {}

  async event void  SubPacket.readDone(
      error_t error, uint16_t addr, uint8_t length, uint8_t* data)
  {
    signal  I2CPacket.readDone[currentClient](error, addr, length, data);
  }

  async event void SubPacket.writeDone(
      error_t error, uint16_t addr, uint8_t length, uint8_t* data)
  {
    signal I2CPacket.writeDone[currentClient]( error, addr, length,  data);
  }

  default async event void  I2CPacket.readDone[uint8_t id](
      error_t error, uint16_t addr, uint8_t length, uint8_t* data) {  }

  default async event void I2CPacket.writeDone[uint8_t id](
      error_t error, uint16_t addr, uint8_t length, uint8_t* data) {  }

}
tinyos-2.1.2+dfsg/tos/platforms/mulle/i2c/SoftwareI2CPacketC.nc000066400000000000000000000165041207233610700242430ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "I2C.h"

/**
 * This module implements a software I2CPacket with 7-bit addressing.
 * The SDA and SCL pins must have pull-up resistors.
 *
 * This code was written with help from the I2C Wikipedia page:
 * http://en.wikipedia.org/wiki/I%C2%B2C
 * 
 * @param speed The number of micro seconds 
 * @author Henrik Makitaavola 
 */
generic module SoftwareI2CPacketC(int speed)
{
  provides interface I2CPacket;

  uses interface GeneralIO as SDA;
  uses interface GeneralIO as SCL;
  uses interface BusyWait;
}
implementation
{
  enum
  {
    S_IDLE,
    S_BUSY,      
  };

  uint8_t m_state = S_IDLE;
  uint16_t m_addr;
  uint8_t m_length;
  uint8_t* m_data;
  error_t m_error;
  bool m_read;

  uint8_t READSDA()
  {
    call SDA.makeInput();
    return call SDA.get();
  }

  uint8_t READSCL()
  {
    call SCL.makeInput();
    return call SCL.get();
  }

  void CLRSCL()
  {
    call SCL.clr();
    call SCL.makeOutput();
  }

  void CLRSDA()
  {
    call SDA.clr();
    call SDA.makeOutput();
  }

  void i2cDelay(uint16_t u) {
    call BusyWait.wait(u);
  }

  uint8_t i2cReadBit(void)
  {
    uint8_t bit;

    /* lets the slave drive data */
    READSDA();
    i2cDelay(speed/2);
    /* Clock stretching */
    while (READSCL() == 0);
    /* SCL is high, now data is valid */
    bit = READSDA();
    i2cDelay(speed/2);
    CLRSCL();
    return bit;
  }

  error_t i2cWriteBit(bool bit)
  {
    if (bit) 
      READSDA();
    else 
      CLRSDA();
    i2cDelay(speed/2);
    /* Clock stretching */
    while (READSCL() == 0);
    /* SCL is high, now data is valid */
    /* check that nobody is driving SDA */
    if (bit && READSDA() == 0)
      return FAIL;
    i2cDelay(speed/2);
    CLRSCL();
    return SUCCESS;
  }

  error_t i2cStartCond(void)
  {
    READSCL();
    READSDA();
    i2cDelay(speed/2);
    if (READSDA() == 0)
      return FAIL;

    /* SCL is high, set SDA from 1 to 0 */
    CLRSDA();
    i2cDelay(speed/2);
    CLRSCL();
    return SUCCESS;
  }

  error_t i2cStopCond(void)
  {
    /* set SDA to 0 */
    CLRSDA();
    i2cDelay(speed/2);

    /* Clock stretching */
    while (READSCL() == 0); /* Release SCL, wait for done */

    /* SCL is high, set SDA from 0 to 1 */
    i2cDelay(speed/2);
    READSDA(); /* Release SDA */

    /* Verify, give some time to settle first */
    i2cDelay(speed/2);
    if (READSDA() == 0)
      return FAIL;
    return SUCCESS;
  }

  error_t i2cTx(uint8_t byte)
  {
    uint8_t bit;
    uint8_t ack;
    error_t error = SUCCESS;

    for (bit = 0; bit < 8; bit++) {
      error = ecombine(error, i2cWriteBit(byte & 0x80));
      byte <<= 1;
    }

    // The ack bit is 0 for success
    if (!i2cReadBit())
    {
      return ecombine(error, SUCCESS);
    }
    else 
    {
      return FAIL;
    }
  }

  uint8_t i2cRx (bool nack)
  {
    uint8_t byte = 0;
    uint8_t bit;

    for (bit = 0; bit < 8; bit++) {
      byte <<= 1;
      byte |= i2cReadBit();
    }
    i2cWriteBit(nack);
    return byte;
  }

  task void signalTask()
  {
    uint16_t addr;
    uint8_t length;
    uint8_t* data;
    error_t error;
    bool read;
    atomic
    {
      addr = m_addr;
      length = m_length;
      data = m_data;
      error = m_error;
      m_state = S_IDLE;
      read = m_read;
    }
    if (read)
    {
      signal I2CPacket.readDone(error, addr, length,  data);
    }
    else
    {
      signal I2CPacket.writeDone(error, addr, length,  data);
    }
  }

  async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data)
  {
    uint8_t i;
    error_t error = SUCCESS;

    // Both I2C_STOP and I2C_ACK_END flags are not allowed at the same time.
    if ((flags & I2C_STOP) && (flags & I2C_ACK_END))
    {
      return EINVAL;
    }

    atomic
    {
      if (m_state == S_IDLE)
      {
        m_state = S_BUSY;
      }
      else
      {
        return EBUSY;
      }
    }
    atomic
    {
      if (flags & I2C_START)
      {
        error = ecombine(error, i2cStartCond());
        error = ecombine(error, i2cTx((addr<<1)|1)); 
      }

      // Only read data from the device if length is >0.
      // TODO(henrik): Should a data length of 0 be a invalid input?
      if (length > 0)
      {
        // Read the data from the device.
        for (i = 0; i < length-1; ++i)
        {
          data[i] = i2cRx(false);
        }
        if (flags & I2C_ACK_END)
        {
          data[length-1] = i2cRx(false);
        }
        else
        {
          data[length-1] = i2cRx(true);
        }
      }
      if (flags & I2C_STOP)
      {
        error = ecombine(error, i2cStopCond());
      }

      m_error = error;
      m_addr = addr;
      m_length = length;
      m_data = data;
      m_read = true;
    }
    post signalTask();

    return SUCCESS;
  }

  async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data)
  {
    uint8_t i;
    error_t error = SUCCESS;

    atomic
    {
      if (m_state == S_IDLE)
      {
        m_state = S_BUSY;
      }
      else
      {
        return EBUSY;
      }
    }
    atomic
    {
      if (flags & I2C_START)
      {
        error = ecombine(error, i2cStartCond());
      }

      error = ecombine(error, i2cTx(addr<<1));

      // Send the data to the device (stop on error).
      for (i = 0; error == SUCCESS && i < length; ++i)
      {
        error = ecombine(error, i2cTx(data[i]));
      }

      if (flags & I2C_STOP)
      {
        error = ecombine(error, i2cStopCond());
      }

      m_error = error;
      m_addr = addr;
      m_length = length;
      m_data = data;
      m_read = false;
    }
    post signalTask();
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/000077500000000000000000000000001207233610700204615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/AVccClientC.nc000066400000000000000000000043001207233610700230560ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Every component that intends to use AVcc on Mulle should create
 * an instance of this configuration and activate and deactivate
 * AVcc by the StdControl provided here.
 *
 * @author Henrik Makitaavola 
 */

#include "MulleAVcc.h"

generic configuration AVccClientC()
{
  provides interface StdControl;
}
implementation
{
  components AVccClientP;

  enum {
    CLIENT_ID = unique(AVCC_CLIENTS),
  };

  StdControl = AVccClientP.StdControl[CLIENT_ID];
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/AVccClientP.nc000066400000000000000000000042661207233610700231060ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Wiring for the shared AVcc StdControl.
 *
 * @author Henrik Makitaavola 
 */

#include "MulleAVcc.h"

configuration AVccClientP
{
  provides interface StdControl[uint8_t client];
}
implementation
{
  components new MultiUserStdControlC(AVCC_CLIENTS), AVccStdControlC,
             HplM16c60GeneralIOC as IOs;

  AVccStdControlC.AVccPin -> IOs.PortP76;
  MultiUserStdControlC -> AVccStdControlC.StdControl;
  StdControl = MultiUserStdControlC;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/AVccStdControlC.nc000066400000000000000000000046471207233610700237510ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Implementation of a StdControl for the AVcc on Mulle.
 *
 * @author Henrik Makitaavola 
 */

module AVccStdControlC
{
  provides interface StdControl;
  uses interface GeneralIO as AVccPin;
}
implementation
{
  enum
  {
    S_OFF,
    S_ON,
  };

  uint8_t m_state = S_OFF;

  command error_t StdControl.start()
  {
    if (m_state != S_OFF)
    {
      return EALREADY;
    }
    call AVccPin.makeOutput();
    call AVccPin.set();

    m_state = S_ON;
    return SUCCESS;
  }

  command error_t StdControl.stop()
  {
    if (m_state == S_OFF)
    {
      return EALREADY;
    }
    call AVccPin.makeOutput();
    call AVccPin.clr();
    
    m_state = S_OFF;
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/AdcReadC.nc000066400000000000000000000051641207233610700223770ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Generic configuration for creating a Read interface for a AD converter
 * on the Mulle platform. The Read interface provided will handle the 
 * turning on and off of the VRef pin provided by AVcc.
 *
 * For a example of use see tos/platform/mulle/DemoSensorC.nc.
 *
 * NOTE: The VRef pin can still be handled manually if needed by using
 *       the StdControl provided by AVccClientC.
 *
 * @author Henrik Makitaavola 
 */

generic configuration AdcReadC(uint8_t channel, uint8_t precision, uint8_t prescaler)
{
  provides interface Read;

  uses interface GeneralIO as Pin;
}
implementation
{
  components new AdcReadP(channel, precision, prescaler),
      RealMainP, new AdcReadClientC(), new AVccClientC();

  AdcReadP.Pin = Pin;
  AdcReadP.ReadAdc -> AdcReadClientC;
  AdcReadP.AVccControl -> AVccClientC;

  AdcReadClientC.M16c60AdcConfig -> AdcReadP;

  Read = AdcReadP;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/AdcReadP.nc000066400000000000000000000064311207233610700224120ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Implementation of a Read interface that can be used to read a AD port
 * on Mulle. It will switch VRef on and off automatically and also set
 * the AD port as input.
 *
 * NOTE: The state of the AD port will not be changed from input on a
 *       readDone event.
 *
 * @author Henrik Makitaavola 
 */

generic module AdcReadP(uint8_t channel, uint8_t precision, uint8_t prescaler)
{
  provides interface M16c60AdcConfig;
  provides interface Read;

  uses interface GeneralIO as Pin;
  uses interface Read as ReadAdc;
  uses interface StdControl as AVccControl;
}
implementation
{
  async command uint8_t M16c60AdcConfig.getChannel()
  {
    return channel;
  }

  async command uint8_t M16c60AdcConfig.getPrecision()
  {
    return precision;
  }

  async command uint8_t M16c60AdcConfig.getPrescaler()
  {
    return prescaler;
  }

  enum
  {
    S_IDLE,
    S_READING,
  };

  uint8_t m_state = S_IDLE;

  command error_t Read.read()
  {
    if (m_state != S_IDLE)
    {
      return EBUSY;
    }
    call AVccControl.start();
    call Pin.makeInput();

    if (call ReadAdc.read() != SUCCESS)
    {
      call AVccControl.stop();
    }
    m_state = S_READING;
    return SUCCESS;
  }

  event void ReadAdc.readDone(error_t e, uint16_t val)
  {
    m_state = S_IDLE;
    // The control of the off state for the pin should be
    // handled from somewhere else.
    call AVccControl.stop();
    signal Read.readDone(e, val);
  }

  default async command void Pin.makeInput() {}
  default event void Read.readDone(error_t e, uint16_t val) {}
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/MulleAVcc.h000066400000000000000000000037171207233610700224550ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Unique count variable for the AVcc MultipleStdControl.
 *
 * @author Henrik Makitaavola 
 */
#ifndef __MULLE_AVCC_H__
#define __MULLE_AVCC_H__

#define AVCC_CLIENTS "mulle.avcc.clients"

#endif // __MULLE_AVCC_H__
tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/MultiUserStdControlC.nc000066400000000000000000000047441207233610700250640ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Wiring for the MultiUserStdControl module.
 * A StdControl used by many different components, eg a StdControl for AVcc,
 * can be turned into a shared resource.
 *
 * @param name The name of the unique count variable used to indicate the
 *             number of users for this shared StdControl.
 *
 * @author Henrik Makitaavola 
 */
generic configuration MultiUserStdControlC(char name[])
{
  provides interface StdControl[uint8_t client];
  uses interface StdControl as SharedStdControl;
}
implementation
{
  components new MultiUserStdControlP(),
             new BitVectorC(uniqueCount(name));

  MultiUserStdControlP.BitVector -> BitVectorC;
  MultiUserStdControlP.SharedStdControl = SharedStdControl;
  StdControl = MultiUserStdControlP;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/lib/MultiUserStdControlP.nc000066400000000000000000000053401207233610700250720ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * A module creating multiple StdControls from one shared StdControl.
 * The shared StdControl will only be turned off once all of the
 * StdControls provided by this module are turned off.
 *
 * @author Henrik Makitaavola 
 */
generic module MultiUserStdControlP()
{
  provides interface StdControl[uint8_t client];

  uses interface StdControl as SharedStdControl;
  uses interface BitVector;
}
implementation
{

  command error_t StdControl.start[uint8_t client]()
  {
    call BitVector.set(client);
    return call SharedStdControl.start();
  }

  command error_t StdControl.stop[uint8_t client]()
  {
    uint16_t i;
    call BitVector.clear(client);
    for (i = 0; i < call BitVector.size(); ++i)
    {
      if (call BitVector.get(i))
      {
        // There is some other resource that still is
        // using the module controlled by this StdControl.
        // We cant turn off now, so return SUCCESS.
        return SUCCESS;
      }
    }
    return call SharedStdControl.stop();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/pin_configuration.h000066400000000000000000000252751207233610700236140ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Inactive pin states on Mulle.
 *
 * @author Henrik Makitaavola 
 */

#ifndef __PIN_CONFIGURATION_H__
#define __PIN_CONFIGURATION_H__

//P00/D0/AN10
//P01/D1/AN11
//P02/D2/AN12
//P03/D3/AN13
//P04/D4/AN14
//P05/D5/AN15
//P06/D6/AN16
//P07/D7/AN17 - Radio.SLP_TR
#define PORT_P0_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)

//P10/D8	RADIO.MISO (INPUT)
//P11/D9	RADIO.MOSI
//P12/D10	Accel.SLEEP_MODE
//P13/D11
//P14/D12
//P15/D13/INT3
//P16/D14/INT4
//P17/D15/INT5
#define PORT_P1_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)

#define PORT_P2_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)

//P30       Accel.GS1
//P31       Accel.GS2  
//P32/A10	Flash.EN
//P33/A11	Radio.SCLK
//P34/A12	Ext. LED
//P35/A13	Radio.SEL (HIGH)
//P36/A14	Red LED
//P37/A14	Green LED                                                   
#define PORT_P3_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_HIGH,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
     
//P40/A16	Flash.SO
//P41/A17	Flash.SI
//P42/A18	Flash.SCK
//P43/A19	Radio.RST (HIGH)
//P44/CS0	Flash.WP
//P45/CS1	Flash.CS
//P46/CS2	Flash.RESET
//P47/CS3	RTC.CLKOE
#define PORT_P4_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)

#define PORT_P5_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_INPUT,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_INPUT,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)


//P62/RXD0	UART0.TXD
//P63/TXD0	UART0.RXD
//P66/RXD1	UART1.TXD
//P67/TXD1	UART1.RXD
#define PORT_P6_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)

//P70/TXD2/SDA2	UART2.TXD
//P71/RDX2/SCK2	UART2.TXD
//P72/TA1OUT
//P74/TA2OUT
//P75	Vcc for I2C (must be pulled high before the I2C bus can be used)
//P76	Accel VCC
//P77	Radio VCC (HIGH)
#define PORT_P7_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)


//P80/TA4OUT	H1.47 ; IC1.P97/ADTRG
//P81/TA4IN
//P82/INT0	RTC.CLKOUT
//P83/INT1	RADIO.IRQ (INPUT)
//P84/INT2	RTC.INT
//P85/NMI	pulled high through resistor
//P87/XCIN	RTC.CLKOUT
#define PORT_P8_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_INPUT,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_INPUT,\
                                                        M16C_PIN_INACTIVE_INPUT,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_INPUT)

//P90/TB0IN	RTC.CLKOUT
//P91
//P92/TB2IN	RTC.CLKOUT
//P93/DA0/TB3IN
//P94/DA1/TB4IN
//P95/ANEX0
//P96/ANEX1
//P97/ADTRG
#define PORT_P9_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_INPUT,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_INPUT,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                        M16C_PIN_INACTIVE_INPUT)

//P100/AN00
//P101/AN01
//P102/AN02
//P103/AN03 - Accel.Z
//P104/AN04 - Accel.Y
//P105/AN05 - Accel.X
//P106/AN06
//P107/AN07
#define PORT_P_10_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
                                                          M16C_PIN_INACTIVE_OUTPUT_LOW)






#endif //__PIN_CONFIGURATION_H__
tinyos-2.1.2+dfsg/tos/platforms/mulle/platform.h000077500000000000000000000044221207233610700217150ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/**
 * Defines for the different speeds supported on the Mulle platform.
 * 
 * @author Henrik Makitaavola 
 */

#ifndef __PLATFORM_H__
#define __PLATFORM_H__


#define MCU_SPEED_20MHz     M16C60_PLL_CLOCK
#define MCU_SPEED_10MHz     M16C60_MAIN_CLOCK_DIV_0 
#define MCU_SPEED_5MHz      M16C60_MAIN_CLOCK_DIV_2 
#define MCU_SPEED_2_5MHz    M16C60_MAIN_CLOCK_DIV_4 
#define MCU_SPEED_1_25MHz   M16C60_MAIN_CLOCK_DIV_8 
#define MCU_SPEED_0_625MHz  M16C60_MAIN_CLOCK_DIV_16
#define MCU_SPEED_32KHz     M16C60_SUB_CLOCK

#endif  // __PLATFORM_H__
tinyos-2.1.2+dfsg/tos/platforms/mulle/platform_message.h000077500000000000000000000042731207233610700234250ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Henrik Makitaavola 
 */
#ifndef __PLATFORM_MESSAGE_H__
#define __PLATFORM_MESSAGE_H__

#include "Serial.h"
#include 


typedef union message_header {
	rf230packet_header_t rf230;
	serial_header_t serial;
} message_header_t;

typedef union message_footer {
	rf230packet_footer_t rf230;
} message_footer_t;

typedef union message_metadata {
	rf230packet_metadata_t rf230;
} message_metadata_t;


#endif  // __PLATFORM_MESSAGE_H__
tinyos-2.1.2+dfsg/tos/platforms/mulle/spi/000077500000000000000000000000001207233610700205065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/spi/SharedSpiPacketC.nc000066400000000000000000000066421207233610700241550ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Lulea University of Technology
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * This module implements the logic when making a SpiPacket
 * into a shared abstraction.
 *
 * @author Henrik Makitaavola 
 */
generic module SharedSpiPacketC()
{
  provides interface Resource[uint8_t client];
  provides interface SpiPacket[uint8_t client];
  uses interface Resource as SubResource[uint8_t];
  uses interface SpiPacket as SubPacket;
}
implementation
{
  enum
  {
    NO_CLIENT = 0xff
  };
  
  uint8_t currentClient = NO_CLIENT;

  async command error_t Resource.request[uint8_t id]()
  {
    return call SubResource.request[id]();
  }

  async command error_t Resource.immediateRequest[uint8_t id]()
  {
    error_t rval = call SubResource.immediateRequest[id]();
    if (rval == SUCCESS)
    {
      atomic currentClient = id;
    }
    return rval;
  }

  event void SubResource.granted[uint8_t id]()
  {
    atomic currentClient = id;
    signal Resource.granted[id]();
  }

  async command error_t Resource.release[uint8_t id]()
  {
    return call SubResource.release[id]();
  }

  async command bool Resource.isOwner[uint8_t id]()
  {
    return call SubResource.isOwner[id]();
  }
  
  async command error_t SpiPacket.send[uint8_t id](uint8_t* txBuf,
                                                    uint8_t* rxBuf,
                                                    uint16_t length)
  {
    atomic
    {
      if (currentClient != id)
      {
        return FAIL;
      }
    }
    return call SubPacket.send(txBuf, rxBuf, length);
  }
  
  default event void Resource.granted[uint8_t id]() {}

  async event void SubPacket.sendDone(
      uint8_t* txBuf, uint8_t* rxBuf, uint16_t length, error_t error)
  {
    signal SpiPacket.sendDone[currentClient](txBuf, rxBuf, length, error);
  }

  default async event void SpiPacket.sendDone[uint8_t id](
      uint8_t* txBuf, uint8_t* rxBuf, uint16_t length, error_t error) {  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/spi/SoftwareSpiC.nc000066400000000000000000000073641207233610700234130ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Lulea University of Technology
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Software implementation of all the Spi interfaces.
 *
 * @author Henrik Makitaavola 
 */
generic module SoftwareSpiC()
{
  provides
  {
    interface SpiPacket;
    interface SpiByte;
    interface FastSpiByte;
  }
  uses
  {
    interface GeneralIO as SCLK;
    interface GeneralIO as MISO;
    interface GeneralIO as MOSI;
  }
}
implementation
{
  enum
  {
    S_IDLE,
    S_PACKET_SEND,
  };
  uint8_t m_state = S_IDLE;
  uint8_t* m_txBuf;
  uint8_t* m_rxBuf;
  uint16_t m_len;
  norace uint8_t m_fastByte;
  
  task void signalSendDone()
  {
    uint8_t* tmpTxBuf;
    uint8_t* tmpRxBuf;
    uint16_t tmpLen;
    atomic
    {
      m_state = S_IDLE;
      tmpTxBuf = m_txBuf;
      tmpRxBuf = m_rxBuf;
      tmpLen = m_len;
    }
    signal SpiPacket.sendDone(tmpTxBuf, tmpRxBuf, tmpLen, SUCCESS);
  }
    
  async command error_t SpiPacket.send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len )
  {
    uint16_t i;
    atomic
    {
      if (m_state != S_IDLE)
      {
        return EBUSY;
      }
      m_state = S_PACKET_SEND;
      m_txBuf = txBuf;
      m_rxBuf = rxBuf;
      m_len = len;
      for(i = 0; i < len; ++i)
      {
        rxBuf[i] = call SpiByte.write(txBuf[i]);
      }
    }
    post signalSendDone();
    return SUCCESS;
  }
  default async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t error) {}

  async command uint8_t SpiByte.write( uint8_t byte )
  {
    uint8_t data = 0;
    uint8_t mask = 0x80;

    atomic do
    {
      if( (byte & mask) != 0 )
        call MOSI.set();
      else
        call MOSI.clr();

      call SCLK.clr();
      if( call MISO.get() )
        data |= mask;
      call SCLK.set();
    } while( (mask >>= 1) != 0 );

    return data;
  }

  async command void FastSpiByte.splitWrite(uint8_t data)
  {
    m_fastByte = call SpiByte.write(data);
  }

  async command uint8_t FastSpiByte.splitReadWrite(uint8_t data)
  {
    uint8_t tmp = m_fastByte;
    m_fastByte = call SpiByte.write(data);
    return tmp;
  }

  async command uint8_t FastSpiByte.splitRead()
  {
    return m_fastByte;
  }

  async command uint8_t FastSpiByte.write(uint8_t data)
  {
    return call SpiByte.write(data);
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/system/000077500000000000000000000000001207233610700212375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/system/LedsP.nc000077500000000000000000000077231207233610700226040ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.6 2008/06/24 05:32:32 regehr Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 * @date   March 21, 2005
 */

/**
 * Mulle needs a slightly different LedsP.
 *
 * @author Henrik Makitaavola 
 */
module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led0.clr();
      call Led1.clr();
      call Led2.clr();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
    call Led1.set();
    DBGLED(1);
  }

  async command void Leds.led1Off() {
    call Led1.clr();
    DBGLED(1);
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    DBGLED(1);
  }

  async command void Leds.led2On() {
    call Led2.set();
    DBGLED(2);
  }

  async command void Leds.led2Off() {
    call Led2.clr();
    DBGLED(2);
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    DBGLED(2);
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (call Led0.get()) {
	rval |= LEDS_LED0;
      }
      if (call Led1.get()) {
	rval |= LEDS_LED1;
      }
      if (call Led2.get()) {
	rval |= LEDS_LED2;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	call Leds.led0On();
      }
      else {
	call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
	call Leds.led1On();
      }
      else {
	call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
	call Leds.led2On();
      }
      else {
	call Leds.led2Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/000077500000000000000000000000001207233610700212165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/AlarmMicro16C.nc000077500000000000000000000050261207233610700240460ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * AlarmMicro16C provides a 16-bit TMicro alarm.
 * It uses 1 hw timer that is used as a alarm.
 * 
 * NOTE: It uses the same source clock as the CounterMicro16C.
 *
 * @author Henrik Makitaavola 
 */

#include "TimerConfig.h"

configuration AlarmMicro16C
{
  provides interface Alarm;
}
implementation
{
  components new M16c60Alarm16C(TMicro) as AlarmFrom;
  components new M16c60TimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TA_PREV, 0, false, false, false) as AlarmInit;

  components HplM16c60TimerC as Timers,
      CounterMicro16C,
      RealMainP;

  AlarmFrom -> Timers.ALARM_MICRO16;
  AlarmFrom.Counter -> CounterMicro16C;

  AlarmInit -> Timers.ALARM_MICRO16;
  AlarmInit -> Timers.ALARM_MICRO16_CTRL;
  RealMainP.PlatformInit -> AlarmInit.Init;
  Alarm = AlarmFrom;
}
  

tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/AlarmMicro32C.nc000077500000000000000000000042621207233610700240450ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/**
 * 32-bit microsecond Alarm component as per TEP102 HAL guidelines.
 *
 * @author Fan Zhang 
 */

generic configuration AlarmMicro32C()
{
  provides interface Alarm;
}
implementation
{
  components AlarmMicro16C as Alarm16, CounterMicro32C as Counter32;
  components new TransformAlarmC(TMicro, uint32_t, TMicro, uint16_t, 0) as Transform32;

  Alarm = Transform32;
  Transform32.AlarmFrom -> Alarm16;
  Transform32.Counter -> Counter32;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/BusyWaitMicroC.nc000077500000000000000000000055021207233610700244110ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Implementation of the HIL required micro busy wait.
 * For more information see TEP 102.
 *
 * @author Henrik Makitaavola 
 */
module BusyWaitMicroC
{
  provides interface BusyWait;
}
implementation
{
  // TODO(henrik) This will now only work on 10Mhz speed, easy to
  //              add a signal from the control module of the mcu
  //              to signal the change of speed and the wait function
  //              can adjust to it.
  // The wait function can not be inlined because then the code alignment may
  // go lost thus making the busy wait around 30% slower.
  async command void BusyWait.wait(uint16_t dt ) __attribute__((noinline)) {
    atomic {
      asm("nop"); // Nop needed to align function
      asm volatile (
          "sub.w #1,%[t]\n\t"
          "jeq 2f\n\t"
          "sub.w #1,%[t]\n\t"
          "jeq 2f\n\t"
          "1:\n\t"
          "nop\n\t"
          "add.w #1,%[t]\n\t"
          "sub.w #1,%[t]\n\t"
          "sub.w #1,%[t]\n\t"
          "jgtu 1b\n\t"
          "2:"
          :   
          : [t] "r" (dt)
          );  
    } 
  } 
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/CounterMicro16C.nc000077500000000000000000000056101207233610700244300ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/**
 * CounterMicro16C provides a 16-bit TMicro counter.
 * It uses 2 hw timers, one generates a micro tick and the other
 * counts the micro ticks.
 *
 * @author Henrik Makitaavola 
 * @see  Please refer to TEP 102 for more information about this component.
 */

#include "TimerConfig.h"

configuration CounterMicro16C
{
  provides interface Counter;
}
implementation
{
  // Counter
  components new M16c60Counter16C(TMicro) as CounterFrom;
  components new M16c60TimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TA_NEXT, 0xFFFF, true, true, true) as CounterInit;
  
  // Source
  components new M16c60TimerAInitC(TMR_TIMER_MODE, M16C_TMR_CS_F1_2, (MAIN_CRYSTAL_SPEED - 1), false, true, true) as TimerSourceInit;
  
  components HplM16c60TimerC as Timers,
      RealMainP, McuSleepC;

  // Counter
  CounterFrom.Timer -> Timers.COUNTER_MICRO16;
  CounterInit -> Timers.COUNTER_MICRO16;
  CounterInit -> Timers.COUNTER_MICRO16_CTRL;
  RealMainP.PlatformInit -> CounterInit;
  Counter = CounterFrom;

  // Timer source
  TimerSourceInit -> Timers.MICRO16_SOURCE;
  TimerSourceInit -> Timers.MICRO16_SOURCE_CTRL;
  RealMainP.PlatformInit -> TimerSourceInit;
  
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/CounterMicro32C.nc000077500000000000000000000042001207233610700244200ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/**
 * 32-bit microsecond Counter component as per TEP102 HAL guidelines.
 *
 * @author Fan Zhang 
 */


configuration CounterMicro32C
{
  provides interface Counter;
}
implementation
{
  components CounterMicro16C as Counter16, 
    new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t,
			  0, uint16_t) as Transform32;

  Counter = Transform32;
  Transform32.CounterFrom -> Counter16;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/HilTimerMilliC.nc000077500000000000000000000104721207233610700243560ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Cory Sharp 
 */

/**
 * HilTimerMilliC provides a parameterized interface to a virtualized
 * millisecond timer and local time in milli precision.  TimerMilliC in
 * tos/system/ uses this component to allocate new timers.
 * See TEP 102 for more information.
 *
 * @author Henrik Makitaavola 
 */

#include "TimerConfig.h"
configuration HilTimerMilliC
{
  provides interface Init;

  provides interface Timer as TimerMilli[ uint8_t num ];
  provides interface LocalTime;
}
implementation
{
  components new AlarmToTimerC(TMilli);
  components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI));
  components new CounterToLocalTimeC(TMilli);
  components HIL_TIMERS as AlarmCounterMilli32C;

  TimerMilli = VirtualizeTimerC;
  LocalTime = CounterToLocalTimeC;

  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
  AlarmToTimerC.Alarm -> AlarmCounterMilli32C.Alarm;
  CounterToLocalTimeC.Counter -> AlarmCounterMilli32C.Counter;
  Init = AlarmCounterMilli32C;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/LocalTimeMicroC.nc000077500000000000000000000042001207233610700245050ustar00rootroot00000000000000/*
 * Copyright (c) 2008, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

/**
 * This configuration provides a local time represented in Micro seconds.
 * 
 * @author Henrik Makitaavola 
 */

#include "Timer.h"

configuration LocalTimeMicroC
{
	provides interface LocalTime;
}

implementation
{
	components CounterMicro16C;
	components new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t, 0, uint32_t);
	components new CounterToLocalTimeC(TMicro);

	LocalTime = CounterToLocalTimeC;
	CounterToLocalTimeC.Counter -> TransformCounterC;
	TransformCounterC.CounterFrom -> CounterMicro16C;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/TimerConfig.h000077500000000000000000000100321207233610700235740ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The M16c/60 hardware timer configuration used by Mulle.
 * 
 * STOP MODE ENABLED:
 *   TB2 generates TMilli tics from the RV8564 chip.
 *   TA0 and TA1 are used to create a 32 bit counter. TA0 counts
 *   tics from TB2 and TA1 counts TA0 underflows.
 *   TB0 and TB1 are used to create a 32 bit Alarm. TB0 counts
 *   tics from TB2 and TB1 counts TB0 underflows.
 *
 * STOP MODE DISABLED:
 *   TA0 generates TMilli tics.
 *   TB0 generates TMilli tics.
 *   TA1 is a 16 bit counter that counts tics from TA0.
 *   TB1 is a 16 bit alarm that counts tics from TB0.
 *
 * ALWAYS USED:
 *  NOTE: Counter timers are turned off when the mcu goes into stop mode.
 *   TA3 generates TMicro tics.
 *   TA2 is a 16 bit TMicro counter that counts tics from TA3.
 *   TA4 is a 16 bit TMicro alarm that counts tics from TA3.
 * 	 TB3 is a 16 bit Radio counter.
 *   TB4 is a 16 bit Radio alarm.
 *
 * @author Henrik Makitaavola 
 */

#ifndef __TIMERCONFIG_H__
#define __TIMERCONFIG_H__

#ifdef ENABLE_STOP_MODE
  #define HIL_TIMERS RV8564AlarmCounterMilli32C
#else
  #define HIL_TIMERS AlarmCounterMilli32C
#endif

// Use hw timers alone.
#define COUNTER_MILLI32_SOURCE TimerB0
#define COUNTER_MILLI32_SOURCE_CTRL TimerB0Ctrl
#define COUNTER_MILLI32 TimerB1
#define COUNTER_MILLI32_CTRL TimerB1Ctrl

#define ALARM_MILLI32_SOURCE TimerA0
#define ALARM_MILLI32_SOURCE_CTRL TimerA0Ctrl
#define ALARM_MILLI32 TimerA1
#define ALARM_MILLI32_CTRL TimerA1Ctrl
// End

// Use the RV8564 chip to generate tics (stop mode enabled).
#define MILLI32_SOURCE_RV8564 TimerB2
#define MILLI32_SOURCE_RV8564_CTRL TimerB2Ctrl

#define COUNTER_MILLI32_LOW TimerA0
#define COUNTER_MILLI32_LOW_CTRL TimerA0Ctrl
#define COUNTER_MILLI32_HIGH TimerA1
#define COUNTER_MILLI32_HIGH_CTRL TimerA1Ctrl

#define ALARM_MILLI32_LOW TimerB0
#define ALARM_MILLI32_LOW_CTRL TimerB0Ctrl
#define ALARM_MILLI32_HIGH TimerB1
#define ALARM_MILLI32_HIGH_CTRL TimerB1Ctrl
// end

// Common settings.
#define COUNTER_MICRO16 TimerA2
#define COUNTER_MICRO16_CTRL TimerA2Ctrl
#define MICRO16_SOURCE TimerA3
#define MICRO16_SOURCE_CTRL TimerA3Ctrl
#define ALARM_MICRO16 TimerA4
#define ALARM_MICRO16_CTRL TimerA4Ctrl

#define COUNTER_RF23016 TimerB3
#define COUNTER_RF23016_CTRL TimerB3Ctrl
#define ALARM_RF23016 TimerB4
#define ALARM_RF23016_CTRL TimerB4Ctrl
// end.

#endif  // __TIMERCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/rf230/000077500000000000000000000000001207233610700220525ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/rf230/AlarmRF23016C.nc000066400000000000000000000050111207233610700243540ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * AlarmRF23016C provides a 16-bit TRF230 alarm.
 * It uses 1 hw timer that is used as a alarm and runs with
 * speed PLL_CLOCK_SPEED / 8.
 *
 * @author Henrik Makitaavola 
 */

#include "TimerConfig.h"
#include 

configuration AlarmRF23016C
{
  provides interface Alarm;
}
implementation
{
  components new M16c60Alarm16C(TRadio) as AlarmFrom;
  components new M16c60TimerBInitC(TMR_TIMER_MODE, M16C_TMR_CS_F8, 0, false, false, false) as AlarmInit;

  components HplM16c60TimerC as Timers,
      CounterRF23016C,
      RealMainP;

  AlarmFrom -> Timers.ALARM_RF23016;
  AlarmFrom.Counter -> CounterRF23016C;

  AlarmInit -> Timers.ALARM_RF23016;
  AlarmInit -> Timers.ALARM_RF23016_CTRL;
  RealMainP.PlatformInit -> AlarmInit;
  Alarm = AlarmFrom;
}
  

tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/rf230/CounterRF23016C.nc000066400000000000000000000047201207233610700247450ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * CounterRF23016C provides a 16-bit TRF230 counter.
 * It uses 1 hw timer that counts in PLL_CLOCK_SPEED / 8.
 *
 * @author Henrik Makitaavola 
 */

#include "TimerConfig.h"
#include 

configuration CounterRF23016C
{
  provides interface Counter;
}
implementation
{
  components new M16c60Counter16C(TRadio) as CounterFrom;
  components new M16c60TimerBInitC(TMR_TIMER_MODE, M16C_TMR_CS_F8, 0xFFFF, false, true, true) as CounterInit;

  components HplM16c60TimerC as Timers,
      RealMainP;
  
  CounterFrom.Timer -> Timers.COUNTER_RF23016;
  CounterInit -> Timers.COUNTER_RF23016;
  CounterInit -> Timers.COUNTER_RF23016_CTRL;
  RealMainP.PlatformInit -> CounterInit;
  Counter = CounterFrom;
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/stop/000077500000000000000000000000001207233610700222035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/stop/RV8564AlarmCounterMilli32C.nc000077500000000000000000000102451207233610700271640ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * RV8564AlarmCounterMilli32C provides a 32-bit TMilli alarm and counter.
 * The counter and alarm is driven by the RV8564 chip on Mulle. This
 * allows the M16c/60 mcu to be put into stop mode even when the timers
 * are running.
 *
 * @author Henrik Makitaavola 
 * @see  Please refer to TEP 102 for more information about this component.
 */

#include "TimerConfig.h"

configuration RV8564AlarmCounterMilli32C
{
  provides interface Counter;
  provides interface Alarm;
  provides interface Init;
}
implementation
{
  components new M16c60Counter32C(TMilli) as CounterFrom;
  components new M16c60TimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TB2, 0xFFFF, false, true, true) as CounterInit1;
  components new M16c60TimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TA_PREV, 0xFFFF, true, true, true) as CounterInit2;
  
  components new M16c60Alarm32C(TMilli) as AlarmFrom;
  components new M16c60TimerBInitC(TMR_COUNTER_MODE, M16C_TMRB_CTR_ES_TBj, 0, false, false, true) as AlarmInit1;
  components new M16c60TimerBInitC(TMR_COUNTER_MODE, M16C_TMRB_CTR_ES_TBj, 0, false, false, true) as AlarmInit2;
  
  components new M16c60TimerBInitC(TMR_COUNTER_MODE, M16C_TMRB_CTR_ES_TBiIN, 0, false, true, true) as TimerSourceInit;

  components HplM16c60TimerC as Timers,
      RV8564AlarmCounterMilli32P,
      HplM16c60InterruptC as Irqs,
      HplM16c60GeneralIOC as IOs;

  // Setup the IO pin that RV8564 generates the clock to.
  RV8564AlarmCounterMilli32P -> IOs.PortP92;
  Init = RV8564AlarmCounterMilli32P;
  
  // Counter
  CounterFrom.TimerLow -> Timers.COUNTER_MILLI32_LOW;
  CounterFrom.TimerHigh -> Timers.COUNTER_MILLI32_HIGH;
  CounterInit1 -> Timers.COUNTER_MILLI32_LOW;
  CounterInit1 -> Timers.COUNTER_MILLI32_LOW_CTRL;
  CounterInit2 -> Timers.COUNTER_MILLI32_HIGH;
  CounterInit2 -> Timers.COUNTER_MILLI32_HIGH_CTRL;
  Init = CounterInit1;
  Init = CounterInit2;
  Counter = CounterFrom;

  // Alarm
  AlarmFrom.ATimerLow -> Timers.ALARM_MILLI32_LOW;
  AlarmFrom.ATimerHigh -> Timers.ALARM_MILLI32_HIGH;
  AlarmFrom.Counter -> CounterFrom;
  AlarmInit1 -> Timers.ALARM_MILLI32_LOW;
  AlarmInit1 -> Timers.ALARM_MILLI32_LOW_CTRL;
  AlarmInit2 -> Timers.ALARM_MILLI32_HIGH;
  AlarmInit2 -> Timers.ALARM_MILLI32_HIGH_CTRL;
  Init = AlarmInit1;
  Init = AlarmInit2;
  Alarm = AlarmFrom;

  // Timer source
  TimerSourceInit -> Timers.MILLI32_SOURCE_RV8564;
  TimerSourceInit -> Timers.MILLI32_SOURCE_RV8564_CTRL;
  Init = TimerSourceInit;
}

tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/stop/RV8564AlarmCounterMilli32P.nc000077500000000000000000000041021207233610700271740ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Init the port that the RV8564 chip is generating its tics to (TB0 in).
 *
 * @author Henrik Makitaavola 
 */
module RV8564AlarmCounterMilli32P
{
  provides interface Init;
  uses interface GeneralIO as IO;
}
implementation
{
  command error_t Init.init()
  {
    call IO.makeInput();
    call IO.clr();
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/wait/000077500000000000000000000000001207233610700221625ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/mulle/timers/wait/AlarmCounterMilli32C.nc000077500000000000000000000073441207233610700263520ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Communication Group and Eislab at
 * Lulea University of Technology
 *
 * Contact: Laurynas Riliskis, LTU
 * Mail: laurynas.riliskis@ltu.se
 * All rights reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Communication Group at Lulea University of Technology
 *   nor the names of its contributors may be used to endorse or promote
 *    products derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * AlarmCounterMilli32C provides a 32-bit TMilli alarm and counter.
 *
 * @author Henrik Makitaavola 
 * @see  Please refer to TEP 102 for more information about this component.
 */

#include "TimerConfig.h"

configuration AlarmCounterMilli32C
{
  provides interface Counter;
  provides interface Alarm;
  provides interface Init;
}
implementation
{
  components new M16c60Counter16C(TMilli) as CounterFrom;
  components new M16c60TimerBInitC(TMR_COUNTER_MODE, M16C_TMRB_CTR_ES_TBj, 0xFFFF, true, true, false) as CounterInit;
  components new M16c60TimerBInitC(TMR_TIMER_MODE, M16C_TMR_CS_F1_2, (1000 * MAIN_CRYSTAL_SPEED) - 1, false, true, true) as CounterSourceInit;
  components new TransformCounterC(TMilli,uint32_t, TMilli,uint16_t, 0,uint16_t) as TCounter;
  
  components new M16c60Alarm16C(TMilli) as AlarmFrom;
  components new M16c60TimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TA_PREV, 0, false, false, false) as AlarmInit;
  components new M16c60TimerAInitC(TMR_TIMER_MODE, M16C_TMR_CS_F1_2, (1000 * MAIN_CRYSTAL_SPEED) - 1, false, true, true) as AlarmSourceInit;
  components new TransformAlarmC(TMilli,uint32_t,TMilli,uint16_t,0) as TAlarm;
  

  components HplM16c60TimerC as Timers;

  // Counter
  CounterFrom.Timer -> Timers.COUNTER_MILLI32;
  CounterInit -> Timers.COUNTER_MILLI32;
  CounterInit -> Timers.COUNTER_MILLI32_CTRL;
  Init = CounterInit;
  CounterSourceInit -> Timers.COUNTER_MILLI32_SOURCE;
  CounterSourceInit -> Timers.COUNTER_MILLI32_SOURCE_CTRL;
  Init = CounterSourceInit;

  // Alarm
  AlarmFrom -> Timers.ALARM_MILLI32;
  AlarmFrom.Counter -> CounterFrom;
  AlarmInit -> Timers.ALARM_MILLI32;
  AlarmInit -> Timers.ALARM_MILLI32_CTRL;
  Init = AlarmInit.Init;
  AlarmSourceInit -> Timers.ALARM_MILLI32_SOURCE;
  AlarmSourceInit -> Timers.ALARM_MILLI32_SOURCE_CTRL;
  Init = AlarmSourceInit;

  // Transformations
  TCounter.CounterFrom -> CounterFrom;
  Counter = TCounter;
  TAlarm.AlarmFrom -> AlarmFrom;
  TAlarm.Counter -> TCounter;
  Alarm = TAlarm;
}

tinyos-2.1.2+dfsg/tos/platforms/null/000077500000000000000000000000001207233610700175475ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/null/.platform000066400000000000000000000007771207233610700214070ustar00rootroot00000000000000#
# FILE: null/.platform
# 
# A do-nothing platform. A good target for mig when using external types.
#
# $Id: .platform,v 1.6 2009-11-14 06:51:21 razvanm Exp $
#
push( @includes, qw(

  %T/lib/timer
  %T/lib/serial

) );

@opts = qw(

  -fnesc-target=pc
  -fnesc-no-debug

);

if (defined($ENV{"GCC"})) {
  push @opts, "-gcc=$ENV{'GCC'}";
} else {
  push @opts, "-gcc=gcc";
}
push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
tinyos-2.1.2+dfsg/tos/platforms/null/ActiveMessageC.nc000066400000000000000000000051571207233610700227240ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.6 2008-04-24 06:52:12 klueska Exp $
/*
 * Copyright (c) 2005-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy implementation to support the null platform.
 */

module ActiveMessageC {
  provides {
    interface SplitControl;

    interface AMSend[uint8_t id];
    interface Receive[uint8_t id];
    interface Receive as Snoop[uint8_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements as Acks;
  }
}
implementation {


  command error_t SplitControl.start() {
    return SUCCESS;
  }

  command error_t SplitControl.stop() {
    return SUCCESS;
  }

  command error_t AMSend.send[uint8_t id](am_addr_t addr, message_t* msg, uint8_t len) {
    return SUCCESS;
  }

  command error_t AMSend.cancel[uint8_t id](message_t* msg) {
    return SUCCESS;
  }

  command uint8_t AMSend.maxPayloadLength[uint8_t id]() {
    return 0;
  }

  command void* AMSend.getPayload[uint8_t id](message_t* msg, uint8_t len) {
    return NULL;
  }

  command void Packet.clear(message_t* msg) {
  }

  command uint8_t Packet.payloadLength(message_t* msg) {
    return 0;
  }

  command uint8_t Packet.maxPayloadLength() {
    return 0;
  }

  command void* Packet.getPayload(message_t* msg, uint8_t len) {
    return msg;
  }

  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
  }

  command am_addr_t AMPacket.address() {
    return 0;
  }

  command am_addr_t AMPacket.destination(message_t* amsg) {
    return 0;
  }

  command bool AMPacket.isForMe(message_t* amsg) {
    return FALSE;
  }

  command am_id_t AMPacket.type(message_t* amsg) {
    return 0;
  }

  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
  }

  command void AMPacket.setType(message_t* amsg, am_id_t t) {
  }

  command am_addr_t AMPacket.source(message_t* amsg) {
    return 0;
  }

  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { }
  
  command am_group_t AMPacket.group(message_t* amsg) {
    return 0;
  }

  command void AMPacket.setGroup(message_t* amsg, am_group_t grp) { }

  command am_group_t AMPacket.localGroup() {
    return 0;
  }

  async command error_t Acks.requestAck( message_t* msg ) {
    return SUCCESS;
  }

  async command error_t Acks.noAck( message_t* msg ) {
    return SUCCESS;
  }

  async command bool Acks.wasAcked(message_t* msg) {
    return FALSE;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/null/BlockStorageC.nc000066400000000000000000000022121207233610700225500ustar00rootroot00000000000000// $Id: BlockStorageC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
/*
 * Copyright (c) 2005-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy implementation to support the null platform.
 */

#include "Storage.h"

generic module BlockStorageC(volume_id_t volid) {
  provides {
    interface BlockWrite;
    interface BlockRead;
  }
}
implementation {
  command error_t BlockWrite.write( storage_addr_t addr, void* buf, uint16_t len ) {
    return SUCCESS;
  }

  command error_t BlockWrite.erase() {
    return SUCCESS;
  }

  command error_t BlockWrite.commit() {
    return SUCCESS;
  }

  command error_t BlockRead.read( storage_addr_t addr, void* buf, uint16_t len ) {
    return SUCCESS;
  }

  command error_t BlockRead.verify() {
    return SUCCESS;
  }

  command error_t BlockRead.computeCrc( storage_addr_t addr, storage_len_t len ) {
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/null/DemoSensorC.nc000066400000000000000000000015161207233610700222550ustar00rootroot00000000000000/* $Id: DemoSensorC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Null platform demo sensor code.
 *
 * @author David Gay
 */
generic module DemoSensorC()
{
  provides interface Read;
  provides interface ReadStream;
}
implementation
{
  command error_t Read.read() {
    return SUCCESS;
  }

  command error_t ReadStream.postBuffer(uint16_t *buf, uint16_t count) {
    return SUCCESS;
  }

   command error_t ReadStream.read(uint32_t usPeriod) {
     return SUCCESS;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/null/DemoSensorNowC.nc000066400000000000000000000016731207233610700227450ustar00rootroot00000000000000/* $Id: DemoSensorNowC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Null platform demo sensor code.
 *
 * @author David Gay
 */
generic module DemoSensorNowC()
{
  provides interface Resource;
  provides interface ReadNow;
}
implementation
{
  async command error_t Resource.request() {
    return SUCCESS;
  }

  async command error_t Resource.immediateRequest() {
    return SUCCESS;
  }

  async command error_t Resource.release() {
    return SUCCESS;
  }

  async command bool Resource.isOwner() {
    return TRUE;
  }

  async command error_t ReadNow.read() {
    return SUCCESS;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/null/HilTimerMilliC.nc000066400000000000000000000030161207233610700227000ustar00rootroot00000000000000// $Id: HilTimerMilliC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
/*
 * Copyright (c) 2005-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy implementation to support the null platform.
 */

module HilTimerMilliC
{
  provides interface Init;
  provides interface Timer as TimerMilli[ uint8_t num ];
  provides interface LocalTime;
}
implementation
{

  command error_t Init.init() {
    return SUCCESS;
  }

  command void TimerMilli.startPeriodic[ uint8_t num ]( uint32_t dt ) {
  }

  command void TimerMilli.startOneShot[ uint8_t num ]( uint32_t dt ) {
  }

  command void TimerMilli.stop[ uint8_t num ]() {
  }

  command bool TimerMilli.isRunning[ uint8_t num ]() {
    return FALSE;
  }

  command bool TimerMilli.isOneShot[ uint8_t num ]() {
    return FALSE;
  }

  command void TimerMilli.startPeriodicAt[ uint8_t num ]( uint32_t t0, uint32_t dt ) {
  }

  command void TimerMilli.startOneShotAt[ uint8_t num ]( uint32_t t0, uint32_t dt ) {
  }

  command uint32_t TimerMilli.getNow[ uint8_t num ]() {
    return 0;
  }

  command uint32_t TimerMilli.gett0[ uint8_t num ]() {
    return 0;
  }

  command uint32_t TimerMilli.getdt[ uint8_t num ]() {
    return 0;
  }

  async command uint32_t LocalTime.get() {
    return 0;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/null/McuSleepC.nc000066400000000000000000000012541207233610700217130ustar00rootroot00000000000000// $Id: McuSleepC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
/*
 * Copyright (c) 2005-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy implementation to support the null platform.
 */

module McuSleepC {
  provides {
    interface McuSleep;
    interface McuPowerState;
  }
}
implementation {
  async command void McuSleep.sleep() {
  }

  async command void McuPowerState.update() {
  }
}
tinyos-2.1.2+dfsg/tos/platforms/null/PlatformC.nc000066400000000000000000000011331207233610700217560ustar00rootroot00000000000000// $Id: PlatformC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
/*
 * Copyright (c) 2005-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy implementation to support the null platform.
 */

module PlatformC { 
  provides interface Init;
}
implementation {
  command error_t Init.init() {
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/null/PlatformLedsC.nc000066400000000000000000000035731207233610700226000ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.5 2007-05-23 22:17:49 idgay Exp $
/*
 * Copyright (c) 2005-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy implementation to support the null platform.
 */

module PlatformLedsC
{
  provides interface GeneralIO as Led0;
  provides interface GeneralIO as Led1;
  provides interface GeneralIO as Led2;
  uses interface Init;
}
implementation
{

  async command void Led0.set() {
  }

  async command void Led0.clr() {
  }

  async command void Led0.toggle() {
  }

  async command bool Led0.get() {
    return FALSE;
  }

  async command void Led0.makeInput() {
  }

  async command void Led0.makeOutput() {
    call Init.init();
  }

  async command void Led1.set() {
  }

  async command void Led1.clr() {
  }

  async command void Led1.toggle() {
  }

  async command bool Led1.get() {
    return FALSE;
  }

  async command void Led1.makeInput() {
  }

  async command void Led1.makeOutput() {
    call Init.init();
  }

  async command void Led2.set() {
  }

  async command void Led2.clr() {
  }

  async command void Led2.toggle() {
  }

  async command bool Led2.get() {
    return FALSE;
  }

  async command void Led2.makeInput() {
  }

  async command void Led2.makeOutput() {
    call Init.init();
  }

  async command bool Led0.isInput() { 
    return FALSE;
  }

  async command bool Led0.isOutput() { 
    return FALSE;
  }

  async command bool Led1.isInput() { 
    return FALSE;
  }

  async command bool Led1.isOutput() { 
    return FALSE;
  }

  async command bool Led2.isInput() { 
    return FALSE;
  }

  async command bool Led2.isOutput() { 
    return FALSE;
  }

}
tinyos-2.1.2+dfsg/tos/platforms/null/PlatformSerialC.nc000066400000000000000000000024341207233610700231230ustar00rootroot00000000000000// $Id: PlatformSerialC.nc,v 1.5 2007-05-23 22:17:49 idgay Exp $
/*
 * Copyright (c) 2005-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy implementation to support the null platform.
 */

module PlatformSerialC {
  provides interface StdControl;
  provides interface UartByte;
  provides interface UartStream;
}
implementation {
  command error_t StdControl.start() {
    return SUCCESS;
  }

  command error_t StdControl.stop() {
    return SUCCESS;
  }

  async command error_t UartByte.send( uint8_t byte ) {
    return SUCCESS;
  }

  async command error_t UartByte.receive( uint8_t* byte, uint8_t timeout ) {
    return SUCCESS;
  }

  async command error_t UartStream.send( uint8_t* buf, uint16_t len ) {
    return SUCCESS;
  }

  async command error_t UartStream.enableReceiveInterrupt() {
    return SUCCESS;
  }

  async command error_t UartStream.disableReceiveInterrupt() {
    return SUCCESS;
  }

  async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) {
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/null/Storage_chip.h000066400000000000000000000000001207233610700223150ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/null/hardware.h000066400000000000000000000016511207233610700215200ustar00rootroot00000000000000
#ifndef HARDWARE_H
#define HARDWARE_H
inline void __nesc_enable_interrupt() { }
inline void __nesc_disable_interrupt() { }

typedef uint8_t __nesc_atomic_t;
typedef uint8_t mcu_power_t;

inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() {
  return 0;
}

inline void __nesc_atomic_end(__nesc_atomic_t x) @spontaneous() { }
inline void __nesc_atomic_sleep() { }

/* Floating-point network-type support */
typedef float nx_float __attribute__((nx_base_be(afloat)));

inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
  float f;
  memcpy(&f, source, sizeof(float));
  return f;
}

inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
  memcpy(target, &value, sizeof(float));
  return value;
}

// enum so components can override power saving,
// as per TEP 112.
// As this is not a real platform, just set it to 0.
enum {
  TOS_SLEEP_NONE = 0,
};


#endif
tinyos-2.1.2+dfsg/tos/platforms/null/platform.h000066400000000000000000000000001207233610700215320ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/null/platform_message.h000066400000000000000000000014321207233610700232500ustar00rootroot00000000000000// $Id: platform_message.h,v 1.4 2006-12-12 18:23:44 vlahan Exp $
/*
 * Copyright (c) 2005-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy implementation to support the null platform.
 */

#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include "Serial.h"

typedef union message_header {
  serial_header_t serial;
} message_header_t;

typedef union message_footer {
  nx_uint8_t dummy;
} message_footer_t;

typedef union message_metadata {
  nx_uint8_t dummy;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/000077500000000000000000000000001207233610700203025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/.platform000066400000000000000000000037571207233610700221430ustar00rootroot00000000000000# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.

push ( @includes,
  "%T/chips/cortex/m3",
  "%T/chips/cortex/m3/sam3",
  "%T/chips/cortex/m3/sam3/s",
  "%T/chips/cortex/m3/sam3/nvic",
  "%T/chips/cortex/m3/sam3/s/nvic",
  "%T/chips/cortex/m3/sam3/pmc",
  "%T/chips/cortex/m3/sam3/s/pmc",
  "%T/chips/cortex/m3/sam3/supc",
  "%T/chips/cortex/m3/sam3/s/supc",
  "%T/chips/cortex/m3/sam3/timer",
  "%T/chips/cortex/m3/sam3/s/timer",
  "%T/chips/cortex/m3/sam3/eefc",
  "%T/chips/cortex/m3/sam3/s/eefc",
  "%T/chips/cortex/m3/sam3/wdtc",
  "%T/chips/cortex/m3/sam3/s/wdtc",
  "%T/chips/cortex/m3/sam3/matrix",
  "%T/chips/cortex/m3/sam3/s/matrix",
  "%T/chips/cortex/m3/sam3/pins",
  "%T/chips/cortex/m3/sam3/s/pins",
  "%T/chips/cortex/m3/sam3/smc",
  "%T/chips/cortex/m3/sam3/s/smc",
  "%T/chips/cortex/m3/sam3/uart",
  "%T/chips/cortex/m3/sam3/s/uart",
  "%T/chips/cortex/m3/sam3/pdc",
  "%T/chips/cortex/m3/sam3/s/pdc",
  "%T/chips/cortex/m3/sam3/spi",
  "%T/chips/cortex/m3/sam3/s/spi",
  "%T/chips/cortex/m3/sam3/s/adc",
  "%T/chips/cortex/m3/sam3/s/dacc",
  "%T/chips/cortex/m3/sam3/s/pwm",
  "%T/chips/cc2520",
  "%T/chips/cc2520/layers",
  "%T/chips/cc2520/util",
  "%T/platforms/sam3s_ek/lcd",
  "%T/platforms/sam3s_ek/chips/cc2520",
  "%T/lib/timer",
  "%T/lib/serial",
  "%T/lib/power",
  "%T/lib/rfxlink/layers",
  "%T/lib/rfxlink/util",
);

@opts = qw(

  -gcc=arm-none-eabi-gcc
  -mcpu=cortex-m3
  -nostartfiles
  -fnesc-target=env
  -fnesc-no-debug

);

push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

$ENV{NESC_MACHINE} = "structure_size_boundary=32, pointer=4,4 float=4,4 double=8,4 long_double=8,4 short=2,2 int=4,4 long=4,4 long_long=8,4 int1248_align=1,2,4,4 wchar_size_size=4,4 char_wchar_signed=false,true";
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/ActiveMessageC.nc000066400000000000000000000044461207233610700234570ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 * Author: Thomas Schmid (adapted to CC2520)
 */

#include 

configuration ActiveMessageC
{
  provides
  {
    interface SplitControl;

    interface AMSend[uint8_t id];
    interface Receive[uint8_t id];
    interface Receive as Snoop[uint8_t id];
    interface SendNotifier[am_id_t id];

    interface Packet;
    interface AMPacket;

    interface PacketAcknowledgements;
    interface LowPowerListening;
    interface PacketLink;
    interface RadioChannel;

    interface PacketTimeStamp as PacketTimeStampMicro;
    interface PacketTimeStamp as PacketTimeStampMilli;
  }
}

implementation
{
  components CC2520ActiveMessageC as MessageC;

  components RadioControlP, HplSam3TCC;

  //SplitControl = MessageC;
  SplitControl = RadioControlP;
  RadioControlP.LowRadioControl -> MessageC;
  RadioControlP.TC -> HplSam3TCC.TC0; // We use TIOA1 which is channel 1 on TC0

  AMSend = MessageC;
  Receive = MessageC.Receive;
  Snoop = MessageC.Snoop;
  SendNotifier = MessageC;

  Packet = MessageC;
  AMPacket = MessageC;

  PacketAcknowledgements = MessageC;
  LowPowerListening = MessageC;
  PacketLink = MessageC;
  RadioChannel = MessageC;

  PacketTimeStampMilli = MessageC;
  PacketTimeStampMicro = MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/Ieee154MessageC.nc000066400000000000000000000034541207233610700233430ustar00rootroot00000000000000/*
 * "Copyright (c) 2008 The Regents of the University  of California.
 * All rights reserved."
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 */


/**
 *
 * @author Stephen Dawson-Haggerty
 */
 
configuration Ieee154MessageC  {
  provides {
    interface SplitControl;

    interface Resource as SendResource[uint8_t clientId];
    interface Ieee154Send;
    interface Receive as Ieee154Receive;

    interface Ieee154Packet;
    interface Packet;

    interface PacketAcknowledgements;
    interface LinkPacketMetadata;
    interface LowPowerListening;
    interface PacketLink;
  }

} implementation {
  components CC2420Ieee154MessageC as Msg;

  SplitControl = Msg;
  SendResource = Msg;
  Ieee154Send  = Msg;
  Ieee154Receive = Msg;
  Ieee154Packet = Msg;
  Packet = Msg;
  
  PacketAcknowledgements = Msg;
  LinkPacketMetadata = Msg;
  LowPowerListening = Msg;
  PacketLink = Msg;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/LedsP.nc000066400000000000000000000076111207233610700216400ustar00rootroot00000000000000/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 * Adapted because LED 2 (red) is active high on SAM3U_EK.
 *
 * @author Joe Polastre
 * @author Philip Levis
 * @author Wanja Hofer 
 *
 * @date   March 21, 2005
 */

module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led0.clr();
      call Led1.set();
      call Led2.set();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
    call Led1.clr();
    DBGLED(1);
  }

  async command void Leds.led1Off() {
    call Led1.set();
    DBGLED(1);
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    DBGLED(1);
  }

  async command void Leds.led2On() {
    call Led2.clr();
    DBGLED(2);
  }

  async command void Leds.led2Off() {
    call Led2.set();
    DBGLED(2);
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    DBGLED(2);
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (!call Led0.get()) {
	rval |= LEDS_LED0;
      }
      if (!call Led1.get()) {
	rval |= LEDS_LED1;
      }
      if (call Led2.get()) {
	rval |= LEDS_LED2;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	call Leds.led0On();
      }
      else {
	call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
	call Leds.led1On();
      }
      else {
	call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
	call Leds.led2On();
      }
      else {
	call Leds.led2Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/MoteClockC.nc000066400000000000000000000034731207233610700226160ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

configuration MoteClockC
{

    provides {
        interface Init;
    }
}

implementation
{

    components MoteClockP, HplSam3sClockC;

    Init = MoteClockP;
    MoteClockP.HplSam3Clock -> HplSam3sClockC;

  components LedsC;
  MoteClockP.Leds -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/MoteClockP.nc000066400000000000000000000105371207233610700226320ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Basic Clock Initialization.
 *
 * @author Thomas Schmid
 */

#include "sam3spmchardware.h"
#include "sam3ssupchardware.h"
#include "sam3eefchardware.h"
#include "sam3wdtchardware.h"
#include "sam3matrixhardware.h"

extern void SetDefaultMaster(unsigned char enable);


module MoteClockP
{
    provides 
    {
        interface Init;
    }
    uses
    {
        interface HplSam3Clock;
	interface Leds;
    }
}

implementation
{

    command error_t Init.init(){
        wdtc_mr_t mr = WDTC->mr;
        eefc_fmr_t fmr = EEFC0->fmr;

        // Set 2 WS for Embedded Flash Access
        fmr.bits.fws = 3;
        EEFC0->fmr = fmr;

        // Disable Watchdog
        mr.bits.wddis = 1;
        WDTC->mr = mr;

        // Select external slow clock
        call HplSam3Clock.slckExternalOsc();
        //call HplSam3Clock.slckRCOsc();

        // Initialize main oscillator
        call HplSam3Clock.mckInit48();
        //call HplSam3Clock.mckInit12RC();

        // Enable clock for UART
        // FIXME: this should go into the UART start/stop!
        //PMC->pcdr.bits.dbgu = 1;

        /* Optimize CPU setting for speed */
        SetDefaultMaster(1);

        return SUCCESS;

    }

    //------------------------------------------------------------------------------
    /// Enable or disable default master access
    /// \param enable 1 enable defaultMaster settings, 0 disable it.
    //------------------------------------------------------------------------------
    void SetDefaultMaster(unsigned char enable) @C() 
    {
        // Set default master
        if (enable == 1) {
            // Set default master: SRAM0 -> Cortex-M3 System
            MATRIX->scfg0.bits.fixed_defmstr = 1;
            MATRIX->scfg0.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;

            // Set default master: SRAM1 -> Cortex-M3 System
            MATRIX->scfg1.bits.fixed_defmstr = 1;
            MATRIX->scfg1.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;

            // Set default master: Internal flash0 -> Cortex-M3 Instruction/Data
            MATRIX->scfg3.bits.fixed_defmstr = 0;
            MATRIX->scfg3.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;
        } else {

            // Clear default master: SRAM0 -> Cortex-M3 System
            MATRIX->scfg0.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;

            // Clear default master: SRAM1 -> Cortex-M3 System
            MATRIX->scfg1.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;

            // Clear default master: Internal flash0 -> Cortex-M3 Instruction/Data
            MATRIX->scfg3.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;
        }
    }

    /**
     * informs us when the main clock changes
     */
    async event void HplSam3Clock.mainClockChanged() {}

}

tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/PlatformC.nc000066400000000000000000000043561207233610700225230ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Wanja Hofer 
 */

#include "hardware.h"

configuration PlatformC
{
	provides
	{
		/* Called after platform_bootstrap() and Scheduler.init() (see TEP 107)
		 * I/O pin configuration, clock calibration, and LED configuration */
		interface Init;
	}
}

implementation
{
  components PlatformP, MoteClockC, HplSam3TCC as MoteTimerC;
  components McuSleepC;

  Init = PlatformP;

  PlatformP.MoteClockInit -> MoteClockC;
  PlatformP.IRQInit -> MoteClockC;
  PlatformP.MoteTimerInit -> MoteTimerC;

  // Used so we can initialize the platform in a state where it would draw
  // the lowest current possible if put to sleep.
  PlatformP.Sam3LowPower -> McuSleepC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/PlatformLedsC.nc000066400000000000000000000041431207233610700233250ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Connection of LEDs to the GPIO pins on the SAM3S-EK board.
 *
 * @author Thomas Schmid 
 */

configuration PlatformLedsC
{
	provides
	{
		interface GeneralIO as Led0;
		interface GeneralIO as Led1;
		interface GeneralIO as Led2;
	}
	uses
	{
		interface Init;
	}
}
implementation
{
	components HplSam3sGeneralIOC as IO;
	components PlatformP;

	Init = PlatformP.LedsInit;

	Led0 = IO.PioC20; // Pin C20 = RED, active high
	Led1 = IO.PioA19; // Pin A19 = BLUE, active low
	Led2 = IO.PioA20; // Pin A20 = GREEN, active low
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/PlatformP.nc000066400000000000000000000045071207233610700225360ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Wanja Hofer 
 */

#include "hardware.h"

module PlatformP
{
    provides
	{
        interface Init;
    }
	uses
	{
		interface Init as LedsInit;
        interface Init as MoteClockInit;
        interface Init as IRQInit;
        interface Init as MoteTimerInit;
        interface Sam3LowPower;
	}
}

implementation
{
	command error_t Init.init()
	{
		/* I/O pin configuration, clock calibration, and LED configuration
		 * (see TEP 107)
		 */
		call IRQInit.init();
    call MoteClockInit.init();
    call MoteTimerInit.init();
		call LedsInit.init();

		return SUCCESS;
	}

    async event void Sam3LowPower.customizePio() {
        // currently not optimized for sam3s-ek
    }

	default command error_t LedsInit.init()
	{
		return SUCCESS;
	}
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/PlatformSerialC.nc000066400000000000000000000035451207233610700236620ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Wanja Hofer 
 */

configuration PlatformSerialC
{
	provides
	{
		interface StdControl;
		interface UartStream;
		interface UartByte;
	}
}
implementation
{
	components HilSam3UartC;

	StdControl = HilSam3UartC;
	UartStream = HilSam3UartC;
	UartByte = HilSam3UartC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/TimeSyncMessageC.nc000077500000000000000000000045751207233610700240050ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:  
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

#include 

configuration TimeSyncMessageC
{
	provides
	{
		interface SplitControl;

		interface Receive[uint8_t id];
		interface Receive as Snoop[am_id_t id];
		interface Packet;
		interface AMPacket;

		interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketRadio;

		interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketMilli;
	}
}

implementation
{
	components CC2520TimeSyncMessageC as MAC;

	SplitControl	= MAC;
  Receive		= MAC.Receive;
	Snoop		= MAC.Snoop;
	Packet		= MAC;
	AMPacket	= MAC;

	TimeSyncAMSendRadio	= MAC;
	TimeSyncPacketRadio	= MAC;
	TimeSyncAMSendMilli	= MAC;
	TimeSyncPacketMilli	= MAC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/chips/000077500000000000000000000000001207233610700214105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/chips/cc2520/000077500000000000000000000000001207233610700223065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/chips/cc2520/CC2520SpiConfigC.nc000066400000000000000000000056061207233610700253420ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah. 
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:  
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *
 *
 * @author Thomas Schmid
 */

module CC2520SpiConfigC 
{
    provides 
    {
        interface Init;
        interface ResourceConfigure;
    }
    uses {
        interface HplSam3SpiChipSelConfig;
        interface HplSam3SpiConfig;
    }
}
implementation {

    command error_t Init.init() {
        // configure clock 
        call HplSam3SpiChipSelConfig.setBaud(20);
        call HplSam3SpiChipSelConfig.setClockPolarity(0); // logic zero is inactive 
        call HplSam3SpiChipSelConfig.setClockPhase(1);    // out on rising, in on falling 
        call HplSam3SpiChipSelConfig.disableAutoCS();     // disable automatic rising of CS after each transfer 
        //call HplSam3SpiChipSelConfig.enableAutoCS(); 
 
        // if the CS line is not risen automatically after the last tx. The lastxfer bit has to be used. 
        call HplSam3SpiChipSelConfig.enableCSActive();    
        //call HplSam3SpiChipSelConfig.disableCSActive();  
 
        call HplSam3SpiChipSelConfig.setBitsPerTransfer(SPI_CSR_BITS_8); 
        call HplSam3SpiChipSelConfig.setTxDelay(0); 
        call HplSam3SpiChipSelConfig.setClkDelay(0); 
        return SUCCESS;
    }

    async command void ResourceConfigure.configure() {
        // Do stuff here
    }
    
    async command void ResourceConfigure.unconfigure() {
        // Do stuff here...
    }
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/chips/cc2520/CounterRadio32C.nc000066400000000000000000000043231207233610700255000ustar00rootroot00000000000000/* 
 * Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * CounterRadioC provides a 32-bit counter for the radio. It provides the
 * link between TRadio (generic radio timestamping precision) and the actual
 * timer implementations.
 *
 * @author Thomas Schmid
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

configuration CounterRadio32C
{
  provides interface Counter;
}
implementation
{
  components HilSam3TCCounterTMicroC as CounterFrom;
  components new TransformCounterC(TMicro,uint32_t,TMicro,uint16_t,0,uint16_t) as Transform;

  Counter = Transform;

  Transform.CounterFrom -> CounterFrom;
}

tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/chips/cc2520/HplCC2520C.nc000066400000000000000000000070411207233610700241770ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah. 
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:  
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *
 *
 * @author Thomas Schmid
 */

#include 

configuration HplCC2520C
{
    provides
    {

      interface GeneralIO as CCA;
      interface GeneralIO as CSN;
      interface GeneralIO as FIFO;
      interface GeneralIO as FIFOP;
      interface GeneralIO as RSTN;
      interface GeneralIO as SFD;
      interface GeneralIO as VREN;
      interface GpioCapture as SfdCapture;
      interface GpioInterrupt as FifopInterrupt;
      interface GpioInterrupt as FifoInterrupt;

      interface SpiByte;
      interface SpiPacket;


      interface Resource as SpiResource;

      //interface FastSpiByte;

      //interface GeneralIO as SLP_TR;
      //interface GeneralIO as RSTN;

      //interface GpioCapture as IRQ;
      interface Alarm as Alarm;
      interface LocalTime as LocalTimeRadio;
    }
}

implementation
{
  components new Sam3Spi2C() as SpiC;
  SpiResource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;

  components CC2520SpiConfigC as RadioSpiConfigC;
  RadioSpiConfigC.Init <- SpiC;
  RadioSpiConfigC.ResourceConfigure <- SpiC;
  RadioSpiConfigC.HplSam3SpiChipSelConfig -> SpiC;

  /*
    components HplSam3sGeneralIOC as IO;
    SLP_TR = IO.PioC22;
    RSTN = IO.PioC27;
    SELN = IO.PioA19;
    
    components HplSam3sGeneralIOC;
    IRQ = HplSam3sGeneralIOC.CapturePioB1;
  */

  components HplSam3sGeneralIOC as IO;

  CCA    = IO.PioA25; // need to remove R26 & R36!
  CSN    = IO.PioB2;
  FIFO   = IO.PioA24; // need to remove R27 & R37!
  FIFOP  = IO.PioA16;
  RSTN   = IO.PioA18;
  SFD    = IO.PioA15;
  VREN   = IO.PioA17;

  components new GpioCaptureC() as SfdCaptureC;
  components HplSam3TCC;
  SfdCapture = SfdCaptureC;
  SfdCaptureC.TCCapture -> HplSam3TCC.TC1Capture; // TIOA1
  SfdCaptureC.GeneralIO -> IO.HplPioA15;

  FifopInterrupt = IO.InterruptPioA16;
  FifoInterrupt = IO.InterruptPioA24;

  components new AlarmTMicro16C() as AlarmC;
  Alarm = AlarmC;
    
  components LocalTimeMicroC;
  LocalTimeRadio = LocalTimeMicroC;
}

tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/chips/cc2520/RadioConfig.h000066400000000000000000000057531207233610700246550ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Janos Sallai, Miklos Maroti
 * Author: Thomas Schmid (adapted for CC2520)
 */

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include 
//#include 

/* This is the default value of the PA_POWER field of the TXCTL register. */
#ifndef CC2520_DEF_RFPOWER
#define CC2520_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the FSCTRL register. */
#ifndef CC2520_DEF_CHANNEL
#define CC2520_DEF_CHANNEL	11
#endif

/* The number of microseconds a sending mote will wait for an acknowledgement */
#ifndef SOFTWAREACK_TIMEOUT
#define SOFTWAREACK_TIMEOUT	800
#endif

/**
 * This is the timer type of the radio alarm interface
 */
typedef TMicro TRadio;
typedef uint16_t tradio_size;

/**
 * The number of radio alarm ticks per one microsecond .
 *
 * Removed three '0s because of overflow...
 */
#define RADIO_ALARM_MICROSEC    48000 / 2 / 1000

enum cc2520_timing_enums {
  CC2520_SYMBOL_TIME = 16 * RADIO_ALARM_MICROSEC, // 16us
  IDLE_2_RX_ON_TIME = 12 * CC2520_SYMBOL_TIME,
  PD_2_IDLE_TIME = 860 * RADIO_ALARM_MICROSEC, // .86ms
};


/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
// FIXME: this needs to be calibrated
#define RADIO_ALARM_MILLI_EXP	(5)

/**
 * Make PACKET_LINK automaticaly enabled for Ieee154MessageC
 */
#if !defined(TFRAMES_ENABLED) && !defined(PACKET_LINK)
#define PACKET_LINK
#endif

#endif//__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/chips/cc2520/RadioControlP.nc000066400000000000000000000045721207233610700253570ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah. 
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:  
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *
 *
 * @author Thomas Schmid
 */

module RadioControlP{
  provides interface SplitControl as HighRadioControl;
  uses interface SplitControl as LowRadioControl;
  uses interface HplSam3TC as TC;
}
implementation{
  command error_t HighRadioControl.start(){
    // start TC0
    call TC.enableTC1();
    return call LowRadioControl.start();
  }

  command error_t HighRadioControl.stop(){
    // stop TC1 
    call TC.disableTC1();
    return call LowRadioControl.stop();
  }

  event void LowRadioControl.startDone(error_t error){
    signal HighRadioControl.startDone(error);
  }

  event void LowRadioControl.stopDone(error_t error) {
    signal HighRadioControl.stopDone(error);
  }

  default event void HighRadioControl.startDone(error_t error) {}

  default event void HighRadioControl.stopDone(error_t error) {}

}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/hardware.h000066400000000000000000000047141207233610700222560ustar00rootroot00000000000000/*
 * Copyright (c) 2010 University of Utah.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Definitions of stuff specific to the SAM3S-EK board.
 * Includes definitions for the SAM3S MCU.
 *
 * @author Thomas Schmid
 */

#ifndef HARDWARE_H
#define HARDWARE_H

#include "sam3shardware.h"

// #define this so we don't doubly define time_t with conflicting types
// in SD card implementation Time.h file
#define __time_t_defined
#include 

#ifndef PLATFORM_BAUDRATE
#define PLATFORM_BAUDRATE (57600)
#endif

#define IRQ_PRIO_UDPHS    (0x81)
#define IRQ_PRIO_TWI1     (0x82)
#define IRQ_PRIO_TWI0     (0x83)
#define IRQ_PRIO_DMAC     (0x84)
#define IRQ_PRIO_ADC      (0x85)
#define IRQ_PRIO_DAC      (0x85)
#define IRQ_PRIO_PWM      (0x85)
#define IRQ_PRIO_PIO      (0x86)
#define IRQ_PRIO_SPI      (0x87)
#define IRQ_PRIO_UART     (0x88)
#define IRQ_PRIO_USART0   (0x89)
#define IRQ_PRIO_USART1   (0x90)
#define IRQ_PRIO_USART2   (0x91)
#define IRQ_PRIO_HSMCI    (0x92)

#endif // HARDWARE_H
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/000077500000000000000000000000001207233610700210445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/Draw.nc000066400000000000000000000061611207233610700222670ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

interface Draw
{
    async command void fill(uint32_t color);

    async command void drawPixel(
            uint32_t x,
            uint32_t y,
            uint32_t c);

    async command void drawRectangle(
            uint32_t x,
            uint32_t y,
            uint32_t width,
            uint32_t height,
            uint32_t color);

    async command void drawString(
            uint32_t x,
            uint32_t y,
            const char *pString,
            uint32_t color);

    async command void drawStringWithBGColor(
            uint32_t x,
            uint32_t y,
            const char *pString,
            uint32_t fontColor,
            uint32_t bgColor);

    async command void drawInt(
            uint32_t x,
            uint32_t y,
            uint32_t n,
            int8_t sign,
            uint32_t fontColor);

    async command void drawIntWithBGColor(
            uint32_t x,
            uint32_t y,
            uint32_t n,
            int8_t sign,
            uint32_t fontColor,
            uint32_t bgColor);

    async command void getStringSize(
            const char *pString,
            uint32_t *pWidth,
            uint32_t *pHeight);

    async command void drawChar(
            uint32_t x,
            uint32_t y,
            char c,
            uint32_t color);

    async command void drawCharWithBGColor(
            uint32_t x,
            uint32_t y,
            char c,
            uint32_t fontColor,
            uint32_t bgColor);
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/Hx8347.nc000066400000000000000000000044641207233610700223030ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

interface Hx8347
{
    async command void writeReg(void *pLcdBase, uint8_t reg, uint16_t data);
    async command uint16_t readReg(void *pLcdBase, uint8_t reg);
    async command uint16_t readStatus(void *pLcdBase);
    async command void writeRAM_Prepare(void *pLcdBase);
    async command void writeRAM(void *pLcdBase, uint16_t color);
    async command uint16_t readRAM(void *pLcdBase);
    command void initialize(void *pLcdBase);
    event void initializeDone(error_t err);
    async command void setCursor(void *pLcdBase, uint16_t x, uint16_t y);
    command void on(void *pLcdBase);
    event void onDone();
    async command void off(void *pLcdBase);
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/Hx8347C.nc000066400000000000000000000350761207233610700224110ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

module Hx8347C
{
    uses
    {
        interface Timer as InitTimer;
        interface Timer as OnTimer;
    }

    provides interface Hx8347;
}
implementation
{

    typedef volatile uint16_t REG16;

    enum {
        INIT0,
        INIT1,
        INIT2,
    };
    uint8_t initState = INIT0;


    enum {
        ON0,
        ON1,
        ON2,
    };
    uint8_t onState = ON0;

    void* spLcdBase;

#define BOARD_LCD_RS     (1 << 1)
    // LCD index register address
#define LCD_IR(baseAddr) (*((REG16 *)(baseAddr)))
    // LCD status register address
#define LCD_SR(baseAddr) (*((REG16 *)(baseAddr)))
    // LCD data address
#define LCD_D(baseAddr)  (*((REG16 *)((uint32_t)(baseAddr) + BOARD_LCD_RS)))

    // HX8347 ID code
#define HX8347_HIMAXID_CODE    0x47

    // HX8347 LCD Registers
#define HX8347_R00H        0x00
#define HX8347_R01H        0x01
#define HX8347_R02H        0x02
#define HX8347_R03H        0x03
#define HX8347_R04H        0x04
#define HX8347_R05H        0x05
#define HX8347_R06H        0x06
#define HX8347_R07H        0x07
#define HX8347_R08H        0x08
#define HX8347_R09H        0x09
#define HX8347_R0AH        0x0A
#define HX8347_R0CH        0x0C
#define HX8347_R0DH        0x0D
#define HX8347_R0EH        0x0E
#define HX8347_R0FH        0x0F
#define HX8347_R10H        0x10
#define HX8347_R11H        0x11
#define HX8347_R12H        0x12
#define HX8347_R13H        0x13
#define HX8347_R14H        0x14
#define HX8347_R15H        0x15
#define HX8347_R16H        0x16
#define HX8347_R18H        0x18
#define HX8347_R19H        0x19
#define HX8347_R1AH        0x1A
#define HX8347_R1BH        0x1B
#define HX8347_R1CH        0x1C
#define HX8347_R1DH        0x1D
#define HX8347_R1EH        0x1E
#define HX8347_R1FH        0x1F
#define HX8347_R20H        0x20
#define HX8347_R21H        0x21
#define HX8347_R22H        0x22
#define HX8347_R23H        0x23
#define HX8347_R24H        0x24
#define HX8347_R25H        0x25
#define HX8347_R26H        0x26
#define HX8347_R27H        0x27
#define HX8347_R28H        0x28
#define HX8347_R29H        0x29
#define HX8347_R2AH        0x2A
#define HX8347_R2BH        0x2B
#define HX8347_R2CH        0x2C
#define HX8347_R2DH        0x2D
#define HX8347_R35H        0x35
#define HX8347_R36H        0x36
#define HX8347_R37H        0x37
#define HX8347_R38H        0x38
#define HX8347_R39H        0x39
#define HX8347_R3AH        0x3A
#define HX8347_R3BH        0x3B
#define HX8347_R3CH        0x3C
#define HX8347_R3DH        0x3D
#define HX8347_R3EH        0x3E
#define HX8347_R40H        0x40
#define HX8347_R41H        0x41
#define HX8347_R42H        0x42
#define HX8347_R43H        0x43
#define HX8347_R44H        0x44
#define HX8347_R45H        0x45
#define HX8347_R46H        0x46
#define HX8347_R47H        0x47
#define HX8347_R48H        0x48
#define HX8347_R49H        0x49
#define HX8347_R4AH        0x4A
#define HX8347_R4BH        0x4B
#define HX8347_R4CH        0x4C
#define HX8347_R4DH        0x4D
#define HX8347_R4EH        0x4E
#define HX8347_R4FH        0x4F
#define HX8347_R50H        0x50
#define HX8347_R51H        0x51
#define HX8347_R64H        0x64
#define HX8347_R65H        0x65
#define HX8347_R66H        0x66
#define HX8347_R67H        0x67
#define HX8347_R70H        0x70
#define HX8347_R72H        0x72
#define HX8347_R90H        0x90
#define HX8347_R91H        0x91
#define HX8347_R93H        0x93
#define HX8347_R94H        0x94
#define HX8347_R95H        0x95

    /**
     * Write data to LCD Register.
     * \param pLcdBase   LCD base address.
     * \param reg        Register address.
     * \param data       Data to be written.
     */
    async command void Hx8347.writeReg(void *pLcdBase, uint8_t reg, uint16_t data)
    {
        LCD_IR(pLcdBase) = reg;
        LCD_D(pLcdBase)  = data;
    }

    /**
     * Read data from LCD Register.
     * \param pLcdBase   LCD base address.
     * \param reg        Register address.
     * \return data      Data to be read.
     */
    async command uint16_t Hx8347.readReg(void *pLcdBase, uint8_t reg)
    {
        LCD_IR(pLcdBase) = reg;
        return LCD_D(pLcdBase);
    }

    /**
     * Read LCD status Register.
     * \param pLcdBase   LCD base address.
     * \param reg        Register address.
     * \return data      Status Data.
     */
    async command uint16_t Hx8347.readStatus(void *pLcdBase)
    {
        return LCD_SR(pLcdBase);
    }

    /**
     * Prepare to write GRAM data.
     * \param pLcdBase   LCD base address.
     */
    async command void Hx8347.writeRAM_Prepare(void *pLcdBase)
    {
        LCD_IR(pLcdBase) = HX8347_R22H;
    }

    /**
     * Write data to LCD GRAM.
     * \param pLcdBase   LCD base address.
     * \param color      16-bits RGB color.
     */
    async command void Hx8347.writeRAM(void *pLcdBase, uint16_t color)
    {
        // Write 16-bit GRAM Reg
        LCD_D(pLcdBase) = color;
    }

    /**
     * Read GRAM data.
     * \param pLcdBase   LCD base address.
     * \return           16-bits RGB color.
     */
    async command uint16_t Hx8347.readRAM(void *pLcdBase)
    {
        // Read 16-bit GRAM Reg
        return LCD_D(pLcdBase);
    }

    event void InitTimer.fired()
    {
        // advance in the initialization 
        call Hx8347.initialize(spLcdBase);
    }

    /**
     * Initialize the LCD controller.
     * \param pLcdBase   LCD base address.
     */
    command void Hx8347.initialize(void *pLcdBase)
    {
        uint16_t chipid;

        switch(initState)
        {
            case INIT0:
                spLcdBase = pLcdBase;

                // Check HX8347 chipid
                chipid = call Hx8347.readReg(pLcdBase, HX8347_R67H);
                if(chipid != HX8347_HIMAXID_CODE) {

                    // Read HX8347 chip ID error, skip initialization.
                    signal Hx8347.initializeDone(FAIL);
                    return ;
                }

                // Start internal OSC
                call Hx8347.writeReg(pLcdBase, HX8347_R19H, 0x49); // OSCADJ=10 0000, OSD_EN=1 //60Hz
                call Hx8347.writeReg(pLcdBase, HX8347_R93H, 0x0C); // RADJ=1100

                // Power on flow
                call Hx8347.writeReg(pLcdBase, HX8347_R44H, 0x4D); // VCM=100 1101
                call Hx8347.writeReg(pLcdBase, HX8347_R45H, 0x11); // VDV=1 0001
                call Hx8347.writeReg(pLcdBase, HX8347_R20H, 0x40); // BT=0100
                call Hx8347.writeReg(pLcdBase, HX8347_R1DH, 0x07); // VC1=111
                call Hx8347.writeReg(pLcdBase, HX8347_R1EH, 0x00); // VC3=000
                call Hx8347.writeReg(pLcdBase, HX8347_R1FH, 0x04); // VRH=0100

                call Hx8347.writeReg(pLcdBase, HX8347_R1CH, 0x04); // AP=100
                call Hx8347.writeReg(pLcdBase, HX8347_R1BH, 0x10); // GASENB=0, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0
                initState = INIT1;
                call InitTimer.startOneShot(50);
                break;

            case INIT1:

                call Hx8347.writeReg(pLcdBase, HX8347_R43H, 0x80); // Set VCOMG=1
                initState = INIT2;
                call InitTimer.startOneShot(50);
                break;

            case INIT2:

                // Gamma for CMO 2.8
                call Hx8347.writeReg(pLcdBase, HX8347_R46H, 0x95);
                call Hx8347.writeReg(pLcdBase, HX8347_R47H, 0x51);
                call Hx8347.writeReg(pLcdBase, HX8347_R48H, 0x00);
                call Hx8347.writeReg(pLcdBase, HX8347_R49H, 0x36);
                call Hx8347.writeReg(pLcdBase, HX8347_R4AH, 0x11);
                call Hx8347.writeReg(pLcdBase, HX8347_R4BH, 0x66);
                call Hx8347.writeReg(pLcdBase, HX8347_R4CH, 0x14);
                call Hx8347.writeReg(pLcdBase, HX8347_R4DH, 0x77);
                call Hx8347.writeReg(pLcdBase, HX8347_R4EH, 0x13);
                call Hx8347.writeReg(pLcdBase, HX8347_R4FH, 0x4C);
                call Hx8347.writeReg(pLcdBase, HX8347_R50H, 0x46);
                call Hx8347.writeReg(pLcdBase, HX8347_R51H, 0x46);

                //240x320 window setting
                call Hx8347.writeReg(pLcdBase, HX8347_R02H, 0x00); // Column address start2
                call Hx8347.writeReg(pLcdBase, HX8347_R03H, 0x00); // Column address start1
                call Hx8347.writeReg(pLcdBase, HX8347_R04H, 0x00); // Column address end2
                call Hx8347.writeReg(pLcdBase, HX8347_R05H, 0xEF); // Column address end1
                call Hx8347.writeReg(pLcdBase, HX8347_R06H, 0x00); // Row address start2
                call Hx8347.writeReg(pLcdBase, HX8347_R07H, 0x00); // Row address start1
                call Hx8347.writeReg(pLcdBase, HX8347_R08H, 0x01); // Row address end2
                call Hx8347.writeReg(pLcdBase, HX8347_R09H, 0x3F); // Row address end1

                // Display Setting
                call Hx8347.writeReg(pLcdBase, HX8347_R01H, 0x06); // IDMON=0, INVON=1, NORON=1, PTLON=0
                call Hx8347.writeReg(pLcdBase, HX8347_R16H, 0xC8); // MY=1, MX=1, MV=0, BGR=1
                call Hx8347.writeReg(pLcdBase, HX8347_R23H, 0x95); // N_DC=1001 0101
                call Hx8347.writeReg(pLcdBase, HX8347_R24H, 0x95); // P_DC=1001 0101
                call Hx8347.writeReg(pLcdBase, HX8347_R25H, 0xFF); // I_DC=1111 1111
                call Hx8347.writeReg(pLcdBase, HX8347_R27H, 0x06); // N_BP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R28H, 0x06); // N_FP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R29H, 0x06); // P_BP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R2AH, 0x06); // P_FP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R2CH, 0x06); // I_BP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R2DH, 0x06); // I_FP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R3AH, 0x01); // N_RTN=0000, N_NW=001
                call Hx8347.writeReg(pLcdBase, HX8347_R3BH, 0x01); // P_RTN=0000, P_NW=001
                call Hx8347.writeReg(pLcdBase, HX8347_R3CH, 0xF0); // I_RTN=1111, I_NW=000
                call Hx8347.writeReg(pLcdBase, HX8347_R3DH, 0x00); // DIV=00
                call Hx8347.writeReg(pLcdBase, HX8347_R3EH, 0x38); // SON=38h
                call Hx8347.writeReg(pLcdBase, HX8347_R40H, 0x0F); // GDON=0Fh
                call Hx8347.writeReg(pLcdBase, HX8347_R41H, 0xF0); // GDOF=F0h
                initState = INIT0;
                signal Hx8347.initializeDone(SUCCESS);
                break;
        }
    }


    event void OnTimer.fired()
    {
        call Hx8347.on(spLcdBase);
    }
    /**
     * Turn on the LCD.
     * \param pLcdBase   LCD base address.
     */
    command void Hx8347.on(void *pLcdBase)
    {
        switch(onState)
        {
            case ON0:
                // Display ON Setting
                spLcdBase = pLcdBase;
                call Hx8347.writeReg(pLcdBase, HX8347_R90H, 0x7F); // SAP=0111 1111
                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x04); // GON=0, DTE=0, D=01
                call OnTimer.startOneShot(100);
                onState = ON1;
                break;

            case ON1:
                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x24); // GON=1, DTE=0, D=01
                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x2C); // GON=1, DTE=0, D=11
                call OnTimer.startOneShot(100);
                onState = ON2;
                break;

            case ON2:
                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x3C); // GON=1, DTE=1, D=11
                onState = ON0;
                signal Hx8347.onDone();
                break;
        }
    }

    /**
     * Turn off the LCD.
     * \param pLcdBase   LCD base address.
     */
    async command void Hx8347.off(void *pLcdBase)
    {
        call Hx8347.writeReg(pLcdBase, HX8347_R90H, 0x00); // SAP=0000 0000
        call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x00); // GON=0, DTE=0, D=00
    }

    /**
     * Set cursor of LCD srceen.
     * \param pLcdBase   LCD base address.
     * \param x          X-coordinate of upper-left corner on LCD.
     * \param y          Y-coordinate of upper-left corner on LCD.
     */
    async command void Hx8347.setCursor(void *pLcdBase, uint16_t x, uint16_t y)
    {
        uint8_t x1, x2, y1l, y2;

        x1 = x & 0xff;
        x2 = (x & 0xff00) >>8;
        y1l = y & 0xff;
        y2 = (y & 0xff00) >>8;
        call Hx8347.writeReg(pLcdBase, HX8347_R02H, x2); // column high
        call Hx8347.writeReg(pLcdBase, HX8347_R03H, x1); // column low
        call Hx8347.writeReg(pLcdBase, HX8347_R06H, y2); // row high
        call Hx8347.writeReg(pLcdBase, HX8347_R07H, y1l); // row low
    }

    default event void Hx8347.initializeDone(error_t err) {};
    default event void Hx8347.onDone() {};
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/Ili9325.nc000066400000000000000000000050201207233610700224230ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

interface Ili9325 
{
    async command void writeReg(void *pLcdBase, uint8_t reg, uint16_t data);
    async command uint16_t readReg(void *pLcdBase, uint8_t reg);
    async command void writeRAM_Prepare(void *pLcdBase);
    async command void writeRAM(void *pLcdBase, uint32_t color);
    async command void readRAM_Prepare(void *pLcdBase);
    async command uint16_t readRAM(void *pLcdBase);
    command void initialize(void *pLcdBase);
    event void initializeDone(error_t err);
    async command void setCursor(void *pLcdBase, uint16_t x, uint16_t y);
    command void on(void *pLcdBase);
    async command void off(void *pLcdBase);
    async command void powerDown(void *pLcdBase);
    async command void setDisplayPortrait(void *pLcdBase, uint32_t dwRGB);
    async command void setWindow( void *pLcdBase, uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight );
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/Ili9325C.nc000077500000000000000000000335221207233610700225410ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 *
 * @author Thomas Schmid
 */

#include "ili9325.h"

module Ili9325C
{
    uses
    {
        interface Timer as InitTimer;
    }

    provides interface Ili9325;
}
implementation
{

    enum {
        INIT0,
        INIT1,
        INIT2,
        INIT3,
        INIT4,
    };

    void* spLcdBase;

    uint8_t initState = INIT0;
    /**
     * \brief Write data to LCD Register.
     *
     * \param reg   Register address.
     * \param data  Data to be written.
     */
    async command void Ili9325.writeReg( void *pLcdBase, uint8_t reg, uint16_t data )
    {
        LCD_IR(pLcdBase) = 0;
        LCD_IR(pLcdBase) = reg;
        LCD_D(pLcdBase)  = (data >> 8) & 0xFF;
        LCD_D(pLcdBase)  = data & 0xFF;
    }

    /**
     * \brief Read data from LCD Register.
     *
     * \param reg   Register address.
     *
     * \return      Readed data.
     */
    async command uint16_t Ili9325.readReg(void *pLcdBase,  uint8_t reg )
    {
        uint16_t value;

        LCD_IR(pLcdBase) = 0;
        LCD_IR(pLcdBase) = reg;

        value = LCD_D(pLcdBase);
        value = (value << 8) | LCD_D(pLcdBase);

        return value;
    }


    /**
     * \brief Prepare to write GRAM data.
     */
    async command void Ili9325.writeRAM_Prepare( void *pLcdBase)
    {
        LCD_IR(pLcdBase) = 0 ;
        LCD_IR(pLcdBase) = ILI9325_R22H ; /* Write Data to GRAM (R22h)  */
    }

    /**
     * \brief Write data to LCD GRAM.
     *
     * \param color  24-bits RGB color.
     */
    async command void Ili9325.writeRAM(void *pLcdBase, uint32_t dwColor )
    {
        LCD_D(pLcdBase) = ((dwColor >> 16) & 0xFF);
        LCD_D(pLcdBase) = ((dwColor >> 8) & 0xFF);
        LCD_D(pLcdBase) = (dwColor & 0xFF);
    }

    /**
     * \brief Prepare to read GRAM data.
     */
    async command void Ili9325.readRAM_Prepare( void *pLcdBase)
    {
        LCD_IR(pLcdBase) = 0 ;
        LCD_IR(pLcdBase) = ILI9325_R22H ; /* Write Data to GRAM (R22h)  */
    }

    /**
     * \brief Read data to LCD GRAM.
     *
     * \return color  24-bits RGB color.
     */
    async command uint16_t Ili9325.readRAM( void *pLcdBase)
    {
        uint8_t value[2];
        uint16_t color;

        value[0] = LCD_D(pLcdBase);       /* dummy read */
        value[1] = LCD_D(pLcdBase);       /* dummy read */
        value[0] = LCD_D(pLcdBase);       /* data upper byte */
        value[1] = LCD_D(pLcdBase);       /* data lower byte */

        color = ((value[0] << 8) | (value[1] & 0xff)); 
        return color;
    }

    /**
     * \brief Initialize the LCD controller.
     */
    command void Ili9325.initialize( void *pLcdBase)
    {
        uint16_t chipid ;

        switch(initState)
        {
            case INIT0:

                spLcdBase = pLcdBase;

                /* Check ILI9325 chipid */
                chipid = call Ili9325.readReg(pLcdBase, ILI9325_R00H ) ; /* Driver Code Read (R00h) */
                if ( chipid != ILI9325_DEVICE_CODE )
                {
                    signal Ili9325.initializeDone(FAIL);
                    return;
                }

                /* Turn off LCD */
                call Ili9325.powerDown(pLcdBase) ;

                /* Start initial sequence */
                call Ili9325.writeReg(pLcdBase, ILI9325_R10H, 0x0000); /* DSTB = LP = STB = 0 */
                call Ili9325.writeReg(pLcdBase, ILI9325_R00H, 0x0001); /* start internal OSC */
                call Ili9325.writeReg(pLcdBase, ILI9325_R01H, ILI9325_R01H_SS ) ; /* set SS and SM bit */
                call Ili9325.writeReg(pLcdBase, ILI9325_R02H, 0x0700); /* set 1 line inversion */
                //LCD_writeReg(ILI9325_R03H, 0xD030); /* set GRAM write direction and BGR=1. */
                call Ili9325.writeReg(pLcdBase, ILI9325_R04H, 0x0000); /* Resize register */
                call Ili9325.writeReg(pLcdBase, ILI9325_R08H, 0x0207); /* set the back porch and front porch */
                call Ili9325.writeReg(pLcdBase, ILI9325_R09H, 0x0000); /* set non-display area refresh cycle ISC[3:0] */
                call Ili9325.writeReg(pLcdBase, ILI9325_R0AH, 0x0000); /* FMARK function */
                call Ili9325.writeReg(pLcdBase, ILI9325_R0CH, 0x0000); /* RGB interface setting */
                call Ili9325.writeReg(pLcdBase, ILI9325_R0DH, 0x0000); /* Frame marker Position */
                call Ili9325.writeReg(pLcdBase, ILI9325_R0FH, 0x0000); /* RGB interface polarity */

                /* Power on sequence */
                call Ili9325.writeReg(pLcdBase, ILI9325_R10H, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
                call Ili9325.writeReg(pLcdBase, ILI9325_R11H, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */
                call Ili9325.writeReg(pLcdBase, ILI9325_R12H, 0x0000); /* VREG1OUT voltage */
                call Ili9325.writeReg(pLcdBase, ILI9325_R13H, 0x0000); /* VDV[4:0] for VCOM amplitude */

                initState = INIT1;
                call InitTimer.startOneShot(200);
                break;
                
            case INIT1:

                call Ili9325.writeReg(pLcdBase, ILI9325_R10H, 0x1290); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
                call Ili9325.writeReg(pLcdBase, ILI9325_R11H, 0x0227); /* DC1[2:0], DC0[2:0], VC[2:0] */

                initState = INIT2;
                call InitTimer.startOneShot(50);
                break;

            case INIT2:
                call Ili9325.writeReg(pLcdBase, ILI9325_R12H, 0x001B); /* Internal reference voltage= Vci; */
                initState = INIT3;
                call InitTimer.startOneShot(50);
                break;

            case INIT3:

                call Ili9325.writeReg(pLcdBase, ILI9325_R13H, 0x1100); /* Set VDV[4:0] for VCOM amplitude */
                call Ili9325.writeReg(pLcdBase, ILI9325_R29H, 0x0019); /* Set VCM[5:0] for VCOMH */
                call Ili9325.writeReg(pLcdBase, ILI9325_R2BH, 0x000D); /* Set Frame Rate */
                initState = INIT4;
                call InitTimer.startOneShot(50);
                break;

            case INIT4:

                /* Adjust the Gamma Curve */
                call Ili9325.writeReg(pLcdBase, ILI9325_R30H, 0x0000);
                call Ili9325.writeReg(pLcdBase, ILI9325_R31H, 0x0204);
                call Ili9325.writeReg(pLcdBase, ILI9325_R32H, 0x0200);
                call Ili9325.writeReg(pLcdBase, ILI9325_R35H, 0x0007);
                call Ili9325.writeReg(pLcdBase, ILI9325_R36H, 0x1404);
                call Ili9325.writeReg(pLcdBase, ILI9325_R37H, 0x0705);
                call Ili9325.writeReg(pLcdBase, ILI9325_R38H, 0x0305);
                call Ili9325.writeReg(pLcdBase, ILI9325_R39H, 0x0707);
                call Ili9325.writeReg(pLcdBase, ILI9325_R3CH, 0x0701);
                call Ili9325.writeReg(pLcdBase, ILI9325_R3DH, 0x000e);

                call Ili9325.setDisplayPortrait(pLcdBase, 0);

                /* Vertical Scrolling */
                call Ili9325.writeReg(pLcdBase, ILI9325_R61H, 0x0001 ) ;
                call Ili9325.writeReg(pLcdBase, ILI9325_R6AH, 0x0000 ) ;

                /* Partial Display Control */
                call Ili9325.writeReg(pLcdBase, ILI9325_R80H, 0x0000);
                call Ili9325.writeReg(pLcdBase, ILI9325_R81H, 0x0000);
                call Ili9325.writeReg(pLcdBase, ILI9325_R82H, 0x0000);
                call Ili9325.writeReg(pLcdBase, ILI9325_R83H, 0x0000);
                call Ili9325.writeReg(pLcdBase, ILI9325_R84H, 0x0000);
                call Ili9325.writeReg(pLcdBase, ILI9325_R85H, 0x0000);

                /* Panel Control */
                call Ili9325.writeReg(pLcdBase, ILI9325_R90H, 0x0010);
                call Ili9325.writeReg(pLcdBase, ILI9325_R92H, 0x0600);
                call Ili9325.writeReg(pLcdBase, ILI9325_R95H, 0x0110);

                call Ili9325.setWindow( pLcdBase, 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
                call Ili9325.setCursor( pLcdBase, 0, 0 ) ;
                initState = INIT0;
                signal Ili9325.initializeDone(SUCCESS);
                break;
        }
    }

    event void InitTimer.fired()
    {
        call Ili9325.initialize(spLcdBase);
    }

    /**
     * \brief Turn on the LCD.
     */
    command void Ili9325.on( void *pLcdBase )
    {
        /* Display Control 1 (R07h) */
        /* When BASEE = 1, the base image is displayed. */
        /* GON and DTE Set the output level of gate driver G1 ~ G320 : Normal Display */
        /* D1=1 D0=1 BASEE=1: Base image display Operate */
        call Ili9325.writeReg(pLcdBase, ILI9325_R07H,   ILI9325_R07H_BASEE
                | ILI9325_R07H_GON | ILI9325_R07H_DTE
                | ILI9325_R07H_D1  | ILI9325_R07H_D0 ) ;
    }


    /**
     * \brief Turn off the LCD.
     */
    async command void Ili9325.off( void *pLcdBase)
    {
        /* Display Control 1 (R07h) */
        /* When BASEE = 0, no base image is displayed. */
        /* When the display is turned off by setting D[1:0] = 00, the ILI9325 internal display
           operation is halted completely. */
        /* PTDE1/0 = 0: turns off partial image. */
        call Ili9325.writeReg(pLcdBase, ILI9325_R07H, 0x00 ) ;
    }

    /**
     * \brief Power down the LCD.
     */
    async command void Ili9325.powerDown( void *pLcdBase)
    {
        /* Display Control 1 (R07h) */
        /* When BASEE = 0, no base image is displayed. */
        /* GON and DTE Set the output level of gate driver G1 ~ G320 : Normal Display */
        /* D1=1 D0=1 BASEE=1: Base image display Operate */
        call Ili9325.writeReg(pLcdBase, ILI9325_R07H,   ILI9325_R07H_GON | ILI9325_R07H_DTE
                | ILI9325_R07H_D1  | ILI9325_R07H_D0 ) ;
    }

    /**
     * \brief Set cursor of LCD srceen.
     *
     * \param x  X-coordinate of upper-left corner on LCD.
     * \param y  Y-coordinate of upper-left corner on LCD.
     */
    async command void Ili9325.setCursor( void *pLcdBase, uint16_t x, uint16_t y )
    {
        /* GRAM Horizontal/Vertical Address Set (R20h, R21h) */
        call Ili9325.writeReg(pLcdBase, ILI9325_R20H, x ) ; /* column */
        call Ili9325.writeReg(pLcdBase, ILI9325_R21H, y ) ; /* row */
    }

    async command void Ili9325.setDisplayPortrait(void *pLcdBase, uint32_t dwRGB)
    {
        uint16_t dwValue = 0 ;

        /* When AM = 1, the address is updated in vertical writing direction. */
        /* DFM Set the mode of transferring data to the internal RAM when TRI = 1. */
        /* When TRI = 1, data are transferred to the internal RAM in 8-bit x 3 transfers mode via the 8-bit interface. */
        /* Use the high speed write mode (HWM=1) */
        /* ORG = 1: The original address 00000h moves according to the I/D[1:0] setting.  */
        /* I/D[1:0] = 00 Horizontal : decrement Vertical :  decrement, AM=0:Horizontal */
        dwValue = ILI9325_R03H_AM | ILI9325_R03H_DFM | ILI9325_R03H_TRI | ILI9325_R03H_HWM; //| ILI9325_R03H_ORG ;

        if ( dwRGB == 0 )
        {
            /* BGR=1: Swap the RGB data to BGR in writing into GRAM. */
            dwValue |= ILI9325_R03H_BGR ;
        }
        call Ili9325.writeReg(pLcdBase,  ILI9325_R03H, dwValue ) ;

        //    LCD_WriteReg( ILI9325_R60H, (0x1d<<8)|0x00 ) ; /*Gate Scan Control */

        call Ili9325.setWindow( pLcdBase, 0, 0, BOARD_LCD_HEIGHT, BOARD_LCD_WIDTH ) ;

    }

    async command void Ili9325.setWindow( void *pLcdBase, uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight )
    {
        /* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */

        /* Set Horizontal Address Start Position */
        call Ili9325.writeReg( pLcdBase, ILI9325_R50H, (uint16_t)dwX ) ;

        /* Set Horizontal Address End Position */
        call Ili9325.writeReg( pLcdBase, ILI9325_R51H, (uint16_t)dwX+dwWidth-1 ) ;

        /* Set Vertical Address Start Position */
        call Ili9325.writeReg( pLcdBase, ILI9325_R52H, (uint16_t)dwY ) ;

        /* Set Vertical Address End Position */
        call Ili9325.writeReg( pLcdBase, ILI9325_R53H, (uint16_t)dwY+dwHeight-1 ) ;
    }

    default event void Ili9325.initializeDone(error_t err) {};
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/Lcd.nc000066400000000000000000000036711207233610700220770ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

interface Lcd
{
    command void initialize();

    event void initializeDone(error_t err);

    command void * displayBuffer(void *pBuffer);
    
    command void start();

    event void startDone();
    
    command void stop();

    command void setBacklight (uint8_t step);
}

tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/LcdC.nc000066400000000000000000000053451207233610700222020ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

configuration LcdC
{
    provides
    {
        interface Lcd;
        interface Draw;
    }
}
implementation
{
    
    components LcdP, Ili9325C;

    Lcd = LcdP.Lcd;
    Draw = LcdP.Draw;

    LcdP.Ili9325 -> Ili9325C;

    components new TimerMilliC() as T0;
    Ili9325C.InitTimer -> T0;

    components HplSam3sGeneralIOC;
    LcdP.DB0 -> HplSam3sGeneralIOC.HplPioC0;
    LcdP.DB1 -> HplSam3sGeneralIOC.HplPioC1;
    LcdP.DB2 -> HplSam3sGeneralIOC.HplPioC2;
    LcdP.DB3 -> HplSam3sGeneralIOC.HplPioC3;
    LcdP.DB4 -> HplSam3sGeneralIOC.HplPioC4;
    LcdP.DB5 -> HplSam3sGeneralIOC.HplPioC5;
    LcdP.DB6 -> HplSam3sGeneralIOC.HplPioC6;
    LcdP.DB7 -> HplSam3sGeneralIOC.HplPioC7;

    LcdP.LCD_RS -> HplSam3sGeneralIOC.HplPioC19;
    LcdP.NRD    -> HplSam3sGeneralIOC.HplPioC11;
    LcdP.NWE    -> HplSam3sGeneralIOC.HplPioC8;
    LcdP.NCS   -> HplSam3sGeneralIOC.HplPioC15;

    LcdP.Backlight -> HplSam3sGeneralIOC.PioC13;

    components HplSam3sClockC;
    LcdP.ClockControl -> HplSam3sClockC.SMCCntl;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/LcdP.nc000066400000000000000000000377421207233610700222250ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/
#include 
#include "lcd.h"
#include "color.h"
#include "font.h"
#include "font10x14.h"

module LcdP
{
    uses {
        interface Ili9325;

        interface HplSam3GeneralIOPin as DB0;
        interface HplSam3GeneralIOPin as DB1;
        interface HplSam3GeneralIOPin as DB2;
        interface HplSam3GeneralIOPin as DB3;
        interface HplSam3GeneralIOPin as DB4;
        interface HplSam3GeneralIOPin as DB5;
        interface HplSam3GeneralIOPin as DB6;
        interface HplSam3GeneralIOPin as DB7;
        interface HplSam3GeneralIOPin as LCD_RS;
        interface HplSam3GeneralIOPin as NRD;
        interface HplSam3GeneralIOPin as NWE;
        interface HplSam3GeneralIOPin as NCS;

        interface GeneralIO as Backlight;

        interface HplSam3PeripheralClockCntl as ClockControl;
    }
    provides 
    {
        interface Lcd;
        interface Draw;
    }
}
implementation
{

#define RGB24ToRGB16(color) (((color >> 8) & 0xF800) | \
        ((color >> 5) & 0x7E0) | \
        ((color >> 3) & 0x1F))
#define BOARD_LCD_BASE   0x61000000

    const Font gFont = {10, 14};

    /**
     * Initializes the LCD controller.
     * \param pLcdBase   LCD base address.
     */
    command void Lcd.initialize(void)
    {
        smc_setup_t setup;
        smc_pulse_t pulse;
        smc_cycle_t cycle;
        smc_mode_t  mode;

        // Enable pins
        call DB0.disablePioControl();
        call DB0.selectPeripheralA();
        call DB0.enablePullUpResistor();
        call DB1.disablePioControl();
        call DB1.selectPeripheralA();
        call DB1.enablePullUpResistor();
        call DB2.disablePioControl();
        call DB2.selectPeripheralA();
        call DB2.enablePullUpResistor();
        call DB3.disablePioControl();
        call DB3.selectPeripheralA();
        call DB3.enablePullUpResistor();
        call DB4.disablePioControl();
        call DB4.selectPeripheralA();
        call DB4.enablePullUpResistor();
        call DB5.disablePioControl();
        call DB5.selectPeripheralA();
        call DB5.enablePullUpResistor();
        call DB6.disablePioControl();
        call DB6.selectPeripheralA();
        call DB6.enablePullUpResistor();
        call DB7.disablePioControl();
        call DB7.selectPeripheralA();
        call DB7.enablePullUpResistor();

        call LCD_RS.disablePioControl();
        call LCD_RS.selectPeripheralA();
        call LCD_RS.enablePullUpResistor();

        call NRD.disablePioControl();
        call NRD.selectPeripheralA();
        call NRD.enablePullUpResistor();
        call NWE.disablePioControl();
        call NWE.selectPeripheralA();
        call NWE.enablePullUpResistor();
        call NCS.disablePioControl();
        call NCS.selectPeripheralA();
        call NCS.enablePullUpResistor();

        // Enable peripheral clock
        call ClockControl.enable();

        // Enable pins
        call Backlight.makeOutput();

        // EBI SMC Configuration
        setup.flat              = 0;
        setup.bits.nwe_setup    = 2;
        setup.bits.ncs_wr_setup = 2;
        setup.bits.nrd_setup    = 2;
        setup.bits.ncs_rd_setup = 2;
        SMC_CS1->setup = setup;

        pulse.flat              = 0;
        pulse.bits.nwe_pulse    = 4;
        pulse.bits.ncs_wr_pulse = 4;
        pulse.bits.nrd_pulse    = 10;
        pulse.bits.ncs_rd_pulse = 10;
        SMC_CS1->pulse = pulse;

        cycle.flat           = 0;
        cycle.bits.nwe_cycle = 10;
        cycle.bits.nrd_cycle = 22;
        SMC_CS1->cycle = cycle;

        mode.bits.read_mode = 1;
        mode.bits.write_mode = 1;
        mode.bits.dbw = 0; // 8-bit operations
        mode.bits.pmen = 0;
        SMC_CS1->mode = mode;

        // Initialize LCD controller (HX8347)
        call Ili9325.initialize((void *)BOARD_LCD_BASE);

    }

    event void Ili9325.initializeDone(error_t err)
    {
        if(err == SUCCESS)
            call Lcd.setBacklight(25);
        signal Lcd.initializeDone(err);
    }

    /**
     * Turn on the LCD
     */
    command void Lcd.start(void)
    {
        call Ili9325.on((void *)BOARD_LCD_BASE);
        signal Lcd.startDone();
    }

    /**
     * Turn off the LCD
     */
    command void Lcd.stop(void)
    {
        call Ili9325.off((void *)BOARD_LCD_BASE);
    }

    /**
     * Set the backlight of the LCD.
     * \param level   Backlight brightness level [1..32], 32 is maximum level.
     */
    command void Lcd.setBacklight (uint8_t level)
    {
        uint32_t i;

        // Switch off backlight
        call Backlight.clr();
        i = 800 * (48000000 / 1000000);    // wait for at least 500us
        while(i--);

        // Set new backlight level
        for (i = 0; i < level; i++) {


            call Backlight.clr();
            call Backlight.clr();
            call Backlight.clr();

            call Backlight.set();
            call Backlight.set();
            call Backlight.set();
        }
    }

    command void* Lcd.displayBuffer(void* pBuffer)
    {
        return (void *) BOARD_LCD_BASE;
    }

    /**
     * Fills the given LCD buffer with a particular color.
     * Only works in 24-bits packed mode for now.
     * \param color  Fill color.
     */
    async command void Draw.fill(uint32_t color)
    {
        uint32_t i;

        call Ili9325.setCursor((void *)BOARD_LCD_BASE, 0, 0);
        call Ili9325.writeRAM_Prepare((void *)BOARD_LCD_BASE);
        for (i = 0; i < (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++) {

            call Ili9325.writeRAM((void *)BOARD_LCD_BASE, color);
        }
    }

    /**
     * Sets the specified pixel to the given color.
     * !!! Only works in 24-bits packed mode for now. !!!
     * \param x  X-coordinate of pixel.
     * \param y  Y-coordinate of pixel.
     * \param color  Pixel color.
     */
    async command void Draw.drawPixel(
            uint32_t x,
            uint32_t y,
            uint32_t color)
    {
        void* pBuffer = (void*)BOARD_LCD_BASE;

        call Ili9325.setCursor(pBuffer, BOARD_LCD_WIDTH - x, y);
        call Ili9325.writeRAM_Prepare(pBuffer);
        call Ili9325.writeRAM(pBuffer, color);
    }

    /**
     * Draws a rectangle inside a LCD buffer, at the given coordinates.
     * \param x  X-coordinate of upper-left rectangle corner.
     * \param y  Y-coordinate of upper-left rectangle corner.
     * \param width  Rectangle width in pixels.
     * \param height  Rectangle height in pixels.
     * \param color  Rectangle color.
     */
    async command void Draw.drawRectangle(
            uint32_t x,
            uint32_t y,
            uint32_t width,
            uint32_t height,
            uint32_t color)
    {
        uint32_t rx, ry;

        for (ry=0; ry < height; ry++) {

            for (rx=0; rx < width; rx++) {

                call Draw.drawPixel(x+rx, y+ry, color);
            }
        }
    }
    /**
     * Draws a string inside a LCD buffer, at the given coordinates. Line breaks
     * will be honored.
     * \param x  X-coordinate of string top-left corner.
     * \param y  Y-coordinate of string top-left corner.
     * \param pString  String to display.
     * \param color  String color.
     */
    async command void Draw.drawString(
            uint32_t x,
            uint32_t y,
            const char *pString,
            uint32_t color)
    {
        uint32_t xorg = x;

        while (*pString != 0) {
            if (*pString == '\n') {

                y += gFont.height + 2;
                x = xorg;
            }
            else {

                call Draw.drawChar(x, y, *pString, color);
                x += gFont.width + 2;
            }
            pString++;
        }
    }

    /**
     * Draws a string inside a LCD buffer, at the given coordinates. Line breaks
     * will be honored.
     * \param x  X-coordinate of string top-left corner.
     * \param y  Y-coordinate of string top-left corner.
     * \param pString  String to display.
     * \param color  String color.
     */
    async command void Draw.drawStringWithBGColor(
            uint32_t x,
            uint32_t y,
            const char *pString,
            uint32_t fontColor,
            uint32_t bgColor)
    {
        uint32_t xorg = x;

        while (*pString != 0) {
            if (*pString == '\n') {

                y += gFont.height + 2;
                x = xorg;
            }
            else {

                call Draw.drawCharWithBGColor(x, y, *pString, fontColor, bgColor);
                x += gFont.width + 2;
            }
            pString++;
        }
    }

    /**
     * Draws an integer inside the LCD buffer
     * \param x X-Coordinate of the integers top-right corner.
     * \param y Y-Coordinate of the integers top-right corner.
     * \param n Number to be printed on the screen
     * \param sign <0 if negative number, >=0 if positive
     * \param fontColor Integer color.
     */
    async command void Draw.drawInt(
            uint32_t x,
            uint32_t y,
            uint32_t n,
            int8_t sign,
            uint32_t fontColor)
    {
        uint8_t i;
        i = 0;
        do {       /* generate digits in reverse order */
            char c = n % 10 + '0';   /* get next digit */
            if (i%3 == 0 && i>0)
            {
                call Draw.drawChar(x, y, '\'', fontColor);
                x -= (gFont.width + 2);
            }
            call Draw.drawChar(x, y, c, fontColor);
            x -= (gFont.width + 2);
            i++;
        } while ((n /= 10) > 0);     /* delete it */
        if (sign < 0)
            call Draw.drawChar(x, y, '-', fontColor);
    }

    /**
     * Draws an integer inside the LCD buffer
     * \param x X-Coordinate of the integers top-right corner.
     * \param y Y-Coordinate of the integers top-right corner.
     * \param n Number to be printed on the screen
     * \param sign <0 if negative number, >=0 if positive
     * \param color Integer color.
     * \param bgColor Color of the background.
     */
    async command void Draw.drawIntWithBGColor(
            uint32_t x,
            uint32_t y,
            uint32_t n,
            int8_t sign,
            uint32_t fontColor,
            uint32_t bgColor)
    {
        uint8_t i;
        i = 0;
        do {       /* generate digits in reverse order */
            char c = n % 10 + '0';   /* get next digit */
            if (i%3 == 0 && i>0)
            {
                call Draw.drawChar(x, y, '\'', fontColor);
                x -= (gFont.width + 2);
            }
            call Draw.drawCharWithBGColor(x, y, c, fontColor, bgColor);
            x -= (gFont.width + 2);
            i++;
        } while ((n /= 10) > 0);     /* delete it */
        if (sign < 0)
            call Draw.drawCharWithBGColor(x, y, '-', fontColor, bgColor);
    }

    /**
     * Returns the width & height in pixels that a string will occupy on the screen
     * if drawn using Draw.drawString.
     * \param pString  String.
     * \param pWidth  Pointer for storing the string width (optional).
     * \param pHeight  Pointer for storing the string height (optional).
     * \return String width in pixels.
     */
    async command void Draw.getStringSize(
            const char *pString,
            uint32_t *pWidth,
            uint32_t *pHeight)
    {
        uint32_t width = 0;
        uint32_t height = gFont.height;

        while (*pString != 0) {

            if (*pString == '\n') {

                height += gFont.height + 2;
            }
            else {

                width += gFont.width + 2;
            }
            pString++;
        }

        if (width > 0) width -= 2;

        if (pWidth) *pWidth = width;
        if (pHeight) *pHeight = height;
    }

    /**
     * Draws an ASCII character on the given LCD buffer.
     * \param x  X-coordinate of character upper-left corner.
     * \param y  Y-coordinate of character upper-left corner.
     * \param c  Character to output.
     * \param color  Character color.
     */
    async command void Draw.drawChar(
            uint32_t x,
            uint32_t y,
            char c,
            uint32_t color)
    {
        uint32_t row, col;

        if(!((c >= 0x20) && (c <= 0x7F)))
        {
            return;
        }

        for (col = 0; col < 10; col++) {

            for (row = 0; row < 8; row++) {

                if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) {

                    call Draw.drawPixel(x+col, y+row, color);
                }
            }
            for (row = 0; row < 6; row++) {

                if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) {

                    call Draw.drawPixel(x+col, y+row+8, color);
                }
            }
        }
    }

    /**
     * Draws an ASCII character on the given LCD buffer.
     * \param x  X-coordinate of character upper-left corner.
     * \param y  Y-coordinate of character upper-left corner.
     * \param c  Character to output.
     * \param fontColor  Character foreground color.
     * \param bgColor Background color of character
     */
    async command void Draw.drawCharWithBGColor(
            uint32_t x,
            uint32_t y,
            char c,
            uint32_t fontColor,
            uint32_t bgColor)
    {
        uint32_t row, col;

        if(!((c >= 0x20) && (c <= 0x7F)))
        {
            return;
        }

        for (col = 0; col < 10; col++) {

            for (row = 0; row < 8; row++) {

                if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) {

                    call Draw.drawPixel(x+col, y+row, fontColor);
                } else {
                    call Draw.drawPixel(x+col, y+row, bgColor);
                }
            }
            for (row = 0; row < 6; row++) {

                if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) {

                    call Draw.drawPixel(x+col, y+row+8, fontColor);
                } else {
                    call Draw.drawPixel(x+col, y+row+8, bgColor);
                }
            }
        }
    }

}
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/color.h000066400000000000000000000066251207233610700223440ustar00rootroot00000000000000/*
 * Copyright (c) Atmel
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef COLOR_H
#define COLOR_H

//------------------------------------------------------------------------------
/// RGB 24 Bpp
/// RGB 888
/// R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0
//------------------------------------------------------------------------------
#define COLOR_BLACK          0x000000
#define COLOR_WHITE          0xFFFFFF

#define COLOR_BLUE           0x0000FF
#define COLOR_GREEN          0x00FF00
#define COLOR_RED            0xFF0000

#define COLOR_NAVY           0x000080
#define COLOR_DARKBLUE       0x00008B
#define COLOR_DARKGREEN      0x006400
#define COLOR_DARKCYAN       0x008B8B
#define COLOR_CYAN           0x00FFFF
#define COLOR_TURQUOISE      0x40E0D0
#define COLOR_INDIGO         0x4B0082
#define COLOR_DARKRED        0x800000
#define COLOR_OLIVE          0x808000
#define COLOR_GRAY           0x808080
#define COLOR_SKYBLUE        0x87CEEB
#define COLOR_BLUEVIOLET     0x8A2BE2
#define COLOR_LIGHTGREEN     0x90EE90
#define COLOR_DARKVIOLET     0x9400D3
#define COLOR_YELLOWGREEN    0x9ACD32
#define COLOR_BROWN          0xA52A2A
#define COLOR_DARKGRAY       0xA9A9A9
#define COLOR_SIENNA         0xA0522D
#define COLOR_LIGHTBLUE      0xADD8E6
#define COLOR_GREENYELLOW    0xADFF2F
#define COLOR_SILVER         0xC0C0C0
#define COLOR_LIGHTGREY      0xD3D3D3
#define COLOR_LIGHTCYAN      0xE0FFFF
#define COLOR_VIOLET         0xEE82EE
#define COLOR_AZUR           0xF0FFFF
#define COLOR_BEIGE          0xF5F5DC
#define COLOR_MAGENTA        0xFF00FF
#define COLOR_TOMATO         0xFF6347
#define COLOR_GOLD           0xFFD700
#define COLOR_ORANGE         0xFFA500
#define COLOR_SNOW           0xFFFAFA
#define COLOR_YELLOW         0xFFFF00

#endif // #define COLOR_H






















































tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/font.h000066400000000000000000000040371207233610700221670ustar00rootroot00000000000000/*
 * Copyright (c) Atmel
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef FONT_H
#define FONT_H

//------------------------------------------------------------------------------
/// Describes the font (width, height, supported characters, etc.) used by
/// the LCD driver draw API.
//------------------------------------------------------------------------------
typedef struct _Font {

	/// Font width in pixels.
	unsigned char width;
	/// Font height in pixels.
	unsigned char height;

} Font;


#endif //#ifndef FONT_H
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/font10x14.h000066400000000000000000000330151207233610700226630ustar00rootroot00000000000000/*
 * Copyright (c) Atmel
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef LCD_FONT_10x14_H
#define LCD_FONT_10x14_H

//------------------------------------------------------------------------------
//         Definitions
//------------------------------------------------------------------------------

const unsigned char pCharset10x14[] = {
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC,
	0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00,
	0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0,
	0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0,
	0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC,
	0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0,
	0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0,
	0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18,
	0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC,
	0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00,
	0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78,
	0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18,
	0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00,
	0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8,
	0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60,
	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0,
	0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0,
	0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C,
	0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
	0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC,
	0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
	0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC,
	0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C,
	0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0,
	0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0,
	0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0,
	0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C,
	0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0,
	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC,
	0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00,
	0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
	0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C,
	0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0,
	0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC,
	0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0,
	0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00,
	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
	0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70,
	0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
	0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC,
	0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00,
	0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC,
	0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
	0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0,
	0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
	0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0,
	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
	0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00,
	0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0,
	0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C,
	0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
	0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00,
	0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
	0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00,
	0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
	0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC,
	0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80,
	0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C,
	0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0,
	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC,
	0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
	0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
	0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
	0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0,
	0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8,
	0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
	0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80,
	0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C,
	0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC,
	0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00,
	0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C,
	0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C,
	0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C,
	0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00,
	0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00,
	0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00,
	0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC,
	0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8,
	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C,
	0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0,
	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
	0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30,
	0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C,
	0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC,
	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC,
	0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90,
	0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00,
	0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
	0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0,
	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC,
	0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00,
	0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0,
	0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
	0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
	0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0,
	0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC,
	0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00,
	0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC,
	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
	0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0,
	0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
	0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00,
	0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC,
	0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00,
	0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00,
	0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
	0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30,
	0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8,
	0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00,
	0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
	0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
	0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0,
	0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8,
	0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
	0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0,
	0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C,
	0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8,
	0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00,
	0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC,
	0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C,
	0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8,
	0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00,
	0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C,
	0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C,
	0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C,
	0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
	0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC,
	0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC
};


#endif // #ifdef _LCD_FONT_10x14_h
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/ili9325.h000077500000000000000000000171571207233610700223330ustar00rootroot00000000000000/* ----------------------------------------------------------------------------
 *         ATMEL Microcontroller Software Support
 * ----------------------------------------------------------------------------
 * Copyright (c) 2009, Atmel Corporation
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 * ----------------------------------------------------------------------------
 */

/**
 * \file
 *
 * Interface of ILI9325 driver.
 *
 */

#ifndef _ILI9325_
#define _ILI9325_

/*----------------------------------------------------------------------------
 *        Headers
 *----------------------------------------------------------------------------*/

typedef uint32_t LcdColor_t ;

/*----------------------------------------------------------------------------
 *        Definitions
 *----------------------------------------------------------------------------*/

/* ILI9325 ID code */
#define ILI9325_DEVICE_CODE    0x9325

/* ILI9325 LCD Registers */
#define ILI9325_R00H    0x00    /* Driver Code Read                 */
#define ILI9325_R01H    0x01    /* Driver Output Control 1          */
#define ILI9325_R01H_SS                ((uint16_t)0x0100)
#define ILI9325_R01H_SM                ((uint16_t)0x0400)
#define ILI9325_R02H    0x02    /* LCD Driving Control              */
#define ILI9325_R03H    0x03    /* Entry Mode                       */
#define ILI9325_R03H_AM                ((uint16_t)0x0008) /* AM Control the GRAM update direction */
#define ILI9325_R03H_ID0               ((uint16_t)0x0010) /* I/D[1:0] Control the address counter  */
#define ILI9325_R03H_ID1               ((uint16_t)0x0020)
#define ILI9325_R03H_ORG               ((uint16_t)0x0080)
#define ILI9325_R03H_HWM               ((uint16_t)0x0200)
#define ILI9325_R03H_BGR               ((uint16_t)0x1000)
#define ILI9325_R03H_DFM               ((uint16_t)0x4000)
#define ILI9325_R03H_TRI               ((uint16_t)0x8000)
#define ILI9325_R04H    0x04    /* Resize Control                   */
#define ILI9325_R07H    0x07    /* Display Control 1                */
#define ILI9325_R07H_D0                ((uint16_t)0x0001)
#define ILI9325_R07H_D1                ((uint16_t)0x0002)
#define ILI9325_R07H_CL                ((uint16_t)0x0008)
#define ILI9325_R07H_DTE               ((uint16_t)0x0010)
#define ILI9325_R07H_GON               ((uint16_t)0x0020)
#define ILI9325_R07H_BASEE             ((uint16_t)0x0100)
#define ILI9325_R07H_PTDE0             ((uint16_t)0x1000)
#define ILI9325_R07H_PTDE1             ((uint16_t)0x2000)

#define ILI9325_R08H    0x08    /* Display Control 2                */
#define ILI9325_R09H    0x09    /* Display Control 3                */
#define ILI9325_R0AH    0x0A    /* Display Control 4                */
#define ILI9325_R0CH    0x0C    /* RGB Display Interface Control 1  */
#define ILI9325_R0DH    0x0D    /* Frame Maker Position             */
#define ILI9325_R0FH    0x0F    /* RGB Display Interface Control 2  */

#define ILI9325_R10H    0x10    /* Power Control 1 */
#define ILI9325_R11H    0x11    /* Power Control 2 */
#define ILI9325_R12H    0x12    /* Power Control 3 */
#define ILI9325_R13H    0x13    /* Power Control 4 */

#define ILI9325_R20H    0x20    /* Horizontal GRAM Address Set  */
#define ILI9325_R21H    0x21    /* Vertical  GRAM Address Set   */
#define ILI9325_R22H    0x22    /* Write Data to GRAM           */
#define ILI9325_R29H    0x29    /* Power Control 7              */
#define ILI9325_R2BH    0x2B    /* Frame Rate and Color Control */

#define ILI9325_R30H    0x30    /* Gamma Control 1  */
#define ILI9325_R31H    0x31    /* Gamma Control 2  */
#define ILI9325_R32H    0x32    /* Gamma Control 3  */
#define ILI9325_R35H    0x35    /* Gamma Control 4  */
#define ILI9325_R36H    0x36    /* Gamma Control 5  */
#define ILI9325_R37H    0x37    /* Gamma Control 6  */
#define ILI9325_R38H    0x38    /* Gamma Control 7  */
#define ILI9325_R39H    0x39    /* Gamma Control 8  */
#define ILI9325_R3CH    0x3C    /* Gamma Control 9  */
#define ILI9325_R3DH    0x3D    /* Gamma Control 10 */

#define ILI9325_R50H    0x50    /* Horizontal Address Start Position */
#define ILI9325_R51H    0x51    /* Horizontal Address End Position   */
#define ILI9325_R52H    0x52    /* Vertical Address Start Position   */
#define ILI9325_R53H    0x53    /* Vertical Address End Position     */

#define ILI9325_R60H    0x60    /* Driver Output Control 2    */
#define ILI9325_R60H_GS                ((uint16_t)0x8000)
#define ILI9325_R61H    0x61    /* Base Image Display Control */
#define ILI9325_R6AH    0x6A    /* Vertical Scroll Control    */

#define ILI9325_R80H    0x80    /* Partial Image 1 Display Position  */
#define ILI9325_R81H    0x81    /* Partial Image 1 Area (Start Line) */
#define ILI9325_R82H    0x82    /* Partial Image 1 Area (End Line)   */
#define ILI9325_R83H    0x83    /* Partial Image 2 Display Position  */
#define ILI9325_R84H    0x84    /* Partial Image 2 Area (Start Line) */
#define ILI9325_R85H    0x85    /* Partial Image 2 Area (End Line)   */

#define ILI9325_R90H    0x90    /* Panel Interface Control 1 */
#define ILI9325_R92H    0x92    /* Panel Interface Control 2 */
#define ILI9325_R95H    0x95    /* Panel Interface Control 4 */

#define ILI9325_RA1H    0xA1    /* OTP VCM Programming Control */
#define ILI9325_RA2H    0xA2    /* OTP VCM Status and Enable   */
#define ILI9325_RA5H    0xA5    /* OTP Programming ID Key      */

/*----------------------------------------------------------------------------
 *        Types
 *----------------------------------------------------------------------------*/

typedef volatile uint8_t REG8;

/*----------------------------------------------------------------------------
 *        Marcos
 *----------------------------------------------------------------------------*/

#define BOARD_LCD_RS     (1 << 1)
    // LCD index register address
#define LCD_IR(baseAddr) (*((REG8 *)(baseAddr)))
    // LCD status register address
#define LCD_SR(baseAddr) (*((REG8 *)(baseAddr)))
    // LCD data address
#define LCD_D(baseAddr)  (*((REG8 *)((uint32_t)(baseAddr) + BOARD_LCD_RS)))


#endif /* #ifndef ILI9325 */
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/lcd/lcd.h000066400000000000000000000032451207233610700217630ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _LCD_H
#define _LCD_H


#define BOARD_LCD_HEIGHT 320
#define BOARD_LCD_WIDTH  240


#endif //_LCD_H

tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/platform.h000066400000000000000000000002151207233610700222750ustar00rootroot00000000000000/* No platform_bootstrap() needed,
 * since memory system doesn't need configuration and
 * the processor mode neither.
 * (see TEP 107)
 */
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/platform_message.h000066400000000000000000000040201207233610700237770ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Wanja Hofer 
 */

#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include "Serial.h"
#include "CC2520Radio.h"

typedef union message_header
{
  cc2520packet_header_t cc2520;
  serial_header_t serial;
} message_header_t;

typedef union message_footer
{
  cc2520packet_footer_t cc2520;
} message_footer_t;

typedef union message_metadata
{
  cc2520packet_metadata_t cc2520;
	serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/sam3s-ek-flash.x000066400000000000000000000070401207233610700232120ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Linker script to run code in Flash 0.
 * Start-up code copies data into SRAM 0 and zeroes BSS segment.
 *
 * @author Wanja Hofer 
 * @author Thomas Schmid
 */

/* Output format is always little endian, irrespective of -EL or -EB flags */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/* Output architecture is ARM */
OUTPUT_ARCH(arm)
/* The first program instruction is the __init() start-up code */
ENTRY(__init)

/* The IRQ vector table is put at the beginning of SRAM 0 */
/* We reserve 0x100 bytes by setting the SRAM 0 base address below accordingly */

/* Stack at the end of SRAM */
_estack = 0x2000bffc;

/* Don't relocate the vector table */
/*PROVIDE (__relocate_vector = 0);*/

/* We have the SAM3S4C with 256K Flash and 48K SRAM. */
MEMORY
{
	sram  (WRX) : org = 0x20000000, len = 0x0C000 /* SRAM, 48K */
	flash (RX) : org = 0x00400000, len = 0x40000 /* Flash, 256K */
}

SECTIONS
{
	/* Text is linked into Flash 0 */
	.text :
	{
		. = ALIGN(4);
		_stext = .;
        /* KEEP(*(.boot*)) */
        KEEP(*(.vectors))
        *(.init*)
		*(.text*)
        *(.fini*)
		*(.rodata*)
		*(.glue_7) /* ARM/Thumb interworking code */
		*(.glue_7t) /* ARM/Thumb interworking code */
		. = ALIGN(4);
		_etext = .;
	} > flash

	/* Data will be loaded into RAM by start-up code */
	.data : AT (_etext)
	{
		. = ALIGN(4);
		_sdata = .;
        _svect = .;
        KEEP(*(.vectors)) /* Interrupt vector table in first 204 bytes */
        _evect = .;
		*(.ramfunc) /* functions linked into RAM */
		*(.data.*)
		*(.data)
		. = ALIGN(4);
		_edata = .;
	} > sram

	/* BSS will be zeroed by start-up code */
	.bss (NOLOAD) : {
		. = ALIGN(4);
		_sbss = .;
		*(.bss.*)
		*(.bss)
		. = ALIGN(4);
	} > sram
	/* _ebss should be inside .bss, but for some reason, it then is not defined
	 * at the end of the BSS section. This leads to non-zeroed BSS data, since the
	 * start-up code uses that symbol. For now, this workaround is OK and does no
	 * harm.
	 */
	_ebss = .;
}
end = .;
tinyos-2.1.2+dfsg/tos/platforms/sam3s_ek/vectors.c000066400000000000000000000241531207233610700221400ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Startup code and interrupt and trap handlers for the SAM3U-EK board.
 *
 * @author Wanja Hofer 
 */

/* Section symbols defined in linker script
 * sam3u-ek-flash.x
 */
extern unsigned int _stext;
extern unsigned int _etext;
extern unsigned int _sdata;
extern unsigned int _edata;
extern unsigned int _svect;
extern unsigned int _evect;
extern unsigned int _sbss;
extern unsigned int _ebss;
extern unsigned int _estack;
extern unsigned int __relocate_vector;

/* main() symbol defined in RealMainP
 */
int main();

/* Start-up code called upon reset.
 * Definition see below.
 */
void __init();

/* Default handler for any IRQ or fault
 */
void DefaultHandler()
{
	// do nothing, just return
}

/* Default Hardfault Handler
 */
void DefaultHardFaultHandler()
{
    while(1) {}
}

/* Default Mpu Fault Handler
 */
void DefaultMpuFaultHandler()
{
    while(1) {}
}

/* Default Bus Fault Handler
 */
void DefaultBusFaultHandler()
{
    while(1) {}
}

/* Default Usage Fault Handler
 */
void DefaultUsageFaultHandler()
{
    while(1) {}
}

/* By default, every exception and IRQ is handled by the default handler.
 *
 * If OWN_FUNCTIONS_FOR_HANDLERS is defined, then the internal IRQ and fault
 * handlers will get a function of their own for debug purposes. Those
 * functions are provided by weak aliases; thus, a regular handler
 * definition will override this.
 */
#define OWN_FUNCTION_FOR_HANDLERS

#ifdef OWN_FUNCTION_FOR_HANDLERS
void NmiHandler() __attribute__((weak));
void MpuFaultHandler() __attribute__((weak));
void BusFaultHandler() __attribute__((weak));
void UsageFaultHandler() __attribute__((weak));
void SVCallHandler() __attribute__((weak));
void DebugHandler() __attribute__((weak));
void PendSVHandler() __attribute__((weak));
void SysTickHandler() __attribute__((weak));
void NmiHandler() { while(1) {} }
void MpuFaultHandler() { while(1) {} }
void BusFaultHandler() { while(1) {} }
void UsageFaultHandler() { while(1) {} }
void SVCallHandler() { while(1) {} }
void DebugHandler() { while(1) {} }
void PendSVHandler() { while(1) {} }
void SysTickHandler() { while(1) {} }
#else
void NmiHandler() __attribute__((weak, alias("DefaultHandler")));
void MpuFaultHandler() __attribute__((weak, alias("DefaultHandler")));
void BusFaultHandler() __attribute__((weak, alias("DefaultHandler")));
void UsageFaultHandler() __attribute__((weak, alias("DefaultHandler")));
void SVCallHandler() __attribute__((weak, alias("DefaultHandler")));
void DebugHandler() __attribute__((weak, alias("DefaultHandler")));
void PendSVHandler() __attribute__((weak, alias("DefaultHandler")));
void SysTickHandler() __attribute__((weak, alias("DefaultHandler")));
#endif

void HardFaultHandler() __attribute__((weak, alias("DefaultHardFaultHandler")));

void SupcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void RstcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void RtcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void RttIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void WdtIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PmcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void EefcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void UartIrqHandler() __attribute__((weak, alias("DefaultHandler"))); // Note: we removed the 0!
void Uart1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void SmcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PioAIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PioBIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PioCIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Usart0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Usart1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void HsmciIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Twi0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Twi1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void SpiIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void SscIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC2IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC3IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC4IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC5IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void AdcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void DaccIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PwmIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void CrccuIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void AccIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void UdpIrqHandler() __attribute__((weak, alias("DefaultHandler")));

/* Stick at the top of the .text section in final binary so we can always
 *    jump back to the init routine at the top of the stack if we want */
__attribute__((section(".boot"))) unsigned int *__boot[] = {
    &_estack,
    (unsigned int *) __init,
};


__attribute__((section(".vectors"))) unsigned int *__vectors[] = {
	// Defined by Cortex-M3
	// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 78
	// See also The Definitive Guide to the ARM Cortex-M3, p. 331
	&_estack,
	(unsigned int *) __init,
    (unsigned int *) NmiHandler,
    (unsigned int *) HardFaultHandler,
    (unsigned int *) MpuFaultHandler,
    (unsigned int *) BusFaultHandler,
	(unsigned int *) UsageFaultHandler,
	(unsigned int *) 0, // Reserved
	(unsigned int *) 0, // Reserved
	(unsigned int *) 0, // Reserved
	(unsigned int *) 0, // Reserved
	(unsigned int *) SVCallHandler,
	(unsigned int *) DebugHandler,
	(unsigned int *) 0, // Reserved
	(unsigned int *) PendSVHandler,
	(unsigned int *) SysTickHandler,
	// Defined by SAM3U MCU
	// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 41
	(unsigned int *) SupcIrqHandler,     // 0
	(unsigned int *) RstcIrqHandler,     // 1
	(unsigned int *) RtcIrqHandler,      // 2
	(unsigned int *) RttIrqHandler,      // 3
	(unsigned int *) WdtIrqHandler,      // 4
	(unsigned int *) PmcIrqHandler,      // 5
	(unsigned int *) EefcIrqHandler,     // 6
	(unsigned int *) 0,                  // 7 Reserved
	(unsigned int *) UartIrqHandler,     // 8 We remove the 0 as the Sam3u only has one UART
	(unsigned int *) Uart1IrqHandler,    // 9
	(unsigned int *) SmcIrqHandler,      // 10
	(unsigned int *) PioAIrqHandler,     // 11
	(unsigned int *) PioBIrqHandler,     // 12
	(unsigned int *) PioCIrqHandler,     // 13
	(unsigned int *) Usart0IrqHandler,   // 14
	(unsigned int *) Usart1IrqHandler,   // 15
	(unsigned int *) 0,                  // 16
	(unsigned int *) 0,                  // 17
	(unsigned int *) HsmciIrqHandler,    // 18
	(unsigned int *) Twi0IrqHandler,     // 19
	(unsigned int *) Twi1IrqHandler,     // 20
	(unsigned int *) SpiIrqHandler,      // 21
	(unsigned int *) SscIrqHandler,      // 22
	(unsigned int *) TC0IrqHandler,      // 23
	(unsigned int *) TC1IrqHandler,      // 24
	(unsigned int *) TC2IrqHandler,      // 25
	(unsigned int *) TC3IrqHandler,      // 26
	(unsigned int *) TC4IrqHandler,      // 27
	(unsigned int *) TC5IrqHandler,      // 28
	(unsigned int *) AdcIrqHandler,      // 29
	(unsigned int *) DaccIrqHandler,     // 30
	(unsigned int *) PwmIrqHandler,      // 31
	(unsigned int *) CrccuIrqHandler,    // 32
	(unsigned int *) AccIrqHandler,      // 33
	(unsigned int *) UdpIrqHandler       // 34
};

/* Start-up code to copy data into RAM
 * and zero BSS segment
 * and call main()
 * and "exit"
 */
void __init()
{
	unsigned int *from;
	unsigned int *to;
	unsigned int *i;
	volatile unsigned int *NVIC_VTOFFR = (volatile unsigned int *) 0xe000ed08;

    if(0 && __relocate_vector)
    {
        // Configure location of IRQ vector table
        // Vector table is in the beginning of text segment / Flash 0
        i = (unsigned int *) &_svect;
        *NVIC_VTOFFR = (unsigned int) i;
        // Set TBLBASE bit since vector table located in SRAM
        *NVIC_VTOFFR |= (1 << 29);
    }

	// Copy pre-initialized data into RAM.
	// Data lies in Flash after the text segment (_etext),
	// but is linked to be at _sdata.
	// Thus, we have to copy it to that place in RAM.
	from = &_etext;
	to = &_sdata;
	while (to < &_edata) {
		*to = *from;
		to++;
		from++;
	}

	// Fill BSS data with 0
	i = &_sbss;
	while (i < &_ebss) {
		*i = 0;
		i++;
	}

	// Call main()
	main();

	// "Exit"
	while (1);
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/000077500000000000000000000000001207233610700203045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/.platform000066400000000000000000000100141207233610700221250ustar00rootroot00000000000000# Copyright (c) 2011 University of Utah
# All rights reserved.
# 
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the
#   distribution.
# - Neither the name of the copyright holders nor the names of its
#   contributors may be used to endorse or promote products derived
#   from this software without specific prior written permission.
# 
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
# HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
# WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.

push ( @includes,
  "%P/spi",
  "%P/lcd",
  "%P/chips/cc2420",
  "%P/chips/sd",
  "%P/chips/nandflash",
  "%T/platforms/shimmer/chips/sd/fatfs",
  "%T/chips/cortex/m3",
  "%T/chips/cortex/m3/sam3",
  "%T/chips/cortex/m3/sam3/u",
  "%T/chips/cortex/m3/sam3/pins",
  "%T/chips/cortex/m3/sam3/u/pins",
  "%T/chips/cortex/m3/sam3/timer",
  "%T/chips/cortex/m3/sam3/u/timer",
  "%T/chips/cortex/m3/sam3/nvic",
  "%T/chips/cortex/m3/sam3/u/nvic",
  "%T/chips/cortex/m3/sam3/uart",
  "%T/chips/cortex/m3/sam3/u/uart",
  "%T/chips/cortex/m3/sam3/u/usart",
  "%T/chips/cortex/m3/sam3/supc",
  "%T/chips/cortex/m3/sam3/u/supc",
  "%T/chips/cortex/m3/sam3/pmc",
  "%T/chips/cortex/m3/sam3/u/pmc",
  "%T/chips/cortex/m3/sam3/eefc",
  "%T/chips/cortex/m3/sam3/u/eefc",
  "%T/chips/cortex/m3/sam3/wdtc",
  "%T/chips/cortex/m3/sam3/u/wdtc",
  "%T/chips/cortex/m3/sam3/matrix",
  "%T/chips/cortex/m3/sam3/u/matrix",
  "%T/chips/cortex/m3/sam3/u/mpu",
  "%T/chips/cortex/m3/sam3/spi",
  "%T/chips/cortex/m3/sam3/u/spi",
  "%T/chips/cortex/m3/sam3/smc",
  "%T/chips/cortex/m3/sam3/u/smc",
  "%T/chips/cortex/m3/sam3/u/adc12b",
  "%T/chips/cortex/m3/sam3/u/dma",
  "%T/chips/cortex/m3/sam3/pdc",
  "%T/chips/cortex/m3/sam3/u/pdc",
  "%T/chips/cortex/m3/sam3/u/twi",
  "%T/chips/cortex/m3/sam3/u/hsmci",
  "%T/chips/cortex/m3/sam3/u/usb",
  "%T/chips/cortex/m3/sam3/u/usb/peripherals",
  "%T/chips/cortex/m3/sam3/u/usb/board",
  "%T/chips/cc2420",
  "%T/chips/cc2420/alarm",
  "%T/chips/cc2420/control",
  "%T/chips/cc2420/csma",
  "%T/chips/cc2420/interfaces",
  "%T/chips/cc2420/link",
  "%T/chips/cc2420/lowpan",
  "%T/chips/cc2420/lpl",
  "%T/chips/cc2420/packet",
  "%T/chips/cc2420/receive",
  "%T/chips/cc2420/spi",
  "%T/chips/cc2420/transmit",
  "%T/chips/cc2420/unique",
  "%T/lib/timer",
  "%T/lib/serial",
  "%T/lib/power",
);

@opts = qw(

  -gcc=arm-none-eabi-gcc
  -mcpu=cortex-m3
  -nostartfiles
  -fnesc-target=env
  -fnesc-no-debug

);

push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

$ENV{NESC_MACHINE} = "structure_size_boundary=32, pointer=4,4 float=4,4 double=8,4 long_double=8,4 short=2,2 int=4,4 long=4,4 long_long=8,4 int1248_align=1,2,4,4 wchar_size_size=4,4 char_wchar_signed=false,true";
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/ActiveMessageC.nc000066400000000000000000000052201207233610700234500ustar00rootroot00000000000000/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
/*
 *
 * Authors:		Philip Levis
 *
 */

/**
 *
 * The Active Message layer on the SAM3U-EK platform. This is a naming wrapper
 * around the CC2420 Active Message layer.
 *
 * @author Philip Levis
 * @author Thomas Schmid (adapted to SAM3U EK)
 */
#include "Timer.h"

configuration ActiveMessageC {
  provides {
    interface SplitControl;

    interface AMSend[am_id_t id];
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;
  }
}
implementation {
  components CC2420ActiveMessageC as AM;

  SplitControl = AM;
  
  AMSend       = AM;
  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/Ieee154MessageC.nc000066400000000000000000000044711207233610700233450ustar00rootroot00000000000000/*
 * Copyright (c) 2008 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *
 * @author Stephen Dawson-Haggerty
 */
 
configuration Ieee154MessageC  {
  provides {
    interface SplitControl;

    interface Resource as SendResource[uint8_t clientId];
    interface Ieee154Send;
    interface Receive as Ieee154Receive;

    interface Ieee154Packet;
    interface Packet;

    interface PacketAcknowledgements;
    interface LinkPacketMetadata;
    interface LowPowerListening;
    interface PacketLink;
  }

} implementation {
  components CC2420Ieee154MessageC as Msg;

  SplitControl = Msg;
  SendResource = Msg;
  Ieee154Send  = Msg;
  Ieee154Receive = Msg;
  Ieee154Packet = Msg;
  Packet = Msg;
  
  PacketAcknowledgements = Msg;
  LinkPacketMetadata = Msg;
  LowPowerListening = Msg;
  PacketLink = Msg;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/LedsP.nc000066400000000000000000000076111207233610700216420ustar00rootroot00000000000000/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 * Adapted because LED 2 (red) is active high on SAM3U_EK.
 *
 * @author Joe Polastre
 * @author Philip Levis
 * @author Wanja Hofer 
 *
 * @date   March 21, 2005
 */

module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led0.set();
      call Led1.set();
      call Led2.clr();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
    call Led1.clr();
    DBGLED(1);
  }

  async command void Leds.led1Off() {
    call Led1.set();
    DBGLED(1);
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    DBGLED(1);
  }

  async command void Leds.led2On() {
    call Led2.set();
    DBGLED(2);
  }

  async command void Leds.led2Off() {
    call Led2.clr();
    DBGLED(2);
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    DBGLED(2);
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (!call Led0.get()) {
	rval |= LEDS_LED0;
      }
      if (!call Led1.get()) {
	rval |= LEDS_LED1;
      }
      if (call Led2.get()) {
	rval |= LEDS_LED2;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	call Leds.led0On();
      }
      else {
	call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
	call Leds.led1On();
      }
      else {
	call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
	call Leds.led2On();
      }
      else {
	call Leds.led2Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/MoteClockC.nc000066400000000000000000000034731207233610700226200ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

configuration MoteClockC
{

    provides {
        interface Init;
    }
}

implementation
{

    components MoteClockP, HplSam3uClockC;

    Init = MoteClockP;
    MoteClockP.HplSam3Clock -> HplSam3uClockC;

  components LedsC;
  MoteClockP.Leds -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/MoteClockP.nc000066400000000000000000000104351207233610700226310ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Basic Clock Initialization.
 *
 * @author Thomas Schmid
 */

#include "sam3upmchardware.h"
#include "sam3usupchardware.h"
#include "sam3eefchardware.h"
#include "sam3wdtchardware.h"
#include "sam3matrixhardware.h"

extern void SetDefaultMaster(unsigned char enable);


module MoteClockP
{
    provides 
    {
        interface Init;
    }
    uses
    {
        interface HplSam3Clock;
        interface Leds;
    }
}

implementation
{

    command error_t Init.init(){
        // Set 2 WS for Embedded Flash Access
        EEFC0->fmr.bits.fws = 2;
        EEFC1->fmr.bits.fws = 2;

        // Disable Watchdog
        WDTC->mr.bits.wddis = 1;

        // Select external slow clock
        call HplSam3Clock.slckExternalOsc();
        //call HplSam3Clock.slckRCOsc();

        // Initialize main oscillator
        call HplSam3Clock.mckInit48();
        //call HplSam3Clock.mckInit12RC();

        // Enable clock for UART
        // FIXME: this should go into the UART start/stop!
        PMC->pc.pcdr.bits.dbgu = 1;

        /* Optimize CPU setting for speed */
        SetDefaultMaster(1);

        return SUCCESS;

    }

    //------------------------------------------------------------------------------
    /// Enable or disable default master access
    /// \param enable 1 enable defaultMaster settings, 0 disable it.
    //------------------------------------------------------------------------------
    void SetDefaultMaster(unsigned char enable) @C() 
    {
        // Set default master
        if (enable == 1) {
            // Set default master: SRAM0 -> Cortex-M3 System
            MATRIX->scfg0.bits.fixed_defmstr = 1;
            MATRIX->scfg0.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;

            // Set default master: SRAM1 -> Cortex-M3 System
            MATRIX->scfg1.bits.fixed_defmstr = 1;
            MATRIX->scfg1.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;

            // Set default master: Internal flash0 -> Cortex-M3 Instruction/Data
            MATRIX->scfg3.bits.fixed_defmstr = 0;
            MATRIX->scfg3.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;
        } else {

            // Clear default master: SRAM0 -> Cortex-M3 System
            MATRIX->scfg0.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;

            // Clear default master: SRAM1 -> Cortex-M3 System
            MATRIX->scfg1.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;

            // Clear default master: Internal flash0 -> Cortex-M3 Instruction/Data
            MATRIX->scfg3.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;
        }
    }

    /**
     * informs us when the main clock changes
     */
    async event void HplSam3Clock.mainClockChanged() {}

}

tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/PlatformC.nc000066400000000000000000000043721207233610700225230ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Wanja Hofer 
 */

#include "hardware.h"

configuration PlatformC
{
	provides
	{
		/* Called after platform_bootstrap() and Scheduler.init() (see TEP 107)
		 * I/O pin configuration, clock calibration, and LED configuration */
		interface Init;
	}
}

implementation
{
	components PlatformP, MoteClockC, HplSam3TCC as MoteTimerC;
    components McuSleepC;

	Init = PlatformP;

    PlatformP.MoteClockInit -> MoteClockC;
    PlatformP.IRQInit -> MoteClockC;
    PlatformP.MoteTimerInit -> MoteTimerC;

    // Used so we can initialize the platform in a state where it would draw
    // the lowest current possible if put to sleep.
    PlatformP.Sam3LowPower -> McuSleepC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/PlatformLedsC.nc000066400000000000000000000041451207233610700233310ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Connection of LEDs to the GPIO pins on the SAM3U-EK board.
 *
 * @author Wanja Hofer 
 */

configuration PlatformLedsC
{
	provides
	{
		interface GeneralIO as Led0;
		interface GeneralIO as Led1;
		interface GeneralIO as Led2;
	}
	uses
	{
		interface Init;
	}
}
implementation
{
	components HplSam3uGeneralIOC as IO;
	components PlatformP;

	Init = PlatformP.LedsInit;

	Led0 = IO.PioB0; // Pin B0 = Green LED 1, active low
	Led1 = IO.PioB1; // Pin B1 = Green LED 2, active low
	Led2 = IO.PioB2; // Pin B2 = Red LED, active high
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/PlatformP.nc000066400000000000000000000045171207233610700225410ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Wanja Hofer 
 */

#include "hardware.h"

module PlatformP
{
    provides
	{
        interface Init;
    }
	uses
	{
		interface Init as LedsInit;
        interface Init as MoteClockInit;
        interface Init as IRQInit;
        interface Init as MoteTimerInit;
        interface Sam3LowPower;
	}
}

implementation
{
	command error_t Init.init()
	{
		/* I/O pin configuration, clock calibration, and LED configuration
		 * (see TEP 107)
		 */
		call IRQInit.init();
        call MoteClockInit.init();
        call MoteTimerInit.init();
		call LedsInit.init();

		return SUCCESS;
	}

    async event void Sam3LowPower.customizePio() {
        // currently not optimized for sam3u-ek
    }

	default command error_t LedsInit.init()
	{
		return SUCCESS;
	}
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/PlatformSerialC.nc000066400000000000000000000035451207233610700236640ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Wanja Hofer 
 */

configuration PlatformSerialC
{
	provides
	{
		interface StdControl;
		interface UartStream;
		interface UartByte;
	}
}
implementation
{
	components HilSam3UartC;

	StdControl = HilSam3UartC;
	UartStream = HilSam3UartC;
	UartByte = HilSam3UartC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/000077500000000000000000000000001207233610700214125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/nandflash-working/000077500000000000000000000000001207233610700250265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlash.h000066400000000000000000000153231207233610700275050ustar00rootroot00000000000000/*
 * Copyright (c) 2010 Johns Hopkins University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef HPLNANDFLASH_H
#define HPLNANDFLASH_H

/// \page "NandFlashModel options"
/// This page lists the possible options for a NandFlash chip.
/// 
/// !Options
/// - NandFlashModel_DATABUS8
/// - NandFlashModel_DATABUS16
/// - NandFlashModel_COPYBACK

/// Indicates the Nand uses an 8-bit databus.
#define NandFlashModel_DATABUS8     (0 << 0)

/// Indicates the Nand uses a 16-bit databus.
#define NandFlashModel_DATABUS16    (1 << 0)

/// The Nand supports the copy-back function (internal page-to-page copy).
#define NandFlashModel_COPYBACK     (1 << 1)

//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
//         Types
//------------------------------------------------------------------------------

/// Maximum number of blocks in a device
#define NandCommon_MAXNUMBLOCKS             1024//2048

/// Maximum number of pages in one block
#define NandCommon_MAXNUMPAGESPERBLOCK      64

/// Maximum size of the data area of one page, in bytes.
#define NandCommon_MAXPAGEDATASIZE          2048

/// Maximum size of the spare area of one page, in bytes.
#define NandCommon_MAXPAGESPARESIZE         64

/// Maximum number of ecc bytes stored in the spare for one single page.
#define NandCommon_MAXSPAREECCBYTES         24

/// Maximum number of extra free bytes inside the spare area of a page.
#define NandCommon_MAXSPAREEXTRABYTES       38


struct NandSpareScheme {

    uint8_t badBlockMarkerPosition;
    uint8_t numEccBytes;
    uint8_t eccBytesPositions[NandCommon_MAXSPAREECCBYTES];
    uint8_t numExtraBytes;
    uint8_t extraBytesPositions[NandCommon_MAXSPAREEXTRABYTES];
};

//------------------------------------------------------------------------------
/// Describes a particular model of NandFlash device.
//------------------------------------------------------------------------------
struct NandFlashModel {

    /// Identifier for the device.
    uint8_t deviceId;
    /// Special options for the NandFlash.
    uint8_t options;
    /// Size of the data area of a page, in bytes.
    uint16_t pageSizeInBytes;
    /// Size of the device in MB.
    uint16_t deviceSizeInMegaBytes;
    /// Size of one block in kilobytes.
    uint16_t blockSizeInKBytes;
    /// Spare area placement scheme
    const struct NandSpareScheme *scheme;
};


struct RawNandFlash {

    /// Model describing this NandFlash characteristics.
    struct NandFlashModel model;
    /// Address for sending commands to the NandFlash.
    uint32_t commandAddress;
    /// Address for sending addresses to the NandFlash
    uint32_t addressAddress;
    /// Address for sending data to the NandFlash.
    uint32_t dataAddress;
    /// Pin used to enable the NandFlash chip.
  //Pin pinChipEnable;
    /// Pin used to monitor the ready/busy signal from the NandFlash.
    //Pin pinReadyBusy;
};


/// No more blocks can be allocated for a write operation.
#define NandCommon_ERROR_NOMOREBLOCKS       1

/// The desired logical block has no current physical mapping.
#define NandCommon_ERROR_BLOCKNOTMAPPED     2

/// Access if out-of-bounds.
#define NandCommon_ERROR_OUTOFBOUNDS        3

/// There are no block having the desired property.
#define NandCommon_ERROR_NOBLOCKFOUND       4

/// The nandflash device has no logical mapping information on it.
#define NandCommon_ERROR_MAPPINGNOTFOUND    5

/// A read operation cannot be carried out.
#define NandCommon_ERROR_CANNOTREAD         6

/// A write operation cannot be carried out.
#define NandCommon_ERROR_CANNOTWRITE        7

/// NandFlash chip model cannot be recognized.
#define NandCommon_ERROR_UNKNOWNMODEL       8

/// Page data is corrupted according to ECC
#define NandCommon_ERROR_CORRUPTEDDATA      9

/// Block is not in the required status.
#define NandCommon_ERROR_WRONGSTATUS        10

/// Device has no logical mapping stored in it
#define NandCommon_ERROR_NOMAPPING          11

/// The block being accessed is bad and must be replaced
#define NandCommon_ERROR_BADBLOCK           12

/// Failed to perform an erase operation
#define NandCommon_ERROR_CANNOTERASE        13

/// A hardware copyback operation failed.
#define NandCommon_ERROR_CANNOTCOPY         14

/// HW Ecc Not compatible with the Nand Model
#define NandCommon_ERROR_ECC_NOT_COMPATIBLE 15

// -------- HSMC4_CFG : (HSMC4 Offset: 0x0) Configuration Register -------- 
#define AT91C_HSMC4_PAGESIZE  (0x3 <<  0) // (HSMC4) PAGESIZE field description
#define         AT91C_HSMC4_PAGESIZE_528_Bytes            (0x0) // (HSMC4) 512 bytes plus 16 bytes page size
#define         AT91C_HSMC4_PAGESIZE_1056_Bytes           (0x1) // (HSMC4) 1024 bytes plus 32 bytes page size
#define         AT91C_HSMC4_PAGESIZE_2112_Bytes           (0x2) // (HSMC4) 2048 bytes plus 64 bytes page size
#define         AT91C_HSMC4_PAGESIZE_4224_Bytes           (0x3) // (HSMC4) 4096 bytes plus 128 bytes page size

/// Address for transferring command bytes to the nandflash.
#define BOARD_NF_COMMAND_ADDR   0x61400000
/// Address for transferring address bytes to the nandflash.
#define BOARD_NF_ADDRESS_ADDR   0x61200000
/// Address for transferring data bytes to the nandflash.
#define BOARD_NF_DATA_ADDR      0x61000000


#endif // HPLNANDFLASH_H
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlash.nc000066400000000000000000000074521207233610700276620ustar00rootroot00000000000000/*
 * Copyright (c) 2010 Johns Hopkins University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include 

interface HplNandFlash{
  //command void writeColumnAddress();
  //command void writeRowAddress();
  //command void isOperationComplete();
  //command void writeData();
  //command void readData();

  //command void eraseBlock_i(); // internal functions 
  //command void writePage_i(); // internal functions
  //command void copyPage_i(); // internal functions

  command void init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr);
  command uint8_t findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId);
  command void reset();
  command uint32_t readId();
  command uint8_t eraseBlock(const struct RawNandFlash *raw, uint16_t block);
  command uint8_t readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare);
  command uint8_t writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare);
  command uint8_t copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage);
  command uint8_t copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock);



  command uint16_t getPageDataSize(const struct NandFlashModel *model);
  command uint32_t getDeviceSizeInPages(const struct NandFlashModel *model);
  command uint16_t getBlockSizeInPages(const struct NandFlashModel *model);
  command uint8_t getPageSpareSize(const struct NandFlashModel *model);
  command uint8_t hasSmallBlocks(const struct NandFlashModel *model);
  command uint16_t getDeviceSizeInBlocks(const struct NandFlashModel * model);
  command void readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker);
  command void writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker);
  command uint32_t getDeviceSizeInBytes(const struct NandFlashModel *model);
  command uint32_t getBlockSizeInBytes(const struct NandFlashModel *model);
  command uint8_t readBlock(const struct RawNandFlash *raw, uint16_t block, void *data);
  command uint8_t writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data);
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlashC.nc000066400000000000000000000060661207233610700277650ustar00rootroot00000000000000/*
 * Copyright (c) 2010 Johns Hopkins University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

configuration HplNandFlashC{
  provides interface HplNandFlash;

}
implementation{
  components HplNandFlashP;
  HplNandFlash = HplNandFlashP;

  components HplSam3uClockC;
  HplNandFlashP.HSMC4ClockControl -> HplSam3uClockC.HSMC4PPCntl;

  components HplSam3uGeneralIOC as IO;
  HplNandFlashP.NandFlash_CE -> IO.PioC12;
  HplNandFlashP.NandFlash_RB -> IO.PioB24;

  HplNandFlashP.NandFlash_OE -> IO.HplPioB17;
  HplNandFlashP.NandFlash_WE -> IO.HplPioB18;
  HplNandFlashP.NandFlash_CLE -> IO.HplPioB22;
  HplNandFlashP.NandFlash_ALE -> IO.HplPioB21;
  
  HplNandFlashP.NandFlash_Data00 -> IO.HplPioB9;
  HplNandFlashP.NandFlash_Data01 -> IO.HplPioB10;
  HplNandFlashP.NandFlash_Data02 -> IO.HplPioB11;
  HplNandFlashP.NandFlash_Data03 -> IO.HplPioB12;
  HplNandFlashP.NandFlash_Data04 -> IO.HplPioB13;
  HplNandFlashP.NandFlash_Data05 -> IO.HplPioB14;
  HplNandFlashP.NandFlash_Data06 -> IO.HplPioB15;
  HplNandFlashP.NandFlash_Data07 -> IO.HplPioB16;

  HplNandFlashP.NandFlash_Data08 -> IO.HplPioB25;
  HplNandFlashP.NandFlash_Data09 -> IO.HplPioB26;
  HplNandFlashP.NandFlash_Data10 -> IO.HplPioB27;
  HplNandFlashP.NandFlash_Data11 -> IO.HplPioB28;
  HplNandFlashP.NandFlash_Data12 -> IO.HplPioB29;
  HplNandFlashP.NandFlash_Data13 -> IO.HplPioB30;
  HplNandFlashP.NandFlash_Data14 -> IO.HplPioB31;
  HplNandFlashP.NandFlash_Data15 -> IO.HplPioB6;

  components LedsC, LcdC;
  HplNandFlashP.Leds -> LedsC;
  HplNandFlashP.Draw -> LcdC;

  components new TimerMilliC() as TimerC;
  HplNandFlashP.ReadBlockTimer -> TimerC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlashP.nc000066400000000000000000001065511207233610700300020ustar00rootroot00000000000000/*
 * Copyright (c) 2010 Johns Hopkins University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include "HplNandFlash.h"

module HplNandFlashP{
  provides interface HplNandFlash as Hpl;

  uses interface HplSam3uPeripheralClockCntl as HSMC4ClockControl;

  uses interface GeneralIO as NandFlash_CE;
  uses interface GeneralIO as NandFlash_RB;

  uses interface HplSam3uGeneralIOPin as NandFlash_OE;
  uses interface HplSam3uGeneralIOPin as NandFlash_WE;
  uses interface HplSam3uGeneralIOPin as NandFlash_CLE;
  uses interface HplSam3uGeneralIOPin as NandFlash_ALE;

  uses interface HplSam3uGeneralIOPin as NandFlash_Data00;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data01;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data02;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data03;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data04;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data05;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data06;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data07;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data08;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data09;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data10;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data11;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data12;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data13;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data14;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data15;

  uses interface Leds;
  uses interface Draw;

  uses interface Timer as ReadBlockTimer;

}
implementation {

/// Nand flash commands
#define COMMAND_READ_1                  0x00
#define COMMAND_READ_2                  0x30
#define COMMAND_COPYBACK_READ_1         0x00
#define COMMAND_COPYBACK_READ_2         0x35
#define COMMAND_COPYBACK_PROGRAM_1      0x85
#define COMMAND_COPYBACK_PROGRAM_2      0x10
#define COMMAND_RANDOM_OUT              0x05
#define COMMAND_RANDOM_OUT_2            0xE0
#define COMMAND_RANDOM_IN               0x85
#define COMMAND_READID                  0x90
#define COMMAND_WRITE_1                 0x80
#define COMMAND_WRITE_2                 0x10
#define COMMAND_ERASE_1                 0x60
#define COMMAND_ERASE_2                 0xD0
#define COMMAND_STATUS                  0x70
#define COMMAND_RESET                   0xFF

#define COMMAND_READ_A                  0x00
#define COMMAND_READ_C                  0x50

#define STATUS_READY                    (1 << 6)
#define STATUS_ERROR                    (1 << 0)


#define WRITE_COMMAND(commandAddress, u_command) \
    {*((volatile uint8_t *) commandAddress) = (uint8_t) u_command;}
#define WRITE_COMMAND16(commandAddress, u_command) \
    {*((volatile uint16_t *) commandAddress) = (uint16_t) u_command;}
#define WRITE_ADDRESS(addressAddress, address) \
    {*((volatile uint8_t *) addressAddress) = (uint8_t) address;}
#define WRITE_ADDRESS16(addressAddress, address) \
    {*((volatile uint16_t *) addressAddress) = (uint16_t) address;}
#define WRITE_DATA8(dataAddress, data) \
    {*((volatile uint8_t *) dataAddress) = (uint8_t) data;}
#define READ_DATA8(dataAddress) \
    (*((volatile uint8_t *) dataAddress))
#define WRITE_DATA16(dataAddress, data) \
    {*((volatile uint16_t *) dataAddress) = (uint16_t) data;}
#define READ_DATA16(dataAddress) \
    (*((volatile uint16_t *) dataAddress))

/// Number of tries for erasing a block
#define NUMERASETRIES           2
/// Number of tries for writing a block
#define NUMWRITETRIES           2
/// Number of tries for copying a block
#define NUMCOPYTRIES            2

/// Number of NandFlash models inside the list.
#define NandFlashModelList_SIZE         58

#define MODEL(raw)  ((struct NandFlashModel *) raw)

  //------------------------------------------------------------------------------
  //         Exported variables
  //------------------------------------------------------------------------------
  
  //extern const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE];

  /// Spare area placement scheme for 256 byte pages.
  const struct NandSpareScheme nandSpareScheme256 = {

    // Bad block marker is at position #5
    5,
    // 3 ecc bytes
    3,
    // Ecc bytes positions
    {0, 1, 2},
    // 4 extra bytes
    4,
    // Extra bytes positions
    {3, 4, 6, 7}
  };

  /// Spare area placement scheme for 512 byte pages.
  const struct NandSpareScheme nandSpareScheme512 = {

    // Bad block marker is at position #5
    5,
    // 6 ecc bytes
    6,
    // Ecc bytes positions
    {0, 1, 2, 3, 6, 7},
    // 8 extra bytes
    8,
    // Extra bytes positions
    {8, 9, 10, 11, 12, 13, 14, 15}
  };

  /// Spare area placement scheme for 2048 byte pages.
  const struct NandSpareScheme nandSpareScheme2048 = {

    // Bad block marker is at position #0
    0,
    // 24 ecc bytes
    24, 
    // Ecc bytes positions
    {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
     59, 60, 61, 62, 63},
    // 38 extra bytes
    38,
    // Extra bytes positions
    {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
     22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39}
  };

  /// List of NandFlash models which can be recognized by the software.
  const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE] = {

    // |  ID    | Options                 | Page    | Mo  | Block   |BlkPg   |DevBlk
    {0x6e,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0x64,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
    {0x6b,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe8,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0xec,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0xea,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
    {0xd5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe3,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xd6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},

    {0x39,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
    {0xe6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
    {0x49,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
    {0x59,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},

    {0x33,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
    {0x73,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
    {0x43,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
    {0x53,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
                                                             
    {0x35,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
    {0x75,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
    {0x45,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
    {0x55,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
                                                             
    {0x36,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
    {0x76,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
    {0x46,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
    {0x56,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
                                                             
    {0x78,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x39,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x79,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x72,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x49,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x74,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x59,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
                                                             
    {0x71,   NandFlashModel_DATABUS8,    512,    256,   16,    &nandSpareScheme512},
	
    // Large blocks devices. Parameters must be fetched from the extended I
#define OPTIONS     NandFlashModel_COPYBACK                   
                                                                                          
    {0xA2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xF2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xB2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xC2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    
    {0xA1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
    {0xF1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
    {0xB1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
    {0xC1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
                                                                  
    {0xAA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
    {0xDA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,   &nandSpareScheme2048},                                              
    {0xBA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
    {0xCA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
	                                                                
    {0xAC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
    {0xDC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
    {0xBC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
    {0xCC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
                                                                  
    {0xA3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
    {0xD3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
    {0xB3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
    {0xC3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
                                                                  
    {0xA5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
    {0xD5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
    {0xB5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
    {0xC5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
  };

  uint16_t numBlocks;
  uint32_t memSize;
  uint32_t blockSize;
  uint16_t numPagesPerBlock;
  uint16_t pageDataSize;

  void WaitReady(){
    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
    while ((READ_DATA8(BOARD_NF_DATA_ADDR) & STATUS_READY) != STATUS_READY);
  }

  uint8_t GetDataBusWidth(const struct NandFlashModel *model){
    return (model->options&NandFlashModel_DATABUS16)? 16: 8;
  }

  void WriteColumnAddress(const struct RawNandFlash *raw, uint16_t columnAddress){
    
    uint16_t pageSize = call Hpl.getPageDataSize(MODEL(raw));

    call Draw.drawInt(200, 250, pageSize, 1, COLOR_BLACK);

    /* Check the data bus width of the NandFlash */
    if (GetDataBusWidth(MODEL(raw)) == 16) {
      /* Div 2 is because we address in word and not in byte */
      columnAddress >>= 1;
    }
    while (pageSize > 0) {
      if (GetDataBusWidth(MODEL(raw)) == 16) {
	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
      } else {
	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
      }
      pageSize >>= 8;
      columnAddress >>= 8;
    }
  }

  //------------------------------------------------------------------------------
  /// Sends the row address to the NandFlash chip.
  /// \param raw  Pointer to a RawNandFlash instance.
  /// \param rowAddress  Row address to send.
  //------------------------------------------------------------------------------
  void WriteRowAddress(const struct RawNandFlash *raw, uint32_t rowAddress){

    uint32_t numPages = call Hpl.getDeviceSizeInPages(MODEL(raw));

    while (numPages > 0) {
      if (GetDataBusWidth(MODEL(raw)) == 16) {
	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
      } else {
	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
      }
      numPages >>= 8;
      rowAddress >>= 8;
    }
  }

  void WriteData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
    uint32_t i;
    // Check the data bus width of the NandFlash
    if (GetDataBusWidth(MODEL(raw)) == 16) {
      uint16_t *buffer16 = (uint16_t *) buffer;
      size >>= 1;
      for(i=0; i < size; i++) {
	//call Draw.drawInt(15,50, buffer16[i], 1, COLOR_RED);
	WRITE_DATA16(BOARD_NF_DATA_ADDR, /*buffer16[i]*/ 23);
      }
    } else {
      for(i=0; i < size; i++) {
	WRITE_DATA8(BOARD_NF_DATA_ADDR, buffer[i]);
      }
    }
  }

  uint8_t count = 0;

  void ReadData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
    uint32_t i;
    // Check the chip data bus width

    count ++;

    if (GetDataBusWidth(MODEL(raw)) == 16) {
      uint16_t *buffer16 = (uint16_t *) buffer;

      size >>= 1;

      call Draw.drawInt(200,130, size, 1, COLOR_YELLOW);

      for (i=0 ; i < size ; i++) {
	//buffer16[i] = READ_DATA16(BOARD_NF_DATA_ADDR);
	call Draw.drawInt(150,50, READ_DATA16(BOARD_NF_DATA_ADDR), 1, COLOR_BLACK);
      }

      call Draw.drawInt(100,150, buffer16[0], 1, COLOR_BLACK);
      call Draw.drawInt(200,150, buffer16[30], 1, COLOR_BLACK);

    } else {

      for (i=0; i < size; i++) {
	buffer[i] = READ_DATA8(BOARD_NF_DATA_ADDR);
      }
    }

    call Draw.drawInt(count*15,130, count, 1, COLOR_BLUE);
  }

  uint8_t IsOperationComplete(const struct RawNandFlash *raw){
    uint8_t status;

    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);

    status = READ_DATA8(BOARD_NF_DATA_ADDR);

    if (((status & STATUS_READY) != STATUS_READY) || ((status & STATUS_ERROR) != 0)) {
        return 0;
    }
    return 1;
  }

  uint8_t EraseBlock( const struct RawNandFlash *raw, unsigned short block){
    uint8_t error = 0;
    uint32_t rowAddress;

    // Calculate address used for erase
    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw));

    // Start erase
    //ENABLE_CE(raw);
    // Enable CE
    call NandFlash_CE.clr();

    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_1);
    WriteRowAddress(raw, rowAddress);
    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_2);

    WaitReady();

    if (!IsOperationComplete(raw)) {
      error = NandCommon_ERROR_CANNOTERASE;
    }

    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return error;
    
  }

  uint8_t WritePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
    
    uint32_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
    uint32_t spareDataSize = call Hpl.getPageSpareSize(MODEL(raw));
    uint16_t dummyByte;
    uint32_t rowAddress;
    uint8_t error = 0;

    // Calculate physical address of the page
    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw)) + page;

    // Start write operation
    //ENABLE_CE(raw);
    // Enable CE;
    call NandFlash_CE.clr();

    // Write data area if needed
    if (data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
      WriteColumnAddress(raw, 0);
      WriteRowAddress(raw, rowAddress);
      WriteData(raw, (uint8_t *) data, pageSize);

      //call Draw.drawInt(50, 50, (uint8_t)data[0], 1, COLOR_RED);

      // Spare is written here as well since it is more efficient
      if (spare) {
	WriteData(raw, (uint8_t *) spare, spareDataSize);
      }
      else {
	// Note: special case when ECC parity generation. 
	// ECC results are available as soon as the counter reaches the end of the main area.
	// But when reach PageSize for an example, it could not generate last ECC_PR, The 
	// workaround is to receive PageSize+1 word.
	ReadData(raw, (uint8_t *) (&dummyByte), 2);
      }
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);

      WaitReady();

      if (!IsOperationComplete(raw)) {
	error = NandCommon_ERROR_CANNOTWRITE;
      }
    }

    // Write spare area alone if needed
    if (spare && !data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
      WriteColumnAddress(raw, pageSize);
      WriteRowAddress(raw, rowAddress);
      WriteData(raw, (uint8_t *) spare, spareDataSize);
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);

      WaitReady();
      if (!IsOperationComplete(raw)) {
	error = NandCommon_ERROR_CANNOTWRITE;
      }
    }

    // Disable chip
    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return error;

  }

  uint8_t CopyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){

    uint32_t sourceRow, destRow;
    uint8_t error = 0;
    uint8_t data[NandCommon_MAXPAGEDATASIZE];
    uint8_t spare[NandCommon_MAXPAGESPARESIZE];
    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
    sourceRow = sourceBlock * numPages + sourcePage;
    destRow = destBlock * numPages + destPage;

    if (call Hpl.readPage(raw, sourceBlock, sourcePage, data, spare)) {
      error = NandCommon_ERROR_CANNOTREAD;
    } else if (call Hpl.writePage(raw, destBlock, destPage, data, spare)) {
      error = NandCommon_ERROR_CANNOTWRITE;
    }

    return error;    
  }

  void configureNandFlash(uint8_t busWidth){
    // Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
    // set clock
    // set smc registers
    volatile smc_setup_t *SETUP = (volatile smc_setup_t *) (0x400E0084 + 0x0);
    smc_setup_t setup = *SETUP;
    volatile smc_pulse_t *PULSE = (volatile smc_pulse_t *) (0x400E0084 + 0x4);
    smc_pulse_t pulse = *PULSE;
    volatile smc_cycle_t *CYCLE = (volatile smc_cycle_t *) (0x400E0084 + 0x8);
    smc_cycle_t cycle = *CYCLE;
    volatile smc_timings_t *TIMINGS = (volatile smc_timings_t *) (0x400E0084 + 0xC);
    smc_timings_t timings = *TIMINGS;
    volatile smc_mode_t *MODE = (volatile smc_mode_t *) (0x400E0084 + 0x10);
    smc_mode_t mode = *MODE;

    // start clock for register access
    call HSMC4ClockControl.disable();
    call HSMC4ClockControl.enable();

    setup.bits.nwe_setup = 0;
    setup.bits.ncs_wr_setup = 1;
    setup.bits.nrd_setup = 0;
    setup.bits.ncs_rd_setup = 1;

    *SETUP = setup;

    pulse.bits.nwe_pulse = 2;
    pulse.bits.ncs_wr_pulse = 3;
    pulse.bits.nrd_pulse = 3;
    pulse.bits.ncs_rd_pulse = 4;

    *PULSE = pulse;

    cycle.bits.nwe_cycle = 4;
    cycle.bits.nrd_cycle = 7;

    *CYCLE = cycle;

    timings.bits.tclr = 1;
    timings.bits.tadl = 2;
    timings.bits.tar = 1;
    timings.bits.trr = 1;
    timings.bits.twb = 2;
    timings.bits.rbnsel = 7;
    timings.bits.nfsel = 1;

    *TIMINGS = timings;

    if(busWidth == 8){
      mode.bits.dbw = 0;
      mode.bits.read_mode = 1;
      mode.bits.write_mode = 1;

      *MODE = mode;

    }else if(busWidth == 16){
      mode.bits.dbw = 1;
      mode.bits.read_mode = 1;
      mode.bits.write_mode = 1;

      *MODE = mode;
      
    }
  }

  void configurePsRam(){
    // TODO: Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
    // TODO: Does Atmel code work with this disabled?
  }

  void configureNandPins(){

    // Pin setting

    call NandFlash_CE.makeOutput();
    call NandFlash_RB.makeInput();

    call NandFlash_OE.disablePioControl();
    call NandFlash_WE.disablePioControl();
    call NandFlash_CLE.disablePioControl();
    call NandFlash_ALE.disablePioControl();

    call NandFlash_OE.selectPeripheralA();
    call NandFlash_WE.selectPeripheralA();
    call NandFlash_CLE.selectPeripheralA();
    call NandFlash_ALE.selectPeripheralA();

    call NandFlash_Data00.disablePioControl();
    call NandFlash_Data01.disablePioControl();
    call NandFlash_Data02.disablePioControl();
    call NandFlash_Data03.disablePioControl();
    call NandFlash_Data04.disablePioControl();
    call NandFlash_Data05.disablePioControl();
    call NandFlash_Data06.disablePioControl();
    call NandFlash_Data07.disablePioControl();
    call NandFlash_Data08.disablePioControl();
    call NandFlash_Data09.disablePioControl();
    call NandFlash_Data10.disablePioControl();
    call NandFlash_Data11.disablePioControl();
    call NandFlash_Data12.disablePioControl();
    call NandFlash_Data13.disablePioControl();
    call NandFlash_Data14.disablePioControl();
    call NandFlash_Data15.disablePioControl();

    call NandFlash_Data00.selectPeripheralA();
    call NandFlash_Data01.selectPeripheralA();
    call NandFlash_Data02.selectPeripheralA();
    call NandFlash_Data03.selectPeripheralA();
    call NandFlash_Data04.selectPeripheralA();
    call NandFlash_Data05.selectPeripheralA();
    call NandFlash_Data06.selectPeripheralA();
    call NandFlash_Data07.selectPeripheralA();
    call NandFlash_Data08.selectPeripheralA();
    call NandFlash_Data09.selectPeripheralA();
    call NandFlash_Data10.selectPeripheralA();
    call NandFlash_Data11.selectPeripheralA();
    call NandFlash_Data12.selectPeripheralA();
    call NandFlash_Data13.selectPeripheralA();
    call NandFlash_Data14.selectPeripheralA();
    call NandFlash_Data15.selectPeripheralB(); // PB6
  }

  command uint8_t Hpl.hasSmallBlocks(const struct NandFlashModel *model){
    return (model->pageSizeInBytes <= 512 )? 1: 0;
  }

  //------------------------------------------------------------------------------
  /// Returns the size of the data area of a page in bytes.
  /// \param model  Pointer to a NandFlashModel instance.
  //------------------------------------------------------------------------------
  command uint16_t Hpl.getPageDataSize(const struct NandFlashModel *model){
    return model->pageSizeInBytes;
  }

  //------------------------------------------------------------------------------
  /// Returns the size of the spare area of a page in bytes.
  /// \param model  Pointer to a NandFlashModel instance.
  //------------------------------------------------------------------------------
  command uint8_t Hpl.getPageSpareSize(const struct NandFlashModel *model){
    return (model->pageSizeInBytes>>5); /// Spare size is 16/512 of data size
  }

  command void Hpl.init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr){
    uint32_t chipId;
    uint8_t error;
    uint8_t busWidth = 16;

    //configurePsRam();
    configureNandFlash(busWidth);
    configureNandPins();

    HplNand -> commandAddress = commandAddr;
    HplNand -> addressAddress = addressAddr;
    HplNand -> dataAddress = dataAddr;

    call Hpl.reset();

    if(!model){
      chipId = call Hpl.readId();
      error = call Hpl.findNandModel(nandFlashModelList, NandFlashModelList_SIZE, &(HplNand->model), chipId);
    }else{
      HplNand -> model = *model;
    }

    if(!error){
    } else {
    }

    busWidth = 0;
    busWidth = GetDataBusWidth(MODEL(HplNand));
    configureNandFlash(busWidth);
    
    memSize = call Hpl.getDeviceSizeInBytes(MODEL(HplNand));
    blockSize = call Hpl.getBlockSizeInBytes(MODEL(HplNand));
    numBlocks = call Hpl.getDeviceSizeInBlocks(MODEL(HplNand));
    pageDataSize = call Hpl.getPageDataSize(MODEL(HplNand));
    numPagesPerBlock = call Hpl.getBlockSizeInPages(MODEL(HplNand));    

    call Draw.drawInt(150, 20, busWidth, 1, COLOR_BLACK);
    call Draw.drawInt(150, 40, pageDataSize, 1, COLOR_BLACK);
    call Draw.drawInt(150, 60, memSize, 1, COLOR_BLACK);
    call Draw.drawInt(150, 80, numPagesPerBlock, 1, COLOR_BLACK);

  }

  command uint8_t Hpl.findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId){

    uint8_t i, found = 0;

    //volatile smc_cfg_t *CFG = (volatile smc_cfg_t *) (0x400E0000);
    //smc_cfg_t cfg = *CFG;

    uint8_t id2 = (uint8_t)(chipId>>8);
    uint8_t id4 = (uint8_t)(chipId>>24);

    //call Draw.drawInt(100, 60, chipId, 1, COLOR_YELLOW);
    //call Draw.drawInt(100, 80, id2, 1, COLOR_YELLOW);
    
    for(i=0; iblockSizeInKBytes == 0 || model->pageSizeInBytes == 0) {
	    //TRACE_DEBUG("Fetch from ID4(0x%.2x):\r\n", id4);
	    /// Fetch from the extended ID4
	    /// ID4 D5  D4 BlockSize || D1  D0  PageSize
	    ///     0   0   64K      || 0   0   1K
	    ///     0   1   128K     || 0   1   2K
	    ///     1   0   256K     || 1   0   4K
	    ///     1   1   512K     || 1   1   8k
	    switch(id4 & 0x03) {
	    case 0x00: model->pageSizeInBytes = 1024; break;
	    case 0x01: model->pageSizeInBytes = 2048; break;
	    case 0x02: model->pageSizeInBytes = 4096; break;
	    case 0x03: model->pageSizeInBytes = 8192; break;
	    }
	    switch(id4 & 0x30) {
	    case 0x00: model->blockSizeInKBytes = 64;  break;
	    case 0x10: model->blockSizeInKBytes = 128; break;
	    case 0x20: model->blockSizeInKBytes = 256; break;
	    case 0x30: model->blockSizeInKBytes = 512; break;
	    }
	  }

	  /*
	  switch(model->pageSizeInBytes) {
	  case 1024: pageSize = AT91C_HSMC4_PAGESIZE_1056_Bytes; break;
	  case 2048: pageSize = AT91C_HSMC4_PAGESIZE_2112_Bytes; break;
	  case 4096: pageSize = AT91C_HSMC4_PAGESIZE_4224_Bytes; break;
	  default: ;//TRACE_ERROR("Unsupportted page size for NAND Flash Controller\n\r");
	  }
	  // This part sets the SMC registers? this is it?

	  cfg.bits.pagesize = pageSize;
	  cfg.bits.dtomul = 7;
	  cfg.bits.edgectrl = 1;
	  cfg.bits.dtocyc = 0xF;
	  cfg.bits.rspare = 1;

	  *CFG = cfg;
	  //HSMC4_SetMode(pageSize | AT91C_HSMC4_DTOMUL_1048576 | AT91C_HSMC4_EDGECTRL | AT91C_HSMC4_DTOCYC | AT91C_HSMC4_RSPARE); // ?????????????
	  */
	}
	break;
      }
    }

    // Check if chip has been detected
    if (found) {
      return 0;
    }
    else {
      return NandCommon_ERROR_UNKNOWNMODEL;
    }
  }

  command void Hpl.reset(){
    /*
      1. Enable CE
      2. Write reset command
      3. wait for ready
      4. Disable CE
     */

    // Enable CE
    call NandFlash_CE.clr();

    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
    //WRTIE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
    WaitReady();
    // Disable CE

    call NandFlash_CE.set();
  }

  command uint32_t Hpl.readId(){
    uint32_t chipId;

    // enable CE 
    call NandFlash_CE.clr();

    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
    //WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
    WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, 0);

    chipId  = READ_DATA8(BOARD_NF_DATA_ADDR);
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 8;
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 16;
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 24;

    // Disable CE 
    call NandFlash_CE.set();

    return chipId;
  }

  command uint16_t Hpl.getDeviceSizeInBlocks(const struct NandFlashModel * model){
    return ((1024) / model->blockSizeInKBytes) * model->deviceSizeInMegaBytes;
  }

  command uint32_t Hpl.getDeviceSizeInPages(const struct NandFlashModel *model){
    return (uint32_t) call Hpl.getDeviceSizeInBlocks(model) * call Hpl.getBlockSizeInPages(model);
  }

  command uint8_t Hpl.eraseBlock(const struct RawNandFlash *raw, uint16_t block){

    uint8_t numTries = NUMERASETRIES;

    while (numTries > 0) {

        if (!EraseBlock(raw, block)) {

            return 0;
        }
        numTries--;
    }

    return NandCommon_ERROR_BADBLOCK;

  }

  command uint16_t Hpl.getBlockSizeInPages(const struct NandFlashModel *model){
    return model->blockSizeInKBytes * 1024 / model->pageSizeInBytes;
  }

  command uint8_t Hpl.readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){

    uint32_t colAddress;
    uint32_t rowAddress;
    uint8_t hasSmallBlocks;
    uint32_t pageSpareSize;

    hasSmallBlocks = call Hpl.hasSmallBlocks(MODEL(raw));
    pageSpareSize = call Hpl.getPageSpareSize(MODEL(raw));

    // Calculate actual address of the page
    rowAddress = (uint32_t) block * numPagesPerBlock /*call Hpl.getBlockSizeInPages(MODEL(raw))*/ + page;

    // Start operation
    //ENABLE_CE(raw);
    // Enable CE
    call NandFlash_CE.clr();

    if (data) {
      colAddress = 0;
    } else {
      // to read spare area in sequential access
      colAddress = pageDataSize;
    }

    // Use either small blocks or large blocks data area read
    if (hasSmallBlocks) {
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_A);
      WriteColumnAddress(raw, colAddress);
      WriteRowAddress(raw, rowAddress);
    } else {
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
      WriteColumnAddress(raw, colAddress);
      WriteRowAddress(raw, rowAddress);
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_2);
    }

    // Wait for the nand to be ready
    WaitReady();

    //pageDataSize = call Hpl.getPageDataSize(MODEL(raw));
    call Draw.drawInt(200, 220, colAddress, 1, COLOR_BLUE);
    call Draw.drawInt(100, 220, pageDataSize, 1, COLOR_BLUE);
    call Draw.drawInt(rowAddress*15, 200, rowAddress, 1, COLOR_BLUE);

    // Read data area if needed
    if (data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);

      if(pageDataSize != 2048){
	call Draw.drawInt(200, 240, page, 1, COLOR_GREEN);
      }

      ReadData(raw, (uint8_t *) data, pageDataSize);

      if (spare) {
	//call Leds.led2Toggle();
	ReadData(raw, (uint8_t *) spare, pageSpareSize);
      }
    }
    else {
      // Read spare area only
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
      ReadData(raw, (uint8_t *) spare, pageSpareSize);
    }


    // Disable CE
    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return 0;
  }

  //------------------------------------------------------------------------------
  /// Reads the bad block marker inside a spare area buffer using the provided
  /// scheme.
  /// \param scheme  Pointer to a NandSpareScheme instance.
  /// \param spare  Spare area buffer.
  /// \param marker  Pointer to the variable to store the bad block marker.
  //------------------------------------------------------------------------------
  command void Hpl.readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker){
    *marker = spare[scheme->badBlockMarkerPosition];
  }

  //------------------------------------------------------------------------------
  /// Modifies the bad block marker inside a spare area, using the given scheme.
  /// \param scheme  Pointer to a NandSpareScheme instance.
  /// \param spare  Spare area buffer.
  /// \param marker  Bad block marker to write.
  //------------------------------------------------------------------------------
  command void Hpl.writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker){
    spare[scheme->badBlockMarkerPosition] = marker;
  }

  command uint32_t Hpl.getDeviceSizeInBytes(const struct NandFlashModel *model){
    return ((uint32_t) model->deviceSizeInMegaBytes) << 20;
  }

  command uint32_t Hpl.getBlockSizeInBytes(const struct NandFlashModel *model){
    return (model->blockSizeInKBytes *1024);
  }

  command uint8_t Hpl.writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
    uint8_t numTries = NUMWRITETRIES;
    while (numTries > 0) {
      if (!WritePage(raw, block, page, data, spare)) {
	return 0;
      }
      numTries--;
    }
    return NandCommon_ERROR_BADBLOCK;
  }

  command uint8_t Hpl.copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
    uint8_t numTries = NUMCOPYTRIES;
    while (numTries) {
      if (!CopyPage(raw, sourceBlock, sourcePage, destBlock, destPage)) {
	return 0;
      }
      numTries--;
    }
    return NandCommon_ERROR_BADBLOCK;
  }

  command uint8_t Hpl.copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock){
    uint32_t i;
    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
    // Copy all pages
    for (i=0; i < numPages; i++) {
      if (call Hpl.copyPage(raw, sourceBlock, i, destBlock, i)) {
	return NandCommon_ERROR_BADBLOCK;
      }
    }
    return 0;
  }

  uint16_t totalReadFromBlock = 0;
  uint16_t readBlock = 0;
  void* readData;
  const struct RawNandFlash saveRaw;

  void readBlockTask(){

    uint8_t error;

    call Draw.fill(COLOR_WHITE);

    error = call Hpl.readPage(&saveRaw, readBlock, totalReadFromBlock, readData, 0);//ECC(skipBlock), block, i, data, 0);
    totalReadFromBlock ++;

    if (error) {
      //call Leds.led0Toggle();
      return;
    }else if(totalReadFromBlock < numPagesPerBlock){
      //call Draw.drawInt(totalReadFromBlock*15, 170, totalReadFromBlock, 1, COLOR_BLUE);
      //call Draw.drawInt(200, 185, numPagesPerBlock, 1, COLOR_BLUE);
      readData = (void *) ((uint8_t *) readData + pageDataSize);
      readBlockTask();
      //call ReadBlockTimer.startOneShot(5);
    }else{
      call Leds.led2Toggle();
    }
    
  }

  command uint8_t Hpl.readBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
    //uint16_t i, error;

    totalReadFromBlock = 0;

    memcpy((void*)&saveRaw, (void*)raw, sizeof(struct RawNandFlash));

    readBlock = block;
    readData = data;

    readBlockTask();

    return 0;
  }

  command uint8_t Hpl.writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
    uint8_t error, i;

    for(i=0; i as ReadBlockTimer;

}
implementation {

/// Nand flash commands
#define COMMAND_READ_1                  0x00
#define COMMAND_READ_2                  0x30
#define COMMAND_COPYBACK_READ_1         0x00
#define COMMAND_COPYBACK_READ_2         0x35
#define COMMAND_COPYBACK_PROGRAM_1      0x85
#define COMMAND_COPYBACK_PROGRAM_2      0x10
#define COMMAND_RANDOM_OUT              0x05
#define COMMAND_RANDOM_OUT_2            0xE0
#define COMMAND_RANDOM_IN               0x85
#define COMMAND_READID                  0x90
#define COMMAND_WRITE_1                 0x80
#define COMMAND_WRITE_2                 0x10
#define COMMAND_ERASE_1                 0x60
#define COMMAND_ERASE_2                 0xD0
#define COMMAND_STATUS                  0x70
#define COMMAND_RESET                   0xFF

#define COMMAND_READ_A                  0x00
#define COMMAND_READ_C                  0x50

#define STATUS_READY                    (1 << 6)
#define STATUS_ERROR                    (1 << 0)


#define WRITE_COMMAND(commandAddress, u_command) \
    {*((volatile uint8_t *) commandAddress) = (uint8_t) u_command;}
#define WRITE_COMMAND16(commandAddress, u_command) \
    {*((volatile uint16_t *) commandAddress) = (uint16_t) u_command;}
#define WRITE_ADDRESS(addressAddress, address) \
    {*((volatile uint8_t *) addressAddress) = (uint8_t) address;}
#define WRITE_ADDRESS16(addressAddress, address) \
    {*((volatile uint16_t *) addressAddress) = (uint16_t) address;}
#define WRITE_DATA8(dataAddress, data) \
    {*((volatile uint8_t *) dataAddress) = (uint8_t) data;}
#define READ_DATA8(dataAddress) \
    (*((volatile uint8_t *) dataAddress))
#define WRITE_DATA16(dataAddress, data) \
    {*((volatile uint16_t *) dataAddress) = (uint16_t) data;}
#define READ_DATA16(dataAddress) \
    (*((volatile uint16_t *) dataAddress))

/// Number of tries for erasing a block
#define NUMERASETRIES           2
/// Number of tries for writing a block
#define NUMWRITETRIES           2
/// Number of tries for copying a block
#define NUMCOPYTRIES            2

/// Number of NandFlash models inside the list.
#define NandFlashModelList_SIZE         58

#define MODEL(raw)  ((struct NandFlashModel *) raw)

  //------------------------------------------------------------------------------
  //         Exported variables
  //------------------------------------------------------------------------------
  
  //extern const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE];

  /// Spare area placement scheme for 256 byte pages.
  const struct NandSpareScheme nandSpareScheme256 = {

    // Bad block marker is at position #5
    5,
    // 3 ecc bytes
    3,
    // Ecc bytes positions
    {0, 1, 2},
    // 4 extra bytes
    4,
    // Extra bytes positions
    {3, 4, 6, 7}
  };

  /// Spare area placement scheme for 512 byte pages.
  const struct NandSpareScheme nandSpareScheme512 = {

    // Bad block marker is at position #5
    5,
    // 6 ecc bytes
    6,
    // Ecc bytes positions
    {0, 1, 2, 3, 6, 7},
    // 8 extra bytes
    8,
    // Extra bytes positions
    {8, 9, 10, 11, 12, 13, 14, 15}
  };

  /// Spare area placement scheme for 2048 byte pages.
  const struct NandSpareScheme nandSpareScheme2048 = {

    // Bad block marker is at position #0
    0,
    // 24 ecc bytes
    24, 
    // Ecc bytes positions
    {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
     59, 60, 61, 62, 63},
    // 38 extra bytes
    38,
    // Extra bytes positions
    {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
     22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39}
  };

  /// List of NandFlash models which can be recognized by the software.
  const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE] = {

    // |  ID    | Options                 | Page    | Mo  | Block   |BlkPg   |DevBlk
    {0x6e,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0x64,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
    {0x6b,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe8,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0xec,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0xea,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
    {0xd5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe3,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xd6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},

    {0x39,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
    {0xe6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
    {0x49,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
    {0x59,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},

    {0x33,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
    {0x73,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
    {0x43,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
    {0x53,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
                                                             
    {0x35,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
    {0x75,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
    {0x45,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
    {0x55,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
                                                             
    {0x36,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
    {0x76,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
    {0x46,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
    {0x56,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
                                                             
    {0x78,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x39,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x79,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x72,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x49,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x74,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x59,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
                                                             
    {0x71,   NandFlashModel_DATABUS8,    512,    256,   16,    &nandSpareScheme512},
	
    // Large blocks devices. Parameters must be fetched from the extended I
#define OPTIONS     NandFlashModel_COPYBACK                   
                                                                                          
    {0xA2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xF2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xB2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xC2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    
    {0xA1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
    {0xF1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
    {0xB1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
    {0xC1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
                                                                  
    {0xAA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
    {0xDA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,   &nandSpareScheme2048},                                              
    {0xBA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
    {0xCA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
	                                                                
    {0xAC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
    {0xDC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
    {0xBC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
    {0xCC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
                                                                  
    {0xA3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
    {0xD3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
    {0xB3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
    {0xC3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
                                                                  
    {0xA5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
    {0xD5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
    {0xB5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
    {0xC5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
  };

  uint16_t numBlocks;
  uint32_t memSize;
  uint32_t blockSize;
  uint16_t numPagesPerBlock;
  uint16_t pageDataSize;

  void WaitReady(){
    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
    while ((READ_DATA8(BOARD_NF_DATA_ADDR) & STATUS_READY) != STATUS_READY);
  }

  uint8_t GetDataBusWidth(const struct NandFlashModel *model){
    return (model->options&NandFlashModel_DATABUS16)? 16: 8;
  }

  void WriteColumnAddress(const struct RawNandFlash *raw, uint16_t columnAddress){
    
    uint16_t pageSize = call Hpl.getPageDataSize(MODEL(raw));

    call Draw.drawInt(200, 250, pageSize, 1, COLOR_BLACK);

    /* Check the data bus width of the NandFlash */
    if (GetDataBusWidth(MODEL(raw)) == 16) {
      /* Div 2 is because we address in word and not in byte */
      columnAddress >>= 1;
    }
    while (pageSize > 0) {
      if (GetDataBusWidth(MODEL(raw)) == 16) {
	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
      } else {
	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
      }
      pageSize >>= 8;
      columnAddress >>= 8;
    }
  }

  //------------------------------------------------------------------------------
  /// Sends the row address to the NandFlash chip.
  /// \param raw  Pointer to a RawNandFlash instance.
  /// \param rowAddress  Row address to send.
  //------------------------------------------------------------------------------
  void WriteRowAddress(const struct RawNandFlash *raw, uint32_t rowAddress){

    uint32_t numPages = call Hpl.getDeviceSizeInPages(MODEL(raw));

    while (numPages > 0) {
      if (GetDataBusWidth(MODEL(raw)) == 16) {
	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
      } else {
	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
      }
      numPages >>= 8;
      rowAddress >>= 8;
    }
  }

  void WriteData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
    uint32_t i;
    // Check the data bus width of the NandFlash
    if (GetDataBusWidth(MODEL(raw)) == 16) {
      uint16_t *buffer16 = (uint16_t *) buffer;
      size >>= 1;
      for(i=0; i < size; i++) {
	call Draw.drawInt(i*15,50, i, 1, COLOR_RED);
	WRITE_DATA16(BOARD_NF_DATA_ADDR, buffer16[i]);
      }
    } else {
      for(i=0; i < size; i++) {
	WRITE_DATA8(BOARD_NF_DATA_ADDR, buffer[i]);
      }
    }
  }

  uint8_t count = 0;

  void ReadData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
    uint16_t i;
    // Check the chip data bus width

    count ++;

    if (GetDataBusWidth(MODEL(raw)) == 16) {
      uint16_t *buffer16 = (uint16_t *) buffer;

      size >>= 1;

      //call Draw.drawInt(200,130, size, 1, COLOR_YELLOW);

      for (i=0; i < size; i++) {
	call Draw.drawInt(i*15,50, i, 1, COLOR_BLACK);
	buffer16[i] = READ_DATA16(BOARD_NF_DATA_ADDR);
      }

      call Draw.drawInt(100,150, buffer16[0], 1, COLOR_BLACK);
      call Draw.drawInt(200,150, buffer16[1], 1, COLOR_BLACK);

    } else {

      for (i=0; i < size; i++) {
	buffer[i] = READ_DATA8(BOARD_NF_DATA_ADDR);
      }
    }

    call Draw.drawInt(count*15,130, count, 1, COLOR_BLUE);
  }

  uint8_t IsOperationComplete(const struct RawNandFlash *raw){
    uint8_t status;

    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);

    status = READ_DATA8(BOARD_NF_DATA_ADDR);

    if (((status & STATUS_READY) != STATUS_READY) || ((status & STATUS_ERROR) != 0)) {
        return 0;
    }
    return 1;
  }

  uint8_t EraseBlock( const struct RawNandFlash *raw, unsigned short block){
    uint8_t error = 0;
    uint32_t rowAddress;

    // Calculate address used for erase
    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw));

    // Start erase
    //ENABLE_CE(raw);
    // Enable CE
    call NandFlash_CE.clr();

    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_1);
    WriteRowAddress(raw, rowAddress);
    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_2);

    WaitReady();

    if (!IsOperationComplete(raw)) {
      error = NandCommon_ERROR_CANNOTERASE;
    }

    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return error;
    
  }

  uint8_t WritePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
    
    uint32_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
    uint32_t spareDataSize = call Hpl.getPageSpareSize(MODEL(raw));
    uint16_t dummyByte;
    uint32_t rowAddress;
    uint8_t error = 0;

    // Calculate physical address of the page
    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw)) + page;

    // Start write operation
    //ENABLE_CE(raw);
    // Enable CE;
    call NandFlash_CE.clr();

    // Write data area if needed
    if (data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
      WriteColumnAddress(raw, 0);
      WriteRowAddress(raw, rowAddress);
      WriteData(raw, (uint8_t *) data, pageSize);

      //call Draw.drawInt(50, 50, (uint8_t)data[0], 1, COLOR_RED);

      // Spare is written here as well since it is more efficient
      if (spare) {
	WriteData(raw, (uint8_t *) spare, spareDataSize);
      }
      else {
	// Note: special case when ECC parity generation. 
	// ECC results are available as soon as the counter reaches the end of the main area.
	// But when reach PageSize for an example, it could not generate last ECC_PR, The 
	// workaround is to receive PageSize+1 word.
	ReadData(raw, (uint8_t *) (&dummyByte), 2);
      }
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);

      WaitReady();

      if (!IsOperationComplete(raw)) {
	error = NandCommon_ERROR_CANNOTWRITE;
      }
    }

    // Write spare area alone if needed
    if (spare && !data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
      WriteColumnAddress(raw, pageSize);
      WriteRowAddress(raw, rowAddress);
      WriteData(raw, (uint8_t *) spare, spareDataSize);
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);

      WaitReady();
      if (!IsOperationComplete(raw)) {
	error = NandCommon_ERROR_CANNOTWRITE;
      }
    }

    // Disable chip
    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return error;

  }

  uint8_t CopyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){

    uint32_t sourceRow, destRow;
    uint8_t error = 0;
    uint8_t data[NandCommon_MAXPAGEDATASIZE];
    uint8_t spare[NandCommon_MAXPAGESPARESIZE];
    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
    sourceRow = sourceBlock * numPages + sourcePage;
    destRow = destBlock * numPages + destPage;

    if (call Hpl.readPage(raw, sourceBlock, sourcePage, data, spare)) {
      error = NandCommon_ERROR_CANNOTREAD;
    } else if (call Hpl.writePage(raw, destBlock, destPage, data, spare)) {
      error = NandCommon_ERROR_CANNOTWRITE;
    }

    return error;    
  }

  void configureNandFlash(uint8_t busWidth){
    // Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
    // set clock
    // set smc registers
    volatile smc_setup_t *SETUP = (volatile smc_setup_t *) (0x400E0084 + 0x0);
    smc_setup_t setup = *SETUP;
    volatile smc_pulse_t *PULSE = (volatile smc_pulse_t *) (0x400E0084 + 0x4);
    smc_pulse_t pulse = *PULSE;
    volatile smc_cycle_t *CYCLE = (volatile smc_cycle_t *) (0x400E0084 + 0x8);
    smc_cycle_t cycle = *CYCLE;
    volatile smc_timings_t *TIMINGS = (volatile smc_timings_t *) (0x400E0084 + 0xC);
    smc_timings_t timings = *TIMINGS;
    volatile smc_mode_t *MODE = (volatile smc_mode_t *) (0x400E0084 + 0x10);
    smc_mode_t mode = *MODE;

    // start clock for register access
    call HSMC4ClockControl.disable();
    call HSMC4ClockControl.enable();

    setup.bits.nwe_setup = 0;
    setup.bits.ncs_wr_setup = 1;
    setup.bits.nrd_setup = 0;
    setup.bits.ncs_rd_setup = 1;

    *SETUP = setup;

    pulse.bits.nwe_pulse = 2;
    pulse.bits.ncs_wr_pulse = 3;
    pulse.bits.nrd_pulse = 3;
    pulse.bits.ncs_rd_pulse = 4;

    *PULSE = pulse;

    cycle.bits.nwe_cycle = 4;
    cycle.bits.nrd_cycle = 7;

    *CYCLE = cycle;

    timings.bits.tclr = 1;
    timings.bits.tadl = 2;
    timings.bits.tar = 1;
    timings.bits.trr = 1;
    timings.bits.twb = 2;
    timings.bits.rbnsel = 7;
    timings.bits.nfsel = 1;

    *TIMINGS = timings;

    if(busWidth == 8){
      mode.bits.dbw = 0;
      mode.bits.read_mode = 1;
      mode.bits.write_mode = 1;

      *MODE = mode;

    }else if(busWidth == 16){
      mode.bits.dbw = 1;
      mode.bits.read_mode = 1;
      mode.bits.write_mode = 1;

      *MODE = mode;
      
    }
  }

  void configurePsRam(){
    // TODO: Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
    // TODO: Does Atmel code work with this disabled?
  }

  void configureNandPins(){

    // Pin setting

    call NandFlash_CE.makeOutput();
    call NandFlash_RB.makeInput();

    call NandFlash_OE.disablePioControl();
    call NandFlash_WE.disablePioControl();
    call NandFlash_CLE.disablePioControl();
    call NandFlash_ALE.disablePioControl();

    call NandFlash_OE.selectPeripheralA();
    call NandFlash_WE.selectPeripheralA();
    call NandFlash_CLE.selectPeripheralA();
    call NandFlash_ALE.selectPeripheralA();

    call NandFlash_Data00.disablePioControl();
    call NandFlash_Data01.disablePioControl();
    call NandFlash_Data02.disablePioControl();
    call NandFlash_Data03.disablePioControl();
    call NandFlash_Data04.disablePioControl();
    call NandFlash_Data05.disablePioControl();
    call NandFlash_Data06.disablePioControl();
    call NandFlash_Data07.disablePioControl();
    call NandFlash_Data08.disablePioControl();
    call NandFlash_Data09.disablePioControl();
    call NandFlash_Data10.disablePioControl();
    call NandFlash_Data11.disablePioControl();
    call NandFlash_Data12.disablePioControl();
    call NandFlash_Data13.disablePioControl();
    call NandFlash_Data14.disablePioControl();
    call NandFlash_Data15.disablePioControl();

    call NandFlash_Data00.selectPeripheralA();
    call NandFlash_Data01.selectPeripheralA();
    call NandFlash_Data02.selectPeripheralA();
    call NandFlash_Data03.selectPeripheralA();
    call NandFlash_Data04.selectPeripheralA();
    call NandFlash_Data05.selectPeripheralA();
    call NandFlash_Data06.selectPeripheralA();
    call NandFlash_Data07.selectPeripheralA();
    call NandFlash_Data08.selectPeripheralA();
    call NandFlash_Data09.selectPeripheralA();
    call NandFlash_Data10.selectPeripheralA();
    call NandFlash_Data11.selectPeripheralA();
    call NandFlash_Data12.selectPeripheralA();
    call NandFlash_Data13.selectPeripheralA();
    call NandFlash_Data14.selectPeripheralA();
    call NandFlash_Data15.selectPeripheralB(); // PB6
  }

  command uint8_t Hpl.hasSmallBlocks(const struct NandFlashModel *model){
    return (model->pageSizeInBytes <= 512 )? 1: 0;
  }

  //------------------------------------------------------------------------------
  /// Returns the size of the data area of a page in bytes.
  /// \param model  Pointer to a NandFlashModel instance.
  //------------------------------------------------------------------------------
  command uint16_t Hpl.getPageDataSize(const struct NandFlashModel *model){
    return model->pageSizeInBytes;
  }

  //------------------------------------------------------------------------------
  /// Returns the size of the spare area of a page in bytes.
  /// \param model  Pointer to a NandFlashModel instance.
  //------------------------------------------------------------------------------
  command uint8_t Hpl.getPageSpareSize(const struct NandFlashModel *model){
    return (model->pageSizeInBytes>>5); /// Spare size is 16/512 of data size
  }

  command void Hpl.init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr){
    uint32_t chipId;
    uint8_t error;
    uint8_t busWidth = 16;

    //configurePsRam();
    configureNandFlash(busWidth);
    configureNandPins();

    HplNand -> commandAddress = commandAddr;
    HplNand -> addressAddress = addressAddr;
    HplNand -> dataAddress = dataAddr;

    call Hpl.reset();

    if(!model){
      chipId = call Hpl.readId();
      error = call Hpl.findNandModel(nandFlashModelList, NandFlashModelList_SIZE, &(HplNand->model), chipId);
    }else{
      HplNand -> model = *model;
    }

    if(!error){
    } else {
    }

    busWidth = 0;
    busWidth = GetDataBusWidth(MODEL(HplNand));
    configureNandFlash(busWidth);
    
    memSize = call Hpl.getDeviceSizeInBytes(MODEL(HplNand));
    blockSize = call Hpl.getBlockSizeInBytes(MODEL(HplNand));
    numBlocks = call Hpl.getDeviceSizeInBlocks(MODEL(HplNand));
    pageDataSize = call Hpl.getPageDataSize(MODEL(HplNand));
    numPagesPerBlock = call Hpl.getBlockSizeInPages(MODEL(HplNand));    

    call Draw.drawInt(150, 20, busWidth, 1, COLOR_BLACK);
    call Draw.drawInt(150, 40, pageDataSize, 1, COLOR_BLACK);
    call Draw.drawInt(150, 60, memSize, 1, COLOR_BLACK);
    call Draw.drawInt(150, 80, numPagesPerBlock, 1, COLOR_BLACK);

  }

  command uint8_t Hpl.findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId){

    uint8_t i, found = 0;

    //volatile smc_cfg_t *CFG = (volatile smc_cfg_t *) (0x400E0000);
    //smc_cfg_t cfg = *CFG;

    uint8_t id2 = (uint8_t)(chipId>>8);
    uint8_t id4 = (uint8_t)(chipId>>24);

    //call Draw.drawInt(100, 60, chipId, 1, COLOR_YELLOW);
    //call Draw.drawInt(100, 80, id2, 1, COLOR_YELLOW);
    
    for(i=0; iblockSizeInKBytes == 0 || model->pageSizeInBytes == 0) {
	    //TRACE_DEBUG("Fetch from ID4(0x%.2x):\r\n", id4);
	    /// Fetch from the extended ID4
	    /// ID4 D5  D4 BlockSize || D1  D0  PageSize
	    ///     0   0   64K      || 0   0   1K
	    ///     0   1   128K     || 0   1   2K
	    ///     1   0   256K     || 1   0   4K
	    ///     1   1   512K     || 1   1   8k
	    switch(id4 & 0x03) {
	    case 0x00: model->pageSizeInBytes = 1024; break;
	    case 0x01: model->pageSizeInBytes = 2048; break;
	    case 0x02: model->pageSizeInBytes = 4096; break;
	    case 0x03: model->pageSizeInBytes = 8192; break;
	    }
	    switch(id4 & 0x30) {
	    case 0x00: model->blockSizeInKBytes = 64;  break;
	    case 0x10: model->blockSizeInKBytes = 128; break;
	    case 0x20: model->blockSizeInKBytes = 256; break;
	    case 0x30: model->blockSizeInKBytes = 512; break;
	    }
	  }

	  /*
	  switch(model->pageSizeInBytes) {
	  case 1024: pageSize = AT91C_HSMC4_PAGESIZE_1056_Bytes; break;
	  case 2048: pageSize = AT91C_HSMC4_PAGESIZE_2112_Bytes; break;
	  case 4096: pageSize = AT91C_HSMC4_PAGESIZE_4224_Bytes; break;
	  default: ;//TRACE_ERROR("Unsupportted page size for NAND Flash Controller\n\r");
	  }
	  // This part sets the SMC registers? this is it?

	  cfg.bits.pagesize = pageSize;
	  cfg.bits.dtomul = 7;
	  cfg.bits.edgectrl = 1;
	  cfg.bits.dtocyc = 0xF;
	  cfg.bits.rspare = 1;

	  *CFG = cfg;
	  //HSMC4_SetMode(pageSize | AT91C_HSMC4_DTOMUL_1048576 | AT91C_HSMC4_EDGECTRL | AT91C_HSMC4_DTOCYC | AT91C_HSMC4_RSPARE); // ?????????????
	  */
	}
	break;
      }
    }

    // Check if chip has been detected
    if (found) {
      return 0;
    }
    else {
      return NandCommon_ERROR_UNKNOWNMODEL;
    }
  }

  command void Hpl.reset(){
    /*
      1. Enable CE
      2. Write reset command
      3. wait for ready
      4. Disable CE
     */

    // Enable CE
    call NandFlash_CE.clr();

    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
    //WRTIE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
    WaitReady();
    // Disable CE

    call NandFlash_CE.set();
  }

  command uint32_t Hpl.readId(){
    uint32_t chipId;

    // enable CE 
    call NandFlash_CE.clr();

    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
    //WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
    WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, 0);

    chipId  = READ_DATA8(BOARD_NF_DATA_ADDR);
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 8;
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 16;
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 24;

    // Disable CE 
    call NandFlash_CE.set();

    return chipId;
  }

  command uint16_t Hpl.getDeviceSizeInBlocks(const struct NandFlashModel * model){
    return ((1024) / model->blockSizeInKBytes) * model->deviceSizeInMegaBytes;
  }

  command uint32_t Hpl.getDeviceSizeInPages(const struct NandFlashModel *model){
    return (uint32_t) call Hpl.getDeviceSizeInBlocks(model) * call Hpl.getBlockSizeInPages(model);
  }

  command uint8_t Hpl.eraseBlock(const struct RawNandFlash *raw, uint16_t block){

    uint8_t numTries = NUMERASETRIES;

    while (numTries > 0) {

        if (!EraseBlock(raw, block)) {

            return 0;
        }
        numTries--;
    }

    return NandCommon_ERROR_BADBLOCK;

  }

  command uint16_t Hpl.getBlockSizeInPages(const struct NandFlashModel *model){
    return model->blockSizeInKBytes * 1024 / model->pageSizeInBytes;
  }

  command uint8_t Hpl.readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){

    uint32_t colAddress;
    uint32_t rowAddress;
    uint8_t hasSmallBlocks;
    uint32_t pageSpareSize;

    hasSmallBlocks = call Hpl.hasSmallBlocks(MODEL(raw));
    pageSpareSize = call Hpl.getPageSpareSize(MODEL(raw));

    // Calculate actual address of the page
    rowAddress = (uint32_t) block * numPagesPerBlock /*call Hpl.getBlockSizeInPages(MODEL(raw))*/ + page;

    // Start operation
    //ENABLE_CE(raw);
    // Enable CE
    call NandFlash_CE.clr();

    if (data) {
      colAddress = 0;
    } else {
      // to read spare area in sequential access
      colAddress = pageDataSize;
    }

    // Use either small blocks or large blocks data area read
    if (hasSmallBlocks) {
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_A);
      WriteColumnAddress(raw, colAddress);
      WriteRowAddress(raw, rowAddress);
    } else {
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
      WriteColumnAddress(raw, colAddress);
      WriteRowAddress(raw, rowAddress);
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_2);
    }

    // Wait for the nand to be ready
    WaitReady();

    //pageDataSize = call Hpl.getPageDataSize(MODEL(raw));
    call Draw.drawInt(200, 220, colAddress, 1, COLOR_BLUE);
    call Draw.drawInt(100, 220, pageDataSize, 1, COLOR_BLUE);
    call Draw.drawInt(rowAddress*15, 200, rowAddress, 1, COLOR_BLUE);

    // Read data area if needed
    if (data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);

      if(pageDataSize != 2048){
	call Draw.drawInt(200, 240, page, 1, COLOR_GREEN);
      }

      ReadData(raw, (uint8_t *) data, pageDataSize);

      if (spare) {
	//call Leds.led2Toggle();
	ReadData(raw, (uint8_t *) spare, pageSpareSize);
      }
    }
    else {
      // Read spare area only
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
      ReadData(raw, (uint8_t *) spare, pageSpareSize);
    }


    // Disable CE
    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return 0;
  }

  //------------------------------------------------------------------------------
  /// Reads the bad block marker inside a spare area buffer using the provided
  /// scheme.
  /// \param scheme  Pointer to a NandSpareScheme instance.
  /// \param spare  Spare area buffer.
  /// \param marker  Pointer to the variable to store the bad block marker.
  //------------------------------------------------------------------------------
  command void Hpl.readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker){
    *marker = spare[scheme->badBlockMarkerPosition];
  }

  //------------------------------------------------------------------------------
  /// Modifies the bad block marker inside a spare area, using the given scheme.
  /// \param scheme  Pointer to a NandSpareScheme instance.
  /// \param spare  Spare area buffer.
  /// \param marker  Bad block marker to write.
  //------------------------------------------------------------------------------
  command void Hpl.writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker){
    spare[scheme->badBlockMarkerPosition] = marker;
  }

  command uint32_t Hpl.getDeviceSizeInBytes(const struct NandFlashModel *model){
    return ((uint32_t) model->deviceSizeInMegaBytes) << 20;
  }

  command uint32_t Hpl.getBlockSizeInBytes(const struct NandFlashModel *model){
    return (model->blockSizeInKBytes *1024);
  }

  command uint8_t Hpl.writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
    uint8_t numTries = NUMWRITETRIES;
    while (numTries > 0) {
      if (!WritePage(raw, block, page, data, spare)) {
	return 0;
      }
      numTries--;
    }
    return NandCommon_ERROR_BADBLOCK;
  }

  command uint8_t Hpl.copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
    uint8_t numTries = NUMCOPYTRIES;
    while (numTries) {
      if (!CopyPage(raw, sourceBlock, sourcePage, destBlock, destPage)) {
	return 0;
      }
      numTries--;
    }
    return NandCommon_ERROR_BADBLOCK;
  }

  command uint8_t Hpl.copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock){
    uint32_t i;
    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
    // Copy all pages
    for (i=0; i < numPages; i++) {
      if (call Hpl.copyPage(raw, sourceBlock, i, destBlock, i)) {
	return NandCommon_ERROR_BADBLOCK;
      }
    }
    return 0;
  }

  uint16_t totalReadFromBlock = 0;
  uint16_t readBlock = 0;
  void* readData;
  const struct RawNandFlash saveRaw;

  void readBlockTask(){

    uint8_t error;

    call Draw.fill(COLOR_WHITE);

    error = call Hpl.readPage(&saveRaw, readBlock, totalReadFromBlock, readData, 0);//ECC(skipBlock), block, i, data, 0);
    totalReadFromBlock ++;

    if (error) {
      //call Leds.led0Toggle();
      return;
    }else if(totalReadFromBlock < numPagesPerBlock){
      //call Draw.drawInt(totalReadFromBlock*15, 170, totalReadFromBlock, 1, COLOR_BLUE);
      //call Draw.drawInt(200, 185, numPagesPerBlock, 1, COLOR_BLUE);
      readData = (void *) ((uint8_t *) readData + pageDataSize);
      readBlockTask();
      //call ReadBlockTimer.startOneShot(5);
    }else{
      call Leds.led2Toggle();
    }
    
  }

  command uint8_t Hpl.readBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
    //uint16_t i, error;

    totalReadFromBlock = 0;

    memcpy((void*)&saveRaw, (void*)raw, sizeof(struct RawNandFlash));

    readBlock = block;
    readData = data;

    readBlockTask();

    return 0;
  }

  command uint8_t Hpl.writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
    uint8_t error, i;

    for(i=0; i

interface HplNandFlash{
  //command void writeColumnAddress();
  //command void writeRowAddress();
  //command void isOperationComplete();
  //command void writeData();
  //command void readData();

  //command void eraseBlock_i(); // internal functions 
  //command void writePage_i(); // internal functions
  //command void copyPage_i(); // internal functions

  command void init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr);
  command uint8_t findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId);
  command void reset();
  command uint32_t readId();
  command uint8_t eraseBlock(const struct RawNandFlash *raw, uint16_t block);
  command uint8_t readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare);
  command uint8_t writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare);
  command uint8_t copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage);
  command uint8_t copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock);



  command uint16_t getPageDataSize(const struct NandFlashModel *model);
  command uint32_t getDeviceSizeInPages(const struct NandFlashModel *model);
  command uint16_t getBlockSizeInPages(const struct NandFlashModel *model);
  command uint8_t getPageSpareSize(const struct NandFlashModel *model);
  command uint8_t hasSmallBlocks(const struct NandFlashModel *model);
  command uint16_t getDeviceSizeInBlocks(const struct NandFlashModel * model);
  command void readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker);
  command void writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker);
  command uint32_t getDeviceSizeInBytes(const struct NandFlashModel *model);
  command uint32_t getBlockSizeInBytes(const struct NandFlashModel *model);
  command uint8_t readBlock(const struct RawNandFlash *raw, uint16_t block, void *data);
  command uint8_t writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data);
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlashC.nc000066400000000000000000000061341207233610700263030ustar00rootroot00000000000000/*
 * Copyright (c) 2010 Johns Hopkins University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

configuration HplNandFlashC{
  provides interface HplNandFlash;

}
implementation{
  components HplNandFlashP;
  HplNandFlash = HplNandFlashP;

  components HplSam3uClockC;
  HplNandFlashP.HSMC4ClockControl -> HplSam3uClockC.HSMC4PPCntl;

  components HplSam3uGeneralIOC as IO;
  HplNandFlashP.NandFlash_CE -> IO.PioA16;
  HplNandFlashP.TempPin -> IO.PioC12;
  HplNandFlashP.NandFlash_RB -> IO.PioB24;

  HplNandFlashP.NandFlash_OE -> IO.HplPioB17;
  HplNandFlashP.NandFlash_WE -> IO.HplPioB18;
  HplNandFlashP.NandFlash_CLE -> IO.HplPioB22;
  HplNandFlashP.NandFlash_ALE -> IO.HplPioB21;
  
  HplNandFlashP.NandFlash_Data00 -> IO.HplPioB9;
  HplNandFlashP.NandFlash_Data01 -> IO.HplPioB10;
  HplNandFlashP.NandFlash_Data02 -> IO.HplPioB11;
  HplNandFlashP.NandFlash_Data03 -> IO.HplPioB12;
  HplNandFlashP.NandFlash_Data04 -> IO.HplPioB13;
  HplNandFlashP.NandFlash_Data05 -> IO.HplPioB14;
  HplNandFlashP.NandFlash_Data06 -> IO.HplPioB15;
  HplNandFlashP.NandFlash_Data07 -> IO.HplPioB16;

  HplNandFlashP.NandFlash_Data08 -> IO.HplPioB25;
  HplNandFlashP.NandFlash_Data09 -> IO.HplPioB26;
  HplNandFlashP.NandFlash_Data10 -> IO.HplPioB27;
  HplNandFlashP.NandFlash_Data11 -> IO.HplPioB28;
  HplNandFlashP.NandFlash_Data12 -> IO.HplPioB29;
  HplNandFlashP.NandFlash_Data13 -> IO.HplPioB30;
  HplNandFlashP.NandFlash_Data14 -> IO.HplPioB31;
  HplNandFlashP.NandFlash_Data15 -> IO.HplPioB6;

  components LedsC, LcdC;
  HplNandFlashP.Leds -> LedsC;
  HplNandFlashP.Draw -> LcdC;

  components new TimerMilliC() as TimerC;
  HplNandFlashP.ReadBlockTimer -> TimerC;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlashP.nc000066400000000000000000001075701207233610700263260ustar00rootroot00000000000000/*
 * Copyright (c) 2009 University of Utah
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include "HplNandFlash.h"

module HplNandFlashP{
  provides interface HplNandFlash as Hpl;

  uses interface HplSam3uPeripheralClockCntl as HSMC4ClockControl;

  uses interface GeneralIO as NandFlash_CE;
  uses interface GeneralIO as TempPin;
  uses interface GeneralIO as NandFlash_RB;

  uses interface HplSam3uGeneralIOPin as NandFlash_OE;
  uses interface HplSam3uGeneralIOPin as NandFlash_WE;
  uses interface HplSam3uGeneralIOPin as NandFlash_CLE;
  uses interface HplSam3uGeneralIOPin as NandFlash_ALE;

  uses interface HplSam3uGeneralIOPin as NandFlash_Data00;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data01;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data02;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data03;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data04;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data05;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data06;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data07;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data08;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data09;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data10;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data11;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data12;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data13;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data14;
  uses interface HplSam3uGeneralIOPin as NandFlash_Data15;

  uses interface Leds;
  uses interface Draw;

  uses interface Timer as ReadBlockTimer;

}
implementation {

/// Nand flash commands
#define COMMAND_READ_1                  0x00
#define COMMAND_READ_2                  0x30
#define COMMAND_COPYBACK_READ_1         0x00
#define COMMAND_COPYBACK_READ_2         0x35
#define COMMAND_COPYBACK_PROGRAM_1      0x85
#define COMMAND_COPYBACK_PROGRAM_2      0x10
#define COMMAND_RANDOM_OUT              0x05
#define COMMAND_RANDOM_OUT_2            0xE0
#define COMMAND_RANDOM_IN               0x85
#define COMMAND_READID                  0x90
#define COMMAND_WRITE_1                 0x80
#define COMMAND_WRITE_2                 0x10
#define COMMAND_ERASE_1                 0x60
#define COMMAND_ERASE_2                 0xD0
#define COMMAND_STATUS                  0x70
#define COMMAND_RESET                   0xFF

#define COMMAND_READ_A                  0x00
#define COMMAND_READ_C                  0x50

#define STATUS_READY                    (1 << 6)
#define STATUS_ERROR                    (1 << 0)


#define WRITE_COMMAND(commandAddress, u_command) \
    {*((volatile uint8_t *) commandAddress) = (uint8_t) u_command;}
#define WRITE_COMMAND16(commandAddress, u_command) \
    {*((volatile uint16_t *) commandAddress) = (uint16_t) u_command;}
#define WRITE_ADDRESS(addressAddress, address) \
    {*((volatile uint8_t *) addressAddress) = (uint8_t) address;}
#define WRITE_ADDRESS16(addressAddress, address) \
    {*((volatile uint16_t *) addressAddress) = (uint16_t) address;}
#define WRITE_DATA8(dataAddress, data) \
    {*((volatile uint8_t *) dataAddress) = (uint8_t) data;}
#define READ_DATA8(dataAddress) \
    (*((volatile uint8_t *) dataAddress))
#define WRITE_DATA16(dataAddress, data) \
    {*((volatile uint16_t *) dataAddress) = (uint16_t) data;}
#define READ_DATA16(dataAddress) \
    (*((volatile uint16_t *) dataAddress))

/// Number of tries for erasing a block
#define NUMERASETRIES           2
/// Number of tries for writing a block
#define NUMWRITETRIES           2
/// Number of tries for copying a block
#define NUMCOPYTRIES            2

/// Number of NandFlash models inside the list.
#define NandFlashModelList_SIZE         58

#define MODEL(raw)  ((struct NandFlashModel *) raw)

  //------------------------------------------------------------------------------
  //         Exported variables
  //------------------------------------------------------------------------------
  
  //extern const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE];

  /// Spare area placement scheme for 256 byte pages.
  const struct NandSpareScheme nandSpareScheme256 = {

    // Bad block marker is at position #5
    5,
    // 3 ecc bytes
    3,
    // Ecc bytes positions
    {0, 1, 2},
    // 4 extra bytes
    4,
    // Extra bytes positions
    {3, 4, 6, 7}
  };

  /// Spare area placement scheme for 512 byte pages.
  const struct NandSpareScheme nandSpareScheme512 = {

    // Bad block marker is at position #5
    5,
    // 6 ecc bytes
    6,
    // Ecc bytes positions
    {0, 1, 2, 3, 6, 7},
    // 8 extra bytes
    8,
    // Extra bytes positions
    {8, 9, 10, 11, 12, 13, 14, 15}
  };

  /// Spare area placement scheme for 2048 byte pages.
  const struct NandSpareScheme nandSpareScheme2048 = {

    // Bad block marker is at position #0
    0,
    // 24 ecc bytes
    24, 
    // Ecc bytes positions
    {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
     59, 60, 61, 62, 63},
    // 38 extra bytes
    38,
    // Extra bytes positions
    {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
     22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39}
  };

  /// List of NandFlash models which can be recognized by the software.
  const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE] = {

    // |  ID    | Options                 | Page    | Mo  | Block   |BlkPg   |DevBlk
    {0x6e,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0x64,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
    {0x6b,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe8,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0xec,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0xea,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
    {0xd5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe3,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xd6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},

    {0x39,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
    {0xe6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
    {0x49,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
    {0x59,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},

    {0x33,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
    {0x73,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
    {0x43,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
    {0x53,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
                                                             
    {0x35,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
    {0x75,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
    {0x45,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
    {0x55,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
                                                             
    {0x36,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
    {0x76,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
    {0x46,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
    {0x56,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
                                                             
    {0x78,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x39,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x79,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x72,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x49,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x74,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x59,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
                                                             
    {0x71,   NandFlashModel_DATABUS8,    512,    256,   16,    &nandSpareScheme512},
	
    // Large blocks devices. Parameters must be fetched from the extended I
#define OPTIONS     NandFlashModel_COPYBACK                   
                                                                                          
    {0xA2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xF2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xB2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xC2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    
    {0xA1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
    {0xF1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
    {0xB1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
    {0xC1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
                                                                  
    {0xAA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
    {0xDA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,   &nandSpareScheme2048},                                              
    {0xBA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
    {0xCA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
	                                                                
    {0xAC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
    {0xDC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
    {0xBC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
    {0xCC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
                                                                  
    {0xA3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
    {0xD3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
    {0xB3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
    {0xC3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
                                                                  
    {0xA5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
    {0xD5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
    {0xB5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
    {0xC5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
  };

  uint16_t numBlocks;
  uint32_t memSize;
  uint32_t blockSize;
  uint16_t numPagesPerBlock;
  uint16_t pageDataSize;

  void WaitReady(){
    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
    while ((READ_DATA8(BOARD_NF_DATA_ADDR) & STATUS_READY) != STATUS_READY);
  }

  uint8_t GetDataBusWidth(const struct NandFlashModel *model){
    return (model->options&NandFlashModel_DATABUS16)? 16: 8;
  }

  void WriteColumnAddress(const struct RawNandFlash *raw, uint16_t columnAddress){
    
    uint16_t pageSize = call Hpl.getPageDataSize(MODEL(raw));

    call Draw.drawInt(200, 250, pageSize, 1, COLOR_BLACK);

    /* Check the data bus width of the NandFlash */
    if (GetDataBusWidth(MODEL(raw)) == 16) {
      /* Div 2 is because we address in word and not in byte */
      columnAddress >>= 1;
    }
    while (pageSize > 0) {
      if (GetDataBusWidth(MODEL(raw)) == 16) {
	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
      } else {
	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
      }
      pageSize >>= 8;
      columnAddress >>= 8;
    }
  }

  //------------------------------------------------------------------------------
  /// Sends the row address to the NandFlash chip.
  /// \param raw  Pointer to a RawNandFlash instance.
  /// \param rowAddress  Row address to send.
  //------------------------------------------------------------------------------
  void WriteRowAddress(const struct RawNandFlash *raw, uint32_t rowAddress){

    uint32_t numPages = call Hpl.getDeviceSizeInPages(MODEL(raw));

    while (numPages > 0) {
      if (GetDataBusWidth(MODEL(raw)) == 16) {
	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
      } else {
	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
      }
      numPages >>= 8;
      rowAddress >>= 8;
    }
  }

  void WriteData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
    uint32_t i;
    // Check the data bus width of the NandFlash
    if (GetDataBusWidth(MODEL(raw)) == 16) {
      uint16_t *buffer16 = (uint16_t *) buffer;
      size >>= 1;
      for(i=0; i < size; i++) {
	call Draw.drawInt(15,50, buffer16[i], 1, COLOR_RED);
	WRITE_DATA16(BOARD_NF_DATA_ADDR, buffer16[i]);
      }
    } else {
      for(i=0; i < size; i++) {
	WRITE_DATA8(BOARD_NF_DATA_ADDR, buffer[i]);
      }
    }
  }

  uint8_t count = 0;

  void ReadData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
    uint32_t i;
    // Check the chip data bus width

    count ++;

    if (GetDataBusWidth(MODEL(raw)) == 16) {
      uint16_t *buffer16 = (uint16_t *) buffer;

      size >>= 1;

      call Draw.drawInt(200,130, size, 1, COLOR_YELLOW);

      for (i=0 ; i < size ; i++) {
	buffer16[i] = READ_DATA16(BOARD_NF_DATA_ADDR);
	call Draw.drawInt(150,50, buffer16[i] /*READ_DATA16(BOARD_NF_DATA_ADDR)*/, 1, COLOR_BLACK);
      }

      //call Draw.drawInt(100,150, buffer16[0], 1, COLOR_BLACK);
      call Draw.drawInt(200,150, buffer16[3], 1, COLOR_BLACK);
      //call Draw.drawInt(200,150, (uint32_t)buffer16, 1, COLOR_BLACK);

    } else {
      for (i=0; i < size; i++) {
	buffer[i] = READ_DATA8(BOARD_NF_DATA_ADDR);
      }
    }

    call Draw.drawInt(count*15,130, count, 1, COLOR_GREEN);

  }

  uint8_t IsOperationComplete(const struct RawNandFlash *raw){
    uint8_t status;

    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);

    status = READ_DATA8(BOARD_NF_DATA_ADDR);

    if (((status & STATUS_READY) != STATUS_READY) || ((status & STATUS_ERROR) != 0)) {
        return 0;
    }
    return 1;
  }

  uint8_t EraseBlock( const struct RawNandFlash *raw, unsigned short block){
    uint8_t error = 0;
    uint32_t rowAddress;

    // Calculate address used for erase
    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw));

    // Start erase
    //ENABLE_CE(raw);
    // Enable CE
    call NandFlash_CE.clr();

    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_1);
    WriteRowAddress(raw, rowAddress);
    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_2);

    WaitReady();

    if (!IsOperationComplete(raw)) {
      error = NandCommon_ERROR_CANNOTERASE;
    }

    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return error;
    
  }

  uint8_t WritePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
    
    uint32_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
    uint32_t spareDataSize = call Hpl.getPageSpareSize(MODEL(raw));
    uint16_t dummyByte;
    uint32_t rowAddress;
    uint8_t error = 0;

    //uint8_t* temp = (uint8_t*)data;

    // Calculate physical address of the page
    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw)) + page;

    // Start write operation
    //ENABLE_CE(raw);
    // Enable CE;
    call NandFlash_CE.clr();

    // Write data area if needed
    if (data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
      WriteColumnAddress(raw, 0);
      WriteRowAddress(raw, rowAddress);
      WriteData(raw, (uint8_t *) data, pageSize);

      //call Draw.drawInt(50, 50, (uint8_t)temp[0], 1, COLOR_RED);

      // Spare is written here as well since it is more efficient
      if (spare) {
	WriteData(raw, (uint8_t *) spare, spareDataSize);
      }
      else {
	// Note: special case when ECC parity generation. 
	// ECC results are available as soon as the counter reaches the end of the main area.
	// But when reach PageSize for an example, it could not generate last ECC_PR, The 
	// workaround is to receive PageSize+1 word.
	ReadData(raw, (uint8_t *) (&dummyByte), 2);
      }
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);

      WaitReady();

      if (!IsOperationComplete(raw)) {
	error = NandCommon_ERROR_CANNOTWRITE;
      }
    }

    // Write spare area alone if needed
    if (spare && !data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
      WriteColumnAddress(raw, pageSize);
      WriteRowAddress(raw, rowAddress);
      WriteData(raw, (uint8_t *) spare, spareDataSize);
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);

      WaitReady();
      if (!IsOperationComplete(raw)) {
	error = NandCommon_ERROR_CANNOTWRITE;
      }
    }

    // Disable chip
    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return error;

  }

  uint8_t CopyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){

    uint32_t sourceRow, destRow;
    uint8_t error = 0;
    uint8_t data[NandCommon_MAXPAGEDATASIZE];
    uint8_t spare[NandCommon_MAXPAGESPARESIZE];
    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
    sourceRow = sourceBlock * numPages + sourcePage;
    destRow = destBlock * numPages + destPage;

    if (call Hpl.readPage(raw, sourceBlock, sourcePage, data, spare)) {
      error = NandCommon_ERROR_CANNOTREAD;
    } else if (call Hpl.writePage(raw, destBlock, destPage, data, spare)) {
      error = NandCommon_ERROR_CANNOTWRITE;
    }

    return error;    
  }

  void configureNandFlash(uint8_t busWidth){
    // Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
    // set clock
    // set smc registers
    volatile smc_setup_t *SETUP = (volatile smc_setup_t *) (0x400E0084 + 0x0);
    smc_setup_t setup = *SETUP;
    volatile smc_pulse_t *PULSE = (volatile smc_pulse_t *) (0x400E0084 + 0x4);
    smc_pulse_t pulse = *PULSE;
    volatile smc_cycle_t *CYCLE = (volatile smc_cycle_t *) (0x400E0084 + 0x8);
    smc_cycle_t cycle = *CYCLE;
    volatile smc_timings_t *TIMINGS = (volatile smc_timings_t *) (0x400E0084 + 0xC);
    smc_timings_t timings = *TIMINGS;
    volatile smc_mode_t *MODE = (volatile smc_mode_t *) (0x400E0084 + 0x10);
    smc_mode_t mode = *MODE;

    // start clock for register access
    call HSMC4ClockControl.disable();
    call HSMC4ClockControl.enable();

    setup.bits.nwe_setup = 0;
    setup.bits.ncs_wr_setup = 1;
    setup.bits.nrd_setup = 0;
    setup.bits.ncs_rd_setup = 1;

    *SETUP = setup;

    pulse.bits.nwe_pulse = 2;
    pulse.bits.ncs_wr_pulse = 3;
    pulse.bits.nrd_pulse = 3;
    pulse.bits.ncs_rd_pulse = 4;

    *PULSE = pulse;

    cycle.bits.nwe_cycle = 4;
    cycle.bits.nrd_cycle = 7;

    *CYCLE = cycle;

    timings.bits.tclr = 1;
    timings.bits.tadl = 2;
    timings.bits.tar = 1;
    timings.bits.trr = 1;
    timings.bits.twb = 2;
    timings.bits.rbnsel = 7;
    timings.bits.nfsel = 1;

    *TIMINGS = timings;

    if(busWidth == 8){
      mode.bits.dbw = 0;
      mode.bits.read_mode = 1;
      mode.bits.write_mode = 1;

      *MODE = mode;

    }else if(busWidth == 16){
      mode.bits.dbw = 1;
      mode.bits.read_mode = 1;
      mode.bits.write_mode = 1;

      *MODE = mode;
      
    }
  }

  void configurePsRam(){
    // TODO: Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
    // TODO: Does Atmel code work with this disabled?
  }

  void configureNandPins(){

    // Pin setting

    call NandFlash_CE.makeOutput();
    call TempPin.makeInput();
    call NandFlash_RB.makeInput();

    call NandFlash_OE.disablePioControl();
    call NandFlash_WE.disablePioControl();
    call NandFlash_CLE.disablePioControl();
    call NandFlash_ALE.disablePioControl();

    call NandFlash_OE.selectPeripheralA();
    call NandFlash_WE.selectPeripheralA();
    call NandFlash_CLE.selectPeripheralA();
    call NandFlash_ALE.selectPeripheralA();

    call NandFlash_Data00.disablePioControl();
    call NandFlash_Data01.disablePioControl();
    call NandFlash_Data02.disablePioControl();
    call NandFlash_Data03.disablePioControl();
    call NandFlash_Data04.disablePioControl();
    call NandFlash_Data05.disablePioControl();
    call NandFlash_Data06.disablePioControl();
    call NandFlash_Data07.disablePioControl();
    call NandFlash_Data08.disablePioControl();
    call NandFlash_Data09.disablePioControl();
    call NandFlash_Data10.disablePioControl();
    call NandFlash_Data11.disablePioControl();
    call NandFlash_Data12.disablePioControl();
    call NandFlash_Data13.disablePioControl();
    call NandFlash_Data14.disablePioControl();
    call NandFlash_Data15.disablePioControl();

    call NandFlash_Data00.selectPeripheralA();
    call NandFlash_Data01.selectPeripheralA();
    call NandFlash_Data02.selectPeripheralA();
    call NandFlash_Data03.selectPeripheralA();
    call NandFlash_Data04.selectPeripheralA();
    call NandFlash_Data05.selectPeripheralA();
    call NandFlash_Data06.selectPeripheralA();
    call NandFlash_Data07.selectPeripheralA();
    call NandFlash_Data08.selectPeripheralA();
    call NandFlash_Data09.selectPeripheralA();
    call NandFlash_Data10.selectPeripheralA();
    call NandFlash_Data11.selectPeripheralA();
    call NandFlash_Data12.selectPeripheralA();
    call NandFlash_Data13.selectPeripheralA();
    call NandFlash_Data14.selectPeripheralA();
    call NandFlash_Data15.selectPeripheralB(); // PB6
  }

  command uint8_t Hpl.hasSmallBlocks(const struct NandFlashModel *model){
    return (model->pageSizeInBytes <= 512 )? 1: 0;
  }

  //------------------------------------------------------------------------------
  /// Returns the size of the data area of a page in bytes.
  /// \param model  Pointer to a NandFlashModel instance.
  //------------------------------------------------------------------------------
  command uint16_t Hpl.getPageDataSize(const struct NandFlashModel *model){
    return model->pageSizeInBytes;
  }

  //------------------------------------------------------------------------------
  /// Returns the size of the spare area of a page in bytes.
  /// \param model  Pointer to a NandFlashModel instance.
  //------------------------------------------------------------------------------
  command uint8_t Hpl.getPageSpareSize(const struct NandFlashModel *model){
    return (model->pageSizeInBytes>>5); /// Spare size is 16/512 of data size
  }

  command void Hpl.init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr){
    uint32_t chipId;
    uint8_t error;
    uint8_t busWidth = 16;

    configureNandFlash(busWidth);
    configureNandPins();

    HplNand -> commandAddress = commandAddr;
    HplNand -> addressAddress = addressAddr;
    HplNand -> dataAddress = dataAddr;

    call Hpl.reset();

    if(!model){
      chipId = call Hpl.readId();
      error = call Hpl.findNandModel(nandFlashModelList, NandFlashModelList_SIZE, &(HplNand->model), chipId);
    }else{
      HplNand -> model = *model;
    }

    if(!error){
    } else {
    }

    busWidth = 0;
    busWidth = GetDataBusWidth(MODEL(HplNand));
    configureNandFlash(busWidth);

    memSize = call Hpl.getDeviceSizeInBytes(MODEL(HplNand));
    blockSize = call Hpl.getBlockSizeInBytes(MODEL(HplNand));
    numBlocks = call Hpl.getDeviceSizeInBlocks(MODEL(HplNand));
    pageDataSize = call Hpl.getPageDataSize(MODEL(HplNand));
    numPagesPerBlock = call Hpl.getBlockSizeInPages(MODEL(HplNand));    

    call Draw.drawInt(150, 20, busWidth, 1, COLOR_BLACK);
    call Draw.drawInt(150, 40, pageDataSize, 1, COLOR_BLACK);
    call Draw.drawInt(150, 60, memSize, 1, COLOR_BLACK);
    call Draw.drawInt(150, 80, numPagesPerBlock, 1, COLOR_BLACK);

  }

  command uint8_t Hpl.findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId){

    uint8_t i, found = 0;

    //volatile smc_cfg_t *CFG = (volatile smc_cfg_t *) (0x400E0000);
    //smc_cfg_t cfg = *CFG;

    uint8_t id2 = (uint8_t)(chipId>>8);
    uint8_t id4 = (uint8_t)(chipId>>24);

    //call Draw.drawInt(100, 60, chipId, 1, COLOR_YELLOW);
    //call Draw.drawInt(100, 80, id2, 1, COLOR_YELLOW);
    
    for(i=0; iblockSizeInKBytes == 0 || model->pageSizeInBytes == 0) {
	    //TRACE_DEBUG("Fetch from ID4(0x%.2x):\r\n", id4);
	    /// Fetch from the extended ID4
	    /// ID4 D5  D4 BlockSize || D1  D0  PageSize
	    ///     0   0   64K      || 0   0   1K
	    ///     0   1   128K     || 0   1   2K
	    ///     1   0   256K     || 1   0   4K
	    ///     1   1   512K     || 1   1   8k
	    switch(id4 & 0x03) {
	    case 0x00: model->pageSizeInBytes = 1024; break;
	    case 0x01: model->pageSizeInBytes = 2048; break;
	    case 0x02: model->pageSizeInBytes = 4096; break;
	    case 0x03: model->pageSizeInBytes = 8192; break;
	    }
	    switch(id4 & 0x30) {
	    case 0x00: model->blockSizeInKBytes = 64;  break;
	    case 0x10: model->blockSizeInKBytes = 128; break;
	    case 0x20: model->blockSizeInKBytes = 256; break;
	    case 0x30: model->blockSizeInKBytes = 512; break;
	    }
	  }

	  /*
	  switch(model->pageSizeInBytes) {
	  case 1024: pageSize = AT91C_HSMC4_PAGESIZE_1056_Bytes; break;
	  case 2048: pageSize = AT91C_HSMC4_PAGESIZE_2112_Bytes; break;
	  case 4096: pageSize = AT91C_HSMC4_PAGESIZE_4224_Bytes; break;
	  default: ;//TRACE_ERROR("Unsupportted page size for NAND Flash Controller\n\r");
	  }
	  // This part sets the SMC registers? this is it?

	  cfg.bits.pagesize = pageSize;
	  cfg.bits.dtomul = 7;
	  cfg.bits.edgectrl = 1;
	  cfg.bits.dtocyc = 0xF;
	  cfg.bits.rspare = 1;

	  *CFG = cfg;
	  //HSMC4_SetMode(pageSize | AT91C_HSMC4_DTOMUL_1048576 | AT91C_HSMC4_EDGECTRL | AT91C_HSMC4_DTOCYC | AT91C_HSMC4_RSPARE); // ?????????????
	  */
	}
	break;
      }
    }

    // Check if chip has been detected
    if (found) {
      return 0;
    }
    else {
      return NandCommon_ERROR_UNKNOWNMODEL;
    }
  }

  command void Hpl.reset(){
    /*
      1. Enable CE
      2. Write reset command
      3. wait for ready
      4. Disable CE
     */

    // Enable CE
    call NandFlash_CE.clr();

    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
    //WRTIE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
    WaitReady();
    // Disable CE

    call NandFlash_CE.set();
  }

  command uint32_t Hpl.readId(){
    uint32_t chipId;

    // enable CE 
    call NandFlash_CE.clr();

    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
    //WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
    WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, 0);

    chipId  = READ_DATA8(BOARD_NF_DATA_ADDR);
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 8;
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 16;
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 24;

    // Disable CE 
    call NandFlash_CE.set();

    return chipId;
  }

  command uint16_t Hpl.getDeviceSizeInBlocks(const struct NandFlashModel * model){
    return ((1024) / model->blockSizeInKBytes) * model->deviceSizeInMegaBytes;
  }

  command uint32_t Hpl.getDeviceSizeInPages(const struct NandFlashModel *model){
    return (uint32_t) call Hpl.getDeviceSizeInBlocks(model) * call Hpl.getBlockSizeInPages(model);
  }

  command uint8_t Hpl.eraseBlock(const struct RawNandFlash *raw, uint16_t block){

    uint8_t numTries = NUMERASETRIES;

    while (numTries > 0) {

        if (!EraseBlock(raw, block)) {

            return 0;
        }
        numTries--;
    }

    return NandCommon_ERROR_BADBLOCK;

  }

  command uint16_t Hpl.getBlockSizeInPages(const struct NandFlashModel *model){
    return model->blockSizeInKBytes * 1024 / model->pageSizeInBytes;
  }

  command uint8_t Hpl.readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){

    uint32_t colAddress;
    uint32_t rowAddress;
    uint8_t hasSmallBlocks;
    uint32_t pageSpareSize;

    hasSmallBlocks = call Hpl.hasSmallBlocks(MODEL(raw));
    pageSpareSize = call Hpl.getPageSpareSize(MODEL(raw));

    // Calculate actual address of the page
    rowAddress = (uint32_t) block * numPagesPerBlock /*call Hpl.getBlockSizeInPages(MODEL(raw))*/ + page;

    // Start operation
    //ENABLE_CE(raw);
    // Enable CE
    call NandFlash_CE.clr();

    if (data) {
      colAddress = 0;
    } else {
      // to read spare area in sequential access
      colAddress = pageDataSize;
    }

    // Use either small blocks or large blocks data area read
    if (hasSmallBlocks) {
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_A);
      WriteColumnAddress(raw, colAddress);
      WriteRowAddress(raw, rowAddress);
    } else {
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
      WriteColumnAddress(raw, colAddress);
      WriteRowAddress(raw, rowAddress);
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_2);
    }

    // Wait for the nand to be ready
    WaitReady();

    //pageDataSize = call Hpl.getPageDataSize(MODEL(raw));
    call Draw.drawInt(200, 220, colAddress, 1, COLOR_BLUE);
    call Draw.drawInt(100, 220, pageDataSize, 1, COLOR_BLUE);
    call Draw.drawInt(rowAddress*15, 200, rowAddress, 1, COLOR_BLUE);

    // Read data area if needed
    if (data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);

      if(pageDataSize != 2048){
	call Draw.drawInt(200, 240, page, 1, COLOR_GREEN);
      }

      ReadData(raw, (uint8_t *) data, pageDataSize);

      if (spare) {
	//call Leds.led2Toggle();
	ReadData(raw, (uint8_t *) spare, pageSpareSize);
      }
    }
    else {
      // Read spare area only
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
      ReadData(raw, (uint8_t *) spare, pageSpareSize);
    }


    // Disable CE
    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return 0;
  }

  //------------------------------------------------------------------------------
  /// Reads the bad block marker inside a spare area buffer using the provided
  /// scheme.
  /// \param scheme  Pointer to a NandSpareScheme instance.
  /// \param spare  Spare area buffer.
  /// \param marker  Pointer to the variable to store the bad block marker.
  //------------------------------------------------------------------------------
  command void Hpl.readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker){
    *marker = spare[scheme->badBlockMarkerPosition];
  }

  //------------------------------------------------------------------------------
  /// Modifies the bad block marker inside a spare area, using the given scheme.
  /// \param scheme  Pointer to a NandSpareScheme instance.
  /// \param spare  Spare area buffer.
  /// \param marker  Bad block marker to write.
  //------------------------------------------------------------------------------
  command void Hpl.writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker){
    spare[scheme->badBlockMarkerPosition] = marker;
  }

  command uint32_t Hpl.getDeviceSizeInBytes(const struct NandFlashModel *model){
    return ((uint32_t) model->deviceSizeInMegaBytes) << 20;
  }

  command uint32_t Hpl.getBlockSizeInBytes(const struct NandFlashModel *model){
    return (model->blockSizeInKBytes *1024);
  }

  command uint8_t Hpl.writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
    uint8_t numTries = NUMWRITETRIES;
    while (numTries > 0) {
      if (!WritePage(raw, block, page, data, spare)) {
	return 0;
      }
      numTries--;
    }
    return NandCommon_ERROR_BADBLOCK;
  }

  command uint8_t Hpl.copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
    uint8_t numTries = NUMCOPYTRIES;
    while (numTries) {
      if (!CopyPage(raw, sourceBlock, sourcePage, destBlock, destPage)) {
	return 0;
      }
      numTries--;
    }
    return NandCommon_ERROR_BADBLOCK;
  }

  command uint8_t Hpl.copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock){
    uint32_t i;
    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
    // Copy all pages
    for (i=0; i < numPages; i++) {
      if (call Hpl.copyPage(raw, sourceBlock, i, destBlock, i)) {
	return NandCommon_ERROR_BADBLOCK;
      }
    }
    return 0;
  }

  uint16_t totalReadFromBlock = 0;
  uint16_t readBlock = 0;
  void* readData;
  const struct RawNandFlash saveRaw;

  void readBlockTask(){

    uint8_t error;

    call Draw.fill(COLOR_WHITE);

    error = call Hpl.readPage(&saveRaw, readBlock, totalReadFromBlock, readData, 0);//ECC(skipBlock), block, i, data, 0);
    totalReadFromBlock ++;

    if (error) {
      //call Leds.led0Toggle();
      return;
    }else if(totalReadFromBlock < numPagesPerBlock){
      //call Draw.drawInt(totalReadFromBlock*15, 170, totalReadFromBlock, 1, COLOR_BLUE);
      //call Draw.drawInt(200, 185, numPagesPerBlock, 1, COLOR_BLUE);
      //readData = (void *) ((uint8_t *) readData + pageDataSize);
      readBlockTask();
      //call ReadBlockTimer.startOneShot(5);
    }else{
      call Leds.led2Toggle();
    }
    
  }

  command uint8_t Hpl.readBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
    //uint16_t i, error;
    //volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);

    uint8_t* data_local = (uint8_t*) data;

    totalReadFromBlock = 0;

    memcpy((void*)&saveRaw, (void*)raw, sizeof(struct RawNandFlash));

    readBlock = block;
    readData = data;

    call Draw.drawInt(50,150, data_local[0], 1, COLOR_BLACK);
    call Draw.drawInt(100,150, data_local[1], 1, COLOR_BLACK);
    call Draw.drawInt(150,150, data_local[2], 1, COLOR_BLACK);
    call Draw.drawInt(200,150, data_local[3], 1, COLOR_BLACK);

    readBlockTask();

    return 0;
  }

  command uint8_t Hpl.writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
    uint8_t error, i;

    for(i=0; i as ReadBlockTimer;

}
implementation {

/// Nand flash commands
#define COMMAND_READ_1                  0x00
#define COMMAND_READ_2                  0x30
#define COMMAND_COPYBACK_READ_1         0x00
#define COMMAND_COPYBACK_READ_2         0x35
#define COMMAND_COPYBACK_PROGRAM_1      0x85
#define COMMAND_COPYBACK_PROGRAM_2      0x10
#define COMMAND_RANDOM_OUT              0x05
#define COMMAND_RANDOM_OUT_2            0xE0
#define COMMAND_RANDOM_IN               0x85
#define COMMAND_READID                  0x90
#define COMMAND_WRITE_1                 0x80
#define COMMAND_WRITE_2                 0x10
#define COMMAND_ERASE_1                 0x60
#define COMMAND_ERASE_2                 0xD0
#define COMMAND_STATUS                  0x70
#define COMMAND_RESET                   0xFF

#define COMMAND_READ_A                  0x00
#define COMMAND_READ_C                  0x50

#define STATUS_READY                    (1 << 6)
#define STATUS_ERROR                    (1 << 0)


#define WRITE_COMMAND(commandAddress, u_command) \
    {*((volatile uint8_t *) commandAddress) = (uint8_t) u_command;}
#define WRITE_COMMAND16(commandAddress, u_command) \
    {*((volatile uint16_t *) commandAddress) = (uint16_t) u_command;}
#define WRITE_ADDRESS(addressAddress, address) \
    {*((volatile uint8_t *) addressAddress) = (uint8_t) address;}
#define WRITE_ADDRESS16(addressAddress, address) \
    {*((volatile uint16_t *) addressAddress) = (uint16_t) address;}
#define WRITE_DATA8(dataAddress, data) \
    {*((volatile uint8_t *) dataAddress) = (uint8_t) data;}
#define READ_DATA8(dataAddress) \
    (*((volatile uint8_t *) dataAddress))
#define WRITE_DATA16(dataAddress, data) \
    {*((volatile uint16_t *) dataAddress) = (uint16_t) data;}
#define READ_DATA16(dataAddress) \
    (*((volatile uint16_t *) dataAddress))

/// Number of tries for erasing a block
#define NUMERASETRIES           2
/// Number of tries for writing a block
#define NUMWRITETRIES           2
/// Number of tries for copying a block
#define NUMCOPYTRIES            2

/// Number of NandFlash models inside the list.
#define NandFlashModelList_SIZE         58

#define MODEL(raw)  ((struct NandFlashModel *) raw)

  //------------------------------------------------------------------------------
  //         Exported variables
  //------------------------------------------------------------------------------
  
  //extern const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE];

  /// Spare area placement scheme for 256 byte pages.
  const struct NandSpareScheme nandSpareScheme256 = {

    // Bad block marker is at position #5
    5,
    // 3 ecc bytes
    3,
    // Ecc bytes positions
    {0, 1, 2},
    // 4 extra bytes
    4,
    // Extra bytes positions
    {3, 4, 6, 7}
  };

  /// Spare area placement scheme for 512 byte pages.
  const struct NandSpareScheme nandSpareScheme512 = {

    // Bad block marker is at position #5
    5,
    // 6 ecc bytes
    6,
    // Ecc bytes positions
    {0, 1, 2, 3, 6, 7},
    // 8 extra bytes
    8,
    // Extra bytes positions
    {8, 9, 10, 11, 12, 13, 14, 15}
  };

  /// Spare area placement scheme for 2048 byte pages.
  const struct NandSpareScheme nandSpareScheme2048 = {

    // Bad block marker is at position #0
    0,
    // 24 ecc bytes
    24, 
    // Ecc bytes positions
    {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
     59, 60, 61, 62, 63},
    // 38 extra bytes
    38,
    // Extra bytes positions
    {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
     22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39}
  };

  /// List of NandFlash models which can be recognized by the software.
  const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE] = {

    // |  ID    | Options                 | Page    | Mo  | Block   |BlkPg   |DevBlk
    {0x6e,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0x64,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
    {0x6b,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe8,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0xec,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
    {0xea,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
    {0xd5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe3,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xe5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
    {0xd6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},

    {0x39,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
    {0xe6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
    {0x49,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
    {0x59,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},

    {0x33,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
    {0x73,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
    {0x43,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
    {0x53,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
                                                             
    {0x35,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
    {0x75,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
    {0x45,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
    {0x55,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
                                                             
    {0x36,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
    {0x76,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
    {0x46,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
    {0x56,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
                                                             
    {0x78,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x39,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x79,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
    {0x72,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x49,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x74,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
    {0x59,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
                                                             
    {0x71,   NandFlashModel_DATABUS8,    512,    256,   16,    &nandSpareScheme512},
	
    // Large blocks devices. Parameters must be fetched from the extended I
#define OPTIONS     NandFlashModel_COPYBACK                   
                                                                                          
    {0xA2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xF2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xB2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    {0xC2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
    
    {0xA1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
    {0xF1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
    {0xB1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
    {0xC1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
                                                                  
    {0xAA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
    {0xDA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,   &nandSpareScheme2048},                                              
    {0xBA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
    {0xCA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
	                                                                
    {0xAC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
    {0xDC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
    {0xBC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
    {0xCC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
                                                                  
    {0xA3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
    {0xD3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
    {0xB3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
    {0xC3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
                                                                  
    {0xA5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
    {0xD5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
    {0xB5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
    {0xC5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
  };

  uint16_t numBlocks;
  uint32_t memSize;
  uint32_t blockSize;
  uint16_t numPagesPerBlock;
  uint16_t pageDataSize;

  void WaitReady(){
    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
    while ((READ_DATA8(BOARD_NF_DATA_ADDR) & STATUS_READY) != STATUS_READY);
  }

  uint8_t GetDataBusWidth(const struct NandFlashModel *model){
    return (model->options&NandFlashModel_DATABUS16)? 16: 8;
  }

  void WriteColumnAddress(const struct RawNandFlash *raw, uint16_t columnAddress){
    
    uint16_t pageSize = call Hpl.getPageDataSize(MODEL(raw));

    call Draw.drawInt(200, 250, pageSize, 1, COLOR_BLACK);

    /* Check the data bus width of the NandFlash */
    if (GetDataBusWidth(MODEL(raw)) == 16) {
      /* Div 2 is because we address in word and not in byte */
      columnAddress >>= 1;
    }
    while (pageSize > 0) {
      if (GetDataBusWidth(MODEL(raw)) == 16) {
	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
      } else {
	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
      }
      pageSize >>= 8;
      columnAddress >>= 8;
    }
  }

  //------------------------------------------------------------------------------
  /// Sends the row address to the NandFlash chip.
  /// \param raw  Pointer to a RawNandFlash instance.
  /// \param rowAddress  Row address to send.
  //------------------------------------------------------------------------------
  void WriteRowAddress(const struct RawNandFlash *raw, uint32_t rowAddress){

    uint32_t numPages = call Hpl.getDeviceSizeInPages(MODEL(raw));

    while (numPages > 0) {
      if (GetDataBusWidth(MODEL(raw)) == 16) {
	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
      } else {
	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
      }
      numPages >>= 8;
      rowAddress >>= 8;
    }
  }

  void WriteData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
    uint32_t i;
    // Check the data bus width of the NandFlash
    if (GetDataBusWidth(MODEL(raw)) == 16) {
      uint16_t *buffer16 = (uint16_t *) buffer;
      size >>= 1;
      for(i=0; i < size; i++) {
	call Draw.drawInt(i*15,50, i, 1, COLOR_RED);
	WRITE_DATA16(BOARD_NF_DATA_ADDR, buffer16[i]);
      }
    } else {
      for(i=0; i < size; i++) {
	WRITE_DATA8(BOARD_NF_DATA_ADDR, buffer[i]);
      }
    }
  }

  uint8_t count = 0;

  void ReadData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
    uint16_t i;
    // Check the chip data bus width

    count ++;

    if (GetDataBusWidth(MODEL(raw)) == 16) {
      uint16_t *buffer16 = (uint16_t *) buffer;

      size >>= 1;

      //call Draw.drawInt(200,130, size, 1, COLOR_YELLOW);

      for (i=0; i < size; i++) {
	call Draw.drawInt(i*15,50, i, 1, COLOR_BLACK);
	buffer16[i] = READ_DATA16(BOARD_NF_DATA_ADDR);
      }

      call Draw.drawInt(100,150, buffer16[0], 1, COLOR_BLACK);
      call Draw.drawInt(200,150, buffer16[1], 1, COLOR_BLACK);

    } else {

      for (i=0; i < size; i++) {
	buffer[i] = READ_DATA8(BOARD_NF_DATA_ADDR);
      }
    }

    call Draw.drawInt(count*15,130, count, 1, COLOR_BLUE);
  }

  uint8_t IsOperationComplete(const struct RawNandFlash *raw){
    uint8_t status;

    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);

    status = READ_DATA8(BOARD_NF_DATA_ADDR);

    if (((status & STATUS_READY) != STATUS_READY) || ((status & STATUS_ERROR) != 0)) {
        return 0;
    }
    return 1;
  }

  uint8_t EraseBlock( const struct RawNandFlash *raw, unsigned short block){
    uint8_t error = 0;
    uint32_t rowAddress;

    // Calculate address used for erase
    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw));

    // Start erase
    //ENABLE_CE(raw);
    // Enable CE
    call NandFlash_CE.clr();

    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_1);
    WriteRowAddress(raw, rowAddress);
    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_2);

    WaitReady();

    if (!IsOperationComplete(raw)) {
      error = NandCommon_ERROR_CANNOTERASE;
    }

    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return error;
    
  }

  uint8_t WritePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
    
    uint32_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
    uint32_t spareDataSize = call Hpl.getPageSpareSize(MODEL(raw));
    uint16_t dummyByte;
    uint32_t rowAddress;
    uint8_t error = 0;

    // Calculate physical address of the page
    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw)) + page;

    // Start write operation
    //ENABLE_CE(raw);
    // Enable CE;
    call NandFlash_CE.clr();

    // Write data area if needed
    if (data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
      WriteColumnAddress(raw, 0);
      WriteRowAddress(raw, rowAddress);
      WriteData(raw, (uint8_t *) data, pageSize);

      //call Draw.drawInt(50, 50, (uint8_t)data[0], 1, COLOR_RED);

      // Spare is written here as well since it is more efficient
      if (spare) {
	WriteData(raw, (uint8_t *) spare, spareDataSize);
      }
      else {
	// Note: special case when ECC parity generation. 
	// ECC results are available as soon as the counter reaches the end of the main area.
	// But when reach PageSize for an example, it could not generate last ECC_PR, The 
	// workaround is to receive PageSize+1 word.
	ReadData(raw, (uint8_t *) (&dummyByte), 2);
      }
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);

      WaitReady();

      if (!IsOperationComplete(raw)) {
	error = NandCommon_ERROR_CANNOTWRITE;
      }
    }

    // Write spare area alone if needed
    if (spare && !data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
      WriteColumnAddress(raw, pageSize);
      WriteRowAddress(raw, rowAddress);
      WriteData(raw, (uint8_t *) spare, spareDataSize);
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);

      WaitReady();
      if (!IsOperationComplete(raw)) {
	error = NandCommon_ERROR_CANNOTWRITE;
      }
    }

    // Disable chip
    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return error;

  }

  uint8_t CopyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){

    uint32_t sourceRow, destRow;
    uint8_t error = 0;
    uint8_t data[NandCommon_MAXPAGEDATASIZE];
    uint8_t spare[NandCommon_MAXPAGESPARESIZE];
    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
    sourceRow = sourceBlock * numPages + sourcePage;
    destRow = destBlock * numPages + destPage;

    if (call Hpl.readPage(raw, sourceBlock, sourcePage, data, spare)) {
      error = NandCommon_ERROR_CANNOTREAD;
    } else if (call Hpl.writePage(raw, destBlock, destPage, data, spare)) {
      error = NandCommon_ERROR_CANNOTWRITE;
    }

    return error;    
  }

  void configureNandFlash(uint8_t busWidth){
    // Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
    // set clock
    // set smc registers
    volatile smc_setup_t *SETUP = (volatile smc_setup_t *) (0x400E0084 + 0x0);
    smc_setup_t setup = *SETUP;
    volatile smc_pulse_t *PULSE = (volatile smc_pulse_t *) (0x400E0084 + 0x4);
    smc_pulse_t pulse = *PULSE;
    volatile smc_cycle_t *CYCLE = (volatile smc_cycle_t *) (0x400E0084 + 0x8);
    smc_cycle_t cycle = *CYCLE;
    volatile smc_timings_t *TIMINGS = (volatile smc_timings_t *) (0x400E0084 + 0xC);
    smc_timings_t timings = *TIMINGS;
    volatile smc_mode_t *MODE = (volatile smc_mode_t *) (0x400E0084 + 0x10);
    smc_mode_t mode = *MODE;

    // start clock for register access
    call HSMC4ClockControl.disable();
    call HSMC4ClockControl.enable();

    setup.bits.nwe_setup = 0;
    setup.bits.ncs_wr_setup = 1;
    setup.bits.nrd_setup = 0;
    setup.bits.ncs_rd_setup = 1;

    *SETUP = setup;

    pulse.bits.nwe_pulse = 2;
    pulse.bits.ncs_wr_pulse = 3;
    pulse.bits.nrd_pulse = 3;
    pulse.bits.ncs_rd_pulse = 4;

    *PULSE = pulse;

    cycle.bits.nwe_cycle = 4;
    cycle.bits.nrd_cycle = 7;

    *CYCLE = cycle;

    timings.bits.tclr = 1;
    timings.bits.tadl = 2;
    timings.bits.tar = 1;
    timings.bits.trr = 1;
    timings.bits.twb = 2;
    timings.bits.rbnsel = 7;
    timings.bits.nfsel = 1;

    *TIMINGS = timings;

    if(busWidth == 8){
      mode.bits.dbw = 0;
      mode.bits.read_mode = 1;
      mode.bits.write_mode = 1;

      *MODE = mode;

    }else if(busWidth == 16){
      mode.bits.dbw = 1;
      mode.bits.read_mode = 1;
      mode.bits.write_mode = 1;

      *MODE = mode;
      
    }
  }

  void configurePsRam(){
    // TODO: Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
    // TODO: Does Atmel code work with this disabled?
  }

  void configureNandPins(){

    // Pin setting

    call NandFlash_CE.makeOutput();
    call NandFlash_RB.makeInput();

    call NandFlash_OE.disablePioControl();
    call NandFlash_WE.disablePioControl();
    call NandFlash_CLE.disablePioControl();
    call NandFlash_ALE.disablePioControl();

    call NandFlash_OE.selectPeripheralA();
    call NandFlash_WE.selectPeripheralA();
    call NandFlash_CLE.selectPeripheralA();
    call NandFlash_ALE.selectPeripheralA();

    call NandFlash_Data00.disablePioControl();
    call NandFlash_Data01.disablePioControl();
    call NandFlash_Data02.disablePioControl();
    call NandFlash_Data03.disablePioControl();
    call NandFlash_Data04.disablePioControl();
    call NandFlash_Data05.disablePioControl();
    call NandFlash_Data06.disablePioControl();
    call NandFlash_Data07.disablePioControl();
    call NandFlash_Data08.disablePioControl();
    call NandFlash_Data09.disablePioControl();
    call NandFlash_Data10.disablePioControl();
    call NandFlash_Data11.disablePioControl();
    call NandFlash_Data12.disablePioControl();
    call NandFlash_Data13.disablePioControl();
    call NandFlash_Data14.disablePioControl();
    call NandFlash_Data15.disablePioControl();

    call NandFlash_Data00.selectPeripheralA();
    call NandFlash_Data01.selectPeripheralA();
    call NandFlash_Data02.selectPeripheralA();
    call NandFlash_Data03.selectPeripheralA();
    call NandFlash_Data04.selectPeripheralA();
    call NandFlash_Data05.selectPeripheralA();
    call NandFlash_Data06.selectPeripheralA();
    call NandFlash_Data07.selectPeripheralA();
    call NandFlash_Data08.selectPeripheralA();
    call NandFlash_Data09.selectPeripheralA();
    call NandFlash_Data10.selectPeripheralA();
    call NandFlash_Data11.selectPeripheralA();
    call NandFlash_Data12.selectPeripheralA();
    call NandFlash_Data13.selectPeripheralA();
    call NandFlash_Data14.selectPeripheralA();
    call NandFlash_Data15.selectPeripheralB(); // PB6
  }

  command uint8_t Hpl.hasSmallBlocks(const struct NandFlashModel *model){
    return (model->pageSizeInBytes <= 512 )? 1: 0;
  }

  //------------------------------------------------------------------------------
  /// Returns the size of the data area of a page in bytes.
  /// \param model  Pointer to a NandFlashModel instance.
  //------------------------------------------------------------------------------
  command uint16_t Hpl.getPageDataSize(const struct NandFlashModel *model){
    return model->pageSizeInBytes;
  }

  //------------------------------------------------------------------------------
  /// Returns the size of the spare area of a page in bytes.
  /// \param model  Pointer to a NandFlashModel instance.
  //------------------------------------------------------------------------------
  command uint8_t Hpl.getPageSpareSize(const struct NandFlashModel *model){
    return (model->pageSizeInBytes>>5); /// Spare size is 16/512 of data size
  }

  command void Hpl.init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr){
    uint32_t chipId;
    uint8_t error;
    uint8_t busWidth = 16;

    //configurePsRam();
    configureNandFlash(busWidth);
    configureNandPins();

    HplNand -> commandAddress = commandAddr;
    HplNand -> addressAddress = addressAddr;
    HplNand -> dataAddress = dataAddr;

    call Hpl.reset();

    if(!model){
      chipId = call Hpl.readId();
      error = call Hpl.findNandModel(nandFlashModelList, NandFlashModelList_SIZE, &(HplNand->model), chipId);
    }else{
      HplNand -> model = *model;
    }

    if(!error){
    } else {
    }

    busWidth = 0;
    busWidth = GetDataBusWidth(MODEL(HplNand));
    configureNandFlash(busWidth);
    
    memSize = call Hpl.getDeviceSizeInBytes(MODEL(HplNand));
    blockSize = call Hpl.getBlockSizeInBytes(MODEL(HplNand));
    numBlocks = call Hpl.getDeviceSizeInBlocks(MODEL(HplNand));
    pageDataSize = call Hpl.getPageDataSize(MODEL(HplNand));
    numPagesPerBlock = call Hpl.getBlockSizeInPages(MODEL(HplNand));    

    call Draw.drawInt(150, 20, busWidth, 1, COLOR_BLACK);
    call Draw.drawInt(150, 40, pageDataSize, 1, COLOR_BLACK);
    call Draw.drawInt(150, 60, memSize, 1, COLOR_BLACK);
    call Draw.drawInt(150, 80, numPagesPerBlock, 1, COLOR_BLACK);

  }

  command uint8_t Hpl.findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId){

    uint8_t i, found = 0;

    //volatile smc_cfg_t *CFG = (volatile smc_cfg_t *) (0x400E0000);
    //smc_cfg_t cfg = *CFG;

    uint8_t id2 = (uint8_t)(chipId>>8);
    uint8_t id4 = (uint8_t)(chipId>>24);

    //call Draw.drawInt(100, 60, chipId, 1, COLOR_YELLOW);
    //call Draw.drawInt(100, 80, id2, 1, COLOR_YELLOW);
    
    for(i=0; iblockSizeInKBytes == 0 || model->pageSizeInBytes == 0) {
	    //TRACE_DEBUG("Fetch from ID4(0x%.2x):\r\n", id4);
	    /// Fetch from the extended ID4
	    /// ID4 D5  D4 BlockSize || D1  D0  PageSize
	    ///     0   0   64K      || 0   0   1K
	    ///     0   1   128K     || 0   1   2K
	    ///     1   0   256K     || 1   0   4K
	    ///     1   1   512K     || 1   1   8k
	    switch(id4 & 0x03) {
	    case 0x00: model->pageSizeInBytes = 1024; break;
	    case 0x01: model->pageSizeInBytes = 2048; break;
	    case 0x02: model->pageSizeInBytes = 4096; break;
	    case 0x03: model->pageSizeInBytes = 8192; break;
	    }
	    switch(id4 & 0x30) {
	    case 0x00: model->blockSizeInKBytes = 64;  break;
	    case 0x10: model->blockSizeInKBytes = 128; break;
	    case 0x20: model->blockSizeInKBytes = 256; break;
	    case 0x30: model->blockSizeInKBytes = 512; break;
	    }
	  }

	  /*
	  switch(model->pageSizeInBytes) {
	  case 1024: pageSize = AT91C_HSMC4_PAGESIZE_1056_Bytes; break;
	  case 2048: pageSize = AT91C_HSMC4_PAGESIZE_2112_Bytes; break;
	  case 4096: pageSize = AT91C_HSMC4_PAGESIZE_4224_Bytes; break;
	  default: ;//TRACE_ERROR("Unsupportted page size for NAND Flash Controller\n\r");
	  }
	  // This part sets the SMC registers? this is it?

	  cfg.bits.pagesize = pageSize;
	  cfg.bits.dtomul = 7;
	  cfg.bits.edgectrl = 1;
	  cfg.bits.dtocyc = 0xF;
	  cfg.bits.rspare = 1;

	  *CFG = cfg;
	  //HSMC4_SetMode(pageSize | AT91C_HSMC4_DTOMUL_1048576 | AT91C_HSMC4_EDGECTRL | AT91C_HSMC4_DTOCYC | AT91C_HSMC4_RSPARE); // ?????????????
	  */
	}
	break;
      }
    }

    // Check if chip has been detected
    if (found) {
      return 0;
    }
    else {
      return NandCommon_ERROR_UNKNOWNMODEL;
    }
  }

  command void Hpl.reset(){
    /*
      1. Enable CE
      2. Write reset command
      3. wait for ready
      4. Disable CE
     */

    // Enable CE
    call NandFlash_CE.clr();

    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
    //WRTIE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
    WaitReady();
    // Disable CE

    call NandFlash_CE.set();
  }

  command uint32_t Hpl.readId(){
    uint32_t chipId;

    // enable CE 
    call NandFlash_CE.clr();

    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
    //WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
    WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, 0);

    chipId  = READ_DATA8(BOARD_NF_DATA_ADDR);
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 8;
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 16;
    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 24;

    // Disable CE 
    call NandFlash_CE.set();

    return chipId;
  }

  command uint16_t Hpl.getDeviceSizeInBlocks(const struct NandFlashModel * model){
    return ((1024) / model->blockSizeInKBytes) * model->deviceSizeInMegaBytes;
  }

  command uint32_t Hpl.getDeviceSizeInPages(const struct NandFlashModel *model){
    return (uint32_t) call Hpl.getDeviceSizeInBlocks(model) * call Hpl.getBlockSizeInPages(model);
  }

  command uint8_t Hpl.eraseBlock(const struct RawNandFlash *raw, uint16_t block){

    uint8_t numTries = NUMERASETRIES;

    while (numTries > 0) {

        if (!EraseBlock(raw, block)) {

            return 0;
        }
        numTries--;
    }

    return NandCommon_ERROR_BADBLOCK;

  }

  command uint16_t Hpl.getBlockSizeInPages(const struct NandFlashModel *model){
    return model->blockSizeInKBytes * 1024 / model->pageSizeInBytes;
  }

  command uint8_t Hpl.readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){

    uint32_t colAddress;
    uint32_t rowAddress;
    uint8_t hasSmallBlocks;
    uint32_t pageSpareSize;

    hasSmallBlocks = call Hpl.hasSmallBlocks(MODEL(raw));
    pageSpareSize = call Hpl.getPageSpareSize(MODEL(raw));

    // Calculate actual address of the page
    rowAddress = (uint32_t) block * numPagesPerBlock /*call Hpl.getBlockSizeInPages(MODEL(raw))*/ + page;

    // Start operation
    //ENABLE_CE(raw);
    // Enable CE
    call NandFlash_CE.clr();

    if (data) {
      colAddress = 0;
    } else {
      // to read spare area in sequential access
      colAddress = pageDataSize;
    }

    // Use either small blocks or large blocks data area read
    if (hasSmallBlocks) {
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_A);
      WriteColumnAddress(raw, colAddress);
      WriteRowAddress(raw, rowAddress);
    } else {
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
      WriteColumnAddress(raw, colAddress);
      WriteRowAddress(raw, rowAddress);
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_2);
    }

    // Wait for the nand to be ready
    WaitReady();

    //pageDataSize = call Hpl.getPageDataSize(MODEL(raw));
    call Draw.drawInt(200, 220, colAddress, 1, COLOR_BLUE);
    call Draw.drawInt(100, 220, pageDataSize, 1, COLOR_BLUE);
    call Draw.drawInt(rowAddress*15, 200, rowAddress, 1, COLOR_BLUE);

    // Read data area if needed
    if (data) {

      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);

      if(pageDataSize != 2048){
	call Draw.drawInt(200, 240, page, 1, COLOR_GREEN);
      }

      ReadData(raw, (uint8_t *) data, pageDataSize);

      if (spare) {
	//call Leds.led2Toggle();
	ReadData(raw, (uint8_t *) spare, pageSpareSize);
      }
    }
    else {
      // Read spare area only
      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
      ReadData(raw, (uint8_t *) spare, pageSpareSize);
    }


    // Disable CE
    //DISABLE_CE(raw);
    // Disable CE
    call NandFlash_CE.set();

    return 0;
  }

  //------------------------------------------------------------------------------
  /// Reads the bad block marker inside a spare area buffer using the provided
  /// scheme.
  /// \param scheme  Pointer to a NandSpareScheme instance.
  /// \param spare  Spare area buffer.
  /// \param marker  Pointer to the variable to store the bad block marker.
  //------------------------------------------------------------------------------
  command void Hpl.readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker){
    *marker = spare[scheme->badBlockMarkerPosition];
  }

  //------------------------------------------------------------------------------
  /// Modifies the bad block marker inside a spare area, using the given scheme.
  /// \param scheme  Pointer to a NandSpareScheme instance.
  /// \param spare  Spare area buffer.
  /// \param marker  Bad block marker to write.
  //------------------------------------------------------------------------------
  command void Hpl.writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker){
    spare[scheme->badBlockMarkerPosition] = marker;
  }

  command uint32_t Hpl.getDeviceSizeInBytes(const struct NandFlashModel *model){
    return ((uint32_t) model->deviceSizeInMegaBytes) << 20;
  }

  command uint32_t Hpl.getBlockSizeInBytes(const struct NandFlashModel *model){
    return (model->blockSizeInKBytes *1024);
  }

  command uint8_t Hpl.writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
    uint8_t numTries = NUMWRITETRIES;
    while (numTries > 0) {
      if (!WritePage(raw, block, page, data, spare)) {
	return 0;
      }
      numTries--;
    }
    return NandCommon_ERROR_BADBLOCK;
  }

  command uint8_t Hpl.copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
    uint8_t numTries = NUMCOPYTRIES;
    while (numTries) {
      if (!CopyPage(raw, sourceBlock, sourcePage, destBlock, destPage)) {
	return 0;
      }
      numTries--;
    }
    return NandCommon_ERROR_BADBLOCK;
  }

  command uint8_t Hpl.copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock){
    uint32_t i;
    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
    // Copy all pages
    for (i=0; i < numPages; i++) {
      if (call Hpl.copyPage(raw, sourceBlock, i, destBlock, i)) {
	return NandCommon_ERROR_BADBLOCK;
      }
    }
    return 0;
  }

  uint16_t totalReadFromBlock = 0;
  uint16_t readBlock = 0;
  void* readData;
  const struct RawNandFlash saveRaw;

  void readBlockTask(){

    uint8_t error;

    call Draw.fill(COLOR_WHITE);

    error = call Hpl.readPage(&saveRaw, readBlock, totalReadFromBlock, readData, 0);//ECC(skipBlock), block, i, data, 0);
    totalReadFromBlock ++;

    if (error) {
      //call Leds.led0Toggle();
      return;
    }else if(totalReadFromBlock < numPagesPerBlock){
      //call Draw.drawInt(totalReadFromBlock*15, 170, totalReadFromBlock, 1, COLOR_BLUE);
      //call Draw.drawInt(200, 185, numPagesPerBlock, 1, COLOR_BLUE);
      readData = (void *) ((uint8_t *) readData + pageDataSize);
      readBlockTask();
      //call ReadBlockTimer.startOneShot(5);
    }else{
      call Leds.led2Toggle();
    }
    
  }

  command uint8_t Hpl.readBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
    //uint16_t i, error;

    totalReadFromBlock = 0;

    memcpy((void*)&saveRaw, (void*)raw, sizeof(struct RawNandFlash));

    readBlock = block;
    readData = data;

    readBlockTask();

    return 0;
  }

  command uint8_t Hpl.writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
    uint8_t error, i;

    for(i=0; i SDC;
  FatFsP.diskIOStdControl -> SDC;
  FatFsP.Time->TimeC;

  components LedsC;
  FatFsP.Leds->LedsC;
}

tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/sd/PlatformHsmciConfigC.nc000066400000000000000000000044761207233610700263560ustar00rootroot00000000000000/*
 * Copyright (c) 2010 Johns Hopkins University.
 * Copyright (c) 2010 CSIRO Australia
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met: 
 * 
 * - Redistributions of source code must retain the above copyright 
 *   notice, this list of conditions and the following disclaimer. 
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the 
 *   distribution. 
 * - Neither the name of the copyright holders nor the names of 
 *   its contributors may be used to endorse or promote products derived 
 *   from this software without specific prior written permission. 
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
 * OF THE POSSIBILITY OF SUCH DAMAGE. 
 */

/**
 * Platform specific SD card initialization for the Sam3u Cortex HSMCI bus
 *
 * @author Kevin Klues
 */

#include 

module PlatformHsmciConfigC {
  provides interface Init;
}
implementation {
    
  command error_t Init.init() {
    // Write protection on the registers must first be disabled
    if(HSMCI->wpmr.bits.wp_en)
      return FAIL;
    
    HSMCI->sdcr.bits.sdcsel = 0;   // Choose card slot A 
    HSMCI->sdcr.bits.sdcbus = 2;   // 4 bit data bus
    HSMCI->cmdr.bits.trtyp = 0;    // SDCard single block transfer mode
    HSMCI->blkr.bits.blklen = 512; // The block size
    HSMCI->blkr.bits.bcnt = 1;     // SDCard single block transfer
    return SUCCESS;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/sd/Time.h000066400000000000000000000045111207233610700230700ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

typedef uint32_t time_t;

#define HAVE_WDAY
#undef HAVE_DST

struct tm
{
  int tm_sec;			/* Seconds.	[0-60] (1 leap second) */
  int tm_min;			/* Minutes.	[0-59] */
  int tm_hour;			/* Hours.	[0-23] */
  int tm_mday;			/* Day.		[1-31] */
  int tm_mon;			/* Month.	[0-11] */
  int tm_year;			/* Year	- 1900.  */
#ifdef HAVE_WDAY
  int tm_wday;			/* Day of week.	[0-6] */
#endif
  int tm_yday;			/* Days in year.[0-365]	*/
  int tm_isdst;			/* DST.		[-1/0/1]*/

#ifdef __UCLIBC_HAS_TM_EXTENSIONS__
#ifdef	__USE_BSD
  long int tm_gmtoff;		/* Seconds east of UTC.  */
  __const char *tm_zone;	/* Timezone abbreviation. */
#else
  long int __tm_gmtoff;		/* Seconds east of UTC.  */
  __const char *__tm_zone;	/* Timezone abbreviation. */
#endif
#endif /* __UCLIBC_HAS_TM_EXTENSIONS__ */
};
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/sd/Time.nc000066400000000000000000000040641207233610700232440ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Hewlett-Packard Company
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include "Time.h"

interface Time {
  command error_t gmtime(const time_t *timer, struct tm *tm);
  command error_t localtime(const time_t *timer, struct tm *tm);
  command error_t asctime(const struct tm *tm, char *buf, int buflen);
  command error_t time(time_t *timer);
  command void setCurrentTime(time_t current_time);
  command void setZoneInfo(uint16_t g_year, 
			   time_t g_year_time, 
			   uint8_t g_zero_day, 
			   uint16_t g_dst_fday, 
			   uint16_t g_dst_lday);
  event void tick();
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/sd/TimeC.nc000066400000000000000000000042511207233610700233450ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date March, 2010
 * 
 * pulling together time modules
 */

configuration TimeC {
  provides{
    interface Time;
    interface Init;
  }
}

implementation { 
  components TimeP;
  Init = TimeP;
  Time = TimeP;

  components new TimerMilliC() as LocalTimer;
  TimeP.Timer -> LocalTimer;

  components Counter32khz64C as Counter;
  components new CounterToLocalTime64C(T32khz);
  CounterToLocalTime64C.Counter -> Counter;
  TimeP.LocalTime64 -> CounterToLocalTime64C;
  
  /* 
   * and, at some point...
   *  TimeP.NTPClient            -> NTPClientM;   not yet, awaiting tos-2.x ip port
   */

}

tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/sd/TimeP.nc000066400000000000000000000235061207233610700233660ustar00rootroot00000000000000/*
 * Copyright (C) 2002     Manuel Novoa III
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * port to tos-2.x
 * @author Steve Ayer
 * @date   January, 2010
 */

// includes InfoMem;  let's avoid this...

module TimeP {
  provides {
    interface Init;
    interface Time;
    //    interface ParamView;    save for ip stack port to tos-2.x
  }
  uses {
    interface Timer;
    //    interface NTPClient;  save for ip stack port to tos-2.x
    interface LocalTime64;
  }
}

implementation {

#define HAVE_DST
extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));

  struct y_info{
    time_t year_seconds; /* time_t value for beginning of year */
    int8_t wday_offset;   /* tm_day of first day of the year */
    int8_t isleap;
    int16_t dst_first_yday;
    int16_t dst_last_yday;
  };
  time_t g_seconds;
  time_t g_year_seconds;
  time_t g_seconds_from_year;
  uint16_t g_days;
  time_t g_seconds_from_day;

  //#define TZNAME_MAX 7
  //#define LONG_MAX 0x7fffffffL
  time_t g_tick_local_time;
#ifdef CURRENT_TIME  
  time_t g_current_time = CURRENT_TIME;
#else
  time_t g_current_time;
#endif

#ifndef HOST_TIME
#define NUM_YEARS 4
  int16_t g_first_year = 2009;
  struct y_info year_info[NUM_YEARS] = {
    /* unix time start jan 1 1970 */
    // from 2007, dst begins 2nd sunday in march, ends first sunday in november
    { 0x495c4dd0, 3, 0, 67, 305},
    { 0x4B3D8150, 4, 0, 73, 311},
    { 0x4D1EB4D0, 5, 0, 72, 310},
    { 0x4EFFE850, 6, 1, 71, 309}
  };

#else
#define NUM_YEARS 1
  // these will be set by setZoneInfo()
  int16_t g_first_year = 0;
  struct y_info year_info[NUM_YEARS];
#endif

  //  time_t g_local_time; /* from LocalTime.read() */
  uint64_t g_local_time; /* from LocalTime.read(), now 64 bits to handle */

  typedef struct {
    long gmt_offset;
    //    long dst_offset;
    //    short day;					/* for J or normal */
    //    short week;
    //    short month;
    //    short rule_type;			/* J, M, \0 */
    //    char tzname[TZNAME_MAX+1];
  } rule_struct;

  rule_struct _time_tzinfo[1];

  // gmt_offset can stay zero, because any CURRENT_TIME we get is from a local source
  command error_t Init.init() {
    _time_tzinfo[0].gmt_offset = 60L * 0L;

    g_tick_local_time = call LocalTime64.get();
    call Timer.startPeriodic(10*1024L);
    signal Time.tick();
    return SUCCESS;
  }

  command void Time.setCurrentTime(time_t current_time){
    atomic g_current_time = current_time;
    g_local_time = call LocalTime64.get();
  }

  command void Time.setZoneInfo(uint16_t g_year, 
				time_t g_year_time, 
				uint8_t g_zero_day, 
				uint16_t g_dst_fday, 
				uint16_t g_dst_lday){
    g_first_year = g_year;
    
    year_info[0].year_seconds = g_year_time;
    year_info[0].wday_offset = g_zero_day;

    if(!(g_year % 4))
      year_info[0].isleap = 1;
    else
      year_info[0].isleap = 0;

    year_info[0].dst_first_yday = g_dst_fday;
    year_info[0].dst_last_yday = g_dst_lday;
  }

  void dotick(int force) {
    time_t tick = call LocalTime64.get();
    if (force || tick >= (g_tick_local_time + 32768L*10)) {
      signal Time.tick();
      g_tick_local_time = tick;
    }
  }
  event void Timer.fired() {
    dotick(0);
  }

  /*  
   * save this pending tos-2.x port of ip stack
   *
   event void NTPClient.timestampReceived( uint32_t *seconds, uint32_t *fraction ) {
   g_current_time = *seconds;
   g_local_time = call LocalTime64.get();
   dotick(1);
   }
  */

  struct tm __time_tm;

  /* Notes:
   * If time_t is 32 bits, then no overflow is possible.
   * It time_t is > 32 bits, this needs to be adjusted to deal with overflow.
   */

  static const int8_t days_per_month[] = {
    31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31, /* non-leap */
    29,
  };

#ifdef __UCLIBC_HAS_TM_EXTENSIONS__
  static const char utc_string[] = "UTC";
#endif

  /*
    import time
    for y in range(2004,2008):
       t = time.mktime((y, 1, 1, 0, 0, 0, 0, 0, 0))-5*3600
       print time.gmtime(t)
    
    (2004, 1, 1, 0, 0, 0, 3, 1, 0)
    (2005, 1, 1, 0, 0, 0, 5, 1, 0)
    (2006, 1, 1, 0, 0, 0, 6, 1, 0)
    (2007, 1, 1, 0, 0, 0, 0, 1, 0)
    from below in year_info struct for 2004-7
    { 0x3ff36300, 3, 1 },
    { 0x41d5e800, 5, 0 },
    { 0x43b71b80, 6, 0 },
    { 0x45984f00, 0, 0 }
    
    NTP Timestamp starts Jan 1, 1900 and is 2208988800 jan 1 1970
    '%x' % (int(time.mktime((2004, 1, 1, 0, 0, 0, 3, 1, 0))) -18000 + 2208988800l)
    
    and now, 
    
    (2009, 1, 1, 0, 0, 0, 3, 1, 0)
    (2010, 1, 1, 0, 0, 0, 4, 1, 0)
    (2011, 1, 1, 0, 0, 0, 5, 1, 0)
    (2012, 1, 1, 0, 0, 0, 6, 1, 0)
    
  */

  struct tm *_time_t2tm(const time_t *timer, int localtime, struct tm *result)
  {
    uint16_t seconds16;
    int i;
    time_t seconds = *timer;
    uint16_t days;
    uint16_t hour, min;
    int isleap = 0;

    //if year_info has dst_first_yday and dst_last_yday defined, then HAVE_DST should be defined up top.
#ifdef HAVE_DST
    int isdst = 0;
#endif

    if (localtime) {
      seconds -= _time_tzinfo[0].gmt_offset;
    }

    g_seconds = seconds;
    if (seconds < year_info[0].year_seconds) {
      memset(result, 0, sizeof(struct tm));
      return NULL;
    }
    
    if(NUM_YEARS > 1){
      for (i = 0; i < NUM_YEARS-1; i++) {
	if (seconds < year_info[i+1].year_seconds) {
	  seconds -= year_info[i].year_seconds;
	  result->tm_year = g_first_year + i;
	  isleap = year_info[i].isleap;
	  break;
	}
      }
    }
    else{
      i = 0;
      seconds -= year_info[i].year_seconds;
      result->tm_year = g_first_year + i;
      isleap = year_info[i].isleap;
    }
    g_year_seconds = year_info[i].year_seconds;
    g_seconds_from_year = seconds;
    days = seconds / 86400L;
    g_days = days;
    seconds -= days * 86400L;
    g_seconds_from_day = seconds;
#ifdef HAVE_DST
    if (days >= year_info[i].dst_first_yday && 
	days <= year_info[i].dst_last_yday) {
      isdst = 1;
      seconds += 3600;
      if (seconds < 0) {
	days--;
	seconds += 86400L;
      }
      if (days < 0) {
	result->tm_year--;
	days += 365;
      }
    }
#endif /* HAVE_DST */

    result->tm_yday = days; 
#ifdef HAVE_WDAY
    result->tm_wday = (result->tm_yday + year_info[i+1].wday_offset) % 7;
#endif

    for (i = 0; i < 12; i++) {
      int8_t dpm = days_per_month[i];
      if (i == 1 && isleap) dpm++;
      if (days < dpm)
	break;
      days -= dpm;
    }
    result->tm_mon = i;
    result->tm_mday = 1 + days ;

    hour = seconds / 3600;
    seconds16 = seconds - hour * 3600;
    result->tm_hour = hour;
    min = seconds16 / 60;
    result->tm_sec = seconds16 - min * 60;
    result->tm_min = min;
    return result;
  }

  command error_t Time.gmtime(const time_t *timer, struct tm *ptm)
  {

    _time_t2tm(timer, 0, ptm); /* Can return NULL... */

    return SUCCESS;
  }

  /* Note: timezone locking is done by localtime_r. */

  static int tm_isdst(register const struct tm *__restrict ptm) {
    // no DST in arizona
    return 0;
  }
    
  command error_t Time.localtime(const time_t *timer, struct tm *result)
  {
    _time_t2tm(timer, 1, result);

    return SUCCESS;
  }
  static char *wday_name[] = { "Sun", "Mon", "Tues", "Wed", "Thur", "Fri", "Sat" };
  static char *mon_name[] = { "Jan", "Feb", "Mar", "Apr", "May", "Jun", "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" };
  command error_t Time.asctime(const struct tm *tm, char *buf, int buflen)
  {
    char *out = buf;
    char *outmax = buf + buflen;
    out += snprintf(out, outmax - out, "%02d:%02d:%02d",
		    tm->tm_hour, tm->tm_min, tm->tm_sec);
#ifdef HAVE_WDAY
    out += snprintf(out, outmax - out, " %s", wday_name[tm->tm_wday]);
#endif
    out += snprintf(out, outmax - out, " %s %d %d",
		    mon_name[tm->tm_mon], tm->tm_mday, tm->tm_year);
    return SUCCESS;
  }

  command error_t Time.time(time_t *timer)
  {
    // 1/32768 seconds since last NTP response
    uint64_t o = call LocalTime64.get() - g_local_time;

    *timer = g_current_time + (time_t)(o >> 15);
    
    return SUCCESS;
  }

  default event void Time.tick() { }

  /*****************************************
   *  ParamView interface
   * save for ip stack port to tos-2.x   

  const struct Param s_Time[] = {
    { "ntp time", PARAM_TYPE_UINT32, &g_current_time },
    { "local time", PARAM_TYPE_UINT32, &g_local_time },
    { NULL, 0, NULL }
  };

  struct ParamList g_TimeList = { "time", &s_Time[0] };

  command error_t ParamView.init()
  {
    signal ParamView.add( &g_TimeList );
    return SUCCESS;
  }
  *****************************************/

}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/chips/sd/integer.h000066400000000000000000000063611207233610700236340ustar00rootroot00000000000000/*-----------------------------------------------------------------------------/
/ FatFs module is an open source software to implement FAT file system to
/ small embedded systems. This is a free software and is opened for education,
/ research and commecial developments under license policy of following trems.
/
/  Copyright (C) 2009, ChaN, all right reserved.
/
/ * The FatFs module is a free software and there is NO WARRANTY.
/ * No restriction on use. You can use, modify and redistribute it for
/   personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
/ * Redistributions of source code must retain the above copyright notice.
/
/-----------------------------------------------------------------------------*/
/*
 * Portions of this code:
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * tinyos port from ChaN's FatFs (thank you!):
 *
 * @author Steve Ayer
 * @date   April, 2009
 * ported to tos-2.x (easy)
 * @date January, 2010
 */

#ifndef _INTEGER

// original typedefs converted to nesc stdint.h types for tos consistency
/* These types must be 16-bit, 32-bit or larger integer */
typedef int		INT;
typedef unsigned int    UINT;

/* These types must be 8-bit integer */
// had to change signed char typedef CHAR to SCHAR to avoid conflict with msp430 usart.h (#define CHAR  0x10)
typedef int8_t	SCHAR;
typedef uint8_t	UCHAR;
typedef uint8_t	BYTE;

/* These types must be 16-bit integer */
typedef int16_t		SHORT;
typedef uint16_t	USHORT;
typedef uint16_t	WORD;
typedef uint16_t	WCHAR;

/* These types must be 32-bit integer */
typedef long		LONG;
typedef unsigned long	ULONG;
typedef uint32_t	DWORD;

/* Boolean type */
//typedef enum { FALSE = 0, TRUE } BOOL;
typedef char BOOL;

#define _INTEGER
#endif
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/hardware.h000066400000000000000000000046351207233610700222620ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Definitions of stuff specific to the SAM3U-EK board.
 * Includes definitions for the SAM3U MCU.
 *
 * @author Wanja Hofer 
 */

#ifndef HARDWARE_H
#define HARDWARE_H

#include "sam3uhardware.h"

// #define this so we don't doubly define time_t with conflicting types
// in SD card implementation Time.h file
#define __time_t_defined
#include 

#ifndef PLATFORM_BAUDRATE
#define PLATFORM_BAUDRATE (9600)
#endif

#define IRQ_PRIO_UDPHS    (0x81)
#define IRQ_PRIO_TWI1     (0x82)
#define IRQ_PRIO_TWI0     (0x83)
#define IRQ_PRIO_DMAC     (0x84)
#define IRQ_PRIO_ADC12B   (0x85)
#define IRQ_PRIO_PIO      (0x86)
#define IRQ_PRIO_SPI      (0x87)
#define IRQ_PRIO_UART     (0x88)
#define IRQ_PRIO_USART0   (0x89)
#define IRQ_PRIO_USART1   (0x90)
#define IRQ_PRIO_USART2   (0x91)
#define IRQ_PRIO_HSMCI    (0x92)

#endif // HARDWARE_H
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/000077500000000000000000000000001207233610700210465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/Draw.nc000066400000000000000000000061611207233610700222710ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

interface Draw
{
    async command void fill(uint32_t color);

    async command void drawPixel(
            uint32_t x,
            uint32_t y,
            uint32_t c);

    async command void drawRectangle(
            uint32_t x,
            uint32_t y,
            uint32_t width,
            uint32_t height,
            uint32_t color);

    async command void drawString(
            uint32_t x,
            uint32_t y,
            const char *pString,
            uint32_t color);

    async command void drawStringWithBGColor(
            uint32_t x,
            uint32_t y,
            const char *pString,
            uint32_t fontColor,
            uint32_t bgColor);

    async command void drawInt(
            uint32_t x,
            uint32_t y,
            uint32_t n,
            int8_t sign,
            uint32_t fontColor);

    async command void drawIntWithBGColor(
            uint32_t x,
            uint32_t y,
            uint32_t n,
            int8_t sign,
            uint32_t fontColor,
            uint32_t bgColor);

    async command void getStringSize(
            const char *pString,
            uint32_t *pWidth,
            uint32_t *pHeight);

    async command void drawChar(
            uint32_t x,
            uint32_t y,
            char c,
            uint32_t color);

    async command void drawCharWithBGColor(
            uint32_t x,
            uint32_t y,
            char c,
            uint32_t fontColor,
            uint32_t bgColor);
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/Hx8347.nc000066400000000000000000000044641207233610700223050ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

interface Hx8347
{
    async command void writeReg(void *pLcdBase, uint8_t reg, uint16_t data);
    async command uint16_t readReg(void *pLcdBase, uint8_t reg);
    async command uint16_t readStatus(void *pLcdBase);
    async command void writeRAM_Prepare(void *pLcdBase);
    async command void writeRAM(void *pLcdBase, uint16_t color);
    async command uint16_t readRAM(void *pLcdBase);
    command void initialize(void *pLcdBase);
    event void initializeDone(error_t err);
    async command void setCursor(void *pLcdBase, uint16_t x, uint16_t y);
    command void on(void *pLcdBase);
    event void onDone();
    async command void off(void *pLcdBase);
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/Hx8347C.nc000066400000000000000000000350761207233610700224130ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

module Hx8347C
{
    uses
    {
        interface Timer as InitTimer;
        interface Timer as OnTimer;
    }

    provides interface Hx8347;
}
implementation
{

    typedef volatile uint16_t REG16;

    enum {
        INIT0,
        INIT1,
        INIT2,
    };
    uint8_t initState = INIT0;


    enum {
        ON0,
        ON1,
        ON2,
    };
    uint8_t onState = ON0;

    void* spLcdBase;

#define BOARD_LCD_RS     (1 << 1)
    // LCD index register address
#define LCD_IR(baseAddr) (*((REG16 *)(baseAddr)))
    // LCD status register address
#define LCD_SR(baseAddr) (*((REG16 *)(baseAddr)))
    // LCD data address
#define LCD_D(baseAddr)  (*((REG16 *)((uint32_t)(baseAddr) + BOARD_LCD_RS)))

    // HX8347 ID code
#define HX8347_HIMAXID_CODE    0x47

    // HX8347 LCD Registers
#define HX8347_R00H        0x00
#define HX8347_R01H        0x01
#define HX8347_R02H        0x02
#define HX8347_R03H        0x03
#define HX8347_R04H        0x04
#define HX8347_R05H        0x05
#define HX8347_R06H        0x06
#define HX8347_R07H        0x07
#define HX8347_R08H        0x08
#define HX8347_R09H        0x09
#define HX8347_R0AH        0x0A
#define HX8347_R0CH        0x0C
#define HX8347_R0DH        0x0D
#define HX8347_R0EH        0x0E
#define HX8347_R0FH        0x0F
#define HX8347_R10H        0x10
#define HX8347_R11H        0x11
#define HX8347_R12H        0x12
#define HX8347_R13H        0x13
#define HX8347_R14H        0x14
#define HX8347_R15H        0x15
#define HX8347_R16H        0x16
#define HX8347_R18H        0x18
#define HX8347_R19H        0x19
#define HX8347_R1AH        0x1A
#define HX8347_R1BH        0x1B
#define HX8347_R1CH        0x1C
#define HX8347_R1DH        0x1D
#define HX8347_R1EH        0x1E
#define HX8347_R1FH        0x1F
#define HX8347_R20H        0x20
#define HX8347_R21H        0x21
#define HX8347_R22H        0x22
#define HX8347_R23H        0x23
#define HX8347_R24H        0x24
#define HX8347_R25H        0x25
#define HX8347_R26H        0x26
#define HX8347_R27H        0x27
#define HX8347_R28H        0x28
#define HX8347_R29H        0x29
#define HX8347_R2AH        0x2A
#define HX8347_R2BH        0x2B
#define HX8347_R2CH        0x2C
#define HX8347_R2DH        0x2D
#define HX8347_R35H        0x35
#define HX8347_R36H        0x36
#define HX8347_R37H        0x37
#define HX8347_R38H        0x38
#define HX8347_R39H        0x39
#define HX8347_R3AH        0x3A
#define HX8347_R3BH        0x3B
#define HX8347_R3CH        0x3C
#define HX8347_R3DH        0x3D
#define HX8347_R3EH        0x3E
#define HX8347_R40H        0x40
#define HX8347_R41H        0x41
#define HX8347_R42H        0x42
#define HX8347_R43H        0x43
#define HX8347_R44H        0x44
#define HX8347_R45H        0x45
#define HX8347_R46H        0x46
#define HX8347_R47H        0x47
#define HX8347_R48H        0x48
#define HX8347_R49H        0x49
#define HX8347_R4AH        0x4A
#define HX8347_R4BH        0x4B
#define HX8347_R4CH        0x4C
#define HX8347_R4DH        0x4D
#define HX8347_R4EH        0x4E
#define HX8347_R4FH        0x4F
#define HX8347_R50H        0x50
#define HX8347_R51H        0x51
#define HX8347_R64H        0x64
#define HX8347_R65H        0x65
#define HX8347_R66H        0x66
#define HX8347_R67H        0x67
#define HX8347_R70H        0x70
#define HX8347_R72H        0x72
#define HX8347_R90H        0x90
#define HX8347_R91H        0x91
#define HX8347_R93H        0x93
#define HX8347_R94H        0x94
#define HX8347_R95H        0x95

    /**
     * Write data to LCD Register.
     * \param pLcdBase   LCD base address.
     * \param reg        Register address.
     * \param data       Data to be written.
     */
    async command void Hx8347.writeReg(void *pLcdBase, uint8_t reg, uint16_t data)
    {
        LCD_IR(pLcdBase) = reg;
        LCD_D(pLcdBase)  = data;
    }

    /**
     * Read data from LCD Register.
     * \param pLcdBase   LCD base address.
     * \param reg        Register address.
     * \return data      Data to be read.
     */
    async command uint16_t Hx8347.readReg(void *pLcdBase, uint8_t reg)
    {
        LCD_IR(pLcdBase) = reg;
        return LCD_D(pLcdBase);
    }

    /**
     * Read LCD status Register.
     * \param pLcdBase   LCD base address.
     * \param reg        Register address.
     * \return data      Status Data.
     */
    async command uint16_t Hx8347.readStatus(void *pLcdBase)
    {
        return LCD_SR(pLcdBase);
    }

    /**
     * Prepare to write GRAM data.
     * \param pLcdBase   LCD base address.
     */
    async command void Hx8347.writeRAM_Prepare(void *pLcdBase)
    {
        LCD_IR(pLcdBase) = HX8347_R22H;
    }

    /**
     * Write data to LCD GRAM.
     * \param pLcdBase   LCD base address.
     * \param color      16-bits RGB color.
     */
    async command void Hx8347.writeRAM(void *pLcdBase, uint16_t color)
    {
        // Write 16-bit GRAM Reg
        LCD_D(pLcdBase) = color;
    }

    /**
     * Read GRAM data.
     * \param pLcdBase   LCD base address.
     * \return           16-bits RGB color.
     */
    async command uint16_t Hx8347.readRAM(void *pLcdBase)
    {
        // Read 16-bit GRAM Reg
        return LCD_D(pLcdBase);
    }

    event void InitTimer.fired()
    {
        // advance in the initialization 
        call Hx8347.initialize(spLcdBase);
    }

    /**
     * Initialize the LCD controller.
     * \param pLcdBase   LCD base address.
     */
    command void Hx8347.initialize(void *pLcdBase)
    {
        uint16_t chipid;

        switch(initState)
        {
            case INIT0:
                spLcdBase = pLcdBase;

                // Check HX8347 chipid
                chipid = call Hx8347.readReg(pLcdBase, HX8347_R67H);
                if(chipid != HX8347_HIMAXID_CODE) {

                    // Read HX8347 chip ID error, skip initialization.
                    signal Hx8347.initializeDone(FAIL);
                    return ;
                }

                // Start internal OSC
                call Hx8347.writeReg(pLcdBase, HX8347_R19H, 0x49); // OSCADJ=10 0000, OSD_EN=1 //60Hz
                call Hx8347.writeReg(pLcdBase, HX8347_R93H, 0x0C); // RADJ=1100

                // Power on flow
                call Hx8347.writeReg(pLcdBase, HX8347_R44H, 0x4D); // VCM=100 1101
                call Hx8347.writeReg(pLcdBase, HX8347_R45H, 0x11); // VDV=1 0001
                call Hx8347.writeReg(pLcdBase, HX8347_R20H, 0x40); // BT=0100
                call Hx8347.writeReg(pLcdBase, HX8347_R1DH, 0x07); // VC1=111
                call Hx8347.writeReg(pLcdBase, HX8347_R1EH, 0x00); // VC3=000
                call Hx8347.writeReg(pLcdBase, HX8347_R1FH, 0x04); // VRH=0100

                call Hx8347.writeReg(pLcdBase, HX8347_R1CH, 0x04); // AP=100
                call Hx8347.writeReg(pLcdBase, HX8347_R1BH, 0x10); // GASENB=0, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0
                initState = INIT1;
                call InitTimer.startOneShot(50);
                break;

            case INIT1:

                call Hx8347.writeReg(pLcdBase, HX8347_R43H, 0x80); // Set VCOMG=1
                initState = INIT2;
                call InitTimer.startOneShot(50);
                break;

            case INIT2:

                // Gamma for CMO 2.8
                call Hx8347.writeReg(pLcdBase, HX8347_R46H, 0x95);
                call Hx8347.writeReg(pLcdBase, HX8347_R47H, 0x51);
                call Hx8347.writeReg(pLcdBase, HX8347_R48H, 0x00);
                call Hx8347.writeReg(pLcdBase, HX8347_R49H, 0x36);
                call Hx8347.writeReg(pLcdBase, HX8347_R4AH, 0x11);
                call Hx8347.writeReg(pLcdBase, HX8347_R4BH, 0x66);
                call Hx8347.writeReg(pLcdBase, HX8347_R4CH, 0x14);
                call Hx8347.writeReg(pLcdBase, HX8347_R4DH, 0x77);
                call Hx8347.writeReg(pLcdBase, HX8347_R4EH, 0x13);
                call Hx8347.writeReg(pLcdBase, HX8347_R4FH, 0x4C);
                call Hx8347.writeReg(pLcdBase, HX8347_R50H, 0x46);
                call Hx8347.writeReg(pLcdBase, HX8347_R51H, 0x46);

                //240x320 window setting
                call Hx8347.writeReg(pLcdBase, HX8347_R02H, 0x00); // Column address start2
                call Hx8347.writeReg(pLcdBase, HX8347_R03H, 0x00); // Column address start1
                call Hx8347.writeReg(pLcdBase, HX8347_R04H, 0x00); // Column address end2
                call Hx8347.writeReg(pLcdBase, HX8347_R05H, 0xEF); // Column address end1
                call Hx8347.writeReg(pLcdBase, HX8347_R06H, 0x00); // Row address start2
                call Hx8347.writeReg(pLcdBase, HX8347_R07H, 0x00); // Row address start1
                call Hx8347.writeReg(pLcdBase, HX8347_R08H, 0x01); // Row address end2
                call Hx8347.writeReg(pLcdBase, HX8347_R09H, 0x3F); // Row address end1

                // Display Setting
                call Hx8347.writeReg(pLcdBase, HX8347_R01H, 0x06); // IDMON=0, INVON=1, NORON=1, PTLON=0
                call Hx8347.writeReg(pLcdBase, HX8347_R16H, 0xC8); // MY=1, MX=1, MV=0, BGR=1
                call Hx8347.writeReg(pLcdBase, HX8347_R23H, 0x95); // N_DC=1001 0101
                call Hx8347.writeReg(pLcdBase, HX8347_R24H, 0x95); // P_DC=1001 0101
                call Hx8347.writeReg(pLcdBase, HX8347_R25H, 0xFF); // I_DC=1111 1111
                call Hx8347.writeReg(pLcdBase, HX8347_R27H, 0x06); // N_BP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R28H, 0x06); // N_FP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R29H, 0x06); // P_BP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R2AH, 0x06); // P_FP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R2CH, 0x06); // I_BP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R2DH, 0x06); // I_FP=0000 0110
                call Hx8347.writeReg(pLcdBase, HX8347_R3AH, 0x01); // N_RTN=0000, N_NW=001
                call Hx8347.writeReg(pLcdBase, HX8347_R3BH, 0x01); // P_RTN=0000, P_NW=001
                call Hx8347.writeReg(pLcdBase, HX8347_R3CH, 0xF0); // I_RTN=1111, I_NW=000
                call Hx8347.writeReg(pLcdBase, HX8347_R3DH, 0x00); // DIV=00
                call Hx8347.writeReg(pLcdBase, HX8347_R3EH, 0x38); // SON=38h
                call Hx8347.writeReg(pLcdBase, HX8347_R40H, 0x0F); // GDON=0Fh
                call Hx8347.writeReg(pLcdBase, HX8347_R41H, 0xF0); // GDOF=F0h
                initState = INIT0;
                signal Hx8347.initializeDone(SUCCESS);
                break;
        }
    }


    event void OnTimer.fired()
    {
        call Hx8347.on(spLcdBase);
    }
    /**
     * Turn on the LCD.
     * \param pLcdBase   LCD base address.
     */
    command void Hx8347.on(void *pLcdBase)
    {
        switch(onState)
        {
            case ON0:
                // Display ON Setting
                spLcdBase = pLcdBase;
                call Hx8347.writeReg(pLcdBase, HX8347_R90H, 0x7F); // SAP=0111 1111
                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x04); // GON=0, DTE=0, D=01
                call OnTimer.startOneShot(100);
                onState = ON1;
                break;

            case ON1:
                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x24); // GON=1, DTE=0, D=01
                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x2C); // GON=1, DTE=0, D=11
                call OnTimer.startOneShot(100);
                onState = ON2;
                break;

            case ON2:
                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x3C); // GON=1, DTE=1, D=11
                onState = ON0;
                signal Hx8347.onDone();
                break;
        }
    }

    /**
     * Turn off the LCD.
     * \param pLcdBase   LCD base address.
     */
    async command void Hx8347.off(void *pLcdBase)
    {
        call Hx8347.writeReg(pLcdBase, HX8347_R90H, 0x00); // SAP=0000 0000
        call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x00); // GON=0, DTE=0, D=00
    }

    /**
     * Set cursor of LCD srceen.
     * \param pLcdBase   LCD base address.
     * \param x          X-coordinate of upper-left corner on LCD.
     * \param y          Y-coordinate of upper-left corner on LCD.
     */
    async command void Hx8347.setCursor(void *pLcdBase, uint16_t x, uint16_t y)
    {
        uint8_t x1, x2, y1l, y2;

        x1 = x & 0xff;
        x2 = (x & 0xff00) >>8;
        y1l = y & 0xff;
        y2 = (y & 0xff00) >>8;
        call Hx8347.writeReg(pLcdBase, HX8347_R02H, x2); // column high
        call Hx8347.writeReg(pLcdBase, HX8347_R03H, x1); // column low
        call Hx8347.writeReg(pLcdBase, HX8347_R06H, y2); // row high
        call Hx8347.writeReg(pLcdBase, HX8347_R07H, y1l); // row low
    }

    default event void Hx8347.initializeDone(error_t err) {};
    default event void Hx8347.onDone() {};
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/Lcd.nc000066400000000000000000000036711207233610700221010ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

interface Lcd
{
    command void initialize();

    event void initializeDone(error_t err);

    command void * displayBuffer(void *pBuffer);
    
    command void start();

    event void startDone();
    
    command void stop();

    command void setBacklight (uint8_t step);
}

tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/LcdC.nc000066400000000000000000000062641207233610700222050ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/

configuration LcdC
{
    provides
    {
        interface Lcd;
        interface Draw;
    }
}
implementation
{
    
    components LcdP, Hx8347C;

    Lcd = LcdP.Lcd;
    Draw = LcdP.Draw;

    LcdP.Hx8347 -> Hx8347C;

    components new TimerMilliC() as T0;
    components new TimerMilliC() as T1;
    Hx8347C.InitTimer -> T0;
    Hx8347C.OnTimer -> T1;

    components HplSam3uGeneralIOC;
    LcdP.DB0 -> HplSam3uGeneralIOC.HplPioB9;
    LcdP.DB1 -> HplSam3uGeneralIOC.HplPioB10;
    LcdP.DB2 -> HplSam3uGeneralIOC.HplPioB11;
    LcdP.DB3 -> HplSam3uGeneralIOC.HplPioB12;
    LcdP.DB4 -> HplSam3uGeneralIOC.HplPioB13;
    LcdP.DB5 -> HplSam3uGeneralIOC.HplPioB14;
    LcdP.DB6 -> HplSam3uGeneralIOC.HplPioB15;
    LcdP.DB7 -> HplSam3uGeneralIOC.HplPioB16;
    LcdP.DB8 -> HplSam3uGeneralIOC.HplPioB25;
    LcdP.DB9 -> HplSam3uGeneralIOC.HplPioB26;
    LcdP.DB10 -> HplSam3uGeneralIOC.HplPioB27;
    LcdP.DB11 -> HplSam3uGeneralIOC.HplPioB28;
    LcdP.DB12 -> HplSam3uGeneralIOC.HplPioB29;
    LcdP.DB13 -> HplSam3uGeneralIOC.HplPioB30;
    LcdP.DB14 -> HplSam3uGeneralIOC.HplPioB31;
    LcdP.DB15 -> HplSam3uGeneralIOC.HplPioB6;

    LcdP.LCD_RS -> HplSam3uGeneralIOC.HplPioB8;
    LcdP.NRD    -> HplSam3uGeneralIOC.HplPioB19;
    LcdP.NWE    -> HplSam3uGeneralIOC.HplPioB23;
    LcdP.NCS2   -> HplSam3uGeneralIOC.HplPioC16;

    LcdP.Backlight -> HplSam3uGeneralIOC.PioC19;

    components HplSam3uClockC;
    LcdP.HSMC4ClockControl -> HplSam3uClockC.HSMC4PPCntl;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/LcdP.nc000066400000000000000000000425251207233610700222220ustar00rootroot00000000000000/**
 * Copyright (c) 2009 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Heavily inspired by the at91 library.
 * @author Thomas Schmid
 **/
#include 
#include "lcd.h"
#include "color.h"
#include "font.h"
#include "font10x14.h"

module LcdP
{
    uses {
        interface Hx8347;

        interface HplSam3GeneralIOPin as DB0;
        interface HplSam3GeneralIOPin as DB1;
        interface HplSam3GeneralIOPin as DB2;
        interface HplSam3GeneralIOPin as DB3;
        interface HplSam3GeneralIOPin as DB4;
        interface HplSam3GeneralIOPin as DB5;
        interface HplSam3GeneralIOPin as DB6;
        interface HplSam3GeneralIOPin as DB7;
        interface HplSam3GeneralIOPin as DB8;
        interface HplSam3GeneralIOPin as DB9;
        interface HplSam3GeneralIOPin as DB10;
        interface HplSam3GeneralIOPin as DB11;
        interface HplSam3GeneralIOPin as DB12;
        interface HplSam3GeneralIOPin as DB13;
        interface HplSam3GeneralIOPin as DB14;
        interface HplSam3GeneralIOPin as DB15;
        interface HplSam3GeneralIOPin as LCD_RS;
        interface HplSam3GeneralIOPin as NRD;
        interface HplSam3GeneralIOPin as NWE;
        interface HplSam3GeneralIOPin as NCS2;

        interface GeneralIO as Backlight;

        interface HplSam3PeripheralClockCntl as HSMC4ClockControl;
    }
    provides 
    {
        interface Lcd;
        interface Draw;
    }
}
implementation
{

#define RGB24ToRGB16(color) (((color >> 8) & 0xF800) | \
        ((color >> 5) & 0x7E0) | \
        ((color >> 3) & 0x1F))
#define BOARD_LCD_BASE   0x62000000

    const Font gFont = {10, 14};

    /**
     * Initializes the LCD controller.
     * \param pLcdBase   LCD base address.
     */
    command void Lcd.initialize(void)
    {
        // Enable pins
        call DB0.disablePioControl();
        call DB0.selectPeripheralA();
        call DB0.enablePullUpResistor();
        call DB1.disablePioControl();
        call DB1.selectPeripheralA();
        call DB1.enablePullUpResistor();
        call DB2.disablePioControl();
        call DB2.selectPeripheralA();
        call DB2.enablePullUpResistor();
        call DB3.disablePioControl();
        call DB3.selectPeripheralA();
        call DB3.enablePullUpResistor();
        call DB4.disablePioControl();
        call DB4.selectPeripheralA();
        call DB4.enablePullUpResistor();
        call DB5.disablePioControl();
        call DB5.selectPeripheralA();
        call DB5.enablePullUpResistor();
        call DB6.disablePioControl();
        call DB6.selectPeripheralA();
        call DB6.enablePullUpResistor();
        call DB7.disablePioControl();
        call DB7.selectPeripheralA();
        call DB7.enablePullUpResistor();
        call DB8.disablePioControl();
        call DB8.selectPeripheralA();
        call DB8.enablePullUpResistor();
        call DB9.disablePioControl();
        call DB9.selectPeripheralA();
        call DB9.enablePullUpResistor();
        call DB10.disablePioControl();
        call DB10.selectPeripheralA();
        call DB10.enablePullUpResistor();
        call DB11.disablePioControl();
        call DB11.selectPeripheralA();
        call DB11.enablePullUpResistor();
        call DB12.disablePioControl();
        call DB12.selectPeripheralA();
        call DB12.enablePullUpResistor();
        call DB13.disablePioControl();
        call DB13.selectPeripheralA();
        call DB13.enablePullUpResistor();
        call DB14.disablePioControl();
        call DB14.selectPeripheralA();
        call DB14.enablePullUpResistor();
        call DB15.disablePioControl();
        call DB15.selectPeripheralB();
        call DB15.enablePullUpResistor();
        call LCD_RS.disablePioControl();
        call LCD_RS.selectPeripheralB();
        call LCD_RS.enablePullUpResistor();
        call NRD.disablePioControl();
        call NRD.selectPeripheralA();
        call NRD.enablePullUpResistor();
        call NWE.disablePioControl();
        call NWE.selectPeripheralA();
        call NWE.enablePullUpResistor();
        call NCS2.disablePioControl();
        call NCS2.selectPeripheralA();
        call NCS2.enablePullUpResistor();

        // Enable peripheral clock
        call HSMC4ClockControl.enable();

        // Enable pins
        call Backlight.makeOutput();

        // EBI SMC Configuration
        SMC_CS2->setup.flat              = 0;
        SMC_CS2->setup.bits.nwe_setup    = 4;
        SMC_CS2->setup.bits.ncs_wr_setup = 2;
        SMC_CS2->setup.bits.nrd_setup    = 4;
        SMC_CS2->setup.bits.ncs_rd_setup = 2;

        SMC_CS2->pulse.flat              = 0;
        SMC_CS2->pulse.bits.nwe_pulse    = 5;
        SMC_CS2->pulse.bits.ncs_wr_pulse = 18;
        SMC_CS2->pulse.bits.nrd_pulse    = 5;
        SMC_CS2->pulse.bits.ncs_rd_pulse = 18;

        SMC_CS2->cycle.flat           = 0;
        SMC_CS2->cycle.bits.nwe_cycle = 22;
        SMC_CS2->cycle.bits.nrd_cycle = 22;

        SMC_CS2->mode.bits.read_mode = 1;
        SMC_CS2->mode.bits.write_mode = 1;
        SMC_CS2->mode.bits.dbw = 1;
        SMC_CS2->mode.bits.pmen = 0;

        // Initialize LCD controller (HX8347)
        call Hx8347.initialize((void *)BOARD_LCD_BASE);

    }

    event void Hx8347.initializeDone(error_t err)
    {
        if(err == SUCCESS)
            call Lcd.setBacklight(25);
        signal Lcd.initializeDone(err);
    }

    /**
     * Turn on the LCD
     */
    command void Lcd.start(void)
    {
        call Hx8347.on((void *)BOARD_LCD_BASE);
    }

    event void Hx8347.onDone()
    {
        signal Lcd.startDone();
    }

    /**
     * Turn off the LCD
     */
    command void Lcd.stop(void)
    {
        call Hx8347.off((void *)BOARD_LCD_BASE);
    }

    /**
     * Set the backlight of the LCD.
     * \param level   Backlight brightness level [1..32], 32 is maximum level.
     */
    command void Lcd.setBacklight (uint8_t level)
    {
        uint32_t i;

        // Switch off backlight
        call Backlight.clr();
        i = 800 * (48000000 / 1000000);    // wait for at least 500us
        while(i--);

        // Set new backlight level
        for (i = 0; i < level; i++) {


            call Backlight.clr();
            call Backlight.clr();
            call Backlight.clr();

            call Backlight.set();
            call Backlight.set();
            call Backlight.set();
        }
    }

    command void* Lcd.displayBuffer(void* pBuffer)
    {
        return (void *) BOARD_LCD_BASE;
    }

    /**
     * Fills the given LCD buffer with a particular color.
     * Only works in 24-bits packed mode for now.
     * \param color  Fill color.
     */
    async command void Draw.fill(uint32_t color)
    {
        uint32_t i;
        unsigned short color16 = RGB24ToRGB16(color);


        call Hx8347.setCursor((void *)BOARD_LCD_BASE, 0, 0);
        call Hx8347.writeRAM_Prepare((void *)BOARD_LCD_BASE);
        for (i = 0; i < (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++) {

            call Hx8347.writeRAM((void *)BOARD_LCD_BASE, color16);
        }
    }

    /**
     * Sets the specified pixel to the given color.
     * !!! Only works in 24-bits packed mode for now. !!!
     * \param x  X-coordinate of pixel.
     * \param y  Y-coordinate of pixel.
     * \param color  Pixel color.
     */
    async command void Draw.drawPixel(
            uint32_t x,
            uint32_t y,
            uint32_t color)
    {
        unsigned short color16 = RGB24ToRGB16(color);
        void* pBuffer = (void*)BOARD_LCD_BASE;

        call Hx8347.setCursor(pBuffer, x, y);
        call Hx8347.writeRAM_Prepare(pBuffer);
        call Hx8347.writeRAM(pBuffer, color16);
    }

    /**
     * Draws a rectangle inside a LCD buffer, at the given coordinates.
     * \param x  X-coordinate of upper-left rectangle corner.
     * \param y  Y-coordinate of upper-left rectangle corner.
     * \param width  Rectangle width in pixels.
     * \param height  Rectangle height in pixels.
     * \param color  Rectangle color.
     */
    async command void Draw.drawRectangle(
            uint32_t x,
            uint32_t y,
            uint32_t width,
            uint32_t height,
            uint32_t color)
    {
        uint32_t rx, ry;

        for (ry=0; ry < height; ry++) {

            for (rx=0; rx < width; rx++) {

                call Draw.drawPixel(x+rx, y+ry, color);
            }
        }
    }
    /**
     * Draws a string inside a LCD buffer, at the given coordinates. Line breaks
     * will be honored.
     * \param x  X-coordinate of string top-left corner.
     * \param y  Y-coordinate of string top-left corner.
     * \param pString  String to display.
     * \param color  String color.
     */
    async command void Draw.drawString(
            uint32_t x,
            uint32_t y,
            const char *pString,
            uint32_t color)
    {
        uint32_t xorg = x;

        while (*pString != 0) {
            if (*pString == '\n') {

                y += gFont.height + 2;
                x = xorg;
            }
            else {

                call Draw.drawChar(x, y, *pString, color);
                x += gFont.width + 2;
            }
            pString++;
        }
    }

    /**
     * Draws a string inside a LCD buffer, at the given coordinates. Line breaks
     * will be honored.
     * \param x  X-coordinate of string top-left corner.
     * \param y  Y-coordinate of string top-left corner.
     * \param pString  String to display.
     * \param color  String color.
     */
    async command void Draw.drawStringWithBGColor(
            uint32_t x,
            uint32_t y,
            const char *pString,
            uint32_t fontColor,
            uint32_t bgColor)
    {
        uint32_t xorg = x;

        while (*pString != 0) {
            if (*pString == '\n') {

                y += gFont.height + 2;
                x = xorg;
            }
            else {

                call Draw.drawCharWithBGColor(x, y, *pString, fontColor, bgColor);
                x += gFont.width + 2;
            }
            pString++;
        }
    }

    /**
     * Draws an integer inside the LCD buffer
     * \param x X-Coordinate of the integers top-right corner.
     * \param y Y-Coordinate of the integers top-right corner.
     * \param n Number to be printed on the screen
     * \param sign <0 if negative number, >=0 if positive
     * \param fontColor Integer color.
     */
    async command void Draw.drawInt(
            uint32_t x,
            uint32_t y,
            uint32_t n,
            int8_t sign,
            uint32_t fontColor)
    {
        uint8_t i;
        i = 0;
        do {       /* generate digits in reverse order */
            char c = n % 10 + '0';   /* get next digit */
            if (i%3 == 0 && i>0)
            {
                call Draw.drawChar(x, y, '\'', fontColor);
                x -= (gFont.width + 2);
            }
            call Draw.drawChar(x, y, c, fontColor);
            x -= (gFont.width + 2);
            i++;
        } while ((n /= 10) > 0);     /* delete it */
        if (sign < 0)
            call Draw.drawChar(x, y, '-', fontColor);
    }

    /**
     * Draws an integer inside the LCD buffer
     * \param x X-Coordinate of the integers top-right corner.
     * \param y Y-Coordinate of the integers top-right corner.
     * \param n Number to be printed on the screen
     * \param sign <0 if negative number, >=0 if positive
     * \param color Integer color.
     * \param bgColor Color of the background.
     */
    async command void Draw.drawIntWithBGColor(
            uint32_t x,
            uint32_t y,
            uint32_t n,
            int8_t sign,
            uint32_t fontColor,
            uint32_t bgColor)
    {
        uint8_t i;
        i = 0;
        do {       /* generate digits in reverse order */
            char c = n % 10 + '0';   /* get next digit */
            if (i%3 == 0 && i>0)
            {
                call Draw.drawChar(x, y, '\'', fontColor);
                x -= (gFont.width + 2);
            }
            call Draw.drawCharWithBGColor(x, y, c, fontColor, bgColor);
            x -= (gFont.width + 2);
            i++;
        } while ((n /= 10) > 0);     /* delete it */
        if (sign < 0)
            call Draw.drawCharWithBGColor(x, y, '-', fontColor, bgColor);
    }

    /**
     * Returns the width & height in pixels that a string will occupy on the screen
     * if drawn using Draw.drawString.
     * \param pString  String.
     * \param pWidth  Pointer for storing the string width (optional).
     * \param pHeight  Pointer for storing the string height (optional).
     * \return String width in pixels.
     */
    async command void Draw.getStringSize(
            const char *pString,
            uint32_t *pWidth,
            uint32_t *pHeight)
    {
        uint32_t width = 0;
        uint32_t height = gFont.height;

        while (*pString != 0) {

            if (*pString == '\n') {

                height += gFont.height + 2;
            }
            else {

                width += gFont.width + 2;
            }
            pString++;
        }

        if (width > 0) width -= 2;

        if (pWidth) *pWidth = width;
        if (pHeight) *pHeight = height;
    }

    /**
     * Draws an ASCII character on the given LCD buffer.
     * \param x  X-coordinate of character upper-left corner.
     * \param y  Y-coordinate of character upper-left corner.
     * \param c  Character to output.
     * \param color  Character color.
     */
    async command void Draw.drawChar(
            uint32_t x,
            uint32_t y,
            char c,
            uint32_t color)
    {
        uint32_t row, col;

        if(!((c >= 0x20) && (c <= 0x7F)))
        {
            return;
        }

        for (col = 0; col < 10; col++) {

            for (row = 0; row < 8; row++) {

                if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) {

                    call Draw.drawPixel(x+col, y+row, color);
                }
            }
            for (row = 0; row < 6; row++) {

                if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) {

                    call Draw.drawPixel(x+col, y+row+8, color);
                }
            }
        }
    }

    /**
     * Draws an ASCII character on the given LCD buffer.
     * \param x  X-coordinate of character upper-left corner.
     * \param y  Y-coordinate of character upper-left corner.
     * \param c  Character to output.
     * \param fontColor  Character foreground color.
     * \param bgColor Background color of character
     */
    async command void Draw.drawCharWithBGColor(
            uint32_t x,
            uint32_t y,
            char c,
            uint32_t fontColor,
            uint32_t bgColor)
    {
        uint32_t row, col;

        if(!((c >= 0x20) && (c <= 0x7F)))
        {
            return;
        }

        for (col = 0; col < 10; col++) {

            for (row = 0; row < 8; row++) {

                if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) {

                    call Draw.drawPixel(x+col, y+row, fontColor);
                } else {
                    call Draw.drawPixel(x+col, y+row, bgColor);
                }
            }
            for (row = 0; row < 6; row++) {

                if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) {

                    call Draw.drawPixel(x+col, y+row+8, fontColor);
                } else {
                    call Draw.drawPixel(x+col, y+row+8, bgColor);
                }
            }
        }
    }

}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/color.h000066400000000000000000000066251207233610700223460ustar00rootroot00000000000000/*
 * Copyright (c) Atmel
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef COLOR_H
#define COLOR_H

//------------------------------------------------------------------------------
/// RGB 24 Bpp
/// RGB 888
/// R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0
//------------------------------------------------------------------------------
#define COLOR_BLACK          0x000000
#define COLOR_WHITE          0xFFFFFF

#define COLOR_BLUE           0x0000FF
#define COLOR_GREEN          0x00FF00
#define COLOR_RED            0xFF0000

#define COLOR_NAVY           0x000080
#define COLOR_DARKBLUE       0x00008B
#define COLOR_DARKGREEN      0x006400
#define COLOR_DARKCYAN       0x008B8B
#define COLOR_CYAN           0x00FFFF
#define COLOR_TURQUOISE      0x40E0D0
#define COLOR_INDIGO         0x4B0082
#define COLOR_DARKRED        0x800000
#define COLOR_OLIVE          0x808000
#define COLOR_GRAY           0x808080
#define COLOR_SKYBLUE        0x87CEEB
#define COLOR_BLUEVIOLET     0x8A2BE2
#define COLOR_LIGHTGREEN     0x90EE90
#define COLOR_DARKVIOLET     0x9400D3
#define COLOR_YELLOWGREEN    0x9ACD32
#define COLOR_BROWN          0xA52A2A
#define COLOR_DARKGRAY       0xA9A9A9
#define COLOR_SIENNA         0xA0522D
#define COLOR_LIGHTBLUE      0xADD8E6
#define COLOR_GREENYELLOW    0xADFF2F
#define COLOR_SILVER         0xC0C0C0
#define COLOR_LIGHTGREY      0xD3D3D3
#define COLOR_LIGHTCYAN      0xE0FFFF
#define COLOR_VIOLET         0xEE82EE
#define COLOR_AZUR           0xF0FFFF
#define COLOR_BEIGE          0xF5F5DC
#define COLOR_MAGENTA        0xFF00FF
#define COLOR_TOMATO         0xFF6347
#define COLOR_GOLD           0xFFD700
#define COLOR_ORANGE         0xFFA500
#define COLOR_SNOW           0xFFFAFA
#define COLOR_YELLOW         0xFFFF00

#endif // #define COLOR_H






















































tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/font.h000066400000000000000000000040371207233610700221710ustar00rootroot00000000000000/*
 * Copyright (c) Atmel
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef FONT_H
#define FONT_H

//------------------------------------------------------------------------------
/// Describes the font (width, height, supported characters, etc.) used by
/// the LCD driver draw API.
//------------------------------------------------------------------------------
typedef struct _Font {

	/// Font width in pixels.
	unsigned char width;
	/// Font height in pixels.
	unsigned char height;

} Font;


#endif //#ifndef FONT_H
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/font10x14.h000066400000000000000000000330151207233610700226650ustar00rootroot00000000000000/*
 * Copyright (c) Atmel
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef LCD_FONT_10x14_H
#define LCD_FONT_10x14_H

//------------------------------------------------------------------------------
//         Definitions
//------------------------------------------------------------------------------

const unsigned char pCharset10x14[] = {
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC,
	0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00,
	0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0,
	0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0,
	0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC,
	0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0,
	0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0,
	0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18,
	0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC,
	0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00,
	0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78,
	0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18,
	0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00,
	0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8,
	0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60,
	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0,
	0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0,
	0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C,
	0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
	0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC,
	0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
	0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC,
	0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C,
	0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0,
	0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0,
	0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0,
	0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C,
	0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0,
	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC,
	0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00,
	0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
	0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C,
	0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0,
	0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC,
	0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0,
	0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00,
	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
	0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70,
	0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
	0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC,
	0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00,
	0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC,
	0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
	0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0,
	0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
	0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0,
	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
	0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00,
	0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0,
	0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C,
	0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
	0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00,
	0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
	0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00,
	0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
	0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00,
	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC,
	0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC,
	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80,
	0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C,
	0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
	0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0,
	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC,
	0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
	0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
	0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
	0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0,
	0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8,
	0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
	0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80,
	0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C,
	0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC,
	0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00,
	0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C,
	0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C,
	0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C,
	0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00,
	0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
	0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00,
	0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00,
	0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC,
	0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8,
	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C,
	0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0,
	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
	0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30,
	0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C,
	0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC,
	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC,
	0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90,
	0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00,
	0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
	0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0,
	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
	0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC,
	0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00,
	0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0,
	0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
	0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
	0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0,
	0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC,
	0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00,
	0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC,
	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
	0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0,
	0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
	0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00,
	0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC,
	0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00,
	0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00,
	0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
	0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30,
	0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8,
	0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00,
	0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
	0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
	0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0,
	0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8,
	0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
	0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0,
	0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C,
	0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8,
	0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00,
	0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC,
	0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C,
	0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8,
	0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00,
	0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C,
	0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C,
	0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C,
	0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
	0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC,
	0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC
};


#endif // #ifdef _LCD_FONT_10x14_h
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/lcd/lcd.h000066400000000000000000000032451207233610700217650ustar00rootroot00000000000000/*
 * Copyright (c) 2011 University of Utah
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of its
 *   contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
 * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
 * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _LCD_H
#define _LCD_H


#define BOARD_LCD_HEIGHT 320
#define BOARD_LCD_WIDTH  240


#endif //_LCD_H

tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/platform.h000066400000000000000000000002151207233610700222770ustar00rootroot00000000000000/* No platform_bootstrap() needed,
 * since memory system doesn't need configuration and
 * the processor mode neither.
 * (see TEP 107)
 */
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/platform_message.h000066400000000000000000000036241207233610700240120ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Wanja Hofer 
 */

#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include "Serial.h"

typedef union message_header
{
	serial_header_t serial;
} message_header_t;

typedef union message_footer
{
} message_footer_t;

typedef union message_metadata
{
	serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/sam3u-ek-flash-mp.x000066400000000000000000000137601207233610700236360ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Linker script to run code in Flash 0.
 * Variant that aligns and collects symbols for memory protection.
 * Start-up code copies data into SRAM 0 and zeroes BSS segment.
 *
 * @author Wanja Hofer 
 */

/* Output format is always little endian, irrespective of -EL or -EB flags */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/* Output architecture is ARM */
OUTPUT_ARCH(arm)
/* The first program instruction is the __init() start-up code */
ENTRY(__init)

/* The IRQ vector table is put at the beginning of SRAM 0 */
/* We reserve 0x100 bytes by setting the SRAM 0 base address below accordingly */
_vect_start = 0x20000000;

/* Stack at the end of SRAM 0 */
_estack = 0x20007ffc;

/* We have the SAM3U4E with 2 x 128K Flash and 48K SRAM.
 * SRAM is 32K SRAM 0 and 16K SRAM 1.
 * Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 2, p. 28, p. 29 */
MEMORY
{
	sram0  (W!RX) : org = 0x20000100, len = 0x07f00 /* SRAM 0, 32K (- 0x100 vector table) */
	sram1  (W!RX) : org = 0x20080000, len = 0x04000 /* SRAM 1, 16K */
	flash0 (W!RX) : org = 0x00080000, len = 0x20000 /* Flash 0, 128K */
	flash1 (W!RX) : org = 0x00100000, len = 0x20000 /* Flash 1, 128K */
}

SECTIONS
{
	/* Text is linked into Flash 0 */
	.text :
	{
		. = ALIGN(4);
		_stext = .;
		KEEP(*(.vectors))

		. = ALIGN(0x400);
		_stextcommon = .;
		*(.textcommon*)
		. = ALIGN(0x400);
		_etextcommon = .;

		. = ALIGN(0x200);
		_stextthread0 = .;
		*(.text.ThreadInfoP$0$run_thread)
		/* this will collect the definition of the thread's run() event in the app component */
		*(.text.*$Thread0$run)
		*(.text.TestJoinC$NullThread$run)
		*(.text.BlinkC$NullThread$run)
		. = ALIGN(0x200);
		_etextthread0 = .;

		. = ALIGN(0x200);
		_stextthread1 = .;
		*(.text.ThreadInfoP$1$run_thread)
		/* this will collect the definition of the thread's run() event in the app component */
		*(.text.*$Thread1$run)
		*(.text.TestJoinC$TinyThread0$run)
		*(.text.BlinkC$TinyThread0$run)
		. = ALIGN(0x200);
		_etextthread1 = .;

		. = ALIGN(0x200);
		_stextthread2 = .;
		*(.text.ThreadInfoP$2$run_thread)
		/* this will collect the definition of the thread's run() event in the app component */
		*(.text.*$Thread2$run)
		*(.text.TestJoinC$TinyThread1$run)
		*(.text.BlinkC$TinyThread1$run)
		. = ALIGN(0x200);
		_etextthread2 = .;

		. = ALIGN(0x200);
		_stextthread3 = .;
		*(.text.ThreadInfoP$3$run_thread)
		/* this will collect the definition of the thread's run() event in the app component */
		*(.text.*$Thread3$run)
		*(.text.TestJoinC$TinyThread2$run)
		*(.text.BlinkC$TinyThread2$run)
		. = ALIGN(0x200);
		_etextthread3 = .;

		*(.text*)
		*(.rodata*)
		*(.glue_7) /* ARM/Thumb interworking code */
		*(.glue_7t) /* ARM/Thumb interworking code */
		. = ALIGN(4);
		_etext = .;
	} > flash0

	/* Data will be loaded into RAM by start-up code */
	.data : AT (_etext)
	{
		. = ALIGN(4);
		_sdata = .;

		. = ALIGN(0x200);
		_sdatathread0 = .;
		*(.datathread0*)
		. = ALIGN(0x200);
		_edatathread0 = .;

		. = ALIGN(0x200);
		_sdatathread1 = .;
		*(.datathread1*)
		. = ALIGN(0x200);
		_edatathread1 = .;

		. = ALIGN(0x200);
		_sdatathread2 = .;
		*(.datathread2*)
		. = ALIGN(0x200);
		_edatathread2 = .;

		. = ALIGN(0x200);
		_sdatathread3 = .;
		*(.datathread3*)
		. = ALIGN(0x200);
		_edatathread3 = .;

		*(.ramfunc) /* functions linked into RAM */
		*(.data.*)
		*(.data)
		. = ALIGN(4);
		_edata = .;
	} > sram0

	/* BSS will be zeroed by start-up code */
	.bss (NOLOAD) :
	{
		. = ALIGN(4);
		_sbss = .;

		. = ALIGN(0x1000);
		_sbssthread0 = .;
		*(.bss.ThreadInfoP$0$stack)
		*(.bss.ThreadInfoP$0$thread_info)
		*(.bssthread0*)
		. = ALIGN(0x1000);
		_ebssthread0 = .;

		. = ALIGN(0x1000);
		_sbssthread1 = .;
		*(.bss.ThreadInfoP$1$stack)
		*(.bss.ThreadInfoP$1$thread_info)
		*(.bssthread1*)
		. = ALIGN(0x1000);
		_ebssthread1 = .;

		. = ALIGN(0x1000);
		_sbssthread2 = .;
		*(.bss.ThreadInfoP$2$stack)
		*(.bss.ThreadInfoP$2$thread_info)
		*(.bssthread2*)
		. = ALIGN(0x1000);
		_ebssthread2 = .;

		. = ALIGN(0x1000);
		_sbssthread3 = .;
		*(.bss.ThreadInfoP$3$stack)
		*(.bss.ThreadInfoP$3$thread_info)
		*(.bssthread3*)
		. = ALIGN(0x1000);
		_ebssthread3 = .;

		*(.bss.*)
		*(.bss)
		. = ALIGN(4);
	} > sram0
	/* _ebss should be inside .bss, but for some reason, it then is not defined
	 * at the end of the BSS section. This leads to non-zeroed BSS data, since the
	 * start-up code uses that symbol. For now, this workaround is OK and does no
	 * harm.
	 */
	_ebss = .;
}
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/sam3u-ek-flash.x000066400000000000000000000075701207233610700232260ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Linker script to run code in Flash 0.
 * Start-up code copies data into SRAM 0 and zeroes BSS segment.
 *
 * @author Wanja Hofer 
 * @author Thomas Schmid
 */

/* Output format is always little endian, irrespective of -EL or -EB flags */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/* Output architecture is ARM */
OUTPUT_ARCH(arm)
/* The first program instruction is the __init() start-up code */
ENTRY(__init)

/* The IRQ vector table is put at the beginning of SRAM 0 */
/* We reserve 0x100 bytes by setting the SRAM 0 base address below accordingly */
_vect_start = 0x20000000;

/* Stack at the end of SRAM 0 */
_estack = 0x20007ffc;

/* Don't relocate the vector table */
/*PROVIDE (__relocate_vector = 0);*/

/* We have the SAM3U4E with 2 x 128K Flash and 48K SRAM.
 * SRAM is 32K SRAM 0 and 16K SRAM 1.
 * Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 2, p. 28, p. 29 */
MEMORY
{
	sram0  (W!RX) : org = 0x20000000, len = 0x08000 /* SRAM 0, 32K (- 0x100 vector table) */
	sram1  (W!RX) : org = 0x20080000, len = 0x04000 /* SRAM 1, 16K */
	flash0 (W!RX) : org = 0x00080000, len = 0x20000 /* Flash 0, 128K */
	flash1 (W!RX) : org = 0x00100000, len = 0x20000 /* Flash 1, 128K */
}

SECTIONS
{
	/* Text is linked into Flash 0 */
	.text :
	{
		. = ALIGN(4);
		_stext = .;
        /* KEEP(*(.boot*)) */
        KEEP(*(.vectors))
        *(.init*)
		*(.text*)
        *(.fini*)
		*(.rodata*)
		*(.glue_7) /* ARM/Thumb interworking code */
		*(.glue_7t) /* ARM/Thumb interworking code */
		. = ALIGN(4);
		_etext = .;
	} > flash0

	/* Data will be loaded into RAM by start-up code */
	.data : AT (_etext)
	{
		. = ALIGN(4);
		_sdata = .;
        _svect = .;
        KEEP(*(.vectors)) /* Interrupt vector table in first 204 bytes */
        _evect = .;
		*(.ramfunc) /* functions linked into RAM */
		*(.data.*)
		*(.data)
		. = ALIGN(4);
		_edata = .;
	} > sram0

	/* BSS will be zeroed by start-up code */
	.bss (NOLOAD) : {
		. = ALIGN(4);
		_sbss = .;
		*(.bss.*)
		*(.bss)
		. = ALIGN(4);
	} > sram0
	/* _ebss should be inside .bss, but for some reason, it then is not defined
	 * at the end of the BSS section. This leads to non-zeroed BSS data, since the
	 * start-up code uses that symbol. For now, this workaround is OK and does no
	 * harm.
	 */
	_ebss = .;
}
end = .;
tinyos-2.1.2+dfsg/tos/platforms/sam3u_ek/vectors.c000066400000000000000000000232201207233610700221340ustar00rootroot00000000000000/*
 * Copyright (c) 2009 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Startup code and interrupt and trap handlers for the SAM3U-EK board.
 *
 * @author Wanja Hofer 
 */

/* Section symbols defined in linker script
 * sam3u-ek-flash.x
 */
extern unsigned int _stext;
extern unsigned int _etext;
extern unsigned int _sdata;
extern unsigned int _edata;
extern unsigned int _svect;
extern unsigned int _evect;
extern unsigned int _sbss;
extern unsigned int _ebss;
extern unsigned int _estack;
extern unsigned int __relocate_vector;

/* main() symbol defined in RealMainP
 */
int main();

/* Start-up code called upon reset.
 * Definition see below.
 */
void __init();

/* Default handler for any IRQ or fault
 */
void DefaultHandler()
{
	// do nothing, just return
}

/* Default Hardfault Handler
 */
void DefaultHardFaultHandler()
{
    while(1) {}
}

/* Default Mpu Fault Handler
 */
void DefaultMpuFaultHandler()
{
    while(1) {}
}

/* Default Bus Fault Handler
 */
void DefaultBusFaultHandler()
{
    while(1) {}
}

/* Default Usage Fault Handler
 */
void DefaultUsageFaultHandler()
{
    while(1) {}
}

/* By default, every exception and IRQ is handled by the default handler.
 *
 * If OWN_FUNCTIONS_FOR_HANDLERS is defined, then the internal IRQ and fault
 * handlers will get a function of their own for debug purposes. Those
 * functions are provided by weak aliases; thus, a regular handler
 * definition will override this.
 */
#define OWN_FUNCTION_FOR_HANDLERS

#ifdef OWN_FUNCTION_FOR_HANDLERS
void NmiHandler() __attribute__((weak));
void MpuFaultHandler() __attribute__((weak));
void BusFaultHandler() __attribute__((weak));
void UsageFaultHandler() __attribute__((weak));
void SVCallHandler() __attribute__((weak));
void DebugHandler() __attribute__((weak));
void PendSVHandler() __attribute__((weak));
void SysTickHandler() __attribute__((weak));
void NmiHandler() { while(1) {} }
void MpuFaultHandler() { while(1) {} }
void BusFaultHandler() { while(1) {} }
void UsageFaultHandler() { while(1) {} }
void SVCallHandler() { while(1) {} }
void DebugHandler() { while(1) {} }
void PendSVHandler() { while(1) {} }
void SysTickHandler() { while(1) {} }
#else
void NmiHandler() __attribute__((weak, alias("DefaultHandler")));
void MpuFaultHandler() __attribute__((weak, alias("DefaultHandler")));
void BusFaultHandler() __attribute__((weak, alias("DefaultHandler")));
void UsageFaultHandler() __attribute__((weak, alias("DefaultHandler")));
void SVCallHandler() __attribute__((weak, alias("DefaultHandler")));
void DebugHandler() __attribute__((weak, alias("DefaultHandler")));
void PendSVHandler() __attribute__((weak, alias("DefaultHandler")));
void SysTickHandler() __attribute__((weak, alias("DefaultHandler")));
#endif

void HardFaultHandler() __attribute__((weak, alias("DefaultHardFaultHandler")));

void SupcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void RstcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void RtcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void RttIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void WdtIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PmcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Eefc0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Eefc1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void UartIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void SmcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PioAIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PioBIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PioCIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Usart0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Usart1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Usart2IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Usart3IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void HsmciIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Twi0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Twi1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void SpiIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void SscIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void TC2IrqHandler() __attribute__((weak, alias("DefaultHandler")));
void PwmIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void Adc12BIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void AdcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void DmacIrqHandler() __attribute__((weak, alias("DefaultHandler")));
void UdphsIrqHandler() __attribute__((weak, alias("DefaultHandler")));


/* Stick at the top of the .text section in final binary so we can always
 *    jump back to the init routine at the top of the stack if we want */
__attribute__((section(".boot"))) unsigned int *__boot[] = {
    &_estack,
    (unsigned int *) __init,
};


__attribute__((section(".vectors"))) unsigned int *__vectors[] = {
	// Defined by Cortex-M3
	// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 78
	// See also The Definitive Guide to the ARM Cortex-M3, p. 331
	&_estack,
	(unsigned int *) __init,
    (unsigned int *) NmiHandler,
    (unsigned int *) HardFaultHandler,
    (unsigned int *) MpuFaultHandler,
    (unsigned int *) BusFaultHandler,
	(unsigned int *) UsageFaultHandler,
	(unsigned int *) 0, // Reserved
	(unsigned int *) 0, // Reserved
	(unsigned int *) 0, // Reserved
	(unsigned int *) 0, // Reserved
	(unsigned int *) SVCallHandler,
	(unsigned int *) DebugHandler,
	(unsigned int *) 0, // Reserved
	(unsigned int *) PendSVHandler,
	(unsigned int *) SysTickHandler,
	// Defined by SAM3U MCU
	// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 41
	(unsigned int *) SupcIrqHandler,
	(unsigned int *) RstcIrqHandler,
	(unsigned int *) RtcIrqHandler,
	(unsigned int *) RttIrqHandler,
	(unsigned int *) WdtIrqHandler,
	(unsigned int *) PmcIrqHandler,
	(unsigned int *) Eefc0IrqHandler,
	(unsigned int *) Eefc1IrqHandler,
	(unsigned int *) UartIrqHandler,
	(unsigned int *) SmcIrqHandler,
	(unsigned int *) PioAIrqHandler,
	(unsigned int *) PioBIrqHandler,
	(unsigned int *) PioCIrqHandler,
	(unsigned int *) Usart0IrqHandler,
	(unsigned int *) Usart1IrqHandler,
	(unsigned int *) Usart2IrqHandler,
	(unsigned int *) Usart3IrqHandler,
	(unsigned int *) HsmciIrqHandler,
	(unsigned int *) Twi0IrqHandler,
	(unsigned int *) Twi1IrqHandler,
	(unsigned int *) SpiIrqHandler,
	(unsigned int *) SscIrqHandler,
	(unsigned int *) TC0IrqHandler,
	(unsigned int *) TC1IrqHandler,
	(unsigned int *) TC2IrqHandler,
	(unsigned int *) PwmIrqHandler,
	(unsigned int *) Adc12BIrqHandler,
	(unsigned int *) AdcIrqHandler,
	(unsigned int *) DmacIrqHandler,
	(unsigned int *) UdphsIrqHandler
};

/* Start-up code to copy data into RAM
 * and zero BSS segment
 * and call main()
 * and "exit"
 */
void __init()
{
	unsigned int *from;
	unsigned int *to;
	unsigned int *i;
	volatile unsigned int *NVIC_VTOFFR = (volatile unsigned int *) 0xe000ed08;

    if(0 && __relocate_vector)
    {
        // Configure location of IRQ vector table
        // Vector table is in the beginning of text segment / Flash 0
        i = (unsigned int *) &_svect;
        *NVIC_VTOFFR = (unsigned int) i;
        // Set TBLBASE bit since vector table located in SRAM
        *NVIC_VTOFFR |= (1 << 29);
    }

	// Copy pre-initialized data into RAM.
	// Data lies in Flash after the text segment (_etext),
	// but is linked to be at _sdata.
	// Thus, we have to copy it to that place in RAM.
	from = &_etext;
	to = &_sdata;
	while (to < &_edata) {
		*to = *from;
		to++;
		from++;
	}

	// Fill BSS data with 0
	i = &_sbss;
	while (i < &_ebss) {
		*i = 0;
		i++;
	}

    /*
	// Configure location of IRQ vector table
	// Vector table is in the beginning of text segment / Flash 0
	i = (unsigned int *) &_stext;
	// TBLBASE bit is automatically 0 -> table in code space
	*NVIC_VTOFFR = (unsigned int) i;
    */

	// Call main()
	main();

	// "Exit"
	while (1);
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/000077500000000000000000000000001207233610700202415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/.platform000066400000000000000000000042231207233610700220670ustar00rootroot00000000000000# SHIMMER - platform includes
# Konrad Lorincz 5/14/08
#
# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.

push( @includes, qw(

      .
  %T/platforms/shimmer
  %T/platforms/shimmer/chips/cc2420
  %T/platforms/shimmer/chips/mma7260
  %T/platforms/shimmer/chips/sd
  %T/platforms/shimmer/chips/sd/fatfs
  %T/platforms/shimmer/chips/bluetooth
  %T/platforms/shimmer/chips/msp430
  %T/platforms/shimmer/chips/ds2411
  %T/platforms/shimmer/chips/gsr
  %T/platforms/shimmer/chips/rmcm01
  %T/platforms/shimmer2/chips/gyro
  %T/chips/cc2420
  %T/chips/cc2420/alarm
  %T/chips/cc2420/control
  %T/chips/cc2420/csma
  %T/chips/cc2420/interfaces
  %T/chips/cc2420/link
  %T/chips/cc2420/lowpan
  %T/chips/cc2420/lpl
  %T/chips/cc2420/packet
  %T/chips/cc2420/receive
  %T/chips/cc2420/spi
  %T/chips/cc2420/transmit
  %T/chips/cc2420/unique
  %T/chips/cc2420/security
  %T/chips/msp430
  %T/chips/msp430/adc12
  %T/chips/msp430/dma
  %T/chips/msp430/pins
  %T/chips/msp430/timer
  %T/chips/msp430/usart
  %T/chips/msp430/sensors
  %T/lib/timer
  %T/lib/serial
  %T/lib/adc
  %T/lib/power
  ) );

@opts = qw(

  -gcc=msp430-gcc
  -mmcu=msp430f1611
  -fnesc-target=msp430
  -fnesc-no-debug
);

push @opts, "-mdisable-hwmul" if `msp430-gcc --version | grep 3.2.3`;
push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

$ENV{'CIL_MACHINE'} =
    "version_major=3 " .
    "version_minor=2 " .
    "version=msp430-3.2.3 " .
    "short=2,2 " .
    "int=2,2 " .
    "long=4,2 " .
    "long_long=8,2 " .
    "pointer=2,2 " .
    "enum=2,2 " .
    "float=4,2 " .
    "double=4,2 " .
    "long_double=4,2 " .
    "void=1,1 " .
    "fun=1,2 " .
    "wchar_size_size=2,2 " .
    "alignof_string=1 " .
    "max_alignment=1 " .
    "char_wchar_signed=true,true " .
    "const_string_literals=true " .
    "big_endian=false " .
    "underscore_name=false " .
    "__builtin_va_list=true " .
    "__thread_is_keyword=true";
tinyos-2.1.2+dfsg/tos/platforms/shimmer/ActiveMessageC.nc000066400000000000000000000061501207233610700234100ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Philip Levis
 * Date last modified:  $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:54 scipio Exp $
 *
 */
/**
 * The Active Message layer on the SHIMMER platform. This is a naming wrapper
 * around the CC2420 Active Message layer.
 *
 * @author Konrad Lorincz
 */
#include "Timer.h"

configuration ActiveMessageC {
  provides {
    interface SplitControl;

    interface AMSend[uint8_t id];
    interface Receive[uint8_t id];
    interface Receive as Snoop[uint8_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;
    interface LowPowerListening;
  }
}
implementation {
  components CC2420ActiveMessageC as AM;

  SplitControl = AM;
  
  AMSend       = AM;
  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/Counter32khz64C.nc000066400000000000000000000045601207233610700233460ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Counter32khz32C provides at 32-bit counter at 32768 ticks per second.
 *
 * @author Cory Sharp 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

/*
 * arguments table for convenience:
  typedef to_precision_tag,
  typedef to_size_type @integer(),
  typedef from_precision_tag,
  typedef from_size_type @integer(),
  uint8_t bit_shift_right,
  typedef upper_count_type @integer()) @safe()
*/
configuration Counter32khz64C
{
  provides interface Counter;
}
implementation
{
  components Msp430Counter32khzC as CounterFrom;
  components new TransformCounterC(T32khz,uint64_t,T32khz,uint16_t,0,uint64_t) as Transform;

  Counter = Transform;

  Transform.CounterFrom -> CounterFrom;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/CounterMicro32C.nc000066400000000000000000000042101207233610700234410ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * CounterMicro32C provides at 32-bit counter at 1024000 ticks per second.
 *
 * @author Cory Sharp 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */
    
configuration CounterMicro32C
{
  provides interface Counter;
}
implementation
{
  components Msp430CounterMicroC as CounterFrom;
  components new TransformCounterC(TMicro,uint32_t,TMicro,uint16_t,0,uint16_t) as Transform;

  Counter = Transform.Counter;

  Transform.CounterFrom -> CounterFrom;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/CounterMilli64C.nc000066400000000000000000000042051207233610700234470ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * CounterMilli32C provides at 32-bit counter at 1024 ticks per second.
 *
 * @author Cory Sharp 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */
    
configuration CounterMilli64C
{
  provides interface Counter;
}
implementation
{
  components Msp430Counter32khzC as CounterFrom;
  components new TransformCounterC(TMilli,uint64_t,T32khz,uint16_t,5,uint32_t) as Transform;

  Counter = Transform.Counter;

  Transform.CounterFrom -> CounterFrom;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/CounterToLocalTime64C.nc000066400000000000000000000043761207233610700245660ustar00rootroot00000000000000//$Id: CounterToLocalTime64C.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "Timer.h"

/**
 * CounterToLocalTimeC converts a 32-bit LocalTime to a Counter.  
 *
 * 
      See TEP102 for more details.
 * @param precision_tag A type indicating the precision of the LocalTime and
 * Counter being converted.
 *
 * @author Cory Sharp 
 */

generic module CounterToLocalTime64C(typedef precision_tag) @safe()
{
  provides interface LocalTime64;
  uses interface Counter;
}
implementation
{
  async command uint64_t LocalTime64.get()
  {
    return call Counter.get();
  }

  async event void Counter.overflow()
  {
  }
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/DemoSensorC.nc000066400000000000000000000044241207233610700227500ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorC on the telosb platform provides a
 * voltage reading, using VoltageC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:24 $
 * 
 */

generic configuration DemoSensorC()
{
  provides interface Read;
}
implementation
{
  components new VoltageC() as DemoSensor;
  Read = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/DemoSensorNowC.nc000066400000000000000000000046341207233610700234370ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorNowC is a generic sensor device that provides a 16-bit
 * value that can be read from async context. The platform author
 * chooses which sensor actually sits behind DemoSensorNowC, and
 * though it's probably Voltage, Light, or Temperature, there are no
 * guarantees.
 *
 * This particular DemoSensorNowC on the telosb platform provides a
 * voltage reading, using VoltageC.
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $ $Date: 2008-06-24 22:25:57 $
 * 
 */

generic configuration DemoSensorNowC()
{
  provides interface Resource;
  provides interface ReadNow;
}
implementation
{
  components new Msp430InternalVoltageC() as DemoSensorNow;

  Resource = DemoSensorNow;
  ReadNow = DemoSensorNow;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/DemoSensorStreamC.nc000066400000000000000000000045041207233610700241230ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorStreamC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorStreamC on the telosb platform provides a
 * voltage reading, using VoltageStreamC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $ $Date: 2008-06-24 22:25:57 $
 * 
 */

generic configuration DemoSensorStreamC()
{
  provides interface ReadStream;
}
implementation
{
  components new VoltageStreamC() as DemoSensor;
  ReadStream = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/HostTime.nc000066400000000000000000000035231207233610700223220ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   June 2010
 */

interface HostTime {
  /*
   * this should be used to begin execution of applications 
   * that require a host-based timestamp sent via serial line
   */
  event void timeAndZoneSet(char * g_timestring);

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/HostTimeC.nc000066400000000000000000000040211207233610700224170ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   September, 2010
 */

configuration HostTimeC {
  provides{
    interface HostTime;
    interface Init;
  }
}

implementation { 
  components HostTimeP;
  Init = HostTimeP;
  HostTime = HostTimeP;

  components TimeC, HplMsp430Usart0C;
  HostTimeP.UARTControl     -> HplMsp430Usart0C.HplMsp430Usart;
  HostTimeP.UARTData        -> HplMsp430Usart0C.HplMsp430UsartInterrupts;
  HostTimeP.Time            -> TimeC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/HostTimeP.nc000066400000000000000000000131441207233610700224420ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   June 2010
 */

#include "msp430usart.h"

module HostTimeP {
  provides { 
    interface Init;
    interface HostTime;
  }
  uses {
    interface Time;
    interface HplMsp430Usart as UARTControl;
    interface HplMsp430UsartInterrupts as UARTData;
  }
}

implementation {
  enum {
    NONE,
    TIMEBYTE_32,
    TIMEBYTE_24,
    TIMEBYTE_16,
    TIMEBYTE_8,
    YEARBYTE_32,
    YEARBYTE_24,
    YEARBYTE_16,
    YEARBYTE_8,
    ZERODAY,
    DST_FDAY1,
    DST_FDAY0,
    DST_LDAY1,
    DST_LDAY0,
    YEAR1,
    YEAR0,
    DONE
  };

  struct tm g_tm;
  time_t g_host_time = 0, g_year_time;
  uint8_t byte3, byte2, byte1, byte0, byte7, byte6, byte5, byte4, byte9, byte8, byte10, byte11, byte12, byte14, byte13;
  uint8_t sync_state, g_zero_day, toSend, charsSent;
  uint16_t g_dst_fday, g_dst_lday, g_year;
  char g_timestring[128];
  bool transmissionComplete;

  void setupUART() {
    /*
     * NOTE:  this sets the baudrate based upon a 4mhz SMCLK given by the 8mhz xt clock config
     * to run at the default msp430 clock settings, use _1MHZ_ for these two flags
     */
    msp430_uart_union_config_t RN_uart_config = { {ubr: UBR_4MHZ_115200, umctl: UMCTL_4MHZ_115200, 
						   ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1,listen: 0, 
						   mm: 0, ckpl: 0, urxse: 0, urxeie: 0, 
						   urxwie: 0, utxe : 1, urxe :1} };

    call UARTControl.setModeUart(&RN_uart_config); // set to UART mode

    call UARTControl.enableTxIntr();
    call UARTControl.enableRxIntr();
  }

  command error_t Init.init(){
    sync_state = NONE;

    setupUART();

    return SUCCESS;
  }

  task void assemble_timestamp() {
    time_t time_now;

    g_host_time = byte3;
    g_host_time = g_host_time << 24;
    g_host_time = (g_host_time >> 16 | byte2) << 16;
    g_host_time = (g_host_time >> 8 | byte1) << 8;
    g_host_time = g_host_time | byte0;

    g_year_time = byte7;
    g_year_time = g_year_time << 24;
    g_year_time = (g_year_time >> 16 | byte6) << 16;
    g_year_time = (g_year_time >> 8 | byte5) << 8;
    g_year_time = g_year_time | byte4;

    g_zero_day = byte8;
    
    g_dst_fday = byte10;
    g_dst_fday = (g_dst_fday << 8) | byte9;

    g_dst_lday = byte12;
    g_dst_lday = (g_dst_lday << 8) | byte11;

    g_year = byte14;
    g_year = (g_year << 8) | byte13;

    call Time.setCurrentTime(g_host_time);
    call Time.setZoneInfo(g_year, g_year_time, g_zero_day, g_dst_fday, g_dst_lday);


    call Time.time(&time_now);
    call Time.localtime(&time_now, &g_tm);
    call Time.asctime(&g_tm, g_timestring, 128);

    signal HostTime.timeAndZoneSet(g_timestring);
  }

  async event void UARTData.rxDone(uint8_t data) { 
    switch (sync_state) {
    case NONE:
    case TIMEBYTE_32:
      byte3 = data;
      sync_state = TIMEBYTE_24;
      break;
    case TIMEBYTE_24:
      byte2 = data;
      sync_state = TIMEBYTE_16;
      break;
    case TIMEBYTE_16:
      byte1 = data;
      sync_state = TIMEBYTE_8;
      break;
    case TIMEBYTE_8:
      byte0 = data;
      sync_state = YEARBYTE_32;
      break;
    case YEARBYTE_32:
      byte7 = data;
      sync_state = YEARBYTE_24;
      break;
    case YEARBYTE_24:
      byte6 = data;
      sync_state = YEARBYTE_16;
      break;
    case YEARBYTE_16:
      byte5 = data;
      sync_state = YEARBYTE_8;
      break;
    case YEARBYTE_8:
      byte4 = data;
      sync_state = ZERODAY;
      break;
    case ZERODAY:
      byte8 = data;
      sync_state = DST_FDAY1;
      break;
    case DST_FDAY1:
      byte10 = data;
      sync_state = DST_FDAY0;
      break;
    case DST_FDAY0:
      byte9 = data;
      sync_state = DST_LDAY1;
      break;
    case DST_LDAY1:
      byte12 = data;
      sync_state = DST_LDAY0;
      break;
    case DST_LDAY0:
      byte11 = data;
      sync_state = YEAR1;
      break;
    case YEAR1:
      byte14 = data;
      sync_state = YEAR0;
      break;
    case YEAR0:
      byte13 = data;
      post assemble_timestamp();
      sync_state = DONE;
      break;
    default:
      break;
    }
  }

  async event void UARTData.txDone() {}

  event void Time.tick() { }
  
}  
tinyos-2.1.2+dfsg/tos/platforms/shimmer/HplUserButtonC.nc000066400000000000000000000044151207233610700234500ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telos platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 * (not much to) port to shimmer
 * @author Steve Ayer
 * @date February, 2010
 */

configuration HplUserButtonC {
  provides interface GeneralIO;
  provides interface GpioInterrupt;
}
implementation {
  components HplMsp430GeneralIOC as GeneralIOC;
  components HplMsp430InterruptC as InterruptC;

  components new Msp430GpioC() as UserButtonC;
  UserButtonC -> GeneralIOC.Port20;
  GeneralIO = UserButtonC;

  components new Msp430InterruptC() as InterruptUserButtonC;
  InterruptUserButtonC.HplInterrupt -> InterruptC.Port20;
  GpioInterrupt = InterruptUserButtonC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/Ieee154MessageC.nc000066400000000000000000000044731207233610700233040ustar00rootroot00000000000000/*
 * Copyright (c) 2008 The Regents of the University  of California.
 * All rights reserved."
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */


/**
 *
 * @author Stephen Dawson-Haggerty
 */
 
configuration Ieee154MessageC  {
  provides {
    interface SplitControl;

    interface Resource as SendResource[uint8_t clientId];
    interface Ieee154Send;
    interface Receive as Ieee154Receive;

    interface Ieee154Packet;
    interface Packet;

    interface PacketAcknowledgements;
    interface LinkPacketMetadata;
    interface LowPowerListening;
    interface PacketLink;
  }

} implementation {
  components CC2420Ieee154MessageC as Msg;

  SplitControl = Msg;
  SendResource = Msg;
  Ieee154Send  = Msg;
  Ieee154Receive = Msg;
  Ieee154Packet = Msg;
  Packet = Msg;
  
  PacketAcknowledgements = Msg;
  LinkPacketMetadata = Msg;
  LowPowerListening = Msg;
  PacketLink = Msg;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/Leds.nc000066400000000000000000000120641207233610700214550ustar00rootroot00000000000000// $Id: Leds.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2005-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Commands for controlling three LEDs. A platform can provide this
 * interface if it has more than or fewer than three LEDs. In the
 * former case, these commands refer to the first three LEDs. In the
 * latter case, some of the commands are null operations, and the set
 * of non-null operations must be contiguous and start at Led1. That
 * is, on platforms with 2 LEDs, LED 3's commands are null operations,
 * while on platforms with 1 LED, LED 2 and LED 3's commands are null
 * opertations.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 * @author Mike Healy
 * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
 */

#include "Leds.h"

interface Leds {

  /**
   * Turn on LED 0. The color of this LED depends on the platform.
   */
  async command void led0On();

  /**
   * Turn off LED 0. The color of this LED depends on the platform.
   */
  async command void led0Off();

  /**
   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led0Toggle();

  /**
   * Turn on LED 1. The color of this LED depends on the platform.
   */
  async command void led1On();

  /**
   * Turn off LED 1. The color of this LED depends on the platform.
   */
  async command void led1Off();

   /**
   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led1Toggle();

 
  /**
   * Turn on LED 2. The color of this LED depends on the platform.
   */
  async command void led2On();

  /**
   * Turn off LED 2. The color of this LED depends on the platform.
   */
  async command void led2Off();

   /**
   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led2Toggle();
  
  /**
   * Turn on LED 3. The color of this LED depends on the platform.
   */
  async command void led3On();

  /**
   * Turn off LED 3. The color of this LED depends on the platform.
   */
  async command void led3Off();

   /**
   * Toggle LED 3; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led3Toggle();


  /**
   * Get the current LED settings as a bitmask. Each bit corresponds to
   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
   * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression
   * will determine whether LED 2 is on:
   *
   * 
       (call Leds.get() & LEDS_LED2) 
      
   *
   * This command supports up to 8 LEDs; if a platform has fewer, then
   * those LEDs should always be off (their bit is zero). Also see
   * set().
   *
   * @return a bitmask describing which LEDs are on and which are off
   */ 
  async command uint8_t get();

  
  /**
   * Set the current LED configuration using a bitmask.  Each bit
   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
   * this statement will configure the LEDs so LED 0 and LED 2 are on:
   *
   * 
       call Leds.set(LEDS_LED0 | LEDS_LED2); 
      
   *
   * This statement will turn LED 1 on if it was not already:
   *
   * 
      call Leds.set(call Leds.get() | LEDS_LED1);
      
   *
   * @param  val   a bitmask describing the on/off settings of the LEDs
   */
   async command void set(uint8_t val);
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/LedsC.nc000066400000000000000000000042741207233610700215640ustar00rootroot00000000000000// $Id: LedsC.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 *
 * The basic TinyOS LEDs abstraction.
 *
 * @author Phil Buonadonna
 * @author David Gay
 * @author Philip Levis
 * @author Joe Polastre
 *
 * @author Mike Healy
 * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
 */


configuration LedsC {
  provides interface Leds;
}
implementation {
  components LedsP, PlatformLedsC;

  Leds = LedsP;

  LedsP.Init <- PlatformLedsC.Init;
  LedsP.Led0 -> PlatformLedsC.Led0;
  LedsP.Led1 -> PlatformLedsC.Led1;
  LedsP.Led2 -> PlatformLedsC.Led2;
  LedsP.Led3 -> PlatformLedsC.Led3;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/LedsP.nc000066400000000000000000000107621207233610700216000ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 * @date   March 21, 2005
 *
 * @author Mike Healy
 * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
 */

module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
    interface GeneralIO as Led3;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led3.makeOutput();
      call Led0.set();
      call Led1.set();
      call Led2.set();
      call Led3.set();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
    call Led1.clr();
    DBGLED(1);
  }

  async command void Leds.led1Off() {
    call Led1.set();
    DBGLED(1);
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    DBGLED(1);
  }

  async command void Leds.led2On() {
    call Led2.clr();
    DBGLED(2);
  }

  async command void Leds.led2Off() {
    call Led2.set();
    DBGLED(2);
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    DBGLED(2);
  }

  async command void Leds.led3On() {
    call Led3.clr();
    DBGLED(3);
  }

  async command void Leds.led3Off() {
    call Led3.set();
    DBGLED(3);
  }

  async command void Leds.led3Toggle() {
    call Led3.toggle();
    DBGLED(3);
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (!call Led0.get()) {
	      rval |= LEDS_LED0;
      }
      if (!call Led1.get()) {
	      rval |= LEDS_LED1;
      }
      if (!call Led2.get()) {
	      rval |= LEDS_LED2;
      }
      if (!call Led3.get()) {
	      rval |= LEDS_LED3;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	      call Leds.led0On();
      }
      else {
	      call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
	      call Leds.led1On();
      }
      else {
	      call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
	      call Leds.led2On();
      }
      else {
	      call Leds.led2Off();
      }
      if (val & LEDS_LED3) {
	      call Leds.led3On();
      }
      else {
	      call Leds.led3Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/LocalTime64.nc000066400000000000000000000050231207233610700226060ustar00rootroot00000000000000//$Id: LocalTime64.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "Timer.h"

/**
 * A LocalTime interface counts time in some units. If you need to detect
 * time overflow, you should use a component offering the Counter
 * interface.
 *
 * 
      The LocalTime interface is parameterised by its "precision"
 * (milliseconds, microseconds, etc), identified by a type. This prevents,
 * e.g., unintentionally mixing components expecting milliseconds with
 * those expecting microseconds as those interfaces have a different type.
 *
 * 
      See TEP102 for more details.
 *
 * @param precision_tag A type indicating the precision of this Counter.
 *
 * @author Cory Sharp 
 */

interface LocalTime64
{
  /** 
   * Return current time. Time starts counting at boot - some time sources
   * may stop counting while the processor is in low-power mode.
   *
   * @return Current time.
   */
  async command uint64_t get();
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/MoteClockC.nc000066400000000000000000000035571207233610700225600ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universität Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $Id: MoteClockC.nc,v 1.1 2008-05-21 22:07:24 konradlorincz Exp $
 *
 */

 /**
 * @author Vlado Handziski 
 */
 
configuration MoteClockC
{
  provides interface Init as MoteClockInit;
}
implementation

{
  components Msp430ClockC;
  
  MoteClockInit = Msp430ClockC.Init;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/MotePlatformC.nc000066400000000000000000000144271207233610700233070ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steven Ayer
 * @date June 2006
 */

module MotePlatformC {
  provides interface Init;
}
implementation {
  command error_t Init.init() {
    
    //LEDS
    TOSH_MAKE_RED_LED_OUTPUT();
    TOSH_MAKE_YELLOW_LED_OUTPUT();
    TOSH_MAKE_ORANGE_LED_OUTPUT();
    TOSH_MAKE_GREEN_LED_OUTPUT();
    TOSH_SEL_RED_LED_IOFUNC();
    TOSH_SEL_YELLOW_LED_IOFUNC();
    TOSH_SEL_ORANGE_LED_IOFUNC();
    TOSH_SEL_GREEN_LED_IOFUNC();

    TOSH_SET_RED_LED_PIN();
    TOSH_SET_YELLOW_LED_PIN();
    TOSH_SET_ORANGE_LED_PIN();
    TOSH_SET_GREEN_LED_PIN();

    //RADIO PINS
    //CC2420 pins
    TOSH_MAKE_RADIO_CSN_OUTPUT();
    TOSH_SEL_RADIO_CSN_IOFUNC();
    TOSH_SET_RADIO_CSN_PIN();

    TOSH_MAKE_CSN_OUTPUT();
    TOSH_SEL_CSN_IOFUNC();
    TOSH_SET_CSN_PIN();

    // should be reset_n
    TOSH_MAKE_RADIO_RESET_OUTPUT();
    TOSH_SEL_RADIO_RESET_IOFUNC();
    TOSH_CLR_RADIO_RESET_PIN();

    TOSH_MAKE_RADIO_1V8_EN_OUTPUT();
    TOSH_SEL_RADIO_1V8_EN_IOFUNC();
    TOSH_CLR_RADIO_1V8_EN_PIN();

    TOSH_MAKE_RADIO_CCA_INPUT();
    TOSH_MAKE_RADIO_FIFO_INPUT();
    TOSH_MAKE_RADIO_FIFOP_INPUT();
    TOSH_MAKE_RADIO_SFD_INPUT();
    TOSH_MAKE_RADIO_TIMED_SFD_INPUT();
    TOSH_SEL_RADIO_CCA_IOFUNC();
    TOSH_SEL_RADIO_FIFO_IOFUNC();
    TOSH_SEL_RADIO_FIFOP_IOFUNC();
    TOSH_SEL_RADIO_SFD_IOFUNC();
    TOSH_SEL_RADIO_TIMED_SFD_IOFUNC();

    TOSH_MAKE_ONEWIRE_PWR_OUTPUT();
    TOSH_SET_ONEWIRE_PWR_PIN();

    TOSH_SEL_SD_CS_N_IOFUNC();
    TOSH_MAKE_SD_CS_N_OUTPUT();
    TOSH_SET_SD_CS_N_PIN();

    // BT PINS
    TOSH_MAKE_BT_RESET_OUTPUT();  
    TOSH_SEL_BT_RESET_IOFUNC();    
    TOSH_CLR_BT_RESET_PIN();   // mitsumi module disabled by clr

    TOSH_MAKE_BT_RTS_INPUT();      
    TOSH_SEL_BT_RTS_IOFUNC();

    TOSH_MAKE_BT_PIO_INPUT();
    TOSH_SEL_BT_PIO_IOFUNC();

    TOSH_MAKE_BT_CTS_OUTPUT();
    TOSH_SEL_BT_CTS_IOFUNC();

    TOSH_MAKE_BT_TXD_OUTPUT();
    TOSH_SEL_BT_TXD_MODFUNC();

    TOSH_MAKE_BT_RXD_INPUT();
    TOSH_SEL_BT_RXD_MODFUNC();

    // BSL Prog Pins tristate em

    TOSH_MAKE_PROG_IN_OUTPUT();
    TOSH_MAKE_PROG_OUT_OUTPUT();
    TOSH_SET_PROG_OUT_PIN();    // some expansion boards have enable low
    TOSH_SEL_PROG_IN_IOFUNC();
    TOSH_SEL_PROG_OUT_IOFUNC();

    // USART lines, attached to a pullup
    TOSH_SEL_UCLK0_IOFUNC();
    TOSH_MAKE_UCLK0_OUTPUT();
    TOSH_SET_UCLK0_PIN();
    TOSH_SEL_UCLK1_IOFUNC();
    TOSH_MAKE_UCLK1_OUTPUT();
    TOSH_SET_UCLK1_PIN();

    TOSH_SEL_SIMO0_IOFUNC();
    TOSH_MAKE_SIMO0_OUTPUT();
    TOSH_SET_SIMO0_PIN();
    TOSH_SEL_SOMI0_IOFUNC();
    TOSH_MAKE_SOMI0_INPUT();

    TOSH_SEL_SIMO1_IOFUNC();
    TOSH_MAKE_SIMO1_OUTPUT();
    TOSH_SET_SIMO1_PIN();
    TOSH_SEL_SOMI1_IOFUNC();
    TOSH_MAKE_SOMI1_INPUT();

    // ADC lines
    TOSH_MAKE_ADC_0_OUTPUT();
    TOSH_MAKE_ADC_1_OUTPUT();
    TOSH_MAKE_ADC_2_OUTPUT();
    TOSH_MAKE_ADC_6_OUTPUT();
    TOSH_MAKE_ADC_7_OUTPUT();

    TOSH_SEL_ADC_0_IOFUNC();
    TOSH_SEL_ADC_1_IOFUNC();
    TOSH_SEL_ADC_2_IOFUNC();
    TOSH_SEL_ADC_6_IOFUNC();
    TOSH_SEL_ADC_7_IOFUNC();
  
    TOSH_MAKE_ADC_ACCELZ_INPUT();
    TOSH_MAKE_ADC_ACCELY_INPUT();
    TOSH_MAKE_ADC_ACCELX_INPUT();
    TOSH_SEL_ADC_ACCELZ_MODFUNC();
    TOSH_SEL_ADC_ACCELY_MODFUNC();
    TOSH_SEL_ADC_ACCELX_MODFUNC();
  
    TOSH_SEL_ROSC_IOFUNC();
    TOSH_MAKE_ROSC_INPUT();

    // DAC lines
    // Default is not to use DAC mode.  Please define pin usage if you want to use them
    
    // UART pins
    // These declarations are to allow the UART module to work since it's using the names.
    // The UART module will set them to the right direction when initialized

    // ftdi/gio pins.  Unused for now so we do not set directionality or function


    // 1-wire function
    TOSH_MAKE_ONEWIRE_PWR_OUTPUT();
    TOSH_SEL_ONEWIRE_PWR_IOFUNC();
    TOSH_MAKE_ONEWIRE_INPUT();
    TOSH_SEL_ONEWIRE_IOFUNC();

    // Accelerometer pin definitions
    TOSH_SEL_ACCEL_SEL0_IOFUNC();
    TOSH_SEL_ACCEL_SEL1_IOFUNC();
    TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
  
    TOSH_MAKE_ACCEL_SEL0_OUTPUT();
    TOSH_MAKE_ACCEL_SEL1_OUTPUT();
    TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT();

    /*
     * unless the accel_sel0 pin is cleared, 
     * a severe quiescent power hit occurs on the msp430
     * we go from 3.7 ua to 65.1 ua when asleep!
     */
    TOSH_CLR_ACCEL_SEL0_PIN();
    TOSH_CLR_ACCEL_SEL1_PIN();
    TOSH_CLR_ACCEL_SLEEP_N_PIN();


    // idle expansion header pins
    TOSH_MAKE_SER0_CTS_OUTPUT();
    TOSH_SEL_SER0_CTS_IOFUNC();
    TOSH_MAKE_SER0_RTS_OUTPUT();
    TOSH_SEL_SER0_RTS_IOFUNC();
    TOSH_MAKE_GIO0_INPUT();
    TOSH_SEL_GIO0_IOFUNC();
    TOSH_MAKE_GIO1_OUTPUT();
    TOSH_SEL_GIO1_IOFUNC();
    TOSH_MAKE_UTXD0_OUTPUT();
    TOSH_SEL_UTXD0_IOFUNC();
    TOSH_MAKE_URXD0_OUTPUT();
    TOSH_SEL_URXD0_IOFUNC();
    TOSH_MAKE_RADIO_VREF_OUTPUT();
    TOSH_SEL_RADIO_VREF_IOFUNC();

    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/Msp430Timer32khzMapC.nc000066400000000000000000000065221207233610700242020ustar00rootroot00000000000000//$Id: Msp430Timer32khzMapC.nc,v 1.4 2010-06-29 22:07:54 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * MSP430Timer32khzMapC presents as paramaterized interfaces all of
 * the 32khz hardware timers on the MSP430 that are available for
 * compile time allocation by "new Alarm32khz16C()", "new
 * AlarmMilli32C()", and so on.  
 *
 * Platforms based on the MSP430 are * encouraged to copy in and
 * override this file, presenting only the * hardware timers that are
 * available for allocation on that platform.
 *
 * @author Cory Sharp 
 * @version $Revision: 1.4 $ $Date: 2010-06-29 22:07:54 $
 */

configuration Msp430Timer32khzMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
  Msp430Compare[0] = Msp430TimerC.CompareB0;

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
  Msp430Compare[1] = Msp430TimerC.CompareB1;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
  Msp430Compare[2] = Msp430TimerC.CompareB2;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
  Msp430Compare[3] = Msp430TimerC.CompareB3;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
  Msp430Compare[4] = Msp430TimerC.CompareB4;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
  Msp430Compare[5] = Msp430TimerC.CompareB5;

  Msp430Timer[6] = Msp430TimerC.TimerB;
  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
  Msp430Compare[6] = Msp430TimerC.CompareB6;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/NoLedsC.nc000066400000000000000000000043301207233610700220520ustar00rootroot00000000000000// $Id: NoLedsC.nc,v 1.1 2009/06/17 15:16:54 ayer Exp $

/*
 * "Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/**
 * A null operation replacement for the LedsC component. As many
 * components might concurrently signal information through LEDs,
 * using LedsC and NoLedsC allows an application builder to select
 * which components control the LEDs.
 *
 * @author Philip Levis
 * @date   March 19, 2005
 *
 * @author Mike Healy
 * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
 */

module NoLedsC {
  provides interface Init;
  provides interface Leds;
}
implementation {

  command error_t Init.init() {return SUCCESS;}

  async command void Leds.led0On() {}
  async command void Leds.led0Off() {}
  async command void Leds.led0Toggle() {}

  async command void Leds.led1On() {}
  async command void Leds.led1Off() {}
  async command void Leds.led1Toggle() {}

  async command void Leds.led2On() {}
  async command void Leds.led2Off() {}
  async command void Leds.led2Toggle() {}

  async command void Leds.led3On() {}
  async command void Leds.led3Off() {}
  async command void Leds.led3Toggle() {}

  async command uint8_t Leds.get() {return 0;}
  async command void Leds.set(uint8_t val) {}
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/PlatformC.nc000066400000000000000000000036641207233610700224630ustar00rootroot00000000000000/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre and Cory Sharp
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
 */
#include "hardware.h"

configuration PlatformC
{
  provides interface Init;
}
implementation
{
  components PlatformP, MotePlatformC, MoteClockC;

  Init = PlatformP;
  PlatformP.MoteClockInit -> MoteClockC;
  PlatformP.MoteInit -> MotePlatformC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/PlatformLedsC.nc000066400000000000000000000050471207233610700232700ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $

/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre
 * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:54 $
 *
 * @author Mike Healy
 * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
 */

#include "hardware.h"

configuration PlatformLedsC {
  provides interface GeneralIO as Led0;
  provides interface GeneralIO as Led1;
  provides interface GeneralIO as Led2;
  provides interface GeneralIO as Led3;
  uses interface Init;
}
implementation
{
  components 
      HplMsp430GeneralIOC as GeneralIOC
    , new Msp430GpioC() as Led0Impl
    , new Msp430GpioC() as Led1Impl
    , new Msp430GpioC() as Led2Impl
    , new Msp430GpioC() as Led3Impl
    ;
  components PlatformP;

  Init = PlatformP.LedsInit;

  Led0 = Led0Impl;
  Led0Impl -> GeneralIOC.Port40;

  Led1 = Led1Impl;
  Led1Impl -> GeneralIOC.Port41;

  Led2 = Led2Impl;
  Led2Impl -> GeneralIOC.Port42;

  Led3 = Led3Impl;
  Led3Impl -> GeneralIOC.Port43;

}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/PlatformP.nc000066400000000000000000000006601207233610700224710ustar00rootroot00000000000000#include "hardware.h"

module PlatformP{
  provides interface Init;
  uses interface Init as MoteClockInit;
  uses interface Init as MoteInit;
  uses interface Init as LedsInit;
}
implementation {
  command error_t Init.init() {
    WDTCTL = WDTPW + WDTHOLD;
    call MoteClockInit.init();
    call MoteInit.init();
    call LedsInit.init();
    return SUCCESS;
  }

  default command error_t LedsInit.init() { return SUCCESS; }

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/PlatformSerialC.nc000066400000000000000000000041321207233610700236120ustar00rootroot00000000000000/*
 * Copyright (c) 2008
 *	The President and Fellows of Harvard College.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */
/**
 * Ported to the SHIMMER platform: uses Uart0 instead of Uart1 (telos).
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 */

configuration PlatformSerialC 
{
    provides interface StdControl;
    provides interface UartStream;
    provides interface UartByte;
}
implementation 
{
    components new Msp430Uart0C() as UartC;
    UartStream = UartC;  
    UartByte = UartC;
  
    components ShimmerSerialP;
    StdControl = ShimmerSerialP;
    ShimmerSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
    ShimmerSerialP.Resource -> UartC.Resource;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/README.txt000066400000000000000000000051361207233610700217440ustar00rootroot00000000000000*** SHIMMER - TinyOS 2.x platform support ***
=============================================
Konrad Lorincz
May 6, 2008

This directory contains tinyos 2.x platform support for the Intel
SHIMMER mote.  Please use the mailing list given below to post
questions and comments.


Usage
-----
You can compile and install applications for the SHIMMER platform just
like with any standard platform, "make shimmer install ..." (Note:
you must have a shimmer programming board).

For example, to complie and install Blink, do the following:

  $ cd $TOSROOT/apps/Blink
  $ make shimmer install bsl,X

where X is your serial port.

You may also want to test the radio.  Do this by compiling and
installing "$TOSROOT/apps/RadioCountToLeds" on TWO shimmers (for
sending and receiving radio messages).


Support
-------
  - Official documentation
    http://docs.tinyos.net/index.php/SHIMMER
  - Mailing list (requires subscription to post)
    https://www.eecs.harvard.edu/mailman/listinfo/shimmer-users


Copyright
---------
/*
 * Copyright (c) 2008
 *	The President and Fellows of Harvard College.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

tinyos-2.1.2+dfsg/tos/platforms/shimmer/ShimmerSerialP.nc000066400000000000000000000046541207233610700234600ustar00rootroot00000000000000/*
 * Copyright (c) 2008
 *	The President and Fellows of Harvard College.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */
/**
 * Ported to the SHIMMER platform: uses Uart0 instead of Uart1 (telos).
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 */
module ShimmerSerialP 
{
    provides interface StdControl;
    provides interface Msp430UartConfigure;
    uses interface Resource;
}
implementation 
{
    msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };

    command error_t StdControl.start()
    {
        return call Resource.immediateRequest();
    }

    command error_t StdControl.stop()
    {
        call Resource.release();
        return SUCCESS;
    }

    event void Resource.granted(){}

    async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() 
    {
        return &msp430_uart_telos_config;
    }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/SwitchToggleC.nc000066400000000000000000000045771207233610700233060ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Generic layer to translate a GIO into a toggle switch
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 * port to shimmer-style
 * @author Steve Ayer
 * @date   February, 2010
 */

#include 

generic module SwitchToggleC() {
  provides interface Notify;

  uses interface GeneralIO;
  uses interface GpioInterrupt;
}
implementation {
  task void sendEvent();

  command error_t Notify.enable() {
    call GeneralIO.makeInput();

    return call GpioInterrupt.enableRisingEdge();
  }

  command error_t Notify.disable() {
    call GeneralIO.makeOutput();
    return call GpioInterrupt.disable();
  }

  async event void GpioInterrupt.fired() {
    call GpioInterrupt.disable();

    post sendEvent();
  }

  task void sendEvent() {
    signal Notify.notify( BUTTON_PRESSED );
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/Time.h000066400000000000000000000014211207233610700213060ustar00rootroot00000000000000typedef uint32_t time_t;

#define HAVE_WDAY
#undef HAVE_DST

struct tm
{
  int tm_sec;			/* Seconds.	[0-60] (1 leap second) */
  int tm_min;			/* Minutes.	[0-59] */
  int tm_hour;			/* Hours.	[0-23] */
  int tm_mday;			/* Day.		[1-31] */
  int tm_mon;			/* Month.	[0-11] */
  int tm_year;			/* Year	- 1900.  */
#ifdef HAVE_WDAY
  int tm_wday;			/* Day of week.	[0-6] */
#endif
  int tm_yday;			/* Days in year.[0-365]	*/
  int tm_isdst;			/* DST.		[-1/0/1]*/

#ifdef __UCLIBC_HAS_TM_EXTENSIONS__
#ifdef	__USE_BSD
  long int tm_gmtoff;		/* Seconds east of UTC.  */
  __const char *tm_zone;	/* Timezone abbreviation. */
#else
  long int __tm_gmtoff;		/* Seconds east of UTC.  */
  __const char *__tm_zone;	/* Timezone abbreviation. */
#endif
#endif /* __UCLIBC_HAS_TM_EXTENSIONS__ */
};
tinyos-2.1.2+dfsg/tos/platforms/shimmer/Time.nc000066400000000000000000000042171207233610700214650ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Hewlett-Packard Company
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of the Hewlett-Packard Company nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#include "Time.h"

interface Time {
  command error_t gmtime(const time_t *timer, struct tm *tm);
  command error_t localtime(const time_t *timer, struct tm *tm);
  command error_t asctime(const struct tm *tm, char *buf, int buflen);
  command error_t time(time_t *timer);
  command error_t mktime(const struct tm *tm, time_t * t);
  command void setCurrentTime(time_t current_time);
  command void setZoneInfo(uint16_t g_year, 
			   time_t g_year_time, 
			   uint8_t g_zero_day, 
			   uint16_t g_dst_fday, 
			   uint16_t g_dst_lday);
  event void tick();
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/TimeC.nc000066400000000000000000000043011207233610700215620ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date March, 2010
 * 
 * pulling together time modules
 */

configuration TimeC {
  provides{
    interface Time;
    interface Init;
  }
}

implementation { 
  components TimeP;
  Init = TimeP;
  Time = TimeP;

  components new TimerMilliC() as LocalTimer;
  TimeP.Timer -> LocalTimer;

  components Counter32khz64C as Counter;
  components new CounterToLocalTime64C(T32khz);
  CounterToLocalTime64C.Counter -> Counter;
  TimeP.LocalTime64 -> CounterToLocalTime64C;
  
  /* 
   * and, at some point...
   *  TimeP.NTPClient            -> NTPClientM;   not yet, awaiting tos-2.x ip port
   */

}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/TimeP.nc000066400000000000000000000256631207233610700216150ustar00rootroot00000000000000

/*  Copyright (C) 2002     Manuel Novoa III
 *
 *  This library is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU Library General Public
 *  License as published by the Free Software Foundation; either
 *  version 2 of the License, or (at your option) any later version.
 *
 *  This library is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *  Library General Public License for more details.
 *
 *  You should have received a copy of the GNU Library General Public
 *  License along with this library; if not, write to the Free
 *  Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
/**
 * port to tos-2.x
 * @author Steve Ayer
 * @date   January, 2010
 */

// includes InfoMem;  let's avoid this...

module TimeP {
  provides {
    interface Init;
    interface Time;
    //    interface ParamView;    save for ip stack port to tos-2.x
  }
  uses {
    interface Timer;
    //    interface NTPClient;  save for ip stack port to tos-2.x
    interface LocalTime64;
  }
}

implementation {

#define HAVE_DST
extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));

  struct y_info{
    time_t year_seconds; /* time_t value for beginning of year */
    int8_t wday_offset;   /* tm_day of first day of the year */
    int8_t isleap;
    int16_t dst_first_yday;
    int16_t dst_last_yday;
  };
  time_t g_seconds;
  time_t g_year_seconds;
  time_t g_seconds_from_year;
  uint16_t g_days;
  time_t g_seconds_from_day;

  //#define TZNAME_MAX 7
  //#define LONG_MAX 0x7fffffffL
  time_t g_tick_local_time;
#ifdef CURRENT_TIME  
  time_t g_current_time = CURRENT_TIME;
#else
  time_t g_current_time;
#endif

#ifndef HOST_TIME
  /*
   * this array needs to be one longer than NUM_YEARS, because
   * the code tests to see if current time in seconds is less than
   * the start of next year...
   * how to generate this:
   * get the dates for start and end of daylight savings
   * get the day of week for jan 1 (0-6, 0 is monday)
   * in python, do this for dst dates:
   * >>> time.strptime("13 Mar 16", "%d %b %y")
   * which will give you something like
   * time.struct_time(tm_year=2016, tm_mon=3, tm_mday=13, tm_hour=0, tm_min=0, tm_sec=0, tm_wday=6, tm_yday=73, tm_isdst=-1)
   * use tm_yday for the last two fields (def above)
   * for seconds for jan 1 at 00:00, set hour relative to gmtime; e.g., here in u.s. est i used 5.  field 7 (the 4) is jan 1 day of week:
   * >>> print "%08x" % time.mktime((2016, 1, 1, 5, 0, 0, 4, 1, 0))
   * field three is is_leap.  
   */
#define NUM_YEARS 4
  const int16_t g_first_year = 2012;
  struct y_info year_info[NUM_YEARS + 1] = {
    /* unix time start jan 1 1970 */
    // from 2007, dst begins 2nd sunday in march, ends first sunday in november
    { 0x4EFFE850, 6, 1, 71, 309},
    { 0x50e26d50, 1, 0, 69, 307},
    { 0x52c3a0d0, 2, 0, 68, 306},
    { 0x54a4d450, 3, 0, 67, 305},
    { 0x568607d0, 4, 1, 73, 311}

  };

#else
#define NUM_YEARS 1
  // these will be set by setZoneInfo()
  int16_t g_first_year = 0;
  struct y_info year_info[NUM_YEARS];
#endif

  //  time_t g_local_time; /* from LocalTime.read() */
  uint64_t g_local_time; /* from LocalTime.read(), now 64 bits to handle */

  typedef struct {
    long gmt_offset;
    //    long dst_offset;
    //    short day;					/* for J or normal */
    //    short week;
    //    short month;
    //    short rule_type;			/* J, M, \0 */
    //    char tzname[TZNAME_MAX+1];
  } rule_struct;

  rule_struct _time_tzinfo[1];

  // gmt_offset can stay zero, because any CURRENT_TIME we get is from a local source
  command error_t Init.init() {
    _time_tzinfo[0].gmt_offset = 60L * 0L;

    g_tick_local_time = call LocalTime64.get();
    call Timer.startPeriodic(10*1024L);
    signal Time.tick();
    return SUCCESS;
  }

  command void Time.setCurrentTime(time_t current_time){
    atomic g_current_time = current_time;
    g_local_time = call LocalTime64.get();
  }

  command void Time.setZoneInfo(uint16_t g_year, 
				time_t g_year_time, 
				uint8_t g_zero_day, 
				uint16_t g_dst_fday, 
				uint16_t g_dst_lday){
    g_first_year = g_year;
    
    year_info[0].year_seconds = g_year_time;
    year_info[0].wday_offset = g_zero_day;

    if(!(g_year % 4))
      year_info[0].isleap = 1;
    else
      year_info[0].isleap = 0;

    year_info[0].dst_first_yday = g_dst_fday;
    year_info[0].dst_last_yday = g_dst_lday;
  }

  void dotick(int force) {
    time_t tick = call LocalTime64.get();
    if (force || tick >= (g_tick_local_time + 32768L*10)) {
      signal Time.tick();
      g_tick_local_time = tick;
    }
  }
  event void Timer.fired() {
    dotick(0);
  }

  /*  
   * save this pending tos-2.x port of ip stack
   *
   event void NTPClient.timestampReceived( uint32_t *seconds, uint32_t *fraction ) {
   g_current_time = *seconds;
   g_local_time = call LocalTime64.get();
   dotick(1);
   }
  */

  struct tm __time_tm;

  /* Notes:
   * If time_t is 32 bits, then no overflow is possible.
   * It time_t is > 32 bits, this needs to be adjusted to deal with overflow.
   */

  static const int8_t days_per_month[] = {
    31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31, /* non-leap */
    29,
  };

#ifdef __UCLIBC_HAS_TM_EXTENSIONS__
  static const char utc_string[] = "UTC";
#endif

  /*
    import time
    for y in range(2004,2008):
       t = time.mktime((y, 1, 1, 0, 0, 0, 0, 0, 0))-5*3600
       print time.gmtime(t)
    
    (2004, 1, 1, 0, 0, 0, 3, 1, 0)
    (2005, 1, 1, 0, 0, 0, 5, 1, 0)
    (2006, 1, 1, 0, 0, 0, 6, 1, 0)
    (2007, 1, 1, 0, 0, 0, 0, 1, 0)
    from below in year_info struct for 2004-7
    { 0x3ff36300, 3, 1 },
    { 0x41d5e800, 5, 0 },
    { 0x43b71b80, 6, 0 },
    { 0x45984f00, 0, 0 }
    
    NTP Timestamp starts Jan 1, 1900 and is 2208988800 jan 1 1970
    '%x' % (int(time.mktime((2004, 1, 1, 0, 0, 0, 3, 1, 0))) -18000 + 2208988800l)
    
    and now, 
    
    (2009, 1, 1, 0, 0, 0, 3, 1, 0)
    (2010, 1, 1, 0, 0, 0, 4, 1, 0)
    (2011, 1, 1, 0, 0, 0, 5, 1, 0)
    (2012, 1, 1, 0, 0, 0, 6, 1, 0)
    
  */

  struct tm *_time_t2tm(const time_t *timer, int localtime, struct tm *result)
  {
    uint16_t seconds16;
    int i;
    time_t seconds = *timer;
    uint16_t days;
    uint16_t hour, min;
    int isleap = 0;

    //if year_info has dst_first_yday and dst_last_yday defined, then HAVE_DST should be defined up top.
#ifdef HAVE_DST
    int isdst = 0;
#endif

    if (localtime) {
      seconds -= _time_tzinfo[0].gmt_offset;
    }

    g_seconds = seconds;
    if (seconds < year_info[0].year_seconds) {
      memset(result, 0, sizeof(struct tm));
      return NULL;
    }
    
    if(NUM_YEARS > 1){
      for (i = 0; i < NUM_YEARS-1; i++) {
	if (seconds < year_info[i+1].year_seconds) {
	  seconds -= year_info[i].year_seconds;
	  result->tm_year = g_first_year + i;
	  isleap = year_info[i].isleap;
	  break;
	}
      }
    }
    else{
      i = 0;
      seconds -= year_info[i].year_seconds;
      result->tm_year = g_first_year + i;
      isleap = year_info[i].isleap;
    }
    g_year_seconds = year_info[i].year_seconds;
    g_seconds_from_year = seconds;
    days = seconds / 86400L;
    g_days = days;
    seconds -= days * 86400L;
    g_seconds_from_day = seconds;
#ifdef HAVE_DST
    if (days >= year_info[i].dst_first_yday && 
	days <= year_info[i].dst_last_yday) {
      isdst = 1;
      seconds += 3600;
      if (seconds < 0) {
	days--;
	seconds += 86400L;
      }
      if (days < 0) {
	result->tm_year--;
	days += 365;
      }
    }
#endif /* HAVE_DST */

    result->tm_yday = days; 
#ifdef HAVE_WDAY
    if(NUM_YEARS > 1)
      result->tm_wday = (result->tm_yday + year_info[i+1].wday_offset) % 7;
    else
      result->tm_wday = (result->tm_yday + year_info[0].wday_offset) % 7;
#endif

    for (i = 0; i < 12; i++) {
      int8_t dpm = days_per_month[i];
      if (i == 1 && isleap) dpm++;
      if (days < dpm)
	break;
      days -= dpm;
    }
    result->tm_mon = i;
    result->tm_mday = 1 + days ;

    hour = seconds / 3600;
    seconds16 = seconds - hour * 3600;
    result->tm_hour = hour;
    min = seconds16 / 60;
    result->tm_sec = seconds16 - min * 60;
    result->tm_min = min;
    return result;
  }

  command error_t Time.gmtime(const time_t *timer, struct tm *ptm)
  {

    _time_t2tm(timer, 0, ptm); /* Can return NULL... */

    return SUCCESS;
  }

  /* Note: timezone locking is done by localtime_r. */

  static int tm_isdst(register const struct tm *__restrict ptm) {
    // no DST in arizona
    return 0;
  }
    
  command error_t Time.localtime(const time_t *timer, struct tm *result)
  {
    _time_t2tm(timer, 1, result);

    return SUCCESS;
  }
  static char *wday_name[] = { "Sun", "Mon", "Tues", "Wed", "Thur", "Fri", "Sat" };
  static char *mon_name[] = { "Jan", "Feb", "Mar", "Apr", "May", "Jun", "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" };
  command error_t Time.asctime(const struct tm *tm, char *buf, int buflen)
  {
    char *out = buf;
    char *outmax = buf + buflen;
    out += snprintf(out, outmax - out, "%02d:%02d:%02d",
		    tm->tm_hour, tm->tm_min, tm->tm_sec);
#ifdef HAVE_WDAY
    out += snprintf(out, outmax - out, " %s", wday_name[tm->tm_wday]);
#endif
    out += snprintf(out, outmax - out, " %s %d %d",
		    mon_name[tm->tm_mon], tm->tm_mday, tm->tm_year);
    return SUCCESS;
  }

  command error_t Time.time(time_t *timer)
  {
    // 1/32768 seconds since last NTP response
    uint64_t o = call LocalTime64.get() - g_local_time;

    *timer = g_current_time + (time_t)(o >> 15);
    
    return SUCCESS;
  }

  // this does not do tz or dst conversion!  utc in (the tm struct); utc out (t)
  command error_t Time.mktime(const struct tm *tm, time_t * t ){
    time_t unix_time;
    uint32_t secs_per_year = 31536000;
    uint32_t year_secs, mon_secs, day_secs, hour_secs;
    register uint16_t i;

    hour_secs = (uint32_t)tm->tm_hour * 3600UL;
    day_secs = (uint32_t)(tm->tm_mday - 1) * 86400UL; 

    mon_secs = 0;
    for(i = 0; i < tm->tm_mon; i++){
      mon_secs += (uint32_t)days_per_month[i] * 86400UL;
      if((i == 1) && ((tm->tm_year % 4) == 0))  // we can add in a day for feb. 29
	mon_secs += 86400;
    }
    year_secs = 0;
    for(i = 0; i < (uint16_t)tm->tm_year - 70; i++){
      year_secs += secs_per_year;
      if(((1970 + i) % 4) == 0)
	year_secs += 86400;
    }

    unix_time = year_secs + mon_secs + day_secs + hour_secs + (uint32_t)tm->tm_min * 60 + (uint32_t)tm->tm_sec;

    *t = unix_time;

    return SUCCESS;
  }

  default event void Time.tick() { }

  /*****************************************
   *  ParamView interface
   * save for ip stack port to tos-2.x   

  const struct Param s_Time[] = {
    { "ntp time", PARAM_TYPE_UINT32, &g_current_time },
    { "local time", PARAM_TYPE_UINT32, &g_local_time },
    { NULL, 0, NULL }
  };

  struct ParamList g_TimeList = { "time", &s_Time[0] };

  command error_t ParamView.init()
  {
    signal ParamView.add( &g_TimeList );
    return SUCCESS;
  }
  *****************************************/

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/TimeSyncMessageC.nc000066400000000000000000000066631207233610700237410ustar00rootroot00000000000000// $Id: TimeSyncMessageC.nc,v 1.6 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 *
 * The Active Message layer on the shimmer platform. This is a naming wrapper
 * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
 *
 * @author Konrad Lorincz
 * @author Brano Kusy
 * @date June 19 2005
 */

configuration TimeSyncMessageC {
  provides
  {
    interface SplitControl;
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface LowPowerListening;

    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;

    interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacket32khz;

    interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacketMilli;
  }
}
implementation {
  components CC2420TimeSyncMessageC as AM;

  SplitControl = AM;

  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;

  TimeSyncAMSend32khz       = AM;
  TimeSyncAMSendMilli       = AM;
  TimeSyncPacket32khz       = AM;
  TimeSyncPacketMilli       = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/UserButton.h000066400000000000000000000035121207233610700225250ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

#ifndef USERBUTTON_H
#define USERBUTTON_H

typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/UserButtonC.nc000066400000000000000000000051371207233610700230060ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform. Get
 * returns the current state of the button by reading the pin,
 * regardless of whether enable() or disable() has been called on the
 * Interface. Notify.enable() and Notify.disable() modify the
 * underlying interrupt state of the pin, and have the effect of
 * enabling or disabling notifications that the button has changed
 * state.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 * port to shimmer-style
 * @author Steve Ayer
 * @date   February, 2010
 */

#include 

configuration UserButtonC {
  provides interface Notify;
}
implementation {
  components HplUserButtonC;
  components new SwitchToggleC();
  SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
  SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO;

  components UserButtonP;
  Notify = UserButtonP;

  components new TimerMilliC() as debounceTimer;
  UserButtonP.NotifyLower -> SwitchToggleC.Notify;
  UserButtonP.debounceTimer -> debounceTimer;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/UserButtonP.nc000066400000000000000000000050601207233610700230160ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $
 * port to shimmer-style
 * @author Steve Ayer
 * @date   February, 2010
 */

#include 

module UserButtonP {
  provides interface Notify;

  uses interface Notify as NotifyLower;
  uses interface Timer as debounceTimer;
}
implementation {
  command error_t Notify.enable() {
    return call NotifyLower.enable();
  }

  command error_t Notify.disable() {
    return call NotifyLower.disable();
  }

  event void debounceTimer.fired() {
    call Notify.enable();    // re-enable interrupt
    signal Notify.notify( BUTTON_PRESSED );
  }

  task void debounce() {
    call Notify.disable();
    call debounceTimer.startOneShot(250);
  }

  event void NotifyLower.notify( bool val ) {
    // we've only enabled interrupt from rising edge
    post debounce();
  }
  
  default event void Notify.notify( button_state_t val ) { }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/VoltageC.nc000066400000000000000000000040521207233610700222700ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * VoltageC is a common name for the Msp430InternalVoltageC voltage
 * sensor available on the telosb platform.
 *
 * To convert from ADC counts to actual voltage, divide by 4096 and
 * multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:24 $
 */

generic configuration VoltageC() {
  provides interface Read;
}
implementation {
  components new Msp430InternalVoltageC();
  Read = Msp430InternalVoltageC.Read;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/VoltageStreamC.nc000066400000000000000000000041021207233610700234400ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * VoltageC is a common name for the Msp430InternalVoltageC voltage
 * sensor available on the telosb platform.
 *
 * To convert from ADC counts to actual voltage, divide by 4096 and
 * multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $ $Date: 2008-06-24 22:25:57 $
 */

generic configuration VoltageStreamC() {
  provides interface ReadStream;
}
implementation {
  components new Msp430InternalVoltageC();
  ReadStream = Msp430InternalVoltageC.ReadStream;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/000077500000000000000000000000001207233610700213475ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/bluetooth/000077500000000000000000000000001207233610700233545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/bluetooth/Bluetooth.nc000066400000000000000000000104421207233610700256440ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 *  Authors:  Steve Ayer, Adrian Burns
 *            February, 2007
 */
/**
 * @author Steve Ayer
 * @author Adrian Burns
 * @date February, 2007
 *
 * @author Mike Healy
 * @date April 20, 2009 - ported to TinyOS 2.x 
 */



#include "RovingNetworks.h"

interface Bluetooth {

   /* write SPP (Serial Port Profile) data to the connected BT device */
  // note: max message length is 128 bytes, beyond that msg_append_buf wraps
   command error_t write(const uint8_t *buf, uint8_t len);

   /* after this command is called there will be no link to the connected device */
   command error_t disconnect();

   /* commands useful for Master(client) applications only */
   /* do an BT Inquiry to discover all listening devices within range */
   command void discoverDevices();

   /* connect to a specific device that was previously discovered */
   command error_t connect(uint8_t * addr);

   // enum SLAVE_MODE, MASTER_MODE, TRIGGER_MASTER_MODE, AUTO_MASTER_MODE
   command void setRadioMode(uint8_t mode);           

   command void setDiscoverable(bool disc);
   command void setEncryption(bool enc);
   command void setAuthentication(bool auth);
   command void setName(char * name);                  // max 16 chars
   command void setPIN(char * name);                   // max 16 chars
   command void setServiceClass(char * class);         // max 4 chars (hex word)
   command void setServiceName(char * name);         // max 16 chars 
   command void setDeviceClass(char * class);         // max 4 chars (hex word)
   command void disableRemoteConfig(bool disableConfig);
   /*
    * rate_factor is baudrate * 0.004096, e.g. to set 115200, pass in "472"
    */
   command void setRawBaudrate(char * rate_factor);      // max 4 chars, must be integer

   /* 
    * provide one of the following as a string argument:  
    * { 1200, 2400, 4800, 9600, 19.2, 38.4, 57.6, 115K, 230K, 460K, 921K } 
    */
   command void setBaudrate(char * new_baud); 

   /* save power by minimising time Inquiry/Page scanning, call these commands from */
   /* your StdControl.init() - module reset necessary for changes to take effect */
   command void setPagingTime(char * hexval_time); // max 4 chars (hex word)
   command void setInquiryTime(char * hexval_time); // max 4 chars (hex word)
   command void resetDefaults();

   /* whether or not it succeeded */
   async event void connectionMade(uint8_t status);
   async event void connectionClosed(uint8_t reason);
   async event void commandModeEnded();
   /*
    * buffered data depends upon line demarcation or eot for this...
    *     event void dataAvailable(uint8_t * data, uint16_t len);
    * and this...
    *    event void discoveryStatus(uint8_t * devices);
    *
    */
   async event void dataAvailable(uint8_t data);
   event void writeDone();
}


tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/bluetooth/RovingNetworks.h000066400000000000000000000013661207233610700265340ustar00rootroot00000000000000/* radioMode in enableBluetooth() can be set to one of the following modes,
 see the RovingNetworks AT command set for further details on module configuration */

#ifndef ROVINGNETWORKS_H
#define ROVINGNETWORKS_H
enum {
  SLAVE_MODE,
  MASTER_MODE,
  TRIGGER_MASTER_MODE,
  AUTO_MASTER_MODE    
};

enum { 
  NADA,
  INITIAL,
  FINAL
};
/*
const char * SETMODE =  "SM,";
const char * SETMASTERMODE =  "SM,1";
const char * SETSLAVEMODE =   "SM,0";
const char * DISCOVERRADIOS = "I,";
const char * DISCOVERRADIOS2 = ",0";

const char * SETFASTBAUD    = "SU,115";
const char * ENTERCOMMANDMODE = "$$$";
const char * SETSLEEPMODE   = "SW,0300";
const char * DIALRADIO      = "C,";
const char * HANGUPRADIO    = "R,1";
const char * WAKERADIO      = "";
*/
#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/bluetooth/RovingNetworksC.nc000066400000000000000000000047201207233610700270050ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 *  Author:  Steve Ayer
 *           February, 2007
 */
/**
 * @author Steve Ayer
 * @author Adrian Burns
 * @date February, 2007
 *
 * @author Mike Healy
 * @date April 20, 2009 - ported to TinyOS 2.x 
 */



configuration RovingNetworksC {
   provides {
      interface StdControl;
      interface Bluetooth;
      interface Init;
   }
}
implementation {
   components 
     RovingNetworksP,
     MainC,
     HplMsp430InterruptC,  
     HplMsp430Usart1C,     
     LedsC;

   StdControl = RovingNetworksP;
   Bluetooth = RovingNetworksP;
   Init = RovingNetworksP;

   RovingNetworksP.UARTControl            -> HplMsp430Usart1C.HplMsp430Usart;
   RovingNetworksP.UARTData               -> HplMsp430Usart1C.HplMsp430UsartInterrupts;
   RovingNetworksP.RTSInterrupt           -> HplMsp430InterruptC.Port16;
   RovingNetworksP.ConnectionInterrupt    -> HplMsp430InterruptC.Port15;
   RovingNetworksP.Leds                   -> LedsC;

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/bluetooth/RovingNetworksP.nc000066400000000000000000000433641207233610700270310ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 *  Author:  Steve Ayer
 *           February, 2007
 */
/**
 * @author Steve Ayer
 * @author Adrian Burns
 * @date February, 2007
 *
 * @author Mike Healy
 * @date April 20, 2009 - ported to TinyOS 2.x 
 */


#include "RovingNetworks.h"
#include "shimmerMessage.h"

module RovingNetworksP {
  provides {
    interface Init;
    interface StdControl;
    interface Bluetooth;
  }
  uses {
    interface HplMsp430Usart as UARTControl;
    interface HplMsp430UsartInterrupts as UARTData;
    interface HplMsp430Interrupt as RTSInterrupt;
    interface HplMsp430Interrupt as ConnectionInterrupt;

    interface Leds;
  }
}

implementation {
  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));
  extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));

  uint8_t radioMode, charsSent, setupStep;
  bool discoverable, authenticate, encrypt, setNameRequest, setPINRequest, runDiscoveryRequest, resetDefaultsRequest,
    setSvcClassRequest, setDevClassRequest, setSvcNameRequest, setRawBaudrate, setBaudrate, disableRemoteConfig, newMode,
    setCustomInquiryTime, setCustomPagingTime;

  /* master mode stuff */
  int masterStep;
  bool deviceConn, btConnected, runningMasterCommands;
  char targetBt[16];

  norace bool transmissionOverflow, messageInProgress;
  char expectedCommandResponse[8], newName[17], newPIN[17], newSvcClass[5], newDevClass[5], newSvcName[17], newRawBaudrate[5],
    newBaudrate[5], newInquiryTime[5], newPagingTime[5];
  
  norace struct Message outgoingMsg;
  norace struct Message incomingMsg;

  task void sendNextChar() {
    if(charsSent < outgoingMsg.length) {
      call UARTControl.tx(msg_get_uint8(&outgoingMsg, charsSent));
      atomic charsSent++;
    } 
    else{
      messageInProgress = FALSE;
      atomic if(!*expectedCommandResponse)
	signal Bluetooth.writeDone();
    }	    
  }
  
  // note max message length is 128 bytes, beyond that msg_append_buf wraps
  command error_t Bluetooth.write(const uint8_t * buf, uint8_t len) { 
    if(messageInProgress)
      return FAIL;

    messageInProgress = TRUE;
    atomic charsSent = 0;
    msg_clear(&outgoingMsg);
    msg_append_buf(&outgoingMsg, buf, len);

    if(!transmissionOverflow){
      post sendNextChar();
    }
	
    return SUCCESS;
  }
    
  void initRN() {
    register uint16_t i;
    /*
     * powerup state is reset == low (true); mike conrad of roving networks sez: 
     * wait about 1/2 s after reset toggle
     */
    TOSH_SET_BT_RESET_PIN();    
    for(i = 0; i< 400; i++)
      TOSH_uwait(5000);

    TOSH_MAKE_BT_PIO_INPUT();   // this is the connection interrupt pin, was default output
    
    call RTSInterrupt.edge(TRUE);  // initially, we look for a connection
    call RTSInterrupt.enable();  // request to send raises when bt has trans overflow
    call RTSInterrupt.clear();
    
    call ConnectionInterrupt.edge(TRUE);  // initially, we look for a connection
    call ConnectionInterrupt.clear();
    call ConnectionInterrupt.enable();  // interrupt upon connection state change (raises when connected, falls when dropped)

    TOSH_CLR_BT_CTS_PIN();     // toggling cts wakes it up
    TOSH_SET_BT_CTS_PIN();     
    TOSH_uwait(5000);
    TOSH_CLR_BT_CTS_PIN();     // tell bt module msp430 is ready
  }

  void setupUART() {
    msp430_uart_union_config_t RN_uart_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, 
						   ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1,listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 0, 
						   urxwie: 0, utxe : 1, urxe :1} };

    call UARTControl.setModeUart(&RN_uart_config); // set to UART mode

#ifdef USE_8MHZ_CRYSTAL           // we need exact divisors, else the thing acts unpredictably
    call UARTControl.setUbr(0x08);
    call UARTControl.setUmctl(0xee);

    /* 4mhz smclk
    call UARTControl.setUbr(0x23);
    call UARTControl.setUmctl(0xd6);
    */
#endif

    /*
     * to run the bt module at 230k, first the application must configure it
     * using its default uart speed of 115200, then reset the uart to 230k here
     * see accompanying bluetoothBaudrateConfiguration.pdf doc for details
     * yes, doc is written for tos-1.x, but setClockRate() is just broken into
     * two calls here in tos-2.x
     *
     call UARTControl.setUbr(0x04);
     call UARTControl.setUmctl(0x82);
    */
    
    call UARTControl.enableTxIntr();
    call UARTControl.enableRxIntr();
  }

  void disableRN() {
    TOSH_CLR_BT_RESET_PIN();
    call UARTControl.disableUart();
    call RTSInterrupt.disable();  
    call ConnectionInterrupt.disable();  
  }

  error_t writeCommand(char * cmd, char * response) {
    atomic strcpy(expectedCommandResponse, response);
    if(call Bluetooth.write(cmd, strlen(cmd)) == FAIL)
      return FAIL;

    return SUCCESS;
  }

  /* 
   * Connect and Disconnect commands are exceptional commands in that 
   * they automatically return to data mode once they are issued 
   */
  error_t writeCommandNoRsp(char * cmd) {
    if(call Bluetooth.write(cmd, strlen(cmd)) == FAIL)
      return FAIL;

    return SUCCESS;
  }

  command void Bluetooth.setRadioMode(uint8_t mode){
    newMode = TRUE;
    radioMode = mode;
  }    

  command void Bluetooth.setDiscoverable(bool disc){
    discoverable = disc;  
  }    

  command void Bluetooth.setEncryption(bool enc){
    encrypt = enc; 
  }    

  command void Bluetooth.setAuthentication(bool auth){
    authenticate = auth;
  }    

  command void Bluetooth.disableRemoteConfig(bool disableConfig){
    disableRemoteConfig = disableConfig;
  }    

  command void Bluetooth.resetDefaults(){
    resetDefaultsRequest = TRUE;
  }    

  command void Bluetooth.setName(char * name){
    setNameRequest = TRUE;
    snprintf(newName, 17, "%s", name);
  }    

  command void Bluetooth.setDeviceClass(char * class){
    setDevClassRequest = TRUE;
    snprintf(newDevClass, 5, "%s", class);
  }    

  command void Bluetooth.setServiceClass(char * class){
    setSvcClassRequest = TRUE;
    snprintf(newSvcClass, 5, "%s", class);
  }    

  command void Bluetooth.setServiceName(char * name){
    setSvcNameRequest = TRUE;
    snprintf(newSvcName, 5, "%s", name);
  }    

  /* 
   * this one makes sense only to roving networks
   * the supplied "rate_factor" is the baudrate * 0.004096
   * this factor must be an integer value...
   */
  command void Bluetooth.setRawBaudrate(char * rate_factor){
    setRawBaudrate = TRUE;
    snprintf(newRawBaudrate, 5, "%s", rate_factor);
  }    

  /* 
   * to set the baudrate of the BT to MSP serial interface 
   * as per RovingNetworks command spec EG "SU,96" or "SU,230"
   * SU, - Baudrate, {1200, 2400, 4800, 9600, 19.2, 
   * 38.4, 57.6, 115K, 230K, 460K, 921K },
   * BUT, the MSP USARTS will not run at > 230K in UART mode, 
   * see MSP user guide
   */
  command void Bluetooth.setBaudrate(char * new_baud){
    setBaudrate = TRUE;
    snprintf(newBaudrate, 5, "%s", new_baud);
  }    

  command void Bluetooth.setPIN(char * PIN){
    setPINRequest = TRUE;
    snprintf(newPIN, 17, "%s", PIN);
  }    

  /* 
   * Sets the Inquiry Scan Window - amount of time device 
   * spends enabling inquiry scan (discoverability).
   * Minimum = (hex word) "0012", corresponding to about 1% duty cycle.
   * Maximum = (hex word) "1000"
   */
  command void Bluetooth.setInquiryTime(char * hexval_time){
    setCustomInquiryTime = TRUE;
    snprintf(newInquiryTime, 5, "%s", hexval_time);
  }    

  /* 
   * Sets the Paging Scan Window - amount of time device 
   * spends enabling page scan (connectability).
   * Minimum = (hex word) "0012", corresponding to about 1% duty cycle.
   * Maximum = (hex word) "1000"
   */
  command void Bluetooth.setPagingTime(char * hexval_time){
    setCustomPagingTime = TRUE;
    snprintf(newPagingTime, 5, "%s", hexval_time);
  }    

  /* 
   * IMPORTANT: Connect and Disconnect commands are exceptional commands 
   * in that they automatically return to data mode once they are issued
   * so no response and no "---" needed to return to data mode 
   */
  task void runMasterCommands()
  {
    char commandbuf[32];
    switch(masterStep){
    case 0:
      masterStep++;
      writeCommand("$$$", "CMD");
      break;
    case 1:
      masterStep++;
      // Connect
      if(deviceConn && (!btConnected)){
	masterStep = -1;
	sprintf(commandbuf, "C,%s\r", targetBt);
	writeCommandNoRsp(commandbuf);
	runningMasterCommands = FALSE;
	break;
      }
    case 2:
      masterStep++;
      // Disconnect
      if((!deviceConn) && (btConnected)) {
	masterStep = -1;
	writeCommandNoRsp("K,\r");
	runningMasterCommands = FALSE;          
	break;
      }
    case 3:
      /* not needed for connect and disconnect commands */
      masterStep++;
      // exit command mode
      writeCommand("---\r", "END");
      break;
    default:
      deviceConn = FALSE;
      runningMasterCommands = FALSE;
      break;
    }
  }

  command error_t Bluetooth.connect(uint8_t *addr)
  {
    masterStep = 0;
    deviceConn = runningMasterCommands = TRUE;
    strcpy(targetBt, addr);
    post runMasterCommands();
    return SUCCESS;
  }

  command error_t Bluetooth.disconnect()
  {
    register uint16_t i;
    /*
     * Delay: If any bytes are seen before or after $$$ in a 1 
     * second window, command mode will not be entered and these 
     * bytes will be passed on to other side 
     */
    for(i = 0; i < 1600 ; i++)
      TOSH_uwait(5000);

    masterStep = 0;
    deviceConn = FALSE;
    runningMasterCommands = TRUE;
    post runMasterCommands();
    
    return SUCCESS;
  }

  /*
   * this one is weird.  we need to do one at a time; the only way
   * to get back is if the previous command responds properly and calls
   * back to runSetCommands().  so if we get into command mode, each time here 
   * we have to send another command.  we keep falling down the switch 
   * until we find it, eventually hitting end.
   */
  task void runSetCommands() {
    char commandbuf[32];

    switch(setupStep) {
    case 0:
      setupStep++;
      writeCommand("$$$", "CMD");
      break;
    case 1:
      setupStep++;
      // reset factory defaults
      if(resetDefaultsRequest){
	writeCommand("SF,1\r", "AOK");
	break;
      }
    case 2:
      setupStep++;
      // default is slave (== 0), otherwise set mode
      if(newMode){
	sprintf(commandbuf, "SM,%d\r", radioMode);
	writeCommand(commandbuf, "AOK");
	break;
      }
    case 3:
      setupStep++;
      /*
       * device is discoverable with a non-zero inquiry scan window
       * default "time" is 0x0200 (units unspecified)
       */
      if(!discoverable){
	writeCommand("SI,0000\r", "AOK");
	break;
      }
    case 4:
      setupStep++;
      // device default is off
      if(authenticate){
	writeCommand("SA,1\r", "AOK");
	break;
      }
    case 5:
      setupStep++;
      // device default is off
      if(encrypt){
	writeCommand("SE,1\r", "AOK");
	break;
      }
    case 6:
      setupStep++;
      // default is none
      if(setNameRequest){
	sprintf(commandbuf, "SN,%s\r", newName);
	writeCommand(commandbuf, "AOK");
	break;
      }
    case 7:
      setupStep++;
      // default is none
      if(setPINRequest){
	sprintf(commandbuf, "SP,%s\r", newPIN);
	writeCommand(commandbuf, "AOK");
	break;
      }
    case 8:
      setupStep++;
      if(setSvcClassRequest){
	sprintf(commandbuf, "SC,%s\r", newSvcClass);
	writeCommand(commandbuf, "AOK");
	break;
      }
    case 9:
      setupStep++;
      if(setDevClassRequest){
	sprintf(commandbuf, "SD,%s\r", newDevClass);
	writeCommand(commandbuf, "AOK");
	break;
      }
    case 10:
      setupStep++;
      if(setSvcNameRequest){
	sprintf(commandbuf, "SS,%s\r", newSvcName);
	writeCommand(commandbuf, "AOK");
	break;
      }
    case 11:
      setupStep++;
      if(setRawBaudrate){
	// set the baudrate to suit the MSP430 running at 8Mhz
	sprintf(commandbuf, "SZ,%s\r", newRawBaudrate);
	writeCommand(commandbuf, "AOK");
	break;
      }
    case 12:
      setupStep++;
      if(disableRemoteConfig){
	// disable remote configuration to enhance throughput
	writeCommand("ST,0\r", "AOK");
      }
      else{
	// disable remote configuration to enhance throughput
	writeCommand("ST,60\r", "AOK");
      }
      break;
    case 13:
      setupStep++;
      if(setCustomInquiryTime){
	sprintf(commandbuf, "SI,%s\r", newInquiryTime);
	writeCommand(commandbuf, "AOK");
      }
      else{
	// to save power only leave inquiry on for approx 40msec (every 1.28 secs)
	writeCommand("SI,0040\r", "AOK");
      }
      break;
    case 14:
      setupStep++;
      if(setCustomPagingTime){
	sprintf(commandbuf, "SJ,%s\r", newPagingTime);
	writeCommand(commandbuf, "AOK");
      }
      else{
	// to save power only leave paging on for approx 80msec (every 1.28 secs)
	writeCommand("SJ,0080\r", "AOK");
      }
      break;
    case 15:
      setupStep++;
      if(setBaudrate){
        // set the baudrate to suit the MSP430 running at 8Mhz
        sprintf(commandbuf, "SU,%s\r", newBaudrate);
        writeCommand(commandbuf, "AOK");
        break;
      }

    case 16:
      setupStep++;
      // exit command mode
      writeCommand("---\r", "END");
      break;
    default:
      break;
    }
  }  

  command error_t Init.init(){
    TOSH_MAKE_BT_RTS_INPUT();      
    
    TOSH_MAKE_BT_RXD_INPUT();
    TOSH_SEL_BT_RXD_MODFUNC();
    
    // this powers it up on models so equipped, otherwise harmless 
#ifdef BT_PWR_LOGIC_TRUE
    TOSH_SET_SW_BT_PWR_N_PIN();
#else	
    TOSH_CLR_SW_BT_PWR_N_PIN();   
#endif
    
    newMode = FALSE;
    radioMode = SLAVE_MODE;   
    discoverable = TRUE;
    authenticate = FALSE;
    encrypt = FALSE;
    resetDefaultsRequest = FALSE;
    setNameRequest = FALSE;
    setPINRequest = FALSE;
    setSvcClassRequest = FALSE;
    setSvcNameRequest = FALSE;
    setDevClassRequest = FALSE;
    setRawBaudrate = FALSE;
    disableRemoteConfig = FALSE;
    setCustomInquiryTime = FALSE;
    setCustomPagingTime = FALSE;
    setBaudrate = FALSE;

    /* connect/disconnect commands */
    deviceConn = btConnected = runningMasterCommands = FALSE;
    masterStep = setupStep = 0;

    atomic *expectedCommandResponse = 0;   // NULL pointer
    transmissionOverflow = FALSE, messageInProgress = FALSE;

    initRN();
    
    setupUART();

    return SUCCESS;
  }

  command error_t StdControl.start(){
    TOSH_uwait(15000);
    post runSetCommands();

    return SUCCESS;
  }

  command error_t StdControl.stop(){
    disableRN();
    
#ifdef BT_PWR_LOGIC_TRUE
    TOSH_CLR_SW_BT_PWR_N_PIN();
#else	
    TOSH_SET_SW_BT_PWR_N_PIN();   
#endif
    
    return SUCCESS;
  }

  /* commands useful for Master(client) applications only */
  /* do an BT Inquiry to discover all listening devices within range */
  command void Bluetooth.discoverDevices() {
    if(!radioMode)     // we're a slave, shouldn't do this
      return;

    runDiscoveryRequest = TRUE;
  }    

  async event void UARTData.rxDone(uint8_t data) {        
    if(!*expectedCommandResponse){
      signal Bluetooth.dataAvailable(data);
    }
    else{
      if(isalpha(data)){
	msg_append_uint8(&incomingMsg, data);
	if(msg_cmp_buf(&incomingMsg,            // which is affirmative
		       0, 
		       expectedCommandResponse,
		       strlen(expectedCommandResponse))){
	  msg_clear(&incomingMsg);	
	  if(!strcmp(expectedCommandResponse, "END"))
	    signal Bluetooth.commandModeEnded();  //call Leds.greenOn();
	  else if(runningMasterCommands)  
	    post runMasterCommands();
	  else
	    post runSetCommands();
	  atomic *expectedCommandResponse = '\0';
	}
      }
      else
	msg_clear(&incomingMsg);
    }
  }

  async event void UARTData.txDone() {
    if (!transmissionOverflow) {
      post sendNextChar();
    }
  }
    
  // Interrupt associated with radio flow control.  Ensures that there are no buffer overflows.
  async event void RTSInterrupt.fired() {
    if (call RTSInterrupt.getValue() == TRUE) {
      transmissionOverflow = 1;
      call RTSInterrupt.edge(FALSE);
    } 
    else{
      atomic transmissionOverflow = 0;
      post sendNextChar();
      call RTSInterrupt.edge(TRUE);
    }
    atomic call RTSInterrupt.clear();
  }
  
  async event void ConnectionInterrupt.fired() {
    if(call ConnectionInterrupt.getValue() == TRUE){
      btConnected = TRUE;
      call ConnectionInterrupt.edge(FALSE);
      signal Bluetooth.connectionMade(SUCCESS);
    }
    else{
      btConnected = FALSE;
      call ConnectionInterrupt.edge(TRUE);
      signal Bluetooth.connectionClosed(0);
    }
    atomic call ConnectionInterrupt.clear();
  }
}
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%%EOFtinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420/000077500000000000000000000000001207233610700222445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420/CC2420GpioCaptureC.nc000066400000000000000000000067741207233610700256470ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 * @author Jonathan Hui
 * @author Joe Polastre
 * @author Steve Ayer/Miklos Maroti
 * @date   February, 2011
 *
 * re-named indicating that this HAL module is specifically required to handle anomalies in the 
 * cc2420 stack that require sfd capture to happen on a timerb pin;  designs that use a timera pin 
 * need this code to resolve the aliasing between timestamps from 32khz and 1mhz timers.
 * thanks to miklos for providing this re-written captured event handler as a straight-forward work-around!
 */

generic module CC2420GpioCaptureC() @safe() {

  provides interface GpioCapture as Capture;
  uses interface Msp430TimerControl;
  uses interface Msp430Capture;
  uses interface HplMsp430GeneralIO as GeneralIO;
  uses interface LocalTime as LocalTime32khz;
  uses interface LocalTime as LocalTimeMicro;
}

implementation {

  error_t enableCapture( uint8_t mode ) {
    atomic {
      call Msp430TimerControl.disableEvents();
      call GeneralIO.selectModuleFunc();
      call Msp430TimerControl.clearPendingInterrupt();
      call Msp430Capture.clearOverflow();
      call Msp430TimerControl.setControlAsCapture( mode );
      call Msp430TimerControl.enableEvents();
    }
    return SUCCESS;
  }

  async command error_t Capture.captureRisingEdge() {
    return enableCapture( MSP430TIMER_CM_RISING );
  }

  async command error_t Capture.captureFallingEdge() {
    return enableCapture( MSP430TIMER_CM_FALLING );
  }

  async command void Capture.disable() {
    atomic {
      call Msp430TimerControl.disableEvents();
      call GeneralIO.selectIOFunc();
    }
  }

  async event void Msp430Capture.captured(uint16_t capturedMicro) {
    uint16_t elapsedMicro;
    uint16_t captured32khz;
    
    atomic {
      elapsedMicro = call LocalTimeMicro.get() - capturedMicro;
      captured32khz = call LocalTime32khz.get();
    }
    
    captured32khz -= elapsedMicro >> 5;
    
    signal Capture.captured(captured32khz);
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420/HplCC2420AlarmC.nc000066400000000000000000000040231207233610700251060ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:24 $
 */

generic configuration HplCC2420AlarmC() {

  provides interface Init;
  provides interface Alarm as Alarm32khz32;

}

implementation {

  components new Alarm32khz32C();

  Init = Alarm32khz32C;
  Alarm32khz32 = Alarm32khz32C;
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420/HplCC2420InterruptsC.nc000066400000000000000000000061721207233610700262400ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of interrupts and captures for the ChipCon
 * CC2420 radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:25 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 */

configuration HplCC2420InterruptsC {

  provides interface GpioCapture as CaptureSFD;
  provides interface GpioInterrupt as InterruptCCA;
  provides interface GpioInterrupt as InterruptFIFOP;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components Msp430TimerC;
  components new CC2420GpioCaptureC() as CaptureSFDC;
  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlA1;
  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureA1;
  CaptureSFDC.GeneralIO -> GeneralIOC.Port12;

  components Counter32khz32C as Counter, new CounterToLocalTimeC(T32khz);
  CounterToLocalTimeC.Counter -> Counter;
  CaptureSFDC.LocalTime32khz -> CounterToLocalTimeC;

  components CounterMicro32C, new CounterToLocalTimeC(TMicro) as CounterMicroToLocalTime;
  CounterMicroToLocalTime.Counter -> CounterMicro32C;
  CaptureSFDC.LocalTimeMicro -> CounterMicroToLocalTime;

  components HplMsp430InterruptC;
  components new Msp430InterruptC() as InterruptCCAC;
  components new Msp430InterruptC() as InterruptFIFOPC;
  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port27;
  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port26;

  CaptureSFD = CaptureSFDC.Capture;
  InterruptCCA = InterruptCCAC.Interrupt;
  InterruptFIFOP = InterruptFIFOPC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420/HplCC2420PinsC.nc000066400000000000000000000055351207233610700247740ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for the ChipCon CC2420
 * radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:25 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 */

configuration HplCC2420PinsC {

  provides interface GeneralIO as CCA;
  provides interface GeneralIO as CSN;
  provides interface GeneralIO as FIFO;
  provides interface GeneralIO as FIFOP;
  provides interface GeneralIO as RSTN;
  provides interface GeneralIO as SFD;
  provides interface GeneralIO as VREN;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components new Msp430GpioC() as CCAM;
  components new Msp430GpioC() as CSNM;
  components new Msp430GpioC() as FIFOM;
  components new Msp430GpioC() as FIFOPM;
  components new Msp430GpioC() as RSTNM;
  components new Msp430GpioC() as SFDM;
  components new Msp430GpioC() as VRENM;

  CCAM -> GeneralIOC.Port27;
  CSNM -> GeneralIOC.Port54;
  FIFOM -> GeneralIOC.Port10;
  FIFOPM -> GeneralIOC.Port26;
  RSTNM -> GeneralIOC.Port57;
  SFDM -> GeneralIOC.Port12;
  VRENM -> GeneralIOC.Port56;

  CCA = CCAM;
  CSN = CSNM;
  FIFO = FIFOM;
  FIFOP = FIFOPM;
  RSTN = RSTNM;
  SFD = SFDM;
  VREN = VRENM;
  
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420/HplCC2420SpiC.nc000066400000000000000000000041541207233610700246120ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the SPI bus for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:25 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 */

generic configuration HplCC2420SpiC() {
  
  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;
  
}

implementation {

  components new Msp430Spi1C() as SpiC;
  
  Resource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;
  
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/000077500000000000000000000000001207233610700224345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/Msp430ClockP.nc000066400000000000000000000153301207233610700250420ustar00rootroot00000000000000//$Id: Msp430ClockP.nc,v 1.1 2011-04-27 13:30:12 ayer Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Cory Sharp 
 * @author Vlado Handziski 
 * @author Janos Sallai
 */

/**
This file programs the msp430 time subsystem such that SMCLK=DCO,
and TimerA=SMCLK/4. This allows for faster peripheral access, since
I/O subsystem is clocked from SMCKL.
*/

#include 

#include 

module Msp430ClockP @safe()
{
  provides interface Init;
  provides interface Msp430ClockInit;
  provides interface McuPowerOverride;
}
implementation
{
  MSP430REG_NORACE(IE1);
  MSP430REG_NORACE(TACTL);
  MSP430REG_NORACE(TAIV);
  MSP430REG_NORACE(TBCTL);
  MSP430REG_NORACE(TBIV);

  enum
  {
    ACLK_CALIB_PERIOD = 8,
    TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
  };

  async command mcu_power_t McuPowerOverride.lowestState() {
    return MSP430_POWER_LPM3;
  }

  command void Msp430ClockInit.defaultSetupDcoCalibrate()
  {
  
    // --- setup ---

    TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
    TBCTL = TBSSEL0 | MC1;
    BCSCTL1 = XT2OFF | RSEL2;
    BCSCTL2 = 0;
    TBCCTL0 = CM0;
   }
    
  command void Msp430ClockInit.defaultInitClocks()
  {
    // BCSCTL1
    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
    // .XTS = 0; set low frequency mode for LXFT1
    // .DIVA = 0; set the divisor on ACLK to 1
    // .RSEL, do not modify
    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));

    // BCSCTL2
    // .SELM = 0; select DCOCLK as source for MCLK
    // .DIVM = 0; set the divisor of MCLK to 1
    // .SELS = 0; select DCOCLK as source for SCLK
    // .DIVS = 0; set the divisor of SCLK to 1
    // .DCOR = 0; select internal resistor for DCO
    BCSCTL2 = 0;

    // IE1.OFIE = 0; no interrupt for oscillator fault
    CLR_FLAG( IE1, OFIE );
  }

  command void Msp430ClockInit.defaultInitTimerA()
  {
    TAR = 0;

    // TACTL
    // .TACLGRP = 0; each TACL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TASSEL = 2; source SMCLK = DCO
    // .ID = 2; input divisor of 4
    // .MC = 0; initially disabled
    // .TACLR = 0; reset timer A
    // .TAIE = 1; enable timer A interrupts
    TACTL = TASSEL1 | ID1 | TAIE;
  }

  command void Msp430ClockInit.defaultInitTimerB()
  {
    TBR = 0;

    // TBCTL
    // .TBCLGRP = 0; each TBCL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TBSSEL = 1; source ACLK
    // .ID = 0; input divisor of 1
    // .MC = 0; initially disabled
    // .TBCLR = 0; reset timer B
    // .TBIE = 1; enable timer B interrupts
    TBCTL = TBSSEL0 | TBIE;
  }

  default event void Msp430ClockInit.setupDcoCalibrate()
  {
    call Msp430ClockInit.defaultSetupDcoCalibrate();
  }
  
  default event void Msp430ClockInit.initClocks()
  {
    call Msp430ClockInit.defaultInitClocks();
  }

  default event void Msp430ClockInit.initTimerA()
  {
    call Msp430ClockInit.defaultInitTimerA();
  }

  default event void Msp430ClockInit.initTimerB()
  {
    call Msp430ClockInit.defaultInitTimerB();
  }


  void startTimerA()
  {
    // TACTL.MC = 2; continuous mode
    TACTL = MC1 | (TACTL & ~(MC1|MC0));
  }

  void stopTimerA()
  {
    //TACTL.MC = 0; stop timer B
    TACTL = TACTL & ~(MC1|MC0);
  }

  void startTimerB()
  {
    // TBCTL.MC = 2; continuous mode
    TBCTL = MC1 | (TBCTL & ~(MC1|MC0));
  }

  void stopTimerB()
  {
    //TBCTL.MC = 0; stop timer B
    TBCTL = TBCTL & ~(MC1|MC0);
  }

  void set_dco_calib( int calib )
  {
    BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
    DCOCTL = calib & 0xff;
  }

  uint16_t test_calib_busywait_delta( int calib )
  {
    int8_t aclk_count = 2;
    uint16_t dco_prev = 0;
    uint16_t dco_curr = 0;

    set_dco_calib( calib );

    while( aclk_count-- > 0 )
    {
      TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt
      TBCCTL0 &= ~CCIFG; // clear pending interrupt
      while( (TBCCTL0 & CCIFG) == 0 ); // busy wait
      dco_prev = dco_curr;
      dco_curr = TAR;
    }

    return dco_curr - dco_prev;
  }

  // busyCalibrateDCO
  // Should take about 9ms if ACLK_CALIB_PERIOD=8.
  // DCOCTL and BCSCTL1 are calibrated when done.
  void busyCalibrateDco()
  {
    // --- variables ---
    int calib;
    int step;

    // --- calibrate ---

    // Binary search for RSEL,DCO,DCOMOD.
    // It's okay that RSEL isn't monotonic.

    for( calib=0,step=0x800; step!=0; step>>=1 )
    {
      // if the step is not past the target, commit it
      if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
        calib |= step;
    }

    // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
    if( (calib & 0x0e0) == 0x0e0 )
      calib &= ~0x01f;

    set_dco_calib( calib );
  }

  command error_t Init.init()
  {
    // Reset timers and clear interrupt vectors
    TACTL = TACLR;
    TAIV = 0;
    TBCTL = TBCLR;
    TBIV = 0;

    atomic
    {
      signal Msp430ClockInit.setupDcoCalibrate();
      busyCalibrateDco();
      signal Msp430ClockInit.initClocks();
      signal Msp430ClockInit.initTimerA();
      signal Msp430ClockInit.initTimerB();
      startTimerA();
      startTimerB();
    }

    return SUCCESS;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/README.txt000066400000000000000000000023111207233610700241270ustar00rootroot00000000000000CC2420X is an alternative radio stack for the TI CC2420 radio, using the
rfxlink library (lib/rfxlink). The stack is IEEE802.15.4 compliant. All
rfxlink features are supported. See lib/rfxlink/README.txt for details.

The stack can be used with microsecond-precision timestamping, as well as
with 32khz timestamping. 

To use this stack with microsecond precision timestamping configuration,
compile the application with the cc2420x extra:

make telosb cc2420x

To use this stack with 32khz precision timestamping configuration, add
the following lines to the Makefile:

make telosb cc2420x_32khz

Remarks:
- This stack programs the msp430 clock subsystem differently than the
  default cc2420 stack. In particular, SMCLK is ticking at 4MHz, which
  allows for faster peripheral access.
- Microsecond precision timestamping requires that TimerB is set to
  SMCLK/4, therefore TimerA must be configured as the 32khz clock (ACLK).
  Since TimerA has only three compare registers, this limits the number
  of physical (that is, unvirtualized) 32kHz alarms in the system. (This
  is not an issue if 32khz timestamping is used).
- 32khz timestamping is not interoperable with other devices (e.g. iris).
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/ShimmerSerialP.nc000066400000000000000000000043171207233610700256470ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

/**
 We need to set the proper USART config values since SMCLK is configured to
 tick at 4MHz (SMCLK=DCO).
 */

module ShimmerSerialP {
  provides interface StdControl;
  provides interface Msp430UartConfigure;
  uses interface Resource;
}
implementation {
  enum {
// from http://www.daycounter.com/Calculators/MSP430-Uart-Calculator.phtml
  UBR_4MHZ_4800=0x0369,   UMCTL_4MHZ_4800=0xfb,
  UBR_4MHZ_9600=0x01b4,   UMCTL_4MHZ_9600=0xdf,
  UBR_4MHZ_57600=0x0048,  UMCTL_4MHZ_57600=0xfb,
  UBR_4MHZ_115200=0x0024, UMCTL_4MHZ_115200=0x29,

  UBR_3_7MHZ_115200=0x0020, UMCTL_3_7MHZ_115200=0x00,

 };  	
  
  msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_4MHZ_115200, umctl: UBR_4MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };

  command error_t StdControl.start(){
    return call Resource.immediateRequest();
  }
  command error_t StdControl.stop(){
    call Resource.release();
    return SUCCESS;
  }
  event void Resource.granted(){}

  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
    return &msp430_uart_telos_config;
  }
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/t32khz/000077500000000000000000000000001207233610700235615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/t32khz/HplCC2420XC.nc000066400000000000000000000055131207233610700256030ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi1C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port27;
	CSNM -> IO.Port54;
	FIFOM -> IO.Port10;
	FIFOPM -> IO.Port26;
	RSTNM -> IO.Port57;
	SFDM -> IO.Port12;
	VRENM -> IO.Port56;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	// capture
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlA1;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureA1;
	GpioCaptureC.GeneralIO -> IO.Port12;
	SfdCapture = GpioCaptureC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port26;
	FifopInterrupt = FifopInterruptC.Interrupt; 


	// alarm
	components new Alarm32khz16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTime32khzC;
	LocalTimeRadio = LocalTime32khzC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/t32khz/RadioConfig.h000066400000000000000000000042611207233610700261210ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include 
//#include 

/* This is the default value of the PA_POWER field of the TXCTL register. */
#ifndef CC2420X_DEF_RFPOWER
#define CC2420X_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the FSCTRL register. */
#ifndef CC2420X_DEF_CHANNEL
#define CC2420X_DEF_CHANNEL	11
#endif

/* The number of microseconds a sending micaz mote will wait for an acknowledgement */
#ifndef SOFTWAREACK_TIMEOUT
#define SOFTWAREACK_TIMEOUT	800
#endif

/**
 * This is the timer type of the radio alarm interface
 */
typedef T32khz TRadio;
typedef uint16_t tradio_size;

/**
 * The number of radio alarm ticks per one microsecond (0.9216).
 * We use integers and no parentheses just to make deputy happy.
 * Ok, further hacks were required for deputy, I removed 00 from the
 * beginning and end to be able to handle longer wait periods.
 */
#define RADIO_ALARM_MICROSEC 1/32

/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
#define RADIO_ALARM_MILLI_EXP	5

#endif//__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/t32khz/am/000077500000000000000000000000001207233610700241565ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/t32khz/am/ActiveMessageC.nc000066400000000000000000000040641207233610700273270ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#include 

configuration ActiveMessageC
{
	provides
	{
		interface SplitControl;

		interface AMSend[uint8_t id];
		interface Receive[uint8_t id];
		interface Receive as Snoop[uint8_t id];
		interface SendNotifier[am_id_t id];

		interface Packet;
		interface AMPacket;

		interface PacketAcknowledgements;
		interface LowPowerListening;
		interface PacketLink;
		interface RadioChannel;

		interface PacketTimeStamp as PacketTimeStamp32khz;
		interface PacketTimeStamp as PacketTimeStampMilli;
	}
}

implementation
{
	components CC2420XActiveMessageC as MessageC;

	SplitControl = MessageC;

	AMSend = MessageC;
	Receive = MessageC.Receive;
	Snoop = MessageC.Snoop;
	SendNotifier = MessageC;

	Packet = MessageC;
	AMPacket = MessageC;

	PacketAcknowledgements = MessageC;
	LowPowerListening = MessageC;
	PacketLink = MessageC;
	RadioChannel = MessageC;

	PacketTimeStampMilli = MessageC.PacketTimeStampMilli;
	PacketTimeStamp32khz = MessageC.PacketTimeStampRadio;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/t32khz/am/TimeSyncMessageC.nc000066400000000000000000000041441207233610700276460ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#include 

configuration TimeSyncMessageC
{
	provides
	{
		interface SplitControl;

		interface Receive[uint8_t id];
		interface Receive as Snoop[am_id_t id];
		interface Packet;
		interface AMPacket;

		interface PacketTimeStamp as PacketTimeStampRadio;
		interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketRadio;

		interface PacketTimeStamp as PacketTimeStampMilli;
		interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketMilli;
	}
}

implementation
{
	components CC2420XTimeSyncMessageC as MessageC;
  
	SplitControl	= MessageC;
  	Receive		= MessageC.Receive;
	Snoop		= MessageC.Snoop;
	Packet		= MessageC;
	AMPacket	= MessageC;

	PacketTimeStampRadio	= MessageC;
	TimeSyncAMSendRadio	= MessageC;
	TimeSyncPacketRadio	= MessageC;

	PacketTimeStampMilli	= MessageC;
	TimeSyncAMSendMilli	= MessageC;
	TimeSyncPacketMilli	= MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/000077500000000000000000000000001207233610700237315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/HplCC2420XC.nc000066400000000000000000000055131207233610700257530ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi1C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port27;
	CSNM -> IO.Port54;
	FIFOM -> IO.Port10;
	FIFOPM -> IO.Port26;
	RSTNM -> IO.Port57;
	SFDM -> IO.Port12;
	VRENM -> IO.Port56;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	// capture
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlA1;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureA1;
	GpioCaptureC.GeneralIO -> IO.Port12;
 	SfdCapture = GpioCaptureC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port26;
	FifopInterrupt = FifopInterruptC.Interrupt; 

	// alarm
	components new AlarmMicro16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTimeMicroC;
	LocalTimeRadio = LocalTimeMicroC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/McuSleepC.nc000066400000000000000000000114771207233610700261050ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * Implementation of TEP 112 (Microcontroller Power Management) for
 * the MSP430. Code for low power calculation copied from older
 * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp.
 *
 *
 * @author Philip Levis
 * @author Vlado Handziski
 * @author Joe Polastre
 * @author Cory Sharp
 * @author Janos Sallai
 * @date   October 26, 2005
 * @see  Please refer to TEP 112 for more information about this component and its
 *          intended use.
 *
 */

/**
 We need prevent the MCU from sleeping when the microsecond alarm is set.
 */

module McuSleepC @safe() {
  provides {
    interface McuSleep;
    interface McuPowerState;
  }
  uses {
    interface McuPowerOverride;
  }
}
implementation {
  bool dirty = TRUE;
  mcu_power_t powerState = MSP430_POWER_ACTIVE;

  /* Note that the power values are maintained in an order
   * based on their active components, NOT on their values.*/
  // NOTE: This table should be in progmem.
  const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = {
    0,                                       // ACTIVE
    SR_CPUOFF,                               // LPM0
    SR_SCG0+SR_CPUOFF,                       // LPM1
    SR_SCG1+SR_CPUOFF,                       // LPM2
    SR_SCG1+SR_SCG0+SR_CPUOFF,               // LPM3
    SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF,     // LPM4
  };
    
  mcu_power_t getPowerState() {
    mcu_power_t pState = MSP430_POWER_LPM4;
    // TimerA, USART0, USART1 check
    if ((((TBCCTL0 & CCIE) ||
	  (TBCCTL1 & CCIE) ||
	  (TBCCTL2 & CCIE)) &&
	 ((TBCTL & TASSEL_3) == TASSEL_2)) ||
	((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) ||
	((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
#ifdef __msp430_have_usart0_with_i2c
	 // registers end in "nr" to prevent nesC race condition detection
	 || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
	     (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C))
#endif
	)
      pState = MSP430_POWER_LPM1;
    
#ifdef __msp430_have_adc12
    // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE
    if (ADC12CTL0 & ADC12ON){
      if (ADC12CTL1 & ADC12SSEL_2){
        // sample or conversion operation with MCLK or SMCLK
        if (ADC12CTL1 & ADC12SSEL_1)
          pState = MSP430_POWER_LPM1;
        else
          pState = MSP430_POWER_ACTIVE;
      } else if ((ADC12CTL1 & SHS0) && ((TACTL & TASSEL_3) == TASSEL_2)){
        // Timer A is used as sample-and-hold source and SMCLK sources Timer A
        // (Timer A interrupts are always disabled when it is used by the 
        // ADC subsystem, that's why the Timer check above is not enough)
	      pState = MSP430_POWER_LPM1;
      }
    }
#endif
    
    return pState;
  }
  
  void computePowerState() {
    powerState = mcombine(getPowerState(),
			  call McuPowerOverride.lowestState());
  }
  
  async command void McuSleep.sleep() {
    uint16_t temp;
    if (dirty) {
      computePowerState();
      //dirty = 0;
    }
    temp = msp430PowerBits[powerState] | SR_GIE;
    __asm__ __volatile__( "bis  %0, r2" : : "m" (temp) );
    // All of memory may change at this point...
    asm volatile ("" : : : "memory");
    __nesc_disable_interrupt();
  }

  async command void McuPowerState.update() {
    atomic dirty = 1;
  }

 default async command mcu_power_t McuPowerOverride.lowestState() {
   return MSP430_POWER_LPM4;
 }

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430ClockP.nc000066400000000000000000000145131207233610700263410ustar00rootroot00000000000000//$Id: Msp430ClockP.nc,v 1.1 2011-04-27 13:30:31 ayer Exp $

/* "Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/**
 * @author Cory Sharp 
 * @author Vlado Handziski 
 * @author Janos Sallai
 */

/**
This file programs the msp430 time subsystem such that SMCLK=DCO, TimerA=ACLK,
and TimerB=SMCLK/4. This allows for faster peripheral access, since
I/O subsystem is clocked from SMCKL. Also, this allows for microsecond-precision
capture of the cc2420 SFD.
*/
 
#include 

#include 

module Msp430ClockP @safe()
{
  provides interface Init;
  provides interface Msp430ClockInit;
  provides interface McuPowerOverride;
}
implementation
{
  MSP430REG_NORACE(IE1);
  MSP430REG_NORACE(TACTL);
  MSP430REG_NORACE(TAIV);
  MSP430REG_NORACE(TBCTL);
  MSP430REG_NORACE(TBIV);

  enum
  {
    ACLK_CALIB_PERIOD = 8,
    TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
  };

  async command mcu_power_t McuPowerOverride.lowestState() {
    return MSP430_POWER_LPM3;
  }

  command void Msp430ClockInit.defaultSetupDcoCalibrate()
  {
  
    // --- setup ---

    TACTL = TASSEL0 | MC1; // source ACLK, continuous mode, everything else 0
    TBCTL = TBSSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
    BCSCTL1 = XT2OFF | RSEL2;
    BCSCTL2 = 0;
    TBCCTL0 = CM0;
   }
    
  command void Msp430ClockInit.defaultInitClocks()
  {
    // BCSCTL1
    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
    // .XTS = 0; set low frequency mode for LXFT1
    // .DIVA = 0; set the divisor on ACLK to 1
    // .RSEL, do not modify
    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));

    // BCSCTL2
    // .SELM = 0; select DCOCLK as source for MCLK
    // .DIVM = 0; set the divisor of MCLK to 1
    // .SELS = 0; select DCOCLK as source for SCLK
    // .DIVS = 0; set the divisor of SCLK to 1
    // .DCOR = 0; select internal resistor for DCO
    BCSCTL2 = 0;

    // IE1.OFIE = 0; no interrupt for oscillator fault
    CLR_FLAG( IE1, OFIE );
  }

  command void Msp430ClockInit.defaultInitTimerA()
  {
    TAR = 0;

    // TACTL
    // .TACLGRP = 0; each TACL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TASSEL = 1; source ACLK
    // .ID = 0; input divisor of 1
    // .MC = 0; initially disabled
    // .TACLR = 0; reset timer A
    // .TAIE = 1; enable timer A interrupts
    TACTL = TASSEL0 | TAIE;
  }

  command void Msp430ClockInit.defaultInitTimerB()
  {
    TBR = 0;

    // TBCTL
    // .TBCLGRP = 0; each TBCL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TBSSEL = 2; source SMCLK
    // .ID = 2; input divisor of 4
    // .MC = 0; initially disabled
    // .TBCLR = 0; reset timer B
    // .TBIE = 1; enable timer B interrupts
    TBCTL = TBSSEL1 | ID1 | TBIE;
  }

  default event void Msp430ClockInit.setupDcoCalibrate()
  {
    call Msp430ClockInit.defaultSetupDcoCalibrate();
  }
  
  default event void Msp430ClockInit.initClocks()
  {
    call Msp430ClockInit.defaultInitClocks();
  }

  default event void Msp430ClockInit.initTimerA()
  {
    call Msp430ClockInit.defaultInitTimerA();
  }

  default event void Msp430ClockInit.initTimerB()
  {
    call Msp430ClockInit.defaultInitTimerB();
  }


  void startTimerA()
  {
    // TACTL.MC = 2; continuous mode
    TACTL = MC1 | (TACTL & ~(MC1|MC0));
  }

  void stopTimerA()
  {
    //TACTL.MC = 0; stop timer A
    TACTL = TACTL & ~(MC1|MC0);
  }

  void startTimerB()
  {
    // TBCTL.MC = 2; continuous mode
    TBCTL = MC1 | (TBCTL & ~(MC1|MC0));
  }

  void stopTimerB()
  {
    //TBCTL.MC = 0; stop timer B
    TBCTL = TBCTL & ~(MC1|MC0);
  }

  void set_dco_calib( int calib )
  {
    BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
    DCOCTL = calib & 0xff;
  }

  uint16_t test_calib_busywait_delta( int calib )
  {
    int8_t aclk_count = 2;
    uint16_t dco_prev = 0;
    uint16_t dco_curr = 0;

    set_dco_calib( calib );

    while( aclk_count-- > 0 )
    {
      TACCR0 = TAR + ACLK_CALIB_PERIOD; // set next interrupt
      TACCTL0 &= ~CCIFG; // clear pending interrupt
      while( (TACCTL0 & CCIFG) == 0 ); // busy wait
      dco_prev = dco_curr;
      dco_curr = TBR;
    }

    return dco_curr - dco_prev;
  }

  // busyCalibrateDCO
  // Should take about 9ms if ACLK_CALIB_PERIOD=8.
  // DCOCTL and BCSCTL1 are calibrated when done.
  void busyCalibrateDco()
  {
    // --- variables ---
    int calib;
    int step;

    // --- calibrate ---

    // Binary search for RSEL,DCO,DCOMOD.
    // It's okay that RSEL isn't monotonic.

    for( calib=0,step=0x800; step!=0; step>>=1 )
    {
      // if the step is not past the target, commit it
      if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
        calib |= step;
    }

    // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
    if( (calib & 0x0e0) == 0x0e0 )
      calib &= ~0x01f;

    set_dco_calib( calib );
  }

  command error_t Init.init()
  {
    // Reset timers and clear interrupt vectors
    TACTL = TACLR;
    TAIV = 0;
    TBCTL = TBCLR;
    TBIV = 0;

    atomic
    {
      signal Msp430ClockInit.setupDcoCalibrate();
      busyCalibrateDco();
      signal Msp430ClockInit.initClocks();
      signal Msp430ClockInit.initTimerA();
      signal Msp430ClockInit.initTimerB();
      startTimerA();
      startTimerB();
    }

    return SUCCESS;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430Counter32khzC.nc000066400000000000000000000053651207233610700275770ustar00rootroot00000000000000
/* "Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
 
/**
 * Msp430Counter32khC provides the standard 32khz counter for the MSP430.
 *
 * @author Cory Sharp 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

configuration Msp430Counter32khzC
{
  provides interface Counter as Msp430Counter32khz;
}
implementation
{
  components Msp430TimerC;
  components new Msp430CounterC(T32khz) as Counter;

  Msp430Counter32khz = Counter;
  Counter.Msp430Timer -> Msp430TimerC.TimerA;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430CounterMicroC.nc000066400000000000000000000054001207233610700276750ustar00rootroot00000000000000
/* "Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
 
/**
 * Msp430Counter32khC provides the standard 32khz counter for the MSP430.
 *
 * @author Cory Sharp 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

configuration Msp430CounterMicroC
{
  provides interface Counter as Msp430CounterMicro;
}
implementation
{
  components Msp430TimerC
           , new Msp430CounterC(TMicro) as Counter
           ;

  Msp430CounterMicro = Counter;
  Counter.Msp430Timer -> Msp430TimerC.TimerB;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430Timer32khzMapC.nc000066400000000000000000000034501207233610700276670ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
  
configuration Msp430Timer32khzMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerA;
  Msp430TimerControl[0] = Msp430TimerC.ControlA0;
  Msp430Compare[0] = Msp430TimerC.CompareA0;

  Msp430Timer[1] = Msp430TimerC.TimerA;
  Msp430TimerControl[1] = Msp430TimerC.ControlA1;
  Msp430Compare[1] = Msp430TimerC.CompareA1;

  Msp430Timer[2] = Msp430TimerC.TimerA;
  Msp430TimerControl[2] = Msp430TimerC.ControlA2;
  Msp430Compare[2] = Msp430TimerC.CompareA2;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430TimerC.nc000066400000000000000000000171651207233610700263570ustar00rootroot00000000000000
/* "Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
  
/**
 * @author Cory Sharp 
 */

configuration Msp430TimerC
{
  provides interface Msp430Timer as TimerA;
  provides interface Msp430TimerControl as ControlA0;
  provides interface Msp430TimerControl as ControlA1;
  provides interface Msp430TimerControl as ControlA2;
  provides interface Msp430Compare as CompareA0;
  provides interface Msp430Compare as CompareA1;
  provides interface Msp430Compare as CompareA2;
  provides interface Msp430Capture as CaptureA0;
  provides interface Msp430Capture as CaptureA1;
  provides interface Msp430Capture as CaptureA2;

  provides interface Msp430Timer as TimerB;
  provides interface Msp430TimerControl as ControlB0;
  provides interface Msp430TimerControl as ControlB1;
  provides interface Msp430TimerControl as ControlB2;
  provides interface Msp430TimerControl as ControlB3;
  provides interface Msp430TimerControl as ControlB4;
  provides interface Msp430TimerControl as ControlB5;
  provides interface Msp430TimerControl as ControlB6;
  provides interface Msp430Compare as CompareB0;
  provides interface Msp430Compare as CompareB1;
  provides interface Msp430Compare as CompareB2;
  provides interface Msp430Compare as CompareB3;
  provides interface Msp430Compare as CompareB4;
  provides interface Msp430Compare as CompareB5;
  provides interface Msp430Compare as CompareB6;
  provides interface Msp430Capture as CaptureB0;
  provides interface Msp430Capture as CaptureB1;
  provides interface Msp430Capture as CaptureB2;
  provides interface Msp430Capture as CaptureB3;
  provides interface Msp430Capture as CaptureB4;
  provides interface Msp430Capture as CaptureB5;
  provides interface Msp430Capture as CaptureB6;
}
implementation
{
  components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE,
               TASSEL0, TASSEL1, TRUE ) as Msp430TimerA
           , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE,
               TBSSEL0, TBSSEL1, FALSE ) as Msp430TimerB
           , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0
           , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1
           , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2
           , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0
           , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1
           , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2
           , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3
           , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4
           , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5
           , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6
           , Msp430TimerCommonP as Common
  	   // online DCO calibration
//  	   , Msp430DcoCalibC, new AutoStartC();
           ;

  // online DCO calibration
//  Msp430DcoCalibC.StdControl <- AutoStartC;
  
  // Timer A
  TimerA = Msp430TimerA.Timer;
  Msp430TimerA.Overflow -> Msp430TimerA.Event[5];
  Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0;
  Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1;

  // Timer A0
  ControlA0 = Msp430TimerA0.Control;
  CompareA0 = Msp430TimerA0.Compare;
  CaptureA0 = Msp430TimerA0.Capture;
  Msp430TimerA0.Timer -> Msp430TimerA.Timer;
  Msp430TimerA0.Event -> Msp430TimerA.Event[0];

  // Timer A1
  ControlA1 = Msp430TimerA1.Control;
  CompareA1 = Msp430TimerA1.Compare;
  CaptureA1 = Msp430TimerA1.Capture;
  Msp430TimerA1.Timer -> Msp430TimerA.Timer;
  Msp430TimerA1.Event -> Msp430TimerA.Event[1];

  // Timer A2
  ControlA2 = Msp430TimerA2.Control;
  CompareA2 = Msp430TimerA2.Compare;
  CaptureA2 = Msp430TimerA2.Capture;
  Msp430TimerA2.Timer -> Msp430TimerA.Timer;
  Msp430TimerA2.Event -> Msp430TimerA.Event[2];

  // Timer B
  TimerB = Msp430TimerB.Timer;
  Msp430TimerB.Overflow -> Msp430TimerB.Event[7];
  Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0;
  Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1;

  // Timer B0
  ControlB0 = Msp430TimerB0.Control;
  CompareB0 = Msp430TimerB0.Compare;
  CaptureB0 = Msp430TimerB0.Capture;
  Msp430TimerB0.Timer -> Msp430TimerB.Timer;
  Msp430TimerB0.Event -> Msp430TimerB.Event[0];

  // Timer B1
  ControlB1 = Msp430TimerB1.Control;
  CompareB1 = Msp430TimerB1.Compare;
  CaptureB1 = Msp430TimerB1.Capture;
  Msp430TimerB1.Timer -> Msp430TimerB.Timer;
  Msp430TimerB1.Event -> Msp430TimerB.Event[1];

  // Timer B2
  ControlB2 = Msp430TimerB2.Control;
  CompareB2 = Msp430TimerB2.Compare;
  CaptureB2 = Msp430TimerB2.Capture;
  Msp430TimerB2.Timer -> Msp430TimerB.Timer;
  Msp430TimerB2.Event -> Msp430TimerB.Event[2];

  // Timer B3
  ControlB3 = Msp430TimerB3.Control;
  CompareB3 = Msp430TimerB3.Compare;
  CaptureB3 = Msp430TimerB3.Capture;
  Msp430TimerB3.Timer -> Msp430TimerB.Timer;
  Msp430TimerB3.Event -> Msp430TimerB.Event[3];

  // Timer B4
  ControlB4 = Msp430TimerB4.Control;
  CompareB4 = Msp430TimerB4.Compare;
  CaptureB4 = Msp430TimerB4.Capture;
  Msp430TimerB4.Timer -> Msp430TimerB.Timer;
  Msp430TimerB4.Event -> Msp430TimerB.Event[4];

  // Timer B5
  ControlB5 = Msp430TimerB5.Control;
  CompareB5 = Msp430TimerB5.Compare;
  CaptureB5 = Msp430TimerB5.Capture;
  Msp430TimerB5.Timer -> Msp430TimerB.Timer;
  Msp430TimerB5.Event -> Msp430TimerB.Event[5];

  // Timer B6
  ControlB6 = Msp430TimerB6.Control;
  CompareB6 = Msp430TimerB6.Compare;
  CaptureB6 = Msp430TimerB6.Capture;
  Msp430TimerB6.Timer -> Msp430TimerB.Timer;
  Msp430TimerB6.Event -> Msp430TimerB.Event[6];
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/Msp430TimerMicroMapC.nc000066400000000000000000000045071207233610700300030ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
 
configuration Msp430TimerMicroMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
  Msp430Compare[0] = Msp430TimerC.CompareB0;

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
  Msp430Compare[1] = Msp430TimerC.CompareB1;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
  Msp430Compare[2] = Msp430TimerC.CompareB2;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
  Msp430Compare[3] = Msp430TimerC.CompareB3;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
  Msp430Compare[4] = Msp430TimerC.CompareB4;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
  Msp430Compare[5] = Msp430TimerC.CompareB5;

  Msp430Timer[6] = Msp430TimerC.TimerB;
  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
  Msp430Compare[6] = Msp430TimerC.CompareB6;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/RadioConfig.h000066400000000000000000000042571207233610700262760ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include 
//#include 

/* This is the default value of the PA_POWER field of the TXCTL register. */
#ifndef CC2420X_DEF_RFPOWER
#define CC2420X_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the FSCTRL register. */
#ifndef CC2420X_DEF_CHANNEL
#define CC2420X_DEF_CHANNEL	11
#endif

/* The number of microseconds a sending micaz mote will wait for an acknowledgement */
#ifndef SOFTWAREACK_TIMEOUT
#define SOFTWAREACK_TIMEOUT	800
#endif

/**
 * This is the timer type of the radio alarm interface
 */
typedef TMicro TRadio;
typedef uint16_t tradio_size;

/**
 * The number of radio alarm ticks per one microsecond (0.9216).
 * We use integers and no parentheses just to make deputy happy.
 * Ok, further hacks were required for deputy, I removed 00 from the
 * beginning and end to be able to handle longer wait periods.
 */
#define RADIO_ALARM_MICROSEC	1

/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
#define RADIO_ALARM_MILLI_EXP	10

#endif//__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/am/000077500000000000000000000000001207233610700243265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/am/ActiveMessageC.nc000066400000000000000000000040151207233610700274730ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 
#include 

configuration ActiveMessageC
{
	provides
	{
		interface SplitControl;

		interface AMSend[uint8_t id];
		interface Receive[uint8_t id];
		interface Receive as Snoop[uint8_t id];
		interface SendNotifier[am_id_t id];

		interface Packet;
		interface AMPacket;

		interface PacketAcknowledgements;
		interface LowPowerListening;
		interface PacketLink;
		interface RadioChannel;

		interface PacketTimeStamp as PacketTimeStampMicro;
		interface PacketTimeStamp as PacketTimeStampMilli;
	}
}

implementation
{
	components CC2420XActiveMessageC as MessageC;

	SplitControl = MessageC;

	AMSend = MessageC;
	Receive = MessageC.Receive;
	Snoop = MessageC.Snoop;
	SendNotifier = MessageC;

	Packet = MessageC;
	AMPacket = MessageC;

	PacketAcknowledgements = MessageC;
	LowPowerListening = MessageC;
	PacketLink = MessageC;
	RadioChannel = MessageC;

	PacketTimeStampMilli = MessageC;
	PacketTimeStampMicro = MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/cc2420x/tmicro/am/TimeSyncMessageC.nc000066400000000000000000000041471207233610700300210ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 
#include 

configuration TimeSyncMessageC
{
	provides
	{
		interface SplitControl;

		interface Receive[uint8_t id];
		interface Receive as Snoop[am_id_t id];
		interface Packet;
		interface AMPacket;

		interface PacketTimeStamp as PacketTimeStampRadio;
		interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketRadio;

		interface PacketTimeStamp as PacketTimeStampMilli;
		interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketMilli;
	}
}

implementation
{
	components CC2420XTimeSyncMessageC as MessageC;
  
	SplitControl	= MessageC;
  	Receive		= MessageC.Receive;
	Snoop		= MessageC.Snoop;
	Packet		= MessageC;
	AMPacket	= MessageC;

	PacketTimeStampRadio	= MessageC;
	TimeSyncAMSendRadio	= MessageC;
	TimeSyncPacketRadio	= MessageC;

	PacketTimeStampMilli	= MessageC;
	TimeSyncAMSendMilli	= MessageC;
	TimeSyncPacketMilli	= MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/ds2411/000077500000000000000000000000001207233610700222655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/ds2411/DallasId48ToIeeeEui64C.nc000066400000000000000000000013751207233610700264610ustar00rootroot00000000000000
#include "PlatformIeeeEui64.h"

module DallasId48ToIeeeEui64C {
  provides interface LocalIeeeEui64;
  uses interface IDChip;
} implementation {
  command ieee_eui64_t LocalIeeeEui64.getId() {
    uint8_t id[6];
    ieee_eui64_t eui;
    call IDChip.read(id);

    eui.data[0] = IEEE_EUI64_COMPANY_ID_0;
    eui.data[1] = IEEE_EUI64_COMPANY_ID_1;
    eui.data[2] = IEEE_EUI64_COMPANY_ID_2;

    // 16 bits of the ID is generated by software
    // could be used for hardware model id and revision, for example
    eui.data[3] = IEEE_EUI64_SERIAL_ID_0;
    eui.data[4] = IEEE_EUI64_SERIAL_ID_1;

    // 24 least significant bits of the serial ID read from the DS2401
    eui.data[5] = id[3];
    eui.data[6] = id[4];
    eui.data[7] = id[5];

    return eui;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/ds2411/HplDs2411C.nc000066400000000000000000000123461207233610700242420ustar00rootroot00000000000000//$Id: HplDs2411C.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

//@author Cory Sharp 


/*
  
The 1-wire timings suggested by the DS2411 data sheet are incorrect,
incomplete, or unclear.  The timings provided the app note 522 work:

http://www.maxim-ic.com/appnotes.cfm/appnote_number/522
    
*/

/*
  This is a stripped version of the DS2411 driver modified for our network stack.
  Instead of a nice abstraction layer, we rely on TOSH_ASSIGN_PIN(ONEWIRE) in the
  hardware.h file to set up the appropriate pin for communications.

  Andrew Christian 
  June 2005
  
  * "ported" to tinyos-2.x
  * @author Steve Ayer
  * @date   March, 2010
  */

module HplDs2411C
{
  provides interface IDChip;
}
implementation
{
  enum
  {
    STD_A = 6,
    STD_B = 64,
    STD_C = 60,
    STD_D = 10,
    STD_E = 9,
    STD_F = 55,
    STD_G = 0,
    STD_H = 480,
    STD_I = 90,
    STD_J = 220,
  };

  void init_pins()
  {
#ifdef ID_CHIP_POWER
    TOSH_SET_ONEWIRE_POWER_PIN();    
    TOSH_MAKE_ONEWIRE_POWER_OUTPUT();
#endif

    TOSH_SEL_ONEWIRE_IOFUNC();
    TOSH_MAKE_ONEWIRE_INPUT();
    TOSH_CLR_ONEWIRE_PIN();
  }

  void clear_pins()
  {
#ifdef TOSH_SET_ONEWIRE_POWER_PIN
    TOSH_CLR_ONEWIRE_POWER_OUTPUT();
#endif
    // Don't need to fix ONEWIRE...it finishes as an INPUT
  }

  bool reset() // >= 960us
  {
    int present;
    TOSH_MAKE_ONEWIRE_OUTPUT();
    TOSH_uwait(STD_H); //t_RSTL
    TOSH_MAKE_ONEWIRE_INPUT();
    TOSH_uwait(STD_I);  //t_MSP
    present = TOSH_READ_ONEWIRE_PIN();
    TOSH_uwait(STD_J);  //t_REC
    return (present == 0);
  }

  void write_bit_one() // >= 70us
  {
    TOSH_MAKE_ONEWIRE_OUTPUT();
    TOSH_uwait(STD_A);  //t_W1L
    TOSH_MAKE_ONEWIRE_INPUT();
    TOSH_uwait(STD_B);  //t_SLOT - t_W1L
  }

  void write_bit_zero() // >= 70us
  {
    TOSH_MAKE_ONEWIRE_OUTPUT();
    TOSH_uwait(STD_C);  //t_W0L
    TOSH_MAKE_ONEWIRE_INPUT();
    TOSH_uwait(STD_D);  //t_SLOT - t_W0L
  }

  void write_bit( int is_one ) // >= 70us
  {
    if(is_one)
      write_bit_one();
    else
      write_bit_zero();
  }

  bool read_bit() // >= 70us
  {
    int bit;
    TOSH_MAKE_ONEWIRE_OUTPUT();
    TOSH_uwait(STD_A);  //t_RL
    TOSH_MAKE_ONEWIRE_INPUT();
    TOSH_uwait(STD_E); //near-max t_MSR
    bit = TOSH_READ_ONEWIRE_PIN();
    TOSH_uwait(STD_F);  //t_REC
    return bit;
  }

  void write_byte( uint8_t byte ) // >= 560us
  {
    uint8_t bit;
    for( bit=0x01; bit!=0; bit<<=1 )
      write_bit( byte & bit );
  }

  uint8_t read_byte() // >= 560us
  {
    uint8_t byte = 0;
    uint8_t bit;
    for( bit=0x01; bit!=0; bit<<=1 )
    {
      if( read_bit() )
	byte |= bit;
    }
    return byte;
  }

  uint8_t crc8_byte( uint8_t crc, uint8_t byte )
  {
    int i;
    crc ^= byte;
    for( i=0; i<8; i++ )
    {
      if( crc & 1 )
        crc = (crc >> 1) ^ 0x8c;
      else
        crc >>= 1;
    }
    return crc;
  }

  /*
   * Reset the DS2411 chip and read the 8 bytes of data out.  
   * We verify the CRC to ensure good data, dump the family byte (it should be '1')
   * and fill a buffer with the 6 good uniqut address bytes.
   *
   * It is possible for the initialization to fail.
   */

  command error_t IDChip.read( uint8_t *id_buf ) // >= 6000us
  {
    int retry = 5;
    uint8_t id[8];

    init_pins();
    TOSH_uwait( 1200 );    // Delay a bit at start up (as per DS2411 data sheet)

    while( retry-- > 0 ) {
      int crc = 0;
      if( reset() ) {
	uint8_t* byte;

	write_byte(0x33); //read rom
	for( byte=id+7; byte!=id-1; byte-- )
	  crc = crc8_byte( crc, *byte=read_byte() );

	if( crc == 0 ) {
	  memcpy( id_buf, id + 1, 6 );
	  clear_pins();
	  return SUCCESS;
	}
      }
    }

    clear_pins();
    return FAIL;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/ds2411/IDChip.nc000066400000000000000000000037701207233610700237160ustar00rootroot00000000000000//$Id: IDChip.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

//@author Cory Sharp 

/*
 * This is a stripped version of the DS2411 driver that provides very 
 * limited functionality.  Generally you should call this at start up and
 * use the result to fill in the CC2420 Radio's long address.
 */

interface IDChip
{
  command error_t read( uint8_t *id_buf ); // Fills in 6 bytes if successful.
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/ds2411/LocalIeeeEui64C.nc000066400000000000000000000026571207233610700253630ustar00rootroot00000000000000// $Id: LocalIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 * Shimmer port by 
 * @author Michael Healy
 * @date   September, 2010
 */

configuration LocalIeeeEui64C {
  provides interface LocalIeeeEui64;
} implementation {
  components
    HplDs2411C,
    DallasId48ToIeeeEui64C;

  LocalIeeeEui64 = DallasId48ToIeeeEui64C;
  DallasId48ToIeeeEui64C.IDChip -> HplDs2411C;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/ds2411/PlatformIeeeEui64.h000066400000000000000000000027741207233610700256410ustar00rootroot00000000000000// $Id: PlatformIeeeEui64.h,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */

#ifndef PLATFORMIEEEEUI64_H
#define PLATFORMIEEEEUI64_H
 
enum {
  // University of California Berkeley's OUI
  IEEE_EUI64_COMPANY_ID_0 = 0x00,
  IEEE_EUI64_COMPANY_ID_1 = 0x12,
  IEEE_EUI64_COMPANY_ID_2 = 0x6d,
  // Following two octets must be 'LO' -- "local" in order to use UCB's OUI
  IEEE_EUI64_SERIAL_ID_0 = 'L',
  IEEE_EUI64_SERIAL_ID_1 = 'O',
};

#endif // PLATFORMIEEEEUI64_H
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/gsr/000077500000000000000000000000001207233610700221425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/gsr/Gsr.h000066400000000000000000000034031207233610700230460ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Mike Healy
 * @date   April, 2011
 */

#ifndef GSR_H
#define GSR_H

enum {
   HW_RES_40K  = 0,
   HW_RES_287K = 1,
   HW_RES_1M   = 2,
   HW_RES_3M3  = 3
};
#endif 
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/gsr/Gsr.nc000066400000000000000000000064151207233610700232250ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Mike Healy
 * @date   April, 2011
 */

interface Gsr 
{
   /**
    * Adjusts the GSR's range by selecting the which internal resistor is used
    *
    * @param range: select the resistor to use
    *               0:  40 kohm
    *               1: 287 kohm
    *               2: 1.0 Mohm
    *               3: 3.3 Mohm 
    */
   command void setRange(uint8_t range);

   /**
    * Calculates resistance from a raw ADC value
    *
    * @param ADC_val: the ADC value to be used in the calculation
    * @param active_resistor: the currently active resistor on the GSR board 
    * @return the calculated resistance
    */
   command uint32_t calcResistance(uint16_t ADC_val, uint8_t active_resistor);

   /**
    * Determines whether to change the currently active internal resistor based 
    * on the ADC value, and if necessary change the internal resistor to a new
    * value
    *
    * @param ADC_val: the ADC value to be used in the calculation
    * @param active_resistor: the currently active resistor on the GSR board 
    * @return the active internal resistor 
    */
   command uint8_t controlRange(uint16_t ADC_val, uint8_t active_resistor);

   /**
    * Initializes the smoothing state 
    *
    * @param active_resistor: the currently active resistor on the GSR board 
    */
   command void initSmoothing(uint8_t active_resistor);

   /**
    * Smooths the GSR values
    *
    * @param resistance: the current resistance value to smoothed 
    * @param active_resistor: the currently active resistor on the GSR board 
    * @return the smoothed resistance. Returns 0xFFFFFFFF if transient sample
    */
   command uint32_t smoothSample(uint32_t resistance, uint8_t active_resistor);
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/gsr/GsrC.nc000066400000000000000000000034401207233610700233230ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Mike Healy
 * @date   April, 2011
 */

configuration GsrC {
   provides {
      interface Init;
      interface Gsr;
   }
}
implementation {
   components GsrP;
   Init = GsrP;
   Gsr = GsrP;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/gsr/GsrP.nc000066400000000000000000000250441207233610700233440ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Mike Healy
 * @date   April, 2011
 * 
 * Driver for the shimmer GSR board
 * Based heavily on Adrian Burn's GSR code from tinyos-1.x/contrib/handhelds/apps/BioMOBIUS/GSR
 */

#include "Gsr.h"

module GsrP 
{
   provides interface Init;
   provides interface Gsr;
}
implementation 
{

#define HW_RES_40K_MIN_ADC_VAL    1140 //10k to 56k..1159->1140
#define HW_RES_287K_MAX_ADC_VAL   3800 //56k to 220k was 4000 but was 3948 on shimer so changed to 3800
#define HW_RES_287K_MIN_ADC_VAL   1490 //56k to 220k..1510->1490
#define HW_RES_1M_MAX_ADC_VAL     3700 //220k to 680k
#define HW_RES_1M_MIN_ADC_VAL     1630 //220k to 680k..1650->1630
#define HW_RES_3M3_MAX_ADC_VAL    3930 //680k to 4M7
#define HW_RES_3M3_MIN_ADC_VAL    1125 //680k to 4M7

// These constants were calculated by measuring against precision resistors
// and then using polynomial curve fitting 
#define HW_RES_40K_CONSTANT_1      0.0000000065995
#define HW_RES_40K_CONSTANT_2      (-0.000068950)
#define HW_RES_40K_CONSTANT_3      0.2699
#define HW_RES_40K_CONSTANT_4      (-476.9835)
#define HW_RES_40K_CONSTANT_5      340351.3341

#define HW_RES_287K_CONSTANT_1     0.000000013569627
#define HW_RES_287K_CONSTANT_2     (-0.0001650399)
#define HW_RES_287K_CONSTANT_3     0.7541990
#define HW_RES_287K_CONSTANT_4     (-1572.6287856)
#define HW_RES_287K_CONSTANT_5     1367507.9270

#define HW_RES_1M_CONSTANT_1       0.00000002550036498
#define HW_RES_1M_CONSTANT_2       (-0.00033136)
#define HW_RES_1M_CONSTANT_3       1.6509426597
#define HW_RES_1M_CONSTANT_4       (-3833.348044)
#define HW_RES_1M_CONSTANT_5       3806317.6947

#define HW_RES_3M3_CONSTANT_1      0.00000037153627
#define HW_RES_3M3_CONSTANT_2      (-0.004239437)
#define HW_RES_3M3_CONSTANT_3      17.905709
#define HW_RES_3M3_CONSTANT_4      (-33723.8657)
#define HW_RES_3M3_CONSTANT_5      25368044.6279


/* when we switch resistors with the ADG658 it takes a few samples for the 
   ADC to start to see the new sampled voltage correctly, the catch below is 
   to eliminate any glitches in the data */
#define ONE_HUNDRED_OHM_STEP 100
#define MAX_RESISTANCE_STEP 5000
/* instead of having a large step when resistors change - have a smoother step */
#define NUM_SMOOTHING_SAMPLES 64
/* ignore these samples after a resistor switch - instead send special code */
#define NUM_SAMPLES_TO_IGNORE 6
#define STARTING_RESISTANCE 10000000


   uint8_t last_active_resistor, got_first_sample;
   uint16_t transient_sample, transient_smoothing_samples, max_resistance_step;
   uint32_t last_resistance;

   command error_t Init.init() {
      // configure pins
      TOSH_MAKE_PROG_OUT_OUTPUT(); //A0
      TOSH_SEL_PROG_OUT_IOFUNC();

      TOSH_MAKE_SER0_CTS_OUTPUT(); //A1
      TOSH_SEL_SER0_CTS_IOFUNC();


      // by default set to use 40kohm resistor 
      call Gsr.setRange(HW_RES_40K);

      call Gsr.initSmoothing(HW_RES_40K);

      return SUCCESS;
   }

    
   command void Gsr.setRange(uint8_t range) {
      switch(range) {
         case HW_RES_40K:
            TOSH_CLR_PROG_OUT_PIN();
            TOSH_CLR_SER0_CTS_PIN();
            break;
         case HW_RES_287K:
            TOSH_SET_PROG_OUT_PIN();
            TOSH_CLR_SER0_CTS_PIN();
            break;
         case HW_RES_1M:
            TOSH_CLR_PROG_OUT_PIN();
            TOSH_SET_SER0_CTS_PIN();
            break;
         case HW_RES_3M3:
            TOSH_SET_PROG_OUT_PIN();
            TOSH_SET_SER0_CTS_PIN();
            break;
      }
   }


   uint64_t multiply(uint64_t no1, uint64_t no2){
      if (no1 == 0 || no2 == 0) return 0;
      if (no1 == 1) return no2;
      if (no2 == 1) return no1;
      return no1*no2;
   }


   command uint32_t Gsr.calcResistance(uint16_t ADC_val, uint8_t active_resistor) {
      uint32_t resistance=0;
      uint64_t adc_pow1, adc_pow2, adc_pow3, adc_pow4;

      adc_pow1 = ADC_val;
      adc_pow2 = multiply(adc_pow1, ADC_val);
      adc_pow3 = multiply(adc_pow2, ADC_val);
      adc_pow4 = multiply(adc_pow3, ADC_val);

      switch ( active_resistor ) {
      case HW_RES_40K:
         resistance = (
               ( (HW_RES_40K_CONSTANT_1)* adc_pow4) + //(powf(ADC_val,4)) ) + 
               ( (HW_RES_40K_CONSTANT_2)* adc_pow3) + //(powf(ADC_val,3)) ) + 
               ( (HW_RES_40K_CONSTANT_3)* adc_pow2) + //(powf(ADC_val,2)) ) + 
               ( (HW_RES_40K_CONSTANT_4)* adc_pow1) + //(powf(ADC_val,1)) ) + 
               (HW_RES_40K_CONSTANT_5) );
         break;
      case HW_RES_287K:
         resistance = (
               ( (HW_RES_287K_CONSTANT_1)* adc_pow4) + //(powf(ADC_val,4)) ) + 
               ( (HW_RES_287K_CONSTANT_2)* adc_pow3) + //(powf(ADC_val,3)) ) + 
               ( (HW_RES_287K_CONSTANT_3)* adc_pow2) + //(powf(ADC_val,2)) ) + 
               ( (HW_RES_287K_CONSTANT_4)* adc_pow1) + //(powf(ADC_val,1)) ) + 
               (HW_RES_287K_CONSTANT_5) );
         break;
      case HW_RES_1M:
         resistance = (
               ( (HW_RES_1M_CONSTANT_1)* adc_pow4) + //(powf(ADC_val,4)) ) + 
               ( (HW_RES_1M_CONSTANT_2)* adc_pow3) + //(powf(ADC_val,3)) ) + 
               ( (HW_RES_1M_CONSTANT_3)* adc_pow2) + //(powf(ADC_val,2)) ) + 
               ( (HW_RES_1M_CONSTANT_4)* adc_pow1) + //(powf(ADC_val,1)) ) + 
               (HW_RES_1M_CONSTANT_5) );
         break;
      case HW_RES_3M3:
         resistance = (
               ( (HW_RES_3M3_CONSTANT_1)* adc_pow4) + //(powf(ADC_val,4)) ) + 
               ( (HW_RES_3M3_CONSTANT_2)* adc_pow3) + //(powf(ADC_val,3)) ) + 
               ( (HW_RES_3M3_CONSTANT_3)* adc_pow2) + //(powf(ADC_val,2)) ) + 
               ( (HW_RES_3M3_CONSTANT_4)* adc_pow1) + //(powf(ADC_val,1)) ) + 
               (HW_RES_3M3_CONSTANT_5) );
      default:
      }
      return resistance;
   }


   command uint8_t Gsr.controlRange(uint16_t ADC_val, uint8_t active_resistor) {
      uint8_t ret = active_resistor;
      switch ( active_resistor ) {
      case HW_RES_40K:
         if (ADC_val < HW_RES_40K_MIN_ADC_VAL){
            call Gsr.setRange(HW_RES_287K);
            ret = HW_RES_287K;
         }
         break;
      case HW_RES_287K:
         if( (ADC_val <= HW_RES_287K_MAX_ADC_VAL) && (ADC_val >= HW_RES_287K_MIN_ADC_VAL) ) {
            ;//stay here
         } else if (ADC_val < HW_RES_287K_MIN_ADC_VAL) {
            call Gsr.setRange(HW_RES_1M);
            ret = HW_RES_1M;
         } else {
            call Gsr.setRange(HW_RES_40K);
            ret = HW_RES_40K;
         }
         break;
      case HW_RES_1M:
         if( (ADC_val <= HW_RES_1M_MAX_ADC_VAL) && (ADC_val >= HW_RES_1M_MIN_ADC_VAL) ) {
            ;//stay here
         } else if (ADC_val < HW_RES_1M_MIN_ADC_VAL) {
            call Gsr.setRange(HW_RES_3M3); 
            ret = HW_RES_3M3;
         } else {
            call Gsr.setRange(HW_RES_287K);
            ret = HW_RES_287K;
         }
         break;
      case HW_RES_3M3:
         if( (ADC_val <= HW_RES_3M3_MAX_ADC_VAL) && (ADC_val >= HW_RES_3M3_MIN_ADC_VAL) ) {
            ;//stay here
         } else if (ADC_val > HW_RES_3M3_MAX_ADC_VAL) {
            call Gsr.setRange(HW_RES_1M);
            ret = HW_RES_1M;
         } else {
            /* MIN so cant go any higher*/
         }
         break;
      default:
      }
      return ret;
   }


   command void Gsr.initSmoothing(uint8_t active_resistor) {
      last_active_resistor = active_resistor;
      got_first_sample = FALSE;
      transient_sample = NUM_SAMPLES_TO_IGNORE;
      transient_smoothing_samples = 0;
      max_resistance_step = MAX_RESISTANCE_STEP;
      last_resistance = STARTING_RESISTANCE;
   }

   command uint32_t Gsr.smoothSample(uint32_t resistance, uint8_t active_resistor) {
      if(active_resistor != last_active_resistor) {
         transient_sample = NUM_SAMPLES_TO_IGNORE;
         max_resistance_step = ONE_HUNDRED_OHM_STEP;
         transient_smoothing_samples = NUM_SMOOTHING_SAMPLES;
         last_active_resistor = active_resistor;
      }
      // if we are after a transition then max_resistance_step will be small to ensure smooth transition
      if (transient_smoothing_samples) {
         transient_smoothing_samples--;
         // if we are finished smoothing then go back to a larger resistance step
         if (!transient_smoothing_samples)
            max_resistance_step = MAX_RESISTANCE_STEP;
      }
      // only prevent a large step from last resistance if we actually have a last resistance
      if ((got_first_sample) && (last_resistance > max_resistance_step)) {
         if( resistance > (last_resistance+max_resistance_step) )
            resistance = (last_resistance+max_resistance_step);
         else if ( resistance < (last_resistance-max_resistance_step) )
            resistance = (last_resistance-max_resistance_step);
         else
            ;
      } else {
         // get the first sample in this run of sampling
         got_first_sample = TRUE;
      }

      last_resistance = resistance;
    
      // if this sample is near a resistor transition then send a special code for data analysis
      if(transient_sample) {
         transient_sample--;
         resistance = 0xFFFFFFFF;
      }

      return resistance;
   }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/mma7260/000077500000000000000000000000001207233610700224405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/mma7260/AccelC.nc000066400000000000000000000034761207233610700241060ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   May, 2010
 * 
 */

configuration AccelC {
   provides {
      interface Mma_Accel as Accel;
      interface Init;
   }
}
implementation {
  components Mma7260P;
  Init = Mma7260P;
  Accel = Mma7260P;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/mma7260/Mma7260.h000066400000000000000000000033551207233610700236500ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author Steve Ayer
 *  @date   August, 2006
 */
#ifndef MMA7260_H
#define MMA7260_H

enum MMA7260_RANGE {
  RANGE_1_5G  = 0,
  RANGE_2_0G  = 1,
  RANGE_4_0G  = 2,
  RANGE_6_0G  = 3
};

#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/mma7260/Mma7260.nc000066400000000000000000000040631207233610700240160ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date August 2006
 * @author Konrad Lorincz
 * ported to TOS 2
 */

#include "Mma7260.h"

interface Mma7260 
{
    /**
     * Turns the accelerometer on or off.
     *
     * @param wakeup if TRUE turns it on; if FALSE turns it off
     */
    command void wake(bool wakeup);

    /**
     * Sets the sensitivity (gain) of the sensors.
     *
     * @param sensitivity the sensitivity (gain)
     */
    command void setSensitivity(enum MMA7260_RANGE sensitivity);
}




tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/mma7260/Mma7260P.nc000066400000000000000000000061751207233610700241440ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date August 2006
 * @author Konrad Lorincz
 * ported to TOS 2
 */

#include "Mma_Accel.h"

module Mma7260P 
{
    provides interface Init;
    provides interface Mma_Accel as Accel;
}
implementation 
{
    command error_t Init.init()
    {
        // configure pins
        TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT();         // sleep for accel
        TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
        
        TOSH_MAKE_ADC_ACCELZ_INPUT();         
        TOSH_SEL_ADC_ACCELZ_MODFUNC();

        TOSH_MAKE_ADC_ACCELY_INPUT();         
        TOSH_SEL_ADC_ACCELY_MODFUNC();

        TOSH_MAKE_ADC_ACCELX_INPUT();         
        TOSH_SEL_ADC_ACCELX_MODFUNC();

        // by default wake up accelerometer
        call Accel.wake(TRUE);

        return SUCCESS;
    }

    
    command void Accel.wake(bool wakeup) 
    {
        if(wakeup)
            TOSH_SET_ACCEL_SLEEP_N_PIN();    // wakes up accel board
        else
            TOSH_CLR_ACCEL_SLEEP_N_PIN();    // puts accel board to sleep
    }

    command void Accel.setSensitivity(uint8_t sensitivity) 
    {
        switch(sensitivity) {
        case RANGE_1_5G:
            TOSH_CLR_ACCEL_SEL0_PIN();
            TOSH_CLR_ACCEL_SEL1_PIN();
            break;
        case RANGE_2_0G:
            TOSH_SET_ACCEL_SEL0_PIN();
            TOSH_CLR_ACCEL_SEL1_PIN();
            break;
        case RANGE_4_0G:
            TOSH_CLR_ACCEL_SEL0_PIN();
            TOSH_SET_ACCEL_SEL1_PIN();
            break;
        case RANGE_6_0G:
            TOSH_SET_ACCEL_SEL0_PIN();
            TOSH_SET_ACCEL_SEL1_PIN();
            break;
        }
    }
}




tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/mma7260/Mma_Accel.h000066400000000000000000000034111207233610700244110ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author Steve Ayer
 *  @date   August, 2006
 */
#ifndef MMA7260_H
#define MMA7260_H

enum MMA7260_RANGE {
  RANGE_1_5G  = 0,
  RANGE_2_0G  = 1,  // 7260 only
  RANGE_4_0G  = 2,  // 7260 only
  RANGE_6_0G  = 3
};

#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/mma7260/Mma_Accel.nc000066400000000000000000000041601207233610700245640ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date August 2006
 * @author Konrad Lorincz
 * ported to TOS 2
 * @author Steve Ayer
 * @date   May, 2010
 * name abstraction to cover other accel chipsets
 */

interface Mma_Accel
{
    /**
     * Turns the accelerometer on or off.
     *
     * @param wakeup if TRUE turns it on; if FALSE turns it off
     */
    command void wake(bool wakeup);

    /**
     * Sets the sensitivity (gain) of the sensors.
     *
     * @param sensitivity the sensitivity (gain)
     */
    command void setSensitivity(uint8_t sensitivity);
}




tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/000077500000000000000000000000001207233610700223755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/FastClock.nc000066400000000000000000000035251207233610700245750ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   August, 2010
 *
 * some people will want to turn the clock off again...
 */

interface FastClock { 
  // turn xt2 off, restore default dco selection to mclk
  command void disable();

  command void setSMCLK(uint8_t mhz);
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/FastClockC.nc000066400000000000000000000035571207233610700247050ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   August, 2010
 */

configuration FastClockC
{
  provides{
    interface Init;
    interface FastClock;
  }
}

implementation
{
  components FastClockP;

  Init = FastClockP;
  FastClock = FastClockP;

  components LedsC;
  FastClockP.Leds -> LedsC; 
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/FastClockP.nc000066400000000000000000000074431207233610700247200ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   August, 2010
 *
 * finally sick of duplicating the same ti msp430 routine to initialize the
 * xt2 crystal on this family of platforms, a module to do it for us.
 *
 * **********************  APP WARNING NOTE: **************************************
 *
 * by default this uses an smclk divisor of 2, so the smclk will 
 * run at 4mhz, breaking some bus timings.  to fix this, simply add the line
 * PFLAGS += -DSMCLK_4MHZ
 * to your app's Makefile and see SDP.nc for how this is handled in a driver.  
 * Alternatively, you can set the smclk back to 1mhz by changing DIVS_1 to DIVS_7
 *
 * ********************************************************************************                   
 */

#include "msp430hardware.h"

module FastClockP{
  provides{
    interface Init;
    interface FastClock;
  }
  uses interface Leds;
}

implementation {
  command error_t Init.init() {
    register uint8_t i;
    /* 
     * set up 8mhz clock to max out 
     * msp430 throughput 
     */

    atomic{

      CLR_FLAG(BCSCTL1, XT2OFF); // basic clock system control reg, turn off XT2 osc

      call Leds.led0On();
      do{
	CLR_FLAG(IFG1, OFIFG);

	__delay_cycles(50);  

      }
      while(READ_FLAG(IFG1, OFIFG));
      call Leds.led0Off();

      for(i = 0; i < 100; i++)
	TOSH_uwait(500);

      /* 
       * select master clock source, XT2CLK when XT2 oscillator present
       * on-chip. LFXT1CLK when XT2 oscillator not present on-chip. 
       */
      BCSCTL2 = 0; 
      SET_FLAG(BCSCTL2, SELM_2); 

      SET_FLAG(BCSCTL2, SELS);  // smclk from xt2
      SET_FLAG(BCSCTL2, DIVS_1);  // divide it by 2
 
    }

    return SUCCESS;
  }
  
  command void FastClock.disable() {
    atomic {
      SET_FLAG(BCSCTL2, SELM_0);
      SET_FLAG(BCSCTL1, XT2OFF);
    }
  }
  
  command void FastClock.setSMCLK(uint8_t mhz){
    switch(mhz) {
    case 1:
      SET_FLAG(BCSCTL2, DIVS_3);  // divide 8mhz xt2 by 8
      break;
    case 2:
      SET_FLAG(BCSCTL2, DIVS_2);  // divide by 4
      CLR_FLAG(BCSCTL2, DIVS_1);
      break;
    case 4:
      SET_FLAG(BCSCTL2, DIVS_1);  // divide by 2
      CLR_FLAG(BCSCTL2, DIVS_2);
      break;
    default:
      SET_FLAG(BCSCTL2, DIVS_3);  // divide by 8
      break;
    }
  }
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/HilTimerMilli64C.nc000066400000000000000000000050451207233610700257040ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * HilTimerMilliC provides a parameterized interface to a virtualized
 * millisecond timer.  TimerMilliC in tos/system/ uses this component to
 * allocate new timers.
 *
 * @author Cory Sharp 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

configuration HilTimerMilli64C
{
  provides interface Init;
  provides interface Timer as TimerMilli[ uint8_t num ];
  provides interface LocalTime;
}
implementation
{
  components new AlarmMilli32C();
  components new AlarmToTimerC(TMilli);
  components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI));
  components new CounterToLocalTimeC(TMilli);
  components CounterMilli64C;

  Init = AlarmMilli32C;
  TimerMilli = VirtualizeTimerC;
  LocalTime = CounterToLocalTimeC;

  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
  AlarmToTimerC.Alarm -> AlarmMilli32C;
  CounterToLocalTime64C.Counter -> CounterMilli64C;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/HplMsp430I2C0P.nc000066400000000000000000000206641207233610700250570ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010/07/29 13:18:27 $
 */

module HplMsp430I2C0P @safe() {
  
  provides interface HplMsp430I2C as HplI2C;
  
  uses interface HplMsp430Usart as HplUsart;
  uses interface HplMsp430GeneralIO as SIMO;
  uses interface HplMsp430GeneralIO as UCLK;

}

implementation {
  
  MSP430REG_NORACE(U0CTL);
  MSP430REG_NORACE(I2CTCTL);
  MSP430REG_NORACE(I2CDR);
  MSP430REG_NORACE(I2CSA);
  MSP430REG_NORACE(I2CIE);

  async command bool HplI2C.isI2C() {
    atomic return ((U0CTL & I2C) && (U0CTL & SYNC) && (U0CTL & I2CEN));
  }
  
  async command void HplI2C.clearModeI2C() {
    atomic {
      U0CTL &= ~(I2C | SYNC | I2CEN);
      call HplUsart.resetUsart(TRUE);
    }
  }
  
  async command void HplI2C.setModeI2C( msp430_i2c_union_config_t* config ) {
    
    call HplUsart.resetUsart(TRUE);
    call HplUsart.disableUart();
    call HplUsart.disableSpi();
    call SIMO.makeInput();
    call SIMO.selectModuleFunc();
    call UCLK.makeInput();
    call UCLK.selectModuleFunc();
    
    atomic {

      IE1 &= ~(UTXIE0 | URXIE0);  // interrupt disable    
      
      U0CTL &= ~(I2C | I2CEN | SYNC);
      U0CTL = SWRST;
      U0CTL |= SYNC | I2C;
      U0CTL &= ~I2CEN;

      U0CTL |= MST;

      I2CTCTL = I2CSSEL_2;        // use 1MHz SMCLK as the I2C reference

      I2CPSC = 0x00;              // I2C CLK runs at 1MHz/10 = 100kHz
      I2CSCLH = 0x03;
      I2CSCLL = 0x03;
      
      I2CIE = 0;                 // clear all I2C interrupt enables
      I2CIFG = 0;                // clear all I2C interrupt flags

      /*      
      U0CTL = (config->i2cRegisters.uctl | (I2C | SYNC)) & ~I2CEN;
      I2CTCTL = config->i2cRegisters.i2ctctl;
      
      I2CPSC = config->i2cRegisters.i2cpsc;
      I2CSCLH = config->i2cRegisters.i2csclh;
      I2CSCLL = config->i2cRegisters.i2cscll;
      I2COA = config->i2cRegisters.i2coa;
      */
      //      U0CTL |= I2CEN;
      
    }
    
  }
  
  // U0CTL
  async command void HplI2C.setMasterMode() { U0CTL |= MST; }
  async command void HplI2C.setSlaveMode() { U0CTL &= ~MST; }
  
  async command void HplI2C.enableI2C() { U0CTL |= I2CEN; }
  async command void HplI2C.disableI2C() { U0CTL &= ~I2CEN; }
  
  // I2CTCTL
  async command bool HplI2C.getWordMode() {
    return ( I2CTCTL & I2CWORD ) != 0;
  }
  
  async command void HplI2C.setWordMode( bool mode ) {
    I2CTCTL |= ( mode & 0x1 ) << 7;
  }
  
  async command bool HplI2C.getRepeatMode() {
    return ( I2CTCTL & I2CRM ) != 0;
  }
  
  async command void HplI2C.setRepeatMode( bool mode ) { 
    I2CTCTL |= ( mode & 0x1 ) << 6;;
  }
  
  async command uint8_t HplI2C.getClockSource() {
    return ( I2CTCTL >> 4 ) & 0x3;;
  }
  
  async command void HplI2C.setClockSource( uint8_t src ) {
    atomic I2CTCTL = ( ( src & 0x3 ) << 4 ) | I2CTCTL;
  }
  
  async command bool HplI2C.getTransmitReceiveMode() { 
    return ( I2CTCTL & I2CTRX ) != 0; 
  }
  
  async command void HplI2C.setTransmitMode() { I2CTCTL |= I2CTRX; }
  async command void HplI2C.setReceiveMode() { I2CTCTL &= ~I2CTRX; }
  
  async command bool HplI2C.getStartByte() { return (I2CTCTL & I2CSTB) != 0; }
  async command void HplI2C.setStartByte() { I2CTCTL |= I2CSTB; }
  
  async command bool HplI2C.getStopBit() { return (I2CTCTL & I2CSTP) != 0; }
  async command void HplI2C.setStopBit() { I2CTCTL |= I2CSTP; }
  
  async command bool HplI2C.getStartBit() { return (I2CTCTL & I2CSTT) != 0; }
  async command void HplI2C.setStartBit() { I2CTCTL |= I2CSTT; }
  
  // I2CDR
  async command uint8_t HplI2C.getData() { return I2CDR; }
  async command void HplI2C.setData( uint8_t v ) { I2CDR = v; }
  
  // I2CNDAT
  async command uint8_t HplI2C.getTransferByteCount() { return I2CNDAT; }
  async command void HplI2C.setTransferByteCount( uint8_t v ) { I2CNDAT = v; }
  
  // I2CPSC
  async command uint8_t HplI2C.getClockPrescaler() { return I2CPSC; }
  async command void HplI2C.setClockPrescaler( uint8_t v ) { I2CPSC = v; }
  
  // I2CSCLH and I2CSCLL
  async command uint16_t HplI2C.getShiftClock() {
    uint16_t shift;
    atomic {
      shift = I2CSCLH;
      shift <<= 8;
      shift |= I2CSCLL;
    }
    return shift;
  }
  
  async command void HplI2C.setShiftClock( uint16_t shift ) {
    atomic {
      I2CSCLH = shift >> 8;
      I2CSCLL = shift;
    }
  }
  
  // I2COA
  async command uint16_t HplI2C.getOwnAddress() { return I2COA; }
  async command void HplI2C.setOwnAddress( uint16_t addr ) { I2COA = addr; }
  
  // I2CSA
  async command uint16_t HplI2C.getSlaveAddress() { return I2CSA; }
  async command void HplI2C.setSlaveAddress( uint16_t addr ) { I2CSA = addr; }
  
  // I2CIE
  async command void HplI2C.disableStartDetect() { I2CIE &= ~STTIE; }
  async command void HplI2C.enableStartDetect() { I2CIE |= STTIE; }
  
  async command void HplI2C.disableGeneralCall() { I2CIE &= ~GCIE; }
  async command void HplI2C.enableGeneralCall() { I2CIE |= GCIE; }
  
  async command void HplI2C.disableTransmitReady() { I2CIE &= ~TXRDYIE; }
  async command void HplI2C.enableTransmitReady() { I2CIE |= TXRDYIE; }
  
  async command void HplI2C.disableReceiveReady() { I2CIE &= ~RXRDYIE; }
  async command void HplI2C.enableReceiveReady() { I2CIE |= RXRDYIE; }
  
  async command void HplI2C.disableAccessReady() { I2CIE &= ~ARDYIE; }
  async command void HplI2C.enableAccessReady() { I2CIE |= ARDYIE; }
  
  async command void HplI2C.disableOwnAddress() { I2CIE &= ~OAIE; }
  async command void HplI2C.enableOwnAddress() { I2CIE |= OAIE; }

  async command void HplI2C.disableNoAck() { I2CIE &= ~NACKIE; }
  async command void HplI2C.enableNoAck() { I2CIE |= NACKIE; }
  
  async command void HplI2C.disableArbitrationLost() { I2CIE &= ~ALIE; }
  async command void HplI2C.enableArbitrationLost() { I2CIE |= ALIE; }
  
  // I2CIFG
  async command bool HplI2C.isStartDetectPending() {
    if (I2CIFG & STTIFG){
      I2CIFG &= ~STTIFG;
      return SUCCESS;
    }
    return FAIL;
  }
  
  async command bool HplI2C.isGeneralCallPending() {
    if (I2CIFG & GCIFG){
      I2CIFG &= ~GCIFG;
      return SUCCESS;
    }
    return FAIL;
  }
  
  async command bool HplI2C.isTransmitReadyPending() {
    return ( I2CIFG & TXRDYIFG ) != 0;
  }
  
  async command bool HplI2C.isReceiveReadyPending() {
    return ( I2CIFG & RXRDYIFG ) != 0;
  }
  
  async command bool HplI2C.isAccessReadyPending() {
    if (I2CIFG & ARDYIFG){
      I2CIFG &= ~ARDYIFG;
      return SUCCESS;
    }
    return FAIL;
  }
  
  async command bool HplI2C.isOwnAddressPending() {
    if (I2CIFG & OAIFG){
      I2CIFG &= ~OAIFG;
      return SUCCESS;
    }
    return FAIL;
  }
  
  async command bool HplI2C.isNoAckPending() {
    if (I2CIFG & NACKIFG){
      I2CIFG &= ~NACKIFG;
      return SUCCESS;
    }
    return FAIL;
  }
  
  async command bool HplI2C.isArbitrationLostPending() {
    if (I2CIFG & ALIFG){
      I2CIFG &= ~ALIFG;
      return SUCCESS;
    }
    return FAIL;
  }
  
  // I2CIV
  async command uint8_t HplI2C.getIV() {
    return I2CIV;
  }
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/HplMsp430Usart0P.nc000066400000000000000000000262461207233610700256020ustar00rootroot00000000000000/**
 * Copyright (c) 2005-2006 Arched Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Copyright (c) 2004-2005, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "msp430usart.h"
/**
 * Implementation of USART0 lowlevel functionality - stateless.
 * Setting a mode will by default disable USART-Interrupts.
 *
 * @author: Jan Hauer 
 * @author: Jonathan Hui 
 * @author: Vlado Handziski 
 * @author: Joe Polastre
 * @author: Philipp Huppertz 
 * @version $Revision: 1.2 $ $Date: 2010/07/29 13:19:06 $
 */

module HplMsp430Usart0P @safe() {
  provides interface HplMsp430Usart as Usart;
  provides interface HplMsp430UsartInterrupts as Interrupts;
  provides interface HplMsp430I2CInterrupts as I2CInterrupts;
  
  uses interface HplMsp430I2C as HplI2C;
  uses interface HplMsp430GeneralIO as SIMO;
  uses interface HplMsp430GeneralIO as SOMI;
  uses interface HplMsp430GeneralIO as UCLK;
  uses interface HplMsp430GeneralIO as URXD;
  uses interface HplMsp430GeneralIO as UTXD;

  uses interface Leds;
}

implementation
{
  MSP430REG_NORACE(IE1);
  MSP430REG_NORACE(ME1);
  MSP430REG_NORACE(IFG1);
  MSP430REG_NORACE(U0TCTL);
  MSP430REG_NORACE(U0RCTL);
  MSP430REG_NORACE(U0TXBUF);
  
  TOSH_SIGNAL(UART0RX_VECTOR) {
    uint8_t temp = U0RXBUF;
    //    call Leds.led0Toggle();
    signal Interrupts.rxDone(temp);
  }
  
  TOSH_SIGNAL(UART0TX_VECTOR) {
    if ( call HplI2C.isI2C() ){
      //      call Leds.led1Toggle();
      signal I2CInterrupts.fired();
    }
    else{
      //      call Leds.led2Toggle();
      signal Interrupts.txDone();
    }
  }
  
  async command void Usart.setUctl(msp430_uctl_t control) {
    U0CTL=uctl2int(control);
  }

  async command msp430_uctl_t Usart.getUctl() {
    return int2uctl(U0CTL);
  }

  async command void Usart.setUtctl(msp430_utctl_t control) {
    U0TCTL=utctl2int(control);
  }

  async command msp430_utctl_t Usart.getUtctl() {
    return int2utctl(U0TCTL);
  }

  async command void Usart.setUrctl(msp430_urctl_t control) {
    U0RCTL=urctl2int(control);
  }

  async command msp430_urctl_t Usart.getUrctl() {
    return int2urctl(U0RCTL);
  }

  async command void Usart.setUbr(uint16_t control) {
    atomic {
      U0BR0 = control & 0x00FF;
      U0BR1 = (control >> 8) & 0x00FF;
    }
  }

  async command uint16_t Usart.getUbr() {
    return (U0BR1 << 8) + U0BR0;
  }

  async command void Usart.setUmctl(uint8_t control) {
    U0MCTL=control;
  }

  async command uint8_t Usart.getUmctl() {
    return U0MCTL;
  }

  async command void Usart.resetUsart(bool reset) {
    if (reset) {
      U0CTL = SWRST;
    }
    else {
      CLR_FLAG(U0CTL, SWRST);
    }
  }

  async command bool Usart.isSpi() {
    atomic {
      return (U0CTL & SYNC) && (ME1 & USPIE0);
    }
  }

  async command bool Usart.isUart() {
    atomic {
      return !(U0CTL & SYNC) && ((ME1 & UTXE0) && (ME1 & URXE0));
    }
  }

  async command bool Usart.isUartTx() {
    atomic {
      return !(U0CTL & SYNC) && (ME1 & UTXE0);
    }
  }

  async command bool Usart.isUartRx() {
    atomic {
      return !(U0CTL & SYNC) && (ME1 & URXE0);
    }
  }

  async command msp430_usartmode_t Usart.getMode() {
    if (call Usart.isUart())
      return USART_UART;
    else if (call Usart.isUartRx())
      return USART_UART_RX;
    else if (call Usart.isUartTx())
      return USART_UART_TX;
    else if (call Usart.isSpi())
      return USART_SPI;
    else if (call HplI2C.isI2C())
      return USART_I2C;
    else
      return USART_NONE;
  }

  async command void Usart.enableUart() {
    atomic{
      call UTXD.selectModuleFunc();
      call URXD.selectModuleFunc();
    }
    ME1 |= (UTXE0 | URXE0);   // USART0 UART module enable
  }

  async command void Usart.disableUart() {
    atomic {
      ME1 &= ~(UTXE0 | URXE0);   // USART0 UART module enable
      call UTXD.selectIOFunc();
      call URXD.selectIOFunc();
    }

  }

  async command void Usart.enableUartTx() {
    call UTXD.selectModuleFunc();
    ME1 |= UTXE0;   // USART0 UART Tx module enable
  }

  async command void Usart.disableUartTx() {
    ME1 &= ~UTXE0;   // USART0 UART Tx module enable
    call UTXD.selectIOFunc();

  }

  async command void Usart.enableUartRx() {
    call URXD.selectModuleFunc();
    ME1 |= URXE0;   // USART0 UART Rx module enable
  }

  async command void Usart.disableUartRx() {
    ME1 &= ~URXE0;  // USART0 UART Rx module disable
    call URXD.selectIOFunc();

  }

  async command void Usart.enableSpi() {
    atomic {
      call SIMO.selectModuleFunc();
      call SOMI.selectModuleFunc();
      call UCLK.selectModuleFunc();
    }
    ME1 |= USPIE0;   // USART0 SPI module enable
  }

  async command void Usart.disableSpi() {
    atomic {
      ME1 &= ~USPIE0;   // USART0 SPI module disable
      call SIMO.selectIOFunc();
      call SOMI.selectIOFunc();
      call UCLK.selectIOFunc();
    }
  }
  
  void configSpi(msp430_spi_union_config_t* config) {
    // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST;
    U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST;  
    U0TCTL = config->spiRegisters.utctl;

    call Usart.setUbr(config->spiRegisters.ubr);
    call Usart.setUmctl(0x00);
  }

  async command void Usart.setModeSpi(msp430_spi_union_config_t* config) {
    
    atomic {
    	call Usart.resetUsart(TRUE);
    	call HplI2C.clearModeI2C();
    	call Usart.disableUart();
      configSpi(config);
      call Usart.enableSpi();
      call Usart.resetUsart(FALSE);
      call Usart.clrIntr();
      call Usart.disableIntr();
    }    
    return;
  }

  void configUart(msp430_uart_union_config_t* config) {

    U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST;
    U0TCTL = config->uartRegisters.utctl;
    U0RCTL = config->uartRegisters.urctl;        
    
    call Usart.setUbr(config->uartRegisters.ubr);
    call Usart.setUmctl(config->uartRegisters.umctl);
  }

  async command void Usart.setModeUart(msp430_uart_union_config_t* config) {

    atomic { 
      call Usart.resetUsart(TRUE);
     	call HplI2C.clearModeI2C();
    	call Usart.disableSpi();
      configUart(config);
      if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) {
      	call Usart.enableUart();
      } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) {
        call Usart.disableUartTx();
        call Usart.enableUartRx();
      } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){
        call Usart.disableUartRx();
        call Usart.enableUartTx();
      } else {
        call Usart.disableUart();
      }
      call Usart.resetUsart(FALSE);
      call Usart.clrIntr();
      call Usart.disableIntr();
    }
    
    return;
  }

  async command bool Usart.isTxIntrPending(){
    if (IFG1 & UTXIFG0){
      return TRUE;
    }
    return FALSE;
  }

  async command bool Usart.isTxEmpty(){
    if (U0TCTL & TXEPT) {
      return TRUE;
    }
    return FALSE;
  }

  async command bool Usart.isRxIntrPending(){
    if (IFG1 & URXIFG0){
      return TRUE;
    }
    return FALSE;
  }

  async command void Usart.clrTxIntr(){
    IFG1 &= ~UTXIFG0;
  }

  async command void Usart.clrRxIntr() {
    IFG1 &= ~URXIFG0;
  }

  async command void Usart.clrIntr() {
    IFG1 &= ~(UTXIFG0 | URXIFG0);
  }

  async command void Usart.disableRxIntr() {
    IE1 &= ~URXIE0;
  }

  async command void Usart.disableTxIntr() {
    IE1 &= ~UTXIE0;
  }

  async command void Usart.disableIntr() {
      IE1 &= ~(UTXIE0 | URXIE0);
  }

  async command void Usart.enableRxIntr() {
    atomic {
      IFG1 &= ~URXIFG0;
      IE1 |= URXIE0;
    }
  }

  async command void Usart.enableTxIntr() {
    atomic {
      IFG1 &= ~UTXIFG0;
      IE1 |= UTXIE0;
    }
  }

  async command void Usart.enableIntr() {
    atomic {
      IFG1 &= ~(UTXIFG0 | URXIFG0);
      IE1 |= (UTXIE0 | URXIE0);
    }
  }

  async command void Usart.tx(uint8_t data) {
    atomic U0TXBUF = data;
  }

  async command uint8_t Usart.rx() {
    uint8_t value;
    atomic value = U0RXBUF;
    return value;
  }
  
 default async event void I2CInterrupts.fired() { }
 default async command bool HplI2C.isI2C() {  return FALSE; }
 default async command void HplI2C.clearModeI2C() { } 
 
 default async event void Interrupts.rxDone( uint8_t data ) {}
 default async event void Interrupts.txDone() { }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/InternalFlashC.nc000066400000000000000000000071021207233610700255540ustar00rootroot00000000000000// $Id: InternalFlashC.nc,v 1.1 2010/12/17 14:24:28 mgh Exp $

/*									tab:4
 *
 *
 * "Copyright (c) 2000-2004 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 */

/**
 * InternalFlashC.nc - Internal flash implementation for telos msp
 * platform. On the msp, the flash must first be erased before a value
 * can be written. However, the msp can only erase the flash at a
 * segment granularity (128 bytes for the information section). This
 * module allows transparent read/write of individual bytes to the
 * information section by dynamically switching between the two
 * provided segments in the information section.
 *
 * Valid address range is 0x1000 - 0x107E (0x107F is used to store the
 * version number of the information segment).
 *
 * @author Jonathan Hui 
 *
 */

module InternalFlashC {
  provides interface InternalFlash;
}

implementation {

  enum {
    IFLASH_BOUND_HIGH = 0x7e,
    IFLASH_OFFSET     = 0x1000,
    IFLASH_SIZE       = 128,
    IFLASH_SEG0_VNUM_ADDR = 0x107f,
    IFLASH_SEG1_VNUM_ADDR = 0x10ff,
    IFLASH_INVALID_VNUM = -1,
  };

  uint8_t chooseSegment() {
    int8_t vnum0 = *(int8_t*)IFLASH_SEG0_VNUM_ADDR;
    int8_t vnum1 = *(int8_t*)IFLASH_SEG1_VNUM_ADDR;
    if (vnum0 == IFLASH_INVALID_VNUM)
      return 1;
    else if (vnum1 == IFLASH_INVALID_VNUM)
      return 0;
    return ( (int8_t)(vnum0 - vnum1) < 0 );
  }

  command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) {

    volatile int8_t *newPtr;
    int8_t *oldPtr;
    int8_t *bufPtr = (int8_t*)buf;
    int8_t version;
    uint16_t i;

    if (IFLASH_BOUND_HIGH + 2 < (uint16_t)addr + size)
      return FAIL;

    addr += IFLASH_OFFSET;
    newPtr = oldPtr = (int8_t*)IFLASH_OFFSET;
    if (chooseSegment()) {
      oldPtr += IFLASH_SIZE;
    }
    else {
      addr += IFLASH_SIZE;
      newPtr += IFLASH_SIZE;
    }

    atomic {
      FCTL2 = FWKEY + FSSEL1 + FN2;
      FCTL3 = FWKEY;
      FCTL1 = FWKEY + ERASE;
      *newPtr = 0;
      FCTL1 = FWKEY + WRT;

      for ( i = 0; i < IFLASH_SIZE-1; i++, newPtr++, oldPtr++ ) {
	if ((uint16_t)newPtr < (uint16_t)addr || (uint16_t)addr+size <= (uint16_t)newPtr)
	  *newPtr = *oldPtr;
	else
	  *newPtr = *bufPtr++;
      }
      version = *oldPtr + 1;
      if (version == IFLASH_INVALID_VNUM)
	version++;
      *newPtr = version;

      FCTL1 = FWKEY;
      FCTL3 = FWKEY + LOCK;
    }

    return SUCCESS;

  }

  command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) {

    addr += IFLASH_OFFSET;
    if (chooseSegment())
      addr += IFLASH_SIZE;

    memcpy(buf, addr, size);

    return SUCCESS;

  }

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/Msp430I2CC.nc000066400000000000000000000047671207233610700243240ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2012-01-31 19:41:08 $
 */

#include 
#include "msp430usart.h"

generic configuration Msp430I2CC() {
  
  provides interface Resource;
  provides interface ResourceRequested;
  provides interface I2CPacket as I2CBasicAddr;
  provides interface Init as I2CInit;
  
  uses interface Msp430I2CConfigure;
  
}

implementation {
  
  enum {
    CLIENT_ID = unique( MSP430_I2CO_BUS ),
  };
  
  components Msp430I2C0P as I2CP;
  Resource = I2CP.Resource[ CLIENT_ID ];
  I2CBasicAddr = I2CP.I2CBasicAddr;
  I2CInit      = I2CP.I2CInit;
  Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ];
  
  components new Msp430Usart0C() as UsartC;
  ResourceRequested = UsartC;
  I2CP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
  I2CP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
  I2CP.I2CInterrupts -> UsartC.HplMsp430I2CInterrupts;
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/Msp430I2CP.nc000066400000000000000000000160571207233610700243340ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Jonathan Hui 
 * @version $Revision: 1.6 $ $Date: 2012-05-25 19:29:48 $
 */

#include 

module Msp430I2CP {
  
  provides interface I2CPacket as I2CBasicAddr;

  provides interface Init as I2CInit;

  uses interface HplMsp430I2C as HplI2C;
  uses interface HplMsp430I2CInterrupts as I2CInterrupts;
  
}

implementation {

#ifndef I2CDR_
#define I2CDR I2CDRW
#endif

  MSP430REG_NORACE(I2CIE);
  
  enum {
    OFF = 1,
    IDLE,
    PACKET_WRITE,
    PACKET_READ
  };

  norace uint8_t stateI2C = IDLE;
  uint8_t length;
  uint8_t ptr;
  norace error_t result;
  uint8_t * data;


  command error_t I2CInit.init() {
    atomic stateI2C = IDLE;
    return SUCCESS;
  }

  task void readDone() {
    // variables protected from change by the stateI2C state machine
    error_t _result;
    uint8_t _length;
    uint8_t* _data;
    uint16_t _addr;

    _result = result;
    _length = length;
    _data = data;
    _addr = I2CSA;

    atomic stateI2C = IDLE;
    signal I2CBasicAddr.readDone(_result, _addr, _length, _data);
  }

  task void writeDone() {
    // variables protected from change by the stateI2C state machine
    error_t _result;
    uint8_t _length;
    uint8_t* _data;
    uint16_t _addr;

    _result = result;
    _length = length;
    _data = data;
    _addr = I2CSA;

    // wait for the module to finish its transmission
    // spin only lasts ~4bit times == 4us.
    while (I2CDCTL & I2CBUSY) nop();

    atomic stateI2C = IDLE;
    signal I2CBasicAddr.writeDone(_result, _addr, _length, _data);
  }

  async command error_t I2CBasicAddr.read( i2c_flags_t flags,
					   uint16_t _addr, uint8_t _length, 
					   uint8_t* _data ) {
    uint8_t _state;

    atomic {
      _state = stateI2C;
      if (_state == IDLE) {
	stateI2C = PACKET_READ;
      }
    }

    if (_state == IDLE) {
      // perform register modifications with interrupts disabled
      // to maintain consistent state
      atomic {
	result = FAIL;

	// disable I2C to set the registers
	U0CTL &= ~I2CEN;

	I2CSA = _addr;

	length = _length;
	data = _data;
	ptr = 0;

	U0CTL |= MST;

	I2CNDAT = _length;

	// enable I2C module
	U0CTL |= I2CEN;
	
	// set receive mode
	I2CTCTL &= ~I2CTRX;

	// get an event if the receiver does not ACK
	I2CIE = RXRDYIE | NACKIE;
	I2CIFG = 0;

	// start condition and stop condition need to be sent
	I2CTCTL |= (I2CSTP | I2CSTT);
      }

      return SUCCESS;
    }

    return FAIL;
  }
  
  // handle the interrupt within this component
  void localRxData() {
    uint16_t* _data16 = (uint16_t*)data;

    if (stateI2C != PACKET_READ)
      return;

    // figure out where we are in the transmission
    // should only occur when I2CNDAT > 0
    if (I2CTCTL & I2CWORD) {
      _data16[(int)ptr >> 1] = I2CDR;
      ptr = ptr + 2;
    }
    else {
      data[(int)ptr] = I2CDR & 0xFF;
      ptr++;
    }

    //    I2CIFG = 0;
    
    if (ptr == length) {
      I2CIE &= ~RXRDYIE;
      result = SUCCESS;
      if (!post readDone())
	stateI2C = IDLE;
    }
  }

  async command error_t I2CBasicAddr.write( i2c_flags_t flags,
					    uint16_t _addr, uint8_t _length,
					    uint8_t* _data ) {
    
    uint8_t _state;

    _state = stateI2C;
    if (_state == IDLE) {
      stateI2C = PACKET_WRITE;
    }

    if (_state == IDLE) {
      // perform register modifications with interrupts disabled
      atomic {
	// disable I2C to set the registers
	result = FAIL;

	U0CTL &= ~I2CEN;

	I2CSA = _addr;
	
	length = _length;
	data = _data;
	ptr = 0;

	U0CTL |= MST;
	
	I2CNDAT = _length;

	// enable I2C module
	U0CTL |= I2CEN;
	
	// set transmit mode
	I2CTCTL |= I2CTRX;

	// get an event if the receiver does not ACK
	I2CIE = TXRDYIE | NACKIE;
	I2CIFG = 0;

	// start condition and stop condition need to be sent
	I2CTCTL |= (I2CSTP | I2CSTT);
      }

      return SUCCESS;
    }

    return FAIL;
  }
  
  // handle the interrupt within this component
  void localTxData() {
    uint16_t* _data16 = (uint16_t*)data;

    if (stateI2C != PACKET_WRITE)
      return;

    // figure out where we are in the transmission
    // should only occur when I2CNDAT > 0
    if (I2CTCTL & I2CWORD) {
      I2CDR = _data16[(int)ptr >> 1];
      ptr = ptr + 2;
    }
    else {
      I2CDR = data[(int)ptr];
      ptr++;
    }

    //    I2CIFG = 0;
    
    if (ptr == length) {
      I2CIE &= ~TXRDYIE;
      result = SUCCESS;
      if (!post writeDone())
	stateI2C = IDLE;
    }
  }

  void localNoAck() {
    if ((stateI2C != PACKET_WRITE) && (stateI2C != PACKET_READ))
      return;

    I2CNDAT = 0;
    I2CIE = 0;

    // issue a stop command to clear the bus if it has not been stopped
    if (I2CDCTL & I2CBB)
      I2CTCTL |= I2CSTP;

    if (stateI2C == PACKET_WRITE) {
      if (!post writeDone())
	stateI2C = IDLE;
    }
    else if (stateI2C == PACKET_READ) {
      if (!post readDone())
	stateI2C = IDLE;
    }
  }

  async event void I2CInterrupts.fired() {
    volatile uint16_t value = I2CIV;

    switch (value) {
    case 0x0000:
      break;
    case 0x0002:
      localNoAck();
      call HplI2C.isArbitrationLostPending();
      break;
    case 0x0004:
      localNoAck();
      call HplI2C.isNoAckPending();
      break;
    case 0x0006:
      call HplI2C.isOwnAddressPending();
      break;
    case 0x0008:
      call HplI2C.isAccessReadyPending();
      break;
    case 0x000A:
      localRxData();
      break;
    case 0x000C:
      localTxData();
      break;
    case 0x000E:
      call HplI2C.isGeneralCallPending();
      break;
    case 0x0010:
      call HplI2C.isStartDetectPending();
      break;
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitor.h000066400000000000000000000041471207233610700264350ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    March, 2007
 *
 * enum to set svs thresholds, presumably more meaningful than "vld_n"?
 */

// as in 1.9v, 2.1v, etc.
enum {
  OFF,
  ONE_9V =  VLD0,    
  TWO_1V =  VLD1,
  TWO_2V =  VLD1 | VLD0,
  TWO_3V =  VLD2,
  TWO_4V =  VLD2 | VLD0,
  TWO_5V =  VLD2 | VLD1,
  TWO_65V = VLD2 | VLD1 | VLD0,
  TWO_8V =  VLD3,
  TWO_9V =  VLD3 | VLD0,
  THREE_05V = VLD3 | VLD1,
  THREE_2V =  VLD3 | VLD1 | VLD0,
  THREE_35V = VLD3 | VLD2,
  THREE_5V =  VLD3 | VLD2 | VLD0,
  THREE_7V =  VLD3 | VLD2 | VLD1,
  EXTERNAL =  VLD3 | VLD2 | VLD1 | VLD0
};
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitor.nc000066400000000000000000000044521207233610700266050ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    March, 2007
 *
 * simple interface to msp430 supply voltage supervisor register
 */

interface PowerSupplyMonitor{

  command void resetOnLowVoltage(bool reset);

  /* enum in PowerSupplyVoltage.h */
  command void setVoltageThreshold(uint8_t threshold);

  /* polling for low voltage condtion */
  command void setMonitorInterval(uint32_t interval_ms);

  command void stopVoltageMonitor();

  command error_t isSupplyMonitorEnabled();

  /* manual query */
  command error_t queryLowVoltageCondition();

  /* flag is immediately reset unless power problem is remedied */
  command void clearLowVoltageCondition();

  command void disable();

  /* triggered by polling mechanism */
  event void voltageThresholdReached(uint8_t t);
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitorC.nc000066400000000000000000000037731207233610700267150ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 *  Author:  Steve Ayer
 *           March, 2007
 */


configuration PowerSupplyMonitorC {
  provides {
    interface Init;
    interface StdControl;
    interface PowerSupplyMonitor;
  }
}
implementation {
  components PowerSupplyMonitorP, new TimerMilliC() as Timer, LedsC;

  Init = PowerSupplyMonitorP;
  StdControl = PowerSupplyMonitorP;
  PowerSupplyMonitor = PowerSupplyMonitorP;

  PowerSupplyMonitorP.Timer -> Timer;
  PowerSupplyMonitorP.Leds  -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitorP.nc000066400000000000000000000112011207233610700267130ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    March, 2007
 *
 * support for interface to msp430 SVSCTL functionality
 */

//#include "PowerSupplyMonitor.h"

module PowerSupplyMonitorP {
  provides {
    interface Init;
    interface StdControl;
    interface PowerSupplyMonitor;
  }
  uses{
    interface Timer as Timer;
    interface Leds;
  }
}

implementation {
  uint8_t threshold;
  uint32_t monitor_interval;
  bool started, spurious_check;

  /* 
   * sets svs to first voltage level beneath regulator (2.9v), 
   * no reset, 15 minute polling 
   */
  void init() {
    threshold = THREE_2V;
    monitor_interval = 900000;  

    SVSCTL = 0;
    //    CLR_FLAG(SVSCTL, 0xff);
  }
  
  /* turns on svs to highest voltage level (3.7v), no reset */
  command error_t Init.init(){
    started = FALSE;
    spurious_check = FALSE;

    init();
    
    return SUCCESS;
  }

  command error_t StdControl.start(){
    CLR_FLAG(SVSCTL, EXTERNAL);
    SET_FLAG(SVSCTL, threshold);

    started = TRUE;
    call Timer.startPeriodic(monitor_interval);
    return SUCCESS;
  }

  command error_t StdControl.stop(){
    call PowerSupplyMonitor.disable();

    started = FALSE;
    return SUCCESS;
  }


  task void spurious_test(){
    call Timer.stop();
    started = FALSE;

    atomic{
      CLR_FLAG(SVSCTL, EXTERNAL);  // set vld to zero to stop detection
      CLR_FLAG(SVSCTL, SVSFG);
    }

    spurious_check = TRUE;
    call Timer.startOneShot(5000);
  }

  task void recheck(){
    spurious_check = FALSE;

    SET_FLAG(SVSCTL, threshold);  // set vld back to threshold, restart detection

    TOSH_uwait(1000);  // wait for svs to settle back down (max time ~ 50us, but hey)

    atomic if(READ_FLAG(SVSCTL, SVSFG)){
      CLR_FLAG(SVSCTL, threshold);  // set vld back to threshold, restart detection
      signal PowerSupplyMonitor.voltageThresholdReached(threshold);
    }
  }
      
  event void Timer.fired(){
    if(spurious_check)
      post recheck();
    else{
      atomic if(READ_FLAG(SVSCTL, SVSFG))
	post spurious_test();
    }
  }

  command void PowerSupplyMonitor.resetOnLowVoltage(bool reset){
    if(reset)
      SET_FLAG(SVSCTL, PORON);
    else
      CLR_FLAG(SVSCTL, PORON);
  }

  /* enum in PowerSupplyVoltage.h for this */
  command void PowerSupplyMonitor.setVoltageThreshold(uint8_t t){
    threshold = t;
    if(started){
      CLR_FLAG(SVSCTL, EXTERNAL);  
      SET_FLAG(SVSCTL, t);
    }
  }

  command error_t PowerSupplyMonitor.isSupplyMonitorEnabled(){
    return READ_FLAG(SVSCTL, SVSON);
  }

  command error_t PowerSupplyMonitor.queryLowVoltageCondition(){
    return READ_FLAG(SVSCTL, SVSFG);
  }


  command void PowerSupplyMonitor.setMonitorInterval(uint32_t interval_ms){
    monitor_interval = interval_ms;
    if(started){
      call Timer.stop();
      call Timer.startPeriodic(monitor_interval);
    }
  }

  command void PowerSupplyMonitor.clearLowVoltageCondition(){
    CLR_FLAG(SVSCTL, SVSFG);
  }

  command void PowerSupplyMonitor.stopVoltageMonitor() {
    call Timer.stop();
  }

  command void PowerSupplyMonitor.disable(){
    CLR_FLAG(SVSCTL, 0xf0);

    started = FALSE;

    call Timer.stop();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/msp430hardware.h000066400000000000000000000403221207233610700253130ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

// @author Vlado Handziski 
// @author Joe Polastre 
// @author Cory Sharp 

#ifndef _H_msp430hardware_h
#define _H_msp430hardware_h

#if defined(__MSPGCC__)
/* mspgcc */
#include 
#include 
#else /* __MSPGCC__ */
/* old mspgcc3, forked mspgcc4 */
#include 
#include 
#endif /* __MSPGCC__ */
#include "msp430regtypes.h"
#include "Msp430DcoSpec.h"


#ifdef __MSP430_TI_HEADERS__

/* TI's msp430 headers define FAIL to be 0x80 in the flash module.
 * I'd prefer that it match the value assigned to it in the
 * TinyError.h. */
#undef FAIL

/* Accommodate old gcc alias */
#define MC_STOP MC__STOP

/* Port registers in MSP430 chips have two naming conventions: by
 * number (e.g., P1IN), and by letter (e.g. PAIN).  The numeric-named
 * registers provide 8-bit values, while the alpha-named registers
 * provide 16-bit values.
 *
 * The headers for certain chips define numeric-named registers.
 *
 * In a very few cases, both numeric-named and alpha-named registers
 * are defined.  By inspection, this occurs only for PAIN, which
 * combines P7IN (at the address of PAIN) and P8IN (at 1+&PAIN); and
 * for PBIN, which combines P9IN (at the address of PBIN) and P10IN
 * (at 1+&PBIN).
 *
 * In more recent chips, only alpha-named registers are provided.
 * Since the current TinyOS MSP430 port interface assumes 8-bit
 * registers, by convention we map numeric-named registers to the
 * alpha-named registers beginning with PAIN==P1IN. */

#if defined(__MSP430_HAS_PORTA__) || defined(__MSP430_HAS_PORTA_R__)
#if (! defined(P1IN_)) && (defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__))
#define P1IN_ (uint16_t)(PAIN_)
#define P1OUT_ (uint16_t)(PAOUT_)
#define P1DIR_ (uint16_t)(PADIR_)
#define P1SEL_ (uint16_t)(PASEL_)
#if defined(__MSP430_HAS_PORT1_R__)
#define P1REN_ (uint16_t)(PAREN_)
#endif /* __MSP430_HAS_PORT1_R__ */
#endif /* __MSP430_HAS_PORT1__ */

#if (! defined(P2IN_)) && (defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__))
#define P2IN_ (uint16_t)(PAIN_+1)
#define P2OUT_ (uint16_t)(PAOUT_+1)
#define P2DIR_ (uint16_t)(PADIR_+1)
#define P2SEL_ (uint16_t)(PASEL_+1)
#if defined(__MSP430_HAS_PORT2_R__)
#define P2REN_ (uint16_t)(PAREN_+1)
#endif /* __MSP430_HAS_PORT2_R__ */
#endif /* __MSP430_HAS_PORT2__ */
#endif /* __MSP430_HAS_PORTA__ */


#if defined(__MSP430_HAS_PORTB__) || defined(__MSP430_HAS_PORTB_R__)
#if (! defined(P3IN_)) && (defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__))
#define P3IN_ (uint16_t)(PBIN_)
#define P3OUT_ (uint16_t)(PBOUT_)
#define P3DIR_ (uint16_t)(PBDIR_)
#define P3SEL_ (uint16_t)(PBSEL_)
#if defined(__MSP430_HAS_PORT3_R__)
#define P3REN_ (uint16_t)(PBREN_)
#endif /* __MSP430_HAS_PORT3_R__ */
#endif /* __MSP430_HAS_PORT3__ */

#if (! defined(P4IN_)) && (defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__))
#define P4IN_ (uint16_t)(PBIN_+1)
#define P4OUT_ (uint16_t)(PBOUT_+1)
#define P4DIR_ (uint16_t)(PBDIR_+1)
#define P4SEL_ (uint16_t)(PBSEL_+1)
#if defined(__MSP430_HAS_PORT4_R__)
#define P4REN_ (uint16_t)(PBREN_+1)
#endif /* __MSP430_HAS_PORT4_R__ */
#endif /* __MSP430_HAS_PORT4__ */
#endif /* __MSP430_HAS_PORTB__ */


#if defined(__MSP430_HAS_PORTC__) || defined(__MSP430_HAS_PORTC_R__)
#if (! defined(P5IN_)) && (defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__))
#define P5IN_ (uint16_t)(PCIN_)
#define P5OUT_ (uint16_t)(PCOUT_)
#define P5DIR_ (uint16_t)(PCDIR_)
#define P5SEL_ (uint16_t)(PCSEL_)
#if defined(__MSP430_HAS_PORT5_R__)
#define P5REN_ (uint16_t)(PCREN_)
#endif /* __MSP430_HAS_PORT5_R__ */
#endif /* __MSP430_HAS_PORT5__ */

#if (! defined(P6IN_)) && (defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__))
#define P6IN_ (uint16_t)(PCIN_+1)
#define P6OUT_ (uint16_t)(PCOUT_+1)
#define P6DIR_ (uint16_t)(PCDIR_+1)
#define P6SEL_ (uint16_t)(PCSEL_+1)
#if defined(__MSP430_HAS_PORT6_R__)
#define P6REN_ (uint16_t)(PCREN_+1)
#endif /* __MSP430_HAS_PORT6_R__ */
#endif /* __MSP430_HAS_PORT6__ */
#endif /* __MSP430_HAS_PORTC__ */


#if defined(__MSP430_HAS_PORTD__) || defined(__MSP430_HAS_PORTD_R__)
#if (! defined(P7IN_)) && (defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__))
#define P7IN_ (uint16_t)(PDIN_)
#define P7OUT_ (uint16_t)(PDOUT_)
#define P7DIR_ (uint16_t)(PDDIR_)
#define P7SEL_ (uint16_t)(PDSEL_)
#if defined(__MSP430_HAS_PORT7_R__)
#define P7REN_ (uint16_t)(PDREN_)
#endif /* __MSP430_HAS_PORT7_R__ */
#endif /* __MSP430_HAS_PORT7__ */

#if (! defined(P8IN_)) && (defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__))
#define P8IN_ (uint16_t)(PDIN_+1)
#define P8OUT_ (uint16_t)(PDOUT_+1)
#define P8DIR_ (uint16_t)(PDDIR_+1)
#define P8SEL_ (uint16_t)(PDSEL_+1)
#if defined(__MSP430_HAS_PORT8_R__)
#define P8REN_ (uint16_t)(PDREN_+1)
#endif /* __MSP430_HAS_PORT8_R__ */
#endif /* __MSP430_HAS_PORT8__ */
#endif /* __MSP430_HAS_PORTD__ */


#if defined(__MSP430_HAS_PORTE__) || defined(__MSP430_HAS_PORTE_R__)
#if (! defined(P9IN_)) && (defined(__MSP430_HAS_PORT9__) || defined(__MSP430_HAS_PORT9_R__))
#define P9IN_ (uint16_t)(PEIN_)
#define P9OUT_ (uint16_t)(PEOUT_)
#define P9DIR_ (uint16_t)(PEDIR_)
#define P9SEL_ (uint16_t)(PESEL_)
#if defined(__MSP430_HAS_PORT9_R__)
#define P9REN_ (uint16_t)(PEREN_)
#endif /* __MSP430_HAS_PORT9_R__ */
#endif /* __MSP430_HAS_PORT9__ */

#if (! defined(P10IN_)) && (defined(__MSP430_HAS_PORT10__) || defined(__MSP430_HAS_PORT10_R__))
#define P10IN_ (uint16_t)(PEIN_+1)
#define P10OUT_ (uint16_t)(PEOUT_+1)
#define P10DIR_ (uint16_t)(PEDIR_+1)
#define P10SEL_ (uint16_t)(PESEL_+1)
#if defined(__MSP430_HAS_PORT10_R__)
#define P10REN_ (uint16_t)(PEREN_+1)
#endif /* __MSP430_HAS_PORT10_R__ */
#endif /* __MSP430_HAS_PORT10__ */
#endif /* __MSP430_HAS_PORTE__ */


#if defined(__MSP430_HAS_PORTF__) || defined(__MSP430_HAS_PORTF_R__)
#if (! defined(P11IN_)) && (defined(__MSP430_HAS_PORT11__) || defined(__MSP430_HAS_PORT11_R__))
#define P11IN_ (uint16_t)(PFIN_)
#define P11OUT_ (uint16_t)(PFOUT_)
#define P11DIR_ (uint16_t)(PFDIR_)
#define P11SEL_ (uint16_t)(PFSEL_)
#if defined(__MSP430_HAS_PORT11_R__)
#define P11REN_ (uint16_t)(PFREN_)
#endif /* __MSP430_HAS_PORT11_R__ */
#endif /* __MSP430_HAS_PORT11__ */

#if (! defined(P12IN_)) && (defined(__MSP430_HAS_PORT12__) || defined(__MSP430_HAS_PORT12_R__))
#define P12IN_ (uint16_t)(PFIN_+1)
#define P12OUT_ (uint16_t)(PFOUT_+1)
#define P12DIR_ (uint16_t)(PFDIR_+1)
#define P12SEL_ (uint16_t)(PFSEL_+1)
#if defined(__MSP430_HAS_PORT12_R__)
#define P12REN_ (uint16_t)(PFREN_+1)
#endif /* __MSP430_HAS_PORT12_R__ */
#endif /* __MSP430_HAS_PORT12__ */
#endif /* __MSP430_HAS_PORTF__ */


#endif /* __MSP430_TI_HEADERS__ */

// CPU memory-mapped register access will cause nesc to issue race condition
// warnings.  Race conditions are a significant conern when accessing CPU
// memory-mapped registers, because they can change even while interrupts
// are disabled.  This means that the standard nesc tools for resolving race
// conditions, atomic statements that disable interrupt handling, do not
// resolve CPU register race conditions.  So, CPU registers access must be
// treated seriously and carefully.

// The macro MSP430REG_NORACE allows individual modules to internally
// redeclare CPU registers as norace, eliminating nesc's race condition
// warnings for their access.  This macro should only be used after the
// specific CPU register use has been verified safe and correct.  Example
// use:
//
//    module MyLowLevelModule
//    {
//      // ...
//    }
//    implementation
//    {
//      MSP430REG_NORACE(TACCTL0);
//      // ...
//    }

#undef norace

#define MSP430REG_NORACE_EXPAND(type,name,addr) \
norace static volatile type name asm(#addr)

#define MSP430REG_NORACE3(type,name,addr) \
MSP430REG_NORACE_EXPAND(type,name,addr)

// MSP430REG_NORACE and MSP430REG_NORACE2 presume naming conventions among
// type, name, and addr, which are defined in the local header
// msp430regtypes.h and mspgcc's header io.h and its children.

#define MSP430REG_NORACE2(rename,name) \
MSP430REG_NORACE3(TYPE_##name,rename,name##_)

#define MSP430REG_NORACE(name) \
MSP430REG_NORACE3(TYPE_##name,name,name##_)

// Avoid the type-punned pointer warnings from gcc 3.3, which are warning about
// creating potentially broken object code.  Union casts are the appropriate work
// around.  Unfortunately, they require a function definiton.
#define DEFINE_UNION_CAST(func_name,to_type,from_type) \
to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f:x}; return c.t; }

// redefine ugly defines from msp-gcc
#ifndef DONT_REDEFINE_SR_FLAGS
#undef C
#undef Z
#undef N
#undef V
#undef GIE
#undef CPUOFF
#undef OSCOFF
#undef SCG0
#undef SCG1
#undef LPM0_bits
#undef LPM1_bits
#undef LPM2_bits
#undef LPM3_bits
#undef LPM4_bits
#define SR_C       0x0001
#define SR_Z       0x0002
#define SR_N       0x0004
#define SR_V       0x0100
#define SR_GIE     0x0008
#define SR_CPUOFF  0x0010
#define SR_OSCOFF  0x0020
#define SR_SCG0    0x0040
#define SR_SCG1    0x0080
#define LPM0_bits           SR_CPUOFF
#define LPM1_bits           SR_SCG0+SR_CPUOFF
#define LPM2_bits           SR_SCG1+SR_CPUOFF
#define LPM3_bits           SR_SCG1+SR_SCG0+SR_CPUOFF
#define LPM4_bits           SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF
#endif//DONT_REDEFINE_SR_FLAGS

#ifdef interrupt
#undef interrupt
#endif

#ifdef wakeup
#undef wakeup
#endif

#ifdef signal
#undef signal
#endif


// Re-definitions for safe tinyOS
// These rely on io.h being included at the top of this file
// thus pulling the affected header files before the re-definitions
#ifdef SAFE_TINYOS
#undef ADC12MEM
#define ADC12MEM            TCAST(int* ONE, ADC12MEM_) /* ADC12 Conversion Memory (for C) */
#undef ADC12MCTL
#define ADC12MCTL           TCAST(char * ONE, ADC12MCTL_)
#endif

// define platform constants that can be changed for different compilers
// these are all msp430-gcc specific (add as necessary)

#ifdef __msp430_headers_adc10_h
#define __msp430_have_adc10
#endif

#ifdef __msp430_headers_adc12_h
#define __msp430_have_adc12
#endif

// backwards compatibility to older versions of the header files
#ifdef __MSP430_HAS_I2C__
#define __msp430_have_usart0_with_i2c
#endif

// I2CBusy flag is not defined by current MSP430-GCC
#ifdef __msp430_have_usart0_with_i2c
#ifndef I2CBUSY
#define I2CBUSY   (0x01 << 5)
#endif
MSP430REG_NORACE2(U0CTLnr,U0CTL);
MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL);
MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL);
#endif

// The signal attribute has opposite meaning in msp430-gcc than in avr-gcc
#define TOSH_SIGNAL(signame) \
  void sig_##signame() __attribute__((interrupt (signame), wakeup)) @C()

// TOSH_INTERRUPT allows nested interrupts
#define TOSH_INTERRUPT(signame) \
  void isr_##signame() __attribute__((interrupt (signame), signal, wakeup)) @C()

inline void TOSH_wait(void)
{
  nop(); nop();
}

// #define TOSH_CYCLE_TIME_NS 250
// Our worst case is 250 ns = 1 cycle.

inline void TOSH_wait_250ns(void)
{
  nop();
}

/* 
   Following the suggestion of the mspgcc.sourceforge.net site
   for an intelligent pause routine
*/
void brief_pause(register unsigned int n)
{
  asm volatile(	"1: \n\t"
		"dec	%0 \n\t"
		"jne	1b\n\t"
		:  "+r" (n));
}

#define TOSH_uwait(n)   brief_pause((((unsigned long long)n) * TARGET_DCO_KHZ * 1024 / 1000000 - 2) / 3)

#define SET_FLAG(port, flag) ((port) |= (flag))
#define CLR_FLAG(port, flag) ((port) &= ~(flag))
#define READ_FLAG(port, flag) ((port) & (flag))

// TOSH_ASSIGN_PIN creates functions that are effectively marked as
// "norace".  This means race conditions that result from their use will not
// be detectde by nesc.

#define TOSH_ASSIGN_PIN_HEX(name, port, hex) \
void TOSH_SET_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \
void TOSH_CLR_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r &= ~hex; } \
void TOSH_TOGGLE_##name##_PIN() @safe(){ MSP430REG_NORACE2(r,P##port##OUT); r ^= hex; } \
uint8_t TOSH_READ_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##IN); return (r & hex); } \
void TOSH_MAKE_##name##_OUTPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r |= hex; } \
void TOSH_MAKE_##name##_INPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r &= ~hex; } \
void TOSH_SEL_##name##_MODFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r |= hex; } \
void TOSH_SEL_##name##_IOFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r &= ~hex; }

#define TOSH_ASSIGN_PIN(name, port, bit) \
TOSH_ASSIGN_PIN_HEX(name,port,(1<<(bit)))

typedef uint8_t mcu_power_t @combine("mcombine");
mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() {
  return (m1 < m2) ? m1: m2;
}
enum {
  MSP430_POWER_ACTIVE = 0,
  MSP430_POWER_LPM0   = 1,
  MSP430_POWER_LPM1   = 2,
  MSP430_POWER_LPM2   = 3,
  MSP430_POWER_LPM3   = 4,
  MSP430_POWER_LPM4   = 5
};

void __nesc_disable_interrupt(void) @safe()
{
  dint();
  nop();
}

void __nesc_enable_interrupt(void) @safe()
{
  eint();
}

typedef bool __nesc_atomic_t;
__nesc_atomic_t __nesc_atomic_start(void);
void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts);

#ifndef NESC_BUILD_BINARY
/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
   is #defined, to avoid duplicate functions definitions when binary
   components are used. Such functions do need a prototype in all cases,
   though. */
__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe()
{
  __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0);
  __nesc_disable_interrupt();
  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
  return result;
}

void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe()
{
  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
  if( reenable_interrupts )
    __nesc_enable_interrupt();
}
#endif

/* Floating-point network-type support.
   These functions must convert to/from a 32-bit big-endian integer that follows
   the layout of Java's java.lang.float.floatToRawIntBits method.
   Conveniently, for the MSP430 family, this is a straight byte copy...
*/

typedef float nx_float __attribute__((nx_base_be(afloat)));

inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
  float f;
  memcpy(&f, source, sizeof(float));
  return f;
}

inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
  memcpy(target, &value, sizeof(float));
  return value;
}

/* Support for chips with configurable resistors on digital inputs.  These
 * are denoted with __MSP430_HAS_PORT1_R__ and similar defines. */
enum {
  MSP430_PORT_RESISTOR_INVALID,    /**< Hardware does not support resistor control, or pin is output */
  MSP430_PORT_RESISTOR_OFF,        /**< Resistor disabled */
  MSP430_PORT_RESISTOR_PULLDOWN,   /**< Pulldown resistor enabled */
  MSP430_PORT_RESISTOR_PULLUP,     /**< Pullup resistor enabled */
};

#endif//_H_msp430hardware_h

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/msp430/msp430usart.h000066400000000000000000000275331207233610700246650ustar00rootroot00000000000000/*
 * Copyright (c) 2004-2006, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */


/**
 * @author Vlado Handziski 
 * @author Philipp Huppertz 
 */

#ifndef _H_Msp430Usart_h
#define _H_Msp430Usart_h

#define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource"
#define MSP430_SPIO_BUS "Msp430Spi0.Resource"
#define MSP430_UARTO_BUS "Msp430Uart0.Resource"
#define MSP430_I2CO_BUS "Msp430I2C0.Resource"

#define MSP430_HPLUSART1_RESOURCE "Msp430Usart1.Resource"
#define MSP430_SPI1_BUS "Msp430Spi1.Resource"
#define MSP430_UART1_BUS "Msp430Uart1.Resource"

typedef enum
{
  USART_NONE = 0,
  USART_UART = 1,
  USART_UART_TX = 2,
  USART_UART_RX = 3,
  USART_SPI = 4,
  USART_I2C = 5
} msp430_usartmode_t;

typedef struct {
  unsigned int swrst: 1;    //Software reset (0=operational; 1=reset)
  unsigned int mm: 1;       //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol)
  unsigned int sync: 1;     //Synchronous mode (0=UART; 1=SPI/I2C)
  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
  unsigned int spb: 1;      //Stop bits (0=one stop bit; 1=two stop bits)
  unsigned int pev: 1;      //Parity select (0=odd; 1=even)
  unsigned int pena: 1;     //Parity enable (0=disabled; 1=enabled)
} __attribute__ ((packed)) msp430_uctl_t ;

typedef struct {
  unsigned int txept:1;      //Transmitter empty (0=busy; 1=TX buffer empty or SWRST=1)
  unsigned int stc:1;       //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled)
  unsigned int txwake: 1;   //Transmiter wake (0=next char is data; 1=next char is address)
  unsigned int urxse: 1;    //Receive start-edge detection (0=disabled; 1=enabled)
  unsigned int ssel: 2;     //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK)
  unsigned int ckpl: 1;     //Clock polarity (0=normal; 1=inverted)
  unsigned int ckph:1;      //Clock phase (0=normal; 1=half-cycle delayed)
} __attribute__ ((packed)) msp430_utctl_t;

typedef struct {
  unsigned int rxerr: 1;    //Receive error (0=no errors; 1=error detected)
  unsigned int rxwake: 1;   //Receive wake-up (0=received data; 1=received an address)
  unsigned int urxwie: 1;   //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx)
  unsigned int urxeie: 1;   //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set)
  unsigned int brk:1;       //Break detect (0=no break; 1=break occured)
  unsigned int oe:1;        //Overrun error (0=no error; 1=overrun error)
  unsigned int pe:1;        //Parity error (0=no error; 1=parity error)
  unsigned int fe:1;        //Framing error (0=no error; 1=low stop bit)
} __attribute__ ((packed)) msp430_urctl_t;

DEFINE_UNION_CAST(uctl2int,uint8_t,msp430_uctl_t)
DEFINE_UNION_CAST(int2uctl,msp430_uctl_t,uint8_t)

DEFINE_UNION_CAST(utctl2int,uint8_t,msp430_utctl_t)
DEFINE_UNION_CAST(int2utctl,msp430_utctl_t,uint8_t)

DEFINE_UNION_CAST(urctl2int,uint8_t,msp430_urctl_t)
DEFINE_UNION_CAST(int2urctl,msp430_urctl_t,uint8_t)

typedef struct {
  unsigned int ubr: 16;     //Clock division factor (>=0x0002)
  
  unsigned int :1;
  unsigned int mm: 1;       //Master mode (0=slave; 1=master)
  unsigned int :1;
  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
  unsigned int: 3;
  
  unsigned int:1;
  unsigned int stc: 1;      //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled)
  unsigned int:2;
  unsigned int ssel: 2;     //Clock source (00=external UCLK [slave]; 01=ACLK [master]; 10=SMCLK [master] 11=SMCLK [master]); 
  unsigned int ckpl: 1;     //Clock polarity (0=inactive is low && data at rising edge; 1=inverted)
  unsigned int ckph: 1;     //Clock phase (0=normal; 1=half-cycle delayed)
  unsigned int :0;
} msp430_spi_config_t;

typedef struct {
  uint16_t ubr;
  uint8_t uctl;
  uint8_t utctl;
} msp430_spi_registers_t;

typedef union {
  msp430_spi_config_t spiConfig;
  msp430_spi_registers_t spiRegisters;
} msp430_spi_union_config_t;

msp430_spi_union_config_t msp430_spi_default_config = { 
  {
    ubr : 0x0002, 
    ssel : 0x02, 
    clen : 1, 
    listen : 0, 
    mm : 1, 
    ckph : 1, 
    ckpl : 0, 
    stc : 1
  } 
};
    
    
    
/**
  The calculations were performed using the msp-uart.pl script:
  msp-uart.pl -- calculates the uart registers for MSP430

  Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org
 **/
typedef enum {
  //32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz
  UBR_32KHZ_1200=0x001B,    UMCTL_32KHZ_1200=0x94,
  UBR_32KHZ_1800=0x0012,    UMCTL_32KHZ_1800=0x84,
  UBR_32KHZ_2400=0x000D,    UMCTL_32KHZ_2400=0x6D,
  UBR_32KHZ_4800=0x0006,    UMCTL_32KHZ_4800=0x77,
  UBR_32KHZ_9600=0x0003,    UMCTL_32KHZ_9600=0x29,  // (Warning: triggers MSP430 errata US14)

  UBR_1MHZ_1200=0x0369,   UMCTL_1MHZ_1200=0x7B,
  UBR_1MHZ_1800=0x0246,   UMCTL_1MHZ_1800=0x55,
  UBR_1MHZ_2400=0x01B4,   UMCTL_1MHZ_2400=0xDF,
  UBR_1MHZ_4800=0x00DA,   UMCTL_1MHZ_4800=0xAA,
  UBR_1MHZ_9600=0x006D,   UMCTL_1MHZ_9600=0x44,
  UBR_1MHZ_19200=0x0036,  UMCTL_1MHZ_19200=0xB5,
  UBR_1MHZ_38400=0x001B,  UMCTL_1MHZ_38400=0x94,
  UBR_1MHZ_57600=0x0012,  UMCTL_1MHZ_57600=0x84,
  UBR_1MHZ_76800=0x000D,  UMCTL_1MHZ_76800=0x6D,
  UBR_1MHZ_115200=0x0009, UMCTL_1MHZ_115200=0x10,
  UBR_1MHZ_230400=0x0004, UMCTL_1MHZ_230400=0x55,

  UBR_4MHZ_115200=0x0024, UMCTL_4MHZ_115200=0x29,
} msp430_uart_rate_t;

typedef struct {
  unsigned int ubr:16;      //Baud rate (use enum msp430_uart_rate_t for predefined rates)
  
  unsigned int umctl: 8;    //Modulation (use enum msp430_uart_rate_t for predefined rates)
  
  unsigned int :1;
  unsigned int mm: 1;       //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol)
  unsigned int :1;
  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
  unsigned int spb: 1;      //Stop bits (0=one stop bit; 1=two stop bits)
  unsigned int pev: 1;      //Parity select (0=odd; 1=even)
  unsigned int pena: 1;     //Parity enable (0=disabled; 1=enabled)
  unsigned int :0;
  
  unsigned int :3;
  unsigned int urxse: 1;    //Receive start-edge detection (0=disabled; 1=enabled)
  unsigned int ssel: 2;     //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK)
  unsigned int ckpl: 1;     //Clock polarity (0=normal; 1=inverted)
  unsigned int :1;
  
  unsigned int :2;
  unsigned int urxwie: 1;   //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx)
  unsigned int urxeie: 1;   //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set)
  unsigned int :4;
  unsigned int :0;
  
  unsigned int utxe:1;			// 1:enable tx module
  unsigned int urxe:1;			// 1:enable rx module
} msp430_uart_config_t;

typedef struct {
  uint16_t ubr;
  uint8_t umctl;
  uint8_t uctl;
  uint8_t utctl;
  uint8_t urctl;
  uint8_t ume;
} msp430_uart_registers_t;

typedef union {
  msp430_uart_config_t uartConfig;
  msp430_uart_registers_t uartRegisters;
} msp430_uart_union_config_t;
    
msp430_uart_union_config_t msp430_uart_default_config = { 
  {
    utxe : 1, 
    urxe : 1, 
    ubr : UBR_1MHZ_57600, 
    umctl : UMCTL_1MHZ_57600, 
    ssel : 0x02, 
    pena : 0, 
    pev : 0, 
    spb : 0, 
    clen : 1, 
    listen : 0, 
    mm : 0, 
    ckpl : 0, 
    urxse : 0, 
    urxeie : 1, 
    urxwie : 0,
    utxe : 1,
    urxe : 1
  } 
};



typedef struct {
  unsigned int i2cstt: 1; // I2CSTT Bit 0 START bit. (0=No action; 1=Send START condition)
  unsigned int i2cstp: 1; // I2CSTP Bit 1 STOP bit. (0=No action; 1=Send STOP condition)
  unsigned int i2cstb: 1; // I2CSTB Bit 2 Start byte. (0=No action; 1=Send START condition and start byte (01h))
  unsigned int i2cctrx: 1; //I2CTRX Bit 3 I2C transmit. (0=Receive mode; 1=Transmit mode) pin.
  unsigned int i2cssel: 2; // I2C clock source select. (00=No clock; 01=ACLK; 10=SMCLK; 11=SMCLK)
  unsigned int i2ccrm: 1;  // I2C repeat mode 
  unsigned int i2cword: 1; // I2C word mode. Selects byte(=0) or word(=1) mode for the I2C data register.
} __attribute__ ((packed)) msp430_i2ctctl_t;

DEFINE_UNION_CAST(i2ctctl2int,uint8_t,msp430_i2ctctl_t)
DEFINE_UNION_CAST(int2i2ctctl,msp430_i2ctctl_t,uint8_t)

typedef struct {
  unsigned int :1;
  unsigned int mst: 1;      //Master mode (0=slave; 1=master)
  unsigned int :1;
  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
  unsigned int xa: 1;       //Extended addressing (0=7-bit addressing; 1=8-bit addressing)
  unsigned int :1;
  unsigned int txdmaen: 1;  //DMA to TX (0=disabled; 1=enabled)
  unsigned int rxdmaen: 1;  //RX to DMA (0=disabled; 1=enabled)
    
  unsigned int :4;
  unsigned int i2cssel: 2;  //Clock source (00=disabled; 01=ACLK; 10=SMCLK; 11=SMCLK)
  unsigned int i2crm: 1;    //Repeat mode (0=use I2CNDAT; 1=count in software)
  unsigned int i2cword: 1;  //Word mode (0=byte mode; 1=word mode)
  
  unsigned int i2cpsc: 8;   //Clock prescaler (values >0x04 not recomended)
  
  unsigned int i2csclh: 8;  //High period (high period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
  
  unsigned int i2cscll: 8;  //Low period (low period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
  
  unsigned int i2coa : 10;  // Own address register.
  unsigned int :6;
} msp430_i2c_config_t;
    
typedef struct {
  uint8_t uctl;
  uint8_t i2ctctl;
  uint8_t i2cpsc;
  uint8_t i2csclh;
  uint8_t i2cscll;
  uint16_t i2coa;
} msp430_i2c_registers_t;

typedef union {
  msp430_i2c_config_t i2cConfig;
  msp430_i2c_registers_t i2cRegisters;
} msp430_i2c_union_config_t;

msp430_i2c_union_config_t msp430_i2c_default_config = { 
  {
    rxdmaen : 0, 
    txdmaen : 0, 
    xa : 0, 
    listen : 0, 
    mst : 1,
    i2cword : 0, 
    i2crm : 1, 
    i2cssel : 0x2, 
    i2cpsc : 0, 
    i2csclh : 0x3, 
    i2cscll : 0x3,
    i2coa : 0,
  } 
};

typedef uint8_t uart_speed_t;
typedef uint8_t uart_parity_t;
typedef uint8_t uart_duplex_t;

enum {
  TOS_UART_1200   = 0,
  TOS_UART_1800   = 1,
  TOS_UART_2400   = 2,
  TOS_UART_4800   = 3,
  TOS_UART_9600   = 4,
  TOS_UART_19200  = 5,
  TOS_UART_38400  = 6,
  TOS_UART_57600  = 7,
  TOS_UART_76800  = 8,
  TOS_UART_115200 = 9,
  TOS_UART_230400 = 10
};

enum {
  TOS_UART_OFF,
  TOS_UART_RONLY,
  TOS_UART_TONLY,
  TOS_UART_DUPLEX
};

enum {
  TOS_UART_PARITY_NONE,
  TOS_UART_PARITY_EVEN,
  TOS_UART_PARITY_ODD
};

#endif//_H_Msp430Usart_h
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/rmcm01/000077500000000000000000000000001207233610700224465ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/rmcm01/DigitalHeartRate.nc000066400000000000000000000037331207233610700261530ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   September, 2011
 *
 */

interface DigitalHeartRate { 
  // number_of_samples is the number of beats to use in rate calculation, max 256
  command void enableRate(uint8_t number_of_samples);

  command void disableRate();
  
  command error_t getRate(uint8_t * rate);

  async event void beat(uint32_t time_32k);
  
  event void newConnectionState(bool up);
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/rmcm01/DigitalHeartRateC.nc000066400000000000000000000046751207233610700262640ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   January, 2011
 *
 * this is a Notify wrapper for pulling heart rate from a Polar RMCM01 
 * module, which provides a positive digital pulse on the line connected 
 * to GPIO_EXTERNAL on the anex board.
 */

configuration DigitalHeartRateC {
  provides{
    interface Init;
    interface DigitalHeartRate;
  }
}

implementation {
  components Rmcm01P;
  Init             = Rmcm01P;
  DigitalHeartRate = Rmcm01P;

  components HplMsp430InterruptP, HplMsp430GeneralIOC as GpioC; 
  Rmcm01P.BeatInterrupt -> HplMsp430InterruptP.Port20;
  Rmcm01P.Msp430GeneralIO -> GpioC.Port20;
  
  components Counter32khz32C as Counter, new CounterToLocalTimeC(T32khz);
  CounterToLocalTimeC.Counter -> Counter;
  Rmcm01P.LocalTime -> CounterToLocalTimeC;
  
  components new TimerMilliC() as connectionTimer;
  Rmcm01P.connectionTimer -> connectionTimer;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/rmcm01/Rmcm01P.nc000066400000000000000000000117171207233610700241560ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   January, 2011
 *
 * this is a Notify wrapper for pulling heart rate from a Polar RMCM01 
 * module, which provides a positive digital pulse on the line connected 
 * to GPIO_EXTERNAL on the anex board.
 */

module Rmcm01P {
  provides{
    interface Init;
    interface DigitalHeartRate;
  }
  uses{
    interface HplMsp430Interrupt as BeatInterrupt;
    interface HplMsp430GeneralIO as Msp430GeneralIO;
    interface LocalTime;
    interface Timer as connectionTimer;
  }
}

implementation {
  enum {
    MAX_SAMPLES = 256
  };

  bool connected,  beat_received;
  uint8_t calculate_rate, number_of_samples, current_beat;
  uint16_t beat_count;
  uint32_t beat_times[MAX_SAMPLES], now;

  command error_t Init.init() {
    TOSH_MAKE_ADC_0_INPUT();
    TOSH_MAKE_ADC_7_INPUT();

    // power hard-wired (at this writing)
    atomic {
      call Msp430GeneralIO.makeInput();
      call Msp430GeneralIO.selectIOFunc();

      call BeatInterrupt.disable();
      call BeatInterrupt.edge(TRUE);

      call BeatInterrupt.clear();
      call BeatInterrupt.enable();
    }

    calculate_rate = FALSE;
    number_of_samples = 15;
    beat_count = 0;
    current_beat = 0;

    /*
     * assume that we're not connected until we see a beat
     * we'll check for a beat every three seconds
     */
    connected = beat_received = FALSE;
    call connectionTimer.startPeriodic(3000);

    return SUCCESS;
  }
  
  command void DigitalHeartRate.enableRate(uint8_t num_samples) {
    atomic {
      number_of_samples = num_samples;
      calculate_rate = TRUE;
      beat_count = 0;
    }
  }

  command void DigitalHeartRate.disableRate() {
    atomic calculate_rate = FALSE;

    memset(beat_times, 0, MAX_SAMPLES * sizeof(uint32_t));
    beat_count = 0;
  }

  command error_t DigitalHeartRate.getRate(uint8_t * rate){
    uint32_t total, interval;
    register int16_t i, j;
    float f_rate;

    if(beat_count < number_of_samples)
      return FAIL;

    total = 0;

    j = current_beat - 1;
    for(i = 0; i < number_of_samples; i++, j--){
      if(j < 0)
	j += MAX_SAMPLES;

      // ack; this just wraps the j - 1 counter
      interval = *(beat_times + j) - *(beat_times + (((j - 1) < 0) ? (j + MAX_SAMPLES - 1) : (j - 1)));
      total += interval;
    }

    // total is in seconds / 32768
    total >>= 15;   // there, that's better!

    f_rate = (float)((float)number_of_samples / (float)total * 60.0);

    *rate = (uint8_t)(f_rate + 0.5);

    return SUCCESS;
  }

  task void store_beat() {
    *(beat_times + current_beat) = now;

    if(current_beat == 255)
      current_beat = 0;
    else
      current_beat++;

    // we only need to to ensure we have enough beats for sample-size request
    if(beat_count < MAX_SAMPLES) 
      beat_count++;
  }

  event void connectionTimer.fired() {
    if(beat_received)
      beat_received = FALSE;
    else if(connected){
      call connectionTimer.stop();
      connected = FALSE;
      signal DigitalHeartRate.newConnectionState(FALSE);
    }
  }

  async event void BeatInterrupt.fired() {
    now = call LocalTime.get();

    signal DigitalHeartRate.beat(now);
    
    call BeatInterrupt.clear();

    if(!connected){
      connected = TRUE;
      call connectionTimer.startPeriodic(3000);
      signal DigitalHeartRate.newConnectionState(TRUE);
    }
    else
      beat_received = TRUE;

    if(calculate_rate)
      post store_beat();
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/000077500000000000000000000000001207233610700217555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/SD.h000066400000000000000000000144241207233610700224410ustar00rootroot00000000000000/* ***********************************************************
* THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR
* REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY, 
* INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS 
* FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR 
* COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE. 
* TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET 
* POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY 
* INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR 
* YOUR USE OF THE PROGRAM.
*
* IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL, 
* CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY 
* THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED 
* OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT 
* OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM. 
* EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF 
* REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS 
* OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF 
* USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S 
* AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF 
* YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS 
* (U.S.$500).
*
* Unless otherwise stated, the Program written and copyrighted 
* by Texas Instruments is distributed as "freeware".  You may, 
* only under TI's copyright in the Program, use and modify the 
* Program without any charge or restriction.  You may 
* distribute to third parties, provided that you transfer a 
* copy of this license to the third party and the third party 
* agrees to these terms by its first use of the Program. You 
* must reproduce the copyright notice and any other legend of 
* ownership on each copy or partial copy, of the Program.
*
* You acknowledge and agree that the Program contains 
* copyrighted material, trade secrets and other TI proprietary 
* information and is protected by copyright laws, 
* international copyright treaties, and trade secret laws, as 
* well as other intellectual property laws.  To protect TI's 
* rights in the Program, you agree not to decompile, reverse 
* engineer, disassemble or otherwise translate any object code 
* versions of the Program to a human-readable form.  You agree 
* that in no event will you alter, remove or destroy any 
* copyright notice included in the Program.  TI reserves all 
* rights not specifically granted under this license. Except 
* as specifically provided herein, nothing in this agreement 
* shall be construed as conferring by implication, estoppel, 
* or otherwise, upon you, any license or other right under any 
* TI patents, copyrights or trade secrets.
*
* You may not use the Program in non-TI devices.
* ********************************************************* */

/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * copied and edited from Texas Instruments sample code
 *
 * @author Steve Ayer
 * @date May 2006
 */
#ifndef SD_H
#define SD_H

#define MMC_START_DATA_BLOCK_TOKEN          0xfe   // Data token start byte, Start Single Block Read

#define MMC_R1_RESPONSE       0x00

typedef uint8_t mmcerror_t;
#define MMC_SUCCESS           0x00
#define MMC_BLOCK_SET_ERROR   0x01
#define MMC_RESPONSE_ERROR    0x02
#define MMC_DATA_TOKEN_ERROR  0x03
#define MMC_INIT_ERROR        0x04
#define MMC_CRC_ERROR         0x10
#define MMC_WRITE_ERROR       0x11
#define MMC_OTHER_ERROR       0x12
#define MMC_TIMEOUT_ERROR     0xFF

#define MMC_GO_IDLE_STATE          0x40     //CMD0
#define MMC_SEND_OP_COND           0x41     //CMD1
#define MMC_READ_CSD               0x49     //CMD9
#define MMC_SEND_CID               0x4a     //CMD10
#define MMC_STOP_TRANSMISSION      0x4c     //CMD12
#define MMC_SEND_STATUS            0x4d     //CMD13
#define MMC_SET_BLOCKLEN           0x50     //CMD16 Set block length for next read/write
#define MMC_READ_SINGLE_BLOCK      0x51     //CMD17 Read block from memory
#define MMC_READ_MULTIPLE_BLOCK    0x52     //CMD18
#define MMC_CMD_WRITEBLOCK         0x54     //CMD20 Write block to memory
#define MMC_WRITE_BLOCK            0x58     //CMD24
#define MMC_WRITE_MULTIPLE_BLOCK   0x59     //CMD25
#define MMC_WRITE_CSD              0x5b     //CMD27 PROGRAM_CSD
#define MMC_SET_WRITE_PROT         0x5c     //CMD28
#define MMC_CLR_WRITE_PROT         0x5d     //CMD29
#define MMC_SEND_WRITE_PROT        0x5e     //CMD30
#define MMC_TAG_SECTOR_START       0x60     //CMD32
#define MMC_TAG_SECTOR_END         0x61     //CMD33
#define MMC_UNTAG_SECTOR           0x62     //CMD34
#define MMC_TAG_EREASE_GROUP_START 0x63     //CMD35
#define MMC_TAG_EREASE_GROUP_END   0x64     //CMD36
#define MMC_UNTAG_EREASE_GROUP     0x65     //CMD37
#define MMC_EREASE                 0x66     //CMD38
#define MMC_READ_OCR               0x67     //CMD39
#define MMC_CRC_ON_OFF             0x68     //CMD40


#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/SD.nc000066400000000000000000000056571207233610700226220ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * Interface for communciating with an SD card via a standard sd card slot.
 *
 * @author Steve Ayer
 * @author Konrad Lorincz
 * @date May 2006
 */                      
#include "SD.h"

interface SD {
  /**
   * Returns the card size in bytes.
   *
   * @return the card size in bytes.
   */
  command uint32_t readCardSize();

  /**
   * Reads 512 bytes from the SD at sector and copies it to bufferPtr
   *
   * @param sector the sector on the SD card (in multiples of 512 bytes).
   * @param bufferPtr pointer to where the SD will copy the data to.  Must be 512 bytes.
   * @return SUCCESS if it was read successfully; FAIL otherwise
   */
  command error_t readBlock(const uint32_t sector, uint8_t * buffer);

  /**
   * Writes 512 bytes from the bufferPtr to the SD card
   *
   * @param sector the sector on the SD card (in multiples of 512 bytes
   *                       where to write the data to).
   * @param bufferPtr pointer to data to be added.  Must be 512 bytes.
   * @return SUCCESS if it was written successfully; FAIL otherwise
   */
  command error_t writeBlock(const uint32_t sector, uint8_t * buffer);

  /**
   * the device has control over the sd card
   */
  async event void available();     

  /**
   * the device has lost control of the sd and should cease 
   * attempts to talk to the card
   */
  async event void unavailable();
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/SDC.nc000066400000000000000000000042601207233610700227120ustar00rootroot00000000000000/**
 * Copyright (c) 2005 Hewlett-Packard Company
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of the Hewlett-Packard Company nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * communicate with a micro-sd slot wired to a telosb header
 */
/**                                   
 * @author Steve Ayer
 * @date   July 2006
 * @date   July 2009 (reworked, updated to maintained version)
 * @author Konrad Lorincz
 * @date March 25, 2008 - ported to TOS 2.x
 */

configuration SDC {
  provides {
    interface SD;
    interface StdControl;
  }
}
implementation {
  components SDP, new Msp430Usart0C(), HplMsp430InterruptP, LedsC;
  
  SD = SDP;
  StdControl = SDP;

  SDP.Usart -> Msp430Usart0C;
  SDP.DockInterrupt  -> HplMsp430InterruptP.Port25;
  SDP.Leds       -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/SDP.nc000066400000000000000000000430501207233610700227270ustar00rootroot00000000000000/* ***********************************************************
* THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR
* REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY, 
* INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS 
* FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR 
* COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE. 
* TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET 
* POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY 
* INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR 
* YOUR USE OF THE PROGRAM.
*
* IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL, 
* CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY 
* THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED 
* OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT 
* OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM. 
* EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF 
* REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS 
* OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF 
* USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S 
* AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF 
* YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS 
* (U.S.$500).
*
* Unless otherwise stated, the Program written and copyrighted 
* by Texas Instruments is distributed as "freeware".  You may, 
* only under TI's copyright in the Program, use and modify the 
* Program without any charge or restriction.  You may 
* distribute to third parties, provided that you transfer a 
* copy of this license to the third party and the third party 
* agrees to these terms by its first use of the Program. You 
* must reproduce the copyright notice and any other legend of 
* ownership on each copy or partial copy, of the Program.
*
* You acknowledge and agree that the Program contains 
* copyrighted material, trade secrets and other TI proprietary 
* information and is protected by copyright laws, 
* international copyright treaties, and trade secret laws, as 
* well as other intellectual property laws.  To protect TI's 
* rights in the Program, you agree not to decompile, reverse 
* engineer, disassemble or otherwise translate any object code 
* versions of the Program to a human-readable form.  You agree 
* that in no event will you alter, remove or destroy any 
* copyright notice included in the Program.  TI reserves all 
* rights not specifically granted under this license. Except 
* as specifically provided herein, nothing in this agreement 
* shall be construed as conferring by implication, estoppel, 
* or otherwise, upon you, any license or other right under any 
* TI patents, copyrights or trade secrets.
*
* You may not use the Program in non-TI devices.
* ********************************************************* */

/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * Operations for communciating with an SD card via a standard sd card slot.
 *
 * functional pieces based upon or copied from Texas Instruments sample code
 *
 * @author  Steve Ayer
 * @date    May 2006
 * @date    July 2009  (extensive rework, tep conformance)
 * @author  Konrad Lorincz  (initial port to tos-2)
 * @date    March 25, 2008
 */

#include "SD.h"
#include "msp430usart.h"

module SDP {
  provides {
    interface StdControl;
    interface SD;
  }
  uses {
    interface HplMsp430Usart as Usart;
    interface HplMsp430Interrupt as DockInterrupt;
    interface Leds;
  }
}

implementation {
  error_t cardInit();
  
#define SPI_TX_DONE        while(call Usart.isTxEmpty() == FALSE);

#define CS_LOW()    TOSH_CLR_SD_CS_N_PIN();              // Card Select
#define CS_HIGH()   SPI_TX_DONE; TOSH_SET_SD_CS_N_PIN();

  /* 
   * this routine is supposed to prevent windows from locking up when 
   * the device is docked.
   */
  void powerCycle() {
    register uint8_t i;

    // wait until the tx buf is clear before killing the card
    CS_HIGH();

    // this connects the path from mcu to card
    TOSH_MAKE_DOCK_N_OUTPUT();
    TOSH_SET_DOCK_N_PIN();

    TOSH_SET_SW_SD_PWR_N_PIN();    
    TOSH_CLR_SD_CS_N_PIN();             

    /* 
     * here we have to clear all input pins to the card, as
     * the card in spi mode will leech power from any pin
     */
    call Usart.disableSpi();
    TOSH_CLR_SD_DI_PIN();
    TOSH_CLR_SD_DO_PIN();
    TOSH_CLR_SD_CLK_PIN();

    for(i = 0; i < 10; i++)
      TOSH_uwait(6000);  

    TOSH_SET_SD_CS_N_PIN();             
    TOSH_CLR_SW_SD_PWR_N_PIN();    

    // undo the override above
    TOSH_MAKE_DOCK_N_INPUT();
  }
    
  command error_t StdControl.start(){
    TOSH_CLR_SW_SD_PWR_N_PIN();    // powers up module on models so equipped

    /* 
     * this pin, when low, tells us that the sd card is unavailable to the processor
     * it should be attached to a pullup unless platform has a docking pin doing an sd override;
     * generally, we need to avoid talking to the sd with the mcu when the pin is low;
     * if it's low now, we'll fire an interrupt when the sd is available to software.
     */
    if(!TOSH_READ_DOCK_N_PIN()){
      call DockInterrupt.edge(TRUE);    // watch for it to go high, off the dock
      powerCycle();
      signal SD.unavailable();
    }
    else{
      call DockInterrupt.edge(FALSE);    // tell us when we're docked

      cardInit();

      signal SD.available();
    }

    call DockInterrupt.enable();
    call DockInterrupt.clear();
    
    return SUCCESS;
  }

  command error_t StdControl.stop(){
    TOSH_SET_SW_SD_PWR_N_PIN();    // powers down module
    TOSH_CLR_SD_CS_N_PIN();

    call DockInterrupt.disable();
    call DockInterrupt.clear();

    return SUCCESS;
  }

  async event void DockInterrupt.fired() {
    if (call DockInterrupt.getValue() == TRUE){      // off the dock
      powerCycle();

      cardInit();

      call DockInterrupt.edge(FALSE);
      signal SD.available();                         // tell the app that it can talk to the sd card
    }
    else{
      call DockInterrupt.edge(TRUE);      
      signal SD.unavailable();                         // tell the app to stop talking to the card
      powerCycle();
    }
    call DockInterrupt.clear();
  }

  void initSPI() {
    msp430_spi_union_config_t * config;

    TOSH_MAKE_SD_CS_N_OUTPUT();
    TOSH_SEL_SD_CS_N_IOFUNC();

    config = &msp430_spi_default_config;
    
    call Usart.setModeSpi(config);

    /*
     * set the clock to 115200 for sd init, default is smclk / 2
     * cardInit raises speed back to smclk / 2 at end of init routine
     */

#ifndef SMCLK_4MHZ
    call Usart.setUbr(UBR_1MHZ_115200);
    call Usart.setUmctl(UMCTL_1MHZ_115200);
#else
    call Usart.setUbr(0x0024);
    call Usart.setUmctl(0x0029);
#endif

    call Usart.enableRxIntr();

    TOSH_SET_SD_CS_N_PIN();

    while(call Usart.isTxEmpty() == FALSE);
  }

  uint8_t spiSendByte (const uint8_t data){
    atomic{
      while(call Usart.isTxEmpty() == FALSE);   
      
      call Usart.tx(data);
      
      while(call Usart.isRxIntrPending() == FALSE);    // rx buffer has a character
    }
    
    return call Usart.rx();
  }
  
  void sendCmd(const uint8_t cmd, uint32_t data, const uint8_t crc){
    uint8_t frame[6];
    register int8_t i;

    frame[0] = cmd | 0x40;
    for(i = 3; i >= 0; i--)
      frame[4 - i] = (uint8_t)(data >> 8 * i);

    frame[5] = crc;
    for(i = 0; i < 6; i++)
      spiSendByte(frame[i]);
  }

  /* Response comes 1-8bytes after command
   * the first bit will be a 0
   * followed by an error code
   * data will be 0xff until response
   */
  uint8_t getResponse()
  {
    register int i=0;
    uint8_t response;

    for(i = 0; i < 65; i++){
      if(((response = spiSendByte(0xff)) == 0x00) ||
	 (response == 0x01))
	break;
    }
    return response;
  }

  uint8_t getXXResponse(const uint8_t resp){
    register uint16_t i;
    uint8_t response;
    
    for(i = 0; i < 1001; i++)
      if((response = spiSendByte(0xff)) == resp)
	break;
    
    return response;
  }

  uint8_t checkBusy(){
    register uint8_t i, j;
    uint8_t response, rvalue;
    
    for(i = 0; i < 65; i++){
      response = spiSendByte(0xff);
      response &= 0x1f;
      
      switch(response){
      case 0x05: 
	rvalue = MMC_SUCCESS;
	break;
      case 0x0b: 
	return MMC_CRC_ERROR;
      case 0x0d: 
	return MMC_WRITE_ERROR;
      default:
	rvalue = MMC_OTHER_ERROR;
	break;
      }
	
      if(rvalue == MMC_SUCCESS)
	break;
    }
    
    //    while((response = spiSendByte(0xff)) == 0);   // sma sez DANGER!  use some kinda timeout!
    for(j = 0; j < 512; j++){
      if(spiSendByte(0xff)){
	break;
      }
    }
    
    return response;
  }

  error_t setIdle(){
    char response;
    CS_LOW();

    // put card in SPI mode
    sendCmd(MMC_GO_IDLE_STATE, 0, 0x95);

    // confirm that card is READY 
    if((response = getResponse()) != 0x01)
      return MMC_INIT_ERROR;

    do{
      CS_HIGH();
      spiSendByte(0xff);
      CS_LOW();
      sendCmd(MMC_SEND_OP_COND, 0x00, 0xff);
    }while((response = getResponse()) == 0x01);

    CS_HIGH();
    spiSendByte(0xff);

    return MMC_SUCCESS;
  }

  error_t cardInit(){
    register uint8_t i;
    uint8_t r;

    initSPI();

    CS_HIGH();

    for(i = 0; i < 10; i++)
      spiSendByte(0xff);
    
    r = setIdle();

    // here's where we set the clock speed up to smclk / 2 (512k)
    
    call Usart.setUbr(0x0002);
    call Usart.setUmctl(0x00);

    return r;
  }

  // change block length to 2^len bytes; default is 512
  error_t setBlockLength (const uint16_t len) {
    CS_LOW ();

    sendCmd(MMC_SET_BLOCKLEN, len, 0xff);

    // get response from card, should be 0; so, shouldn't this be 'while'?
    if(getResponse() != 0x00){
      cardInit();
      sendCmd(MMC_SET_BLOCKLEN, len, 0xff);
      getResponse();
    }

    CS_HIGH ();

    // Send 8 Clock pulses of delay.
    spiSendByte(0xff);

    return MMC_SUCCESS;
  }
    
  /* 
   * renamed to clear the way for renaming what was readSector -- which called this -- 
   * to be renamed readBlock.  --sma
   */
  
  error_t read_block(const uint32_t address, const uint16_t count, uint8_t * buffer){
    register uint16_t i = 0;
    uint8_t rvalue = MMC_RESPONSE_ERROR;
    
    // Set the block length to read
    if(setBlockLength(count) == MMC_SUCCESS){   // block length can be set
      CS_LOW ();
      
      sendCmd(MMC_READ_SINGLE_BLOCK, address, 0xff);
      // Send 8 Clock pulses of delay, check if the MMC acknowledged the read block command
      // it will do this by sending an affirmative response
      // in the R1 format (0x00 is no errors)
      if(getResponse() == 0x00){
	// now look for the data token to signify the start of the data
	if(getXXResponse(MMC_START_DATA_BLOCK_TOKEN) == MMC_START_DATA_BLOCK_TOKEN){
	  
	  // clock the actual data transfer and receive the bytes; spi_read automatically finds the Data Block
	  for (i = 0; i < count; i++)
	    buffer[i] = spiSendByte(0xff);   // is executed with card inserted
	  
	  // get CRC bytes (not really needed by us, but required by MMC)
	  spiSendByte(0xff);
	  spiSendByte(0xff);
	  rvalue = MMC_SUCCESS;
	}
	else{
	  // the data token was never received
	  rvalue = MMC_DATA_TOKEN_ERROR;      // 3
	}
      }
      else{
	// the MMC never acknowledge the read command
	rvalue = MMC_RESPONSE_ERROR;          // 2
      }
    }
    else{
      rvalue = MMC_BLOCK_SET_ERROR;           // 1
    }
    
    CS_HIGH ();
    spiSendByte(0xff);
    
    return rvalue;
  }

  /*
   * need to test dock pin for some platforms
   * on others this will be attached to a pullup
   */
  command error_t SD.readBlock(const uint32_t sector, uint8_t * buffer) {
    if(!TOSH_READ_DOCK_N_PIN())
      return MMC_INIT_ERROR;

    return read_block(sector * 512, 512, buffer);
  }

  error_t write_block(const uint32_t address, const uint16_t count, uint8_t * buffer){
    register uint16_t i;
    uint8_t rvalue = MMC_RESPONSE_ERROR;         // MMC_SUCCESS;

    // Set the block length to write
    if(setBlockLength (count) == MMC_SUCCESS){   // block length could be set
      CS_LOW ();
      sendCmd(MMC_WRITE_BLOCK, address, 0xff);

      // check if the MMC acknowledged the write block command
      // it will do this by sending an affirmative response
      // in the R1 format (0x00 is no errors)
      if(getXXResponse(MMC_R1_RESPONSE) == MMC_R1_RESPONSE){
	spiSendByte(0xff);
	// send the data token to signify the start of the data
	spiSendByte(0xfe);
	// clock the actual data transfer and transmitt the bytes

	for(i = 0; i < count; i++)
	  spiSendByte(buffer[i]);            

	// put CRC bytes (not really needed by us, but required by MMC)
	spiSendByte(0xff);
	spiSendByte(0xff);
	// read the data response xxx01 : status 010: Data accected, status 101: Data
	//   rejected due to a crc error, status 110: Data rejected due to a Write error.
	checkBusy();
	rvalue = MMC_SUCCESS;
      }
      else{
	// the MMC never acknowledge the write command
	rvalue = MMC_RESPONSE_ERROR;   // 2
      }
    }
    else{
      rvalue = MMC_BLOCK_SET_ERROR;   // 1
    }

    CS_HIGH ();
    // Send 8 Clock pulses of delay.
    spiSendByte(0xff);

    return rvalue;
  }

  command error_t SD.writeBlock(const uint32_t sector, uint8_t * buffer){
    /*
     * need to test dock pin for some platforms
     * on others this will be attached to a pullup
     */
    if(!TOSH_READ_DOCK_N_PIN())
      return MMC_INIT_ERROR;

    return write_block(sector * 512, 512, buffer);
  }

  /*
   * feel our way out over the cliff of the card to estimate the size
   * turns out cmd9 is not supported on sdio, as there's no csd register
   */
  uint32_t hackGetCardSize() {
    uint32_t howbig = 0;
    uint8_t b[512];
    error_t failed;
    
    /* we'll estimate based upon popular sizes of cards, e.g. 128mb, 256 mb, 512mb, 1gb, 2gb
     * experimentally, we find that 512mb == ~990900 sectors, 1gb == ~1983000 sectors
     * extrapolating down, we'll say that 247700 should be readable on a 128mb
     * reading beyond that returns an error
     */

    failed = call SD.readBlock(0, b);
    failed = call SD.readBlock(200000, b);
    // if we can't get this far, we're toast anyway
    if(!failed){
      howbig = 247000;
      while(!call SD.readBlock(howbig, b)){
	howbig = howbig * 2;
      }
      howbig = howbig / 2;
    }
    return howbig;
  }

  // Read the Card Size from the CSD Register
  // this command is unsupported on sdio-only, like sandisk micro sd cards
  command uint32_t SD.readCardSize(){
    // Read contents of Card Specific Data (CSD)

    uint32_t MMC_CardSize = 0;
    uint16_t i, j, b, response, mmc_C_SIZE;
    uint8_t mmc_READ_BL_LEN, mmc_C_SIZE_MULT;

    //    return hackGetCardSize();
    
    CS_LOW ();

    spiSendByte(MMC_READ_CSD);   // CMD 9
    for(i = 0; i < 4; i++)      // Send four dummy bytes
      spiSendByte(0);

    spiSendByte(0xff);   // Send CRC byte

    response = getResponse();

    // data transmission always starts with 0xFE
    b = spiSendByte(0xff);

    if(!response){

      while(b != 0xfe) 
	b = spiSendByte(0xff);
      // bits 127:87
      for(j = 0; j < 5; j++)          // Host must keep the clock running for at
	b = spiSendByte(0xff);


      // 4 bits of READ_BL_LEN
      // bits 84:80
      b = spiSendByte(0xff);  // lower 4 bits of CCC and
      mmc_READ_BL_LEN = b & 0x0f;

      b = spiSendByte(0xff);

      // bits 73:62  C_Size
      // xxCC CCCC CCCC CC
      mmc_C_SIZE = (b & 0x03) << 10;
      b = spiSendByte(0xff);
      mmc_C_SIZE += b << 2;
      b = spiSendByte(0xff);
      mmc_C_SIZE += b >> 6;

      // bits 55:53
      b = spiSendByte(0xff);

      // bits 49:47
      mmc_C_SIZE_MULT = (b & 0x03) << 1;
      b = spiSendByte(0xff);
      mmc_C_SIZE_MULT += b >> 7;

      // bits 41:37
      b = spiSendByte(0xff);

      b = spiSendByte(0xff);

      b = spiSendByte(0xff);

      b = spiSendByte(0xff);

      b = spiSendByte(0xff);

      for(j = 0; j < 4; j++)          // Host must keep the clock running for at
	b = spiSendByte(0xff);  // least Ncr (max = 4 bytes) cycles after
      // the card response is received
      b = spiSendByte(0xff);
      CS_LOW ();

      MMC_CardSize = (mmc_C_SIZE + 1);
      for(i = 2, j = mmc_C_SIZE_MULT + 2; j > 1; j--)
	i <<= 1;
      MMC_CardSize *= i;
      for(i = 2,j = mmc_READ_BL_LEN; j > 1; j--)
	i <<= 1;
      MMC_CardSize *= i;
 
    }
    return MMC_CardSize;
  }

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/Storage_chip.h000066400000000000000000000033361207233610700245420ustar00rootroot00000000000000/**
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2008-06-30 00:39:34 $
 */

#ifndef STORAGE_CHIP_H
#define STORAGE_CHIP_H

#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/000077500000000000000000000000001207233610700230605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/FatFs.h000066400000000000000000001114351207233610700242410ustar00rootroot00000000000000/*----------------------------------------------------------------------------/
  FatFs module is an open source project to implement FAT file system to small
  embedded systems. It is opened for education, research and development under
  license policy of following trems.

  Copyright (C) 2009, ChaN, all right reserved.

  * The FatFs module is a free software and there is no warranty.
  * You can use, modify and/or redistribute it for personal, non-profit or
  commercial use without any restriction under your responsibility.
  * Redistributions of source code must retain the above copyright notice.

  ----------------------------------------------------------------------------*/
/*
 * Portions of this code:
 *
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * tinyos port of ChaN's FatFs module (thank you!):
 *
 * @author Steve Ayer
 * @date   April, 2009
 * ported to tos-2.x
 * @date January, 2010
 */

#include 

/*---------------------------------------------------------------------------/
/  FatFs - FAT file system module configuration file  R0.07e  (C)ChaN, 2009
           ffconf.h

   NOTE: these are not broken out to ffconf.h in tinyos for maintenance reasons
         that make sense right now...
/----------------------------------------------------------------------------*/
#ifndef _FATFS
#define _FATFS 0x007E

#define REALTIME	1

#if REALTIME
#warning "Using enhanced/optimized version of FatFs............."
#endif

/*---------------------------------------------------------------------------/
/ Function and Buffer Configurations
/----------------------------------------------------------------------------*/
#define	_FS_TINY	0
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
   /  object instead of the sector buffer in the individual file object for file
   /  data transfer. This reduces memory consumption 512 bytes each file object. */

#define _FS_READONLY	0
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
   /  writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
   /  f_truncate and useless f_getfree. */


#define _FS_MINIMIZE	0
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
   /
   /   0: Full function.
   /   1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
   /      are removed.
   /   2: f_opendir and f_readdir are removed in addition to level 1.
   /   3: f_lseek is removed in addition to level 2. */



#define	_USE_STRFUNC	1
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */


#define	_USE_MKFS	1
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */


#define	_USE_FORWARD	0
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */


/*---------------------------------------------------------------------------/
/ Locale and Namespace Configurations
/----------------------------------------------------------------------------*/
#define _CODE_PAGE	437
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
   /
   /   932  - Japanese Shift-JIS (DBCS, OEM, Windows)
   /   936  - Simplified Chinese GBK (DBCS, OEM, Windows)
   /   949  - Korean (DBCS, OEM, Windows)
   /   950  - Traditional Chinese Big5 (DBCS, OEM, Windows)
   /   1250 - Central Europe (Windows)
   /   1251 - Cyrillic (Windows)
   /   1252 - Latin 1 (Windows)
   /   1253 - Greek (Windows)
   /   1254 - Turkish (Windows)
   /   1255 - Hebrew (Windows)
   /   1256 - Arabic (Windows)
   /   1257 - Baltic (Windows)
   /   1258 - Vietnam (OEM, Windows)
   /   437  - U.S. (OEM)
   /   720  - Arabic (OEM)
   /   737  - Greek (OEM)
   /   775  - Baltic (OEM)
   /   850  - Multilingual Latin 1 (OEM)
   /   858  - Multilingual Latin 1 + Euro (OEM)
   /   852  - Latin 2 (OEM)
   /   855  - Cyrillic (OEM)
   /   866  - Russian (OEM)
   /   857  - Turkish (OEM)
   /   862  - Hebrew (OEM)
   /   874  - Thai (OEM, Windows)
   /	1 - ASCII (Valid for only non LFN cfg.)
*/

#define	_USE_LFN	1
#define	_MAX_LFN	255		/* Maximum LFN length to handle (max:255) */
/* The _USE_LFN option switches the LFN support.
   /
   /   0: Disable LFN.
   /   1: Enable LFN with static working buffer on the bss. Not re-entrant.
   /   2: Enable LFN with dynamic working buffer on the caller's 'stack'.
   /
   /  The working buffer occupies (_MAX_LFN + 1) * 2 bytes. When enable LFN,
   /  a Unicode - OEM code conversion function ff_convert() must be linked. */


#define	_LFN_UNICODE	0	/* 0 or 1 */
/* To switch the character code set on FatFs API to Unicode,
/  enable LFN feature and set _LFN_UNICODE to 1.
*/

#define _FS_RPATH	1
/* When _FS_RPATH is set to 1, relative path feature is enabled and f_chdir,
   /  f_chdrive function are available.
   /  Note that output of the f_readdir fnction is affected by this option. */


/*---------------------------------------------------------------------------/
/ Physical Drive Configurations
/----------------------------------------------------------------------------*/
#define _DRIVES		1
/* Number of volumes (logical drives) to be used. */


#define	_MAX_SS	512
/* Maximum sector size to be handled. (512/1024/2048/4096) */
/* 512 for memroy card and hard disk, 1024 for floppy disk, 2048 for MO disk */

#define	_MULTI_PARTITION	0
/* When _MULTI_PARTITION is set to 0, each volume is bound to same physical
   / drive number and can mount only 1st primaly partition. When it is set to 1,
   / each volume is tied to the partition listed in Drives[]. */


/*---------------------------------------------------------------------------/
/ System Configurations
/----------------------------------------------------------------------------*/
#define _WORD_ACCESS	0
/* The _WORD_ACCESS option defines which access method is used to the word
   /  data in the FAT structure.
   /
   /   0: Byte-by-byte access. Always compatible with all platforms.
   /   1: Word access. Do not choose this unless following condition is met.
   /
   /  When the byte order on the memory is big-endian or address miss-aligned
   /  word access results incorrect behavior, the _WORD_ACCESS must be set to 0.
   /  If it is not the case, the value can also be set to 1 to improve the
   /  performance and code efficiency. */

#define _FS_REENTRANT	0
#define _TIMEOUT		1000
#define	_SYNC_t			HANDLE	/* Type of sync object used on the OS. e.g. HANDLE, OS_EVENT*, ID and etc.. */
/* To make the FatFs module re-entrant, set _FS_REENTRANT to 1 and add user
   /  provided synchronization handlers, ff_req_grant, ff_rel_grant, ff_del_syncobj
   /  and ff_cre_syncobj function to the project. */


/* End of configuration options. Do not change followings without care.     */
/*--------------------------------------------------------------------------*/


#if _MAX_SS == 512
#define	SS(fs)	512
#else
#if _MAX_SS == 1024 || _MAX_SS == 2048 || _MAX_SS == 4096
#define	SS(fs)	((fs)->s_size)
#else
#error Sector size must be 512, 1024, 2048 or 4096.
#endif
#endif

/* Type of file name on FatFs API */

#if _LFN_UNICODE && _USE_LFN
typedef WCHAR XCHAR;	/* Unicode */
#else
typedef char XCHAR;		/* SBCS, DBCS */
#endif


/* File system object structure */

typedef struct _FATFS_ {
  BYTE	  fs_type;	/* FAT sub type */
  BYTE	  drive;	/* Physical drive number */
  BYTE	  csize;	/* Number of sectors per cluster */
  BYTE	  n_fats;	/* Number of FAT copies */
  BYTE	  wflag;	/* win[] dirty flag (1:must be written back) */
  BYTE	  fsi_flag;	/* fsinfo dirty flag (1:must be written back) */
  WORD	  id;		/* File system mount ID */
  WORD	  n_rootdir;	/* Number of root directory entries (0 on FAT32) */
#if _FS_REENTRANT
  _SYNC_t sobj;		/* Identifier of sync object */
#endif
#if _MAX_SS != 512
  WORD	  s_size;	/* Sector size */
#endif
#if !_FS_READONLY
  DWORD	  last_clust;	/* Last allocated cluster */
  DWORD	  free_clust;	/* Number of free clusters */
  DWORD	  fsi_sector;	/* fsinfo sector */
#endif
#if _FS_RPATH
  DWORD	  cdir;		/* Current directory (0:root)*/
#endif
  DWORD	  sects_fat;	/* Sectors per fat */
  DWORD	  max_clust;	/* Maximum cluster# + 1. Number of clusters is max_clust - 2 */
  DWORD	  fatbase;	/* FAT start sector */
  DWORD	  dirbase;	/* Root directory start sector (Cluster# on FAT32) */
  DWORD	  database;	/* Data start sector */
  DWORD	  winsect;	/* Current sector appearing in the win[] */
#if REALTIME
  BYTE	  *win;
  BYTE	  win_dflt[_MAX_SS];
  BYTE	  win_alt[_MAX_SS];
  BYTE	  current_buffer;
  BYTE	  buffer_used;
  DWORD	  win_alt_sector;
#else
  BYTE	  win[_MAX_SS];  /* Disk access window for Directory/FAT */
#endif
} FATFS;



/* Directory object structure */

typedef struct _DIR_ {
  FATFS* fs;		/* Pointer to the owner file system object */
  WORD	 id;		/* Owner file system mount ID */
  WORD	 index;		/* Current read/write index number */
  DWORD	 sclust;	/* Table start cluster (0:Static table) */
  DWORD	 clust;		/* Current cluster */
  DWORD	 sect;		/* Current sector */
  BYTE*	 dir;		/* Pointer to the current SFN entry in the win[] */
  BYTE*	 fn;		/* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */
#if _USE_LFN
  WCHAR* lfn;		/* Pointer to the LFN working buffer */
  WORD	 lfn_idx;	/* Last matched LFN index number (0xFFFF:No LFN) */
#endif
} DIR;



/* File object structure */

typedef struct _FIL_ {
  FATFS* fs;		/* Pointer to the owner file system object */
  WORD	 id;		/* Owner file system mount ID */
  BYTE	 flag;		/* File status flags */
  BYTE	 csect;		/* Sector address in the cluster */
  DWORD	 fptr;		/* File R/W pointer */
  DWORD	 fsize;		/* File size */
  DWORD	 org_clust;	/* File start cluster */
  DWORD	 curr_clust;	/* Current cluster */
  DWORD	 dsect;		/* Current data sector */
#if !_FS_READONLY
  DWORD	 dir_sect;	/* Sector containing the directory entry */
  BYTE*	 dir_ptr;	/* Ponter to the directory entry in the window */
#endif
#if !_FS_TINY
  BYTE	 buf[_MAX_SS];  /* File R/W buffer */
#endif
} FIL;



/* File status structure */

typedef struct _FILINFO_ {
  DWORD	 fsize;		/* File size */
  WORD	 fdate;		/* Last modified date */
  WORD	 ftime;		/* Last modified time */
  BYTE	 fattrib;	/* Attribute */
  char	 fname[13];	/* Short file name (8.3 format) */
#if _USE_LFN
  XCHAR* lfname;	/* Pointer to the LFN buffer */
  int 	 lfsize;	/* Size of LFN buffer [chrs] */
#endif
} FILINFO;




/* DBCS code ranges and SBCS extend char conversion table */

#if _CODE_PAGE == 932	/* Japanese Shift-JIS */
#define _DF1S	0x81	/* DBC 1st byte range 1 start */
#define _DF1E	0x9F	/* DBC 1st byte range 1 end */
#define _DF2S	0xE0	/* DBC 1st byte range 2 start */
#define _DF2E	0xFC	/* DBC 1st byte range 2 end */
#define _DS1S	0x40	/* DBC 2nd byte range 1 start */
#define _DS1E	0x7E	/* DBC 2nd byte range 1 end */
#define _DS2S	0x80	/* DBC 2nd byte range 2 start */
#define _DS2E	0xFC	/* DBC 2nd byte range 2 end */

#elif _CODE_PAGE == 936	/* Simplified Chinese GBK */
#define _DF1S	0x81
#define _DF1E	0xFE
#define _DS1S	0x40
#define _DS1E	0x7E
#define _DS2S	0x80
#define _DS2E	0xFE

#elif _CODE_PAGE == 949	/* Korean */
#define _DF1S	0x81
#define _DF1E	0xFE
#define _DS1S	0x41
#define _DS1E	0x5A
#define _DS2S	0x61
#define _DS2E	0x7A
#define _DS3S	0x81
#define _DS3E	0xFE

#elif _CODE_PAGE == 950	/* Traditional Chinese Big5 */
#define _DF1S	0x81
#define _DF1E	0xFE
#define _DS1S	0x40
#define _DS1E	0x7E
#define _DS2S	0xA1
#define _DS2E	0xFE

#elif _CODE_PAGE == 437	/* U.S. (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F,0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
      0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 720	/* Arabic (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x45,0x41,0x84,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x49,0x49,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 737	/* Greek (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \
      0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xE7,0xE8,0xF1,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 775	/* Baltic (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
      0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 850	/* Multilingual Latin 1 (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
      0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 852	/* Latin 2 (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F,0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0x9F, \
      0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF}

#elif _CODE_PAGE == 855	/* Cyrillic (OEM) */
#define _DF1S	0
#define _EXCVT {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F,0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \
      0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \
      0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 857	/* Turkish (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x98,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \
      0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0x59,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 858	/* Multilingual Latin 1 + Euro (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
      0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 862	/* Hebrew (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
      0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 866	/* Russian (OEM) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
      0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0x90,0x91,0x92,0x93,0x9d,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 874	/* Thai (OEM, Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 1250 /* Central Europe (Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \
      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xA3,0xB4,0xB5,0xB6,0xB7,0xB8,0xA5,0xAA,0xBB,0xBC,0xBD,0xBC,0xAF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}

#elif _CODE_PAGE == 1251 /* Cyrillic (Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x82,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x80,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \
      0xA0,0xA2,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB2,0xA5,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xA3,0xBD,0xBD,0xAF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF}

#elif _CODE_PAGE == 1252 /* Latin 1 (Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0xAd,0x9B,0x8C,0x9D,0xAE,0x9F, \
      0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}

#elif _CODE_PAGE == 1253 /* Greek (Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xA2,0xB8,0xB9,0xBA, \
      0xE0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xFB,0xBC,0xFD,0xBF,0xFF}

#elif _CODE_PAGE == 1254 /* Turkish (Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x9D,0x9E,0x9F, \
      0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}

#elif _CODE_PAGE == 1255 /* Hebrew (Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
      0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 1256 /* Arabic (Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x8C,0x9D,0x9E,0x9F, \
      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0x41,0xE1,0x41,0xE3,0xE4,0xE5,0xE6,0x43,0x45,0x45,0x45,0x45,0xEC,0xED,0x49,0x49,0xF0,0xF1,0xF2,0xF3,0x4F,0xF5,0xF6,0xF7,0xF8,0x55,0xFA,0x55,0x55,0xFD,0xFE,0xFF}

#elif _CODE_PAGE == 1257 /* Baltic (Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xBC,0xBD,0xBE,0xAF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}

#elif _CODE_PAGE == 1258 /* Vietnam (OEM, Windows) */
#define _DF1S	0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0xAC,0x9D,0x9E,0x9F, \
      0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xEC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xFE,0x9F}

#elif _CODE_PAGE == 1	/* ASCII (for only non-LFN cfg) */
#define _DF1S	0

#else
#error Unknown code page

#endif



/* Character code support macros */

#define IsUpper(c)	(((c)>='A')&&((c)<='Z'))
#define IsLower(c)	(((c)>='a')&&((c)<='z'))

#if _DF1S	/* DBCS configuration */

#if _DF2S	/* Two 1st byte areas */
#define IsDBCS1(c)	(((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) || ((BYTE)(c) >= _DF2S && (BYTE)(c) <= _DF2E))
#else		/* One 1st byte area */
#define IsDBCS1(c)	((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E)
#endif

#if _DS3S	/* Three 2nd byte areas */
#define IsDBCS2(c)	(((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E) || ((BYTE)(c) >= _DS3S && (BYTE)(c) <= _DS3E))
#else		/* Two 2nd byte areas */
#define IsDBCS2(c)	(((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E))
#endif

#else		/* SBCS configuration */

#define IsDBCS1(c)	0
#define IsDBCS2(c)	0

#endif /* _DF1S */



/* Definitions corresponds to multi partition */

#if _MULTI_PARTITION		/* Multiple partition configuration */

typedef struct _PARTITION {
  BYTE pd;	/* Physical drive# */
  BYTE pt;	/* Partition # (0-3) */
} PARTITION;

extern
const PARTITION Drives[];			/* Logical drive# to physical location conversion table */
#define LD2PD(drv) (Drives[drv].pd)	/* Get physical drive# */
#define LD2PT(drv) (Drives[drv].pt)	/* Get partition# */

#else						/* Single partition configuration */

#define LD2PD(drv) (drv)	/* Physical drive# is equal to the logical drive# */
#define LD2PT(drv) 0		/* Always mounts the 1st partition */

#endif



/* File function return code (FRESULT) */

typedef enum {
  FR_OK = 0,			/* 0 */
  FR_DISK_ERR,		/* 1 */
  FR_INT_ERR,			/* 2 */
  FR_NOT_READY,		/* 3 */
  FR_NO_FILE,			/* 4 */
  FR_NO_PATH,			/* 5 */
  FR_INVALID_NAME,	/* 6 */
  FR_DENIED,			/* 7 */
  FR_EXIST,			/* 8 */
  FR_INVALID_OBJECT,	/* 9 */
  FR_WRITE_PROTECTED,	/* 10 */
  FR_INVALID_DRIVE,	/* 11 */
  FR_NOT_ENABLED,		/* 12 */
  FR_NO_FILESYSTEM,	/* 13 */
  FR_MKFS_ABORTED,	/* 14 */
  FR_TIMEOUT			/* 15 */
} FRESULT;



/*--------------------------------------------------------------*/
/* FatFs module application interface                           */

FRESULT f_mount (BYTE, FATFS*);						/* Mount/Unmount a logical drive */
FRESULT f_open (FIL*, const XCHAR*, BYTE);			/* Open or create a file */
FRESULT f_read (FIL*, void*, UINT, UINT*);			/* Read data from a file */
FRESULT f_write (FIL*, const void*, UINT, UINT*);	/* Write data to a file */
//FRESULT f_lseek (FIL*, DWORD);						/* Move file pointer of a file object */
FRESULT f_lseek (FIL*, LONG);						/* Move file pointer of a file object */
FRESULT f_close (FIL*);								/* Close an open file object */
FRESULT f_opendir (DIR*, const XCHAR*);				/* Open an existing directory */
FRESULT f_readdir (DIR*, FILINFO*);					/* Read a directory item */
FRESULT f_stat (const XCHAR*, FILINFO*);				/* Get file status */
FRESULT f_getfree (const XCHAR*, DWORD*, FATFS**);	/* Get number of free clusters on the drive */
FRESULT f_truncate (FIL*);							/* Truncate file */
FRESULT f_sync (FIL*);								/* Flush cached data of a writing file */
FRESULT f_unlink (const XCHAR*);						/* Delete an existing file or directory */
FRESULT	f_mkdir (const XCHAR*);						/* Create a new directory */
FRESULT f_chmod (const XCHAR*, BYTE, BYTE);			/* Change attriburte of the file/dir */
FRESULT f_utime (const XCHAR*, const FILINFO*);		/* Change timestamp of the file/dir */
FRESULT f_rename (const XCHAR*, const XCHAR*);		/* Rename/Move a file or directory */
FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*);	/* Forward data to the stream */
FRESULT f_mkfs (BYTE, BYTE, WORD);					/* Create a file system on the drive */
FRESULT f_chdir (const XCHAR*);						/* Change current directory */
FRESULT f_chdrive (BYTE);							/* Change current drive */

#if _USE_STRFUNC
int f_putc (int, FIL*);								/* Put a character to the file */
int f_puts (const char*, FIL*);						/* Put a string to the file */
int f_printf (FIL*, const char*, ...);				/* Put a formatted string to the file */
char* f_gets (char*, int, FIL*);					/* Get a string from the file */
#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0)
#define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0)
#ifndef EOF
#define EOF -1
#endif
#endif


/*--------------------------------------------------------------*/
/* User defined functions                                       */


/* Real time clock */
DWORD get_fattime (void);	/* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */
/* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */

/* Unicode - OEM code conversion */
#if _USE_LFN
WCHAR ff_convert (WCHAR, UINT);
#endif




/*--------------------------------------------------------------*/
/* Flags and offset address                                     */


/* File access control and file status flags (FIL.flag) */

#define	FA_READ				0x01
#define	FA_OPEN_EXISTING	0x00
#if _FS_READONLY == 0
#define	FA_WRITE			0x02
#define	FA_CREATE_NEW		0x04
#define	FA_CREATE_ALWAYS	0x08
#define	FA_OPEN_ALWAYS		0x10
#define FA__WRITTEN			0x20
#define FA__DIRTY			0x40
#endif
#define FA__ERROR			0x80


/* FAT sub type (FATFS.fs_type) */

#define FS_FAT12	1
#define FS_FAT16	2
#define FS_FAT32	3


/* File attribute bits for directory entry */

#define	AM_RDO	0x01	/* Read only */
#define	AM_HID	0x02	/* Hidden */
#define	AM_SYS	0x04	/* System */
#define	AM_VOL	0x08	/* Volume label */
#define AM_LFN	0x0F	/* LFN entry */
#define AM_DIR	0x10	/* Directory */
#define AM_ARC	0x20	/* Archive */
#define AM_MASK	0x3F	/* Mask of defined bits */


/* FatFs refers the members in the FAT structures with byte offset instead
   / of structure member because there are incompatibility of the packing option
   / between various compilers. */

#define BS_jmpBoot			0
#define BS_OEMName			3
#define BPB_BytsPerSec		11
#define BPB_SecPerClus		13
#define BPB_RsvdSecCnt		14
#define BPB_NumFATs			16
#define BPB_RootEntCnt		17
#define BPB_TotSec16		19
#define BPB_Media			21
#define BPB_FATSz16			22
#define BPB_SecPerTrk		24
#define BPB_NumHeads		26
#define BPB_HiddSec			28
#define BPB_TotSec32		32
#define BS_55AA				510

#define BS_DrvNum			36
#define BS_BootSig			38
#define BS_VolID			39
#define BS_VolLab			43
#define BS_FilSysType		54

#define BPB_FATSz32			36
#define BPB_ExtFlags		40
#define BPB_FSVer			42
#define BPB_RootClus		44
#define BPB_FSInfo			48
#define BPB_BkBootSec		50
#define BS_DrvNum32			64
#define BS_BootSig32		66
#define BS_VolID32			67
#define BS_VolLab32			71
#define BS_FilSysType32		82

#define	FSI_LeadSig			0
#define	FSI_StrucSig		484
#define	FSI_Free_Count		488
#define	FSI_Nxt_Free		492

#define MBR_Table			446

#define	DIR_Name			0
#define	DIR_Attr			11
#define	DIR_NTres			12
#define	DIR_CrtTime			14
#define	DIR_CrtDate			16
#define	DIR_FstClusHI		20
#define	DIR_WrtTime			22
#define	DIR_WrtDate			24
#define	DIR_FstClusLO		26
#define	DIR_FileSize		28
#define	LDIR_Ord			0
#define	LDIR_Attr			11
#define	LDIR_Type			12
#define	LDIR_Chksum			13
#define	LDIR_FstClusLO		26



/*--------------------------------*/
/* Multi-byte word access macros  */

#if _WORD_ACCESS == 1	/* Enable word access to the FAT structure */
#define	LD_WORD(ptr)		(WORD)(*(WORD*)(BYTE*)(ptr))
#define	LD_DWORD(ptr)		(DWORD)(*(DWORD*)(BYTE*)(ptr))
#define	ST_WORD(ptr,val)	*(WORD*)(BYTE*)(ptr)=(WORD)(val)
#define	ST_DWORD(ptr,val)	*(DWORD*)(BYTE*)(ptr)=(DWORD)(val)
#else					/* Use byte-by-byte access to the FAT structure */
#define	LD_WORD(ptr)		(WORD)(((WORD)*(volatile BYTE*)((ptr)+1)<<8)|(WORD)*(volatile BYTE*)(ptr))
#define	LD_DWORD(ptr)		(DWORD)(((DWORD)*(volatile BYTE*)((ptr)+3)<<24)|((DWORD)*(volatile BYTE*)((ptr)+2)<<16)|((WORD)*(volatile BYTE*)((ptr)+1)<<8)|*(volatile BYTE*)(ptr))
#define	ST_WORD(ptr,val)	*(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8)
#define	ST_DWORD(ptr,val)	*(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(volatile BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(volatile BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24)
#endif


#endif /* _FATFS */
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/FatFs.nc000066400000000000000000000137341207233610700244150ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    April, 2009
 * ported to tos-2.x
 * @date January, 2010
 */

#include "FatFs.h"

interface FatFs { 
  /* non-zero return codes indicate an error; the codes for these are in an enum in FatFs.h */

  command void asc_fattime(char * timestring);
  /*
   * do this before performing file ops!
   * pointer to FATFS struct provides required bookkeeping space for the fs
   */
  command error_t mount(FATFS * fs);

  command error_t unmount();

  /*
   * take the card down, "unmount" the fs
   */
  command void disable();

  /*
   * mode flags:
   * FA_READ	Specifies read access to the object. Data can be read from the file.
   *            Combine with FA_WRITE for read-write access.
   * FA_WRITE	Specifies write access to the object. Data can be written to the file.
                Combine with FA_READ for read-write access.
   * FA_OPEN_EXISTING	Opens the file. The function fails if the file is not existing. (Default)
   * FA_OPEN_ALWAYS	Opens the file, if it is existing. If not, the function creates the new file.
   * FA_CREATE_NEW	Creates a new file. The function fails if the file is already existing.
   * FA_CREATE_ALWAYS	Creates a new file. If the file is existing, it is truncated and overwritten.
   *
   */
  command error_t fopen(FIL * fp, const char * filename, BYTE mode);
  
  command error_t fclose(FIL * fp);
  
  command error_t fread(FIL * fp, 
			 void * buffer,
			 uint bytesToRead,
			 uint * bytesRead);

  command error_t fwrite(FIL * fp,
			  const void * buffer,
			  uint bytesToWrite,
			  uint * bytesWritten);

  // no ftell, but fp has fptr once file is open
  command error_t fseek(FIL * fp, int32_t offset);
  
  // truncate this file at the current location of the pointer
  command error_t ftruncate(FIL * fp);
  
  /* 
   * flush the file cache to physical media;  good for avoiding data loss due
   * to potential platform disruption (battery, app failure, media removal),
   * but should be used sparingly to avoid excess flash r/w cycles; fp struct has 
   * a 512-byte buffer.  
   */
  command error_t fsync(FIL * fp);

  command error_t mkdir(const char * dirname);

  command error_t chdir(const char * dirname);

  // feed it an empty DIR struct, used before doing readdir calls
  command error_t opendir(DIR * dp, const char * dirname);
  
  /*
   * reads dir entries in sequence until fi->fname is "" (fname[0] == NULL)
   *
   * since long filenames are used here, a buffer of sufficient size 
   * (_MAX_LFN + 1, unless using some asian code pages.  see FatFs.h)
   * must be attached to fi->lfname, with its size in fi->lfsize
   * 
   */
  command error_t readdir(DIR * dp, FILINFO * fi);
  
  /*
   * path is to root; fatfs struct is statically declared in driver
   */
  command error_t getfree(const char * path, uint32_t * clusters, FATFS ** fs);

  command error_t stat(const char * filename, FILINFO * fi);

  command error_t unlink(const char * filename);

  /*
   * this one's a bit weird
   * these are the flags for "value":
   * AM_RDO	Read only 	  (0x01)
   * AM_ARC     Archive           (0x20)
   * AM_SYS     System            (0x04)
   * AM_HID     Hidden            (0x02)
   * 
   * mask is for exposing attributes to effect of value flag; i.e., 
   * if the value bit is zero for a particular attribute and the mask 
   * has a 1 in that position (e.g. value is AM_HID|AM_RDO and mask is 
   * AM_HID|AM_SYS|AM_RDO, then AM_SYS will be turned off) that attribute 
   * will be disabled.
   */
  command error_t chmod(const char * filename, BYTE value, BYTE mask);

  /*
   * a good time to introduce this:
   * in timedate, the fields break out thus:
   * for fdate, 
   *    bit15:9
   *     Year origin from 1980 (0..127)
   *    bit8:5
   *     Month (1..12)
   *    bit4:0
   *     Day (1..31)
   *
   * for ftime,
   *    bit15:11
   *     Hour (0..23)
   *    bit10:5
   *     Minute (0..59)
   *    bit4:0
   *     Second / 2 (0..29)
   */
  command error_t f_utime(const char * filename, FILINFO * timedate);

  command error_t rename(const char * oldname, const char * newname);
  
  /*
   * size in sectors; 512 bytes/sector is fixed
   * a zero allocates the whole drive/card
   */
  command error_t mkfs(WORD allocSize);

  command const char * ff_strerror(error_t errnum);

  /*
   * these bubble the sd-driver-level events that the app has, 
   * or has lost, access to the card
   */
  async event void mediaUnavailable();
  async event void mediaAvailable();
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/FatFsP.nc000066400000000000000000003420461207233610700245360ustar00rootroot00000000000000/*---------------------------------------------------------------------------/
  / FatFs module is an open source project to implement FAT file system to small
  / embedded systems. It is opened for education, research and development under
  / license policy of following trems.
  /
  /  Copyright (C) 2009, ChaN, all right reserved.
  /
  / * The FatFs module is a free software and there is no warranty.
  / * You can use, modify and/or redistribute it for personal, non-profit or
  /   commercial use without any restriction under your responsibility.
  / * Redistributions of source code must retain the above copyright notice.
  /
  /----------------------------------------------------------------------------*/
/*
 * Portions of this code are:
 *
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * This is a tinyos-1.x implementation of ChaN's FatFs embedded FAT filesystem.
 * Many thanks to ChaN for his excellent work, which has been modified as little
 * as possible to fit into the tinyos framework.
 *
 * @author Steve Ayer
 * @date April, 2009
 * port to tos-2.x
 * @date January, 2010
 *
 * Cluster window optimizations:
 * @author Victor Cionca
 * @date July, 2009
 *
 */

#include "FatFs.h"

module FatFsP {
  provides {
    interface FatFs;
  }
  uses{ 
    interface StdControl as diskIOStdControl;
    interface SD as diskIO;
    interface Leds;
    interface Time;
  }
}

implementation {
#include "diskio.c"  
#include "ccsbcs.c"

  FRESULT f_mount (BYTE, FATFS*);				/* Mount/Unmount a logical drive */
  FRESULT f_open (FIL*, const char*, BYTE);			/* Open or create a file */
  FRESULT f_read (FIL*, void*, UINT, UINT*);			/* Read data from a file */
  FRESULT f_write (FIL*, const void*, UINT, UINT*);	        /* Write data to a file */
  FRESULT f_lseek (FIL*, LONG);					/* Move file pointer of a file object */
  FRESULT f_close (FIL*);					/* Close an open file object */
  FRESULT f_opendir (DIR*, const char*);			/* Open an existing directory */
  FRESULT f_readdir (DIR*, FILINFO*);				/* Read a directory item */
  FRESULT f_stat (const char*, FILINFO*);			/* Get file status */
  FRESULT f_getfree (const char*, DWORD*, FATFS**);	        /* Get number of free clusters on the drive */
  FRESULT f_truncate (FIL*);					/* Truncate file */
  FRESULT f_sync (FIL*);					/* Flush cached data of a writing file */
  FRESULT f_unlink (const char*);				/* Delete an existing file or directory */
  FRESULT f_mkdir (const char*);				/* Create a new directory */
  FRESULT f_chmod (const char*, BYTE, BYTE);			/* Change attriburte of the file/dir */
  FRESULT f_utime (const char*, const FILINFO*);		/* Change timestamp of the file/dir */
  FRESULT f_rename (const char*, const char*);		        /* Rename/Move a file or directory */
  FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*);	/* Forward data to the stream */
  FRESULT f_mkfs (BYTE, BYTE, WORD);					/* Create a file system on the drive */
  FRESULT f_chdir (const XCHAR*);				/* Change current directory */
  FRESULT f_chdrive (BYTE);					/* Change current drive */
  DWORD   get_fattime ();


#if REALTIME
  /**
   * Dirty hack function to get the address of the file directory entry
   * in the window, if we are using buffers for the window
   *
   * The problem is that the original code represents the directory entry 
   * as a fixed address in the fs window (dirty hack, but makes sense).
   * As we use two windows (dflt and buffer), we need to update the address
   * of the dir entry: find in what window the address was, get the offset 
   * in the window and add it to the main window address
   */
  BYTE *get_dir_ptr(FATFS *fs, BYTE *ptr){
    //    UINT window_address;
    //    UINT dir_obj_address;

    INT diff_win;

    diff_win = ptr - fs->win_dflt;

    if (diff_win < 0 || diff_win >= _MAX_SS){	// the dir_ptr is not in the first window buffer
      diff_win = ptr - fs->win_alt; // try the second buffer
      if (diff_win < 0 || diff_win >= _MAX_SS){ 
	// error, can't find the dir_ptr in any of the buffers
	return 0;
      }
    }

    return fs->win + diff_win;
  }

  BYTE cluster_in_alt_window(FATFS *fs, DWORD cluster){
    switch (fs->fs_type){
    case FS_FAT16:
      if (cluster/(SS(fs)/2)+fs->fatbase == fs->win_alt_sector) return 1;
      else return 0;
    case FS_FAT32:
      if (cluster/(SS(fs)/4)+fs->fatbase == fs->win_alt_sector) return 1;
      else return 0;
    }

    return 0;
  }

  void invert_buffers(FATFS *fs){
    DWORD wsect = 0;
    atomic{
      switch (fs->current_buffer){
      case 0:
	fs->win = fs->win_alt;
	fs->current_buffer = 1;
	break;
      case 1:
	fs->win = fs->win_dflt;
	fs->current_buffer = 0;
	break;
      }

      wsect = fs->winsect;
      fs->winsect = fs->win_alt_sector; // update the active sector, since we are moving the window
      fs->win_alt_sector = wsect;	// update the buffer sector
    }
  }

  DWORD sync_both_win_buffers(FATFS *fs){

    // write both buffers to disk
    switch (fs->current_buffer){
    case 0:	// we are currently using buffer 0 (dflt), so write buffer 1 (alt)
      if (disk_write(fs->drive, fs->win_alt, fs->win_alt_sector, 1) != RES_OK)
	return FR_DISK_ERR;
      if (disk_write(fs->drive, fs->win_dflt, fs->winsect, 1) != RES_OK)
	return FR_DISK_ERR;
      break;
    case 1:
      if (disk_write(fs->drive, fs->win_dflt, fs->win_alt_sector, 1) != RES_OK)
	return FR_DISK_ERR;
      if (disk_write(fs->drive, fs->win_alt, fs->winsect, 1) != RES_OK)
	return FR_DISK_ERR;
      break;
    }

    fs->win_alt_sector = 0;	// the alternative sector is 0 (not used)
    fs->buffer_used = 0;	// buffer is not used 

    return RES_OK;
  }

  DWORD sync_win_buffers(FATFS *fs){
    switch (fs->current_buffer){
    case 0:	// we are currently using buffer 0 (dflt), so write buffer 1 (alt)
      if (disk_write(fs->drive, fs->win_alt, fs->win_alt_sector, 1) != RES_OK)
	return FR_DISK_ERR;
      break;
    case 1:
      if (disk_write(fs->drive, fs->win_dflt, fs->win_alt_sector, 1) != RES_OK)
	return FR_DISK_ERR;
      break;
    }

    fs->win_alt_sector = 0;	// the alternative sector is 0 (not used)
    fs->buffer_used = 0;	// buffer is not used 

    return RES_OK;
  }

  void init_fatfs(FATFS *fs){
    atomic{
      fs->win = fs->win_dflt;
      fs->current_buffer = 0;
      fs->win_alt_sector = 0;
      fs->buffer_used = 0;
    }
  }
#endif

  /*
   * do this before performing file ops!
   * pointer to FATFS struct provides required bookkeeping space for the fs
   */
  command error_t FatFs.mount(FATFS * fs){
    return f_mount(0, fs);
  }

  command error_t FatFs.unmount(){
    dock_disk();   // this calls diskiostdcontrol.start()
    return SUCCESS;
  }

  /*
   * disable_disk is a wrapper for diskIOStdControl.stop,
   * which disables the card completely
   */
  command void FatFs.disable(){
    f_mount(0, NULL);  // this is supposed to unmount
    
    disable_disk();  
  }
  
  /*
   * mode flags:
   * FA_READ	Specifies read access to the object. Data can be read from the file.
   *            Combine with FA_WRITE for read-write access.
   * FA_WRITE	Specifies write access to the object. Data can be written to the file.
   Combine with FA_READ for read-write access.
   * FA_OPEN_EXISTING	Opens the file. The function fails if the file is not existing. (Default)
   * FA_OPEN_ALWAYS	Opens the file, if it is existing. If not, the function creates the new file.
   * FA_CREATE_NEW	Creates a new file. The function fails if the file is already existing.
   * FA_CREATE_ALWAYS	Creates a new file. If the file is existing, it is truncated and overwritten.
   *
   */
  command error_t FatFs.fopen(FIL * fp, const char * filename, BYTE mode){
    return f_open(fp, filename, mode);
  }

  command void FatFs.asc_fattime(char * timestring) {
    time_t time_now;
    struct tm ltime;
    DWORD now;

    now = get_fattime();
#ifdef SPRINTF
    sprintf(timestring, "raw fattime is %08lx", now);
#endif
 
    /*
      call Time.time(&time_now);
      call Time.localtime(&time_now, <ime);
      call Time.asctime(<ime, timestring, 128);
    */
  }

  command error_t FatFs.fclose(FIL * fp){
    return f_close(fp);
  }

  command error_t FatFs.fread(FIL * fp, 
			       void * buffer,
			       uint bytesToRead,
			       uint * bytesRead){

    if (!fp || !fp->fs) 
      return FR_INVALID_OBJECT;

#if REALTIME
    if (cluster_in_alt_window(fp->fs, fp->curr_clust)){	
      // the current cluster FAT entry is in the buffered window,
      // so invert the buffers
      invert_buffers(fp->fs);
    }

    if (fp->fs->buffer_used) 
      if (sync_win_buffers(fp->fs) != RES_OK) 
	return FR_DISK_ERR;
#endif

    return f_read(fp, buffer, bytesToRead, bytesRead);
  }

  command error_t FatFs.fwrite(FIL * fp,
				const void * buffer,
				uint bytesToWrite,
				uint * bytesWritten){

    if (!fp || !fp->fs) 
      return FR_INVALID_OBJECT;

#if REALTIME
    if (cluster_in_alt_window(fp->fs, fp->curr_clust)){	
      // the current cluster FAT entry is in the buffered window,
      // so invert the buffers
      invert_buffers(fp->fs);
    }

    if (fp->fs->buffer_used) 
      if (sync_win_buffers(fp->fs) != RES_OK) 
	return FR_DISK_ERR;
#endif

    return f_write(fp, buffer, bytesToWrite, bytesWritten);
  }

  // no ftell, but fp has fptr once file is open
  command error_t FatFs.fseek(FIL * fp, int32_t offset){

    if (!fp || !fp->fs) 
      return FR_INVALID_OBJECT;

#if REALTIME
    if (cluster_in_alt_window(fp->fs, fp->curr_clust)){	
      // the current cluster FAT entry is in the buffered window,
      // so invert the buffers
      invert_buffers(fp->fs);
    }

    if (fp->fs->buffer_used) 
      if (sync_win_buffers(fp->fs) != RES_OK) 
	return FR_DISK_ERR;
#endif
    return f_lseek(fp, offset);
  }

  // truncate this file at the current location of the pointer
  command error_t FatFs.ftruncate(FIL * fp){

    if (!fp || !fp->fs) 
      return FR_INVALID_OBJECT;

#if REALTIME
    if (cluster_in_alt_window(fp->fs, fp->curr_clust)){	
      // the current cluster FAT entry is in the buffered window,
      // so invert the buffers
      invert_buffers(fp->fs);
    }

    if (fp->fs->buffer_used) 
      if (sync_win_buffers(fp->fs) != RES_OK) 
	return FR_DISK_ERR;
#endif

    return f_truncate(fp);
  }

  /* 
   * flush the file cache to physical media;  good for avoiding data loss due
   * to potential platform disruption (battery, app failure, media removal),
   * but should be used sparingly to avoid excess flash r/w cycles; fp struct has 
   * a 512-byte buffer.  
   */
  command error_t FatFs.fsync(FIL * fp){
    return f_sync(fp);
  }

  command error_t FatFs.mkdir(const char * dirname){
    return f_mkdir(dirname);
  }

  //  feed it an empty DIR struct, used before doing readdir calls
  command error_t FatFs.opendir(DIR * dp, const char * dirname){
    return f_opendir(dp, dirname);
  }

  // set current working directory
  command error_t FatFs.chdir(const char * dirname){
    return f_chdir(dirname);
  }

  /*
   * reads dir entries in sequence until fi->fname is "" (fname[0] == NULL)
   *
   * since long filenames are used here, a buffer of sufficient size 
   * (_MAX_LFN + 1, unless using some asian code pages.  see FatFs.h)
   * must be attached to fi->lfname, with its size in fi->lfsize
   * 
   */
  command error_t FatFs.readdir(DIR * dp, FILINFO * fi){
    return f_readdir(dp, fi);
  }

  /*
   * path is to root; fatfs struct is statically declared in driver
   */
  command error_t FatFs.getfree(const char * path, uint32_t * clusters, FATFS ** fs){
    return f_getfree(path, clusters, fs);
  }

  command error_t FatFs.stat(const char * filename, FILINFO * fi){
    return f_stat(filename, fi);
  }

  command error_t FatFs.unlink(const char * filename){
    return f_unlink(filename);
  }

  command const char * FatFs.ff_strerror(error_t errnum){
    switch(errnum){
    case FR_OK:			/* 0 */
      return "No Error";
    case FR_DISK_ERR:		/* 1 */
      return "Disk Error";
    case FR_INT_ERR:			/* 2 */
      return "Internal Error (bad or out of range cluster?)";
    case FR_NOT_READY:		/* 3 */
      return "Drive Not Ready (uninitialized?)";
    case FR_NO_FILE:			/* 4 */
      return "File Not Found";
    case FR_NO_PATH:			/* 5 */
      return "Path Not Found";
    case FR_INVALID_NAME:	/* 6 */
      return "Invalid Name (root dir?)";
    case FR_DENIED:			/* 7 */
      return "Operation Denied";
    case FR_EXIST:			/* 8 */
      return "File Object Already Exists";
    case FR_INVALID_OBJECT:	/* 9 */
      return "Invalid Object";
    case FR_WRITE_PROTECTED:	/* 10 */
      return "Write Protected";
    case FR_INVALID_DRIVE:	/* 11 */
      return "Invalid Drive";
    case FR_NOT_ENABLED:		/* 12 */
      return "Filesystem Not Enabled (improper drive?)";
    case FR_NO_FILESYSTEM:	/* 13 */
      return "No Valid FAT Partition Found";
    case FR_MKFS_ABORTED:	/* 14 */
      return "Unable to Build Filesystem; Aborting";
    case FR_TIMEOUT:			/* 15 */
      return "Re-entrant Operation Timed Out (invalid error in tos!)";
    case 22:
      return "My ERROR!";
    default:
      return "Unknown Error";
    }
  }

  /*
   * this one's a bit weird
   * these are the flags for "value":
   * AM_RDO	Read only 	  (0x01)
   * AM_ARC     Archive           (0x20)
   * AM_SYS     System            (0x04)
   * AM_HID     Hidden            (0x02)
   * 
   * mask is for exposing attributes to effect of value flag; i.e., 
   * if the value bit is zero for a particular attribute and the mask 
   * has a 1 in that position (e.g. value is AM_HID|AM_RDO and mask is 
   * AM_HID|AM_SYS|AM_RDO, then AM_SYS will be turned off) that attribute 
   * will be disabled.
   */
  command error_t FatFs.chmod(const char * filename, BYTE value, BYTE mask){
    return f_chmod(filename, value, mask);
  }

  /*
   * a good time to introduce this:
   * in timedate, the fields break out thus:
   * for fdate, 
   *    bit15:9
   *     Year origin from 1980 (0..127)
   *    bit8:5
   *     Month (1..12)
   *    bit4:0
   *     Day (1..31)
   *
   * for ftime,
   *    bit15:11
   *     Hour (0..23)
   *    bit10:5
   *     Minute (0..59)
   *    bit4:0
   *     Second / 2 (0..29)
   */
  command error_t FatFs.f_utime(const char * filename, FILINFO * timedate){
    return f_utime(filename, timedate);
  }

  command error_t FatFs.rename(const char * oldname, const char * newname){
    return f_rename(oldname, newname);
  }

  /*
   * size in sectors; 512 bytes/sector is fixed
   * a zero allocates the whole drive/card
   */
  command error_t FatFs.mkfs(WORD allocSize){
    return f_mkfs(0, 0, allocSize);
  }

#define	ENTER_FF(fs)
#define LEAVE_FF(fs, res)	return res

#define	ABORT(fs, res)		{ fp->flag |= FA__ERROR; LEAVE_FF(fs, res); }

  /* Name status flags */
#define NS			11		/* Offset of name status byte */
#define NS_LOSS		0x01	/* Out of 8.3 format */
#define NS_LFN		0x02	/* Force to create LFN entry */
#define NS_LAST		0x04	/* Last segment */
#define NS_BODY		0x08	/* Lower case flag (body) */
#define NS_EXT		0x10	/* Lower case flag (ext) */
#define NS_DOT		0x20	/* Dot entry */

#if _DRIVES < 1 || _DRIVES > 9
#error Number of drives must be 1-9.
#endif
  
  static FATFS * FatFs[_DRIVES];	/* Pointer to the file system objects (logical drives) */
  static WORD Fsid;				/* File system mount ID */

#if _FS_RPATH
  static
    BYTE Drive;				/* Current drive */
#endif


#if _USE_LFN == 1	/* LFN with static LFN working buffer */
  static WCHAR LfnBuf[_MAX_LFN + 1];
#define	NAMEBUF(sp,lp)	BYTE sp[12]; WCHAR *lp = LfnBuf
#define INITBUF(dj,sp,lp)	dj.fn = sp; dj.lfn = lp

#elif _USE_LFN > 1	/* LFN with dynamic LFN working buffer */
#define	NAMEBUF(sp,lp)	BYTE sp[12]; WCHAR lbuf[_MAX_LFN + 1], *lp = lbuf
#define INITBUF(dj,sp,lp)	dj.fn = sp; dj.lfn = lp

#else				/* No LFN */
#define	NAMEBUF(sp,lp)	BYTE sp[12]
#define INITBUF(dj,sp,lp)	dj.fn = sp

#endif

  event void Time.tick() {}
  /* return type bitmask:
   * 31-25: Year(0-127 org.1980) 
   * 24-21: Month(1-12)
   * 20-16: Day(1-31)  
   * 15-11: Hour(0-23) 
   * 10-5: Minute(0-59) 
   * 4-0: Second(0-29 *2) 
   */
  DWORD get_fattime (){
    DWORD now;
    uint32_t year_from_80, month, day, hour, minute, second;
    struct tm ltime;   
    time_t time_now;
 
    call Time.time(&time_now);
    call Time.localtime(&time_now, <ime);
 
    year_from_80 = ltime.tm_year - 1980;
    month        = ltime.tm_mon + 1;
    day          = ltime.tm_mday;
    hour         = ltime.tm_hour;
    minute       = ltime.tm_min;
    second       = ltime.tm_sec / 2;

    now = (year_from_80 << 25) | (month << 21) | (day << 16) | (hour << 11) | (minute << 5) | ((second * 2));

    return now;
  }

  /*-----------------------------------------------------------------------*/
  /* Change window offset                                                  */
  /*-----------------------------------------------------------------------*/

  /* Move to zero only writes back dirty window */
  static FRESULT move_window ( FATFS *fs,	DWORD sector) 	/* File system object, Sector number to make apperance in the fs->win[] */
    {
      DWORD wsect;


      wsect = fs->winsect;
      if (wsect != sector) {	/* Changed current window */
#if !_FS_READONLY
#if REALTIME
	// since we are buffering windows, we can check if the 
	// request matches the buffer, and avoid the move
	if (fs->buffer_used && fs->win_alt_sector == sector){
	  // we have to switch the buffers, without writing
	  // as the next window to be accessed might be the other one
	  invert_buffers(fs);

	  return FR_OK;
	}
#endif

	if (fs->wflag) {	/* Write back dirty window if needed */
#if REALTIME
	  // moving the window to 0 shouldn't do any buffering
	  // plus, leave the buffer alone, it will be handled
	  // in the future
	  if (sector == 0){
	    fs->wflag = 0;
	    return disk_write(fs->drive, fs->win, wsect, 1);
	  }

	  // buffer the current window and write it on the next I/O op,
	  // thus creating an even I/O load per write request
	  // (currently, we have 3 additional I/O when this event happens; 
	  // with this change we have only two split accross two consecutive requests)
	  if (fs->buffer_used) {
	    if (sync_win_buffers(fs) != RES_OK) return FR_DISK_ERR;
	  }

	  atomic{
	    switch (fs->current_buffer){
	    case 0:
	      fs->win = fs->win_alt;
	      fs->current_buffer = 1;
	      break;
	    case 1:
	      fs->win = fs->win_dflt;
	      fs->current_buffer = 0;
	      break;
	    }
	    fs->win_alt_sector = fs->winsect;
	    fs->buffer_used = 1;
	  }
#else
	  if (disk_write(fs->drive, fs->win, wsect, 1) != RES_OK)
	    return FR_DISK_ERR;
#endif

	  fs->wflag = 0;
#if !REALTIME
	  // in realtime we care about timing, not redundancy
	  if (wsect < (fs->fatbase + fs->sects_fat)) {	/* In FAT area */
	    BYTE nf;
	    for (nf = fs->n_fats; nf > 1; nf--) {	/* Refrect the change to FAT copy */
	      wsect += fs->sects_fat;
	      disk_write(fs->drive, fs->win, wsect, 1);
	    }
	  }
#endif
	}
#endif
	if (sector) {
	  if (disk_read(fs->drive, fs->win, sector, 1) != RES_OK)
	    return FR_DISK_ERR;
	  fs->winsect = sector;
	}
      }

      return FR_OK;
    }




  /*-----------------------------------------------------------------------*/
  /* Clean-up cached data                                                  */
  /*-----------------------------------------------------------------------*/
#if !_FS_READONLY
  /* FR_OK: successful, FR_DISK_ERR: failed */
  static FRESULT sync (FATFS *fs)
    {
      FRESULT res = 0;

#if !REALTIME
      res = move_window(fs, 0);
      if (res == FR_OK) {
#endif
	/* Update FSInfo sector if needed */
	if (fs->fs_type == FS_FAT32 && fs->fsi_flag) {
#if !REALTIME
	  fs->winsect = 0;
#else
	  res = move_window(fs, fs->fsi_sector);
#endif
	  memset(fs->win, 0, 512);
	  ST_WORD(fs->win+BS_55AA, 0xAA55);
	  ST_DWORD(fs->win+FSI_LeadSig, 0x41615252);
	  ST_DWORD(fs->win+FSI_StrucSig, 0x61417272);
	  ST_DWORD(fs->win+FSI_Free_Count, fs->free_clust);
	  ST_DWORD(fs->win+FSI_Nxt_Free, fs->last_clust);
#if !REALTIME
	  disk_write(fs->drive, fs->win, fs->fsi_sector, 1);
#endif
	  fs->fsi_flag = 0;
	  fs->wflag = 1;
	}
	/* Make sure that no pending write process in the physical drive */
	if (disk_ioctl(fs->drive, CTRL_SYNC, (void*)NULL) != RES_OK)
	  res = FR_DISK_ERR;
#if !REALTIME
      }
#endif

#if REALTIME
      if (fs->buffer_used) if (sync_win_buffers(fs) != RES_OK) return FR_DISK_ERR;
      move_window(fs, 0);
#endif

      return res;
    }
#endif




  /*-----------------------------------------------------------------------*/
  /* FAT access - Read value of a FAT entry                                */
  /*-----------------------------------------------------------------------*/

  /* 0xFFFFFFFF:Disk error, 1:Interal error, Else:Cluster status */ 
  DWORD get_fat (FATFS *fs, DWORD clst)	/* Cluster# to get the link information */
  {
    UINT wc, bc;
    DWORD fsect;

    if (clst < 2 || clst >= fs->max_clust)	/* Range check */
      return 1;

    fsect = fs->fatbase;
    switch (fs->fs_type) {
    case FS_FAT12:
      bc = clst; bc += bc / 2;
      if (move_window(fs, fsect + (bc / SS(fs)))) break;
      wc = fs->win[bc & (SS(fs) - 1)]; bc++;
      if (move_window(fs, fsect + (bc / SS(fs)))) break;
      wc |= (WORD)fs->win[bc & (SS(fs) - 1)] << 8;
      return (clst & 1) ? (wc >> 4) : (wc & 0xFFF);

    case FS_FAT16 :
      if (move_window(fs, fsect + (clst / (SS(fs) / 2)))) break;
      return LD_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)]);

    case FS_FAT32 :
      if (move_window(fs, fsect + (clst / (SS(fs) / 4)))) 
	break;
      return LD_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)]) & 0x0FFFFFFF;
    }

    return 0xFFFFFFFF;	/* An error occured at the disk I/O layer */
  }




  /*-----------------------------------------------------------------------*/
  /*  FAT access - Change value of a FAT entry                             */
  /*-----------------------------------------------------------------------*/
#if !_FS_READONLY
  FRESULT put_fat (FATFS *fs,	/* File system object */
		   DWORD clst,	/* Cluster# to be changed in range of 2 to fs->max_clust - 1 */
		   DWORD val)	/* New value to mark the cluster */
  {
    UINT bc;
    BYTE *p;
    DWORD fsect;
    FRESULT res;

    if (clst < 2 || clst >= fs->max_clust) {	/* Range check */
      res = FR_INT_ERR;
    } 
    else {
      fsect = fs->fatbase;
      switch (fs->fs_type) {
      case FS_FAT12 :
	bc = clst; bc += bc / 2;
	res = move_window(fs, fsect + (bc / SS(fs)));
	if (res != FR_OK) break;
	p = &fs->win[bc & (SS(fs) - 1)];
	*p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
	bc++;
	fs->wflag = 1;
	res = move_window(fs, fsect + (bc / SS(fs)));
	if (res != FR_OK) break;
	p = &fs->win[bc & (SS(fs) - 1)];
	*p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
	break;

      case FS_FAT16 :
	res = move_window(fs, fsect + (clst / (SS(fs) / 2)));
	if (res != FR_OK) break;
	ST_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)], (WORD)val);
	break;

      case FS_FAT32 :
	res = move_window(fs, fsect + (clst / (SS(fs) / 4)));
	if (res != FR_OK) break;
	ST_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)], val);
	break;

      default :
	res = FR_INT_ERR;
      }
      fs->wflag = 1;
    }

    return res;
  }
#endif /* !_FS_READONLY */


  /*-----------------------------------------------------------------------*/
  /* Remove a cluster chain                                                */
  /*-----------------------------------------------------------------------*/
#if !_FS_READONLY
  static FRESULT remove_chain (FATFS *fs,	DWORD clst)			/* Cluster# to a remove chain from */
    {
      FRESULT res;
      DWORD nxt;

      if (clst < 2 || clst >= fs->max_clust) {	/* Check the range of cluster# */
	res = FR_INT_ERR;
      } 
      else {
	res = FR_OK;
	while (clst < fs->max_clust) {			/* Not a last link? */
	  nxt = get_fat(fs, clst);		/* Get cluster status */
	  if (nxt == 0) break;				/* Empty cluster? */
	  if (nxt == 1) { res = FR_INT_ERR; break; }	/* Internal error? */
	  if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; }	/* Disk error? */
	  res = put_fat(fs, clst, 0);		/* Mark the cluster "empty" */
	  if (res != FR_OK) break;
	  if (fs->free_clust != 0xFFFFFFFF) {	/* Update FSInfo */
	    fs->free_clust++;
	    fs->fsi_flag = 1;
	  }
	  clst = nxt;	/* Next cluster */
	}
      }

      return res;
    }
#endif

  /*-----------------------------------------------------------------------*/
  /* FAT handling - Stretch or Create a cluster chain                      */
  /*-----------------------------------------------------------------------*/
#if !_FS_READONLY
  /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
  static DWORD create_chain (FATFS *fs, DWORD clst)			/* Cluster# to stretch. 0 means create a new chain. */
    {
      DWORD cs, ncl, scl, mcl;

      mcl = fs->max_clust;
      if (clst == 0) {		/* Create new chain */
	scl = fs->last_clust;			/* Get suggested start point */
	if (scl == 0 || scl >= mcl) scl = 1;
      }
      else {					/* Stretch existing chain */
	cs = get_fat(fs, clst);		/* Check the cluster status */
	if (cs < 2) return 1;			/* It is an invalid cluster */
	if (cs < mcl) return cs;		/* It is already followed by next cluster */
	scl = clst;
      }

      ncl = scl;				/* Start cluster */
      for (;;) {
	ncl++;							/* Next cluster */
	if (ncl >= mcl) {				/* Wrap around */
	  ncl = 2;
	  if (ncl > scl) return 0;	/* No free custer */
	}
	cs = get_fat(fs, ncl);		/* Get the cluster status */
	if (cs == 0) break;				/* Found a free cluster */
	if (cs == 0xFFFFFFFF || cs == 1)/* An error occured */
	  return cs;
	if (ncl == scl) return 0;		/* No free custer */
      }

      if (put_fat(fs, ncl, 0x0FFFFFFF))	/* Mark the new cluster "in use" */
	return 0xFFFFFFFF;
      if (clst != 0) {					/* Link it to the previous one if needed */
	if (put_fat(fs, clst, ncl))
	  return 0xFFFFFFFF;
      }

      fs->last_clust = ncl;				/* Update FSINFO */
      if (fs->free_clust != 0xFFFFFFFF) {
	fs->free_clust--;
	fs->fsi_flag = 1;
      }

      return ncl;		/* Return new cluster number */
    }
#endif /* !_FS_READONLY */


  /*-----------------------------------------------------------------------*/
  /* Get sector# from cluster#                                             */
  /*-----------------------------------------------------------------------*/

  /* !=0: sector number, 0: failed - invalid cluster# */
  static DWORD clust2sect (FATFS *fs, DWORD clst)		/* Cluster# to be converted */
    {
      clst -= 2;
      if (clst >= (fs->max_clust - 2)) return 0;		/* Invalid cluster# */
      return clst * fs->csize + fs->database;
    }

  /*-----------------------------------------------------------------------*/
  /* Directory handling - Seek directory index                             */
  /*-----------------------------------------------------------------------*/

  static FRESULT dir_seek (DIR *dj, WORD idx)	/* Pointer to directory object, Directory index number */
    {
      DWORD clst;
      WORD ic;

      dj->index = idx;
      clst = dj->sclust;
      if (clst == 1 || clst >= dj->fs->max_clust)	/* Check start cluster range */
	return FR_INT_ERR;
      if (!clst && dj->fs->fs_type == FS_FAT32)	/* Replace cluster# 0 with root cluster# if in FAT32 */
	clst = dj->fs->dirbase;

      if (clst == 0) {	/* Static table */
	dj->clust = clst;
	if (idx >= dj->fs->n_rootdir)		/* Index is out of range */
	  return FR_INT_ERR;
	dj->sect = dj->fs->dirbase + idx / (SS(dj->fs) / 32);	/* Sector# */
      }
      else {				/* Dynamic table */
	ic = SS(dj->fs) / 32 * dj->fs->csize;	/* Entries per cluster */
	while (idx >= ic) {	                   /* Follow cluster chain */
	  clst = get_fat(dj->fs, clst);			/* Get next cluster */
	  if (clst == 0xFFFFFFFF) return FR_DISK_ERR;	/* Disk error */
	  if (clst < 2 || clst >= dj->fs->max_clust)	/* Reached to end of table or int error */
	    return FR_INT_ERR;
	  idx -= ic;
	}
	dj->clust = clst;
	dj->sect = clust2sect(dj->fs, clst) + idx / (SS(dj->fs) / 32);  /* Sector# */
      }
      dj->dir = dj->fs->win + (idx % (SS(dj->fs) / 32)) * 32;

      return FR_OK;	/* Seek succeeded */
    }


  /*-----------------------------------------------------------------------*/
  /* Directory handling - Move directory index next                        */
  /*-----------------------------------------------------------------------*/

  /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:EOT and could not streach */
  static FRESULT dir_next (DIR *dj, BOOL streach)    /* FALSE: Do not streach table, TRUE: Streach table if needed */
    {
      DWORD clst;
      WORD i;

      i = dj->index + 1;
      if (!i || !dj->sect)	/* Report EOT when index has reached 65535 */
	return FR_NO_FILE;

      if (!(i % (SS(dj->fs) / 32))) {	/* Sector changed? */
	dj->sect++;					/* Next sector */

	if (dj->clust == 0) {	/* Static table */
	  if (i >= dj->fs->n_rootdir)	/* Report EOT when end of table */
	    return FR_NO_FILE;
	}
	else {					/* Dynamic table */
	  if (((i / (SS(dj->fs) / 32)) & (dj->fs->csize - 1)) == 0) {	/* Cluster changed? */
	    clst = get_fat(dj->fs, dj->clust);			/* Get next cluster */
	    if (clst <= 1) return FR_INT_ERR;
	    if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
	    if (clst >= dj->fs->max_clust) {				/* When it reached end of dynamic table */
#if !_FS_READONLY
	      BYTE c;
	      if (!streach) return FR_NO_FILE;			/* When do not streach, report EOT */
	      clst = create_chain(dj->fs, dj->clust);		/* Streach cluster chain */
	      if (clst == 0) return FR_DENIED;			/* No free cluster */
	      if (clst == 1) return FR_INT_ERR;
	      if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
	      /* Clean-up streached table */
	      if (move_window(dj->fs, 0)) return FR_DISK_ERR;	/* Flush active window */
	      memset(dj->fs->win, 0, SS(dj->fs));			/* Clear window buffer */
	      dj->fs->winsect = clust2sect(dj->fs, clst);	/* Cluster start sector */
	      for (c = 0; c < dj->fs->csize; c++) {		/* Fill the new cluster with 0 */
		dj->fs->wflag = 1;
		if (move_window(dj->fs, 0)) return FR_DISK_ERR;
		dj->fs->winsect++;
	      }
	      dj->fs->winsect -= c;						/* Rewind window address */
#else
	      return FR_NO_FILE;			/* Report EOT */
#endif
	    }
	    dj->clust = clst;				/* Initialize data for new cluster */
	    dj->sect = clust2sect(dj->fs, clst);
	  }
	}
      }

      dj->index = i;
      dj->dir = dj->fs->win + (i % (SS(dj->fs) / 32)) * 32;

      return FR_OK;
    }




  /*-----------------------------------------------------------------------*/
  /* LFN handling - Test/Pick/Fit an LFN segment from/to directory entry   */
  /*-----------------------------------------------------------------------*/
#if _USE_LFN
  static const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30};	/* Offset of LFN chars in the directory entry */

  /* TRUE:Matched, FALSE:Not matched */
  static BOOL cmp_lfn (WCHAR *lfnbuf, BYTE *dir) /* Pointer to the LFN to be compared, Pointer to the directory entry containing a part of LFN */
    {
      int i, s;
      WCHAR wc, uc;
      
      i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13;	/* Get offset in the LFN buffer */
      s = 0; wc = 1;
      do {
	uc = LD_WORD(dir+LfnOfs[s]);	/* Pick an LFN character from the entry */
	if (wc) {	/* Last char has not been processed */
	  wc = ff_wtoupper(uc);		/* Convert it to upper case */
	  if (i >= _MAX_LFN || wc != ff_wtoupper(lfnbuf[i++]))	/* Compare it */
	    return FALSE;			/* Not matched */
	} 
	else if (uc != 0xFFFF) 
	  return FALSE;	/* Check filler */
      } while (++s < 13);				/* Repeat until all chars in the entry are checked */
      
      if ((dir[LDIR_Ord] & 0x40) && wc && lfnbuf[i])	/* Last segment matched but different length */
	return FALSE;
      
      return TRUE;					/* The part of LFN matched */
    }
  
  /* TRUE:Succeeded, FALSE:Buffer overflow */
  static BOOL pick_lfn (WCHAR *lfnbuf, BYTE *dir) /* Pointer to the Unicode-LFN buffer, Pointer to the directory entry */
    {
      int i, s;
      WCHAR wc, uc;


      i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13;	/* Offset in the LFN buffer */

      s = 0; wc = 1;
      do {
	uc = LD_WORD(dir+LfnOfs[s]);			/* Pick an LFN character from the entry */
	if (wc) {	/* Last char has not been processed */
	  if (i >= _MAX_LFN) 
	    return FALSE;	/* Buffer overflow? */
	  lfnbuf[i++] = wc = uc;				/* Store it */
	} 
	else if (uc != 0xFFFF) 
	  return FALSE;		/* Check filler */
      } while (++s < 13);						/* Read all character in the entry */

      if (dir[LDIR_Ord] & 0x40) {				/* Put terminator if it is the last LFN part */
	if (i >= _MAX_LFN) return FALSE;	/* Buffer overflow? */
	lfnbuf[i] = 0;
      }

      return TRUE;
    }


#if !_FS_READONLY
  static void fit_lfn (const WCHAR *lfnbuf,	/* Pointer to the LFN buffer */
		       BYTE *dir,			/* Pointer to the directory entry */
		       BYTE ord,			/* LFN order (1-20) */
		       BYTE sum)			/* SFN sum */
    {
      int i, s;
      WCHAR wc;


      dir[LDIR_Chksum] = sum;			/* Set check sum */
      dir[LDIR_Attr] = AM_LFN;		/* Set attribute. LFN entry */
      dir[LDIR_Type] = 0;
      ST_WORD(dir+LDIR_FstClusLO, 0);

      i = (ord - 1) * 13;				/* Get offset in the LFN buffer */
      s = wc = 0;
      do {
	if (wc != 0xFFFF) wc = lfnbuf[i++];	/* Get an effective char */
	ST_WORD(dir+LfnOfs[s], wc);	/* Put it */
	if (!wc) wc = 0xFFFF;		/* Padding chars following last char */
      } while (++s < 13);
      if (wc == 0xFFFF || !lfnbuf[i]) ord |= 0x40;	/* Bottom LFN part is the start of LFN sequence */
      dir[LDIR_Ord] = ord;			/* Set the LFN order */
    }

#endif
#endif



  /*-----------------------------------------------------------------------*/
  /* Create numbered name                                                  */
  /*-----------------------------------------------------------------------*/
#if _USE_LFN
  void gen_numname (BYTE *dst,			/* Pointer to genartated SFN */
		    const BYTE *src,	/* Pointer to source SFN to be modified */
		    const WCHAR *lfn,	/* Pointer to LFN */
		    WORD num)			/* Sequense number */
  {
    char ns[8];
    int i, j;


    memcpy(dst, src, 11);

    if (num > 5) {	/* On many collisions, generate a hash number instead of sequencial number */
      do num = (num >> 1) + (num << 15) + (WORD)*lfn++; while (*lfn);
    }

    /* itoa */
    i = 7;
    do {
      ns[i--] = (num % 10) + '0';
      num /= 10;
    } while (num);
    ns[i] = '~';

    /* Append the number */
    for (j = 0; j < i && dst[j] != ' '; j++) {
      if (IsDBCS1(dst[j])) {
	if (j == i - 1) break;
	j++;
      }
    }
    do {
      dst[j++] = (i < 8) ? ns[i++] : ' ';
    } while (j < 8);
  }
#endif

  /*-----------------------------------------------------------------------*/
  /* Calculate sum of an SFN                                               */
  /*-----------------------------------------------------------------------*/
#if _USE_LFN
  static BYTE sum_sfn (const BYTE *dir)		/* Ptr to directory entry */
    {
      BYTE sum = 0;
      int n = 11;

      do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n);
      return sum;
    }
#endif


  /*-----------------------------------------------------------------------*/
  /* Directory handling - Find an object in the directory                  */
  /*-----------------------------------------------------------------------*/

  static FRESULT dir_find (DIR *dj)		/* Pointer to the directory object linked to the file name */
    {
      FRESULT res;
      BYTE c, *dir;
#if _USE_LFN
      BYTE a, ord, sum;
#endif

      res = dir_seek(dj, 0);			/* Rewind directory object */
      if (res != FR_OK) return res;

#if _USE_LFN
      ord = sum = 0xFF; 
#endif
      do {
	res = move_window(dj->fs, dj->sect);
	if (res != FR_OK) break;
#if REALTIME
	dir = get_dir_ptr(dj->fs, dj->dir);
#else
	dir = dj->dir;					/* Ptr to the directory entry of current index */
#endif
	c = dir[DIR_Name];
	if (c == 0) { res = FR_NO_FILE; break; }	/* Reached to end of table */
#if _USE_LFN	/* LFN configuration */
	a = dir[DIR_Attr] & AM_MASK;
	if (c == 0xE5 || ((a & AM_VOL) && a != AM_LFN)) {	/* An entry without valid data */
	  ord = 0xFF;
	} 
	else {
	  if (a == AM_LFN) {			/* An LFN entry is found */
	    if (dj->lfn) {
	      if (c & 0x40) {		/* Is it start of LFN sequence? */
		sum = dir[LDIR_Chksum];
		c &= 0xBF; ord = c;		/* LFN start order */
		dj->lfn_idx = dj->index;
	      }
	      /* Check validity of the LFN entry and compare it with given name */
	      ord = (c == ord && sum == dir[LDIR_Chksum] && cmp_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF;
	    }
	  } 
	  else {					/* An SFN entry is found */
	    if (!ord && sum == sum_sfn(dir)) break;	/* LFN matched? */
	    ord = 0xFF; dj->lfn_idx = 0xFFFF;	/* Reset LFN sequence */
	    if (!(dj->fn[NS] & NS_LOSS) && !memcmp(dir, dj->fn, 11)) break;	/* SFN matched? */
	  }
	}
#else		/* Non LFN configuration */
	if (!(dir[DIR_Attr] & AM_VOL) && !mem_cmp(dir, dj->fn, 11)) /* Is it a valid entry? */
	  break;
#endif
	res = dir_next(dj, FALSE);				/* Next entry */
      } while (res == FR_OK);
      
      return res;
    }
  

  
  
  /*-----------------------------------------------------------------------*/
  /* Read an object from the directory                                     */
  /*-----------------------------------------------------------------------*/
#if _FS_MINIMIZE <= 1
  static FRESULT dir_read (DIR *dj)		/* Pointer to the directory object to store read object name */
    {
      FRESULT res;
      BYTE c, *dir;
#if _USE_LFN
      BYTE a, ord = 0xFF, sum = 0xFF;
#endif

      res = FR_NO_FILE;
      while (dj->sect) {
	res = move_window(dj->fs, dj->sect);
	if (res != FR_OK) break;
#if REALTIME
	dir = get_dir_ptr(dj->fs, dj->dir);
#else
	dir = dj->dir;					/* Ptr to the directory entry of current index */
#endif
	c = dir[DIR_Name];
	if (c == 0) { res = FR_NO_FILE; break; }	/* Reached to end of table */
#if _USE_LFN	/* LFN configuration */
	a = dir[DIR_Attr] & AM_MASK;
	if (c == 0xE5 || (!_FS_RPATH && c == '.') || ((a & AM_VOL) && a != AM_LFN)) {	/* An entry without valid data */
	  ord = 0xFF;
	} else {
	  if (a == AM_LFN) {			/* An LFN entry is found */
	    if (c & 0x40) {			/* Is it start of LFN sequence? */
	      sum = dir[LDIR_Chksum];
	      c &= 0xBF; ord = c;
	      dj->lfn_idx = dj->index;
	    }
	    /* Check LFN validity and capture it */
	    ord = (c == ord && sum == dir[LDIR_Chksum] && pick_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF;
	  } else {				/* An SFN entry is found */
	    if (ord || sum != sum_sfn(dir))	/* Is there a valid LFN? */
	      dj->lfn_idx = 0xFFFF;		/* It has no LFN. */
	    break;
	  }
	}
#else		/* Non LFN configuration */
	if (c != 0xE5 && (_FS_RPATH || c != '.') && !(dir[DIR_Attr] & AM_VOL))	/* Is it a valid entry? */
	  break;
#endif
	res = dir_next(dj, FALSE);				/* Next entry */
	if (res != FR_OK) break;
      }

      if (res != FR_OK) dj->sect = 0;

      return res;
    }
#endif



  /*-----------------------------------------------------------------------*/
  /* Register an object to the directory                                   */
  /*-----------------------------------------------------------------------*/
#if !_FS_READONLY
  /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */
  static FRESULT dir_register (DIR *dj)				/* Target directory with object name to be created */
    {
      FRESULT res;
      BYTE c, *dir;

#if _USE_LFN	/* LFN configuration */
      WORD n, ne, is;
      BYTE sn[12], *fn, sum;
      WCHAR *lfn;


      fn = dj->fn; lfn = dj->lfn;
      memcpy(sn, fn, 12);

      if (_FS_RPATH && (sn[NS] & NS_DOT)) return FR_INVALID_NAME;	/* Cannot create dot entry */

      if (sn[NS] & NS_LOSS) {			/* When LFN is out of 8.3 format, generate a numbered name */
	fn[NS] = 0; dj->lfn = NULL;			/* Find only SFN */
	for (n = 1; n < 100; n++) {
	  gen_numname(fn, sn, lfn, n);	/* Generate a numbered name */
	  res = dir_find(dj);				/* Check if the name collides with existing SFN */
	  if (res != FR_OK) break;
	}
	if (n == 100) return FR_DENIED;		/* Abort if too many collisions */
	if (res != FR_NO_FILE) return res;	/* Abort if the result is other than 'not collided' */
	fn[NS] = sn[NS]; dj->lfn = lfn;
      }

      if (sn[NS] & NS_LFN) {			/* When LFN is to be created, reserve reserve an SFN + LFN entries. */
	for (ne = 0; lfn[ne]; ne++) ;
	ne = (ne + 25) / 13;
      } else {						/* Otherwise reserve only an SFN entry. */
	ne = 1;
      }

      /* Reserve contiguous entries */
      res = dir_seek(dj, 0);
      if (res != FR_OK) return res;
      n = is = 0;
      do {
	res = move_window(dj->fs, dj->sect);
	if (res != FR_OK) break;
#if REALTIME
	c = *(get_dir_ptr(dj->fs, dj->dir));
#else
	c = *dj->dir;				/* Check the entry status */
#endif
	if (c == 0xE5 || c == 0) {	/* Is it a blank entry? */
	  if (n == 0) is = dj->index;	/* First index of the contigulus entry */
	  if (++n == ne) break;	/* A contiguous entry that requiered count is found */
	} else {
	  n = 0;					/* Not a blank entry. Restart to search */
	}
	res = dir_next(dj, TRUE);	/* Next entry with table streach */
      } while (res == FR_OK);

      if (res == FR_OK && ne > 1) {	/* Initialize LFN entry if needed */
	res = dir_seek(dj, is);
	if (res == FR_OK) {
	  sum = sum_sfn(dj->fn);	/* Sum of the SFN tied to the LFN */
	  ne--;
	  do {					/* Store LFN entries in bottom first */
	    res = move_window(dj->fs, dj->sect);
	    if (res != FR_OK) break;
#if REALTIME
	    dj->dir = get_dir_ptr(dj->fs, dj->dir);
#endif
	    fit_lfn(dj->lfn, dj->dir, (BYTE)ne, sum);
	    dj->fs->wflag = 1;
	    res = dir_next(dj, FALSE);	/* Next entry */
	  } while (res == FR_OK && --ne);
	}
      }

#else	/* Non LFN configuration */
      res = dir_seek(dj, 0);
      if (res == FR_OK) {
	do {	/* Find a blank entry for the SFN */
	  res = move_window(dj->fs, dj->sect);
	  if (res != FR_OK) break;
#if REALTIME
	  c = *(get_dir_ptr(dj->dir));
#else
	  c = *dj->dir;
#endif
	  if (c == 0xE5 || c == 0) break;	/* Is it a blank entry? */
	  res = dir_next(dj, TRUE);		/* Next entry with table streach */
	} while (res == FR_OK);
      }
#endif

      if (res == FR_OK) {		/* Initialize the SFN entry */
	res = move_window(dj->fs, dj->sect);
	if (res == FR_OK) {
#if REALTIME
	  dir = get_dir_ptr(dj->fs, dj->dir);
#else
	  dir = dj->dir;
#endif
	  memset(dir, 0, 32);		/* Clean the entry */
	  memcpy(dir, dj->fn, 11);	/* Put SFN */
	  dir[DIR_NTres] = *(dj->fn+NS) & (NS_BODY | NS_EXT);	/* Put NT flag */
	  dj->fs->wflag = 1;
	}
      }

      return res;
    }
#endif /* !_FS_READONLY */




  /*-----------------------------------------------------------------------*/
  /* Remove an object from the directory                                   */
  /*-----------------------------------------------------------------------*/
#if !_FS_READONLY && !_FS_MINIMIZE
  /* FR_OK: Successful, FR_DISK_ERR: A disk error */
  static FRESULT dir_remove (DIR *dj)				/* Directory object pointing the entry to be removed */
    {
      FRESULT res;

#if _USE_LFN	/* LFN configuration */
      WORD i;

      i = dj->index;	/* SFN index */
      res = dir_seek(dj, (WORD)((dj->lfn_idx == 0xFFFF) ? i : dj->lfn_idx));	/* Goto the SFN or top of the LFN entries */
      if (res == FR_OK) {
	do {
	  res = move_window(dj->fs, dj->sect);
	  if (res != FR_OK) break;
#if REALTIME
	  dj->dir = get_dir_ptr(dj->fs, dj->dir);
#endif
	  *dj->dir = 0xE5;			/* Mark the entry "deleted" */
	  dj->fs->wflag = 1;
	  if (dj->index >= i) break;	/* When SFN is deleted, all entries of the object is deleted. */
	  res = dir_next(dj, FALSE);	/* Next entry */
	} while (res == FR_OK);
	if (res == FR_NO_FILE) res = FR_INT_ERR;
      }

#else			/* Non LFN configuration */
      res = dir_seek(dj, dj->index);
      if (res == FR_OK) {
	res = move_window(dj->fs, dj->sect);
	if (res == FR_OK) {
#if REALTIME
	  dj->dir = get_dir_ptr(dj->fs, dj->dir);
#endif
	  *dj->dir = 0xE5;			/* Mark the entry "deleted" */
	  dj->fs->wflag = 1;
	}
      }
#endif

      return res;
    }
#endif /* !_FS_READONLY */

  /*-----------------------------------------------------------------------*/
  /* Pick a segment and create the object name in directory form           */
  /*-----------------------------------------------------------------------*/

  static
    FRESULT create_name (DIR *dj, const XCHAR **path) 	/* Pointer to pointer to the segment in the path string */
    {
#ifdef _EXCVT
      static const BYTE cvt[] = _EXCVT;
#endif
#if _USE_LFN	/* LFN configuration */
      BYTE b, cf;
      WCHAR w, *lfn;
      int i, ni, si, di;
      const XCHAR *p;

      /* Create LFN in Unicode */
      si = di = 0;
      p = *path;
      lfn = dj->lfn;
      for (;;) {
	w = p[si++];					/* Get a character */
	if (w < ' ' || w == '/' || w == '\\') break;	/* Break on end of segment */
	if (di >= _MAX_LFN)				/* Reject too long name */
	  return FR_INVALID_NAME;
#if !_LFN_UNICODE
	w &= 0xFF;
	if (IsDBCS1(w)) {				/* If it is a DBC 1st byte */
	  b = p[si++];			/* Get 2nd byte */
	  if (!IsDBCS2(b))			/* Reject invalid code for DBC */
	    return FR_INVALID_NAME;
	  w = (w << 8) + b;
	}
	w = ff_convert(w, 1);			/* Convert OEM to Unicode */
	if (!w) return FR_INVALID_NAME;	/* Reject invalid code */
#endif
	if (w < 0x80 && strchr("\"*:<>\?|\x7F", w)) /* Reject illegal chars for LFN */
	  return FR_INVALID_NAME;
	lfn[di++] = w;					/* Store the Unicode char */
      }
      *path = &p[si];						/* Rerurn pointer to the next segment */
      cf = (w < ' ') ? NS_LAST : 0;		/* Set last segment flag if end of path */
#if _FS_RPATH
      if ((di == 1 && lfn[di - 1] == '.') || /* Is this a dot entry? */
	  (di == 2 && lfn[di - 1] == '.' && lfn[di - 2] == L'.')) {
	lfn[di] = 0;
	for (i = 0; i < 11; i++)
	  dj->fn[i] = (i < di) ? '.' : ' ';
	dj->fn[i] = cf | NS_DOT;		/* This is a dot entry */
	return FR_OK;
      }
#endif
      while (di) {						/* Strip trailing spaces and dots */
	w = lfn[di - 1];
	if (w != ' ' && w != '.') break;
	di--;
      }
      if (!di) return FR_INVALID_NAME;	/* Reject null string */

      lfn[di] = 0;						/* LFN is created */

      /* Create SFN in directory form */
      memset(dj->fn, ' ', 11);
      for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ;	/* Strip leading spaces and dots */
      if (si) cf |= NS_LOSS | NS_LFN;
      while (di && lfn[di - 1] != '.') di--;	/* Find extension (di<=si: no extension) */

      b = i = 0; ni = 8;
      for (;;) {
	w = lfn[si++];					/* Get an LFN char */
	if (!w) break;					/* Break on enf of the LFN */
	if (w == ' ' || (w == '.' && si != di)) {	/* Remove spaces and dots */
	  cf |= NS_LOSS | NS_LFN; continue;
	}

	if (i >= ni || si == di) {		/* Extension or end of SFN */
	  if (ni == 11) {				/* Long extension */
	    cf |= NS_LOSS | NS_LFN; break;
	  }
	  if (si != di) 
	    cf |= NS_LOSS | NS_LFN;	/* Out of 8.3 format */
	  if (si > di) break;		/* No extension */
	  si = di; i = 8; ni = 11;	/* Enter extension section */
	  b <<= 2; continue;
	}

	if (w >= 0x80) {				/* Non ASCII char */
#ifdef _EXCVT
	  w = ff_convert(w, 0);		/* Unicode -> OEM code */
	  if (w) 
	    w = cvt[w - 0x80];	        /* Convert extend char to upper (SBCS) */
#else
	  w = ff_convert(ff_wtoupper(w), 0);	/* Upper converted Unicode -> OEM code */
#endif
	  cf |= NS_LFN;				/* Force create LFN entry */
	}

	if (_DF1S && w >= 0x100) {		/* Double byte char */
	  if (i >= ni - 1) {
	    cf |= NS_LOSS | NS_LFN; i = ni; continue;
	  }
	  dj->fn[i++] = (BYTE)(w >> 8);
	} else {						/* Single byte char */
	  if (!w || strchr("+,;[=]", w)) {	/* Replace illegal chars for SFN */
	    w = '_'; cf |= NS_LOSS | NS_LFN;	/* Lossy conversion */
	  } else {
	    if (IsUpper(w)) {		/* ASCII Large capital */
	      b |= 2;
	    } else {
	      if (IsLower(w)) {	        /* ASCII Small capital */
		b |= 1; w -= 0x20;
	      }
	    }
	  }
	}
	dj->fn[i++] = (BYTE)w;
      }

      if (dj->fn[0] == 0xE5) dj->fn[0] = 0x05;	/* If the first char collides with deleted mark, replace it with 0x05 */

      if (ni == 8) b <<= 2;
      if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03)	/* Create LFN entry when there are composite capitals */
	cf |= NS_LFN;
      if (!(cf & NS_LFN)) {						/* When LFN is in 8.3 format without extended char, NT flags are created */
	if ((b & 0x03) == 0x01) cf |= NS_EXT;	/* NT flag (Extension has only small capital) */
	if ((b & 0x0C) == 0x04) cf |= NS_BODY;	/* NT flag (Filename has only small capital) */
      }

      dj->fn[NS] = cf;	/* SFN is created */

      return FR_OK;

#else	/* Non-LFN configuration */
      BYTE b, c, d, *sfn;
      int ni, si, i;
      const char *p;

      /* Create file name in directory form */
      sfn = dj->fn;
      memset(sfn, ' ', 11);
      si = i = b = 0; ni = 8;
      p = *path;
#if _FS_RPATH
      if (p[si] == '.') { /* Is this a dot entry? */
	for (;;) {
	  c = p[si++];
	  if (c != '.' || si >= 3) break;
	  sfn[i++] = c;
	}
	if (c != '/' && c != '\\' && c > ' ') return FR_INVALID_NAME;
	*path = &p[si];									/* Rerurn pointer to the next segment */
	sfn[NS] = (c < ' ') ? NS_LAST|NS_DOT : NS_DOT;	/* Set last segment flag if end of path */
	return FR_OK;
      }
#endif
      for (;;) {
	c = p[si++];
	if (c <= ' ' || c == '/' || c == '\\') break;	/* Break on end of segment */
	if (c == '.' || i >= ni) {
	  if (ni != 8 || c != '.') return FR_INVALID_NAME;
	  i = 8; ni = 11;
	  b <<= 2; continue;
	}
	if (c >= 0x80) {				/* Extended char */
#ifdef _EXCVT
	  c = cvt[c - 0x80];			/* Convert extend char (SBCS) */
#else
	  b |= 3;						/* Eliminate NT flag if ext char is exist */
#if !_DF1S	/* ASCII only cfg */
	  return FR_INVALID_NAME;
#endif
#endif
	}
	if (IsDBCS1(c)) {			/* DBC 1st byte? */
	  d = p[si++];				/* Get 2nd byte */
	  if (!IsDBCS2(d) || i >= ni - 1)	/* Reject invalid DBC */
	    return FR_INVALID_NAME;
	  sfn[i++] = c;
	  sfn[i++] = d;
	} else {
	  if (strchr(" \"*+,[=]|\x7F", c))	/* Reject illegal chrs for SFN */
	    return FR_INVALID_NAME;
	  if (IsUpper(c)) {                     /* ASCII large capital? */
	    b |= 2;
	  } else {
	    if (IsLower(c)) {                   /* ASCII small capital? */
	      b |= 1; c -= 0x20;
	    }
	  }
	  sfn[i++] = c;
	}
      }
      *path = &p[si];						/* Rerurn pointer to the next segment */
      c = (c <= ' ') ? NS_LAST : 0;		/* Set last segment flag if end of path */

      if (!i) return FR_INVALID_NAME;		/* Reject null string */
      if (sfn[0] == 0xE5) sfn[0] = 0x05;	/* When first char collides with 0xE5, replace it with 0x05 */

      if (ni == 8) b <<= 2;
      if ((b & 0x03) == 0x01) c |= NS_EXT;	/* NT flag (Extension has only small capital) */
      if ((b & 0x0C) == 0x04) c |= NS_BODY;	/* NT flag (Filename has only small capital) */

      sfn[NS] = c;		/* Store NT flag, File name is created */

      return FR_OK;
#endif
    }

  /*-----------------------------------------------------------------------*/
  /* Get file information from directory entry                             */
  /*-----------------------------------------------------------------------*/
#if _FS_MINIMIZE <= 1
  static void get_fileinfo (DIR *dj, FILINFO *fno)	 	/* Pointer to the file information to be filled */
    {
      int i;
      BYTE c, nt, *dir;
      char *p;


      p = fno->fname;
      if (dj->sect) {
#if REALTIME
	dir = get_dir_ptr(dj->fs, dj->dir);
#else
	dir = dj->dir;
#endif
	nt = dir[DIR_NTres];		/* NT flag */
	for (i = 0; i < 8; i++) {	/* Copy name body */
	  c = dir[i];
	  if (c == ' ') break;
	  if (c == 0x05) c = 0xE5;
	  if (_USE_LFN && (nt & NS_BODY) && IsUpper(c)) c += 0x20;
	  *p++ = c;
	}
	if (dir[8] != ' ') {		/* Copy name extension */
	  *p++ = '.';
	  for (i = 8; i < 11; i++) {
	    c = dir[i];
	    if (c == ' ') break;
	    if (_USE_LFN && (nt & NS_EXT) && IsUpper(c)) c += 0x20;
	    *p++ = c;
	  }
	}
	fno->fattrib = dir[DIR_Attr];				/* Attribute */
	fno->fsize = LD_DWORD(dir+DIR_FileSize);	/* Size */
	fno->fdate = LD_WORD(dir+DIR_WrtDate);		/* Date */
	fno->ftime = LD_WORD(dir+DIR_WrtTime);		/* Time */
      }
      *p = 0;

#if _USE_LFN
	if (fno->lfname) {
		XCHAR *tp = fno->lfname;
		WCHAR w, *lfn;

	i = 0;
	if (dj->sect && dj->lfn_idx != 0xFFFF) {/* Get LFN if available */
	  lfn = dj->lfn;
	  while ((w = *lfn++) != 0) {			/* Get an LFN char */
#if !_LFN_UNICODE
	    w = ff_convert(w, 0);			/* Unicode -> OEM conversion */
	    if (!w) { i = 0; break; }		/* Could not convert, no LFN */
	    if (_DF1S && w >= 0x100)		/* Put 1st byte if it is a DBC */
	      tp[i++] = (XCHAR)(w >> 8);
#endif
	    if (i >= fno->lfsize - 1) { i = 0; break; }	/* Buffer overrun, no LFN */
	    tp[i++] = (XCHAR)w;
	  }
	}
	tp[i] = 0;	/* Terminator */
      }
#endif
    }
#endif /* _FS_MINIMIZE <= 1 */


  /*-----------------------------------------------------------------------*/
  /* Follow a file path                                                    */
  /*-----------------------------------------------------------------------*/

  /* FR_OK(0): successful, !=0: error code */
  static FRESULT follow_path (DIR *dj, const char *path) 	
    /* Directory object to return last directory and found object, Full-path string to find a file or directory */
    {
      FRESULT res;
      BYTE *dir, last;

      while (!_USE_LFN && *path == ' ') path++;	/* Skip leading spaces */
#if _FS_RPATH
      if (*path == '/' || *path == '\\') { /* There is a heading separator */
	path++;	dj->sclust = 0;		/* Strip it and start from the root dir */
      } else {							/* No heading saparator */
	dj->sclust = dj->fs->cdir;	/* Start from the current dir */
      }
#else
      if (*path == '/' || *path == '\\')	/* Strip heading separator if exist */
	path++;
      dj->sclust = 0;						/* Start from the root dir */
#endif

      if ((UINT)*path < ' ') {			/* Null path means the start directory itself */
	res = dir_seek(dj, 0);
	dj->dir = NULL;

      } 
      else {							/* Follow path */
	for (;;) {
	  res = create_name(dj, &path);	/* Get a segment */
	  if (res != FR_OK) break;
	  res = dir_find(dj);				/* Find it */
	  last = *(dj->fn+NS) & NS_LAST;
	  if (res != FR_OK) {				/* Could not find the object */
	    if (res == FR_NO_FILE && !last)
	      res = FR_NO_PATH;
	    break;
	  }
	  if (last) break;				/* Last segment match. Function completed. */
#if REALTIME
	  dir = get_dir_ptr(dj->fs, dj->dir);
#else
	  dir = dj->dir;					/* There is next segment. Follow the sub directory */
#endif
	  if (!(dir[DIR_Attr] & AM_DIR)) { /* Cannot follow because it is a file */
	    res = FR_NO_PATH; break;
	  }
	  dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
	}
      }

      return res;
    }

  /*-----------------------------------------------------------------------*/
  /* Load boot record and check if it is an FAT boot record                */
  /*-----------------------------------------------------------------------*/

  /* 0:The FAT boot record, 1:Valid boot record but not an FAT, 2:Not a boot record, 3:Error */
  static BYTE check_fs (FATFS *fs, DWORD sect) /* File system object, Sector# (lba) to check if it is an FAT boot record or not */
    {
      if (disk_read(fs->drive, fs->win, sect, 1) != RES_OK)	/* Load boot record */
	return 3;
      if (LD_WORD(&fs->win[BS_55AA]) != 0xAA55)		/* Check record signature (always placed at offset 510 even if the sector size is >512) */
	return 2;

      if ((LD_DWORD(&fs->win[BS_FilSysType]) & 0xFFFFFF) == 0x544146)	/* Check "FAT" string */
	return 0;
      if ((LD_DWORD(&fs->win[BS_FilSysType32]) & 0xFFFFFF) == 0x544146)
	return 0;

      return 1;
    }

  /*-----------------------------------------------------------------------*/
  /* Make sure that the file system is valid                               */
  /*-----------------------------------------------------------------------*/

  /* FR_OK(0): successful, !=0: any error occured */
  static FRESULT chk_mounted (const XCHAR **path,	/* Pointer to pointer to the path name (drive number) */
			     FATFS **rfs,		/* Pointer to pointer to the found file system object */
			     BYTE chk_wp)		/* !=0: Check media write protection for write access */
    {
      BYTE fmt, *tbl;
      UINT vol;
      DSTATUS stat;
      DWORD bsect, fsize, tsect, mclst;
      const XCHAR *p = *path;
      FATFS *fs;


      /* Get logical drive number from the path name */
      vol = p[0] - '0';				/* Is there a drive number? */
      if (vol <= 9 && p[1] == ':') {	/* Found a drive number, get and strip it */
	p += 2; *path = p;			/* Return pointer to the path name */
      } else {						/* No drive number is given */
#if _FS_RPATH
	vol = Drive;				/* Use current drive */
#else
	vol = 0;					/* Use drive 0 */
#endif
      }

      /* Check if the logical drive is valid or not */
      if (vol >= _DRIVES) 			/* Is the drive number valid? */
	return FR_INVALID_DRIVE;
      *rfs = fs = FatFs[vol];			/* Returen pointer to the corresponding file system object */
      if (!fs) return FR_NOT_ENABLED;	/* Is the file system object available? */

      ENTER_FF(fs);					/* Lock file system */

      if (fs->fs_type) {				/* If the logical drive has been mounted */
	stat = disk_status(fs->drive);
	if (!(stat & STA_NOINIT)) {	/* and the physical drive is kept initialized (has not been changed), */
#if !_FS_READONLY
	  if (chk_wp && (stat & STA_PROTECT))	/* Check write protection if needed */
	    return FR_WRITE_PROTECTED;
#endif
	  return FR_OK;			/* The file system object is valid */
	}
      }

      /* The logical drive must be mounted. Following code attempts to mount the volume */

      fs->fs_type = 0;					/* Clear the file system object */
      fs->drive = (BYTE)LD2PD(vol);		/* Bind the logical drive and a physical drive */
      stat = disk_initialize(fs->drive);	/* Initialize low level disk I/O layer */
      if (stat & STA_NOINIT)				/* Check if the drive is ready */
	return FR_NOT_READY;
#if _MAX_SS != 512						/* Get disk sector size if needed */
      if (disk_ioctl(fs->drive, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > _MAX_SS)
	return FR_NO_FILESYSTEM;
#endif
#if !_FS_READONLY
      if (chk_wp && (stat & STA_PROTECT))	/* Check disk write protection if needed */
	return FR_WRITE_PROTECTED;
#endif
      /* Search FAT partition on the drive */
      fmt = check_fs(fs, bsect = 0);		/* Check sector 0 as an SFD format */
      if (fmt == 1) {						/* Not an FAT boot record, it may be patitioned */
	/* Check a partition listed in top of the partition table */
	tbl = &fs->win[MBR_Table + LD2PT(vol) * 16];	/* Partition table */
	if (tbl[4]) {									/* Is the partition existing? */
	  bsect = LD_DWORD(&tbl[8]);					/* Partition offset in LBA */
	  fmt = check_fs(fs, bsect);					/* Check the partition */
	}
      }
      if (fmt == 3) return FR_DISK_ERR;
      if (fmt || LD_WORD(fs->win+BPB_BytsPerSec) != SS(fs))	/* No valid FAT patition is found */
	return FR_NO_FILESYSTEM;

      /* Initialize the file system object */
      fsize = LD_WORD(fs->win+BPB_FATSz16);				/* Number of sectors per FAT */
      if (!fsize) fsize = LD_DWORD(fs->win+BPB_FATSz32);
      fs->sects_fat = fsize;
      fs->n_fats = fs->win[BPB_NumFATs];					/* Number of FAT copies */
      fsize *= fs->n_fats;								/* (Number of sectors in FAT area) */
      fs->fatbase = bsect + LD_WORD(fs->win+BPB_RsvdSecCnt); /* FAT start sector (lba) */
      fs->csize = fs->win[BPB_SecPerClus];				/* Number of sectors per cluster */
      fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt);	     /* Nmuber of root directory entries */
      tsect = LD_WORD(fs->win+BPB_TotSec16);		     /* Number of sectors on the volume */
      if (!tsect) tsect = LD_DWORD(fs->win+BPB_TotSec32);
      fs->max_clust = mclst = (tsect				             /* Last cluster# + 1  (Number of clusters + 2) */
			       - LD_WORD(fs->win+BPB_RsvdSecCnt) - fsize - fs->n_rootdir / (SS(fs)/32)
			       ) / fs->csize + 2;

      fmt = FS_FAT12;										/* Determine the FAT sub type */
      if (mclst >= 0xFF7) fmt = FS_FAT16;					/* Number of clusters >= 0xFF5 */
      if (mclst >= 0xFFF7) fmt = FS_FAT32;				/* Number of clusters >= 0xFFF5 */

      if (fmt == FS_FAT32)
	fs->dirbase = LD_DWORD(fs->win+BPB_RootClus);	/* Root directory start cluster */
      else
	fs->dirbase = fs->fatbase + fsize;				/* Root directory start sector (lba) */
      fs->database = fs->fatbase + fsize + fs->n_rootdir / (SS(fs)/32);	/* Data start sector (lba) */

#if !_FS_READONLY
      /* Initialize allocation information */
      fs->free_clust = 0xFFFFFFFF;
      fs->wflag = 0;
      /* Get fsinfo if needed */
      if (fmt == FS_FAT32) {
	fs->fsi_flag = 0;
	fs->fsi_sector = bsect + LD_WORD(fs->win+BPB_FSInfo);
	if (disk_read(fs->drive, fs->win, fs->fsi_sector, 1) == RES_OK &&
	    LD_WORD(fs->win+BS_55AA) == 0xAA55 &&
	    LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252 &&
	    LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272) {
	  fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free);
	  fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count);
	}
      }
#endif
      fs->fs_type = fmt;		/* FAT sub-type */
      fs->winsect = 0;		/* Invalidate sector cache */
#if _FS_RPATH
      fs->cdir = 0;			/* Current directory (root dir) */
#endif
      fs->id = ++Fsid;		/* File system mount ID */

      return FR_OK;
    }

  /*-----------------------------------------------------------------------*/
  /* Check if the file/dir object is valid or not                          */
  /*-----------------------------------------------------------------------*/

  /* FR_OK(0): The object is valid, !=0: Invalid */
  static FRESULT validate (FATFS *fs, WORD id)	/* Member id of the target object to be checked */
    {
      if (!fs || !fs->fs_type || fs->id != id)
	return FR_INVALID_OBJECT;

      ENTER_FF(fs);		/* Lock file system */

      if (disk_status(fs->drive) & STA_NOINIT)
	return FR_NOT_READY;

      return FR_OK;
    }

  /*--------------------------------------------------------------------------

  Public Functions

  --------------------------------------------------------------------------*/
  /*-----------------------------------------------------------------------*/
  /* Mount/Unmount a Locical Drive                                         */
  /*-----------------------------------------------------------------------*/

  FRESULT f_mount (BYTE vol,   /* Logical drive number to be mounted/unmounted */
		   FATFS *fs)   /* Pointer to new file system object (NULL for unmount)*/
  {
    FATFS *rfs;
    DSTATUS stat;

    if (vol >= _DRIVES)				/* Check if the drive number is valid */
      return FR_INVALID_DRIVE;
    rfs = FatFs[vol];				/* Get current fs object */

    if (rfs) {
#if _FS_REENTRANT					/* Discard sync object of the current volume */
      if (!ff_del_syncobj(rfs->sobj)) return FR_INT_ERR;
#endif
      rfs->fs_type = 0;			/* Clear old fs object */
    }

    FatFs[vol] = fs;				/* Register new fs object */
    if (fs) {
      fs->fs_type = 0;			/* Clear new fs object */
#if _FS_REENTRANT					/* Create sync object for the new volume */
      if (!ff_cre_syncobj(vol, &fs->sobj)) return FR_INT_ERR;
#endif
      
#if REALTIME
      init_fatfs(fs);
#endif
      
      fs->drive = (BYTE)LD2PD(vol);		/* Bind the logical drive and a physical drive */
      stat = disk_initialize(fs->drive);	/* Initialize low level disk I/O layer */
      if (stat & STA_NOINIT)				/* Check if the drive is ready */
	return FR_NOT_READY;
    }

    return FR_OK;
  }

  /*-----------------------------------------------------------------------*/
  /* Open or Create a File                                                 */
  /*-----------------------------------------------------------------------*/

  FRESULT f_open (FIL *fp,			/* Pointer to the blank file object */
		  const XCHAR *path,	/* Pointer to the file name */
		  BYTE mode)			/* Access mode and file open mode flags */
  {
    FRESULT res;
    DIR dj;
    NAMEBUF(sfn, lfn);
    BYTE *dir;

    fp->fs = NULL;		/* Clear file object */
#if !_FS_READONLY
    mode &= (FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW);
    res = chk_mounted(&path, &dj.fs, (BYTE)(mode & (FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)));
#else
    mode &= FA_READ;
    res = chk_mounted(&path, &dj.fs, 0);
#endif
    if (res != FR_OK) 
      LEAVE_FF(dj.fs, res);
    INITBUF(dj, sfn, lfn);
    res = follow_path(&dj, path);	/* Follow the file path */
#if !_FS_READONLY
    /* Create or Open a file */
    if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
      DWORD ps, cl;

      if (res != FR_OK) {		                /* No file, create new */
	if (res == FR_NO_FILE)                    /* There is no file to open, create a new entry */
	  res = dir_register(&dj);
	if (res != FR_OK) LEAVE_FF(dj.fs, res);
	mode |= FA_CREATE_ALWAYS;
#if REALTIME
	dir = get_dir_ptr(dj.fs, dj.dir);
#else
	dir = dj.dir;                             /* Created entry (SFN entry) */
#endif
      }
      else {					/* Any object is already existing */
	if (mode & FA_CREATE_NEW)			/* Cannot create new */
	  LEAVE_FF(dj.fs, FR_EXIST);
#if REALTIME
	dir = get_dir_ptr(dj.fs, dj.dir);
#else
	dir = dj.dir;
#endif
	if (!dir || (dir[DIR_Attr] & (AM_RDO | AM_DIR)))	/* Cannot overwrite it (R/O or DIR) */
	  LEAVE_FF(dj.fs, FR_DENIED);
	if (mode & FA_CREATE_ALWAYS) {		/* Resize it to zero on overwrite mode */
	  cl = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);	/* Get start cluster */
	  ST_WORD(dir+DIR_FstClusHI, 0);	/* cluster = 0 */
	  ST_WORD(dir+DIR_FstClusLO, 0);
	  ST_DWORD(dir+DIR_FileSize, 0);	/* size = 0 */
	  dj.fs->wflag = 1;
	  ps = dj.fs->winsect;			/* Remove the cluster chain */
	  if (cl) {
	    res = remove_chain(dj.fs, cl);
	    if (res) LEAVE_FF(dj.fs, res);
	    dj.fs->last_clust = cl - 1;	/* Reuse the cluster hole */
	  }
	  res = move_window(dj.fs, ps);
	  if (res != FR_OK) LEAVE_FF(dj.fs, res);
	}
      }
      if (mode & FA_CREATE_ALWAYS) {
#if REALTIME
	dir = get_dir_ptr(dj.fs, dir);
#endif
	dir[DIR_Attr] = 0;					/* Reset attribute */
	ps = get_fattime();
	ST_DWORD(dir+DIR_CrtTime, ps);		/* Created time */
	dj.fs->wflag = 1;
	mode |= FA__WRITTEN;				/* Set file changed flag */
      }
    }
    /* Open an existing file */
    else {
#endif /* !_FS_READONLY */
      if (res != FR_OK) LEAVE_FF(dj.fs, res);	/* Follow failed */
#if REALTIME
      dir = get_dir_ptr(dj.fs, dj.dir);
#else
      dir = dj.dir;
#endif
      if (!dir || (dir[DIR_Attr] & AM_DIR))	/* It is a directory */
	LEAVE_FF(dj.fs, FR_NO_FILE);
#if !_FS_READONLY
      if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */
	LEAVE_FF(dj.fs, FR_DENIED);
    }
    fp->dir_sect = dj.fs->winsect;		/* Pointer to the directory entry */
    fp->dir_ptr = dj.dir;
#endif
    fp->flag = mode;					/* File access mode */
    fp->org_clust =						/* File start cluster */
      ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
    fp->fsize = LD_DWORD(dir+DIR_FileSize);	/* File size */
    fp->fptr = 0; fp->csect = 255;		/* File pointer */
    fp->dsect = 0;
    fp->fs = dj.fs; fp->id = dj.fs->id;	/* Owner file system object of the file */

#if REALTIME
    if (fp && fp->fs && fp->fs->buffer_used) if (sync_win_buffers(fp->fs) != RES_OK) return FR_DISK_ERR;
    if (fp && fp->fs) move_window(fp->fs, 0);
#endif

    LEAVE_FF(dj.fs, FR_OK);
  }

  /*-----------------------------------------------------------------------*/
  /* Read File                                                             */
  /*-----------------------------------------------------------------------*/

  FRESULT f_read (FIL *fp, 		/* Pointer to the file object */
		  void *buff,		/* Pointer to data buffer */
		  UINT btr,		/* Number of bytes to read */
		  UINT *br)		/* Pointer to number of bytes read */
  {
    FRESULT res;
    DWORD clst, sect, remain;
    UINT rcnt, cc;
    BYTE *rbuff = buff;

    *br = 0;	/* Initialize bytes read */

    res = validate(fp->fs, fp->id);					/* Check validity of the object */
    if (res != FR_OK) LEAVE_FF(fp->fs, res);
    if (fp->flag & FA__ERROR)						/* Check abort flag */
      LEAVE_FF(fp->fs, FR_INT_ERR);
    if (!(fp->flag & FA_READ)) 						/* Check access mode */
      LEAVE_FF(fp->fs, FR_DENIED);
    remain = fp->fsize - fp->fptr;
    if (btr > remain) btr = (UINT)remain;			/* Truncate btr by remaining bytes */

    for ( ;  btr;									/* Repeat until all data transferred */
	  rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
      if ((fp->fptr % SS(fp->fs)) == 0) {			/* On the sector boundary? */
	if (fp->csect >= fp->fs->csize) {		/* On the cluster boundary? */
	  clst = (fp->fptr == 0) ?			/* On the top of the file? */
	    fp->org_clust : get_fat(fp->fs, fp->curr_clust);
	  if (clst <= 1) ABORT(fp->fs, FR_INT_ERR);
	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
	  fp->curr_clust = clst;				/* Update current cluster */
	  fp->csect = 0;						/* Reset sector offset in the cluster */
	}
	sect = clust2sect(fp->fs, fp->curr_clust);	/* Get current sector */
	if (!sect) ABORT(fp->fs, FR_INT_ERR);
	sect += fp->csect;
	cc = btr / SS(fp->fs);					/* When remaining bytes >= sector size, */
	if (cc) {								/* Read maximum contiguous sectors directly */
	  if (fp->csect + cc > fp->fs->csize)	/* Clip at cluster boundary */
	    cc = fp->fs->csize - fp->csect;
	  if (disk_read(fp->fs->drive, rbuff, sect, (BYTE)cc) != RES_OK)
	    ABORT(fp->fs, FR_DISK_ERR);
#if !_FS_READONLY && _FS_MINIMIZE <= 2
#if _FS_TINY
	  if (fp->fs->wflag && fp->fs->winsect - sect < cc)		/* Replace one of the read sectors with cached data if it contains a dirty sector */
	    memcpy(rbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), fp->fs->win, SS(fp->fs));
#else
	  if ((fp->flag & FA__DIRTY) && fp->dsect - sect < cc)	/* Replace one of the read sectors with cached data if it contains a dirty sector */
	    memcpy(rbuff + ((fp->dsect - sect) * SS(fp->fs)), fp->buf, SS(fp->fs));
#endif
#endif
	  fp->csect += (BYTE)cc;				/* Next sector address in the cluster */
	  rcnt = SS(fp->fs) * cc;				/* Number of bytes transferred */
	  continue;
	}
#if !_FS_TINY
#if !_FS_READONLY
	if (fp->flag & FA__DIRTY) {			/* Write sector I/O buffer if needed */
	  if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
	    ABORT(fp->fs, FR_DISK_ERR);
	  fp->flag &= ~FA__DIRTY;
	}
#endif
	if (fp->dsect != sect) {			/* Fill sector buffer with file data */
	  if (disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK)
	    ABORT(fp->fs, FR_DISK_ERR);
	}
#endif
	fp->dsect = sect;
	fp->csect++;							/* Next sector address in the cluster */
      }
      rcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs));	/* Get partial sector data from sector buffer */
      if (rcnt > btr) rcnt = btr;
#if _FS_TINY
      if (move_window(fp->fs, fp->dsect))			/* Move sector window */
	ABORT(fp->fs, FR_DISK_ERR);
      memcpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */
#else
      memcpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */
#endif
    }

    LEAVE_FF(fp->fs, FR_OK);
  }

#if !_FS_READONLY
  /*-----------------------------------------------------------------------*/
  /* Write File                                                            */
  /*-----------------------------------------------------------------------*/

  FRESULT f_write (FIL *fp,			/* Pointer to the file object */
		   const void *buff,	/* Pointer to the data to be written */
		   UINT btw,			/* Number of bytes to write */
		   UINT *bw)			/* Pointer to number of bytes written */
  {
    FRESULT res;
    DWORD clst, sect;
    UINT wcnt, cc;
    const BYTE *wbuff = buff;


    *bw = 0;	/* Initialize bytes written */

    res = validate(fp->fs, fp->id);					/* Check validity of the object */
    if (res != FR_OK) LEAVE_FF(fp->fs, res);
    if (fp->flag & FA__ERROR)						/* Check abort flag */
      LEAVE_FF(fp->fs, FR_INT_ERR);
    if (!(fp->flag & FA_WRITE))						/* Check access mode */
      LEAVE_FF(fp->fs, FR_DENIED);
    if (fp->fsize + btw < fp->fsize) btw = 0;		/* File size cannot reach 4GB */

    for ( ;  btw;									/* Repeat until all data transferred */
	  wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) {
      if ((fp->fptr % SS(fp->fs)) == 0) {			/* On the sector boundary? */
	if (fp->csect >= fp->fs->csize) {		/* On the cluster boundary? */
	  if (fp->fptr == 0) {				/* On the top of the file? */
	    clst = fp->org_clust;			/* Follow from the origin */
	    if (clst == 0)					/* When there is no cluster chain, */
	      fp->org_clust = clst = create_chain(fp->fs, 0);	/* Create a new cluster chain */
	  } else {							/* Middle or end of the file */
	    clst = create_chain(fp->fs, fp->curr_clust);			/* Follow or streach cluster chain */
	  }
	  if (clst == 0) break;				/* Could not allocate a new cluster (disk full) */
	  if (clst == 1) ABORT(fp->fs, FR_INT_ERR);
	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
	  fp->curr_clust = clst;				/* Update current cluster */
	  fp->csect = 0;						/* Reset sector address in the cluster */
	}
#if _FS_TINY
	if (fp->fs->winsect == fp->dsect && move_window(fp->fs, 0))	/* Write back data buffer prior to following direct transfer */
	  ABORT(fp->fs, FR_DISK_ERR);
#else
	if (fp->flag & FA__DIRTY) {		/* Write back data buffer prior to following direct transfer */
	  if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
	    ABORT(fp->fs, FR_DISK_ERR);
	  fp->flag &= ~FA__DIRTY;
	}
#endif
	sect = clust2sect(fp->fs, fp->curr_clust);	/* Get current sector */
	if (!sect) ABORT(fp->fs, FR_INT_ERR);
	sect += fp->csect;
	cc = btw / SS(fp->fs);					/* When remaining bytes >= sector size, */
	if (cc) {								/* Write maximum contiguous sectors directly */
	  if (fp->csect + cc > fp->fs->csize)	/* Clip at cluster boundary */
	    cc = fp->fs->csize - fp->csect;
	  if (disk_write(fp->fs->drive, wbuff, sect, (BYTE)cc) != RES_OK)
	    ABORT(fp->fs, FR_DISK_ERR);
#if _FS_TINY
	  if (fp->fs->winsect - sect < cc) {  /* Refill sector cache if it gets dirty by the direct write */
	    memcpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs));
	    fp->fs->wflag = 0;
	  }
#else
	  if (fp->dsect - sect < cc) {  /* Refill sector cache if it gets dirty by the direct write */
	    memcpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs));
	    fp->flag &= ~FA__DIRTY;
	  }
#endif
	  fp->csect += (BYTE)cc;				/* Next sector address in the cluster */
	  wcnt = SS(fp->fs) * cc;				/* Number of bytes transferred */
	  continue;
	}
#if _FS_TINY
	if (fp->fptr >= fp->fsize) {			/* Avoid silly buffer filling at growing edge */
	  if (move_window(fp->fs, 0)) ABORT(fp->fs, FR_DISK_ERR);
	  fp->fs->winsect = sect;
	}
#else
	if (fp->dsect != sect) {				/* Fill sector buffer with file data */
	  if (fp->fptr < fp->fsize){
	    if (disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK)
	      ABORT(fp->fs, FR_DISK_ERR);
	  }
	}
#endif
	fp->dsect = sect;
	fp->csect++;							/* Next sector address in the cluster */
      }
      wcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs));	/* Put partial sector into file I/O buffer */
      if (wcnt > btw) wcnt = btw;
#if _FS_TINY
      if (move_window(fp->fs, fp->dsect))			/* Move sector window */
	ABORT(fp->fs, FR_DISK_ERR);
      memcpy(&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt);	/* Fit partial sector */
      fp->fs->wflag = 1;
#else
      memcpy(&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt);	/* Fit partial sector */
      fp->flag |= FA__DIRTY;
#endif
    }

    if (fp->fptr > fp->fsize) fp->fsize = fp->fptr;	/* Update file size if needed */
    fp->flag |= FA__WRITTEN;						/* Set file changed flag */

    LEAVE_FF(fp->fs, FR_OK);
  }




  /*-----------------------------------------------------------------------*/
  /* Synchronize the File Object                                           */
  /*-----------------------------------------------------------------------*/

  FRESULT f_sync (FIL *fp)	/* Pointer to the file object */
  {
    FRESULT res;
    DWORD tim;
    BYTE *dir;


    res = validate(fp->fs, fp->id);		/* Check validity of the object */
    if (res == FR_OK) {
      if (fp->flag & FA__WRITTEN) {	/* Has the file been written? */
#if !_FS_TINY	/* Write-back dirty buffer */
	if (fp->flag & FA__DIRTY) {
	  if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
	    LEAVE_FF(fp->fs, FR_DISK_ERR);
	  fp->flag &= ~FA__DIRTY;
	}
#endif

	/* Update the directory entry */
	res = move_window(fp->fs, fp->dir_sect);
	if (res == FR_OK) {
#if REALTIME
	  dir = get_dir_ptr(fp->fs, fp->dir_ptr);
#else
	  dir = fp->dir_ptr;
#endif
	  dir[DIR_Attr] |= AM_ARC;					/* Set archive bit */
	  ST_DWORD(dir+DIR_FileSize, fp->fsize);		/* Update file size */
	  ST_WORD(dir+DIR_FstClusLO, fp->org_clust);	/* Update start cluster */
	  ST_WORD(dir+DIR_FstClusHI, fp->org_clust >> 16);
	  tim = get_fattime();				/* Updated time */
	  ST_DWORD(dir+DIR_WrtTime, tim);
	  fp->flag &= ~FA__WRITTEN;
	  fp->fs->wflag = 1;
	  res = sync(fp->fs);
	}
      }
    }

#if REALTIME
    if (fp && fp->fs && fp->fs->buffer_used) if (sync_win_buffers(fp->fs) != RES_OK) return FR_DISK_ERR;
    if (fp && fp->fs) move_window(fp->fs, 0);
#endif

    LEAVE_FF(fp->fs, res);
  }

#endif /* !_FS_READONLY */

  /*-----------------------------------------------------------------------*/
  /* Close File                                                            */
  /*-----------------------------------------------------------------------*/

  FRESULT f_close (FIL *fp)		/* Pointer to the file object to be closed */
  {
    FRESULT res;

#if _FS_READONLY
    FATFS *fs = fp->fs;
    res = validate(fp->fs, fp->id);
    if (res == FR_OK) fp->fs = NULL;
    LEAVE_FF(fs, res);
#else
    res = f_sync(fp);

#if REALTIME
    if (fp && fp->fs && fp->fs->buffer_used) if (sync_win_buffers(fp->fs) != RES_OK) return FR_DISK_ERR;
    if (fp && fp->fs) move_window(fp->fs, 0);
#endif

    if (res == FR_OK) fp->fs = NULL;
    return res;
#endif
  }

  /*-----------------------------------------------------------------------*/
  /* Change Current Drive/Directory                                        */
  /*-----------------------------------------------------------------------*/

#if _FS_RPATH
  FRESULT f_chdrive (BYTE drv)		/* Drive number */
  {
    if (drv >= _DRIVES) return FR_INVALID_DRIVE;
  
    Drive = drv;
  
    return FR_OK;
  }

  FRESULT f_chdir (
		   const XCHAR *path	/* Pointer to the directory path */
		   )
  {
    FRESULT res;
    DIR dj;
    NAMEBUF(sfn, lfn);
    BYTE *dir;


    res = chk_mounted(&path, &dj.fs, 0);
    if (res == FR_OK) {
      INITBUF(dj, sfn, lfn);
      res = follow_path(&dj, path);		/* Follow the file path */
      if (res == FR_OK) {					/* Follow completed */
#if REALTIME
	dir = get_dir_ptr(dj.fs, dj.dir);
#else
	dir = dj.dir;					/* Pointer to the entry */
#endif
	if (!dir) {
	  dj.fs->cdir = 0;			/* No entry (root dir) */
	} else {
	  if (dir[DIR_Attr] & AM_DIR)	/* Reached to the dir */
	    dj.fs->cdir = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
	  else
	    res = FR_NO_PATH;		/* Could not reach the dir (it is a file) */
	}
      }
      if (res == FR_NO_FILE) res = FR_NO_PATH;
    }

    LEAVE_FF(dj.fs, res);
  }

#endif


#if _FS_MINIMIZE <= 2
  /*-----------------------------------------------------------------------*/
  /* Seek File R/W Pointer                                                 */
  /*-----------------------------------------------------------------------*/

  FRESULT f_lseek (FIL *fp, LONG ofs)		/* File pointer from top of file */
  {
    FRESULT res;
    DWORD clst, bcs, nsect, ifptr;


    res = validate(fp->fs, fp->id);		/* Check validity of the object */
    if (res != FR_OK) LEAVE_FF(fp->fs, res);
    if (fp->flag & FA__ERROR)			/* Check abort flag */
      LEAVE_FF(fp->fs, FR_INT_ERR);
    if (ofs > fp->fsize					/* In read-only mode, clip offset with the file size */
#if !_FS_READONLY
	&& !(fp->flag & FA_WRITE)
#endif
	) 
      ofs = fp->fsize;

    ifptr = fp->fptr;
    fp->fptr = nsect = 0; fp->csect = 255;
    if (ofs > 0) {
      bcs = (DWORD)fp->fs->csize * SS(fp->fs);	/* Cluster size (byte) */
      if (ifptr > 0 &&
	  (ofs - 1) / bcs >= (ifptr - 1) / bcs) {	/* When seek to same or following cluster, */
	fp->fptr = (ifptr - 1) & ~(bcs - 1);	/* start from the current cluster */
	ofs -= fp->fptr;
	clst = fp->curr_clust;
      } 
      else {									/* When seek to back cluster, */
	clst = fp->org_clust;					/* start from the first cluster */
#if !_FS_READONLY
	if (clst == 0) {						/* If no cluster chain, create a new chain */
	  clst = create_chain(fp->fs, 0);
	  if (clst == 1) ABORT(fp->fs, FR_INT_ERR);
	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
	  fp->org_clust = clst;
	}
#endif
	fp->curr_clust = clst;
      }
      if (clst != 0) {
	while (ofs > bcs) {						/* Cluster following loop */
#if !_FS_READONLY
	  if (fp->flag & FA_WRITE) {			/* Check if in write mode or not */
	    clst = create_chain(fp->fs, clst);	/* Force streached if in write mode */
	    if (clst == 0) {				/* When disk gets full, clip file size */
	      ofs = bcs; break;
	    }
	  } else
#endif
	    clst = get_fat(fp->fs, clst);	/* Follow cluster chain if not in write mode */
	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
	  if (clst <= 1 || clst >= fp->fs->max_clust) ABORT(fp->fs, FR_INT_ERR);
	  fp->curr_clust = clst;
	  fp->fptr += bcs;
	  ofs -= bcs;
	}
	fp->fptr += ofs;
	fp->csect = (BYTE)(ofs / SS(fp->fs));	/* Sector offset in the cluster */
	if (ofs % SS(fp->fs)) {
	  nsect = clust2sect(fp->fs, clst);	/* Current sector */
	  if (!nsect) ABORT(fp->fs, FR_INT_ERR);
	  nsect += fp->csect;
	  fp->csect++;
	}
      }
    }
    if (fp->fptr % SS(fp->fs) && nsect != fp->dsect) {
#if !_FS_TINY
#if !_FS_READONLY
      if (fp->flag & FA__DIRTY) {			/* Write-back dirty buffer if needed */
	if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
	  ABORT(fp->fs, FR_DISK_ERR);
	fp->flag &= ~FA__DIRTY;
      }
#endif
      if (disk_read(fp->fs->drive, fp->buf, nsect, 1) != RES_OK)
	ABORT(fp->fs, FR_DISK_ERR);
#endif
      fp->dsect = nsect;
    }
#if !_FS_READONLY
    if (fp->fptr > fp->fsize) {			/* Set changed flag if the file size is extended */
      fp->fsize = fp->fptr;
      fp->flag |= FA__WRITTEN;
    }
#endif

    LEAVE_FF(fp->fs, res);
  }


#if _FS_MINIMIZE <= 1
  /*-----------------------------------------------------------------------*/
  /* Create a Directroy Object                                             */
  /*-----------------------------------------------------------------------*/

  FRESULT f_opendir (DIR *dj,	/* Pointer to directory object to create */
		     const XCHAR *path)	/* Pointer to the directory path */
  {
    FRESULT res;
    NAMEBUF(sfn, lfn);
    BYTE *dir;

    res = chk_mounted(&path, &dj->fs, 0);
    if (res == FR_OK) {
      INITBUF((*dj), sfn, lfn);
      res = follow_path(dj, path);			/* Follow the path to the directory */
      if (res == FR_OK) {						/* Follow completed */
#if REALTIME
	dir = get_dir_ptr(dj->fs, dj->dir);
#else
	dir = dj->dir;
#endif
	if (dir) {							/* It is not the root dir */
	  if (dir[DIR_Attr] & AM_DIR) {	/* The object is a directory */
	    dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
	  } else {						/* The object is not a directory */
	    res = FR_NO_PATH;
	  }
	}
	if (res == FR_OK) {
	  dj->id = dj->fs->id;
	  res = dir_seek(dj, 0);			/* Rewind dir */
	}
      }
      if (res == FR_NO_FILE) res = FR_NO_PATH;
    }

    LEAVE_FF(dj->fs, res);
  }


  /*-----------------------------------------------------------------------*/
  /* Read Directory Entry in Sequense                                      */
  /*-----------------------------------------------------------------------*/

  FRESULT f_readdir (DIR *dj,			/* Pointer to the open directory object */
		     FILINFO *fno)		/* Pointer to file information to return */
  {
    FRESULT res;
    NAMEBUF(sfn, lfn);


    res = validate(dj->fs, dj->id);			/* Check validity of the object */
    if (res == FR_OK) {
      INITBUF((*dj), sfn, lfn);
      if (!fno) {
	res = dir_seek(dj, 0);
      } else {
	res = dir_read(dj);
	if (res == FR_NO_FILE) {
	  dj->sect = 0;
	  res = FR_OK;
	}
	if (res == FR_OK) {				/* A valid entry is found */
	  get_fileinfo(dj, fno);		/* Get the object information */
	  res = dir_next(dj, FALSE);	/* Increment index for next */
	  if (res == FR_NO_FILE) {
	    dj->sect = 0;
	    res = FR_OK;
	  }
	}
      }
    }

    LEAVE_FF(dj->fs, res);
  }



#if _FS_MINIMIZE == 0
  /*-----------------------------------------------------------------------*/
  /* Get File Status                                                       */
  /*-----------------------------------------------------------------------*/

  FRESULT f_stat (const XCHAR *path,	/* Pointer to the file path */
		  FILINFO *fno)		/* Pointer to file information to return */
  {
    FRESULT res;
    DIR dj;
    NAMEBUF(sfn, lfn);


    res = chk_mounted(&path, &dj.fs, 0);
    if (res == FR_OK) {
      INITBUF(dj, sfn, lfn);
      res = follow_path(&dj, path);	/* Follow the file path */
      if (res == FR_OK) {				/* Follwo completed */
#if REALTIME
	if (get_dir_ptr(dj.fs, dj.dir))
#else
	  if (dj.dir)	/* Found an object */
#endif
	    get_fileinfo(&dj, fno);
	  else		/* It is root dir */
	    res = FR_INVALID_NAME;
      }
    }

    LEAVE_FF(dj.fs, res);
  }

#if !_FS_READONLY
  /*-----------------------------------------------------------------------*/
  /* Get Number of Free Clusters                                           */
  /*-----------------------------------------------------------------------*/

  FRESULT f_getfree (
		     const XCHAR *path,	/* Pointer to the logical drive number (root dir) */
		     DWORD *nclst,		/* Pointer to the variable to return number of free clusters */
		     FATFS **fatfs		/* Pointer to pointer to corresponding file system object to return */
		     )
  {
    FRESULT res;
    DWORD n, clst, sect, stat;
    UINT i;
    BYTE fat, *p;


    /* Get drive number */
    res = chk_mounted(&path, fatfs, 0);
    if (res != FR_OK) LEAVE_FF(*fatfs, res);

    /* If number of free cluster is valid, return it without cluster scan. */
    if ((*fatfs)->free_clust <= (*fatfs)->max_clust - 2) {
      *nclst = (*fatfs)->free_clust;
      LEAVE_FF(*fatfs, FR_OK);
    }

    /* Get number of free clusters */
    fat = (*fatfs)->fs_type;
    n = 0;
    if (fat == FS_FAT12) {
      clst = 2;
      do {
	stat = get_fat(*fatfs, clst);
	if (stat == 0xFFFFFFFF) LEAVE_FF(*fatfs, FR_DISK_ERR);
	if (stat == 1) LEAVE_FF(*fatfs, FR_INT_ERR);
	if (stat == 0) n++;
      } while (++clst < (*fatfs)->max_clust);
    } 
    else {
      clst = (*fatfs)->max_clust;
      sect = (*fatfs)->fatbase;
      i = 0; p = 0;
      do {
	if (!i) {
	  res = move_window(*fatfs, sect++);
	  if (res != FR_OK)
	    LEAVE_FF(*fatfs, res);
	  p = (*fatfs)->win;
	  i = SS(*fatfs);
	}
	if (fat == FS_FAT16) {
	  if (LD_WORD(p) == 0) n++;
	  p += 2; i -= 2;
	} 
	else {
	  if ((LD_DWORD(p) & 0x0FFFFFFF) == 0) n++;
	  p += 4; i -= 4;
	}
      } while (--clst);
    }
    (*fatfs)->free_clust = n;
    if (fat == FS_FAT32) (*fatfs)->fsi_flag = 1;
    *nclst = n;

    LEAVE_FF(*fatfs, FR_OK);
  }


  /*-----------------------------------------------------------------------*/
  /* Truncate File                                                         */
  /*-----------------------------------------------------------------------*/

  FRESULT f_truncate (
		      FIL *fp		/* Pointer to the file object */
		      )
  {
    FRESULT res;
    DWORD ncl;


    res = validate(fp->fs, fp->id);		/* Check validity of the object */
    if (res != FR_OK) LEAVE_FF(fp->fs, res);
    if (fp->flag & FA__ERROR)			/* Check abort flag */
      LEAVE_FF(fp->fs, FR_INT_ERR);
    if (!(fp->flag & FA_WRITE))			/* Check access mode */
      LEAVE_FF(fp->fs, FR_DENIED);

    if (fp->fsize > fp->fptr) {
      fp->fsize = fp->fptr;	/* Set file size to current R/W point */
      fp->flag |= FA__WRITTEN;
      if (fp->fptr == 0) {	/* When set file size to zero, remove entire cluster chain */
	res = remove_chain(fp->fs, fp->org_clust);
	fp->org_clust = 0;
      } else {				/* When truncate a part of the file, remove remaining clusters */
	ncl = get_fat(fp->fs, fp->curr_clust);
	res = FR_OK;
	if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR;
	if (ncl == 1) res = FR_INT_ERR;
	if (res == FR_OK && ncl < fp->fs->max_clust) {
	  res = put_fat(fp->fs, fp->curr_clust, 0x0FFFFFFF);
	  if (res == FR_OK) res = remove_chain(fp->fs, ncl);
	}
      }
    }
    if (res != FR_OK) fp->flag |= FA__ERROR;

    LEAVE_FF(fp->fs, res);
  }

  /*-----------------------------------------------------------------------*/
  /* Delete a File or Directory                                            */
  /*-----------------------------------------------------------------------*/

  FRESULT f_unlink (const XCHAR *path)		/* Pointer to the file or directory path */
  {
    FRESULT res;
    DIR dj, sdj;
    NAMEBUF(sfn, lfn);
    BYTE *dir;
    DWORD dclst;


    res = chk_mounted(&path, &dj.fs, 1);
    if (res != FR_OK) LEAVE_FF(dj.fs, res);

    INITBUF(dj, sfn, lfn);
    res = follow_path(&dj, path);			/* Follow the file path */
    if (_FS_RPATH && res == FR_OK && (dj.fn[NS] & NS_DOT))
      res = FR_INVALID_NAME;
    if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */

#if REALTIME
    dir = get_dir_ptr(dj.fs, dj.dir);
#else
    dir = dj.dir;
#endif
    if (!dir)								/* Is it the root directory? */
      LEAVE_FF(dj.fs, FR_INVALID_NAME);
    if (dir[DIR_Attr] & AM_RDO)				/* Is it a R/O object? */
      LEAVE_FF(dj.fs, FR_DENIED);
    dclst = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);

    if (dir[DIR_Attr] & AM_DIR) {			/* It is a sub-directory */
      if (dclst < 2) LEAVE_FF(dj.fs, FR_INT_ERR);
      memcpy(&sdj, &dj, sizeof(DIR));		/* Check if the sub-dir is empty or not */
      sdj.sclust = dclst;
      res = dir_seek(&sdj, 2);
      if (res != FR_OK) LEAVE_FF(dj.fs, res);
      res = dir_read(&sdj);
      if (res == FR_OK) res = FR_DENIED;	/* Not empty sub-dir */
      if (res != FR_NO_FILE) LEAVE_FF(dj.fs, res);
    }

    res = dir_remove(&dj);					/* Remove directory entry */
    if (res == FR_OK) {
      if (dclst)
	res = remove_chain(dj.fs, dclst);	/* Remove the cluster chain */
      if (res == FR_OK) res = sync(dj.fs);
    }

#if REALTIME
    if (dj.fs && dj.fs->buffer_used) if (sync_win_buffers(dj.fs) != RES_OK) return FR_DISK_ERR;
    if (dj.fs) move_window(dj.fs, 0);
#endif

    LEAVE_FF(dj.fs, res);
  }

  /*-----------------------------------------------------------------------*/
  /* Create a Directory                                                    */
  /*-----------------------------------------------------------------------*/

  FRESULT f_mkdir (const XCHAR *path)	/* Pointer to the directory path */
  {
    FRESULT res;
    DIR dj;
    NAMEBUF(sfn, lfn);
    BYTE *dir, n;
    DWORD dsect, dclst, pclst, tim;

    res = chk_mounted(&path, &dj.fs, 1);
    if (res != FR_OK) LEAVE_FF(dj.fs, res);

    INITBUF(dj, sfn, lfn);
    res = follow_path(&dj, path);			/* Follow the file path */
    if (res == FR_OK) res = FR_EXIST;		/* Any file or directory is already existing */
    if (_FS_RPATH && res == FR_NO_FILE && (dj.fn[NS] & NS_DOT))
      res = FR_INVALID_NAME;
    if (res != FR_NO_FILE)					/* Any error occured */
      LEAVE_FF(dj.fs, res);

    dclst = create_chain(dj.fs, 0);			/* Allocate a new cluster for new directory table */
    res = FR_OK;
    if (dclst == 0) res = FR_DENIED;
    if (dclst == 1) res = FR_INT_ERR;
    if (dclst == 0xFFFFFFFF) res = FR_DISK_ERR;
    if (res == FR_OK)
      res = move_window(dj.fs, 0);
    if (res != FR_OK) LEAVE_FF(dj.fs, res);
    dsect = clust2sect(dj.fs, dclst);

    dir = dj.fs->win;						/* Initialize the new directory table */
    memset(dir, 0, SS(dj.fs));
    memset(dir+DIR_Name, ' ', 8+3);		/* Create "." entry */
    dir[DIR_Name] = '.';
    dir[DIR_Attr] = AM_DIR;
    tim = get_fattime();
    ST_DWORD(dir+DIR_WrtTime, tim);
    ST_WORD(dir+DIR_FstClusLO, dclst);
    ST_WORD(dir+DIR_FstClusHI, dclst >> 16);
    memcpy(dir+32, dir, 32); 			/* Create ".." entry */
    dir[33] = '.';
    pclst = dj.sclust;
    if (dj.fs->fs_type == FS_FAT32 && pclst == dj.fs->dirbase)
      pclst = 0;
    ST_WORD(dir+32+DIR_FstClusLO, pclst);
    ST_WORD(dir+32+DIR_FstClusHI, pclst >> 16);
    for (n = 0; n < dj.fs->csize; n++) {	/* Write dot entries and clear left sectors */
      dj.fs->winsect = dsect++;
      dj.fs->wflag = 1;
      res = move_window(dj.fs, 0);
      if (res) LEAVE_FF(dj.fs, res);
#if REALTIME
      dir = dj.fs->win;
#endif
      memset(dir, 0, SS(dj.fs));
    }

    res = dir_register(&dj);
    if (res != FR_OK) {
      remove_chain(dj.fs, dclst);
    } else {
#if REALTIME
      dir = get_dir_ptr(dj.fs, dj.dir);
#else
      dir = dj.dir;
#endif
      dir[DIR_Attr] = AM_DIR;					/* Attribute */
      ST_DWORD(dir+DIR_WrtTime, tim);			/* Crated time */
      ST_WORD(dir+DIR_FstClusLO, dclst);		/* Table start cluster */
      ST_WORD(dir+DIR_FstClusHI, dclst >> 16);
      dj.fs->wflag = 1;
      res = sync(dj.fs);
    }

#if REALTIME
    if (dj.fs && dj.fs->buffer_used) if (sync_win_buffers(dj.fs) != RES_OK) return FR_DISK_ERR;
    if (dj.fs) move_window(dj.fs, 0);
#endif

    LEAVE_FF(dj.fs, res);
  }




  /*-----------------------------------------------------------------------*/
  /* Change File Attribute                                                 */
  /*-----------------------------------------------------------------------*/

  FRESULT f_chmod (const XCHAR *path,	/* Pointer to the file path */
		   BYTE value,			/* Attribute bits */
		   BYTE mask)			/* Attribute mask to change */
  {
    FRESULT res;
    DIR dj;
    NAMEBUF(sfn, lfn);
    BYTE *dir;

    res = chk_mounted(&path, &dj.fs, 1);
    if (res == FR_OK) {
      INITBUF(dj, sfn, lfn);
      res = follow_path(&dj, path);		/* Follow the file path */
      if (_FS_RPATH && res == FR_OK && (dj.fn[NS] & NS_DOT))
	res = FR_INVALID_NAME;
      if (res == FR_OK) {
#if REALTIME
	dir = get_dir_ptr(dj.fs, dj.dir);
#else
	dir = dj.dir;
#endif

	if (!dir) {						/* Is it a root directory? */
	  res = FR_INVALID_NAME;
	} 
	else {						/* File or sub directory */
	  mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC;	/* Valid attribute mask */
	  dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask);	/* Apply attribute change */
	  dj.fs->wflag = 1;
	  res = sync(dj.fs);
	}
      }
    }

#if REALTIME
    if (dj.fs && dj.fs->buffer_used) if (sync_win_buffers(dj.fs) != RES_OK) return FR_DISK_ERR;
    if (dj.fs) move_window(dj.fs, 0);
#endif

    LEAVE_FF(dj.fs, res);
  }

  /*-----------------------------------------------------------------------*/
  /* Change Timestamp                                                      */
  /*-----------------------------------------------------------------------*/

  FRESULT f_utime (const XCHAR *path,	/* Pointer to the file/directory name */
		   const FILINFO *fno)	/* Pointer to the timestamp to be set */
  {
    FRESULT res;
    DIR dj;
    NAMEBUF(sfn, lfn);
    BYTE *dir;


    res = chk_mounted(&path, &dj.fs, 1);
    if (res == FR_OK) {
      INITBUF(dj, sfn, lfn);
      res = follow_path(&dj, path);	/* Follow the file path */
      if (_FS_RPATH && res == FR_OK && (dj.fn[11] & NS_DOT))
	res = FR_INVALID_NAME;
      if (res == FR_OK) {
#if REALTIME
	dir = get_dir_ptr(dj.fs, dj.dir);
#else
	dir = dj.dir;
#endif
	if (!dir) {				/* Root directory */
	  res = FR_INVALID_NAME;
	} else {				/* File or sub-directory */
	  ST_WORD(dir+DIR_WrtTime, fno->ftime);
	  ST_WORD(dir+DIR_WrtDate, fno->fdate);
	  dj.fs->wflag = 1;
	  res = sync(dj.fs);
	}
      }
    }

#if REALTIME
    if (dj.fs && dj.fs->buffer_used) if (sync_win_buffers(dj.fs) != RES_OK) return FR_DISK_ERR;
    if (dj.fs) move_window(dj.fs, 0);
#endif

    LEAVE_FF(dj.fs, res);
  }




  /*-----------------------------------------------------------------------*/
  /* Rename File/Directory                                                 */
  /*-----------------------------------------------------------------------*/

  FRESULT f_rename (const XCHAR *path_old,	/* Pointer to the old name */
		    const XCHAR *path_new)	/* Pointer to the new name */
  {
    FRESULT res = 0;
    DIR dj_old, dj_new;
    NAMEBUF(sfn, lfn);
    BYTE buf[21], *dir;
    DWORD dw;


    INITBUF(dj_old, sfn, lfn);
    res = chk_mounted(&path_old, &dj_old.fs, 1);
    if (res == FR_OK) {
      dj_new.fs = dj_old.fs;
      res = follow_path(&dj_old, path_old);	/* Check old object */
      if (_FS_RPATH && res == FR_OK && (dj_old.fn[NS] & NS_DOT))
	res = FR_INVALID_NAME;
    }
    if (res != FR_OK) LEAVE_FF(dj_old.fs, res);	/* The old object is not found */

    if (!dj_old.dir) LEAVE_FF(dj_old.fs, FR_NO_FILE);	/* Is root dir? */
    memcpy(buf, dj_old.dir+DIR_Attr, 21);		/* Save the object information */

    memcpy(&dj_new, &dj_old, sizeof(DIR));
    res = follow_path(&dj_new, path_new);		/* Check new object */
    if (res == FR_OK) res = FR_EXIST;			/* The new object name is already existing */
    if (res == FR_NO_FILE) { 					/* Is it a valid path and no name collision? */
      res = dir_register(&dj_new);			/* Register the new object */
      if (res == FR_OK) {
#if REALTIME
	dir = get_dir_ptr(dj_new.fs, dj_new.dir);
#else
	dir = dj_new.dir;					/* Copy object information into new entry */
#endif
	memcpy(dir+13, buf+2, 19);
	dir[DIR_Attr] = buf[0] | AM_ARC;
	dj_old.fs->wflag = 1;
	if (dir[DIR_Attr] & AM_DIR) {		/* Update .. entry in the directory if needed */
	  dw = clust2sect(dj_new.fs, (DWORD)LD_WORD(dir+DIR_FstClusHI) | LD_WORD(dir+DIR_FstClusLO));
	  if (!dw) {
	    res = FR_INT_ERR;
	  } else {
	    res = move_window(dj_new.fs, dw);
	    dir = dj_new.fs->win+32;
	    if (res == FR_OK && dir[1] == '.') {
	      dw = (dj_new.fs->fs_type == FS_FAT32 && dj_new.sclust == dj_new.fs->dirbase) ? 0 : dj_new.sclust;
	      ST_WORD(dir+DIR_FstClusLO, dw);
	      ST_WORD(dir+DIR_FstClusHI, dw >> 16);
	      dj_new.fs->wflag = 1;
	    }
	  }
	}
	if (res == FR_OK) {
	  res = dir_remove(&dj_old);			/* Remove old entry */
	  if (res == FR_OK)
	    res = sync(dj_old.fs);
	}
      }
    }

#if REALTIME
    if (dj_old.fs && dj_old.fs->buffer_used) if (sync_win_buffers(dj_old.fs) != RES_OK) return FR_DISK_ERR;
    if (dj_old.fs) move_window(dj_old.fs, 0);
#endif
    LEAVE_FF(dj_old.fs, res);
  }

#endif /* !_FS_READONLY */
#endif /* _FS_MINIMIZE == 0 */
#endif /* _FS_MINIMIZE <= 1 */
#endif /* _FS_MINIMIZE <= 2 */



  /*-----------------------------------------------------------------------*/
  /* Forward data to the stream directly (Available on only _FS_TINY cfg)  */
  /*-----------------------------------------------------------------------*/
#if _USE_FORWARD && _FS_TINY

  FRESULT f_forward (FIL *fp, 						/* Pointer to the file object */
		     UINT (*func)(const BYTE*,UINT),	/* Pointer to the streaming function */
		     UINT btr,						/* Number of bytes to forward */
		     UINT *bf)					/* Pointer to number of bytes forwarded */
  {
    FRESULT res;
    DWORD remain, clst, sect;
    UINT rcnt;


    *bf = 0;

    res = validate(fp->fs, fp->id);					/* Check validity of the object */
    if (res != FR_OK) LEAVE_FF(fp->fs, res);
    if (fp->flag & FA__ERROR)						/* Check error flag */
      LEAVE_FF(fp->fs, FR_INT_ERR);
    if (!(fp->flag & FA_READ))						/* Check access mode */
      LEAVE_FF(fp->fs, FR_DENIED);

    remain = fp->fsize - fp->fptr;
    if (btr > remain) btr = (UINT)remain;			/* Truncate btr by remaining bytes */

    for ( ;  btr && (*func)(NULL, 0);				/* Repeat until all data transferred or stream becomes busy */
	  fp->fptr += rcnt, *bf += rcnt, btr -= rcnt) {
      if ((fp->fptr % SS(fp->fs)) == 0) {			/* On the sector boundary? */
	if (fp->csect >= fp->fs->csize) {		/* On the cluster boundary? */
	  clst = (fp->fptr == 0) ?			/* On the top of the file? */
	    fp->org_clust : get_fat(fp->fs, fp->curr_clust);
	  if (clst <= 1) ABORT(fp->fs, FR_INT_ERR);
	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
	  fp->curr_clust = clst;				/* Update current cluster */
	  fp->csect = 0;						/* Reset sector address in the cluster */
	}
	fp->csect++;							/* Next sector address in the cluster */
      }
      sect = clust2sect(fp->fs, fp->curr_clust);	/* Get current data sector */
      if (!sect) ABORT(fp->fs, FR_INT_ERR);
      sect += fp->csect - 1;
      if (move_window(fp->fs, sect))				/* Move sector window */
	ABORT(fp->fs, FR_DISK_ERR);
      fp->dsect = sect;
      rcnt = SS(fp->fs) - (WORD)(fp->fptr % SS(fp->fs));	/* Forward data from sector window */
      if (rcnt > btr) rcnt = btr;
      rcnt = (*func)(&fp->fs->win[(WORD)fp->fptr % SS(fp->fs)], rcnt);
      if (!rcnt) ABORT(fp->fs, FR_INT_ERR);
    }

    LEAVE_FF(fp->fs, FR_OK);
  }
#endif /* _USE_FORWARD */


#if _USE_MKFS && !_FS_READONLY
  /*-----------------------------------------------------------------------*/
  /* Create File System on the Drive                                       */
  /*-----------------------------------------------------------------------*/
#define N_ROOTDIR	512			/* Multiple of 32 and <= 2048 */
#define N_FATS		1			/* 1 or 2 */
#define MAX_SECTOR	131072000UL	/* Maximum partition size */
#define MIN_SECTOR	2000UL		/* Minimum partition size */


  FRESULT f_mkfs (BYTE drv,			/* Logical drive number */
		  BYTE partition,		/* Partitioning rule 0:FDISK, 1:SFD */
		  WORD allocsize)		/* Allocation unit size [bytes] */
  {
    uint32_t sstbl[] = { 2048000UL, 1024000UL, 512000UL, 256000UL, 128000UL, 64000UL, 32000, 16000, 8000, 4000,   0 };
    uint16_t cstbl[] =  {   32768,   16384,   8192,   4096,   2048, 16384,  8192,  4096, 2048, 1024, 512 };
    BYTE fmt, m, *tbl;
    DWORD b_part, b_fat, b_dir, b_data;		/* Area offset (LBA) */
    DWORD n_part, n_rsv, n_fat, n_dir;		/* Area size */
    DWORD n_clst, d, n;
    WORD ass;   // fatfs uses 'as' but that's a keyword
    FATFS *fs;
    DSTATUS stat;


    /* Check validity of the parameters */
    if (drv >= _DRIVES) return FR_INVALID_DRIVE;
    if (partition >= 2) return FR_MKFS_ABORTED;

    /* Check mounted drive and clear work area */
    fs = FatFs[drv];
    if (!fs) return FR_NOT_ENABLED;
    fs->fs_type = 0;
    drv = LD2PD(drv);

    /* Get disk statics */
    stat = disk_initialize(drv);
    if (stat & STA_NOINIT) return FR_NOT_READY;
    if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;
#if _MAX_SS != 512						/* Get disk sector size */
    if (disk_ioctl(drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK
	|| SS(fs) > _MAX_SS)
      return FR_MKFS_ABORTED;
#endif
    if (disk_ioctl(drv, GET_SECTOR_COUNT, &n_part) != RES_OK || n_part < MIN_SECTOR)
      return FR_MKFS_ABORTED;
    if (n_part > MAX_SECTOR) n_part = MAX_SECTOR;
    b_part = (!partition) ? 63 : 0;		/* Boot sector */
    n_part -= b_part;
    for (d = 512; d <= 32768U && d != allocsize; d <<= 1) ;	/* Check validity of the allocation unit size */
    if (d != allocsize) allocsize = 0;
    if (!allocsize) {					/* Auto selection of cluster size */
      d = n_part;
      for (ass = SS(fs); ass > 512U; ass >>= 1) d >>= 1;
      for (n = 0; d < sstbl[n]; n++) ;
      allocsize = cstbl[n];
    }
    if (allocsize < SS(fs)) allocsize = SS(fs);

    allocsize /= SS(fs);		/* Number of sectors per cluster */

    /* Pre-compute number of clusters and FAT type */
    n_clst = n_part / allocsize;
    fmt = FS_FAT12;
    if (n_clst >= 0xFF5) fmt = FS_FAT16;
    if (n_clst >= 0xFFF5) fmt = FS_FAT32;

    /* Determine offset and size of FAT structure */
    switch (fmt) {
    case FS_FAT12:
      n_fat = ((n_clst * 3 + 1) / 2 + 3 + SS(fs) - 1) / SS(fs);
      n_rsv = 1 + partition;
      n_dir = N_ROOTDIR * 32 / SS(fs);
      break;
    case FS_FAT16:
      n_fat = ((n_clst * 2) + 4 + SS(fs) - 1) / SS(fs);
      n_rsv = 1 + partition;
      n_dir = N_ROOTDIR * 32 / SS(fs);
      break;
    default:
      n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs);
      n_rsv = 33 - partition;
      n_dir = 0;
    }
    b_fat = b_part + n_rsv;			/* FATs start sector */
    b_dir = b_fat + n_fat * N_FATS;	/* Directory start sector */
    b_data = b_dir + n_dir;			/* Data start sector */

    /* Align data start sector to erase block boundary (for flash memory media) */
    if (disk_ioctl(drv, GET_BLOCK_SIZE, &n) != RES_OK) return FR_MKFS_ABORTED;
    n = (b_data + n - 1) & ~(n - 1);
    n_fat += (n - b_data) / N_FATS;
    /* b_dir and b_data are no longer used below */

    /* Determine number of cluster and final check of validity of the FAT type */
    n_clst = (n_part - n_rsv - n_fat * N_FATS - n_dir) / allocsize;
    if (   (fmt == FS_FAT16 && n_clst < 0xFF5)
	   || (fmt == FS_FAT32 && n_clst < 0xFFF5))
      return FR_MKFS_ABORTED;

    /* Create partition table if needed */
    if (!partition) {
      DWORD n_disk = b_part + n_part;

      memset(fs->win, 0, SS(fs));
      tbl = fs->win+MBR_Table;
      ST_DWORD(tbl, 0x00010180);		/* Partition start in CHS */
      if (n_disk < 63UL * 255 * 1024) {	/* Partition end in CHS */
	n_disk = n_disk / 63 / 255;
	tbl[7] = (BYTE)n_disk;
	tbl[6] = (BYTE)((n_disk >> 2) | 63);
      } else {
	ST_WORD(&tbl[6], 0xFFFF);
      }
      tbl[5] = 254;
      if (fmt != FS_FAT32)			/* System ID */
	tbl[4] = (n_part < 0x10000) ? 0x04 : 0x06;
      else
	tbl[4] = 0x0c;
      ST_DWORD(tbl+8, 63);			/* Partition start in LBA */
      ST_DWORD(tbl+12, n_part);		/* Partition size in LBA */
      ST_WORD(tbl+64, 0xAA55);		/* Signature */
      if (disk_write(drv, fs->win, 0, 1) != RES_OK)
	return FR_DISK_ERR;
      partition = 0xF8;
    } else {
      partition = 0xF0;
    }

    /* Create boot record */
    tbl = fs->win;								/* Clear buffer */
    memset(tbl, 0, SS(fs));
    ST_DWORD(tbl+BS_jmpBoot, 0x90FEEB);			/* Boot code (jmp $, nop) */
    ST_WORD(tbl+BPB_BytsPerSec, SS(fs));		/* Sector size */
    tbl[BPB_SecPerClus] = (BYTE)allocsize;		/* Sectors per cluster */
    ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv);			/* Reserved sectors */
    tbl[BPB_NumFATs] = N_FATS;					/* Number of FATs */
    ST_WORD(tbl+BPB_RootEntCnt, SS(fs) / 32 * n_dir); /* Number of rootdir entries */
    if (n_part < 0x10000) {						/* Number of total sectors */
      ST_WORD(tbl+BPB_TotSec16, n_part);
    } else {
      ST_DWORD(tbl+BPB_TotSec32, n_part);
    }
    tbl[BPB_Media] = partition;					/* Media descripter */
    ST_WORD(tbl+BPB_SecPerTrk, 63);				/* Number of sectors per track */
    ST_WORD(tbl+BPB_NumHeads, 255);				/* Number of heads */
    ST_DWORD(tbl+BPB_HiddSec, b_part);			/* Hidden sectors */
    n = get_fattime();							/* Use current time as a VSN */
    if (fmt != FS_FAT32) {
      ST_DWORD(tbl+BS_VolID, n);				/* Volume serial number */
      ST_WORD(tbl+BPB_FATSz16, n_fat);		/* Number of secters per FAT */
      tbl[BS_DrvNum] = 0x80;					/* Drive number */
      tbl[BS_BootSig] = 0x29;					/* Extended boot signature */
      memcpy(tbl+BS_VolLab, "NO NAME    FAT     ", 19);	/* Volume lavel, FAT signature */
    } else {
      ST_DWORD(tbl+BS_VolID32, n);			/* Volume serial number */
      ST_DWORD(tbl+BPB_FATSz32, n_fat);		/* Number of secters per FAT */
      ST_DWORD(tbl+BPB_RootClus, 2);			/* Root directory cluster (2) */
      ST_WORD(tbl+BPB_FSInfo, 1);				/* FSInfo record offset (bs+1) */
      ST_WORD(tbl+BPB_BkBootSec, 6);			/* Backup boot record offset (bs+6) */
      tbl[BS_DrvNum32] = 0x80;				/* Drive number */
      tbl[BS_BootSig32] = 0x29;				/* Extended boot signature */
      memcpy(tbl+BS_VolLab32, "NO NAME    FAT32   ", 19);	/* Volume lavel, FAT signature */
    }
    ST_WORD(tbl+BS_55AA, 0xAA55);				/* Signature */
    if (SS(fs) > 512U) {
      ST_WORD(tbl+SS(fs)-2, 0xAA55);
    }
    if (disk_write(drv, tbl, b_part+0, 1) != RES_OK)
      return FR_DISK_ERR;
    if (fmt == FS_FAT32)
      disk_write(drv, tbl, b_part+6, 1);

    /* Initialize FAT area */
    for (m = 0; m < N_FATS; m++) {
      memset(tbl, 0, SS(fs));		/* 1st sector of the FAT  */
      if (fmt != FS_FAT32) {
	n = (fmt == FS_FAT12) ? 0x00FFFF00 : 0xFFFFFF00;
	n |= partition;
	ST_DWORD(tbl, n);				/* Reserve cluster #0-1 (FAT12/16) */
      } else {
	ST_DWORD(tbl+0, 0xFFFFFFF8);	/* Reserve cluster #0-1 (FAT32) */
	ST_DWORD(tbl+4, 0xFFFFFFFF);
	ST_DWORD(tbl+8, 0x0FFFFFFF);	/* Reserve cluster #2 for root dir */
      }
      if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
	return FR_DISK_ERR;
      memset(tbl, 0, SS(fs));		/* Following FAT entries are filled by zero */
      for (n = 1; n < n_fat; n++) {
	if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
	  return FR_DISK_ERR;
      }
    }

    /* Initialize Root directory */
    m = (BYTE)((fmt == FS_FAT32) ? allocsize : n_dir);
    do {
      if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
	return FR_DISK_ERR;
    } while (--m);

    /* Create FSInfo record if needed */
    if (fmt == FS_FAT32) {
      ST_WORD(tbl+BS_55AA, 0xAA55);
      ST_DWORD(tbl+FSI_LeadSig, 0x41615252);
      ST_DWORD(tbl+FSI_StrucSig, 0x61417272);
      ST_DWORD(tbl+FSI_Free_Count, n_clst - 1);
      ST_DWORD(tbl+FSI_Nxt_Free, 0xFFFFFFFF);
      disk_write(drv, tbl, b_part+1, 1);
      disk_write(drv, tbl, b_part+7, 1);
    }

    return (disk_ioctl(drv, CTRL_SYNC, (void*)NULL) == RES_OK) ? FR_OK : FR_DISK_ERR;
  }

#endif /* _USE_MKFS && !_FS_READONLY */




#if _USE_STRFUNC
  /*-----------------------------------------------------------------------*/
  /* Get a string from the file                                            */
  /*-----------------------------------------------------------------------*/
  char* f_gets (char* buff,	/* Pointer to the string buffer to read */
		int len,	/* Size of string buffer */
		FIL* fil)	/* Pointer to the file object */
    {
      int i = 0;
      char *p = buff;
      UINT rc;


      while (i < len - 1) {			/* Read bytes until buffer gets filled */
	f_read(fil, p, 1, &rc);
	if (rc != 1) break;			/* Break when no data to read */
#if _USE_STRFUNC >= 2
	if (*p == '\r') continue;	/* Strip '\r' */
#endif
	i++;
	if (*p++ == '\n') break;	/* Break when reached end of line */
      }
      *p = 0;
      return i ? buff : NULL;			/* When no data read (eof or error), return with error. */
    }


#if !_FS_READONLY
#include 
  /*-----------------------------------------------------------------------*/
  /* Put a character to the file                                           */
  /*-----------------------------------------------------------------------*/
  int f_putc (int chr,	/* A character to be output */
	      FIL* fil)	/* Ponter to the file object */
  {
    UINT bw;
    char c;


#if _USE_STRFUNC >= 2
    if (chr == '\n') f_putc ('\r', fil);	/* LF -> CRLF conversion */
#endif
    if (!fil) {	/* Special value may be used to switch the destination to any other device */
      /*	put_console(chr);	*/
      return chr;
    }
    c = (char)chr;
    f_write(fil, &c, 1, &bw);	/* Write a byte to the file */
    return bw ? chr : EOF;		/* Return the result */
  }




  /*-----------------------------------------------------------------------*/
  /* Put a string to the file                                              */
  /*-----------------------------------------------------------------------*/
  int f_puts (const char* str,	/* Pointer to the string to be output */
	      FIL* fil)			/* Pointer to the file object */
  {
    int n;


    for (n = 0; *str; str++, n++) {
      if (f_putc(*str, fil) == EOF) return EOF;
    }
    return n;
  }




  /*-----------------------------------------------------------------------*/
  /* Put a formatted string to the file                                    */
  /*-----------------------------------------------------------------------*/
  int f_printf (FIL* fil,			/* Pointer to the file object */
		const char* str,	/* Pointer to the format string */
		...)					/* Optional arguments... */
  {
    va_list arp;
    UCHAR c, f, r;
    ULONG val;
    char s[16];
    int i, w, res, cc;


    va_start(arp, str);

    for (cc = res = 0; cc != EOF; res += cc) {
      c = *str++;
      if (c == 0) break;			/* End of string */
      if (c != '%') {				/* Non escape cahracter */
	cc = f_putc(c, fil);
	if (cc != EOF) cc = 1;
	continue;
      }
      w = f = 0;
      c = *str++;
      if (c == '0') {				/* Flag: '0' padding */
	f = 1; c = *str++;
      }
      while (c >= '0' && c <= '9') {	/* Precision */
	w = w * 10 + (c - '0');
	c = *str++;
      }
      if (c == 'l') {				/* Prefix: Size is long int */
	f |= 2; c = *str++;
      }
      if (c == 's') {				/* Type is string */
	cc = f_puts(va_arg(arp, char*), fil);
	continue;
      }
      if (c == 'c') {				/* Type is character */
	cc = f_putc(va_arg(arp, int), fil);
	if (cc != EOF) cc = 1;
	continue;
      }
      r = 0;
      if (c == 'd') r = 10;		/* Type is signed decimal */
      if (c == 'u') r = 10;		/* Type is unsigned decimal */
      if (c == 'X') r = 16;		/* Type is unsigned hexdecimal */
      if (r == 0) break;			/* Unknown type */
      if (f & 2) {				/* Get the value */
	val = (ULONG)va_arg(arp, long);
      } else {
	val = (c == 'd') ? (ULONG)(long)va_arg(arp, int) : (ULONG)va_arg(arp, unsigned int);
      }
      /* Put numeral string */
      if (c == 'd') {
	if (val & 0x80000000) {
	  val = 0 - val;
	  f |= 4;
	}
      }
      i = sizeof(s) - 1; s[i] = 0;
      do {
	c = (UCHAR)(val % r + '0');
	if (c > '9') c += 7;
	s[--i] = c;
	val /= r;
      } while (i && val);
      if (i && (f & 4)) s[--i] = '-';
      w = sizeof(s) - 1 - w;
      while (i && i > w) s[--i] = (f & 1) ? '0' : ' ';
      cc = f_puts(&s[i], fil);
    }

    va_end(arp);
    return (cc == EOF) ? cc : res;
  }

#endif /* !_FS_READONLY */
#endif /* _USE_STRFUNC */
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/README000066400000000000000000000035761207233610700237530ustar00rootroot00000000000000The FatFs implementation is a direct port of the ChaN FatFs project
(http://elm-chan.org/fsw/ff/00index_e.html) to TinyOS.  

During testing of the initial port, Victor Cionca at University of
Limerick discovered a great deal of overhead in the filesystem's
cluster window operations, and devised an improved method to handle
these without compromising the integrity of the fs.  These are
incorporated here.

First note:  Your app must call mount before proceeding with any other file
operations.  Boot.booted is a good place to do this.

Application developers should note that FatFs development used the IP
stack and NTP updates in order to provide accurate timestamps.
tinyos-1.x/contrib/handhelds/swtest/TestFATLogging shows how to do this.

Without these mechanisms, an application will need another method to
seed the app's time value with something realistic (not
1/1/1980-relative) at compile time, or devise a way to provide a
runtime update from a host.

One way:
-------
copy the simple python script timeSec.py in tinyos-2.x-contrib/shimmer/apps/JustFATLogging to your
app directory.

add these lines to your app's Makefile, which will provide a hook for
the the compile time variable CURRENT_TIME.  TimeP uses this to set the
runtime g_current_time that sets the baseline for reporting localtime
on the device:

ifdef CURRENT_TIME
PFLAGS += -DCURRENT_TIME=$(CURRENT_TIME)
endif

then, at compile-time, add CURRENT_TIME=`python ./timeSec.py` to the
build line.

unfortunately, this seed will be restored if you reset the board.

Another way:
-----------
add a mechanism to provide the current time from a host machine via
serial line.  one example of how to do this is in
tinyos-1.x/contrib/handhelds/apps/ThreeAxisRecorder.

Yet Another way:
---------------
use the bluetooth radio to do similar (don't know why this would be
easier than using the built-in access point-ip stack
infrastructure...).






tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/ccsbcs.c000066400000000000000000000727011207233610700244730ustar00rootroot00000000000000/*------------------------------------------------------------------------*/
/* Unicode - Local code bidirectional converter  (C)ChaN, 2009            */
/* (SBCS code pages)                                                      */
/*------------------------------------------------------------------------*/
/*  437   U.S. (OEM)
/   720   Arabic (OEM)
/   1256  Arabic (Windows)
/   737   Greek (OEM)
/   1253  Greek (Windows)
/   1250  Central Europe (Windows)
/   775   Baltic (OEM)
/   1257  Baltic (Windows)
/   850   Multilingual Latin 1 (OEM)
/   852   Latin 2 (OEM)
/   1252  Latin 1 (Windows)
/   855   Cyrillic (OEM)
/   1251  Cyrillic (Windows)
/   866   Russian (OEM)
/   857   Turkish (OEM)
/   1254  Turkish (Windows)
/   858   Multilingual Latin 1 + Euro (OEM)
/   862   Hebrew (OEM)
/   1255  Hebrew (Windows)
/   874   Thai (OEM, Windows)
/   1258  Vietnam (OEM, Windows)
*/

//#include "../ff.h"


#if _CODE_PAGE == 437
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP437(0x80-0xFF) to Unicode conversion table */
	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
	0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
	0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
	0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
	0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
	0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
	0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
	0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 720
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP720(0x80-0xFF) to Unicode conversion table */
	0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
	0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
	0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
	0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
	0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
	0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
	0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
	0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
	0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 737
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP737(0x80-0xFF) to Unicode conversion table */
	0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
	0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
	0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
	0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
	0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
	0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
	0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
	0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
	0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
	0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 775
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP775(0x80-0xFF) to Unicode conversion table */
	0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
	0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
	0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
	0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
	0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
	0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
	0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
	0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
	0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
	0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
	0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
	0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
	0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 850
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP850(0x80-0xFF) to Unicode conversion table */
	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
	0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
	0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
	0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
	0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
	0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
	0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
	0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
	0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
	0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
	0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 852
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP852(0x80-0xFF) to Unicode conversion table */
	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
	0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
	0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
	0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
	0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
	0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
	0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
	0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
	0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
	0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
	0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
	0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 855
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP855(0x80-0xFF) to Unicode conversion table */
	0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
	0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
	0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
	0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
	0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
	0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
	0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
	0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
	0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
	0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
	0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
	0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
	0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 857
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP857(0x80-0xFF) to Unicode conversion table */
	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
	0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
	0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
	0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
	0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
	0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
	0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
	0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
	0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
	0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
	0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 858
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP858(0x80-0xFF) to Unicode conversion table */
	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
	0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
	0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
	0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
	0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
	0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
	0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
	0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
	0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
	0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
	0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 862
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP862(0x80-0xFF) to Unicode conversion table */
	0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
	0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
	0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
	0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
	0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
	0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
	0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
	0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
	0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 866
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP866(0x80-0xFF) to Unicode conversion table */
	0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
	0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
	0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
	0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
	0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
	0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
	0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
	0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
	0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
	0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
};

#elif _CODE_PAGE == 874
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP874(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
	0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
	0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
	0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
	0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
	0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
	0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
	0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
	0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
	0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
	0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
	0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
	0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
};

#elif _CODE_PAGE == 1250
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1250(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
	0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
	0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
	0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
	0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
	0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
	0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
	0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
	0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
	0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
	0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
	0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
	0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
	0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
};

#elif _CODE_PAGE == 1251
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1251(0x80-0xFF) to Unicode conversion table */
	0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
	0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
	0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
	0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
	0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
	0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
	0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
	0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
	0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
	0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
	0x0428, 0x0429, 0x042A, 0x042D, 0x042C, 0x042D, 0x042E, 0x042F,
	0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
	0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
	0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
	0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
};

#elif _CODE_PAGE == 1252
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1252(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
	0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
	0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
	0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
	0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
	0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
	0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
	0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
	0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
	0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
	0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
	0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
	0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
};

#elif _CODE_PAGE == 1253
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1253(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
	0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
	0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
	0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
	0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
	0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
	0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
	0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
	0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
	0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
	0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
	0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
	0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
};

#elif _CODE_PAGE == 1254
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1254(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
	0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
	0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
	0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
	0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
	0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
	0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
	0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
	0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
	0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
	0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
	0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
	0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
};

#elif _CODE_PAGE == 1255
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1255(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
	0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
	0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
	0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
	0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
	0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
	0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
	0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
	0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
	0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
	0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
	0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
	0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
};

#elif _CODE_PAGE == 1256
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1256(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
	0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
	0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
	0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
	0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
	0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
	0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
	0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
	0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
	0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
	0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
	0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
	0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
	0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
}

#elif _CODE_PAGE == 1257
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1257(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
	0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
	0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
	0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
	0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
	0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
	0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
	0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
	0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
	0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
	0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
	0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
	0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
};

#elif _CODE_PAGE == 1258
#define _TBLDEF 1
static
const WCHAR Tbl[] = {	/*  CP1258(0x80-0xFF) to Unicode conversion table */
	0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
	0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
	0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
	0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
	0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
	0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
	0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
	0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
	0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
	0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
	0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
	0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
	0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
	0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
};

#endif


#if !_TBLDEF || !_USE_LFN
#error This file is not needed in current configuration
#endif


WCHAR ff_convert (	/* Converted character, Returns zero on error */
	WCHAR	src,	/* Character code to be converted */
	UINT	dir		/* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
)
{
	WCHAR c;


	if (src < 0x80) {	/* ASCII */
		c = src;

	} else {
		if (dir) {		/* OEMCP to Unicode */
			c = (src >= 0x100) ? 0 : Tbl[src - 0x80];

		} else {		/* Unicode to OEMCP */
			for (c = 0; c < 0x80; c++) {
				if (src == Tbl[c]) break;
			}
			c = (c + 0x80) & 0xFF;
		}
	}

	return c;
}


WCHAR ff_wtoupper (	/* Upper converted character */
	WCHAR chr		/* Input character */
)
{
	static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 };
	static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
	int i;


	for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;

	return tbl_lower[i] ? tbl_upper[i] : chr;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/diskIOC.nc000066400000000000000000000052771207233610700247020ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   April, 2009
 * port to tos-2.x
 * @date January, 2010
 *
 * wire the FatFs interface to the current implementation
 * wire the diskIO abstraction in the FatFs module to physical medium
 */

configuration diskIOC {
  provides {
    interface FatFs;
    interface StdControl as diskIOStdControl;
    interface SD as diskIO;
  }
}
implementation {
  components 
    FatFsP, 
    SDC, 
    //    new Msp430Usart0C(), 
    new TimerMilliC(), 
    //    HplMsp430InterruptP, 
    LedsC, 
    TimeP;  
  //, NTPClientM;

  FatFs = FatFsP;
  diskIOStdControl = SDC;
  //  diskIOStdControl = TimeP;
  diskIO = SDC;

  FatFsP.Leds        -> LedsC;

  components TimeC;
  FatFsP.Time        -> TimeC;
  //  FatFsP.Time        -> TimeP;

  /*
  SDP.Usart          -> Msp430Usart0C;
  SDP.DockInterrupt  -> HplMsp430InterruptP.Port23;
  SDP.Leds           -> LedsC;
  */

  /*
  components Counter32khz64C as Counter;
  components new CounterToLocalTime64C(T32khz);
  CounterToLocalTime64C.Counter -> Counter;
  TimeP.LocalTime64 -> CounterToLocalTime64C;
   
  TimeP.Timer                -> TimerMilliC;
  */
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/diskio.c000066400000000000000000000131531207233610700245110ustar00rootroot00000000000000/*----------------------------------------------------------------------------/
  / FatFs module is an open source project to implement FAT file system to small
  / embedded systems. It is opened for education, research and development under
  / license policy of following trems.
  /
  /  Copyright (C) 2009, ChaN, all right reserved.
  /
  / * The FatFs module is a free software and there is no warranty.
  / * You can use, modify and/or redistribute it for personal, non-profit or
  /   commercial use without any restriction under your responsibility.
  / * Redistributions of source code must retain the above copyright notice.
  /
  /----------------------------------------------------------------------------*/
/*
 * Most of this code:
 *
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * tinyos instantiation of ChaN's diskio stubs (thank you!):
 * function declarations are kept from ChaN's code to make updating easier;
 * contents of these point to abstract calls -- as "diskio" -- 
 * to real physical io; for now, the control will point to SD.
 *
 * @author Steve Ayer
 * @date   April, 2009
 * ported from tos-1.x 
 * @date   January, 2010
 */

#include "diskio.h"

static BOOL disk_available, disk_initialized;

DSTATUS disk_initialize (BYTE drv)	// we only have one
{
  if(!disk_initialized){
    atomic disk_available = TRUE;

    call diskIOStdControl.start();
    
    atomic disk_initialized = TRUE;
  }
  return 0;
}

void disable_disk()
{
  atomic disk_available = FALSE;
  
  disk_initialized = FALSE;
  
  call diskIOStdControl.stop();
}

void dock_disk()
{
  atomic disk_available = FALSE;
  
  call diskIOStdControl.start();
}

DSTATUS disk_status (BYTE drv)        // just one
{
  atomic {
    if(!disk_available)
      return STA_NOINIT;
  }
  
  return FR_OK;

}

DRESULT disk_read (BYTE drv,		
		   BYTE * buff,		/* Data buffer to store read data */
		   DWORD sector,	/* Sector address (LBA) */
		   BYTE count)		/* Number of sectors to read (1..255) */
{
  int result = FR_OK;
  register int i;

  if(disk_available){
    for(i = 0; i < count; i++)
      if((result = call diskIO.readBlock(sector++, (uint8_t *)(buff + i * 512))))   // success is (still) 0
	break;
  }
  else
    result = FR_NOT_READY;

  return result;
}

#if _READONLY == 0
DRESULT disk_write (BYTE drv,		
		    const BYTE *buff,	/* Data to be written */
		    DWORD sector,		/* Sector address (LBA) */
		    BYTE count)			/* Number of sectors to write (1..255) */
{
  int result = FR_OK;
  register int i;

  if(disk_available){
    for(i = 0; i < count; i++)
      if((result = call diskIO.writeBlock(sector++, (uint8_t *)(buff + i * 512))))   // success is (still) 0
	break;
  }
  else
    return FR_NOT_READY;

  return result;
}
#endif /* _READONLY */

DRESULT disk_ioctl (BYTE drv,
		    BYTE ctrl,		/* Control code */
		    void * answer)		/* Buffer to send/receive control data */
{
  int result;
  uint32_t capacity;   // bytes
  /* 
   * calls we have to deal with (ctrl param) as of ff v0.07a:
   *
   * CTRL_SYNC make sure no accesses are pending
   * GET_SECTOR_SIZE we're only supporting sd so far
   * GET_BLOCK_SIZE  right, as above
   * GET_SECTOR_COUNT sd driver has a read-success hack for this, should work
   */
  switch(ctrl){
  case CTRL_SYNC:   // make sure we have availability
    atomic{
      if(disk_available)
	result = FR_OK;
      else
	result = FR_NOT_READY;
    }
    break;
  case GET_SECTOR_SIZE:
  case GET_BLOCK_SIZE:
    *(WORD *)answer = 512;
    result = RES_OK;
    break;
  case GET_SECTOR_COUNT:
    capacity = call diskIO.readCardSize();
    *(DWORD *)answer = capacity / 512;
    result = FR_OK;
    break;
  default:
    *(WORD *)answer = 0;
    result = FR_INVALID_NAME;
    break;
  }
  return result;
}

async event void diskIO.available(){
  signal FatFs.mediaAvailable();
  
  atomic disk_available = TRUE;
}

async event void diskIO.unavailable(){
  signal FatFs.mediaUnavailable();
  
  atomic disk_available = FALSE;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/diskio.h000066400000000000000000000100561207233610700245150ustar00rootroot00000000000000/*-----------------------------------------------------------------------------/
/ FatFs module is an open source software to implement FAT file system to
/ small embedded systems. This is a free software and is opened for education,
/ research and commecial developments under license policy of following trems.
/
/  Copyright (C) 2009, ChaN, all right reserved.
/
/ * The FatFs module is a free software and there is NO WARRANTY.
/ * No restriction on use. You can use, modify and redistribute it for
/   personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
/ * Redistributions of source code must retain the above copyright notice.
/
/-----------------------------------------------------------------------------*/
/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   April, 2009
 * ported to tos-2.x
 * @date January, 2010
 */


#ifndef _DISKIO

#define _READONLY	0	/* 1: Read-only mode */
#define _USE_IOCTL	1

#include 

/* Status of Disk Functions */
typedef BYTE	DSTATUS;

/* Results of Disk Functions */
typedef enum {
  RES_OK = 0,		/* 0: Successful */
  RES_ERROR,		/* 1: R/W Error */
  RES_WRPRT,		/* 2: Write Protected */
  RES_NOTRDY,		/* 3: Not Ready */
  RES_PARERR		/* 4: Invalid Parameter */
} DRESULT;


/*---------------------------------------*/
/* Prototypes for disk control functions */

BOOL assign_drives (int argc, char *argv[]);
DSTATUS disk_initialize (BYTE);
void disable_disk(void);
DSTATUS disk_status (BYTE);
DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
#if	_READONLY == 0
DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
#endif
DRESULT disk_ioctl (BYTE, BYTE, void*);


/* Disk Status Bits (DSTATUS) */

#define STA_NOINIT		0x01	/* Drive not initialized */
#define STA_NODISK		0x02	/* No medium in the drive */
#define STA_PROTECT		0x04	/* Write protected */


/* Command code for disk_ioctrl() */

/* Generic command */
#define CTRL_SYNC			0	/* Mandatory for write functions */
#define GET_SECTOR_COUNT	1	/* Mandatory for only f_mkfs() */
#define GET_SECTOR_SIZE		2
#define GET_BLOCK_SIZE		3	/* Mandatory for only f_mkfs() */
#define CTRL_POWER			4
#define CTRL_LOCK			5
#define CTRL_EJECT			6
/* MMC/SDC command */
#define MMC_GET_TYPE		10
#define MMC_GET_CSD			11
#define MMC_GET_CID			12
#define MMC_GET_OCR			13
#define MMC_GET_SDSTAT		14
/* ATA/CF command */
#define ATA_GET_REV			20
#define ATA_GET_MODEL		21
#define ATA_GET_SN			22


#define _DISKIO
#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/chips/sd/fatfs/integer.h000066400000000000000000000064761207233610700247030ustar00rootroot00000000000000/*-----------------------------------------------------------------------------/
/ FatFs module is an open source software to implement FAT file system to
/ small embedded systems. This is a free software and is opened for education,
/ research and commecial developments under license policy of following trems.
/
/  Copyright (C) 2009, ChaN, all right reserved.
/
/ * The FatFs module is a free software and there is NO WARRANTY.
/ * No restriction on use. You can use, modify and redistribute it for
/   personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
/ * Redistributions of source code must retain the above copyright notice.
/
/-----------------------------------------------------------------------------*/
/*
 * Portions of this code:
 *
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * tinyos port from ChaN's FatFs (thank you!):
 *
 * @author Steve Ayer
 * @date   April, 2009
 * ported to tos-2.x (easy)
 * @date January, 2010
 */

#ifndef _INTEGER

// original typedefs converted to nesc stdint.h types for tos consistency
/* These types must be 16-bit, 32-bit or larger integer */
typedef int16_t		INT;
typedef uint16_t        UINT;

/* These types must be 8-bit integer */
// had to change signed char typedef CHAR to SCHAR to avoid conflict with msp430 usart.h (#define CHAR  0x10)
typedef int8_t	SCHAR;
typedef uint8_t	UCHAR;
typedef uint8_t	BYTE;

/* These types must be 16-bit integer */
typedef int16_t		SHORT;
typedef uint16_t	USHORT;
typedef uint16_t	WORD;
typedef uint16_t	WCHAR;

/* These types must be 32-bit integer */
typedef int32_t		LONG;
typedef uint32_t	ULONG;
typedef uint32_t	DWORD;

/* Boolean type */
//typedef enum { FALSE = 0, TRUE } BOOL;
typedef char BOOL;

#define _INTEGER
#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/hardware.h000066400000000000000000000112351207233610700222110ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steven Ayer
 * @date June 2006
 */


#ifndef _H_hardware_h
#define _H_hardware_h

#include "msp430hardware.h"

// enum so components can override power saving,
// as per TEP 112.
enum {
  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
};

// LEDs
TOSH_ASSIGN_PIN(RED_LED,    4, 0);
TOSH_ASSIGN_PIN(ORANGE_LED, 4, 1);
TOSH_ASSIGN_PIN(YELLOW_LED, 4, 2);
TOSH_ASSIGN_PIN(GREEN_LED,  4, 3);

// CC2420 RADIO #defines
TOSH_ASSIGN_PIN(RADIO_FIFO,      1, 0);
TOSH_ASSIGN_PIN(RADIO_TIMED_SFD, 1, 2);
TOSH_ASSIGN_PIN(RADIO_FIFOP,     2, 6);
TOSH_ASSIGN_PIN(RADIO_CCA,       2, 7);

TOSH_ASSIGN_PIN(RADIO_1V8_EN,    4, 7);
TOSH_ASSIGN_PIN(RADIO_VREF,      5, 6);    // unused in shimmer
TOSH_ASSIGN_PIN(SW_BT_PWR_N,     5, 6);    //   "    "    "
TOSH_ASSIGN_PIN(SW_SD_PWR_N,     5, 6);    //   "    "    "
TOSH_ASSIGN_PIN(DOCK_N,          2, 5);    // not used, but has to be a pull-up for sd card to work

TOSH_ASSIGN_PIN(RADIO_SFD,       5, 0);
TOSH_ASSIGN_PIN(RADIO_SIMO1,     5, 1);
TOSH_ASSIGN_PIN(RADIO_SOMI1,     5, 2);
TOSH_ASSIGN_PIN(RADIO_CSN,       5, 4);
TOSH_ASSIGN_PIN(CSN,             5, 4);
TOSH_ASSIGN_PIN(RADIO_RESET,     5, 7);

// redefinitions for the sd card driver
TOSH_ASSIGN_PIN(SD_CLK, 3, 3);
TOSH_ASSIGN_PIN(SD_DO, 3, 2);
TOSH_ASSIGN_PIN(SD_DI, 3, 1);

// this happens in hplcc2420pinsc
TOSH_ASSIGN_PIN(CC_FIFOP, 2, 6);
TOSH_ASSIGN_PIN(CC_FIFO, 1, 0);
TOSH_ASSIGN_PIN(CC_SFD, 1, 2);
TOSH_ASSIGN_PIN(CC_VREN, 5, 6);
TOSH_ASSIGN_PIN(CC_RSTN, 5, 7);

// BT pins
TOSH_ASSIGN_PIN(BT_PIO,          1, 5);
TOSH_ASSIGN_PIN(BT_RTS,          1, 6);
TOSH_ASSIGN_PIN(BT_CTS,          1, 7);
TOSH_ASSIGN_PIN(BT_TXD,          3, 6);
TOSH_ASSIGN_PIN(BT_RXD,          3, 7);
TOSH_ASSIGN_PIN(BT_RESET,        5, 5);

//BSL Pins
TOSH_ASSIGN_PIN(PROG_OUT,  1, 1);
TOSH_ASSIGN_PIN(PROG_IN,   2, 2);

// SD uart chip-select
TOSH_ASSIGN_PIN(SD_CS_N, 3, 0);

// ADC
TOSH_ASSIGN_PIN(ADC0, 6, 5);
TOSH_ASSIGN_PIN(ADC1, 6, 4);
TOSH_ASSIGN_PIN(ADC2, 6, 3);

// ADC lines on the testpoints
TOSH_ASSIGN_PIN(ADC_0, 6, 0);
TOSH_ASSIGN_PIN(ADC_1, 6, 1);
TOSH_ASSIGN_PIN(ADC_2, 6, 2);
TOSH_ASSIGN_PIN(ADC_3, 6, 3);
TOSH_ASSIGN_PIN(ADC_4, 6, 4);
TOSH_ASSIGN_PIN(ADC_5, 6, 5);
TOSH_ASSIGN_PIN(ADC_6, 6, 6);
TOSH_ASSIGN_PIN(ADC_7, 6, 7);

TOSH_ASSIGN_PIN(ADC_ACCELZ, 6, 3);
TOSH_ASSIGN_PIN(ADC_ACCELY,  6, 4);
TOSH_ASSIGN_PIN(ADC_ACCELX, 6, 5);

TOSH_ASSIGN_PIN(DAC0_AN, 6, 6);
TOSH_ASSIGN_PIN(DAC1_AN, 6, 7);


// UART pins
// SPI1 attached to bt, cc2420
TOSH_ASSIGN_PIN(UCLK1, 5, 3);
TOSH_ASSIGN_PIN(SOMI1, 5, 2);
TOSH_ASSIGN_PIN(SIMO1, 5, 1);

// used as GPIOs
TOSH_ASSIGN_PIN(UCLK0, 3, 3);
TOSH_ASSIGN_PIN(SOMI0, 3, 2);
TOSH_ASSIGN_PIN(SIMO0, 3, 1);

// connected to UART (0 and 1)
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);
TOSH_ASSIGN_PIN(UTXD1, 3, 6);
TOSH_ASSIGN_PIN(URXD1, 3, 7);

// GIO pins
TOSH_ASSIGN_PIN(SER0_RTS, 1, 3);
TOSH_ASSIGN_PIN(SER0_CTS, 1, 4);

TOSH_ASSIGN_PIN(ROSC, 2, 5);

TOSH_ASSIGN_PIN(GIO0, 2, 0);
TOSH_ASSIGN_PIN(GIO1, 2, 1);


// 1-Wire
TOSH_ASSIGN_PIN(ONEWIRE_PWR,  2, 3);
TOSH_ASSIGN_PIN(ONEWIRE, 2, 4);

// ACCEL
TOSH_ASSIGN_PIN(ACCEL_SEL0,  4, 4);
TOSH_ASSIGN_PIN(ACCEL_SEL1,  4, 5);
TOSH_ASSIGN_PIN(ACCEL_SLEEP_N, 4, 6);



#endif // _H_hardware_h

tinyos-2.1.2+dfsg/tos/platforms/shimmer/platform.h000066400000000000000000000000001207233610700222240ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer/platform_message.h000066400000000000000000000051301207233610700237410ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:54 scipio Exp $
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * Defining the platform-independently named packet structures to be the
 * chip-specific CC1000 packet structures.
 *
 * @author Philip Levis
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
 */


#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 
#include 

typedef union message_header {
  cc2420_header_t cc2420;
  serial_header_t serial;
} message_header_t;

typedef union TOSRadioFooter {
  cc2420_footer_t cc2420;
} message_footer_t;

typedef union TOSRadioMetadata {
  cc2420_metadata_t cc2420;
  serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer/shimmerAnalogSetup.nc000066400000000000000000000055171207233610700244020ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date March, 2010
 *
 * this interface is really just for cleaning up apps.
 * wire the app's softwareinit.init to the component's 
 * then call *in sequence* the addInputs you want to sample: 
 * that will be the order of the samples.
 *
 * REMEMBER:  only eight channels, only one internal daughter card at a time, but 
 * notice that the anex is provided.
 */

interface shimmerAnalogSetup {

  // three channels
  command void addAccelInputs();   

  // three channels
  command void addGyroInputs();

  // two channels
  command void addECGInputs();

  // three channels
  command void addUVInputs();

  // one channels
  command void addGSRInput();
  
  // one channels
  command void addEMGInput();
  
  // either of two channels
  command void addAnExInput(uint8_t channel);

  // identical to ecg
  command void addStrainGaugeInputs();

  // sets number of channels back to zero
  command void reset();

  /*
   * call this after adding devices.
   * pass in a buffer to hold the sampling results
   * switching buffers can be done in the transferDone event
   */
  command void finishADCSetup(uint16_t * buffer);
  
  command void triggerConversion();
  
  command void stopConversion();

  command uint8_t getNumberOfChannels();
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer/shimmerAnalogSetupC.nc000066400000000000000000000042131207233610700244750ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date March, 2010
 */

configuration shimmerAnalogSetupC {
  provides {
    interface Init;
    interface shimmerAnalogSetup;
  }
}

implementation {
  components shimmerAnalogSetupP;
  shimmerAnalogSetup = shimmerAnalogSetupP;
  Init = shimmerAnalogSetupP;
  
  components HplAdc12P;
  shimmerAnalogSetupP.HplAdc12 -> HplAdc12P;
  
  components Msp430DmaC;
  shimmerAnalogSetupP.Msp430DmaControl -> Msp430DmaC;
  shimmerAnalogSetupP.Msp430DmaChannel -> Msp430DmaC.Channel0;
  
  components LedsC;
  shimmerAnalogSetupP.Leds -> LedsC;
}
  
  
tinyos-2.1.2+dfsg/tos/platforms/shimmer/shimmerAnalogSetupP.nc000066400000000000000000000171151207233610700245170ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date March, 2010

 * this is going to get duplicated in a million apps, so we gather simple setup 
 * routines with reasonable defaults here.  specific 
 */


module shimmerAnalogSetupP {
  provides{
    interface shimmerAnalogSetup;
    interface Init;
  }
  uses {
    interface Msp430DmaControl;
    interface Msp430DmaChannel;
    interface HplAdc12;
    interface Leds;
  }
}

implementation { 
  void initADC12CTL0();
  void initADC12CTL1();
  void initADC12MEMCTLx();
  void setupDMA(uint16_t * destAddr);
  void addNewChannels(uint8_t * chans, uint8_t howmany_new);

  uint8_t NUM_ADC_CHANS = 0;
  uint8_t ADC_CHANS[8];  // msp430 only has eight!

  command void shimmerAnalogSetup.addAccelInputs() {
    uint8_t new_chans[] = { 5, 4, 3 };
    addNewChannels(new_chans, 3);
    
    initADC12MEMCTLx();

    TOSH_MAKE_ADC_5_INPUT();         
    TOSH_SEL_ADC_5_MODFUNC();

    TOSH_MAKE_ADC_4_INPUT();         
    TOSH_SEL_ADC_4_MODFUNC();

    TOSH_MAKE_ADC_3_INPUT();         
    TOSH_SEL_ADC_3_MODFUNC();
  }

  command void shimmerAnalogSetup.addGyroInputs() {
    uint8_t new_chans[] = { 1, 6, 2 };    // x, y, z
    addNewChannels(new_chans, 3);
    
    initADC12MEMCTLx();

    TOSH_MAKE_ADC_1_INPUT();         
    TOSH_SEL_ADC_1_MODFUNC();

    TOSH_MAKE_ADC_6_INPUT();         
    TOSH_SEL_ADC_6_MODFUNC();

    TOSH_MAKE_ADC_2_INPUT();         
    TOSH_SEL_ADC_2_MODFUNC();
  }

  // identical to ecg
  command void shimmerAnalogSetup.addStrainGaugeInputs(){
    call shimmerAnalogSetup.addECGInputs();
  }

  command void shimmerAnalogSetup.addECGInputs() {
    uint8_t new_chans[] = { 1, 2 };  // ecg_lall, ecg_rall
    addNewChannels(new_chans, 2);
    
    initADC12MEMCTLx();

    TOSH_MAKE_ADC_1_INPUT();         
    TOSH_SEL_ADC_1_MODFUNC();

    TOSH_MAKE_ADC_2_INPUT();         
    TOSH_SEL_ADC_2_MODFUNC();
  }

  command void shimmerAnalogSetup.addUVInputs() {
    uint8_t new_chans[] = { 1, 2, 6 };    // ambient, uvb, uva
    addNewChannels(new_chans, 3);
    
    initADC12MEMCTLx();

    TOSH_MAKE_ADC_1_INPUT();         
    TOSH_SEL_ADC_1_MODFUNC();

    TOSH_MAKE_ADC_2_INPUT();         
    TOSH_SEL_ADC_2_MODFUNC();

    TOSH_MAKE_ADC_6_INPUT();         
    TOSH_SEL_ADC_6_MODFUNC();
  }

  command void shimmerAnalogSetup.addGSRInput() { 
    uint8_t new_chans[] = { 6 };
    addNewChannels(new_chans, 1);
    
    initADC12MEMCTLx();

    TOSH_MAKE_ADC_6_INPUT();         
    TOSH_SEL_ADC_6_MODFUNC();
  }

  command void shimmerAnalogSetup.addEMGInput() { 
    uint8_t new_chans[] = { 1 };  // ecg_lall, ecg_rall
    addNewChannels(new_chans, 1);
    
    initADC12MEMCTLx();

    TOSH_MAKE_ADC_1_INPUT();         
    TOSH_SEL_ADC_1_MODFUNC();

    // this channel is identical to adc1, so we we don't read it, but make it an input to avoid pushing against the signal
    TOSH_MAKE_ADC_2_INPUT();         
  }

  command void shimmerAnalogSetup.addAnExInput(uint8_t channel) { 
    uint8_t new_chans[1];

    if(channel == 0){
      new_chans[0] = 0;
      addNewChannels(new_chans, 1);

      initADC12MEMCTLx();

      TOSH_MAKE_ADC_0_INPUT();         
      TOSH_SEL_ADC_0_MODFUNC();
    }
    else if(channel == 7) {
      new_chans[0] = 7;
      addNewChannels(new_chans, 1);

      initADC12MEMCTLx();

      TOSH_MAKE_ADC_7_INPUT();         
      TOSH_SEL_ADC_7_MODFUNC();
    }
  }

  command void shimmerAnalogSetup.finishADCSetup(uint16_t * buffer){
    setupDMA(buffer);
  }
  
  command void shimmerAnalogSetup.triggerConversion() {
    call Msp430DmaChannel.startTransfer();
    call HplAdc12.startConversion();
  }

  command void shimmerAnalogSetup.stopConversion() {
    call HplAdc12.stopConversion();
    call HplAdc12.setIEFlags(0);
    call HplAdc12.resetIFGs();
  }                                            
    
  command uint8_t shimmerAnalogSetup.getNumberOfChannels() {
    return NUM_ADC_CHANS;
  }

  command void shimmerAnalogSetup.reset() {
    NUM_ADC_CHANS = 0;
  }

  command error_t Init.init() {
    initADC12CTL0();
    initADC12CTL1();
    //    initADC12MEMCTLx();

    TOSH_uwait(50000UL);
    return SUCCESS;
  }

  void addNewChannels(uint8_t * chans, uint8_t howmany_new) {
    register uint8_t i, j;
    
    for(j = 0, i = NUM_ADC_CHANS; (j < howmany_new) && (i < 8) ; i++, j++)
      ADC_CHANS[i] = chans[j];

    NUM_ADC_CHANS += howmany_new;
  }

  void initADC12CTL0()
  {

    ADC12CTL0 = 0;
    SET_FLAG(ADC12CTL0, ADC12ON);
    SET_FLAG(ADC12CTL0, REF2_5V);
    SET_FLAG(ADC12CTL0, MSC);
    SET_FLAG(ADC12CTL0, SHT0_0);
    SET_FLAG(ADC12CTL0, SHT1_0); 
  }

  void initADC12CTL1()
  {
    ADC12CTL1 = 0;
    SET_FLAG(ADC12CTL1, CONSEQ_1);
    SET_FLAG(ADC12CTL1, ADC12SSEL_3);
    SET_FLAG(ADC12CTL1, ADC12DIV_0);
    SET_FLAG(ADC12CTL1, SHP);
  }

  void initADC12MEMCTLx()
  {
    uint8_t i;

    for (i = 0; i < NUM_ADC_CHANS; ++i) {
      ADC12MCTL[i] = 0;
      SET_FLAG(ADC12MCTL[i], ADC_CHANS[i]);  // inch is lower four bits
      // don't have to do anything to set sref to AVcc_AVss, which is 0
    }    
    SET_FLAG(ADC12MCTL[i - 1], EOS);
  }

  void setupDMA(uint16_t * destAddr) {
    call Msp430DmaControl.init();                                     // blanks registers

    call Msp430DmaControl.setFlags(FALSE, FALSE, FALSE);              // enable_nmi, round_robin, on_fetch

    call Msp430DmaChannel.setupTransfer(DMA_BLOCK_TRANSFER,           //dma_transfer_mode_t transfer_mode, 
					DMA_TRIGGER_ADC12IFGx,        //dma_trigger_t trigger, 
					DMA_EDGE_SENSITIVE,           //dma_level_t level,
					(void *)ADC12MEM0_,            //void *src_addr, 
					(void *)destAddr,              //void *dst_addr, 
					NUM_ADC_CHANS,                //uint16_t size,
					DMA_WORD,                     //dma_byte_t src_byte, 
					DMA_WORD,                     //dma_byte_t dst_byte,
					DMA_ADDRESS_INCREMENTED,      //dma_incr_t src_incr, 
					DMA_ADDRESS_INCREMENTED);     //dma_incr_t dst_incr

    call Msp430DmaChannel.startTransfer();
  }
  async event void Msp430DmaChannel.transferDone(error_t success) {
  }
  async event void HplAdc12.conversionDone(uint16_t iv) {
  }
}
  
  
tinyos-2.1.2+dfsg/tos/platforms/shimmer/shimmerMessage.h000066400000000000000000000254371207233610700233760ustar00rootroot00000000000000/**
 * Copyright (c) 2004,2005 Hewlett-Packard Company
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of the Hewlett-Packard Company nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Simple message format for exchanging network data.
 * We use the 'start' index to allow messages to have data
 * prepended.
 *
 * Each message contains a 'next' field, which allows us
 * to maintain queues.
 *
 * Note that we encode 16 and 32 bit values in network byte
 * order, which is MSB (most significant byte) first.
 *
 * However, 802.15.4 multibyte fields are always encoded LSB,
 * or least significant byte first.  The Chipcon radio also
 * stores values LSB, as does the TI MSP processor.
 * This really only shows up when we are setting the PanID and
 * short address of our messages.
 * 
 * @author Andrew Christian
 */

#ifndef _MESSAGE_H
#define _MESSAGE_H


#define MESSAGE_MAX_LENGTH 128

struct Message {
  uint8_t data[ MESSAGE_MAX_LENGTH ];
  uint8_t start;
  uint8_t length;
  struct Message *next;
};

/*
 * this is useful for tracking down allocs w/out frees.  add a uint8_t who to the Message structure and then see who holds
 * all the messages using param...
#ifdef DEBUG_MESSAGE
enum {
  MSG_WHO_FREE=0,
  MSG_WHO_CLIENT_HAWR,
  MSG_WHO_CLIENT_HSNOOZET,
  MSG_WHO_CLIENT_AR,
  MSG_WHO_CLIENT_HSCANT,
  MSG_WHO_CC2420H_DELAYEDRXFIFO,
  MSG_WHO_UIP_SENDMESSAGE,
  MSG_WHO_UIP_SENDUDPMESSAGE  
};
#endif
*/


/**
 * Message manipulation functions.
 *
 * All integers are sent in network byte order - MSB first
 */

inline void msg_set_uint8( struct Message *msg, uint8_t offset, uint8_t data )
{
  uint8_t i = msg->start + offset;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[ i] = data;
}

inline void msg_set_uint16( struct Message *msg, uint8_t offset, uint16_t data )
{
  uint8_t i = msg->start + offset;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff00) >> 8;
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff);
}

inline void msg_set_saddr( struct Message *msg, uint8_t offset, uint16_t data )
{
  uint8_t i = msg->start + offset;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff);
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff00) >> 8;
}

inline void msg_set_uint32( struct Message *msg, uint8_t offset, uint32_t data )
{
  uint8_t i = msg->start + offset;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff000000) >> 24;
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0x00ff0000) >> 16;
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0x0000ff00) >> 8;
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff);
}

inline void msg_set_buf( struct Message *msg, uint8_t offset, const uint8_t *buf, uint8_t len )
{
  uint8_t i = msg->start + offset;
  for ( ; len ; len--, i++ ) {
    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
    msg->data[i] = *buf++;
  }
}

inline uint8_t msg_get_uint8( const struct Message *msg, uint8_t offset )
{
  uint8_t i = msg->start + offset;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  return msg->data[ i ];
}

inline int8_t msg_get_int8( const struct Message *msg, uint8_t offset )
{
  uint8_t i = msg->start + offset;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  return ((int8_t *)(msg->data))[ i ];
}

inline uint16_t msg_get_uint16( const struct Message *msg, uint8_t offset )
{
  uint8_t i = msg->start + offset;
  uint16_t result;

  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  result = (msg->data[i] << 8);
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  result |= msg->data[i];
  return result;
}

inline uint16_t msg_get_saddr( const struct Message *msg, uint8_t offset )
{
  uint8_t i = msg->start + offset;
  uint16_t result;

  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  result = msg->data[i];
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  result |= (msg->data[i] << 8);
  return result;
}

inline void msg_get_buf( const struct Message *msg, uint8_t offset, uint8_t *buf, uint8_t len )
{
  uint8_t i = msg->start + offset;
  for ( ; len ; len--, i++ ) {
    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
    *buf++ = msg->data[i];
  }
}

inline void msg_get_str( const struct Message *msg, uint8_t offset, uint8_t *str, uint8_t len )
{
  uint8_t i = msg->start + offset;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;

  while (--len && msg->data[i] ) {
    *str++ = msg->data[i++];
    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  }

  *str = 0;
}

inline bool msg_cmp_buf( const struct Message *msg, uint8_t offset, const uint8_t *buf, uint8_t len )
{
  uint8_t i = msg->start + offset;
  for ( ; len ; len--, i++ ) {
    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
    if ( *buf++ != msg->data[i])
      return FALSE;
  }
  return TRUE;
}

inline bool msg_cmp_str( const struct Message *msg, uint8_t offset, const uint8_t *buf )
{
  uint8_t i = msg->start + offset;
  while (1) {
    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
    if ( *buf++ != msg->data[i])
      return FALSE;
    if ( msg->data[i] == 0 )
      return TRUE;
    i++;
  }
  return TRUE;
}

inline void msg_append_uint8( struct Message *msg, uint8_t data )
{
  uint8_t i = msg->start + msg->length;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  
  msg->data[ i ] = data;
  msg->length++;
}

inline void msg_append_uint16( struct Message *msg, uint16_t data )
{
  uint8_t i = msg->start + msg->length;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff00) >> 8;
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff);
  msg->length += 2;
}

inline void msg_append_saddr( struct Message *msg, uint16_t data )
{
  uint8_t i = msg->start + msg->length;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff);
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff00) >> 8;
  msg->length += 2;
}

inline void msg_append_uint32( struct Message *msg, uint32_t data )
{
  uint8_t i = msg->start + msg->length;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff000000) >> 24;
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0x00ff0000) >> 16;
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0x0000ff00) >> 8;
  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = (data & 0xff);
  msg->length += 4;
}

inline void msg_append_buf( struct Message *msg, const uint8_t *buf, uint8_t len )
{
  uint8_t i = msg->start + msg->length;
  msg->length += len;
  for ( ; len ; len--, i++ ) {
    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
    msg->data[i] = *buf++;
  }
}

inline void msg_append_str( struct Message *msg, const uint8_t *str )
{
  uint8_t i = msg->start + msg->length;
  for ( ; *str ; i++ ) {
    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
    msg->data[i] = *str++;
    msg->length++;
  }
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  msg->data[i] = 0;
  msg->length++;
}

inline void msg_prepend_uint8( struct Message *msg, uint8_t data )
{
  msg->length++;
  if ( msg->start == 0 )
    msg->start = MESSAGE_MAX_LENGTH - 1;
  else
    msg->start--;

  msg->data[ msg->start ] = data;
}

inline void msg_add_to_front( struct Message *msg, uint8_t count )
{
  if ( msg->start < count )
    msg->start = MESSAGE_MAX_LENGTH - count + msg->start;
  else
    msg->start -= count;
  msg->length += count;
}

inline void msg_drop_from_front( struct Message *msg, uint8_t count )
{
  msg->start  += count;
  if ( msg->start >= MESSAGE_MAX_LENGTH ) msg->start -= MESSAGE_MAX_LENGTH;
  msg->length -= count;
}

inline void msg_add_to_end( struct Message *msg, uint8_t count )
{
  msg->length += count;
}

inline void msg_drop_from_end( struct Message *msg, uint8_t count )
{
  msg->length -= count;
}

inline uint8_t * msg_get_pointer( struct Message *msg, uint8_t offset )
{
  uint8_t i = msg->start + offset;
  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
  return msg->data + i;
}

inline void msg_clear( struct Message *msg )
{
  msg->length = 0;
  msg->start  = 0;
}

inline void    msg_set_length( struct Message *msg, uint8_t len )  { msg->length = len; }
inline uint8_t msg_get_length( const struct Message *msg )         { return msg->length; }
inline uint8_t msg_get_max_length( void )         { return MESSAGE_MAX_LENGTH; }

/**
 * Message queue functions.  Message queues are simple
 * linked lists.
 */

inline struct Message * pop_queue( struct Message **head )
{
  struct Message *result = *head;
  if ( result != NULL )
    *head = (*head)->next;
  return result;
}

inline void push_queue( struct Message **head, struct Message *item )
{
  item->next = *head;
  *head = item;
}

inline void append_queue( struct Message **head, struct Message *item )
{
  if (*head == NULL) {
    *head = item;
  }
  else {
    struct Message *bm = *head;
    while ( bm->next != NULL )
      bm = bm->next;
    bm->next = item;
  }
  item->next = NULL;
}

inline uint8_t count_queue( struct Message *head )
{
  uint8_t count = 0;
  while ( head ) {
    count++;
    head = head->next;
  }
  return count;
}

#endif // _BASIC_MESSAGE_H
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/000077500000000000000000000000001207233610700203235ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/.platform000066400000000000000000000051271207233610700221550ustar00rootroot00000000000000# SHIMMER2 - platform includes
# Steve Ayer, June 2009; derived from Konrad Lorincz's SHIMMER platform
#
# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.

push( @includes, qw(

      .
  %T/platforms/shimmer2
  %T/platforms/shimmer2/chips/msp430
  %T/platforms/shimmer2/chips/cc2420
  %T/platforms/shimmer2/chips/mma7260
  %T/platforms/shimmer2/chips/sd
  %T/platforms/shimmer2/chips/bluetooth
  %T/platforms/shimmer2/chips/tilt
  %T/platforms/shimmer2/chips/gyro
  %T/platforms/shimmer2/chips/gyromag
  %T/platforms/shimmer2/chips/fgpmmopa6b
  %T/platforms/shimmer2/chips/bmp085
  %T/platforms/shimmer2/chips/hmc5843
  %T/platforms/shimmer2/chips/straingauge
  %T/platforms/shimmer
  %T/platforms/shimmer/chips/msp430
  %T/platforms/shimmer/chips/mma7260
  %T/platforms/shimmer/chips/sd
  %T/platforms/shimmer/chips/sd/fatfs
  %T/platforms/shimmer/chips/bluetooth
  %T/platforms/shimmer/chips/ds2411
  %T/platforms/shimmer/chips/gsr
  %T/platforms/shimmer/chips/rmcm01
  %T/chips/cc2420
  %T/chips/cc2420/alarm
  %T/chips/cc2420/control
  %T/chips/cc2420/csma
  %T/chips/cc2420/interfaces
  %T/chips/cc2420/link
  %T/chips/cc2420/lowpan
  %T/chips/cc2420/lpl
  %T/chips/cc2420/packet
  %T/chips/cc2420/receive
  %T/chips/cc2420/spi
  %T/chips/cc2420/transmit
  %T/chips/cc2420/unique
  %T/chips/cc2420/security
  %T/chips/msp430
  %T/chips/msp430/adc12
  %T/chips/msp430/dma
  %T/chips/msp430/pins
  %T/chips/msp430/timer
  %T/chips/msp430/usart
  %T/chips/msp430/sensors
  %T/lib/timer
  %T/lib/serial
  %T/lib/adc
  %T/lib/power
  ) );

@opts = qw(

  -gcc=msp430-gcc
  -mmcu=msp430f1611
  -fnesc-target=msp430
  -fnesc-no-debug
);

push @opts, "-mdisable-hwmul" if `msp430-gcc --version | grep 3.2.3`;
push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

$ENV{'CIL_MACHINE'} =
    "version_major=3 " .
    "version_minor=2 " .
    "version=msp430-3.2.3 " .
    "short=2,2 " .
    "int=2,2 " .
    "long=4,2 " .
    "long_long=8,2 " .
    "pointer=2,2 " .
    "enum=2,2 " .
    "float=4,2 " .
    "double=4,2 " .
    "long_double=4,2 " .
    "void=1,1 " .
    "fun=1,2 " .
    "wchar_size_size=2,2 " .
    "alignof_string=1 " .
    "max_alignment=1 " .
    "char_wchar_signed=true,true " .
    "const_string_literals=true " .
    "big_endian=false " .
    "underscore_name=false " .
    "__builtin_va_list=true " .
    "__thread_is_keyword=true";
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/ActiveMessageC.nc000066400000000000000000000061501207233610700234720ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Philip Levis
 * Date last modified:  $Id: ActiveMessageC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $
 *
 */
/**
 * The Active Message layer on the SHIMMER platform. This is a naming wrapper
 * around the CC2420 Active Message layer.
 *
 * @author Konrad Lorincz
 */
#include "Timer.h"

configuration ActiveMessageC {
  provides {
    interface SplitControl;

    interface AMSend[uint8_t id];
    interface Receive[uint8_t id];
    interface Receive as Snoop[uint8_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;
    interface LowPowerListening;
  }
}
implementation {
  components CC2420ActiveMessageC as AM;

  SplitControl = AM;
  
  AMSend       = AM;
  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/HplUserButtonC.nc000066400000000000000000000044151207233610700235320ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telos platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 *
 * @author Mike Healy
 * @date May 9, 2009 - modified for use with SHIMMER2
 */

configuration HplUserButtonC {
  provides interface GeneralIO;
  provides interface GpioInterrupt;
}
implementation {
  components HplMsp430GeneralIOC as GeneralIOC;
  components HplMsp430InterruptC as InterruptC;

  components new Msp430GpioC() as UserButtonC;
  UserButtonC -> GeneralIOC.Port20;
  GeneralIO = UserButtonC;

  components new Msp430InterruptC() as InterruptUserButtonC;
  InterruptUserButtonC.HplInterrupt -> InterruptC.Port20;
  GpioInterrupt = InterruptUserButtonC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/Leds.nc000066400000000000000000000111131207233610700215310ustar00rootroot00000000000000// $Id: Leds.nc,v 1.4 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2005-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Commands for controlling three LEDs. A platform can provide this
 * interface if it has more than or fewer than three LEDs. In the
 * former case, these commands refer to the first three LEDs. In the
 * latter case, some of the commands are null operations, and the set
 * of non-null operations must be contiguous and start at Led1. That
 * is, on platforms with 2 LEDs, LED 3's commands are null operations,
 * while on platforms with 1 LED, LED 2 and LED 3's commands are null
 * opertations.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 */

#include "Leds.h"

interface Leds {

  /**
   * Turn on LED 0. The color of this LED depends on the platform.
   */
  async command void led0On();

  /**
   * Turn off LED 0. The color of this LED depends on the platform.
   */
  async command void led0Off();

  /**
   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led0Toggle();

  /**
   * Turn on LED 1. The color of this LED depends on the platform.
   */
  async command void led1On();

  /**
   * Turn off LED 1. The color of this LED depends on the platform.
   */
  async command void led1Off();

   /**
   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led1Toggle();

 
  /**
   * Turn on LED 2. The color of this LED depends on the platform.
   */
  async command void led2On();

  /**
   * Turn off LED 2. The color of this LED depends on the platform.
   */
  async command void led2Off();

   /**
   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led2Toggle();
  
  /**
   * Get the current LED settings as a bitmask. Each bit corresponds to
   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
   * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression
   * will determine whether LED 2 is on:
   *
   * 
         (call Leds.get() & LEDS_LED2) 
        
   *
   * This command supports up to 8 LEDs; if a platform has fewer, then
   * those LEDs should always be off (their bit is zero). Also see
   * set().
   *
   * @return a bitmask describing which LEDs are on and which are off
   */ 
  async command uint8_t get();

  
  /**
   * Set the current LED configuration using a bitmask.  Each bit
   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
   * this statement will configure the LEDs so LED 0 and LED 2 are on:
   *
   * 
         call Leds.set(LEDS_LED0 | LEDS_LED2); 
        
   *
   * This statement will turn LED 1 on if it was not already:
   *
   * 
        call Leds.set(call Leds.get() | LEDS_LED1);
        
   *
   * @param  val   a bitmask describing the on/off settings of the LEDs
   */
   async command void set(uint8_t val);
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/LedsC.nc000066400000000000000000000040731207233610700216430ustar00rootroot00000000000000// $Id: LedsC.nc,v 1.4 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 *
 * The basic TinyOS LEDs abstraction.
 *
 * @author Phil Buonadonna
 * @author David Gay
 * @author Philip Levis
 * @author Joe Polastre
 *
 */


configuration LedsC {
  provides interface Leds;
}
implementation {
  components LedsP, PlatformLedsC;

  Leds = LedsP;

  LedsP.Init <- PlatformLedsC.Init;
  LedsP.Led0 -> PlatformLedsC.Led0;
  LedsP.Led1 -> PlatformLedsC.Led1;
  LedsP.Led2 -> PlatformLedsC.Led2;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/LedsP.nc000066400000000000000000000076341207233610700216660ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.4 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 * @date   March 21, 2005
 *
 */

module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led0.set();
      call Led1.set();
      call Led2.set();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
    call Led1.clr();
    DBGLED(1);
  }

  async command void Leds.led1Off() {
    call Led1.set();
    DBGLED(1);
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    DBGLED(1);
  }

  async command void Leds.led2On() {
    call Led2.clr();
    DBGLED(2);
  }

  async command void Leds.led2Off() {
    call Led2.set();
    DBGLED(2);
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    DBGLED(2);
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (!call Led0.get()) {
	      rval |= LEDS_LED0;
      }
      if (!call Led1.get()) {
	      rval |= LEDS_LED1;
      }
      if (!call Led2.get()) {
	      rval |= LEDS_LED2;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	      call Leds.led0On();
      }
      else {
	      call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
	      call Leds.led1On();
      }
      else {
	      call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
	      call Leds.led2On();
      }
      else {
	      call Leds.led2Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/MoteClockC.nc000066400000000000000000000035471207233610700226410ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universität Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $Id: MoteClockC.nc,v 1.1 2009-09-04 18:27:46 ayer1 Exp $
 *
 */

 /**
 * @author Vlado Handziski 
 */
 
configuration MoteClockC
{
  provides interface Init as MoteClockInit;
}
implementation

{
  components Msp430ClockC;
  
  MoteClockInit = Msp430ClockC.Init;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/MotePlatformC.nc000066400000000000000000000151351207233610700233660ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steven Ayer
 * @date   July 2007
 * 
 * tos-2.x port June 2009
 *
 */

module MotePlatformC {
  provides interface Init;
}

implementation {

  command error_t Init.init() {
    
    // have to tell mux to connect path from msp430 to sd
    TOSH_SEL_DOCK_N_IOFUNC();
    TOSH_MAKE_DOCK_N_OUTPUT();
    TOSH_SET_DOCK_N_PIN();

    // bus arbitration pins 
    TOSH_SEL_SW_SD_PWR_N_IOFUNC();
    TOSH_MAKE_SW_SD_PWR_N_OUTPUT();

    TOSH_SEL_SD_CS_N_IOFUNC();
    TOSH_MAKE_SD_CS_N_OUTPUT();

    TOSH_SEL_SD_CLK_IOFUNC();
    TOSH_MAKE_SD_CLK_OUTPUT();
    TOSH_SEL_SD_DO_IOFUNC();
    TOSH_MAKE_SD_DO_INPUT();
    TOSH_SEL_SD_DI_IOFUNC();
    TOSH_MAKE_SD_DI_OUTPUT();
  
    // power down sd module; overridden by dock pin on programming board
    /*
     * other pins are zeroed to reset card
     * at end of this routine, we raise them again (they have pullups, too)
     */
    TOSH_SET_SW_SD_PWR_N_PIN();     
    TOSH_CLR_SD_CS_N_PIN();
    TOSH_CLR_SD_DI_PIN();
    TOSH_CLR_SD_CLK_PIN();
  
    TOSH_SEL_SW_BT_PWR_N_IOFUNC();
    TOSH_MAKE_SW_BT_PWR_N_OUTPUT();
    TOSH_SET_SW_BT_PWR_N_PIN();     // power down bt module; overridden by dock pin on programming board

    //LEDS
    TOSH_SEL_RED_LED_IOFUNC();
    TOSH_MAKE_RED_LED_OUTPUT();
    TOSH_SEL_YELLOW_LED_IOFUNC();
    TOSH_MAKE_YELLOW_LED_OUTPUT();
    TOSH_SEL_GREEN_LED_IOFUNC();
    TOSH_MAKE_GREEN_LED_OUTPUT();

    TOSH_SET_RED_LED_PIN();
    TOSH_SET_YELLOW_LED_PIN();
    TOSH_SET_GREEN_LED_PIN();

    //RADIO PINS
    //CC2420 pins
    TOSH_MAKE_RADIO_VREF_OUTPUT();
    TOSH_SEL_RADIO_VREF_IOFUNC();
    TOSH_CLR_RADIO_VREF_PIN();    // power down 

    TOSH_MAKE_RADIO_CSN_OUTPUT();
    TOSH_SEL_RADIO_CSN_IOFUNC();
    TOSH_SET_RADIO_CSN_PIN();

    // should be reset_n
    TOSH_MAKE_RADIO_RESET_OUTPUT();
    TOSH_SEL_RADIO_RESET_IOFUNC();
    TOSH_CLR_RADIO_RESET_PIN();

    TOSH_SEL_RADIO_CCA_IOFUNC();
    TOSH_MAKE_RADIO_CCA_INPUT();
    TOSH_SEL_RADIO_FIFO_IOFUNC();
    TOSH_MAKE_RADIO_FIFO_INPUT();
    TOSH_SEL_RADIO_FIFOP_IOFUNC();
    TOSH_MAKE_RADIO_FIFOP_INPUT();
    TOSH_SEL_RADIO_SFD_IOFUNC();
    TOSH_MAKE_RADIO_SFD_INPUT();

    TOSH_SEL_TILT_IOFUNC();
    TOSH_MAKE_TILT_INPUT();

    // BT PINS
    TOSH_MAKE_BT_RESET_OUTPUT();  
    TOSH_SEL_BT_RESET_IOFUNC();    
    TOSH_CLR_BT_RESET_PIN();   // mitsumi module disabled by clr

    TOSH_MAKE_BT_RTS_INPUT();      
    TOSH_SEL_BT_RTS_IOFUNC();

    TOSH_MAKE_BT_PIO_INPUT();
    TOSH_SEL_BT_PIO_IOFUNC();

    TOSH_MAKE_BT_CTS_OUTPUT();
    TOSH_SEL_BT_CTS_IOFUNC();

    TOSH_MAKE_BT_TXD_OUTPUT();
    TOSH_SEL_BT_TXD_IOFUNC();

    TOSH_MAKE_BT_RXD_INPUT();
    TOSH_SEL_BT_RXD_IOFUNC();

    // BSL Prog Pins tristate em
    TOSH_MAKE_PROG_IN_OUTPUT();
    TOSH_MAKE_PROG_OUT_OUTPUT();
    TOSH_SET_PROG_OUT_PIN();    // some expansion boards have enable low
    TOSH_SEL_PROG_IN_IOFUNC();
    TOSH_SEL_PROG_OUT_IOFUNC();

    // ADC lines
    TOSH_SEL_ADC_0_IOFUNC();
    TOSH_MAKE_ADC_0_OUTPUT();
    TOSH_SEL_ADC_1_IOFUNC();
    TOSH_MAKE_ADC_1_OUTPUT();
    TOSH_SEL_ADC_2_IOFUNC();
    TOSH_MAKE_ADC_2_OUTPUT();
    TOSH_SEL_ADC_6_IOFUNC();
    TOSH_MAKE_ADC_6_OUTPUT();
    TOSH_SEL_ADC_7_IOFUNC();
    TOSH_MAKE_ADC_7_OUTPUT();

    TOSH_SEL_ADC_ACCELZ_IOFUNC();
    TOSH_MAKE_ADC_ACCELZ_INPUT();
    TOSH_SEL_ADC_ACCELY_IOFUNC();
    TOSH_MAKE_ADC_ACCELY_INPUT();
    TOSH_SEL_ADC_ACCELX_IOFUNC();
    TOSH_MAKE_ADC_ACCELX_INPUT();
  
    TOSH_SEL_ROSC_IOFUNC();
    TOSH_MAKE_ROSC_INPUT();

    // 1-wire function
    TOSH_SEL_ONEWIRE_IOFUNC();
    TOSH_MAKE_ONEWIRE_OUTPUT();
    TOSH_SET_ONEWIRE_PIN();

    /*
     *  Accelerometer pin definitions
     * unless the accel_sel0 pin is cleared, 
     * a severe quiescent power hit occurs on the msp430
     * we go from 3.7 ua to 65.1 ua when asleep!
     */
    TOSH_SEL_ACCEL_SEL0_IOFUNC();
    TOSH_MAKE_ACCEL_SEL0_OUTPUT();
    TOSH_CLR_ACCEL_SEL0_PIN();
    TOSH_SEL_ACCEL_SEL1_IOFUNC();
    TOSH_MAKE_ACCEL_SEL1_OUTPUT();
    TOSH_CLR_ACCEL_SEL1_PIN();
    TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
    TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT();
    TOSH_CLR_ACCEL_SLEEP_N_PIN();

    // idle expansion header pins
    TOSH_SEL_SER0_CTS_IOFUNC();
    TOSH_MAKE_SER0_CTS_OUTPUT();
    TOSH_SEL_SER0_RTS_IOFUNC();
    TOSH_MAKE_SER0_RTS_OUTPUT();

    // this pin is now tied to the user button on the prog board
    TOSH_SEL_GIO0_IOFUNC();
    TOSH_MAKE_GIO0_INPUT();

    TOSH_SEL_GIO1_IOFUNC();
    TOSH_MAKE_GIO1_OUTPUT();

    TOSH_SEL_UTXD0_IOFUNC();
    TOSH_MAKE_UTXD0_OUTPUT();
    TOSH_SEL_URXD0_IOFUNC();
    TOSH_MAKE_URXD0_OUTPUT();
    TOSH_SET_URXD0_PIN();

    TOSH_SEL_UTXD1_IOFUNC();
    TOSH_MAKE_UTXD1_OUTPUT();
    TOSH_SEL_URXD1_IOFUNC();
    TOSH_MAKE_URXD1_OUTPUT();
    TOSH_SEL_UCLK1_IOFUNC();
    TOSH_MAKE_UCLK1_OUTPUT();
    TOSH_SEL_SIMO1_IOFUNC();
    TOSH_MAKE_SIMO1_OUTPUT();
    TOSH_SEL_SOMI1_IOFUNC();
    TOSH_MAKE_SOMI1_INPUT();

    TOSH_SET_SD_CS_N_PIN();
    TOSH_SET_SD_DI_PIN();
    TOSH_SET_SD_CLK_PIN();

    // these are attached to the same pullup as above
    TOSH_SET_SIMO1_PIN();
    TOSH_SET_UCLK1_PIN();

    // set it back to default state
    TOSH_MAKE_DOCK_N_INPUT();

    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/Msp430Timer32khzMapC.nc000066400000000000000000000065221207233610700242640ustar00rootroot00000000000000//$Id: Msp430Timer32khzMapC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * MSP430Timer32khzMapC presents as paramaterized interfaces all of
 * the 32khz hardware timers on the MSP430 that are available for
 * compile time allocation by "new Alarm32khz16C()", "new
 * AlarmMilli32C()", and so on.  
 *
 * Platforms based on the MSP430 are * encouraged to copy in and
 * override this file, presenting only the * hardware timers that are
 * available for allocation on that platform.
 *
 * @author Cory Sharp 
 * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:54 $
 */

configuration Msp430Timer32khzMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
  Msp430Compare[0] = Msp430TimerC.CompareB0;

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
  Msp430Compare[1] = Msp430TimerC.CompareB1;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
  Msp430Compare[2] = Msp430TimerC.CompareB2;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
  Msp430Compare[3] = Msp430TimerC.CompareB3;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
  Msp430Compare[4] = Msp430TimerC.CompareB4;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
  Msp430Compare[5] = Msp430TimerC.CompareB5;

  Msp430Timer[6] = Msp430TimerC.TimerB;
  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
  Msp430Compare[6] = Msp430TimerC.CompareB6;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/NoLedsC.nc000066400000000000000000000050311207233610700221330ustar00rootroot00000000000000// $Id: NoLedsC.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * A null operation replacement for the LedsC component. As many
 * components might concurrently signal information through LEDs,
 * using LedsC and NoLedsC allows an application builder to select
 * which components control the LEDs.
 *
 * @author Philip Levis
 * @date   March 19, 2005
 *
 */

module NoLedsC {
  provides interface Init;
  provides interface Leds;
}
implementation {

  command error_t Init.init() {return SUCCESS;}

  async command void Leds.led0On() {}
  async command void Leds.led0Off() {}
  async command void Leds.led0Toggle() {}

  async command void Leds.led1On() {}
  async command void Leds.led1Off() {}
  async command void Leds.led1Toggle() {}

  async command void Leds.led2On() {}
  async command void Leds.led2Off() {}
  async command void Leds.led2Toggle() {}

  async command uint8_t Leds.get() {return 0;}
  async command void Leds.set(uint8_t val) {}
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/PlatformC.nc000066400000000000000000000036641207233610700225450ustar00rootroot00000000000000/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre and Cory Sharp
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
 */
#include "hardware.h"

configuration PlatformC
{
  provides interface Init;
}
implementation
{
  components PlatformP, MotePlatformC, MoteClockC;

  Init = PlatformP;
  PlatformP.MoteClockInit -> MoteClockC;
  PlatformP.MoteInit -> MotePlatformC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/PlatformLedsC.nc000066400000000000000000000045061207233610700233510ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $

/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
 */

#include "hardware.h"

configuration PlatformLedsC {
  provides interface GeneralIO as Led0;
  provides interface GeneralIO as Led1;
  provides interface GeneralIO as Led2;
  uses interface Init;
}
implementation
{
  components 
      HplMsp430GeneralIOC as GeneralIOC
    , new Msp430GpioC() as Led0Impl
    , new Msp430GpioC() as Led1Impl
    , new Msp430GpioC() as Led2Impl
    ;
  components PlatformP;

  Init = PlatformP.LedsInit;

  Led0 = Led0Impl;
  Led0Impl -> GeneralIOC.Port40;

  Led1 = Led1Impl;
  Led1Impl -> GeneralIOC.Port42;

  Led2 = Led2Impl;
  Led2Impl -> GeneralIOC.Port43;

}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/PlatformP.nc000066400000000000000000000006601207233610700225530ustar00rootroot00000000000000#include "hardware.h"

module PlatformP{
  provides interface Init;
  uses interface Init as MoteClockInit;
  uses interface Init as MoteInit;
  uses interface Init as LedsInit;
}
implementation {
  command error_t Init.init() {
    WDTCTL = WDTPW + WDTHOLD;
    call MoteClockInit.init();
    call MoteInit.init();
    call LedsInit.init();
    return SUCCESS;
  }

  default command error_t LedsInit.init() { return SUCCESS; }

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/PlatformSerialC.nc000066400000000000000000000041001207233610700236670ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * mostly copied from shimmer
 *
 * @author Steve Ayer
 * @date   June 2009
 */

configuration PlatformSerialC {
  provides interface StdControl;
  provides interface UartStream;
  provides interface UartByte;
}

implementation {
  components new Msp430Uart0C() as UartC;
  UartStream = UartC;  
  UartByte = UartC;
  
  components ShimmerSerialP;
  StdControl = ShimmerSerialP;
  ShimmerSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
  ShimmerSerialP.Resource -> UartC.Resource;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/ShimmerSerialP.nc000066400000000000000000000047101207233610700235330ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date June 2009
 */

module ShimmerSerialP {
  provides interface StdControl;
  provides interface Msp430UartConfigure;
  uses interface Resource;
}

implementation {
  msp430_uart_union_config_t msp430_uart_shimmer2_config = { 
    { ubr: UBR_1MHZ_115200, 
      umctl: UMCTL_1MHZ_115200, 
      ssel: 0x02, 
      pena: 0, 
      pev: 0, 
      spb: 0, 
      clen: 1, 
      listen: 0, 
      mm: 0, 
      ckpl: 0, 
      urxse: 0, 
      urxeie: 1, 
      urxwie: 0, 
      utxe : 1, 
      urxe : 1 
    } 
  };

  command error_t StdControl.start(){
    return call Resource.immediateRequest();
  }
  
  command error_t StdControl.stop(){
    call Resource.release();
    return SUCCESS;
  }

  event void Resource.granted(){}

  async command msp430_uart_union_config_t * Msp430UartConfigure.getConfig(){
    return &msp430_uart_shimmer2_config;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/TimeSyncMessageC.nc000066400000000000000000000056421207233610700240170ustar00rootroot00000000000000// $Id: TimeSyncMessageC.nc,v 1.2 2010/05/17 13:12:21 ayer Exp $

/*
 * "Copyright (c) 2004-2005 The Regents of the University  of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 *
 * The Active Message layer on the shimmer platform. This is a naming wrapper
 * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
 *
 * @author Konrad Lorincz
 * @author Brano Kusy
 * @date June 19 2005
 */

configuration TimeSyncMessageC {
  provides
  {
    interface SplitControl;
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface LowPowerListening;

    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;

    interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacket32khz;

    interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacketMilli;
  }
}
implementation {
  components CC2420TimeSyncMessageC as AM;

  SplitControl = AM;

  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;

  TimeSyncAMSend32khz       = AM;
  TimeSyncAMSendMilli       = AM;
  TimeSyncPacket32khz       = AM;
  TimeSyncPacketMilli       = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/000077500000000000000000000000001207233610700214315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/bluetooth/000077500000000000000000000000001207233610700234365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/bluetooth/RovingNetworksC.nc000077500000000000000000000047201207233610700270720ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 *  Author:  Steve Ayer
 *           February, 2007
 */
/**
 * @author Steve Ayer
 * @author Adrian Burns
 * @date February, 2007
 *
 * @author Mike Healy
 * @date April 20, 2009 - ported to TinyOS 2.x 
 */



configuration RovingNetworksC {
   provides {
      interface StdControl;
      interface Bluetooth;
      interface Init;
   }
}
implementation {
   components 
     RovingNetworksP,
     MainC,
     HplMsp430InterruptC,  
     HplMsp430Usart1C,     
     LedsC;

   StdControl = RovingNetworksP;
   Bluetooth = RovingNetworksP;
   Init = RovingNetworksP;

   RovingNetworksP.UARTControl            -> HplMsp430Usart1C.HplMsp430Usart;
   RovingNetworksP.UARTData               -> HplMsp430Usart1C.HplMsp430UsartInterrupts;
   RovingNetworksP.RTSInterrupt           -> HplMsp430InterruptC.Port16;
   RovingNetworksP.ConnectionInterrupt    -> HplMsp430InterruptC.Port26;
   RovingNetworksP.Leds                   -> LedsC;

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/bmp085/000077500000000000000000000000001207233610700224445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/bmp085/Bmp085P.nc000066400000000000000000000236161207233610700240710ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * @author Steve Ayer
 * @date November, 2010
 *
 * driver for bosch bmp085 pressure sensor module (port from tos-1.x)
 */

module Bmp085P {
  provides {
    interface Init;
    interface StdControl;
    interface PressureSensor;
  }
  uses {
    interface I2CPacket as I2CPacket;

    interface Init as I2CInit;

    interface HplMsp430I2C as HplI2C;
    //    interface HplMsp430Usart as Usart;
    interface HplMsp430UsartInterrupts as UsartInterrupts;
    interface HplMsp430I2CInterrupts as I2CInterrupts;

    interface HplMsp430Interrupt as EOCInterrupt;
    interface HplMsp430GeneralIO as Msp430GeneralIO;

  }
}

implementation {
  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));
  extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));

  void readReg(uint8_t reg_addr, uint8_t size);

  uint8_t readbuff[128], bytesToRead, regToRead, bytesRead, cal_run;
  uint16_t sbuf0[64];
  uint8_t packet[4];
  bool enabled;

  // sensing mode
  uint8_t oss;  // default is ultra high res

  // calibration vars
  int16_t AC1, AC2, AC3, B1, B2, MB, MC, MD;
  uint16_t AC4, AC5, AC6;
  
  // calculation vars
  int32_t x1, x2, x3, b3, b5, b6, press;
  uint32_t b4, b7, up, ut;
  int16_t temp;

  bool operatingState;

  /*
   * these settings aren't used, as these bitfields
   * cause trouble and are ignored in the hpl layer
   */
  msp430_i2c_union_config_t msp430_i2c_my_config = { 
    {
      rxdmaen : 0, 
      txdmaen : 0, 
      xa : 0, 
      listen : 0, 
      mst : 1,
      i2cword : 0, 
      i2crm : 1, 
      i2cssel : 0x2, 
      i2cpsc : 0, 
      i2csclh : 0x3, 
      i2cscll : 0x3,
      i2coa : 0,
    } 
  };

  enum {
    WAITING_ON_REG,
    NORMAL
  };

  command error_t Init.init() {
    TOSH_SET_ADC_1_PIN();   // this is a pull-up to enable the i2c bus

    TOSH_SET_ADC_2_PIN();   // module clear pin, logical false (basically reset)

    call HplI2C.setModeI2C(&msp430_i2c_my_config);
    call I2CInit.init();

    TOSH_MAKE_SER0_RTS_INPUT();  // this is the EOC (end o calculation) pin

    oss = 3;

    operatingState = NORMAL;

    enabled = FALSE;

    return SUCCESS;
  }

  task void cal(){
    readReg(0xaa, 22);
  }

  command error_t StdControl.start(){
    // this is the EOC (end o calculation) pin

    atomic {
      call Msp430GeneralIO.makeInput();
      call Msp430GeneralIO.selectIOFunc();
      call EOCInterrupt.disable();
      call EOCInterrupt.edge(TRUE);
      call EOCInterrupt.clear();
      call EOCInterrupt.enable();
    }

    call PressureSensor.powerUp();

    TOSH_uwait(15000);  // power-on startup time

    enabled = TRUE;

    post cal();

    return SUCCESS;
  }

  command error_t StdControl.stop(){
    call EOCInterrupt.disable();

    enabled = FALSE;
    call PressureSensor.powerDown();

    call EOCInterrupt.clear();

    TOSH_CLR_ADC_1_PIN();   // disable the i2c bus
    
    return SUCCESS;
  }

  command void PressureSensor.disableBus(){
    call HplI2C.disableI2C();
    enabled = FALSE;
    call EOCInterrupt.disable();

    call EOCInterrupt.clear();

    //    TOSH_CLR_ADC_1_PIN();   // disable the i2c bus
  }

  command void PressureSensor.enableBus(){
    TOSH_SET_ADC_1_PIN();   // this is a pull-up to enable the i2c bus

    call HplI2C.setModeI2C(&msp430_i2c_my_config);

    enabled = TRUE;
    call EOCInterrupt.clear();
    call EOCInterrupt.enable();
  }

  command void PressureSensor.powerUp(){
    TOSH_SET_ADC_2_PIN();   // out of reset
  }

  command void PressureSensor.powerDown(){
    TOSH_CLR_ADC_2_PIN();   // reset
  }

  void readReg(uint8_t reg_addr, uint8_t size){
    // first we have to write the unary register address
    uint8_t ra = reg_addr;

    operatingState = WAITING_ON_REG;
    bytesToRead = size;

    call I2CInit.init();
    call I2CPacket.write(I2C_START | I2C_STOP, 0x77, 1, &ra);
  }
  
  error_t writeReg(uint8_t reg_addr, uint8_t val) {
    // pack the packet with address of reg target, then register value
    *packet = reg_addr;
    *(packet + 1) = val;
    *(packet + 2) = *(packet + 3) = 0;

    call I2CInit.init();
    // write addr is 0xee, so 7-bit addr should be 77
    return call I2CPacket.write(I2C_START | I2C_STOP, 0x77, 3, packet);
  }

  task void cleanup() {
    readReg(regToRead, bytesToRead);
  }

  async event void EOCInterrupt.fired() {
    call EOCInterrupt.clear();
    
    post cleanup();
  }

  command void PressureSensor.readTemperature() {
    operatingState = NORMAL;

    regToRead = 0xf6;
    bytesToRead = 2;

    writeReg(0xf4, 0x2e);
  }
    
  command void PressureSensor.readPressure(){
    uint8_t pressureMode;

    pressureMode = 0x34 + (oss << 6);
    operatingState = NORMAL;
    
    regToRead = 0xf6;
    bytesToRead = 3;

    writeReg(0xf4, pressureMode);
  }

  task void calc_temp() {
    x1 = (ut - AC6) * AC5 >> 15;
    x2 = ((int32_t)MC  << 11) / (x1 + (int32_t)MD);
    b5 = x1 + x2;
    temp = (b5 + 8) >> 4;

    signal PressureSensor.tempAvailable(&temp);
  }    

  task void calc_press() {
    b6 = b5 - 4000;
    x1 = (int32_t)B2 * (b6 * b6 >> 12) >> 11;
    x2 = (int32_t)AC2 * b6 >> 11;
    x3 = x1 + x2;
    b3 = (((((int32_t)AC1 << 2) + x3) << oss) + 2) >> 2;
    x1 = (int32_t)AC3 * b6 >> 13;
    x2 = (int32_t)B1 * (b6 * b6 >> 12) >> 16;
    x3 = (x1 + x2 + 2) >> 2;
    b4 = (uint32_t)AC4 * (uint32_t)(x3 + 32768L) >> 15;
    b7 = (uint32_t)(up - b3) * (50000UL >> oss);

    if(b7  < 0x80000000UL)
      press = (b7 << 1) / b4;
    else
      press = b7 / b4 << 1;
    x1 = (press >> 8) * (press >> 8);
    x1 = x1 * 3038 >> 16;
    x2 = -7357 * press >> 16;

    press = press + ((x1 + x2 + 3791) >> 4);

    signal PressureSensor.pressAvailable(&press);
  }

  task void store_cal(){
    uint16_t * src;
    
    src = sbuf0;
    AC1 = *(int16_t *)src++;
    AC2 = *(int16_t *)src++;
    AC3 = *(int16_t *)src++;
    AC4 = *src++;
    AC5 = *src++;
    AC6 = *src++;
    B1 = *(int16_t *)src++;
    B2 = *(int16_t *)src++;
    MB = *(int16_t *)src++;
    MC = *(int16_t *)src++;
    MD = *(int16_t *)src++;
  }

  task void collect_data() {
    register uint8_t i;
    uint16_t * src, * dest;
    uint8_t swapbuff[128];
    uint8_t pressureData[4];

    // temp
    if(bytesRead == 2){
      src = swapbuff;
      *(swapbuff + 1) = *readbuff;
      *swapbuff = *(readbuff + 1);
      ut = *src;

      post calc_temp();
    }
    // pressure
    else if(bytesRead == 3){
      *pressureData = *readbuff;
      *(pressureData + 1) = *(readbuff + 1);
      *(pressureData + 2) = *(readbuff + 2);
      up = ((uint32_t)*pressureData << 16 | (uint32_t)*(pressureData + 1) << 8 | *(pressureData + 2)) >> (8 - oss);

      post calc_press();
    }
    // calibration
    else if(!(bytesRead % 2)){
      src = swapbuff;
      dest = sbuf0;
      for(i = 0; i < bytesRead; i+=2){
	*(swapbuff + i + 1) = *(readbuff + i);
	*(swapbuff + i) = *(readbuff + i + 1);
	*dest++ = *src++;
      }
      post store_cal();
    }
  }

  /*
   * 0 = ultra low power; power ~3uA, conversion time 4.5ms
   * 1 = standard       ; power ~5uA, conversion time 7.5ms
   * 2 = high res       ; power ~7uA, conversion time 13.5ms
   * 3 = ultra high res ; power ~12uA, conversion time 25.5ms
   */
  command void PressureSensor.setSensingMode(uint8_t mode){
    oss = mode;
  }

  async event void I2CPacket.readDone(error_t _success, uint16_t _addr, uint8_t _length, uint8_t* _data) { 
    if(enabled){
      bytesRead = _length;
      memcpy(readbuff, _data, _length);
      post collect_data();
    }
  }

  async event void I2CPacket.writeDone(error_t _success, uint16_t _addr, uint8_t _length, uint8_t* _data) { 
    if(enabled){
      if(operatingState == WAITING_ON_REG){
	call I2CPacket.read(I2C_START | I2C_STOP, 0x77, bytesToRead, readbuff);
	operatingState = NORMAL;
      }
    }
  }

  async event void UsartInterrupts.rxDone( uint8_t data ) {}
  async event void UsartInterrupts.txDone() {}
  async event void I2CInterrupts.fired() {}

  /*
  // these will trigger from the i2civ, but separate interrupts are available in i2cifg (separate enable, too).
  async event void I2CEvents.arbitrationLost() { }
  async event void I2CEvents.noAck() { }
  async event void I2CEvents.ownAddr() { }
  async event void I2CEvents.readyRegAccess() { }
  async event void I2CEvents.readyRxData() { }
  async event void I2CEvents.readyTxData() { }
  async event void I2CEvents.generalCall() { }
  async event void I2CEvents.startRecv() { }
  */
}
  





tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/bmp085/PressureSensor.nc000066400000000000000000000041021207233610700257650ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   September, 2010
 *
 */

interface PressureSensor { 
  command void powerUp();

  command void powerDown();

  /*
   * range 0 to 3, lowest power to highest resolution
   * see driver for details
   */
  command void setSensingMode(uint8_t mode);

  command void readTemperature();
  command void readPressure();

  command void disableBus();
  command void enableBus();

  event void tempAvailable(int16_t * data);
  event void pressAvailable(int32_t * data);
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/bmp085/PressureSensorC.nc000066400000000000000000000047551207233610700261060ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   November, 2010
 */


configuration PressureSensorC {
  provides {
    interface Init;
    interface StdControl;
    interface PressureSensor;
  }
}

implementation {
  components Bmp085P;
  Init           = Bmp085P;
  StdControl     = Bmp085P;
  PressureSensor = Bmp085P;

  enum {
    CLIENT_ID = unique( MSP430_I2CO_BUS ),
  };

  components Msp430I2CP;        // this is mine, ported from tos-1.x; find it in shimmer/chips/msp430
  Bmp085P.I2CPacket -> Msp430I2CP.I2CBasicAddr;
  Bmp085P.I2CInit   -> Msp430I2CP.I2CInit;

  components HplMsp430I2C0C;
  Bmp085P.HplI2C -> HplMsp430I2C0C;
  Msp430I2CP.HplI2C -> HplMsp430I2C0C;

  components HplMsp430Usart0C;
  Msp430I2CP.I2CInterrupts -> HplMsp430Usart0C;

  components HplMsp430InterruptP;
  Bmp085P.EOCInterrupt -> HplMsp430InterruptP.Port13;

  components HplMsp430GeneralIOC as GpioC; 
  Bmp085P.Msp430GeneralIO -> GpioC.Port13;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420/000077500000000000000000000000001207233610700223265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420/HplCC2420AlarmC.nc000066400000000000000000000040231207233610700251700ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2009-10-21 18:13:22 $
 */

generic configuration HplCC2420AlarmC() {

  provides interface Init;
  provides interface Alarm as Alarm32khz32;

}

implementation {

  components new Alarm32khz32C();

  Init = Alarm32khz32C;
  Alarm32khz32 = Alarm32khz32C;
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420/HplCC2420InterruptsC.nc000066400000000000000000000061371207233610700263230ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of interrupts and captures for the ChipCon
 * CC2420 radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.3 $ $Date: 2010-01-20 18:17:32 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 * re-written to use interrupt-driven sfd capture; 
 * shimmer2 does not have sfd wired to a timer pin
 * @author Steve Ayer
 * @date January, 2010
 */

configuration HplCC2420InterruptsC {

  provides interface GpioCapture as CaptureSFD;
  provides interface GpioInterrupt as InterruptSFD;

  provides interface GpioInterrupt as InterruptCCA;
  provides interface GpioInterrupt as InterruptFIFOP;

}

implementation {

  components HplMsp430InterruptC;
  components new Msp430InterruptC() as InterruptCCAC;
  components new Msp430InterruptC() as InterruptFIFOPC;
  components new Msp430InterruptC() as InterruptSFDC;

  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port27;
  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port12;
  InterruptSFDC.HplInterrupt -> HplMsp430InterruptC.Port10;

  components HplCC2420InterruptsP;
  components Counter32khz16C;
  components new GpioCaptureC() as CaptureSFDC;
  components HplCC2420PinsC;

  CaptureSFD = HplCC2420InterruptsP.CaptureSFD;

  HplCC2420InterruptsP.InterruptSFD ->  InterruptSFDC.Interrupt;
  HplCC2420InterruptsP.Counter      -> Counter32khz16C;

  InterruptCCA = InterruptCCAC.Interrupt;
  InterruptFIFOP = InterruptFIFOPC.Interrupt;
  InterruptSFD = InterruptSFDC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420/HplCC2420InterruptsP.nc000066400000000000000000000052401207233610700263320ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   January, 2010
 *
 * this implements an interrupt-driven capture interface for the cc2420
 * tx-mode use of sfd.  shimmer2 does not have sfd routed to a timer pin
 * on the msp430, so cc2420's capture mechanism fails.  
 * this module will trigger a capture.captured event after receiving the
 * appropriate interrupt from the shimmer2 sfd pin (1.0)
 */

module HplCC2420InterruptsP @safe() {
  provides{
    interface GpioCapture as CaptureSFD;
  }

  uses{
    interface GpioInterrupt as InterruptSFD;
    interface Counter;
  }
}

implementation {
  async command error_t CaptureSFD.captureRisingEdge() { 
    call InterruptSFD.enableRisingEdge();
    return SUCCESS;
  }

  async command error_t CaptureSFD.captureFallingEdge() { 
    call InterruptSFD.enableFallingEdge();
    return SUCCESS;
  }
  
  async command void CaptureSFD.disable() {
    call InterruptSFD.disable();
  }

  async event void InterruptSFD.fired() {
    uint16_t t = call Counter.get();

    signal CaptureSFD.captured(t);
  }

  async event void Counter.overflow() { }
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420/HplCC2420PinsC.nc000066400000000000000000000055351207233610700250560ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for the ChipCon CC2420
 * radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2009-10-21 18:13:22 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 */

configuration HplCC2420PinsC {

  provides interface GeneralIO as CCA;
  provides interface GeneralIO as CSN;
  provides interface GeneralIO as FIFO;
  provides interface GeneralIO as FIFOP;
  provides interface GeneralIO as RSTN;
  provides interface GeneralIO as SFD;
  provides interface GeneralIO as VREN;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components new Msp430GpioC() as CCAM;
  components new Msp430GpioC() as CSNM;
  components new Msp430GpioC() as FIFOM;
  components new Msp430GpioC() as FIFOPM;
  components new Msp430GpioC() as RSTNM;
  components new Msp430GpioC() as SFDM;
  components new Msp430GpioC() as VRENM;

  CCAM -> GeneralIOC.Port27;
  CSNM -> GeneralIOC.Port54;
  FIFOM -> GeneralIOC.Port15;
  FIFOPM -> GeneralIOC.Port12;
  RSTNM -> GeneralIOC.Port57;
  SFDM -> GeneralIOC.Port10;
  VRENM -> GeneralIOC.Port56;

  CCA = CCAM;
  CSN = CSNM;
  FIFO = FIFOM;
  FIFOP = FIFOPM;
  RSTN = RSTNM;
  SFD = SFDM;
  VREN = VRENM;
  
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420/HplCC2420SpiC.nc000066400000000000000000000041541207233610700246740ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the SPI bus for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2009-10-21 18:13:22 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 */

generic configuration HplCC2420SpiC() {
  
  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;
  
}

implementation {

  components new Msp430Spi1C() as SpiC;
  
  Resource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;
  
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/000077500000000000000000000000001207233610700225165ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/HplCC2420XInterruptsP.nc000066400000000000000000000052651207233610700266610ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   January, 2010
 *
 * this implements an interrupt-driven capture interface for the cc2420
 * tx-mode use of sfd.  shimmer2 does not have sfd routed to a timer pin
 * on the msp430, so cc2420's capture mechanism fails.  
 * this module will trigger a capture.captured event after receiving the
 * appropriate interrupt from the shimmer2 sfd pin (1.0)
 */

module HplCC2420XInterruptsP @safe() {
  provides{
    interface GpioCapture as SfdCapture;
  }

  uses{
    interface GpioInterrupt as InterruptSFD;
    interface Counter;
    interface Leds;
  }
}

implementation {
  async command error_t SfdCapture.captureRisingEdge() { 
    call InterruptSFD.enableRisingEdge();
    return SUCCESS;
  }

  async command error_t SfdCapture.captureFallingEdge() { 
    call InterruptSFD.enableFallingEdge();
    return SUCCESS;
  }
  
  async command void SfdCapture.disable() {
    call InterruptSFD.disable();
  }

  async event void InterruptSFD.fired() {
    uint16_t t = call Counter.get();
    signal SfdCapture.captured(t);
  }

  async event void Counter.overflow() { }

}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/HplSFDXInterruptsC.nc000066400000000000000000000053341207233610700264600ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of interrupts and captures for the ChipCon
 * CC2420 radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2011-04-27 19:36:45 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 * re-written to use interrupt-driven sfd capture; 
 * shimmer2 does not have sfd wired to a timer pin
 * @author Steve Ayer
 * @date January, 2010
 */

configuration HplSFDXInterruptsC {
  provides interface GpioCapture as SfdCapture;
  provides interface GpioInterrupt as InterruptSFD;
}

implementation {
  components HplMsp430InterruptC;
  components new Msp430InterruptC() as InterruptSFDC;

  InterruptSFDC.HplInterrupt -> HplMsp430InterruptC.Port10;

  components HplCC2420XInterruptsP;
  components Counter32khz16C;
  components new GpioCaptureC() as SfdCaptureC;

  SfdCapture = HplCC2420XInterruptsP.SfdCapture;

  HplCC2420XInterruptsP.InterruptSFD ->  InterruptSFDC.Interrupt;
  HplCC2420XInterruptsP.Counter      -> Counter32khz16C;

  InterruptSFD = InterruptSFDC.Interrupt;
  
  components LedsC;
  HplCC2420XInterruptsP.Leds      -> LedsC;
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/t32khz/000077500000000000000000000000001207233610700236435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/t32khz/HplCC2420XC.nc000066400000000000000000000060111207233610700256570ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi1C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port27;
	CSNM -> IO.Port54;
	FIFOM -> IO.Port15;
	FIFOPM -> IO.Port12;
	RSTNM -> IO.Port57;
	SFDM -> IO.Port10;
	VRENM -> IO.Port56;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	/* 
	 * original capture won't work, sfd is not on a capture pin
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlA1;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureA1;
	GpioCaptureC.GeneralIO -> IO.Port10;
	SfdCapture = GpioCaptureC;
	*/

	// this replaces it, interrupt-based gpiocapture implementation
	components HplSFDXInterruptsC;
	SfdCapture = HplSFDXInterruptsC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port12;
	FifopInterrupt = FifopInterruptC.Interrupt; 


	// alarm
	components new Alarm32khz16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTime32khzC;
	LocalTimeRadio = LocalTime32khzC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/t32khz/RadioConfig.h000066400000000000000000000043731207233610700262070ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include 
//#include 

#define RADIO_DEBUG
#define RADIO_DEBUG_MESSAGES
#define RADIO_DEBUG_IRQ

/* This is the default value of the PA_POWER field of the TXCTL register. */
#ifndef CC2420X_DEF_RFPOWER
#define CC2420X_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the FSCTRL register. */
#ifndef CC2420X_DEF_CHANNEL
#define CC2420X_DEF_CHANNEL	11
#endif

/* The number of microseconds a sending micaz mote will wait for an acknowledgement */
#ifndef SOFTWAREACK_TIMEOUT
#define SOFTWAREACK_TIMEOUT	800
#endif

/**
 * This is the timer type of the radio alarm interface
 */
typedef T32khz TRadio;
typedef uint16_t tradio_size;

/**
 * The number of radio alarm ticks per one microsecond (0.9216).
 * We use integers and no parentheses just to make deputy happy.
 * Ok, further hacks were required for deputy, I removed 00 from the
 * beginning and end to be able to handle longer wait periods.
 */
#define RADIO_ALARM_MICROSEC 1/32

/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
#define RADIO_ALARM_MILLI_EXP	5

#endif//__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/tmicro/000077500000000000000000000000001207233610700240135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/tmicro/HplCC2420XC.nc000066400000000000000000000060111207233610700260270ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi1C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port27;
	CSNM -> IO.Port54;
	FIFOM -> IO.Port15;
	FIFOPM -> IO.Port12;
	RSTNM -> IO.Port57;
	SFDM -> IO.Port10;
	VRENM -> IO.Port56;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	/* 
	 * original capture won't work, sfd is not on a capture pin
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlA1;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureA1;
	GpioCaptureC.GeneralIO -> IO.Port12;
 	SfdCapture = GpioCaptureC;
	*/

	// this replaces it, interrupt-based gpiocapture implementation
	components HplSFDXInterruptsC;
	SfdCapture = HplSFDXInterruptsC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port12;
	FifopInterrupt = FifopInterruptC.Interrupt; 

	// alarm
	components new AlarmMicro16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTimeMicroC;
	LocalTimeRadio = LocalTimeMicroC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/cc2420x/tmicro/RadioConfig.h000066400000000000000000000043711207233610700263550ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include 
//#include 

#define RADIO_DEBUG
#define RADIO_DEBUG_MESSAGES
#define RADIO_DEBUG_IRQ

/* This is the default value of the PA_POWER field of the TXCTL register. */
#ifndef CC2420X_DEF_RFPOWER
#define CC2420X_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the FSCTRL register. */
#ifndef CC2420X_DEF_CHANNEL
#define CC2420X_DEF_CHANNEL	11
#endif

/* The number of microseconds a sending micaz mote will wait for an acknowledgement */
#ifndef SOFTWAREACK_TIMEOUT
#define SOFTWAREACK_TIMEOUT	800
#endif

/**
 * This is the timer type of the radio alarm interface
 */
typedef TMicro TRadio;
typedef uint16_t tradio_size;

/**
 * The number of radio alarm ticks per one microsecond (0.9216).
 * We use integers and no parentheses just to make deputy happy.
 * Ok, further hacks were required for deputy, I removed 00 from the
 * beginning and end to be able to handle longer wait periods.
 */
#define RADIO_ALARM_MICROSEC	1

/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
#define RADIO_ALARM_MILLI_EXP	10

#endif//__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/fgpmmopa6b/000077500000000000000000000000001207233610700234675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc000066400000000000000000000140001207233610700261220ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   September, 2010
 */

module Fgpmmopa6bP {
  provides {
    interface Init;
    interface Gps;
  }
  uses { 
    interface HplMsp430Usart as UARTControl;
    interface HplMsp430UsartInterrupts as UARTData;
  }
}

implementation {
  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));

  char databuf0[256], databuf1[256], * scout, cmdstring[128];
  uint8_t current_buffer, toSend, charsSent; 
  bool transmissionComplete;

  task void send_command();

  task void setupUART() {
    msp430_uart_union_config_t RN_uart_config = { 
      { ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, 
	ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, 
	listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 0, 
	urxwie: 0,  utxe : 1, urxe :1 } 
    };

    call UARTControl.setModeUart(&RN_uart_config); // set to UART mode

    call UARTControl.enableTxIntr();
    call UARTControl.enableRxIntr();
  }

  command error_t Init.init() {

    TOSH_SET_PROG_OUT_PIN();

    TOSH_MAKE_ADC_6_INPUT();

    transmissionComplete = FALSE;

    post setupUART();

    call Gps.enable();

    return SUCCESS;
  }

  command void Gps.enable() {
    scout = databuf0;
    current_buffer = 0;

    TOSH_CLR_PROG_OUT_PIN();
  }

  command void Gps.disable() {
    TOSH_SET_PROG_OUT_PIN();
  }

  command void Gps.disableBus(){
    call UARTControl.disableUart();
  }

  command void Gps.enableBus(){
    post setupUART();
  }

  uint8_t byteCRC(char * str) 
  {
    register uint8_t i;
    uint8_t sum = 0, len;
    
    len = strlen(str);

    for(i = 0; i < len; i++)
      sum = sum ^ *(str + i);
    
    return sum;
  }

  /*
   * string of boolean on/off switches for sentences, in order
   * 0 NMEA_SEN_GLL, // GPGLL interval - Geographic Position - Latitude longitude
   * 1 NMEA_SEN_RMC, // GPRMC interval - Recomended Minimum Specific GNSS
   *   Sentence
   * 2 NMEA_SEN_VTG, // GPVTG interval - Course Over Ground and Ground Speed
   * 3 NMEA_SEN_GGA, // GPGGA interval - GPS Fix Data
   * 4 NMEA_SEN_GSA, // GPGSA interval - GNSS DOPS and Active Satellites
   * 5 NMEA_SEN_GSV, // GPGSV interval - GNSS Satellites in View
   * 18 NMEA_SEN_MCHN, // PMTKCHN interval \u2013 GPS channel status
   */
  command void Gps.restrictNMEASentences() {
    uint8_t crc;
    char cmd[128];

    sprintf(cmd, "$PMTK314,0,1,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0");

    crc = byteCRC(cmd + 1);
    sprintf(cmdstring, "%s*%02X\r\n", cmd, crc);
    
    post send_command();
  }

  command void Gps.resetNMEASentences() {
    sprintf(cmdstring, "$PMTK314,-1*04\r\n");

    post send_command();
  }

  /*
   * range is 0/ 0.2/ 0.4/ 0.6/ 0.8/ 1.0/1.5/2.0 (m/s) 
   * e.g.
   * $PMTK397,0.20*
   * $PMTK397,0*
   */
  command void Gps.setNavThreshold() {
    uint8_t crc;
    char cmd[128];

    sprintf(cmd, "$PMTK397,0");
    crc = byteCRC(cmd + 1);
    sprintf(cmdstring, "%s*%02X\r\n", cmd, crc);

    post send_command();
  }

  command void Gps.getNavThreshold() {
    sprintf(cmdstring, "$PMTK447*35\r\n");

    post send_command();
  }

  // tell it to come up in hot start mode
  command void Gps.setHotStart() {
    sprintf(cmdstring, "$PMTK101*32\r\n");

    post send_command();
  }

  // datarate in milliseconds, min 100
  command void Gps.setDatarate(uint16_t datarate) { 
    uint8_t crc;
    char cmd[128];

    sprintf(cmd, "$PMTK300,%d,0,0,0,0", datarate);
    crc = byteCRC(cmd + 1);
    sprintf(cmdstring, "%s*%02X\r\n", cmd, crc);

    post send_command();
  }

  task void tell_app() {
    if(current_buffer == 0)
      signal Gps.NMEADataAvailable(databuf1);
    else
      signal Gps.NMEADataAvailable(databuf0);
  }

  async event void UARTData.rxDone(uint8_t data) {        
    if(!call UARTControl.isUart())
      return;
    *scout = data;
    scout++;

    if(*(scout - 1) == '\n'){
      *(scout - 2) = '\0';

      if(current_buffer == 0){
	scout = databuf1;
	current_buffer = 1;
      }
      else{
	scout = databuf0;
	current_buffer = 0;
      }

      post tell_app();
    }
  }

  task void sendOneChar() {
    if(charsSent < toSend)
      call UARTControl.tx(cmdstring[charsSent++]);
    else{
      transmissionComplete = TRUE;
    }
  }

  task void send_command() {
    toSend = strlen(cmdstring) + 1;
    charsSent = 0;
    transmissionComplete = FALSE;
    post sendOneChar();
  }
 
  async event void UARTData.txDone() {
    if(!call UARTControl.isUart())
      return;
    if(!transmissionComplete) {
      post sendOneChar();
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/fgpmmopa6b/Gps.nc000066400000000000000000000040501207233610700245410ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   September, 2010
 */

interface Gps {
  
  command void enable();
  
  command void disable();
  
  command void setDatarate(uint16_t datarate);  

  command void setNavThreshold();
  command void getNavThreshold();

  command void setHotStart();

  command void restrictNMEASentences();
  command void resetNMEASentences();

  command void disableBus();
  command void enableBus();

  async event void NMEADataAvailable(char * data);
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/fgpmmopa6b/GpsC.nc000066400000000000000000000036751207233610700246600ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   September, 2010
 */

configuration GpsC {
  provides {
    interface Init;
    interface Gps;
  }
}

implementation {
  components Fgpmmopa6bP;

  Init       = Fgpmmopa6bP;
  Gps        = Fgpmmopa6bP;

  components HplMsp430Usart0C;
  Fgpmmopa6bP.UARTControl -> HplMsp430Usart0C;
  Fgpmmopa6bP.UARTData    -> HplMsp430Usart0C;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyro/000077500000000000000000000000001207233610700224115ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyro/GyroBoard.nc000066400000000000000000000037721207233610700246340ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    August 2009
 *
 * tinyos-2.x port
 * @date    March, 2010
 * 
 */

interface GyroBoard {
  // no explicit enable/disable, use stdcontrol.

  // it has its own
  command void ledOn();
  command void ledOff();
  command void ledToggle();

  command void autoZero();

  // it has its own, just a reflection of UserButton.fired(), which is debounced
  async event void buttonPressed();
}




tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyro/GyroBoardC.nc000066400000000000000000000037551207233610700247400ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    August 2009
 *
 * tinyos-2.x port
 * @date    March, 2010
 */

configuration GyroBoardC {
  provides{
    interface Init;
    interface StdControl;
    interface GyroBoard;
  }
}

implementation {
  components GyroBoardP;
  Init       = GyroBoardP;
  StdControl = GyroBoardP;
  GyroBoard  = GyroBoardP;

  components GyroButtonC;
  GyroBoardP.buttonNotify -> GyroButtonC;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyro/GyroBoardP.nc000066400000000000000000000104061207233610700247440ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    August, 2009
 *
 * tinyos-2.x port
 * @date    March, 2010
 * 
 */

#include 

module GyroBoardP {
  provides {
    interface Init;
    interface StdControl;
    interface GyroBoard;
  }
  uses{
    interface Notify as buttonNotify;
  }
}

implementation {
  command error_t Init.init(){
    register uint16_t i;

    // power, active low
    TOSH_MAKE_PROG_OUT_OUTPUT();   
    TOSH_SEL_PROG_OUT_IOFUNC();
    TOSH_SET_PROG_OUT_PIN();    // off

    // analog signal enable, active low
    TOSH_MAKE_SER0_CTS_OUTPUT();
    TOSH_SEL_SER0_CTS_IOFUNC();
    TOSH_SET_SER0_CTS_PIN();    // signal disabled

    // signal goes to gyro-zero pins
    TOSH_MAKE_UTXD0_OUTPUT();
    TOSH_SEL_UTXD0_IOFUNC();
    TOSH_CLR_UTXD0_PIN();

    // this one tied to the led
    TOSH_MAKE_URXD0_OUTPUT();
    TOSH_SEL_URXD0_IOFUNC();
    call GyroBoard.ledOff();

    // x
    TOSH_MAKE_ADC_1_INPUT();         
    TOSH_SEL_ADC_1_MODFUNC();

    // y
    TOSH_MAKE_ADC_6_INPUT();         
    TOSH_SEL_ADC_6_MODFUNC();

    // z
    TOSH_MAKE_ADC_2_INPUT();         
    TOSH_SEL_ADC_2_MODFUNC();

    /*
     * gyro power-down after start-up transients, which are particularly rough during programming
     * we're waiting for caps to discharge...
     */
    for(i = 0; i < 6000; i++)
      TOSH_uwait(1000);

    // now power it up, max ready-time 200ms
    TOSH_CLR_PROG_OUT_PIN();

    for(i = 0; i < 200; i++)
      TOSH_uwait(1000);

    call buttonNotify.enable();
 
    return SUCCESS;
  }

  command error_t StdControl.start(){
    //    call buttonNotify.enable();
    /*
     * adding a redundant power-up for apps that power cycle the gyro mid-course to save current
     * since we're past the initial on-dock programming, gyro should power back up gracefully
     */
    TOSH_CLR_PROG_OUT_PIN();     

    // enable analog signal path
    TOSH_CLR_SER0_CTS_PIN();     

    return SUCCESS;
  }

  command error_t StdControl.stop(){
    // disable analog signals, then power down
    TOSH_SET_SER0_CTS_PIN();   
    TOSH_SET_PROG_OUT_PIN();

    // kill the led
    call GyroBoard.ledOff();
    //    call buttonNotify.disable();

    return SUCCESS;
  }

  command void GyroBoard.autoZero() {
    TOSH_SET_UTXD0_PIN();
    
    TOSH_uwait(100);  // pulse between 2 (!) and 1500 usec
    
    TOSH_CLR_UTXD0_PIN();

    TOSH_uwait(6900);  // takes 7ms to settle
  }

  command void GyroBoard.ledOn() {
    TOSH_CLR_URXD0_PIN();
  }

  command void GyroBoard.ledOff() {
    TOSH_SET_URXD0_PIN();
  }

  command void GyroBoard.ledToggle() {
    TOSH_TOGGLE_URXD0_PIN();
  }

  event void buttonNotify.notify( button_state_t val){
    signal GyroBoard.buttonPressed();
  }
}




tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyro/GyroButtonC.nc000066400000000000000000000051371207233610700251600ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform. Get
 * returns the current state of the button by reading the pin,
 * regardless of whether enable() or disable() has been called on the
 * Interface. Notify.enable() and Notify.disable() modify the
 * underlying interrupt state of the pin, and have the effect of
 * enabling or disabling notifications that the button has changed
 * state.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $
 * port to shimmer-style
 * @author Steve Ayer
 * @date   February, 2010
 */

#include 

configuration GyroButtonC {
  provides interface Notify;
}
implementation {
  components HplGyroButtonC;
  components new SwitchToggleC();
  SwitchToggleC.GpioInterrupt -> HplGyroButtonC.GpioInterrupt;
  SwitchToggleC.GeneralIO -> HplGyroButtonC.GeneralIO;

  components GyroButtonP;
  Notify = GyroButtonP;

  components new TimerMilliC() as debounceTimer;
  GyroButtonP.NotifyLower -> SwitchToggleC.Notify;
  GyroButtonP.debounceTimer -> debounceTimer;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyro/GyroButtonP.nc000066400000000000000000000050251207233610700251710ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 * port to shimmer-style
 * @author Steve Ayer
 * @date   February, 2010
 */

#include 

module GyroButtonP {
  provides interface Notify;

  uses interface Notify as NotifyLower;
  uses interface Timer as debounceTimer;
}
implementation {
  command error_t Notify.enable() {
    return call NotifyLower.enable();
  }

  command error_t Notify.disable() {
    return call NotifyLower.disable();
  }

  event void debounceTimer.fired() {
    call Notify.enable();    // re-enable interrupt
    signal Notify.notify( BUTTON_PRESSED );
  }

  task void debounce() {
    call debounceTimer.startOneShot(250);
  }

  event void NotifyLower.notify( bool val ) {
    // we've only enabled interrupt from rising edge
    post debounce();
  }
  
  default event void Notify.notify( button_state_t val ) { }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyro/HplGyroButtonC.nc000066400000000000000000000044201207233610700256160ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telos platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $
 * (not much to) port to shimmer2 gyro
 * @author Steve Ayer
 * @date March, 2010
 */

configuration HplGyroButtonC {
  provides interface GeneralIO;
  provides interface GpioInterrupt;
}
implementation {
  components HplMsp430GeneralIOC as GeneralIOC;
  components HplMsp430InterruptC as InterruptC;

  components new Msp430GpioC() as UserButtonC;
  UserButtonC -> GeneralIOC.Port13;
  GeneralIO = UserButtonC;

  components new Msp430InterruptC() as InterruptUserButtonC;
  InterruptUserButtonC.HplInterrupt -> InterruptC.Port13;
  GpioInterrupt = InterruptUserButtonC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyromag/000077500000000000000000000000001207233610700230765ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyromag/GyroMagBoard.nc000066400000000000000000000064331207233610700257430ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    March, 2010
 */

interface GyroMagBoard {
  // gyroboard stuff first
  command void ledOn();
  command void ledOff();
  command void ledToggle();

  // for gyro, use use GyroStdControl, see platform's GyroMagBoardC
  command void gyroAutoZero();

  // magnetometer uses its own stdcontrol, see platform's GyroMagBoardC

  // 0.5, 1, 2, 5, 10 (default), 20, 50hz.  20 and 50 up power burn dramatically
  command error_t setMagOutputRate(uint8_t rate);

  // +-0.7, 1.0 (default), 1.5, 2.0, 3.2, 3.8, 4.5Ga
  command error_t setMagGain(uint8_t gain);

  command error_t setMagIdle();
  command error_t magGoToSleep();

  command error_t magRunSingleConversion();

  command error_t magRunContinuousConversion();

  // call to clock out data; collect it from the "done" event
  command error_t readMagData();

  // convert raw data to heading
  command uint16_t readMagHeading(uint8_t * readBuf);

  // read result after readdone event
  command void magSelfTest();

  // call this to see three-axis magnetometer values
  command void convertMagRegistersToData(uint8_t * readBuf, int16_t * data);

  // this is where the app will find its mag readings
  event void magReadDone(uint8_t * data, error_t success);
  
  event void magWriteDone(error_t success);

  // it has its own, just a reflection of UserButton.fired(), which is debounced
  async event void buttonPressed();

  //  event void magReady();

  command void writeReg(uint8_t reg_addr, uint8_t val);
  
  //  command error_t readValues(uint8_t reg_addr, uint8_t size, uint8_t * data);
  //  command error_t readValues(uint8_t size, uint8_t * data);

  //  command error_t poke(uint8_t val);
  //  command error_t peek(uint8_t * val);

}




tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardC.nc000066400000000000000000000064651207233610700260530ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   March, 2010
 *
 * @author Steve Ayer
 * @date   July, 2010
 * tos-2.x port
 *
 * wiring to msp430 i2c implmentation to flesh out gyro/mag board on shimmer2
 * using direct module because we don't need arbitration for this platform.
 * note gyro implementation is used for everything except mag
 */

configuration GyroMagBoardC {
  provides {
    interface Init;
    interface StdControl;
    interface GyroMagBoard;
  }
}

implementation {
  components GyroMagBoardP;
  Init = GyroMagBoardP;
  StdControl = GyroMagBoardP;
  GyroMagBoard = GyroMagBoardP;

  components LedsC;
  GyroMagBoardP.Leds          -> LedsC;

  components new TimerMilliC() as testTimer;
  GyroMagBoardP.testTimer     -> testTimer;

  enum {
    CLIENT_ID = unique( MSP430_I2CO_BUS ),
  };

  components Msp430I2CP;  // this is mine, ported from tos-1.x; find it in shimmer/chips/msp430
  GyroMagBoardP.I2CPacket -> Msp430I2CP.I2CBasicAddr;
  HplMsp430Usart0P.HplI2C -> HplMsp430I2C0P.HplI2C;

  components HplMsp430I2C0P;
  GyroMagBoardP.HplI2C -> HplMsp430I2C0P.HplI2C;
  Msp430I2CP.HplI2C -> HplMsp430I2C0P.HplI2C;

  components HplMsp430Usart0P;
  HplMsp430I2C0P.HplUsart  -> HplMsp430Usart0P.Usart;
  Msp430I2CP.I2CInterrupts -> HplMsp430Usart0P.I2CInterrupts;

  components HplMsp430GeneralIOC as GIO;
  HplMsp430Usart0P.SIMO -> GIO.SIMO0;
  HplMsp430Usart0P.SOMI -> GIO.SOMI0;
  HplMsp430Usart0P.UCLK -> GIO.UCLK0;
  HplMsp430Usart0P.UTXD -> GIO.UTXD0;
  HplMsp430Usart0P.URXD -> GIO.URXD0;

  HplMsp430I2C0P.SIMO -> GIO.SIMO0;
  HplMsp430I2C0P.UCLK -> GIO.UCLK0;

  components GyroBoardC;  
  GyroMagBoardP.GyroBoard -> GyroBoardC.GyroBoard;
  GyroMagBoardP.GyroInit  -> GyroBoardC.Init;
  GyroMagBoardP.GyroStdControl -> GyroBoardC.StdControl;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardP.nc000066400000000000000000000241021207233610700260540ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * @author Steve Ayer
 * @date March, 2010
 *
 * this module adds functionality of honeywell hmc5843 magnetometer
 * to similar gyro board (idg-500 3-axis plus user button and led)
 *
 * since gyro board is stand-alone, this module uses existing gyro module
 * and interface for everything but magnetometer.
 */

#include "Magnetometer.h"

module GyroMagBoardP {
  provides {
    interface Init;
    interface StdControl;
    interface GyroMagBoard;
  }
  uses {
    interface GyroBoard;

    interface I2CPacket as I2CPacket;

    interface HplMsp430I2C as HplI2C;
    interface HplMsp430Usart as Usart;
    interface HplMsp430UsartInterrupts as UsartInterrupts;
    interface HplMsp430I2CInterrupts as I2CInterrupts;

    interface Init as GyroInit;
    interface StdControl as GyroStdControl;
    interface Leds;
    interface Timer as testTimer;
  }
}

implementation {
  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));
  extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));

  uint8_t readbuff[7], testPhase;
  uint8_t packet[2], readSize, * readDataBuffer;

  enum {
    INIT,
    WRITE,
    READ,
    IDLE,
  };

#warning "DO NOT CONTINUE TO USE THIS MODULE; IT HAS BEEN DEPRECATED.  USE SEPARATE GYROBOARD AND MAGNETOMETER INSTEAD."

  command error_t Init.init() {
    msp430_i2c_union_config_t msp430_i2c_my_config = { 
      {
	rxdmaen : 0, 
	txdmaen : 0, 
	xa : 0, 
	listen : 0, 
	mst : 1,
	i2cword : 0, 
	i2crm : 1, 
	i2cssel : 0x2, 
	i2cpsc : 0, 
	i2csclh : 0x3, 
	i2cscll : 0x3,
	i2coa : 0,
      } 
    };

    
    /*
     * same power pin as gyro regulator, this will bring up second power pin (first tied to
     * shimmer regulator).  it turns on in idle mode
     */
    call GyroInit.init();

    call HplI2C.setModeI2C(&msp430_i2c_my_config);

    testPhase = 0;

    return SUCCESS;
  }

  command error_t StdControl.start(){
    call GyroStdControl.start();

    // mag ready time nominally 5ms, though we have lots of lag in gyro power-up called in init
    //    TOSH_uwait(5000UL);

    return SUCCESS;
  }

  command error_t StdControl.stop(){
    call GyroStdControl.stop();

    return SUCCESS;
  }

  // GyroBoard wrappers
  command void GyroMagBoard.ledOn() {
    call GyroBoard.ledOn();
  }
  command void GyroMagBoard.ledOff() {
    call GyroBoard.ledOff();
  }
  command void GyroMagBoard.ledToggle() {
    call GyroBoard.ledToggle();
  }

  async event void GyroBoard.buttonPressed() {
    signal GyroMagBoard.buttonPressed();
  }

  // for gyro, use use GyroStdControl, see platform's GyroMagBoardC
  command void GyroMagBoard.gyroAutoZero() {
    call GyroBoard.autoZero();
  }
  
  error_t writeRegValue(uint8_t reg_addr, uint8_t val) {
    //    uint8_t packet[2];

    // pack the packet with address of reg target, then register value
    packet[0] = reg_addr;
    packet[1] = val;

    call I2CPacket.write(I2C_START | I2C_STOP, 0x1e, 2, packet);
    return SUCCESS;
  }
  command void GyroMagBoard.writeReg(uint8_t reg_addr, uint8_t val) {
    writeRegValue(reg_addr, val);
  }
  error_t readValues(uint8_t size, uint8_t * data){
    readSize = size;
    readDataBuffer = data;

    call I2CPacket.read(I2C_START | I2C_STOP, 0x1e, size, data);
    return SUCCESS;
  }

  async event void UsartInterrupts.rxDone( uint8_t data ) {}
  async event void UsartInterrupts.txDone() {}
  async event void I2CInterrupts.fired() {}

  /*
   * 0.5, 1, 2, 5, 10 (default), 20, 50hz.  20 and 50 up power burn dramatically
   * bits 2-4 control this, values 0 - 6 map to values above, respectively
   * since the remainder of the register defaults to 0, we write the mask directly
   */
  command error_t GyroMagBoard.setMagOutputRate(uint8_t rate){
    uint8_t ret = SUCCESS, bitmask = 0x10;  // default 10hz

    switch(rate){
    case 0:
      bitmask = 0;
      break;
    case 1:
      bitmask = 0x04;
      break;
    case 2:
      bitmask = 0x08;
      break;
    case 3:
      bitmask = 0x0c;
      break;
    case 4:
      bitmask = 0x10;
      break;
    case 5:
      bitmask = 0x14;
      break;
    case 6:
      bitmask = 0x18;
      break;
    default:
      ret = FAIL;  // input value unknown, using default
      break;
    }
    writeRegValue(0, bitmask);
    
    return ret;
  }

  /*
   * weird way to do this, but we need to leave the mag time
   * to run tests without disabling the i2c bus with TOSH_uwait
   *
   * read results from readDone event
   */
  command void GyroMagBoard.magSelfTest(){
    switch(testPhase++){
    case 0:
      call testTimer.startPeriodic(5);
      call Leds.led1On();
      call GyroMagBoard.writeReg(0, 0x11);
      break;
    case 1:
      call Leds.led1Off();
      call GyroMagBoard.writeReg(2, 0x01);
      break;
    case 2:
      call Leds.led1On();
      call GyroMagBoard.readMagData();
      break;
    case 3:
      call Leds.led1Off();
      call GyroMagBoard.writeReg(0, 0x10);
      break;
    default:
      call testTimer.stop();
      testPhase = 0;
      break;
    }
  }

  event void testTimer.fired() {
    call GyroMagBoard.magSelfTest();
  }

  // +-0.7, 1.0 (default), 1.5, 2.0, 3.2, 3.8, 4.5Ga
  command error_t GyroMagBoard.setMagGain(uint8_t gain){ 
    uint8_t ret = SUCCESS, bitmask = 0x20;  // default 1.0Ga

    switch(gain){
    case 0:
      bitmask = 0x00;
      break;
    case 1:
      bitmask = 0x20;
      break;
    case 2:
      bitmask = 0x40;
      break;
    case 5:
      bitmask = 0x50;
      break;
    case 10:
      bitmask = 0x80;
      break;
    case 20:
      bitmask = 0x90;
      break;
    case 50:
      bitmask = 0xc0;
      break;
    default:
      ret = FAIL;  // input value unknown, using default
      break;
    }
    writeRegValue(1, bitmask);
    
    return ret;
  }

  command error_t GyroMagBoard.setMagIdle(){
    writeRegValue(2, 0x02);
    return SUCCESS;
  }

  command error_t GyroMagBoard.magGoToSleep(){
    writeRegValue(2, 0x03);
    return SUCCESS;
  }


  command error_t GyroMagBoard.magRunSingleConversion(){
    writeRegValue(2, 0x01);
    return SUCCESS;
  }
    

  command error_t GyroMagBoard.magRunContinuousConversion(){
    writeRegValue(2, 0x00);
    return SUCCESS;
  }

  /*
   * returning the real value doesn't help; 
   * success is measured in the magreaddone event
   */
  command error_t GyroMagBoard.readMagData(){
    readValues(7, readbuff);
    return SUCCESS;
  }
  
  uint16_t mag_to_heading(uint16_t x, uint16_t y, uint16_t z)
  {
    uint16_t heading;

    if(x == 0){
      if(y < 0)
	heading = 270;
      else
	heading = 90;
    }
    else if(z < 0)
      heading = (uint16_t)(180.0 - atanf((float)y/(float)-x));

    else
      heading = (uint16_t)(180.0 - atanf((float)y/(float)x));
    
    return heading;
  }

  int16_t twos_comp_pack(uint8_t up, uint8_t low) 
  {
    int16_t out;
    uint16_t uout;
    
    uout = up;
    uout = uout << 8;
    uout |= low;

    out = (int16_t)uout;

    return out;
  }

  // call this to see three-axis magnetometer values
  command void GyroMagBoard.convertMagRegistersToData(uint8_t * readBuf, int16_t * data){
    uint8_t * src;
    register uint8_t i;

    src = readBuf;

    // this loop is just for the three 16-bit x,y,z values
    for(i = 0; i < 3; i++){
      data[i] = twos_comp_pack(*src, *(src + 1));
      src += 2;
    }
  }    

  // call after readDone event
  command uint16_t GyroMagBoard.readMagHeading(uint8_t * readBuf){
    int16_t realVals[3];
    uint16_t heading;

    call GyroMagBoard.convertMagRegistersToData(readBuf, realVals);

    heading = mag_to_heading(realVals[0], realVals[1], realVals[2]);

    return heading;
  }
  /*
  error_t poke(uint8_t val) {
    return call I2CPacket.writePacket(0x1e, 1, &val);
  }
  error_t peek(uint8_t * val) {
    return call I2CPacket.readPacket(0x1e, 1, val);
  }
  */
  async event void I2CPacket.readDone(error_t success, uint16_t addr, uint8_t length, uint8_t* data) {
    signal GyroMagBoard.magReadDone(data, success);
  }

  async event void I2CPacket.writeDone(error_t success, uint16_t addr, uint8_t length, uint8_t* data) {
    signal GyroMagBoard.magWriteDone(success);
  }
  /*
  // these will trigger from the i2civ, but separate interrupts are available in i2cifg (separate enable, too).
  async event void I2CEvents.arbitrationLost() { }
  async event void I2CEvents.noAck() { }
  async event void I2CEvents.ownAddr() { }
  async event void I2CEvents.readyRegAccess() { }
  async event void I2CEvents.readyRxData() { }
  async event void I2CEvents.readyTxData() { }
  async event void I2CEvents.generalCall() { }
  async event void I2CEvents.startRecv() { }
  */
}
  





tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/gyromag/Magnetometer.h000066400000000000000000000036421207233610700257030ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * @author Steve Ayer
 * @date   April, 2010
 * 
 * attempt to provide mneonics for honeywell HMC5843 config settings
 */

enum {
  ZERO_7_GAUSS,
  ONE_GAUSS,
  ONE_5_GAUSS,
  TWO_GAUSS,
  THREE_2_GAUSS,
  THREE_8_GAUSS,
  FOUR_5_GAUSS
};

enum {
  ZERO_5_HZ,
  ONE_HZ,
  TWO_HZ,
  FIVE_HZ,
  TEN_HZ,
  TWENTY_HZ,
  FIFTY_HZ
};

  
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/hmc5843/000077500000000000000000000000001207233610700225245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/hmc5843/Hmc5843P.nc000066400000000000000000000211701207233610700242220ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * @author Steve Ayer
 * @date February, 2011
 *
 * broken out from original gyromagboard* interface/implementation
 *
 * this module adds functionality of honeywell hmc5843 magnetometer
 * to similar gyro board (idg-500 3-axis plus user button and led)
 *
 * since gyro board is stand-alone, this module uses existing gyro module
 * and interface for everything but magnetometer.
 */

module Hmc5843P {
  provides {
    interface Init;
    interface Magnetometer;
  }
  uses {
    interface I2CPacket as I2CPacket;
    interface Init as I2CInit;
    interface HplMsp430I2C as HplI2C;
    interface HplMsp430Usart as Usart;
    interface HplMsp430UsartInterrupts as UsartInterrupts;
    interface HplMsp430I2CInterrupts as I2CInterrupts;

    interface Timer as testTimer;
  }
}

implementation {
  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));
  extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));

  uint8_t readbuff[8], testPhase;
  uint8_t packet[2], readSize, * readDataBuffer;
  bool enabled;

  msp430_i2c_union_config_t msp430_i2c_my_config = { 
    {
      rxdmaen : 0, 
      txdmaen : 0, 
      xa : 0, 
      listen : 0, 
      mst : 1,
      i2cword : 0, 
      i2crm : 1, 
      i2cssel : 0x2, 
      i2cpsc : 0, 
      i2csclh : 0x3, 
      i2cscll : 0x3,
      i2coa : 0,
    } 
  };

  command error_t Init.init() {
    /*
     * same power pin as gyro regulator, this will bring up second power pin (first tied to
     * shimmer regulator).  it turns on in idle mode
     */
    // power, active low
    TOSH_MAKE_PROG_OUT_OUTPUT();   
    TOSH_SEL_PROG_OUT_IOFUNC();
    TOSH_CLR_PROG_OUT_PIN();    // on

    TOSH_uwait(5000); // 5 ms for mag

    atomic enabled = FALSE;

    call Magnetometer.enableBus();

    testPhase = 0;

    return SUCCESS;
  }

  command void Magnetometer.enableBus() {
    call HplI2C.setModeI2C(&msp430_i2c_my_config);
    call I2CInit.init();

    atomic enabled = TRUE;
  }

  command void Magnetometer.disableBus() {
    call HplI2C.clearModeI2C();

    atomic enabled = FALSE;
  }

  error_t writeRegValue(uint8_t reg_addr, uint8_t val) {
    //    uint8_t packet[2];

    // pack the packet with address of reg target, then register value
    packet[0] = reg_addr;
    packet[1] = val;

    call I2CPacket.write(I2C_START | I2C_STOP, 0x1e, 2, packet);
    return SUCCESS;
  }

  error_t readValues(uint8_t size, uint8_t * data){
    readSize = size;
    readDataBuffer = data;

    call I2CInit.init();
    call I2CPacket.read(I2C_START | I2C_STOP, 0x1e, size, data);
    return SUCCESS;
  }

  async event void UsartInterrupts.rxDone( uint8_t data ) {}
  async event void UsartInterrupts.txDone() {}
  async event void I2CInterrupts.fired() {}

  /*
   * 0.5, 1, 2, 5, 10 (default), 20, 50hz.  20 and 50 up power burn dramatically
   * bits 2-4 control this, values 0 - 6 map to values above, respectively
   * since the remainder of the register defaults to 0, we write the mask directly
   */
  command error_t Magnetometer.setOutputRate(uint8_t rate){
    uint8_t ret = SUCCESS, bitmask = 0x10;  // default 10hz

    switch(rate){
    case 0:
      bitmask = 0;
      break;
    case 1:
      bitmask = 0x04;
      break;
    case 2:
      bitmask = 0x08;
      break;
    case 3:
      bitmask = 0x0c;
      break;
    case 4:
      bitmask = 0x10;
      break;
    case 5:
      bitmask = 0x14;
      break;
    case 6:
      bitmask = 0x18;
      break;
    default:
      ret = FAIL;  // input value unknown, using default
      break;
    }
    writeRegValue(0, bitmask);
    
    return ret;
  }

  /*
   * weird way to do this, but we need to leave the mag time
   * to run tests without disabling the i2c bus with TOSH_uwait
   *
   * read results from readDone event
   */
  command void Magnetometer.selfTest(){
    switch(testPhase++){
    case 0:
      call testTimer.startPeriodic(8);
      writeRegValue(0, 0x11);
      break;
    case 1:
      writeRegValue(2, 0x01);
      break;
    case 2:
      call Magnetometer.readData();
      break;
    case 3:
      writeRegValue(0, 0x10);
      break;
    default:
      call testTimer.stop();
      testPhase = 0;
      break;
    }
  }

  event void testTimer.fired() {
    call Magnetometer.selfTest();
  }

  // +-0.7, 1.0 (default), 1.5, 2.0, 3.2, 3.8, 4.5Ga
  command error_t Magnetometer.setGain(uint8_t gain){ 
    uint8_t ret = SUCCESS, bitmask = 0x20;  // default 1.0Ga

    switch(gain){
    case 0:
      bitmask = 0x00;
      break;
    case 1:
      bitmask = 0x20;
      break;
    case 2:
      bitmask = 0x40;
      break;
    case 5:
      bitmask = 0x50;
      break;
    case 10:
      bitmask = 0x80;
      break;
    case 20:
      bitmask = 0x90;
      break;
    case 50:
      bitmask = 0xc0;
      break;
    default:
      ret = FAIL;  // input value unknown, using default
      break;
    }
    writeRegValue(1, bitmask);
    
    return ret;
  }

  command error_t Magnetometer.setIdle(){
    writeRegValue(2, 0x02);
    return SUCCESS;
  }

  command error_t Magnetometer.goToSleep(){
    writeRegValue(2, 0x03);
    return SUCCESS;
  }


  command error_t Magnetometer.runSingleConversion(){
    writeRegValue(2, 0x01);
    return SUCCESS;
  }
    

  command error_t Magnetometer.runContinuousConversion(){
    writeRegValue(2, 0x00);
    return SUCCESS;
  }

  /*
   * returning the real value doesn't help; 
   * success is measured in the magreaddone event
   */
  command error_t Magnetometer.readData(){
    readValues(7, readbuff);
    return SUCCESS;
  }
  
  uint16_t mag_to_heading(int16_t x, int16_t y, int16_t z)
  {
    uint16_t heading;

    if(x == 0){
      if(y < 0)
	heading = 270;
      else
	heading = 90;
    }
    else if(z < 0)
      heading = (uint16_t)(180.0 - atan2f((float)y, (float)-x) * 57.3);

    else
      heading = (uint16_t)(180.0 - atan2f((float)y, (float)x) * 57.3);
    
    return heading;
  }

  int16_t twos_comp_pack(uint8_t up, uint8_t low) 
  {
    int16_t out;
    uint16_t uout;
    
    uout = up;
    uout = uout << 8;
    uout |= low;

    out = (int16_t)uout;

    return out;
  }

  // call this to see three-axis magnetometer values
  command void Magnetometer.convertRegistersToData(uint8_t * readBuf, int16_t * data){
    uint8_t * src;
    register uint8_t i;

    src = readBuf;

    // this loop is just for the three 16-bit x,y,z values
    for(i = 0; i < 3; i++){
      data[i] = twos_comp_pack(*src, *(src + 1));
      src += 2;
    }
  }    

  // call after readDone event
  command uint16_t Magnetometer.readHeading(uint8_t * readBuf){
    int16_t realVals[4];
    uint16_t heading;

    call Magnetometer.convertRegistersToData(readBuf, realVals);

    heading = mag_to_heading(realVals[0], realVals[1], realVals[2]);

    return heading;
  }

  async event void I2CPacket.readDone(error_t success, uint16_t addr, uint8_t length, uint8_t* data) {
    if(enabled)
      signal Magnetometer.readDone(data, success);
  }

  async event void I2CPacket.writeDone(error_t success, uint16_t addr, uint8_t length, uint8_t* data) {
    if(enabled)
      signal Magnetometer.writeDone(success);
  }
}
  





tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/hmc5843/Magnetometer.h000066400000000000000000000036421207233610700253310ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * @author Steve Ayer
 * @date   April, 2010
 * 
 * attempt to provide mneonics for honeywell HMC5843 config settings
 */

enum {
  ZERO_7_GAUSS,
  ONE_GAUSS,
  ONE_5_GAUSS,
  TWO_GAUSS,
  THREE_2_GAUSS,
  THREE_8_GAUSS,
  FOUR_5_GAUSS
};

enum {
  ZERO_5_HZ,
  ONE_HZ,
  TWO_HZ,
  FIVE_HZ,
  TEN_HZ,
  TWENTY_HZ,
  FIFTY_HZ
};

  
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/hmc5843/Magnetometer.nc000066400000000000000000000053171207233610700255030ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    February, 2011
 *
 * broken out from original gyromagboard* interface/implementation
 */

interface Magnetometer {
  // i2c bus, that is
  command void enableBus();

  command void disableBus();

  // 0.5, 1, 2, 5, 10 (default), 20, 50hz.  20 and 50 up power burn dramatically
  command error_t setOutputRate(uint8_t rate);

  // +-0.7, 1.0 (default), 1.5, 2.0, 3.2, 3.8, 4.5Ga
  command error_t setGain(uint8_t gain);

  command error_t setIdle();
  command error_t goToSleep();

  command error_t runSingleConversion();

  command error_t runContinuousConversion();

  // call to clock out data; collect it from the "done" event
  command error_t readData();

  // convert raw data to heading
  command uint16_t readHeading(uint8_t * readBuf);

  // read result after readdone event
  command void selfTest();

  // call this to see three-axis magnetometer values
  command void convertRegistersToData(uint8_t * readBuf, int16_t * data);

  // this is where the app will find its mag readings
  async event void readDone(uint8_t * data, error_t success);
  
  async event void writeDone(error_t success);
}




tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/hmc5843/MagnetometerC.nc000066400000000000000000000052031207233610700256000ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   March, 2010
 *
 * @author Steve Ayer
 * @date   July, 2010
 * tos-2.x port
 *
 * broken out from original gyromagboard* interface/implementation
 *
 * wiring to msp430 i2c implmentation to flesh out gyro/mag board on shimmer2
 * using direct module because we don't need arbitration for this platform.
 */

#include "msp430usart.h"

configuration MagnetometerC {
  provides {
    interface Init;
    interface Magnetometer;
  }
}

implementation {
  components Hmc5843P;
  Init = Hmc5843P;
  Magnetometer = Hmc5843P;

  components new TimerMilliC() as testTimer;
  Hmc5843P.testTimer     -> testTimer;

  enum {
    CLIENT_ID = unique( MSP430_I2CO_BUS ),
  };

  components Msp430I2CP;  // this is mine, ported from tos-1.x; find it in shimmer/chips/msp430
  Hmc5843P.I2CPacket -> Msp430I2CP.I2CBasicAddr;
  Hmc5843P.I2CInit   -> Msp430I2CP.I2CInit;

  components HplMsp430I2C0C;
  Hmc5843P.HplI2C -> HplMsp430I2C0C;
  Msp430I2CP.HplI2C -> HplMsp430I2C0C;

  components HplMsp430Usart0C;
  Msp430I2CP.I2CInterrupts -> HplMsp430Usart0C;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/sd/000077500000000000000000000000001207233610700220375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/sd/SDC.nc000066400000000000000000000044031207233610700227730ustar00rootroot00000000000000/**
 * Copyright (c) 2005 Hewlett-Packard Company
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of the Hewlett-Packard Company nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * communicate with a micro-sd slot wired to a telosb header
 */
/**                                   
 * @author Steve Ayer
 * @date   July 2006
 * @date   July 2009 (reworked, updated to maintained version)
 * @date   March 2010 (reworked for shimmer2)
 * @author Konrad Lorincz
 * @date March 25, 2008 - ported to TOS 2.x
 */

configuration SDC {
  provides {
    interface SD;
    interface StdControl;
  }
}
implementation {
  components SDP;
  SD = SDP;
  StdControl = SDP;

  components new Msp430Usart0C();
  SDP.Usart -> Msp430Usart0C;

  components HplMsp430InterruptP;
  SDP.DockInterrupt -> HplMsp430InterruptP.Port23;

  components LedsC;
  SDP.Leds       -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/straingauge/000077500000000000000000000000001207233610700237425ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/straingauge/StrainGauge.nc000066400000000000000000000035001207233610700264730ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    February, 2011
 */

interface StrainGauge {
  command void powerOn();

  command void powerOff();

  // it has its own
  command void ledOn();
  command void ledOff();
  command void ledToggle();
}




tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/straingauge/StrainGaugeC.nc000066400000000000000000000035271207233610700266070ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    February, 2011
 *
 */

configuration StrainGaugeC {
  provides{
    interface Init;
    interface StrainGauge;
  }
}

implementation {
  components StrainGaugeP;
  Init       = StrainGaugeP;
  StrainGauge  = StrainGaugeP;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/straingauge/StrainGaugeP.nc000066400000000000000000000050771207233610700266260ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    February, 2011
 */

module StrainGaugeP {
  provides {
    interface Init;
    interface StrainGauge;
  }
}

implementation {
  /*
   * don't forget to power it up, not done here
   */
  command error_t Init.init(){

    // power, active low
    TOSH_MAKE_SER0_RTS_OUTPUT();
    TOSH_SEL_SER0_RTS_IOFUNC();

    // best to leave this off until it's actually in use
    call StrainGauge.powerOff();

   // this one tied to the led
    TOSH_MAKE_URXD0_OUTPUT();
    TOSH_SEL_URXD0_IOFUNC();
    call StrainGauge.ledOff();

    return SUCCESS;
  }

  command void StrainGauge.powerOn(){
    call StrainGauge.ledOn();
    TOSH_SET_SER0_RTS_PIN();
  }

  command void StrainGauge.powerOff(){
    call StrainGauge.ledOff();
    TOSH_CLR_SER0_RTS_PIN();
  }

  command void StrainGauge.ledOn() {
    TOSH_CLR_URXD0_PIN();
  }

  command void StrainGauge.ledOff() {
    TOSH_SET_URXD0_PIN();
  }

  command void StrainGauge.ledToggle() {
    TOSH_TOGGLE_URXD0_PIN();
  }
}




tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/tilt/000077500000000000000000000000001207233610700224055ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/tilt/HplTiltDetectorC.nc000066400000000000000000000044331207233610700261100ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telos platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 * (not much to) port to shimmer
 * @author Steve Ayer
 * @date February, 2010
 */

configuration HplTiltDetectorC {
  provides interface GeneralIO;
  provides interface GpioInterrupt;
}
implementation {
  components HplMsp430GeneralIOC as GeneralIOC;
  components HplMsp430InterruptC as InterruptC;

  components new Msp430GpioC() as TiltDetectorC;
  TiltDetectorC -> GeneralIOC.Port24;
  GeneralIO = TiltDetectorC;

  components new Msp430InterruptC() as InterruptTiltDetectorC;
  InterruptTiltDetectorC.HplInterrupt -> InterruptC.Port24;
  GpioInterrupt = InterruptTiltDetectorC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/tilt/TiltDetectorC.nc000066400000000000000000000051351207233610700254440ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform. Get
 * returns the current state of the button by reading the pin,
 * regardless of whether enable() or disable() has been called on the
 * Interface. Notify.enable() and Notify.disable() modify the
 * underlying interrupt state of the pin, and have the effect of
 * enabling or disabling notifications that the button has changed
 * state.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $
 * port to shimmer2 tilt switch
 * @author Steve Ayer
 * @date   February, 2010
 */

configuration TiltDetectorC {
  provides interface Notify;
}
implementation {
  components HplTiltDetectorC;
  components new SwitchToggleC();
  SwitchToggleC.GpioInterrupt -> HplTiltDetectorC.GpioInterrupt;
  SwitchToggleC.GeneralIO -> HplTiltDetectorC.GeneralIO;

  components TiltDetectorP;
  Notify = TiltDetectorP;

  components new TimerMilliC() as debounceTimer;
  TiltDetectorP.NotifyLower -> SwitchToggleC.Notify;
  TiltDetectorP.debounceTimer -> debounceTimer;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/chips/tilt/TiltDetectorP.nc000066400000000000000000000050271207233610700254610ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 * port to shimmer-style
 * @author Steve Ayer
 * @date   February, 2010
 */

#include 

module TiltDetectorP {
  provides interface Notify;

  uses interface Notify as NotifyLower;
  uses interface Timer as debounceTimer;
}
implementation {
  command error_t Notify.enable() {
    return call NotifyLower.enable();
  }

  command error_t Notify.disable() {
    return call NotifyLower.disable();
  }

  event void debounceTimer.fired() {
    call Notify.enable();    // re-enable interrupt
    signal Notify.notify( BUTTON_PRESSED );
  }

  task void debounce() {
    call debounceTimer.startOneShot(250);
  }

  event void NotifyLower.notify( bool val ) {
    // we've only enabled interrupt from rising edge
    post debounce();
  }
  
  default event void Notify.notify( button_state_t val ) { }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2/hardware.h000066400000000000000000000106231207233610700222730ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steven Ayer
 * @date   July 2007
 */


#ifndef _H_hardware_h
#define _H_hardware_h

#include "msp430hardware.h"
/*
 * these left from tos-1.x...
 *
 *#include "MSP430ADC12.h"
 *
 *#include "CC2420Const.h"
 */


// LEDs
TOSH_ASSIGN_PIN(RED_LED,    4, 0);
TOSH_ASSIGN_PIN(YELLOW_LED, 4, 2);
TOSH_ASSIGN_PIN(GREEN_LED,  4, 3);

// CC2420 RADIO
TOSH_ASSIGN_PIN(RADIO_FIFO,  1, 5);
TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 2);
TOSH_ASSIGN_PIN(RADIO_CCA,   2, 7);

// vref is legacy from telos and cc2420 lib; schematic and cc2420 pin say vreg_en
TOSH_ASSIGN_PIN(RADIO_VREF,  5, 6);   

TOSH_ASSIGN_PIN(RADIO_SFD,   1, 0);
TOSH_ASSIGN_PIN(RADIO_SIMO1, 5, 1);
TOSH_ASSIGN_PIN(RADIO_SOMI1, 5, 2);
TOSH_ASSIGN_PIN(RADIO_CSN,   5, 4);
TOSH_ASSIGN_PIN(RADIO_RESET, 5, 7);

// this happens in hplcc2420pinsc
TOSH_ASSIGN_PIN(CC_FIFOP, 1, 2);
TOSH_ASSIGN_PIN(CC_FIFO, 1, 5);
TOSH_ASSIGN_PIN(CC_SFD, 1, 0);
TOSH_ASSIGN_PIN(CC_VREN, 5, 6);
TOSH_ASSIGN_PIN(CC_RSTN, 5, 7);

// BT pins
TOSH_ASSIGN_PIN(BT_PIO,      2, 6);
TOSH_ASSIGN_PIN(BT_RTS,      1, 6);
TOSH_ASSIGN_PIN(BT_CTS,      1, 7);
TOSH_ASSIGN_PIN(BT_TXD,      3, 6);
TOSH_ASSIGN_PIN(BT_RXD,      3, 7);
TOSH_ASSIGN_PIN(BT_RESET,    5, 5);

//BSL Pins
TOSH_ASSIGN_PIN(PROG_OUT,  1, 1);
TOSH_ASSIGN_PIN(PROG_IN,   2, 2);

// SD uart chip-select
TOSH_ASSIGN_PIN(SD_CS_N, 3, 0);

TOSH_ASSIGN_PIN(TILT,  2, 4);

// ADC lines on the testpoints
TOSH_ASSIGN_PIN(ADC_0, 6, 0);
TOSH_ASSIGN_PIN(ADC_1, 6, 1);
TOSH_ASSIGN_PIN(ADC_2, 6, 2);
TOSH_ASSIGN_PIN(ADC_3, 6, 3);
TOSH_ASSIGN_PIN(ADC_4, 6, 4);
TOSH_ASSIGN_PIN(ADC_5, 6, 5);
TOSH_ASSIGN_PIN(ADC_6, 6, 6);
TOSH_ASSIGN_PIN(ADC_7, 6, 7);

TOSH_ASSIGN_PIN(ADC_ACCELZ, 6, 3);
TOSH_ASSIGN_PIN(ADC_ACCELY,  6, 4);
TOSH_ASSIGN_PIN(ADC_ACCELX, 6, 5);

TOSH_ASSIGN_PIN(DAC0_AN, 6, 6);
TOSH_ASSIGN_PIN(DAC1_AN, 6, 7);

TOSH_ASSIGN_PIN(VSENSE_ADC6, 6, 6);
TOSH_ASSIGN_PIN(VSENSE_ADC7,  6, 7);

// bus arbitration pins
TOSH_ASSIGN_PIN(SW_SD_PWR_N, 4, 5);
TOSH_ASSIGN_PIN(SW_BT_PWR_N, 4, 6);

// if used as expansion GPIOs
TOSH_ASSIGN_PIN(SER0_RTS, 1, 3);
TOSH_ASSIGN_PIN(SER0_CTS, 1, 4);

TOSH_ASSIGN_PIN(SIMO0, 3, 1);
TOSH_ASSIGN_PIN(SOMI0, 3, 2);
TOSH_ASSIGN_PIN(UCLK0, 3, 3);
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);

// redefinitions for the sd card driver
TOSH_ASSIGN_PIN(SD_DI, 3, 1);
TOSH_ASSIGN_PIN(SD_DO, 3, 2);
TOSH_ASSIGN_PIN(SD_CLK, 3, 3);


TOSH_ASSIGN_PIN(SIMO1, 5, 1);
TOSH_ASSIGN_PIN(SOMI1, 5, 2);
TOSH_ASSIGN_PIN(UCLK1, 5, 3);
TOSH_ASSIGN_PIN(UTXD1, 3, 6);
TOSH_ASSIGN_PIN(URXD1, 3, 7);

TOSH_ASSIGN_PIN(GIO0, 2, 0);
TOSH_ASSIGN_PIN(GIO1, 2, 1);
TOSH_ASSIGN_PIN(GIO2, 2, 5);  // second internal expansion gpio

// 1-Wire
TOSH_ASSIGN_PIN(ONEWIRE, 4, 7);

// ROSC
TOSH_ASSIGN_PIN(ROSC, 2, 5);

// docked signal from programming board
TOSH_ASSIGN_PIN(DOCK_N, 2, 3);

// ACCEL
TOSH_ASSIGN_PIN(ACCEL_SEL0,  4, 1);
TOSH_ASSIGN_PIN(ACCEL_SEL1,  4, 4);
TOSH_ASSIGN_PIN(ACCEL_SLEEP_N, 5, 0);

#endif // _H_hardware_h

tinyos-2.1.2+dfsg/tos/platforms/shimmer2/platform.h000066400000000000000000000000001207233610700223060ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2/platform_message.h000066400000000000000000000051301207233610700240230ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:54 scipio Exp $
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * Defining the platform-independently named packet structures to be the
 * chip-specific CC1000 packet structures.
 *
 * @author Philip Levis
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
 */


#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 
#include 

typedef union message_header {
  cc2420_header_t cc2420;
  serial_header_t serial;
} message_header_t;

typedef union TOSRadioFooter {
  cc2420_footer_t cc2420;
} message_footer_t;

typedef union TOSRadioMetadata {
  cc2420_metadata_t cc2420;
  serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/000077500000000000000000000000001207233610700205055ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/.platform000066400000000000000000000051151207233610700223340ustar00rootroot00000000000000# SHIMMER2 - platform includes
# Steve Ayer, June 2009; derived from Konrad Lorincz's SHIMMER platform
#
# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.

push( @includes, qw(

      .
  %T/platforms/shimmer2r
  %T/platforms/shimmer2r/chips/cc2420
  %T/platforms/shimmer2r/chips/mma7361
  %T/platforms/shimmer2
  %T/platforms/shimmer2/chips/sd
  %T/platforms/shimmer2/chips/bluetooth
  %T/platforms/shimmer2/chips/tilt
  %T/platforms/shimmer2/chips/gyro
  %T/platforms/shimmer2/chips/gyromag
  %T/platforms/shimmer2/chips/fgpmmopa6b
  %T/platforms/shimmer2/chips/bmp085
  %T/platforms/shimmer2/chips/hmc5843
  %T/platforms/shimmer2/chips/straingauge
  %T/platforms/shimmer
  %T/platforms/shimmer/chips/msp430
  %T/platforms/shimmer/chips/mma7260
  %T/platforms/shimmer/chips/sd
  %T/platforms/shimmer/chips/sd/fatfs
  %T/platforms/shimmer/chips/bluetooth
  %T/platforms/shimmer/chips/ds2411
  %T/platforms/shimmer/chips/gsr
  %T/platforms/shimmer/chips/rmcm01
  %T/chips/cc2420
  %T/chips/cc2420/alarm
  %T/chips/cc2420/control
  %T/chips/cc2420/csma
  %T/chips/cc2420/interfaces
  %T/chips/cc2420/link
  %T/chips/cc2420/lowpan
  %T/chips/cc2420/lpl
  %T/chips/cc2420/packet
  %T/chips/cc2420/receive
  %T/chips/cc2420/spi
  %T/chips/cc2420/transmit
  %T/chips/cc2420/unique
  %T/chips/cc2420/security
  %T/chips/msp430
  %T/chips/msp430/adc12
  %T/chips/msp430/dma
  %T/chips/msp430/pins
  %T/chips/msp430/timer
  %T/chips/msp430/usart
  %T/chips/msp430/sensors
  %T/lib/timer
  %T/lib/serial
  %T/lib/adc
  %T/lib/power
  ) );

@opts = qw(

  -gcc=msp430-gcc
  -mmcu=msp430f1611
  -fnesc-target=msp430
  -fnesc-no-debug
);

push @opts, "-mdisable-hwmul" if `msp430-gcc --version | grep 3.2.3`;
push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

$ENV{'CIL_MACHINE'} =
    "version_major=3 " .
    "version_minor=2 " .
    "version=msp430-3.2.3 " .
    "short=2,2 " .
    "int=2,2 " .
    "long=4,2 " .
    "long_long=8,2 " .
    "pointer=2,2 " .
    "enum=2,2 " .
    "float=4,2 " .
    "double=4,2 " .
    "long_double=4,2 " .
    "void=1,1 " .
    "fun=1,2 " .
    "wchar_size_size=2,2 " .
    "alignof_string=1 " .
    "max_alignment=1 " .
    "char_wchar_signed=true,true " .
    "const_string_literals=true " .
    "big_endian=false " .
    "underscore_name=false " .
    "__builtin_va_list=true " .
    "__thread_is_keyword=true";
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/ActiveMessageC.nc000066400000000000000000000061501207233610700236540ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Philip Levis
 * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
 *
 */
/**
 * The Active Message layer on the SHIMMER platform. This is a naming wrapper
 * around the CC2420 Active Message layer.
 *
 * @author Konrad Lorincz
 */
#include "Timer.h"

configuration ActiveMessageC {
  provides {
    interface SplitControl;

    interface AMSend[uint8_t id];
    interface Receive[uint8_t id];
    interface Receive as Snoop[uint8_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;
    interface LowPowerListening;
  }
}
implementation {
  components CC2420ActiveMessageC as AM;

  SplitControl = AM;
  
  AMSend       = AM;
  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/HplUserButtonC.nc000066400000000000000000000044151207233610700237140ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telos platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 *
 * @author Mike Healy
 * @date May 9, 2009 - modified for use with SHIMMER2
 */

configuration HplUserButtonC {
  provides interface GeneralIO;
  provides interface GpioInterrupt;
}
implementation {
  components HplMsp430GeneralIOC as GeneralIOC;
  components HplMsp430InterruptC as InterruptC;

  components new Msp430GpioC() as UserButtonC;
  UserButtonC -> GeneralIOC.Port20;
  GeneralIO = UserButtonC;

  components new Msp430InterruptC() as InterruptUserButtonC;
  InterruptUserButtonC.HplInterrupt -> InterruptC.Port20;
  GpioInterrupt = InterruptUserButtonC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/Leds.nc000066400000000000000000000111131207233610700217130ustar00rootroot00000000000000// $Id: Leds.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2005-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Commands for controlling three LEDs. A platform can provide this
 * interface if it has more than or fewer than three LEDs. In the
 * former case, these commands refer to the first three LEDs. In the
 * latter case, some of the commands are null operations, and the set
 * of non-null operations must be contiguous and start at Led1. That
 * is, on platforms with 2 LEDs, LED 3's commands are null operations,
 * while on platforms with 1 LED, LED 2 and LED 3's commands are null
 * opertations.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 */

#include "Leds.h"

interface Leds {

  /**
   * Turn on LED 0. The color of this LED depends on the platform.
   */
  async command void led0On();

  /**
   * Turn off LED 0. The color of this LED depends on the platform.
   */
  async command void led0Off();

  /**
   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led0Toggle();

  /**
   * Turn on LED 1. The color of this LED depends on the platform.
   */
  async command void led1On();

  /**
   * Turn off LED 1. The color of this LED depends on the platform.
   */
  async command void led1Off();

   /**
   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led1Toggle();

 
  /**
   * Turn on LED 2. The color of this LED depends on the platform.
   */
  async command void led2On();

  /**
   * Turn off LED 2. The color of this LED depends on the platform.
   */
  async command void led2Off();

   /**
   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led2Toggle();
  
  /**
   * Get the current LED settings as a bitmask. Each bit corresponds to
   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
   * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression
   * will determine whether LED 2 is on:
   *
   * 
         (call Leds.get() & LEDS_LED2) 
        
   *
   * This command supports up to 8 LEDs; if a platform has fewer, then
   * those LEDs should always be off (their bit is zero). Also see
   * set().
   *
   * @return a bitmask describing which LEDs are on and which are off
   */ 
  async command uint8_t get();

  
  /**
   * Set the current LED configuration using a bitmask.  Each bit
   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
   * this statement will configure the LEDs so LED 0 and LED 2 are on:
   *
   * 
         call Leds.set(LEDS_LED0 | LEDS_LED2); 
        
   *
   * This statement will turn LED 1 on if it was not already:
   *
   * 
        call Leds.set(call Leds.get() | LEDS_LED1);
        
   *
   * @param  val   a bitmask describing the on/off settings of the LEDs
   */
   async command void set(uint8_t val);
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/LedsC.nc000066400000000000000000000040731207233610700220250ustar00rootroot00000000000000// $Id: LedsC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 *
 * The basic TinyOS LEDs abstraction.
 *
 * @author Phil Buonadonna
 * @author David Gay
 * @author Philip Levis
 * @author Joe Polastre
 *
 */


configuration LedsC {
  provides interface Leds;
}
implementation {
  components LedsP, PlatformLedsC;

  Leds = LedsP;

  LedsP.Init <- PlatformLedsC.Init;
  LedsP.Led0 -> PlatformLedsC.Led0;
  LedsP.Led1 -> PlatformLedsC.Led1;
  LedsP.Led2 -> PlatformLedsC.Led2;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/LedsP.nc000066400000000000000000000076341207233610700220500ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 * @date   March 21, 2005
 *
 */

module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led0.set();
      call Led1.set();
      call Led2.set();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
    call Led1.clr();
    DBGLED(1);
  }

  async command void Leds.led1Off() {
    call Led1.set();
    DBGLED(1);
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    DBGLED(1);
  }

  async command void Leds.led2On() {
    call Led2.clr();
    DBGLED(2);
  }

  async command void Leds.led2Off() {
    call Led2.set();
    DBGLED(2);
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    DBGLED(2);
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (!call Led0.get()) {
	      rval |= LEDS_LED0;
      }
      if (!call Led1.get()) {
	      rval |= LEDS_LED1;
      }
      if (!call Led2.get()) {
	      rval |= LEDS_LED2;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	      call Leds.led0On();
      }
      else {
	      call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
	      call Leds.led1On();
      }
      else {
	      call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
	      call Leds.led2On();
      }
      else {
	      call Leds.led2Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/MoteClockC.nc000066400000000000000000000035471207233610700230230ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universität Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $Id: MoteClockC.nc,v 1.1 2010-06-10 18:22:02 ayer1 Exp $
 *
 */

 /**
 * @author Vlado Handziski 
 */
 
configuration MoteClockC
{
  provides interface Init as MoteClockInit;
}
implementation

{
  components Msp430ClockC;
  
  MoteClockInit = Msp430ClockC.Init;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/MotePlatformC.nc000066400000000000000000000154411207233610700235500ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steven Ayer
 * @date   July 2007
 * 
 * tos-2.x port June 2009
 *
 */

module MotePlatformC {
  provides interface Init;
}

implementation {

  command error_t Init.init() {
    
    // have to tell mux to connect path from msp430 to sd
    TOSH_SEL_DOCK_N_IOFUNC();
    TOSH_MAKE_DOCK_N_OUTPUT();
    TOSH_SET_DOCK_N_PIN();

    // bus arbitration pins 
    TOSH_SEL_SW_SD_PWR_N_IOFUNC();
    TOSH_MAKE_SW_SD_PWR_N_OUTPUT();

    TOSH_SEL_SD_CS_N_IOFUNC();
    TOSH_MAKE_SD_CS_N_OUTPUT();

    TOSH_SEL_SD_CLK_IOFUNC();
    TOSH_MAKE_SD_CLK_OUTPUT();
    TOSH_SEL_SD_DO_IOFUNC();
    TOSH_MAKE_SD_DO_INPUT();
    TOSH_SEL_SD_DI_IOFUNC();
    TOSH_MAKE_SD_DI_OUTPUT();
  
    // power down sd module; overridden by dock pin on programming board
    /*
     * other pins are zeroed to reset card
     * at end of this routine, we raise them again (they have pullups, too)
     */
    TOSH_SET_SW_SD_PWR_N_PIN();     
    TOSH_CLR_SD_CS_N_PIN();
    TOSH_CLR_SD_DI_PIN();
    TOSH_CLR_SD_CLK_PIN();
  
    TOSH_SEL_SW_BT_PWR_N_IOFUNC();
    TOSH_MAKE_SW_BT_PWR_N_OUTPUT();
    TOSH_SET_SW_BT_PWR_N_PIN();     // power down bt module; overridden by dock pin on programming board

    //LEDS
    TOSH_SEL_RED_LED_IOFUNC();
    TOSH_MAKE_RED_LED_OUTPUT();
    TOSH_SEL_YELLOW_LED_IOFUNC();
    TOSH_MAKE_YELLOW_LED_OUTPUT();
    TOSH_SEL_GREEN_LED_IOFUNC();
    TOSH_MAKE_GREEN_LED_OUTPUT();

    TOSH_SET_RED_LED_PIN();
    TOSH_SET_YELLOW_LED_PIN();
    TOSH_SET_GREEN_LED_PIN();

    //RADIO PINS
    //CC2420 pins
    TOSH_MAKE_RADIO_VREF_OUTPUT();
    TOSH_SEL_RADIO_VREF_IOFUNC();
    TOSH_CLR_RADIO_VREF_PIN();    // power down 

    TOSH_MAKE_RADIO_CSN_OUTPUT();
    TOSH_SEL_RADIO_CSN_IOFUNC();
    TOSH_SET_RADIO_CSN_PIN();

    // should be reset_n
    TOSH_MAKE_RADIO_RESET_OUTPUT();
    TOSH_SEL_RADIO_RESET_IOFUNC();
    TOSH_CLR_RADIO_RESET_PIN();

    TOSH_SEL_RADIO_CCA_IOFUNC();
    TOSH_MAKE_RADIO_CCA_INPUT();
    TOSH_SEL_RADIO_FIFO_IOFUNC();
    TOSH_MAKE_RADIO_FIFO_INPUT();
    TOSH_SEL_RADIO_FIFOP_IOFUNC();
    TOSH_MAKE_RADIO_FIFOP_INPUT();
    TOSH_SEL_RADIO_SFD_IOFUNC();
    TOSH_MAKE_RADIO_SFD_INPUT();

    TOSH_SEL_TILT_IOFUNC();
    TOSH_MAKE_TILT_INPUT();

    // BT PINS
    TOSH_MAKE_BT_RESET_OUTPUT();  
    TOSH_SEL_BT_RESET_IOFUNC();    
    TOSH_CLR_BT_RESET_PIN();   // mitsumi module disabled by clr

    TOSH_MAKE_BT_RTS_INPUT();      
    TOSH_SEL_BT_RTS_IOFUNC();

    TOSH_MAKE_BT_PIO_INPUT();
    TOSH_SEL_BT_PIO_IOFUNC();

    TOSH_MAKE_BT_CTS_OUTPUT();
    TOSH_SEL_BT_CTS_IOFUNC();

    TOSH_MAKE_BT_TXD_OUTPUT();
    TOSH_SEL_BT_TXD_IOFUNC();

    TOSH_MAKE_BT_RXD_INPUT();
    TOSH_SEL_BT_RXD_IOFUNC();

    // BSL Prog Pins tristate em
    TOSH_MAKE_PROG_IN_OUTPUT();
    TOSH_MAKE_PROG_OUT_OUTPUT();
    TOSH_SET_PROG_OUT_PIN();    // some expansion boards have enable low
    TOSH_SEL_PROG_IN_IOFUNC();
    TOSH_SEL_PROG_OUT_IOFUNC();

    // ADC lines
    TOSH_SEL_ADC_0_IOFUNC();
    TOSH_MAKE_ADC_0_OUTPUT();
    TOSH_SEL_ADC_1_IOFUNC();
    TOSH_MAKE_ADC_1_OUTPUT();
    TOSH_SEL_ADC_2_IOFUNC();
    TOSH_MAKE_ADC_2_OUTPUT();
    TOSH_SEL_ADC_6_IOFUNC();
    TOSH_MAKE_ADC_6_OUTPUT();
    TOSH_SEL_ADC_7_IOFUNC();
    TOSH_MAKE_ADC_7_OUTPUT();

    TOSH_SEL_ADC_ACCELZ_IOFUNC();
    TOSH_MAKE_ADC_ACCELZ_INPUT();
    TOSH_SEL_ADC_ACCELY_IOFUNC();
    TOSH_MAKE_ADC_ACCELY_INPUT();
    TOSH_SEL_ADC_ACCELX_IOFUNC();
    TOSH_MAKE_ADC_ACCELX_INPUT();
  
    TOSH_SEL_ROSC_IOFUNC();
    TOSH_MAKE_ROSC_INPUT();

    // 1-wire function
    TOSH_SEL_ONEWIRE_IOFUNC();
    TOSH_MAKE_ONEWIRE_OUTPUT();
    TOSH_SET_ONEWIRE_PIN();

    /*
     *  Accelerometer pin definitions
     * unless the accel_sel0 pin is cleared, 
     * a severe quiescent power hit occurs on the msp430
     * we go from 3.7 ua to 65.1 ua when asleep!
     */
    TOSH_SEL_ACCEL_SEL0_IOFUNC();
    TOSH_MAKE_ACCEL_SEL0_OUTPUT();
    TOSH_CLR_ACCEL_SEL0_PIN();
    TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
    TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT();
    TOSH_CLR_ACCEL_SLEEP_N_PIN();
    
    /*
     * switches between adc0 & adc7 pass-through when low
     * and battery/regulator signals for power monitoring 
     */
    TOSH_SEL_PWRMUX_SEL_IOFUNC();
    TOSH_MAKE_PWRMUX_SEL_OUTPUT();
    TOSH_CLR_PWRMUX_SEL_PIN();
    
    // idle expansion header pins
    TOSH_SEL_SER0_CTS_IOFUNC();
    TOSH_MAKE_SER0_CTS_OUTPUT();
    TOSH_SEL_SER0_RTS_IOFUNC();
    TOSH_MAKE_SER0_RTS_OUTPUT();
    TOSH_CLR_SER0_RTS_PIN();

    // this pin is now tied to the user button on the prog board
    TOSH_SEL_GIO0_IOFUNC();
    TOSH_MAKE_GIO0_OUTPUT();
    TOSH_CLR_GIO0_PIN();

    TOSH_SEL_GIO1_IOFUNC();
    TOSH_MAKE_GIO1_OUTPUT();

    TOSH_SEL_UTXD0_IOFUNC();
    TOSH_MAKE_UTXD0_OUTPUT();
    TOSH_SEL_URXD0_IOFUNC();
    TOSH_MAKE_URXD0_OUTPUT();
    TOSH_SET_URXD0_PIN();

    TOSH_SEL_UTXD1_IOFUNC();
    TOSH_MAKE_UTXD1_OUTPUT();
    TOSH_SEL_URXD1_IOFUNC();
    TOSH_MAKE_URXD1_OUTPUT();
    TOSH_SEL_UCLK1_IOFUNC();
    TOSH_MAKE_UCLK1_OUTPUT();
    TOSH_SEL_SIMO1_IOFUNC();
    TOSH_MAKE_SIMO1_OUTPUT();
    TOSH_SEL_SOMI1_IOFUNC();
    TOSH_MAKE_SOMI1_INPUT();

    TOSH_SET_SD_CS_N_PIN();
    TOSH_SET_SD_DI_PIN();
    TOSH_SET_SD_CLK_PIN();

    // these are attached to the same pullup as above
    TOSH_SET_SIMO1_PIN();
    TOSH_SET_UCLK1_PIN();

    // set it back to default state
    TOSH_MAKE_DOCK_N_INPUT();

    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/Msp430Timer32khzMapC.nc000066400000000000000000000065221207233610700244460ustar00rootroot00000000000000//$Id: Msp430Timer32khzMapC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * MSP430Timer32khzMapC presents as paramaterized interfaces all of
 * the 32khz hardware timers on the MSP430 that are available for
 * compile time allocation by "new Alarm32khz16C()", "new
 * AlarmMilli32C()", and so on.  
 *
 * Platforms based on the MSP430 are * encouraged to copy in and
 * override this file, presenting only the * hardware timers that are
 * available for allocation on that platform.
 *
 * @author Cory Sharp 
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
 */

configuration Msp430Timer32khzMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
  Msp430Compare[0] = Msp430TimerC.CompareB0;

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
  Msp430Compare[1] = Msp430TimerC.CompareB1;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
  Msp430Compare[2] = Msp430TimerC.CompareB2;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
  Msp430Compare[3] = Msp430TimerC.CompareB3;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
  Msp430Compare[4] = Msp430TimerC.CompareB4;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
  Msp430Compare[5] = Msp430TimerC.CompareB5;

  Msp430Timer[6] = Msp430TimerC.TimerB;
  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
  Msp430Compare[6] = Msp430TimerC.CompareB6;
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/NoLedsC.nc000066400000000000000000000050311207233610700223150ustar00rootroot00000000000000// $Id: NoLedsC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * A null operation replacement for the LedsC component. As many
 * components might concurrently signal information through LEDs,
 * using LedsC and NoLedsC allows an application builder to select
 * which components control the LEDs.
 *
 * @author Philip Levis
 * @date   March 19, 2005
 *
 */

module NoLedsC {
  provides interface Init;
  provides interface Leds;
}
implementation {

  command error_t Init.init() {return SUCCESS;}

  async command void Leds.led0On() {}
  async command void Leds.led0Off() {}
  async command void Leds.led0Toggle() {}

  async command void Leds.led1On() {}
  async command void Leds.led1Off() {}
  async command void Leds.led1Toggle() {}

  async command void Leds.led2On() {}
  async command void Leds.led2Off() {}
  async command void Leds.led2Toggle() {}

  async command uint8_t Leds.get() {return 0;}
  async command void Leds.set(uint8_t val) {}
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/PlatformC.nc000066400000000000000000000036641207233610700227270ustar00rootroot00000000000000/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre and Cory Sharp
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
 */
#include "hardware.h"

configuration PlatformC
{
  provides interface Init;
}
implementation
{
  components PlatformP, MotePlatformC, MoteClockC;

  Init = PlatformP;
  PlatformP.MoteClockInit -> MoteClockC;
  PlatformP.MoteInit -> MotePlatformC;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/PlatformLedsC.nc000066400000000000000000000045061207233610700235330ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
 */

#include "hardware.h"

configuration PlatformLedsC {
  provides interface GeneralIO as Led0;
  provides interface GeneralIO as Led1;
  provides interface GeneralIO as Led2;
  uses interface Init;
}
implementation
{
  components 
      HplMsp430GeneralIOC as GeneralIOC
    , new Msp430GpioC() as Led0Impl
    , new Msp430GpioC() as Led1Impl
    , new Msp430GpioC() as Led2Impl
    ;
  components PlatformP;

  Init = PlatformP.LedsInit;

  Led0 = Led0Impl;
  Led0Impl -> GeneralIOC.Port40;

  Led1 = Led1Impl;
  Led1Impl -> GeneralIOC.Port42;

  Led2 = Led2Impl;
  Led2Impl -> GeneralIOC.Port43;

}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/PlatformP.nc000066400000000000000000000006601207233610700227350ustar00rootroot00000000000000#include "hardware.h"

module PlatformP{
  provides interface Init;
  uses interface Init as MoteClockInit;
  uses interface Init as MoteInit;
  uses interface Init as LedsInit;
}
implementation {
  command error_t Init.init() {
    WDTCTL = WDTPW + WDTHOLD;
    call MoteClockInit.init();
    call MoteInit.init();
    call LedsInit.init();
    return SUCCESS;
  }

  default command error_t LedsInit.init() { return SUCCESS; }

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/PlatformSerialC.nc000066400000000000000000000041001207233610700240510ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * mostly copied from shimmer
 *
 * @author Steve Ayer
 * @date   June 2009
 */

configuration PlatformSerialC {
  provides interface StdControl;
  provides interface UartStream;
  provides interface UartByte;
}

implementation {
  components new Msp430Uart0C() as UartC;
  UartStream = UartC;  
  UartByte = UartC;
  
  components ShimmerSerialP;
  StdControl = ShimmerSerialP;
  ShimmerSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
  ShimmerSerialP.Resource -> UartC.Resource;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/ShimmerSerialP.nc000066400000000000000000000047101207233610700237150ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date June 2009
 */

module ShimmerSerialP {
  provides interface StdControl;
  provides interface Msp430UartConfigure;
  uses interface Resource;
}

implementation {
  msp430_uart_union_config_t msp430_uart_shimmer2_config = { 
    { ubr: UBR_1MHZ_115200, 
      umctl: UMCTL_1MHZ_115200, 
      ssel: 0x02, 
      pena: 0, 
      pev: 0, 
      spb: 0, 
      clen: 1, 
      listen: 0, 
      mm: 0, 
      ckpl: 0, 
      urxse: 0, 
      urxeie: 1, 
      urxwie: 0, 
      utxe : 1, 
      urxe : 1 
    } 
  };

  command error_t StdControl.start(){
    return call Resource.immediateRequest();
  }
  
  command error_t StdControl.stop(){
    call Resource.release();
    return SUCCESS;
  }

  event void Resource.granted(){}

  async command msp430_uart_union_config_t * Msp430UartConfigure.getConfig(){
    return &msp430_uart_shimmer2_config;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/000077500000000000000000000000001207233610700216135ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/000077500000000000000000000000001207233610700225105ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/CC2420CsmaC.nc000066400000000000000000000057171207233610700245500ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Basic implementation of a CSMA MAC for the ChipCon CC2420 radio.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2012-07-26 17:51:39 $
 *
 * mods to provide CC2420RxState interface, which allows application 
 * to disable radio reception and/or cca for manual control of high-density
 * synchronization routines
 * @author Steve Ayer
 * @date   March, 2012
 */

#include "CC2420.h"
#include "IEEE802154.h"

configuration CC2420CsmaC {

  provides interface SplitControl;
  provides interface Send;
  provides interface Receive;
  provides interface RadioBackoff;
  provides interface CC2420RxState;
}

implementation {

  components CC2420CsmaP as CsmaP;
  RadioBackoff = CsmaP;
  SplitControl = CsmaP;
  Send = CsmaP;
  CC2420RxState = CsmaP;

  components CC2420ControlC;
  CsmaP.Resource -> CC2420ControlC;
  CsmaP.CC2420Power -> CC2420ControlC;

  components CC2420TransmitC;
  CsmaP.SubControl -> CC2420TransmitC;
  CsmaP.CC2420Transmit -> CC2420TransmitC;
  CsmaP.SubBackoff -> CC2420TransmitC;

  components CC2420ReceiveC;
  Receive = CC2420ReceiveC;
  CsmaP.SubControl -> CC2420ReceiveC;

  components CC2420PacketC;
  CsmaP.CC2420Packet -> CC2420PacketC;
  CsmaP.CC2420PacketBody -> CC2420PacketC;
  
  components RandomC;
  CsmaP.Random -> RandomC;

  components new StateC();
  CsmaP.SplitControlState -> StateC;
  
  components LedsC as Leds;
  CsmaP.Leds -> Leds;
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/CC2420CsmaP.nc000066400000000000000000000223671207233610700245650ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2012-03-02 16:52:48 $
 *
 * mods to provide CC2420RxState interface, which allows application 
 * to disable radio reception and/or cca for manual control of high-density
 * synchronization routines
 * @author Steve Ayer
 * @date   March, 2012
 */

module CC2420CsmaP @safe() {

  provides interface SplitControl;
  provides interface Send;
  provides interface RadioBackoff;

  provides interface CC2420RxState;

  uses interface Resource;
  uses interface CC2420Power;
  uses interface StdControl as SubControl;
  uses interface CC2420Transmit;
  uses interface RadioBackoff as SubBackoff;
  uses interface Random;
  uses interface Leds;
  uses interface CC2420Packet;
  uses interface CC2420PacketBody;
  uses interface State as SplitControlState;

}

implementation {

  enum {
    S_STOPPED,
    S_STARTING,
    S_STARTED,
    S_STOPPING,
    S_TRANSMITTING,
  };

  message_t* ONE_NOK m_msg;
  
  error_t sendErr = SUCCESS;
  
  /** TRUE if we are to use CCA when sending the current packet */
  norace bool ccaOn = TRUE;

  bool RxState = TRUE;

  /****************** Prototypes ****************/
  task void startDone_task();
  task void stopDone_task();
  task void sendDone_task();
  
  void shutdown();

  command error_t CC2420RxState.enableRx(bool enabled) {
    atomic {
      if(enabled)
	RxState = TRUE;
      else
	RxState = FALSE;
    }

    return SUCCESS;
  }
					      
  command error_t CC2420RxState.enableCca(bool enabled) {
    atomic {
      if(enabled)
	ccaOn = TRUE;
      else
	ccaOn = FALSE;
    }

    return SUCCESS;
  }
					      
  /***************** SplitControl Commands ****************/
  command error_t SplitControl.start() {
    if(call SplitControlState.requestState(S_STARTING) == SUCCESS) {
      call CC2420Power.startVReg();
      return SUCCESS;
    
    } else if(call SplitControlState.isState(S_STARTED)) {
      return EALREADY;
      
    } else if(call SplitControlState.isState(S_STARTING)) {
      return SUCCESS;
    }
    
    return EBUSY;
  }

  command error_t SplitControl.stop() {
    if (call SplitControlState.isState(S_STARTED)) {
      call SplitControlState.forceState(S_STOPPING);
      shutdown();
      return SUCCESS;
      
    } else if(call SplitControlState.isState(S_STOPPED)) {
      return EALREADY;
    
    } else if(call SplitControlState.isState(S_TRANSMITTING)) {
      call SplitControlState.forceState(S_STOPPING);
      // At sendDone, the radio will shut down
      return SUCCESS;
    
    } else if(call SplitControlState.isState(S_STOPPING)) {
      return SUCCESS;
    }
    
    return EBUSY;
  }

  /***************** Send Commands ****************/
  command error_t Send.cancel( message_t* p_msg ) {
    return call CC2420Transmit.cancel();
  }

  command error_t Send.send( message_t* p_msg, uint8_t len ) {
    
    cc2420_header_t* header = call CC2420PacketBody.getHeader( p_msg );
    cc2420_metadata_t* metadata = call CC2420PacketBody.getMetadata( p_msg );

    atomic {
      if (!call SplitControlState.isState(S_STARTED)) {
        return FAIL;
      }
      
      call SplitControlState.forceState(S_TRANSMITTING);
      m_msg = p_msg;
    }

    // header->length = len + CC2420_SIZE;
#ifdef CC2420_HW_SECURITY
    header->fcf &= ((1 << IEEE154_FCF_ACK_REQ)|
                    (1 << IEEE154_FCF_SECURITY_ENABLED)|
                    (0x3 << IEEE154_FCF_SRC_ADDR_MODE) |
                    (0x3 << IEEE154_FCF_DEST_ADDR_MODE));
#else
    header->fcf &= ((1 << IEEE154_FCF_ACK_REQ) | 
                    (0x3 << IEEE154_FCF_SRC_ADDR_MODE) |
                    (0x3 << IEEE154_FCF_DEST_ADDR_MODE));
#endif
    header->fcf |= ( ( IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE ) |
		     ( 1 << IEEE154_FCF_INTRAPAN ) ); 

    metadata->ack = FALSE;
    metadata->rssi = 0;
    metadata->lqi = 0;
    //metadata->timesync = FALSE;
    metadata->timestamp = CC2420_INVALID_TIMESTAMP;

    //    ccaOn = FALSE;

    signal RadioBackoff.requestCca(m_msg);

    call CC2420Transmit.send( m_msg, ccaOn );
    return SUCCESS;

  }

  command void* Send.getPayload(message_t* m, uint8_t len) {
    if (len <= call Send.maxPayloadLength()) {
      return (void* COUNT_NOK(len ))(m->data);
    }
    else {
      return NULL;
    }
  }

  command uint8_t Send.maxPayloadLength() {
    return TOSH_DATA_LENGTH;
  }

  /**************** RadioBackoff Commands ****************/
  /**
   * Must be called within a requestInitialBackoff event
   * @param backoffTime the amount of time in some unspecified units to backoff
   */
  async command void RadioBackoff.setInitialBackoff(uint16_t backoffTime) {
    call SubBackoff.setInitialBackoff(backoffTime);
  }
  
  /**
   * Must be called within a requestCongestionBackoff event
   * @param backoffTime the amount of time in some unspecified units to backoff
   */
  async command void RadioBackoff.setCongestionBackoff(uint16_t backoffTime) {
    call SubBackoff.setCongestionBackoff(backoffTime);
  }
      
  /**
   * Enable CCA for the outbound packet.  Must be called within a requestCca
   * event
   * @param ccaOn TRUE to enable CCA, which is the default.
   */
  async command void RadioBackoff.setCca(bool useCca) {
    //    ccaOn = useCca;
  }
  

  /**************** Events ****************/
  async event void CC2420Transmit.sendDone( message_t* p_msg, error_t err ) {
    atomic sendErr = err;
    post sendDone_task();
  }

  async event void CC2420Power.startVRegDone() {
    call Resource.request();
  }
  
  event void Resource.granted() {
    call CC2420Power.startOscillator();
  }

  async event void CC2420Power.startOscillatorDone() {
    post startDone_task();
  }
  
  /***************** SubBackoff Events ****************/
  async event void SubBackoff.requestInitialBackoff(message_t *msg) {
    call SubBackoff.setInitialBackoff ( call Random.rand16() 
        % (0x1F * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF);
        
    signal RadioBackoff.requestInitialBackoff(msg);
  }

  async event void SubBackoff.requestCongestionBackoff(message_t *msg) {
    call SubBackoff.setCongestionBackoff( call Random.rand16() 
        % (0x7 * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF);

    signal RadioBackoff.requestCongestionBackoff(msg);
  }
  
  async event void SubBackoff.requestCca(message_t *msg) {
    // Lower layers than this do not configure the CCA settings
    signal RadioBackoff.requestCca(msg);
  }
  
  
  /***************** Tasks ****************/
  task void sendDone_task() {
    error_t packetErr;
    atomic packetErr = sendErr;
    if(call SplitControlState.isState(S_STOPPING)) {
      shutdown();
      
    } else {
      call SplitControlState.forceState(S_STARTED);
    }
    
    signal Send.sendDone( m_msg, packetErr );
  }

  task void startDone_task() {
    call SubControl.start();
    if(RxState == TRUE)
      call CC2420Power.rxOn();
    call Resource.release();
    call SplitControlState.forceState(S_STARTED);
    signal SplitControl.startDone( SUCCESS );
  }
  
  task void stopDone_task() {
    call SplitControlState.forceState(S_STOPPED);
    signal SplitControl.stopDone( SUCCESS );
  }
  
  
  /***************** Functions ****************/
  /**
   * Shut down all sub-components and turn off the radio
   */
  void shutdown() {
    call SubControl.stop();
    call CC2420Power.stopVReg();
    post stopDone_task();
  }

  /***************** Defaults ***************/
  default event void SplitControl.startDone(error_t error) {
  }
  
  default event void SplitControl.stopDone(error_t error) {
  }
  
  default async event void RadioBackoff.requestInitialBackoff(message_t *msg) {
  }

  default async event void RadioBackoff.requestCongestionBackoff(message_t *msg) {
  }
  
  default async event void RadioBackoff.requestCca(message_t *msg) {
  }
  
  
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/CC2420GpioCaptureC.nc000066400000000000000000000067741207233610700261130ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 * @author Jonathan Hui
 * @author Joe Polastre
 * @author Steve Ayer/Miklos Maroti
 * @date   February, 2011
 *
 * re-named indicating that this HAL module is specifically required to handle anomalies in the 
 * cc2420 stack that require sfd capture to happen on a timerb pin;  designs that use a timera pin 
 * need this code to resolve the aliasing between timestamps from 32khz and 1mhz timers.
 * thanks to miklos for providing this re-written captured event handler as a straight-forward work-around!
 */

generic module CC2420GpioCaptureC() @safe() {

  provides interface GpioCapture as Capture;
  uses interface Msp430TimerControl;
  uses interface Msp430Capture;
  uses interface HplMsp430GeneralIO as GeneralIO;
  uses interface LocalTime as LocalTime32khz;
  uses interface LocalTime as LocalTimeMicro;
}

implementation {

  error_t enableCapture( uint8_t mode ) {
    atomic {
      call Msp430TimerControl.disableEvents();
      call GeneralIO.selectModuleFunc();
      call Msp430TimerControl.clearPendingInterrupt();
      call Msp430Capture.clearOverflow();
      call Msp430TimerControl.setControlAsCapture( mode );
      call Msp430TimerControl.enableEvents();
    }
    return SUCCESS;
  }

  async command error_t Capture.captureRisingEdge() {
    return enableCapture( MSP430TIMER_CM_RISING );
  }

  async command error_t Capture.captureFallingEdge() {
    return enableCapture( MSP430TIMER_CM_FALLING );
  }

  async command void Capture.disable() {
    atomic {
      call Msp430TimerControl.disableEvents();
      call GeneralIO.selectIOFunc();
    }
  }

  async event void Msp430Capture.captured(uint16_t capturedMicro) {
    uint16_t elapsedMicro;
    uint16_t captured32khz;
    
    atomic {
      elapsedMicro = call LocalTimeMicro.get() - capturedMicro;
      captured32khz = call LocalTime32khz.get();
    }
    
    captured32khz -= elapsedMicro >> 5;
    
    signal Capture.captured(captured32khz);
  }
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/CC2420RxState.nc000066400000000000000000000036311207233610700251450ustar00rootroot00000000000000/*
 * Copyright (c) 2012, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * strictly for manipulating the receiver prior to radio start-up
 * so that we can run without reception and/or cca under certain circumstances
 *
 * @author Steve Ayer
 * @date   February, 2012
 */

interface CC2420RxState {

  command error_t enableRx(bool enabled);

  command error_t enableCca(bool enabled);

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/HplCC2420AlarmC.nc000066400000000000000000000040231207233610700253520ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-06-10 18:22:02 $
 */

generic configuration HplCC2420AlarmC() {

  provides interface Init;
  provides interface Alarm as Alarm32khz32;

}

implementation {

  components new Alarm32khz32C();

  Init = Alarm32khz32C;
  Alarm32khz32 = Alarm32khz32C;
  
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/HplCC2420InterruptsC.nc000066400000000000000000000062501207233610700265010ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of interrupts and captures for the ChipCon
 * CC2420 radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-06-10 18:22:02 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 *
 * @author Steve Ayer
 * @date April, 2010
 */

configuration HplCC2420InterruptsC {

  provides interface GpioCapture as CaptureSFD;
  provides interface GpioInterrupt as InterruptCCA;
  provides interface GpioInterrupt as InterruptFIFOP;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components Msp430TimerC;
  components new CC2420GpioCaptureC() as CaptureSFDC;
  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlA1;
  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureA1;
  CaptureSFDC.GeneralIO -> GeneralIOC.Port12;

  components Counter32khz32C as Counter, new CounterToLocalTimeC(T32khz);
  CounterToLocalTimeC.Counter -> Counter;
  CaptureSFDC.LocalTime32khz -> CounterToLocalTimeC;

  components CounterMicro32C, new CounterToLocalTimeC(TMicro) as CounterMicroToLocalTime;
  CounterMicroToLocalTime.Counter -> CounterMicro32C;
  CaptureSFDC.LocalTimeMicro -> CounterMicroToLocalTime;

  components HplMsp430InterruptC;
  components new Msp430InterruptC() as InterruptCCAC;
  components new Msp430InterruptC() as InterruptFIFOPC;
  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port27;
  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port10;

  InterruptCCA = InterruptCCAC.Interrupt;
  InterruptFIFOP = InterruptFIFOPC.Interrupt;
  CaptureSFD = CaptureSFDC.Capture;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/HplCC2420PinsC.nc000066400000000000000000000055351207233610700252400ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for the ChipCon CC2420
 * radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-06-10 18:22:02 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 */

configuration HplCC2420PinsC {

  provides interface GeneralIO as CCA;
  provides interface GeneralIO as CSN;
  provides interface GeneralIO as FIFO;
  provides interface GeneralIO as FIFOP;
  provides interface GeneralIO as RSTN;
  provides interface GeneralIO as SFD;
  provides interface GeneralIO as VREN;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components new Msp430GpioC() as CCAM;
  components new Msp430GpioC() as CSNM;
  components new Msp430GpioC() as FIFOM;
  components new Msp430GpioC() as FIFOPM;
  components new Msp430GpioC() as RSTNM;
  components new Msp430GpioC() as SFDM;
  components new Msp430GpioC() as VRENM;

  CCAM -> GeneralIOC.Port27;
  CSNM -> GeneralIOC.Port54;
  FIFOM -> GeneralIOC.Port15;
  FIFOPM -> GeneralIOC.Port10;
  RSTNM -> GeneralIOC.Port57;
  SFDM -> GeneralIOC.Port12;
  VRENM -> GeneralIOC.Port56;

  CCA = CCAM;
  CSN = CSNM;
  FIFO = FIFOM;
  FIFOP = FIFOPM;
  RSTN = RSTNM;
  SFD = SFDM;
  VREN = VRENM;
  
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420/HplCC2420SpiC.nc000066400000000000000000000041541207233610700250560ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the SPI bus for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-06-10 18:22:02 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 */

generic configuration HplCC2420SpiC() {
  
  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;
  
}

implementation {

  components new Msp430Spi1C() as SpiC;
  
  Resource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;
  
}

tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420x/000077500000000000000000000000001207233610700227005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420x/t32khz/000077500000000000000000000000001207233610700240255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420x/t32khz/HplCC2420XC.nc000066400000000000000000000055131207233610700260470ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi1C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port27;
	CSNM -> IO.Port54;
	FIFOM -> IO.Port15;
	FIFOPM -> IO.Port10;
	RSTNM -> IO.Port57;
	SFDM -> IO.Port12;
	VRENM -> IO.Port56;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	// capture
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlA1;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureA1;
	GpioCaptureC.GeneralIO -> IO.Port12;
	SfdCapture = GpioCaptureC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port10;
	FifopInterrupt = FifopInterruptC.Interrupt; 


	// alarm
	components new Alarm32khz16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTime32khzC;
	LocalTimeRadio = LocalTime32khzC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420x/tmicro/000077500000000000000000000000001207233610700241755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/cc2420x/tmicro/HplCC2420XC.nc000066400000000000000000000055131207233610700262170ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi1C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port27;
	CSNM -> IO.Port54;
	FIFOM -> IO.Port15;
	FIFOPM -> IO.Port10;
	RSTNM -> IO.Port57;
	SFDM -> IO.Port12;
	VRENM -> IO.Port56;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	// capture
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlA1;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureA1;
	GpioCaptureC.GeneralIO -> IO.Port12;
 	SfdCapture = GpioCaptureC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port10;
	FifopInterrupt = FifopInterruptC.Interrupt; 

	// alarm
	components new AlarmMicro16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTimeMicroC;
	LocalTimeRadio = LocalTimeMicroC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/mma7361/000077500000000000000000000000001207233610700227065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/mma7361/AccelC.nc000066400000000000000000000034761207233610700243540ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   May, 2010
 * 
 */

configuration AccelC {
   provides {
      interface Mma_Accel as Accel;
      interface Init;
   }
}
implementation {
  components Mma7361P;
  Init = Mma7361P;
  Accel = Mma7361P;
}
tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/chips/mma7361/Mma7361P.nc000066400000000000000000000052171207233610700244100ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author  Steve Ayer
 * @date    April, 2010
 */

#include "Mma_Accel.h"

module Mma7361P {
  provides {
    interface Init;
    interface Mma_Accel as Accel;
  }
}

implementation {
#warning "This accelerometer chipset supports only 1.5 and 6.0g; other settings will default to 1.5g"

  command error_t Init.init(){
    // control pins are already iofunc/input

    TOSH_SEL_ADC_ACCELZ_MODFUNC();
    TOSH_SEL_ADC_ACCELY_MODFUNC();
    TOSH_SEL_ADC_ACCELX_MODFUNC();

    call Accel.wake(1);

    return SUCCESS;
  }

  command void Accel.wake (bool wakeup) {
    if(wakeup)
      TOSH_SET_ACCEL_SLEEP_N_PIN();    // wakes up accel board
    else
      TOSH_CLR_ACCEL_SLEEP_N_PIN();    // puts accel board to sleep
  }

  command void Accel.setSensitivity (uint8_t sensitivity) {
    switch(sensitivity) {
    case RANGE_1_5G:
      TOSH_CLR_ACCEL_SEL0_PIN();
      break;
    case RANGE_6_0G:
      TOSH_SET_ACCEL_SEL0_PIN();
      break;
    default:                     // in case someone feeds it a non-7361 range
      TOSH_CLR_ACCEL_SEL0_PIN();
      break;
    }
  }
}





tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/hardware.h000066400000000000000000000106231207233610700224550ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Intel Corporation
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 * 
 * Redistributions of source code must retain the above copyright notice, 
 * this list of conditions and the following disclaimer. 
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution. 
 *
 * Neither the name of the Intel Corporation nor the names of its contributors
 * may be used to endorse or promote products derived from this software 
 * without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
 * POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steven Ayer
 * @date   July 2007
 */


#ifndef _H_hardware_h
#define _H_hardware_h

#include "msp430hardware.h"
/*
 * these left from tos-1.x...
 *
 *#include "MSP430ADC12.h"
 *
 *#include "CC2420Const.h"
 */


// LEDs
TOSH_ASSIGN_PIN(RED_LED,    4, 0);
TOSH_ASSIGN_PIN(YELLOW_LED, 4, 2);
TOSH_ASSIGN_PIN(GREEN_LED,  4, 3);

// CC2420 RADIO
TOSH_ASSIGN_PIN(RADIO_FIFO,  1, 5);
TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
TOSH_ASSIGN_PIN(RADIO_CCA,   2, 7);

// vref is legacy from telos and cc2420 lib; schematic and cc2420 pin say vreg_en
TOSH_ASSIGN_PIN(RADIO_VREF,  5, 6);   

TOSH_ASSIGN_PIN(RADIO_SFD,   1, 2);
TOSH_ASSIGN_PIN(RADIO_SIMO1, 5, 1);
TOSH_ASSIGN_PIN(RADIO_SOMI1, 5, 2);
TOSH_ASSIGN_PIN(RADIO_CSN,   5, 4);
TOSH_ASSIGN_PIN(RADIO_RESET, 5, 7);

// this happens in hplcc2420pinsc
TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
TOSH_ASSIGN_PIN(CC_FIFO, 1, 5);
TOSH_ASSIGN_PIN(CC_SFD, 1, 2);
TOSH_ASSIGN_PIN(CC_VREN, 5, 6);
TOSH_ASSIGN_PIN(CC_RSTN, 5, 7);

// BT pins
TOSH_ASSIGN_PIN(BT_PIO,      2, 6);
TOSH_ASSIGN_PIN(BT_RTS,      1, 6);
TOSH_ASSIGN_PIN(BT_CTS,      1, 7);
TOSH_ASSIGN_PIN(BT_TXD,      3, 6);
TOSH_ASSIGN_PIN(BT_RXD,      3, 7);
TOSH_ASSIGN_PIN(BT_RESET,    5, 5);

//BSL Pins
TOSH_ASSIGN_PIN(PROG_OUT,  1, 1);
TOSH_ASSIGN_PIN(PROG_IN,   2, 2);

// SD uart chip-select
TOSH_ASSIGN_PIN(SD_CS_N, 3, 0);

TOSH_ASSIGN_PIN(TILT,  2, 4);

// ADC lines on the testpoints
TOSH_ASSIGN_PIN(ADC_0, 6, 0);
TOSH_ASSIGN_PIN(ADC_1, 6, 1);
TOSH_ASSIGN_PIN(ADC_2, 6, 2);
TOSH_ASSIGN_PIN(ADC_3, 6, 3);
TOSH_ASSIGN_PIN(ADC_4, 6, 4);
TOSH_ASSIGN_PIN(ADC_5, 6, 5);
TOSH_ASSIGN_PIN(ADC_6, 6, 6);
TOSH_ASSIGN_PIN(ADC_7, 6, 7);

TOSH_ASSIGN_PIN(ADC_ACCELZ, 6, 3);
TOSH_ASSIGN_PIN(ADC_ACCELY,  6, 4);
TOSH_ASSIGN_PIN(ADC_ACCELX, 6, 5);

TOSH_ASSIGN_PIN(DAC0_AN, 6, 6);
TOSH_ASSIGN_PIN(DAC1_AN, 6, 7);

TOSH_ASSIGN_PIN(VSENSE_ADC6, 6, 6);
TOSH_ASSIGN_PIN(VSENSE_ADC7,  6, 7);

// bus arbitration pins
TOSH_ASSIGN_PIN(SW_SD_PWR_N, 4, 5);
TOSH_ASSIGN_PIN(SW_BT_PWR_N, 4, 6);

// if used as expansion GPIOs
TOSH_ASSIGN_PIN(SER0_RTS, 1, 3);
TOSH_ASSIGN_PIN(SER0_CTS, 1, 4);

TOSH_ASSIGN_PIN(SIMO0, 3, 1);
TOSH_ASSIGN_PIN(SOMI0, 3, 2);
TOSH_ASSIGN_PIN(UCLK0, 3, 3);
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);

// redefinitions for the sd card driver
TOSH_ASSIGN_PIN(SD_DI, 3, 1);
TOSH_ASSIGN_PIN(SD_DO, 3, 2);
TOSH_ASSIGN_PIN(SD_CLK, 3, 3);


TOSH_ASSIGN_PIN(SIMO1, 5, 1);
TOSH_ASSIGN_PIN(SOMI1, 5, 2);
TOSH_ASSIGN_PIN(UCLK1, 5, 3);
TOSH_ASSIGN_PIN(UTXD1, 3, 6);
TOSH_ASSIGN_PIN(URXD1, 3, 7);

TOSH_ASSIGN_PIN(GIO0, 2, 0);
TOSH_ASSIGN_PIN(GIO1, 2, 1);
TOSH_ASSIGN_PIN(GIO2, 2, 5);  // second internal expansion gpio

// 1-Wire
TOSH_ASSIGN_PIN(ONEWIRE, 4, 7);

// ROSC
TOSH_ASSIGN_PIN(ROSC, 2, 5);

// docked signal from programming board
TOSH_ASSIGN_PIN(DOCK_N, 2, 3);

// ACCEL
TOSH_ASSIGN_PIN(PWRMUX_SEL,  4, 1);
TOSH_ASSIGN_PIN(ACCEL_SEL0,  4, 4);
TOSH_ASSIGN_PIN(ACCEL_SLEEP_N, 5, 0);

#endif // _H_hardware_h

tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/platform.h000066400000000000000000000000001207233610700224700ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/shimmer2r/platform_message.h000066400000000000000000000051301207233610700242050ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:55 scipio Exp $
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * Defining the platform-independently named packet structures to be the
 * chip-specific CC1000 packet structures.
 *
 * @author Philip Levis
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
 */


#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 
#include 

typedef union message_header {
  cc2420_header_t cc2420;
  serial_header_t serial;
} message_header_t;

typedef union TOSRadioFooter {
  cc2420_footer_t cc2420;
} message_footer_t;

typedef union TOSRadioMetadata {
  cc2420_metadata_t cc2420;
  serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/span/000077500000000000000000000000001207233610700175365ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/span/.platform000066400000000000000000000036231207233610700213670ustar00rootroot00000000000000# span - platform includes
# Steve Ayer, December 2009
#
# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.

push( @includes, qw(

      .
  %T/platforms/span
  %T/platforms/span/chips/cc2420
  %T/platforms/shimmer/chips/msp430
  %T/platforms/shimmer/chips/ds2411
  %T/chips/cc2420
  %T/chips/cc2420/alarm
  %T/chips/cc2420/control
  %T/chips/cc2420/csma
  %T/chips/cc2420/interfaces
  %T/chips/cc2420/link
  %T/chips/cc2420/lowpan
  %T/chips/cc2420/lpl
  %T/chips/cc2420/packet
  %T/chips/cc2420/receive
  %T/chips/cc2420/spi
  %T/chips/cc2420/transmit
  %T/chips/cc2420/unique
  %T/chips/cc2420/security
  %T/chips/msp430
  %T/chips/msp430/adc12
  %T/chips/msp430/dma
  %T/chips/msp430/pins
  %T/chips/msp430/timer
  %T/chips/msp430/usart
  %T/chips/msp430/sensors
  %T/lib/timer
  %T/lib/serial
  %T/lib/adc
  %T/lib/power
  ) );

@opts = qw(

  -gcc=msp430-gcc
  -mmcu=msp430f1611
  -fnesc-target=msp430
  -fnesc-no-debug
);

push @opts, "-mdisable-hwmul" if `msp430-gcc --version | grep 3.2.3`;
push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

$ENV{'CIL_MACHINE'} =
    "version_major=3 " .
    "version_minor=2 " .
    "version=msp430-3.2.3 " .
    "short=2,2 " .
    "int=2,2 " .
    "long=4,2 " .
    "long_long=8,2 " .
    "pointer=2,2 " .
    "enum=2,2 " .
    "float=4,2 " .
    "double=4,2 " .
    "long_double=4,2 " .
    "void=1,1 " .
    "fun=1,2 " .
    "wchar_size_size=2,2 " .
    "alignof_string=1 " .
    "max_alignment=1 " .
    "char_wchar_signed=true,true " .
    "const_string_literals=true " .
    "big_endian=false " .
    "underscore_name=false " .
    "__builtin_va_list=true " .
    "__thread_is_keyword=true";
tinyos-2.1.2+dfsg/tos/platforms/span/ActiveMessageC.nc000066400000000000000000000060551207233610700227110ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Philip Levis
 * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
 *
 */
/**
 * The Active Message layer on the SHIMMER platform. This is a naming wrapper
 * around the CC2420 Active Message layer.
 *
 * @author Konrad Lorincz
 */
#include "Timer.h"

configuration ActiveMessageC {
  provides {
    interface SplitControl;

    interface AMSend[uint8_t id];
    interface Receive[uint8_t id];
    interface Receive as Snoop[uint8_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;
  }
}
implementation {
  components CC2420ActiveMessageC as AM;

  SplitControl = AM;
  
  AMSend       = AM;
  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}
tinyos-2.1.2+dfsg/tos/platforms/span/Ieee154MessageC.nc000066400000000000000000000044731207233610700226010ustar00rootroot00000000000000/*
 * Copyright (c) 2008 The Regents of the University  of California.
 * All rights reserved."
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */


/**
 *
 * @author Stephen Dawson-Haggerty
 */
 
configuration Ieee154MessageC  {
  provides {
    interface SplitControl;

    interface Resource as SendResource[uint8_t clientId];
    interface Ieee154Send;
    interface Receive as Ieee154Receive;

    interface Ieee154Packet;
    interface Packet;

    interface PacketAcknowledgements;
    interface LinkPacketMetadata;
    interface LowPowerListening;
    interface PacketLink;
  }

} implementation {
  components CC2420Ieee154MessageC as Msg;

  SplitControl = Msg;
  SendResource = Msg;
  Ieee154Send  = Msg;
  Ieee154Receive = Msg;
  Ieee154Packet = Msg;
  Packet = Msg;
  
  PacketAcknowledgements = Msg;
  LinkPacketMetadata = Msg;
  LowPowerListening = Msg;
  PacketLink = Msg;
}
tinyos-2.1.2+dfsg/tos/platforms/span/LedsP.nc000066400000000000000000000064121207233610700210720ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.3 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 * @date   March 21, 2005
 */
/*
 * one-led hacks for span, sma 6/2010
 */

module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led0.set();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
  }

  async command void Leds.led1Off() {
  }

  async command void Leds.led1Toggle() {
  }

  async command void Leds.led2On() {
  }

  async command void Leds.led2Off() {
  }

  async command void Leds.led2Toggle() {
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (!call Led0.get()) {
	rval |= LEDS_LED0;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	call Leds.led0On();
      }
      else {
	call Leds.led0Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/span/MoteClockC.nc000066400000000000000000000035471207233610700220540ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universität Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $Id: MoteClockC.nc,v 1.1 2010-03-24 17:42:14 ayer1 Exp $
 *
 */

 /**
 * @author Vlado Handziski 
 */
 
configuration MoteClockC
{
  provides interface Init as MoteClockInit;
}
implementation

{
  components Msp430ClockC;
  
  MoteClockInit = Msp430ClockC.Init;
}
tinyos-2.1.2+dfsg/tos/platforms/span/MotePlatformC.nc000066400000000000000000000121561207233610700226010ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author  Steve Ayer
 *  @date    May, 2009
 */

module MotePlatformC {
  provides interface Init;
}
implementation {
  command error_t Init.init() {
    
    //LEDS
    TOSH_MAKE_GREEN_LED_OUTPUT();
    TOSH_SEL_GREEN_LED_IOFUNC();

    //RADIO PINS
    //CC2420 pins
    TOSH_MAKE_RADIO_CSN_OUTPUT();
    TOSH_SEL_RADIO_CSN_IOFUNC();
    TOSH_SET_RADIO_CSN_PIN();

    // should be reset_n
    TOSH_MAKE_RADIO_RESET_OUTPUT();
    TOSH_SEL_RADIO_RESET_IOFUNC();
    TOSH_CLR_RADIO_RESET_PIN();

    TOSH_MAKE_RADIO_CCA_INPUT();
    TOSH_MAKE_RADIO_FIFO_INPUT();
    TOSH_MAKE_RADIO_FIFOP_INPUT();
    TOSH_MAKE_RADIO_SFD_INPUT();
    TOSH_SEL_RADIO_CCA_IOFUNC();
    TOSH_SEL_RADIO_FIFO_IOFUNC();
    TOSH_SEL_RADIO_FIFOP_IOFUNC();
    TOSH_SEL_RADIO_SFD_IOFUNC();

    TOSH_MAKE_RADIO_VREF_OUTPUT();
    TOSH_SEL_RADIO_VREF_IOFUNC();

    // BSL Prog Pins tristate em
    TOSH_MAKE_PROG_IN_OUTPUT();
    TOSH_MAKE_PROG_OUT_OUTPUT();
    TOSH_SEL_PROG_IN_IOFUNC();
    TOSH_SEL_PROG_OUT_IOFUNC();

    // USART lines, attached to a pullup and cc2420
    TOSH_SEL_UCLK1_IOFUNC();
    TOSH_MAKE_UCLK1_OUTPUT();
    TOSH_SET_UCLK1_PIN();

    TOSH_SEL_SIMO1_IOFUNC();
    TOSH_MAKE_SIMO1_OUTPUT();
    TOSH_SET_SIMO1_PIN();
    TOSH_SEL_SOMI1_IOFUNC();
    TOSH_MAKE_SOMI1_INPUT();

    TOSH_SEL_ROSC_IOFUNC();
    TOSH_MAKE_ROSC_INPUT();

    // 1-wire function
    TOSH_MAKE_ONEWIRE_INPUT();
    TOSH_SEL_ONEWIRE_IOFUNC();

    TOSH_MAKE_ADC_7_OUTPUT();
    TOSH_SEL_ADC_7_IOFUNC();

    TOSH_SEL_GIO0_IOFUNC();
    TOSH_MAKE_GIO0_OUTPUT();
    TOSH_SEL_GIO1_IOFUNC();
    TOSH_MAKE_GIO1_OUTPUT();
    TOSH_SEL_GIO2_IOFUNC();
    TOSH_MAKE_GIO2_OUTPUT();

    TOSH_SEL_FTDI_ADBUS_7_IOFUNC();
    TOSH_MAKE_FTDI_ADBUS_7_INPUT();
    TOSH_SEL_FTDI_ADBUS_3_IOFUNC();
    TOSH_MAKE_FTDI_ADBUS_7_INPUT();

    // idle expansion header pins
    TOSH_MAKE_SER0_CTS_OUTPUT();
    TOSH_SEL_SER0_CTS_IOFUNC();
    TOSH_MAKE_SER0_RTS_OUTPUT();
    TOSH_SEL_SER0_RTS_IOFUNC();

    TOSH_MAKE_UTXD0_OUTPUT();
    TOSH_SEL_UTXD0_IOFUNC();
    TOSH_MAKE_URXD0_OUTPUT();
    TOSH_SEL_URXD0_IOFUNC();

    /*
     * assignments for nc pins
     */
    TOSH_MAKE_NC_GIO0_OUTPUT();
    TOSH_SEL_NC_GIO0_IOFUNC();
    TOSH_MAKE_NC_GIO1_OUTPUT();
    TOSH_SEL_NC_GIO1_IOFUNC();
    TOSH_MAKE_NC_CS_OUTPUT();
    TOSH_SEL_NC_CS_IOFUNC();
    TOSH_MAKE_SIMO0_INPUT();
    TOSH_SEL_SIMO0_IOFUNC();
    TOSH_MAKE_SOMI0_INPUT();
    TOSH_SEL_SOMI0_IOFUNC();
    TOSH_MAKE_UTXD1_OUTPUT();
    TOSH_SEL_UTXD1_IOFUNC();
    TOSH_MAKE_URXD1_OUTPUT();
    TOSH_SEL_URXD1_IOFUNC();
    TOSH_MAKE_NC_LED0_INPUT();
    TOSH_SEL_NC_LED0_IOFUNC();
    TOSH_MAKE_NC_LED1_OUTPUT();
    TOSH_SEL_NC_LED1_IOFUNC();
    TOSH_MAKE_NC_LED2_OUTPUT();
    TOSH_SEL_NC_LED2_IOFUNC();
    TOSH_MAKE_NC_ACCEL0_OUTPUT();
    TOSH_SEL_NC_ACCEL0_IOFUNC();
    TOSH_MAKE_NC_ACCEL1_OUTPUT();
    TOSH_SEL_NC_ACCEL1_IOFUNC();
    TOSH_MAKE_NC_ACCELS_OUTPUT();
    TOSH_SEL_NC_ACCELS_IOFUNC();
    TOSH_MAKE_NC_TB0_OUTPUT();
    TOSH_SEL_NC_TB0_IOFUNC();
    TOSH_MAKE_NC_GIO2_OUTPUT();
    TOSH_SEL_NC_GIO2_IOFUNC();
    TOSH_MAKE_NC_SVS_OUTPUT();
    TOSH_SEL_NC_SVS_IOFUNC();
    TOSH_MAKE_NC_ADC_0_OUTPUT();
    TOSH_SEL_NC_ADC_0_IOFUNC();
    TOSH_MAKE_NC_ADC_1_OUTPUT();
    TOSH_SEL_NC_ADC_1_IOFUNC();
    TOSH_MAKE_NC_ADC_2_OUTPUT();
    TOSH_SEL_NC_ADC_2_IOFUNC();
    TOSH_MAKE_NC_ADC_3_OUTPUT();
    TOSH_SEL_NC_ADC_3_IOFUNC();
    TOSH_MAKE_NC_ADC_4_OUTPUT();
    TOSH_SEL_NC_ADC_4_IOFUNC();
    TOSH_MAKE_NC_ADC_5_OUTPUT();
    TOSH_SEL_NC_ADC_5_IOFUNC();
    TOSH_MAKE_NC_ADC_6_OUTPUT();
    TOSH_SEL_NC_ADC_6_IOFUNC();

    return SUCCESS;

  }

}
tinyos-2.1.2+dfsg/tos/platforms/span/Msp430Timer32khzMapC.nc000066400000000000000000000066321207233610700235010ustar00rootroot00000000000000//$Id: Msp430Timer32khzMapC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * MSP430Timer32khzMapC presents as paramaterized interfaces all of
 * the 32khz hardware timers on the MSP430 that are available for
 * compile time allocation by "new Alarm32khz16C()", "new
 * AlarmMilli32C()", and so on.  
 *
 * Platforms based on the MSP430 are * encouraged to copy in and
 * override this file, presenting only the * hardware timers that are
 * available for allocation on that platform.
 *
 * @author Cory Sharp 
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
 * port to span
 * @author Steve Ayer
 * @date   January, 2010
 */

configuration Msp430Timer32khzMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  // Timer pin B0 is used by the CC2420 radio's SFD pin
  // this is the only difference between the default 32khz map
  // and the map on span

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB1;
  Msp430Compare[0] = Msp430TimerC.CompareB1;

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB2;
  Msp430Compare[1] = Msp430TimerC.CompareB2;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB3;
  Msp430Compare[2] = Msp430TimerC.CompareB3;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB4;
  Msp430Compare[3] = Msp430TimerC.CompareB4;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB5;
  Msp430Compare[4] = Msp430TimerC.CompareB5;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB6;
  Msp430Compare[5] = Msp430TimerC.CompareB6;
}

tinyos-2.1.2+dfsg/tos/platforms/span/PlatformC.nc000066400000000000000000000036641207233610700217600ustar00rootroot00000000000000/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre and Cory Sharp
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
 */
#include "hardware.h"

configuration PlatformC
{
  provides interface Init;
}
implementation
{
  components PlatformP, MotePlatformC, MoteClockC;

  Init = PlatformP;
  PlatformP.MoteClockInit -> MoteClockC;
  PlatformP.MoteInit -> MotePlatformC;
}
tinyos-2.1.2+dfsg/tos/platforms/span/PlatformLedsC.nc000066400000000000000000000044601207233610700225630ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.3 2010-06-29 22:07:55 scipio Exp $

/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre
 * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:55 $
 */
/*
 * one-led hacks for span, sma 6/2010
 */
#include "hardware.h"

configuration PlatformLedsC {
  provides interface GeneralIO as Led0;
  provides interface GeneralIO as Led1;
  provides interface GeneralIO as Led2;
  uses interface Init;
}
implementation
{
  components 
      HplMsp430GeneralIOC as GeneralIOC
    , new Msp430GpioC() as Led0Impl
    , new Msp430GpioC() as Led1Impl
    , new Msp430GpioC() as Led2Impl
    ;
  components PlatformP;

  Init = PlatformP.LedsInit;

  Led0 = Led0Impl;
  Led0Impl -> GeneralIOC.Port43;

  Led1 = Led1Impl;

  Led2 = Led2Impl;

}

tinyos-2.1.2+dfsg/tos/platforms/span/PlatformP.nc000066400000000000000000000006601207233610700217660ustar00rootroot00000000000000#include "hardware.h"

module PlatformP{
  provides interface Init;
  uses interface Init as MoteClockInit;
  uses interface Init as MoteInit;
  uses interface Init as LedsInit;
}
implementation {
  command error_t Init.init() {
    WDTCTL = WDTPW + WDTHOLD;
    call MoteClockInit.init();
    call MoteInit.init();
    call LedsInit.init();
    return SUCCESS;
  }

  default command error_t LedsInit.init() { return SUCCESS; }

}
tinyos-2.1.2+dfsg/tos/platforms/span/PlatformSerialC.nc000066400000000000000000000040531207233610700231110ustar00rootroot00000000000000/*
 * Copyright (c) 2008
 *	The President and Fellows of Harvard College.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */
/**
 * From Konrad's SHIMMER conversbion
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 */

configuration PlatformSerialC 
{
    provides interface StdControl;
    provides interface UartStream;
    provides interface UartByte;
}
implementation 
{
    components new Msp430Uart0C() as UartC;
    UartStream = UartC;  
    UartByte = UartC;
  
    components SpanSerialP;
    StdControl = SpanSerialP;
    SpanSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
    SpanSerialP.Resource -> UartC.Resource;
}
tinyos-2.1.2+dfsg/tos/platforms/span/SpanSerialP.nc000066400000000000000000000046631207233610700222520ustar00rootroot00000000000000/*
 * Copyright (c) 2008
 *	The President and Fellows of Harvard College.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */
/**
 * Conversion of Konrad's conversion
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 * @author Steve Ayer
 * @date December 2009
 */
module SpanSerialP 
{
    provides interface StdControl;
    provides interface Msp430UartConfigure;
    uses interface Resource;
}
implementation 
{
    msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };

    command error_t StdControl.start()
    {
        return call Resource.immediateRequest();
    }

    command error_t StdControl.stop()
    {
        call Resource.release();
        return SUCCESS;
    }

    event void Resource.granted(){}

    async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() 
    {
        return &msp430_uart_telos_config;
    }
}
tinyos-2.1.2+dfsg/tos/platforms/span/TimeSyncMessageC.nc000066400000000000000000000066631207233610700232360ustar00rootroot00000000000000// $Id: TimeSyncMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 *
 * The Active Message layer on the shimmer platform. This is a naming wrapper
 * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
 *
 * @author Konrad Lorincz
 * @author Brano Kusy
 * @date June 19 2005
 */

configuration TimeSyncMessageC {
  provides
  {
    interface SplitControl;
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface LowPowerListening;

    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;

    interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacket32khz;

    interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacketMilli;
  }
}
implementation {
  components CC2420TimeSyncMessageC as AM;

  SplitControl = AM;

  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;

  TimeSyncAMSend32khz       = AM;
  TimeSyncAMSendMilli       = AM;
  TimeSyncPacket32khz       = AM;
  TimeSyncPacketMilli       = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}

tinyos-2.1.2+dfsg/tos/platforms/span/chips/000077500000000000000000000000001207233610700206445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420/000077500000000000000000000000001207233610700215415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420/HplCC2420AlarmC.nc000066400000000000000000000040231207233610700244030ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-03-24 17:42:14 $
 */

generic configuration HplCC2420AlarmC() {

  provides interface Init;
  provides interface Alarm as Alarm32khz32;

}

implementation {

  components new Alarm32khz32C();

  Init = Alarm32khz32C;
  Alarm32khz32 = Alarm32khz32C;
  
}
tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420/HplCC2420InterruptsC.nc000066400000000000000000000053731207233610700255370ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of interrupts and captures for the ChipCon
 * CC2420 radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-03-24 17:42:14 $
 */
/**
 * Ported to the span platform. 
 *
 * @author Steve Ayer
 * @date January, 2010
 */

configuration HplCC2420InterruptsC {

  provides interface GpioCapture as CaptureSFD;
  provides interface GpioInterrupt as InterruptCCA;
  provides interface GpioInterrupt as InterruptFIFOP;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components Msp430TimerC;
  components new GpioCaptureC() as CaptureSFDC;
  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlB0;
  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureB0;
  CaptureSFDC.GeneralIO -> GeneralIOC.Port40;

  components HplMsp430InterruptC;
  components new Msp430InterruptC() as InterruptCCAC;
  components new Msp430InterruptC() as InterruptFIFOPC;

  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port26;
  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port23;

  CaptureSFD = CaptureSFDC.Capture;
  InterruptCCA = InterruptCCAC.Interrupt;
  InterruptFIFOP = InterruptFIFOPC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420/HplCC2420InterruptsP.nc000066400000000000000000000052111207233610700255430ustar00rootroot00000000000000/*
 * Copyright (c) 2010, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Steve Ayer
 * @date   January, 2010
 *
 * this implements an interrupt-driven capture interface for the cc2420
 * tx-mode use of sfd.  span does not have sfd routed to a timer capture pin
 * on the msp430, so cc2420's capture mechanism fails.  
 * this module will trigger a capture.captured event after receiving the
 * appropriate interrupt from the span sfd pin (2.7)
 */

module HplCC2420InterruptsP @safe() {
  provides{
    interface GpioCapture as CaptureSFD;
  }

  uses{
    interface GpioInterrupt as InterruptSFD;
    interface LocalTime;
  }
}

implementation {
  async command error_t CaptureSFD.captureRisingEdge() { 
    call InterruptSFD.enableRisingEdge();
    return SUCCESS;
  }

  async command error_t CaptureSFD.captureFallingEdge() { 
    call InterruptSFD.enableFallingEdge();
    return SUCCESS;
  }
  
  async command void CaptureSFD.disable() {
    call InterruptSFD.disable();
  }

  async event void InterruptSFD.fired() {
    uint32_t t = call LocalTime.get();

    signal CaptureSFD.captured((uint16_t)(t & 0x0000ffff));
  }
}

tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420/HplCC2420PinsC.nc000066400000000000000000000056341207233610700242710ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for the ChipCon CC2420
 * radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-03-24 17:42:14 $
 */
/**
 * Ported to the span
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 * @author Steve Ayer
 * @date December, 2009
 */

configuration HplCC2420PinsC {

  provides interface GeneralIO as CCA;
  provides interface GeneralIO as CSN;
  provides interface GeneralIO as FIFO;
  provides interface GeneralIO as FIFOP;
  provides interface GeneralIO as RSTN;
  provides interface GeneralIO as SFD;
  provides interface GeneralIO as VREN;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components new Msp430GpioC() as CCAM;
  components new Msp430GpioC() as CSNM;
  components new Msp430GpioC() as FIFOM;
  components new Msp430GpioC() as FIFOPM;
  components new Msp430GpioC() as RSTNM;
  components new Msp430GpioC() as SFDM;
  components new Msp430GpioC() as VRENM;

  CCAM -> GeneralIOC.Port26;
  CSNM -> GeneralIOC.Port54;
  FIFOM -> GeneralIOC.Port24;
  FIFOPM -> GeneralIOC.Port23;
  RSTNM -> GeneralIOC.Port33;
  //SFDM -> GeneralIOC.Port27;
  SFDM -> GeneralIOC.Port40;
  VRENM -> GeneralIOC.Port55;

  CCA = CCAM;
  CSN = CSNM;
  FIFO = FIFOM;
  FIFOP = FIFOPM;
  RSTN = RSTNM;
  SFD = SFDM;
  VREN = VRENM;
  
}

tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420/HplCC2420SpiC.nc000066400000000000000000000041541207233610700241070ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the SPI bus for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-03-24 17:42:14 $
 */
/**
 * Ported to the SHIMMER platform. 
 *
 * @author Konrad Lorincz
 */

generic configuration HplCC2420SpiC() {
  
  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;
  
}

implementation {

  components new Msp430Spi1C() as SpiC;
  
  Resource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;
  
}

tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420x/000077500000000000000000000000001207233610700217315ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420x/SpanSerialP.nc000066400000000000000000000054151207233610700244410ustar00rootroot00000000000000/*
 * Copyright (c) 2008
 *	The President and Fellows of Harvard College.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */
/**
 * Conversion of Konrad's conversion
 *
 * @author Konrad Lorincz
 * @date May 14, 2008
 * @author Steve Ayer
 * @date December 2009
 */

module SpanSerialP 
{
    provides interface StdControl;
    provides interface Msp430UartConfigure;
    uses interface Resource;
}
implementation 
{
  enum {
// from http://www.daycounter.com/Calculators/MSP430-Uart-Calculator.phtml
  UBR_4MHZ_4800=0x0369,   UMCTL_4MHZ_4800=0xfb,
  UBR_4MHZ_9600=0x01b4,   UMCTL_4MHZ_9600=0xdf,
  UBR_4MHZ_57600=0x0048,  UMCTL_4MHZ_57600=0xfb,
  UBR_4MHZ_115200=0x0024, UMCTL_4MHZ_115200=0x29,

  UBR_3_7MHZ_115200=0x0020, UMCTL_3_7MHZ_115200=0x00,

 };  	
  
    msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_4MHZ_115200, umctl: UMCTL_4MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };

    command error_t StdControl.start()
    {
        return call Resource.immediateRequest();
    }

    command error_t StdControl.stop()
    {
        call Resource.release();
        return SUCCESS;
    }

    event void Resource.granted(){}

    async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() 
    {
        return &msp430_uart_telos_config;
    }
}
tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420x/t32khz/000077500000000000000000000000001207233610700230565ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420x/t32khz/HplCC2420XC.nc000066400000000000000000000055131207233610700251000ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi1C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port26;
	CSNM -> IO.Port54;
	FIFOM -> IO.Port24;
	FIFOPM -> IO.Port23;
	RSTNM -> IO.Port33;
	SFDM -> IO.Port40;
	VRENM -> IO.Port55;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	// capture
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlB0;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureB0;
	GpioCaptureC.GeneralIO -> IO.Port40;
	SfdCapture = GpioCaptureC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port23;
	FifopInterrupt = FifopInterruptC.Interrupt; 


	// alarm
	components new Alarm32khz16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTime32khzC;
	LocalTimeRadio = LocalTime32khzC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420x/tmicro/000077500000000000000000000000001207233610700232265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420x/tmicro/HplCC2420XC.nc000066400000000000000000000055131207233610700252500ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi1C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port26;
	CSNM -> IO.Port54;
	FIFOM -> IO.Port24;
	FIFOPM -> IO.Port23;
	RSTNM -> IO.Port33;
	SFDM -> IO.Port40;
	VRENM -> IO.Port55;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	// capture
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlB0;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureB0;
	GpioCaptureC.GeneralIO -> IO.Port40;
	SfdCapture = GpioCaptureC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port23;
	FifopInterrupt = FifopInterruptC.Interrupt; 


	// alarm
	components new AlarmMicro16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTimeMicroC;
	LocalTimeRadio = LocalTimeMicroC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/span/chips/cc2420x/tmicro/Msp430TimerMicroMapC.nc000066400000000000000000000043721207233610700273000ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
 
configuration Msp430TimerMicroMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  // Timer B0 is used for SFD capture on the CC2420 radio

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB1;
  Msp430Compare[0] = Msp430TimerC.CompareB1;

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB2;
  Msp430Compare[1] = Msp430TimerC.CompareB2;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB3;
  Msp430Compare[2] = Msp430TimerC.CompareB3;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB4;
  Msp430Compare[3] = Msp430TimerC.CompareB4;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB5;
  Msp430Compare[4] = Msp430TimerC.CompareB5;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB6;
  Msp430Compare[5] = Msp430TimerC.CompareB6;
}

tinyos-2.1.2+dfsg/tos/platforms/span/chips/msp430/000077500000000000000000000000001207233610700216725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/span/chips/msp430/msp430hardware.h000066400000000000000000000232301207233610700246070ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

// @author Vlado Handziski 
// @author Joe Polastre 
// @author Cory Sharp 

#ifndef _H_msp430hardware_h
#define _H_msp430hardware_h

#if defined(__MSPGCC__)
/* mspgcc */
#include 
#include 
#else /* __MSPGCC__ */
/* old mspgcc3, forked mspgcc4 */
#include 
#include 
#endif /* __MSPGCC__ */
#include "msp430regtypes.h"
#include "Msp430DcoSpec.h"

// CPU memory-mapped register access will cause nesc to issue race condition
// warnings.  Race conditions are a significant conern when accessing CPU
// memory-mapped registers, because they can change even while interrupts
// are disabled.  This means that the standard nesc tools for resolving race
// conditions, atomic statements that disable interrupt handling, do not
// resolve CPU register race conditions.  So, CPU registers access must be
// treated seriously and carefully.

// The macro MSP430REG_NORACE allows individual modules to internally
// redeclare CPU registers as norace, eliminating nesc's race condition
// warnings for their access.  This macro should only be used after the
// specific CPU register use has been verified safe and correct.  Example
// use:
//
//    module MyLowLevelModule
//    {
//      // ...
//    }
//    implementation
//    {
//      MSP430REG_NORACE(TACCTL0);
//      // ...
//    }

#undef norace

#define MSP430REG_NORACE_EXPAND(type,name,addr) \
norace static volatile type name asm(#addr)

#define MSP430REG_NORACE3(type,name,addr) \
MSP430REG_NORACE_EXPAND(type,name,addr)

// MSP430REG_NORACE and MSP430REG_NORACE2 presume naming conventions among
// type, name, and addr, which are defined in the local header
// msp430regtypes.h and mspgcc's header io.h and its children.

#define MSP430REG_NORACE2(rename,name) \
MSP430REG_NORACE3(TYPE_##name,rename,name##_)

#define MSP430REG_NORACE(name) \
MSP430REG_NORACE3(TYPE_##name,name,name##_)

// Avoid the type-punned pointer warnings from gcc 3.3, which are warning about
// creating potentially broken object code.  Union casts are the appropriate work
// around.  Unfortunately, they require a function definiton.
#define DEFINE_UNION_CAST(func_name,to_type,from_type) \
to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f:x}; return c.t; }

// redefine ugly defines from msp-gcc
#ifndef DONT_REDEFINE_SR_FLAGS
#undef C
#undef Z
#undef N
#undef V
#undef GIE
#undef CPUOFF
#undef OSCOFF
#undef SCG0
#undef SCG1
#undef LPM0_bits
#undef LPM1_bits
#undef LPM2_bits
#undef LPM3_bits
#undef LPM4_bits
#define SR_C       0x0001
#define SR_Z       0x0002
#define SR_N       0x0004
#define SR_V       0x0100
#define SR_GIE     0x0008
#define SR_CPUOFF  0x0010
#define SR_OSCOFF  0x0020
#define SR_SCG0    0x0040
#define SR_SCG1    0x0080
#define LPM0_bits           SR_CPUOFF
#define LPM1_bits           SR_SCG0+SR_CPUOFF
#define LPM2_bits           SR_SCG1+SR_CPUOFF
#define LPM3_bits           SR_SCG1+SR_SCG0+SR_CPUOFF
#define LPM4_bits           SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF
#endif//DONT_REDEFINE_SR_FLAGS

#ifdef interrupt
#undef interrupt
#endif

#ifdef wakeup
#undef wakeup
#endif

#ifdef signal
#undef signal
#endif


// Re-definitions for safe tinyOS
// These rely on io.h being included at the top of this file
// thus pulling the affected header files before the re-definitions
#ifdef SAFE_TINYOS
#undef ADC12MEM
#define ADC12MEM            TCAST(int* ONE, ADC12MEM_) /* ADC12 Conversion Memory (for C) */
#undef ADC12MCTL
#define ADC12MCTL           TCAST(char * ONE, ADC12MCTL_)
#endif

// define platform constants that can be changed for different compilers
// these are all msp430-gcc specific (add as necessary)

#ifdef __msp430_headers_adc10_h
#define __msp430_have_adc10
#endif

#ifdef __msp430_headers_adc12_h
#define __msp430_have_adc12
#endif

// backwards compatibility to older versions of the header files
#ifdef __MSP430_HAS_I2C__
#define __msp430_have_usart0_with_i2c
#endif

// I2CBusy flag is not defined by current MSP430-GCC
#ifdef __msp430_have_usart0_with_i2c
#ifndef I2CBUSY
#define I2CBUSY   (0x01 << 5)
#endif
MSP430REG_NORACE2(U0CTLnr,U0CTL);
MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL);
MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL);
#endif

// The signal attribute has opposite meaning in msp430-gcc than in avr-gcc
#define TOSH_SIGNAL(signame) \
  void sig_##signame() __attribute__((interrupt (signame), wakeup)) @C()

// TOSH_INTERRUPT allows nested interrupts
#define TOSH_INTERRUPT(signame) \
  void isr_##signame() __attribute__((interrupt (signame), signal, wakeup)) @C()

inline void TOSH_wait(void)
{
  nop(); nop();
}

// #define TOSH_CYCLE_TIME_NS 250
// Our worst case is 250 ns = 1 cycle.

inline void TOSH_wait_250ns(void)
{
  nop();
}

/* 
   Following the suggestion of the mspgcc.sourceforge.net site
   for an intelligent pause routine
*/
void brief_pause(register unsigned int n)
{
  asm volatile(	"1: \n\t"
		"dec	%0 \n\t"
		"jne	1b\n\t"
		:  "+r" (n));
}

#define TOSH_uwait(n)   brief_pause((((unsigned long long)n) * TARGET_DCO_KHZ * 1024 / 1000000 - 2) / 3)

#define SET_FLAG(port, flag) ((port) |= (flag))
#define CLR_FLAG(port, flag) ((port) &= ~(flag))
#define READ_FLAG(port, flag) ((port) & (flag))

// TOSH_ASSIGN_PIN creates functions that are effectively marked as
// "norace".  This means race conditions that result from their use will not
// be detectde by nesc.

#define TOSH_ASSIGN_PIN_HEX(name, port, hex) \
void TOSH_SET_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \
void TOSH_CLR_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r &= ~hex; } \
void TOSH_TOGGLE_##name##_PIN() @safe(){ MSP430REG_NORACE2(r,P##port##OUT); r ^= hex; } \
uint8_t TOSH_READ_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##IN); return (r & hex); } \
void TOSH_MAKE_##name##_OUTPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r |= hex; } \
void TOSH_MAKE_##name##_INPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r &= ~hex; } \
void TOSH_SEL_##name##_MODFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r |= hex; } \
void TOSH_SEL_##name##_IOFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r &= ~hex; }

#define TOSH_ASSIGN_PIN(name, port, bit) \
TOSH_ASSIGN_PIN_HEX(name,port,(1<<(bit)))

typedef uint8_t mcu_power_t @combine("mcombine");
mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() {
  return (m1 < m2) ? m1: m2;
}
enum {
  MSP430_POWER_ACTIVE = 0,
  MSP430_POWER_LPM0   = 1,
  MSP430_POWER_LPM1   = 2,
  MSP430_POWER_LPM2   = 3,
  MSP430_POWER_LPM3   = 4,
  MSP430_POWER_LPM4   = 5
};

void __nesc_disable_interrupt(void) @safe()
{
  dint();
  nop();
}

void __nesc_enable_interrupt(void) @safe()
{
  eint();
}

typedef bool __nesc_atomic_t;
__nesc_atomic_t __nesc_atomic_start(void);
void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts);

#ifndef NESC_BUILD_BINARY
/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
   is #defined, to avoid duplicate functions definitions when binary
   components are used. Such functions do need a prototype in all cases,
   though. */
__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe()
{
  __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0);
  __nesc_disable_interrupt();
  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
  return result;
}

void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe()
{
  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
  if( reenable_interrupts )
    __nesc_enable_interrupt();
}
#endif

/* Floating-point network-type support.
   These functions must convert to/from a 32-bit big-endian integer that follows
   the layout of Java's java.lang.float.floatToRawIntBits method.
   Conveniently, for the MSP430 family, this is a straight byte copy...
*/

typedef float nx_float __attribute__((nx_base_be(afloat)));

inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
  float f;
  memcpy(&f, source, sizeof(float));
  return f;
}

inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
  memcpy(target, &value, sizeof(float));
  return value;
}

#endif//_H_msp430hardware_h

tinyos-2.1.2+dfsg/tos/platforms/span/hardware.h000066400000000000000000000100401207233610700214770ustar00rootroot00000000000000/*
 * Copyright (c) 2009, Shimmer Research, Ltd.
 * All rights reserved
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:

 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above
 *       copyright notice, this list of conditions and the following
 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
 *     * Neither the name of Shimmer Research, Ltd. nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author  Steve Ayer
 *  @date    May, 2009
 */

#ifndef _H_hardware_h
#define _H_hardware_h

#include "msp430hardware.h"

//#include "CC2420Const.h"

// enum so components can override power saving,
// as per TEP 112.
enum {
  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
};

TOSH_ASSIGN_PIN(GREEN_LED,  4, 3);

// CC2420 RADIO #defines
TOSH_ASSIGN_PIN(RADIO_FIFOP,     2, 3);
TOSH_ASSIGN_PIN(RADIO_FIFO,      2, 4);
TOSH_ASSIGN_PIN(RADIO_CCA,       2, 6);
TOSH_ASSIGN_PIN(RADIO_SFD,       2, 7);

TOSH_ASSIGN_PIN(RADIO_VREF,      5, 5);   

TOSH_ASSIGN_PIN(RADIO_SIMO1,     5, 1);
TOSH_ASSIGN_PIN(RADIO_SOMI1,     5, 2);
TOSH_ASSIGN_PIN(RADIO_CSN,       5, 4);
TOSH_ASSIGN_PIN(RADIO_RESET,     3, 3);

// for mainstream tos...
TOSH_ASSIGN_PIN(CC_FIFOP, 2, 3);
TOSH_ASSIGN_PIN(CC_FIFO,  2, 4);
TOSH_ASSIGN_PIN(CC_SFD,   2, 7);
TOSH_ASSIGN_PIN(CC_VREN,  5, 5);
TOSH_ASSIGN_PIN(CC_RSTN,  3, 3);


// UART pins
// SPI1 attached to cc2420
TOSH_ASSIGN_PIN(UCLK1, 5, 3);
TOSH_ASSIGN_PIN(SOMI1, 5, 2);
TOSH_ASSIGN_PIN(SIMO1, 5, 1);

// 1-Wire
TOSH_ASSIGN_PIN(ONEWIRE, 5, 6);

//BSL Pins
TOSH_ASSIGN_PIN(PROG_OUT,  1, 1);
TOSH_ASSIGN_PIN(PROG_IN,   2, 2);

// ADC lines on the testpoints
TOSH_ASSIGN_PIN(ADC_7,   6, 7);
TOSH_ASSIGN_PIN(DAC1_AN, 6, 7);

// connected to external UART 
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);
TOSH_ASSIGN_PIN(UTXD1, 3, 6);
TOSH_ASSIGN_PIN(URXD1, 3, 7);

// GIO pins
TOSH_ASSIGN_PIN(SER0_RTS, 1, 3);
TOSH_ASSIGN_PIN(SER0_CTS, 1, 4);

TOSH_ASSIGN_PIN(ROSC, 2, 5);

TOSH_ASSIGN_PIN(GIO0, 1, 0);
TOSH_ASSIGN_PIN(GIO1, 1, 5);
TOSH_ASSIGN_PIN(GIO2, 1, 6);

TOSH_ASSIGN_PIN(FTDI_ADBUS_7, 1, 2);
TOSH_ASSIGN_PIN(FTDI_ADBUS_3, 2, 0);

/*
 * NC Pins below
 */
TOSH_ASSIGN_PIN(NC_GIO0,     1, 7);
TOSH_ASSIGN_PIN(NC_GIO1,     2, 1);
TOSH_ASSIGN_PIN(NC_CS,       3, 0);
TOSH_ASSIGN_PIN(SIMO0,       3, 1);
TOSH_ASSIGN_PIN(SOMI0,       3, 2);
TOSH_ASSIGN_PIN(UCLK0,       3, 3);
TOSH_ASSIGN_PIN(NC_LED0,     4, 0);
TOSH_ASSIGN_PIN(NC_LED1,     4, 1);
TOSH_ASSIGN_PIN(NC_LED2,     4, 2);
TOSH_ASSIGN_PIN(NC_ACCEL0,   4, 4);
TOSH_ASSIGN_PIN(NC_ACCEL1,   4, 5);
TOSH_ASSIGN_PIN(NC_ACCELS,   4, 6);
TOSH_ASSIGN_PIN(NC_TB0,      4, 7);
TOSH_ASSIGN_PIN(NC_GIO2,     5, 0);
TOSH_ASSIGN_PIN(NC_SVS,      5, 7);
TOSH_ASSIGN_PIN(NC_ADC_0,    6, 0);
TOSH_ASSIGN_PIN(NC_ADC_1,    6, 1);
TOSH_ASSIGN_PIN(NC_ADC_2,    6, 2);
TOSH_ASSIGN_PIN(NC_ADC_3,    6, 3);
TOSH_ASSIGN_PIN(NC_ADC_4,    6, 4);
TOSH_ASSIGN_PIN(NC_ADC_5,    6, 5);
TOSH_ASSIGN_PIN(NC_ADC_6,     6, 6);

#endif // _H_hardware_h

tinyos-2.1.2+dfsg/tos/platforms/span/platform.h000066400000000000000000000000001207233610700215210ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/span/platform_message.h000066400000000000000000000051301207233610700232360ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:55 scipio Exp $
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * Defining the platform-independently named packet structures to be the
 * chip-specific CC1000 packet structures.
 *
 * @author Philip Levis
 * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
 */


#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 
#include 

typedef union message_header {
  cc2420_header_t cc2420;
  serial_header_t serial;
} message_header_t;

typedef union TOSRadioFooter {
  cc2420_footer_t cc2420;
} message_footer_t;

typedef union TOSRadioMetadata {
  cc2420_metadata_t cc2420;
  serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/telosa/000077500000000000000000000000001207233610700200645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/.platform000066400000000000000000000035121207233610700217120ustar00rootroot00000000000000# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.

push( @includes, qw(

  %T/platforms/telosa
  %T/platforms/telosa/chips/cc2420
  %T/platforms/telosa/chips/s1087
  %T/platforms/telosa/chips/s10871
  %T/platforms/telosa/chips/sht11
  %T/platforms/telosa/chips/at45db
  %T/chips/cc2420
  %T/chips/cc2420/alarm
  %T/chips/cc2420/control
  %T/chips/cc2420/csma
  %T/chips/cc2420/interfaces
  %T/chips/cc2420/link
  %T/chips/cc2420/lowpan
  %T/chips/cc2420/lpl
  %T/chips/cc2420/packet
  %T/chips/cc2420/receive
  %T/chips/cc2420/spi
  %T/chips/cc2420/transmit
  %T/chips/cc2420/unique
  %T/chips/at45db
  %T/chips/msp430
  %T/chips/msp430/adc12
  %T/chips/msp430/pins
  %T/chips/msp430/timer
  %T/chips/msp430/usart
  %T/chips/msp430/sensors
  %T/chips/sht11  
  %T/lib/timer
  %T/lib/serial
  %T/lib/adc
  %T/lib/power

) );

@opts = qw(

  -gcc=msp430-gcc
  -mmcu=msp430f149
  -fnesc-target=msp430
  -fnesc-no-debug

);

push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

$ENV{'CIL_MACHINE'} =
    "version_major=3 " .
    "version_minor=2 " .
    "version=msp430-3.2.3 " .
    "short=2,2 " .
    "int=2,2 " .
    "long=4,2 " .
    "long_long=8,2 " .
    "pointer=2,2 " .
    "enum=2,2 " .
    "float=4,2 " .
    "double=4,2 " .
    "long_double=4,2 " .
    "void=1,1 " .
    "fun=1,2 " .
    "wchar_size_size=2,2 " .
    "alignof_string=1 " .
    "max_alignment=1 " .
    "char_wchar_signed=true,true " .
    "const_string_literals=true " .
    "big_endian=false " .
    "underscore_name=false " .
    "__builtin_va_list=true " .
    "__thread_is_keyword=true";
    
tinyos-2.1.2+dfsg/tos/platforms/telosa/ActiveMessageC.nc000066400000000000000000000062421207233610700232350ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.9 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Philip Levis
 * Date last modified:  $Id: ActiveMessageC.nc,v 1.9 2010-06-29 22:07:55 scipio Exp $
 *
 */

/**
 *
 * The Active Message layer on the Telos platform. This is a naming wrapper
 * around the CC2420 Active Message layer.
 *
 * @author Philip Levis
 * @version $Revision: 1.9 $ $Date: 2010-06-29 22:07:55 $
 */
#include "Timer.h"

configuration ActiveMessageC {
  provides {
    interface SplitControl;

    interface AMSend[am_id_t id];
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;
    interface LowPowerListening;
  }
}
implementation {
  components CC2420ActiveMessageC as AM;

  SplitControl = AM;
  
  AMSend       = AM;
  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/DemoSensorC.nc000066400000000000000000000044241207233610700225730ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorC on the telosb platform provides a
 * voltage reading, using VoltageC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.5 $ $Date: 2006-12-13 01:22:36 $
 * 
 */

generic configuration DemoSensorC()
{
  provides interface Read;
}
implementation
{
  components new VoltageC() as DemoSensor;
  Read = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/DemoSensorNowC.nc000066400000000000000000000046341207233610700232620ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorNowC is a generic sensor device that provides a 16-bit
 * value that can be read from async context. The platform author
 * chooses which sensor actually sits behind DemoSensorNowC, and
 * though it's probably Voltage, Light, or Temperature, there are no
 * guarantees.
 *
 * This particular DemoSensorNowC on the telosb platform provides a
 * voltage reading, using VoltageC.
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $ $Date: 2006-12-13 01:22:36 $
 * 
 */

generic configuration DemoSensorNowC()
{
  provides interface Resource;
  provides interface ReadNow;
}
implementation
{
  components new Msp430InternalVoltageC() as DemoSensorNow;

  Resource = DemoSensorNow;
  ReadNow = DemoSensorNow;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/DemoSensorStreamC.nc000066400000000000000000000045041207233610700237460ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorStreamC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorStreamC on the telosb platform provides a
 * voltage reading, using VoltageStreamC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $ $Date: 2006-12-13 01:22:36 $
 * 
 */

generic configuration DemoSensorStreamC()
{
  provides interface ReadStream;
}
implementation
{
  components new VoltageStreamC() as DemoSensor;
  ReadStream = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/Ieee154MessageC.nc000066400000000000000000000044731207233610700231270ustar00rootroot00000000000000/*
 * Copyright (c) 2008 The Regents of the University  of California.
 * All rights reserved."
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */


/**
 *
 * @author Stephen Dawson-Haggerty
 */
 
configuration Ieee154MessageC  {
  provides {
    interface SplitControl;

    interface Resource as SendResource[uint8_t clientId];
    interface Ieee154Send;
    interface Receive as Ieee154Receive;

    interface Ieee154Packet;
    interface Packet;

    interface PacketAcknowledgements;
    interface LinkPacketMetadata;
    interface LowPowerListening;
    interface PacketLink;
  }

} implementation {
  components CC2420Ieee154MessageC as Msg;

  SplitControl = Msg;
  SendResource = Msg;
  Ieee154Send  = Msg;
  Ieee154Receive = Msg;
  Ieee154Packet = Msg;
  Packet = Msg;
  
  PacketAcknowledgements = Msg;
  LinkPacketMetadata = Msg;
  LowPowerListening = Msg;
  PacketLink = Msg;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/MSP430ADC12ChannelConfigM.nc000066400000000000000000000006771207233610700245150ustar00rootroot00000000000000module MSP430ADC12ChannelConfigM {
  uses interface MSP430ADC12ChannelConfig;  
}
implementation
{
  async event msp430adc12_channel_config_t MSP430ADC12ChannelConfig.getConfigurationData(uint8_t channel) {
    msp430adc12_channel_config_t config = {
      channel, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_1_5,
      SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
      SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 };

    return config;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/MoteClockC.nc000066400000000000000000000035501207233610700223740ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universität Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $Id: MoteClockC.nc,v 1.1 2007-07-10 00:24:31 vlahan Exp $
 *
 */

 /**
 * @author Vlado Handziski 
 */
 
configuration MoteClockC
{
  provides interface Init as MoteClockInit;
}
implementation

{
  components Msp430ClockC;
  
  MoteClockInit = Msp430ClockC.Init;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/MotePlatformC.nc000066400000000000000000000026301207233610700231230ustar00rootroot00000000000000module MotePlatformC {
  provides interface Init;
}
implementation {
  command error_t Init.init() {
    //LEDS
    TOSH_SET_RED_LED_PIN();
    TOSH_SET_GREEN_LED_PIN();
    TOSH_SET_YELLOW_LED_PIN();
    TOSH_MAKE_RED_LED_OUTPUT();
    TOSH_MAKE_GREEN_LED_OUTPUT();
    TOSH_MAKE_YELLOW_LED_OUTPUT();

    //RADIO PINS
    //CC2420 pins
    TOSH_MAKE_SOMI0_INPUT();
    TOSH_MAKE_SIMO0_INPUT();
    TOSH_MAKE_UCLK0_INPUT();
    TOSH_MAKE_SOMI1_INPUT();
    TOSH_MAKE_SIMO1_INPUT();
    TOSH_MAKE_UCLK1_INPUT();
    TOSH_SET_RADIO_RESET_PIN();
    TOSH_MAKE_RADIO_RESET_OUTPUT();
    TOSH_CLR_RADIO_VREF_PIN();
    TOSH_MAKE_RADIO_VREF_OUTPUT();
    TOSH_SET_RADIO_CSN_PIN();
    TOSH_MAKE_RADIO_CSN_OUTPUT();
    TOSH_MAKE_RADIO_FIFOP_INPUT();
    TOSH_MAKE_RADIO_GIO0_INPUT();
    TOSH_MAKE_RADIO_SFD_INPUT();
    TOSH_MAKE_RADIO_GIO1_INPUT();

    //UART PINS
    TOSH_MAKE_UTXD0_INPUT();
    TOSH_MAKE_URXD0_INPUT();
    TOSH_MAKE_UTXD1_INPUT();
    TOSH_MAKE_URXD1_INPUT();
  
    //PROG PINS
    TOSH_MAKE_PROG_RX_INPUT();
    TOSH_MAKE_PROG_TX_INPUT();

    //FLASH PINS
    TOSH_MAKE_FLASH_PWR_OUTPUT();
    TOSH_SET_FLASH_PWR_PIN();
    TOSH_MAKE_FLASH_CS_OUTPUT();
    TOSH_SET_FLASH_CS_PIN();

    //HUMIDITY PINS
    TOSH_MAKE_HUM_SCL_OUTPUT();
    TOSH_MAKE_HUM_SDA_OUTPUT();
    TOSH_MAKE_HUM_PWR_OUTPUT();
    TOSH_CLR_HUM_SCL_PIN();
    TOSH_CLR_HUM_SDA_PIN();
    TOSH_CLR_HUM_PWR_PIN();

    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/Msp430Timer32khzMapC.nc000066400000000000000000000065341207233610700240300ustar00rootroot00000000000000//$Id: Msp430Timer32khzMapC.nc,v 1.5 2010-06-29 22:07:55 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * MSP430Timer32khzMapC presents as paramaterized interfaces all of
 * the 32khz hardware timers on the MSP430 that are available for
 * compile time allocation by "new Alarm32khz16C()", "new
 * AlarmMilli32C()", and so on.  
 *
 * Platforms based on the MSP430 are * encouraged to copy in and
 * override this file, presenting only the * hardware timers that are
 * available for allocation on that platform.
 *
 * @author Cory Sharp 
 * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:55 $
 */

configuration Msp430Timer32khzMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
  Msp430Compare[0] = Msp430TimerC.CompareB0;

  // Timer pin B1 is used by the CC2420 radio's SFD pin
  // this is the only difference between the default 32khz map
  // and the map on telos

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB2;
  Msp430Compare[1] = Msp430TimerC.CompareB2;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB3;
  Msp430Compare[2] = Msp430TimerC.CompareB3;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB4;
  Msp430Compare[3] = Msp430TimerC.CompareB4;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB5;
  Msp430Compare[4] = Msp430TimerC.CompareB5;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB6;
  Msp430Compare[5] = Msp430TimerC.CompareB6;
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformC.nc000066400000000000000000000037621207233610700223050ustar00rootroot00000000000000// $Id: PlatformC.nc,v 1.6 2010-06-29 22:07:55 scipio Exp $

/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre and Cory Sharp
 * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:55 $
 */
#include "hardware.h"

configuration PlatformC
{
  provides interface Init;
}
implementation
{
  components PlatformP, MotePlatformC, MoteClockC;

  Init = PlatformP;
  PlatformP.MoteClockInit -> MoteClockC;
  PlatformP.MoteInit -> MotePlatformC;
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformHdlcUartC.nc000066400000000000000000000044771207233610700237400ustar00rootroot00000000000000/* Copyright (c) 2011 University of California, Berkeley
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

/** 
 */
configuration PlatformHdlcUartC {
  provides {
    interface StdControl;
    interface HdlcUart;
  }
} implementation {
#warning Enabling DMA on UART1RX

  components NoLedsC as Leds;
  components PlatformHdlcUartP as HdlcUartC;
  components TelosSerialP;

  StdControl = HdlcUartC;
  HdlcUart = HdlcUartC;

  components new Msp430Usart1C() as UsartC;
  HdlcUartC.UsartResource -> UsartC; 
  UsartC.ResourceConfigure -> HdlcUartC.ResourceConfigure;
  HdlcUartC.Usart -> UsartC;
  HdlcUartC.UsartInterrupts -> UsartC;

  HdlcUartC.Msp430UartConfigure -> TelosSerialP;

  components Msp430DmaC as DmaC;
  HdlcUartC.DmaChannel -> DmaC.Channel2;

  components new Alarm32khz16C();
  HdlcUartC.RxAbort -> Alarm32khz16C;

  HdlcUartC.Leds -> Leds;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformHdlcUartP.nc000066400000000000000000000173631207233610700237530ustar00rootroot00000000000000/* Copyright (c) 2011 University of California, Berkeley
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */
/*
 * Improved DMA UART implementation for MSP-base platforms to fix some
 * of the timing issues.  Based on my earlier implementation, but
 * moved to Peter Bigot's new layer so we can coexist with other
 * serial port users.
 * 
 * Instead of needing to service each UART interrupt as they occur, we
 * set up a continuous DMA transfer into a ring buffer; and an alarm
 * which periodically checks the progress of the transfer and delivers
 * data if new bytes have come in.  This results in significantly
 * looser timing requirements.
 * 
 * The size of the buffer controls how much freedom you have, timing
 * wise; you can set this at compile time with
 * PLATFORM_SERIAL_RX_BUFFER_SIZE
 *
 * @author Stephen Dawson-Haggerty 
 */

#include 
#include 

module PlatformHdlcUartP {
  provides {
    interface StdControl;
    interface HdlcUart;
    interface ResourceConfigure;
  }
  uses {
    interface Resource as UsartResource;
    interface Msp430UartConfigure;
    interface HplMsp430Usart as Usart;
    interface HplMsp430UsartInterrupts as UsartInterrupts;

    interface Msp430DmaChannel as DmaChannel;

    interface Alarm as RxAbort;

    interface Leds;
  }
} implementation {  
  norace uint16_t m_tx_len;
  norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(sizeof(__rx_buf)) m_rx_buf;
  norace uint16_t m_tx_pos;
  norace uint8_t m_byte_time;
#ifndef PLATFORM_SERIAL_RX_BUFFER_SIZE
  /* at 115200 baud, this is about 9ms of buffer 
   *
   * therefore, that is the longest we can get delayed by other
   * tasks without dropping * bytes.
   */
#define PLATFORM_SERIAL_RX_BUFFER_SIZE 64
#endif
  uint8_t __rx_buf[PLATFORM_SERIAL_RX_BUFFER_SIZE];
  bool m_rx_enabled;
  norace uint8_t *m_rx_delivery_start, *m_rx_delivery_stop;

  enum {
    // this is essentially how often the alarm fires, as a fraction of
    // the buffer.  For instance, at the default of three, the
    // delivery check should run every time the buffer would have
    // filled by a third if we were receiving the whole time.
    BUFFER_TIMEOUT_BYTES = 8,
  };

  command error_t StdControl.start() {
    call Leds.led1Toggle();
    return call UsartResource.request();
  }

  command error_t StdControl.stop() {
    call UsartResource.release();
    call RxAbort.stop();
    return SUCCESS;
  }

  async command void ResourceConfigure.configure() {
    msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig();
    call Leds.led0On();
    m_byte_time = (config->uartConfig.ubr / 4); // SDH : assume 4MHZ...
    call Usart.setModeUart(config);
    call Usart.enableIntr();
  }

  async command void ResourceConfigure.unconfigure() {
    call RxAbort.stop();
    call DmaChannel.stopTransfer();

    call Usart.resetUsart(TRUE);
    call Usart.disableIntr();
    call Usart.disableUart();

    /* leave the usart in reset */
    //call Usart.resetUsart(FALSE); // this shouldn't be called.
  }

  /*
   * Receive side
   *
   * Incoming bytes are placed into the buffer by the DMA processor,
   * and delivered asynchronously by the receive task, which is
   * started from an alarm, and from the dma interrupt if present.
   * There is still the possiblity for buffer underruns if the receive
   * handler delays too long or the alarm cannot run.
   */
  task void deliverTask() {
    /* deliver to the stop point, or the end of the buffer */
    while (m_rx_delivery_start != m_rx_delivery_stop) {
      signal HdlcUart.receivedByte(*(m_rx_delivery_start++));
      if (m_rx_delivery_start == m_rx_buf + sizeof(__rx_buf))
        m_rx_delivery_start = m_rx_buf;
    }
  }

  event void UsartResource.granted() {
    atomic {
      if ( m_rx_buf )
	return;
      m_rx_buf = __rx_buf;

      /* SDH : important : the dma transfer won't occur if the
         interrupt is enabled */
      call Usart.clrRxIntr();
      call Usart.disableRxIntr();
      call DmaChannel.setupTransfer(DMA_REPEATED_SINGLE_TRANSFER,
                                    DMA_TRIGGER_URXIFG1,
                                    DMA_EDGE_SENSITIVE,
                                    (void *)U1RXBUF_,
                                    (void *)m_rx_buf,
                                    sizeof(__rx_buf),
                                    DMA_BYTE,
                                    DMA_BYTE,
                                    DMA_ADDRESS_UNCHANGED,
                                    DMA_ADDRESS_INCREMENTED);
      call DmaChannel.startTransfer();

      /* start the timeout */
      /* this will be fired when the buffer is about a third full so we
         can deliver the first half... */
      m_rx_delivery_stop = m_rx_delivery_start = m_rx_buf;

      call RxAbort.startAt(call RxAbort.getNow(),
                           m_byte_time * BUFFER_TIMEOUT_BYTES);
    }
  }

  async event void UsartInterrupts.rxDone( uint8_t data ) {
    /* if there were a buffer, we would have recieved it on the dma
       channel ... */
    // this should never happen since we're using DMA...
    signal HdlcUart.receivedByte(data);
  }

  async event void RxAbort.fired() { 
    /* time out and deliver  */
    m_rx_delivery_stop = m_rx_buf + sizeof(__rx_buf) - DMA2SZ;
    if (m_rx_delivery_stop != m_rx_delivery_start)
      post deliverTask();

    call RxAbort.startAt(call RxAbort.getNow(), 
                         m_byte_time * BUFFER_TIMEOUT_BYTES);
  }

  async event void DmaChannel.transferDone(error_t success) {  }

  /* 
   * Send side.  no dma here, just send it out.
   *
   * We could do dma in the future, but it ties up another controller,
   * and the timing requirements on the pc side tend to be pretty
   * relaxed so it doesn't really matter if we get delayed while this
   * is going out.
   */
  command error_t HdlcUart.send( uint8_t* buf, uint16_t len ) {
    if ( len == 0 )
      return FAIL;
    else if ( m_tx_buf )
      return EBUSY;
    m_tx_buf = buf;
    m_tx_len = len;
    m_tx_pos = 0;
    call Usart.tx( buf[ m_tx_pos++ ] );
    return SUCCESS;
  }

  async event void UsartInterrupts.txDone() {
    if (m_tx_buf == NULL) return;
    if ( m_tx_pos < m_tx_len ) {
      call Usart.tx( m_tx_buf[ m_tx_pos++ ] );
    }
    else {
      m_tx_buf = NULL;
      signal HdlcUart.sendDone(SUCCESS);
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformLed.h000066400000000000000000000042111207233610700224440ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

#ifndef _PLATFORM_TMOTE_LED_H_
#define _PLATFORM_TMOTE_LED_H_

/** Constants used in the generic LedC module to determine how many
 * named Led interfaces should be published.  The value should match
 * the size of the table in PlatformLedsP, but we're not going to
 * guess that table's public name. */
#define PLATFORM_LED_COUNT 3

/** Map to the LED index for the red LED */
#define PLATFORM_LED_RED 0

/** Map to the LED index for the green LED */
#define PLATFORM_LED_GREEN 1

/** Map to the LED index for the blue LED */
#define PLATFORM_LED_BLUE 2

#endif // _PLATFORM_TMOTE_LED_H_
tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformLedC.nc000066400000000000000000000037151207233610700227300ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

/** Defines the Led and MultiLed interfaces in terms of the underlying
 * LedsC component.
 *
 * @author Peter A. Bigot 
 */
configuration PlatformLedC {
  provides {
    interface MultiLed;
    interface Led[uint8_t led_id];
  }
} implementation {
  components LedsC;
  components PlatformLedP;

  MultiLed = PlatformLedP;
  Led = PlatformLedP;
  PlatformLedP.Leds -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformLedP.nc000066400000000000000000000062401207233610700227410ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

/** Defines the Led and MultiLed interfaces in terms of the underlying
 * LedsC component.
 *
 * @author Peter A. Bigot 
 */
module PlatformLedP {
  provides {
    interface MultiLed;
    interface Led[uint8_t led_id];
  }
  uses {
    interface Leds;
  }
} implementation {

  async command void Led.on[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0On(); break;
      case 1: call Leds.led1On(); break;
      case 2: call Leds.led2On(); break;
    }
  }

  async command void Led.off[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0Off(); break;
      case 1: call Leds.led1Off(); break;
      case 2: call Leds.led2Off(); break;
    }
  }

  async command void Led.set[ uint8_t led_id ] (bool turn_on)
  {
    if (turn_on) {
      call Led.on[led_id]();
    } else {
      call Led.off[led_id]();
    }
  }

  async command void Led.toggle[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0Toggle(); break;
      case 1: call Leds.led1Toggle(); break;
      case 2: call Leds.led2Toggle(); break;
    }
  }

  async command unsigned int MultiLed.get () { return call Leds.get(); }

  async command void MultiLed.set (unsigned int val) { call Leds.set(val); }

  async command void MultiLed.on (unsigned int led_id) { call Led.on[led_id](); }

  async command void MultiLed.off (unsigned int led_id) { call Led.off[led_id](); }

  async command void MultiLed.setSingle (unsigned int led_id, bool turn_on) { call Led.set[led_id](turn_on); }

  async command void MultiLed.toggle (unsigned int led_id) { call Led.toggle[led_id](); }

}
tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformLedsC.nc000066400000000000000000000045051207233610700231110ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:55 scipio Exp $

/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre
 * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:55 $
 */
#include "hardware.h"

configuration PlatformLedsC {
  provides interface GeneralIO as Led0;
  provides interface GeneralIO as Led1;
  provides interface GeneralIO as Led2;
  uses interface Init;
}
implementation
{
  components 
      HplMsp430GeneralIOC as GeneralIOC
    , new Msp430GpioC() as Led0Impl
    , new Msp430GpioC() as Led1Impl
    , new Msp430GpioC() as Led2Impl
    ;
  components PlatformP;

  Init = PlatformP.LedsInit;

  Led0 = Led0Impl;
  Led0Impl -> GeneralIOC.Port54;

  Led1 = Led1Impl;
  Led1Impl -> GeneralIOC.Port55;

  Led2 = Led2Impl;
  Led2Impl -> GeneralIOC.Port56;

}

tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformP.nc000066400000000000000000000006701207233610700223150ustar00rootroot00000000000000#include "hardware.h"

module PlatformP @safe() {
  provides interface Init;
  uses interface Init as MoteClockInit;
  uses interface Init as MoteInit;
  uses interface Init as LedsInit;
}
implementation {
  command error_t Init.init() {
    WDTCTL = WDTPW + WDTHOLD;
    call MoteClockInit.init();
    call MoteInit.init();
    call LedsInit.init();
    return SUCCESS;
  }

  default command error_t LedsInit.init() { return SUCCESS; }
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/PlatformSerialC.nc000066400000000000000000000006411207233610700234360ustar00rootroot00000000000000
configuration PlatformSerialC {
  
  provides interface StdControl;
  provides interface UartStream;
  provides interface UartByte;
  
}

implementation {
  
  components new Msp430Uart1C() as UartC;
  UartStream = UartC;  
  UartByte = UartC;
  
  components TelosSerialP;
  StdControl = TelosSerialP;
  TelosSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
  TelosSerialP.Resource -> UartC.Resource;
  
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/TelosSerialP.nc000066400000000000000000000013171207233610700227560ustar00rootroot00000000000000module TelosSerialP {
  provides interface StdControl;
  provides interface Msp430UartConfigure;
  uses interface Resource;
}
implementation {
  
  msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };

  command error_t StdControl.start(){
    return call Resource.immediateRequest();
  }
  command error_t StdControl.stop(){
    call Resource.release();
    return SUCCESS;
  }
  event void Resource.granted(){}

  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
    return &msp430_uart_telos_config;
  }
  
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/TimeSyncMessageC.nc000066400000000000000000000067651207233610700235670ustar00rootroot00000000000000// $Id: TimeSyncMessageC.nc,v 1.3 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 *
 * The Active Message layer on the telosa platform. This is a naming wrapper
 * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
 *
 * @author Philip Levis
 * @author Brano Kusy
 * @date June 19 2005
 */

configuration TimeSyncMessageC {
  provides
  {
    interface SplitControl;
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface LowPowerListening;

    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;

    interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacket32khz;

    interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacketMilli;
  }
}
implementation {
#ifdef RFXLINK
  components CC2420XTimeSyncMessageC as AM;
#else
  components CC2420TimeSyncMessageC as AM;
#endif

  SplitControl = AM;

  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;
  TimeSyncAMSend32khz       = AM;
  TimeSyncAMSendMilli       = AM;
  TimeSyncPacket32khz       = AM;
  TimeSyncPacketMilli       = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}tinyos-2.1.2+dfsg/tos/platforms/telosa/VoltageC.nc000066400000000000000000000040521207233610700221130ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * VoltageC is a common name for the Msp430InternalVoltageC voltage
 * sensor available on the telosb platform.
 *
 * To convert from ADC counts to actual voltage, divide by 4096 and
 * multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $ $Date: 2006-12-13 01:22:36 $
 */

generic configuration VoltageC() {
  provides interface Read;
}
implementation {
  components new Msp430InternalVoltageC();
  Read = Msp430InternalVoltageC.Read;
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/VoltageStreamC.nc000066400000000000000000000041021207233610700232630ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * VoltageC is a common name for the Msp430InternalVoltageC voltage
 * sensor available on the telosb platform.
 *
 * To convert from ADC counts to actual voltage, divide by 4096 and
 * multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $ $Date: 2006-12-13 01:22:36 $
 */

generic configuration VoltageStreamC() {
  provides interface ReadStream;
}
implementation {
  components new Msp430InternalVoltageC();
  ReadStream = Msp430InternalVoltageC.ReadStream;
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/000077500000000000000000000000001207233610700211725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/at45db/000077500000000000000000000000001207233610700222555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/at45db/HplAt45dbC.nc000066400000000000000000000037671207233610700244060ustar00rootroot00000000000000/*
* Copyright (c) 2006, Technische Universitat Berlin
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright notice,
*   this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
*   notice, this list of conditions and the following disclaimer in the
*   documentation and/or other materials provided with the distribution.
* - Neither the name of the Technische Universitat Berlin nor the names
*   of its contributors may be used to endorse or promote products derived
*   from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

configuration HplAt45dbC {
  provides interface HplAt45db;
}
implementation {

  components new HplAt45dbByteC(9),
	new Msp430Spi0C() as Spi,
	HplAt45dbP,
	HplMsp430GeneralIOC as MspGeneralIO,
	new Msp430GpioC() as Select;

  HplAt45db = HplAt45dbByteC;

  HplAt45dbByteC.Resource -> Spi;
  HplAt45dbByteC.FlashSpi -> Spi;
  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP;

  Select -> MspGeneralIO.Port44;
  HplAt45dbP.Select -> Select;
  HplAt45dbP.FlashSpi -> Spi;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/at45db/HplAt45dbP.nc000066400000000000000000000043541207233610700244140ustar00rootroot00000000000000/*
* Copyright (c) 2006, Technische Universitat Berlin
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright notice,
*   this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
*   notice, this list of conditions and the following disclaimer in the
*   documentation and/or other materials provided with the distribution.
* - Neither the name of the Technische Universitat Berlin nor the names
*   of its contributors may be used to endorse or promote products derived
*   from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/


module HplAt45dbP {
  provides {
    interface HplAt45dbByte;
  }
  uses {
    interface SpiByte as FlashSpi;
    interface GeneralIO as Select;
  }
}
implementation
{
  command void HplAt45dbByte.select() {
    call Select.clr();
  }

  command void HplAt45dbByte.deselect() {
    call Select.set();
  }

  task void idleTask() {
    uint8_t status;
    status = call FlashSpi.write(0);
    if (!(status & 0x80)) {
      post idleTask();
    } else {
      signal HplAt45dbByte.idle();
    }
  }

  command void HplAt45dbByte.waitIdle() {
    post idleTask();
  }

  command bool HplAt45dbByte.getCompareStatus() {
    uint8_t status;
    status = call FlashSpi.write(0);
    return (!(status & 0x40));
  }
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/at45db/HplAt45db_chip.h000066400000000000000000000045011207233610700251200ustar00rootroot00000000000000// $Id: HplAt45db_chip.h,v 1.4 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

#ifndef HPLAT45DB_CHIP_H
#define HPLAT45DB_CHIP_H

// flash characteristics
enum {
  AT45_MAX_PAGES = 2048,
  AT45_PAGE_SIZE = 264,
  AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes
};

typedef uint16_t at45page_t;
typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */

#endif
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420/000077500000000000000000000000001207233610700220675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420/HplCC2420AlarmC.nc000066400000000000000000000040231207233610700247310ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:44 $
 */

generic configuration HplCC2420AlarmC() {

  provides interface Init;
  provides interface Alarm as Alarm32khz32;

}

implementation {

  components new Alarm32khz32C();

  Init = Alarm32khz32C;
  Alarm32khz32 = Alarm32khz32C;
  
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420/HplCC2420InterruptsC.nc000066400000000000000000000052421207233610700260600ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of interrupts and captures for the ChipCon
 * CC2420 radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:44 $
 */

configuration HplCC2420InterruptsC {

  provides interface GpioCapture as CaptureSFD;
  provides interface GpioInterrupt as InterruptCCA;
  provides interface GpioInterrupt as InterruptFIFOP;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components Msp430TimerC;
  components new GpioCaptureC() as CaptureSFDC;
  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlB1;
  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureB1;
  CaptureSFDC.GeneralIO -> GeneralIOC.Port41;

  components HplMsp430InterruptC;
  components new Msp430InterruptC() as InterruptCCAC;
  components new Msp430InterruptC() as InterruptFIFOPC;
  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port14;
  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port10;

  CaptureSFD = CaptureSFDC.Capture;
  InterruptCCA = InterruptCCAC.Interrupt;
  InterruptFIFOP = InterruptFIFOPC.Interrupt;

}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420/HplCC2420PinsC.nc000066400000000000000000000053761207233610700246220ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for the ChipCon CC2420
 * radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:44 $
 */

configuration HplCC2420PinsC {

  provides interface GeneralIO as CCA;
  provides interface GeneralIO as CSN;
  provides interface GeneralIO as FIFO;
  provides interface GeneralIO as FIFOP;
  provides interface GeneralIO as RSTN;
  provides interface GeneralIO as SFD;
  provides interface GeneralIO as VREN;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components new Msp430GpioC() as CCAM;
  components new Msp430GpioC() as CSNM;
  components new Msp430GpioC() as FIFOM;
  components new Msp430GpioC() as FIFOPM;
  components new Msp430GpioC() as RSTNM;
  components new Msp430GpioC() as SFDM;
  components new Msp430GpioC() as VRENM;

  CCAM -> GeneralIOC.Port14;
  CSNM -> GeneralIOC.Port42;
  FIFOM -> GeneralIOC.Port13;
  FIFOPM -> GeneralIOC.Port10;
  RSTNM -> GeneralIOC.Port46;
  SFDM -> GeneralIOC.Port41;
  VRENM -> GeneralIOC.Port45;

  CCA = CCAM;
  CSN = CSNM;
  FIFO = FIFOM;
  FIFOP = FIFOPM;
  RSTN = RSTNM;
  SFD = SFDM;
  VREN = VRENM;
  
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420/HplCC2420SpiC.nc000066400000000000000000000040431207233610700244320ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the SPI bus for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:44 $
 */

generic configuration HplCC2420SpiC() {
  
  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;
  
}

implementation {

  components new Msp430Spi0C() as SpiC;
  
  Resource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;
  
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/000077500000000000000000000000001207233610700222575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/Msp430ClockP.nc000066400000000000000000000153321207233610700246670ustar00rootroot00000000000000//$Id: Msp430ClockP.nc,v 1.9 2010-06-29 22:07:45 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Cory Sharp 
 * @author Vlado Handziski 
 * @author Janos Sallai
 */

/**
This file programs the msp430 time subsystem such that SMCLK=DCO,
and TimerA=SMCLK/4. This allows for faster peripheral access, since
I/O subsystem is clocked from SMCKL.
*/

#include 

#include 

module Msp430ClockP @safe()
{
  provides interface Init;
  provides interface Msp430ClockInit;
  provides interface McuPowerOverride;
}
implementation
{
  MSP430REG_NORACE(IE1);
  MSP430REG_NORACE(TACTL);
  MSP430REG_NORACE(TAIV);
  MSP430REG_NORACE(TBCTL);
  MSP430REG_NORACE(TBIV);

  enum
  {
    ACLK_CALIB_PERIOD = 8,
    TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
  };

  async command mcu_power_t McuPowerOverride.lowestState() {
    return MSP430_POWER_LPM3;
  }

  command void Msp430ClockInit.defaultSetupDcoCalibrate()
  {
  
    // --- setup ---

    TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
    TBCTL = TBSSEL0 | MC1;
    BCSCTL1 = XT2OFF | RSEL2;
    BCSCTL2 = 0;
    TBCCTL0 = CM0;
   }
    
  command void Msp430ClockInit.defaultInitClocks()
  {
    // BCSCTL1
    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
    // .XTS = 0; set low frequency mode for LXFT1
    // .DIVA = 0; set the divisor on ACLK to 1
    // .RSEL, do not modify
    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));

    // BCSCTL2
    // .SELM = 0; select DCOCLK as source for MCLK
    // .DIVM = 0; set the divisor of MCLK to 1
    // .SELS = 0; select DCOCLK as source for SCLK
    // .DIVS = 0; set the divisor of SCLK to 1
    // .DCOR = 0; select internal resistor for DCO
    BCSCTL2 = 0;

    // IE1.OFIE = 0; no interrupt for oscillator fault
    CLR_FLAG( IE1, OFIE );
  }

  command void Msp430ClockInit.defaultInitTimerA()
  {
    TAR = 0;

    // TACTL
    // .TACLGRP = 0; each TACL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TASSEL = 2; source SMCLK = DCO
    // .ID = 2; input divisor of 4
    // .MC = 0; initially disabled
    // .TACLR = 0; reset timer A
    // .TAIE = 1; enable timer A interrupts
    TACTL = TASSEL1 | ID1 | TAIE;
  }

  command void Msp430ClockInit.defaultInitTimerB()
  {
    TBR = 0;

    // TBCTL
    // .TBCLGRP = 0; each TBCL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TBSSEL = 1; source ACLK
    // .ID = 0; input divisor of 1
    // .MC = 0; initially disabled
    // .TBCLR = 0; reset timer B
    // .TBIE = 1; enable timer B interrupts
    TBCTL = TBSSEL0 | TBIE;
  }

  default event void Msp430ClockInit.setupDcoCalibrate()
  {
    call Msp430ClockInit.defaultSetupDcoCalibrate();
  }
  
  default event void Msp430ClockInit.initClocks()
  {
    call Msp430ClockInit.defaultInitClocks();
  }

  default event void Msp430ClockInit.initTimerA()
  {
    call Msp430ClockInit.defaultInitTimerA();
  }

  default event void Msp430ClockInit.initTimerB()
  {
    call Msp430ClockInit.defaultInitTimerB();
  }


  void startTimerA()
  {
    // TACTL.MC = 2; continuous mode
    TACTL = MC1 | (TACTL & ~(MC1|MC0));
  }

  void stopTimerA()
  {
    //TACTL.MC = 0; stop timer B
    TACTL = TACTL & ~(MC1|MC0);
  }

  void startTimerB()
  {
    // TBCTL.MC = 2; continuous mode
    TBCTL = MC1 | (TBCTL & ~(MC1|MC0));
  }

  void stopTimerB()
  {
    //TBCTL.MC = 0; stop timer B
    TBCTL = TBCTL & ~(MC1|MC0);
  }

  void set_dco_calib( int calib )
  {
    BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
    DCOCTL = calib & 0xff;
  }

  uint16_t test_calib_busywait_delta( int calib )
  {
    int8_t aclk_count = 2;
    uint16_t dco_prev = 0;
    uint16_t dco_curr = 0;

    set_dco_calib( calib );

    while( aclk_count-- > 0 )
    {
      TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt
      TBCCTL0 &= ~CCIFG; // clear pending interrupt
      while( (TBCCTL0 & CCIFG) == 0 ); // busy wait
      dco_prev = dco_curr;
      dco_curr = TAR;
    }

    return dco_curr - dco_prev;
  }

  // busyCalibrateDCO
  // Should take about 9ms if ACLK_CALIB_PERIOD=8.
  // DCOCTL and BCSCTL1 are calibrated when done.
  void busyCalibrateDco()
  {
    // --- variables ---
    int calib;
    int step;

    // --- calibrate ---

    // Binary search for RSEL,DCO,DCOMOD.
    // It's okay that RSEL isn't monotonic.

    for( calib=0,step=0x800; step!=0; step>>=1 )
    {
      // if the step is not past the target, commit it
      if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
        calib |= step;
    }

    // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
    if( (calib & 0x0e0) == 0x0e0 )
      calib &= ~0x01f;

    set_dco_calib( calib );
  }

  command error_t Init.init()
  {
    // Reset timers and clear interrupt vectors
    TACTL = TACLR;
    TAIV = 0;
    TBCTL = TBCLR;
    TBIV = 0;

    atomic
    {
      signal Msp430ClockInit.setupDcoCalibrate();
      busyCalibrateDco();
      signal Msp430ClockInit.initClocks();
      signal Msp430ClockInit.initTimerA();
      signal Msp430ClockInit.initTimerB();
      startTimerA();
      startTimerB();
    }

    return SUCCESS;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/README.txt000066400000000000000000000023111207233610700237520ustar00rootroot00000000000000CC2420X is an alternative radio stack for the TI CC2420 radio, using the
rfxlink library (lib/rfxlink). The stack is IEEE802.15.4 compliant. All
rfxlink features are supported. See lib/rfxlink/README.txt for details.

The stack can be used with microsecond-precision timestamping, as well as
with 32khz timestamping. 

To use this stack with microsecond precision timestamping configuration,
compile the application with the cc2420x extra:

make telosb cc2420x

To use this stack with 32khz precision timestamping configuration, add
the following lines to the Makefile:

make telosb cc2420x_32khz

Remarks:
- This stack programs the msp430 clock subsystem differently than the
  default cc2420 stack. In particular, SMCLK is ticking at 4MHz, which
  allows for faster peripheral access.
- Microsecond precision timestamping requires that TimerB is set to
  SMCLK/4, therefore TimerA must be configured as the 32khz clock (ACLK).
  Since TimerA has only three compare registers, this limits the number
  of physical (that is, unvirtualized) 32kHz alarms in the system. (This
  is not an issue if 32khz timestamping is used).
- 32khz timestamping is not interoperable with other devices (e.g. iris).
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/TelosSerialP.nc000066400000000000000000000043251207233610700251530ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

/**
 We need to set the proper USART config values since SMCLK is configured to
 tick at 4MHz (SMCLK=DCO).
 */

module TelosSerialP {
  provides interface StdControl;
  provides interface Msp430UartConfigure;
  uses interface Resource;
}
implementation {
  
  enum {
// from http://www.daycounter.com/Calculators/MSP430-Uart-Calculator.phtml
  UBR_4MHZ_4800=0x0369,   UMCTL_4MHZ_4800=0xfb,
  UBR_4MHZ_9600=0x01b4,   UMCTL_4MHZ_9600=0xdf,
  UBR_4MHZ_57600=0x0048,  UMCTL_4MHZ_57600=0xfb,
  UBR_4MHZ_115200=0x0024, UMCTL_4MHZ_115200=0x4a,

  UBR_3_7MHZ_115200=0x0020, UMCTL_3_7MHZ_115200=0x00,

 };  	
  
  msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_4MHZ_115200, umctl: UBR_4MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };

  command error_t StdControl.start(){
    return call Resource.immediateRequest();
  }
  command error_t StdControl.stop(){
    call Resource.release();
    return SUCCESS;
  }
  event void Resource.granted(){}

  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
    return &msp430_uart_telos_config;
  }
  
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/t32khz/000077500000000000000000000000001207233610700234045ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/t32khz/HplCC2420XC.nc000066400000000000000000000055541207233610700254330ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi0C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port14;
	CSNM -> IO.Port42;
	FIFOM -> IO.Port13;
	FIFOPM -> IO.Port10;
	RSTNM -> IO.Port46;
	SFDM -> IO.Port41;
	VRENM -> IO.Port45;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	// capture
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlB1;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureB1;
	GpioCaptureC.GeneralIO -> IO.Port41;
	SfdCapture = GpioCaptureC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port10;
	FifopInterrupt = FifopInterruptC.Interrupt; 


	// alarm
	components new Alarm32khz16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTime32khzC;
	LocalTimeRadio = LocalTime32khzC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/t32khz/RadioConfig.h000066400000000000000000000042611207233610700257440ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include 
//#include 

/* This is the default value of the PA_POWER field of the TXCTL register. */
#ifndef CC2420X_DEF_RFPOWER
#define CC2420X_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the FSCTRL register. */
#ifndef CC2420X_DEF_CHANNEL
#define CC2420X_DEF_CHANNEL	11
#endif

/* The number of microseconds a sending micaz mote will wait for an acknowledgement */
#ifndef SOFTWAREACK_TIMEOUT
#define SOFTWAREACK_TIMEOUT	800
#endif

/**
 * This is the timer type of the radio alarm interface
 */
typedef T32khz TRadio;
typedef uint16_t tradio_size;

/**
 * The number of radio alarm ticks per one microsecond (0.9216).
 * We use integers and no parentheses just to make deputy happy.
 * Ok, further hacks were required for deputy, I removed 00 from the
 * beginning and end to be able to handle longer wait periods.
 */
#define RADIO_ALARM_MICROSEC 1/32

/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
#define RADIO_ALARM_MILLI_EXP	5

#endif//__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/t32khz/am/000077500000000000000000000000001207233610700240015ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/t32khz/am/ActiveMessageC.nc000066400000000000000000000040641207233610700271520ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#include 

configuration ActiveMessageC
{
	provides
	{
		interface SplitControl;

		interface AMSend[uint8_t id];
		interface Receive[uint8_t id];
		interface Receive as Snoop[uint8_t id];
		interface SendNotifier[am_id_t id];

		interface Packet;
		interface AMPacket;

		interface PacketAcknowledgements;
		interface LowPowerListening;
		interface PacketLink;
		interface RadioChannel;

		interface PacketTimeStamp as PacketTimeStamp32khz;
		interface PacketTimeStamp as PacketTimeStampMilli;
	}
}

implementation
{
	components CC2420XActiveMessageC as MessageC;

	SplitControl = MessageC;

	AMSend = MessageC;
	Receive = MessageC.Receive;
	Snoop = MessageC.Snoop;
	SendNotifier = MessageC;

	Packet = MessageC;
	AMPacket = MessageC;

	PacketAcknowledgements = MessageC;
	LowPowerListening = MessageC;
	PacketLink = MessageC;
	RadioChannel = MessageC;

	PacketTimeStampMilli = MessageC.PacketTimeStampMilli;
	PacketTimeStamp32khz = MessageC.PacketTimeStampRadio;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/t32khz/am/TimeSyncMessageC.nc000066400000000000000000000041441207233610700274710ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#include 

configuration TimeSyncMessageC
{
	provides
	{
		interface SplitControl;

		interface Receive[uint8_t id];
		interface Receive as Snoop[am_id_t id];
		interface Packet;
		interface AMPacket;

		interface PacketTimeStamp as PacketTimeStampRadio;
		interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketRadio;

		interface PacketTimeStamp as PacketTimeStampMilli;
		interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketMilli;
	}
}

implementation
{
	components CC2420XTimeSyncMessageC as MessageC;
  
	SplitControl	= MessageC;
  	Receive		= MessageC.Receive;
	Snoop		= MessageC.Snoop;
	Packet		= MessageC;
	AMPacket	= MessageC;

	PacketTimeStampRadio	= MessageC;
	TimeSyncAMSendRadio	= MessageC;
	TimeSyncPacketRadio	= MessageC;

	PacketTimeStampMilli	= MessageC;
	TimeSyncAMSendMilli	= MessageC;
	TimeSyncPacketMilli	= MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/000077500000000000000000000000001207233610700235545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/HplCC2420XC.nc000066400000000000000000000055541207233610700256030ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

configuration HplCC2420XC {
	provides {
		interface Resource as SpiResource;
		interface FastSpiByte;
		interface GeneralIO as CCA;
		interface GeneralIO as CSN;
		interface GeneralIO as FIFO;
		interface GeneralIO as FIFOP;
		interface GeneralIO as RSTN;
		interface GeneralIO as SFD;
		interface GeneralIO as VREN;
		interface GpioCapture as SfdCapture;
		interface GpioInterrupt as FifopInterrupt;

		interface LocalTime as LocalTimeRadio;
		interface Init;
		interface Alarm;
	}
}
implementation {

	components HplMsp430GeneralIOC as IO, new Msp430Spi0C() as SpiC;

	// pins
	components new Msp430GpioC() as CCAM;
	components new Msp430GpioC() as CSNM;
	components new Msp430GpioC() as FIFOM;
	components new Msp430GpioC() as FIFOPM;
	components new Msp430GpioC() as RSTNM;
	components new Msp430GpioC() as SFDM;
	components new Msp430GpioC() as VRENM;
	
	CCAM -> IO.Port14;
	CSNM -> IO.Port42;
	FIFOM -> IO.Port13;
	FIFOPM -> IO.Port10;
	RSTNM -> IO.Port46;
	SFDM -> IO.Port41;
	VRENM -> IO.Port45;
	
	CCA = CCAM;
	CSN = CSNM;
	FIFO = FIFOM;
	FIFOP = FIFOPM;
	RSTN = RSTNM;
	SFD = SFDM;
	VREN = VRENM;

	// spi	
	SpiResource = SpiC.Resource;
	FastSpiByte = SpiC;

	// capture
	components Msp430TimerC as TimerC;
	components new GpioCaptureC();
	GpioCaptureC.Msp430TimerControl -> TimerC.ControlB1;
	GpioCaptureC.Msp430Capture -> TimerC.CaptureB1;
	GpioCaptureC.GeneralIO -> IO.Port41;
	SfdCapture = GpioCaptureC;

  	components new Msp430InterruptC() as FifopInterruptC, HplMsp430InterruptC;
	FifopInterruptC.HplInterrupt -> HplMsp430InterruptC.Port10;
	FifopInterrupt = FifopInterruptC.Interrupt; 


	// alarm
	components new AlarmMicro16C() as AlarmC;
	Alarm = AlarmC;
	Init = AlarmC;

	// localTime
	components LocalTimeMicroC;
	LocalTimeRadio = LocalTimeMicroC.LocalTime;

}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/McuSleepC.nc000066400000000000000000000114771207233610700257300ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * Implementation of TEP 112 (Microcontroller Power Management) for
 * the MSP430. Code for low power calculation copied from older
 * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp.
 *
 *
 * @author Philip Levis
 * @author Vlado Handziski
 * @author Joe Polastre
 * @author Cory Sharp
 * @author Janos Sallai
 * @date   October 26, 2005
 * @see  Please refer to TEP 112 for more information about this component and its
 *          intended use.
 *
 */

/**
 We need prevent the MCU from sleeping when the microsecond alarm is set.
 */

module McuSleepC @safe() {
  provides {
    interface McuSleep;
    interface McuPowerState;
  }
  uses {
    interface McuPowerOverride;
  }
}
implementation {
  bool dirty = TRUE;
  mcu_power_t powerState = MSP430_POWER_ACTIVE;

  /* Note that the power values are maintained in an order
   * based on their active components, NOT on their values.*/
  // NOTE: This table should be in progmem.
  const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = {
    0,                                       // ACTIVE
    SR_CPUOFF,                               // LPM0
    SR_SCG0+SR_CPUOFF,                       // LPM1
    SR_SCG1+SR_CPUOFF,                       // LPM2
    SR_SCG1+SR_SCG0+SR_CPUOFF,               // LPM3
    SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF,     // LPM4
  };
    
  mcu_power_t getPowerState() {
    mcu_power_t pState = MSP430_POWER_LPM4;
    // TimerA, USART0, USART1 check
    if ((((TBCCTL0 & CCIE) ||
	  (TBCCTL1 & CCIE) ||
	  (TBCCTL2 & CCIE)) &&
	 ((TBCTL & TASSEL_3) == TASSEL_2)) ||
	((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) ||
	((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
#ifdef __msp430_have_usart0_with_i2c
	 // registers end in "nr" to prevent nesC race condition detection
	 || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
	     (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C))
#endif
	)
      pState = MSP430_POWER_LPM1;
    
#ifdef __msp430_have_adc12
    // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE
    if (ADC12CTL0 & ADC12ON){
      if (ADC12CTL1 & ADC12SSEL_2){
        // sample or conversion operation with MCLK or SMCLK
        if (ADC12CTL1 & ADC12SSEL_1)
          pState = MSP430_POWER_LPM1;
        else
          pState = MSP430_POWER_ACTIVE;
      } else if ((ADC12CTL1 & SHS0) && ((TACTL & TASSEL_3) == TASSEL_2)){
        // Timer A is used as sample-and-hold source and SMCLK sources Timer A
        // (Timer A interrupts are always disabled when it is used by the 
        // ADC subsystem, that's why the Timer check above is not enough)
	      pState = MSP430_POWER_LPM1;
      }
    }
#endif
    
    return pState;
  }
  
  void computePowerState() {
    powerState = mcombine(getPowerState(),
			  call McuPowerOverride.lowestState());
  }
  
  async command void McuSleep.sleep() {
    uint16_t temp;
    if (dirty) {
      computePowerState();
      //dirty = 0;
    }
    temp = msp430PowerBits[powerState] | SR_GIE;
    __asm__ __volatile__( "bis  %0, r2" : : "m" (temp) );
    // All of memory may change at this point...
    asm volatile ("" : : : "memory");
    __nesc_disable_interrupt();
  }

  async command void McuPowerState.update() {
    atomic dirty = 1;
  }

 default async command mcu_power_t McuPowerOverride.lowestState() {
   return MSP430_POWER_LPM4;
 }

}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430ClockP.nc000066400000000000000000000145141207233610700261650ustar00rootroot00000000000000//$Id: Msp430ClockP.nc,v 1.8 2009/07/07 18:53:40 scipio Exp $

/* "Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/**
 * @author Cory Sharp 
 * @author Vlado Handziski 
 * @author Janos Sallai
 */

/**
This file programs the msp430 time subsystem such that SMCLK=DCO, TimerA=ACLK,
and TimerB=SMCLK/4. This allows for faster peripheral access, since
I/O subsystem is clocked from SMCKL. Also, this allows for microsecond-precision
capture of the cc2420 SFD.
*/
 
#include 

#include 

module Msp430ClockP @safe()
{
  provides interface Init;
  provides interface Msp430ClockInit;
  provides interface McuPowerOverride;
}
implementation
{
  MSP430REG_NORACE(IE1);
  MSP430REG_NORACE(TACTL);
  MSP430REG_NORACE(TAIV);
  MSP430REG_NORACE(TBCTL);
  MSP430REG_NORACE(TBIV);

  enum
  {
    ACLK_CALIB_PERIOD = 8,
    TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD
  };

  async command mcu_power_t McuPowerOverride.lowestState() {
    return MSP430_POWER_LPM3;
  }

  command void Msp430ClockInit.defaultSetupDcoCalibrate()
  {
  
    // --- setup ---

    TACTL = TASSEL0 | MC1; // source ACLK, continuous mode, everything else 0
    TBCTL = TBSSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
    BCSCTL1 = XT2OFF | RSEL2;
    BCSCTL2 = 0;
    TBCCTL0 = CM0;
   }
    
  command void Msp430ClockInit.defaultInitClocks()
  {
    // BCSCTL1
    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
    // .XTS = 0; set low frequency mode for LXFT1
    // .DIVA = 0; set the divisor on ACLK to 1
    // .RSEL, do not modify
    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));

    // BCSCTL2
    // .SELM = 0; select DCOCLK as source for MCLK
    // .DIVM = 0; set the divisor of MCLK to 1
    // .SELS = 0; select DCOCLK as source for SCLK
    // .DIVS = 0; set the divisor of SCLK to 1
    // .DCOR = 0; select internal resistor for DCO
    BCSCTL2 = 0;

    // IE1.OFIE = 0; no interrupt for oscillator fault
    CLR_FLAG( IE1, OFIE );
  }

  command void Msp430ClockInit.defaultInitTimerA()
  {
    TAR = 0;

    // TACTL
    // .TACLGRP = 0; each TACL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TASSEL = 1; source ACLK
    // .ID = 0; input divisor of 1
    // .MC = 0; initially disabled
    // .TACLR = 0; reset timer A
    // .TAIE = 1; enable timer A interrupts
    TACTL = TASSEL0 | TAIE;
  }

  command void Msp430ClockInit.defaultInitTimerB()
  {
    TBR = 0;

    // TBCTL
    // .TBCLGRP = 0; each TBCL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TBSSEL = 2; source SMCLK
    // .ID = 2; input divisor of 4
    // .MC = 0; initially disabled
    // .TBCLR = 0; reset timer B
    // .TBIE = 1; enable timer B interrupts
    TBCTL = TBSSEL1 | ID1 | TBIE;
  }

  default event void Msp430ClockInit.setupDcoCalibrate()
  {
    call Msp430ClockInit.defaultSetupDcoCalibrate();
  }
  
  default event void Msp430ClockInit.initClocks()
  {
    call Msp430ClockInit.defaultInitClocks();
  }

  default event void Msp430ClockInit.initTimerA()
  {
    call Msp430ClockInit.defaultInitTimerA();
  }

  default event void Msp430ClockInit.initTimerB()
  {
    call Msp430ClockInit.defaultInitTimerB();
  }


  void startTimerA()
  {
    // TACTL.MC = 2; continuous mode
    TACTL = MC1 | (TACTL & ~(MC1|MC0));
  }

  void stopTimerA()
  {
    //TACTL.MC = 0; stop timer A
    TACTL = TACTL & ~(MC1|MC0);
  }

  void startTimerB()
  {
    // TBCTL.MC = 2; continuous mode
    TBCTL = MC1 | (TBCTL & ~(MC1|MC0));
  }

  void stopTimerB()
  {
    //TBCTL.MC = 0; stop timer B
    TBCTL = TBCTL & ~(MC1|MC0);
  }

  void set_dco_calib( int calib )
  {
    BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
    DCOCTL = calib & 0xff;
  }

  uint16_t test_calib_busywait_delta( int calib )
  {
    int8_t aclk_count = 2;
    uint16_t dco_prev = 0;
    uint16_t dco_curr = 0;

    set_dco_calib( calib );

    while( aclk_count-- > 0 )
    {
      TACCR0 = TAR + ACLK_CALIB_PERIOD; // set next interrupt
      TACCTL0 &= ~CCIFG; // clear pending interrupt
      while( (TACCTL0 & CCIFG) == 0 ); // busy wait
      dco_prev = dco_curr;
      dco_curr = TBR;
    }

    return dco_curr - dco_prev;
  }

  // busyCalibrateDCO
  // Should take about 9ms if ACLK_CALIB_PERIOD=8.
  // DCOCTL and BCSCTL1 are calibrated when done.
  void busyCalibrateDco()
  {
    // --- variables ---
    int calib;
    int step;

    // --- calibrate ---

    // Binary search for RSEL,DCO,DCOMOD.
    // It's okay that RSEL isn't monotonic.

    for( calib=0,step=0x800; step!=0; step>>=1 )
    {
      // if the step is not past the target, commit it
      if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
        calib |= step;
    }

    // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
    if( (calib & 0x0e0) == 0x0e0 )
      calib &= ~0x01f;

    set_dco_calib( calib );
  }

  command error_t Init.init()
  {
    // Reset timers and clear interrupt vectors
    TACTL = TACLR;
    TAIV = 0;
    TBCTL = TBCLR;
    TBIV = 0;

    atomic
    {
      signal Msp430ClockInit.setupDcoCalibrate();
      busyCalibrateDco();
      signal Msp430ClockInit.initClocks();
      signal Msp430ClockInit.initTimerA();
      signal Msp430ClockInit.initTimerB();
      startTimerA();
      startTimerB();
    }

    return SUCCESS;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430Counter32khzC.nc000066400000000000000000000053651207233610700274220ustar00rootroot00000000000000
/* "Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
 
/**
 * Msp430Counter32khC provides the standard 32khz counter for the MSP430.
 *
 * @author Cory Sharp 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

configuration Msp430Counter32khzC
{
  provides interface Counter as Msp430Counter32khz;
}
implementation
{
  components Msp430TimerC;
  components new Msp430CounterC(T32khz) as Counter;

  Msp430Counter32khz = Counter;
  Counter.Msp430Timer -> Msp430TimerC.TimerA;
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430CounterMicroC.nc000066400000000000000000000054001207233610700275200ustar00rootroot00000000000000
/* "Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
 
/**
 * Msp430Counter32khC provides the standard 32khz counter for the MSP430.
 *
 * @author Cory Sharp 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

configuration Msp430CounterMicroC
{
  provides interface Counter as Msp430CounterMicro;
}
implementation
{
  components Msp430TimerC
           , new Msp430CounterC(TMicro) as Counter
           ;

  Msp430CounterMicro = Counter;
  Counter.Msp430Timer -> Msp430TimerC.TimerB;
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430Timer32khzMapC.nc000066400000000000000000000034501207233610700275120ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
  
configuration Msp430Timer32khzMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerA;
  Msp430TimerControl[0] = Msp430TimerC.ControlA0;
  Msp430Compare[0] = Msp430TimerC.CompareA0;

  Msp430Timer[1] = Msp430TimerC.TimerA;
  Msp430TimerControl[1] = Msp430TimerC.ControlA1;
  Msp430Compare[1] = Msp430TimerC.CompareA1;

  Msp430Timer[2] = Msp430TimerC.TimerA;
  Msp430TimerControl[2] = Msp430TimerC.ControlA2;
  Msp430Compare[2] = Msp430TimerC.CompareA2;
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430TimerC.nc000066400000000000000000000171651207233610700262020ustar00rootroot00000000000000
/* "Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement
 * is hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 *
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
 * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 */

/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
  
/**
 * @author Cory Sharp 
 */

configuration Msp430TimerC
{
  provides interface Msp430Timer as TimerA;
  provides interface Msp430TimerControl as ControlA0;
  provides interface Msp430TimerControl as ControlA1;
  provides interface Msp430TimerControl as ControlA2;
  provides interface Msp430Compare as CompareA0;
  provides interface Msp430Compare as CompareA1;
  provides interface Msp430Compare as CompareA2;
  provides interface Msp430Capture as CaptureA0;
  provides interface Msp430Capture as CaptureA1;
  provides interface Msp430Capture as CaptureA2;

  provides interface Msp430Timer as TimerB;
  provides interface Msp430TimerControl as ControlB0;
  provides interface Msp430TimerControl as ControlB1;
  provides interface Msp430TimerControl as ControlB2;
  provides interface Msp430TimerControl as ControlB3;
  provides interface Msp430TimerControl as ControlB4;
  provides interface Msp430TimerControl as ControlB5;
  provides interface Msp430TimerControl as ControlB6;
  provides interface Msp430Compare as CompareB0;
  provides interface Msp430Compare as CompareB1;
  provides interface Msp430Compare as CompareB2;
  provides interface Msp430Compare as CompareB3;
  provides interface Msp430Compare as CompareB4;
  provides interface Msp430Compare as CompareB5;
  provides interface Msp430Compare as CompareB6;
  provides interface Msp430Capture as CaptureB0;
  provides interface Msp430Capture as CaptureB1;
  provides interface Msp430Capture as CaptureB2;
  provides interface Msp430Capture as CaptureB3;
  provides interface Msp430Capture as CaptureB4;
  provides interface Msp430Capture as CaptureB5;
  provides interface Msp430Capture as CaptureB6;
}
implementation
{
  components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE,
               TASSEL0, TASSEL1, TRUE ) as Msp430TimerA
           , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE,
               TBSSEL0, TBSSEL1, FALSE ) as Msp430TimerB
           , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0
           , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1
           , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2
           , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0
           , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1
           , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2
           , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3
           , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4
           , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5
           , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6
           , Msp430TimerCommonP as Common
  	   // online DCO calibration
//  	   , Msp430DcoCalibC, new AutoStartC();
           ;

  // online DCO calibration
//  Msp430DcoCalibC.StdControl <- AutoStartC;
  
  // Timer A
  TimerA = Msp430TimerA.Timer;
  Msp430TimerA.Overflow -> Msp430TimerA.Event[5];
  Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0;
  Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1;

  // Timer A0
  ControlA0 = Msp430TimerA0.Control;
  CompareA0 = Msp430TimerA0.Compare;
  CaptureA0 = Msp430TimerA0.Capture;
  Msp430TimerA0.Timer -> Msp430TimerA.Timer;
  Msp430TimerA0.Event -> Msp430TimerA.Event[0];

  // Timer A1
  ControlA1 = Msp430TimerA1.Control;
  CompareA1 = Msp430TimerA1.Compare;
  CaptureA1 = Msp430TimerA1.Capture;
  Msp430TimerA1.Timer -> Msp430TimerA.Timer;
  Msp430TimerA1.Event -> Msp430TimerA.Event[1];

  // Timer A2
  ControlA2 = Msp430TimerA2.Control;
  CompareA2 = Msp430TimerA2.Compare;
  CaptureA2 = Msp430TimerA2.Capture;
  Msp430TimerA2.Timer -> Msp430TimerA.Timer;
  Msp430TimerA2.Event -> Msp430TimerA.Event[2];

  // Timer B
  TimerB = Msp430TimerB.Timer;
  Msp430TimerB.Overflow -> Msp430TimerB.Event[7];
  Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0;
  Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1;

  // Timer B0
  ControlB0 = Msp430TimerB0.Control;
  CompareB0 = Msp430TimerB0.Compare;
  CaptureB0 = Msp430TimerB0.Capture;
  Msp430TimerB0.Timer -> Msp430TimerB.Timer;
  Msp430TimerB0.Event -> Msp430TimerB.Event[0];

  // Timer B1
  ControlB1 = Msp430TimerB1.Control;
  CompareB1 = Msp430TimerB1.Compare;
  CaptureB1 = Msp430TimerB1.Capture;
  Msp430TimerB1.Timer -> Msp430TimerB.Timer;
  Msp430TimerB1.Event -> Msp430TimerB.Event[1];

  // Timer B2
  ControlB2 = Msp430TimerB2.Control;
  CompareB2 = Msp430TimerB2.Compare;
  CaptureB2 = Msp430TimerB2.Capture;
  Msp430TimerB2.Timer -> Msp430TimerB.Timer;
  Msp430TimerB2.Event -> Msp430TimerB.Event[2];

  // Timer B3
  ControlB3 = Msp430TimerB3.Control;
  CompareB3 = Msp430TimerB3.Compare;
  CaptureB3 = Msp430TimerB3.Capture;
  Msp430TimerB3.Timer -> Msp430TimerB.Timer;
  Msp430TimerB3.Event -> Msp430TimerB.Event[3];

  // Timer B4
  ControlB4 = Msp430TimerB4.Control;
  CompareB4 = Msp430TimerB4.Compare;
  CaptureB4 = Msp430TimerB4.Capture;
  Msp430TimerB4.Timer -> Msp430TimerB.Timer;
  Msp430TimerB4.Event -> Msp430TimerB.Event[4];

  // Timer B5
  ControlB5 = Msp430TimerB5.Control;
  CompareB5 = Msp430TimerB5.Compare;
  CaptureB5 = Msp430TimerB5.Capture;
  Msp430TimerB5.Timer -> Msp430TimerB.Timer;
  Msp430TimerB5.Event -> Msp430TimerB.Event[5];

  // Timer B6
  ControlB6 = Msp430TimerB6.Control;
  CompareB6 = Msp430TimerB6.Compare;
  CaptureB6 = Msp430TimerB6.Capture;
  Msp430TimerB6.Timer -> Msp430TimerB.Timer;
  Msp430TimerB6.Event -> Msp430TimerB.Event[6];
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/Msp430TimerMicroMapC.nc000066400000000000000000000043721207233610700276260ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 /**
 Configure the timer subsystem such that TimerA=ACLK (32kHz) and 
 TimerB=SMCLK/4 (1MHz).
 */
 
configuration Msp430TimerMicroMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
  Msp430Compare[0] = Msp430TimerC.CompareB0;

  // Timer B1 is used for SFD capture on the CC2420 radio

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB2;
  Msp430Compare[1] = Msp430TimerC.CompareB2;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB3;
  Msp430Compare[2] = Msp430TimerC.CompareB3;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB4;
  Msp430Compare[3] = Msp430TimerC.CompareB4;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB5;
  Msp430Compare[4] = Msp430TimerC.CompareB5;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB6;
  Msp430Compare[5] = Msp430TimerC.CompareB6;
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/RadioConfig.h000066400000000000000000000042571207233610700261210ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include 
//#include 

/* This is the default value of the PA_POWER field of the TXCTL register. */
#ifndef CC2420X_DEF_RFPOWER
#define CC2420X_DEF_RFPOWER	0
#endif

/* This is the default value of the CHANNEL field of the FSCTRL register. */
#ifndef CC2420X_DEF_CHANNEL
#define CC2420X_DEF_CHANNEL	11
#endif

/* The number of microseconds a sending micaz mote will wait for an acknowledgement */
#ifndef SOFTWAREACK_TIMEOUT
#define SOFTWAREACK_TIMEOUT	800
#endif

/**
 * This is the timer type of the radio alarm interface
 */
typedef TMicro TRadio;
typedef uint16_t tradio_size;

/**
 * The number of radio alarm ticks per one microsecond (0.9216).
 * We use integers and no parentheses just to make deputy happy.
 * Ok, further hacks were required for deputy, I removed 00 from the
 * beginning and end to be able to handle longer wait periods.
 */
#define RADIO_ALARM_MICROSEC	1

/**
 * The base two logarithm of the number of radio alarm ticks per one millisecond
 */
#define RADIO_ALARM_MILLI_EXP	10

#endif//__RADIOCONFIG_H__
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/am/000077500000000000000000000000001207233610700241515ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/am/ActiveMessageC.nc000066400000000000000000000040151207233610700273160ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 
#include 

configuration ActiveMessageC
{
	provides
	{
		interface SplitControl;

		interface AMSend[uint8_t id];
		interface Receive[uint8_t id];
		interface Receive as Snoop[uint8_t id];
		interface SendNotifier[am_id_t id];

		interface Packet;
		interface AMPacket;

		interface PacketAcknowledgements;
		interface LowPowerListening;
		interface PacketLink;
		interface RadioChannel;

		interface PacketTimeStamp as PacketTimeStampMicro;
		interface PacketTimeStamp as PacketTimeStampMilli;
	}
}

implementation
{
	components CC2420XActiveMessageC as MessageC;

	SplitControl = MessageC;

	AMSend = MessageC;
	Receive = MessageC.Receive;
	Snoop = MessageC.Snoop;
	SendNotifier = MessageC;

	Packet = MessageC;
	AMPacket = MessageC;

	PacketAcknowledgements = MessageC;
	LowPowerListening = MessageC;
	PacketLink = MessageC;
	RadioChannel = MessageC;

	PacketTimeStampMilli = MessageC;
	PacketTimeStampMicro = MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/cc2420x/tmicro/am/TimeSyncMessageC.nc000066400000000000000000000042571207233610700276460ustar00rootroot00000000000000/*
 * Copyright (c) 2011, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Janos Sallai
 */ 
 
 
#include 

configuration TimeSyncMessageC
{
	provides
	{
		interface SplitControl;

		interface Receive[uint8_t id];
		interface Receive as Snoop[am_id_t id];
		interface Packet;
		interface AMPacket;

		interface PacketTimeStamp as PacketTimeStampRadio;
		interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketRadio;

		interface PacketTimeStamp as PacketTimeStampMilli;
		interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketMilli;

		interface LowPowerListening;

	}
}

implementation
{
	components CC2420XTimeSyncMessageC as MessageC;
  
	SplitControl	= MessageC;
  	Receive		= MessageC.Receive;
	Snoop		= MessageC.Snoop;
	Packet		= MessageC;
	AMPacket	= MessageC;

	PacketTimeStampRadio	= MessageC;
	TimeSyncAMSendRadio	= MessageC;
	TimeSyncPacketRadio	= MessageC;

	PacketTimeStampMilli	= MessageC;
	TimeSyncAMSendMilli	= MessageC;
	TimeSyncPacketMilli	= MessageC;

	LowPowerListening       = MessageC;

}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/s1087/000077500000000000000000000000001207233610700217545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc000066400000000000000000000044461207233610700254370ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HamamatsuS1087ParC is a driver for a photosynthetically-active
 * radiation sensor available on the telosb platform. 
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
 */

generic configuration HamamatsuS1087ParC() {
  provides interface DeviceMetadata;
  provides interface Read;
  provides interface ReadStream;
}
implementation {
  components new AdcReadClientC();
  Read = AdcReadClientC;

  components new AdcReadStreamClientC();
  ReadStream = AdcReadStreamClientC;

  components HamamatsuS1087ParP;
  DeviceMetadata = HamamatsuS1087ParP;
  AdcReadClientC.AdcConfigure -> HamamatsuS1087ParP;
  AdcReadStreamClientC.AdcConfigure -> HamamatsuS1087ParP;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc000066400000000000000000000047211207233610700254500ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

#include "Msp430Adc12.h"

/**
 * HamamatsuS1087ParP is a driver for a photosynthetically-active
 * radiation sensor available on the telosb platform. 
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
 */

module HamamatsuS1087ParP {
  provides interface DeviceMetadata;
  provides interface AdcConfigure;
}
implementation {

  msp430adc12_channel_config_t config = {
    inch: INPUT_CHANNEL_A4,
    sref: REFERENCE_VREFplus_AVss,
    ref2_5v: REFVOLT_LEVEL_1_5,
    adc12ssel: SHT_SOURCE_ACLK,
    adc12div: SHT_CLOCK_DIV_1,
    sht: SAMPLE_HOLD_4_CYCLES,
    sampcon_ssel: SAMPCON_SOURCE_SMCLK,
    sampcon_id: SAMPCON_CLOCK_DIV_1
  };

  command uint8_t DeviceMetadata.getSignificantBits() { return 12; }

  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() {
    return &config;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/s10871/000077500000000000000000000000001207233610700220355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrC.nc000066400000000000000000000044351207233610700256250ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HamamatsuS10871TsrC is a driver for a total solar radiation sensor
 * available on the telosb platform.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
 */

generic configuration HamamatsuS10871TsrC() {
  provides interface DeviceMetadata;
  provides interface Read;
  provides interface ReadStream;
}
implementation {
  components new AdcReadClientC();
  Read = AdcReadClientC;

  components new AdcReadStreamClientC();
  ReadStream = AdcReadStreamClientC;

  components HamamatsuS10871TsrP;
  DeviceMetadata = HamamatsuS10871TsrP;
  AdcReadClientC.AdcConfigure -> HamamatsuS10871TsrP;
  AdcReadStreamClientC.AdcConfigure -> HamamatsuS10871TsrP;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrP.nc000066400000000000000000000047251207233610700256440ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

#include "Msp430Adc12.h"

/**
 * HamamatsuS10871TsrP is a driver for a photosynthetically-active
 * radiation sensor available on the telosb platform. 
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
 */

module HamamatsuS10871TsrP {
  provides interface DeviceMetadata;
  provides interface AdcConfigure;
}
implementation {

  msp430adc12_channel_config_t config = {
    inch: INPUT_CHANNEL_A5,
    sref: REFERENCE_VREFplus_AVss,
    ref2_5v: REFVOLT_LEVEL_1_5,
    adc12ssel: SHT_SOURCE_ACLK,
    adc12div: SHT_CLOCK_DIV_1,
    sht: SAMPLE_HOLD_4_CYCLES,
    sampcon_ssel: SAMPCON_SOURCE_SMCLK,
    sampcon_id: SAMPCON_CLOCK_DIV_1
  };

  command uint8_t DeviceMetadata.getSignificantBits() { return 12; }
  
  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() {
    return &config;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/sht11/000077500000000000000000000000001207233610700221325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc000066400000000000000000000051461207233610700260040ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HalSensirionSht11C is an advanced access component for the
 * Sensirion SHT11 model humidity and temperature sensor, available on
 * the telosb platform. This component provides the SensirionSht11
 * interface, which offers full control over the device. Please
 * acquire the Resource before using it.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

configuration HalSensirionSht11C {
  provides interface Resource[ uint8_t client ];
  provides interface SensirionSht11[ uint8_t client ];
}
implementation {
  components new SensirionSht11LogicP();
  SensirionSht11 = SensirionSht11LogicP;

  components HplSensirionSht11C;
  Resource = HplSensirionSht11C.Resource;
  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
  SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
  
  components new TimerMilliC();
  SensirionSht11LogicP.Timer -> TimerMilliC;

  components LedsC;
  SensirionSht11LogicP.Leds -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc000066400000000000000000000063501207233610700260210ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HplSensirionSht11C is a low-level component, intended to provide
 * the physical resources used by the Sensirion SHT11 sensor on the
 * telosb platform so that the chip driver can make use of them. You
 * really shouldn't be wiring to this, unless you're writing a new
 * Sensirion SHT11 driver.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.6 $ $Date: 2007-02-04 19:56:29 $
 */

configuration HplSensirionSht11C {
  provides interface Resource[ uint8_t id ];
  provides interface GeneralIO as DATA;
  provides interface GeneralIO as SCK;
  provides interface GpioInterrupt as InterruptDATA;
}
implementation {
  components HplMsp430GeneralIOC;
  
  components new Msp430GpioC() as DATAM;
  components new Msp430GpioC() as SCKM;
  components new Msp430GpioC() as PWRM;

  DATAM -> HplMsp430GeneralIOC.Port15;
  SCKM -> HplMsp430GeneralIOC.Port16;
  PWRM -> HplMsp430GeneralIOC.Port17;

  DATA = DATAM;
  SCK = SCKM;

  components HplSensirionSht11P;
  HplSensirionSht11P.PWR -> PWRM;
  HplSensirionSht11P.DATA -> DATAM;
  HplSensirionSht11P.SCK -> SCKM;

  components new TimerMilliC();
  HplSensirionSht11P.Timer -> TimerMilliC;

  components HplMsp430InterruptC;
  components new Msp430InterruptC() as InterruptDATAC;
  InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port15;
  InterruptDATA = InterruptDATAC.Interrupt;

  components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
  Resource = Arbiter;
  
  components new SplitControlPowerManagerC();
  SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P;
  SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
  SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc000066400000000000000000000050631207233610700260360ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

#include "Timer.h"

/**
 * HplSensirionSht11P is a low-level component that controls power for
 * the Sensirion SHT11 sensor on the telosb platform.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

module HplSensirionSht11P {
  provides interface SplitControl;
  uses interface Timer;
  uses interface GeneralIO as PWR;
  uses interface GeneralIO as DATA;
  uses interface GeneralIO as SCK;
}
implementation {
  task void stopTask();

  command error_t SplitControl.start() {
    call PWR.makeOutput();
    call PWR.set();
    call Timer.startOneShot( 11 );
    return SUCCESS;
  }
  
  event void Timer.fired() {
    signal SplitControl.startDone( SUCCESS );
  }

  command error_t SplitControl.stop() {
    call SCK.makeInput();
    call SCK.clr();
    call DATA.makeInput();
    call DATA.clr();
    call PWR.clr();
    post stopTask();
    return SUCCESS;
  }

  task void stopTask() {
    signal SplitControl.stopDone( SUCCESS );
  }
}

tinyos-2.1.2+dfsg/tos/platforms/telosa/chips/sht11/SensirionSht11C.nc000066400000000000000000000061011207233610700253470ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * SensirionSht11C is a top-level access component for the Sensirion
 * SHT11 model humidity and temperature sensor, available on the
 * telosb platform. Because this component represents one physical
 * device, simultaneous calls to read temperature and humidity will be
 * arbitrated and executed in sequential order. Feel free to read both
 * at the same time, just be aware that they'll come back
 * sequentially.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
 */

generic configuration SensirionSht11C() {
  provides interface Read as Temperature;
  provides interface DeviceMetadata as TemperatureMetadata;
  provides interface Read as Humidity;
  provides interface DeviceMetadata as HumidityMetadata;
}
implementation {
  components new SensirionSht11ReaderP();

  Temperature = SensirionSht11ReaderP.Temperature;
  TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata;
  Humidity = SensirionSht11ReaderP.Humidity;
  HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata;

  components HalSensirionSht11C;

  enum { TEMP_KEY = unique("Sht11.Resource") };
  enum { HUM_KEY = unique("Sht11.Resource") };

  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
}
tinyos-2.1.2+dfsg/tos/platforms/telosa/hardware.h000066400000000000000000000045471207233610700220440ustar00rootroot00000000000000#ifndef _H_hardware_h
#define _H_hardware_h


#include "msp430hardware.h"

// enum so components can override power saving,
// as per TEP 112.
enum {
  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
};

// LEDs
TOSH_ASSIGN_PIN(RED_LED, 5, 4);
TOSH_ASSIGN_PIN(GREEN_LED, 5, 5);
TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6);

// CC2420 RADIO #defines
TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2);
TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5);
TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6);
TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1);
TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3);
TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3);
TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4);
TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4);

TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
TOSH_ASSIGN_PIN(CC_FIFO, 1, 3);
TOSH_ASSIGN_PIN(CC_SFD, 4, 1);
TOSH_ASSIGN_PIN(CC_VREN, 4, 5);
TOSH_ASSIGN_PIN(CC_RSTN, 4, 6);

// UART pins
TOSH_ASSIGN_PIN(SOMI0, 3, 2);
TOSH_ASSIGN_PIN(SIMO0, 3, 1);
TOSH_ASSIGN_PIN(UCLK0, 3, 3);
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);
TOSH_ASSIGN_PIN(UTXD1, 3, 6);
TOSH_ASSIGN_PIN(URXD1, 3, 7);
TOSH_ASSIGN_PIN(UCLK1, 5, 3);
TOSH_ASSIGN_PIN(SOMI1, 5, 2);
TOSH_ASSIGN_PIN(SIMO1, 5, 1);

// ADC
TOSH_ASSIGN_PIN(ADC0, 6, 0);
TOSH_ASSIGN_PIN(ADC1, 6, 1);
TOSH_ASSIGN_PIN(ADC2, 6, 2);
TOSH_ASSIGN_PIN(ADC3, 6, 3);

// HUMIDITY
TOSH_ASSIGN_PIN(HUM_SDA, 1, 5);
TOSH_ASSIGN_PIN(HUM_SCL, 1, 6);
TOSH_ASSIGN_PIN(HUM_PWR, 1, 7);

// GIO pins
TOSH_ASSIGN_PIN(GIO0, 2, 0);
TOSH_ASSIGN_PIN(GIO1, 2, 1);

void HUMIDITY_MAKE_CLOCK_OUTPUT() { TOSH_MAKE_HUM_SCL_OUTPUT(); }
void HUMIDITY_MAKE_CLOCK_INPUT() { TOSH_MAKE_HUM_SCL_INPUT(); }
void HUMIDITY_CLEAR_CLOCK() { TOSH_CLR_HUM_SCL_PIN(); }
void HUMIDITY_SET_CLOCK() { TOSH_SET_HUM_SCL_PIN(); }
void HUMIDITY_MAKE_DATA_OUTPUT() { TOSH_MAKE_HUM_SDA_OUTPUT(); }
void HUMIDITY_MAKE_DATA_INPUT() { TOSH_MAKE_HUM_SDA_INPUT(); }
void HUMIDITY_CLEAR_DATA() { TOSH_CLR_HUM_SDA_PIN(); }
void HUMIDITY_SET_DATA() { TOSH_SET_HUM_SDA_PIN(); }
char HUMIDITY_GET_DATA() { return TOSH_READ_HUM_SDA_PIN(); }

#define HUMIDITY_TIMEOUT_MS          30
#define HUMIDITY_TIMEOUT_TRIES       20

enum {
  // Sensirion Humidity addresses and commands
  TOSH_HUMIDITY_ADDR = 5,
  TOSH_HUMIDTEMP_ADDR = 3,
  TOSH_HUMIDITY_RESET = 0x1E
};

// FLASH
TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
TOSH_ASSIGN_PIN(FLASH_CS, 4, 4);

// PROGRAMMING PINS (tri-state)
//TOSH_ASSIGN_PIN(TCK, );
TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
TOSH_ASSIGN_PIN(PROG_TX, 2, 2);

#endif // _H_hardware_h

tinyos-2.1.2+dfsg/tos/platforms/telosa/platform.h000066400000000000000000000000001207233610700220470ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosa/platform_message.h000066400000000000000000000051301207233610700235640ustar00rootroot00000000000000/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:55 scipio Exp $
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * Defining the platform-independently named packet structures to be the
 * chip-specific CC1000 packet structures.
 *
 * @author Philip Levis
 * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:55 $
 */


#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 
#include 

typedef union message_header {
  cc2420_header_t cc2420;
  serial_header_t serial;
} message_header_t;

typedef union TOSRadioFooter {
  cc2420_footer_t cc2420;
} message_footer_t;

typedef union TOSRadioMetadata {
  cc2420_metadata_t cc2420;
  serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/telosb/000077500000000000000000000000001207233610700200655ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosb/.platform000066400000000000000000000036751207233610700217250ustar00rootroot00000000000000# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.

push( @includes, qw(

  %T/platforms/telosb
  %T/platforms/telosb/chips/stm25p
  %T/platforms/telosa
  %T/platforms/telosa/chips/cc2420
  %T/platforms/telosa/chips/s1087
  %T/platforms/telosa/chips/s10871
  %T/platforms/telosa/chips/sht11
  %T/platforms/epic/chips/ds2411
  %T/chips/cc2420
  %T/chips/cc2420/alarm
  %T/chips/cc2420/control
  %T/chips/cc2420/csma
  %T/chips/cc2420/interfaces
  %T/chips/cc2420/link
  %T/chips/cc2420/lowpan
  %T/chips/cc2420/lpl
  %T/chips/cc2420/packet
  %T/chips/cc2420/receive
  %T/chips/cc2420/spi
  %T/chips/cc2420/transmit
  %T/chips/cc2420/unique
  %T/chips/cc2420/security
  %T/chips/msp430
  %T/chips/msp430/adc12
  %T/chips/msp430/dma
  %T/chips/msp430/pins
  %T/chips/msp430/timer
  %T/chips/msp430/usart
  %T/chips/msp430/sensors
  %T/chips/stm25p
  %T/chips/sht11
  %T/chips/ds2401
  %T/lib/timer
  %T/lib/serial
  %T/lib/adc
  %T/lib/power
) );

@opts = qw(

  -gcc=msp430-gcc
  -mmcu=msp430f1611
  -fnesc-target=msp430
  -fnesc-no-debug
);

push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

$ENV{'CIL_MACHINE'} =
    "version_major=3 " .
    "version_minor=2 " .
    "version=msp430-3.2.3 " .
    "short=2,2 " .
    "int=2,2 " .
    "long=4,2 " .
    "long_long=8,2 " .
    "pointer=2,2 " .
    "enum=2,2 " .
    "float=4,2 " .
    "double=4,2 " .
    "long_double=4,2 " .
    "void=1,1 " .
    "fun=1,2 " .
    "wchar_size_size=2,2 " .
    "alignof_string=1 " .
    "max_alignment=1 " .
    "char_wchar_signed=true,true " .
    "const_string_literals=true " .
    "big_endian=false " .
    "underscore_name=false " .
    "__builtin_va_list=true " .
    "__thread_is_keyword=true";

tinyos-2.1.2+dfsg/tos/platforms/telosb/DemoSensorC.nc000066400000000000000000000044241207233610700225740ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorC on the telosb platform provides a
 * voltage reading, using VoltageC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 * 
 */

generic configuration DemoSensorC()
{
  provides interface Read;
}
implementation
{
  components new VoltageC() as DemoSensor;
  Read = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/DemoSensorNowC.nc000066400000000000000000000046341207233610700232630ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorNowC is a generic sensor device that provides a 16-bit
 * value that can be read from async context. The platform author
 * chooses which sensor actually sits behind DemoSensorNowC, and
 * though it's probably Voltage, Light, or Temperature, there are no
 * guarantees.
 *
 * This particular DemoSensorNowC on the telosb platform provides a
 * voltage reading, using VoltageC.
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 * 
 */

generic configuration DemoSensorNowC()
{
  provides interface Resource;
  provides interface ReadNow;
}
implementation
{
  components new Msp430InternalVoltageC() as DemoSensorNow;

  Resource = DemoSensorNow;
  ReadNow = DemoSensorNow;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/DemoSensorStreamC.nc000066400000000000000000000045041207233610700237470ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorStreamC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorStreamC on the telosb platform provides a
 * voltage reading, using VoltageStreamC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 * 
 */

generic configuration DemoSensorStreamC()
{
  provides interface ReadStream;
}
implementation
{
  components new VoltageStreamC() as DemoSensor;
  ReadStream = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/HplUserButtonC.nc000066400000000000000000000042761207233610700233010ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telos platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

configuration HplUserButtonC {
  provides interface GeneralIO;
  provides interface GpioInterrupt;
}
implementation {
  components HplMsp430GeneralIOC as GeneralIOC;
  components HplMsp430InterruptC as InterruptC;

  components new Msp430GpioC() as UserButtonC;
  UserButtonC -> GeneralIOC.Port27;
  GeneralIO = UserButtonC;

  components new Msp430InterruptC() as InterruptUserButtonC;
  InterruptUserButtonC.HplInterrupt -> InterruptC.Port27;
  GpioInterrupt = InterruptUserButtonC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/MoteClockC.nc000066400000000000000000000036451207233610700224020ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universität Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $Id: MoteClockC.nc,v 1.1 2007-07-10 00:24:31 vlahan Exp $
 *
 */
 
 /**
 * @author Vlado Handziski 
 */
 
configuration MoteClockC
{
  provides interface Init as MoteClockInit;
}
implementation

{
  components Msp430ClockC, MoteClockP;
  
  MoteClockInit = Msp430ClockC.Init;
  //MoteClockP.Msp430ClockInit -> Msp430ClockC;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/MoteClockP.nc000066400000000000000000000070161207233610700224130ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universität Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * $Id: MoteClockP.nc,v 1.1 2007-07-10 00:24:31 vlahan Exp $
 *
 */
 
  /**
 * @author Vlado Handziski 
 * @author Cory Sharp 
 */
 
module MoteClockP {
  uses interface Msp430ClockInit;
}

implementation {

  event void Msp430ClockInit.setupDcoCalibrate()
  {
  
    // --- setup ---

    TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
    TBCTL = TBSSEL0 | MC1;
    BCSCTL1 = XT2OFF | RSEL2;
    BCSCTL2 = DCOR; // enable DCOR
    TBCCTL0 = CM0;
   }
    
  event void Msp430ClockInit.initClocks()
  {
    // BCSCTL1
    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
    // .XTS = 0; set low frequency mode for LXFT1
    // .DIVA = 0; set the divisor on ACLK to 1
    // .RSEL, do not modify
    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));

    // BCSCTL2
    // .SELM = 0; select DCOCLK as source for MCLK
    // .DIVM = 0; set the divisor of MCLK to 1
    // .SELS = 0; select DCOCLK as source for SCLK
    // .DIVS = 2; set the divisor of SCLK to 4
    // .DCOR = 1; select internal resistor for DCO
    BCSCTL2 = DIVS1 | DCOR;

    // IE1.OFIE = 0; no interrupt for oscillator fault
    CLR_FLAG( IE1, OFIE );
  }

  event void Msp430ClockInit.initTimerA()
  {
    TAR = 0;

    // TACTL
    // .TACLGRP = 0; each TACL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TASSEL = 2; source SMCLK = DCO/4
    // .ID = 0; input divisor of 1
    // .MC = 0; initially disabled
    // .TACLR = 0; reset timer A
    // .TAIE = 1; enable timer A interrupts
    TACTL = TASSEL1 | TAIE;
  }

  event void Msp430ClockInit.initTimerB()
  {
    TBR = 0;

    // TBCTL
    // .TBCLGRP = 0; each TBCL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TBSSEL = 1; source ACLK
    // .ID = 0; input divisor of 1
    // .MC = 0; initially disabled
    // .TBCLR = 0; reset timer B
    // .TBIE = 1; enable timer B interrupts
    TBCTL = TBSSEL0 | TBIE;
  }
 
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/MotePlatformC.nc000066400000000000000000000037111207233610700231250ustar00rootroot00000000000000module MotePlatformC @safe() {
  provides interface Init;
}
implementation {

  inline void uwait(uint16_t u) { 
    uint16_t t0 = TAR;
    while((TAR - t0) <= u);
  } 

  inline void TOSH_wait() {
    nop(); nop();
  }

  // send a bit via bit-banging to the flash
  void TOSH_FLASH_M25P_DP_bit(bool set) {
    if (set)
      TOSH_SET_SIMO0_PIN();
    else
      TOSH_CLR_SIMO0_PIN();
    TOSH_SET_UCLK0_PIN();
    TOSH_CLR_UCLK0_PIN();
  }

  // put the flash into deep sleep mode
  // important to do this by default
  void TOSH_FLASH_M25P_DP() {
    //  SIMO0, UCLK0
    TOSH_MAKE_SIMO0_OUTPUT();
    TOSH_MAKE_UCLK0_OUTPUT();
    TOSH_MAKE_FLASH_HOLD_OUTPUT();
    TOSH_MAKE_FLASH_CS_OUTPUT();
    TOSH_SET_FLASH_HOLD_PIN();
    TOSH_SET_FLASH_CS_PIN();

    TOSH_wait();

    // initiate sequence;
    TOSH_CLR_FLASH_CS_PIN();
    TOSH_CLR_UCLK0_PIN();
  
    TOSH_FLASH_M25P_DP_bit(TRUE);   // 0
    TOSH_FLASH_M25P_DP_bit(FALSE);  // 1
    TOSH_FLASH_M25P_DP_bit(TRUE);   // 2
    TOSH_FLASH_M25P_DP_bit(TRUE);   // 3
    TOSH_FLASH_M25P_DP_bit(TRUE);   // 4
    TOSH_FLASH_M25P_DP_bit(FALSE);  // 5
    TOSH_FLASH_M25P_DP_bit(FALSE);  // 6
    TOSH_FLASH_M25P_DP_bit(TRUE);   // 7

    TOSH_SET_FLASH_CS_PIN();
    TOSH_SET_UCLK0_PIN();
    TOSH_SET_SIMO0_PIN();
  }

  command error_t Init.init() {
    // reset all of the ports to be input and using i/o functionality
    atomic
      {
	P1SEL = 0;
	P2SEL = 0;
	P3SEL = 0;
	P4SEL = 0;
	P5SEL = 0;
	P6SEL = 0;

	P1OUT = 0x00;
	P1DIR = 0xe0;
 
	P2OUT = 0x30;
	P2DIR = 0x7b;

	P3OUT = 0x00;
	P3DIR = 0xf1;

	P4OUT = 0xdd;
	P4DIR = 0xfd;

	P5OUT = 0xff;
	P5DIR = 0xff;

	P6OUT = 0x00;
	P6DIR = 0xff;

	P1IE = 0;
	P2IE = 0;

	// the commands above take care of the pin directions
	// there is no longer a need for explicit set pin
	// directions using the TOSH_SET/CLR macros

	// wait 10ms for the flash to startup
	uwait(1024*10);
	// Put the flash in deep sleep state
	TOSH_FLASH_M25P_DP();

      }//atomic
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/SwitchToggleC.nc000066400000000000000000000053651207233610700231260ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Generic layer to translate a GIO into a toggle switch
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

#include 

generic module SwitchToggleC() {
  provides interface Get;
  provides interface Notify;

  uses interface GeneralIO;
  uses interface GpioInterrupt;
}
implementation {
  norace bool m_pinHigh;

  task void sendEvent();

  command bool Get.get() { return call GeneralIO.get(); }

  command error_t Notify.enable() {
    call GeneralIO.makeInput();

    if ( call GeneralIO.get() ) {
      m_pinHigh = TRUE;
      return call GpioInterrupt.enableFallingEdge();
    } else {
      m_pinHigh = FALSE;
      return call GpioInterrupt.enableRisingEdge();
    }
  }

  command error_t Notify.disable() {
    return call GpioInterrupt.disable();
  }

  async event void GpioInterrupt.fired() {
    call GpioInterrupt.disable();

    m_pinHigh = !m_pinHigh;

    post sendEvent();
  }

  task void sendEvent() {
    bool pinHigh;
    pinHigh = m_pinHigh;
    
    signal Notify.notify( pinHigh );
    
    if ( pinHigh ) {
      call GpioInterrupt.enableFallingEdge();
    } else {
      call GpioInterrupt.enableRisingEdge();
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/UserButton.h000066400000000000000000000035121207233610700223510ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

#ifndef USERBUTTON_H
#define USERBUTTON_H

typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/telosb/UserButtonC.nc000066400000000000000000000050431207233610700226260ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform. Get
 * returns the current state of the button by reading the pin,
 * regardless of whether enable() or disable() has been called on the
 * Interface. Notify.enable() and Notify.disable() modify the
 * underlying interrupt state of the pin, and have the effect of
 * enabling or disabling notifications that the button has changed
 * state.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

#include 

configuration UserButtonC {
  provides interface Get;
  provides interface Notify;
}
implementation {
  components HplUserButtonC;
  components new SwitchToggleC();
  SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
  SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO;

  components UserButtonP;
  Get = UserButtonP;
  Notify = UserButtonP;

  UserButtonP.GetLower -> SwitchToggleC.Get;
  UserButtonP.NotifyLower -> SwitchToggleC.Notify;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/UserButtonP.nc000066400000000000000000000051651207233610700226500ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $
 */

#include 

module UserButtonP {
  provides interface Get;
  provides interface Notify;

  uses interface Get as GetLower;
  uses interface Notify as NotifyLower;
}
implementation {
  
  command button_state_t Get.get() { 
    // telosb user button pin is high when released - invert state
    if ( call GetLower.get() ) {
      return BUTTON_RELEASED;
    } else {
      return BUTTON_PRESSED;
    }
  }

  command error_t Notify.enable() {
    return call NotifyLower.enable();
  }

  command error_t Notify.disable() {
    return call NotifyLower.disable();
  }

  event void NotifyLower.notify( bool val ) {
    // telosb user button pin is high when released - invert state
    if ( val ) {
      signal Notify.notify( BUTTON_RELEASED );
    } else {
      signal Notify.notify( BUTTON_PRESSED );
    }
  }
  
  default event void Notify.notify( button_state_t val ) { }
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/VoltageC.nc000066400000000000000000000040521207233610700221140ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * VoltageC is a common name for the Msp430InternalVoltageC voltage
 * sensor available on the telosb platform.
 *
 * To convert from ADC counts to actual voltage, divide by 4096 and
 * multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

generic configuration VoltageC() {
  provides interface Read;
}
implementation {
  components new Msp430InternalVoltageC();
  Read = Msp430InternalVoltageC.Read;
}

tinyos-2.1.2+dfsg/tos/platforms/telosb/VoltageStreamC.nc000066400000000000000000000041021207233610700232640ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * VoltageC is a common name for the Msp430InternalVoltageC voltage
 * sensor available on the telosb platform.
 *
 * To convert from ADC counts to actual voltage, divide by 4096 and
 * multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

generic configuration VoltageStreamC() {
  provides interface ReadStream;
}
implementation {
  components new Msp430InternalVoltageC();
  ReadStream = Msp430InternalVoltageC.ReadStream;
}

tinyos-2.1.2+dfsg/tos/platforms/telosb/chips/000077500000000000000000000000001207233610700211735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosb/chips/stm25p/000077500000000000000000000000001207233610700223255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosb/chips/stm25p/HplStm25pPinsC.nc000066400000000000000000000041721207233610700253460ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for a ST M25P chip
 * connected to a TI MSP430.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

configuration HplStm25pPinsC {

  provides interface GeneralIO as CSN;
  provides interface GeneralIO as Hold;

}

implementation {

  components HplMsp430GeneralIOC as HplGeneralIOC;
  components new Msp430GpioC() as CSNM;
  components new Msp430GpioC() as HoldM;

  CSNM -> HplGeneralIOC.Port44;
  HoldM -> HplGeneralIOC.Port47;

  CSN = CSNM;
  Hold = HoldM;

}
tinyos-2.1.2+dfsg/tos/platforms/telosb/chips/stm25p/HplStm25pSpiC.nc000066400000000000000000000037731207233610700251760ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the Spi bus for a ST M25P chip connected to a
 * TI MSP430.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

configuration HplStm25pSpiC {

  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;

}

implementation {

  components new Msp430Spi0C() as SpiC;
  Resource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;

}
tinyos-2.1.2+dfsg/tos/platforms/telosb/hardware.h000066400000000000000000000052161207233610700220370ustar00rootroot00000000000000#ifndef _H_hardware_h
#define _H_hardware_h

#include "msp430hardware.h"

// enum so components can override power saving,
// as per TEP 112.
enum {
  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
};

// LEDs
TOSH_ASSIGN_PIN(RED_LED, 5, 4);
TOSH_ASSIGN_PIN(GREEN_LED, 5, 5);
TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6);

// CC2420 RADIO #defines
TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2);
TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5);
TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6);
TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1);
TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3);
TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3);
TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4);
TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4);

TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
TOSH_ASSIGN_PIN(CC_FIFO, 1, 3);
TOSH_ASSIGN_PIN(CC_SFD, 4, 1);
TOSH_ASSIGN_PIN(CC_VREN, 4, 5);
TOSH_ASSIGN_PIN(CC_RSTN, 4, 6);

// UART pins
TOSH_ASSIGN_PIN(SOMI0, 3, 2);
TOSH_ASSIGN_PIN(SIMO0, 3, 1);
TOSH_ASSIGN_PIN(UCLK0, 3, 3);
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);
TOSH_ASSIGN_PIN(UTXD1, 3, 6);
TOSH_ASSIGN_PIN(URXD1, 3, 7);
TOSH_ASSIGN_PIN(UCLK1, 5, 3);
TOSH_ASSIGN_PIN(SOMI1, 5, 2);
TOSH_ASSIGN_PIN(SIMO1, 5, 1);

// ADC
TOSH_ASSIGN_PIN(ADC0, 6, 0);
TOSH_ASSIGN_PIN(ADC1, 6, 1);
TOSH_ASSIGN_PIN(ADC2, 6, 2);
TOSH_ASSIGN_PIN(ADC3, 6, 3);

// HUMIDITY
TOSH_ASSIGN_PIN(HUM_SDA, 1, 5);
TOSH_ASSIGN_PIN(HUM_SCL, 1, 6);
TOSH_ASSIGN_PIN(HUM_PWR, 1, 7);

// GIO pins
TOSH_ASSIGN_PIN(GIO0, 2, 0);
TOSH_ASSIGN_PIN(GIO1, 2, 1);
TOSH_ASSIGN_PIN(GIO2, 2, 3);
TOSH_ASSIGN_PIN(GIO3, 2, 6);

// 1-Wire
TOSH_ASSIGN_PIN(ONEWIRE, 2, 4);

void HUMIDITY_MAKE_CLOCK_OUTPUT() @safe() { TOSH_MAKE_HUM_SCL_OUTPUT(); }
void HUMIDITY_MAKE_CLOCK_INPUT() @safe() { TOSH_MAKE_HUM_SCL_INPUT(); }
void HUMIDITY_CLEAR_CLOCK() @safe() { TOSH_CLR_HUM_SCL_PIN(); }
void HUMIDITY_SET_CLOCK() @safe() { TOSH_SET_HUM_SCL_PIN(); }
void HUMIDITY_MAKE_DATA_OUTPUT() @safe() { TOSH_MAKE_HUM_SDA_OUTPUT(); }
void HUMIDITY_MAKE_DATA_INPUT() @safe() { TOSH_MAKE_HUM_SDA_INPUT(); }
void HUMIDITY_CLEAR_DATA() @safe() { TOSH_CLR_HUM_SDA_PIN(); }
void HUMIDITY_SET_DATA() @safe() { TOSH_SET_HUM_SDA_PIN(); }
char HUMIDITY_GET_DATA() @safe() { return TOSH_READ_HUM_SDA_PIN(); }

#define HUMIDITY_TIMEOUT_MS          30
#define HUMIDITY_TIMEOUT_TRIES       20

enum {
  // Sensirion Humidity addresses and commands
  TOSH_HUMIDITY_ADDR = 5,
  TOSH_HUMIDTEMP_ADDR = 3,
  TOSH_HUMIDITY_RESET = 0x1E
};

// FLASH
TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
TOSH_ASSIGN_PIN(FLASH_CS, 4, 4);
TOSH_ASSIGN_PIN(FLASH_HOLD, 4, 7);

// PROGRAMMING PINS (tri-state)
//TOSH_ASSIGN_PIN(TCK, );
TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
TOSH_ASSIGN_PIN(PROG_TX, 2, 2);

// need to undef atomic inside header files or nesC ignores the directive
#undef atomic

#endif // _H_hardware_h
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/000077500000000000000000000000001207233610700206255ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/000077500000000000000000000000001207233610700216535ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/Ieee802154BeaconEnabledC.nc000066400000000000000000000140471207233610700262240ustar00rootroot00000000000000/*
 * Copyright (c) 2008, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names 
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author: Jan Hauer 
 */
#include "TKN154.h"
configuration Ieee802154BeaconEnabledC
{
  provides
  {
    // MCPS-SAP
    interface MCPS_DATA;
    interface MCPS_PURGE;

    // MLME-SAP
    interface MLME_ASSOCIATE;
    interface MLME_BEACON_NOTIFY;
    interface MLME_COMM_STATUS;
    interface MLME_DISASSOCIATE;
    interface MLME_GET;
    interface MLME_GTS;
    interface MLME_ORPHAN;
    interface MLME_POLL;
    interface MLME_RESET;
    interface MLME_RX_ENABLE;
    interface MLME_SCAN;
    interface MLME_SET;
    interface MLME_START;
    interface MLME_SYNC;
    interface MLME_SYNC_LOSS;
    interface IEEE154Frame;
    interface IEEE154BeaconFrame;
    interface IEEE154TxBeaconPayload;
    interface SplitControl as PromiscuousMode;
    interface Get as LocalExtendedAddress;
    interface Timestamp;
    interface Packet;
  }
}
implementation
{
  components TKN154BeaconEnabledP as MAC;

  MLME_START = MAC;
  MLME_GET = MAC;
  MLME_SET = MAC;
  MLME_RESET = MAC;
  MLME_SYNC = MAC;
  MLME_SYNC_LOSS = MAC;
  MLME_BEACON_NOTIFY = MAC;
  MLME_SCAN = MAC;
  MCPS_DATA = MAC;
  MCPS_PURGE = MAC;
  MLME_ASSOCIATE = MAC;
  MLME_DISASSOCIATE = MAC;
  MLME_COMM_STATUS = MAC;
  MLME_RX_ENABLE = MAC;
  MLME_POLL = MAC;
  MLME_ORPHAN = MAC;
  MLME_GTS=MAC;
  IEEE154Frame = MAC;
  IEEE154BeaconFrame = MAC;
  LocalExtendedAddress = MAC;
  IEEE154TxBeaconPayload = MAC;
  PromiscuousMode = MAC;
  Packet = MAC;

  components CC2420TKN154C as PHY,
             new Alarm62500hz32C() as PHYAlarm1,
             new Alarm62500hz32VirtualizedC() as PHYAlarm2,
             new Alarm62500hz32C() as TKN154TimingPAlarm,
             LocalTime62500hzC, TKN154TimingP;

  // wire PHY to the PIB
  PHY.PIBUpdate[IEEE154_macShortAddress] -> MAC.PIBUpdate[IEEE154_macShortAddress];
  PHY.PIBUpdate[IEEE154_macPANId] -> MAC.PIBUpdate[IEEE154_macPANId];
  PHY.PIBUpdate[IEEE154_phyCurrentChannel] -> MAC.PIBUpdate[IEEE154_phyCurrentChannel];
  PHY.PIBUpdate[IEEE154_phyTransmitPower] -> MAC.PIBUpdate[IEEE154_phyTransmitPower];
  PHY.PIBUpdate[IEEE154_phyCCAMode] -> MAC.PIBUpdate[IEEE154_phyCCAMode];
  PHY.PIBUpdate[IEEE154_macPanCoordinator] -> MAC.PIBUpdate[IEEE154_macPanCoordinator];

  Timestamp = PHY;
  PHY.Alarm1 -> PHYAlarm1;
  PHY.Alarm2 -> PHYAlarm2;
  PHY.LocalTime -> LocalTime62500hzC;
  PHY.ReliableWait -> TKN154TimingP;
  PHY.TimeCalc -> MAC;
  PHY.CaptureTime -> TKN154TimingP;
  TKN154TimingP.TimeCalc -> MAC;
  TKN154TimingP.Leds -> LedsC;
  TKN154TimingP.CCA -> PHY;
  TKN154TimingP.SymbolAlarm -> TKN154TimingPAlarm;

  components new Alarm62500hz32VirtualizedC() as  MACAlarm1,
             new Alarm62500hz32VirtualizedC() as  MACAlarm2,
             new Alarm62500hz32VirtualizedC() as  MACAlarm3,
             new Alarm62500hz32VirtualizedC() as  MACAlarm4,
             new Alarm62500hz32VirtualizedC() as  MACAlarm5,
             new Alarm62500hz32VirtualizedC() as  MACAlarm6,
             new Alarm62500hz32VirtualizedC() as  MACAlarm7,
             new Alarm62500hz32VirtualizedC() as  MACAlarm8,
             new Alarm62500hz32VirtualizedC() as  MACAlarm9,
             new Alarm62500hz32VirtualizedC() as  MACAlarm10,
             new Alarm62500hz32VirtualizedC() as  MACAlarm11,
             new Alarm62500hz32VirtualizedC() as  MACAlarm12,
             new Alarm62500hz32VirtualizedC() as  MACAlarm13,

             new Timer62500C() as  MACTimer1,
             new Timer62500C() as  MACTimer2,
             new Timer62500C() as  MACTimer3,
             new Timer62500C() as  MACTimer4,
             new Timer62500C() as  MACTimer5;

  MAC.Alarm1 ->  MACAlarm1;
  MAC.Alarm2 ->  MACAlarm2;
  MAC.Alarm3 ->  MACAlarm3;
  MAC.Alarm4 ->  MACAlarm4;
  MAC.Alarm5 ->  MACAlarm5;
  MAC.Alarm6 ->  MACAlarm6;
  MAC.Alarm7 ->  MACAlarm7;
  MAC.Alarm8 ->  MACAlarm8;
  MAC.Alarm9 ->  MACAlarm9;
  MAC.Alarm10 ->  MACAlarm10;
  MAC.Alarm11 ->  MACAlarm11;
  MAC.Alarm12 ->  MACAlarm12;
  MAC.Alarm13 ->  MACAlarm13;

  MAC.Timer1 -> MACTimer1;
  MAC.Timer2 -> MACTimer2;
  MAC.Timer3 -> MACTimer3;
  MAC.Timer4 -> MACTimer4;
  MAC.Timer5 -> MACTimer5;
  MAC.LocalTime -> LocalTime62500hzC;

  // wire MAC <-> PHY
  MAC.RadioTx -> PHY;
  MAC.SlottedCsmaCa -> PHY;
  MAC.RadioRx -> PHY;
  MAC.RadioOff -> PHY;
  MAC.EnergyDetection -> PHY;
  MAC.PhySplitControl -> PHY;
  MAC.RadioPromiscuousMode -> PHY.RadioPromiscuousMode;
  PHY.FrameUtility -> MAC;

  components RandomC, LedsC, NoLedsC;
  MAC.Random -> RandomC;
  MAC.Leds -> LedsC;
  PHY.Random -> RandomC;

#ifdef TKN154_DEBUG
  components DebugC;
#endif
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/Ieee802154NonBeaconEnabledC.nc000066400000000000000000000117361207233610700267010ustar00rootroot00000000000000/*
 * Copyright (c) 2008, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names 
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * - Revision -------------------------------------------------------------
 * $Revision: 1.3 $
 * $Date: 2009-05-18 12:54:11 $
 * @author: Jan Hauer 
 * ========================================================================
 */
#include "TKN154.h"
configuration Ieee802154NonBeaconEnabledC
{
  provides
  {
    // MCPS-SAP
    interface MCPS_DATA;
    interface MCPS_PURGE;

    // MLME-SAP
    interface MLME_ASSOCIATE;
    interface MLME_BEACON_NOTIFY;
    interface MLME_COMM_STATUS;
    interface MLME_DISASSOCIATE;
    interface MLME_GET;
    interface MLME_ORPHAN;
    interface MLME_POLL;
    interface MLME_RESET;
    interface MLME_RX_ENABLE;
    interface MLME_SCAN;
    interface MLME_SET;
    interface MLME_START;
    interface IEEE154Frame;
    interface IEEE154BeaconFrame;
    interface IEEE154TxBeaconPayload;
    interface SplitControl as PromiscuousMode;
    interface Get as LocalExtendedAddress;
    interface Timestamp;
    interface Packet;
  }
}
implementation
{
  components TKN154NonBeaconEnabledP as MAC;

  MLME_START = MAC;
  MLME_GET = MAC;
  MLME_SET = MAC;
  MLME_RESET = MAC;
  MLME_BEACON_NOTIFY = MAC;
  MLME_SCAN = MAC;
  MCPS_DATA = MAC;
  MCPS_PURGE = MAC;
  MLME_ASSOCIATE = MAC;
  MLME_DISASSOCIATE = MAC;
  MLME_COMM_STATUS = MAC;
  MLME_RX_ENABLE = MAC;
  MLME_POLL = MAC;
  MLME_ORPHAN = MAC;
  IEEE154Frame = MAC;
  IEEE154BeaconFrame = MAC;
  IEEE154TxBeaconPayload = MAC;
  LocalExtendedAddress = MAC;
  PromiscuousMode = MAC;
  Packet = MAC;

  components CC2420TKN154C as PHY,
             new Alarm62500hz32C() as PHYAlarm1,
             new Alarm62500hz32VirtualizedC() as PHYAlarm2,
             new Alarm62500hz32C() as TKN154TimingPAlarm,
             LocalTime62500hzC, TKN154TimingP;

  // wire PHY to the PIB
  PHY.PIBUpdate[IEEE154_macShortAddress] -> MAC.PIBUpdate[IEEE154_macShortAddress];
  PHY.PIBUpdate[IEEE154_macPANId] -> MAC.PIBUpdate[IEEE154_macPANId];
  PHY.PIBUpdate[IEEE154_phyCurrentChannel] -> MAC.PIBUpdate[IEEE154_phyCurrentChannel];
  PHY.PIBUpdate[IEEE154_phyTransmitPower] -> MAC.PIBUpdate[IEEE154_phyTransmitPower];
  PHY.PIBUpdate[IEEE154_phyCCAMode] -> MAC.PIBUpdate[IEEE154_phyCCAMode];
  PHY.PIBUpdate[IEEE154_macPanCoordinator] -> MAC.PIBUpdate[IEEE154_macPanCoordinator];

  Timestamp = PHY;
  PHY.Alarm1 -> PHYAlarm1;
  PHY.Alarm2 -> PHYAlarm2;
  PHY.LocalTime -> LocalTime62500hzC;
  PHY.ReliableWait -> TKN154TimingP;
  PHY.TimeCalc -> MAC;
  PHY.CaptureTime -> TKN154TimingP;
  TKN154TimingP.TimeCalc -> MAC;
  TKN154TimingP.Leds -> LedsC;
  TKN154TimingP.CCA -> PHY;
  TKN154TimingP.SymbolAlarm -> TKN154TimingPAlarm;

  components new Timer62500C() as  MACTimer1,
             new Timer62500C() as  MACTimer2,
             new Timer62500C() as  MACTimer3,
             new Timer62500C() as  MACTimer4,
             new Timer62500C() as  MACTimer5;

  MAC.Timer1 -> MACTimer1;
  MAC.Timer2 -> MACTimer2;
  MAC.Timer3 -> MACTimer3;
  MAC.Timer4 -> MACTimer4;
  MAC.Timer5 -> MACTimer5;
  MAC.LocalTime -> LocalTime62500hzC;

  // wire MAC <-> PHY
  MAC.RadioTx -> PHY;
  MAC.UnslottedCsmaCa -> PHY;
  MAC.RadioRx -> PHY;
  MAC.RadioOff -> PHY;
  MAC.EnergyDetection -> PHY;
  MAC.PhySplitControl -> PHY;
  MAC.RadioPromiscuousMode -> PHY.RadioPromiscuousMode;
  PHY.FrameUtility -> MAC;

  components RandomC, LedsC, NoLedsC;
  MAC.Random -> RandomC;
  MAC.Leds -> LedsC;
  PHY.Random -> RandomC;

#ifdef TKN154_DEBUG
  components DebugC;
#endif
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/Makefile.include000066400000000000000000000003531207233610700247360ustar00rootroot00000000000000ifdef TKN154_PIERCEBOARD
CFLAGS += -I$(TOSDIR)/platforms/telosb/mac/tkn154/timer/pierceboard
endif

CFLAGS += -I$(TOSDIR)/platforms/telosb/mac/tkn154 \
	-I$(TOSDIR)/platforms/telosb/mac/tkn154/timer \
	-I$(TOSDIR)/chips/cc2420_tkn154

tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/TKN154TimingP.nc000066400000000000000000000106141207233610700243550ustar00rootroot00000000000000/*
 * Copyright (c) 2008, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * extraification, are permitted provided that the following conditions 
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names 
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * - Revision -------------------------------------------------------------
 * $Revision: 1.3 $
 * $Date: 2009-03-04 18:31:56 $
 * @author: Jan Hauer 
 * ========================================================================
 */

/** 
 * In slotted CSMA-CA frames must be sent on backoff boundaries (slot width:
 * 320 us). The TelosB platform lacks a clock with sufficient precision and
 * accuracy, i.e. for slotted CSMA-CA the timing is *not* standard compliant
 * (this code is experimental)
 */

#include "TKN154_platform.h"
module TKN154TimingP
{
  provides {
    interface ReliableWait;
    interface CaptureTime;
  } uses {
    interface TimeCalc;
    interface GetNow as CCA;
    interface Alarm as SymbolAlarm;
    interface Leds;
  }
}
implementation
{
  enum {
    S_WAIT_OFF,
    S_WAIT_RX,
    S_WAIT_TX,
    S_WAIT_BACKOFF,
  };
  uint8_t m_state = S_WAIT_OFF;


  async command uint32_t CaptureTime.getTimestamp(uint16_t captured_time)
  {
    uint32_t now = call SymbolAlarm.getNow();

    // On telos the capture_time is from the 32 KHz quartz, in
    // order to transform it to symbols we multiply by 2
    // We also subtract 10 because the returned value should represent
    // the time of the first bit of the frame, not the SFD byte.
    return now - (uint16_t)(now - captured_time * 2) - 10;
  }

  async command uint16_t CaptureTime.getSFDUptime(uint16_t SFDCaptureTime, uint16_t EFDCaptureTime)
  {
    // Return the time between two 32khz timestamps converted to symbols. 
    return (EFDCaptureTime - SFDCaptureTime) * 2;
  }

  async command bool ReliableWait.ccaOnBackoffBoundary(uint32_t slot0)
  {
    // There is no point in trying
    return (call CCA.getNow() ? 20: 0);
  }

  async command void ReliableWait.waitRx(uint32_t t0, uint32_t dt)
  {
    if (m_state != S_WAIT_OFF){
      ASSERT(0);
      return;
    }
    m_state = S_WAIT_RX;
    call SymbolAlarm.startAt(t0 - 16, dt); // subtract 12 symbols required for Rx calibration
  }

  async command void ReliableWait.waitTx(uint32_t t0, uint32_t dt)
  {
    if (m_state != S_WAIT_OFF){
      ASSERT(0);
      return;
    }
    m_state = S_WAIT_TX;
    call SymbolAlarm.startAt(t0 - 16, dt); // subtract 12 symbols required for Tx calibration
  }
    
  async command void ReliableWait.waitBackoff(uint32_t dt)
  {
    if (m_state != S_WAIT_OFF){
      ASSERT(0);
      return;
    }
    m_state = S_WAIT_BACKOFF;
    call SymbolAlarm.start(dt);
  }

  async event void SymbolAlarm.fired() 
  {
    switch (m_state)
    {
      case S_WAIT_RX: m_state = S_WAIT_OFF; signal ReliableWait.waitRxDone(); break;
      case S_WAIT_TX: m_state = S_WAIT_OFF; signal ReliableWait.waitTxDone(); break;
      case S_WAIT_BACKOFF: m_state = S_WAIT_OFF; signal ReliableWait.waitBackoffDone(); break;
      default: ASSERT(0); break;
    }
  }

}
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/TKN154_platform.h000066400000000000000000000066231207233610700246250ustar00rootroot00000000000000/*
 * Copyright (c) 2008, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names 
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * - Revision -------------------------------------------------------------
 * $Revision: 1.4 $
 * $Date: 2009-03-26 17:50:44 $
 * @author Jan Hauer 
 * ========================================================================
 */

#ifndef __TKN154_platform_H
#define __TKN154_platform_H

/**************************************************** 
 * The following constants define guard times on Tmote Sky / TelosB. 
 * All values are in symbol time (1 symbol = 16 us) and assume the 
 * default system configuration (MCLK running at 4 MHz)
 */

enum {
  // the expected maximum time between calling a transmit() operation and
  // the radio putting the first byte on the channel assuming no CSMA-CA
  IEEE154_RADIO_TX_DELAY = 400,

  // the expected maximum time between calling a receive() operation and the 
  // the radio actually being put in receive mode
  IEEE154_RADIO_RX_DELAY = 400,

  // defines at what time the MAC payload for a beacon frame is assembled before
  // the next scheduled beacon transmission time; the value must be smaller than
  // the beacon interval plus the time for preparing the Tx operation
  BEACON_PAYLOAD_UPDATE_INTERVAL = 2500, 
};

// Defines the time to power the CC2420 radio from "Power Down" mode to "Idle"
// mode. The actual start up time of the oscillator is 860 us (with default
// capacitor, see CC2420 datasheet), but our constant must also include
// software latency (task posting, etc.) + shutting the radio down
// -> we keep it conservative, otherwise we may lose beacons
// NOTE: if this constant is not defined, the radio will never be powered down
// during inactive period, but always stay in idle (which consumes more energy).
#ifndef IEEE154_INACTIVE_PERIOD_POWERDOWN_DISABLED
  #ifndef IEEE154_RADIO_POWERUP_TIME
  #define IEEE154_RADIO_POWERUP_TIME 200
  #endif
#endif

#endif

tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/platform_message.h000066400000000000000000000012361207233610700253560ustar00rootroot00000000000000
#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 

/* The following include pulls in the ieee154_header_t/ieee154_metadata_t definitions */
#include 

/* TOSH_DATA_LENGTH should be the maximum length of the MAC payload */
#ifndef TOSH_DATA_LENGTH
#define TOSH_DATA_LENGTH 118
#elif TOSH_DATA_LENGTH < 118
#warning "MAC payload region is smaller than aMaxMACPayloadSize!"
#endif

typedef union message_header {
  ieee154_header_t ieee154;
  serial_header_t serial;
} message_header_t;

typedef union TOSRadioFooter {
} message_footer_t;

typedef union TOSRadioMetadata {
  ieee154_metadata_t ieee154;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/000077500000000000000000000000001207233610700227735ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/Alarm32khz32VirtualizedP.nc000066400000000000000000000012751207233610700277500ustar00rootroot00000000000000#include "Timer62500hz.h"
configuration Alarm32khz32VirtualizedP
{
  provides interface Alarm as Alarm[ uint8_t num ];
}
implementation
{
  components new Alarm32khz32C(), MainC;
  components new VirtualizeAlarmC(T32khz, uint32_t, uniqueCount(UQ_ALARM_32KHZ32));

#ifndef PLATFORM_MICAZ
  // On msp430-based (e.g. TelosB) platforms Alarm32khz32C provides
  // the Init interface, on the atmega-based (e.g. micaz) platforms
  // it does not. If you use this file as a template for a new 
  // platform you might need to adapt this ... 
  MainC -> Alarm32khz32C.Init;
#endif
  Alarm = VirtualizeAlarmC;
  MainC -> VirtualizeAlarmC.Init;
  VirtualizeAlarmC.AlarmFrom -> Alarm32khz32C;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/Alarm32khzTo62500hzTransformC.nc000066400000000000000000000101321207233610700304710ustar00rootroot00000000000000/*
 * Copyright (c) 2008, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names 
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * - Revision -------------------------------------------------------------
 * $Date: 2009-03-04 18:31:56 $
 * @author Jan Hauer 
 * ========================================================================
 */

module Alarm32khzTo62500hzTransformC

{
  provides interface Alarm as Alarm[ uint8_t num ];
  uses interface Alarm as AlarmFrom[ uint8_t num ];
}
implementation
{

  /**
   * TelosB lacks a clock that satisfies the precision and accuracy 
   * requirements of the IEEE 802.15.4 standard (62500 Hz, +-40 ppm).
   * As a workaround, we cast one tick of the 32768 Hz clock to two
   * IEEE 802.15.4 symbols, which introduces a small (5%) error.
   * As a consequence the timing of the beacon interval and slotted 
   * CSMA-CA algorithm is not standard-compliant anymore.
   */

#warning "Warning: MAC timing is not standard compliant!"

  async command void Alarm.start[ uint8_t num ](uint32_t dt){ call AlarmFrom.start[num](dt >> 1);}
  async command void Alarm.stop[ uint8_t num ](){ call AlarmFrom.stop[num]();}
  async event void AlarmFrom.fired[ uint8_t num ](){ signal Alarm.fired[num]();}
  async command bool Alarm.isRunning[ uint8_t num ](){ return call AlarmFrom.isRunning[num]();}
  async command uint32_t Alarm.getAlarm[ uint8_t num ](){ return call AlarmFrom.getAlarm[num]() << 1;}

  async command uint32_t Alarm.getNow[ uint8_t num ](){ 
    // this might shift out the most significant bit
    // that's why Alarm.startAt() is converted to a Alarm.start()
    return call AlarmFrom.getNow[num]() << 1; 
  }

  async command void Alarm.startAt[ uint8_t num ](uint32_t t0, uint32_t dt){
    // t0 occured before "now"
    atomic {
      uint32_t now = call Alarm.getNow[num](), elapsed;
      if (t0 < now)
        elapsed = now - t0;
      else
        elapsed = ~(t0 - now) + 1;
      if (elapsed > dt)
        dt = elapsed;
      dt -= elapsed;
      call Alarm.start[num](dt);
    }
  }

  /******************** Defaults ****************************/

  default async command void AlarmFrom.start[ uint8_t num ](uint32_t dt){ }
  default async command void AlarmFrom.stop[ uint8_t num ](){ }
  default async command bool AlarmFrom.isRunning[ uint8_t num ](){ return FALSE;}
  default async event void Alarm.fired[ uint8_t num ](){}
  default async command void AlarmFrom.startAt[ uint8_t num ](uint32_t t0, uint32_t dt){ }
  default async command uint32_t AlarmFrom.getNow[ uint8_t num ](){ return 0;}
  default async command uint32_t AlarmFrom.getAlarm[ uint8_t num ](){ return 0;}
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32C.nc000066400000000000000000000005541207233610700255640ustar00rootroot00000000000000#include "Timer62500hz.h"
generic configuration Alarm62500hz32C()
{
  provides interface Alarm as Alarm;
}
implementation
{
  components new Alarm32khz32C(), MainC;
  components new Alarm62500hz32P();

  Alarm = Alarm62500hz32P;

#if defined(PLATFORM_TELOSB)
  MainC -> Alarm32khz32C.Init;
#endif
  Alarm62500hz32P.AlarmFrom -> Alarm32khz32C;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32P.nc000066400000000000000000000073221207233610700256010ustar00rootroot00000000000000/*
 * Copyright (c) 2008, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names 
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * - Revision -------------------------------------------------------------
 * $Date: 2008-11-25 09:35:09 $
 * @author Jan Hauer 
 * ========================================================================
 */

generic module Alarm62500hz32P()

{
  provides interface Alarm as Alarm;
  uses interface Alarm as AlarmFrom;
}
implementation
{
/**
 * TelosB lacks a clock with the precision and accuracy 
 * required by the 802.15.4 standard (62500 Hz, 40 ppm).
 * As a workaround, we cast one tick of the 32768 Hz clock to 
 * two 802.15.4 symbols, which introduces a small (5%) error.
 * Thus the channel access in particular in beacon-enabled PANs 
 * (slotted CSMA-CA) is not be standard-compliant!
 */

  async command void Alarm.start(uint32_t dt){ call AlarmFrom.start(dt >> 1);}
  async command void Alarm.stop(){ call AlarmFrom.stop();}
  async event void AlarmFrom.fired(){ signal Alarm.fired();}
  async command bool Alarm.isRunning(){ return call AlarmFrom.isRunning();}
  async command uint32_t Alarm.getAlarm(){ return call AlarmFrom.getAlarm() << 1;}

  async command uint32_t Alarm.getNow(){ 
    // this might shift out the most significant bit
    // that's why Alarm.startAt() is converted to a Alarm.start()
    return call AlarmFrom.getNow() << 1; 
  }

  async command void Alarm.startAt(uint32_t t0, uint32_t dt){
    // t0 occured before "now"
    atomic {
      uint32_t now = call Alarm.getNow(), elapsed;
      if (t0 < now)
        elapsed = now - t0;
      else
        elapsed = ~(t0 - now) + 1;
      if (elapsed > dt)
        dt = elapsed;
      dt -= elapsed;
      call Alarm.start(dt);
    }
  }

  /******************** Defaults ****************************/

  default async command void AlarmFrom.start(uint32_t dt){ }
  default async command void AlarmFrom.stop(){ }
  default async command bool AlarmFrom.isRunning(){ return FALSE;}
  default async event void Alarm.fired(){}
  default async command void AlarmFrom.startAt(uint32_t t0, uint32_t dt){ }
  default async command uint32_t AlarmFrom.getNow(){ return 0;}
  default async command uint32_t AlarmFrom.getAlarm(){ return 0;}
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32VirtualizedC.nc000066400000000000000000000044671207233610700300160ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Alarm62500hzC is the alarm for async 62500hz alarms (virtualized)
 *
 * @author Cory Sharp 
 * @author Jan Hauer 
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

//#include "Timer.h"
#include "Timer62500hz.h"
generic configuration Alarm62500hz32VirtualizedC()
{
  provides interface Alarm;
}
implementation
{
  components Alarm32khzTo62500hzTransformC, Alarm32khz32VirtualizedP;
  enum {
    CLIENT_ID = unique(UQ_ALARM_32KHZ32),
  };
  
  Alarm = Alarm32khzTo62500hzTransformC.Alarm[CLIENT_ID];
  Alarm32khzTo62500hzTransformC.AlarmFrom[CLIENT_ID] -> Alarm32khz32VirtualizedP.Alarm[CLIENT_ID];
}

tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/HilTimer62500hzC.nc000066400000000000000000000044001207233610700260720ustar00rootroot00000000000000
/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *
 * @author Cory Sharp 
 * @author: Jan Hauer  (62500hz)
 * @see  Please refer to TEP 102 for more information about this component and its
 *          intended use.
 */

#include "Timer.h"
#include "Timer62500hz.h"
configuration HilTimer62500hzC
{
  provides interface Timer as Timer62500hz[ uint8_t num ];
}
implementation
{
  components new Alarm62500hz32VirtualizedC() as Alarm;
  components new AlarmToTimerC(T62500hz);
  components new VirtualizeTimerC(T62500hz,uniqueCount(UQ_TIMER_62500HZ));

  Timer62500hz = VirtualizeTimerC;

  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
  AlarmToTimerC.Alarm -> Alarm;
}
tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzC.nc000066400000000000000000000005371207233610700262350ustar00rootroot00000000000000#include "Timer62500hz.h"
configuration LocalTime62500hzC
{
  provides interface LocalTime;
}
implementation
{
  // should be done properly one day (not wasting an alarm slot)
  components new Alarm62500hz32VirtualizedC(), LocalTime62500hzP;
  LocalTime = LocalTime62500hzP;
  LocalTime62500hzP.Alarm -> Alarm62500hz32VirtualizedC.Alarm;
}

tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzP.nc000066400000000000000000000004241207233610700262450ustar00rootroot00000000000000#include "Timer62500hz.h"
module LocalTime62500hzP
{
  provides interface LocalTime;
  uses interface Alarm;
}
implementation
{
  async command uint32_t LocalTime.get()
  {
    return call Alarm.getNow();
  }
  async event void Alarm.fired(){}
}

tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/Timer62500C.nc000066400000000000000000000041151207233610700250760ustar00rootroot00000000000000// $Id: Timer62500C.nc,v 1.2 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The virtualized 62500 Hz timer abstraction. Instantiating this 
 * component gives an 62500 Hz granularity timer.
 *
 * @author Philip Levis
 * @author: Jan Hauer  (62500hz)
 * @date   January 16 2006
 * @see    TEP 102: Timers
 */ 

#include "Timer62500hz.h"

generic configuration Timer62500C() {
  provides interface Timer;
}
implementation {
  components Timer62500P;
  Timer = Timer62500P.Timer62500[unique(UQ_TIMER_62500HZ)];
}

tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/Timer62500P.nc000066400000000000000000000037671207233610700251270ustar00rootroot00000000000000// $Id: Timer62500P.nc,v 1.2 2010-06-29 22:07:56 scipio Exp $
/*									tab:4
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
/*
 *
 * @author Philip Levis
 * @author Cory Sharp
 * @author: Jan Hauer  (62500hz)
 * @date   May 16 2005
 */ 

#include "Timer.h"

configuration Timer62500P {
  provides interface Timer as Timer62500[uint8_t id];
}
implementation {
  components HilTimer62500hzC;
  Timer62500 = HilTimer62500hzC;
}

tinyos-2.1.2+dfsg/tos/platforms/telosb/mac/tkn154/timer/Timer62500hz.h000066400000000000000000000003611207233610700251630ustar00rootroot00000000000000#ifndef _H_Timer_62500hz_h
#define _H_Timer_62500hz_h

typedef struct { } T62500hz;

#define UQ_ALARM_32KHZ32 "Virtual.32khz32Alarm"
#define UQ_ALARM_62500HZ32 "Virtual.62500hzAlarm"
#define UQ_TIMER_62500HZ "HilTimer62500hzC.Timer"
#endif

tinyos-2.1.2+dfsg/tos/platforms/telosb/platform.h000066400000000000000000000000001207233610700220500ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/tinynode/000077500000000000000000000000001207233610700204265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/tinynode/.platform000066400000000000000000000033461207233610700222610ustar00rootroot00000000000000# Includes that should take precedence come first.  Platforms come before
# chips because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.  And because of that, the current platform's include directory
# must be specified, otherwise its search order is last instead of first.

push( @includes, qw(

  %T/platforms/tinynode/chips/xe1205
  %T/platforms/tinynode/chips/mm74hc595
  %T/platforms/tinynode/chips/at45db

  %T/chips/xe1205/conf
  %T/chips/xe1205/phy
  %T/chips/xe1205/mac
  %T/chips/xe1205

  %T/chips/mm74hc595

  %T/chips/msp430
  %T/chips/msp430/adc12
  %T/chips/msp430/dma
  %T/chips/msp430/pins
  %T/chips/msp430/timer
  %T/chips/msp430/usart
  %T/chips/msp430/sensors
  %T/chips/at45db
  %T/lib/timer
  %T/lib/serial
  %T/lib/adc
  %T/lib/power

) );


@opts = qw(
	-gcc=msp430-gcc
	-mmcu=msp430f1611
        -fnesc-target=msp430
        -fnesc-no-debug);

push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
push @opts, "-mingw-gcc" if $cygwin;

#@commonplatforms = ("msp430");

$ENV{'CIL_MACHINE'} =
    "version_major=3 " .
    "version_minor=2 " .
    "version=msp430-3.2.3 " .
    "short=2,2 " .
    "int=2,2 " .
    "long=4,2 " .
    "long_long=8,2 " .
    "pointer=2,2 " .
    "enum=2,2 " .
    "float=4,2 " .
    "double=4,2 " .
    "long_double=4,2 " .
    "void=1,1 " .
    "fun=1,2 " .
    "wchar_size_size=2,2 " .
    "alignof_string=1 " .
    "max_alignment=1 " .
    "char_wchar_signed=true,true " .
    "const_string_literals=true " .
    "big_endian=false " .
    "underscore_name=false " .
    "__builtin_va_list=true " .
    "__thread_is_keyword=true";
    
    
tinyos-2.1.2+dfsg/tos/platforms/tinynode/ActiveMessageC.nc000066400000000000000000000055041207233610700235770ustar00rootroot00000000000000// $Id: ActiveMessageC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Philip Levis
 * Date last modified:  $Id: ActiveMessageC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
 *
 */

/**
 *
 * The Active Message layer on the TinyNode platform. This is a naming wrapper
 * around the XE1205 Active Message layer.
 *
 * @author Philip Levis, Henri Dubois-Ferriere
 */

configuration ActiveMessageC {
  provides {
    interface SplitControl @atleastonce();

    interface AMSend[uint8_t id];
    interface Receive[uint8_t id];
    interface Receive as Snoop[uint8_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
  }
}
implementation {
  components XE1205ActiveMessageC as AM;

  SplitControl = AM;
  
  AMSend       = AM;
  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/DemoSensorC.nc000066400000000000000000000044241207233610700231350ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorC on the telosb platform provides a
 * voltage reading, using VoltageC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 * 
 */

generic configuration DemoSensorC()
{
  provides interface Read;
}
implementation
{
  components new VoltageC() as DemoSensor;
  Read = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/DemoSensorNowC.nc000066400000000000000000000045551207233610700236260ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorC on the telosb platform provides a
 * voltage reading, using VoltageC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 * 
 */

generic configuration DemoSensorNowC()
{
  provides interface Resource;
  provides interface ReadNow;
}
implementation
{
  components new Msp430InternalVoltageC() as DemoSensorNow;

  Resource = DemoSensorNow;
  ReadNow = DemoSensorNow;
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/DemoSensorStreamC.nc000066400000000000000000000045041207233610700243100ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorStreamC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorStreamC on the telosb platform provides a
 * voltage reading, using VoltageStreamC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 * 
 */

generic configuration DemoSensorStreamC()
{
  provides interface ReadStream;
}
implementation
{
  components new VoltageStreamC() as DemoSensor;
  ReadStream = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/LedsP.nc000066400000000000000000000105071207233610700217620ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $

/*                                                                      
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard LED mote abstraction.
 *
 * @author Joe Polastre
 * @author Philip Levis
 * @date   March 21, 2005
 */

module LedsP {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
  }
}
implementation {
  
#ifndef dbg
#define dbg(n,msg)
#endif  

  command error_t Init.init() {
    atomic {
      dbg(DBG_BOOT, "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led0.clr();
      call Led1.clr();
      call Led2.clr();
    }
    return SUCCESS;
  }

  async command void Leds.led0On() {
    dbg(DBG_LED, "LEDS: Led 0 on.\n");
    call Led0.set();
  }

  async command void Leds.led0Off() {
    dbg(DBG_LED, "LEDS: Led 0 off.\n");
    call Led0.clr();
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    // this should be removed by dead code elimination when compiled for
    // the physical motes
    if (call Led0.get())
      dbg(DBG_LED, "LEDS: Led 0 off.\n");
    else
      dbg(DBG_LED, "LEDS: Led 0 on.\n");
  }

  async command void Leds.led1On() {
    dbg(DBG_LED, "LEDS: Led 1 on.\n");
    call Led1.set();
  }

  async command void Leds.led1Off() {
    dbg(DBG_LED, "LEDS: Led 1 off.\n");
    call Led1.clr();
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    if (call Led1.get())
      dbg(DBG_LED, "LEDS: Led 1 off.\n");
    else
      dbg(DBG_LED, "LEDS: Led 1 on.\n");
  }

  async command void Leds.led2On() {
    dbg(DBG_LED, "LEDS: Led 2 on.\n");
    call Led2.set();
  }

  async command void Leds.led2Off() {
    dbg(DBG_LED, "LEDS: Led 2 off.\n");
    call Led2.clr();
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    if (call Led2.get())
      dbg(DBG_LED, "LEDS: Led 2 off.\n");
    else
      dbg(DBG_LED, "LEDS: Led 2 on.\n");
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (call Led0.get()) {
        rval |= LEDS_LED0;
      }
      if (call Led1.get()) {
        rval |= LEDS_LED1;
      }
      if (call Led2.get()) {
        rval |= LEDS_LED2;
      }
    return rval;
  }
}

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
        call Leds.led0On();
      }
      else {
        call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
        call Leds.led1On();
      }
      else {
        call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
        call Leds.led2On();
      }
      else {
        call Leds.led2Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/PlatformC.nc000066400000000000000000000036271207233610700226470ustar00rootroot00000000000000// $Id: PlatformC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $

/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre and Cory Sharp
 */
#include "hardware.h"

configuration PlatformC
{
  provides interface Init;
}
implementation
{
  components PlatformP
    , Msp430ClockC
    ;

  Init = PlatformP;
  PlatformP.Msp430ClockInit -> Msp430ClockC.Init;
}

tinyos-2.1.2+dfsg/tos/platforms/tinynode/PlatformLedsC.nc000066400000000000000000000044311207233610700234510ustar00rootroot00000000000000// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $

/* Copyright (c) 2000-2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Joe Polastre
 */
#include "hardware.h"

configuration PlatformLedsC {
  provides interface GeneralIO as Led0; // red
  provides interface GeneralIO as Led1; // green
  provides interface GeneralIO as Led2; // yellow
  uses interface Init;
}
implementation
{
  components 
  HplMsp430GeneralIOC as GeneralIOC, 
    new Msp430GpioC() as Led0Impl,
    new Msp430GpioC() as Led1Impl,
    new Msp430GpioC() as Led2Impl;

  Led0 = Led0Impl;
  Led0Impl -> GeneralIOC.Port15;

  Led1 = Led1Impl;
  Led1Impl -> GeneralIOC.Port23;

  Led2 = Led2Impl;
  Led2Impl -> GeneralIOC.Port24;

  components PlatformP;
  Init = PlatformP.LedsInit;
}

tinyos-2.1.2+dfsg/tos/platforms/tinynode/PlatformP.nc000066400000000000000000000006271207233610700226610ustar00rootroot00000000000000#include "hardware.h"

module PlatformP{
  provides interface Init;
  uses interface Init as Msp430ClockInit;
  uses interface Init as LedsInit;
}
implementation {
  command error_t Init.init() {
    WDTCTL = WDTPW + WDTHOLD;
    call Msp430ClockInit.init();
    TOSH_SET_PIN_DIRECTIONS();
    call LedsInit.init();
    return SUCCESS;
  }

  default command error_t LedsInit.init() { return SUCCESS; }

}

tinyos-2.1.2+dfsg/tos/platforms/tinynode/PlatformSerialC.nc000066400000000000000000000005521207233610700240010ustar00rootroot00000000000000configuration PlatformSerialC {
  provides interface StdControl;
  provides interface UartStream;
}

implementation {
  components new Msp430Uart1C() as UartC;
  UartStream = UartC;

  components TinyNodeSerialP;
  StdControl = TinyNodeSerialP;
  TinyNodeSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
  TinyNodeSerialP.Resource -> UartC.Resource;
}

tinyos-2.1.2+dfsg/tos/platforms/tinynode/TinyNodeSerialP.nc000066400000000000000000000013341207233610700237620ustar00rootroot00000000000000module TinyNodeSerialP {
  provides interface StdControl;
  provides interface Msp430UartConfigure;
  uses interface Resource;
}
implementation {

  msp430_uart_union_config_t msp430_uart_tinynode_config = {{ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1}};
  
  
  command error_t StdControl.start(){
    return call Resource.immediateRequest();
  }

  command error_t StdControl.stop(){
    call Resource.release();
    return SUCCESS;
  }

  event void Resource.granted(){}
  
  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
    return &msp430_uart_tinynode_config;
  }

}

tinyos-2.1.2+dfsg/tos/platforms/tinynode/VoltageC.nc000066400000000000000000000040521207233610700224550ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * VoltageC is a common name for the Msp430InternalVoltageC voltage
 * sensor available on the telosb platform.
 *
 * To convert from ADC counts to actual voltage, divide by 4096 and
 * multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

generic configuration VoltageC() {
  provides interface Read;
}
implementation {
  components new Msp430InternalVoltageC();
  Read = Msp430InternalVoltageC.Read;
}

tinyos-2.1.2+dfsg/tos/platforms/tinynode/VoltageStreamC.nc000066400000000000000000000041021207233610700236250ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * VoltageC is a common name for the Msp430InternalVoltageC voltage
 * sensor available on the telosb platform.
 *
 * To convert from ADC counts to actual voltage, divide by 4096 and
 * multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

generic configuration VoltageStreamC() {
  provides interface ReadStream;
}
implementation {
  components new Msp430InternalVoltageC();
  ReadStream = Msp430InternalVoltageC.ReadStream;
}

tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/000077500000000000000000000000001207233610700215345ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/at45db/000077500000000000000000000000001207233610700226175ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/at45db/HplAt45dbC.nc000066400000000000000000000040211207233610700247300ustar00rootroot00000000000000/*
* Copyright (c) 2006, Technische Universitat Berlin
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright notice,
*   this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
*   notice, this list of conditions and the following disclaimer in the
*   documentation and/or other materials provided with the distribution.
* - Neither the name of the Technische Universitat Berlin nor the names
*   of its contributors may be used to endorse or promote products derived
*   from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

configuration HplAt45dbC {
  provides interface HplAt45db;
}
implementation {
  
  components  new HplAt45dbByteC(9), 
    new Msp430Spi0C() as Spi, 
    HplAt45dbP,
    HplMsp430GeneralIOC as MspGeneralIO,
    new Msp430GpioC() as Select;  
  
  HplAt45db = HplAt45dbByteC;
  
  HplAt45dbByteC.Resource -> Spi;
  HplAt45dbByteC.FlashSpi -> Spi;
  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP;
  
  Select -> MspGeneralIO.Port47;
  HplAt45dbP.Select -> Select; 
  HplAt45dbP.FlashSpi -> Spi;
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/at45db/HplAt45dbP.nc000066400000000000000000000043641207233610700247570ustar00rootroot00000000000000/*
* Copyright (c) 2006, Technische Universitat Berlin
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright notice,
*   this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
*   notice, this list of conditions and the following disclaimer in the
*   documentation and/or other materials provided with the distribution.
* - Neither the name of the Technische Universitat Berlin nor the names
*   of its contributors may be used to endorse or promote products derived
*   from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/


module HplAt45dbP {
  provides {
    interface HplAt45dbByte;
  }
  uses {
    interface SpiByte as FlashSpi;
    interface GeneralIO as Select;
  }
}
implementation
{
  command void HplAt45dbByte.select() {
    call Select.clr();
  }
  
  command void HplAt45dbByte.deselect() {
    call Select.set();
  }
  
  task void idleTask() {
    uint8_t status;
    status = call FlashSpi.write(0);
    if (!(status & 0x80)) {
      post idleTask();
    } else {
      signal HplAt45dbByte.idle();
    }
  }
  
  command void HplAt45dbByte.waitIdle() {
    post idleTask();
  }
  
  command bool HplAt45dbByte.getCompareStatus() {
    uint8_t status;
    status = call FlashSpi.write(0);
    return (!(status & 0x40));
  }
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/at45db/HplAt45db_chip.h000066400000000000000000000045011207233610700254620ustar00rootroot00000000000000// $Id: HplAt45db_chip.h,v 1.6 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

#ifndef HPLAT45DB_CHIP_H
#define HPLAT45DB_CHIP_H

// flash characteristics
enum {
  AT45_MAX_PAGES = 2048,
  AT45_PAGE_SIZE = 264,
  AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes
};

typedef uint16_t at45page_t;
typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */

#endif
tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/xe1205/000077500000000000000000000000001207233610700224605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/xe1205/HplXE1205InterruptsC.nc000066400000000000000000000045561207233610700265070ustar00rootroot00000000000000/* 
 * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
 * Switzerland.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
 *   nor the names of its contributors may be used to 
 *   endorse or promote products derived from this software without 
 *   specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * ========================================================================
 */

/**
 * HPL implementation of interrupts for the Semtech
 * XE1205 radio connected to a TI MSP430 processor on the 
 * tinynode platform.
 *
 * @author Henri Dubois-Ferriere
 *
 */

configuration HplXE1205InterruptsC {

  provides interface GpioInterrupt as Interrupt0;
  provides interface GpioInterrupt as Interrupt1;
}

implementation{

  components HplMsp430InterruptC;
  components new Msp430InterruptC() as Interrupt0C;
  components new Msp430InterruptC() as Interrupt1C;
  Interrupt0C.HplInterrupt -> HplMsp430InterruptC.Port20;
  Interrupt1C.HplInterrupt -> HplMsp430InterruptC.Port21;

  Interrupt0 = Interrupt0C.Interrupt;
  Interrupt1 = Interrupt1C.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/xe1205/HplXE1205PinsC.nc000066400000000000000000000067721207233610700252430ustar00rootroot00000000000000/* 
 * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
 * Switzerland.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
 *   nor the names of its contributors may be used to 
 *   endorse or promote products derived from this software without 
 *   specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * ========================================================================
 */

/*
 * HPL implementation of general-purpose I/O for the Semtech XE1205
 * radio connected to a TI MSP430 processor on a tinynode platform.
 *
 * @author Henri Dubois-Ferriere
 */


configuration HplXE1205PinsC {

  provides interface GeneralIO as Irq0Pin      @atmostonce();
  provides interface GeneralIO as Irq1Pin      @atmostonce();
  provides interface GeneralIO as AntSelTXPin  @atmostonce();
  provides interface GeneralIO as AntSelRXPin  @atmostonce();
  provides interface GeneralIO as DataPin      @atmostonce();
  provides interface GeneralIO as ModeSel0Pin  @atmostonce();
  provides interface GeneralIO as ModeSel1Pin  @atmostonce();
  provides interface GeneralIO as NssDataPin   @atmostonce();
  provides interface GeneralIO as NssConfigPin @atmostonce();
}

implementation {

  components HplMsp430GeneralIOC;
  components new Msp430GpioC() as Irq0PinM;
  components new Msp430GpioC() as Irq1PinM;
  components new Msp430GpioC() as AntSelTXM;
  components new Msp430GpioC() as AntSelRXM;
  components new Msp430GpioC() as DataM;
  components new Msp430GpioC() as ModeSel0M;
  components new Msp430GpioC() as ModeSel1M;
  components new Msp430GpioC() as NssConfigM;
  components new Msp430GpioC() as NssDataM;

  Irq0PinM -> HplMsp430GeneralIOC.Port20;
  Irq1PinM -> HplMsp430GeneralIOC.Port21;
  AntSelTXM -> HplMsp430GeneralIOC.Port27;
  AntSelRXM -> HplMsp430GeneralIOC.Port26;
  DataM -> HplMsp430GeneralIOC.Port57;
  ModeSel0M -> HplMsp430GeneralIOC.Port34;
  ModeSel1M -> HplMsp430GeneralIOC.Port35;
  NssConfigM -> HplMsp430GeneralIOC.Port14;
  NssDataM -> HplMsp430GeneralIOC.Port10;


  Irq0Pin = Irq0PinM;
  Irq1Pin = Irq1PinM;
  AntSelTXPin = AntSelTXM;
  AntSelRXPin = AntSelRXM;
  DataPin = DataM;
  ModeSel0Pin = ModeSel0M;
  ModeSel1Pin = ModeSel1M;
  NssConfigPin = NssConfigM;
  NssDataPin = NssDataM;
}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/xe1205/HplXE1205SpiC.nc000066400000000000000000000041651207233610700250570ustar00rootroot00000000000000/* 
 * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
 * Switzerland.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
 *   nor the names of its contributors may be used to 
 *   endorse or promote products derived from this software without 
 *   specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * ========================================================================
 */

/**
 * HPL implementation of the SPI bus for the Xemics XE1205 radio
 * connected to a TI MSP430 processor.
 *
 * @author Henri Dubois-Ferriere
 */

generic configuration HplXE1205SpiC() {

  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;

}

implementation {

    components new Xe1205Spi0C() as SpiC;
    
    Resource = SpiC;
    SpiByte = SpiC;
    SpiPacket = SpiC;
    
}

tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/xe1205/Xe1205Spi0C.nc000066400000000000000000000051541207233610700245320ustar00rootroot00000000000000/**
 * Copyright (c) 2005-2006 Arched Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * An implementation of the SPI on USART0 for the MSP430. The current
 * implementation defaults not using the DMA and performing the SPI
 * transfers in software. To utilize the DMA, use Msp430SpiDma0P in
 * place of Msp430SpiNoDma0P.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2007-07-13 15:54:09 $
 */

#include "msp430usart.h"

generic configuration Xe1205Spi0C() {

  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;

  uses interface Msp430SpiConfigure;
}

implementation {

  enum {
    CLIENT_ID = unique( MSP430_SPIO_BUS ),
  };

  components Xe1205SpiNoDma0P as SpiP;
  Resource = SpiP.Resource[ CLIENT_ID ];
  SpiByte = SpiP.SpiByte;
  SpiPacket = SpiP.SpiPacket[ CLIENT_ID ];
  Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ];

  components new Msp430Usart0C() as UsartC;
  SpiP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
  SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
  SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts;

}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDma0P.nc000066400000000000000000000047531207233610700254720ustar00rootroot00000000000000/**
 * Copyright (c) 2005-2006 Arched Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2007-07-13 15:54:09 $
 */

configuration Xe1205SpiNoDma0P {

  provides interface Resource[ uint8_t id ];
  provides interface ResourceConfigure[uint8_t id ];
  provides interface SpiByte;
  provides interface SpiPacket[ uint8_t id ];

  uses interface Resource as UsartResource[ uint8_t id ];
  uses interface Msp430SpiConfigure[ uint8_t id ];
  uses interface HplMsp430UsartInterrupts as UsartInterrupts;

}

implementation {

  components new Xe1205SpiNoDmaP() as SpiP;
  Resource = SpiP.Resource;
  ResourceConfigure = SpiP.ResourceConfigure;
  Msp430SpiConfigure = SpiP.Msp430SpiConfigure;
  SpiByte = SpiP.SpiByte;
  SpiPacket = SpiP.SpiPacket;
  UsartResource = SpiP.UsartResource;
  UsartInterrupts = SpiP.UsartInterrupts;

  components HplMsp430Usart0C as UsartC;
  SpiP.Usart -> UsartC;

  components LedsC as Leds;
  SpiP.Leds -> Leds;

}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc000066400000000000000000000152371207233610700254110ustar00rootroot00000000000000/**
 * Copyright (c) 2005-2006 Arched Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Jonathan Hui 
 * @author Maxime Muller
 * @version $Revision: 1.1 $ $Date: 2007-07-13 15:54:09 $
 *
 * nss_data toggling for each rx byte
 */


generic module Xe1205SpiNoDmaP() {

  provides interface Resource[ uint8_t id ];
  provides interface ResourceConfigure[ uint8_t id ];
  provides interface SpiByte;
  provides interface SpiPacket[ uint8_t id ];

  uses interface Resource as UsartResource[ uint8_t id ];
  uses interface Msp430SpiConfigure[ uint8_t id ];
  uses interface HplMsp430Usart as Usart;
  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
  uses interface Leds;

}

implementation {

  enum {
    SPI_ATOMIC_SIZE = 2,
  };

  norace uint8_t* m_tx_buf;
  norace uint8_t* m_rx_buf;
  norace uint16_t m_len;
  norace uint16_t m_pos;
  norace uint8_t m_client;

  void signalDone();
  task void signalDone_task();

  async command error_t Resource.immediateRequest[ uint8_t id ]() {
    return call UsartResource.immediateRequest[ id ]();
  }

  async command error_t Resource.request[ uint8_t id ]() {
    return call UsartResource.request[ id ]();
  }

  async command bool Resource.isOwner[ uint8_t id ]() {
    return call UsartResource.isOwner[ id ]();
  }

  async command error_t Resource.release[ uint8_t id ]() {
    return call UsartResource.release[ id ]();
  }

  async command void ResourceConfigure.configure[ uint8_t id ]() {
    call Usart.setModeSpi(call Msp430SpiConfigure.getConfig[id]());
  }

  async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
    call Usart.resetUsart(TRUE);
    call Usart.disableSpi();
    call Usart.resetUsart(FALSE);
  }

  event void UsartResource.granted[ uint8_t id ]() {
    signal Resource.granted[ id ]();
  }

  async command uint8_t SpiByte.write( uint8_t tx ) {
    uint8_t byte;
    // we are in spi mode which is configured to have turned off interrupts
    // call Usart.disableRxIntr();
    call Usart.tx( tx );
    while( !call Usart.isRxIntrPending() );
    call Usart.clrRxIntr();
    byte = call Usart.rx();
    //    call Usart.enableRxIntr();
    return byte;
  }

  default async command bool UsartResource.isOwner[ uint8_t id ]() { return FALSE; }
  default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
  default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
  default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; }
 default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() {
    return &msp430_spi_default_config;
  }

  default event void Resource.granted[ uint8_t id ]() {}

  void continueOp() {
      uint8_t end;
      uint8_t tmp;
      
      atomic {
	  
	  TOSH_CLR_NSS_DATA_PIN();
	  call Usart.tx( 0 );
	  while( !call Usart.isRxIntrPending() );
	  TOSH_SET_NSS_DATA_PIN();
	  
	  end = m_pos + SPI_ATOMIC_SIZE;
	  if ( end > m_len )
	      end = m_len;
	  
	  while ( ++m_pos < end ) {
	      TOSH_CLR_NSS_DATA_PIN();
	      call Usart.tx( 0 );
	      while( !call Usart.isRxIntrPending() );	    
	      tmp = call Usart.rx();
	      m_rx_buf[ m_pos - 1 ] = tmp;
	  }
      }
  }
  


  inline  void sendBuffer(uint8_t const* buffer_, int size_) {

      TOSH_CLR_NSS_DATA_PIN();

      call Usart.isTxIntrPending();
      call Usart.rx();
      while(size_ > 0) {
	  call Usart.tx(*buffer_);
	  ++buffer_;
	  --size_;	      
	  while( !call Usart.isRxIntrPending() );
	  call Usart.rx();
      }
      call Usart.disableRxIntr();
      TOSH_SET_NSS_DATA_PIN();
  }



     inline void readData() {
      uint8_t end;
      uint8_t tmp;
      
      atomic {
	TOSH_TOGGLE_YELLOW_LED_PIN();
	  call Usart.tx( 0 );
	  call Usart.isTxIntrPending();
	  call Usart.rx();
	  end = m_pos + SPI_ATOMIC_SIZE;
	  if ( end > m_len )
	      end = m_len;
	
	  while ( ++m_pos < end ) {
	      TOSH_CLR_NSS_DATA_PIN();
	      call Usart.tx( 0 );
	      while( !call Usart.isRxIntrPending() );
	      tmp = call Usart.rx();
	      TOSH_SET_NSS_DATA_PIN();
	      m_rx_buf[ m_pos - 1 ] = tmp;
	  }
      }
      
  }

  async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf,
                                                      uint8_t* rx_buf,
                                                      uint16_t len ) {

      m_client = id;
      m_tx_buf = tx_buf;
      m_rx_buf = rx_buf;
      m_len = len;
      m_pos = 0;

      if (m_tx_buf)
	  sendBuffer(m_tx_buf,m_len);
      else {
	  call Usart.enableRxIntr();

	  continueOp();
      }

      return SUCCESS;

  }

  task void signalDone_task() {
      atomic signalDone();
  }

  async event void UsartInterrupts.rxDone( uint8_t data ) {
   
      if ( m_rx_buf ) {
	  m_rx_buf[ m_pos-1 ] = data;
      } else 
	  return;
     TOSH_SET_NSS_DATA_PIN();
    if ( m_pos < m_len ) {
	continueOp();

    } else {
	call Usart.disableRxIntr();
	signalDone();
    }
  }

  void signalDone() {
    signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len,
					   SUCCESS );
  }

  async event void UsartInterrupts.txDone() {}

  default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {}

}
tinyos-2.1.2+dfsg/tos/platforms/tinynode/hardware.h000066400000000000000000000142701207233610700224000ustar00rootroot00000000000000/* 
 * Copyright (c) 2005-2006, Ecole Polytechnique Federale de Lausanne (EPFL)
 * and Shockfish SA, Switzerland.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
 *   and Shockfish SA, nor the names of its contributors may be used to 
 *   endorse or promote products derived from this software without 
 *   specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * ========================================================================
 */
/*
 * Platform definitions for tinynode platform
 *
 * @author Remy Blank
 * @author Henri Dubois-Ferriere
 * @author Roger Meier
 *
 */

#ifndef _H_hardware_h
#define _H_hardware_h

#include "msp430hardware.h"

// enum so components can override power saving,
// as per TEP 112.
enum {
  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
};

// XE1205 radio
TOSH_ASSIGN_PIN(NSS_DATA, 1, 0);
TOSH_ASSIGN_PIN(DATA, 5, 7);
TOSH_ASSIGN_PIN(NSS_CONFIG, 1, 4);
TOSH_ASSIGN_PIN(IRQ0, 2, 0);
TOSH_ASSIGN_PIN(IRQ1, 2, 1);
TOSH_ASSIGN_PIN(SW_RX, 2, 6);
TOSH_ASSIGN_PIN(SW_TX, 2, 7);
TOSH_ASSIGN_PIN(POR, 3, 0);
TOSH_ASSIGN_PIN(SCK, 3, 3);
TOSH_ASSIGN_PIN(SW0, 3, 4);
TOSH_ASSIGN_PIN(SW1, 3, 5);

// LED
TOSH_ASSIGN_PIN(RED_LED, 1, 5);		// on tinynode
TOSH_ASSIGN_PIN(RED_LED2, 1, 6);	// external, for compatibility with Mica
TOSH_ASSIGN_PIN(GREEN_LED, 2, 3);
TOSH_ASSIGN_PIN(YELLOW_LED, 2, 4);
// TOSH_ASSIGN_PIN(RED_LED2, 1, 5);	// external, for compatibility with Mica
// TOSH_ASSIGN_PIN(GREEN_LED, 1, 3);
// TOSH_ASSIGN_PIN(YELLOW_LED, 1, 2);

// Other IO
TOSH_ASSIGN_PIN(TEMPE, 5, 4);		// optional temperature sensor
TOSH_ASSIGN_PIN(NVSUPE, 5, 5);		// voltage supply monitor
TOSH_ASSIGN_PIN(NREGE, 5, 6);		// voltage regulator enable

// UART0 pins (shared with XE1205 radio)
TOSH_ASSIGN_PIN(STE0, 3, 0);
TOSH_ASSIGN_PIN(SIMO0, 3, 1);
TOSH_ASSIGN_PIN(SOMI0, 3, 2);
TOSH_ASSIGN_PIN(UCLK0, 3, 3);
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);

// UART1 pins
TOSH_ASSIGN_PIN(STE1, 5, 0);
TOSH_ASSIGN_PIN(SIMO1, 5, 1);
TOSH_ASSIGN_PIN(SOMI1, 5, 2);
TOSH_ASSIGN_PIN(UCLK1, 5, 3);
TOSH_ASSIGN_PIN(UTXD1, 3, 6);
TOSH_ASSIGN_PIN(URXD1, 3, 7);

// ADC
TOSH_ASSIGN_PIN(TEMP, 6, 0);		// channel 0: optional temperature sensor
TOSH_ASSIGN_PIN(VSUP, 6, 1);		// channel 1: supply monitor
TOSH_ASSIGN_PIN(ADC2, 6, 2);
TOSH_ASSIGN_PIN(ADC3, 6, 3);
TOSH_ASSIGN_PIN(ADC4, 6, 4);
TOSH_ASSIGN_PIN(ADC5, 6, 5);
TOSH_ASSIGN_PIN(ADC6, 6, 6);
TOSH_ASSIGN_PIN(ADC7, 6, 7);

// External FLASH
TOSH_ASSIGN_PIN(NFL_RST, 4, 6);
TOSH_ASSIGN_PIN(NFL_CS, 4, 7);
TOSH_ASSIGN_PIN(FLASH_RST, 4, 6);
TOSH_ASSIGN_PIN(FLASH_CS, 4, 7);

// PROGRAMMING PINS (tri-state)
TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
TOSH_ASSIGN_PIN(PROG_TX, 2, 2);

// Oscillator resistance
TOSH_ASSIGN_PIN(ROSC, 2, 5);

// unused
TOSH_ASSIGN_PIN(P12, 1, 2);
TOSH_ASSIGN_PIN(P13, 1, 3);
TOSH_ASSIGN_PIN(P16, 1, 6);
TOSH_ASSIGN_PIN(P23, 2, 3);
TOSH_ASSIGN_PIN(P24, 2, 4);
TOSH_ASSIGN_PIN(P40, 4, 0);
TOSH_ASSIGN_PIN(P41, 4, 1);

// unconnected
TOSH_ASSIGN_PIN(NOT_CONNECTED1, 1, 7);
TOSH_ASSIGN_PIN(NOT_CONNECTED2, 4, 2);
TOSH_ASSIGN_PIN(NOT_CONNECTED3, 4, 3);
TOSH_ASSIGN_PIN(NOT_CONNECTED4, 4, 4);
TOSH_ASSIGN_PIN(NOT_CONNECTED5, 4, 5);
	

void TOSH_SET_PIN_DIRECTIONS(void)
{
	//LEDS
	TOSH_CLR_RED_LED_PIN();
	TOSH_MAKE_RED_LED_OUTPUT();		

	// XE1205 radio
	//	TOSH_SET_NSS_DATA_PIN();
	//	TOSH_MAKE_NSS_DATA_OUTPUT();
	//	TOSH_CLR_DATA_PIN();
	//	TOSH_MAKE_DATA_OUTPUT();
	//	TOSH_SET_NSS_CONFIG_PIN();
	//	TOSH_MAKE_NSS_CONFIG_OUTPUT();
	//	TOSH_CLR_IRQ0_PIN();
	//	TOSH_MAKE_IRQ0_OUTPUT();
	//	TOSH_CLR_IRQ1_PIN();
	//	TOSH_MAKE_IRQ1_OUTPUT();
	//	TOSH_CLR_SW_RX_PIN();
	//	TOSH_MAKE_SW_RX_OUTPUT();
	//	TOSH_CLR_SW_TX_PIN();
	//	TOSH_MAKE_SW_TX_OUTPUT();
	TOSH_MAKE_POR_INPUT();

	// SPI0
	TOSH_CLR_SCK_PIN();
	TOSH_MAKE_SCK_OUTPUT();
	
	// antenna switch
	//	TOSH_CLR_SW0_PIN();
	//	TOSH_MAKE_SW0_OUTPUT();
	//	TOSH_CLR_SW1_PIN();
	//	TOSH_MAKE_SW1_OUTPUT();

	// optional temperature sensor
	TOSH_CLR_TEMPE_PIN();
	TOSH_MAKE_TEMPE_OUTPUT();
	TOSH_MAKE_TEMP_INPUT();
	TOSH_SEL_TEMP_MODFUNC();

	// voltage supply monitor
	TOSH_SET_NVSUPE_PIN();
	TOSH_MAKE_NVSUPE_INPUT();
	TOSH_MAKE_VSUP_INPUT();
	TOSH_SEL_VSUP_MODFUNC();

	// voltage regulator
	TOSH_SET_NREGE_PIN();			// disable regulator for low power mode
	TOSH_MAKE_NREGE_OUTPUT();

	//UART PINS
	TOSH_MAKE_UTXD1_INPUT();
	TOSH_MAKE_URXD1_INPUT();
	TOSH_SEL_UTXD1_IOFUNC();

	// External FLASH
	TOSH_SET_FLASH_RST_PIN();
	TOSH_MAKE_FLASH_RST_OUTPUT();
	TOSH_SET_FLASH_CS_PIN();
	TOSH_MAKE_FLASH_CS_OUTPUT();
		
	//PROG PINS
	TOSH_MAKE_PROG_RX_INPUT();
	TOSH_MAKE_PROG_TX_INPUT();

	// ROSC PIN
	TOSH_SET_ROSC_PIN();
	TOSH_MAKE_ROSC_OUTPUT();

	// set unconnected pins to avoid instability
	TOSH_SET_NOT_CONNECTED1_PIN();
	TOSH_SET_NOT_CONNECTED2_PIN();
	TOSH_SET_NOT_CONNECTED3_PIN();
	TOSH_SET_NOT_CONNECTED4_PIN();
	TOSH_SET_NOT_CONNECTED5_PIN();
	TOSH_MAKE_NOT_CONNECTED1_OUTPUT();
	TOSH_MAKE_NOT_CONNECTED2_OUTPUT();
	TOSH_MAKE_NOT_CONNECTED3_OUTPUT();
	TOSH_MAKE_NOT_CONNECTED4_OUTPUT();
	TOSH_MAKE_NOT_CONNECTED5_OUTPUT();
}

#endif // _H_hardware_h

tinyos-2.1.2+dfsg/tos/platforms/tinynode/platform.h000066400000000000000000000000001207233610700224110ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/tinynode/platform_message.h000066400000000000000000000041761207233610700241370ustar00rootroot00000000000000/* 
 * Copyright (c) 2005, Ecole Polytechnique Federale de Lausanne (EPFL)
 * and Shockfish SA, Switzerland.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
 *   and Shockfish SA, nor the names of its contributors may be used to 
 *   endorse or promote products derived from this software without 
 *   specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * ========================================================================
 */

#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include "XE1205.h"
#include "Serial.h"

typedef union message_header {
  xe1205_header_t xe1205;
  serial_header_t serial;
} message_header_t;

typedef union message_footer {
  xe1205_footer_t xe1205;
} message_footer_t;

typedef union message_metadata {
  xe1205_metadata_t xe1205;
  serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/ucmini/000077500000000000000000000000001207233610700200615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/ucmini/.platform000066400000000000000000000031461207233610700217120ustar00rootroot00000000000000
  push( @includes, qw(

  %T/platforms/ucmini
  %T/platforms/ucmini/chips/cp2102    
  %T/platforms/ucmini/chips/stm25p
  %T/platforms/ucmini/chips/sht21
  %T/platforms/ucmini/chips/bh1750fvi
  %T/platforms/ucmini/chips/ms5607
  %T/platforms/ucmini/chips/bma180
  %T/chips/atm128rfa1
  %T/chips/atm128rfa1/adc
  %T/chips/atm128rfa1/pins
  %T/chips/atm128rfa1/sensors
  %T/chips/atm128rfa1/timer
  %T/chips/atm128rfa1/radio
  %T/chips/atm128rfa1/i2c  
  %T/chips/atm128rfa1/spi
  %T/chips/atm1281
  %T/chips/atm1281/adc
  %T/chips/atm128
  %T/chips/atm128/adc
  %T/chips/atm128/spi
  %T/chips/atm128/i2c
  %T/chips/atm128/timer
  %T/chips/cp2102
  %T/chips/stm25p
  %T/chips/sht21
  %T/chips/bh1750fvi
  %T/chips/ms5607
  %T/chips/bma180
  %T/lib/timer
  %T/lib/serial
  %T/lib/power
  %T/lib/rfxlink/layers
  %T/lib/rfxlink/util
  %T/lib/diagmsg

  ) );

  @opts = qw(

  -gcc=avr-gcc
  -mmcu=atmega128rfa1
  -fnesc-target=avr
  -fnesc-no-debug
  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask

  );

$ENV{'CIL_MACHINE'} =
    "version_major=4 " .
    "version_minor=1 " .
    "version=avr-4.1.2 " .
    "short=2,1, " .
    "int=2,1 " .
    "long=4,1 " .
    "long_long=8,1 " .
    "pointer=2,1 " .
    "enum=2,1 " .
    "float=4,1 " .
    "double=4,1 " .
    "long_double=4,1 " .
    "void=1,1 " .
    "fun=1,1 " .
    "wchar_size_size=2,2 " .
    "alignof_string=1 " .
    "max_alignment=1 " .
    "char_wchar_signed=true,true " .
    "const_string_literals=true " .
    "big_endian=false " .
    "underscore_name=false " .
    "__builtin_va_list=true " .
    "__thread_is_keyword=true";
tinyos-2.1.2+dfsg/tos/platforms/ucmini/ActiveMessageC.nc000066400000000000000000000037231207233610700232330ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Miklos Maroti
 */

#include 

configuration ActiveMessageC
{
	provides
	{
		interface SplitControl;

		interface AMSend[uint8_t id];
		interface Receive[uint8_t id];
		interface Receive as Snoop[uint8_t id];
		interface SendNotifier[am_id_t id];

		interface Packet;
		interface AMPacket;

		interface PacketAcknowledgements;
		interface LowPowerListening;
		interface PacketLink;

		interface PacketTimeStamp as PacketTimeStampRadio;
		interface PacketTimeStamp as PacketTimeStampMilli;
	}
}

implementation
{
	components RFA1ActiveMessageC as MessageC;

	SplitControl = MessageC;

	AMSend = MessageC;
	Receive = MessageC.Receive;
	Snoop = MessageC.Snoop;
	SendNotifier = MessageC;

	Packet = MessageC;
	AMPacket = MessageC;

	PacketAcknowledgements = MessageC;
	LowPowerListening = MessageC;
	PacketLink = MessageC;

	PacketTimeStampRadio = MessageC;
	PacketTimeStampMilli = MessageC;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/DemoSensorC.nc000066400000000000000000000033551207233610700225720ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo
 */

generic configuration DemoSensorC() {
  provides interface Read;
}
implementation {
  components Sht21C as Sensor;
  Read = Sensor.Temperature;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/DemoSensorNowC.nc000066400000000000000000000035001207233610700232460ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo
 */

generic configuration DemoSensorNowC() {
  provides interface Resource;
  provides interface ReadNow;
}
implementation {
  components new AtmegaVoltageNowC() as DemoSensorC;

  Resource = DemoSensorC;
  ReadNow = DemoSensorC; 
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/DemoSensorStreamC.nc000066400000000000000000000034271207233610700237460ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo
 */

generic configuration DemoSensorStreamC() {
  provides interface ReadStream;
}
implementation {
  components new AtmegaTemperatureStreamC() as DemoSensorC;

  ReadStream = DemoSensorC; 
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/HplSerialAutoControlC.nc000066400000000000000000000037041207233610700245670ustar00rootroot00000000000000/** Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/

configuration HplSerialAutoControlC {
  provides interface GpioInterrupt;
  provides interface GeneralIO;
}
implementation {
  components AtmegaPinChange0C, AtmegaGeneralIOC as IO;
  #if ( defined(SERIAL_AUTO_VDD) || UCMINI_REV==49 )
    GpioInterrupt = AtmegaPinChange0C.GpioInterrupt[7];
    GeneralIO = IO.PortB7;
  #else
    GpioInterrupt = AtmegaPinChange0C.GpioInterrupt[5];
    GeneralIO = IO.PortB5;
  #endif
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/I2CBusPowerManagerC.nc000066400000000000000000000035511207233610700240510ustar00rootroot00000000000000/*
* Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/

configuration I2CBusPowerManagerC{
  provides interface BusPowerManager;
}
implementation{
  components AtmegaGeneralIOC as IO, new BusPowerManagerC(TRUE, FALSE);
  #if UCMINI_REV == 49
    BusPowerManagerC.GeneralIO->IO.PortF2;
  #else
    BusPowerManagerC.GeneralIO->IO.PortF1;
  #endif
  BusPowerManager=BusPowerManagerC;
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/Leds.nc000066400000000000000000000115661207233610700213030ustar00rootroot00000000000000// $Id: Leds.nc,v 1.1 2010-11-18 21:57:02 andrasbiro Exp $

/*
 * Copyright (c) 2006 ETH Zurich. 
 * Copyright (c) 2005-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Commands for controlling three LEDs. A platform can provide this
 * interface if it has more than or fewer than three LEDs. In the
 * former case, these commands refer to the first three LEDs. In the
 * latter case, some of the commands are null operations, and the set
 * of non-null operations must be contiguous and start at Led1. That
 * is, on platforms with 2 LEDs, LED 3's commands are null operations,
 * while on platforms with 1 LED, LED 2 and LED 3's commands are null
 * opertations.
 *
 * @author Joe Polastre
 * @author Philip Levis
 * @author Jan Beutel
 */

#include "Leds.h"

interface Leds {

  /**
   * Turn on LED 0. The color of this LED depends on the platform.
   */
  async command void led0On();

  /**
   * Turn off LED 0. The color of this LED depends on the platform.
   */
  async command void led0Off();

  /**
   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led0Toggle();

  /**
   * Turn on LED 1. The color of this LED depends on the platform.
   */
  async command void led1On();

  /**
   * Turn off LED 1. The color of this LED depends on the platform.
   */
  async command void led1Off();

   /**
   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led1Toggle();

 
  /**
   * Turn on LED 2. The color of this LED depends on the platform.
   */
  async command void led2On();

  /**
   * Turn off LED 2. The color of this LED depends on the platform.
   */
  async command void led2Off();

   /**
   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led2Toggle();


  /**
   * Turn on LED 3. The color of this LED depends on the platform.
   */
  async command void led3On();

  /**
   * Turn off LED 3. The color of this LED depends on the platform.
   */
  async command void led3Off();

   /**
   * Toggle LED 3; if it was off, turn it on, if was on, turn it off.
   * The color of this LED depends on the platform.
   */
  async command void led3Toggle();


  /**
   * Get the current LED settings as a bitmask. Each bit corresponds to
   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
   * also use the enums LED_LED0, LED_LED1. For example, this expression
   * will determine whether LED 2 is on:
   *
   * 
         (call Leds.get() & LEDS_LED2) 
        
   *
   * This command supports up to 8 LEDs; if a platform has fewer, then
   * those LEDs should always be off (their bit is zero). Also see
   * set().
   */ 
  async command uint8_t get();

  
  /**
   * Set the current LED configuration using a bitmask.  Each bit
   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
   * this statement will configure the LEDs so LED 0 and LED 2 are on:
   *
   * 
         call Leds.set(LEDS_LED0 | LEDS_LED2); 
        
   *
   * This statement will turn LED 1 on if it was not already:
   *
   * 
        call Leds.set(call Leds.get() | LEDS_LED1);
        
   */
   async command void set(uint8_t val);
  
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/LedsC.nc000066400000000000000000000040461207233610700214010ustar00rootroot00000000000000// $Id: LedsC.nc,v 1.1 2010-11-18 21:57:02 andrasbiro Exp $

/*
 * Copyright (c) 2006 ETH Zurich.  
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 * @author Joe Polastre
 * @author Jan Beutel
 */


configuration LedsC {
  provides interface Leds;
}
implementation {
  components LedsP, PlatformLedsC;

  Leds = LedsP;

  LedsP.Init <- PlatformLedsC.Init;
  LedsP.Led0 -> PlatformLedsC.Led0;
  LedsP.Led1 -> PlatformLedsC.Led1;
  LedsP.Led2 -> PlatformLedsC.Led2;
  LedsP.Led3 -> PlatformLedsC.Led3;
}

tinyos-2.1.2+dfsg/tos/platforms/ucmini/LedsP.nc000066400000000000000000000105131207233610700214120ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.2 2010-11-18 21:57:02 andrasbiro Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 * @date   March 21, 2005
 */

module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
    interface GeneralIO as Led3;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led3.makeOutput();
      call Led0.clr();
      call Led1.clr();
      call Led2.clr();
      call Led3.clr();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
    call Led1.set();
    DBGLED(1);
  }

  async command void Leds.led1Off() {
    call Led1.clr();
    DBGLED(1);
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    DBGLED(1);
  }

  async command void Leds.led2On() {
    call Led2.set();
    DBGLED(2);
  }

  async command void Leds.led2Off() {
    call Led2.clr();
    DBGLED(2);
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    DBGLED(2);
  }

  async command void Leds.led3On() {
    call Led3.set();
    DBGLED(2);
  }

  async command void Leds.led3Off() {
    call Led3.clr();
    DBGLED(3);
  }

  async command void Leds.led3Toggle() {
    call Led3.toggle();
    DBGLED(3);
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (call Led0.get()) {
	rval |= LEDS_LED0;
      }
      if (call Led1.get()) {
	rval |= LEDS_LED1;
      }
      if (call Led2.get()) {
	rval |= LEDS_LED2;
      }
      if (call Led3.get()) {
	rval |= LEDS_LED3;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	call Leds.led0On();
      }
      else {
	call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
	call Leds.led1On();
      }
      else {
	call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
	call Leds.led2On();
      }
      else {
	call Leds.led2Off();
      }
      if (val & LEDS_LED3) {
	call Leds.led3On();
      }
      else {
	call Leds.led3Off();
      }

    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/LocalIeeeEui64C.nc000066400000000000000000000044761207233610700231600ustar00rootroot00000000000000// $Id: LocalIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.* All rights reserved.
 *
 *  Stephen Dawson-Haggerty 
 *  Dummy Extended Address for micaz
 */

#include "IeeeEui64.h"

module LocalIeeeEui64C {
  provides interface LocalIeeeEui64;
} implementation {
  command ieee_eui64_t LocalIeeeEui64.getId() {
    ieee_eui64_t id;
    /* this is UCB's OUI */
    id.data[0] = 0x00;
    id.data[1] = 0x12;
    id.data[2] = 0x6d;

    /* UCB will let anyone use this OUI so long as these two octets
       are 'LO' -- "local".  All other octets are reserved.  */
    /* SDH -- 9/10/2010 */
    id.data[3] = 'L';
    id.data[4] = 'O';

    id.data[5] = 0;
    id.data[6] = TOS_NODE_ID >> 8;
    id.data[7] = TOS_NODE_ID & 0xff;
    return id;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/NoLedsC.nc000066400000000000000000000052241207233610700216750ustar00rootroot00000000000000// $Id: NoLedsC.nc,v 1.1 2010-11-19 10:02:09 andrasbiro Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * A null operation replacement for the LedsC component. As many
 * components might concurrently signal information through LEDs,
 * using LedsC and NoLedsC allows an application builder to select
 * which components control the LEDs.
 *
 * @author Philip Levis
 * @date   March 19, 2005
 */

module NoLedsC {
  provides interface Init;
  provides interface Leds;
}
implementation {

  command error_t Init.init() {return SUCCESS;}

  async command void Leds.led0On() {}
  async command void Leds.led0Off() {}
  async command void Leds.led0Toggle() {}

  async command void Leds.led1On() {}
  async command void Leds.led1Off() {}
  async command void Leds.led1Toggle() {}

  async command void Leds.led2On() {}
  async command void Leds.led2Off() {}
  async command void Leds.led2Toggle() {}
  
  async command void Leds.led3On() {}
  async command void Leds.led3Off() {}
  async command void Leds.led3Toggle() {}

  async command uint8_t Leds.get() {return 0;}
  async command void Leds.set(uint8_t val) {}
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/PlatformC.nc000066400000000000000000000043021207233610700222710ustar00rootroot00000000000000/*
 * Copyright (c) 2010, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

configuration PlatformC
{
  provides
  {
    interface Init;
    interface Atm128Calibrate; // TODO: should be moved to McuInitC
  }

  uses interface Init as LedsInit;
}
implementation
{
  //initialization
  components PlatformP, McuInitC, MeasureClockC;
  Init = PlatformP;
  LedsInit = PlatformP.LedsInit;
  PlatformP.McuInit -> McuInitC;
  Atm128Calibrate = MeasureClockC;

  //turning off unused components
  components Stm25pOffC;
  PlatformP.Stm25pInit -> Stm25pOffC;
  
  #ifndef DISABLE_SERIAL_AUTO
    components SerialAutoControlC;
  #endif
  #ifndef DISABLE_SERIAL_RESET
    components SerialResetC;
  #endif
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/PlatformLed.h000066400000000000000000000034221207233610700224440ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

#ifndef PLATFORMLED_H
#define PLATFORMLED_H

#define PLATFORM_LED_COUNT 4

#define PLATFORM_LED_RED 0
#define PLATFORM_LED_GREEN 1
#define PLATFORM_LED_YELLOW 2
#define PLATFORM_LED_ORANGE 3

#endif PLATFORMLED_H

tinyos-2.1.2+dfsg/tos/platforms/ucmini/PlatformLedC.nc000066400000000000000000000037151207233610700227250ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

/** Defines the Led and MultiLed interfaces in terms of the underlying
 * LedsC component.
 *
 * @author Peter A. Bigot 
 */
configuration PlatformLedC {
  provides {
    interface MultiLed;
    interface Led[uint8_t led_id];
  }
} implementation {
  components LedsC;
  components PlatformLedP;

  MultiLed = PlatformLedP;
  Led = PlatformLedP;
  PlatformLedP.Leds -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/PlatformLedP.nc000066400000000000000000000064401207233610700227400ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

/** Defines the Led and MultiLed interfaces in terms of the underlying
 * LedsC component.
 *
 * @author Peter A. Bigot 
 */
module PlatformLedP {
  provides {
    interface MultiLed;
    interface Led[uint8_t led_id];
  }
  uses {
    interface Leds;
  }
} implementation {

  async command void Led.on[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0On(); break;
      case 1: call Leds.led1On(); break;
      case 2: call Leds.led2On(); break;
      case 3: call Leds.led3On(); break;
    }
  }

  async command void Led.off[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0Off(); break;
      case 1: call Leds.led1Off(); break;
      case 2: call Leds.led2Off(); break;
      case 3: call Leds.led3Off(); break;
    }
  }

  async command void Led.set[ uint8_t led_id ] (bool turn_on)
  {
    if (turn_on) {
      call Led.on[led_id]();
    } else {
      call Led.off[led_id]();
    }
  }

  async command void Led.toggle[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0Toggle(); break;
      case 1: call Leds.led1Toggle(); break;
      case 2: call Leds.led2Toggle(); break;
      case 3: call Leds.led3Toggle(); break;
    }
  }

  async command unsigned int MultiLed.get () { return call Leds.get(); }

  async command void MultiLed.set (unsigned int val) { call Leds.set(val); }

  async command void MultiLed.on (unsigned int led_id) { call Led.on[led_id](); }

  async command void MultiLed.off (unsigned int led_id) { call Led.off[led_id](); }

  async command void MultiLed.setSingle (unsigned int led_id, bool turn_on) { call Led.set[led_id](turn_on); }

  async command void MultiLed.toggle (unsigned int led_id) { call Led.toggle[led_id](); }

}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/PlatformLedsC.nc000066400000000000000000000043631207233610700231100ustar00rootroot00000000000000/* Copyright (c) 2009, Distributed Computing Group (DCG), ETH Zurich.
*  All rights reserved.
*
*  Redistribution and use in source and binary forms, with or without
*  modification, are permitted provided that the following conditions
*  are met:
*
*  1. Redistributions of source code must retain the above copyright
*     notice, this list of conditions and the following disclaimer.
*  2. Redistributions in binary form must reproduce the above copyright
*     notice, this list of conditions and the following disclaimer in the
*     documentation and/or other materials provided with the distribution.
*  3. Neither the name of the copyright holders nor the names of
*     contributors may be used to endorse or promote products derived
*     from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
*  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
*  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS
*  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
*  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA,
*  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
*  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
*  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
*  THE POSSIBILITY OF SUCH DAMAGE.
*
*  @author Roland Flury 
*  @author Philipp Sommer 
*  @author Richard Huber 
*  @author Thomas Fahrni 
*  @author Gabor Salamon 
*/

configuration PlatformLedsC
{
  provides
  {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
    interface GeneralIO as Led3;
  }

  uses interface Init;
}

implementation
{
  components AtmegaGeneralIOC as IO;

  components PlatformC;
  Init = PlatformC.LedsInit;
#if UCMINI_REV == 49
  Led0 = IO.PortE5;
  Led1 = IO.PortE6;
  Led2 = IO.PortE7;
  Led3 = IO.PortE3;
#else 
  Led0 = IO.PortE4;
  Led1 = IO.PortE5;
  Led2 = IO.PortE6;
  Led3 = IO.PortE7;
#endif
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/PlatformP.nc000066400000000000000000000041301207233610700223050ustar00rootroot00000000000000/*
 * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Crossbow Technology nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Martin Turon 
 * @author Miklos Maroti
 */

#include "hardware.h"

module PlatformP @safe()
{
  provides interface Init;

  uses
  {
    interface Init as McuInit;
    interface Init as LedsInit;
    interface Init as Stm25pInit; 
  }
}

implementation
{
  command error_t Init.init()
  {
    error_t ok;

    ok = call McuInit.init();
    ok = ecombine(ok, call Stm25pInit.init());
    ok = ecombine(ok, call LedsInit.init());

    return ok;
  }

  default command error_t LedsInit.init() { return SUCCESS; }
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/PlatformSerialC.nc000066400000000000000000000040211207233610700234270ustar00rootroot00000000000000/*
 * Copyright (c) 2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Alec Woo 
 * @author Jonathan Hui 
 * @version $Revision: 1.3 $ $Date: 2010-10-26 09:27:59 $
 */

configuration PlatformSerialC
{
  provides interface StdControl;
  provides interface UartStream;
  provides interface UartByte;
}

implementation
{
  components Atm128Uart1C as UartC;//1
  StdControl = UartC;
  UartStream = UartC;
  UartByte = UartC;
  
  components CounterMicro32C;
  UartC.Counter -> CounterMicro32C;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/RCCalibrate.nc000066400000000000000000000032501207233610700225160ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo
 */

interface RCCalibrate {
	async command void calibrateInternalRC(uint32_t HzToCalib);
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/RCCalibrateP.nc000066400000000000000000000131141207233610700226360ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo
 */

module RCCalibrateP {
	provides interface RCCalibrate;
}
implementation {
	enum {
    XTAL_FREQUENCY = 32768,
    EXTERNAL_TICKS = 100,
    DEFAULT_OSCCAL_MASK = 0x00,
    DEFAULT_OSCCAL_MASK_HIGH = 0x80,
    OSCCAL_BITS = 7,
  };

  enum {
    LOOP_CYCLES = 7,
  };

  #define CALIBRATION_METHOD_SIMPLE

  unsigned char neighborsSearched;
  //! The binary search step size
  unsigned char calStep;
  //! The lowest difference between desired and measured counter value
  unsigned char bestCountDiff = 0xFF;
  //! Stores the lowest difference between desired and measured counter value for the first search
  unsigned char bestCountDiff_first;
  //! The OSCCAL value corresponding to the bestCountDiff
  unsigned char bestOSCCAL;
  //! Stores the OSCCAL value corresponding to the bestCountDiff for the first search
  unsigned char bestOSCCAL_first;
  //! The desired counter value
  unsigned int countVal;
  //! Calibration status
  unsigned int calibration;
  //! Stores the direction of the binary step (-1 or 1)
  signed char sign;

  uint32_t calibrationFrequency;


  #define DEFAULT_OSCCAL_HIGH ((1 << (OSCCAL_BITS - 1)) | DEFAULT_OSCCAL_MASK_HIGH)
  #define INITIAL_STEP         (1 << (OSCCAL_BITS - 2))
  #define DEFAULT_OSCCAL      ((1 << (OSCCAL_BITS - 1)) | DEFAULT_OSCCAL_MASK)
  
  inline void prepareCalibration(void) { calStep = INITIAL_STEP; calibration = 0; }

  #define COMPUTE_COUNT_VALUE() \
  countVal = ((EXTERNAL_TICKS*calibrationFrequency)/(XTAL_FREQUENCY*LOOP_CYCLES));
    
  // Set up timer to be ASYNCHRONOUS from the CPU clock with a second EXTERNAL 32,768kHz CRYSTAL driving it. No prescaling on asynchronous timer.
  #define SETUP_ASYNC_TIMER() \
  ASSR |= (1< countVal)
      OSCCAL--;                                                 // If count is more than count value corresponding to the given frequency:
    NOP();                                                      // - decrease speed
    if (count < countVal)
      OSCCAL++;
    NOP();                                                      // If count is less: - increase speed
    if (count == countVal)
      cycles=1;			
  } while(--cycles);                                            // Calibrate using 128(0x80) calibration cycles

  #else
  #endif
  }

  async command void RCCalibrate.calibrateInternalRC(uint32_t HzToCalib) {
    calibrationFrequency = HzToCalib;
    
    CalibrationInit();
    prepareCalibration();
    CalibrateInternalRc();
  }          

}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/README000066400000000000000000000015201207233610700207370ustar00rootroot00000000000000The ucmini platform has the following configuration options:
DISABLE_SERIAL_AUTO
You can disable the automatic serial control by defining this
DISABLE_SERIAL_RESET
You can disable the automatic serial reset by defining this
SERIAL_AUTO_VDD
You can change the automatic serial control detection mode by defining this: If you define this, the serial control
checks the usb power, otherwise it checks the usb suspend signal (if you define this, the serial stack turns on if
you plug your mote to a usb charger)
UCMINI_REV
The ucmini revison you use, multiplied by 100. Known revisions (default is the highest):
49: testboard
52: new ldo, accelerometer, leds moved, usb detection and Vbatt measurment changed
53: accelerometer connection changed
100: usb detection changed, pull-up resistors on i2c bus
101: switchable power for flash chip, user buttontinyos-2.1.2+dfsg/tos/platforms/ucmini/RadioConfig.h000066400000000000000000000057551207233610700224320ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Vanderbilt University
 * Copyright (c) 2010, Univeristy of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 * Author: Andras Biro
 */

#ifndef __RADIOCONFIG_H__
#define __RADIOCONFIG_H__

#include 
#include "TimerConfig.h"

enum
{
	/**
	 * This is the default value of the CCA_MODE field in the PHY_CC_CCA register
	 * which is used to configure the default mode of the clear channel assesment
	 */
	RFA1_CCA_MODE_VALUE = CCA_CS<HplSerialAutoControlC.GpioInterrupt;
  SerialAutoControlP.ControlPin->HplSerialAutoControlC.GeneralIO;
  SerialAutoControlP.SplitControl->SerialActiveMessageC;
  MainC.SoftwareInit -> SerialAutoControlP;
  #ifdef SERIAL_AUTO_DEBUG
    components LedsC;
    SerialAutoControlP.Leds->LedsC;
  #endif
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/SerialAutoControlP.nc000066400000000000000000000062341207233610700241410ustar00rootroot00000000000000/** Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/
module SerialAutoControlP{
  uses interface SplitControl;
  uses interface GpioInterrupt as ControlInt;
  uses interface GeneralIO as ControlPin;
  provides interface Init as SoftwareInit;
  #ifdef SERIAL_AUTO_DEBUG
  uses interface Leds;
  #endif
}
implementation{
  
  bool isSerialOn;
  
  task void turnOn(){
    error_t err=call SplitControl.start();  
    if(err!=SUCCESS&&err!=EALREADY)
      post turnOn();
    else{
      #ifdef SERIAL_AUTO_DEBUG
      call Leds.led3On();
      #endif
    }
  }
  
  task void turnOff(){
    error_t err=call SplitControl.stop();
    if(err!=SUCCESS&&err!=EALREADY)
      post turnOff();
    else{
      #ifdef SERIAL_AUTO_DEBUG
      call Leds.led3Off();
      #endif
    }
  }
  
  event void SplitControl.startDone(error_t err){
    if(err!=SUCCESS)
      call SplitControl.start();
  }
  
  event void SplitControl.stopDone(error_t err){
    if(err!=SUCCESS)
      call SplitControl.stop();
  }
  
  
  command error_t SoftwareInit.init(){
    if(call ControlPin.get()){
      isSerialOn=TRUE;
      post turnOn();
      call ControlInt.enableFallingEdge();
    } else {
      isSerialOn=FALSE;
      post turnOff();
      call ControlInt.enableRisingEdge();
    }     
    return SUCCESS;
  }
  
  async event void ControlInt.fired(){
    bool pinState=call ControlPin.get();
    if(pinState && !isSerialOn ){
      isSerialOn=TRUE;
      post turnOn();
      call ControlInt.enableFallingEdge();
    } else if ( !pinState && isSerialOn){
      isSerialOn=FALSE;
      post turnOff();
      call ControlInt.enableRisingEdge();
    }     
    #ifdef SERIAL_AUTO_DEBUG
    call Leds.led0Toggle();
    #endif
  }
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/SerialResetC.nc000066400000000000000000000036761207233610700227440ustar00rootroot00000000000000/** Copyright (c) 2010, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Miklos Maroti
*/

// just to make sure that fastserial can get its include file
#include "Serial.h"

configuration SerialResetC
{
}

implementation
{ 
	components SerialResetP, LedsC, SerialDispatcherC, MainC, PlatformSerialC;

	SerialResetP.Leds -> LedsC;
	SerialResetP.Send -> SerialDispatcherC.Send[0x72];
	SerialResetP.Receive -> SerialDispatcherC.Receive[0x72];
	SerialDispatcherC.SerialPacketInfo[0x72] -> SerialResetP;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/SerialResetP.nc000066400000000000000000000053141207233610700227500ustar00rootroot00000000000000/** Copyright (c) 2010, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Miklos Maroti
*/

module SerialResetP
{
	provides 
	{
		interface SerialPacketInfo;
	}

	uses
	{
		interface Send;
		interface Receive;
		interface Leds;
	}
}

implementation
{
	// this is dirty, but we do to save ram
	message_t* sendMsg;

	task void sendAck()
	{
		uint8_t* p = (uint8_t*)sendMsg;

		p[0] = 'Z';
		p[1] = 'B';
		p[2] = 'P';

		if( call Send.send(sendMsg, 3) != SUCCESS )
			post sendAck();
	}

	event void Send.sendDone(message_t* msg, error_t error)
	{
		if( error != SUCCESS )
			post sendAck();
		else
		{
			//void (*bootloader)( void ) = (void*) BOOTLOADER_ADDRESS;
			atomic
			{
				//bootloader();
				wdt_enable(1);
				while(1);
			}
		}
	}

	event message_t * Receive.receive(message_t *msg, void *payload, uint8_t len)
	{
		uint8_t* p = (uint8_t*)msg;

		if( len == 3 && p[0] == 'R' && p[1] == 'S' && p[2] == 'T' )
		{
			sendMsg = msg;
			post sendAck();
		}

		return msg;
	}

	async command uint8_t SerialPacketInfo.offset()
	{
		return 0;
	}

	async command uint8_t SerialPacketInfo.dataLinkLength(message_t* msg, uint8_t upperLen)
	{
		return upperLen;
	}

	async command uint8_t SerialPacketInfo.upperLength(message_t* msg, uint8_t dataLinkLen)
	{
		return dataLinkLen;
	}
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/TimeSyncMessageC.nc000066400000000000000000000044441207233610700235540ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 * Author: Miklos Maroti
 */

#include 

configuration TimeSyncMessageC
{
	provides
	{
		interface SplitControl;

		interface Receive[uint8_t id];
		interface Receive as Snoop[am_id_t id];
		interface Packet;
		interface AMPacket;
		interface PacketAcknowledgements;
		interface LowPowerListening;

		interface PacketTimeStamp as PacketTimeStampRadio;
		interface TimeSyncAMSend as TimeSyncAMSendRadio[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketRadio;

		interface PacketTimeStamp as PacketTimeStampMilli;
		interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
		interface TimeSyncPacket as TimeSyncPacketMilli;
	}
}

implementation
{
	components RFA1TimeSyncMessageC as MessageC;
  
	SplitControl	= MessageC;
  	Receive		= MessageC.Receive;
	Snoop		= MessageC.Snoop;
	Packet		= MessageC;
	AMPacket	= MessageC;
	PacketAcknowledgements	= MessageC;
	LowPowerListening	= MessageC;

	PacketTimeStampRadio	= MessageC;
	TimeSyncAMSendRadio	= MessageC;
	TimeSyncPacketRadio	= MessageC;

	PacketTimeStampMilli	= MessageC.PacketTimeStampMilli;
	TimeSyncAMSendMilli	= MessageC.TimeSyncAMSendMilli;
	TimeSyncPacketMilli	= MessageC.TimeSyncPacketMilli;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/UserButton.h000066400000000000000000000035121207233610700223450ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

#ifndef USERBUTTON_H
#define USERBUTTON_H

typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/ucmini/UserButtonC.nc000066400000000000000000000040131207233610700226160ustar00rootroot00000000000000/** Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/
#include 
#if defined(UCMINI_REV) && !(UCMINI_REV>=100)
#error "There's no button on the ucmini rev<1.0"
#endif
configuration UserButtonC {
  provides interface Get;
  provides interface Notify;
}
implementation{
  components UserButtonP, AtmegaPinChange0C, AtmegaGeneralIOC as IO, MainC;
  UserButtonP->AtmegaPinChange0C.GpioInterrupt[4];
  UserButtonP->IO.PortB4;
  MainC.SoftwareInit->UserButtonP;
  Get=UserButtonP;
  Notify=UserButtonP;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/UserButtonP.nc000066400000000000000000000054171207233610700226440ustar00rootroot00000000000000/** Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/
#include 
module UserButtonP{
  uses interface GpioInterrupt as Irq;
  uses interface GeneralIO as Io;
  provides interface Init;
  provides interface Get;
  provides interface Notify;
}
implementation{
  
  bool prevState;
  
  command error_t Init.init(){
    call Io.set();
    return SUCCESS;
  }
  
  command button_state_t Get.get() { 
    if(!call Io.get())
      return BUTTON_PRESSED;
    else
      return BUTTON_RELEASED;
  }
  
  command error_t Notify.enable(){
    atomic {
      prevState=call Io.get();
      if(prevState)
        call Irq.enableFallingEdge();
      else
        call Irq.enableRisingEdge();
    }
    return SUCCESS;
  }
  
  command error_t Notify.disable(){
    call Irq.disable();
    return SUCCESS;
  }
  
  task void NotifyReleased(){
    signal Notify.notify( BUTTON_RELEASED );
  }
  
  task void NotifyPressed(){
    signal Notify.notify( BUTTON_PRESSED );
  }
  
  async event void Irq.fired(){
    bool pinState=call Io.get(); 
    if(prevState!=pinState){
      prevState=pinState;
      if(pinState){
        call Irq.enableFallingEdge();
        post NotifyReleased();
      }else{
        call Irq.enableRisingEdge();
        post NotifyPressed();
      }
    }
  }
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/000077500000000000000000000000001207233610700211675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/bh1750fvi/000077500000000000000000000000001207233610700226025ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/bh1750fvi/HplBh1750C.nc000066400000000000000000000036161207233610700245470ustar00rootroot00000000000000/*
* Copyright (c) 2010, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zsolt Szabo, Andras Biro
*/

configuration HplBh1750C {
  provides interface I2CPacket;
  provides interface Resource;
  provides interface BusPowerManager;
}
implementation {

  components new Atm128I2CMasterC() as I2CBus, Bh1750fviC, I2CBusPowerManagerC;

  I2CPacket = I2CBus.I2CPacket;
  Resource  = I2CBus.Resource;
  BusPowerManager = I2CBusPowerManagerC;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/bh1750fvi/LightC.nc000066400000000000000000000033021207233610700242740ustar00rootroot00000000000000/*
* Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/

generic configuration LightC()
{
  provides interface Read;
}
implementation
{
  components new Bh1750fviRawLightC();
  
  Read=Bh1750fviRawLightC;
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/bma180/000077500000000000000000000000001207233610700221575ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/bma180/HplBma180C.nc000066400000000000000000000040411207233610700241770ustar00rootroot00000000000000/*
* Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zsolt Szabo
*/


configuration HplBma180C{
  provides interface GeneralIO as CSN;
  provides interface GeneralIO as PWR;
  provides interface GpioInterrupt as ACCINT;
  provides interface FastSpiByte;
  provides interface Resource;
}
implementation {
  components AtmegaGeneralIOC as IO, AtmegaPinChange0C, Atm128rfa1Usart0SpiC; 

  CSN = IO.PortD7;
  PWR = IO.PortE3;
  ACCINT= AtmegaPinChange0C.GpioInterrupt[6];
  Resource=Atm128rfa1Usart0SpiC.Resource[unique("Atm128SpiC.Resource")];
  FastSpiByte=Atm128rfa1Usart0SpiC;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/ms5607/000077500000000000000000000000001207233610700221305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/ms5607/HplMs5607C.nc000066400000000000000000000037241207233610700241300ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo
 */

configuration HplMs5607C {
  provides interface I2CPacket ;
  provides interface Resource;
  provides interface BusPowerManager;
}
implementation {
  
  components new Atm128I2CMasterC() as I2CBus;
  
  I2CPacket = I2CBus.I2CPacket;
  Resource  = I2CBus.Resource;
  components I2CBusPowerManagerC; //new DummyBusPowerManagerC();
  BusPowerManager = I2CBusPowerManagerC;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/ms5607/PressureC.nc000066400000000000000000000035471207233610700243760ustar00rootroot00000000000000/*
* Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/

generic configuration PressureC()
{
  provides interface Read;
  //You can't use the following interfaces if you're waiting for any readDone
  provides interface Set as SetPrecision;  
}
implementation
{
  components new Ms5607PressureC();
  SetPrecision=Ms5607PressureC;
  
  Read=Ms5607PressureC.Read;
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/sht21/000077500000000000000000000000001207233610700221305ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/sht21/HplSht21C.nc000066400000000000000000000036651207233610700241340ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo, Andras Biro
 */

configuration HplSht21C {
  provides interface I2CPacket ;
  provides interface Resource; 
  provides interface BusPowerManager;
}
implementation {
  
  components new Atm128I2CMasterC() as I2CBus, I2CBusPowerManagerC;
  
  I2CPacket = I2CBus.I2CPacket;
  Resource  = I2CBus.Resource;
  BusPowerManager = I2CBusPowerManagerC;
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/sht21/HumidityC.nc000066400000000000000000000033031207233610700243500ustar00rootroot00000000000000/*
* Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/

generic configuration HumidityC()
{
  provides interface Read;
}
implementation
{
  components new Sht21RawHumidityC();
  
  Read=Sht21RawHumidityC;
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/sht21/TemperatureC.nc000066400000000000000000000033141207233610700250530ustar00rootroot00000000000000/*
* Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/

generic configuration TemperatureC()
{
  provides interface Read;
}
implementation
{
  components new Sht21RawTemperatureC();
  
  Read=Sht21RawTemperatureC;
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/stm25p/000077500000000000000000000000001207233610700223215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/stm25p/HplStm25pPinsC.nc000066400000000000000000000044051207233610700253410ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for a ST M25P chip
 * connected to a TI MSP430.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-11-18 23:16:35 $
 */

configuration HplStm25pPinsC {

  provides interface GeneralIO as CSN;
  provides interface GeneralIO as Hold;
  #if (UCMINI_REV>100 || !defined(UCMINI_REV))
  provides interface GeneralIO as Power;
  #endif
}

implementation {

  components AtmegaGeneralIOC as IO;
  components new NoPinC();
  #if (UCMINI_REV==49||UCMINI_REV==52||UCMINI_REV==53)
    CSN = IO.PortB4;
  #else
    CSN = IO.PortB0;
  #endif
  #if (UCMINI_REV>100 || !defined(UCMINI_REV))
    Power=IO.PortD6;
  #endif
  Hold = NoPinC;

}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/stm25p/HplStm25pSpiC.nc000066400000000000000000000040341207233610700251610ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the Spi bus for a ST M25P chip connected to a
 * TI MSP430.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.1 $ $Date: 2010-11-18 23:16:35 $
 */

configuration HplStm25pSpiC {

  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;

}

implementation {

  components Atm128SpiC as SpiC;
  Resource = SpiC.Resource[unique("Atm128SpiC.Resource")];
  SpiByte = SpiC;
  SpiPacket = SpiC;

}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/stm25p/Stm25pOffC.nc000066400000000000000000000040451207233610700244760ustar00rootroot00000000000000/*
 * Copyright (c) 2010, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo
 */

configuration Stm25pOffC {
  provides interface Init as Stm25pOff;
}
implementation {
  components Stm25pOffP, HplStm25pPinsC as PinsC;
  Stm25pOff = Stm25pOffP;
  
  #if !defined(UCMINI_REV) || (UCMINI_REV > 100)
  Stm25pOffP.Toggle -> PinsC.Power;
  #else
  components HplStm25pSpiC as SpiC;
  Stm25pOffP.SpiResource -> SpiC;
  Stm25pOffP.SpiByte -> SpiC;
  //SpiP.SpiPacket -> SpiC;

  Stm25pOffP.CSN -> PinsC.CSN;
  Stm25pOffP.Hold -> PinsC.Hold;
  #endif
     
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/stm25p/Stm25pOffP.nc000066400000000000000000000051071207233610700245130ustar00rootroot00000000000000/*
 * Copyright (c) 2010, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Zsolt Szabo
 */

module Stm25pOffP {
  provides interface Init as Stm25pOff;
  #if !defined(UCMINI_REV) || (UCMINI_REV > 100)
  uses interface GeneralIO as Toggle;
  #else
  uses interface Resource as SpiResource;
  uses interface GeneralIO as CSN;
  uses interface GeneralIO as Hold;
  uses interface SpiByte;
  #endif 
}
implementation {

  command error_t Stm25pOff.init() {
    #if !defined(UCMINI_REV) || (UCMINI_REV > 100)
    call Toggle.makeOutput();
    call Toggle.set();
    #else
    call CSN.makeOutput();
    call Hold.makeOutput();
    if(!uniqueCount("Stm25pOn")) {
      call SpiResource.request();
    }
    #endif
    return SUCCESS;
  }

	#if (defined(UCMINI_REV) && UCMINI_REV<101)
  event void SpiResource.granted() {
    if(!uniqueCount("Stm25pOn")) {//we got the granted event if the real driver asks for the resource
      call CSN.clr();
      call Hold.clr();
      call SpiByte.write(0xb9);//deep sleep
      call CSN.set();
      call Hold.set();
      call SpiResource.release();
    }
  }
  #endif
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/stm25p/Stm25pPowerC.nc000066400000000000000000000040641207233610700250610ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Andras Biro
 */

configuration Stm25pPowerC{
  provides interface SplitControl;
  uses interface SplitControl as SpiControl;
}
implementation{
  components Stm25pPowerP, MainC, HplStm25pPinsC;
  Stm25pPowerP.Init<-MainC.SoftwareInit;
  Stm25pPowerP.Power->HplStm25pPinsC.Power;
  #ifdef STM25P_HW_POWER_DISABLE
    SplitControl=SpiControl;
  #else
    components new TimerMilliC();
    SplitControl=Stm25pPowerP;
    Stm25pPowerP.Timer->TimerMilliC;
    Stm25pPowerP.SpiControl=SpiControl;
  #endif
}tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/stm25p/Stm25pPowerP.nc000066400000000000000000000064071207233610700251010ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Andras Biro
 */

module Stm25pPowerP{
  provides interface Init;
  uses interface GeneralIO as Power;  
  #ifndef STM25P_HW_POWER_DISABLE
  provides interface SplitControl;
  uses interface SplitControl as SpiControl;
  uses interface Timer;
  #endif
}
implementation{
#ifdef STM25P_HW_POWER_DISABLE
  
  command error_t Init.init(){
    call Power.makeOutput();
    call Power.clr();
    return SUCCESS;
  }
  
#else

  bool spiOn=FALSE;
  bool powerOn=TRUE;
  
  command error_t Init.init(){
    call Power.makeOutput();
    call Power.set();
    powerOn=FALSE;
    return SUCCESS;
  }
  
  command error_t SplitControl.start(){
    error_t err;
    if(spiOn&&powerOn)
      return EALREADY;
    else if(spiOn||powerOn)
      return EBUSY;
    err=call SpiControl.start();
    if(err==SUCCESS){
      call Power.clr();
      call Timer.startOneShot(10);
    }
    return err;
  }
  
  event void Timer.fired(){
    powerOn=TRUE;
    if(spiOn)
      signal SplitControl.startDone(SUCCESS);
  }
  
  event void SpiControl.startDone(error_t err){
    if(err==SUCCESS){
      spiOn=TRUE;
      if(powerOn)
        signal SplitControl.startDone(SUCCESS);
    } else {
      call Timer.stop();
      call Power.set();
      signal SplitControl.startDone(err);
    }
  }
  
  task void signalStopDone(){
    signal SplitControl.stopDone(SUCCESS);
  }
  
  command error_t SplitControl.stop(){
    if((!spiOn)&&(!powerOn))
      return EALREADY;
    else if((!spiOn)||(!powerOn))
      return EBUSY;
    return call SpiControl.stop();
  }
  
  event void SpiControl.stopDone(error_t err){
    if(err==SUCCESS){
      spiOn=FALSE;
      call Power.set();
      powerOn=FALSE;
    }
    signal SplitControl.stopDone(err);
  }
#endif
}
tinyos-2.1.2+dfsg/tos/platforms/ucmini/chips/stm25p/Stm25pSectorC.nc000066400000000000000000000054111207233610700252210ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the sector storage absraction for the ST M25P
 * serial code flash.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.5 $ $Date: 2007-02-04 19:55:17 $
 */

configuration Stm25pSectorC {

  provides interface Resource as ClientResource[ uint8_t id ];
  provides interface Stm25pSector as Sector[ uint8_t id ];
  provides interface Stm25pVolume as Volume[ uint8_t id ];

}

implementation {

  components MainC;

  components Stm25pSectorP as SectorP;
  ClientResource = SectorP;
  Sector = SectorP;
  Volume = SectorP;
  
  components new FcfsArbiterC( "Stm25p.Volume" ) as ArbiterC;
  SectorP.Stm25pResource -> ArbiterC;

  components new SplitControlDeferredPowerManagerC( 1024 ) as PowerManagerC;
  PowerManagerC.ResourceDefaultOwner -> ArbiterC;
  PowerManagerC.ArbiterInfo -> ArbiterC;
  #if (defined(UCMINI_REV) && UCMINI_REV<101)
  PowerManagerC.SplitControl -> SectorP;
  #else
  components Stm25pPowerC;
  Stm25pPowerC.SpiControl -> SectorP;
  PowerManagerC.SplitControl -> Stm25pPowerC;
  #endif

  components Stm25pSpiC as SpiC;
  SectorP.SpiResource -> SpiC;
  SectorP.Spi -> SpiC;
  MainC.SoftwareInit -> SpiC;

  components LedsC as Leds;
  SectorP.Leds -> Leds;

}

tinyos-2.1.2+dfsg/tos/platforms/ucmini/hardware.h000066400000000000000000000044771207233610700220430ustar00rootroot00000000000000/**                                                                     
 *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
 *  downloading, copying, installing or using the software you agree to
 *  this license.  If you do not agree to this license, do not download,
 *  install, copy or use the software.
 *
 *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
 *  Copyright (c) 2002-2003 Intel Corporation.
 *  Copyright (c) 2000-2003 The Regents of the University  of California.    
 *  All rights reserved.
 *
 *  Permission to use, copy, modify, and distribute this software and its
 *  documentation for any purpose, without fee, and without written
 *  agreement is hereby granted, provided that the above copyright
 *  notice, the (updated) modification history and the author appear in
 *  all copies of this source code.
 *
 *  Permission is also granted to distribute this software under the
 *  standard BSD license as contained in the TinyOS distribution.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
 *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
 *  @author Alan Broad 
 *  @author Matt Miller 
 *  @author Martin Turon 
 */

#ifndef HARDWARE_H
#define HARDWARE_H

#include 
#include 


// enum so components can override power saving, 
// as per TEP 112. 
enum { 
	TOS_SLEEP_NONE = ATM128_POWER_IDLE, 
}; 
 
#ifndef PLATFORM_BAUDRATE 
#define PLATFORM_BAUDRATE 115200L
#endif

// we have no external pullups
#define ATM128_I2C_EXTERNAL_PULLDOWN TRUE

#endif //HARDWARE_H
tinyos-2.1.2+dfsg/tos/platforms/ucmini/platform.h000066400000000000000000000033711207233610700220620ustar00rootroot00000000000000/*
 * Copyright (c) 2011, University of Szeged
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Miklos Maroti
 */

// disable watchdog timer at startup (see AVR132: Using the Enhanced Watchdog Timer)
#include  
#define platform_bootstrap() { MCUSR = 0; wdt_disable(); }
tinyos-2.1.2+dfsg/tos/platforms/ucmini/platform_message.h000066400000000000000000000026271207233610700235710ustar00rootroot00000000000000/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
 * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
 *
 */

#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 
#include 

typedef union message_header {
	rfa1packet_header_t rfa1;
	serial_header_t serial;
} message_header_t;

typedef union message_footer {
	rfa1packet_footer_t rfa1;
} message_footer_t;

typedef union message_metadata {
	rfa1packet_metadata_t rfa1;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/z1/000077500000000000000000000000001207233610700171275ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/.platform000066400000000000000000000024341207233610700207570ustar00rootroot00000000000000push( @includes, qw(
  %T/platforms/z1
  %T/platforms/z1/chips/msp430
  %T/platforms/z1/chips/msp430/adc12
  %T/platforms/z1/chips/msp430/usci
  %T/platforms/z1/chips/msp430/timer
  %T/platforms/z1/chips/adxl345
  %T/platforms/z1/chips/cc2420
  %T/platforms/z1/chips/sht11
  %T/platforms/z1/chips/stm25p
  %T/platforms/z1/chips/tmp102
  %T/chips/cc2420
  %T/chips/cc2420/alarm
  %T/chips/cc2420/control
  %T/chips/cc2420/csma
  %T/chips/cc2420/interfaces
  %T/chips/cc2420/link
  %T/chips/cc2420/lowpan
  %T/chips/cc2420/lpl
  %T/chips/cc2420/packet
  %T/chips/cc2420/receive
  %T/chips/cc2420/spi
  %T/chips/cc2420/transmit
  %T/chips/cc2420/unique
  %T/chips/cc2420/security
  %T/chips/msp430
  %T/chips/msp430/adc12
  %T/chips/msp430/dma
  %T/chips/msp430/pins
  %T/chips/msp430/timer
  %T/chips/msp430/sensors
  %T/chips/msp430/x2xxx
  %T/chips/msp430/x2xxx/usci
  %T/chips/stm25p
  %T/chips/sht11
  %T/chips/tmp102
  %T/chips/adxl345
  %T/lib/timer
  %T/lib/serial
  %T/lib/power
) );

@opts = qw(
  -gcc=msp430-gcc
  -fnesc-target=msp430
  -fnesc-no-debug
  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
);

if (`msp430-gcc --version | grep 3.2.3`){
  push (@opts, "-mmcu=msp430x2617", "-mdisable-hwmul");
} else {
  push (@opts, "-mmcu=msp430f2617");
}
tinyos-2.1.2+dfsg/tos/platforms/z1/ActiveMessageC.nc000066400000000000000000000057341207233610700223050ustar00rootroot00000000000000/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 *
 * @author  Philip Levis
 * @version $Id: ActiveMessageC.nc,v 1.8 2009/09/16 00:51:51 razvanm Exp $
 */

/**
 *
 * The Active Message layer on the Telos platform. This is a naming wrapper
 * around the CC2420 Active Message layer.
 *
 */
#include "Timer.h"

configuration ActiveMessageC {
  provides {
    interface SplitControl;

    interface AMSend[am_id_t id];
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];

    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;
    interface LowPowerListening;
  }
}
implementation {
  components CC2420ActiveMessageC as AM;

  SplitControl = AM;
  
  AMSend       = AM;
  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/DemoSensorC.nc000066400000000000000000000045071207233610700216400ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/** 
 * DemoSensorC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorC on the z1 platform provides a
 * voltage reading using BatteryC, * or * a temperature reading using
 * the TMP102 sensor.
 * 
 * Works with Oscilloscope.
 *
 * @author: Jordi Soucheiron 
 * @author: Antonio Linan 
 */

generic configuration DemoSensorC() {
  provides interface Read;
}

implementation {
  components new BatteryC() as DemoSensor;
  Read = DemoSensor;

/*
  components new SimpleTMP102C() as DemoSensor;
  Read = DemoSensor;
*/

}
tinyos-2.1.2+dfsg/tos/platforms/z1/DemoSensorNowC.nc000066400000000000000000000046341207233610700223250ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorNowC is a generic sensor device that provides a 16-bit
 * value that can be read from async context. The platform author
 * chooses which sensor actually sits behind DemoSensorNowC, and
 * though it's probably Voltage, Light, or Temperature, there are no
 * guarantees.
 *
 * This particular DemoSensorNowC on the telosb platform provides a
 * voltage reading, using VoltageC.
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 * 
 */

generic configuration DemoSensorNowC()
{
  provides interface Resource;
  provides interface ReadNow;
}
implementation
{
  components new Msp430InternalVoltageC() as DemoSensorNow;

  Resource = DemoSensorNow;
  ReadNow = DemoSensorNow;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/DemoSensorStreamC.nc000066400000000000000000000044721207233610700230150ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/** 
 * DemoSensorStreamC is a generic sensor device that provides a 16-bit
 * value. The platform author chooses which sensor actually sits
 * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
 * Temperature, there are no guarantees.
 *
 * This particular DemoSensorStreamC on the z1 platform provides a
 * voltage reading, using VoltageStreamC. 
 *
 * To convert from ADC counts to actual voltage, divide this reading
 * by 4096 and multiply by 3.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 * 
 */

generic configuration DemoSensorStreamC()
{
  provides interface ReadStream;
}
implementation
{
  components new BatteryC() as DemoSensor;
  ReadStream = DemoSensor;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/HplUserButtonC.nc000066400000000000000000000042761207233610700223430ustar00rootroot00000000000000/**
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telos platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

configuration HplUserButtonC {
  provides interface GeneralIO;
  provides interface GpioInterrupt;
}
implementation {
  components HplMsp430GeneralIOC as GeneralIOC;
  components HplMsp430InterruptC as InterruptC;

  components new Msp430GpioC() as UserButtonC;
  UserButtonC -> GeneralIOC.Port25;
  GeneralIO = UserButtonC;

  components new Msp430InterruptC() as InterruptUserButtonC;
  InterruptUserButtonC.HplInterrupt -> InterruptC.Port25;
  GpioInterrupt = InterruptUserButtonC.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/Ieee154MessageC.nc000066400000000000000000000044631207233610700221710ustar00rootroot00000000000000/*
 * Copyright (c) 2008 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * @author Stephen Dawson-Haggerty
 */
 
configuration Ieee154MessageC  {
  provides {
    interface SplitControl;

    interface Resource as SendResource[uint8_t clientId];
    interface Ieee154Send;
    interface Receive as Ieee154Receive;

    interface Ieee154Packet;
    interface Packet;

    interface PacketAcknowledgements;
    interface LinkPacketMetadata;
    interface LowPowerListening;
    interface PacketLink;
  }

} implementation {
  components CC2420Ieee154MessageC as Msg;

  SplitControl = Msg;
  SendResource = Msg;
  Ieee154Send  = Msg;
  Ieee154Receive = Msg;
  Ieee154Packet = Msg;
  Packet = Msg;
  
  PacketAcknowledgements = Msg;
  LinkPacketMetadata = Msg;
  LowPowerListening = Msg;
  PacketLink = Msg;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/LedsIntensity.nc000066400000000000000000000034541207233610700222550ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

interface LedsIntensity
{
  command void set( uint8_t ledNum, uint8_t intensity );
  command void glow(uint8_t a, uint8_t b);
}
tinyos-2.1.2+dfsg/tos/platforms/z1/LedsIntensityC.nc000066400000000000000000000037311207233610700223560ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

configuration LedsIntensityC
{
  provides interface StdControl;
  provides interface LedsIntensity;
}
implementation
{
  components new LedsIntensityP(), LedsC, MainC;

  StdControl = LedsIntensityP;
  LedsIntensity = LedsIntensityP;

  LedsIntensityP.Leds -> LedsC;
  LedsIntensityP.Boot -> MainC;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/LedsIntensityP.nc000066400000000000000000000071251207233610700223740ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

generic module LedsIntensityP() {
  provides interface StdControl;
  provides interface LedsIntensity;
  uses interface Leds;
  uses interface Boot;
}
implementation
{
  enum
  {
    NUM_LEDS = 3,
    NUM_INTENSITY = 32,
    RESOLUTION = 128,
  };

  bool m_run;
  int8_t m_intensity[NUM_LEDS];
  int8_t m_accum[NUM_LEDS];
  static const int8_t m_exp[NUM_INTENSITY] = {
    0, 0, 0, 1, 1, 1, 2, 2, 2, 3, 4, 5, 6, 7, 8, 9,
    11, 13, 16, 19, 22, 26, 30, 36, 42, 49, 58, 67, 79, 93, 108, 127,
  };


	void wait(uint16_t t) {
	  for ( ; t > 0; t-- );
	}

	void longwait( uint16_t t ) {
	  for( ; t > 0; t-- )
	    wait(0xa0);
	}

  task void dimleds()
  {
    if( m_run )
    {
      int i;
      int ledval = 0;
      for( i=NUM_LEDS-1; i>=0; i-- )
      {
		ledval <<= 1;
		if( (m_accum[i] += m_intensity[i]) >= 0 )
		{
	  		m_accum[i] -= (RESOLUTION-1);
	  		ledval |= 1;
		}
      }
      call Leds.set( ledval );
      post dimleds();
    }
    else
    {
      call Leds.set( 0 );
    }
  }

  command void LedsIntensity.set( uint8_t ledNum, uint8_t intensity )
  {
    if( ledNum < NUM_LEDS )
    {
      intensity >>= 3;
      if( intensity >= (NUM_INTENSITY-1) )
      {
		m_intensity[ledNum] = m_exp[NUM_INTENSITY-1];
		m_accum[ledNum] = 0;
      }
      else
      {
		m_intensity[ledNum] = m_exp[intensity];
		if( m_intensity[ledNum] == 0 )
	  	m_accum[ledNum] = -1;
      }
    }
  }

  command void LedsIntensity.glow(uint8_t a, uint8_t b) {
    int i;
    for (i = 1536; i > 0; i -= 4) {
      call Leds.set(a);
      longwait(i);
      call Leds.set(b);
      longwait(1536-i);
    }
  }  
  

  event void Boot.booted()
  {
    int i;
    for( i=0; i
 *  Dummy Extended Address for micaz
 */

#include "IeeeEui64.h"

module LocalIeeeEui64C {
  provides interface LocalIeeeEui64;
} implementation {
  command ieee_eui64_t LocalIeeeEui64.getId() {
    ieee_eui64_t id;
    /* this is UCB's OUI */
    id.data[0] = 0x00;
    id.data[1] = 0x12;
    id.data[2] = 0x6d;

    /* UCB will let anyone use this OUI so long as these two octets
       are 'LO' -- "local".  All other octets are reserved.  */
    /* SDH -- 9/10/2010 */
    id.data[3] = 'L';
    id.data[4] = 'O';

    id.data[5] = 0;
    id.data[6] = TOS_NODE_ID >> 8;
    id.data[7] = TOS_NODE_ID & 0xff;
    return id;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/z1/Msp430Timer32khzMapC.nc000066400000000000000000000064361207233610700230740ustar00rootroot00000000000000/*
 * Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * MSP430Timer32khzMapC presents as paramaterized interfaces all of
 * the 32khz hardware timers on the MSP430 that are available for
 * compile time allocation by "new Alarm32khz16C()", "new
 * AlarmMilli32C()", and so on.  
 *
 * Platforms based on the MSP430 are * encouraged to copy in and
 * override this file, presenting only the * hardware timers that are
 * available for allocation on that platform.
 *
 * @author Cory Sharp 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $
 */

configuration Msp430Timer32khzMapC
{
  provides interface Msp430Timer[ uint8_t id ];
  provides interface Msp430TimerControl[ uint8_t id ];
  provides interface Msp430Compare[ uint8_t id ];
}
implementation
{
  components Msp430TimerC;

  Msp430Timer[0] = Msp430TimerC.TimerB;
  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
  Msp430Compare[0] = Msp430TimerC.CompareB0;

  // Timer pin B1 is used by the CC2420 radio's SFD pin
  // this is the only difference between the default 32khz map
  // and the map on telos

  Msp430Timer[1] = Msp430TimerC.TimerB;
  Msp430TimerControl[1] = Msp430TimerC.ControlB2;
  Msp430Compare[1] = Msp430TimerC.CompareB2;

  Msp430Timer[2] = Msp430TimerC.TimerB;
  Msp430TimerControl[2] = Msp430TimerC.ControlB3;
  Msp430Compare[2] = Msp430TimerC.CompareB3;

  Msp430Timer[3] = Msp430TimerC.TimerB;
  Msp430TimerControl[3] = Msp430TimerC.ControlB4;
  Msp430Compare[3] = Msp430TimerC.CompareB4;

  Msp430Timer[4] = Msp430TimerC.TimerB;
  Msp430TimerControl[4] = Msp430TimerC.ControlB5;
  Msp430Compare[4] = Msp430TimerC.CompareB5;

  Msp430Timer[5] = Msp430TimerC.TimerB;
  Msp430TimerControl[5] = Msp430TimerC.ControlB6;
  Msp430Compare[5] = Msp430TimerC.CompareB6;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/PlatformC.nc000066400000000000000000000035731207233610700213500ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

#include "hardware.h"
 
configuration PlatformC {
  provides interface Init;
}

implementation{
  components PlatformP, Msp430ClockC; 
  Init = PlatformP;
  PlatformP.Msp430ClockInit -> Msp430ClockC.Init;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/PlatformLed.h000066400000000000000000000042001207233610700215050ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

#ifndef _PLATFORM_Z1_LED_H_
#define _PLATFORM_Z1_LED_H_

/** Constants used in the generic LedC module to determine how many
 * named Led interfaces should be published.  The value should match
 * the size of the table in PlatformLedsP, but we're not going to
 * guess that table's public name. */
#define PLATFORM_LED_COUNT 3

/** Map to the LED index for the red LED */
#define PLATFORM_LED_RED 0

/** Map to the LED index for the green LED */
#define PLATFORM_LED_GREEN 1

/** Map to the LED index for the blue LED */
#define PLATFORM_LED_BLUE 2

#endif // _PLATFORM_Z1_LED_H_
tinyos-2.1.2+dfsg/tos/platforms/z1/PlatformLedC.nc000066400000000000000000000037151207233610700217730ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

/** Defines the Led and MultiLed interfaces in terms of the underlying
 * LedsC component.
 *
 * @author Peter A. Bigot 
 */
configuration PlatformLedC {
  provides {
    interface MultiLed;
    interface Led[uint8_t led_id];
  }
} implementation {
  components LedsC;
  components PlatformLedP;

  MultiLed = PlatformLedP;
  Led = PlatformLedP;
  PlatformLedP.Leds -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/PlatformLedP.nc000066400000000000000000000062401207233610700220040ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

/** Defines the Led and MultiLed interfaces in terms of the underlying
 * LedsC component.
 *
 * @author Peter A. Bigot 
 */
module PlatformLedP {
  provides {
    interface MultiLed;
    interface Led[uint8_t led_id];
  }
  uses {
    interface Leds;
  }
} implementation {

  async command void Led.on[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0On(); break;
      case 1: call Leds.led1On(); break;
      case 2: call Leds.led2On(); break;
    }
  }

  async command void Led.off[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0Off(); break;
      case 1: call Leds.led1Off(); break;
      case 2: call Leds.led2Off(); break;
    }
  }

  async command void Led.set[ uint8_t led_id ] (bool turn_on)
  {
    if (turn_on) {
      call Led.on[led_id]();
    } else {
      call Led.off[led_id]();
    }
  }

  async command void Led.toggle[ uint8_t led_id ] ()
  {
    switch(led_id) {
      case 0: call Leds.led0Toggle(); break;
      case 1: call Leds.led1Toggle(); break;
      case 2: call Leds.led2Toggle(); break;
    }
  }

  async command unsigned int MultiLed.get () { return call Leds.get(); }

  async command void MultiLed.set (unsigned int val) { call Leds.set(val); }

  async command void MultiLed.on (unsigned int led_id) { call Led.on[led_id](); }

  async command void MultiLed.off (unsigned int led_id) { call Led.off[led_id](); }

  async command void MultiLed.setSingle (unsigned int led_id, bool turn_on) { call Led.set[led_id](turn_on); }

  async command void MultiLed.toggle (unsigned int led_id) { call Led.toggle[led_id](); }

}
tinyos-2.1.2+dfsg/tos/platforms/z1/PlatformLedsC.nc000066400000000000000000000045041207233610700221530ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

#include "hardware.h"

configuration PlatformLedsC {
  provides interface GeneralIO as Led0;
  provides interface GeneralIO as Led1;
  provides interface GeneralIO as Led2;
  uses interface Init;
}

implementation{
  components
    HplMsp430GeneralIOC as GeneralIOC
    , new Msp430GpioC() as Led0Impl
    , new Msp430GpioC() as Led1Impl
    , new Msp430GpioC() as Led2Impl
    ;
  components PlatformP;
 
  Init = PlatformP.LedsInit;
 
  Led0 = Led0Impl;
  //THIS IS FOR THE ZOLERTIA OR TMOTE, CHANGED FOR THE FET LED
  Led0Impl -> GeneralIOC.Port54;
  
  Led1 = Led1Impl;
  Led1Impl -> GeneralIOC.Port56;

  Led2 = Led2Impl;
  Led2Impl -> GeneralIOC.Port55;
 
}
tinyos-2.1.2+dfsg/tos/platforms/z1/PlatformP.nc000066400000000000000000000041711207233610700213600ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * Copyright (c) 2011 Eric B. Decker
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 * @author: Eric B. Decker 
 */

#include "hardware.h"

module PlatformP{
  provides interface Init;
  uses interface Init as Msp430ClockInit;
  uses interface Init as LedsInit;
}
implementation {
  command error_t Init.init() {
    WDTCTL = WDTPW + WDTHOLD;
    call Msp430ClockInit.init();
    call LedsInit.init();
    return SUCCESS;
  }
 
  default command error_t LedsInit.init() { return SUCCESS; }
 
}
tinyos-2.1.2+dfsg/tos/platforms/z1/PlatformSerialC.nc000066400000000000000000000042241207233610700225020ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * Copyright (c) 2011 Eric B. Decker
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 * @author: Eric B. Decker 
 */

configuration PlatformSerialC {
  
  provides interface StdControl;
  provides interface UartStream;
  provides interface UartByte;
  
}

implementation {
  
  components new Msp430Uart0C() as UartC;
  UartStream = UartC;  
  UartByte = UartC;
  
  components Z1SerialP;
  StdControl = Z1SerialP;
  Z1SerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
  Z1SerialP.Resource -> UartC.Resource;
  
}
tinyos-2.1.2+dfsg/tos/platforms/z1/SwitchToggleC.nc000066400000000000000000000053621207233610700221650ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Generic layer to translate a GIO into a toggle switch
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

#include 

generic module SwitchToggleC() {
  provides interface Get;
  provides interface Notify;

  uses interface GeneralIO;
  uses interface GpioInterrupt;
}
implementation {
  norace bool m_pinHigh;

  task void sendEvent();

  command bool Get.get() { return call GeneralIO.get(); }

  command error_t Notify.enable() {
    call GeneralIO.makeInput();

    if ( call GeneralIO.get() ) {
      m_pinHigh = TRUE;
      return call GpioInterrupt.enableFallingEdge();
    } else {
      m_pinHigh = FALSE;
      return call GpioInterrupt.enableRisingEdge();
    }
  }

  command error_t Notify.disable() {
    return call GpioInterrupt.disable();
  }

  async event void GpioInterrupt.fired() {
    call GpioInterrupt.disable();

    m_pinHigh = !m_pinHigh;

    post sendEvent();
  }

  task void sendEvent() {
    bool pinHigh;
    pinHigh = m_pinHigh;
    
    signal Notify.notify( pinHigh );
    
    if ( pinHigh ) {
      call GpioInterrupt.enableFallingEdge();
    } else {
      call GpioInterrupt.enableRisingEdge();
    }
  }
}
tinyos-2.1.2+dfsg/tos/platforms/z1/TimeSyncMessageC.nc000066400000000000000000000067621207233610700226270ustar00rootroot00000000000000// $Id: TimeSyncMessageC.nc,v 1.3 2010-06-29 22:07:55 scipio Exp $

/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 *
 * The Active Message layer on the z1 platform. This is a naming wrapper
 * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
 *
 * @author Philip Levis
 * @author Brano Kusy
 * @date June 19 2005
 */

configuration TimeSyncMessageC {
  provides
  {
    interface SplitControl;
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
    interface LowPowerListening;

    interface PacketTimeStamp as PacketTimeStamp32khz;
    interface PacketTimeStamp as PacketTimeStampMilli;

    interface TimeSyncAMSend as TimeSyncAMSend32khz[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacket32khz;

    interface TimeSyncAMSend as TimeSyncAMSendMilli[am_id_t id];
    interface TimeSyncPacket as TimeSyncPacketMilli;
  }
}
implementation {
#ifdef RFXLINK
  components CC2420XTimeSyncMessageC as AM;
#else
  components CC2420TimeSyncMessageC as AM;
#endif

  SplitControl = AM;

  Receive      = AM.Receive;
  Snoop        = AM.Snoop;
  Packet       = AM;
  AMPacket     = AM;
  PacketAcknowledgements = AM;
  LowPowerListening = AM;
  TimeSyncAMSend32khz       = AM;
  TimeSyncAMSendMilli       = AM;
  TimeSyncPacket32khz       = AM;
  TimeSyncPacketMilli       = AM;

  components CC2420PacketC;
  PacketTimeStamp32khz = CC2420PacketC;
  PacketTimeStampMilli = CC2420PacketC;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/UserButton.h000066400000000000000000000035071207233610700214170ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

#ifndef USERBUTTON_H
#define USERBUTTON_H

typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;

#endif
tinyos-2.1.2+dfsg/tos/platforms/z1/UserButtonC.nc000066400000000000000000000050401207233610700216650ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform. Get
 * returns the current state of the button by reading the pin,
 * regardless of whether enable() or disable() has been called on the
 * Interface. Notify.enable() and Notify.disable() modify the
 * underlying interrupt state of the pin, and have the effect of
 * enabling or disabling notifications that the button has changed
 * state.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.1 $
 */

#include 

configuration UserButtonC {
  provides interface Get;
  provides interface Notify;
}
implementation {
  components HplUserButtonC;
  components new SwitchToggleC();
  SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
  SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO;

  components UserButtonP;
  Get = UserButtonP;
  Notify = UserButtonP;

  UserButtonP.GetLower -> SwitchToggleC.Get;
  UserButtonP.NotifyLower -> SwitchToggleC.Notify;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/UserButtonP.nc000066400000000000000000000051621207233610700217070ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Implementation of the user button for the telosb platform
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $
 */

#include 

module UserButtonP {
  provides interface Get;
  provides interface Notify;

  uses interface Get as GetLower;
  uses interface Notify as NotifyLower;
}
implementation {
  
  command button_state_t Get.get() { 
    // telosb user button pin is high when released - invert state
    if ( call GetLower.get() ) {
      return BUTTON_RELEASED;
    } else {
      return BUTTON_PRESSED;
    }
  }

  command error_t Notify.enable() {
    return call NotifyLower.enable();
  }

  command error_t Notify.disable() {
    return call NotifyLower.disable();
  }

  event void NotifyLower.notify( bool val ) {
    // telosb user button pin is high when released - invert state
    if ( val ) {
      signal Notify.notify( BUTTON_RELEASED );
    } else {
      signal Notify.notify( BUTTON_PRESSED );
    }
  }
  
  default event void Notify.notify( button_state_t val ) { }
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/000077500000000000000000000000001207233610700202355ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/adxl345/000077500000000000000000000000001207233610700214215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/adxl345/HplADXL345C.nc000066400000000000000000000053601207233610700235020ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * Copyright (c) 20011 ZOLERTIA LABS
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Implementation of ADXL345 accelerometer, as a part of Zolertia Z1 mote
 *
 * Credits goes to DEXMA SENSORS SL
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 * @author: Antonio Linan 
 */

configuration HplADXL345C {
  provides interface GeneralIO as GeneralIO1;
  provides interface GeneralIO as GeneralIO2;
  provides interface GpioInterrupt as GpioInterrupt1;
  provides interface GpioInterrupt as GpioInterrupt2;
}

implementation {
  components HplMsp430GeneralIOC as GeneralIOC;
  components HplMsp430InterruptC as InterruptC;

  components new Msp430GpioC() as ADXL345Int1C;
  ADXL345Int1C -> GeneralIOC.Port16;
  GeneralIO1 = ADXL345Int1C;

  components new Msp430GpioC() as ADXL345Int2C;
  ADXL345Int2C -> GeneralIOC.Port17;
  GeneralIO2 = ADXL345Int2C;

  components new Msp430InterruptC() as InterruptAccel1C;
  InterruptAccel1C.HplInterrupt -> InterruptC.Port16;
  GpioInterrupt1 = InterruptAccel1C.Interrupt;

  components new Msp430InterruptC() as InterruptAccel2C;
  InterruptAccel2C.HplInterrupt -> InterruptC.Port17;
  GpioInterrupt2 = InterruptAccel2C.Interrupt;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/cc2420/000077500000000000000000000000001207233610700211325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/cc2420/HplCC2420AlarmC.nc000066400000000000000000000040211207233610700237720ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $
 */

generic configuration HplCC2420AlarmC() {

  provides interface Init;
  provides interface Alarm as Alarm32khz32;

}

implementation {

  components new Alarm32khz32C();

  Init = Alarm32khz32C;
  Alarm32khz32 = Alarm32khz32C;
  
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/cc2420/HplCC2420InterruptsC.nc000066400000000000000000000052401207233610700251210ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of interrupts and captures for the ChipCon
 * CC2420 radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $
 */

configuration HplCC2420InterruptsC {

  provides interface GpioCapture as CaptureSFD;
  provides interface GpioInterrupt as InterruptCCA;
  provides interface GpioInterrupt as InterruptFIFOP;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components Msp430TimerC;
  components new GpioCaptureC() as CaptureSFDC;
  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlB1;
  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureB1;
  CaptureSFDC.GeneralIO -> GeneralIOC.Port41;

  components HplMsp430InterruptC;
  components new Msp430InterruptC() as InterruptCCAC;
  components new Msp430InterruptC() as InterruptFIFOPC;
  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port14;
  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port12;

  CaptureSFD = CaptureSFDC.Capture;
  InterruptCCA = InterruptCCAC.Interrupt;
  InterruptFIFOP = InterruptFIFOPC.Interrupt;

}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/cc2420/HplCC2420PinsC.nc000066400000000000000000000057371207233610700236660ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for the ChipCon CC2420
 * radio connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $
 */

configuration HplCC2420PinsC {

  provides interface GeneralIO as CCA;
  provides interface GeneralIO as CSN;
  provides interface GeneralIO as FIFO;
  provides interface GeneralIO as FIFOP;
  provides interface GeneralIO as RSTN;
  provides interface GeneralIO as SFD;
  provides interface GeneralIO as VREN;

}

implementation {

  components HplMsp430GeneralIOC as GeneralIOC;
  components new Msp430GpioC() as CCAM;
  components new Msp430GpioC() as CSNM;
  components new Msp430GpioC() as FIFOM;
  components new Msp430GpioC() as FIFOPM;
  components new Msp430GpioC() as RSTNM;
  components new Msp430GpioC() as SFDM;
  components new Msp430GpioC() as VRENM;

/*  Zoul
  CCAM -> GeneralIOC.Port14;
  CSNM -> GeneralIOC.Port42;
  FIFOM -> GeneralIOC.Port13;
  FIFOPM -> GeneralIOC.Port10;
  RSTNM -> GeneralIOC.Port46;
  SFDM -> GeneralIOC.Port41;
  VRENM -> GeneralIOC.Port45;
*/
// Z1
  CCAM -> GeneralIOC.Port14;
  CSNM -> GeneralIOC.Port30;
  FIFOM -> GeneralIOC.Port13;
  FIFOPM -> GeneralIOC.Port12;
  RSTNM -> GeneralIOC.Port46;
  SFDM -> GeneralIOC.Port41;
  VRENM -> GeneralIOC.Port45;


  CCA = CCAM;
  CSN = CSNM;
  FIFO = FIFOM;
  FIFOP = FIFOPM;
  RSTN = RSTNM;
  SFD = SFDM;
  VREN = VRENM;
  
}

tinyos-2.1.2+dfsg/tos/platforms/z1/chips/cc2420/HplCC2420SpiC.nc000066400000000000000000000040411207233610700234730ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the SPI bus for the ChipCon CC2420 radio
 * connected to a TI MSP430 processor.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:44 $
 */

generic configuration HplCC2420SpiC() {
  
  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;
  
}

implementation {

  components new Msp430SpiB0C() as SpiC;
  
  Resource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;
  
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/000077500000000000000000000000001207233610700212635ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/McuSleepC.nc000066400000000000000000000111431207233610700234250ustar00rootroot00000000000000/*
 * Copyright (c) 2011 Eric B. Decker
 * Copyright (c) 2009-2010 DEXMA SENSORS SL
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * Implementation of TEP 112 (Microcontroller Power Management) for
 * the MSP430. Code for low power calculation copied from older
 * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp.
 *
 *
 * @author Philip Levis
 * @author Vlado Handziski
 * @author Joe Polastre
 * @author Cory Sharp
 * @author Xavier Orduna 
 * @author Eric B. Decker 
 */

module McuSleepC @safe() {
  provides {
    interface McuSleep;
    interface McuPowerState;
  }
  uses {
    interface McuPowerOverride;
  }
}
implementation {
  bool dirty = TRUE;
  mcu_power_t powerState = MSP430_POWER_ACTIVE;

  /* Note that the power values are maintained in an order
   * based on their active components, NOT on their values.*/
  // NOTE: This table should be in progmem.
  const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = {
    0,                                       // ACTIVE
    SR_CPUOFF,                               // LPM0
    SR_SCG0+SR_CPUOFF,                       // LPM1
    SR_SCG1+SR_CPUOFF,                       // LPM2
    SR_SCG1+SR_SCG0+SR_CPUOFF,               // LPM3
    SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF,     // LPM4
  };
    
  mcu_power_t getPowerState() {
    mcu_power_t pState = MSP430_POWER_LPM3;
    // TimerA, USCI check
    if ((((TACCTL0 & CCIE) || (TACCTL1 & CCIE) || (TACCTL2 & CCIE)) &&
	 ((TACTL & TASSEL_3) == TASSEL_2)) ||
	((UCA0CTL1 & UCSSEL_3) != UCSSEL_0) ||
	((UCA1CTL1 & UCSSEL_3) != UCSSEL_0) ||
	((UCB0CTL1 & UCSSEL_3) != UCSSEL_0) ||
	((UCB1CTL1 & UCSSEL_3) != UCSSEL_0)
	)
      pState = MSP430_POWER_LPM1;

#if defined(__msp430_have_adc12) || defined(__MSP430_HAS_ADC12__)
    // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE
    if (ADC12CTL0 & ADC12ON){
      if (ADC12CTL1 & ADC12SSEL_2){
        // sample or conversion operation with MCLK or SMCLK
        if (ADC12CTL1 & ADC12SSEL_1)
          pState = MSP430_POWER_LPM1;
        else
          pState = MSP430_POWER_ACTIVE;
      } else if ((ADC12CTL1 & SHS0) && ((TACTL & TASSEL_3) == TASSEL_2)){
        // Timer A is used as sample-and-hold source and SMCLK sources Timer A
        // (Timer A interrupts are always disabled when it is used by the 
        // ADC subsystem, that's why the Timer check above is not enough)
	      pState = MSP430_POWER_LPM1;
      }
    }
#endif
    
    return pState;
  }
  
  void computePowerState() {
    powerState = mcombine(getPowerState(),
			  call McuPowerOverride.lowestState());
  }
  
  async command void McuSleep.sleep() {
    uint16_t temp;
    if (dirty) {
      computePowerState();
      //dirty = 0;
    }
    temp = msp430PowerBits[powerState] | SR_GIE;
    __asm__ __volatile__( "bis  %0, r2" : : "m" (temp) );
    // All of memory may change at this point...
    asm volatile ("" : : : "memory");
    __nesc_disable_interrupt();
  }

  async command void McuPowerState.update() {
    atomic dirty = 1;
  }

  default async command mcu_power_t McuPowerOverride.lowestState() {
    return MSP430_POWER_LPM4;
  }
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/adc12/000077500000000000000000000000001207233610700221555ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/adc12/BatteryC.nc000066400000000000000000000041521207233610700242160ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

generic configuration BatteryC() {
 provides interface DeviceMetadata;
 provides interface Read;
 provides interface ReadStream;
}
implementation {
 components new AdcReadClientC();
 Read = AdcReadClientC;

 components new AdcReadStreamClientC();
 ReadStream = AdcReadStreamClientC;

 components BatteryP;
 DeviceMetadata = BatteryP;
 AdcReadClientC.AdcConfigure -> BatteryP;
 AdcReadStreamClientC.AdcConfigure -> BatteryP;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/adc12/BatteryP.nc000066400000000000000000000045031207233610700242330ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

#include "Msp430Adc12.h"

module BatteryP {
 provides interface DeviceMetadata;
 provides interface AdcConfigure;
}
implementation {

 msp430adc12_channel_config_t config = {
   inch: SUPPLY_VOLTAGE_HALF_CHANNEL,
   sref: REFERENCE_VREFplus_AVss,
   ref2_5v: REFVOLT_LEVEL_1_5,
   adc12ssel: SHT_SOURCE_ACLK,
   adc12div: SHT_CLOCK_DIV_1,
   sht: SAMPLE_HOLD_4_CYCLES,
   sampcon_ssel: SAMPCON_SOURCE_SMCLK,
   sampcon_id: SAMPCON_CLOCK_DIV_1
 };

 command uint8_t DeviceMetadata.getSignificantBits() { return 12; }

 async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() {
   return &config;
 }
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/adc12/Msp430Adc12ImplP.nc000066400000000000000000000513771207233610700252170ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright 
 *   notice, this list of conditions and the following disclaimer in the 
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitaet Berlin nor the names 
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * - Revision -------------------------------------------------------------
 * $Revision: 1.14 $
 * $Date: 2008-11-10 14:56:12 $
 * @author: Jan Hauer 
 * ========================================================================
 */

#include 
module Msp430Adc12ImplP @safe()
{
  provides {
    interface Init;
    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id];
    interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id];
    interface Msp430Adc12Overflow as Overflow[uint8_t id];
    interface AsyncStdControl as DMAExtension[uint8_t id];
  }
  uses {
    interface ArbiterInfo as ADCArbiterInfo;
    interface HplAdc12;
    interface Msp430Timer as TimerA;;
    interface Msp430TimerControl as ControlA0;
    interface Msp430TimerControl as ControlA1;
    interface Msp430Compare as CompareA0;
    interface Msp430Compare as CompareA1;
    interface HplMsp430GeneralIO as Port60;
    interface HplMsp430GeneralIO as Port61;
    interface HplMsp430GeneralIO as Port62;
    interface HplMsp430GeneralIO as Port63;
    interface HplMsp430GeneralIO as Port64;
    interface HplMsp430GeneralIO as Port65;
    interface HplMsp430GeneralIO as Port66;
    interface HplMsp430GeneralIO as Port67;
  }
}
implementation
{ 

#if defined(PLATFORM_Z1)
  #warning Msp430Adc12ImplP shadowed at z1/chips/msp430
#endif

#ifdef ADC12_TIMERA_ENABLED
  #warning Accessing TimerA for ADC12 
#endif

  enum {
    SINGLE_DATA = 1,
    SINGLE_DATA_REPEAT = 2,
    MULTIPLE_DATA = 4,
    MULTIPLE_DATA_REPEAT = 8,
    MULTI_CHANNEL = 16,
    CONVERSION_MODE_MASK = 0x1F,

    ADC_BUSY = 32,                /* request pending */
    USE_TIMERA = 64,              /* TimerA used for SAMPCON signal */
    ADC_OVERFLOW = 128,
  };

  uint8_t state;                  /* see enum above */
  
  uint16_t resultBufferLength;    /* length of buffer */
  uint16_t *COUNT_NOK(resultBufferLength) resultBufferStart;
  uint16_t resultBufferIndex;     /* offset into buffer */
  uint8_t numChannels;            /* number of channels (multi-channel conversion) */
  uint8_t clientID;               /* ID of client that called getData() */

  command error_t Init.init()
  {
    adc12ctl0_t ctl0;

    atomic {
      // stop any ongoing conversion (conversion data -if any- is unreliable)
      call HplAdc12.stopConversion(); 
      // clear pending interrupt flags (potential relict from SW reset / PUC)
      // call HplAdc12.resetIFGs(); 
      ctl0 = call HplAdc12.getCtl0();
      ctl0.adc12tovie = 1;
      ctl0.adc12ovie = 1;
      call HplAdc12.setCtl0(ctl0);
    }
    return SUCCESS;
  }

  void prepareTimerA(uint16_t interval, uint16_t csSAMPCON, uint16_t cdSAMPCON)
  {
#ifdef ADC12_TIMERA_ENABLED
    msp430_compare_control_t ccResetSHI = {
      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };

    call TimerA.setMode(MSP430TIMER_STOP_MODE);
    call TimerA.clear();
    call TimerA.disableEvents();
    call TimerA.setClockSource(csSAMPCON);
    call TimerA.setInputDivider(cdSAMPCON);
    call ControlA0.setControl(ccResetSHI);
    call CompareA0.setEvent(interval-1);
    call CompareA1.setEvent((interval-1)/2);
#endif
  }
    
  void startTimerA()
  {
#ifdef ADC12_TIMERA_ENABLED
    msp430_compare_control_t ccSetSHI = {
      ccifg : 0, cov : 0, out : 1, cci : 0, ccie : 0,
      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
    msp430_compare_control_t ccResetSHI = {
      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
    msp430_compare_control_t ccRSOutmod = {
      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
      outmod : 7, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
    // manually trigger first conversion, then switch to Reset/set conversionMode
    call ControlA1.setControl(ccResetSHI);
    call ControlA1.setControl(ccSetSHI);   
    //call ControlA1.setControl(ccResetSHI); 
    call ControlA1.setControl(ccRSOutmod);
    call TimerA.setMode(MSP430TIMER_UP_MODE); // go!
#endif
  }   
  
  void configureAdcPin( uint8_t inch )
  {
#ifdef ADC12_P6PIN_AUTO_CONFIGURE
    switch (inch)
    {
      case 0: call Port60.selectModuleFunc(); call Port60.makeInput(); break;
      case 1: call Port61.selectModuleFunc(); call Port61.makeInput(); break;
      case 2: call Port62.selectModuleFunc(); call Port62.makeInput(); break;
      case 3: call Port63.selectModuleFunc(); call Port63.makeInput(); break;
      case 4: call Port64.selectModuleFunc(); call Port64.makeInput(); break;
      case 5: call Port65.selectModuleFunc(); call Port65.makeInput(); break;
      case 6: call Port66.selectModuleFunc(); call Port66.makeInput(); break;
      case 7: call Port67.selectModuleFunc(); call Port67.makeInput(); break;
    }
#endif
  }
  
  void resetAdcPin( uint8_t inch )
  {
#ifdef ADC12_P6PIN_AUTO_CONFIGURE
    switch (inch)
    {
      case 0: call Port60.selectIOFunc(); break;
      case 1: call Port61.selectIOFunc(); break;
      case 2: call Port62.selectIOFunc(); break;
      case 3: call Port63.selectIOFunc(); break;
      case 4: call Port64.selectIOFunc(); break;
      case 5: call Port65.selectIOFunc(); break;
      case 6: call Port66.selectIOFunc(); break;
      case 7: call Port67.selectIOFunc(); break;
    }
#endif
  }
  
  async command error_t SingleChannel.configureSingle[uint8_t id](
      const msp430adc12_channel_config_t *config)
  {
    error_t result = ERESERVE;
#ifdef ADC12_CHECK_ARGS
    if (!config)
      return EINVAL;
#endif
    atomic {
      if (state & ADC_BUSY)
        return EBUSY;
      if (call ADCArbiterInfo.userId() == id){
        adc12ctl1_t ctl1 = {
          adc12busy: 0,
          conseq: 0,
          adc12ssel: config->adc12ssel,
          adc12div: config->adc12div,
          issh: 0,
          shp: 1,
          shs: 0,
          cstartadd: 0
        };
        adc12memctl_t memctl = {
          inch: config->inch,
          sref: config->sref,
          eos: 1
        };        
        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
        ctl0.msc = 1;
        ctl0.sht0 = config->sht;
        ctl0.sht1 = config->sht;

        state = SINGLE_DATA;
        call HplAdc12.setCtl0(ctl0);
        call HplAdc12.setCtl1(ctl1);
        call HplAdc12.setMCtl(0, memctl);
        call HplAdc12.setIEFlags(0x01);
        result = SUCCESS;
      } 
    }
    return result;
  }

  async command error_t SingleChannel.configureSingleRepeat[uint8_t id](
      const msp430adc12_channel_config_t *config,
      uint16_t jiffies)
  {
    error_t result = ERESERVE;
#ifdef ADC12_CHECK_ARGS
#ifndef ADC12_TIMERA_ENABLED
    if (jiffies>0) 
      return EINVAL;
#endif
    if (!config || jiffies == 1 || jiffies == 2)
      return EINVAL;
#endif
    atomic {
      if (state & ADC_BUSY)
        return EBUSY;
      if (call ADCArbiterInfo.userId() == id) {
        adc12ctl1_t ctl1 = {
          adc12busy: 0,
          conseq: 2,
          adc12ssel: config->adc12ssel,
          adc12div: config->adc12div,
          issh: 0,
          shp: 1,
          shs: (jiffies == 0) ? 0 : 1,
          cstartadd: 0
        };
        adc12memctl_t memctl = {
          inch: config->inch,
          sref: config->sref,
          eos: 1
        };        
        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
        ctl0.msc = (jiffies == 0) ? 1 : 0;
        ctl0.sht0 = config->sht;
        ctl0.sht1 = config->sht;

        state = SINGLE_DATA_REPEAT;
        call HplAdc12.setCtl0(ctl0);
        call HplAdc12.setCtl1(ctl1);
        call HplAdc12.setMCtl(0, memctl);
        call HplAdc12.setIEFlags(0x01);
        if (jiffies){
          state |= USE_TIMERA;   
          prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
        }
        result = SUCCESS;
      }     
    }
    return result;
  }

  async command error_t SingleChannel.configureMultiple[uint8_t id](
      const msp430adc12_channel_config_t *config,
      uint16_t *buf, uint16_t length, uint16_t jiffies)
  {
    error_t result = ERESERVE;
#ifdef ADC12_CHECK_ARGS
#ifndef ADC12_TIMERA_ENABLED
    if (jiffies>0) 
      return EINVAL;
#endif
    if (!config || !buf || !length || jiffies == 1 || jiffies == 2)
      return EINVAL;
#endif
    atomic {
      if (state & ADC_BUSY)
        return EBUSY;
      if (call ADCArbiterInfo.userId() == id){
        adc12ctl1_t ctl1 = {
          adc12busy: 0,
          conseq: (length > 16) ? 3 : 1,
          adc12ssel: config->adc12ssel,
          adc12div: config->adc12div,
          issh: 0,
          shp: 1,
          shs: (jiffies == 0) ? 0 : 1,
          cstartadd: 0
        };
        adc12memctl_t memctl = {
          inch: config->inch,
          sref: config->sref,
          eos: 0
        };        
        uint16_t i, mask = 1;
        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
        ctl0.msc = (jiffies == 0) ? 1 : 0;
        ctl0.sht0 = config->sht;
        ctl0.sht1 = config->sht;

        state = MULTIPLE_DATA;
	resultBufferStart = NULL;
        resultBufferLength = length;
        resultBufferStart = buf;
        resultBufferIndex = 0;
        call HplAdc12.setCtl0(ctl0);
        call HplAdc12.setCtl1(ctl1);
        for (i=0; i<(length-1) && i < 15; i++)
          call HplAdc12.setMCtl(i, memctl);
        memctl.eos = 1;  
        call HplAdc12.setMCtl(i, memctl);
        call HplAdc12.setIEFlags(mask << i);        
        
        if (jiffies){
          state |= USE_TIMERA;
          prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
        }
        result = SUCCESS;
      }      
    }
    return result;
  }

  async command error_t SingleChannel.configureMultipleRepeat[uint8_t id](
      const msp430adc12_channel_config_t *config,
      uint16_t *buf, uint8_t length, uint16_t jiffies)
  {
    error_t result = ERESERVE;
#ifdef ADC12_CHECK_ARGS
#ifndef ADC12_TIMERA_ENABLED
    if (jiffies>0) 
      return EINVAL;
#endif
    if (!config || !buf || !length || length > 16 || jiffies == 1 || jiffies == 2)
      return EINVAL;
#endif
    atomic {
      if (state & ADC_BUSY)
        return EBUSY;
      if (call ADCArbiterInfo.userId() == id){
        adc12ctl1_t ctl1 = {
          adc12busy: 0,
          conseq: 3,
          adc12ssel: config->adc12ssel,
          adc12div: config->adc12div,
          issh: 0,
          shp: 1,
          shs: (jiffies == 0) ? 0 : 1,
          cstartadd: 0
        };
        adc12memctl_t memctl = {
          inch: config->inch,
          sref: config->sref,
          eos: 0
        };        
        uint16_t i, mask = 1;
        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
        ctl0.msc = (jiffies == 0) ? 1 : 0;
        ctl0.sht0 = config->sht;
        ctl0.sht1 = config->sht;

        state = MULTIPLE_DATA_REPEAT;
	resultBufferStart = NULL;
        resultBufferLength = length;
        resultBufferStart = buf;
        resultBufferIndex = 0;            
        
        call HplAdc12.setCtl0(ctl0);
        call HplAdc12.setCtl1(ctl1);
        for (i=0; i<(length-1) && i < 15; i++)
          call HplAdc12.setMCtl(i, memctl);
        memctl.eos = 1;  
        call HplAdc12.setMCtl(i, memctl);
        call HplAdc12.setIEFlags(mask << i);        
        
        if (jiffies){
          state |= USE_TIMERA;
          prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
        }
        result = SUCCESS;
      }
    }
    return result;
  }

  async command error_t SingleChannel.getData[uint8_t id]()
  {
    atomic {
      if (call ADCArbiterInfo.userId() == id){
        if ((state & MULTIPLE_DATA_REPEAT) && !resultBufferStart)
          return EINVAL;
        if (state & ADC_BUSY)
          return EBUSY;
        state |= ADC_BUSY;
        clientID = id;
        configureAdcPin((call HplAdc12.getMCtl(0)).inch);
        call HplAdc12.startConversion();
        if (state & USE_TIMERA)
          startTimerA(); 
        return SUCCESS;
      }
    }
    return FAIL;
  }

  async command error_t MultiChannel.configure[uint8_t id](
      const msp430adc12_channel_config_t *config,
      adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buf, 
      uint16_t numSamples, uint16_t jiffies)
  {
    error_t result = ERESERVE;
#ifdef ADC12_CHECK_ARGS
#ifndef ADC12_TIMERA_ENABLED
    if (jiffies>0) 
      return EINVAL;
#endif
    if (!config || !memctl || !numMemctl || numMemctl > 15 || !numSamples || 
        !buf || jiffies == 1 || jiffies == 2 || numSamples % (numMemctl+1) != 0)
      return EINVAL;
#endif
    atomic {
      if (state & ADC_BUSY)
        return EBUSY;
      if (call ADCArbiterInfo.userId() == id){
        adc12ctl1_t ctl1 = {
          adc12busy: 0,
          conseq: (numSamples > numMemctl+1) ? 3 : 1, 
          adc12ssel: config->adc12ssel,
          adc12div: config->adc12div,
          issh: 0,
          shp: 1,
          shs: (jiffies == 0) ? 0 : 1,
          cstartadd: 0
        };
        adc12memctl_t firstMemctl = {
          inch: config->inch,
          sref: config->sref,
          eos: 0
        };     
        uint16_t i, mask = 1;
        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
        ctl0.msc = (jiffies == 0) ? 1 : 0;
        ctl0.sht0 = config->sht;
        ctl0.sht1 = config->sht;

        state = MULTI_CHANNEL;
	resultBufferStart = NULL;
        resultBufferLength = numSamples;
        resultBufferStart = buf;
        resultBufferIndex = 0;
        numChannels = numMemctl+1;
        call HplAdc12.setCtl0(ctl0);
        call HplAdc12.setCtl1(ctl1);
        call HplAdc12.setMCtl(0, firstMemctl);
        for (i=0; i<(numMemctl-1) && i < 14; i++){
          memctl[i].eos = 0;
          call HplAdc12.setMCtl(i+1, memctl[i]);
        }
        memctl[i].eos = 1;
        call HplAdc12.setMCtl(i+1, memctl[i]);
        call HplAdc12.setIEFlags(mask << (i+1));        
        
        if (jiffies){
          state |= USE_TIMERA;
          prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
        }
        result = SUCCESS;
      }      
    }
    return result;
  }

  async command error_t MultiChannel.getData[uint8_t id]()
  {
    uint8_t i;
    atomic {
      if (call ADCArbiterInfo.userId() == id){
        if (!resultBufferStart)
          return EINVAL;
        if (state & ADC_BUSY)
          return EBUSY;
        state |= ADC_BUSY;
        clientID = id;
        for (i=0; i 16) 
            length = 16;
          else
            length = resultBufferLength - resultBufferIndex;
          do {
            *resultBuffer++ = call HplAdc12.getMem(i);
          } while (++i < length);
          resultBufferIndex += length;
          if (overflow || resultBufferLength == resultBufferIndex){
            stopConversion();
            resultBuffer -= resultBufferIndex;
            k = resultBufferIndex - length;
            resultBufferIndex = 0;
            signal SingleChannel.multipleDataReady[clientID](resultBuffer,
               overflow ? k : resultBufferLength);
          } else if (resultBufferLength - resultBufferIndex > 15)
            return;
          else {
            // last sequence < 16 samples
            adc12memctl_t memctl = call HplAdc12.getMCtl(0);
            memctl.eos = 1;
            call HplAdc12.setMCtl(resultBufferLength - resultBufferIndex, memctl);
          }
        }
        break;
      case MULTIPLE_DATA_REPEAT:
        {
          uint8_t i = 0;
          resultBuffer = resultBufferStart;
          do {
            *resultBuffer++ = call HplAdc12.getMem(i);
          } while (++i < resultBufferLength);
          
          resultBufferStart = signal SingleChannel.multipleDataReady[clientID](
              resultBuffer-resultBufferLength,
              overflow ? 0 : resultBufferLength);
          if (!resultBufferStart)  
            stopConversion();
          break;
        }
#endif
      default:
        stopConversion();
        break;
      } // switch
  }

  default async event error_t SingleChannel.singleDataReady[uint8_t id](uint16_t data)
  {
    return FAIL;
  }
   
  default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id](
      uint16_t *buf, uint16_t numSamples)
  {
    return 0;
  }
   
  default async event void MultiChannel.dataReady[uint8_t id](uint16_t *buffer, uint16_t numSamples) {};
  
  default async event void Overflow.memOverflow[uint8_t id](){}
  default async event void Overflow.conversionTimeOverflow[uint8_t id](){}

}

tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/timer/000077500000000000000000000000001207233610700224035ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/timer/Msp430ClockP.nc000066400000000000000000000160041207233610700250100ustar00rootroot00000000000000//$Id: Msp430ClockP.nc,v 1.9 2010-06-29 22:07:45 scipio Exp $

/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * Copyright (c) 2000-2003 The Regents of the University of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Cory Sharp 
 * @author Vlado Handziski 
 * @author Xavier Orduna 
 */

#include 
#include "Msp430XDcoCalib.h"

#include "Msp430Timer.h"

module Msp430ClockP @safe()
{
  provides interface Init;
  provides interface Msp430ClockInit;
  provides interface McuPowerOverride;
}
implementation
{
  MSP430REG_NORACE(IE1);
  MSP430REG_NORACE(TACTL);
  MSP430REG_NORACE(TAIV);
  MSP430REG_NORACE(TBCTL);
  MSP430REG_NORACE(TBIV);

  enum
  {
    ACLK_CALIB_PERIOD = 8,
    TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
  };

  async command mcu_power_t McuPowerOverride.lowestState() {
    return MSP430_POWER_LPM3;
  }

  command void Msp430ClockInit.defaultSetupDcoCalibrate()
  {
  
    // --- setup ---

    TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
    TBCTL = TBSSEL0 | MC1;
    BCSCTL1 = XT2OFF | RSEL2;
    BCSCTL2 = 0;
    TBCCTL0 = CM0;
   }
    
  command void Msp430ClockInit.defaultInitClocks()
  {
	//check if calib tables are OK
	
	if(CALBC1_8MHZ != 0xFF) {
	  	DCOCTL = 0x00;
	  	BCSCTL1 = CALBC1_8MHZ;                    //Set DCO to 8MHz
	  	DCOCTL = CALDCO_8MHZ;    
	} else { //start using reasonable values at 8 Mhz
		DCOCTL = 0x00;
		BCSCTL1 = 0x8D;
		DCOCTL = 0x88;
	}

    // BCSCTL1
    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
    // .XTS = 0; set low frequency mode for LXFT1
    // .DIVA = 0; set the divisor on ACLK to 1
    // .RSEL, do not modify
    //BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));
	BCSCTL1 = XT2OFF | (BCSCTL1);

    // BCSCTL2
    // .SELM = 0; select DCOCLK as source for MCLK
    // .DIVM = 0; set the divisor of MCLK to 1
    // .SELS = 0; select DCOCLK as source for SCLK
    // .DIVS = 2; set the divisor of SCLK to 4
    // .DCOR = 0; select internal resistor for DCO
    //BCSCTL2 = DIVS1;
    //BCSCTL2 = DIVS1 | 0x01;
	
    // IE1.OFIE = 0; no interrupt for oscillator fault
    CLR_FLAG( IE1, OFIE );
  }

  command void Msp430ClockInit.defaultInitTimerA()
  {
    TAR = 0;

    // TACTL
    // .TACLGRP = 0; each TACL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TASSEL = 2; source SMCLK = DCO/4
    // .ID = 0; input divisor of 1
    // .MC = 0; initially disabled
    // .TACLR = 0; reset timer A
    // .TAIE = 1; enable timer A interrupts
    TACTL = TASSEL1 | TAIE;
  }

  command void Msp430ClockInit.defaultInitTimerB()
  {
    TBR = 0;

    // TBCTL
    // .TBCLGRP = 0; each TBCL group latched independently
    // .CNTL = 0; 16-bit counter
    // .TBSSEL = 1; source ACLK
    // .ID = 0; input divisor of 1
    // .MC = 0; initially disabled
    // .TBCLR = 0; reset timer B
    // .TBIE = 1; enable timer B interrupts
    TBCTL = TBSSEL0 | TBIE;
  }

  default event void Msp430ClockInit.setupDcoCalibrate()
  {
    call Msp430ClockInit.defaultSetupDcoCalibrate();
  }
  
  default event void Msp430ClockInit.initClocks()
  {
    call Msp430ClockInit.defaultInitClocks();
  }

  default event void Msp430ClockInit.initTimerA()
  {
    call Msp430ClockInit.defaultInitTimerA();
  }

  default event void Msp430ClockInit.initTimerB()
  {
    call Msp430ClockInit.defaultInitTimerB();
  }


  void startTimerA()
  {
    // TACTL.MC = 2; continuous mode
    TACTL = MC1 | (TACTL & ~(MC1|MC0));
  }

  void stopTimerA()
  {
    //TACTL.MC = 0; stop timer B
    TACTL = TACTL & ~(MC1|MC0);
  }

  void startTimerB()
  {
    // TBCTL.MC = 2; continuous mode
    TBCTL = MC1 | (TBCTL & ~(MC1|MC0));
  }

  void stopTimerB()
  {
    //TBCTL.MC = 0; stop timer B
    TBCTL = TBCTL & ~(MC1|MC0);
  }

  void set_dco_calib( int calib )
  {
    BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
    DCOCTL = calib & 0xff;
  }

  uint16_t test_calib_busywait_delta( int calib )
  {
    int8_t aclk_count = 2;
    uint16_t dco_prev = 0;
    uint16_t dco_curr = 0;

    set_dco_calib( calib );

    while( aclk_count-- > 0 )
    {
      TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt
      TBCCTL0 &= ~CCIFG; // clear pending interrupt
      while( (TBCCTL0 & CCIFG) == 0 ); // busy wait
      dco_prev = dco_curr;
      dco_curr = TAR;
    }

    return dco_curr - dco_prev;
  }

  // busyCalibrateDCO
  // Should take about 9ms if ACLK_CALIB_PERIOD=8.
  // DCOCTL and BCSCTL1 are calibrated when done.
  void busyCalibrateDco()
  {
    // --- variables ---
    int calib;
    int step;

    // --- calibrate ---

    // Binary search for RSEL,DCO,DCOMOD.
    // It's okay that RSEL isn't monotonic.

    for( calib=0,step=0x800; step!=0; step>>=1 )
    {
      // if the step is not past the target, commit it
      if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
        calib |= step;
    }

    // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
    if( (calib & 0x0e0) == 0x0e0 )
      calib &= ~0x01f;

    set_dco_calib( calib );
  }

  command error_t Init.init()
  {
    // Reset timers and clear interrupt vectors
    TACTL = TACLR;
    TAIV = 0;
    TBCTL = TBCLR;
    TBIV = 0;

    atomic
    {
      //signal Msp430ClockInit.setupDcoCalibrate();
      //busyCalibrateDco();
      
      signal Msp430ClockInit.initClocks();
      signal Msp430ClockInit.initTimerA();
      signal Msp430ClockInit.initTimerB();
      startTimerA();
      startTimerB();
    }
    Set_DCO(DELTA_8MHZ);
    return SUCCESS;
  }
}

tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/timer/Msp430XDcoCalib.h000066400000000000000000000120021207233610700252460ustar00rootroot00000000000000/**
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the DEXMA SENSORS SL nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */


/**
 * This code is extracted from code examples at TI website.
 *
 * 
 * @author: Xavier Orduña (xorduna@dexmatech.com)
 */


#ifndef MS430XDCOCALIB_H
#define MS430XDCOCALIB_H

#define DELTA_1MHZ	244
#define	DELTA_8MHZ	1953
#define	DELTA_12MHZ	2930
#define DELTA_16MHZ	3906


unsigned char CAL_DATA[8];
//volatile unsigned int k;
int dcoj;

char *Flash_ptrA;
void Set_DCO(unsigned int Delta);


void dco_flash()
{
	//WDTCTL = WDTPW + WDTHOLD;
	for (dcoj = 0; dcoj < 0xfffe; dcoj++);
	P5OUT=0x00;	
	
	P5DIR=0x21;
	//P5DIR=0x20;
	P5OUT=0x01;	
	
	P2SEL |= 0x02;
	P2DIR |= 0x02;

	dcoj = 0;
	Set_DCO(DELTA_16MHZ);                     // Set DCO and obtain constants
	CAL_DATA[dcoj++] = DCOCTL;
	CAL_DATA[dcoj++] = BCSCTL1;

	Set_DCO(DELTA_12MHZ);                     // Set DCO and obtain constants
	CAL_DATA[dcoj++] = DCOCTL;
	CAL_DATA[dcoj++] = BCSCTL1;

	Set_DCO(DELTA_8MHZ);                      // Set DCO and obtain constants
	CAL_DATA[dcoj++] = DCOCTL;
	CAL_DATA[dcoj++] = BCSCTL1;

	Set_DCO(DELTA_1MHZ);                      // Set DCO and obtain constants
	CAL_DATA[dcoj++] = DCOCTL;
	CAL_DATA[dcoj++] = BCSCTL1;

	Flash_ptrA = (char *)0x10C0;              // Point to beginning of seg A
	FCTL2 = FWKEY + FSSEL0 + FN1;             // MCLK/3 for Flash Timing Generator
	FCTL1 = FWKEY + ERASE;                    // Set Erase bit
	FCTL3 = FWKEY + LOCKA;                    // Clear LOCK & LOCKA bits

	*Flash_ptrA = 0x00;                       // Dummy write to erase Flash seg A
	FCTL1 = FWKEY + WRT;                      // Set WRT bit for write operation
	Flash_ptrA = (char *)0x10F8;              // Point to beginning of cal consts

	for (dcoj = 0; dcoj < 8; dcoj++)
		*Flash_ptrA++ = CAL_DATA[dcoj];            // re-flash DCO calibration data

	FCTL1 = FWKEY;                            // Clear WRT bit
	FCTL3 = FWKEY + LOCKA + LOCK;             // Set LOCK & LOCKA bit

	P5OUT ^= 0x20;                          // Toggle LED
	//P5OUT ^= 0x20;                          // Toggle LED
	
}

void Set_DCO(unsigned int Delta)            // Set DCO to selected frequency
{
  unsigned int Compare, Oldcapture = 0;

  BCSCTL1 |= DIVA_3;                        // ACLK = LFXT1CLK/8
  TACCTL2 = CM_1 + CCIS_1 + CAP;            // CAP, ACLK
  TACTL = TASSEL_2 + MC_2 + TACLR;          // SMCLK, cont-mode, clear

  while (1)
  {
    while (!(CCIFG & TACCTL2));             // Wait until capture occured
    TACCTL2 &= ~CCIFG;                      // Capture occured, clear flag
    Compare = TACCR2;                       // Get current captured SMCLK
    Compare = Compare - Oldcapture;         // SMCLK difference
    Oldcapture = TACCR2;                    // Save current captured SMCLK

    if (Delta == Compare)
      break;                                // If equal, leave "while(1)"
    else if (Delta < Compare)
    {
      DCOCTL--;                             // DCO is too fast, slow it down
      if (DCOCTL == 0xFF)                   // Did DCO roll under?
        if (BCSCTL1 & 0x0f)
          BCSCTL1--;                        // Select lower RSEL
    }
    else
    {
      DCOCTL++;                             // DCO is too slow, speed it up
      if (DCOCTL == 0x00)                   // Did DCO roll over?
        if ((BCSCTL1 & 0x0f) != 0x0f)
          BCSCTL1++;                        // Sel higher RSEL
    }
  }
  TACCTL2 = 0;                              // Stop TACCR2
  TACTL = 0;                                // Stop Timer_A
  BCSCTL1 &= ~DIVA_3;                       // ACLK = LFXT1CLK
}
#endif
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/usci/000077500000000000000000000000001207233610700222265ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/usci/Msp430I2C1P.nc000066400000000000000000000050771207233610700242460ustar00rootroot00000000000000/**
 * Copyright (c) 2009 DEXMA SENSORS SL
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the DEXMA SENSORS SL nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */
 
/**
 * @author Jonathan Hui 
 * @author Xavier Orduna 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $
 */

configuration Msp430I2C1P {
  
  provides interface Resource[ uint8_t id ];
  provides interface ResourceConfigure[uint8_t id ];
  provides interface I2CPacket as I2CBasicAddr;
  
  uses interface Resource as UsciResource[ uint8_t id ];
  uses interface Msp430I2CConfigure[ uint8_t id ];
  uses interface HplMsp430UsciInterrupts as Interrupts;
  
}

implementation {
  
  components new Msp430I2CP() as I2CP;
  components new Z1UsciP() as Z1UsciP;
  Resource = I2CP.Resource;
  ResourceConfigure = I2CP.ResourceConfigure;
  Msp430I2CConfigure = I2CP.Msp430I2CConfigure;
  I2CP.Msp430I2CConfigure -> Z1UsciP.Msp430I2CConfigure;
  I2CBasicAddr = I2CP.I2CBasicAddr;
  UsciResource = I2CP.UsciResource;
  Interrupts = I2CP.Interrupts;
  
  components HplMsp430UsciB1C as UsciC;
  I2CP.UsciB -> UsciC;
  
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/usci/Msp430SpiNoDmaB0P.nc000066400000000000000000000052351207233610700254400ustar00rootroot00000000000000/**
 * Copyright (c) 2009 DEXMA SENSORS SL
 * Copyright (c) 2005-2006 Arched Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the DEXMA SENSORS SL nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * DEXMA SENSORS SL OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Jonathan Hui 
 * @author Xavier Orduna 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:11 $
 */

configuration Msp430SpiNoDmaB0P {

  provides interface Resource[ uint8_t id ];
  provides interface ResourceConfigure[uint8_t id ];
  provides interface SpiByte;
  provides interface SpiPacket[ uint8_t id ];

  uses interface Resource as UsciResource[ uint8_t id ];
  uses interface Msp430SpiConfigure[ uint8_t id ];
  uses interface HplMsp430UsciInterrupts as UsciInterrupts;

}

implementation {

  components new Msp430SpiNoDmaBP() as SpiP;
  components new Z1UsciP() as Z1UsciP;
  Resource = SpiP.Resource;
  ResourceConfigure = SpiP.ResourceConfigure;
  Msp430SpiConfigure = SpiP.Msp430SpiConfigure;
  SpiP.Msp430SpiConfigure -> Z1UsciP.Msp430SpiConfigure;
  SpiByte = SpiP.SpiByte;
  SpiPacket = SpiP.SpiPacket;
  UsciResource = SpiP.UsciResource;
  UsciInterrupts = SpiP.UsciInterrupts;

  components HplMsp430UsciB0C as UsciC;
  SpiP.Usci -> UsciC;

  components LedsC as Leds;
  SpiP.Leds -> Leds;

}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/usci/Z1SerialP.nc000066400000000000000000000046221207233610700243260ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

module Z1SerialP {
  provides interface StdControl;
  provides interface Msp430UartConfigure;
  uses interface Resource;
}
implementation {
  
  msp430_uart_union_config_t msp430_uart_z1_config = { {
    ubr: UBR_8MHZ_115200,
    umctl: UMCTL_8MHZ_115200,
    ucssel: 2,
  } };

//, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1

  command error_t StdControl.start(){
    return call Resource.immediateRequest();
  }
  command error_t StdControl.stop(){
    call Resource.release();
    return SUCCESS;
  }
  event void Resource.granted(){}

  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
    return &msp430_uart_z1_config;
  }
  
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/usci/Z1UsciP.nc000066400000000000000000000056741207233610700240220ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

generic module Z1UsciP() {
  provides interface Msp430SpiConfigure[ uint8_t id ];
  provides interface Msp430I2CConfigure[ uint8_t id ];
}
implementation {

  msp430_spi_union_config_t msp430_spi_z1_config = { {
    ubr		: 2,			/* smclk/2   */
    ucmode	: 0,			/* 3 pin master, no ste */
    ucmst	: 1,
    uc7bit	: 0,			/* 8 bit */
    ucmsb	: 1,			/* msb first, compatible with msp430 usart */
    ucckpl	: 1,			/* inactive state low */
    ucckph	: 0,			/* data captured on rising, changed falling */
    ucssel	: 2,			/* smclk */
  } };

  async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() {
    return (msp430_spi_union_config_t*) &msp430_spi_z1_config;
  }

  msp430_i2c_union_config_t msp430_i2c_z1_config = { {
    ucmode  : 3,			/* i2c mode */
    ucmst   : 1,			/* master */
    ucmm    : 0,			/* single master */
    ucsla10 : 0,			/* 7 bit slave */
    uca10   : 0,			/* 7 bit us */
    uctr    : 0,			/* rx mode to start */
    ucssel  : 2,			/* smclk */
    i2coa   : 1,			/* our address is 1 */
    ucgcen  : 1,			/* respond to general call */
    ubr     : 800,			/* smclk/2 */
  } };

  async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() {
    return (msp430_i2c_union_config_t *) &msp430_i2c_z1_config;
  }

}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/msp430/usci/printfZ1.h000066400000000000000000000311361207233610700241200ustar00rootroot00000000000000/*
 * Copyright (c) 2008 The Regents of the University  of California.
 * Copyright (c) 2005 The President and Fellows of Harvard College.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/* 
 * Writes printf like output to the UART.  
 * This works only on the AVR and MSP430 Microcontrollers!
 * 
        
 * Note: For AVR we explicitly place the print statements in ROM; for
 * MSP430 this is done by default!  For AVR, if we don't place it
 * explicitely in ROM, the statements will go in RAM, which will
 * quickly cause a descent size program to run out of RAM.  By default
 * it doesn't disable the interupts; disabling the interupts when
 * writing to the UART, slows down/makes the mote quite unresponsive,
 * and can lead to problems!  If you wish to disable all printfs to
 * the UART, then comment the flag: PRINTFUART_ENABLED.

 * 
         
         * How to use:
 *   // (0) In your Makefile, define PRINTFUART_ENABLED
 *   CFLAGS += -DPRINTFUART_ENABLED
 *   // (1) Call printfUART_init() from your initialization function 
 *   //     to initialize the UART
 *   printfUART_init();
 *   // (2) Set your UART client to the correct baud rate.  Look at 
 *   //     the comments in printfUART_init(), to figure out what 
 *   //     baud to use for your particular mote
 *
 *   // (3) Send printf statements like this:
 *   printfUART("Hello World, we are in year= %u\n", 2004);
 *   printfUART("Printing uint32_t variable, value= %lu\n", 4294967295);
 *
 * Examples and caveats:
 *   // (1) - Must use curly braces in single section statements.  
 *            (Look in the app.c to see why -- hint: it's a macro)
 *   if (x < 3)
 *       {printfUART("The value of x is %i\n", x);}
 *   // (2) - Otherwise it more or less works like regular printf
 *   printfUART("\nThe value of x=%u, and y=%u\n", x, y); 
 * 
        
 * 
        URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack
        
 * @author Konrad Lorincz
 * @version 2.0, January 5, 2005
 */


#ifndef PRINTFZ1_H
#define PRINTFZ1_H
#ifndef PRINTFUART_H
#define PRINTFUART_H
#include 
#include 

#warning including printfZ1

// -------------------------------------------------------------------
#ifdef PRINTFUART_ENABLED
    #define DEBUGBUF_SIZE 256
    char debugbuf[DEBUGBUF_SIZE];
    char debugbufROMtoRAM[DEBUGBUF_SIZE];

    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
        #define printfUART(__format...) {                          \
            static const char strROM[] PROGMEM = __format;         \
            strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM);  \
            sprintf(debugbuf, debugbufROMtoRAM);                   \
            writedebug();                                          \
        }   
    #else  // assume MSP430 architecture (e.g. TelosA, TelosB, etc.)
        #define printfUART(__format...) {      \
            sprintf(debugbuf, __format);       \
            writedebug();                      \
        }  
        #define printfz1(__format...) {      \
	    snprintf(debugbuf,DEBUGBUF_SIZE, __format);       \
            writedebug();                      \
        }  
    #endif
#else
    #define printfz1(X, args...) dbg("printf", X, ## args)
    #define printfUART(X, args...) dbg("printf", X, ## args)
// #define printfUART(__format...) {}
    void printfz1_init() {}
    void printfUART_init() {}
#endif

#define NOprintfUART(__format...)


// -------------------------------------------------------------------
#ifdef PRINTFUART_ENABLED

/**
 * Initialize the UART port.  Call this from your startup routine.
 */
#define printfz1_init() {atomic printfUART_init_private();}
#define printfUART_init() {atomic printfUART_init_private();}
void printfUART_init_private()
{
    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2)
        // 56K baud
        outp(0,UBRR0H);
        outp(15, UBRR0L);                              //set baud rate
        outp((1< = STDRXD = ALT2(in)
           GPIO<47> = STDTXD = ALT1(out)
        *********/
        //atomic{
          
        //configure the GPIO Alt functions and directions
        _GPIO_setaltfn(46,2);   // STD_RXD
        _GPIO_setaltfn(47,1);   // STD_TXD
        
        _GPDR(46) &= ~_GPIO_bit(46);  // input
        _GPDR(47) |= _GPIO_bit(47);   // output
        
        STLCR |=LCR_DLAB; //turn on DLAB so we can change the divisor
        STDLL = 8;  //configure to 115200;
        STDLH = 0;
        STLCR &= ~(LCR_DLAB);  //turn off DLAB
        
        STLCR |= 0x3; //configure to 8 bits
        
        STMCR &= ~MCR_LOOP;
        STMCR |= MCR_OUT2;
        STIER |= IER_RAVIE;
        STIER |= IER_TIE;
        STIER |= IER_UUE; //enable the UART
        
        //STMCR |= MCR_AFE; //Auto flow control enabled;
        //STMCR |= MCR_RTS;
        
        STFCR |= FCR_TRFIFOE; //enable the fifos
        
//        call Interrupt.allocate();
//        call Interrupt.enable();
        //configure all the interrupt stuff
        //make sure that the interrupt causes an IRQ not an FIQ
        // __REG(0x40D00008) &= ~(1<<21);
        //configure the priority as IPR1
        //__REG(0x40D00020) = (1<<31 | 21);
        //unmask the interrupt
        //__REG(0x40D00004) |= (1<<21);
        
        CKEN |= CKEN5_STUART; //enable the UART's clk    
    #else
    #if defined(PLATFORM_Z1)
                P3SEL |= 0x30;                             // P3.4,5 = USCI_A1 TXD/RXD
                UCA0CTL1 |= UCSSEL_2;                     // CLK = ACLK
                UCA0BR0 = 0x45;                           // 32kHz/9600 = 3.41
                UCA0BR1 = 0x00;                           //
                UCA0MCTL = UCBRS1 + UCBRS0;               // Modulation UCBRSx = 3
                UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**

    #else  // assume TelosA, TelosB, etc.
        // Variabel baud 
        // To change the baud rate, see /tos/platform/msp430/msp430baudrates.h
        uint8_t source = SSEL_SMCLK;
        uint16_t baudrate = 0x0012; // UBR_SMCLK_57600=0x0012
        uint8_t mctl = 0x84;        // UMCTL_SMCLK_57600=0x84
        //uint16_t baudrate = 0x0009; // UBR_SMCLK_115200=0x0009
        //uint8_t mctl = 0x10;        // UMCTL_SMCLK_115200=0x10


        uint16_t l_br = 0;
        uint8_t l_mctl = 0;
        uint8_t l_ssel = 0;

        TOSH_SEL_UTXD1_MODFUNC();
        TOSH_SEL_URXD1_MODFUNC();


        UCTL1 = SWRST;  
        UCTL1 |= CHAR;  // 8-bit char, UART-mode
    
        U1RCTL &= ~URXEIE;  // even erroneous characters trigger interrupts

        UCTL1 = SWRST;
        UCTL1 |= CHAR;  // 8-bit char, UART-mode

        if (l_ssel & 0x80) {
            U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
            U1TCTL |= (l_ssel & 0x7F); 
        }
        else {
            U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
            U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz
        }

        if ((l_mctl != 0) || (l_br != 0)) {
            U1BR0 = l_br & 0x0FF;
            U1BR1 = (l_br >> 8) & 0x0FF;
            U1MCTL = l_mctl;
        }
        else {
            U1BR0 = 0x03;   // 9600 baud
            U1BR1 = 0x00;
            U1MCTL = 0x4A;
        }
      
        ME2 &= ~USPIE1;   // USART1 SPI module disable
        ME2 |= (UTXE1 | URXE1);   // USART1 UART module enable
      
        U1CTL &= ~SWRST;
    
        IFG2 &= ~(UTXIFG1 | URXIFG1);
        IE2 &= ~(UTXIE1 | URXIE1);  // interrupt disabled

   

        //async command void USARTControl.setClockSource(uint8_t source) {
        //    atomic {
                l_ssel = source | 0x80;
                U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
                U1TCTL |= (l_ssel & 0x7F); 
                //    }
                //}
                //async command void USARTControl.setClockRate(uint16_t baudrate, uint8_t mctl) {
                //atomic {
                l_br = baudrate;
                l_mctl = mctl;
                U1BR0 = baudrate & 0x0FF;
                U1BR1 = (baudrate >> 8) & 0x0FF;
                U1MCTL = mctl;
                //}
                //}

                //async command result_t USARTControl.enableRxIntr(){
                //atomic {
                IFG2 &= ~URXIFG1;
                IE2 |= URXIE1;
                //}
                //return SUCCESS;
                //}

                //async command result_t USARTControl.enableTxIntr(){
                //atomic {
                IFG2 &= ~UTXIFG1;
                IE2 |= UTXIE1;
                //}
                //return SUCCESS;
                //}     

    #endif
    #endif
    #endif
    #endif
}

#if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
#else
#if defined(PLATFORM_IMOTE2)
#else
#if defined(PLATFORM_Z1)
#else // assume AVR architecture (e.g. TelosA, TelosB)
    bool isTxIntrPending()
    {
        if (U1TCTL & TXEPT) {
            return TRUE;
        }
        return FALSE;
    }
#endif
#endif
#endif

/**
 * Outputs a char to the UART.
 */
void UARTPutChar(char c)
{
    if (c == '\n')
        UARTPutChar('\r');


    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
        loop_until_bit_is_set(UCSR0A, UDRE);
        outb(UDR0,c);

    #else
    #if defined(PLATFORM_IMOTE2)
        STTHR = c;    
    #else
    #if defined(PLATFORM_Z1)
        while (!(IFG2&UCA0TXIFG));
                atomic UCA0TXBUF = c;

    #else // assume AVR architecture (e.g. TelosA, TelosB)
        U1TXBUF = c;  
        while( !isTxIntrPending() )  
            continue;
    #endif
    #endif
    #endif
}

/**
 * Outputs the entire debugbuf to the UART, or until it encounters '\0'.
 */
void writedebug()
{
    uint16_t i = 0;
    
    while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE)
        UARTPutChar(debugbuf[i++]);
}

#endif  // PRINTFUART_ENABLED
// -------------------------------------------------------------------

#if 0
// --------------------------------------------------------------
#define assertUART(x) if (!(x)) { __assertUART(__FILE__, __LINE__); }
void __assertUART(const char* file, int line)
{
    printfUART("ASSERT FAILED: file= %s, lineNbr= %i\n", file, line);
    // for some reason, CLR means on
    TOSH_MAKE_RED_LED_OUTPUT();
    TOSH_MAKE_YELLOW_LED_OUTPUT();
    TOSH_MAKE_GREEN_LED_OUTPUT();
    TOSH_CLR_RED_LED_PIN();
    TOSH_CLR_YELLOW_LED_PIN();
    TOSH_CLR_GREEN_LED_PIN();
    exit(1);
}
// --------------------------------------------------------------
#endif

#endif  // PRINTFUART_H
#endif  // PRINTFZ1_H

tinyos-2.1.2+dfsg/tos/platforms/z1/chips/sht11/000077500000000000000000000000001207233610700211755ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/sht11/HalSensirionSht11C.nc000066400000000000000000000052031207233610700250410ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HalSensirionSht11C is an advanced access component for the
 * Sensirion SHT11 model humidity and temperature sensor, available on
 * the telosb platform. This component provides the SensirionSht11
 * interface, which offers full control over the device. Please
 * acquire the Resource before using it.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

configuration HalSensirionSht11C {
  provides interface Resource[ uint8_t client ];
  provides interface SensirionSht11[ uint8_t client ];
}
implementation {
  components new SensirionSht11LogicP();
  SensirionSht11 = SensirionSht11LogicP;

  components HplSensirionSht11C;
  Resource = HplSensirionSht11C.Resource;
  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
  #ifndef IS_ZIGLET
    SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
  #endif

  components new TimerMilliC();
  SensirionSht11LogicP.Timer -> TimerMilliC;

  components LedsC;
  SensirionSht11LogicP.Leds -> LedsC;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/sht11/HplSensirionSht11C.nc000066400000000000000000000070211207233610700250600ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HplSensirionSht11C is a low-level component, intended to provide
 * the physical resources used by the Sensirion SHT11 sensor on the
 * telosb platform so that the chip driver can make use of them. You
 * really shouldn't be wiring to this, unless you're writing a new
 * Sensirion SHT11 driver.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.6 $ $Date: 2007-02-04 19:56:29 $
 */

configuration HplSensirionSht11C {
  provides interface Resource[ uint8_t id ];
  provides interface GeneralIO as DATA;
  provides interface GeneralIO as SCK;
  #ifndef IS_ZIGLET
    provides interface GpioInterrupt as InterruptDATA;
  #endif
 
}
implementation {
  components HplMsp430GeneralIOC;
  
  components new Msp430GpioC() as DATAM;
  components new Msp430GpioC() as SCKM;

  #ifdef IS_ZIGLET
    #warning USING SHT1X SENSOR IN ZIGLET PORT
    DATAM -> HplMsp430GeneralIOC.Port51;  //10
    SCKM -> HplMsp430GeneralIOC.Port52; //56
  #else
    components new Msp430GpioC() as PWRM;
    PWRM -> HplMsp430GeneralIOC.Port21;   
    DATAM -> HplMsp430GeneralIOC.Port10;   
    SCKM -> HplMsp430GeneralIOC.Port16;   
  #endif
  DATA = DATAM;
  SCK = SCKM;

  components HplSensirionSht11P;
  #ifndef IS_ZIGLET
    HplSensirionSht11P.PWR -> PWRM;
  #endif

  HplSensirionSht11P.DATA -> DATAM;
  HplSensirionSht11P.SCK -> SCKM;

  components new TimerMilliC();
  HplSensirionSht11P.Timer -> TimerMilliC;

  #ifndef IS_ZIGLET  
    components HplMsp430InterruptC;
    components new Msp430InterruptC() as InterruptDATAC;
    InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port10;
    InterruptDATA = InterruptDATAC.Interrupt;
  #endif
  
  components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
  Resource = Arbiter;
  
  components new SplitControlPowerManagerC();
  SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P;
  SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
  SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/sht11/HplSensirionSht11P.nc000066400000000000000000000052721207233610700251030ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

#include "Timer.h"

/**
 * HplSensirionSht11P is a low-level component that controls power for
 * the Sensirion SHT11 sensor on the telosb platform.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

module HplSensirionSht11P {
  provides interface SplitControl;
  uses interface Timer;
  uses interface GeneralIO as PWR;
  uses interface GeneralIO as DATA;
  uses interface GeneralIO as SCK;
}
implementation {
  task void stopTask();

  command error_t SplitControl.start() {
  #ifndef IS_ZIGLET 
    call PWR.makeOutput();
    call PWR.set();
    call Timer.startOneShot( 11 );
  #endif

  #ifdef IS_ZIGLET
    signal SplitControl.startDone( SUCCESS );
  #endif
    return SUCCESS;
  }

  event void Timer.fired() {
    signal SplitControl.startDone( SUCCESS );
  }
  
  command error_t SplitControl.stop() {
    call SCK.makeInput();
    call SCK.clr();
    call DATA.makeInput();
    call DATA.clr();
  #ifndef IS_ZIGLET 
    call PWR.clr();
  #endif
    post stopTask();
    return SUCCESS;
  }

  task void stopTask() {
    signal SplitControl.stopDone( SUCCESS );
  }
}

tinyos-2.1.2+dfsg/tos/platforms/z1/chips/sht11/SensirionSht11C.nc000066400000000000000000000061011207233610700244120ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * SensirionSht11C is a top-level access component for the Sensirion
 * SHT11 model humidity and temperature sensor, available on the
 * telosb platform. Because this component represents one physical
 * device, simultaneous calls to read temperature and humidity will be
 * arbitrated and executed in sequential order. Feel free to read both
 * at the same time, just be aware that they'll come back
 * sequentially.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
 */

generic configuration SensirionSht11C() {
  provides interface Read as Temperature;
  provides interface DeviceMetadata as TemperatureMetadata;
  provides interface Read as Humidity;
  provides interface DeviceMetadata as HumidityMetadata;
}
implementation {
  components new SensirionSht11ReaderP();

  Temperature = SensirionSht11ReaderP.Temperature;
  TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata;
  Humidity = SensirionSht11ReaderP.Humidity;
  HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata;

  components HalSensirionSht11C;

  enum { TEMP_KEY = unique("Sht11.Resource") };
  enum { HUM_KEY = unique("Sht11.Resource") };

  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/sht11/SensirionSht11LogicP.nc000066400000000000000000000257451207233610700254240ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

#include "Timer.h"
#include "SensirionSht11.h"

/**
 * SensirionSht11LogicP contains the actual driver logic needed to
 * read from the Sensirion SHT11 temperature/humidity sensor. It
 * depends on 2 underlying GeneralIO interfaces, one for the data pin
 * and one for the clock pin, and one underlying GpioInterrupt.  It
 * provides the HAL-level SensirionSht11 interface. It's generic, so
 * you can instantiate it multiple times if you have more than one
 * Sensirion SHT11 attached to a node. 
 * 
 * 
        
 * This code assumes that the MCU clock is less than 10 MHz.  If you
 * ever run this on a faster MCU, you'll need to insert a lot of
 * waits to keep the Sensirion happy.
 *
 * Modified to work for both GPIO's and Ziglet port of Zolertia Z1 mote
 * Shadows /chip/sht1x
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:12 $
 */

generic module SensirionSht11LogicP() {
  provides interface SensirionSht11[ uint8_t client ];

  uses interface GeneralIO as DATA;
  uses interface GeneralIO as CLOCK;

  uses interface Timer;
  uses interface Leds;
  #ifndef IS_ZIGLET
    uses interface GpioInterrupt as InterruptDATA;
  #endif

}
implementation {

  typedef enum {
    CMD_MEASURE_TEMPERATURE = 0x3,
    CMD_MEASURE_HUMIDITY = 0x5,
    CMD_READ_STATUS = 0x7,
    CMD_WRITE_STATUS = 0x6,
    CMD_SOFT_RESET = 0x1E,
  } sht_cmd_t;

  enum {
    TIMEOUT_RESET = 11,
    TIMEOUT_14BIT = 250,
    TIMEOUT_12BIT = 80, //70,
    TIMEOUT_8BIT = 20, //15,
  } sht_timeout_t;

  bool on = TRUE;
  bool busy = FALSE;
  uint8_t status = 0;
  sht_cmd_t cmd;
  uint8_t newStatus;
  bool writeFail = FALSE;

  uint8_t currentClient;

  error_t performCommand();
  void initPins();
  void resetDevice();
  void transmissionStart();
  void sendCommand(uint8_t _cmd);
  void writeByte(uint8_t byte);
  error_t waitForResponse();
  void enableInterrupt();
  uint8_t readByte();
  void ack();
  void endTransmission();

  task void readSensor();
  task void signalStatusDone();

  command error_t SensirionSht11.reset[ uint8_t client ]() {
    if ( !on ) { return EOFF; }
    if ( busy ) { return EBUSY; } else { busy = TRUE; }
    cmd = CMD_SOFT_RESET;
    currentClient = client;
    return performCommand();
  }

  command error_t SensirionSht11.measureTemperature[ uint8_t client ]() {
    if ( !on ) { return EOFF; }
    if ( busy ) { return EBUSY; } else { busy = TRUE; }
    cmd = CMD_MEASURE_TEMPERATURE;
    currentClient = client;
    return performCommand();
  }
  
  command error_t SensirionSht11.measureHumidity[ uint8_t client ]() {
    if ( !on ) { return EOFF; }
    if ( busy ) { return EBUSY; } else { busy = TRUE; }
    cmd = CMD_MEASURE_HUMIDITY;
    currentClient = client;
    return performCommand();
  }

  /* FIXME: these don't seem to work */
  command error_t SensirionSht11.readStatusReg[ uint8_t client ]() {
    if ( !on ) { return EOFF; }
    if ( busy ) { return EBUSY; } else { busy = TRUE; }
    cmd = CMD_READ_STATUS;
    currentClient = client;
    return performCommand();
  }
  
  /* FIXME: these don't seem to work */
  command error_t SensirionSht11.writeStatusReg[ uint8_t client ]( uint8_t val ) {
    if ( !on ) { return EOFF; }
    if ( busy ) { return EBUSY; } else { busy = TRUE; }
    cmd = CMD_WRITE_STATUS;
    newStatus = val;
    currentClient = client;
    return performCommand();
  }

  // performCommand() returns both error_t and status reg -- fortunately, error_t is 8bit
  error_t performCommand() {
    initPins();
    resetDevice();
    transmissionStart();
    cmd &= 0x1F; // clear the first 3 address bits to 000
    sendCommand(cmd);

    if ( waitForResponse() != SUCCESS ) {
      busy = FALSE;
      return FAIL;
    }

    switch(cmd) {

    case CMD_SOFT_RESET:
      call Timer.startOneShot( TIMEOUT_RESET );
      break;

    case CMD_MEASURE_TEMPERATURE:
      enableInterrupt();
      if ( status & SHT11_STATUS_LOW_RES_BIT ) {
	call Timer.startOneShot( TIMEOUT_12BIT );
      } else {
	call Timer.startOneShot( TIMEOUT_14BIT );
      }

      break;

    case CMD_MEASURE_HUMIDITY:
      enableInterrupt();
      if ( status & SHT11_STATUS_LOW_RES_BIT ) {
	call Timer.startOneShot( TIMEOUT_8BIT );
      } else {
	call Timer.startOneShot( TIMEOUT_12BIT );
      }

      break;

    case CMD_READ_STATUS: 
    {
      uint8_t tempStatus;
      uint8_t crc;

      tempStatus = readByte();
      crc = readByte();
      endTransmission();

      status = tempStatus; // FIXME: need to check CRC!
      
      post signalStatusDone();
    }
    
    case CMD_WRITE_STATUS:
      writeByte( newStatus );
      
      if ( waitForResponse() != SUCCESS ) {
	writeFail = TRUE;
      } else {
	status = newStatus;
      }
      
      post signalStatusDone();
    }

    // leave the device busy...we're waiting for an interrupt
    return SUCCESS;
  }

  void initPins() {
    call CLOCK.makeOutput();
    call CLOCK.clr();
    call DATA.makeInput();
    call DATA.set();
  #ifndef IS_ZIGLET
    call InterruptDATA.disable();
  #endif
  }
  
  void resetDevice() {
    uint8_t i;
    call DATA.makeOutput();
    call DATA.set();
    call CLOCK.clr();
    for( i = 0; i < 9; i++ ) {
      call CLOCK.set();
      call CLOCK.clr();
    }
  }

  void transmissionStart() {
    call DATA.makeOutput();
    call DATA.set();
    call CLOCK.clr();
    call CLOCK.set();
    call DATA.clr();
    call CLOCK.clr();
    call CLOCK.set();
    call DATA.set();
    call CLOCK.clr();
  }

  void sendCommand(uint8_t _cmd) {
    writeByte(_cmd);
  }

  void writeByte(uint8_t byte) {
    uint8_t i;
    for( i = 0; i < 8; i++ ) {
      if ( byte & 0x80 )
	call DATA.set();
      else
	call DATA.clr();
      byte = byte << 1;
      call CLOCK.set();
      call CLOCK.clr();
    }
  }

  error_t waitForResponse() {
    call DATA.makeInput();
    call DATA.set();
    call CLOCK.set();
    if (call DATA.get()) {
      // the device didn't pull the DATA line low
      // the command wasn't received or acknowledged
      return FAIL;
    }
    call CLOCK.clr();
    return SUCCESS;
  }

  #ifdef IS_ZIGLET
  task void stayAwake(){
   if (!call DATA.get()){
     post readSensor();
   } else {
     post stayAwake();
   }
  }
  #endif
 
    void enableInterrupt() {
      call DATA.makeInput();
      call DATA.set();
      #ifndef IS_ZIGLET
        call InterruptDATA.enableFallingEdge();
      #else
        post stayAwake();
      #endif
    }

  event void Timer.fired() {

    switch(cmd) {

    case CMD_SOFT_RESET:
      // driver has waited long enough for device to reset
      busy = FALSE;
      signal SensirionSht11.resetDone[currentClient]( SUCCESS );
      break;

    case CMD_MEASURE_TEMPERATURE:
      // timeout expired with no data interrupt
      busy = FALSE;
      signal SensirionSht11.measureTemperatureDone[currentClient]( FAIL, 0 );
      break;

    case CMD_MEASURE_HUMIDITY:
      // timeout expired with no data interrupt
      busy = FALSE;
      signal SensirionSht11.measureHumidityDone[currentClient]( FAIL, 0 );
      break;

    default:
      // we're in an unexpected state. what to do?
      break;
    }
  }

 #ifndef IS_ZIGLET
    async event void InterruptDATA.fired() {
      call InterruptDATA.disable();
      post readSensor();
    }
 #endif

  task void readSensor() {
    uint16_t data = 0;
    uint8_t crc;

    if ( busy == FALSE ) {
      // the interrupt was received after the timeout. 
      // we've already signaled FAIL to the client, so just give up.
      return;
    }

    call Timer.stop();

    data = readByte() << 8;
    data |= readByte();
    // printfUART("readb %d %d\n", data, readByte());
    crc = readByte();
    
    endTransmission();

    switch( cmd ) {
    case CMD_MEASURE_TEMPERATURE:
      busy = FALSE;
      signal SensirionSht11.measureTemperatureDone[currentClient]( SUCCESS, data );
      break;

    case CMD_MEASURE_HUMIDITY:
      busy = FALSE;
      signal SensirionSht11.measureHumidityDone[currentClient]( SUCCESS, data );
      
      break;

    default:
      break; // unknown command - shouldn't reach here
    }
  }

  uint8_t readByte() {
    uint8_t byte = 0;
    uint8_t i;

    for( i = 0; i < 8; i++ ) {
      call CLOCK.set();
      if (call DATA.get())
	byte |= 1;
      if (i != 7) 
	byte = byte << 1;
      call CLOCK.clr();
    }

    ack();
    return byte;
  }

  void ack() {
    call DATA.makeOutput();
    call DATA.clr();
    call CLOCK.set();
    call CLOCK.clr();
    call DATA.makeInput();
    call DATA.set();
  }
  
  void endTransmission() {
    call DATA.makeOutput();
    call DATA.set();
    call CLOCK.set();
    call CLOCK.clr();
  }

  task void signalStatusDone() {
    bool _writeFail = writeFail;
    switch( cmd ) {
    case CMD_READ_STATUS:
      busy = FALSE;
      signal SensirionSht11.readStatusRegDone[currentClient]( SUCCESS, status );
      break;
    case CMD_WRITE_STATUS:
      busy = FALSE;
      writeFail = FALSE;
      signal SensirionSht11.writeStatusRegDone[currentClient]( (_writeFail ? FAIL : SUCCESS) );
      break;
    default:
      // shouldn't happen.
      break;
    }
  }

  default event void SensirionSht11.resetDone[uint8_t client]( error_t result ) { }
  default event void SensirionSht11.measureTemperatureDone[uint8_t client]( error_t result, uint16_t val ) { }
  default event void SensirionSht11.measureHumidityDone[uint8_t client]( error_t result, uint16_t val ) { }
  default event void SensirionSht11.readStatusRegDone[uint8_t client]( error_t result, uint8_t val ) { }
  default event void SensirionSht11.writeStatusRegDone[uint8_t client]( error_t result ) { }
}

tinyos-2.1.2+dfsg/tos/platforms/z1/chips/stm25p/000077500000000000000000000000001207233610700213675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/stm25p/HplStm25pPinsC.nc000066400000000000000000000041721207233610700244100ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of general-purpose I/O for a ST M25P chip
 * connected to a TI MSP430.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
 */

configuration HplStm25pPinsC {

  provides interface GeneralIO as CSN;
  provides interface GeneralIO as Hold;

}

implementation {

  components HplMsp430GeneralIOC as HplGeneralIOC;
  components new Msp430GpioC() as CSNM;
  components new Msp430GpioC() as HoldM;

  CSNM -> HplGeneralIOC.Port44;
  HoldM -> HplGeneralIOC.Port57;

  CSN = CSNM;
  Hold = HoldM;

}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/stm25p/HplStm25pSpiC.nc000066400000000000000000000037741207233610700242410ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HPL implementation of the Spi bus for a ST M25P chip connected to a
 * TI MSP430.
 *
 * @author Jonathan Hui 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
 */

configuration HplStm25pSpiC {

  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;

}

implementation {

  components new Msp430SpiB0C() as SpiC;
  Resource = SpiC;
  SpiByte = SpiC;
  SpiPacket = SpiC;

}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/000077500000000000000000000000001207233610700212605ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/HalTMP102Advanced.nc000066400000000000000000000052551207233610700245470ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HalTMP175Advanced is the HAL control interface for the TI TMP175
 * Digital Temperature Sensor. 
 *
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $
 */

#include "TMP102.h"

interface HalTMP102Advanced {

  command error_t setThermostatMode(bool useInt);
  event void setThermostatModeDone(error_t error);
  command error_t setPolarity(bool polarity);
  event void setPolarityDone(error_t error);
  command error_t setFaultQueue(tmp102_fqd_t depth);
  event void setFaultQueueDone(error_t error);
  command error_t setTLow(uint16_t val);
  event void setTLowDone(error_t error);
  command error_t setTHigh(uint16_t val);
  event void setTHighDone(error_t error);
  
  //it is not possible to configure sensor resolution
  
  
  event void alertThreshold();
  
  /* We must include following modes for TMP102 */
  //conversion rate
  //extended mode
  command error_t setExtendedMode(bool extendedmode);
  event void setExtendedModeDone(error_t error);
  command error_t setConversionRate(tmp102_cr_t rate);
  event void setConversionRateDone(error_t error);


}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/HalTMP102ControlP.nc000066400000000000000000000161121207233610700245740ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HalTMP175ControlP device specific Hal interfaces for the TI TMP175 Chip.
 *
 * Note that only the data path uses split phase resource arbitration
 * 
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $
 */

module HalTMP102ControlP
{
  provides interface HalTMP102Advanced;

  uses interface HplTMP102;
  uses interface Resource as TMP102Resource;
}

implementation {

  enum {
    STATE_SET_MODE,
    STATE_SET_POLARITY,
    STATE_SET_FQ,
    STATE_SET_CR,
    STATE_SET_EM
    STATE_NONE,

    STATE_SET_TLOW,
    STATE_SET_THIGH,
  };

  uint8_t mState = STATE_NONE;
  uint8_t mConfigRegVal = 0;
  error_t mHplError;

  task void complete_Alert() {
    signal HalTMP102Advanced.alertThreshold();
  }

  static error_t setCfg(uint8_t nextState, uint32_t val) {
    error_t error;

    mState = nextState;

    error = call HplTMP102.setConfigReg(val);

    if (error) {
      call TMP102Resource.release();
    }
    else {
      mConfigRegVal = val;
    }

    return error;
  }

  static error_t setThresh(uint8_t nextState, uint32_t val) {
    error_t error;

    mState = nextState;

    if(mState == STATE_SET_TLOW)
      error = call HplTMP102.setTLowReg(val << 4);
    else
      error = call HplTMP102.setTHighReg(val << 4);

    if (error) {
      call TMP102Resource.release();
    }

    return error;
  }

  command error_t HalTMP102Advanced.setThermostatMode(bool useInt) {
    error_t error;
    uint8_t newRegVal;

    error = call TMP102Resource.immediateRequest();
    if (error) {
      return error;
    }

    newRegVal = (useInt) ? (mConfigRegVal | TMP102_CFG_TM) : (mConfigRegVal & ~TMP102_CFG_TM);
    error = setCfg(STATE_SET_MODE, newRegVal);

    return error;
  }


  command error_t HalTMP175Advanced.setPolarity(bool polarity) {
    error_t error;
    uint8_t newRegVal;

    error = call TMP102Resource.immediateRequest();
    if (error) {
      return error;
    }

    newRegVal = (polarity) ? (mConfigRegVal | TMP102_CFG_POL) : (mConfigRegVal & ~TMP102_CFG_POL);
    error = setCfg(STATE_SET_POLARITY, newRegVal);

    return error;
  }

  command error_t HalTMP175Advanced.setFaultQueue(tmp102_fqd_t depth) {
    error_t error;
    uint8_t newRegVal;

    if ((uint8_t)depth > 3) {
      error = EINVAL;
      return error;
    }

    error = call TMP102Resource.immediateRequest();
    if (error) {
      return error;
    }

    newRegVal = (mConfigRegVal & ~TMP102_CFG_FQ(3)) | (TMP102_CFG_FQ(depth));
    error = setCfg(STATE_SET_FQ, newRegVal);

    return error;
  }

  command error_t HalTMP102Advanced.setTLow(uint16_t val) {
    error_t error;

    error = call TMP102Resource.immediateRequest();
    if (error) {
      return error;
    }

    error = setThresh(STATE_SET_TLOW, val);

    if (error) {
      call TMP102Resource.release();
    }

    return error;
  }

  command error_t HalTMP102Advanced.setTHigh(uint16_t val) {
    error_t error;

    error = call TMP102Resource.immediateRequest();
    if (error) {
      return error;
    }

    error = setThresh(STATE_SET_THIGH, val);

    if (error) {
      call TMP102Resource.release();
    }

    return error;
  }

  task void handleConfigReg() {
    error_t lasterror;
    atomic lasterror = mHplError;
    call TMP102Resource.release();
    switch (mState) {
    case STATE_SET_MODE:
      mState = STATE_NONE;
      signal HalTMP102Advanced.setThermostatModeDone(lasterror);
      break;
    case STATE_SET_POLARITY:
      mState = STATE_NONE;
      signal HalTMP102Advanced.setPolarityDone(lasterror);
      break;
    case STATE_SET_FQ:
      mState = STATE_NONE;
      signal HalTMP102Advanced.setFaultQueueDone(lasterror);
      break;
    case STATE_SET_RES:
      mState = STATE_NONE;
      signal HalTMP102Advanced.setResolutionDone(lasterror);
      break;
    default:
      break;
    }
    //mState = STATE_NONE;
    return;
  }

  task void handleTReg() {
    error_t lasterror;
    atomic lasterror = mHplError;
    call TMP102Resource.release();
    switch (mState) {
    case STATE_SET_TLOW:
      mState = STATE_NONE;
      signal HalTMP102Advanced.setTLowDone(lasterror);
      break;
    case STATE_SET_THIGH:
      mState = STATE_NONE;
      signal HalTMP102Advanced.setTHighDone(lasterror);
      break;
    default:
      mState = STATE_NONE;
      break;
    }
    //mState = STATE_NONE;
  }

  event void TMP102Resource.granted() {
    // intentionally left blank
  }

  async event void HplTMP102.setConfigRegDone(error_t error) {
    mHplError = error;
    post handleConfigReg();
    return;
  }

  async event void HplTMP102.setTLowRegDone(error_t error) {
    mHplError = error;
    post handleTReg();

  }

  async event void HplTMP102.setTHighRegDone(error_t error) {
    mHplError = error;
    post handleTReg();
  }

  async event void HplTMP102.alertThreshold() {
    post complete_Alert();
  }

  async event void HplTMP102.measureTemperatureDone(error_t error, uint16_t val) {
    // intentionally left blank
  }
  
  default event void HalTMP102Advanced.setTHighDone(error_t error) { return; }
  default event void HalTMP102Advanced.setThermostatModeDone(error_t error){ return; } 
  default event void HalTMP102Advanced.setPolarityDone(error_t error){ return; }
  default event void HalTMP102Advanced.setFaultQueueDone(error_t error){ return; }
  default event void HalTMP102Advanced.setResolutionDone(error_t error){ return; }
  default event void HalTMP102Advanced.setTLowDone(error_t error){ return; }
  default event void HalTMP102Advanced.alertThreshold(){ return; }
  
  //we must include other functions for tmp102.
  
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/HalTMP102ReaderP.nc000066400000000000000000000061521207233610700243610ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HalTMP102ReaderP provides the service level HIL and device
 * specific Hal interfaces for the TI TMP102 Chip.
 *
 * Note that only the data path uses split phase resource arbitration
 * 
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $
 */

generic module HalTMP102ReaderP()
{
  provides interface Read as Temperature;

  uses interface HplTMP102;
  uses interface Resource as TMP102Resource;
}

implementation {

  enum {
    STATE_SET_MODE,
    STATE_SET_POLARITY,
    STATE_SET_FQ,
    STATE_SET_CR,
    STATE_SET_EM,
    STATE_NONE
  };

  uint8_t mState = STATE_NONE;
  uint8_t mConfigRegVal = 0;
  error_t mHplError;

  command error_t Temperature.read() {
    return call TMP102Resource.request();
  }

  event void TMP102Resource.granted() {
    error_t error;
    
    error = call HplTMP102.measureTemperature();
    if (error) {
      call TMP102Resource.release();
      signal Temperature.readDone(error,0);
    }
    return;
  }

  async event void HplTMP102.measureTemperatureDone(error_t tmp102_error, uint16_t val) {
    call TMP102Resource.release();
    signal Temperature.readDone(tmp102_error,(val >> 4));
    return;
  }

  // intentionally left empty
  async event void HplTMP102.setTLowRegDone(error_t error) {}
  async event void HplTMP102.setTHighRegDone(error_t error) {}
  async event void HplTMP102.setConfigRegDone(error_t error) {}
  async event void HplTMP102.alertThreshold() {}

  default event void Temperature.readDone(error_t error, uint16_t val) {return ;}

}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/HplTMP102.nc000066400000000000000000000055051207233610700231360ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HplTMP102 is the HPL inteface to the Texas Instrument TMP102 
 * Digital Temperature Sensor. 
 *
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $
 */

interface HplTMP102 {

  /**
   * Starts a temperature measurement.
   *
   * @return SUCCESS if the measurement will be made
   */
  command error_t measureTemperature();

  /**
   * Presents the result of a temperature measurement.
   *
   * @param error SUCCESS if the measurement was successful
   * @param val the temperature reading
   */
  async event void measureTemperatureDone( error_t error, uint16_t val );

  /**
   * Sets a new value to the TMP102 configuration register.
   *
   * @param val the new value to be written
   *
   * @return SUCCESS if the set will be performed
   */
  command error_t setConfigReg( uint16_t val );

  /**
   * Signals the completion of the configuration register set.
   *
   * @param error SUCCESS if the set was successful
   */
  async event void setConfigRegDone( error_t error );

  command error_t setTLowReg(uint16_t val);
  async event void setTLowRegDone(error_t error);

  command error_t setTHighReg(uint16_t val);
  async event void setTHighRegDone(error_t error);

  async event void alertThreshold();

}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/HplTMP102LogicP.nc000066400000000000000000000173521207233610700242370ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HplTMP175LogicP is the driver for the TI TMP175. It requires an 
 * I2C packet interface and provides the HplTMP175 HPL interface.
 * This module DOES NOT apply any specific configuration to the GpioInterrupt 
 * pin associated with the theshold alerts. This must be handled by an
 * outside configuration/module according to the host platform.
 * 
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $
 */

#include "TMP102.h"
#include "I2C.h"

generic module HplTMP102LogicP(uint16_t devAddr)
{
  provides interface Init;
  provides interface SplitControl;
  provides interface HplTMP102;

  uses interface I2CPacket;
  uses interface GpioInterrupt as AlertInterrupt;
  uses interface GeneralIO as InterruptPin;
}

implementation {

  enum {
    STATE_IDLE,
    STATE_STARTING,
    STATE_STOPPING,
    STATE_STOPPED,
    STATE_READTEMP,
    STATE_SETCONFIG,
    STATE_SETTHIGH,
    STATE_SETTLOW,
  };

  bool mfPtrReset;
  uint8_t mI2CBuffer[4];
  uint8_t mState;
  uint8_t mConfigRegVal;
  norace error_t mSSError;

  static error_t doSetReg(uint8_t nextState, uint8_t reg, uint8_t val) {
    error_t error = SUCCESS;

    atomic {
      if (mState == STATE_IDLE) {
	mState = nextState;
      }
      else {
	error = EBUSY;
      }
    }
    if (error)
      return error;

    mI2CBuffer[0] = reg;
    mI2CBuffer[1] = val;

    error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
    
    if (error) 
      atomic mState = STATE_IDLE;

    return error;
  }

  static error_t doSetRegWord(uint8_t nextState, uint8_t reg, uint16_t val) {
    error_t error = SUCCESS;

    atomic {
      if (mState == STATE_IDLE) {
        mState = nextState;
      }
      else {
        error = EBUSY;
      }
    }
    if (error)
      return error;

    mI2CBuffer[0] = reg;
    mI2CBuffer[1] = (val >> 8) & 0xFF;
    mI2CBuffer[2] = val & 0xFF;

    error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,3,mI2CBuffer);
    
    if (error) 
      atomic mState = STATE_IDLE;

    return error;
  }

  task void StartDone() {
    atomic mState = STATE_IDLE;
    signal SplitControl.startDone(mSSError);
    return;
  }

  task void StopDone() {
    atomic mState = STATE_STOPPED;
    signal SplitControl.stopDone(mSSError);
    return;
  }

  command error_t Init.init() {
    // careful! this can be changed via polarity I believe
    call InterruptPin.makeInput();
    call AlertInterrupt.enableRisingEdge();
    mfPtrReset = FALSE;
    mConfigRegVal = 0;
    mState = STATE_STOPPED;
    return SUCCESS;
  }

  command error_t SplitControl.start() {
    error_t error = SUCCESS;
    atomic {
      if (mState == STATE_STOPPED) { 
	mState = STATE_IDLE; 
      }
      else {
	error = EBUSY;
      }
    }
    
    if (error)
      return error;
    
    return doSetReg(STATE_STARTING,TMP102_PTR_CFG,(mConfigRegVal & ~TMP175_CFG_SD));
  }

  command error_t SplitControl.stop() {
    return doSetReg(STATE_STOPPING,TMP102_PTR_CFG,(mConfigRegVal | TMP175_CFG_SD));
  }
  
  command error_t HplTMP102.measureTemperature() { 
    error_t error = SUCCESS;

    atomic {
      if (mState == STATE_IDLE) {
	mState = STATE_READTEMP;
      }
      else {
	error = EBUSY;
      }
    }
    if (error)
      return error;

    mI2CBuffer[0] = mI2CBuffer[1] = 0;

    error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,2,mI2CBuffer);

    if (error)
      atomic mState = STATE_IDLE;

    return error;

  }

  command error_t HplTMP102.setConfigReg( uint16_t val ){
    return doSetReg(STATE_SETCONFIG,TMP102_PTR_CFG,val);
  }
  
  command error_t HplTMP102.setTLowReg(uint16_t val){ 
    return doSetRegWord(STATE_SETTLOW,TMP102_PTR_TLOW,val);  
  }

  command error_t HplTMP102.setTHighReg(uint16_t val){
    return doSetRegWord(STATE_SETTHIGH,TMP102_PTR_THIGH,val); 
  }

  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
    uint16_t tempVal;

    switch (mState) {
    case STATE_READTEMP:
      tempVal = buf[0];
      tempVal = ((tempVal << 8) | buf[1]);
      mState = STATE_IDLE;
      signal HplTMP175.measureTemperatureDone(i2c_error,tempVal);
      break;
    default:
      break;
    }

    return;
  }

  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
    error_t error = i2c_error;

    if (mfPtrReset) {
      mfPtrReset = FALSE;
      switch (mState) {
        case STATE_STARTING:
          mSSError = error;
          post StartDone();
          break;
        
        case STATE_STOPPING:
          mSSError = error;
          post StopDone();
          break;
        
        case STATE_READTEMP:
          // Should never get here.
          break;
        
        case STATE_SETCONFIG:
          mState = STATE_IDLE;
          signal HplTMP102.setConfigRegDone(error);
          break;
        
        case STATE_SETTHIGH:
          mState = STATE_IDLE;
          signal HplTMP102.setTHighRegDone(error);
          break;
        
        case STATE_SETTLOW:
          mState = STATE_IDLE;
          signal HplTMP102.setTLowRegDone(error);
          break;
        
        default:
          mState = STATE_IDLE;
          break;
      }
    }
    else {
      // Reset the PTR register back to the temperature register
      mI2CBuffer[0] = TMP102_PTR_TEMP;
      mfPtrReset = TRUE;
      call I2CPacket.write(I2C_START | I2C_STOP, devAddr,1,mI2CBuffer);
    } 

    return;
  }

  async event void AlertInterrupt.fired() {
    // This alert is decoupled from whatever state the TMP102 is in. 
    // Upper layers must handle dealing with this alert appropriately.
    signal HplTMP102.alertThreshold();
    return;
  }

  default event void SplitControl.startDone( error_t error ) { return; }
  default event void SplitControl.stopDone( error_t error ) { return; }
  default async event void HplTMP102.measureTemperatureDone( error_t error, uint16_t val ){ return; }
  default async event void HplTMP102.setConfigRegDone( error_t error ){ return; }
  default async event void HplTMP102.setTHighRegDone(error_t error){ return; }
  default async event void HplTMP102.setTLowRegDone(error_t error){ return; }
  default async event void HplTMP102.alertThreshold(){ return; }

}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/TMP102.h000066400000000000000000000050201207233610700223110ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Types and definitions for the TI TMP175
 *
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:14 $
 */

#ifndef _TMP102_H
#define _TMP102_H

#define TMP102_SLAVE_ADDR (0x48)

#define TMP102_PTR_TEMP		(0x0)
#define TMP102_PTR_CFG		(0x1)
#define TMP102_PTR_TLOW		(0x2)
#define TMP102_PTR_THIGH	(0x3)

#define TMP102_CFG_OS		((1 << 7) << 8)
#define TMP102_CFG_RES(_x)	((((_x) & 0x3) << 5) << 8)
#define TMP102_CFG_FQ(_x)	((((_x) & 0x3) << 3) << 8)
#define TMP102_CFG_POL		((1 << 2) << 8)
#define TMP102_CFG_TM		((1 << 1) << 8)
#define TMP102_CFG_SD		((1 << 0) << 8)

#define TMP102_CFG_CR(_x) (((_x) & 0x3) << 6)
#define TMP102_CFG_AL (1 << 5)
#define TMP102_CFG_EM (1 << 4)


typedef enum {
  TMP102_FQD_1 = 0,
  TMP102_FQD_2 = 1,
  TMP102_FQD_4 = 2,
  TMP102_FQD_6 = 3
} tmp102_fqd_t;

typedef enum {
  TMP102_CR_025HZ,
  TMP102_RES_1HZ,
  TMP102_RES_4HZ,
  TMP102_RES_8HZ
} tmp102_cr_t;



#endif /* _TMP102_H */
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/TMP102C.nc000066400000000000000000000046741207233610700226030ustar00rootroot00000000000000/* $Id: TMP175C.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
//#include "im2sb.h"

generic configuration TMP102C() {
  provides interface Read as Temperature;
  provides interface HalTMP102Advanced;
  provides interface SplitControl;
}

implementation {
  components new HalTMP102ReaderP();
  components HalTMP102ControlP;
  Temperature = HalTMP102ReaderP.Temperature;

  enum { TMP_KEY = unique("TMP102.Resource"),
	 ADV_KEY = unique("TMP102.Resource"),
	 READER_ID = unique("TMP102.HplAccess"),
  };

  components TMP102InternalC;
  HalTMP102ReaderP.TMP102Resource -> TMP102InternalC.Resource[TMP_KEY];
  HalTMP102ControlP.TMP102Resource -> TMP102InternalC.Resource[ADV_KEY];
  HalTMP102ReaderP.HplTMP175 -> TMP102InternalC.HplTMP102[READER_ID];
  HalTMP102Advanced = HalTMP102ControlP.HalTMP102Advanced;

  SplitControl = TMP102InternalC;
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/TMP102InternalC.nc000066400000000000000000000051221207233610700242650ustar00rootroot00000000000000/* $Id: TMP175InternalC.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
//#include "im2sb.h"

configuration TMP102InternalC {
  provides interface Resource[uint8_t id];
  provides interface HplTMP102[uint8_t id];
  provides interface SplitControl;
}

implementation {
  enum {
    ADV_ID = unique("TMP102.HplAccess"),
  };
  
  components new SimpleFcfsArbiterC( "TMP102.Resource" ) as Arbiter;
  components MainC;
  Resource = Arbiter;

  components new HplTMP102LogicP(TMP102_SLAVE_ADDR) as Logic;
  MainC.SoftwareInit -> Logic;

  /* dubtos */
  components GeneralIOC;
  Logic.AlertInterrupt -> GeneralIOC.GpioInterrupt[GPIO_TMP102_TEMP_ALERT];
  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TMP102_TEMP_ALERT];

  components new Msp430I2CC() as I2CBus;
  Logic.I2CPacket -> I2CBus;

  components TMP102InternalP as Internal;
  HplTMP102 = Internal.HplTMP102;
  Internal.ToHPLC -> Logic.HplTMP102;

  SplitControl = Logic;

  components HalTMP102ControlP;
  HalTMP102ControlP.HplTMP102 -> Logic;
  
}
tinyos-2.1.2+dfsg/tos/platforms/z1/chips/tmp102/TMP102InternalP.nc000066400000000000000000000066751207233610700243200ustar00rootroot00000000000000/* $Id: TMP175InternalP.nc,v 1.4 2006/12/12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
module TMP102InternalP {
  provides interface HplTMP102[uint8_t id];
  uses interface HplTMP102 as ToHPLC;
}

implementation {
  uint8_t currentId;

  command error_t HplTMP102.measureTemperature[uint8_t id]() {
    currentId = id;
    return call ToHPLC.measureTemperature();
  }
  
  // configuration register of TMP102 is 16 bit
  command error_t HplTMP102.setConfigReg[uint8_t id](uint16_t val) {
    currentId = id;
    return call ToHPLC.setConfigReg(val);
  }
  command error_t HplTMP102.setTLowReg[uint8_t id](uint16_t val) {
    currentId = id;
    return call ToHPLC.setTLowReg(val);
  }
  command error_t HplTMP102.setTHighReg[uint8_t id](uint16_t val) {
    currentId = id;
    return call ToHPLC.setTHighReg(val);
  }

  async event void ToHPLC.measureTemperatureDone(error_t error, uint16_t val) {
    signal HplTMP102.measureTemperatureDone[currentId](error, val);
  }
  async event void ToHPLC.setConfigRegDone(error_t error) {
    signal HplTMP102.setConfigRegDone[currentId](error);
  }
  async event void ToHPLC.setTLowRegDone(error_t error) {
    signal HplTMP102.setTLowRegDone[currentId](error);
  }
  async event void ToHPLC.setTHighRegDone(error_t error) {
    signal HplTMP102.setTHighRegDone[currentId](error);
  }
  async event void ToHPLC.alertThreshold() {
    signal HplTMP102.alertThreshold[currentId]();
  }

  default async event void HplTMP102.measureTemperatureDone[uint8_t id](error_t error, uint16_t val) { return; }
  default async event void HplTMP102.setConfigRegDone[uint8_t id](error_t error) { return; }
  default async event void HplTMP102.setTLowRegDone[uint8_t id](error_t error) { return; }
  default async event void HplTMP102.setTHighRegDone[uint8_t id](error_t error) { return; }
  default async event void HplTMP102.alertThreshold[uint8_t id]() { return; }
}
tinyos-2.1.2+dfsg/tos/platforms/z1/hardware.h000066400000000000000000000042671207233610700211060ustar00rootroot00000000000000/*
 * Copyright (c) 2009 DEXMA SENSORS SL
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * @author: Xavier Orduna 
 * @author: Jordi Soucheiron 
 */

#ifndef _H_hardware_h
#define _H_hardware_h

#include "msp430hardware.h"

// LEDs
TOSH_ASSIGN_PIN(RED_LED, 5, 4);
TOSH_ASSIGN_PIN(GREEN_LED, 5, 6);
TOSH_ASSIGN_PIN(YELLOW_LED, 5, 5);

// UART pins
TOSH_ASSIGN_PIN(SOMI0, 3, 2);
TOSH_ASSIGN_PIN(SIMO0, 3, 1);
TOSH_ASSIGN_PIN(UCLK0, 3, 3);
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);
TOSH_ASSIGN_PIN(UTXD1, 3, 6);
TOSH_ASSIGN_PIN(URXD1, 3, 7);
TOSH_ASSIGN_PIN(UCLK1, 5, 3);
TOSH_ASSIGN_PIN(SOMI1, 5, 2);
TOSH_ASSIGN_PIN(SIMO1, 5, 1);


#endif // _H_hardware_h
tinyos-2.1.2+dfsg/tos/platforms/z1/mac/000077500000000000000000000000001207233610700176675ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/mac/tkn154/000077500000000000000000000000001207233610700207155ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/mac/tkn154/Makefile.include000066400000000000000000000005651207233610700240050ustar00rootroot00000000000000# We include several platform-glue components from telosb, because they are
# identical on the z1 platform (e.g. Ieee802154BeaconEnabledC.nc,
# Ieee802154NonBeaconEnabledC.nc,TKN154TimingP.nc, etc.)

CFLAGS += -I$(TOSDIR)/platforms/z1/mac/tkn154 \
	-I$(TOSDIR)/platforms/telosb/mac/tkn154 \
	-I$(TOSDIR)/platforms/telosb/mac/tkn154/timer \
	-I$(TOSDIR)/chips/cc2420_tkn154
tinyos-2.1.2+dfsg/tos/platforms/z1/mac/tkn154/README.txt000066400000000000000000000007601207233610700224160ustar00rootroot00000000000000This directory contains the TKN15.4 "platform glue" code for the z1
platform. Like the telos platform, z1 uses the CC2420 radio and in order not
to maintain identical configuration files, the z1 platform pulls in (uses) some
files from the platform/telosb/mac/tkn154 directory. 

The ./Makefile.include file defines in which order the directories are parsed and
should be included by any z1 application. 

More information on TKN15.4 can be found here:
tinyos-2.x/tos/lib/mac/tkn154/README.txt
 
tinyos-2.1.2+dfsg/tos/platforms/z1/platform.h000066400000000000000000000000001207233610700211120ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/platforms/z1/platform_message.h000066400000000000000000000047751207233610700226450ustar00rootroot00000000000000/*
 * Copyright (c) 2005 The Regents of the University  of California.  
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * Defining the platform-independently named packet structures to be the
 * chip-specific CC1000 packet structures.
 *
 * @author Philip Levis
 * @version $Revision: 1.5 $ $Date: 2008/02/19 22:03:45 $
 */


#ifndef PLATFORM_MESSAGE_H
#define PLATFORM_MESSAGE_H

#include 
#include 

typedef union message_header {
  cc2420_header_t cc2420;
  serial_header_t serial;
} message_header_t;

typedef union TOSRadioFooter {
  cc2420_footer_t cc2420;
} message_footer_t;

typedef union TOSRadioMetadata {
  cc2420_metadata_t cc2420;
  serial_metadata_t serial;
} message_metadata_t;

#endif
tinyos-2.1.2+dfsg/tos/sensorboards/000077500000000000000000000000001207233610700172725ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/000077500000000000000000000000001207233610700207005ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/.sensor000066400000000000000000000000001207233610700222000ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/DemoSensorC.nc000066400000000000000000000011731207233610700234050ustar00rootroot00000000000000/* $Id: DemoSensorC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Demo sensor for basicsb sensorboard.
 * 
 * @author David Gay
 */

generic configuration DemoSensorC() {
  provides interface Read;
}
implementation {
  components new PhotoC() as Sensor;

  Read = Sensor;
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/DemoSensorStreamC.nc000066400000000000000000000012451207233610700245610ustar00rootroot00000000000000/* $Id: DemoSensorStreamC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Demo sensor for basicsb sensorboard.
 * 
 * @author David Gay
 */

generic configuration DemoSensorStreamC() {
  provides interface ReadStream;
}
implementation {
  components new PhotoStreamC() as SensorStream;

  ReadStream = SensorStream;
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/PhotoC.nc000066400000000000000000000014041207233610700224150ustar00rootroot00000000000000/* $Id: PhotoC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Photodiode of the basicsb sensor board.
 * 
 * @author David Gay
 */

#include "basicsb.h"

generic configuration PhotoC() {
  provides interface Read;
}
implementation {
  components new AdcReadClientC(), PhotoDeviceP;

  Read = AdcReadClientC;
  AdcReadClientC.Atm128AdcConfig -> PhotoDeviceP;
  AdcReadClientC.ResourceConfigure -> PhotoDeviceP;
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/PhotoDeviceP.nc000066400000000000000000000016131207233610700235540ustar00rootroot00000000000000/* $Id: PhotoDeviceP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Internal component for basicsb photodiode. Arbitrates access to the photo
 * diode and automatically turns it on or off based on user requests.
 * 
 * @author David Gay
 */

#include "basicsb.h"

configuration PhotoDeviceP {
  provides {
    interface ResourceConfigure;
    interface Atm128AdcConfig;
  }
}
implementation {
  components PhotoP, MicaBusC;

  ResourceConfigure = PhotoP;
  Atm128AdcConfig = PhotoP;

  PhotoP.PhotoPin -> MicaBusC.PW1;
  PhotoP.PhotoAdc -> MicaBusC.Adc6;
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/PhotoP.nc000066400000000000000000000022721207233610700224360ustar00rootroot00000000000000/* $Id: PhotoP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * basicsb photodiode power control and ADC configuration.
 * @author David Gay 
 */
module PhotoP
{
  provides {
    interface ResourceConfigure;
    interface Atm128AdcConfig;
  }
  uses {
    interface GeneralIO as PhotoPin;
    interface MicaBusAdc as PhotoAdc;
  }
}
implementation
{
  async command uint8_t Atm128AdcConfig.getChannel() {
    return call PhotoAdc.getChannel();
  }

  async command uint8_t Atm128AdcConfig.getRefVoltage() {
    return ATM128_ADC_VREF_OFF;
  }

  async command uint8_t Atm128AdcConfig.getPrescaler() {
    return ATM128_ADC_PRESCALE;
  }

  async command void ResourceConfigure.configure() {
    call PhotoPin.makeOutput();
    call PhotoPin.set();
  }

  async command void ResourceConfigure.unconfigure() {
    call PhotoPin.clr();
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/PhotoStreamC.nc000066400000000000000000000014641207233610700235770ustar00rootroot00000000000000/* $Id: PhotoStreamC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Photodiode of the basicsb sensor board.
 * 
 * @author David Gay
 */

#include "basicsb.h"

generic configuration PhotoStreamC() {
  provides interface ReadStream;
}
implementation {
  components PhotoDeviceP, new AdcReadStreamClientC();

  ReadStream = AdcReadStreamClientC;
  AdcReadStreamClientC.Atm128AdcConfig -> PhotoDeviceP;
  AdcReadStreamClientC.ResourceConfigure -> PhotoDeviceP;
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/TempC.nc000066400000000000000000000013771207233610700222420ustar00rootroot00000000000000/* $Id: TempC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Thermistor of the basicsb sensor board.
 * 
 * @author David Gay
 */

#include "basicsb.h"

generic configuration TempC() {
  provides interface Read;
}
implementation {
  components new AdcReadClientC(), TempDeviceP;

  Read = AdcReadClientC;
  AdcReadClientC.Atm128AdcConfig -> TempDeviceP;
  AdcReadClientC.ResourceConfigure -> TempDeviceP;
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/TempDeviceP.nc000066400000000000000000000016001207233610700233640ustar00rootroot00000000000000/* $Id: TempDeviceP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Internal component for basicsb tempdiode. Arbitrates access to the temp
 * diode and automatically turns it on or off based on user requests.
 * 
 * @author David Gay
 */

#include "basicsb.h"

configuration TempDeviceP {
  provides {
    interface ResourceConfigure;
    interface Atm128AdcConfig;
  }
}
implementation {
  components TempP, MicaBusC;

  ResourceConfigure = TempP;
  Atm128AdcConfig = TempP;

  TempP.TempPin -> MicaBusC.PW2;
  TempP.TempAdc -> MicaBusC.Adc5;
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/TempP.nc000066400000000000000000000022621207233610700222510ustar00rootroot00000000000000/* $Id: TempP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * basicsb thermistor power control and ADC configuration.
 * @author David Gay 
 */
module TempP
{
  provides {
    interface ResourceConfigure;
    interface Atm128AdcConfig;
  }
  uses {
    interface GeneralIO as TempPin;
    interface MicaBusAdc as TempAdc;
  }
}
implementation
{
  async command uint8_t Atm128AdcConfig.getChannel() {
    return call TempAdc.getChannel();
  }

  async command uint8_t Atm128AdcConfig.getRefVoltage() {
    return ATM128_ADC_VREF_OFF;
  }

  async command uint8_t Atm128AdcConfig.getPrescaler() {
    return ATM128_ADC_PRESCALE;
  }

  async command void ResourceConfigure.configure() {
    call TempPin.makeOutput();
    call TempPin.set();
  }

  async command void ResourceConfigure.unconfigure() {
    call TempPin.clr();
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/TempStreamC.nc000066400000000000000000000014571207233610700234150ustar00rootroot00000000000000/* $Id: TempStreamC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Thermistor of the basicsb sensor board.
 * 
 * @author David Gay
 */

#include "basicsb.h"

generic configuration TempStreamC() {
  provides interface ReadStream;
}
implementation {
  components TempDeviceP, new AdcReadStreamClientC();

  ReadStream = AdcReadStreamClientC;
  AdcReadStreamClientC.Atm128AdcConfig -> TempDeviceP;
  AdcReadStreamClientC.ResourceConfigure -> TempDeviceP;
}
tinyos-2.1.2+dfsg/tos/sensorboards/basicsb/basicsb.h000066400000000000000000000004011207233610700224520ustar00rootroot00000000000000#ifndef BASICSB_H
#define BASICSB_H

#define UQ_TEMPDEVICE "TempDeviceP.Resource"
#define UQ_TEMPDEVICE_STREAM "TempDeviceStreamP.Resource"

#define UQ_PHOTODEVICE "PhotoDeviceP.Resource"
#define UQ_PHOTODEVICE_STREAM "PhotoDeviceStreamP.Resource"


#endif
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/000077500000000000000000000000001207233610700203065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/.sensor000066400000000000000000000041741207233610700216260ustar00rootroot00000000000000#
# Copyright (c) 2005-2006 Arch Rock Corporation
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the
#   distribution.
# - Neither the name of the Arch Rock Corporation nor the names of
#   its contributors may be used to endorse or promote products derived
#   from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
# ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
# OF THE POSSIBILITY OF SUCH DAMAGE
#
# FILE: im2sb/.sensor
# 
# Includes that should take precedence come first.  Sensorboard "superclasses"
# come before because they may override files.  These must be specified as
# @includes instead of -I's to @opts, otherwise the %T won't be processed
# by ncc.  And because of that, the current sensorboard's include directory
# must be specified, otherwise its search order is last instead of first.
#
# $Id: .sensor,v 1.4 2006-12-12 18:23:45 vlahan Exp $
#
push( @includes, qw(
  %T/sensorboards/im2sb
  %T/chips/lis3l02dq
  %T/chips/max136x
  %T/chips/sht11
  %T/chips/tmp175
  %T/chips/tsl2561

) );
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/HalSensirionSht11C.nc000066400000000000000000000053511207233610700241560ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HalSensirionSht11C is an advanced access component for the
 * Sensirion SHT11 model humidity and temperature sensor, available on
 * the telosb platform. This component provides the SensirionSht11
 * interface, which offers full control over the device. Please
 * acquire the Resource before using it.
 *
 * @author Gilman Tolle 
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

configuration HalSensirionSht11C {
  provides interface SplitControl;
  provides interface Resource[ uint8_t client ];
  provides interface SensirionSht11[ uint8_t client ];
}
implementation {
  components new SensirionSht11LogicP();
  SensirionSht11 = SensirionSht11LogicP;

  components HplSensirionSht11C;
  SplitControl = HplSensirionSht11C;
  Resource = HplSensirionSht11C.Resource;
  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
  SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;

  
  components new TimerMilliC();
  SensirionSht11LogicP.Timer -> TimerMilliC;

  components NoLedsC;
  SensirionSht11LogicP.Leds -> NoLedsC;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/HplSensirionSht11C.nc000066400000000000000000000056221207233610700241760ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HplSensirionSht11C is a low-level component, intended to provide
 * the physical resources used by the Sensirion SHT11 sensor on the
 * telosb platform so that the chip driver can make use of them. You
 * really shouldn't be wiring to this, unless you're writing a new
 * Sensirion SHT11 driver.
 *
 * @author Gilman Tolle 
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */
#include 

configuration HplSensirionSht11C {
  provides interface SplitControl;
  provides interface Resource[ uint8_t id ];
  provides interface GeneralIO as DATA;
  provides interface GeneralIO as SCK;
  provides interface GpioInterrupt as InterruptDATA;
}
implementation {
  components GeneralIOC;

  DATA = GeneralIOC.GeneralIO[GPIO_SHT11_DATA];
  SCK = GeneralIOC.GeneralIO[GPIO_SHT11_CLK];
  InterruptDATA = GeneralIOC.GpioInterrupt[GPIO_SHT11_DATA];

  components HplSensirionSht11P;
  SplitControl = HplSensirionSht11P;
  
  components new TimerMilliC();
  components HplPXA27xGPIOC;
  HplSensirionSht11P.Timer -> TimerMilliC;
  HplSensirionSht11P.DATA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[GPIO_SHT11_DATA];
  HplSensirionSht11P.SCK -> HplPXA27xGPIOC.HplPXA27xGPIOPin[GPIO_SHT11_CLK];
  
  components new SimpleFcfsArbiterC( "Sht11.Resource" ) as Arbiter;
  Resource = Arbiter;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/HplSensirionSht11P.nc000066400000000000000000000052441207233610700242130ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

#include "Timer.h"

/**
 * HplSensirionSht11P is a low-level component that controls power for
 * the Sensirion SHT11 sensor on the telosb platform.
 *
 * @author Phil Buonadonna 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

module HplSensirionSht11P {
  provides interface SplitControl;
  uses interface Timer;
  uses interface HplPXA27xGPIOPin as DATA;
  uses interface HplPXA27xGPIOPin as SCK;
}
implementation {
  task void stopTask();

  command error_t SplitControl.start() {
    call DATA.setGAFRpin(0);
    call SCK.setGAFRpin(0);
    call Timer.startOneShot( 11 );
    return SUCCESS;
  }
  
  event void Timer.fired() {
    signal SplitControl.startDone( SUCCESS );
  }

  command error_t SplitControl.stop() {
    call SCK.setGPDRbit(FALSE);
    call SCK.setGPCRbit();
    call DATA.setGPDRbit(FALSE);
    call DATA.setGPCRbit();
    post stopTask();
    return SUCCESS;
  }

  task void stopTask() {
    signal SplitControl.stopDone( SUCCESS );
  }

  async event void DATA.interruptGPIOPin() { return; }
  async event void SCK.interruptGPIOPin() { return; }
}

tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/LIS3L02DQC.nc000066400000000000000000000056401207233610700221550ustar00rootroot00000000000000/* $Id: LIS3L02DQC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */

#include "im2sb.h"

generic configuration LIS3L02DQC() {
  //provides interface Init;
  provides interface SplitControl;
  provides interface Read as AccelX;
  provides interface Read as AccelY;
  provides interface Read as AccelZ;
  provides interface HalLIS3L02DQAdvanced;
}

implementation {
  components new HalLIS3L02DQReaderP();
  components HalLIS3L02DQControlP;
  AccelX = HalLIS3L02DQReaderP.AccelX;
  AccelY = HalLIS3L02DQReaderP.AccelY;
  AccelZ = HalLIS3L02DQReaderP.AccelZ;
  HalLIS3L02DQAdvanced = HalLIS3L02DQControlP.Advanced;
  
  enum { ACCELX_KEY = unique("LIS3L02DQ.Resource"),
	 ACCELY_KEY = unique("LIS3L02DQ.Resource"),
	 ACCELZ_KEY = unique("LIS3L02DQ.Resource"),
	 ADV_KEY = unique("LIS3L02DQ.Resource"),
	 READER_ID = unique("LIS3L02DQ.HplAccess"),
  };

  components LIS3L02DQInternalC;
  HalLIS3L02DQReaderP.AccelXResource -> LIS3L02DQInternalC.Resource[ACCELX_KEY];
  HalLIS3L02DQReaderP.AccelYResource -> LIS3L02DQInternalC.Resource[ACCELY_KEY];
  HalLIS3L02DQReaderP.AccelZResource -> LIS3L02DQInternalC.Resource[ACCELZ_KEY];
  HalLIS3L02DQControlP.Resource -> LIS3L02DQInternalC.Resource[ADV_KEY];
  HalLIS3L02DQReaderP.Hpl -> LIS3L02DQInternalC.HplLIS3L02DQ[READER_ID];

  SplitControl = LIS3L02DQInternalC;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/LIS3L02DQInternalC.nc000066400000000000000000000060501207233610700236460ustar00rootroot00000000000000/* $Id: LIS3L02DQInternalC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */

#include "im2sb.h"

configuration LIS3L02DQInternalC {
  provides interface Resource[uint8_t id];
  provides interface HplLIS3L02DQ[uint8_t id];
  provides interface SplitControl;
}

implementation {
  components LIS3L02DQInternalP as InternalP;
  components new SimpleFcfsArbiterC( "LIS3L02DQ.Resource" ) as Arbiter;
  components MainC;

  Resource = Arbiter;
  HplLIS3L02DQ = InternalP;
  SplitControl = InternalP;
  MainC.SoftwareInit -> InternalP;

  components HplLIS3L02DQLogicSPIP as LogicSPIP;
  components HalLIS3L02DQControlP as ControlP;
  components new HalPXA27xSpiPioC(128, 7, FALSE) as HalSpi;
  components HplPXA27xSSP1C;
  components GeneralIOC;
  components HplPXA27xGPIOC;

  InternalP.ToHPLC -> LogicSPIP.HplLIS3L02DQ;
  InternalP.SubControl -> LogicSPIP.SplitControl;
  InternalP.SPICLK -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_SCLK];
  InternalP.SPIRxD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_RXD];
  InternalP.SPITxD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_TXD];
  InternalP.HPWRCntl -> HplPXA27xGPIOC.HplPXA27xGPIOPin[GPIO_PWR_ADC_NSHDWN];

  LogicSPIP.SpiPacket -> HalSpi.SpiPacket[unique("SPIInstance")];
  LogicSPIP.SPIFRM -> GeneralIOC.GeneralIO[SSP1_SFRM];
  LogicSPIP.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_LIS3L02DQ_RDY_INT];

  ControlP.Hpl -> LogicSPIP;

  MainC.SoftwareInit -> HalSpi;
  MainC.SoftwareInit -> LogicSPIP;

  HalSpi.SSP -> HplPXA27xSSP1C;
  
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/LIS3L02DQInternalP.nc000066400000000000000000000105561207233610700236710ustar00rootroot00000000000000/* $Id: LIS3L02DQInternalP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 * This Hal module implements the TinyOS 2.0 I2CPacket interface over
 * the PXA27x I2C Hpl
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */

module LIS3L02DQInternalP {
  provides interface Init;
  provides interface SplitControl;
  provides interface HplLIS3L02DQ[uint8_t id];
  
  uses interface SplitControl as SubControl;
  uses interface HplLIS3L02DQ as ToHPLC;
  uses interface HplPXA27xGPIOPin as SPIRxD;
  uses interface HplPXA27xGPIOPin as SPITxD;
  uses interface HplPXA27xGPIOPin as SPICLK;
  uses interface HplPXA27xGPIOPin as HPWRCntl;
}

implementation {
  uint8_t currentId;


  command error_t Init.init() {
    // Initialize Pin Directions
    call SPICLK.setGAFRpin(SSP1_SCLK_ALTFN);
    call SPICLK.setGPDRbit(TRUE);
    call SPIRxD.setGAFRpin(SSP1_RXD_ALTFN);
    call SPIRxD.setGPDRbit(FALSE);
    call SPITxD.setGAFRpin(SSP1_TXD_ALTFN);
    call SPITxD.setGPDRbit(TRUE);

    call HPWRCntl.setGPDRbit(TRUE);
    call HPWRCntl.setGPSRbit();
    return SUCCESS;
  }

  command error_t SplitControl.start() {
    error_t error = SUCCESS;
    error = call SubControl.start();
    return error;
  }

  command error_t SplitControl.stop() {
    error_t error = SUCCESS;
    error = call SubControl.stop();
    return error;
  }

  command error_t HplLIS3L02DQ.getReg[uint8_t id](uint8_t regAddr) {
    currentId = id;
    return call ToHPLC.getReg(regAddr);
  }
  command error_t HplLIS3L02DQ.setReg[uint8_t id](uint8_t regAddr, uint8_t val) {
    currentId = id;
    return call ToHPLC.setReg(regAddr, val);
  }

  event void SubControl.startDone(error_t error) {
    signal SplitControl.startDone(error);
    return;
  }
  event void SubControl.stopDone(error_t error) {
    signal SplitControl.stopDone(error);
    return;
  }

  async event void ToHPLC.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {
    signal HplLIS3L02DQ.getRegDone[currentId](error, regAddr, val);
  }
  async event void ToHPLC.setRegDone(error_t error, uint8_t regAddr, uint8_t val) {
    signal HplLIS3L02DQ.setRegDone[currentId](error, regAddr, val);
  }
  async event void ToHPLC.alertThreshold() {
    signal HplLIS3L02DQ.alertThreshold[currentId]();
  }
  
  async event void SPITxD.interruptGPIOPin() {}
  async event void SPIRxD.interruptGPIOPin() {}
  async event void SPICLK.interruptGPIOPin() {}
  async event void HPWRCntl.interruptGPIOPin() {}

  default event void SplitControl.startDone(error_t error) { return; }
  default event void SplitControl.stopDone(error_t error) { return; }

  default async event void HplLIS3L02DQ.getRegDone[uint8_t id](error_t error, uint8_t regAddr, uint8_t val) { }
  default async event void HplLIS3L02DQ.setRegDone[uint8_t id](error_t error, uint8_t regAddr, uint8_t val) { }
  default async event void HplLIS3L02DQ.alertThreshold[uint8_t id]() { }
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/MAX136xC.nc000066400000000000000000000046751207233610700220160ustar00rootroot00000000000000/* $Id: MAX136xC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */

#include "im2sb.h"
#include "MAX136x.h"

generic configuration MAX136xC() {
  provides interface Read as ADC;
  provides interface HalMAX136xAdvanced;
  provides interface SplitControl;
}

implementation {
  components new HalMAX136xReaderP();
  components HalMAX136xControlP;

  ADC = HalMAX136xReaderP.ADC;

  enum { ADC_KEY = unique("MAX136x.Resource"),
	 ADV_KEY = unique("MAX136x.Resource"),
	 READER_ID = unique("MAX136x.HplAccess"),
  };

  components MAX136xInternalC;
  HalMAX136xReaderP.MAX136xResource -> MAX136xInternalC.Resource[ADC_KEY];
  HalMAX136xReaderP.HplMAX136x -> MAX136xInternalC.HplMAX136x[READER_ID];
  HalMAX136xControlP.Resource -> MAX136xInternalC.Resource[ADV_KEY];
  HalMAX136xAdvanced = HalMAX136xControlP;

  SplitControl = MAX136xInternalC;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/MAX136xInternalC.nc000066400000000000000000000055131207233610700235030ustar00rootroot00000000000000/* $Id: MAX136xInternalC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
#include "im2sb.h"

configuration MAX136xInternalC {
  provides interface Resource[uint8_t id];
  provides interface HplMAX136x[uint8_t id];
  provides interface SplitControl;
}

implementation {
  components new SimpleFcfsArbiterC( "MAX136x.Resource" )as Arbiter;
  components MainC;
  Resource = Arbiter;

  components new HplMAX136xLogicP(MAX136_SLAVE_ADDR) as Logic;
  //MainC.SoftwareInit -> Logic;

 components GeneralIOC;
  Logic.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_MAX1363_ANALOG_INT];
  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_MAX1363_ANALOG_INT];

  components new HalPXA27xI2CMasterC(TRUE) as I2CC;
  Logic.I2CPacket -> I2CC;

  components MAX136xInternalP as Internal;
  HplMAX136x = Internal.HplMAX136x;
  Internal.ToHPLC -> Logic.HplMAX136x;
  Internal.SubInit -> Logic.Init;
  Internal.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_MAX1363_ANALOG_INT];
  MainC.SoftwareInit -> Internal.Init;
  SplitControl = Logic;

 
  components HplPXA27xGPIOC;
  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];
  
  components HalMAX136xControlP;
  HalMAX136xControlP.HplMAX136x -> Logic;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/MAX136xInternalP.nc000066400000000000000000000072171207233610700235230ustar00rootroot00000000000000/* $Id: MAX136xInternalP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
module MAX136xInternalP {
  provides interface Init;
  provides interface HplMAX136x[uint8_t id];
  uses interface Init as SubInit;
  uses interface HplMAX136x as ToHPLC;
  uses interface GpioInterrupt as InterruptAlert;
}

implementation {
  uint8_t currentId;

  command error_t Init.init() {
    call SubInit.init();
    // The Intel Mote 2 Sensorboard multiplexes the MAX136 interrupt through a NAND
    // gate.  Need to override the edge trigger from the driver default
    call InterruptAlert.enableRisingEdge();
    return SUCCESS;
  }

  command error_t HplMAX136x.measureChannels[uint8_t id](uint8_t *buf, uint8_t len) {
    currentId = id;
    return call ToHPLC.measureChannels(buf, len);
  }
  command error_t HplMAX136x.setConfig[uint8_t id](uint8_t *cfgbuf, uint8_t len) {
    currentId = id;
    return call ToHPLC.setConfig(cfgbuf, len);
  }
  command error_t HplMAX136x.readStatus[uint8_t id](uint8_t *buf, uint8_t len) {
    currentId = id;
    return call ToHPLC.readStatus(buf, len);
  }
  async event void ToHPLC.measureChannelsDone(error_t error, uint8_t *buf, uint8_t len) {
    signal HplMAX136x.measureChannelsDone[currentId](error, buf, len);
  }
  async event void ToHPLC.setConfigDone(error_t error, uint8_t *cfgbuf, uint8_t len) {
    signal HplMAX136x.setConfigDone[currentId](error, cfgbuf, len);
  }
  async event void ToHPLC.alertThreshold() {
    signal HplMAX136x.alertThreshold[currentId]();
  }
  async event void ToHPLC.readStatusDone(error_t error, uint8_t * buf) {
    signal HplMAX136x.readStatusDone[currentId](error, buf);
  }

  async event void InterruptAlert.fired() {}

  default async event void HplMAX136x.measureChannelsDone[uint8_t id]( error_t error, uint8_t *buf, uint8_t len ) {}
  default async event void HplMAX136x.setConfigDone[uint8_t id]( error_t error , uint8_t *cfgbuf, uint8_t len) {}
  default async event void HplMAX136x.alertThreshold[uint8_t id]() {}
  default async event void HplMAX136x.readStatusDone[uint8_t id](error_t error, uint8_t *buf) { }
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/README.txt000066400000000000000000000007551207233610700220130ustar00rootroot00000000000000Intel Mote 2 Demo Sensorboard Release Notes

* The configuration provided assumes the following I2C addresses:

  TSL2561 - 0x49
  TMP175  - 0X4A
  MAX136  - 0x34

These address assignments are compatible with the DS2745 on the optional battery board.  Modify the address assignments as needed.

* The TMP175 anbd TSL2561 interrupts will work ONLY IF the board has been modified to include a pullup resistor on their associated interrupt lines. Some boards do not include these resistors.




tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/SensirionSht11C.nc000066400000000000000000000064021207233610700235270ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * SensirionSht11C is a top-level access component for the Sensirion
 * SHT11 model humidity and temperature sensor, available on the
 * telosb platform. Because this component represents one physical
 * device, simultaneous calls to read temperature and humidity will be
 * arbitrated and executed in sequential order. Feel free to read both
 * at the same time, just be aware that they'll come back
 * sequentially.
 *
 * @author Phil Buonadonna 
 * @author Gilman Tolles 
 * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
 */

generic configuration SensirionSht11C() {
  provides interface SplitControl;
  provides interface Read as Temperature;
  provides interface Read as Humidity;
  provides interface HalSht11Advanced;
}
implementation {
  components new SensirionSht11ReaderP();

  Temperature = SensirionSht11ReaderP.Temperature;
  Humidity = SensirionSht11ReaderP.Humidity;

  components HalSensirionSht11C;

  enum { TEMP_KEY = unique("Sht11.Resource") };
  enum { HUM_KEY = unique("Sht11.Resource") };

  SplitControl = HalSensirionSht11C;
  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];

  enum { ADV_KEY = unique("Sht11.Resource") };
  components HalSht11ControlP;
  HalSht11Advanced = HalSht11ControlP;
  HalSht11ControlP.Resource -> HalSensirionSht11C.Resource[ ADV_KEY ];
  HalSht11ControlP.SensirionSht11 -> HalSensirionSht11C.SensirionSht11[ ADV_KEY ];
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/TMP175C.nc000066400000000000000000000047271207233610700216420ustar00rootroot00000000000000/* $Id: TMP175C.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
#include "im2sb.h"

generic configuration TMP175C() {
  provides interface Read as Temperature;
  provides interface HalTMP175Advanced;
  provides interface SplitControl;
  //provides interface Init;
}

implementation {
  components new HalTMP175ReaderP();
  components HalTMP175ControlP;
  Temperature = HalTMP175ReaderP.Temperature;

  enum { TMP_KEY = unique("TMP175.Resource"),
	 ADV_KEY = unique("TMP175.Resource"),
	 READER_ID = unique("TMP175.HplAccess"),
  };

  components TMP175InternalC;
  HalTMP175ReaderP.TMP175Resource -> TMP175InternalC.Resource[TMP_KEY];
  HalTMP175ControlP.TMP175Resource -> TMP175InternalC.Resource[ADV_KEY];
  HalTMP175ReaderP.HplTMP175 -> TMP175InternalC.HplTMP175[READER_ID];
  HalTMP175Advanced = HalTMP175ControlP.HalTMP175Advanced;

  SplitControl = TMP175InternalC;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/TMP175InternalC.nc000066400000000000000000000053361207233610700233340ustar00rootroot00000000000000/* $Id: TMP175InternalC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
#include "im2sb.h"

configuration TMP175InternalC {
  provides interface Resource[uint8_t id];
  provides interface HplTMP175[uint8_t id];
  provides interface SplitControl;
}

implementation {
  enum {
    ADV_ID = unique("TMP175.HplAccess"),
  };
  
  components new SimpleFcfsArbiterC( "TMP175.Resource" ) as Arbiter;
  components MainC;
  Resource = Arbiter;

  components new HplTMP175LogicP(TMP175_SLAVE_ADDR) as Logic;
  MainC.SoftwareInit -> Logic;

  components GeneralIOC;
  Logic.AlertInterrupt -> GeneralIOC.GpioInterrupt[GPIO_TMP175_TEMP_ALERT];
  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TMP175_TEMP_ALERT];

  components new HalPXA27xI2CMasterC(TRUE) as I2CC;
  Logic.I2CPacket -> I2CC;

  components TMP175InternalP as Internal;
  HplTMP175 = Internal.HplTMP175;
  Internal.ToHPLC -> Logic.HplTMP175;

  SplitControl = Logic;

  components HplPXA27xGPIOC;
  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];

  components HalTMP175ControlP;
  HalTMP175ControlP.HplTMP175 -> Logic;
  
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/TMP175InternalP.nc000066400000000000000000000066111207233610700233460ustar00rootroot00000000000000/* $Id: TMP175InternalP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
module TMP175InternalP {
  provides interface HplTMP175[uint8_t id];
  uses interface HplTMP175 as ToHPLC;
}

implementation {
  uint8_t currentId;

  command error_t HplTMP175.measureTemperature[uint8_t id]() {
    currentId = id;
    return call ToHPLC.measureTemperature();
  }
  command error_t HplTMP175.setConfigReg[uint8_t id](uint8_t val) {
    currentId = id;
    return call ToHPLC.setConfigReg(val);
  }
  command error_t HplTMP175.setTLowReg[uint8_t id](uint16_t val) {
    currentId = id;
    return call ToHPLC.setTLowReg(val);
  }
  command error_t HplTMP175.setTHighReg[uint8_t id](uint16_t val) {
    currentId = id;
    return call ToHPLC.setTHighReg(val);
  }

  async event void ToHPLC.measureTemperatureDone(error_t error, uint16_t val) {
    signal HplTMP175.measureTemperatureDone[currentId](error, val);
  }
  async event void ToHPLC.setConfigRegDone(error_t error) {
    signal HplTMP175.setConfigRegDone[currentId](error);
  }
  async event void ToHPLC.setTLowRegDone(error_t error) {
    signal HplTMP175.setTLowRegDone[currentId](error);
  }
  async event void ToHPLC.setTHighRegDone(error_t error) {
    signal HplTMP175.setTHighRegDone[currentId](error);
  }
  async event void ToHPLC.alertThreshold() {
    signal HplTMP175.alertThreshold[currentId]();
  }

  default async event void HplTMP175.measureTemperatureDone[uint8_t id](error_t error, uint16_t val) { return; }
  default async event void HplTMP175.setConfigRegDone[uint8_t id](error_t error) { return; }
  default async event void HplTMP175.setTLowRegDone[uint8_t id](error_t error) { return; }
  default async event void HplTMP175.setTHighRegDone[uint8_t id](error_t error) { return; }
  default async event void HplTMP175.alertThreshold[uint8_t id]() { return; }
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/Tsl2561C.nc000066400000000000000000000053501207233610700220160ustar00rootroot00000000000000/* $Id: Tsl2561C.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
#include "im2sb.h"

generic configuration Tsl2561C() {
  provides interface Read as BroadbandPhoto;
  provides interface Read as IRPhoto;
  provides interface HalTsl2561Advanced;
  provides interface SplitControl; // this is for power control?
  //provides interface Init;
}
implementation {
  components new HalTsl2561ReaderP();
  components HalTsl2561ControlP;

  BroadbandPhoto = HalTsl2561ReaderP.BroadbandPhoto;
  IRPhoto = HalTsl2561ReaderP.IRPhoto;

  enum { BB_KEY = unique("Tsl2561.Resource"),
	 IR_KEY = unique("Tsl2561.Resource"),
	 ADV_KEY = unique("Tsl2561.Resource"),
	 READER_ID = unique("Tsl2561.HplAccess"),
  };

  components Tsl2561InternalC;
  HalTsl2561ReaderP.BroadbandResource -> Tsl2561InternalC.Resource[BB_KEY];
  HalTsl2561ReaderP.IRResource -> Tsl2561InternalC.Resource[IR_KEY];
  HalTsl2561ControlP.Resource -> Tsl2561InternalC.Resource[ADV_KEY];

  HalTsl2561ReaderP.HplTSL256x -> Tsl2561InternalC.HplTSL256x[READER_ID];

  HalTsl2561Advanced = HalTsl2561ControlP.HalTsl2561Advanced;

  // for debugging
  SplitControl = Tsl2561InternalC;
}

tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/Tsl2561InternalC.nc000066400000000000000000000056451207233610700235220ustar00rootroot00000000000000/* $Id: Tsl2561InternalC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
#include "im2sb.h"

configuration Tsl2561InternalC {
  provides interface Resource[uint8_t id];
  provides interface HplTSL256x[uint8_t id];
  provides interface SplitControl;
}

implementation {
  enum { ADV_ID = unique("Tsl2561.HplAccess"),

  };

  components new SimpleFcfsArbiterC( "Tsl2561.Resource" ) as Arbiter;
  components MainC;
  Resource = Arbiter;
  
  components new HplTSL2561LogicP(TSL2561_SLAVE_ADDR) as Logic;
  //MainC.SoftwareInit -> Logic;

  components LedsC;
  Logic.Leds -> LedsC;
  components GeneralIOC;
  Logic.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_TSL2561_LIGHT_INT];
  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TSL2561_LIGHT_INT];

  components new HalPXA27xI2CMasterC(TRUE) as I2CC;
  Logic.I2CPacket -> I2CC;

  components Tsl2561InternalP as Internal;
  HplTSL256x = Internal.HplTSL256x;
  Internal.ToHPLC -> Logic.HplTSL256x;
  Internal.SubInit -> Logic.Init;
  Internal.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_TSL2561_LIGHT_INT];
  SplitControl = Logic;
  MainC.SoftwareInit -> Internal;

  components HplPXA27xGPIOC;
  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];

  components HalTsl2561ControlP;
  HalTsl2561ControlP.HplTSL256x -> Logic;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/Tsl2561InternalP.nc000066400000000000000000000122371207233610700235320ustar00rootroot00000000000000/* $Id: Tsl2561InternalP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 *
 * @author Kaisen Lin
 * @author Phil Buonadonna
 */
module Tsl2561InternalP {
  provides interface Init;
  provides interface HplTSL256x[uint8_t id];
  uses interface Init as SubInit;
  uses interface HplTSL256x as ToHPLC;
  uses interface GpioInterrupt as InterruptAlert;
}

implementation {
  uint8_t currentId;
  
  command error_t Init.init() {
    call SubInit.init();
    // The Intel Mote 2 Sensorboard multiplexes the TSL interrupt through a NAND
    // gate.  Need to overrid the edge trigger from the driver default
    call InterruptAlert.enableRisingEdge();
    return SUCCESS;
  }

  command error_t HplTSL256x.measureCh0[uint8_t id]() {
    currentId = id;
    return call ToHPLC.measureCh0();
  }
  command error_t HplTSL256x.measureCh1[uint8_t id]() {
    currentId = id;
    return call ToHPLC.measureCh1();
  }
  command error_t HplTSL256x.setCONTROL[uint8_t id](uint8_t val) {
    currentId = id;
    return call ToHPLC.setCONTROL(val);
  }
  command error_t HplTSL256x.setTIMING[uint8_t id](uint8_t val) {
    currentId = id;
    return call ToHPLC.setTIMING(val);
  }
  command error_t HplTSL256x.setTHRESHLOW[uint8_t id](uint16_t val) {
    currentId = id;
    return call ToHPLC.setTHRESHLOW(val);
  }
  command error_t HplTSL256x.setTHRESHHIGH[uint8_t id](uint16_t val) {
    currentId = id;
    return call ToHPLC.setTHRESHHIGH(val);
  }
  command error_t HplTSL256x.setINTERRUPT[uint8_t id](uint8_t val) {
    currentId = id;
    return call ToHPLC.setINTERRUPT(val);
  }
  command error_t HplTSL256x.getID[uint8_t id]() {
    currentId = id;
    return call ToHPLC.getID();
  }
  
  async event void ToHPLC.measureCh0Done(error_t result, uint16_t val) {
    signal HplTSL256x.measureCh0Done[currentId](result, val);
  }
  async event void ToHPLC.measureCh1Done(error_t result, uint16_t val) {
    signal HplTSL256x.measureCh1Done[currentId](result, val);
  }
  async event void ToHPLC.setCONTROLDone(error_t error) {
    signal HplTSL256x.setCONTROLDone[currentId](error);
  }
  async event void ToHPLC.setTIMINGDone(error_t error) {
    signal HplTSL256x.setTIMINGDone[currentId](error);
  }
  async event void ToHPLC.setTHRESHLOWDone(error_t error) {
    signal HplTSL256x.setTHRESHLOWDone[currentId](error);
  }
  async event void ToHPLC.setTHRESHHIGHDone(error_t error) {
    signal HplTSL256x.setTHRESHHIGHDone[currentId](error);
  }
  async event void ToHPLC.setINTERRUPTDone(error_t error) {
    signal HplTSL256x.setINTERRUPTDone[currentId](error);
  }
  async event void ToHPLC.getIDDone(error_t error, uint8_t idval) {
    signal HplTSL256x.getIDDone[currentId](error, idval);
  }
  async event void ToHPLC.alertThreshold() {
    signal HplTSL256x.alertThreshold[currentId]();
  }

  async event void InterruptAlert.fired() {}

  default async event void HplTSL256x.measureCh0Done[uint8_t id]( error_t error, uint16_t val ){ return; }
  default async event void HplTSL256x.measureCh1Done[uint8_t id]( error_t error, uint16_t val ){ return; }
  default async event void HplTSL256x.setCONTROLDone[uint8_t id]( error_t error ){ return; }
  default async event void HplTSL256x.setTIMINGDone[uint8_t id](error_t error){ return; }
  default async event void HplTSL256x.setTHRESHLOWDone[uint8_t id](error_t error){ return;} 
  default async event void HplTSL256x.setTHRESHHIGHDone[uint8_t id](error_t error){ return; }
  default async event void HplTSL256x.setINTERRUPTDone[uint8_t id](error_t error){ return;} 
  default async event void HplTSL256x.getIDDone[uint8_t id](error_t error, uint8_t idval){ return; }
  default async event void HplTSL256x.alertThreshold[uint8_t id](){ return; }
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/000077500000000000000000000000001207233610700221245ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/Makefile000066400000000000000000000002751207233610700235700ustar00rootroot00000000000000
TestSensor.class: $(wildcard *.java) TestSensorMsg.java
	javac *.java

TestSensorMsg.java:
	mig java -target=null $(CFLAGS) -java-classname=TestSensorMsg TestSensor.h TestSensorMsg -o $@

tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestLis3l02dq/000077500000000000000000000000001207233610700244415ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestLis3l02dq/Makefile000066400000000000000000000001011207233610700260710ustar00rootroot00000000000000COMPONENT=TestSensorC

SENSORBOARD ?= im2sb

include $(MAKERULES)tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestLis3l02dq/TestSensorC.nc000066400000000000000000000045751207233610700272120ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the STMicroelectronics LIS3L02DQ . Originally 
 * developed for the Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */

configuration TestSensorC{}
implementation {
  components MainC, TestSensorM, LedsC;
  components new LIS3L02DQC() as Sensor;

  MainC.Boot <- TestSensorM;
  TestSensorM.Leds -> LedsC;

  TestSensorM.ReadAccelX -> Sensor.AccelX;
  TestSensorM.ReadAccelY -> Sensor.AccelY;
  TestSensorM.ReadAccelZ -> Sensor.AccelZ;
  TestSensorM.SubControl -> Sensor.SplitControl;
  TestSensorM.Advanced -> Sensor.HalLIS3L02DQAdvanced;

  components new TimerMilliC() as Timer0;
  TestSensorM.Timer0 -> Timer0;

  components SerialActiveMessageC as AM;
  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
  TestSensorM.Packet -> AM;
  TestSensorM.SubControl -> AM;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestLis3l02dq/TestSensorM.nc000066400000000000000000000077271207233610700272260ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the STMicroelectronics LIS3L02DQ . Originally 
 * developed for the Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */
#include "../TestSensor.h"

/* Uncomment the flag below to test the interrupt functions of the chip */
//#define USE_INTERRUPTS

module TestSensorM
{
  uses interface Boot;
  
  uses interface Timer as Timer0;

  uses interface Read as ReadAccelX;
  uses interface Read as ReadAccelY;
  uses interface Read as ReadAccelZ;
  uses interface SplitControl as SubControl;

  uses interface HalLIS3L02DQAdvanced as Advanced;

  uses interface Leds;
  uses interface AMSend;
  uses interface Packet;
}
implementation
{
  message_t packet;

  event void Boot.booted() {
    call SubControl.start();
  }

  event void Timer0.fired() {
    call ReadAccelX.read();
    call ReadAccelY.read();
    call ReadAccelZ.read();
  }

  event void SubControl.startDone(error_t result) {
#ifndef USE_INTERRUPTS
   call Timer0.startPeriodic( 100 );
#else
    call Advanced.setTLow(0xA0);
#endif
  }

  event void SubControl.stopDone(error_t result) { }
  
  event void ReadAccelX.readDone(error_t result, uint16_t val) {
    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
    call Leds.led0Toggle();    

    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
      return;
    }
    rcm->value = val;

    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
  }

  event void ReadAccelY.readDone(error_t result, uint16_t val) {
    if(val > 0x800)
      call Leds.led1Toggle();    
  }
  event void ReadAccelZ.readDone(error_t result, uint16_t val) {
    if(val > 0x800)
      call Leds.led2Toggle();    
  }

  event void Advanced.setDecimationDone(error_t error) {}
  event void Advanced.enableAxisDone(error_t error) {}
  event void Advanced.enableAlertDone(error_t error) {
    call Leds.led2Toggle();
  }
  event void Advanced.getAlertSourceDone(error_t error, uint8_t vector) {}
  event void Advanced.setTLowDone(error_t error) {
    call Advanced.setTHigh(0xF);
  }
  event void Advanced.setTHighDone(error_t error) {
    call Advanced.enableAlert(LIS_AFLAGS_HIGH,
			      LIS_AFLAGS_NONE,
			      LIS_AFLAGS_NONE,
			      FALSE);
  }

  event void Advanced.alertThreshold() {
    call Leds.led0Toggle();
  }

  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
    return;
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestMax136/000077500000000000000000000000001207233610700237435ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestMax136/Makefile000066400000000000000000000001011207233610700253730ustar00rootroot00000000000000COMPONENT=TestSensorC

SENSORBOARD ?= im2sb

include $(MAKERULES)tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestMax136/TestSensorC.nc000066400000000000000000000043761207233610700265130ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the Maxim MAX136X. Originally developed for the
 * Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */

configuration TestSensorC{}
implementation {
  components MainC, TestSensorM, LedsC;
  components new MAX136xC() as Sensor;

  MainC.Boot <- TestSensorM;
  TestSensorM.Leds -> LedsC;

  TestSensorM.ADC -> Sensor;
  TestSensorM.SensorControl -> Sensor.SplitControl;
  TestSensorM.HalMAX136xAdvanced -> Sensor;

  components new TimerMilliC() as Timer0;
  TestSensorM.Timer0 -> Timer0;

  components SerialActiveMessageC as AM;
  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
  TestSensorM.Packet -> AM;
  TestSensorM.MsgControl -> AM;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestMax136/TestSensorM.nc000066400000000000000000000106001207233610700265100ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the Maxim MAX136X. Originally developed for the
 * Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */
#include "MAX136x.h"
#include "../TestSensor.h"

/* Uncomment the flag below to test the interrupt functions of the chip */
//#define USE_INTERRUPTS

module TestSensorM
{
  uses interface Boot;
  
  uses interface Timer as Timer0;

  uses interface Read as ADC;
  uses interface HalMAX136xAdvanced;
  uses interface SplitControl as SensorControl;
  uses interface SplitControl as MsgControl;

  uses interface Leds;
  uses interface AMSend;
  uses interface Packet;
}

implementation
{
  message_t packet;

  event void Boot.booted() {
    call SensorControl.start();
  }

  event void Timer0.fired() {
    call ADC.read();
  }

  event void SensorControl.startDone(error_t result) {
    call MsgControl.start();
  }

  event void SensorControl.stopDone(error_t result) { return; }


  event void MsgControl.startDone(error_t result) {
#ifndef USE_INTERRUPTS
    call Timer0.startPeriodic( 100 );
#else
    uint16_t chan0Low = 200;
    uint16_t chan0High = 700;
    uint8_t ucThresholds[12];
    uint8_t i;

    ucThresholds[0] = (chan0Low >> 4);
    ucThresholds[1] = ( ((chan0Low & 0xF) << 4) | (chan0High >> 8));
    ucThresholds[2] = chan0High & 0xFF;
    for (i=3;i<12;i+=3) {
      ucThresholds[i] = 0x00;
      ucThresholds[i+1] = 0x0F;
      ucThresholds[i+2] = 0xFF;
    }
    call HalMAX136xAdvanced.setMonitorMode(0,0,MAX136X_DELAY_1_0,ucThresholds);
#endif
  }

  event void MsgControl.stopDone(error_t result) { return; }
  
  event void ADC.readDone(error_t result, max136x_data_t val) {
    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
    call Leds.led0Toggle();
    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
      return;
    }
    rcm->value = val & 0x3FF;

    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
  }

  event void HalMAX136xAdvanced.setScanModeDone(error_t error) {}
  event void HalMAX136xAdvanced.setMonitorModeDone(error_t error) {
    call Leds.set(LEDS_LED1);
    call HalMAX136xAdvanced.enableAlert(TRUE);
  }
  event void HalMAX136xAdvanced.setConversionModeDone(error_t error) {}  
  event void HalMAX136xAdvanced.setClockDone(error_t error) {} 
  event void HalMAX136xAdvanced.setRefDone(error_t error) {}
  event void HalMAX136xAdvanced.getStatusDone(error_t error, uint8_t status, 
					      max136x_data_t data) {}
  event void HalMAX136xAdvanced.enableAlertDone(error_t error) {
    call Leds.set(LEDS_LED1 | LEDS_LED2);
    return;
  }
  event void HalMAX136xAdvanced.alertThreshold() {
    call Leds.led0Toggle();
    call HalMAX136xAdvanced.enableAlert(TRUE); // Clears interrupt
    return;
  }

  event void AMSend.sendDone(message_t* bufPtr, error_t error) { return; }
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestSensor.h000066400000000000000000000002411207233610700244030ustar00rootroot00000000000000#ifndef TEST_SENSOR_H
#define TEST_SENSOR_H

typedef nx_struct TestSensorMsg {
  nx_uint16_t value;
} TestSensorMsg;

enum {
  AM_TESTSENSORMSG = 10,
};

#endif
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestSensor.java000066400000000000000000000070501207233610700251020ustar00rootroot00000000000000/*
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * Java-side application for testing serial port communication.
 * 
 *
 * @author Phil Levis 
 * @date August 12 2005
 */

import java.io.IOException;

import net.tinyos.message.*;
import net.tinyos.packet.*;
import net.tinyos.util.*;

public class TestSensor implements MessageListener {

    private MoteIF moteIF;
  
    public TestSensor(MoteIF moteIF) {
				this.moteIF = moteIF;
				this.moteIF.registerListener(new TestSensorMsg(), this);
    }

    public void sendPackets() {
				int counter = 0;
				TestSensorMsg payload = new TestSensorMsg();
    
				try {
						while (true) {
								/*
									System.out.println("Sending packet " + counter);
									payload.set_counter(counter);
									moteIF.send(0, payload);
									counter++;
								*/
								try {Thread.sleep(1000);}
								catch (InterruptedException exception) {}
						}
				}
				catch (Exception exception) {
						System.err.println("Exception thrown when sending packets. Exiting.");
						System.err.println(exception);
				}
    }

    public void messageReceived(int to, Message message) {
				TestSensorMsg msg = (TestSensorMsg)message;
				System.out.println("Received packet. Value= " + msg.get_value());
    }
  
    private static void usage() {
				System.err.println("usage: TestSensor [-comm ]");
    }
  
    public static void main(String[] args) throws Exception {
				String source = null;
				if (args.length == 2) {
						if (!args[0].equals("-comm")) {
								usage();
								System.exit(1);
						}
						source = args[1];
				}
				else if (args.length != 0) {
						usage();
						System.exit(1);
				}
    
				PhoenixSource phoenix;
    
				if (source == null) {
						phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
				}
				else {
						phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
				}

				MoteIF mif = new MoteIF(phoenix);
				TestSensor serial = new TestSensor(mif);
				serial.sendPackets();
    }


}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestSensorMsg.java000066400000000000000000000102201207233610700255420ustar00rootroot00000000000000/**
 * This class is automatically generated by mig. DO NOT EDIT THIS FILE.
 * This class implements a Java interface to the 'TestSensorMsg'
 * message type.
 */

public class TestSensorMsg extends net.tinyos.message.Message {

    /** The default size of this message type in bytes. */
    public static final int DEFAULT_MESSAGE_SIZE = 2;

    /** The Active Message type associated with this message. */
    public static final int AM_TYPE = 10;

    /** Create a new TestSensorMsg of size 2. */
    public TestSensorMsg() {
        super(DEFAULT_MESSAGE_SIZE);
        amTypeSet(AM_TYPE);
    }

    /** Create a new TestSensorMsg of the given data_length. */
    public TestSensorMsg(int data_length) {
        super(data_length);
        amTypeSet(AM_TYPE);
    }

    /**
     * Create a new TestSensorMsg with the given data_length
     * and base offset.
     */
    public TestSensorMsg(int data_length, int base_offset) {
        super(data_length, base_offset);
        amTypeSet(AM_TYPE);
    }

    /**
     * Create a new TestSensorMsg using the given byte array
     * as backing store.
     */
    public TestSensorMsg(byte[] data) {
        super(data);
        amTypeSet(AM_TYPE);
    }

    /**
     * Create a new TestSensorMsg using the given byte array
     * as backing store, with the given base offset.
     */
    public TestSensorMsg(byte[] data, int base_offset) {
        super(data, base_offset);
        amTypeSet(AM_TYPE);
    }

    /**
     * Create a new TestSensorMsg using the given byte array
     * as backing store, with the given base offset and data length.
     */
    public TestSensorMsg(byte[] data, int base_offset, int data_length) {
        super(data, base_offset, data_length);
        amTypeSet(AM_TYPE);
    }

    /**
     * Create a new TestSensorMsg embedded in the given message
     * at the given base offset.
     */
    public TestSensorMsg(net.tinyos.message.Message msg, int base_offset) {
        super(msg, base_offset, DEFAULT_MESSAGE_SIZE);
        amTypeSet(AM_TYPE);
    }

    /**
     * Create a new TestSensorMsg embedded in the given message
     * at the given base offset and length.
     */
    public TestSensorMsg(net.tinyos.message.Message msg, int base_offset, int data_length) {
        super(msg, base_offset, data_length);
        amTypeSet(AM_TYPE);
    }

    /**
    /* Return a String representation of this message. Includes the
     * message type name and the non-indexed field values.
     */
    public String toString() {
      String s = "Message  \n";
      try {
        s += "  [value=0x"+Long.toHexString(get_value())+"]\n";
      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
      return s;
    }

    // Message-type-specific access methods appear below.

    /////////////////////////////////////////////////////////
    // Accessor methods for field: value
    //   Field type: int, unsigned
    //   Offset (bits): 0
    //   Size (bits): 16
    /////////////////////////////////////////////////////////

    /**
     * Return whether the field 'value' is signed (false).
     */
    public static boolean isSigned_value() {
        return false;
    }

    /**
     * Return whether the field 'value' is an array (false).
     */
    public static boolean isArray_value() {
        return false;
    }

    /**
     * Return the offset (in bytes) of the field 'value'
     */
    public static int offset_value() {
        return (0 / 8);
    }

    /**
     * Return the offset (in bits) of the field 'value'
     */
    public static int offsetBits_value() {
        return 0;
    }

    /**
     * Return the value (as a int) of the field 'value'
     */
    public int get_value() {
        return (int)getUIntBEElement(offsetBits_value(), 16);
    }

    /**
     * Set the value of the field 'value'
     */
    public void set_value(int value) {
        setUIntBEElement(offsetBits_value(), 16, value);
    }

    /**
     * Return the size, in bytes, of the field 'value'
     */
    public static int size_value() {
        return (16 / 8);
    }

    /**
     * Return the size, in bits, of the field 'value'
     */
    public static int sizeBits_value() {
        return 16;
    }

}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestSht11/000077500000000000000000000000001207233610700236645ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestSht11/README.txt000066400000000000000000000003511207233610700253610ustar00rootroot00000000000000Sht11 Test Sensor

A simple application to demonstrate/test the SHT11 on the Intel Mote 2 sensorboard.

NOTE: If using the debug/programming board you must set SW5 to either the 
SPI or I2C settings for the SHT11 to work correctly.

tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestSht11/TestSensorC.nc000066400000000000000000000045041207233610700264250ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the Sensirion SHT11. Originally developed for the
 * Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */

configuration TestSensorC{}
implementation {
  components MainC, TestSensorM, LedsC;
  components new SensirionSht11C() as Sensor;

  MainC.Boot <- TestSensorM;
  TestSensorM.Leds -> LedsC;

  TestSensorM.Temperature -> Sensor.Temperature;
  TestSensorM.Humidity -> Sensor.Humidity;
  TestSensorM.HalSht11Advanced -> Sensor;
  TestSensorM.SensorControl -> Sensor.SplitControl;

  components new TimerMilliC() as Timer0;
  TestSensorM.Timer0 -> Timer0;

  components SerialActiveMessageC as AM;
  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
  TestSensorM.Packet -> AM;
  TestSensorM.MsgControl -> AM;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestSht11/TestSensorM.nc000066400000000000000000000066111207233610700264400ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the TAOS Tsl2561. Originally developed for the
 * Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */
#include "../TestSensor.h"

module TestSensorM
{
  uses interface Boot;
  
  uses interface Timer as Timer0;

  uses interface Read as Temperature;
  uses interface Read as Humidity;  
  uses interface HalSht11Advanced;
  uses interface SplitControl as SensorControl;
  uses interface SplitControl as MsgControl;

  uses interface Leds;
  uses interface AMSend;
  uses interface Packet;
}

implementation
{
  message_t packet;

  event void Boot.booted() {
    call SensorControl.start();
  }

  event void SensorControl.startDone(error_t error) {
    call MsgControl.start();
  }

  event void SensorControl.stopDone(error_t error) {  }

  event void MsgControl.startDone(error_t error) {
    call HalSht11Advanced.getVoltageStatus();
    call Timer0.startPeriodic( 100 );
  }

  event void MsgControl.stopDone(error_t error) { }

  event void Timer0.fired() {
    //call Temperature.read();
    call Humidity.read();
  }

  event void Temperature.readDone(error_t result, uint16_t val) {
    call Leds.led0Toggle();
  }

  event void Humidity.readDone(error_t result, uint16_t val) {
    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
    call Leds.led1Toggle();
    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
      return;
    }
    rcm->value = val;

    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
  }

  event void HalSht11Advanced.getVoltageStatusDone(error_t error, bool isLow) {}

  event void HalSht11Advanced.setHeaterDone(error_t error) {}

  event void HalSht11Advanced.setResolutionDone(error_t error) {}

  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
    return;
  }

}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestTmp175/000077500000000000000000000000001207233610700237615ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestTmp175/Makefile000066400000000000000000000001301207233610700254130ustar00rootroot00000000000000COMPONENT=TestSensorC
CFLAGS += -I%T/lib/oski
SENSORBOARD ?= im2sb

include $(MAKERULES)tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestTmp175/TestSensorC.nc000066400000000000000000000043751207233610700265300ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the TI TMP175. Originally developed for the
 * Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */

configuration TestSensorC{}
implementation {
  components MainC, TestSensorM, LedsC;
  components new TMP175C() as Sensor;

  MainC.Boot <- TestSensorM;
  TestSensorM.Leds -> LedsC;

  TestSensorM.Temperature -> Sensor;
  TestSensorM.SubControl -> Sensor.SplitControl;
  TestSensorM.HalTMP175Advanced -> Sensor;

  components new TimerMilliC() as Timer0;
  TestSensorM.Timer0 -> Timer0;

  components SerialActiveMessageC as AM;
  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
  TestSensorM.Packet -> AM;
  TestSensorM.SubControl -> AM;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestTmp175/TestSensorM.nc000066400000000000000000000073471207233610700265440ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the TI TMP175. Originally developed for the
 * Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */
#include "../TestSensor.h"

/* Uncomment the flag below to test the interrupt functions of the chip */
//#define USE_INTERRUPTS

module TestSensorM
{
  uses interface Boot;
  
  uses interface Timer as Timer0;

  uses interface Read as Temperature;
  uses interface SplitControl as SubControl;

  uses interface HalTMP175Advanced;

  uses interface Leds;
  uses interface AMSend;
  uses interface Packet;
}
implementation
{
  uint8_t ledcount = 0;
  message_t packet;

  event void Boot.booted() {
    call SubControl.start();
  }

  event void Timer0.fired() {
    call Temperature.read();
  }

  event void SubControl.startDone(error_t result) {
#ifdef USE_INTERRUPTS
    call HalTMP175Advanced.setPolarity(TRUE);
#else
    call Timer0.startPeriodic( 100 );
#endif
  }

  event void SubControl.stopDone(error_t result) { }
  
  event void Temperature.readDone(error_t result, uint16_t val) {
    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
    call Leds.led0Toggle();

    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
      return;
    }
    rcm->value = val;

    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));

  }

  event void HalTMP175Advanced.setTHighDone(error_t error) {
    call HalTMP175Advanced.setTLow(352);
  }
  event void HalTMP175Advanced.setThermostatModeDone(error_t error){
    call HalTMP175Advanced.setTHigh(448);
  } 

  event void HalTMP175Advanced.setPolarityDone(error_t error){
    call HalTMP175Advanced.setThermostatMode(TRUE);
  }
  event void HalTMP175Advanced.setFaultQueueDone(error_t error){ return; }
  event void HalTMP175Advanced.setResolutionDone(error_t error){ return; }
  event void HalTMP175Advanced.setTLowDone(error_t error){
    //call Timer0.startPeriodic( 1000 );
    call Leds.led2Toggle();
  }
  event void HalTMP175Advanced.alertThreshold() {
#ifdef USE_INTERRUPTS
    call Temperature.read();
    call Leds.led0Toggle();
#endif
  }

  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
    return;
  }

}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestTsl2561/000077500000000000000000000000001207233610700240445ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestTsl2561/Makefile000066400000000000000000000001011207233610700254740ustar00rootroot00000000000000COMPONENT=TestSensorC

SENSORBOARD ?= im2sb

include $(MAKERULES)tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestTsl2561/TestSensorC.nc000066400000000000000000000044731207233610700266120ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the TAOS Tsl2561. Originally developed for the
 * Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */

configuration TestSensorC{}
implementation {
  components MainC, TestSensorM, LedsC;
  components new Tsl2561C() as Sensor;

  MainC.Boot <- TestSensorM;
  TestSensorM.Leds -> LedsC;

  TestSensorM.ReadBroadband -> Sensor.BroadbandPhoto;
  TestSensorM.SubControl -> Sensor.SplitControl;
  TestSensorM.ReadIR -> Sensor.IRPhoto;
  TestSensorM.HalTsl2561Advanced -> Sensor;

  components new TimerMilliC() as Timer0;
  TestSensorM.Timer0 -> Timer0;

  components SerialActiveMessageC as AM;
  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
  TestSensorM.Packet -> AM;
  TestSensorM.SubControl -> AM;
}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/examples/TestTsl2561/TestSensorM.nc000066400000000000000000000100361207233610700266140ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Demo application of the TAOS Tsl2561. Originally developed for the
 * Intel Mote 2 sensorboard.
 *
 * @author Kaisen Lin
 * @author Philip Buonadonna
 */
#include "../TestSensor.h"

/* Uncomment the flag below to test the interrupt functions of the chip */
//#define USE_INTERRUPTS

module TestSensorM
{
  uses interface Boot;
  
  uses interface Timer as Timer0;

  uses interface Read as ReadIR;
  uses interface Read as ReadBroadband;
  uses interface SplitControl as SubControl;

  uses interface HalTsl2561Advanced;

  uses interface Leds;
  uses interface AMSend;
  uses interface Packet;
}
implementation
{
  message_t packet;
  uint8_t initCounter = 0;

  event void Boot.booted() {
    call SubControl.start();
  }

  event void Timer0.fired() {
    call ReadBroadband.read();
  }

  event void SubControl.startDone(error_t result) {
#ifndef USE_INTERRUPTS
    call Timer0.startPeriodic( 100 );
#else
    call HalTsl2561Advanced.enableAlert(FALSE);
#endif
    return;
  }

  event void SubControl.stopDone(error_t result) { }
  
  event void ReadBroadband.readDone(error_t result, uint16_t val) {
    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);

    call Leds.led0Toggle();

    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
      return;
    }
    rcm->value = val;

    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
  }
  
  event void ReadIR.readDone(error_t result, uint16_t val) { }
  
  event void HalTsl2561Advanced.setGainDone(error_t error) { }
  event void HalTsl2561Advanced.setIntegrationDone(error_t error) { }

  event void HalTsl2561Advanced.setPersistenceDone(error_t error) {
    call HalTsl2561Advanced.enableAlert(TRUE);
  }
  event void HalTsl2561Advanced.setTLowDone(error_t error) {
    call HalTsl2561Advanced.setTHigh(7000);
  }
  event void HalTsl2561Advanced.setTHighDone(error_t error) { 
    call HalTsl2561Advanced.setPersistence(1);
  }
  event void HalTsl2561Advanced.enableAlertDone(error_t error) {
    switch (initCounter) {
    case 0:
      call HalTsl2561Advanced.setTLow(200);
      initCounter++;
      break;
    case 1:
      call Leds.set(LEDS_LED2 | LEDS_LED0);	
      initCounter++;
      break;
    default:
      break;
    }
  }

  event void HalTsl2561Advanced.alertThreshold() {
    call Leds.led1Toggle();
    call HalTsl2561Advanced.enableAlert(TRUE); // Clears interrupt
  }

  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
    return;
  }

}
tinyos-2.1.2+dfsg/tos/sensorboards/im2sb/im2sb.h000066400000000000000000000041401207233610700214720ustar00rootroot00000000000000/* $Id: im2sb.h,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
/*
 * Copyright (c) 2005 Arch Rock Corporation 
 * All rights reserved. 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *	Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution.
 *  
 *   Neither the name of the Arch Rock Corporation nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
 * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
 * DAMAGE.
 */
/**
 * 
 * @author Phil Buonadonna 
 * Revision: $Revision: 1.5 $
 *
 */

#ifndef _IM2SB_H
#define _IM2SB_H

#define GPIO_SHT11_DATA			(100)
#define GPIO_SHT11_CLK			(98)

#define GPIO_TSL2561_LIGHT_INT		(99)
#define GPIO_MAX1363_ANALOG_INT		(99)

#define GPIO_LIS3L02DQ_RDY_INT		(96)
#define GPIO_TMP175_TEMP_ALERT		(96)

#define GPIO_PWR_ADC_NSHDWN		(93)

#define TSL2561_SLAVE_ADDR (0x49)
#define TMP175_SLAVE_ADDR (0x48)
#define MAX136_SLAVE_ADDR (0x34)

#endif /* _IM2SB_H */
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/000077500000000000000000000000001207233610700202545ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/mda100/.sensor000066400000000000000000000000001207233610700215540ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/mda100/ArbitratedPhotoDeviceP.nc000066400000000000000000000037041207233610700251350ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

configuration ArbitratedPhotoDeviceP
{
  provides interface Read[uint8_t client];
}
implementation
{
  components PhotoImplP,
    new ArbitratedReadC(uint16_t) as ArbitrateRead;

  Read = ArbitrateRead;
  ArbitrateRead.Service -> PhotoImplP.Read;
  ArbitrateRead.Resource -> PhotoImplP.Resource;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/ArbitratedTempDeviceP.nc000066400000000000000000000037001207233610700247450ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

configuration ArbitratedTempDeviceP
{
  provides interface Read[uint8_t client];
}
implementation
{
  components TempImplP,
    new ArbitratedReadC(uint16_t) as ArbitrateRead;

  Read = ArbitrateRead;
  ArbitrateRead.Service -> TempImplP.Read;
  ArbitrateRead.Resource -> TempImplP.Resource;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/DemoSensorC.nc000066400000000000000000000011741207233610700227620ustar00rootroot00000000000000/* $Id: DemoSensorC.nc,v 1.1 2007-08-21 04:44:09 klueska Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Demo sensor for basicsb sensorboard.
 * 
 * @author David Gay
 */

generic configuration DemoSensorC() {
  provides interface Read;
}
implementation {
  components new PhotoC() as Sensor;

  Read = Sensor;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/PhotoC.nc000066400000000000000000000013001207233610700217640ustar00rootroot00000000000000/* $Id: PhotoC.nc,v 1.1 2007-08-21 04:44:09 klueska Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Photodiode of the mda100 sensor board.
 * 
 * @author David Gay
 */

#include "mda100.h"

generic configuration PhotoC() {
  provides interface Read;
}
implementation {
  components ArbitratedPhotoDeviceP;

  Read = ArbitratedPhotoDeviceP.Read[unique(UQ_MDA100_PHOTO_RESOURCE)];
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/PhotoImplP.nc000066400000000000000000000041341207233610700226330ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

#include "mda100.h"

configuration PhotoImplP {
  provides {
    interface Resource[uint8_t];
    interface Read[uint8_t];
  }
}
implementation {
  components new SharedAnalogDeviceC(UQ_MDA100_PHOTO_RESOURCE, 10);
  components MicaBusC;
  components PhotoTempConfigC as PhotoConfigC;

  Resource = SharedAnalogDeviceC;
  Read = SharedAnalogDeviceC;
  SharedAnalogDeviceC.AdcConfig -> PhotoConfigC;
  SharedAnalogDeviceC.EnablePin -> MicaBusC.Int1;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/PhotoTempConfigC.nc000066400000000000000000000035731207233610700237560ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

configuration PhotoTempConfigC {
  provides interface Atm128AdcConfig;
}
implementation {
  components PhotoTempConfigP;
  components MicaBusC;
  Atm128AdcConfig = PhotoTempConfigP;

  PhotoTempConfigP.PhotoTempAdc -> MicaBusC.Adc1;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/PhotoTempConfigP.nc000066400000000000000000000016551207233610700237720ustar00rootroot00000000000000/* $Id: PhotoTempConfigP.nc,v 1.1 2007-08-21 04:44:09 klueska Exp $
 * Copyright (c) 2007 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * MDA100 photo and temp sensor ADC configuration.
 * @author David Gay 
 */
module PhotoTempConfigP
{
  provides interface Atm128AdcConfig;
  uses interface MicaBusAdc as PhotoTempAdc;
}
implementation
{
  async command uint8_t Atm128AdcConfig.getChannel() {
    return call PhotoTempAdc.getChannel();
  }

  async command uint8_t Atm128AdcConfig.getRefVoltage() {
    return ATM128_ADC_VREF_OFF;
  }

  async command uint8_t Atm128AdcConfig.getPrescaler() {
    return ATM128_ADC_PRESCALE;
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/SharedAnalogDeviceC.nc000066400000000000000000000050641207233610700243560ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

generic configuration SharedAnalogDeviceC(char resourceName[], uint32_t startup_delay) {
  provides {
    interface Resource[uint8_t];
    interface Read[uint8_t];
  }
  uses {
    interface Atm128AdcConfig as AdcConfig;
    interface GeneralIO as EnablePin;
  } 
}
implementation {
  components new RoundRobinArbiterC(resourceName) as Arbiter;
  components new SplitControlPowerManagerC() as PowerManager;
  components new SharedAnalogDeviceP(startup_delay) as AnalogDevice;
  components new AdcReadNowClientC() as Adc;
  components new TimerMilliC();
  Resource = Arbiter;
  Read = AnalogDevice;

  PowerManager.ArbiterInfo -> Arbiter;
  PowerManager.SplitControl -> AnalogDevice;
  PowerManager.ResourceDefaultOwner -> Arbiter;
  AnalogDevice.ActualRead -> Adc;
  AnalogDevice.Timer -> TimerMilliC;
  AnalogDevice.AnalogDeviceResource -> Adc;

  Adc.Atm128AdcConfig = AdcConfig;
  AnalogDevice.EnablePin = EnablePin;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/SharedAnalogDeviceP.nc000066400000000000000000000067371207233610700244030ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

generic module SharedAnalogDeviceP(uint32_t startup_delay) {
  provides {
    interface SplitControl;
    interface Read[uint8_t];
  }
  uses {
    interface Resource as AnalogDeviceResource;
    interface Timer;
    interface GeneralIO as EnablePin;
    interface ReadNow as ActualRead;
  }
}
implementation {
  bool started = FALSE;
  bool busy = FALSE;
  uint8_t client_id;
  norace error_t read_result;
  norace uint16_t read_val;
	
  command error_t SplitControl.start() {
    error_t error;
    if(started == FALSE) {
      error = call AnalogDeviceResource.request();
      if(error == SUCCESS)
        started = TRUE;
      return error;
    }
    return FAIL;
  }

  event void AnalogDeviceResource.granted() {
    call EnablePin.makeOutput();
    call EnablePin.set();
    call Timer.startOneShot(startup_delay);
  }

  event void Timer.fired() {
    signal SplitControl.startDone(SUCCESS);
  }

  task void stopDone() {
    call AnalogDeviceResource.release();
    started = FALSE;
    signal SplitControl.stopDone(SUCCESS);
  }

  command error_t SplitControl.stop() {
    if(started == TRUE) {
      call EnablePin.clr();
      call EnablePin.makeInput();
      post stopDone();
      return SUCCESS;
    }
    else if(busy == TRUE)
      return EBUSY;
    return FAIL;
  }

  command error_t Read.read[uint8_t id]() {
    error_t error;
    if(call AnalogDeviceResource.isOwner() && busy == FALSE) {
      error = call ActualRead.read();
      if(error == SUCCESS) {
        busy = TRUE;
        client_id = id; 
      }
      return error;
    }
    return FAIL;
  }

  task void readDoneTask() {
    busy = FALSE;
    signal Read.readDone[client_id](read_result, read_val);
  }

  async event void ActualRead.readDone(error_t result, uint16_t val) {
    read_result = result;
    read_val = val;
    post readDoneTask();
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/TempC.nc000066400000000000000000000012731207233610700216110ustar00rootroot00000000000000/* $Id: TempC.nc,v 1.2 2008-06-11 00:42:15 razvanm Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Photodiode of the mda100 sensor board.
 * 
 * @author David Gay
 */

#include "mda100.h"

generic configuration TempC() {
  provides interface Read;
}
implementation {
  components ArbitratedTempDeviceP;

  Read = ArbitratedTempDeviceP.Read[unique(UQ_MDA100_TEMP_RESOURCE)];
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/ca/000077500000000000000000000000001207233610700206375ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/mda100/ca/TempImplP.nc000066400000000000000000000041301207233610700230260ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

#include "mda100.h"

configuration TempImplP {
  provides {
    interface Resource[uint8_t];
    interface Read[uint8_t];
  }
}
implementation {
  components new SharedAnalogDeviceC(UQ_MDA100_TEMP_RESOURCE, 10);
  components MicaBusC;
  components PhotoTempConfigC as TempConfigC;

  Resource = SharedAnalogDeviceC;
  Read = SharedAnalogDeviceC;
  SharedAnalogDeviceC.AdcConfig -> TempConfigC;
  SharedAnalogDeviceC.EnablePin -> MicaBusC.Int2;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/cb/000077500000000000000000000000001207233610700206405ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/mda100/cb/TempImplP.nc000066400000000000000000000041271207233610700230350ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

#include "mda100.h"

configuration TempImplP {
  provides {
    interface Resource[uint8_t];
    interface Read[uint8_t];
  }
}
implementation {
  components new SharedAnalogDeviceC(UQ_MDA100_TEMP_RESOURCE, 10);
  components MicaBusC;
  components PhotoTempConfigC as TempConfigC;

  Resource = SharedAnalogDeviceC;
  Read = SharedAnalogDeviceC;
  SharedAnalogDeviceC.AdcConfig -> TempConfigC;
  SharedAnalogDeviceC.EnablePin -> MicaBusC.PW0;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mda100/mda100.h000066400000000000000000000034541207233610700214150ustar00rootroot00000000000000/*
 * Copyright (c) 2007 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Kevin Klues 
 * @date August 20th, 2007
 */

#ifndef _MDA100_H
#define _MDA100_H

#define UQ_MDA100_PHOTO_RESOURCE "mda100.photo"
#define UQ_MDA100_TEMP_RESOURCE "mda100.temp"

#endif /* _MDA100_H */

tinyos-2.1.2+dfsg/tos/sensorboards/mts300/000077500000000000000000000000001207233610700203205ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/mts300/.sensor000066400000000000000000000003101207233610700216240ustar00rootroot00000000000000#
# The MTS300 board does not have an external pullup resistor on the I2C
# lines, so we need to enable the internal pullup resistor on the MCU.
#

push @new_args, "-DATM128_I2C_EXTERNAL_PULLDOWN=1";
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/AccelConfigP.nc000066400000000000000000000024331207233610700231210ustar00rootroot00000000000000/* $Id: AccelConfigP.nc,v 1.3 2007-03-14 03:25:05 pipeng Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Internal component for basicsb photodiode. Arbitrates access to the photo
 * diode and automatically turns it on or off based on user requests.
 * 
 * @author David Gay
 */

configuration AccelConfigP { 
  provides {
    interface Resource[uint8_t client];
    interface Atm128AdcConfig as ConfigX;
    interface Atm128AdcConfig as ConfigY;
  }
}
implementation {
  components AccelP, MicaBusC, new TimerMilliC() as WarmupTimer,
    new RoundRobinArbiterC(UQ_ACCEL_RESOURCE) as Arbiter,
    new SplitControlPowerManagerC() as PowerManager;

  Resource = Arbiter;
  ConfigX = AccelP.ConfigX;
  ConfigY = AccelP.ConfigY;

  PowerManager.ResourceDefaultOwner -> Arbiter;
  PowerManager.ArbiterInfo -> Arbiter;
  PowerManager.SplitControl -> AccelP;

  AccelP.Timer -> WarmupTimer;
  AccelP.AccelPin -> MicaBusC.PW4;
  AccelP.AccelAdcX -> MicaBusC.Adc3;
  AccelP.AccelAdcY -> MicaBusC.Adc4;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/AccelP.nc000066400000000000000000000035471207233610700220020ustar00rootroot00000000000000/* $Id: AccelP.nc,v 1.3 2007-03-14 03:25:05 pipeng Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * ADXL202JE accelerometer ADC configuration and power management.
 * @author David Gay 
 */
module AccelP
{
  provides {
    interface SplitControl;
    interface Atm128AdcConfig as ConfigX;
    interface Atm128AdcConfig as ConfigY;
  }
  uses {
    interface Timer;
    interface GeneralIO as AccelPin;
    interface MicaBusAdc as AccelAdcX;
    interface MicaBusAdc as AccelAdcY;
  }
}
implementation
{
  async command uint8_t ConfigX.getChannel() {
    return call AccelAdcX.getChannel();
  }

  async command uint8_t ConfigX.getRefVoltage() {
    return ATM128_ADC_VREF_OFF;
  }

  async command uint8_t ConfigX.getPrescaler() {
    return ATM128_ADC_PRESCALE;
  }

  async command uint8_t ConfigY.getChannel() {
    return call AccelAdcY.getChannel();
  }

  async command uint8_t ConfigY.getRefVoltage() {
    return ATM128_ADC_VREF_OFF;
  }

  async command uint8_t ConfigY.getPrescaler() {
    return ATM128_ADC_PRESCALE;
  }

  command error_t SplitControl.start() {
    call AccelPin.makeOutput();
    call AccelPin.set();
    /* Startup time is 16.3ms for 0.1uF capacitors,
       according to the ADXL202E data sheet */
    call Timer.startOneShot(17); 
    return SUCCESS;
  }

  event void Timer.fired() {
    signal SplitControl.startDone(SUCCESS);
  }

  task void stopDone() {
    call AccelPin.clr();
    signal SplitControl.stopDone(SUCCESS);
  }

  command error_t SplitControl.stop() {
    post stopDone();
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/AccelReadP.nc000066400000000000000000000016011207233610700225630ustar00rootroot00000000000000configuration AccelReadP
{
  provides 
  {
    interface Read as ReadX[uint8_t client];
    interface Read as ReadY[uint8_t client];
  }
  uses
  {
    interface Read as ActualX[uint8_t client];
    interface Read as ActualY[uint8_t client];
  }
}
implementation
{
  components AccelConfigP,
//    new MultiplexedReadC(uint16_t) as MultiplexX,
//    new MultiplexedReadC(uint16_t) as MultiplexY,
    new ArbitratedReadC(uint16_t) as MultiplexX,
    new ArbitratedReadC(uint16_t) as MultiplexY;
//    new AdcReadClientC() as AdcX,
//    new AdcReadClientC() as AdcY;

  ReadX = MultiplexX;
  MultiplexX.Resource -> AccelConfigP;
  MultiplexX.Service = ActualX;
  //AdcX.Atm128AdcConfig -> AccelConfigP.ConfigX;

  ReadY = MultiplexY;
  MultiplexY.Resource -> AccelConfigP;
  MultiplexY.Service = ActualY;
  //AdcY.Atm128AdcConfig -> AccelConfigP.ConfigY;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts300/AccelReadStreamP.nc000066400000000000000000000014141207233610700237410ustar00rootroot00000000000000configuration AccelReadStreamP
{
  provides {
    interface ReadStream as ReadStreamX[uint8_t client];
    interface ReadStream as ReadStreamY[uint8_t client];
  }
  uses {
    interface ReadStream as ActualX[uint8_t client];
    interface ReadStream as ActualY[uint8_t client];
  }
}
implementation
{
  enum {
    NACCEL_CLIENTS = uniqueCount(UQ_ACCEL_RESOURCE)
  };
  components AccelConfigP,
    new ArbitratedReadStreamC(NACCEL_CLIENTS, uint16_t) as MultiplexX,
    new ArbitratedReadStreamC(NACCEL_CLIENTS, uint16_t) as MultiplexY;

  ReadStreamX = MultiplexX;
  MultiplexX.Resource -> AccelConfigP;
  MultiplexX.Service = ActualX;

  ReadStreamY = MultiplexY;
  MultiplexY.Resource -> AccelConfigP;
  MultiplexY.Service = ActualY;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts300/AccelXC.nc000066400000000000000000000014771207233610700221150ustar00rootroot00000000000000/* $Id: AccelXC.nc,v 1.3 2007-03-14 04:57:35 pipeng Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Acceldiode of the basicsb sensor board.
 * 
 * @author David Gay
 */

#include "mts300.h"

generic configuration AccelXC()
{
  provides interface Read;
}
implementation {
  enum {
    ID = unique(UQ_ACCEL_RESOURCE)
  };
  
  components AccelReadP,AccelConfigP, new AdcReadClientC() as AdcX;

  Read = AccelReadP.ReadX[ID];
  AccelReadP.ActualX[ID] -> AdcX;
  AdcX.Atm128AdcConfig -> AccelConfigP.ConfigX;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts300/AccelXStreamC.nc000066400000000000000000000016131207233610700232610ustar00rootroot00000000000000/* $Id: AccelXStreamC.nc,v 1.3 2007-03-14 04:57:35 pipeng Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * AccelXdiode of the basicsb sensor board.
 * 
 * @author David Gay
 */

#include "mts300.h"

generic configuration AccelXStreamC() {
  provides interface ReadStream;
}
implementation {
  enum {
    ID = unique(UQ_ACCEL_RESOURCE)
  };
  components AccelReadStreamP, AccelConfigP, new AdcReadStreamClientC();

  ReadStream = AccelReadStreamP.ReadStreamX[ID];
  AccelReadStreamP.ActualX[ID] -> AdcReadStreamClientC;
  AdcReadStreamClientC.Atm128AdcConfig -> AccelConfigP.ConfigX;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/AccelYC.nc000066400000000000000000000014751207233610700221140ustar00rootroot00000000000000/* $Id: AccelYC.nc,v 1.3 2007-03-14 04:57:35 pipeng Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Acceldiode of the basicsb sensor board.
 * 
 * @author David Gay
 */

#include "mts300.h"

generic configuration AccelYC()
{
  provides interface Read;
}
implementation {
  enum {
    ID = unique(UQ_ACCEL_RESOURCE)
  };
  
  components AccelReadP,AccelConfigP, new AdcReadClientC() as AdcY;

  Read = AccelReadP.ReadY[ID];
  AccelReadP.ActualY[ID] -> AdcY;
  AdcY.Atm128AdcConfig -> AccelConfigP.ConfigY;
}tinyos-2.1.2+dfsg/tos/sensorboards/mts300/AccelYStreamC.nc000066400000000000000000000016131207233610700232620ustar00rootroot00000000000000/* $Id: AccelYStreamC.nc,v 1.3 2007-03-14 04:57:35 pipeng Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * AccelXdiode of the basicsb sensor board.
 * 
 * @author David Gay
 */

#include "mts300.h"

generic configuration AccelYStreamC() {
  provides interface ReadStream;
}
implementation {
  enum {
    ID = unique(UQ_ACCEL_RESOURCE)
  };
  components AccelReadStreamP, AccelConfigP, new AdcReadStreamClientC();

  ReadStream = AccelReadStreamP.ReadStreamY[ID];
  AccelReadStreamP.ActualY[ID] -> AdcReadStreamClientC;
  AdcReadStreamClientC.Atm128AdcConfig -> AccelConfigP.ConfigY;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/ArbitratedPhotoDeviceP.nc000066400000000000000000000005201207233610700251720ustar00rootroot00000000000000configuration ArbitratedPhotoDeviceP
{
  provides interface Read[uint8_t client];
}
implementation
{
  components PhotoTempDeviceC,
    new ArbitratedReadC(uint16_t) as ArbitrateRead;

  Read = ArbitrateRead;
  ArbitrateRead.Service -> PhotoTempDeviceC.ReadPhoto;
  ArbitrateRead.Resource -> PhotoTempDeviceC.PhotoResource;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/ArbitratedTempDeviceP.nc000066400000000000000000000005151207233610700250120ustar00rootroot00000000000000configuration ArbitratedTempDeviceP
{
  provides interface Read[uint8_t client];
}
implementation
{
  components PhotoTempDeviceC,
    new ArbitratedReadC(uint16_t) as ArbitrateRead;

  Read = ArbitrateRead;
  ArbitrateRead.Service -> PhotoTempDeviceC.ReadTemp;
  ArbitrateRead.Resource -> PhotoTempDeviceC.TempResource;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/DemoSensorC.nc000066400000000000000000000011721207233610700230240ustar00rootroot00000000000000/* $Id: DemoSensorC.nc,v 1.3 2007-04-18 20:56:53 idgay Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Demo sensor for basicsb sensorboard.
 * 
 * @author David Gay
 */

generic configuration DemoSensorC() {
  provides interface Read;
}
implementation {
  components new PhotoC() as Sensor;

  Read = Sensor;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/DemoSensorStreamC.nc000066400000000000000000000012441207233610700242000ustar00rootroot00000000000000/* $Id: DemoSensorStreamC.nc,v 1.3 2007-04-18 20:56:54 idgay Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Demo sensor for basicsb sensorboard.
 * 
 * @author David Gay
 */

generic configuration DemoSensorStreamC() {
  provides interface ReadStream;
}
implementation {
  components new PhotoStreamC() as SensorStream;

  ReadStream = SensorStream;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/Mag.nc000066400000000000000000000062011207233610700213450ustar00rootroot00000000000000// $Id: Mag.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/*
 * Authors:             Alec Woo
 * Date lase modified:  8/20/02
 *
 * The MagSetting inteface provides an asynchronous mechanism for
 * setting the gain offset for the Magnetometer on the mica sensorboard.
 * This is particularly useful in calibrating the offset of the Magnetometer
 * such that X and Y axis can stay in the center for idle signals.  
 * If not calibrated, the data you get may rail.  (railing means
 * the data either stays at the maximum (~785) or minimum (~240)). 
 *
 * The gain adjust has 256 steps ranging from 0 to 255.
 *
 */

/**
 * @author Alec Woo
 */

interface Mag {
  /* Effects:  adjust pot setting on the X axis of the magnetometer.
   * Returns:  return SUCCESS of FAILED.
   */
  command error_t gainAdjustX(uint8_t val);

  /* Effects:  adjust pot setting on the Y axis of the magnetometer.
   * Returns:  return SUCCESS of FAILED.
   */
  command error_t gainAdjustY(uint8_t val);

  /* Pot adjustment on the X axis of the magnetometer is finished.
   */
  event void gainAdjustXDone(error_t result);

  /* Pot adjustment on the Y axis of the magnetometer is finished.
   */
  event void gainAdjustYDone(error_t result);
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MagConfigP.nc000066400000000000000000000026401207233610700226160ustar00rootroot00000000000000/* $Id: MagConfigP.nc,v 1.4 2008-06-11 00:42:14 razvanm Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Internal component for basicsb photodiode. Arbitrates access to the photo
 * diode and automatically turns it on or off based on user requests.
 *
 * @author Alif Chen
 */

#include "mts300.h"
#include "I2C.h"

configuration MagConfigP {
  provides {
    interface Mag;
    interface Resource[uint8_t client];
    interface Atm128AdcConfig as ConfigX;
    interface Atm128AdcConfig as ConfigY;
  }
}
implementation {
  components MagP, MicaBusC, new Atm128I2CMasterC() as I2CPot,
		new TimerMilliC() as WarmupTimer,
    new RoundRobinArbiterC(UQ_MAG_RESOURCE) as Arbiter,
    new SplitControlPowerManagerC() as PowerManager;

	Mag = MagP;

  Resource = Arbiter;
  ConfigX = MagP.ConfigX;
  ConfigY = MagP.ConfigY;

  PowerManager.ResourceDefaultOwner -> Arbiter;
  PowerManager.ArbiterInfo -> Arbiter;
  PowerManager.SplitControl -> MagP;

  MagP.I2CPacket -> I2CPot;
  MagP.I2CResource -> I2CPot;

  MagP.Timer -> WarmupTimer;
  MagP.MagPower -> MicaBusC.PW5;
  MagP.MagAdcX -> MicaBusC.Adc6;
  MagP.MagAdcY -> MicaBusC.Adc5;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MagP.nc000066400000000000000000000051271207233610700214730ustar00rootroot00000000000000#include "mts300.h"
#include "Timer.h"
#include "I2C.h"

module MagP
{
  provides interface SplitControl;
  provides interface Mag;
  provides interface Atm128AdcConfig as ConfigX;
  provides interface Atm128AdcConfig as ConfigY;

  uses interface Timer;
	uses interface GeneralIO as MagPower;
	uses interface MicaBusAdc as MagAdcX;
	uses interface MicaBusAdc as MagAdcY;
  uses interface I2CPacket;
  uses interface Resource as I2CResource;
}

implementation
{
  norace uint8_t gainData[2];

  command error_t SplitControl.start()
  {
    call MagPower.makeOutput();
    call MagPower.set();

    call Timer.startOneShot(100); 
    return SUCCESS;
  }

  event void Timer.fired() {
    signal SplitControl.startDone(SUCCESS);
  }

  command error_t SplitControl.stop()
  {
    call MagPower.clr();
    call MagPower.makeInput();

    signal SplitControl.stopDone(SUCCESS);
    return SUCCESS;
  }

  command error_t Mag.gainAdjustX(uint8_t val)
  {
    gainData[0] = 1;    // pot subaddr
    gainData[1] = val;  // value to write
    return call I2CResource.request();
  }
  command error_t Mag.gainAdjustY(uint8_t val)
  {
    gainData[0] = 0;    // pot subaddr
    gainData[1] = val;  // value to write
    return call I2CResource.request();
  }
  /**
  * Resource request
  *
  */
  event void I2CResource.granted()
  {
    if ( call I2CPacket.write(I2C_START|I2C_STOP,TOS_MAG_POT_ADDR, 2, gainData) == SUCCESS)
    {
      return ;
    }
  }
  /**
  * I2CPot2
  *
  */
  async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
  {
    return ;
  }

  task void signalAdjustDone()
  {
    if (gainData[0] == 1)
      signal Mag.gainAdjustXDone(gainData[1]);
    else
      signal Mag.gainAdjustYDone(gainData[1]);
  }

  async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
  {
    call I2CResource.release();

    gainData[1] = error;
    post signalAdjustDone();

    return;
  }

  async command uint8_t ConfigX.getChannel() {
    return call MagAdcX.getChannel();
  }

  async command uint8_t ConfigX.getRefVoltage() {
    return ATM128_ADC_VREF_OFF;
  }

  async command uint8_t ConfigX.getPrescaler() {
    return ATM128_ADC_PRESCALE;
  }

  async command uint8_t ConfigY.getChannel() {
    return call MagAdcY.getChannel();
  }

  async command uint8_t ConfigY.getRefVoltage() {
    return ATM128_ADC_VREF_OFF;
  }

  async command uint8_t ConfigY.getPrescaler() {
    return ATM128_ADC_PRESCALE;
  }

   default event void Mag.gainAdjustXDone(error_t result) { }
   default event void Mag.gainAdjustYDone(error_t result) { }
}tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MagReadP.nc000066400000000000000000000051301207233610700222610ustar00rootroot00000000000000// $Id: MagReadP.nc,v 1.4 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
 * 94704.  Attention:  Intel License Inquiry.
 */
#include "mts300.h"

configuration MagReadP 
{
  provides 
  {
    interface Mag;
    interface Read as MagX[uint8_t client];
    interface Read as MagY[uint8_t client];
  }
  uses
  {
    interface Read as ActualX[uint8_t client];
    interface Read as ActualY[uint8_t client];
  }
}
implementation
{
  components MagConfigP,
    new ArbitratedReadC(uint16_t) as AdcX,
    new ArbitratedReadC(uint16_t) as AdcY;

  Mag = MagConfigP;

  MagX = AdcX;
  AdcX.Resource -> MagConfigP;
  AdcX.Service = ActualX;

  MagY = AdcY;
  AdcY.Resource -> MagConfigP;
  AdcY.Service = ActualY;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MagReadStreamP.nc000066400000000000000000000054471207233610700234500ustar00rootroot00000000000000// $Id: MagReadStreamP.nc,v 1.4 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
 * 94704.  Attention:  Intel License Inquiry.
 */
#include "mts300.h"

configuration MagReadStreamP
{
  provides {
    interface Mag;
    interface ReadStream as ReadStreamX[uint8_t client];
    interface ReadStream as ReadStreamY[uint8_t client];
  }
  uses {
    interface ReadStream as ActualX[uint8_t client];
    interface ReadStream as ActualY[uint8_t client];
  }
}
implementation
{
  enum {
    NMAG_CLIENTS = uniqueCount(UQ_MAG_RESOURCE)
  };
  components MagConfigP,
    new ArbitratedReadStreamC(NMAG_CLIENTS, uint16_t) as MultiplexX,
    new ArbitratedReadStreamC(NMAG_CLIENTS, uint16_t) as MultiplexY;

  Mag = MagConfigP;

  ReadStreamX = MultiplexX;
  MultiplexX.Resource -> MagConfigP;
  MultiplexX.Service = ActualX;

  ReadStreamY = MultiplexY;
  MultiplexY.Resource -> MagConfigP;
  MultiplexY.Service = ActualY;
}tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MagXC.nc000066400000000000000000000014551207233610700216060ustar00rootroot00000000000000/* $Id: MagXC.nc,v 1.2 2008-06-11 00:42:14 razvanm Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * @author Alif Chen
 */

#include "mts300.h"

generic configuration MagXC()
{
  provides interface Mag;
  provides interface Read;
}
implementation {
  enum {
    ID = unique(UQ_MAG_RESOURCE)
  };
  
  components MagReadP,MagConfigP, new AdcReadClientC() as AdcX;

  Mag = MagReadP;

  Read = MagReadP.MagX[ID];
  MagReadP.ActualX[ID] -> AdcX;
  AdcX.Atm128AdcConfig -> MagConfigP.ConfigX;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MagXStreamC.nc000066400000000000000000000016051207233610700227570ustar00rootroot00000000000000/* $Id: MagXStreamC.nc,v 1.2 2008-06-11 00:42:14 razvanm Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * 
 * @author Alif Chen
 */

#include "mts300.h"

generic configuration MagXStreamC() {
  provides interface ReadStream;
  provides interface Mag;
}
implementation {
  enum {
    ID = unique(UQ_ACCEL_RESOURCE)
  };
  components MagReadStreamP, MagConfigP, new AdcReadStreamClientC();

  Mag = MagReadStreamP;

  ReadStream = MagReadStreamP.ReadStreamX[ID];
  MagReadStreamP.ActualX[ID] -> AdcReadStreamClientC;
  AdcReadStreamClientC.Atm128AdcConfig -> MagConfigP.ConfigX;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MagYC.nc000066400000000000000000000014551207233610700216070ustar00rootroot00000000000000/* $Id: MagYC.nc,v 1.2 2008-06-11 00:42:15 razvanm Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * @author Alif Chen
 */

#include "mts300.h"

generic configuration MagYC()
{
  provides interface Mag;
  provides interface Read;
}
implementation {
  enum {
    ID = unique(UQ_MAG_RESOURCE)
  };
  
  components MagReadP,MagConfigP, new AdcReadClientC() as AdcY;

  Mag = MagReadP;

  Read = MagReadP.MagY[ID];
  MagReadP.ActualY[ID] -> AdcY;
  AdcY.Atm128AdcConfig -> MagConfigP.ConfigY;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MagYStreamC.nc000066400000000000000000000016011207233610700227540ustar00rootroot00000000000000/* $Id: MagYStreamC.nc,v 1.2 2008-06-11 00:42:14 razvanm Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * @author Alif Chen
 */

#include "mts300.h"

generic configuration MagYStreamC() {
  provides interface ReadStream;
  provides interface Mag;
}
implementation {
  enum {
    ID = unique(UQ_ACCEL_RESOURCE)
  };
  components MagReadStreamP, MagConfigP, new AdcReadStreamClientC();

  Mag = MagReadStreamP;

  ReadStream = MagReadStreamP.ReadStreamY[ID];
  MagReadStreamP.ActualY[ID] -> AdcReadStreamClientC;
  AdcReadStreamClientC.Atm128AdcConfig -> MagConfigP.ConfigY;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MicC.nc000066400000000000000000000041111207233610700214520ustar00rootroot00000000000000/**
 *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
 *  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 /*
 *  @author Hu Siquan 
 *
 *  $Id: MicC.nc,v 1.4 2010-06-29 22:07:56 scipio Exp $
 */

#include "mts300.h"

generic configuration MicC() {
  provides interface Read;
  provides interface MicSetting;
}
implementation {
  enum {
    ID = unique(UQ_MIC_RESOURCE)
  };
  components MicReadP, MicDeviceP, new AdcReadClientC();

  Read = MicReadP.Read[ID];
  MicReadP.ActualRead[ID] -> AdcReadClientC;
  AdcReadClientC.Atm128AdcConfig -> MicDeviceP.Atm128AdcConfig;
  MicSetting = MicDeviceP;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MicDeviceP.nc000066400000000000000000000050461207233610700226170ustar00rootroot00000000000000/**
 *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
 *  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author Hu Siquan 
 *
 *  $Id: MicDeviceP.nc,v 1.2 2010-07-21 13:23:50 zkincses Exp $
 */

#include "mts300.h"
#include "I2C.h"
configuration MicDeviceP {
  provides {
    interface Resource[uint8_t client];
    interface Atm128AdcConfig;
    interface MicSetting;
  }
}
implementation {
  components MicP, MicaBusC, 
    new Atm128I2CMasterC() as I2CPot,
    new TimerMilliC() as WarmupTimer,
    new RoundRobinArbiterC(UQ_MIC_RESOURCE) as Arbiter,
    new SplitControlPowerManagerC() as PowerManager;

  Resource = Arbiter;
  Atm128AdcConfig = MicP;
  MicSetting = MicP;
	
  PowerManager.ResourceDefaultOwner -> Arbiter;
  PowerManager.ArbiterInfo -> Arbiter;
  PowerManager.SplitControl -> MicP;

  MicP.Timer -> WarmupTimer;
  MicP.MicPower  -> MicaBusC.PW3;
  MicP.MicMuxSel -> MicaBusC.PW6;
  MicP.InterruptPin -> MicaBusC.Int3;
  MicP.MicAdc -> MicaBusC.Adc2;
  MicP.I2CPacket -> I2CPot;
  MicP.I2CResource -> I2CPot;
  MicP.AlertInterrupt -> MicaBusC.Int3_Interrupt;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MicP.nc000066400000000000000000000121501207233610700214710ustar00rootroot00000000000000/**
 *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
 *  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author Hu Siquan  
 *
 *  $Id: MicP.nc,v 1.4 2010-07-21 13:23:51 zkincses Exp $
 */

#include "Timer.h"
#include "I2C.h"

// The MTS300 does not have an external pullup resistor for I2C
#if !defined(ATM128_I2C_EXTERNAL_PULLDOWN) || !(ATM128_I2C_EXTERNAL_PULLDOWN)
#error You must set ATM128_I2C_EXTERNAL_PULLDOWN=1
#endif

module MicP
{
  provides interface SplitControl;
  provides interface MicSetting;
  provides interface Atm128AdcConfig as MicAtm128AdcConfig;

  uses interface Timer;
  uses interface GeneralIO as MicPower;
  uses interface GeneralIO as MicMuxSel;
  uses interface GeneralIO as InterruptPin;
  uses interface MicaBusAdc as MicAdc;
  uses interface I2CPacket;
  uses interface Resource as I2CResource;
  uses interface GpioInterrupt as AlertInterrupt;
	
}
implementation 
{
  uint8_t gainData[2];
  uint8_t lastGain = 64;

  
  command error_t SplitControl.start()
  {
    call AlertInterrupt.disable();
    call MicPower.makeOutput();
    call MicPower.set();
    call MicMuxSel.makeOutput();    
    call MicMuxSel.clr();
		
    call MicSetting.muxSel(1);  // Set the mux so that raw microhpone output is selected
    call MicSetting.gainAdjust(lastGain);  // Set the gain of the microphone.

    call Timer.startOneShot(1200); 
    return SUCCESS;
  }

  event void Timer.fired() {
    signal SplitControl.startDone(SUCCESS);
  }
  
  command error_t SplitControl.stop()
  {
    call AlertInterrupt.disable();
    call MicPower.clr();
    call MicPower.makeInput();

    signal SplitControl.stopDone(SUCCESS);
    return SUCCESS;
  }
  
  /**
   * Resource request
   * 
   */  
  event void I2CResource.granted()
  {
    call I2CPacket.write(I2C_START|I2C_STOP,TOS_MIC_POT_ADDR, 2, gainData);
  }

  /**
   * mic control
   * 
   */  
  command error_t MicSetting.muxSel(uint8_t sel)
  {
    if (sel == 0)
    {
      call MicMuxSel.clr();
      return SUCCESS;
    }
    else if (sel == 1)
    {
      call MicMuxSel.set();
      return SUCCESS;
    }
    return FAIL;
  }
  
  command error_t MicSetting.startMic(){
    call MicPower.makeOutput();
    call MicPower.set();
	return SUCCESS;
  }
  
  command error_t MicSetting.stopMic(){
	call MicPower.makeOutput();
    call MicPower.clr();
	return SUCCESS;
  }
  
  command error_t MicSetting.gainAdjust(uint8_t val)
  {
    lastGain = val;
    gainData[0] = 0;    // pot subaddr
    gainData[1] = val;  // value to write
    return call I2CResource.request();
  }
  
  command uint8_t MicSetting.readToneDetector()
  {
    bool bVal = call InterruptPin.get();
    return bVal ? 1 : 0;
  }
  
  /**
   * mic interrupt control
   */
  async command error_t MicSetting.enable()
  {
    call AlertInterrupt.enableFallingEdge();
    return SUCCESS;
  }
  
  async command error_t MicSetting.disable()
  {
    call AlertInterrupt.disable();
    return SUCCESS;
  }

  default async event error_t MicSetting.toneDetected()
  {
    return SUCCESS;
  }
  
  async event void AlertInterrupt.fired()
  {
    signal MicSetting.toneDetected();
  }
  
  async command uint8_t MicAtm128AdcConfig.getChannel() 
  {
    return call MicAdc.getChannel();
  }
  
  async command uint8_t MicAtm128AdcConfig.getRefVoltage() 
  {
    return ATM128_ADC_VREF_OFF;
  }
  
  async command uint8_t MicAtm128AdcConfig.getPrescaler() 
  {
    return ATM128_ADC_PRESCALE;
  }
  
  async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
  {
  }
  
  async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
  {
    call I2CResource.release();
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MicReadP.nc000066400000000000000000000005431207233610700222700ustar00rootroot00000000000000configuration MicReadP
{
  provides 
  {
    interface Read[uint8_t client];
  }
  uses
  {
    interface Read as ActualRead[uint8_t client];
  }
}
implementation
{
  components MicDeviceP,
  new ArbitratedReadC(uint16_t);

  Read = ArbitratedReadC;
  ArbitratedReadC.Resource -> MicDeviceP;
  ArbitratedReadC.Service = ActualRead;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MicReadStreamP.nc000066400000000000000000000010251207233610700234400ustar00rootroot00000000000000configuration MicReadStreamP
{
  provides 
  {
    interface MicSetting;
    interface ReadStream[uint8_t client];
  }
  uses
  {
    interface ReadStream as ActualRead[uint8_t client];
  }
}
implementation
{
  enum {
    NMIC_CLIENTS = uniqueCount(UQ_MIC_RESOURCE)
  };
  components MicDeviceP,
  new ArbitratedReadStreamC(NMIC_CLIENTS, uint16_t);

  MicSetting = MicDeviceP;

  ReadStream = ArbitratedReadStreamC;
  ArbitratedReadStreamC.Resource -> MicDeviceP;
  ArbitratedReadStreamC.Service = ActualRead;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MicSetting.nc000066400000000000000000000103401207233610700227060ustar00rootroot00000000000000// $Id: MicSetting.nc,v 1.1 2010-07-21 13:23:51 zkincses Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/*
 * Authors:		Alec Woo
 * Date last modified:  8/20/02
 * 
 * The microphone on the mica sensor board has two methods for control and
 * one method to read the binary output of the tone detector.  (Note:  The tone
 * detector's binary output can be configured as an interrupt.  Please see MicInterrupt.ti)
 *
 * muxSel allows users to switch the ADC to sample from phase lock loop output of
 * the tone detector (by setting the value to 0 (default))  or the raw voice-band output 
 * of the micrphone (by setting the value to 1).
 *
 * gainAdjust allows users to adjust the amplification gain on the microphone. The range
 * is 0 to 255 with 0 being the minmum and 255 being the maximum amplification.  Note that
 * setting amplification too high can result in clipping (signal distortion).
 *
 * If an audio signal at 4.3kHz is picked up by the microphone, the tone
 * detect will decode it and generate a binary ouput (0 meaning tone is detected, 1 meaning
 * tone is not detected).  Users can read this output simply by calling readToneDetector().
 */

/**
 * @author Alec Woo
 */

interface MicSetting {
  /* Effect:  Set the multiplexer's setting on the microphone
   * Return:  returns SUCCESS or FAIL
   */
  command error_t muxSel(uint8_t sel);

  /* Effect:  Set the amplificatoin gain  on the microphone
   * Return:  returns SUCCESS or FAIL
   */
  command error_t gainAdjust(uint8_t val);

   /* Effect:  Power on the microphone
   * Return:  returns SUCCESS or FAIL
   */
  command error_t startMic();

   /* Effect:  Power off the microphone
   * Return:  returns SUCCESS or FAIL
   */
  command error_t stopMic();

  /* Effect:  returns the binary tone detector's output
   * Return:  0 meaning tone is detected, 1 meanning tone is not detected
   */
  command uint8_t readToneDetector();

  /* Effects: disable interrupts
     Returns: SUCCESS
  */
  async command error_t disable();

  /* Effects: enable interrupts
     Returns: SUCCESS
  */
  async command error_t enable();

  /* Interrupt signal for tone detected.  Note that MicInterrupt is automatically disabled
   * before this event is signaled.  (Upper layer needs to reenable this interrupt for future
   * tone detect.
   *
   *  Returns: SUCCESS
   */
  async event error_t toneDetected();
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/MicStreamC.nc000066400000000000000000000042171207233610700226350ustar00rootroot00000000000000/**
 *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
 *  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 /*
 *  @author Hu Siquan 
 *
 *  $Id: MicStreamC.nc,v 1.3 2010-06-29 22:07:56 scipio Exp $
 */

#include "mts300.h"

generic configuration MicStreamC() {
  provides interface ReadStream;
  provides interface MicSetting;
}
implementation {
  enum {
    ID = unique(UQ_MIC_RESOURCE)
  };
  components MicReadStreamP, MicDeviceP, new AdcReadStreamClientC();

  ReadStream = MicReadStreamP.ReadStream[ID];
  MicReadStreamP.ActualRead[ID] -> AdcReadStreamClientC;
  AdcReadStreamClientC.Atm128AdcConfig -> MicDeviceP.Atm128AdcConfig;
  MicSetting = MicReadStreamP;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/Mts300Sounder.nc000066400000000000000000000001021207233610700231610ustar00rootroot00000000000000interface Mts300Sounder
{
  command void beep(uint16_t length);
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/PhotoC.nc000066400000000000000000000012701207233610700220360ustar00rootroot00000000000000/* $Id: PhotoC.nc,v 1.4 2007-03-14 04:14:13 pipeng Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Photodiode of the mts300 sensor board.
 * 
 * @author David Gay
 */

#include "mts300.h"

generic configuration PhotoC() {
  provides interface Read;
}
implementation {
  components ArbitratedPhotoDeviceP;

  Read = ArbitratedPhotoDeviceP.Read[unique(UQ_PHOTO_RESOURCE)];
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/PhotoTempControlP.nc000066400000000000000000000023741207233610700242500ustar00rootroot00000000000000generic module PhotoTempControlP()
{
  provides {
    interface SplitControl;
    interface Read[uint8_t client];
  }
  uses {
    interface Resource as PhotoTempResource;
    interface Timer;
    interface GeneralIO as Power;
    interface Read as ActualRead;
  }
}
implementation
{
  command error_t SplitControl.start() {
    call PhotoTempResource.request();
    return SUCCESS;
  }

  event void PhotoTempResource.granted() {
    call Power.makeOutput();
    call Power.set();
    call Timer.startOneShot(10);
  }

  event void Timer.fired() {
    if (call PhotoTempResource.isOwner())
      signal SplitControl.startDone(SUCCESS);
  }

  task void stopDone() {
    call PhotoTempResource.release();
    signal SplitControl.stopDone(SUCCESS);
  }

  command error_t SplitControl.stop() {
    call Power.clr();
    call Power.makeInput();
    post stopDone();
    return SUCCESS;
  }

  uint8_t id;

  command error_t Read.read[uint8_t client]() {
    id = client;
    return call ActualRead.read();
  }

  event void ActualRead.readDone(error_t result, uint16_t val) {
    if (call PhotoTempResource.isOwner())
      signal Read.readDone[id](result, val);
  }

  default event void Read.readDone[uint8_t x](error_t result, uint16_t val) { }
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/PhotoTempDeviceC.nc000066400000000000000000000035721207233610700240130ustar00rootroot00000000000000#include "mts300.h"

configuration PhotoTempDeviceC
{
  provides interface Resource as PhotoResource[uint8_t client];
  provides interface Resource as TempResource[uint8_t client];
  provides interface Read as ReadPhoto[uint8_t client];
  provides interface Read as ReadTemp[uint8_t client];
}
implementation
{
  components MicaBusC, PhotoTempP,
    new RoundRobinArbiterC(UQ_PHOTOTEMP_RESOURCE) as SharingArbiter,
    new RoundRobinArbiterC(UQ_PHOTO_RESOURCE) as PhotoArbiter,
    new RoundRobinArbiterC(UQ_TEMP_RESOURCE) as TempArbiter,
    new SplitControlPowerManagerC() as PhotoPower,
    new SplitControlPowerManagerC() as TempPower,
    new PhotoTempControlP() as PhotoControl,
    new PhotoTempControlP() as TempControl,
    new TimerMilliC() as WarmupTimer,
    new AdcReadClientC() as Adc;

  PhotoResource = PhotoArbiter;
  PhotoPower.ResourceDefaultOwner -> PhotoArbiter;
  PhotoPower.ArbiterInfo -> PhotoArbiter;
  PhotoPower.SplitControl -> PhotoControl;
  PhotoControl.PhotoTempResource -> SharingArbiter.Resource[unique(UQ_PHOTOTEMP_RESOURCE)];
  PhotoControl.Timer -> WarmupTimer;
  PhotoControl.Power -> MicaBusC.Int1;
  ReadPhoto = PhotoControl;
  PhotoControl.ActualRead -> Adc;

  TempResource = TempArbiter;
  TempPower.ResourceDefaultOwner -> TempArbiter;
  TempPower.ArbiterInfo -> TempArbiter;
  TempPower.SplitControl -> TempControl;
  TempControl.PhotoTempResource -> SharingArbiter.Resource[unique(UQ_PHOTOTEMP_RESOURCE)];
  TempControl.Timer -> WarmupTimer;
#if defined(MTS300CA) || defined(MTS310CA)
  TempControl.Power -> MicaBusC.Int2;
#elif defined(MTS300CB) | defined(MTS310CB)
  TempControl.Power -> MicaBusC.PW0;
#else
#error "Please define your sensorboard revision: MTS300CA, MTS300CB, MTS310CA, MTS310CB"
#endif
  ReadTemp = TempControl;
  TempControl.ActualRead -> Adc;

  Adc.Atm128AdcConfig -> PhotoTempP;
  PhotoTempP.PhotoTempAdc -> MicaBusC.Adc1;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/PhotoTempP.nc000066400000000000000000000016401207233610700227020ustar00rootroot00000000000000/* $Id: PhotoTempP.nc,v 1.4 2007-03-14 04:14:13 pipeng Exp $
 * Copyright (c) 2007 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * MTS300 photo and temp sensor ADC configuration.
 * @author David Gay 
 */
module PhotoTempP
{
  provides interface Atm128AdcConfig;
  uses interface MicaBusAdc as PhotoTempAdc;
}
implementation
{
  async command uint8_t Atm128AdcConfig.getChannel() {
    return call PhotoTempAdc.getChannel();
  }

  async command uint8_t Atm128AdcConfig.getRefVoltage() {
    return ATM128_ADC_VREF_OFF;
  }

  async command uint8_t Atm128AdcConfig.getPrescaler() {
    return ATM128_ADC_PRESCALE;
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/SensorMts300C.nc000066400000000000000000000053501207233610700231300ustar00rootroot00000000000000/**
 *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
 *  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  @author Martin Turon 
 *  @author Hu Siquan 
 *
 *  $Id: SensorMts300C.nc,v 1.9 2010-06-29 22:07:56 scipio Exp $
 */

//configuration SensorMts300C
generic configuration SensorMts300C()
{
  provides
  {
   	interface Mts300Sounder as Sounder; //!< sounder
   	interface Read as Vref; //!< voltage
   	interface Read as Temp; //!< Thermister
  	interface Read as Light; //!< Photo sensor
   	interface Read as Microphone; //!< Mic sensor
  	interface Read as AccelX; //!< Accelerometer sensor
   	interface Read as AccelY; //!< Accelerometer sensor
   	interface Read as MagX; //!< magnetometer sensor
   	interface Read as MagY; //!< magnetometer sensor
  }
}
implementation
{
    components SounderC,
    new VoltageC(),
    new AccelXC(),
    new AccelYC(),
    new PhotoC(),
    new TempC(),
    new MicC(),
    new MagXC(),
    new MagYC();

    Sounder    = SounderC;
    Vref       = VoltageC;
    Temp       = TempC;
    Light      = PhotoC;
    Microphone = MicC;
    AccelX     = AccelXC;
    AccelY     = AccelYC;
    MagX       = MagXC;
    MagY       = MagYC;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/SounderC.nc000066400000000000000000000003531207233610700223650ustar00rootroot00000000000000configuration SounderC
{
  provides interface Mts300Sounder;
}
implementation
{
  components SounderP, new TimerMilliC(), MicaBusC;

  Mts300Sounder = SounderP;
  SounderP.Timer -> TimerMilliC;
  SounderP.SounderPin -> MicaBusC.PW2;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/SounderP.nc000066400000000000000000000012611207233610700224010ustar00rootroot00000000000000module SounderP
{
  provides interface Mts300Sounder;
  uses {
    interface Timer;
    interface GeneralIO as SounderPin;
  }
}
implementation
{
  command void Mts300Sounder.beep(uint16_t length) {
    if (call Timer.isRunning())
      {
	uint32_t remaining = call Timer.getdt(),
	  elapsed = call Timer.getNow() - call Timer.gett0();

	/* If more time left than we are requesting, just exit */
	if (remaining > elapsed && (remaining - elapsed) > length)
	  return;

	/* Override timer with new duration */
      }
    call Timer.startOneShot(length);
    call SounderPin.makeOutput();
    call SounderPin.set();
  }

  event void Timer.fired() {
    call SounderPin.clr();
  }
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/TempC.nc000066400000000000000000000012641207233610700216550ustar00rootroot00000000000000/* $Id: TempC.nc,v 1.4 2008-06-11 00:42:15 razvanm Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Photodiode of the mts300 sensor board.
 * 
 * @author David Gay
 */

#include "mts300.h"

generic configuration TempC() {
  provides interface Read;
}
implementation {
  components ArbitratedTempDeviceP;

  Read = ArbitratedTempDeviceP.Read[unique(UQ_TEMP_RESOURCE)];
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts300/mts300.h000066400000000000000000000044751207233610700215310ustar00rootroot00000000000000/* $Id: mts300.h,v 1.6 2010-06-29 22:07:56 scipio Exp $ */
/*
 * Copyright (c) 2005-2006 Crossbow Technology, Inc.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of Crossbow Technology nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 * 
 * @author Hu Siquan 
 * Revision: $Revision: 1.6 $
 *
 */

#ifndef _MTS300_H
#define _MTS300_H

// sounder enable (1) /disable (0)
#ifndef SOUNDER
#define SOUNDER 1
#endif

#define UQ_ACCEL_RESOURCE "mts300.accel"
#define UQ_PHOTO_RESOURCE "mts300.photo"
#define UQ_TEMP_RESOURCE "mts300.temp"
#define UQ_PHOTOTEMP_RESOURCE "mts300.phototemp"
#define UQ_MIC_RESOURCE "mts300.microphone"
#define UQ_MAG_RESOURCE "mts300.mag"

enum
{
  TOS_MIC_POT_ADDR = 0x2D,
  TOS_MAG_POT_ADDR = 0x2C,
};

// debug leds
//#define _DEBUG_LEDS
#ifdef _DEBUG_LEDS
#define DEBUG_LEDS(X)         X.DebugLeds -> LedsC
#else
#define DEBUG_LEDS(X)         X.DebugLeds -> NoLedsC
#endif
#endif /* _MTS300_H */

tinyos-2.1.2+dfsg/tos/sensorboards/mts400/000077500000000000000000000000001207233610700203215ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/sensorboards/mts400/.sensor000066400000000000000000000000541207233610700216320ustar00rootroot00000000000000
push( @includes, qw(
  %T/chips/sht11
) );
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Accel202.h000066400000000000000000000031741207233610700217320ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#ifndef ACCEL202_H
#define ACCEL202_H

#define UQ_ACCEL202 "Accel202.Resource"

#endif
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Accel202C.nc000066400000000000000000000041751207233610700222100ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#include "Accel202.h"

generic configuration Accel202C() {
	provides interface Read as X_Axis;
	provides interface Read as Y_Axis;
}
implementation {
	components new Accel202ReaderP();
	
	X_Axis = Accel202ReaderP.X_Axis;
	Y_Axis = Accel202ReaderP.Y_Axis;
	
	components HalAccel202C;
	
	enum {	X_KEY = unique(UQ_ACCEL202)};
	enum {	Y_KEY = unique(UQ_ACCEL202)};
	
	Accel202ReaderP.X_Resoure -> HalAccel202C.Resource[ X_KEY ];
	Accel202ReaderP.XRead -> HalAccel202C.XAxis;
	Accel202ReaderP.Y_Resoure -> HalAccel202C.Resource[ Y_KEY];
	Accel202ReaderP.YRead -> HalAccel202C.YAxis;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Accel202LogicP.nc000066400000000000000000000056511207233610700232030ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

generic module Accel202LogicP()
{
	provides interface Read as XAxis;
	provides interface Read as YAxis;
	uses interface Resource;
	uses interface Atm128AdcSingle;
	uses interface MicaBusAdc as XADC;
	uses interface MicaBusAdc as YADC;
}
implementation
{
	enum{
		ADCX=1,
		ADCY,
	};

	task void read();
	task void failTask();
	
	error_t performCommand(uint8_t);
	
	uint8_t cmd,readData;

	command error_t XAxis.read() {
		return performCommand(ADCX);
	}
	  
	command error_t YAxis.read() {
		return performCommand(ADCY);
	}

	error_t performCommand(uint8_t Command) {
		cmd=Command;
		return call Resource.request(); 
    }
    
    event void Resource.granted(){
		if(cmd==ADCX){
			call Atm128AdcSingle.getData(call XADC.getChannel(),ATM128_ADC_VREF_OFF,FALSE,ATM128_ADC_PRESCALE);
		}else {
			call Atm128AdcSingle.getData(call YADC.getChannel(),ATM128_ADC_VREF_OFF,FALSE,ATM128_ADC_PRESCALE);
		}	
	}
	
	async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise){
		call Resource.release();
		if (precise){
			atomic readData=data;
			post read();
		}else {
			post failTask();
		}
	}
	
	task void read(){
		atomic{
			if(cmd==ADCX){
				signal XAxis.readDone(SUCCESS,readData);
			}else {
				signal YAxis.readDone(SUCCESS,readData);
			}
		}
	}
	
	task void failTask(){
		if(cmd==ADCX){
			signal XAxis.readDone(FAIL,0);
		}else{
			signal YAxis.readDone(FAIL,0);
		}
	}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Accel202ReaderP.nc000066400000000000000000000053561207233610700233520ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

generic module Accel202ReaderP()
{
	provides interface Read as X_Axis;
	provides interface Read as Y_Axis;

	uses interface Resource as X_Resoure;
	uses interface Resource as Y_Resoure;
	uses interface Read as XRead;
	uses interface Read as YRead;
}
implementation
{
	command error_t X_Axis.read() {
		return call X_Resoure.request();
	}

	event void X_Resoure.granted() {
		error_t result;
		if ((result = call XRead.read()) != SUCCESS) {
			call X_Resoure.release();
			signal X_Axis.readDone( result, 0 );
		}
	}

	event void XRead.readDone( error_t result, uint16_t val ) {
		call X_Resoure.release();
		signal X_Axis.readDone( result, val );
	}

	command error_t Y_Axis.read() {
		return call Y_Resoure.request();
	}

	event void Y_Resoure.granted() {
		error_t result;
		if ((result = call YRead.read()) != SUCCESS) {
			call Y_Resoure.release();
			signal Y_Axis.readDone( result, 0 );
		}
	}

	event void YRead.readDone( error_t result, uint16_t val ) {
		call Y_Resoure.release();
		signal Y_Axis.readDone( result, val );
	}
	
	default event void X_Axis.readDone( error_t result, uint16_t val ) { }
  	default event void Y_Axis.readDone( error_t result, uint16_t val ) { }	
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Adg715.h000066400000000000000000000042511207233610700214240ustar00rootroot00000000000000/*
 * Copyright (c) 2008 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Rincon Research Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 * 
 * @author Danny Park
 */

#ifndef ADG715_H
#define ADG715_H

/**
 * enum is used instead of #ifndef/#define/#endif becuase these relate
 * to the hardware being written for and will not change unless the
 * hardware design is change which would require a new version of the
 * driver anyway.
 */
enum {
  ADG715_BASE_ADDR = 0x48, //binary 1001000
  ADG715_PIN_A0_HIGH = 0x01,//binary 00000001
  ADG715_PIN_A1_HIGH = 0x02,//binary 00000010
  ADG715_CMD_LEN = 1,
  ADG715_CH_MIN = 1,
  ADG715_CH_MAX = 8,
  ADG715_CH_OPEN = 1,
  ADG715_CH_CLOSE = 0,
};

#define UQ_ADG715 "Adg715.Resource"


#endif //ADG715_H
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Adg715C.nc000066400000000000000000000115311207233610700216770ustar00rootroot00000000000000/*
 * Copyright (c) 2008 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Rincon Research Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * The adg715 chip has 8 channels that are controlled through the I2C
 * bus.  This configuration provides 8 Channel interfaces corresponding
 * to the 8 physical channels on the chip.  This implementation is
 * specific to the mts420CA sensorboard and the adg715 that connects
 * the communication wires.
 * 
 * @author Danny Park
 */
 
#include"Adg715.h" 
 
configuration Adg715C {
	provides {
		/** Connects UART_TXD to GPS_RX */
		//interface Channel as ChannelGpsRx;

		/** Connects Accel_X to ADC1 */
		interface Channel as ChannelAccel_X;

		/** Connects UART_RXD to GPS_TX */
		//interface Channel as ChannelGpsTx;

		/** Connects Accel_Y to ADC2  */
		interface Channel as ChannelAccel_Y;

		/** Connects UART_CLK to Pressure_SCLK */
		/** Connects Pressure_SCLK to FLASH_CLK*/
		interface Channel as ChannelPressureClock;

		/** Connects UART_TX to Pressure_DOUT */
		/** Connects Pressure_DIN to FLASH_SI  */
		interface Channel as ChannelPressureDin;

		/** Connects UART_RX to Pressure_DIN */
		/** Connects Pressure_DOUT to FLASH_SO */
		interface Channel as ChannelPressureDout;

		/** Pins not connected for channel 6 on this chip */
		//interface Channel as Channel6CommNull;

		/** Connects Thermopile_Select_Cnt to GND */    
		interface Channel as ChannelThermopile_Select_Cnt;

		/** Connects PW3 to Humidity_SCK */
		interface Channel as ChannelHumidityClock;

		/** Connects INT3 to Humidity_DATA */
		interface Channel as ChannelHumidityData;
		
		/** Connects VCC to Light_Power */
		interface Channel as ChannelLightPower;
    
		/** Pins not connected for channel 2 on this chip  */
		interface Channel as Channel2PowerNull;
    
		/** Connects VCC to Pressure_Power */
		interface Channel as ChannelPressurePower;
    
		/** Connects VCC to Humidity_Power */
		interface Channel as ChannelHumidityPower;
	
		/** Connects VCC to EEPROM_Power */
		interface Channel as ChannelEepromPower;
    
		/** Connects VCC to Accel_Power */
		interface Channel as ChannelAccelPower;
    
		/** Connect 33VDCDCBOOST to GND (switch on)*/
		interface Channel as DcDcBoost33Channel;
		/** Connects VCC to GPS_PWR */
		//interface Channel as ChannelGpsPower;
	
		/** Connect 5VDCDCBOOST_SHUTDOWN to GND (switch on)*/
		interface Channel as DcDcBoost5Channel;
		/** Connects VCC to GPS_ENA */
		//interface Channel as ChannelGpsEnable;
	
		interface Resource[ uint8_t id ];
	}
}
implementation {
	components new FcfsArbiterC( UQ_ADG715 );
	Resource = FcfsArbiterC;
	components new HplAdg715C(FALSE, TRUE) as Comm;
	ChannelAccel_X       = Comm.Channel1;
	ChannelAccel_Y       = Comm.Channel2;
	ChannelPressureClock = Comm.Channel3;
	ChannelPressureDin   = Comm.Channel4;
	ChannelPressureDout  = Comm.Channel5;
//	Channel6CommNull     = Comm.Channel6;
	ChannelThermopile_Select_Cnt = Comm.Channel6;
	ChannelHumidityClock = Comm.Channel7;
	ChannelHumidityData  = Comm.Channel8;
	components new HplAdg715C(FALSE, FALSE) as Power;
	ChannelLightPower    = Power.Channel1;
	Channel2PowerNull    = Power.Channel2;
	ChannelPressurePower = Power.Channel3;
	ChannelHumidityPower = Power.Channel4;
	ChannelEepromPower   = Power.Channel5;
	ChannelAccelPower    = Power.Channel6;
	DcDcBoost33Channel  = Power.Channel7;
//	ChannelGpsEnable     = Power.Channel8;
	DcDcBoost5Channel   = Power.Channel8;
//	ChannelGpsPower      = Power.Channel7;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Adg715ControlC.nc000066400000000000000000000055311207233610700232430ustar00rootroot00000000000000/*
 * Copyright (c) 2008 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Rincon Research Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * The adg715 chip has 8 channels that are controlled through the I2C
 * bus.  This configuration provides 8 Channel interfaces corresponding
 * to the 8 physical channels on the chip.  The I2C bus needs to be
 * wired to this configuration through the I2CPacket and Resource
 * interfaces.
 * 
 * @author Danny Park
 */

generic configuration Adg715ControlC(bool pinA1High, bool pinA2High) {
	provides {
		interface Channel as Channel1;
		interface Channel as Channel2;
		interface Channel as Channel3;
		interface Channel as Channel4;
		interface Channel as Channel5;
		interface Channel as Channel6;
		interface Channel as Channel7;
		interface Channel as Channel8;
	}
  
	uses {
		interface I2CPacket;
		interface Resource;
	}
}
implementation {
	components new Adg715ControlP(pinA1High, pinA2High), MainC;
	components LedsC;
  
	Channel1 = Adg715ControlP.Channel[1];
	Channel2 = Adg715ControlP.Channel[2];
	Channel3 = Adg715ControlP.Channel[3];
	Channel4 = Adg715ControlP.Channel[4];
	Channel5 = Adg715ControlP.Channel[5];
	Channel6 = Adg715ControlP.Channel[6];
	Channel7 = Adg715ControlP.Channel[7];
	Channel8 = Adg715ControlP.Channel[8];
	I2CPacket = Adg715ControlP;
	Resource = Adg715ControlP;
	Adg715ControlP.Leds->LedsC;
	MainC.SoftwareInit -> Adg715ControlP.Init;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Adg715ControlP.nc000066400000000000000000000162501207233610700232600ustar00rootroot00000000000000/*
 * Copyright (c) 2008 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Rincon Research Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * The adg715 hardware provides 8 channels which are controlled using
 * an I2C interface.  The channels here are provided using a
 * parameterized interface but are checked for being out of bounds
 * (ADG715_CH_MIN and ADG715_CH_MAX from the header file).
 * The channels can only be controlled one at a time and they will
 * be controlled through the I2CPacket interface which is used by
 * this module.
 * 
 * @author Danny Park
 */

#include 
#include "Adg715.h"

generic module Adg715ControlP(bool pinA1High, bool pinA0High) {
	uses {
		interface I2CPacket;
		interface Resource;
		interface Leds;
	}
		provides {
		interface Channel[uint8_t channel];
		interface Init;
	}
}
implementation {
	/**************** Global Variables ****************/
	/** TRUE if this module is busy and cannot accept another command */
	bool busy;
	/** In process of opening a channel if TRUE and busy is TRUE */
	bool opening;
	/** In process of closing a channel if TRUE and busy is TRUE */
	bool closing;
	/** Setting of previous command or command currently in process */
	uint8_t mySetting;
	/** Current channel being set if busy is TRUE */
	uint8_t currentChannel;
	/** I2C address that is set based on compile time parameters */
	uint16_t myAddress;
	/**************** Prototypes ****************/
	task void successTask();
	task void failTask();
	/**************** Init Interface Commands ****************/
	/**
	* Initialization command that fires once during boot up.
	*/
	command error_t Init.init() {
		if(pinA1High && pinA0High) {
			myAddress = ADG715_BASE_ADDR | ADG715_PIN_A1_HIGH | ADG715_PIN_A0_HIGH;
		} else if(pinA1High) {
			myAddress = ADG715_BASE_ADDR | ADG715_PIN_A1_HIGH;
		} else if(pinA0High) {
			myAddress = ADG715_BASE_ADDR | ADG715_PIN_A0_HIGH;
		} else {
			myAddress = ADG715_BASE_ADDR;
		}    
		mySetting = 0x00;
		busy = FALSE;
		opening = FALSE;
		closing = FALSE;
		return SUCCESS;
	}
  
	/**************** Channel Interface Commands ****************/
	/**
	* Starts the opening of the given channel or returns an error.
	* If SUCCESS is returned then an openDone event will be signalled.
	* 
	* @param channel The channel to be opened (limited between
	*   ADG715_CH_MIN and ADG715_CH_MAX).
	*/
	command error_t Channel.open[uint8_t channel]() {
		if(channel > ADG715_CH_MAX || channel < ADG715_CH_MIN) {
			return ESIZE;
		} else if(busy) {
			return EBUSY;
		} else {
			busy = TRUE;
			opening = TRUE;
			currentChannel = channel;
			mySetting |= ADG715_CH_OPEN << (channel - 1);
			call Resource.request();
			return SUCCESS;
		}
	}
  
	/**
	* Starts the closing of the given channel or returns an error.
	* If SUCCESS is returned then a closeDone event will be signalled.
	* 
	* @param channel The channel to be closed (limited between
	*   ADG715_CH_MIN and ADG715_CH_MAX).
	*/
	command error_t Channel.close[uint8_t channel]() {
		if(channel > ADG715_CH_MAX || channel < ADG715_CH_MIN) {
			return ESIZE;
		} else if(busy) {
			return EBUSY;
		} else {
			busy = TRUE;
			closing = TRUE;
			currentChannel = channel;
//			mySetting &= ADG715_CH_CLOSE << (channel - 1);
			mySetting ^= ADG715_CH_OPEN << (channel - 1);
			call Resource.request();
			return SUCCESS;
		}
	}
  
	/**
	* Open status of the given channel.
	* 
	* @param channel The channel to be closed (limited between
	*   ADG715_CH_MIN and ADG715_CH_MAX).
	* @return TRUE if the given channel is open, FALSE otherwise.
	*/
	command bool Channel.isOpen[uint8_t channel]() {
		return ((mySetting >> (channel - 1)) & ADG715_CH_OPEN)== ADG715_CH_OPEN;
	}
  
	/**************** Resource Interface Events ****************/
	/**
	* Signalled when the I2CBus is available for use.
	*/
	event void Resource.granted() {
		call I2CPacket.write(I2C_START|I2C_STOP, myAddress, ADG715_CMD_LEN, &mySetting);
	}
  
	/**************** I2CPacket Interface Events ****************/
	async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) {}

	async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) {
		if(addr == myAddress) {
			if(length == ADG715_CMD_LEN && data == &mySetting) {
				call  Resource.release();	
				if(error == SUCCESS){
					post successTask();
				} else {
					post failTask();
				}
			}
		}
	}
	/**************** Local Tasks ****************/
	task void successTask() {
		if(busy) {
			/**
			* If busy is not released before signalling a *Done() event
			* then a serial call of open/close channels on the same
			* chip will fail with EBUSY.
			*/
			busy = FALSE;
			if(opening) {
				opening = FALSE;
				if(((mySetting >> (currentChannel - 1)) & ADG715_CH_OPEN)== ADG715_CH_OPEN) {
					signal Channel.openDone[currentChannel](SUCCESS);
				} else {
					signal Channel.openDone[currentChannel](FAIL);
				}
			} else if(closing) {
				closing = FALSE;
				if(((mySetting >> (currentChannel - 1)) & ADG715_CH_OPEN)== ADG715_CH_CLOSE) {
					signal Channel.closeDone[currentChannel](SUCCESS);
				} else {
					signal Channel.closeDone[currentChannel](FAIL);
				}
			} 
		}
	}
  
	task void failTask() {
		if(busy) {
			/**
			* If busy is not released before signalling a *Done() event
			* then a serial call of open/close channels on the same
			* chip will fail with EBUSY.
			*/
			busy = FALSE;
			if(opening) {
				opening = FALSE;
				signal Channel.openDone[currentChannel](FAIL);
			}
			if(closing) {
				closing = FALSE;
				signal Channel.closeDone[currentChannel](FAIL);
			}
		}
	}
  
	/**************** Channel Interface Defaults ****************/
	default event void Channel.openDone[uint8_t channel](error_t error) {}
	default event void Channel.closeDone[uint8_t channel](error_t error) {}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Calibration.nc000066400000000000000000000042461207233610700231000ustar00rootroot00000000000000/*									tab:4
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Joe Polastre
 *
 * $Id: Calibration.nc,v 1.3 2010-06-29 22:07:56 scipio Exp $
 */

interface Calibration {
  command error_t getData();
  event void dataReady(error_t error, uint16_t* calibration);
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Channel.nc000066400000000000000000000047541207233610700222250ustar00rootroot00000000000000/*
 * Copyright (c) 2008 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Rincon Research Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */
 
/**
 * Open or close a channel and retrieve the open status of the channel.
 * 
 * @author Danny Park
 */

interface Channel {
  /**
   * Open the channel.
   * 
   * @return SUCCESS if the openDone event will fire in the future.
   */
  command error_t open();
  
  /**
   * Close the channel.
   * 
   * @return SUCCESS if the closeDone event will fire in the future.
   */
  command error_t close();
  
  /**
   * Determine if the channel is open.
   * 
   * @return TRUE if the channel is open, FALSE otherwise.
   */
  command bool isOpen();
  
  /**
   * Notify the caller that the channel has been opened.
   * 
   * @param error SUCCESS if the channel was opened without any problems.
   */
  event void openDone(error_t error);
  
  /**
   * Notify the caller that the channel has been closed.
   * 
   * @param error SUCCESS if the channel was closed without any problems.
   */
  event void closeDone(error_t error);
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HalAccel202C.nc000066400000000000000000000042001207233610700226220ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

configuration HalAccel202C {
	provides interface Resource[ uint8_t client ];
  	provides interface Read as XAxis;
  	provides interface Read as YAxis;
}
implementation {
	components new Accel202LogicP();
	XAxis = Accel202LogicP.XAxis;
	YAxis = Accel202LogicP.YAxis;
 
	components HplAccel202C;
	Resource = HplAccel202C.Resource;

	components MicaBusC;
	components Atm128AdcC;
	Accel202LogicP.Resource -> Atm128AdcC.Resource[unique(UQ_ATM128ADC_RESOURCE)];
	Accel202LogicP.Atm128AdcSingle -> Atm128AdcC;
	Accel202LogicP.XADC -> MicaBusC.Adc1;
	Accel202LogicP.YADC -> MicaBusC.Adc2;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HalIntersema5534C.nc000066400000000000000000000043561207233610700236530ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

configuration HalIntersema5534C {
	provides interface Resource[ uint8_t client ];
  	provides interface Read as Temp;
  	provides interface Read as Press;
  	provides interface Calibration as Cal; 
}
implementation {
	components new Intersema5534LogicP();
	Temp = Intersema5534LogicP.Temp;
	Press = Intersema5534LogicP.Press;
	Cal = Intersema5534LogicP.Cal;
 
	components HplIntersema5534C;
	Resource = HplIntersema5534C.Resource;

	components MicaBusC;
	
	Intersema5534LogicP.SPI_CLK -> MicaBusC.USART1_CLK;
	Intersema5534LogicP.SPI_SI -> MicaBusC.USART1_RXD;
	Intersema5534LogicP.SPI_SO -> MicaBusC.USART1_TXD;
	
	components new TimerMilliC() as Timer;
	Intersema5534LogicP.Timer->Timer;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HalSensirionSht11C.nc000066400000000000000000000051461207233610700241730ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HalSensirionSht11C is an advanced access component for the
 * Sensirion SHT11 model humidity and temperature sensor, available on
 * the telosb platform. This component provides the SensirionSht11
 * interface, which offers full control over the device. Please
 * acquire the Resource before using it.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $ $Date: 2010-06-15 21:19:52 $
 */

configuration HalSensirionSht11C {
  provides interface Resource[ uint8_t client ];
  provides interface SensirionSht11[ uint8_t client ];
}
implementation {
  components new SensirionSht11LogicP();
  SensirionSht11 = SensirionSht11LogicP;

  components HplSensirionSht11C;
  Resource = HplSensirionSht11C.Resource;
  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
  SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
  
  components new TimerMilliC();
  SensirionSht11LogicP.Timer -> TimerMilliC;

  components LedsC;
  SensirionSht11LogicP.Leds -> LedsC;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HalTaos2550C.nc000066400000000000000000000040211207233610700226120ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

configuration HalTaos2550C {
	provides interface Resource[ uint8_t client ];
  	provides interface Read as VLight;
  	provides interface Read as IRLight;
}
implementation {
	components new Taos2550LogicP();
	VLight = Taos2550LogicP.VLight;
	IRLight = Taos2550LogicP.IRLight;
 
	components HplTaos2550C;
	Resource = HplTaos2550C.Resource;

	components new Atm128I2CMasterC();
	Taos2550LogicP.I2CPacket -> Atm128I2CMasterC;
	Taos2550LogicP.I2CResource -> Atm128I2CMasterC;
}

tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplAccel202C.nc000066400000000000000000000045241207233610700226520ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#include"Accel202.h"
#include"Adg715.h"

configuration HplAccel202C {
  provides interface Resource[ uint8_t id ];
}
implementation {
	components HplAccel202P;
	components new FcfsArbiterC( UQ_ACCEL202 ) as Arbiter;
	Resource = Arbiter;
  
	components new SplitControlPowerManagerC();
	SplitControlPowerManagerC.SplitControl -> HplAccel202P;
	SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
	SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
	
	components Adg715C;
	HplAccel202P.DcDcBoost33Channel -> Adg715C.DcDcBoost33Channel;
	HplAccel202P.ChannelAccelPower -> Adg715C.ChannelAccelPower;
	HplAccel202P.ChannelAccel_X -> Adg715C.ChannelAccel_X;
	HplAccel202P.ChannelAccel_Y -> Adg715C.ChannelAccel_Y;
	HplAccel202P.Resource -> Adg715C.Resource[ unique(UQ_ADG715)];
}


tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplAccel202P.nc000066400000000000000000000077241207233610700226740ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

module HplAccel202P {
	provides interface SplitControl;
	uses interface Channel as DcDcBoost33Channel;
	uses interface Channel as ChannelAccelPower;
	uses interface Channel as ChannelAccel_X;
	uses interface Channel as ChannelAccel_Y;
	uses interface Resource;
}
implementation {

	enum{
		IDLE=0,
		START,
		STOP,
	};
	uint8_t state=IDLE;
	
	command error_t SplitControl.start() {
		state=START;
		return call Resource.request();
	}
	
	event void Resource.granted(){
		error_t err;
		if(state==START){
			if((err=call DcDcBoost33Channel.open())==SUCCESS){
				return;
			}
		}else{
			if((err=call DcDcBoost33Channel.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	  
	event void DcDcBoost33Channel.openDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelAccelPower.open())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	event void ChannelAccelPower.openDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelAccel_X.open())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	event void ChannelAccel_X.openDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelAccel_Y.open())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	event void ChannelAccel_Y.openDone(error_t err){
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	command error_t SplitControl.stop() {
		state=STOP;
		return  call Resource.request();
	}
	
	event void DcDcBoost33Channel.closeDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelAccelPower.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
	
	event void ChannelAccelPower.closeDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelAccel_X.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
	
	event void ChannelAccel_X.closeDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelAccel_Y.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
	
	event void ChannelAccel_Y.closeDone(error_t err){
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplAdg715C.nc000066400000000000000000000053131207233610700223440ustar00rootroot00000000000000/*
 * Copyright (c) 2008 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Rincon Research Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * The adg715 chip has 8 channels that are controlled through the I2C
 * bus.  This configuration provides 8 Channel interfaces corresponding
 * to the 8 physical channels on the chip.  This implementation is
 * specific to how the I2C bus is implemented on the micaz platform.
 * 
 * @author Danny Park
 */
 
generic configuration HplAdg715C(bool pinA1High, bool pinA2High) {
	 provides {
		interface Channel as Channel1;
		interface Channel as Channel2;
		interface Channel as Channel3;
		interface Channel as Channel4;
		interface Channel as Channel5;
		interface Channel as Channel6;
		interface Channel as Channel7;
		interface Channel as Channel8;
	}
}
implementation {
	components new Adg715ControlC(pinA1High, pinA2High),
		new Atm128I2CMasterC();
  
	Channel1 = Adg715ControlC.Channel1;
	Channel2 = Adg715ControlC.Channel2;
	Channel3 = Adg715ControlC.Channel3;
	Channel4 = Adg715ControlC.Channel4;
	Channel5 = Adg715ControlC.Channel5;
	Channel6 = Adg715ControlC.Channel6;
	Channel7 = Adg715ControlC.Channel7;
	Channel8 = Adg715ControlC.Channel8;
	Adg715ControlC.I2CPacket -> Atm128I2CMasterC;
	Adg715ControlC.Resource -> Atm128I2CMasterC;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplIntersema5534C.nc000066400000000000000000000052511207233610700236650ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#include"Intersema5534.h"
#include"Adg715.h"

configuration HplIntersema5534C {
  provides interface Resource[ uint8_t id ];
}
implementation {
	components HplIntersema5534P;
	components new FcfsArbiterC( UQ_INTERSEMA5534 ) as Arbiter;
	Resource = Arbiter;
  
	components new SplitControlPowerManagerC();
	SplitControlPowerManagerC.SplitControl -> HplIntersema5534P;
	SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
	SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
	
	components Adg715C;
	HplIntersema5534P.ChannelPressurePower -> Adg715C.ChannelPressurePower;
	HplIntersema5534P.ChannelPressureClock -> Adg715C.ChannelPressureClock;
	HplIntersema5534P.ChannelPressureDin -> Adg715C.ChannelPressureDin;
	HplIntersema5534P.ChannelPressureDout -> Adg715C.ChannelPressureDout;
	
	HplIntersema5534P.Resource -> Adg715C.Resource[ unique(UQ_ADG715)];
		
	components MicaBusC;
    
	HplIntersema5534P.SPI_CLK -> MicaBusC.USART1_CLK;
	HplIntersema5534P.SPI_SI -> MicaBusC.USART1_RXD;
	HplIntersema5534P.SPI_SO -> MicaBusC.USART1_TXD;
	
	components new TimerMilliC() as Timer;
	
	HplIntersema5534P.Timer -> Timer;
	 
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplIntersema5534P.nc000066400000000000000000000106471207233610700237070ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

module HplIntersema5534P {
	provides interface SplitControl;
	uses interface Channel as ChannelPressurePower;
	uses interface Channel as ChannelPressureClock;
	uses interface Channel as ChannelPressureDin;
	uses interface Channel as ChannelPressureDout;
	uses interface Timer;
	uses interface GeneralIO as SPI_CLK;
	uses interface GeneralIO as SPI_SI;
	uses interface GeneralIO as SPI_SO;
	uses interface Resource;
}
implementation {

	enum{
		IDLE=0,
		START,
		STOP,
	};
	uint8_t state=IDLE;
	
	command error_t SplitControl.start() {
		state=START;
		return call Resource.request();
	}
	
	event void Resource.granted(){
		error_t err;
		if(state==START){
			if((err=call ChannelPressurePower.open())==SUCCESS){
				return;
			}
		}else{
			if((err=call ChannelPressurePower.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
  
	event void ChannelPressurePower.openDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelPressureClock.open())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	event void ChannelPressureClock.openDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelPressureDin.open())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	event void ChannelPressureDin.openDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelPressureDout.open())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	event void ChannelPressureDout.openDone(error_t err){
		state=IDLE;
		call Resource.release();
		if(err==SUCCESS){
			call SPI_CLK.makeOutput();
			call SPI_SI.makeInput();
			call SPI_SI.set();
			call SPI_SO.makeOutput();
			call Timer.startOneShot(300);
			return;
		}
		signal SplitControl.startDone(err);
	}
	
	event void Timer.fired(){
		signal SplitControl.startDone(SUCCESS);
	}
	
	command error_t SplitControl.stop() {
		state=STOP;
		return call Resource.request();
	}
	
	event void ChannelPressurePower.closeDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelPressureClock.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
	
	event void ChannelPressureClock.closeDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelPressureDin.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
	
	event void ChannelPressureDin.closeDone(error_t err){
		if(err==SUCCESS){
			if((err=call ChannelPressureDout.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
	
	event void ChannelPressureDout.closeDone(error_t err){
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplSensirionSht11C.nc000066400000000000000000000062231207233610700242070ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * HplSensirionSht11C is a low-level component, intended to provide
 * the physical resources used by the Sensirion SHT11 sensor on the
 * telosb platform so that the chip driver can make use of them. You
 * really shouldn't be wiring to this, unless you're writing a new
 * Sensirion SHT11 driver.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $ $Date: 2010-06-15 21:19:52 $
 */

#include"Adg715.h" 
 
configuration HplSensirionSht11C {
  provides interface Resource[ uint8_t id ];
  provides interface GeneralIO as DATA;
  provides interface GeneralIO as SCK;
  provides interface GpioInterrupt as InterruptDATA;

}
implementation {
	components MicaBusC;
  
	DATA = MicaBusC.Int3;	
	SCK  =MicaBusC.PW3;
	
	components HplSensirionSht11P;

	HplSensirionSht11P.DATA -> MicaBusC.Int3;	
	HplSensirionSht11P.SCK -> MicaBusC.PW3;

	components new TimerMilliC();
	HplSensirionSht11P.Timer -> TimerMilliC;

	InterruptDATA = MicaBusC.Int3_Interrupt;

	components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
	Resource = Arbiter;
  
	components new SplitControlPowerManagerC();
	SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P;
	SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
	SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
	
	components Adg715C;
	HplSensirionSht11P.ChannelHumidityClock->Adg715C.ChannelHumidityClock;
	HplSensirionSht11P.ChannelHumidityData->Adg715C.ChannelHumidityData;
	HplSensirionSht11P.ChannelHumidityPower->Adg715C.ChannelHumidityPower;
	HplSensirionSht11P.Resource->Adg715C.Resource[ unique(UQ_ADG715)];
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplSensirionSht11P.nc000066400000000000000000000100611207233610700242170ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

#include "Timer.h"

/**
 * HplSensirionSht11P is a low-level component that controls power for
 * the Sensirion SHT11 sensor on the telosb platform.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $ $Date: 2010-06-15 21:19:52 $
 */

module HplSensirionSht11P {
	provides interface SplitControl;
	uses interface Timer;
	uses interface Channel as ChannelHumidityClock;
	uses interface Channel as ChannelHumidityData;
	uses interface Channel as ChannelHumidityPower;
	uses interface GeneralIO as DATA;
	uses interface GeneralIO as SCK;
	uses interface Resource;
}
implementation {

	enum{
		IDLE=0,
		START,
		STOP,
	};
	uint8_t state=IDLE;
	
	command error_t SplitControl.start() {
		state=START;
		return call Resource.request();
	}
	
	event void Resource.granted(){
		error_t err;
		if(state==START){
			if((err=call ChannelHumidityClock.open())==SUCCESS){
				return;
			}
		}else{
			call SCK.makeInput();
			call SCK.clr();
			call DATA.makeInput();
			call DATA.clr();
			if((err=call ChannelHumidityClock.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}

	event void ChannelHumidityClock.openDone(error_t err){
		if (err==SUCCESS){
			call ChannelHumidityData.open();
			return;
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone( err );
	}
  
	event void ChannelHumidityData.openDone(error_t err){
		if (err==SUCCESS){
			call ChannelHumidityPower.open();
			return;
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone( err );
	}
	
	event void ChannelHumidityPower.openDone(error_t err){
		state=IDLE;
		call Resource.release();
		if (err==SUCCESS){
			call Timer.startOneShot(11);
			return;
		}
		signal SplitControl.startDone( err );
	}

	event void Timer.fired(){
		signal SplitControl.startDone( SUCCESS );
	}

	command error_t SplitControl.stop(){
		state=STOP;
		return call Resource.request();
	}
	
	event void ChannelHumidityClock.closeDone(error_t err){
		if (err==SUCCESS){
			call ChannelHumidityData.close();
			return;
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone( err );
	}
  
	event void ChannelHumidityData.closeDone(error_t err){
		if (err==SUCCESS){
			call ChannelHumidityPower.close();
			return;
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone( err );
	}
	
	event void ChannelHumidityPower.closeDone(error_t err){
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone( err );
	}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplTaos2550C.nc000066400000000000000000000045521207233610700226420ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#include"Taos2550.h"
#include"Adg715.h"

configuration HplTaos2550C {
  provides interface Resource[ uint8_t id ];
}
implementation {
	components HplTaos2550P;
	components new FcfsArbiterC( UQ_TAOS2550 ) as Arbiter;
	Resource = Arbiter;
  
	components new SplitControlPowerManagerC();
	SplitControlPowerManagerC.SplitControl -> HplTaos2550P;
	SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
	SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
	
	components Adg715C;
	HplTaos2550P.ChannelLightPower -> Adg715C.ChannelLightPower;
	HplTaos2550P.Resource -> Adg715C.Resource[ unique(UQ_ADG715)];
	
	components new TimerMilliC()as Timer;
	HplTaos2550P.Timer -> Timer;

	components new Atm128I2CMasterC();
	HplTaos2550P.I2CPacket -> Atm128I2CMasterC;
	HplTaos2550P.I2CResource -> Atm128I2CMasterC;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/HplTaos2550P.nc000066400000000000000000000071701207233610700226560ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#include"Taos2550.h"

module HplTaos2550P {
	provides interface SplitControl;
	uses interface Channel as ChannelLightPower;
	uses interface Timer as Timer;
	uses interface I2CPacket;
	uses interface Resource as I2CResource;
	uses interface Resource;
}
implementation {

	enum{
		IDLE=0,
		START,
		STOP,
	};
	norace uint8_t state=IDLE;
	uint8_t cmd=TAOS_START;
	
	task void failTask();
	task void startTimer();
	
	
	command error_t SplitControl.start() {
		state=START;
		return call Resource.request();
	}
	
	event void Resource.granted(){
		error_t err;
		if(state==START){
			if((err=call ChannelLightPower.open())==SUCCESS){
				return;
			}
		}else{
			if((err=call ChannelLightPower.close())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	event void ChannelLightPower.openDone(error_t err){
		if(err==SUCCESS){
			if((err=call I2CResource.request())==SUCCESS){
				return;
			}
		}
		state=IDLE;
		call Resource.release();
		signal SplitControl.startDone(err);
	}
	
	event void I2CResource.granted(){
		error_t err;
		if((err=call I2CPacket.write((I2C_START|I2C_STOP|I2C_ACK_END),TAOS_I2C_ADDR,1,&cmd))!=SUCCESS){
			state=IDLE;
			call Resource.release();
			call I2CResource.release();
			signal SplitControl.startDone(err);
		}
	}
	
	async event void I2CPacket.writeDone(error_t error, uint16_t addr,uint8_t length, uint8_t* data){
		state=IDLE;
		call Resource.release();
		call I2CResource.release();
		if(error!=SUCCESS){
			post failTask();
		}else{
			post startTimer();
		}
	}
	
	event void Timer.fired(){
		signal SplitControl.startDone(SUCCESS);
	}
	
	command error_t SplitControl.stop() {
		state=STOP;
		return  call Resource.request();
	}
	
	event void ChannelLightPower.closeDone(error_t err)	{
		state=IDLE;
		call Resource.release();
		signal SplitControl.stopDone(err);
	}
	
	task void failTask(){
		signal SplitControl.startDone(FAIL);
	}
	
	task void startTimer(){
		call Timer.startOneShot(WARM_UP_TIME);
	}
	
	async event void I2CPacket.readDone(error_t error, uint16_t addr,uint8_t length, uint8_t* data){}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Intersema.nc000066400000000000000000000032211207233610700225700ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

interface Intersema {
  command error_t read();
  event void readDone(error_t error, int16_t* mesResult);
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Intersema5534.h000066400000000000000000000033551207233610700227500ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#ifndef INTERSEMA5534_H
#define INTERSEMA5534_H
	
#define UQ_INTERSEMA5534 "Intersema5534.Resource"
#define PRESSURE_TIMEOUT_TRIES	5


void inline TOSH_wait() {
	asm volatile  ("nop" ::);
}  

#endif
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Intersema5534C.nc000066400000000000000000000040321207233610700232150ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#include "Intersema5534.h"

generic configuration Intersema5534C() {
	provides interface Intersema;

}
implementation {
	components new Intersema5534ReaderP();
	Intersema = Intersema5534ReaderP.Intersema;
	
	components HalIntersema5534C;
	
	Intersema5534ReaderP.Resource -> HalIntersema5534C.Resource[ unique(UQ_INTERSEMA5534)];
	Intersema5534ReaderP.TempRead -> HalIntersema5534C.Temp;
	Intersema5534ReaderP.PressRead -> HalIntersema5534C.Press;
	Intersema5534ReaderP.Cal -> HalIntersema5534C.Cal;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Intersema5534LogicP.nc000066400000000000000000000144761207233610700242250ustar00rootroot00000000000000/*									tab:4
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Joe Polastre
 *
 * $Id: Intersema5534LogicP.nc,v 1.2 2010-06-29 22:07:56 scipio Exp $
 */


#include "Intersema5534.h"

generic module Intersema5534LogicP()
{
	provides interface Read as Temp;
	provides interface Read as Press;
	provides interface Calibration as Cal;
	uses interface Timer as Timer;
	uses interface GeneralIO as SPI_CLK;
	uses interface GeneralIO as SPI_SI;
	uses interface GeneralIO as SPI_SO;
}
implementation
{
	enum{
		IDLE=0,
		CALIB,
		TEMP,
		PRESS,
	};
	uint8_t state=IDLE;
	uint8_t timeout=0;
	uint16_t calibration[4];
	uint16_t reading;
	
	void write_bit(bool);
	uint8_t read_bit();
	uint16_t spi_word(uint8_t);
	uint16_t data_read();
	void pulse_clock();
	void spi_reset();
	void sense();
	
	task void SPITask();
	task void gotInterrupt();
	
	command error_t Cal.getData(){
		if(state==IDLE){
			state=CALIB;
			post SPITask();
			return SUCCESS;
		}
		return FAIL;
	}
	
	command error_t Press.read() {
		if (state == IDLE) {
			state = PRESS;
			post SPITask();
			return SUCCESS;
	    	}
    		return FAIL;
	}

	command error_t Temp.read() {
		if (state == IDLE) {
			state = TEMP;
			post SPITask();
			return SUCCESS;
		}
		return FAIL;
	}	
	
	task void SPITask() {
		uint8_t i;
		if(state==CALIB){
			atomic {
				for (i = 0; i < 4; i++) {
					// reset the device
					spi_reset();
					calibration[i] = spi_word(i+1);
				}
			}
			// send the calibration data up to the application
			state = IDLE; 
			signal Cal.dataReady(SUCCESS, calibration);
		}else{
			atomic {
				// reset the device
				spi_reset();
				// grab the sensor reading and store it locally
				sense();
			}
		}
	}
	
	void task gotInterrupt() {
		uint16_t l_reading;
		atomic {
			reading = data_read();
		}
		l_reading = reading;

		// give the application the sensor data
		if (state == TEMP) {
			state = IDLE;
			signal Temp.readDone(SUCCESS,l_reading);
		}
		else if (state == PRESS) {
			state = IDLE;
			signal Press.readDone(SUCCESS,l_reading);
		}
	}
		
	uint16_t data_read() {
		uint16_t result = 0,tresult = 0;
		uint8_t i;
		TOSH_wait();
		for (i = 0; i < 16; i++) {
			tresult = (uint16_t)read_bit();
			tresult = tresult << (15-i);
			result += tresult;
		}
		return result;      
	}
	
	void pulse_clock() {
		TOSH_wait();
		TOSH_wait();
		call SPI_CLK.set();
		TOSH_wait();
		TOSH_wait();
		call SPI_CLK.clr();
	}
	
	void write_bit(bool bit) {
		if (bit)
			call SPI_SO.set();
		else
			call SPI_SO.clr();
			pulse_clock();
	}
	
	uint8_t read_bit() {
		uint8_t i;
		call SPI_SO.clr();
		call SPI_CLK.set();
		TOSH_wait();
		TOSH_wait();
		i = call SPI_SI.get();
		call SPI_CLK.clr();
		return i;
	}
		
	uint16_t spi_word(uint8_t num) {
		uint8_t i;
		TOSH_wait();
		TOSH_wait();
		// write first byte
		for (i = 0; i < 3; i++) {
			write_bit(TRUE);
		}
		write_bit(FALSE);
		write_bit(TRUE);
		if (num == 1) {
			write_bit(FALSE);
			write_bit(TRUE);
			write_bit(FALSE);
			write_bit(TRUE);
		}
		else if (num == 2) {
			write_bit(FALSE);
			write_bit(TRUE);
			write_bit(TRUE);
			write_bit(FALSE);
		}
		else if (num == 3) {
			write_bit(TRUE);
			write_bit(FALSE);
			write_bit(FALSE);
			write_bit(TRUE);
		}
		else if (num == 4) {
			write_bit(TRUE);
			write_bit(FALSE);
			write_bit(TRUE);
			write_bit(FALSE);
		}
		for (i = 0; i < 4; i++){ 
			write_bit(FALSE);
		}
		TOSH_wait();
		return data_read();
	}
	
	void spi_reset() {
		uint8_t i = 0;
		for (i = 0; i < 21; i++) {
			if (i < 16) {
				if ((i % 2) == 0)
					write_bit(TRUE);
				else
					write_bit(FALSE);
			}
			else
				write_bit(FALSE);
		} 
	}
	
	void sense() {
		uint8_t i;
		TOSH_wait();
		TOSH_wait();
		// write first byte
		for (i = 0; i < 3; i++) {
			write_bit(TRUE);
		}
		if (state == PRESS) {
			write_bit(TRUE);
			write_bit(FALSE);
			write_bit(TRUE);
			write_bit(FALSE);
		}
		else if (state == TEMP) {
			write_bit(TRUE);
			write_bit(FALSE);
			write_bit(FALSE);
			write_bit(TRUE);
		}
		for (i = 0; i < 5; i++) {
			write_bit(FALSE);
		}
		timeout = 0;
		call Timer.startOneShot(36);
	}

	event void Timer.fired() {
		if (call SPI_SI.get() == 1) {
		      	timeout++;
			if (timeout > PRESSURE_TIMEOUT_TRIES) {
				if (state == PRESS) {
					state = IDLE;
					signal Press.readDone( FAIL, 0 );
					return;
				}else if (state == TEMP) {
					state = IDLE;
					signal Temp.readDone( FAIL, 0 );
					return;
				}
			}
      			call Timer.startOneShot(20);
	    	} 
		else 
			post gotInterrupt();
	}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Intersema5534ReaderP.nc000066400000000000000000000075011207233610700243610ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

generic module Intersema5534ReaderP()
{
	provides interface Intersema;
	
	uses interface Resource;
	uses interface Read as TempRead;
	uses interface Read as PressRead;
	uses interface Calibration as Cal;
}
implementation
{
	int16_t mesResults[2];
	int32_t C1,C2,C3,C4,C5,C6,UT1,dT,T2;
	bool startUP=TRUE;
	
	command error_t Intersema.read() {
		return call Resource.request();
	}

	event void Resource.granted() {
		error_t result;
		if ((result = startUP ? call Cal.getData() : call TempRead.read()) != SUCCESS) {
			call Resource.release();
			signal Intersema.readDone( result, 0 );
		}
		startUP=FALSE;
	}
	
	event void Cal.dataReady(error_t error, uint16_t* calibration){
		if(error==SUCCESS){
			C1=(int32_t)((calibration[0] & 0xFFFE)>>1);
			C2=(int32_t)(((calibration[2] & 0x003F)<<6)|(calibration[3] & 0x003F));
			C3=(int32_t)((calibration[3] & 0xFFC0)>>6);
			C4=(int32_t)((calibration[2] & 0xFFC0)>>6);
			C5=(int32_t)(((calibration[0] & 0x0001)<<10)| ((calibration[1] & 0xFFC0)>>6));
			C6=(int32_t)(calibration[1] & 0x003F);
			UT1=(C5<<3)+20224;
			if ((error = call TempRead.read()) == SUCCESS) {
				return;
			}
		}
		call Resource.release();
		signal Intersema.readDone( error, 0 );
	}
		
	event void TempRead.readDone( error_t error, uint16_t val ) {
		
		if(error==SUCCESS){
			dT=(int32_t)val-UT1;
			mesResults[0]=200+((dT*(C6+50))>>10);
			if(mesResults[0]<200){
				T2=(11*(C6+24)*(200-(int32_t)mesResults[0])*(200-(int32_t)mesResults[0]))>>20;
			}else if (mesResults[0]>450){
				T2=(3*(C6+24)*(450-(int32_t)mesResults[0])*(450-(int32_t)mesResults[0]))>>20;
			}
			else{
				T2=0;
			}
			mesResults[0]-=T2;
			if ((error = call PressRead.read()) == SUCCESS) {
				return;
			}
		}
		call Resource.release();
		signal Intersema.readDone( error, 0);
	}

	event void PressRead.readDone( error_t error, uint16_t val ) {
		
		int32_t SENS,OFF,X;
		
		call Resource.release();
		if(error==SUCCESS){
			OFF=(C2<<2)+(((C4-512)*dT)>>12);
			SENS=C1+((C3*dT)>>10)+24576;
			X=((SENS*((int32_t)val-7168))>>14)-OFF;
			mesResults[1]=(((X*10)>>5)+2500);
			if(mesResults[0]<200){
				mesResults[1]-=3*T2*(((int32_t)mesResults[1]-3500)>>14);
			}else if(mesResults[0]>450){
				mesResults[1]-=T2*(((int32_t)mesResults[1]-10000)>>13);
			}
		}
		signal Intersema.readDone( error, mesResults);
	}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/SensirionSht11C.nc000066400000000000000000000061011207233610700235360ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * SensirionSht11C is a top-level access component for the Sensirion
 * SHT11 model humidity and temperature sensor, available on the
 * telosb platform. Because this component represents one physical
 * device, simultaneous calls to read temperature and humidity will be
 * arbitrated and executed in sequential order. Feel free to read both
 * at the same time, just be aware that they'll come back
 * sequentially.
 *
 * @author Gilman Tolle 
 * @version $Revision: 1.2 $ $Date: 2010-06-15 21:19:53 $
 */

generic configuration SensirionSht11C() {
  provides interface Read as Temperature;
  provides interface DeviceMetadata as TemperatureMetadata;
  provides interface Read as Humidity;
  provides interface DeviceMetadata as HumidityMetadata;
}
implementation {
  components new SensirionSht11ReaderP();

  Temperature = SensirionSht11ReaderP.Temperature;
  TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata;
  Humidity = SensirionSht11ReaderP.Humidity;
  HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata;

  components HalSensirionSht11C;

  enum { TEMP_KEY = unique("Sht11.Resource") };
  enum { HUM_KEY = unique("Sht11.Resource") };

  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Taos2550.h000066400000000000000000000033641207233610700217220ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#ifndef TAOS2550_H
#define TAOS2550_H
	
#define UQ_TAOS2550 "Taos2550.Resource"

enum{
	TAOS_I2C_ADDR = 0x39,
	TAOS_I2C_ADC0 =0x43,
	TAOS_I2C_ADC1 =0x83,
	TAOS_START = 0x03,
	WARM_UP_TIME = 1000,
};

#endif
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Taos2550C.nc000066400000000000000000000042571207233610700222000ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#include "Taos2550.h"

generic configuration Taos2550C() {
	provides interface Read as VisibleLight;
	provides interface Read as InfraredLight;
}
implementation {
	components new Taos2550ReaderP();
	
	VisibleLight = Taos2550ReaderP.VisibleLight;
	InfraredLight = Taos2550ReaderP.InfraredLight;
	
	components HalTaos2550C;
	
	enum {	VL_KEY = unique(UQ_TAOS2550)};
	enum {	IRL_KEY = unique(UQ_TAOS2550)};
	
	Taos2550ReaderP.VLResource -> HalTaos2550C.Resource[ VL_KEY ];
	Taos2550ReaderP.VLRead -> HalTaos2550C.VLight;
	Taos2550ReaderP.IRResource -> HalTaos2550C.Resource[ IRL_KEY];
	Taos2550ReaderP.IRRead -> HalTaos2550C.IRLight;
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Taos2550LogicP.nc000066400000000000000000000064311207233610700231670ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

#include"Taos2550.h"

generic module Taos2550LogicP()
{
	provides interface Read as VLight;
	provides interface Read as IRLight;
	uses interface I2CPacket;
	uses interface Resource as I2CResource;
}
implementation
{
	task void read();
	task void readDone();
	task void failTask();
	error_t performCommand(uint8_t);
	
	uint8_t cmd,readData;

	command error_t VLight.read() {
		return performCommand(TAOS_I2C_ADC0);
	}
  
	command error_t IRLight.read() {
		return performCommand(TAOS_I2C_ADC1);
	}

	error_t performCommand(uint8_t Command) {
		cmd=Command;
		return call I2CResource.request(); 
	}
    
	event void I2CResource.granted(){
		if(call I2CPacket.write((I2C_START|I2C_STOP|I2C_ACK_END),TAOS_I2C_ADDR,1,&cmd)!=SUCCESS){
			call I2CResource.release();
			post failTask();
		}
	}
	
	async event void I2CPacket.writeDone(error_t error, uint16_t addr,uint8_t length, uint8_t* data){
		if(error!=SUCCESS){	
			call I2CResource.release();
			post failTask();
		}else{
			post read();
		}
	}
		
	task void read(){
		if(call I2CPacket.read((I2C_START|I2C_STOP|I2C_ACK_END),TAOS_I2C_ADDR,1,&readData)!=SUCCESS){
			call I2CResource.release();
			post failTask();
		}
	}	
	
	async event void I2CPacket.readDone(error_t error, uint16_t addr,uint8_t length, uint8_t* data){
		call I2CResource.release();
		if(error!=SUCCESS){
			post failTask();
		}else{
			post readDone();
		}
	}
	
	task void readDone(){
		error_t res=(readData>>7==1)?SUCCESS:FAIL;
		if(cmd==TAOS_I2C_ADC0){
			signal VLight.readDone( res, (readData & 0x7F));
		} else {
			signal IRLight.readDone( res, (readData & 0x7F) );
		}
	}
	
	task void failTask(){
		if(cmd==TAOS_I2C_ADC0){
			signal VLight.readDone( FAIL, 0 );
		} else {
			signal IRLight.readDone( FAIL, 0 );
		}
	}
}
tinyos-2.1.2+dfsg/tos/sensorboards/mts400/Taos2550ReaderP.nc000066400000000000000000000054661207233610700233430ustar00rootroot00000000000000/** Copyright (c) 2009, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Zoltan Kincses
*/

generic module Taos2550ReaderP()
{
	provides interface Read as VisibleLight;
	provides interface Read as InfraredLight;

	uses interface Resource as VLResource;
	uses interface Resource as IRResource;
	uses interface Read as VLRead;
	uses interface Read as IRRead;
}
implementation
{
	command error_t VisibleLight.read() {
		return call VLResource.request();
	}

	event void VLResource.granted() {
		error_t result;
		if ((result = call VLRead.read()) != SUCCESS) {
			call VLResource.release();
			signal VisibleLight.readDone( result, 0 );
		}
	}

	event void VLRead.readDone( error_t result, uint8_t val ) {
		call VLResource.release();
		signal VisibleLight.readDone( result, val );
	}

	command error_t InfraredLight.read() {
		return call IRResource.request();
	}

	event void IRResource.granted() {
		error_t result;
		if ((result = call IRRead.read()) != SUCCESS) {
			call IRResource.release();
			signal InfraredLight.readDone( result, 0 );
		}
	}

	event void IRRead.readDone( error_t result, uint8_t val ) {
		call IRResource.release();
		signal InfraredLight.readDone( result, val );
	}
	
	default event void VisibleLight.readDone( error_t result, uint8_t val ) { }
  	default event void InfraredLight.readDone( error_t result, uint8_t val ) { }
}
tinyos-2.1.2+dfsg/tos/system/000077500000000000000000000000001207233610700161125ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/system/AMQueueEntryP.nc000066400000000000000000000050531207233610700211030ustar00rootroot00000000000000// $Id: AMQueueEntryP.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Internal AM component that fills in needed packet fields for the 
 * AMSend -> Send transformation.
 *
 * @author Philip Levis
 * @date   Jan 16 2006
 */ 

#include "AM.h"

generic module AMQueueEntryP(am_id_t amId) @safe() {
  provides interface AMSend;
  uses{
    interface Send;
    interface AMPacket;
  }
}

implementation {

  command error_t AMSend.send(am_addr_t dest,
			      message_t* msg,
			      uint8_t len) {
    call AMPacket.setDestination(msg, dest);
    call AMPacket.setType(msg, amId);
    return call Send.send(msg, len);
  }

  command error_t AMSend.cancel(message_t* msg) {
    return call Send.cancel(msg);
  }

  event void Send.sendDone(message_t* m, error_t err) {
    signal AMSend.sendDone(m, err);
  }
  
  command uint8_t AMSend.maxPayloadLength() {
    return call Send.maxPayloadLength();
  }

  command void* AMSend.getPayload(message_t* m, uint8_t len) {
    return call Send.getPayload(m, len);
  }
  
}
tinyos-2.1.2+dfsg/tos/system/AMQueueImplP.nc000066400000000000000000000167271207233610700207150ustar00rootroot00000000000000// $Id: AMQueueImplP.nc,v 1.11 2010-06-29 22:07:56 scipio Exp $
/*
* Copyright (c) 2005 Stanford University. All rights reserved.
*
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
*/

/**
 * An AM send queue that provides a Service Instance pattern for
 * formatted packets and calls an underlying AMSend in a round-robin
 * fashion. Used to share L2 bandwidth between different communication
 * clients.
 *
 * @author Philip Levis
 * @date   Jan 16 2006
 */ 

#include "AM.h"

generic module AMQueueImplP(int numClients) @safe() {
    provides interface Send[uint8_t client];
    uses{
        interface AMSend[am_id_t id];
        interface AMPacket;
        interface Packet;
    }
}

implementation {
    typedef struct {
        message_t* ONE_NOK msg;
    } queue_entry_t;
  
    uint8_t current = numClients; // mark as empty
    queue_entry_t queue[numClients];
    uint8_t cancelMask[numClients/8 + 1];

    void tryToSend();
  
    void nextPacket() {
        uint8_t i;
        current = (current + 1) % numClients;
        for(i = 0; i < numClients; i++) {
            if((queue[current].msg == NULL) ||
               (cancelMask[current/8] & (1 << current%8)))
            {
                current = (current + 1) % numClients;
            }
            else {
                break;
            }
        }
        if(i >= numClients) current = numClients;
    }

    /**
     * Accepts a properly formatted AM packet for later sending.
     * Assumes that someone has filled in the AM packet fields
     * (destination, AM type).
     *
     * @param msg - the message to send
     * @param len - the length of the payload
     *
     */
    command error_t Send.send[uint8_t clientId](message_t* msg,
                                                uint8_t len) {
        if (clientId >= numClients) {
            return FAIL;
        }
        if (queue[clientId].msg != NULL) {
            return EBUSY;
        }
        dbg("AMQueue", "AMQueue: request to send from %hhu (%p): passed checks\n", clientId, msg);
        
        queue[clientId].msg = msg;
        call Packet.setPayloadLength(msg, len);
    
        if (current >= numClients) { // queue empty
            error_t err;
            am_id_t amId = call AMPacket.type(msg);
            am_addr_t dest = call AMPacket.destination(msg);
      
            dbg("AMQueue", "%s: request to send from %hhu (%p): queue empty\n", __FUNCTION__, clientId, msg);
            current = clientId;
            
            err = call AMSend.send[amId](dest, msg, len);
            if (err != SUCCESS) {
                dbg("AMQueue", "%s: underlying send failed.\n", __FUNCTION__);
                current = numClients;
                queue[clientId].msg = NULL;
                
            }
            return err;
        }
        else {
            dbg("AMQueue", "AMQueue: request to send from %hhu (%p): queue not empty\n", clientId, msg);
        }
        return SUCCESS;
    }

    task void CancelTask() {
        uint8_t i,j,mask,last;
        message_t *msg;
        for(i = 0; i < numClients/8 + 1; i++) {
            if(cancelMask[i]) {
                for(mask = 1, j = 0; j < 8; j++) {
                    if(cancelMask[i] & mask) {
                        last = i*8 + j;
                        msg = queue[last].msg;
                        queue[last].msg = NULL;
                        cancelMask[i] &= ~mask;
                        signal Send.sendDone[last](msg, ECANCEL);
                    }
                    mask <<= 1;
                }
            }
        }
    }
    
    command error_t Send.cancel[uint8_t clientId](message_t* msg) {
        if (clientId >= numClients ||         // Not a valid client    
            queue[clientId].msg == NULL ||    // No packet pending
            queue[clientId].msg != msg) {     // Not the right packet
            return FAIL;
        }
        if(current == clientId) {
            am_id_t amId = call AMPacket.type(msg);
            error_t err = call AMSend.cancel[amId](msg);
            return err;
        }
        else {
            cancelMask[clientId/8] |= 1 << clientId % 8;
            post CancelTask();
            return SUCCESS;
        }
    }

    void sendDone(uint8_t last, message_t * ONE msg, error_t err) {
        queue[last].msg = NULL;
        tryToSend();
        signal Send.sendDone[last](msg, err);
    }

    task void errorTask() {
        sendDone(current, queue[current].msg, FAIL);
    }

    // NOTE: Increments current!
    void tryToSend() {
        nextPacket();
        if (current < numClients) { // queue not empty
            error_t nextErr;
            message_t* nextMsg = queue[current].msg;
            am_id_t nextId = call AMPacket.type(nextMsg);
            am_addr_t nextDest = call AMPacket.destination(nextMsg);
            uint8_t len = call Packet.payloadLength(nextMsg);
            nextErr = call AMSend.send[nextId](nextDest, nextMsg, len);
            if(nextErr != SUCCESS) {
                post errorTask();
            }
        }
    }
  
    event void AMSend.sendDone[am_id_t id](message_t* msg, error_t err) {
      // Bug fix from John Regehr: if the underlying radio mixes things
      // up, we don't want to read memory incorrectly. This can occur
      // on the mica2.
      // Note that since all AM packets go through this queue, this
      // means that the radio has a problem. -pal
      if (current >= numClients) {
	return;
      }
      if(queue[current].msg == msg) {
	sendDone(current, msg, err);
      }
      else {
	dbg("PointerBug", "%s received send done for %p, signaling for %p.\n",
	    __FUNCTION__, msg, queue[current].msg);
      }
    }
    
    command uint8_t Send.maxPayloadLength[uint8_t id]() {
        return call AMSend.maxPayloadLength[0]();
    }

    command void* Send.getPayload[uint8_t id](message_t* m, uint8_t len) {
      return call AMSend.getPayload[0](m, len);
    }

    default event void Send.sendDone[uint8_t id](message_t* msg, error_t err) {
        // Do nothing
    }
    default command error_t AMSend.send[uint8_t id](am_addr_t am_id, message_t* msg, uint8_t len) {
        return FAIL;
    }
}
tinyos-2.1.2+dfsg/tos/system/AMQueueP.nc000066400000000000000000000041431207233610700200600ustar00rootroot00000000000000// $Id: AMQueueP.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The fair-share send queue for AM radio communication.
 *
 * @author Philip Levis
 * @date   Jan 16 2006
 */ 

#include "AM.h"

configuration AMQueueP {
  provides interface Send[uint8_t client];
}

implementation {
  enum {
    NUM_CLIENTS = uniqueCount(UQ_AMQUEUE_SEND)
  };
  
  components new AMQueueImplP(NUM_CLIENTS), ActiveMessageC;

  Send = AMQueueImplP;
  AMQueueImplP.AMSend -> ActiveMessageC;
  AMQueueImplP.AMPacket -> ActiveMessageC;
  AMQueueImplP.Packet -> ActiveMessageC;
  
}

tinyos-2.1.2+dfsg/tos/system/AMReceiverC.nc000066400000000000000000000040561207233610700205260ustar00rootroot00000000000000// $Id: AMReceiverC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The virtualized AM reception abstraction.
 *
 * @author Philip Levis
 * @date   Jan 16 2006
 * @see    TEP 116: Packet Protocols
 */ 

#include "AM.h"

generic configuration AMReceiverC(am_id_t amId) {
  provides {
    interface Receive;
    interface Packet;
    interface AMPacket;
  }
}

implementation {
  components ActiveMessageC;

  Receive = ActiveMessageC.Receive[amId];
  Packet = ActiveMessageC;
  AMPacket = ActiveMessageC;
}
tinyos-2.1.2+dfsg/tos/system/AMSenderC.nc000066400000000000000000000047251207233610700202050ustar00rootroot00000000000000// $Id: AMSenderC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2006 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The virtualized active message send abstraction. Each instantiation
 * of AMSenderC has its own queue of depth one. Therefore, it does not
 * have to contend with other AMSenderC instantiations for queue space.
 * The underlying implementation schedules the packets in these queues
 * using some form of fair-share queueing.
 *
 * @author Philip Levis
 * @date   Jan 16 2006
 * @see    TEP 116: Packet Protocols
 */ 

#include "AM.h"

generic configuration AMSenderC(am_id_t AMId) {
  provides {
    interface AMSend;
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements as Acks;
  }
}

implementation {

#if defined(LOW_POWER_LISTENING)
  components new LplAMSenderC(AMId) as SenderC;
#else
  components new DirectAMSenderC(AMId) as SenderC;
#endif

  AMSend = SenderC;
  Packet = SenderC;
  AMPacket = SenderC;
  Acks = SenderC;
}
tinyos-2.1.2+dfsg/tos/system/AMSnooperC.nc000066400000000000000000000041341207233610700204040ustar00rootroot00000000000000// $Id: AMSnooperC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2006 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The virtualization of snooping on overheard packets that are not
 * destined to this node. 
 *
 * @author Philip Levis
 * @date   Jan 16 2006
 * @see    TEP 116: Packet Protocols
 */ 

#include "AM.h"

generic configuration AMSnooperC(am_id_t AMId) {
  provides {
    interface Receive;
    interface Packet;
    interface AMPacket;
  }
}

implementation {
  components ActiveMessageC;

  Receive = ActiveMessageC.Snoop[AMId];
  Packet = ActiveMessageC;
  AMPacket = ActiveMessageC;
}
tinyos-2.1.2+dfsg/tos/system/AMSnoopingReceiverC.nc000066400000000000000000000042551207233610700222440ustar00rootroot00000000000000// $Id: AMSnoopingReceiverC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The virtualized abstraction to hearing all packets of a given AM type,
 * whether destined for this node or not.
 *
 * @author Philip Levis
 * @date   Jan 16 2006
 * @see    TEP 116: Packet Protocols
 */ 

#include "AM.h"

generic configuration AMSnoopingReceiverC(am_id_t AMId) {
  provides {
    interface Receive;
    interface Packet;
    interface AMPacket;
  }
}

implementation {
  components ActiveMessageC;

  Receive = ActiveMessageC.Snoop[AMId];
  Receive = ActiveMessageC.Receive[AMId];
  Packet = ActiveMessageC;
  AMPacket = ActiveMessageC;
}
tinyos-2.1.2+dfsg/tos/system/ActiveMessageAddressC.nc000066400000000000000000000101041207233610700225610ustar00rootroot00000000000000// $Id: ActiveMessageAddressC.nc,v 1.10 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2004-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 *
 * Date last modified:  $Id: ActiveMessageAddressC.nc,v 1.10 2010-06-29 22:07:56 scipio Exp $
 *
 */

/**
 * Component that stores the node's active message address and group ID.
 *
 * @author Philip Levis
 * @author David Moss
 */

module ActiveMessageAddressC @safe() {
  provides {
    interface ActiveMessageAddress;
    async command am_addr_t amAddress();
    async command void setAmAddress(am_addr_t a);
  }
}
implementation {

  /** Node address */
  am_addr_t addr = TOS_AM_ADDRESS;

  /** Group address */
  am_group_t group = TOS_AM_GROUP;
 
  
  /***************** ActiveMessageAddress Commands ****************/
  /**
   * @return the active message address of this node
   */
  async command am_addr_t ActiveMessageAddress.amAddress() {
    return call amAddress();
  }
  
  /**
   * Set the active message address of this node
   * @param group The node's group ID
   * @param addr The node's active message address
   */
  async command void ActiveMessageAddress.setAddress(am_group_t myGroup, am_addr_t myAddr) {
    atomic {
      addr = myAddr;
      group = myGroup;
    }
    signal ActiveMessageAddress.changed();
  }
  
    
  /**
   * @return the group address of this node
   */
  async command am_group_t ActiveMessageAddress.amGroup() {
    am_group_t myGroup;
    atomic myGroup = group;
    return myGroup;
  }
  

  /***************** Deprecated Commands ****************/
  /**
   * Get the node's default AM address.
   * @return address
   * @deprecated Use ActiveMessageAddress.amAddress() instead
   */
  async command am_addr_t amAddress() {
    am_addr_t myAddr;
    atomic myAddr = addr;
    return myAddr;
  }
  
  /**
   * Set the node's default AM address.
   *
   * @param a - the address.
   * @deprecated Use ActiveMessageAddress.setAddress() instead
   */
  async command void setAmAddress(am_addr_t a) {
    atomic addr = a;
    signal ActiveMessageAddress.changed();
  }
  
  
  /***************** Defaults ****************/
  /**
   * Notification that the address of this node changed.
   */
  default async event void ActiveMessageAddress.changed() {
  }
  
}
tinyos-2.1.2+dfsg/tos/system/ActiveMessageImplP.nc000066400000000000000000000054011207233610700221160ustar00rootroot00000000000000// $Id: ActiveMessageImplP.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2004 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */


/**
 * The underlying configuration of the AM layer.  and exports
 * the AM interfaces. Deprecated and so should not be wired to.
 *
 * @author Philip Levis
 * @date   January 5 2005
 */ 

#include "AM.h"

configuration ActiveMessageImplP {
  provides {
    interface SplitControl;      
    interface AMSend[am_id_t id];
    interface Receive[am_id_t id];
    interface Receive as Snoop[am_id_t id];
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements;
  }
}

implementation {
  components ActiveMessageC;

  SplitControl = ActiveMessageC;
  AMSend = ActiveMessageC;
  Receive = ActiveMessageC.Receive;
  Snoop = ActiveMessageC.Snoop;
  Packet = ActiveMessageC;
  AMPacket = ActiveMessageC;
  PacketAcknowledgements = ActiveMessageC;
}
tinyos-2.1.2+dfsg/tos/system/ArbiterP.nc000066400000000000000000000154701207233610700201530ustar00rootroot00000000000000/*
 * Copyright (c) 2004, Technische Universitat Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/**
 * Please refer to TEP 108 for more information about this component and its
 * intended use.

        
 *
 * This component provides the Resource, ResourceRequested, ArbiterInfo, 
 * and ResourceDefaultOwner interfaces and uses the ResourceConfigure interface as
 * described in TEP 108.  It provides arbitration to a shared resource.
 * A Queue is used to keep track of which users have put
 * in requests for the resource.  Upon the release of the resource by one
 * of these users, the queue is checked and the next user
 * that has a pending request will ge granted control of the resource.  If
 * there are no pending requests, then the user of the ResourceDefaultOwner
 * interface gains access to the resource, and holds onto it until
 * another user makes a request.
 *
 * @param default_owner_id -- The id of the default owner of this 
 *        resource
 * 
 * @author Kevin Klues (klues@tkn.tu-berlin.de)
 * @author Philip Levis
 */
 
generic module ArbiterP(uint8_t default_owner_id) @safe() {
  provides {
    interface Resource[uint8_t id];
    interface ResourceRequested[uint8_t id];
    interface ResourceDefaultOwner;
    interface ArbiterInfo;
  }
  uses {
    interface ResourceConfigure[uint8_t id];
    interface ResourceQueue as Queue;
    interface Leds;
  }
}
implementation {

  enum {RES_CONTROLLED, RES_GRANTING, RES_IMM_GRANTING, RES_BUSY};
  enum {default_owner_id = default_owner_id};
  enum {NO_RES = 0xFF};

  uint8_t state = RES_CONTROLLED;
  norace uint8_t resId = default_owner_id;
  norace uint8_t reqResId;
  
  task void grantedTask();
  
  async command error_t Resource.request[uint8_t id]() {
    signal ResourceRequested.requested[resId]();
    atomic {
      if(state == RES_CONTROLLED) {
        state = RES_GRANTING;
        reqResId = id;
      }
      else if (reqResId == id) {
      	return SUCCESS;
      }
      else return call Queue.enqueue(id);
    }
    signal ResourceDefaultOwner.requested();
    return SUCCESS;
  }

  async command error_t Resource.immediateRequest[uint8_t id]() {
    signal ResourceRequested.immediateRequested[resId]();
    atomic {
      if(state == RES_CONTROLLED) {
        state = RES_IMM_GRANTING;
        reqResId = id;
      }
      else return FAIL;
    }
    signal ResourceDefaultOwner.immediateRequested();
    if(resId == id) {
      call ResourceConfigure.configure[resId]();
      return SUCCESS;
    }
    atomic state = RES_CONTROLLED;
    return FAIL;
  }
  
  async command error_t Resource.release[uint8_t id]() {
    atomic {
      if(state == RES_BUSY && resId == id) {
        if(call Queue.isEmpty() == FALSE) {
          reqResId = call Queue.dequeue();
          resId = NO_RES;
          state = RES_GRANTING;
          post grantedTask();
          call ResourceConfigure.unconfigure[id]();
        }
        else {
          resId = default_owner_id;
          state = RES_CONTROLLED;
          call ResourceConfigure.unconfigure[id]();
          signal ResourceDefaultOwner.granted();
        }
        return SUCCESS;
      }
    }
    return FAIL;
  }

  async command error_t ResourceDefaultOwner.release() {
    atomic {
      if(resId == default_owner_id) {
        if(state == RES_GRANTING) {
          post grantedTask();
          return SUCCESS;
        }
        else if(state == RES_IMM_GRANTING) {
          resId = reqResId;
          state = RES_BUSY;
          return SUCCESS;
        }
      }
    }
    return FAIL;
  }
    
  /**
    Check if the Resource is currently in use
  */    
  async command bool ArbiterInfo.inUse() {
    atomic {
      if (state == RES_CONTROLLED)
        return FALSE;
    }
    return TRUE;
  }

  /**
    Returns the current user of the Resource.
    If there is no current user, the return value
    will be 0xFF
  */      
  async command uint8_t ArbiterInfo.userId() {
    atomic {
      if(state != RES_BUSY)
        return NO_RES;
      return resId;
    }
  }

  /**
   * Returns my user id.
   */      
  async command bool Resource.isOwner[uint8_t id]() {
    atomic {
      if(resId == id && state == RES_BUSY) return TRUE;
      else return FALSE;
    }
  }

  async command bool ResourceDefaultOwner.isOwner() {
    atomic return (state == RES_CONTROLLED
            || (resId == default_owner_id
                && (state == RES_GRANTING || state == RES_IMM_GRANTING)));
  }
  
  task void grantedTask() {
    atomic {
      resId = reqResId;
      state = RES_BUSY;
    }
    call ResourceConfigure.configure[resId]();
    signal Resource.granted[resId]();
  }
  
  //Default event/command handlers for all of the other
    //potential users/providers of the parameterized interfaces 
    //that have not been connected to.  
  default event void Resource.granted[uint8_t id]() {
  }
  default async event void ResourceRequested.requested[uint8_t id]() {
  }
  default async event void ResourceRequested.immediateRequested[uint8_t id]() {
  }
  default async event void ResourceDefaultOwner.granted() {
  }
  default async event void ResourceDefaultOwner.requested() {
    call ResourceDefaultOwner.release();
  }
  default async event void ResourceDefaultOwner.immediateRequested() {
  	call ResourceDefaultOwner.release();
  }
  default async command void ResourceConfigure.configure[uint8_t id]() {
  }
  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
  }
}
tinyos-2.1.2+dfsg/tos/system/ArbitratedReadC.nc000066400000000000000000000033741207233610700214230ustar00rootroot00000000000000/* $Id: ArbitratedReadC.nc,v 1.6 2008-06-26 04:39:14 regehr Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Implement arbitrated access to a Read interface, based on an
 * underlying arbitrated Resource interface.
 *
 * Note that this code does not deal with unexpected events: it assumes
 * that all events it receives are in response to commands that it
 * made. See tos/chips/atm128/adc for an example of using ArbitratedReadC 
 * in a safe way.
 *
 * @param width_t Width of the underlying Read interface.
 *
 * @author David Gay
 */
generic module ArbitratedReadC(typedef width_t) @safe() {
  provides interface Read[uint8_t client];
  uses {
    interface Read as Service[uint8_t client];
    interface Resource[uint8_t client];
  }
}
implementation {
  command error_t Read.read[uint8_t client]() {
    return call Resource.request[client]();
  }

  event void Resource.granted[uint8_t client]() {
    call Service.read[client]();
  }

  event void Service.readDone[uint8_t client](error_t result, width_t data) {
    call Resource.release[client]();
    signal Read.readDone[client](result, data);
  }

  default async command error_t Resource.request[uint8_t client]() { 
    return FAIL; 
  }
  default async command error_t Resource.release[uint8_t client]() { return FAIL; }
  default event void Read.readDone[uint8_t client](error_t result, width_t data) { }
  default command error_t Service.read[uint8_t client]() {
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/system/ArbitratedReadNowC.nc000066400000000000000000000034521207233610700221040ustar00rootroot00000000000000/* $Id: ArbitratedReadNowC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Implement arbitrated access to a ReadNow interface, based on an
 * underlying arbitrated Resource interface.
 *
 * Note that this code does not deal with unexpected events: it assumes
 * that all events it receives are in response to commands that it
 * made. 
 *
 * @param width_t Width of the underlying ReadNow interface.
 *
 * @author David Gay
 */
generic module ArbitratedReadNowC(typedef width_t) {
  provides interface ReadNow[uint8_t client];
  uses {
    interface ReadNow as Service[uint8_t client];
    interface Resource[uint8_t client];
  }
}
implementation {
  async command error_t ReadNow.read[uint8_t client]() {
    error_t req = call Resource.immediateRequest[client]();

    if (req != SUCCESS)
      return req;

    call Service.read[client]();
    return SUCCESS;
  }

  async event void Service.readDone[uint8_t client](error_t result, width_t data) {
    call Resource.release[client]();
    signal ReadNow.readDone[client](result, data);
  }

  default async command error_t Resource.immediateRequest[uint8_t client]() { 
    return FAIL; 
  }
  default async command error_t Resource.release[uint8_t client]() { return FAIL; }
  default async event void ReadNow.readDone[uint8_t client](error_t result, width_t data) { }
  default async command error_t Service.read[uint8_t client]() {
    return SUCCESS;
  }
  event void Resource.granted[uint8_t client]() { }
}
tinyos-2.1.2+dfsg/tos/system/ArbitratedReadStreamC.nc000066400000000000000000000050731207233610700225750ustar00rootroot00000000000000/* $Id: ArbitratedReadStreamC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Implement arbitrated access to a Read interface, based on an
 * underlying arbitrated Resource interface.
 *
 * Note that this code does not deal with unexpected events: it assumes
 * that all events it receives are in response to commands that it
 * made. See tos/chips/atm128/adc for an example of using
 * ArbitratedReadStreamC in a safe way.
 *
 * @param width_t Width of the underlying ReadStream interface.
 *
 * @author David Gay
 */
generic module ArbitratedReadStreamC(uint8_t nClients, typedef val_t) {
  provides interface ReadStream[uint8_t client];
  uses {
    interface ReadStream as Service[uint8_t client];
    interface Resource[uint8_t client];
  }
}
implementation {
  uint32_t period[nClients];

  command error_t ReadStream.postBuffer[uint8_t client](val_t* buf, uint16_t count)
  {
    return call Service.postBuffer[client](buf, count);
  }

  command error_t ReadStream.read[uint8_t client](uint32_t usPeriod)
  {
    error_t ok = call Resource.request[client]();

    if (ok == SUCCESS)
      period[client] = usPeriod;

    return ok;
  }

  event void Service.bufferDone[uint8_t client](error_t result, val_t *buf, uint16_t count)
  {
    signal ReadStream.bufferDone[client](result, buf, count);
  }

  event void Service.readDone[uint8_t client](error_t result, uint32_t actualPeriod)
  {
    call Resource.release[client]();
    signal ReadStream.readDone[client](result, actualPeriod);
  }

  event void Resource.granted[uint8_t client]() {
    call Service.read[client](period[client]);
  }

  /* Defaults to keep compiler happy */
  default async command error_t Resource.request[uint8_t client]() { 
    return SUCCESS; 
  }
  default async command error_t Resource.release[uint8_t client]() { return FAIL; }

  default command error_t Service.postBuffer[uint8_t client](val_t* buf, uint16_t count)
  {
    return FAIL;
  }

  default command error_t Service.read[uint8_t client](uint32_t usPeriod)
  {
    return FAIL;
  }

  default event void ReadStream.bufferDone[uint8_t client](error_t result, val_t *buf, uint16_t count)
  {
  }

  default event void ReadStream.readDone[uint8_t client](error_t result, uint32_t actualPeriod)
  {
  }
}
tinyos-2.1.2+dfsg/tos/system/BigQueueC.nc000066400000000000000000000065321207233610700202530ustar00rootroot00000000000000/* $Id: BigQueueC.nc,v 1.1 2007-09-19 17:20:47 klueska Exp $ */
/*
 * Copyright (c) 2006 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *  A general FIFO queue component, whose queue has a bounded size.
 *
 *  @author Philip Levis
 *  @author Geoffrey Mainland
 *  @date   $Date: 2007-09-19 17:20:47 $
 */

   
generic module BigQueueC(typedef queue_t, uint16_t QUEUE_SIZE) {
  provides interface BigQueue as Queue;
}

implementation {

  queue_t queue[QUEUE_SIZE];
  uint16_t head = 0;
  uint16_t tail = 0;
  uint16_t size = 0;
  
  command bool Queue.empty() {
    return size == 0;
  }

  command uint16_t Queue.size() {
    return size;
  }

  command uint16_t Queue.maxSize() {
    return QUEUE_SIZE;
  }

  command queue_t Queue.head() {
    return queue[head];
  }

  void printQueue() {
#ifdef TOSSIM
    int i, j;
    dbg("QueueC", "head <-");
    for (i = head; i < head + size; i++) {
      dbg_clear("QueueC", "[");
      for (j = 0; j < sizeof(queue_t); j++) {
	uint8_t v = ((uint8_t*)&queue[i % QUEUE_SIZE])[j];
	dbg_clear("QueueC", "%0.2hhx", v);
      }
      dbg_clear("QueueC", "] ");
    }
    dbg_clear("QueueC", "<- tail\n");
#endif
  }
  
  command queue_t Queue.dequeue() {
    queue_t t = call Queue.head();
    dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
    if (!call Queue.empty()) {
      head++;
      head %= QUEUE_SIZE;
      size--;
      printQueue();
    }
    return t;
  }

  command error_t Queue.enqueue(queue_t newVal) {
    if (call Queue.size() < call Queue.maxSize()) {
      dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
      queue[tail] = newVal;
      tail++;
      tail %= QUEUE_SIZE;
      size++;
      printQueue();
      return SUCCESS;
    }
    else {
      return FAIL;
    }
  }
  
  command queue_t Queue.element(uint16_t idx) {
    idx += head;
    idx %= QUEUE_SIZE;
    return queue[idx];
  }  

}
tinyos-2.1.2+dfsg/tos/system/BitVectorC.nc000066400000000000000000000065721207233610700204520ustar00rootroot00000000000000//$Id: BitVectorC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $

/* Copyright (c) 2000-2003 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Generic bit vector implementation. Note that if you use this bit vector
 * from interrupt code, you must use appropriate atomic
 * statements to ensure atomicity.
 *
 * @param max_bits Bit vector length.
 *
 * @author Cory Sharp 
 */

generic module BitVectorC(uint16_t max_bits)
{
  provides interface Init;
  provides interface BitVector;
}
implementation
{
  typedef uint8_t int_type;

  enum
  {
    ELEMENT_SIZE = 8*sizeof(int_type),
    ARRAY_SIZE = (max_bits + ELEMENT_SIZE-1) / ELEMENT_SIZE,
  };

  int_type m_bits[ ARRAY_SIZE ];

  uint16_t getIndex(uint16_t bitnum)
  {
    return bitnum / ELEMENT_SIZE;
  }

  uint16_t getMask(uint16_t bitnum)
  {
    return 1 << (bitnum % ELEMENT_SIZE);
  }

  command error_t Init.init()
  {
    call BitVector.clearAll();
    return SUCCESS;
  }

  async command void BitVector.clearAll()
  {
    memset(m_bits, 0, sizeof(m_bits));
  }

  async command void BitVector.setAll()
  {
    memset(m_bits, 255, sizeof(m_bits));
  }

  async command bool BitVector.get(uint16_t bitnum)
  {
    atomic {return (m_bits[getIndex(bitnum)] & getMask(bitnum)) ? TRUE : FALSE;}
  }

  async command void BitVector.set(uint16_t bitnum)
  {
    atomic {m_bits[getIndex(bitnum)] |= getMask(bitnum);}
  }

  async command void BitVector.clear(uint16_t bitnum)
  {
    atomic {m_bits[getIndex(bitnum)] &= ~getMask(bitnum);}
  }

  async command void BitVector.toggle(uint16_t bitnum)
  {
    atomic {m_bits[getIndex(bitnum)] ^= getMask(bitnum);}
  }

  async command void BitVector.assign(uint16_t bitnum, bool value)
  {
    if(value)
      call BitVector.set(bitnum);
    else
      call BitVector.clear(bitnum);
  }

  async command uint16_t BitVector.size()
  {
    return max_bits;
  }
}

tinyos-2.1.2+dfsg/tos/system/ConstantSensorC.nc000066400000000000000000000041211207233610700215200ustar00rootroot00000000000000/// $Id: ConstantSensorC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $

/*                                                                      
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * Simple sensor emulator that just outputs a constant value. 
 *
 * @author Philip Levis
 * @date   Oct 31 2005
 */
  
generic module ConstantSensorC(typedef width_t @integer(), uint32_t val) { 
  provides interface Read;
}
implementation
{
  task void senseResult() {
    signal Read.readDone(SUCCESS, val);
  }

  command error_t Read.read() {
    return post senseResult();
  }
  
}
tinyos-2.1.2+dfsg/tos/system/CrcC.nc000066400000000000000000000054261207233610700172550ustar00rootroot00000000000000/*                                                                      
 *
 * Copyright (c) 2000-2007 The Regents of the University of
 * California.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * Wrapper around the CRC-16 primitive to allow computing the CRC
 * value of a byte array.
 *
 * @author Jonathan Hui 
 * @author David Moss
 */
 
#include 

module CrcC {
  provides interface Crc;
}

implementation {

  /**
   * Compute the CRC-16 value of a byte array.
   *
   * @param   buf A pointer to the buffer over which to compute CRC.
   * @param   len The length of the buffer over which to compute CRC.
   * @return  The CRC-16 value.
   */
  async command uint16_t Crc.crc16(void *buf, uint8_t len) {
    return call Crc.seededCrc16(0, buf, len);
  }
  
  /**
   * Compute a generic CRC-16 using a given seed.  Used to compute CRC's
   * of discontinuous data.
   * 
   * @param startCrc An initial CRC value to begin with
   * @param buf A pointer to a buffer of data
   * @param len The length of the buffer
   * @return The CRC-16 value.
   */
  async command uint16_t Crc.seededCrc16(uint16_t startCrc, void *buf, uint8_t len) {
    uint8_t *tmp = (uint8_t *) buf;
    uint16_t crc;
    for (crc = startCrc; len > 0; len--) {
      crc = crcByte(crc, *tmp++);
    }
    return crc;
  }
}
tinyos-2.1.2+dfsg/tos/system/DirectAMSenderC.nc000066400000000000000000000050671207233610700213400ustar00rootroot00000000000000// $Id: DirectAMSenderC.nc,v 1.2 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2006 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The virtualized active message send abstraction. Each instantiation
 * of AMSenderC has its own queue of depth one. Therefore, it does not
 * have to contend with other AMSenderC instantiations for queue space.
 * The underlying implementation schedules the packets in these queues
 * using some form of fair-share queueing.
 *
 * @author Philip Levis
 * @date   Jan 16 2006
 * @see    TEP 116: Packet Protocols
 */ 

#include "AM.h"

generic configuration DirectAMSenderC(am_id_t AMId) {
  provides {
    interface AMSend;
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements as Acks;
  }
}

implementation {
  components new AMQueueEntryP(AMId) as AMQueueEntryP;
  components AMQueueP, ActiveMessageC;

  AMQueueEntryP.Send -> AMQueueP.Send[unique(UQ_AMQUEUE_SEND)];
  AMQueueEntryP.AMPacket -> ActiveMessageC;
  
  AMSend = AMQueueEntryP;
  Packet = ActiveMessageC;
  AMPacket = ActiveMessageC;
  Acks = ActiveMessageC;
}
tinyos-2.1.2+dfsg/tos/system/FcfsArbiterC.nc000066400000000000000000000116511207233610700207350ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Washington University in St. Louis.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/*
 * Copyright (c) 2004, Technische Universitat Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

/*
 * - Revision -------------------------------------------------------------
 * $Revision: 1.7 $
 * $Date: 2010-06-29 22:07:56 $ 
 * ======================================================================== 
 */
 
/**
 * Please refer to TEP 108 for more information about this component and its
 * intended use.

        
 *
 * This component provides the Resource, ArbiterInfo, and ResourceDefaultOwner
 * interfaces and uses the ResourceConfigure interface as
 * described in TEP 108.  It provides arbitration to a shared resource in
 * an FCFS fashion.  An array is used to keep track of which users have put
 * in requests for the resource.  Upon the release of the resource by one
 * of these users, the array is checked and the next user (in FCFS order)
 * that has a pending request will ge granted control of the resource.  If
 * there are no pending requests, then the resource is granted to the default 
 * user.  If a new request is made, the default user will release the resource, 
 * and it will be granted to the requesting cleint.
 *
 * @param resourceName -- The name of the Resource being shared
 * 
 * @author Kevin Klues (klues@tkn.tu-berlin.de)
 */
 
generic configuration FcfsArbiterC(char resourceName[]) {
  provides {
    interface Resource[uint8_t id];
    interface ResourceRequested[uint8_t id];
    interface ResourceDefaultOwner;
    interface ArbiterInfo;
  }
  uses interface ResourceConfigure[uint8_t id];
}
implementation {
  components MainC;
  components new FcfsResourceQueueC(uniqueCount(resourceName)) as Queue;
  components new ArbiterP(uniqueCount(resourceName)) as Arbiter;

  MainC.SoftwareInit -> Queue;

  Resource = Arbiter;
  ResourceRequested = Arbiter;
  ResourceDefaultOwner = Arbiter;
  ArbiterInfo = Arbiter;
  ResourceConfigure = Arbiter;

  Arbiter.Queue -> Queue;
}
tinyos-2.1.2+dfsg/tos/system/FcfsPriorityArbiterC.nc000066400000000000000000000324571207233610700225060ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Washington University in St. Louis.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 2004, Technische Universitat Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

/*
 * - Revision -------------------------------------------------------------
 * $Revision: 1.6 $
 * $Date: 2010-06-29 22:07:56 $
 * ========================================================================
 */

/**
 * Please refer to TEP 108 for more information about this component and its
 * intended use.

        
 *
 * This component provides the Resource, ArbiterInfo, and Resource
 * Controller interfaces and uses the ResourceConfigure interface as
 * described in TEP 108.  An additional ResourceDefaultOwner interface is
 * provided to allow clients of differing Priorities to control the
 * Resource according to some policy implemented in an external
 * component. This component provides arbitration to a shared resource in
 * an FCFS fashion.  An array is used to keep track of which users have put
 * in requests for the resource.  Upon the release of the resource by one
 * of these users, the array is checked and the next user (in first-come
 * first-served order) that has a pending request will ge granted control
 * of the resource.  If there are no pending requests, then the resource
 * becomes idle and any user can put in a request and immediately receive
 * access to the Resource.
 *
 * @param resourceName -- The name of the Resource being shared
 *
 * @author Kevin Klues (klues@tkn.tu-berlin.de)
 * @author Philip Levis
 * @author Philipp Huppertz
 */

generic module FcfsPriorityArbiterC(char resourceName[]) {
  provides {
    interface Init;
    interface Resource[uint8_t id];
    interface ResourceDefaultOwner as HighPriorityClient;
    interface ResourceDefaultOwner as LowPriorityClient;
    interface ArbiterInfo;
  }
  uses {
    interface ResourceConfigure[uint8_t id];
  }
}
implementation {

  enum {RES_IDLE, RES_GRANTING, RES_BUSY};
  enum {NO_RES = 0xFF};
  enum {LOW_PRIORITY_CLIENT_ID = uniqueCount(resourceName) + 1};
  enum {HIGH_PRIORITY_CLIENT_ID = uniqueCount(resourceName) + 2};

  uint8_t state = RES_IDLE;
  uint8_t resId = NO_RES;
  uint8_t reqResId = NO_RES;
  uint8_t resQ[uniqueCount(resourceName)];
  uint8_t qHead = NO_RES;
  uint8_t qTail = NO_RES;
  bool hpreq = FALSE;   // request from the high priority client
  bool irp = FALSE;     // immediate request pending

  task void grantedTask();
  error_t queueRequest(uint8_t id);
  void grantNextRequest();

  bool requested(uint8_t id) {
    return ( ( resQ[id] != NO_RES ) || ( qTail == id ) );
  }

  /**
    Initialize the Arbiter to the idle state
  */
  command error_t Init.init() {
    memset( resQ, NO_RES, sizeof( resQ ) );
    return SUCCESS;
  }

  /**
    Request the use of the shared resource

    If the user has not already requested access to the
    resource, the request will be either served immediately
    or queued for later service in an FCFS fashion.
    A SUCCESS value will be returned and the user will receive
    the granted() event in synchronous context once it has
    been given access to the resource.

    Whenever requests are queued, the highest priority client
    will receive a requested() event after he receives granted(),
    notifying him that another user would like to have access to the resource.

    If the user has already requested access to the resource and
    is waiting on a pending granted() event, an EBUSY value will
    be returned to the caller.
  */
  async command error_t Resource.request[uint8_t id]() {
    atomic {
      if( state == RES_IDLE ) {
        state = RES_GRANTING;
        reqResId = id;
        post grantedTask();
        return SUCCESS;
      }
      if (resId == LOW_PRIORITY_CLIENT_ID)  {
        signal LowPriorityClient.requested();
      } else if (resId == HIGH_PRIORITY_CLIENT_ID) {
        signal HighPriorityClient.requested();
      }
      return queueRequest( id );
    }
  }

  async command error_t LowPriorityClient.request() {
    atomic {
      if((state == RES_IDLE) && (!hpreq)) {
        state = RES_GRANTING;
        reqResId = LOW_PRIORITY_CLIENT_ID;
        post grantedTask();
        return SUCCESS;
      }
    }
    return EBUSY;
  }

  async command error_t HighPriorityClient.request() {
    atomic {
      if (resId == LOW_PRIORITY_CLIENT_ID)  {
        signal LowPriorityClient.requested();
      }
      hpreq = TRUE;
      if( state == RES_IDLE ) {
        state = RES_GRANTING;
        reqResId = HIGH_PRIORITY_CLIENT_ID;
        post grantedTask();
      }
      return SUCCESS;
    }
  }

  /**
  * Request immediate access to the shared resource.  Requests are
  * not queued, and no granted event is returned.  A return value
  * of SUCCESS signifies that the resource has been granted to you,
  * while a return value of EBUSY signifies that the resource is
  * currently being used.
  */
  uint8_t tryImmediateRequest(uint8_t id) {
    atomic {
      if( state == RES_IDLE ) {
        state = RES_BUSY;
        resId = id;
        return id;
      }
      return resId;
    }
  }

  async command error_t Resource.immediateRequest[uint8_t id]() {
    uint8_t ownerId = tryImmediateRequest(id);

    if(ownerId == id) {
      call ResourceConfigure.configure[id]();
      return SUCCESS;
    } else if( ownerId == LOW_PRIORITY_CLIENT_ID ){
      atomic {
        irp = TRUE;     //indicate that immediateRequest is pending
        reqResId = id;  //Id to grant resource to if can
      }
      signal LowPriorityClient.requested();
      atomic {
        ownerId = resId;   //See if I have been granted the resource
        irp = FALSE;       //Indicate that immediate request no longer pending
      }
      if(ownerId == id) {
        call ResourceConfigure.configure[id]();
        return SUCCESS;
      }
      return EBUSY;
    } else {
      return EBUSY;
    }
  }

  async command error_t LowPriorityClient.immediateRequest() {
    return call Resource.immediateRequest[LOW_PRIORITY_CLIENT_ID]();
  }
  async command error_t HighPriorityClient.immediateRequest() {
    return call Resource.immediateRequest[HIGH_PRIORITY_CLIENT_ID]();
  }

  /**
    Release the use of the shared resource

    The resource will only actually be released if
    there are no pending requests for the resource.
    If requests are pending, then the next pending request
    will be serviced, according to a Fist come first serve
    arbitration scheme.  If no requests are currently
    pending, then the resource is released, and any
    users can put in a request for immediate access to
    the resource.
  */
  async command void Resource.release[uint8_t id]() {
    uint8_t currentState;
    atomic {
      if (state == RES_BUSY && resId == id) {
        if (irp)
          resId = reqResId;
        else grantNextRequest();
	call ResourceConfigure.unconfigure[id]();
      }
      currentState = state;
    }
    if (currentState == RES_IDLE)  {
      signal HighPriorityClient.idle();
      signal LowPriorityClient.idle();
    }
  }
  async command void LowPriorityClient.release() {
    call Resource.release[LOW_PRIORITY_CLIENT_ID]();
  }
  async command void HighPriorityClient.release() {
    call Resource.release[HIGH_PRIORITY_CLIENT_ID]();
  }
  /**
    Check if the Resource is currently in use
  */
  async command bool ArbiterInfo.inUse() {
    atomic {
      if ( state == RES_IDLE )
        return FALSE;
    }
    return TRUE;
  }

  /**
    Returns the current user of the Resource.
    If there is no current user, the return value
    will be 0xFF
  */
  async command uint8_t ArbiterInfo.userId() {
    atomic return resId;
  }

  /**
   * Returns my user id.
   */
  async command bool Resource.isOwner[uint8_t id]() {
    atomic {
      if(resId == id) return TRUE;
      else return FALSE;
    }
  }
  async command bool LowPriorityClient.isOwner() {
    return call Resource.isOwner[LOW_PRIORITY_CLIENT_ID]();
  }
  async command bool HighPriorityClient.isOwner() {
    return call Resource.isOwner[HIGH_PRIORITY_CLIENT_ID]();
  }

  //Grant a request to the next Pending user
    //in FCFS order
  void grantNextRequest() {
    resId = NO_RES;
    // do not grant, if highest priority client had the resource before
    if ( (hpreq) && (resId != HIGH_PRIORITY_CLIENT_ID) ) {
      atomic {
        hpreq = FALSE;
      }
      reqResId = HIGH_PRIORITY_CLIENT_ID;
      state = RES_GRANTING;
      post grantedTask();
    } else {
      if(qHead != NO_RES) {
        uint8_t id = qHead;
        qHead = resQ[qHead];
        if(qHead == NO_RES) {
          qTail = NO_RES;
        }
        resQ[id] = NO_RES;
        reqResId = id;
        state = RES_GRANTING;
        post grantedTask();
      } else {
        state = RES_IDLE;
      }
    }
  }

  //Queue the requests so that they can be granted
    //in FCFS order after release of the resource
  error_t queueRequest(uint8_t id) {
    atomic {
      if( !requested( id ) ) {
        if(qHead == NO_RES ) {
          qHead = id;
        } else {
          resQ[qTail] = id;
        }
        qTail = id;
        return SUCCESS;
      }
      return EBUSY;
    }
  }

  //Task for pulling the Resource.granted() signal
    //into synchronous context
  task void grantedTask() {
    uint8_t tmpId;
    atomic {
      tmpId = resId = reqResId;
      state = RES_BUSY;
    }
    if (tmpId == HIGH_PRIORITY_CLIENT_ID) {
      signal HighPriorityClient.granted();
      // lets throw pending request at him...
      atomic {
        if (qHead != NO_RES) {
        signal HighPriorityClient.requested();
        }
      }
    } else if (tmpId == LOW_PRIORITY_CLIENT_ID) {
      signal LowPriorityClient.granted();
    } else {
      call ResourceConfigure.configure[tmpId]();
      signal Resource.granted[tmpId]();
    }
  }

  //Default event/command handlers for all of the other
    //potential users/providers of the parameterized interfaces
    //that have not been connected to.
  default event void Resource.granted[uint8_t id]() {
      signal LowPriorityClient.granted();
  }
  default event void LowPriorityClient.granted() {
  }
  default async event void LowPriorityClient.requested() {
  }
  default async event void LowPriorityClient.idle() {
  }
  default event void HighPriorityClient.granted() {
  }
  default async event void HighPriorityClient.requested() {
  }
  default async event void HighPriorityClient.idle() {
  }
  default async command void ResourceConfigure.configure[uint8_t id]() {
  }
  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
  }
}
tinyos-2.1.2+dfsg/tos/system/FcfsResourceQueueC.nc000066400000000000000000000056051207233610700221430ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Washington University in St. Louis.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *
 * @author Kevin Klues (klueska@cs.wustl.edu)
 * @version $Revision: 1.7 $
 * @date $Date: 2010-06-29 22:07:56 $
 */
 
#include "Resource.h"
 
generic module FcfsResourceQueueC(uint8_t size) @safe() {
  provides {
    interface Init;
    interface ResourceQueue as FcfsQueue;
  }
}
implementation {
  enum {NO_ENTRY = 0xFF};

  uint8_t resQ[size];
  uint8_t qHead = NO_ENTRY;
  uint8_t qTail = NO_ENTRY;

  command error_t Init.init() {
    memset(resQ, NO_ENTRY, sizeof(resQ));
    return SUCCESS;
  }  
  
  async command bool FcfsQueue.isEmpty() {
    atomic return (qHead == NO_ENTRY);
  }
  	
  async command bool FcfsQueue.isEnqueued(resource_client_id_t id) {
  	atomic return resQ[id] != NO_ENTRY || qTail == id; 
  }

  async command resource_client_id_t FcfsQueue.dequeue() {
    atomic {
      if(qHead != NO_ENTRY) {
        uint8_t id = qHead;
        qHead = resQ[qHead];
        if(qHead == NO_ENTRY)
          qTail = NO_ENTRY;
        resQ[id] = NO_ENTRY;
        return id;
      }
      return NO_ENTRY;
    }
  }
  
  async command error_t FcfsQueue.enqueue(resource_client_id_t id) {
    atomic {
      if(!(call FcfsQueue.isEnqueued(id))) {
        if(qHead == NO_ENTRY)
	        qHead = id;
	      else
  	      resQ[qTail] = id;
	      qTail = id;
        return SUCCESS;
      }
      return EBUSY;
    }
  }
}
tinyos-2.1.2+dfsg/tos/system/LedC.nc000066400000000000000000000102361207233610700172450ustar00rootroot00000000000000/* Copyright (c) 2009-2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

#include "PlatformLed.h"

/**
 * Provide access to the Led components available on this platform.
 * LEDs are made available positionally (e.g., Led0) and by color
 * (e.g., Green).
 *
 * @author Peter A. Bigot 
 */
configuration LedC {
  provides {
#if 0 < PLATFORM_LED_COUNT
    interface Led as Led0;
#if 1 < PLATFORM_LED_COUNT
    interface Led as Led1;
#if 2 < PLATFORM_LED_COUNT
    interface Led as Led2;
#if 3 < PLATFORM_LED_COUNT
    interface Led as Led3;
#if 4 < PLATFORM_LED_COUNT
    interface Led as Led4;
#if 5 < PLATFORM_LED_COUNT
    interface Led as Led5;
#if 6 < PLATFORM_LED_COUNT
    interface Led as Led6;
#if 7 < PLATFORM_LED_COUNT
    interface Led as Led7;
#endif // count 7
#endif // count 6
#endif // count 5
#endif // count 4
#endif // count 3
#endif // count 2
#endif // count 1
#endif // count 0
#if defined(PLATFORM_LED_GREEN)
    interface Led as Green;
#endif // GREEN
#if defined(PLATFORM_LED_RED)
    interface Led as Red;
#endif // RED
#if defined(PLATFORM_LED_WHITE)
    interface Led as White;
#endif // WHITE
#if defined(PLATFORM_LED_YELLOW)
    interface Led as Yellow;
#endif // YELLOW
#if defined(PLATFORM_LED_ORANGE)
    interface Led as Orange;
#endif // ORANGE
#if defined(PLATFORM_LED_BLUE)
    interface Led as Blue;
#endif // BLUE
    interface MultiLed;
  }
} implementation {
  components PlatformLedC;
  MultiLed = PlatformLedC;

  /* Define the positional LEDs */
#if 0 < PLATFORM_LED_COUNT
  Led0 = PlatformLedC.Led[0];
#if 1 < PLATFORM_LED_COUNT
  Led1 = PlatformLedC.Led[1];
#if 2 < PLATFORM_LED_COUNT
  Led2 = PlatformLedC.Led[2];
#if 3 < PLATFORM_LED_COUNT
  Led3 = PlatformLedC.Led[3];
#if 4 < PLATFORM_LED_COUNT
  Led4 = PlatformLedC.Led[4];
#if 5 < PLATFORM_LED_COUNT
  Led5 = PlatformLedC.Led[5];
#if 6 < PLATFORM_LED_COUNT
  Led6 = PlatformLedC.Led[6];
#if 7 < PLATFORM_LED_COUNT
  Led7 = PlatformLedC.Led[7];
#endif // count 7
#endif // count 6
#endif // count 5
#endif // count 4
#endif // count 3
#endif // count 2
#endif // count 1
#endif // count 0

  /* Define the color-specific LEDs */
#if defined(PLATFORM_LED_GREEN)
  Green = PlatformLedC.Led[PLATFORM_LED_GREEN];
#endif // GREEN
#if defined(PLATFORM_LED_RED)
  Red = PlatformLedC.Led[PLATFORM_LED_RED];
#endif // RED
#if defined(PLATFORM_LED_WHITE)
  White = PlatformLedC.Led[PLATFORM_LED_WHITE];
#endif // WHITE
#if defined(PLATFORM_LED_YELLOW)
  Yellow = PlatformLedC.Led[PLATFORM_LED_YELLOW];
#endif // YELLOW
#if defined(PLATFORM_LED_ORANGE)
  Orange = PlatformLedC.Led[PLATFORM_LED_ORANGE];
#endif // ORANGE
#if defined(PLATFORM_LED_BLUE)
  Blue = PlatformLedC.Led[PLATFORM_LED_BLUE];
#endif // BLUE
}
tinyos-2.1.2+dfsg/tos/system/LedsC.nc000066400000000000000000000040701207233610700174270ustar00rootroot00000000000000// $Id: LedsC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 *
 * The basic TinyOS LEDs abstraction.
 *
 * @author Phil Buonadonna
 * @author David Gay
 * @author Philip Levis
 * @author Joe Polastre
 */


configuration LedsC {
  provides interface Leds;
}
implementation {
  components LedsP, PlatformLedsC;

  Leds = LedsP;

  LedsP.Init <- PlatformLedsC.Init;
  LedsP.Led0 -> PlatformLedsC.Led0;
  LedsP.Led1 -> PlatformLedsC.Led1;
  LedsP.Led2 -> PlatformLedsC.Led2;
}

tinyos-2.1.2+dfsg/tos/system/LedsP.nc000066400000000000000000000075431207233610700174540ustar00rootroot00000000000000// $Id: LedsP.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The implementation of the standard 3 LED mote abstraction.
 *
 * @author Joe Polastre
 * @author Philip Levis
 *
 * @date   March 21, 2005
 */

module LedsP @safe() {
  provides {
    interface Init;
    interface Leds;
  }
  uses {
    interface GeneralIO as Led0;
    interface GeneralIO as Led1;
    interface GeneralIO as Led2;
  }
}
implementation {
  command error_t Init.init() {
    atomic {
      dbg("Init", "LEDS: initialized.\n");
      call Led0.makeOutput();
      call Led1.makeOutput();
      call Led2.makeOutput();
      call Led0.set();
      call Led1.set();
      call Led2.set();
    }
    return SUCCESS;
  }

  /* Note: the call is inside the dbg, as it's typically a read of a volatile
     location, so can't be deadcode eliminated */
#define DBGLED(n) \
  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");

  async command void Leds.led0On() {
    call Led0.clr();
    DBGLED(0);
  }

  async command void Leds.led0Off() {
    call Led0.set();
    DBGLED(0);
  }

  async command void Leds.led0Toggle() {
    call Led0.toggle();
    DBGLED(0);
  }

  async command void Leds.led1On() {
    call Led1.clr();
    DBGLED(1);
  }

  async command void Leds.led1Off() {
    call Led1.set();
    DBGLED(1);
  }

  async command void Leds.led1Toggle() {
    call Led1.toggle();
    DBGLED(1);
  }

  async command void Leds.led2On() {
    call Led2.clr();
    DBGLED(2);
  }

  async command void Leds.led2Off() {
    call Led2.set();
    DBGLED(2);
  }

  async command void Leds.led2Toggle() {
    call Led2.toggle();
    DBGLED(2);
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = 0;
      if (!call Led0.get()) {
	rval |= LEDS_LED0;
      }
      if (!call Led1.get()) {
	rval |= LEDS_LED1;
      }
      if (!call Led2.get()) {
	rval |= LEDS_LED2;
      }
    }
    return rval;
  }

  async command void Leds.set(uint8_t val) {
    atomic {
      if (val & LEDS_LED0) {
	call Leds.led0On();
      }
      else {
	call Leds.led0Off();
      }
      if (val & LEDS_LED1) {
	call Leds.led1On();
      }
      else {
	call Leds.led1Off();
      }
      if (val & LEDS_LED2) {
	call Leds.led2On();
      }
      else {
	call Leds.led2Off();
      }
    }
  }
}
tinyos-2.1.2+dfsg/tos/system/LocalTimeMilliC.nc000066400000000000000000000012701207233610700213770ustar00rootroot00000000000000/* $Id: LocalTimeMilliC.nc,v 1.1 2007-05-23 21:58:08 idgay Exp $
 * Copyright (c) 2007 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 *
 */
/**
 * Provide current time via the LocalTime interface.
 *
 * @author David Gay
 */

#include "Timer.h"

configuration LocalTimeMilliC {
  provides interface LocalTime;
}
implementation
{
  components HilTimerMilliC, TimerMilliP;

  LocalTime = HilTimerMilliC;
}
tinyos-2.1.2+dfsg/tos/system/LplAMSenderC.nc000066400000000000000000000011601207233610700206430ustar00rootroot00000000000000#include "AM.h"

generic configuration LplAMSenderC(am_id_t AMId)
{
  provides {
    interface AMSend;
    interface Packet;
    interface AMPacket;
    interface PacketAcknowledgements as Acks;
  }
}

implementation
{
  components new DirectAMSenderC(AMId);
  components new LplAMSenderP();
  components ActiveMessageC;
  components SystemLowPowerListeningC;

  AMSend = LplAMSenderP;
  Packet = DirectAMSenderC;
  AMPacket = DirectAMSenderC;
  Acks = DirectAMSenderC;

  LplAMSenderP.SubAMSend -> DirectAMSenderC;
  LplAMSenderP.Lpl -> ActiveMessageC;
  LplAMSenderP.SystemLowPowerListening -> SystemLowPowerListeningC;
}
tinyos-2.1.2+dfsg/tos/system/LplAMSenderP.nc000066400000000000000000000015071207233610700206650ustar00rootroot00000000000000generic module LplAMSenderP()
{
  provides interface AMSend;
  uses {
    interface AMSend as SubAMSend;
    interface LowPowerListening as Lpl;
    interface SystemLowPowerListening;
  }
}

implementation
{
  command error_t AMSend.send(am_addr_t addr, message_t* msg, uint8_t len)
  {
    call Lpl.setRemoteWakeupInterval(msg, call SystemLowPowerListening.getDefaultRemoteWakeupInterval());
    return call SubAMSend.send(addr, msg, len);
  }

  event void SubAMSend.sendDone(message_t* msg, error_t error) { signal AMSend.sendDone(msg, error); }
  command error_t AMSend.cancel(message_t* msg) { return call SubAMSend.cancel(msg); }
  command uint8_t AMSend.maxPayloadLength() { return call SubAMSend.maxPayloadLength(); }
  command void* AMSend.getPayload(message_t* msg, uint8_t len) { return call SubAMSend.getPayload(msg, len); }
}
tinyos-2.1.2+dfsg/tos/system/LruIntCacheC.nc000066400000000000000000000037431207233610700207070ustar00rootroot00000000000000/*
 * Copyright (c) 2006 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
  * An LRU cache of integers, where insertion represents use.
  *
  * @author Rodrigo Fonseca
  */

generic configuration LruIntCacheC(typedef  cache_key_t@integer(), uint8_t CACHE_SIZE) {
    provides interface Cache;
}
implementation {
    components MainC, new LruIntCacheP(cache_key_t, CACHE_SIZE) as CacheP;
    
    Cache = CacheP;
    MainC.SoftwareInit -> CacheP;
}
tinyos-2.1.2+dfsg/tos/system/LruIntCacheP.nc000066400000000000000000000076531207233610700207300ustar00rootroot00000000000000/*
 * Copyright (c) 2006 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * An LRU cache that stores integer values, where an insert operation
 * indicates "use".  Inserting an element not in the cache will replace 
 * the oldest, and inserting an element already in the cache will refresh 
 * its age.
 *
 * @author Rodrigo Fonseca
 * @author Philip Levis 
 */

generic module LruIntCacheP(typedef cache_key_t @integer(), uint8_t size) {
    provides {
        interface Init;
        interface Cache;
    }
}
implementation {
    cache_key_t cache[size];
    uint8_t first;
    uint8_t count;

    command error_t Init.init() {
        first = 0;
        count = 0;
        return SUCCESS;
    } 

    void printCache() {
#ifdef TOSSIM
        int i;
        dbg("Cache","Cache:");
        for (i = 0; i < count; i++) {
            dbg_clear("Cache", " %08x", cache[i]);
            if (i == first)
                dbg_clear("Cache","*");
        } 
        dbg_clear("Cache","\n");
#endif
    }

    /* if key is in cache returns the index (offset by first), otherwise returns count */
    uint8_t lookup(cache_key_t key) {
        uint8_t i;
	cache_key_t k;
        for (i = 0; i < count; i++) {
	   k = cache[(i + first) % size];
           if (k == key)
            break; 
        }
        return i;
    }

    /* remove the entry with index i (relative to first) */
    void remove(uint8_t i) {
        uint8_t j;
        if (i >= count) 
            return;
        if (i == 0) {
            //shift all by moving first
            first = (first + 1) % size;
        } else {
            //shift everyone down
            for (j = i; j < count; j++) {
                cache[(j + first) % size] = cache[(j + first + 1) % size];
            }
        }
        count--;
    }

    command void Cache.insert(cache_key_t key) {
        uint8_t i;
        if (count == size ) {
            //remove someone. If item not in 
            //cache, remove the first item.
            //otherwise remove the item temporarily for
            //reinsertion. This moves the item up in the
            //LRU stack.
            i = lookup(key);
            remove(i % count);
        }
        //now count < size
        cache[(first + count) % size] = key;
        count++;
    }

    command bool Cache.lookup(cache_key_t key) {
        return (lookup(key) < count);
    }

    command void Cache.flush() {
      call Init.init(); 
    }

}
tinyos-2.1.2+dfsg/tos/system/MainC.nc000066400000000000000000000054721207233610700174330ustar00rootroot00000000000000// $Id: MainC.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $

/*                                                                      
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 *
 * Date last modified:  $Id: MainC.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $
 */

/**
 * MainC is the system interface the TinyOS boot sequence. It wires the
 * boot sequence implementation to the scheduler and hardware resources.
 *
 * @author Philip Levis
 * @date   August 6 2005
 * @see    TEP 107: Boot Sequence
 */

#include "hardware.h"

configuration MainC {
  provides interface Boot;
  uses interface Init as SoftwareInit;
}
implementation {
  components PlatformC, RealMainP, TinySchedulerC;

#ifdef SAFE_TINYOS
  components SafeFailureHandlerC;
#endif

  RealMainP.Scheduler -> TinySchedulerC;
  RealMainP.PlatformInit -> PlatformC;

  // Export the SoftwareInit and Booted for applications
  SoftwareInit = RealMainP.SoftwareInit;
  Boot = RealMainP;
}

tinyos-2.1.2+dfsg/tos/system/MultiplexedReadC.nc000066400000000000000000000027221207233610700216320ustar00rootroot00000000000000/* $Id: MultiplexedReadC.nc,v 1.1 2007-02-08 17:49:05 idgay Exp $
 * Copyright (c) 2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Multiplex access to a single Read interface for a parameterised
 * Read interface whose access is controlled by an arbiter.
 *
 * @param width_t Width of the underlying Read interface.
 *
 * @author David Gay
 */
generic module MultiplexedReadC(typedef width_t) {
  provides interface Read[uint8_t client];
  uses {
    interface Read as Service;
    interface Resource[uint8_t client];
  }
}
implementation {
  command error_t Read.read[uint8_t client]() {
    return call Resource.request[client]();
  }

  event void Resource.granted[uint8_t client]() {
    call Service.read();
  }

  event void Service.readDone(error_t result, width_t data) {
    uint8_t client = call ArbiterInfo.userId();

    call Resource.release[client]();
    signal Read.readDone[client](result, data);
  }

  default async command error_t Resource.request[uint8_t client]() { 
    return FAIL; 
  }
  default async command error_t Resource.release[uint8_t client]() { return FAIL; }
  default event void Read.readDone[uint8_t client](error_t result, width_t data) { }
}
tinyos-2.1.2+dfsg/tos/system/NoArbiterC.nc000066400000000000000000000025031207233610700204240ustar00rootroot00000000000000/*
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * A do-nothing arbiter for non-shared resources which need to pretend to
 * have arbitration. Just grants all requests, without any error
 * checking. Does still call ResourceConfigure at the right time.
 *
 * @author David Gay
 * @author Kevin Klues
 */

generic module NoArbiterC() {
  provides interface Resource;
  uses interface ResourceConfigure;
}
implementation {
  task void granted() {
    call ResourceConfigure.configure();
    signal Resource.granted();
  }

  async command error_t Resource.request() {
    post granted();
    return SUCCESS;
  }

  async command error_t Resource.immediateRequest() {
    call ResourceConfigure.configure();
    return SUCCESS;
  }  

  async command error_t Resource.release() {
    call ResourceConfigure.unconfigure();
    return SUCCESS;
  } 

  async command bool Resource.isOwner() {
    return TRUE;
  }

  default async command void ResourceConfigure.configure() { }
  default async command void ResourceConfigure.unconfigure() { }
}
tinyos-2.1.2+dfsg/tos/system/NoInitC.nc000066400000000000000000000013461207233610700177430ustar00rootroot00000000000000/* $Id: NoInitC.nc,v 1.5 2008-06-26 04:39:15 regehr Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * A do-nothing Init implementation. Useful for implementing components whose
 * specification has an Init, but whose implementation doesn't need one.
 *
 * @author David Gay 
 */
module NoInitC @safe()
{
  provides interface Init;
}
implementation
{
  command error_t Init.init() {
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/system/NoLedsC.nc000066400000000000000000000050261207233610700177260ustar00rootroot00000000000000// $Id: NoLedsC.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * A null operation replacement for the LedsC component. As many
 * components might concurrently signal information through LEDs,
 * using LedsC and NoLedsC allows an application builder to select
 * which components control the LEDs.
 *
 * @author Philip Levis
 * @date   March 19, 2005
 */

module NoLedsC {
  provides interface Init;
  provides interface Leds;
}
implementation {

  command error_t Init.init() {return SUCCESS;}

  async command void Leds.led0On() {}
  async command void Leds.led0Off() {}
  async command void Leds.led0Toggle() {}

  async command void Leds.led1On() {}
  async command void Leds.led1Off() {}
  async command void Leds.led1Toggle() {}

  async command void Leds.led2On() {}
  async command void Leds.led2Off() {}
  async command void Leds.led2Toggle() {}

  async command uint8_t Leds.get() {return 0;}
  async command void Leds.set(uint8_t val) {}
}
tinyos-2.1.2+dfsg/tos/system/NoPinC.nc000066400000000000000000000016111207233610700175610ustar00rootroot00000000000000/* $Id: NoPinC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * Dummy pin component.
 *
 * @author David Gay
 */

generic module NoPinC()
{
  provides interface GeneralIO;
}
implementation
{
  async command bool GeneralIO.get() { return 0; }
  async command void GeneralIO.set() { }
  async command void GeneralIO.clr() { }
  async command void GeneralIO.toggle() { }
  async command void GeneralIO.makeInput() { }
  async command void GeneralIO.makeOutput() { }
  async command bool GeneralIO.isInput() { }
  async command bool GeneralIO.isOutput() { }
}

tinyos-2.1.2+dfsg/tos/system/PoolC.nc000066400000000000000000000037541207233610700174610ustar00rootroot00000000000000/* $Id: PoolC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $ */
/*
 * Copyright (c) 2006 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *  A general dynamic memory pool component.
 *
 *  @author Philip Levis
 *  @author Geoffrey Mainland
 *  @date   $Date: 2006-12-12 18:23:47 $
 */

generic configuration PoolC(typedef pool_t, uint8_t POOL_SIZE) {
  provides interface Pool;
} 

implementation {
  components MainC, new PoolP(pool_t, POOL_SIZE);

  MainC.SoftwareInit -> PoolP;
  Pool = PoolP;
}
tinyos-2.1.2+dfsg/tos/system/PoolP.nc000066400000000000000000000073301207233610700174700ustar00rootroot00000000000000/* $Id: PoolP.nc,v 1.7 2010-01-20 19:59:07 scipio Exp $ */
/*
 * Copyright (c) 2006 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */


/**
 *  Implementation of a general dynamic memory pool component.
 *  Note that the allocation/deallocation policies are 
 *  different than traditional dynamic allocators such as
 *  malloc or slab allocators. When initialized, the Pool
 *  contains size items of type pool_t.
 *  These elements can be removed from the pool for use with 
 *  Pool.get, and new elements can be placed in
 *  the pool with Pool.put. The pool allows 
 *  components to put elements besides those which
 *  were obtained with get. The pool can never have
 *  more than size elements in it.
 *
 *  @author Philip Levis
 *  @author Kyle Jamieson
 *  @author Geoffrey Mainland
 *  @date   $Date: 2010-01-20 19:59:07 $
 */

generic module PoolP(typedef pool_t, uint8_t size) {
  provides {
    interface Init;
    interface Pool;
  }
}
implementation {
  uint8_t free;
  uint8_t index;
  pool_t* ONE_NOK queue[size];
  pool_t pool[size];

  command error_t Init.init() {
    int i;
    for (i = 0; i < size; i++) {
      queue[i] = &pool[i];
    }
    free = size;
    index = 0;
    return SUCCESS;
  }
  
  command bool Pool.empty() {
    dbg("PoolP", "%s size is %i\n", __FUNCTION__, (int)free);
    return free == 0;
  }
  command uint8_t Pool.size() {
    dbg("PoolP", "%s size is %i\n", __FUNCTION__, (int)free);
    return free;
  }
    
  command uint8_t Pool.maxSize() {
    return size;
  }

  command pool_t* Pool.get() {
    if (free) {
      pool_t* rval = queue[index];
      queue[index] = NULL;
      free--;
      index++;
      if (index == size) {
        index = 0;
      }
      dbg("PoolP", "%s size is %i\n", __FUNCTION__, (int)free);
      return rval;
    }
    return NULL;
  }

  command error_t Pool.put(pool_t* newVal) {
    if (free >= size) {
      return FAIL;
    }
    else {
      uint16_t emptyIndex = (index + free);
      if (emptyIndex >= size) {
        emptyIndex -= size;
      }
      queue[emptyIndex] = newVal;
      free++;
      dbg("PoolP", "%s size is %i\n", __FUNCTION__, (int)free);
      return SUCCESS;
    }
  }
}
tinyos-2.1.2+dfsg/tos/system/QueueC.nc000066400000000000000000000066111207233610700176270ustar00rootroot00000000000000/* $Id: QueueC.nc,v 1.7 2009-06-25 18:37:24 scipio Exp $ */
/*
 * Copyright (c) 2006 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *  A general FIFO queue component, whose queue has a bounded size.
 *
 *  @author Philip Levis
 *  @author Geoffrey Mainland
 *  @date   $Date: 2009-06-25 18:37:24 $
 */

   
generic module QueueC(typedef queue_t, uint8_t QUEUE_SIZE) {
  provides interface Queue;
}

implementation {

  queue_t ONE_NOK queue[QUEUE_SIZE];
  uint8_t head = 0;
  uint8_t tail = 0;
  uint8_t size = 0;
  
  command bool Queue.empty() {
    return size == 0;
  }

  command uint8_t Queue.size() {
    return size;
  }

  command uint8_t Queue.maxSize() {
    return QUEUE_SIZE;
  }

  command queue_t Queue.head() {
    return queue[head];
  }

  void printQueue() {
#ifdef TOSSIM
    int i, j;
    dbg("QueueC", "head <-");
    for (i = head; i < head + size; i++) {
      dbg_clear("QueueC", "[");
      for (j = 0; j < sizeof(queue_t); j++) {
	uint8_t v = ((uint8_t*)&queue[i % QUEUE_SIZE])[j];
	dbg_clear("QueueC", "%0.2hhx", v);
      }
      dbg_clear("QueueC", "] ");
    }
    dbg_clear("QueueC", "<- tail\n");
#endif
  }
  
  command queue_t Queue.dequeue() {
    queue_t t = call Queue.head();
    dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
    if (!call Queue.empty()) {
      head++;
      if (head == QUEUE_SIZE) head = 0;
      size--;
      printQueue();
    }
    return t;
  }

  command error_t Queue.enqueue(queue_t newVal) {
    if (call Queue.size() < call Queue.maxSize()) {
      dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
      queue[tail] = newVal;
      tail++;
      if (tail == QUEUE_SIZE) tail = 0;
      size++;
      printQueue();
      return SUCCESS;
    }
    else {
      return FAIL;
    }
  }
  
  command queue_t Queue.element(uint8_t idx) {
    idx += head;
    if (idx >= QUEUE_SIZE) {
      idx -= QUEUE_SIZE;
    }
    return queue[idx];
  }  

}
tinyos-2.1.2+dfsg/tos/system/RandomC.nc000066400000000000000000000042111207233610700177550ustar00rootroot00000000000000/*
 * Copyright (c) 2002-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The standard TinyOS random number generator. If your system requires a 
 * specific random number generator, it should wire to that component
 * directly. 
 *
 * @author  Barbara Hohlt 
 * @author  Phil Levis 
 * @date    March 1 2005
 */

configuration RandomC {
  provides interface Init;
  provides interface ParameterInit as SeedInit;
  provides interface Random;
}

implementation {
  components RandomMlcgC, MainC;
  
  MainC.SoftwareInit -> RandomMlcgC;

  Init = RandomMlcgC;
  SeedInit = RandomMlcgC;
  Random = RandomMlcgC;

} 
tinyos-2.1.2+dfsg/tos/system/RandomLfsrC.nc000066400000000000000000000064271207233610700206170ustar00rootroot00000000000000// $Id: RandomLfsrC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/*
 *
 * Authors:		Alec Woo, David Gay, Philip Levis
 * Date last modified:  8/8/05
 *
 */

/**
 * This is a 16 bit Linear Feedback Shift Register pseudo random number
   generator. It is faster than the MLCG generator, but the numbers generated
 * have less randomness.
 *
 * @author Alec Woo
 * @author David Gay
 * @author Philip Levis
 * @date   August 8 2005
 */

module RandomLfsrC
{
  provides interface Init;
  provides interface Random;
}
implementation
{
  uint16_t shiftReg;
  uint16_t initSeed;
  uint16_t mask;

  /* Initialize the seed from the ID of the node */
  command error_t Init.init() {
    atomic {
      shiftReg = 119 * 119 * (TOS_NODE_ID + 1);
      initSeed = shiftReg;
      mask = 137 * 29 * (TOS_NODE_ID + 1);
    }
    return SUCCESS;
  }

  /* Return the next 16 bit random number */
  async command uint16_t Random.rand16() {
    bool endbit;
    uint16_t tmpShiftReg;
    atomic {
      tmpShiftReg = shiftReg;
      endbit = ((tmpShiftReg & 0x8000) != 0);
      tmpShiftReg <<= 1;
      if (endbit) 
	tmpShiftReg ^= 0x100b;
      tmpShiftReg++;
      shiftReg = tmpShiftReg;
      tmpShiftReg = tmpShiftReg ^ mask;
    }
    return tmpShiftReg;
  }

  async command uint32_t Random.rand32() {
    return (uint32_t)call Random.rand16() << 16 | call Random.rand16();
  }
}
tinyos-2.1.2+dfsg/tos/system/RandomMlcgC.nc000066400000000000000000000060501207233610700205630ustar00rootroot00000000000000/*
 * Copyright (c) 2002-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/** This code is a fast implementation of the Park-Miller Minimal Standard 
 *  Generator for pseudo-random numbers.  It uses the 32 bit multiplicative 
 *  linear congruential generator, 
 *
 *		S' = (A x S) mod (2^31 - 1) 
 *
 *  for A = 16807.
 *
 *
 * @author Barbara Hohlt 
 * @date   March 1 2005
 */

module RandomMlcgC @safe() {
  provides interface Init;
  provides interface ParameterInit as SeedInit;
  provides interface Random;
}
implementation
{
    uint32_t seed ;

  /* Initialize the seed from the ID of the node */
  command error_t Init.init() {
    atomic  seed = (uint32_t)(TOS_NODE_ID + 1);
    
    return SUCCESS;
  }

  /* Initialize with 16-bit seed */ 
  command error_t SeedInit.init(uint16_t s) {
    atomic  seed = (uint32_t)(s + 1);
    
    return SUCCESS;
  }

  /* Return the next 32 bit random number */
  async command uint32_t Random.rand32() {
    uint32_t mlcg,p,q;
    uint64_t tmpseed;
    atomic
      {
	tmpseed =  (uint64_t)33614U * (uint64_t)seed;
	q = tmpseed; 	/* low */
	q = q >> 1;
	p = tmpseed >> 32 ;		/* hi */
	mlcg = p + q;
        if (mlcg & 0x80000000) { 
	  mlcg = mlcg & 0x7FFFFFFF;
	  mlcg++;
	}
	seed = mlcg;
      }
    return mlcg; 
  }

  /* Return low 16 bits of next 32 bit random number */
  async command uint16_t Random.rand16() {
    return (uint16_t)call Random.rand32();
  }

#if 0
 /* Return high 16 bits of 32 bit number */
 inline uint16_t getHigh16(uint32_t num) {
    return num >> 16;
 }
#endif
}
tinyos-2.1.2+dfsg/tos/system/ReadClientP.nc000066400000000000000000000037721207233610700205770ustar00rootroot00000000000000/*
* Copyright (c) 2011, University of Szeged
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* - Neither the name of University of Szeged nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Andras Biro
*/

generic module ReadClientP(typedef type){
  provides interface Read[uint8_t client];
  uses interface Read as ActualRead;
}
implementation{
  uint8_t client;
  
  command error_t Read.read[uint8_t cl](){
    client=cl;
    return call ActualRead.read();
  }
  
  event void ActualRead.readDone(error_t result, type value) {
    signal Read.readDone[client](result, value);
  }
  
  default event void Read.readDone[uint8_t cl](error_t result, type value){}
}
tinyos-2.1.2+dfsg/tos/system/RealMainP.nc000066400000000000000000000076201207233610700202510ustar00rootroot00000000000000// $Id: RealMainP.nc,v 1.9 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Philip Levis
 * Date last modified:  $Id: RealMainP.nc,v 1.9 2010-06-29 22:07:56 scipio Exp $
 *
 */

/**
 * RealMain implements the TinyOS boot sequence, as documented in TEP 107.
 *
 * @author Philip Levis
 * @date   January 17 2005
 */

module RealMainP @safe() {
  provides interface Boot;
  uses interface Scheduler;
  uses interface Init as PlatformInit;
  uses interface Init as SoftwareInit;
}
implementation {
  int main() @C() @spontaneous() {
    atomic
      {
	/* First, initialize the Scheduler so components can post
	   tasks. Initialize all of the very hardware specific stuff, such
	   as CPU settings, counters, etc. After the hardware is ready,
	   initialize the requisite software components and start
	   execution.*/
	platform_bootstrap();
	
	call Scheduler.init(); 
    
	/* Initialize the platform. Then spin on the Scheduler, passing
	 * FALSE so it will not put the system to sleep if there are no
	 * more tasks; if no tasks remain, continue on to software
	 * initialization */
	call PlatformInit.init();    
	while (call Scheduler.runNextTask());

	/* Initialize software components.Then spin on the Scheduler,
	 * passing FALSE so it will not put the system to sleep if there
	 * are no more tasks; if no tasks remain, the system has booted
	 * successfully.*/
	call SoftwareInit.init(); 
	while (call Scheduler.runNextTask());
      }

    /* Enable interrupts now that system is ready. */
    __nesc_enable_interrupt();

    signal Boot.booted();

    /* Spin in the Scheduler */       
    call Scheduler.taskLoop();

    /* We should never reach this point, but some versions of
     * gcc don't realize that and issue a warning if we return
     * void from a non-void function. So include this. */
    return -1;
  }

  default command error_t PlatformInit.init() { return SUCCESS; }
  default command error_t SoftwareInit.init() { return SUCCESS; }
  default event void Boot.booted() { }
}

tinyos-2.1.2+dfsg/tos/system/RoundRobinArbiterC.nc000066400000000000000000000117031207233610700221330ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Washington University in St. Louis.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/*
 * Copyright (c) 2004, Technische Universitat Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

/*
 * - Revision -------------------------------------------------------------
 * $Revision: 1.7 $
 * $Date: 2010-06-29 22:07:56 $ 
 * ======================================================================== 
 */
 
/**
 * Please refer to TEP 108 for more information about this component and its
 * intended use.

        
 *
 * This component provides the Resource, ArbiterInfo, and ResourceDefaultOwner
 * interfaces and uses the ResourceConfigure interface as
 * described in TEP 108.  It provides arbitration to a shared resource in
 * a Round Robin fashion.  An array is used to keep track of which users have 
 * put in requests for the resource.  Upon the release of the resource by one
 * of these users, the array is checked and the next user (in Round Robin order)
 * that has a pending request will ge granted control of the resource.  If
 * there are no pending requests, then the resource is granted to the default 
 * user.  If a new request is made, the default user will release the resource, 
 * and it will be granted to the requesting cleint.
 *
 * @param resourceName -- The name of the Resource being shared
 * 
 * @author Kevin Klues (klues@tkn.tu-berlin.de)
 */
 
generic configuration RoundRobinArbiterC(char resourceName[]) {
  provides {
    interface Resource[uint8_t id];
    interface ResourceRequested[uint8_t id];
    interface ResourceDefaultOwner;
    interface ArbiterInfo;
  }
  uses interface ResourceConfigure[uint8_t id];
}
implementation {
  components MainC;
  components new RoundRobinResourceQueueC(uniqueCount(resourceName)) as Queue;
  components new ArbiterP(uniqueCount(resourceName)) as Arbiter;

  MainC.SoftwareInit -> Queue;

  Resource = Arbiter;
  ResourceRequested = Arbiter;
  ResourceDefaultOwner = Arbiter;
  ArbiterInfo = Arbiter;
  ResourceConfigure = Arbiter;

  Arbiter.Queue -> Queue;
}
tinyos-2.1.2+dfsg/tos/system/RoundRobinResourceQueueC.nc000066400000000000000000000060751207233610700233450ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Washington University in St. Louis.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 *
 * @author Kevin Klues (klueska@cs.wustl.edu)
 * @version $Revision: 1.7 $
 * @date $Date: 2010-06-29 22:07:56 $
 */
 
#include "Resource.h"
 
generic module RoundRobinResourceQueueC(uint8_t size) @safe() {
  provides {
    interface Init;
    interface ResourceQueue as RoundRobinQueue;
  }
}
implementation {
  enum {
    NO_ENTRY = 0xFF,
    SIZE = size ? (size - 1) / 8 + 1 : 0
  };

  uint8_t resQ[SIZE];
  uint8_t last = 0;

  void clearEntry(uint8_t id) {
    resQ[id / 8] &= ~(1 << (id % 8));
  }

  command error_t Init.init() {
    memset(resQ, 0, sizeof(resQ));
    return SUCCESS;
  }  
  
  async command bool RoundRobinQueue.isEmpty() {
    int i;
    atomic {
      for (i = 0; i 0) return FALSE;
      return TRUE;
    }
  }
  	
  async command bool RoundRobinQueue.isEnqueued(resource_client_id_t id) {
  	return resQ[id / 8] & (1 << (id % 8));
  }

  async command resource_client_id_t RoundRobinQueue.dequeue() {
    int i;
    atomic {
      for (i = last+1; ; i++) {
        if(i == size)
          i = 0;
        if (call RoundRobinQueue.isEnqueued(i)) {
          clearEntry(i);
          last = i;
          return i;
        }
        if (i == last)
          break;
      }
      return NO_ENTRY;
    }
  }
  
  async command error_t RoundRobinQueue.enqueue(resource_client_id_t id) {
    atomic {
      if (!(call RoundRobinQueue.isEnqueued(id))) {
        resQ[id / 8] |=  1 << (id % 8);
        return SUCCESS;
      }
      return EBUSY;
    }
  }
}
tinyos-2.1.2+dfsg/tos/system/SchedulerBasicP.nc000066400000000000000000000106331207233610700214370ustar00rootroot00000000000000// $Id: SchedulerBasicP.nc,v 1.11 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * SchedulerBasicP implements the default TinyOS scheduler sequence, as
 * documented in TEP 106.
 *
 * @author Philip Levis
 * @author Cory Sharp
 * @date   January 19 2005
 */

#include "hardware.h"

module SchedulerBasicP @safe() {
  provides interface Scheduler;
  provides interface TaskBasic[uint8_t id];
  uses interface McuSleep;
}
implementation
{
  enum
  {
    NUM_TASKS = uniqueCount("TinySchedulerC.TaskBasic"),
    NO_TASK = 255,
  };

  uint8_t m_head;
  uint8_t m_tail;
  uint8_t m_next[NUM_TASKS];

  // Helper functions (internal functions) intentionally do not have atomic
  // sections.  It is left as the duty of the exported interface functions to
  // manage atomicity to minimize chances for binary code bloat.

  // move the head forward
  // if the head is at the end, mark the tail at the end, too
  // mark the task as not in the queue
  inline uint8_t popTask()
  {
    if( m_head != NO_TASK )
    {
      uint8_t id = m_head;
      m_head = m_next[m_head];
      if( m_head == NO_TASK )
      {
	m_tail = NO_TASK;
      }
      m_next[id] = NO_TASK;
      return id;
    }
    else
    {
      return NO_TASK;
    }
  }
  
  bool isWaiting( uint8_t id )
  {
    return (m_next[id] != NO_TASK) || (m_tail == id);
  }

  bool pushTask( uint8_t id )
  {
    if( !isWaiting(id) )
    {
      if( m_head == NO_TASK )
      {
	m_head = id;
	m_tail = id;
      }
      else
      {
	m_next[m_tail] = id;
	m_tail = id;
      }
      return TRUE;
    }
    else
    {
      return FALSE;
    }
  }
  
  command void Scheduler.init()
  {
    atomic
    {
      memset( (void *)m_next, NO_TASK, sizeof(m_next) );
      m_head = NO_TASK;
      m_tail = NO_TASK;
    }
  }
  
  command bool Scheduler.runNextTask()
  {
    uint8_t nextTask;
    atomic
    {
      nextTask = popTask();
      if( nextTask == NO_TASK )
      {
	return FALSE;
      }
    }
    signal TaskBasic.runTask[nextTask]();
    return TRUE;
  }

  command void Scheduler.taskLoop()
  {
    for (;;)
    {
      uint8_t nextTask;

      atomic
      {
	while ((nextTask = popTask()) == NO_TASK)
	{
	  call McuSleep.sleep();
	}
      }
      signal TaskBasic.runTask[nextTask]();
    }
  }

  /**
   * Return SUCCESS if the post succeeded, EBUSY if it was already posted.
   */
  
  async command error_t TaskBasic.postTask[uint8_t id]()
  {
    atomic { return pushTask(id) ? SUCCESS : EBUSY; }
  }

  default event void TaskBasic.runTask[uint8_t id]()
  {
  }
}

tinyos-2.1.2+dfsg/tos/system/SimpleArbiterP.nc000066400000000000000000000124611207233610700213220ustar00rootroot00000000000000/*
 * Copyright (c) 2004, Technische Universitat Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/**
 * Please refer to TEP 108 for more information about this component and its
 * intended use.

        
 *
 * This component provides the Resource, ArbiterInfo, and ResourceRequested
 * interfaces and uses the ResourceConfigure interface as
 * described in TEP 108.  It provides arbitration to a shared resource.
 * An queue is used to keep track of which users have put
 * in requests for the resource.  Upon the release of the resource by one
 * of these users, the queue is checked and the next user
 * that has a pending request will ge granted control of the resource.  If
 * there are no pending requests, then the resource becomes idle and any
 * user can put in a request and immediately receive access to the
 * Resource.
 * 
 * @author Kevin Klues (klues@tkn.tu-berlin.de)
 * @author Philip Levis
 */
 
generic module SimpleArbiterP() @safe() {
  provides {
    interface Resource[uint8_t id];
    interface ResourceRequested[uint8_t id];
    interface ArbiterInfo;
  }
  uses {
    interface ResourceConfigure[uint8_t id];
    interface ResourceQueue as Queue;
  }
}
implementation {

  enum {RES_IDLE = 0, RES_GRANTING = 1, RES_BUSY = 2};
  enum {NO_RES = 0xFF};

  uint8_t state = RES_IDLE;
  norace uint8_t resId = NO_RES;
  norace uint8_t reqResId;
  
  task void grantedTask();
  
  async command error_t Resource.request[uint8_t id]() {
    signal ResourceRequested.requested[resId]();
    atomic {
      if(state == RES_IDLE) {
        state = RES_GRANTING;
        reqResId = id;
        post grantedTask();
        return SUCCESS;
      }
      return call Queue.enqueue(id);
    }
  }

  async command error_t Resource.immediateRequest[uint8_t id]() {
    signal ResourceRequested.immediateRequested[resId]();
    atomic {
      if(state == RES_IDLE) {
        state = RES_BUSY;
        resId = id;
        call ResourceConfigure.configure[resId]();
        return SUCCESS;
      }
      return FAIL;
    }
  }
   
  async command error_t Resource.release[uint8_t id]() {
    bool released = FALSE;
    atomic {
      if(state == RES_BUSY && resId == id) {
        if(call Queue.isEmpty() == FALSE) {
          resId = NO_RES;
          reqResId = call Queue.dequeue();
          state = RES_GRANTING;
          post grantedTask();
        }
        else {
          resId = NO_RES;
          state = RES_IDLE;
        }
        released = TRUE;
      }
    }
    if(released == TRUE) {
	    call ResourceConfigure.unconfigure[id]();
      return SUCCESS;
    }
    return FAIL;
  }
    
  /**
    Check if the Resource is currently in use
  */    
  async command bool ArbiterInfo.inUse() {
    atomic {
      if (state == RES_IDLE)
        return FALSE;
    }
    return TRUE;
  }

  /**
    Returns the current user of the Resource.
    If there is no current user, the return value
    will be 0xFF
  */      
  async command uint8_t ArbiterInfo.userId() {
    atomic {
      if(state != RES_BUSY)
        return NO_RES;
      return resId;
    }
  }

  /**
   * Returns whether you are the current owner of the resource or not
   */      
  async command bool Resource.isOwner[uint8_t id]() {
    atomic {
      if(resId == id && state == RES_BUSY) return TRUE;
      else return FALSE;
    }
  }
  
  task void grantedTask() {
    atomic {
      resId = reqResId;
      state = RES_BUSY;
    }
    call ResourceConfigure.configure[resId]();
    signal Resource.granted[resId]();
  }
  
  //Default event/command handlers
  default event void Resource.granted[uint8_t id]() {
  }
  default async event void ResourceRequested.requested[uint8_t id]() {
  }
  default async event void ResourceRequested.immediateRequested[uint8_t id]() {
  }
  default async command void ResourceConfigure.configure[uint8_t id]() {
  }
  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
  }
}
tinyos-2.1.2+dfsg/tos/system/SimpleFcfsArbiterC.nc000066400000000000000000000111341207233610700221030ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Washington University in St. Louis.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/*
 * Copyright (c) 2004, Technische Universitat Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/**
 * Please refer to TEP 108 for more information about this component and its
 * intended use.

        
 *
 * This component provides the Resource, ArbiterInfo, and Resource
 * Controller interfaces and uses the ResourceConfigure interface as
 * described in TEP 108.  It provides arbitration to a shared resource in
 * an FCFS fashion.  An array is used to keep track of which users have put
 * in requests for the resource.  Upon the release of the resource by one
 * of these users, the array is checked and the next user (in FCFS order)
 * that has a pending request will ge granted control of the resource.  If
 * there are no pending requests, then the resource becomes idle and any
 * user can put in a request and immediately receive access to the
 * Resource.
 *
 * @param resourceName -- The name of the Resource being shared
 * 
 * @author Kevin Klues (klues@tkn.tu-berlin.de)
 * @author Philip Levis
 */
 
generic configuration SimpleFcfsArbiterC(char resourceName[]) {
  provides {
    interface Resource[uint8_t id];
    interface ResourceRequested[uint8_t id];
    interface ArbiterInfo;
  }
  uses interface ResourceConfigure[uint8_t id];
}
implementation {
  components MainC;
  components new FcfsResourceQueueC(uniqueCount(resourceName)) as Queue;
  components new SimpleArbiterP() as Arbiter;

  MainC.SoftwareInit -> Queue;

  Resource = Arbiter;
  ResourceRequested = Arbiter;
  ArbiterInfo = Arbiter;
  ResourceConfigure = Arbiter;

  Arbiter.Queue -> Queue;
}
tinyos-2.1.2+dfsg/tos/system/SimpleRoundRobinArbiterC.nc000066400000000000000000000111501207233610700233010ustar00rootroot00000000000000/*
 * Copyright (c) 2005 Washington University in St. Louis.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/*
 * Copyright (c) 2004, Technische Universitat Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
 
/**
 * Please refer to TEP 108 for more information about this component and its
 * intended use.

        
 *
 * This component provides the Resource, ArbiterInfo, and Resource
 * Controller interfaces and uses the ResourceConfigure interface as
 * described in TEP 108.  It provides arbitration to a shared resource in
 * an FCFS fashion.  An array is used to keep track of which users have put
 * in requests for the resource.  Upon the release of the resource by one
 * of these users, the array is checked and the next user (in FCFS order)
 * that has a pending request will ge granted control of the resource.  If
 * there are no pending requests, then the resource becomes idle and any
 * user can put in a request and immediately receive access to the
 * Resource.
 *
 * @param resourceName -- The name of the Resource being shared
 * 
 * @author Kevin Klues (klues@tkn.tu-berlin.de)
 * @author Philip Levis
 */
 
generic configuration SimpleRoundRobinArbiterC(char resourceName[]) {
  provides {
    interface Resource[uint8_t id];
    interface ResourceRequested[uint8_t id];
    interface ArbiterInfo;
  }
  uses interface ResourceConfigure[uint8_t id];
}
implementation {
  components MainC;
  components new RoundRobinResourceQueueC(uniqueCount(resourceName)) as Queue;
  components new SimpleArbiterP() as Arbiter;

  MainC.SoftwareInit -> Queue;

  Resource = Arbiter;
  ResourceRequested = Arbiter;
  ArbiterInfo = Arbiter;
  ResourceConfigure = Arbiter;

  Arbiter.Queue -> Queue;
}
tinyos-2.1.2+dfsg/tos/system/SineSensorC.nc000066400000000000000000000021531207233610700206300ustar00rootroot00000000000000/* $Id: SineSensorC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $
 * Copyright (c) 2006 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/**
 * The micaZ doesn't have any built-in sensors - the DemoSensor returns
 * a constant value of 0xbeef, or just reads the ground value for the
 * stream sensor.
 *
 * @author Philip Levis
 * @authod David Gay
 */

generic module SineSensorC()
{
  provides interface Init;
  provides interface Read;
}
implementation {

  uint32_t counter;

  command error_t Init.init() {
    counter = TOS_NODE_ID * 40;
    return SUCCESS;
  }
  
  task void readTask() {
    float val = (float)counter;
    val = val / 20.0;
    val = sin(val) * 32768.0;
    val += 32768.0;
    counter++;
    signal Read.readDone(SUCCESS, (uint16_t)val);
  }
  command error_t Read.read() {
    post readTask();
    return SUCCESS;
  }
}
tinyos-2.1.2+dfsg/tos/system/StateC.nc000066400000000000000000000055511207233610700176250ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */


/**
 * This is a state controller for any and every component's
 * state machine(s).
 *
 * There are several compelling reasons to use the State module/interface
 * in all your components that have any kind of state associated with them:
 *
 *   1) It provides a unified interface to control any state, which makes
 *      it easy for everyone to understand your code
 *   2) You can easily keep track of multiple state machines in one component
 *   3) You could have one state machine control several components
 *
 * There are three ways to change a component's state:
 *  > Request a state change
 *     The state is only changed if the state is currently in S_IDLE.  If
 *     the state changes and access is grated, requestState returns SUCCESS.
 *
 *  > Force a state change
 *     The state changes no matter what
 * 
 *  > toIdle()
 *     The state changes to S_IDLE, no matter what state the component is in.
 *
 * S_IDLE is the default state, and is always equal to 0.  Therefore,
 * setup the enums in your internal component so the IDLE/default state is
 * always 0.
 *
 * @author David Moss - dmm@rincon.com
 */
 
#include "State.h"

generic configuration StateC() {
  provides {
    interface State;
  }
}

implementation {
  components StateImplC;

  State = StateImplC.State[unique(UQ_STATE)];
}



tinyos-2.1.2+dfsg/tos/system/StateImplC.nc000066400000000000000000000056101207233610700204430ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * This is a state controller for any and every component's
 * state machine(s).
 *
 * There are several compelling reasons to use the State module/interface
 * in all your components that have any kind of state associated with them:
 *
 *   1) It provides a unified interface to control any state, which makes
 *      it easy for everyone to understand your code
 *   2) You can easily keep track of multiple state machines in one component
 *   3) You could have one state machine control several components
 *
 * There are three ways to change a component's state:
 *  > Request a state change
 *     The state is only changed if the state is currently in S_IDLE.  If
 *     the state changes and access is grated, requestState returns SUCCESS.
 *
 *  > Force a state change
 *     The state changes no matter what
 * 
 *  > toIdle()
 *     The state changes to S_IDLE, no matter what state the component is in.
 *
 * S_IDLE is the default state, and is always equal to 0.  Therefore,
 * setup the enums in your internal component so the IDLE/default state is
 * always 0.
 *
 * @author David Moss - dmm@rincon.com
 */

#include "State.h"

configuration StateImplC {
  provides {
    interface State[uint8_t id];
  }
}

implementation {
  components MainC, 
      StateImplP;

  MainC.SoftwareInit -> StateImplP;
  State = StateImplP;
  
}

tinyos-2.1.2+dfsg/tos/system/StateImplP.nc000066400000000000000000000110631207233610700204570ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Rincon Research Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * This is a state controller for any and every component's
 * state machine(s).
 *
 * There are several compelling reasons to use the State module/interface
 * in all your components that have any kind of state associated with them:
 *
 *   1) It provides a unified interface to control any state, which makes
 *      it easy for everyone to understand your code
 *   2) You can easily keep track of multiple state machines in one component
 *   3) You could have one state machine control several components
 *
 * There are three ways to change a component's state:
 *  > Request a state change
 *     The state is only changed if the state is currently in S_IDLE.  If
 *     the state changes and access is grated, requestState returns SUCCESS.
 *
 *  > Force a state change
 *     The state changes no matter what
 * 
 *  > toIdle()
 *     The state changes to S_IDLE, no matter what state the component is in.
 *
 * S_IDLE is the default state, and is always equal to 0.  Therefore,
 * setup the enums in your internal component so the IDLE/default state is
 * always 0.
 *
 * @author David Moss - dmm@rincon.com
 */
 
#include "State.h"
 
module StateImplP @safe() {
  provides {
  	interface Init;
    interface State[uint8_t id];
  }
}

implementation {

  /** Each component's state - uniqueCount("State") of them */
  uint8_t state[uniqueCount(UQ_STATE)];
  
  enum {
    S_IDLE = 0,
  };

  /***************** Init Commands ****************/
  command error_t Init.init() {
    int i;
    for(i = 0; i < uniqueCount(UQ_STATE); i++) {
      state[i] = S_IDLE;
    }
    return SUCCESS;
  }
  
  
  /***************** State Commands ****************/  
  /**
   * This will allow a state change so long as the current
   * state is S_IDLE.
   * @return SUCCESS if the state is change, FAIL if it isn't
   */
  async command error_t State.requestState[uint8_t id](uint8_t reqState) {
    error_t returnVal = FAIL;
    atomic {
      if(reqState == S_IDLE || state[id] == S_IDLE) {
        state[id] = reqState;
        returnVal = SUCCESS;
      }
    }
    return returnVal;
  }
  
  /**
   * Force the state machine to go into a certain state,
   * regardless of the current state it's in.
   */
  async command void State.forceState[uint8_t id](uint8_t reqState) {
    atomic state[id] = reqState;
  }
    
  /**
   * Set the current state back to S_IDLE
   */
  async command void State.toIdle[uint8_t id]() {
    atomic state[id] = S_IDLE;
  }
  
    
  /**
   * @return TRUE if the state machine is in S_IDLE
   */
  async command bool State.isIdle[uint8_t id]() {
    return call State.isState[id](S_IDLE);
  }
  
  /**
   * @return TRUE if the state machine is in the given state
   */
  async command bool State.isState[uint8_t id](uint8_t myState) {
    bool isState;
    atomic isState = (state[id] == myState);
    return isState;
  }
  
  
  /**
   * Get the current state
   */
  async command uint8_t State.getState[uint8_t id]() {
    uint8_t theState;
    atomic theState = state[id];
    return theState;
  }
  
}

tinyos-2.1.2+dfsg/tos/system/SystemLowPowerListeningC.nc000066400000000000000000000003121207233610700233730ustar00rootroot00000000000000configuration SystemLowPowerListeningC
{
  provides interface SystemLowPowerListening;
}

implementation
{
  components SystemLowPowerListeningP;
  SystemLowPowerListening = SystemLowPowerListeningP;
}
tinyos-2.1.2+dfsg/tos/system/SystemLowPowerListeningP.nc000066400000000000000000000012231207233610700234120ustar00rootroot00000000000000#include "Lpl.h"

module SystemLowPowerListeningP
{
  provides interface SystemLowPowerListening;
}

implementation
{
  uint16_t remoteWakeup = LPL_DEF_REMOTE_WAKEUP;
  uint16_t delayAfterReceive = DELAY_AFTER_RECEIVE;

  command void SystemLowPowerListening.setDefaultRemoteWakeupInterval(uint16_t intervalMs) { remoteWakeup = intervalMs; }
  command void SystemLowPowerListening.setDelayAfterReceive(uint16_t intervalMs) { delayAfterReceive = intervalMs; }

  command uint16_t SystemLowPowerListening.getDefaultRemoteWakeupInterval() { return remoteWakeup; }
  command uint16_t SystemLowPowerListening.getDelayAfterReceive() { return delayAfterReceive; }
}
tinyos-2.1.2+dfsg/tos/system/TimerMilliC.nc000066400000000000000000000042611207233610700206110ustar00rootroot00000000000000// $Id: TimerMilliC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 Stanford University. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The virtualized millisecond timer abstraction. Instantiating this 
 * component gives an independent millisecond granularity timer.
 *
 * @author Philip Levis
 * @date   January 16 2006
 * @see    TEP 102: Timers
 */ 

#include "Timer.h"

generic configuration TimerMilliC() {
  provides interface Timer;
}
implementation {
  components TimerMilliP;

  // The key to unique is based off of TimerMilliC because TimerMilliImplP
  // is just a pass-through to the underlying HIL component (TimerMilli).
  Timer = TimerMilliP.TimerMilli[unique(UQ_TIMER_MILLI)];
}

tinyos-2.1.2+dfsg/tos/system/TimerMilliP.nc000066400000000000000000000043271207233610700206310ustar00rootroot00000000000000// $Id: TimerMilliP.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
/**
 * Components should never wire to this component. This is the
 * underlying configuration of virtualized millisecond timers. 
 * It auto-wires wires the timer
 * implementation (TimerC) to the boot sequence and exports the
 * various Timer interfaces.
 *
 * @author Philip Levis
 * @author Cory Sharp
 * @date   May 16 2005
 */ 

#include "Timer.h"

configuration TimerMilliP {
  provides interface Timer as TimerMilli[uint8_t id];
}
implementation {
  components HilTimerMilliC, MainC;
  MainC.SoftwareInit -> HilTimerMilliC;
  TimerMilli = HilTimerMilliC;
}

tinyos-2.1.2+dfsg/tos/system/TinySchedulerC.nc000066400000000000000000000044711207233610700213270ustar00rootroot00000000000000// $Id: TinySchedulerC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2005 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * The TinyOS scheduler. It provides two interfaces: Scheduler,
 * for TinyOS to initialize and run tasks, and TaskBasic, the simplext
 * class of TinyOS tasks (reserved always at-most-once posting,
 * FIFO, parameter-free). For details and information on how to
 * replace the scheduler, refer to TEP 106.
 *
 * @author  Phil Levis
 * @date    August 7 2005
 * @see     TEP 106: Tasks and Schedulers
 */

configuration TinySchedulerC {
  provides interface Scheduler;
  provides interface TaskBasic[uint8_t id];
}
implementation {
  components SchedulerBasicP as Sched;
  components McuSleepC as Sleep;
  Scheduler = Sched;
  TaskBasic = Sched;
  Sched.McuSleep -> Sleep;
}

tinyos-2.1.2+dfsg/tos/system/crc.h000066400000000000000000000067071207233610700170440ustar00rootroot00000000000000// $Id: crc.h,v 1.7 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

#ifndef CRC_H
#define CRC_H

/* We don't want to duplicate this function inside binary components. */
#ifdef NESC_BUILD_BINARY
uint16_t crcByte(uint16_t oldCrc, uint8_t byte);
#else
/*
 * Default CRC function. Some microcontrollers may provide more efficient
 * implementations.
 *
 * This CRC-16 function produces a 16-bit running CRC that adheres to the
 * ITU-T CRC standard.
 *
 * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1
 * @param crc Running CRC value
 * @param b Byte to "add" to the CRC
 * @return New CRC value
 *
 * To understand how the CRC works and how it relates to the polynomial, read through this
 * loop based implementation.
 */
/*
uint16_t crcByte(uint16_t crc, uint8_t b)
{
  uint8_t i;
  
  crc = crc ^ b << 8;
  i = 8;
  do
    if (crc & 0x8000)
      crc = crc << 1 ^ 0x1021;
    else
      crc = crc << 1;
  while (--i);

  return crc;
}
*/
/**
 * The following implementation computes the same polynomial.  It should be
 * (much) faster on any processor architecture, as it does not involve
 * loops. Unfortunately, I can not yet give a reference to a derivation.
 * 
 * @author Andreas Koepke  (porting to tinyos)
 * @author Paul Curtis (pointed out this implementation on the MSP430 yahoo mailing list)
 */

uint16_t crcByte(uint16_t crc, uint8_t b) {
  crc = (uint8_t)(crc >> 8) | (crc << 8);
  crc ^= b;
  crc ^= (uint8_t)(crc & 0xff) >> 4;
  crc ^= crc << 12;
  crc ^= (crc & 0xff) << 5;
  return crc;
}
#endif

#endif
tinyos-2.1.2+dfsg/tos/system/dbg.h000066400000000000000000000042221207233610700170170ustar00rootroot00000000000000// $Id: dbg.h,v 1.6 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/**
 * This file is part of the TOSSIM DBG (debug) system.
 *
 * @author Philip Levis
 * @date   2/08/05
 */

#ifndef DBG_H
#define DBG_H

#endif /* DBG_H */
tinyos-2.1.2+dfsg/tos/system/scale.h000066400000000000000000000010731207233610700173530ustar00rootroot00000000000000#ifndef SCALE_H
#define SCALE_H

/*
 * Multiply x by a/b while avoiding overflow when possible. Requires that
 * a*b <= max value of from_t, and assumes unsigned arithmetic. 
 *
 * @param x Number to scale
 * @param a Numerator of scaling value
 * @param b Denominator of scaling value
 * @return round(x * a/b)
 */
inline uint32_t scale32(uint32_t x, uint32_t a, uint32_t b) 
{
  uint32_t x_over_b = x / b;
  uint32_t x_mod_b = x % b;

  x_mod_b *= a; // on a separate line just in case some compiler goes weird
  return x_over_b * a + (x_mod_b + (b>>1)) / b;
}

#endif
tinyos-2.1.2+dfsg/tos/system/tos.h000066400000000000000000000023731207233610700170750ustar00rootroot00000000000000#if !defined(__CYGWIN__)
#if defined(__MSP430__)
#include 
#else
#include 
#endif
#else //cygwin
#define _HAVE_STDC	// hack to force the definition _EXFNPTR under cygwin
#undef _ANSIDECL_H_	// which is used in reent.h
#include 	// reload _ansi.h
#include 
#include 
#endif

#include 
#include 
#include 
#include 
#include 

/* TEMPORARY: include the Safe TinyOS macros so that annotations get
 * defined away for non-safe users */
#include "../lib/safe/include/annots_stage1.h"

typedef uint8_t bool;
enum { FALSE = 0, TRUE = 1 };

typedef nx_int8_t nx_bool;
uint16_t TOS_NODE_ID = 1;

/* This macro is used to mark pointers that represent ownership
   transfer in interfaces. See TEP 3 for more discussion. */
#define PASS

#ifdef NESC
struct @atmostonce { };
struct @atleastonce { };
struct @exactlyonce { };
#endif

/* This platform_bootstrap macro exists in accordance with TEP
   107. A platform may override this through a platform.h file. */
#include 
#ifndef platform_bootstrap
#define platform_bootstrap() {}
#endif

#ifndef TOSSIM
#define dbg(s, ...) 
#define dbgerror(s, ...) 
#define dbg_clear(s, ...) 
#define dbgerror_clear(s, ...) 
#endif

tinyos-2.1.2+dfsg/tos/system/unittest/000077500000000000000000000000001207233610700177715ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/system/unittest/README.txt000066400000000000000000000023201207233610700214640ustar00rootroot00000000000000Crude infrastructure for TinyOS unit tests.

In the implementation section of your application configuration, add this
line:

#include 

Where the specification section of your application module changes to the
implementation section, use this pattern:

#include 
} implementation {
#include 

Within your test module, use these macros:

ASSERT_EQUAL(v1, v2);
ASSERT_EQUAL_32(long1, long2);
ASSERT_EQUAL_PTR(p1, p2);
ASSERT_TRUE(condition);

Put the following line after all tests:

ALL_TESTS_PASSED()

Then make platform install, cat /dev/ttyUSB0, and watch as everything is
verified.  If something goes wrong, the red LED will be lit and failure will
be repeatedly printed to the screen, including the parameters and the line
number of the failure.  If everything goes right, the green LED will be lit
and "All tests passed" will be printed to the screen.

You can run all unit tests that are found within a directory (default:
${TOSROOT/apps}) by using the ${TOSDIR}/system/unittests/runtests script.

When creating a new unit test, copy the basic configuration (Makefile,
application configuration, application module) from
${TOSDIR}/system/unittest/Stub.
tinyos-2.1.2+dfsg/tos/system/unittest/Stub/000077500000000000000000000000001207233610700207065ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/system/unittest/Stub/Makefile000066400000000000000000000001111207233610700223370ustar00rootroot00000000000000COMPONENT=TestAppC
PFLAGS += -I$(TOSDIR)/lib/printf
include $(MAKERULES)
tinyos-2.1.2+dfsg/tos/system/unittest/Stub/TestAppC.nc000066400000000000000000000002231207233610700227100ustar00rootroot00000000000000configuration TestAppC {
} implementation {
  components TestP;
  components MainC;

  TestP.Boot -> MainC;
  
#include 
}
tinyos-2.1.2+dfsg/tos/system/unittest/Stub/TestP.nc000066400000000000000000000003151207233610700222660ustar00rootroot00000000000000#include 

module TestP {
  uses interface Boot;
#include 
} implementation {
#include 
  event void Boot.booted () {
    ALL_TESTS_PASSED();
  }
}
tinyos-2.1.2+dfsg/tos/system/unittest/config_impl.h000066400000000000000000000035531207233610700224360ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

#ifndef OIP_TEST_UNITTEST_CONFIG_IMPL_H_
#define OIP_TEST_UNITTEST_CONFIG_IMPL_H_

components LedC;
TestP.PassLed -> LedC.Green;
TestP.FailLed -> LedC.Red;

// @todo The destination for the printed messages should be configurable
components SerialPrintfC;

#endif /* OIP_TEST_UNITTEST_CONFIG_IMPL_H_ */
tinyos-2.1.2+dfsg/tos/system/unittest/module_impl.h000066400000000000000000000065701207233610700224600ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

#ifndef OIP_TEST_UNITTEST_MODULE_IMPL_H_
#define OIP_TEST_UNITTEST_MODULE_IMPL_H_

  char messageBuffer_[64];
  void fail (const char* msg)
  {
    call FailLed.on();
    while (1) {
      volatile uint16_t ctr = 0x8000;
      printf("%s\r\n", msg);
      while (--ctr);
    }
  }

#define ASSERT_EQUAL_PTR(_v1, _v2) { \
  const void* v1 = (const void*)_v1;          \
  const void* v2 = (const void*)_v2;          \
  if (v1 != v2) { \
    sprintf(messageBuffer_, "FAIL[%d]: %p != %p (%s != %s)", __LINE__, v1, v2, #_v1, #_v2); \
    fail(messageBuffer_); \
  } \
  printf("Pass: %s == %s (%p)\r\n", #_v1, #_v2, v1); \
}

#define ASSERT_EQUAL(_v1, _v2) { \
  int v1 = _v1; \
  int v2 = _v2; \
  if (v1 != v2) { \
    sprintf(messageBuffer_, "FAIL[%d]: %d != %d (%s != %s)", __LINE__, v1, v2, #_v1, #_v2); \
    fail(messageBuffer_); \
  } \
  printf("Pass: %s == %s (%d)\r\n", #_v1, #_v2, v1); \
}

#define ASSERT_EQUAL_32(_v1, _v2) { \
  int32_t v1 = _v1; \
  int32_t v2 = _v2; \
  if (v1 != v2) { \
    sprintf(messageBuffer_, "FAIL[%d]: %ld != %ld (%s != %s)", __LINE__, v1, v2, #_v1, #_v2); \
    fail(messageBuffer_); \
  } \
  printf("Pass: %s == %s (%ld)\r\n", #_v1, #_v2, v1); \
}

#define ASSERT_EQUAL_U32(_v1, _v2) { \
  uint32_t v1 = _v1; \
  uint32_t v2 = _v2; \
  if (v1 != v2) { \
    sprintf(messageBuffer_, "FAIL[%d]: %lu != %lu (%s != %s)", __LINE__, v1, v2, #_v1, #_v2); \
    fail(messageBuffer_); \
  } \
  printf("Pass: %s == %s (%lu)\r\n", #_v1, #_v2, v1); \
}

#define ASSERT_TRUE(_p) { \
  bool p = _p; \
  if (! p) { \
    sprintf(messageBuffer_, "FAIL[%d]: %s is false", __LINE__, #_p); \
    fail(messageBuffer_); \
  } \
  printf("Pass: %s\r\n", #_p); \
}

#define ALL_TESTS_PASSED() do { \
  call PassLed.on(); \
  printf("All tests passed\r\n"); \
  while(1); \
} while (0)

#endif /* OIP_TEST_UNITTEST_MODULE_IMPL_H_ */
tinyos-2.1.2+dfsg/tos/system/unittest/module_spec.h000066400000000000000000000033771207233610700224530ustar00rootroot00000000000000/* Copyright (c) 2010 People Power Co.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the People Power Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * PEOPLE POWER CO. OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 *
 */

#ifndef OIP_TEST_UNITTEST_MODULE_SPEC_H_
#define OIP_TEST_UNITTEST_MODULE_SPEC_H_

uses {
  interface Led as PassLed;
  interface Led as FailLed;
}

#endif /* OIP_TEST_UNITTEST_MODULE_SPEC_H_ */
tinyos-2.1.2+dfsg/tos/system/unittest/runtests000077500000000000000000000030501207233610700216040ustar00rootroot00000000000000#!/bin/sh
#
# Usage: runtests [root [platform]]
#
# Search all directories in root (default: ${TOSROOT}/apps) that use
# the OSIAN unittest framework.  For each such test, build it for
# platform (default ${PLATFORM} or tmote), and run it.
#
# This version does not automatically detect pass/fail; the green LED
# will be lit on pass and the red LED on failure, and the screen will
# print "FAIL:*" repeatedly when something goes wrong or "All tests
# passed" once if everything was good.  In either situation, you have
# to type control-c to move to the next test.

ROOT=${1:-${TOSROOT}/apps}
PLATFORM=${2:-${PLATFORM:-tmote}}

MOTEDEV=${MOTEDEV:-/dev/ttyUSB0}
MOTEBAUD=${MOTEBAUD:-115200}

fail () {
  case=${1} ; shift
  echo 1>&2 "FAILED BUILD ${case}:"
  cat utbuild.log
  exit 1
}

trap true INT

echo "Looking for unit tests in ${ROOT}"

find ${ROOT} -name Makefile \
| while read FOUND_MAKEFILE ; do
  mf_dir=$(dirname ${FOUND_MAKEFILE})
  component=$(grep '^COMPONENT *=' ${FOUND_MAKEFILE} | cut -d= -f2 | sed -e 's@ @@g')
  if [ -z "${component}" ] ; then
    continue
  fi
  test_source=${mf_dir}/${component}.nc
  if [ ! -f "${test_source}" ] ; then
    continue
  fi
  if grep -q "unittest/config_impl.h" ${test_source} ; then : ; else
    continue
  fi
  t=$(echo ${mf_dir} | sed -e "s@^${ROOT}/@@")
  ( cd ${mf_dir}
    echo "Building for ${t}"
    make ${PLATFORM} install > utbuild.log 2>&1 || fail ${t}
    echo "Running ${t} (^C when finished)"
    trap true INT
    stty ${MOTEBAUD} min 1 time 5 -icrnl -parenb cs8 < ${MOTEDEV}
    cat ${MOTEDEV}
  )
done
tinyos-2.1.2+dfsg/tos/types/000077500000000000000000000000001207233610700157325ustar00rootroot00000000000000tinyos-2.1.2+dfsg/tos/types/AM.h000066400000000000000000000011661207233610700164040ustar00rootroot00000000000000#ifndef AM_H
#define AM_H

// These are the right types, but ncc currently does not 
// like parameters being network types
typedef nx_uint8_t nx_am_id_t;
typedef nx_uint8_t nx_am_group_t;
typedef nx_uint16_t nx_am_addr_t;

typedef uint8_t am_id_t;
typedef uint8_t am_group_t;
typedef uint16_t am_addr_t;

enum {
  AM_BROADCAST_ADDR = 0xffff,
};

#ifndef DEFINED_TOS_AM_GROUP
#define DEFINED_TOS_AM_GROUP 0x22
#endif

#ifndef DEFINED_TOS_AM_ADDRESS
#define DEFINED_TOS_AM_ADDRESS 1
#endif

enum {
  TOS_AM_GROUP = DEFINED_TOS_AM_GROUP,
  TOS_AM_ADDRESS = DEFINED_TOS_AM_ADDRESS
};

#define UQ_AMQUEUE_SEND "amqueue.send"

#endif

tinyos-2.1.2+dfsg/tos/types/I2C.h000066400000000000000000000035371207233610700164700ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arched Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author Phil Buonadonna
 * @author Philip Levis
 */

#ifndef _I2C_H
#define _I2C_H

typedef struct { } TI2CExtdAddr;
typedef struct { } TI2CBasicAddr;

typedef uint8_t i2c_flags_t;

enum {
  I2C_START   = 0x01,
  I2C_STOP    = 0x02,
  I2C_ACK_END = 0x04,
};


#endif /* _I2C_H */
tinyos-2.1.2+dfsg/tos/types/Ieee154.h000066400000000000000000000060761207233610700172150ustar00rootroot00000000000000/*
 * Copyright (c) 2008-2010 The Regents of the University  of California.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

 /*
 * @author Stephen Dawson-Haggerty 
 * @version $Revision: 1.1 $ $Date: 2009/08/19 17:54:35 $
 */

#ifndef __IEEE154_H__
#define __IEEE154_H__

#include "IeeeEui64.h"

#define IEEE154_SEND_CLIENT "IEEE154_SEND_CLIENT"

typedef uint16_t       ieee154_panid_t;
typedef uint16_t       ieee154_saddr_t;
typedef ieee_eui64_t   ieee154_laddr_t;

typedef struct {
  uint8_t ieee_mode:2;
  union {
    ieee154_saddr_t saddr;
    ieee154_laddr_t laddr;
  } ieee_addr;
} ieee154_addr_t;
#define i_saddr ieee_addr.saddr
#define i_laddr ieee_addr.laddr

enum {
  IEEE154_BROADCAST_ADDR = 0xffff,
  IEEE154_LINK_MTU   = 127,
};

struct ieee154_frame_addr {
  ieee154_addr_t ieee_src;
  ieee154_addr_t ieee_dst;
  ieee154_panid_t ieee_dstpan;
};

enum {
  IEEE154_MIN_HDR_SZ = 6,
};

#if 0
struct ieee154_header_base {
  uint8_t length;
  uint16_t fcf;
  uint8_t dsn;
  uint16_t destpan;
} __attribute__((packed));
#else
#endif

enum ieee154_fcf_enums {
  IEEE154_FCF_FRAME_TYPE = 0,
  IEEE154_FCF_SECURITY_ENABLED = 3,
  IEEE154_FCF_FRAME_PENDING = 4,
  IEEE154_FCF_ACK_REQ = 5,
  IEEE154_FCF_INTRAPAN = 6,
  IEEE154_FCF_DEST_ADDR_MODE = 10,
  IEEE154_FCF_SRC_ADDR_MODE = 14,
};

enum ieee154_fcf_type_enums {
  IEEE154_TYPE_BEACON = 0,
  IEEE154_TYPE_DATA = 1,
  IEEE154_TYPE_ACK = 2,
  IEEE154_TYPE_MAC_CMD = 3,
  IEEE154_TYPE_MASK = 7,
};

enum ieee154_fcf_addr_mode_enums {
  IEEE154_ADDR_NONE = 0,
  IEEE154_ADDR_SHORT = 2,
  IEEE154_ADDR_EXT = 3,
  IEEE154_ADDR_MASK = 3,
};

#endif
tinyos-2.1.2+dfsg/tos/types/IeeeEui64.h000066400000000000000000000035571207233610700176010ustar00rootroot00000000000000// $Id: IeeeEui64.h,v 1.2 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2007, Vanderbilt University
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holders nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Author: Janos Sallai
 * Author: Gilman Tolle, Jonathan Hui (TEP 122)
 */

#ifndef IEEEEUI64_H
#define IEEEEUI64_H

enum { IEEE_EUI64_LENGTH = 8 };

typedef struct ieee_eui64 {
  uint8_t data[IEEE_EUI64_LENGTH];
} ieee_eui64_t;

#endif // IEEEEUI64_H
tinyos-2.1.2+dfsg/tos/types/Leds.h000066400000000000000000000037051207233610700167770ustar00rootroot00000000000000//$Id: Leds.h,v 1.6 2010-06-29 22:07:56 scipio Exp $
/* Copyright (c) 2005 The Regents of the University of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the copyright holder nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * Constants for manipulating LEDs.
 *
 * @author Philip Levis
 * @date   March 21, 2005
 */

#ifndef LEDS_H
#define LEDS_H 

enum {
  LEDS_LED0 = 1 << 0,
  LEDS_LED1 = 1 << 1,
  LEDS_LED2 = 1 << 2,
  LEDS_LED3 = 1 << 3,
  LEDS_LED4 = 1 << 4,
  LEDS_LED5 = 1 << 5,
  LEDS_LED6 = 1 << 6,
  LEDS_LED7 = 1 << 7
};

#endif
tinyos-2.1.2+dfsg/tos/types/Lpl.h000066400000000000000000000006201207233610700166300ustar00rootroot00000000000000#ifndef LPL_H
#define LPL_H

/**
 * Amount of time, in milliseconds, to keep the radio on after
 * a successful receive addressed to this node
 */
#ifndef DELAY_AFTER_RECEIVE
#define DELAY_AFTER_RECEIVE 100
#endif

/**
 * The LPL defaults to stay-on.
 */
#ifndef LPL_DEF_LOCAL_WAKEUP
#define LPL_DEF_LOCAL_WAKEUP 0
#endif

#ifndef LPL_DEF_REMOTE_WAKEUP
#define LPL_DEF_REMOTE_WAKEUP 0
#endif

#endif
tinyos-2.1.2+dfsg/tos/types/README000066400000000000000000000000161207233610700166070ustar00rootroot00000000000000Update this.

tinyos-2.1.2+dfsg/tos/types/Resource.h000066400000000000000000000032261207233610700176750ustar00rootroot00000000000000/*
 * Copyright (c) 2006, Technische Universitaet Berlin
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright notice,
 *   this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - Neither the name of the Technische Universitat Berlin nor the names
 *   of its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

#ifndef RESOURCE_H
#define RESOURCE_H

typedef uint8_t resource_client_id_t;

#endif

tinyos-2.1.2+dfsg/tos/types/State.h000066400000000000000000000032771207233610700171740ustar00rootroot00000000000000/*
 * Copyright (c) 2005-2006 Rincon Research Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * @author David Moss
 */
 
#ifndef STATE_H
#define STATE_H

#ifndef UQ_STATE
#define UQ_STATE "State"
#endif

#endif

tinyos-2.1.2+dfsg/tos/types/Storage.h000066400000000000000000000046021207233610700175110ustar00rootroot00000000000000// $Id: Storage.h,v 1.6 2010-06-29 22:07:56 scipio Exp $

/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Copyright (c) 2002-2005 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/*
 * @author: Jonathan Hui 
 * @author: David Gay 
 * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:56 $
 */

#ifndef STORAGE_H
#define STORAGE_H

typedef uint8_t volume_id_t;
typedef uint32_t storage_addr_t;
typedef uint32_t storage_len_t;
typedef uint32_t storage_cookie_t;

enum {
  SEEK_BEGINNING = 0
};

#include "Storage_chip.h"

#endif
tinyos-2.1.2+dfsg/tos/types/TinyError.h000066400000000000000000000062121207233610700200410ustar00rootroot00000000000000// $Id: TinyError.h,v 1.12 2010-06-29 22:07:56 scipio Exp $
/*
 * Copyright (c) 2000-2005 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the University of California nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
 * @author Phil Levis
 * @author David Gay
 * Revision:  $Revision: 1.12 $
 *
 * Defines global error codes for error_t in TinyOS.
 */

#ifndef TINY_ERROR_H_INCLUDED
#define TINY_ERROR_H_INCLUDED

#ifdef NESC
#define NESC_COMBINE(x) @combine(x)
#else
#define NESC_COMBINE(x)
#endif

enum {
  SUCCESS        =  0,          
  FAIL           =  1,           // Generic condition: backwards compatible
  ESIZE          =  2,           // Parameter passed in was too big.
  ECANCEL        =  3,           // Operation cancelled by a call.
  EOFF           =  4,           // Subsystem is not active
  EBUSY          =  5,           // The underlying system is busy; retry later
  EINVAL         =  6,           // An invalid parameter was passed
  ERETRY         =  7,           // A rare and transient failure: can retry
  ERESERVE       =  8,           // Reservation required before usage
  EALREADY       =  9,           // The device state you are requesting is already set
  ENOMEM         = 10,           // Memory required not available
  ENOACK         = 11,           // A packet was not acknowledged
  ELAST          = 11            // Last enum value
};

typedef uint8_t error_t NESC_COMBINE("ecombine");

error_t ecombine(error_t r1, error_t r2) @safe()
/* Returns: r1 if r1 == r2, FAIL otherwise. This is the standard error
     combination function: two successes, or two identical errors are
     preserved, while conflicting errors are represented by FAIL.
*/
{
  return r1 == r2 ? r1 : FAIL;
}

#endif
tinyos-2.1.2+dfsg/tos/types/message.h000066400000000000000000000012151207233610700175260ustar00rootroot00000000000000#ifndef __MESSAGE_H__
#define __MESSAGE_H__

#include "platform_message.h"

#ifndef TOSH_DATA_LENGTH
#define TOSH_DATA_LENGTH 28
#endif

#ifndef TOS_BCAST_ADDR
#define TOS_BCAST_ADDR 0xFFFF
#endif

typedef nx_struct message_t {
  nx_uint8_t header[sizeof(message_header_t)];
  nx_uint8_t data[TOSH_DATA_LENGTH];
  nx_uint8_t footer[sizeof(message_footer_t)];
  nx_uint8_t metadata[sizeof(message_metadata_t)];
} message_t;

/*
 * This resource is used to arbitrate access between ActiveMessageC,
 * Ieee154MessageC and possibly future MessageC components to the 
 * underlying radio driver.
 */
#define RADIO_SEND_RESOURCE "RADIO_SEND_RESOURCE"

#endif